repo_name
stringlengths 6
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stringlengths 5
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stringclasses 54
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stringlengths 1
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stringlengths 0
1.04M
⌀ | license
stringclasses 15
values |
|---|---|---|---|---|---|
VHDLTool/VHDL_Handbook_STD
|
Extras/VHDL/STD_03300_bad.vhd
|
1
|
2916
|
-------------------------------------------------------------------------------------------------
-- Company : CNES
-- Author : Mickael Carl (CNES)
-- Copyright : Copyright (c) CNES.
-- Licensing : GNU GPLv3
-------------------------------------------------------------------------------------------------
-- Version : V1
-- Version history :
-- V1 : 2015-04-13 : Mickael Carl (CNES): Creation
-------------------------------------------------------------------------------------------------
-- File name : STD_03300_bad.vhd
-- File Creation date : 2015-04-13
-- Project name : VHDL Handbook CNES Edition
-------------------------------------------------------------------------------------------------
-- Softwares : Microsoft Windows (Windows 7) - Editor (Eclipse + VEditor)
-------------------------------------------------------------------------------------------------
-- Description : Handbook example: Buffer port type: bad example
--
-- Limitations : This file is an example of the VHDL handbook made by CNES. It is a stub aimed at
-- demonstrating good practices in VHDL and as such, its design is minimalistic.
-- It is provided as is, without any warranty.
-- This example is compliant with the Handbook version 1.
--
-------------------------------------------------------------------------------------------------
-- Naming conventions:
--
-- i_Port: Input entity port
-- o_Port: Output entity port
-- b_Port: Bidirectional entity port
-- g_My_Generic: Generic entity port
--
-- c_My_Constant: Constant definition
-- t_My_Type: Custom type definition
--
-- My_Signal_n: Active low signal
-- v_My_Variable: Variable
-- sm_My_Signal: FSM signal
-- pkg_Param: Element Param coming from a package
--
-- My_Signal_re: Rising edge detection of My_Signal
-- My_Signal_fe: Falling edge detection of My_Signal
-- My_Signal_rX: X times registered My_Signal signal
--
-- P_Process_Name: Process
--
-------------------------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
--CODE
entity STD_03300_bad is
port (
i_Clock : in std_logic; -- Clock input
i_Reset_n : in std_logic; -- Reset input
i_A : in std_logic_vector(3 downto 0); -- Data to add
o_B : buffer std_logic_vector(3 downto 0) -- Data output
);
end STD_03300_bad;
architecture Behavioral of STD_03300_bad is
begin
-- Adding the input to the output at each clock cycle, reading from the output
P_Add : process(i_Reset_n, i_Clock)
begin
if (i_Reset_n = '0') then
o_B <= (others => '0');
elsif (rising_edge(i_Clock)) then
o_B <= std_logic_vector(unsigned(i_A) + unsigned(o_B));
end if;
end process;
end Behavioral;
--CODE
|
gpl-3.0
|
ILoveSpeccy/Aeon-Lite
|
cores/lvov-pk02-mips/src/host/plasma v3.0/plasma_if.vhd
|
1
|
5212
|
---------------------------------------------------------------------
-- TITLE: Plamsa Interface (clock divider and interface to FPGA board)
-- AUTHOR: Steve Rhoads ([email protected])
-- DATE CREATED: 6/6/02
-- FILENAME: plasma_if.vhd
-- PROJECT: Plasma CPU core
-- COPYRIGHT: Software placed into the public domain by the author.
-- Software 'as is' without warranty. Author liable for nothing.
-- DESCRIPTION:
-- This entity divides the clock by two and interfaces to the
-- Altera EP20K200EFC484-2X FPGA board.
-- Xilinx Spartan-3 XC3S200FT256-4 FPGA.
---------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
--use work.mlite_pack.all;
entity plasma_if is
port(clk_in : in std_logic;
reset : in std_logic;
uart_read : in std_logic;
uart_write : out std_logic;
ram_address : out std_logic_vector(31 downto 2);
ram_data : inout std_logic_vector(31 downto 0);
ram_ce1_n : out std_logic;
ram_ub1_n : out std_logic;
ram_lb1_n : out std_logic;
ram_ce2_n : out std_logic;
ram_ub2_n : out std_logic;
ram_lb2_n : out std_logic;
ram_we_n : out std_logic;
ram_oe_n : out std_logic;
gpio0_out : out std_logic_vector(31 downto 0);
gpioA_in : in std_logic_vector(31 downto 0));
end; --entity plasma_if
architecture logic of plasma_if is
component plasma
generic(memory_type : string := "XILINX_X16"; --"DUAL_PORT_" "ALTERA_LPM";
log_file : string := "UNUSED");
port(clk : in std_logic;
reset : in std_logic;
uart_write : out std_logic;
uart_read : in std_logic;
address : out std_logic_vector(31 downto 2);
data_write : out std_logic_vector(31 downto 0);
data_read : in std_logic_vector(31 downto 0);
write_byte_enable : out std_logic_vector(3 downto 0);
mem_pause_in : in std_logic;
gpio0_out : out std_logic_vector(31 downto 0);
gpioA_in : in std_logic_vector(31 downto 0));
end component; --plasma
signal clk_reg : std_logic;
signal we_n_next : std_logic;
signal we_n_reg : std_logic;
signal mem_address : std_logic_vector(31 downto 2);
signal data_write : std_logic_vector(31 downto 0);
signal data_reg : std_logic_vector(31 downto 0);
signal write_byte_enable : std_logic_vector(3 downto 0);
signal mem_pause_in : std_logic;
begin --architecture
--Divide 50 MHz clock by two
clk_div: process(reset, clk_in, clk_reg, we_n_next)
begin
if reset = '1' then
clk_reg <= '0';
elsif rising_edge(clk_in) then
clk_reg <= not clk_reg;
end if;
if reset = '1' then
we_n_reg <= '1';
data_reg <= (others => '0');
elsif falling_edge(clk_in) then
we_n_reg <= we_n_next or not clk_reg;
data_reg <= ram_data;
end if;
end process; --clk_div
mem_pause_in <= '0';
ram_address <= mem_address(31 downto 2);
ram_we_n <= we_n_reg;
--For Xilinx Spartan-3 Starter Kit
ram_control:
process(clk_reg, mem_address, write_byte_enable, data_write)
begin
if mem_address(30 downto 28) = "001" then --RAM
ram_ce1_n <= '0';
ram_ce2_n <= '0';
if write_byte_enable = "0000" then --read
ram_data <= (others => 'Z');
ram_ub1_n <= '0';
ram_lb1_n <= '0';
ram_ub2_n <= '0';
ram_lb2_n <= '0';
we_n_next <= '1';
ram_oe_n <= '0';
else --write
if clk_reg = '1' then
ram_data <= (others => 'Z');
else
ram_data <= data_write;
end if;
ram_ub1_n <= not write_byte_enable(3);
ram_lb1_n <= not write_byte_enable(2);
ram_ub2_n <= not write_byte_enable(1);
ram_lb2_n <= not write_byte_enable(0);
we_n_next <= '0';
ram_oe_n <= '1';
end if;
else
ram_data <= (others => 'Z');
ram_ce1_n <= '1';
ram_ub1_n <= '1';
ram_lb1_n <= '1';
ram_ce2_n <= '1';
ram_ub2_n <= '1';
ram_lb2_n <= '1';
we_n_next <= '1';
ram_oe_n <= '1';
end if;
end process; --ram_control
u1_plama: plasma
generic map (memory_type => "XILINX_16X",
log_file => "UNUSED")
PORT MAP (
clk => clk_reg,
reset => reset,
uart_write => uart_write,
uart_read => uart_read,
address => mem_address,
data_write => data_write,
data_read => data_reg,
write_byte_enable => write_byte_enable,
mem_pause_in => mem_pause_in,
gpio0_out => gpio0_out,
gpioA_in => gpioA_in);
end; --architecture logic
|
gpl-3.0
|
ILoveSpeccy/Aeon-Lite
|
cores/korvet/src/video/video.vhd
|
2
|
8546
|
-- XGA Signal 1024 x 768 @ 60 Hz timing
-- General timing
-- Screen refresh rate 60 Hz
-- Vertical refresh 48.363095238095 kHz
-- Pixel freq. 65.0 MHz
-- Horizontal timing (line)
-- Polarity of horizontal sync pulse is negative.
-- Scanline part Pixels Time [µs]
-- Visible area 1024 15.753846153846
-- Front porch 24 0.36923076923077
-- Sync pulse 136 2.0923076923077
-- Back porch 160 2.4615384615385
-- Whole line 1344 20.676923076923
-- Vertical timing (frame)
-- Polarity of vertical sync pulse is negative.
-- Frame part Lines Time [ms]
-- Visible area 768 15.879876923077
-- Front porch 3 0.062030769230769
-- Sync pulse 6 0.12406153846154
-- Back porch 29 0.59963076923077
-- Whole frame 806 16.6656
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;
entity video is
Port (
CLK : in std_logic; -- Pixel clock 32.5MHz
RESET : in std_logic; -- Reset (active low)
CACHE_SWAP : out std_logic; -- Active buffer
CACHE_A : out std_logic_vector(5 downto 0); -- Cache address
CACHE_D : in std_logic_vector(31 downto 0); -- Cache data
CURRENT_LINE : out std_logic_vector(7 downto 0); -- Current line to read in cache
LUT_A : out std_logic_vector(3 downto 0); -- LUT address
LUT_D : in std_logic_vector(3 downto 0); -- LUT data
VBLANK : out std_logic;
R : out std_logic_vector(3 downto 0); -- Red
G : out std_logic_vector(3 downto 0); -- Green
B : out std_logic_vector(3 downto 0); -- Blue
HSYNC : out std_logic; -- Hor. sync
VSYNC : out std_logic -- Ver. sync
);
end video;
architecture BEHAVIORAL of video is
constant H_TICKS : natural := 679;
constant V_TICKS : natural := 805;
constant H_SIZE : natural := 512;
constant V_SIZE : natural := 768;
constant HSYNC_B : natural := 531;
constant HSYNC_E : natural := 600;
constant VSYNC_B : natural := 770;
constant VSYNC_E : natural := 800;
------------------------------------------------------------
signal H_COUNTER : unsigned(9 downto 0); -- Horizontal Counter
signal V_COUNTER : unsigned(9 downto 0); -- Vertical Counter
signal THREE_TICK : unsigned(1 downto 0); -- Three Rows Tick
signal SCANLINE : unsigned(7 downto 0); -- Current Scanline for Video Output
signal FLIP_CACHE : std_logic;
signal PAPER : std_logic; -- Paper Area
signal PAPER_L : std_logic; -- Paper zone
signal PAPER_LL : std_logic; -- Paper zone
signal VBLANK_TICK : unsigned(9 downto 0);
signal PIX_R : std_logic_vector(7 downto 0); -- Red byte latch
signal PIX_G : std_logic_vector(7 downto 0); -- Green byte latch
signal PIX_B : std_logic_vector(7 downto 0); -- Blue byte latch
signal PIX_C : std_logic_vector(7 downto 0); -- Char byte latch
type palette_t is array(0 to 15) of std_logic_vector(23 downto 0);
constant color_palette : palette_t := ( "000000000000000000000000", -- 0
"000000000110000000001010", -- 1
"000001100000000010100000", -- 2
"000001100110000010101010", -- 3
"011000000000101000000000", -- 4
"011000000110101000001010", -- 5
"011001100000101010100000", -- 6
"011001100110101010101010", -- 7
"001100110011010101010101", -- 8
"001100111001010101011111", -- 9
"001110010011010111110101", -- 10
"001110011001010111111111", -- 11
"100100110011111101010101", -- 12
"100100111001111101011111", -- 13
"100110010011111111110101", -- 14
"100110011001111111111111");-- 15
begin
CURRENT_LINE <= std_logic_vector(SCANLINE);
CACHE_SWAP <= FLIP_CACHE;
process(CLK)
begin
if rising_edge(CLK) then
if RESET = '1' then
H_COUNTER <= (others => '0');
V_COUNTER <= (others => '0');
THREE_TICK <= "00";
SCANLINE <= "00000001";
FLIP_CACHE <= '0';
PAPER <= '0';
HSYNC <= '1';
VSYNC <= '1';
VBLANK <= '0';
VBLANK_TICK <= (others => '0');
else
PAPER <= '0';
HSYNC <= '1';
VSYNC <= '1';
VBLANK <= '0';
FLIP_CACHE <= '0';
H_COUNTER <= H_COUNTER + 1;
if H_COUNTER = H_TICKS then
H_COUNTER <= (others => '0');
V_COUNTER <= V_COUNTER + 1;
if V_COUNTER = V_TICKS then
V_COUNTER <= (others => '0');
end if;
VBLANK_TICK <= VBLANK_TICK + 1;
if VBLANK_TICK = 994 then
VBLANK_TICK <= (others => '0');
end if;
end if;
if H_COUNTER < H_SIZE and V_COUNTER < V_SIZE then
PAPER <= '1';
end if;
if H_COUNTER > HSYNC_B and H_COUNTER < HSYNC_E then
HSYNC <= '0';
end if;
if VBLANK_TICK < 6 then
VBLANK <= '1';
end if;
if V_COUNTER > VSYNC_B and V_COUNTER < VSYNC_E then
VSYNC <= '0';
end if;
if H_COUNTER = H_TICKS - 16 and V_COUNTER < V_SIZE then
THREE_TICK <= THREE_TICK + 1;
if THREE_TICK = 2 then
THREE_TICK <= "00";
SCANLINE <= SCANLINE + 1;
FLIP_CACHE <= '1';
end if;
end if;
end if;
end if;
end process;
process (CLK)
begin
if rising_edge(CLK) then
case H_COUNTER(2 downto 0) is
when "001" => CACHE_A <= std_logic_vector(H_COUNTER(8 downto 3));
when "111" =>
PIX_C <= CACHE_D(31 downto 24);
PIX_R <= CACHE_D(23 downto 16);
PIX_G <= CACHE_D(15 downto 8);
PIX_B <= CACHE_D(7 downto 0);
PAPER_L <= PAPER;
when others => null;
end case;
end if;
end process;
process (CLK)
begin
if rising_edge(CLK) then
LUT_A <= PIX_C(7 - to_integer(H_COUNTER(2 downto 0))) &
PIX_R(7 - to_integer(H_COUNTER(2 downto 0))) &
PIX_G(7 - to_integer(H_COUNTER(2 downto 0))) &
PIX_B(7 - to_integer(H_COUNTER(2 downto 0)));
PAPER_LL <= PAPER_L;
end if;
end process;
process (CLK)
begin
if rising_edge(CLK) then
if PAPER_LL = '1' then
if THREE_TICK = "01" then
R <= color_palette(to_integer(unsigned(LUT_D)))(11 downto 8);
G <= color_palette(to_integer(unsigned(LUT_D)))(7 downto 4);
B <= color_palette(to_integer(unsigned(LUT_D)))(3 downto 0);
else
R <= color_palette(to_integer(unsigned(LUT_D)))(23 downto 20);
G <= color_palette(to_integer(unsigned(LUT_D)))(19 downto 16);
B <= color_palette(to_integer(unsigned(LUT_D)))(15 downto 12);
end if;
else
R <= (others=>'0');
G <= (others=>'0');
B <= (others=>'0');
end if;
end if;
end process;
end BEHAVIORAL;
|
gpl-3.0
|
VHDLTool/VHDL_Handbook_STD
|
Extras/VHDL/STD_00200_good.vhd
|
1
|
2866
|
-------------------------------------------------------------------------------------------------
-- Company : CNES
-- Author : Mickael Carl (CNES)
-- Copyright : Copyright (c) CNES.
-- Licensing : GNU GPLv3
-------------------------------------------------------------------------------------------------
-- Version : V1
-- Version history :
-- V1 : 2015-04-01 : Mickael Carl (CNES): Creation
-------------------------------------------------------------------------------------------------
-- File name : STD_00200_good.vhd
-- File Creation date : 2015-04-01
-- Project name : VHDL Handbook CNES Edition
-------------------------------------------------------------------------------------------------
-- Softwares : Microsoft Windows (Windows 7) - Editor (Eclipse + VEditor)
-------------------------------------------------------------------------------------------------
-- Description : Handbook example: Name of clock signal: good example
--
-- Limitations : This file is an example of the VHDL handbook made by CNES. It is a stub aimed at
-- demonstrating good practices in VHDL and as such, its design is minimalistic.
-- It is provided as is, without any warranty.
-- This example is compliant with the Handbook version 1.
--
-------------------------------------------------------------------------------------------------
-- Naming conventions:
--
-- i_Port: Input entity port
-- o_Port: Output entity port
-- b_Port: Bidirectional entity port
-- g_My_Generic: Generic entity port
--
-- c_My_Constant: Constant definition
-- t_My_Type: Custom type definition
--
-- My_Signal_n: Active low signal
-- v_My_Variable: Variable
-- sm_My_Signal: FSM signal
-- pkg_Param: Element Param coming from a package
--
-- My_Signal_re: Rising edge detection of My_Signal
-- My_Signal_fe: Falling edge detection of My_Signal
-- My_Signal_rX: X times registered My_Signal signal
--
-- P_Process_Name: Process
--
-------------------------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
entity STD_00200_good is
port (
--CODE
i_Clock : in std_logic; -- Clock signal
--CODE
i_Reset_n : in std_logic; -- Reset signal
i_D : in std_logic; -- D Flip-Flop input signal
o_Q : out std_logic -- D Flip-Flop output signal
);
end STD_00200_good;
architecture Behavioral of STD_00200_good is
signal Q : std_logic; -- D Flip-Flop output
begin
-- D FlipFlop process
P_FlipFlop : process(i_Clock, i_Reset_n)
begin
if (i_Reset_n = '0') then
Q <= '0';
elsif (rising_edge(i_Clock)) then
Q <= i_D;
end if;
end process;
o_Q <= Q;
end Behavioral;
|
gpl-3.0
|
VHDLTool/VHDL_Handbook_STD
|
Extras/VHDL/STD_05400_bad.vhd
|
1
|
2826
|
-------------------------------------------------------------------------------------------------
-- Company : CNES
-- Author : Mickael Carl (CNES)
-- Copyright : Copyright (c) CNES.
-- Licensing : GNU GPLv3
-------------------------------------------------------------------------------------------------
-- Version : V1
-- Version history :
-- V1 : 2015-04-10 : Mickael Carl (CNES): Creation
-------------------------------------------------------------------------------------------------
-- File name : STD_05400_bad.vhd
-- File Creation date : 2015-04-10
-- Project name : VHDL Handbook CNES Edition
-------------------------------------------------------------------------------------------------
-- Softwares : Microsoft Windows (Windows 7) - Editor (Eclipse + VEditor)
-------------------------------------------------------------------------------------------------
-- Description : Handbook example: Unsuitability of internal tristate: bad example
--
-- Limitations : This file is an example of the VHDL handbook made by CNES. It is a stub aimed at
-- demonstrating good practices in VHDL and as such, its design is minimalistic.
-- It is provided as is, without any warranty.
-- This example is compliant with the Handbook version 1.
--
-------------------------------------------------------------------------------------------------
-- Naming conventions:
--
-- i_Port: Input entity port
-- o_Port: Output entity port
-- b_Port: Bidirectional entity port
-- g_My_Generic: Generic entity port
--
-- c_My_Constant: Constant definition
-- t_My_Type: Custom type definition
--
-- My_Signal_n: Active low signal
-- v_My_Variable: Variable
-- sm_My_Signal: FSM signal
-- pkg_Param: Element Param coming from a package
--
-- My_Signal_re: Rising edge detection of My_Signal
-- My_Signal_fe: Falling edge detection of My_Signal
-- My_Signal_rX: X times registered My_Signal signal
--
-- P_Process_Name: Process
--
-------------------------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
--CODE
entity STD_05400_bad is
port (
i_A : in std_logic_vector(3 downto 0); -- Input data of tristate block
i_OE : in std_logic_vector(3 downto 0); -- Enable vector of tristate buffers
o_B : out std_logic -- Single module output
);
end STD_05400_bad;
architecture Behavioral of STD_05400_bad is
begin
-- Assign output with Z or an input value depending on enable signals
o_B <= i_A(3) when (i_OE(3)='1') else 'Z';
o_B <= i_A(2) when (i_OE(2)='1') else 'Z';
o_B <= i_A(1) when (i_OE(1)='1') else 'Z';
o_B <= i_A(0) when (i_OE(0)='1') else 'Z';
end Behavioral;
--CODE
|
gpl-3.0
|
ILoveSpeccy/Aeon-Lite
|
cores/atari800xl/src/components/scandouble_ram_infer.vhdl
|
1
|
1176
|
---------------------------------------------------------------------------
-- (c) 2013 mark watson
-- I am happy for anyone to use this for non-commercial use.
-- If my vhdl files are used commercially or otherwise sold,
-- please contact me for explicit permission at scrameta (gmail).
-- This applies for source and binary form and derived works.
---------------------------------------------------------------------------
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
ENTITY scandouble_ram_infer IS
PORT
(
clock: IN std_logic;
data: IN std_logic_vector (7 DOWNTO 0);
address: IN integer RANGE 0 to 1824;
we: IN std_logic;
q: OUT std_logic_vector (7 DOWNTO 0)
);
END scandouble_ram_infer;
ARCHITECTURE rtl OF scandouble_ram_infer IS
TYPE mem IS ARRAY(0 TO 1824) OF std_logic_vector(7 DOWNTO 0); -- TODO need 455 but this leads to glitches in the hblank
SIGNAL ram_block : mem;
BEGIN
PROCESS (clock)
BEGIN
IF (clock'event AND clock = '1') THEN
IF (we = '1') THEN
ram_block(address) <= data;
END IF;
q <= ram_block(address);
END IF;
END PROCESS;
END rtl;
|
gpl-3.0
|
peteut/nvc
|
test/elab/openinout.vhd
|
2
|
1210
|
package p is
function func(x : natural) return natural;
end package;
package body p is
function func(x : natural) return natural is
begin
return x + 1;
end function;
end package body;
-------------------------------------------------------------------------------
entity sub is
port ( x : inout natural;
x2 : inout integer := 5;
y : out natural;
y2 : out integer );
end entity;
use work.p.all;
architecture test of sub is
begin
y <= func(x); -- Crash here reading open inout port
y2 <= func(x2);
end architecture;
-------------------------------------------------------------------------------
entity sub2 is
port ( x : inout natural;
y : out natural );
end entity;
architecture test of sub2 is
begin
sub_i: entity work.sub port map ( x => x, y => y, y2 => open );
end architecture;
-------------------------------------------------------------------------------
entity top is
end entity;
architecture test of top is
signal y, y2, y3 : natural;
begin
uut: entity work.sub port map ( x => open, y => y, y2 => y2 );
uut2: entity work.sub2 port map ( y => y3 );
end architecture;
|
gpl-3.0
|
dcsun88/ntpserver-fpga
|
cpu/ip/cpu_xadc_wiz_0_0/cpu_xadc_wiz_0_0_axi_xadc.vhd
|
1
|
45959
|
-------------------------------------------------------------------------------
-- cpu_xadc_wiz_0_0_axi_xadc.vhd - entity/architecture pair
-------------------------------------------------------------------------------
--
-- ************************************************************************
-- ** DISCLAIMER OF LIABILITY **
-- ** **
-- ** This file contains proprietary and confidential information of **
-- ** Xilinx, Inc. ("Xilinx"), that is distributed under a license **
-- ** from Xilinx, and may be used, copied and/or disclosed only **
-- ** pursuant to the terms of a valid license agreement with Xilinx. **
-- ** **
-- ** XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION **
-- ** ("MATERIALS") "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER **
-- ** EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING WITHOUT **
-- ** LIMITATION, ANY WARRANTY WITH RESPECT TO NONINFRINGEMENT, **
-- ** MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. Xilinx **
-- ** does not warrant that functions included in the Materials will **
-- ** meet the requirements of Licensee, or that the operation of the **
-- ** Materials will be uninterrupted or error-free, or that defects **
-- ** in the Materials will be corrected. Furthermore, Xilinx does **
-- ** not warrant or make any representations regarding use, or the **
-- ** results of the use, of the Materials in terms of correctness, **
-- ** accuracy, reliability or otherwise. **
-- ** **
-- ** Xilinx products are not designed or intended to be fail-safe, **
-- ** or for use in any application requiring fail-safe performance, **
-- ** such as life-support or safety devices or systems, Class III **
-- ** medical devices, nuclear facilities, applications related to **
-- ** the deployment of airbags, or any other applications that could **
-- ** lead to death, personal injury or severe property or **
-- ** environmental damage (individually and collectively, "critical **
-- ** applications"). Customer assumes the sole risk and liability **
-- ** of any use of Xilinx products in critical applications, **
-- ** subject only to applicable laws and regulations governing **
-- ** limitations on product liability. **
-- ** **
-- ** Copyright 2010, 2013 Xilinx, Inc. **
-- ** All rights reserved. **
-- ** **
-- ** This disclaimer and copyright notice must be retained as part **
-- ** of this file at all times. **
-- ************************************************************************
-------------------------------------------------------------------------------
-- File : cpu_xadc_wiz_0_0_axi_xadc.vhd
-- Version : v3.0
-- Description : XADC macro with AXI bus interface
-- Standard : VHDL-93
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Structure:
-- axi_xadc.vhd
-- -cpu_xadc_wiz_0_0_xadc_core_drp.vhd
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_cmb"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.conv_std_logic_vector;
use IEEE.std_logic_arith.unsigned;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_misc.and_reduce;
use IEEE.std_logic_misc.or_reduce;
library work;
use work.cpu_xadc_wiz_0_0_ipif_pkg.all;
use work.cpu_xadc_wiz_0_0_soft_reset;
use work.cpu_xadc_wiz_0_0_ipif_pkg.calc_num_ce;
use work.cpu_xadc_wiz_0_0_ipif_pkg.INTEGER_ARRAY_TYPE;
use work.cpu_xadc_wiz_0_0_ipif_pkg.SLV64_ARRAY_TYPE;
use work.cpu_xadc_wiz_0_0_ipif_pkg.INTR_POS_EDGE_DETECT;
use work.cpu_xadc_wiz_0_0_proc_common_pkg.all;
-------------------------------------------------------------------------------
-- Definition of Generics
--------------------
-- AXI LITE Generics
--------------------
-- C_BASEADDR -- Base Address
-- C_HIGHADDR -- high address
-- C_S_AXI_DATA_WIDTH -- AXI data bus width
-- C_S_AXI_ADDR_WIDTH -- AXI address bus width
-- C_FAMILY -- Target FPGA family, Virtex 6 only
-- C_INCLUDE_INTR -- inclusion of interrupt
-- C_SIM_MONITOR_FILE -- simulation file
-------------------------------------------------------------------------------
-- Definition of Ports
-------------------------------------------------------------------------------
-- s_axi_aclk -- AXI Clock
-- s_axi_aresetn -- AXI Reset
-- s_axi_awaddr -- AXI Write address
-- s_axi_awvalid -- Write address valid
-- s_axi_awready -- Write address ready
-- s_axi_wdata -- Write data
-- s_axi_wstrb -- Write strobes
-- s_axi_wvalid -- Write valid
-- s_axi_wready -- Write ready
-- s_axi_bresp -- Write response
-- s_axi_bvalid -- Write response valid
-- s_axi_bready -- Response ready
-- s_axi_araddr -- Read address
-- s_axi_arvalid -- Read address valid
-- s_axi_arready -- Read address ready
-- s_axi_rdata -- Read data
-- s_axi_rresp -- Read response
-- s_axi_rvalid -- Read valid
-- s_axi_rready -- Read ready
-------------------------------------------------------------------------------
-- Note: the unused signals in the port name lists are not listed here.
-------------------------------------------------------------------------------
-- SYSMON EXTERNAL INTERFACE -- INPUT Signals
-------------------------------------------------------------------------------
-- VAUXN -- Sixteen auxiliary analog input pairs
-- VAUXP -- low bandwidth differential analog inputs
-- CONVST -- Conversion start signal for event-driven sampling mode
-------------------------------------------------------------------------------
-- SYSMON EXTERNAL INTERFACE -- OUTPUT Signals
-------------------------------------------------------------------------------
-- ip2intc_irpt -- Interrupt to processor
-- alarm_out -- SYSMON alarm output signals of the hard macro
-------------------------------------------------------------------------------
entity cpu_xadc_wiz_0_0_axi_xadc is
generic
(
-----------------------------------------
-- C_BASEADDR : std_logic_vector := X"FFFF_FFFF";
-- C_HIGHADDR : std_logic_vector := X"0000_0000";
-----------------------------------------
-- AXI slave single block generics
C_INSTANCE : string := "cpu_xadc_wiz_0_0_axi_xadc";
C_FAMILY : string := "virtex7";
C_S_AXI_ADDR_WIDTH : integer range 2 to 32 := 11;
C_S_AXI_DATA_WIDTH : integer range 32 to 128 := 32;
-----------------------------------------
-- SYSMON Generics
C_INCLUDE_INTR : integer range 0 to 1 := 1;
C_SIM_MONITOR_FILE : string := "design.txt"
);
port
(
-- System interface
s_axi_aclk : in std_logic;
s_axi_aresetn : in std_logic;
-- AXI Write address channel signals
s_axi_awaddr : in std_logic_vector((C_S_AXI_ADDR_WIDTH-1) downto 0);
s_axi_awvalid : in std_logic;
s_axi_awready : out std_logic;
-- AXI Write data channel signals
s_axi_wdata : in std_logic_vector((C_S_AXI_DATA_WIDTH-1) downto 0);
s_axi_wstrb : in std_logic_vector(((C_S_AXI_DATA_WIDTH/8)-1) downto 0);
s_axi_wvalid : in std_logic;
s_axi_wready : out std_logic;
-- AXI Write response channel signals
s_axi_bresp : out std_logic_vector(1 downto 0);
s_axi_bvalid : out std_logic;
s_axi_bready : in std_logic;
-- AXI Read address channel signals
s_axi_araddr : in std_logic_vector((C_S_AXI_ADDR_WIDTH-1) downto 0);
s_axi_arvalid : in std_logic;
s_axi_arready : out std_logic;
-- AXI Read address channel signals
s_axi_rdata : out std_logic_vector((C_S_AXI_DATA_WIDTH-1) downto 0);
s_axi_rresp : out std_logic_vector(1 downto 0);
s_axi_rvalid : out std_logic;
s_axi_rready : in std_logic;
-- Input to the system from the axi_xadc core
ip2intc_irpt : out std_logic;
-- XADC External interface signals
-- Conversion start control signal for Event driven mode
busy_out : out STD_LOGIC; -- ADC Busy signal
channel_out : out STD_LOGIC_VECTOR (4 downto 0); -- Channel Selection Outputs
eoc_out : out STD_LOGIC; -- End of Conversion Signal
eos_out : out STD_LOGIC; -- End of Sequence Signal
ot_out : out STD_LOGIC;
alarm_out : out STD_LOGIC_VECTOR (7 downto 0); -- OR'ed output of all the Alarms
vp_in : in STD_LOGIC; -- Dedicated Analog Input Pair
vn_in : in STD_LOGIC
);
-------------------------------------------------------------------------------
-- Attributes
-------------------------------------------------------------------------------
-- Fan-Out attributes for XST
ATTRIBUTE MAX_FANOUT : string;
ATTRIBUTE MAX_FANOUT of s_axi_aclk : signal is "10000";
ATTRIBUTE MAX_FANOUT of s_axi_aresetn : signal is "10000";
-----------------------------------------------------------------
-- Start of PSFUtil MPD attributes
-----------------------------------------------------------------
ATTRIBUTE HDL : string;
ATTRIBUTE HDL of cpu_xadc_wiz_0_0_axi_xadc : entity is "VHDL";
ATTRIBUTE IPTYPE : string;
ATTRIBUTE IPTYPE of cpu_xadc_wiz_0_0_axi_xadc : entity is "PERIPHERAL";
ATTRIBUTE IP_GROUP : string;
ATTRIBUTE IP_GROUP of cpu_xadc_wiz_0_0_axi_xadc : entity is "LOGICORE";
ATTRIBUTE SIGIS : string;
ATTRIBUTE SIGIS of s_axi_aclk : signal is "Clk";
ATTRIBUTE SIGIS of s_axi_aresetn : signal is "Rst";
ATTRIBUTE SIGIS of ip2intc_irpt : signal is "INTR_LEVEL_HIGH";
-----------------------------------------------------------------
-- end of PSFUtil MPD attributes
-----------------------------------------------------------------
end entity cpu_xadc_wiz_0_0_axi_xadc;
-------------------------------------------------------------------------------
-- Architecture Section
-------------------------------------------------------------------------------
architecture imp of cpu_xadc_wiz_0_0_axi_xadc is
component cpu_xadc_wiz_0_0_xadc_core_drp
generic
(
----------------
C_S_AXI_ADDR_WIDTH : integer;
C_S_AXI_DATA_WIDTH : integer;
C_FAMILY : string;
----------------
CE_NUMBERS : integer;
IP_INTR_NUM : integer;
C_SIM_MONITOR_FILE : string ;
----------------
MUX_ADDR_NO : integer
);
port
(
-- IP Interconnect (IPIC) port signals ---------
Bus2IP_Clk : in std_logic;
Bus2IP_Rst : in std_logic;
-- Bus 2 IP IPIC interface
Bus2IP_RdCE : in std_logic_vector(0 to CE_NUMBERS-1);
Bus2IP_WrCE : in std_logic_vector(0 to CE_NUMBERS-1);
Bus2IP_Addr : in std_logic_vector(0 to (C_S_AXI_ADDR_WIDTH-1));
Bus2IP_Data : in std_logic_vector(0 to (C_S_AXI_DATA_WIDTH-1));
-- IP 2 Bus IPIC interface
Sysmon_IP2Bus_Data : out std_logic_vector(0 to (C_S_AXI_DATA_WIDTH-1));
Sysmon_IP2Bus_WrAck : out std_logic;
Sysmon_IP2Bus_RdAck : out std_logic;
---------------- interrupt interface with the system -----------
Interrupt_status : out std_logic_vector(0 to IP_INTR_NUM-1);
---------------- sysmon macro interface -------------------
busy_out : out STD_LOGIC; -- ADC Busy signal
channel_out : out STD_LOGIC_VECTOR (4 downto 0); -- Channel Selection Outputs
eoc_out : out STD_LOGIC; -- End of Conversion Signal
eos_out : out STD_LOGIC; -- End of Sequence Signal
ot_out : out STD_LOGIC;
alarm_out : out STD_LOGIC_VECTOR (7 downto 0);
vp_in : in STD_LOGIC; -- Dedicated Analog Input Pair
vn_in : in STD_LOGIC
);
end component;
-------------------------------------------------------------------------------
-- Function Declarations starts
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Function: add_intr_ard_addr_range_array
-------------------------------------------------------------------------------
-- Add the interrupt base and high address to ARD_ADDR_RANGE_ARRAY, if
-- C_INCLUDE_INTR is = 1
-------------------------------------------------------------------------------
function add_intr_ard_addr_range_array
(include_intr : integer;
USER_ARD_ADDR_RANGE_ARRAY : SLV64_ARRAY_TYPE;
INTR_USER_ARD_ADDR_RANGE_ARRAY : SLV64_ARRAY_TYPE
)
return SLV64_ARRAY_TYPE is
begin
if include_intr = 1 then
return INTR_USER_ARD_ADDR_RANGE_ARRAY;
else
return USER_ARD_ADDR_RANGE_ARRAY;
end if;
end function add_intr_ard_addr_range_array;
-------------------------------------------------------------------------------
-- Function: add_intr_ce_range_array
-------------------------------------------------------------------------------
-- This function is used to add the 16 interrupts in the NUM_CE range array, if
-- C_INCLUDE_INTR is = 1
-------------------------------------------------------------------------------
function add_intr_ce_range_array
(include_intr : integer;
USER_ARD_NUM_CE_ARRAY : INTEGER_ARRAY_TYPE;
INTR_USER_ARD_NUM_CE_ARRAY : INTEGER_ARRAY_TYPE
)
return INTEGER_ARRAY_TYPE is
begin
if include_intr = 1 then
return INTR_USER_ARD_NUM_CE_ARRAY;
else
return USER_ARD_NUM_CE_ARRAY;
end if;
end function add_intr_ce_range_array;
-------------------------------------------------------------------------------
-- Function Declaration ends
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Type Declaration
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Constant Declaration Starts
-------------------------------------------------------------------------------
-- AXI lite parameters
constant C_BASEADDR : std_logic_vector := X"0000_0000";
--constant C_BASEADDR : std_logic_vector := X"FFFF_FFFF";
constant C_HIGHADDR : std_logic_vector := X"0000_0000";
constant C_S_AXI_SYSMON_MIN_SIZE : std_logic_vector(31 downto 0):= X"000003FF";
constant C_USE_WSTRB : integer := 1;
constant C_DPHASE_TIMEOUT : integer := 64;
--constant ZERO_ADDR_PAD : std_logic_vector(0 to 64-C_S_AXI_ADDR_WIDTH-1)
-- := (others => '0');
constant ZERO_ADDR_PAD : std_logic_vector(0 to 64-32-1) := (others => '0');
constant INTERRUPT_NO : natural := 17; -- changed from 10 to 17 for adding
-- falling edge interrupts
constant C_INTR_CE_NUM : integer := 16; -- this is fixed for interrupt controller
constant MUX_ADDR_NO : integer := 5; -- added for XADC
-------------------------------------------------------------------------------
-- The local register array contains
-- 1. Software Reset Register (SRR), -- address C_BASEADDR + 0x00
-- 2. Status Register (SR), -- address C_BASEADDR + 0x04
-- 3. Alarm Output Status Register (AOSR), -- address C_BASEADDR + 0x08
-- 4. CONVST Register (CONVSTR), -- address C_BASEADDR + 0x0C
-- 5. SYSMON Reset Register (SYSMONRR). -- address C_BASEADDR + 0x10
-- All registers are 32 bit width and their addresses are at word boundry.
-------------------------------------------------------------------------------
constant LOCAL_REG_BASEADDR : std_logic_vector := C_BASEADDR or X"00000000";
constant LOCAL_REG_HIGHADDR : std_logic_vector := C_BASEADDR or X"0000001F";
-------------------------------------------------------------------------------
-- The interrupt registers to be added if C_INCLUDE_INTR = 1
-------------------------------------------------------------------------------
constant INTR_BASEADDR : std_logic_vector := C_BASEADDR or X"00000040";
constant INTR_HIGHADDR : std_logic_vector := C_BASEADDR or x"0000007F";
-------------------------------------------------------------------------------
-- The address range is devided in the range of Status & Control registers
-- there are total 128 registers. First 64 are the status and remaning 64 are
-- control registers
-------------------------------------------------------------------------------
constant REG_FILE_BASEADDR : std_logic_vector := C_BASEADDR or X"00000200";
constant REG_FILE_HIGHADDR : std_logic_vector := C_BASEADDR or X"000003FF";
-------------------------------------------------------------------------------
--The address ranges for the registers are defined in USER_ARD_ADDR_RANGE_ARRAY
-------------------------------------------------------------------------------
constant USER_ARD_ADDR_RANGE_ARRAY : SLV64_ARRAY_TYPE :=
(
ZERO_ADDR_PAD & LOCAL_REG_BASEADDR,
ZERO_ADDR_PAD & LOCAL_REG_HIGHADDR,
ZERO_ADDR_PAD & REG_FILE_BASEADDR,
ZERO_ADDR_PAD & REG_FILE_HIGHADDR
);
constant INTR_USER_ARD_ADDR_RANGE_ARRAY : SLV64_ARRAY_TYPE :=
(
ZERO_ADDR_PAD & LOCAL_REG_BASEADDR,
ZERO_ADDR_PAD & LOCAL_REG_HIGHADDR,
ZERO_ADDR_PAD & INTR_BASEADDR,
ZERO_ADDR_PAD & INTR_HIGHADDR,
ZERO_ADDR_PAD & REG_FILE_BASEADDR,
ZERO_ADDR_PAD & REG_FILE_HIGHADDR
);
-------------------------------------------------------------------------------
-- The USER_ARD_ADDR_RANGE_ARRAY is subset of ARD_ADDR_RANGE_ARRAY based on the
-- C_INCLUDE_INTR parameter value.
-------------------------------------------------------------------------------
constant ARD_ADDR_RANGE_ARRAY : SLV64_ARRAY_TYPE :=
add_intr_ard_addr_range_array(
C_INCLUDE_INTR,
USER_ARD_ADDR_RANGE_ARRAY,
INTR_USER_ARD_ADDR_RANGE_ARRAY
);
-------------------------------------------------------------------------------
--The total 128 DRP register address space is divided in two 64 register arrays
--The status and control registers are equally divided in the range to generate
--the chip enable signals.
--There are some local alarm registers, conversion start registers, ip reset
--registers present in the design.
--the no. of CE's required is defined in USER_ARD_NUM_CE_ARRAY array
-------------------------------------------------------------------------------
constant USER_ARD_NUM_CE_ARRAY : INTEGER_ARRAY_TYPE :=
(
0 => 8, -- 5 chip enable + 3 dummy
-- CS_0 & CE_0 => SRR -- Addr = 00
-- CS_0 & CE_1 => SR -- Addr = 04
-- CS_0 & CE_2 => AOSR -- Addr = 08
-- CS_0 & CE_3 => CONVSTR -- Addr = 0C
-- CS_0 & CE_4 => SYSMONRR -- Addr = 10
-- CS_0 & CE_5 => dummy -- Addr = 14
-- CS_0 & CE_6 => dummy -- Addr = 18
-- CS_0 & CE_7 => dummy -- Addr = 1C
1 => 1--, -- 1 chip enable
-- CS_1 & CE_8 => 1 CE required to access DRP
);
constant INTR_USER_ARD_NUM_CE_ARRAY : INTEGER_ARRAY_TYPE :=
(
0 => 8, -- 5 chip enable + 3 dummy
-- CS_0 & CE_0 => SRR -- Addr = 00
-- CS_0 & CE_1 => SR -- Addr = 04
-- CS_0 & CE_2 => AOSR -- Addr = 08
-- CS_0 & CE_3 => CONVSTR -- Addr = 0C
-- CS_0 & CE_4 => SYSMONRR -- Addr = 10
-- CS_0 & CE_5 => dummy -- Addr = 14
-- CS_0 & CE_6 => dummy -- Addr = 18
-- CS_0 & CE_7 => dummy -- Addr = 1C
1 => 16, -- 16 chip enable
-- CS_1 & CE_15 => GIER -- Addr = 5C
-- CS_1 & CE_16 => IPISR -- Addr = 60
-- CS_1 & CE_18 => IPIER -- Addr = 68
-- Following commented code is for reference with execution of above function
2 => 1 -- 1 chip enable -- addr = 200 to 3FF
-- CS_2 & CE_24 => 1 CE required to access DRP
);
-------------------------------------------------------------------------------
-- The USER_ARD_NUM_CE_ARRAY is subset of ARD_NUM_CE_ARRAY based on the
-- C_INCLUDE_INTR parameter value.
-------------------------------------------------------------------------------
constant ARD_NUM_CE_ARRAY : INTEGER_ARRAY_TYPE :=
add_intr_ce_range_array(
C_INCLUDE_INTR,
USER_ARD_NUM_CE_ARRAY,
INTR_USER_ARD_NUM_CE_ARRAY
);
-------------------------------------------------------------------------------
-- Eight interrupts
-------------------------------------------------------------------------------
constant IP_INTR_MODE_ARRAY : INTEGER_ARRAY_TYPE(0 to INTERRUPT_NO-1):=
(
others => INTR_POS_EDGE_DETECT
);
-------------------------------------------------------------------------------
-- Calculating index for interrupt logic
-------------------------------------------------------------------------------
constant SWRESET : natural := 0;
constant INTR_LO : natural := 0;
constant INTR_HI : natural := 15;
constant CS_NUMBERS : integer :=((ARD_ADDR_RANGE_ARRAY'LENGTH/2));
constant RD_CE_NUMBERS : integer :=(calc_num_ce(ARD_NUM_CE_ARRAY));
constant WR_CE_NUMBERS : integer :=(calc_num_ce(ARD_NUM_CE_ARRAY));
constant IP_INTR_MODE_ARRAY_NUM : integer := IP_INTR_MODE_ARRAY'length;
constant RDCE_WRCE_SYSMON_CORE : integer := 9;
--------------------------------------------------------------------------------
-- Constant Declaration Ends
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-- Signal and Type Declarations
--------------------------------------------------------------------------------
--bus2ip signals
signal bus2ip_clk : std_logic;
signal bus2ip_reset : std_logic;
---
signal bus2ip_rdce : std_logic_vector((RD_CE_NUMBERS-1)downto 0);
signal bus2ip_rdce_int : std_logic_vector(0 to (RD_CE_NUMBERS-1));
signal bus2ip_rdce_xadc_core : std_logic_vector(0 to (RDCE_WRCE_SYSMON_CORE-1));
---
signal bus2ip_wrce : std_logic_vector((WR_CE_NUMBERS-1)downto 0);
signal bus2ip_wrce_int : std_logic_vector(0 to (WR_CE_NUMBERS-1));
signal bus2ip_wrce_xadc_core : std_logic_vector(0 to (RDCE_WRCE_SYSMON_CORE-1));
---
signal bus2ip_addr : std_logic_vector((C_S_AXI_ADDR_WIDTH-1)downto 0);
signal bus2ip_addr_int : std_logic_vector(0 to (C_S_AXI_ADDR_WIDTH-1));
---
signal bus2ip_be : std_logic_vector(((C_S_AXI_DATA_WIDTH/8)-1)downto 0);
signal bus2ip_be_int : std_logic_vector(0 to (C_S_AXI_DATA_WIDTH/8)-1);
---
signal bus2ip_data : std_logic_vector(((C_S_AXI_DATA_WIDTH)-1)downto 0);
signal bus2ip_data_int : std_logic_vector(0 to (C_S_AXI_DATA_WIDTH-1));
-- ip2bus signals
signal ip2bus_data : std_logic_vector((C_S_AXI_DATA_WIDTH-1)downto 0)
:= (others => '0');
signal ip2bus_data_int : std_logic_vector(0 to (C_S_AXI_DATA_WIDTH-1));
signal ip2bus_data_int1 : std_logic_vector(0 to (C_S_AXI_DATA_WIDTH-1));
---
signal ip2bus_wrack : std_logic;
signal ip2bus_rdack : std_logic;
signal ip2bus_error : std_logic;
signal ip2bus_wrack_int1 : std_logic;
signal ip2bus_rdack_int1 : std_logic;
signal ip2bus_error_int1 : std_logic;
signal xadc_ip2bus_data : std_logic_vector(0 to (C_S_AXI_DATA_WIDTH-1));
signal xadc_ip2bus_wrack : std_logic;
signal xadc_ip2bus_rdack : std_logic;
-- signal xadc_ip2bus_error : std_logic;
signal interrupt_status_i : std_logic_vector(0 to (IP_INTR_MODE_ARRAY_NUM-1));
signal intr_ip2bus_data : std_logic_vector(0 to (C_S_AXI_DATA_WIDTH-1));
signal intr_ip2bus_wrack : std_logic;
signal intr_ip2bus_rdack : std_logic;
signal intr_ip2bus_error : std_logic;
-- Software Reset Signals
signal reset2ip_reset : std_logic := '0';
signal rst_ip2bus_wrack : std_logic;
signal rst_ip2bus_error : std_logic;
signal rst_ip2bus_rdack : std_logic;
signal rst_ip2bus_rdack_d1 : std_logic;
-- following signals are used to impleemnt the register access rule
signal and_reduce_be : std_logic;
signal partial_reg_access_error : std_logic;
signal bus2ip_reset_active_low : std_logic;
signal bus2ip_reset_active_high: std_logic;
--------------------------------------------
signal dummy_local_reg_rdack_d1 : std_logic;
signal dummy_local_reg_rdack : std_logic;
signal dummy_local_reg_wrack_d1 : std_logic;
signal dummy_local_reg_wrack : std_logic;
signal bus2ip_rdce_intr : std_logic_vector(INTR_LO to INTR_HI);
signal bus2ip_wrce_intr : std_logic_vector(INTR_LO to INTR_HI);
-------------------------------------------------------------------------------
-- Architecture begins
-------------------------------------------------------------------------------
begin
--------------------------------------------
-- INSTANTIATE AXI SLAVE SINGLE
--------------------------------------------
AXI_LITE_IPIF_I : entity work.cpu_xadc_wiz_0_0_axi_lite_ipif
generic map
(
C_S_AXI_ADDR_WIDTH => C_S_AXI_ADDR_WIDTH,
C_S_AXI_DATA_WIDTH => C_S_AXI_DATA_WIDTH,
C_S_AXI_MIN_SIZE => C_S_AXI_SYSMON_MIN_SIZE,
C_USE_WSTRB => C_USE_WSTRB,
C_DPHASE_TIMEOUT => C_DPHASE_TIMEOUT,
C_ARD_ADDR_RANGE_ARRAY => ARD_ADDR_RANGE_ARRAY,
C_ARD_NUM_CE_ARRAY => ARD_NUM_CE_ARRAY,
C_FAMILY => C_FAMILY
)
port map
(
s_axi_aclk => s_axi_aclk, -- in
s_axi_aresetn => s_axi_aresetn, -- in
s_axi_awaddr => s_axi_awaddr, -- in
s_axi_awvalid => s_axi_awvalid, -- in
s_axi_awready => s_axi_awready, -- out
s_axi_wdata => s_axi_wdata, -- in
s_axi_wstrb => s_axi_wstrb, -- in
s_axi_wvalid => s_axi_wvalid, -- in
s_axi_wready => s_axi_wready, -- out
s_axi_bresp => s_axi_bresp, -- out
s_axi_bvalid => s_axi_bvalid, -- out
s_axi_bready => s_axi_bready, -- in
s_axi_araddr => s_axi_araddr, -- in
s_axi_arvalid => s_axi_arvalid, -- in
s_axi_arready => s_axi_arready, -- out
s_axi_rdata => s_axi_rdata, -- out
s_axi_rresp => s_axi_rresp, -- out
s_axi_rvalid => s_axi_rvalid, -- out
s_axi_rready => s_axi_rready, -- in
-- IP Interconnect (IPIC) port signals
Bus2IP_Clk => bus2ip_clk, -- out
Bus2IP_Resetn => bus2ip_reset_active_low, -- out
Bus2IP_Addr => bus2ip_addr, -- out
Bus2IP_RNW => open, -- out
Bus2IP_BE => bus2ip_be, -- out
Bus2IP_CS => open, -- out
Bus2IP_RdCE => bus2ip_rdce, -- out
Bus2IP_WrCE => bus2ip_wrce, -- out
Bus2IP_Data => bus2ip_data, -- out
IP2Bus_Data => ip2bus_data, -- in
IP2Bus_WrAck => ip2bus_wrack, -- in
IP2Bus_RdAck => ip2bus_rdack, -- in
IP2Bus_Error => ip2bus_error -- in
);
-------------------------------------------------------------------------------
-------------------------------
bus2ip_rdce_int <= bus2ip_rdce;
-------------------------------
bus2ip_wrce_int <= bus2ip_wrce;
-------------------------------
ip2bus_data <= ip2bus_data_int;
-------------------------------
----------------------
--REG_RESET_FROM_IPIF: convert active low to active hig reset to rest of
-- the core.
----------------------
REG_RESET_FROM_IPIF: process (s_axi_aclk) is
begin
if(s_axi_aclk'event and s_axi_aclk = '1') then
bus2ip_reset_active_high <= not(bus2ip_reset_active_low);
end if;
end process REG_RESET_FROM_IPIF;
----------------------
-------------------------------------------------------------------------------
-------------------- when interrupt is used.
RDCE_WRCE_GEN_I: if (C_INCLUDE_INTR = 1) generate
-----------------
--------
begin
--------
bus2ip_rdce_intr <= bus2ip_rdce_int -- (25-16=8) to (25-2=23)
(((RD_CE_NUMBERS-C_INTR_CE_NUM)-1)to (RD_CE_NUMBERS-2));
bus2ip_wrce_intr <= bus2ip_wrce_int -- (25-16=8) to (25-2=23)
(((WR_CE_NUMBERS-C_INTR_CE_NUM)-1)to (WR_CE_NUMBERS-2));
bus2ip_rdce_xadc_core <= bus2ip_rdce_int -- 0 to ((25-16=8)-2)=7
((RD_CE_NUMBERS-RD_CE_NUMBERS)to
((RD_CE_NUMBERS-C_INTR_CE_NUM)-2)
)
& -- 24 = last rdce
bus2ip_rdce_int(RD_CE_NUMBERS-1);
bus2ip_wrce_xadc_core <= bus2ip_wrce_int -- 0 to ((25-16=8)-1)=7
((WR_CE_NUMBERS-WR_CE_NUMBERS)to
((WR_CE_NUMBERS-C_INTR_CE_NUM)-2)
)
& -- 24 = last wrce
bus2ip_wrce_int(WR_CE_NUMBERS-1);
end generate RDCE_WRCE_GEN_I;
-----------------------------
-------------------------------------------------------------------------------
-------------------- when interrupt is NOT used.
RDCE_WRCE_NOT_GEN_I: if (C_INCLUDE_INTR = 0) generate
-----------------
--------
begin
--------
bus2ip_rdce_xadc_core <= bus2ip_rdce_int;
bus2ip_wrce_xadc_core <= bus2ip_wrce_int;
end generate RDCE_WRCE_NOT_GEN_I;
---------------------------------
-------------------------------------------------------------------------------
--------------------------------------------
-- XADC_CORE_I: INSTANTIATE XADC CORE
--------------------------------------------
AXI_XADC_CORE_I : cpu_xadc_wiz_0_0_xadc_core_drp
generic map
(
---------------- -------------------------
C_S_AXI_ADDR_WIDTH => C_S_AXI_ADDR_WIDTH,
C_S_AXI_DATA_WIDTH => C_S_AXI_DATA_WIDTH,
C_FAMILY => C_FAMILY,
---------------- -------------------------
CE_NUMBERS => RDCE_WRCE_SYSMON_CORE,
IP_INTR_NUM => IP_INTR_MODE_ARRAY_NUM,
C_SIM_MONITOR_FILE => C_SIM_MONITOR_FILE,
------------------ -------------------------
MUX_ADDR_NO => MUX_ADDR_NO
)
port map
(
-- IP Interconnect (IPIC) port signals ---------
Bus2IP_Clk => bus2ip_clk,
Bus2IP_Rst => reset2ip_reset,
Bus2IP_RdCE => bus2ip_rdce_xadc_core,
Bus2IP_WrCE => bus2ip_wrce_xadc_core,
Bus2IP_Addr => bus2ip_addr,
Bus2IP_Data => bus2ip_data,
-- ip2bus signals ------------------------------
Sysmon_IP2Bus_Data => xadc_ip2bus_data,
Sysmon_IP2Bus_WrAck => xadc_ip2bus_wrack,
Sysmon_IP2Bus_RdAck => xadc_ip2bus_rdack,
Interrupt_status => interrupt_status_i,
--- external interface signals ------------------
busy_out => busy_out,
channel_out => channel_out,
eoc_out => eoc_out,
eos_out => eos_out,
ot_out => ot_out,
alarm_out => alarm_out,
vp_in => vp_in,
vn_in => vn_in
);
----------------------------------------------------------
-- SOFT_RESET_I: INSTANTIATE SOFTWARE RESET REGISTER (SRR)
----------------------------------------------------------
SOFT_RESET_I: entity work.cpu_xadc_wiz_0_0_soft_reset
generic map
(
C_SIPIF_DWIDTH => C_S_AXI_DATA_WIDTH,
-- Width of triggered reset in Bus Clocks
C_RESET_WIDTH => 16
)
port map
(
-- Inputs From the AXI Slave Single Bus
Bus2IP_Reset => bus2ip_reset_active_high, -- in
Bus2IP_Clk => bus2ip_clk, -- in
Bus2IP_WrCE => bus2ip_wrce_int(SWRESET), -- in
Bus2IP_Data => bus2ip_data, -- in
Bus2IP_BE => bus2ip_be, -- in
-- Final Device Reset Output
Reset2IP_Reset => reset2ip_reset, -- out
-- Status Reply Outputs to the Bus
Reset2Bus_WrAck => rst_ip2bus_wrack, -- out
Reset2Bus_Error => rst_ip2bus_error, -- out
Reset2Bus_ToutSup => open -- out
);
------------------------------------------------------------
-- INSTANTIATE INTERRUPT CONTROLLER MODULE (IPISR,IPIER,GIER)
------------------------------------------------------------
-- INTR_CTRLR_GEN_I: Generate logic to be used to pass signals,
-------------------- when interrupt is used.
INTR_CTRLR_GEN_I: if (C_INCLUDE_INTR = 1) generate
-----------------
--------
signal bus2ip_rdce_intr_int : std_logic_vector(INTR_LO to INTR_HI);
signal bus2ip_wrce_intr_int : std_logic_vector(INTR_LO to INTR_HI);
signal dummy_bus2ip_rdce_intr : std_logic;
signal dummy_bus2ip_wrce_intr : std_logic;
signal dummy_intr_reg_rdack_d1: std_logic;
signal dummy_intr_reg_rdack : std_logic;
signal dummy_intr_reg_wrack_d1: std_logic;
signal dummy_intr_reg_wrack : std_logic;
--------
begin
--------
bus2ip_rdce_intr_int <= "0000000" &
bus2ip_rdce_intr(7 to 8) &
"0" &
bus2ip_rdce_intr(10) &
"00000";
bus2ip_wrce_intr_int <= "0000000" &
bus2ip_wrce_intr(7 to 8) &
"0" &
bus2ip_wrce_intr(10) &
"00000";
dummy_bus2ip_rdce_intr <= or_reduce(bus2ip_rdce_intr(0 to 6)) or
bus2ip_rdce_intr(9) or
or_reduce(bus2ip_rdce_intr(11 to 15));
dummy_bus2ip_wrce_intr <= or_reduce(bus2ip_wrce_intr(0 to 6)) or
bus2ip_wrce_intr(9) or
or_reduce(bus2ip_wrce_intr(11 to 15));
---------------------------------------------
DUMMY_INTR_RD_WR_ACK_GEN_PROCESS:process(Bus2IP_Clk) is
begin
if (bus2ip_clk'event and bus2ip_clk = '1') then
if (reset2ip_reset = RESET_ACTIVE) then
dummy_intr_reg_rdack_d1 <= '0';
dummy_intr_reg_rdack <= '0';
dummy_intr_reg_wrack_d1 <= '0';
dummy_intr_reg_wrack <= '0';
else
dummy_intr_reg_rdack_d1 <= dummy_bus2ip_rdce_intr;
dummy_intr_reg_rdack <= dummy_bus2ip_rdce_intr and
(not dummy_intr_reg_rdack_d1);
dummy_intr_reg_wrack_d1 <= dummy_bus2ip_wrce_intr;
dummy_intr_reg_wrack <= dummy_bus2ip_wrce_intr and
(not dummy_intr_reg_wrack_d1);
end if;
end if;
end process DUMMY_INTR_RD_WR_ACK_GEN_PROCESS;
---------------------------------------------
INTERRUPT_CONTROL_I: entity work.cpu_xadc_wiz_0_0_interrupt_control
generic map
(
C_NUM_CE => C_INTR_CE_NUM,
C_NUM_IPIF_IRPT_SRC => 1, -- Set to 1 to avoid null array
C_IP_INTR_MODE_ARRAY => IP_INTR_MODE_ARRAY,
-- Specifies device Priority Encoder function
C_INCLUDE_DEV_PENCODER => FALSE,
-- Specifies device ISC hierarchy
C_INCLUDE_DEV_ISC => FALSE,
C_IPIF_DWIDTH => C_S_AXI_DATA_WIDTH
)
port map
(
Bus2IP_Clk => Bus2IP_Clk,
Bus2IP_Reset => reset2ip_reset,
Bus2IP_Data => bus2ip_data,
Bus2IP_BE => bus2ip_be,
Interrupt_RdCE => bus2ip_rdce_intr_int,
Interrupt_WrCE => bus2ip_wrce_intr_int,
IPIF_Reg_Interrupts => "00", -- Tie off the unused reg intr's
IPIF_Lvl_Interrupts => "0", -- Tie off the dummy lvl intr
IP2Bus_IntrEvent => interrupt_status_i,
Intr2Bus_DevIntr => ip2intc_irpt,
Intr2Bus_DBus => intr_ip2bus_data,
Intr2Bus_WrAck => intr_ip2bus_wrack,
Intr2Bus_RdAck => intr_ip2bus_rdack,
Intr2Bus_Error => intr_ip2bus_error,
Intr2Bus_Retry => open,
Intr2Bus_ToutSup => open
);
ip2bus_wrack_int1 <= xadc_ip2bus_wrack or
rst_ip2bus_wrack or
intr_ip2bus_wrack or
dummy_intr_reg_wrack or
dummy_local_reg_wrack;
ip2bus_rdack_int1 <= xadc_ip2bus_rdack or
rst_ip2bus_rdack or
intr_ip2bus_rdack or
dummy_intr_reg_rdack or
dummy_local_reg_rdack;
ip2bus_error_int1 <= rst_ip2bus_error or
intr_ip2bus_error or
partial_reg_access_error;
ip2bus_data_int1 <= xadc_ip2bus_data or
intr_ip2bus_data;
process (Bus2IP_Clk)
begin
if (Bus2IP_Clk'event and Bus2IP_Clk = '1') then
if (reset2ip_reset = '1') then
ip2bus_wrack <= '0';
ip2bus_rdack <= '0';
ip2bus_error <= '0';
ip2bus_data_int <= (others => '0');
else
ip2bus_wrack <= ip2bus_wrack_int1;
ip2bus_rdack <= ip2bus_rdack_int1;
ip2bus_error <= ip2bus_error_int1;
ip2bus_data_int <= ip2bus_data_int1;
end if;
end if;
end process;
end generate INTR_CTRLR_GEN_I;
------------------------------
-------------------------------------------------------------------------------
-- NO_INTR_CTRLR_GEN_I: Generate logic to be used to pass signals,
----------------------- when interrupt is not used.
NO_INTR_CTRLR_GEN_I : if (C_INCLUDE_INTR = 0) generate
-----
begin
-----
ip2bus_wrack_int1 <= xadc_ip2bus_wrack or
rst_ip2bus_wrack or
dummy_local_reg_wrack;
ip2bus_rdack_int1 <= xadc_ip2bus_rdack or
rst_ip2bus_rdack or
dummy_local_reg_rdack;
ip2bus_error_int1 <= rst_ip2bus_error or
partial_reg_access_error;
ip2bus_data_int1 <= xadc_ip2bus_data;
ip2intc_irpt <= '0';
process (Bus2IP_Clk)
begin
if (Bus2IP_Clk'event and Bus2IP_Clk = '1') then
if (reset2ip_reset = '1') then
ip2bus_wrack <= '0';
ip2bus_rdack <= '0';
ip2bus_error <= '0';
ip2bus_data_int <= (others => '0');
else
ip2bus_wrack <= ip2bus_wrack_int1;
ip2bus_rdack <= ip2bus_rdack_int1;
ip2bus_error <= ip2bus_error_int1;
ip2bus_data_int <= ip2bus_data_int1;
end if;
end if;
end process;
end generate NO_INTR_CTRLR_GEN_I;
---------------------------------
-------------------------------------------------------------------------------
------------------------------------------------------------
-- SW_RESET_REG_READ_ACK_GEN_PROCESS:IMPLEMENT READ ACK LOGIC FOR SOFTWARE
-- RESET MODULE. This is dummy read as read is
-- not allowed on reset core.
------------------------------------------------------------
SW_RESET_REG_READ_ACK_GEN_PROCESS:process(Bus2IP_Clk) is
begin
if (bus2ip_clk'event and bus2ip_clk = '1') then
if (reset2ip_reset = RESET_ACTIVE) then
rst_ip2bus_rdack_d1 <= '0';
rst_ip2bus_rdack <= '0';
else
rst_ip2bus_rdack_d1 <= bus2ip_rdce_int(SWRESET);
rst_ip2bus_rdack <= bus2ip_rdce_int(SWRESET) and
(not rst_ip2bus_rdack_d1);
end if;
end if;
end process SW_RESET_REG_READ_ACK_GEN_PROCESS;
---------------------------------------------
-------------------------------------------------------------------------------
-- Logic for generation of error signal for partial word access byte enables
and_reduce_be <= and_reduce(bus2ip_be);
partial_reg_access_error <= (not and_reduce_be) and
(xadc_ip2bus_rdack or
xadc_ip2bus_wrack);
-------------------------------------------------------------------------------
--------------------------------------------------------------
---- SW_RESET_REG_READ_ACK_GEN_PROCESS:Implement read ack logic for dummy register
---- holes. This is dummy read as read/write is
---- not returning any value. In local registers.
--------------------------------------------------------------
DUMMY_REG_READ_WRITE_ACK_GEN_PROCESS:process(Bus2IP_Clk) is
begin
if (bus2ip_clk'event and bus2ip_clk = '1') then
if (reset2ip_reset = RESET_ACTIVE) then
dummy_local_reg_rdack_d1 <= '0';
dummy_local_reg_rdack <= '0';
dummy_local_reg_wrack_d1 <= '0';
dummy_local_reg_wrack <= '0';
else
dummy_local_reg_rdack_d1 <= or_reduce(bus2ip_rdce_int(5 to 7));
dummy_local_reg_rdack <= or_reduce(bus2ip_rdce_int(5 to 7)) and
(not dummy_local_reg_rdack_d1);
dummy_local_reg_wrack_d1 <= or_reduce(bus2ip_wrce_int(5 to 7));
dummy_local_reg_wrack <= or_reduce(bus2ip_wrce_int(5 to 7)) and
(not dummy_local_reg_wrack_d1);
end if;
end if;
end process DUMMY_REG_READ_WRITE_ACK_GEN_PROCESS;
-----------------------------------------------
end architecture imp;
|
gpl-3.0
|
peteut/nvc
|
test/regress/signal3.vhd
|
5
|
771
|
entity signal3 is
end entity;
architecture test of signal3 is
signal v : bit_vector(3 downto 0);
begin
proc1: process is
begin
assert not v'active;
assert not v'event;
wait for 1 ns;
v(2) <= '1';
wait for 0 ns;
assert v'event and v'active;
wait;
end process;
proc2: process is
begin
wait for 1 ns;
wait for 0 ns;
assert v'event and v'active;
wait for 1 ns;
v(0) <= '1';
assert not v'event;
wait for 0 ns;
assert v'event and v'active;
wait for 1 ns;
assert not v'event;
v(0) <= '1';
wait for 0 ns;
assert not v'event and v'active;
wait;
end process;
end architecture;
|
gpl-3.0
|
peteut/nvc
|
test/sem/issue239.vhd
|
4
|
857
|
entity issue239 is
end entity;
architecture test of issue239 is
shared variable sv : boolean := false;
constant cb : boolean := sv;
signal sb : boolean := sv; -- ok
begin
process
variable var : boolean := false;
variable var2 : boolean := var; -- ok
procedure proc(
constant b : in boolean := var -- error
) is
begin
report boolean'image(b) severity note;
end procedure;
procedure proc2 (
variable b : in boolean := var -- error
) is
begin
report boolean'image(b) severity note;
end procedure;
begin
proc;
var := true;
proc;
wait;
end process;
end architecture;
package package_issue239 is
constant deferred : integer;
procedure proc(a : integer := deferred); -- OK
end package;
|
gpl-3.0
|
peteut/nvc
|
test/sem/issue225.vhd
|
1
|
1189
|
package p1 is
constant c1 : integer := 1;
end package;
package p2 is
constant c2 : integer := 2;
end package;
package p3 is
constant c3 : integer := 3;
end package;
package p4 is
constant c4 : integer := 4;
end package;
package p5 is
constant c5 : integer := 5;
end package;
package p6 is
constant c6 : integer := 6;
end package;
entity issue225 is
use work.p1.all;
end entity issue225;
architecture test of issue225 is
use work.p2.all; -- doesn't work
begin
g1: if true generate
use work.p3.all; -- doesn't work
begin
b1: block
use work.p4.all; -- doesn't work
begin
p1: process
use work.p5.all; -- doesn't work
procedure doit is
use work.p6.all; -- doesn't work
variable x : integer;
begin
x := c1 + c2 + c3 + c4 + c5 + c6;
wait;
end procedure doit;
begin
doit;
end process p1;
end block b1;
end generate g1;
end architecture test;
|
gpl-3.0
|
dcsun88/ntpserver-fpga
|
cpu/ip/cpu_axi_iic_0_0/axi_iic_v2_0/hdl/src/vhdl/iic_control.vhd
|
2
|
89082
|
-------------------------------------------------------------------------------
-- iic_control.vhd - entity/architecture pair
-------------------------------------------------------------------------------
-- ***************************************************************************
-- ** DISCLAIMER OF LIABILITY **
-- ** **
-- ** This file contains proprietary and confidential information of **
-- ** Xilinx, Inc. ("Xilinx"), that is distributed under a license **
-- ** from Xilinx, and may be used, copied and/or disclosed only **
-- ** pursuant to the terms of a valid license agreement with Xilinx. **
-- ** **
-- ** XILINX is PROVIDING THIS DESIGN, CODE, OR INFORMATION **
-- ** ("MATERIALS") "AS is" WITHOUT WARRANTY OF ANY KIND, EITHER **
-- ** EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING WITHOUT **
-- ** LIMITATION, ANY WARRANTY WITH RESPECT to NONINFRINGEMENT, **
-- ** MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. Xilinx **
-- ** does not warrant that functions included in the Materials will **
-- ** meet the requirements of Licensee, or that the operation of the **
-- ** Materials will be uninterrupted or error-free, or that defects **
-- ** in the Materials will be corrected. Furthermore, Xilinx does **
-- ** not warrant or make any representations regarding use, or the **
-- ** results of the use, of the Materials in terms of correctness, **
-- ** accuracy, reliability or otherwise. **
-- ** **
-- ** Xilinx products are not designed or intended to be fail-safe, **
-- ** or for use in any application requiring fail-safe performance, **
-- ** such as life-support or safety devices or systems, Class III **
-- ** medical devices, nuclear facilities, applications related to **
-- ** the deployment of airbags, or any other applications that could **
-- ** lead to death, personal injury or severe property or **
-- ** environmental damage (individually and collectively, "critical **
-- ** applications"). Customer assumes the sole risk and liability **
-- ** of any use of Xilinx products in critical applications, **
-- ** subject only to applicable laws and regulations governing **
-- ** limitations on product liability. **
-- ** **
-- ** Copyright 2011 Xilinx, Inc. **
-- ** All rights reserved. **
-- ** **
-- ** This disclaimer and copyright notice must be retained as part **
-- ** of this file at all times. **
-- ***************************************************************************
-------------------------------------------------------------------------------
-- Filename: iic_control.vhd
-- Version: v1.01.b
-- Description:
-- This file contains the main state machines for the iic
-- bus interface logic
--
-- VHDL-Standard: VHDL'93
-------------------------------------------------------------------------------
-- Structure:
--
-- axi_iic.vhd
-- -- iic.vhd
-- -- axi_ipif_ssp1.vhd
-- -- axi_lite_ipif.vhd
-- -- interrupt_control.vhd
-- -- soft_reset.vhd
-- -- reg_interface.vhd
-- -- filter.vhd
-- -- debounce.vhd
-- -- iic_control.vhd
-- -- upcnt_n.vhd
-- -- shift8.vhd
-- -- dynamic_master.vhd
-- -- iic_pkg.vhd
--
-------------------------------------------------------------------------------
-- Author: USM
--
-- USM 10/15/09
-- ^^^^^^
-- - Initial release of v1.00.a
-- ~~~~~~
--
-- USM 09/06/10
-- ^^^^^^
-- - Release of v1.01.a
-- - Added function calc_tbuf to calculate the TBUF delay
-- ~~~~~~
--
-- NLR 01/07/11
-- ^^^^^^
-- - Fixed the CR#613282
-- - Release of v1.01.b
-- ~~~~~~
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
library axi_iic_v2_0;
use axi_iic_v2_0.iic_pkg.all;
use axi_iic_v2_0.upcnt_n;
use axi_iic_v2_0.shift8;
-------------------------------------------------------------------------------
-- Port Declaration
-------------------------------------------------------------------------------
-- Definition of Generics:
-- C_S_AXI_ACLK_FREQ_HZ-- Specifies AXI clock frequency
-- C_IIC_FREQ -- Maximum IIC frequency of Master Mode in Hz
-- C_TEN_BIT_ADR -- 10 bit slave addressing
--
-- Definition of Ports:
-- Sys_clk -- System clock
-- Reset -- System Reset
-- Sda_I -- IIC serial data input
-- Sda_O -- IIC serial data output
-- Sda_T -- IIC seral data output enable
-- Scl_I -- IIC serial clock input
-- Scl_O -- IIC serial clock output
-- Scl_T -- IIC serial clock output enable
-- Txak -- Value for acknowledge when xmit
-- Gc_en -- General purpose outputs
-- Ro_prev -- Receive over run prevent
-- Dtre -- Data transmit register empty
-- Msms -- Data transmit register empty
-- Msms_rst -- Msms Reset signal
-- Msms_set -- Msms set
-- Rsta -- Repeated start
-- Rsta_rst -- Repeated start Reset
-- Tx -- Master read/write
-- Dtr -- Data transmit register
-- Adr -- IIC slave address
-- Ten_adr -- IIC slave 10 bit address
-- Bb -- Bus busy indicator
-- Dtc -- Data transfer
-- Aas -- Addressed as slave indicator
-- Al -- Arbitration lost indicator
-- Srw -- Slave read/write indicator
-- Txer -- Received acknowledge indicator
-- Abgc -- Addressed by general call indicator
-- Data_i2c -- IIC data for processor
-- New_rcv_dta -- New Receive Data ready
-- Rdy_new_xmt -- New data loaded in shift reg indicator
-- Tx_under_prev -- DTR or Tx FIFO empty IRQ indicator
-- EarlyAckHdr -- ACK_HEADER state strobe signal
-- EarlyAckDataState -- Data ack early acknowledge signal
-- AckDataState -- Data ack acknowledge signal
-------------------------------------------------------------------------------
-- Entity section
-------------------------------------------------------------------------------
entity iic_control is
generic(
C_SCL_INERTIAL_DELAY : integer range 0 to 255 := 5;
C_S_AXI_ACLK_FREQ_HZ : integer := 100000000;
C_IIC_FREQ : integer := 100000;
C_SIZE : integer := 32;
C_TEN_BIT_ADR : integer := 0;
C_SDA_LEVEL : integer := 1;
C_SMBUS_PMBUS_HOST : integer := 0 -- SMBUS/PMBUS support
);
port(
-- System signals
Sys_clk : in std_logic;
Reset : in std_logic;
-- iic bus tristate driver control signals
Sda_I : in std_logic;
Sda_O : out std_logic;
Sda_T : out std_logic;
Scl_I : in std_logic;
Scl_O : out std_logic;
Scl_T : out std_logic;
Timing_param_tsusta : in std_logic_vector(C_SIZE-1 downto 0);
Timing_param_tsusto : in std_logic_vector(C_SIZE-1 downto 0);
Timing_param_thdsta : in std_logic_vector(C_SIZE-1 downto 0);
Timing_param_tsudat : in std_logic_vector(C_SIZE-1 downto 0);
Timing_param_tbuf : in std_logic_vector(C_SIZE-1 downto 0);
Timing_param_thigh : in std_logic_vector(C_SIZE-1 downto 0);
Timing_param_tlow : in std_logic_vector(C_SIZE-1 downto 0);
Timing_param_thddat : in std_logic_vector(C_SIZE-1 downto 0);
-- interface signals from uP
Txak : in std_logic;
Gc_en : in std_logic;
Ro_prev : in std_logic;
Dtre : in std_logic;
Msms : in std_logic;
Msms_rst : out std_logic;
Msms_set : in std_logic;
Rsta : in std_logic;
Rsta_rst : out std_logic;
Tx : in std_logic;
Dtr : in std_logic_vector(7 downto 0);
Adr : in std_logic_vector(7 downto 0);
Ten_adr : in std_logic_vector(7 downto 5);
Bb : out std_logic;
Dtc : out std_logic;
Aas : out std_logic;
Al : out std_logic;
Srw : out std_logic;
Txer : out std_logic;
Abgc : out std_logic;
Data_i2c : out std_logic_vector(7 downto 0);
New_rcv_dta : out std_logic;
Rdy_new_xmt : out std_logic;
Tx_under_prev : out std_logic;
EarlyAckHdr : out std_logic;
EarlyAckDataState : out std_logic;
AckDataState : out std_logic;
reg_empty :out std_logic
);
end iic_control;
-------------------------------------------------------------------------------
-- Architecture
-------------------------------------------------------------------------------
architecture RTL of iic_control is
attribute DowngradeIPIdentifiedWarnings: string;
attribute DowngradeIPIdentifiedWarnings of RTL : architecture is "yes";
constant CLR_REG : std_logic_vector(7 downto 0) := "00000000";
constant START_CNT : std_logic_vector(3 downto 0) := "0000";
constant CNT_DONE : std_logic_vector(3 downto 0) := "1000";
constant ZERO_CNT : std_logic_vector(C_SIZE-1 downto 0):= (others => '0');
constant ZERO : std_logic := '0';
constant ENABLE_N : std_logic := '0';
constant CNT_ALMOST_DONE : std_logic_vector (3 downto 0) := "0111";
type state_type is (IDLE,
HEADER,
ACK_HEADER,
RCV_DATA,
ACK_DATA,
XMIT_DATA,
WAIT_ACK);
signal state : state_type;
type scl_state_type is (SCL_IDLE,
START,
START_EDGE,
SCL_LOW_EDGE,
SCL_LOW,
SCL_HIGH_EDGE,
SCL_HIGH,
STOP_EDGE,
STOP_WAIT);
signal scl_state : scl_state_type;
signal next_scl_state : scl_state_type;
signal scl_rin : std_logic; -- sampled version of scl
signal scl_d1 : std_logic; -- sampled version of scl
signal scl_rin_d1 : std_logic; -- delayed version of Scl_rin
signal scl_cout : std_logic; -- combinatorial scl output
signal scl_cout_reg : std_logic; -- registered version of scl_cout
signal scl_rising_edge : std_logic; -- falling edge of SCL
signal scl_falling_edge : std_logic; -- falling edge of SCL
signal scl_f_edg_d1 : std_logic; -- falling edge of SCL delayed one
-- clock
signal scl_f_edg_d2 : std_logic; -- falling edge of SCL delayed two
-- clock
signal scl_f_edg_d3 : std_logic; -- falling edge of SCL delayed three
-- clock
signal sda_rin : std_logic; -- sampled version of sda
signal sda_d1 : std_logic; -- sampled version of sda
signal sda_rin_d1 : std_logic; -- delayed version of sda_rin
signal sda_falling : std_logic; -- Pulses when SDA falls
signal sda_rising : std_logic; -- Pulses when SDA rises
signal sda_changing : std_logic; -- Pulses when SDA changes
signal sda_setup : std_logic; -- SDA setup time in progress
signal sda_setup_cnt : std_logic_vector (C_SIZE-1 downto 0);
-- SDA setup time count
signal sda_cout : std_logic; -- combinatorial sda output
signal sda_cout_reg : std_logic; -- registered version of sda_cout
signal sda_cout_reg_d1 : std_logic; -- delayed sda output for arb
-- comparison
signal sda_sample : std_logic; -- SDA_RIN sampled at SCL rising edge
signal slave_sda : std_logic; -- sda value when slave
signal master_sda : std_logic; -- sda value when master
signal sda_oe : std_logic;
signal master_slave : std_logic; -- 1 if master, 0 if slave
-- Shift Register and the controls
signal shift_reg : std_logic_vector(7 downto 0); -- iic data shift reg
signal shift_out : std_logic;
signal shift_reg_en : std_logic;
signal shift_reg_ld : std_logic;
signal shift_reg_ld_d1 : std_logic;
signal i2c_header : std_logic_vector(7 downto 0);-- I2C header register
signal i2c_header_en : std_logic;
signal i2c_header_ld : std_logic;
signal i2c_shiftout : std_logic;
-- Used to check slave address detected
signal addr_match : std_logic;
signal arb_lost : std_logic; -- 1 if arbitration is lost
signal msms_d1 : std_logic; -- Msms processed to initiate a stop
-- sequence after data has been transmitted
signal msms_d2 : std_logic; -- delayed sample of msms_d1
signal msms_rst_i : std_logic; -- internal msms_rst
signal detect_start : std_logic; -- START condition has been detected
signal detect_stop : std_logic; -- STOP condition has been detected
signal sm_stop : std_logic; -- STOP condition needs to be generated
-- from state machine
signal bus_busy : std_logic; -- indicates that the bus is busy
-- set when START, cleared when STOP
signal bus_busy_d1 : std_logic; -- delayed sample of bus busy
signal gen_start : std_logic; -- uP wants to generate a START
signal gen_stop : std_logic; -- uP wants to generate a STOP
signal rep_start : std_logic; -- uP wants to generate a repeated START
signal stop_scl : std_logic; -- signal in SCL state machine
-- indicating a STOP
signal stop_scl_reg : std_logic; -- registered version of STOP_SCL
-- Bit counter 0 to 7
signal bit_cnt : std_logic_vector(3 downto 0);
signal bit_cnt_ld : std_logic;
signal bit_cnt_clr : std_logic;
signal bit_cnt_en : std_logic;
-- Clock Counter
signal clk_cnt : std_logic_vector (C_SIZE-1 downto 0);
signal clk_cnt_rst : std_logic;
signal clk_cnt_en : std_logic;
-- the following signals are only here because Viewlogic's VHDL compiler won't
-- allow a constant to be used in a component instantiation
signal reg_clr : std_logic_vector(7 downto 0);
signal zero_sig : std_logic;
signal cnt_zero : std_logic_vector(C_SIZE-1 downto 0);
signal cnt_start : std_logic_vector(3 downto 0);
signal data_i2c_i : std_logic_vector(7 downto 0);
signal aas_i : std_logic; -- internal addressed as slave
-- signal
signal srw_i : std_logic; -- internal slave read write signal
signal abgc_i : std_logic; -- internal addressed by a general
-- call
signal dtc_i : std_logic; -- internal data transmit compete
-- signal
signal dtc_i_d1 : std_logic; -- delayed internal data transmit
-- complete
signal dtc_i_d2 : std_logic; -- 2nd register delay of dtc
signal al_i : std_logic; -- internal arbitration lost signal
signal al_prevent : std_logic; -- prevent arbitration lost when
-- last word
signal rdy_new_xmt_i : std_logic; -- internal ready to transmit new
-- data
signal tx_under_prev_i : std_logic; -- TX underflow prevent signal
signal rsta_tx_under_prev : std_logic; -- Repeated Start Tx underflow
-- prevent
signal rsta_d1 : std_logic; -- Delayed one clock version of Rsta
signal dtre_d1 : std_logic; -- Delayed one clock version of Dtre
signal txer_i : std_logic; -- internal Txer signal
signal txer_edge : std_logic; -- Pulse for Txer IRQ
-- the following signal are used only when 10-bit addressing has been
-- selected
signal msb_wr : std_logic; -- the 1st byte of 10 bit addressing
-- comp
signal msb_wr_d : std_logic; -- delayed version of msb_wr
signal msb_wr_d1 : std_logic; -- delayed version of msb_wr_d
signal sec_addr : std_logic := '0'; -- 2nd byte qualifier
signal sec_adr_match : std_logic; -- 2nd byte compare
signal adr_dta_l : std_logic := '0'; -- prevents 2nd adr byte load
-- in DRR
signal new_rcv_dta_i : std_logic; -- internal New_rcv_dta
signal ro_prev_d1 : std_logic; -- delayed version of Ro_prev
signal gen_stop_and_scl_hi : std_logic; -- signal to prevent SCL state
-- machine from getting stuck during a No Ack
signal setup_cnt_rst : std_logic;
signal tx_under_prev_d1 : std_logic;
signal tx_under_prev_fe : std_logic;
signal rsta_re : std_logic;
signal gen_stop_d1 : std_logic;
signal gen_stop_re : std_logic;
----Mathew
signal shift_cnt : std_logic_vector(8 downto 0);
-- signal reg_empty : std_logic;
----------
begin
----------------------------------------------------------------------------
-- SCL Tristate driver controls for open-collector emulation
----------------------------------------------------------------------------
Scl_T <= '0' when scl_cout_reg = '0'
-- Receive fifo overflow throttle condition
or Ro_prev = '1'
-- SDA changing requires additional setup to SCL change
or (sda_setup = '1' )
-- Restart w/ transmit underflow prevention throttle
-- condition
or rsta_tx_under_prev = '1' else
'1';
Scl_O <= '0';
----------------------------------------------------------------------------
-- SDA Tristate driver controls for open-collector emulation
----------------------------------------------------------------------------
Sda_T <= '0' when ((master_slave = '1' and arb_lost = '0'
and sda_cout_reg = '0')
or (master_slave = '0' and slave_sda = '0')
or stop_scl_reg = '1') else
'1';
Sda_O <= '0';
-- the following signals are only here because Viewlogic's VHDL compiler
-- won't allow a constant to be used in a component instantiation
reg_clr <= CLR_REG;
zero_sig <= ZERO;
cnt_zero <= ZERO_CNT;
cnt_start <= START_CNT;
----------------------------------------------------------------------------
-- INT_DTRE_RSTA_DELAY_PROCESS
----------------------------------------------------------------------------
-- This process delays Dtre and RSTA by one clock to edge detect
-- Dtre = data transmit register empty
-- Rsta = firmware restart command
----------------------------------------------------------------------------
INT_DTRE_RSTA_DELAY_PROCESS : process (Sys_clk)
begin
if (Sys_clk'event and Sys_clk = '1') then
if Reset = ENABLE_N then
rsta_d1 <= '0';
dtre_d1 <= '0';
ro_prev_d1 <= '0';
gen_stop_d1 <= '0';
tx_under_prev_d1 <= '0';
else
rsta_d1 <= Rsta;
dtre_d1 <= Dtre;
ro_prev_d1 <= Ro_prev;
gen_stop_d1 <= gen_stop;
tx_under_prev_d1 <= tx_under_prev_i;
end if;
end if;
end process INT_DTRE_RSTA_DELAY_PROCESS;
tx_under_prev_fe <= tx_under_prev_d1 and not tx_under_prev_i;
rsta_re <= Rsta and not rsta_d1 ;
gen_stop_re <= gen_stop and not gen_stop_d1;
----------------------------------------------------------------------------
-- INT_RSTA_TX_UNDER_PREV_PROCESS
----------------------------------------------------------------------------
-- This process creates a signal that prevent SCL from going high when a
-- underflow condition would be caused, by a repeated start condition.
----------------------------------------------------------------------------
INT_RSTA_TX_UNDER_PREV_PROCESS : process (Sys_clk)
begin
if (Sys_clk'event and Sys_clk = '1') then
if Reset = ENABLE_N then
rsta_tx_under_prev <= '0';
elsif (Rsta = '1' and rsta_d1 = '0' and Dtre = '1' ) then
rsta_tx_under_prev <= '1';
elsif (Dtre = '0' and dtre_d1 = '1') then
rsta_tx_under_prev <= '0';
else
rsta_tx_under_prev <= rsta_tx_under_prev;
end if;
end if;
end process INT_RSTA_TX_UNDER_PREV_PROCESS;
----------------------------------------------------------------------------
-- INT_TX_UNDER_PREV_PROCESS
----------------------------------------------------------------------------
-- This process creates a signal that prevent SCL from going high when a
-- underflow condition would be caused. Transmit underflow can occur in both
-- master and slave situations
----------------------------------------------------------------------------
INT_TX_UNDER_PREV_PROCESS : process (Sys_clk)
begin
if (Sys_clk'event and Sys_clk = '1') then
if Reset = ENABLE_N then
tx_under_prev_i <= '0';
elsif (Dtre = '1' and (state = WAIT_ACK or state = ACK_HEADER)
and scl_falling_edge = '1' and gen_stop = '0'
and ((aas_i = '0' and srw_i = '0')
or (aas_i = '1' and srw_i = '1'))) then
tx_under_prev_i <= '1';
elsif (state = RCV_DATA or state = IDLE or Dtre='0') then
tx_under_prev_i <= '0';
end if;
end if;
end process INT_TX_UNDER_PREV_PROCESS;
Tx_under_prev <= tx_under_prev_i;
----------------------------------------------------------------------------
-- SDASETUP
----------------------------------------------------------------------------
-- Whenever SDA changes there is an associated setup time that must be
-- obeyed before SCL can change. (The exceptions are starts/stops which
-- haven't other timing specifications.) It doesn't matter whether this is
-- a Slave | Master, TX | RX. The "setup" counter and the "sdasetup" process
-- guarantee this time is met regardless of the devices on the bus and their
-- attempts to manage setup time. The signal sda_setup, when asserted,
-- causes SCL to be held low until the setup condition is removed. Anytime a
-- change in SDA is detected on the bus the setup process is invoked. Also,
-- sda_setup is asserted if the transmit throttle condition is active.
-- When it deactivates, SDA **may** change on the SDA bus. In this way,
-- the SCL_STATE machine will be held off as well because it waits for SCL
-- to actually go high.
----------------------------------------------------------------------------
SETUP_CNT : entity axi_iic_v2_0.upcnt_n
generic map (
C_SIZE => C_SIZE
)
port map(
Clk => Sys_clk,
Clr => Reset,
Data => cnt_zero,
Cnt_en => sda_setup,
Load => sda_changing,
Qout => sda_setup_cnt
);
----------------------------------------------------------------------------
-- SDASETUP Process
----------------------------------------------------------------------------
SDASETUP : process (Sys_clk)
begin
if (Sys_clk'event and Sys_clk = '1') then
if Reset = ENABLE_N then
sda_setup <= '0';
elsif (
-- If SDA is changing on the bus then enforce setup time
sda_changing = '1'
-- or if SDA is about to change ...
or tx_under_prev_i = '1') -- modified
-- For either of the above cases the controller only cares
-- about SDA setup when it is legal to change SDA.
and scl_rin='0' then
sda_setup <= '1';
elsif (sda_setup_cnt=Timing_param_tsudat) then
sda_setup <= '0';
end if;
end if;
end process SDASETUP;
----------------------------------------------------------------------------
-- Arbitration Process
-- This process checks the master's outgoing SDA with the incoming SDA to
-- determine if control of the bus has been lost. SDA is checked only when
-- SCL is high and during the states HEADER and XMIT_DATA (when data is
-- actively being clocked out of the controller). When arbitration is lost,
-- a Reset is generated for the Msms bit per the product spec.
-- Note that when arbitration is lost, the mode is switched to slave.
-- arb_lost stays set until scl state machine goes to IDLE state
----------------------------------------------------------------------------
ARBITRATION : process (Sys_clk)
begin
if (Sys_clk'event and Sys_clk = '1') then
if Reset = ENABLE_N then
arb_lost <= '0';
msms_rst_i <= '0';
elsif scl_state = SCL_IDLE or scl_state = STOP_WAIT then
arb_lost <= '0';
msms_rst_i <= '0';
elsif (master_slave = '1') then
-- Actively generating SCL clock as the master and (possibly)
-- participating in multi-master arbitration.
if (scl_rising_edge='1'
and (state = HEADER or state = XMIT_DATA)) then
if (sda_cout_reg='1' and sda_rin = '0') then
-- Other master drove SDA to 0 but the controller is trying
-- to drive a 1. That is the exact case for loss of
-- arbitration
arb_lost <= '1';
msms_rst_i <= '1';
else
arb_lost <= '0';
msms_rst_i <= '0';
end if;
else
msms_rst_i <= '0';
end if;
end if;
end if;
end process ARBITRATION;
Msms_rst <= msms_rst_i
-- The spec states that the Msms bit should be cleared when an
-- address is not-acknowledged. The sm_stop indicates that
-- a not-acknowledge occured on either a data or address
-- (header) transfer. This fixes CR439859.
or sm_stop;
----------------------------------------------------------------------------
-- SCL_GENERATOR_COMB Process
-- This process generates SCL and SDA when in Master mode. It generates the
-- START and STOP conditions. If arbitration is lost, SCL will not be
-- generated until the end of the byte transfer.
----------------------------------------------------------------------------
SCL_GENERATOR_COMB : process (
scl_state,
arb_lost,
sm_stop,
gen_stop,
rep_start,
bus_busy,
gen_start,
master_slave,
stop_scl_reg,
clk_cnt,
scl_rin,
sda_rin,
state,
sda_cout_reg,
master_sda,
Timing_param_tsusta,
Timing_param_tsusto,
Timing_param_thdsta,
Timing_param_thddat,
Timing_param_tbuf,
Timing_param_tlow,
Timing_param_thigh
)
begin
-- state machine defaults
scl_cout <= '1';
sda_cout <= sda_cout_reg;
stop_scl <= stop_scl_reg;
clk_cnt_en <= '0';
clk_cnt_rst <= '1';
next_scl_state <= scl_state;
Rsta_rst <= (ENABLE_N);
case scl_state is
when SCL_IDLE =>
sda_cout <= '1';
stop_scl <= '0';
-- leave IDLE state when master, bus is idle, and gen_start
if master_slave = '1' and bus_busy = '0' and gen_start = '1' then
next_scl_state <= START;
else
next_scl_state <= SCL_IDLE;
end if;
when START =>
-- generate start condition
clk_cnt_en <= '0';
clk_cnt_rst <= '1';
sda_cout <= '0';
stop_scl <= '0';
if sda_rin='0' then
next_scl_state <= START_EDGE;
else
next_scl_state <= START;
end if;
when START_EDGE =>
-- This state ensures that the hold time for the (repeated) start
-- condition is met. The hold time is measured from the Vih level
-- of SDA so it is critical for SDA to be sampled low prior to
-- starting the hold time counter.
clk_cnt_en <= '1';
clk_cnt_rst <= '0';
-- generate Reset for repeat start bit if repeat start condition
if rep_start = '1' then
Rsta_rst <= not(ENABLE_N);
end if;
if clk_cnt = Timing_param_thdsta then
next_scl_state <= SCL_LOW_EDGE;
else
next_scl_state <= START_EDGE;
end if;
when SCL_LOW_EDGE =>
clk_cnt_rst <= '1';
scl_cout <= '0';
stop_scl <= '0';
if (scl_rin='0') then
clk_cnt_en <= '1';
clk_cnt_rst <= '0';
end if;
if ((scl_rin = '0') and (clk_cnt = Timing_param_thddat)) then
-- SCL sampled to be 0 so everything on the bus can see that it
-- is low too. The very large propagation delays caused by
-- potentially large (~300ns or more) fall time should not be
-- ignored by the controller.It must VERIFY that the bus is low.
next_scl_state <= SCL_LOW;
clk_cnt_en <= '0';
clk_cnt_rst <= '1';
else
next_scl_state <= SCL_LOW_EDGE;
end if;
when SCL_LOW =>
clk_cnt_en <= '1';
clk_cnt_rst <= '0';
scl_cout <= '0';
stop_scl <= '0';
-- SDA (the data) can only be changed when SCL is low. Note that
-- STOPS and RESTARTS could appear after the SCL low period
-- has expired because the controller is throttled.
if (sm_stop = '1' or gen_stop = '1')
and state /= ACK_DATA
and state /= ACK_HEADER
and state /= WAIT_ACK then
stop_scl <= '1';
-- Pull SDA low in anticipation of raising it to generate the
-- STOP edge
sda_cout <= '0';
elsif rep_start = '1' then
-- Release SDA in anticipation of dropping it to generate the
-- START edge
sda_cout <= '1';
else
sda_cout <= master_sda;
end if;
-- Wait until minimum low clock period requirement is met then
-- proceed to release the SCL_COUT so that it is "possible" for the
-- scl clock to go high on the bus. Note that a SLAVE device can
-- continue to hold SCL low to throttle the bus OR the master
-- itself may hold SCL low because of an internal throttle
-- condition.
if clk_cnt = Timing_param_tlow then
next_scl_state <= SCL_HIGH_EDGE;
else
next_scl_state <= SCL_LOW;
end if;
when SCL_HIGH_EDGE =>
clk_cnt_rst <= '1';
stop_scl <= '0';
-- SCL low time met. Try to release SCL to make it go high.
scl_cout <= '1';
-- SDA (the data) can only be changed when SCL is low. In this
-- state the fsm wants to change SCL to high and is waiting to see
-- it go high. However, other processes may be inhibiting SCL from
-- going high because the controller is throttled. While throttled,
-- and scl is still low:
-- (1) a STOP may be requested by the firmware, **OR**
-- (2) a RESTART may be requested (with or without data available)
-- by the firmware, **OR**
-- (3) new data may get loaded into the TX_FIFO and the first bit
-- is available to be loaded onto the SDA pin
-- Removed this condition as sda_cout should not go low when
-- SCL goes high. SDA should be changed in SCL_LOW state.
if (sm_stop = '1' or gen_stop = '1')
and state /= ACK_DATA
and state /= ACK_HEADER
and state /= WAIT_ACK then
stop_scl <= '1';
-- -- Pull SDA low in anticipation of raising it to generate the
-- -- STOP edge
sda_cout <= '0';
elsif rep_start = '1' then
--if stop_scl_reg = '1' then
-- stop_scl <= '1';
-- sda_cout <= '0';
--elsif rep_start = '1' then
-- Release SDA in anticipation of dropping it to generate the
-- START edge
sda_cout <= '1';
else
sda_cout <= master_sda;
end if;
-- Nothing in the controller should
-- a) sample SDA_RIN until the controller actually verifies that
-- SCL has gone high, and
-- b) change SDA_COUT given that it is trying to change SCL now.
-- Note that other processes may inhibit SCL from going high to
-- wait for the transmit data register to be filled with data. In
-- that case data setup requirements imposed by the I2C spec must
-- be satisfied. Regardless, the SCL clock generator can wait here
-- in SCL_HIGH_EDGE until that is accomplished.
if (scl_rin='1') then
next_scl_state <= SCL_HIGH;
else
next_scl_state <= SCL_HIGH_EDGE;
end if;
when SCL_HIGH =>
-- SCL is now high (released) on the external bus. At this point
-- the state machine doesn't have to worry about any throttle
-- conditions -- by definition they are removed as SCL is no longer
-- low. The firmware **must** signal the desire to STOP or Repeat
-- Start when throttled.
-- It is decision time. Should another SCL clock pulse get
-- generated? (IE a low period + high period?) The answer depends
-- on whether the previous clock was a DATA XFER clock or an ACK
-- CLOCK. Should a Repeated Start be generated? Should a STOP be
-- generated?
clk_cnt_en <= '1';
clk_cnt_rst <= '0';
scl_cout <= '1';
if (arb_lost='1') then
-- No point in continuing! The other master will generate the
-- clock.
next_scl_state <= SCL_IDLE;
else
-- Determine HIGH time based on need to generate a repeated
-- start, a stop or the full high period of the SCL clock.
-- (Without some analysis it isn't clear if rep_start and
-- stop_scl_reg are mutually exclusive. Hence the priority
-- encoder.)
if rep_start = '1' then
if (clk_cnt=Timing_param_tsusta) then
-- The hidden assumption here is that SDA has been released
-- by the slave|master receiver after the ACK clock so that
-- a repeated start is possible
next_scl_state <= START;
clk_cnt_en <= '0';
clk_cnt_rst <= '1';
end if;
elsif stop_scl_reg = '1' then
if (clk_cnt=Timing_param_tsusto) then
-- The hidden assumption here is that SDA has been pulled
-- low by the master after the ACK clock so that a
-- stop is possible
next_scl_state <= STOP_EDGE;
clk_cnt_rst <= '1';
clk_cnt_en <= '0';
sda_cout <= '1'; -- issue the stop
stop_scl <= '0';
end if;
else
-- Neither repeated start nor stop requested
if clk_cnt= Timing_param_thigh then
next_scl_state <= SCL_LOW_EDGE;
clk_cnt_rst <= '1';
clk_cnt_en <= '0';
end if;
end if;
end if;
when STOP_EDGE =>
if (sda_rin='1') then
next_scl_state <= STOP_WAIT;
else
next_scl_state <= STOP_EDGE;
end if;
when STOP_WAIT =>
-- The Stop setup time was satisfied and SDA was sampled high
-- indicating the stop occured. Now wait the TBUF time required
-- between a stop and the next start.
clk_cnt_en <= '1';
clk_cnt_rst <= '0';
stop_scl <= '0';
if clk_cnt = Timing_param_tbuf then
next_scl_state <= SCL_IDLE;
else
next_scl_state <= STOP_WAIT;
end if;
-- coverage off
when others =>
next_scl_state <= SCL_IDLE;
-- coverage on
end case;
end process SCL_GENERATOR_COMB;
----------------------------------------------------------------------------
--PROCESS : SCL_GENERATOR_REGS
----------------------------------------------------------------------------
SCL_GENERATOR_REGS : process (Sys_clk)
begin
if Sys_clk'event and Sys_clk = '1' then
if Reset = ENABLE_N then
scl_state <= SCL_IDLE;
sda_cout_reg <= '1';
scl_cout_reg <= '1';
stop_scl_reg <= '0';
else
scl_state <= next_scl_state;
sda_cout_reg <= sda_cout;
-- Ro_prev = receive overflow prevent = case where controller must
-- hold SCL low itself until receive fifo is emptied by the firmware
scl_cout_reg <= scl_cout and not Ro_prev;
stop_scl_reg <= stop_scl;
end if;
end if;
end process SCL_GENERATOR_REGS;
----------------------------------------------------------------------------
-- Clock Counter Implementation
-- The following code implements the counter that divides the sys_clock for
-- creation of SCL. Control lines for this counter are set in SCL state
-- machine
----------------------------------------------------------------------------
CLKCNT : entity axi_iic_v2_0.upcnt_n
generic map (
C_SIZE => C_SIZE
)
port map(
Clk => Sys_clk,
Clr => Reset,
Data => cnt_zero,
Cnt_en => clk_cnt_en,
Load => clk_cnt_rst,
Qout => clk_cnt
);
----------------------------------------------------------------------------
-- Input Registers Process
-- This process samples the incoming SDA and SCL with the system clock
----------------------------------------------------------------------------
sda_rin <= Sda_I;
scl_rin <= Scl_I;
INPUT_REGS : process(Sys_clk)
begin
if Sys_clk'event and Sys_clk = '1' then
sda_rin_d1 <= sda_rin; -- delay sda_rin to find edges
scl_rin_d1 <= scl_rin; -- delay Scl_rin to find edges
sda_cout_reg_d1 <= sda_cout_reg;
end if;
end process INPUT_REGS;
----------------------------------------------------------------------------
-- Master Slave Mode Select Process
-- This process allows software to write the value of Msms with each data
-- word to be transmitted. So writing a '0' to Msms will initiate a stop
-- sequence on the I2C bus after the that byte in the DTR has been sent.
----------------------------------------------------------------------------
MSMS_PROCESS : process(Sys_clk)
begin
if Sys_clk'event and Sys_clk = '1' then
if Reset = ENABLE_N then
msms_d1 <= '0';
msms_d2 <= '0';
else
msms_d1 <= (Msms and not msms_rst_i)
or ((msms_d1 and not (dtc_i_d1 and not dtc_i_d2) and
not msms_rst_i)
and not Msms_set and not txer_i) ;
msms_d2 <= msms_d1;
end if;
end if;
end process MSMS_PROCESS;
----------------------------------------------------------------------------
-- START/STOP Detect Process
-- This process detects the start condition by finding the falling edge of
-- sda_rin and checking that SCL is high. It detects the stop condition on
-- the bus by finding a rising edge of SDA when SCL is high.
----------------------------------------------------------------------------
sda_falling <= sda_rin_d1 and not sda_rin;
sda_rising <= not sda_rin_d1 and sda_rin;
sda_changing <= sda_falling or sda_rising or tx_under_prev_fe
or rsta_re or gen_stop_re;
----------------------------------------------------------------------------
-- START Detect Process
----------------------------------------------------------------------------
START_DET_PROCESS : process(Sys_clk)
begin
if Sys_clk'event and Sys_clk = '1' then
if Reset = ENABLE_N or state = HEADER then
detect_start <= '0';
elsif sda_falling = '1' then
if scl_rin = '1' then
detect_start <= '1';
else
detect_start <= '0';
end if;
end if;
end if;
end process START_DET_PROCESS;
----------------------------------------------------------------------------
-- STOP Detect Process
----------------------------------------------------------------------------
STOP_DET_PROCESS : process(Sys_clk)
begin
if Sys_clk'event and Sys_clk = '1' then
if Reset = ENABLE_N or detect_start = '1' then
detect_stop <= '0';
elsif sda_rising = '1' then
if scl_rin = '1' then
detect_stop <= '1';
else
detect_stop <= '0';
end if;
elsif msms_d2 = '0' and msms_d1 = '1' then
-- rising edge of Msms - generate start condition
detect_stop <= '0'; -- clear on a generate start condition
end if;
end if;
end process STOP_DET_PROCESS;
----------------------------------------------------------------------------
-- Bus Busy Process
-- This process sets bus_busy as soon as START is detected which would
-- always set arb lost (Al).
----------------------------------------------------------------------------
SET_BUS_BUSY_PROCESS : process(Sys_clk)
begin
if Sys_clk'event and Sys_clk = '1' then
if Reset = ENABLE_N then
bus_busy <= '0';
else
if detect_stop = '1' then
bus_busy <= '0';
elsif detect_start = '1' then
bus_busy <= '1';
end if;
end if;
end if;
end process SET_BUS_BUSY_PROCESS;
----------------------------------------------------------------------------
-- BUS_BUSY_REG_PROCESS:
-- This process describes a delayed version of the bus busy bit which is
-- used to determine arb lost (Al).
----------------------------------------------------------------------------
BUS_BUSY_REG_PROCESS : process(Sys_clk)
begin
if Sys_clk'event and Sys_clk = '1' then
if Reset = ENABLE_N then
bus_busy_d1 <= '0';
else
bus_busy_d1 <= bus_busy;
end if;
end if;
end process BUS_BUSY_REG_PROCESS;
----------------------------------------------------------------------------
-- GEN_START_PROCESS
-- This process detects the rising and falling edges of Msms and sets
-- signals to control generation of start condition
----------------------------------------------------------------------------
GEN_START_PROCESS : process (Sys_clk)
begin
if Sys_clk'event and Sys_clk = '1' then
if Reset = ENABLE_N then
gen_start <= '0';
else
if msms_d2 = '0' and msms_d1 = '1' then
-- rising edge of Msms - generate start condition
gen_start <= '1';
elsif detect_start = '1' then
gen_start <= '0';
end if;
end if;
end if;
end process GEN_START_PROCESS;
----------------------------------------------------------------------------
-- GEN_STOP_PROCESS
-- This process detects the rising and falling edges of Msms and sets
-- signals to control generation of stop condition
----------------------------------------------------------------------------
GEN_STOP_PROCESS : process (Sys_clk)
begin
if Sys_clk'event and Sys_clk = '1' then
if Reset = ENABLE_N then
gen_stop <= '0';
else
if arb_lost = '0' and msms_d2 = '1' and msms_d1 = '0' then
-- falling edge of Msms - generate stop condition only
-- if arbitration has not been lost
gen_stop <= '1';
elsif detect_stop = '1' then
gen_stop <= '0';
end if;
end if;
end if;
end process GEN_STOP_PROCESS;
----------------------------------------------------------------------------
-- GEN_MASTRE_SLAVE_PROCESS
-- This process sets the master slave bit based on Msms if and only if
-- it is not in the middle of a cycle, i.e. bus_busy = '0'
----------------------------------------------------------------------------
GEN_MASTRE_SLAVE_PROCESS : process (Sys_clk)
begin
if Sys_clk'event and Sys_clk = '1' then
if Reset = ENABLE_N then
master_slave <= '0';
else
if bus_busy = '0' then
master_slave <= msms_d1;
elsif arb_lost = '1' then
master_slave <= '0';
else
master_slave <= master_slave;
end if;
end if;
end if;
end process GEN_MASTRE_SLAVE_PROCESS;
rep_start <= Rsta; -- repeat start signal is Rsta control bit
----------------------------------------------------------------------------
-- GEN_STOP_AND_SCL_HIGH
----------------------------------------------------------------------------
-- This process does not go high until both gen_stop and SCL have gone high
-- This is used to prevent the SCL state machine from getting stuck when a
-- slave no acks during the last data byte being transmitted
----------------------------------------------------------------------------
GEN_STOP_AND_SCL_HIGH : process (Sys_clk)
begin
if Sys_clk'event and Sys_clk = '1' then
if Reset = ENABLE_N then
gen_stop_and_scl_hi <= '0';
elsif gen_stop = '0' then
gen_stop_and_scl_hi <= '0'; --clear
elsif gen_stop = '1' and scl_rin = '1' then
gen_stop_and_scl_hi <= '1';
else
gen_stop_and_scl_hi <= gen_stop_and_scl_hi; --hold condition
end if;
end if;
end process GEN_STOP_AND_SCL_HIGH;
----------------------------------------------------------------------------
-- SCL_EDGE_PROCESS
----------------------------------------------------------------------------
-- This process generates a 1 Sys_clk wide pulse for both the rising edge
-- and the falling edge of SCL_RIN
----------------------------------------------------------------------------
SCL_EDGE_PROCESS : process (Sys_clk)
begin
if Sys_clk'event and Sys_clk = '1' then
if Reset = ENABLE_N then
scl_falling_edge <= '0';
scl_rising_edge <= '0';
scl_f_edg_d1 <= '0';
scl_f_edg_d2 <= '0';
scl_f_edg_d3 <= '0';
else
scl_falling_edge <= scl_rin_d1 and (not scl_rin); -- 1 to 0
scl_rising_edge <= (not scl_rin_d1) and scl_rin; -- 0 to 1
scl_f_edg_d1 <= scl_falling_edge;
scl_f_edg_d2 <= scl_f_edg_d1;
scl_f_edg_d3 <= scl_f_edg_d2;
end if;
end if;
end process SCL_EDGE_PROCESS;
----------------------------------------------------------------------------
-- EARLY_ACK_HDR_PROCESS
----------------------------------------------------------------------------
-- This process generates 1 Sys_clk wide pulses when the statemachine enters
-- the ACK_HEADER state
----------------------------------------------------------------------------
EARLY_ACK_HDR_PROCESS : process (Sys_clk)
begin
if Sys_clk'event and Sys_clk = '1' then
if Reset = ENABLE_N then
EarlyAckHdr <= '0';
elsif (scl_f_edg_d3 = '1' and state = ACK_HEADER) then
EarlyAckHdr <= '1';
else
EarlyAckHdr <= '0';
end if;
end if;
end process EARLY_ACK_HDR_PROCESS;
----------------------------------------------------------------------------
-- ACK_DATA_PROCESS
----------------------------------------------------------------------------
-- This process generates 1 Sys_clk wide pulses when the statemachine enters
-- ACK_DATA state
----------------------------------------------------------------------------
ACK_DATA_PROCESS : process (Sys_clk)
begin
if Sys_clk'event and Sys_clk = '1' then
if Reset = ENABLE_N then
AckDataState <= '0';
elsif (state = ACK_DATA) then
AckDataState <= '1';
else
AckDataState <= '0';
end if;
end if;
end process ACK_DATA_PROCESS;
----------------------------------------------------------------------------
-- EARLY_ACK_DATA_PROCESS
----------------------------------------------------------------------------
-- This process generates 1 Sys_clk wide pulses when the statemachine enters
-- the ACK_DATA ot RCV_DATA state state
----------------------------------------------------------------------------
EARLY_ACK_DATA_PROCESS : process (Sys_clk)
begin
if Sys_clk'event and Sys_clk = '1' then
if Reset = ENABLE_N then
EarlyAckDataState <= '0';
elsif (state = ACK_DATA or (state = RCV_DATA and
(bit_cnt = CNT_ALMOST_DONE or bit_cnt = CNT_DONE))) then
EarlyAckDataState <= '1';
else
EarlyAckDataState <= '0';
end if;
end if;
end process EARLY_ACK_DATA_PROCESS;
----------------------------------------------------------------------------
-- uP Status Register Bits Processes
-- Dtc - data transfer complete. Since this only checks whether the
-- bit_cnt="0111" it will be true for both data and address transfers.
-- While one byte of data is being transferred, this bit is cleared.
-- It is set by the falling edge of the 9th clock of a byte transfer and
-- is not cleared at Reset
----------------------------------------------------------------------------
DTC_I_BIT : process(Sys_clk)
begin
if Sys_clk'event and Sys_clk = '1' then
if Reset = ENABLE_N then
dtc_i <= '0';
elsif scl_falling_edge = '1' then
if bit_cnt = "0111" then
dtc_i <= '1';
else
dtc_i <= '0';
end if;
end if;
end if;
end process DTC_I_BIT;
Dtc <= dtc_i;
----------------------------------------------------------------------------
-- DTC_DELAY_PROCESS
----------------------------------------------------------------------------
DTC_DELAY_PROCESS : process (Sys_clk)
begin
if Sys_clk'event and Sys_clk = '1' then
if Reset = ENABLE_N then
dtc_i_d1 <= '0';
dtc_i_d2 <= '0';
else
dtc_i_d1 <= dtc_i;
dtc_i_d2 <= dtc_i_d1;
end if;
end if;
end process DTC_DELAY_PROCESS;
----------------------------------------------------------------------------
-- aas_i - Addressed As Slave Bit
----------------------------------------------------------------------------
-- When its own specific address (adr) matches the I2C Address, this bit is
-- set.
-- Then the CPU needs to check the Srw bit and this bit when a
-- TX-RX mode accordingly.
----------------------------------------------------------------------------
AAS_I_BIT : process(Sys_clk)
begin
if Sys_clk'event and Sys_clk = '1' then
if Reset = ENABLE_N then
aas_i <= '0';
elsif detect_stop = '1' or addr_match = '0' then
aas_i <= '0';
elsif state = ACK_HEADER then
aas_i <= addr_match;
-- the signal address match compares adr with I2_ADDR
else
aas_i <= aas_i;
end if;
end if;
end process AAS_I_BIT;
----------------------------------------------------------------------------
-- INT_AAS_PROCESS
----------------------------------------------------------------------------
-- This process assigns the internal aas_i signal to the output port Aas
----------------------------------------------------------------------------
INT_AAS_PROCESS : process (aas_i, sec_adr_match)
begin -- process
Aas <= aas_i and sec_adr_match;
end process INT_AAS_PROCESS;
----------------------------------------------------------------------------
-- Bb - Bus Busy Bit
----------------------------------------------------------------------------
-- This bit indicates the status of the bus. This bit is set when a START
-- signal is detected and cleared when a stop signal is detected. It is
-- also cleared on Reset. This bit is identical to the signal bus_busy set
-- in the process set_bus_busy.
----------------------------------------------------------------------------
Bb <= bus_busy;
----------------------------------------------------------------------------
-- Al - Arbitration Lost Bit
----------------------------------------------------------------------------
-- This bit is set when the arbitration procedure is lost.
-- Arbitration is lost when:
-- 1. SDA is sampled low when the master drives high during addr or data
-- transmit cycle
-- 2. SDA is sampled low when the master drives high during the
-- acknowledge bit of a data receive cycle
-- 3. A start cycle is attempted when the bus is busy
-- 4. A repeated start is requested in slave mode
-- 5. A stop condition is detected that the master did not request it.
-- This bit is cleared upon Reset and when the software writes a '0' to it
-- Conditions 1 & 2 above simply result in sda_rin not matching sda_cout
-- while SCL is high. This design will not generate a START condition while
-- the bus is busy. When a START is detected, this hardware will set the bus
-- busy bit and gen_start stays set until detect_start asserts, therefore
-- will have to compare with a delayed version of bus_busy. Condition 3 is
-- really just a check on the uP software control registers as is condition
-- 4. Condition 5 is also taken care of by the fact that sda_rin does not
-- equal sda_cout, however, this process also tests for if a stop condition
-- has been detected when this master did not generate it
----------------------------------------------------------------------------
AL_I_BIT : process(Sys_clk)
begin
if Sys_clk'event and Sys_clk = '1' then
if Reset = ENABLE_N then
al_i <= '0';
elsif master_slave = '1' then
if (arb_lost = '1') or
(bus_busy_d1 = '1' and gen_start = '1') or
(detect_stop = '1' and al_prevent = '0' and sm_stop = '0') then
al_i <= '1';
else
al_i <= '0'; -- generate a pulse on al_i, arb lost interrupt
end if;
elsif Rsta = '1' then
-- repeated start requested while slave
al_i <= '1';
else
al_i <= '0';
end if;
end if;
end process AL_I_BIT;
----------------------------------------------------------------------------
-- INT_ARB_LOST_PROCESS
----------------------------------------------------------------------------
-- This process assigns the internal al_i signal to the output port Al
----------------------------------------------------------------------------
INT_ARB_LOST_PROCESS : process (al_i)
begin -- process
Al <= al_i;
end process INT_ARB_LOST_PROCESS;
----------------------------------------------------------------------------
-- PREVENT_ARB_LOST_PROCESS
----------------------------------------------------------------------------
-- This process prevents arb lost (al_i) when a stop has been initiated by
-- this device operating as a master.
----------------------------------------------------------------------------
PREVENT_ARB_LOST_PROCESS : process (Sys_clk)
begin -- make an SR flip flop that sets on gen_stop and resets on
-- detect_start
if Sys_clk'event and Sys_clk = '1' then
if Reset = ENABLE_N then
al_prevent <= '0';
elsif (gen_stop = '1' and detect_start = '0')
or (sm_stop = '1' and detect_start = '0')then
al_prevent <= '1';
elsif detect_start = '1' then
al_prevent <= '0';
else
al_prevent <= al_prevent;
end if;
end if;
end process PREVENT_ARB_LOST_PROCESS;
----------------------------------------------------------------------------
-- srw_i - Slave Read/Write Bit
----------------------------------------------------------------------------
-- When aas_i is set, srw_i indicates the value of the R/W command bit of
-- the calling address sent from the master. This bit is only valid when a
-- complete transfer has occurred and no other transfers have been
-- initiated. The CPU uses this bit to set the slave transmit/receive mode.
-- This bit is Reset by Reset
----------------------------------------------------------------------------
SRW_I_BIT : process(Sys_clk)
begin
if Sys_clk'event and Sys_clk = '1' then
if Reset = ENABLE_N then
srw_i <= '0';
elsif state = ACK_HEADER then
srw_i <= i2c_header(0);
else
srw_i <= srw_i;
end if;
end if;
end process SRW_I_BIT;
Srw <= srw_i;
----------------------------------------------------------------------------
-- TXER_BIT process
----------------------------------------------------------------------------
-- This process determines the state of the acknowledge bit which may be
-- used as a transmit error or by a master receiver to indicate to the
-- slave that the last byte has been transmitted
----------------------------------------------------------------------------
TXER_BIT : process(Sys_clk)
begin
if Sys_clk'event and Sys_clk = '1' then
if Reset = ENABLE_N then
txer_i <= '0';
elsif scl_falling_edge = '1' then
if state = ACK_HEADER or state = ACK_DATA or state = WAIT_ACK then
txer_i <= sda_sample;
end if;
end if;
end if;
end process TXER_BIT;
----------------------------------------------------------------------------
-- TXER_EDGE process
----------------------------------------------------------------------------
-- This process creates a one wide clock pulse for Txer IRQ
----------------------------------------------------------------------------
TXER_EDGE_PROCESS : process(Sys_clk)
begin
if Sys_clk'event and Sys_clk = '1' then
if Reset = ENABLE_N then
txer_edge <= '0';
elsif scl_falling_edge = '1' then
if state = ACK_HEADER or state = ACK_DATA or state = WAIT_ACK then
txer_edge <= sda_sample;
end if;
elsif scl_f_edg_d2 = '1' then
txer_edge <= '0';
end if;
end if;
end process TXER_EDGE_PROCESS;
Txer <= txer_edge;
----------------------------------------------------------------------------
-- uP Data Register
-- Register for uP interface data_i2c_i
----------------------------------------------------------------------------
DATA_I2C_I_PROC : process(Sys_clk)
begin
if Sys_clk'event and Sys_clk = '1' then
if Reset = ENABLE_N then
data_i2c_i <= (others => '0');
new_rcv_dta_i <= '0';
elsif (state = ACK_DATA) and Ro_prev = '0' and scl_falling_edge = '1'
and adr_dta_l = '0' then
data_i2c_i <= shift_reg;
new_rcv_dta_i <= '1';
else
data_i2c_i <= data_i2c_i;
new_rcv_dta_i <= '0';
end if;
end if;
end process DATA_I2C_I_PROC;
----------------------------------------------------------------------------
-- INT_NEW_RCV_DATA_PROCESS
----------------------------------------------------------------------------
-- This process assigns the internal receive data signals to the output port
----------------------------------------------------------------------------
INT_NEW_RCV_DATA_PROCESS : process (new_rcv_dta_i)
begin -- process
New_rcv_dta <= new_rcv_dta_i;
end process INT_NEW_RCV_DATA_PROCESS;
Data_i2c <= data_i2c_i;
----------------------------------------------------------------------------
-- Determine if Addressed As Slave or by General Call
----------------------------------------------------------------------------
-- This process determines when the I2C has been addressed as a slave
-- that is the I2C header matches the slave address stored in ADR or a
-- general call has happened
----------------------------------------------------------------------------
NO_TEN_BIT_GEN : if C_TEN_BIT_ADR = 0 generate
addr_match <= '1' when (i2c_header(7 downto 1) = Adr(7 downto 1))
or (abgc_i = '1')
else '0';
-- Seven bit addressing, sec_adr_match is always true.
sec_adr_match <= '1';
end generate NO_TEN_BIT_GEN;
TEN_BIT_GEN : if (C_TEN_BIT_ADR = 1) generate
-------------------------------------------------------------------------
-- The msb_wr signal indicates that the just received i2c_header matches
-- the required first byte of a 2-byte, 10-bit address. Since the
-- i2c_header shift register clocks on the scl rising edge but the timing
-- of signals dependent on msb_wr expect it to change on the falling edge
-- the scl_f_edge_d1 qualifier is used to create the expected timing.
-------------------------------------------------------------------------
MSB_WR_PROCESS : process (Sys_clk)
begin
if Sys_clk'event and Sys_clk = '1' then
if Reset = ENABLE_N then
msb_wr <= '0';
elsif (abgc_i = '1') or
(scl_f_edg_d1 = '1'
and i2c_header(7 downto 3) = "11110"
and (i2c_header(2 downto 1) = Ten_adr(7 downto 6)))
then
msb_wr <= '1';
elsif (scl_f_edg_d1='1') then
msb_wr <= '0';
end if;
end if;
end process MSB_WR_PROCESS;
-------------------------------------------------------------------------
-- MSB_WR_D_PROCESS
-------------------------------------------------------------------------
-- msb_wr delay process
-------------------------------------------------------------------------
MSB_WR_D_PROCESS : process (Sys_clk)
begin
if Sys_clk'event and Sys_clk = '1' then
if Reset = ENABLE_N then
msb_wr_d <= '0';
msb_wr_d1 <= '0';
else
msb_wr_d <= msb_wr;
msb_wr_d1 <= msb_wr_d; -- delayed to align with srw_i
end if;
end if;
end process MSB_WR_D_PROCESS;
-------------------------------------------------------------------------
-- SRFF set on leading edge of MSB_WR, Reset on DTC and SCL falling edge
-- this will qualify the 2nd byte as address and prevent it from being
-- loaded into the DRR or Rc FIFO
-------------------------------------------------------------------------
SECOND_ADDR_PROCESS : process (Sys_clk)
begin
if Sys_clk'event and Sys_clk = '1' then
if Reset = ENABLE_N then
sec_addr <= '0';
elsif (msb_wr = '1' and msb_wr_d = '0'
and i2c_header(0) = '0') then
-- First byte of two byte (10-bit addr) matched and
-- direction=write. Set sec_addr flag to indicate next byte
-- should be checked against remainder of the address.
sec_addr <= '1';
elsif dtc_i = '1' and Ro_prev = '0' and scl_f_edg_d1 = '1'
then
sec_addr <= '0';
else
sec_addr <= sec_addr;
end if;
end if;
end process SECOND_ADDR_PROCESS;
-------------------------------------------------------------------------
-- Compare 2nd byte to see if it matches slave address
-- A repeated start with the Master writing to the slave must also
-- compare the second address byte.
-- A repeated start with the Master reading from the slave only compares
-- the first (most significant).
-------------------------------------------------------------------------
SECOND_ADDR_COMP_PROCESS : process (Sys_clk)
begin
if Sys_clk'event and Sys_clk = '1' then
if Reset = ENABLE_N then
sec_adr_match <= '0';
elsif detect_stop = '1'
-- Repeated Start and Master Writing to Slave
or (state = ACK_HEADER and i2c_header(0) = '0'
and master_slave = '0' and msb_wr_d = '1' and abgc_i = '0') then
sec_adr_match <= '0';
elsif (abgc_i = '1')
or (sec_addr = '1' and (shift_reg(7) = Ten_adr(5)
and shift_reg(6 downto 0) = Adr (7 downto 1)
and dtc_i = '1' and msb_wr_d1 = '1')) then
sec_adr_match <= '1';
else
sec_adr_match <= sec_adr_match;
end if;
end if;
end process SECOND_ADDR_COMP_PROCESS;
-------------------------------------------------------------------------
-- Prevents 2nd byte of 10 bit address from being loaded into DRR.
-- When in ACK_HEADER and srw_i is lo then a repeated start or start
-- condition occured and data is being written to slave so the next
-- byte will be the remaining portion of the 10 bit address
-------------------------------------------------------------------------
ADR_DTA_L_PROCESS : process (Sys_clk)
begin
if Sys_clk'event and Sys_clk = '1' then
if Reset = ENABLE_N then
adr_dta_l <= '0';
elsif ((i2c_header(0) = '0' and
msb_wr = '1' and
msb_wr_d = '0') and
sec_adr_match = '0') or
(state = ACK_HEADER and srw_i = '0' and
master_slave = '0' and
msb_wr_d1 = '1') then
adr_dta_l <= '1';
elsif (state = ACK_HEADER and
master_slave = '1' and
msb_wr_d1 = '0') then
adr_dta_l <= '0';
elsif (state = ACK_DATA and Ro_prev = '0'
and scl_falling_edge = '1')
or (detect_start = '1') or (abgc_i = '1')
-- or (state = ACK_HEADER and srw_i = '1' and master_slave = '0')
then
adr_dta_l <= '0';
else
adr_dta_l <= adr_dta_l;
end if;
end if;
end process ADR_DTA_L_PROCESS;
-- Set address match high to get 2nd byte of slave address
addr_match <= '1' when (msb_wr = '1' and sec_adr_match = '1')
or (sec_addr = '1')
else '0';
end generate TEN_BIT_GEN;
----------------------------------------------------------------------------
-- Process : SDA_SMPL
-- Address by general call process
----------------------------------------------------------------------------
ABGC_PROCESS : process (Sys_clk)
begin
if (Sys_clk'event and Sys_clk = '1') then
if Reset = ENABLE_N then
abgc_i <= '0';
elsif detect_stop = '1' or detect_start = '1' then
abgc_i <= '0';
elsif i2c_header(7 downto 0) = "00000000" and Gc_en = '1'
and (state = ACK_HEADER) then
abgc_i <= '1';
end if;
end if;
end process ABGC_PROCESS;
Abgc <= abgc_i;
----------------------------------------------------------------------------
-- Process : SDA_SMPL
-- Sample the SDA_RIN for use in checking the acknowledge bit received by
-- the controller
----------------------------------------------------------------------------
SDA_SMPL: process (Sys_clk) is
begin
if (Sys_clk'event and Sys_clk = '1') then
if Reset = ENABLE_N then
sda_sample <= '0';
elsif (scl_rising_edge='1') then
sda_sample <= sda_rin;
end if;
end if;
end process SDA_SMPL;
----------------------------------------------------------------------------
-- Main State Machine Process
-- The following process contains the main I2C state machine for both master
-- and slave modes. This state machine is clocked on the falling edge of SCL
-- DETECT_STOP must stay as an asynchronous Reset because once STOP has been
-- generated, SCL clock stops. Note that the bit_cnt signal updates on the
-- scl_falling_edge pulse and is available on scl_f_edg_d1. So the count is
-- available prior to the STATE changing.
----------------------------------------------------------------------------
STATE_MACHINE : process (Sys_clk)
begin
if Sys_clk'event and Sys_clk = '1' then
if Reset = ENABLE_N or detect_stop = '1' then
state <= IDLE;
sm_stop <= '0';
elsif scl_f_edg_d2 = '1' or (Ro_prev = '0' and ro_prev_d1 = '1') then
case state is
------------- IDLE STATE -------------
when IDLE =>
--sm_stop <= sm_stop ;
if detect_start = '1' then
state <= HEADER;
end if;
------------- HEADER STATE -------------
when HEADER =>
--sm_stop <= sm_stop ;
if bit_cnt = CNT_DONE then
state <= ACK_HEADER;
end if;
------------- ACK_HEADER STATE -------------
when ACK_HEADER =>
-- sm_stop <= sm_stop ;
if arb_lost = '1' then
state <= IDLE;
elsif sda_sample = '0' then
-- ack has been received, check for master/slave
if master_slave = '1' then
-- master, so check tx bit for direction
if Tx = '0' then
-- receive mode
state <= RCV_DATA;
else
--transmit mode
state <= XMIT_DATA;
end if;
else
if addr_match = '1' then
--if aas_i = '1' then
-- addressed slave, so check I2C_HEADER(0)
-- for direction
if i2c_header(0) = '0' then
-- receive mode
state <= RCV_DATA;
else
-- transmit mode
state <= XMIT_DATA;
end if;
else
-- not addressed, go back to IDLE
state <= IDLE;
end if;
end if;
else
-- not acknowledge received, stop as the address put on
-- the bus was not recognized/accepted by any slave
state <= IDLE;
if master_slave = '1' then
sm_stop <= '1';
end if;
end if;
------------- RCV_DATA State --------------
when RCV_DATA =>
--sm_stop <= sm_stop ;
-- check for repeated start
if (detect_start = '1') then
state <= HEADER;
elsif bit_cnt = CNT_DONE then
if master_slave = '0' and addr_match = '0' then
state <= IDLE;
else
-- Send an acknowledge
state <= ACK_DATA;
end if;
end if;
------------ XMIT_DATA State --------------
when XMIT_DATA =>
--sm_stop <= sm_stop ;
-- check for repeated start
if (detect_start = '1') then
state <= HEADER;
elsif bit_cnt = CNT_DONE then
-- Wait for acknowledge
state <= WAIT_ACK;
end if;
------------- ACK_DATA State --------------
when ACK_DATA =>
--sm_stop <= sm_stop ;
if Ro_prev = '0' then -- stay in ACK_DATA until
state <= RCV_DATA; -- a read of DRR has occurred
else
state <= ACK_DATA;
end if;
------------- WAIT_ACK State --------------
when WAIT_ACK =>
if arb_lost = '1' then
state <= IDLE;
elsif (sda_sample = '0') then
if (master_slave = '0' and addr_match = '0') then
state <= IDLE;
else
state <= XMIT_DATA;
end if;
else
-- not acknowledge received. The master transmitter is
-- being told to quit sending data as the slave won't take
-- anymore. Generate a STOP per spec. (Note that it
-- isn't strickly necessary for the master to get off the
-- bus at this point. It could retain ownership. However,
-- product specification indicates that it will get off
-- the bus) The slave transmitter is being informed by the
-- master that it won't take any more data.
if master_slave = '1' then
sm_stop <= '1';
end if;
state <= IDLE;
end if;
-- coverage off
when others =>
state <= IDLE;
-- coverage on
end case;
end if;
end if;
end process STATE_MACHINE;
LEVEL_1_GEN: if C_SDA_LEVEL = 1 generate
begin
----------------------------------------------------------------------------
-- Master SDA
----------------------------------------------------------------------------
MAS_SDA : process(Sys_clk)
begin
if Sys_clk'event and Sys_clk = '1' then
if Reset = ENABLE_N then
master_sda <= '1';
-- elsif state = HEADER or state = XMIT_DATA then
-- master_sda <= shift_out;
elsif state = HEADER or (state = XMIT_DATA and
tx_under_prev_i = '0' ) then
master_sda <= shift_out;
---------------------------------
-- Updated for CR 555648
---------------------------------
elsif (tx_under_prev_i = '1' and state = XMIT_DATA) then
master_sda <= '1';
elsif state = ACK_DATA then
master_sda <= Txak;
else
master_sda <= '1';
end if;
end if;
end process MAS_SDA;
end generate LEVEL_1_GEN;
LEVEL_0_GEN: if C_SDA_LEVEL = 0 generate
begin
----------------------------------------------------------------------------
-- Master SDA
----------------------------------------------------------------------------
MAS_SDA : process(Sys_clk)
begin
if Sys_clk'event and Sys_clk = '1' then
if Reset = ENABLE_N then
master_sda <= '1';
-- elsif state = HEADER or state = XMIT_DATA then
-- master_sda <= shift_out;
elsif state = HEADER or (state = XMIT_DATA and
tx_under_prev_i = '0' ) then
master_sda <= shift_out;
---------------------------------
-- Updated for CR 555648
---------------------------------
elsif (tx_under_prev_i = '1' and state = XMIT_DATA) then
master_sda <= '0';
elsif state = ACK_DATA then
master_sda <= Txak;
else
master_sda <= '1';
end if;
end if;
end process MAS_SDA;
end generate LEVEL_0_GEN;
----------------------------------------------------------------------------
-- Slave SDA
----------------------------------------------------------------------------
SLV_SDA : process(Sys_clk)
begin
-- For the slave SDA, address match(aas_i) only has to be checked when
-- state is ACK_HEADER because state
-- machine will never get to state XMIT_DATA or ACK_DATA
-- unless address match is a one.
if Sys_clk'event and Sys_clk = '1' then
if Reset = ENABLE_N then
slave_sda <= '1';
elsif (addr_match = '1' and state = ACK_HEADER) or
(state = ACK_DATA) then
slave_sda <= Txak;
elsif (state = XMIT_DATA) then
slave_sda <= shift_out;
else
slave_sda <= '1';
end if;
end if;
end process SLV_SDA;
------------------------------------------------------------
--Mathew : Added below process for CR 707697
SHIFT_COUNT : process(Sys_clk)
begin
if Sys_clk'event and Sys_clk = '1' then
if Reset = ENABLE_N then
shift_cnt <= "000000000";
elsif(shift_reg_ld = '1') then
shift_cnt <= "000000001";
elsif(shift_reg_en = '1') then
shift_cnt <= shift_cnt(7 downto 0) & shift_cnt(8);
else
shift_cnt <= shift_cnt;
end if;
end if;
end process SHIFT_COUNT ;
reg_empty <= '1' when shift_cnt(8) = '1' else '0';
------------------------------------------------------------
----------------------------------------------------------------------------
-- I2C Data Shift Register
----------------------------------------------------------------------------
I2CDATA_REG : entity axi_iic_v2_0.shift8
port map (
Clk => Sys_clk,
Clr => Reset,
Data_ld => shift_reg_ld,
Data_in => Dtr,
Shift_in => sda_rin,
Shift_en => shift_reg_en,
Shift_out => shift_out,
Data_out => shift_reg);
----------------------------------------------------------------------------
-- Process : I2CDATA_REG_EN_CTRL
----------------------------------------------------------------------------
I2CDATA_REG_EN_CTRL : process(Sys_clk)
begin
if Sys_clk'event and Sys_clk = '1' then
if Reset = ENABLE_N then
shift_reg_en <= '0';
elsif (
-- Grab second byte of 10-bit address?
(master_slave = '1' and state = HEADER and scl_rising_edge='1')
-- Grab data byte
or (state = RCV_DATA and scl_rising_edge='1'
and detect_start = '0')
-- Send data byte. Note use of scl_f_edg_d2 which is the 2 clock
-- delayed version of the SCL falling edge signal
or (state = XMIT_DATA and scl_f_edg_d2 = '1'
and detect_start = '0')) then
shift_reg_en <= '1';
else
shift_reg_en <= '0';
end if;
end if;
end process I2CDATA_REG_EN_CTRL;
----------------------------------------------------------------------------
-- Process : I2CDATA_REG_LD_CTRL
----------------------------------------------------------------------------
I2CDATA_REG_LD_CTRL : process(Sys_clk)
begin
if Sys_clk'event and Sys_clk = '1' then
if Reset = ENABLE_N then
shift_reg_ld <= '0';
elsif (
(master_slave = '1' and state = IDLE)
or (state = WAIT_ACK)
-- Slave Transmitter (i2c_header(0)='1' mean master wants to read)
or (state = ACK_HEADER and i2c_header(0) = '1'
and master_slave = '0')
-- Master has a byte to transmit
or (state = ACK_HEADER and Tx = '1' and master_slave = '1')
-- ??
or (state = RCV_DATA and detect_start = '1'))
or tx_under_prev_i = '1' then
shift_reg_ld <= '1';
else
shift_reg_ld <= '0';
end if;
end if;
end process I2CDATA_REG_LD_CTRL;
----------------------------------------------------------------------------
-- SHFT_REG_LD_PROCESS
----------------------------------------------------------------------------
-- This process registers shift_reg_ld signal
----------------------------------------------------------------------------
SHFT_REG_LD_PROCESS : process (Sys_clk)
begin -- process
if Sys_clk'event and Sys_clk = '1' then
if Reset = ENABLE_N then
shift_reg_ld_d1 <= '0';
else -- Delay shift_reg_ld one clock
shift_reg_ld_d1 <= shift_reg_ld;
end if;
end if;
end process SHFT_REG_LD_PROCESS;
----------------------------------------------------------------------------
-- NEW_XMT_PROCESS
----------------------------------------------------------------------------
-- This process sets Rdy_new_xmt signal high for one sysclk after data has
-- been loaded into the shift register. This is used to create the Dtre
-- interrupt.
----------------------------------------------------------------------------
NEW_XMT_PROCESS : process (Sys_clk)
begin -- process
if Sys_clk'event and Sys_clk = '1' then
if Reset = ENABLE_N then
rdy_new_xmt_i <= '0';
elsif state = XMIT_DATA or (state = HEADER and Msms = '1') then
rdy_new_xmt_i <= (not (shift_reg_ld)) and shift_reg_ld_d1;
end if;
end if;
end process NEW_XMT_PROCESS;
Rdy_new_xmt <= rdy_new_xmt_i;
----------------------------------------------------------------------------
-- I2C Header Shift Register
-- Header/Address Shift Register
----------------------------------------------------------------------------
I2CHEADER_REG : entity axi_iic_v2_0.shift8
port map (
Clk => Sys_clk,
Clr => Reset,
Data_ld => i2c_header_ld,
Data_in => reg_clr,
Shift_in => sda_rin,
Shift_en => i2c_header_en,
Shift_out => i2c_shiftout,
Data_out => i2c_header);
----------------------------------------------------------------------------
-- Process : I2CHEADER_REG_CTRL
----------------------------------------------------------------------------
I2CHEADER_REG_CTRL : process(Sys_clk)
begin
if Sys_clk'event and Sys_clk = '1' then
if Reset = ENABLE_N then
i2c_header_en <= '0';
elsif (state = HEADER and scl_rising_edge='1') then
i2c_header_en <= '1';
else
i2c_header_en <= '0';
end if;
end if;
end process I2CHEADER_REG_CTRL;
i2c_header_ld <= '0';
----------------------------------------------------------------------------
-- Bit Counter
----------------------------------------------------------------------------
BITCNT : entity axi_iic_v2_0.upcnt_n
generic map (
C_SIZE => 4
)
port map(
Clk => Sys_clk,
Clr => Reset,
Data => cnt_start,
Cnt_en => bit_cnt_en,
Load => bit_cnt_ld,
Qout => bit_cnt);
----------------------------------------------------------------------------
-- Process : Counter control lines
----------------------------------------------------------------------------
BIT_CNT_EN_CNTL : process(Sys_clk)
begin
if Sys_clk'event and Sys_clk = '1' then
if Reset = ENABLE_N then
bit_cnt_en <= '0';
elsif (state = HEADER and scl_falling_edge = '1')
or (state = RCV_DATA and scl_falling_edge = '1')
or (state = XMIT_DATA and scl_falling_edge = '1') then
bit_cnt_en <= '1';
else
bit_cnt_en <= '0';
end if;
end if;
end process BIT_CNT_EN_CNTL;
bit_cnt_ld <= '1' when (state = IDLE) or (state = ACK_HEADER)
or (state = ACK_DATA)
or (state = WAIT_ACK)
or (detect_start = '1') else '0';
end architecture RTL;
|
gpl-3.0
|
peteut/nvc
|
test/regress/issue348.vhd
|
2
|
169
|
entity issue348 is
end entity;
architecture a of issue348 is
begin
main : process
begin
std.env.stop(0);
assert False severity failure;
end process;
end;
|
gpl-3.0
|
peteut/nvc
|
test/regress/issue376.vhd
|
2
|
1950
|
entity decoder is
port(
i_bcd : in bit_vector(3 downto 0); -- bcd input
o_display : out bit_vector(6 downto 0) -- display output
);
end entity;
library ieee;
use ieee.numeric_bit.all;
architecture rtl of decoder is
constant D_ZERO : bit_vector(6 downto 0) := "1111110";
constant D_ONE : bit_vector(6 downto 0) := "0110000";
constant D_TWO : bit_vector(6 downto 0) := "1101101";
constant D_THREE : bit_vector(6 downto 0) := "1111001";
constant D_FOUR : bit_vector(6 downto 0) := "0110011";
constant D_FIVE : bit_vector(6 downto 0) := "1011011";
constant D_SIX : bit_vector(6 downto 0) := "1011111";
constant D_SEVEN : bit_vector(6 downto 0) := "1110000";
constant D_EIGHT : bit_vector(6 downto 0) := "1111111";
constant D_NINE : bit_vector(6 downto 0) := "1111011";
constant D_E : bit_vector(6 downto 0) := "1111001";
type t_decoder_arr is array (0 to 15) of bit_vector(6 downto 0);
constant decoder_arr : t_decoder_arr := (D_ZERO, D_ONE, D_TWO, D_THREE, D_FOUR, D_FIVE,
D_SIX, D_SEVEN, D_EIGHT, D_NINE, D_E, D_E, D_E, D_E, D_E, D_E);
begin -- architecture
with to_integer(unsigned(i_bcd)) select
o_display <=
decoder_arr(to_integer(unsigned(i_bcd))) when 0 to 15,
D_E when others;
end architecture;
-------------------------------------------------------------------------------
entity issue376 is
end entity;
architecture test of issue376 is
signal i_bcd : bit_vector(3 downto 0);
signal o_display : bit_vector(6 downto 0);
begin
decoder_1: entity work.decoder
port map (
i_bcd => i_bcd,
o_display => o_display);
process is
begin
i_bcd <= "0000";
wait for 1 ns;
assert o_display = "1111110";
i_bcd <= "0001";
wait for 1 ns;
assert o_display = "0110000";
wait;
end process;
end architecture;
|
gpl-3.0
|
peteut/nvc
|
test/regress/func7.vhd
|
5
|
515
|
entity func7 is
end entity;
architecture test of func7 is
type int_vector is array (natural range <>) of integer;
subtype int_vec_3 is int_vector(0 to 2);
function get_ints(a, b, c : integer) return int_vec_3 is
begin
return int_vec_3'(a, b, c);
end function;
begin
process is
variable v : int_vec_3;
begin
v := get_ints(1, 2, 3);
assert v = (1, 2, 3);
assert get_ints(4, 5, 6) = (4, 5, 6);
wait;
end process;
end architecture;
|
gpl-3.0
|
peteut/nvc
|
test/regress/jcore3.vhd
|
3
|
437
|
entity jcore3 is
end entity;
architecture test of jcore3 is
signal x, y : integer;
begin
a: process (x, y) is
variable count : integer := 0;
begin
report "wakeup";
count := count + 1;
assert count <= 2;
end process;
b: process is
begin
x <= 1;
wait;
end process;
c: process is
begin
y <= 1;
wait;
end process;
end architecture;
|
gpl-3.0
|
peteut/nvc
|
test/regress/elab1.vhd
|
5
|
656
|
entity elab1_bot is
port (
i : in integer;
o : out integer );
end entity;
architecture test of elab1_bot is
begin
process (i) is
begin
o <= i + 1;
end process;
end architecture;
-------------------------------------------------------------------------------
entity elab1 is
end entity;
architecture test of elab1 is
signal x, y : integer;
begin
uut: entity work.elab1_bot
port map ( x, y );
process is
begin
x <= 0;
wait for 1 ns;
assert y = 1;
x <= 2;
wait for 1 ns;
assert y = 3;
wait;
end process;
end architecture;
|
gpl-3.0
|
dcsun88/ntpserver-fpga
|
vhd/hdl/disp_tb.vhd
|
1
|
7252
|
-------------------------------------------------------------------------------
-- Title : Clock
-- Project :
-------------------------------------------------------------------------------
-- File : disp_tb.vhd
-- Author : Daniel Sun <[email protected]>
-- Company :
-- Created : 2016-05-19
-- Last update: 2018-04-22
-- Platform :
-- Standard : VHDL'93
-------------------------------------------------------------------------------
-- Description: Display controller test bench
-------------------------------------------------------------------------------
-- Copyright (c) 2016
-------------------------------------------------------------------------------
-- Revisions :
-- Date Version Author Description
-- 2016-05-19 1.0 dcsun88osh Created
-------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
entity disp_tb is
end disp_tb;
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
library work;
use work.types_pkg.all;
use work.tb_pkg.all;
architecture STRUCTURE of disp_tb is
component disp
port (
rst_n : in std_logic;
clk : in std_logic;
tsc_1pps : in std_logic;
tsc_1ppms : in std_logic;
tsc_1ppus : in std_logic;
disp_ena : in std_logic;
disp_page : in std_logic_vector(7 downto 0);
disp_pdm : in std_logic_vector(7 downto 0);
stat_src : in std_logic_vector(3 downto 0);
stat : in std_logic_vector(15 downto 0);
-- Display memory
sram_addr : in std_logic_vector(9 downto 0);
sram_we : in std_logic;
sram_datao : in std_logic_vector(31 downto 0);
sram_datai : out std_logic_vector(31 downto 0);
-- Time of day
cur_time : in time_ty;
-- Output to tlc59282 LED driver
disp_sclk : OUT std_logic;
disp_blank : OUT std_logic;
disp_lat : OUT std_logic;
disp_sin : OUT std_logic;
disp_status : OUT std_logic
);
end component;
SIGNAL rst_n : std_logic;
SIGNAL clk : std_logic;
SIGNAL tsc_1pps : std_logic;
SIGNAL tsc_1ppms : std_logic;
SIGNAL tsc_1ppus : std_logic;
SIGNAL disp_ena : std_logic;
SIGNAL disp_page : std_logic_vector(7 downto 0);
SIGNAL disp_pdm : std_logic_vector(7 downto 0);
SIGNAL stat_src : std_logic_vector(3 downto 0);
SIGNAL stat : std_logic_vector(15 downto 0);
-- Display memory
SIGNAL sram_addr : std_logic_vector(9 downto 0);
SIGNAL sram_we : std_logic;
SIGNAL sram_datao : std_logic_vector(31 downto 0);
SIGNAL sram_datai : std_logic_vector(31 downto 0);
-- Time of day
SIGNAL cur_time : time_ty;
-- Output to tlc59282 LED driver
SIGNAL disp_sclk : std_logic;
SIGNAL disp_blank : std_logic;
SIGNAL disp_lat : std_logic;
SIGNAL disp_sin : std_logic;
SIGNAL disp_status : std_logic;
begin
disp_i: disp
port map (
rst_n => rst_n,
clk => clk,
tsc_1pps => tsc_1pps,
tsc_1ppms => tsc_1ppms,
tsc_1ppus => tsc_1ppus,
disp_ena => disp_ena,
disp_page => disp_page,
disp_pdm => disp_pdm,
stat_src => stat_src,
stat => stat,
-- Display memory
sram_addr => sram_addr,
sram_we => sram_we,
sram_datao => sram_datao,
sram_datai => sram_datai,
-- Time of day
cur_time => cur_time,
-- Output to tlc59282 LED driver
disp_sclk => disp_sclk,
disp_blank => disp_blank,
disp_lat => disp_lat,
disp_sin => disp_sin,
disp_status => disp_status
);
clk_100MHZ: clk_gen(10 ns, 50, clk);
reset: rst_n_gen(1 us, rst_n);
-- 1 second pulse
process
begin
tsc_1pps <= '0';
run_clk(clk, 1000);
loop
tsc_1pps <= '1';
run_clk(clk, 1);
tsc_1pps <= '0';
run_clk(clk, 1999999);
end loop;
end process;
-- 1 milli second pulse
process
begin
tsc_1ppms <= '0';
run_clk(clk, 1000);
loop
tsc_1ppms <= '1';
run_clk(clk, 1);
tsc_1ppms <= '0';
run_clk(clk, 1999);
end loop;
end process;
-- 1 micro second pulse
process
begin
tsc_1ppus <= '0';
run_clk(clk, 1000);
loop
tsc_1ppus <= '1';
run_clk(clk, 1);
tsc_1ppus <= '0';
run_clk(clk, 1);
end loop;
end process;
-- pdm setting
process
begin
disp_pdm <= (others =>'0');
run_clk(clk, 2000);
disp_pdm <= x"aa";
run_clk(clk, 12800);
disp_pdm <= x"ff";
run_clk(clk, 12800);
disp_pdm <= x"fe";
run_clk(clk, 12800);
disp_pdm <= x"fd";
run_clk(clk, 12800);
disp_pdm <= x"7f";
run_clk(clk, 12800);
disp_pdm <= x"80";
run_clk(clk, 12800);
disp_pdm <= x"81";
run_clk(clk, 12800);
disp_pdm <= x"00";
run_clk(clk, 12800);
disp_pdm <= x"01";
run_clk(clk, 12800);
disp_pdm <= x"02";
run_clk(clk, 12800);
disp_pdm <= x"03";
run_clk(clk, 12800);
wait;
end process;
-- input
process
begin
disp_ena <= '1';
disp_page <= (others => '0');
sram_addr <= (others => '0');
sram_we <= '0';
sram_datao <= (others => '0');
stat_src <= (others => '0');
stat <= (others => '0');
cur_time.t_1ms <= (others => '0');
cur_time.t_10ms <= (others => '0');
cur_time.t_100ms <= (others => '0');
cur_time.t_1s <= (others => '0');
cur_time.t_10s <= (others => '0');
cur_time.t_1m <= (others => '0');
cur_time.t_10m <= (others => '0');
cur_time.t_1h <= (others => '0');
cur_time.t_10h <= (others => '0');
run_clk(clk, 2000);
run_clk(clk, 10000);
disp_page <= x"1f";
run_clk(clk, 2000);
wait;
end process;
end STRUCTURE;
|
gpl-3.0
|
peteut/nvc
|
test/regress/func2.vhd
|
4
|
1220
|
entity func2 is
end entity;
architecture rtl of func2 is
type int_array is array (integer range <>) of integer;
function len(x : int_array) return integer is
begin
return x'length;
end function;
function sum(x : int_array) return integer is
variable tmp : integer := 0;
begin
for i in x'range loop
tmp := tmp + x(i);
end loop;
return tmp;
end function;
function asc(x : int_array) return boolean is
begin
return x'ascending;
end function;
function get_low(x : int_array) return integer is
begin
return x'low;
end function;
function get_high(x : int_array) return integer is
begin
return x'high;
end function;
begin
process is
variable u : int_array(5 downto 1) := (6, 3, 1, 1, 2);
variable v : int_array(1 to 5) := (3, 5, 6, 1, 2);
begin
assert len(v) = 5;
assert sum(v) = 17;
assert sum(u) = 13;
assert asc(v);
assert get_low(u) = 1;
assert get_low(v) = 1;
assert get_high(u) = 5;
assert get_high(v) = 5;
assert not asc(u);
wait;
end process;
end architecture;
|
gpl-3.0
|
peteut/nvc
|
test/regress/ieee4.vhd
|
2
|
2314
|
entity ieee4 is
end entity;
library ieee;
use ieee.math_real.all;
architecture test of ieee4 is
function approx(x, y : real; t : real := 0.001) return boolean is
begin
return abs(x - y) < t;
end function;
begin
process is
variable s1, s2 : integer;
variable r : real;
begin
r := 6.8;
wait for 0 ns; -- Prevent constant folding
assert approx(sign(r), 1.0);
r := 5.7;
wait for 0 ns;
assert approx(ceil(r), 6.0);
r := 0.6;
wait for 0 ns;
assert approx(floor(r), 0.0);
r := 0.5;
wait for 0 ns;
assert approx(round(r), 1.0);
r := 6.4999;
wait for 0 ns;
assert approx(round(r), 6.0);
r := 0.999;
wait for 0 ns;
assert approx(trunc(r), 0.0);
r := 4.6;
wait for 0 ns;
assert approx(r mod 2.7, 1.9);
s1 := 6;
s2 := 883;
uniform(s1, s2, r);
assert approx(r, 0.983380);
uniform(s1, s2, r);
assert approx(r, 0.627369);
uniform(s1, s2, r);
assert approx(r, 0.883711);
uniform(s1, s2, r);
assert approx(r, 0.472620);
uniform(s1, s2, r);
assert approx(r, 0.582179);
r := 4.0;
wait for 0 ns;
assert approx(sqrt(r), 2.0);
r := 4.3;
wait for 0 ns;
assert approx(sqrt(r), 2.0736);
r := 612.8;
wait for 0 ns;
assert approx(cbrt(r), 8.49388);
r := 1.2;
wait for 0 ns;
assert approx(5 ** r, 6.8986);
r := 2.0;
wait for 0 ns;
assert approx(r ** (-1.0), 0.5);
r := 2.0;
wait for 0 ns;
assert approx(exp(r), 7.389056);
r := 1.0;
wait for 0 ns;
assert approx(log(r), 0.0);
r := MATH_E;
wait for 0 ns;
assert approx(log(r), 1.0);
r := 5216.72;
wait for 0 ns;
assert approx(log(r), 8.5596);
r := MATH_PI;
wait for 0 ns;
assert approx(sin(r), 0.0);
r := 1.15251;
wait for 0 ns;
assert approx(cos(r), 0.406195);
r := 0.5;
wait for 0 ns;
assert approx(arctan(r), 0.463648);
wait;
end process;
end architecture;
|
gpl-3.0
|
peteut/nvc
|
test/simp/issue212.vhd
|
5
|
802
|
package pack is
function func(x : string) return boolean;
end package;
package body pack is
function func2(x : string) return boolean;
function func(x : string) return boolean is
begin
return func2(x);
end function;
function func2(x : string) return boolean is
variable r : boolean;
begin
if x = "StratixHC" then
r := true;
end if;
return r;
end function;
end package body;
-------------------------------------------------------------------------------
entity issue212 is
generic (
device : string := "StratixHC" );
end entity;
use work.pack.all;
architecture test of issue212 is
signal s : bit;
begin
gen: if func(device) generate
s <= '1';
end generate;
end architecture;
|
gpl-3.0
|
peteut/nvc
|
test/regress/agg1.vhd
|
5
|
413
|
entity agg1 is
end entity;
architecture test of agg1 is
type int_array is array (integer range <>) of integer;
begin
process is
variable x : integer;
variable v : int_array(1 to 3);
begin
x := 5;
v := ( 1, x, 2 );
assert v = ( 1, 5, 2 );
v := ( v(3), v(2), v(1) );
assert v = ( 2, 5, 1 );
wait;
end process;
end architecture;
|
gpl-3.0
|
peteut/nvc
|
test/sem/issue177.vhd
|
5
|
217
|
entity ent is
end entity;
architecture a of ent is
begin
main : process
function fun return integer is
begin
wait for 1 ns;
return 42;
end function;
begin
end process;
end architecture;
|
gpl-3.0
|
peteut/nvc
|
test/regress/assert5.vhd
|
3
|
334
|
entity assert5 is
end entity;
architecture test of assert5 is
signal x : integer;
begin
postponed assert x < 10;
process is
begin
x <= 5;
wait for 1 ns;
x <= 11;
wait for 0 ns;
x <= 20;
wait for 0 ns;
x <= 1;
wait;
end process;
end architecture;
|
gpl-3.0
|
peteut/nvc
|
test/sem/assert.vhd
|
5
|
616
|
entity e is
end entity;
architecture a of e is
begin
process is
begin
assert false; -- OK
assert 1 > 2 report "false"; -- OK
assert 4 < 7 report "true" severity failure; -- OK
report "boo" severity note;
end process;
process is
begin
assert 1; -- Not BOOLEAN
end process;
process is
begin
report 53; -- Not STRING
end process;
process is
begin
report "boo" severity 1; -- Not SEVERITY_LEVEL
end process;
end architecture;
|
gpl-3.0
|
peteut/nvc
|
test/regress/issue148.vhd
|
5
|
1046
|
package A_NG is
type A_NG_TYPE is record
debug : integer;
end record;
procedure PROC_B(B_ARG:inout A_NG_TYPE; B_VAL:out integer);
end A_NG;
package body A_NG is
procedure PROC_A(A_ARG:inout A_NG_TYPE) is
begin
null;
end procedure;
procedure PROC_B(B_ARG:inout A_NG_TYPE; B_VAL:out integer) is
variable b_var : integer;
procedure PROC_C(C_ARG:in integer;C_VAL:out integer) is
begin
PROC_A(B_ARG);
C_VAL := B_ARG.debug + C_ARG;
end procedure;
begin
b_var := 1;
PROC_C(b_var,B_VAL);
end procedure;
end A_NG;
-------------------------------------------------------------------------------
entity issue148 is
end entity;
use work.a_ng.all;
architecture test of issue148 is
begin
process is
variable a_ng : a_ng_type;
variable tmp : integer;
begin
a_ng.debug := 2;
proc_b(a_ng, tmp);
assert tmp = 3;
wait;
end process;
end architecture;
|
gpl-3.0
|
peteut/nvc
|
test/regress/assert1.vhd
|
5
|
323
|
entity assert1 is
end entity;
architecture a of assert1 is
begin
process is
begin
assert true report "failed";
report "hello world";
assert false report "not important"
severity note;
assert false severity failure;
wait;
end process;
end architecture;
|
gpl-3.0
|
peteut/nvc
|
test/bounds/issue150.vhd
|
4
|
432
|
library ieee;
use ieee.numeric_std.all;
entity issue150 is
end entity issue150;
architecture tb of issue150 is
type t_lut8x8 is array (0 to 7,0 to 7) of integer;
constant C_SAMPLE : t_lut8x8 := (
(1,1,1,1,1,1,1,1),
(1,1,1,1,1,1,1,1),
(1,1,1,1,1,1,1,1),
(1,1,1,1,1,1,1,1),
(1,1,1,1,1,1,1,1),
(1,1,1,1,1,1,1,1) ); -- Crash lowering here
begin
end architecture;
|
gpl-3.0
|
peteut/nvc
|
test/regress/access4.vhd
|
4
|
533
|
entity access4 is
end entity;
architecture test of access4 is
type int_vec is array (integer range <>) of integer;
type int_vec_ptr is access int_vec;
begin
process is
variable p : int_vec_ptr;
begin
p := new int_vec(1 to 10);
p(1 to 3) := (1, 2, 3);
assert p(1 to 3) = (1, 2, 3);
assert p(2) = 2;
p.all(4 to 6) := (4, 5, 6);
assert p.all(4) = 4;
assert p'length = 10;
assert p.all'low = 1;
wait;
end process;
end architecture;
|
gpl-3.0
|
peteut/nvc
|
test/sem/entity.vhd
|
4
|
650
|
entity e is
attribute foo : integer;
attribute foo of e : entity is 55;
constant c : integer := 1;
begin
pass : assert (e'foo = 55 and c = 1)
report "unexpected"
severity failure;
end entity;
package pack is
end package;
architecture test of e is
constant d : integer := c + 1; -- OK
begin
process is
begin
report integer'image(e'foo); -- OK
end process;
recur: entity work.e(invalid) -- OK (until elaboration)
;
bad: entity work.pack; -- Error
end architecture;
architecture a of pack is -- Error
begin
end architecture;
|
gpl-3.0
|
peteut/nvc
|
test/lower/proc1.vhd
|
4
|
364
|
entity proc1 is
end entity;
architecture test of proc1 is
procedure add1(x : in integer; y : out integer) is
begin
y := x + 1;
end procedure;
begin
process is
variable a, b : integer;
begin
add1(a, b);
assert b = 3;
add1(5, b);
assert b = 6;
wait;
end process;
end architecture;
|
gpl-3.0
|
peteut/nvc
|
test/perf/dyn_agg.vhd
|
5
|
586
|
entity dyn_agg is
end entity;
architecture test of dyn_agg is
constant WIDTH : integer := 20;
constant ITERS : integer := 14;
signal s : bit_vector(WIDTH - 1 downto 0);
function func(constant W : integer) return bit_vector is
variable r : bit_vector(W - 1 downto 0);
begin
return r;
end function;
begin
process is
begin
for i in 1 to ITERS loop
for j in 0 to integer'(2 ** WIDTH - 1) loop
s <= func(WIDTH);
end loop;
end loop;
wait;
end process;
end architecture;
|
gpl-3.0
|
peteut/nvc
|
test/sem/generate.vhd
|
5
|
1106
|
entity g is
end entity;
architecture test of g is
constant c : integer := 5;
signal x : integer;
signal b : bit_vector(1 to 5);
begin
g1: if true generate -- OK
begin
x <= 5;
end generate;
g2: if x generate -- Error
begin
end generate;
g3: if false generate -- OK
signal y : integer;
begin
y <= x;
end generate;
g4: if false generate
y <= 5; -- Error
end generate;
g5: for i in 1 to 5 generate -- OK
b(i) <= '1';
end generate;
g6: for x in b'range generate -- OK
constant k : bit := '1';
begin
b(x) <= k;
end generate;
g7: for x in b'range generate
alias a is b(x); -- OK
begin
a <= '1';
end generate;
g8: if x > 4 generate -- Error
end generate;
g9: for i in 1 to x generate -- Error
end generate;
g10: for i in integer (-4) to integer (-1) generate -- OK
end generate;
end architecture;
|
gpl-3.0
|
peteut/nvc
|
test/lower/issue164.vhd
|
5
|
264
|
package issue164 is
end package;
package body issue164 is
procedure same_name(variable var : out integer) is
begin
end;
impure function same_name return integer is
variable var : integer;
begin
return var;
end function;
end package body;
|
gpl-3.0
|
dcsun88/ntpserver-fpga
|
cpu/ip/cpu_xbar_0/blk_mem_gen_v8_2/hdl/blk_mem_gen_v8_2.vhd
|
24
|
19921
|
`protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2014"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
XWrzYjpTpUuus//3Yqipm0uESgOiNKQ8VQh6ZdiO7zAhk4piHKnqwa/2EKkH2x6OH6UJ3gXKq5/H
re5lJuG43w==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
I/mVU8dDhiD84VpApZ3BHEAFwc8ScdU1t9VBFtvay6KT8PQqngzpdxcgzAY0oIKkn+v6vjos+Vid
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v0EFW47TFj3bwlWawDY=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2014_03", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
enarOZZRqLSdokx00l/yrdbwVHZE+iAGChN3X8+ai4tHQi6+FKLUSim9B5GEcPwYS2mLkPj8A9rQ
5+AJ1kr2tDdusvxAzB/shFvbBXROK4gidDLQeNupO6hIO7r5vzS3kcAOkJO2aDc55fp7hixh/JA0
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`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
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u+cWPD37eOsIEPKPYDo=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
n/eBV2B/I1aWzlinjPqs0AiVgEgxpVbGxbjLwPCaCuUjlRKvVii71Q//M8LWbnOjtRJh3iBV/FEx
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6HIYn0aBOwtEePgf/knEux3ax3FfU2Xf9P4+rw==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 13008)
`protect data_block
VRl2IPSegGte2EEkvGTfMdA8J/7ljZkIqUO655TVXkaKszIQdAParUVE/q4nfRMUKm8EQmcEPW8r
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ZloTK9KTfsT7LhhY
`protect end_protected
|
gpl-3.0
|
peteut/nvc
|
test/regress/implicit3.vhd
|
5
|
675
|
entity sub is
port (
x : in integer;
y : out boolean );
end entity;
architecture test of sub is
begin
y <= x'delayed(5 ns) > x;
end architecture;
-------------------------------------------------------------------------------
entity implicit3 is
end entity;
architecture test of implicit3 is
signal x : integer := 0;
signal y : boolean;
begin
sub_i: entity work.sub
port map (x, y);
process is
begin
x <= 1;
wait for 1 ns;
assert not y;
wait for 5 ns;
assert not y;
x <= -1;
wait for 5 ns;
assert y;
wait;
end process;
end architecture;
|
gpl-3.0
|
peteut/nvc
|
test/sem/std.vhd
|
5
|
570
|
entity a is
end entity;
architecture b of a is
signal i : integer := 5;
signal t : time := 5 fs;
signal c : character := 'x';
subtype my_time is time;
constant x : my_time := my_time'left + 5 ns;
begin
process is
begin
wait for 4 ns;
t <= now;
end process;
process is
-- Default values
variable a : time;
variable b : my_time;
begin
end process;
process is
variable t : time := -1 ns;
variable u : time := 1.2 ns;
begin
end process;
end architecture;
|
gpl-3.0
|
peteut/nvc
|
test/regress/alias3.vhd
|
5
|
763
|
entity alias3 is
end entity;
architecture test of alias3 is
type int_array is array (integer range <>) of integer;
function cut(x : int_array; low, high: integer) return int_array is
alias a : int_array(1 to x'length) is x;
begin
return a(low to high);
end function;
signal s : int_array(1 to 5) := (1, 2, 3, 4, 5);
begin
process is
variable x : int_array(1 to 5) := (1, 2, 3, 4, 5);
variable y : int_array(4 downto 0) := (4, 3, 2, 1, 0);
alias sa : int_array(4 downto 0) is x;
begin
assert x(2 to 4) = (2, 3, 4);
assert sa(3 downto 1) = (2, 3, 4);
assert cut(x, 2, 3) = (2, 3);
assert cut(y, 1, 2) = (4, 3);
wait;
end process;
end architecture;
|
gpl-3.0
|
peteut/nvc
|
test/regress/wait4.vhd
|
5
|
649
|
entity wait4 is
end entity;
architecture test of wait4 is
signal x, y, z : bit;
begin
proc_a: process is
begin
wait for 1 ns;
y <= '1';
wait for 1 ns;
z <= '1';
wait for 1 ns;
assert x = '1';
wait;
end process;
proc_b: process is
begin
wait on x, y;
assert y = '1';
assert now = 1 ns;
assert y'event report "not y'event";
assert not x'event report "x'event";
wait on z;
assert not x'event;
assert z'event;
assert z = '1';
x <= '1';
wait;
end process;
end architecture;
|
gpl-3.0
|
peteut/nvc
|
test/elab/issue336.vhd
|
2
|
3265
|
-- test_ng.vhd
entity TEST_REGS is
generic (
REGS_BITS : integer := 32
);
port (
CLK : in bit;
RST : in bit;
REGS_WEN : in bit_vector(REGS_BITS-1 downto 0);
REGS_WDATA : in bit_vector(REGS_BITS-1 downto 0);
REGS_RDATA : out bit_vector(REGS_BITS-1 downto 0)
);
end TEST_REGS;
architecture RTL of TEST_REGS is
signal curr_value : bit_vector(REGS_BITS-1 downto 0);
begin
process (CLK, RST) begin
if (RST = '1') then
curr_value <= (others => '0');
elsif (CLK'event and CLK = '1') then
for i in curr_value'range loop
if (i >= REGS_WEN'low and i <= REGS_WEN'high) then
if (REGS_WEN(i) = '1') then
curr_value(i) <= REGS_WDATA(i);
end if;
end if;
end loop;
end if;
end process;
REGS_RDATA(0) <= curr_value(0);
REGS_RDATA(REGS_BITS-1 downto 1) <= curr_value(REGS_BITS-1 downto 1);
end RTL;
entity TEST_NG is
end TEST_NG;
architecture MODEL of TEST_NG is
component TEST_REGS
generic (
REGS_BITS : integer := 32
);
port (
CLK : in bit;
RST : in bit;
REGS_WEN : in bit_vector(REGS_BITS-1 downto 0);
REGS_WDATA : in bit_vector(REGS_BITS-1 downto 0);
REGS_RDATA : out bit_vector(REGS_BITS-1 downto 0)
);
end component;
constant CLK_PERIOD : time := 10 ns;
constant DELAY : time := 2 ns;
signal CLK : bit;
signal RST : bit;
constant REGS_BITS : integer := 32;
signal regs_wen : bit_vector(REGS_BITS-1 downto 0);
signal regs_wdata : bit_vector(REGS_BITS-1 downto 0);
signal regs_rdata : bit_vector(REGS_BITS-1 downto 0);
begin
REGS: TEST_REGS --
generic map ( --
REGS_BITS => REGS_BITS --
) --
port map ( --
CLK => CLK , -- In :
RST => RST , -- In :
REGS_WEN => regs_wen , -- In :
REGS_WDATA => regs_wdata , -- In :
REGS_RDATA => open -- Out : NG if open, OK if regs_rdata
);
process begin
CLK <= '1'; wait for CLK_PERIOD/2;
CLK <= '0'; wait for CLK_PERIOD/2;
end process;
TEST: process
begin
RST <= '1';
regs_wen <= (others => '0');
regs_wdata <= (others => '0');
wait until (CLK'event and CLK = '1');
RST <= '0' after DELAY;
wait until (CLK'event and CLK = '1');
regs_wen <= (others => '1') after DELAY;
regs_wdata <= (others => '0') after DELAY;
wait until (CLK'event and CLK = '1');
regs_wen <= (others => '0') after DELAY;
wait until (CLK'event and CLK = '1');
wait;
end process;
end MODEL;
|
gpl-3.0
|
peteut/nvc
|
test/lower/issue347.vhd
|
1
|
2367
|
-- test_ng.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity TEST_SUB is
generic (
SIZE_BITS : integer := 32;
COUNT_BITS : integer := 32
);
port (
POOL_SIZE : in std_logic_vector(SIZE_BITS -1 downto 0);
READY_SIZE : in std_logic_vector(SIZE_BITS -1 downto 0);
COUNT : out std_logic_vector(COUNT_BITS-1 downto 0)
);
end TEST_SUB;
architecture RTL of TEST_SUB is
begin
process (POOL_SIZE, READY_SIZE)
variable reserve_size : unsigned(SIZE_BITS-1 downto 0);
constant MAX_COUNT : integer := 2**(COUNT'high);
begin
reserve_size := to_01(unsigned(POOL_SIZE)) - to_01(unsigned(READY_SIZE));
if (reserve_size'length > COUNT'length) then
if (reserve_size > MAX_COUNT) then
COUNT <= std_logic_vector(to_unsigned(MAX_COUNT , COUNT'length));
else
COUNT <= std_logic_vector(resize (reserve_size , COUNT'length));
end if;
else
COUNT <= std_logic_vector(resize (reserve_size , COUNT'length));
end if;
end process;
end RTL;
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity TEST_NG is
end TEST_NG;
architecture RTL of TEST_NG is
constant SIZE_BITS : integer := 8;
constant COUNT_BITS : integer := 8;
signal POOL_SIZE : std_logic_vector(SIZE_BITS -1 downto 0);
signal READY_SIZE : std_logic_vector(SIZE_BITS -1 downto 0);
signal COUNT : std_logic_vector(COUNT_BITS-1 downto 0);
component TEST_SUB
generic (
SIZE_BITS : integer := 32;
COUNT_BITS : integer := 32
);
port (
POOL_SIZE : in std_logic_vector(SIZE_BITS -1 downto 0);
READY_SIZE : in std_logic_vector(SIZE_BITS -1 downto 0);
COUNT : out std_logic_vector(COUNT_BITS-1 downto 0)
);
end component;
begin
U: TEST_SUB
generic map (
SIZE_BITS => SIZE_BITS ,
COUNT_BITS => COUNT_BITS
)
port map (
POOL_SIZE => POOL_SIZE ,
READY_SIZE => READY_SIZE ,
-- COUNT => COUNT -- OK when COUNT
COUNT => open -- NG when open
);
end RTL;
|
gpl-3.0
|
dcsun88/ntpserver-fpga
|
vhd/hdl/tsc_tb.vhd
|
1
|
5445
|
-------------------------------------------------------------------------------
-- Title : Clock
-- Project :
-------------------------------------------------------------------------------
-- File : tsc_tb.vhd
-- Author : Daniel Sun <[email protected]>
-- Company :
-- Created : 2016-06-28
-- Last update: 2017-05-27
-- Platform :
-- Standard : VHDL'87
-------------------------------------------------------------------------------
-- Description: Testbench for time stamp counter
-------------------------------------------------------------------------------
-- Copyright (c) 2016
-------------------------------------------------------------------------------
-- Revisions :
-- Date Version Author Description
-- 2016-06-28 1.0 dcsun88osh Created
-------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
entity tsc_tb is
end tsc_tb;
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
library work;
use work.tb_pkg.all;
architecture STRUCTURE of tsc_tb is
component tsc
port (
rst_n : in std_logic;
clk : in std_logic;
gps_1pps : in std_logic;
gps_3dfix_d : in std_logic;
tsc_read : in std_logic;
tsc_sync : in std_logic;
pfd_resync : in std_logic;
gps_1pps_d : out std_logic;
tsc_1pps_d : out std_logic;
pll_trig : out std_logic;
pfd_status : out std_logic;
pdiff_1pps : out std_logic_vector(31 downto 0);
fdiff_1pps : out std_logic_vector(31 downto 0);
tsc_cnt : out std_logic_vector(63 downto 0);
tsc_cnt1 : out std_logic_vector(63 downto 0);
tsc_1pps : out std_logic;
tsc_1ppms : out std_logic;
tsc_1ppus : out std_logic
);
end component;
SIGNAL rst_n : std_logic;
SIGNAL clk : std_logic;
SIGNAL gps_1pps : std_logic;
SIGNAL gps_3dfix_d : std_logic;
SIGNAL tsc_read : std_logic;
SIGNAL tsc_sync : std_logic;
SIGNAL pfd_resync : std_logic;
SIGNAL gps_1pps_d : std_logic;
SIGNAL tsc_1pps_d : std_logic;
SIGNAL pll_trig : std_logic;
SIGNAL pfd_status : std_logic;
SIGNAL pdiff_1pps : std_logic_vector(31 downto 0);
SIGNAL fdiff_1pps : std_logic_vector(31 downto 0);
SIGNAL tsc_cnt : std_logic_vector(63 downto 0);
SIGNAL tsc_cnt1 : std_logic_vector(63 downto 0);
SIGNAL tsc_1pps : std_logic;
SIGNAL tsc_1ppms : std_logic;
SIGNAL tsc_1ppus : std_logic;
begin
tsc_i: tsc
port map (
rst_n => rst_n,
clk => clk,
gps_1pps => gps_1pps,
gps_3dfix_d => gps_3dfix_d,
tsc_read => tsc_read,
tsc_sync => tsc_sync,
pfd_resync => pfd_resync,
gps_1pps_d => gps_1pps_d,
tsc_1pps_d => tsc_1pps_d,
pll_trig => pll_trig,
pfd_status => pfd_status,
pdiff_1pps => pdiff_1pps,
fdiff_1pps => fdiff_1pps,
tsc_cnt => tsc_cnt,
tsc_cnt1 => tsc_cnt1,
tsc_1pps => tsc_1pps,
tsc_1ppms => tsc_1ppms,
tsc_1ppus => tsc_1ppus
);
clk_100MHZ: clk_gen(10 ns, 50, clk);
reset: rst_n_gen(1 us, rst_n);
gps_3dfix_d <= '0';
tsc_read <= '0';
process
begin
gps_1pps <= '0';
tsc_sync <= '0';
pfd_resync <= '0';
run_clk(clk, 100000099);
-- tsc pps pulse starts here
run_clk(clk, 1000);
-- Generate gps pps pulse 1000 cycles later
-- 1s
gps_1pps <= '1';
run_clk(clk, 1);
gps_1pps <= '0';
run_clk(clk, 99997999);
-- 1000 cycles before tsc
-- 2s
gps_1pps <= '1';
run_clk(clk, 1);
gps_1pps <= '0';
run_clk(clk, 100000999);
-- In line with tsc
-- 3s
gps_1pps <= '0';
run_clk(clk, 1);
gps_1pps <= '0';
run_clk(clk, 100000999);
-- 1000 cycles after tsc
-- 4s
gps_1pps <= '1';
run_clk(clk, 1);
gps_1pps <= '0';
-- trigger resync
-- 4.5s
run_clk(clk, 49999999);
--tsc_sync <= '1';
run_clk(clk, 50000000);
-- tsc resynced
-- 4 cycles before tsc from pipeline delay
-- 5s
gps_1pps <= '1';
run_clk(clk, 1);
gps_1pps <= '0';
run_clk(clk, 4);
tsc_sync <= '0';
run_clk(clk, 99999995);
-- 4 cycles before tsc from pipeline delay
-- 6s...
loop
gps_1pps <= '1';
run_clk(clk, 1);
gps_1pps <= '0';
run_clk(clk, 99999999);
end loop;
end process;
end STRUCTURE;
|
gpl-3.0
|
peteut/nvc
|
test/regress/slice4.vhd
|
5
|
622
|
entity slice4 is
end entity;
architecture test of slice4 is
procedure proc1(x : in string) is
begin
report x;
report integer'image(x'left);
report integer'image(x'right);
report boolean'image(x'ascending);
assert x'left = 1;
assert x'right = 5;
assert x'ascending;
assert x = "hello";
end procedure;
procedure proc2(x : in string) is
begin
proc1(x(x'range));
end procedure;
begin
process is
variable s : string(1 to 5) := "hello";
begin
proc2(s);
wait;
end process;
end architecture;
|
gpl-3.0
|
DProvinciani/Arquitectura_TPF
|
Codigo_fuente/ipcore_dir/instructionMemory/simulation/bmg_stim_gen.vhd
|
1
|
12651
|
--------------------------------------------------------------------------------
--
-- BLK MEM GEN v7_3 Core - Stimulus Generator For Single Port ROM
--
--------------------------------------------------------------------------------
--
-- (c) Copyright 2006_3010 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
--------------------------------------------------------------------------------
--
-- Filename: bmg_stim_gen.vhd
--
-- Description:
-- Stimulus Generation For SROM
--
--------------------------------------------------------------------------------
-- Author: IP Solutions Division
--
-- History: Sep 12, 2011 - First Release
--------------------------------------------------------------------------------
--
--------------------------------------------------------------------------------
-- Library Declarations
--------------------------------------------------------------------------------
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
USE IEEE.STD_LOGIC_MISC.ALL;
LIBRARY work;
USE work.ALL;
USE work.BMG_TB_PKG.ALL;
ENTITY REGISTER_LOGIC_SROM IS
PORT(
Q : OUT STD_LOGIC;
CLK : IN STD_LOGIC;
RST : IN STD_LOGIC;
D : IN STD_LOGIC
);
END REGISTER_LOGIC_SROM;
ARCHITECTURE REGISTER_ARCH OF REGISTER_LOGIC_SROM IS
SIGNAL Q_O : STD_LOGIC :='0';
BEGIN
Q <= Q_O;
FF_BEH: PROCESS(CLK)
BEGIN
IF(RISING_EDGE(CLK)) THEN
IF(RST /= '0' ) THEN
Q_O <= '0';
ELSE
Q_O <= D;
END IF;
END IF;
END PROCESS;
END REGISTER_ARCH;
LIBRARY STD;
USE STD.TEXTIO.ALL;
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
--USE IEEE.NUMERIC_STD.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
USE IEEE.STD_LOGIC_MISC.ALL;
LIBRARY work;
USE work.ALL;
USE work.BMG_TB_PKG.ALL;
ENTITY BMG_STIM_GEN IS
GENERIC ( C_ROM_SYNTH : INTEGER := 0
);
PORT (
CLK : IN STD_LOGIC;
RST : IN STD_LOGIC;
ADDRA: OUT STD_LOGIC_VECTOR(31 DOWNTO 0) := (OTHERS => '0');
ENA : OUT STD_LOGIC :='0';
DATA_IN : IN STD_LOGIC_VECTOR (31 DOWNTO 0); --OUTPUT VECTOR
STATUS : OUT STD_LOGIC:= '0'
);
END BMG_STIM_GEN;
ARCHITECTURE BEHAVIORAL OF BMG_STIM_GEN IS
FUNCTION hex_to_std_logic_vector(
hex_str : STRING;
return_width : INTEGER)
RETURN STD_LOGIC_VECTOR IS
VARIABLE tmp : STD_LOGIC_VECTOR((hex_str'LENGTH*4)+return_width-1
DOWNTO 0);
BEGIN
tmp := (OTHERS => '0');
FOR i IN 1 TO hex_str'LENGTH LOOP
CASE hex_str((hex_str'LENGTH+1)-i) IS
WHEN '0' => tmp(i*4-1 DOWNTO (i-1)*4) := "0000";
WHEN '1' => tmp(i*4-1 DOWNTO (i-1)*4) := "0001";
WHEN '2' => tmp(i*4-1 DOWNTO (i-1)*4) := "0010";
WHEN '3' => tmp(i*4-1 DOWNTO (i-1)*4) := "0011";
WHEN '4' => tmp(i*4-1 DOWNTO (i-1)*4) := "0100";
WHEN '5' => tmp(i*4-1 DOWNTO (i-1)*4) := "0101";
WHEN '6' => tmp(i*4-1 DOWNTO (i-1)*4) := "0110";
WHEN '7' => tmp(i*4-1 DOWNTO (i-1)*4) := "0111";
WHEN '8' => tmp(i*4-1 DOWNTO (i-1)*4) := "1000";
WHEN '9' => tmp(i*4-1 DOWNTO (i-1)*4) := "1001";
WHEN 'a' | 'A' => tmp(i*4-1 DOWNTO (i-1)*4) := "1010";
WHEN 'b' | 'B' => tmp(i*4-1 DOWNTO (i-1)*4) := "1011";
WHEN 'c' | 'C' => tmp(i*4-1 DOWNTO (i-1)*4) := "1100";
WHEN 'd' | 'D' => tmp(i*4-1 DOWNTO (i-1)*4) := "1101";
WHEN 'e' | 'E' => tmp(i*4-1 DOWNTO (i-1)*4) := "1110";
WHEN 'f' | 'F' => tmp(i*4-1 DOWNTO (i-1)*4) := "1111";
WHEN OTHERS => tmp(i*4-1 DOWNTO (i-1)*4) := "1111";
END CASE;
END LOOP;
RETURN tmp(return_width-1 DOWNTO 0);
END hex_to_std_logic_vector;
CONSTANT ZERO : STD_LOGIC_VECTOR(31 DOWNTO 0) := (OTHERS => '0');
SIGNAL READ_ADDR_INT : STD_LOGIC_VECTOR(31 DOWNTO 0) := (OTHERS => '0');
SIGNAL READ_ADDR : STD_LOGIC_VECTOR(31 DOWNTO 0) := (OTHERS => '0');
SIGNAL CHECK_READ_ADDR : STD_LOGIC_VECTOR(31 DOWNTO 0) := (OTHERS => '0');
SIGNAL EXPECTED_DATA : STD_LOGIC_VECTOR(31 DOWNTO 0) := (OTHERS => '0');
SIGNAL DO_READ : STD_LOGIC := '0';
SIGNAL CHECK_DATA : STD_LOGIC := '0';
SIGNAL CHECK_DATA_R : STD_LOGIC := '0';
SIGNAL CHECK_DATA_2R : STD_LOGIC := '0';
SIGNAL DO_READ_REG: STD_LOGIC_VECTOR(4 DOWNTO 0) :=(OTHERS => '0');
CONSTANT DEFAULT_DATA : STD_LOGIC_VECTOR(31 DOWNTO 0):= hex_to_std_logic_vector("0",32);
BEGIN
SYNTH_COE: IF(C_ROM_SYNTH =0 ) GENERATE
type mem_type is array (127 downto 0) of std_logic_vector(31 downto 0);
FUNCTION bit_to_sl(input: BIT) RETURN STD_LOGIC IS
VARIABLE temp_return : STD_LOGIC;
BEGIN
IF (input = '0') THEN
temp_return := '0';
ELSE
temp_return := '1';
END IF;
RETURN temp_return;
END bit_to_sl;
function char_to_std_logic (
char : in character)
return std_logic is
variable data : std_logic;
begin
if char = '0' then
data := '0';
elsif char = '1' then
data := '1';
elsif char = 'X' then
data := 'X';
else
assert false
report "character which is not '0', '1' or 'X'."
severity warning;
data := 'U';
end if;
return data;
end char_to_std_logic;
impure FUNCTION init_memory( C_USE_DEFAULT_DATA : INTEGER;
C_LOAD_INIT_FILE : INTEGER ;
C_INIT_FILE_NAME : STRING ;
DEFAULT_DATA : STD_LOGIC_VECTOR(31 DOWNTO 0);
width : INTEGER;
depth : INTEGER)
RETURN mem_type IS
VARIABLE init_return : mem_type := (OTHERS => (OTHERS => '0'));
FILE init_file : TEXT;
VARIABLE mem_vector : BIT_VECTOR(width-1 DOWNTO 0);
VARIABLE bitline : LINE;
variable bitsgood : boolean := true;
variable bitchar : character;
VARIABLE i : INTEGER;
VARIABLE j : INTEGER;
BEGIN
--Display output message indicating that the behavioral model is being
--initialized
ASSERT (NOT (C_USE_DEFAULT_DATA=1 OR C_LOAD_INIT_FILE=1)) REPORT " Block Memory Generator CORE Generator module loading initial data..." SEVERITY NOTE;
-- Setup the default data
-- Default data is with respect to write_port_A and may be wider
-- or narrower than init_return width. The following loops map
-- default data into the memory
IF (C_USE_DEFAULT_DATA=1) THEN
FOR i IN 0 TO depth-1 LOOP
init_return(i) := DEFAULT_DATA;
END LOOP;
END IF;
-- Read in the .mif file
-- The init data is formatted with respect to write port A dimensions.
-- The init_return vector is formatted with respect to minimum width and
-- maximum depth; the following loops map the .mif file into the memory
IF (C_LOAD_INIT_FILE=1) THEN
file_open(init_file, C_INIT_FILE_NAME, read_mode);
i := 0;
WHILE (i < depth AND NOT endfile(init_file)) LOOP
mem_vector := (OTHERS => '0');
readline(init_file, bitline);
-- read(file_buffer, mem_vector(file_buffer'LENGTH-1 DOWNTO 0));
FOR j IN 0 TO width-1 LOOP
read(bitline,bitchar,bitsgood);
init_return(i)(width-1-j) := char_to_std_logic(bitchar);
END LOOP;
i := i + 1;
END LOOP;
file_close(init_file);
END IF;
RETURN init_return;
END FUNCTION;
--***************************************************************
-- convert bit to STD_LOGIC
--***************************************************************
constant c_init : mem_type := init_memory(0,
1,
"instructionMemory.mif",
DEFAULT_DATA,
32,
128);
constant rom : mem_type := c_init;
BEGIN
EXPECTED_DATA <= rom(conv_integer(unsigned(check_read_addr)));
CHECKER_RD_ADDR_GEN_INST:ENTITY work.ADDR_GEN
GENERIC MAP( C_MAX_DEPTH =>128 )
PORT MAP(
CLK => CLK,
RST => RST,
EN => CHECK_DATA_2R,
LOAD => '0',
LOAD_VALUE => ZERO,
ADDR_OUT => CHECK_READ_ADDR
);
PROCESS(CLK)
BEGIN
IF(RISING_EDGE(CLK)) THEN
IF(CHECK_DATA_2R ='1') THEN
IF(EXPECTED_DATA = DATA_IN) THEN
STATUS<='0';
ELSE
STATUS <= '1';
END IF;
END IF;
END IF;
END PROCESS;
END GENERATE;
-- Simulatable ROM
--Synthesizable ROM
SYNTH_CHECKER: IF(C_ROM_SYNTH = 1) GENERATE
PROCESS(CLK)
BEGIN
IF(RISING_EDGE(CLK)) THEN
IF(CHECK_DATA_2R='1') THEN
IF(DATA_IN=DEFAULT_DATA) THEN
STATUS <= '0';
ELSE
STATUS <= '1';
END IF;
END IF;
END IF;
END PROCESS;
END GENERATE;
READ_ADDR_INT(31 DOWNTO 0) <= READ_ADDR(31 DOWNTO 0);
ADDRA <= READ_ADDR_INT ;
CHECK_DATA <= DO_READ;
RD_ADDR_GEN_INST:ENTITY work.ADDR_GEN
GENERIC MAP( C_MAX_DEPTH => 128 )
PORT MAP(
CLK => CLK,
RST => RST,
EN => DO_READ,
LOAD => '0',
LOAD_VALUE => ZERO,
ADDR_OUT => READ_ADDR
);
RD_PROCESS: PROCESS (CLK)
BEGIN
IF (RISING_EDGE(CLK)) THEN
IF(RST='1') THEN
DO_READ <= '0';
ELSE
DO_READ <= '1';
END IF;
END IF;
END PROCESS;
BEGIN_SHIFT_REG: FOR I IN 0 TO 4 GENERATE
BEGIN
DFF_RIGHT: IF I=0 GENERATE
BEGIN
SHIFT_INST_0: ENTITY work.REGISTER_LOGIC_SROM
PORT MAP(
Q => DO_READ_REG(0),
CLK =>CLK,
RST=>RST,
D =>DO_READ
);
END GENERATE DFF_RIGHT;
DFF_OTHERS: IF ((I>0) AND (I<=4)) GENERATE
BEGIN
SHIFT_INST: ENTITY work.REGISTER_LOGIC_SROM
PORT MAP(
Q => DO_READ_REG(I),
CLK =>CLK,
RST=>RST,
D =>DO_READ_REG(I-1)
);
END GENERATE DFF_OTHERS;
END GENERATE BEGIN_SHIFT_REG;
CHECK_DATA_REG_1: ENTITY work.REGISTER_LOGIC_SROM
PORT MAP(
Q => CHECK_DATA_2R,
CLK =>CLK,
RST=>RST,
D =>CHECK_DATA_R
);
CHECK_DATA_REG: ENTITY work.REGISTER_LOGIC_SROM
PORT MAP(
Q => CHECK_DATA_R,
CLK =>CLK,
RST=>RST,
D =>CHECK_DATA
);
ENA <= DO_READ ;
END ARCHITECTURE;
|
gpl-3.0
|
DProvinciani/Arquitectura_TPF
|
Codigo_fuente/ipcore_dir/dataMemory/simulation/bmg_tb_pkg.vhd
|
101
|
6006
|
--------------------------------------------------------------------------------
--
-- BLK MEM GEN v7_3 Core - Testbench Package
--
--------------------------------------------------------------------------------
--
-- (c) Copyright 2006_3010 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
--------------------------------------------------------------------------------
--
-- Filename: bmg_tb_pkg.vhd
--
-- Description:
-- BMG Testbench Package files
--
--------------------------------------------------------------------------------
-- Author: IP Solutions Division
--
-- History: Sep 12, 2011 - First Release
--------------------------------------------------------------------------------
--
--------------------------------------------------------------------------------
-- Library Declarations
--------------------------------------------------------------------------------
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
PACKAGE BMG_TB_PKG IS
FUNCTION DIVROUNDUP (
DATA_VALUE : INTEGER;
DIVISOR : INTEGER)
RETURN INTEGER;
------------------------
FUNCTION IF_THEN_ELSE (
CONDITION : BOOLEAN;
TRUE_CASE : STD_LOGIC_VECTOR;
FALSE_CASE : STD_LOGIC_VECTOR)
RETURN STD_LOGIC_VECTOR;
------------------------
FUNCTION IF_THEN_ELSE (
CONDITION : BOOLEAN;
TRUE_CASE : STRING;
FALSE_CASE :STRING)
RETURN STRING;
------------------------
FUNCTION IF_THEN_ELSE (
CONDITION : BOOLEAN;
TRUE_CASE : STD_LOGIC;
FALSE_CASE :STD_LOGIC)
RETURN STD_LOGIC;
------------------------
FUNCTION IF_THEN_ELSE (
CONDITION : BOOLEAN;
TRUE_CASE : INTEGER;
FALSE_CASE : INTEGER)
RETURN INTEGER;
------------------------
FUNCTION LOG2ROUNDUP (
DATA_VALUE : INTEGER)
RETURN INTEGER;
END BMG_TB_PKG;
PACKAGE BODY BMG_TB_PKG IS
FUNCTION DIVROUNDUP (
DATA_VALUE : INTEGER;
DIVISOR : INTEGER)
RETURN INTEGER IS
VARIABLE DIV : INTEGER;
BEGIN
DIV := DATA_VALUE/DIVISOR;
IF ( (DATA_VALUE MOD DIVISOR) /= 0) THEN
DIV := DIV+1;
END IF;
RETURN DIV;
END DIVROUNDUP;
---------------------------------
FUNCTION IF_THEN_ELSE (
CONDITION : BOOLEAN;
TRUE_CASE : STD_LOGIC_VECTOR;
FALSE_CASE : STD_LOGIC_VECTOR)
RETURN STD_LOGIC_VECTOR IS
BEGIN
IF NOT CONDITION THEN
RETURN FALSE_CASE;
ELSE
RETURN TRUE_CASE;
END IF;
END IF_THEN_ELSE;
---------------------------------
FUNCTION IF_THEN_ELSE (
CONDITION : BOOLEAN;
TRUE_CASE : STD_LOGIC;
FALSE_CASE : STD_LOGIC)
RETURN STD_LOGIC IS
BEGIN
IF NOT CONDITION THEN
RETURN FALSE_CASE;
ELSE
RETURN TRUE_CASE;
END IF;
END IF_THEN_ELSE;
---------------------------------
FUNCTION IF_THEN_ELSE (
CONDITION : BOOLEAN;
TRUE_CASE : INTEGER;
FALSE_CASE : INTEGER)
RETURN INTEGER IS
VARIABLE RETVAL : INTEGER := 0;
BEGIN
IF CONDITION=FALSE THEN
RETVAL:=FALSE_CASE;
ELSE
RETVAL:=TRUE_CASE;
END IF;
RETURN RETVAL;
END IF_THEN_ELSE;
---------------------------------
FUNCTION IF_THEN_ELSE (
CONDITION : BOOLEAN;
TRUE_CASE : STRING;
FALSE_CASE : STRING)
RETURN STRING IS
BEGIN
IF NOT CONDITION THEN
RETURN FALSE_CASE;
ELSE
RETURN TRUE_CASE;
END IF;
END IF_THEN_ELSE;
-------------------------------
FUNCTION LOG2ROUNDUP (
DATA_VALUE : INTEGER)
RETURN INTEGER IS
VARIABLE WIDTH : INTEGER := 0;
VARIABLE CNT : INTEGER := 1;
BEGIN
IF (DATA_VALUE <= 1) THEN
WIDTH := 1;
ELSE
WHILE (CNT < DATA_VALUE) LOOP
WIDTH := WIDTH + 1;
CNT := CNT *2;
END LOOP;
END IF;
RETURN WIDTH;
END LOG2ROUNDUP;
END BMG_TB_PKG;
|
gpl-3.0
|
DProvinciani/Arquitectura_TPF
|
Codigo_fuente/ipcore_dir/dataMemory/simulation/bmg_stim_gen.vhd
|
1
|
7818
|
--------------------------------------------------------------------------------
--
-- BLK MEM GEN v7_3 Core - Stimulus Generator For Single Port Ram
--
--------------------------------------------------------------------------------
--
-- (c) Copyright 2006_3010 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
--------------------------------------------------------------------------------
--
-- Filename: bmg_stim_gen.vhd
--
-- Description:
-- Stimulus Generation For SRAM
-- 100 Writes and 100 Reads will be performed in a repeatitive loop till the
-- simulation ends
--
--------------------------------------------------------------------------------
-- Author: IP Solutions Division
--
-- History: Sep 12, 2011 - First Release
--------------------------------------------------------------------------------
--
--------------------------------------------------------------------------------
-- Library Declarations
--------------------------------------------------------------------------------
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
USE IEEE.STD_LOGIC_MISC.ALL;
LIBRARY work;
USE work.ALL;
USE work.BMG_TB_PKG.ALL;
ENTITY REGISTER_LOGIC_SRAM IS
PORT(
Q : OUT STD_LOGIC;
CLK : IN STD_LOGIC;
RST : IN STD_LOGIC;
D : IN STD_LOGIC
);
END REGISTER_LOGIC_SRAM;
ARCHITECTURE REGISTER_ARCH OF REGISTER_LOGIC_SRAM IS
SIGNAL Q_O : STD_LOGIC :='0';
BEGIN
Q <= Q_O;
FF_BEH: PROCESS(CLK)
BEGIN
IF(RISING_EDGE(CLK)) THEN
IF(RST ='1') THEN
Q_O <= '0';
ELSE
Q_O <= D;
END IF;
END IF;
END PROCESS;
END REGISTER_ARCH;
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
USE IEEE.STD_LOGIC_MISC.ALL;
LIBRARY work;
USE work.ALL;
USE work.BMG_TB_PKG.ALL;
ENTITY BMG_STIM_GEN IS
PORT (
CLK : IN STD_LOGIC;
RST : IN STD_LOGIC;
ADDRA : OUT STD_LOGIC_VECTOR(31 DOWNTO 0) := (OTHERS => '0');
DINA : OUT STD_LOGIC_VECTOR(31 DOWNTO 0) := (OTHERS => '0');
ENA : OUT STD_LOGIC :='0';
WEA : OUT STD_LOGIC_VECTOR (3 DOWNTO 0) := (OTHERS => '0');
CHECK_DATA: OUT STD_LOGIC:='0'
);
END BMG_STIM_GEN;
ARCHITECTURE BEHAVIORAL OF BMG_STIM_GEN IS
CONSTANT ZERO : STD_LOGIC_VECTOR(31 DOWNTO 0) := (OTHERS => '0');
CONSTANT DATA_PART_CNT_A: INTEGER:= DIVROUNDUP(32,32);
SIGNAL WRITE_ADDR : STD_LOGIC_VECTOR(31 DOWNTO 0) := (OTHERS => '0');
SIGNAL WRITE_ADDR_INT : STD_LOGIC_VECTOR(31 DOWNTO 0) := (OTHERS => '0');
SIGNAL READ_ADDR_INT : STD_LOGIC_VECTOR(31 DOWNTO 0) := (OTHERS => '0');
SIGNAL READ_ADDR : STD_LOGIC_VECTOR(31 DOWNTO 0) := (OTHERS => '0');
SIGNAL DINA_INT : STD_LOGIC_VECTOR(31 DOWNTO 0) := (OTHERS => '0');
SIGNAL DO_WRITE : STD_LOGIC := '0';
SIGNAL DO_READ : STD_LOGIC := '0';
SIGNAL COUNT_NO : INTEGER :=0;
SIGNAL DO_READ_REG : STD_LOGIC_VECTOR(4 DOWNTO 0) :=(OTHERS => '0');
SIGNAL WEA_VCC : STD_LOGIC_VECTOR(3 DOWNTO 0) :=(OTHERS => '1');
SIGNAL WEA_GND : STD_LOGIC_VECTOR(3 DOWNTO 0) :=(OTHERS => '0');
BEGIN
WRITE_ADDR_INT(31 DOWNTO 0) <= WRITE_ADDR(31 DOWNTO 0);
READ_ADDR_INT(31 DOWNTO 0) <= READ_ADDR(31 DOWNTO 0);
ADDRA <= IF_THEN_ELSE(DO_WRITE='1',WRITE_ADDR_INT,READ_ADDR_INT) ;
DINA <= DINA_INT ;
CHECK_DATA <= DO_READ;
RD_ADDR_GEN_INST:ENTITY work.ADDR_GEN
GENERIC MAP(
C_MAX_DEPTH => 64
)
PORT MAP(
CLK => CLK,
RST => RST,
EN => DO_READ,
LOAD => '0',
LOAD_VALUE => ZERO,
ADDR_OUT => READ_ADDR
);
WR_ADDR_GEN_INST:ENTITY work.ADDR_GEN
GENERIC MAP(
C_MAX_DEPTH => 64 )
PORT MAP(
CLK => CLK,
RST => RST,
EN => DO_WRITE,
LOAD => '0',
LOAD_VALUE => ZERO,
ADDR_OUT => WRITE_ADDR
);
WR_DATA_GEN_INST:ENTITY work.DATA_GEN
GENERIC MAP (
DATA_GEN_WIDTH => 32,
DOUT_WIDTH => 32,
DATA_PART_CNT => DATA_PART_CNT_A,
SEED => 2
)
PORT MAP (
CLK => CLK,
RST => RST,
EN => DO_WRITE,
DATA_OUT => DINA_INT
);
WR_RD_PROCESS: PROCESS (CLK)
BEGIN
IF(RISING_EDGE(CLK)) THEN
IF(RST='1') THEN
DO_WRITE <= '0';
DO_READ <= '0';
COUNT_NO <= 0 ;
ELSIF(COUNT_NO < 4) THEN
DO_WRITE <= '1';
DO_READ <= '0';
COUNT_NO <= COUNT_NO + 1;
ELSIF(COUNT_NO< 8) THEN
DO_WRITE <= '0';
DO_READ <= '1';
COUNT_NO <= COUNT_NO + 1;
ELSIF(COUNT_NO=8) THEN
DO_WRITE <= '0';
DO_READ <= '0';
COUNT_NO <= 0 ;
END IF;
END IF;
END PROCESS;
BEGIN_SHIFT_REG: FOR I IN 0 TO 4 GENERATE
BEGIN
DFF_RIGHT: IF I=0 GENERATE
BEGIN
SHIFT_INST_0: ENTITY work.REGISTER_LOGIC_SRAM
PORT MAP(
Q => DO_READ_REG(0),
CLK => CLK,
RST => RST,
D => DO_READ
);
END GENERATE DFF_RIGHT;
DFF_OTHERS: IF ((I>0) AND (I<=4)) GENERATE
BEGIN
SHIFT_INST: ENTITY work.REGISTER_LOGIC_SRAM
PORT MAP(
Q => DO_READ_REG(I),
CLK => CLK,
RST => RST,
D => DO_READ_REG(I-1)
);
END GENERATE DFF_OTHERS;
END GENERATE BEGIN_SHIFT_REG;
ENA <= DO_READ OR DO_WRITE ;
WEA <= IF_THEN_ELSE(DO_WRITE='1', WEA_VCC,WEA_GND) ;
END ARCHITECTURE;
|
gpl-3.0
|
DProvinciani/Arquitectura_TPF
|
Codigo_fuente/ipcore_dir/instructionMemory/simulation/addr_gen.vhd
|
101
|
4409
|
--------------------------------------------------------------------------------
--
-- BLK MEM GEN v7_3 Core - Address Generator
--
--------------------------------------------------------------------------------
--
-- (c) Copyright 2006_3010 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
--------------------------------------------------------------------------------
--
-- Filename: addr_gen.vhd
--
-- Description:
-- Address Generator
--
--------------------------------------------------------------------------------
-- Author: IP Solutions Division
--
-- History: Sep 12, 2011 - First Release
--------------------------------------------------------------------------------
--
--------------------------------------------------------------------------------
-- Library Declarations
--------------------------------------------------------------------------------
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
LIBRARY work;
USE work.ALL;
ENTITY ADDR_GEN IS
GENERIC ( C_MAX_DEPTH : INTEGER := 1024 ;
RST_VALUE : STD_LOGIC_VECTOR(31 DOWNTO 0) := (OTHERS=> '0');
RST_INC : INTEGER := 0);
PORT (
CLK : IN STD_LOGIC;
RST : IN STD_LOGIC;
EN : IN STD_LOGIC;
LOAD :IN STD_LOGIC;
LOAD_VALUE : IN STD_LOGIC_VECTOR (31 DOWNTO 0) := (OTHERS => '0');
ADDR_OUT : OUT STD_LOGIC_VECTOR (31 DOWNTO 0) --OUTPUT VECTOR
);
END ADDR_GEN;
ARCHITECTURE BEHAVIORAL OF ADDR_GEN IS
SIGNAL ADDR_TEMP : STD_LOGIC_VECTOR(31 DOWNTO 0) := (OTHERS =>'0');
BEGIN
ADDR_OUT <= ADDR_TEMP;
PROCESS(CLK)
BEGIN
IF(RISING_EDGE(CLK)) THEN
IF(RST='1') THEN
ADDR_TEMP<= RST_VALUE + conv_std_logic_vector(RST_INC,32 );
ELSE
IF(EN='1') THEN
IF(LOAD='1') THEN
ADDR_TEMP <=LOAD_VALUE;
ELSE
IF(ADDR_TEMP = C_MAX_DEPTH-1) THEN
ADDR_TEMP<= RST_VALUE + conv_std_logic_vector(RST_INC,32 );
ELSE
ADDR_TEMP <= ADDR_TEMP + '1';
END IF;
END IF;
END IF;
END IF;
END IF;
END PROCESS;
END ARCHITECTURE;
|
gpl-3.0
|
DProvinciani/Arquitectura_TPF
|
Codigo_fuente/ipcore_dir/instructionMemory/example_design/instructionMemory_exdes.vhd
|
1
|
4503
|
--------------------------------------------------------------------------------
--
-- BLK MEM GEN v7.1 Core - Top-level core wrapper
--
--------------------------------------------------------------------------------
--
-- (c) Copyright 2006-2010 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
--------------------------------------------------------------------------------
--
-- Filename: instructionMemory_exdes.vhd
--
-- Description:
-- This is the actual BMG core wrapper.
--
--------------------------------------------------------------------------------
-- Author: IP Solutions Division
--
-- History: August 31, 2005 - First Release
--------------------------------------------------------------------------------
--
--------------------------------------------------------------------------------
-- Library Declarations
--------------------------------------------------------------------------------
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
LIBRARY UNISIM;
USE UNISIM.VCOMPONENTS.ALL;
--------------------------------------------------------------------------------
-- Entity Declaration
--------------------------------------------------------------------------------
ENTITY instructionMemory_exdes IS
PORT (
--Inputs - Port A
ENA : IN STD_LOGIC; --opt port
ADDRA : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
DOUTA : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
CLKA : IN STD_LOGIC
);
END instructionMemory_exdes;
ARCHITECTURE xilinx OF instructionMemory_exdes IS
COMPONENT BUFG IS
PORT (
I : IN STD_ULOGIC;
O : OUT STD_ULOGIC
);
END COMPONENT;
COMPONENT instructionMemory IS
PORT (
--Port A
ENA : IN STD_LOGIC; --opt port
ADDRA : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
DOUTA : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
CLKA : IN STD_LOGIC
);
END COMPONENT;
SIGNAL CLKA_buf : STD_LOGIC;
SIGNAL CLKB_buf : STD_LOGIC;
SIGNAL S_ACLK_buf : STD_LOGIC;
BEGIN
bufg_A : BUFG
PORT MAP (
I => CLKA,
O => CLKA_buf
);
bmg0 : instructionMemory
PORT MAP (
--Port A
ENA => ENA,
ADDRA => ADDRA,
DOUTA => DOUTA,
CLKA => CLKA_buf
);
END xilinx;
|
gpl-3.0
|
Vadman97/ImageAES
|
des/DES/ipcore_dir/constants_mem/simulation/constants_mem_tb (Vadim-Laptop's conflicted copy 2017-04-27).vhd
|
1
|
4385
|
--------------------------------------------------------------------------------
--
-- BLK MEM GEN v7_3 Core - Top File for the Example Testbench
--
--------------------------------------------------------------------------------
--
-- (c) Copyright 2006_3010 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
--------------------------------------------------------------------------------
-- Filename: constants_mem_tb.vhd
-- Description:
-- Testbench Top
--------------------------------------------------------------------------------
-- Author: IP Solutions Division
--
-- History: Sep 12, 2011 - First Release
--------------------------------------------------------------------------------
--
--------------------------------------------------------------------------------
-- Library Declarations
--------------------------------------------------------------------------------
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
LIBRARY work;
USE work.ALL;
ENTITY constants_mem_tb IS
END ENTITY;
ARCHITECTURE constants_mem_tb_ARCH OF constants_mem_tb IS
SIGNAL STATUS : STD_LOGIC_VECTOR(8 DOWNTO 0);
SIGNAL CLK : STD_LOGIC := '1';
SIGNAL RESET : STD_LOGIC;
BEGIN
CLK_GEN: PROCESS BEGIN
CLK <= NOT CLK;
WAIT FOR 100 NS;
CLK <= NOT CLK;
WAIT FOR 100 NS;
END PROCESS;
RST_GEN: PROCESS BEGIN
RESET <= '1';
WAIT FOR 1000 NS;
RESET <= '0';
WAIT;
END PROCESS;
--STOP_SIM: PROCESS BEGIN
-- WAIT FOR 200 US; -- STOP SIMULATION AFTER 1 MS
-- ASSERT FALSE
-- REPORT "END SIMULATION TIME REACHED"
-- SEVERITY FAILURE;
--END PROCESS;
--
PROCESS BEGIN
WAIT UNTIL STATUS(8)='1';
IF( STATUS(7 downto 0)/="0") THEN
ASSERT false
REPORT "Test Completed Successfully"
SEVERITY NOTE;
REPORT "Simulation Failed"
SEVERITY FAILURE;
ELSE
ASSERT false
REPORT "TEST PASS"
SEVERITY NOTE;
REPORT "Test Completed Successfully"
SEVERITY FAILURE;
END IF;
END PROCESS;
constants_mem_synth_inst:ENTITY work.constants_mem_synth
GENERIC MAP (C_ROM_SYNTH => 0)
PORT MAP(
CLK_IN => CLK,
RESET_IN => RESET,
STATUS => STATUS
);
END ARCHITECTURE;
|
gpl-3.0
|
alphaFred/Sejits4Fpgas
|
sejits4fpgas/hw/user/BasicArith.vhd
|
1
|
12635
|
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;
library UNIMACRO;
use UNIMACRO.vcomponents.all;
Library UNISIM;
use UNISIM.vcomponents.all;
ENTITY BasicArith IS
GENERIC (
OP : integer
);
PORT (
CLK : in STD_LOGIC;
RST : in STD_LOGIC;
VALID_IN : in STD_LOGIC;
READY_IN : in std_logic;
LEFT : in STD_LOGIC_VECTOR(7 downto 0);
RIGHT : in STD_LOGIC_VECTOR(7 downto 0);
VALID_OUT : out STD_LOGIC;
READY_OUT : out std_logic;
BINOP_OUT : out STD_LOGIC_VECTOR(7 downto 0)
);
END BasicArith;
ARCHITECTURE BasicArith_Behave OF BasicArith IS
-- BEGIN DSP48E1_inst_1
signal MULTISIGNOUT_DSP1 : std_logic;
signal CARRYCASCOUT_DSP1 : std_logic;
--
signal OVERFLOW_DSP1 : std_logic;
signal PATTERNBDETECT_DSP1 : std_logic;
signal PATTERNDETECT_DSP1 : std_logic;
signal UNDERFLOW_DSP1 : std_logic;
--
signal P_DSP1 : std_logic_vector(47 downto 0);
--
signal ACIN_DSP1 : std_logic_vector(29 downto 0) := (others => '0');
signal BCIN_DSP1 : std_logic_vector(17 downto 0) := (others => '0');
--
signal ACOUT_DSP1 : std_logic_vector(29 downto 0);
signal BCOUT_DSP1 : std_logic_vector(17 downto 0);
--
signal CARRYCASCIN_DSP1 : std_logic := '0';
signal MULTISIGNIN_DSP1 : std_logic := '0';
signal PCIN_DSP1 : std_logic_vector(47 downto 0) := (others => '0');
signal PCOUT_DSP1 : std_logic_vector(47 downto 0);
--
signal ALUMODE_DSP1 : std_logic_vector(3 downto 0) := (others => '0');
signal CARRYINSEL_DSP1 : std_logic_vector(2 downto 0) := (others => '0');
signal INMODE_DSP1 : std_logic_vector(4 downto 0) := (others => '0');
signal OPMODE_DSP1 : std_logic_vector(6 downto 0) := (others => '0');
--
signal A_DSP1 : std_logic_vector(29 downto 0) := (others => '0');
signal B_DSP1 : std_logic_vector(17 downto 0) := (others => '0');
signal C_DSP1 : std_logic_vector(47 downto 0) := (others => '0');
signal CARRYIN_DSP1 : std_logic := '0';
signal D_DSP1 : std_logic_vector(24 downto 0) := (others => '0');
-- END DSP48E1_inst_1
constant DELAY_ADD_SUB : positive := 3;
constant DELAY_MUL : positive := 4;
--
TYPE iBus_ADD_SUB is array(DELAY_ADD_SUB-1 downto 0) of std_logic;
TYPE iBus_MUL is array(DELAY_MUL-1 downto 0) of std_logic;
--
signal ValidsRegBus_ADD_SUB : iBus_ADD_SUB := (others => '0');
signal ValidsRegBus_MUL : iBus_MUL := (others => '0');
--
COMPONENT logic_dff_block
Port (
D : in STD_LOGIC;
CLK : in STD_LOGIC;
RST : in STD_LOGIC;
Q : out STD_LOGIC
);
END COMPONENT;
BEGIN
DSP48E1_inst_1 : DSP48E1
generic map (
A_INPUT => "DIRECT",
B_INPUT => "DIRECT",
USE_DPORT => FALSE,
USE_MULT => "MULTIPLY",
USE_SIMD => "ONE48",
AUTORESET_PATDET => "NO_RESET",
MASK => X"0000000000ff",
PATTERN => X"000000000000",
SEL_MASK => "MASK",
SEL_PATTERN => "PATTERN",
USE_PATTERN_DETECT => "PATDET",
ACASCREG => 1,
ADREG => 1,
ALUMODEREG => 1,
AREG => 1,
BCASCREG => 1,
BREG => 1,
CARRYINREG => 1,
CARRYINSELREG => 1,
CREG => 1,
DREG => 1,
INMODEREG => 1,
MREG => 1,
OPMODEREG => 1,
PREG => 1
)
port map (
-- Cascade: 30-bit (each) output: Cascade Ports
ACOUT => ACOUT_DSP1,
BCOUT => BCOUT_DSP1,
CARRYCASCOUT => CARRYCASCOUT_DSP1,
MULTSIGNOUT => MULTISIGNOUT_DSP1,
PCOUT => PCOUT_DSP1,
-- Control: 1-bit (each) output: Control Inputs/Status Bits
OVERFLOW => OVERFLOW_DSP1,
PATTERNBDETECT => PATTERNBDETECT_DSP1,
PATTERNDETECT => PATTERNDETECT_DSP1,
UNDERFLOW => UNDERFLOW_DSP1,
-- Data: 4-bit (each) output: Data Ports
CARRYOUT => open,
P => P_DSP1,
-- Cascade: 30-bit (each) input: Cascade Ports
ACIN => ACIN_DSP1,
BCIN => BCIN_DSP1,
CARRYCASCIN => CARRYCASCIN_DSP1,
MULTSIGNIN => MULTISIGNIN_DSP1,
PCIN => PCIN_DSP1,
-- Control: 4-bit (each) input: Control Inputs/Status Bits
ALUMODE => ALUMODE_DSP1,
CARRYINSEL => CARRYINSEL_DSP1,
CLK => CLK,
INMODE => INMODE_DSP1,
OPMODE => OPMODE_DSP1,
-- Data: 30-bit (each) input: Data Ports
A => A_DSP1,
B => B_DSP1,
C => C_DSP1,
CARRYIN => CARRYIN_DSP1,
D => D_DSP1,
-- Reset/Clock Enable: 1-bit (each) input: Reset/Clock Enable Inputs
CEA1 => '1',
CEA2 => '1',
CEAD => '1',
CEALUMODE => '1',
CEB1 => '1',
CEB2 => '1',
CEC => '1',
CECARRYIN => '1',
CECTRL => '1',
CED => '1',
CEINMODE => '1',
CEM => '1',
CEP => '1',
RSTA => RST,
RSTALLCARRYIN => RST,
RSTALUMODE => RST,
RSTB => RST,
RSTC => RST,
RSTCTRL => RST,
RSTD => RST,
RSTINMODE => RST,
RSTM => RST,
RSTP => RST
);
validReg_ADD: if OP = 0 generate
begin
validReg_ADD_int: for i in 0 to DELAY_ADD_SUB generate
begin
validdffLeft_ADD: if i = 0 generate
begin
valid_dff: component logic_dff_block
port map (
D => VALID_IN,
CLK => CLK,
RST => RST,
Q => ValidsRegBus_ADD_SUB(i)
);
end generate validdffLeft_ADD;
--
dffOthers_ADD: if (i > 0 AND i < DELAY_ADD_SUB) generate
begin
valid_dff: component logic_dff_block
port map (
D => ValidsRegBus_ADD_SUB(i-1),
CLK => CLK,
RST => RST,
Q => ValidsRegBus_ADD_SUB(i)
);
end generate dffOthers_ADD;
--
dffRight_ADD: if i = DELAY_ADD_SUB generate
begin
valid_dff: component logic_dff_block
port map (
D => ValidsRegBus_ADD_SUB(i-1),
CLK => CLK,
RST => RST,
Q => VALID_OUT
);
end generate dffRight_ADD;
end generate validReg_ADD_int;
end generate validReg_ADD;
validReg_SUB: if OP = 1 generate
begin
validReg_SUB_int: for i in 0 to DELAY_ADD_SUB generate
begin
validdffLeft_SUB: if i = 0 generate
begin
valid_dff: component logic_dff_block
port map (
D => VALID_IN,
CLK => CLK,
RST => RST,
Q => ValidsRegBus_ADD_SUB(i)
);
end generate validdffLeft_SUB;
--
dffOthers_SUB: if (i > 0 AND i < DELAY_ADD_SUB) generate
begin
valid_dff: component logic_dff_block
port map (
D => ValidsRegBus_ADD_SUB(i-1),
CLK => CLK,
RST => RST,
Q => ValidsRegBus_ADD_SUB(i)
);
end generate dffOthers_SUB;
--
dffRight_SUB: if i = DELAY_ADD_SUB generate
begin
valid_dff: component logic_dff_block
port map (
D => ValidsRegBus_ADD_SUB(i-1),
CLK => CLK,
RST => RST,
Q => VALID_OUT
);
end generate dffRight_SUB;
end generate validReg_SUB_int;
end generate validReg_SUB;
validReg_MUL: if OP = 2 generate
begin
validReg_MUL_int: for i in 0 to DELAY_MUL generate
begin
validdffLeft_MUL: if i = 0 generate
begin
valid_dff: component logic_dff_block
port map (
D => VALID_IN,
CLK => CLK,
RST => RST,
Q => ValidsRegBus_MUL(i)
);
end generate validdffLeft_MUL;
--
dffOthers_MUL: if (i > 0 AND i < DELAY_MUL) generate
begin
valid_dff: component logic_dff_block
port map (
D => ValidsRegBus_MUL(i-1),
CLK => CLK,
RST => RST,
Q => ValidsRegBus_MUL(i)
);
end generate dffOthers_MUL;
--
dffRight_MUL: if i = DELAY_MUL generate
begin
valid_dff: component logic_dff_block
port map (
D => ValidsRegBus_MUL(i-1),
CLK => CLK,
RST => RST,
Q => VALID_OUT
);
end generate dffRight_MUL;
end generate validReg_MUL_int;
end generate validReg_MUL;
OP0:IF OP = 0 GENERATE
-- OP = 0 => Add
INMODE_DSP1 <= "00000";
OPMODE_DSP1 <= "0110011"; -- (Z=C | Y=0 | X=A:B)
ALUMODE_DSP1 <= "0000"; -- Z + X + Y + CIN
END GENERATE;
OP1:IF OP = 1 GENERATE
-- OP = 1 => Substract
INMODE_DSP1 <= "00000";
OPMODE_DSP1 <= "0110011"; -- (Z=C | Y=0 | X=A:B)
ALUMODE_DSP1 <= "0011"; -- Z – (X + Y + CIN)
END GENERATE;
OP2:IF OP = 2 GENERATE
-- OP = 2 => Multiply
INMODE_DSP1 <= "10001"; -- Multiplyer Inport: B1 | A1
OPMODE_DSP1 <= "0000101"; -- (Z=0 | Y=M | X=M)
ALUMODE_DSP1 <= "0000"; -- Z + X + Y + CIN
END GENERATE;
run : PROCESS (CLK)
BEGIN
IF CLK'EVENT AND CLK = '1' THEN
IF OP = 0 THEN
A_DSP1 <= (29 downto 0 => '0');
-- Pack RIGHT input into A:B
B_DSP1 <= (17 downto 8 => '0') & RIGHT;
-- B_DSP1 <= (17 downto 8 => '0') & RIGHT;
-- Pack LEFT input into C
C_DSP1 <= (47 downto 8 => '0') & LEFT;
ELSIF OP = 1 THEN
A_DSP1 <= (29 downto 0 => '0');
-- Pack RIGHT input into A:B
B_DSP1 <= (17 downto 8 => '0') & RIGHT;
-- Pack LEFT input into C
C_DSP1 <= (47 downto 8 => '0') & LEFT;
ELSIF OP = 2 THEN
C_DSP1 <= (47 downto 0 => '0');
-- Pack RIGHT input into A:B
A_DSP1 <= (29 downto 8 => '0') & LEFT;
B_DSP1 <= (17 downto 8 => '0') & RIGHT;
ELSE
A_DSP1 <= (29 downto 0 => '0');
-- Pack RIGHT input into A:B
B_DSP1 <= (17 downto 8 => '0') & RIGHT;
-- Pack LEFT input into C
C_DSP1 <= (47 downto 8 => '0') & LEFT;
END IF;
--
IF signed(P_DSP1) > 255 THEN
BINOP_OUT <= (others => '1');
ELSIF signed(P_DSP1) < 0 THEN
BINOP_OUT <= (others => '0');
ELSE
BINOP_OUT <= P_DSP1(7 downto 0);
END IF;
END IF;
END PROCESS;
READY_OUT <= READY_IN;
END BasicArith_Behave;
|
gpl-3.0
|
agostini01/FPGA_Neural-Network
|
source_files/serial/controller.vhd
|
1
|
20952
|
--=============================================================================
-- This file is part of FPGA_NEURAL-Network.
--
-- FPGA_NEURAL-Network is free software: you can redistribute it and/or
-- modify it under the terms of the GNU General Public License as published
-- by the Free Software Foundation, either version 3 of the License, or
-- (at your option) any later version.
--
-- FPGA_NEURAL-Network is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with FPGA_NEURAL-Network.
-- If not, see <http://www.gnu.org/licenses/>.
--=============================================================================
-- FILE NAME : controller.vhd
-- PROJECT : FPGA_NEURAL-Network
-- ENTITY : controller
-- ARCHITECTURE : behaviour
--=============================================================================
-- AUTORS(s) : Barbosa, F
-- DEPARTMENT : Electrical Engineering (UFRGS)
-- DATE : DEC 10, 2014
--=============================================================================
-- Description:
--
--=============================================================================
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
use ieee.numeric_std.all;
--=============================================================================
-- Entity declaration for NN_INSTANCE
--=============================================================================
entity controller is
port (
-- async receiver/transmitter com ports
clk : in std_logic;
rxReady : in std_logic;
rxData : in std_logic_vector(7 downto 0); -- command string (character)
txBusy : in std_logic;
txStart : out std_logic;
txData : out std_logic_vector(7 downto 0);
-- LEDs (for debugging)
leds : out std_logic_vector (17 downto 0);
-- control ports
NN_start : out std_logic; -- 0 - stop / 1 - start neural net
NN_sample : out std_logic_vector (7 downto 0);
NN_result : in std_logic_vector (1 downto 0);
NN_expected : in std_logic_vector (1 downto 0);
NN_ready : in std_logic
);
end controller;
--=============================================================================
-- architecture declaration
--=============================================================================
architecture behaviour of controller is
constant MSG_BEGIN_STR : string := LF & CR & "Welcome to FPGA_Neural-Network! Press r/R to run: ";
constant MSG_RESULT1_STR: string := " - neural net result: ";
constant MSG_RESULT2_STR: string := " / correct result: ";
constant MSG_ERROR1_STR : string := LF & LF & CR & "Number of errors: ";
constant MSG_ERROR2_STR : string := "/178";
type T_MESSAGE is (
MSG_BEGIN,
MSG_RESULT,
MSG_ERROR
);
-- define the states of controller
type T_STATE is (
s_begin,
s_load_sample,
s_wait_load, -- wait until loading is done
s_print, -- print last result
s_error, -- print number of errors
s_end,
-- serial i/o states
s_read,
s_write1,
s_write2
);
shared variable len : integer := 1;
shared variable message : T_MESSAGE := MSG_BEGIN;
shared variable ioCount : integer := 0;
shared variable data : string(1 to 256);
shared variable result : string(1 to 2);
shared variable expected : string(1 to 2);
shared variable error_str : string(1 to 3);
shared variable sample_str : string(1 to 3);
signal error_count : integer range 0 to 178;
signal sample_count : integer range 0 to 178;
signal state : T_STATE := s_begin;
signal next_state : T_STATE := s_begin;
--=============================================================================
-- architecture begin
--=============================================================================
begin
-- combinational logic
with state select
NN_start <= '1' when s_load_sample,
'0' when others;
NN_sample <= conv_std_logic_vector(sample_count, 8);
-- handles control and serial logic
state_reg : process(clk)
begin
if (clk'event and clk='1') then
case state is
when s_begin =>
message := MSG_BEGIN; -- welcome message
state <= s_write1; -- write it
next_state <= s_read; -- after writing waits for user input
leds(9 downto 0) <= "0000000001"; --0
error_count <= 0;
when s_load_sample => -- loads one sample
leds(9 downto 0) <= "0000000010"; --1
if sample_count >= 178 then
state <= s_error;
else
sample_count <= sample_count + 1;
state <= s_wait_load;
end if;
when s_wait_load => -- waits for NN to finish calculating
leds(9 downto 0) <= "0000000100"; --2
if NN_ready = '1' then
state <= s_print; -- prints the result
if NN_result /= NN_expected then
error_count <= error_count + 1;
end if;
else
state <= s_wait_load;
end if;
when s_print =>
leds(9 downto 0) <= "0000001000"; --3
message := MSG_RESULT;
state <= s_write1; -- prints result for one sample
next_state <= s_load_sample; -- after printing load next sample
when s_error =>
leds(9 downto 0) <= "0000010000"; --4
message := MSG_ERROR;
state <= s_write1; -- prints number of erros
next_state <= s_end; -- after printing go to final state
when s_end =>
leds(9 downto 0) <= "0000100000"; --5
state <= s_end;
when s_read => -- read user command (rxData)
leds(9 downto 0) <= "0001000000"; --6
-- wait for character (rxReady)
if(rxReady = '1') then
-- generate a start pulse if user selects r/R
if(rxData = "01110010" or rxData = "01010010") then -- r/R (72/52 in hex)
state <= s_load_sample; -- run neural net
end if;
end if;
-- output string
when s_write1 =>
leds(9 downto 0) <= "0010000000"; --7
if (txBusy = '0') then
if (len > 1 and data(1) /= '0') then
txData <= std_logic_vector(to_unsigned(character'pos(data(ioCount)),8));
txStart <= '1';
state <= s_write2;
else
state <= next_state;
end if;
end if;
-- output string
when s_write2 =>
leds(9 downto 0) <= "0100000000"; --8
txStart <= '0';
if (ioCount < len) then
ioCount := ioCount + 1;
state <= s_write1;
else
ioCount := 0;
state <= next_state; -- go to next_state in the FSM list
end if;
when others =>
leds(9 downto 0) <= "1000000000"; --9
null;
end case;
case NN_result is
when "00" => result := "00";
when "01" => result := "01";
when "10" => result := "10";
when "11" => result := "11";
end case;
case NN_expected is
when "00" => expected := "00";
when "01" => expected := "01";
when "10" => expected := "10";
when "11" => expected := "11";
end case;
case sample_count is
when 0 => sample_str := "000";
when 1 => sample_str := "001";
when 2 => sample_str := "002";
when 3 => sample_str := "003";
when 4 => sample_str := "004";
when 5 => sample_str := "005";
when 6 => sample_str := "006";
when 7 => sample_str := "007";
when 8 => sample_str := "008";
when 9 => sample_str := "009";
when 10 => sample_str := "010";
when 11 => sample_str := "011";
when 12 => sample_str := "012";
when 13 => sample_str := "013";
when 14 => sample_str := "014";
when 15 => sample_str := "015";
when 16 => sample_str := "016";
when 17 => sample_str := "017";
when 18 => sample_str := "018";
when 19 => sample_str := "019";
when 20 => sample_str := "020";
when 21 => sample_str := "021";
when 22 => sample_str := "022";
when 23 => sample_str := "023";
when 24 => sample_str := "024";
when 25 => sample_str := "025";
when 26 => sample_str := "026";
when 27 => sample_str := "027";
when 28 => sample_str := "028";
when 29 => sample_str := "029";
when 30 => sample_str := "030";
when 31 => sample_str := "031";
when 32 => sample_str := "032";
when 33 => sample_str := "033";
when 34 => sample_str := "034";
when 35 => sample_str := "035";
when 36 => sample_str := "036";
when 37 => sample_str := "037";
when 38 => sample_str := "038";
when 39 => sample_str := "039";
when 40 => sample_str := "040";
when 41 => sample_str := "041";
when 42 => sample_str := "042";
when 43 => sample_str := "043";
when 44 => sample_str := "044";
when 45 => sample_str := "045";
when 46 => sample_str := "046";
when 47 => sample_str := "047";
when 48 => sample_str := "048";
when 49 => sample_str := "049";
when 50 => sample_str := "050";
when 51 => sample_str := "051";
when 52 => sample_str := "052";
when 53 => sample_str := "053";
when 54 => sample_str := "054";
when 55 => sample_str := "055";
when 56 => sample_str := "056";
when 57 => sample_str := "057";
when 58 => sample_str := "058";
when 59 => sample_str := "059";
when 60 => sample_str := "060";
when 61 => sample_str := "061";
when 62 => sample_str := "062";
when 63 => sample_str := "063";
when 64 => sample_str := "064";
when 65 => sample_str := "065";
when 66 => sample_str := "066";
when 67 => sample_str := "067";
when 68 => sample_str := "068";
when 69 => sample_str := "069";
when 70 => sample_str := "070";
when 71 => sample_str := "071";
when 72 => sample_str := "072";
when 73 => sample_str := "073";
when 74 => sample_str := "074";
when 75 => sample_str := "075";
when 76 => sample_str := "076";
when 77 => sample_str := "077";
when 78 => sample_str := "078";
when 79 => sample_str := "079";
when 80 => sample_str := "080";
when 81 => sample_str := "081";
when 82 => sample_str := "082";
when 83 => sample_str := "083";
when 84 => sample_str := "084";
when 85 => sample_str := "085";
when 86 => sample_str := "086";
when 87 => sample_str := "087";
when 88 => sample_str := "088";
when 89 => sample_str := "089";
when 90 => sample_str := "090";
when 91 => sample_str := "091";
when 92 => sample_str := "092";
when 93 => sample_str := "093";
when 94 => sample_str := "094";
when 95 => sample_str := "095";
when 96 => sample_str := "096";
when 97 => sample_str := "097";
when 98 => sample_str := "098";
when 99 => sample_str := "099";
when 100 => sample_str := "100";
when 101 => sample_str := "101";
when 102 => sample_str := "102";
when 103 => sample_str := "103";
when 104 => sample_str := "104";
when 105 => sample_str := "105";
when 106 => sample_str := "106";
when 107 => sample_str := "107";
when 108 => sample_str := "108";
when 109 => sample_str := "109";
when 110 => sample_str := "110";
when 111 => sample_str := "111";
when 112 => sample_str := "112";
when 113 => sample_str := "113";
when 114 => sample_str := "114";
when 115 => sample_str := "115";
when 116 => sample_str := "116";
when 117 => sample_str := "117";
when 118 => sample_str := "118";
when 119 => sample_str := "119";
when 120 => sample_str := "120";
when 121 => sample_str := "121";
when 122 => sample_str := "122";
when 123 => sample_str := "123";
when 124 => sample_str := "124";
when 125 => sample_str := "125";
when 126 => sample_str := "126";
when 127 => sample_str := "127";
when 128 => sample_str := "128";
when 129 => sample_str := "129";
when 130 => sample_str := "130";
when 131 => sample_str := "131";
when 132 => sample_str := "132";
when 133 => sample_str := "133";
when 134 => sample_str := "134";
when 135 => sample_str := "135";
when 136 => sample_str := "136";
when 137 => sample_str := "137";
when 138 => sample_str := "138";
when 139 => sample_str := "139";
when 140 => sample_str := "140";
when 141 => sample_str := "141";
when 142 => sample_str := "142";
when 143 => sample_str := "143";
when 144 => sample_str := "144";
when 145 => sample_str := "145";
when 146 => sample_str := "146";
when 147 => sample_str := "147";
when 148 => sample_str := "148";
when 149 => sample_str := "149";
when 150 => sample_str := "150";
when 151 => sample_str := "151";
when 152 => sample_str := "152";
when 153 => sample_str := "153";
when 154 => sample_str := "154";
when 155 => sample_str := "155";
when 156 => sample_str := "156";
when 157 => sample_str := "157";
when 158 => sample_str := "158";
when 159 => sample_str := "159";
when 160 => sample_str := "160";
when 161 => sample_str := "161";
when 162 => sample_str := "162";
when 163 => sample_str := "163";
when 164 => sample_str := "164";
when 165 => sample_str := "165";
when 166 => sample_str := "166";
when 167 => sample_str := "167";
when 168 => sample_str := "168";
when 169 => sample_str := "169";
when 170 => sample_str := "170";
when 171 => sample_str := "171";
when 172 => sample_str := "172";
when 173 => sample_str := "173";
when 174 => sample_str := "174";
when 175 => sample_str := "175";
when 176 => sample_str := "176";
when 177 => sample_str := "177";
when 178 => sample_str := "178";
end case;
case error_count is
when 0 => error_str := "000";
when 1 => error_str := "001";
when 2 => error_str := "002";
when 3 => error_str := "003";
when 4 => error_str := "004";
when 5 => error_str := "005";
when 6 => error_str := "006";
when 7 => error_str := "007";
when 8 => error_str := "008";
when 9 => error_str := "009";
when 10 => error_str := "010";
when 11 => error_str := "011";
when 12 => error_str := "012";
when 13 => error_str := "013";
when 14 => error_str := "014";
when 15 => error_str := "015";
when 16 => error_str := "016";
when 17 => error_str := "017";
when 18 => error_str := "018";
when 19 => error_str := "019";
when 20 => error_str := "020";
when 21 => error_str := "021";
when 22 => error_str := "022";
when 23 => error_str := "023";
when 24 => error_str := "024";
when 25 => error_str := "025";
when 26 => error_str := "026";
when 27 => error_str := "027";
when 28 => error_str := "028";
when 29 => error_str := "029";
when 30 => error_str := "030";
when 31 => error_str := "031";
when 32 => error_str := "032";
when 33 => error_str := "033";
when 34 => error_str := "034";
when 35 => error_str := "035";
when 36 => error_str := "036";
when 37 => error_str := "037";
when 38 => error_str := "038";
when 39 => error_str := "039";
when 40 => error_str := "040";
when 41 => error_str := "041";
when 42 => error_str := "042";
when 43 => error_str := "043";
when 44 => error_str := "044";
when 45 => error_str := "045";
when 46 => error_str := "046";
when 47 => error_str := "047";
when 48 => error_str := "048";
when 49 => error_str := "049";
when 50 => error_str := "050";
when 51 => error_str := "051";
when 52 => error_str := "052";
when 53 => error_str := "053";
when 54 => error_str := "054";
when 55 => error_str := "055";
when 56 => error_str := "056";
when 57 => error_str := "057";
when 58 => error_str := "058";
when 59 => error_str := "059";
when 60 => error_str := "060";
when 61 => error_str := "061";
when 62 => error_str := "062";
when 63 => error_str := "063";
when 64 => error_str := "064";
when 65 => error_str := "065";
when 66 => error_str := "066";
when 67 => error_str := "067";
when 68 => error_str := "068";
when 69 => error_str := "069";
when 70 => error_str := "070";
when 71 => error_str := "071";
when 72 => error_str := "072";
when 73 => error_str := "073";
when 74 => error_str := "074";
when 75 => error_str := "075";
when 76 => error_str := "076";
when 77 => error_str := "077";
when 78 => error_str := "078";
when 79 => error_str := "079";
when 80 => error_str := "080";
when 81 => error_str := "081";
when 82 => error_str := "082";
when 83 => error_str := "083";
when 84 => error_str := "084";
when 85 => error_str := "085";
when 86 => error_str := "086";
when 87 => error_str := "087";
when 88 => error_str := "088";
when 89 => error_str := "089";
when 90 => error_str := "090";
when 91 => error_str := "091";
when 92 => error_str := "092";
when 93 => error_str := "093";
when 94 => error_str := "094";
when 95 => error_str := "095";
when 96 => error_str := "096";
when 97 => error_str := "097";
when 98 => error_str := "098";
when 99 => error_str := "099";
when 100 => error_str := "100";
when 101 => error_str := "101";
when 102 => error_str := "102";
when 103 => error_str := "103";
when 104 => error_str := "104";
when 105 => error_str := "105";
when 106 => error_str := "106";
when 107 => error_str := "107";
when 108 => error_str := "108";
when 109 => error_str := "109";
when 110 => error_str := "110";
when 111 => error_str := "111";
when 112 => error_str := "112";
when 113 => error_str := "113";
when 114 => error_str := "114";
when 115 => error_str := "115";
when 116 => error_str := "116";
when 117 => error_str := "117";
when 118 => error_str := "118";
when 119 => error_str := "119";
when 120 => error_str := "120";
when 121 => error_str := "121";
when 122 => error_str := "122";
when 123 => error_str := "123";
when 124 => error_str := "124";
when 125 => error_str := "125";
when 126 => error_str := "126";
when 127 => error_str := "127";
when 128 => error_str := "128";
when 129 => error_str := "129";
when 130 => error_str := "130";
when 131 => error_str := "131";
when 132 => error_str := "132";
when 133 => error_str := "133";
when 134 => error_str := "134";
when 135 => error_str := "135";
when 136 => error_str := "136";
when 137 => error_str := "137";
when 138 => error_str := "138";
when 139 => error_str := "139";
when 140 => error_str := "140";
when 141 => error_str := "141";
when 142 => error_str := "142";
when 143 => error_str := "143";
when 144 => error_str := "144";
when 145 => error_str := "145";
when 146 => error_str := "146";
when 147 => error_str := "147";
when 148 => error_str := "148";
when 149 => error_str := "149";
when 150 => error_str := "150";
when 151 => error_str := "151";
when 152 => error_str := "152";
when 153 => error_str := "153";
when 154 => error_str := "154";
when 155 => error_str := "155";
when 156 => error_str := "156";
when 157 => error_str := "157";
when 158 => error_str := "158";
when 159 => error_str := "159";
when 160 => error_str := "160";
when 161 => error_str := "161";
when 162 => error_str := "162";
when 163 => error_str := "163";
when 164 => error_str := "164";
when 165 => error_str := "165";
when 166 => error_str := "166";
when 167 => error_str := "167";
when 168 => error_str := "168";
when 169 => error_str := "169";
when 170 => error_str := "170";
when 171 => error_str := "171";
when 172 => error_str := "172";
when 173 => error_str := "173";
when 174 => error_str := "174";
when 175 => error_str := "175";
when 176 => error_str := "176";
when 177 => error_str := "177";
when 178 => error_str := "178";
end case;
-- select message to write on screen
len := 0;
data := (others => '0');
case message is
when MSG_BEGIN =>
len := MSG_BEGIN_STR'length;
data(1 to len) := MSG_BEGIN_STR;
when MSG_RESULT =>
len := MSG_RESULT1_STR'length + MSG_RESULT2_STR'length + sample_str'length + 9;
data(1 to len) := LF & CR & sample_str & MSG_RESULT1_STR & result & MSG_RESULT2_STR & expected & " : ";
when MSG_ERROR =>
len := MSG_ERROR1_STR'length + MSG_ERROR2_STR'length + error_str'length;
data(1 to len) := MSG_ERROR1_STR & error_str & MSG_ERROR2_STR;
when others => null;
end case;
end if;
end process;
end behaviour;
--=============================================================================
-- architecture end
--=============================================================================
|
gpl-3.0
|
unhold/hdl
|
vhdl/tb_pack.vhd
|
1
|
3706
|
library work;
use work.rtl_pack.all;
library std;
use std.textio.all;
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use ieee.std_logic_textio.all;
--! General purpose definitions and functions for testbenches.
package tb_pack is
--! Default clock frequency.
constant clk_freq_c : positive := 100e6;
--! Default clock time.
constant clk_time_c : delay_length := 1 sec / clk_freq_c;
--! Default reset time.
constant rst_time_c : delay_length := 20 ns;
function to_hstring(number : natural) return string;
function to_hstring(value : std_ulogic_vector) return string;
function to_hstring(value : std_logic_vector) return string;
function to_hstring(value : unsigned) return string;
function to_hstring(value : signed) return string;
procedure clk_gen(signal clk: inout std_ulogic; run : in boolean := true; clk_freq : in positive);
procedure clk_gen(signal clk: inout std_ulogic; run : in boolean := true; clk_time : in delay_length := clk_time_c);
procedure rst_gen(signal rst: out std_ulogic; rst_time : in delay_length := rst_time_c);
--! Wait for 'count' clock ticks.
procedure wait_clk(signal clk : in std_ulogic; count : in natural := 1);
--! Wait until 'condition' xor invert is true.
procedure wait_clk(signal clk : in std_ulogic; signal condition : in boolean; invert : boolean := false);
--! Wait until 'condition' is '1'/'H' (or '0'/'L' if invert is true).
procedure wait_clk(signal clk : in std_ulogic; signal condition : in std_ulogic; invert : boolean := false);
end;
package body tb_pack is
function to_hstring(number : natural) return string is
variable l : line;
variable width : natural;
begin
return to_hstring(to_unsigned(number, log_ceil(number+1)));
end;
function to_hstring(value : std_ulogic_vector) return string is
variable l : line;
begin
if value'length mod 4 /= 0 then
return to_hstring("0" & value);
else
hwrite(l, value);
return l.all;
end if;
end;
function to_hstring(value : std_logic_vector) return string is
begin return to_hstring(std_ulogic_vector(value)); end;
function to_hstring(value : unsigned) return string is
begin return to_hstring(std_ulogic_vector(value)); end;
function to_hstring(value : signed) return string is
begin return to_hstring(std_ulogic_vector(value)); end;
procedure clk_gen(signal clk: inout std_ulogic; run : in boolean := true; clk_freq : in positive) is
begin
clk_gen(clk, run, 1 sec / clk_freq);
end;
procedure clk_gen(signal clk: inout std_ulogic; run : in boolean := true; clk_time : in delay_length := clk_time_c) is
begin
if is_x(clk) then
clk <= '0';
elsif run then
clk <= not clk after clk_time / 2;
end if;
end;
procedure rst_gen(signal rst: out std_ulogic; rst_time : in delay_length := rst_time_c) is
begin
rst <= '1', '0' after rst_time;
end;
procedure wait_clk(signal clk : in std_ulogic; count : in natural := 1) is
begin
if count > 0 then
for n in 1 to count loop
wait until rising_edge(clk);
end loop;
end if;
end;
procedure wait_clk(signal clk : in std_ulogic; signal condition : in boolean; invert : boolean := false) is
begin
-- useless parenthesis for readability, VHDL has = before and
wait until rising_edge(clk) and (condition = not invert);
end;
procedure wait_clk(signal clk : in std_ulogic; signal condition : in std_ulogic; invert : boolean := false) is
begin
-- useless parenthesis for readability, VHDL has = before and
wait until rising_edge(clk) and (to_x01(condition) = not to_stdulogic(invert));
end;
end;
|
gpl-3.0
|
alphaFred/Sejits4Fpgas
|
sejits4fpgas/hw/user/DReg.vhd
|
1
|
4032
|
----------------------------------------------------------------------------------
-- Company:
-- Engineer:
--
-- Create Date: 07/29/2015 12:03:12 PM
-- Design Name:
-- Module Name: dsp_sreg_block - Behavioral
-- Project Name:
-- Target Devices:
-- Tool Versions:
-- Description:
--
-- Dependencies:
--
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
--
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;
entity DReg is
Generic (
WIDTH : positive :=32;
LENGTH : positive :=4
);
Port (
CLK : in STD_LOGIC;
RST : in STD_LOGIC;
VALID_IN : in STD_LOGIC;
READY_IN : in std_logic;
DREG_IN : in STD_LOGIC_VECTOR (WIDTH-1 downto 0);
VALID_OUT : out STD_LOGIC;
READY_OUT : out std_logic;
DREG_OUT : out STD_LOGIC_VECTOR (WIDTH-1 downto 0)
);
end DReg;
architecture Behavioral of DReg is
TYPE iBus is array(LENGTH-1 downto 0) of std_logic_vector(WIDTH-1 downto 0);
TYPE iBus_VALID is array(LENGTH-1 downto 0) of std_logic;
--
signal sRegBus : iBus;
signal ValidsRegBus : iBus_VALID := (others => '0');
COMPONENT vector_dff_block
Generic (
WIDTH : positive
);
Port (
D : in STD_LOGIC_VECTOR (WIDTH-1 downto 0);
CLK : in STD_LOGIC;
RST : in STD_LOGIC;
Q : out STD_LOGIC_VECTOR (WIDTH-1 downto 0)
);
END COMPONENT;
COMPONENT logic_dff_block
Port (
D : in STD_LOGIC;
CLK : in STD_LOGIC;
RST : in STD_LOGIC;
Q : out STD_LOGIC
);
END COMPONENT;
constant depth_select_bits : positive := 2; -- specify depth
signal srl_select : std_logic_vector(LENGTH-1 downto 0); -- Dynamic select input to SRL
signal srl_out : std_logic_vector(WIDTH-1 downto 0); -- intermediate signal between srl and register
type array_slv is array (WIDTH-1 downto 0) of std_logic_vector(LENGTH-1 downto 0);
signal shift_reg : array_slv;
begin
-- Add the below after begin keyword in architecture
process (CLK)
begin
if CLK'event and CLK='1' then
for i in 0 to WIDTH-1 loop
shift_reg(i) <= shift_reg(i)(LENGTH-2 downto 0) & DREG_IN(i);
end loop;
end if;
end process;
process(shift_reg,srl_select)
begin
for i in 0 to WIDTH-1 loop
srl_out(i) <= shift_reg(i)(LENGTH-3);
end loop;
end process;
process(CLK)
begin
if CLK'event and CLK='1' then
DREG_OUT <= srl_out;
end if;
end process;
validReg: for i in 1 to LENGTH-1 generate
begin
validdffLeft: if i = 1 generate
begin
valid_dff: component logic_dff_block
port map (
D => VALID_IN,
CLK => CLK,
RST => RST,
Q => ValidsRegBus(i)
);
end generate validdffLeft;
--
dffOthers: if (i > 1 AND i < LENGTH) generate
begin
valid_dff: component logic_dff_block
port map (
D => ValidsRegBus(i-1),
CLK => CLK,
RST => RST,
Q => ValidsRegBus(i)
);
end generate dffOthers;
--
dffRight: if i = LENGTH-1 generate
begin
valid_dff: component logic_dff_block
port map (
D => ValidsRegBus(i-1),
CLK => CLK,
RST => RST,
Q => VALID_OUT
);
end generate dffRight;
end generate validReg;
READY_OUT <= READY_IN;
end architecture Behavioral;
|
gpl-3.0
|
alphaFred/Sejits4Fpgas
|
sejits4fpgas/hw/user/AddBB.vhd
|
1
|
3406
|
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;
library UNIMACRO;
use UNIMACRO.vcomponents.all;
Library UNISIM;
use UNISIM.vcomponents.all;
entity AddBB is
port (
CLK : in std_logic;
RST : in std_logic;
VALID_IN : in std_logic;
READY_IN : in std_logic;
LEFT : in std_logic_vector(31 downto 0);
RIGHT : in std_logic_vector(31 downto 0);
VALID_OUT : out std_logic;
READY_OUT : out std_logic;
ADD_OUT : out std_logic_vector(31 downto 0)
);
end AddBB;
architecture arch of AddBB is
signal RESULT :std_logic_vector(31 downto 0);
-- END DSP48E1_inst_1
constant DELAY_ADD_SUB : positive := 2;
--
TYPE iBus_ADD_SUB is array(DELAY_ADD_SUB-1 downto 0) of std_logic;
--
signal ValidsRegBus_ADD_SUB : iBus_ADD_SUB := (others => '0');
--
COMPONENT logic_dff_block
Port (
D : in STD_LOGIC;
CLK : in STD_LOGIC;
RST : in STD_LOGIC;
Q : out STD_LOGIC
);
END COMPONENT;
begin
ADDSUB_MACRO_inst : ADDSUB_MACRO
generic map (
DEVICE => "7SERIES", -- Target Device: "VIRTEX5", "7SERIES", "SPARTAN6"
LATENCY => 2, -- Desired clock cycle latency, 0-2
WIDTH => 32) -- Input / Output bus width, 1-48
port map (
CARRYOUT => open, -- 1-bit carry-out output signal
RESULT => RESULT, -- Add/sub result output, width defined by WIDTH generic
A => LEFT, -- Input A bus, width defined by WIDTH generic
ADD_SUB => '1', -- 1-bit add/sub input, high selects add, low selects subtract
B => RIGHT, -- Input B bus, width defined by WIDTH generic
CARRYIN => '0', -- 1-bit carry-in input
CE => '1', -- 1-bit clock enable input
CLK =>CLK, -- 1-bit clock input
RST => RST -- 1-bit active high synchronous reset
);
validReg_ADD_int: for i in 0 to DELAY_ADD_SUB generate
begin
validdffLeft_ADD: if i = 0 generate
begin
valid_dff: component logic_dff_block
port map (
D => VALID_IN,
CLK => CLK,
RST => RST,
Q => ValidsRegBus_ADD_SUB(i)
);
end generate validdffLeft_ADD;
--
dffOthers_ADD: if (i > 0 AND i < DELAY_ADD_SUB) generate
begin
valid_dff: component logic_dff_block
port map (
D => ValidsRegBus_ADD_SUB(i-1),
CLK => CLK,
RST => RST,
Q => ValidsRegBus_ADD_SUB(i)
);
end generate dffOthers_ADD;
--
dffRight_ADD: if i = DELAY_ADD_SUB generate
begin
valid_dff: component logic_dff_block
port map (
D => ValidsRegBus_ADD_SUB(i-1),
CLK => CLK,
RST => RST,
Q => VALID_OUT
);
end generate dffRight_ADD;
end generate validReg_ADD_int;
calc_result : process(clk)
begin
if rising_edge(clk) then
ADD_OUT <= RESULT;
end if;
end process;
READY_OUT <= READY_IN;
end architecture ; -- arch
|
gpl-3.0
|
unhold/hdl
|
vhdl/example/function_fsmd.vhd
|
1
|
1040
|
-- Demonstration of a functional FSMD coding style.
entity function_fsmd is
port(
clk_i,
reset_i : in bit;
a_i, b_i : in bit;
x_o, y_o : out bit);
end;
architecture rtl of function_fsmd is
type seq_t is (idle, start, run);
type state_t is record
seq : seq_t;
x : bit;
end record;
constant reset_state_c : state_t := (
seq => idle,
x => '0');
signal r : state_t;
impure function delta(r : state_t) return state_t is
variable n : state_t := r;
begin
case r.seq is
when idle =>
if a_i = '1' then
n.seq := start;
end if;
when start =>
n.seq := run;
n.x := '1';
when run =>
if b_i = '1' then
n.seq := idle;
n.x := '0';
end if;
end case;
return n;
end;
begin
sync : process(clk_i, reset_i)
begin
if reset_i = '1' then
r <= reset_state_c;
elsif rising_edge(clk_i) then
r <= delta(r);
end if;
end process;
lambda : process(r, b_i)
begin
x_o <= r.x;
if r.seq = idle then
y_o <= b_i;
else
y_o <= '0';
end if;
end process;
end;
|
gpl-3.0
|
agostini01/FPGA_Neural-Network
|
source_files/neuralnet/core/nn_types_pkg.vhd
|
1
|
4221
|
--=============================================================================
-- This file is part of FPGA_NEURAL-Network.
--
-- FPGA_NEURAL-Network is free software: you can redistribute it and/or
-- modify it under the terms of the GNU General Public License as published
-- by the Free Software Foundation, either version 3 of the License, or
-- (at your option) any later version.
--
-- FPGA_NEURAL-Network is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with FPGA_NEURAL-Network.
-- If not, see <http://www.gnu.org/licenses/>.
--=============================================================================
-- FILE NAME : neural_net_types_pkg.vhd
-- PROJECT : FPGA_NEURAL-Network
-- PACKAGE : NN_TYPES_pkg
--=============================================================================
-- AUTORS(s) : Agostini, N
-- DEPARTMENT : Electrical Engineering (UFRGS)
-- DATE : Dec 10, 2014
--=============================================================================
-- Description:
--
--=============================================================================
library ieee;
use work.fixed_pkg.all; -- ieee_proposed for compatibility version
--=============================================================================
-- Package declaration for NN_TYPES_pkg
--=============================================================================
package NN_TYPES_pkg is
constant PERCEPTRONS_INPUT : natural := 13; -- Number of input neurons
constant PERCEPTRONS_HIDDEN : natural := 3; -- Number of hidden neurons
constant PERCEPTRONS_OUTPUT : natural := 3; -- Number of output neurons
constant U_SIZE : integer :=8; --bits before decimal point
constant L_SIZE : integer :=-14; --bits after decimal point
------------------------------------------------------------------------------
subtype CONSTRAINED_SFIXED is sfixed(U_SIZE downto L_SIZE);
------------------------------------------------------------------------------
type ARRAY_OF_SFIXED is array (natural range <>) of CONSTRAINED_SFIXED;
subtype INPUT_IN_VALUES is ARRAY_OF_SFIXED (0 to (PERCEPTRONS_INPUT-1)); --input values for in layer
subtype HIDDEN_IN_VALUES is ARRAY_OF_SFIXED (0 to (PERCEPTRONS_INPUT-1)); --input values for hidden layer
subtype OUTPUT_IN_VALUES is ARRAY_OF_SFIXED (0 to (PERCEPTRONS_HIDDEN-1)); --input values for output layer
subtype INPUT_NEURON_WEIGHTS is ARRAY_OF_SFIXED (0 to (PERCEPTRONS_INPUT)); -- Weights + bias
subtype HIDDEN_NEURON_WEIGHTS is ARRAY_OF_SFIXED (0 to (PERCEPTRONS_INPUT)); -- Weights + bias
subtype OUTPUT_NEURON_WEIGHTS is ARRAY_OF_SFIXED (0 to (PERCEPTRONS_HIDDEN)); -- Weights + bias
------------------------------------------------------------------------------
type LAYER_WEIGHTS is array (natural range <>) of ARRAY_OF_SFIXED(open);
type INPUT_LAYER_WEIGHTS is array (0 to (PERCEPTRONS_INPUT-1)) of INPUT_NEURON_WEIGHTS; -- Record requires constrained
type HIDDEN_LAYER_WEIGHTS is array (0 to (PERCEPTRONS_HIDDEN-1)) of HIDDEN_NEURON_WEIGHTS;
type OUTPUT_LAYER_WEIGHTS is array (0 to (PERCEPTRONS_OUTPUT-1)) of OUTPUT_NEURON_WEIGHTS;
------------------------------------------------------------------------------
type FIXED_WEIGHTS_MATRIX is --It is not possible to have an array of elements with different size, thus RECORD is used
record
INPUT_LAYER : INPUT_LAYER_WEIGHTS; --The RECORD's elements must be constrained in ALTERA VHDL-2008 Compiler
HIDDEN_LAYER: HIDDEN_LAYER_WEIGHTS;
OUTPUT_LAYER: OUTPUT_LAYER_WEIGHTS;
end record;
end;
--=============================================================================
-- package body declaration
--=============================================================================
package body NN_TYPES_pkg is
end package body;
|
gpl-3.0
|
EliasLuiz/TCC
|
Leon3/lib/techmap/maps/scanreg.vhd
|
1
|
7585
|
------------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2003 - 2008, Gaisler Research
-- Copyright (C) 2008 - 2014, Aeroflex Gaisler
-- Copyright (C) 2015 - 2016, Cobham Gaisler
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-----------------------------------------------------------------------------
-- Entity: scanregi, scanrego, scanregio
-- File: scanreg.vhd
-- Author: Magnus Hjorth - Aeroflex Gaisler
-- Description: Technology wrapper for boundary scan registers
------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
library techmap;
use techmap.gencomp.all;
use techmap.alltap.all;
entity scanregi is
generic (
tech : integer := 0;
intesten: integer := 1
);
port (
pad : in std_ulogic;
core : out std_ulogic;
tck : in std_ulogic;
tckn : in std_ulogic;
tdi : in std_ulogic;
tdo : out std_ulogic;
bsshft : in std_ulogic;
bscapt : in std_ulogic;
bsupd : in std_ulogic;
bsdrive : in std_ulogic;
bshighz : in std_ulogic
);
end;
architecture tmap of scanregi is
signal d1, d2, q1, q2, m3i, o1o : std_ulogic;
begin
gen0: if tech = 0 generate
x: scanregi_inf generic map (intesten) port map (pad,core,tck,tckn,tdi,tdo,bsshft,bscapt,bsupd,bsdrive,bshighz);
end generate;
map0: if tech /= 0 generate
iten: if intesten /= 0 generate
m1 : grmux2 generic map (tech) port map (pad, q1, bsdrive, core);
f1 : grdff generic map (tech) port map (tckn, d1, q1);
m2 : grmux2 generic map (tech) port map (q1, q2, bsupd, d1);
end generate;
itdis: if intesten = 0 generate
core <= pad;
q1 <= '0';
d1 <= '0';
end generate;
m3 : grmux2 generic map (tech) port map (m3i, tdi, bsshft, d2);
m4 : grmux2 generic map (tech) port map (q2, o1o, bscapt, m3i);
o1 : gror2 generic map (tech) port map (pad, bshighz, o1o);
f2 : grdff generic map (tech) port map (tck, d2, q2);
tdo <= q2;
end generate;
end;
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
library techmap;
use techmap.gencomp.all;
use techmap.alltap.all;
entity scanrego is
generic (
tech : integer := 0
);
port (
pad : out std_ulogic;
core : in std_ulogic;
samp : in std_ulogic;
tck : in std_ulogic;
tckn : in std_ulogic;
tdi : in std_ulogic;
tdo : out std_ulogic;
bsshft : in std_ulogic;
bscapt : in std_ulogic;
bsupd : in std_ulogic;
bsdrive : in std_ulogic
);
end;
architecture tmap of scanrego is
signal d1, d2, q1, q2, m3i, o1o : std_ulogic;
begin
gen0: if tech = 0 generate
x: scanrego_inf port map (pad,core,samp,tck,tckn,tdi,tdo,bsshft,bscapt,bsupd,bsdrive);
end generate;
map0: if tech /= 0 generate
m1 : grmux2 generic map (tech) port map (core, q1, bsdrive, pad);
m2 : grmux2 generic map (tech) port map (q1, q2, bsupd, d1);
m3 : grmux2 generic map (tech) port map (m3i, tdi, bsshft, d2);
m4 : grmux2 generic map (tech) port map (q2, samp, bscapt, m3i);
f1 : grdff generic map (tech) port map (tckn, d1, q1);
f2 : grdff generic map (tech) port map (tck, d2, q2);
tdo <= q2;
end generate;
end;
library ieee;
use ieee.std_logic_1164.all;
library techmap;
use techmap.gencomp.all;
use techmap.alltap.all;
entity scanregto is
generic (
tech : integer := 0;
hzsup: integer range 0 to 1 := 1;
oepol: integer range 0 to 1 := 1;
scantest: integer range 0 to 1 := 0
);
port (
pado : out std_ulogic;
padoen : out std_ulogic;
samp : in std_ulogic;
coreo : in std_ulogic;
coreoen : in std_ulogic;
tck : in std_ulogic;
tckn : in std_ulogic;
tdi : in std_ulogic;
tdo : out std_ulogic;
bsshft : in std_ulogic;
bscapto : in std_ulogic;
bscaptoe: in std_ulogic;
bsupdo : in std_ulogic;
bsdrive : in std_ulogic;
bshighz : in std_ulogic;
testen : in std_ulogic;
testoen : in std_ulogic
);
end;
architecture tmap of scanregto is
signal tdo1, padoenx,padoenxx : std_ulogic;
begin
x1: scanrego generic map (tech)
port map (pado, coreo, samp, tck, tckn, tdo1, tdo, bsshft, bscapto, bsupdo, bsdrive);
x2: scanrego generic map (tech)
port map (padoenx, coreoen, coreoen, tck, tckn, tdi, tdo1, bsshft, bscaptoe, bsupdo, bsdrive);
hz : if hzsup = 1 generate
x3 : if oepol = 0 generate
x33 : gror2 generic map (tech) port map (padoenx, bshighz, padoenxx);
end generate;
x4 : if oepol = 1 generate
x33 : grand12 generic map (tech) port map (padoenx, bshighz, padoenxx);
end generate;
end generate;
nohz : if hzsup = 0 generate
padoenxx <= padoenx;
end generate;
oem: if scantest /= 0 generate
x4: grmux2 generic map (tech) port map (padoenxx, testoen, testen, padoen);
end generate;
nooem: if scantest = 0 generate
padoen <= padoenxx;
end generate;
end;
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
library techmap;
use techmap.gencomp.all;
use techmap.alltap.all;
entity scanregio is
generic (
tech : integer := 0;
hzsup: integer range 0 to 1 := 1;
oepol: integer range 0 to 1 := 1;
intesten: integer range 0 to 1 := 1;
scantest: integer range 0 to 1 := 0
);
port (
pado : out std_ulogic;
padoen : out std_ulogic;
padi : in std_ulogic;
coreo : in std_ulogic;
coreoen : in std_ulogic;
corei : out std_ulogic;
tck : in std_ulogic;
tckn : in std_ulogic;
tdi : in std_ulogic;
tdo : out std_ulogic;
bsshft : in std_ulogic;
bscapti : in std_ulogic;
bscapto : in std_ulogic;
bscaptoe: in std_ulogic;
bsupdi : in std_ulogic;
bsupdo : in std_ulogic;
bsdrive : in std_ulogic;
bshighz : in std_ulogic;
testen : in std_ulogic;
testoen : in std_ulogic
);
end;
architecture tmap of scanregio is
signal tdo1, tdo2, padoenx : std_ulogic;
begin
gen0: if tech = 0 generate
x: scanregio_inf
generic map (hzsup,intesten)
port map (pado,padoen,padi,coreo,coreoen,corei,tck,tckn,tdi,tdo,
bsshft,bscapti,bsupdi,bsupdo,bsdrive,bshighz);
end generate;
map0: if tech /= 0 generate
x0: scanregi generic map (tech,intesten)
port map (padi, corei, tck, tckn, tdo1, tdo, bsshft, bscapti, bsupdi, bsdrive, bshighz);
x1: scanregto generic map (tech, hzsup, oepol, scantest)
port map (pado, padoen, coreo, coreo, coreoen,
tck, tckn, tdi, tdo1, bsshft, bscapto, bscaptoe, bsupdo, bsdrive, bshighz, testen, testoen);
end generate;
end;
|
gpl-3.0
|
EliasLuiz/TCC
|
Leon3/lib/gaisler/misc/ahbdpram.vhd
|
1
|
5311
|
------------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2003 - 2008, Gaisler Research
-- Copyright (C) 2008 - 2014, Aeroflex Gaisler
-- Copyright (C) 2015 - 2016, Cobham Gaisler
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-----------------------------------------------------------------------------
-- Entity: ahdpbram
-- File: ahbdpram.vhd
-- Author: Jiri Gaisler - Gaisler Reserch
-- Description: AHB DP ram. 0-waitstate read, 0/1-waitstate write.
------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
library grlib;
use grlib.amba.all;
use grlib.stdlib.all;
use grlib.devices.all;
library techmap;
use techmap.gencomp.all;
entity ahbdpram is
generic (
hindex : integer := 0;
haddr : integer := 0;
hmask : integer := 16#fff#;
tech : integer := 2;
abits : integer range 8 to 19 := 8;
bytewrite : integer range 0 to 1 := 0
);
port (
rst : in std_ulogic;
clk : in std_ulogic;
ahbsi : in ahb_slv_in_type;
ahbso : out ahb_slv_out_type;
clkdp : in std_ulogic;
address : in std_logic_vector((abits -1) downto 0);
datain : in std_logic_vector(31 downto 0);
dataout : out std_logic_vector(31 downto 0);
enable : in std_ulogic; -- active high chip select
write : in std_logic_vector(0 to 3) -- active high byte write enable
); -- big-endian write: bwrite(0) => data(31:24)
end;
architecture rtl of ahbdpram is
--constant abits : integer := log2(kbytes) + 8;
constant kbytes : integer := 2**(abits - 8);
constant hconfig : ahb_config_type := (
0 => ahb_device_reg ( VENDOR_GAISLER, GAISLER_AHBDPRAM, 0, abits+2, 0),
4 => ahb_membar(haddr, '1', '1', hmask),
others => zero32);
type reg_type is record
hwrite : std_ulogic;
hready : std_ulogic;
hsel : std_ulogic;
addr : std_logic_vector(abits+1 downto 0);
size : std_logic_vector(1 downto 0);
end record;
signal r, c : reg_type;
signal ramsel : std_ulogic;
signal bwrite : std_logic_vector(3 downto 0);
signal ramaddr : std_logic_vector(abits-1 downto 0);
signal ramdata : std_logic_vector(31 downto 0);
signal hwdata : std_logic_vector(31 downto 0);
begin
comb : process (ahbsi, r, rst, ramdata)
variable bs : std_logic_vector(3 downto 0);
variable v : reg_type;
variable haddr : std_logic_vector(abits-1 downto 0);
begin
v := r; v.hready := '1'; bs := (others => '0');
if (r.hwrite or not r.hready) = '1' then haddr := r.addr(abits+1 downto 2);
else
haddr := ahbsi.haddr(abits+1 downto 2); bs := (others => '0');
end if;
if ahbsi.hready = '1' then
v.hsel := ahbsi.hsel(hindex) and ahbsi.htrans(1);
v.hwrite := ahbsi.hwrite and v.hsel;
v.addr := ahbsi.haddr(abits+1 downto 0);
v.size := ahbsi.hsize(1 downto 0);
end if;
if r.hwrite = '1' then
case r.size(1 downto 0) is
when "00" => bs (conv_integer(r.addr(1 downto 0))) := '1';
when "01" => bs := r.addr(1) & r.addr(1) & not (r.addr(1) & r.addr(1));
when others => bs := (others => '1');
end case;
v.hready := not (v.hsel and not ahbsi.hwrite);
v.hwrite := v.hwrite and v.hready;
end if;
if rst = '0' then v.hwrite := '0'; v.hready := '1'; end if;
bwrite <= bs; ramsel <= v.hsel or r.hwrite; ahbso.hready <= r.hready;
ramaddr <= haddr; c <= v; ahbso.hrdata <= ahbdrivedata(ramdata);
end process;
ahbso.hresp <= "00";
ahbso.hsplit <= (others => '0');
ahbso.hirq <= (others => '0');
ahbso.hconfig <= hconfig;
ahbso.hindex <= hindex;
hwdata <= ahbreadword(ahbsi.hwdata, r.addr(4 downto 2));
bw : if bytewrite = 1 generate
ra : for i in 0 to 3 generate
aram : syncram_dp generic map (tech, abits, 8) port map (
clk, ramaddr, hwdata(i*8+7 downto i*8),
ramdata(i*8+7 downto i*8), ramsel, bwrite(3-i),
clkdp, address, datain(i*8+7 downto i*8),
dataout(i*8+7 downto i*8), enable, write(3-i)
);
end generate;
end generate;
nobw : if bytewrite = 0 generate
aram : syncram_dp generic map (tech, abits, 32) port map (
clk, ramaddr, hwdata(31 downto 0), ramdata, ramsel, r.hwrite,
clkdp, address, datain, dataout, enable, write(0)
);
end generate;
reg : process (clk)
begin
if rising_edge(clk ) then r <= c; end if;
end process;
-- pragma translate_off
bootmsg : report_version
generic map ("ahbdpram" & tost(hindex) &
": AHB DP SRAM Module, " & tost(kbytes) & " kbytes");
-- pragma translate_on
end;
|
gpl-3.0
|
EliasLuiz/TCC
|
Leon3/lib/gsi/ssram/functions.vhd
|
6
|
97832
|
-----------------------------------------------------------
-- VHDL file for FUNCTIONs used in verilog2vhdl files
-- DO NOT MODIFY THIS FILE
-- Author : S.O
-- Date : March 14, 1995
-- Modification History --
-- 3/31/95 Added shift operations (S.O)
-- 4/6/95 Added arithmetic operations for std_logic_vectors (S.O)
-- 4/11/95 Added conversion functions
-- 10/5/95 added to_boolean conversions
-- 1/31/96 added funcs. for std_logic and std_logic
-- 2/28/96 added funcs. for TERNARY combinations
-- 4/18/96 added logical operations bet. std_logic_vector and integer/boolean
-- 7/9/96 modified all TERNARY functions with *ulogic* conditional
-----------------------------------------------------------
library ieee;
library GSI;
use ieee.std_logic_1164.all;
--use ieee.numeric_std.all;
library grlib;
use grlib.stdlib.all;
package FUNCTIONS is
-- TYPE used in conversion function
TYPE direction is (LITTLE_ENDIAN, BIG_ENDIAN);
TYPE hex_digit IS ('0', '1', '2', '3', '4', '5', '6', '7', '8', '9', 'A',
'B', 'C', 'D', 'E', 'F', 'a', 'b', 'c', 'd', 'e', 'f');
TYPE hex_number IS array (POSITIVE range <>) OF hex_digit;
TYPE hexstdlogic IS ARRAY (hex_digit'LOW TO hex_digit'HIGH) of std_logic_vector(3 DOWNTO 0);
-- This conversion table would not accept X or Z.
-- To convert a hex number with X or Z use to_stdlogicvector(hex : STRING).
--CONSTANT hex_to_stdlogic : hexstdlogic := (x"0", x"1", x"2", x"3", x"4", x"5",
-- x"6", x"7", x"8", x"9", x"A", x"B", x"C", x"D", x"E", x"F", x"A", x"B",
-- x"C", x"D", x"E", x"F");
-- Signals used for v2v
--SIGNAL v2v_std_logic : std_logic;
--SIGNAL v2v_sig_integer : integer;
--SIGNAL v2v_boolean : boolean;
--SIGNAL v2v_real : real;
-- FUNCTIONs for unary operations
FUNCTION U_AND(a : std_ulogic_vector) return std_ulogic;
FUNCTION U_AND(a : std_logic_vector) return std_logic;
FUNCTION U_NAND(a : std_ulogic_vector) return std_ulogic;
FUNCTION U_NAND(a : std_logic_vector) return std_logic;
FUNCTION U_OR(a : std_ulogic_vector) return std_ulogic;
FUNCTION U_OR(a : std_logic_vector) return std_logic;
FUNCTION U_NOR(a : std_ulogic_vector) return std_ulogic;
FUNCTION U_NOR(a : std_logic_vector) return std_logic;
FUNCTION U_XOR(a : std_ulogic_vector) return std_ulogic;
FUNCTION U_XOR(a : std_logic_vector) return std_logic;
FUNCTION U_XNOR(a : std_ulogic_vector) return std_ulogic;
FUNCTION U_XNOR(a : std_logic_vector) return std_logic;
-- FUNCTIONs for ternary operations
FUNCTION TERNARY(a,b,c : boolean) return boolean;
FUNCTION TERNARY(a : boolean; b,c : std_ulogic) return std_ulogic;
FUNCTION TERNARY(a : boolean; b,c : std_ulogic_vector) return std_ulogic_vector;
FUNCTION TERNARY(a : boolean; b,c : std_logic_vector) return std_logic_vector;
--pragma synthesis_off
FUNCTION TERNARY(a : boolean; b,c : real) return real;
FUNCTION TERNARY(a : boolean; b,c : time) return time;
--pragma synthesis_on
FUNCTION TERNARY(a,b,c : integer) return integer;
FUNCTION TERNARY(a : integer; b,c : std_ulogic) return std_ulogic;
FUNCTION TERNARY(a : integer; b,c : std_ulogic_vector) return std_ulogic_vector;
FUNCTION TERNARY(a : integer; b,c : std_logic_vector) return std_logic_vector;
--pragma synthesis_off
FUNCTION TERNARY(a : integer; b,c : real) return real;
FUNCTION TERNARY(a : integer; b,c : time) return time;
--pragma synthesis_on
FUNCTION TERNARY(a,b,c : std_ulogic) return std_ulogic;
FUNCTION TERNARY(a : std_ulogic; b,c : integer) return integer;
FUNCTION TERNARY(a : std_ulogic; b,c : std_ulogic_vector) return std_ulogic_vector;
FUNCTION TERNARY(a : std_ulogic; b,c : std_logic_vector) return std_logic_vector;
--pragma synthesis_off
FUNCTION TERNARY(a : std_ulogic; b,c : real) return real;
FUNCTION TERNARY(a : std_ulogic; b,c : time) return time;
--pragma synthesis_on
FUNCTION TERNARY(a,b,c : std_ulogic_vector) return std_ulogic_vector;
FUNCTION TERNARY(a : std_ulogic_vector; b,c : integer) return integer;
FUNCTION TERNARY(a : std_ulogic_vector; b,c : std_ulogic) return std_ulogic;
FUNCTION TERNARY(a : std_ulogic_vector; b,c : std_logic_vector) return std_logic_vector;
--pragma synthesis_off
FUNCTION TERNARY(a : std_ulogic_vector; b,c : real) return real;
FUNCTION TERNARY(a : std_ulogic_vector; b,c : time) return time;
--pragma synthesis_on
FUNCTION TERNARY(a,b,c : std_logic_vector) return std_logic_vector;
FUNCTION TERNARY(a : std_logic_vector; b,c : integer) return integer;
FUNCTION TERNARY(a : std_logic_vector; b,c : std_ulogic) return std_ulogic;
FUNCTION TERNARY(a : std_logic_vector; b,c : std_ulogic_vector) return std_ulogic_vector;
--pragma synthesis_off
FUNCTION TERNARY(a : std_logic_vector; b,c : real) return real;
FUNCTION TERNARY(a : std_logic_vector; b,c : time) return time;
FUNCTION TERNARY(a,b,c : real) return real;
FUNCTION TERNARY(a : real; b,c : std_ulogic) return std_ulogic;
FUNCTION TERNARY(a : real; b,c : std_ulogic_vector) return std_ulogic_vector;
FUNCTION TERNARY(a : real; b,c : std_logic_vector) return std_logic_vector;
FUNCTION TERNARY(a : real; b,c : integer) return integer;
FUNCTION TERNARY(a : real; b,c : time) return time;
--pragma synthesis_on
-- functions for TERNARY combination
FUNCTION TERNARY(a : std_ulogic; b : std_logic_vector; c: std_ulogic) return
std_logic_vector;
FUNCTION TERNARY(a : std_ulogic; b : std_ulogic; c: std_logic_vector) return
std_logic_vector;
FUNCTION TERNARY(a : std_ulogic; b : integer; c: std_ulogic) return
integer;
FUNCTION TERNARY(a : std_ulogic; b : std_ulogic; c: integer) return
integer;
FUNCTION TERNARY(a : integer; b : integer; c: std_ulogic) return
integer;
FUNCTION TERNARY(a : integer; b : std_ulogic; c: integer) return
integer;
FUNCTION TERNARY(a : integer; b : std_logic_vector; c: std_ulogic) return
std_logic_vector;
FUNCTION TERNARY(a : integer; b : std_ulogic; c: std_logic_vector) return
std_logic_vector;
--end functions for TERNARY combination
-- FUNCTIONS for shift operations
FUNCTION "sll" ( l : std_logic_vector; r : integer) RETURN std_logic_vector;
FUNCTION "sll" ( l : std_ulogic_vector; r : integer) RETURN std_ulogic_vector;
FUNCTION "srl" ( l : std_logic_vector; r : integer) RETURN std_logic_vector;
FUNCTION "srl" ( l : std_ulogic_vector; r : integer) RETURN std_ulogic_vector;
FUNCTION "sla" ( l : std_logic_vector; r : integer) RETURN std_logic_vector;
FUNCTION "sla" ( l : std_ulogic_vector; r : integer) RETURN std_ulogic_vector;
FUNCTION "sra" ( l : std_logic_vector; r : integer) RETURN std_logic_vector;
FUNCTION "sra" ( l : std_ulogic_vector; r : integer) RETURN std_ulogic_vector;
FUNCTION "rol" ( l : std_logic_vector; r : integer) RETURN std_logic_vector;
FUNCTION "rol" ( l : std_ulogic_vector; r : integer) RETURN std_ulogic_vector;
FUNCTION "ror" ( l : std_logic_vector; r : integer) RETURN std_logic_vector;
FUNCTION "ror" ( l : std_ulogic_vector; r : integer) RETURN std_ulogic_vector;
-- FUNCTIONs for integer operations
FUNCTION "not" (l: integer) return integer;
FUNCTION "and" (l,r: integer) return integer;
FUNCTION "nand" (l,r: integer) return integer;
FUNCTION "or" (l,r: integer) return integer;
FUNCTION "nor" (l,r: integer) return integer;
FUNCTION "xor" (l,r: integer) return integer;
FUNCTION "xnor" (l,r: integer) return integer;
FUNCTION "sll" (l,r: integer) return integer;
FUNCTION "srl" (l,r: integer) return integer;
-- FUNCTIONs for std_logic/std_ulogic_vector/std_logic_vector operations
-- FUNCTIONs for combination of Boolean and ints
FUNCTION "=" ( l : Boolean; r : natural ) RETURN boolean;
FUNCTION "/=" ( l : Boolean; r : natural ) RETURN boolean;
FUNCTION "=" ( l : integer; r : std_logic_vector ) RETURN boolean;
FUNCTION "/=" ( l : integer; r : std_logic_vector ) RETURN boolean;
FUNCTION "<" ( l : integer; r : std_logic_vector ) RETURN boolean;
FUNCTION ">" ( l : integer; r : std_logic_vector ) RETURN boolean;
FUNCTION "<=" ( l : integer; r : std_logic_vector ) RETURN boolean;
FUNCTION ">=" ( l : integer; r : std_logic_vector ) RETURN boolean;
FUNCTION "=" ( l : std_logic_vector; r : integer ) RETURN boolean;
FUNCTION "/=" ( l : std_logic_vector; r : integer ) RETURN boolean;
FUNCTION "<" ( l : std_logic_vector; r : integer ) RETURN boolean;
FUNCTION ">" ( l : std_logic_vector; r : integer ) RETURN boolean;
FUNCTION "<=" ( l : std_logic_vector; r : integer ) RETURN boolean;
FUNCTION ">=" ( l : std_logic_vector; r : integer ) RETURN boolean;
--logical functions between std_logic_vector and integer, std_logic_vector and boolean
FUNCTION "and" ( l : std_logic_vector; r : integer ) RETURN std_logic_vector;
FUNCTION "nand" ( l : std_logic_vector; r : integer ) RETURN std_logic_vector;
FUNCTION "or" ( l : std_logic_vector; r : integer ) RETURN std_logic_vector;
FUNCTION "nor" ( l : std_logic_vector; r : integer ) RETURN std_logic_vector;
FUNCTION "xor" ( l : std_logic_vector; r : integer ) RETURN std_logic_vector;
FUNCTION "and" ( l : integer; r : std_logic_vector ) RETURN integer;
FUNCTION "nand" ( l : integer; r : std_logic_vector ) RETURN integer;
FUNCTION "or" ( l : integer; r : std_logic_vector ) RETURN integer;
FUNCTION "nor" ( l : integer; r : std_logic_vector ) RETURN integer;
FUNCTION "xor" ( l : integer; r : std_logic_vector ) RETURN integer;
FUNCTION "and" ( l : std_logic_vector; r : boolean ) RETURN std_logic_vector;
FUNCTION "nand" ( l : std_logic_vector; r : boolean ) RETURN std_logic_vector;
FUNCTION "or" ( l : std_logic_vector; r : boolean ) RETURN std_logic_vector;
FUNCTION "nor" ( l : std_logic_vector; r : boolean ) RETURN std_logic_vector;
FUNCTION "xor" ( l : std_logic_vector; r : boolean ) RETURN std_logic_vector;
FUNCTION "and" ( l : boolean; r : std_logic_vector ) RETURN boolean;
FUNCTION "nand" ( l : boolean; r : std_logic_vector ) RETURN boolean;
FUNCTION "or" ( l : boolean; r : std_logic_vector ) RETURN boolean;
FUNCTION "nor" ( l : boolean; r : std_logic_vector ) RETURN boolean;
FUNCTION "xor" ( l : boolean; r : std_logic_vector ) RETURN boolean;
--logical functions between std_logic_vector and integer, std_logic_vector and boolean
-- Added functions for std_logic, integer
FUNCTION "=" ( l : std_logic; r : integer ) RETURN boolean;
FUNCTION "/=" ( l : std_logic; r : integer ) RETURN boolean;
FUNCTION "<" ( l : std_logic; r : integer ) RETURN boolean;
FUNCTION ">" ( l : std_logic; r : integer ) RETURN boolean;
FUNCTION "<=" ( l : std_logic; r : integer ) RETURN boolean;
FUNCTION ">=" ( l : std_logic; r : integer ) RETURN boolean;
-- Functions for std_logic, integer
--pragma synthesis_off
-- arithmetic operations for real and int and int and real
FUNCTION "+" ( l : real; r : integer ) RETURN real;
FUNCTION "-" ( l : real; r : integer ) RETURN real;
FUNCTION "/" ( l : real; r : integer ) RETURN real;
FUNCTION "*" ( l : real; r : integer ) RETURN real;
FUNCTION "+" ( l : integer; r : real ) RETURN real;
FUNCTION "-" ( l : integer; r : real ) RETURN real;
FUNCTION "/" ( l : integer; r : real ) RETURN real;
FUNCTION "*" ( l : integer; r : real ) RETURN real;
-- end arithmetic operations for real and int and int and real
FUNCTION "=" ( l : real; r : integer ) RETURN boolean;
FUNCTION "/=" ( l : real; r : integer ) RETURN boolean;
FUNCTION "<" ( l : real; r : integer ) RETURN boolean;
FUNCTION ">" ( l : real; r : integer ) RETURN boolean;
FUNCTION "<=" ( l : real; r : integer ) RETURN boolean;
FUNCTION ">=" ( l : real; r : integer ) RETURN boolean;
FUNCTION "=" ( l : integer; r : real ) RETURN boolean;
FUNCTION "/=" ( l : integer; r : real ) RETURN boolean;
FUNCTION "<" ( l : integer; r : real ) RETURN boolean;
FUNCTION ">" ( l : integer; r : real ) RETURN boolean;
FUNCTION "<=" ( l : integer; r : real ) RETURN boolean;
FUNCTION ">=" ( l : integer; r : real ) RETURN boolean;
--pragma synthesis_on
FUNCTION "+" ( l, r : std_logic_vector ) RETURN std_logic_vector;
FUNCTION "-" ( l, r : std_logic_vector ) RETURN std_logic_vector;
FUNCTION "*" ( l, r : std_logic_vector ) RETURN std_logic_vector;
FUNCTION "/" ( l, r : std_logic_vector ) RETURN std_logic_vector;
FUNCTION "REM" ( l, r : std_logic_vector ) RETURN std_logic_vector;
FUNCTION "+" ( l : std_logic_vector; r : integer ) RETURN std_logic_vector;
FUNCTION "-" ( l : std_logic_vector; r : integer ) RETURN std_logic_vector;
FUNCTION "*" ( l : std_logic_vector; r : integer ) RETURN std_logic_vector;
FUNCTION "/" ( l : std_logic_vector; r : integer ) RETURN std_logic_vector;
FUNCTION "REM" ( l : std_logic_vector; r : integer ) RETURN std_logic_vector;
FUNCTION "&" ( l : std_logic_vector; r : integer ) RETURN std_logic_vector;
FUNCTION "&" ( l : std_logic_vector; r : boolean ) RETURN std_logic_vector;
-- need logical functions bet. std_logic_vector and std_logic
FUNCTION "and" ( l : std_logic_vector; r : std_logic ) RETURN std_logic_vector;
FUNCTION "nand" ( l : std_logic_vector; r : std_logic ) RETURN std_logic_vector;
FUNCTION "or" ( l : std_logic_vector; r : std_logic ) RETURN std_logic_vector;
FUNCTION "nor" ( l : std_logic_vector; r : std_logic ) RETURN std_logic_vector;
FUNCTION "xor" ( l : std_logic_vector; r : std_logic ) RETURN std_logic_vector;
--FUNCTION "xnor" ( l : std_logic_vector; r : std_logic ) RETURN std_logic_vector;
FUNCTION "and" ( l : std_logic; r : std_logic_vector ) RETURN std_logic_vector;
FUNCTION "nand" ( l : std_logic; r : std_logic_vector ) RETURN std_logic_vector;
FUNCTION "or" ( l : std_logic; r : std_logic_vector ) RETURN std_logic_vector;
FUNCTION "nor" ( l : std_logic; r : std_logic_vector ) RETURN std_logic_vector;
FUNCTION "xor" ( l : std_logic; r : std_logic_vector ) RETURN std_logic_vector;
--FUNCTION "xnor" ( l : std_logic; r : std_logic_vector ) RETURN std_logic_vector;
-- end logical functions for std_logic_vector and std_logic
-- need arith functions bet std_logic and std_logic
-- used only when the int can be 0 or 1
-- need arithmetic functions bet. std_logic_vector and std_logic
FUNCTION "+" ( l : std_logic; r : std_logic ) RETURN std_logic;
FUNCTION "-" ( l : std_logic; r : std_logic ) RETURN std_logic;
FUNCTION "*" ( l : std_logic; r : std_logic ) RETURN std_logic;
FUNCTION "/" ( l : std_logic; r : std_logic ) RETURN std_logic;
FUNCTION "REM" ( l : std_logic; r : std_logic ) RETURN std_logic;
-- need arithmetic functions bet. std_logic_vector and std_logic
FUNCTION "+" ( l : std_logic_vector; r : std_logic ) RETURN std_logic_vector;
FUNCTION "-" ( l : std_logic_vector; r : std_logic ) RETURN std_logic_vector;
FUNCTION "*" ( l : std_logic_vector; r : std_logic ) RETURN std_logic_vector;
FUNCTION "/" ( l : std_logic_vector; r : std_logic ) RETURN std_logic_vector;
FUNCTION "REM" ( l : std_logic_vector; r : std_logic ) RETURN std_logic_vector;
-- need arithmetic func. between std_logic and std_logic_vector, caveat, returns type of 'r'
FUNCTION "+" ( l : std_logic; r : std_logic_vector ) RETURN std_logic_vector;
FUNCTION "-" ( l : std_logic; r : std_logic_vector ) RETURN std_logic_vector;
FUNCTION "*" ( l : std_logic; r : std_logic_vector ) RETURN std_logic_vector;
FUNCTION "/" ( l : std_logic; r : std_logic_vector ) RETURN std_logic_vector;
FUNCTION "REM" ( l : std_logic; r : std_logic_vector ) RETURN std_logic_vector;
FUNCTION "+" ( l : integer; r : std_logic_vector ) RETURN integer;
FUNCTION "-" ( l : integer; r : std_logic_vector ) RETURN integer;
FUNCTION "*" ( l : integer; r : std_logic_vector ) RETURN integer;
FUNCTION "/" ( l : integer; r : std_logic_vector ) RETURN integer;
FUNCTION "REM" ( l : integer; r : std_logic_vector ) RETURN integer;
-- need arith. functions bet std_logic and integer
FUNCTION "+" ( l : std_logic; r : integer ) RETURN integer;
FUNCTION "-" ( l : std_logic; r : integer ) RETURN integer;
FUNCTION "*" ( l : std_logic; r : integer ) RETURN integer;
FUNCTION "/" ( l : std_logic; r : integer ) RETURN integer;
FUNCTION "REM" ( l : std_logic; r : integer ) RETURN integer;
FUNCTION "and" ( l : std_logic; r : integer ) RETURN std_logic;
FUNCTION "nand" ( l : std_logic; r : integer ) RETURN std_logic;
FUNCTION "or" ( l : std_logic; r : integer ) RETURN std_logic;
FUNCTION "nor" ( l : std_logic; r : integer ) RETURN std_logic;
FUNCTION "xor" ( l : std_logic; r : integer ) RETURN std_logic;
FUNCTION "&" ( l : std_logic; r : integer ) RETURN std_logic_vector;
FUNCTION "xnor" ( l : std_logic; r : integer ) RETURN std_logic;
FUNCTION "and" ( l : integer; r : std_logic ) RETURN integer;
FUNCTION "nand" ( l : integer; r : std_logic ) RETURN integer;
FUNCTION "or" ( l : integer; r : std_logic ) RETURN integer;
FUNCTION "nor" ( l : integer; r : std_logic ) RETURN integer;
FUNCTION "xor" ( l : integer; r : std_logic ) RETURN integer;
FUNCTION "&" ( l : integer; r : std_logic ) RETURN std_logic_vector;
FUNCTION "xnor" ( l : integer; r : std_logic ) RETURN integer;
-- need functions for operations between std_logic and integer
FUNCTION "+" ( l : integer; r : std_logic ) RETURN integer;
FUNCTION "-" ( l : integer; r : std_logic ) RETURN integer;
FUNCTION "*" ( l : integer; r : std_logic ) RETURN integer;
FUNCTION "/" ( l : integer; r : std_logic ) RETURN integer;
FUNCTION "REM" ( l : integer; r : std_logic ) RETURN integer;
FUNCTION "and" ( l : std_logic; r : boolean ) RETURN std_logic;
FUNCTION "nand" ( l : std_logic; r : boolean ) RETURN std_logic;
FUNCTION "or" ( l : std_logic; r : boolean ) RETURN std_logic;
FUNCTION "nor" ( l : std_logic; r : boolean ) RETURN std_logic;
FUNCTION "xor" ( l : std_logic; r : boolean ) RETURN std_logic;
FUNCTION "&" ( l : std_logic; r : boolean ) RETURN std_logic_vector;
FUNCTION "xnor" ( l : std_logic; r : boolean ) RETURN std_logic;
FUNCTION "and" ( l : boolean; r : std_logic ) RETURN boolean;
FUNCTION "nand" ( l : boolean; r : std_logic ) RETURN boolean;
FUNCTION "or" ( l : boolean; r : std_logic ) RETURN boolean;
FUNCTION "nor" ( l : boolean; r : std_logic ) RETURN boolean;
FUNCTION "xor" ( l : boolean; r : std_logic ) RETURN boolean;
FUNCTION "&" ( l : boolean; r : std_logic ) RETURN std_logic_vector;
FUNCTION "xnor" ( l : boolean; r : std_logic ) RETURN boolean;
FUNCTION "and" ( l : integer; r : boolean ) RETURN integer;
FUNCTION "nand" ( l : integer; r : boolean ) RETURN integer;
FUNCTION "or" ( l : integer; r : boolean ) RETURN integer;
FUNCTION "nor" ( l : integer; r : boolean ) RETURN integer;
FUNCTION "xor" ( l : integer; r : boolean ) RETURN integer;
FUNCTION "&" ( l : integer; r : boolean ) RETURN std_logic_vector;
FUNCTION "xnor" ( l : integer; r : boolean ) RETURN integer;
FUNCTION "and" ( l : boolean; r : integer ) RETURN boolean;
FUNCTION "nand" ( l : boolean; r : integer ) RETURN boolean;
FUNCTION "or" ( l : boolean; r : integer ) RETURN boolean;
FUNCTION "nor" ( l : boolean; r : integer ) RETURN boolean;
FUNCTION "xor" ( l : boolean; r : integer ) RETURN boolean;
FUNCTION "&" ( l : boolean; r : integer ) RETURN std_logic_vector;
FUNCTION "xnor" ( l : boolean; r : integer ) RETURN boolean;
-- Overloaded function for text output
FUNCTION to_bitvector ( a : bit ) RETURN bit_vector;
FUNCTION to_bitvector ( a : std_ulogic ) RETURN bit_vector;
FUNCTION to_bitvector ( a : integer ) RETURN bit_vector;
--Conversion functions
FUNCTION to_stdlogicvector(l : integer; size : natural; dir : direction := LITTLE_ENDIAN) RETURN std_logic_vector;
FUNCTION to_stdlogicvector(l : std_logic_vector) RETURN std_logic_vector;
FUNCTION to_stdlogicvector(l : std_logic_vector; size : natural;dir : direction := little_endian ) RETURN std_logic_vector;
FUNCTION to_stdlogicvector ( hex : STRING ) RETURN std_logic_vector;
FUNCTION to_stdlogicvector(l : std_logic; size : natural) RETURN std_logic_vector;
FUNCTION to_stdlogicvector(l : boolean; size : natural) RETURN std_logic_vector;
FUNCTION to_integer(l : std_logic_vector; dir : direction := little_endian) RETURN integer;
FUNCTION to_integer(l : integer) RETURN integer;
FUNCTION to_integer(l : std_logic) RETURN integer;
FUNCTION to_integer(l : boolean) RETURN integer;
-- functions for resolving ambiguity
FUNCTION v2v_to_integer(l : std_logic_vector; dir : direction := little_endian) RETURN integer;
FUNCTION v2v_to_integer(l : integer) RETURN integer;
FUNCTION v2v_to_integer(l : std_logic) RETURN integer;
FUNCTION v2v_to_integer(l : boolean) RETURN integer;
FUNCTION to_stdlogic(l : integer) RETURN std_logic;
FUNCTION to_stdlogic(l : Boolean) RETURN std_logic;
FUNCTION to_stdlogic(l : std_logic) RETURN std_logic;
FUNCTION to_stdlogic(l : std_logic_vector) RETURN std_logic;
--pragma synthesis_off
FUNCTION to_real(l : integer) RETURN real;
FUNCTION to_real (l : real) RETURN real;
--pragma synthesis_on
FUNCTION to_boolean(l : std_logic) RETURN boolean;
FUNCTION to_boolean(l : integer) RETURN boolean;
FUNCTION to_boolean(l : std_logic_vector) RETURN boolean;
FUNCTION to_boolean(l : boolean) RETURN boolean;
end FUNCTIONS;
library ieee;
library GSI;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
--library grlib;
--use grlib.stdlib.all;
Package body FUNCTIONS is
--============= Local Subprograms (from numeric_std.vhd)=====================
function MAX (LEFT, RIGHT: INTEGER) return INTEGER is
begin
if LEFT > RIGHT then return LEFT;
else return RIGHT;
end if;
end MAX;
function MIN (LEFT, RIGHT: INTEGER) return INTEGER is
begin
if LEFT < RIGHT then return LEFT;
else return RIGHT;
end if;
end MIN;
-- unary operations
TYPE stdlogic_boolean_table is array(std_ulogic, std_ulogic) of boolean;
TYPE stdlogic_1d IS ARRAY (std_ulogic) OF std_ulogic;
TYPE stdlogic_table IS ARRAY(std_ulogic, std_ulogic) OF std_ulogic;
FUNCTION U_AND(a : std_ulogic_vector) return std_ulogic is
VARIABLE result : std_ulogic := '1';
begin
FOR i in a'RANGE LOOP
result := result and a(i);
END LOOP;
return result;
end U_AND;
FUNCTION U_AND(a : std_logic_vector) return std_logic is
VARIABLE result : std_logic := '1';
begin
FOR i in a'RANGE LOOP
result := result and a(i);
END LOOP;
return result;
end U_AND;
FUNCTION U_NAND(a : std_ulogic_vector) return std_ulogic is
VARIABLE result : std_ulogic := '1';
begin
FOR i in a'RANGE LOOP
result := result and a(i);
END LOOP;
return not(result);
end U_NAND;
FUNCTION U_NAND(a : std_logic_vector) return std_logic is
VARIABLE result : std_logic := '1';
begin
FOR i in a'RANGE LOOP
result := result and a(i);
END LOOP;
return not(result);
end U_NAND;
FUNCTION U_OR(a : std_ulogic_vector) return std_ulogic is
VARIABLE result : std_ulogic := '0';
begin
FOR i in a'RANGE LOOP
result := result or a(i);
END LOOP;
return result;
end U_OR;
FUNCTION U_OR(a : std_logic_vector) return std_logic is
VARIABLE result : std_logic := '0';
begin
FOR i in a'RANGE LOOP
result := result or a(i);
END LOOP;
return result;
end U_OR;
FUNCTION U_NOR(a : std_ulogic_vector) return std_ulogic is
VARIABLE result : std_ulogic := '0';
begin
FOR i in a'RANGE LOOP
result := result or a(i);
END LOOP;
return not(result);
end U_NOR;
FUNCTION U_NOR(a : std_logic_vector) return std_logic is
VARIABLE result : std_logic := '0';
begin
FOR i in a'RANGE LOOP
result := result or a(i);
END LOOP;
return not(result);
end U_NOR;
FUNCTION U_XOR(a : std_ulogic_vector) return std_ulogic is
VARIABLE result : std_ulogic := '0';
begin
FOR i in a'RANGE LOOP
result := result xor a(i);
END LOOP;
return result;
end U_XOR;
FUNCTION U_XOR(a : std_logic_vector) return std_logic is
VARIABLE result : std_logic := '0';
begin
FOR i in a'RANGE LOOP
result := result xor a(i);
END LOOP;
return result;
end U_XOR;
FUNCTION U_XNOR(a : std_ulogic_vector) return std_ulogic is
VARIABLE result : std_ulogic := '0';
begin
FOR i in a'RANGE LOOP
result := result xor a(i);
END LOOP;
return not(result);
end U_XNOR;
FUNCTION U_XNOR(a : std_logic_vector) return std_logic is
VARIABLE result : std_logic := '0';
begin
FOR i in a'RANGE LOOP
result := result xor a(i);
END LOOP;
return not(result);
end U_XNOR;
-- ternary operations
FUNCTION TERNARY(a,b,c : boolean) return boolean IS
begin
IF a = TRUE THEN
RETURN b;
ELSE
RETURN c;
END IF;
end TERNARY;
---------------------------------------------------
FUNCTION TERNARY(a : boolean; b,c : std_ulogic) return std_ulogic IS
begin
IF a = TRUE THEN
RETURN b;
ELSE
RETURN c;
END IF;
end TERNARY;
---------------------------------------------------
FUNCTION TERNARY(a : boolean; b,c : std_ulogic_vector) return std_ulogic_vector IS
begin
IF a = TRUE THEN
RETURN b;
ELSE
RETURN c;
END IF;
end TERNARY;
---------------------------------------------------
FUNCTION TERNARY(a : boolean; b,c : std_logic_vector) return std_logic_vector IS
begin
IF a = TRUE THEN
RETURN b;
ELSE
RETURN c;
END IF;
end TERNARY;
--pragma synthesis_off
---------------------------------------------------
FUNCTION TERNARY(a : boolean; b,c : real) return real IS
begin
IF a = TRUE THEN
RETURN b;
ELSE
RETURN c;
END IF;
end TERNARY;
---------------------------------------------------
FUNCTION TERNARY(a : boolean; b,c : time) return time IS
begin
IF a = TRUE THEN
RETURN b;
ELSE
RETURN c;
END IF;
end TERNARY;
--pragma synthesis_on
---------------------------------------------------
FUNCTION TERNARY(a,b,c : integer) return integer is
begin
IF (a /= 0) THEN
return b;
ELSE
return c;
END IF;
end TERNARY;
FUNCTION TERNARY(a : integer; b,c : std_ulogic) return std_ulogic is
begin
IF (a /= 0) THEN
return b;
ELSE
return c;
END IF;
end TERNARY;
FUNCTION TERNARY(a : integer; b,c : std_ulogic_vector) return std_ulogic_vector is
begin
IF (a /= 0) THEN
return b;
ELSE
return c;
END IF;
end TERNARY;
FUNCTION TERNARY(a : integer; b,c : std_logic_vector) return std_logic_vector is
begin
IF (a /= 0) THEN
return b;
ELSE
return c;
END IF;
end TERNARY;
--pragma synthesis_off
FUNCTION TERNARY(a : integer; b,c : real) return real is
begin
IF (a /= 0) THEN
return b;
ELSE
return c;
END IF;
end TERNARY;
FUNCTION TERNARY(a : integer; b,c : time) return time is
begin
IF (a /= 0) THEN
return b;
ELSE
return c;
END IF;
end TERNARY;
--pragma synthesis_on
FUNCTION TERNARY(a,b,c : std_ulogic) return std_ulogic is
begin
IF (a = '1') THEN
return b;
ELSIF (a = '0') THEN
return c;
--pragma synthesis_off
ELSIF (b = c AND NOT Is_X(b)) THEN
return b;
ELSE
return 'X';
--pragma synthesis_on
END IF;
end TERNARY;
FUNCTION TERNARY(a : std_ulogic; b,c : integer) return integer is
begin
IF (a = '1') THEN
return b;
ELSIF (a = '0') THEN
return c;
--pragma synthesis_off
ELSIF (b = c) THEN
return b;
ELSE
return 0;
--pragma synthesis_on
END IF;
end TERNARY;
FUNCTION TERNARY(a : std_ulogic; b,c : std_ulogic_vector) return std_ulogic_vector is
--pragma synthesis_off
constant SIZE: NATURAL := MAX(b'LENGTH, c'LENGTH);
variable b01 : std_ulogic_vector(SIZE-1 downto 0) := (OTHERS => '0');
variable c01 : std_ulogic_vector(SIZE-1 downto 0) := (OTHERS => '0');
variable result : std_ulogic_vector(SIZE-1 downto 0);
--pragma synthesis_on
begin
IF (a = '1') THEN
return b;
ELSIF (a = '0') THEN
return c;
--pragma synthesis_off
ELSIF (b = c AND NOT Is_X(b)) THEN
return b;
ELSE
b01(b'LENGTH-1 downto 0) := b;
c01(c'LENGTH-1 downto 0) := c;
FOR I IN SIZE-1 DOWNTO 0 LOOP
IF (b01(I) = c01(I) AND NOT Is_X(b01(I))) THEN
result(I) := b01(I);
ELSE
result(I) := 'X';
END IF;
END LOOP;
return result;
--pragma synthesis_on
END IF;
end TERNARY;
FUNCTION TERNARY(a : std_ulogic; b,c : std_logic_vector) return std_logic_vector is
--pragma synthesis_off
constant SIZE: NATURAL := MAX(b'LENGTH, c'LENGTH);
variable b01 : std_logic_vector(SIZE-1 downto 0) := (OTHERS => '0');
variable c01 : std_logic_vector(SIZE-1 downto 0) := (OTHERS => '0');
variable result : std_logic_vector(SIZE-1 downto 0);
--pragma synthesis_on
begin
IF (a = '1') THEN
return b;
ELSIF (a = '0') THEN
return c;
--pragma synthesis_off
ELSIF (b = c AND NOT Is_X(b)) THEN
return b;
ELSE
b01(b'LENGTH-1 downto 0) := b;
c01(c'LENGTH-1 downto 0) := c;
FOR I IN SIZE-1 DOWNTO 0 LOOP
IF (b01(I) = c01(I) AND NOT Is_X(b01(I))) THEN
result(I) := b01(I);
ELSE
result(I) := 'X';
END IF;
END LOOP;
return result;
--pragma synthesis_on
END IF;
end TERNARY;
--pragma synthesis_off
FUNCTION TERNARY(a : std_ulogic; b,c : real) return real is
begin
IF (a = '1') THEN
return b;
ELSIF (a = '0') THEN
return c;
ELSIF (b = c) THEN
return b;
ELSE
return 0.0;
END IF;
end TERNARY;
FUNCTION TERNARY(a : std_ulogic; b,c : time) return time is
begin
IF (a = '1') THEN
return b;
ELSIF (a = '0') THEN
return c;
ELSIF (b = c) THEN
return b;
ELSE
return 0 ns;
END IF;
end TERNARY;
--pragma synthesis_on
FUNCTION TERNARY(a,b,c : std_ulogic_vector) return std_ulogic_vector is
--pragma synthesis_off
constant SIZE: NATURAL := MAX(b'LENGTH, c'LENGTH);
variable b01 : std_ulogic_vector(SIZE-1 downto 0) := (OTHERS => '0');
variable c01 : std_ulogic_vector(SIZE-1 downto 0) := (OTHERS => '0');
variable result : std_ulogic_vector(SIZE-1 downto 0);
--pragma synthesis_on
begin
IF to_boolean(to_stdlogicvector(to_bitvector(a))) THEN
return b;
--pragma synthesis_off
ELSIF (Is_X(a)) THEN
IF (b = c) THEN return b;
ELSE
b01(b'LENGTH-1 downto 0) := b;
c01(c'LENGTH-1 downto 0) := c;
FOR I IN SIZE-1 DOWNTO 0 LOOP
IF (b01(I) = c01(I) AND NOT Is_X(b01(I))) THEN
result(I) := b01(I);
ELSE
result(I) := 'X';
END IF;
END LOOP;
return result;
END IF;
--pragma synthesis_on
ELSE
return c;
END IF;
end TERNARY;
FUNCTION TERNARY(a : std_ulogic_vector; b,c : integer) return integer is
begin
IF to_boolean(to_stdlogicvector(to_bitvector(a))) THEN
return b;
--pragma synthesis_off
ELSIF (Is_X(a)) THEN
IF (b = c) THEN return b;
ELSE return 0;
END IF;
--pragma synthesis_on
ELSE
return c;
END IF;
end TERNARY;
FUNCTION TERNARY(a : std_ulogic_vector; b,c : std_ulogic) return std_ulogic is
begin
IF to_boolean(to_stdlogicvector(to_bitvector(a))) THEN
return b;
--pragma synthesis_off
ELSIF (Is_X(a)) THEN
IF (b = c) THEN return b;
ELSE return 'X';
END IF;
--pragma synthesis_on
ELSE
return c;
END IF;
end TERNARY;
FUNCTION TERNARY(a : std_ulogic_vector; b,c : std_logic_vector) return std_logic_vector is
--pragma synthesis_off
constant SIZE: NATURAL := MAX(b'LENGTH, c'LENGTH);
variable b01 : std_logic_vector(SIZE-1 downto 0) := (OTHERS => '0');
variable c01 : std_logic_vector(SIZE-1 downto 0) := (OTHERS => '0');
variable result : std_logic_vector(SIZE-1 downto 0);
--pragma synthesis_on
begin
IF to_boolean(to_stdlogicvector(to_bitvector(a))) THEN
return b;
--pragma synthesis_off
ELSIF (Is_X(a)) THEN
IF (b = c) THEN return b;
ELSE
b01(b'LENGTH-1 downto 0) := b;
c01(c'LENGTH-1 downto 0) := c;
FOR I IN SIZE-1 DOWNTO 0 LOOP
IF (b01(I) = c01(I) AND NOT Is_X(b01(I))) THEN
result(I) := b01(I);
ELSE
result(I) := 'X';
END IF;
END LOOP;
return result;
END IF;
--pragma synthesis_on
ELSE
return c;
END IF;
end TERNARY;
--pragma synthesis_off
FUNCTION TERNARY(a : std_ulogic_vector; b,c : real) return real is
begin
IF to_boolean(to_stdlogicvector(to_bitvector(a))) THEN
return b;
ELSIF (Is_X(a)) THEN
IF (b = c) THEN return b;
ELSE return 0.0;
END IF;
ELSE
return c;
END IF;
end TERNARY;
FUNCTION TERNARY(a : std_ulogic_vector; b,c : time) return time is
begin
IF to_boolean(to_stdlogicvector(to_bitvector(a))) THEN
return b;
ELSIF (Is_X(a)) THEN
IF (b = c) THEN return b;
ELSE return 0 ns;
END IF;
ELSE
return c;
END IF;
end TERNARY;
--pragma synthesis_on
FUNCTION TERNARY(a,b,c : std_logic_vector) return std_logic_vector is
--pragma synthesis_off
constant SIZE: NATURAL := MAX(b'LENGTH, c'LENGTH);
variable b01 : std_logic_vector(SIZE-1 downto 0) := (OTHERS => '0');
variable c01 : std_logic_vector(SIZE-1 downto 0) := (OTHERS => '0');
variable result : std_logic_vector(SIZE-1 downto 0);
--pragma synthesis_on
begin
IF to_boolean(to_stdlogicvector(to_bitvector(a))) THEN
return b;
--pragma synthesis_off
ELSIF (Is_X(a)) THEN
IF (b = c) THEN return b;
ELSE
b01(b'LENGTH-1 downto 0) := b;
c01(c'LENGTH-1 downto 0) := c;
FOR I IN SIZE-1 DOWNTO 0 LOOP
IF (b01(I) = c01(I) AND NOT Is_X(b01(I))) THEN
result(I) := b01(I);
ELSE
result(I) := 'X';
END IF;
END LOOP;
return result;
END IF;
--pragma synthesis_on
ELSE
return c;
END IF;
end TERNARY;
FUNCTION TERNARY(a : std_logic_vector; b,c : integer) return integer is
begin
IF to_boolean(to_stdlogicvector(to_bitvector(a))) THEN
return b;
--pragma synthesis_off
ELSIF (Is_X(a)) THEN
IF (b = c) THEN return b;
ELSE return 0;
END IF;
--pragma synthesis_on
ELSE
return c;
END IF;
end TERNARY;
FUNCTION TERNARY(a : std_logic_vector; b,c : std_ulogic) return std_ulogic is
begin
IF to_boolean(to_stdlogicvector(to_bitvector(a))) THEN
return b;
--pragma synthesis_off
ELSIF (Is_X(a)) THEN
IF (b = c) THEN return b;
ELSE return 'X';
END IF;
--pragma synthesis_on
ELSE
return c;
END IF;
end TERNARY;
FUNCTION TERNARY(a : std_logic_vector; b,c : std_ulogic_vector) return std_ulogic_vector is
--pragma synthesis_off
constant SIZE: NATURAL := MAX(b'LENGTH, c'LENGTH);
variable b01 : std_ulogic_vector(SIZE-1 downto 0) := (OTHERS => '0');
variable c01 : std_ulogic_vector(SIZE-1 downto 0) := (OTHERS => '0');
variable result : std_ulogic_vector(SIZE-1 downto 0);
--pragma synthesis_on
begin
IF to_boolean(to_stdlogicvector(to_bitvector(a))) THEN
return b;
--pragma synthesis_off
ELSIF (Is_X(a)) THEN
IF (b = c) THEN return b;
ELSE
b01(b'LENGTH-1 downto 0) := b;
c01(c'LENGTH-1 downto 0) := c;
FOR I IN SIZE-1 DOWNTO 0 LOOP
IF (b01(I) = c01(I) AND NOT Is_X(b01(I))) THEN
result(I) := b01(I);
ELSE
result(I) := 'X';
END IF;
END LOOP;
return result;
END IF;
--pragma synthesis_on
ELSE
return c;
END IF;
end TERNARY;
--pragma synthesis_off
FUNCTION TERNARY(a : std_logic_vector; b,c : real) return real is
begin
IF to_boolean(to_stdlogicvector(to_bitvector(a))) THEN
return b;
ELSIF (Is_X(a)) THEN
IF (b = c) THEN return b;
ELSE return 0.0;
END IF;
ELSE
return c;
END IF;
end TERNARY;
FUNCTION TERNARY(a : std_logic_vector; b,c : time) return time is
begin
IF to_boolean(to_stdlogicvector(to_bitvector(a))) THEN
return b;
ELSIF (Is_X(a)) THEN
IF (b = c) THEN return b;
ELSE return 0 ns;
END IF;
ELSE
return c;
END IF;
end TERNARY;
FUNCTION TERNARY(a,b,c : real) return real is
begin
IF (a /= 0) THEN
return b;
ELSE
return c;
END IF;
end TERNARY;
FUNCTION TERNARY(a : real; b,c : std_ulogic) return std_ulogic is
begin
IF (a /= 0) THEN
return b;
ELSE
return c;
END IF;
end TERNARY;
FUNCTION TERNARY(a : real; b,c : std_ulogic_vector) return std_ulogic_vector is
begin
IF (a /= 0) THEN
return b;
ELSE
return c;
END IF;
end TERNARY;
FUNCTION TERNARY(a : real; b,c : std_logic_vector) return std_logic_vector is
begin
IF (a /= 0) THEN
return b;
ELSE
return c;
END IF;
end TERNARY;
FUNCTION TERNARY(a : real; b,c : integer) return integer is
begin
IF (a /= 0) THEN
return b;
ELSE
return c;
END IF;
end TERNARY;
FUNCTION TERNARY(a : real; b,c : time) return time is
begin
IF (a /= 0) THEN
return b;
ELSE
return c;
END IF;
end TERNARY;
--pragma synthesis_on
-- functions for TERNARY combination
FUNCTION TERNARY(a : std_ulogic; b : std_logic_vector; c: std_ulogic) return
std_logic_vector IS
variable c01 : std_logic_vector(b'LENGTH-1 downto 0) := (OTHERS => '0');
--pragma synthesis_off
variable b01 : std_logic_vector(b'LENGTH-1 downto 0) := b;
variable result : std_logic_vector(b'LENGTH-1 downto 0);
--pragma synthesis_on
BEGIN
c01(0) := c;
IF (a = '1') THEN
return b;
ELSIF (a = '0') THEN
return c01;
--pragma synthesis_off
ELSIF (b01 = c01 AND NOT Is_X(b)) THEN
return b;
ELSE
FOR I IN b'LENGTH-1 DOWNTO 0 LOOP
IF (b01(I) = c01(I) AND NOT Is_X(b01(I))) THEN
result(I) := b01(I);
ELSE
result(I) := 'X';
END IF;
END LOOP;
return result;
--pragma synthesis_on
END IF;
END TERNARY;
FUNCTION TERNARY(a : std_ulogic; b : std_ulogic; c: std_logic_vector) return
std_logic_vector IS
variable b01 : std_logic_vector(c'LENGTH-1 downto 0) := (OTHERS => '0');
--pragma synthesis_off
variable c01 : std_logic_vector(c'LENGTH-1 downto 0) := c;
variable result : std_logic_vector(c'LENGTH-1 downto 0);
--pragma synthesis_on
BEGIN
b01(0) := b;
IF (a = '1') THEN
return b01;
ELSIF (a = '0') THEN
return c;
--pragma synthesis_off
ELSIF (b01 = c01 AND NOT Is_X(b01)) THEN
return b01;
ELSE
FOR I IN c'LENGTH-1 DOWNTO 0 LOOP
IF (b01(I) = c01(I) AND NOT Is_X(b01(I))) THEN
result(I) := b01(I);
ELSE
result(I) := 'X';
END IF;
END LOOP;
return result;
--pragma synthesis_on
END IF;
END TERNARY;
FUNCTION TERNARY(a : std_ulogic; b : integer; c: std_ulogic) return
integer IS
BEGIN
IF (a = '0') THEN
return to_integer(c);
ELSIF (a = '1') THEN
return b;
--pragma synthesis_off
ELSIF (b = to_integer(c) AND NOT Is_X(c)) THEN
return b;
ELSE
return 0;
--pragma synthesis_on
END IF;
END TERNARY;
FUNCTION TERNARY(a : std_ulogic; b : std_ulogic; c: integer) return
integer IS
BEGIN
IF (a = '0') THEN
return c;
ELSIF (a = '1') THEN
return to_integer(b);
--pragma synthesis_off
ELSIF (to_integer(b) = c AND NOT Is_X(b)) THEN
return c;
ELSE
return 0;
--pragma synthesis_on
END IF;
END TERNARY;
FUNCTION TERNARY(a : integer; b : integer; c: std_ulogic) return
integer IS
BEGIN
IF (a /= 0) THEN
return b;
ELSE
return to_integer(c);
END IF;
END TERNARY;
FUNCTION TERNARY(a : integer; b : std_ulogic; c: integer) return
integer IS
BEGIN
IF (a /= 0) THEN
return to_integer(b);
ELSE
return c;
END IF;
END TERNARY;
FUNCTION TERNARY(a : integer; b : std_logic_vector; c: std_ulogic) return
std_logic_vector IS
VARIABLE temp : std_logic_vector(0 downto 0);
BEGIN
IF (a /= 0) THEN
return b;
ELSE
temp(0) := c;
return temp;
END IF;
END TERNARY;
FUNCTION TERNARY(a : integer; b : std_ulogic; c: std_logic_vector) return
std_logic_vector IS
VARIABLE temp : std_logic_vector(0 downto 0);
BEGIN
IF (a /= 0) THEN
temp(0) := b;
return temp;
ELSE
return c;
END IF;
END TERNARY;
--end functions for TERNARY combination
-- FUNCTIONS for integer operations
FUNCTION "not" (l: integer) return integer is
VARIABLE temp : SIGNED(31 downto 0) := TO_SIGNED(l,32);
begin
return TO_INTEGER(NOT(temp));
end "not";
FUNCTION "and" (l,r: integer) return integer is
VARIABLE temp1 : SIGNED(31 downto 0) := TO_SIGNED(l,32);
VARIABLE temp2 : SIGNED(31 downto 0) := TO_SIGNED(r,32);
begin
return TO_INTEGER(temp1 AND temp2);
end "and";
FUNCTION "nand" (l,r: integer) return integer is
VARIABLE temp1 : SIGNED(31 downto 0) := TO_SIGNED(l,32);
VARIABLE temp2 : SIGNED(31 downto 0) := TO_SIGNED(r,32);
begin
return TO_INTEGER(temp1 NAND temp2);
end "nand";
FUNCTION "or" (l,r: integer) return integer is
VARIABLE temp1 : SIGNED(31 downto 0) := TO_SIGNED(l,32);
VARIABLE temp2 : SIGNED(31 downto 0) := TO_SIGNED(r,32);
begin
return TO_INTEGER(temp1 OR temp2);
end "or";
FUNCTION "nor" (l,r: integer) return integer is
VARIABLE temp1 : SIGNED(31 downto 0) := TO_SIGNED(l,32);
VARIABLE temp2 : SIGNED(31 downto 0) := TO_SIGNED(r,32);
begin
return TO_INTEGER(temp1 NOR temp2);
end "nor";
FUNCTION "xor" (l,r: integer) return integer is
VARIABLE temp1 : SIGNED(31 downto 0) := TO_SIGNED(l,32);
VARIABLE temp2 : SIGNED(31 downto 0) := TO_SIGNED(r,32);
begin
return TO_INTEGER(temp1 XOR temp2);
end "xor";
FUNCTION "xnor" (l,r: integer) return integer is
VARIABLE temp1 : SIGNED(31 downto 0) := TO_SIGNED(l,32);
VARIABLE temp2 : SIGNED(31 downto 0) := TO_SIGNED(r,32);
begin
return TO_INTEGER(temp1 XNOR temp2);
end "xnor";
FUNCTION "sll" (l,r: integer) return integer is
VARIABLE temp1 : SIGNED(31 downto 0) := TO_SIGNED(l,32);
begin
return TO_INTEGER(temp1 SLL r);
end "sll";
FUNCTION "srl" (l,r: integer) return integer is
VARIABLE temp1 : SIGNED(31 downto 0) := TO_SIGNED(l,32);
begin
return TO_INTEGER(temp1 SRL r);
end "srl";
-- functions for std_ulogic operations
-- first add all the tables needed
-- truth table for "=" function
CONSTANT eq_table : stdlogic_boolean_table := (
-- ----------------------------------------------------------------------------
-- | U X 0 1 Z W L H D | |
-- ----------------------------------------------------------------------------
( FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE ), -- | U |
( FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE ), -- | X |
( FALSE, FALSE, TRUE, FALSE, FALSE, FALSE, TRUE, FALSE, FALSE ), -- | 0 |
( FALSE, FALSE, FALSE, TRUE, FALSE, FALSE, FALSE, TRUE, FALSE ), -- | 1 |
( FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE ), -- | Z |
( FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE ), -- | W |
( FALSE, FALSE, TRUE, FALSE, FALSE, FALSE, TRUE, FALSE, FALSE ), -- | L |
( FALSE, FALSE, FALSE, TRUE, FALSE, FALSE, FALSE, TRUE, FALSE ), -- | H |
( FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE ) -- | D |
);
-- truth table for "/=" function
CONSTANT neq_table : stdlogic_boolean_table := (
-- ----------------------------------------------------------------------------
-- | U X 0 1 Z W L H D | |
-- ----------------------------------------------------------------------------
( FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE ), -- | U |
( FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE ), -- | X |
( FALSE, FALSE, FALSE, TRUE, FALSE, FALSE, FALSE, TRUE, FALSE ), -- | 0 |
( FALSE, FALSE, TRUE, FALSE, FALSE, FALSE, TRUE, FALSE, FALSE ), -- | 1 |
( FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE ), -- | Z |
( FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE ), -- | W |
( FALSE, FALSE, FALSE, TRUE, FALSE, FALSE, FALSE, TRUE, FALSE ), -- | L |
( FALSE, FALSE, TRUE, FALSE, FALSE, FALSE, TRUE, FALSE, FALSE ), -- | H |
( FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE ) -- | D |
);
-- truth table for "<" function
CONSTANT ltb_table : stdlogic_boolean_table := (
-- ----------------------------------------------------------------------------
-- | U X 0 1 Z W L H D | |
-- ----------------------------------------------------------------------------
( FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE ), -- | U |
( FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE ), -- | X |
( FALSE, FALSE, FALSE, TRUE, FALSE, FALSE, FALSE, TRUE, FALSE ), -- | 0 |
( FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE ), -- | 1 |
( FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE ), -- | Z |
( FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE ), -- | W |
( FALSE, FALSE, FALSE, TRUE, FALSE, FALSE, FALSE, TRUE, FALSE ), -- | L |
( FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE ), -- | H |
( FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE ) -- | D |
);
-- truth table for ">" function
CONSTANT gtb_table : stdlogic_boolean_table := (
-- ----------------------------------------------------------------------------
-- | U X 0 1 Z W L H D | |
-- ----------------------------------------------------------------------------
( FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE ), -- | U |
( FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE ), -- | X |
( FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE ), -- | 0 |
( FALSE, FALSE, TRUE, FALSE, FALSE, FALSE, TRUE, FALSE, FALSE ), -- | 1 |
( FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE ), -- | Z |
( FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE ), -- | W |
( FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE ), -- | L |
( FALSE, FALSE, TRUE, FALSE, FALSE, FALSE, TRUE, FALSE, FALSE ), -- | H |
( FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE ) -- | D |
);
-- truth table for "<=" function
CONSTANT leb_table : stdlogic_boolean_table := (
-- ----------------------------------------------------------------------------
-- | U X 0 1 Z W L H D | |
-- ----------------------------------------------------------------------------
( FALSE, FALSE, FALSE, TRUE, FALSE, FALSE, FALSE, TRUE, FALSE ), -- | U |
( FALSE, FALSE, FALSE, TRUE, FALSE, FALSE, FALSE, TRUE, FALSE ), -- | X |
( TRUE, TRUE, TRUE, TRUE, TRUE, TRUE, TRUE, TRUE, TRUE ), -- | 0 |
( FALSE, FALSE, FALSE, TRUE, FALSE, FALSE, FALSE, TRUE, FALSE ), -- | 1 |
( FALSE, FALSE, FALSE, TRUE, FALSE, FALSE, FALSE, TRUE, FALSE ), -- | Z |
( FALSE, FALSE, FALSE, TRUE, FALSE, FALSE, FALSE, TRUE, FALSE ), -- | W |
( TRUE, TRUE, TRUE, TRUE, TRUE, TRUE, TRUE, TRUE, TRUE ), -- | L |
( FALSE, FALSE, FALSE, TRUE, FALSE, FALSE, FALSE, TRUE, FALSE ), -- | H |
( FALSE, FALSE, FALSE, TRUE, FALSE, FALSE, FALSE, TRUE, FALSE ) -- | D |
);
-- truth table for ">=" function
CONSTANT geb_table : stdlogic_boolean_table := (
-- ----------------------------------------------------------------------------
-- | U X 0 1 Z W L H D | |
-- ----------------------------------------------------------------------------
( FALSE, FALSE, TRUE, FALSE, FALSE, FALSE, TRUE, FALSE, FALSE ), -- | U |
( FALSE, FALSE, TRUE, FALSE, FALSE, FALSE, TRUE, FALSE, FALSE ), -- | X |
( FALSE, FALSE, TRUE, FALSE, FALSE, FALSE, TRUE, FALSE, FALSE ), -- | 0 |
( TRUE, TRUE, TRUE, TRUE, TRUE, TRUE, TRUE, TRUE, TRUE ), -- | 1 |
( FALSE, FALSE, TRUE, FALSE, FALSE, FALSE, TRUE, FALSE, FALSE ), -- | Z |
( FALSE, FALSE, TRUE, FALSE, FALSE, FALSE, TRUE, FALSE, FALSE ), -- | W |
( FALSE, FALSE, TRUE, FALSE, FALSE, FALSE, TRUE, FALSE, FALSE ), -- | L |
( TRUE, TRUE, TRUE, TRUE, TRUE, TRUE, TRUE, TRUE, TRUE ), -- | H |
( FALSE, FALSE, TRUE, FALSE, FALSE, FALSE, TRUE, FALSE, FALSE ) -- | D |
);
CONSTANT lt_table : stdlogic_table := (
-- ----------------------------------------------------
-- | U X 0 1 Z W L H D | |
-- ----------------------------------------------------
( 'U', 'U', 'U', 'U', 'U', 'U', 'U', 'U', 'U' ), -- | U |
( 'U', 'X', 'X', 'X', 'X', 'X', 'X', 'X', 'X' ), -- | X |
( 'U', 'X', '0', '1', 'X', 'X', '0', '1', 'X' ), -- | 0 |
( 'U', 'X', '0', '0', 'X', 'X', '0', '0', 'X' ), -- | 1 |
( 'U', 'X', 'X', 'X', 'X', 'X', 'X', 'X', 'X' ), -- | Z |
( 'U', 'X', 'X', 'X', 'X', 'X', 'X', 'X', 'X' ), -- | W |
( 'U', 'X', '0', '1', 'X', 'X', '0', '1', 'X' ), -- | L |
( 'U', 'X', '0', '0', 'X', 'X', '0', '0', 'X' ), -- | H |
( 'U', 'X', 'X', 'X', 'X', 'X', 'X', 'X', 'X' ) -- | D |
);
-- truth table for ">" function
CONSTANT gt_table : stdlogic_table := (
-- ----------------------------------------------------
-- | U X 0 1 Z W L H D | |
-- ----------------------------------------------------
( 'U', 'U', 'U', 'U', 'U', 'U', 'U', 'U', 'U' ), -- | U |
( 'U', 'X', 'X', 'X', 'X', 'X', 'X', 'X', 'X' ), -- | X |
( 'U', 'X', '0', '0', 'X', 'X', '0', '0', 'X' ), -- | 0 |
( 'U', 'X', '1', '0', 'X', 'X', '1', '0', 'X' ), -- | 1 |
( 'U', 'X', 'X', 'X', 'X', 'X', 'X', 'X', 'X' ), -- | Z |
( 'U', 'X', 'X', 'X', 'X', 'X', 'X', 'X', 'X' ), -- | W |
( 'U', 'X', '0', '0', 'X', 'X', '0', '0', 'X' ), -- | L |
( 'U', 'X', '1', '0', 'X', 'X', '1', '0', 'X' ), -- | H |
( 'U', 'X', 'X', 'X', 'X', 'X', 'X', 'X', 'X' ) -- | D |
);
-- truth table for "<=" function
CONSTANT le_table : stdlogic_table := (
-- ----------------------------------------------------
-- | U X 0 1 Z W L H D | |
-- ----------------------------------------------------
( 'U', 'U', 'U', '1', 'U', 'U', 'U', '1', 'U' ), -- | U |
( 'U', 'X', 'X', '1', 'X', 'X', 'X', '1', 'X' ), -- | X |
( '1', '1', '1', '1', '1', '1', '1', '1', '1' ), -- | 0 |
( 'U', 'X', '0', '1', 'X', 'X', '0', '1', 'X' ), -- | 1 |
( 'U', 'X', 'X', '1', 'X', 'X', 'X', '1', 'X' ), -- | Z |
( 'U', 'X', 'X', '1', 'X', 'X', 'X', '1', 'X' ), -- | W |
( '1', '1', '1', '1', '1', '1', '1', '1', '1' ), -- | L |
( 'U', 'X', '0', '1', 'X', 'X', '0', '1', 'X' ), -- | H |
( 'U', 'X', 'X', '1', 'X', 'X', 'X', '1', 'X' ) -- | D |
);
-- truth table for ">=" function
CONSTANT ge_table : stdlogic_table := (
-- ----------------------------------------------------
-- | U X 0 1 Z W L H D | |
-- ----------------------------------------------------
( 'U', 'U', '1', 'U', 'U', 'U', '1', 'U', 'U' ), -- | U |
( 'U', 'X', '1', 'X', 'X', 'X', '1', 'X', 'X' ), -- | X |
( 'U', 'X', '1', '0', 'X', 'X', '1', '0', 'X' ), -- | 0 |
( '1', '1', '1', '1', '1', '1', '1', '1', '1' ), -- | 1 |
( 'U', 'X', '1', 'X', 'X', 'X', '1', 'X', 'X' ), -- | Z |
( 'U', 'X', '1', 'X', 'X', 'X', '1', 'X', 'X' ), -- | W |
( 'U', 'X', '1', '0', 'X', 'X', '1', '0', 'X' ), -- | L |
( '1', '1', '1', '1', '1', '1', '1', '1', '1' ), -- | H |
( 'U', 'X', '1', 'X', 'X', 'X', '1', 'X', 'X' ) -- | D |
);
FUNCTION "=" ( l : Boolean; r : natural ) RETURN Boolean is
begin
IF l = TRUE AND r = 1 THEN
return TRUE;
ELSIF l = FALSE AND r = 0 THEN
return TRUE;
ELSE
return FALSE;
END IF;
end "=";
FUNCTION "/=" ( l : Boolean; r : natural ) RETURN Boolean is
begin
return NOT (l = r);
end "/=";
-----------------------------------------------------------------
FUNCTION "=" ( l : integer; r : std_logic_vector ) RETURN boolean IS
BEGIN
RETURN l = SIGNED(r);
END "=";
-----------------------------------------------------------------
FUNCTION "/=" ( l : integer; r : std_logic_vector ) RETURN boolean IS
BEGIN
RETURN l /= SIGNED(r);
END "/=";
-----------------------------------------------------------------
FUNCTION "<" ( l : integer; r : std_logic_vector ) RETURN boolean IS
BEGIN
RETURN l < SIGNED(r);
END "<";
-----------------------------------------------------------------
FUNCTION ">" ( l : integer; r : std_logic_vector ) RETURN boolean IS
BEGIN
RETURN l > SIGNED(r);
END ">";
-----------------------------------------------------------------
FUNCTION "<=" ( l : integer; r : std_logic_vector ) RETURN boolean IS
BEGIN
RETURN l <= SIGNED(r);
END "<=";
-----------------------------------------------------------------
FUNCTION ">=" ( l : integer; r : std_logic_vector ) RETURN boolean IS
BEGIN
RETURN l >= SIGNED(r);
END ">=";
-----------------------------------------------------------------
FUNCTION "=" ( l : std_logic_vector; r : integer ) RETURN boolean IS
BEGIN
RETURN SIGNED(l) = r;
END "=";
-----------------------------------------------------------------
FUNCTION "/=" ( l : std_logic_vector; r : integer ) RETURN boolean IS
BEGIN
RETURN SIGNED(l) /= r;
END "/=";
-----------------------------------------------------------------
FUNCTION "<" ( l : std_logic_vector; r : integer ) RETURN boolean IS
BEGIN
RETURN SIGNED(l) < r;
END "<";
-----------------------------------------------------------------
FUNCTION ">" ( l : std_logic_vector; r : integer ) RETURN boolean IS
BEGIN
RETURN SIGNED(l) > r;
END ">";
-----------------------------------------------------------------
FUNCTION "<=" ( l : std_logic_vector; r : integer ) RETURN boolean IS
BEGIN
RETURN SIGNED(l) <= r;
END "<=";
-----------------------------------------------------------------
FUNCTION ">=" ( l : std_logic_vector; r : integer ) RETURN boolean IS
BEGIN
RETURN SIGNED(l) >= r;
END ">=";
-----------------------------------------------------------------
--logical functions between std_logic_vector and integer, std_logic_vector and boolean
FUNCTION "and" ( l : std_logic_vector; r : integer ) RETURN std_logic_vector is
BEGIN
RETURN l and to_stdlogicvector(l, 32);
END;
-----------------------------------------------------------------
FUNCTION "nand" ( l : std_logic_vector; r : integer ) RETURN std_logic_vector IS
BEGIN
RETURN l nand to_stdlogicvector(l, 32);
END;
-----------------------------------------------------------------
FUNCTION "or" ( l : std_logic_vector; r : integer ) RETURN std_logic_vector IS
BEGIN
RETURN l or to_stdlogicvector(l, 32);
END;
-----------------------------------------------------------------
FUNCTION "nor" ( l : std_logic_vector; r : integer ) RETURN std_logic_vector IS
BEGIN
RETURN l nor to_stdlogicvector(l, 32);
END;
-----------------------------------------------------------------
FUNCTION "xor" ( l : std_logic_vector; r : integer ) RETURN std_logic_vector IS
BEGIN
RETURN l xor to_stdlogicvector(l, 32);
END;
-----------------------------------------------------------------
FUNCTION "and" ( l : integer; r : std_logic_vector ) RETURN integer IS
BEGIN
RETURN l and v2v_to_integer(r);
END;
-----------------------------------------------------------------
FUNCTION "nand" ( l : integer; r : std_logic_vector ) RETURN integer IS
BEGIN
RETURN l nand v2v_to_integer(r);
END;
-----------------------------------------------------------------
FUNCTION "or" ( l : integer; r : std_logic_vector ) RETURN integer IS
BEGIN
RETURN l or v2v_to_integer(r);
END;
-----------------------------------------------------------------
FUNCTION "nor" ( l : integer; r : std_logic_vector ) RETURN integer IS
BEGIN
RETURN l nor v2v_to_integer(r);
END;
-----------------------------------------------------------------
FUNCTION "xor" ( l : integer; r : std_logic_vector ) RETURN integer IS
BEGIN
RETURN l xor v2v_to_integer(r);
END;
-----------------------------------------------------------------
FUNCTION "and" ( l : std_logic_vector; r : boolean ) RETURN std_logic_vector IS
BEGIN
RETURN l and to_stdlogicvector(r,32);
END;
-----------------------------------------------------------------
FUNCTION "nand" ( l : std_logic_vector; r : boolean ) RETURN std_logic_vector IS
BEGIN
RETURN l nand to_stdlogicvector(r,32);
END;
-----------------------------------------------------------------
FUNCTION "or" ( l : std_logic_vector; r : boolean ) RETURN std_logic_vector IS
BEGIN
RETURN l or to_stdlogicvector(r,32);
END;
-----------------------------------------------------------------
FUNCTION "nor" ( l : std_logic_vector; r : boolean ) RETURN std_logic_vector IS
BEGIN
RETURN l nor to_stdlogicvector(r,32);
END;
-----------------------------------------------------------------
FUNCTION "xor" ( l : std_logic_vector; r : boolean ) RETURN std_logic_vector IS
BEGIN
RETURN l xor to_stdlogicvector(r,32);
END;
-----------------------------------------------------------------
FUNCTION "and" ( l : boolean; r : std_logic_vector ) RETURN boolean IS
BEGIN
RETURN l and to_boolean(r);
END;
-----------------------------------------------------------------
FUNCTION "nand" ( l : boolean; r : std_logic_vector ) RETURN boolean IS
BEGIN
RETURN l nand to_boolean(r);
END;
-----------------------------------------------------------------
FUNCTION "or" ( l : boolean; r : std_logic_vector ) RETURN boolean IS
BEGIN
RETURN l or to_boolean(r);
END;
-----------------------------------------------------------------
FUNCTION "nor" ( l : boolean; r : std_logic_vector ) RETURN boolean IS
BEGIN
RETURN l nor to_boolean(r);
END;
-----------------------------------------------------------------
FUNCTION "xor" ( l : boolean; r : std_logic_vector ) RETURN boolean IS
BEGIN
RETURN l xor to_boolean(r);
END;
--logical functions between std_logic_vector and integer, std_logic_vector and boolean
-----------------------------------------------------------------
-- Added functions for std_logic, integer
FUNCTION "=" ( l : std_logic; r : integer ) RETURN boolean IS
BEGIN
RETURN to_integer(l) = r;
END "=";
-----------------------------------------------------------------
FUNCTION "/=" ( l : std_logic; r : integer ) RETURN boolean IS
BEGIN
RETURN to_integer(l) /= r;
END "/=";
-----------------------------------------------------------------
FUNCTION "<" ( l : std_logic; r : integer ) RETURN boolean IS
BEGIN
RETURN to_integer(l) < r;
END "<";
-----------------------------------------------------------------
FUNCTION ">" ( l : std_logic; r : integer ) RETURN boolean IS
BEGIN
RETURN to_integer(l) > r;
END ">";
-----------------------------------------------------------------
FUNCTION "<=" ( l : std_logic; r : integer ) RETURN boolean IS
BEGIN
RETURN to_integer(l) <= r;
END "<=";
-----------------------------------------------------------------
FUNCTION ">=" ( l : std_logic; r : integer ) RETURN boolean IS
BEGIN
RETURN to_integer(l) >= r;
END ">=";
-----------------------------------------------------------------
-- Functions for std_logic, integer
-----------------------------------------------------------------
--pragma synthesis_off
-- arithmetic operations for real and int and int and real
FUNCTION "+" ( l : real; r : integer ) RETURN real IS
BEGIN
RETURN l + to_real(r);
END;
FUNCTION "-" ( l : real; r : integer ) RETURN real IS
BEGIN
RETURN l - to_real(r);
END;
FUNCTION "/" ( l : real; r : integer ) RETURN real IS
BEGIN
RETURN l / to_real(r);
END;
FUNCTION "*" ( l : real; r : integer ) RETURN real IS
BEGIN
RETURN l * to_real(r);
END ;
FUNCTION "+" ( l : integer; r : real ) RETURN real IS
BEGIN
RETURN to_real(l) + r;
END;
FUNCTION "-" ( l : integer; r : real ) RETURN real IS
BEGIN
RETURN to_real(l) - r;
END;
FUNCTION "/" ( l : integer; r : real ) RETURN real IS
BEGIN
RETURN to_real(l) / l;
END;
FUNCTION "*" ( l : integer; r : real ) RETURN real IS
BEGIN
RETURN to_real(l) * r;
END;
-- end arithmetic operations for real and int and int and real
-----------------------------------------------------------------
FUNCTION "=" ( l : real; r : integer ) RETURN boolean IS
BEGIN
RETURN INTEGER(l) = r;
END "=";
-----------------------------------------------------------------
FUNCTION "/=" ( l : real; r : integer ) RETURN boolean IS
BEGIN
RETURN INTEGER(l) /= r;
END "/=";
-----------------------------------------------------------------
FUNCTION "<" ( l : real; r : integer ) RETURN boolean IS
BEGIN
RETURN INTEGER(l) < r;
END "<";
-----------------------------------------------------------------
FUNCTION ">" ( l : real; r : integer ) RETURN boolean IS
BEGIN
RETURN INTEGER(l) > r;
END ">";
-----------------------------------------------------------------
FUNCTION "<=" ( l : real; r : integer ) RETURN boolean IS
BEGIN
RETURN INTEGER(l) <= r;
END "<=";
-----------------------------------------------------------------
FUNCTION ">=" ( l : real; r : integer ) RETURN boolean IS
BEGIN
RETURN INTEGER(l) >= r;
END ">=";
-----------------------------------------------------------------
FUNCTION "=" ( l : integer; r : real ) RETURN boolean IS
BEGIN
RETURN l = INTEGER(r);
END "=";
-----------------------------------------------------------------
FUNCTION "/=" ( l : integer; r : real ) RETURN boolean IS
BEGIN
RETURN l /= INTEGER(r);
END "/=";
-----------------------------------------------------------------
FUNCTION "<" ( l : integer; r : real ) RETURN boolean IS
BEGIN
RETURN l < INTEGER(r);
END "<";
-----------------------------------------------------------------
FUNCTION ">" ( l : integer; r : real ) RETURN boolean IS
BEGIN
RETURN l > INTEGER(r);
END ">";
-----------------------------------------------------------------
FUNCTION "<=" ( l : integer; r : real ) RETURN boolean IS
BEGIN
RETURN l <= INTEGER(r);
END "<=";
-----------------------------------------------------------------
FUNCTION ">=" ( l : integer; r : real ) RETURN boolean IS
BEGIN
RETURN l >= INTEGER(r);
END ">=";
--pragma synthesis_on
-----------------------------------------------------------------
FUNCTION "+" ( l, r : std_logic_vector ) RETURN std_logic_vector is
begin
return STD_LOGIC_VECTOR(UNSIGNED(l) + UNSIGNED(r));
end "+";
------------------------------------------------------------------
FUNCTION "-" ( l, r : std_logic_vector ) RETURN std_logic_vector is
begin
return STD_LOGIC_VECTOR(UNSIGNED(l) - UNSIGNED(r));
end "-";
------------------------------------------------------------------
FUNCTION "*" ( l, r : std_logic_vector ) RETURN std_logic_vector is
begin
return STD_LOGIC_VECTOR(UNSIGNED(l) * UNSIGNED(r));
end "*";
------------------------------------------------------------------
FUNCTION "/" ( l, r : std_logic_vector ) RETURN std_logic_vector is
begin
return STD_LOGIC_VECTOR(UNSIGNED(l) / UNSIGNED(r));
end "/";
------------------------------------------------------------------
FUNCTION "REM" ( l, r : std_logic_vector ) RETURN std_logic_vector is
begin
return STD_LOGIC_VECTOR(UNSIGNED(l) rem UNSIGNED(r));
end "REM";
------------------------------------------------------------------
FUNCTION "+" ( l : std_logic_vector; r : integer ) RETURN std_logic_vector is
begin
return STD_LOGIC_VECTOR(SIGNED(l) + r);
end "+";
------------------------------------------------------------------
FUNCTION "-" ( l : std_logic_vector; r : integer ) RETURN std_logic_vector is
begin
return STD_LOGIC_VECTOR(SIGNED(l) - r);
end "-";
------------------------------------------------------------------
FUNCTION "*" ( l : std_logic_vector; r : integer ) RETURN std_logic_vector is
begin
return STD_LOGIC_VECTOR(SIGNED(l) * r);
end "*";
------------------------------------------------------------------
FUNCTION "/" ( l : std_logic_vector; r : integer ) RETURN std_logic_vector is
begin
return STD_LOGIC_VECTOR(SIGNED(l) / r);
end "/";
------------------------------------------------------------------
FUNCTION "REM" ( l : std_logic_vector; r : integer ) RETURN std_logic_vector is
begin
return STD_LOGIC_VECTOR(SIGNED(l) rem r);
end "REM";
------------------------------------------------------------------
FUNCTION "&" ( l : std_logic_vector; r : integer ) RETURN std_logic_vector is
begin
return l & to_stdlogic(r);
end "&";
------------------------------------------------------------------
FUNCTION "&" ( l : std_logic_vector; r : boolean ) RETURN std_logic_vector is
begin
return l & to_stdlogic(r);
end "&";
------------------------------------------------------------------
FUNCTION "+" ( l : std_logic_vector; r : std_logic ) RETURN std_logic_vector is
begin
return STD_LOGIC_VECTOR(SIGNED(l) + to_integer(r));
end "+";
------------------------------------------------------------------
FUNCTION "-" ( l : std_logic_vector; r : std_logic ) RETURN std_logic_vector is
begin
return STD_LOGIC_VECTOR(SIGNED(l) - to_integer(r));
end "-";
------------------------------------------------------------------
FUNCTION "*" ( l : std_logic_vector; r : std_logic ) RETURN std_logic_vector is
begin
return STD_LOGIC_VECTOR(SIGNED(l) * to_integer(r));
end "*";
------------------------------------------------------------------
FUNCTION "/" ( l : std_logic_vector; r : std_logic ) RETURN std_logic_vector is
begin
return STD_LOGIC_VECTOR(SIGNED(l) / to_integer(r));
end "/";
------------------------------------------------------------------
FUNCTION "REM" ( l : std_logic_vector; r : std_logic ) RETURN std_logic_vector is
begin
return STD_LOGIC_VECTOR(SIGNED(l) rem to_integer(r));
end "REM";
------------------------------------------------------------------
FUNCTION "+" ( l : std_logic; r : std_logic_vector ) RETURN std_logic_vector is
begin
return STD_LOGIC_VECTOR(to_integer(l) + SIGNED(r));
END "+";
------------------------------------------------------------------
FUNCTION "-" ( l : std_logic; r : std_logic_vector ) RETURN std_logic_vector is
begin
return STD_LOGIC_VECTOR(to_integer(l) - SIGNED(r));
END "-";
------------------------------------------------------------------
FUNCTION "*" ( l : std_logic; r : std_logic_vector ) RETURN std_logic_vector is
begin
return STD_LOGIC_VECTOR(to_integer(l) * SIGNED(r));
END "*";
------------------------------------------------------------------
FUNCTION "/" ( l : std_logic; r : std_logic_vector ) RETURN std_logic_vector is
begin
return STD_LOGIC_VECTOR(to_integer(l) / SIGNED(r));
END "/";
------------------------------------------------------------------
FUNCTION "REM" ( l : std_logic; r : std_logic_vector ) RETURN std_logic_vector is
begin
return STD_LOGIC_VECTOR(to_integer(l) REM SIGNED(r));
END "REM";
-------------------------------------------------------------
-- need logical functions bet. std_logic_vector and std_logic
FUNCTION "and" ( l : std_logic_vector; r : std_logic ) RETURN std_logic_vector IS
BEGIN
RETURN l and to_stdlogicvector(r, l'length);
END "and";
--------------------------------------------------------------
FUNCTION "nand" ( l : std_logic_vector; r : std_logic ) RETURN std_logic_vector IS
BEGIN
RETURN l nand to_stdlogicvector(r, l'length);
END "nand";
--------------------------------------------------------------
FUNCTION "or" ( l : std_logic_vector; r : std_logic ) RETURN std_logic_vector IS
BEGIN
RETURN l or to_stdlogicvector(r, l'length);
END "or";
--------------------------------------------------------------
FUNCTION "nor" ( l : std_logic_vector; r : std_logic ) RETURN std_logic_vector IS
BEGIN
RETURN l nor to_stdlogicvector(r, l'length);
END "nor";
--------------------------------------------------------------
FUNCTION "xor" ( l : std_logic_vector; r : std_logic ) RETURN std_logic_vector IS
BEGIN
RETURN l xor to_stdlogicvector(r, l'length);
END "xor";
--------------------------------------------------------------
FUNCTION "xnor" ( l : std_logic_vector; r : std_logic ) RETURN std_logic_vector IS
BEGIN
RETURN NOT(l xor to_stdlogicvector(r, l'length));
END "xnor";
--------------------------------------------------------------
FUNCTION "and" ( l : std_logic; r : std_logic_vector ) RETURN std_logic_vector IS
BEGIN
RETURN to_stdlogicvector(l, r'length) and r;
END "and";
--------------------------------------------------------------
FUNCTION "nand" ( l : std_logic; r : std_logic_vector ) RETURN std_logic_vector IS
BEGIN
RETURN to_stdlogicvector(l, r'length) nand r;
END "nand";
--------------------------------------------------------------
FUNCTION "or" ( l : std_logic; r : std_logic_vector ) RETURN std_logic_vector IS
BEGIN
RETURN to_stdlogicvector(l, r'length) or r;
END "or";
--------------------------------------------------------------
FUNCTION "nor" ( l : std_logic; r : std_logic_vector ) RETURN std_logic_vector IS
BEGIN
RETURN to_stdlogicvector(l, r'length) nor r;
END "nor";
--------------------------------------------------------------
FUNCTION "xor" ( l : std_logic; r : std_logic_vector ) RETURN std_logic_vector IS
BEGIN
RETURN to_stdlogicvector(l, r'length) xor r;
END "xor";
--------------------------------------------------------------
FUNCTION "xnor" ( l : std_logic; r : std_logic_vector ) RETURN std_logic_vector IS
BEGIN
RETURN NOT(to_stdlogicvector(l, r'length) xor r);
END "xnor";
--------------------------------------------------------------
-- end logical functions for std_logic_vector and std_logic
------------------------------------------------------------------
-- need arith functions bet std_logic and std_logic
-- used only when the int can be 0 or 1
-- need arithmetic functions bet. std_logic_vector and std_logic
FUNCTION "+" ( l : std_logic; r : std_logic ) RETURN std_logic IS
BEGIN
return to_stdlogic(to_integer(l) + to_integer(r));
END "+";
FUNCTION "-" ( l : std_logic; r : std_logic ) RETURN std_logic IS
BEGIN
return to_stdlogic(to_integer(l) - to_integer(r));
END "-";
FUNCTION "*" ( l : std_logic; r : std_logic ) RETURN std_logic IS
BEGIN
return to_stdlogic(to_integer(l) * to_integer(r));
END "*";
FUNCTION "/" ( l : std_logic; r : std_logic ) RETURN std_logic IS
BEGIN
return to_stdlogic(to_integer(l) / to_integer(r));
END "/";
FUNCTION "REM" ( l : std_logic; r : std_logic ) RETURN std_logic IS
BEGIN
return to_stdlogic(to_integer(l) REM to_integer(r));
END "REM";
------- Arithmatic operations between std_logic and integer
-- caveat, functions below return integer
FUNCTION "+" ( l : std_logic; r : integer ) RETURN integer IS
BEGIN
return to_integer(l) + r;
END "+";
-------------------------------------------------------
FUNCTION "-" ( l : std_logic; r : integer ) RETURN integer IS
BEGIN
return to_integer(l) - r;
END "-";
-------------------------------------------------------
FUNCTION "*" ( l : std_logic; r : integer ) RETURN integer IS
BEGIN
return to_integer(l) * r;
END "*";
-------------------------------------------------------
FUNCTION "/" ( l : std_logic; r : integer ) RETURN integer IS
BEGIN
return to_integer(l) / r;
END "/";
-------------------------------------------------------
FUNCTION "REM" ( l : std_logic; r : integer ) RETURN integer IS
BEGIN
return to_integer(l) REM r;
END "REM";
-------------------------------------------------------
-------------------------------------------------------
FUNCTION "+" ( l : integer; r : std_logic ) RETURN integer IS
begin
return l + to_integer(r);
END "+";
-------------------------------------------------------
FUNCTION "-" ( l : integer; r : std_logic ) RETURN integer IS
begin
return l - to_integer(r);
END "-";
-------------------------------------------------------
FUNCTION "*" ( l : integer; r : std_logic ) RETURN integer IS
begin
return l * to_integer(r);
END "*";
-------------------------------------------------------
FUNCTION "/" ( l : integer; r : std_logic ) RETURN integer IS
begin
return l / to_integer(r);
END "/";
-------------------------------------------------------
FUNCTION "REM" ( l : integer; r : std_logic ) RETURN integer IS
begin
return l REM to_integer(r);
END "REM";
-------------------------------------------------------
FUNCTION "+" ( l : integer; r : std_logic_vector ) RETURN integer IS
BEGIN
RETURN to_integer(l + SIGNED(r));
END "+";
------------------------------------------------------------------
FUNCTION "-" ( l : integer; r : std_logic_vector ) RETURN integer IS
BEGIN
RETURN to_integer(l - SIGNED(r));
END "-";
------------------------------------------------------------------
FUNCTION "*" ( l : integer; r : std_logic_vector ) RETURN integer IS
BEGIN
RETURN to_integer(l * SIGNED(r));
END "*";
------------------------------------------------------------------
FUNCTION "/" ( l : integer; r : std_logic_vector ) RETURN integer IS
BEGIN
RETURN to_integer(l / SIGNED(r));
END "/";
------------------------------------------------------------------
FUNCTION "REM" ( l : integer; r : std_logic_vector ) RETURN integer IS
BEGIN
RETURN to_integer(l REM SIGNED(r));
END "REM";
------------------------------------------------------------------
FUNCTION "and" ( l : std_logic; r : integer ) RETURN std_logic IS
BEGIN
RETURN l and to_stdlogic(r);
END "and";
------------------------------------------------------------------
FUNCTION "nand" ( l : std_logic; r : integer ) RETURN std_logic IS
BEGIN
RETURN l nand to_stdlogic(r);
END "nand";
------------------------------------------------------------------
FUNCTION "or" ( l : std_logic; r : integer ) RETURN std_logic IS
BEGIN
RETURN l or to_stdlogic(r);
END "or";
------------------------------------------------------------------
FUNCTION "nor" ( l : std_logic; r : integer ) RETURN std_logic IS
BEGIN
RETURN l nor to_stdlogic(r);
END "nor";
------------------------------------------------------------------
FUNCTION "xor" ( l : std_logic; r : integer ) RETURN std_logic IS
BEGIN
RETURN l xor to_stdlogic(r);
END "xor";
------------------------------------------------------------------
FUNCTION "&" ( l : std_logic; r : integer ) RETURN std_logic_vector IS
BEGIN
RETURN l & to_stdlogic(r);
END "&";
------------------------------------------------------------------
FUNCTION "xnor" ( l : std_logic; r : integer ) RETURN std_logic IS
BEGIN
RETURN not(l xor to_stdlogic(r));
END "xnor";
------------------------------------------------------------------
FUNCTION "and" ( l : integer; r : std_logic ) RETURN integer IS
VARIABLE tmp : integer := 0;
BEGIN
RETURN l and to_integer(r);
END "and";
------------------------------------------------------------------
FUNCTION "nand" ( l : integer; r : std_logic ) RETURN integer IS
VARIABLE tmp : integer := 0;
BEGIN
RETURN l nand to_integer(r);
END "nand";
------------------------------------------------------------------
FUNCTION "or" ( l : integer; r : std_logic ) RETURN integer IS
VARIABLE tmp : integer := 0;
BEGIN
RETURN l or to_integer(r);
END "or";
------------------------------------------------------------------
FUNCTION "nor" ( l : integer; r : std_logic ) RETURN integer IS
VARIABLE tmp : integer := 0;
BEGIN
RETURN l nor to_integer(r);
END "nor";
------------------------------------------------------------------
FUNCTION "xor" ( l : integer; r : std_logic ) RETURN integer IS
VARIABLE tmp : integer := 0;
BEGIN
RETURN l xor to_integer(r);
END "xor";
------------------------------------------------------------------
FUNCTION "&" ( l : integer; r : std_logic ) RETURN std_logic_vector IS
BEGIN
RETURN to_stdlogic(l) & r;
END "&";
------------------------------------------------------------------
FUNCTION "xnor" ( l : integer; r : std_logic ) RETURN integer IS
VARIABLE tmp : integer := 0;
BEGIN
RETURN l xnor to_integer(r);
END "xnor";
------------------------------------------------------------------
FUNCTION "and" ( l : std_logic ; r : boolean ) RETURN std_logic IS
BEGIN
RETURN l AND to_stdlogic(r);
END "and";
------------------------------------------------------------------
FUNCTION "nand" ( l : std_logic ; r : boolean ) RETURN std_logic IS
BEGIN
RETURN l NAND to_stdlogic(r);
END "nand";
------------------------------------------------------------------
FUNCTION "or" ( l : std_logic ; r : boolean ) RETURN std_logic IS
BEGIN
RETURN l OR to_stdlogic(r);
END "or";
------------------------------------------------------------------
FUNCTION "nor" ( l : std_logic ; r : boolean ) RETURN std_logic IS
BEGIN
RETURN l NOR to_stdlogic(r);
END "nor";
------------------------------------------------------------------
FUNCTION "xor" ( l : std_logic ; r : boolean ) RETURN std_logic IS
BEGIN
RETURN l XOR to_stdlogic(r);
END "xor";
------------------------------------------------------------------
FUNCTION "&" ( l : std_logic; r : boolean ) RETURN std_logic_vector IS
BEGIN
RETURN l & to_stdlogic(r);
END "&";
------------------------------------------------------------------
FUNCTION "xnor" ( l : std_logic ; r : boolean ) RETURN std_logic IS
BEGIN
RETURN NOT(l XOR to_stdlogic(r));
END "xnor";
------------------------------------------------------------------
FUNCTION "and" ( l : boolean ; r : std_logic ) RETURN boolean IS
VARIABLE tmp : std_logic := 'U';
BEGIN
tmp := to_stdlogic(l) AND r;
RETURN to_boolean(tmp);
END "and";
------------------------------------------------------------------
FUNCTION "nand" ( l : boolean ; r : std_logic ) RETURN boolean IS
VARIABLE tmp : std_logic := 'U';
BEGIN
tmp := to_stdlogic(l) NAND r;
RETURN to_boolean(tmp);
END "nand";
------------------------------------------------------------------
FUNCTION "or" ( l : boolean ; r : std_logic ) RETURN boolean IS
VARIABLE tmp : std_logic := 'U';
BEGIN
tmp := to_stdlogic(l) OR r;
RETURN to_boolean(tmp);
END "or";
------------------------------------------------------------------
FUNCTION "nor" ( l : boolean ; r : std_logic ) RETURN boolean IS
VARIABLE tmp : std_logic := 'U';
BEGIN
tmp := to_stdlogic(l) NOR r;
RETURN to_boolean(tmp);
END "nor";
------------------------------------------------------------------
FUNCTION "xor" ( l : boolean ; r : std_logic ) RETURN boolean IS
VARIABLE tmp : std_logic := 'U';
BEGIN
tmp := to_stdlogic(l) XOR r;
RETURN to_boolean(tmp);
END "xor";
------------------------------------------------------------------
FUNCTION "&" ( l : boolean ; r : std_logic ) RETURN std_logic_vector IS
BEGIN
RETURN to_stdlogic(l) & r;
END "&";
------------------------------------------------------------------
FUNCTION "xnor" ( l : boolean ; r : std_logic ) RETURN boolean IS
VARIABLE tmp : std_logic := 'U';
BEGIN
tmp := NOT(to_stdlogic(l) XOR r);
RETURN to_boolean(tmp);
END "xnor";
------------------------------------------------------------------
FUNCTION "and" ( l : integer; r : boolean ) RETURN integer IS
BEGIN
RETURN l and to_integer(r);
END "and";
------------------------------------------------------------------
FUNCTION "nand" ( l : integer; r : boolean ) RETURN integer IS
BEGIN
RETURN l nand to_integer(r);
END "nand";
------------------------------------------------------------------
FUNCTION "or" ( l : integer; r : boolean ) RETURN integer IS
BEGIN
RETURN l or to_integer(r);
END "or";
------------------------------------------------------------------
FUNCTION "nor" ( l : integer; r : boolean ) RETURN integer IS
BEGIN
RETURN l nor to_integer(r);
END "nor";
------------------------------------------------------------------
FUNCTION "xor" ( l : integer; r : boolean ) RETURN integer IS
BEGIN
RETURN l xor to_integer(r);
END "xor";
------------------------------------------------------------------
FUNCTION "&" ( l : integer; r : boolean ) RETURN std_logic_vector IS
BEGIN
RETURN to_stdlogic(l) & to_stdlogic(r);
END "&";
------------------------------------------------------------------
FUNCTION "xnor" ( l : integer; r : boolean ) RETURN integer IS
BEGIN
RETURN l xnor to_integer(r);
END "xnor";
------------------------------------------------------------------
FUNCTION "and" ( l : boolean; r : integer ) RETURN boolean IS
BEGIN
RETURN l AND to_boolean(r);
END "and";
------------------------------------------------------------------
FUNCTION "nand" ( l : boolean; r : integer ) RETURN boolean IS
BEGIN
RETURN l NAND to_boolean(r);
END "nand";
------------------------------------------------------------------
FUNCTION "or" ( l : boolean; r : integer ) RETURN boolean IS
BEGIN
RETURN l or to_boolean(r);
END "or";
------------------------------------------------------------------
FUNCTION "nor" ( l : boolean; r : integer ) RETURN boolean IS
BEGIN
RETURN l nor to_boolean(r);
END "nor";
------------------------------------------------------------------
FUNCTION "xor" ( l : boolean; r : integer ) RETURN boolean IS
BEGIN
RETURN l xor to_boolean(r);
END "xor";
------------------------------------------------------------------
FUNCTION "&" ( l : boolean; r : integer ) RETURN std_logic_vector IS
BEGIN
RETURN to_stdlogic(l) & to_stdlogic(r);
END "&";
------------------------------------------------------------------
FUNCTION "xnor" ( l : boolean; r : integer ) RETURN boolean IS
BEGIN
RETURN l xnor to_boolean(r);
END "xnor";
------------------------------------------------------------------
-- Overloaded function for text output
FUNCTION to_bitvector ( a : bit ) RETURN bit_vector IS
VARIABLE s : bit_vector ( 1 TO 1 );
BEGIN
s(1) := a;
RETURN s;
END to_bitvector;
------------------------------------------------------------------
FUNCTION to_bitvector ( a : std_ulogic ) RETURN bit_vector IS
VARIABLE s : bit_vector ( 1 TO 1 );
BEGIN
s(1) := to_bit(a);
RETURN s;
END to_bitvector;
------------------------------------------------------------------
FUNCTION to_bitvector ( a : integer ) RETURN bit_vector IS
VARIABLE s : bit_vector ( 31 DOWNTO 0 );
BEGIN
s := to_bitvector(STD_LOGIC_VECTOR(to_signed(a, 32)));
RETURN s;
END to_bitvector;
------------------------------------------------------------------
FUNCTION to_stdlogicvector(l : integer; size : natural; dir : direction := little_endian) RETURN std_logic_vector IS
BEGIN
IF dir = little_endian THEN
RETURN STD_LOGIC_VECTOR(to_signed(l,size));
ELSE
RETURN STD_LOGIC_VECTOR(to_signed(l,size) ROL size); -- rotate left by size times
END IF;
END to_stdlogicvector;
------------------------------------------------------------------
FUNCTION to_stdlogicvector(l : std_logic_vector ) RETURN std_logic_vector IS
BEGIN
RETURN l;
END to_stdlogicvector;
------------------------------------------------------------------
FUNCTION to_stdlogicvector(l : std_logic_vector; size : natural; dir : direction := little_endian )
RETURN std_logic_vector IS
VARIABLE tmp1 : UNSIGNED(l'length-1 downto 0);
VARIABLE tmp2 : UNSIGNED(size-1 downto 0);
BEGIN
IF dir = little_endian THEN
RETURN STD_LOGIC_VECTOR(resize(UNSIGNED(l),size));
ELSE
-- using function ROTATE_LEFT to make it both 87 and 93 compliant
-- first get eqiv. in descending range
-- second resize
-- finally, rotate and return
tmp1 := ROTATE_LEFT(UNSIGNED(l),l'length);
tmp2 := resize(UNSIGNED(tmp1),size);
RETURN STD_LOGIC_VECTOR(ROTATE_LEFT(UNSIGNED(tmp2),size));
END IF;
END to_stdlogicvector;
------------------------------------------------------------------
FUNCTION to_stdlogicvector(l : std_logic; size : natural) RETURN std_logic_vector IS
VARIABLE tmp : std_logic_vector(size-1 DOWNTO 0) := (OTHERS => '0');
BEGIN
tmp(0) := l;
RETURN tmp;
END to_stdlogicvector;
------------------------------------------------------------------
FUNCTION to_stdlogicvector(l : boolean; size : natural) RETURN std_logic_vector IS
VARIABLE tmp : std_logic_vector(size-1 DOWNTO 0) := (OTHERS => '0');
BEGIN
tmp(0) := to_stdlogic(l);
RETURN tmp;
END to_stdlogicvector;
------------------------------------------------------------------
FUNCTION to_integer(l : integer) RETURN integer IS
BEGIN
RETURN l;
END to_integer;
------------------------------------------------------------------
FUNCTION to_integer(l : std_logic) RETURN integer IS
BEGIN
IF ( l = '0') THEN
RETURN 0;
ELSIF (l = '1') THEN
RETURN 1;
ELSE
ASSERT FALSE REPORT("Std_logic values other than '0' and '1' cannot be converted to integer type")
SEVERITY WARNING;
RETURN 0;
END IF;
END to_integer;
------------------------------------------------------------------
FUNCTION to_integer(l : boolean) RETURN integer IS
BEGIN
IF ( l = TRUE) THEN
RETURN 0;
ELSE
RETURN 1;
END IF;
END to_integer;
------------------------------------------------------------------
FUNCTION to_stdlogic(l : integer) RETURN std_logic IS
VARIABLE ret_val : std_logic := '0';
BEGIN
IF l = 0 THEN
ret_val := '0';
ELSIF l = 1 THEN
ret_val := '1';
ELSE
ASSERT FALSE REPORT("Integers other than 0 and 1 cannot be converted to std_logic type")
SEVERITY WARNING;
END IF;
RETURN ret_val;
END to_stdlogic;
------------------------------------------------------------------
FUNCTION to_stdlogic(l : Boolean) RETURN std_logic IS
VARIABLE ret_val : std_logic := '0';
BEGIN
IF l = FALSE THEN
ret_val := '0';
ELSE
ret_val := '1';
END IF;
RETURN ret_val;
END to_stdlogic;
------------------------------------------------------------------
FUNCTION to_stdlogic(l : std_logic) RETURN std_logic IS
BEGIN
RETURN l;
END to_stdlogic;
------------------------------------------------------------------
FUNCTION to_stdlogic(l : std_logic_vector) RETURN std_logic IS
BEGIN
RETURN l(l'LOW);
END to_stdlogic;
------------------------------------------------------------------
FUNCTION to_integer(l : std_logic_vector; dir : direction := little_endian) RETURN integer IS
BEGIN
IF dir = little_endian THEN
-- RETURN to_integer(SIGNED(l));
RETURN to_integer(UNSIGNED(l));
ELSE
-- RETURN to_integer(SIGNED(l) ROR l'LENGTH);
RETURN to_integer(UNSIGNED(l) ROR l'LENGTH);
END IF;
END to_integer;
------------------------------------------------------------------
FUNCTION v2v_to_integer(l : std_logic_vector; dir : direction := little_endian) RETURN integer IS
BEGIN
IF dir = little_endian THEN
-- RETURN to_integer(SIGNED(l));
RETURN to_integer(UNSIGNED(l));
ELSE
--NOTE, since ROR is not available in 87, we will use ROTATE_RIGHT
RETURN to_integer(ROTATE_RIGHT(UNSIGNED(l) , l'LENGTH));
-- RETURN to_integer(UNSIGNED(l) ROR l'LENGTH);
END IF;
END v2v_to_integer;
------------------------------------------------------------------
FUNCTION v2v_to_integer(l : integer) RETURN integer IS
BEGIN
RETURN l;
END v2v_to_integer;
------------------------------------------------------------------
FUNCTION v2v_to_integer(l : std_logic) RETURN integer IS
BEGIN
IF ( l = '0') THEN
RETURN 0;
ELSIF (l = '1') THEN
RETURN 1;
ELSE
ASSERT FALSE REPORT("Std_logic values other than '0' and '1' cannot be converted to integer type")
SEVERITY WARNING;
RETURN 0;
END IF;
END v2v_to_integer;
------------------------------------------------------------------
FUNCTION v2v_to_integer(l : boolean) RETURN integer IS
BEGIN
IF ( l = TRUE) THEN
RETURN 0;
ELSE
RETURN 1;
END IF;
END v2v_to_integer;
------------------------------------------------------------------
--pragma synthesis_off
------------------------------------------------------------------
FUNCTION to_real(l : integer) RETURN real IS
BEGIN
RETURN REAL(l);
END to_real;
------------------------------------------------------------------
FUNCTION to_real(l : real) RETURN real IS
BEGIN
RETURN l;
END to_real;
--pragma synthesis_on
------------------------------------------------------------------
FUNCTION to_boolean(l : std_logic) RETURN boolean IS
BEGIN
IF ( l = '0' ) THEN
RETURN FALSE;
ELSIF (l = '1') THEN
RETURN TRUE;
ELSE
ASSERT FALSE REPORT("Std_logic values other than '0' and '1' cannot be converted to boolean type")
SEVERITY WARNING;
RETURN FALSE;
END IF;
END to_boolean;
------------------------------------------------------------------
FUNCTION to_boolean(l : std_logic_vector) RETURN boolean IS
VARIABLE tmp : std_logic_vector(l'RANGE);
BEGIN
tmp := (OTHERS=>'1');
if to_integer(l AND tmp) /= 0 THEN
RETURN TRUE;
END IF;
RETURN FALSE;
END to_boolean;
------------------------------------------------------------------
FUNCTION to_boolean(l : boolean) RETURN boolean IS
BEGIN
IF ( l) THEN
RETURN TRUE;
END IF;
RETURN FALSE;
END to_boolean;
------------------------------------------------------------------
FUNCTION to_boolean(l : integer) RETURN boolean IS
BEGIN
IF ( l = 0 ) THEN
RETURN FALSE;
ELSE
RETURN TRUE;
END IF;
END to_boolean;
------------------------------------------------------------------
FUNCTION "sll" ( l : std_logic_vector; r : integer) RETURN std_logic_vector IS
VARIABLE v : std_logic_vector(l'RANGE) := (others=>'0');
BEGIN
IF r=0 THEN
RETURN l;
ELSIF r<0 THEN
RETURN "srl"(l,-r);
ELSIF r<l'LENGTH THEN
IF l'LEFT<l'RIGHT THEN
FOR i IN l'LEFT TO (l'RIGHT-r) LOOP
v(i) := l(i+r);
END LOOP;
ELSE
FOR i IN l'LEFT DOWNTO (l'RIGHT+r) LOOP
v(i) := l(i-r);
END LOOP;
END IF;
END IF;
RETURN v;
END;
FUNCTION "sll" ( l : std_ulogic_vector; r : integer) RETURN std_ulogic_vector IS
VARIABLE v : std_ulogic_vector(l'RANGE) := (others=>'0');
BEGIN
IF r=0 THEN
RETURN l;
ELSIF r<0 THEN
RETURN "srl"(l,-r);
ELSIF r<l'LENGTH THEN
IF l'LEFT<l'RIGHT THEN
FOR i IN l'LEFT TO (l'RIGHT-r) LOOP
v(i) := l(i+r);
END LOOP;
ELSE
FOR i IN l'LEFT DOWNTO (l'RIGHT+r) LOOP
v(i) := l(i-r);
END LOOP;
END IF;
END IF;
RETURN v;
END;
FUNCTION "srl" ( l : std_logic_vector; r : integer) RETURN std_logic_vector IS
VARIABLE v : std_logic_vector(l'RANGE) := (others=>'0');
BEGIN
IF r=0 THEN
RETURN l;
ELSIF r<0 THEN
RETURN "sll"(l,-r);
ELSIF r<l'LENGTH THEN
IF l'LEFT<l'RIGHT THEN
FOR i IN l'LEFT TO (l'RIGHT-r) LOOP
v(i+r) := l(i);
END LOOP;
ELSE
FOR i IN l'LEFT DOWNTO (l'RIGHT+r) LOOP
v(i-r) := l(i);
END LOOP;
END IF;
END IF;
RETURN v;
END;
FUNCTION "srl" ( l : std_ulogic_vector; r : integer) RETURN std_ulogic_vector IS
VARIABLE v : std_ulogic_vector(l'RANGE) := (others=>'0');
BEGIN
IF r=0 THEN
RETURN l;
ELSIF r<0 THEN
RETURN "sll"(l,-r);
ELSIF r<l'LENGTH THEN
IF l'LEFT<l'RIGHT THEN
FOR i IN l'LEFT TO (l'RIGHT-r) LOOP
v(i+r) := l(i);
END LOOP;
ELSE
FOR i IN l'LEFT DOWNTO (l'RIGHT+r) LOOP
v(i-r) := l(i);
END LOOP;
END IF;
END IF;
RETURN v;
END;
FUNCTION "sla" ( l : std_logic_vector; r : integer) RETURN std_logic_vector IS
VARIABLE v : std_logic_vector(l'RANGE) := (others=>l(l'RIGHT));
BEGIN
IF r=0 THEN
RETURN l;
ELSIF r<0 THEN
RETURN "sra"(l,-r);
ELSIF r<l'LENGTH THEN
IF l'LEFT<l'RIGHT THEN
FOR i IN l'LEFT TO (l'RIGHT-r) LOOP
v(i) := l(i+r);
END LOOP;
ELSE
FOR i IN l'LEFT DOWNTO (l'RIGHT+r) LOOP
v(i) := l(i-r);
END LOOP;
END IF;
END IF;
RETURN v;
END;
FUNCTION "sla" ( l : std_ulogic_vector; r : integer) RETURN std_ulogic_vector IS
VARIABLE v : std_ulogic_vector(l'RANGE) := (others=>l(l'RIGHT));
BEGIN
IF r=0 THEN
RETURN l;
ELSIF r<0 THEN
RETURN "sra"(l,-r);
ELSIF r<l'LENGTH THEN
IF l'LEFT<l'RIGHT THEN
FOR i IN l'LEFT TO (l'RIGHT-r) LOOP
v(i) := l(i+r);
END LOOP;
ELSE
FOR i IN l'LEFT DOWNTO (l'RIGHT+r) LOOP
v(i) := l(i-r);
END LOOP;
END IF;
END IF;
RETURN v;
END;
FUNCTION "sra" ( l : std_logic_vector; r : integer) RETURN std_logic_vector IS
VARIABLE v : std_logic_vector(l'RANGE) := (others=>l(l'RIGHT));
BEGIN
IF r=0 THEN
RETURN l;
ELSIF r<0 THEN
RETURN "sla"(l,-r);
ELSIF r<l'LENGTH THEN
IF l'LEFT<l'RIGHT THEN
FOR i IN l'LEFT TO (l'RIGHT-r) LOOP
v(i+r) := l(i);
END LOOP;
ELSE
FOR i IN l'LEFT DOWNTO (l'RIGHT+r) LOOP
v(i-r) := l(i);
END LOOP;
END IF;
END IF;
RETURN v;
END;
FUNCTION "sra" ( l : std_ulogic_vector; r : integer) RETURN std_ulogic_vector IS
VARIABLE v : std_ulogic_vector(l'RANGE) := (others=>l(l'RIGHT));
BEGIN
IF r=0 THEN
RETURN l;
ELSIF r<0 THEN
RETURN "sla"(l,-r);
ELSIF r<l'LENGTH THEN
IF l'LEFT<l'RIGHT THEN
FOR i IN l'LEFT TO (l'RIGHT-r) LOOP
v(i+r) := l(i);
END LOOP;
ELSE
FOR i IN l'LEFT DOWNTO (l'RIGHT+r) LOOP
v(i-r) := l(i);
END LOOP;
END IF;
END IF;
RETURN v;
END;
FUNCTION "rol" ( l : std_logic_vector; r : integer) RETURN std_logic_vector IS
VARIABLE v : std_logic_vector(0 TO l'LENGTH*2-1);
VARIABLE v1 : std_logic_vector(l'RANGE);
BEGIN
IF r=0 THEN
RETURN l;
ELSIF r<0 THEN
RETURN "ror"(l,-r);
ELSE
v(0 TO l'LENGTH-1) := l;
v(l'LENGTH TO v'LENGTH-1) := l;
v1 := v(r TO r+l'LENGTH-1);
RETURN v1;
END IF;
END;
FUNCTION "rol" ( l : std_ulogic_vector; r : integer) RETURN std_ulogic_vector IS
VARIABLE v : std_ulogic_vector(0 TO l'LENGTH*2-1);
VARIABLE v1 : std_ulogic_vector(l'RANGE);
BEGIN
IF r=0 THEN
RETURN l;
ELSIF r<0 THEN
RETURN "ror"(l,-r);
ELSE
v(0 TO l'LENGTH-1) := l;
v(l'LENGTH TO v'LENGTH-1) := l;
v1 := v(r TO r+l'LENGTH-1);
RETURN v1;
END IF;
END;
FUNCTION "ror" ( l : std_logic_vector; r : integer) RETURN std_logic_vector IS
VARIABLE v : std_logic_vector(0 TO l'LENGTH*2-1);
VARIABLE v1 : std_logic_vector(l'RANGE);
BEGIN
IF r=0 THEN
RETURN l;
ELSIF r<0 THEN
RETURN "rol"(l,-r);
ELSE
v(0 TO l'LENGTH-1) := l;
v(l'LENGTH TO v'LENGTH-1) := l;
v1 := v(l'LENGTH-r TO v'LENGTH-r-1);
RETURN v1;
END IF;
END;
FUNCTION "ror" ( l : std_ulogic_vector; r : integer) RETURN std_ulogic_vector IS
VARIABLE v : std_ulogic_vector(0 TO l'LENGTH*2-1);
VARIABLE v1 : std_ulogic_vector(l'RANGE);
BEGIN
IF r=0 THEN
RETURN l;
ELSIF r<0 THEN
RETURN "rol"(l,-r);
ELSE
v(0 TO l'LENGTH-1) := l;
v(l'LENGTH TO v'LENGTH-1) := l;
v1 := v(l'LENGTH-r TO v'LENGTH-r-1);
RETURN v1;
END IF;
END;
FUNCTION to_stdlogicvector(hex : STRING) RETURN std_logic_vector IS
VARIABLE result : std_logic_vector(4 * hex'LENGTH DOWNTO 1);
BEGIN
-- Note: The hex parameter can have a range with hex'LOW > 1.
-- For these cases, variable index i in assignments in the FOR loop is normalized
-- to 1 by subtracting hex'LOW ** sas 2/13/96 **
FOR i in hex'RANGE LOOP
CASE hex(i) IS
WHEN '0' =>
result(4*(hex'LENGTH - (i-hex'LOW)) DOWNTO 4*(hex'LENGTH - (i-hex'LOW)) -3) := x"0";
WHEN '1' =>
result(4*(hex'LENGTH - (i-hex'LOW)) DOWNTO 4*(hex'LENGTH - (i-hex'LOW)) -3) := x"1";
WHEN '2' =>
result(4*(hex'LENGTH - (i-hex'LOW)) DOWNTO 4*(hex'LENGTH - (i-hex'LOW)) -3) := x"2";
WHEN '3' =>
result(4*(hex'LENGTH - (i-hex'LOW)) DOWNTO 4*(hex'LENGTH - (i-hex'LOW)) -3) := x"3";
WHEN '4' =>
result(4*(hex'LENGTH - (i-hex'LOW)) DOWNTO 4*(hex'LENGTH - (i-hex'LOW)) -3) := x"4";
WHEN '5' =>
result(4*(hex'LENGTH - (i-hex'LOW)) DOWNTO 4*(hex'LENGTH - (i-hex'LOW)) -3) := x"5";
WHEN '6' =>
result(4*(hex'LENGTH - (i-hex'LOW)) DOWNTO 4*(hex'LENGTH - (i-hex'LOW)) -3) := x"6";
WHEN '7' =>
result(4*(hex'LENGTH - (i-hex'LOW)) DOWNTO 4*(hex'LENGTH - (i-hex'LOW)) -3) := x"7";
WHEN '8' =>
result(4*(hex'LENGTH - (i-hex'LOW)) DOWNTO 4*(hex'LENGTH - (i-hex'LOW)) -3) := x"8";
WHEN '9' =>
result(4*(hex'LENGTH - (i-hex'LOW)) DOWNTO 4*(hex'LENGTH - (i-hex'LOW)) -3) := x"9";
WHEN 'A' | 'a' =>
result(4*(hex'LENGTH - (i-hex'LOW)) DOWNTO 4*(hex'LENGTH - (i-hex'LOW)) -3) := x"A";
WHEN 'B' | 'b' =>
result(4*(hex'LENGTH - (i-hex'LOW)) DOWNTO 4*(hex'LENGTH - (i-hex'LOW)) -3) := x"B";
WHEN 'C' | 'c' =>
result(4*(hex'LENGTH - (i-hex'LOW)) DOWNTO 4*(hex'LENGTH - (i-hex'LOW)) -3) := x"C";
WHEN 'D' | 'd' =>
result(4*(hex'LENGTH - (i-hex'LOW)) DOWNTO 4*(hex'LENGTH - (i-hex'LOW)) -3) := x"D";
WHEN 'E' | 'e' =>
result(4*(hex'LENGTH - (i-hex'LOW)) DOWNTO 4*(hex'LENGTH - (i-hex'LOW)) -3) := x"E";
WHEN 'F' | 'f' =>
result(4*(hex'LENGTH - (i-hex'LOW)) DOWNTO 4*(hex'LENGTH - (i-hex'LOW)) -3) := x"F";
WHEN 'X' | 'x' =>
result(4*(hex'LENGTH - (i-hex'LOW)) DOWNTO 4*(hex'LENGTH - (i-hex'LOW)) -3) := "XXXX";
WHEN 'Z' | 'z' =>
result(4*(hex'LENGTH - (i-hex'LOW)) DOWNTO 4*(hex'LENGTH - (i-hex'LOW)) -3) := "ZZZZ";
WHEN OTHERS =>
result(4*(hex'LENGTH - (i-hex'LOW)) DOWNTO 4*(hex'LENGTH - (i-hex'LOW)) -3) := "XXXX";
END CASE;
END LOOP;
RETURN result;
END to_stdlogicvector;
end FUNCTIONS;
|
gpl-3.0
|
EliasLuiz/TCC
|
Leon3/lib/gaisler/memctrl/srctrl.vhd
|
1
|
15334
|
------------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2003 - 2008, Gaisler Research
-- Copyright (C) 2008 - 2014, Aeroflex Gaisler
-- Copyright (C) 2015 - 2016, Cobham Gaisler
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-----------------------------------------------------------------------------
-- Entity: srctrl
-- File: srctrl.vhd
-- Author: Jiri Gaisler - Gaisler Research
-- Modified: Marko Isomaki - Gaisler Research
-- Description: 32-bit SRAM memory controller with read-modify-write
-- Supports also 64-bit AHB read/write accesses
------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
library grlib;
use grlib.amba.all;
use grlib.stdlib.all;
library gaisler;
use grlib.devices.all;
use gaisler.memctrl.all;
entity srctrl is
generic (
hindex : integer := 0;
romaddr : integer := 0;
rommask : integer := 16#ff0#;
ramaddr : integer := 16#400#;
rammask : integer := 16#ff0#;
ioaddr : integer := 16#200#;
iomask : integer := 16#ff0#;
ramws : integer := 0;
romws : integer := 2;
iows : integer := 2;
rmw : integer := 0; -- read-modify-write enable
prom8en : integer := 0;
oepol : integer := 0;
srbanks : integer range 1 to 5 := 1;
banksz : integer range 0 to 13 := 13;
romasel : integer range 0 to 28 := 19
);
port (
rst : in std_ulogic;
clk : in std_ulogic;
ahbsi : in ahb_slv_in_type;
ahbso : out ahb_slv_out_type;
sri : in memory_in_type;
sro : out memory_out_type;
sdo : out sdctrl_out_type
);
end;
architecture rtl of srctrl is
constant VERSION : amba_version_type := 0;
constant hconfig : ahb_config_type := (
0 => ahb_device_reg(VENDOR_GAISLER, GAISLER_SRCTRL, 0, VERSION, 0),
4 => ahb_membar(romaddr, '1', '1', rommask),
5 => ahb_membar(ramaddr, '1', '1', rammask),
6 => ahb_membar(ioaddr, '0', '0', iomask),
others => zero32);
type srcycletype is (idle, read1, read2, write1, write2, write3, rmw1, rmw2, rmw3);
type prom8cycletype is (idle, read1, read2);
function byteswap (rdata, wdata : std_logic_vector(31 downto 0); addr, size : std_logic_vector) return std_logic_vector is
variable tmp : std_logic_vector(31 downto 0);
variable a : std_logic_vector(1 downto 0);
begin
tmp := rdata; a := addr(1 downto 0);
if size(0) = '0' then
case a is
when "00" => tmp(31 downto 24) := wdata(31 downto 24);
when "01" => tmp(23 downto 16) := wdata(23 downto 16);
when "10" => tmp(15 downto 8) := wdata(15 downto 8);
when others => tmp(7 downto 0) := wdata(7 downto 0);
end case;
else
if addr(1) = '0' then tmp(31 downto 16) := wdata(31 downto 16);
else tmp(15 downto 0) := wdata(15 downto 0); end if;
end if;
return(tmp);
end;
-- local registers
type reg_type is record
hready : std_ulogic;
hsel : std_ulogic;
hmbsel : std_logic_vector(0 to 2);
bdrive : std_ulogic;
nbdrive : std_ulogic;
srstate : srcycletype;
haddr : std_logic_vector(31 downto 0);
hrdata : std_logic_vector(63 downto 0);
hwdata : std_logic_vector(63 downto 0);
hwrite : std_ulogic;
htrans : std_logic_vector(1 downto 0);
hburst : std_logic_vector(2 downto 0);
hresp : std_logic_vector(1 downto 0);
size : std_logic_vector(1 downto 0);
read : std_ulogic;
oen : std_ulogic;
ramsn : std_ulogic;
romsn : std_ulogic;
vramsn : std_logic_vector(4 downto 0);
ramoen : std_logic_vector(4 downto 0);
vromsn : std_logic_vector(1 downto 0);
writen : std_ulogic;
wen : std_logic_vector(3 downto 0);
mben : std_logic_vector(3 downto 0);
ws : std_logic_vector(3 downto 0);
iosn : std_ulogic;
-- 8-bit prom access
pr8state : prom8cycletype;
data8 : std_logic_vector(23 downto 0);
ready8 : std_ulogic;
bwidth : std_logic_vector(1 downto 0);
end record;
signal r, ri : reg_type;
-- vectored output enable to data pads
signal rbdrive, ribdrive : std_logic_vector(31 downto 0);
attribute syn_preserve : boolean;
attribute syn_preserve of rbdrive : signal is true;
begin
ctrl : process(rst, ahbsi, r, sri, rbdrive)
variable v : reg_type; -- local variables for registers
variable dqm : std_logic_vector(3 downto 0);
variable adec : std_logic_vector(1 downto 0);
variable rams : std_logic_vector(4 downto 0);
variable roms : std_logic_vector(1 downto 0);
variable haddr : std_logic_vector(31 downto 0);
variable hrdata : std_logic_vector(63 downto 0);
variable hsize : std_logic_vector(1 downto 0);
variable hwrite : std_ulogic;
variable htrans : std_logic_vector(1 downto 0);
variable vramws, vromws, viows : std_logic_vector(3 downto 0);
-- 8-bit prom access
variable romsn : std_ulogic;
variable bdrive : std_ulogic;
variable oen : std_ulogic;
variable writen : std_ulogic;
variable hready : std_ulogic;
variable ws : std_logic_vector(3 downto 0);
variable prom8sel : std_ulogic;
variable vbdrive : std_logic_vector(31 downto 0);
variable sbdrive : std_ulogic;
begin
-- Variable default settings to avoid latches
v := r; v.hresp := HRESP_OKAY; v.hrdata(31 downto 0) := sri.data;
hrdata := r.hrdata;
vramws := conv_std_logic_vector(ramws, 4); vbdrive := rbdrive;
vromws := conv_std_logic_vector(romws, 4);
viows := conv_std_logic_vector(iows, 4);
v.bwidth := sri.bwidth;
if (prom8en = 1) and (r.bwidth = "00") then prom8sel := '1';
else prom8sel := '0'; end if;
if (ahbsi.hready = '1') then
if (ahbsi.hsel(hindex) and ahbsi.htrans(1)) = '1' then
v.size := ahbsi.hsize(1 downto 0); v.hwrite := ahbsi.hwrite;
v.htrans := ahbsi.htrans; v.hburst := ahbsi.hburst;
v.hsel := '1'; v.hmbsel := ahbsi.hmbsel(0 to 2);
v.haddr := ahbsi.haddr; v.hready := '0';
else
v.hsel := '0';
end if;
end if;
if (r.hsel = '1') and (ahbsi.hready = '0') then
haddr := r.haddr; hsize := r.size;
htrans := r.htrans; hwrite := r.hwrite;
else
haddr := ahbsi.haddr; hsize := ahbsi.hsize(1 downto 0);
htrans := ahbsi.htrans; hwrite := ahbsi.hwrite;
end if;
-- chip-select decoding
adec := haddr(banksz+14 downto banksz+13);
rams := '0' & decode(adec);
case srbanks is
when 1 => rams := "00001";
when 2 => rams := "000" & (rams(3 downto 2) or rams(1 downto 0));
when others => null;
end case;
roms := haddr(romasel) & not haddr(romasel);
-- generate write strobes
if rmw = 1 then dqm := "0000"; else
case r.size is
when "00" =>
case r.haddr(1 downto 0) is
when "00" => dqm := "1110";
when "01" => dqm := "1101";
when "10" => dqm := "1011";
when others => dqm := "0111";
end case;
when "01" =>
if r.haddr(1) = '0' then dqm := "1100"; else dqm := "0011"; end if;
when others => dqm := "0000";
end case;
end if;
-- main FSM
case r.srstate is
when idle =>
if (v.hsel = '1') and not
(((v.ramsn or r.romsn) = '0') or ((v.romsn or r.ramsn) = '0')) and not
((v.hmbsel(0) and not hwrite and prom8sel) = '1' and prom8en = 1)
then
v.hready := '0';
v.ramsn := not v.hmbsel(1); v.romsn := not v.hmbsel(0);
v.iosn := not v.hmbsel(2);
v.read := not hwrite;
if hwrite = '1' then
if (rmw = 1) and (hsize(1) = '0') and (v.hmbsel(1) = '1') then
v.srstate := rmw1; v.read := '1';
else v.srstate := write1; end if;
elsif ahbsi.htrans = "10" then v.srstate := read1;
else v.srstate := read2; end if;
v.oen := not v.read;
else
v.ramsn := '1'; v.romsn := '1'; v.bdrive := '1'; v.oen := '1';
v.iosn := '1';
end if;
if v.romsn = '0' then v.ws := vromws;
elsif v.iosn = '0' then v.ws := viows;
else v.ws := vramws; end if;
when read1 =>
v.srstate := read2;
v.hrdata(63 downto 32) := r.hrdata(31 downto 0);
when read2 =>
v.ws := r.ws -1; v.oen := '0';
if r.ws = "0000" then
if (r.size /= "11") or (r.haddr(2) = '1') or (AHBDW = 32) then
v.srstate := idle; v.hready := '1'; v.haddr := ahbsi.haddr;
v.ramsn := not (ahbsi.hmbsel(1) and ahbsi.htrans(1));
v.romsn := not (ahbsi.hmbsel(0) and ahbsi.htrans(1));
v.oen := not (ahbsi.hsel(hindex) and ahbsi.htrans(1) and not ahbsi.hwrite);
else
v.srstate := read1; v.haddr(2) := '1';
if v.romsn = '0' then v.ws := vromws;
elsif v.iosn = '0' then v.ws := viows;
else v.ws := vramws; end if;
end if;
end if;
when write1 =>
if r.romsn = '0' then v.ws := vromws;
elsif v.iosn = '0' then v.ws := viows;
else v.ws := vramws; end if;
v.srstate := write2; v.bdrive := '0'; v.wen := dqm; v.writen := '0';
v.hwdata(31 downto 0) := ahbsi.hwdata(31 downto 0);
if not ((r.size = "11") and (r.haddr(2) = '1')) then
v.hwdata(63 downto 32) := ahbsi.hwdata(63 mod AHBDW downto 32 mod AHBDW);
end if;
when write2 =>
if r.ws = "0000" then
if (r.size /= "11") or (r.haddr(2) = '1') or (AHBDW = 32) then
v.srstate := idle; v.bdrive := '1'; v.hready := '1';
else
v.srstate := write3;
end if;
v.wen := "1111"; v.writen := '1';
end if;
v.ws := r.ws -1;
when write3 =>
v.haddr(2) := '1'; v.hwdata(63 downto 32) := r.hwdata(31 downto 0);
v.srstate := write1;
when rmw1 =>
if (rmw = 1) then v.oen := '0';
v.srstate := rmw2;
v.hwdata(31 downto 0) := ahbsi.hwdata(31 downto 0);
v.hwdata(63 downto 32) := ahbsi.hwdata(63 mod AHBDW downto 32 mod AHBDW);
end if;
when rmw2 =>
if (rmw = 1) then
v.ws := r.ws -1;
if r.ws = "0000" then v.oen := '1'; v.srstate := rmw3; end if;
end if;
when rmw3 =>
if (rmw = 1) then
v.hwdata(63 downto 32) := byteswap(r.hrdata(31 downto 0), r.hwdata(63 downto 32), r.haddr, r.size);
v.srstate := write2; v.bdrive := '0'; v.wen := dqm; v.writen := '0';
end if;
if r.romsn = '0' then v.ws := vromws; else v.ws := vramws; end if;
end case;
if (ahbsi.hready and ahbsi.hsel(hindex) ) = '1' then
if ahbsi.htrans(1) = '0' then v.hready := '1'; end if;
end if;
-- 8-bit PROM access FSM
if prom8en = 1 then
hready := '0'; ws := v.ws; v.ready8 := '0';
bdrive := '1'; oen := '1'; writen := '1'; romsn := '1';
if r.ready8 = '1' then
v.data8 := r.data8(15 downto 0) & r.hrdata(31 downto 24);
case r.size is
when "00" => hrdata(31 downto 0) := r.hrdata(31 downto 24) &
r.hrdata(31 downto 24) & r.hrdata(31 downto 24) & r.hrdata(31 downto 24);
when "01" => hrdata(31 downto 0) := r.data8(7 downto 0) & r.hrdata(31 downto 24) &
r.data8(7 downto 0) & r.hrdata(31 downto 24);
when others => hrdata(31 downto 0) := r.data8 & r.hrdata(31 downto 24);
end case;
end if;
case r.pr8state is
when idle =>
if ( (v.hsel and v.hmbsel(0) and not hwrite and prom8sel) = '1')
then
romsn := '0'; v.pr8state := read1; oen := '0';
end if;
when read1 =>
oen := '0'; romsn := '0'; v.pr8state := read2; ws := vromws;
when read2 =>
oen := '0'; ws := r.ws - 1; romsn := '0';
if r.ws = "0000" then
v.haddr(1 downto 0) := r.haddr(1 downto 0) + 1;
if (r.size = "00") or ((r.size = "01") and (r.haddr(0) = '1'))
or r.haddr(1 downto 0) = "11"
then
hready := '1'; v.pr8state := idle; oen := '1';
else
v.pr8state := read1;
end if;
v.ready8 := '1';
end if;
when others =>
v.pr8state := idle;
end case;
v.romsn := v.romsn and romsn; v.bdrive := v.bdrive and bdrive;
v.oen := v.oen and oen; v.writen := v.writen and writen;
v.hready := v.hready or hready; v.ws := ws;
end if;
if (v.oen or v.ramsn) = '0' then v.ramoen := not rams;
else v.ramoen := (others => '1'); end if;
if v.romsn = '0' then v.vromsn := not roms;
else v.vromsn := (others => '1'); end if;
if v.ramsn = '0' then v.vramsn := not rams;
else v.vramsn := (others => '1'); end if;
if v.read = '1' then v.mben := "0000"; else v.mben := v.wen; end if;
v.nbdrive := not v.bdrive;
if oepol = 1 then sbdrive := r.nbdrive; vbdrive := (others => v.nbdrive);
else sbdrive := r.bdrive; vbdrive := (others => v.bdrive); end if;
if (r.size /= "11") or (AHBDW = 32) then hrdata(63 downto 32) := hrdata(31 downto 0); end if;
-- reset
if rst = '0' then
v.srstate := idle; v.hsel := '0'; v.writen := '1';
v.wen := (others => '1'); v.hready := '1'; v.read := '1';
v.ws := (others => '0');
if prom8en = 1 then v.pr8state := idle; end if;
end if;
ribdrive <= vbdrive;
ri <= v;
sro.address <= r.haddr;
sro.bdrive <= (others => sbdrive);
sro.vbdrive <= rbdrive;
sro.ramsn <= "111" & r.vramsn;
sro.ramoen <= "111" & r.ramoen;
sro.romsn <= "111111" & r.vromsn;
sro.iosn <= r.iosn;
sro.wrn <= r.wen;
sro.oen <= r.oen;
sro.read <= r.read;
sro.data <= r.hwdata(63 downto 32);
sro.writen <= r.writen;
sro.ramn <= r.ramsn;
sro.romn <= r.romsn;
ahbso.hready <= r.hready;
ahbso.hresp <= r.hresp;
ahbso.hrdata <= ahbdrivedata(hrdata);
ahbso.hconfig <= hconfig;
ahbso.hirq <= (others => '0');
ahbso.hindex <= hindex;
ahbso.hsplit <= (others => '0');
end process;
sdo <= sdctrl_out_none;
sro.mben <= r.mben;
sro.sdram_en <= '0';
sro.rs_edac_en <= '0';
sro.ce <= '0';
sro.sddata <= (others => '0');
sro.svbdrive <= (others => '0');
sro.sa <= (others => '0');
sro.cb <= (others => '0');
sro.scb <= (others => '0');
sro.vcdrive <= (others => '0');
sro.svcdrive <= (others => '0');
sro.scb <= (others => '0');
regs : process(clk,rst)
begin
if rising_edge(clk) then r <= ri; rbdrive <= ribdrive; end if;
if rst = '0' then
r.ramsn <= '1';
r.romsn <= '1'; r.oen <= '1';
r.bdrive <= '1'; r.nbdrive <= '0';
r.vramsn <= (others => '1'); r.vromsn <= (others => '1');
if oepol = 0 then rbdrive <= (others => '1');
else rbdrive <= (others => '0'); end if;
end if;
end process;
-- pragma translate_off
bootmsg : report_version
generic map ("srctrl" & tost(hindex) &
": 32-bit PROM/SRAM controller rev " & tost(VERSION));
-- pragma translate_on
end;
|
gpl-3.0
|
EliasLuiz/TCC
|
Leon3/lib/gaisler/leon3v3/cmvalidbits.vhd
|
1
|
3639
|
------------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2003 - 2008, Gaisler Research
-- Copyright (C) 2008 - 2014, Aeroflex Gaisler
-- Copyright (C) 2015 - 2016, Cobham Gaisler
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-----------------------------------------------------------------------------
-- Entity: cmvalidbits
-- File: cmvalidbits.vhd
-- Author: Magnus Hjorth - Cobham Gaisler
-- Description: Separate valid bits for data cache implemented with registers
------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity cmvalidbits is
generic (
abits : integer;
nways : integer range 1 to 4
);
port (
clk : in std_ulogic;
caddr: in std_logic_vector(abits-1 downto 0);
cenable: in std_logic_vector(0 to nways-1);
cwrite: in std_logic_vector(0 to nways-1);
cwdata: in std_logic_vector(0 to nways-1);
crdata: out std_logic_vector(0 to nways-1);
saddr: in std_logic_vector(abits-1 downto 0);
sclear: in std_logic_vector(0 to nways-1);
flush: in std_ulogic
);
end;
architecture rtl of cmvalidbits is
type validbits_array_type is array(0 to 2**abits-1) of std_logic_vector(0 to nways-1);
type validbits_regs is record
valid: validbits_array_type;
pcaddr: std_logic_vector(abits-1 downto 0);
pcwrite: std_logic_vector(0 to nways-1);
pcwdata: std_logic_vector(0 to nways-1);
psaddr: std_logic_vector(abits-1 downto 0);
end record;
signal r,nr: validbits_regs;
begin
comb: process(r,caddr,cenable,cwrite,cwdata,saddr,sclear,flush)
variable vrdata: std_logic_vector(0 to nways-1);
variable v: validbits_regs;
variable wv: std_logic_vector(0 to nways-1);
variable av: std_logic_vector(abits-1 downto 0);
variable amask: std_logic_vector(0 to 2**abits-1);
begin
v := r;
v.pcaddr := caddr;
v.pcwrite := cenable and cwrite;
v.pcwdata := cwdata;
v.psaddr := saddr;
-- Note: sclear is asserted one cycle after saddr so no pipeline reg on that
vrdata := r.valid(to_integer(unsigned(r.pcaddr)));
for i in 0 to 2**abits-1 loop
wv := r.valid(i);
av := std_logic_vector(to_unsigned(i,abits));
if r.pcaddr=av then
for j in 0 to nways-1 loop
if r.pcwrite(j)='1' then
wv(j) := r.pcwdata(j);
end if;
end loop;
end if;
if r.psaddr=av then
for j in 0 to nways-1 loop
if sclear(j)='1' then
wv(j) := '0';
end if;
end loop;
end if;
if flush='1' then
wv := (others => '0');
end if;
v.valid(i) := wv;
end loop;
nr <= v;
crdata <= vrdata;
end process;
regs: process(clk)
begin
if rising_edge(clk) then r <= nr; end if;
end process;
end;
|
gpl-3.0
|
EliasLuiz/TCC
|
Leon3/lib/gaisler/grdmac/grdmac_pkg.vhd
|
1
|
10389
|
------------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2003 - 2008, Gaisler Research
-- Copyright (C) 2008 - 2014, Aeroflex Gaisler
-- Copyright (C) 2015 - 2016, Cobham Gaisler
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-----------------------------------------------------------------------------
-- Package: grdmac_pkg
-- File: grdmac_pkg.vhd
-- Author: Andrea Gianarro - Aeroflex Gaisler AB
-- Description: Package for GRDMAC and its components
------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
-- pragma translate_off
use std.textio.all;
-- pragma translate_on
library grlib;
use grlib.config_types.all;
use grlib.config.all;
use grlib.stdlib.all;
use grlib.amba.all;
package grdmac_pkg is
type grdmac_ahb_dma_in_type is record
address : std_logic_vector(31 downto 0);
wdata : std_logic_vector(AHBDW-1 downto 0);
start : std_ulogic;
burst : std_ulogic;
first_beat : std_ulogic;
write : std_ulogic;
busy : std_ulogic;
idle : std_ulogic;
irq : std_ulogic;
size : std_logic_vector(2 downto 0);
end record;
type grdmac_ahb_dma_out_type is record
start : std_ulogic;
active : std_ulogic;
ready : std_ulogic;
retry : std_ulogic;
mexc : std_ulogic;
haddr : std_logic_vector(9 downto 0);
rdata : std_logic_vector(AHBDW-1 downto 0);
end record;
constant grdmac_ahb_dma_in_none : grdmac_ahb_dma_in_type := ( zx, zahbdw, '0', '0', '0', '0', '0', '0', '0', "000");
constant grdmac_ahb_dma_none : grdmac_ahb_dma_out_type := ('0', '0', '0', '0', '0', (others => '0'), zahbdw);
component grdmac is
generic (
hmindex : integer := 0; -- AHB master index
hirq : integer := 0;
pindex : integer := 0; -- APB configuration slave index
paddr : integer := 1;
pmask : integer := 16#FF0#;
en_ahbm1 : integer range 0 to 1 := 0;
hmindex1 : integer := 1; -- AHB master 1 index
ndmach : integer range 1 to 16 := 1; -- number of DMA channels --TODO: implement ndmach = 0
bufsize : integer range 4*AHBDW/8 to 64*1024:= 256; -- number of bytes in buffer (must be a multiple of WORD_SIZE and 4)
burstbound : integer range 4 to 1024 := 512;
en_timer : integer := 0;
memtech : integer := 0;
testen : integer := 0;
ft : integer range 0 to 2 := 0;
wbmask : integer := 0;
busw : integer := 64
);
port (
rst : in std_ulogic;
clk : in std_ulogic;
ahbmi : in ahb_mst_in_type;
ahbmo : out ahb_mst_out_type;
ahbmi1 : in ahb_mst_in_type;
ahbmo1 : out ahb_mst_out_type;
apbi : in apb_slv_in_type;
apbo : out apb_slv_out_type;
irq_trig : in std_logic_vector(63 downto 0)
);
end component;
component grdmac_1p is
generic (
hmindex : integer := 0; -- AHB master index
hirq : integer := 0;
pindex : integer := 0; -- APB configuration slave index
paddr : integer := 1;
pmask : integer := 16#FFF#;
ndmach : integer range 1 to 16 := 1; -- number of DMA channels --TODO: implement ndmach = 0
bufsize : integer range 4*AHBDW/8 to 64*1024:= 256; -- number of bytes in buffer (must be a multiple of 4*WORD_SIZE)
burstbound : integer range 4 to 1024 := 512;
memtech : integer := 0;
testen : integer := 0;
ft : integer range 0 to 2 := 0;
wbmask : integer := 0;
busw : integer := 64
);
port (
rst : in std_ulogic;
clk : in std_ulogic;
ahbmi : in ahb_mst_in_type;
ahbmo : out ahb_mst_out_type;
apbi : in apb_slv_in_type;
apbo : out apb_slv_out_type;
irq_trig : in std_logic_vector(63 downto 0)
);
end component;
component grdmac_ahbmst
generic (
hindex : integer := 0;
hirq : integer := 0;
venid : integer := 1;
devid : integer := 0;
version : integer := 0;
chprot : integer := 3;
incaddr : integer := 0);
port (
rst : in std_ulogic;
clk : in std_ulogic;
dmai : in grdmac_ahb_dma_in_type;
dmao : out grdmac_ahb_dma_out_type;
ahbi : in ahb_mst_in_type;
ahbo : out ahb_mst_out_type
);
end component;
component grdmac_alignram is
generic (
memtech : integer := 0;
abits : integer := 6; -- number of BYTES in buffer
dbits : integer := 8;
testen : integer := 0;
ft : integer range 0 to 2 := 0
);
port (
clk : in std_ulogic;
rst : in std_logic;
enable : in std_logic;
write : in std_logic;
address : in std_logic_vector((abits-1) downto 0);
size : in std_logic_vector(2 downto 0); -- AHB HSIZE format
dataout : out std_logic_vector((dbits-1) downto 0);
datain : in std_logic_vector((dbits-1) downto 0);
data_offset : in std_logic_vector((log2(dbits/8))-1 downto 0)); -- offset in bytes
end component;
function sll_byte_lanes(arg: std_logic_vector; count: natural)
return std_logic_vector;
function srl_byte_lanes(arg: std_logic_vector; count: natural)
return std_logic_vector;
function rol_byte_lanes(arg: std_logic_vector; count: natural)
return std_logic_vector;
function ror_byte_lanes(arg: std_logic_vector; count: natural)
return std_logic_vector;
function mask_byte_lanes(arg: std_logic_vector; mask: std_logic_vector)
return std_logic_vector;
end package;
package body grdmac_pkg is
function sll_byte_lanes(arg: std_logic_vector; count: natural)
return std_logic_vector is
type striped_type is array (0 to 7) of std_logic_vector((arg'length/8)-1 downto 0);
variable arr : striped_type;
variable o : std_logic_vector(arg'high downto arg'low);
begin
-- stripe
for j in 0 to 7 loop
for i in 0 to (arg'length/8)-1 loop
arr(j)(i) := arg(arg'low+i*8+j);
end loop;
end loop;
-- shift
for j in 0 to 7 loop
arr(j) := std_logic_vector(shift_left(unsigned(arr(j)), count));
end loop;
-- unstripe
for j in 0 to 7 loop
for i in 0 to (arg'length/8)-1 loop
o(arg'low+i*8+j) := arr(j)(i);
end loop;
end loop;
return o;
end;
function srl_byte_lanes(arg: std_logic_vector; count: natural)
return std_logic_vector is
type striped_type is array (0 to 7) of std_logic_vector((arg'length/8)-1 downto 0);
variable arr : striped_type;
variable o : std_logic_vector(arg'high downto arg'low);
begin
-- stripe
for j in 0 to 7 loop
for i in 0 to (arg'length/8)-1 loop
arr(j)(i) := arg(arg'low+i*8+j);
end loop;
end loop;
-- shift
for j in 0 to 7 loop
arr(j) := std_logic_vector(shift_right(unsigned(arr(j)), count));
end loop;
-- unstripe
for j in 0 to 7 loop
for i in 0 to (arg'length/8)-1 loop
o(arg'low+i*8+j) := arr(j)(i);
end loop;
end loop;
return o;
end;
function rol_byte_lanes(arg: std_logic_vector; count: natural)
return std_logic_vector is
type striped_type is array (0 to 7) of std_logic_vector((arg'length/8)-1 downto 0);
variable arr : striped_type;
variable o : std_logic_vector(arg'high downto arg'low);
begin
-- stripe
for j in 0 to 7 loop
for i in 0 to (arg'length/8)-1 loop
arr(j)(i) := arg(arg'low+i*8+j);
end loop;
end loop;
-- rotate
for j in 0 to 7 loop
arr(j) := std_logic_vector(rotate_left(unsigned(arr(j)), count));
end loop;
-- unstripe
for j in 0 to 7 loop
for i in 0 to (arg'length/8)-1 loop
o(arg'low+i*8+j) := arr(j)(i);
end loop;
end loop;
return o;
end;
function ror_byte_lanes(arg: std_logic_vector; count: natural)
return std_logic_vector is
type striped_type is array (0 to 7) of std_logic_vector((arg'length/8)-1 downto 0);
variable arr : striped_type;
variable o : std_logic_vector(arg'high downto arg'low);
begin
-- stripe
for j in 0 to 7 loop
for i in 0 to (arg'length/8)-1 loop
arr(j)(i) := arg(arg'low+i*8+j);
end loop;
end loop;
-- rotate
for j in 0 to 7 loop
arr(j) := std_logic_vector(rotate_right(unsigned(arr(j)), count));
end loop;
-- unstripe
for j in 0 to 7 loop
for i in 0 to (arg'length/8)-1 loop
o(arg'low+i*8+j) := arr(j)(i);
end loop;
end loop;
return o;
end;
function mask_byte_lanes(arg: std_logic_vector; mask: std_logic_vector)
return std_logic_vector is
--variable m : std_logic_vector((arg'length/8)-1 downto 0);
variable lanemask : std_logic_vector(7 downto 0);
variable o : std_logic_vector(arg'high downto arg'low);
begin
for i in 0 to (arg'length/8)-1 loop
lanemask := (others => mask(mask'low+i));
--print(tost_bits(lanemask));
o(arg'low+i*8+7 downto arg'low+i*8) := (arg(arg'low+i*8+7 downto arg'low+i*8) and lanemask);
end loop;
return o;
end;
end package body;
|
gpl-3.0
|
ARC-Lab-UF/UAA
|
src/ram.vhd
|
1
|
4993
|
-- Copyright (c) 2015 University of Florida
--
-- This file is part of uaa.
--
-- uaa is free software: you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation, either version 3 of the License, or
-- (at your option) any later version.
--
-- uaa is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with uaa. If not, see <http://www.gnu.org/licenses/>.
-- Greg Stitt
-- University of Florida
-- Description:
-- The ram entity implements a ram with a standard 1-read port, 1-write port
-- interface. The ram is configurable in terms of data width (width of each
-- word), the address width, and the number of words. The ram has a write
-- enable for writes, but does not contain a read enable. Instead, the ram
-- reads from the read address every cycle.
--
-- The entity contains several different architectures that implement different
-- ram behaviors. e.g. synchronous reads, asynchronous reads, synchronoous
-- reads during writes.
--
-- Notes:
-- Asychronous reads are not supported by all FPGAs.
--
-------------------------------------------------------------------------------
-- Generics Description
-- word_width : The width in bits of a single word (required)
-- addr_width : The width in bits of an address, which also defines the
-- number of words (required)
-- num_words : The number of words in the memory. This generic will
-- usually be 2**addr_width, but the entity supports
-- non-powers of 2 (required)
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Port Description:
-- clk : clock input
-- wen : write enable (active high)
-- waddr : write address
-- wdata : write data
-- raddr : read address
-- rdata : read data
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity ram is
generic (
num_words : positive;
word_width : positive;
addr_width : positive
);
port (
clk : in std_logic;
-- write port
wen : in std_logic;
waddr : in std_logic_vector(addr_width-1 downto 0);
wdata : in std_logic_vector(word_width-1 downto 0);
-- read port
raddr : in std_logic_vector(addr_width-1 downto 0);
rdata : out std_logic_vector(word_width-1 downto 0)
);
end entity;
-- This architecture uses asynchronous reads that return the read data in the
-- same cycle.
architecture ASYNC_READ of ram is
type memory_type is array (natural range <>) of std_logic_vector(word_width-1 downto 0);
signal memory : memory_type(num_words-1 downto 0) := (others => (others => '0'));
begin
process(clk)
begin
if clk'event and clk = '1' then
if wen = '1' then
memory(to_integer(unsigned(waddr))) <= wdata;
end if;
end if;
end process;
rdata <= memory(to_integer(unsigned(raddr)));
end ASYNC_READ;
-- This architecture uses synchronous reads with a one-cycle delay. In the case
-- of reading and writing to the same address, the read returns the new data
-- that was written.
architecture SYNC_READ_DURING_WRITE of ram is
type memory_type is array (natural range <>) of std_logic_vector(word_width-1 downto 0);
signal memory : memory_type(num_words-1 downto 0) := (others => (others => '0'));
signal raddr_reg : std_logic_vector(addr_width-1 downto 0);
begin
process(clk)
begin
if clk'event and clk = '1' then
if wen = '1' then
memory(to_integer(unsigned(waddr))) <= wdata;
end if;
raddr_reg <= raddr;
end if;
end process;
rdata <= memory(to_integer(unsigned(raddr_reg)));
end SYNC_READ_DURING_WRITE;
-- This architecture uses synchronous reads with a one-cycle delay. In the case
-- of reading and writing to the same address, the read returns the data at
-- the address before the write.
architecture SYNC_READ of ram is
type memory_type is array (natural range <>) of std_logic_vector(word_width-1 downto 0);
signal memory : memory_type(num_words-1 downto 0) := (others => (others => '0'));
begin
process(clk)
begin
if clk'event and clk = '1' then
if wen = '1' then
memory(to_integer(unsigned(waddr))) <= wdata;
end if;
rdata <= memory(to_integer(unsigned(raddr)));
end if;
end process;
end SYNC_READ;
|
gpl-3.0
|
hoglet67/CoPro6502
|
src/ROM/tuberom_z80_banner.vhd
|
1
|
172760
|
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity tuberom_z80_banner is
port (
CLK : in std_logic;
ADDR : in std_logic_vector(11 downto 0);
DATA : out std_logic_vector(7 downto 0)
);
end;
architecture RTL of tuberom_z80_banner is
signal rom_addr : std_logic_vector(11 downto 0);
begin
p_addr : process(ADDR)
begin
rom_addr <= (others => '0');
rom_addr(11 downto 0) <= ADDR;
end process;
p_rom : process
begin
wait until rising_edge(CLK);
DATA <= (others => '0');
case rom_addr is
when x"000" => DATA <= x"F3";
when x"001" => DATA <= x"11";
when x"002" => DATA <= x"00";
when x"003" => DATA <= x"F0";
when x"004" => DATA <= x"21";
when x"005" => DATA <= x"00";
when x"006" => DATA <= x"00";
when x"007" => DATA <= x"01";
when x"008" => DATA <= x"00";
when x"009" => DATA <= x"10";
when x"00A" => DATA <= x"ED";
when x"00B" => DATA <= x"B0";
when x"00C" => DATA <= x"C3";
when x"00D" => DATA <= x"80";
when x"00E" => DATA <= x"F2";
when x"00F" => DATA <= x"43";
when x"010" => DATA <= x"6F";
when x"011" => DATA <= x"70";
when x"012" => DATA <= x"79";
when x"013" => DATA <= x"72";
when x"014" => DATA <= x"69";
when x"015" => DATA <= x"67";
when x"016" => DATA <= x"68";
when x"017" => DATA <= x"74";
when x"018" => DATA <= x"20";
when x"019" => DATA <= x"41";
when x"01A" => DATA <= x"63";
when x"01B" => DATA <= x"6F";
when x"01C" => DATA <= x"72";
when x"01D" => DATA <= x"6E";
when x"01E" => DATA <= x"20";
when x"01F" => DATA <= x"43";
when x"020" => DATA <= x"6F";
when x"021" => DATA <= x"6D";
when x"022" => DATA <= x"70";
when x"023" => DATA <= x"75";
when x"024" => DATA <= x"74";
when x"025" => DATA <= x"65";
when x"026" => DATA <= x"72";
when x"027" => DATA <= x"73";
when x"028" => DATA <= x"20";
when x"029" => DATA <= x"4C";
when x"02A" => DATA <= x"74";
when x"02B" => DATA <= x"64";
when x"02C" => DATA <= x"2E";
when x"02D" => DATA <= x"20";
when x"02E" => DATA <= x"31";
when x"02F" => DATA <= x"39";
when x"030" => DATA <= x"38";
when x"031" => DATA <= x"34";
when x"032" => DATA <= x"0D";
when x"033" => DATA <= x"48";
when x"034" => DATA <= x"3A";
when x"035" => DATA <= x"7D";
when x"036" => DATA <= x"3C";
when x"037" => DATA <= x"B7";
when x"038" => DATA <= x"C4";
when x"039" => DATA <= x"C0";
when x"03A" => DATA <= x"2C";
when x"03B" => DATA <= x"3A";
when x"03C" => DATA <= x"22";
when x"03D" => DATA <= x"3A";
when x"03E" => DATA <= x"B7";
when x"03F" => DATA <= x"C4";
when x"040" => DATA <= x"F1";
when x"041" => DATA <= x"2C";
when x"042" => DATA <= x"F1";
when x"043" => DATA <= x"21";
when x"044" => DATA <= x"1B";
when x"045" => DATA <= x"3A";
when x"046" => DATA <= x"34";
when x"047" => DATA <= x"7E";
when x"048" => DATA <= x"3D";
when x"049" => DATA <= x"C2";
when x"04A" => DATA <= x"AB";
when x"04B" => DATA <= x"2B";
when x"04C" => DATA <= x"21";
when x"04D" => DATA <= x"EC";
when x"04E" => DATA <= x"3B";
when x"04F" => DATA <= x"7E";
when x"050" => DATA <= x"B7";
when x"051" => DATA <= x"C2";
when x"052" => DATA <= x"34";
when x"053" => DATA <= x"2B";
when x"054" => DATA <= x"21";
when x"055" => DATA <= x"4A";
when x"056" => DATA <= x"3B";
when x"057" => DATA <= x"7E";
when x"058" => DATA <= x"B7";
when x"059" => DATA <= x"C2";
when x"05A" => DATA <= x"34";
when x"05B" => DATA <= x"2B";
when x"05C" => DATA <= x"21";
when x"05D" => DATA <= x"58";
when x"05E" => DATA <= x"3D";
when x"05F" => DATA <= x"23";
when x"060" => DATA <= x"01";
when x"061" => DATA <= x"06";
when x"062" => DATA <= x"00";
when x"063" => DATA <= x"11";
when x"064" => DATA <= x"EC";
when x"065" => DATA <= x"3B";
when x"066" => DATA <= x"C3";
when x"067" => DATA <= x"61";
when x"068" => DATA <= x"FC";
when x"069" => DATA <= x"54";
when x"06A" => DATA <= x"68";
when x"06B" => DATA <= x"65";
when x"06C" => DATA <= x"20";
when x"06D" => DATA <= x"42";
when x"06E" => DATA <= x"75";
when x"06F" => DATA <= x"73";
when x"070" => DATA <= x"69";
when x"071" => DATA <= x"6E";
when x"072" => DATA <= x"65";
when x"073" => DATA <= x"73";
when x"074" => DATA <= x"73";
when x"075" => DATA <= x"20";
when x"076" => DATA <= x"53";
when x"077" => DATA <= x"79";
when x"078" => DATA <= x"73";
when x"079" => DATA <= x"74";
when x"07A" => DATA <= x"65";
when x"07B" => DATA <= x"6D";
when x"07C" => DATA <= x"73";
when x"07D" => DATA <= x"20";
when x"07E" => DATA <= x"47";
when x"07F" => DATA <= x"72";
when x"080" => DATA <= x"6F";
when x"081" => DATA <= x"75";
when x"082" => DATA <= x"70";
when x"083" => DATA <= x"20";
when x"084" => DATA <= x"77";
when x"085" => DATA <= x"6F";
when x"086" => DATA <= x"75";
when x"087" => DATA <= x"6C";
when x"088" => DATA <= x"64";
when x"089" => DATA <= x"20";
when x"08A" => DATA <= x"6C";
when x"08B" => DATA <= x"69";
when x"08C" => DATA <= x"6B";
when x"08D" => DATA <= x"65";
when x"08E" => DATA <= x"20";
when x"08F" => DATA <= x"74";
when x"090" => DATA <= x"6F";
when x"091" => DATA <= x"20";
when x"092" => DATA <= x"74";
when x"093" => DATA <= x"68";
when x"094" => DATA <= x"61";
when x"095" => DATA <= x"6E";
when x"096" => DATA <= x"6B";
when x"097" => DATA <= x"4D";
when x"098" => DATA <= x"69";
when x"099" => DATA <= x"6B";
when x"09A" => DATA <= x"65";
when x"09B" => DATA <= x"20";
when x"09C" => DATA <= x"42";
when x"09D" => DATA <= x"6F";
when x"09E" => DATA <= x"6C";
when x"09F" => DATA <= x"6C";
when x"0A0" => DATA <= x"65";
when x"0A1" => DATA <= x"79";
when x"0A2" => DATA <= x"2C";
when x"0A3" => DATA <= x"4D";
when x"0A4" => DATA <= x"69";
when x"0A5" => DATA <= x"6B";
when x"0A6" => DATA <= x"65";
when x"0A7" => DATA <= x"20";
when x"0A8" => DATA <= x"26";
when x"0A9" => DATA <= x"20";
when x"0AA" => DATA <= x"41";
when x"0AB" => DATA <= x"6C";
when x"0AC" => DATA <= x"6C";
when x"0AD" => DATA <= x"65";
when x"0AE" => DATA <= x"6E";
when x"0AF" => DATA <= x"20";
when x"0B0" => DATA <= x"42";
when x"0B1" => DATA <= x"6F";
when x"0B2" => DATA <= x"6F";
when x"0B3" => DATA <= x"74";
when x"0B4" => DATA <= x"68";
when x"0B5" => DATA <= x"72";
when x"0B6" => DATA <= x"6F";
when x"0B7" => DATA <= x"79";
when x"0B8" => DATA <= x"64";
when x"0B9" => DATA <= x"2C";
when x"0BA" => DATA <= x"52";
when x"0BB" => DATA <= x"69";
when x"0BC" => DATA <= x"63";
when x"0BD" => DATA <= x"68";
when x"0BE" => DATA <= x"61";
when x"0BF" => DATA <= x"72";
when x"0C0" => DATA <= x"64";
when x"0C1" => DATA <= x"20";
when x"0C2" => DATA <= x"43";
when x"0C3" => DATA <= x"6C";
when x"0C4" => DATA <= x"61";
when x"0C5" => DATA <= x"79";
when x"0C6" => DATA <= x"74";
when x"0C7" => DATA <= x"6F";
when x"0C8" => DATA <= x"6E";
when x"0C9" => DATA <= x"2C";
when x"0CA" => DATA <= x"41";
when x"0CB" => DATA <= x"6E";
when x"0CC" => DATA <= x"64";
when x"0CD" => DATA <= x"72";
when x"0CE" => DATA <= x"65";
when x"0CF" => DATA <= x"77";
when x"0D0" => DATA <= x"20";
when x"0D1" => DATA <= x"47";
when x"0D2" => DATA <= x"6F";
when x"0D3" => DATA <= x"72";
when x"0D4" => DATA <= x"64";
when x"0D5" => DATA <= x"6F";
when x"0D6" => DATA <= x"6E";
when x"0D7" => DATA <= x"2C";
when x"0D8" => DATA <= x"43";
when x"0D9" => DATA <= x"68";
when x"0DA" => DATA <= x"72";
when x"0DB" => DATA <= x"69";
when x"0DC" => DATA <= x"73";
when x"0DD" => DATA <= x"20";
when x"0DE" => DATA <= x"48";
when x"0DF" => DATA <= x"61";
when x"0E0" => DATA <= x"6C";
when x"0E1" => DATA <= x"6C";
when x"0E2" => DATA <= x"2C";
when x"0E3" => DATA <= x"4B";
when x"0E4" => DATA <= x"69";
when x"0E5" => DATA <= x"6D";
when x"0E6" => DATA <= x"20";
when x"0E7" => DATA <= x"53";
when x"0E8" => DATA <= x"70";
when x"0E9" => DATA <= x"65";
when x"0EA" => DATA <= x"6E";
when x"0EB" => DATA <= x"63";
when x"0EC" => DATA <= x"65";
when x"0ED" => DATA <= x"2D";
when x"0EE" => DATA <= x"4A";
when x"0EF" => DATA <= x"6F";
when x"0F0" => DATA <= x"6E";
when x"0F1" => DATA <= x"65";
when x"0F2" => DATA <= x"73";
when x"0F3" => DATA <= x"2C";
when x"0F4" => DATA <= x"50";
when x"0F5" => DATA <= x"61";
when x"0F6" => DATA <= x"75";
when x"0F7" => DATA <= x"6C";
when x"0F8" => DATA <= x"20";
when x"0F9" => DATA <= x"4F";
when x"0FA" => DATA <= x"76";
when x"0FB" => DATA <= x"65";
when x"0FC" => DATA <= x"72";
when x"0FD" => DATA <= x"65";
when x"0FE" => DATA <= x"6C";
when x"0FF" => DATA <= x"6C";
when x"100" => DATA <= x"2C";
when x"101" => DATA <= x"44";
when x"102" => DATA <= x"61";
when x"103" => DATA <= x"76";
when x"104" => DATA <= x"69";
when x"105" => DATA <= x"64";
when x"106" => DATA <= x"20";
when x"107" => DATA <= x"50";
when x"108" => DATA <= x"61";
when x"109" => DATA <= x"72";
when x"10A" => DATA <= x"6B";
when x"10B" => DATA <= x"69";
when x"10C" => DATA <= x"6E";
when x"10D" => DATA <= x"73";
when x"10E" => DATA <= x"6F";
when x"10F" => DATA <= x"6E";
when x"110" => DATA <= x"2C";
when x"111" => DATA <= x"4A";
when x"112" => DATA <= x"6F";
when x"113" => DATA <= x"68";
when x"114" => DATA <= x"6E";
when x"115" => DATA <= x"20";
when x"116" => DATA <= x"54";
when x"117" => DATA <= x"75";
when x"118" => DATA <= x"74";
when x"119" => DATA <= x"65";
when x"11A" => DATA <= x"6E";
when x"11B" => DATA <= x"20";
when x"11C" => DATA <= x"61";
when x"11D" => DATA <= x"6E";
when x"11E" => DATA <= x"64";
when x"11F" => DATA <= x"20";
when x"120" => DATA <= x"45";
when x"121" => DATA <= x"72";
when x"122" => DATA <= x"69";
when x"123" => DATA <= x"63";
when x"124" => DATA <= x"20";
when x"125" => DATA <= x"74";
when x"126" => DATA <= x"68";
when x"127" => DATA <= x"65";
when x"128" => DATA <= x"20";
when x"129" => DATA <= x"68";
when x"12A" => DATA <= x"61";
when x"12B" => DATA <= x"6C";
when x"12C" => DATA <= x"66";
when x"12D" => DATA <= x"20";
when x"12E" => DATA <= x"54";
when x"12F" => DATA <= x"55";
when x"130" => DATA <= x"42";
when x"131" => DATA <= x"45";
when x"132" => DATA <= x"54";
when x"133" => DATA <= x"68";
when x"134" => DATA <= x"65";
when x"135" => DATA <= x"20";
when x"136" => DATA <= x"42";
when x"137" => DATA <= x"53";
when x"138" => DATA <= x"47";
when x"139" => DATA <= x"20";
when x"13A" => DATA <= x"69";
when x"13B" => DATA <= x"73";
when x"13C" => DATA <= x"20";
when x"13D" => DATA <= x"42";
when x"13E" => DATA <= x"69";
when x"13F" => DATA <= x"67";
when x"140" => DATA <= x"20";
when x"141" => DATA <= x"41";
when x"142" => DATA <= x"72";
when x"143" => DATA <= x"74";
when x"144" => DATA <= x"68";
when x"145" => DATA <= x"75";
when x"146" => DATA <= x"72";
when x"147" => DATA <= x"20";
when x"148" => DATA <= x"54";
when x"149" => DATA <= x"68";
when x"14A" => DATA <= x"65";
when x"14B" => DATA <= x"20";
when x"14C" => DATA <= x"54";
when x"14D" => DATA <= x"6F";
when x"14E" => DATA <= x"75";
when x"14F" => DATA <= x"63";
when x"150" => DATA <= x"61";
when x"151" => DATA <= x"6E";
when x"152" => DATA <= x"2C";
when x"153" => DATA <= x"4A";
when x"154" => DATA <= x"20";
when x"155" => DATA <= x"4D";
when x"156" => DATA <= x"61";
when x"157" => DATA <= x"72";
when x"158" => DATA <= x"6B";
when x"159" => DATA <= x"20";
when x"15A" => DATA <= x"43";
when x"15B" => DATA <= x"61";
when x"15C" => DATA <= x"72";
when x"15D" => DATA <= x"72";
when x"15E" => DATA <= x"69";
when x"15F" => DATA <= x"6E";
when x"160" => DATA <= x"67";
when x"161" => DATA <= x"74";
when x"162" => DATA <= x"6F";
when x"163" => DATA <= x"6E";
when x"164" => DATA <= x"2C";
when x"165" => DATA <= x"48";
when x"166" => DATA <= x"6F";
when x"167" => DATA <= x"77";
when x"168" => DATA <= x"61";
when x"169" => DATA <= x"72";
when x"16A" => DATA <= x"64";
when x"16B" => DATA <= x"20";
when x"16C" => DATA <= x"46";
when x"16D" => DATA <= x"69";
when x"16E" => DATA <= x"73";
when x"16F" => DATA <= x"68";
when x"170" => DATA <= x"65";
when x"171" => DATA <= x"72";
when x"172" => DATA <= x"2C";
when x"173" => DATA <= x"49";
when x"174" => DATA <= x"61";
when x"175" => DATA <= x"6E";
when x"176" => DATA <= x"20";
when x"177" => DATA <= x"47";
when x"178" => DATA <= x"20";
when x"179" => DATA <= x"4A";
when x"17A" => DATA <= x"61";
when x"17B" => DATA <= x"63";
when x"17C" => DATA <= x"6B";
when x"17D" => DATA <= x"2C";
when x"17E" => DATA <= x"4E";
when x"17F" => DATA <= x"65";
when x"180" => DATA <= x"69";
when x"181" => DATA <= x"6C";
when x"182" => DATA <= x"20";
when x"183" => DATA <= x"52";
when x"184" => DATA <= x"6F";
when x"185" => DATA <= x"62";
when x"186" => DATA <= x"69";
when x"187" => DATA <= x"6E";
when x"188" => DATA <= x"73";
when x"189" => DATA <= x"6F";
when x"18A" => DATA <= x"6E";
when x"18B" => DATA <= x"2C";
when x"18C" => DATA <= x"53";
when x"18D" => DATA <= x"69";
when x"18E" => DATA <= x"6D";
when x"18F" => DATA <= x"6F";
when x"190" => DATA <= x"6E";
when x"191" => DATA <= x"20";
when x"192" => DATA <= x"57";
when x"193" => DATA <= x"6F";
when x"194" => DATA <= x"6F";
when x"195" => DATA <= x"64";
when x"196" => DATA <= x"77";
when x"197" => DATA <= x"61";
when x"198" => DATA <= x"72";
when x"199" => DATA <= x"64";
when x"19A" => DATA <= x"2C";
when x"19B" => DATA <= x"4A";
when x"19C" => DATA <= x"6F";
when x"19D" => DATA <= x"68";
when x"19E" => DATA <= x"6E";
when x"19F" => DATA <= x"20";
when x"1A0" => DATA <= x"43";
when x"1A1" => DATA <= x"6F";
when x"1A2" => DATA <= x"72";
when x"1A3" => DATA <= x"72";
when x"1A4" => DATA <= x"61";
when x"1A5" => DATA <= x"6C";
when x"1A6" => DATA <= x"6C";
when x"1A7" => DATA <= x"2C";
when x"1A8" => DATA <= x"54";
when x"1A9" => DATA <= x"6F";
when x"1AA" => DATA <= x"62";
when x"1AB" => DATA <= x"79";
when x"1AC" => DATA <= x"20";
when x"1AD" => DATA <= x"43";
when x"1AE" => DATA <= x"72";
when x"1AF" => DATA <= x"6F";
when x"1B0" => DATA <= x"73";
when x"1B1" => DATA <= x"73";
when x"1B2" => DATA <= x"2C";
when x"1B3" => DATA <= x"49";
when x"1B4" => DATA <= x"61";
when x"1B5" => DATA <= x"6E";
when x"1B6" => DATA <= x"20";
when x"1B7" => DATA <= x"4D";
when x"1B8" => DATA <= x"69";
when x"1B9" => DATA <= x"6C";
when x"1BA" => DATA <= x"6C";
when x"1BB" => DATA <= x"65";
when x"1BC" => DATA <= x"72";
when x"1BD" => DATA <= x"2C";
when x"1BE" => DATA <= x"42";
when x"1BF" => DATA <= x"6F";
when x"1C0" => DATA <= x"72";
when x"1C1" => DATA <= x"69";
when x"1C2" => DATA <= x"73";
when x"1C3" => DATA <= x"20";
when x"1C4" => DATA <= x"53";
when x"1C5" => DATA <= x"6F";
when x"1C6" => DATA <= x"75";
when x"1C7" => DATA <= x"74";
when x"1C8" => DATA <= x"68";
when x"1C9" => DATA <= x"65";
when x"1CA" => DATA <= x"61";
when x"1CB" => DATA <= x"72";
when x"1CC" => DATA <= x"73";
when x"1CD" => DATA <= x"72";
when x"1CE" => DATA <= x"6F";
when x"1CF" => DATA <= x"72";
when x"1D0" => DATA <= x"28";
when x"1D1" => DATA <= x"73";
when x"1D2" => DATA <= x"29";
when x"1D3" => DATA <= x"00";
when x"1D4" => DATA <= x"20";
when x"1D5" => DATA <= x"57";
when x"1D6" => DATA <= x"61";
when x"1D7" => DATA <= x"72";
when x"1D8" => DATA <= x"6E";
when x"1D9" => DATA <= x"69";
when x"1DA" => DATA <= x"6E";
when x"1DB" => DATA <= x"67";
when x"1DC" => DATA <= x"28";
when x"1DD" => DATA <= x"73";
when x"1DE" => DATA <= x"29";
when x"1DF" => DATA <= x"00";
when x"1E0" => DATA <= x"0E";
when x"1E1" => DATA <= x"00";
when x"1E2" => DATA <= x"3A";
when x"1E3" => DATA <= x"00";
when x"1E4" => DATA <= x"3B";
when x"1E5" => DATA <= x"47";
when x"1E6" => DATA <= x"CD";
when x"1E7" => DATA <= x"48";
when x"1E8" => DATA <= x"1A";
when x"1E9" => DATA <= x"C3";
when x"1EA" => DATA <= x"6B";
when x"1EB" => DATA <= x"2B";
when x"1EC" => DATA <= x"CD";
when x"1ED" => DATA <= x"16";
when x"1EE" => DATA <= x"2D";
when x"1EF" => DATA <= x"21";
when x"1F0" => DATA <= x"CF";
when x"1F1" => DATA <= x"2C";
when x"1F2" => DATA <= x"CD";
when x"1F3" => DATA <= x"19";
when x"1F4" => DATA <= x"2D";
when x"1F5" => DATA <= x"CD";
when x"1F6" => DATA <= x"CA";
when x"1F7" => DATA <= x"19";
when x"1F8" => DATA <= x"C3";
when x"1F9" => DATA <= x"FD";
when x"1FA" => DATA <= x"2C";
when x"1FB" => DATA <= x"52";
when x"1FC" => DATA <= x"45";
when x"1FD" => DATA <= x"50";
when x"1FE" => DATA <= x"54";
when x"1FF" => DATA <= x"2F";
when x"200" => DATA <= x"49";
when x"201" => DATA <= x"52";
when x"202" => DATA <= x"50";
when x"203" => DATA <= x"2F";
when x"204" => DATA <= x"49";
when x"205" => DATA <= x"52";
when x"206" => DATA <= x"50";
when x"207" => DATA <= x"43";
when x"208" => DATA <= x"2F";
when x"209" => DATA <= x"4D";
when x"20A" => DATA <= x"41";
when x"20B" => DATA <= x"43";
when x"20C" => DATA <= x"52";
when x"20D" => DATA <= x"4F";
when x"20E" => DATA <= x"00";
when x"20F" => DATA <= x"55";
when x"210" => DATA <= x"6E";
when x"211" => DATA <= x"74";
when x"212" => DATA <= x"65";
when x"213" => DATA <= x"72";
when x"214" => DATA <= x"6D";
when x"215" => DATA <= x"69";
when x"216" => DATA <= x"6E";
when x"217" => DATA <= x"61";
when x"218" => DATA <= x"74";
when x"219" => DATA <= x"65";
when x"21A" => DATA <= x"64";
when x"21B" => DATA <= x"20";
when x"21C" => DATA <= x"00";
when x"21D" => DATA <= x"CD";
when x"21E" => DATA <= x"16";
when x"21F" => DATA <= x"2D";
when x"220" => DATA <= x"21";
when x"221" => DATA <= x"26";
when x"222" => DATA <= x"2D";
when x"223" => DATA <= x"CD";
when x"224" => DATA <= x"19";
when x"225" => DATA <= x"2D";
when x"226" => DATA <= x"CD";
when x"227" => DATA <= x"CA";
when x"228" => DATA <= x"19";
when x"229" => DATA <= x"3E";
when x"22A" => DATA <= x"0D";
when x"22B" => DATA <= x"CD";
when x"22C" => DATA <= x"FC";
when x"22D" => DATA <= x"18";
when x"22E" => DATA <= x"3E";
when x"22F" => DATA <= x"0A";
when x"230" => DATA <= x"CD";
when x"231" => DATA <= x"FC";
when x"232" => DATA <= x"18";
when x"233" => DATA <= x"3A";
when x"234" => DATA <= x"37";
when x"235" => DATA <= x"3D";
when x"236" => DATA <= x"3C";
when x"237" => DATA <= x"C8";
when x"238" => DATA <= x"3E";
when x"239" => DATA <= x"0D";
when x"23A" => DATA <= x"CD";
when x"23B" => DATA <= x"4E";
when x"23C" => DATA <= x"47";
when x"23D" => DATA <= x"3E";
when x"23E" => DATA <= x"0A";
when x"23F" => DATA <= x"C3";
when x"240" => DATA <= x"4E";
when x"241" => DATA <= x"47";
when x"242" => DATA <= x"21";
when x"243" => DATA <= x"E3";
when x"244" => DATA <= x"2C";
when x"245" => DATA <= x"E5";
when x"246" => DATA <= x"CD";
when x"247" => DATA <= x"77";
when x"248" => DATA <= x"19";
when x"249" => DATA <= x"E1";
when x"24A" => DATA <= x"3A";
when x"24B" => DATA <= x"37";
when x"24C" => DATA <= x"3D";
when x"24D" => DATA <= x"3C";
when x"24E" => DATA <= x"C8";
when x"24F" => DATA <= x"C3";
when x"250" => DATA <= x"4F";
when x"251" => DATA <= x"43";
when x"252" => DATA <= x"43";
when x"253" => DATA <= x"6F";
when x"254" => DATA <= x"6E";
when x"255" => DATA <= x"64";
when x"256" => DATA <= x"69";
when x"257" => DATA <= x"74";
when x"258" => DATA <= x"69";
when x"259" => DATA <= x"6F";
when x"25A" => DATA <= x"6E";
when x"25B" => DATA <= x"61";
when x"25C" => DATA <= x"6C";
when x"25D" => DATA <= x"00";
when x"25E" => DATA <= x"53";
when x"25F" => DATA <= x"79";
when x"260" => DATA <= x"6D";
when x"261" => DATA <= x"62";
when x"262" => DATA <= x"6F";
when x"263" => DATA <= x"6C";
when x"264" => DATA <= x"73";
when x"265" => DATA <= x"3A";
when x"266" => DATA <= x"0D";
when x"267" => DATA <= x"0A";
when x"268" => DATA <= x"00";
when x"269" => DATA <= x"4D";
when x"26A" => DATA <= x"61";
when x"26B" => DATA <= x"63";
when x"26C" => DATA <= x"72";
when x"26D" => DATA <= x"6F";
when x"26E" => DATA <= x"73";
when x"26F" => DATA <= x"3A";
when x"270" => DATA <= x"0D";
when x"271" => DATA <= x"0A";
when x"272" => DATA <= x"00";
when x"273" => DATA <= x"21";
when x"274" => DATA <= x"E2";
when x"275" => DATA <= x"FF";
when x"276" => DATA <= x"39";
when x"277" => DATA <= x"EB";
when x"278" => DATA <= x"2A";
when x"279" => DATA <= x"AC";
when x"27A" => DATA <= x"3C";
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when x"27C" => DATA <= x"82";
when x"27D" => DATA <= x"0D";
when x"27E" => DATA <= x"D2";
when x"27F" => DATA <= x"5D";
when x"280" => DATA <= x"31";
when x"281" => DATA <= x"80";
when x"282" => DATA <= x"FF";
when x"283" => DATA <= x"CD";
when x"284" => DATA <= x"5E";
when x"285" => DATA <= x"F6";
when x"286" => DATA <= x"3E";
when x"287" => DATA <= x"FF";
when x"288" => DATA <= x"ED";
when x"289" => DATA <= x"47";
when x"28A" => DATA <= x"ED";
when x"28B" => DATA <= x"5E";
when x"28C" => DATA <= x"FB";
when x"28D" => DATA <= x"CD";
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when x"28F" => DATA <= x"F6";
when x"290" => DATA <= x"16";
when x"291" => DATA <= x"08";
when x"292" => DATA <= x"0D";
when x"293" => DATA <= x"41";
when x"294" => DATA <= x"63";
when x"295" => DATA <= x"6F";
when x"296" => DATA <= x"72";
when x"297" => DATA <= x"6E";
when x"298" => DATA <= x"20";
when x"299" => DATA <= x"54";
when x"29A" => DATA <= x"55";
when x"29B" => DATA <= x"42";
when x"29C" => DATA <= x"45";
when x"29D" => DATA <= x"20";
when x"29E" => DATA <= x"5A";
when x"29F" => DATA <= x"38";
when x"2A0" => DATA <= x"30";
when x"2A1" => DATA <= x"20";
when x"2A2" => DATA <= x"3F";
when x"2A3" => DATA <= x"3F";
when x"2A4" => DATA <= x"3F";
when x"2A5" => DATA <= x"20";
when x"2A6" => DATA <= x"4D";
when x"2A7" => DATA <= x"48";
when x"2A8" => DATA <= x"7A";
when x"2A9" => DATA <= x"20";
when x"2AA" => DATA <= x"0D";
when x"2AB" => DATA <= x"0D";
when x"2AC" => DATA <= x"00";
when x"2AD" => DATA <= x"CD";
when x"2AE" => DATA <= x"9A";
when x"2AF" => DATA <= x"F6";
when x"2B0" => DATA <= x"CD";
when x"2B1" => DATA <= x"AE";
when x"2B2" => DATA <= x"F5";
when x"2B3" => DATA <= x"3E";
when x"2B4" => DATA <= x"FD";
when x"2B5" => DATA <= x"21";
when x"2B6" => DATA <= x"00";
when x"2B7" => DATA <= x"FF";
when x"2B8" => DATA <= x"CD";
when x"2B9" => DATA <= x"8E";
when x"2BA" => DATA <= x"F8";
when x"2BB" => DATA <= x"7D";
when x"2BC" => DATA <= x"B7";
when x"2BD" => DATA <= x"CA";
when x"2BE" => DATA <= x"CE";
when x"2BF" => DATA <= x"F2";
when x"2C0" => DATA <= x"3E";
when x"2C1" => DATA <= x"0F";
when x"2C2" => DATA <= x"21";
when x"2C3" => DATA <= x"01";
when x"2C4" => DATA <= x"00";
when x"2C5" => DATA <= x"CD";
when x"2C6" => DATA <= x"8E";
when x"2C7" => DATA <= x"F8";
when x"2C8" => DATA <= x"C3";
when x"2C9" => DATA <= x"EB";
when x"2CA" => DATA <= x"F7";
when x"2CB" => DATA <= x"CD";
when x"2CC" => DATA <= x"E7";
when x"2CD" => DATA <= x"FF";
when x"2CE" => DATA <= x"31";
when x"2CF" => DATA <= x"80";
when x"2D0" => DATA <= x"FF";
when x"2D1" => DATA <= x"3A";
when x"2D2" => DATA <= x"80";
when x"2D3" => DATA <= x"FF";
when x"2D4" => DATA <= x"CB";
when x"2D5" => DATA <= x"7F";
when x"2D6" => DATA <= x"28";
when x"2D7" => DATA <= x"08";
when x"2D8" => DATA <= x"3E";
when x"2D9" => DATA <= x"7E";
when x"2DA" => DATA <= x"21";
when x"2DB" => DATA <= x"00";
when x"2DC" => DATA <= x"00";
when x"2DD" => DATA <= x"CD";
when x"2DE" => DATA <= x"8E";
when x"2DF" => DATA <= x"F8";
when x"2E0" => DATA <= x"3E";
when x"2E1" => DATA <= x"2A";
when x"2E2" => DATA <= x"CD";
when x"2E3" => DATA <= x"71";
when x"2E4" => DATA <= x"F6";
when x"2E5" => DATA <= x"21";
when x"2E6" => DATA <= x"9D";
when x"2E7" => DATA <= x"FC";
when x"2E8" => DATA <= x"AF";
when x"2E9" => DATA <= x"CD";
when x"2EA" => DATA <= x"EF";
when x"2EB" => DATA <= x"F8";
when x"2EC" => DATA <= x"DA";
when x"2ED" => DATA <= x"FA";
when x"2EE" => DATA <= x"F2";
when x"2EF" => DATA <= x"21";
when x"2F0" => DATA <= x"B0";
when x"2F1" => DATA <= x"FC";
when x"2F2" => DATA <= x"CD";
when x"2F3" => DATA <= x"B7";
when x"2F4" => DATA <= x"F6";
when x"2F5" => DATA <= x"18";
when x"2F6" => DATA <= x"D7";
when x"2F7" => DATA <= x"CD";
when x"2F8" => DATA <= x"E7";
when x"2F9" => DATA <= x"FF";
when x"2FA" => DATA <= x"3E";
when x"2FB" => DATA <= x"7E";
when x"2FC" => DATA <= x"CD";
when x"2FD" => DATA <= x"8E";
when x"2FE" => DATA <= x"F8";
when x"2FF" => DATA <= x"FF";
when x"300" => DATA <= x"11";
when x"301" => DATA <= x"45";
when x"302" => DATA <= x"73";
when x"303" => DATA <= x"63";
when x"304" => DATA <= x"61";
when x"305" => DATA <= x"70";
when x"306" => DATA <= x"65";
when x"307" => DATA <= x"00";
when x"308" => DATA <= x"13";
when x"309" => DATA <= x"1A";
when x"30A" => DATA <= x"E6";
when x"30B" => DATA <= x"DF";
when x"30C" => DATA <= x"FE";
when x"30D" => DATA <= x"4F";
when x"30E" => DATA <= x"C2";
when x"30F" => DATA <= x"CC";
when x"310" => DATA <= x"F7";
when x"311" => DATA <= x"CD";
when x"312" => DATA <= x"76";
when x"313" => DATA <= x"F8";
when x"314" => DATA <= x"06";
when x"315" => DATA <= x"00";
when x"316" => DATA <= x"CD";
when x"317" => DATA <= x"39";
when x"318" => DATA <= x"F4";
when x"319" => DATA <= x"CD";
when x"31A" => DATA <= x"77";
when x"31B" => DATA <= x"F8";
when x"31C" => DATA <= x"FE";
when x"31D" => DATA <= x"0D";
when x"31E" => DATA <= x"C2";
when x"31F" => DATA <= x"CC";
when x"320" => DATA <= x"F7";
when x"321" => DATA <= x"3A";
when x"322" => DATA <= x"AA";
when x"323" => DATA <= x"FC";
when x"324" => DATA <= x"32";
when x"325" => DATA <= x"A8";
when x"326" => DATA <= x"FC";
when x"327" => DATA <= x"3A";
when x"328" => DATA <= x"AB";
when x"329" => DATA <= x"FC";
when x"32A" => DATA <= x"32";
when x"32B" => DATA <= x"A9";
when x"32C" => DATA <= x"FC";
when x"32D" => DATA <= x"C3";
when x"32E" => DATA <= x"DF";
when x"32F" => DATA <= x"F7";
when x"330" => DATA <= x"CD";
when x"331" => DATA <= x"76";
when x"332" => DATA <= x"F8";
when x"333" => DATA <= x"06";
when x"334" => DATA <= x"00";
when x"335" => DATA <= x"CD";
when x"336" => DATA <= x"39";
when x"337" => DATA <= x"F4";
when x"338" => DATA <= x"CD";
when x"339" => DATA <= x"77";
when x"33A" => DATA <= x"F8";
when x"33B" => DATA <= x"FE";
when x"33C" => DATA <= x"0D";
when x"33D" => DATA <= x"C2";
when x"33E" => DATA <= x"CC";
when x"33F" => DATA <= x"F7";
when x"340" => DATA <= x"3E";
when x"341" => DATA <= x"04";
when x"342" => DATA <= x"21";
when x"343" => DATA <= x"01";
when x"344" => DATA <= x"00";
when x"345" => DATA <= x"CD";
when x"346" => DATA <= x"F4";
when x"347" => DATA <= x"FF";
when x"348" => DATA <= x"7D";
when x"349" => DATA <= x"32";
when x"34A" => DATA <= x"AE";
when x"34B" => DATA <= x"FC";
when x"34C" => DATA <= x"2A";
when x"34D" => DATA <= x"AA";
when x"34E" => DATA <= x"FC";
when x"34F" => DATA <= x"CD";
when x"350" => DATA <= x"E7";
when x"351" => DATA <= x"FF";
when x"352" => DATA <= x"CD";
when x"353" => DATA <= x"71";
when x"354" => DATA <= x"F4";
when x"355" => DATA <= x"CD";
when x"356" => DATA <= x"1D";
when x"357" => DATA <= x"F4";
when x"358" => DATA <= x"7E";
when x"359" => DATA <= x"CD";
when x"35A" => DATA <= x"0D";
when x"35B" => DATA <= x"F4";
when x"35C" => DATA <= x"CD";
when x"35D" => DATA <= x"1D";
when x"35E" => DATA <= x"F4";
when x"35F" => DATA <= x"7E";
when x"360" => DATA <= x"CD";
when x"361" => DATA <= x"76";
when x"362" => DATA <= x"F4";
when x"363" => DATA <= x"E5";
when x"364" => DATA <= x"06";
when x"365" => DATA <= x"01";
when x"366" => DATA <= x"21";
when x"367" => DATA <= x"00";
when x"368" => DATA <= x"00";
when x"369" => DATA <= x"CD";
when x"36A" => DATA <= x"E0";
when x"36B" => DATA <= x"FF";
when x"36C" => DATA <= x"CD";
when x"36D" => DATA <= x"40";
when x"36E" => DATA <= x"F4";
when x"36F" => DATA <= x"06";
when x"370" => DATA <= x"00";
when x"371" => DATA <= x"5D";
when x"372" => DATA <= x"E1";
when x"373" => DATA <= x"FE";
when x"374" => DATA <= x"8A";
when x"375" => DATA <= x"28";
when x"376" => DATA <= x"27";
when x"377" => DATA <= x"FE";
when x"378" => DATA <= x"8B";
when x"379" => DATA <= x"28";
when x"37A" => DATA <= x"20";
when x"37B" => DATA <= x"FE";
when x"37C" => DATA <= x"01";
when x"37D" => DATA <= x"C2";
when x"37E" => DATA <= x"A1";
when x"37F" => DATA <= x"F3";
when x"380" => DATA <= x"7E";
when x"381" => DATA <= x"CB";
when x"382" => DATA <= x"27";
when x"383" => DATA <= x"CB";
when x"384" => DATA <= x"27";
when x"385" => DATA <= x"CB";
when x"386" => DATA <= x"27";
when x"387" => DATA <= x"CB";
when x"388" => DATA <= x"27";
when x"389" => DATA <= x"83";
when x"38A" => DATA <= x"77";
when x"38B" => DATA <= x"3E";
when x"38C" => DATA <= x"08";
when x"38D" => DATA <= x"CD";
when x"38E" => DATA <= x"71";
when x"38F" => DATA <= x"F6";
when x"390" => DATA <= x"CD";
when x"391" => DATA <= x"71";
when x"392" => DATA <= x"F6";
when x"393" => DATA <= x"CD";
when x"394" => DATA <= x"71";
when x"395" => DATA <= x"F6";
when x"396" => DATA <= x"CD";
when x"397" => DATA <= x"71";
when x"398" => DATA <= x"F6";
when x"399" => DATA <= x"18";
when x"39A" => DATA <= x"BD";
when x"39B" => DATA <= x"23";
when x"39C" => DATA <= x"18";
when x"39D" => DATA <= x"B1";
when x"39E" => DATA <= x"2B";
when x"39F" => DATA <= x"18";
when x"3A0" => DATA <= x"AE";
when x"3A1" => DATA <= x"3A";
when x"3A2" => DATA <= x"AE";
when x"3A3" => DATA <= x"FC";
when x"3A4" => DATA <= x"6F";
when x"3A5" => DATA <= x"26";
when x"3A6" => DATA <= x"00";
when x"3A7" => DATA <= x"3E";
when x"3A8" => DATA <= x"04";
when x"3A9" => DATA <= x"CD";
when x"3AA" => DATA <= x"F4";
when x"3AB" => DATA <= x"FF";
when x"3AC" => DATA <= x"CD";
when x"3AD" => DATA <= x"E7";
when x"3AE" => DATA <= x"FF";
when x"3AF" => DATA <= x"D1";
when x"3B0" => DATA <= x"C1";
when x"3B1" => DATA <= x"F1";
when x"3B2" => DATA <= x"C9";
when x"3B3" => DATA <= x"CD";
when x"3B4" => DATA <= x"76";
when x"3B5" => DATA <= x"F8";
when x"3B6" => DATA <= x"06";
when x"3B7" => DATA <= x"00";
when x"3B8" => DATA <= x"CD";
when x"3B9" => DATA <= x"39";
when x"3BA" => DATA <= x"F4";
when x"3BB" => DATA <= x"FE";
when x"3BC" => DATA <= x"0D";
when x"3BD" => DATA <= x"28";
when x"3BE" => DATA <= x"10";
when x"3BF" => DATA <= x"FE";
when x"3C0" => DATA <= x"20";
when x"3C1" => DATA <= x"C2";
when x"3C2" => DATA <= x"CC";
when x"3C3" => DATA <= x"F7";
when x"3C4" => DATA <= x"2A";
when x"3C5" => DATA <= x"AA";
when x"3C6" => DATA <= x"FC";
when x"3C7" => DATA <= x"CD";
when x"3C8" => DATA <= x"77";
when x"3C9" => DATA <= x"F8";
when x"3CA" => DATA <= x"CD";
when x"3CB" => DATA <= x"39";
when x"3CC" => DATA <= x"F4";
when x"3CD" => DATA <= x"18";
when x"3CE" => DATA <= x"03";
when x"3CF" => DATA <= x"2A";
when x"3D0" => DATA <= x"AA";
when x"3D1" => DATA <= x"FC";
when x"3D2" => DATA <= x"ED";
when x"3D3" => DATA <= x"5B";
when x"3D4" => DATA <= x"AA";
when x"3D5" => DATA <= x"FC";
when x"3D6" => DATA <= x"3A";
when x"3D7" => DATA <= x"80";
when x"3D8" => DATA <= x"FF";
when x"3D9" => DATA <= x"CB";
when x"3DA" => DATA <= x"7F";
when x"3DB" => DATA <= x"C2";
when x"3DC" => DATA <= x"F7";
when x"3DD" => DATA <= x"F2";
when x"3DE" => DATA <= x"CD";
when x"3DF" => DATA <= x"E7";
when x"3E0" => DATA <= x"FF";
when x"3E1" => DATA <= x"CD";
when x"3E2" => DATA <= x"71";
when x"3E3" => DATA <= x"F4";
when x"3E4" => DATA <= x"06";
when x"3E5" => DATA <= x"08";
when x"3E6" => DATA <= x"E5";
when x"3E7" => DATA <= x"CD";
when x"3E8" => DATA <= x"1D";
when x"3E9" => DATA <= x"F4";
when x"3EA" => DATA <= x"7E";
when x"3EB" => DATA <= x"CD";
when x"3EC" => DATA <= x"76";
when x"3ED" => DATA <= x"F4";
when x"3EE" => DATA <= x"23";
when x"3EF" => DATA <= x"10";
when x"3F0" => DATA <= x"F6";
when x"3F1" => DATA <= x"06";
when x"3F2" => DATA <= x"08";
when x"3F3" => DATA <= x"E1";
when x"3F4" => DATA <= x"CD";
when x"3F5" => DATA <= x"1D";
when x"3F6" => DATA <= x"F4";
when x"3F7" => DATA <= x"7E";
when x"3F8" => DATA <= x"CD";
when x"3F9" => DATA <= x"0D";
when x"3FA" => DATA <= x"F4";
when x"3FB" => DATA <= x"23";
when x"3FC" => DATA <= x"10";
when x"3FD" => DATA <= x"F9";
when x"3FE" => DATA <= x"CD";
when x"3FF" => DATA <= x"23";
when x"400" => DATA <= x"F4";
when x"401" => DATA <= x"D2";
when x"402" => DATA <= x"06";
when x"403" => DATA <= x"F4";
when x"404" => DATA <= x"18";
when x"405" => DATA <= x"D0";
when x"406" => DATA <= x"CD";
when x"407" => DATA <= x"E7";
when x"408" => DATA <= x"FF";
when x"409" => DATA <= x"D1";
when x"40A" => DATA <= x"C1";
when x"40B" => DATA <= x"F1";
when x"40C" => DATA <= x"C9";
when x"40D" => DATA <= x"FE";
when x"40E" => DATA <= x"20";
when x"40F" => DATA <= x"38";
when x"410" => DATA <= x"06";
when x"411" => DATA <= x"FE";
when x"412" => DATA <= x"7F";
when x"413" => DATA <= x"30";
when x"414" => DATA <= x"02";
when x"415" => DATA <= x"18";
when x"416" => DATA <= x"02";
when x"417" => DATA <= x"3E";
when x"418" => DATA <= x"2E";
when x"419" => DATA <= x"CD";
when x"41A" => DATA <= x"71";
when x"41B" => DATA <= x"F6";
when x"41C" => DATA <= x"C9";
when x"41D" => DATA <= x"3E";
when x"41E" => DATA <= x"20";
when x"41F" => DATA <= x"CD";
when x"420" => DATA <= x"71";
when x"421" => DATA <= x"F6";
when x"422" => DATA <= x"C9";
when x"423" => DATA <= x"E5";
when x"424" => DATA <= x"01";
when x"425" => DATA <= x"08";
when x"426" => DATA <= x"00";
when x"427" => DATA <= x"BF";
when x"428" => DATA <= x"ED";
when x"429" => DATA <= x"42";
when x"42A" => DATA <= x"30";
when x"42B" => DATA <= x"06";
when x"42C" => DATA <= x"21";
when x"42D" => DATA <= x"00";
when x"42E" => DATA <= x"00";
when x"42F" => DATA <= x"BF";
when x"430" => DATA <= x"18";
when x"431" => DATA <= x"02";
when x"432" => DATA <= x"E1";
when x"433" => DATA <= x"E5";
when x"434" => DATA <= x"2B";
when x"435" => DATA <= x"ED";
when x"436" => DATA <= x"52";
when x"437" => DATA <= x"E1";
when x"438" => DATA <= x"C9";
when x"439" => DATA <= x"22";
when x"43A" => DATA <= x"AC";
when x"43B" => DATA <= x"FC";
when x"43C" => DATA <= x"21";
when x"43D" => DATA <= x"00";
when x"43E" => DATA <= x"00";
when x"43F" => DATA <= x"1A";
when x"440" => DATA <= x"CB";
when x"441" => DATA <= x"77";
when x"442" => DATA <= x"28";
when x"443" => DATA <= x"02";
when x"444" => DATA <= x"E6";
when x"445" => DATA <= x"DF";
when x"446" => DATA <= x"FE";
when x"447" => DATA <= x"30";
when x"448" => DATA <= x"FA";
when x"449" => DATA <= x"6D";
when x"44A" => DATA <= x"F4";
when x"44B" => DATA <= x"FE";
when x"44C" => DATA <= x"47";
when x"44D" => DATA <= x"F2";
when x"44E" => DATA <= x"6D";
when x"44F" => DATA <= x"F4";
when x"450" => DATA <= x"FE";
when x"451" => DATA <= x"3A";
when x"452" => DATA <= x"38";
when x"453" => DATA <= x"07";
when x"454" => DATA <= x"FE";
when x"455" => DATA <= x"41";
when x"456" => DATA <= x"FA";
when x"457" => DATA <= x"6D";
when x"458" => DATA <= x"F4";
when x"459" => DATA <= x"C6";
when x"45A" => DATA <= x"09";
when x"45B" => DATA <= x"E6";
when x"45C" => DATA <= x"0F";
when x"45D" => DATA <= x"29";
when x"45E" => DATA <= x"29";
when x"45F" => DATA <= x"29";
when x"460" => DATA <= x"29";
when x"461" => DATA <= x"B5";
when x"462" => DATA <= x"6F";
when x"463" => DATA <= x"3E";
when x"464" => DATA <= x"01";
when x"465" => DATA <= x"B8";
when x"466" => DATA <= x"C8";
when x"467" => DATA <= x"13";
when x"468" => DATA <= x"22";
when x"469" => DATA <= x"AA";
when x"46A" => DATA <= x"FC";
when x"46B" => DATA <= x"18";
when x"46C" => DATA <= x"D2";
when x"46D" => DATA <= x"2A";
when x"46E" => DATA <= x"AC";
when x"46F" => DATA <= x"FC";
when x"470" => DATA <= x"C9";
when x"471" => DATA <= x"7C";
when x"472" => DATA <= x"CD";
when x"473" => DATA <= x"76";
when x"474" => DATA <= x"F4";
when x"475" => DATA <= x"7D";
when x"476" => DATA <= x"F5";
when x"477" => DATA <= x"0F";
when x"478" => DATA <= x"0F";
when x"479" => DATA <= x"0F";
when x"47A" => DATA <= x"0F";
when x"47B" => DATA <= x"CD";
when x"47C" => DATA <= x"7F";
when x"47D" => DATA <= x"F4";
when x"47E" => DATA <= x"F1";
when x"47F" => DATA <= x"E6";
when x"480" => DATA <= x"0F";
when x"481" => DATA <= x"C6";
when x"482" => DATA <= x"30";
when x"483" => DATA <= x"FE";
when x"484" => DATA <= x"3A";
when x"485" => DATA <= x"FA";
when x"486" => DATA <= x"71";
when x"487" => DATA <= x"F6";
when x"488" => DATA <= x"C6";
when x"489" => DATA <= x"07";
when x"48A" => DATA <= x"C3";
when x"48B" => DATA <= x"71";
when x"48C" => DATA <= x"F6";
when x"48D" => DATA <= x"13";
when x"48E" => DATA <= x"1A";
when x"48F" => DATA <= x"E6";
when x"490" => DATA <= x"DF";
when x"491" => DATA <= x"FE";
when x"492" => DATA <= x"50";
when x"493" => DATA <= x"C2";
when x"494" => DATA <= x"CC";
when x"495" => DATA <= x"F7";
when x"496" => DATA <= x"13";
when x"497" => DATA <= x"1A";
when x"498" => DATA <= x"E6";
when x"499" => DATA <= x"DF";
when x"49A" => DATA <= x"FE";
when x"49B" => DATA <= x"4D";
when x"49C" => DATA <= x"C2";
when x"49D" => DATA <= x"CC";
when x"49E" => DATA <= x"F7";
when x"49F" => DATA <= x"CD";
when x"4A0" => DATA <= x"76";
when x"4A1" => DATA <= x"F8";
when x"4A2" => DATA <= x"FE";
when x"4A3" => DATA <= x"0D";
when x"4A4" => DATA <= x"C2";
when x"4A5" => DATA <= x"CC";
when x"4A6" => DATA <= x"F7";
when x"4A7" => DATA <= x"18";
when x"4A8" => DATA <= x"26";
when x"4A9" => DATA <= x"CD";
when x"4AA" => DATA <= x"0E";
when x"4AB" => DATA <= x"F6";
when x"4AC" => DATA <= x"49";
when x"4AD" => DATA <= x"6E";
when x"4AE" => DATA <= x"73";
when x"4AF" => DATA <= x"65";
when x"4B0" => DATA <= x"72";
when x"4B1" => DATA <= x"74";
when x"4B2" => DATA <= x"20";
when x"4B3" => DATA <= x"43";
when x"4B4" => DATA <= x"50";
when x"4B5" => DATA <= x"2F";
when x"4B6" => DATA <= x"4D";
when x"4B7" => DATA <= x"20";
when x"4B8" => DATA <= x"53";
when x"4B9" => DATA <= x"79";
when x"4BA" => DATA <= x"73";
when x"4BB" => DATA <= x"74";
when x"4BC" => DATA <= x"65";
when x"4BD" => DATA <= x"6D";
when x"4BE" => DATA <= x"20";
when x"4BF" => DATA <= x"64";
when x"4C0" => DATA <= x"69";
when x"4C1" => DATA <= x"73";
when x"4C2" => DATA <= x"63";
when x"4C3" => DATA <= x"20";
when x"4C4" => DATA <= x"69";
when x"4C5" => DATA <= x"6E";
when x"4C6" => DATA <= x"20";
when x"4C7" => DATA <= x"64";
when x"4C8" => DATA <= x"72";
when x"4C9" => DATA <= x"69";
when x"4CA" => DATA <= x"76";
when x"4CB" => DATA <= x"65";
when x"4CC" => DATA <= x"20";
when x"4CD" => DATA <= x"41";
when x"4CE" => DATA <= x"00";
when x"4CF" => DATA <= x"3E";
when x"4D0" => DATA <= x"E5";
when x"4D1" => DATA <= x"21";
when x"4D2" => DATA <= x"01";
when x"4D3" => DATA <= x"00";
when x"4D4" => DATA <= x"CD";
when x"4D5" => DATA <= x"8E";
when x"4D6" => DATA <= x"F8";
when x"4D7" => DATA <= x"21";
when x"4D8" => DATA <= x"82";
when x"4D9" => DATA <= x"F5";
when x"4DA" => DATA <= x"CD";
when x"4DB" => DATA <= x"4A";
when x"4DC" => DATA <= x"F5";
when x"4DD" => DATA <= x"21";
when x"4DE" => DATA <= x"00";
when x"4DF" => DATA <= x"EB";
when x"4E0" => DATA <= x"11";
when x"4E1" => DATA <= x"F0";
when x"4E2" => DATA <= x"EA";
when x"4E3" => DATA <= x"01";
when x"4E4" => DATA <= x"F0";
when x"4E5" => DATA <= x"00";
when x"4E6" => DATA <= x"ED";
when x"4E7" => DATA <= x"B0";
when x"4E8" => DATA <= x"21";
when x"4E9" => DATA <= x"F0";
when x"4EA" => DATA <= x"EB";
when x"4EB" => DATA <= x"11";
when x"4EC" => DATA <= x"E0";
when x"4ED" => DATA <= x"EB";
when x"4EE" => DATA <= x"01";
when x"4EF" => DATA <= x"00";
when x"4F0" => DATA <= x"06";
when x"4F1" => DATA <= x"ED";
when x"4F2" => DATA <= x"B0";
when x"4F3" => DATA <= x"CD";
when x"4F4" => DATA <= x"3B";
when x"4F5" => DATA <= x"F5";
when x"4F6" => DATA <= x"3A";
when x"4F7" => DATA <= x"00";
when x"4F8" => DATA <= x"D4";
when x"4F9" => DATA <= x"FE";
when x"4FA" => DATA <= x"C3";
when x"4FB" => DATA <= x"CA";
when x"4FC" => DATA <= x"22";
when x"4FD" => DATA <= x"F5";
when x"4FE" => DATA <= x"3E";
when x"4FF" => DATA <= x"E5";
when x"500" => DATA <= x"21";
when x"501" => DATA <= x"00";
when x"502" => DATA <= x"00";
when x"503" => DATA <= x"CD";
when x"504" => DATA <= x"8E";
when x"505" => DATA <= x"F8";
when x"506" => DATA <= x"CD";
when x"507" => DATA <= x"E7";
when x"508" => DATA <= x"FF";
when x"509" => DATA <= x"FF";
when x"50A" => DATA <= x"C8";
when x"50B" => DATA <= x"4E";
when x"50C" => DATA <= x"6F";
when x"50D" => DATA <= x"74";
when x"50E" => DATA <= x"20";
when x"50F" => DATA <= x"61";
when x"510" => DATA <= x"20";
when x"511" => DATA <= x"43";
when x"512" => DATA <= x"50";
when x"513" => DATA <= x"2F";
when x"514" => DATA <= x"4D";
when x"515" => DATA <= x"20";
when x"516" => DATA <= x"53";
when x"517" => DATA <= x"79";
when x"518" => DATA <= x"73";
when x"519" => DATA <= x"74";
when x"51A" => DATA <= x"65";
when x"51B" => DATA <= x"6D";
when x"51C" => DATA <= x"20";
when x"51D" => DATA <= x"64";
when x"51E" => DATA <= x"69";
when x"51F" => DATA <= x"73";
when x"520" => DATA <= x"63";
when x"521" => DATA <= x"00";
when x"522" => DATA <= x"21";
when x"523" => DATA <= x"B2";
when x"524" => DATA <= x"FA";
when x"525" => DATA <= x"22";
when x"526" => DATA <= x"FA";
when x"527" => DATA <= x"FF";
when x"528" => DATA <= x"3E";
when x"529" => DATA <= x"90";
when x"52A" => DATA <= x"32";
when x"52B" => DATA <= x"A3";
when x"52C" => DATA <= x"FC";
when x"52D" => DATA <= x"21";
when x"52E" => DATA <= x"00";
when x"52F" => DATA <= x"01";
when x"530" => DATA <= x"CD";
when x"531" => DATA <= x"8E";
when x"532" => DATA <= x"F8";
when x"533" => DATA <= x"CD";
when x"534" => DATA <= x"0E";
when x"535" => DATA <= x"F6";
when x"536" => DATA <= x"16";
when x"537" => DATA <= x"00";
when x"538" => DATA <= x"C3";
when x"539" => DATA <= x"00";
when x"53A" => DATA <= x"EA";
when x"53B" => DATA <= x"21";
when x"53C" => DATA <= x"8D";
when x"53D" => DATA <= x"F5";
when x"53E" => DATA <= x"CD";
when x"53F" => DATA <= x"4A";
when x"540" => DATA <= x"F5";
when x"541" => DATA <= x"21";
when x"542" => DATA <= x"98";
when x"543" => DATA <= x"F5";
when x"544" => DATA <= x"CD";
when x"545" => DATA <= x"4A";
when x"546" => DATA <= x"F5";
when x"547" => DATA <= x"21";
when x"548" => DATA <= x"A3";
when x"549" => DATA <= x"F5";
when x"54A" => DATA <= x"CD";
when x"54B" => DATA <= x"5C";
when x"54C" => DATA <= x"F5";
when x"54D" => DATA <= x"B7";
when x"54E" => DATA <= x"C8";
when x"54F" => DATA <= x"FF";
when x"550" => DATA <= x"C7";
when x"551" => DATA <= x"44";
when x"552" => DATA <= x"69";
when x"553" => DATA <= x"73";
when x"554" => DATA <= x"63";
when x"555" => DATA <= x"20";
when x"556" => DATA <= x"66";
when x"557" => DATA <= x"61";
when x"558" => DATA <= x"75";
when x"559" => DATA <= x"6C";
when x"55A" => DATA <= x"74";
when x"55B" => DATA <= x"00";
when x"55C" => DATA <= x"06";
when x"55D" => DATA <= x"04";
when x"55E" => DATA <= x"48";
when x"55F" => DATA <= x"06";
when x"560" => DATA <= x"0A";
when x"561" => DATA <= x"3E";
when x"562" => DATA <= x"7F";
when x"563" => DATA <= x"CD";
when x"564" => DATA <= x"EF";
when x"565" => DATA <= x"F8";
when x"566" => DATA <= x"11";
when x"567" => DATA <= x"0A";
when x"568" => DATA <= x"00";
when x"569" => DATA <= x"EB";
when x"56A" => DATA <= x"19";
when x"56B" => DATA <= x"7E";
when x"56C" => DATA <= x"32";
when x"56D" => DATA <= x"A7";
when x"56E" => DATA <= x"FC";
when x"56F" => DATA <= x"EB";
when x"570" => DATA <= x"FE";
when x"571" => DATA <= x"12";
when x"572" => DATA <= x"C8";
when x"573" => DATA <= x"B7";
when x"574" => DATA <= x"C8";
when x"575" => DATA <= x"10";
when x"576" => DATA <= x"EA";
when x"577" => DATA <= x"7E";
when x"578" => DATA <= x"CD";
when x"579" => DATA <= x"1B";
when x"57A" => DATA <= x"F6";
when x"57B" => DATA <= x"41";
when x"57C" => DATA <= x"10";
when x"57D" => DATA <= x"E0";
when x"57E" => DATA <= x"3A";
when x"57F" => DATA <= x"A7";
when x"580" => DATA <= x"FC";
when x"581" => DATA <= x"C9";
when x"582" => DATA <= x"00";
when x"583" => DATA <= x"F0";
when x"584" => DATA <= x"E9";
when x"585" => DATA <= x"00";
when x"586" => DATA <= x"00";
when x"587" => DATA <= x"03";
when x"588" => DATA <= x"53";
when x"589" => DATA <= x"00";
when x"58A" => DATA <= x"00";
when x"58B" => DATA <= x"28";
when x"58C" => DATA <= x"FF";
when x"58D" => DATA <= x"00";
when x"58E" => DATA <= x"00";
when x"58F" => DATA <= x"D4";
when x"590" => DATA <= x"00";
when x"591" => DATA <= x"00";
when x"592" => DATA <= x"03";
when x"593" => DATA <= x"53";
when x"594" => DATA <= x"00";
when x"595" => DATA <= x"08";
when x"596" => DATA <= x"22";
when x"597" => DATA <= x"FF";
when x"598" => DATA <= x"00";
when x"599" => DATA <= x"00";
when x"59A" => DATA <= x"D6";
when x"59B" => DATA <= x"00";
when x"59C" => DATA <= x"00";
when x"59D" => DATA <= x"03";
when x"59E" => DATA <= x"53";
when x"59F" => DATA <= x"01";
when x"5A0" => DATA <= x"00";
when x"5A1" => DATA <= x"2A";
when x"5A2" => DATA <= x"FF";
when x"5A3" => DATA <= x"00";
when x"5A4" => DATA <= x"00";
when x"5A5" => DATA <= x"E0";
when x"5A6" => DATA <= x"00";
when x"5A7" => DATA <= x"00";
when x"5A8" => DATA <= x"03";
when x"5A9" => DATA <= x"53";
when x"5AA" => DATA <= x"02";
when x"5AB" => DATA <= x"00";
when x"5AC" => DATA <= x"2A";
when x"5AD" => DATA <= x"FF";
when x"5AE" => DATA <= x"F3";
when x"5AF" => DATA <= x"21";
when x"5B0" => DATA <= x"00";
when x"5B1" => DATA <= x"25";
when x"5B2" => DATA <= x"11";
when x"5B3" => DATA <= x"30";
when x"5B4" => DATA <= x"FD";
when x"5B5" => DATA <= x"06";
when x"5B6" => DATA <= x"AA";
when x"5B7" => DATA <= x"CD";
when x"5B8" => DATA <= x"F3";
when x"5B9" => DATA <= x"F5";
when x"5BA" => DATA <= x"21";
when x"5BB" => DATA <= x"00";
when x"5BC" => DATA <= x"02";
when x"5BD" => DATA <= x"11";
when x"5BE" => DATA <= x"DC";
when x"5BF" => DATA <= x"FD";
when x"5C0" => DATA <= x"06";
when x"5C1" => DATA <= x"02";
when x"5C2" => DATA <= x"CD";
when x"5C3" => DATA <= x"DD";
when x"5C4" => DATA <= x"F5";
when x"5C5" => DATA <= x"21";
when x"5C6" => DATA <= x"03";
when x"5C7" => DATA <= x"25";
when x"5C8" => DATA <= x"11";
when x"5C9" => DATA <= x"DC";
when x"5CA" => DATA <= x"FD";
when x"5CB" => DATA <= x"06";
when x"5CC" => DATA <= x"02";
when x"5CD" => DATA <= x"CD";
when x"5CE" => DATA <= x"F3";
when x"5CF" => DATA <= x"F5";
when x"5D0" => DATA <= x"21";
when x"5D1" => DATA <= x"00";
when x"5D2" => DATA <= x"02";
when x"5D3" => DATA <= x"11";
when x"5D4" => DATA <= x"DA";
when x"5D5" => DATA <= x"FD";
when x"5D6" => DATA <= x"06";
when x"5D7" => DATA <= x"02";
when x"5D8" => DATA <= x"CD";
when x"5D9" => DATA <= x"F3";
when x"5DA" => DATA <= x"F5";
when x"5DB" => DATA <= x"FB";
when x"5DC" => DATA <= x"C9";
when x"5DD" => DATA <= x"22";
when x"5DE" => DATA <= x"09";
when x"5DF" => DATA <= x"F6";
when x"5E0" => DATA <= x"E5";
when x"5E1" => DATA <= x"21";
when x"5E2" => DATA <= x"09";
when x"5E3" => DATA <= x"F6";
when x"5E4" => DATA <= x"3E";
when x"5E5" => DATA <= x"05";
when x"5E6" => DATA <= x"CD";
when x"5E7" => DATA <= x"F1";
when x"5E8" => DATA <= x"FF";
when x"5E9" => DATA <= x"3A";
when x"5EA" => DATA <= x"0D";
when x"5EB" => DATA <= x"F6";
when x"5EC" => DATA <= x"12";
when x"5ED" => DATA <= x"13";
when x"5EE" => DATA <= x"E1";
when x"5EF" => DATA <= x"23";
when x"5F0" => DATA <= x"10";
when x"5F1" => DATA <= x"EB";
when x"5F2" => DATA <= x"C9";
when x"5F3" => DATA <= x"22";
when x"5F4" => DATA <= x"09";
when x"5F5" => DATA <= x"F6";
when x"5F6" => DATA <= x"1A";
when x"5F7" => DATA <= x"32";
when x"5F8" => DATA <= x"0D";
when x"5F9" => DATA <= x"F6";
when x"5FA" => DATA <= x"E5";
when x"5FB" => DATA <= x"21";
when x"5FC" => DATA <= x"09";
when x"5FD" => DATA <= x"F6";
when x"5FE" => DATA <= x"3E";
when x"5FF" => DATA <= x"06";
when x"600" => DATA <= x"CD";
when x"601" => DATA <= x"F1";
when x"602" => DATA <= x"FF";
when x"603" => DATA <= x"13";
when x"604" => DATA <= x"E1";
when x"605" => DATA <= x"23";
when x"606" => DATA <= x"10";
when x"607" => DATA <= x"EB";
when x"608" => DATA <= x"C9";
when x"609" => DATA <= x"00";
when x"60A" => DATA <= x"00";
when x"60B" => DATA <= x"00";
when x"60C" => DATA <= x"00";
when x"60D" => DATA <= x"00";
when x"60E" => DATA <= x"E3";
when x"60F" => DATA <= x"F5";
when x"610" => DATA <= x"7E";
when x"611" => DATA <= x"CD";
when x"612" => DATA <= x"E3";
when x"613" => DATA <= x"FF";
when x"614" => DATA <= x"23";
when x"615" => DATA <= x"B7";
when x"616" => DATA <= x"20";
when x"617" => DATA <= x"F8";
when x"618" => DATA <= x"F1";
when x"619" => DATA <= x"E3";
when x"61A" => DATA <= x"C9";
when x"61B" => DATA <= x"F5";
when x"61C" => DATA <= x"E5";
when x"61D" => DATA <= x"32";
when x"61E" => DATA <= x"36";
when x"61F" => DATA <= x"F6";
when x"620" => DATA <= x"21";
when x"621" => DATA <= x"36";
when x"622" => DATA <= x"F6";
when x"623" => DATA <= x"3E";
when x"624" => DATA <= x"7F";
when x"625" => DATA <= x"ED";
when x"626" => DATA <= x"73";
when x"627" => DATA <= x"A5";
when x"628" => DATA <= x"FC";
when x"629" => DATA <= x"31";
when x"62A" => DATA <= x"80";
when x"62B" => DATA <= x"FF";
when x"62C" => DATA <= x"CD";
when x"62D" => DATA <= x"EF";
when x"62E" => DATA <= x"F8";
when x"62F" => DATA <= x"ED";
when x"630" => DATA <= x"7B";
when x"631" => DATA <= x"A5";
when x"632" => DATA <= x"FC";
when x"633" => DATA <= x"E1";
when x"634" => DATA <= x"F1";
when x"635" => DATA <= x"C9";
when x"636" => DATA <= x"00";
when x"637" => DATA <= x"00";
when x"638" => DATA <= x"00";
when x"639" => DATA <= x"00";
when x"63A" => DATA <= x"00";
when x"63B" => DATA <= x"01";
when x"63C" => DATA <= x"69";
when x"63D" => DATA <= x"00";
when x"63E" => DATA <= x"00";
when x"63F" => DATA <= x"E5";
when x"640" => DATA <= x"21";
when x"641" => DATA <= x"FF";
when x"642" => DATA <= x"FF";
when x"643" => DATA <= x"3E";
when x"644" => DATA <= x"80";
when x"645" => DATA <= x"CD";
when x"646" => DATA <= x"8E";
when x"647" => DATA <= x"F8";
when x"648" => DATA <= x"7D";
when x"649" => DATA <= x"B7";
when x"64A" => DATA <= x"28";
when x"64B" => DATA <= x"02";
when x"64C" => DATA <= x"18";
when x"64D" => DATA <= x"0C";
when x"64E" => DATA <= x"3E";
when x"64F" => DATA <= x"D8";
when x"650" => DATA <= x"21";
when x"651" => DATA <= x"00";
when x"652" => DATA <= x"FF";
when x"653" => DATA <= x"CD";
when x"654" => DATA <= x"8E";
when x"655" => DATA <= x"F8";
when x"656" => DATA <= x"7D";
when x"657" => DATA <= x"B7";
when x"658" => DATA <= x"28";
when x"659" => DATA <= x"02";
when x"65A" => DATA <= x"3E";
when x"65B" => DATA <= x"FF";
when x"65C" => DATA <= x"E1";
when x"65D" => DATA <= x"C9";
when x"65E" => DATA <= x"C5";
when x"65F" => DATA <= x"D5";
when x"660" => DATA <= x"E5";
when x"661" => DATA <= x"21";
when x"662" => DATA <= x"BC";
when x"663" => DATA <= x"FF";
when x"664" => DATA <= x"11";
when x"665" => DATA <= x"38";
when x"666" => DATA <= x"00";
when x"667" => DATA <= x"01";
when x"668" => DATA <= x"03";
when x"669" => DATA <= x"00";
when x"66A" => DATA <= x"ED";
when x"66B" => DATA <= x"B0";
when x"66C" => DATA <= x"E1";
when x"66D" => DATA <= x"D1";
when x"66E" => DATA <= x"C1";
when x"66F" => DATA <= x"C9";
when x"670" => DATA <= x"C9";
when x"671" => DATA <= x"F5";
when x"672" => DATA <= x"DB";
when x"673" => DATA <= x"00";
when x"674" => DATA <= x"CB";
when x"675" => DATA <= x"77";
when x"676" => DATA <= x"28";
when x"677" => DATA <= x"FA";
when x"678" => DATA <= x"F1";
when x"679" => DATA <= x"D3";
when x"67A" => DATA <= x"01";
when x"67B" => DATA <= x"C9";
when x"67C" => DATA <= x"DB";
when x"67D" => DATA <= x"00";
when x"67E" => DATA <= x"CB";
when x"67F" => DATA <= x"7F";
when x"680" => DATA <= x"20";
when x"681" => DATA <= x"0B";
when x"682" => DATA <= x"DB";
when x"683" => DATA <= x"06";
when x"684" => DATA <= x"CB";
when x"685" => DATA <= x"7F";
when x"686" => DATA <= x"28";
when x"687" => DATA <= x"F4";
when x"688" => DATA <= x"CD";
when x"689" => DATA <= x"0B";
when x"68A" => DATA <= x"FB";
when x"68B" => DATA <= x"18";
when x"68C" => DATA <= x"EF";
when x"68D" => DATA <= x"DB";
when x"68E" => DATA <= x"01";
when x"68F" => DATA <= x"C9";
when x"690" => DATA <= x"3E";
when x"691" => DATA <= x"00";
when x"692" => DATA <= x"CD";
when x"693" => DATA <= x"A3";
when x"694" => DATA <= x"F6";
when x"695" => DATA <= x"CD";
when x"696" => DATA <= x"9A";
when x"697" => DATA <= x"F6";
when x"698" => DATA <= x"CB";
when x"699" => DATA <= x"27";
when x"69A" => DATA <= x"DB";
when x"69B" => DATA <= x"02";
when x"69C" => DATA <= x"CB";
when x"69D" => DATA <= x"7F";
when x"69E" => DATA <= x"28";
when x"69F" => DATA <= x"FA";
when x"6A0" => DATA <= x"DB";
when x"6A1" => DATA <= x"03";
when x"6A2" => DATA <= x"C9";
when x"6A3" => DATA <= x"F5";
when x"6A4" => DATA <= x"DB";
when x"6A5" => DATA <= x"02";
when x"6A6" => DATA <= x"CB";
when x"6A7" => DATA <= x"77";
when x"6A8" => DATA <= x"28";
when x"6A9" => DATA <= x"FA";
when x"6AA" => DATA <= x"F1";
when x"6AB" => DATA <= x"D3";
when x"6AC" => DATA <= x"03";
when x"6AD" => DATA <= x"C9";
when x"6AE" => DATA <= x"DB";
when x"6AF" => DATA <= x"06";
when x"6B0" => DATA <= x"CB";
when x"6B1" => DATA <= x"7F";
when x"6B2" => DATA <= x"28";
when x"6B3" => DATA <= x"FA";
when x"6B4" => DATA <= x"DB";
when x"6B5" => DATA <= x"07";
when x"6B6" => DATA <= x"C9";
when x"6B7" => DATA <= x"F5";
when x"6B8" => DATA <= x"C5";
when x"6B9" => DATA <= x"D5";
when x"6BA" => DATA <= x"54";
when x"6BB" => DATA <= x"5D";
when x"6BC" => DATA <= x"CD";
when x"6BD" => DATA <= x"7E";
when x"6BE" => DATA <= x"F8";
when x"6BF" => DATA <= x"CD";
when x"6C0" => DATA <= x"77";
when x"6C1" => DATA <= x"F8";
when x"6C2" => DATA <= x"FE";
when x"6C3" => DATA <= x"2A";
when x"6C4" => DATA <= x"28";
when x"6C5" => DATA <= x"F6";
when x"6C6" => DATA <= x"E6";
when x"6C7" => DATA <= x"DF";
when x"6C8" => DATA <= x"FE";
when x"6C9" => DATA <= x"48";
when x"6CA" => DATA <= x"28";
when x"6CB" => DATA <= x"20";
when x"6CC" => DATA <= x"4F";
when x"6CD" => DATA <= x"3A";
when x"6CE" => DATA <= x"A3";
when x"6CF" => DATA <= x"FC";
when x"6D0" => DATA <= x"B7";
when x"6D1" => DATA <= x"79";
when x"6D2" => DATA <= x"C2";
when x"6D3" => DATA <= x"CC";
when x"6D4" => DATA <= x"F7";
when x"6D5" => DATA <= x"FE";
when x"6D6" => DATA <= x"47";
when x"6D7" => DATA <= x"CA";
when x"6D8" => DATA <= x"08";
when x"6D9" => DATA <= x"F3";
when x"6DA" => DATA <= x"FE";
when x"6DB" => DATA <= x"44";
when x"6DC" => DATA <= x"CA";
when x"6DD" => DATA <= x"B3";
when x"6DE" => DATA <= x"F3";
when x"6DF" => DATA <= x"FE";
when x"6E0" => DATA <= x"53";
when x"6E1" => DATA <= x"CA";
when x"6E2" => DATA <= x"30";
when x"6E3" => DATA <= x"F3";
when x"6E4" => DATA <= x"FE";
when x"6E5" => DATA <= x"43";
when x"6E6" => DATA <= x"CA";
when x"6E7" => DATA <= x"8D";
when x"6E8" => DATA <= x"F4";
when x"6E9" => DATA <= x"C3";
when x"6EA" => DATA <= x"CC";
when x"6EB" => DATA <= x"F7";
when x"6EC" => DATA <= x"13";
when x"6ED" => DATA <= x"1A";
when x"6EE" => DATA <= x"FE";
when x"6EF" => DATA <= x"2E";
when x"6F0" => DATA <= x"28";
when x"6F1" => DATA <= x"2E";
when x"6F2" => DATA <= x"E6";
when x"6F3" => DATA <= x"DF";
when x"6F4" => DATA <= x"FE";
when x"6F5" => DATA <= x"45";
when x"6F6" => DATA <= x"C2";
when x"6F7" => DATA <= x"CC";
when x"6F8" => DATA <= x"F7";
when x"6F9" => DATA <= x"13";
when x"6FA" => DATA <= x"1A";
when x"6FB" => DATA <= x"FE";
when x"6FC" => DATA <= x"2E";
when x"6FD" => DATA <= x"28";
when x"6FE" => DATA <= x"21";
when x"6FF" => DATA <= x"E6";
when x"700" => DATA <= x"DF";
when x"701" => DATA <= x"FE";
when x"702" => DATA <= x"4C";
when x"703" => DATA <= x"C2";
when x"704" => DATA <= x"CC";
when x"705" => DATA <= x"F7";
when x"706" => DATA <= x"13";
when x"707" => DATA <= x"1A";
when x"708" => DATA <= x"FE";
when x"709" => DATA <= x"2E";
when x"70A" => DATA <= x"28";
when x"70B" => DATA <= x"14";
when x"70C" => DATA <= x"E6";
when x"70D" => DATA <= x"DF";
when x"70E" => DATA <= x"FE";
when x"70F" => DATA <= x"50";
when x"710" => DATA <= x"C2";
when x"711" => DATA <= x"CC";
when x"712" => DATA <= x"F7";
when x"713" => DATA <= x"13";
when x"714" => DATA <= x"1A";
when x"715" => DATA <= x"CD";
when x"716" => DATA <= x"6D";
when x"717" => DATA <= x"F8";
when x"718" => DATA <= x"D2";
when x"719" => DATA <= x"CC";
when x"71A" => DATA <= x"F7";
when x"71B" => DATA <= x"CD";
when x"71C" => DATA <= x"77";
when x"71D" => DATA <= x"F8";
when x"71E" => DATA <= x"18";
when x"71F" => DATA <= x"03";
when x"720" => DATA <= x"CD";
when x"721" => DATA <= x"76";
when x"722" => DATA <= x"F8";
when x"723" => DATA <= x"CD";
when x"724" => DATA <= x"B3";
when x"725" => DATA <= x"FF";
when x"726" => DATA <= x"0D";
when x"727" => DATA <= x"5A";
when x"728" => DATA <= x"38";
when x"729" => DATA <= x"30";
when x"72A" => DATA <= x"20";
when x"72B" => DATA <= x"54";
when x"72C" => DATA <= x"55";
when x"72D" => DATA <= x"42";
when x"72E" => DATA <= x"45";
when x"72F" => DATA <= x"20";
when x"730" => DATA <= x"31";
when x"731" => DATA <= x"2E";
when x"732" => DATA <= x"32";
when x"733" => DATA <= x"31";
when x"734" => DATA <= x"0D";
when x"735" => DATA <= x"00";
when x"736" => DATA <= x"4F";
when x"737" => DATA <= x"3A";
when x"738" => DATA <= x"A3";
when x"739" => DATA <= x"FC";
when x"73A" => DATA <= x"B7";
when x"73B" => DATA <= x"79";
when x"73C" => DATA <= x"C2";
when x"73D" => DATA <= x"CC";
when x"73E" => DATA <= x"F7";
when x"73F" => DATA <= x"FE";
when x"740" => DATA <= x"0D";
when x"741" => DATA <= x"28";
when x"742" => DATA <= x"29";
when x"743" => DATA <= x"E6";
when x"744" => DATA <= x"DF";
when x"745" => DATA <= x"FE";
when x"746" => DATA <= x"4D";
when x"747" => DATA <= x"28";
when x"748" => DATA <= x"09";
when x"749" => DATA <= x"FE";
when x"74A" => DATA <= x"0D";
when x"74B" => DATA <= x"CA";
when x"74C" => DATA <= x"CC";
when x"74D" => DATA <= x"F7";
when x"74E" => DATA <= x"13";
when x"74F" => DATA <= x"1A";
when x"750" => DATA <= x"18";
when x"751" => DATA <= x"F1";
when x"752" => DATA <= x"13";
when x"753" => DATA <= x"1A";
when x"754" => DATA <= x"E6";
when x"755" => DATA <= x"DF";
when x"756" => DATA <= x"FE";
when x"757" => DATA <= x"4F";
when x"758" => DATA <= x"20";
when x"759" => DATA <= x"F4";
when x"75A" => DATA <= x"13";
when x"75B" => DATA <= x"1A";
when x"75C" => DATA <= x"E6";
when x"75D" => DATA <= x"DF";
when x"75E" => DATA <= x"FE";
when x"75F" => DATA <= x"4E";
when x"760" => DATA <= x"20";
when x"761" => DATA <= x"EC";
when x"762" => DATA <= x"13";
when x"763" => DATA <= x"1A";
when x"764" => DATA <= x"CD";
when x"765" => DATA <= x"6D";
when x"766" => DATA <= x"F8";
when x"767" => DATA <= x"D2";
when x"768" => DATA <= x"4E";
when x"769" => DATA <= x"F7";
when x"76A" => DATA <= x"18";
when x"76B" => DATA <= x"0C";
when x"76C" => DATA <= x"CD";
when x"76D" => DATA <= x"0E";
when x"76E" => DATA <= x"F6";
when x"76F" => DATA <= x"20";
when x"770" => DATA <= x"20";
when x"771" => DATA <= x"4D";
when x"772" => DATA <= x"4F";
when x"773" => DATA <= x"4E";
when x"774" => DATA <= x"0D";
when x"775" => DATA <= x"00";
when x"776" => DATA <= x"18";
when x"777" => DATA <= x"54";
when x"778" => DATA <= x"CD";
when x"779" => DATA <= x"0E";
when x"77A" => DATA <= x"F6";
when x"77B" => DATA <= x"20";
when x"77C" => DATA <= x"20";
when x"77D" => DATA <= x"43";
when x"77E" => DATA <= x"50";
when x"77F" => DATA <= x"4D";
when x"780" => DATA <= x"0D";
when x"781" => DATA <= x"20";
when x"782" => DATA <= x"20";
when x"783" => DATA <= x"44";
when x"784" => DATA <= x"75";
when x"785" => DATA <= x"6D";
when x"786" => DATA <= x"70";
when x"787" => DATA <= x"20";
when x"788" => DATA <= x"3C";
when x"789" => DATA <= x"73";
when x"78A" => DATA <= x"74";
when x"78B" => DATA <= x"61";
when x"78C" => DATA <= x"72";
when x"78D" => DATA <= x"74";
when x"78E" => DATA <= x"20";
when x"78F" => DATA <= x"61";
when x"790" => DATA <= x"64";
when x"791" => DATA <= x"64";
when x"792" => DATA <= x"72";
when x"793" => DATA <= x"65";
when x"794" => DATA <= x"73";
when x"795" => DATA <= x"73";
when x"796" => DATA <= x"3E";
when x"797" => DATA <= x"20";
when x"798" => DATA <= x"3C";
when x"799" => DATA <= x"65";
when x"79A" => DATA <= x"6E";
when x"79B" => DATA <= x"64";
when x"79C" => DATA <= x"20";
when x"79D" => DATA <= x"61";
when x"79E" => DATA <= x"64";
when x"79F" => DATA <= x"64";
when x"7A0" => DATA <= x"72";
when x"7A1" => DATA <= x"65";
when x"7A2" => DATA <= x"73";
when x"7A3" => DATA <= x"73";
when x"7A4" => DATA <= x"3E";
when x"7A5" => DATA <= x"0D";
when x"7A6" => DATA <= x"20";
when x"7A7" => DATA <= x"20";
when x"7A8" => DATA <= x"47";
when x"7A9" => DATA <= x"4F";
when x"7AA" => DATA <= x"20";
when x"7AB" => DATA <= x"3C";
when x"7AC" => DATA <= x"61";
when x"7AD" => DATA <= x"64";
when x"7AE" => DATA <= x"64";
when x"7AF" => DATA <= x"72";
when x"7B0" => DATA <= x"65";
when x"7B1" => DATA <= x"73";
when x"7B2" => DATA <= x"73";
when x"7B3" => DATA <= x"3E";
when x"7B4" => DATA <= x"0D";
when x"7B5" => DATA <= x"20";
when x"7B6" => DATA <= x"20";
when x"7B7" => DATA <= x"53";
when x"7B8" => DATA <= x"65";
when x"7B9" => DATA <= x"74";
when x"7BA" => DATA <= x"20";
when x"7BB" => DATA <= x"3C";
when x"7BC" => DATA <= x"73";
when x"7BD" => DATA <= x"74";
when x"7BE" => DATA <= x"61";
when x"7BF" => DATA <= x"72";
when x"7C0" => DATA <= x"74";
when x"7C1" => DATA <= x"20";
when x"7C2" => DATA <= x"61";
when x"7C3" => DATA <= x"64";
when x"7C4" => DATA <= x"64";
when x"7C5" => DATA <= x"72";
when x"7C6" => DATA <= x"65";
when x"7C7" => DATA <= x"73";
when x"7C8" => DATA <= x"73";
when x"7C9" => DATA <= x"3E";
when x"7CA" => DATA <= x"0D";
when x"7CB" => DATA <= x"00";
when x"7CC" => DATA <= x"3E";
when x"7CD" => DATA <= x"02";
when x"7CE" => DATA <= x"CD";
when x"7CF" => DATA <= x"A3";
when x"7D0" => DATA <= x"F6";
when x"7D1" => DATA <= x"CD";
when x"7D2" => DATA <= x"84";
when x"7D3" => DATA <= x"F8";
when x"7D4" => DATA <= x"CD";
when x"7D5" => DATA <= x"9A";
when x"7D6" => DATA <= x"F6";
when x"7D7" => DATA <= x"FE";
when x"7D8" => DATA <= x"80";
when x"7D9" => DATA <= x"28";
when x"7DA" => DATA <= x"04";
when x"7DB" => DATA <= x"D1";
when x"7DC" => DATA <= x"C1";
when x"7DD" => DATA <= x"F1";
when x"7DE" => DATA <= x"C9";
when x"7DF" => DATA <= x"3E";
when x"7E0" => DATA <= x"01";
when x"7E1" => DATA <= x"32";
when x"7E2" => DATA <= x"AF";
when x"7E3" => DATA <= x"FC";
when x"7E4" => DATA <= x"CD";
when x"7E5" => DATA <= x"EB";
when x"7E6" => DATA <= x"F7";
when x"7E7" => DATA <= x"D1";
when x"7E8" => DATA <= x"C1";
when x"7E9" => DATA <= x"F1";
when x"7EA" => DATA <= x"C9";
when x"7EB" => DATA <= x"2A";
when x"7EC" => DATA <= x"A8";
when x"7ED" => DATA <= x"FC";
when x"7EE" => DATA <= x"11";
when x"7EF" => DATA <= x"07";
when x"7F0" => DATA <= x"00";
when x"7F1" => DATA <= x"19";
when x"7F2" => DATA <= x"E5";
when x"7F3" => DATA <= x"7E";
when x"7F4" => DATA <= x"2A";
when x"7F5" => DATA <= x"A8";
when x"7F6" => DATA <= x"FC";
when x"7F7" => DATA <= x"5F";
when x"7F8" => DATA <= x"19";
when x"7F9" => DATA <= x"22";
when x"7FA" => DATA <= x"82";
when x"7FB" => DATA <= x"FF";
when x"7FC" => DATA <= x"7E";
when x"7FD" => DATA <= x"11";
when x"7FE" => DATA <= x"22";
when x"7FF" => DATA <= x"FF";
when x"800" => DATA <= x"06";
when x"801" => DATA <= x"04";
when x"802" => DATA <= x"1A";
when x"803" => DATA <= x"BE";
when x"804" => DATA <= x"20";
when x"805" => DATA <= x"20";
when x"806" => DATA <= x"23";
when x"807" => DATA <= x"13";
when x"808" => DATA <= x"10";
when x"809" => DATA <= x"F8";
when x"80A" => DATA <= x"E1";
when x"80B" => DATA <= x"2B";
when x"80C" => DATA <= x"3A";
when x"80D" => DATA <= x"AF";
when x"80E" => DATA <= x"FC";
when x"80F" => DATA <= x"B7";
when x"810" => DATA <= x"20";
when x"811" => DATA <= x"17";
when x"812" => DATA <= x"7E";
when x"813" => DATA <= x"E6";
when x"814" => DATA <= x"4F";
when x"815" => DATA <= x"FE";
when x"816" => DATA <= x"40";
when x"817" => DATA <= x"38";
when x"818" => DATA <= x"09";
when x"819" => DATA <= x"FE";
when x"81A" => DATA <= x"48";
when x"81B" => DATA <= x"20";
when x"81C" => DATA <= x"05";
when x"81D" => DATA <= x"BF";
when x"81E" => DATA <= x"2A";
when x"81F" => DATA <= x"A8";
when x"820" => DATA <= x"FC";
when x"821" => DATA <= x"E9";
when x"822" => DATA <= x"BF";
when x"823" => DATA <= x"C3";
when x"824" => DATA <= x"A9";
when x"825" => DATA <= x"F4";
when x"826" => DATA <= x"E1";
when x"827" => DATA <= x"18";
when x"828" => DATA <= x"F4";
when x"829" => DATA <= x"AF";
when x"82A" => DATA <= x"32";
when x"82B" => DATA <= x"AF";
when x"82C" => DATA <= x"FC";
when x"82D" => DATA <= x"7E";
when x"82E" => DATA <= x"E6";
when x"82F" => DATA <= x"4F";
when x"830" => DATA <= x"FE";
when x"831" => DATA <= x"40";
when x"832" => DATA <= x"38";
when x"833" => DATA <= x"09";
when x"834" => DATA <= x"FE";
when x"835" => DATA <= x"48";
when x"836" => DATA <= x"20";
when x"837" => DATA <= x"1E";
when x"838" => DATA <= x"3E";
when x"839" => DATA <= x"01";
when x"83A" => DATA <= x"18";
when x"83B" => DATA <= x"E1";
when x"83C" => DATA <= x"00";
when x"83D" => DATA <= x"FF";
when x"83E" => DATA <= x"F9";
when x"83F" => DATA <= x"54";
when x"840" => DATA <= x"68";
when x"841" => DATA <= x"69";
when x"842" => DATA <= x"73";
when x"843" => DATA <= x"20";
when x"844" => DATA <= x"69";
when x"845" => DATA <= x"73";
when x"846" => DATA <= x"20";
when x"847" => DATA <= x"6E";
when x"848" => DATA <= x"6F";
when x"849" => DATA <= x"74";
when x"84A" => DATA <= x"20";
when x"84B" => DATA <= x"61";
when x"84C" => DATA <= x"20";
when x"84D" => DATA <= x"6C";
when x"84E" => DATA <= x"61";
when x"84F" => DATA <= x"6E";
when x"850" => DATA <= x"67";
when x"851" => DATA <= x"75";
when x"852" => DATA <= x"61";
when x"853" => DATA <= x"67";
when x"854" => DATA <= x"65";
when x"855" => DATA <= x"00";
when x"856" => DATA <= x"FF";
when x"857" => DATA <= x"F9";
when x"858" => DATA <= x"54";
when x"859" => DATA <= x"68";
when x"85A" => DATA <= x"69";
when x"85B" => DATA <= x"73";
when x"85C" => DATA <= x"20";
when x"85D" => DATA <= x"69";
when x"85E" => DATA <= x"73";
when x"85F" => DATA <= x"20";
when x"860" => DATA <= x"6E";
when x"861" => DATA <= x"6F";
when x"862" => DATA <= x"74";
when x"863" => DATA <= x"20";
when x"864" => DATA <= x"5A";
when x"865" => DATA <= x"38";
when x"866" => DATA <= x"30";
when x"867" => DATA <= x"20";
when x"868" => DATA <= x"63";
when x"869" => DATA <= x"6F";
when x"86A" => DATA <= x"64";
when x"86B" => DATA <= x"65";
when x"86C" => DATA <= x"00";
when x"86D" => DATA <= x"E6";
when x"86E" => DATA <= x"DF";
when x"86F" => DATA <= x"FE";
when x"870" => DATA <= x"41";
when x"871" => DATA <= x"D8";
when x"872" => DATA <= x"FE";
when x"873" => DATA <= x"5B";
when x"874" => DATA <= x"3F";
when x"875" => DATA <= x"C9";
when x"876" => DATA <= x"13";
when x"877" => DATA <= x"1A";
when x"878" => DATA <= x"FE";
when x"879" => DATA <= x"20";
when x"87A" => DATA <= x"28";
when x"87B" => DATA <= x"FA";
when x"87C" => DATA <= x"C9";
when x"87D" => DATA <= x"13";
when x"87E" => DATA <= x"1A";
when x"87F" => DATA <= x"FE";
when x"880" => DATA <= x"2A";
when x"881" => DATA <= x"28";
when x"882" => DATA <= x"FA";
when x"883" => DATA <= x"C9";
when x"884" => DATA <= x"7E";
when x"885" => DATA <= x"CD";
when x"886" => DATA <= x"A3";
when x"887" => DATA <= x"F6";
when x"888" => DATA <= x"23";
when x"889" => DATA <= x"FE";
when x"88A" => DATA <= x"0D";
when x"88B" => DATA <= x"20";
when x"88C" => DATA <= x"F7";
when x"88D" => DATA <= x"C9";
when x"88E" => DATA <= x"FE";
when x"88F" => DATA <= x"80";
when x"890" => DATA <= x"30";
when x"891" => DATA <= x"15";
when x"892" => DATA <= x"F5";
when x"893" => DATA <= x"3E";
when x"894" => DATA <= x"04";
when x"895" => DATA <= x"CD";
when x"896" => DATA <= x"A3";
when x"897" => DATA <= x"F6";
when x"898" => DATA <= x"7D";
when x"899" => DATA <= x"CD";
when x"89A" => DATA <= x"A3";
when x"89B" => DATA <= x"F6";
when x"89C" => DATA <= x"F1";
when x"89D" => DATA <= x"F5";
when x"89E" => DATA <= x"CD";
when x"89F" => DATA <= x"A3";
when x"8A0" => DATA <= x"F6";
when x"8A1" => DATA <= x"CD";
when x"8A2" => DATA <= x"9A";
when x"8A3" => DATA <= x"F6";
when x"8A4" => DATA <= x"6F";
when x"8A5" => DATA <= x"F1";
when x"8A6" => DATA <= x"C9";
when x"8A7" => DATA <= x"FE";
when x"8A8" => DATA <= x"82";
when x"8A9" => DATA <= x"28";
when x"8AA" => DATA <= x"31";
when x"8AB" => DATA <= x"FE";
when x"8AC" => DATA <= x"83";
when x"8AD" => DATA <= x"28";
when x"8AE" => DATA <= x"31";
when x"8AF" => DATA <= x"FE";
when x"8B0" => DATA <= x"84";
when x"8B1" => DATA <= x"28";
when x"8B2" => DATA <= x"31";
when x"8B3" => DATA <= x"F5";
when x"8B4" => DATA <= x"3E";
when x"8B5" => DATA <= x"06";
when x"8B6" => DATA <= x"CD";
when x"8B7" => DATA <= x"A3";
when x"8B8" => DATA <= x"F6";
when x"8B9" => DATA <= x"7D";
when x"8BA" => DATA <= x"CD";
when x"8BB" => DATA <= x"A3";
when x"8BC" => DATA <= x"F6";
when x"8BD" => DATA <= x"7C";
when x"8BE" => DATA <= x"CD";
when x"8BF" => DATA <= x"A3";
when x"8C0" => DATA <= x"F6";
when x"8C1" => DATA <= x"F1";
when x"8C2" => DATA <= x"F5";
when x"8C3" => DATA <= x"CD";
when x"8C4" => DATA <= x"A3";
when x"8C5" => DATA <= x"F6";
when x"8C6" => DATA <= x"FE";
when x"8C7" => DATA <= x"9D";
when x"8C8" => DATA <= x"28";
when x"8C9" => DATA <= x"10";
when x"8CA" => DATA <= x"CD";
when x"8CB" => DATA <= x"9A";
when x"8CC" => DATA <= x"F6";
when x"8CD" => DATA <= x"6F";
when x"8CE" => DATA <= x"F1";
when x"8CF" => DATA <= x"CB";
when x"8D0" => DATA <= x"25";
when x"8D1" => DATA <= x"F5";
when x"8D2" => DATA <= x"CD";
when x"8D3" => DATA <= x"9A";
when x"8D4" => DATA <= x"F6";
when x"8D5" => DATA <= x"67";
when x"8D6" => DATA <= x"CD";
when x"8D7" => DATA <= x"9A";
when x"8D8" => DATA <= x"F6";
when x"8D9" => DATA <= x"6F";
when x"8DA" => DATA <= x"F1";
when x"8DB" => DATA <= x"C9";
when x"8DC" => DATA <= x"21";
when x"8DD" => DATA <= x"00";
when x"8DE" => DATA <= x"00";
when x"8DF" => DATA <= x"C9";
when x"8E0" => DATA <= x"21";
when x"8E1" => DATA <= x"03";
when x"8E2" => DATA <= x"3B";
when x"8E3" => DATA <= x"C9";
when x"8E4" => DATA <= x"21";
when x"8E5" => DATA <= x"00";
when x"8E6" => DATA <= x"DC";
when x"8E7" => DATA <= x"C9";
when x"8E8" => DATA <= x"F5";
when x"8E9" => DATA <= x"3E";
when x"8EA" => DATA <= x"01";
when x"8EB" => DATA <= x"32";
when x"8EC" => DATA <= x"A4";
when x"8ED" => DATA <= x"FC";
when x"8EE" => DATA <= x"F1";
when x"8EF" => DATA <= x"B7";
when x"8F0" => DATA <= x"28";
when x"8F1" => DATA <= x"6B";
when x"8F2" => DATA <= x"C5";
when x"8F3" => DATA <= x"E5";
when x"8F4" => DATA <= x"DD";
when x"8F5" => DATA <= x"E5";
when x"8F6" => DATA <= x"F5";
when x"8F7" => DATA <= x"3E";
when x"8F8" => DATA <= x"08";
when x"8F9" => DATA <= x"CD";
when x"8FA" => DATA <= x"A3";
when x"8FB" => DATA <= x"F6";
when x"8FC" => DATA <= x"F1";
when x"8FD" => DATA <= x"F5";
when x"8FE" => DATA <= x"CD";
when x"8FF" => DATA <= x"A3";
when x"900" => DATA <= x"F6";
when x"901" => DATA <= x"06";
when x"902" => DATA <= x"00";
when x"903" => DATA <= x"4F";
when x"904" => DATA <= x"FE";
when x"905" => DATA <= x"80";
when x"906" => DATA <= x"38";
when x"907" => DATA <= x"06";
when x"908" => DATA <= x"46";
when x"909" => DATA <= x"23";
when x"90A" => DATA <= x"4E";
when x"90B" => DATA <= x"2B";
when x"90C" => DATA <= x"18";
when x"90D" => DATA <= x"15";
when x"90E" => DATA <= x"FE";
when x"90F" => DATA <= x"15";
when x"910" => DATA <= x"38";
when x"911" => DATA <= x"05";
when x"912" => DATA <= x"01";
when x"913" => DATA <= x"10";
when x"914" => DATA <= x"10";
when x"915" => DATA <= x"18";
when x"916" => DATA <= x"0C";
when x"917" => DATA <= x"DD";
when x"918" => DATA <= x"21";
when x"919" => DATA <= x"75";
when x"91A" => DATA <= x"FC";
when x"91B" => DATA <= x"DD";
when x"91C" => DATA <= x"09";
when x"91D" => DATA <= x"DD";
when x"91E" => DATA <= x"46";
when x"91F" => DATA <= x"FF";
when x"920" => DATA <= x"DD";
when x"921" => DATA <= x"4E";
when x"922" => DATA <= x"13";
when x"923" => DATA <= x"E5";
when x"924" => DATA <= x"C5";
when x"925" => DATA <= x"48";
when x"926" => DATA <= x"06";
when x"927" => DATA <= x"00";
when x"928" => DATA <= x"09";
when x"929" => DATA <= x"C1";
when x"92A" => DATA <= x"78";
when x"92B" => DATA <= x"CD";
when x"92C" => DATA <= x"A3";
when x"92D" => DATA <= x"F6";
when x"92E" => DATA <= x"B7";
when x"92F" => DATA <= x"28";
when x"930" => DATA <= x"07";
when x"931" => DATA <= x"2B";
when x"932" => DATA <= x"7E";
when x"933" => DATA <= x"CD";
when x"934" => DATA <= x"A3";
when x"935" => DATA <= x"F6";
when x"936" => DATA <= x"10";
when x"937" => DATA <= x"F9";
when x"938" => DATA <= x"79";
when x"939" => DATA <= x"CD";
when x"93A" => DATA <= x"A3";
when x"93B" => DATA <= x"F6";
when x"93C" => DATA <= x"E1";
when x"93D" => DATA <= x"F5";
when x"93E" => DATA <= x"3A";
when x"93F" => DATA <= x"A4";
when x"940" => DATA <= x"FC";
when x"941" => DATA <= x"B7";
when x"942" => DATA <= x"28";
when x"943" => DATA <= x"06";
when x"944" => DATA <= x"62";
when x"945" => DATA <= x"6B";
when x"946" => DATA <= x"AF";
when x"947" => DATA <= x"32";
when x"948" => DATA <= x"A4";
when x"949" => DATA <= x"FC";
when x"94A" => DATA <= x"F1";
when x"94B" => DATA <= x"B7";
when x"94C" => DATA <= x"28";
when x"94D" => DATA <= x"09";
when x"94E" => DATA <= x"09";
when x"94F" => DATA <= x"41";
when x"950" => DATA <= x"2B";
when x"951" => DATA <= x"CD";
when x"952" => DATA <= x"9A";
when x"953" => DATA <= x"F6";
when x"954" => DATA <= x"77";
when x"955" => DATA <= x"10";
when x"956" => DATA <= x"F9";
when x"957" => DATA <= x"F1";
when x"958" => DATA <= x"DD";
when x"959" => DATA <= x"E1";
when x"95A" => DATA <= x"E1";
when x"95B" => DATA <= x"C1";
when x"95C" => DATA <= x"C9";
when x"95D" => DATA <= x"C5";
when x"95E" => DATA <= x"F5";
when x"95F" => DATA <= x"3E";
when x"960" => DATA <= x"0A";
when x"961" => DATA <= x"CD";
when x"962" => DATA <= x"A3";
when x"963" => DATA <= x"F6";
when x"964" => DATA <= x"23";
when x"965" => DATA <= x"23";
when x"966" => DATA <= x"23";
when x"967" => DATA <= x"23";
when x"968" => DATA <= x"06";
when x"969" => DATA <= x"03";
when x"96A" => DATA <= x"7E";
when x"96B" => DATA <= x"CD";
when x"96C" => DATA <= x"A3";
when x"96D" => DATA <= x"F6";
when x"96E" => DATA <= x"2B";
when x"96F" => DATA <= x"10";
when x"970" => DATA <= x"F9";
when x"971" => DATA <= x"3E";
when x"972" => DATA <= x"07";
when x"973" => DATA <= x"CD";
when x"974" => DATA <= x"A3";
when x"975" => DATA <= x"F6";
when x"976" => DATA <= x"97";
when x"977" => DATA <= x"CD";
when x"978" => DATA <= x"A3";
when x"979" => DATA <= x"F6";
when x"97A" => DATA <= x"CD";
when x"97B" => DATA <= x"9A";
when x"97C" => DATA <= x"F6";
when x"97D" => DATA <= x"07";
when x"97E" => DATA <= x"38";
when x"97F" => DATA <= x"18";
when x"980" => DATA <= x"7E";
when x"981" => DATA <= x"2B";
when x"982" => DATA <= x"6E";
when x"983" => DATA <= x"67";
when x"984" => DATA <= x"06";
when x"985" => DATA <= x"FF";
when x"986" => DATA <= x"CD";
when x"987" => DATA <= x"9A";
when x"988" => DATA <= x"F6";
when x"989" => DATA <= x"77";
when x"98A" => DATA <= x"23";
when x"98B" => DATA <= x"04";
when x"98C" => DATA <= x"FE";
when x"98D" => DATA <= x"0D";
when x"98E" => DATA <= x"20";
when x"98F" => DATA <= x"F6";
when x"990" => DATA <= x"2E";
when x"991" => DATA <= x"00";
when x"992" => DATA <= x"60";
when x"993" => DATA <= x"F1";
when x"994" => DATA <= x"C1";
when x"995" => DATA <= x"37";
when x"996" => DATA <= x"3F";
when x"997" => DATA <= x"C9";
when x"998" => DATA <= x"21";
when x"999" => DATA <= x"FF";
when x"99A" => DATA <= x"00";
when x"99B" => DATA <= x"F1";
when x"99C" => DATA <= x"C1";
when x"99D" => DATA <= x"37";
when x"99E" => DATA <= x"C9";
when x"99F" => DATA <= x"E5";
when x"9A0" => DATA <= x"D5";
when x"9A1" => DATA <= x"C5";
when x"9A2" => DATA <= x"F5";
when x"9A3" => DATA <= x"3E";
when x"9A4" => DATA <= x"0C";
when x"9A5" => DATA <= x"CD";
when x"9A6" => DATA <= x"A3";
when x"9A7" => DATA <= x"F6";
when x"9A8" => DATA <= x"7B";
when x"9A9" => DATA <= x"CD";
when x"9AA" => DATA <= x"A3";
when x"9AB" => DATA <= x"F6";
when x"9AC" => DATA <= x"23";
when x"9AD" => DATA <= x"23";
when x"9AE" => DATA <= x"23";
when x"9AF" => DATA <= x"06";
when x"9B0" => DATA <= x"04";
when x"9B1" => DATA <= x"7E";
when x"9B2" => DATA <= x"CD";
when x"9B3" => DATA <= x"A3";
when x"9B4" => DATA <= x"F6";
when x"9B5" => DATA <= x"2B";
when x"9B6" => DATA <= x"10";
when x"9B7" => DATA <= x"F9";
when x"9B8" => DATA <= x"23";
when x"9B9" => DATA <= x"F1";
when x"9BA" => DATA <= x"CD";
when x"9BB" => DATA <= x"A3";
when x"9BC" => DATA <= x"F6";
when x"9BD" => DATA <= x"CD";
when x"9BE" => DATA <= x"9A";
when x"9BF" => DATA <= x"F6";
when x"9C0" => DATA <= x"F5";
when x"9C1" => DATA <= x"23";
when x"9C2" => DATA <= x"23";
when x"9C3" => DATA <= x"23";
when x"9C4" => DATA <= x"06";
when x"9C5" => DATA <= x"04";
when x"9C6" => DATA <= x"CD";
when x"9C7" => DATA <= x"9A";
when x"9C8" => DATA <= x"F6";
when x"9C9" => DATA <= x"77";
when x"9CA" => DATA <= x"2B";
when x"9CB" => DATA <= x"10";
when x"9CC" => DATA <= x"F9";
when x"9CD" => DATA <= x"F1";
when x"9CE" => DATA <= x"C1";
when x"9CF" => DATA <= x"D1";
when x"9D0" => DATA <= x"E1";
when x"9D1" => DATA <= x"C9";
when x"9D2" => DATA <= x"F5";
when x"9D3" => DATA <= x"3E";
when x"9D4" => DATA <= x"12";
when x"9D5" => DATA <= x"CD";
when x"9D6" => DATA <= x"A3";
when x"9D7" => DATA <= x"F6";
when x"9D8" => DATA <= x"F1";
when x"9D9" => DATA <= x"CD";
when x"9DA" => DATA <= x"A3";
when x"9DB" => DATA <= x"F6";
when x"9DC" => DATA <= x"FE";
when x"9DD" => DATA <= x"00";
when x"9DE" => DATA <= x"20";
when x"9DF" => DATA <= x"0A";
when x"9E0" => DATA <= x"F5";
when x"9E1" => DATA <= x"7C";
when x"9E2" => DATA <= x"CD";
when x"9E3" => DATA <= x"A3";
when x"9E4" => DATA <= x"F6";
when x"9E5" => DATA <= x"CD";
when x"9E6" => DATA <= x"9A";
when x"9E7" => DATA <= x"F6";
when x"9E8" => DATA <= x"F1";
when x"9E9" => DATA <= x"C9";
when x"9EA" => DATA <= x"CD";
when x"9EB" => DATA <= x"84";
when x"9EC" => DATA <= x"F8";
when x"9ED" => DATA <= x"C3";
when x"9EE" => DATA <= x"9A";
when x"9EF" => DATA <= x"F6";
when x"9F0" => DATA <= x"3E";
when x"9F1" => DATA <= x"0E";
when x"9F2" => DATA <= x"CD";
when x"9F3" => DATA <= x"A3";
when x"9F4" => DATA <= x"F6";
when x"9F5" => DATA <= x"7C";
when x"9F6" => DATA <= x"CD";
when x"9F7" => DATA <= x"A3";
when x"9F8" => DATA <= x"F6";
when x"9F9" => DATA <= x"C3";
when x"9FA" => DATA <= x"95";
when x"9FB" => DATA <= x"F6";
when x"9FC" => DATA <= x"F5";
when x"9FD" => DATA <= x"3E";
when x"9FE" => DATA <= x"10";
when x"9FF" => DATA <= x"CD";
when x"A00" => DATA <= x"A3";
when x"A01" => DATA <= x"F6";
when x"A02" => DATA <= x"7C";
when x"A03" => DATA <= x"CD";
when x"A04" => DATA <= x"A3";
when x"A05" => DATA <= x"F6";
when x"A06" => DATA <= x"F1";
when x"A07" => DATA <= x"CD";
when x"A08" => DATA <= x"A3";
when x"A09" => DATA <= x"F6";
when x"A0A" => DATA <= x"F5";
when x"A0B" => DATA <= x"CD";
when x"A0C" => DATA <= x"9A";
when x"A0D" => DATA <= x"F6";
when x"A0E" => DATA <= x"F1";
when x"A0F" => DATA <= x"C9";
when x"A10" => DATA <= x"C5";
when x"A11" => DATA <= x"F5";
when x"A12" => DATA <= x"22";
when x"A13" => DATA <= x"AC";
when x"A14" => DATA <= x"FC";
when x"A15" => DATA <= x"3E";
when x"A16" => DATA <= x"14";
when x"A17" => DATA <= x"CD";
when x"A18" => DATA <= x"A3";
when x"A19" => DATA <= x"F6";
when x"A1A" => DATA <= x"01";
when x"A1B" => DATA <= x"11";
when x"A1C" => DATA <= x"00";
when x"A1D" => DATA <= x"09";
when x"A1E" => DATA <= x"06";
when x"A1F" => DATA <= x"10";
when x"A20" => DATA <= x"7E";
when x"A21" => DATA <= x"CD";
when x"A22" => DATA <= x"A3";
when x"A23" => DATA <= x"F6";
when x"A24" => DATA <= x"2B";
when x"A25" => DATA <= x"10";
when x"A26" => DATA <= x"F9";
when x"A27" => DATA <= x"7E";
when x"A28" => DATA <= x"2B";
when x"A29" => DATA <= x"6E";
when x"A2A" => DATA <= x"67";
when x"A2B" => DATA <= x"CD";
when x"A2C" => DATA <= x"84";
when x"A2D" => DATA <= x"F8";
when x"A2E" => DATA <= x"F1";
when x"A2F" => DATA <= x"CD";
when x"A30" => DATA <= x"A3";
when x"A31" => DATA <= x"F6";
when x"A32" => DATA <= x"CD";
when x"A33" => DATA <= x"9A";
when x"A34" => DATA <= x"F6";
when x"A35" => DATA <= x"E6";
when x"A36" => DATA <= x"FF";
when x"A37" => DATA <= x"F5";
when x"A38" => DATA <= x"2A";
when x"A39" => DATA <= x"AC";
when x"A3A" => DATA <= x"FC";
when x"A3B" => DATA <= x"01";
when x"A3C" => DATA <= x"11";
when x"A3D" => DATA <= x"00";
when x"A3E" => DATA <= x"09";
when x"A3F" => DATA <= x"06";
when x"A40" => DATA <= x"10";
when x"A41" => DATA <= x"CD";
when x"A42" => DATA <= x"9A";
when x"A43" => DATA <= x"F6";
when x"A44" => DATA <= x"77";
when x"A45" => DATA <= x"2B";
when x"A46" => DATA <= x"10";
when x"A47" => DATA <= x"F9";
when x"A48" => DATA <= x"2A";
when x"A49" => DATA <= x"AC";
when x"A4A" => DATA <= x"FC";
when x"A4B" => DATA <= x"F1";
when x"A4C" => DATA <= x"C1";
when x"A4D" => DATA <= x"C9";
when x"A4E" => DATA <= x"C5";
when x"A4F" => DATA <= x"F5";
when x"A50" => DATA <= x"22";
when x"A51" => DATA <= x"AC";
when x"A52" => DATA <= x"FC";
when x"A53" => DATA <= x"3E";
when x"A54" => DATA <= x"16";
when x"A55" => DATA <= x"CD";
when x"A56" => DATA <= x"A3";
when x"A57" => DATA <= x"F6";
when x"A58" => DATA <= x"01";
when x"A59" => DATA <= x"0C";
when x"A5A" => DATA <= x"00";
when x"A5B" => DATA <= x"09";
when x"A5C" => DATA <= x"06";
when x"A5D" => DATA <= x"0D";
when x"A5E" => DATA <= x"7E";
when x"A5F" => DATA <= x"CD";
when x"A60" => DATA <= x"A3";
when x"A61" => DATA <= x"F6";
when x"A62" => DATA <= x"2B";
when x"A63" => DATA <= x"10";
when x"A64" => DATA <= x"F9";
when x"A65" => DATA <= x"F1";
when x"A66" => DATA <= x"CD";
when x"A67" => DATA <= x"A3";
when x"A68" => DATA <= x"F6";
when x"A69" => DATA <= x"2A";
when x"A6A" => DATA <= x"AC";
when x"A6B" => DATA <= x"FC";
when x"A6C" => DATA <= x"01";
when x"A6D" => DATA <= x"0C";
when x"A6E" => DATA <= x"00";
when x"A6F" => DATA <= x"09";
when x"A70" => DATA <= x"06";
when x"A71" => DATA <= x"0D";
when x"A72" => DATA <= x"CD";
when x"A73" => DATA <= x"9A";
when x"A74" => DATA <= x"F6";
when x"A75" => DATA <= x"77";
when x"A76" => DATA <= x"2B";
when x"A77" => DATA <= x"10";
when x"A78" => DATA <= x"F9";
when x"A79" => DATA <= x"2A";
when x"A7A" => DATA <= x"AC";
when x"A7B" => DATA <= x"FC";
when x"A7C" => DATA <= x"C1";
when x"A7D" => DATA <= x"C3";
when x"A7E" => DATA <= x"95";
when x"A7F" => DATA <= x"F6";
when x"A80" => DATA <= x"00";
when x"A81" => DATA <= x"00";
when x"A82" => DATA <= x"ED";
when x"A83" => DATA <= x"73";
when x"A84" => DATA <= x"80";
when x"A85" => DATA <= x"FA";
when x"A86" => DATA <= x"31";
when x"A87" => DATA <= x"60";
when x"A88" => DATA <= x"FF";
when x"A89" => DATA <= x"CD";
when x"A8A" => DATA <= x"93";
when x"A8B" => DATA <= x"FA";
when x"A8C" => DATA <= x"ED";
when x"A8D" => DATA <= x"7B";
when x"A8E" => DATA <= x"80";
when x"A8F" => DATA <= x"FA";
when x"A90" => DATA <= x"FB";
when x"A91" => DATA <= x"ED";
when x"A92" => DATA <= x"4D";
when x"A93" => DATA <= x"F5";
when x"A94" => DATA <= x"DB";
when x"A95" => DATA <= x"06";
when x"A96" => DATA <= x"CB";
when x"A97" => DATA <= x"7F";
when x"A98" => DATA <= x"20";
when x"A99" => DATA <= x"71";
when x"A9A" => DATA <= x"DB";
when x"A9B" => DATA <= x"00";
when x"A9C" => DATA <= x"CB";
when x"A9D" => DATA <= x"7F";
when x"A9E" => DATA <= x"20";
when x"A9F" => DATA <= x"39";
when x"AA0" => DATA <= x"F1";
when x"AA1" => DATA <= x"C3";
when x"AA2" => DATA <= x"B0";
when x"AA3" => DATA <= x"FF";
when x"AA4" => DATA <= x"E1";
when x"AA5" => DATA <= x"22";
when x"AA6" => DATA <= x"82";
when x"AA7" => DATA <= x"FF";
when x"AA8" => DATA <= x"2A";
when x"AA9" => DATA <= x"FA";
when x"AAA" => DATA <= x"FF";
when x"AAB" => DATA <= x"E9";
when x"AAC" => DATA <= x"CD";
when x"AAD" => DATA <= x"C6";
when x"AAE" => DATA <= x"FA";
when x"AAF" => DATA <= x"C3";
when x"AB0" => DATA <= x"CB";
when x"AB1" => DATA <= x"F2";
when x"AB2" => DATA <= x"3E";
when x"AB3" => DATA <= x"03";
when x"AB4" => DATA <= x"2E";
when x"AB5" => DATA <= x"00";
when x"AB6" => DATA <= x"CD";
when x"AB7" => DATA <= x"8E";
when x"AB8" => DATA <= x"F8";
when x"AB9" => DATA <= x"3E";
when x"ABA" => DATA <= x"02";
when x"ABB" => DATA <= x"2E";
when x"ABC" => DATA <= x"02";
when x"ABD" => DATA <= x"CD";
when x"ABE" => DATA <= x"8E";
when x"ABF" => DATA <= x"F8";
when x"AC0" => DATA <= x"CD";
when x"AC1" => DATA <= x"C6";
when x"AC2" => DATA <= x"FA";
when x"AC3" => DATA <= x"C3";
when x"AC4" => DATA <= x"00";
when x"AC5" => DATA <= x"00";
when x"AC6" => DATA <= x"2A";
when x"AC7" => DATA <= x"82";
when x"AC8" => DATA <= x"FF";
when x"AC9" => DATA <= x"3E";
when x"ACA" => DATA <= x"0D";
when x"ACB" => DATA <= x"CD";
when x"ACC" => DATA <= x"71";
when x"ACD" => DATA <= x"F6";
when x"ACE" => DATA <= x"3E";
when x"ACF" => DATA <= x"0A";
when x"AD0" => DATA <= x"CD";
when x"AD1" => DATA <= x"71";
when x"AD2" => DATA <= x"F6";
when x"AD3" => DATA <= x"23";
when x"AD4" => DATA <= x"7E";
when x"AD5" => DATA <= x"B7";
when x"AD6" => DATA <= x"20";
when x"AD7" => DATA <= x"F8";
when x"AD8" => DATA <= x"C9";
when x"AD9" => DATA <= x"DB";
when x"ADA" => DATA <= x"01";
when x"ADB" => DATA <= x"CB";
when x"ADC" => DATA <= x"7F";
when x"ADD" => DATA <= x"20";
when x"ADE" => DATA <= x"25";
when x"ADF" => DATA <= x"3E";
when x"AE0" => DATA <= x"01";
when x"AE1" => DATA <= x"32";
when x"AE2" => DATA <= x"A2";
when x"AE3" => DATA <= x"FC";
when x"AE4" => DATA <= x"E5";
when x"AE5" => DATA <= x"DD";
when x"AE6" => DATA <= x"E5";
when x"AE7" => DATA <= x"CD";
when x"AE8" => DATA <= x"7C";
when x"AE9" => DATA <= x"F6";
when x"AEA" => DATA <= x"67";
when x"AEB" => DATA <= x"CD";
when x"AEC" => DATA <= x"7C";
when x"AED" => DATA <= x"F6";
when x"AEE" => DATA <= x"6F";
when x"AEF" => DATA <= x"CD";
when x"AF0" => DATA <= x"7C";
when x"AF1" => DATA <= x"F6";
when x"AF2" => DATA <= x"CD";
when x"AF3" => DATA <= x"FE";
when x"AF4" => DATA <= x"FA";
when x"AF5" => DATA <= x"AF";
when x"AF6" => DATA <= x"32";
when x"AF7" => DATA <= x"A2";
when x"AF8" => DATA <= x"FC";
when x"AF9" => DATA <= x"DD";
when x"AFA" => DATA <= x"E1";
when x"AFB" => DATA <= x"E1";
when x"AFC" => DATA <= x"F1";
when x"AFD" => DATA <= x"C9";
when x"AFE" => DATA <= x"DD";
when x"AFF" => DATA <= x"2A";
when x"B00" => DATA <= x"FC";
when x"B01" => DATA <= x"FF";
when x"B02" => DATA <= x"DD";
when x"B03" => DATA <= x"E9";
when x"B04" => DATA <= x"CB";
when x"B05" => DATA <= x"27";
when x"B06" => DATA <= x"32";
when x"B07" => DATA <= x"80";
when x"B08" => DATA <= x"FF";
when x"B09" => DATA <= x"F1";
when x"B0A" => DATA <= x"C9";
when x"B0B" => DATA <= x"DB";
when x"B0C" => DATA <= x"07";
when x"B0D" => DATA <= x"CB";
when x"B0E" => DATA <= x"7F";
when x"B0F" => DATA <= x"28";
when x"B10" => DATA <= x"45";
when x"B11" => DATA <= x"DB";
when x"B12" => DATA <= x"02";
when x"B13" => DATA <= x"CB";
when x"B14" => DATA <= x"7F";
when x"B15" => DATA <= x"28";
when x"B16" => DATA <= x"FA";
when x"B17" => DATA <= x"DB";
when x"B18" => DATA <= x"03";
when x"B19" => DATA <= x"FB";
when x"B1A" => DATA <= x"21";
when x"B1B" => DATA <= x"B0";
when x"B1C" => DATA <= x"FC";
when x"B1D" => DATA <= x"36";
when x"B1E" => DATA <= x"CD";
when x"B1F" => DATA <= x"23";
when x"B20" => DATA <= x"3A";
when x"B21" => DATA <= x"BD";
when x"B22" => DATA <= x"FF";
when x"B23" => DATA <= x"77";
when x"B24" => DATA <= x"23";
when x"B25" => DATA <= x"3A";
when x"B26" => DATA <= x"BE";
when x"B27" => DATA <= x"FF";
when x"B28" => DATA <= x"77";
when x"B29" => DATA <= x"23";
when x"B2A" => DATA <= x"CD";
when x"B2B" => DATA <= x"9A";
when x"B2C" => DATA <= x"F6";
when x"B2D" => DATA <= x"77";
when x"B2E" => DATA <= x"B7";
when x"B2F" => DATA <= x"20";
when x"B30" => DATA <= x"1A";
when x"B31" => DATA <= x"CD";
when x"B32" => DATA <= x"0E";
when x"B33" => DATA <= x"F6";
when x"B34" => DATA <= x"0D";
when x"B35" => DATA <= x"46";
when x"B36" => DATA <= x"61";
when x"B37" => DATA <= x"74";
when x"B38" => DATA <= x"61";
when x"B39" => DATA <= x"6C";
when x"B3A" => DATA <= x"20";
when x"B3B" => DATA <= x"65";
when x"B3C" => DATA <= x"72";
when x"B3D" => DATA <= x"72";
when x"B3E" => DATA <= x"6F";
when x"B3F" => DATA <= x"72";
when x"B40" => DATA <= x"00";
when x"B41" => DATA <= x"3A";
when x"B42" => DATA <= x"A3";
when x"B43" => DATA <= x"FC";
when x"B44" => DATA <= x"B7";
when x"B45" => DATA <= x"C2";
when x"B46" => DATA <= x"00";
when x"B47" => DATA <= x"00";
when x"B48" => DATA <= x"C3";
when x"B49" => DATA <= x"CB";
when x"B4A" => DATA <= x"F2";
when x"B4B" => DATA <= x"23";
when x"B4C" => DATA <= x"CD";
when x"B4D" => DATA <= x"9A";
when x"B4E" => DATA <= x"F6";
when x"B4F" => DATA <= x"77";
when x"B50" => DATA <= x"B7";
when x"B51" => DATA <= x"20";
when x"B52" => DATA <= x"F8";
when x"B53" => DATA <= x"C3";
when x"B54" => DATA <= x"B0";
when x"B55" => DATA <= x"FC";
when x"B56" => DATA <= x"C5";
when x"B57" => DATA <= x"D5";
when x"B58" => DATA <= x"E5";
when x"B59" => DATA <= x"F5";
when x"B5A" => DATA <= x"07";
when x"B5B" => DATA <= x"5F";
when x"B5C" => DATA <= x"07";
when x"B5D" => DATA <= x"07";
when x"B5E" => DATA <= x"83";
when x"B5F" => DATA <= x"07";
when x"B60" => DATA <= x"5F";
when x"B61" => DATA <= x"16";
when x"B62" => DATA <= x"00";
when x"B63" => DATA <= x"21";
when x"B64" => DATA <= x"C1";
when x"B65" => DATA <= x"FB";
when x"B66" => DATA <= x"19";
when x"B67" => DATA <= x"11";
when x"B68" => DATA <= x"61";
when x"B69" => DATA <= x"FC";
when x"B6A" => DATA <= x"01";
when x"B6B" => DATA <= x"14";
when x"B6C" => DATA <= x"00";
when x"B6D" => DATA <= x"ED";
when x"B6E" => DATA <= x"B0";
when x"B6F" => DATA <= x"CD";
when x"B70" => DATA <= x"AE";
when x"B71" => DATA <= x"F6";
when x"B72" => DATA <= x"F1";
when x"B73" => DATA <= x"FE";
when x"B74" => DATA <= x"05";
when x"B75" => DATA <= x"28";
when x"B76" => DATA <= x"33";
when x"B77" => DATA <= x"F5";
when x"B78" => DATA <= x"CD";
when x"B79" => DATA <= x"AE";
when x"B7A" => DATA <= x"F6";
when x"B7B" => DATA <= x"CD";
when x"B7C" => DATA <= x"AE";
when x"B7D" => DATA <= x"F6";
when x"B7E" => DATA <= x"CD";
when x"B7F" => DATA <= x"AE";
when x"B80" => DATA <= x"F6";
when x"B81" => DATA <= x"67";
when x"B82" => DATA <= x"CD";
when x"B83" => DATA <= x"AE";
when x"B84" => DATA <= x"F6";
when x"B85" => DATA <= x"6F";
when x"B86" => DATA <= x"22";
when x"B87" => DATA <= x"A8";
when x"B88" => DATA <= x"FC";
when x"B89" => DATA <= x"0E";
when x"B8A" => DATA <= x"05";
when x"B8B" => DATA <= x"06";
when x"B8C" => DATA <= x"00";
when x"B8D" => DATA <= x"CD";
when x"B8E" => DATA <= x"AE";
when x"B8F" => DATA <= x"F6";
when x"B90" => DATA <= x"F1";
when x"B91" => DATA <= x"FE";
when x"B92" => DATA <= x"06";
when x"B93" => DATA <= x"38";
when x"B94" => DATA <= x"15";
when x"B95" => DATA <= x"20";
when x"B96" => DATA <= x"1D";
when x"B97" => DATA <= x"DB";
when x"B98" => DATA <= x"04";
when x"B99" => DATA <= x"B7";
when x"B9A" => DATA <= x"F2";
when x"B9B" => DATA <= x"97";
when x"B9C" => DATA <= x"FB";
when x"B9D" => DATA <= x"ED";
when x"B9E" => DATA <= x"A3";
when x"B9F" => DATA <= x"C2";
when x"BA0" => DATA <= x"97";
when x"BA1" => DATA <= x"FB";
when x"BA2" => DATA <= x"DB";
when x"BA3" => DATA <= x"04";
when x"BA4" => DATA <= x"B7";
when x"BA5" => DATA <= x"F2";
when x"BA6" => DATA <= x"A2";
when x"BA7" => DATA <= x"FB";
when x"BA8" => DATA <= x"D3";
when x"BA9" => DATA <= x"05";
when x"BAA" => DATA <= x"E1";
when x"BAB" => DATA <= x"D1";
when x"BAC" => DATA <= x"C1";
when x"BAD" => DATA <= x"3A";
when x"BAE" => DATA <= x"A2";
when x"BAF" => DATA <= x"FC";
when x"BB0" => DATA <= x"B7";
when x"BB1" => DATA <= x"C0";
when x"BB2" => DATA <= x"F1";
when x"BB3" => DATA <= x"C9";
when x"BB4" => DATA <= x"DB";
when x"BB5" => DATA <= x"04";
when x"BB6" => DATA <= x"B7";
when x"BB7" => DATA <= x"F2";
when x"BB8" => DATA <= x"B4";
when x"BB9" => DATA <= x"FB";
when x"BBA" => DATA <= x"ED";
when x"BBB" => DATA <= x"A2";
when x"BBC" => DATA <= x"C2";
when x"BBD" => DATA <= x"B4";
when x"BBE" => DATA <= x"FB";
when x"BBF" => DATA <= x"18";
when x"BC0" => DATA <= x"E9";
when x"BC1" => DATA <= x"E5";
when x"BC2" => DATA <= x"F5";
when x"BC3" => DATA <= x"2A";
when x"BC4" => DATA <= x"A8";
when x"BC5" => DATA <= x"FC";
when x"BC6" => DATA <= x"7E";
when x"BC7" => DATA <= x"D3";
when x"BC8" => DATA <= x"05";
when x"BC9" => DATA <= x"23";
when x"BCA" => DATA <= x"22";
when x"BCB" => DATA <= x"A8";
when x"BCC" => DATA <= x"FC";
when x"BCD" => DATA <= x"F1";
when x"BCE" => DATA <= x"E1";
when x"BCF" => DATA <= x"ED";
when x"BD0" => DATA <= x"45";
when x"BD1" => DATA <= x"3A";
when x"BD2" => DATA <= x"12";
when x"BD3" => DATA <= x"3B";
when x"BD4" => DATA <= x"B7";
when x"BD5" => DATA <= x"E5";
when x"BD6" => DATA <= x"F5";
when x"BD7" => DATA <= x"DB";
when x"BD8" => DATA <= x"05";
when x"BD9" => DATA <= x"2A";
when x"BDA" => DATA <= x"A8";
when x"BDB" => DATA <= x"FC";
when x"BDC" => DATA <= x"77";
when x"BDD" => DATA <= x"23";
when x"BDE" => DATA <= x"22";
when x"BDF" => DATA <= x"A8";
when x"BE0" => DATA <= x"FC";
when x"BE1" => DATA <= x"F1";
when x"BE2" => DATA <= x"E1";
when x"BE3" => DATA <= x"ED";
when x"BE4" => DATA <= x"45";
when x"BE5" => DATA <= x"01";
when x"BE6" => DATA <= x"3B";
when x"BE7" => DATA <= x"EB";
when x"BE8" => DATA <= x"CD";
when x"BE9" => DATA <= x"E5";
when x"BEA" => DATA <= x"F5";
when x"BEB" => DATA <= x"2A";
when x"BEC" => DATA <= x"A8";
when x"BED" => DATA <= x"FC";
when x"BEE" => DATA <= x"7E";
when x"BEF" => DATA <= x"D3";
when x"BF0" => DATA <= x"05";
when x"BF1" => DATA <= x"23";
when x"BF2" => DATA <= x"7E";
when x"BF3" => DATA <= x"D3";
when x"BF4" => DATA <= x"05";
when x"BF5" => DATA <= x"23";
when x"BF6" => DATA <= x"22";
when x"BF7" => DATA <= x"A8";
when x"BF8" => DATA <= x"FC";
when x"BF9" => DATA <= x"F1";
when x"BFA" => DATA <= x"E1";
when x"BFB" => DATA <= x"ED";
when x"BFC" => DATA <= x"45";
when x"BFD" => DATA <= x"E5";
when x"BFE" => DATA <= x"F5";
when x"BFF" => DATA <= x"DB";
when x"C00" => DATA <= x"05";
when x"C01" => DATA <= x"2A";
when x"C02" => DATA <= x"A8";
when x"C03" => DATA <= x"FC";
when x"C04" => DATA <= x"77";
when x"C05" => DATA <= x"23";
when x"C06" => DATA <= x"DB";
when x"C07" => DATA <= x"05";
when x"C08" => DATA <= x"77";
when x"C09" => DATA <= x"23";
when x"C0A" => DATA <= x"22";
when x"C0B" => DATA <= x"A8";
when x"C0C" => DATA <= x"FC";
when x"C0D" => DATA <= x"F1";
when x"C0E" => DATA <= x"E1";
when x"C0F" => DATA <= x"ED";
when x"C10" => DATA <= x"45";
when x"C11" => DATA <= x"D3";
when x"C12" => DATA <= x"05";
when x"C13" => DATA <= x"ED";
when x"C14" => DATA <= x"45";
when x"C15" => DATA <= x"23";
when x"C16" => DATA <= x"56";
when x"C17" => DATA <= x"2B";
when x"C18" => DATA <= x"C9";
when x"C19" => DATA <= x"2A";
when x"C1A" => DATA <= x"A0";
when x"C1B" => DATA <= x"3C";
when x"C1C" => DATA <= x"19";
when x"C1D" => DATA <= x"23";
when x"C1E" => DATA <= x"23";
when x"C1F" => DATA <= x"5E";
when x"C20" => DATA <= x"23";
when x"C21" => DATA <= x"56";
when x"C22" => DATA <= x"2B";
when x"C23" => DATA <= x"C9";
when x"C24" => DATA <= x"2A";
when x"C25" => DATA <= x"D3";
when x"C26" => DATA <= x"05";
when x"C27" => DATA <= x"ED";
when x"C28" => DATA <= x"45";
when x"C29" => DATA <= x"CA";
when x"C2A" => DATA <= x"0D";
when x"C2B" => DATA <= x"37";
when x"C2C" => DATA <= x"EB";
when x"C2D" => DATA <= x"D5";
when x"C2E" => DATA <= x"CD";
when x"C2F" => DATA <= x"ED";
when x"C30" => DATA <= x"36";
when x"C31" => DATA <= x"EB";
when x"C32" => DATA <= x"22";
when x"C33" => DATA <= x"A4";
when x"C34" => DATA <= x"3C";
when x"C35" => DATA <= x"D1";
when x"C36" => DATA <= x"C3";
when x"C37" => DATA <= x"39";
when x"C38" => DATA <= x"37";
when x"C39" => DATA <= x"D3";
when x"C3A" => DATA <= x"05";
when x"C3B" => DATA <= x"ED";
when x"C3C" => DATA <= x"45";
when x"C3D" => DATA <= x"20";
when x"C3E" => DATA <= x"00";
when x"C3F" => DATA <= x"EB";
when x"C40" => DATA <= x"19";
when x"C41" => DATA <= x"22";
when x"C42" => DATA <= x"A2";
when x"C43" => DATA <= x"3C";
when x"C44" => DATA <= x"D5";
when x"C45" => DATA <= x"EB";
when x"C46" => DATA <= x"2A";
when x"C47" => DATA <= x"AC";
when x"C48" => DATA <= x"3C";
when x"C49" => DATA <= x"CD";
when x"C4A" => DATA <= x"82";
when x"C4B" => DATA <= x"0D";
when x"C4C" => DATA <= x"D1";
when x"C4D" => DATA <= x"D3";
when x"C4E" => DATA <= x"05";
when x"C4F" => DATA <= x"ED";
when x"C50" => DATA <= x"45";
when x"C51" => DATA <= x"7B";
when x"C52" => DATA <= x"3C";
when x"C53" => DATA <= x"25";
when x"C54" => DATA <= x"3A";
when x"C55" => DATA <= x"7D";
when x"C56" => DATA <= x"3C";
when x"C57" => DATA <= x"B7";
when x"C58" => DATA <= x"CD";
when x"C59" => DATA <= x"82";
when x"C5A" => DATA <= x"0D";
when x"C5B" => DATA <= x"DA";
when x"C5C" => DATA <= x"87";
when x"C5D" => DATA <= x"38";
when x"C5E" => DATA <= x"2A";
when x"C5F" => DATA <= x"A0";
when x"C60" => DATA <= x"3C";
when x"C61" => DATA <= x"D3";
when x"C62" => DATA <= x"05";
when x"C63" => DATA <= x"ED";
when x"C64" => DATA <= x"45";
when x"C65" => DATA <= x"D5";
when x"C66" => DATA <= x"CD";
when x"C67" => DATA <= x"E4";
when x"C68" => DATA <= x"36";
when x"C69" => DATA <= x"EB";
when x"C6A" => DATA <= x"2A";
when x"C6B" => DATA <= x"A8";
when x"C6C" => DATA <= x"3C";
when x"C6D" => DATA <= x"EB";
when x"C6E" => DATA <= x"7B";
when x"C6F" => DATA <= x"E6";
when x"C70" => DATA <= x"E0";
when x"C71" => DATA <= x"5F";
when x"C72" => DATA <= x"7B";
when x"C73" => DATA <= x"B2";
when x"C74" => DATA <= x"C2";
when x"C75" => DATA <= x"00";
when x"C76" => DATA <= x"05";
when x"C77" => DATA <= x"00";
when x"C78" => DATA <= x"05";
when x"C79" => DATA <= x"04";
when x"C7A" => DATA <= x"05";
when x"C7B" => DATA <= x"08";
when x"C7C" => DATA <= x"0E";
when x"C7D" => DATA <= x"04";
when x"C7E" => DATA <= x"01";
when x"C7F" => DATA <= x"01";
when x"C80" => DATA <= x"05";
when x"C81" => DATA <= x"00";
when x"C82" => DATA <= x"20";
when x"C83" => DATA <= x"20";
when x"C84" => DATA <= x"10";
when x"C85" => DATA <= x"0D";
when x"C86" => DATA <= x"00";
when x"C87" => DATA <= x"08";
when x"C88" => DATA <= x"80";
when x"C89" => DATA <= x"05";
when x"C8A" => DATA <= x"00";
when x"C8B" => DATA <= x"05";
when x"C8C" => DATA <= x"00";
when x"C8D" => DATA <= x"05";
when x"C8E" => DATA <= x"00";
when x"C8F" => DATA <= x"00";
when x"C90" => DATA <= x"00";
when x"C91" => DATA <= x"05";
when x"C92" => DATA <= x"09";
when x"C93" => DATA <= x"05";
when x"C94" => DATA <= x"00";
when x"C95" => DATA <= x"08";
when x"C96" => DATA <= x"20";
when x"C97" => DATA <= x"10";
when x"C98" => DATA <= x"01";
when x"C99" => DATA <= x"0D";
when x"C9A" => DATA <= x"80";
when x"C9B" => DATA <= x"08";
when x"C9C" => DATA <= x"80";
when x"C9D" => DATA <= x"B0";
when x"C9E" => DATA <= x"FC";
when x"C9F" => DATA <= x"80";
when x"CA0" => DATA <= x"20";
when x"CA1" => DATA <= x"FF";
when x"CA2" => DATA <= x"00";
when x"CA3" => DATA <= x"00";
when x"CA4" => DATA <= x"00";
when x"CA5" => DATA <= x"D5";
when x"CA6" => DATA <= x"F5";
when x"CA7" => DATA <= x"2A";
when x"CA8" => DATA <= x"A8";
when x"CA9" => DATA <= x"FC";
when x"CAA" => DATA <= x"00";
when x"CAB" => DATA <= x"00";
when x"CAC" => DATA <= x"B0";
when x"CAD" => DATA <= x"FC";
when x"CAE" => DATA <= x"00";
when x"CAF" => DATA <= x"00";
when x"CB0" => DATA <= x"36";
when x"CB1" => DATA <= x"2A";
when x"CB2" => DATA <= x"A0";
when x"CB3" => DATA <= x"3C";
when x"CB4" => DATA <= x"19";
when x"CB5" => DATA <= x"F1";
when x"CB6" => DATA <= x"F5";
when x"CB7" => DATA <= x"77";
when x"CB8" => DATA <= x"7B";
when x"CB9" => DATA <= x"E6";
when x"CBA" => DATA <= x"1F";
when x"CBB" => DATA <= x"FE";
when x"CBC" => DATA <= x"1F";
when x"CBD" => DATA <= x"CA";
when x"CBE" => DATA <= x"95";
when x"CBF" => DATA <= x"37";
when x"CC0" => DATA <= x"13";
when x"CC1" => DATA <= x"CC";
when x"CC2" => DATA <= x"9F";
when x"CC3" => DATA <= x"37";
when x"CC4" => DATA <= x"EB";
when x"CC5" => DATA <= x"22";
when x"CC6" => DATA <= x"A8";
when x"CC7" => DATA <= x"3C";
when x"CC8" => DATA <= x"F1";
when x"CC9" => DATA <= x"D1";
when x"CCA" => DATA <= x"C9";
when x"CCB" => DATA <= x"7B";
when x"CCC" => DATA <= x"E6";
when x"CCD" => DATA <= x"E0";
when x"CCE" => DATA <= x"5F";
when x"CCF" => DATA <= x"CD";
when x"CD0" => DATA <= x"ED";
when x"CD1" => DATA <= x"36";
when x"CD2" => DATA <= x"7A";
when x"CD3" => DATA <= x"B3";
when x"CD4" => DATA <= x"CA";
when x"CD5" => DATA <= x"F8";
when x"CD6" => DATA <= x"36";
when x"CD7" => DATA <= x"13";
when x"CD8" => DATA <= x"13";
when x"CD9" => DATA <= x"13";
when x"CDA" => DATA <= x"13";
when x"CDB" => DATA <= x"C9";
when x"CDC" => DATA <= x"D5";
when x"CDD" => DATA <= x"EB";
when x"CDE" => DATA <= x"2A";
when x"CDF" => DATA <= x"A0";
when x"CE0" => DATA <= x"3C";
when x"CE1" => DATA <= x"EB";
when x"CE2" => DATA <= x"7D";
when x"CE3" => DATA <= x"E6";
when x"CE4" => DATA <= x"1F";
when x"CE5" => DATA <= x"C2";
when x"CE6" => DATA <= x"C0";
when x"CE7" => DATA <= x"37";
when x"CE8" => DATA <= x"7D";
when x"CE9" => DATA <= x"F6";
when x"CEA" => DATA <= x"04";
when x"CEB" => DATA <= x"6F";
when x"CEC" => DATA <= x"EB";
when x"CED" => DATA <= x"19";
when x"CEE" => DATA <= x"7E";
when x"CEF" => DATA <= x"EB";
when x"CF0" => DATA <= x"D1";
when x"CF1" => DATA <= x"C9";
when x"CF2" => DATA <= x"CD";
when x"CF3" => DATA <= x"B0";
when x"CF4" => DATA <= x"37";
when x"CF5" => DATA <= x"F5";
when x"CF6" => DATA <= x"D5";
when x"CF7" => DATA <= x"EB";
when x"CF8" => DATA <= x"7B";
when x"CF9" => DATA <= x"E6";
when x"CFA" => DATA <= x"1F";
when x"CFB" => DATA <= x"FE";
when x"CFC" => DATA <= x"1F";
when x"CFD" => DATA <= x"CA";
when x"CFE" => DATA <= x"D5";
when x"CFF" => DATA <= x"37";
when x"D00" => DATA <= x"13";
when x"D01" => DATA <= x"CC";
when x"D02" => DATA <= x"9F";
when x"D03" => DATA <= x"37";
when x"D04" => DATA <= x"EB";
when x"D05" => DATA <= x"D1";
when x"D06" => DATA <= x"F1";
when x"D07" => DATA <= x"C9";
when x"D08" => DATA <= x"EB";
when x"D09" => DATA <= x"7B";
when x"D0A" => DATA <= x"E6";
when x"D0B" => DATA <= x"E0";
when x"D0C" => DATA <= x"5F";
when x"D0D" => DATA <= x"D5";
when x"D0E" => DATA <= x"CD";
when x"D0F" => DATA <= x"ED";
when x"D10" => DATA <= x"36";
when x"D11" => DATA <= x"7B";
when x"D12" => DATA <= x"B2";
when x"D13" => DATA <= x"C1";
when x"D14" => DATA <= x"C8";
when x"D15" => DATA <= x"AF";
when x"D16" => DATA <= x"77";
when x"D17" => DATA <= x"23";
when x"D18" => DATA <= x"77";
when x"D19" => DATA <= x"2A";
when x"D1A" => DATA <= x"A0";
when x"D1B" => DATA <= x"3C";
when x"D1C" => DATA <= x"19";
when x"D1D" => DATA <= x"73";
when x"D1E" => DATA <= x"23";
when x"D1F" => DATA <= x"72";
when x"D20" => DATA <= x"C5";
when x"D21" => DATA <= x"CD";
when x"D22" => DATA <= x"D2";
when x"D23" => DATA <= x"36";
when x"D24" => DATA <= x"C1";
when x"D25" => DATA <= x"2A";
when x"D26" => DATA <= x"A6";
when x"D27" => DATA <= x"3C";
when x"D28" => DATA <= x"EB";
when x"D29" => DATA <= x"CD";
when x"D2A" => DATA <= x"E4";
when x"D2B" => DATA <= x"36";
when x"D2C" => DATA <= x"71";
when x"D2D" => DATA <= x"23";
when x"D2E" => DATA <= x"70";
when x"D2F" => DATA <= x"C9";
when x"D30" => DATA <= x"4C";
when x"D31" => DATA <= x"05";
when x"D32" => DATA <= x"25";
when x"D33" => DATA <= x"10";
when x"D34" => DATA <= x"E3";
when x"D35" => DATA <= x"C9";
when x"D36" => DATA <= x"FF";
when x"D37" => DATA <= x"F0";
when x"D38" => DATA <= x"03";
when x"D39" => DATA <= x"6C";
when x"D3A" => DATA <= x"03";
when x"D3B" => DATA <= x"25";
when x"D3C" => DATA <= x"86";
when x"D3D" => DATA <= x"70";
when x"D3E" => DATA <= x"84";
when x"D3F" => DATA <= x"71";
when x"D40" => DATA <= x"85";
when x"D41" => DATA <= x"72";
when x"D42" => DATA <= x"A0";
when x"D43" => DATA <= x"02";
when x"D44" => DATA <= x"B1";
when x"D45" => DATA <= x"70";
when x"D46" => DATA <= x"85";
when x"D47" => DATA <= x"74";
when x"D48" => DATA <= x"C8";
when x"D49" => DATA <= x"B1";
when x"D4A" => DATA <= x"70";
when x"D4B" => DATA <= x"85";
when x"D4C" => DATA <= x"75";
when x"D4D" => DATA <= x"20";
when x"D4E" => DATA <= x"9C";
when x"D4F" => DATA <= x"25";
when x"D50" => DATA <= x"A0";
when x"D51" => DATA <= x"0C";
when x"D52" => DATA <= x"B1";
when x"D53" => DATA <= x"70";
when x"D54" => DATA <= x"48";
when x"D55" => DATA <= x"A5";
when x"D56" => DATA <= x"70";
when x"D57" => DATA <= x"18";
when x"D58" => DATA <= x"69";
when x"D59" => DATA <= x"06";
when x"D5A" => DATA <= x"AA";
when x"D5B" => DATA <= x"A9";
when x"D5C" => DATA <= x"00";
when x"D5D" => DATA <= x"65";
when x"D5E" => DATA <= x"71";
when x"D5F" => DATA <= x"A8";
when x"D60" => DATA <= x"68";
when x"D61" => DATA <= x"48";
when x"D62" => DATA <= x"20";
when x"D63" => DATA <= x"06";
when x"D64" => DATA <= x"04";
when x"D65" => DATA <= x"A0";
when x"D66" => DATA <= x"0A";
when x"D67" => DATA <= x"B1";
when x"D68" => DATA <= x"70";
when x"D69" => DATA <= x"AA";
when x"D6A" => DATA <= x"C8";
when x"D6B" => DATA <= x"B1";
when x"D6C" => DATA <= x"70";
when x"D6D" => DATA <= x"85";
when x"D6E" => DATA <= x"76";
when x"D6F" => DATA <= x"D0";
when x"D70" => DATA <= x"03";
when x"D71" => DATA <= x"8A";
when x"D72" => DATA <= x"F0";
when x"D73" => DATA <= x"4E";
when x"D74" => DATA <= x"8A";
when x"D75" => DATA <= x"F0";
when x"D76" => DATA <= x"02";
when x"D77" => DATA <= x"E6";
when x"D78" => DATA <= x"76";
when x"D79" => DATA <= x"68";
when x"D7A" => DATA <= x"6A";
when x"D7B" => DATA <= x"B0";
when x"D7C" => DATA <= x"28";
when x"D7D" => DATA <= x"20";
when x"D7E" => DATA <= x"9B";
when x"D7F" => DATA <= x"25";
when x"D80" => DATA <= x"20";
when x"D81" => DATA <= x"9B";
when x"D82" => DATA <= x"25";
when x"D83" => DATA <= x"20";
when x"D84" => DATA <= x"9B";
when x"D85" => DATA <= x"25";
when x"D86" => DATA <= x"A0";
when x"D87" => DATA <= x"00";
when x"D88" => DATA <= x"AD";
when x"D89" => DATA <= x"E5";
when x"D8A" => DATA <= x"FE";
when x"D8B" => DATA <= x"91";
when x"D8C" => DATA <= x"74";
when x"D8D" => DATA <= x"20";
when x"D8E" => DATA <= x"9B";
when x"D8F" => DATA <= x"25";
when x"D90" => DATA <= x"20";
when x"D91" => DATA <= x"9B";
when x"D92" => DATA <= x"25";
when x"D93" => DATA <= x"20";
when x"D94" => DATA <= x"9B";
when x"D95" => DATA <= x"25";
when x"D96" => DATA <= x"E6";
when x"D97" => DATA <= x"74";
when x"D98" => DATA <= x"D0";
when x"D99" => DATA <= x"02";
when x"D9A" => DATA <= x"E6";
when x"D9B" => DATA <= x"75";
when x"D9C" => DATA <= x"CA";
when x"D9D" => DATA <= x"D0";
when x"D9E" => DATA <= x"E9";
when x"D9F" => DATA <= x"C6";
when x"DA0" => DATA <= x"76";
when x"DA1" => DATA <= x"D0";
when x"DA2" => DATA <= x"E5";
when x"DA3" => DATA <= x"F0";
when x"DA4" => DATA <= x"1D";
when x"DA5" => DATA <= x"A0";
when x"DA6" => DATA <= x"00";
when x"DA7" => DATA <= x"B1";
when x"DA8" => DATA <= x"74";
when x"DA9" => DATA <= x"8D";
when x"DAA" => DATA <= x"E5";
when x"DAB" => DATA <= x"FE";
when x"DAC" => DATA <= x"20";
when x"DAD" => DATA <= x"9B";
when x"DAE" => DATA <= x"25";
when x"DAF" => DATA <= x"20";
when x"DB0" => DATA <= x"9B";
when x"DB1" => DATA <= x"25";
when x"DB2" => DATA <= x"20";
when x"DB3" => DATA <= x"9B";
when x"DB4" => DATA <= x"25";
when x"DB5" => DATA <= x"E6";
when x"DB6" => DATA <= x"74";
when x"DB7" => DATA <= x"D0";
when x"DB8" => DATA <= x"02";
when x"DB9" => DATA <= x"E6";
when x"DBA" => DATA <= x"75";
when x"DBB" => DATA <= x"CA";
when x"DBC" => DATA <= x"D0";
when x"DBD" => DATA <= x"E9";
when x"DBE" => DATA <= x"C6";
when x"DBF" => DATA <= x"76";
when x"DC0" => DATA <= x"D0";
when x"DC1" => DATA <= x"E5";
when x"DC2" => DATA <= x"20";
when x"DC3" => DATA <= x"A4";
when x"DC4" => DATA <= x"25";
when x"DC5" => DATA <= x"A6";
when x"DC6" => DATA <= x"70";
when x"DC7" => DATA <= x"A4";
when x"DC8" => DATA <= x"71";
when x"DC9" => DATA <= x"A5";
when x"DCA" => DATA <= x"72";
when x"DCB" => DATA <= x"60";
when x"DCC" => DATA <= x"A9";
when x"DCD" => DATA <= x"C7";
when x"DCE" => DATA <= x"20";
when x"DCF" => DATA <= x"06";
when x"DD0" => DATA <= x"04";
when x"DD1" => DATA <= x"90";
when x"DD2" => DATA <= x"F9";
when x"DD3" => DATA <= x"60";
when x"DD4" => DATA <= x"A9";
when x"DD5" => DATA <= x"87";
when x"DD6" => DATA <= x"20";
when x"DD7" => DATA <= x"06";
when x"DD8" => DATA <= x"04";
when x"DD9" => DATA <= x"60";
when x"DDA" => DATA <= x"00";
when x"DDB" => DATA <= x"25";
when x"DDC" => DATA <= x"36";
when x"DDD" => DATA <= x"42";
when x"DDE" => DATA <= x"FE";
when x"DDF" => DATA <= x"02";
when x"DE0" => DATA <= x"30";
when x"DE1" => DATA <= x"22";
when x"DE2" => DATA <= x"F5";
when x"DE3" => DATA <= x"3A";
when x"DE4" => DATA <= x"81";
when x"DE5" => DATA <= x"FF";
when x"DE6" => DATA <= x"E6";
when x"DE7" => DATA <= x"01";
when x"DE8" => DATA <= x"32";
when x"DE9" => DATA <= x"AA";
when x"DEA" => DATA <= x"FC";
when x"DEB" => DATA <= x"F1";
when x"DEC" => DATA <= x"32";
when x"DED" => DATA <= x"81";
when x"DEE" => DATA <= x"FF";
when x"DEF" => DATA <= x"B7";
when x"DF0" => DATA <= x"20";
when x"DF1" => DATA <= x"08";
when x"DF2" => DATA <= x"21";
when x"DF3" => DATA <= x"71";
when x"DF4" => DATA <= x"F6";
when x"DF5" => DATA <= x"22";
when x"DF6" => DATA <= x"9F";
when x"DF7" => DATA <= x"FF";
when x"DF8" => DATA <= x"18";
when x"DF9" => DATA <= x"06";
when x"DFA" => DATA <= x"21";
when x"DFB" => DATA <= x"0D";
when x"DFC" => DATA <= x"FE";
when x"DFD" => DATA <= x"22";
when x"DFE" => DATA <= x"9F";
when x"DFF" => DATA <= x"FF";
when x"E00" => DATA <= x"3A";
when x"E01" => DATA <= x"AA";
when x"E02" => DATA <= x"FC";
when x"E03" => DATA <= x"C9";
when x"E04" => DATA <= x"FE";
when x"E05" => DATA <= x"FF";
when x"E06" => DATA <= x"C0";
when x"E07" => DATA <= x"3A";
when x"E08" => DATA <= x"81";
when x"E09" => DATA <= x"FF";
when x"E0A" => DATA <= x"E6";
when x"E0B" => DATA <= x"01";
when x"E0C" => DATA <= x"C9";
when x"E0D" => DATA <= x"4F";
when x"E0E" => DATA <= x"3A";
when x"E0F" => DATA <= x"81";
when x"E10" => DATA <= x"FF";
when x"E11" => DATA <= x"CB";
when x"E12" => DATA <= x"7F";
when x"E13" => DATA <= x"20";
when x"E14" => DATA <= x"12";
when x"E15" => DATA <= x"79";
when x"E16" => DATA <= x"FE";
when x"E17" => DATA <= x"1B";
when x"E18" => DATA <= x"28";
when x"E19" => DATA <= x"04";
when x"E1A" => DATA <= x"CD";
when x"E1B" => DATA <= x"71";
when x"E1C" => DATA <= x"F6";
when x"E1D" => DATA <= x"C9";
when x"E1E" => DATA <= x"3A";
when x"E1F" => DATA <= x"81";
when x"E20" => DATA <= x"FF";
when x"E21" => DATA <= x"CB";
when x"E22" => DATA <= x"FF";
when x"E23" => DATA <= x"32";
when x"E24" => DATA <= x"81";
when x"E25" => DATA <= x"FF";
when x"E26" => DATA <= x"C9";
when x"E27" => DATA <= x"CB";
when x"E28" => DATA <= x"77";
when x"E29" => DATA <= x"C2";
when x"E2A" => DATA <= x"A6";
when x"E2B" => DATA <= x"FE";
when x"E2C" => DATA <= x"CB";
when x"E2D" => DATA <= x"6F";
when x"E2E" => DATA <= x"C2";
when x"E2F" => DATA <= x"D9";
when x"E30" => DATA <= x"FE";
when x"E31" => DATA <= x"79";
when x"E32" => DATA <= x"FE";
when x"E33" => DATA <= x"3D";
when x"E34" => DATA <= x"28";
when x"E35" => DATA <= x"15";
when x"E36" => DATA <= x"FE";
when x"E37" => DATA <= x"3E";
when x"E38" => DATA <= x"28";
when x"E39" => DATA <= x"1A";
when x"E3A" => DATA <= x"FE";
when x"E3B" => DATA <= x"3F";
when x"E3C" => DATA <= x"28";
when x"E3D" => DATA <= x"1F";
when x"E3E" => DATA <= x"FE";
when x"E3F" => DATA <= x"40";
when x"E40" => DATA <= x"28";
when x"E41" => DATA <= x"3E";
when x"E42" => DATA <= x"3A";
when x"E43" => DATA <= x"81";
when x"E44" => DATA <= x"FF";
when x"E45" => DATA <= x"CB";
when x"E46" => DATA <= x"BF";
when x"E47" => DATA <= x"32";
when x"E48" => DATA <= x"81";
when x"E49" => DATA <= x"FF";
when x"E4A" => DATA <= x"C9";
when x"E4B" => DATA <= x"3A";
when x"E4C" => DATA <= x"81";
when x"E4D" => DATA <= x"FF";
when x"E4E" => DATA <= x"CB";
when x"E4F" => DATA <= x"F7";
when x"E50" => DATA <= x"32";
when x"E51" => DATA <= x"81";
when x"E52" => DATA <= x"FF";
when x"E53" => DATA <= x"C9";
when x"E54" => DATA <= x"3A";
when x"E55" => DATA <= x"81";
when x"E56" => DATA <= x"FF";
when x"E57" => DATA <= x"CB";
when x"E58" => DATA <= x"EF";
when x"E59" => DATA <= x"32";
when x"E5A" => DATA <= x"81";
when x"E5B" => DATA <= x"FF";
when x"E5C" => DATA <= x"C9";
when x"E5D" => DATA <= x"CD";
when x"E5E" => DATA <= x"EC";
when x"E5F" => DATA <= x"FE";
when x"E60" => DATA <= x"28";
when x"E61" => DATA <= x"08";
when x"E62" => DATA <= x"FE";
when x"E63" => DATA <= x"00";
when x"E64" => DATA <= x"20";
when x"E65" => DATA <= x"DC";
when x"E66" => DATA <= x"3E";
when x"E67" => DATA <= x"1F";
when x"E68" => DATA <= x"18";
when x"E69" => DATA <= x"02";
when x"E6A" => DATA <= x"3E";
when x"E6B" => DATA <= x"18";
when x"E6C" => DATA <= x"32";
when x"E6D" => DATA <= x"18";
when x"E6E" => DATA <= x"FF";
when x"E6F" => DATA <= x"CD";
when x"E70" => DATA <= x"F5";
when x"E71" => DATA <= x"FE";
when x"E72" => DATA <= x"06";
when x"E73" => DATA <= x"10";
when x"E74" => DATA <= x"21";
when x"E75" => DATA <= x"10";
when x"E76" => DATA <= x"FF";
when x"E77" => DATA <= x"7E";
when x"E78" => DATA <= x"CD";
when x"E79" => DATA <= x"71";
when x"E7A" => DATA <= x"F6";
when x"E7B" => DATA <= x"23";
when x"E7C" => DATA <= x"10";
when x"E7D" => DATA <= x"F9";
when x"E7E" => DATA <= x"18";
when x"E7F" => DATA <= x"C2";
when x"E80" => DATA <= x"CD";
when x"E81" => DATA <= x"EC";
when x"E82" => DATA <= x"FE";
when x"E83" => DATA <= x"28";
when x"E84" => DATA <= x"04";
when x"E85" => DATA <= x"FE";
when x"E86" => DATA <= x"00";
when x"E87" => DATA <= x"20";
when x"E88" => DATA <= x"B9";
when x"E89" => DATA <= x"CD";
when x"E8A" => DATA <= x"F5";
when x"E8B" => DATA <= x"FE";
when x"E8C" => DATA <= x"06";
when x"E8D" => DATA <= x"06";
when x"E8E" => DATA <= x"21";
when x"E8F" => DATA <= x"10";
when x"E90" => DATA <= x"FF";
when x"E91" => DATA <= x"7E";
when x"E92" => DATA <= x"CD";
when x"E93" => DATA <= x"71";
when x"E94" => DATA <= x"F6";
when x"E95" => DATA <= x"23";
when x"E96" => DATA <= x"10";
when x"E97" => DATA <= x"F9";
when x"E98" => DATA <= x"06";
when x"E99" => DATA <= x"05";
when x"E9A" => DATA <= x"21";
when x"E9B" => DATA <= x"1B";
when x"E9C" => DATA <= x"FF";
when x"E9D" => DATA <= x"7E";
when x"E9E" => DATA <= x"CD";
when x"E9F" => DATA <= x"71";
when x"EA0" => DATA <= x"F6";
when x"EA1" => DATA <= x"23";
when x"EA2" => DATA <= x"10";
when x"EA3" => DATA <= x"F9";
when x"EA4" => DATA <= x"18";
when x"EA5" => DATA <= x"9C";
when x"EA6" => DATA <= x"CB";
when x"EA7" => DATA <= x"67";
when x"EA8" => DATA <= x"20";
when x"EA9" => DATA <= x"0F";
when x"EAA" => DATA <= x"79";
when x"EAB" => DATA <= x"D6";
when x"EAC" => DATA <= x"20";
when x"EAD" => DATA <= x"32";
when x"EAE" => DATA <= x"21";
when x"EAF" => DATA <= x"FF";
when x"EB0" => DATA <= x"3A";
when x"EB1" => DATA <= x"81";
when x"EB2" => DATA <= x"FF";
when x"EB3" => DATA <= x"CB";
when x"EB4" => DATA <= x"E7";
when x"EB5" => DATA <= x"32";
when x"EB6" => DATA <= x"81";
when x"EB7" => DATA <= x"FF";
when x"EB8" => DATA <= x"C9";
when x"EB9" => DATA <= x"79";
when x"EBA" => DATA <= x"D6";
when x"EBB" => DATA <= x"20";
when x"EBC" => DATA <= x"32";
when x"EBD" => DATA <= x"20";
when x"EBE" => DATA <= x"FF";
when x"EBF" => DATA <= x"3E";
when x"EC0" => DATA <= x"1F";
when x"EC1" => DATA <= x"CD";
when x"EC2" => DATA <= x"71";
when x"EC3" => DATA <= x"F6";
when x"EC4" => DATA <= x"3A";
when x"EC5" => DATA <= x"20";
when x"EC6" => DATA <= x"FF";
when x"EC7" => DATA <= x"CD";
when x"EC8" => DATA <= x"71";
when x"EC9" => DATA <= x"F6";
when x"ECA" => DATA <= x"3A";
when x"ECB" => DATA <= x"21";
when x"ECC" => DATA <= x"FF";
when x"ECD" => DATA <= x"CD";
when x"ECE" => DATA <= x"71";
when x"ECF" => DATA <= x"F6";
when x"ED0" => DATA <= x"3A";
when x"ED1" => DATA <= x"81";
when x"ED2" => DATA <= x"FF";
when x"ED3" => DATA <= x"E6";
when x"ED4" => DATA <= x"01";
when x"ED5" => DATA <= x"32";
when x"ED6" => DATA <= x"81";
when x"ED7" => DATA <= x"FF";
when x"ED8" => DATA <= x"C9";
when x"ED9" => DATA <= x"79";
when x"EDA" => DATA <= x"B7";
when x"EDB" => DATA <= x"28";
when x"EDC" => DATA <= x"06";
when x"EDD" => DATA <= x"D6";
when x"EDE" => DATA <= x"20";
when x"EDF" => DATA <= x"CD";
when x"EE0" => DATA <= x"71";
when x"EE1" => DATA <= x"F6";
when x"EE2" => DATA <= x"C9";
when x"EE3" => DATA <= x"3A";
when x"EE4" => DATA <= x"81";
when x"EE5" => DATA <= x"FF";
when x"EE6" => DATA <= x"E6";
when x"EE7" => DATA <= x"01";
when x"EE8" => DATA <= x"32";
when x"EE9" => DATA <= x"81";
when x"EEA" => DATA <= x"FF";
when x"EEB" => DATA <= x"C9";
when x"EEC" => DATA <= x"3E";
when x"EED" => DATA <= x"87";
when x"EEE" => DATA <= x"CD";
when x"EEF" => DATA <= x"8E";
when x"EF0" => DATA <= x"F8";
when x"EF1" => DATA <= x"7C";
when x"EF2" => DATA <= x"FE";
when x"EF3" => DATA <= x"03";
when x"EF4" => DATA <= x"C9";
when x"EF5" => DATA <= x"3E";
when x"EF6" => DATA <= x"86";
when x"EF7" => DATA <= x"CD";
when x"EF8" => DATA <= x"8E";
when x"EF9" => DATA <= x"F8";
when x"EFA" => DATA <= x"7D";
when x"EFB" => DATA <= x"32";
when x"EFC" => DATA <= x"11";
when x"EFD" => DATA <= x"FF";
when x"EFE" => DATA <= x"32";
when x"EFF" => DATA <= x"1E";
when x"F00" => DATA <= x"FF";
when x"F01" => DATA <= x"7C";
when x"F02" => DATA <= x"32";
when x"F03" => DATA <= x"12";
when x"F04" => DATA <= x"FF";
when x"F05" => DATA <= x"32";
when x"F06" => DATA <= x"14";
when x"F07" => DATA <= x"FF";
when x"F08" => DATA <= x"32";
when x"F09" => DATA <= x"1F";
when x"F0A" => DATA <= x"FF";
when x"F0B" => DATA <= x"3C";
when x"F0C" => DATA <= x"32";
when x"F0D" => DATA <= x"1A";
when x"F0E" => DATA <= x"FF";
when x"F0F" => DATA <= x"C9";
when x"F10" => DATA <= x"1C";
when x"F11" => DATA <= x"C4";
when x"F12" => DATA <= x"48";
when x"F13" => DATA <= x"4F";
when x"F14" => DATA <= x"C1";
when x"F15" => DATA <= x"0C";
when x"F16" => DATA <= x"1C";
when x"F17" => DATA <= x"00";
when x"F18" => DATA <= x"1F";
when x"F19" => DATA <= x"4F";
when x"F1A" => DATA <= x"48";
when x"F1B" => DATA <= x"0C";
when x"F1C" => DATA <= x"1A";
when x"F1D" => DATA <= x"1F";
when x"F1E" => DATA <= x"22";
when x"F1F" => DATA <= x"28";
when x"F20" => DATA <= x"00";
when x"F21" => DATA <= x"00";
when x"F22" => DATA <= x"00";
when x"F23" => DATA <= x"28";
when x"F24" => DATA <= x"43";
when x"F25" => DATA <= x"29";
when x"F26" => DATA <= x"3B";
when x"F27" => DATA <= x"36";
when x"F28" => DATA <= x"00";
when x"F29" => DATA <= x"21";
when x"F2A" => DATA <= x"2A";
when x"F2B" => DATA <= x"3B";
when x"F2C" => DATA <= x"C3";
when x"F2D" => DATA <= x"77";
when x"F2E" => DATA <= x"19";
when x"F2F" => DATA <= x"C5";
when x"F30" => DATA <= x"E5";
when x"F31" => DATA <= x"7E";
when x"F32" => DATA <= x"E6";
when x"F33" => DATA <= x"03";
when x"F34" => DATA <= x"47";
when x"F35" => DATA <= x"0E";
when x"F36" => DATA <= x"06";
when x"F37" => DATA <= x"23";
when x"F38" => DATA <= x"5E";
when x"F39" => DATA <= x"23";
when x"F3A" => DATA <= x"56";
when x"F3B" => DATA <= x"CD";
when x"F3C" => DATA <= x"48";
when x"F3D" => DATA <= x"1A";
when x"F3E" => DATA <= x"E1";
when x"F3F" => DATA <= x"C1";
when x"F40" => DATA <= x"C9";
when x"F41" => DATA <= x"53";
when x"F42" => DATA <= x"00";
when x"F43" => DATA <= x"00";
when x"F44" => DATA <= x"00";
when x"F45" => DATA <= x"00";
when x"F46" => DATA <= x"00";
when x"F47" => DATA <= x"02";
when x"F48" => DATA <= x"00";
when x"F49" => DATA <= x"00";
when x"F4A" => DATA <= x"00";
when x"F4B" => DATA <= x"00";
when x"F4C" => DATA <= x"0A";
when x"F4D" => DATA <= x"00";
when x"F4E" => DATA <= x"00";
when x"F4F" => DATA <= x"00";
when x"F50" => DATA <= x"00";
when x"F51" => DATA <= x"00";
when x"F52" => DATA <= x"00";
when x"F53" => DATA <= x"00";
when x"F54" => DATA <= x"00";
when x"F55" => DATA <= x"00";
when x"F56" => DATA <= x"00";
when x"F57" => DATA <= x"00";
when x"F58" => DATA <= x"00";
when x"F59" => DATA <= x"00";
when x"F5A" => DATA <= x"00";
when x"F5B" => DATA <= x"00";
when x"F5C" => DATA <= x"00";
when x"F5D" => DATA <= x"00";
when x"F5E" => DATA <= x"00";
when x"F5F" => DATA <= x"00";
when x"F60" => DATA <= x"00";
when x"F61" => DATA <= x"00";
when x"F62" => DATA <= x"00";
when x"F63" => DATA <= x"00";
when x"F64" => DATA <= x"00";
when x"F65" => DATA <= x"00";
when x"F66" => DATA <= x"00";
when x"F67" => DATA <= x"00";
when x"F68" => DATA <= x"00";
when x"F69" => DATA <= x"00";
when x"F6A" => DATA <= x"00";
when x"F6B" => DATA <= x"00";
when x"F6C" => DATA <= x"00";
when x"F6D" => DATA <= x"00";
when x"F6E" => DATA <= x"00";
when x"F6F" => DATA <= x"00";
when x"F70" => DATA <= x"00";
when x"F71" => DATA <= x"00";
when x"F72" => DATA <= x"00";
when x"F73" => DATA <= x"00";
when x"F74" => DATA <= x"00";
when x"F75" => DATA <= x"00";
when x"F76" => DATA <= x"00";
when x"F77" => DATA <= x"00";
when x"F78" => DATA <= x"00";
when x"F79" => DATA <= x"00";
when x"F7A" => DATA <= x"00";
when x"F7B" => DATA <= x"00";
when x"F7C" => DATA <= x"00";
when x"F7D" => DATA <= x"00";
when x"F7E" => DATA <= x"00";
when x"F7F" => DATA <= x"00";
when x"F80" => DATA <= x"00";
when x"F81" => DATA <= x"00";
when x"F82" => DATA <= x"00";
when x"F83" => DATA <= x"01";
when x"F84" => DATA <= x"B2";
when x"F85" => DATA <= x"FA";
when x"F86" => DATA <= x"02";
when x"F87" => DATA <= x"14";
when x"F88" => DATA <= x"95";
when x"F89" => DATA <= x"00";
when x"F8A" => DATA <= x"01";
when x"F8B" => DATA <= x"00";
when x"F8C" => DATA <= x"00";
when x"F8D" => DATA <= x"3C";
when x"F8E" => DATA <= x"1A";
when x"F8F" => DATA <= x"FF";
when x"F90" => DATA <= x"FF";
when x"F91" => DATA <= x"01";
when x"F92" => DATA <= x"00";
when x"F93" => DATA <= x"00";
when x"F94" => DATA <= x"00";
when x"F95" => DATA <= x"00";
when x"F96" => DATA <= x"00";
when x"F97" => DATA <= x"00";
when x"F98" => DATA <= x"00";
when x"F99" => DATA <= x"00";
when x"F9A" => DATA <= x"74";
when x"F9B" => DATA <= x"4C";
when x"F9C" => DATA <= x"D6";
when x"F9D" => DATA <= x"5E";
when x"F9E" => DATA <= x"C3";
when x"F9F" => DATA <= x"71";
when x"FA0" => DATA <= x"F6";
when x"FA1" => DATA <= x"C3";
when x"FA2" => DATA <= x"AE";
when x"FA3" => DATA <= x"F5";
when x"FA4" => DATA <= x"C3";
when x"FA5" => DATA <= x"5C";
when x"FA6" => DATA <= x"F5";
when x"FA7" => DATA <= x"C3";
when x"FA8" => DATA <= x"3B";
when x"FA9" => DATA <= x"F5";
when x"FAA" => DATA <= x"C3";
when x"FAB" => DATA <= x"76";
when x"FAC" => DATA <= x"F4";
when x"FAD" => DATA <= x"C3";
when x"FAE" => DATA <= x"71";
when x"FAF" => DATA <= x"F4";
when x"FB0" => DATA <= x"C3";
when x"FB1" => DATA <= x"FD";
when x"FB2" => DATA <= x"FA";
when x"FB3" => DATA <= x"C3";
when x"FB4" => DATA <= x"0E";
when x"FB5" => DATA <= x"F6";
when x"FB6" => DATA <= x"C3";
when x"FB7" => DATA <= x"0E";
when x"FB8" => DATA <= x"FE";
when x"FB9" => DATA <= x"C3";
when x"FBA" => DATA <= x"CE";
when x"FBB" => DATA <= x"F2";
when x"FBC" => DATA <= x"C3";
when x"FBD" => DATA <= x"A4";
when x"FBE" => DATA <= x"FA";
when x"FBF" => DATA <= x"C3";
when x"FC0" => DATA <= x"5E";
when x"FC1" => DATA <= x"F6";
when x"FC2" => DATA <= x"C3";
when x"FC3" => DATA <= x"1B";
when x"FC4" => DATA <= x"F6";
when x"FC5" => DATA <= x"C3";
when x"FC6" => DATA <= x"3F";
when x"FC7" => DATA <= x"F6";
when x"FC8" => DATA <= x"C3";
when x"FC9" => DATA <= x"DE";
when x"FCA" => DATA <= x"FD";
when x"FCB" => DATA <= x"C3";
when x"FCC" => DATA <= x"E8";
when x"FCD" => DATA <= x"F8";
when x"FCE" => DATA <= x"C3";
when x"FCF" => DATA <= x"D2";
when x"FD0" => DATA <= x"F9";
when x"FD1" => DATA <= x"C3";
when x"FD2" => DATA <= x"4E";
when x"FD3" => DATA <= x"FA";
when x"FD4" => DATA <= x"C3";
when x"FD5" => DATA <= x"FC";
when x"FD6" => DATA <= x"F9";
when x"FD7" => DATA <= x"C3";
when x"FD8" => DATA <= x"F0";
when x"FD9" => DATA <= x"F9";
when x"FDA" => DATA <= x"C3";
when x"FDB" => DATA <= x"9F";
when x"FDC" => DATA <= x"F9";
when x"FDD" => DATA <= x"C3";
when x"FDE" => DATA <= x"10";
when x"FDF" => DATA <= x"FA";
when x"FE0" => DATA <= x"C3";
when x"FE1" => DATA <= x"90";
when x"FE2" => DATA <= x"F6";
when x"FE3" => DATA <= x"FE";
when x"FE4" => DATA <= x"0D";
when x"FE5" => DATA <= x"20";
when x"FE6" => DATA <= x"07";
when x"FE7" => DATA <= x"3E";
when x"FE8" => DATA <= x"0A";
when x"FE9" => DATA <= x"CD";
when x"FEA" => DATA <= x"EE";
when x"FEB" => DATA <= x"FF";
when x"FEC" => DATA <= x"3E";
when x"FED" => DATA <= x"0D";
when x"FEE" => DATA <= x"C3";
when x"FEF" => DATA <= x"71";
when x"FF0" => DATA <= x"F6";
when x"FF1" => DATA <= x"C3";
when x"FF2" => DATA <= x"EF";
when x"FF3" => DATA <= x"F8";
when x"FF4" => DATA <= x"C3";
when x"FF5" => DATA <= x"8E";
when x"FF6" => DATA <= x"F8";
when x"FF7" => DATA <= x"C3";
when x"FF8" => DATA <= x"B7";
when x"FF9" => DATA <= x"F6";
when x"FFA" => DATA <= x"AC";
when x"FFB" => DATA <= x"FA";
when x"FFC" => DATA <= x"70";
when x"FFD" => DATA <= x"F6";
when x"FFE" => DATA <= x"82";
when x"FFF" => DATA <= x"FA";
when others => DATA <= (others => '0');
end case;
end process;
end RTL;
|
gpl-3.0
|
EliasLuiz/TCC
|
Leon3/lib/gaisler/memctrl/srctrl.in.vhd
|
1
|
612
|
-- PROM/SRAM controller
constant CFG_SRCTRL : integer := CONFIG_SRCTRL;
constant CFG_SRCTRL_PROMWS : integer := CONFIG_SRCTRL_PROMWS;
constant CFG_SRCTRL_RAMWS : integer := CONFIG_SRCTRL_RAMWS;
constant CFG_SRCTRL_IOWS : integer := CONFIG_SRCTRL_IOWS;
constant CFG_SRCTRL_RMW : integer := CONFIG_SRCTRL_RMW;
constant CFG_SRCTRL_8BIT : integer := CONFIG_SRCTRL_8BIT;
constant CFG_SRCTRL_SRBANKS : integer := CFG_SR_CTRL_SRBANKS;
constant CFG_SRCTRL_BANKSZ : integer := CFG_SR_CTRL_BANKSZ;
constant CFG_SRCTRL_ROMASEL : integer := CONFIG_SRCTRL_ROMASEL;
|
gpl-3.0
|
EliasLuiz/TCC
|
Leon3/designs/leon3-ahbfile/ahbfile.vhd
|
1
|
3077
|
--------------------------------------------------------------------------------
-- Entity: ahbfile
-- File: ahbfile.vhd
-- Author: Martin Aberg - Cobham Gaisler AB
-- Description: File I/O debug communication link, using AHBUART protocol
--------------------------------------------------------------------------------
-- This component is not synthesizable.
-- Tested with GHDL 0.33dev (20141104)
-- A companion file ahbfile_foreign implements file access via functions named
-- ahbfile_init, ahbfile_getbyte and ahbfile_putbyte.
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
library grlib;
use grlib.amba.all;
use grlib.stdlib.all;
use grlib.devices.all;
library gaisler;
use gaisler.libdcom.all;
use std.textio.all;
entity ahbfile is
generic (
hindex : integer := 0
);
port (
rst : in std_ulogic;
clk : in std_ulogic;
ahbi : in ahb_mst_in_type;
ahbo : out ahb_mst_out_type
);
end;
architecture struct of ahbfile is
constant REVISION : integer := 1;
signal dmai : ahb_dma_in_type;
signal dmao : ahb_dma_out_type;
signal duarti : dcom_uart_in_type;
signal duarto : dcom_uart_out_type;
function ahbfile_init return integer is
begin assert false severity failure; end;
function ahbfile_getbyte return integer is
begin assert false severity failure; end;
function ahbfile_putbyte(value : integer) return integer is
begin assert false severity failure; end;
attribute foreign of ahbfile_init : function is "VHPIDIRECT ahbfile_init";
attribute foreign of ahbfile_getbyte : function is "VHPIDIRECT ahbfile_getbyte";
attribute foreign of ahbfile_putbyte : function is "VHPIDIRECT ahbfile_putbyte";
begin
ahbmst0 : ahbmst
-- devid is something undefined != 0.
generic map (hindex => hindex, venid => VENDOR_GAISLER, devid => 16#123#)
port map (rst, clk, dmai, dmao, ahbi, ahbo);
dcom0 : dcom port map (rst, clk, dmai, dmao, duarti, duarto, ahbi);
duarto.lock <= '1';
read_file : process
variable fd : integer;
variable invalue : integer;
begin
duarto.dready <= '0';
wait until (rising_edge(clk)) and (rst = '1');
assert -1 /= ahbfile_init severity failure;
loop
wait until rising_edge(clk);
invalue := ahbfile_getbyte;
if -1 /= invalue then
duarto.data <= std_logic_vector(to_unsigned(invalue, duarto.data'length));
duarto.dready <= '1';
while duarti.read /= '1' loop
wait until rising_edge(clk);
end loop;
duarto.dready <= '0';
end if;
end loop;
end process;
write_file : process
variable outvalue : integer;
variable putret : integer;
begin
duarto.thempty <= '1';
wait until rising_edge(clk) and duarti.write = '1';
outvalue := to_integer(unsigned(duarti.data));
putret := ahbfile_putbyte(outvalue);
end process;
bootmsg : report_version
generic map (
"ahbfile" & tost(hindex) &
": File I/O debug communication link rev " & tost(REVISION)
);
end;
|
gpl-3.0
|
EliasLuiz/TCC
|
Leon3/designs/leon3-digilent-nexys4ddr/leon3mp.vhd
|
1
|
33779
|
------------------------------------------------------------------------------
-- LEON3 Demonstration design
-- Copyright (C) 2013 Aeroflex Gaisler
------------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2003 - 2008, Gaisler Research
-- Copyright (C) 2008 - 2014, Aeroflex Gaisler
-- Copyright (C) 2015 - 2016, Cobham Gaisler
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
library grlib;
use grlib.amba.all;
use grlib.stdlib.all;
use grlib.devices.all;
library techmap;
use techmap.gencomp.all;
use techmap.allclkgen.all;
library gaisler;
use gaisler.memctrl.all;
use gaisler.leon3.all;
use gaisler.uart.all;
use gaisler.misc.all;
use gaisler.spi.all;
use gaisler.net.all;
use gaisler.jtag.all;
use gaisler.ddrpkg.all;
--pragma translate_off
use gaisler.sim.all;
library unisim;
use unisim.BUFG;
use unisim.PLLE2_ADV;
use unisim.STARTUPE2;
--pragma translate_on
library esa;
use esa.memoryctrl.all;
use work.config.all;
library testgrouppolito;
use testgrouppolito.dprc_pkg.all;
entity leon3mp is
generic (
fabtech : integer := CFG_FABTECH;
memtech : integer := CFG_MEMTECH;
padtech : integer := CFG_PADTECH;
clktech : integer := CFG_CLKTECH;
disas : integer := CFG_DISAS; -- Enable disassembly to console
dbguart : integer := CFG_DUART; -- Print UART on console
pclow : integer := CFG_PCLOW;
SIM_BYPASS_INIT_CAL : string := "OFF";
SIMULATION : string := "FALSE";
USE_MIG_INTERFACE_MODEL : boolean := false
);
port (
sys_clk_i : in std_ulogic;
-- onBoard DDR2
ddr2_dq : inout std_logic_vector(15 downto 0);
ddr2_addr : out std_logic_vector(12 downto 0);
ddr2_ba : out std_logic_vector(2 downto 0);
ddr2_ras_n : out std_ulogic;
ddr2_cas_n : out std_ulogic;
ddr2_we_n : out std_ulogic;
ddr2_cke : out std_logic_vector(0 downto 0);
ddr2_odt : out std_logic_vector(0 downto 0);
ddr2_cs_n : out std_logic_vector(0 downto 0);
ddr2_dm : out std_logic_vector(1 downto 0);
ddr2_dqs_p : inout std_logic_vector(1 downto 0);
ddr2_dqs_n : inout std_logic_vector(1 downto 0);
ddr2_ck_p : out std_logic_vector(0 downto 0);
ddr2_ck_n : out std_logic_vector(0 downto 0);
-- SPI
QspiCSn : out std_ulogic;
QspiDB : inout std_logic_vector(3 downto 0);
--pragma translate_off
QspiClk : out std_ulogic;
--pragma translate_on
-- 7 segment display
--seg : out std_logic_vector(6 downto 0);
--an : out std_logic_vector(7 downto 0);
-- LEDs
Led : out std_logic_vector(15 downto 0);
-- Switches
sw : in std_logic_vector(15 downto 0);
-- Buttons
btnCpuResetn : in std_ulogic;
btn : in std_logic_vector(4 downto 0);
-- VGA Connector
--vgaRed : out std_logic_vector(2 downto 0);
--vgaGreen : out std_logic_vector(2 downto 0);
--vgaBlue : out std_logic_vector(2 downto 1);
--Hsync : out std_ulogic;
--Vsync : out std_ulogic;
-- 12 pin connectors
--ja : inout std_logic_vector(7 downto 0);
--jb : inout std_logic_vector(7 downto 0);
--jc : inout std_logic_vector(7 downto 0);
--jd : inout std_logic_vector(7 downto 0);
-- SMSC ethernet PHY
eth_rstn : out std_ulogic;
eth_crsdv : in std_ulogic;
eth_refclk : out std_ulogic;
eth_txd : out std_logic_vector(1 downto 0);
eth_txen : out std_ulogic;
eth_rxd : in std_logic_vector(1 downto 0);
eth_rxerr : in std_ulogic;
eth_mdc : out std_ulogic;
eth_mdio : inout std_logic;
-- Pic USB-HID interface
--~ PS2KeyboardData : inout std_logic;
--~ PS2KeyboardClk : inout std_logic;
--~ PS2MouseData : inout std_logic;
--~ PS2MouseClk : inout std_logic;
--~ PicGpio : out std_logic_vector(1 downto 0);
-- USB-RS232 interface
uart_txd_in : in std_logic;
uart_rxd_out : out std_logic);
end;
architecture rtl of leon3mp is
component PLLE2_ADV
generic (
BANDWIDTH : string := "OPTIMIZED";
CLKFBOUT_MULT : integer := 5;
CLKFBOUT_PHASE : real := 0.0;
CLKIN1_PERIOD : real := 0.0;
CLKIN2_PERIOD : real := 0.0;
CLKOUT0_DIVIDE : integer := 1;
CLKOUT0_DUTY_CYCLE : real := 0.5;
CLKOUT0_PHASE : real := 0.0;
CLKOUT1_DIVIDE : integer := 1;
CLKOUT1_DUTY_CYCLE : real := 0.5;
CLKOUT1_PHASE : real := 0.0;
CLKOUT2_DIVIDE : integer := 1;
CLKOUT2_DUTY_CYCLE : real := 0.5;
CLKOUT2_PHASE : real := 0.0;
CLKOUT3_DIVIDE : integer := 1;
CLKOUT3_DUTY_CYCLE : real := 0.5;
CLKOUT3_PHASE : real := 0.0;
CLKOUT4_DIVIDE : integer := 1;
CLKOUT4_DUTY_CYCLE : real := 0.5;
CLKOUT4_PHASE : real := 0.0;
CLKOUT5_DIVIDE : integer := 1;
CLKOUT5_DUTY_CYCLE : real := 0.5;
CLKOUT5_PHASE : real := 0.0;
COMPENSATION : string := "ZHOLD";
DIVCLK_DIVIDE : integer := 1;
REF_JITTER1 : real := 0.0;
REF_JITTER2 : real := 0.0;
STARTUP_WAIT : string := "FALSE"
);
port (
CLKFBOUT : out std_ulogic := '0';
CLKOUT0 : out std_ulogic := '0';
CLKOUT1 : out std_ulogic := '0';
CLKOUT2 : out std_ulogic := '0';
CLKOUT3 : out std_ulogic := '0';
CLKOUT4 : out std_ulogic := '0';
CLKOUT5 : out std_ulogic := '0';
DO : out std_logic_vector (15 downto 0);
DRDY : out std_ulogic := '0';
LOCKED : out std_ulogic := '0';
CLKFBIN : in std_ulogic;
CLKIN1 : in std_ulogic;
CLKIN2 : in std_ulogic;
CLKINSEL : in std_ulogic;
DADDR : in std_logic_vector(6 downto 0);
DCLK : in std_ulogic;
DEN : in std_ulogic;
DI : in std_logic_vector(15 downto 0);
DWE : in std_ulogic;
PWRDWN : in std_ulogic;
RST : in std_ulogic
);
end component;
component STARTUPE2
generic (
PROG_USR : string := "FALSE";
SIM_CCLK_FREQ : real := 0.0
);
port (
CFGCLK : out std_ulogic;
CFGMCLK : out std_ulogic;
EOS : out std_ulogic;
PREQ : out std_ulogic;
CLK : in std_ulogic;
GSR : in std_ulogic;
GTS : in std_ulogic;
KEYCLEARB : in std_ulogic;
PACK : in std_ulogic;
USRCCLKO : in std_ulogic;
USRCCLKTS : in std_ulogic;
USRDONEO : in std_ulogic;
USRDONETS : in std_ulogic
);
end component;
component BUFG port (O : out std_logic; I : in std_logic); end component;
signal CLKFBOUT : std_logic;
signal CLKFBIN : std_logic;
signal eth_pll_rst : std_logic;
signal eth_clk_nobuf : std_logic;
signal eth_clk90_nobuf : std_logic;
signal eth_clk : std_logic;
signal eth_clk90 : std_logic;
signal vcc : std_logic;
signal gnd : std_logic;
signal gpioi : gpio_in_type;
signal gpioo : gpio_out_type;
signal apbi : apb_slv_in_type;
signal apbo : apb_slv_out_vector := (others => apb_none);
signal ahbsi : ahb_slv_in_type;
signal ahbso : ahb_slv_out_vector := (others => ahbs_none);
signal ahbmi : ahb_mst_in_type;
signal ahbmo : ahb_mst_out_vector := (others => ahbm_none);
signal cgi : clkgen_in_type;
signal cgo, cgo1 : clkgen_out_type;
signal u1i, dui : uart_in_type;
signal u1o, duo : uart_out_type;
signal irqi : irq_in_vector(0 to CFG_NCPU-1);
signal irqo : irq_out_vector(0 to CFG_NCPU-1);
signal dbgi : l3_debug_in_vector(0 to CFG_NCPU-1);
signal dbgo : l3_debug_out_vector(0 to CFG_NCPU-1);
signal dsui : dsu_in_type;
signal dsuo : dsu_out_type;
signal ndsuact : std_ulogic;
signal ethi : eth_in_type;
signal etho : eth_out_type;
signal gpti : gptimer_in_type;
signal spii : spi_in_type;
signal spio : spi_out_type;
signal spmi : spimctrl_in_type;
signal spmo : spimctrl_out_type;
signal clkm : std_ulogic
-- pragma translate_off
:= '0'
-- pragma translate_on
;
signal clkm2x, clk200, clkfb, pllrst, rstn, clkml : std_ulogic;
signal tck, tms, tdi, tdo : std_ulogic;
signal rstraw : std_logic;
signal btnCpuReset : std_logic;
signal lock, lock0 : std_logic;
signal clkinmig : std_logic;
signal ddr0_clkv : std_logic_vector(2 downto 0);
signal ddr0_clkbv : std_logic_vector(2 downto 0);
signal ddr0_cke : std_logic_vector(1 downto 0);
signal ddr0_csb : std_logic_vector(1 downto 0);
signal ddr0_odt : std_logic_vector(1 downto 0);
signal ddr0_addr : std_logic_vector(13 downto 0);
signal ddr0_clk_fb : std_logic;
signal clkref, calib_done, migrstn : std_logic;
-- RS232 APB Uart
signal rxd1 : std_logic;
signal txd1 : std_logic;
attribute keep : boolean;
attribute syn_keep : boolean;
attribute syn_preserve : boolean;
attribute syn_keep of lock : signal is true;
attribute syn_keep of clkml : signal is true;
attribute syn_keep of clkm : signal is true;
attribute syn_preserve of clkml : signal is true;
attribute syn_preserve of clkm : signal is true;
attribute keep of lock : signal is true;
attribute keep of clkml : signal is true;
attribute keep of clkm : signal is true;
constant BOARD_FREQ : integer := 100000; -- CLK input frequency in KHz
constant CPU_FREQ : integer := BOARD_FREQ * CFG_CLKMUL / CFG_CLKDIV; -- cpu frequency in KHz
----------------------------------------------------------------------
--- FIR component declaration --------------------------------------
----------------------------------------------------------------------
component fir_ahb_dma_apb is
generic (
hindex : integer := 0;
pindex : integer := 0;
paddr : integer := 0;
pmask : integer := 16#fff#;
technology : integer := virtex4);
port (
clk : in std_logic;
rstn : in std_logic;
apbi : in apb_slv_in_type;
apbo : out apb_slv_out_type;
ahbin : in ahb_mst_in_type;
ahbout : out ahb_mst_out_type;
rm_reset: in std_logic
);
end component;
signal rm_reset : std_logic_vector(31 downto 0);
begin
----------------------------------------------------------------------
--- Reset and Clock generation -------------------------------------
----------------------------------------------------------------------
vcc <= '1';
gnd <= '0';
led(15 downto 6) <= (others =>'0'); -- unused leds off
btnCpuReset<= not btnCpuResetn;
cgi.pllctrl <= "00";
cgi.pllrst <= rstraw;
pllrst <= not cgi.pllrst;
rst0 : rstgen generic map (acthigh => 1)
port map (btnCpuReset, clkm, lock, rstn, rstraw);
lock <= calib_done when CFG_MIG_7SERIES = 1 else cgo.clklock and lock0;
led(4) <= lock;
led(5) <= lock0;
rst1 : rstgen -- reset generator
generic map (acthigh => 1)
port map (btnCpuReset, clkm, lock, migrstn, open);
-- clock generator
clkgen_gen: if (CFG_MIG_7SERIES = 0) generate
clkgen0 : clkgen
generic map (fabtech, CFG_CLKMUL, CFG_CLKDIV, 0, 0, 0, 0, 0, BOARD_FREQ, 0)
port map (sys_clk_i, gnd, clkm, open, clkm2x, open, open, cgi, cgo, open, open, open);
end generate;
----------------------------------------------------------------------
--- AHB CONTROLLER --------------------------------------------------
----------------------------------------------------------------------
ahb0 : ahbctrl
generic map (defmast => CFG_DEFMST, split => CFG_SPLIT,
rrobin => CFG_RROBIN, ioaddr => CFG_AHBIO, ioen => 1,
nahbm => CFG_NCPU+CFG_AHB_UART+CFG_AHB_JTAG+CFG_GRETH+CFG_PRC*2,
nahbs => 8)
port map (rstn, clkm, ahbmi, ahbmo, ahbsi, ahbso);
----------------------------------------------------------------------
--- LEON3 processor and DSU -----------------------------------------
----------------------------------------------------------------------
-- LEON3 processor
leon3gen : if CFG_LEON3 = 1 generate
cpu : for i in 0 to CFG_NCPU-1 generate
u0 : leon3s
generic map (i, fabtech, memtech, CFG_NWIN, CFG_DSU, CFG_FPU, CFG_V8,
0, CFG_MAC, pclow, CFG_NOTAG, CFG_NWP, CFG_ICEN, CFG_IREPL, CFG_ISETS, CFG_ILINE,
CFG_ISETSZ, CFG_ILOCK, CFG_DCEN, CFG_DREPL, CFG_DSETS, CFG_DLINE, CFG_DSETSZ,
CFG_DLOCK, CFG_DSNOOP, CFG_ILRAMEN, CFG_ILRAMSZ, CFG_ILRAMADDR, CFG_DLRAMEN,
CFG_DLRAMSZ, CFG_DLRAMADDR, CFG_MMUEN, CFG_ITLBNUM, CFG_DTLBNUM, CFG_TLB_TYPE, CFG_TLB_REP,
CFG_LDDEL, disas, CFG_ITBSZ, CFG_PWD, CFG_SVT, CFG_RSTADDR,
CFG_NCPU-1, CFG_DFIXED, CFG_SCAN, CFG_MMU_PAGE, CFG_BP, CFG_NP_ASI, CFG_WRPSR)
port map (clkm, rstn, ahbmi, ahbmo(i), ahbsi, ahbso, irqi(i), irqo(i), dbgi(i), dbgo(i));
end generate;
led(3) <= not dbgo(0).error;
led(2) <= not dsuo.active;
-- LEON3 Debug Support Unit
dsugen : if CFG_DSU = 1 generate
dsu0 : dsu3
generic map (hindex => 2, haddr => 16#900#, hmask => 16#F00#, ahbpf => CFG_AHBPF,
ncpu => CFG_NCPU, tbits => 30, tech => memtech, irq => 0, kbytes => CFG_ATBSZ)
port map (rstn, clkm, ahbmi, ahbsi, ahbso(2), dbgo, dbgi, dsui, dsuo);
--dsubre_pad : inpad generic map (tech => padtech) port map (dsubre, dsui.break);
dsui.enable <= '1';
end generate;
end generate;
nodsu : if CFG_DSU = 0 generate
ahbso(2) <= ahbs_none; dsuo.tstop <= '0'; dsuo.active <= '0';
end generate;
-- Debug UART
dcomgen : if CFG_AHB_UART = 1 generate
dcom0 : ahbuart
generic map (hindex => CFG_NCPU, pindex => 4, paddr => 7)
port map (rstn, clkm, dui, duo, apbi, apbo(4), ahbmi, ahbmo(CFG_NCPU));
dsurx_pad : inpad generic map (tech => padtech) port map (uart_txd_in, dui.rxd);
dsutx_pad : outpad generic map (tech => padtech) port map (uart_rxd_out, duo.txd);
led(0) <= not dui.rxd;
led(1) <= not duo.txd;
end generate;
nouah : if CFG_AHB_UART = 0 generate apbo(4) <= apb_none; end generate;
ahbjtaggen0 :if CFG_AHB_JTAG = 1 generate
ahbjtag0 : ahbjtag generic map(tech => fabtech, hindex => CFG_NCPU+CFG_AHB_UART)
port map(rstn, clkm, tck, tms, tdi, tdo, ahbmi, ahbmo(CFG_NCPU+CFG_AHB_UART),
open, open, open, open, open, open, open, gnd);
end generate;
----------------------------------------------------------------------
--- DDR2 Memory controller ------------------------------------------
----------------------------------------------------------------------
ddr2gen: if (CFG_DDR2SP = 1) and (CFG_MIG_7SERIES = 0) generate
ddrc : ddr2spa generic map (fabtech => fabtech, memtech => memtech,
hindex => 5, haddr => 16#400#, hmask => 16#F80#, ioaddr => 1, rstdel => 200, -- iomask generic default value
MHz => CPU_FREQ/1000, TRFC => CFG_DDR2SP_TRFC, clkmul => 12,
clkdiv => 6, col => CFG_DDR2SP_COL, Mbyte => CFG_DDR2SP_SIZE,
pwron => CFG_DDR2SP_INIT, ddrbits => CFG_DDR2SP_DATAWIDTH, raspipe => 0,
ahbfreq => CPU_FREQ/1000, readdly => 0, rskew => 0, oepol => 0,
ddelayb0 => CFG_DDR2SP_DELAY0, ddelayb1 => CFG_DDR2SP_DELAY1,
ddelayb2 => CFG_DDR2SP_DELAY2, ddelayb3 => CFG_DDR2SP_DELAY3,
ddelayb4 => CFG_DDR2SP_DELAY4, ddelayb5 => CFG_DDR2SP_DELAY5,
ddelayb6 => CFG_DDR2SP_DELAY6, ddelayb7 => CFG_DDR2SP_DELAY7, -- cbdelayb0-3 generics not used in non-ft mode
numidelctrl => 1, norefclk => 1, -- dqsse, ahbbits, bigmem, nclk, scantest and octen default
nosync => CFG_DDR2SP_NOSYNC, eightbanks => 1, odten => 3, dqsgating => 0,
burstlen => 8, ft => CFG_DDR2SP_FTEN, ftbits => CFG_DDR2SP_FTWIDTH)
port map (
btnCpuResetn, rstn, clkm, clkm, clkm, lock0, clkml, clkml, ahbsi, ahbso(5),
ddr0_clkv, ddr0_clkbv, ddr0_clk_fb, ddr0_clk_fb,
ddr0_cke, ddr0_csb, ddr2_we_n, ddr2_ras_n, ddr2_cas_n,
ddr2_dm, ddr2_dqs_p, ddr2_dqs_n, ddr0_addr, ddr2_ba, ddr2_dq, ddr0_odt,open);
ddr2_addr <= ddr0_addr(12 downto 0);
ddr2_cke <= ddr0_cke(0 downto 0);
ddr2_cs_n <= ddr0_csb(0 downto 0);
ddr2_ck_p(0) <= ddr0_clkv(0);
ddr2_ck_n(0) <= ddr0_clkbv(0);
ddr2_odt <= ddr0_odt(0 downto 0);
end generate;
noddr2 : if (CFG_DDR2SP = 0) and (CFG_MIG_7SERIES = 0) generate lock0 <= '1'; end generate;
mig_gen : if (CFG_DDR2SP = 0) and (CFG_MIG_7SERIES = 1) generate
gen_mig : if (USE_MIG_INTERFACE_MODEL /= true) generate
ddrc : ahb2mig_7series_ddr2_dq16_ad13_ba3 generic map(
hindex => 5, haddr => 16#400#, hmask => 16#F80#, pindex => 5, paddr => 5,
SIM_BYPASS_INIT_CAL => SIM_BYPASS_INIT_CAL, SIMULATION => SIMULATION, USE_MIG_INTERFACE_MODEL => USE_MIG_INTERFACE_MODEL)
port map(
ddr2_dq => ddr2_dq,
ddr2_dqs_p => ddr2_dqs_p,
ddr2_dqs_n => ddr2_dqs_n,
ddr2_addr => ddr2_addr,
ddr2_ba => ddr2_ba,
ddr2_ras_n => ddr2_ras_n,
ddr2_cas_n => ddr2_cas_n,
ddr2_we_n => ddr2_we_n,
ddr2_reset_n => open,
ddr2_ck_p => ddr2_ck_p,
ddr2_ck_n => ddr2_ck_n,
ddr2_cke => ddr2_cke,
ddr2_cs_n => ddr2_cs_n,
ddr2_dm => ddr2_dm,
ddr2_odt => ddr2_odt,
ahbsi => ahbsi,
ahbso => ahbso(5),
apbi => apbi,
apbo => apbo(5),
calib_done => calib_done,
rst_n_syn => migrstn,
rst_n_async => cgo1.clklock,--rstraw,
clk_amba => clkm,
sys_clk_i => clkinmig,
clk_ref_i => clkref,
ui_clk => clkm, -- 70 MHz clk , DDR at 280 MHz (560 Mbps)
ui_clk_sync_rst => open);
clkgenmigref0 : clkgen
generic map (clktech, 16, 8, 0,CFG_CLK_NOFB, 0, 0, 0, 100000)
port map (sys_clk_i, sys_clk_i, clkref, open, open, open, open, cgi, cgo, open, open, open);
clkgenmigin : clkgen
generic map (clktech, 14, 20, 0,CFG_CLK_NOFB, 0, 0, 0, 100000)
port map (sys_clk_i, sys_clk_i, clkinmig, open, open, open, open, cgi, cgo1, open, open, open);
end generate gen_mig;
gen_mig_model : if (USE_MIG_INTERFACE_MODEL = true) generate
-- pragma translate_off
mig_ahbram : ahbram_sim
generic map (
hindex => 5,
haddr => 16#400#,
hmask => 16#F80#,
tech => 0,
kbytes => 1000,
pipe => 0,
maccsz => AHBDW,
fname => "ram.srec"
)
port map(
rst => rstn,
clk => clkm,
ahbsi => ahbsi,
ahbso => ahbso(5)
);
ddr2_dq <= (others => 'Z');
ddr2_dqs_p <= (others => 'Z');
ddr2_dqs_n <= (others => 'Z');
ddr2_addr <= (others => '0');
ddr2_ba <= (others => '0');
ddr2_ras_n <= '0';
ddr2_cas_n <= '0';
ddr2_we_n <= '0';
ddr2_ck_p <= (others => '0');
ddr2_ck_n <= (others => '0');
ddr2_cke <= (others => '0');
ddr2_cs_n <= (others => '0');
ddr2_dm <= (others => '0');
ddr2_odt <= (others => '0');
--calib_done : out std_logic;
calib_done <= '1';
--ui_clk : out std_logic;
clkm <= not clkm after 13.333 ns;
--ui_clk_sync_rst : out std_logic
-- n/a
-- pragma translate_on
end generate gen_mig_model; end generate;
----------------------------------------------------------------------
--- SPI Memory controller -------------------------------------------
----------------------------------------------------------------------
spi_gen: if CFG_SPIMCTRL = 1 generate
-- OPTIONALY set the offset generic (only affect reads).
-- The first 4MB are used for loading the FPGA.
-- For dual ouptut: readcmd => 16#3B#, dualoutput => 1
spimctrl1 : spimctrl
generic map (hindex => 7, hirq => 7, faddr => 16#000#, fmask => 16#ff0#,
ioaddr => 16#700#, iomask => 16#fff#, spliten => CFG_SPLIT,
sdcard => CFG_SPIMCTRL_SDCARD, readcmd => CFG_SPIMCTRL_READCMD, dummybyte => CFG_SPIMCTRL_DUMMYBYTE,
dualoutput => CFG_SPIMCTRL_DUALOUTPUT, scaler => CFG_SPIMCTRL_SCALER, altscaler => CFG_SPIMCTRL_ASCALER)
port map (rstn, clkm, ahbsi, ahbso(7), spmi, spmo);
QspiDB(3) <= '1'; QspiDB(2) <= '1';
-- spi_bdr : iopad generic map (tech => padtech)
-- port map (QspiDB(0), spmo.mosi, spmo.mosioen, spmi.mosi);
spi_mosi_pad : outpad generic map (tech => padtech)
port map (QspiDB(0), spmo.mosi);
spi_miso_pad : inpad generic map (tech => padtech)
port map (QspiDB(1), spmi.miso);
spi_slvsel0_pad : outpad generic map (tech => padtech)
port map (QspiCSn, spmo.csn);
-- MACRO for assigning the SPI output clock
spicclk: STARTUPE2
port map (--CFGCLK => open, CFGMCLK => open, EOS => open, PREQ => open,
CLK => '0', GSR => '0', GTS => '0', KEYCLEARB => '0', PACK => '0',
USRCCLKO => spmo.sck, USRCCLKTS => '0', USRDONEO => '1', USRDONETS => '0' );
--pragma translate_off
QspiClk <= spmo.sck;
--pragma translate_on
end generate;
nospi: if CFG_SPIMCTRL = 0 generate
ahbso(7) <= ahbs_none;
end generate;
----------------------------------------------------------------------
--- APB Bridge and various periherals -------------------------------
----------------------------------------------------------------------
-- APB Bridge
apb0 : apbctrl
generic map (hindex => 1, haddr => CFG_APBADDR)
port map (rstn, clkm, ahbsi, ahbso(1), apbi, apbo);
-- Interrupt controller
irqctrl : if CFG_IRQ3_ENABLE /= 0 generate
irqctrl0 : irqmp
generic map (pindex => 2, paddr => 2, ncpu => CFG_NCPU)
port map (rstn, clkm, apbi, apbo(2), irqo, irqi);
end generate;
irq3 : if CFG_IRQ3_ENABLE = 0 generate
x : for i in 0 to CFG_NCPU-1 generate
irqi(i).irl <= "0000";
end generate;
apbo(2) <= apb_none;
end generate;
-- Time Unit
gpt : if CFG_GPT_ENABLE /= 0 generate
timer0 : gptimer
generic map (pindex => 3, paddr => 3, pirq => CFG_GPT_IRQ,
sepirq => CFG_GPT_SEPIRQ, sbits => CFG_GPT_SW,
ntimers => CFG_GPT_NTIM, nbits => CFG_GPT_TW)
port map (rstn, clkm, apbi, apbo(3), gpti, open);
gpti <= gpti_dhalt_drive(dsuo.tstop);
end generate;
notim : if CFG_GPT_ENABLE = 0 generate apbo(3) <= apb_none; end generate;
ua1 : if CFG_UART1_ENABLE /= 0 generate
uart1 : apbuart -- UART 1
generic map (pindex => 1, paddr => 1, pirq => 2, console => dbguart, fifosize => CFG_UART1_FIFO)
port map (rstn, clkm, apbi, apbo(1), u1i, u1o);
u1i.rxd <= rxd1;
u1i.ctsn <= '0';
u1i.extclk <= '0';
txd1 <= u1o.txd;
-- serrx_pad : inpad generic map (tech => padtech) port map (dsurx, rxd1);
-- sertx_pad : outpad generic map (tech => padtech) port map (dsutx, txd1);
-- led(0) <= not rxd1;
-- led(1) <= not txd1;
end generate;
noua0 : if CFG_UART1_ENABLE = 0 generate apbo(1) <= apb_none; end generate;
-----------------------------------------------------------------------
--- ETHERNET ---------------------------------------------------------
-----------------------------------------------------------------------
eth0 : if CFG_GRETH = 1 generate -- Gaisler ethernet MAC
e1 : grethm
generic map(hindex => CFG_NCPU+CFG_AHB_UART+CFG_AHB_JTAG,
pindex => 15, paddr => 15, pirq => 12, memtech => memtech,
mdcscaler => CPU_FREQ/1000, enable_mdio => 1, fifosize => CFG_ETH_FIFO,
nsync => 1, edcl => CFG_DSU_ETH, edclbufsz => CFG_ETH_BUF,
macaddrh => CFG_ETH_ENM, macaddrl => CFG_ETH_ENL, phyrstadr => 1,
ipaddrh => CFG_ETH_IPM, ipaddrl => CFG_ETH_IPL, giga => CFG_GRETH1G, rmii => 1)
port map(rst => rstn, clk => clkm, ahbmi => ahbmi,
ahbmo => ahbmo(CFG_NCPU+CFG_AHB_UART+CFG_AHB_JTAG),
apbi => apbi, apbo => apbo(15), ethi => ethi, etho => etho);
eth_rstn<=rstn;
end generate;
etxc_pad : outpad generic map (tech => padtech)
port map (eth_refclk, eth_clk);
ethpads : if (CFG_GRETH = 1) generate
emdio_pad : iopad generic map (tech => padtech)
port map (eth_mdio, etho.mdio_o, etho.mdio_oe, ethi.mdio_i);
ethi.rmii_clk<=eth_clk90;
erxd_pad : inpadv generic map (tech => padtech, width => 2) --8
port map (eth_rxd, ethi.rxd(1 downto 0));
erxer_pad : inpad generic map (tech => padtech)
port map (eth_rxerr, ethi.rx_er);
erxcr_pad : inpad generic map (tech => padtech)
port map (eth_crsdv, ethi.rx_crs);
etxd_pad : outpadv generic map (tech => padtech, width => 2)
port map (eth_txd, etho.txd(1 downto 0));
etxen_pad : outpad generic map (tech => padtech)
port map (eth_txen, etho.tx_en);
emdc_pad : outpad generic map (tech => padtech)
port map (eth_mdc, etho.mdc);
end generate;
-----------------------------------------------------------------------
--- AHB ROM ----------------------------------------------------------
-----------------------------------------------------------------------
bpromgen : if CFG_AHBROMEN /= 0 generate
brom : entity work.ahbrom
generic map (hindex => 6, haddr => CFG_AHBRODDR, pipe => CFG_AHBROPIP)
port map ( rstn, clkm, ahbsi, ahbso(6));
end generate;
nobpromgen : if CFG_AHBROMEN = 0 generate
ahbso(6) <= ahbs_none;
end generate;
-----------------------------------------------------------------------
--- AHB RAM ----------------------------------------------------------
-----------------------------------------------------------------------
ahbramgen : if CFG_AHBRAMEN = 1 generate
ahbram0 : ahbram
generic map (hindex => 3, haddr => CFG_AHBRADDR, tech => CFG_MEMTECH,
kbytes => CFG_AHBRSZ, pipe => CFG_AHBRPIPE)
port map (rstn, clkm, ahbsi, ahbso(3));
end generate;
nram : if CFG_AHBRAMEN = 0 generate ahbso(3) <= ahbs_none; end generate;
-----------------------------------------------------------------------
--- DYNAMIC PARTIAL RECONFIGURATION ---------------------------------
-----------------------------------------------------------------------
prc : if CFG_PRC = 1 generate
p1 : dprc generic map(hindex => CFG_NCPU+CFG_AHB_UART+CFG_AHB_JTAG+CFG_GRETH, pindex => 14, paddr => 14, clk_sel => 1, edac_en => CFG_EDAC_EN, pirq => 14,
technology => CFG_FABTECH, crc_en => CFG_CRC_EN, words_block => CFG_WORDS_BLOCK, fifo_dcm_inst => CFG_DCM_FIFO, fifo_depth => CFG_DPR_FIFO)
port map(rstn => rstn, clkm => clkm, clkraw => '0', clk100 => sys_clk_i, ahbmi => ahbmi, ahbmo => ahbmo(CFG_NCPU+CFG_AHB_UART+CFG_AHB_JTAG+CFG_GRETH),
apbi => apbi, apbo => apbo(14), rm_reset => rm_reset);
--------------------------------------------------------------------
-- FIR component instantiation (for dprc demo) -------------------
--------------------------------------------------------------------
fir_ex : FIR_AHB_DMA_APB
generic map (hindex=>CFG_NCPU+CFG_AHB_UART+CFG_AHB_JTAG+CFG_GRETH+CFG_PRC, pindex=>13, paddr=>13,
pmask=>16#fff#, technology =>CFG_FABTECH)
port map (rstn=>rstn, clk=>clkm, apbi=>apbi, apbo=>apbo(13), ahbin=>ahbmi,
ahbout=>ahbmo(CFG_NCPU+CFG_AHB_UART+CFG_AHB_JTAG+CFG_GRETH+CFG_PRC), rm_reset => rm_reset(0));
end generate;
-----------------------------------------------------------------------
-- Test report module, only used for simulation ----------------------
-----------------------------------------------------------------------
--pragma translate_off
test0 : ahbrep generic map (hindex => 4, haddr => 16#200#)
port map (rstn, clkm, ahbsi, ahbso(4));
--pragma translate_on
-----------------------------------------------------------------------
--- Drive unused bus elements ---------------------------------------
-----------------------------------------------------------------------
nam1 : for i in (CFG_NCPU+CFG_AHB_UART+CFG_AHB_JTAG+CFG_GRETH+CFG_PRC*2+1) to NAHBMST-1 generate
ahbmo(i) <= ahbm_none;
end generate;
-----------------------------------------------------------------------
--- Boot message ----------------------------------------------------
-----------------------------------------------------------------------
-- pragma translate_off
x : report_design
generic map (
msg1 => "LEON3 Demonstration design for Digilent NEXYS 4 DDR board",
fabtech => tech_table(fabtech), memtech => tech_table(memtech),
mdel => 1
);
-- pragma translate_on
-----------------------------------------------------------------------
--- Ethernet Clock Generation ---------------------------------------
-----------------------------------------------------------------------
ethclk : if CFG_GRETH = 1 generate
-- 50 MHz clock for output
bufgclk0 : BUFG port map (I => eth_clk_nobuf, O => eth_clk);
-- 50 MHz with +90 deg phase for Rx GRETH
bufgclk45 : BUFG port map (I => eth_clk90_nobuf, O => eth_clk90);
CLKFBIN <= CLKFBOUT;
eth_pll_rst <= not cgi.pllrst;
PLLE2_ADV_inst : PLLE2_ADV generic map (
BANDWIDTH => "OPTIMIZED", -- OPTIMIZED, HIGH, LOW
CLKFBOUT_MULT => 8, -- Multiply value for all CLKOUT, (2-64)
CLKFBOUT_PHASE => 0.0, -- Phase offset in degrees of CLKFB, (-360.000-360.000).
-- CLKIN_PERIOD: Input clock period in nS to ps resolution (i.e. 33.333 is 30 MHz).
CLKIN1_PERIOD => 1000000.0/real(100000.0),
CLKIN2_PERIOD => 0.0,
-- CLKOUT0_DIVIDE - CLKOUT5_DIVIDE: Divide amount for CLKOUT (1-128)
CLKOUT0_DIVIDE => 16,
CLKOUT1_DIVIDE => 16,
CLKOUT2_DIVIDE => 1,
CLKOUT3_DIVIDE => 1,
CLKOUT4_DIVIDE => 1,
CLKOUT5_DIVIDE => 1,
-- CLKOUT0_DUTY_CYCLE - CLKOUT5_DUTY_CYCLE: Duty cycle for CLKOUT outputs (0.001-0.999).
CLKOUT0_DUTY_CYCLE => 0.5,
CLKOUT1_DUTY_CYCLE => 0.5,
CLKOUT2_DUTY_CYCLE => 0.5,
CLKOUT3_DUTY_CYCLE => 0.5,
CLKOUT4_DUTY_CYCLE => 0.5,
CLKOUT5_DUTY_CYCLE => 0.5,
-- CLKOUT0_PHASE - CLKOUT5_PHASE: Phase offset for CLKOUT outputs (-360.000-360.000).
CLKOUT0_PHASE => 0.0,
CLKOUT1_PHASE => 90.0,
CLKOUT2_PHASE => 0.0,
CLKOUT3_PHASE => 0.0,
CLKOUT4_PHASE => 0.0,
CLKOUT5_PHASE => 0.0,
COMPENSATION => "ZHOLD", -- ZHOLD, BUF_IN, EXTERNAL, INTERNAL
DIVCLK_DIVIDE => 1, -- Master division value (1-56)
-- REF_JITTER: Reference input jitter in UI (0.000-0.999).
REF_JITTER1 => 0.0,
REF_JITTER2 => 0.0,
STARTUP_WAIT => "TRUE" -- Delay DONE until PLL Locks, ("TRUE"/"FALSE")
)
port map (
-- Clock Outputs: 1-bit (each) output: User configurable clock outputs
CLKOUT0 => eth_clk_nobuf,
CLKOUT1 => eth_clk90_nobuf,
CLKOUT2 => open,
CLKOUT3 => open,
CLKOUT4 => open,
CLKOUT5 => open,
-- DRP Ports: 16-bit (each) output: Dynamic reconfigration ports
DO => open,
DRDY => open,
-- Feedback Clocks: 1-bit (each) output: Clock feedback ports
CLKFBOUT => CLKFBOUT,
-- Status Ports: 1-bit (each) output: PLL status ports
LOCKED => open,
-- Clock Inputs: 1-bit (each) input: Clock inputs
CLKIN1 => sys_clk_i,
CLKIN2 => '0',
-- Con trol Ports: 1-bit (each) input: PLL control ports
CLKINSEL => '1',
PWRDWN => '0',
RST => eth_pll_rst,
-- DRP Ports: 7-bit (each) input: Dynamic reconfigration ports
DADDR => "0000000",
DCLK => '0',
DEN => '0',
DI => "0000000000000000",
DWE => '0',
-- Feedback Clocks: 1-bit (each) input: Clock feedback ports
CLKFBIN => CLKFBIN
);
end generate;
end rtl;
|
gpl-3.0
|
ggaray/nicsim-vhd
|
dmactrl.vhd
|
1
|
15301
|
-- NICSim-vhd: A VHDL-based modelling and simulation of NIC's buffers
-- Copyright (C) 2013 Godofredo R. Garay <godofredo.garay (-at-) gmail.com>
-- This program is free software: you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation, either version 3 of the License, or
-- (at your option) any later version.
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
-- You should have received a copy of the GNU General Public License
-- along with this program. If not, see <http://www.gnu.org/licenses/>.
entity dmactrl is
port (
payload_transfer_req : in bit;
descriptor_transfer_req : in bit;
payload_transfer_end : out bit := '0';
descriptor_transfer_end : out bit := '0';
payload_transfer_aborted : out bit := '0';
descriptor_transfer_aborted : out bit := '0';
resume_aborted_payload_transfer : in bit;
resume_aborted_descriptor_transfer : in bit;
irdy : in bit;
trdy : in bit;
gnt : in bit;
payload_size_in_data_blocks : in integer;
dma_cycles_counter_out : out integer := 0;
burst_cycles_counter_out : out integer := 0;
pciclk : in bit
);
end dmactrl;
architecture V1 of dmactrl is
--------------- Bus width configuration ---------------
--constant bus_width_in_bits : integer := 32; -- PCI 33/32
constant bus_width_in_bits : integer := 64; -- PCI 66/64, PCI-X 133/64
constant bus_width_in_bytes : integer := bus_width_in_bits/8;
-- ***To be removed
--constant bus_width_in_bytes : integer := 4; -- PCI bus
--constant bus_width_in_bytes : integer := 8; -- PCI-X bus
--------------- Burst size configuration ---------------
constant dma_burst_size_in_bytes : integer := 256; -- DMA busrt size = 256 bytes
--constant dma_burst_size_in_bytes : integer := 512; -- DMA busrt size = 512 bytes
--constant dma_burst_size_in_bytes : integer := 1024; -- DMA busrt size = 1024 bytes
--constant dma_burst_size_in_bytes : integer := 2048; -- DMA busrt size = 2048 bytes
--constant dma_burst_size_in_bytes : integer := 2048; -- DMA busrt size = 4096 bytes
constant dma_burst_size_in_cycles : integer := dma_burst_size_in_bytes/bus_width_in_bytes;
--constant dma_burst_size_in_cycles : integer := 64; -- DMA busrt size = 512 bytes (PCI-X bus)
--constant dma_burst_size_in_cycles : integer := 128; -- DMA busrt size = 1024 bytes (PCI-X bus)
--constant dma_burst_size_in_cycles : integer := 256; -- DMA busrt size = 2048 bytes (PCI-X bus)
--constant dma_burst_size_in_cycles : integer := 512; -- DMA busrt size = 4096 bytes (PCI-X bus)
--------------- Descriptor size configuration ---------------
--constant descriptor_size_in_data_blocks : integer := 2; -- Descriptor size in data blocks (PCI-X bus)
--constant descriptor_size_in_data_blocks : integer := 4; -- Descriptor size in data blocks (PCI bus)
constant descriptor_size_in_bytes : integer := 16; -- Descriptor size in bytes
constant descriptor_size_in_data_blocks : integer := descriptor_size_in_bytes/bus_width_in_bytes;
--------------- Injection rate configuration ---------------
-- ******* To be used in the future, not implemented yet...
--constant nic_injection_rate : natural := 1; -- NIC/PCI bus bandwidth ratio
constant nic_injection_rate : natural := 1; -- NIC/PCI bus bandwidth ratio
-- ****** In the future, constant pcilck_period should be removed a function based on the pciclk signal should be implemented
--constant pciclk_period : time := 0.03030303 us; -- PCI 33
--constant pciclk_period : time := 0.015151515 us; -- PCI 66
constant pciclk_period : time := 0.007518797 us; -- PCI-X 133
--constant pciclk_period : time := 0.003759398 us; -- PCI-X 266
--constant pciclk_period : time := 0.001876173 us; -- PCI-X 533
--------------- Variables Declarations ---------------
shared variable burst_cycles_counter : integer;
-- A variable is declared for each output signal.
shared variable payload_transfer_end_value : bit := '0';
shared variable descriptor_transfer_end_value : bit := '0';
shared variable payload_transfer_aborted_value : bit := '0';
shared variable descriptor_transfer_aborted_value : bit := '0';
shared variable dma_cycles_counter : integer := 0;
begin
dma_controller_fsm: process
type controller_state is (idle,
transferring_payload,
transferring_descriptor,
transferring_payload_stalled,
transferring_descriptor_stalled);
variable state : controller_state := idle;
variable next_state : controller_state := idle;
begin
wait until pciclk'event and pciclk = '1';
case state is
when idle =>
payload_transfer_end_value := '0';
descriptor_transfer_end_value := '0';
payload_transfer_aborted_value := '0';
descriptor_transfer_aborted_value := '0';
burst_cycles_counter := 0;
if payload_transfer_req = '1'
and descriptor_transfer_req = '1'
and resume_aborted_payload_transfer = '1'
and resume_aborted_descriptor_transfer = '1'
then next_state := idle;
elsif payload_transfer_req = '0'
--and descriptor_transfer_req = '1'
and irdy = '0'
and trdy = '0'
--and dma_cycles_counter = 0
then dma_cycles_counter := payload_size_in_data_blocks;
burst_cycles_counter := dma_burst_size_in_cycles;
assert false
report "dma_controller_fsm: transferring_payload"
severity note;
next_state := transferring_payload;
elsif payload_transfer_req = '0'
--and dma_cycles_counter > 0
and (irdy = '1'
or trdy = '1')
then assert false
report "dma_controller_fsm: transferring_payload_stalled"
severity note;
next_state := transferring_payload_stalled;
-- Descriptor transfer
elsif descriptor_transfer_req = '0'
and payload_transfer_req = '1'
and irdy = '0'
and trdy = '0'
and dma_cycles_counter = 0
then dma_cycles_counter := descriptor_size_in_data_blocks;
burst_cycles_counter := dma_burst_size_in_cycles;
assert false
report "dma_controller_fsm: transferring_descriptor"
severity note;
next_state := transferring_descriptor;
elsif descriptor_transfer_req = '0'
and payload_transfer_req = '1'
and dma_cycles_counter > 0
and (irdy = '1'
or trdy = '1')
then assert false
report "dma_controller_fsm: transferring_descriptor_stalled"
severity note;
next_state := transferring_descriptor_stalled;
-- Aborted payload transfer
elsif resume_aborted_payload_transfer = '0'
and payload_transfer_req = '1'
and descriptor_transfer_req = '1'
and resume_aborted_descriptor_transfer = '1'
and gnt = '0'
and irdy = '0'
and trdy = '0'
and dma_cycles_counter > 0
then assert false
report "Aborted payload transfer, resume_aborted_payload_transfer = 0"
severity note;
burst_cycles_counter := dma_burst_size_in_cycles;
next_state := transferring_payload;
elsif resume_aborted_payload_transfer = '0'
and payload_transfer_req = '1'
and descriptor_transfer_req = '1'
and resume_aborted_descriptor_transfer = '1'
and irdy = '0'
and dma_cycles_counter > 0
and (irdy = '1'
or trdy = '1')
then assert false
report "dma_controller_fsm: transferring_payload_stalled"
severity note;
next_state := transferring_payload_stalled;
elsif resume_aborted_payload_transfer = '0'
and dma_cycles_counter = 0
then assert false
report "Illegal resume_aborted_payload_transfer at this moment because dma_cycles_counter = 0. Ignoring signal "
severity warning;
next_state := idle;
-- Aborted descriptor transfer
elsif resume_aborted_descriptor_transfer = '0'
and dma_cycles_counter > 0
and irdy = '0'
and trdy = '0'
then assert false
report "dma_controller_fsm: transferring_descriptor"
severity note;
next_state := transferring_descriptor;
elsif resume_aborted_payload_transfer = '0'
and dma_cycles_counter > 0
and (irdy = '1'
and trdy = '1')
then assert false
report "dma_controller_fsm: transferring_payload_stalled"
severity note;
next_state := transferring_payload_stalled;
elsif resume_aborted_descriptor_transfer = '0'
and dma_cycles_counter > 0
and (irdy = '0'
and trdy = '0')
then assert false
report "dma_controller_fsm: transferring_descriptor_stalled"
severity note;
next_state := transferring_descriptor_stalled;
elsif resume_aborted_descriptor_transfer = '0'
and dma_cycles_counter = 0
then assert false
report "Illegal resume_aborted_descriptor_transfer signal at this moment. Ignoring signal"
severity warning;
next_state := idle;
end if;
when transferring_payload =>
if burst_cycles_counter = 0
then payload_transfer_aborted_value := '1';
wait for pciclk_period * 8;
assert false
report "dma_controller_fsm: idle"
severity note;
next_state := idle;
elsif (payload_transfer_req = '0'
or resume_aborted_payload_transfer = '0')
and gnt = '0'
and irdy = '0'
and trdy = '0'
and dma_cycles_counter > 0
then --assert false
--report "decrementing payload cycles counter"
--severity warning;
dma_cycles_counter := dma_cycles_counter - 1;
burst_cycles_counter := burst_cycles_counter - 1;
assert false
report "dma_controller_fsm: decrementing dma_cycles_counter"
severity note;
next_state := transferring_payload;
elsif (payload_transfer_req = '0'
or resume_aborted_payload_transfer = '0')
--and gnt = '0'
--and irdy = '0'
--and trdy = '0'
and dma_cycles_counter = 0
then payload_transfer_end_value := '1';
wait for pciclk_period * 8;
assert false
report "dma_controller_fsm: idle"
severity note;
next_state := idle;
elsif payload_transfer_req = '0'
and gnt = '0'
and dma_cycles_counter > 0
and (trdy = '1'
or irdy = '1')
then assert false
report "dma_controller_fsm: transferring_payload_stalled"
severity note;
next_state := transferring_payload_stalled;
elsif (payload_transfer_req = '0'
or resume_aborted_payload_transfer = '0')
and gnt = '1'
and dma_cycles_counter > 0
then payload_transfer_aborted_value := '1';
wait for pciclk_period * 8;
next_state := idle;
end if;
when transferring_payload_stalled =>
if burst_cycles_counter = 0
then payload_transfer_aborted_value := '1';
wait for pciclk_period * 8;
next_state := idle;
elsif payload_transfer_req = '0'
and gnt = '0'
and dma_cycles_counter > 0
and (irdy = '1'
or trdy = '1')
then burst_cycles_counter := burst_cycles_counter - 1;
assert false
report "dma_controller_fsm: transferring_payload_stalled"
severity note;
next_state := transferring_payload_stalled;
elsif payload_transfer_req = '0'
and gnt = '0'
and irdy = '0'
and trdy = '0'
and dma_cycles_counter > 0
then burst_cycles_counter := burst_cycles_counter - 1;
assert false
report "dma_controller_fsm: decrementing burst_cycles_counter"
severity note;
next_state := transferring_payload;
elsif gnt = '1'
--and dma_cycles_counter > 0
then payload_transfer_aborted_value := '1';
wait for pciclk_period * 8;
--descriptor_transfer_aborted <= '0';
next_state := idle;
end if;
when transferring_descriptor =>
if (descriptor_transfer_req = '0'
or resume_aborted_descriptor_transfer = '0')
and gnt = '0'
and irdy = '0'
and trdy = '0'
and dma_cycles_counter > 0
then dma_cycles_counter := dma_cycles_counter - 1;
burst_cycles_counter := burst_cycles_counter - 1;
assert false
report "dma_controller_fsm: decrementing dma_cycles_counter"
severity note;
next_state := transferring_descriptor;
elsif (descriptor_transfer_req = '0'
or resume_aborted_payload_transfer = '0')
--and gnt = '0'
--and irdy = '0'
--and trdy = '0'
and dma_cycles_counter = 0
then descriptor_transfer_end_value := '1';
wait for pciclk_period * 8;
assert false
report "dma_controller_fsm: idle"
severity note;
next_state := idle;
elsif descriptor_transfer_req = '0'
and gnt = '0'
and dma_cycles_counter > 0
and (trdy = '1'
or irdy = '1')
then assert false
report "dma_controller_fsm: transferring_descriptor_stalled"
severity note;
next_state := transferring_descriptor_stalled;
elsif (descriptor_transfer_req = '0'
or resume_aborted_descriptor_transfer = '0')
and gnt = '1'
and dma_cycles_counter > 0
then descriptor_transfer_aborted_value := '1';
wait for pciclk_period * 8;
next_state := idle;
end if;
when transferring_descriptor_stalled =>
if descriptor_transfer_req = '0'
and gnt = '0'
and dma_cycles_counter > 0
and (irdy = '1'
or trdy = '1')
then assert false
report "dma_controller_fsm: transferring_descriptor_stalled"
severity note;
next_state := transferring_descriptor_stalled;
elsif descriptor_transfer_req = '0'
and gnt = '0'
and irdy = '0'
and trdy = '0'
and dma_cycles_counter > 0
then next_state := transferring_descriptor;
elsif gnt = '1'
-- and dma_cycles_counter > 0
then descriptor_transfer_aborted_value := '1';
wait for pciclk_period * 8;
next_state := idle;
end if;
end case;
state := next_state;
end process dma_controller_fsm;
output_signals_driver: process
begin
wait until pciclk'event and pciclk = '1';
payload_transfer_end <= payload_transfer_end_value;
descriptor_transfer_end <= descriptor_transfer_end_value;
payload_transfer_aborted <= payload_transfer_aborted_value;
descriptor_transfer_aborted <= descriptor_transfer_aborted_value;
end process output_signals_driver;
dma_cycles_counter_out_driver: process
begin
wait until pciclk'event and pciclk = '0';
dma_cycles_counter_out <= dma_cycles_counter;
burst_cycles_counter_out <= burst_cycles_counter;
end process dma_cycles_counter_out_driver;
end V1;
|
gpl-3.0
|
hoglet67/CoPro6502
|
src/ROM/tuberom_68000.vhd
|
1
|
836299
|
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity tuberom_68000 is
port (
CLK : in std_logic;
ADDR : in std_logic_vector(13 downto 0);
DATA : out std_logic_vector(15 downto 0)
);
end;
architecture RTL of tuberom_68000 is
signal rom_addr : std_logic_vector(13 downto 0);
begin
p_addr : process(ADDR)
begin
rom_addr <= (others => '0');
rom_addr(13 downto 0) <= ADDR;
end process;
p_rom : process
begin
wait until rising_edge(CLK);
DATA <= (others => '0');
case rom_addr is
when "00" & x"000" => DATA <= x"0000";
when "00" & x"001" => DATA <= x"0620";
when "00" & x"002" => DATA <= x"003f";
when "00" & x"003" => DATA <= x"0200";
when "00" & x"004" => DATA <= x"003f";
when "00" & x"005" => DATA <= x"062a";
when "00" & x"006" => DATA <= x"003f";
when "00" & x"007" => DATA <= x"0732";
when "00" & x"008" => DATA <= x"003f";
when "00" & x"009" => DATA <= x"0740";
when "00" & x"00a" => DATA <= x"003f";
when "00" & x"00b" => DATA <= x"074c";
when "00" & x"00c" => DATA <= x"003f";
when "00" & x"00d" => DATA <= x"0764";
when "00" & x"00e" => DATA <= x"003f";
when "00" & x"00f" => DATA <= x"0764";
when "00" & x"010" => DATA <= x"003f";
when "00" & x"011" => DATA <= x"0758";
when "00" & x"012" => DATA <= x"003f";
when "00" & x"013" => DATA <= x"0764";
when "00" & x"014" => DATA <= x"003f";
when "00" & x"015" => DATA <= x"0764";
when "00" & x"016" => DATA <= x"003f";
when "00" & x"017" => DATA <= x"0764";
when "00" & x"018" => DATA <= x"003f";
when "00" & x"019" => DATA <= x"0764";
when "00" & x"01a" => DATA <= x"003f";
when "00" & x"01b" => DATA <= x"0764";
when "00" & x"01c" => DATA <= x"003f";
when "00" & x"01d" => DATA <= x"0764";
when "00" & x"01e" => DATA <= x"003f";
when "00" & x"01f" => DATA <= x"0764";
when "00" & x"020" => DATA <= x"003f";
when "00" & x"021" => DATA <= x"0764";
when "00" & x"022" => DATA <= x"003f";
when "00" & x"023" => DATA <= x"0764";
when "00" & x"024" => DATA <= x"003f";
when "00" & x"025" => DATA <= x"0764";
when "00" & x"026" => DATA <= x"003f";
when "00" & x"027" => DATA <= x"0764";
when "00" & x"028" => DATA <= x"003f";
when "00" & x"029" => DATA <= x"0764";
when "00" & x"02a" => DATA <= x"003f";
when "00" & x"02b" => DATA <= x"0764";
when "00" & x"02c" => DATA <= x"003f";
when "00" & x"02d" => DATA <= x"0764";
when "00" & x"02e" => DATA <= x"003f";
when "00" & x"02f" => DATA <= x"0764";
when "00" & x"030" => DATA <= x"003f";
when "00" & x"031" => DATA <= x"0764";
when "00" & x"032" => DATA <= x"003f";
when "00" & x"033" => DATA <= x"25b2";
when "00" & x"034" => DATA <= x"003f";
when "00" & x"035" => DATA <= x"0450";
when "00" & x"036" => DATA <= x"003f";
when "00" & x"037" => DATA <= x"25b2";
when "00" & x"038" => DATA <= x"003f";
when "00" & x"039" => DATA <= x"25b2";
when "00" & x"03a" => DATA <= x"003f";
when "00" & x"03b" => DATA <= x"0602";
when "00" & x"03c" => DATA <= x"003f";
when "00" & x"03d" => DATA <= x"25b2";
when "00" & x"03e" => DATA <= x"003f";
when "00" & x"03f" => DATA <= x"25b2";
when "00" & x"040" => DATA <= x"003f";
when "00" & x"041" => DATA <= x"0764";
when "00" & x"042" => DATA <= x"003f";
when "00" & x"043" => DATA <= x"0764";
when "00" & x"044" => DATA <= x"003f";
when "00" & x"045" => DATA <= x"0764";
when "00" & x"046" => DATA <= x"003f";
when "00" & x"047" => DATA <= x"0764";
when "00" & x"048" => DATA <= x"003f";
when "00" & x"049" => DATA <= x"0764";
when "00" & x"04a" => DATA <= x"003f";
when "00" & x"04b" => DATA <= x"0764";
when "00" & x"04c" => DATA <= x"003f";
when "00" & x"04d" => DATA <= x"0764";
when "00" & x"04e" => DATA <= x"003f";
when "00" & x"04f" => DATA <= x"0764";
when "00" & x"050" => DATA <= x"003f";
when "00" & x"051" => DATA <= x"0764";
when "00" & x"052" => DATA <= x"003f";
when "00" & x"053" => DATA <= x"0764";
when "00" & x"054" => DATA <= x"003f";
when "00" & x"055" => DATA <= x"0764";
when "00" & x"056" => DATA <= x"003f";
when "00" & x"057" => DATA <= x"0764";
when "00" & x"058" => DATA <= x"003f";
when "00" & x"059" => DATA <= x"0900";
when "00" & x"05a" => DATA <= x"003f";
when "00" & x"05b" => DATA <= x"0764";
when "00" & x"05c" => DATA <= x"003f";
when "00" & x"05d" => DATA <= x"0764";
when "00" & x"05e" => DATA <= x"003f";
when "00" & x"05f" => DATA <= x"0764";
when "00" & x"060" => DATA <= x"003f";
when "00" & x"061" => DATA <= x"0764";
when "00" & x"062" => DATA <= x"003f";
when "00" & x"063" => DATA <= x"0764";
when "00" & x"064" => DATA <= x"003f";
when "00" & x"065" => DATA <= x"0764";
when "00" & x"066" => DATA <= x"003f";
when "00" & x"067" => DATA <= x"0764";
when "00" & x"068" => DATA <= x"003f";
when "00" & x"069" => DATA <= x"0764";
when "00" & x"06a" => DATA <= x"003f";
when "00" & x"06b" => DATA <= x"0764";
when "00" & x"06c" => DATA <= x"003f";
when "00" & x"06d" => DATA <= x"0764";
when "00" & x"06e" => DATA <= x"003f";
when "00" & x"06f" => DATA <= x"0764";
when "00" & x"070" => DATA <= x"003f";
when "00" & x"071" => DATA <= x"0764";
when "00" & x"072" => DATA <= x"003f";
when "00" & x"073" => DATA <= x"0764";
when "00" & x"074" => DATA <= x"003f";
when "00" & x"075" => DATA <= x"0764";
when "00" & x"076" => DATA <= x"003f";
when "00" & x"077" => DATA <= x"0764";
when "00" & x"078" => DATA <= x"003f";
when "00" & x"079" => DATA <= x"0764";
when "00" & x"07a" => DATA <= x"003f";
when "00" & x"07b" => DATA <= x"0764";
when "00" & x"07c" => DATA <= x"003f";
when "00" & x"07d" => DATA <= x"0764";
when "00" & x"07e" => DATA <= x"003f";
when "00" & x"07f" => DATA <= x"0764";
when "00" & x"080" => DATA <= x"003f";
when "00" & x"081" => DATA <= x"077a";
when "00" & x"082" => DATA <= x"003f";
when "00" & x"083" => DATA <= x"2570";
when "00" & x"084" => DATA <= x"003f";
when "00" & x"085" => DATA <= x"25b2";
when "00" & x"086" => DATA <= x"003f";
when "00" & x"087" => DATA <= x"25ca";
when "00" & x"088" => DATA <= x"003f";
when "00" & x"089" => DATA <= x"0a24";
when "00" & x"08a" => DATA <= x"003f";
when "00" & x"08b" => DATA <= x"0a34";
when "00" & x"08c" => DATA <= x"003f";
when "00" & x"08d" => DATA <= x"0ad6";
when "00" & x"08e" => DATA <= x"003f";
when "00" & x"08f" => DATA <= x"0be8";
when "00" & x"090" => DATA <= x"003f";
when "00" & x"091" => DATA <= x"0cce";
when "00" & x"092" => DATA <= x"003f";
when "00" & x"093" => DATA <= x"0d1e";
when "00" & x"094" => DATA <= x"003f";
when "00" & x"095" => DATA <= x"0d4a";
when "00" & x"096" => DATA <= x"003f";
when "00" & x"097" => DATA <= x"0d60";
when "00" & x"098" => DATA <= x"003f";
when "00" & x"099" => DATA <= x"0d7e";
when "00" & x"09a" => DATA <= x"003f";
when "00" & x"09b" => DATA <= x"0dc2";
when "00" & x"09c" => DATA <= x"003f";
when "00" & x"09d" => DATA <= x"0df0";
when "00" & x"09e" => DATA <= x"003f";
when "00" & x"09f" => DATA <= x"10da";
when "00" & x"0a0" => DATA <= x"003f";
when "00" & x"0a1" => DATA <= x"25dc";
when "00" & x"0a2" => DATA <= x"003f";
when "00" & x"0a3" => DATA <= x"077a";
when "00" & x"0a4" => DATA <= x"003f";
when "00" & x"0a5" => DATA <= x"077a";
when "00" & x"0a6" => DATA <= x"003f";
when "00" & x"0a7" => DATA <= x"077a";
when "00" & x"0a8" => DATA <= x"003f";
when "00" & x"0a9" => DATA <= x"077a";
when "00" & x"0aa" => DATA <= x"003f";
when "00" & x"0ab" => DATA <= x"077a";
when "00" & x"0ac" => DATA <= x"003f";
when "00" & x"0ad" => DATA <= x"077a";
when "00" & x"0ae" => DATA <= x"003f";
when "00" & x"0af" => DATA <= x"077a";
when "00" & x"0b0" => DATA <= x"003f";
when "00" & x"0b1" => DATA <= x"25de";
when "00" & x"0b2" => DATA <= x"003f";
when "00" & x"0b3" => DATA <= x"077a";
when "00" & x"0b4" => DATA <= x"003f";
when "00" & x"0b5" => DATA <= x"0f0e";
when "00" & x"0b6" => DATA <= x"003f";
when "00" & x"0b7" => DATA <= x"077a";
when "00" & x"0b8" => DATA <= x"003f";
when "00" & x"0b9" => DATA <= x"077a";
when "00" & x"0ba" => DATA <= x"003f";
when "00" & x"0bb" => DATA <= x"077a";
when "00" & x"0bc" => DATA <= x"003f";
when "00" & x"0bd" => DATA <= x"25ee";
when "00" & x"0be" => DATA <= x"003f";
when "00" & x"0bf" => DATA <= x"077a";
when "00" & x"0c0" => DATA <= x"003f";
when "00" & x"0c1" => DATA <= x"077a";
when "00" & x"0c2" => DATA <= x"003f";
when "00" & x"0c3" => DATA <= x"077a";
when "00" & x"0c4" => DATA <= x"003f";
when "00" & x"0c5" => DATA <= x"077a";
when "00" & x"0c6" => DATA <= x"003f";
when "00" & x"0c7" => DATA <= x"077a";
when "00" & x"0c8" => DATA <= x"003f";
when "00" & x"0c9" => DATA <= x"077a";
when "00" & x"0ca" => DATA <= x"003f";
when "00" & x"0cb" => DATA <= x"077a";
when "00" & x"0cc" => DATA <= x"003f";
when "00" & x"0cd" => DATA <= x"077a";
when "00" & x"0ce" => DATA <= x"003f";
when "00" & x"0cf" => DATA <= x"077a";
when "00" & x"0d0" => DATA <= x"003f";
when "00" & x"0d1" => DATA <= x"077a";
when "00" & x"0d2" => DATA <= x"003f";
when "00" & x"0d3" => DATA <= x"077a";
when "00" & x"0d4" => DATA <= x"003f";
when "00" & x"0d5" => DATA <= x"077a";
when "00" & x"0d6" => DATA <= x"003f";
when "00" & x"0d7" => DATA <= x"077a";
when "00" & x"0d8" => DATA <= x"0000";
when "00" & x"0d9" => DATA <= x"0000";
when "00" & x"0da" => DATA <= x"0000";
when "00" & x"0db" => DATA <= x"0000";
when "00" & x"0dc" => DATA <= x"0000";
when "00" & x"0dd" => DATA <= x"0000";
when "00" & x"0de" => DATA <= x"0000";
when "00" & x"0df" => DATA <= x"0000";
when "00" & x"0e0" => DATA <= x"0000";
when "00" & x"0e1" => DATA <= x"0000";
when "00" & x"0e2" => DATA <= x"003f";
when "00" & x"0e3" => DATA <= x"265a";
when "00" & x"0e4" => DATA <= x"003f";
when "00" & x"0e5" => DATA <= x"265e";
when "00" & x"0e6" => DATA <= x"003f";
when "00" & x"0e7" => DATA <= x"2662";
when "00" & x"0e8" => DATA <= x"003f";
when "00" & x"0e9" => DATA <= x"266c";
when "00" & x"0ea" => DATA <= x"0000";
when "00" & x"0eb" => DATA <= x"0000";
when "00" & x"0ec" => DATA <= x"0000";
when "00" & x"0ed" => DATA <= x"0000";
when "00" & x"0ee" => DATA <= x"0000";
when "00" & x"0ef" => DATA <= x"0000";
when "00" & x"0f0" => DATA <= x"0000";
when "00" & x"0f1" => DATA <= x"0000";
when "00" & x"0f2" => DATA <= x"0000";
when "00" & x"0f3" => DATA <= x"0000";
when "00" & x"0f4" => DATA <= x"0000";
when "00" & x"0f5" => DATA <= x"0000";
when "00" & x"0f6" => DATA <= x"0000";
when "00" & x"0f7" => DATA <= x"0000";
when "00" & x"0f8" => DATA <= x"0000";
when "00" & x"0f9" => DATA <= x"0000";
when "00" & x"0fa" => DATA <= x"0000";
when "00" & x"0fb" => DATA <= x"0700";
when "00" & x"0fc" => DATA <= x"0000";
when "00" & x"0fd" => DATA <= x"0000";
when "00" & x"0fe" => DATA <= x"0000";
when "00" & x"0ff" => DATA <= x"0000";
when "00" & x"100" => DATA <= x"207c";
when "00" & x"101" => DATA <= x"0000";
when "00" & x"102" => DATA <= x"0000";
when "00" & x"103" => DATA <= x"227c";
when "00" & x"104" => DATA <= x"003f";
when "00" & x"105" => DATA <= x"0000";
when "00" & x"106" => DATA <= x"303c";
when "00" & x"107" => DATA <= x"003f";
when "00" & x"108" => DATA <= x"20d9";
when "00" & x"109" => DATA <= x"51c8";
when "00" & x"10a" => DATA <= x"fffc";
when "00" & x"10b" => DATA <= x"303c";
when "00" & x"10c" => DATA <= x"00bf";
when "00" & x"10d" => DATA <= x"20fc";
when "00" & x"10e" => DATA <= x"003f";
when "00" & x"10f" => DATA <= x"0764";
when "00" & x"110" => DATA <= x"51c8";
when "00" & x"111" => DATA <= x"fff8";
when "00" & x"112" => DATA <= x"303c";
when "00" & x"113" => DATA <= x"003f";
when "00" & x"114" => DATA <= x"207c";
when "00" & x"115" => DATA <= x"0000";
when "00" & x"116" => DATA <= x"0400";
when "00" & x"117" => DATA <= x"227c";
when "00" & x"118" => DATA <= x"003f";
when "00" & x"119" => DATA <= x"0100";
when "00" & x"11a" => DATA <= x"20d9";
when "00" & x"11b" => DATA <= x"51c8";
when "00" & x"11c" => DATA <= x"fffc";
when "00" & x"11d" => DATA <= x"203c";
when "00" & x"11e" => DATA <= x"0001";
when "00" & x"11f" => DATA <= x"fedf";
when "00" & x"120" => DATA <= x"207c";
when "00" & x"121" => DATA <= x"0000";
when "00" & x"122" => DATA <= x"0500";
when "00" & x"123" => DATA <= x"20fc";
when "00" & x"124" => DATA <= x"0000";
when "00" & x"125" => DATA <= x"0000";
when "00" & x"126" => DATA <= x"51c8";
when "00" & x"127" => DATA <= x"fff8";
when "00" & x"128" => DATA <= x"6100";
when "00" & x"129" => DATA <= x"0678";
when "00" & x"12a" => DATA <= x"21c0";
when "00" & x"12b" => DATA <= x"0508";
when "00" & x"12c" => DATA <= x"2e40";
when "00" & x"12d" => DATA <= x"0480";
when "00" & x"12e" => DATA <= x"0000";
when "00" & x"12f" => DATA <= x"0200";
when "00" & x"130" => DATA <= x"2c40";
when "00" & x"131" => DATA <= x"4e66";
when "00" & x"132" => DATA <= x"0480";
when "00" & x"133" => DATA <= x"0000";
when "00" & x"134" => DATA <= x"0200";
when "00" & x"135" => DATA <= x"23c0";
when "00" & x"136" => DATA <= x"0000";
when "00" & x"137" => DATA <= x"0500";
when "00" & x"138" => DATA <= x"33fc";
when "00" & x"139" => DATA <= x"0000";
when "00" & x"13a" => DATA <= x"0000";
when "00" & x"13b" => DATA <= x"0524";
when "00" & x"13c" => DATA <= x"23fc";
when "00" & x"13d" => DATA <= x"0000";
when "00" & x"13e" => DATA <= x"0800";
when "00" & x"13f" => DATA <= x"0000";
when "00" & x"140" => DATA <= x"0504";
when "00" & x"141" => DATA <= x"6100";
when "00" & x"142" => DATA <= x"0506";
when "00" & x"143" => DATA <= x"11c0";
when "00" & x"144" => DATA <= x"0532";
when "00" & x"145" => DATA <= x"6100";
when "00" & x"146" => DATA <= x"057c";
when "00" & x"147" => DATA <= x"11c0";
when "00" & x"148" => DATA <= x"0533";
when "00" & x"149" => DATA <= x"6100";
when "00" & x"14a" => DATA <= x"0596";
when "00" & x"14b" => DATA <= x"11c0";
when "00" & x"14c" => DATA <= x"0534";
when "00" & x"14d" => DATA <= x"11fc";
when "00" & x"14e" => DATA <= x"0000";
when "00" & x"14f" => DATA <= x"0535";
when "00" & x"150" => DATA <= x"6100";
when "00" & x"151" => DATA <= x"0bfc";
when "00" & x"152" => DATA <= x"027c";
when "00" & x"153" => DATA <= x"dfff";
when "00" & x"154" => DATA <= x"203c";
when "00" & x"155" => DATA <= x"003f";
when "00" & x"156" => DATA <= x"27e6";
when "00" & x"157" => DATA <= x"6100";
when "00" & x"158" => DATA <= x"0752";
when "00" & x"159" => DATA <= x"1038";
when "00" & x"15a" => DATA <= x"0532";
when "00" & x"15b" => DATA <= x"b07c";
when "00" & x"15c" => DATA <= x"0009";
when "00" & x"15d" => DATA <= x"6500";
when "00" & x"15e" => DATA <= x"0004";
when "00" & x"15f" => DATA <= x"7000";
when "00" & x"160" => DATA <= x"0c38";
when "00" & x"161" => DATA <= x"00ff";
when "00" & x"162" => DATA <= x"0532";
when "00" & x"163" => DATA <= x"6700";
when "00" & x"164" => DATA <= x"001e";
when "00" & x"165" => DATA <= x"203c";
when "00" & x"166" => DATA <= x"003f";
when "00" & x"167" => DATA <= x"2804";
when "00" & x"168" => DATA <= x"d038";
when "00" & x"169" => DATA <= x"0532";
when "00" & x"16a" => DATA <= x"d038";
when "00" & x"16b" => DATA <= x"0532";
when "00" & x"16c" => DATA <= x"d038";
when "00" & x"16d" => DATA <= x"0532";
when "00" & x"16e" => DATA <= x"7203";
when "00" & x"16f" => DATA <= x"6100";
when "00" & x"170" => DATA <= x"1092";
when "00" & x"171" => DATA <= x"6000";
when "00" & x"172" => DATA <= x"000a";
when "00" & x"173" => DATA <= x"103c";
when "00" & x"174" => DATA <= x"004b";
when "00" & x"175" => DATA <= x"6100";
when "00" & x"176" => DATA <= x"06fe";
when "00" & x"177" => DATA <= x"203c";
when "00" & x"178" => DATA <= x"003f";
when "00" & x"179" => DATA <= x"27f1";
when "00" & x"17a" => DATA <= x"6100";
when "00" & x"17b" => DATA <= x"070c";
when "00" & x"17c" => DATA <= x"2038";
when "00" & x"17d" => DATA <= x"0508";
when "00" & x"17e" => DATA <= x"ea88";
when "00" & x"17f" => DATA <= x"ea88";
when "00" & x"180" => DATA <= x"223c";
when "00" & x"181" => DATA <= x"0000";
when "00" & x"182" => DATA <= x"0600";
when "00" & x"183" => DATA <= x"243c";
when "00" & x"184" => DATA <= x"0000";
when "00" & x"185" => DATA <= x"00ff";
when "00" & x"186" => DATA <= x"6100";
when "00" & x"187" => DATA <= x"1484";
when "00" & x"188" => DATA <= x"203c";
when "00" & x"189" => DATA <= x"0000";
when "00" & x"18a" => DATA <= x"0600";
when "00" & x"18b" => DATA <= x"6100";
when "00" & x"18c" => DATA <= x"06ea";
when "00" & x"18d" => DATA <= x"203c";
when "00" & x"18e" => DATA <= x"003f";
when "00" & x"18f" => DATA <= x"281f";
when "00" & x"190" => DATA <= x"7207";
when "00" & x"191" => DATA <= x"6100";
when "00" & x"192" => DATA <= x"104e";
when "00" & x"193" => DATA <= x"7227";
when "00" & x"194" => DATA <= x"6100";
when "00" & x"195" => DATA <= x"0e2a";
when "00" & x"196" => DATA <= x"6100";
when "00" & x"197" => DATA <= x"00a6";
when "00" & x"198" => DATA <= x"2f00";
when "00" & x"199" => DATA <= x"7001";
when "00" & x"19a" => DATA <= x"223c";
when "00" & x"19b" => DATA <= x"0000";
when "00" & x"19c" => DATA <= x"0528";
when "00" & x"19d" => DATA <= x"6100";
when "00" & x"19e" => DATA <= x"08ac";
when "00" & x"19f" => DATA <= x"11fc";
when "00" & x"1a0" => DATA <= x"0000";
when "00" & x"1a1" => DATA <= x"052d";
when "00" & x"1a2" => DATA <= x"11fc";
when "00" & x"1a3" => DATA <= x"0000";
when "00" & x"1a4" => DATA <= x"052e";
when "00" & x"1a5" => DATA <= x"11fc";
when "00" & x"1a6" => DATA <= x"0000";
when "00" & x"1a7" => DATA <= x"052f";
when "00" & x"1a8" => DATA <= x"11fc";
when "00" & x"1a9" => DATA <= x"0000";
when "00" & x"1aa" => DATA <= x"0530";
when "00" & x"1ab" => DATA <= x"11fc";
when "00" & x"1ac" => DATA <= x"0000";
when "00" & x"1ad" => DATA <= x"0531";
when "00" & x"1ae" => DATA <= x"201f";
when "00" & x"1af" => DATA <= x"b03c";
when "00" & x"1b0" => DATA <= x"0080";
when "00" & x"1b1" => DATA <= x"103c";
when "00" & x"1b2" => DATA <= x"002a";
when "00" & x"1b3" => DATA <= x"6100";
when "00" & x"1b4" => DATA <= x"0682";
when "00" & x"1b5" => DATA <= x"203c";
when "00" & x"1b6" => DATA <= x"0000";
when "00" & x"1b7" => DATA <= x"0600";
when "00" & x"1b8" => DATA <= x"223c";
when "00" & x"1b9" => DATA <= x"0000";
when "00" & x"1ba" => DATA <= x"00ff";
when "00" & x"1bb" => DATA <= x"143c";
when "00" & x"1bc" => DATA <= x"0020";
when "00" & x"1bd" => DATA <= x"163c";
when "00" & x"1be" => DATA <= x"00ff";
when "00" & x"1bf" => DATA <= x"207c";
when "00" & x"1c0" => DATA <= x"0000";
when "00" & x"1c1" => DATA <= x"007d";
when "00" & x"1c2" => DATA <= x"4e4c";
when "00" & x"1c3" => DATA <= x"6500";
when "00" & x"1c4" => DATA <= x"0012";
when "00" & x"1c5" => DATA <= x"203c";
when "00" & x"1c6" => DATA <= x"0000";
when "00" & x"1c7" => DATA <= x"0600";
when "00" & x"1c8" => DATA <= x"207c";
when "00" & x"1c9" => DATA <= x"0000";
when "00" & x"1ca" => DATA <= x"0005";
when "00" & x"1cb" => DATA <= x"4e4c";
when "00" & x"1cc" => DATA <= x"60c8";
when "00" & x"1cd" => DATA <= x"707e";
when "00" & x"1ce" => DATA <= x"6100";
when "00" & x"1cf" => DATA <= x"0738";
when "00" & x"1d0" => DATA <= x"203c";
when "00" & x"1d1" => DATA <= x"003f";
when "00" & x"1d2" => DATA <= x"2d7c";
when "00" & x"1d3" => DATA <= x"207c";
when "00" & x"1d4" => DATA <= x"0000";
when "00" & x"1d5" => DATA <= x"002b";
when "00" & x"1d6" => DATA <= x"4e4c";
when "00" & x"1d7" => DATA <= x"60b2";
when "00" & x"1d8" => DATA <= x"0839";
when "00" & x"1d9" => DATA <= x"0007";
when "00" & x"1da" => DATA <= x"fffe";
when "00" & x"1db" => DATA <= x"0000";
when "00" & x"1dc" => DATA <= x"6600";
when "00" & x"1dd" => DATA <= x"0012";
when "00" & x"1de" => DATA <= x"0839";
when "00" & x"1df" => DATA <= x"0007";
when "00" & x"1e0" => DATA <= x"fffe";
when "00" & x"1e1" => DATA <= x"0006";
when "00" & x"1e2" => DATA <= x"67ea";
when "00" & x"1e3" => DATA <= x"6100";
when "00" & x"1e4" => DATA <= x"00f0";
when "00" & x"1e5" => DATA <= x"60e4";
when "00" & x"1e6" => DATA <= x"1039";
when "00" & x"1e7" => DATA <= x"fffe";
when "00" & x"1e8" => DATA <= x"0001";
when "00" & x"1e9" => DATA <= x"4e75";
when "00" & x"1ea" => DATA <= x"0839";
when "00" & x"1eb" => DATA <= x"0007";
when "00" & x"1ec" => DATA <= x"fffe";
when "00" & x"1ed" => DATA <= x"0002";
when "00" & x"1ee" => DATA <= x"67f6";
when "00" & x"1ef" => DATA <= x"1039";
when "00" & x"1f0" => DATA <= x"fffe";
when "00" & x"1f1" => DATA <= x"0003";
when "00" & x"1f2" => DATA <= x"4e75";
when "00" & x"1f3" => DATA <= x"0839";
when "00" & x"1f4" => DATA <= x"0006";
when "00" & x"1f5" => DATA <= x"fffe";
when "00" & x"1f6" => DATA <= x"0002";
when "00" & x"1f7" => DATA <= x"67f6";
when "00" & x"1f8" => DATA <= x"13c0";
when "00" & x"1f9" => DATA <= x"fffe";
when "00" & x"1fa" => DATA <= x"0003";
when "00" & x"1fb" => DATA <= x"4e75";
when "00" & x"1fc" => DATA <= x"0839";
when "00" & x"1fd" => DATA <= x"0007";
when "00" & x"1fe" => DATA <= x"fffe";
when "00" & x"1ff" => DATA <= x"0006";
when "00" & x"200" => DATA <= x"67f6";
when "00" & x"201" => DATA <= x"1039";
when "00" & x"202" => DATA <= x"fffe";
when "00" & x"203" => DATA <= x"0007";
when "00" & x"204" => DATA <= x"4e75";
when "00" & x"205" => DATA <= x"4280";
when "00" & x"206" => DATA <= x"61c6";
when "00" & x"207" => DATA <= x"e198";
when "00" & x"208" => DATA <= x"61c2";
when "00" & x"209" => DATA <= x"e198";
when "00" & x"20a" => DATA <= x"61be";
when "00" & x"20b" => DATA <= x"e198";
when "00" & x"20c" => DATA <= x"60ba";
when "00" & x"20d" => DATA <= x"e198";
when "00" & x"20e" => DATA <= x"61c8";
when "00" & x"20f" => DATA <= x"e198";
when "00" & x"210" => DATA <= x"61c4";
when "00" & x"211" => DATA <= x"e198";
when "00" & x"212" => DATA <= x"61c0";
when "00" & x"213" => DATA <= x"e198";
when "00" & x"214" => DATA <= x"60bc";
when "00" & x"215" => DATA <= x"4280";
when "00" & x"216" => DATA <= x"61ca";
when "00" & x"217" => DATA <= x"e198";
when "00" & x"218" => DATA <= x"61c6";
when "00" & x"219" => DATA <= x"e198";
when "00" & x"21a" => DATA <= x"61c2";
when "00" & x"21b" => DATA <= x"e198";
when "00" & x"21c" => DATA <= x"60be";
when "00" & x"21d" => DATA <= x"0839";
when "00" & x"21e" => DATA <= x"0006";
when "00" & x"21f" => DATA <= x"fffe";
when "00" & x"220" => DATA <= x"0002";
when "00" & x"221" => DATA <= x"67f6";
when "00" & x"222" => DATA <= x"101e";
when "00" & x"223" => DATA <= x"619e";
when "00" & x"224" => DATA <= x"b03c";
when "00" & x"225" => DATA <= x"000d";
when "00" & x"226" => DATA <= x"66ec";
when "00" & x"227" => DATA <= x"4e75";
when "00" & x"228" => DATA <= x"0839";
when "00" & x"229" => DATA <= x"0007";
when "00" & x"22a" => DATA <= x"fffe";
when "00" & x"22b" => DATA <= x"0006";
when "00" & x"22c" => DATA <= x"6600";
when "00" & x"22d" => DATA <= x"005e";
when "00" & x"22e" => DATA <= x"0839";
when "00" & x"22f" => DATA <= x"0007";
when "00" & x"230" => DATA <= x"fffe";
when "00" & x"231" => DATA <= x"0000";
when "00" & x"232" => DATA <= x"6600";
when "00" & x"233" => DATA <= x"0010";
when "00" & x"234" => DATA <= x"2f0e";
when "00" & x"235" => DATA <= x"2c79";
when "00" & x"236" => DATA <= x"0000";
when "00" & x"237" => DATA <= x"0408";
when "00" & x"238" => DATA <= x"4e96";
when "00" & x"239" => DATA <= x"2c5f";
when "00" & x"23a" => DATA <= x"4e73";
when "00" & x"23b" => DATA <= x"2f00";
when "00" & x"23c" => DATA <= x"1039";
when "00" & x"23d" => DATA <= x"fffe";
when "00" & x"23e" => DATA <= x"0001";
when "00" & x"23f" => DATA <= x"6b00";
when "00" & x"240" => DATA <= x"0028";
when "00" & x"241" => DATA <= x"2f01";
when "00" & x"242" => DATA <= x"4280";
when "00" & x"243" => DATA <= x"6100";
when "00" & x"244" => DATA <= x"ff28";
when "00" & x"245" => DATA <= x"e158";
when "00" & x"246" => DATA <= x"6100";
when "00" & x"247" => DATA <= x"ff22";
when "00" & x"248" => DATA <= x"3200";
when "00" & x"249" => DATA <= x"6100";
when "00" & x"24a" => DATA <= x"ff1c";
when "00" & x"24b" => DATA <= x"2f0e";
when "00" & x"24c" => DATA <= x"2c79";
when "00" & x"24d" => DATA <= x"0000";
when "00" & x"24e" => DATA <= x"0440";
when "00" & x"24f" => DATA <= x"4e96";
when "00" & x"250" => DATA <= x"2c5f";
when "00" & x"251" => DATA <= x"221f";
when "00" & x"252" => DATA <= x"201f";
when "00" & x"253" => DATA <= x"4e73";
when "00" & x"254" => DATA <= x"2f0e";
when "00" & x"255" => DATA <= x"2c79";
when "00" & x"256" => DATA <= x"0000";
when "00" & x"257" => DATA <= x"04cc";
when "00" & x"258" => DATA <= x"4e96";
when "00" & x"259" => DATA <= x"2c5f";
when "00" & x"25a" => DATA <= x"201f";
when "00" & x"25b" => DATA <= x"4e73";
when "00" & x"25c" => DATA <= x"1039";
when "00" & x"25d" => DATA <= x"fffe";
when "00" & x"25e" => DATA <= x"0007";
when "00" & x"25f" => DATA <= x"6a00";
when "00" & x"260" => DATA <= x"003c";
when "00" & x"261" => DATA <= x"2f00";
when "00" & x"262" => DATA <= x"2f0e";
when "00" & x"263" => DATA <= x"2c7c";
when "00" & x"264" => DATA <= x"0000";
when "00" & x"265" => DATA <= x"0700";
when "00" & x"266" => DATA <= x"6100";
when "00" & x"267" => DATA <= x"ff06";
when "00" & x"268" => DATA <= x"4280";
when "00" & x"269" => DATA <= x"6100";
when "00" & x"26a" => DATA <= x"ff00";
when "00" & x"26b" => DATA <= x"2cc0";
when "00" & x"26c" => DATA <= x"6100";
when "00" & x"26d" => DATA <= x"fefa";
when "00" & x"26e" => DATA <= x"1cc0";
when "00" & x"26f" => DATA <= x"66f8";
when "00" & x"270" => DATA <= x"2c5f";
when "00" & x"271" => DATA <= x"203c";
when "00" & x"272" => DATA <= x"0000";
when "00" & x"273" => DATA <= x"0700";
when "00" & x"274" => DATA <= x"21c0";
when "00" & x"275" => DATA <= x"0514";
when "00" & x"276" => DATA <= x"21fc";
when "00" & x"277" => DATA <= x"ffff";
when "00" & x"278" => DATA <= x"6502";
when "00" & x"279" => DATA <= x"0510";
when "00" & x"27a" => DATA <= x"6100";
when "00" & x"27b" => DATA <= x"0c2e";
when "00" & x"27c" => DATA <= x"201f";
when "00" & x"27d" => DATA <= x"4e73";
when "00" & x"27e" => DATA <= x"2f08";
when "00" & x"27f" => DATA <= x"2f00";
when "00" & x"280" => DATA <= x"0280";
when "00" & x"281" => DATA <= x"0000";
when "00" & x"282" => DATA <= x"00ff";
when "00" & x"283" => DATA <= x"e588";
when "00" & x"284" => DATA <= x"41f9";
when "00" & x"285" => DATA <= x"003f";
when "00" & x"286" => DATA <= x"060a";
when "00" & x"287" => DATA <= x"d1c0";
when "00" & x"288" => DATA <= x"21d0";
when "00" & x"289" => DATA <= x"0074";
when "00" & x"28a" => DATA <= x"6100";
when "00" & x"28b" => DATA <= x"fee2";
when "00" & x"28c" => DATA <= x"2017";
when "00" & x"28d" => DATA <= x"b03c";
when "00" & x"28e" => DATA <= x"0005";
when "00" & x"28f" => DATA <= x"6700";
when "00" & x"290" => DATA <= x"005c";
when "00" & x"291" => DATA <= x"6100";
when "00" & x"292" => DATA <= x"ff06";
when "00" & x"293" => DATA <= x"23c0";
when "00" & x"294" => DATA <= x"0000";
when "00" & x"295" => DATA <= x"0520";
when "00" & x"296" => DATA <= x"1039";
when "00" & x"297" => DATA <= x"fffe";
when "00" & x"298" => DATA <= x"0005";
when "00" & x"299" => DATA <= x"1039";
when "00" & x"29a" => DATA <= x"fffe";
when "00" & x"29b" => DATA <= x"0005";
when "00" & x"29c" => DATA <= x"6100";
when "00" & x"29d" => DATA <= x"febe";
when "00" & x"29e" => DATA <= x"2017";
when "00" & x"29f" => DATA <= x"b03c";
when "00" & x"2a0" => DATA <= x"0006";
when "00" & x"2a1" => DATA <= x"6500";
when "00" & x"2a2" => DATA <= x"0038";
when "00" & x"2a3" => DATA <= x"6600";
when "00" & x"2a4" => DATA <= x"003a";
when "00" & x"2a5" => DATA <= x"2f0e";
when "00" & x"2a6" => DATA <= x"2c78";
when "00" & x"2a7" => DATA <= x"0520";
when "00" & x"2a8" => DATA <= x"203c";
when "00" & x"2a9" => DATA <= x"0000";
when "00" & x"2aa" => DATA <= x"00ff";
when "00" & x"2ab" => DATA <= x"0839";
when "00" & x"2ac" => DATA <= x"0007";
when "00" & x"2ad" => DATA <= x"fffe";
when "00" & x"2ae" => DATA <= x"0004";
when "00" & x"2af" => DATA <= x"67f6";
when "00" & x"2b0" => DATA <= x"13de";
when "00" & x"2b1" => DATA <= x"fffe";
when "00" & x"2b2" => DATA <= x"0005";
when "00" & x"2b3" => DATA <= x"51c8";
when "00" & x"2b4" => DATA <= x"ffee";
when "00" & x"2b5" => DATA <= x"0839";
when "00" & x"2b6" => DATA <= x"0007";
when "00" & x"2b7" => DATA <= x"fffe";
when "00" & x"2b8" => DATA <= x"0004";
when "00" & x"2b9" => DATA <= x"67f6";
when "00" & x"2ba" => DATA <= x"13e6";
when "00" & x"2bb" => DATA <= x"fffe";
when "00" & x"2bc" => DATA <= x"0005";
when "00" & x"2bd" => DATA <= x"2c5f";
when "00" & x"2be" => DATA <= x"201f";
when "00" & x"2bf" => DATA <= x"205f";
when "00" & x"2c0" => DATA <= x"4e73";
when "00" & x"2c1" => DATA <= x"2f0e";
when "00" & x"2c2" => DATA <= x"2c78";
when "00" & x"2c3" => DATA <= x"0520";
when "00" & x"2c4" => DATA <= x"203c";
when "00" & x"2c5" => DATA <= x"0000";
when "00" & x"2c6" => DATA <= x"00ff";
when "00" & x"2c7" => DATA <= x"0839";
when "00" & x"2c8" => DATA <= x"0007";
when "00" & x"2c9" => DATA <= x"fffe";
when "00" & x"2ca" => DATA <= x"0004";
when "00" & x"2cb" => DATA <= x"67f6";
when "00" & x"2cc" => DATA <= x"1cf9";
when "00" & x"2cd" => DATA <= x"fffe";
when "00" & x"2ce" => DATA <= x"0005";
when "00" & x"2cf" => DATA <= x"51c8";
when "00" & x"2d0" => DATA <= x"ffee";
when "00" & x"2d1" => DATA <= x"2c5f";
when "00" & x"2d2" => DATA <= x"60d6";
when "00" & x"2d3" => DATA <= x"2f0e";
when "00" & x"2d4" => DATA <= x"2c78";
when "00" & x"2d5" => DATA <= x"0520";
when "00" & x"2d6" => DATA <= x"13de";
when "00" & x"2d7" => DATA <= x"fffe";
when "00" & x"2d8" => DATA <= x"0005";
when "00" & x"2d9" => DATA <= x"21ce";
when "00" & x"2da" => DATA <= x"0520";
when "00" & x"2db" => DATA <= x"2c5f";
when "00" & x"2dc" => DATA <= x"4e73";
when "00" & x"2dd" => DATA <= x"2f0e";
when "00" & x"2de" => DATA <= x"2c78";
when "00" & x"2df" => DATA <= x"0520";
when "00" & x"2e0" => DATA <= x"1cf9";
when "00" & x"2e1" => DATA <= x"fffe";
when "00" & x"2e2" => DATA <= x"0005";
when "00" & x"2e3" => DATA <= x"21ce";
when "00" & x"2e4" => DATA <= x"0520";
when "00" & x"2e5" => DATA <= x"2c5f";
when "00" & x"2e6" => DATA <= x"4e73";
when "00" & x"2e7" => DATA <= x"2f0e";
when "00" & x"2e8" => DATA <= x"2c78";
when "00" & x"2e9" => DATA <= x"0520";
when "00" & x"2ea" => DATA <= x"13de";
when "00" & x"2eb" => DATA <= x"fffe";
when "00" & x"2ec" => DATA <= x"0005";
when "00" & x"2ed" => DATA <= x"13de";
when "00" & x"2ee" => DATA <= x"fffe";
when "00" & x"2ef" => DATA <= x"0005";
when "00" & x"2f0" => DATA <= x"21ce";
when "00" & x"2f1" => DATA <= x"0520";
when "00" & x"2f2" => DATA <= x"2c5f";
when "00" & x"2f3" => DATA <= x"4e73";
when "00" & x"2f4" => DATA <= x"2f0e";
when "00" & x"2f5" => DATA <= x"2c78";
when "00" & x"2f6" => DATA <= x"0520";
when "00" & x"2f7" => DATA <= x"1cf9";
when "00" & x"2f8" => DATA <= x"fffe";
when "00" & x"2f9" => DATA <= x"0005";
when "00" & x"2fa" => DATA <= x"1cf9";
when "00" & x"2fb" => DATA <= x"fffe";
when "00" & x"2fc" => DATA <= x"0005";
when "00" & x"2fd" => DATA <= x"21ce";
when "00" & x"2fe" => DATA <= x"0520";
when "00" & x"2ff" => DATA <= x"2c5f";
when "00" & x"300" => DATA <= x"4e73";
when "00" & x"301" => DATA <= x"13c0";
when "00" & x"302" => DATA <= x"fffe";
when "00" & x"303" => DATA <= x"0005";
when "00" & x"304" => DATA <= x"4e73";
when "00" & x"305" => DATA <= x"003f";
when "00" & x"306" => DATA <= x"05a6";
when "00" & x"307" => DATA <= x"003f";
when "00" & x"308" => DATA <= x"05ba";
when "00" & x"309" => DATA <= x"003f";
when "00" & x"30a" => DATA <= x"05ce";
when "00" & x"30b" => DATA <= x"003f";
when "00" & x"30c" => DATA <= x"05e8";
when "00" & x"30d" => DATA <= x"003f";
when "00" & x"30e" => DATA <= x"0602";
when "00" & x"30f" => DATA <= x"003f";
when "00" & x"310" => DATA <= x"0602";
when "00" & x"311" => DATA <= x"003f";
when "00" & x"312" => DATA <= x"0602";
when "00" & x"313" => DATA <= x"003f";
when "00" & x"314" => DATA <= x"0602";
when "00" & x"315" => DATA <= x"203c";
when "00" & x"316" => DATA <= x"003f";
when "00" & x"317" => DATA <= x"2c4d";
when "00" & x"318" => DATA <= x"6100";
when "00" & x"319" => DATA <= x"03d0";
when "00" & x"31a" => DATA <= x"31df";
when "00" & x"31b" => DATA <= x"0544";
when "00" & x"31c" => DATA <= x"21df";
when "00" & x"31d" => DATA <= x"0540";
when "00" & x"31e" => DATA <= x"31df";
when "00" & x"31f" => DATA <= x"053e";
when "00" & x"320" => DATA <= x"31df";
when "00" & x"321" => DATA <= x"053c";
when "00" & x"322" => DATA <= x"21d7";
when "00" & x"323" => DATA <= x"0538";
when "00" & x"324" => DATA <= x"223c";
when "00" & x"325" => DATA <= x"0000";
when "00" & x"326" => DATA <= x"0600";
when "00" & x"327" => DATA <= x"143c";
when "00" & x"328" => DATA <= x"00ff";
when "00" & x"329" => DATA <= x"7000";
when "00" & x"32a" => DATA <= x"2038";
when "00" & x"32b" => DATA <= x"0538";
when "00" & x"32c" => DATA <= x"6100";
when "00" & x"32d" => DATA <= x"1090";
when "00" & x"32e" => DATA <= x"6100";
when "00" & x"32f" => DATA <= x"03a4";
when "00" & x"330" => DATA <= x"6100";
when "00" & x"331" => DATA <= x"03b4";
when "00" & x"332" => DATA <= x"203c";
when "00" & x"333" => DATA <= x"003f";
when "00" & x"334" => DATA <= x"2c7d";
when "00" & x"335" => DATA <= x"6100";
when "00" & x"336" => DATA <= x"0396";
when "00" & x"337" => DATA <= x"223c";
when "00" & x"338" => DATA <= x"0000";
when "00" & x"339" => DATA <= x"0600";
when "00" & x"33a" => DATA <= x"143c";
when "00" & x"33b" => DATA <= x"00ff";
when "00" & x"33c" => DATA <= x"7000";
when "00" & x"33d" => DATA <= x"3038";
when "00" & x"33e" => DATA <= x"0544";
when "00" & x"33f" => DATA <= x"6100";
when "00" & x"340" => DATA <= x"1030";
when "00" & x"341" => DATA <= x"6100";
when "00" & x"342" => DATA <= x"037e";
when "00" & x"343" => DATA <= x"6100";
when "00" & x"344" => DATA <= x"038e";
when "00" & x"345" => DATA <= x"203c";
when "00" & x"346" => DATA <= x"003f";
when "00" & x"347" => DATA <= x"2c94";
when "00" & x"348" => DATA <= x"6100";
when "00" & x"349" => DATA <= x"0370";
when "00" & x"34a" => DATA <= x"223c";
when "00" & x"34b" => DATA <= x"0000";
when "00" & x"34c" => DATA <= x"0600";
when "00" & x"34d" => DATA <= x"143c";
when "00" & x"34e" => DATA <= x"00ff";
when "00" & x"34f" => DATA <= x"7000";
when "00" & x"350" => DATA <= x"2038";
when "00" & x"351" => DATA <= x"0540";
when "00" & x"352" => DATA <= x"6100";
when "00" & x"353" => DATA <= x"1044";
when "00" & x"354" => DATA <= x"6100";
when "00" & x"355" => DATA <= x"0358";
when "00" & x"356" => DATA <= x"6100";
when "00" & x"357" => DATA <= x"0368";
when "00" & x"358" => DATA <= x"203c";
when "00" & x"359" => DATA <= x"003f";
when "00" & x"35a" => DATA <= x"2cab";
when "00" & x"35b" => DATA <= x"6100";
when "00" & x"35c" => DATA <= x"034a";
when "00" & x"35d" => DATA <= x"223c";
when "00" & x"35e" => DATA <= x"0000";
when "00" & x"35f" => DATA <= x"0600";
when "00" & x"360" => DATA <= x"143c";
when "00" & x"361" => DATA <= x"00ff";
when "00" & x"362" => DATA <= x"7000";
when "00" & x"363" => DATA <= x"3038";
when "00" & x"364" => DATA <= x"053e";
when "00" & x"365" => DATA <= x"6100";
when "00" & x"366" => DATA <= x"0fe4";
when "00" & x"367" => DATA <= x"6100";
when "00" & x"368" => DATA <= x"0332";
when "00" & x"369" => DATA <= x"103c";
when "00" & x"36a" => DATA <= x"0020";
when "00" & x"36b" => DATA <= x"6100";
when "00" & x"36c" => DATA <= x"0312";
when "00" & x"36d" => DATA <= x"103c";
when "00" & x"36e" => DATA <= x"005b";
when "00" & x"36f" => DATA <= x"6100";
when "00" & x"370" => DATA <= x"030a";
when "00" & x"371" => DATA <= x"303c";
when "00" & x"372" => DATA <= x"053e";
when "00" & x"373" => DATA <= x"223c";
when "00" & x"374" => DATA <= x"0000";
when "00" & x"375" => DATA <= x"0600";
when "00" & x"376" => DATA <= x"6100";
when "00" & x"377" => DATA <= x"1422";
when "00" & x"378" => DATA <= x"2001";
when "00" & x"379" => DATA <= x"6100";
when "00" & x"37a" => DATA <= x"030e";
when "00" & x"37b" => DATA <= x"103c";
when "00" & x"37c" => DATA <= x"005d";
when "00" & x"37d" => DATA <= x"6100";
when "00" & x"37e" => DATA <= x"02ee";
when "00" & x"37f" => DATA <= x"6100";
when "00" & x"380" => DATA <= x"0316";
when "00" & x"381" => DATA <= x"203c";
when "00" & x"382" => DATA <= x"003f";
when "00" & x"383" => DATA <= x"2cc2";
when "00" & x"384" => DATA <= x"6100";
when "00" & x"385" => DATA <= x"02f8";
when "00" & x"386" => DATA <= x"223c";
when "00" & x"387" => DATA <= x"0000";
when "00" & x"388" => DATA <= x"0600";
when "00" & x"389" => DATA <= x"143c";
when "00" & x"38a" => DATA <= x"00ff";
when "00" & x"38b" => DATA <= x"7000";
when "00" & x"38c" => DATA <= x"3038";
when "00" & x"38d" => DATA <= x"053c";
when "00" & x"38e" => DATA <= x"6100";
when "00" & x"38f" => DATA <= x"120e";
when "00" & x"390" => DATA <= x"6100";
when "00" & x"391" => DATA <= x"02e0";
when "00" & x"392" => DATA <= x"6100";
when "00" & x"393" => DATA <= x"02f0";
when "00" & x"394" => DATA <= x"60fe";
when "00" & x"395" => DATA <= x"6100";
when "00" & x"396" => DATA <= x"02f8";
when "00" & x"397" => DATA <= x"6000";
when "00" & x"398" => DATA <= x"fc32";
when "00" & x"399" => DATA <= x"203c";
when "00" & x"39a" => DATA <= x"003f";
when "00" & x"39b" => DATA <= x"2c5e";
when "00" & x"39c" => DATA <= x"6100";
when "00" & x"39d" => DATA <= x"02c8";
when "00" & x"39e" => DATA <= x"6000";
when "00" & x"39f" => DATA <= x"fef6";
when "00" & x"3a0" => DATA <= x"2f00";
when "00" & x"3a1" => DATA <= x"203c";
when "00" & x"3a2" => DATA <= x"003f";
when "00" & x"3a3" => DATA <= x"2d04";
when "00" & x"3a4" => DATA <= x"6000";
when "00" & x"3a5" => DATA <= x"0022";
when "00" & x"3a6" => DATA <= x"2f00";
when "00" & x"3a7" => DATA <= x"203c";
when "00" & x"3a8" => DATA <= x"003f";
when "00" & x"3a9" => DATA <= x"2d34";
when "00" & x"3aa" => DATA <= x"6000";
when "00" & x"3ab" => DATA <= x"0016";
when "00" & x"3ac" => DATA <= x"2f00";
when "00" & x"3ad" => DATA <= x"203c";
when "00" & x"3ae" => DATA <= x"003f";
when "00" & x"3af" => DATA <= x"2d50";
when "00" & x"3b0" => DATA <= x"6000";
when "00" & x"3b1" => DATA <= x"000a";
when "00" & x"3b2" => DATA <= x"2f00";
when "00" & x"3b3" => DATA <= x"203c";
when "00" & x"3b4" => DATA <= x"003f";
when "00" & x"3b5" => DATA <= x"2dc0";
when "00" & x"3b6" => DATA <= x"21ef";
when "00" & x"3b7" => DATA <= x"0006";
when "00" & x"3b8" => DATA <= x"0510";
when "00" & x"3b9" => DATA <= x"6100";
when "00" & x"3ba" => DATA <= x"09b0";
when "00" & x"3bb" => DATA <= x"201f";
when "00" & x"3bc" => DATA <= x"4e73";
when "00" & x"3bd" => DATA <= x"203c";
when "00" & x"3be" => DATA <= x"003f";
when "00" & x"3bf" => DATA <= x"2dd8";
when "00" & x"3c0" => DATA <= x"207c";
when "00" & x"3c1" => DATA <= x"0000";
when "00" & x"3c2" => DATA <= x"002b";
when "00" & x"3c3" => DATA <= x"4e4c";
when "00" & x"3c4" => DATA <= x"4e75";
when "00" & x"3c5" => DATA <= x"7000";
when "00" & x"3c6" => DATA <= x"2a40";
when "00" & x"3c7" => DATA <= x"206d";
when "00" & x"3c8" => DATA <= x"000c";
when "00" & x"3c9" => DATA <= x"43fa";
when "00" & x"3ca" => DATA <= x"000e";
when "00" & x"3cb" => DATA <= x"2b49";
when "00" & x"3cc" => DATA <= x"000c";
when "00" & x"3cd" => DATA <= x"2e0f";
when "00" & x"3ce" => DATA <= x"2c07";
when "00" & x"3cf" => DATA <= x"4efa";
when "00" & x"3d0" => DATA <= x"0003";
when "00" & x"3d1" => DATA <= x"2b48";
when "00" & x"3d2" => DATA <= x"000c";
when "00" & x"3d3" => DATA <= x"9e8f";
when "00" & x"3d4" => DATA <= x"7001";
when "00" & x"3d5" => DATA <= x"0c07";
when "00" & x"3d6" => DATA <= x"0012";
when "00" & x"3d7" => DATA <= x"6754";
when "00" & x"3d8" => DATA <= x"7002";
when "00" & x"3d9" => DATA <= x"0c07";
when "00" & x"3da" => DATA <= x"003e";
when "00" & x"3db" => DATA <= x"674c";
when "00" & x"3dc" => DATA <= x"7007";
when "00" & x"3dd" => DATA <= x"0c07";
when "00" & x"3de" => DATA <= x"0026";
when "00" & x"3df" => DATA <= x"6744";
when "00" & x"3e0" => DATA <= x"7008";
when "00" & x"3e1" => DATA <= x"0c07";
when "00" & x"3e2" => DATA <= x"001c";
when "00" & x"3e3" => DATA <= x"673c";
when "00" & x"3e4" => DATA <= x"7005";
when "00" & x"3e5" => DATA <= x"0c07";
when "00" & x"3e6" => DATA <= x"0010";
when "00" & x"3e7" => DATA <= x"6734";
when "00" & x"3e8" => DATA <= x"70ff";
when "00" & x"3e9" => DATA <= x"0c07";
when "00" & x"3ea" => DATA <= x"0024";
when "00" & x"3eb" => DATA <= x"662c";
when "00" & x"3ec" => DATA <= x"206d";
when "00" & x"3ed" => DATA <= x"001a";
when "00" & x"3ee" => DATA <= x"226d";
when "00" & x"3ef" => DATA <= x"007e";
when "00" & x"3f0" => DATA <= x"45fa";
when "00" & x"3f1" => DATA <= x"001a";
when "00" & x"3f2" => DATA <= x"2b4a";
when "00" & x"3f3" => DATA <= x"007e";
when "00" & x"3f4" => DATA <= x"45fa";
when "00" & x"3f5" => DATA <= x"0010";
when "00" & x"3f6" => DATA <= x"2b4a";
when "00" & x"3f7" => DATA <= x"001a";
when "00" & x"3f8" => DATA <= x"7003";
when "00" & x"3f9" => DATA <= x"06fa";
when "00" & x"3fa" => DATA <= x"0000";
when "00" & x"3fb" => DATA <= x"0002";
when "00" & x"3fc" => DATA <= x"ffff";
when "00" & x"3fd" => DATA <= x"7004";
when "00" & x"3fe" => DATA <= x"2b49";
when "00" & x"3ff" => DATA <= x"007e";
when "00" & x"400" => DATA <= x"2b48";
when "00" & x"401" => DATA <= x"001a";
when "00" & x"402" => DATA <= x"2e46";
when "00" & x"403" => DATA <= x"4e75";
when "00" & x"404" => DATA <= x"7000";
when "00" & x"405" => DATA <= x"2a40";
when "00" & x"406" => DATA <= x"206d";
when "00" & x"407" => DATA <= x"002c";
when "00" & x"408" => DATA <= x"43fa";
when "00" & x"409" => DATA <= x"000e";
when "00" & x"40a" => DATA <= x"2b49";
when "00" & x"40b" => DATA <= x"002c";
when "00" & x"40c" => DATA <= x"2e0f";
when "00" & x"40d" => DATA <= x"70ff";
when "00" & x"40e" => DATA <= x"6000";
when "00" & x"40f" => DATA <= x"0004";
when "00" & x"410" => DATA <= x"7000";
when "00" & x"411" => DATA <= x"2e47";
when "00" & x"412" => DATA <= x"2b48";
when "00" & x"413" => DATA <= x"002c";
when "00" & x"414" => DATA <= x"4e75";
when "00" & x"415" => DATA <= x"7000";
when "00" & x"416" => DATA <= x"4e75";
when "00" & x"417" => DATA <= x"13fc";
when "00" & x"418" => DATA <= x"00f0";
when "00" & x"419" => DATA <= x"003f";
when "00" & x"41a" => DATA <= x"0000";
when "00" & x"41b" => DATA <= x"13fc";
when "00" & x"41c" => DATA <= x"00ff";
when "00" & x"41d" => DATA <= x"003f";
when "00" & x"41e" => DATA <= x"0000";
when "00" & x"41f" => DATA <= x"4e75";
when "00" & x"420" => DATA <= x"13fc";
when "00" & x"421" => DATA <= x"00aa";
when "00" & x"422" => DATA <= x"003f";
when "00" & x"423" => DATA <= x"5555";
when "00" & x"424" => DATA <= x"13fc";
when "00" & x"425" => DATA <= x"0055";
when "00" & x"426" => DATA <= x"003f";
when "00" & x"427" => DATA <= x"aaaa";
when "00" & x"428" => DATA <= x"13fc";
when "00" & x"429" => DATA <= x"0090";
when "00" & x"42a" => DATA <= x"003f";
when "00" & x"42b" => DATA <= x"5555";
when "00" & x"42c" => DATA <= x"13c0";
when "00" & x"42d" => DATA <= x"003f";
when "00" & x"42e" => DATA <= x"0000";
when "00" & x"42f" => DATA <= x"e140";
when "00" & x"430" => DATA <= x"61cc";
when "00" & x"431" => DATA <= x"13fc";
when "00" & x"432" => DATA <= x"00aa";
when "00" & x"433" => DATA <= x"003f";
when "00" & x"434" => DATA <= x"5555";
when "00" & x"435" => DATA <= x"13fc";
when "00" & x"436" => DATA <= x"0055";
when "00" & x"437" => DATA <= x"003f";
when "00" & x"438" => DATA <= x"aaaa";
when "00" & x"439" => DATA <= x"13fc";
when "00" & x"43a" => DATA <= x"0090";
when "00" & x"43b" => DATA <= x"003f";
when "00" & x"43c" => DATA <= x"5555";
when "00" & x"43d" => DATA <= x"13c0";
when "00" & x"43e" => DATA <= x"003f";
when "00" & x"43f" => DATA <= x"0001";
when "00" & x"440" => DATA <= x"61ac";
when "00" & x"441" => DATA <= x"4e75";
when "00" & x"442" => DATA <= x"be3c";
when "00" & x"443" => DATA <= x"0008";
when "00" & x"444" => DATA <= x"6400";
when "00" & x"445" => DATA <= x"0012";
when "00" & x"446" => DATA <= x"e147";
when "00" & x"447" => DATA <= x"e147";
when "00" & x"448" => DATA <= x"223c";
when "00" & x"449" => DATA <= x"0000";
when "00" & x"44a" => DATA <= x"ffff";
when "00" & x"44b" => DATA <= x"1015";
when "00" & x"44c" => DATA <= x"6100";
when "00" & x"44d" => DATA <= x"0004";
when "00" & x"44e" => DATA <= x"4e75";
when "00" & x"44f" => DATA <= x"b016";
when "00" & x"450" => DATA <= x"6700";
when "00" & x"451" => DATA <= x"0026";
when "00" & x"452" => DATA <= x"13fc";
when "00" & x"453" => DATA <= x"00aa";
when "00" & x"454" => DATA <= x"003f";
when "00" & x"455" => DATA <= x"5555";
when "00" & x"456" => DATA <= x"13fc";
when "00" & x"457" => DATA <= x"0055";
when "00" & x"458" => DATA <= x"003f";
when "00" & x"459" => DATA <= x"aaaa";
when "00" & x"45a" => DATA <= x"13fc";
when "00" & x"45b" => DATA <= x"00a0";
when "00" & x"45c" => DATA <= x"003f";
when "00" & x"45d" => DATA <= x"5555";
when "00" & x"45e" => DATA <= x"1016";
when "00" & x"45f" => DATA <= x"0c16";
when "00" & x"460" => DATA <= x"0002";
when "00" & x"461" => DATA <= x"66fa";
when "00" & x"462" => DATA <= x"6100";
when "00" & x"463" => DATA <= x"ff68";
when "00" & x"464" => DATA <= x"4e75";
when "00" & x"465" => DATA <= x"2f08";
when "00" & x"466" => DATA <= x"2f38";
when "00" & x"467" => DATA <= x"0000";
when "00" & x"468" => DATA <= x"207c";
when "00" & x"469" => DATA <= x"0000";
when "00" & x"46a" => DATA <= x"0000";
when "00" & x"46b" => DATA <= x"21fc";
when "00" & x"46c" => DATA <= x"dead";
when "00" & x"46d" => DATA <= x"beef";
when "00" & x"46e" => DATA <= x"0000";
when "00" & x"46f" => DATA <= x"d1fc";
when "00" & x"470" => DATA <= x"0000";
when "00" & x"471" => DATA <= x"0400";
when "00" & x"472" => DATA <= x"0c90";
when "00" & x"473" => DATA <= x"dead";
when "00" & x"474" => DATA <= x"beef";
when "00" & x"475" => DATA <= x"6700";
when "00" & x"476" => DATA <= x"000a";
when "00" & x"477" => DATA <= x"b1fc";
when "00" & x"478" => DATA <= x"0030";
when "00" & x"479" => DATA <= x"0000";
when "00" & x"47a" => DATA <= x"65e8";
when "00" & x"47b" => DATA <= x"2008";
when "00" & x"47c" => DATA <= x"21df";
when "00" & x"47d" => DATA <= x"0000";
when "00" & x"47e" => DATA <= x"205f";
when "00" & x"47f" => DATA <= x"4e75";
when "00" & x"480" => DATA <= x"2f0e";
when "00" & x"481" => DATA <= x"2f09";
when "00" & x"482" => DATA <= x"2f08";
when "00" & x"483" => DATA <= x"2f01";
when "00" & x"484" => DATA <= x"c188";
when "00" & x"485" => DATA <= x"0280";
when "00" & x"486" => DATA <= x"00fd";
when "00" & x"487" => DATA <= x"ffff";
when "00" & x"488" => DATA <= x"43f9";
when "00" & x"489" => DATA <= x"003f";
when "00" & x"48a" => DATA <= x"2f54";
when "00" & x"48b" => DATA <= x"b099";
when "00" & x"48c" => DATA <= x"6700";
when "00" & x"48d" => DATA <= x"0014";
when "00" & x"48e" => DATA <= x"2219";
when "00" & x"48f" => DATA <= x"b23c";
when "00" & x"490" => DATA <= x"00ff";
when "00" & x"491" => DATA <= x"6700";
when "00" & x"492" => DATA <= x"0082";
when "00" & x"493" => DATA <= x"b23c";
when "00" & x"494" => DATA <= x"0000";
when "00" & x"495" => DATA <= x"66f0";
when "00" & x"496" => DATA <= x"60e8";
when "00" & x"497" => DATA <= x"2c59";
when "00" & x"498" => DATA <= x"c188";
when "00" & x"499" => DATA <= x"bdfc";
when "00" & x"49a" => DATA <= x"0000";
when "00" & x"49b" => DATA <= x"0504";
when "00" & x"49c" => DATA <= x"6400";
when "00" & x"49d" => DATA <= x"0004";
when "00" & x"49e" => DATA <= x"2c56";
when "00" & x"49f" => DATA <= x"221f";
when "00" & x"4a0" => DATA <= x"205f";
when "00" & x"4a1" => DATA <= x"225f";
when "00" & x"4a2" => DATA <= x"4e96";
when "00" & x"4a3" => DATA <= x"6900";
when "00" & x"4a4" => DATA <= x"001a";
when "00" & x"4a5" => DATA <= x"6500";
when "00" & x"4a6" => DATA <= x"000a";
when "00" & x"4a7" => DATA <= x"2c5f";
when "00" & x"4a8" => DATA <= x"0257";
when "00" & x"4a9" => DATA <= x"fffc";
when "00" & x"4aa" => DATA <= x"4e73";
when "00" & x"4ab" => DATA <= x"2c5f";
when "00" & x"4ac" => DATA <= x"0257";
when "00" & x"4ad" => DATA <= x"fffd";
when "00" & x"4ae" => DATA <= x"0057";
when "00" & x"4af" => DATA <= x"0001";
when "00" & x"4b0" => DATA <= x"4e73";
when "00" & x"4b1" => DATA <= x"6500";
when "00" & x"4b2" => DATA <= x"000e";
when "00" & x"4b3" => DATA <= x"0057";
when "00" & x"4b4" => DATA <= x"0002";
when "00" & x"4b5" => DATA <= x"0257";
when "00" & x"4b6" => DATA <= x"fffe";
when "00" & x"4b7" => DATA <= x"6000";
when "00" & x"4b8" => DATA <= x"0006";
when "00" & x"4b9" => DATA <= x"0057";
when "00" & x"4ba" => DATA <= x"0003";
when "00" & x"4bb" => DATA <= x"2c5f";
when "00" & x"4bc" => DATA <= x"c188";
when "00" & x"4bd" => DATA <= x"0800";
when "00" & x"4be" => DATA <= x"0011";
when "00" & x"4bf" => DATA <= x"6700";
when "00" & x"4c0" => DATA <= x"0006";
when "00" & x"4c1" => DATA <= x"c188";
when "00" & x"4c2" => DATA <= x"4e73";
when "00" & x"4c3" => DATA <= x"c188";
when "00" & x"4c4" => DATA <= x"2f01";
when "00" & x"4c5" => DATA <= x"7206";
when "00" & x"4c6" => DATA <= x"6100";
when "00" & x"4c7" => DATA <= x"07c6";
when "00" & x"4c8" => DATA <= x"221f";
when "00" & x"4c9" => DATA <= x"21c0";
when "00" & x"4ca" => DATA <= x"0514";
when "00" & x"4cb" => DATA <= x"21ef";
when "00" & x"4cc" => DATA <= x"0002";
when "00" & x"4cd" => DATA <= x"0510";
when "00" & x"4ce" => DATA <= x"2f79";
when "00" & x"4cf" => DATA <= x"0000";
when "00" & x"4d0" => DATA <= x"0404";
when "00" & x"4d1" => DATA <= x"0002";
when "00" & x"4d2" => DATA <= x"4e73";
when "00" & x"4d3" => DATA <= x"221f";
when "00" & x"4d4" => DATA <= x"205f";
when "00" & x"4d5" => DATA <= x"225f";
when "00" & x"4d6" => DATA <= x"2040";
when "00" & x"4d7" => DATA <= x"c0bc";
when "00" & x"4d8" => DATA <= x"00fd";
when "00" & x"4d9" => DATA <= x"ff00";
when "00" & x"4da" => DATA <= x"b0bc";
when "00" & x"4db" => DATA <= x"0000";
when "00" & x"4dc" => DATA <= x"0100";
when "00" & x"4dd" => DATA <= x"6600";
when "00" & x"4de" => DATA <= x"0012";
when "00" & x"4df" => DATA <= x"2008";
when "00" & x"4e0" => DATA <= x"4eb9";
when "00" & x"4e1" => DATA <= x"003f";
when "00" & x"4e2" => DATA <= x"09e4";
when "00" & x"4e3" => DATA <= x"2c5f";
when "00" & x"4e4" => DATA <= x"0257";
when "00" & x"4e5" => DATA <= x"fffc";
when "00" & x"4e6" => DATA <= x"4e73";
when "00" & x"4e7" => DATA <= x"2008";
when "00" & x"4e8" => DATA <= x"2c78";
when "00" & x"4e9" => DATA <= x"0460";
when "00" & x"4ea" => DATA <= x"21ef";
when "00" & x"4eb" => DATA <= x"0006";
when "00" & x"4ec" => DATA <= x"0510";
when "00" & x"4ed" => DATA <= x"4e96";
when "00" & x"4ee" => DATA <= x"2c5f";
when "00" & x"4ef" => DATA <= x"0057";
when "00" & x"4f0" => DATA <= x"0002";
when "00" & x"4f1" => DATA <= x"4e73";
when "00" & x"4f2" => DATA <= x"201f";
when "00" & x"4f3" => DATA <= x"6000";
when "00" & x"4f4" => DATA <= x"0002";
when "00" & x"4f5" => DATA <= x"2f38";
when "00" & x"4f6" => DATA <= x"040c";
when "00" & x"4f7" => DATA <= x"4e75";
when "00" & x"4f8" => DATA <= x"2f00";
when "00" & x"4f9" => DATA <= x"202f";
when "00" & x"4fa" => DATA <= x"0004";
when "00" & x"4fb" => DATA <= x"6100";
when "00" & x"4fc" => DATA <= x"000a";
when "00" & x"4fd" => DATA <= x"2f40";
when "00" & x"4fe" => DATA <= x"0004";
when "00" & x"4ff" => DATA <= x"201f";
when "00" & x"500" => DATA <= x"4e75";
when "00" & x"501" => DATA <= x"2f08";
when "00" & x"502" => DATA <= x"2040";
when "00" & x"503" => DATA <= x"1018";
when "00" & x"504" => DATA <= x"6700";
when "00" & x"505" => DATA <= x"0006";
when "00" & x"506" => DATA <= x"61dc";
when "00" & x"507" => DATA <= x"60f6";
when "00" & x"508" => DATA <= x"2008";
when "00" & x"509" => DATA <= x"205f";
when "00" & x"50a" => DATA <= x"4e75";
when "00" & x"50b" => DATA <= x"2f00";
when "00" & x"50c" => DATA <= x"700a";
when "00" & x"50d" => DATA <= x"61ce";
when "00" & x"50e" => DATA <= x"700d";
when "00" & x"50f" => DATA <= x"61ca";
when "00" & x"510" => DATA <= x"201f";
when "00" & x"511" => DATA <= x"4e75";
when "00" & x"512" => DATA <= x"7000";
when "00" & x"513" => DATA <= x"6100";
when "00" & x"514" => DATA <= x"f9be";
when "00" & x"515" => DATA <= x"6100";
when "00" & x"516" => DATA <= x"f9a8";
when "00" & x"517" => DATA <= x"e000";
when "00" & x"518" => DATA <= x"6000";
when "00" & x"519" => DATA <= x"f9a2";
when "00" & x"51a" => DATA <= x"2f0e";
when "00" & x"51b" => DATA <= x"2f00";
when "00" & x"51c" => DATA <= x"2c40";
when "00" & x"51d" => DATA <= x"6100";
when "00" & x"51e" => DATA <= x"1ce8";
when "00" & x"51f" => DATA <= x"101e";
when "00" & x"520" => DATA <= x"b03c";
when "00" & x"521" => DATA <= x"002a";
when "00" & x"522" => DATA <= x"67f4";
when "00" & x"523" => DATA <= x"1026";
when "00" & x"524" => DATA <= x"43f9";
when "00" & x"525" => DATA <= x"003f";
when "00" & x"526" => DATA <= x"35d0";
when "00" & x"527" => DATA <= x"2f0e";
when "00" & x"528" => DATA <= x"2459";
when "00" & x"529" => DATA <= x"b4fc";
when "00" & x"52a" => DATA <= x"ffff";
when "00" & x"52b" => DATA <= x"6700";
when "00" & x"52c" => DATA <= x"0050";
when "00" & x"52d" => DATA <= x"101e";
when "00" & x"52e" => DATA <= x"0200";
when "00" & x"52f" => DATA <= x"00df";
when "00" & x"530" => DATA <= x"b019";
when "00" & x"531" => DATA <= x"6600";
when "00" & x"532" => DATA <= x"003a";
when "00" & x"533" => DATA <= x"0c16";
when "00" & x"534" => DATA <= x"002e";
when "00" & x"535" => DATA <= x"6700";
when "00" & x"536" => DATA <= x"0010";
when "00" & x"537" => DATA <= x"0c11";
when "00" & x"538" => DATA <= x"0020";
when "00" & x"539" => DATA <= x"6700";
when "00" & x"53a" => DATA <= x"0008";
when "00" & x"53b" => DATA <= x"0c11";
when "00" & x"53c" => DATA <= x"0000";
when "00" & x"53d" => DATA <= x"66de";
when "00" & x"53e" => DATA <= x"0c16";
when "00" & x"53f" => DATA <= x"000d";
when "00" & x"540" => DATA <= x"6700";
when "00" & x"541" => DATA <= x"000a";
when "00" & x"542" => DATA <= x"0c16";
when "00" & x"543" => DATA <= x"0020";
when "00" & x"544" => DATA <= x"6600";
when "00" & x"545" => DATA <= x"0014";
when "00" & x"546" => DATA <= x"6100";
when "00" & x"547" => DATA <= x"1c96";
when "00" & x"548" => DATA <= x"225f";
when "00" & x"549" => DATA <= x"4e92";
when "00" & x"54a" => DATA <= x"201f";
when "00" & x"54b" => DATA <= x"2c5f";
when "00" & x"54c" => DATA <= x"6500";
when "00" & x"54d" => DATA <= x"0012";
when "00" & x"54e" => DATA <= x"4e75";
when "00" & x"54f" => DATA <= x"0c19";
when "00" & x"550" => DATA <= x"0000";
when "00" & x"551" => DATA <= x"66fa";
when "00" & x"552" => DATA <= x"2c5f";
when "00" & x"553" => DATA <= x"60a6";
when "00" & x"554" => DATA <= x"2c5f";
when "00" & x"555" => DATA <= x"201f";
when "00" & x"556" => DATA <= x"2f01";
when "00" & x"557" => DATA <= x"7204";
when "00" & x"558" => DATA <= x"6100";
when "00" & x"559" => DATA <= x"06a2";
when "00" & x"55a" => DATA <= x"221f";
when "00" & x"55b" => DATA <= x"2c40";
when "00" & x"55c" => DATA <= x"7002";
when "00" & x"55d" => DATA <= x"6100";
when "00" & x"55e" => DATA <= x"f92a";
when "00" & x"55f" => DATA <= x"6100";
when "00" & x"560" => DATA <= x"f97a";
when "00" & x"561" => DATA <= x"6100";
when "00" & x"562" => DATA <= x"f910";
when "00" & x"563" => DATA <= x"2c5f";
when "00" & x"564" => DATA <= x"b03c";
when "00" & x"565" => DATA <= x"0080";
when "00" & x"566" => DATA <= x"6700";
when "00" & x"567" => DATA <= x"00b6";
when "00" & x"568" => DATA <= x"023c";
when "00" & x"569" => DATA <= x"00fd";
when "00" & x"56a" => DATA <= x"4e75";
when "00" & x"56b" => DATA <= x"b03c";
when "00" & x"56c" => DATA <= x"0080";
when "00" & x"56d" => DATA <= x"6400";
when "00" & x"56e" => DATA <= x"002a";
when "00" & x"56f" => DATA <= x"b03c";
when "00" & x"570" => DATA <= x"007e";
when "00" & x"571" => DATA <= x"6600";
when "00" & x"572" => DATA <= x"0002";
when "00" & x"573" => DATA <= x"2f00";
when "00" & x"574" => DATA <= x"103c";
when "00" & x"575" => DATA <= x"0004";
when "00" & x"576" => DATA <= x"6100";
when "00" & x"577" => DATA <= x"f8f8";
when "00" & x"578" => DATA <= x"1001";
when "00" & x"579" => DATA <= x"6100";
when "00" & x"57a" => DATA <= x"f8f2";
when "00" & x"57b" => DATA <= x"2017";
when "00" & x"57c" => DATA <= x"6100";
when "00" & x"57d" => DATA <= x"f8ec";
when "00" & x"57e" => DATA <= x"6100";
when "00" & x"57f" => DATA <= x"f8d6";
when "00" & x"580" => DATA <= x"1200";
when "00" & x"581" => DATA <= x"201f";
when "00" & x"582" => DATA <= x"4e75";
when "00" & x"583" => DATA <= x"b03c";
when "00" & x"584" => DATA <= x"0082";
when "00" & x"585" => DATA <= x"6700";
when "00" & x"586" => DATA <= x"005a";
when "00" & x"587" => DATA <= x"b03c";
when "00" & x"588" => DATA <= x"0083";
when "00" & x"589" => DATA <= x"6700";
when "00" & x"58a" => DATA <= x"005c";
when "00" & x"58b" => DATA <= x"b03c";
when "00" & x"58c" => DATA <= x"0084";
when "00" & x"58d" => DATA <= x"6700";
when "00" & x"58e" => DATA <= x"005e";
when "00" & x"58f" => DATA <= x"2f00";
when "00" & x"590" => DATA <= x"103c";
when "00" & x"591" => DATA <= x"0006";
when "00" & x"592" => DATA <= x"6100";
when "00" & x"593" => DATA <= x"f8c0";
when "00" & x"594" => DATA <= x"1001";
when "00" & x"595" => DATA <= x"6100";
when "00" & x"596" => DATA <= x"f8ba";
when "00" & x"597" => DATA <= x"1002";
when "00" & x"598" => DATA <= x"6100";
when "00" & x"599" => DATA <= x"f8b4";
when "00" & x"59a" => DATA <= x"201f";
when "00" & x"59b" => DATA <= x"6100";
when "00" & x"59c" => DATA <= x"f8ae";
when "00" & x"59d" => DATA <= x"b03c";
when "00" & x"59e" => DATA <= x"008e";
when "00" & x"59f" => DATA <= x"6700";
when "00" & x"5a0" => DATA <= x"0044";
when "00" & x"5a1" => DATA <= x"b03c";
when "00" & x"5a2" => DATA <= x"009d";
when "00" & x"5a3" => DATA <= x"6700";
when "00" & x"5a4" => DATA <= x"009e";
when "00" & x"5a5" => DATA <= x"2f00";
when "00" & x"5a6" => DATA <= x"6100";
when "00" & x"5a7" => DATA <= x"f886";
when "00" & x"5a8" => DATA <= x"3f00";
when "00" & x"5a9" => DATA <= x"6100";
when "00" & x"5aa" => DATA <= x"f880";
when "00" & x"5ab" => DATA <= x"1400";
when "00" & x"5ac" => DATA <= x"6100";
when "00" & x"5ad" => DATA <= x"f87a";
when "00" & x"5ae" => DATA <= x"1200";
when "00" & x"5af" => DATA <= x"201f";
when "00" & x"5b0" => DATA <= x"e000";
when "00" & x"5b1" => DATA <= x"201f";
when "00" & x"5b2" => DATA <= x"4e75";
when "00" & x"5b3" => DATA <= x"3238";
when "00" & x"5b4" => DATA <= x"0524";
when "00" & x"5b5" => DATA <= x"2401";
when "00" & x"5b6" => DATA <= x"e082";
when "00" & x"5b7" => DATA <= x"4e75";
when "00" & x"5b8" => DATA <= x"2238";
when "00" & x"5b9" => DATA <= x"0504";
when "00" & x"5ba" => DATA <= x"2401";
when "00" & x"5bb" => DATA <= x"e082";
when "00" & x"5bc" => DATA <= x"4e75";
when "00" & x"5bd" => DATA <= x"2238";
when "00" & x"5be" => DATA <= x"0500";
when "00" & x"5bf" => DATA <= x"2401";
when "00" & x"5c0" => DATA <= x"e082";
when "00" & x"5c1" => DATA <= x"4e75";
when "00" & x"5c2" => DATA <= x"2c78";
when "00" & x"5c3" => DATA <= x"0520";
when "00" & x"5c4" => DATA <= x"122e";
when "00" & x"5c5" => DATA <= x"0006";
when "00" & x"5c6" => DATA <= x"7000";
when "00" & x"5c7" => DATA <= x"102e";
when "00" & x"5c8" => DATA <= x"0007";
when "00" & x"5c9" => DATA <= x"ddc0";
when "00" & x"5ca" => DATA <= x"4a1e";
when "00" & x"5cb" => DATA <= x"6600";
when "00" & x"5cc" => DATA <= x"0026";
when "00" & x"5cd" => DATA <= x"0c1e";
when "00" & x"5ce" => DATA <= x"0028";
when "00" & x"5cf" => DATA <= x"6600";
when "00" & x"5d0" => DATA <= x"001e";
when "00" & x"5d1" => DATA <= x"0c1e";
when "00" & x"5d2" => DATA <= x"0043";
when "00" & x"5d3" => DATA <= x"6600";
when "00" & x"5d4" => DATA <= x"0016";
when "00" & x"5d5" => DATA <= x"0c1e";
when "00" & x"5d6" => DATA <= x"0029";
when "00" & x"5d7" => DATA <= x"6600";
when "00" & x"5d8" => DATA <= x"000e";
when "00" & x"5d9" => DATA <= x"0201";
when "00" & x"5da" => DATA <= x"000f";
when "00" & x"5db" => DATA <= x"0c01";
when "00" & x"5dc" => DATA <= x"0003";
when "00" & x"5dd" => DATA <= x"6600";
when "00" & x"5de" => DATA <= x"0018";
when "00" & x"5df" => DATA <= x"2c78";
when "00" & x"5e0" => DATA <= x"0520";
when "00" & x"5e1" => DATA <= x"7001";
when "00" & x"5e2" => DATA <= x"223c";
when "00" & x"5e3" => DATA <= x"0000";
when "00" & x"5e4" => DATA <= x"052d";
when "00" & x"5e5" => DATA <= x"6100";
when "00" & x"5e6" => DATA <= x"001c";
when "00" & x"5e7" => DATA <= x"7001";
when "00" & x"5e8" => DATA <= x"4ed6";
when "00" & x"5e9" => DATA <= x"4e75";
when "00" & x"5ea" => DATA <= x"203c";
when "00" & x"5eb" => DATA <= x"003f";
when "00" & x"5ec" => DATA <= x"2da4";
when "00" & x"5ed" => DATA <= x"21fc";
when "00" & x"5ee" => DATA <= x"0000";
when "00" & x"5ef" => DATA <= x"0000";
when "00" & x"5f0" => DATA <= x"0510";
when "00" & x"5f1" => DATA <= x"6000";
when "00" & x"5f2" => DATA <= x"0540";
when "00" & x"5f3" => DATA <= x"4e75";
when "00" & x"5f4" => DATA <= x"b0bc";
when "00" & x"5f5" => DATA <= x"0000";
when "00" & x"5f6" => DATA <= x"00ff";
when "00" & x"5f7" => DATA <= x"6200";
when "00" & x"5f8" => DATA <= x"00d8";
when "00" & x"5f9" => DATA <= x"2f0e";
when "00" & x"5fa" => DATA <= x"2f00";
when "00" & x"5fb" => DATA <= x"2f01";
when "00" & x"5fc" => DATA <= x"2f02";
when "00" & x"5fd" => DATA <= x"2c41";
when "00" & x"5fe" => DATA <= x"4a40";
when "00" & x"5ff" => DATA <= x"6600";
when "00" & x"600" => DATA <= x"003c";
when "00" & x"601" => DATA <= x"2f03";
when "00" & x"602" => DATA <= x"2f04";
when "00" & x"603" => DATA <= x"3038";
when "00" & x"604" => DATA <= x"0524";
when "00" & x"605" => DATA <= x"4840";
when "00" & x"606" => DATA <= x"3016";
when "00" & x"607" => DATA <= x"7200";
when "00" & x"608" => DATA <= x"122e";
when "00" & x"609" => DATA <= x"0002";
when "00" & x"60a" => DATA <= x"7400";
when "00" & x"60b" => DATA <= x"142e";
when "00" & x"60c" => DATA <= x"0003";
when "00" & x"60d" => DATA <= x"7600";
when "00" & x"60e" => DATA <= x"162e";
when "00" & x"60f" => DATA <= x"0004";
when "00" & x"610" => DATA <= x"7800";
when "00" & x"611" => DATA <= x"6100";
when "00" & x"612" => DATA <= x"08cc";
when "00" & x"613" => DATA <= x"281f";
when "00" & x"614" => DATA <= x"261f";
when "00" & x"615" => DATA <= x"241f";
when "00" & x"616" => DATA <= x"2401";
when "00" & x"617" => DATA <= x"5242";
when "00" & x"618" => DATA <= x"221f";
when "00" & x"619" => DATA <= x"201f";
when "00" & x"61a" => DATA <= x"2c5f";
when "00" & x"61b" => DATA <= x"023c";
when "00" & x"61c" => DATA <= x"00fd";
when "00" & x"61d" => DATA <= x"4e75";
when "00" & x"61e" => DATA <= x"7200";
when "00" & x"61f" => DATA <= x"7400";
when "00" & x"620" => DATA <= x"b03c";
when "00" & x"621" => DATA <= x"0014";
when "00" & x"622" => DATA <= x"6200";
when "00" & x"623" => DATA <= x"001e";
when "00" & x"624" => DATA <= x"207c";
when "00" & x"625" => DATA <= x"003f";
when "00" & x"626" => DATA <= x"2f2c";
when "00" & x"627" => DATA <= x"d1c0";
when "00" & x"628" => DATA <= x"5348";
when "00" & x"629" => DATA <= x"1210";
when "00" & x"62a" => DATA <= x"207c";
when "00" & x"62b" => DATA <= x"003f";
when "00" & x"62c" => DATA <= x"2f40";
when "00" & x"62d" => DATA <= x"d1c0";
when "00" & x"62e" => DATA <= x"5348";
when "00" & x"62f" => DATA <= x"1410";
when "00" & x"630" => DATA <= x"6000";
when "00" & x"631" => DATA <= x"0018";
when "00" & x"632" => DATA <= x"b03c";
when "00" & x"633" => DATA <= x"007f";
when "00" & x"634" => DATA <= x"6200";
when "00" & x"635" => DATA <= x"000a";
when "00" & x"636" => DATA <= x"7210";
when "00" & x"637" => DATA <= x"7410";
when "00" & x"638" => DATA <= x"6000";
when "00" & x"639" => DATA <= x"0008";
when "00" & x"63a" => DATA <= x"1216";
when "00" & x"63b" => DATA <= x"142e";
when "00" & x"63c" => DATA <= x"0001";
when "00" & x"63d" => DATA <= x"2f00";
when "00" & x"63e" => DATA <= x"103c";
when "00" & x"63f" => DATA <= x"0008";
when "00" & x"640" => DATA <= x"6100";
when "00" & x"641" => DATA <= x"f764";
when "00" & x"642" => DATA <= x"201f";
when "00" & x"643" => DATA <= x"6100";
when "00" & x"644" => DATA <= x"f75e";
when "00" & x"645" => DATA <= x"1001";
when "00" & x"646" => DATA <= x"6100";
when "00" & x"647" => DATA <= x"f758";
when "00" & x"648" => DATA <= x"5341";
when "00" & x"649" => DATA <= x"6b00";
when "00" & x"64a" => DATA <= x"000e";
when "00" & x"64b" => DATA <= x"1036";
when "00" & x"64c" => DATA <= x"1000";
when "00" & x"64d" => DATA <= x"6100";
when "00" & x"64e" => DATA <= x"f74a";
when "00" & x"64f" => DATA <= x"51c9";
when "00" & x"650" => DATA <= x"fff6";
when "00" & x"651" => DATA <= x"1002";
when "00" & x"652" => DATA <= x"6100";
when "00" & x"653" => DATA <= x"f740";
when "00" & x"654" => DATA <= x"5342";
when "00" & x"655" => DATA <= x"6b00";
when "00" & x"656" => DATA <= x"000e";
when "00" & x"657" => DATA <= x"6100";
when "00" & x"658" => DATA <= x"f724";
when "00" & x"659" => DATA <= x"1d80";
when "00" & x"65a" => DATA <= x"2000";
when "00" & x"65b" => DATA <= x"51ca";
when "00" & x"65c" => DATA <= x"fff6";
when "00" & x"65d" => DATA <= x"241f";
when "00" & x"65e" => DATA <= x"221f";
when "00" & x"65f" => DATA <= x"201f";
when "00" & x"660" => DATA <= x"2c5f";
when "00" & x"661" => DATA <= x"023c";
when "00" & x"662" => DATA <= x"00fd";
when "00" & x"663" => DATA <= x"4e75";
when "00" & x"664" => DATA <= x"003c";
when "00" & x"665" => DATA <= x"0002";
when "00" & x"666" => DATA <= x"4e75";
when "00" & x"667" => DATA <= x"2f00";
when "00" & x"668" => DATA <= x"103c";
when "00" & x"669" => DATA <= x"0014";
when "00" & x"66a" => DATA <= x"6100";
when "00" & x"66b" => DATA <= x"f710";
when "00" & x"66c" => DATA <= x"2005";
when "00" & x"66d" => DATA <= x"6100";
when "00" & x"66e" => DATA <= x"f73e";
when "00" & x"66f" => DATA <= x"2004";
when "00" & x"670" => DATA <= x"6100";
when "00" & x"671" => DATA <= x"f738";
when "00" & x"672" => DATA <= x"2003";
when "00" & x"673" => DATA <= x"6100";
when "00" & x"674" => DATA <= x"f732";
when "00" & x"675" => DATA <= x"2002";
when "00" & x"676" => DATA <= x"6100";
when "00" & x"677" => DATA <= x"f72c";
when "00" & x"678" => DATA <= x"2c41";
when "00" & x"679" => DATA <= x"6100";
when "00" & x"67a" => DATA <= x"f746";
when "00" & x"67b" => DATA <= x"201f";
when "00" & x"67c" => DATA <= x"6100";
when "00" & x"67d" => DATA <= x"f6ec";
when "00" & x"67e" => DATA <= x"6100";
when "00" & x"67f" => DATA <= x"f6d6";
when "00" & x"680" => DATA <= x"2f00";
when "00" & x"681" => DATA <= x"6100";
when "00" & x"682" => DATA <= x"f706";
when "00" & x"683" => DATA <= x"2a00";
when "00" & x"684" => DATA <= x"6100";
when "00" & x"685" => DATA <= x"f700";
when "00" & x"686" => DATA <= x"2800";
when "00" & x"687" => DATA <= x"6100";
when "00" & x"688" => DATA <= x"f6fa";
when "00" & x"689" => DATA <= x"2600";
when "00" & x"68a" => DATA <= x"6100";
when "00" & x"68b" => DATA <= x"f6f4";
when "00" & x"68c" => DATA <= x"2400";
when "00" & x"68d" => DATA <= x"201f";
when "00" & x"68e" => DATA <= x"4e75";
when "00" & x"68f" => DATA <= x"2f00";
when "00" & x"690" => DATA <= x"103c";
when "00" & x"691" => DATA <= x"000c";
when "00" & x"692" => DATA <= x"6100";
when "00" & x"693" => DATA <= x"f6c0";
when "00" & x"694" => DATA <= x"1001";
when "00" & x"695" => DATA <= x"6100";
when "00" & x"696" => DATA <= x"f6ba";
when "00" & x"697" => DATA <= x"2002";
when "00" & x"698" => DATA <= x"6100";
when "00" & x"699" => DATA <= x"f6e8";
when "00" & x"69a" => DATA <= x"201f";
when "00" & x"69b" => DATA <= x"6100";
when "00" & x"69c" => DATA <= x"f6ae";
when "00" & x"69d" => DATA <= x"6100";
when "00" & x"69e" => DATA <= x"f698";
when "00" & x"69f" => DATA <= x"2f00";
when "00" & x"6a0" => DATA <= x"6100";
when "00" & x"6a1" => DATA <= x"f6c8";
when "00" & x"6a2" => DATA <= x"2400";
when "00" & x"6a3" => DATA <= x"201f";
when "00" & x"6a4" => DATA <= x"4e75";
when "00" & x"6a5" => DATA <= x"103c";
when "00" & x"6a6" => DATA <= x"000e";
when "00" & x"6a7" => DATA <= x"4eb9";
when "00" & x"6a8" => DATA <= x"003f";
when "00" & x"6a9" => DATA <= x"03e6";
when "00" & x"6aa" => DATA <= x"1001";
when "00" & x"6ab" => DATA <= x"4eb9";
when "00" & x"6ac" => DATA <= x"003f";
when "00" & x"6ad" => DATA <= x"03e6";
when "00" & x"6ae" => DATA <= x"6000";
when "00" & x"6af" => DATA <= x"fccc";
when "00" & x"6b0" => DATA <= x"2f00";
when "00" & x"6b1" => DATA <= x"103c";
when "00" & x"6b2" => DATA <= x"0010";
when "00" & x"6b3" => DATA <= x"6100";
when "00" & x"6b4" => DATA <= x"f67e";
when "00" & x"6b5" => DATA <= x"1001";
when "00" & x"6b6" => DATA <= x"6100";
when "00" & x"6b7" => DATA <= x"f678";
when "00" & x"6b8" => DATA <= x"2017";
when "00" & x"6b9" => DATA <= x"6100";
when "00" & x"6ba" => DATA <= x"f672";
when "00" & x"6bb" => DATA <= x"6100";
when "00" & x"6bc" => DATA <= x"f65c";
when "00" & x"6bd" => DATA <= x"201f";
when "00" & x"6be" => DATA <= x"4e75";
when "00" & x"6bf" => DATA <= x"2f00";
when "00" & x"6c0" => DATA <= x"103c";
when "00" & x"6c1" => DATA <= x"0016";
when "00" & x"6c2" => DATA <= x"6100";
when "00" & x"6c3" => DATA <= x"f660";
when "00" & x"6c4" => DATA <= x"2004";
when "00" & x"6c5" => DATA <= x"6100";
when "00" & x"6c6" => DATA <= x"f68e";
when "00" & x"6c7" => DATA <= x"2003";
when "00" & x"6c8" => DATA <= x"6100";
when "00" & x"6c9" => DATA <= x"f688";
when "00" & x"6ca" => DATA <= x"2002";
when "00" & x"6cb" => DATA <= x"6100";
when "00" & x"6cc" => DATA <= x"f682";
when "00" & x"6cd" => DATA <= x"2001";
when "00" & x"6ce" => DATA <= x"6100";
when "00" & x"6cf" => DATA <= x"f648";
when "00" & x"6d0" => DATA <= x"201f";
when "00" & x"6d1" => DATA <= x"6100";
when "00" & x"6d2" => DATA <= x"f676";
when "00" & x"6d3" => DATA <= x"6100";
when "00" & x"6d4" => DATA <= x"f62c";
when "00" & x"6d5" => DATA <= x"2800";
when "00" & x"6d6" => DATA <= x"6100";
when "00" & x"6d7" => DATA <= x"f65c";
when "00" & x"6d8" => DATA <= x"2600";
when "00" & x"6d9" => DATA <= x"6100";
when "00" & x"6da" => DATA <= x"f656";
when "00" & x"6db" => DATA <= x"2400";
when "00" & x"6dc" => DATA <= x"6100";
when "00" & x"6dd" => DATA <= x"f61a";
when "00" & x"6de" => DATA <= x"2200";
when "00" & x"6df" => DATA <= x"6000";
when "00" & x"6e0" => DATA <= x"fc6a";
when "00" & x"6e1" => DATA <= x"2f00";
when "00" & x"6e2" => DATA <= x"103c";
when "00" & x"6e3" => DATA <= x"0012";
when "00" & x"6e4" => DATA <= x"6100";
when "00" & x"6e5" => DATA <= x"f61c";
when "00" & x"6e6" => DATA <= x"201f";
when "00" & x"6e7" => DATA <= x"6100";
when "00" & x"6e8" => DATA <= x"f616";
when "00" & x"6e9" => DATA <= x"4a40";
when "00" & x"6ea" => DATA <= x"6600";
when "00" & x"6eb" => DATA <= x"0012";
when "00" & x"6ec" => DATA <= x"2f00";
when "00" & x"6ed" => DATA <= x"1001";
when "00" & x"6ee" => DATA <= x"6100";
when "00" & x"6ef" => DATA <= x"f608";
when "00" & x"6f0" => DATA <= x"6100";
when "00" & x"6f1" => DATA <= x"f5f2";
when "00" & x"6f2" => DATA <= x"201f";
when "00" & x"6f3" => DATA <= x"4e75";
when "00" & x"6f4" => DATA <= x"6100";
when "00" & x"6f5" => DATA <= x"f650";
when "00" & x"6f6" => DATA <= x"6000";
when "00" & x"6f7" => DATA <= x"f5e6";
when "00" & x"6f8" => DATA <= x"2800";
when "00" & x"6f9" => DATA <= x"c8bc";
when "00" & x"6fa" => DATA <= x"d000";
when "00" & x"6fb" => DATA <= x"0000";
when "00" & x"6fc" => DATA <= x"6000";
when "00" & x"6fd" => DATA <= x"06f6";
when "00" & x"6fe" => DATA <= x"2f05";
when "00" & x"6ff" => DATA <= x"2f04";
when "00" & x"700" => DATA <= x"2f01";
when "00" & x"701" => DATA <= x"2f00";
when "00" & x"702" => DATA <= x"2203";
when "00" & x"703" => DATA <= x"700a";
when "00" & x"704" => DATA <= x"6100";
when "00" & x"705" => DATA <= x"04fa";
when "00" & x"706" => DATA <= x"2801";
when "00" & x"707" => DATA <= x"2202";
when "00" & x"708" => DATA <= x"7009";
when "00" & x"709" => DATA <= x"6100";
when "00" & x"70a" => DATA <= x"04f0";
when "00" & x"70b" => DATA <= x"2a01";
when "00" & x"70c" => DATA <= x"221f";
when "00" & x"70d" => DATA <= x"261f";
when "00" & x"70e" => DATA <= x"7006";
when "00" & x"70f" => DATA <= x"6100";
when "00" & x"710" => DATA <= x"04e4";
when "00" & x"711" => DATA <= x"2001";
when "00" & x"712" => DATA <= x"2203";
when "00" & x"713" => DATA <= x"2604";
when "00" & x"714" => DATA <= x"2405";
when "00" & x"715" => DATA <= x"281f";
when "00" & x"716" => DATA <= x"2a1f";
when "00" & x"717" => DATA <= x"023c";
when "00" & x"718" => DATA <= x"00fd";
when "00" & x"719" => DATA <= x"4e75";
when "00" & x"71a" => DATA <= x"203c";
when "00" & x"71b" => DATA <= x"0000";
when "00" & x"71c" => DATA <= x"0600";
when "00" & x"71d" => DATA <= x"223c";
when "00" & x"71e" => DATA <= x"0000";
when "00" & x"71f" => DATA <= x"0500";
when "00" & x"720" => DATA <= x"243c";
when "00" & x"721" => DATA <= x"0000";
when "00" & x"722" => DATA <= x"052d";
when "00" & x"723" => DATA <= x"4e75";
when "00" & x"724" => DATA <= x"2f38";
when "00" & x"725" => DATA <= x"04d0";
when "00" & x"726" => DATA <= x"4e75";
when "00" & x"727" => DATA <= x"2f03";
when "00" & x"728" => DATA <= x"2f02";
when "00" & x"729" => DATA <= x"2f01";
when "00" & x"72a" => DATA <= x"2f00";
when "00" & x"72b" => DATA <= x"2207";
when "00" & x"72c" => DATA <= x"7004";
when "00" & x"72d" => DATA <= x"6100";
when "00" & x"72e" => DATA <= x"04a8";
when "00" & x"72f" => DATA <= x"2e01";
when "00" & x"730" => DATA <= x"2206";
when "00" & x"731" => DATA <= x"7003";
when "00" & x"732" => DATA <= x"6100";
when "00" & x"733" => DATA <= x"049e";
when "00" & x"734" => DATA <= x"2c01";
when "00" & x"735" => DATA <= x"2205";
when "00" & x"736" => DATA <= x"7002";
when "00" & x"737" => DATA <= x"6100";
when "00" & x"738" => DATA <= x"0494";
when "00" & x"739" => DATA <= x"2a01";
when "00" & x"73a" => DATA <= x"2204";
when "00" & x"73b" => DATA <= x"7001";
when "00" & x"73c" => DATA <= x"6100";
when "00" & x"73d" => DATA <= x"048a";
when "00" & x"73e" => DATA <= x"2801";
when "00" & x"73f" => DATA <= x"221f";
when "00" & x"740" => DATA <= x"700b";
when "00" & x"741" => DATA <= x"6100";
when "00" & x"742" => DATA <= x"0480";
when "00" & x"743" => DATA <= x"2001";
when "00" & x"744" => DATA <= x"221f";
when "00" & x"745" => DATA <= x"2f00";
when "00" & x"746" => DATA <= x"7000";
when "00" & x"747" => DATA <= x"6100";
when "00" & x"748" => DATA <= x"0474";
when "00" & x"749" => DATA <= x"201f";
when "00" & x"74a" => DATA <= x"241f";
when "00" & x"74b" => DATA <= x"261f";
when "00" & x"74c" => DATA <= x"023c";
when "00" & x"74d" => DATA <= x"00fd";
when "00" & x"74e" => DATA <= x"4e75";
when "00" & x"74f" => DATA <= x"027c";
when "00" & x"750" => DATA <= x"f8ff";
when "00" & x"751" => DATA <= x"4e75";
when "00" & x"752" => DATA <= x"007c";
when "00" & x"753" => DATA <= x"0700";
when "00" & x"754" => DATA <= x"4e75";
when "00" & x"755" => DATA <= x"2f03";
when "00" & x"756" => DATA <= x"2f02";
when "00" & x"757" => DATA <= x"4282";
when "00" & x"758" => DATA <= x"c343";
when "00" & x"759" => DATA <= x"2200";
when "00" & x"75a" => DATA <= x"103c";
when "00" & x"75b" => DATA <= x"0007";
when "00" & x"75c" => DATA <= x"6100";
when "00" & x"75d" => DATA <= x"044a";
when "00" & x"75e" => DATA <= x"c340";
when "00" & x"75f" => DATA <= x"c741";
when "00" & x"760" => DATA <= x"241f";
when "00" & x"761" => DATA <= x"261f";
when "00" & x"762" => DATA <= x"023c";
when "00" & x"763" => DATA <= x"00fd";
when "00" & x"764" => DATA <= x"4e75";
when "00" & x"765" => DATA <= x"007c";
when "00" & x"766" => DATA <= x"2000";
when "00" & x"767" => DATA <= x"4e75";
when "00" & x"768" => DATA <= x"2f03";
when "00" & x"769" => DATA <= x"2f02";
when "00" & x"76a" => DATA <= x"4282";
when "00" & x"76b" => DATA <= x"c343";
when "00" & x"76c" => DATA <= x"2200";
when "00" & x"76d" => DATA <= x"103c";
when "00" & x"76e" => DATA <= x"0008";
when "00" & x"76f" => DATA <= x"6100";
when "00" & x"770" => DATA <= x"0424";
when "00" & x"771" => DATA <= x"c340";
when "00" & x"772" => DATA <= x"c741";
when "00" & x"773" => DATA <= x"241f";
when "00" & x"774" => DATA <= x"261f";
when "00" & x"775" => DATA <= x"023c";
when "00" & x"776" => DATA <= x"00fd";
when "00" & x"777" => DATA <= x"4e75";
when "00" & x"778" => DATA <= x"2f03";
when "00" & x"779" => DATA <= x"2f02";
when "00" & x"77a" => DATA <= x"2f01";
when "00" & x"77b" => DATA <= x"2200";
when "00" & x"77c" => DATA <= x"103c";
when "00" & x"77d" => DATA <= x"000c";
when "00" & x"77e" => DATA <= x"6100";
when "00" & x"77f" => DATA <= x"0406";
when "00" & x"780" => DATA <= x"2001";
when "00" & x"781" => DATA <= x"221f";
when "00" & x"782" => DATA <= x"241f";
when "00" & x"783" => DATA <= x"261f";
when "00" & x"784" => DATA <= x"023c";
when "00" & x"785" => DATA <= x"00fd";
when "00" & x"786" => DATA <= x"4e75";
when "00" & x"787" => DATA <= x"6100";
when "00" & x"788" => DATA <= x"03fa";
when "00" & x"789" => DATA <= x"2600";
when "00" & x"78a" => DATA <= x"7040";
when "00" & x"78b" => DATA <= x"2238";
when "00" & x"78c" => DATA <= x"0600";
when "00" & x"78d" => DATA <= x"6100";
when "00" & x"78e" => DATA <= x"fccc";
when "00" & x"78f" => DATA <= x"4280";
when "00" & x"790" => DATA <= x"4281";
when "00" & x"791" => DATA <= x"3038";
when "00" & x"792" => DATA <= x"0600";
when "00" & x"793" => DATA <= x"3238";
when "00" & x"794" => DATA <= x"0600";
when "00" & x"795" => DATA <= x"0480";
when "00" & x"796" => DATA <= x"0000";
when "00" & x"797" => DATA <= x"0280";
when "00" & x"798" => DATA <= x"0481";
when "00" & x"799" => DATA <= x"0000";
when "00" & x"79a" => DATA <= x"0200";
when "00" & x"79b" => DATA <= x"c1fc";
when "00" & x"79c" => DATA <= x"0033";
when "00" & x"79d" => DATA <= x"ed89";
when "00" & x"79e" => DATA <= x"4282";
when "00" & x"79f" => DATA <= x"0838";
when "00" & x"7a0" => DATA <= x"0007";
when "00" & x"7a1" => DATA <= x"0606";
when "00" & x"7a2" => DATA <= x"6700";
when "00" & x"7a3" => DATA <= x"0006";
when "00" & x"7a4" => DATA <= x"08c2";
when "00" & x"7a5" => DATA <= x"0000";
when "00" & x"7a6" => DATA <= x"0838";
when "00" & x"7a7" => DATA <= x"0006";
when "00" & x"7a8" => DATA <= x"0606";
when "00" & x"7a9" => DATA <= x"6700";
when "00" & x"7aa" => DATA <= x"0006";
when "00" & x"7ab" => DATA <= x"08c2";
when "00" & x"7ac" => DATA <= x"0001";
when "00" & x"7ad" => DATA <= x"0838";
when "00" & x"7ae" => DATA <= x"0005";
when "00" & x"7af" => DATA <= x"0606";
when "00" & x"7b0" => DATA <= x"6700";
when "00" & x"7b1" => DATA <= x"0006";
when "00" & x"7b2" => DATA <= x"08c2";
when "00" & x"7b3" => DATA <= x"0002";
when "00" & x"7b4" => DATA <= x"023c";
when "00" & x"7b5" => DATA <= x"00fd";
when "00" & x"7b6" => DATA <= x"4e75";
when "00" & x"7b7" => DATA <= x"103c";
when "00" & x"7b8" => DATA <= x"0080";
when "00" & x"7b9" => DATA <= x"123c";
when "00" & x"7ba" => DATA <= x"0007";
when "00" & x"7bb" => DATA <= x"143c";
when "00" & x"7bc" => DATA <= x"0000";
when "00" & x"7bd" => DATA <= x"6100";
when "00" & x"7be" => DATA <= x"fb5a";
when "00" & x"7bf" => DATA <= x"103c";
when "00" & x"7c0" => DATA <= x"0080";
when "00" & x"7c1" => DATA <= x"123c";
when "00" & x"7c2" => DATA <= x"0008";
when "00" & x"7c3" => DATA <= x"143c";
when "00" & x"7c4" => DATA <= x"0000";
when "00" & x"7c5" => DATA <= x"6100";
when "00" & x"7c6" => DATA <= x"fb4a";
when "00" & x"7c7" => DATA <= x"103c";
when "00" & x"7c8" => DATA <= x"0080";
when "00" & x"7c9" => DATA <= x"123c";
when "00" & x"7ca" => DATA <= x"0009";
when "00" & x"7cb" => DATA <= x"143c";
when "00" & x"7cc" => DATA <= x"0000";
when "00" & x"7cd" => DATA <= x"6100";
when "00" & x"7ce" => DATA <= x"fb3a";
when "00" & x"7cf" => DATA <= x"103c";
when "00" & x"7d0" => DATA <= x"0081";
when "00" & x"7d1" => DATA <= x"123c";
when "00" & x"7d2" => DATA <= x"00f6";
when "00" & x"7d3" => DATA <= x"143c";
when "00" & x"7d4" => DATA <= x"00ff";
when "00" & x"7d5" => DATA <= x"6100";
when "00" & x"7d6" => DATA <= x"fb2a";
when "00" & x"7d7" => DATA <= x"103c";
when "00" & x"7d8" => DATA <= x"0081";
when "00" & x"7d9" => DATA <= x"123c";
when "00" & x"7da" => DATA <= x"00f5";
when "00" & x"7db" => DATA <= x"143c";
when "00" & x"7dc" => DATA <= x"00ff";
when "00" & x"7dd" => DATA <= x"6100";
when "00" & x"7de" => DATA <= x"fb1a";
when "00" & x"7df" => DATA <= x"103c";
when "00" & x"7e0" => DATA <= x"0081";
when "00" & x"7e1" => DATA <= x"123c";
when "00" & x"7e2" => DATA <= x"00f4";
when "00" & x"7e3" => DATA <= x"143c";
when "00" & x"7e4" => DATA <= x"00ff";
when "00" & x"7e5" => DATA <= x"6100";
when "00" & x"7e6" => DATA <= x"fb0a";
when "00" & x"7e7" => DATA <= x"4e75";
when "00" & x"7e8" => DATA <= x"2f0e";
when "00" & x"7e9" => DATA <= x"2f07";
when "00" & x"7ea" => DATA <= x"2f06";
when "00" & x"7eb" => DATA <= x"2f04";
when "00" & x"7ec" => DATA <= x"2f03";
when "00" & x"7ed" => DATA <= x"2f00";
when "00" & x"7ee" => DATA <= x"7eff";
when "00" & x"7ef" => DATA <= x"0800";
when "00" & x"7f0" => DATA <= x"001d";
when "00" & x"7f1" => DATA <= x"6700";
when "00" & x"7f2" => DATA <= x"0004";
when "00" & x"7f3" => DATA <= x"2e02";
when "00" & x"7f4" => DATA <= x"0280";
when "00" & x"7f5" => DATA <= x"0000";
when "00" & x"7f6" => DATA <= x"00ff";
when "00" & x"7f7" => DATA <= x"4a80";
when "00" & x"7f8" => DATA <= x"6600";
when "00" & x"7f9" => DATA <= x"0004";
when "00" & x"7fa" => DATA <= x"700a";
when "00" & x"7fb" => DATA <= x"b0bc";
when "00" & x"7fc" => DATA <= x"0000";
when "00" & x"7fd" => DATA <= x"0002";
when "00" & x"7fe" => DATA <= x"6500";
when "00" & x"7ff" => DATA <= x"00a0";
when "00" & x"800" => DATA <= x"b0bc";
when "00" & x"801" => DATA <= x"0000";
when "00" & x"802" => DATA <= x"0024";
when "00" & x"803" => DATA <= x"6200";
when "00" & x"804" => DATA <= x"0096";
when "00" & x"805" => DATA <= x"2c00";
when "00" & x"806" => DATA <= x"4282";
when "00" & x"807" => DATA <= x"2c41";
when "00" & x"808" => DATA <= x"6100";
when "00" & x"809" => DATA <= x"1712";
when "00" & x"80a" => DATA <= x"528e";
when "00" & x"80b" => DATA <= x"b03c";
when "00" & x"80c" => DATA <= x"0026";
when "00" & x"80d" => DATA <= x"6600";
when "00" & x"80e" => DATA <= x"000a";
when "00" & x"80f" => DATA <= x"7c10";
when "00" & x"810" => DATA <= x"528e";
when "00" & x"811" => DATA <= x"6000";
when "00" & x"812" => DATA <= x"000e";
when "00" & x"813" => DATA <= x"b03c";
when "00" & x"814" => DATA <= x"0024";
when "00" & x"815" => DATA <= x"6600";
when "00" & x"816" => DATA <= x"0006";
when "00" & x"817" => DATA <= x"7c10";
when "00" & x"818" => DATA <= x"528e";
when "00" & x"819" => DATA <= x"0c00";
when "00" & x"81a" => DATA <= x"0039";
when "00" & x"81b" => DATA <= x"6300";
when "00" & x"81c" => DATA <= x"0008";
when "00" & x"81d" => DATA <= x"0200";
when "00" & x"81e" => DATA <= x"00df";
when "00" & x"81f" => DATA <= x"5f00";
when "00" & x"820" => DATA <= x"0400";
when "00" & x"821" => DATA <= x"0030";
when "00" & x"822" => DATA <= x"6b00";
when "00" & x"823" => DATA <= x"0030";
when "00" & x"824" => DATA <= x"b006";
when "00" & x"825" => DATA <= x"6200";
when "00" & x"826" => DATA <= x"002a";
when "00" & x"827" => DATA <= x"bcbc";
when "00" & x"828" => DATA <= x"0000";
when "00" & x"829" => DATA <= x"0010";
when "00" & x"82a" => DATA <= x"6600";
when "00" & x"82b" => DATA <= x"000a";
when "00" & x"82c" => DATA <= x"e98a";
when "00" & x"82d" => DATA <= x"d480";
when "00" & x"82e" => DATA <= x"101e";
when "00" & x"82f" => DATA <= x"60d2";
when "00" & x"830" => DATA <= x"2606";
when "00" & x"831" => DATA <= x"5583";
when "00" & x"832" => DATA <= x"2802";
when "00" & x"833" => DATA <= x"d484";
when "00" & x"834" => DATA <= x"6500";
when "00" & x"835" => DATA <= x"0048";
when "00" & x"836" => DATA <= x"51cb";
when "00" & x"837" => DATA <= x"fff8";
when "00" & x"838" => DATA <= x"d480";
when "00" & x"839" => DATA <= x"101e";
when "00" & x"83a" => DATA <= x"60bc";
when "00" & x"83b" => DATA <= x"4a82";
when "00" & x"83c" => DATA <= x"6700";
when "00" & x"83d" => DATA <= x"002e";
when "00" & x"83e" => DATA <= x"4a87";
when "00" & x"83f" => DATA <= x"6700";
when "00" & x"840" => DATA <= x"0008";
when "00" & x"841" => DATA <= x"b087";
when "00" & x"842" => DATA <= x"6200";
when "00" & x"843" => DATA <= x"002c";
when "00" & x"844" => DATA <= x"220e";
when "00" & x"845" => DATA <= x"5381";
when "00" & x"846" => DATA <= x"201f";
when "00" & x"847" => DATA <= x"261f";
when "00" & x"848" => DATA <= x"281f";
when "00" & x"849" => DATA <= x"2c1f";
when "00" & x"84a" => DATA <= x"2e1f";
when "00" & x"84b" => DATA <= x"2c5f";
when "00" & x"84c" => DATA <= x"023c";
when "00" & x"84d" => DATA <= x"00fd";
when "00" & x"84e" => DATA <= x"4e75";
when "00" & x"84f" => DATA <= x"203c";
when "00" & x"850" => DATA <= x"003f";
when "00" & x"851" => DATA <= x"2dec";
when "00" & x"852" => DATA <= x"6000";
when "00" & x"853" => DATA <= x"0012";
when "00" & x"854" => DATA <= x"203c";
when "00" & x"855" => DATA <= x"003f";
when "00" & x"856" => DATA <= x"2dfc";
when "00" & x"857" => DATA <= x"6000";
when "00" & x"858" => DATA <= x"0008";
when "00" & x"859" => DATA <= x"203c";
when "00" & x"85a" => DATA <= x"003f";
when "00" & x"85b" => DATA <= x"2e0c";
when "00" & x"85c" => DATA <= x"261f";
when "00" & x"85d" => DATA <= x"261f";
when "00" & x"85e" => DATA <= x"281f";
when "00" & x"85f" => DATA <= x"2c1f";
when "00" & x"860" => DATA <= x"2e1f";
when "00" & x"861" => DATA <= x"2c5f";
when "00" & x"862" => DATA <= x"003c";
when "00" & x"863" => DATA <= x"0002";
when "00" & x"864" => DATA <= x"4e75";
when "00" & x"865" => DATA <= x"2f00";
when "00" & x"866" => DATA <= x"2f01";
when "00" & x"867" => DATA <= x"6100";
when "00" & x"868" => DATA <= x"07bc";
when "00" & x"869" => DATA <= x"2401";
when "00" & x"86a" => DATA <= x"221f";
when "00" & x"86b" => DATA <= x"201f";
when "00" & x"86c" => DATA <= x"4e75";
when "00" & x"86d" => DATA <= x"b03c";
when "00" & x"86e" => DATA <= x"003a";
when "00" & x"86f" => DATA <= x"6200";
when "00" & x"870" => DATA <= x"001c";
when "00" & x"871" => DATA <= x"2f0e";
when "00" & x"872" => DATA <= x"d040";
when "00" & x"873" => DATA <= x"d040";
when "00" & x"874" => DATA <= x"2c79";
when "00" & x"875" => DATA <= x"003f";
when "00" & x"876" => DATA <= x"36fc";
when "00" & x"877" => DATA <= x"ddc0";
when "00" & x"878" => DATA <= x"4dd6";
when "00" & x"879" => DATA <= x"4e96";
when "00" & x"87a" => DATA <= x"2c5f";
when "00" & x"87b" => DATA <= x"023c";
when "00" & x"87c" => DATA <= x"00fd";
when "00" & x"87d" => DATA <= x"4e75";
when "00" & x"87e" => DATA <= x"203c";
when "00" & x"87f" => DATA <= x"003f";
when "00" & x"880" => DATA <= x"2ef8";
when "00" & x"881" => DATA <= x"003c";
when "00" & x"882" => DATA <= x"0002";
when "00" & x"883" => DATA <= x"4e75";
when "00" & x"884" => DATA <= x"103c";
when "00" & x"885" => DATA <= x"008b";
when "00" & x"886" => DATA <= x"6100";
when "00" & x"887" => DATA <= x"f9c8";
when "00" & x"888" => DATA <= x"103c";
when "00" & x"889" => DATA <= x"0010";
when "00" & x"88a" => DATA <= x"4e75";
when "00" & x"88b" => DATA <= x"7000";
when "00" & x"88c" => DATA <= x"7200";
when "00" & x"88d" => DATA <= x"6100";
when "00" & x"88e" => DATA <= x"fbb2";
when "00" & x"88f" => DATA <= x"103c";
when "00" & x"890" => DATA <= x"0016";
when "00" & x"891" => DATA <= x"4e75";
when "00" & x"892" => DATA <= x"2f38";
when "00" & x"893" => DATA <= x"0404";
when "00" & x"894" => DATA <= x"4e75";
when "00" & x"895" => DATA <= x"0838";
when "00" & x"896" => DATA <= x"0006";
when "00" & x"897" => DATA <= x"0535";
when "00" & x"898" => DATA <= x"6600";
when "00" & x"899" => DATA <= x"0008";
when "00" & x"89a" => DATA <= x"023c";
when "00" & x"89b" => DATA <= x"00fe";
when "00" & x"89c" => DATA <= x"4e75";
when "00" & x"89d" => DATA <= x"003c";
when "00" & x"89e" => DATA <= x"0001";
when "00" & x"89f" => DATA <= x"4e75";
when "00" & x"8a0" => DATA <= x"2f04";
when "00" & x"8a1" => DATA <= x"7801";
when "00" & x"8a2" => DATA <= x"2f0e";
when "00" & x"8a3" => DATA <= x"2c79";
when "00" & x"8a4" => DATA <= x"0000";
when "00" & x"8a5" => DATA <= x"048c";
when "00" & x"8a6" => DATA <= x"4e96";
when "00" & x"8a7" => DATA <= x"2c5f";
when "00" & x"8a8" => DATA <= x"281f";
when "00" & x"8a9" => DATA <= x"4e75";
when "00" & x"8aa" => DATA <= x"4e75";
when "00" & x"8ab" => DATA <= x"b0bc";
when "00" & x"8ac" => DATA <= x"0000";
when "00" & x"8ad" => DATA <= x"04ff";
when "00" & x"8ae" => DATA <= x"6200";
when "00" & x"8af" => DATA <= x"0040";
when "00" & x"8b0" => DATA <= x"b2bc";
when "00" & x"8b1" => DATA <= x"0000";
when "00" & x"8b2" => DATA <= x"03ff";
when "00" & x"8b3" => DATA <= x"6200";
when "00" & x"8b4" => DATA <= x"0036";
when "00" & x"8b5" => DATA <= x"2f00";
when "00" & x"8b6" => DATA <= x"2f01";
when "00" & x"8b7" => DATA <= x"31c0";
when "00" & x"8b8" => DATA <= x"0600";
when "00" & x"8b9" => DATA <= x"31c1";
when "00" & x"8ba" => DATA <= x"0602";
when "00" & x"8bb" => DATA <= x"223c";
when "00" & x"8bc" => DATA <= x"0000";
when "00" & x"8bd" => DATA <= x"0600";
when "00" & x"8be" => DATA <= x"7009";
when "00" & x"8bf" => DATA <= x"6100";
when "00" & x"8c0" => DATA <= x"fa68";
when "00" & x"8c1" => DATA <= x"7400";
when "00" & x"8c2" => DATA <= x"7600";
when "00" & x"8c3" => DATA <= x"1438";
when "00" & x"8c4" => DATA <= x"0604";
when "00" & x"8c5" => DATA <= x"221f";
when "00" & x"8c6" => DATA <= x"201f";
when "00" & x"8c7" => DATA <= x"b43c";
when "00" & x"8c8" => DATA <= x"00ff";
when "00" & x"8c9" => DATA <= x"6700";
when "00" & x"8ca" => DATA <= x"000a";
when "00" & x"8cb" => DATA <= x"7800";
when "00" & x"8cc" => DATA <= x"023c";
when "00" & x"8cd" => DATA <= x"00fd";
when "00" & x"8ce" => DATA <= x"4e75";
when "00" & x"8cf" => DATA <= x"203c";
when "00" & x"8d0" => DATA <= x"003f";
when "00" & x"8d1" => DATA <= x"2d68";
when "00" & x"8d2" => DATA <= x"78ff";
when "00" & x"8d3" => DATA <= x"003c";
when "00" & x"8d4" => DATA <= x"0002";
when "00" & x"8d5" => DATA <= x"4e75";
when "00" & x"8d6" => DATA <= x"b5fc";
when "00" & x"8d7" => DATA <= x"0000";
when "00" & x"8d8" => DATA <= x"002f";
when "00" & x"8d9" => DATA <= x"6200";
when "00" & x"8da" => DATA <= x"0018";
when "00" & x"8db" => DATA <= x"2f0a";
when "00" & x"8dc" => DATA <= x"d4ca";
when "00" & x"8dd" => DATA <= x"d4ca";
when "00" & x"8de" => DATA <= x"d5f8";
when "00" & x"8df" => DATA <= x"0000";
when "00" & x"8e0" => DATA <= x"45d2";
when "00" & x"8e1" => DATA <= x"4e92";
when "00" & x"8e2" => DATA <= x"245f";
when "00" & x"8e3" => DATA <= x"023c";
when "00" & x"8e4" => DATA <= x"00fd";
when "00" & x"8e5" => DATA <= x"4e75";
when "00" & x"8e6" => DATA <= x"203c";
when "00" & x"8e7" => DATA <= x"003f";
when "00" & x"8e8" => DATA <= x"2e4c";
when "00" & x"8e9" => DATA <= x"003c";
when "00" & x"8ea" => DATA <= x"0002";
when "00" & x"8eb" => DATA <= x"4e75";
when "00" & x"8ec" => DATA <= x"2f00";
when "00" & x"8ed" => DATA <= x"2f01";
when "00" & x"8ee" => DATA <= x"203c";
when "00" & x"8ef" => DATA <= x"003f";
when "00" & x"8f0" => DATA <= x"2826";
when "00" & x"8f1" => DATA <= x"720b";
when "00" & x"8f2" => DATA <= x"6100";
when "00" & x"8f3" => DATA <= x"018c";
when "00" & x"8f4" => DATA <= x"221f";
when "00" & x"8f5" => DATA <= x"201f";
when "00" & x"8f6" => DATA <= x"023c";
when "00" & x"8f7" => DATA <= x"00fd";
when "00" & x"8f8" => DATA <= x"4e75";
when "00" & x"8f9" => DATA <= x"2f00";
when "00" & x"8fa" => DATA <= x"2f01";
when "00" & x"8fb" => DATA <= x"203c";
when "00" & x"8fc" => DATA <= x"003f";
when "00" & x"8fd" => DATA <= x"2831";
when "00" & x"8fe" => DATA <= x"720b";
when "00" & x"8ff" => DATA <= x"6100";
when "00" & x"900" => DATA <= x"0172";
when "00" & x"901" => DATA <= x"221f";
when "00" & x"902" => DATA <= x"201f";
when "00" & x"903" => DATA <= x"023c";
when "00" & x"904" => DATA <= x"00fd";
when "00" & x"905" => DATA <= x"4e75";
when "00" & x"906" => DATA <= x"2f0e";
when "00" & x"907" => DATA <= x"2f09";
when "00" & x"908" => DATA <= x"2f01";
when "00" & x"909" => DATA <= x"2f00";
when "00" & x"90a" => DATA <= x"2c41";
when "00" & x"90b" => DATA <= x"0280";
when "00" & x"90c" => DATA <= x"0002";
when "00" & x"90d" => DATA <= x"0000";
when "00" & x"90e" => DATA <= x"6700";
when "00" & x"90f" => DATA <= x"000c";
when "00" & x"910" => DATA <= x"5382";
when "00" & x"911" => DATA <= x"6b00";
when "00" & x"912" => DATA <= x"005c";
when "00" & x"913" => DATA <= x"1cfc";
when "00" & x"914" => DATA <= x"0058";
when "00" & x"915" => DATA <= x"43f9";
when "00" & x"916" => DATA <= x"003f";
when "00" & x"917" => DATA <= x"2f54";
when "00" & x"918" => DATA <= x"b099";
when "00" & x"919" => DATA <= x"6700";
when "00" & x"91a" => DATA <= x"0014";
when "00" & x"91b" => DATA <= x"2219";
when "00" & x"91c" => DATA <= x"b23c";
when "00" & x"91d" => DATA <= x"00ff";
when "00" & x"91e" => DATA <= x"6700";
when "00" & x"91f" => DATA <= x"0020";
when "00" & x"920" => DATA <= x"b23c";
when "00" & x"921" => DATA <= x"0000";
when "00" & x"922" => DATA <= x"66f0";
when "00" & x"923" => DATA <= x"60e8";
when "00" & x"924" => DATA <= x"2019";
when "00" & x"925" => DATA <= x"5382";
when "00" & x"926" => DATA <= x"6b00";
when "00" & x"927" => DATA <= x"0032";
when "00" & x"928" => DATA <= x"1cd9";
when "00" & x"929" => DATA <= x"66f6";
when "00" & x"92a" => DATA <= x"201f";
when "00" & x"92b" => DATA <= x"221f";
when "00" & x"92c" => DATA <= x"225f";
when "00" & x"92d" => DATA <= x"2c5f";
when "00" & x"92e" => DATA <= x"4e75";
when "00" & x"92f" => DATA <= x"0c81";
when "00" & x"930" => DATA <= x"0000";
when "00" & x"931" => DATA <= x"000d";
when "00" & x"932" => DATA <= x"6500";
when "00" & x"933" => DATA <= x"001a";
when "00" & x"934" => DATA <= x"2cfc";
when "00" & x"935" => DATA <= x"4f53";
when "00" & x"936" => DATA <= x"5f55";
when "00" & x"937" => DATA <= x"2cfc";
when "00" & x"938" => DATA <= x"6e64";
when "00" & x"939" => DATA <= x"6566";
when "00" & x"93a" => DATA <= x"2cfc";
when "00" & x"93b" => DATA <= x"696e";
when "00" & x"93c" => DATA <= x"6564";
when "00" & x"93d" => DATA <= x"1cfc";
when "00" & x"93e" => DATA <= x"0000";
when "00" & x"93f" => DATA <= x"60d4";
when "00" & x"940" => DATA <= x"003c";
when "00" & x"941" => DATA <= x"0002";
when "00" & x"942" => DATA <= x"2ebc";
when "00" & x"943" => DATA <= x"003f";
when "00" & x"944" => DATA <= x"2e84";
when "00" & x"945" => DATA <= x"60c8";
when "00" & x"946" => DATA <= x"2f0e";
when "00" & x"947" => DATA <= x"2f0d";
when "00" & x"948" => DATA <= x"2f01";
when "00" & x"949" => DATA <= x"4bf9";
when "00" & x"94a" => DATA <= x"003f";
when "00" & x"94b" => DATA <= x"2f54";
when "00" & x"94c" => DATA <= x"2c57";
when "00" & x"94d" => DATA <= x"201d";
when "00" & x"94e" => DATA <= x"588d";
when "00" & x"94f" => DATA <= x"bd8d";
when "00" & x"950" => DATA <= x"6600";
when "00" & x"951" => DATA <= x"0010";
when "00" & x"952" => DATA <= x"4a2d";
when "00" & x"953" => DATA <= x"ffff";
when "00" & x"954" => DATA <= x"66f4";
when "00" & x"955" => DATA <= x"221f";
when "00" & x"956" => DATA <= x"2a5f";
when "00" & x"957" => DATA <= x"2c5f";
when "00" & x"958" => DATA <= x"4e75";
when "00" & x"959" => DATA <= x"201d";
when "00" & x"95a" => DATA <= x"4a00";
when "00" & x"95b" => DATA <= x"66fa";
when "00" & x"95c" => DATA <= x"b03c";
when "00" & x"95d" => DATA <= x"00ff";
when "00" & x"95e" => DATA <= x"66da";
when "00" & x"95f" => DATA <= x"221f";
when "00" & x"960" => DATA <= x"2a5f";
when "00" & x"961" => DATA <= x"2c5f";
when "00" & x"962" => DATA <= x"203c";
when "00" & x"963" => DATA <= x"003f";
when "00" & x"964" => DATA <= x"2e98";
when "00" & x"965" => DATA <= x"003c";
when "00" & x"966" => DATA <= x"0002";
when "00" & x"967" => DATA <= x"4e75";
when "00" & x"968" => DATA <= x"4a80";
when "00" & x"969" => DATA <= x"6d00";
when "00" & x"96a" => DATA <= x"0010";
when "00" & x"96b" => DATA <= x"b2b8";
when "00" & x"96c" => DATA <= x"0508";
when "00" & x"96d" => DATA <= x"6200";
when "00" & x"96e" => DATA <= x"0008";
when "00" & x"96f" => DATA <= x"023c";
when "00" & x"970" => DATA <= x"00fe";
when "00" & x"971" => DATA <= x"4e75";
when "00" & x"972" => DATA <= x"003c";
when "00" & x"973" => DATA <= x"0001";
when "00" & x"974" => DATA <= x"4e75";
when "00" & x"975" => DATA <= x"0c80";
when "00" & x"976" => DATA <= x"0000";
when "00" & x"977" => DATA <= x"0007";
when "00" & x"978" => DATA <= x"6200";
when "00" & x"979" => DATA <= x"0008";
when "00" & x"97a" => DATA <= x"023c";
when "00" & x"97b" => DATA <= x"00fe";
when "00" & x"97c" => DATA <= x"4e75";
when "00" & x"97d" => DATA <= x"70ff";
when "00" & x"97e" => DATA <= x"72fe";
when "00" & x"97f" => DATA <= x"003c";
when "00" & x"980" => DATA <= x"0001";
when "00" & x"981" => DATA <= x"4e75";
when "00" & x"982" => DATA <= x"2f38";
when "00" & x"983" => DATA <= x"0478";
when "00" & x"984" => DATA <= x"4e75";
when "00" & x"985" => DATA <= x"2f01";
when "00" & x"986" => DATA <= x"7001";
when "00" & x"987" => DATA <= x"223c";
when "00" & x"988" => DATA <= x"0000";
when "00" & x"989" => DATA <= x"0600";
when "00" & x"98a" => DATA <= x"6100";
when "00" & x"98b" => DATA <= x"f8d2";
when "00" & x"98c" => DATA <= x"2038";
when "00" & x"98d" => DATA <= x"0600";
when "00" & x"98e" => DATA <= x"90b8";
when "00" & x"98f" => DATA <= x"0528";
when "00" & x"990" => DATA <= x"221f";
when "00" & x"991" => DATA <= x"4e75";
when "00" & x"992" => DATA <= x"b0bc";
when "00" & x"993" => DATA <= x"0000";
when "00" & x"994" => DATA <= x"04ff";
when "00" & x"995" => DATA <= x"6200";
when "00" & x"996" => DATA <= x"0038";
when "00" & x"997" => DATA <= x"b2bc";
when "00" & x"998" => DATA <= x"0000";
when "00" & x"999" => DATA <= x"03ff";
when "00" & x"99a" => DATA <= x"6200";
when "00" & x"99b" => DATA <= x"002e";
when "00" & x"99c" => DATA <= x"2f00";
when "00" & x"99d" => DATA <= x"7019";
when "00" & x"99e" => DATA <= x"6100";
when "00" & x"99f" => DATA <= x"f6ac";
when "00" & x"9a0" => DATA <= x"201f";
when "00" & x"9a1" => DATA <= x"6100";
when "00" & x"9a2" => DATA <= x"f6a6";
when "00" & x"9a3" => DATA <= x"3001";
when "00" & x"9a4" => DATA <= x"6100";
when "00" & x"9a5" => DATA <= x"f6a0";
when "00" & x"9a6" => DATA <= x"e088";
when "00" & x"9a7" => DATA <= x"6100";
when "00" & x"9a8" => DATA <= x"f69a";
when "00" & x"9a9" => DATA <= x"3002";
when "00" & x"9aa" => DATA <= x"6100";
when "00" & x"9ab" => DATA <= x"f694";
when "00" & x"9ac" => DATA <= x"e088";
when "00" & x"9ad" => DATA <= x"6100";
when "00" & x"9ae" => DATA <= x"f68e";
when "00" & x"9af" => DATA <= x"023c";
when "00" & x"9b0" => DATA <= x"00fd";
when "00" & x"9b1" => DATA <= x"4e75";
when "00" & x"9b2" => DATA <= x"203c";
when "00" & x"9b3" => DATA <= x"003f";
when "00" & x"9b4" => DATA <= x"2d68";
when "00" & x"9b5" => DATA <= x"78ff";
when "00" & x"9b6" => DATA <= x"003c";
when "00" & x"9b7" => DATA <= x"0002";
when "00" & x"9b8" => DATA <= x"4e75";
when "00" & x"9b9" => DATA <= x"0c81";
when "00" & x"9ba" => DATA <= x"0000";
when "00" & x"9bb" => DATA <= x"0000";
when "00" & x"9bc" => DATA <= x"6700";
when "00" & x"9bd" => DATA <= x"001c";
when "00" & x"9be" => DATA <= x"5341";
when "00" & x"9bf" => DATA <= x"2f08";
when "00" & x"9c0" => DATA <= x"2f00";
when "00" & x"9c1" => DATA <= x"2f01";
when "00" & x"9c2" => DATA <= x"2040";
when "00" & x"9c3" => DATA <= x"1018";
when "00" & x"9c4" => DATA <= x"6100";
when "00" & x"9c5" => DATA <= x"f660";
when "00" & x"9c6" => DATA <= x"51c9";
when "00" & x"9c7" => DATA <= x"fff8";
when "00" & x"9c8" => DATA <= x"221f";
when "00" & x"9c9" => DATA <= x"201f";
when "00" & x"9ca" => DATA <= x"205f";
when "00" & x"9cb" => DATA <= x"4e75";
when "00" & x"9cc" => DATA <= x"2f0e";
when "00" & x"9cd" => DATA <= x"2f0d";
when "00" & x"9ce" => DATA <= x"4a80";
when "00" & x"9cf" => DATA <= x"6700";
when "00" & x"9d0" => DATA <= x"000e";
when "00" & x"9d1" => DATA <= x"2c40";
when "00" & x"9d2" => DATA <= x"2a7c";
when "00" & x"9d3" => DATA <= x"0000";
when "00" & x"9d4" => DATA <= x"0600";
when "00" & x"9d5" => DATA <= x"1ade";
when "00" & x"9d6" => DATA <= x"66fc";
when "00" & x"9d7" => DATA <= x"4a81";
when "00" & x"9d8" => DATA <= x"6700";
when "00" & x"9d9" => DATA <= x"0016";
when "00" & x"9da" => DATA <= x"2f02";
when "00" & x"9db" => DATA <= x"7404";
when "00" & x"9dc" => DATA <= x"2c41";
when "00" & x"9dd" => DATA <= x"2a7c";
when "00" & x"9de" => DATA <= x"0000";
when "00" & x"9df" => DATA <= x"052d";
when "00" & x"9e0" => DATA <= x"1ade";
when "00" & x"9e1" => DATA <= x"5382";
when "00" & x"9e2" => DATA <= x"6afa";
when "00" & x"9e3" => DATA <= x"241f";
when "00" & x"9e4" => DATA <= x"2a5f";
when "00" & x"9e5" => DATA <= x"2c5f";
when "00" & x"9e6" => DATA <= x"4e75";
when "00" & x"9e7" => DATA <= x"2f02";
when "00" & x"9e8" => DATA <= x"2f01";
when "00" & x"9e9" => DATA <= x"2f00";
when "00" & x"9ea" => DATA <= x"2203";
when "00" & x"9eb" => DATA <= x"7004";
when "00" & x"9ec" => DATA <= x"6100";
when "00" & x"9ed" => DATA <= x"fbf4";
when "00" & x"9ee" => DATA <= x"201f";
when "00" & x"9ef" => DATA <= x"221f";
when "00" & x"9f0" => DATA <= x"241f";
when "00" & x"9f1" => DATA <= x"6000";
when "00" & x"9f2" => DATA <= x"fa64";
when "00" & x"9f3" => DATA <= x"b07c";
when "00" & x"9f4" => DATA <= x"0010";
when "00" & x"9f5" => DATA <= x"6300";
when "00" & x"9f6" => DATA <= x"000e";
when "00" & x"9f7" => DATA <= x"203c";
when "00" & x"9f8" => DATA <= x"003f";
when "00" & x"9f9" => DATA <= x"2e20";
when "00" & x"9fa" => DATA <= x"003c";
when "00" & x"9fb" => DATA <= x"0002";
when "00" & x"9fc" => DATA <= x"4e75";
when "00" & x"9fd" => DATA <= x"41f9";
when "00" & x"9fe" => DATA <= x"003f";
when "00" & x"9ff" => DATA <= x"3630";
when "00" & x"a00" => DATA <= x"e588";
when "00" & x"a01" => DATA <= x"d1c0";
when "00" & x"a02" => DATA <= x"d1c0";
when "00" & x"a03" => DATA <= x"d1c0";
when "00" & x"a04" => DATA <= x"2218";
when "00" & x"a05" => DATA <= x"6700";
when "00" & x"a06" => DATA <= x"11ea";
when "00" & x"a07" => DATA <= x"0681";
when "00" & x"a08" => DATA <= x"003f";
when "00" & x"a09" => DATA <= x"0000";
when "00" & x"a0a" => DATA <= x"2418";
when "00" & x"a0b" => DATA <= x"6700";
when "00" & x"a0c" => DATA <= x"0008";
when "00" & x"a0d" => DATA <= x"0682";
when "00" & x"a0e" => DATA <= x"003f";
when "00" & x"a0f" => DATA <= x"0000";
when "00" & x"a10" => DATA <= x"2618";
when "00" & x"a11" => DATA <= x"6700";
when "00" & x"a12" => DATA <= x"0008";
when "00" & x"a13" => DATA <= x"0683";
when "00" & x"a14" => DATA <= x"003f";
when "00" & x"a15" => DATA <= x"0000";
when "00" & x"a16" => DATA <= x"4e75";
when "00" & x"a17" => DATA <= x"b0bc";
when "00" & x"a18" => DATA <= x"0000";
when "00" & x"a19" => DATA <= x"04ff";
when "00" & x"a1a" => DATA <= x"6200";
when "00" & x"a1b" => DATA <= x"005c";
when "00" & x"a1c" => DATA <= x"b2bc";
when "00" & x"a1d" => DATA <= x"0000";
when "00" & x"a1e" => DATA <= x"03ff";
when "00" & x"a1f" => DATA <= x"6200";
when "00" & x"a20" => DATA <= x"0052";
when "00" & x"a21" => DATA <= x"2f00";
when "00" & x"a22" => DATA <= x"2f01";
when "00" & x"a23" => DATA <= x"103c";
when "00" & x"a24" => DATA <= x"0017";
when "00" & x"a25" => DATA <= x"6100";
when "00" & x"a26" => DATA <= x"f59e";
when "00" & x"a27" => DATA <= x"103c";
when "00" & x"a28" => DATA <= x"0011";
when "00" & x"a29" => DATA <= x"6100";
when "00" & x"a2a" => DATA <= x"f596";
when "00" & x"a2b" => DATA <= x"103c";
when "00" & x"a2c" => DATA <= x"0006";
when "00" & x"a2d" => DATA <= x"6100";
when "00" & x"a2e" => DATA <= x"f58e";
when "00" & x"a2f" => DATA <= x"201f";
when "00" & x"a30" => DATA <= x"e098";
when "00" & x"a31" => DATA <= x"6100";
when "00" & x"a32" => DATA <= x"f586";
when "00" & x"a33" => DATA <= x"e198";
when "00" & x"a34" => DATA <= x"6100";
when "00" & x"a35" => DATA <= x"f580";
when "00" & x"a36" => DATA <= x"2001";
when "00" & x"a37" => DATA <= x"e098";
when "00" & x"a38" => DATA <= x"6100";
when "00" & x"a39" => DATA <= x"f578";
when "00" & x"a3a" => DATA <= x"e198";
when "00" & x"a3b" => DATA <= x"6100";
when "00" & x"a3c" => DATA <= x"f572";
when "00" & x"a3d" => DATA <= x"7000";
when "00" & x"a3e" => DATA <= x"6100";
when "00" & x"a3f" => DATA <= x"f56c";
when "00" & x"a40" => DATA <= x"6100";
when "00" & x"a41" => DATA <= x"f568";
when "00" & x"a42" => DATA <= x"6100";
when "00" & x"a43" => DATA <= x"f564";
when "00" & x"a44" => DATA <= x"221f";
when "00" & x"a45" => DATA <= x"201f";
when "00" & x"a46" => DATA <= x"023c";
when "00" & x"a47" => DATA <= x"00fe";
when "00" & x"a48" => DATA <= x"4e75";
when "00" & x"a49" => DATA <= x"203c";
when "00" & x"a4a" => DATA <= x"003f";
when "00" & x"a4b" => DATA <= x"2d68";
when "00" & x"a4c" => DATA <= x"003c";
when "00" & x"a4d" => DATA <= x"0002";
when "00" & x"a4e" => DATA <= x"4e75";
when "00" & x"a4f" => DATA <= x"6100";
when "00" & x"a50" => DATA <= x"f584";
when "00" & x"a51" => DATA <= x"0000";
when "00" & x"a52" => DATA <= x"0020";
when "00" & x"a53" => DATA <= x"b03c";
when "00" & x"a54" => DATA <= x"0079";
when "00" & x"a55" => DATA <= x"4e75";
when "00" & x"a56" => DATA <= x"2f0e";
when "00" & x"a57" => DATA <= x"2f04";
when "00" & x"a58" => DATA <= x"2c41";
when "00" & x"a59" => DATA <= x"8643";
when "00" & x"a5a" => DATA <= x"6700";
when "00" & x"a5b" => DATA <= x"001e";
when "00" & x"a5c" => DATA <= x"1816";
when "00" & x"a5d" => DATA <= x"e144";
when "00" & x"a5e" => DATA <= x"b940";
when "00" & x"a5f" => DATA <= x"7807";
when "00" & x"a60" => DATA <= x"e340";
when "00" & x"a61" => DATA <= x"6400";
when "00" & x"a62" => DATA <= x"0006";
when "00" & x"a63" => DATA <= x"0a40";
when "00" & x"a64" => DATA <= x"1021";
when "00" & x"a65" => DATA <= x"51cc";
when "00" & x"a66" => DATA <= x"fff4";
when "00" & x"a67" => DATA <= x"dcc3";
when "00" & x"a68" => DATA <= x"b48e";
when "00" & x"a69" => DATA <= x"65e4";
when "00" & x"a6a" => DATA <= x"281f";
when "00" & x"a6b" => DATA <= x"2c5f";
when "00" & x"a6c" => DATA <= x"023c";
when "00" & x"a6d" => DATA <= x"00fd";
when "00" & x"a6e" => DATA <= x"4e75";
when "00" & x"a6f" => DATA <= x"1400";
when "00" & x"a70" => DATA <= x"708a";
when "00" & x"a71" => DATA <= x"7203";
when "00" & x"a72" => DATA <= x"6100";
when "00" & x"a73" => DATA <= x"f5f0";
when "00" & x"a74" => DATA <= x"4e75";
when "00" & x"a75" => DATA <= x"027c";
when "00" & x"a76" => DATA <= x"dfff";
when "00" & x"a77" => DATA <= x"4e75";
when "00" & x"a78" => DATA <= x"b2bc";
when "00" & x"a79" => DATA <= x"0000";
when "00" & x"a7a" => DATA <= x"00ff";
when "00" & x"a7b" => DATA <= x"6200";
when "00" & x"a7c" => DATA <= x"0060";
when "00" & x"a7d" => DATA <= x"2f08";
when "00" & x"a7e" => DATA <= x"2040";
when "00" & x"a7f" => DATA <= x"103c";
when "00" & x"a80" => DATA <= x"000a";
when "00" & x"a81" => DATA <= x"6100";
when "00" & x"a82" => DATA <= x"eee2";
when "00" & x"a83" => DATA <= x"1003";
when "00" & x"a84" => DATA <= x"6100";
when "00" & x"a85" => DATA <= x"eedc";
when "00" & x"a86" => DATA <= x"1002";
when "00" & x"a87" => DATA <= x"6100";
when "00" & x"a88" => DATA <= x"eed6";
when "00" & x"a89" => DATA <= x"1001";
when "00" & x"a8a" => DATA <= x"6100";
when "00" & x"a8b" => DATA <= x"eed0";
when "00" & x"a8c" => DATA <= x"103c";
when "00" & x"a8d" => DATA <= x"0007";
when "00" & x"a8e" => DATA <= x"6100";
when "00" & x"a8f" => DATA <= x"eec8";
when "00" & x"a90" => DATA <= x"103c";
when "00" & x"a91" => DATA <= x"0000";
when "00" & x"a92" => DATA <= x"6100";
when "00" & x"a93" => DATA <= x"eec0";
when "00" & x"a94" => DATA <= x"6100";
when "00" & x"a95" => DATA <= x"eeaa";
when "00" & x"a96" => DATA <= x"b03c";
when "00" & x"a97" => DATA <= x"0080";
when "00" & x"a98" => DATA <= x"6400";
when "00" & x"a99" => DATA <= x"001c";
when "00" & x"a9a" => DATA <= x"7200";
when "00" & x"a9b" => DATA <= x"6100";
when "00" & x"a9c" => DATA <= x"ee9c";
when "00" & x"a9d" => DATA <= x"10c0";
when "00" & x"a9e" => DATA <= x"5241";
when "00" & x"a9f" => DATA <= x"b03c";
when "00" & x"aa0" => DATA <= x"000d";
when "00" & x"aa1" => DATA <= x"66f2";
when "00" & x"aa2" => DATA <= x"5341";
when "00" & x"aa3" => DATA <= x"205f";
when "00" & x"aa4" => DATA <= x"023c";
when "00" & x"aa5" => DATA <= x"00fe";
when "00" & x"aa6" => DATA <= x"4e75";
when "00" & x"aa7" => DATA <= x"205f";
when "00" & x"aa8" => DATA <= x"5341";
when "00" & x"aa9" => DATA <= x"003c";
when "00" & x"aaa" => DATA <= x"0001";
when "00" & x"aab" => DATA <= x"4e75";
when "00" & x"aac" => DATA <= x"003c";
when "00" & x"aad" => DATA <= x"0002";
when "00" & x"aae" => DATA <= x"4e75";
when "00" & x"aaf" => DATA <= x"2f03";
when "00" & x"ab0" => DATA <= x"2639";
when "00" & x"ab1" => DATA <= x"003f";
when "00" & x"ab2" => DATA <= x"3ede";
when "00" & x"ab3" => DATA <= x"6100";
when "00" & x"ab4" => DATA <= x"0006";
when "00" & x"ab5" => DATA <= x"261f";
when "00" & x"ab6" => DATA <= x"4e75";
when "00" & x"ab7" => DATA <= x"2f0e";
when "00" & x"ab8" => DATA <= x"2f0d";
when "00" & x"ab9" => DATA <= x"2c41";
when "00" & x"aba" => DATA <= x"2a43";
when "00" & x"abb" => DATA <= x"101e";
when "00" & x"abc" => DATA <= x"b03c";
when "00" & x"abd" => DATA <= x"0025";
when "00" & x"abe" => DATA <= x"6700";
when "00" & x"abf" => DATA <= x"0010";
when "00" & x"ac0" => DATA <= x"1ac0";
when "00" & x"ac1" => DATA <= x"b03c";
when "00" & x"ac2" => DATA <= x"0000";
when "00" & x"ac3" => DATA <= x"66ee";
when "00" & x"ac4" => DATA <= x"2a5f";
when "00" & x"ac5" => DATA <= x"2c5f";
when "00" & x"ac6" => DATA <= x"4e75";
when "00" & x"ac7" => DATA <= x"101e";
when "00" & x"ac8" => DATA <= x"b03c";
when "00" & x"ac9" => DATA <= x"0030";
when "00" & x"aca" => DATA <= x"6600";
when "00" & x"acb" => DATA <= x"0008";
when "00" & x"acc" => DATA <= x"1afc";
when "00" & x"acd" => DATA <= x"0000";
when "00" & x"ace" => DATA <= x"60d8";
when "00" & x"acf" => DATA <= x"c03c";
when "00" & x"ad0" => DATA <= x"00df";
when "00" & x"ad1" => DATA <= x"b03c";
when "00" & x"ad2" => DATA <= x"0025";
when "00" & x"ad3" => DATA <= x"6600";
when "00" & x"ad4" => DATA <= x"0008";
when "00" & x"ad5" => DATA <= x"1afc";
when "00" & x"ad6" => DATA <= x"0025";
when "00" & x"ad7" => DATA <= x"60c6";
when "00" & x"ad8" => DATA <= x"b03c";
when "00" & x"ad9" => DATA <= x"005a";
when "00" & x"ada" => DATA <= x"6600";
when "00" & x"adb" => DATA <= x"0006";
when "00" & x"adc" => DATA <= x"123c";
when "00" & x"add" => DATA <= x"005a";
when "00" & x"ade" => DATA <= x"e158";
when "00" & x"adf" => DATA <= x"101e";
when "00" & x"ae0" => DATA <= x"c07c";
when "00" & x"ae1" => DATA <= x"dfdf";
when "00" & x"ae2" => DATA <= x"b07c";
when "00" & x"ae3" => DATA <= x"4353";
when "00" & x"ae4" => DATA <= x"6700";
when "00" & x"ae5" => DATA <= x"00aa";
when "00" & x"ae6" => DATA <= x"b07c";
when "00" & x"ae7" => DATA <= x"5345";
when "00" & x"ae8" => DATA <= x"6700";
when "00" & x"ae9" => DATA <= x"00a2";
when "00" & x"aea" => DATA <= x"b07c";
when "00" & x"aeb" => DATA <= x"4d49";
when "00" & x"aec" => DATA <= x"6700";
when "00" & x"aed" => DATA <= x"009a";
when "00" & x"aee" => DATA <= x"b07c";
when "00" & x"aef" => DATA <= x"3132";
when "00" & x"af0" => DATA <= x"6700";
when "00" & x"af1" => DATA <= x"0092";
when "00" & x"af2" => DATA <= x"b07c";
when "00" & x"af3" => DATA <= x"3234";
when "00" & x"af4" => DATA <= x"6700";
when "00" & x"af5" => DATA <= x"008a";
when "00" & x"af6" => DATA <= x"b07c";
when "00" & x"af7" => DATA <= x"414d";
when "00" & x"af8" => DATA <= x"6700";
when "00" & x"af9" => DATA <= x"0082";
when "00" & x"afa" => DATA <= x"b07c";
when "00" & x"afb" => DATA <= x"504d";
when "00" & x"afc" => DATA <= x"6700";
when "00" & x"afd" => DATA <= x"007a";
when "00" & x"afe" => DATA <= x"b07c";
when "00" & x"aff" => DATA <= x"5745";
when "00" & x"b00" => DATA <= x"6700";
when "00" & x"b01" => DATA <= x"0072";
when "00" & x"b02" => DATA <= x"b07c";
when "00" & x"b03" => DATA <= x"5733";
when "00" & x"b04" => DATA <= x"6700";
when "00" & x"b05" => DATA <= x"006a";
when "00" & x"b06" => DATA <= x"b07c";
when "00" & x"b07" => DATA <= x"574e";
when "00" & x"b08" => DATA <= x"6700";
when "00" & x"b09" => DATA <= x"0062";
when "00" & x"b0a" => DATA <= x"b07c";
when "00" & x"b0b" => DATA <= x"4459";
when "00" & x"b0c" => DATA <= x"6700";
when "00" & x"b0d" => DATA <= x"005a";
when "00" & x"b0e" => DATA <= x"b07c";
when "00" & x"b0f" => DATA <= x"5354";
when "00" & x"b10" => DATA <= x"6700";
when "00" & x"b11" => DATA <= x"0052";
when "00" & x"b12" => DATA <= x"b07c";
when "00" & x"b13" => DATA <= x"4d4f";
when "00" & x"b14" => DATA <= x"6700";
when "00" & x"b15" => DATA <= x"004a";
when "00" & x"b16" => DATA <= x"b07c";
when "00" & x"b17" => DATA <= x"4d33";
when "00" & x"b18" => DATA <= x"6700";
when "00" & x"b19" => DATA <= x"0042";
when "00" & x"b1a" => DATA <= x"b07c";
when "00" & x"b1b" => DATA <= x"4d4e";
when "00" & x"b1c" => DATA <= x"6700";
when "00" & x"b1d" => DATA <= x"003a";
when "00" & x"b1e" => DATA <= x"b07c";
when "00" & x"b1f" => DATA <= x"4345";
when "00" & x"b20" => DATA <= x"6700";
when "00" & x"b21" => DATA <= x"0032";
when "00" & x"b22" => DATA <= x"b07c";
when "00" & x"b23" => DATA <= x"5952";
when "00" & x"b24" => DATA <= x"6700";
when "00" & x"b25" => DATA <= x"002a";
when "00" & x"b26" => DATA <= x"b07c";
when "00" & x"b27" => DATA <= x"574b";
when "00" & x"b28" => DATA <= x"6700";
when "00" & x"b29" => DATA <= x"0022";
when "00" & x"b2a" => DATA <= x"b07c";
when "00" & x"b2b" => DATA <= x"444e";
when "00" & x"b2c" => DATA <= x"6700";
when "00" & x"b2d" => DATA <= x"001a";
when "00" & x"b2e" => DATA <= x"b07c";
when "00" & x"b2f" => DATA <= x"545a";
when "00" & x"b30" => DATA <= x"6700";
when "00" & x"b31" => DATA <= x"0012";
when "00" & x"b32" => DATA <= x"2a5f";
when "00" & x"b33" => DATA <= x"2c5f";
when "00" & x"b34" => DATA <= x"203c";
when "00" & x"b35" => DATA <= x"003f";
when "00" & x"b36" => DATA <= x"2eb0";
when "00" & x"b37" => DATA <= x"003c";
when "00" & x"b38" => DATA <= x"0002";
when "00" & x"b39" => DATA <= x"4e75";
when "00" & x"b3a" => DATA <= x"6000";
when "00" & x"b3b" => DATA <= x"ff00";
when "00" & x"b3c" => DATA <= x"b4bc";
when "00" & x"b3d" => DATA <= x"0000";
when "00" & x"b3e" => DATA <= x"0002";
when "00" & x"b3f" => DATA <= x"6f00";
when "00" & x"b40" => DATA <= x"0484";
when "00" & x"b41" => DATA <= x"5582";
when "00" & x"b42" => DATA <= x"2f0e";
when "00" & x"b43" => DATA <= x"48e7";
when "00" & x"b44" => DATA <= x"7000";
when "00" & x"b45" => DATA <= x"343c";
when "00" & x"b46" => DATA <= x"0000";
when "00" & x"b47" => DATA <= x"e898";
when "00" & x"b48" => DATA <= x"6000";
when "00" & x"b49" => DATA <= x"0072";
when "00" & x"b4a" => DATA <= x"b4bc";
when "00" & x"b4b" => DATA <= x"0000";
when "00" & x"b4c" => DATA <= x"0003";
when "00" & x"b4d" => DATA <= x"6f00";
when "00" & x"b4e" => DATA <= x"0468";
when "00" & x"b4f" => DATA <= x"5782";
when "00" & x"b50" => DATA <= x"2f0e";
when "00" & x"b51" => DATA <= x"48e7";
when "00" & x"b52" => DATA <= x"7000";
when "00" & x"b53" => DATA <= x"343c";
when "00" & x"b54" => DATA <= x"0001";
when "00" & x"b55" => DATA <= x"e098";
when "00" & x"b56" => DATA <= x"6000";
when "00" & x"b57" => DATA <= x"0056";
when "00" & x"b58" => DATA <= x"b4bc";
when "00" & x"b59" => DATA <= x"0000";
when "00" & x"b5a" => DATA <= x"0005";
when "00" & x"b5b" => DATA <= x"6f00";
when "00" & x"b5c" => DATA <= x"044c";
when "00" & x"b5d" => DATA <= x"5b82";
when "00" & x"b5e" => DATA <= x"2f0e";
when "00" & x"b5f" => DATA <= x"48e7";
when "00" & x"b60" => DATA <= x"7000";
when "00" & x"b61" => DATA <= x"343c";
when "00" & x"b62" => DATA <= x"0003";
when "00" & x"b63" => DATA <= x"e198";
when "00" & x"b64" => DATA <= x"e198";
when "00" & x"b65" => DATA <= x"6000";
when "00" & x"b66" => DATA <= x"0038";
when "00" & x"b67" => DATA <= x"b4bc";
when "00" & x"b68" => DATA <= x"0000";
when "00" & x"b69" => DATA <= x"0007";
when "00" & x"b6a" => DATA <= x"6f00";
when "00" & x"b6b" => DATA <= x"042e";
when "00" & x"b6c" => DATA <= x"5f82";
when "00" & x"b6d" => DATA <= x"2f0e";
when "00" & x"b6e" => DATA <= x"48e7";
when "00" & x"b6f" => DATA <= x"7000";
when "00" & x"b70" => DATA <= x"343c";
when "00" & x"b71" => DATA <= x"0005";
when "00" & x"b72" => DATA <= x"e098";
when "00" & x"b73" => DATA <= x"6000";
when "00" & x"b74" => DATA <= x"001c";
when "00" & x"b75" => DATA <= x"b4bc";
when "00" & x"b76" => DATA <= x"0000";
when "00" & x"b77" => DATA <= x"0009";
when "00" & x"b78" => DATA <= x"6f00";
when "00" & x"b79" => DATA <= x"0412";
when "00" & x"b7a" => DATA <= x"0482";
when "00" & x"b7b" => DATA <= x"0000";
when "00" & x"b7c" => DATA <= x"0009";
when "00" & x"b7d" => DATA <= x"2f0e";
when "00" & x"b7e" => DATA <= x"48e7";
when "00" & x"b7f" => DATA <= x"7000";
when "00" & x"b80" => DATA <= x"343c";
when "00" & x"b81" => DATA <= x"0007";
when "00" & x"b82" => DATA <= x"2c41";
when "00" & x"b83" => DATA <= x"2200";
when "00" & x"b84" => DATA <= x"e999";
when "00" & x"b85" => DATA <= x"1001";
when "00" & x"b86" => DATA <= x"c03c";
when "00" & x"b87" => DATA <= x"000f";
when "00" & x"b88" => DATA <= x"163c";
when "00" & x"b89" => DATA <= x"0009";
when "00" & x"b8a" => DATA <= x"9600";
when "00" & x"b8b" => DATA <= x"0600";
when "00" & x"b8c" => DATA <= x"0030";
when "00" & x"b8d" => DATA <= x"0c00";
when "00" & x"b8e" => DATA <= x"003a";
when "00" & x"b8f" => DATA <= x"6500";
when "00" & x"b90" => DATA <= x"0004";
when "00" & x"b91" => DATA <= x"5e00";
when "00" & x"b92" => DATA <= x"1cc0";
when "00" & x"b93" => DATA <= x"51ca";
when "00" & x"b94" => DATA <= x"ffe0";
when "00" & x"b95" => DATA <= x"1cbc";
when "00" & x"b96" => DATA <= x"0000";
when "00" & x"b97" => DATA <= x"4cdf";
when "00" & x"b98" => DATA <= x"000e";
when "00" & x"b99" => DATA <= x"2001";
when "00" & x"b9a" => DATA <= x"220e";
when "00" & x"b9b" => DATA <= x"2c5f";
when "00" & x"b9c" => DATA <= x"023c";
when "00" & x"b9d" => DATA <= x"00fd";
when "00" & x"b9e" => DATA <= x"4e75";
when "00" & x"b9f" => DATA <= x"003c";
when "00" & x"ba0" => DATA <= x"0002";
when "00" & x"ba1" => DATA <= x"4e75";
when "00" & x"ba2" => DATA <= x"b4bc";
when "00" & x"ba3" => DATA <= x"0000";
when "00" & x"ba4" => DATA <= x"0004";
when "00" & x"ba5" => DATA <= x"6500";
when "00" & x"ba6" => DATA <= x"03b8";
when "00" & x"ba7" => DATA <= x"b0bc";
when "00" & x"ba8" => DATA <= x"0000";
when "00" & x"ba9" => DATA <= x"0100";
when "00" & x"baa" => DATA <= x"6400";
when "00" & x"bab" => DATA <= x"01b2";
when "00" & x"bac" => DATA <= x"7c03";
when "00" & x"bad" => DATA <= x"6000";
when "00" & x"bae" => DATA <= x"0042";
when "00" & x"baf" => DATA <= x"b4bc";
when "00" & x"bb0" => DATA <= x"0000";
when "00" & x"bb1" => DATA <= x"0006";
when "00" & x"bb2" => DATA <= x"6500";
when "00" & x"bb3" => DATA <= x"039e";
when "00" & x"bb4" => DATA <= x"b0bc";
when "00" & x"bb5" => DATA <= x"0001";
when "00" & x"bb6" => DATA <= x"0000";
when "00" & x"bb7" => DATA <= x"6400";
when "00" & x"bb8" => DATA <= x"0198";
when "00" & x"bb9" => DATA <= x"7c05";
when "00" & x"bba" => DATA <= x"6000";
when "00" & x"bbb" => DATA <= x"0028";
when "00" & x"bbc" => DATA <= x"b4bc";
when "00" & x"bbd" => DATA <= x"0000";
when "00" & x"bbe" => DATA <= x"0009";
when "00" & x"bbf" => DATA <= x"6500";
when "00" & x"bc0" => DATA <= x"0384";
when "00" & x"bc1" => DATA <= x"b0bc";
when "00" & x"bc2" => DATA <= x"0100";
when "00" & x"bc3" => DATA <= x"0000";
when "00" & x"bc4" => DATA <= x"6400";
when "00" & x"bc5" => DATA <= x"017e";
when "00" & x"bc6" => DATA <= x"7c08";
when "00" & x"bc7" => DATA <= x"6000";
when "00" & x"bc8" => DATA <= x"000e";
when "00" & x"bc9" => DATA <= x"b4bc";
when "00" & x"bca" => DATA <= x"0000";
when "00" & x"bcb" => DATA <= x"000b";
when "00" & x"bcc" => DATA <= x"6500";
when "00" & x"bcd" => DATA <= x"036a";
when "00" & x"bce" => DATA <= x"7c0a";
when "00" & x"bcf" => DATA <= x"c38d";
when "00" & x"bd0" => DATA <= x"48e7";
when "00" & x"bd1" => DATA <= x"ff00";
when "00" & x"bd2" => DATA <= x"2e00";
when "00" & x"bd3" => DATA <= x"6700";
when "00" & x"bd4" => DATA <= x"0058";
when "00" & x"bd5" => DATA <= x"6000";
when "00" & x"bd6" => DATA <= x"0002";
when "00" & x"bd7" => DATA <= x"4244";
when "00" & x"bd8" => DATA <= x"7401";
when "00" & x"bd9" => DATA <= x"2206";
when "00" & x"bda" => DATA <= x"5381";
when "00" & x"bdb" => DATA <= x"6700";
when "00" & x"bdc" => DATA <= x"001c";
when "00" & x"bdd" => DATA <= x"3602";
when "00" & x"bde" => DATA <= x"c6fc";
when "00" & x"bdf" => DATA <= x"000a";
when "00" & x"be0" => DATA <= x"4842";
when "00" & x"be1" => DATA <= x"c4fc";
when "00" & x"be2" => DATA <= x"000a";
when "00" & x"be3" => DATA <= x"4843";
when "00" & x"be4" => DATA <= x"d443";
when "00" & x"be5" => DATA <= x"4842";
when "00" & x"be6" => DATA <= x"4843";
when "00" & x"be7" => DATA <= x"3403";
when "00" & x"be8" => DATA <= x"5381";
when "00" & x"be9" => DATA <= x"66e6";
when "00" & x"bea" => DATA <= x"4280";
when "00" & x"beb" => DATA <= x"be82";
when "00" & x"bec" => DATA <= x"6500";
when "00" & x"bed" => DATA <= x"0008";
when "00" & x"bee" => DATA <= x"5280";
when "00" & x"bef" => DATA <= x"9e82";
when "00" & x"bf0" => DATA <= x"60f4";
when "00" & x"bf1" => DATA <= x"4a00";
when "00" & x"bf2" => DATA <= x"6600";
when "00" & x"bf3" => DATA <= x"0008";
when "00" & x"bf4" => DATA <= x"4a44";
when "00" & x"bf5" => DATA <= x"6700";
when "00" & x"bf6" => DATA <= x"000a";
when "00" & x"bf7" => DATA <= x"0600";
when "00" & x"bf8" => DATA <= x"0030";
when "00" & x"bf9" => DATA <= x"1ac0";
when "00" & x"bfa" => DATA <= x"1800";
when "00" & x"bfb" => DATA <= x"5386";
when "00" & x"bfc" => DATA <= x"66b6";
when "00" & x"bfd" => DATA <= x"4a44";
when "00" & x"bfe" => DATA <= x"6600";
when "00" & x"bff" => DATA <= x"0006";
when "00" & x"c00" => DATA <= x"1afc";
when "00" & x"c01" => DATA <= x"0030";
when "00" & x"c02" => DATA <= x"1abc";
when "00" & x"c03" => DATA <= x"0000";
when "00" & x"c04" => DATA <= x"4cdf";
when "00" & x"c05" => DATA <= x"00ff";
when "00" & x"c06" => DATA <= x"c38d";
when "00" & x"c07" => DATA <= x"023c";
when "00" & x"c08" => DATA <= x"00fd";
when "00" & x"c09" => DATA <= x"4e75";
when "00" & x"c0a" => DATA <= x"b4bc";
when "00" & x"c0b" => DATA <= x"0000";
when "00" & x"c0c" => DATA <= x"0005";
when "00" & x"c0d" => DATA <= x"6500";
when "00" & x"c0e" => DATA <= x"02e8";
when "00" & x"c0f" => DATA <= x"b0bc";
when "00" & x"c10" => DATA <= x"0000";
when "00" & x"c11" => DATA <= x"0100";
when "00" & x"c12" => DATA <= x"6400";
when "00" & x"c13" => DATA <= x"00e2";
when "00" & x"c14" => DATA <= x"0800";
when "00" & x"c15" => DATA <= x"0007";
when "00" & x"c16" => DATA <= x"6700";
when "00" & x"c17" => DATA <= x"0008";
when "00" & x"c18" => DATA <= x"0080";
when "00" & x"c19" => DATA <= x"ffff";
when "00" & x"c1a" => DATA <= x"ff00";
when "00" & x"c1b" => DATA <= x"7c03";
when "00" & x"c1c" => DATA <= x"6000";
when "00" & x"c1d" => DATA <= x"005e";
when "00" & x"c1e" => DATA <= x"b4bc";
when "00" & x"c1f" => DATA <= x"0000";
when "00" & x"c20" => DATA <= x"0007";
when "00" & x"c21" => DATA <= x"6500";
when "00" & x"c22" => DATA <= x"02c0";
when "00" & x"c23" => DATA <= x"b0bc";
when "00" & x"c24" => DATA <= x"0001";
when "00" & x"c25" => DATA <= x"0000";
when "00" & x"c26" => DATA <= x"6400";
when "00" & x"c27" => DATA <= x"00ba";
when "00" & x"c28" => DATA <= x"0800";
when "00" & x"c29" => DATA <= x"000f";
when "00" & x"c2a" => DATA <= x"6700";
when "00" & x"c2b" => DATA <= x"0008";
when "00" & x"c2c" => DATA <= x"0080";
when "00" & x"c2d" => DATA <= x"ffff";
when "00" & x"c2e" => DATA <= x"0000";
when "00" & x"c2f" => DATA <= x"7c05";
when "00" & x"c30" => DATA <= x"6000";
when "00" & x"c31" => DATA <= x"0036";
when "00" & x"c32" => DATA <= x"b4bc";
when "00" & x"c33" => DATA <= x"0000";
when "00" & x"c34" => DATA <= x"000b";
when "00" & x"c35" => DATA <= x"6500";
when "00" & x"c36" => DATA <= x"0298";
when "00" & x"c37" => DATA <= x"b0bc";
when "00" & x"c38" => DATA <= x"0100";
when "00" & x"c39" => DATA <= x"0000";
when "00" & x"c3a" => DATA <= x"6400";
when "00" & x"c3b" => DATA <= x"0092";
when "00" & x"c3c" => DATA <= x"0800";
when "00" & x"c3d" => DATA <= x"0017";
when "00" & x"c3e" => DATA <= x"6700";
when "00" & x"c3f" => DATA <= x"0008";
when "00" & x"c40" => DATA <= x"0080";
when "00" & x"c41" => DATA <= x"ff00";
when "00" & x"c42" => DATA <= x"0000";
when "00" & x"c43" => DATA <= x"7c08";
when "00" & x"c44" => DATA <= x"6000";
when "00" & x"c45" => DATA <= x"000e";
when "00" & x"c46" => DATA <= x"b4bc";
when "00" & x"c47" => DATA <= x"0000";
when "00" & x"c48" => DATA <= x"000d";
when "00" & x"c49" => DATA <= x"6500";
when "00" & x"c4a" => DATA <= x"0270";
when "00" & x"c4b" => DATA <= x"7c0a";
when "00" & x"c4c" => DATA <= x"c38d";
when "00" & x"c4d" => DATA <= x"48e7";
when "00" & x"c4e" => DATA <= x"ff00";
when "00" & x"c4f" => DATA <= x"2e00";
when "00" & x"c50" => DATA <= x"6a08";
when "00" & x"c51" => DATA <= x"4487";
when "00" & x"c52" => DATA <= x"6b4e";
when "00" & x"c53" => DATA <= x"1afc";
when "00" & x"c54" => DATA <= x"002d";
when "00" & x"c55" => DATA <= x"4244";
when "00" & x"c56" => DATA <= x"7a01";
when "00" & x"c57" => DATA <= x"2206";
when "00" & x"c58" => DATA <= x"5381";
when "00" & x"c59" => DATA <= x"671a";
when "00" & x"c5a" => DATA <= x"3605";
when "00" & x"c5b" => DATA <= x"c6fc";
when "00" & x"c5c" => DATA <= x"000a";
when "00" & x"c5d" => DATA <= x"4845";
when "00" & x"c5e" => DATA <= x"cafc";
when "00" & x"c5f" => DATA <= x"000a";
when "00" & x"c60" => DATA <= x"4843";
when "00" & x"c61" => DATA <= x"da43";
when "00" & x"c62" => DATA <= x"4845";
when "00" & x"c63" => DATA <= x"4843";
when "00" & x"c64" => DATA <= x"3a03";
when "00" & x"c65" => DATA <= x"5381";
when "00" & x"c66" => DATA <= x"66e6";
when "00" & x"c67" => DATA <= x"4280";
when "00" & x"c68" => DATA <= x"be85";
when "00" & x"c69" => DATA <= x"6d06";
when "00" & x"c6a" => DATA <= x"5280";
when "00" & x"c6b" => DATA <= x"9e85";
when "00" & x"c6c" => DATA <= x"60f6";
when "00" & x"c6d" => DATA <= x"4a00";
when "00" & x"c6e" => DATA <= x"6604";
when "00" & x"c6f" => DATA <= x"4a44";
when "00" & x"c70" => DATA <= x"6708";
when "00" & x"c71" => DATA <= x"0600";
when "00" & x"c72" => DATA <= x"0030";
when "00" & x"c73" => DATA <= x"1ac0";
when "00" & x"c74" => DATA <= x"1800";
when "00" & x"c75" => DATA <= x"5386";
when "00" & x"c76" => DATA <= x"66be";
when "00" & x"c77" => DATA <= x"4a44";
when "00" & x"c78" => DATA <= x"6600";
when "00" & x"c79" => DATA <= x"0006";
when "00" & x"c7a" => DATA <= x"1afc";
when "00" & x"c7b" => DATA <= x"0030";
when "00" & x"c7c" => DATA <= x"1abc";
when "00" & x"c7d" => DATA <= x"0000";
when "00" & x"c7e" => DATA <= x"4cdf";
when "00" & x"c7f" => DATA <= x"00ff";
when "00" & x"c80" => DATA <= x"c38d";
when "00" & x"c81" => DATA <= x"023c";
when "00" & x"c82" => DATA <= x"00fd";
when "00" & x"c83" => DATA <= x"4e75";
when "00" & x"c84" => DATA <= x"003c";
when "00" & x"c85" => DATA <= x"0002";
when "00" & x"c86" => DATA <= x"4e75";
when "00" & x"c87" => DATA <= x"b4bc";
when "00" & x"c88" => DATA <= x"0000";
when "00" & x"c89" => DATA <= x"0009";
when "00" & x"c8a" => DATA <= x"6f00";
when "00" & x"c8b" => DATA <= x"01ee";
when "00" & x"c8c" => DATA <= x"0482";
when "00" & x"c8d" => DATA <= x"0000";
when "00" & x"c8e" => DATA <= x"0009";
when "00" & x"c8f" => DATA <= x"2f0e";
when "00" & x"c90" => DATA <= x"48e7";
when "00" & x"c91" => DATA <= x"7000";
when "00" & x"c92" => DATA <= x"7407";
when "00" & x"c93" => DATA <= x"e098";
when "00" & x"c94" => DATA <= x"6000";
when "00" & x"c95" => DATA <= x"0058";
when "00" & x"c96" => DATA <= x"b4bc";
when "00" & x"c97" => DATA <= x"0000";
when "00" & x"c98" => DATA <= x"0011";
when "00" & x"c99" => DATA <= x"6f00";
when "00" & x"c9a" => DATA <= x"01d0";
when "00" & x"c9b" => DATA <= x"0482";
when "00" & x"c9c" => DATA <= x"0000";
when "00" & x"c9d" => DATA <= x"0011";
when "00" & x"c9e" => DATA <= x"2f0e";
when "00" & x"c9f" => DATA <= x"48e7";
when "00" & x"ca0" => DATA <= x"7000";
when "00" & x"ca1" => DATA <= x"740f";
when "00" & x"ca2" => DATA <= x"e198";
when "00" & x"ca3" => DATA <= x"e198";
when "00" & x"ca4" => DATA <= x"6000";
when "00" & x"ca5" => DATA <= x"0038";
when "00" & x"ca6" => DATA <= x"b4bc";
when "00" & x"ca7" => DATA <= x"0000";
when "00" & x"ca8" => DATA <= x"0019";
when "00" & x"ca9" => DATA <= x"6f00";
when "00" & x"caa" => DATA <= x"01b0";
when "00" & x"cab" => DATA <= x"0482";
when "00" & x"cac" => DATA <= x"0000";
when "00" & x"cad" => DATA <= x"0019";
when "00" & x"cae" => DATA <= x"2f0e";
when "00" & x"caf" => DATA <= x"48e7";
when "00" & x"cb0" => DATA <= x"7000";
when "00" & x"cb1" => DATA <= x"7417";
when "00" & x"cb2" => DATA <= x"e098";
when "00" & x"cb3" => DATA <= x"6000";
when "00" & x"cb4" => DATA <= x"001a";
when "00" & x"cb5" => DATA <= x"b4bc";
when "00" & x"cb6" => DATA <= x"0000";
when "00" & x"cb7" => DATA <= x"0021";
when "00" & x"cb8" => DATA <= x"6f00";
when "00" & x"cb9" => DATA <= x"0192";
when "00" & x"cba" => DATA <= x"0482";
when "00" & x"cbb" => DATA <= x"0000";
when "00" & x"cbc" => DATA <= x"0021";
when "00" & x"cbd" => DATA <= x"2f0e";
when "00" & x"cbe" => DATA <= x"48e7";
when "00" & x"cbf" => DATA <= x"7000";
when "00" & x"cc0" => DATA <= x"741f";
when "00" & x"cc1" => DATA <= x"2c41";
when "00" & x"cc2" => DATA <= x"7600";
when "00" & x"cc3" => DATA <= x"7230";
when "00" & x"cc4" => DATA <= x"e380";
when "00" & x"cc5" => DATA <= x"c303";
when "00" & x"cc6" => DATA <= x"1cc1";
when "00" & x"cc7" => DATA <= x"51ca";
when "00" & x"cc8" => DATA <= x"fff6";
when "00" & x"cc9" => DATA <= x"1cbc";
when "00" & x"cca" => DATA <= x"0000";
when "00" & x"ccb" => DATA <= x"4cdf";
when "00" & x"ccc" => DATA <= x"000e";
when "00" & x"ccd" => DATA <= x"2001";
when "00" & x"cce" => DATA <= x"220e";
when "00" & x"ccf" => DATA <= x"2c5f";
when "00" & x"cd0" => DATA <= x"023c";
when "00" & x"cd1" => DATA <= x"00fd";
when "00" & x"cd2" => DATA <= x"4e75";
when "00" & x"cd3" => DATA <= x"6100";
when "00" & x"cd4" => DATA <= x"fe6c";
when "00" & x"cd5" => DATA <= x"2f07";
when "00" & x"cd6" => DATA <= x"7e05";
when "00" & x"cd7" => DATA <= x"6100";
when "00" & x"cd8" => DATA <= x"0122";
when "00" & x"cd9" => DATA <= x"2e1f";
when "00" & x"cda" => DATA <= x"4e75";
when "00" & x"cdb" => DATA <= x"6100";
when "00" & x"cdc" => DATA <= x"fe84";
when "00" & x"cdd" => DATA <= x"2f07";
when "00" & x"cde" => DATA <= x"7e07";
when "00" & x"cdf" => DATA <= x"6100";
when "00" & x"ce0" => DATA <= x"0112";
when "00" & x"ce1" => DATA <= x"2e1f";
when "00" & x"ce2" => DATA <= x"4e75";
when "00" & x"ce3" => DATA <= x"6100";
when "00" & x"ce4" => DATA <= x"fe9c";
when "00" & x"ce5" => DATA <= x"2f07";
when "00" & x"ce6" => DATA <= x"7e09";
when "00" & x"ce7" => DATA <= x"6100";
when "00" & x"ce8" => DATA <= x"0102";
when "00" & x"ce9" => DATA <= x"2e1f";
when "00" & x"cea" => DATA <= x"4e75";
when "00" & x"ceb" => DATA <= x"6100";
when "00" & x"cec" => DATA <= x"feb4";
when "00" & x"ced" => DATA <= x"2f07";
when "00" & x"cee" => DATA <= x"7e0c";
when "00" & x"cef" => DATA <= x"6100";
when "00" & x"cf0" => DATA <= x"00f2";
when "00" & x"cf1" => DATA <= x"2e1f";
when "00" & x"cf2" => DATA <= x"4e75";
when "00" & x"cf3" => DATA <= x"2f01";
when "00" & x"cf4" => DATA <= x"2f06";
when "00" & x"cf5" => DATA <= x"2f07";
when "00" & x"cf6" => DATA <= x"2f0e";
when "00" & x"cf7" => DATA <= x"2c40";
when "00" & x"cf8" => DATA <= x"2c1e";
when "00" & x"cf9" => DATA <= x"2e1e";
when "00" & x"cfa" => DATA <= x"0c87";
when "00" & x"cfb" => DATA <= x"0000";
when "00" & x"cfc" => DATA <= x"0100";
when "00" & x"cfd" => DATA <= x"6400";
when "00" & x"cfe" => DATA <= x"003a";
when "00" & x"cff" => DATA <= x"0c86";
when "00" & x"d00" => DATA <= x"0000";
when "00" & x"d01" => DATA <= x"0100";
when "00" & x"d02" => DATA <= x"6400";
when "00" & x"d03" => DATA <= x"003e";
when "00" & x"d04" => DATA <= x"4a47";
when "00" & x"d05" => DATA <= x"6700";
when "00" & x"d06" => DATA <= x"0016";
when "00" & x"d07" => DATA <= x"1007";
when "00" & x"d08" => DATA <= x"6100";
when "00" & x"d09" => DATA <= x"fd32";
when "00" & x"d0a" => DATA <= x"4a41";
when "00" & x"d0b" => DATA <= x"6700";
when "00" & x"d0c" => DATA <= x"00ec";
when "00" & x"d0d" => DATA <= x"2c41";
when "00" & x"d0e" => DATA <= x"1cfc";
when "00" & x"d0f" => DATA <= x"002e";
when "00" & x"d10" => DATA <= x"220e";
when "00" & x"d11" => DATA <= x"1006";
when "00" & x"d12" => DATA <= x"6100";
when "00" & x"d13" => DATA <= x"fd1e";
when "00" & x"d14" => DATA <= x"2c5f";
when "00" & x"d15" => DATA <= x"2e1f";
when "00" & x"d16" => DATA <= x"2c1f";
when "00" & x"d17" => DATA <= x"201f";
when "00" & x"d18" => DATA <= x"023c";
when "00" & x"d19" => DATA <= x"00fd";
when "00" & x"d1a" => DATA <= x"4e75";
when "00" & x"d1b" => DATA <= x"2f7c";
when "00" & x"d1c" => DATA <= x"003f";
when "00" & x"d1d" => DATA <= x"2ee0";
when "00" & x"d1e" => DATA <= x"000c";
when "00" & x"d1f" => DATA <= x"003c";
when "00" & x"d20" => DATA <= x"0002";
when "00" & x"d21" => DATA <= x"60e4";
when "00" & x"d22" => DATA <= x"2f7c";
when "00" & x"d23" => DATA <= x"003f";
when "00" & x"d24" => DATA <= x"2ec8";
when "00" & x"d25" => DATA <= x"000c";
when "00" & x"d26" => DATA <= x"003c";
when "00" & x"d27" => DATA <= x"0002";
when "00" & x"d28" => DATA <= x"60d6";
when "00" & x"d29" => DATA <= x"2f07";
when "00" & x"d2a" => DATA <= x"2f01";
when "00" & x"d2b" => DATA <= x"2200";
when "00" & x"d2c" => DATA <= x"0281";
when "00" & x"d2d" => DATA <= x"c000";
when "00" & x"d2e" => DATA <= x"0000";
when "00" & x"d2f" => DATA <= x"6700";
when "00" & x"d30" => DATA <= x"0014";
when "00" & x"d31" => DATA <= x"e089";
when "00" & x"d32" => DATA <= x"e089";
when "00" & x"d33" => DATA <= x"e089";
when "00" & x"d34" => DATA <= x"ec89";
when "00" & x"d35" => DATA <= x"2001";
when "00" & x"d36" => DATA <= x"1e38";
when "00" & x"d37" => DATA <= x"004d";
when "00" & x"d38" => DATA <= x"6000";
when "00" & x"d39" => DATA <= x"0034";
when "00" & x"d3a" => DATA <= x"2200";
when "00" & x"d3b" => DATA <= x"0281";
when "00" & x"d3c" => DATA <= x"fff0";
when "00" & x"d3d" => DATA <= x"0000";
when "00" & x"d3e" => DATA <= x"6700";
when "00" & x"d3f" => DATA <= x"0012";
when "00" & x"d40" => DATA <= x"e089";
when "00" & x"d41" => DATA <= x"e089";
when "00" & x"d42" => DATA <= x"e889";
when "00" & x"d43" => DATA <= x"2001";
when "00" & x"d44" => DATA <= x"1e38";
when "00" & x"d45" => DATA <= x"004b";
when "00" & x"d46" => DATA <= x"6000";
when "00" & x"d47" => DATA <= x"0018";
when "00" & x"d48" => DATA <= x"2200";
when "00" & x"d49" => DATA <= x"0281";
when "00" & x"d4a" => DATA <= x"ffff";
when "00" & x"d4b" => DATA <= x"fc00";
when "00" & x"d4c" => DATA <= x"6700";
when "00" & x"d4d" => DATA <= x"000c";
when "00" & x"d4e" => DATA <= x"e089";
when "00" & x"d4f" => DATA <= x"e489";
when "00" & x"d50" => DATA <= x"2001";
when "00" & x"d51" => DATA <= x"1e3c";
when "00" & x"d52" => DATA <= x"0000";
when "00" & x"d53" => DATA <= x"221f";
when "00" & x"d54" => DATA <= x"6100";
when "00" & x"d55" => DATA <= x"fce8";
when "00" & x"d56" => DATA <= x"2c41";
when "00" & x"d57" => DATA <= x"1cfc";
when "00" & x"d58" => DATA <= x"0020";
when "00" & x"d59" => DATA <= x"1cc7";
when "00" & x"d5a" => DATA <= x"1cfc";
when "00" & x"d5b" => DATA <= x"0062";
when "00" & x"d5c" => DATA <= x"1cfc";
when "00" & x"d5d" => DATA <= x"0079";
when "00" & x"d5e" => DATA <= x"1cfc";
when "00" & x"d5f" => DATA <= x"0074";
when "00" & x"d60" => DATA <= x"1cfc";
when "00" & x"d61" => DATA <= x"0065";
when "00" & x"d62" => DATA <= x"1cfc";
when "00" & x"d63" => DATA <= x"0073";
when "00" & x"d64" => DATA <= x"1cfc";
when "00" & x"d65" => DATA <= x"0000";
when "00" & x"d66" => DATA <= x"023c";
when "00" & x"d67" => DATA <= x"00fd";
when "00" & x"d68" => DATA <= x"4e75";
when "00" & x"d69" => DATA <= x"2f0e";
when "00" & x"d6a" => DATA <= x"2f00";
when "00" & x"d6b" => DATA <= x"2f01";
when "00" & x"d6c" => DATA <= x"2c40";
when "00" & x"d6d" => DATA <= x"9280";
when "00" & x"d6e" => DATA <= x"1dbc";
when "00" & x"d6f" => DATA <= x"0000";
when "00" & x"d70" => DATA <= x"7000";
when "00" & x"d71" => DATA <= x"5387";
when "00" & x"d72" => DATA <= x"1db6";
when "00" & x"d73" => DATA <= x"1000";
when "00" & x"d74" => DATA <= x"7000";
when "00" & x"d75" => DATA <= x"5387";
when "00" & x"d76" => DATA <= x"51c9";
when "00" & x"d77" => DATA <= x"fff6";
when "00" & x"d78" => DATA <= x"9487";
when "00" & x"d79" => DATA <= x"1dbc";
when "00" & x"d7a" => DATA <= x"0020";
when "00" & x"d7b" => DATA <= x"7000";
when "00" & x"d7c" => DATA <= x"51cf";
when "00" & x"d7d" => DATA <= x"fff8";
when "00" & x"d7e" => DATA <= x"201f";
when "00" & x"d7f" => DATA <= x"221f";
when "00" & x"d80" => DATA <= x"2c5f";
when "00" & x"d81" => DATA <= x"4e75";
when "00" & x"d82" => DATA <= x"203c";
when "00" & x"d83" => DATA <= x"003f";
when "00" & x"d84" => DATA <= x"2e84";
when "00" & x"d85" => DATA <= x"003c";
when "00" & x"d86" => DATA <= x"0002";
when "00" & x"d87" => DATA <= x"4e75";
when "00" & x"d88" => DATA <= x"2f03";
when "00" & x"d89" => DATA <= x"2f00";
when "00" & x"d8a" => DATA <= x"0280";
when "00" & x"d8b" => DATA <= x"0000";
when "00" & x"d8c" => DATA <= x"0001";
when "00" & x"d8d" => DATA <= x"6600";
when "00" & x"d8e" => DATA <= x"002c";
when "00" & x"d8f" => DATA <= x"201f";
when "00" & x"d90" => DATA <= x"c188";
when "00" & x"d91" => DATA <= x"c389";
when "00" & x"d92" => DATA <= x"2c7c";
when "00" & x"d93" => DATA <= x"003f";
when "00" & x"d94" => DATA <= x"39e4";
when "00" & x"d95" => DATA <= x"3610";
when "00" & x"d96" => DATA <= x"c66e";
when "00" & x"d97" => DATA <= x"0002";
when "00" & x"d98" => DATA <= x"b656";
when "00" & x"d99" => DATA <= x"6700";
when "00" & x"d9a" => DATA <= x"000a";
when "00" & x"d9b" => DATA <= x"ddfc";
when "00" & x"d9c" => DATA <= x"0000";
when "00" & x"d9d" => DATA <= x"000e";
when "00" & x"d9e" => DATA <= x"60ec";
when "00" & x"d9f" => DATA <= x"588e";
when "00" & x"da0" => DATA <= x"12de";
when "00" & x"da1" => DATA <= x"66fc";
when "00" & x"da2" => DATA <= x"261f";
when "00" & x"da3" => DATA <= x"4e75";
when "00" & x"da4" => DATA <= x"261f";
when "00" & x"da5" => DATA <= x"203c";
when "00" & x"da6" => DATA <= x"003f";
when "00" & x"da7" => DATA <= x"2f10";
when "00" & x"da8" => DATA <= x"003c";
when "00" & x"da9" => DATA <= x"0002";
when "00" & x"daa" => DATA <= x"4e75";
when "00" & x"dab" => DATA <= x"0c16";
when "00" & x"dac" => DATA <= x"000d";
when "00" & x"dad" => DATA <= x"6700";
when "00" & x"dae" => DATA <= x"004c";
when "00" & x"daf" => DATA <= x"2f0e";
when "00" & x"db0" => DATA <= x"7010";
when "00" & x"db1" => DATA <= x"220e";
when "00" & x"db2" => DATA <= x"6100";
when "00" & x"db3" => DATA <= x"f46a";
when "00" & x"db4" => DATA <= x"6800";
when "00" & x"db5" => DATA <= x"0010";
when "00" & x"db6" => DATA <= x"21fc";
when "00" & x"db7" => DATA <= x"0000";
when "00" & x"db8" => DATA <= x"0000";
when "00" & x"db9" => DATA <= x"0700";
when "00" & x"dba" => DATA <= x"2c5f";
when "00" & x"dbb" => DATA <= x"6000";
when "00" & x"dbc" => DATA <= x"000a";
when "00" & x"dbd" => DATA <= x"2c41";
when "00" & x"dbe" => DATA <= x"21c2";
when "00" & x"dbf" => DATA <= x"0700";
when "00" & x"dc0" => DATA <= x"241f";
when "00" & x"dc1" => DATA <= x"6100";
when "00" & x"dc2" => DATA <= x"0ba0";
when "00" & x"dc3" => DATA <= x"6500";
when "00" & x"dc4" => DATA <= x"0020";
when "00" & x"dc5" => DATA <= x"2a7c";
when "00" & x"dc6" => DATA <= x"0000";
when "00" & x"dc7" => DATA <= x"0704";
when "00" & x"dc8" => DATA <= x"1a9e";
when "00" & x"dc9" => DATA <= x"0c1d";
when "00" & x"dca" => DATA <= x"000d";
when "00" & x"dcb" => DATA <= x"66f8";
when "00" & x"dcc" => DATA <= x"1b3c";
when "00" & x"dcd" => DATA <= x"0000";
when "00" & x"dce" => DATA <= x"203c";
when "00" & x"dcf" => DATA <= x"0000";
when "00" & x"dd0" => DATA <= x"0700";
when "00" & x"dd1" => DATA <= x"6100";
when "00" & x"dd2" => DATA <= x"f580";
when "00" & x"dd3" => DATA <= x"4e75";
when "00" & x"dd4" => DATA <= x"203c";
when "00" & x"dd5" => DATA <= x"003f";
when "00" & x"dd6" => DATA <= x"28fc";
when "00" & x"dd7" => DATA <= x"6100";
when "00" & x"dd8" => DATA <= x"ee52";
when "00" & x"dd9" => DATA <= x"4e75";
when "00" & x"dda" => DATA <= x"2f0e";
when "00" & x"ddb" => DATA <= x"6100";
when "00" & x"ddc" => DATA <= x"0b6c";
when "00" & x"ddd" => DATA <= x"0c16";
when "00" & x"dde" => DATA <= x"000d";
when "00" & x"ddf" => DATA <= x"6700";
when "00" & x"de0" => DATA <= x"0010";
when "00" & x"de1" => DATA <= x"0c16";
when "00" & x"de2" => DATA <= x"000d";
when "00" & x"de3" => DATA <= x"6700";
when "00" & x"de4" => DATA <= x"0016";
when "00" & x"de5" => DATA <= x"0c1e";
when "00" & x"de6" => DATA <= x"0020";
when "00" & x"de7" => DATA <= x"66f2";
when "00" & x"de8" => DATA <= x"203c";
when "00" & x"de9" => DATA <= x"003f";
when "00" & x"dea" => DATA <= x"2c02";
when "00" & x"deb" => DATA <= x"6100";
when "00" & x"dec" => DATA <= x"ee2a";
when "00" & x"ded" => DATA <= x"2c5f";
when "00" & x"dee" => DATA <= x"4e75";
when "00" & x"def" => DATA <= x"2c5f";
when "00" & x"df0" => DATA <= x"220e";
when "00" & x"df1" => DATA <= x"7005";
when "00" & x"df2" => DATA <= x"6100";
when "00" & x"df3" => DATA <= x"f0e8";
when "00" & x"df4" => DATA <= x"b8bc";
when "00" & x"df5" => DATA <= x"0000";
when "00" & x"df6" => DATA <= x"8000";
when "00" & x"df7" => DATA <= x"6600";
when "00" & x"df8" => DATA <= x"0078";
when "00" & x"df9" => DATA <= x"2a78";
when "00" & x"dfa" => DATA <= x"0504";
when "00" & x"dfb" => DATA <= x"dbfc";
when "00" & x"dfc" => DATA <= x"0000";
when "00" & x"dfd" => DATA <= x"8000";
when "00" & x"dfe" => DATA <= x"dbfc";
when "00" & x"dff" => DATA <= x"0000";
when "00" & x"e00" => DATA <= x"0100";
when "00" & x"e01" => DATA <= x"bbf8";
when "00" & x"e02" => DATA <= x"0508";
when "00" & x"e03" => DATA <= x"6300";
when "00" & x"e04" => DATA <= x"006c";
when "00" & x"e05" => DATA <= x"220e";
when "00" & x"e06" => DATA <= x"243c";
when "00" & x"e07" => DATA <= x"0000";
when "00" & x"e08" => DATA <= x"0400";
when "00" & x"e09" => DATA <= x"7600";
when "00" & x"e0a" => DATA <= x"203c";
when "00" & x"e0b" => DATA <= x"0000";
when "00" & x"e0c" => DATA <= x"00ff";
when "00" & x"e0d" => DATA <= x"6100";
when "00" & x"e0e" => DATA <= x"f0b2";
when "00" & x"e0f" => DATA <= x"203c";
when "00" & x"e10" => DATA <= x"003f";
when "00" & x"e11" => DATA <= x"2b61";
when "00" & x"e12" => DATA <= x"6100";
when "00" & x"e13" => DATA <= x"eddc";
when "00" & x"e14" => DATA <= x"7015";
when "00" & x"e15" => DATA <= x"7200";
when "00" & x"e16" => DATA <= x"6100";
when "00" & x"e17" => DATA <= x"eea8";
when "00" & x"e18" => DATA <= x"6100";
when "00" & x"e19" => DATA <= x"f86c";
when "00" & x"e1a" => DATA <= x"6100";
when "00" & x"e1b" => DATA <= x"edb4";
when "00" & x"e1c" => DATA <= x"66a0";
when "00" & x"e1d" => DATA <= x"223c";
when "00" & x"e1e" => DATA <= x"0000";
when "00" & x"e1f" => DATA <= x"0600";
when "00" & x"e20" => DATA <= x"74ff";
when "00" & x"e21" => DATA <= x"203c";
when "00" & x"e22" => DATA <= x"003f";
when "00" & x"e23" => DATA <= x"2bce";
when "00" & x"e24" => DATA <= x"6100";
when "00" & x"e25" => DATA <= x"edb8";
when "00" & x"e26" => DATA <= x"1007";
when "00" & x"e27" => DATA <= x"0600";
when "00" & x"e28" => DATA <= x"0030";
when "00" & x"e29" => DATA <= x"6100";
when "00" & x"e2a" => DATA <= x"ed96";
when "00" & x"e2b" => DATA <= x"6100";
when "00" & x"e2c" => DATA <= x"edbe";
when "00" & x"e2d" => DATA <= x"203c";
when "00" & x"e2e" => DATA <= x"003f";
when "00" & x"e2f" => DATA <= x"2be3";
when "00" & x"e30" => DATA <= x"6100";
when "00" & x"e31" => DATA <= x"eda0";
when "00" & x"e32" => DATA <= x"6000";
when "00" & x"e33" => DATA <= x"ff74";
when "00" & x"e34" => DATA <= x"203c";
when "00" & x"e35" => DATA <= x"003f";
when "00" & x"e36" => DATA <= x"2b3b";
when "00" & x"e37" => DATA <= x"6100";
when "00" & x"e38" => DATA <= x"ed92";
when "00" & x"e39" => DATA <= x"4e75";
when "00" & x"e3a" => DATA <= x"203c";
when "00" & x"e3b" => DATA <= x"003f";
when "00" & x"e3c" => DATA <= x"2b57";
when "00" & x"e3d" => DATA <= x"6100";
when "00" & x"e3e" => DATA <= x"ed86";
when "00" & x"e3f" => DATA <= x"4e75";
when "00" & x"e40" => DATA <= x"203c";
when "00" & x"e41" => DATA <= x"003f";
when "00" & x"e42" => DATA <= x"291f";
when "00" & x"e43" => DATA <= x"6100";
when "00" & x"e44" => DATA <= x"ed7a";
when "00" & x"e45" => DATA <= x"4e75";
when "00" & x"e46" => DATA <= x"7010";
when "00" & x"e47" => DATA <= x"220e";
when "00" & x"e48" => DATA <= x"6100";
when "00" & x"e49" => DATA <= x"f33e";
when "00" & x"e4a" => DATA <= x"6900";
when "00" & x"e4b" => DATA <= x"0018";
when "00" & x"e4c" => DATA <= x"6100";
when "00" & x"e4d" => DATA <= x"0a98";
when "00" & x"e4e" => DATA <= x"6600";
when "00" & x"e4f" => DATA <= x"0010";
when "00" & x"e50" => DATA <= x"21c2";
when "00" & x"e51" => DATA <= x"0520";
when "00" & x"e52" => DATA <= x"6100";
when "00" & x"e53" => DATA <= x"eee2";
when "00" & x"e54" => DATA <= x"023c";
when "00" & x"e55" => DATA <= x"00fe";
when "00" & x"e56" => DATA <= x"4e75";
when "00" & x"e57" => DATA <= x"203c";
when "00" & x"e58" => DATA <= x"003f";
when "00" & x"e59" => DATA <= x"2935";
when "00" & x"e5a" => DATA <= x"6100";
when "00" & x"e5b" => DATA <= x"ed4c";
when "00" & x"e5c" => DATA <= x"4e75";
when "00" & x"e5d" => DATA <= x"2f0e";
when "00" & x"e5e" => DATA <= x"0c16";
when "00" & x"e5f" => DATA <= x"000d";
when "00" & x"e60" => DATA <= x"6600";
when "00" & x"e61" => DATA <= x"001a";
when "00" & x"e62" => DATA <= x"203c";
when "00" & x"e63" => DATA <= x"003f";
when "00" & x"e64" => DATA <= x"283c";
when "00" & x"e65" => DATA <= x"6100";
when "00" & x"e66" => DATA <= x"ed36";
when "00" & x"e67" => DATA <= x"203c";
when "00" & x"e68" => DATA <= x"003f";
when "00" & x"e69" => DATA <= x"285d";
when "00" & x"e6a" => DATA <= x"6100";
when "00" & x"e6b" => DATA <= x"ed2c";
when "00" & x"e6c" => DATA <= x"6000";
when "00" & x"e6d" => DATA <= x"00ca";
when "00" & x"e6e" => DATA <= x"0216";
when "00" & x"e6f" => DATA <= x"00df";
when "00" & x"e70" => DATA <= x"0c1e";
when "00" & x"e71" => DATA <= x"0054";
when "00" & x"e72" => DATA <= x"6600";
when "00" & x"e73" => DATA <= x"0042";
when "00" & x"e74" => DATA <= x"0216";
when "00" & x"e75" => DATA <= x"00df";
when "00" & x"e76" => DATA <= x"0c1e";
when "00" & x"e77" => DATA <= x"0055";
when "00" & x"e78" => DATA <= x"6600";
when "00" & x"e79" => DATA <= x"00b2";
when "00" & x"e7a" => DATA <= x"0216";
when "00" & x"e7b" => DATA <= x"00df";
when "00" & x"e7c" => DATA <= x"0c1e";
when "00" & x"e7d" => DATA <= x"0042";
when "00" & x"e7e" => DATA <= x"6600";
when "00" & x"e7f" => DATA <= x"00a6";
when "00" & x"e80" => DATA <= x"0216";
when "00" & x"e81" => DATA <= x"00df";
when "00" & x"e82" => DATA <= x"0c1e";
when "00" & x"e83" => DATA <= x"0045";
when "00" & x"e84" => DATA <= x"6600";
when "00" & x"e85" => DATA <= x"009a";
when "00" & x"e86" => DATA <= x"0c16";
when "00" & x"e87" => DATA <= x"000d";
when "00" & x"e88" => DATA <= x"6600";
when "00" & x"e89" => DATA <= x"0092";
when "00" & x"e8a" => DATA <= x"203c";
when "00" & x"e8b" => DATA <= x"003f";
when "00" & x"e8c" => DATA <= x"283c";
when "00" & x"e8d" => DATA <= x"6100";
when "00" & x"e8e" => DATA <= x"ece6";
when "00" & x"e8f" => DATA <= x"203c";
when "00" & x"e90" => DATA <= x"003f";
when "00" & x"e91" => DATA <= x"286f";
when "00" & x"e92" => DATA <= x"6100";
when "00" & x"e93" => DATA <= x"ecdc";
when "00" & x"e94" => DATA <= x"0226";
when "00" & x"e95" => DATA <= x"00df";
when "00" & x"e96" => DATA <= x"0c1e";
when "00" & x"e97" => DATA <= x"0053";
when "00" & x"e98" => DATA <= x"6600";
when "00" & x"e99" => DATA <= x"0072";
when "00" & x"e9a" => DATA <= x"0216";
when "00" & x"e9b" => DATA <= x"00df";
when "00" & x"e9c" => DATA <= x"0c1e";
when "00" & x"e9d" => DATA <= x"0057";
when "00" & x"e9e" => DATA <= x"6600";
when "00" & x"e9f" => DATA <= x"0066";
when "00" & x"ea0" => DATA <= x"0216";
when "00" & x"ea1" => DATA <= x"00df";
when "00" & x"ea2" => DATA <= x"0c1e";
when "00" & x"ea3" => DATA <= x"0049";
when "00" & x"ea4" => DATA <= x"6600";
when "00" & x"ea5" => DATA <= x"005a";
when "00" & x"ea6" => DATA <= x"0c16";
when "00" & x"ea7" => DATA <= x"000d";
when "00" & x"ea8" => DATA <= x"6600";
when "00" & x"ea9" => DATA <= x"0052";
when "00" & x"eaa" => DATA <= x"203c";
when "00" & x"eab" => DATA <= x"003f";
when "00" & x"eac" => DATA <= x"283c";
when "00" & x"ead" => DATA <= x"6100";
when "00" & x"eae" => DATA <= x"eca6";
when "00" & x"eaf" => DATA <= x"4df9";
when "00" & x"eb0" => DATA <= x"003f";
when "00" & x"eb1" => DATA <= x"2f54";
when "00" & x"eb2" => DATA <= x"103c";
when "00" & x"eb3" => DATA <= x"0020";
when "00" & x"eb4" => DATA <= x"6100";
when "00" & x"eb5" => DATA <= x"ec80";
when "00" & x"eb6" => DATA <= x"6100";
when "00" & x"eb7" => DATA <= x"ec7c";
when "00" & x"eb8" => DATA <= x"6100";
when "00" & x"eb9" => DATA <= x"ec78";
when "00" & x"eba" => DATA <= x"201e";
when "00" & x"ebb" => DATA <= x"201e";
when "00" & x"ebc" => DATA <= x"0c80";
when "00" & x"ebd" => DATA <= x"ffff";
when "00" & x"ebe" => DATA <= x"ffff";
when "00" & x"ebf" => DATA <= x"6700";
when "00" & x"ec0" => DATA <= x"0024";
when "00" & x"ec1" => DATA <= x"200e";
when "00" & x"ec2" => DATA <= x"6100";
when "00" & x"ec3" => DATA <= x"ec7c";
when "00" & x"ec4" => DATA <= x"2c40";
when "00" & x"ec5" => DATA <= x"0c26";
when "00" & x"ec6" => DATA <= x"0000";
when "00" & x"ec7" => DATA <= x"6100";
when "00" & x"ec8" => DATA <= x"ec86";
when "00" & x"ec9" => DATA <= x"0c1e";
when "00" & x"eca" => DATA <= x"00ff";
when "00" & x"ecb" => DATA <= x"6700";
when "00" & x"ecc" => DATA <= x"000c";
when "00" & x"ecd" => DATA <= x"200e";
when "00" & x"ece" => DATA <= x"0200";
when "00" & x"ecf" => DATA <= x"0003";
when "00" & x"ed0" => DATA <= x"66f0";
when "00" & x"ed1" => DATA <= x"60c0";
when "00" & x"ed2" => DATA <= x"2f01";
when "00" & x"ed3" => DATA <= x"7209";
when "00" & x"ed4" => DATA <= x"6100";
when "00" & x"ed5" => DATA <= x"f3aa";
when "00" & x"ed6" => DATA <= x"221f";
when "00" & x"ed7" => DATA <= x"2c5f";
when "00" & x"ed8" => DATA <= x"003c";
when "00" & x"ed9" => DATA <= x"0001";
when "00" & x"eda" => DATA <= x"4e75";
when "00" & x"edb" => DATA <= x"0c16";
when "00" & x"edc" => DATA <= x"000d";
when "00" & x"edd" => DATA <= x"6600";
when "00" & x"ede" => DATA <= x"06b8";
when "00" & x"edf" => DATA <= x"203c";
when "00" & x"ee0" => DATA <= x"003f";
when "00" & x"ee1" => DATA <= x"29a3";
when "00" & x"ee2" => DATA <= x"6100";
when "00" & x"ee3" => DATA <= x"ec3c";
when "00" & x"ee4" => DATA <= x"6100";
when "00" & x"ee5" => DATA <= x"ec4c";
when "00" & x"ee6" => DATA <= x"103c";
when "00" & x"ee7" => DATA <= x"003a";
when "00" & x"ee8" => DATA <= x"6100";
when "00" & x"ee9" => DATA <= x"ec18";
when "00" & x"eea" => DATA <= x"203c";
when "00" & x"eeb" => DATA <= x"0000";
when "00" & x"eec" => DATA <= x"0600";
when "00" & x"eed" => DATA <= x"223c";
when "00" & x"eee" => DATA <= x"0000";
when "00" & x"eef" => DATA <= x"00ff";
when "00" & x"ef0" => DATA <= x"143c";
when "00" & x"ef1" => DATA <= x"0020";
when "00" & x"ef2" => DATA <= x"163c";
when "00" & x"ef3" => DATA <= x"00ff";
when "00" & x"ef4" => DATA <= x"207c";
when "00" & x"ef5" => DATA <= x"0000";
when "00" & x"ef6" => DATA <= x"007d";
when "00" & x"ef7" => DATA <= x"4e4c";
when "00" & x"ef8" => DATA <= x"6500";
when "00" & x"ef9" => DATA <= x"00b8";
when "00" & x"efa" => DATA <= x"2c7c";
when "00" & x"efb" => DATA <= x"0000";
when "00" & x"efc" => DATA <= x"0600";
when "00" & x"efd" => DATA <= x"101e";
when "00" & x"efe" => DATA <= x"b03c";
when "00" & x"eff" => DATA <= x"003f";
when "00" & x"f00" => DATA <= x"6700";
when "00" & x"f01" => DATA <= x"02c6";
when "00" & x"f02" => DATA <= x"b03c";
when "00" & x"f03" => DATA <= x"002a";
when "00" & x"f04" => DATA <= x"6700";
when "00" & x"f05" => DATA <= x"03b0";
when "00" & x"f06" => DATA <= x"0200";
when "00" & x"f07" => DATA <= x"00df";
when "00" & x"f08" => DATA <= x"b03c";
when "00" & x"f09" => DATA <= x"0042";
when "00" & x"f0a" => DATA <= x"6700";
when "00" & x"f0b" => DATA <= x"009e";
when "00" & x"f0c" => DATA <= x"b03c";
when "00" & x"f0d" => DATA <= x"0044";
when "00" & x"f0e" => DATA <= x"6700";
when "00" & x"f0f" => DATA <= x"0060";
when "00" & x"f10" => DATA <= x"b03c";
when "00" & x"f11" => DATA <= x"0045";
when "00" & x"f12" => DATA <= x"6700";
when "00" & x"f13" => DATA <= x"00f2";
when "00" & x"f14" => DATA <= x"b03c";
when "00" & x"f15" => DATA <= x"0046";
when "00" & x"f16" => DATA <= x"6700";
when "00" & x"f17" => DATA <= x"019e";
when "00" & x"f18" => DATA <= x"b03c";
when "00" & x"f19" => DATA <= x"0047";
when "00" & x"f1a" => DATA <= x"6700";
when "00" & x"f1b" => DATA <= x"01d0";
when "00" & x"f1c" => DATA <= x"b03c";
when "00" & x"f1d" => DATA <= x"0048";
when "00" & x"f1e" => DATA <= x"6700";
when "00" & x"f1f" => DATA <= x"01e4";
when "00" & x"f20" => DATA <= x"b03c";
when "00" & x"f21" => DATA <= x"004d";
when "00" & x"f22" => DATA <= x"6700";
when "00" & x"f23" => DATA <= x"0290";
when "00" & x"f24" => DATA <= x"b03c";
when "00" & x"f25" => DATA <= x"0051";
when "00" & x"f26" => DATA <= x"6700";
when "00" & x"f27" => DATA <= x"02be";
when "00" & x"f28" => DATA <= x"b03c";
when "00" & x"f29" => DATA <= x"0052";
when "00" & x"f2a" => DATA <= x"6700";
when "00" & x"f2b" => DATA <= x"02bc";
when "00" & x"f2c" => DATA <= x"b03c";
when "00" & x"f2d" => DATA <= x"0053";
when "00" & x"f2e" => DATA <= x"6700";
when "00" & x"f2f" => DATA <= x"0012";
when "00" & x"f30" => DATA <= x"b03c";
when "00" & x"f31" => DATA <= x"0054";
when "00" & x"f32" => DATA <= x"6700";
when "00" & x"f33" => DATA <= x"000a";
when "00" & x"f34" => DATA <= x"b03c";
when "00" & x"f35" => DATA <= x"0056";
when "00" & x"f36" => DATA <= x"6700";
when "00" & x"f37" => DATA <= x"0356";
when "00" & x"f38" => DATA <= x"203c";
when "00" & x"f39" => DATA <= x"003f";
when "00" & x"f3a" => DATA <= x"2b07";
when "00" & x"f3b" => DATA <= x"6100";
when "00" & x"f3c" => DATA <= x"eb8a";
when "00" & x"f3d" => DATA <= x"6000";
when "00" & x"f3e" => DATA <= x"ff4c";
when "00" & x"f3f" => DATA <= x"6100";
when "00" & x"f40" => DATA <= x"08a4";
when "00" & x"f41" => DATA <= x"7010";
when "00" & x"f42" => DATA <= x"220e";
when "00" & x"f43" => DATA <= x"6100";
when "00" & x"f44" => DATA <= x"f148";
when "00" & x"f45" => DATA <= x"6900";
when "00" & x"f46" => DATA <= x"023c";
when "00" & x"f47" => DATA <= x"2c41";
when "00" & x"f48" => DATA <= x"2002";
when "00" & x"f49" => DATA <= x"223c";
when "00" & x"f4a" => DATA <= x"0000";
when "00" & x"f4b" => DATA <= x"0600";
when "00" & x"f4c" => DATA <= x"6100";
when "00" & x"f4d" => DATA <= x"fc76";
when "00" & x"f4e" => DATA <= x"2001";
when "00" & x"f4f" => DATA <= x"6100";
when "00" & x"f50" => DATA <= x"eb62";
when "00" & x"f51" => DATA <= x"6100";
when "00" & x"f52" => DATA <= x"eb72";
when "00" & x"f53" => DATA <= x"6000";
when "00" & x"f54" => DATA <= x"ff20";
when "00" & x"f55" => DATA <= x"707e";
when "00" & x"f56" => DATA <= x"6100";
when "00" & x"f57" => DATA <= x"ec28";
when "00" & x"f58" => DATA <= x"6000";
when "00" & x"f59" => DATA <= x"ff16";
when "00" & x"f5a" => DATA <= x"6100";
when "00" & x"f5b" => DATA <= x"086e";
when "00" & x"f5c" => DATA <= x"7010";
when "00" & x"f5d" => DATA <= x"220e";
when "00" & x"f5e" => DATA <= x"6100";
when "00" & x"f5f" => DATA <= x"f112";
when "00" & x"f60" => DATA <= x"6900";
when "00" & x"f61" => DATA <= x"0206";
when "00" & x"f62" => DATA <= x"2842";
when "00" & x"f63" => DATA <= x"6100";
when "00" & x"f64" => DATA <= x"086a";
when "00" & x"f65" => DATA <= x"7010";
when "00" & x"f66" => DATA <= x"6100";
when "00" & x"f67" => DATA <= x"f102";
when "00" & x"f68" => DATA <= x"6900";
when "00" & x"f69" => DATA <= x"01f6";
when "00" & x"f6a" => DATA <= x"2a42";
when "00" & x"f6b" => DATA <= x"6100";
when "00" & x"f6c" => DATA <= x"085a";
when "00" & x"f6d" => DATA <= x"7010";
when "00" & x"f6e" => DATA <= x"6100";
when "00" & x"f6f" => DATA <= x"f0f2";
when "00" & x"f70" => DATA <= x"6900";
when "00" & x"f71" => DATA <= x"01e6";
when "00" & x"f72" => DATA <= x"2c41";
when "00" & x"f73" => DATA <= x"1e02";
when "00" & x"f74" => DATA <= x"be1c";
when "00" & x"f75" => DATA <= x"6600";
when "00" & x"f76" => DATA <= x"0024";
when "00" & x"f77" => DATA <= x"200c";
when "00" & x"f78" => DATA <= x"223c";
when "00" & x"f79" => DATA <= x"0000";
when "00" & x"f7a" => DATA <= x"0600";
when "00" & x"f7b" => DATA <= x"243c";
when "00" & x"f7c" => DATA <= x"0000";
when "00" & x"f7d" => DATA <= x"00ff";
when "00" & x"f7e" => DATA <= x"6100";
when "00" & x"f7f" => DATA <= x"f7ec";
when "00" & x"f80" => DATA <= x"21fc";
when "00" & x"f81" => DATA <= x"2020";
when "00" & x"f82" => DATA <= x"0000";
when "00" & x"f83" => DATA <= x"0608";
when "00" & x"f84" => DATA <= x"303c";
when "00" & x"f85" => DATA <= x"0600";
when "00" & x"f86" => DATA <= x"6100";
when "00" & x"f87" => DATA <= x"eaf4";
when "00" & x"f88" => DATA <= x"bbcc";
when "00" & x"f89" => DATA <= x"64d4";
when "00" & x"f8a" => DATA <= x"6000";
when "00" & x"f8b" => DATA <= x"feb2";
when "00" & x"f8c" => DATA <= x"6100";
when "00" & x"f8d" => DATA <= x"080a";
when "00" & x"f8e" => DATA <= x"7010";
when "00" & x"f8f" => DATA <= x"220e";
when "00" & x"f90" => DATA <= x"6100";
when "00" & x"f91" => DATA <= x"f0ae";
when "00" & x"f92" => DATA <= x"6900";
when "00" & x"f93" => DATA <= x"01a2";
when "00" & x"f94" => DATA <= x"2842";
when "00" & x"f95" => DATA <= x"11fc";
when "00" & x"f96" => DATA <= x"0020";
when "00" & x"f97" => DATA <= x"0609";
when "00" & x"f98" => DATA <= x"11fc";
when "00" & x"f99" => DATA <= x"0020";
when "00" & x"f9a" => DATA <= x"060d";
when "00" & x"f9b" => DATA <= x"11fc";
when "00" & x"f9c" => DATA <= x"0028";
when "00" & x"f9d" => DATA <= x"060e";
when "00" & x"f9e" => DATA <= x"21fc";
when "00" & x"f9f" => DATA <= x"2920";
when "00" & x"fa0" => DATA <= x"2000";
when "00" & x"fa1" => DATA <= x"0610";
when "00" & x"fa2" => DATA <= x"200c";
when "00" & x"fa3" => DATA <= x"223c";
when "00" & x"fa4" => DATA <= x"0000";
when "00" & x"fa5" => DATA <= x"0600";
when "00" & x"fa6" => DATA <= x"243c";
when "00" & x"fa7" => DATA <= x"0000";
when "00" & x"fa8" => DATA <= x"00ff";
when "00" & x"fa9" => DATA <= x"6100";
when "00" & x"faa" => DATA <= x"f796";
when "00" & x"fab" => DATA <= x"11fc";
when "00" & x"fac" => DATA <= x"0020";
when "00" & x"fad" => DATA <= x"0608";
when "00" & x"fae" => DATA <= x"5441";
when "00" & x"faf" => DATA <= x"1014";
when "00" & x"fb0" => DATA <= x"243c";
when "00" & x"fb1" => DATA <= x"0000";
when "00" & x"fb2" => DATA <= x"00ff";
when "00" & x"fb3" => DATA <= x"6100";
when "00" & x"fb4" => DATA <= x"f72c";
when "00" & x"fb5" => DATA <= x"2a41";
when "00" & x"fb6" => DATA <= x"1afc";
when "00" & x"fb7" => DATA <= x"0020";
when "00" & x"fb8" => DATA <= x"2c4c";
when "00" & x"fb9" => DATA <= x"6100";
when "00" & x"fba" => DATA <= x"084a";
when "00" & x"fbb" => DATA <= x"11c0";
when "00" & x"fbc" => DATA <= x"060f";
when "00" & x"fbd" => DATA <= x"203c";
when "00" & x"fbe" => DATA <= x"0000";
when "00" & x"fbf" => DATA <= x"0600";
when "00" & x"fc0" => DATA <= x"6100";
when "00" & x"fc1" => DATA <= x"ea80";
when "00" & x"fc2" => DATA <= x"203c";
when "00" & x"fc3" => DATA <= x"0000";
when "00" & x"fc4" => DATA <= x"0680";
when "00" & x"fc5" => DATA <= x"7202";
when "00" & x"fc6" => DATA <= x"143c";
when "00" & x"fc7" => DATA <= x"0020";
when "00" & x"fc8" => DATA <= x"163c";
when "00" & x"fc9" => DATA <= x"0046";
when "00" & x"fca" => DATA <= x"207c";
when "00" & x"fcb" => DATA <= x"0000";
when "00" & x"fcc" => DATA <= x"007d";
when "00" & x"fcd" => DATA <= x"4e4c";
when "00" & x"fce" => DATA <= x"6500";
when "00" & x"fcf" => DATA <= x"0024";
when "00" & x"fd0" => DATA <= x"0c38";
when "00" & x"fd1" => DATA <= x"000d";
when "00" & x"fd2" => DATA <= x"0680";
when "00" & x"fd3" => DATA <= x"6600";
when "00" & x"fd4" => DATA <= x"0006";
when "00" & x"fd5" => DATA <= x"524c";
when "00" & x"fd6" => DATA <= x"6096";
when "00" & x"fd7" => DATA <= x"2c7c";
when "00" & x"fd8" => DATA <= x"0000";
when "00" & x"fd9" => DATA <= x"0680";
when "00" & x"fda" => DATA <= x"7010";
when "00" & x"fdb" => DATA <= x"220e";
when "00" & x"fdc" => DATA <= x"6100";
when "00" & x"fdd" => DATA <= x"f016";
when "00" & x"fde" => DATA <= x"6986";
when "00" & x"fdf" => DATA <= x"18c2";
when "00" & x"fe0" => DATA <= x"6082";
when "00" & x"fe1" => DATA <= x"707e";
when "00" & x"fe2" => DATA <= x"6100";
when "00" & x"fe3" => DATA <= x"eb10";
when "00" & x"fe4" => DATA <= x"6000";
when "00" & x"fe5" => DATA <= x"fdfe";
when "00" & x"fe6" => DATA <= x"220e";
when "00" & x"fe7" => DATA <= x"6100";
when "00" & x"fe8" => DATA <= x"0762";
when "00" & x"fe9" => DATA <= x"7010";
when "00" & x"fea" => DATA <= x"6100";
when "00" & x"feb" => DATA <= x"effa";
when "00" & x"fec" => DATA <= x"6900";
when "00" & x"fed" => DATA <= x"00ee";
when "00" & x"fee" => DATA <= x"2842";
when "00" & x"fef" => DATA <= x"6100";
when "00" & x"ff0" => DATA <= x"0752";
when "00" & x"ff1" => DATA <= x"7010";
when "00" & x"ff2" => DATA <= x"6100";
when "00" & x"ff3" => DATA <= x"efea";
when "00" & x"ff4" => DATA <= x"6900";
when "00" & x"ff5" => DATA <= x"00de";
when "00" & x"ff6" => DATA <= x"2a42";
when "00" & x"ff7" => DATA <= x"6100";
when "00" & x"ff8" => DATA <= x"0742";
when "00" & x"ff9" => DATA <= x"7010";
when "00" & x"ffa" => DATA <= x"6100";
when "00" & x"ffb" => DATA <= x"efda";
when "00" & x"ffc" => DATA <= x"6900";
when "00" & x"ffd" => DATA <= x"00ce";
when "00" & x"ffe" => DATA <= x"18c2";
when "00" & x"fff" => DATA <= x"bbcc";
when "01" & x"000" => DATA <= x"64fa";
when "01" & x"001" => DATA <= x"6000";
when "01" & x"002" => DATA <= x"fdc4";
when "01" & x"003" => DATA <= x"6100";
when "01" & x"004" => DATA <= x"071c";
when "01" & x"005" => DATA <= x"6700";
when "01" & x"006" => DATA <= x"00bc";
when "01" & x"007" => DATA <= x"7010";
when "01" & x"008" => DATA <= x"220e";
when "01" & x"009" => DATA <= x"6100";
when "01" & x"00a" => DATA <= x"efbc";
when "01" & x"00b" => DATA <= x"6900";
when "01" & x"00c" => DATA <= x"00b0";
when "01" & x"00d" => DATA <= x"2c42";
when "01" & x"00e" => DATA <= x"4e96";
when "01" & x"00f" => DATA <= x"6000";
when "01" & x"010" => DATA <= x"fda8";
when "01" & x"011" => DATA <= x"6100";
when "01" & x"012" => DATA <= x"0700";
when "01" & x"013" => DATA <= x"0c16";
when "01" & x"014" => DATA <= x"000d";
when "01" & x"015" => DATA <= x"6600";
when "01" & x"016" => DATA <= x"0008";
when "01" & x"017" => DATA <= x"4282";
when "01" & x"018" => DATA <= x"6000";
when "01" & x"019" => DATA <= x"0016";
when "01" & x"01a" => DATA <= x"7010";
when "01" & x"01b" => DATA <= x"220e";
when "01" & x"01c" => DATA <= x"6100";
when "01" & x"01d" => DATA <= x"ef96";
when "01" & x"01e" => DATA <= x"6900";
when "01" & x"01f" => DATA <= x"008a";
when "01" & x"020" => DATA <= x"6100";
when "01" & x"021" => DATA <= x"06f0";
when "01" & x"022" => DATA <= x"6600";
when "01" & x"023" => DATA <= x"0082";
when "01" & x"024" => DATA <= x"0282";
when "01" & x"025" => DATA <= x"ffff";
when "01" & x"026" => DATA <= x"fffc";
when "01" & x"027" => DATA <= x"2c42";
when "01" & x"028" => DATA <= x"103c";
when "01" & x"029" => DATA <= x"000e";
when "01" & x"02a" => DATA <= x"6100";
when "01" & x"02b" => DATA <= x"e994";
when "01" & x"02c" => DATA <= x"200e";
when "01" & x"02d" => DATA <= x"223c";
when "01" & x"02e" => DATA <= x"0000";
when "01" & x"02f" => DATA <= x"0600";
when "01" & x"030" => DATA <= x"243c";
when "01" & x"031" => DATA <= x"0000";
when "01" & x"032" => DATA <= x"00ff";
when "01" & x"033" => DATA <= x"6100";
when "01" & x"034" => DATA <= x"f682";
when "01" & x"035" => DATA <= x"31fc";
when "01" & x"036" => DATA <= x"2020";
when "01" & x"037" => DATA <= x"0608";
when "01" & x"038" => DATA <= x"5441";
when "01" & x"039" => DATA <= x"760f";
when "01" & x"03a" => DATA <= x"287c";
when "01" & x"03b" => DATA <= x"0000";
when "01" & x"03c" => DATA <= x"063b";
when "01" & x"03d" => DATA <= x"11fc";
when "01" & x"03e" => DATA <= x"0020";
when "01" & x"03f" => DATA <= x"063a";
when "01" & x"040" => DATA <= x"11fc";
when "01" & x"041" => DATA <= x"0000";
when "01" & x"042" => DATA <= x"064b";
when "01" & x"043" => DATA <= x"1016";
when "01" & x"044" => DATA <= x"243c";
when "01" & x"045" => DATA <= x"0000";
when "01" & x"046" => DATA <= x"00ff";
when "01" & x"047" => DATA <= x"6100";
when "01" & x"048" => DATA <= x"f604";
when "01" & x"049" => DATA <= x"2a41";
when "01" & x"04a" => DATA <= x"1abc";
when "01" & x"04b" => DATA <= x"0020";
when "01" & x"04c" => DATA <= x"5241";
when "01" & x"04d" => DATA <= x"6100";
when "01" & x"04e" => DATA <= x"0722";
when "01" & x"04f" => DATA <= x"18c0";
when "01" & x"050" => DATA <= x"51cb";
when "01" & x"051" => DATA <= x"ffe4";
when "01" & x"052" => DATA <= x"303c";
when "01" & x"053" => DATA <= x"0600";
when "01" & x"054" => DATA <= x"6100";
when "01" & x"055" => DATA <= x"e958";
when "01" & x"056" => DATA <= x"6100";
when "01" & x"057" => DATA <= x"e968";
when "01" & x"058" => DATA <= x"6100";
when "01" & x"059" => DATA <= x"f078";
when "01" & x"05a" => DATA <= x"64a2";
when "01" & x"05b" => DATA <= x"707e";
when "01" & x"05c" => DATA <= x"6100";
when "01" & x"05d" => DATA <= x"ea1c";
when "01" & x"05e" => DATA <= x"103c";
when "01" & x"05f" => DATA <= x"000f";
when "01" & x"060" => DATA <= x"6100";
when "01" & x"061" => DATA <= x"e928";
when "01" & x"062" => DATA <= x"6000";
when "01" & x"063" => DATA <= x"fd02";
when "01" & x"064" => DATA <= x"203c";
when "01" & x"065" => DATA <= x"003f";
when "01" & x"066" => DATA <= x"29b2";
when "01" & x"067" => DATA <= x"6100";
when "01" & x"068" => DATA <= x"e932";
when "01" & x"069" => DATA <= x"6000";
when "01" & x"06a" => DATA <= x"fcf4";
when "01" & x"06b" => DATA <= x"6100";
when "01" & x"06c" => DATA <= x"064c";
when "01" & x"06d" => DATA <= x"7010";
when "01" & x"06e" => DATA <= x"220e";
when "01" & x"06f" => DATA <= x"6100";
when "01" & x"070" => DATA <= x"eef0";
when "01" & x"071" => DATA <= x"69e4";
when "01" & x"072" => DATA <= x"2842";
when "01" & x"073" => DATA <= x"6100";
when "01" & x"074" => DATA <= x"064a";
when "01" & x"075" => DATA <= x"7010";
when "01" & x"076" => DATA <= x"6100";
when "01" & x"077" => DATA <= x"eee2";
when "01" & x"078" => DATA <= x"69d6";
when "01" & x"079" => DATA <= x"2a42";
when "01" & x"07a" => DATA <= x"6100";
when "01" & x"07b" => DATA <= x"063c";
when "01" & x"07c" => DATA <= x"7010";
when "01" & x"07d" => DATA <= x"6100";
when "01" & x"07e" => DATA <= x"eed4";
when "01" & x"07f" => DATA <= x"69c8";
when "01" & x"080" => DATA <= x"5382";
when "01" & x"081" => DATA <= x"1adc";
when "01" & x"082" => DATA <= x"51ca";
when "01" & x"083" => DATA <= x"fffc";
when "01" & x"084" => DATA <= x"6000";
when "01" & x"085" => DATA <= x"fcbe";
when "01" & x"086" => DATA <= x"6100";
when "01" & x"087" => DATA <= x"e908";
when "01" & x"088" => DATA <= x"4e75";
when "01" & x"089" => DATA <= x"6100";
when "01" & x"08a" => DATA <= x"0610";
when "01" & x"08b" => DATA <= x"2f0d";
when "01" & x"08c" => DATA <= x"2f02";
when "01" & x"08d" => DATA <= x"2f01";
when "01" & x"08e" => DATA <= x"2f00";
when "01" & x"08f" => DATA <= x"4280";
when "01" & x"090" => DATA <= x"101e";
when "01" & x"091" => DATA <= x"0200";
when "01" & x"092" => DATA <= x"00df";
when "01" & x"093" => DATA <= x"0c00";
when "01" & x"094" => DATA <= x"0041";
when "01" & x"095" => DATA <= x"6700";
when "01" & x"096" => DATA <= x"0008";
when "01" & x"097" => DATA <= x"0c00";
when "01" & x"098" => DATA <= x"0044";
when "01" & x"099" => DATA <= x"6694";
when "01" & x"09a" => DATA <= x"0200";
when "01" & x"09b" => DATA <= x"00be";
when "01" & x"09c" => DATA <= x"e380";
when "01" & x"09d" => DATA <= x"1400";
when "01" & x"09e" => DATA <= x"101e";
when "01" & x"09f" => DATA <= x"0c00";
when "01" & x"0a0" => DATA <= x"0030";
when "01" & x"0a1" => DATA <= x"6584";
when "01" & x"0a2" => DATA <= x"0c00";
when "01" & x"0a3" => DATA <= x"0037";
when "01" & x"0a4" => DATA <= x"6200";
when "01" & x"0a5" => DATA <= x"ff7e";
when "01" & x"0a6" => DATA <= x"0400";
when "01" & x"0a7" => DATA <= x"0030";
when "01" & x"0a8" => DATA <= x"d002";
when "01" & x"0a9" => DATA <= x"e580";
when "01" & x"0aa" => DATA <= x"2a7c";
when "01" & x"0ab" => DATA <= x"003f";
when "01" & x"0ac" => DATA <= x"217a";
when "01" & x"0ad" => DATA <= x"dbc0";
when "01" & x"0ae" => DATA <= x"6100";
when "01" & x"0af" => DATA <= x"05c6";
when "01" & x"0b0" => DATA <= x"7010";
when "01" & x"0b1" => DATA <= x"220e";
when "01" & x"0b2" => DATA <= x"6100";
when "01" & x"0b3" => DATA <= x"ee6a";
when "01" & x"0b4" => DATA <= x"6900";
when "01" & x"0b5" => DATA <= x"ff5e";
when "01" & x"0b6" => DATA <= x"4ed5";
when "01" & x"0b7" => DATA <= x"201f";
when "01" & x"0b8" => DATA <= x"221f";
when "01" & x"0b9" => DATA <= x"241f";
when "01" & x"0ba" => DATA <= x"2a5f";
when "01" & x"0bb" => DATA <= x"6000";
when "01" & x"0bc" => DATA <= x"fc50";
when "01" & x"0bd" => DATA <= x"2042";
when "01" & x"0be" => DATA <= x"60f0";
when "01" & x"0bf" => DATA <= x"2242";
when "01" & x"0c0" => DATA <= x"60ec";
when "01" & x"0c1" => DATA <= x"2442";
when "01" & x"0c2" => DATA <= x"60e8";
when "01" & x"0c3" => DATA <= x"2642";
when "01" & x"0c4" => DATA <= x"60e4";
when "01" & x"0c5" => DATA <= x"2842";
when "01" & x"0c6" => DATA <= x"60e0";
when "01" & x"0c7" => DATA <= x"2a42";
when "01" & x"0c8" => DATA <= x"60dc";
when "01" & x"0c9" => DATA <= x"2c42";
when "01" & x"0ca" => DATA <= x"60d8";
when "01" & x"0cb" => DATA <= x"2e42";
when "01" & x"0cc" => DATA <= x"60d4";
when "01" & x"0cd" => DATA <= x"2002";
when "01" & x"0ce" => DATA <= x"60d0";
when "01" & x"0cf" => DATA <= x"2202";
when "01" & x"0d0" => DATA <= x"60cc";
when "01" & x"0d1" => DATA <= x"4e71";
when "01" & x"0d2" => DATA <= x"60c8";
when "01" & x"0d3" => DATA <= x"2602";
when "01" & x"0d4" => DATA <= x"60c4";
when "01" & x"0d5" => DATA <= x"2802";
when "01" & x"0d6" => DATA <= x"60c0";
when "01" & x"0d7" => DATA <= x"2a02";
when "01" & x"0d8" => DATA <= x"60bc";
when "01" & x"0d9" => DATA <= x"2c02";
when "01" & x"0da" => DATA <= x"60b8";
when "01" & x"0db" => DATA <= x"2e02";
when "01" & x"0dc" => DATA <= x"60b4";
when "01" & x"0dd" => DATA <= x"200e";
when "01" & x"0de" => DATA <= x"6100";
when "01" & x"0df" => DATA <= x"e876";
when "01" & x"0e0" => DATA <= x"6000";
when "01" & x"0e1" => DATA <= x"fc06";
when "01" & x"0e2" => DATA <= x"103c";
when "01" & x"0e3" => DATA <= x"0020";
when "01" & x"0e4" => DATA <= x"323c";
when "01" & x"0e5" => DATA <= x"0032";
when "01" & x"0e6" => DATA <= x"6100";
when "01" & x"0e7" => DATA <= x"e81c";
when "01" & x"0e8" => DATA <= x"51c9";
when "01" & x"0e9" => DATA <= x"fffa";
when "01" & x"0ea" => DATA <= x"203c";
when "01" & x"0eb" => DATA <= x"003f";
when "01" & x"0ec" => DATA <= x"2b2a";
when "01" & x"0ed" => DATA <= x"6100";
when "01" & x"0ee" => DATA <= x"e826";
when "01" & x"0ef" => DATA <= x"6100";
when "01" & x"0f0" => DATA <= x"e836";
when "01" & x"0f1" => DATA <= x"21fc";
when "01" & x"0f2" => DATA <= x"4430";
when "01" & x"0f3" => DATA <= x"3a00";
when "01" & x"0f4" => DATA <= x"0600";
when "01" & x"0f5" => DATA <= x"223c";
when "01" & x"0f6" => DATA <= x"0000";
when "01" & x"0f7" => DATA <= x"0603";
when "01" & x"0f8" => DATA <= x"243c";
when "01" & x"0f9" => DATA <= x"0000";
when "01" & x"0fa" => DATA <= x"00fc";
when "01" & x"0fb" => DATA <= x"6100";
when "01" & x"0fc" => DATA <= x"f4f2";
when "01" & x"0fd" => DATA <= x"11fc";
when "01" & x"0fe" => DATA <= x"0020";
when "01" & x"0ff" => DATA <= x"060b";
when "01" & x"100" => DATA <= x"21fc";
when "01" & x"101" => DATA <= x"4431";
when "01" & x"102" => DATA <= x"3a00";
when "01" & x"103" => DATA <= x"060c";
when "01" & x"104" => DATA <= x"2001";
when "01" & x"105" => DATA <= x"223c";
when "01" & x"106" => DATA <= x"0000";
when "01" & x"107" => DATA <= x"060f";
when "01" & x"108" => DATA <= x"243c";
when "01" & x"109" => DATA <= x"0000";
when "01" & x"10a" => DATA <= x"00f4";
when "01" & x"10b" => DATA <= x"6100";
when "01" & x"10c" => DATA <= x"f4d2";
when "01" & x"10d" => DATA <= x"11fc";
when "01" & x"10e" => DATA <= x"0020";
when "01" & x"10f" => DATA <= x"0617";
when "01" & x"110" => DATA <= x"21fc";
when "01" & x"111" => DATA <= x"4432";
when "01" & x"112" => DATA <= x"3a00";
when "01" & x"113" => DATA <= x"0618";
when "01" & x"114" => DATA <= x"2002";
when "01" & x"115" => DATA <= x"223c";
when "01" & x"116" => DATA <= x"0000";
when "01" & x"117" => DATA <= x"061b";
when "01" & x"118" => DATA <= x"243c";
when "01" & x"119" => DATA <= x"0000";
when "01" & x"11a" => DATA <= x"00e8";
when "01" & x"11b" => DATA <= x"6100";
when "01" & x"11c" => DATA <= x"f4b2";
when "01" & x"11d" => DATA <= x"11fc";
when "01" & x"11e" => DATA <= x"0020";
when "01" & x"11f" => DATA <= x"0623";
when "01" & x"120" => DATA <= x"21fc";
when "01" & x"121" => DATA <= x"4433";
when "01" & x"122" => DATA <= x"3a00";
when "01" & x"123" => DATA <= x"0624";
when "01" & x"124" => DATA <= x"2003";
when "01" & x"125" => DATA <= x"223c";
when "01" & x"126" => DATA <= x"0000";
when "01" & x"127" => DATA <= x"0627";
when "01" & x"128" => DATA <= x"243c";
when "01" & x"129" => DATA <= x"0000";
when "01" & x"12a" => DATA <= x"00dc";
when "01" & x"12b" => DATA <= x"6100";
when "01" & x"12c" => DATA <= x"f492";
when "01" & x"12d" => DATA <= x"11fc";
when "01" & x"12e" => DATA <= x"0020";
when "01" & x"12f" => DATA <= x"062f";
when "01" & x"130" => DATA <= x"21fc";
when "01" & x"131" => DATA <= x"5352";
when "01" & x"132" => DATA <= x"3a00";
when "01" & x"133" => DATA <= x"0630";
when "01" & x"134" => DATA <= x"223c";
when "01" & x"135" => DATA <= x"0000";
when "01" & x"136" => DATA <= x"0633";
when "01" & x"137" => DATA <= x"243c";
when "01" & x"138" => DATA <= x"0000";
when "01" & x"139" => DATA <= x"00cd";
when "01" & x"13a" => DATA <= x"40c0";
when "01" & x"13b" => DATA <= x"6100";
when "01" & x"13c" => DATA <= x"f6b4";
when "01" & x"13d" => DATA <= x"11fc";
when "01" & x"13e" => DATA <= x"0020";
when "01" & x"13f" => DATA <= x"0643";
when "01" & x"140" => DATA <= x"21fc";
when "01" & x"141" => DATA <= x"2020";
when "01" & x"142" => DATA <= x"0a0d";
when "01" & x"143" => DATA <= x"0644";
when "01" & x"144" => DATA <= x"21fc";
when "01" & x"145" => DATA <= x"4434";
when "01" & x"146" => DATA <= x"3a00";
when "01" & x"147" => DATA <= x"0648";
when "01" & x"148" => DATA <= x"2004";
when "01" & x"149" => DATA <= x"223c";
when "01" & x"14a" => DATA <= x"0000";
when "01" & x"14b" => DATA <= x"064b";
when "01" & x"14c" => DATA <= x"243c";
when "01" & x"14d" => DATA <= x"0000";
when "01" & x"14e" => DATA <= x"00b8";
when "01" & x"14f" => DATA <= x"6100";
when "01" & x"150" => DATA <= x"f44a";
when "01" & x"151" => DATA <= x"11fc";
when "01" & x"152" => DATA <= x"0020";
when "01" & x"153" => DATA <= x"0653";
when "01" & x"154" => DATA <= x"21fc";
when "01" & x"155" => DATA <= x"4435";
when "01" & x"156" => DATA <= x"3a00";
when "01" & x"157" => DATA <= x"0654";
when "01" & x"158" => DATA <= x"2005";
when "01" & x"159" => DATA <= x"223c";
when "01" & x"15a" => DATA <= x"0000";
when "01" & x"15b" => DATA <= x"0657";
when "01" & x"15c" => DATA <= x"243c";
when "01" & x"15d" => DATA <= x"0000";
when "01" & x"15e" => DATA <= x"00ac";
when "01" & x"15f" => DATA <= x"6100";
when "01" & x"160" => DATA <= x"f42a";
when "01" & x"161" => DATA <= x"11fc";
when "01" & x"162" => DATA <= x"0020";
when "01" & x"163" => DATA <= x"065f";
when "01" & x"164" => DATA <= x"21fc";
when "01" & x"165" => DATA <= x"4436";
when "01" & x"166" => DATA <= x"3a00";
when "01" & x"167" => DATA <= x"0660";
when "01" & x"168" => DATA <= x"2006";
when "01" & x"169" => DATA <= x"223c";
when "01" & x"16a" => DATA <= x"0000";
when "01" & x"16b" => DATA <= x"0663";
when "01" & x"16c" => DATA <= x"243c";
when "01" & x"16d" => DATA <= x"0000";
when "01" & x"16e" => DATA <= x"00a0";
when "01" & x"16f" => DATA <= x"6100";
when "01" & x"170" => DATA <= x"f40a";
when "01" & x"171" => DATA <= x"11fc";
when "01" & x"172" => DATA <= x"0020";
when "01" & x"173" => DATA <= x"066b";
when "01" & x"174" => DATA <= x"21fc";
when "01" & x"175" => DATA <= x"4437";
when "01" & x"176" => DATA <= x"3a00";
when "01" & x"177" => DATA <= x"066c";
when "01" & x"178" => DATA <= x"2007";
when "01" & x"179" => DATA <= x"223c";
when "01" & x"17a" => DATA <= x"0000";
when "01" & x"17b" => DATA <= x"066f";
when "01" & x"17c" => DATA <= x"243c";
when "01" & x"17d" => DATA <= x"0000";
when "01" & x"17e" => DATA <= x"0094";
when "01" & x"17f" => DATA <= x"6100";
when "01" & x"180" => DATA <= x"f3ea";
when "01" & x"181" => DATA <= x"11fc";
when "01" & x"182" => DATA <= x"0020";
when "01" & x"183" => DATA <= x"0677";
when "01" & x"184" => DATA <= x"21fc";
when "01" & x"185" => DATA <= x"5553";
when "01" & x"186" => DATA <= x"3a00";
when "01" & x"187" => DATA <= x"0678";
when "01" & x"188" => DATA <= x"4e68";
when "01" & x"189" => DATA <= x"2008";
when "01" & x"18a" => DATA <= x"223c";
when "01" & x"18b" => DATA <= x"0000";
when "01" & x"18c" => DATA <= x"067b";
when "01" & x"18d" => DATA <= x"243c";
when "01" & x"18e" => DATA <= x"0000";
when "01" & x"18f" => DATA <= x"0094";
when "01" & x"190" => DATA <= x"6100";
when "01" & x"191" => DATA <= x"f3c8";
when "01" & x"192" => DATA <= x"11fc";
when "01" & x"193" => DATA <= x"0020";
when "01" & x"194" => DATA <= x"0683";
when "01" & x"195" => DATA <= x"21fc";
when "01" & x"196" => DATA <= x"2020";
when "01" & x"197" => DATA <= x"0a0d";
when "01" & x"198" => DATA <= x"0684";
when "01" & x"199" => DATA <= x"21fc";
when "01" & x"19a" => DATA <= x"4130";
when "01" & x"19b" => DATA <= x"3a00";
when "01" & x"19c" => DATA <= x"0688";
when "01" & x"19d" => DATA <= x"2008";
when "01" & x"19e" => DATA <= x"223c";
when "01" & x"19f" => DATA <= x"0000";
when "01" & x"1a0" => DATA <= x"068b";
when "01" & x"1a1" => DATA <= x"243c";
when "01" & x"1a2" => DATA <= x"0000";
when "01" & x"1a3" => DATA <= x"0094";
when "01" & x"1a4" => DATA <= x"6100";
when "01" & x"1a5" => DATA <= x"f3a0";
when "01" & x"1a6" => DATA <= x"11fc";
when "01" & x"1a7" => DATA <= x"0020";
when "01" & x"1a8" => DATA <= x"0693";
when "01" & x"1a9" => DATA <= x"21fc";
when "01" & x"1aa" => DATA <= x"4131";
when "01" & x"1ab" => DATA <= x"3a00";
when "01" & x"1ac" => DATA <= x"0694";
when "01" & x"1ad" => DATA <= x"2009";
when "01" & x"1ae" => DATA <= x"223c";
when "01" & x"1af" => DATA <= x"0000";
when "01" & x"1b0" => DATA <= x"0697";
when "01" & x"1b1" => DATA <= x"243c";
when "01" & x"1b2" => DATA <= x"0000";
when "01" & x"1b3" => DATA <= x"0094";
when "01" & x"1b4" => DATA <= x"6100";
when "01" & x"1b5" => DATA <= x"f380";
when "01" & x"1b6" => DATA <= x"11fc";
when "01" & x"1b7" => DATA <= x"0020";
when "01" & x"1b8" => DATA <= x"069f";
when "01" & x"1b9" => DATA <= x"21fc";
when "01" & x"1ba" => DATA <= x"4132";
when "01" & x"1bb" => DATA <= x"3a00";
when "01" & x"1bc" => DATA <= x"06a0";
when "01" & x"1bd" => DATA <= x"200a";
when "01" & x"1be" => DATA <= x"223c";
when "01" & x"1bf" => DATA <= x"0000";
when "01" & x"1c0" => DATA <= x"06a3";
when "01" & x"1c1" => DATA <= x"243c";
when "01" & x"1c2" => DATA <= x"0000";
when "01" & x"1c3" => DATA <= x"0094";
when "01" & x"1c4" => DATA <= x"6100";
when "01" & x"1c5" => DATA <= x"f360";
when "01" & x"1c6" => DATA <= x"11fc";
when "01" & x"1c7" => DATA <= x"0020";
when "01" & x"1c8" => DATA <= x"06ab";
when "01" & x"1c9" => DATA <= x"21fc";
when "01" & x"1ca" => DATA <= x"4133";
when "01" & x"1cb" => DATA <= x"3a00";
when "01" & x"1cc" => DATA <= x"06ac";
when "01" & x"1cd" => DATA <= x"200b";
when "01" & x"1ce" => DATA <= x"223c";
when "01" & x"1cf" => DATA <= x"0000";
when "01" & x"1d0" => DATA <= x"06af";
when "01" & x"1d1" => DATA <= x"243c";
when "01" & x"1d2" => DATA <= x"0000";
when "01" & x"1d3" => DATA <= x"0094";
when "01" & x"1d4" => DATA <= x"6100";
when "01" & x"1d5" => DATA <= x"f340";
when "01" & x"1d6" => DATA <= x"11fc";
when "01" & x"1d7" => DATA <= x"0020";
when "01" & x"1d8" => DATA <= x"06b7";
when "01" & x"1d9" => DATA <= x"21fc";
when "01" & x"1da" => DATA <= x"5353";
when "01" & x"1db" => DATA <= x"3a00";
when "01" & x"1dc" => DATA <= x"06b8";
when "01" & x"1dd" => DATA <= x"200f";
when "01" & x"1de" => DATA <= x"223c";
when "01" & x"1df" => DATA <= x"0000";
when "01" & x"1e0" => DATA <= x"06bb";
when "01" & x"1e1" => DATA <= x"243c";
when "01" & x"1e2" => DATA <= x"0000";
when "01" & x"1e3" => DATA <= x"0094";
when "01" & x"1e4" => DATA <= x"6100";
when "01" & x"1e5" => DATA <= x"f320";
when "01" & x"1e6" => DATA <= x"11fc";
when "01" & x"1e7" => DATA <= x"0020";
when "01" & x"1e8" => DATA <= x"06c3";
when "01" & x"1e9" => DATA <= x"21fc";
when "01" & x"1ea" => DATA <= x"2020";
when "01" & x"1eb" => DATA <= x"0a0d";
when "01" & x"1ec" => DATA <= x"06c4";
when "01" & x"1ed" => DATA <= x"21fc";
when "01" & x"1ee" => DATA <= x"4134";
when "01" & x"1ef" => DATA <= x"3a00";
when "01" & x"1f0" => DATA <= x"06c8";
when "01" & x"1f1" => DATA <= x"200c";
when "01" & x"1f2" => DATA <= x"223c";
when "01" & x"1f3" => DATA <= x"0000";
when "01" & x"1f4" => DATA <= x"06cb";
when "01" & x"1f5" => DATA <= x"243c";
when "01" & x"1f6" => DATA <= x"0000";
when "01" & x"1f7" => DATA <= x"0094";
when "01" & x"1f8" => DATA <= x"6100";
when "01" & x"1f9" => DATA <= x"f2f8";
when "01" & x"1fa" => DATA <= x"11fc";
when "01" & x"1fb" => DATA <= x"0020";
when "01" & x"1fc" => DATA <= x"06d3";
when "01" & x"1fd" => DATA <= x"21fc";
when "01" & x"1fe" => DATA <= x"4135";
when "01" & x"1ff" => DATA <= x"3a00";
when "01" & x"200" => DATA <= x"06d4";
when "01" & x"201" => DATA <= x"200d";
when "01" & x"202" => DATA <= x"223c";
when "01" & x"203" => DATA <= x"0000";
when "01" & x"204" => DATA <= x"06d7";
when "01" & x"205" => DATA <= x"243c";
when "01" & x"206" => DATA <= x"0000";
when "01" & x"207" => DATA <= x"0094";
when "01" & x"208" => DATA <= x"6100";
when "01" & x"209" => DATA <= x"f2d8";
when "01" & x"20a" => DATA <= x"11fc";
when "01" & x"20b" => DATA <= x"0020";
when "01" & x"20c" => DATA <= x"06df";
when "01" & x"20d" => DATA <= x"21fc";
when "01" & x"20e" => DATA <= x"4136";
when "01" & x"20f" => DATA <= x"3a00";
when "01" & x"210" => DATA <= x"06e0";
when "01" & x"211" => DATA <= x"200e";
when "01" & x"212" => DATA <= x"223c";
when "01" & x"213" => DATA <= x"0000";
when "01" & x"214" => DATA <= x"06e3";
when "01" & x"215" => DATA <= x"243c";
when "01" & x"216" => DATA <= x"0000";
when "01" & x"217" => DATA <= x"0094";
when "01" & x"218" => DATA <= x"6100";
when "01" & x"219" => DATA <= x"f2b8";
when "01" & x"21a" => DATA <= x"11fc";
when "01" & x"21b" => DATA <= x"0020";
when "01" & x"21c" => DATA <= x"06eb";
when "01" & x"21d" => DATA <= x"21fc";
when "01" & x"21e" => DATA <= x"4137";
when "01" & x"21f" => DATA <= x"3a00";
when "01" & x"220" => DATA <= x"06ec";
when "01" & x"221" => DATA <= x"200f";
when "01" & x"222" => DATA <= x"223c";
when "01" & x"223" => DATA <= x"0000";
when "01" & x"224" => DATA <= x"06ef";
when "01" & x"225" => DATA <= x"243c";
when "01" & x"226" => DATA <= x"0000";
when "01" & x"227" => DATA <= x"0094";
when "01" & x"228" => DATA <= x"6100";
when "01" & x"229" => DATA <= x"f298";
when "01" & x"22a" => DATA <= x"11fc";
when "01" & x"22b" => DATA <= x"0020";
when "01" & x"22c" => DATA <= x"06f7";
when "01" & x"22d" => DATA <= x"21fc";
when "01" & x"22e" => DATA <= x"5043";
when "01" & x"22f" => DATA <= x"3a00";
when "01" & x"230" => DATA <= x"06f8";
when "01" & x"231" => DATA <= x"203c";
when "01" & x"232" => DATA <= x"0000";
when "01" & x"233" => DATA <= x"0600";
when "01" & x"234" => DATA <= x"6100";
when "01" & x"235" => DATA <= x"e598";
when "01" & x"236" => DATA <= x"6100";
when "01" & x"237" => DATA <= x"e5a8";
when "01" & x"238" => DATA <= x"6000";
when "01" & x"239" => DATA <= x"f956";
when "01" & x"23a" => DATA <= x"203c";
when "01" & x"23b" => DATA <= x"003f";
when "01" & x"23c" => DATA <= x"2949";
when "01" & x"23d" => DATA <= x"6100";
when "01" & x"23e" => DATA <= x"e586";
when "01" & x"23f" => DATA <= x"4e75";
when "01" & x"240" => DATA <= x"6000";
when "01" & x"241" => DATA <= x"e9c6";
when "01" & x"242" => DATA <= x"6000";
when "01" & x"243" => DATA <= x"e2f4";
when "01" & x"244" => DATA <= x"7010";
when "01" & x"245" => DATA <= x"220e";
when "01" & x"246" => DATA <= x"6100";
when "01" & x"247" => DATA <= x"eb42";
when "01" & x"248" => DATA <= x"6900";
when "01" & x"249" => DATA <= x"00d2";
when "01" & x"24a" => DATA <= x"2e02";
when "01" & x"24b" => DATA <= x"6100";
when "01" & x"24c" => DATA <= x"029a";
when "01" & x"24d" => DATA <= x"7010";
when "01" & x"24e" => DATA <= x"6100";
when "01" & x"24f" => DATA <= x"eb32";
when "01" & x"250" => DATA <= x"6900";
when "01" & x"251" => DATA <= x"00c2";
when "01" & x"252" => DATA <= x"2c02";
when "01" & x"253" => DATA <= x"6100";
when "01" & x"254" => DATA <= x"028a";
when "01" & x"255" => DATA <= x"7010";
when "01" & x"256" => DATA <= x"6100";
when "01" & x"257" => DATA <= x"eb22";
when "01" & x"258" => DATA <= x"6900";
when "01" & x"259" => DATA <= x"00b2";
when "01" & x"25a" => DATA <= x"2c41";
when "01" & x"25b" => DATA <= x"2a02";
when "01" & x"25c" => DATA <= x"6100";
when "01" & x"25d" => DATA <= x"026a";
when "01" & x"25e" => DATA <= x"101e";
when "01" & x"25f" => DATA <= x"0200";
when "01" & x"260" => DATA <= x"00df";
when "01" & x"261" => DATA <= x"b03c";
when "01" & x"262" => DATA <= x"0052";
when "01" & x"263" => DATA <= x"6700";
when "01" & x"264" => DATA <= x"0012";
when "01" & x"265" => DATA <= x"b03c";
when "01" & x"266" => DATA <= x"0057";
when "01" & x"267" => DATA <= x"6600";
when "01" & x"268" => DATA <= x"0094";
when "01" & x"269" => DATA <= x"183c";
when "01" & x"26a" => DATA <= x"0006";
when "01" & x"26b" => DATA <= x"6000";
when "01" & x"26c" => DATA <= x"0006";
when "01" & x"26d" => DATA <= x"183c";
when "01" & x"26e" => DATA <= x"0007";
when "01" & x"26f" => DATA <= x"6100";
when "01" & x"270" => DATA <= x"0244";
when "01" & x"271" => DATA <= x"6700";
when "01" & x"272" => DATA <= x"0020";
when "01" & x"273" => DATA <= x"101e";
when "01" & x"274" => DATA <= x"0200";
when "01" & x"275" => DATA <= x"00df";
when "01" & x"276" => DATA <= x"b03c";
when "01" & x"277" => DATA <= x"0053";
when "01" & x"278" => DATA <= x"6700";
when "01" & x"279" => DATA <= x"001a";
when "01" & x"27a" => DATA <= x"b03c";
when "01" & x"27b" => DATA <= x"004d";
when "01" & x"27c" => DATA <= x"6600";
when "01" & x"27d" => DATA <= x"006a";
when "01" & x"27e" => DATA <= x"163c";
when "01" & x"27f" => DATA <= x"0040";
when "01" & x"280" => DATA <= x"6000";
when "01" & x"281" => DATA <= x"000e";
when "01" & x"282" => DATA <= x"103c";
when "01" & x"283" => DATA <= x"0010";
when "01" & x"284" => DATA <= x"6000";
when "01" & x"285" => DATA <= x"0006";
when "01" & x"286" => DATA <= x"163c";
when "01" & x"287" => DATA <= x"0020";
when "01" & x"288" => DATA <= x"6100";
when "01" & x"289" => DATA <= x"0212";
when "01" & x"28a" => DATA <= x"6600";
when "01" & x"28b" => DATA <= x"f798";
when "01" & x"28c" => DATA <= x"11fc";
when "01" & x"28d" => DATA <= x"000e";
when "01" & x"28e" => DATA <= x"0600";
when "01" & x"28f" => DATA <= x"11fc";
when "01" & x"290" => DATA <= x"0010";
when "01" & x"291" => DATA <= x"0601";
when "01" & x"292" => DATA <= x"21c7";
when "01" & x"293" => DATA <= x"0602";
when "01" & x"294" => DATA <= x"21c6";
when "01" & x"295" => DATA <= x"0606";
when "01" & x"296" => DATA <= x"31c5";
when "01" & x"297" => DATA <= x"060a";
when "01" & x"298" => DATA <= x"11c4";
when "01" & x"299" => DATA <= x"060c";
when "01" & x"29a" => DATA <= x"11c3";
when "01" & x"29b" => DATA <= x"060d";
when "01" & x"29c" => DATA <= x"223c";
when "01" & x"29d" => DATA <= x"0000";
when "01" & x"29e" => DATA <= x"0600";
when "01" & x"29f" => DATA <= x"203c";
when "01" & x"2a0" => DATA <= x"0000";
when "01" & x"2a1" => DATA <= x"00fa";
when "01" & x"2a2" => DATA <= x"6100";
when "01" & x"2a3" => DATA <= x"e6a2";
when "01" & x"2a4" => DATA <= x"0c04";
when "01" & x"2a5" => DATA <= x"0006";
when "01" & x"2a6" => DATA <= x"6600";
when "01" & x"2a7" => DATA <= x"000c";
when "01" & x"2a8" => DATA <= x"2a47";
when "01" & x"2a9" => DATA <= x"2c46";
when "01" & x"2aa" => DATA <= x"2405";
when "01" & x"2ab" => DATA <= x"6000";
when "01" & x"2ac" => DATA <= x"014c";
when "01" & x"2ad" => DATA <= x"2a46";
when "01" & x"2ae" => DATA <= x"2c47";
when "01" & x"2af" => DATA <= x"2405";
when "01" & x"2b0" => DATA <= x"6000";
when "01" & x"2b1" => DATA <= x"015c";
when "01" & x"2b2" => DATA <= x"203c";
when "01" & x"2b3" => DATA <= x"003f";
when "01" & x"2b4" => DATA <= x"296d";
when "01" & x"2b5" => DATA <= x"6100";
when "01" & x"2b6" => DATA <= x"e496";
when "01" & x"2b7" => DATA <= x"4e75";
when "01" & x"2b8" => DATA <= x"6100";
when "01" & x"2b9" => DATA <= x"e4a4";
when "01" & x"2ba" => DATA <= x"5880";
when "01" & x"2bb" => DATA <= x"6100";
when "01" & x"2bc" => DATA <= x"e48a";
when "01" & x"2bd" => DATA <= x"0cb8";
when "01" & x"2be" => DATA <= x"0000";
when "01" & x"2bf" => DATA <= x"0000";
when "01" & x"2c0" => DATA <= x"0510";
when "01" & x"2c1" => DATA <= x"6700";
when "01" & x"2c2" => DATA <= x"0022";
when "01" & x"2c3" => DATA <= x"203c";
when "01" & x"2c4" => DATA <= x"003f";
when "01" & x"2c5" => DATA <= x"2c58";
when "01" & x"2c6" => DATA <= x"6100";
when "01" & x"2c7" => DATA <= x"e474";
when "01" & x"2c8" => DATA <= x"2038";
when "01" & x"2c9" => DATA <= x"0510";
when "01" & x"2ca" => DATA <= x"223c";
when "01" & x"2cb" => DATA <= x"0000";
when "01" & x"2cc" => DATA <= x"0600";
when "01" & x"2cd" => DATA <= x"143c";
when "01" & x"2ce" => DATA <= x"00ff";
when "01" & x"2cf" => DATA <= x"6100";
when "01" & x"2d0" => DATA <= x"f14a";
when "01" & x"2d1" => DATA <= x"6100";
when "01" & x"2d2" => DATA <= x"e45e";
when "01" & x"2d3" => DATA <= x"6100";
when "01" & x"2d4" => DATA <= x"e46e";
when "01" & x"2d5" => DATA <= x"2e78";
when "01" & x"2d6" => DATA <= x"0508";
when "01" & x"2d7" => DATA <= x"6000";
when "01" & x"2d8" => DATA <= x"ddb2";
when "01" & x"2d9" => DATA <= x"2f00";
when "01" & x"2da" => DATA <= x"203c";
when "01" & x"2db" => DATA <= x"003f";
when "01" & x"2dc" => DATA <= x"2d1c";
when "01" & x"2dd" => DATA <= x"21fc";
when "01" & x"2de" => DATA <= x"0000";
when "01" & x"2df" => DATA <= x"0000";
when "01" & x"2e0" => DATA <= x"0510";
when "01" & x"2e1" => DATA <= x"6100";
when "01" & x"2e2" => DATA <= x"eb60";
when "01" & x"2e3" => DATA <= x"201f";
when "01" & x"2e4" => DATA <= x"4e75";
when "01" & x"2e5" => DATA <= x"0839";
when "01" & x"2e6" => DATA <= x"0006";
when "01" & x"2e7" => DATA <= x"fffe";
when "01" & x"2e8" => DATA <= x"0000";
when "01" & x"2e9" => DATA <= x"67f6";
when "01" & x"2ea" => DATA <= x"13c0";
when "01" & x"2eb" => DATA <= x"fffe";
when "01" & x"2ec" => DATA <= x"0001";
when "01" & x"2ed" => DATA <= x"4e75";
when "01" & x"2ee" => DATA <= x"4e75";
when "01" & x"2ef" => DATA <= x"2f00";
when "01" & x"2f0" => DATA <= x"203c";
when "01" & x"2f1" => DATA <= x"003f";
when "01" & x"2f2" => DATA <= x"2e3c";
when "01" & x"2f3" => DATA <= x"6100";
when "01" & x"2f4" => DATA <= x"eb3c";
when "01" & x"2f5" => DATA <= x"201f";
when "01" & x"2f6" => DATA <= x"4e75";
when "01" & x"2f7" => DATA <= x"b07c";
when "01" & x"2f8" => DATA <= x"0010";
when "01" & x"2f9" => DATA <= x"6300";
when "01" & x"2fa" => DATA <= x"000e";
when "01" & x"2fb" => DATA <= x"203c";
when "01" & x"2fc" => DATA <= x"003f";
when "01" & x"2fd" => DATA <= x"2e20";
when "01" & x"2fe" => DATA <= x"003c";
when "01" & x"2ff" => DATA <= x"0002";
when "01" & x"300" => DATA <= x"4e75";
when "01" & x"301" => DATA <= x"41f9";
when "01" & x"302" => DATA <= x"003f";
when "01" & x"303" => DATA <= x"3630";
when "01" & x"304" => DATA <= x"e588";
when "01" & x"305" => DATA <= x"d1c0";
when "01" & x"306" => DATA <= x"d1c0";
when "01" & x"307" => DATA <= x"d1c0";
when "01" & x"308" => DATA <= x"2258";
when "01" & x"309" => DATA <= x"b3fc";
when "01" & x"30a" => DATA <= x"0000";
when "01" & x"30b" => DATA <= x"0000";
when "01" & x"30c" => DATA <= x"67dc";
when "01" & x"30d" => DATA <= x"2f04";
when "01" & x"30e" => DATA <= x"2458";
when "01" & x"30f" => DATA <= x"2658";
when "01" & x"310" => DATA <= x"4a81";
when "01" & x"311" => DATA <= x"6600";
when "01" & x"312" => DATA <= x"0008";
when "01" & x"313" => DATA <= x"2211";
when "01" & x"314" => DATA <= x"6000";
when "01" & x"315" => DATA <= x"0008";
when "01" & x"316" => DATA <= x"2811";
when "01" & x"317" => DATA <= x"2281";
when "01" & x"318" => DATA <= x"c941";
when "01" & x"319" => DATA <= x"4a82";
when "01" & x"31a" => DATA <= x"6600";
when "01" & x"31b" => DATA <= x"0008";
when "01" & x"31c" => DATA <= x"2412";
when "01" & x"31d" => DATA <= x"6000";
when "01" & x"31e" => DATA <= x"0008";
when "01" & x"31f" => DATA <= x"2812";
when "01" & x"320" => DATA <= x"2482";
when "01" & x"321" => DATA <= x"c942";
when "01" & x"322" => DATA <= x"4a83";
when "01" & x"323" => DATA <= x"6600";
when "01" & x"324" => DATA <= x"0008";
when "01" & x"325" => DATA <= x"2612";
when "01" & x"326" => DATA <= x"6000";
when "01" & x"327" => DATA <= x"0008";
when "01" & x"328" => DATA <= x"2813";
when "01" & x"329" => DATA <= x"2681";
when "01" & x"32a" => DATA <= x"c941";
when "01" & x"32b" => DATA <= x"281f";
when "01" & x"32c" => DATA <= x"4e75";
when "01" & x"32d" => DATA <= x"6000";
when "01" & x"32e" => DATA <= x"e11e";
when "01" & x"32f" => DATA <= x"6000";
when "01" & x"330" => DATA <= x"e11a";
when "01" & x"331" => DATA <= x"0200";
when "01" & x"332" => DATA <= x"0040";
when "01" & x"333" => DATA <= x"11c0";
when "01" & x"334" => DATA <= x"0535";
when "01" & x"335" => DATA <= x"4e75";
when "01" & x"336" => DATA <= x"21fc";
when "01" & x"337" => DATA <= x"0000";
when "01" & x"338" => DATA <= x"0000";
when "01" & x"339" => DATA <= x"0518";
when "01" & x"33a" => DATA <= x"b2bc";
when "01" & x"33b" => DATA <= x"4142";
when "01" & x"33c" => DATA <= x"4558";
when "01" & x"33d" => DATA <= x"6600";
when "01" & x"33e" => DATA <= x"0018";
when "01" & x"33f" => DATA <= x"21c2";
when "01" & x"340" => DATA <= x"0518";
when "01" & x"341" => DATA <= x"b4b8";
when "01" & x"342" => DATA <= x"051c";
when "01" & x"343" => DATA <= x"6300";
when "01" & x"344" => DATA <= x"000c";
when "01" & x"345" => DATA <= x"203c";
when "01" & x"346" => DATA <= x"003f";
when "01" & x"347" => DATA <= x"2e64";
when "01" & x"348" => DATA <= x"6100";
when "01" & x"349" => DATA <= x"ea92";
when "01" & x"34a" => DATA <= x"2e78";
when "01" & x"34b" => DATA <= x"0508";
when "01" & x"34c" => DATA <= x"6000";
when "01" & x"34d" => DATA <= x"dcc8";
when "01" & x"34e" => DATA <= x"6000";
when "01" & x"34f" => DATA <= x"e0dc";
when "01" & x"350" => DATA <= x"6000";
when "01" & x"351" => DATA <= x"e0d8";
when "01" & x"352" => DATA <= x"21cd";
when "01" & x"353" => DATA <= x"0600";
when "01" & x"354" => DATA <= x"223c";
when "01" & x"355" => DATA <= x"0000";
when "01" & x"356" => DATA <= x"0600";
when "01" & x"357" => DATA <= x"7005";
when "01" & x"358" => DATA <= x"6100";
when "01" & x"359" => DATA <= x"e536";
when "01" & x"35a" => DATA <= x"1cf8";
when "01" & x"35b" => DATA <= x"0605";
when "01" & x"35c" => DATA <= x"51ca";
when "01" & x"35d" => DATA <= x"ffee";
when "01" & x"35e" => DATA <= x"4e75";
when "01" & x"35f" => DATA <= x"21cd";
when "01" & x"360" => DATA <= x"0600";
when "01" & x"361" => DATA <= x"223c";
when "01" & x"362" => DATA <= x"0000";
when "01" & x"363" => DATA <= x"0600";
when "01" & x"364" => DATA <= x"11de";
when "01" & x"365" => DATA <= x"0605";
when "01" & x"366" => DATA <= x"7006";
when "01" & x"367" => DATA <= x"6100";
when "01" & x"368" => DATA <= x"e518";
when "01" & x"369" => DATA <= x"51ca";
when "01" & x"36a" => DATA <= x"ffee";
when "01" & x"36b" => DATA <= x"4e75";
when "01" & x"36c" => DATA <= x"2a7c";
when "01" & x"36d" => DATA <= x"003f";
when "01" & x"36e" => DATA <= x"37e8";
when "01" & x"36f" => DATA <= x"2c7c";
when "01" & x"370" => DATA <= x"ffff";
when "01" & x"371" => DATA <= x"2500";
when "01" & x"372" => DATA <= x"243c";
when "01" & x"373" => DATA <= x"0000";
when "01" & x"374" => DATA <= x"01fb";
when "01" & x"375" => DATA <= x"61d2";
when "01" & x"376" => DATA <= x"2a7c";
when "01" & x"377" => DATA <= x"ffff";
when "01" & x"378" => DATA <= x"0200";
when "01" & x"379" => DATA <= x"2c7c";
when "01" & x"37a" => DATA <= x"0000";
when "01" & x"37b" => DATA <= x"0600";
when "01" & x"37c" => DATA <= x"7402";
when "01" & x"37d" => DATA <= x"61a8";
when "01" & x"37e" => DATA <= x"2a7c";
when "01" & x"37f" => DATA <= x"0000";
when "01" & x"380" => DATA <= x"0600";
when "01" & x"381" => DATA <= x"2c7c";
when "01" & x"382" => DATA <= x"ffff";
when "01" & x"383" => DATA <= x"2503";
when "01" & x"384" => DATA <= x"7402";
when "01" & x"385" => DATA <= x"61b2";
when "01" & x"386" => DATA <= x"31fc";
when "01" & x"387" => DATA <= x"2500";
when "01" & x"388" => DATA <= x"0600";
when "01" & x"389" => DATA <= x"2a7c";
when "01" & x"38a" => DATA <= x"0000";
when "01" & x"38b" => DATA <= x"0600";
when "01" & x"38c" => DATA <= x"2c7c";
when "01" & x"38d" => DATA <= x"ffff";
when "01" & x"38e" => DATA <= x"0200";
when "01" & x"38f" => DATA <= x"7402";
when "01" & x"390" => DATA <= x"619c";
when "01" & x"391" => DATA <= x"4e75";
when "01" & x"392" => DATA <= x"0c1e";
when "01" & x"393" => DATA <= x"0020";
when "01" & x"394" => DATA <= x"67fa";
when "01" & x"395" => DATA <= x"1026";
when "01" & x"396" => DATA <= x"b03c";
when "01" & x"397" => DATA <= x"000d";
when "01" & x"398" => DATA <= x"4e75";
when "01" & x"399" => DATA <= x"c38e";
when "01" & x"39a" => DATA <= x"0c1e";
when "01" & x"39b" => DATA <= x"0020";
when "01" & x"39c" => DATA <= x"67fa";
when "01" & x"39d" => DATA <= x"1026";
when "01" & x"39e" => DATA <= x"c38e";
when "01" & x"39f" => DATA <= x"b03c";
when "01" & x"3a0" => DATA <= x"000d";
when "01" & x"3a1" => DATA <= x"4e75";
when "01" & x"3a2" => DATA <= x"7010";
when "01" & x"3a3" => DATA <= x"220e";
when "01" & x"3a4" => DATA <= x"6100";
when "01" & x"3a5" => DATA <= x"e886";
when "01" & x"3a6" => DATA <= x"6900";
when "01" & x"3a7" => DATA <= x"000c";
when "01" & x"3a8" => DATA <= x"2c41";
when "01" & x"3a9" => DATA <= x"2202";
when "01" & x"3aa" => DATA <= x"023c";
when "01" & x"3ab" => DATA <= x"00fe";
when "01" & x"3ac" => DATA <= x"4e75";
when "01" & x"3ad" => DATA <= x"2c41";
when "01" & x"3ae" => DATA <= x"2202";
when "01" & x"3af" => DATA <= x"003c";
when "01" & x"3b0" => DATA <= x"0001";
when "01" & x"3b1" => DATA <= x"4e75";
when "01" & x"3b2" => DATA <= x"4281";
when "01" & x"3b3" => DATA <= x"101e";
when "01" & x"3b4" => DATA <= x"2f00";
when "01" & x"3b5" => DATA <= x"0c00";
when "01" & x"3b6" => DATA <= x"0030";
when "01" & x"3b7" => DATA <= x"6500";
when "01" & x"3b8" => DATA <= x"002c";
when "01" & x"3b9" => DATA <= x"0c00";
when "01" & x"3ba" => DATA <= x"0039";
when "01" & x"3bb" => DATA <= x"6300";
when "01" & x"3bc" => DATA <= x"0018";
when "01" & x"3bd" => DATA <= x"0200";
when "01" & x"3be" => DATA <= x"00df";
when "01" & x"3bf" => DATA <= x"0c00";
when "01" & x"3c0" => DATA <= x"0041";
when "01" & x"3c1" => DATA <= x"6500";
when "01" & x"3c2" => DATA <= x"0018";
when "01" & x"3c3" => DATA <= x"0c00";
when "01" & x"3c4" => DATA <= x"0046";
when "01" & x"3c5" => DATA <= x"6200";
when "01" & x"3c6" => DATA <= x"0010";
when "01" & x"3c7" => DATA <= x"5f00";
when "01" & x"3c8" => DATA <= x"0200";
when "01" & x"3c9" => DATA <= x"000f";
when "01" & x"3ca" => DATA <= x"e981";
when "01" & x"3cb" => DATA <= x"d200";
when "01" & x"3cc" => DATA <= x"201f";
when "01" & x"3cd" => DATA <= x"60ca";
when "01" & x"3ce" => DATA <= x"201f";
when "01" & x"3cf" => DATA <= x"0c00";
when "01" & x"3d0" => DATA <= x"000d";
when "01" & x"3d1" => DATA <= x"6700";
when "01" & x"3d2" => DATA <= x"0012";
when "01" & x"3d3" => DATA <= x"0c00";
when "01" & x"3d4" => DATA <= x"0020";
when "01" & x"3d5" => DATA <= x"6700";
when "01" & x"3d6" => DATA <= x"000a";
when "01" & x"3d7" => DATA <= x"534e";
when "01" & x"3d8" => DATA <= x"003c";
when "01" & x"3d9" => DATA <= x"0001";
when "01" & x"3da" => DATA <= x"4e75";
when "01" & x"3db" => DATA <= x"534e";
when "01" & x"3dc" => DATA <= x"023c";
when "01" & x"3dd" => DATA <= x"00fe";
when "01" & x"3de" => DATA <= x"4e75";
when "01" & x"3df" => DATA <= x"101e";
when "01" & x"3e0" => DATA <= x"0c00";
when "01" & x"3e1" => DATA <= x"0020";
when "01" & x"3e2" => DATA <= x"6500";
when "01" & x"3e3" => DATA <= x"000a";
when "01" & x"3e4" => DATA <= x"0c00";
when "01" & x"3e5" => DATA <= x"007f";
when "01" & x"3e6" => DATA <= x"6500";
when "01" & x"3e7" => DATA <= x"0006";
when "01" & x"3e8" => DATA <= x"103c";
when "01" & x"3e9" => DATA <= x"002e";
when "01" & x"3ea" => DATA <= x"4e75";
when "01" & x"3eb" => DATA <= x"0280";
when "01" & x"3ec" => DATA <= x"0000";
when "01" & x"3ed" => DATA <= x"0007";
when "01" & x"3ee" => DATA <= x"e140";
when "01" & x"3ef" => DATA <= x"027c";
when "01" & x"3f0" => DATA <= x"f8ff";
when "01" & x"3f1" => DATA <= x"221f";
when "01" & x"3f2" => DATA <= x"4e75";
when "01" & x"3f3" => DATA <= x"0d0a";
when "01" & x"3f4" => DATA <= x"4163";
when "01" & x"3f5" => DATA <= x"6f72";
when "01" & x"3f6" => DATA <= x"6e20";
when "01" & x"3f7" => DATA <= x"3638";
when "01" & x"3f8" => DATA <= x"0020";
when "01" & x"3f9" => DATA <= x"7365";
when "01" & x"3fa" => DATA <= x"636f";
when "01" & x"3fb" => DATA <= x"6e64";
when "01" & x"3fc" => DATA <= x"2070";
when "01" & x"3fd" => DATA <= x"726f";
when "01" & x"3fe" => DATA <= x"6365";
when "01" & x"3ff" => DATA <= x"7373";
when "01" & x"400" => DATA <= x"6f72";
when "01" & x"401" => DATA <= x"2000";
when "01" & x"402" => DATA <= x"3030";
when "01" & x"403" => DATA <= x"3830";
when "01" & x"404" => DATA <= x"3030";
when "01" & x"405" => DATA <= x"3031";
when "01" & x"406" => DATA <= x"3030";
when "01" & x"407" => DATA <= x"3230";
when "01" & x"408" => DATA <= x"3033";
when "01" & x"409" => DATA <= x"3030";
when "01" & x"40a" => DATA <= x"3430";
when "01" & x"40b" => DATA <= x"3036";
when "01" & x"40c" => DATA <= x"3030";
when "01" & x"40d" => DATA <= x"3730";
when "01" & x"40e" => DATA <= x"3330";
when "01" & x"40f" => DATA <= x"304b";
when "01" & x"410" => DATA <= x"070d";
when "01" & x"411" => DATA <= x"0a0d";
when "01" & x"412" => DATA <= x"0a00";
when "01" & x"413" => DATA <= x"1701";
when "01" & x"414" => DATA <= x"0000";
when "01" & x"415" => DATA <= x"0000";
when "01" & x"416" => DATA <= x"0000";
when "01" & x"417" => DATA <= x"0000";
when "01" & x"418" => DATA <= x"0017";
when "01" & x"419" => DATA <= x"0101";
when "01" & x"41a" => DATA <= x"0000";
when "01" & x"41b" => DATA <= x"0000";
when "01" & x"41c" => DATA <= x"0000";
when "01" & x"41d" => DATA <= x"0000";
when "01" & x"41e" => DATA <= x"0a0d";
when "01" & x"41f" => DATA <= x"4369";
when "01" & x"420" => DATA <= x"7363";
when "01" & x"421" => DATA <= x"4f53";
when "01" & x"422" => DATA <= x"2076";
when "01" & x"423" => DATA <= x"322e";
when "01" & x"424" => DATA <= x"3031";
when "01" & x"425" => DATA <= x"2028";
when "01" & x"426" => DATA <= x"4a75";
when "01" & x"427" => DATA <= x"6c79";
when "01" & x"428" => DATA <= x"2033";
when "01" & x"429" => DATA <= x"312c";
when "01" & x"42a" => DATA <= x"2032";
when "01" & x"42b" => DATA <= x"3031";
when "01" & x"42c" => DATA <= x"3529";
when "01" & x"42d" => DATA <= x"0a0d";
when "01" & x"42e" => DATA <= x"0020";
when "01" & x"42f" => DATA <= x"2020";
when "01" & x"430" => DATA <= x"5357";
when "01" & x"431" => DATA <= x"490a";
when "01" & x"432" => DATA <= x"0d20";
when "01" & x"433" => DATA <= x"2020";
when "01" & x"434" => DATA <= x"5455";
when "01" & x"435" => DATA <= x"4245";
when "01" & x"436" => DATA <= x"0a0d";
when "01" & x"437" => DATA <= x"0020";
when "01" & x"438" => DATA <= x"2020";
when "01" & x"439" => DATA <= x"4552";
when "01" & x"43a" => DATA <= x"524f";
when "01" & x"43b" => DATA <= x"5220";
when "01" & x"43c" => DATA <= x"286e";
when "01" & x"43d" => DATA <= x"756d";
when "01" & x"43e" => DATA <= x"6265";
when "01" & x"43f" => DATA <= x"7229";
when "01" & x"440" => DATA <= x"203c";
when "01" & x"441" => DATA <= x"6d65";
when "01" & x"442" => DATA <= x"7373";
when "01" & x"443" => DATA <= x"6167";
when "01" & x"444" => DATA <= x"653e";
when "01" & x"445" => DATA <= x"0a0d";
when "01" & x"446" => DATA <= x"2020";
when "01" & x"447" => DATA <= x"2046";
when "01" & x"448" => DATA <= x"4c41";
when "01" & x"449" => DATA <= x"5348";
when "01" & x"44a" => DATA <= x"203c";
when "01" & x"44b" => DATA <= x"6673";
when "01" & x"44c" => DATA <= x"703e";
when "01" & x"44d" => DATA <= x"0a0d";
when "01" & x"44e" => DATA <= x"2020";
when "01" & x"44f" => DATA <= x"2047";
when "01" & x"450" => DATA <= x"4f20";
when "01" & x"451" => DATA <= x"3c61";
when "01" & x"452" => DATA <= x"6464";
when "01" & x"453" => DATA <= x"723e";
when "01" & x"454" => DATA <= x"0a0d";
when "01" & x"455" => DATA <= x"2020";
when "01" & x"456" => DATA <= x"204d";
when "01" & x"457" => DATA <= x"4f4e";
when "01" & x"458" => DATA <= x"0a0d";
when "01" & x"459" => DATA <= x"2020";
when "01" & x"45a" => DATA <= x"2051";
when "01" & x"45b" => DATA <= x"5549";
when "01" & x"45c" => DATA <= x"540a";
when "01" & x"45d" => DATA <= x"0d20";
when "01" & x"45e" => DATA <= x"2020";
when "01" & x"45f" => DATA <= x"545a";
when "01" & x"460" => DATA <= x"4150";
when "01" & x"461" => DATA <= x"2028";
when "01" & x"462" => DATA <= x"6164";
when "01" & x"463" => DATA <= x"6472";
when "01" & x"464" => DATA <= x"290a";
when "01" & x"465" => DATA <= x"0d20";
when "01" & x"466" => DATA <= x"2020";
when "01" & x"467" => DATA <= x"5846";
when "01" & x"468" => DATA <= x"4552";
when "01" & x"469" => DATA <= x"203c";
when "01" & x"46a" => DATA <= x"696f";
when "01" & x"46b" => DATA <= x"2061";
when "01" & x"46c" => DATA <= x"6464";
when "01" & x"46d" => DATA <= x"722e";
when "01" & x"46e" => DATA <= x"3e20";
when "01" & x"46f" => DATA <= x"3c61";
when "01" & x"470" => DATA <= x"6464";
when "01" & x"471" => DATA <= x"723e";
when "01" & x"472" => DATA <= x"203c";
when "01" & x"473" => DATA <= x"6c65";
when "01" & x"474" => DATA <= x"6e67";
when "01" & x"475" => DATA <= x"7468";
when "01" & x"476" => DATA <= x"3e20";
when "01" & x"477" => DATA <= x"2852";
when "01" & x"478" => DATA <= x"7c57";
when "01" & x"479" => DATA <= x"2920";
when "01" & x"47a" => DATA <= x"2853";
when "01" & x"47b" => DATA <= x"7c4d";
when "01" & x"47c" => DATA <= x"290a";
when "01" & x"47d" => DATA <= x"0d00";
when "01" & x"47e" => DATA <= x"5379";
when "01" & x"47f" => DATA <= x"6e74";
when "01" & x"480" => DATA <= x"6178";
when "01" & x"481" => DATA <= x"3a20";
when "01" & x"482" => DATA <= x"4552";
when "01" & x"483" => DATA <= x"524f";
when "01" & x"484" => DATA <= x"5220";
when "01" & x"485" => DATA <= x"286e";
when "01" & x"486" => DATA <= x"756d";
when "01" & x"487" => DATA <= x"6265";
when "01" & x"488" => DATA <= x"7229";
when "01" & x"489" => DATA <= x"203c";
when "01" & x"48a" => DATA <= x"6d65";
when "01" & x"48b" => DATA <= x"7373";
when "01" & x"48c" => DATA <= x"6167";
when "01" & x"48d" => DATA <= x"653e";
when "01" & x"48e" => DATA <= x"0a0d";
when "01" & x"48f" => DATA <= x"0053";
when "01" & x"490" => DATA <= x"796e";
when "01" & x"491" => DATA <= x"7461";
when "01" & x"492" => DATA <= x"783a";
when "01" & x"493" => DATA <= x"2046";
when "01" & x"494" => DATA <= x"4c41";
when "01" & x"495" => DATA <= x"5348";
when "01" & x"496" => DATA <= x"203c";
when "01" & x"497" => DATA <= x"6673";
when "01" & x"498" => DATA <= x"703e";
when "01" & x"499" => DATA <= x"0a0d";
when "01" & x"49a" => DATA <= x"0053";
when "01" & x"49b" => DATA <= x"796e";
when "01" & x"49c" => DATA <= x"7461";
when "01" & x"49d" => DATA <= x"783a";
when "01" & x"49e" => DATA <= x"2047";
when "01" & x"49f" => DATA <= x"4f20";
when "01" & x"4a0" => DATA <= x"3c61";
when "01" & x"4a1" => DATA <= x"6464";
when "01" & x"4a2" => DATA <= x"723e";
when "01" & x"4a3" => DATA <= x"0a0d";
when "01" & x"4a4" => DATA <= x"0053";
when "01" & x"4a5" => DATA <= x"796e";
when "01" & x"4a6" => DATA <= x"7461";
when "01" & x"4a7" => DATA <= x"783a";
when "01" & x"4a8" => DATA <= x"204d";
when "01" & x"4a9" => DATA <= x"4f4e";
when "01" & x"4aa" => DATA <= x"0a0d";
when "01" & x"4ab" => DATA <= x"0053";
when "01" & x"4ac" => DATA <= x"796e";
when "01" & x"4ad" => DATA <= x"7461";
when "01" & x"4ae" => DATA <= x"783a";
when "01" & x"4af" => DATA <= x"2054";
when "01" & x"4b0" => DATA <= x"5a41";
when "01" & x"4b1" => DATA <= x"5020";
when "01" & x"4b2" => DATA <= x"2861";
when "01" & x"4b3" => DATA <= x"6464";
when "01" & x"4b4" => DATA <= x"7229";
when "01" & x"4b5" => DATA <= x"0a0d";
when "01" & x"4b6" => DATA <= x"0053";
when "01" & x"4b7" => DATA <= x"796e";
when "01" & x"4b8" => DATA <= x"7461";
when "01" & x"4b9" => DATA <= x"783a";
when "01" & x"4ba" => DATA <= x"2058";
when "01" & x"4bb" => DATA <= x"4645";
when "01" & x"4bc" => DATA <= x"5220";
when "01" & x"4bd" => DATA <= x"3c69";
when "01" & x"4be" => DATA <= x"6f20";
when "01" & x"4bf" => DATA <= x"6164";
when "01" & x"4c0" => DATA <= x"6472";
when "01" & x"4c1" => DATA <= x"2e3e";
when "01" & x"4c2" => DATA <= x"203c";
when "01" & x"4c3" => DATA <= x"6164";
when "01" & x"4c4" => DATA <= x"6472";
when "01" & x"4c5" => DATA <= x"3e20";
when "01" & x"4c6" => DATA <= x"3c6c";
when "01" & x"4c7" => DATA <= x"656e";
when "01" & x"4c8" => DATA <= x"6774";
when "01" & x"4c9" => DATA <= x"683e";
when "01" & x"4ca" => DATA <= x"2028";
when "01" & x"4cb" => DATA <= x"527c";
when "01" & x"4cc" => DATA <= x"5729";
when "01" & x"4cd" => DATA <= x"2028";
when "01" & x"4ce" => DATA <= x"537c";
when "01" & x"4cf" => DATA <= x"4d29";
when "01" & x"4d0" => DATA <= x"0a0d";
when "01" & x"4d1" => DATA <= x"0043";
when "01" & x"4d2" => DATA <= x"6973";
when "01" & x"4d3" => DATA <= x"634f";
when "01" & x"4d4" => DATA <= x"5320";
when "01" & x"4d5" => DATA <= x"4d6f";
when "01" & x"4d6" => DATA <= x"6e69";
when "01" & x"4d7" => DATA <= x"746f";
when "01" & x"4d8" => DATA <= x"7200";
when "01" & x"4d9" => DATA <= x"4220";
when "01" & x"4da" => DATA <= x"2042";
when "01" & x"4db" => DATA <= x"7974";
when "01" & x"4dc" => DATA <= x"6520";
when "01" & x"4dd" => DATA <= x"7365";
when "01" & x"4de" => DATA <= x"6172";
when "01" & x"4df" => DATA <= x"6368";
when "01" & x"4e0" => DATA <= x"203c";
when "01" & x"4e1" => DATA <= x"7374";
when "01" & x"4e2" => DATA <= x"6172";
when "01" & x"4e3" => DATA <= x"743e";
when "01" & x"4e4" => DATA <= x"203c";
when "01" & x"4e5" => DATA <= x"656e";
when "01" & x"4e6" => DATA <= x"643e";
when "01" & x"4e7" => DATA <= x"203c";
when "01" & x"4e8" => DATA <= x"6279";
when "01" & x"4e9" => DATA <= x"7465";
when "01" & x"4ea" => DATA <= x"3e0a";
when "01" & x"4eb" => DATA <= x"0d44";
when "01" & x"4ec" => DATA <= x"2020";
when "01" & x"4ed" => DATA <= x"4469";
when "01" & x"4ee" => DATA <= x"7361";
when "01" & x"4ef" => DATA <= x"7373";
when "01" & x"4f0" => DATA <= x"656d";
when "01" & x"4f1" => DATA <= x"626c";
when "01" & x"4f2" => DATA <= x"6520";
when "01" & x"4f3" => DATA <= x"3c61";
when "01" & x"4f4" => DATA <= x"6464";
when "01" & x"4f5" => DATA <= x"723e";
when "01" & x"4f6" => DATA <= x"0a0d";
when "01" & x"4f7" => DATA <= x"4520";
when "01" & x"4f8" => DATA <= x"2045";
when "01" & x"4f9" => DATA <= x"6469";
when "01" & x"4fa" => DATA <= x"7420";
when "01" & x"4fb" => DATA <= x"6d65";
when "01" & x"4fc" => DATA <= x"6d6f";
when "01" & x"4fd" => DATA <= x"7279";
when "01" & x"4fe" => DATA <= x"203c";
when "01" & x"4ff" => DATA <= x"6164";
when "01" & x"500" => DATA <= x"6472";
when "01" & x"501" => DATA <= x"3e0a";
when "01" & x"502" => DATA <= x"0d46";
when "01" & x"503" => DATA <= x"2020";
when "01" & x"504" => DATA <= x"4669";
when "01" & x"505" => DATA <= x"6c6c";
when "01" & x"506" => DATA <= x"203c";
when "01" & x"507" => DATA <= x"7374";
when "01" & x"508" => DATA <= x"6172";
when "01" & x"509" => DATA <= x"743e";
when "01" & x"50a" => DATA <= x"203c";
when "01" & x"50b" => DATA <= x"656e";
when "01" & x"50c" => DATA <= x"643e";
when "01" & x"50d" => DATA <= x"203c";
when "01" & x"50e" => DATA <= x"6279";
when "01" & x"50f" => DATA <= x"7465";
when "01" & x"510" => DATA <= x"3e0a";
when "01" & x"511" => DATA <= x"0d47";
when "01" & x"512" => DATA <= x"2020";
when "01" & x"513" => DATA <= x"476f";
when "01" & x"514" => DATA <= x"203c";
when "01" & x"515" => DATA <= x"6164";
when "01" & x"516" => DATA <= x"6472";
when "01" & x"517" => DATA <= x"3e0a";
when "01" & x"518" => DATA <= x"0d48";
when "01" & x"519" => DATA <= x"2020";
when "01" & x"51a" => DATA <= x"4865";
when "01" & x"51b" => DATA <= x"7820";
when "01" & x"51c" => DATA <= x"6475";
when "01" & x"51d" => DATA <= x"6d70";
when "01" & x"51e" => DATA <= x"207b";
when "01" & x"51f" => DATA <= x"6164";
when "01" & x"520" => DATA <= x"6472";
when "01" & x"521" => DATA <= x"7d0a";
when "01" & x"522" => DATA <= x"0d4d";
when "01" & x"523" => DATA <= x"2020";
when "01" & x"524" => DATA <= x"4d6f";
when "01" & x"525" => DATA <= x"7665";
when "01" & x"526" => DATA <= x"206d";
when "01" & x"527" => DATA <= x"656d";
when "01" & x"528" => DATA <= x"6f72";
when "01" & x"529" => DATA <= x"7920";
when "01" & x"52a" => DATA <= x"3c73";
when "01" & x"52b" => DATA <= x"6f75";
when "01" & x"52c" => DATA <= x"7263";
when "01" & x"52d" => DATA <= x"653e";
when "01" & x"52e" => DATA <= x"203c";
when "01" & x"52f" => DATA <= x"6465";
when "01" & x"530" => DATA <= x"7374";
when "01" & x"531" => DATA <= x"6e3e";
when "01" & x"532" => DATA <= x"203c";
when "01" & x"533" => DATA <= x"6c65";
when "01" & x"534" => DATA <= x"6e67";
when "01" & x"535" => DATA <= x"7468";
when "01" & x"536" => DATA <= x"3e0a";
when "01" & x"537" => DATA <= x"0d51";
when "01" & x"538" => DATA <= x"2020";
when "01" & x"539" => DATA <= x"5175";
when "01" & x"53a" => DATA <= x"6974";
when "01" & x"53b" => DATA <= x"0a0d";
when "01" & x"53c" => DATA <= x"5220";
when "01" & x"53d" => DATA <= x"2053";
when "01" & x"53e" => DATA <= x"6574";
when "01" & x"53f" => DATA <= x"2072";
when "01" & x"540" => DATA <= x"6567";
when "01" & x"541" => DATA <= x"6973";
when "01" & x"542" => DATA <= x"7465";
when "01" & x"543" => DATA <= x"7220";
when "01" & x"544" => DATA <= x"636f";
when "01" & x"545" => DATA <= x"6e74";
when "01" & x"546" => DATA <= x"656e";
when "01" & x"547" => DATA <= x"7473";
when "01" & x"548" => DATA <= x"203c";
when "01" & x"549" => DATA <= x"7265";
when "01" & x"54a" => DATA <= x"673e";
when "01" & x"54b" => DATA <= x"203c";
when "01" & x"54c" => DATA <= x"7661";
when "01" & x"54d" => DATA <= x"6c75";
when "01" & x"54e" => DATA <= x"653e";
when "01" & x"54f" => DATA <= x"0a0d";
when "01" & x"550" => DATA <= x"5320";
when "01" & x"551" => DATA <= x"2053";
when "01" & x"552" => DATA <= x"7472";
when "01" & x"553" => DATA <= x"696e";
when "01" & x"554" => DATA <= x"6720";
when "01" & x"555" => DATA <= x"7365";
when "01" & x"556" => DATA <= x"6172";
when "01" & x"557" => DATA <= x"6368";
when "01" & x"558" => DATA <= x"203c";
when "01" & x"559" => DATA <= x"7374";
when "01" & x"55a" => DATA <= x"6172";
when "01" & x"55b" => DATA <= x"743e";
when "01" & x"55c" => DATA <= x"203c";
when "01" & x"55d" => DATA <= x"656e";
when "01" & x"55e" => DATA <= x"643e";
when "01" & x"55f" => DATA <= x"203c";
when "01" & x"560" => DATA <= x"7374";
when "01" & x"561" => DATA <= x"7269";
when "01" & x"562" => DATA <= x"6e67";
when "01" & x"563" => DATA <= x"3e0a";
when "01" & x"564" => DATA <= x"0d54";
when "01" & x"565" => DATA <= x"2020";
when "01" & x"566" => DATA <= x"5472";
when "01" & x"567" => DATA <= x"6163";
when "01" & x"568" => DATA <= x"650a";
when "01" & x"569" => DATA <= x"0d56";
when "01" & x"56a" => DATA <= x"2020";
when "01" & x"56b" => DATA <= x"5669";
when "01" & x"56c" => DATA <= x"6577";
when "01" & x"56d" => DATA <= x"2072";
when "01" & x"56e" => DATA <= x"6567";
when "01" & x"56f" => DATA <= x"6973";
when "01" & x"570" => DATA <= x"7465";
when "01" & x"571" => DATA <= x"7220";
when "01" & x"572" => DATA <= x"636f";
when "01" & x"573" => DATA <= x"6e74";
when "01" & x"574" => DATA <= x"656e";
when "01" & x"575" => DATA <= x"7473";
when "01" & x"576" => DATA <= x"0a0d";
when "01" & x"577" => DATA <= x"2a20";
when "01" & x"578" => DATA <= x"204f";
when "01" & x"579" => DATA <= x"5320";
when "01" & x"57a" => DATA <= x"636f";
when "01" & x"57b" => DATA <= x"6d6d";
when "01" & x"57c" => DATA <= x"616e";
when "01" & x"57d" => DATA <= x"640a";
when "01" & x"57e" => DATA <= x"0d3f";
when "01" & x"57f" => DATA <= x"2020";
when "01" & x"580" => DATA <= x"4865";
when "01" & x"581" => DATA <= x"6c70";
when "01" & x"582" => DATA <= x"0a0d";
when "01" & x"583" => DATA <= x"0055";
when "01" & x"584" => DATA <= x"6e6b";
when "01" & x"585" => DATA <= x"6e6f";
when "01" & x"586" => DATA <= x"776e";
when "01" & x"587" => DATA <= x"2063";
when "01" & x"588" => DATA <= x"6f6d";
when "01" & x"589" => DATA <= x"6d61";
when "01" & x"58a" => DATA <= x"6e64";
when "01" & x"58b" => DATA <= x"2c20";
when "01" & x"58c" => DATA <= x"7573";
when "01" & x"58d" => DATA <= x"6520";
when "01" & x"58e" => DATA <= x"3f20";
when "01" & x"58f" => DATA <= x"666f";
when "01" & x"590" => DATA <= x"7220";
when "01" & x"591" => DATA <= x"6865";
when "01" & x"592" => DATA <= x"6c70";
when "01" & x"593" => DATA <= x"2e0a";
when "01" & x"594" => DATA <= x"0d00";
when "01" & x"595" => DATA <= x"542d";
when "01" & x"596" => DATA <= x"532d";
when "01" & x"597" => DATA <= x"2d49";
when "01" & x"598" => DATA <= x"4e54";
when "01" & x"599" => DATA <= x"2d2d";
when "01" & x"59a" => DATA <= x"2d58";
when "01" & x"59b" => DATA <= x"4e5a";
when "01" & x"59c" => DATA <= x"5643";
when "01" & x"59d" => DATA <= x"0046";
when "01" & x"59e" => DATA <= x"696c";
when "01" & x"59f" => DATA <= x"6520";
when "01" & x"5a0" => DATA <= x"6973";
when "01" & x"5a1" => DATA <= x"206e";
when "01" & x"5a2" => DATA <= x"6f74";
when "01" & x"5a3" => DATA <= x"2061";
when "01" & x"5a4" => DATA <= x"2043";
when "01" & x"5a5" => DATA <= x"6973";
when "01" & x"5a6" => DATA <= x"634f";
when "01" & x"5a7" => DATA <= x"5320";
when "01" & x"5a8" => DATA <= x"6669";
when "01" & x"5a9" => DATA <= x"6c65";
when "01" & x"5aa" => DATA <= x"0a0d";
when "01" & x"5ab" => DATA <= x"004e";
when "01" & x"5ac" => DATA <= x"6f20";
when "01" & x"5ad" => DATA <= x"726f";
when "01" & x"5ae" => DATA <= x"6f6d";
when "01" & x"5af" => DATA <= x"0a0d";
when "01" & x"5b0" => DATA <= x"0057";
when "01" & x"5b1" => DATA <= x"4152";
when "01" & x"5b2" => DATA <= x"4e49";
when "01" & x"5b3" => DATA <= x"4e47";
when "01" & x"5b4" => DATA <= x"2120";
when "01" & x"5b5" => DATA <= x"5448";
when "01" & x"5b6" => DATA <= x"4953";
when "01" & x"5b7" => DATA <= x"2057";
when "01" & x"5b8" => DATA <= x"494c";
when "01" & x"5b9" => DATA <= x"4c20";
when "01" & x"5ba" => DATA <= x"464c";
when "01" & x"5bb" => DATA <= x"4153";
when "01" & x"5bc" => DATA <= x"4820";
when "01" & x"5bd" => DATA <= x"5448";
when "01" & x"5be" => DATA <= x"4520";
when "01" & x"5bf" => DATA <= x"4249";
when "01" & x"5c0" => DATA <= x"4f53";
when "01" & x"5c1" => DATA <= x"0a0d";
when "01" & x"5c2" => DATA <= x"5553";
when "01" & x"5c3" => DATA <= x"4520";
when "01" & x"5c4" => DATA <= x"4154";
when "01" & x"5c5" => DATA <= x"2059";
when "01" & x"5c6" => DATA <= x"4f55";
when "01" & x"5c7" => DATA <= x"5220";
when "01" & x"5c8" => DATA <= x"4f57";
when "01" & x"5c9" => DATA <= x"4e20";
when "01" & x"5ca" => DATA <= x"5249";
when "01" & x"5cb" => DATA <= x"534b";
when "01" & x"5cc" => DATA <= x"210a";
when "01" & x"5cd" => DATA <= x"0d0a";
when "01" & x"5ce" => DATA <= x"0d44";
when "01" & x"5cf" => DATA <= x"6f20";
when "01" & x"5d0" => DATA <= x"796f";
when "01" & x"5d1" => DATA <= x"7520";
when "01" & x"5d2" => DATA <= x"7761";
when "01" & x"5d3" => DATA <= x"6e74";
when "01" & x"5d4" => DATA <= x"2074";
when "01" & x"5d5" => DATA <= x"6f20";
when "01" & x"5d6" => DATA <= x"636f";
when "01" & x"5d7" => DATA <= x"6e74";
when "01" & x"5d8" => DATA <= x"696e";
when "01" & x"5d9" => DATA <= x"7565";
when "01" & x"5da" => DATA <= x"3f20";
when "01" & x"5db" => DATA <= x"2859";
when "01" & x"5dc" => DATA <= x"2f4e";
when "01" & x"5dd" => DATA <= x"2920";
when "01" & x"5de" => DATA <= x"3a20";
when "01" & x"5df" => DATA <= x"0046";
when "01" & x"5e0" => DATA <= x"6c61";
when "01" & x"5e1" => DATA <= x"7368";
when "01" & x"5e2" => DATA <= x"2052";
when "01" & x"5e3" => DATA <= x"4f4d";
when "01" & x"5e4" => DATA <= x"2049";
when "01" & x"5e5" => DATA <= x"443d";
when "01" & x"5e6" => DATA <= x"2400";
when "01" & x"5e7" => DATA <= x"0a0d";
when "01" & x"5e8" => DATA <= x"466c";
when "01" & x"5e9" => DATA <= x"6173";
when "01" & x"5ea" => DATA <= x"6869";
when "01" & x"5eb" => DATA <= x"6e67";
when "01" & x"5ec" => DATA <= x"2073";
when "01" & x"5ed" => DATA <= x"6563";
when "01" & x"5ee" => DATA <= x"746f";
when "01" & x"5ef" => DATA <= x"7220";
when "01" & x"5f0" => DATA <= x"0a0d";
when "01" & x"5f1" => DATA <= x"0046";
when "01" & x"5f2" => DATA <= x"6c61";
when "01" & x"5f3" => DATA <= x"7368";
when "01" & x"5f4" => DATA <= x"2063";
when "01" & x"5f5" => DATA <= x"6f6d";
when "01" & x"5f6" => DATA <= x"706c";
when "01" & x"5f7" => DATA <= x"6574";
when "01" & x"5f8" => DATA <= x"6564";
when "01" & x"5f9" => DATA <= x"2073";
when "01" & x"5fa" => DATA <= x"7563";
when "01" & x"5fb" => DATA <= x"6365";
when "01" & x"5fc" => DATA <= x"7373";
when "01" & x"5fd" => DATA <= x"6675";
when "01" & x"5fe" => DATA <= x"6c6c";
when "01" & x"5ff" => DATA <= x"790a";
when "01" & x"600" => DATA <= x"0d00";
when "01" & x"601" => DATA <= x"466c";
when "01" & x"602" => DATA <= x"6173";
when "01" & x"603" => DATA <= x"6820";
when "01" & x"604" => DATA <= x"6572";
when "01" & x"605" => DATA <= x"726f";
when "01" & x"606" => DATA <= x"7220";
when "01" & x"607" => DATA <= x"6174";
when "01" & x"608" => DATA <= x"2000";
when "01" & x"609" => DATA <= x"4d6f";
when "01" & x"60a" => DATA <= x"6e54";
when "01" & x"60b" => DATA <= x"7565";
when "01" & x"60c" => DATA <= x"5765";
when "01" & x"60d" => DATA <= x"6454";
when "01" & x"60e" => DATA <= x"6875";
when "01" & x"60f" => DATA <= x"4672";
when "01" & x"610" => DATA <= x"6953";
when "01" & x"611" => DATA <= x"6174";
when "01" & x"612" => DATA <= x"5375";
when "01" & x"613" => DATA <= x"6e00";
when "01" & x"614" => DATA <= x"4a61";
when "01" & x"615" => DATA <= x"6e46";
when "01" & x"616" => DATA <= x"6562";
when "01" & x"617" => DATA <= x"4d61";
when "01" & x"618" => DATA <= x"7241";
when "01" & x"619" => DATA <= x"7072";
when "01" & x"61a" => DATA <= x"4d61";
when "01" & x"61b" => DATA <= x"794a";
when "01" & x"61c" => DATA <= x"756e";
when "01" & x"61d" => DATA <= x"4a75";
when "01" & x"61e" => DATA <= x"6c41";
when "01" & x"61f" => DATA <= x"7567";
when "01" & x"620" => DATA <= x"5365";
when "01" & x"621" => DATA <= x"704f";
when "01" & x"622" => DATA <= x"6374";
when "01" & x"623" => DATA <= x"4e6f";
when "01" & x"624" => DATA <= x"7644";
when "01" & x"625" => DATA <= x"6563";
when "01" & x"626" => DATA <= x"000a";
when "01" & x"627" => DATA <= x"0d42";
when "01" & x"628" => DATA <= x"7573";
when "01" & x"629" => DATA <= x"2065";
when "01" & x"62a" => DATA <= x"7272";
when "01" & x"62b" => DATA <= x"6f72";
when "01" & x"62c" => DATA <= x"2061";
when "01" & x"62d" => DATA <= x"7420";
when "01" & x"62e" => DATA <= x"2400";
when "01" & x"62f" => DATA <= x"0a0d";
when "01" & x"630" => DATA <= x"4164";
when "01" & x"631" => DATA <= x"6472";
when "01" & x"632" => DATA <= x"6573";
when "01" & x"633" => DATA <= x"7320";
when "01" & x"634" => DATA <= x"6572";
when "01" & x"635" => DATA <= x"726f";
when "01" & x"636" => DATA <= x"7220";
when "01" & x"637" => DATA <= x"6578";
when "01" & x"638" => DATA <= x"6365";
when "01" & x"639" => DATA <= x"7074";
when "01" & x"63a" => DATA <= x"696f";
when "01" & x"63b" => DATA <= x"6e20";
when "01" & x"63c" => DATA <= x"6174";
when "01" & x"63d" => DATA <= x"2024";
when "01" & x"63e" => DATA <= x"0020";
when "01" & x"63f" => DATA <= x"4163";
when "01" & x"640" => DATA <= x"6365";
when "01" & x"641" => DATA <= x"7373";
when "01" & x"642" => DATA <= x"2074";
when "01" & x"643" => DATA <= x"7970";
when "01" & x"644" => DATA <= x"6526";
when "01" & x"645" => DATA <= x"6675";
when "01" & x"646" => DATA <= x"6e63";
when "01" & x"647" => DATA <= x"7469";
when "01" & x"648" => DATA <= x"6f6e";
when "01" & x"649" => DATA <= x"3a00";
when "01" & x"64a" => DATA <= x"2041";
when "01" & x"64b" => DATA <= x"6363";
when "01" & x"64c" => DATA <= x"6573";
when "01" & x"64d" => DATA <= x"7320";
when "01" & x"64e" => DATA <= x"6164";
when "01" & x"64f" => DATA <= x"6472";
when "01" & x"650" => DATA <= x"6573";
when "01" & x"651" => DATA <= x"7320";
when "01" & x"652" => DATA <= x"2020";
when "01" & x"653" => DATA <= x"2020";
when "01" & x"654" => DATA <= x"203a";
when "01" & x"655" => DATA <= x"0020";
when "01" & x"656" => DATA <= x"496e";
when "01" & x"657" => DATA <= x"7374";
when "01" & x"658" => DATA <= x"7275";
when "01" & x"659" => DATA <= x"6374";
when "01" & x"65a" => DATA <= x"696f";
when "01" & x"65b" => DATA <= x"6e20";
when "01" & x"65c" => DATA <= x"7265";
when "01" & x"65d" => DATA <= x"6769";
when "01" & x"65e" => DATA <= x"7374";
when "01" & x"65f" => DATA <= x"6572";
when "01" & x"660" => DATA <= x"3a00";
when "01" & x"661" => DATA <= x"2053";
when "01" & x"662" => DATA <= x"7461";
when "01" & x"663" => DATA <= x"7475";
when "01" & x"664" => DATA <= x"7320";
when "01" & x"665" => DATA <= x"7265";
when "01" & x"666" => DATA <= x"6769";
when "01" & x"667" => DATA <= x"7374";
when "01" & x"668" => DATA <= x"6572";
when "01" & x"669" => DATA <= x"2020";
when "01" & x"66a" => DATA <= x"2020";
when "01" & x"66b" => DATA <= x"203a";
when "01" & x"66c" => DATA <= x"5452";
when "01" & x"66d" => DATA <= x"534d";
when "01" & x"66e" => DATA <= x"2d49";
when "01" & x"66f" => DATA <= x"4e54";
when "01" & x"670" => DATA <= x"2d2d";
when "01" & x"671" => DATA <= x"2d58";
when "01" & x"672" => DATA <= x"4e5a";
when "01" & x"673" => DATA <= x"5643";
when "01" & x"674" => DATA <= x"0a0d";
when "01" & x"675" => DATA <= x"2020";
when "01" & x"676" => DATA <= x"2020";
when "01" & x"677" => DATA <= x"2020";
when "01" & x"678" => DATA <= x"2020";
when "01" & x"679" => DATA <= x"2020";
when "01" & x"67a" => DATA <= x"2020";
when "01" & x"67b" => DATA <= x"2020";
when "01" & x"67c" => DATA <= x"2020";
when "01" & x"67d" => DATA <= x"2020";
when "01" & x"67e" => DATA <= x"2020";
when "01" & x"67f" => DATA <= x"2020";
when "01" & x"680" => DATA <= x"0000";
when "01" & x"681" => DATA <= x"0000";
when "01" & x"682" => DATA <= x"8000";
when "01" & x"683" => DATA <= x"0100";
when "01" & x"684" => DATA <= x"496c";
when "01" & x"685" => DATA <= x"6c65";
when "01" & x"686" => DATA <= x"6761";
when "01" & x"687" => DATA <= x"6c20";
when "01" & x"688" => DATA <= x"696e";
when "01" & x"689" => DATA <= x"7374";
when "01" & x"68a" => DATA <= x"7275";
when "01" & x"68b" => DATA <= x"6374";
when "01" & x"68c" => DATA <= x"696f";
when "01" & x"68d" => DATA <= x"6e00";
when "01" & x"68e" => DATA <= x"8000";
when "01" & x"68f" => DATA <= x"0104";
when "01" & x"690" => DATA <= x"556e";
when "01" & x"691" => DATA <= x"6b6e";
when "01" & x"692" => DATA <= x"6f77";
when "01" & x"693" => DATA <= x"6e20";
when "01" & x"694" => DATA <= x"4952";
when "01" & x"695" => DATA <= x"5120";
when "01" & x"696" => DATA <= x"6174";
when "01" & x"697" => DATA <= x"2026";
when "01" & x"698" => DATA <= x"0000";
when "01" & x"699" => DATA <= x"0000";
when "01" & x"69a" => DATA <= x"8000";
when "01" & x"69b" => DATA <= x"0169";
when "01" & x"69c" => DATA <= x"496e";
when "01" & x"69d" => DATA <= x"7465";
when "01" & x"69e" => DATA <= x"6765";
when "01" & x"69f" => DATA <= x"7220";
when "01" & x"6a0" => DATA <= x"6469";
when "01" & x"6a1" => DATA <= x"7669";
when "01" & x"6a2" => DATA <= x"6465";
when "01" & x"6a3" => DATA <= x"2062";
when "01" & x"6a4" => DATA <= x"7920";
when "01" & x"6a5" => DATA <= x"7a65";
when "01" & x"6a6" => DATA <= x"726f";
when "01" & x"6a7" => DATA <= x"0000";
when "01" & x"6a8" => DATA <= x"8000";
when "01" & x"6a9" => DATA <= x"0008";
when "01" & x"6aa" => DATA <= x"5072";
when "01" & x"6ab" => DATA <= x"6976";
when "01" & x"6ac" => DATA <= x"696c";
when "01" & x"6ad" => DATA <= x"6567";
when "01" & x"6ae" => DATA <= x"6520";
when "01" & x"6af" => DATA <= x"7669";
when "01" & x"6b0" => DATA <= x"6f6c";
when "01" & x"6b1" => DATA <= x"6174";
when "01" & x"6b2" => DATA <= x"696f";
when "01" & x"6b3" => DATA <= x"6e00";
when "01" & x"6b4" => DATA <= x"0000";
when "01" & x"6b5" => DATA <= x"0001";
when "01" & x"6b6" => DATA <= x"4f75";
when "01" & x"6b7" => DATA <= x"7420";
when "01" & x"6b8" => DATA <= x"6f66";
when "01" & x"6b9" => DATA <= x"2072";
when "01" & x"6ba" => DATA <= x"616e";
when "01" & x"6bb" => DATA <= x"6765";
when "01" & x"6bc" => DATA <= x"0000";
when "01" & x"6bd" => DATA <= x"0000";
when "01" & x"6be" => DATA <= x"0000";
when "01" & x"6bf" => DATA <= x"0011";
when "01" & x"6c0" => DATA <= x"4573";
when "01" & x"6c1" => DATA <= x"6361";
when "01" & x"6c2" => DATA <= x"7065";
when "01" & x"6c3" => DATA <= x"0000";
when "01" & x"6c4" => DATA <= x"0000";
when "01" & x"6c5" => DATA <= x"00ff";
when "01" & x"6c6" => DATA <= x"5468";
when "01" & x"6c7" => DATA <= x"6973";
when "01" & x"6c8" => DATA <= x"2069";
when "01" & x"6c9" => DATA <= x"7320";
when "01" & x"6ca" => DATA <= x"6e6f";
when "01" & x"6cb" => DATA <= x"7420";
when "01" & x"6cc" => DATA <= x"6120";
when "01" & x"6cd" => DATA <= x"6c61";
when "01" & x"6ce" => DATA <= x"6e67";
when "01" & x"6cf" => DATA <= x"7561";
when "01" & x"6d0" => DATA <= x"6765";
when "01" & x"6d1" => DATA <= x"0000";
when "01" & x"6d2" => DATA <= x"0000";
when "01" & x"6d3" => DATA <= x"00ff";
when "01" & x"6d4" => DATA <= x"4920";
when "01" & x"6d5" => DATA <= x"6361";
when "01" & x"6d6" => DATA <= x"6e6e";
when "01" & x"6d7" => DATA <= x"6f74";
when "01" & x"6d8" => DATA <= x"2072";
when "01" & x"6d9" => DATA <= x"756e";
when "01" & x"6da" => DATA <= x"2074";
when "01" & x"6db" => DATA <= x"6869";
when "01" & x"6dc" => DATA <= x"7320";
when "01" & x"6dd" => DATA <= x"636f";
when "01" & x"6de" => DATA <= x"6465";
when "01" & x"6df" => DATA <= x"0000";
when "01" & x"6e0" => DATA <= x"0000";
when "01" & x"6e1" => DATA <= x"00ff";
when "01" & x"6e2" => DATA <= x"556e";
when "01" & x"6e3" => DATA <= x"6b6e";
when "01" & x"6e4" => DATA <= x"6f77";
when "01" & x"6e5" => DATA <= x"6e20";
when "01" & x"6e6" => DATA <= x"6578";
when "01" & x"6e7" => DATA <= x"6365";
when "01" & x"6e8" => DATA <= x"7074";
when "01" & x"6e9" => DATA <= x"696f";
when "01" & x"6ea" => DATA <= x"6e00";
when "01" & x"6eb" => DATA <= x"0000";
when "01" & x"6ec" => DATA <= x"0000";
when "01" & x"6ed" => DATA <= x"00ff";
when "01" & x"6ee" => DATA <= x"4e6f";
when "01" & x"6ef" => DATA <= x"7420";
when "01" & x"6f0" => DATA <= x"7375";
when "01" & x"6f1" => DATA <= x"7070";
when "01" & x"6f2" => DATA <= x"6f72";
when "01" & x"6f3" => DATA <= x"7465";
when "01" & x"6f4" => DATA <= x"6400";
when "01" & x"6f5" => DATA <= x"0000";
when "01" & x"6f6" => DATA <= x"0000";
when "01" & x"6f7" => DATA <= x"016a";
when "01" & x"6f8" => DATA <= x"4261";
when "01" & x"6f9" => DATA <= x"6420";
when "01" & x"6fa" => DATA <= x"6261";
when "01" & x"6fb" => DATA <= x"7365";
when "01" & x"6fc" => DATA <= x"0000";
when "01" & x"6fd" => DATA <= x"0000";
when "01" & x"6fe" => DATA <= x"0000";
when "01" & x"6ff" => DATA <= x"016b";
when "01" & x"700" => DATA <= x"4261";
when "01" & x"701" => DATA <= x"6420";
when "01" & x"702" => DATA <= x"6e75";
when "01" & x"703" => DATA <= x"6d62";
when "01" & x"704" => DATA <= x"6572";
when "01" & x"705" => DATA <= x"0000";
when "01" & x"706" => DATA <= x"0000";
when "01" & x"707" => DATA <= x"016c";
when "01" & x"708" => DATA <= x"4e75";
when "01" & x"709" => DATA <= x"6d62";
when "01" & x"70a" => DATA <= x"6572";
when "01" & x"70b" => DATA <= x"2074";
when "01" & x"70c" => DATA <= x"6f6f";
when "01" & x"70d" => DATA <= x"2062";
when "01" & x"70e" => DATA <= x"6967";
when "01" & x"70f" => DATA <= x"0000";
when "01" & x"710" => DATA <= x"0000";
when "01" & x"711" => DATA <= x"01b0";
when "01" & x"712" => DATA <= x"4261";
when "01" & x"713" => DATA <= x"6420";
when "01" & x"714" => DATA <= x"656e";
when "01" & x"715" => DATA <= x"7669";
when "01" & x"716" => DATA <= x"726f";
when "01" & x"717" => DATA <= x"6e6d";
when "01" & x"718" => DATA <= x"656e";
when "01" & x"719" => DATA <= x"7420";
when "01" & x"71a" => DATA <= x"6e75";
when "01" & x"71b" => DATA <= x"6d62";
when "01" & x"71c" => DATA <= x"6572";
when "01" & x"71d" => DATA <= x"0000";
when "01" & x"71e" => DATA <= x"0000";
when "01" & x"71f" => DATA <= x"01e6";
when "01" & x"720" => DATA <= x"4e6f";
when "01" & x"721" => DATA <= x"2073";
when "01" & x"722" => DATA <= x"7563";
when "01" & x"723" => DATA <= x"6820";
when "01" & x"724" => DATA <= x"5357";
when "01" & x"725" => DATA <= x"4900";
when "01" & x"726" => DATA <= x"0000";
when "01" & x"727" => DATA <= x"01a0";
when "01" & x"728" => DATA <= x"4261";
when "01" & x"729" => DATA <= x"6420";
when "01" & x"72a" => DATA <= x"7665";
when "01" & x"72b" => DATA <= x"6374";
when "01" & x"72c" => DATA <= x"6f72";
when "01" & x"72d" => DATA <= x"206e";
when "01" & x"72e" => DATA <= x"756d";
when "01" & x"72f" => DATA <= x"6265";
when "01" & x"730" => DATA <= x"7200";
when "01" & x"731" => DATA <= x"0000";
when "01" & x"732" => DATA <= x"0000";
when "01" & x"733" => DATA <= x"01e2";
when "01" & x"734" => DATA <= x"5265";
when "01" & x"735" => DATA <= x"7475";
when "01" & x"736" => DATA <= x"726e";
when "01" & x"737" => DATA <= x"2063";
when "01" & x"738" => DATA <= x"6f64";
when "01" & x"739" => DATA <= x"6520";
when "01" & x"73a" => DATA <= x"6c69";
when "01" & x"73b" => DATA <= x"6d69";
when "01" & x"73c" => DATA <= x"7420";
when "01" & x"73d" => DATA <= x"6578";
when "01" & x"73e" => DATA <= x"6365";
when "01" & x"73f" => DATA <= x"6564";
when "01" & x"740" => DATA <= x"6564";
when "01" & x"741" => DATA <= x"0000";
when "01" & x"742" => DATA <= x"0000";
when "01" & x"743" => DATA <= x"01e4";
when "01" & x"744" => DATA <= x"4275";
when "01" & x"745" => DATA <= x"6666";
when "01" & x"746" => DATA <= x"6572";
when "01" & x"747" => DATA <= x"206f";
when "01" & x"748" => DATA <= x"7665";
when "01" & x"749" => DATA <= x"7266";
when "01" & x"74a" => DATA <= x"6c6f";
when "01" & x"74b" => DATA <= x"7700";
when "01" & x"74c" => DATA <= x"0000";
when "01" & x"74d" => DATA <= x"01e6";
when "01" & x"74e" => DATA <= x"5357";
when "01" & x"74f" => DATA <= x"4920";
when "01" & x"750" => DATA <= x"6e61";
when "01" & x"751" => DATA <= x"6d65";
when "01" & x"752" => DATA <= x"206e";
when "01" & x"753" => DATA <= x"6f74";
when "01" & x"754" => DATA <= x"206b";
when "01" & x"755" => DATA <= x"6e6f";
when "01" & x"756" => DATA <= x"776e";
when "01" & x"757" => DATA <= x"0000";
when "01" & x"758" => DATA <= x"0000";
when "01" & x"759" => DATA <= x"02c2";
when "01" & x"75a" => DATA <= x"556e";
when "01" & x"75b" => DATA <= x"6b6e";
when "01" & x"75c" => DATA <= x"6f77";
when "01" & x"75d" => DATA <= x"6e20";
when "01" & x"75e" => DATA <= x"2725";
when "01" & x"75f" => DATA <= x"2720";
when "01" & x"760" => DATA <= x"6669";
when "01" & x"761" => DATA <= x"656c";
when "01" & x"762" => DATA <= x"6400";
when "01" & x"763" => DATA <= x"0000";
when "01" & x"764" => DATA <= x"0000";
when "01" & x"765" => DATA <= x"0306";
when "01" & x"766" => DATA <= x"4261";
when "01" & x"767" => DATA <= x"6420";
when "01" & x"768" => DATA <= x"7374";
when "01" & x"769" => DATA <= x"6174";
when "01" & x"76a" => DATA <= x"696f";
when "01" & x"76b" => DATA <= x"6e20";
when "01" & x"76c" => DATA <= x"6e75";
when "01" & x"76d" => DATA <= x"6d62";
when "01" & x"76e" => DATA <= x"6572";
when "01" & x"76f" => DATA <= x"0000";
when "01" & x"770" => DATA <= x"0000";
when "01" & x"771" => DATA <= x"0307";
when "01" & x"772" => DATA <= x"4261";
when "01" & x"773" => DATA <= x"6420";
when "01" & x"774" => DATA <= x"6e65";
when "01" & x"775" => DATA <= x"7477";
when "01" & x"776" => DATA <= x"6f72";
when "01" & x"777" => DATA <= x"6b20";
when "01" & x"778" => DATA <= x"6e75";
when "01" & x"779" => DATA <= x"6d62";
when "01" & x"77a" => DATA <= x"6572";
when "01" & x"77b" => DATA <= x"0000";
when "01" & x"77c" => DATA <= x"0000";
when "01" & x"77d" => DATA <= x"0401";
when "01" & x"77e" => DATA <= x"4261";
when "01" & x"77f" => DATA <= x"6420";
when "01" & x"780" => DATA <= x"4653";
when "01" & x"781" => DATA <= x"436f";
when "01" & x"782" => DATA <= x"6e74";
when "01" & x"783" => DATA <= x"726f";
when "01" & x"784" => DATA <= x"6c20";
when "01" & x"785" => DATA <= x"6361";
when "01" & x"786" => DATA <= x"6c6c";
when "01" & x"787" => DATA <= x"0000";
when "01" & x"788" => DATA <= x"0000";
when "01" & x"789" => DATA <= x"0807";
when "01" & x"78a" => DATA <= x"556e";
when "01" & x"78b" => DATA <= x"616c";
when "01" & x"78c" => DATA <= x"6967";
when "01" & x"78d" => DATA <= x"6e65";
when "01" & x"78e" => DATA <= x"6420";
when "01" & x"78f" => DATA <= x"6164";
when "01" & x"790" => DATA <= x"6472";
when "01" & x"791" => DATA <= x"6573";
when "01" & x"792" => DATA <= x"7300";
when "01" & x"793" => DATA <= x"0000";
when "01" & x"794" => DATA <= x"0000";
when "01" & x"795" => DATA <= x"0000";
when "01" & x"796" => DATA <= x"0005";
when "01" & x"797" => DATA <= x"0005";
when "01" & x"798" => DATA <= x"0205";
when "01" & x"799" => DATA <= x"080e";
when "01" & x"79a" => DATA <= x"0401";
when "01" & x"79b" => DATA <= x"0105";
when "01" & x"79c" => DATA <= x"0001";
when "01" & x"79d" => DATA <= x"2010";
when "01" & x"79e" => DATA <= x"0d00";
when "01" & x"79f" => DATA <= x"0480";
when "01" & x"7a0" => DATA <= x"0500";
when "01" & x"7a1" => DATA <= x"0500";
when "01" & x"7a2" => DATA <= x"0500";
when "01" & x"7a3" => DATA <= x"0000";
when "01" & x"7a4" => DATA <= x"0509";
when "01" & x"7a5" => DATA <= x"0500";
when "01" & x"7a6" => DATA <= x"0818";
when "01" & x"7a7" => DATA <= x"0001";
when "01" & x"7a8" => DATA <= x"0d80";
when "01" & x"7a9" => DATA <= x"0480";
when "01" & x"7aa" => DATA <= x"0000";
when "01" & x"7ab" => DATA <= x"0000";
when "01" & x"7ac" => DATA <= x"003f";
when "01" & x"7ad" => DATA <= x"09ea";
when "01" & x"7ae" => DATA <= x"4f53";
when "01" & x"7af" => DATA <= x"5f57";
when "01" & x"7b0" => DATA <= x"7269";
when "01" & x"7b1" => DATA <= x"7465";
when "01" & x"7b2" => DATA <= x"4300";
when "01" & x"7b3" => DATA <= x"0000";
when "01" & x"7b4" => DATA <= x"0000";
when "01" & x"7b5" => DATA <= x"0001";
when "01" & x"7b6" => DATA <= x"003f";
when "01" & x"7b7" => DATA <= x"09f0";
when "01" & x"7b8" => DATA <= x"4f53";
when "01" & x"7b9" => DATA <= x"5f57";
when "01" & x"7ba" => DATA <= x"7269";
when "01" & x"7bb" => DATA <= x"7465";
when "01" & x"7bc" => DATA <= x"5300";
when "01" & x"7bd" => DATA <= x"0000";
when "01" & x"7be" => DATA <= x"0000";
when "01" & x"7bf" => DATA <= x"0002";
when "01" & x"7c0" => DATA <= x"003f";
when "01" & x"7c1" => DATA <= x"0a02";
when "01" & x"7c2" => DATA <= x"4f53";
when "01" & x"7c3" => DATA <= x"5f57";
when "01" & x"7c4" => DATA <= x"7269";
when "01" & x"7c5" => DATA <= x"7465";
when "01" & x"7c6" => DATA <= x"3000";
when "01" & x"7c7" => DATA <= x"0000";
when "01" & x"7c8" => DATA <= x"0000";
when "01" & x"7c9" => DATA <= x"0003";
when "01" & x"7ca" => DATA <= x"003f";
when "01" & x"7cb" => DATA <= x"0a16";
when "01" & x"7cc" => DATA <= x"4f53";
when "01" & x"7cd" => DATA <= x"5f4e";
when "01" & x"7ce" => DATA <= x"6577";
when "01" & x"7cf" => DATA <= x"4c69";
when "01" & x"7d0" => DATA <= x"6e65";
when "01" & x"7d1" => DATA <= x"0000";
when "01" & x"7d2" => DATA <= x"0000";
when "01" & x"7d3" => DATA <= x"0004";
when "01" & x"7d4" => DATA <= x"0000";
when "01" & x"7d5" => DATA <= x"0410";
when "01" & x"7d6" => DATA <= x"4f53";
when "01" & x"7d7" => DATA <= x"5f52";
when "01" & x"7d8" => DATA <= x"6561";
when "01" & x"7d9" => DATA <= x"6443";
when "01" & x"7da" => DATA <= x"0000";
when "01" & x"7db" => DATA <= x"0000";
when "01" & x"7dc" => DATA <= x"0000";
when "01" & x"7dd" => DATA <= x"0005";
when "01" & x"7de" => DATA <= x"0000";
when "01" & x"7df" => DATA <= x"0414";
when "01" & x"7e0" => DATA <= x"4f53";
when "01" & x"7e1" => DATA <= x"5f43";
when "01" & x"7e2" => DATA <= x"4c49";
when "01" & x"7e3" => DATA <= x"0000";
when "01" & x"7e4" => DATA <= x"0000";
when "01" & x"7e5" => DATA <= x"0006";
when "01" & x"7e6" => DATA <= x"0000";
when "01" & x"7e7" => DATA <= x"0418";
when "01" & x"7e8" => DATA <= x"4f53";
when "01" & x"7e9" => DATA <= x"5f42";
when "01" & x"7ea" => DATA <= x"7974";
when "01" & x"7eb" => DATA <= x"6500";
when "01" & x"7ec" => DATA <= x"0000";
when "01" & x"7ed" => DATA <= x"0007";
when "01" & x"7ee" => DATA <= x"0000";
when "01" & x"7ef" => DATA <= x"041c";
when "01" & x"7f0" => DATA <= x"4f53";
when "01" & x"7f1" => DATA <= x"5f57";
when "01" & x"7f2" => DATA <= x"6f72";
when "01" & x"7f3" => DATA <= x"6400";
when "01" & x"7f4" => DATA <= x"0000";
when "01" & x"7f5" => DATA <= x"0008";
when "01" & x"7f6" => DATA <= x"0000";
when "01" & x"7f7" => DATA <= x"0420";
when "01" & x"7f8" => DATA <= x"4f53";
when "01" & x"7f9" => DATA <= x"5f46";
when "01" & x"7fa" => DATA <= x"696c";
when "01" & x"7fb" => DATA <= x"6500";
when "01" & x"7fc" => DATA <= x"0000";
when "01" & x"7fd" => DATA <= x"0009";
when "01" & x"7fe" => DATA <= x"0000";
when "01" & x"7ff" => DATA <= x"0424";
when "01" & x"800" => DATA <= x"4f53";
when "01" & x"801" => DATA <= x"5f41";
when "01" & x"802" => DATA <= x"7267";
when "01" & x"803" => DATA <= x"7300";
when "01" & x"804" => DATA <= x"0000";
when "01" & x"805" => DATA <= x"000a";
when "01" & x"806" => DATA <= x"0000";
when "01" & x"807" => DATA <= x"0428";
when "01" & x"808" => DATA <= x"4f53";
when "01" & x"809" => DATA <= x"5f42";
when "01" & x"80a" => DATA <= x"4765";
when "01" & x"80b" => DATA <= x"7400";
when "01" & x"80c" => DATA <= x"0000";
when "01" & x"80d" => DATA <= x"000b";
when "01" & x"80e" => DATA <= x"0000";
when "01" & x"80f" => DATA <= x"042c";
when "01" & x"810" => DATA <= x"4f53";
when "01" & x"811" => DATA <= x"5f42";
when "01" & x"812" => DATA <= x"5075";
when "01" & x"813" => DATA <= x"7400";
when "01" & x"814" => DATA <= x"0000";
when "01" & x"815" => DATA <= x"000c";
when "01" & x"816" => DATA <= x"0000";
when "01" & x"817" => DATA <= x"0430";
when "01" & x"818" => DATA <= x"4f53";
when "01" & x"819" => DATA <= x"5f47";
when "01" & x"81a" => DATA <= x"4250";
when "01" & x"81b" => DATA <= x"4200";
when "01" & x"81c" => DATA <= x"0000";
when "01" & x"81d" => DATA <= x"000d";
when "01" & x"81e" => DATA <= x"0000";
when "01" & x"81f" => DATA <= x"0434";
when "01" & x"820" => DATA <= x"4f53";
when "01" & x"821" => DATA <= x"5f46";
when "01" & x"822" => DATA <= x"696e";
when "01" & x"823" => DATA <= x"6400";
when "01" & x"824" => DATA <= x"0000";
when "01" & x"825" => DATA <= x"000e";
when "01" & x"826" => DATA <= x"0000";
when "01" & x"827" => DATA <= x"0438";
when "01" & x"828" => DATA <= x"4f53";
when "01" & x"829" => DATA <= x"5f52";
when "01" & x"82a" => DATA <= x"6561";
when "01" & x"82b" => DATA <= x"644c";
when "01" & x"82c" => DATA <= x"696e";
when "01" & x"82d" => DATA <= x"6500";
when "01" & x"82e" => DATA <= x"0000";
when "01" & x"82f" => DATA <= x"000f";
when "01" & x"830" => DATA <= x"003f";
when "01" & x"831" => DATA <= x"0dfc";
when "01" & x"832" => DATA <= x"4f53";
when "01" & x"833" => DATA <= x"5f43";
when "01" & x"834" => DATA <= x"6f6e";
when "01" & x"835" => DATA <= x"7472";
when "01" & x"836" => DATA <= x"6f6c";
when "01" & x"837" => DATA <= x"0000";
when "01" & x"838" => DATA <= x"0000";
when "01" & x"839" => DATA <= x"0010";
when "01" & x"83a" => DATA <= x"003f";
when "01" & x"83b" => DATA <= x"0e34";
when "01" & x"83c" => DATA <= x"4f53";
when "01" & x"83d" => DATA <= x"5f47";
when "01" & x"83e" => DATA <= x"6574";
when "01" & x"83f" => DATA <= x"456e";
when "01" & x"840" => DATA <= x"7600";
when "01" & x"841" => DATA <= x"0000";
when "01" & x"842" => DATA <= x"0000";
when "01" & x"843" => DATA <= x"0011";
when "01" & x"844" => DATA <= x"003f";
when "01" & x"845" => DATA <= x"0e48";
when "01" & x"846" => DATA <= x"4f53";
when "01" & x"847" => DATA <= x"5f45";
when "01" & x"848" => DATA <= x"7869";
when "01" & x"849" => DATA <= x"7400";
when "01" & x"84a" => DATA <= x"0000";
when "01" & x"84b" => DATA <= x"0012";
when "01" & x"84c" => DATA <= x"003f";
when "01" & x"84d" => DATA <= x"0e4e";
when "01" & x"84e" => DATA <= x"4f53";
when "01" & x"84f" => DATA <= x"5f53";
when "01" & x"850" => DATA <= x"6574";
when "01" & x"851" => DATA <= x"456e";
when "01" & x"852" => DATA <= x"7600";
when "01" & x"853" => DATA <= x"0000";
when "01" & x"854" => DATA <= x"0000";
when "01" & x"855" => DATA <= x"0013";
when "01" & x"856" => DATA <= x"003f";
when "01" & x"857" => DATA <= x"0e9e";
when "01" & x"858" => DATA <= x"4f53";
when "01" & x"859" => DATA <= x"5f49";
when "01" & x"85a" => DATA <= x"6e74";
when "01" & x"85b" => DATA <= x"4f6e";
when "01" & x"85c" => DATA <= x"0000";
when "01" & x"85d" => DATA <= x"0000";
when "01" & x"85e" => DATA <= x"0000";
when "01" & x"85f" => DATA <= x"0014";
when "01" & x"860" => DATA <= x"003f";
when "01" & x"861" => DATA <= x"0ea4";
when "01" & x"862" => DATA <= x"4f53";
when "01" & x"863" => DATA <= x"5f49";
when "01" & x"864" => DATA <= x"6e74";
when "01" & x"865" => DATA <= x"4f66";
when "01" & x"866" => DATA <= x"6600";
when "01" & x"867" => DATA <= x"0000";
when "01" & x"868" => DATA <= x"0000";
when "01" & x"869" => DATA <= x"0015";
when "01" & x"86a" => DATA <= x"003f";
when "01" & x"86b" => DATA <= x"0eaa";
when "01" & x"86c" => DATA <= x"4f53";
when "01" & x"86d" => DATA <= x"5f43";
when "01" & x"86e" => DATA <= x"616c";
when "01" & x"86f" => DATA <= x"6c42";
when "01" & x"870" => DATA <= x"6163";
when "01" & x"871" => DATA <= x"6b00";
when "01" & x"872" => DATA <= x"0000";
when "01" & x"873" => DATA <= x"0016";
when "01" & x"874" => DATA <= x"003f";
when "01" & x"875" => DATA <= x"0eca";
when "01" & x"876" => DATA <= x"4f53";
when "01" & x"877" => DATA <= x"5f45";
when "01" & x"878" => DATA <= x"6e74";
when "01" & x"879" => DATA <= x"6572";
when "01" & x"87a" => DATA <= x"4f53";
when "01" & x"87b" => DATA <= x"0000";
when "01" & x"87c" => DATA <= x"0000";
when "01" & x"87d" => DATA <= x"0018";
when "01" & x"87e" => DATA <= x"003f";
when "01" & x"87f" => DATA <= x"0ed0";
when "01" & x"880" => DATA <= x"4f53";
when "01" & x"881" => DATA <= x"5f42";
when "01" & x"882" => DATA <= x"7265";
when "01" & x"883" => DATA <= x"616b";
when "01" & x"884" => DATA <= x"4374";
when "01" & x"885" => DATA <= x"726c";
when "01" & x"886" => DATA <= x"0000";
when "01" & x"887" => DATA <= x"0000";
when "01" & x"888" => DATA <= x"0000";
when "01" & x"889" => DATA <= x"0019";
when "01" & x"88a" => DATA <= x"003f";
when "01" & x"88b" => DATA <= x"0ef0";
when "01" & x"88c" => DATA <= x"4f53";
when "01" & x"88d" => DATA <= x"5f55";
when "01" & x"88e" => DATA <= x"6e75";
when "01" & x"88f" => DATA <= x"7365";
when "01" & x"890" => DATA <= x"6453";
when "01" & x"891" => DATA <= x"5749";
when "01" & x"892" => DATA <= x"0000";
when "01" & x"893" => DATA <= x"0000";
when "01" & x"894" => DATA <= x"0000";
when "01" & x"895" => DATA <= x"001c";
when "01" & x"896" => DATA <= x"0000";
when "01" & x"897" => DATA <= x"0468";
when "01" & x"898" => DATA <= x"4f53";
when "01" & x"899" => DATA <= x"5f4d";
when "01" & x"89a" => DATA <= x"6f75";
when "01" & x"89b" => DATA <= x"7365";
when "01" & x"89c" => DATA <= x"0000";
when "01" & x"89d" => DATA <= x"0000";
when "01" & x"89e" => DATA <= x"0000";
when "01" & x"89f" => DATA <= x"0021";
when "01" & x"8a0" => DATA <= x"003f";
when "01" & x"8a1" => DATA <= x"0fd0";
when "01" & x"8a2" => DATA <= x"4f53";
when "01" & x"8a3" => DATA <= x"5f52";
when "01" & x"8a4" => DATA <= x"6561";
when "01" & x"8a5" => DATA <= x"6455";
when "01" & x"8a6" => DATA <= x"6e73";
when "01" & x"8a7" => DATA <= x"6967";
when "01" & x"8a8" => DATA <= x"6e65";
when "01" & x"8a9" => DATA <= x"6400";
when "01" & x"8aa" => DATA <= x"0000";
when "01" & x"8ab" => DATA <= x"0028";
when "01" & x"8ac" => DATA <= x"003f";
when "01" & x"8ad" => DATA <= x"10ca";
when "01" & x"8ae" => DATA <= x"4f53";
when "01" & x"8af" => DATA <= x"5f42";
when "01" & x"8b0" => DATA <= x"696e";
when "01" & x"8b1" => DATA <= x"6172";
when "01" & x"8b2" => DATA <= x"7954";
when "01" & x"8b3" => DATA <= x"6f44";
when "01" & x"8b4" => DATA <= x"6563";
when "01" & x"8b5" => DATA <= x"696d";
when "01" & x"8b6" => DATA <= x"616c";
when "01" & x"8b7" => DATA <= x"0000";
when "01" & x"8b8" => DATA <= x"0000";
when "01" & x"8b9" => DATA <= x"0029";
when "01" & x"8ba" => DATA <= x"0000";
when "01" & x"8bb" => DATA <= x"043c";
when "01" & x"8bc" => DATA <= x"4f53";
when "01" & x"8bd" => DATA <= x"5f46";
when "01" & x"8be" => DATA <= x"5343";
when "01" & x"8bf" => DATA <= x"6f6e";
when "01" & x"8c0" => DATA <= x"7472";
when "01" & x"8c1" => DATA <= x"6f6c";
when "01" & x"8c2" => DATA <= x"0000";
when "01" & x"8c3" => DATA <= x"0000";
when "01" & x"8c4" => DATA <= x"0000";
when "01" & x"8c5" => DATA <= x"002b";
when "01" & x"8c6" => DATA <= x"003f";
when "01" & x"8c7" => DATA <= x"1124";
when "01" & x"8c8" => DATA <= x"4f53";
when "01" & x"8c9" => DATA <= x"5f47";
when "01" & x"8ca" => DATA <= x"656e";
when "01" & x"8cb" => DATA <= x"6572";
when "01" & x"8cc" => DATA <= x"6174";
when "01" & x"8cd" => DATA <= x"6545";
when "01" & x"8ce" => DATA <= x"7272";
when "01" & x"8cf" => DATA <= x"6f72";
when "01" & x"8d0" => DATA <= x"0000";
when "01" & x"8d1" => DATA <= x"0000";
when "01" & x"8d2" => DATA <= x"0000";
when "01" & x"8d3" => DATA <= x"002c";
when "01" & x"8d4" => DATA <= x"003f";
when "01" & x"8d5" => DATA <= x"112a";
when "01" & x"8d6" => DATA <= x"4f53";
when "01" & x"8d7" => DATA <= x"5f52";
when "01" & x"8d8" => DATA <= x"6561";
when "01" & x"8d9" => DATA <= x"6445";
when "01" & x"8da" => DATA <= x"7363";
when "01" & x"8db" => DATA <= x"6170";
when "01" & x"8dc" => DATA <= x"6553";
when "01" & x"8dd" => DATA <= x"7461";
when "01" & x"8de" => DATA <= x"7465";
when "01" & x"8df" => DATA <= x"0000";
when "01" & x"8e0" => DATA <= x"0000";
when "01" & x"8e1" => DATA <= x"002f";
when "01" & x"8e2" => DATA <= x"003f";
when "01" & x"8e3" => DATA <= x"1140";
when "01" & x"8e4" => DATA <= x"4f53";
when "01" & x"8e5" => DATA <= x"5f52";
when "01" & x"8e6" => DATA <= x"6561";
when "01" & x"8e7" => DATA <= x"6450";
when "01" & x"8e8" => DATA <= x"616c";
when "01" & x"8e9" => DATA <= x"6574";
when "01" & x"8ea" => DATA <= x"7465";
when "01" & x"8eb" => DATA <= x"0000";
when "01" & x"8ec" => DATA <= x"0000";
when "01" & x"8ed" => DATA <= x"0032";
when "01" & x"8ee" => DATA <= x"003f";
when "01" & x"8ef" => DATA <= x"1156";
when "01" & x"8f0" => DATA <= x"4f53";
when "01" & x"8f1" => DATA <= x"5f52";
when "01" & x"8f2" => DATA <= x"6561";
when "01" & x"8f3" => DATA <= x"6450";
when "01" & x"8f4" => DATA <= x"6f69";
when "01" & x"8f5" => DATA <= x"6e74";
when "01" & x"8f6" => DATA <= x"0000";
when "01" & x"8f7" => DATA <= x"0000";
when "01" & x"8f8" => DATA <= x"0000";
when "01" & x"8f9" => DATA <= x"0034";
when "01" & x"8fa" => DATA <= x"003f";
when "01" & x"8fb" => DATA <= x"11ac";
when "01" & x"8fc" => DATA <= x"4f53";
when "01" & x"8fd" => DATA <= x"5f43";
when "01" & x"8fe" => DATA <= x"616c";
when "01" & x"8ff" => DATA <= x"6c41";
when "01" & x"900" => DATA <= x"5665";
when "01" & x"901" => DATA <= x"6374";
when "01" & x"902" => DATA <= x"6f72";
when "01" & x"903" => DATA <= x"0000";
when "01" & x"904" => DATA <= x"0000";
when "01" & x"905" => DATA <= x"0036";
when "01" & x"906" => DATA <= x"003f";
when "01" & x"907" => DATA <= x"11d8";
when "01" & x"908" => DATA <= x"4f53";
when "01" & x"909" => DATA <= x"5f52";
when "01" & x"90a" => DATA <= x"656d";
when "01" & x"90b" => DATA <= x"6f76";
when "01" & x"90c" => DATA <= x"6543";
when "01" & x"90d" => DATA <= x"7572";
when "01" & x"90e" => DATA <= x"736f";
when "01" & x"90f" => DATA <= x"7273";
when "01" & x"910" => DATA <= x"0000";
when "01" & x"911" => DATA <= x"0000";
when "01" & x"912" => DATA <= x"0000";
when "01" & x"913" => DATA <= x"0037";
when "01" & x"914" => DATA <= x"003f";
when "01" & x"915" => DATA <= x"11f2";
when "01" & x"916" => DATA <= x"4f53";
when "01" & x"917" => DATA <= x"5f52";
when "01" & x"918" => DATA <= x"6573";
when "01" & x"919" => DATA <= x"746f";
when "01" & x"91a" => DATA <= x"7265";
when "01" & x"91b" => DATA <= x"4375";
when "01" & x"91c" => DATA <= x"7273";
when "01" & x"91d" => DATA <= x"6f72";
when "01" & x"91e" => DATA <= x"7300";
when "01" & x"91f" => DATA <= x"0000";
when "01" & x"920" => DATA <= x"0000";
when "01" & x"921" => DATA <= x"0038";
when "01" & x"922" => DATA <= x"003f";
when "01" & x"923" => DATA <= x"120c";
when "01" & x"924" => DATA <= x"4f53";
when "01" & x"925" => DATA <= x"5f53";
when "01" & x"926" => DATA <= x"5749";
when "01" & x"927" => DATA <= x"4e75";
when "01" & x"928" => DATA <= x"6d62";
when "01" & x"929" => DATA <= x"6572";
when "01" & x"92a" => DATA <= x"546f";
when "01" & x"92b" => DATA <= x"5374";
when "01" & x"92c" => DATA <= x"7269";
when "01" & x"92d" => DATA <= x"6e67";
when "01" & x"92e" => DATA <= x"0000";
when "01" & x"92f" => DATA <= x"0000";
when "01" & x"930" => DATA <= x"0000";
when "01" & x"931" => DATA <= x"0039";
when "01" & x"932" => DATA <= x"003f";
when "01" & x"933" => DATA <= x"128c";
when "01" & x"934" => DATA <= x"4f53";
when "01" & x"935" => DATA <= x"5f53";
when "01" & x"936" => DATA <= x"5749";
when "01" & x"937" => DATA <= x"4e75";
when "01" & x"938" => DATA <= x"6d62";
when "01" & x"939" => DATA <= x"6572";
when "01" & x"93a" => DATA <= x"4672";
when "01" & x"93b" => DATA <= x"6f6d";
when "01" & x"93c" => DATA <= x"5374";
when "01" & x"93d" => DATA <= x"7269";
when "01" & x"93e" => DATA <= x"6e67";
when "01" & x"93f" => DATA <= x"0000";
when "01" & x"940" => DATA <= x"0000";
when "01" & x"941" => DATA <= x"003a";
when "01" & x"942" => DATA <= x"003f";
when "01" & x"943" => DATA <= x"12d0";
when "01" & x"944" => DATA <= x"4f53";
when "01" & x"945" => DATA <= x"5f56";
when "01" & x"946" => DATA <= x"616c";
when "01" & x"947" => DATA <= x"6964";
when "01" & x"948" => DATA <= x"6174";
when "01" & x"949" => DATA <= x"6541";
when "01" & x"94a" => DATA <= x"6464";
when "01" & x"94b" => DATA <= x"7265";
when "01" & x"94c" => DATA <= x"7373";
when "01" & x"94d" => DATA <= x"0000";
when "01" & x"94e" => DATA <= x"0000";
when "01" & x"94f" => DATA <= x"003f";
when "01" & x"950" => DATA <= x"003f";
when "01" & x"951" => DATA <= x"12ea";
when "01" & x"952" => DATA <= x"4f53";
when "01" & x"953" => DATA <= x"5f43";
when "01" & x"954" => DATA <= x"6865";
when "01" & x"955" => DATA <= x"636b";
when "01" & x"956" => DATA <= x"4d6f";
when "01" & x"957" => DATA <= x"6465";
when "01" & x"958" => DATA <= x"5661";
when "01" & x"959" => DATA <= x"6c69";
when "01" & x"95a" => DATA <= x"6400";
when "01" & x"95b" => DATA <= x"0000";
when "01" & x"95c" => DATA <= x"0000";
when "01" & x"95d" => DATA <= x"0040";
when "01" & x"95e" => DATA <= x"003f";
when "01" & x"95f" => DATA <= x"1304";
when "01" & x"960" => DATA <= x"4f53";
when "01" & x"961" => DATA <= x"5f43";
when "01" & x"962" => DATA <= x"6861";
when "01" & x"963" => DATA <= x"6e67";
when "01" & x"964" => DATA <= x"6545";
when "01" & x"965" => DATA <= x"6e76";
when "01" & x"966" => DATA <= x"6972";
when "01" & x"967" => DATA <= x"6f6e";
when "01" & x"968" => DATA <= x"6d65";
when "01" & x"969" => DATA <= x"6e74";
when "01" & x"96a" => DATA <= x"0000";
when "01" & x"96b" => DATA <= x"0000";
when "01" & x"96c" => DATA <= x"0000";
when "01" & x"96d" => DATA <= x"0042";
when "01" & x"96e" => DATA <= x"003f";
when "01" & x"96f" => DATA <= x"130a";
when "01" & x"970" => DATA <= x"4f53";
when "01" & x"971" => DATA <= x"5f52";
when "01" & x"972" => DATA <= x"6561";
when "01" & x"973" => DATA <= x"644d";
when "01" & x"974" => DATA <= x"6f6e";
when "01" & x"975" => DATA <= x"6f74";
when "01" & x"976" => DATA <= x"6f6e";
when "01" & x"977" => DATA <= x"6963";
when "01" & x"978" => DATA <= x"5469";
when "01" & x"979" => DATA <= x"6d65";
when "01" & x"97a" => DATA <= x"0000";
when "01" & x"97b" => DATA <= x"0000";
when "01" & x"97c" => DATA <= x"0000";
when "01" & x"97d" => DATA <= x"0045";
when "01" & x"97e" => DATA <= x"003f";
when "01" & x"97f" => DATA <= x"1324";
when "01" & x"980" => DATA <= x"4f53";
when "01" & x"981" => DATA <= x"5f50";
when "01" & x"982" => DATA <= x"6c6f";
when "01" & x"983" => DATA <= x"7400";
when "01" & x"984" => DATA <= x"0000";
when "01" & x"985" => DATA <= x"0046";
when "01" & x"986" => DATA <= x"003f";
when "01" & x"987" => DATA <= x"1372";
when "01" & x"988" => DATA <= x"4f53";
when "01" & x"989" => DATA <= x"5f57";
when "01" & x"98a" => DATA <= x"7269";
when "01" & x"98b" => DATA <= x"7465";
when "01" & x"98c" => DATA <= x"4e00";
when "01" & x"98d" => DATA <= x"0000";
when "01" & x"98e" => DATA <= x"0000";
when "01" & x"98f" => DATA <= x"0048";
when "01" & x"990" => DATA <= x"003f";
when "01" & x"991" => DATA <= x"1398";
when "01" & x"992" => DATA <= x"4f53";
when "01" & x"993" => DATA <= x"5f57";
when "01" & x"994" => DATA <= x"7269";
when "01" & x"995" => DATA <= x"7465";
when "01" & x"996" => DATA <= x"456e";
when "01" & x"997" => DATA <= x"7600";
when "01" & x"998" => DATA <= x"0000";
when "01" & x"999" => DATA <= x"0050";
when "01" & x"99a" => DATA <= x"003f";
when "01" & x"99b" => DATA <= x"13ce";
when "01" & x"99c" => DATA <= x"4f53";
when "01" & x"99d" => DATA <= x"5f45";
when "01" & x"99e" => DATA <= x"7869";
when "01" & x"99f" => DATA <= x"7441";
when "01" & x"9a0" => DATA <= x"6e64";
when "01" & x"9a1" => DATA <= x"4469";
when "01" & x"9a2" => DATA <= x"6500";
when "01" & x"9a3" => DATA <= x"0000";
when "01" & x"9a4" => DATA <= x"0000";
when "01" & x"9a5" => DATA <= x"0055";
when "01" & x"9a6" => DATA <= x"003f";
when "01" & x"9a7" => DATA <= x"13e6";
when "01" & x"9a8" => DATA <= x"4f53";
when "01" & x"9a9" => DATA <= x"5f52";
when "01" & x"9aa" => DATA <= x"6561";
when "01" & x"9ab" => DATA <= x"6444";
when "01" & x"9ac" => DATA <= x"6566";
when "01" & x"9ad" => DATA <= x"6175";
when "01" & x"9ae" => DATA <= x"6c74";
when "01" & x"9af" => DATA <= x"4861";
when "01" & x"9b0" => DATA <= x"6e64";
when "01" & x"9b1" => DATA <= x"6c65";
when "01" & x"9b2" => DATA <= x"7200";
when "01" & x"9b3" => DATA <= x"0000";
when "01" & x"9b4" => DATA <= x"0000";
when "01" & x"9b5" => DATA <= x"0056";
when "01" & x"9b6" => DATA <= x"003f";
when "01" & x"9b7" => DATA <= x"142e";
when "01" & x"9b8" => DATA <= x"4f53";
when "01" & x"9b9" => DATA <= x"5f53";
when "01" & x"9ba" => DATA <= x"6574";
when "01" & x"9bb" => DATA <= x"4543";
when "01" & x"9bc" => DATA <= x"464f";
when "01" & x"9bd" => DATA <= x"7269";
when "01" & x"9be" => DATA <= x"6769";
when "01" & x"9bf" => DATA <= x"6e00";
when "01" & x"9c0" => DATA <= x"0000";
when "01" & x"9c1" => DATA <= x"005d";
when "01" & x"9c2" => DATA <= x"003f";
when "01" & x"9c3" => DATA <= x"14de";
when "01" & x"9c4" => DATA <= x"4f53";
when "01" & x"9c5" => DATA <= x"5f50";
when "01" & x"9c6" => DATA <= x"7269";
when "01" & x"9c7" => DATA <= x"6e74";
when "01" & x"9c8" => DATA <= x"4368";
when "01" & x"9c9" => DATA <= x"6172";
when "01" & x"9ca" => DATA <= x"0000";
when "01" & x"9cb" => DATA <= x"0000";
when "01" & x"9cc" => DATA <= x"0000";
when "01" & x"9cd" => DATA <= x"005b";
when "01" & x"9ce" => DATA <= x"003f";
when "01" & x"9cf" => DATA <= x"14ac";
when "01" & x"9d0" => DATA <= x"4f53";
when "01" & x"9d1" => DATA <= x"5f43";
when "01" & x"9d2" => DATA <= x"5243";
when "01" & x"9d3" => DATA <= x"0000";
when "01" & x"9d4" => DATA <= x"0000";
when "01" & x"9d5" => DATA <= x"0059";
when "01" & x"9d6" => DATA <= x"003f";
when "01" & x"9d7" => DATA <= x"149e";
when "01" & x"9d8" => DATA <= x"4f53";
when "01" & x"9d9" => DATA <= x"5f43";
when "01" & x"9da" => DATA <= x"6f6e";
when "01" & x"9db" => DATA <= x"6669";
when "01" & x"9dc" => DATA <= x"726d";
when "01" & x"9dd" => DATA <= x"0000";
when "01" & x"9de" => DATA <= x"0000";
when "01" & x"9df" => DATA <= x"007c";
when "01" & x"9e0" => DATA <= x"003f";
when "01" & x"9e1" => DATA <= x"14ea";
when "01" & x"9e2" => DATA <= x"4f53";
when "01" & x"9e3" => DATA <= x"5f4c";
when "01" & x"9e4" => DATA <= x"6561";
when "01" & x"9e5" => DATA <= x"7665";
when "01" & x"9e6" => DATA <= x"4f53";
when "01" & x"9e7" => DATA <= x"0000";
when "01" & x"9e8" => DATA <= x"0000";
when "01" & x"9e9" => DATA <= x"007d";
when "01" & x"9ea" => DATA <= x"003f";
when "01" & x"9eb" => DATA <= x"14f0";
when "01" & x"9ec" => DATA <= x"4f53";
when "01" & x"9ed" => DATA <= x"5f52";
when "01" & x"9ee" => DATA <= x"6561";
when "01" & x"9ef" => DATA <= x"644c";
when "01" & x"9f0" => DATA <= x"696e";
when "01" & x"9f1" => DATA <= x"6533";
when "01" & x"9f2" => DATA <= x"3200";
when "01" & x"9f3" => DATA <= x"0000";
when "01" & x"9f4" => DATA <= x"0000";
when "01" & x"9f5" => DATA <= x"00d0";
when "01" & x"9f6" => DATA <= x"003f";
when "01" & x"9f7" => DATA <= x"1678";
when "01" & x"9f8" => DATA <= x"4f53";
when "01" & x"9f9" => DATA <= x"5f43";
when "01" & x"9fa" => DATA <= x"6f6e";
when "01" & x"9fb" => DATA <= x"7665";
when "01" & x"9fc" => DATA <= x"7274";
when "01" & x"9fd" => DATA <= x"4865";
when "01" & x"9fe" => DATA <= x"7831";
when "01" & x"9ff" => DATA <= x"0000";
when "01" & x"a00" => DATA <= x"0000";
when "01" & x"a01" => DATA <= x"00d1";
when "01" & x"a02" => DATA <= x"003f";
when "01" & x"a03" => DATA <= x"1694";
when "01" & x"a04" => DATA <= x"4f53";
when "01" & x"a05" => DATA <= x"5f43";
when "01" & x"a06" => DATA <= x"6f6e";
when "01" & x"a07" => DATA <= x"7665";
when "01" & x"a08" => DATA <= x"7274";
when "01" & x"a09" => DATA <= x"4865";
when "01" & x"a0a" => DATA <= x"7832";
when "01" & x"a0b" => DATA <= x"0000";
when "01" & x"a0c" => DATA <= x"0000";
when "01" & x"a0d" => DATA <= x"00d2";
when "01" & x"a0e" => DATA <= x"003f";
when "01" & x"a0f" => DATA <= x"16b0";
when "01" & x"a10" => DATA <= x"4f53";
when "01" & x"a11" => DATA <= x"5f43";
when "01" & x"a12" => DATA <= x"6f6e";
when "01" & x"a13" => DATA <= x"7665";
when "01" & x"a14" => DATA <= x"7274";
when "01" & x"a15" => DATA <= x"4865";
when "01" & x"a16" => DATA <= x"7834";
when "01" & x"a17" => DATA <= x"0000";
when "01" & x"a18" => DATA <= x"0000";
when "01" & x"a19" => DATA <= x"00d3";
when "01" & x"a1a" => DATA <= x"003f";
when "01" & x"a1b" => DATA <= x"16ce";
when "01" & x"a1c" => DATA <= x"4f53";
when "01" & x"a1d" => DATA <= x"5f43";
when "01" & x"a1e" => DATA <= x"6f6e";
when "01" & x"a1f" => DATA <= x"7665";
when "01" & x"a20" => DATA <= x"7274";
when "01" & x"a21" => DATA <= x"4865";
when "01" & x"a22" => DATA <= x"7836";
when "01" & x"a23" => DATA <= x"0000";
when "01" & x"a24" => DATA <= x"0000";
when "01" & x"a25" => DATA <= x"00d4";
when "01" & x"a26" => DATA <= x"003f";
when "01" & x"a27" => DATA <= x"16ea";
when "01" & x"a28" => DATA <= x"4f53";
when "01" & x"a29" => DATA <= x"5f43";
when "01" & x"a2a" => DATA <= x"6f6e";
when "01" & x"a2b" => DATA <= x"7665";
when "01" & x"a2c" => DATA <= x"7274";
when "01" & x"a2d" => DATA <= x"4865";
when "01" & x"a2e" => DATA <= x"7838";
when "01" & x"a2f" => DATA <= x"0000";
when "01" & x"a30" => DATA <= x"0000";
when "01" & x"a31" => DATA <= x"00d5";
when "01" & x"a32" => DATA <= x"003f";
when "01" & x"a33" => DATA <= x"1744";
when "01" & x"a34" => DATA <= x"4f53";
when "01" & x"a35" => DATA <= x"5f43";
when "01" & x"a36" => DATA <= x"6f6e";
when "01" & x"a37" => DATA <= x"7665";
when "01" & x"a38" => DATA <= x"7274";
when "01" & x"a39" => DATA <= x"4361";
when "01" & x"a3a" => DATA <= x"7264";
when "01" & x"a3b" => DATA <= x"696e";
when "01" & x"a3c" => DATA <= x"616c";
when "01" & x"a3d" => DATA <= x"3100";
when "01" & x"a3e" => DATA <= x"0000";
when "01" & x"a3f" => DATA <= x"00d6";
when "01" & x"a40" => DATA <= x"003f";
when "01" & x"a41" => DATA <= x"175e";
when "01" & x"a42" => DATA <= x"4f53";
when "01" & x"a43" => DATA <= x"5f43";
when "01" & x"a44" => DATA <= x"6f6e";
when "01" & x"a45" => DATA <= x"7665";
when "01" & x"a46" => DATA <= x"7274";
when "01" & x"a47" => DATA <= x"4361";
when "01" & x"a48" => DATA <= x"7264";
when "01" & x"a49" => DATA <= x"696e";
when "01" & x"a4a" => DATA <= x"616c";
when "01" & x"a4b" => DATA <= x"3200";
when "01" & x"a4c" => DATA <= x"0000";
when "01" & x"a4d" => DATA <= x"00d7";
when "01" & x"a4e" => DATA <= x"003f";
when "01" & x"a4f" => DATA <= x"1778";
when "01" & x"a50" => DATA <= x"4f53";
when "01" & x"a51" => DATA <= x"5f43";
when "01" & x"a52" => DATA <= x"6f6e";
when "01" & x"a53" => DATA <= x"7665";
when "01" & x"a54" => DATA <= x"7274";
when "01" & x"a55" => DATA <= x"4361";
when "01" & x"a56" => DATA <= x"7264";
when "01" & x"a57" => DATA <= x"696e";
when "01" & x"a58" => DATA <= x"616c";
when "01" & x"a59" => DATA <= x"3300";
when "01" & x"a5a" => DATA <= x"0000";
when "01" & x"a5b" => DATA <= x"00d8";
when "01" & x"a5c" => DATA <= x"003f";
when "01" & x"a5d" => DATA <= x"1792";
when "01" & x"a5e" => DATA <= x"4f53";
when "01" & x"a5f" => DATA <= x"5f43";
when "01" & x"a60" => DATA <= x"6f6e";
when "01" & x"a61" => DATA <= x"7665";
when "01" & x"a62" => DATA <= x"7274";
when "01" & x"a63" => DATA <= x"4361";
when "01" & x"a64" => DATA <= x"7264";
when "01" & x"a65" => DATA <= x"696e";
when "01" & x"a66" => DATA <= x"616c";
when "01" & x"a67" => DATA <= x"3400";
when "01" & x"a68" => DATA <= x"0000";
when "01" & x"a69" => DATA <= x"00d9";
when "01" & x"a6a" => DATA <= x"003f";
when "01" & x"a6b" => DATA <= x"1814";
when "01" & x"a6c" => DATA <= x"4f53";
when "01" & x"a6d" => DATA <= x"5f43";
when "01" & x"a6e" => DATA <= x"6f6e";
when "01" & x"a6f" => DATA <= x"7665";
when "01" & x"a70" => DATA <= x"7274";
when "01" & x"a71" => DATA <= x"496e";
when "01" & x"a72" => DATA <= x"7465";
when "01" & x"a73" => DATA <= x"6765";
when "01" & x"a74" => DATA <= x"7231";
when "01" & x"a75" => DATA <= x"0000";
when "01" & x"a76" => DATA <= x"0000";
when "01" & x"a77" => DATA <= x"00da";
when "01" & x"a78" => DATA <= x"003f";
when "01" & x"a79" => DATA <= x"183c";
when "01" & x"a7a" => DATA <= x"4f53";
when "01" & x"a7b" => DATA <= x"5f43";
when "01" & x"a7c" => DATA <= x"6f6e";
when "01" & x"a7d" => DATA <= x"7665";
when "01" & x"a7e" => DATA <= x"7274";
when "01" & x"a7f" => DATA <= x"496e";
when "01" & x"a80" => DATA <= x"7465";
when "01" & x"a81" => DATA <= x"6765";
when "01" & x"a82" => DATA <= x"7232";
when "01" & x"a83" => DATA <= x"0000";
when "01" & x"a84" => DATA <= x"0000";
when "01" & x"a85" => DATA <= x"00db";
when "01" & x"a86" => DATA <= x"003f";
when "01" & x"a87" => DATA <= x"1864";
when "01" & x"a88" => DATA <= x"4f53";
when "01" & x"a89" => DATA <= x"5f43";
when "01" & x"a8a" => DATA <= x"6f6e";
when "01" & x"a8b" => DATA <= x"7665";
when "01" & x"a8c" => DATA <= x"7274";
when "01" & x"a8d" => DATA <= x"496e";
when "01" & x"a8e" => DATA <= x"7465";
when "01" & x"a8f" => DATA <= x"6765";
when "01" & x"a90" => DATA <= x"7233";
when "01" & x"a91" => DATA <= x"0000";
when "01" & x"a92" => DATA <= x"0000";
when "01" & x"a93" => DATA <= x"00dc";
when "01" & x"a94" => DATA <= x"003f";
when "01" & x"a95" => DATA <= x"188c";
when "01" & x"a96" => DATA <= x"4f53";
when "01" & x"a97" => DATA <= x"5f43";
when "01" & x"a98" => DATA <= x"6f6e";
when "01" & x"a99" => DATA <= x"7665";
when "01" & x"a9a" => DATA <= x"7274";
when "01" & x"a9b" => DATA <= x"496e";
when "01" & x"a9c" => DATA <= x"7465";
when "01" & x"a9d" => DATA <= x"6765";
when "01" & x"a9e" => DATA <= x"7234";
when "01" & x"a9f" => DATA <= x"0000";
when "01" & x"aa0" => DATA <= x"0000";
when "01" & x"aa1" => DATA <= x"00dd";
when "01" & x"aa2" => DATA <= x"003f";
when "01" & x"aa3" => DATA <= x"190e";
when "01" & x"aa4" => DATA <= x"4f53";
when "01" & x"aa5" => DATA <= x"5f43";
when "01" & x"aa6" => DATA <= x"6f6e";
when "01" & x"aa7" => DATA <= x"7665";
when "01" & x"aa8" => DATA <= x"7274";
when "01" & x"aa9" => DATA <= x"4269";
when "01" & x"aaa" => DATA <= x"6e61";
when "01" & x"aab" => DATA <= x"7279";
when "01" & x"aac" => DATA <= x"3100";
when "01" & x"aad" => DATA <= x"0000";
when "01" & x"aae" => DATA <= x"0000";
when "01" & x"aaf" => DATA <= x"00de";
when "01" & x"ab0" => DATA <= x"003f";
when "01" & x"ab1" => DATA <= x"192c";
when "01" & x"ab2" => DATA <= x"4f53";
when "01" & x"ab3" => DATA <= x"5f43";
when "01" & x"ab4" => DATA <= x"6f6e";
when "01" & x"ab5" => DATA <= x"7665";
when "01" & x"ab6" => DATA <= x"7274";
when "01" & x"ab7" => DATA <= x"4269";
when "01" & x"ab8" => DATA <= x"6e61";
when "01" & x"ab9" => DATA <= x"7279";
when "01" & x"aba" => DATA <= x"3200";
when "01" & x"abb" => DATA <= x"0000";
when "01" & x"abc" => DATA <= x"0000";
when "01" & x"abd" => DATA <= x"00df";
when "01" & x"abe" => DATA <= x"003f";
when "01" & x"abf" => DATA <= x"194c";
when "01" & x"ac0" => DATA <= x"4f53";
when "01" & x"ac1" => DATA <= x"5f43";
when "01" & x"ac2" => DATA <= x"6f6e";
when "01" & x"ac3" => DATA <= x"7665";
when "01" & x"ac4" => DATA <= x"7274";
when "01" & x"ac5" => DATA <= x"4269";
when "01" & x"ac6" => DATA <= x"6e61";
when "01" & x"ac7" => DATA <= x"7279";
when "01" & x"ac8" => DATA <= x"3300";
when "01" & x"ac9" => DATA <= x"0000";
when "01" & x"aca" => DATA <= x"0000";
when "01" & x"acb" => DATA <= x"00e0";
when "01" & x"acc" => DATA <= x"003f";
when "01" & x"acd" => DATA <= x"196a";
when "01" & x"ace" => DATA <= x"4f53";
when "01" & x"acf" => DATA <= x"5f43";
when "01" & x"ad0" => DATA <= x"6f6e";
when "01" & x"ad1" => DATA <= x"7665";
when "01" & x"ad2" => DATA <= x"7274";
when "01" & x"ad3" => DATA <= x"4269";
when "01" & x"ad4" => DATA <= x"6e61";
when "01" & x"ad5" => DATA <= x"7279";
when "01" & x"ad6" => DATA <= x"3400";
when "01" & x"ad7" => DATA <= x"0000";
when "01" & x"ad8" => DATA <= x"0000";
when "01" & x"ad9" => DATA <= x"00ea";
when "01" & x"ada" => DATA <= x"003f";
when "01" & x"adb" => DATA <= x"19e6";
when "01" & x"adc" => DATA <= x"4f53";
when "01" & x"add" => DATA <= x"5f43";
when "01" & x"ade" => DATA <= x"6f6e";
when "01" & x"adf" => DATA <= x"7665";
when "01" & x"ae0" => DATA <= x"7274";
when "01" & x"ae1" => DATA <= x"4e65";
when "01" & x"ae2" => DATA <= x"7453";
when "01" & x"ae3" => DATA <= x"7461";
when "01" & x"ae4" => DATA <= x"7469";
when "01" & x"ae5" => DATA <= x"6f6e";
when "01" & x"ae6" => DATA <= x"0000";
when "01" & x"ae7" => DATA <= x"00ff";
when "01" & x"ae8" => DATA <= x"003f";
when "01" & x"ae9" => DATA <= x"1b56";
when "01" & x"aea" => DATA <= x"4552";
when "01" & x"aeb" => DATA <= x"524f";
when "01" & x"aec" => DATA <= x"5220";
when "01" & x"aed" => DATA <= x"2000";
when "01" & x"aee" => DATA <= x"003f";
when "01" & x"aef" => DATA <= x"1bb4";
when "01" & x"af0" => DATA <= x"464c";
when "01" & x"af1" => DATA <= x"4153";
when "01" & x"af2" => DATA <= x"4820";
when "01" & x"af3" => DATA <= x"2000";
when "01" & x"af4" => DATA <= x"003f";
when "01" & x"af5" => DATA <= x"1c8c";
when "01" & x"af6" => DATA <= x"474f";
when "01" & x"af7" => DATA <= x"2000";
when "01" & x"af8" => DATA <= x"003f";
when "01" & x"af9" => DATA <= x"1cba";
when "01" & x"afa" => DATA <= x"4845";
when "01" & x"afb" => DATA <= x"4c50";
when "01" & x"afc" => DATA <= x"2020";
when "01" & x"afd" => DATA <= x"2000";
when "01" & x"afe" => DATA <= x"003f";
when "01" & x"aff" => DATA <= x"1db6";
when "01" & x"b00" => DATA <= x"4d4f";
when "01" & x"b01" => DATA <= x"4e00";
when "01" & x"b02" => DATA <= x"003f";
when "01" & x"b03" => DATA <= x"2480";
when "01" & x"b04" => DATA <= x"5155";
when "01" & x"b05" => DATA <= x"4954";
when "01" & x"b06" => DATA <= x"2020";
when "01" & x"b07" => DATA <= x"2000";
when "01" & x"b08" => DATA <= x"003f";
when "01" & x"b09" => DATA <= x"2484";
when "01" & x"b0a" => DATA <= x"545a";
when "01" & x"b0b" => DATA <= x"4150";
when "01" & x"b0c" => DATA <= x"2020";
when "01" & x"b0d" => DATA <= x"2000";
when "01" & x"b0e" => DATA <= x"003f";
when "01" & x"b0f" => DATA <= x"2488";
when "01" & x"b10" => DATA <= x"5846";
when "01" & x"b11" => DATA <= x"4552";
when "01" & x"b12" => DATA <= x"2020";
when "01" & x"b13" => DATA <= x"2000";
when "01" & x"b14" => DATA <= x"ffff";
when "01" & x"b15" => DATA <= x"ffff";
when "01" & x"b16" => DATA <= x"0000";
when "01" & x"b17" => DATA <= x"0000";
when "01" & x"b18" => DATA <= x"0000";
when "01" & x"b19" => DATA <= x"0508";
when "01" & x"b1a" => DATA <= x"0000";
when "01" & x"b1b" => DATA <= x"0000";
when "01" & x"b1c" => DATA <= x"0000";
when "01" & x"b1d" => DATA <= x"0000";
when "01" & x"b1e" => DATA <= x"0000";
when "01" & x"b1f" => DATA <= x"0010";
when "01" & x"b20" => DATA <= x"0000";
when "01" & x"b21" => DATA <= x"0000";
when "01" & x"b22" => DATA <= x"0000";
when "01" & x"b23" => DATA <= x"0000";
when "01" & x"b24" => DATA <= x"0000";
when "01" & x"b25" => DATA <= x"0000";
when "01" & x"b26" => DATA <= x"0000";
when "01" & x"b27" => DATA <= x"0000";
when "01" & x"b28" => DATA <= x"0000";
when "01" & x"b29" => DATA <= x"0000";
when "01" & x"b2a" => DATA <= x"0000";
when "01" & x"b2b" => DATA <= x"0000";
when "01" & x"b2c" => DATA <= x"0000";
when "01" & x"b2d" => DATA <= x"0000";
when "01" & x"b2e" => DATA <= x"0000";
when "01" & x"b2f" => DATA <= x"0000";
when "01" & x"b30" => DATA <= x"0000";
when "01" & x"b31" => DATA <= x"000c";
when "01" & x"b32" => DATA <= x"0000";
when "01" & x"b33" => DATA <= x"0000";
when "01" & x"b34" => DATA <= x"0000";
when "01" & x"b35" => DATA <= x"0000";
when "01" & x"b36" => DATA <= x"0000";
when "01" & x"b37" => DATA <= x"04c0";
when "01" & x"b38" => DATA <= x"0000";
when "01" & x"b39" => DATA <= x"0000";
when "01" & x"b3a" => DATA <= x"0000";
when "01" & x"b3b" => DATA <= x"0000";
when "01" & x"b3c" => DATA <= x"0000";
when "01" & x"b3d" => DATA <= x"0404";
when "01" & x"b3e" => DATA <= x"0000";
when "01" & x"b3f" => DATA <= x"04d4";
when "01" & x"b40" => DATA <= x"0000";
when "01" & x"b41" => DATA <= x"04f4";
when "01" & x"b42" => DATA <= x"0000";
when "01" & x"b43" => DATA <= x"04c4";
when "01" & x"b44" => DATA <= x"0000";
when "01" & x"b45" => DATA <= x"04d8";
when "01" & x"b46" => DATA <= x"0000";
when "01" & x"b47" => DATA <= x"04f8";
when "01" & x"b48" => DATA <= x"0000";
when "01" & x"b49" => DATA <= x"04c8";
when "01" & x"b4a" => DATA <= x"0000";
when "01" & x"b4b" => DATA <= x"04dc";
when "01" & x"b4c" => DATA <= x"0000";
when "01" & x"b4d" => DATA <= x"04fc";
when "01" & x"b4e" => DATA <= x"0000";
when "01" & x"b4f" => DATA <= x"04cc";
when "01" & x"b50" => DATA <= x"0000";
when "01" & x"b51" => DATA <= x"04e0";
when "01" & x"b52" => DATA <= x"0000";
when "01" & x"b53" => DATA <= x"0000";
when "01" & x"b54" => DATA <= x"0000";
when "01" & x"b55" => DATA <= x"0440";
when "01" & x"b56" => DATA <= x"0000";
when "01" & x"b57" => DATA <= x"04e4";
when "01" & x"b58" => DATA <= x"0000";
when "01" & x"b59" => DATA <= x"0000";
when "01" & x"b5a" => DATA <= x"0000";
when "01" & x"b5b" => DATA <= x"04d0";
when "01" & x"b5c" => DATA <= x"0000";
when "01" & x"b5d" => DATA <= x"04e8";
when "01" & x"b5e" => DATA <= x"0000";
when "01" & x"b5f" => DATA <= x"0000";
when "01" & x"b60" => DATA <= x"0000";
when "01" & x"b61" => DATA <= x"0460";
when "01" & x"b62" => DATA <= x"0000";
when "01" & x"b63" => DATA <= x"04ec";
when "01" & x"b64" => DATA <= x"0000";
when "01" & x"b65" => DATA <= x"0000";
when "01" & x"b66" => DATA <= x"0000";
when "01" & x"b67" => DATA <= x"0538";
when "01" & x"b68" => DATA <= x"0000";
when "01" & x"b69" => DATA <= x"0000";
when "01" & x"b6a" => DATA <= x"0000";
when "01" & x"b6b" => DATA <= x"0000";
when "01" & x"b6c" => DATA <= x"0000";
when "01" & x"b6d" => DATA <= x"050c";
when "01" & x"b6e" => DATA <= x"0000";
when "01" & x"b6f" => DATA <= x"0000";
when "01" & x"b70" => DATA <= x"0000";
when "01" & x"b71" => DATA <= x"0000";
when "01" & x"b72" => DATA <= x"0000";
when "01" & x"b73" => DATA <= x"0000";
when "01" & x"b74" => DATA <= x"0000";
when "01" & x"b75" => DATA <= x"0000";
when "01" & x"b76" => DATA <= x"0000";
when "01" & x"b77" => DATA <= x"0000";
when "01" & x"b78" => DATA <= x"0000";
when "01" & x"b79" => DATA <= x"0474";
when "01" & x"b7a" => DATA <= x"0000";
when "01" & x"b7b" => DATA <= x"04f0";
when "01" & x"b7c" => DATA <= x"0000";
when "01" & x"b7d" => DATA <= x"0000";
when "01" & x"b7e" => DATA <= x"003f";
when "01" & x"b7f" => DATA <= x"077a";
when "01" & x"b80" => DATA <= x"003f";
when "01" & x"b81" => DATA <= x"077a";
when "01" & x"b82" => DATA <= x"003f";
when "01" & x"b83" => DATA <= x"077a";
when "01" & x"b84" => DATA <= x"003f";
when "01" & x"b85" => DATA <= x"077a";
when "01" & x"b86" => DATA <= x"003f";
when "01" & x"b87" => DATA <= x"077a";
when "01" & x"b88" => DATA <= x"003f";
when "01" & x"b89" => DATA <= x"077a";
when "01" & x"b8a" => DATA <= x"003f";
when "01" & x"b8b" => DATA <= x"077a";
when "01" & x"b8c" => DATA <= x"003f";
when "01" & x"b8d" => DATA <= x"077a";
when "01" & x"b8e" => DATA <= x"003f";
when "01" & x"b8f" => DATA <= x"077a";
when "01" & x"b90" => DATA <= x"003f";
when "01" & x"b91" => DATA <= x"077a";
when "01" & x"b92" => DATA <= x"003f";
when "01" & x"b93" => DATA <= x"1108";
when "01" & x"b94" => DATA <= x"003f";
when "01" & x"b95" => DATA <= x"077a";
when "01" & x"b96" => DATA <= x"003f";
when "01" & x"b97" => DATA <= x"077a";
when "01" & x"b98" => DATA <= x"003f";
when "01" & x"b99" => DATA <= x"077a";
when "01" & x"b9a" => DATA <= x"003f";
when "01" & x"b9b" => DATA <= x"077a";
when "01" & x"b9c" => DATA <= x"003f";
when "01" & x"b9d" => DATA <= x"077a";
when "01" & x"b9e" => DATA <= x"003f";
when "01" & x"b9f" => DATA <= x"077a";
when "01" & x"ba0" => DATA <= x"003f";
when "01" & x"ba1" => DATA <= x"077a";
when "01" & x"ba2" => DATA <= x"003f";
when "01" & x"ba3" => DATA <= x"077a";
when "01" & x"ba4" => DATA <= x"003f";
when "01" & x"ba5" => DATA <= x"077a";
when "01" & x"ba6" => DATA <= x"003f";
when "01" & x"ba7" => DATA <= x"077a";
when "01" & x"ba8" => DATA <= x"003f";
when "01" & x"ba9" => DATA <= x"077a";
when "01" & x"baa" => DATA <= x"003f";
when "01" & x"bab" => DATA <= x"1116";
when "01" & x"bac" => DATA <= x"003f";
when "01" & x"bad" => DATA <= x"077a";
when "01" & x"bae" => DATA <= x"003f";
when "01" & x"baf" => DATA <= x"077a";
when "01" & x"bb0" => DATA <= x"003f";
when "01" & x"bb1" => DATA <= x"077a";
when "01" & x"bb2" => DATA <= x"003f";
when "01" & x"bb3" => DATA <= x"077a";
when "01" & x"bb4" => DATA <= x"003f";
when "01" & x"bb5" => DATA <= x"077a";
when "01" & x"bb6" => DATA <= x"003f";
when "01" & x"bb7" => DATA <= x"077a";
when "01" & x"bb8" => DATA <= x"003f";
when "01" & x"bb9" => DATA <= x"077a";
when "01" & x"bba" => DATA <= x"003f";
when "01" & x"bbb" => DATA <= x"077a";
when "01" & x"bbc" => DATA <= x"003f";
when "01" & x"bbd" => DATA <= x"077a";
when "01" & x"bbe" => DATA <= x"003f";
when "01" & x"bbf" => DATA <= x"077a";
when "01" & x"bc0" => DATA <= x"003f";
when "01" & x"bc1" => DATA <= x"077a";
when "01" & x"bc2" => DATA <= x"003f";
when "01" & x"bc3" => DATA <= x"077a";
when "01" & x"bc4" => DATA <= x"003f";
when "01" & x"bc5" => DATA <= x"077a";
when "01" & x"bc6" => DATA <= x"003f";
when "01" & x"bc7" => DATA <= x"077a";
when "01" & x"bc8" => DATA <= x"003f";
when "01" & x"bc9" => DATA <= x"077a";
when "01" & x"bca" => DATA <= x"003f";
when "01" & x"bcb" => DATA <= x"077a";
when "01" & x"bcc" => DATA <= x"003f";
when "01" & x"bcd" => DATA <= x"077a";
when "01" & x"bce" => DATA <= x"003f";
when "01" & x"bcf" => DATA <= x"077a";
when "01" & x"bd0" => DATA <= x"003f";
when "01" & x"bd1" => DATA <= x"077a";
when "01" & x"bd2" => DATA <= x"003f";
when "01" & x"bd3" => DATA <= x"077a";
when "01" & x"bd4" => DATA <= x"003f";
when "01" & x"bd5" => DATA <= x"077a";
when "01" & x"bd6" => DATA <= x"003f";
when "01" & x"bd7" => DATA <= x"077a";
when "01" & x"bd8" => DATA <= x"003f";
when "01" & x"bd9" => DATA <= x"077a";
when "01" & x"bda" => DATA <= x"003f";
when "01" & x"bdb" => DATA <= x"077a";
when "01" & x"bdc" => DATA <= x"003f";
when "01" & x"bdd" => DATA <= x"077a";
when "01" & x"bde" => DATA <= x"003f";
when "01" & x"bdf" => DATA <= x"077a";
when "01" & x"be0" => DATA <= x"003f";
when "01" & x"be1" => DATA <= x"077a";
when "01" & x"be2" => DATA <= x"003f";
when "01" & x"be3" => DATA <= x"077a";
when "01" & x"be4" => DATA <= x"003f";
when "01" & x"be5" => DATA <= x"077a";
when "01" & x"be6" => DATA <= x"003f";
when "01" & x"be7" => DATA <= x"077a";
when "01" & x"be8" => DATA <= x"003f";
when "01" & x"be9" => DATA <= x"077a";
when "01" & x"bea" => DATA <= x"003f";
when "01" & x"beb" => DATA <= x"077a";
when "01" & x"bec" => DATA <= x"003f";
when "01" & x"bed" => DATA <= x"077a";
when "01" & x"bee" => DATA <= x"003f";
when "01" & x"bef" => DATA <= x"077a";
when "01" & x"bf0" => DATA <= x"003f";
when "01" & x"bf1" => DATA <= x"077a";
when "01" & x"bf2" => DATA <= x"003f";
when "01" & x"bf3" => DATA <= x"077a";
when "01" & x"bf4" => DATA <= x"1890";
when "01" & x"bf5" => DATA <= x"0210";
when "01" & x"bf6" => DATA <= x"e3c9";
when "01" & x"bf7" => DATA <= x"faf0";
when "01" & x"bf8" => DATA <= x"036c";
when "01" & x"bf9" => DATA <= x"0325";
when "01" & x"bfa" => DATA <= x"8670";
when "01" & x"bfb" => DATA <= x"8471";
when "01" & x"bfc" => DATA <= x"48a9";
when "01" & x"bfd" => DATA <= x"fba2";
when "01" & x"bfe" => DATA <= x"00a0";
when "01" & x"bff" => DATA <= x"ff20";
when "01" & x"c00" => DATA <= x"f4ff";
when "01" & x"c01" => DATA <= x"8673";
when "01" & x"c02" => DATA <= x"ad34";
when "01" & x"c03" => DATA <= x"fe48";
when "01" & x"c04" => DATA <= x"a9c7";
when "01" & x"c05" => DATA <= x"2006";
when "01" & x"c06" => DATA <= x"0490";
when "01" & x"c07" => DATA <= x"f9a0";
when "01" & x"c08" => DATA <= x"00b1";
when "01" & x"c09" => DATA <= x"70c9";
when "01" & x"c0a" => DATA <= x"0d08";
when "01" & x"c0b" => DATA <= x"a5f4";
when "01" & x"c0c" => DATA <= x"8572";
when "01" & x"c0d" => DATA <= x"a00d";
when "01" & x"c0e" => DATA <= x"b170";
when "01" & x"c0f" => DATA <= x"aaa0";
when "01" & x"c10" => DATA <= x"02b1";
when "01" & x"c11" => DATA <= x"7085";
when "01" & x"c12" => DATA <= x"74c8";
when "01" & x"c13" => DATA <= x"b170";
when "01" & x"c14" => DATA <= x"8575";
when "01" & x"c15" => DATA <= x"28f0";
when "01" & x"c16" => DATA <= x"408a";
when "01" & x"c17" => DATA <= x"4829";
when "01" & x"c18" => DATA <= x"40d0";
when "01" & x"c19" => DATA <= x"138a";
when "01" & x"c1a" => DATA <= x"2920";
when "01" & x"c1b" => DATA <= x"d004";
when "01" & x"c1c" => DATA <= x"a200";
when "01" & x"c1d" => DATA <= x"f002";
when "01" & x"c1e" => DATA <= x"a201";
when "01" & x"c1f" => DATA <= x"a96c";
when "01" & x"c20" => DATA <= x"20f4";
when "01" & x"c21" => DATA <= x"ff4c";
when "01" & x"c22" => DATA <= x"7725";
when "01" & x"c23" => DATA <= x"a984";
when "01" & x"c24" => DATA <= x"20f4";
when "01" & x"c25" => DATA <= x"ffc0";
when "01" & x"c26" => DATA <= x"80d0";
when "01" & x"c27" => DATA <= x"08a9";
when "01" & x"c28" => DATA <= x"01c5";
when "01" & x"c29" => DATA <= x"73d0";
when "01" & x"c2a" => DATA <= x"e7f0";
when "01" & x"c2b" => DATA <= x"e1a9";
when "01" & x"c2c" => DATA <= x"02c5";
when "01" & x"c2d" => DATA <= x"73d0";
when "01" & x"c2e" => DATA <= x"dbf0";
when "01" & x"c2f" => DATA <= x"dd68";
when "01" & x"c30" => DATA <= x"aa29";
when "01" & x"c31" => DATA <= x"10d0";
when "01" & x"c32" => DATA <= x"088a";
when "01" & x"c33" => DATA <= x"290f";
when "01" & x"c34" => DATA <= x"85f4";
when "01" & x"c35" => DATA <= x"8d30";
when "01" & x"c36" => DATA <= x"fea0";
when "01" & x"c37" => DATA <= x"0ab1";
when "01" & x"c38" => DATA <= x"7085";
when "01" & x"c39" => DATA <= x"77c8";
when "01" & x"c3a" => DATA <= x"b170";
when "01" & x"c3b" => DATA <= x"8576";
when "01" & x"c3c" => DATA <= x"0577";
when "01" & x"c3d" => DATA <= x"d002";
when "01" & x"c3e" => DATA <= x"f06e";
when "01" & x"c3f" => DATA <= x"a577";
when "01" & x"c40" => DATA <= x"f002";
when "01" & x"c41" => DATA <= x"e676";
when "01" & x"c42" => DATA <= x"c8b1";
when "01" & x"c43" => DATA <= x"7048";
when "01" & x"c44" => DATA <= x"a577";
when "01" & x"c45" => DATA <= x"f011";
when "01" & x"c46" => DATA <= x"a576";
when "01" & x"c47" => DATA <= x"c901";
when "01" & x"c48" => DATA <= x"d00b";
when "01" & x"c49" => DATA <= x"6848";
when "01" & x"c4a" => DATA <= x"c906";
when "01" & x"c4b" => DATA <= x"9005";
when "01" & x"c4c" => DATA <= x"6838";
when "01" & x"c4d" => DATA <= x"e906";
when "01" & x"c4e" => DATA <= x"48a5";
when "01" & x"c4f" => DATA <= x"7018";
when "01" & x"c50" => DATA <= x"6906";
when "01" & x"c51" => DATA <= x"aaa9";
when "01" & x"c52" => DATA <= x"0065";
when "01" & x"c53" => DATA <= x"71a8";
when "01" & x"c54" => DATA <= x"6848";
when "01" & x"c55" => DATA <= x"2006";
when "01" & x"c56" => DATA <= x"04a6";
when "01" & x"c57" => DATA <= x"7768";
when "01" & x"c58" => DATA <= x"a000";
when "01" & x"c59" => DATA <= x"c900";
when "01" & x"c5a" => DATA <= x"f01e";
when "01" & x"c5b" => DATA <= x"c901";
when "01" & x"c5c" => DATA <= x"f035";
when "01" & x"c5d" => DATA <= x"c902";
when "01" & x"c5e" => DATA <= x"f049";
when "01" & x"c5f" => DATA <= x"c903";
when "01" & x"c60" => DATA <= x"f070";
when "01" & x"c61" => DATA <= x"c906";
when "01" & x"c62" => DATA <= x"f008";
when "01" & x"c63" => DATA <= x"c907";
when "01" & x"c64" => DATA <= x"f007";
when "01" & x"c65" => DATA <= x"a900";
when "01" & x"c66" => DATA <= x"f01e";
when "01" & x"c67" => DATA <= x"4c75";
when "01" & x"c68" => DATA <= x"264c";
when "01" & x"c69" => DATA <= x"a326";
when "01" & x"c6a" => DATA <= x"20f4";
when "01" & x"c6b" => DATA <= x"26ad";
when "01" & x"c6c" => DATA <= x"e5fe";
when "01" & x"c6d" => DATA <= x"9174";
when "01" & x"c6e" => DATA <= x"20f4";
when "01" & x"c6f" => DATA <= x"26e6";
when "01" & x"c70" => DATA <= x"74d0";
when "01" & x"c71" => DATA <= x"02e6";
when "01" & x"c72" => DATA <= x"75ca";
when "01" & x"c73" => DATA <= x"d0ef";
when "01" & x"c74" => DATA <= x"c676";
when "01" & x"c75" => DATA <= x"d0eb";
when "01" & x"c76" => DATA <= x"4cda";
when "01" & x"c77" => DATA <= x"26b1";
when "01" & x"c78" => DATA <= x"748d";
when "01" & x"c79" => DATA <= x"e5fe";
when "01" & x"c7a" => DATA <= x"20f4";
when "01" & x"c7b" => DATA <= x"26e6";
when "01" & x"c7c" => DATA <= x"74d0";
when "01" & x"c7d" => DATA <= x"02e6";
when "01" & x"c7e" => DATA <= x"75ca";
when "01" & x"c7f" => DATA <= x"d0ef";
when "01" & x"c80" => DATA <= x"c676";
when "01" & x"c81" => DATA <= x"d0eb";
when "01" & x"c82" => DATA <= x"4cda";
when "01" & x"c83" => DATA <= x"2620";
when "01" & x"c84" => DATA <= x"f426";
when "01" & x"c85" => DATA <= x"ade5";
when "01" & x"c86" => DATA <= x"fe91";
when "01" & x"c87" => DATA <= x"74e6";
when "01" & x"c88" => DATA <= x"74d0";
when "01" & x"c89" => DATA <= x"02e6";
when "01" & x"c8a" => DATA <= x"75ea";
when "01" & x"c8b" => DATA <= x"eaad";
when "01" & x"c8c" => DATA <= x"e5fe";
when "01" & x"c8d" => DATA <= x"9174";
when "01" & x"c8e" => DATA <= x"e674";
when "01" & x"c8f" => DATA <= x"d002";
when "01" & x"c90" => DATA <= x"e675";
when "01" & x"c91" => DATA <= x"20f3";
when "01" & x"c92" => DATA <= x"26ea";
when "01" & x"c93" => DATA <= x"eaca";
when "01" & x"c94" => DATA <= x"cad0";
when "01" & x"c95" => DATA <= x"dfc6";
when "01" & x"c96" => DATA <= x"76d0";
when "01" & x"c97" => DATA <= x"db4c";
when "01" & x"c98" => DATA <= x"da26";
when "01" & x"c99" => DATA <= x"b174";
when "01" & x"c9a" => DATA <= x"8de5";
when "01" & x"c9b" => DATA <= x"fee6";
when "01" & x"c9c" => DATA <= x"74f0";
when "01" & x"c9d" => DATA <= x"03ea";
when "01" & x"c9e" => DATA <= x"d002";
when "01" & x"c9f" => DATA <= x"e675";
when "01" & x"ca0" => DATA <= x"a573";
when "01" & x"ca1" => DATA <= x"b174";
when "01" & x"ca2" => DATA <= x"8de5";
when "01" & x"ca3" => DATA <= x"fee6";
when "01" & x"ca4" => DATA <= x"74f0";
when "01" & x"ca5" => DATA <= x"03ea";
when "01" & x"ca6" => DATA <= x"d002";
when "01" & x"ca7" => DATA <= x"e675";
when "01" & x"ca8" => DATA <= x"20f3";
when "01" & x"ca9" => DATA <= x"26ca";
when "01" & x"caa" => DATA <= x"cad0";
when "01" & x"cab" => DATA <= x"dbc6";
when "01" & x"cac" => DATA <= x"76d0";
when "01" & x"cad" => DATA <= x"d7f0";
when "01" & x"cae" => DATA <= x"6520";
when "01" & x"caf" => DATA <= x"f426";
when "01" & x"cb0" => DATA <= x"ade5";
when "01" & x"cb1" => DATA <= x"fe91";
when "01" & x"cb2" => DATA <= x"74ea";
when "01" & x"cb3" => DATA <= x"eaea";
when "01" & x"cb4" => DATA <= x"c8d0";
when "01" & x"cb5" => DATA <= x"f5e0";
when "01" & x"cb6" => DATA <= x"00d0";
when "01" & x"cb7" => DATA <= x"0cc6";
when "01" & x"cb8" => DATA <= x"76f0";
when "01" & x"cb9" => DATA <= x"4f20";
when "01" & x"cba" => DATA <= x"ce26";
when "01" & x"cbb" => DATA <= x"a906";
when "01" & x"cbc" => DATA <= x"4c9f";
when "01" & x"cbd" => DATA <= x"25c6";
when "01" & x"cbe" => DATA <= x"76a5";
when "01" & x"cbf" => DATA <= x"76c9";
when "01" & x"cc0" => DATA <= x"01d0";
when "01" & x"cc1" => DATA <= x"f020";
when "01" & x"cc2" => DATA <= x"ce26";
when "01" & x"cc3" => DATA <= x"a900";
when "01" & x"cc4" => DATA <= x"4c9f";
when "01" & x"cc5" => DATA <= x"25b1";
when "01" & x"cc6" => DATA <= x"748d";
when "01" & x"cc7" => DATA <= x"e5fe";
when "01" & x"cc8" => DATA <= x"eaea";
when "01" & x"cc9" => DATA <= x"eac8";
when "01" & x"cca" => DATA <= x"d0f5";
when "01" & x"ccb" => DATA <= x"e000";
when "01" & x"ccc" => DATA <= x"d00c";
when "01" & x"ccd" => DATA <= x"c676";
when "01" & x"cce" => DATA <= x"f024";
when "01" & x"ccf" => DATA <= x"20ce";
when "01" & x"cd0" => DATA <= x"26a9";
when "01" & x"cd1" => DATA <= x"074c";
when "01" & x"cd2" => DATA <= x"9f25";
when "01" & x"cd3" => DATA <= x"c676";
when "01" & x"cd4" => DATA <= x"a576";
when "01" & x"cd5" => DATA <= x"c901";
when "01" & x"cd6" => DATA <= x"d0f0";
when "01" & x"cd7" => DATA <= x"20ce";
when "01" & x"cd8" => DATA <= x"26a9";
when "01" & x"cd9" => DATA <= x"014c";
when "01" & x"cda" => DATA <= x"9f25";
when "01" & x"cdb" => DATA <= x"e675";
when "01" & x"cdc" => DATA <= x"a007";
when "01" & x"cdd" => DATA <= x"b170";
when "01" & x"cde" => DATA <= x"1869";
when "01" & x"cdf" => DATA <= x"0191";
when "01" & x"ce0" => DATA <= x"7060";
when "01" & x"ce1" => DATA <= x"a987";
when "01" & x"ce2" => DATA <= x"2006";
when "01" & x"ce3" => DATA <= x"04a5";
when "01" & x"ce4" => DATA <= x"72c5";
when "01" & x"ce5" => DATA <= x"f4f0";
when "01" & x"ce6" => DATA <= x"0585";
when "01" & x"ce7" => DATA <= x"f48d";
when "01" & x"ce8" => DATA <= x"30fe";
when "01" & x"ce9" => DATA <= x"688d";
when "01" & x"cea" => DATA <= x"34fe";
when "01" & x"ceb" => DATA <= x"a670";
when "01" & x"cec" => DATA <= x"a471";
when "01" & x"ced" => DATA <= x"6860";
when "01" & x"cee" => DATA <= x"20f3";
when "01" & x"cef" => DATA <= x"2620";
when "01" & x"cf0" => DATA <= x"f326";
when "01" & x"cf1" => DATA <= x"6000";
when "01" & x"cf2" => DATA <= x"003c";
when "01" & x"cf3" => DATA <= x"ffff";
when "01" & x"cf4" => DATA <= x"4f52";
when "01" & x"cf5" => DATA <= x"4920";
when "01" & x"cf6" => DATA <= x"2000";
when "01" & x"cf7" => DATA <= x"003f";
when "01" & x"cf8" => DATA <= x"39e4";
when "01" & x"cf9" => DATA <= x"007c";
when "01" & x"cfa" => DATA <= x"ffff";
when "01" & x"cfb" => DATA <= x"4f52";
when "01" & x"cfc" => DATA <= x"4920";
when "01" & x"cfd" => DATA <= x"2000";
when "01" & x"cfe" => DATA <= x"003f";
when "01" & x"cff" => DATA <= x"39e4";
when "01" & x"d00" => DATA <= x"023c";
when "01" & x"d01" => DATA <= x"ffff";
when "01" & x"d02" => DATA <= x"414e";
when "01" & x"d03" => DATA <= x"4449";
when "01" & x"d04" => DATA <= x"2000";
when "01" & x"d05" => DATA <= x"003f";
when "01" & x"d06" => DATA <= x"39e4";
when "01" & x"d07" => DATA <= x"027c";
when "01" & x"d08" => DATA <= x"ffff";
when "01" & x"d09" => DATA <= x"414e";
when "01" & x"d0a" => DATA <= x"4449";
when "01" & x"d0b" => DATA <= x"2000";
when "01" & x"d0c" => DATA <= x"003f";
when "01" & x"d0d" => DATA <= x"39e4";
when "01" & x"d0e" => DATA <= x"0a3c";
when "01" & x"d0f" => DATA <= x"ffff";
when "01" & x"d10" => DATA <= x"454f";
when "01" & x"d11" => DATA <= x"5249";
when "01" & x"d12" => DATA <= x"2000";
when "01" & x"d13" => DATA <= x"003f";
when "01" & x"d14" => DATA <= x"39e4";
when "01" & x"d15" => DATA <= x"0a7c";
when "01" & x"d16" => DATA <= x"ffff";
when "01" & x"d17" => DATA <= x"454f";
when "01" & x"d18" => DATA <= x"5249";
when "01" & x"d19" => DATA <= x"2000";
when "01" & x"d1a" => DATA <= x"003f";
when "01" & x"d1b" => DATA <= x"39e4";
when "01" & x"d1c" => DATA <= x"0800";
when "01" & x"d1d" => DATA <= x"ffc0";
when "01" & x"d1e" => DATA <= x"4254";
when "01" & x"d1f" => DATA <= x"5354";
when "01" & x"d20" => DATA <= x"2000";
when "01" & x"d21" => DATA <= x"003f";
when "01" & x"d22" => DATA <= x"39e4";
when "01" & x"d23" => DATA <= x"0840";
when "01" & x"d24" => DATA <= x"ffc0";
when "01" & x"d25" => DATA <= x"4243";
when "01" & x"d26" => DATA <= x"4847";
when "01" & x"d27" => DATA <= x"2000";
when "01" & x"d28" => DATA <= x"003f";
when "01" & x"d29" => DATA <= x"39e4";
when "01" & x"d2a" => DATA <= x"0880";
when "01" & x"d2b" => DATA <= x"ffc0";
when "01" & x"d2c" => DATA <= x"4243";
when "01" & x"d2d" => DATA <= x"4c52";
when "01" & x"d2e" => DATA <= x"2000";
when "01" & x"d2f" => DATA <= x"003f";
when "01" & x"d30" => DATA <= x"39e4";
when "01" & x"d31" => DATA <= x"08c0";
when "01" & x"d32" => DATA <= x"ffc0";
when "01" & x"d33" => DATA <= x"4253";
when "01" & x"d34" => DATA <= x"4554";
when "01" & x"d35" => DATA <= x"2000";
when "01" & x"d36" => DATA <= x"003f";
when "01" & x"d37" => DATA <= x"39e4";
when "01" & x"d38" => DATA <= x"0000";
when "01" & x"d39" => DATA <= x"ff00";
when "01" & x"d3a" => DATA <= x"4f52";
when "01" & x"d3b" => DATA <= x"4920";
when "01" & x"d3c" => DATA <= x"2000";
when "01" & x"d3d" => DATA <= x"003f";
when "01" & x"d3e" => DATA <= x"39e4";
when "01" & x"d3f" => DATA <= x"0200";
when "01" & x"d40" => DATA <= x"ff00";
when "01" & x"d41" => DATA <= x"414e";
when "01" & x"d42" => DATA <= x"4449";
when "01" & x"d43" => DATA <= x"2000";
when "01" & x"d44" => DATA <= x"003f";
when "01" & x"d45" => DATA <= x"39e4";
when "01" & x"d46" => DATA <= x"0400";
when "01" & x"d47" => DATA <= x"ff00";
when "01" & x"d48" => DATA <= x"5355";
when "01" & x"d49" => DATA <= x"4249";
when "01" & x"d4a" => DATA <= x"2000";
when "01" & x"d4b" => DATA <= x"003f";
when "01" & x"d4c" => DATA <= x"39e4";
when "01" & x"d4d" => DATA <= x"0600";
when "01" & x"d4e" => DATA <= x"ff00";
when "01" & x"d4f" => DATA <= x"4144";
when "01" & x"d50" => DATA <= x"4449";
when "01" & x"d51" => DATA <= x"2000";
when "01" & x"d52" => DATA <= x"003f";
when "01" & x"d53" => DATA <= x"39e4";
when "01" & x"d54" => DATA <= x"0a00";
when "01" & x"d55" => DATA <= x"ff00";
when "01" & x"d56" => DATA <= x"454f";
when "01" & x"d57" => DATA <= x"5249";
when "01" & x"d58" => DATA <= x"2000";
when "01" & x"d59" => DATA <= x"003f";
when "01" & x"d5a" => DATA <= x"39e4";
when "01" & x"d5b" => DATA <= x"0c00";
when "01" & x"d5c" => DATA <= x"ff00";
when "01" & x"d5d" => DATA <= x"434d";
when "01" & x"d5e" => DATA <= x"5049";
when "01" & x"d5f" => DATA <= x"2000";
when "01" & x"d60" => DATA <= x"003f";
when "01" & x"d61" => DATA <= x"39e4";
when "01" & x"d62" => DATA <= x"0108";
when "01" & x"d63" => DATA <= x"f138";
when "01" & x"d64" => DATA <= x"4d4f";
when "01" & x"d65" => DATA <= x"5645";
when "01" & x"d66" => DATA <= x"5000";
when "01" & x"d67" => DATA <= x"003f";
when "01" & x"d68" => DATA <= x"39e4";
when "01" & x"d69" => DATA <= x"0100";
when "01" & x"d6a" => DATA <= x"f1c0";
when "01" & x"d6b" => DATA <= x"4254";
when "01" & x"d6c" => DATA <= x"5354";
when "01" & x"d6d" => DATA <= x"2000";
when "01" & x"d6e" => DATA <= x"003f";
when "01" & x"d6f" => DATA <= x"39e4";
when "01" & x"d70" => DATA <= x"0140";
when "01" & x"d71" => DATA <= x"f1c0";
when "01" & x"d72" => DATA <= x"4243";
when "01" & x"d73" => DATA <= x"4847";
when "01" & x"d74" => DATA <= x"2000";
when "01" & x"d75" => DATA <= x"003f";
when "01" & x"d76" => DATA <= x"39e4";
when "01" & x"d77" => DATA <= x"0180";
when "01" & x"d78" => DATA <= x"f1c0";
when "01" & x"d79" => DATA <= x"4243";
when "01" & x"d7a" => DATA <= x"4c52";
when "01" & x"d7b" => DATA <= x"2000";
when "01" & x"d7c" => DATA <= x"003f";
when "01" & x"d7d" => DATA <= x"39e4";
when "01" & x"d7e" => DATA <= x"01c0";
when "01" & x"d7f" => DATA <= x"f1c0";
when "01" & x"d80" => DATA <= x"4253";
when "01" & x"d81" => DATA <= x"4554";
when "01" & x"d82" => DATA <= x"2000";
when "01" & x"d83" => DATA <= x"003f";
when "01" & x"d84" => DATA <= x"39e4";
when "01" & x"d85" => DATA <= x"0040";
when "01" & x"d86" => DATA <= x"c1c0";
when "01" & x"d87" => DATA <= x"4d4f";
when "01" & x"d88" => DATA <= x"5645";
when "01" & x"d89" => DATA <= x"4100";
when "01" & x"d8a" => DATA <= x"003f";
when "01" & x"d8b" => DATA <= x"39e4";
when "01" & x"d8c" => DATA <= x"0000";
when "01" & x"d8d" => DATA <= x"c000";
when "01" & x"d8e" => DATA <= x"4d4f";
when "01" & x"d8f" => DATA <= x"5645";
when "01" & x"d90" => DATA <= x"2000";
when "01" & x"d91" => DATA <= x"003f";
when "01" & x"d92" => DATA <= x"39e4";
when "01" & x"d93" => DATA <= x"4afc";
when "01" & x"d94" => DATA <= x"ffff";
when "01" & x"d95" => DATA <= x"494c";
when "01" & x"d96" => DATA <= x"4c45";
when "01" & x"d97" => DATA <= x"4700";
when "01" & x"d98" => DATA <= x"003f";
when "01" & x"d99" => DATA <= x"39e4";
when "01" & x"d9a" => DATA <= x"4e70";
when "01" & x"d9b" => DATA <= x"ffff";
when "01" & x"d9c" => DATA <= x"5245";
when "01" & x"d9d" => DATA <= x"5345";
when "01" & x"d9e" => DATA <= x"5400";
when "01" & x"d9f" => DATA <= x"003f";
when "01" & x"da0" => DATA <= x"39e4";
when "01" & x"da1" => DATA <= x"4e71";
when "01" & x"da2" => DATA <= x"ffff";
when "01" & x"da3" => DATA <= x"4e4f";
when "01" & x"da4" => DATA <= x"5020";
when "01" & x"da5" => DATA <= x"2000";
when "01" & x"da6" => DATA <= x"003f";
when "01" & x"da7" => DATA <= x"39e4";
when "01" & x"da8" => DATA <= x"4e72";
when "01" & x"da9" => DATA <= x"ffff";
when "01" & x"daa" => DATA <= x"5354";
when "01" & x"dab" => DATA <= x"4f50";
when "01" & x"dac" => DATA <= x"2000";
when "01" & x"dad" => DATA <= x"003f";
when "01" & x"dae" => DATA <= x"39e4";
when "01" & x"daf" => DATA <= x"4e73";
when "01" & x"db0" => DATA <= x"ffff";
when "01" & x"db1" => DATA <= x"5254";
when "01" & x"db2" => DATA <= x"4520";
when "01" & x"db3" => DATA <= x"2000";
when "01" & x"db4" => DATA <= x"003f";
when "01" & x"db5" => DATA <= x"39e4";
when "01" & x"db6" => DATA <= x"4e75";
when "01" & x"db7" => DATA <= x"ffff";
when "01" & x"db8" => DATA <= x"5254";
when "01" & x"db9" => DATA <= x"5320";
when "01" & x"dba" => DATA <= x"2000";
when "01" & x"dbb" => DATA <= x"003f";
when "01" & x"dbc" => DATA <= x"39e4";
when "01" & x"dbd" => DATA <= x"4e76";
when "01" & x"dbe" => DATA <= x"ffff";
when "01" & x"dbf" => DATA <= x"5452";
when "01" & x"dc0" => DATA <= x"4150";
when "01" & x"dc1" => DATA <= x"5600";
when "01" & x"dc2" => DATA <= x"003f";
when "01" & x"dc3" => DATA <= x"39e4";
when "01" & x"dc4" => DATA <= x"4e77";
when "01" & x"dc5" => DATA <= x"ffff";
when "01" & x"dc6" => DATA <= x"5254";
when "01" & x"dc7" => DATA <= x"5220";
when "01" & x"dc8" => DATA <= x"2000";
when "01" & x"dc9" => DATA <= x"003f";
when "01" & x"dca" => DATA <= x"39e4";
when "01" & x"dcb" => DATA <= x"4840";
when "01" & x"dcc" => DATA <= x"fff8";
when "01" & x"dcd" => DATA <= x"5357";
when "01" & x"dce" => DATA <= x"4150";
when "01" & x"dcf" => DATA <= x"2000";
when "01" & x"dd0" => DATA <= x"003f";
when "01" & x"dd1" => DATA <= x"39e4";
when "01" & x"dd2" => DATA <= x"4e50";
when "01" & x"dd3" => DATA <= x"fff8";
when "01" & x"dd4" => DATA <= x"4c49";
when "01" & x"dd5" => DATA <= x"4e4b";
when "01" & x"dd6" => DATA <= x"2000";
when "01" & x"dd7" => DATA <= x"003f";
when "01" & x"dd8" => DATA <= x"39e4";
when "01" & x"dd9" => DATA <= x"4e58";
when "01" & x"dda" => DATA <= x"fff8";
when "01" & x"ddb" => DATA <= x"554e";
when "01" & x"ddc" => DATA <= x"4c4b";
when "01" & x"ddd" => DATA <= x"2000";
when "01" & x"dde" => DATA <= x"003f";
when "01" & x"ddf" => DATA <= x"39e4";
when "01" & x"de0" => DATA <= x"4e60";
when "01" & x"de1" => DATA <= x"fff0";
when "01" & x"de2" => DATA <= x"4d4f";
when "01" & x"de3" => DATA <= x"5645";
when "01" & x"de4" => DATA <= x"2000";
when "01" & x"de5" => DATA <= x"003f";
when "01" & x"de6" => DATA <= x"39e4";
when "01" & x"de7" => DATA <= x"4e40";
when "01" & x"de8" => DATA <= x"fff0";
when "01" & x"de9" => DATA <= x"5452";
when "01" & x"dea" => DATA <= x"4150";
when "01" & x"deb" => DATA <= x"2000";
when "01" & x"dec" => DATA <= x"003f";
when "01" & x"ded" => DATA <= x"39e4";
when "01" & x"dee" => DATA <= x"4e80";
when "01" & x"def" => DATA <= x"ffc0";
when "01" & x"df0" => DATA <= x"4a53";
when "01" & x"df1" => DATA <= x"5220";
when "01" & x"df2" => DATA <= x"2000";
when "01" & x"df3" => DATA <= x"003f";
when "01" & x"df4" => DATA <= x"39e4";
when "01" & x"df5" => DATA <= x"4ec0";
when "01" & x"df6" => DATA <= x"ffc0";
when "01" & x"df7" => DATA <= x"4a4d";
when "01" & x"df8" => DATA <= x"5020";
when "01" & x"df9" => DATA <= x"2000";
when "01" & x"dfa" => DATA <= x"003f";
when "01" & x"dfb" => DATA <= x"39e4";
when "01" & x"dfc" => DATA <= x"4880";
when "01" & x"dfd" => DATA <= x"feb8";
when "01" & x"dfe" => DATA <= x"4558";
when "01" & x"dff" => DATA <= x"5420";
when "01" & x"e00" => DATA <= x"2000";
when "01" & x"e01" => DATA <= x"003f";
when "01" & x"e02" => DATA <= x"39e4";
when "01" & x"e03" => DATA <= x"40c0";
when "01" & x"e04" => DATA <= x"ffc0";
when "01" & x"e05" => DATA <= x"4d4f";
when "01" & x"e06" => DATA <= x"5645";
when "01" & x"e07" => DATA <= x"2000";
when "01" & x"e08" => DATA <= x"003f";
when "01" & x"e09" => DATA <= x"39e4";
when "01" & x"e0a" => DATA <= x"44c0";
when "01" & x"e0b" => DATA <= x"ffc0";
when "01" & x"e0c" => DATA <= x"4d4f";
when "01" & x"e0d" => DATA <= x"5645";
when "01" & x"e0e" => DATA <= x"2000";
when "01" & x"e0f" => DATA <= x"003f";
when "01" & x"e10" => DATA <= x"39e4";
when "01" & x"e11" => DATA <= x"46c0";
when "01" & x"e12" => DATA <= x"ffc0";
when "01" & x"e13" => DATA <= x"4d4f";
when "01" & x"e14" => DATA <= x"5645";
when "01" & x"e15" => DATA <= x"2000";
when "01" & x"e16" => DATA <= x"003f";
when "01" & x"e17" => DATA <= x"39e4";
when "01" & x"e18" => DATA <= x"4800";
when "01" & x"e19" => DATA <= x"ffc0";
when "01" & x"e1a" => DATA <= x"4e42";
when "01" & x"e1b" => DATA <= x"4344";
when "01" & x"e1c" => DATA <= x"2000";
when "01" & x"e1d" => DATA <= x"003f";
when "01" & x"e1e" => DATA <= x"39e4";
when "01" & x"e1f" => DATA <= x"4840";
when "01" & x"e20" => DATA <= x"ffc0";
when "01" & x"e21" => DATA <= x"5045";
when "01" & x"e22" => DATA <= x"4120";
when "01" & x"e23" => DATA <= x"2000";
when "01" & x"e24" => DATA <= x"003f";
when "01" & x"e25" => DATA <= x"39e4";
when "01" & x"e26" => DATA <= x"4ac0";
when "01" & x"e27" => DATA <= x"ffc0";
when "01" & x"e28" => DATA <= x"5441";
when "01" & x"e29" => DATA <= x"5320";
when "01" & x"e2a" => DATA <= x"2000";
when "01" & x"e2b" => DATA <= x"003f";
when "01" & x"e2c" => DATA <= x"39e4";
when "01" & x"e2d" => DATA <= x"4000";
when "01" & x"e2e" => DATA <= x"ff00";
when "01" & x"e2f" => DATA <= x"4e45";
when "01" & x"e30" => DATA <= x"4758";
when "01" & x"e31" => DATA <= x"2000";
when "01" & x"e32" => DATA <= x"003f";
when "01" & x"e33" => DATA <= x"39e4";
when "01" & x"e34" => DATA <= x"4200";
when "01" & x"e35" => DATA <= x"ff00";
when "01" & x"e36" => DATA <= x"434c";
when "01" & x"e37" => DATA <= x"5220";
when "01" & x"e38" => DATA <= x"2000";
when "01" & x"e39" => DATA <= x"003f";
when "01" & x"e3a" => DATA <= x"39e4";
when "01" & x"e3b" => DATA <= x"4400";
when "01" & x"e3c" => DATA <= x"ff00";
when "01" & x"e3d" => DATA <= x"4e45";
when "01" & x"e3e" => DATA <= x"4720";
when "01" & x"e3f" => DATA <= x"2000";
when "01" & x"e40" => DATA <= x"003f";
when "01" & x"e41" => DATA <= x"39e4";
when "01" & x"e42" => DATA <= x"4600";
when "01" & x"e43" => DATA <= x"ff00";
when "01" & x"e44" => DATA <= x"4e4f";
when "01" & x"e45" => DATA <= x"5420";
when "01" & x"e46" => DATA <= x"2000";
when "01" & x"e47" => DATA <= x"003f";
when "01" & x"e48" => DATA <= x"39e4";
when "01" & x"e49" => DATA <= x"4a00";
when "01" & x"e4a" => DATA <= x"ff00";
when "01" & x"e4b" => DATA <= x"5453";
when "01" & x"e4c" => DATA <= x"5420";
when "01" & x"e4d" => DATA <= x"2000";
when "01" & x"e4e" => DATA <= x"003f";
when "01" & x"e4f" => DATA <= x"39e4";
when "01" & x"e50" => DATA <= x"4880";
when "01" & x"e51" => DATA <= x"fb80";
when "01" & x"e52" => DATA <= x"4d4f";
when "01" & x"e53" => DATA <= x"5645";
when "01" & x"e54" => DATA <= x"4d00";
when "01" & x"e55" => DATA <= x"003f";
when "01" & x"e56" => DATA <= x"39e4";
when "01" & x"e57" => DATA <= x"41c0";
when "01" & x"e58" => DATA <= x"f1c0";
when "01" & x"e59" => DATA <= x"4c45";
when "01" & x"e5a" => DATA <= x"4120";
when "01" & x"e5b" => DATA <= x"2000";
when "01" & x"e5c" => DATA <= x"003f";
when "01" & x"e5d" => DATA <= x"39e4";
when "01" & x"e5e" => DATA <= x"4000";
when "01" & x"e5f" => DATA <= x"f040";
when "01" & x"e60" => DATA <= x"4348";
when "01" & x"e61" => DATA <= x"4b20";
when "01" & x"e62" => DATA <= x"2000";
when "01" & x"e63" => DATA <= x"003f";
when "01" & x"e64" => DATA <= x"39e4";
when "01" & x"e65" => DATA <= x"50c8";
when "01" & x"e66" => DATA <= x"f0f8";
when "01" & x"e67" => DATA <= x"4442";
when "01" & x"e68" => DATA <= x"2020";
when "01" & x"e69" => DATA <= x"2000";
when "01" & x"e6a" => DATA <= x"003f";
when "01" & x"e6b" => DATA <= x"39e4";
when "01" & x"e6c" => DATA <= x"50c0";
when "01" & x"e6d" => DATA <= x"f0c0";
when "01" & x"e6e" => DATA <= x"5320";
when "01" & x"e6f" => DATA <= x"2020";
when "01" & x"e70" => DATA <= x"2000";
when "01" & x"e71" => DATA <= x"003f";
when "01" & x"e72" => DATA <= x"39e4";
when "01" & x"e73" => DATA <= x"5000";
when "01" & x"e74" => DATA <= x"f100";
when "01" & x"e75" => DATA <= x"4144";
when "01" & x"e76" => DATA <= x"4451";
when "01" & x"e77" => DATA <= x"2000";
when "01" & x"e78" => DATA <= x"003f";
when "01" & x"e79" => DATA <= x"39e4";
when "01" & x"e7a" => DATA <= x"5100";
when "01" & x"e7b" => DATA <= x"f100";
when "01" & x"e7c" => DATA <= x"5355";
when "01" & x"e7d" => DATA <= x"4251";
when "01" & x"e7e" => DATA <= x"2000";
when "01" & x"e7f" => DATA <= x"003f";
when "01" & x"e80" => DATA <= x"39e4";
when "01" & x"e81" => DATA <= x"6000";
when "01" & x"e82" => DATA <= x"ff00";
when "01" & x"e83" => DATA <= x"4252";
when "01" & x"e84" => DATA <= x"4120";
when "01" & x"e85" => DATA <= x"2000";
when "01" & x"e86" => DATA <= x"003f";
when "01" & x"e87" => DATA <= x"39e4";
when "01" & x"e88" => DATA <= x"6100";
when "01" & x"e89" => DATA <= x"ff00";
when "01" & x"e8a" => DATA <= x"4253";
when "01" & x"e8b" => DATA <= x"5220";
when "01" & x"e8c" => DATA <= x"2000";
when "01" & x"e8d" => DATA <= x"003f";
when "01" & x"e8e" => DATA <= x"39e4";
when "01" & x"e8f" => DATA <= x"6000";
when "01" & x"e90" => DATA <= x"f000";
when "01" & x"e91" => DATA <= x"4200";
when "01" & x"e92" => DATA <= x"0000";
when "01" & x"e93" => DATA <= x"0000";
when "01" & x"e94" => DATA <= x"003f";
when "01" & x"e95" => DATA <= x"39e4";
when "01" & x"e96" => DATA <= x"7000";
when "01" & x"e97" => DATA <= x"f100";
when "01" & x"e98" => DATA <= x"4d4f";
when "01" & x"e99" => DATA <= x"5645";
when "01" & x"e9a" => DATA <= x"5100";
when "01" & x"e9b" => DATA <= x"003f";
when "01" & x"e9c" => DATA <= x"39e4";
when "01" & x"e9d" => DATA <= x"8100";
when "01" & x"e9e" => DATA <= x"f1f0";
when "01" & x"e9f" => DATA <= x"5342";
when "01" & x"ea0" => DATA <= x"4344";
when "01" & x"ea1" => DATA <= x"2000";
when "01" & x"ea2" => DATA <= x"003f";
when "01" & x"ea3" => DATA <= x"39e4";
when "01" & x"ea4" => DATA <= x"80c0";
when "01" & x"ea5" => DATA <= x"f1c0";
when "01" & x"ea6" => DATA <= x"4449";
when "01" & x"ea7" => DATA <= x"5655";
when "01" & x"ea8" => DATA <= x"2000";
when "01" & x"ea9" => DATA <= x"003f";
when "01" & x"eaa" => DATA <= x"39e4";
when "01" & x"eab" => DATA <= x"81c0";
when "01" & x"eac" => DATA <= x"f1c0";
when "01" & x"ead" => DATA <= x"4449";
when "01" & x"eae" => DATA <= x"5653";
when "01" & x"eaf" => DATA <= x"2000";
when "01" & x"eb0" => DATA <= x"003f";
when "01" & x"eb1" => DATA <= x"39e4";
when "01" & x"eb2" => DATA <= x"8000";
when "01" & x"eb3" => DATA <= x"f000";
when "01" & x"eb4" => DATA <= x"4f52";
when "01" & x"eb5" => DATA <= x"2020";
when "01" & x"eb6" => DATA <= x"2000";
when "01" & x"eb7" => DATA <= x"003f";
when "01" & x"eb8" => DATA <= x"39e4";
when "01" & x"eb9" => DATA <= x"9100";
when "01" & x"eba" => DATA <= x"f130";
when "01" & x"ebb" => DATA <= x"5355";
when "01" & x"ebc" => DATA <= x"4258";
when "01" & x"ebd" => DATA <= x"2000";
when "01" & x"ebe" => DATA <= x"003f";
when "01" & x"ebf" => DATA <= x"39e4";
when "01" & x"ec0" => DATA <= x"90c0";
when "01" & x"ec1" => DATA <= x"f0c0";
when "01" & x"ec2" => DATA <= x"5355";
when "01" & x"ec3" => DATA <= x"4241";
when "01" & x"ec4" => DATA <= x"2000";
when "01" & x"ec5" => DATA <= x"003f";
when "01" & x"ec6" => DATA <= x"39e4";
when "01" & x"ec7" => DATA <= x"9000";
when "01" & x"ec8" => DATA <= x"f000";
when "01" & x"ec9" => DATA <= x"5355";
when "01" & x"eca" => DATA <= x"4220";
when "01" & x"ecb" => DATA <= x"2000";
when "01" & x"ecc" => DATA <= x"003f";
when "01" & x"ecd" => DATA <= x"39e4";
when "01" & x"ece" => DATA <= x"b108";
when "01" & x"ecf" => DATA <= x"f138";
when "01" & x"ed0" => DATA <= x"434d";
when "01" & x"ed1" => DATA <= x"504d";
when "01" & x"ed2" => DATA <= x"2000";
when "01" & x"ed3" => DATA <= x"003f";
when "01" & x"ed4" => DATA <= x"39e4";
when "01" & x"ed5" => DATA <= x"b0c0";
when "01" & x"ed6" => DATA <= x"f0c0";
when "01" & x"ed7" => DATA <= x"434d";
when "01" & x"ed8" => DATA <= x"5041";
when "01" & x"ed9" => DATA <= x"2000";
when "01" & x"eda" => DATA <= x"003f";
when "01" & x"edb" => DATA <= x"39e4";
when "01" & x"edc" => DATA <= x"b100";
when "01" & x"edd" => DATA <= x"f100";
when "01" & x"ede" => DATA <= x"454f";
when "01" & x"edf" => DATA <= x"5220";
when "01" & x"ee0" => DATA <= x"2000";
when "01" & x"ee1" => DATA <= x"003f";
when "01" & x"ee2" => DATA <= x"39e4";
when "01" & x"ee3" => DATA <= x"b000";
when "01" & x"ee4" => DATA <= x"f000";
when "01" & x"ee5" => DATA <= x"434d";
when "01" & x"ee6" => DATA <= x"5020";
when "01" & x"ee7" => DATA <= x"2000";
when "01" & x"ee8" => DATA <= x"003f";
when "01" & x"ee9" => DATA <= x"39e4";
when "01" & x"eea" => DATA <= x"c140";
when "01" & x"eeb" => DATA <= x"f1f8";
when "01" & x"eec" => DATA <= x"4558";
when "01" & x"eed" => DATA <= x"4720";
when "01" & x"eee" => DATA <= x"2000";
when "01" & x"eef" => DATA <= x"003f";
when "01" & x"ef0" => DATA <= x"39e4";
when "01" & x"ef1" => DATA <= x"c148";
when "01" & x"ef2" => DATA <= x"f1f8";
when "01" & x"ef3" => DATA <= x"4558";
when "01" & x"ef4" => DATA <= x"4720";
when "01" & x"ef5" => DATA <= x"2000";
when "01" & x"ef6" => DATA <= x"003f";
when "01" & x"ef7" => DATA <= x"39e4";
when "01" & x"ef8" => DATA <= x"c188";
when "01" & x"ef9" => DATA <= x"f1f8";
when "01" & x"efa" => DATA <= x"4558";
when "01" & x"efb" => DATA <= x"4720";
when "01" & x"efc" => DATA <= x"2000";
when "01" & x"efd" => DATA <= x"003f";
when "01" & x"efe" => DATA <= x"39e4";
when "01" & x"eff" => DATA <= x"c100";
when "01" & x"f00" => DATA <= x"f1f0";
when "01" & x"f01" => DATA <= x"4142";
when "01" & x"f02" => DATA <= x"4344";
when "01" & x"f03" => DATA <= x"2000";
when "01" & x"f04" => DATA <= x"003f";
when "01" & x"f05" => DATA <= x"39e4";
when "01" & x"f06" => DATA <= x"c1c0";
when "01" & x"f07" => DATA <= x"f1c0";
when "01" & x"f08" => DATA <= x"4d55";
when "01" & x"f09" => DATA <= x"4c53";
when "01" & x"f0a" => DATA <= x"2000";
when "01" & x"f0b" => DATA <= x"003f";
when "01" & x"f0c" => DATA <= x"39e4";
when "01" & x"f0d" => DATA <= x"c0c0";
when "01" & x"f0e" => DATA <= x"f1c0";
when "01" & x"f0f" => DATA <= x"4d55";
when "01" & x"f10" => DATA <= x"4c55";
when "01" & x"f11" => DATA <= x"2000";
when "01" & x"f12" => DATA <= x"003f";
when "01" & x"f13" => DATA <= x"39e4";
when "01" & x"f14" => DATA <= x"c000";
when "01" & x"f15" => DATA <= x"f000";
when "01" & x"f16" => DATA <= x"414e";
when "01" & x"f17" => DATA <= x"4420";
when "01" & x"f18" => DATA <= x"2000";
when "01" & x"f19" => DATA <= x"003f";
when "01" & x"f1a" => DATA <= x"39e4";
when "01" & x"f1b" => DATA <= x"d100";
when "01" & x"f1c" => DATA <= x"f130";
when "01" & x"f1d" => DATA <= x"4144";
when "01" & x"f1e" => DATA <= x"4458";
when "01" & x"f1f" => DATA <= x"2000";
when "01" & x"f20" => DATA <= x"003f";
when "01" & x"f21" => DATA <= x"39e4";
when "01" & x"f22" => DATA <= x"d0c0";
when "01" & x"f23" => DATA <= x"f0c0";
when "01" & x"f24" => DATA <= x"4144";
when "01" & x"f25" => DATA <= x"4441";
when "01" & x"f26" => DATA <= x"2000";
when "01" & x"f27" => DATA <= x"003f";
when "01" & x"f28" => DATA <= x"39e4";
when "01" & x"f29" => DATA <= x"d000";
when "01" & x"f2a" => DATA <= x"f000";
when "01" & x"f2b" => DATA <= x"4144";
when "01" & x"f2c" => DATA <= x"4420";
when "01" & x"f2d" => DATA <= x"2000";
when "01" & x"f2e" => DATA <= x"003f";
when "01" & x"f2f" => DATA <= x"39e4";
when "01" & x"f30" => DATA <= x"e0c0";
when "01" & x"f31" => DATA <= x"fec0";
when "01" & x"f32" => DATA <= x"4153";
when "01" & x"f33" => DATA <= x"2020";
when "01" & x"f34" => DATA <= x"2000";
when "01" & x"f35" => DATA <= x"003f";
when "01" & x"f36" => DATA <= x"39e4";
when "01" & x"f37" => DATA <= x"e2c0";
when "01" & x"f38" => DATA <= x"fec0";
when "01" & x"f39" => DATA <= x"4c53";
when "01" & x"f3a" => DATA <= x"2020";
when "01" & x"f3b" => DATA <= x"2000";
when "01" & x"f3c" => DATA <= x"003f";
when "01" & x"f3d" => DATA <= x"39e4";
when "01" & x"f3e" => DATA <= x"e4c0";
when "01" & x"f3f" => DATA <= x"fec0";
when "01" & x"f40" => DATA <= x"524f";
when "01" & x"f41" => DATA <= x"5820";
when "01" & x"f42" => DATA <= x"2000";
when "01" & x"f43" => DATA <= x"003f";
when "01" & x"f44" => DATA <= x"39e4";
when "01" & x"f45" => DATA <= x"e6c0";
when "01" & x"f46" => DATA <= x"fec0";
when "01" & x"f47" => DATA <= x"524f";
when "01" & x"f48" => DATA <= x"2020";
when "01" & x"f49" => DATA <= x"2000";
when "01" & x"f4a" => DATA <= x"003f";
when "01" & x"f4b" => DATA <= x"39e4";
when "01" & x"f4c" => DATA <= x"e000";
when "01" & x"f4d" => DATA <= x"f018";
when "01" & x"f4e" => DATA <= x"4153";
when "01" & x"f4f" => DATA <= x"2020";
when "01" & x"f50" => DATA <= x"2000";
when "01" & x"f51" => DATA <= x"003f";
when "01" & x"f52" => DATA <= x"39e4";
when "01" & x"f53" => DATA <= x"e008";
when "01" & x"f54" => DATA <= x"f018";
when "01" & x"f55" => DATA <= x"4c53";
when "01" & x"f56" => DATA <= x"2020";
when "01" & x"f57" => DATA <= x"2000";
when "01" & x"f58" => DATA <= x"003f";
when "01" & x"f59" => DATA <= x"39e4";
when "01" & x"f5a" => DATA <= x"e010";
when "01" & x"f5b" => DATA <= x"f018";
when "01" & x"f5c" => DATA <= x"524f";
when "01" & x"f5d" => DATA <= x"5820";
when "01" & x"f5e" => DATA <= x"2000";
when "01" & x"f5f" => DATA <= x"003f";
when "01" & x"f60" => DATA <= x"39e4";
when "01" & x"f61" => DATA <= x"e018";
when "01" & x"f62" => DATA <= x"f018";
when "01" & x"f63" => DATA <= x"524f";
when "01" & x"f64" => DATA <= x"2020";
when "01" & x"f65" => DATA <= x"2000";
when "01" & x"f66" => DATA <= x"003f";
when "01" & x"f67" => DATA <= x"39e4";
when "01" & x"f68" => DATA <= x"0000";
when "01" & x"f69" => DATA <= x"0000";
when "01" & x"f6a" => DATA <= x"3f3f";
when "01" & x"f6b" => DATA <= x"3f3f";
when "01" & x"f6c" => DATA <= x"3f00";
when "01" & x"f6d" => DATA <= x"003f";
when "01" & x"f6e" => DATA <= x"39e4";
when "01" & x"f6f" => DATA <= x"2532";
when "01" & x"f70" => DATA <= x"343a";
when "01" & x"f71" => DATA <= x"256d";
when "01" & x"f72" => DATA <= x"693a";
when "01" & x"f73" => DATA <= x"2573";
when "01" & x"f74" => DATA <= x"6520";
when "01" & x"f75" => DATA <= x"2564";
when "01" & x"f76" => DATA <= x"792d";
when "01" & x"f77" => DATA <= x"256d";
when "01" & x"f78" => DATA <= x"332d";
when "01" & x"f79" => DATA <= x"2563";
when "01" & x"f7a" => DATA <= x"6525";
when "01" & x"f7b" => DATA <= x"7972";
when "01" & x"f7c" => DATA <= x"0000";
when "01" & x"f7d" => DATA <= x"7c00";
when "01" & x"f7e" => DATA <= x"5206";
when "01" & x"f7f" => DATA <= x"bcbc";
when "01" & x"f80" => DATA <= x"0010";
when "01" & x"f81" => DATA <= x"0000";
when "01" & x"f82" => DATA <= x"66f6";
when "01" & x"f83" => DATA <= x"103c";
when "01" & x"f84" => DATA <= x"002a";
when "01" & x"f85" => DATA <= x"6100";
when "01" & x"f86" => DATA <= x"cade";
when "01" & x"f87" => DATA <= x"60e9";
when "01" & x"f88" => DATA <= x"0000";
when "01" & x"f89" => DATA <= x"0000";
when "01" & x"f8a" => DATA <= x"0000";
when "01" & x"f8b" => DATA <= x"0000";
when "01" & x"f8c" => DATA <= x"0000";
when "01" & x"f8d" => DATA <= x"0000";
when "01" & x"f8e" => DATA <= x"0000";
when "01" & x"f8f" => DATA <= x"0000";
when "01" & x"f90" => DATA <= x"0000";
when "01" & x"f91" => DATA <= x"0000";
when "01" & x"f92" => DATA <= x"0000";
when "01" & x"f93" => DATA <= x"0000";
when "01" & x"f94" => DATA <= x"0000";
when "01" & x"f95" => DATA <= x"0000";
when "01" & x"f96" => DATA <= x"0000";
when "01" & x"f97" => DATA <= x"0000";
when "01" & x"f98" => DATA <= x"0000";
when "01" & x"f99" => DATA <= x"0000";
when "01" & x"f9a" => DATA <= x"0000";
when "01" & x"f9b" => DATA <= x"0000";
when "01" & x"f9c" => DATA <= x"0000";
when "01" & x"f9d" => DATA <= x"0000";
when "01" & x"f9e" => DATA <= x"0000";
when "01" & x"f9f" => DATA <= x"0000";
when "01" & x"fa0" => DATA <= x"0000";
when "01" & x"fa1" => DATA <= x"0000";
when "01" & x"fa2" => DATA <= x"0000";
when "01" & x"fa3" => DATA <= x"0000";
when "01" & x"fa4" => DATA <= x"0000";
when "01" & x"fa5" => DATA <= x"0000";
when "01" & x"fa6" => DATA <= x"0000";
when "01" & x"fa7" => DATA <= x"0000";
when "01" & x"fa8" => DATA <= x"0000";
when "01" & x"fa9" => DATA <= x"0000";
when "01" & x"faa" => DATA <= x"0000";
when "01" & x"fab" => DATA <= x"0000";
when "01" & x"fac" => DATA <= x"0000";
when "01" & x"fad" => DATA <= x"0000";
when "01" & x"fae" => DATA <= x"0000";
when "01" & x"faf" => DATA <= x"0000";
when "01" & x"fb0" => DATA <= x"0000";
when "01" & x"fb1" => DATA <= x"0000";
when "01" & x"fb2" => DATA <= x"0000";
when "01" & x"fb3" => DATA <= x"0000";
when "01" & x"fb4" => DATA <= x"0000";
when "01" & x"fb5" => DATA <= x"0000";
when "01" & x"fb6" => DATA <= x"0000";
when "01" & x"fb7" => DATA <= x"0000";
when "01" & x"fb8" => DATA <= x"0000";
when "01" & x"fb9" => DATA <= x"0000";
when "01" & x"fba" => DATA <= x"0000";
when "01" & x"fbb" => DATA <= x"0000";
when "01" & x"fbc" => DATA <= x"0000";
when "01" & x"fbd" => DATA <= x"0000";
when "01" & x"fbe" => DATA <= x"0000";
when "01" & x"fbf" => DATA <= x"0000";
when "01" & x"fc0" => DATA <= x"0000";
when "01" & x"fc1" => DATA <= x"0000";
when "01" & x"fc2" => DATA <= x"0000";
when "01" & x"fc3" => DATA <= x"0000";
when "01" & x"fc4" => DATA <= x"0000";
when "01" & x"fc5" => DATA <= x"0000";
when "01" & x"fc6" => DATA <= x"0000";
when "01" & x"fc7" => DATA <= x"0000";
when "01" & x"fc8" => DATA <= x"0000";
when "01" & x"fc9" => DATA <= x"0000";
when "01" & x"fca" => DATA <= x"0000";
when "01" & x"fcb" => DATA <= x"0000";
when "01" & x"fcc" => DATA <= x"0000";
when "01" & x"fcd" => DATA <= x"0000";
when "01" & x"fce" => DATA <= x"0000";
when "01" & x"fcf" => DATA <= x"0000";
when "01" & x"fd0" => DATA <= x"0000";
when "01" & x"fd1" => DATA <= x"0000";
when "01" & x"fd2" => DATA <= x"0000";
when "01" & x"fd3" => DATA <= x"0000";
when "01" & x"fd4" => DATA <= x"0000";
when "01" & x"fd5" => DATA <= x"0000";
when "01" & x"fd6" => DATA <= x"0000";
when "01" & x"fd7" => DATA <= x"0000";
when "01" & x"fd8" => DATA <= x"0000";
when "01" & x"fd9" => DATA <= x"0000";
when "01" & x"fda" => DATA <= x"0000";
when "01" & x"fdb" => DATA <= x"0000";
when "01" & x"fdc" => DATA <= x"0000";
when "01" & x"fdd" => DATA <= x"0000";
when "01" & x"fde" => DATA <= x"0000";
when "01" & x"fdf" => DATA <= x"0000";
when "01" & x"fe0" => DATA <= x"0000";
when "01" & x"fe1" => DATA <= x"0000";
when "01" & x"fe2" => DATA <= x"0000";
when "01" & x"fe3" => DATA <= x"0000";
when "01" & x"fe4" => DATA <= x"0000";
when "01" & x"fe5" => DATA <= x"0000";
when "01" & x"fe6" => DATA <= x"0000";
when "01" & x"fe7" => DATA <= x"0000";
when "01" & x"fe8" => DATA <= x"0000";
when "01" & x"fe9" => DATA <= x"0000";
when "01" & x"fea" => DATA <= x"0000";
when "01" & x"feb" => DATA <= x"0000";
when "01" & x"fec" => DATA <= x"0000";
when "01" & x"fed" => DATA <= x"0000";
when "01" & x"fee" => DATA <= x"0000";
when "01" & x"fef" => DATA <= x"0000";
when "01" & x"ff0" => DATA <= x"0000";
when "01" & x"ff1" => DATA <= x"0000";
when "01" & x"ff2" => DATA <= x"0000";
when "01" & x"ff3" => DATA <= x"0000";
when "01" & x"ff4" => DATA <= x"0000";
when "01" & x"ff5" => DATA <= x"0000";
when "01" & x"ff6" => DATA <= x"0000";
when "01" & x"ff7" => DATA <= x"0000";
when "01" & x"ff8" => DATA <= x"0000";
when "01" & x"ff9" => DATA <= x"0000";
when "01" & x"ffa" => DATA <= x"0000";
when "01" & x"ffb" => DATA <= x"0000";
when "01" & x"ffc" => DATA <= x"0000";
when "01" & x"ffd" => DATA <= x"0000";
when "01" & x"ffe" => DATA <= x"0000";
when "01" & x"fff" => DATA <= x"0000";
when "10" & x"000" => DATA <= x"0000";
when "10" & x"001" => DATA <= x"0000";
when "10" & x"002" => DATA <= x"0000";
when "10" & x"003" => DATA <= x"0000";
when "10" & x"004" => DATA <= x"0000";
when "10" & x"005" => DATA <= x"0000";
when "10" & x"006" => DATA <= x"0000";
when "10" & x"007" => DATA <= x"0000";
when "10" & x"008" => DATA <= x"0000";
when "10" & x"009" => DATA <= x"0000";
when "10" & x"00a" => DATA <= x"0000";
when "10" & x"00b" => DATA <= x"0000";
when "10" & x"00c" => DATA <= x"0000";
when "10" & x"00d" => DATA <= x"0000";
when "10" & x"00e" => DATA <= x"0000";
when "10" & x"00f" => DATA <= x"0000";
when "10" & x"010" => DATA <= x"0000";
when "10" & x"011" => DATA <= x"0000";
when "10" & x"012" => DATA <= x"0000";
when "10" & x"013" => DATA <= x"0000";
when "10" & x"014" => DATA <= x"0000";
when "10" & x"015" => DATA <= x"0000";
when "10" & x"016" => DATA <= x"0000";
when "10" & x"017" => DATA <= x"0000";
when "10" & x"018" => DATA <= x"0000";
when "10" & x"019" => DATA <= x"0000";
when "10" & x"01a" => DATA <= x"0000";
when "10" & x"01b" => DATA <= x"0000";
when "10" & x"01c" => DATA <= x"0000";
when "10" & x"01d" => DATA <= x"0000";
when "10" & x"01e" => DATA <= x"0000";
when "10" & x"01f" => DATA <= x"0000";
when "10" & x"020" => DATA <= x"0000";
when "10" & x"021" => DATA <= x"0000";
when "10" & x"022" => DATA <= x"0000";
when "10" & x"023" => DATA <= x"0000";
when "10" & x"024" => DATA <= x"0000";
when "10" & x"025" => DATA <= x"0000";
when "10" & x"026" => DATA <= x"0000";
when "10" & x"027" => DATA <= x"0000";
when "10" & x"028" => DATA <= x"0000";
when "10" & x"029" => DATA <= x"0000";
when "10" & x"02a" => DATA <= x"0000";
when "10" & x"02b" => DATA <= x"0000";
when "10" & x"02c" => DATA <= x"0000";
when "10" & x"02d" => DATA <= x"0000";
when "10" & x"02e" => DATA <= x"0000";
when "10" & x"02f" => DATA <= x"0000";
when "10" & x"030" => DATA <= x"0000";
when "10" & x"031" => DATA <= x"0000";
when "10" & x"032" => DATA <= x"0000";
when "10" & x"033" => DATA <= x"0000";
when "10" & x"034" => DATA <= x"0000";
when "10" & x"035" => DATA <= x"0000";
when "10" & x"036" => DATA <= x"0000";
when "10" & x"037" => DATA <= x"0000";
when "10" & x"038" => DATA <= x"0000";
when "10" & x"039" => DATA <= x"0000";
when "10" & x"03a" => DATA <= x"0000";
when "10" & x"03b" => DATA <= x"0000";
when "10" & x"03c" => DATA <= x"0000";
when "10" & x"03d" => DATA <= x"0000";
when "10" & x"03e" => DATA <= x"0000";
when "10" & x"03f" => DATA <= x"0000";
when "10" & x"040" => DATA <= x"0000";
when "10" & x"041" => DATA <= x"0000";
when "10" & x"042" => DATA <= x"0000";
when "10" & x"043" => DATA <= x"0000";
when "10" & x"044" => DATA <= x"0000";
when "10" & x"045" => DATA <= x"0000";
when "10" & x"046" => DATA <= x"0000";
when "10" & x"047" => DATA <= x"0000";
when "10" & x"048" => DATA <= x"0000";
when "10" & x"049" => DATA <= x"0000";
when "10" & x"04a" => DATA <= x"0000";
when "10" & x"04b" => DATA <= x"0000";
when "10" & x"04c" => DATA <= x"0000";
when "10" & x"04d" => DATA <= x"0000";
when "10" & x"04e" => DATA <= x"0000";
when "10" & x"04f" => DATA <= x"0000";
when "10" & x"050" => DATA <= x"0000";
when "10" & x"051" => DATA <= x"0000";
when "10" & x"052" => DATA <= x"0000";
when "10" & x"053" => DATA <= x"0000";
when "10" & x"054" => DATA <= x"0000";
when "10" & x"055" => DATA <= x"0000";
when "10" & x"056" => DATA <= x"0000";
when "10" & x"057" => DATA <= x"0000";
when "10" & x"058" => DATA <= x"0000";
when "10" & x"059" => DATA <= x"0000";
when "10" & x"05a" => DATA <= x"0000";
when "10" & x"05b" => DATA <= x"0000";
when "10" & x"05c" => DATA <= x"0000";
when "10" & x"05d" => DATA <= x"0000";
when "10" & x"05e" => DATA <= x"0000";
when "10" & x"05f" => DATA <= x"0000";
when "10" & x"060" => DATA <= x"0000";
when "10" & x"061" => DATA <= x"0000";
when "10" & x"062" => DATA <= x"0000";
when "10" & x"063" => DATA <= x"0000";
when "10" & x"064" => DATA <= x"0000";
when "10" & x"065" => DATA <= x"0000";
when "10" & x"066" => DATA <= x"0000";
when "10" & x"067" => DATA <= x"0000";
when "10" & x"068" => DATA <= x"0000";
when "10" & x"069" => DATA <= x"0000";
when "10" & x"06a" => DATA <= x"0000";
when "10" & x"06b" => DATA <= x"0000";
when "10" & x"06c" => DATA <= x"0000";
when "10" & x"06d" => DATA <= x"0000";
when "10" & x"06e" => DATA <= x"0000";
when "10" & x"06f" => DATA <= x"0000";
when "10" & x"070" => DATA <= x"0000";
when "10" & x"071" => DATA <= x"0000";
when "10" & x"072" => DATA <= x"0000";
when "10" & x"073" => DATA <= x"0000";
when "10" & x"074" => DATA <= x"0000";
when "10" & x"075" => DATA <= x"0000";
when "10" & x"076" => DATA <= x"0000";
when "10" & x"077" => DATA <= x"0000";
when "10" & x"078" => DATA <= x"0000";
when "10" & x"079" => DATA <= x"0000";
when "10" & x"07a" => DATA <= x"0000";
when "10" & x"07b" => DATA <= x"0000";
when "10" & x"07c" => DATA <= x"0000";
when "10" & x"07d" => DATA <= x"0000";
when "10" & x"07e" => DATA <= x"0000";
when "10" & x"07f" => DATA <= x"0000";
when "10" & x"080" => DATA <= x"0000";
when "10" & x"081" => DATA <= x"0000";
when "10" & x"082" => DATA <= x"0000";
when "10" & x"083" => DATA <= x"0000";
when "10" & x"084" => DATA <= x"0000";
when "10" & x"085" => DATA <= x"0000";
when "10" & x"086" => DATA <= x"0000";
when "10" & x"087" => DATA <= x"0000";
when "10" & x"088" => DATA <= x"0000";
when "10" & x"089" => DATA <= x"0000";
when "10" & x"08a" => DATA <= x"0000";
when "10" & x"08b" => DATA <= x"0000";
when "10" & x"08c" => DATA <= x"0000";
when "10" & x"08d" => DATA <= x"0000";
when "10" & x"08e" => DATA <= x"0000";
when "10" & x"08f" => DATA <= x"0000";
when "10" & x"090" => DATA <= x"0000";
when "10" & x"091" => DATA <= x"0000";
when "10" & x"092" => DATA <= x"0000";
when "10" & x"093" => DATA <= x"0000";
when "10" & x"094" => DATA <= x"0000";
when "10" & x"095" => DATA <= x"0000";
when "10" & x"096" => DATA <= x"0000";
when "10" & x"097" => DATA <= x"0000";
when "10" & x"098" => DATA <= x"0000";
when "10" & x"099" => DATA <= x"0000";
when "10" & x"09a" => DATA <= x"0000";
when "10" & x"09b" => DATA <= x"0000";
when "10" & x"09c" => DATA <= x"0000";
when "10" & x"09d" => DATA <= x"0000";
when "10" & x"09e" => DATA <= x"0000";
when "10" & x"09f" => DATA <= x"0000";
when "10" & x"0a0" => DATA <= x"0000";
when "10" & x"0a1" => DATA <= x"0000";
when "10" & x"0a2" => DATA <= x"0000";
when "10" & x"0a3" => DATA <= x"0000";
when "10" & x"0a4" => DATA <= x"0000";
when "10" & x"0a5" => DATA <= x"0000";
when "10" & x"0a6" => DATA <= x"0000";
when "10" & x"0a7" => DATA <= x"0000";
when "10" & x"0a8" => DATA <= x"0000";
when "10" & x"0a9" => DATA <= x"0000";
when "10" & x"0aa" => DATA <= x"0000";
when "10" & x"0ab" => DATA <= x"0000";
when "10" & x"0ac" => DATA <= x"0000";
when "10" & x"0ad" => DATA <= x"0000";
when "10" & x"0ae" => DATA <= x"0000";
when "10" & x"0af" => DATA <= x"0000";
when "10" & x"0b0" => DATA <= x"0000";
when "10" & x"0b1" => DATA <= x"0000";
when "10" & x"0b2" => DATA <= x"0000";
when "10" & x"0b3" => DATA <= x"0000";
when "10" & x"0b4" => DATA <= x"0000";
when "10" & x"0b5" => DATA <= x"0000";
when "10" & x"0b6" => DATA <= x"0000";
when "10" & x"0b7" => DATA <= x"0000";
when "10" & x"0b8" => DATA <= x"0000";
when "10" & x"0b9" => DATA <= x"0000";
when "10" & x"0ba" => DATA <= x"0000";
when "10" & x"0bb" => DATA <= x"0000";
when "10" & x"0bc" => DATA <= x"0000";
when "10" & x"0bd" => DATA <= x"0000";
when "10" & x"0be" => DATA <= x"0000";
when "10" & x"0bf" => DATA <= x"0000";
when "10" & x"0c0" => DATA <= x"0000";
when "10" & x"0c1" => DATA <= x"0000";
when "10" & x"0c2" => DATA <= x"0000";
when "10" & x"0c3" => DATA <= x"0000";
when "10" & x"0c4" => DATA <= x"0000";
when "10" & x"0c5" => DATA <= x"0000";
when "10" & x"0c6" => DATA <= x"0000";
when "10" & x"0c7" => DATA <= x"0000";
when "10" & x"0c8" => DATA <= x"0000";
when "10" & x"0c9" => DATA <= x"0000";
when "10" & x"0ca" => DATA <= x"0000";
when "10" & x"0cb" => DATA <= x"0000";
when "10" & x"0cc" => DATA <= x"0000";
when "10" & x"0cd" => DATA <= x"0000";
when "10" & x"0ce" => DATA <= x"0000";
when "10" & x"0cf" => DATA <= x"0000";
when "10" & x"0d0" => DATA <= x"0000";
when "10" & x"0d1" => DATA <= x"0000";
when "10" & x"0d2" => DATA <= x"0000";
when "10" & x"0d3" => DATA <= x"0000";
when "10" & x"0d4" => DATA <= x"0000";
when "10" & x"0d5" => DATA <= x"0000";
when "10" & x"0d6" => DATA <= x"0000";
when "10" & x"0d7" => DATA <= x"0000";
when "10" & x"0d8" => DATA <= x"0000";
when "10" & x"0d9" => DATA <= x"0000";
when "10" & x"0da" => DATA <= x"0000";
when "10" & x"0db" => DATA <= x"0000";
when "10" & x"0dc" => DATA <= x"0000";
when "10" & x"0dd" => DATA <= x"0000";
when "10" & x"0de" => DATA <= x"0000";
when "10" & x"0df" => DATA <= x"0000";
when "10" & x"0e0" => DATA <= x"0000";
when "10" & x"0e1" => DATA <= x"0000";
when "10" & x"0e2" => DATA <= x"0000";
when "10" & x"0e3" => DATA <= x"0000";
when "10" & x"0e4" => DATA <= x"0000";
when "10" & x"0e5" => DATA <= x"0000";
when "10" & x"0e6" => DATA <= x"0000";
when "10" & x"0e7" => DATA <= x"0000";
when "10" & x"0e8" => DATA <= x"0000";
when "10" & x"0e9" => DATA <= x"0000";
when "10" & x"0ea" => DATA <= x"0000";
when "10" & x"0eb" => DATA <= x"0000";
when "10" & x"0ec" => DATA <= x"0000";
when "10" & x"0ed" => DATA <= x"0000";
when "10" & x"0ee" => DATA <= x"0000";
when "10" & x"0ef" => DATA <= x"0000";
when "10" & x"0f0" => DATA <= x"0000";
when "10" & x"0f1" => DATA <= x"0000";
when "10" & x"0f2" => DATA <= x"0000";
when "10" & x"0f3" => DATA <= x"0000";
when "10" & x"0f4" => DATA <= x"0000";
when "10" & x"0f5" => DATA <= x"0000";
when "10" & x"0f6" => DATA <= x"0000";
when "10" & x"0f7" => DATA <= x"0000";
when "10" & x"0f8" => DATA <= x"0000";
when "10" & x"0f9" => DATA <= x"0000";
when "10" & x"0fa" => DATA <= x"0000";
when "10" & x"0fb" => DATA <= x"0000";
when "10" & x"0fc" => DATA <= x"0000";
when "10" & x"0fd" => DATA <= x"0000";
when "10" & x"0fe" => DATA <= x"0000";
when "10" & x"0ff" => DATA <= x"0000";
when "10" & x"100" => DATA <= x"0000";
when "10" & x"101" => DATA <= x"0000";
when "10" & x"102" => DATA <= x"0000";
when "10" & x"103" => DATA <= x"0000";
when "10" & x"104" => DATA <= x"0000";
when "10" & x"105" => DATA <= x"0000";
when "10" & x"106" => DATA <= x"0000";
when "10" & x"107" => DATA <= x"0000";
when "10" & x"108" => DATA <= x"0000";
when "10" & x"109" => DATA <= x"0000";
when "10" & x"10a" => DATA <= x"0000";
when "10" & x"10b" => DATA <= x"0000";
when "10" & x"10c" => DATA <= x"0000";
when "10" & x"10d" => DATA <= x"0000";
when "10" & x"10e" => DATA <= x"0000";
when "10" & x"10f" => DATA <= x"0000";
when "10" & x"110" => DATA <= x"0000";
when "10" & x"111" => DATA <= x"0000";
when "10" & x"112" => DATA <= x"0000";
when "10" & x"113" => DATA <= x"0000";
when "10" & x"114" => DATA <= x"0000";
when "10" & x"115" => DATA <= x"0000";
when "10" & x"116" => DATA <= x"0000";
when "10" & x"117" => DATA <= x"0000";
when "10" & x"118" => DATA <= x"0000";
when "10" & x"119" => DATA <= x"0000";
when "10" & x"11a" => DATA <= x"0000";
when "10" & x"11b" => DATA <= x"0000";
when "10" & x"11c" => DATA <= x"0000";
when "10" & x"11d" => DATA <= x"0000";
when "10" & x"11e" => DATA <= x"0000";
when "10" & x"11f" => DATA <= x"0000";
when "10" & x"120" => DATA <= x"0000";
when "10" & x"121" => DATA <= x"0000";
when "10" & x"122" => DATA <= x"0000";
when "10" & x"123" => DATA <= x"0000";
when "10" & x"124" => DATA <= x"0000";
when "10" & x"125" => DATA <= x"0000";
when "10" & x"126" => DATA <= x"0000";
when "10" & x"127" => DATA <= x"0000";
when "10" & x"128" => DATA <= x"0000";
when "10" & x"129" => DATA <= x"0000";
when "10" & x"12a" => DATA <= x"0000";
when "10" & x"12b" => DATA <= x"0000";
when "10" & x"12c" => DATA <= x"0000";
when "10" & x"12d" => DATA <= x"0000";
when "10" & x"12e" => DATA <= x"0000";
when "10" & x"12f" => DATA <= x"0000";
when "10" & x"130" => DATA <= x"0000";
when "10" & x"131" => DATA <= x"0000";
when "10" & x"132" => DATA <= x"0000";
when "10" & x"133" => DATA <= x"0000";
when "10" & x"134" => DATA <= x"0000";
when "10" & x"135" => DATA <= x"0000";
when "10" & x"136" => DATA <= x"0000";
when "10" & x"137" => DATA <= x"0000";
when "10" & x"138" => DATA <= x"0000";
when "10" & x"139" => DATA <= x"0000";
when "10" & x"13a" => DATA <= x"0000";
when "10" & x"13b" => DATA <= x"0000";
when "10" & x"13c" => DATA <= x"0000";
when "10" & x"13d" => DATA <= x"0000";
when "10" & x"13e" => DATA <= x"0000";
when "10" & x"13f" => DATA <= x"0000";
when "10" & x"140" => DATA <= x"0000";
when "10" & x"141" => DATA <= x"0000";
when "10" & x"142" => DATA <= x"0000";
when "10" & x"143" => DATA <= x"0000";
when "10" & x"144" => DATA <= x"0000";
when "10" & x"145" => DATA <= x"0000";
when "10" & x"146" => DATA <= x"0000";
when "10" & x"147" => DATA <= x"0000";
when "10" & x"148" => DATA <= x"0000";
when "10" & x"149" => DATA <= x"0000";
when "10" & x"14a" => DATA <= x"0000";
when "10" & x"14b" => DATA <= x"0000";
when "10" & x"14c" => DATA <= x"0000";
when "10" & x"14d" => DATA <= x"0000";
when "10" & x"14e" => DATA <= x"0000";
when "10" & x"14f" => DATA <= x"0000";
when "10" & x"150" => DATA <= x"0000";
when "10" & x"151" => DATA <= x"0000";
when "10" & x"152" => DATA <= x"0000";
when "10" & x"153" => DATA <= x"0000";
when "10" & x"154" => DATA <= x"0000";
when "10" & x"155" => DATA <= x"0000";
when "10" & x"156" => DATA <= x"0000";
when "10" & x"157" => DATA <= x"0000";
when "10" & x"158" => DATA <= x"0000";
when "10" & x"159" => DATA <= x"0000";
when "10" & x"15a" => DATA <= x"0000";
when "10" & x"15b" => DATA <= x"0000";
when "10" & x"15c" => DATA <= x"0000";
when "10" & x"15d" => DATA <= x"0000";
when "10" & x"15e" => DATA <= x"0000";
when "10" & x"15f" => DATA <= x"0000";
when "10" & x"160" => DATA <= x"0000";
when "10" & x"161" => DATA <= x"0000";
when "10" & x"162" => DATA <= x"0000";
when "10" & x"163" => DATA <= x"0000";
when "10" & x"164" => DATA <= x"0000";
when "10" & x"165" => DATA <= x"0000";
when "10" & x"166" => DATA <= x"0000";
when "10" & x"167" => DATA <= x"0000";
when "10" & x"168" => DATA <= x"0000";
when "10" & x"169" => DATA <= x"0000";
when "10" & x"16a" => DATA <= x"0000";
when "10" & x"16b" => DATA <= x"0000";
when "10" & x"16c" => DATA <= x"0000";
when "10" & x"16d" => DATA <= x"0000";
when "10" & x"16e" => DATA <= x"0000";
when "10" & x"16f" => DATA <= x"0000";
when "10" & x"170" => DATA <= x"0000";
when "10" & x"171" => DATA <= x"0000";
when "10" & x"172" => DATA <= x"0000";
when "10" & x"173" => DATA <= x"0000";
when "10" & x"174" => DATA <= x"0000";
when "10" & x"175" => DATA <= x"0000";
when "10" & x"176" => DATA <= x"0000";
when "10" & x"177" => DATA <= x"0000";
when "10" & x"178" => DATA <= x"0000";
when "10" & x"179" => DATA <= x"0000";
when "10" & x"17a" => DATA <= x"0000";
when "10" & x"17b" => DATA <= x"0000";
when "10" & x"17c" => DATA <= x"0000";
when "10" & x"17d" => DATA <= x"0000";
when "10" & x"17e" => DATA <= x"0000";
when "10" & x"17f" => DATA <= x"0000";
when "10" & x"180" => DATA <= x"0000";
when "10" & x"181" => DATA <= x"0000";
when "10" & x"182" => DATA <= x"0000";
when "10" & x"183" => DATA <= x"0000";
when "10" & x"184" => DATA <= x"0000";
when "10" & x"185" => DATA <= x"0000";
when "10" & x"186" => DATA <= x"0000";
when "10" & x"187" => DATA <= x"0000";
when "10" & x"188" => DATA <= x"0000";
when "10" & x"189" => DATA <= x"0000";
when "10" & x"18a" => DATA <= x"0000";
when "10" & x"18b" => DATA <= x"0000";
when "10" & x"18c" => DATA <= x"0000";
when "10" & x"18d" => DATA <= x"0000";
when "10" & x"18e" => DATA <= x"0000";
when "10" & x"18f" => DATA <= x"0000";
when "10" & x"190" => DATA <= x"0000";
when "10" & x"191" => DATA <= x"0000";
when "10" & x"192" => DATA <= x"0000";
when "10" & x"193" => DATA <= x"0000";
when "10" & x"194" => DATA <= x"0000";
when "10" & x"195" => DATA <= x"0000";
when "10" & x"196" => DATA <= x"0000";
when "10" & x"197" => DATA <= x"0000";
when "10" & x"198" => DATA <= x"0000";
when "10" & x"199" => DATA <= x"0000";
when "10" & x"19a" => DATA <= x"0000";
when "10" & x"19b" => DATA <= x"0000";
when "10" & x"19c" => DATA <= x"0000";
when "10" & x"19d" => DATA <= x"0000";
when "10" & x"19e" => DATA <= x"0000";
when "10" & x"19f" => DATA <= x"0000";
when "10" & x"1a0" => DATA <= x"0000";
when "10" & x"1a1" => DATA <= x"0000";
when "10" & x"1a2" => DATA <= x"0000";
when "10" & x"1a3" => DATA <= x"0000";
when "10" & x"1a4" => DATA <= x"0000";
when "10" & x"1a5" => DATA <= x"0000";
when "10" & x"1a6" => DATA <= x"0000";
when "10" & x"1a7" => DATA <= x"0000";
when "10" & x"1a8" => DATA <= x"0000";
when "10" & x"1a9" => DATA <= x"0000";
when "10" & x"1aa" => DATA <= x"0000";
when "10" & x"1ab" => DATA <= x"0000";
when "10" & x"1ac" => DATA <= x"0000";
when "10" & x"1ad" => DATA <= x"0000";
when "10" & x"1ae" => DATA <= x"0000";
when "10" & x"1af" => DATA <= x"0000";
when "10" & x"1b0" => DATA <= x"0000";
when "10" & x"1b1" => DATA <= x"0000";
when "10" & x"1b2" => DATA <= x"0000";
when "10" & x"1b3" => DATA <= x"0000";
when "10" & x"1b4" => DATA <= x"0000";
when "10" & x"1b5" => DATA <= x"0000";
when "10" & x"1b6" => DATA <= x"0000";
when "10" & x"1b7" => DATA <= x"0000";
when "10" & x"1b8" => DATA <= x"0000";
when "10" & x"1b9" => DATA <= x"0000";
when "10" & x"1ba" => DATA <= x"0000";
when "10" & x"1bb" => DATA <= x"0000";
when "10" & x"1bc" => DATA <= x"0000";
when "10" & x"1bd" => DATA <= x"0000";
when "10" & x"1be" => DATA <= x"0000";
when "10" & x"1bf" => DATA <= x"0000";
when "10" & x"1c0" => DATA <= x"0000";
when "10" & x"1c1" => DATA <= x"0000";
when "10" & x"1c2" => DATA <= x"0000";
when "10" & x"1c3" => DATA <= x"0000";
when "10" & x"1c4" => DATA <= x"0000";
when "10" & x"1c5" => DATA <= x"0000";
when "10" & x"1c6" => DATA <= x"0000";
when "10" & x"1c7" => DATA <= x"0000";
when "10" & x"1c8" => DATA <= x"0000";
when "10" & x"1c9" => DATA <= x"0000";
when "10" & x"1ca" => DATA <= x"0000";
when "10" & x"1cb" => DATA <= x"0000";
when "10" & x"1cc" => DATA <= x"0000";
when "10" & x"1cd" => DATA <= x"0000";
when "10" & x"1ce" => DATA <= x"0000";
when "10" & x"1cf" => DATA <= x"0000";
when "10" & x"1d0" => DATA <= x"0000";
when "10" & x"1d1" => DATA <= x"0000";
when "10" & x"1d2" => DATA <= x"0000";
when "10" & x"1d3" => DATA <= x"0000";
when "10" & x"1d4" => DATA <= x"0000";
when "10" & x"1d5" => DATA <= x"0000";
when "10" & x"1d6" => DATA <= x"0000";
when "10" & x"1d7" => DATA <= x"0000";
when "10" & x"1d8" => DATA <= x"0000";
when "10" & x"1d9" => DATA <= x"0000";
when "10" & x"1da" => DATA <= x"0000";
when "10" & x"1db" => DATA <= x"0000";
when "10" & x"1dc" => DATA <= x"0000";
when "10" & x"1dd" => DATA <= x"0000";
when "10" & x"1de" => DATA <= x"0000";
when "10" & x"1df" => DATA <= x"0000";
when "10" & x"1e0" => DATA <= x"0000";
when "10" & x"1e1" => DATA <= x"0000";
when "10" & x"1e2" => DATA <= x"0000";
when "10" & x"1e3" => DATA <= x"0000";
when "10" & x"1e4" => DATA <= x"0000";
when "10" & x"1e5" => DATA <= x"0000";
when "10" & x"1e6" => DATA <= x"0000";
when "10" & x"1e7" => DATA <= x"0000";
when "10" & x"1e8" => DATA <= x"0000";
when "10" & x"1e9" => DATA <= x"0000";
when "10" & x"1ea" => DATA <= x"0000";
when "10" & x"1eb" => DATA <= x"0000";
when "10" & x"1ec" => DATA <= x"0000";
when "10" & x"1ed" => DATA <= x"0000";
when "10" & x"1ee" => DATA <= x"0000";
when "10" & x"1ef" => DATA <= x"0000";
when "10" & x"1f0" => DATA <= x"0000";
when "10" & x"1f1" => DATA <= x"0000";
when "10" & x"1f2" => DATA <= x"0000";
when "10" & x"1f3" => DATA <= x"0000";
when "10" & x"1f4" => DATA <= x"0000";
when "10" & x"1f5" => DATA <= x"0000";
when "10" & x"1f6" => DATA <= x"0000";
when "10" & x"1f7" => DATA <= x"0000";
when "10" & x"1f8" => DATA <= x"0000";
when "10" & x"1f9" => DATA <= x"0000";
when "10" & x"1fa" => DATA <= x"0000";
when "10" & x"1fb" => DATA <= x"0000";
when "10" & x"1fc" => DATA <= x"0000";
when "10" & x"1fd" => DATA <= x"0000";
when "10" & x"1fe" => DATA <= x"0000";
when "10" & x"1ff" => DATA <= x"0000";
when "10" & x"200" => DATA <= x"0000";
when "10" & x"201" => DATA <= x"0000";
when "10" & x"202" => DATA <= x"0000";
when "10" & x"203" => DATA <= x"0000";
when "10" & x"204" => DATA <= x"0000";
when "10" & x"205" => DATA <= x"0000";
when "10" & x"206" => DATA <= x"0000";
when "10" & x"207" => DATA <= x"0000";
when "10" & x"208" => DATA <= x"0000";
when "10" & x"209" => DATA <= x"0000";
when "10" & x"20a" => DATA <= x"0000";
when "10" & x"20b" => DATA <= x"0000";
when "10" & x"20c" => DATA <= x"0000";
when "10" & x"20d" => DATA <= x"0000";
when "10" & x"20e" => DATA <= x"0000";
when "10" & x"20f" => DATA <= x"0000";
when "10" & x"210" => DATA <= x"0000";
when "10" & x"211" => DATA <= x"0000";
when "10" & x"212" => DATA <= x"0000";
when "10" & x"213" => DATA <= x"0000";
when "10" & x"214" => DATA <= x"0000";
when "10" & x"215" => DATA <= x"0000";
when "10" & x"216" => DATA <= x"0000";
when "10" & x"217" => DATA <= x"0000";
when "10" & x"218" => DATA <= x"0000";
when "10" & x"219" => DATA <= x"0000";
when "10" & x"21a" => DATA <= x"0000";
when "10" & x"21b" => DATA <= x"0000";
when "10" & x"21c" => DATA <= x"0000";
when "10" & x"21d" => DATA <= x"0000";
when "10" & x"21e" => DATA <= x"0000";
when "10" & x"21f" => DATA <= x"0000";
when "10" & x"220" => DATA <= x"0000";
when "10" & x"221" => DATA <= x"0000";
when "10" & x"222" => DATA <= x"0000";
when "10" & x"223" => DATA <= x"0000";
when "10" & x"224" => DATA <= x"0000";
when "10" & x"225" => DATA <= x"0000";
when "10" & x"226" => DATA <= x"0000";
when "10" & x"227" => DATA <= x"0000";
when "10" & x"228" => DATA <= x"0000";
when "10" & x"229" => DATA <= x"0000";
when "10" & x"22a" => DATA <= x"0000";
when "10" & x"22b" => DATA <= x"0000";
when "10" & x"22c" => DATA <= x"0000";
when "10" & x"22d" => DATA <= x"0000";
when "10" & x"22e" => DATA <= x"0000";
when "10" & x"22f" => DATA <= x"0000";
when "10" & x"230" => DATA <= x"0000";
when "10" & x"231" => DATA <= x"0000";
when "10" & x"232" => DATA <= x"0000";
when "10" & x"233" => DATA <= x"0000";
when "10" & x"234" => DATA <= x"0000";
when "10" & x"235" => DATA <= x"0000";
when "10" & x"236" => DATA <= x"0000";
when "10" & x"237" => DATA <= x"0000";
when "10" & x"238" => DATA <= x"0000";
when "10" & x"239" => DATA <= x"0000";
when "10" & x"23a" => DATA <= x"0000";
when "10" & x"23b" => DATA <= x"0000";
when "10" & x"23c" => DATA <= x"0000";
when "10" & x"23d" => DATA <= x"0000";
when "10" & x"23e" => DATA <= x"0000";
when "10" & x"23f" => DATA <= x"0000";
when "10" & x"240" => DATA <= x"0000";
when "10" & x"241" => DATA <= x"0000";
when "10" & x"242" => DATA <= x"0000";
when "10" & x"243" => DATA <= x"0000";
when "10" & x"244" => DATA <= x"0000";
when "10" & x"245" => DATA <= x"0000";
when "10" & x"246" => DATA <= x"0000";
when "10" & x"247" => DATA <= x"0000";
when "10" & x"248" => DATA <= x"0000";
when "10" & x"249" => DATA <= x"0000";
when "10" & x"24a" => DATA <= x"0000";
when "10" & x"24b" => DATA <= x"0000";
when "10" & x"24c" => DATA <= x"0000";
when "10" & x"24d" => DATA <= x"0000";
when "10" & x"24e" => DATA <= x"0000";
when "10" & x"24f" => DATA <= x"0000";
when "10" & x"250" => DATA <= x"0000";
when "10" & x"251" => DATA <= x"1000";
when "10" & x"252" => DATA <= x"e0e0";
when "10" & x"253" => DATA <= x"e0e0";
when "10" & x"254" => DATA <= x"e0e0";
when "10" & x"255" => DATA <= x"e0e0";
when "10" & x"256" => DATA <= x"80c0";
when "10" & x"257" => DATA <= x"0004";
when "10" & x"258" => DATA <= x"2400";
when "10" & x"259" => DATA <= x"081e";
when "10" & x"25a" => DATA <= x"a00a";
when "10" & x"25b" => DATA <= x"ff74";
when "10" & x"25c" => DATA <= x"5000";
when "10" & x"25d" => DATA <= x"3e80";
when "10" & x"25e" => DATA <= x"1fe0";
when "10" & x"25f" => DATA <= x"6aff";
when "10" & x"260" => DATA <= x"7c20";
when "10" & x"261" => DATA <= x"2801";
when "10" & x"262" => DATA <= x"fe00";
when "10" & x"263" => DATA <= x"6f8b";
when "10" & x"264" => DATA <= x"ebfe";
when "10" & x"265" => DATA <= x"801f";
when "10" & x"266" => DATA <= x"ec00";
when "10" & x"267" => DATA <= x"f980";
when "10" & x"268" => DATA <= x"1e3f";
when "10" & x"269" => DATA <= x"a007";
when "10" & x"26a" => DATA <= x"fb6d";
when "10" & x"26b" => DATA <= x"fce0";
when "10" & x"26c" => DATA <= x"9007";
when "10" & x"26d" => DATA <= x"f802";
when "10" & x"26e" => DATA <= x"bfeb";
when "10" & x"26f" => DATA <= x"e280";
when "10" & x"270" => DATA <= x"1fe0";
when "10" & x"271" => DATA <= x"07f8";
when "10" & x"272" => DATA <= x"1cbe";
when "10" & x"273" => DATA <= x"ffa0";
when "10" & x"274" => DATA <= x"07fb";
when "10" & x"275" => DATA <= x"81fe";
when "10" & x"276" => DATA <= x"ac00";
when "10" & x"277" => DATA <= x"27e8";
when "10" & x"278" => DATA <= x"03bf";
when "10" & x"279" => DATA <= x"de35";
when "10" & x"27a" => DATA <= x"8140";
when "10" & x"27b" => DATA <= x"17ff";
when "10" & x"27c" => DATA <= x"400f";
when "10" & x"27d" => DATA <= x"f014";
when "10" & x"27e" => DATA <= x"ffd0";
when "10" & x"27f" => DATA <= x"03fd";
when "10" & x"280" => DATA <= x"e0ff";
when "10" & x"281" => DATA <= x"7800";
when "10" & x"282" => DATA <= x"c1f4";
when "10" & x"283" => DATA <= x"00ff";
when "10" & x"284" => DATA <= x"00bf";
when "10" & x"285" => DATA <= x"d408";
when "10" & x"286" => DATA <= x"071d";
when "10" & x"287" => DATA <= x"005f";
when "10" & x"288" => DATA <= x"fd00";
when "10" & x"289" => DATA <= x"3fd7";
when "10" & x"28a" => DATA <= x"f3ff";
when "10" & x"28b" => DATA <= x"400f";
when "10" & x"28c" => DATA <= x"f7d4";
when "10" & x"28d" => DATA <= x"ffd0";
when "10" & x"28e" => DATA <= x"03fc";
when "10" & x"28f" => DATA <= x"00ff";
when "10" & x"290" => DATA <= x"080c";
when "10" & x"291" => DATA <= x"c474";
when "10" & x"292" => DATA <= x"00ff";
when "10" & x"293" => DATA <= x"403f";
when "10" & x"294" => DATA <= x"df8f";
when "10" & x"295" => DATA <= x"f7f5";
when "10" & x"296" => DATA <= x"003f";
when "10" & x"297" => DATA <= x"dfd3";
when "10" & x"298" => DATA <= x"ff40";
when "10" & x"299" => DATA <= x"0ff7";
when "10" & x"29a" => DATA <= x"ecff";
when "10" & x"29b" => DATA <= x"d003";
when "10" & x"29c" => DATA <= x"fc00";
when "10" & x"29d" => DATA <= x"ff20";
when "10" & x"29e" => DATA <= x"bbd9";
when "10" & x"29f" => DATA <= x"f400";
when "10" & x"2a0" => DATA <= x"ff00";
when "10" & x"2a1" => DATA <= x"3fde";
when "10" & x"2a2" => DATA <= x"0fe7";
when "10" & x"2a3" => DATA <= x"e500";
when "10" & x"2a4" => DATA <= x"5ffd";
when "10" & x"2a5" => DATA <= x"003f";
when "10" & x"2a6" => DATA <= x"cff3";
when "10" & x"2a7" => DATA <= x"ff40";
when "10" & x"2a8" => DATA <= x"0ff0";
when "10" & x"2a9" => DATA <= x"03fc";
when "10" & x"2aa" => DATA <= x"82e7";
when "10" & x"2ab" => DATA <= x"23d0";
when "10" & x"2ac" => DATA <= x"03fc";
when "10" & x"2ad" => DATA <= x"00ff";
when "10" & x"2ae" => DATA <= x"7057";
when "10" & x"2af" => DATA <= x"e500";
when "10" & x"2b0" => DATA <= x"3fdf";
when "10" & x"2b1" => DATA <= x"13ff";
when "10" & x"2b2" => DATA <= x"4017";
when "10" & x"2b3" => DATA <= x"ff40";
when "10" & x"2b4" => DATA <= x"0ff0";
when "10" & x"2b5" => DATA <= x"3bfc";
when "10" & x"2b6" => DATA <= x"7eff";
when "10" & x"2b7" => DATA <= x"3fd0";
when "10" & x"2b8" => DATA <= x"03fc";
when "10" & x"2b9" => DATA <= x"00ff";
when "10" & x"2ba" => DATA <= x"0033";
when "10" & x"2bb" => DATA <= x"9814";
when "10" & x"2bc" => DATA <= x"00ff";
when "10" & x"2bd" => DATA <= x"003f";
when "10" & x"2be" => DATA <= x"df95";
when "10" & x"2bf" => DATA <= x"ff40";
when "10" & x"2c0" => DATA <= x"0ff7";
when "10" & x"2c1" => DATA <= x"f4ff";
when "10" & x"2c2" => DATA <= x"d005";
when "10" & x"2c3" => DATA <= x"ffd0";
when "10" & x"2c4" => DATA <= x"05ff";
when "10" & x"2c5" => DATA <= x"d005";
when "10" & x"2c6" => DATA <= x"ffd0";
when "10" & x"2c7" => DATA <= x"05ff";
when "10" & x"2c8" => DATA <= x"d005";
when "10" & x"2c9" => DATA <= x"ffd0";
when "10" & x"2ca" => DATA <= x"077f";
when "10" & x"2cb" => DATA <= x"d3f8";
when "10" & x"2cc" => DATA <= x"fe80";
when "10" & x"2cd" => DATA <= x"27fd";
when "10" & x"2ce" => DATA <= x"9ce0";
when "10" & x"2cf" => DATA <= x"a00b";
when "10" & x"2d0" => DATA <= x"ffa0";
when "10" & x"2d1" => DATA <= x"0eff";
when "10" & x"2d2" => DATA <= x"3fa7";
when "10" & x"2d3" => DATA <= x"c1f4";
when "10" & x"2d4" => DATA <= x"013f";
when "10" & x"2d5" => DATA <= x"efb7";
when "10" & x"2d6" => DATA <= x"cd00";
when "10" & x"2d7" => DATA <= x"6ff9";
when "10" & x"2d8" => DATA <= x"7e80";
when "10" & x"2d9" => DATA <= x"37fd";
when "10" & x"2da" => DATA <= x"ed40";
when "10" & x"2db" => DATA <= x"1bfe";
when "10" & x"2dc" => DATA <= x"17a0";
when "10" & x"2dd" => DATA <= x"0dff";
when "10" & x"2de" => DATA <= x"7ed0";
when "10" & x"2df" => DATA <= x"06ff";
when "10" & x"2e0" => DATA <= x"9fe8";
when "10" & x"2e1" => DATA <= x"037f";
when "10" & x"2e2" => DATA <= x"f803";
when "10" & x"2e3" => DATA <= x"bfdf";
when "10" & x"2e4" => DATA <= x"ad84";
when "10" & x"2e5" => DATA <= x"0500";
when "10" & x"2e6" => DATA <= x"4ffb";
when "10" & x"2e7" => DATA <= x"01bb";
when "10" & x"2e8" => DATA <= x"400f";
when "10" & x"2e9" => DATA <= x"f3fc";
when "10" & x"2ea" => DATA <= x"ffd0";
when "10" & x"2eb" => DATA <= x"03fc";
when "10" & x"2ec" => DATA <= x"ffdf";
when "10" & x"2ed" => DATA <= x"e2fa";
when "10" & x"2ee" => DATA <= x"007f";
when "10" & x"2ef" => DATA <= x"801f";
when "10" & x"2f0" => DATA <= x"e417";
when "10" & x"2f1" => DATA <= x"3f00";
when "10" & x"2f2" => DATA <= x"3fc0";
when "10" & x"2f3" => DATA <= x"0ff6";
when "10" & x"2f4" => DATA <= x"03f9";
when "10" & x"2f5" => DATA <= x"f140";
when "10" & x"2f6" => DATA <= x"17ff";
when "10" & x"2f7" => DATA <= x"400f";
when "10" & x"2f8" => DATA <= x"f6fc";
when "10" & x"2f9" => DATA <= x"ffd0";
when "10" & x"2fa" => DATA <= x"03fc";
when "10" & x"2fb" => DATA <= x"3fdf";
when "10" & x"2fc" => DATA <= x"e7fa";
when "10" & x"2fd" => DATA <= x"007f";
when "10" & x"2fe" => DATA <= x"a01f";
when "10" & x"2ff" => DATA <= x"e876";
when "10" & x"300" => DATA <= x"ff00";
when "10" & x"301" => DATA <= x"3fc0";
when "10" & x"302" => DATA <= x"eff7";
when "10" & x"303" => DATA <= x"5bfd";
when "10" & x"304" => DATA <= x"c140";
when "10" & x"305" => DATA <= x"0ff7";
when "10" & x"306" => DATA <= x"44ff";
when "10" & x"307" => DATA <= x"d003";
when "10" & x"308" => DATA <= x"fc00";
when "10" & x"309" => DATA <= x"ff1f";
when "10" & x"30a" => DATA <= x"bfc7";
when "10" & x"30b" => DATA <= x"f400";
when "10" & x"30c" => DATA <= x"ff40";
when "10" & x"30d" => DATA <= x"3fc9";
when "10" & x"30e" => DATA <= x"0ec7";
when "10" & x"30f" => DATA <= x"2500";
when "10" & x"310" => DATA <= x"3fc0";
when "10" & x"311" => DATA <= x"f3ff";
when "10" & x"312" => DATA <= x"400f";
when "10" & x"313" => DATA <= x"f5ac";
when "10" & x"314" => DATA <= x"ffd0";
when "10" & x"315" => DATA <= x"03fc";
when "10" & x"316" => DATA <= x"02ff";
when "10" & x"317" => DATA <= x"03b7";
when "10" & x"318" => DATA <= x"cc74";
when "10" & x"319" => DATA <= x"00ff";
when "10" & x"31a" => DATA <= x"603f";
when "10" & x"31b" => DATA <= x"d82f";
when "10" & x"31c" => DATA <= x"f6e5";
when "10" & x"31d" => DATA <= x"003f";
when "10" & x"31e" => DATA <= x"c06f";
when "10" & x"31f" => DATA <= x"f7dd";
when "10" & x"320" => DATA <= x"7fd0";
when "10" & x"321" => DATA <= x"03fd";
when "10" & x"322" => DATA <= x"f93f";
when "10" & x"323" => DATA <= x"f400";
when "10" & x"324" => DATA <= x"ff1f";
when "10" & x"325" => DATA <= x"bfe8";
when "10" & x"326" => DATA <= x"3c0f";
when "10" & x"327" => DATA <= x"400f";
when "10" & x"328" => DATA <= x"f503";
when "10" & x"329" => DATA <= x"fd10";
when "10" & x"32a" => DATA <= x"d778";
when "10" & x"32b" => DATA <= x"5003";
when "10" & x"32c" => DATA <= x"fc06";
when "10" & x"32d" => DATA <= x"ff7d";
when "10" & x"32e" => DATA <= x"d7fd";
when "10" & x"32f" => DATA <= x"003f";
when "10" & x"330" => DATA <= x"dc13";
when "10" & x"331" => DATA <= x"ff40";
when "10" & x"332" => DATA <= x"0ff1";
when "10" & x"333" => DATA <= x"fbfc";
when "10" & x"334" => DATA <= x"1e07";
when "10" & x"335" => DATA <= x"e007";
when "10" & x"336" => DATA <= x"f8c1";
when "10" & x"337" => DATA <= x"8610";
when "10" & x"338" => DATA <= x"00bc";
when "10" & x"339" => DATA <= x"2801";
when "10" & x"33a" => DATA <= x"fe00";
when "10" & x"33b" => DATA <= x"78bc";
when "10" & x"33c" => DATA <= x"2bfe";
when "10" & x"33d" => DATA <= x"801f";
when "10" & x"33e" => DATA <= x"af0e";
when "10" & x"33f" => DATA <= x"ff3f";
when "10" & x"340" => DATA <= x"d007";
when "10" & x"341" => DATA <= x"7f97";
when "10" & x"342" => DATA <= x"c07c";
when "10" & x"343" => DATA <= x"00ff";
when "10" & x"344" => DATA <= x"1fa0";
when "10" & x"345" => DATA <= x"c20c";
when "10" & x"346" => DATA <= x"07a5";
when "10" & x"347" => DATA <= x"0000";
when "10" & x"348" => DATA <= x"4000";
when "10" & x"349" => DATA <= x"1205";
when "10" & x"34a" => DATA <= x"3887";
when "10" & x"34b" => DATA <= x"8381";
when "10" & x"34c" => DATA <= x"e0e0";
when "10" & x"34d" => DATA <= x"7839";
when "10" & x"34e" => DATA <= x"43db";
when "10" & x"34f" => DATA <= x"df5f";
when "10" & x"350" => DATA <= x"eef0";
when "10" & x"351" => DATA <= x"051f";
when "10" & x"352" => DATA <= x"0fc7";
when "10" & x"353" => DATA <= x"d47e";
when "10" & x"354" => DATA <= x"3e78";
when "10" & x"355" => DATA <= x"3000";
when "10" & x"356" => DATA <= x"0181";
when "10" & x"357" => DATA <= x"c57c";
when "10" & x"358" => DATA <= x"5000";
when "10" & x"359" => DATA <= x"0dfc";
when "10" & x"35a" => DATA <= x"f060";
when "10" & x"35b" => DATA <= x"20df";
when "10" & x"35c" => DATA <= x"f401";
when "10" & x"35d" => DATA <= x"c61d";
when "10" & x"35e" => DATA <= x"6090";
when "10" & x"35f" => DATA <= x"6020";
when "10" & x"360" => DATA <= x"0003";
when "10" & x"361" => DATA <= x"0385";
when "10" & x"362" => DATA <= x"7800";
when "10" & x"363" => DATA <= x"0020";
when "10" & x"364" => DATA <= x"77e3";
when "10" & x"365" => DATA <= x"8100";
when "10" & x"366" => DATA <= x"8107";
when "10" & x"367" => DATA <= x"8008";
when "10" & x"368" => DATA <= x"0607";
when "10" & x"369" => DATA <= x"0cb0";
when "10" & x"36a" => DATA <= x"8838";
when "10" & x"36b" => DATA <= x"00c1";
when "10" & x"36c" => DATA <= x"dc00";
when "10" & x"36d" => DATA <= x"0010";
when "10" & x"36e" => DATA <= x"39f0";
when "10" & x"36f" => DATA <= x"c040";
when "10" & x"370" => DATA <= x"00c1";
when "10" & x"371" => DATA <= x"e00a";
when "10" & x"372" => DATA <= x"c09c";
when "10" & x"373" => DATA <= x"341f";
when "10" & x"374" => DATA <= x"0030";
when "10" & x"375" => DATA <= x"502c";
when "10" & x"376" => DATA <= x"0403";
when "10" & x"377" => DATA <= x"0380";
when "10" & x"378" => DATA <= x"1820";
when "10" & x"379" => DATA <= x"3038";
when "10" & x"37a" => DATA <= x"3c7f";
when "10" & x"37b" => DATA <= x"c014";
when "10" & x"37c" => DATA <= x"1e0e";
when "10" & x"37d" => DATA <= x"a0c0";
when "10" & x"37e" => DATA <= x"073f";
when "10" & x"37f" => DATA <= x"90f8";
when "10" & x"380" => DATA <= x"4c22";
when "10" & x"381" => DATA <= x"f500";
when "10" & x"382" => DATA <= x"5080";
when "10" & x"383" => DATA <= x"02b8";
when "10" & x"384" => DATA <= x"1e00";
when "10" & x"385" => DATA <= x"7000";
when "10" & x"386" => DATA <= x"7c1e";
when "10" & x"387" => DATA <= x"1f1f";
when "10" & x"388" => DATA <= x"9fc3";
when "10" & x"389" => DATA <= x"fdfc";
when "10" & x"38a" => DATA <= x"fca3";
when "10" & x"38b" => DATA <= x"81e0";
when "10" & x"38c" => DATA <= x"01fe";
when "10" & x"38d" => DATA <= x"2b41";
when "10" & x"38e" => DATA <= x"80fa";
when "10" & x"38f" => DATA <= x"0004";
when "10" & x"390" => DATA <= x"ff50";
when "10" & x"391" => DATA <= x"0428";
when "10" & x"392" => DATA <= x"0021";
when "10" & x"393" => DATA <= x"4000";
when "10" & x"394" => DATA <= x"707f";
when "10" & x"395" => DATA <= x"0f87";
when "10" & x"396" => DATA <= x"87e8";
when "10" & x"397" => DATA <= x"07e0";
when "10" & x"398" => DATA <= x"028f";
when "10" & x"399" => DATA <= x"28e0";
when "10" & x"39a" => DATA <= x"78ff";
when "10" & x"39b" => DATA <= x"7ef6";
when "10" & x"39c" => DATA <= x"0309";
when "10" & x"39d" => DATA <= x"00c0";
when "10" & x"39e" => DATA <= x"21d0";
when "10" & x"39f" => DATA <= x"0ef0";
when "10" & x"3a0" => DATA <= x"8068";
when "10" & x"3a1" => DATA <= x"000e";
when "10" & x"3a2" => DATA <= x"83a8";
when "10" & x"3a3" => DATA <= x"1618";
when "10" & x"3a4" => DATA <= x"0180";
when "10" & x"3a5" => DATA <= x"c163";
when "10" & x"3a6" => DATA <= x"d43a";
when "10" & x"3a7" => DATA <= x"7dfe";
when "10" & x"3a8" => DATA <= x"00ef";
when "10" & x"3a9" => DATA <= x"f5a5";
when "10" & x"3aa" => DATA <= x"4a00";
when "10" & x"3ab" => DATA <= x"0edc";
when "10" & x"3ac" => DATA <= x"1e07";
when "10" & x"3ad" => DATA <= x"0257";
when "10" & x"3ae" => DATA <= x"2804";
when "10" & x"3af" => DATA <= x"3c3e";
when "10" & x"3b0" => DATA <= x"1f87";
when "10" & x"3b1" => DATA <= x"f83f";
when "10" & x"3b2" => DATA <= x"8038";
when "10" & x"3b3" => DATA <= x"603c";
when "10" & x"3b4" => DATA <= x"1f00";
when "10" & x"3b5" => DATA <= x"7830";
when "10" & x"3b6" => DATA <= x"0820";
when "10" & x"3b7" => DATA <= x"7eaf";
when "10" & x"3b8" => DATA <= x"e3f5";
when "10" & x"3b9" => DATA <= x"7f70";
when "10" & x"3ba" => DATA <= x"057f";
when "10" & x"3bb" => DATA <= x"f1f8";
when "10" & x"3bc" => DATA <= x"02bf";
when "10" & x"3bd" => DATA <= x"1faf";
when "10" & x"3be" => DATA <= x"f005";
when "10" & x"3bf" => DATA <= x"0400";
when "10" & x"3c0" => DATA <= x"2bfd";
when "10" & x"3c1" => DATA <= x"ee37";
when "10" & x"3c2" => DATA <= x"1408";
when "10" & x"3c3" => DATA <= x"4041";
when "10" & x"3c4" => DATA <= x"0aff";
when "10" & x"3c5" => DATA <= x"7f00";
when "10" & x"3c6" => DATA <= x"40a9";
when "10" & x"3c7" => DATA <= x"9038";
when "10" & x"3c8" => DATA <= x"21fe";
when "10" & x"3c9" => DATA <= x"3f0f";
when "10" & x"3ca" => DATA <= x"f008";
when "10" & x"3cb" => DATA <= x"1444";
when "10" & x"3cc" => DATA <= x"3fa3";
when "10" & x"3cd" => DATA <= x"e0f0";
when "10" & x"3ce" => DATA <= x"3a83";
when "10" & x"3cf" => DATA <= x"000e";
when "10" & x"3d0" => DATA <= x"0381";
when "10" & x"3d1" => DATA <= x"e1f8";
when "10" & x"3d2" => DATA <= x"f87e";
when "10" & x"3d3" => DATA <= x"1f80";
when "10" & x"3d4" => DATA <= x"0ffa";
when "10" & x"3d5" => DATA <= x"00ef";
when "10" & x"3d6" => DATA <= x"fa00";
when "10" & x"3d7" => DATA <= x"e1f0";
when "10" & x"3d8" => DATA <= x"7f03";
when "10" & x"3d9" => DATA <= x"801e";
when "10" & x"3da" => DATA <= x"0180";
when "10" & x"3db" => DATA <= x"e70f";
when "10" & x"3dc" => DATA <= x"07c0";
when "10" & x"3dd" => DATA <= x"07fb";
when "10" & x"3de" => DATA <= x"0030";
when "10" & x"3df" => DATA <= x"2da8";
when "10" & x"3e0" => DATA <= x"c340";
when "10" & x"3e1" => DATA <= x"02b4";
when "10" & x"3e2" => DATA <= x"0806";
when "10" & x"3e3" => DATA <= x"9007";
when "10" & x"3e4" => DATA <= x"ef00";
when "10" & x"3e5" => DATA <= x"0400";
when "10" & x"3e6" => DATA <= x"9400";
when "10" & x"3e7" => DATA <= x"bfb0";
when "10" & x"3e8" => DATA <= x"0008";
when "10" & x"3e9" => DATA <= x"fde0";
when "10" & x"3ea" => DATA <= x"f83c";
when "10" & x"3eb" => DATA <= x"71c7";
when "10" & x"3ec" => DATA <= x"0077";
when "10" & x"3ed" => DATA <= x"03c1";
when "10" & x"3ee" => DATA <= x"f200";
when "10" & x"3ef" => DATA <= x"2058";
when "10" & x"3f0" => DATA <= x"8001";
when "10" & x"3f1" => DATA <= x"faf8";
when "10" & x"3f2" => DATA <= x"4870";
when "10" & x"3f3" => DATA <= x"0004";
when "10" & x"3f4" => DATA <= x"00f7";
when "10" & x"3f5" => DATA <= x"0057";
when "10" & x"3f6" => DATA <= x"8538";
when "10" & x"3f7" => DATA <= x"0c0e";
when "10" & x"3f8" => DATA <= x"1406";
when "10" & x"3f9" => DATA <= x"c160";
when "10" & x"3fa" => DATA <= x"5703";
when "10" & x"3fb" => DATA <= x"e5f8";
when "10" & x"3fc" => DATA <= x"fa70";
when "10" & x"3fd" => DATA <= x"5f1b";
when "10" & x"3fe" => DATA <= x"ff7c";
when "10" & x"3ff" => DATA <= x"deef";
when "10" & x"400" => DATA <= x"37ff";
when "10" & x"401" => DATA <= x"bfb7";
when "10" & x"402" => DATA <= x"c013";
when "10" & x"403" => DATA <= x"0150";
when "10" & x"404" => DATA <= x"4070";
when "10" & x"405" => DATA <= x"407c";
when "10" & x"406" => DATA <= x"1f40";
when "10" & x"407" => DATA <= x"e0f5";
when "10" & x"408" => DATA <= x"fb20";
when "10" & x"409" => DATA <= x"0141";
when "10" & x"40a" => DATA <= x"c0c0";
when "10" & x"40b" => DATA <= x"7707";
when "10" & x"40c" => DATA <= x"f800";
when "10" & x"40d" => DATA <= x"4060";
when "10" & x"40e" => DATA <= x"3f0f";
when "10" & x"40f" => DATA <= x"d07a";
when "10" & x"410" => DATA <= x"1f80";
when "10" & x"411" => DATA <= x"0314";
when "10" & x"412" => DATA <= x"381e";
when "10" & x"413" => DATA <= x"0f80";
when "10" & x"414" => DATA <= x"3c18";
when "10" & x"415" => DATA <= x"04a0";
when "10" & x"416" => DATA <= x"703f";
when "10" & x"417" => DATA <= x"87c1";
when "10" & x"418" => DATA <= x"e070";
when "10" & x"419" => DATA <= x"1a80";
when "10" & x"41a" => DATA <= x"0022";
when "10" & x"41b" => DATA <= x"0380";
when "10" & x"41c" => DATA <= x"e078";
when "10" & x"41d" => DATA <= x"3f00";
when "10" & x"41e" => DATA <= x"2228";
when "10" & x"41f" => DATA <= x"6018";
when "10" & x"420" => DATA <= x"1c04";
when "10" & x"421" => DATA <= x"0602";
when "10" & x"422" => DATA <= x"0fd0";
when "10" & x"423" => DATA <= x"1389";
when "10" & x"424" => DATA <= x"c0e2";
when "10" & x"425" => DATA <= x"7038";
when "10" & x"426" => DATA <= x"9fcf";
when "10" & x"427" => DATA <= x"f3c0";
when "10" & x"428" => DATA <= x"fc0e";
when "10" & x"429" => DATA <= x"0140";
when "10" & x"42a" => DATA <= x"b801";
when "10" & x"42b" => DATA <= x"a01a";
when "10" & x"42c" => DATA <= x"0003";
when "10" & x"42d" => DATA <= x"01c8";
when "10" & x"42e" => DATA <= x"e070";
when "10" & x"42f" => DATA <= x"0010";
when "10" & x"430" => DATA <= x"0084";
when "10" & x"431" => DATA <= x"a804";
when "10" & x"432" => DATA <= x"2200";
when "10" & x"433" => DATA <= x"000f";
when "10" & x"434" => DATA <= x"1fbf";
when "10" & x"435" => DATA <= x"c3e0";
when "10" & x"436" => DATA <= x"701b";
when "10" & x"437" => DATA <= x"8640";
when "10" & x"438" => DATA <= x"0100";
when "10" & x"439" => DATA <= x"ca0f";
when "10" & x"43a" => DATA <= x"e004";
when "10" & x"43b" => DATA <= x"1d01";
when "10" & x"43c" => DATA <= x"a0c0";
when "10" & x"43d" => DATA <= x"601a";
when "10" & x"43e" => DATA <= x"ffaf";
when "10" & x"43f" => DATA <= x"81c0";
when "10" & x"440" => DATA <= x"6110";
when "10" & x"441" => DATA <= x"007f";
when "10" & x"442" => DATA <= x"80c1";
when "10" & x"443" => DATA <= x"e006";
when "10" & x"444" => DATA <= x"03c1";
when "10" & x"445" => DATA <= x"fefe";
when "10" & x"446" => DATA <= x"03d0";
when "10" & x"447" => DATA <= x"0480";
when "10" & x"448" => DATA <= x"9fd8";
when "10" & x"449" => DATA <= x"0de9";
when "10" & x"44a" => DATA <= x"dfaf";
when "10" & x"44b" => DATA <= x"fbf7";
when "10" & x"44c" => DATA <= x"afff";
when "10" & x"44d" => DATA <= x"7138";
when "10" & x"44e" => DATA <= x"87a8";
when "10" & x"44f" => DATA <= x"703c";
when "10" & x"450" => DATA <= x"1ca0";
when "10" & x"451" => DATA <= x"0026";
when "10" & x"452" => DATA <= x"f7bb";
when "10" & x"453" => DATA <= x"8000";
when "10" & x"454" => DATA <= x"74f5";
when "10" & x"455" => DATA <= x"5d2f";
when "10" & x"456" => DATA <= x"9fc1";
when "10" & x"457" => DATA <= x"ea00";
when "10" & x"458" => DATA <= x"2857";
when "10" & x"459" => DATA <= x"fbed";
when "10" & x"45a" => DATA <= x"fe00";
when "10" & x"45b" => DATA <= x"7e50";
when "10" & x"45c" => DATA <= x"02fc";
when "10" & x"45d" => DATA <= x"fcff";
when "10" & x"45e" => DATA <= x"6780";
when "10" & x"45f" => DATA <= x"0fef";
when "10" & x"460" => DATA <= x"f48f";
when "10" & x"461" => DATA <= x"7fbd";
when "10" & x"462" => DATA <= x"1e0e";
when "10" & x"463" => DATA <= x"0780";
when "10" & x"464" => DATA <= x"03bf";
when "10" & x"465" => DATA <= x"c7e7";
when "10" & x"466" => DATA <= x"f3e8";
when "10" & x"467" => DATA <= x"fc04";
when "10" & x"468" => DATA <= x"ff7e";
when "10" & x"469" => DATA <= x"bfd0";
when "10" & x"46a" => DATA <= x"8637";
when "10" & x"46b" => DATA <= x"9a40";
when "10" & x"46c" => DATA <= x"415f";
when "10" & x"46d" => DATA <= x"d47e";
when "10" & x"46e" => DATA <= x"0203";
when "10" & x"46f" => DATA <= x"a218";
when "10" & x"470" => DATA <= x"35fe";
when "10" & x"471" => DATA <= x"fe4f";
when "10" & x"472" => DATA <= x"1000";
when "10" & x"473" => DATA <= x"0040";
when "10" & x"474" => DATA <= x"2afd";
when "10" & x"475" => DATA <= x"feef";
when "10" & x"476" => DATA <= x"1d80";
when "10" & x"477" => DATA <= x"a800";
when "10" & x"478" => DATA <= x"c15f";
when "10" & x"479" => DATA <= x"aff7";
when "10" & x"47a" => DATA <= x"f235";
when "10" & x"47b" => DATA <= x"98c4";
when "10" & x"47c" => DATA <= x"0157";
when "10" & x"47d" => DATA <= x"fafd";
when "10" & x"47e" => DATA <= x"fe14";
when "10" & x"47f" => DATA <= x"0008";
when "10" & x"480" => DATA <= x"0167";
when "10" & x"481" => DATA <= x"f77a";
when "10" & x"482" => DATA <= x"fc66";
when "10" & x"483" => DATA <= x"0024";
when "10" & x"484" => DATA <= x"1018";
when "10" & x"485" => DATA <= x"0fb7";
when "10" & x"486" => DATA <= x"bbfd";
when "10" & x"487" => DATA <= x"f800";
when "10" & x"488" => DATA <= x"45b2";
when "10" & x"489" => DATA <= x"c21d";
when "10" & x"48a" => DATA <= x"fe8f";
when "10" & x"48b" => DATA <= x"4000";
when "10" & x"48c" => DATA <= x"1000";
when "10" & x"48d" => DATA <= x"077d";
when "10" & x"48e" => DATA <= x"7fa9";
when "10" & x"48f" => DATA <= x"c0e0";
when "10" & x"490" => DATA <= x"0020";
when "10" & x"491" => DATA <= x"03bf";
when "10" & x"492" => DATA <= x"dee0";
when "10" & x"493" => DATA <= x"4000";
when "10" & x"494" => DATA <= x"9009";
when "10" & x"495" => DATA <= x"3fe0";
when "10" & x"496" => DATA <= x"0641";
when "10" & x"497" => DATA <= x"0d00";
when "10" & x"498" => DATA <= x"ff77";
when "10" & x"499" => DATA <= x"bfcf";
when "10" & x"49a" => DATA <= x"e000";
when "10" & x"49b" => DATA <= x"1098";
when "10" & x"49c" => DATA <= x"00ef";
when "10" & x"49d" => DATA <= x"aff7";
when "10" & x"49e" => DATA <= x"0000";
when "10" & x"49f" => DATA <= x"0844";
when "10" & x"4a0" => DATA <= x"003f";
when "10" & x"4a1" => DATA <= x"5eaf";
when "10" & x"4a2" => DATA <= x"d7fb";
when "10" & x"4a3" => DATA <= x"0000";
when "10" & x"4a4" => DATA <= x"0a02";
when "10" & x"4a5" => DATA <= x"77fb";
when "10" & x"4a6" => DATA <= x"e480";
when "10" & x"4a7" => DATA <= x"0700";
when "10" & x"4a8" => DATA <= x"007b";
when "10" & x"4a9" => DATA <= x"fd02";
when "10" & x"4aa" => DATA <= x"4800";
when "10" & x"4ab" => DATA <= x"1202";
when "10" & x"4ac" => DATA <= x"6bf6";
when "10" & x"4ad" => DATA <= x"fbfc";
when "10" & x"4ae" => DATA <= x"661a";
when "10" & x"4af" => DATA <= x"a007";
when "10" & x"4b0" => DATA <= x"03f5";
when "10" & x"4b1" => DATA <= x"deff";
when "10" & x"4b2" => DATA <= x"7d00";
when "10" & x"4b3" => DATA <= x"0482";
when "10" & x"4b4" => DATA <= x"1211";
when "10" & x"4b5" => DATA <= x"bebf";
when "10" & x"4b6" => DATA <= x"c720";
when "10" & x"4b7" => DATA <= x"0009";
when "10" & x"4b8" => DATA <= x"4408";
when "10" & x"4b9" => DATA <= x"ff33";
when "10" & x"4ba" => DATA <= x"3ff8";
when "10" & x"4bb" => DATA <= x"0124";
when "10" & x"4bc" => DATA <= x"88ef";
when "10" & x"4bd" => DATA <= x"f03d";
when "10" & x"4be" => DATA <= x"0001";
when "10" & x"4bf" => DATA <= x"03fd";
when "10" & x"4c0" => DATA <= x"fe5e";
when "10" & x"4c1" => DATA <= x"603f";
when "10" & x"4c2" => DATA <= x"00ca";
when "10" & x"4c3" => DATA <= x"07fb";
when "10" & x"4c4" => DATA <= x"bdfe";
when "10" & x"4c5" => DATA <= x"f079";
when "10" & x"4c6" => DATA <= x"bfc1";
when "10" & x"4c7" => DATA <= x"2f9e";
when "10" & x"4c8" => DATA <= x"ff04";
when "10" & x"4c9" => DATA <= x"805f";
when "10" & x"4ca" => DATA <= x"e009";
when "10" & x"4cb" => DATA <= x"ff00";
when "10" & x"4cc" => DATA <= x"3f2f";
when "10" & x"4cd" => DATA <= x"fc00";
when "10" & x"4ce" => DATA <= x"0f7f";
when "10" & x"4cf" => DATA <= x"a067";
when "10" & x"4d0" => DATA <= x"fc00";
when "10" & x"4d1" => DATA <= x"fc7f";
when "10" & x"4d2" => DATA <= x"80e7";
when "10" & x"4d3" => DATA <= x"fc01";
when "10" & x"4d4" => DATA <= x"5fe0";
when "10" & x"4d5" => DATA <= x"02a7";
when "10" & x"4d6" => DATA <= x"7f80";
when "10" & x"4d7" => DATA <= x"2bfc";
when "10" & x"4d8" => DATA <= x"24ed";
when "10" & x"4d9" => DATA <= x"eff7";
when "10" & x"4da" => DATA <= x"01f9";
when "10" & x"4db" => DATA <= x"fe00";
when "10" & x"4dc" => DATA <= x"dff7";
when "10" & x"4dd" => DATA <= x"e3fd";
when "10" & x"4de" => DATA <= x"fdbf";
when "10" & x"4df" => DATA <= x"ef17";
when "10" & x"4e0" => DATA <= x"f807";
when "10" & x"4e1" => DATA <= x"7fde";
when "10" & x"4e2" => DATA <= x"eff0";
when "10" & x"4e3" => DATA <= x"3cff";
when "10" & x"4e4" => DATA <= x"a5df";
when "10" & x"4e5" => DATA <= x"c4f2";
when "10" & x"4e6" => DATA <= x"023f";
when "10" & x"4e7" => DATA <= x"bfdd";
when "10" & x"4e8" => DATA <= x"e000";
when "10" & x"4e9" => DATA <= x"3281";
when "10" & x"4ea" => DATA <= x"31df";
when "10" & x"4eb" => DATA <= x"e087";
when "10" & x"4ec" => DATA <= x"0200";
when "10" & x"4ed" => DATA <= x"0a80";
when "10" & x"4ee" => DATA <= x"eff4";
when "10" & x"4ef" => DATA <= x"c3fd";
when "10" & x"4f0" => DATA <= x"1e09";
when "10" & x"4f1" => DATA <= x"20f7";
when "10" & x"4f2" => DATA <= x"f801";
when "10" & x"4f3" => DATA <= x"fe6d";
when "10" & x"4f4" => DATA <= x"1220";
when "10" & x"4f5" => DATA <= x"3bfc";
when "10" & x"4f6" => DATA <= x"007f";
when "10" & x"4f7" => DATA <= x"0005";
when "10" & x"4f8" => DATA <= x"166d";
when "10" & x"4f9" => DATA <= x"b7eb";
when "10" & x"4fa" => DATA <= x"fc00";
when "10" & x"4fb" => DATA <= x"f878";
when "10" & x"4fc" => DATA <= x"1027";
when "10" & x"4fd" => DATA <= x"fde0";
when "10" & x"4fe" => DATA <= x"ff28";
when "10" & x"4ff" => DATA <= x"9827";
when "10" & x"500" => DATA <= x"fc38";
when "10" & x"501" => DATA <= x"df77";
when "10" & x"502" => DATA <= x"8413";
when "10" & x"503" => DATA <= x"e6fa";
when "10" & x"504" => DATA <= x"ff00";
when "10" & x"505" => DATA <= x"d7fb";
when "10" & x"506" => DATA <= x"ac01";
when "10" & x"507" => DATA <= x"dfe0";
when "10" & x"508" => DATA <= x"03fb";
when "10" & x"509" => DATA <= x"fc42";
when "10" & x"50a" => DATA <= x"f0ef";
when "10" & x"50b" => DATA <= x"f005";
when "10" & x"50c" => DATA <= x"7f80";
when "10" & x"50d" => DATA <= x"67fc";
when "10" & x"50e" => DATA <= x"000f";
when "10" & x"50f" => DATA <= x"7780";
when "10" & x"510" => DATA <= x"2b8c";
when "10" & x"511" => DATA <= x"c6e3";
when "10" & x"512" => DATA <= x"7628";
when "10" & x"513" => DATA <= x"07e4";
when "10" & x"514" => DATA <= x"0793";
when "10" & x"515" => DATA <= x"e5e3";
when "10" & x"516" => DATA <= x"5f8f";
when "10" & x"517" => DATA <= x"f703";
when "10" & x"518" => DATA <= x"fedf";
when "10" & x"519" => DATA <= x"dfe7";
when "10" & x"51a" => DATA <= x"f432";
when "10" & x"51b" => DATA <= x"2aa7";
when "10" & x"51c" => DATA <= x"9ed5";
when "10" & x"51d" => DATA <= x"fe40";
when "10" & x"51e" => DATA <= x"fff0";
when "10" & x"51f" => DATA <= x"05ff";
when "10" & x"520" => DATA <= x"bb40";
when "10" & x"521" => DATA <= x"085e";
when "10" & x"522" => DATA <= x"ff16";
when "10" & x"523" => DATA <= x"229f";
when "10" & x"524" => DATA <= x"e100";
when "10" & x"525" => DATA <= x"e77f";
when "10" & x"526" => DATA <= x"8007";
when "10" & x"527" => DATA <= x"effa";
when "10" & x"528" => DATA <= x"00ae";
when "10" & x"529" => DATA <= x"f7f8";
when "10" & x"52a" => DATA <= x"107c";
when "10" & x"52b" => DATA <= x"ff00";
when "10" & x"52c" => DATA <= x"27bb";
when "10" & x"52d" => DATA <= x"fc00";
when "10" & x"52e" => DATA <= x"e27f";
when "10" & x"52f" => DATA <= x"800b";
when "10" & x"530" => DATA <= x"9dfe";
when "10" & x"531" => DATA <= x"c047";
when "10" & x"532" => DATA <= x"bfe8";
when "10" & x"533" => DATA <= x"01b6";
when "10" & x"534" => DATA <= x"df7f";
when "10" & x"535" => DATA <= x"8011";
when "10" & x"536" => DATA <= x"eff0";
when "10" & x"537" => DATA <= x"008b";
when "10" & x"538" => DATA <= x"bfc2";
when "10" & x"539" => DATA <= x"0e77";
when "10" & x"53a" => DATA <= x"f801";
when "10" & x"53b" => DATA <= x"80f7";
when "10" & x"53c" => DATA <= x"aff0";
when "10" & x"53d" => DATA <= x"057f";
when "10" & x"53e" => DATA <= x"8027";
when "10" & x"53f" => DATA <= x"fd78";
when "10" & x"540" => DATA <= x"033f";
when "10" & x"541" => DATA <= x"8800";
when "10" & x"542" => DATA <= x"6efa";
when "10" & x"543" => DATA <= x"ff0b";
when "10" & x"544" => DATA <= x"8807";
when "10" & x"545" => DATA <= x"8602";
when "10" & x"546" => DATA <= x"377f";
when "10" & x"547" => DATA <= x"9e5e";
when "10" & x"548" => DATA <= x"2491";
when "10" & x"549" => DATA <= x"405f";
when "10" & x"54a" => DATA <= x"bfc8";
when "10" & x"54b" => DATA <= x"0df0";
when "10" & x"54c" => DATA <= x"d180";
when "10" & x"54d" => DATA <= x"80fb";
when "10" & x"54e" => DATA <= x"7bbf";
when "10" & x"54f" => DATA <= x"c700";
when "10" & x"550" => DATA <= x"05b8";
when "10" & x"551" => DATA <= x"f810";
when "10" & x"552" => DATA <= x"ff7b";
when "10" & x"553" => DATA <= x"bfeb";
when "10" & x"554" => DATA <= x"f1fa";
when "10" & x"555" => DATA <= x"f104";
when "10" & x"556" => DATA <= x"3eeb";
when "10" & x"557" => DATA <= x"fc86";
when "10" & x"558" => DATA <= x"e30b";
when "10" & x"559" => DATA <= x"88c6";
when "10" & x"55a" => DATA <= x"03fa";
when "10" & x"55b" => DATA <= x"ff40";
when "10" & x"55c" => DATA <= x"2051";
when "10" & x"55d" => DATA <= x"0002";
when "10" & x"55e" => DATA <= x"0143";
when "10" & x"55f" => DATA <= x"5381";
when "10" & x"560" => DATA <= x"ddb9";
when "10" & x"561" => DATA <= x"bbff";
when "10" & x"562" => DATA <= x"eef7";
when "10" & x"563" => DATA <= x"f713";
when "10" & x"564" => DATA <= x"8f0e";
when "10" & x"565" => DATA <= x"0783";
when "10" & x"566" => DATA <= x"81e0";
when "10" & x"567" => DATA <= x"e07b";
when "10" & x"568" => DATA <= x"bff7";
when "10" & x"569" => DATA <= x"bd1e";
when "10" & x"56a" => DATA <= x"ef7f";
when "10" & x"56b" => DATA <= x"87a7";
when "10" & x"56c" => DATA <= x"f802";
when "10" & x"56d" => DATA <= x"3f7f";
when "10" & x"56e" => DATA <= x"d000";
when "10" & x"56f" => DATA <= x"042a";
when "10" & x"570" => DATA <= x"0138";
when "10" & x"571" => DATA <= x"0001";
when "10" & x"572" => DATA <= x"fc00";
when "10" & x"573" => DATA <= x"1000";
when "10" & x"574" => DATA <= x"382b";
when "10" & x"575" => DATA <= x"c2b8";
when "10" & x"576" => DATA <= x"11ca";
when "10" & x"577" => DATA <= x"8570";
when "10" & x"578" => DATA <= x"fcff";
when "10" & x"579" => DATA <= x"47ef";
when "10" & x"57a" => DATA <= x"f3fb";
when "10" & x"57b" => DATA <= x"fdbe";
when "10" & x"57c" => DATA <= x"0106";
when "10" & x"57d" => DATA <= x"b841";
when "10" & x"57e" => DATA <= x"2e13";
when "10" & x"57f" => DATA <= x"d9f0";
when "10" & x"580" => DATA <= x"e080";
when "10" & x"581" => DATA <= x"000f";
when "10" & x"582" => DATA <= x"d00c";
when "10" & x"583" => DATA <= x"f07d";
when "10" & x"584" => DATA <= x"0e81";
when "10" & x"585" => DATA <= x"0004";
when "10" & x"586" => DATA <= x"976b";
when "10" & x"587" => DATA <= x"ff80";
when "10" & x"588" => DATA <= x"0400";
when "10" & x"589" => DATA <= x"04d2";
when "10" & x"58a" => DATA <= x"7dbe";
when "10" & x"58b" => DATA <= x"c040";
when "10" & x"58c" => DATA <= x"0018";
when "10" & x"58d" => DATA <= x"a216";
when "10" & x"58e" => DATA <= x"8079";
when "10" & x"58f" => DATA <= x"eefd";
when "10" & x"590" => DATA <= x"003f";
when "10" & x"591" => DATA <= x"4400";
when "10" & x"592" => DATA <= x"1028";
when "10" & x"593" => DATA <= x"02bf";
when "10" & x"594" => DATA <= x"dc0f";
when "10" & x"595" => DATA <= x"f102";
when "10" & x"596" => DATA <= x"49e0";
when "10" & x"597" => DATA <= x"007f";
when "10" & x"598" => DATA <= x"bdc0";
when "10" & x"599" => DATA <= x"6ff0";
when "10" & x"59a" => DATA <= x"0010";
when "10" & x"59b" => DATA <= x"3e80";
when "10" & x"59c" => DATA <= x"6f87";
when "10" & x"59d" => DATA <= x"d80b";
when "10" & x"59e" => DATA <= x"f400";
when "10" & x"59f" => DATA <= x"0800";
when "10" & x"5a0" => DATA <= x"8069";
when "10" & x"5a1" => DATA <= x"91c0";
when "10" & x"5a2" => DATA <= x"2fc0";
when "10" & x"5a3" => DATA <= x"2000";
when "10" & x"5a4" => DATA <= x"915f";
when "10" & x"5a5" => DATA <= x"e125";
when "10" & x"5a6" => DATA <= x"2010";
when "10" & x"5a7" => DATA <= x"4140";
when "10" & x"5a8" => DATA <= x"15fe";
when "10" & x"5a9" => DATA <= x"0912";
when "10" & x"5aa" => DATA <= x"8808";
when "10" & x"5ab" => DATA <= x"a047";
when "10" & x"5ac" => DATA <= x"e08d";
when "10" & x"5ad" => DATA <= x"86fe";
when "10" & x"5ae" => DATA <= x"023c";
when "10" & x"5af" => DATA <= x"0442";
when "10" & x"5b0" => DATA <= x"10f8";
when "10" & x"5b1" => DATA <= x"02bf";
when "10" & x"5b2" => DATA <= x"d80f";
when "10" & x"5b3" => DATA <= x"f422";
when "10" & x"5b4" => DATA <= x"01dc";
when "10" & x"5b5" => DATA <= x"0171";
when "10" & x"5b6" => DATA <= x"bbc1";
when "10" & x"5b7" => DATA <= x"eff0";
when "10" & x"5b8" => DATA <= x"8090";
when "10" & x"5b9" => DATA <= x"fe00";
when "10" & x"5ba" => DATA <= x"5f9f";
when "10" & x"5bb" => DATA <= x"d007";
when "10" & x"5bc" => DATA <= x"fa00";
when "10" & x"5bd" => DATA <= x"42ba";
when "10" & x"5be" => DATA <= x"80cc";
when "10" & x"5bf" => DATA <= x"6038";
when "10" & x"5c0" => DATA <= x"f091";
when "10" & x"5c1" => DATA <= x"400f";
when "10" & x"5c2" => DATA <= x"f003";
when "10" & x"5c3" => DATA <= x"fc96";
when "10" & x"5c4" => DATA <= x"48a0";
when "10" & x"5c5" => DATA <= x"0121";
when "10" & x"5c6" => DATA <= x"fd80";
when "10" & x"5c7" => DATA <= x"9f09";
when "10" & x"5c8" => DATA <= x"0005";
when "10" & x"5c9" => DATA <= x"4ca7";
when "10" & x"5ca" => DATA <= x"f061";
when "10" & x"5cb" => DATA <= x"e2ff";
when "10" & x"5cc" => DATA <= x"013f";
when "10" & x"5cd" => DATA <= x"0a25";
when "10" & x"5ce" => DATA <= x"023a";
when "10" & x"5cf" => DATA <= x"12bf";
when "10" & x"5d0" => DATA <= x"dc0f";
when "10" & x"5d1" => DATA <= x"f311";
when "10" & x"5d2" => DATA <= x"01fc";
when "10" & x"5d3" => DATA <= x"0079";
when "10" & x"5d4" => DATA <= x"3ec1";
when "10" & x"5d5" => DATA <= x"6ff0";
when "10" & x"5d6" => DATA <= x"5825";
when "10" & x"5d7" => DATA <= x"be80";
when "10" & x"5d8" => DATA <= x"0f97";
when "10" & x"5d9" => DATA <= x"c801";
when "10" & x"5da" => DATA <= x"fa00";
when "10" & x"5db" => DATA <= x"01bc";
when "10" & x"5dc" => DATA <= x"002f";
when "10" & x"5dd" => DATA <= x"1008";
when "10" & x"5de" => DATA <= x"fc10";
when "10" & x"5df" => DATA <= x"0040";
when "10" & x"5e0" => DATA <= x"3fc0";
when "10" & x"5e1" => DATA <= x"0ffa";
when "10" & x"5e2" => DATA <= x"4900";
when "10" & x"5e3" => DATA <= x"2004";
when "10" & x"5e4" => DATA <= x"80f4";
when "10" & x"5e5" => DATA <= x"02dd";
when "10" & x"5e6" => DATA <= x"06c0";
when "10" & x"5e7" => DATA <= x"0404";
when "10" & x"5e8" => DATA <= x"0483";
when "10" & x"5e9" => DATA <= x"a003";
when "10" & x"5ea" => DATA <= x"fc00";
when "10" & x"5eb" => DATA <= x"ffa0";
when "10" & x"5ec" => DATA <= x"4003";
when "10" & x"5ed" => DATA <= x"f400";
when "10" & x"5ee" => DATA <= x"ff40";
when "10" & x"5ef" => DATA <= x"bfc0";
when "10" & x"5f0" => DATA <= x"66c3";
when "10" & x"5f1" => DATA <= x"4bfc";
when "10" & x"5f2" => DATA <= x"00ff";
when "10" & x"5f3" => DATA <= x"04bf";
when "10" & x"5f4" => DATA <= x"c014";
when "10" & x"5f5" => DATA <= x"02ff";
when "10" & x"5f6" => DATA <= x"0036";
when "10" & x"5f7" => DATA <= x"c386";
when "10" & x"5f8" => DATA <= x"3085";
when "10" & x"5f9" => DATA <= x"003f";
when "10" & x"5fa" => DATA <= x"c00f";
when "10" & x"5fb" => DATA <= x"f480";
when "10" & x"5fc" => DATA <= x"4840";
when "10" & x"5fd" => DATA <= x"0024";
when "10" & x"5fe" => DATA <= x"87c0";
when "10" & x"5ff" => DATA <= x"0770";
when "10" & x"600" => DATA <= x"3201";
when "10" & x"601" => DATA <= x"6021";
when "10" & x"602" => DATA <= x"241d";
when "10" & x"603" => DATA <= x"002f";
when "10" & x"604" => DATA <= x"f00b";
when "10" & x"605" => DATA <= x"fc10";
when "10" & x"606" => DATA <= x"2830";
when "10" & x"607" => DATA <= x"3e80";
when "10" & x"608" => DATA <= x"0ff0";
when "10" & x"609" => DATA <= x"03fc";
when "10" & x"60a" => DATA <= x"0d5b";
when "10" & x"60b" => DATA <= x"0ff0";
when "10" & x"60c" => DATA <= x"03fc";
when "10" & x"60d" => DATA <= x"20ff";
when "10" & x"60e" => DATA <= x"2050";
when "10" & x"60f" => DATA <= x"13fd";
when "10" & x"610" => DATA <= x"e037";
when "10" & x"611" => DATA <= x"7031";
when "10" & x"612" => DATA <= x"c802";
when "10" & x"613" => DATA <= x"0401";
when "10" & x"614" => DATA <= x"4dfe";
when "10" & x"615" => DATA <= x"fd7f";
when "10" & x"616" => DATA <= x"00d0";
when "10" & x"617" => DATA <= x"04b0";
when "10" & x"618" => DATA <= x"0015";
when "10" & x"619" => DATA <= x"fc3e";
when "10" & x"61a" => DATA <= x"7f80";
when "10" & x"61b" => DATA <= x"1108";
when "10" & x"61c" => DATA <= x"200b";
when "10" & x"61d" => DATA <= x"c0fe";
when "10" & x"61e" => DATA <= x"fd7f";
when "10" & x"61f" => DATA <= x"d000";
when "10" & x"620" => DATA <= x"4804";
when "10" & x"621" => DATA <= x"bfa7";
when "10" & x"622" => DATA <= x"e7fd";
when "10" & x"623" => DATA <= x"000c";
when "10" & x"624" => DATA <= x"8104";
when "10" & x"625" => DATA <= x"2eff";
when "10" & x"626" => DATA <= x"0010";
when "10" & x"627" => DATA <= x"08a0";
when "10" & x"628" => DATA <= x"0600";
when "10" & x"629" => DATA <= x"1ebf";
when "10" & x"62a" => DATA <= x"c006";
when "10" & x"62b" => DATA <= x"c6a2";
when "10" & x"62c" => DATA <= x"113c";
when "10" & x"62d" => DATA <= x"8e5f";
when "10" & x"62e" => DATA <= x"bfc0";
when "10" & x"62f" => DATA <= x"15fd";
when "10" & x"630" => DATA <= x"dfef";
when "10" & x"631" => DATA <= x"77f8";
when "10" & x"632" => DATA <= x"02bf";
when "10" & x"633" => DATA <= x"e401";
when "10" & x"634" => DATA <= x"f000";
when "10" & x"635" => DATA <= x"aff0";
when "10" & x"636" => DATA <= x"03f1";
when "10" & x"637" => DATA <= x"181c";
when "10" & x"638" => DATA <= x"3e9f";
when "10" & x"639" => DATA <= x"2bfd";
when "10" & x"63a" => DATA <= x"e1de";
when "10" & x"63b" => DATA <= x"35e6";
when "10" & x"63c" => DATA <= x"ef9f";
when "10" & x"63d" => DATA <= x"f638";
when "10" & x"63e" => DATA <= x"1d4f";
when "10" & x"63f" => DATA <= x"3fef";
when "10" & x"640" => DATA <= x"47b0";
when "10" & x"641" => DATA <= x"01e6";
when "10" & x"642" => DATA <= x"f7ef";
when "10" & x"643" => DATA <= x"f773";
when "10" & x"644" => DATA <= x"fc00";
when "10" & x"645" => DATA <= x"2e97";
when "10" & x"646" => DATA <= x"f3d8";
when "10" & x"647" => DATA <= x"8068";
when "10" & x"648" => DATA <= x"3e6c";
when "10" & x"649" => DATA <= x"a048";
when "10" & x"64a" => DATA <= x"a016";
when "10" & x"64b" => DATA <= x"2916";
when "10" & x"64c" => DATA <= x"8159";
when "10" & x"64d" => DATA <= x"4404";
when "10" & x"64e" => DATA <= x"1761";
when "10" & x"64f" => DATA <= x"d001";
when "10" & x"650" => DATA <= x"cc00";
when "10" & x"651" => DATA <= x"2011";
when "10" & x"652" => DATA <= x"0c82";
when "10" & x"653" => DATA <= x"4800";
when "10" & x"654" => DATA <= x"011c";
when "10" & x"655" => DATA <= x"8642";
when "10" & x"656" => DATA <= x"1988";
when "10" & x"657" => DATA <= x"d064";
when "10" & x"658" => DATA <= x"33fa";
when "10" & x"659" => DATA <= x"fdd0";
when "10" & x"65a" => DATA <= x"0401";
when "10" & x"65b" => DATA <= x"5000";
when "10" & x"65c" => DATA <= x"a000";
when "10" & x"65d" => DATA <= x"ff09";
when "10" & x"65e" => DATA <= x"8001";
when "10" & x"65f" => DATA <= x"286e";
when "10" & x"660" => DATA <= x"003f";
when "10" & x"661" => DATA <= x"8424";
when "10" & x"662" => DATA <= x"0100";
when "10" & x"663" => DATA <= x"005f";
when "10" & x"664" => DATA <= x"0040";
when "10" & x"665" => DATA <= x"802a";
when "10" & x"666" => DATA <= x"0009";
when "10" & x"667" => DATA <= x"8315";
when "10" & x"668" => DATA <= x"ebc0";
when "10" & x"669" => DATA <= x"0200";
when "10" & x"66a" => DATA <= x"0208";
when "10" & x"66b" => DATA <= x"1002";
when "10" & x"66c" => DATA <= x"1c41";
when "10" & x"66d" => DATA <= x"5100";
when "10" & x"66e" => DATA <= x"0400";
when "10" & x"66f" => DATA <= x"0ca4";
when "10" & x"670" => DATA <= x"07cb";
when "10" & x"671" => DATA <= x"3240";
when "10" & x"672" => DATA <= x"0440";
when "10" & x"673" => DATA <= x"12c1";
when "10" & x"674" => DATA <= x"e840";
when "10" & x"675" => DATA <= x"0fa8";
when "10" & x"676" => DATA <= x"0000";
when "10" & x"677" => DATA <= x"81b6";
when "10" & x"678" => DATA <= x"9068";
when "10" & x"679" => DATA <= x"07d8";
when "10" & x"67a" => DATA <= x"1480";
when "10" & x"67b" => DATA <= x"c0a0";
when "10" & x"67c" => DATA <= x"0418";
when "10" & x"67d" => DATA <= x"000e";
when "10" & x"67e" => DATA <= x"a069";
when "10" & x"67f" => DATA <= x"01dc";
when "10" & x"680" => DATA <= x"0617";
when "10" & x"681" => DATA <= x"1380";
when "10" & x"682" => DATA <= x"c062";
when "10" & x"683" => DATA <= x"0138";
when "10" & x"684" => DATA <= x"2801";
when "10" & x"685" => DATA <= x"00f0";
when "10" & x"686" => DATA <= x"002c";
when "10" & x"687" => DATA <= x"57cf";
when "10" & x"688" => DATA <= x"4afc";
when "10" & x"689" => DATA <= x"7a3e";
when "10" & x"68a" => DATA <= x"5f8f";
when "10" & x"68b" => DATA <= x"d7cb";
when "10" & x"68c" => DATA <= x"d026";
when "10" & x"68d" => DATA <= x"0311";
when "10" & x"68e" => DATA <= x"81e8";
when "10" & x"68f" => DATA <= x"5e81";
when "10" & x"690" => DATA <= x"d88c";
when "10" & x"691" => DATA <= x"0702";
when "10" & x"692" => DATA <= x"0120";
when "10" & x"693" => DATA <= x"d000";
when "10" & x"694" => DATA <= x"0101";
when "10" & x"695" => DATA <= x"c0da";
when "10" & x"696" => DATA <= x"0c7f";
when "10" & x"697" => DATA <= x"3e2b";
when "10" & x"698" => DATA <= x"f9bf";
when "10" & x"699" => DATA <= x"5ffb";
when "10" & x"69a" => DATA <= x"bef7";
when "10" & x"69b" => DATA <= x"affd";
when "10" & x"69c" => DATA <= x"f718";
when "10" & x"69d" => DATA <= x"db88";
when "10" & x"69e" => DATA <= x"0687";
when "10" & x"69f" => DATA <= x"a870";
when "10" & x"6a0" => DATA <= x"3d43";
when "10" & x"6a1" => DATA <= x"81ee";
when "10" & x"6a2" => DATA <= x"efaf";
when "10" & x"6a3" => DATA <= x"feef";
when "10" & x"6a4" => DATA <= x"afe7";
when "10" & x"6a5" => DATA <= x"b3dd";
when "10" & x"6a6" => DATA <= x"ff5f";
when "10" & x"6a7" => DATA <= x"c7e0";
when "10" & x"6a8" => DATA <= x"0944";
when "10" & x"6a9" => DATA <= x"2271";
when "10" & x"6aa" => DATA <= x"0880";
when "10" & x"6ab" => DATA <= x"4a74";
when "10" & x"6ac" => DATA <= x"0010";
when "10" & x"6ad" => DATA <= x"0008";
when "10" & x"6ae" => DATA <= x"000f";
when "10" & x"6af" => DATA <= x"c408";
when "10" & x"6b0" => DATA <= x"0114";
when "10" & x"6b1" => DATA <= x"8202";
when "10" & x"6b2" => DATA <= x"5043";
when "10" & x"6b3" => DATA <= x"0102";
when "10" & x"6b4" => DATA <= x"807e";
when "10" & x"6b5" => DATA <= x"aff7";
when "10" & x"6b6" => DATA <= x"fdfa";
when "10" & x"6b7" => DATA <= x"7c3c";
when "10" & x"6b8" => DATA <= x"804c";
when "10" & x"6b9" => DATA <= x"3cf8";
when "10" & x"6ba" => DATA <= x"fc4e";
when "10" & x"6bb" => DATA <= x"87c3";
when "10" & x"6bc" => DATA <= x"c5d4";
when "10" & x"6bd" => DATA <= x"e8f4";
when "10" & x"6be" => DATA <= x"3a4d";
when "10" & x"6bf" => DATA <= x"0250";
when "10" & x"6c0" => DATA <= x"0121";
when "10" & x"6c1" => DATA <= x"fef4";
when "10" & x"6c2" => DATA <= x"1300";
when "10" & x"6c3" => DATA <= x"b801";
when "10" & x"6c4" => DATA <= x"04ff";
when "10" & x"6c5" => DATA <= x"0200";
when "10" & x"6c6" => DATA <= x"01ef";
when "10" & x"6c7" => DATA <= x"c7e8";
when "10" & x"6c8" => DATA <= x"0400";
when "10" & x"6c9" => DATA <= x"eb00";
when "10" & x"6ca" => DATA <= x"200f";
when "10" & x"6cb" => DATA <= x"55ff";
when "10" & x"6cc" => DATA <= x"400f";
when "10" & x"6cd" => DATA <= x"f3a0";
when "10" & x"6ce" => DATA <= x"e4d1";
when "10" & x"6cf" => DATA <= x"5fe0";
when "10" & x"6d0" => DATA <= x"1003";
when "10" & x"6d1" => DATA <= x"fc02";
when "10" & x"6d2" => DATA <= x"3101";
when "10" & x"6d3" => DATA <= x"07d7";
when "10" & x"6d4" => DATA <= x"e800";
when "10" & x"6d5" => DATA <= x"03fd";
when "10" & x"6d6" => DATA <= x"34da";
when "10" & x"6d7" => DATA <= x"003f";
when "10" & x"6d8" => DATA <= x"29f0";
when "10" & x"6d9" => DATA <= x"faff";
when "10" & x"6da" => DATA <= x"a010";
when "10" & x"6db" => DATA <= x"8013";
when "10" & x"6dc" => DATA <= x"801f";
when "10" & x"6dd" => DATA <= x"f400";
when "10" & x"6de" => DATA <= x"2a90";
when "10" & x"6df" => DATA <= x"07fd";
when "10" & x"6e0" => DATA <= x"002c";
when "10" & x"6e1" => DATA <= x"9f55";
when "10" & x"6e2" => DATA <= x"f0a0";
when "10" & x"6e3" => DATA <= x"7f80";
when "10" & x"6e4" => DATA <= x"0085";
when "10" & x"6e5" => DATA <= x"3eff";
when "10" & x"6e6" => DATA <= x"3f3f";
when "10" & x"6e7" => DATA <= x"c002";
when "10" & x"6e8" => DATA <= x"627e";
when "10" & x"6e9" => DATA <= x"ffd1";
when "10" & x"6ea" => DATA <= x"c0bf";
when "10" & x"6eb" => DATA <= x"9fcd";
when "10" & x"6ec" => DATA <= x"aff0";
when "10" & x"6ed" => DATA <= x"0004";
when "10" & x"6ee" => DATA <= x"0039";
when "10" & x"6ef" => DATA <= x"1c2e";
when "10" & x"6f0" => DATA <= x"178e";
when "10" & x"6f1" => DATA <= x"f7f1";
when "10" & x"6f2" => DATA <= x"f800";
when "10" & x"6f3" => DATA <= x"08e0";
when "10" & x"6f4" => DATA <= x"07fb";
when "10" & x"6f5" => DATA <= x"e400";
when "10" & x"6f6" => DATA <= x"7090";
when "10" & x"6f7" => DATA <= x"07f8";
when "10" & x"6f8" => DATA <= x"0008";
when "10" & x"6f9" => DATA <= x"067e";
when "10" & x"6fa" => DATA <= x"d7e2";
when "10" & x"6fb" => DATA <= x"a9f2";
when "10" & x"6fc" => DATA <= x"ff07";
when "10" & x"6fd" => DATA <= x"803b";
when "10" & x"6fe" => DATA <= x"fd54";
when "10" & x"6ff" => DATA <= x"d77f";
when "10" & x"700" => DATA <= x"d007";
when "10" & x"701" => DATA <= x"7faa";
when "10" & x"702" => DATA <= x"abfe";
when "10" & x"703" => DATA <= x"8017";
when "10" & x"704" => DATA <= x"f47e";
when "10" & x"705" => DATA <= x"2aaf";
when "10" & x"706" => DATA <= x"fa00";
when "10" & x"707" => DATA <= x"e3c6";
when "10" & x"708" => DATA <= x"e870";
when "10" & x"709" => DATA <= x"3fa0";
when "10" & x"70a" => DATA <= x"0ffa";
when "10" & x"70b" => DATA <= x"80a0";
when "10" & x"70c" => DATA <= x"0403";
when "10" & x"70d" => DATA <= x"0010";
when "10" & x"70e" => DATA <= x"ff00";
when "10" & x"70f" => DATA <= x"0fc0";
when "10" & x"710" => DATA <= x"0c07";
when "10" & x"711" => DATA <= x"fafc";
when "10" & x"712" => DATA <= x"00ff";
when "10" & x"713" => DATA <= x"003f";
when "10" & x"714" => DATA <= x"0c15";
when "10" & x"715" => DATA <= x"fefb";
when "10" & x"716" => DATA <= x"003f";
when "10" & x"717" => DATA <= x"c00f";
when "10" & x"718" => DATA <= x"f77f";
when "10" & x"719" => DATA <= x"7f80";
when "10" & x"71a" => DATA <= x"1fe0";
when "10" & x"71b" => DATA <= x"0eff";
when "10" & x"71c" => DATA <= x"2590";
when "10" & x"71d" => DATA <= x"ca0f";
when "10" & x"71e" => DATA <= x"f003";
when "10" & x"71f" => DATA <= x"fdbe";
when "10" & x"720" => DATA <= x"ffe0";
when "10" & x"721" => DATA <= x"07f8";
when "10" & x"722" => DATA <= x"01fe";
when "10" & x"723" => DATA <= x"f37f";
when "10" & x"724" => DATA <= x"8828";
when "10" & x"725" => DATA <= x"01fe";
when "10" & x"726" => DATA <= x"007f";
when "10" & x"727" => DATA <= x"8045";
when "10" & x"728" => DATA <= x"35fe";
when "10" & x"729" => DATA <= x"007f";
when "10" & x"72a" => DATA <= x"801f";
when "10" & x"72b" => DATA <= x"e115";
when "10" & x"72c" => DATA <= x"abfc";
when "10" & x"72d" => DATA <= x"fe00";
when "10" & x"72e" => DATA <= x"7f80";
when "10" & x"72f" => DATA <= x"1fe0";
when "10" & x"730" => DATA <= x"04f5";
when "10" & x"731" => DATA <= x"7f80";
when "10" & x"732" => DATA <= x"1fe0";
when "10" & x"733" => DATA <= x"0038";
when "10" & x"734" => DATA <= x"01fc";
when "10" & x"735" => DATA <= x"1343";
when "10" & x"736" => DATA <= x"a81f";
when "10" & x"737" => DATA <= x"f400";
when "10" & x"738" => DATA <= x"c67f";
when "10" & x"739" => DATA <= x"82e8";
when "10" & x"73a" => DATA <= x"0c46";
when "10" & x"73b" => DATA <= x"1800";
when "10" & x"73c" => DATA <= x"0e47";
when "10" & x"73d" => DATA <= x"e005";
when "10" & x"73e" => DATA <= x"00e2";
when "10" & x"73f" => DATA <= x"8004";
when "10" & x"740" => DATA <= x"0030";
when "10" & x"741" => DATA <= x"1001";
when "10" & x"742" => DATA <= x"d4ff";
when "10" & x"743" => DATA <= x"a001";
when "10" & x"744" => DATA <= x"1700";
when "10" & x"745" => DATA <= x"17cf";
when "10" & x"746" => DATA <= x"e002";
when "10" & x"747" => DATA <= x"028b";
when "10" & x"748" => DATA <= x"8000";
when "10" & x"749" => DATA <= x"6e00";
when "10" & x"74a" => DATA <= x"a0d0";
when "10" & x"74b" => DATA <= x"409e";
when "10" & x"74c" => DATA <= x"2180";
when "10" & x"74d" => DATA <= x"0f6b";
when "10" & x"74e" => DATA <= x"9582";
when "10" & x"74f" => DATA <= x"ec30";
when "10" & x"750" => DATA <= x"e750";
when "10" & x"751" => DATA <= x"8017";
when "10" & x"752" => DATA <= x"8fea";
when "10" & x"753" => DATA <= x"fc1f";
when "10" & x"754" => DATA <= x"2fdf";
when "10" & x"755" => DATA <= x"e006";
when "10" & x"756" => DATA <= x"bbfc";
when "10" & x"757" => DATA <= x"4aff";
when "10" & x"758" => DATA <= x"101e";
when "10" & x"759" => DATA <= x"1fe0";
when "10" & x"75a" => DATA <= x"069b";
when "10" & x"75b" => DATA <= x"fc80";
when "10" & x"75c" => DATA <= x"ff00";
when "10" & x"75d" => DATA <= x"0d1f";
when "10" & x"75e" => DATA <= x"e000";
when "10" & x"75f" => DATA <= x"3bfc";
when "10" & x"760" => DATA <= x"02ff";
when "10" & x"761" => DATA <= x"0002";
when "10" & x"762" => DATA <= x"07ef";
when "10" & x"763" => DATA <= x"0af3";
when "10" & x"764" => DATA <= x"793c";
when "10" & x"765" => DATA <= x"de0f";
when "10" & x"766" => DATA <= x"f415";
when "10" & x"767" => DATA <= x"03d4";
when "10" & x"768" => DATA <= x"381d";
when "10" & x"769" => DATA <= x"0e3f";
when "10" & x"76a" => DATA <= x"7f80";
when "10" & x"76b" => DATA <= x"0580";
when "10" & x"76c" => DATA <= x"e900";
when "10" & x"76d" => DATA <= x"4080";
when "10" & x"76e" => DATA <= x"0a25";
when "10" & x"76f" => DATA <= x"0e00";
when "10" & x"770" => DATA <= x"57be";
when "10" & x"771" => DATA <= x"c00f";
when "10" & x"772" => DATA <= x"65a0";
when "10" & x"773" => DATA <= x"3280";
when "10" & x"774" => DATA <= x"1e4f";
when "10" & x"775" => DATA <= x"a02b";
when "10" & x"776" => DATA <= x"8abf";
when "10" & x"777" => DATA <= x"df00";
when "10" & x"778" => DATA <= x"0038";
when "10" & x"779" => DATA <= x"7c00";
when "10" & x"77a" => DATA <= x"f7af";
when "10" & x"77b" => DATA <= x"f378";
when "10" & x"77c" => DATA <= x"01fe";
when "10" & x"77d" => DATA <= x"8700";
when "10" & x"77e" => DATA <= x"06ab";
when "10" & x"77f" => DATA <= x"fc06";
when "10" & x"780" => DATA <= x"f87f";
when "10" & x"781" => DATA <= x"820e";
when "10" & x"782" => DATA <= x"0749";
when "10" & x"783" => DATA <= x"703f";
when "10" & x"784" => DATA <= x"83d0";
when "10" & x"785" => DATA <= x"e100";
when "10" & x"786" => DATA <= x"03e0";
when "10" & x"787" => DATA <= x"40bc";
when "10" & x"788" => DATA <= x"5f00";
when "10" & x"789" => DATA <= x"0600";
when "10" & x"78a" => DATA <= x"0011";
when "10" & x"78b" => DATA <= x"fca4";
when "10" & x"78c" => DATA <= x"030a";
when "10" & x"78d" => DATA <= x"5000";
when "10" & x"78e" => DATA <= x"6800";
when "10" & x"78f" => DATA <= x"1026";
when "10" & x"790" => DATA <= x"0381";
when "10" & x"791" => DATA <= x"f200";
when "10" & x"792" => DATA <= x"8100";
when "10" & x"793" => DATA <= x"2006";
when "10" & x"794" => DATA <= x"eb92";
when "10" & x"795" => DATA <= x"0500";
when "10" & x"796" => DATA <= x"3c10";
when "10" & x"797" => DATA <= x"0241";
when "10" & x"798" => DATA <= x"100c";
when "10" & x"799" => DATA <= x"0006";
when "10" & x"79a" => DATA <= x"00d0";
when "10" & x"79b" => DATA <= x"002c";
when "10" & x"79c" => DATA <= x"4608";
when "10" & x"79d" => DATA <= x"0094";
when "10" & x"79e" => DATA <= x"4420";
when "10" & x"79f" => DATA <= x"7389";
when "10" & x"7a0" => DATA <= x"44e2";
when "10" & x"7a1" => DATA <= x"f140";
when "10" & x"7a2" => DATA <= x"0004";
when "10" & x"7a3" => DATA <= x"8103";
when "10" & x"7a4" => DATA <= x"8809";
when "10" & x"7a5" => DATA <= x"1048";
when "10" & x"7a6" => DATA <= x"0011";
when "10" & x"7a7" => DATA <= x"9204";
when "10" & x"7a8" => DATA <= x"e200";
when "10" & x"7a9" => DATA <= x"001e";
when "10" & x"7aa" => DATA <= x"4000";
when "10" & x"7ab" => DATA <= x"30c0";
when "10" & x"7ac" => DATA <= x"5400";
when "10" & x"7ad" => DATA <= x"08a8";
when "10" & x"7ae" => DATA <= x"2302";
when "10" & x"7af" => DATA <= x"48c0";
when "10" & x"7b0" => DATA <= x"9068";
when "10" & x"7b1" => DATA <= x"001c";
when "10" & x"7b2" => DATA <= x"0600";
when "10" & x"7b3" => DATA <= x"0089";
when "10" & x"7b4" => DATA <= x"c061";
when "10" & x"7b5" => DATA <= x"5e28";
when "10" & x"7b6" => DATA <= x"9f8f";
when "10" & x"7b7" => DATA <= x"37e3";
when "10" & x"7b8" => DATA <= x"c5e8";
when "10" & x"7b9" => DATA <= x"7daf";
when "10" & x"7ba" => DATA <= x"8743";
when "10" & x"7bb" => DATA <= x"e02e";
when "10" & x"7bc" => DATA <= x"d775";
when "10" & x"7bd" => DATA <= x"a080";
when "10" & x"7be" => DATA <= x"607a";
when "10" & x"7bf" => DATA <= x"c752";
when "10" & x"7c0" => DATA <= x"385e";
when "10" & x"7c1" => DATA <= x"f400";
when "10" & x"7c2" => DATA <= x"fe7f";
when "10" & x"7c3" => DATA <= x"83df";
when "10" & x"7c4" => DATA <= x"ce77";
when "10" & x"7c5" => DATA <= x"fd00";
when "10" & x"7c6" => DATA <= x"0040";
when "10" & x"7c7" => DATA <= x"680e";
when "10" & x"7c8" => DATA <= x"df2f";
when "10" & x"7c9" => DATA <= x"80c0";
when "10" & x"7ca" => DATA <= x"0d06";
when "10" & x"7cb" => DATA <= x"fd7b";
when "10" & x"7cc" => DATA <= x"81e8";
when "10" & x"7cd" => DATA <= x"01f9";
when "10" & x"7ce" => DATA <= x"5ee0";
when "10" & x"7cf" => DATA <= x"1e00";
when "10" & x"7d0" => DATA <= x"2073";
when "10" & x"7d1" => DATA <= x"8d0e";
when "10" & x"7d2" => DATA <= x"70f0";
when "10" & x"7d3" => DATA <= x"7287";
when "10" & x"7d4" => DATA <= x"afbe";
when "10" & x"7d5" => DATA <= x"bfe7";
when "10" & x"7d6" => DATA <= x"fa8f";
when "10" & x"7d7" => DATA <= x"a8ff";
when "10" & x"7d8" => DATA <= x"805f";
when "10" & x"7d9" => DATA <= x"e032";
when "10" & x"7da" => DATA <= x"0984";
when "10" & x"7db" => DATA <= x"0744";
when "10" & x"7dc" => DATA <= x"0000";
when "10" & x"7dd" => DATA <= x"1c80";
when "10" & x"7de" => DATA <= x"2058";
when "10" & x"7df" => DATA <= x"0807";
when "10" & x"7e0" => DATA <= x"4181";
when "10" & x"7e1" => DATA <= x"d55c";
when "10" & x"7e2" => DATA <= x"15fe";
when "10" & x"7e3" => DATA <= x"dd7f";
when "10" & x"7e4" => DATA <= x"c8fb";
when "10" & x"7e5" => DATA <= x"f0c6";
when "10" & x"7e6" => DATA <= x"7c7e";
when "10" & x"7e7" => DATA <= x"1888";
when "10" & x"7e8" => DATA <= x"0f87";
when "10" & x"7e9" => DATA <= x"e3f5";
when "10" & x"7ea" => DATA <= x"3efd";
when "10" & x"7eb" => DATA <= x"7a9f";
when "10" & x"7ec" => DATA <= x"4f67";
when "10" & x"7ed" => DATA <= x"93d1";
when "10" & x"7ee" => DATA <= x"fc92";
when "10" & x"7ef" => DATA <= x"0200";
when "10" & x"7f0" => DATA <= x"b800";
when "10" & x"7f1" => DATA <= x"00a3";
when "10" & x"7f2" => DATA <= x"2480";
when "10" & x"7f3" => DATA <= x"3fc0";
when "10" & x"7f4" => DATA <= x"0424";
when "10" & x"7f5" => DATA <= x"6180";
when "10" & x"7f6" => DATA <= x"f048";
when "10" & x"7f7" => DATA <= x"383f";
when "10" & x"7f8" => DATA <= x"e800";
when "10" & x"7f9" => DATA <= x"6067";
when "10" & x"7fa" => DATA <= x"141e";
when "10" & x"7fb" => DATA <= x"0dcf";
when "10" & x"7fc" => DATA <= x"b023";
when "10" & x"7fd" => DATA <= x"8c00";
when "10" & x"7fe" => DATA <= x"02ac";
when "10" & x"7ff" => DATA <= x"0700";
when "10" & x"800" => DATA <= x"fc21";
when "10" & x"801" => DATA <= x"4000";
when "10" & x"802" => DATA <= x"e7f8";
when "10" & x"803" => DATA <= x"0680";
when "10" & x"804" => DATA <= x"0094";
when "10" & x"805" => DATA <= x"0050";
when "10" & x"806" => DATA <= x"7fa1";
when "10" & x"807" => DATA <= x"9001";
when "10" & x"808" => DATA <= x"0507";
when "10" & x"809" => DATA <= x"003f";
when "10" & x"80a" => DATA <= x"c007";
when "10" & x"80b" => DATA <= x"f280";
when "10" & x"80c" => DATA <= x"8000";
when "10" & x"80d" => DATA <= x"8000";
when "10" & x"80e" => DATA <= x"35c6";
when "10" & x"80f" => DATA <= x"00f0";
when "10" & x"810" => DATA <= x"39c0";
when "10" & x"811" => DATA <= x"0007";
when "10" & x"812" => DATA <= x"003f";
when "10" & x"813" => DATA <= x"c80c";
when "10" & x"814" => DATA <= x"6703";
when "10" & x"815" => DATA <= x"89c8";
when "10" & x"816" => DATA <= x"cc00";
when "10" & x"817" => DATA <= x"1fda";
when "10" & x"818" => DATA <= x"93fe";
when "10" & x"819" => DATA <= x"2400";
when "10" & x"81a" => DATA <= x"3fcf";
when "10" & x"81b" => DATA <= x"f3fe";
when "10" & x"81c" => DATA <= x"fc00";
when "10" & x"81d" => DATA <= x"3fe8";
when "10" & x"81e" => DATA <= x"0106";
when "10" & x"81f" => DATA <= x"8700";
when "10" & x"820" => DATA <= x"2000";
when "10" & x"821" => DATA <= x"00ba";
when "10" & x"822" => DATA <= x"0040";
when "10" & x"823" => DATA <= x"2601";
when "10" & x"824" => DATA <= x"0297";
when "10" & x"825" => DATA <= x"f006";
when "10" & x"826" => DATA <= x"8000";
when "10" & x"827" => DATA <= x"6fda";
when "10" & x"828" => DATA <= x"027f";
when "10" & x"829" => DATA <= x"c803";
when "10" & x"82a" => DATA <= x"fe80";
when "10" & x"82b" => DATA <= x"1ff2";
when "10" & x"82c" => DATA <= x"00ff";
when "10" & x"82d" => DATA <= x"a017";
when "10" & x"82e" => DATA <= x"fd78";
when "10" & x"82f" => DATA <= x"1e11";
when "10" & x"830" => DATA <= x"0ffa";
when "10" & x"831" => DATA <= x"00af";
when "10" & x"832" => DATA <= x"f3f9";
when "10" & x"833" => DATA <= x"584a";
when "10" & x"834" => DATA <= x"ff00";
when "10" & x"835" => DATA <= x"081f";
when "10" & x"836" => DATA <= x"f5fc";
when "10" & x"837" => DATA <= x"004f";
when "10" & x"838" => DATA <= x"bfc0";
when "10" & x"839" => DATA <= x"0f37";
when "10" & x"83a" => DATA <= x"f804";
when "10" & x"83b" => DATA <= x"febe";
when "10" & x"83c" => DATA <= x"aff1";
when "10" & x"83d" => DATA <= x"c009";
when "10" & x"83e" => DATA <= x"fe00";
when "10" & x"83f" => DATA <= x"013f";
when "10" & x"840" => DATA <= x"12a5";
when "10" & x"841" => DATA <= x"f020";
when "10" & x"842" => DATA <= x"01ff";
when "10" & x"843" => DATA <= x"400f";
when "10" & x"844" => DATA <= x"f571";
when "10" & x"845" => DATA <= x"f000";
when "10" & x"846" => DATA <= x"20a0";
when "10" & x"847" => DATA <= x"05c3";
when "10" & x"848" => DATA <= x"e402";
when "10" & x"849" => DATA <= x"c700";
when "10" & x"84a" => DATA <= x"011e";
when "10" & x"84b" => DATA <= x"000a";
when "10" & x"84c" => DATA <= x"ff70";
when "10" & x"84d" => DATA <= x"2140";
when "10" & x"84e" => DATA <= x"4007";
when "10" & x"84f" => DATA <= x"f801";
when "10" & x"850" => DATA <= x"f6bf";
when "10" & x"851" => DATA <= x"7780";
when "10" & x"852" => DATA <= x"1f40";
when "10" & x"853" => DATA <= x"07f8";
when "10" & x"854" => DATA <= x"01fa";
when "10" & x"855" => DATA <= x"257f";
when "10" & x"856" => DATA <= x"be9f";
when "10" & x"857" => DATA <= x"ee03";
when "10" & x"858" => DATA <= x"f800";
when "10" & x"859" => DATA <= x"7ef1";
when "10" & x"85a" => DATA <= x"7f87";
when "10" & x"85b" => DATA <= x"cfe8";
when "10" & x"85c" => DATA <= x"7e00";
when "10" & x"85d" => DATA <= x"0e93";
when "10" & x"85e" => DATA <= x"df8e";
when "10" & x"85f" => DATA <= x"6707";
when "10" & x"860" => DATA <= x"0007";
when "10" & x"861" => DATA <= x"2c02";
when "10" & x"862" => DATA <= x"8200";
when "10" & x"863" => DATA <= x"0f87";
when "10" & x"864" => DATA <= x"8006";
when "10" & x"865" => DATA <= x"802b";
when "10" & x"866" => DATA <= x"f800";
when "10" & x"867" => DATA <= x"dc20";
when "10" & x"868" => DATA <= x"2728";
when "10" & x"869" => DATA <= x"01fe";
when "10" & x"86a" => DATA <= x"fe00";
when "10" & x"86b" => DATA <= x"3cde";
when "10" & x"86c" => DATA <= x"2020";
when "10" & x"86d" => DATA <= x"0311";
when "10" & x"86e" => DATA <= x"8e07";
when "10" & x"86f" => DATA <= x"000f";
when "10" & x"870" => DATA <= x"c394";
when "10" & x"871" => DATA <= x"0001";
when "10" & x"872" => DATA <= x"3fd2";
when "10" & x"873" => DATA <= x"0107";
when "10" & x"874" => DATA <= x"8005";
when "10" & x"875" => DATA <= x"1400";
when "10" & x"876" => DATA <= x"40a0";
when "10" & x"877" => DATA <= x"0010";
when "10" & x"878" => DATA <= x"0007";
when "10" & x"879" => DATA <= x"6002";
when "10" & x"87a" => DATA <= x"0030";
when "10" & x"87b" => DATA <= x"0020";
when "10" & x"87c" => DATA <= x"0078";
when "10" & x"87d" => DATA <= x"5002";
when "10" & x"87e" => DATA <= x"4e40";
when "10" & x"87f" => DATA <= x"1ce8";
when "10" & x"880" => DATA <= x"2400";
when "10" & x"881" => DATA <= x"0801";
when "10" & x"882" => DATA <= x"4020";
when "10" & x"883" => DATA <= x"2758";
when "10" & x"884" => DATA <= x"0004";
when "10" & x"885" => DATA <= x"4000";
when "10" & x"886" => DATA <= x"1028";
when "10" & x"887" => DATA <= x"008d";
when "10" & x"888" => DATA <= x"4000";
when "10" & x"889" => DATA <= x"1900";
when "10" & x"88a" => DATA <= x"7ad0";
when "10" & x"88b" => DATA <= x"02c2";
when "10" & x"88c" => DATA <= x"b010";
when "10" & x"88d" => DATA <= x"0887";
when "10" & x"88e" => DATA <= x"7001";
when "10" & x"88f" => DATA <= x"e002";
when "10" & x"890" => DATA <= x"9000";
when "10" & x"891" => DATA <= x"0998";
when "10" & x"892" => DATA <= x"00fe";
when "10" & x"893" => DATA <= x"7ccf";
when "10" & x"894" => DATA <= x"f9fc";
when "10" & x"895" => DATA <= x"f150";
when "10" & x"896" => DATA <= x"7c06";
when "10" & x"897" => DATA <= x"4341";
when "10" & x"898" => DATA <= x"80c7";
when "10" & x"899" => DATA <= x"e079";
when "10" & x"89a" => DATA <= x"000c";
when "10" & x"89b" => DATA <= x"1f9e";
when "10" & x"89c" => DATA <= x"0720";
when "10" & x"89d" => DATA <= x"5020";
when "10" & x"89e" => DATA <= x"0006";
when "10" & x"89f" => DATA <= x"7082";
when "10" & x"8a0" => DATA <= x"0072";
when "10" & x"8a1" => DATA <= x"0080";
when "10" & x"8a2" => DATA <= x"0688";
when "10" & x"8a3" => DATA <= x"2c1d";
when "10" & x"8a4" => DATA <= x"7ef7";
when "10" & x"8a5" => DATA <= x"7803";
when "10" & x"8a6" => DATA <= x"2b12";
when "10" & x"8a7" => DATA <= x"8017";
when "10" & x"8a8" => DATA <= x"d5fe";
when "10" & x"8a9" => DATA <= x"2423";
when "10" & x"8aa" => DATA <= x"31a8";
when "10" & x"8ab" => DATA <= x"016d";
when "10" & x"8ac" => DATA <= x"5fe0";
when "10" & x"8ad" => DATA <= x"2001";
when "10" & x"8ae" => DATA <= x"9a80";
when "10" & x"8af" => DATA <= x"1ed5";
when "10" & x"8b0" => DATA <= x"fe00";
when "10" & x"8b1" => DATA <= x"5f70";
when "10" & x"8b2" => DATA <= x"03d9";
when "10" & x"8b3" => DATA <= x"febf";
when "10" & x"8b4" => DATA <= x"0020";
when "10" & x"8b5" => DATA <= x"d08a";
when "10" & x"8b6" => DATA <= x"0003";
when "10" & x"8b7" => DATA <= x"b9de";
when "10" & x"8b8" => DATA <= x"3308";
when "10" & x"8b9" => DATA <= x"0480";
when "10" & x"8ba" => DATA <= x"9c00";
when "10" & x"8bb" => DATA <= x"0770";
when "10" & x"8bc" => DATA <= x"5003";
when "10" & x"8bd" => DATA <= x"9a80";
when "10" & x"8be" => DATA <= x"0404";
when "10" & x"8bf" => DATA <= x"0140";
when "10" & x"8c0" => DATA <= x"2012";
when "10" & x"8c1" => DATA <= x"6801";
when "10" & x"8c2" => DATA <= x"1298";
when "10" & x"8c3" => DATA <= x"0004";
when "10" & x"8c4" => DATA <= x"7a05";
when "10" & x"8c5" => DATA <= x"fe77";
when "10" & x"8c6" => DATA <= x"42bd";
when "10" & x"8c7" => DATA <= x"c060";
when "10" & x"8c8" => DATA <= x"0240";
when "10" & x"8c9" => DATA <= x"201e";
when "10" & x"8ca" => DATA <= x"4231";
when "10" & x"8cb" => DATA <= x"bfce";
when "10" & x"8cc" => DATA <= x"0000";
when "10" & x"8cd" => DATA <= x"c380";
when "10" & x"8ce" => DATA <= x"0046";
when "10" & x"8cf" => DATA <= x"603f";
when "10" & x"8d0" => DATA <= x"db80";
when "10" & x"8d1" => DATA <= x"0402";
when "10" & x"8d2" => DATA <= x"4dbe";
when "10" & x"8d3" => DATA <= x"8c44";
when "10" & x"8d4" => DATA <= x"2244";
when "10" & x"8d5" => DATA <= x"2807";
when "10" & x"8d6" => DATA <= x"9b0e";
when "10" & x"8d7" => DATA <= x"bc07";
when "10" & x"8d8" => DATA <= x"03f4";
when "10" & x"8d9" => DATA <= x"181d";
when "10" & x"8da" => DATA <= x"40b0";
when "10" & x"8db" => DATA <= x"0198";
when "10" & x"8dc" => DATA <= x"1402";
when "10" & x"8dd" => DATA <= x"407b";
when "10" & x"8de" => DATA <= x"91f0";
when "10" & x"8df" => DATA <= x"f0ef";
when "10" & x"8e0" => DATA <= x"87eb";
when "10" & x"8e1" => DATA <= x"f1fe";
when "10" & x"8e2" => DATA <= x"c723";
when "10" & x"8e3" => DATA <= x"81c0";
when "10" & x"8e4" => DATA <= x"607e";
when "10" & x"8e5" => DATA <= x"0300";
when "10" & x"8e6" => DATA <= x"a02b";
when "10" & x"8e7" => DATA <= x"fa40";
when "10" & x"8e8" => DATA <= x"11d5";
when "10" & x"8e9" => DATA <= x"1e81";
when "10" & x"8ea" => DATA <= x"a80a";
when "10" & x"8eb" => DATA <= x"00fd";
when "10" & x"8ec" => DATA <= x"f7fd";
when "10" & x"8ed" => DATA <= x"fb85";
when "10" & x"8ee" => DATA <= x"c032";
when "10" & x"8ef" => DATA <= x"e340";
when "10" & x"8f0" => DATA <= x"2000";
when "10" & x"8f1" => DATA <= x"0d0e";
when "10" & x"8f2" => DATA <= x"0783";
when "10" & x"8f3" => DATA <= x"9c00";
when "10" & x"8f4" => DATA <= x"1cde";
when "10" & x"8f5" => DATA <= x"f000";
when "10" & x"8f6" => DATA <= x"0ddf";
when "10" & x"8f7" => DATA <= x"47d4";
when "10" & x"8f8" => DATA <= x"3c3e";
when "10" & x"8f9" => DATA <= x"a001";
when "10" & x"8fa" => DATA <= x"f006";
when "10" & x"8fb" => DATA <= x"4007";
when "10" & x"8fc" => DATA <= x"880a";
when "10" & x"8fd" => DATA <= x"0040";
when "10" & x"8fe" => DATA <= x"4803";
when "10" & x"8ff" => DATA <= x"fde0";
when "10" & x"900" => DATA <= x"c0ae";
when "10" & x"901" => DATA <= x"0525";
when "10" & x"902" => DATA <= x"7257";
when "10" & x"903" => DATA <= x"3a74";
when "10" & x"904" => DATA <= x"3e5f";
when "10" & x"905" => DATA <= x"2f17";
when "10" & x"906" => DATA <= x"c3e9";
when "10" & x"907" => DATA <= x"f0eb";
when "10" & x"908" => DATA <= x"b240";
when "10" & x"909" => DATA <= x"2a00";
when "10" & x"90a" => DATA <= x"00fa";
when "10" & x"90b" => DATA <= x"72b8";
when "10" & x"90c" => DATA <= x"1f8f";
when "10" & x"90d" => DATA <= x"77a3";
when "10" & x"90e" => DATA <= x"d5e8";
when "10" & x"90f" => DATA <= x"b640";
when "10" & x"910" => DATA <= x"8041";
when "10" & x"911" => DATA <= x"a150";
when "10" & x"912" => DATA <= x"2820";
when "10" & x"913" => DATA <= x"0081";
when "10" & x"914" => DATA <= x"420a";
when "10" & x"915" => DATA <= x"0005";
when "10" & x"916" => DATA <= x"4e00";
when "10" & x"917" => DATA <= x"0108";
when "10" & x"918" => DATA <= x"8920";
when "10" & x"919" => DATA <= x"0380";
when "10" & x"91a" => DATA <= x"0426";
when "10" & x"91b" => DATA <= x"8804";
when "10" & x"91c" => DATA <= x"0415";
when "10" & x"91d" => DATA <= x"6002";
when "10" & x"91e" => DATA <= x"bd00";
when "10" & x"91f" => DATA <= x"1802";
when "10" & x"920" => DATA <= x"0002";
when "10" & x"921" => DATA <= x"e240";
when "10" & x"922" => DATA <= x"d140";
when "10" & x"923" => DATA <= x"00ca";
when "10" & x"924" => DATA <= x"004a";
when "10" & x"925" => DATA <= x"0107";
when "10" & x"926" => DATA <= x"cc0a";
when "10" & x"927" => DATA <= x"0060";
when "10" & x"928" => DATA <= x"2016";
when "10" & x"929" => DATA <= x"a006";
when "10" & x"92a" => DATA <= x"6001";
when "10" & x"92b" => DATA <= x"2010";
when "10" & x"92c" => DATA <= x"a000";
when "10" & x"92d" => DATA <= x"9001";
when "10" & x"92e" => DATA <= x"bfc0";
when "10" & x"92f" => DATA <= x"0c03";
when "10" & x"930" => DATA <= x"0300";
when "10" & x"931" => DATA <= x"0038";
when "10" & x"932" => DATA <= x"0051";
when "10" & x"933" => DATA <= x"0190";
when "10" & x"934" => DATA <= x"88ff";
when "10" & x"935" => DATA <= x"0004";
when "10" & x"936" => DATA <= x"7800";
when "10" & x"937" => DATA <= x"02f0";
when "10" & x"938" => DATA <= x"6d00";
when "10" & x"939" => DATA <= x"0ae0";
when "10" & x"93a" => DATA <= x"0a80";
when "10" & x"93b" => DATA <= x"0018";
when "10" & x"93c" => DATA <= x"4e02";
when "10" & x"93d" => DATA <= x"05e8";
when "10" & x"93e" => DATA <= x"0008";
when "10" & x"93f" => DATA <= x"0040";
when "10" & x"940" => DATA <= x"29c7";
when "10" & x"941" => DATA <= x"2134";
when "10" & x"942" => DATA <= x"7700";
when "10" & x"943" => DATA <= x"220b";
when "10" & x"944" => DATA <= x"a3f0";
when "10" & x"945" => DATA <= x"0958";
when "10" & x"946" => DATA <= x"0011";
when "10" & x"947" => DATA <= x"a030";
when "10" & x"948" => DATA <= x"1101";
when "10" & x"949" => DATA <= x"8200";
when "10" & x"94a" => DATA <= x"0870";
when "10" & x"94b" => DATA <= x"075e";
when "10" & x"94c" => DATA <= x"bf45";
when "10" & x"94d" => DATA <= x"0240";
when "10" & x"94e" => DATA <= x"20a1";
when "10" & x"94f" => DATA <= x"ccc0";
when "10" & x"950" => DATA <= x"64bb";
when "10" & x"951" => DATA <= x"cc34";
when "10" & x"952" => DATA <= x"0010";
when "10" & x"953" => DATA <= x"2000";
when "10" & x"954" => DATA <= x"02e0";
when "10" & x"955" => DATA <= x"1033";
when "10" & x"956" => DATA <= x"e190";
when "10" & x"957" => DATA <= x"a80f";
when "10" & x"958" => DATA <= x"4800";
when "10" & x"959" => DATA <= x"5002";
when "10" & x"95a" => DATA <= x"c003";
when "10" & x"95b" => DATA <= x"b808";
when "10" & x"95c" => DATA <= x"0100";
when "10" & x"95d" => DATA <= x"037c";
when "10" & x"95e" => DATA <= x"0080";
when "10" & x"95f" => DATA <= x"00a0";
when "10" & x"960" => DATA <= x"530f";
when "10" & x"961" => DATA <= x"c002";
when "10" & x"962" => DATA <= x"fb80";
when "10" & x"963" => DATA <= x"17c9";
when "10" & x"964" => DATA <= x"a578";
when "10" & x"965" => DATA <= x"017e";
when "10" & x"966" => DATA <= x"3038";
when "10" & x"967" => DATA <= x"021b";
when "10" & x"968" => DATA <= x"0fd7";
when "10" & x"969" => DATA <= x"f00c";
when "10" & x"96a" => DATA <= x"3c80";
when "10" & x"96b" => DATA <= x"a000";
when "10" & x"96c" => DATA <= x"081d";
when "10" & x"96d" => DATA <= x"6090";
when "10" & x"96e" => DATA <= x"0800";
when "10" & x"96f" => DATA <= x"6400";
when "10" & x"970" => DATA <= x"220f";
when "10" & x"971" => DATA <= x"d000";
when "10" & x"972" => DATA <= x"1018";
when "10" & x"973" => DATA <= x"0404";
when "10" & x"974" => DATA <= x"063e";
when "10" & x"975" => DATA <= x"2800";
when "10" & x"976" => DATA <= x"c000";
when "10" & x"977" => DATA <= x"7850";
when "10" & x"978" => DATA <= x"03fc";
when "10" & x"979" => DATA <= x"1c10";
when "10" & x"97a" => DATA <= x"0250";
when "10" & x"97b" => DATA <= x"0260";
when "10" & x"97c" => DATA <= x"61dc";
when "10" & x"97d" => DATA <= x"6fc7";
when "10" & x"97e" => DATA <= x"8b82";
when "10" & x"97f" => DATA <= x"8018";
when "10" & x"980" => DATA <= x"1440";
when "10" & x"981" => DATA <= x"0804";
when "10" & x"982" => DATA <= x"bbc0";
when "10" & x"983" => DATA <= x"0200";
when "10" & x"984" => DATA <= x"0801";
when "10" & x"985" => DATA <= x"0000";
when "10" & x"986" => DATA <= x"4005";
when "10" & x"987" => DATA <= x"c03c";
when "10" & x"988" => DATA <= x"0088";
when "10" & x"989" => DATA <= x"403e";
when "10" & x"98a" => DATA <= x"000c";
when "10" & x"98b" => DATA <= x"0407";
when "10" & x"98c" => DATA <= x"241b";
when "10" & x"98d" => DATA <= x"9fe3";
when "10" & x"98e" => DATA <= x"2020";
when "10" & x"98f" => DATA <= x"0002";
when "10" & x"990" => DATA <= x"2108";
when "10" & x"991" => DATA <= x"001f";
when "10" & x"992" => DATA <= x"e0ee";
when "10" & x"993" => DATA <= x"0023";
when "10" & x"994" => DATA <= x"9201";
when "10" & x"995" => DATA <= x"0ff0";
when "10" & x"996" => DATA <= x"0024";
when "10" & x"997" => DATA <= x"07c1";
when "10" & x"998" => DATA <= x"00a0";
when "10" & x"999" => DATA <= x"0a82";
when "10" & x"99a" => DATA <= x"8014";
when "10" & x"99b" => DATA <= x"1400";
when "10" & x"99c" => DATA <= x"c000";
when "10" & x"99d" => DATA <= x"0044";
when "10" & x"99e" => DATA <= x"c042";
when "10" & x"99f" => DATA <= x"1d00";
when "10" & x"9a0" => DATA <= x"3fe4";
when "10" & x"9a1" => DATA <= x"0025";
when "10" & x"9a2" => DATA <= x"200c";
when "10" & x"9a3" => DATA <= x"0240";
when "10" & x"9a4" => DATA <= x"2000";
when "10" & x"9a5" => DATA <= x"0ee0";
when "10" & x"9a6" => DATA <= x"01a5";
when "10" & x"9a7" => DATA <= x"0010";
when "10" & x"9a8" => DATA <= x"827c";
when "10" & x"9a9" => DATA <= x"007d";
when "10" & x"9aa" => DATA <= x"580c";
when "10" & x"9ab" => DATA <= x"000d";
when "10" & x"9ac" => DATA <= x"5125";
when "10" & x"9ad" => DATA <= x"0032";
when "10" & x"9ae" => DATA <= x"4008";
when "10" & x"9af" => DATA <= x"0623";
when "10" & x"9b0" => DATA <= x"7f80";
when "10" & x"9b1" => DATA <= x"1c4e";
when "10" & x"9b2" => DATA <= x"061b";
when "10" & x"9b3" => DATA <= x"f501";
when "10" & x"9b4" => DATA <= x"c01c";
when "10" & x"9b5" => DATA <= x"3eff";
when "10" & x"9b6" => DATA <= x"7cd7";
when "10" & x"9b7" => DATA <= x"c578";
when "10" & x"9b8" => DATA <= x"3e1e";
when "10" & x"9b9" => DATA <= x"0231";
when "10" & x"9ba" => DATA <= x"ef0e";
when "10" & x"9bb" => DATA <= x"80c5";
when "10" & x"9bc" => DATA <= x"609f";
when "10" & x"9bd" => DATA <= x"00a0";
when "10" & x"9be" => DATA <= x"0024";
when "10" & x"9bf" => DATA <= x"8001";
when "10" & x"9c0" => DATA <= x"3c02";
when "10" & x"9c1" => DATA <= x"803c";
when "10" & x"9c2" => DATA <= x"1c0e";
when "10" & x"9c3" => DATA <= x"0e27";
when "10" & x"9c4" => DATA <= x"0780";
when "10" & x"9c5" => DATA <= x"406a";
when "10" & x"9c6" => DATA <= x"0e05";
when "10" & x"9c7" => DATA <= x"7805";
when "10" & x"9c8" => DATA <= x"0051";
when "10" & x"9c9" => DATA <= x"4500";
when "10" & x"9ca" => DATA <= x"0a94";
when "10" & x"9cb" => DATA <= x"1c00";
when "10" & x"9cc" => DATA <= x"42a0";
when "10" & x"9cd" => DATA <= x"0204";
when "10" & x"9ce" => DATA <= x"8004";
when "10" & x"9cf" => DATA <= x"2800";
when "10" & x"9d0" => DATA <= x"2140";
when "10" & x"9d1" => DATA <= x"0040";
when "10" & x"9d2" => DATA <= x"6012";
when "10" & x"9d3" => DATA <= x"8300";
when "10" & x"9d4" => DATA <= x"9419";
when "10" & x"9d5" => DATA <= x"e000";
when "10" & x"9d6" => DATA <= x"0b01";
when "10" & x"9d7" => DATA <= x"0180";
when "10" & x"9d8" => DATA <= x"6800";
when "10" & x"9d9" => DATA <= x"83c0";
when "10" & x"9da" => DATA <= x"010e";
when "10" & x"9db" => DATA <= x"0000";
when "10" & x"9dc" => DATA <= x"e801";
when "10" & x"9dd" => DATA <= x"8000";
when "10" & x"9de" => DATA <= x"02e0";
when "10" & x"9df" => DATA <= x"0040";
when "10" & x"9e0" => DATA <= x"0103";
when "10" & x"9e1" => DATA <= x"a00c";
when "10" & x"9e2" => DATA <= x"0005";
when "10" & x"9e3" => DATA <= x"71bf";
when "10" & x"9e4" => DATA <= x"dde8";
when "10" & x"9e5" => DATA <= x"f7fa";
when "10" & x"9e6" => DATA <= x"7dfe";
when "10" & x"9e7" => DATA <= x"ef37";
when "10" & x"9e8" => DATA <= x"bbdf";
when "10" & x"9e9" => DATA <= x"e0f3";
when "10" & x"9ea" => DATA <= x"7950";
when "10" & x"9eb" => DATA <= x"6ef8";
when "10" & x"9ec" => DATA <= x"7c8c";
when "10" & x"9ed" => DATA <= x"9f13";
when "10" & x"9ee" => DATA <= x"f340";
when "10" & x"9ef" => DATA <= x"7586";
when "10" & x"9f0" => DATA <= x"c7a0";
when "10" & x"9f1" => DATA <= x"303b";
when "10" & x"9f2" => DATA <= x"edfc";
when "10" & x"9f3" => DATA <= x"ff07";
when "10" & x"9f4" => DATA <= x"8058";
when "10" & x"9f5" => DATA <= x"15fc";
when "10" & x"9f6" => DATA <= x"9200";
when "10" & x"9f7" => DATA <= x"80d0";
when "10" & x"9f8" => DATA <= x"08e4";
when "10" & x"9f9" => DATA <= x"7a1d";
when "10" & x"9fa" => DATA <= x"0007";
when "10" & x"9fb" => DATA <= x"0030";
when "10" & x"9fc" => DATA <= x"377c";
when "10" & x"9fd" => DATA <= x"00f0";
when "10" & x"9fe" => DATA <= x"bf70";
when "10" & x"9ff" => DATA <= x"0146";
when "10" & x"a00" => DATA <= x"dc43";
when "10" & x"a01" => DATA <= x"943c";
when "10" & x"a02" => DATA <= x"1c0f";
when "10" & x"a03" => DATA <= x"70e3";
when "10" & x"a04" => DATA <= x"bebf";
when "10" & x"a05" => DATA <= x"f7bc";
when "10" & x"a06" => DATA <= x"7d47";
when "10" & x"a07" => DATA <= x"fa7c";
when "10" & x"a08" => DATA <= x"1f7f";
when "10" & x"a09" => DATA <= x"f00a";
when "10" & x"a0a" => DATA <= x"e280";
when "10" & x"a0b" => DATA <= x"4c00";
when "10" & x"a0c" => DATA <= x"3e00";
when "10" & x"a0d" => DATA <= x"66d0";
when "10" & x"a0e" => DATA <= x"0570";
when "10" & x"a0f" => DATA <= x"301c";
when "10" & x"a10" => DATA <= x"0804";
when "10" & x"a11" => DATA <= x"ea01";
when "10" & x"a12" => DATA <= x"c123";
when "10" & x"a13" => DATA <= x"e1b0";
when "10" & x"a14" => DATA <= x"fb6d";
when "10" & x"a15" => DATA <= x"be00";
when "10" & x"a16" => DATA <= x"4000";
when "10" & x"a17" => DATA <= x"008d";
when "10" & x"a18" => DATA <= x"4edc";
when "10" & x"a19" => DATA <= x"7fbd";
when "10" & x"a1a" => DATA <= x"3bf1";
when "10" & x"a1b" => DATA <= x"faf4";
when "10" & x"a1c" => DATA <= x"7a81";
when "10" & x"a1d" => DATA <= x"000f";
when "10" & x"a1e" => DATA <= x"f017";
when "10" & x"a1f" => DATA <= x"0180";
when "10" & x"a20" => DATA <= x"0040";
when "10" & x"a21" => DATA <= x"073b";
when "10" & x"a22" => DATA <= x"c2c0";
when "10" & x"a23" => DATA <= x"1fa0";
when "10" & x"a24" => DATA <= x"5a04";
when "10" & x"a25" => DATA <= x"0101";
when "10" & x"a26" => DATA <= x"00c0";
when "10" & x"a27" => DATA <= x"01b9";
when "10" & x"a28" => DATA <= x"02c0";
when "10" & x"a29" => DATA <= x"17e1";
when "10" & x"a2a" => DATA <= x"ba08";
when "10" & x"a2b" => DATA <= x"0270";
when "10" & x"a2c" => DATA <= x"013d";
when "10" & x"a2d" => DATA <= x"0160";
when "10" & x"a2e" => DATA <= x"0ee1";
when "10" & x"a2f" => DATA <= x"7d10";
when "10" & x"a30" => DATA <= x"0404";
when "10" & x"a31" => DATA <= x"0300";
when "10" & x"a32" => DATA <= x"02fc";
when "10" & x"a33" => DATA <= x"0022";
when "10" & x"a34" => DATA <= x"0008";
when "10" & x"a35" => DATA <= x"3801";
when "10" & x"a36" => DATA <= x"b8da";
when "10" & x"a37" => DATA <= x"2110";
when "10" & x"a38" => DATA <= x"045c";
when "10" & x"a39" => DATA <= x"007d";
when "10" & x"a3a" => DATA <= x"f003";
when "10" & x"a3b" => DATA <= x"d892";
when "10" & x"a3c" => DATA <= x"8010";
when "10" & x"a3d" => DATA <= x"0004";
when "10" & x"a3e" => DATA <= x"0001";
when "10" & x"a3f" => DATA <= x"efc0";
when "10" & x"a40" => DATA <= x"2000";
when "10" & x"a41" => DATA <= x"0d00";
when "10" & x"a42" => DATA <= x"3d5a";
when "10" & x"a43" => DATA <= x"1400";
when "10" & x"a44" => DATA <= x"11e0";
when "10" & x"a45" => DATA <= x"07f8";
when "10" & x"a46" => DATA <= x"1a80";
when "10" & x"a47" => DATA <= x"8020";
when "10" & x"a48" => DATA <= x"0010";
when "10" & x"a49" => DATA <= x"0136";
when "10" & x"a4a" => DATA <= x"e0b0";
when "10" & x"a4b" => DATA <= x"07d8";
when "10" & x"a4c" => DATA <= x"2682";
when "10" & x"a4d" => DATA <= x"0080";
when "10" & x"a4e" => DATA <= x"8020";
when "10" & x"a4f" => DATA <= x"005e";
when "10" & x"a50" => DATA <= x"c0b0";
when "10" & x"a51" => DATA <= x"07b8";
when "10" & x"a52" => DATA <= x"5a84";
when "10" & x"a53" => DATA <= x"1d01";
when "10" & x"a54" => DATA <= x"000a";
when "10" & x"a55" => DATA <= x"a002";
when "10" & x"a56" => DATA <= x"0701";
when "10" & x"a57" => DATA <= x"0000";
when "10" & x"a58" => DATA <= x"2000";
when "10" & x"a59" => DATA <= x"8060";
when "10" & x"a5a" => DATA <= x"07c0";
when "10" & x"a5b" => DATA <= x"0ff1";
when "10" & x"a5c" => DATA <= x"cd80";
when "10" & x"a5d" => DATA <= x"3fc0";
when "10" & x"a5e" => DATA <= x"4007";
when "10" & x"a5f" => DATA <= x"09e4";
when "10" & x"a60" => DATA <= x"5143";
when "10" & x"a61" => DATA <= x"0732";
when "10" & x"a62" => DATA <= x"61c0";
when "10" & x"a63" => DATA <= x"e280";
when "10" & x"a64" => DATA <= x"380c";
when "10" & x"a65" => DATA <= x"0e0f";
when "10" & x"a66" => DATA <= x"0e00";
when "10" & x"a67" => DATA <= x"7ff0";
when "10" & x"a68" => DATA <= x"200c";
when "10" & x"a69" => DATA <= x"0802";
when "10" & x"a6a" => DATA <= x"0025";
when "10" & x"a6b" => DATA <= x"c814";
when "10" & x"a6c" => DATA <= x"0040";
when "10" & x"a6d" => DATA <= x"e005";
when "10" & x"a6e" => DATA <= x"d86e";
when "10" & x"a6f" => DATA <= x"8200";
when "10" & x"a70" => DATA <= x"808a";
when "10" & x"a71" => DATA <= x"0027";
when "10" & x"a72" => DATA <= x"a02c";
when "10" & x"a73" => DATA <= x"01dc";
when "10" & x"a74" => DATA <= x"2fa2";
when "10" & x"a75" => DATA <= x"0080";
when "10" & x"a76" => DATA <= x"0060";
when "10" & x"a77" => DATA <= x"007f";
when "10" & x"a78" => DATA <= x"d801";
when "10" & x"a79" => DATA <= x"01f8";
when "10" & x"a7a" => DATA <= x"dba4";
when "10" & x"a7b" => DATA <= x"0101";
when "10" & x"a7c" => DATA <= x"0280";
when "10" & x"a7d" => DATA <= x"0fbe";
when "10" & x"a7e" => DATA <= x"00f3";
when "10" & x"a7f" => DATA <= x"5a50";
when "10" & x"a80" => DATA <= x"0200";
when "10" & x"a81" => DATA <= x"0080";
when "10" & x"a82" => DATA <= x"003f";
when "10" & x"a83" => DATA <= x"f806";
when "10" & x"a84" => DATA <= x"8000";
when "10" & x"a85" => DATA <= x"2007";
when "10" & x"a86" => DATA <= x"2b62";
when "10" & x"a87" => DATA <= x"c01f";
when "10" & x"a88" => DATA <= x"fc04";
when "10" & x"a89" => DATA <= x"0501";
when "10" & x"a8a" => DATA <= x"0040";
when "10" & x"a8b" => DATA <= x"0fb5";
when "10" & x"a8c" => DATA <= x"0580";
when "10" & x"a8d" => DATA <= x"36c1";
when "10" & x"a8e" => DATA <= x"b410";
when "10" & x"a8f" => DATA <= x"04e0";
when "10" & x"a90" => DATA <= x"01f9";
when "10" & x"a91" => DATA <= x"02c0";
when "10" & x"a92" => DATA <= x"1ee1";
when "10" & x"a93" => DATA <= x"6a10";
when "10" & x"a94" => DATA <= x"0404";
when "10" & x"a95" => DATA <= x"0300";
when "10" & x"a96" => DATA <= x"06ff";
when "10" & x"a97" => DATA <= x"803f";
when "10" & x"a98" => DATA <= x"cdb4";
when "10" & x"a99" => DATA <= x"4120";
when "10" & x"a9a" => DATA <= x"0ffd";
when "10" & x"a9b" => DATA <= x"0006";
when "10" & x"a9c" => DATA <= x"0017";
when "10" & x"a9d" => DATA <= x"3501";
when "10" & x"a9e" => DATA <= x"4008";
when "10" & x"a9f" => DATA <= x"04f0";
when "10" & x"aa0" => DATA <= x"7bbf";
when "10" & x"aa1" => DATA <= x"a9f8";
when "10" & x"aa2" => DATA <= x"eaf0";
when "10" & x"aa3" => DATA <= x"7f1f";
when "10" & x"aa4" => DATA <= x"c1e0";
when "10" & x"aa5" => DATA <= x"1e00";
when "10" & x"aa6" => DATA <= x"a69a";
when "10" & x"aa7" => DATA <= x"0834";
when "10" & x"aa8" => DATA <= x"0200";
when "10" & x"aa9" => DATA <= x"030f";
when "10" & x"aaa" => DATA <= x"0000";
when "10" & x"aab" => DATA <= x"5025";
when "10" & x"aac" => DATA <= x"0001";
when "10" & x"aad" => DATA <= x"3801";
when "10" & x"aae" => DATA <= x"81c0";
when "10" & x"aaf" => DATA <= x"040e";
when "10" & x"ab0" => DATA <= x"0007";
when "10" & x"ab1" => DATA <= x"f839";
when "10" & x"ab2" => DATA <= x"203d";
when "10" & x"ab3" => DATA <= x"41c0";
when "10" & x"ab4" => DATA <= x"a0f5";
when "10" & x"ab5" => DATA <= x"0778";
when "10" & x"ab6" => DATA <= x"0000";
when "10" & x"ab7" => DATA <= x"54aa";
when "10" & x"ab8" => DATA <= x"0008";
when "10" & x"ab9" => DATA <= x"000a";
when "10" & x"aba" => DATA <= x"8a00";
when "10" & x"abb" => DATA <= x"2006";
when "10" & x"abc" => DATA <= x"3800";
when "10" & x"abd" => DATA <= x"8140";
when "10" & x"abe" => DATA <= x"0140";
when "10" & x"abf" => DATA <= x"8700";
when "10" & x"ac0" => DATA <= x"0428";
when "10" & x"ac1" => DATA <= x"000d";
when "10" & x"ac2" => DATA <= x"4180";
when "10" & x"ac3" => DATA <= x"4a0c";
when "10" & x"ac4" => DATA <= x"0203";
when "10" & x"ac5" => DATA <= x"3c00";
when "10" & x"ac6" => DATA <= x"0140";
when "10" & x"ac7" => DATA <= x"203d";
when "10" & x"ac8" => DATA <= x"0128";
when "10" & x"ac9" => DATA <= x"7000";
when "10" & x"aca" => DATA <= x"07c0";
when "10" & x"acb" => DATA <= x"2400";
when "10" & x"acc" => DATA <= x"0540";
when "10" & x"acd" => DATA <= x"0081";
when "10" & x"ace" => DATA <= x"1680";
when "10" & x"acf" => DATA <= x"2024";
when "10" & x"ad0" => DATA <= x"0101";
when "10" & x"ad1" => DATA <= x"5fe9";
when "10" & x"ad2" => DATA <= x"f7ff";
when "10" & x"ad3" => DATA <= x"6fa7";
when "10" & x"ad4" => DATA <= x"def4";
when "10" & x"ad5" => DATA <= x"2fbe";
when "10" & x"ad6" => DATA <= x"ef6a";
when "10" & x"ad7" => DATA <= x"ff7f";
when "10" & x"ad8" => DATA <= x"3e1b";
when "10" & x"ad9" => DATA <= x"0187";
when "10" & x"ada" => DATA <= x"c681";
when "10" & x"adb" => DATA <= x"d61b";
when "10" & x"adc" => DATA <= x"1e40";
when "10" & x"add" => DATA <= x"1fcf";
when "10" & x"ade" => DATA <= x"f078";
when "10" & x"adf" => DATA <= x"0100";
when "10" & x"ae0" => DATA <= x"00a8";
when "10" & x"ae1" => DATA <= x"0408";
when "10" & x"ae2" => DATA <= x"0c00";
when "10" & x"ae3" => DATA <= x"8cad";
when "10" & x"ae4" => DATA <= x"faff";
when "10" & x"ae5" => DATA <= x"0180";
when "10" & x"ae6" => DATA <= x"1a0d";
when "10" & x"ae7" => DATA <= x"faf7";
when "10" & x"ae8" => DATA <= x"7f80";
when "10" & x"ae9" => DATA <= x"d800";
when "10" & x"aea" => DATA <= x"0af7";
when "10" & x"aeb" => DATA <= x"38d0";
when "10" & x"aec" => DATA <= x"0800";
when "10" & x"aed" => DATA <= x"0200";
when "10" & x"aee" => DATA <= x"009c";
when "10" & x"aef" => DATA <= x"7800";
when "10" & x"af0" => DATA <= x"3c1c";
when "10" & x"af1" => DATA <= x"e1e7";
when "10" & x"af2" => DATA <= x"7d00";
when "10" & x"af3" => DATA <= x"3beb";
when "10" & x"af4" => DATA <= x"febb";
when "10" & x"af5" => DATA <= x"c7d4";
when "10" & x"af6" => DATA <= x"01c7";
when "10" & x"af7" => DATA <= x"e3e0";
when "10" & x"af8" => DATA <= x"f005";
when "10" & x"af9" => DATA <= x"8000";
when "10" & x"afa" => DATA <= x"1e3f";
when "10" & x"afb" => DATA <= x"2401";
when "10" & x"afc" => DATA <= x"fe70";
when "10" & x"afd" => DATA <= x"4003";
when "10" & x"afe" => DATA <= x"f801";
when "10" & x"aff" => DATA <= x"815c";
when "10" & x"b00" => DATA <= x"0e77";
when "10" & x"b01" => DATA <= x"3572";
when "10" & x"b02" => DATA <= x"292b";
when "10" & x"b03" => DATA <= x"7c3e";
when "10" & x"b04" => DATA <= x"dde1";
when "10" & x"b05" => DATA <= x"f4f5";
when "10" & x"b06" => DATA <= x"7a3f";
when "10" & x"b07" => DATA <= x"2a70";
when "10" & x"b08" => DATA <= x"2815";
when "10" & x"b09" => DATA <= x"4a3f";
when "10" & x"b0a" => DATA <= x"5ecf";
when "10" & x"b0b" => DATA <= x"faf7";
when "10" & x"b0c" => DATA <= x"7ed7";
when "10" & x"b0d" => DATA <= x"ff80";
when "10" & x"b0e" => DATA <= x"7804";
when "10" & x"b0f" => DATA <= x"8050";
when "10" & x"b10" => DATA <= x"2002";
when "10" & x"b11" => DATA <= x"813c";
when "10" & x"b12" => DATA <= x"03c0";
when "10" & x"b13" => DATA <= x"3c02";
when "10" & x"b14" => DATA <= x"c004";
when "10" & x"b15" => DATA <= x"1401";
when "10" & x"b16" => DATA <= x"441e";
when "10" & x"b17" => DATA <= x"01e0";
when "10" & x"b18" => DATA <= x"1e01";
when "10" & x"b19" => DATA <= x"e01e";
when "10" & x"b1a" => DATA <= x"01c0";
when "10" & x"b1b" => DATA <= x"001f";
when "10" & x"b1c" => DATA <= x"00f0";
when "10" & x"b1d" => DATA <= x"0f00";
when "10" & x"b1e" => DATA <= x"f000";
when "10" & x"b1f" => DATA <= x"4780";
when "10" & x"b20" => DATA <= x"7800";
when "10" & x"b21" => DATA <= x"0021";
when "10" & x"b22" => DATA <= x"4001";
when "10" & x"b23" => DATA <= x"0b00";
when "10" & x"b24" => DATA <= x"0470";
when "10" & x"b25" => DATA <= x"0064";
when "10" & x"b26" => DATA <= x"6239";
when "10" & x"b27" => DATA <= x"04d1";
when "10" & x"b28" => DATA <= x"c864";
when "10" & x"b29" => DATA <= x"3b20";
when "10" & x"b2a" => DATA <= x"040e";
when "10" & x"b2b" => DATA <= x"0022";
when "10" & x"b2c" => DATA <= x"5269";
when "10" & x"b2d" => DATA <= x"1293";
when "10" & x"b2e" => DATA <= x"4884";
when "10" & x"b2f" => DATA <= x"df00";
when "10" & x"b30" => DATA <= x"f00f";
when "10" & x"b31" => DATA <= x"00f0";
when "10" & x"b32" => DATA <= x"0000";
when "10" & x"b33" => DATA <= x"23c0";
when "10" & x"b34" => DATA <= x"3400";
when "10" & x"b35" => DATA <= x"4140";
when "10" & x"b36" => DATA <= x"020f";
when "10" & x"b37" => DATA <= x"00f0";
when "10" & x"b38" => DATA <= x"0001";
when "10" & x"b39" => DATA <= x"03c0";
when "10" & x"b3a" => DATA <= x"3c03";
when "10" & x"b3b" => DATA <= x"c03c";
when "10" & x"b3c" => DATA <= x"03c0";
when "10" & x"b3d" => DATA <= x"0000";
when "10" & x"b3e" => DATA <= x"2a00";
when "10" & x"b3f" => DATA <= x"0178";
when "10" & x"b40" => DATA <= x"0780";
when "10" & x"b41" => DATA <= x"7807";
when "10" & x"b42" => DATA <= x"8004";
when "10" & x"b43" => DATA <= x"2802";
when "10" & x"b44" => DATA <= x"843c";
when "10" & x"b45" => DATA <= x"03c0";
when "10" & x"b46" => DATA <= x"3c02";
when "10" & x"b47" => DATA <= x"403e";
when "10" & x"b48" => DATA <= x"0101";
when "10" & x"b49" => DATA <= x"2f94";
when "10" & x"b4a" => DATA <= x"fa7c";
when "10" & x"b4b" => DATA <= x"3ed6";
when "10" & x"b4c" => DATA <= x"03e1";
when "10" & x"b4d" => DATA <= x"b0f8";
when "10" & x"b4e" => DATA <= x"7857";
when "10" & x"b4f" => DATA <= x"c06c";
when "10" & x"b50" => DATA <= x"f743";
when "10" & x"b51" => DATA <= x"74f6";
when "10" & x"b52" => DATA <= x"1b1d";
when "10" & x"b53" => DATA <= x"f805";
when "10" & x"b54" => DATA <= x"0001";
when "10" & x"b55" => DATA <= x"2802";
when "10" & x"b56" => DATA <= x"8100";
when "10" & x"b57" => DATA <= x"0040";
when "10" & x"b58" => DATA <= x"0103";
when "10" & x"b59" => DATA <= x"8008";
when "10" & x"b5a" => DATA <= x"1400";
when "10" & x"b5b" => DATA <= x"0707";
when "10" & x"b5c" => DATA <= x"f038";
when "10" & x"b5d" => DATA <= x"3e81";
when "10" & x"b5e" => DATA <= x"c1d4";
when "10" & x"b5f" => DATA <= x"0002";
when "10" & x"b60" => DATA <= x"2f10";
when "10" & x"b61" => DATA <= x"0040";
when "10" & x"b62" => DATA <= x"ef00";
when "10" & x"b63" => DATA <= x"008a";
when "10" & x"b64" => DATA <= x"a801";
when "10" & x"b65" => DATA <= x"4028";
when "10" & x"b66" => DATA <= x"5500";
when "10" & x"b67" => DATA <= x"1504";
when "10" & x"b68" => DATA <= x"0e00";
when "10" & x"b69" => DATA <= x"a400";
when "10" & x"b6a" => DATA <= x"0100";
when "10" & x"b6b" => DATA <= x"ab40";
when "10" & x"b6c" => DATA <= x"0140";
when "10" & x"b6d" => DATA <= x"8054";
when "10" & x"b6e" => DATA <= x"0054";
when "10" & x"b6f" => DATA <= x"0203";
when "10" & x"b70" => DATA <= x"b830";
when "10" & x"b71" => DATA <= x"1c04";
when "10" & x"b72" => DATA <= x"0670";
when "10" & x"b73" => DATA <= x"0202";
when "10" & x"b74" => DATA <= x"4028";
when "10" & x"b75" => DATA <= x"0400";
when "10" & x"b76" => DATA <= x"03a0";
when "10" & x"b77" => DATA <= x"1005";
when "10" & x"b78" => DATA <= x"0080";
when "10" & x"b79" => DATA <= x"0025";
when "10" & x"b7a" => DATA <= x"4a00";
when "10" & x"b7b" => DATA <= x"0080";
when "10" & x"b7c" => DATA <= x"0020";
when "10" & x"b7d" => DATA <= x"000a";
when "10" & x"b7e" => DATA <= x"8280";
when "10" & x"b7f" => DATA <= x"0020";
when "10" & x"b80" => DATA <= x"0510";
when "10" & x"b81" => DATA <= x"0104";
when "10" & x"b82" => DATA <= x"2a10";
when "10" & x"b83" => DATA <= x"0000";
when "10" & x"b84" => DATA <= x"4000";
when "10" & x"b85" => DATA <= x"8000";
when "10" & x"b86" => DATA <= x"20c0";
when "10" & x"b87" => DATA <= x"a000";
when "10" & x"b88" => DATA <= x"8203";
when "10" & x"b89" => DATA <= x"8fc3";
when "10" & x"b8a" => DATA <= x"f47e";
when "10" & x"b8b" => DATA <= x"bf4f";
when "10" & x"b8c" => DATA <= x"810e";
when "10" & x"b8d" => DATA <= x"e040";
when "10" & x"b8e" => DATA <= x"ba5c";
when "10" & x"b8f" => DATA <= x"2cc5";
when "10" & x"b90" => DATA <= x"47be";
when "10" & x"b91" => DATA <= x"5f0f";
when "10" & x"b92" => DATA <= x"9048";
when "10" & x"b93" => DATA <= x"1dfc";
when "10" & x"b94" => DATA <= x"ff3f";
when "10" & x"b95" => DATA <= x"80d8";
when "10" & x"b96" => DATA <= x"740e";
when "10" & x"b97" => DATA <= x"4001";
when "10" & x"b98" => DATA <= x"81c4";
when "10" & x"b99" => DATA <= x"0c07";
when "10" & x"b9a" => DATA <= x"fbf9";
when "10" & x"b9b" => DATA <= x"bc00";
when "10" & x"b9c" => DATA <= x"0230";
when "10" & x"b9d" => DATA <= x"1c15";
when "10" & x"b9e" => DATA <= x"1e81";
when "10" & x"b9f" => DATA <= x"4900";
when "10" & x"ba0" => DATA <= x"100f";
when "10" & x"ba1" => DATA <= x"77fe";
when "10" & x"ba2" => DATA <= x"efbf";
when "10" & x"ba3" => DATA <= x"d40f";
when "10" & x"ba4" => DATA <= x"fdf7";
when "10" & x"ba5" => DATA <= x"7f80";
when "10" & x"ba6" => DATA <= x"1fe7";
when "10" & x"ba7" => DATA <= x"118c";
when "10" & x"ba8" => DATA <= x"b89c";
when "10" & x"ba9" => DATA <= x"0e34";
when "10" & x"baa" => DATA <= x"3d43";
when "10" & x"bab" => DATA <= x"9c00";
when "10" & x"bac" => DATA <= x"1e9e";
when "10" & x"bad" => DATA <= x"fa00";
when "10" & x"bae" => DATA <= x"77bf";
when "10" & x"baf" => DATA <= x"d3c1";
when "10" & x"bb0" => DATA <= x"ea3e";
when "10" & x"bb1" => DATA <= x"a001";
when "10" & x"bb2" => DATA <= x"f0fc";
when "10" & x"bb3" => DATA <= x"77c0";
when "10" & x"bb4" => DATA <= x"0f80";
when "10" & x"bb5" => DATA <= x"003d";
when "10" & x"bb6" => DATA <= x"feef";
when "10" & x"bb7" => DATA <= x"e007";
when "10" & x"bb8" => DATA <= x"fbc0";
when "10" & x"bb9" => DATA <= x"8007";
when "10" & x"bba" => DATA <= x"7629";
when "10" & x"bbb" => DATA <= x"2b92";
when "10" & x"bbc" => DATA <= x"b9dc";
when "10" & x"bbd" => DATA <= x"0f00";
when "10" & x"bbe" => DATA <= x"fa78";
when "10" & x"bbf" => DATA <= x"3e9f";
when "10" & x"bc0" => DATA <= x"0f87";
when "10" & x"bc1" => DATA <= x"13e1";
when "10" & x"bc2" => DATA <= x"f4a2";
when "10" & x"bc3" => DATA <= x"543a";
when "10" & x"bc4" => DATA <= x"15a9";
when "10" & x"bc5" => DATA <= x"448a";
when "10" & x"bc6" => DATA <= x"51fe";
when "10" & x"bc7" => DATA <= x"fdaf";
when "10" & x"bc8" => DATA <= x"f7a3";
when "10" & x"bc9" => DATA <= x"c1ea";
when "10" & x"bca" => DATA <= x"f490";
when "10" & x"bcb" => DATA <= x"0187";
when "10" & x"bcc" => DATA <= x"8020";
when "10" & x"bcd" => DATA <= x"3800";
when "10" & x"bce" => DATA <= x"09a0";
when "10" & x"bcf" => DATA <= x"004f";
when "10" & x"bd0" => DATA <= x"00f0";
when "10" & x"bd1" => DATA <= x"0f00";
when "10" & x"bd2" => DATA <= x"9001";
when "10" & x"bd3" => DATA <= x"0680";
when "10" & x"bd4" => DATA <= x"0834";
when "10" & x"bd5" => DATA <= x"0005";
when "10" & x"bd6" => DATA <= x"e000";
when "10" & x"bd7" => DATA <= x"8f00";
when "10" & x"bd8" => DATA <= x"f00f";
when "10" & x"bd9" => DATA <= x"00f0";
when "10" & x"bda" => DATA <= x"0e00";
when "10" & x"bdb" => DATA <= x"2078";
when "10" & x"bdc" => DATA <= x"0043";
when "10" & x"bdd" => DATA <= x"c03c";
when "10" & x"bde" => DATA <= x"0380";
when "10" & x"bdf" => DATA <= x"011e";
when "10" & x"be0" => DATA <= x"01e0";
when "10" & x"be1" => DATA <= x"0000";
when "10" & x"be2" => DATA <= x"8780";
when "10" & x"be3" => DATA <= x"5000";
when "10" & x"be4" => DATA <= x"26a6";
when "10" & x"be5" => DATA <= x"4320";
when "10" & x"be6" => DATA <= x"1a39";
when "10" & x"be7" => DATA <= x"04d8";
when "10" & x"be8" => DATA <= x"0008";
when "10" & x"be9" => DATA <= x"0045";
when "10" & x"bea" => DATA <= x"a4c2";
when "10" & x"beb" => DATA <= x"6902";
when "10" & x"bec" => DATA <= x"9348";
when "10" & x"bed" => DATA <= x"9200";
when "10" & x"bee" => DATA <= x"0ff0";
when "10" & x"bef" => DATA <= x"0a00";
when "10" & x"bf0" => DATA <= x"0278";
when "10" & x"bf1" => DATA <= x"0500";
when "10" & x"bf2" => DATA <= x"5045";
when "10" & x"bf3" => DATA <= x"0006";
when "10" & x"bf4" => DATA <= x"3c03";
when "10" & x"bf5" => DATA <= x"c000";
when "10" & x"bf6" => DATA <= x"030f";
when "10" & x"bf7" => DATA <= x"00f0";
when "10" & x"bf8" => DATA <= x"0003";
when "10" & x"bf9" => DATA <= x"0000";
when "10" & x"bfa" => DATA <= x"40f0";
when "10" & x"bfb" => DATA <= x"0b00";
when "10" & x"bfc" => DATA <= x"4078";
when "10" & x"bfd" => DATA <= x"0007";
when "10" & x"bfe" => DATA <= x"c024";
when "10" & x"bff" => DATA <= x"0280";
when "10" & x"c00" => DATA <= x"a800";
when "10" & x"c01" => DATA <= x"0c00";
when "10" & x"c02" => DATA <= x"0178";
when "10" & x"c03" => DATA <= x"0580";
when "10" & x"c04" => DATA <= x"033c";
when "10" & x"c05" => DATA <= x"0240";
when "10" & x"c06" => DATA <= x"021c";
when "10" & x"c07" => DATA <= x"0038";
when "10" & x"c08" => DATA <= x"0004";
when "10" & x"c09" => DATA <= x"3c02";
when "10" & x"c0a" => DATA <= x"c00c";
when "10" & x"c0b" => DATA <= x"1e01";
when "10" & x"c0c" => DATA <= x"201f";
when "10" & x"c0d" => DATA <= x"0080";
when "10" & x"c0e" => DATA <= x"3e9f";
when "10" & x"c0f" => DATA <= x"0e9c";
when "10" & x"c10" => DATA <= x"f94f";
when "10" & x"c11" => DATA <= x"b5f1";
when "10" & x"c12" => DATA <= x"5b15";
when "10" & x"c13" => DATA <= x"f0f0";
when "10" & x"c14" => DATA <= x"6c50";
when "10" & x"c15" => DATA <= x"d82c";
when "10" & x"c16" => DATA <= x"363b";
when "10" & x"c17" => DATA <= x"159a";
when "10" & x"c18" => DATA <= x"c77e";
when "10" & x"c19" => DATA <= x"01a0";
when "10" & x"c1a" => DATA <= x"0040";
when "10" & x"c1b" => DATA <= x"0502";
when "10" & x"c1c" => DATA <= x"5801";
when "10" & x"c1d" => DATA <= x"0001";
when "10" & x"c1e" => DATA <= x"60e0";
when "10" & x"c1f" => DATA <= x"f33e";
when "10" & x"c20" => DATA <= x"8000";
when "10" & x"c21" => DATA <= x"881e";
when "10" & x"c22" => DATA <= x"0140";
when "10" & x"c23" => DATA <= x"0a0a";
when "10" & x"c24" => DATA <= x"0040";
when "10" & x"c25" => DATA <= x"5000";
when "10" & x"c26" => DATA <= x"a800";
when "10" & x"c27" => DATA <= x"40b0";
when "10" & x"c28" => DATA <= x"0200";
when "10" & x"c29" => DATA <= x"1280";
when "10" & x"c2a" => DATA <= x"0034";
when "10" & x"c2b" => DATA <= x"0015";
when "10" & x"c2c" => DATA <= x"0081";
when "10" & x"c2d" => DATA <= x"3430";
when "10" & x"c2e" => DATA <= x"0c0c";
when "10" & x"c2f" => DATA <= x"f00a";
when "10" & x"c30" => DATA <= x"00a0";
when "10" & x"c31" => DATA <= x"1000";
when "10" & x"c32" => DATA <= x"0f80";
when "10" & x"c33" => DATA <= x"6800";
when "10" & x"c34" => DATA <= x"2140";
when "10" & x"c35" => DATA <= x"010f";
when "10" & x"c36" => DATA <= x"0000";
when "10" & x"c37" => DATA <= x"0068";
when "10" & x"c38" => DATA <= x"0050";
when "10" & x"c39" => DATA <= x"0ae0";
when "10" & x"c3a" => DATA <= x"0547";
when "10" & x"c3b" => DATA <= x"0004";
when "10" & x"c3c" => DATA <= x"000c";
when "10" & x"c3d" => DATA <= x"0000";
when "10" & x"c3e" => DATA <= x"4100";
when "10" & x"c3f" => DATA <= x"9f5f";
when "10" & x"c40" => DATA <= x"a7d7";
when "10" & x"c41" => DATA <= x"e9fa";
when "10" & x"c42" => DATA <= x"bf4f";
when "10" & x"c43" => DATA <= x"ab74";
when "10" & x"c44" => DATA <= x"b43a";
when "10" & x"c45" => DATA <= x"9d7f";
when "10" & x"c46" => DATA <= x"9f0f";
when "10" & x"c47" => DATA <= x"d2f8";
when "10" & x"c48" => DATA <= x"fca0";
when "10" & x"c49" => DATA <= x"07c2";
when "10" & x"c4a" => DATA <= x"2801";
when "10" & x"c4b" => DATA <= x"4201";
when "10" & x"c4c" => DATA <= x"37ab";
when "10" & x"c4d" => DATA <= x"3008";
when "10" & x"c4e" => DATA <= x"3400";
when "10" & x"c4f" => DATA <= x"1fce";
when "10" & x"c50" => DATA <= x"47fa";
when "10" & x"c51" => DATA <= x"ff7e";
when "10" & x"c52" => DATA <= x"6ff7";
when "10" & x"c53" => DATA <= x"ffff";
when "10" & x"c54" => DATA <= x"fd7f";
when "10" & x"c55" => DATA <= x"d388";
when "10" & x"c56" => DATA <= x"c75c";
when "10" & x"c57" => DATA <= x"43d4";
when "10" & x"c58" => DATA <= x"381e";
when "10" & x"c59" => DATA <= x"a1ca";
when "10" & x"c5a" => DATA <= x"1eff";
when "10" & x"c5b" => DATA <= x"f7fc";
when "10" & x"c5c" => DATA <= x"9fcf";
when "10" & x"c5d" => DATA <= x"ff00";
when "10" & x"c5e" => DATA <= x"bf00";
when "10" & x"c5f" => DATA <= x"6010";
when "10" & x"c60" => DATA <= x"0083";
when "10" & x"c61" => DATA <= x"801f";
when "10" & x"c62" => DATA <= x"e800";
when "10" & x"c63" => DATA <= x"2098";
when "10" & x"c64" => DATA <= x"18c0";
when "10" & x"c65" => DATA <= x"7020";
when "10" & x"c66" => DATA <= x"13b3";
when "10" & x"c67" => DATA <= x"815b";
when "10" & x"c68" => DATA <= x"edb0";
when "10" & x"c69" => DATA <= x"fa7f";
when "10" & x"c6a" => DATA <= x"87da";
when "10" & x"c6b" => DATA <= x"89c6";
when "10" & x"c6c" => DATA <= x"a362";
when "10" & x"c6d" => DATA <= x"b41e";
when "10" & x"c6e" => DATA <= x"8d4f";
when "10" & x"c6f" => DATA <= x"f77a";
when "10" & x"c70" => DATA <= x"f807";
when "10" & x"c71" => DATA <= x"8070";
when "10" & x"c72" => DATA <= x"0502";
when "10" & x"c73" => DATA <= x"0000";
when "10" & x"c74" => DATA <= x"9400";
when "10" & x"c75" => DATA <= x"04f0";
when "10" & x"c76" => DATA <= x"0f00";
when "10" & x"c77" => DATA <= x"f009";
when "10" & x"c78" => DATA <= x"0010";
when "10" & x"c79" => DATA <= x"5005";
when "10" & x"c7a" => DATA <= x"1000";
when "10" & x"c7b" => DATA <= x"041e";
when "10" & x"c7c" => DATA <= x"01e0";
when "10" & x"c7d" => DATA <= x"1e01";
when "10" & x"c7e" => DATA <= x"e01e";
when "10" & x"c7f" => DATA <= x"01e0";
when "10" & x"c80" => DATA <= x"1e01";
when "10" & x"c81" => DATA <= x"e01e";
when "10" & x"c82" => DATA <= x"01e0";
when "10" & x"c83" => DATA <= x"1e01";
when "10" & x"c84" => DATA <= x"2001";
when "10" & x"c85" => DATA <= x"0f00";
when "10" & x"c86" => DATA <= x"f00a";
when "10" & x"c87" => DATA <= x"3900";
when "10" & x"c88" => DATA <= x"8e68";
when "10" & x"c89" => DATA <= x"6472";
when "10" & x"c8a" => DATA <= x"0900";
when "10" & x"c8b" => DATA <= x"1000";
when "10" & x"c8c" => DATA <= x"0029";
when "10" & x"c8d" => DATA <= x"0026";
when "10" & x"c8e" => DATA <= x"9308";
when "10" & x"c8f" => DATA <= x"84c2";
when "10" & x"c90" => DATA <= x"6f26";
when "10" & x"c91" => DATA <= x"7805";
when "10" & x"c92" => DATA <= x"0001";
when "10" & x"c93" => DATA <= x"3c03";
when "10" & x"c94" => DATA <= x"c03c";
when "10" & x"c95" => DATA <= x"03c0";
when "10" & x"c96" => DATA <= x"3c03";
when "10" & x"c97" => DATA <= x"c03c";
when "10" & x"c98" => DATA <= x"0000";
when "10" & x"c99" => DATA <= x"40f0";
when "10" & x"c9a" => DATA <= x"0f00";
when "10" & x"c9b" => DATA <= x"f00f";
when "10" & x"c9c" => DATA <= x"00f0";
when "10" & x"c9d" => DATA <= x"0000";
when "10" & x"c9e" => DATA <= x"0b40";
when "10" & x"c9f" => DATA <= x"005e";
when "10" & x"ca0" => DATA <= x"01e0";
when "10" & x"ca1" => DATA <= x"1e01";
when "10" & x"ca2" => DATA <= x"2001";
when "10" & x"ca3" => DATA <= x"0e00";
when "10" & x"ca4" => DATA <= x"0878";
when "10" & x"ca5" => DATA <= x"0780";
when "10" & x"ca6" => DATA <= x"7806";
when "10" & x"ca7" => DATA <= x"807c";
when "10" & x"ca8" => DATA <= x"0200";
when "10" & x"ca9" => DATA <= x"fa1c";
when "10" & x"caa" => DATA <= x"2e0f";
when "10" & x"cab" => DATA <= x"5faf";
when "10" & x"cac" => DATA <= x"c7eb";
when "10" & x"cad" => DATA <= x"7420";
when "10" & x"cae" => DATA <= x"60a0";
when "10" & x"caf" => DATA <= x"0a01";
when "10" & x"cb0" => DATA <= x"0401";
when "10" & x"cb1" => DATA <= x"0343";
when "10" & x"cb2" => DATA <= x"a181";
when "10" & x"cb3" => DATA <= x"61f0";
when "10" & x"cb4" => DATA <= x"002a";
when "10" & x"cb5" => DATA <= x"4803";
when "10" & x"cb6" => DATA <= x"3d7e";
when "10" & x"cb7" => DATA <= x"005e";
when "10" & x"cb8" => DATA <= x"c803";
when "10" & x"cb9" => DATA <= x"fc62";
when "10" & x"cba" => DATA <= x"307d";
when "10" & x"cbb" => DATA <= x"c801";
when "10" & x"cbc" => DATA <= x"e400";
when "10" & x"cbd" => DATA <= x"701e";
when "10" & x"cbe" => DATA <= x"8100";
when "10" & x"cbf" => DATA <= x"e470";
when "10" & x"cc0" => DATA <= x"387c";
when "10" & x"cc1" => DATA <= x"1f43";
when "10" & x"cc2" => DATA <= x"e3ff";
when "10" & x"cc3" => DATA <= x"0028";
when "10" & x"cc4" => DATA <= x"7804";
when "10" & x"cc5" => DATA <= x"802a";
when "10" & x"cc6" => DATA <= x"3800";
when "10" & x"cc7" => DATA <= x"41c0";
when "10" & x"cc8" => DATA <= x"042e";
when "10" & x"cc9" => DATA <= x"0020";
when "10" & x"cca" => DATA <= x"7001";
when "10" & x"ccb" => DATA <= x"5000";
when "10" & x"ccc" => DATA <= x"01a0";
when "10" & x"ccd" => DATA <= x"0060";
when "10" & x"cce" => DATA <= x"1283";
when "10" & x"ccf" => DATA <= x"0080";
when "10" & x"cd0" => DATA <= x"c020";
when "10" & x"cd1" => DATA <= x"33c0";
when "10" & x"cd2" => DATA <= x"0012";
when "10" & x"cd3" => DATA <= x"0200";
when "10" & x"cd4" => DATA <= x"e01a";
when "10" & x"cd5" => DATA <= x"0000";
when "10" & x"cd6" => DATA <= x"8000";
when "10" & x"cd7" => DATA <= x"3a00";
when "10" & x"cd8" => DATA <= x"a1d0";
when "10" & x"cd9" => DATA <= x"0045";
when "10" & x"cda" => DATA <= x"0170";
when "10" & x"cdb" => DATA <= x"0008";
when "10" & x"cdc" => DATA <= x"0080";
when "10" & x"cdd" => DATA <= x"0004";
when "10" & x"cde" => DATA <= x"2801";
when "10" & x"cdf" => DATA <= x"0140";
when "10" & x"ce0" => DATA <= x"01fe";
when "10" & x"ce1" => DATA <= x"3f07";
when "10" & x"ce2" => DATA <= x"b9eb";
when "10" & x"ce3" => DATA <= x"3d3a";
when "10" & x"ce4" => DATA <= x"9b4f";
when "10" & x"ce5" => DATA <= x"83d1";
when "10" & x"ce6" => DATA <= x"ead7";
when "10" & x"ce7" => DATA <= x"0a04";
when "10" & x"ce8" => DATA <= x"01df";
when "10" & x"ce9" => DATA <= x"94fe";
when "10" & x"cea" => DATA <= x"5f3f";
when "10" & x"ceb" => DATA <= x"a028";
when "10" & x"cec" => DATA <= x"0ce7";
when "10" & x"ced" => DATA <= x"2009";
when "10" & x"cee" => DATA <= x"6693";
when "10" & x"cef" => DATA <= x"696c";
when "10" & x"cf0" => DATA <= x"0400";
when "10" & x"cf1" => DATA <= x"57e3";
when "10" & x"cf2" => DATA <= x"fdf0";
when "10" & x"cf3" => DATA <= x"fa7d";
when "10" & x"cf4" => DATA <= x"a000";
when "10" & x"cf5" => DATA <= x"0850";
when "10" & x"cf6" => DATA <= x"1dff";
when "10" & x"cf7" => DATA <= x"83c0";
when "10" & x"cf8" => DATA <= x"1bfe";
when "10" & x"cf9" => DATA <= x"0768";
when "10" & x"cfa" => DATA <= x"0029";
when "10" & x"cfb" => DATA <= x"c4a3";
when "10" & x"cfc" => DATA <= x"4020";
when "10" & x"cfd" => DATA <= x"0008";
when "10" & x"cfe" => DATA <= x"0287";
when "10" & x"cff" => DATA <= x"b872";
when "10" & x"d00" => DATA <= x"8783";
when "10" & x"d01" => DATA <= x"9fff";
when "10" & x"d02" => DATA <= x"bff4";
when "10" & x"d03" => DATA <= x"7f57";
when "10" & x"d04" => DATA <= x"e210";
when "10" & x"d05" => DATA <= x"3d00";
when "10" & x"d06" => DATA <= x"f003";
when "10" & x"d07" => DATA <= x"fe82";
when "10" & x"d08" => DATA <= x"150e";
when "10" & x"d09" => DATA <= x"8e00";
when "10" & x"d0a" => DATA <= x"7fd6";
when "10" & x"d0b" => DATA <= x"033d";
when "10" & x"d0c" => DATA <= x"8ce4";
when "10" & x"d0d" => DATA <= x"6138";
when "10" & x"d0e" => DATA <= x"1812";
when "10" & x"d0f" => DATA <= x"3e9f";
when "10" & x"d10" => DATA <= x"a1f0";
when "10" & x"d11" => DATA <= x"f341";
when "10" & x"d12" => DATA <= x"295a";
when "10" & x"d13" => DATA <= x"0d56";
when "10" & x"d14" => DATA <= x"2d6a";
when "10" & x"d15" => DATA <= x"3dfb";
when "10" & x"d16" => DATA <= x"d5ee";
when "10" & x"d17" => DATA <= x"f5af";
when "10" & x"d18" => DATA <= x"7f00";
when "10" & x"d19" => DATA <= x"f00a";
when "10" & x"d1a" => DATA <= x"0002";
when "10" & x"d1b" => DATA <= x"5000";
when "10" & x"d1c" => DATA <= x"1380";
when "10" & x"d1d" => DATA <= x"009e";
when "10" & x"d1e" => DATA <= x"01e0";
when "10" & x"d1f" => DATA <= x"1e01";
when "10" & x"d20" => DATA <= x"c002";
when "10" & x"d21" => DATA <= x"0a00";
when "10" & x"d22" => DATA <= x"1000";
when "10" & x"d23" => DATA <= x"0400";
when "10" & x"d24" => DATA <= x"0107";
when "10" & x"d25" => DATA <= x"8078";
when "10" & x"d26" => DATA <= x"0780";
when "10" & x"d27" => DATA <= x"7807";
when "10" & x"d28" => DATA <= x"8078";
when "10" & x"d29" => DATA <= x"0580";
when "10" & x"d2a" => DATA <= x"00bc";
when "10" & x"d2b" => DATA <= x"03c0";
when "10" & x"d2c" => DATA <= x"2400";
when "10" & x"d2d" => DATA <= x"11e0";
when "10" & x"d2e" => DATA <= x"1e00";
when "10" & x"d2f" => DATA <= x"0008";
when "10" & x"d30" => DATA <= x"7800";
when "10" & x"d31" => DATA <= x"0010";
when "10" & x"d32" => DATA <= x"0004";
when "10" & x"d33" => DATA <= x"0028";
when "10" & x"d34" => DATA <= x"e412";
when "10" & x"d35" => DATA <= x"1904";
when "10" & x"d36" => DATA <= x"f0cf";
when "10" & x"d37" => DATA <= x"8000";
when "10" & x"d38" => DATA <= x"2930";
when "10" & x"d39" => DATA <= x"9a4c";
when "10" & x"d3a" => DATA <= x"2252";
when "10" & x"d3b" => DATA <= x"6137";
when "10" & x"d3c" => DATA <= x"c03c";
when "10" & x"d3d" => DATA <= x"03c0";
when "10" & x"d3e" => DATA <= x"3800";
when "10" & x"d3f" => DATA <= x"1140";
when "10" & x"d40" => DATA <= x"008e";
when "10" & x"d41" => DATA <= x"0004";
when "10" & x"d42" => DATA <= x"7804";
when "10" & x"d43" => DATA <= x"8008";
when "10" & x"d44" => DATA <= x"3c03";
when "10" & x"d45" => DATA <= x"4008";
when "10" & x"d46" => DATA <= x"1400";
when "10" & x"d47" => DATA <= x"40f0";
when "10" & x"d48" => DATA <= x"0f00";
when "10" & x"d49" => DATA <= x"f00f";
when "10" & x"d4a" => DATA <= x"00f0";
when "10" & x"d4b" => DATA <= x"0000";
when "10" & x"d4c" => DATA <= x"0a80";
when "10" & x"d4d" => DATA <= x"0040";
when "10" & x"d4e" => DATA <= x"0017";
when "10" & x"d4f" => DATA <= x"8078";
when "10" & x"d50" => DATA <= x"0780";
when "10" & x"d51" => DATA <= x"6800";
when "10" & x"d52" => DATA <= x"4280";
when "10" & x"d53" => DATA <= x"021e";
when "10" & x"d54" => DATA <= x"01e0";
when "10" & x"d55" => DATA <= x"1e01";
when "10" & x"d56" => DATA <= x"e01f";
when "10" & x"d57" => DATA <= x"0080";
when "10" & x"d58" => DATA <= x"7e9f";
when "10" & x"d59" => DATA <= x"5a8d";
when "10" & x"d5a" => DATA <= x"d2a1";
when "10" & x"d5b" => DATA <= x"70f8";
when "10" & x"d5c" => DATA <= x"dc20";
when "10" & x"d5d" => DATA <= x"5002";
when "10" & x"d5e" => DATA <= x"cbc0";
when "10" & x"d5f" => DATA <= x"2c00";
when "10" & x"d60" => DATA <= x"a1c0";
when "10" & x"d61" => DATA <= x"14a0";
when "10" & x"d62" => DATA <= x"007f";
when "10" & x"d63" => DATA <= x"8178";
when "10" & x"d64" => DATA <= x"0003";
when "10" & x"d65" => DATA <= x"4007";
when "10" & x"d66" => DATA <= x"f057";
when "10" & x"d67" => DATA <= x"0002";
when "10" & x"d68" => DATA <= x"2802";
when "10" & x"d69" => DATA <= x"8311";
when "10" & x"d6a" => DATA <= x"9419";
when "10" & x"d6b" => DATA <= x"c580";
when "10" & x"d6c" => DATA <= x"0380";
when "10" & x"d6d" => DATA <= x"1ce0";
when "10" & x"d6e" => DATA <= x"0020";
when "10" & x"d6f" => DATA <= x"153c";
when "10" & x"d70" => DATA <= x"0380";
when "10" & x"d71" => DATA <= x"040a";
when "10" & x"d72" => DATA <= x"a100";
when "10" & x"d73" => DATA <= x"0010";
when "10" & x"d74" => DATA <= x"0010";
when "10" & x"d75" => DATA <= x"0008";
when "10" & x"d76" => DATA <= x"1c00";
when "10" & x"d77" => DATA <= x"02e0";
when "10" & x"d78" => DATA <= x"0200";
when "10" & x"d79" => DATA <= x"5403";
when "10" & x"d7a" => DATA <= x"c000";
when "10" & x"d7b" => DATA <= x"4a0c";
when "10" & x"d7c" => DATA <= x"0703";
when "10" & x"d7d" => DATA <= x"0080";
when "10" & x"d7e" => DATA <= x"ca04";
when "10" & x"d7f" => DATA <= x"0020";
when "10" & x"d80" => DATA <= x"2c00";
when "10" & x"d81" => DATA <= x"0203";
when "10" & x"d82" => DATA <= x"a010";
when "10" & x"d83" => DATA <= x"0700";
when "10" & x"d84" => DATA <= x"d085";
when "10" & x"d85" => DATA <= x"0010";
when "10" & x"d86" => DATA <= x"6400";
when "10" & x"d87" => DATA <= x"03e0";
when "10" & x"d88" => DATA <= x"028f";
when "10" & x"d89" => DATA <= x"0060";
when "10" & x"d8a" => DATA <= x"5803";
when "10" & x"d8b" => DATA <= x"bd8e";
when "10" & x"d8c" => DATA <= x"cf77";
when "10" & x"d8d" => DATA <= x"f67a";
when "10" & x"d8e" => DATA <= x"9d46";
when "10" & x"d8f" => DATA <= x"ab54";
when "10" & x"d90" => DATA <= x"a26a";
when "10" & x"d91" => DATA <= x"8556";
when "10" & x"d92" => DATA <= x"893f";
when "10" & x"d93" => DATA <= x"9df9";
when "10" & x"d94" => DATA <= x"fcbe";
when "10" & x"d95" => DATA <= x"7f27";
when "10" & x"d96" => DATA <= x"d608";
when "10" & x"d97" => DATA <= x"e018";
when "10" & x"d98" => DATA <= x"f800";
when "10" & x"d99" => DATA <= x"0400";
when "10" & x"d9a" => DATA <= x"03f0";
when "10" & x"d9b" => DATA <= x"0a01";
when "10" & x"d9c" => DATA <= x"f857";
when "10" & x"d9d" => DATA <= x"9004";
when "10" & x"d9e" => DATA <= x"277f";
when "10" & x"d9f" => DATA <= x"b800";
when "10" & x"da0" => DATA <= x"0c00";
when "10" & x"da1" => DATA <= x"07ff";
when "10" & x"da2" => DATA <= x"bfbf";
when "10" & x"da3" => DATA <= x"fc03";
when "10" & x"da4" => DATA <= x"6e21";
when "10" & x"da5" => DATA <= x"10f0";
when "10" & x"da6" => DATA <= x"72cd";
when "10" & x"da7" => DATA <= x"3ffd";
when "10" & x"da8" => DATA <= x"ff57";
when "10" & x"da9" => DATA <= x"fc7e";
when "10" & x"daa" => DATA <= x"0fa3";
when "10" & x"dab" => DATA <= x"faff";
when "10" & x"dac" => DATA <= x"afc9";
when "10" & x"dad" => DATA <= x"003f";
when "10" & x"dae" => DATA <= x"f7fc";
when "10" & x"daf" => DATA <= x"8030";
when "10" & x"db0" => DATA <= x"2b9d";
when "10" & x"db1" => DATA <= x"9ee6";
when "10" & x"db2" => DATA <= x"0057";
when "10" & x"db3" => DATA <= x"005d";
when "10" & x"db4" => DATA <= x"3e1b";
when "10" & x"db5" => DATA <= x"0fa7";
when "10" & x"db6" => DATA <= x"c3f5";
when "10" & x"db7" => DATA <= x"3ed4";
when "10" & x"db8" => DATA <= x"6ab5";
when "10" & x"db9" => DATA <= x"198c";
when "10" & x"dba" => DATA <= x"a64a";
when "10" & x"dbb" => DATA <= x"2593";
when "10" & x"dbc" => DATA <= x"feaf";
when "10" & x"dbd" => DATA <= x"5f00";
when "10" & x"dbe" => DATA <= x"f00a";
when "10" & x"dbf" => DATA <= x"0002";
when "10" & x"dc0" => DATA <= x"5000";
when "10" & x"dc1" => DATA <= x"1280";
when "10" & x"dc2" => DATA <= x"009e";
when "10" & x"dc3" => DATA <= x"01e0";
when "10" & x"dc4" => DATA <= x"1e01";
when "10" & x"dc5" => DATA <= x"2002";
when "10" & x"dc6" => DATA <= x"0a00";
when "10" & x"dc7" => DATA <= x"1050";
when "10" & x"dc8" => DATA <= x"0083";
when "10" & x"dc9" => DATA <= x"c03c";
when "10" & x"dca" => DATA <= x"03c0";
when "10" & x"dcb" => DATA <= x"3c03";
when "10" & x"dcc" => DATA <= x"c000";
when "10" & x"dcd" => DATA <= x"001f";
when "10" & x"dce" => DATA <= x"00f0";
when "10" & x"dcf" => DATA <= x"0900";
when "10" & x"dd0" => DATA <= x"0178";
when "10" & x"dd1" => DATA <= x"0780";
when "10" & x"dd2" => DATA <= x"0001";
when "10" & x"dd3" => DATA <= x"1e01";
when "10" & x"dd4" => DATA <= x"a001";
when "10" & x"dd5" => DATA <= x"0a00";
when "10" & x"dd6" => DATA <= x"0878";
when "10" & x"dd7" => DATA <= x"0000";
when "10" & x"dd8" => DATA <= x"1143";
when "10" & x"dd9" => DATA <= x"209e";
when "10" & x"dda" => DATA <= x"194c";
when "10" & x"ddb" => DATA <= x"867c";
when "10" & x"ddc" => DATA <= x"0001";
when "10" & x"ddd" => DATA <= x"4984";
when "10" & x"dde" => DATA <= x"4261";
when "10" & x"ddf" => DATA <= x"108a";
when "10" & x"de0" => DATA <= x"4c22";
when "10" & x"de1" => DATA <= x"7807";
when "10" & x"de2" => DATA <= x"8001";
when "10" & x"de3" => DATA <= x"3c02";
when "10" & x"de4" => DATA <= x"8001";
when "10" & x"de5" => DATA <= x"1a00";
when "10" & x"de6" => DATA <= x"08f0";
when "10" & x"de7" => DATA <= x"0d00";
when "10" & x"de8" => DATA <= x"1078";
when "10" & x"de9" => DATA <= x"0780";
when "10" & x"dea" => DATA <= x"0008";
when "10" & x"deb" => DATA <= x"1e01";
when "10" & x"dec" => DATA <= x"e01e";
when "10" & x"ded" => DATA <= x"01e0";
when "10" & x"dee" => DATA <= x"1e00";
when "10" & x"def" => DATA <= x"0001";
when "10" & x"df0" => DATA <= x"5000";
when "10" & x"df1" => DATA <= x"0a80";
when "10" & x"df2" => DATA <= x"005e";
when "10" & x"df3" => DATA <= x"01e0";
when "10" & x"df4" => DATA <= x"1e01";
when "10" & x"df5" => DATA <= x"2001";
when "10" & x"df6" => DATA <= x"0a00";
when "10" & x"df7" => DATA <= x"0850";
when "10" & x"df8" => DATA <= x"0043";
when "10" & x"df9" => DATA <= x"c03c";
when "10" & x"dfa" => DATA <= x"03c0";
when "10" & x"dfb" => DATA <= x"2403";
when "10" & x"dfc" => DATA <= x"e010";
when "10" & x"dfd" => DATA <= x"0dc7";
when "10" & x"dfe" => DATA <= x"e371";
when "10" & x"dff" => DATA <= x"f81c";
when "10" & x"e00" => DATA <= x"7a3f";
when "10" & x"e01" => DATA <= x"1b80";
when "10" & x"e02" => DATA <= x"0010";
when "10" & x"e03" => DATA <= x"0004";
when "10" & x"e04" => DATA <= x"6000";
when "10" & x"e05" => DATA <= x"5207";
when "10" & x"e06" => DATA <= x"8050";
when "10" & x"e07" => DATA <= x"0050";
when "10" & x"e08" => DATA <= x"8800";
when "10" & x"e09" => DATA <= x"2800";
when "10" & x"e0a" => DATA <= x"0a94";
when "10" & x"e0b" => DATA <= x"0140";
when "10" & x"e0c" => DATA <= x"200e";
when "10" & x"e0d" => DATA <= x"01a0";
when "10" & x"e0e" => DATA <= x"0100";
when "10" & x"e0f" => DATA <= x"a000";
when "10" & x"e10" => DATA <= x"0800";
when "10" & x"e11" => DATA <= x"0880";
when "10" & x"e12" => DATA <= x"02c0";
when "10" & x"e13" => DATA <= x"40b1";
when "10" & x"e14" => DATA <= x"580c";
when "10" & x"e15" => DATA <= x"1603";
when "10" & x"e16" => DATA <= x"0581";
when "10" & x"e17" => DATA <= x"0a30";
when "10" & x"e18" => DATA <= x"210c";
when "10" & x"e19" => DATA <= x"2800";
when "10" & x"e1a" => DATA <= x"0da0";
when "10" & x"e1b" => DATA <= x"080e";
when "10" & x"e1c" => DATA <= x"0051";
when "10" & x"e1d" => DATA <= x"0204";
when "10" & x"e1e" => DATA <= x"0000";
when "10" & x"e1f" => DATA <= x"4000";
when "10" & x"e20" => DATA <= x"41a0";
when "10" & x"e21" => DATA <= x"040e";
when "10" & x"e22" => DATA <= x"0028";
when "10" & x"e23" => DATA <= x"0000";
when "10" & x"e24" => DATA <= x"801e";
when "10" & x"e25" => DATA <= x"00e0";
when "10" & x"e26" => DATA <= x"c070";
when "10" & x"e27" => DATA <= x"1283";
when "10" & x"e28" => DATA <= x"00de";
when "10" & x"e29" => DATA <= x"0000";
when "10" & x"e2a" => DATA <= x"0480";
when "10" & x"e2b" => DATA <= x"4060";
when "10" & x"e2c" => DATA <= x"1007";
when "10" & x"e2d" => DATA <= x"0095";
when "10" & x"e2e" => DATA <= x"4005";
when "10" & x"e2f" => DATA <= x"0020";
when "10" & x"e30" => DATA <= x"0780";
when "10" & x"e31" => DATA <= x"1400";
when "10" & x"e32" => DATA <= x"0408";
when "10" & x"e33" => DATA <= x"0003";
when "10" & x"e34" => DATA <= x"4000";
when "10" & x"e35" => DATA <= x"1050";
when "10" & x"e36" => DATA <= x"0054";
when "10" & x"e37" => DATA <= x"0041";
when "10" & x"e38" => DATA <= x"5002";
when "10" & x"e39" => DATA <= x"8000";
when "10" & x"e3a" => DATA <= x"8060";
when "10" & x"e3b" => DATA <= x"7002";
when "10" & x"e3c" => DATA <= x"0001";
when "10" & x"e3d" => DATA <= x"5cee";
when "10" & x"e3e" => DATA <= x"36bb";
when "10" & x"e3f" => DATA <= x"8d8e";
when "10" & x"e40" => DATA <= x"e363";
when "10" & x"e41" => DATA <= x"a2d0";
when "10" & x"e42" => DATA <= x"0aa5";
when "10" & x"e43" => DATA <= x"132b";
when "10" & x"e44" => DATA <= x"aa9f";
when "10" & x"e45" => DATA <= x"e7f3";
when "10" & x"e46" => DATA <= x"dbfe";
when "10" & x"e47" => DATA <= x"9fce";
when "10" & x"e48" => DATA <= x"e7e7";
when "10" & x"e49" => DATA <= x"0001";
when "10" & x"e4a" => DATA <= x"1002";
when "10" & x"e4b" => DATA <= x"7e3e";
when "10" & x"e4c" => DATA <= x"0000";
when "10" & x"e4d" => DATA <= x"102f";
when "10" & x"e4e" => DATA <= x"003f";
when "10" & x"e4f" => DATA <= x"c060";
when "10" & x"e50" => DATA <= x"0705";
when "10" & x"e51" => DATA <= x"4038";
when "10" & x"e52" => DATA <= x"0c00";
when "10" & x"e53" => DATA <= x"3002";
when "10" & x"e54" => DATA <= x"391f";
when "10" & x"e55" => DATA <= x"dfe0";
when "10" & x"e56" => DATA <= x"1a00";
when "10" & x"e57" => DATA <= x"9ff0";
when "10" & x"e58" => DATA <= x"5b80";
when "10" & x"e59" => DATA <= x"01df";
when "10" & x"e5a" => DATA <= x"f402";
when "10" & x"e5b" => DATA <= x"0000";
when "10" & x"e5c" => DATA <= x"8038";
when "10" & x"e5d" => DATA <= x"068d";
when "10" & x"e5e" => DATA <= x"0614";
when "10" & x"e5f" => DATA <= x"01c6";
when "10" & x"e60" => DATA <= x"9dfe";
when "10" & x"e61" => DATA <= x"0060";
when "10" & x"e62" => DATA <= x"77ff";
when "10" & x"e63" => DATA <= x"1f80";
when "10" & x"e64" => DATA <= x"07fd";
when "10" & x"e65" => DATA <= x"7f40";
when "10" & x"e66" => DATA <= x"0fca";
when "10" & x"e67" => DATA <= x"001f";
when "10" & x"e68" => DATA <= x"bff8";
when "10" & x"e69" => DATA <= x"02bf";
when "10" & x"e6a" => DATA <= x"dc00";
when "10" & x"e6b" => DATA <= x"07f8";
when "10" & x"e6c" => DATA <= x"0080";
when "10" & x"e6d" => DATA <= x"e667";
when "10" & x"e6e" => DATA <= x"b1dc";
when "10" & x"e6f" => DATA <= x"ec0a";
when "10" & x"e70" => DATA <= x"e00f";
when "10" & x"e71" => DATA <= x"a7c3";
when "10" & x"e72" => DATA <= x"c1b4";
when "10" & x"e73" => DATA <= x"f87c";
when "10" & x"e74" => DATA <= x"3c1f";
when "10" & x"e75" => DATA <= x"64b2";
when "10" & x"e76" => DATA <= x"990c";
when "10" & x"e77" => DATA <= x"062d";
when "10" & x"e78" => DATA <= x"6230";
when "10" & x"e79" => DATA <= x"27d5";
when "10" & x"e7a" => DATA <= x"eef5";
when "10" & x"e7b" => DATA <= x"af7b";
when "10" & x"e7c" => DATA <= x"0022";
when "10" & x"e7d" => DATA <= x"3cac";
when "10" & x"e7e" => DATA <= x"0088";
when "10" & x"e7f" => DATA <= x"f090";
when "10" & x"e80" => DATA <= x"0e04";
when "10" & x"e81" => DATA <= x"7078";
when "10" & x"e82" => DATA <= x"0207";
when "10" & x"e83" => DATA <= x"4028";
when "10" & x"e84" => DATA <= x"2103";
when "10" & x"e85" => DATA <= x"e008";
when "10" & x"e86" => DATA <= x"6000";
when "10" & x"e87" => DATA <= x"8280";
when "10" & x"e88" => DATA <= x"3880";
when "10" & x"e89" => DATA <= x"0760";
when "10" & x"e8a" => DATA <= x"0400";
when "10" & x"e8b" => DATA <= x"7e80";
when "10" & x"e8c" => DATA <= x"5200";
when "10" & x"e8d" => DATA <= x"3ec0";
when "10" & x"e8e" => DATA <= x"0021";
when "10" & x"e8f" => DATA <= x"cf00";
when "10" & x"e90" => DATA <= x"0868";
when "10" & x"e91" => DATA <= x"0500";
when "10" & x"e92" => DATA <= x"9e2c";
when "10" & x"e93" => DATA <= x"0044";
when "10" & x"e94" => DATA <= x"78d0";
when "10" & x"e95" => DATA <= x"0a02";
when "10" & x"e96" => DATA <= x"7878";
when "10" & x"e97" => DATA <= x"0383";
when "10" & x"e98" => DATA <= x"4028";
when "10" & x"e99" => DATA <= x"2181";
when "10" & x"e9a" => DATA <= x"6000";
when "10" & x"e9b" => DATA <= x"1018";
when "10" & x"e9c" => DATA <= x"0021";
when "10" & x"e9d" => DATA <= x"c001";
when "10" & x"e9e" => DATA <= x"0088";
when "10" & x"e9f" => DATA <= x"0f40";
when "10" & x"ea0" => DATA <= x"1108";
when "10" & x"ea1" => DATA <= x"e715";
when "10" & x"ea2" => DATA <= x"0c82";
when "10" & x"ea3" => DATA <= x"6865";
when "10" & x"ea4" => DATA <= x"f8c0";
when "10" & x"ea5" => DATA <= x"67e8";
when "10" & x"ea6" => DATA <= x"03fc";
when "10" & x"ea7" => DATA <= x"fe3f";
when "10" & x"ea8" => DATA <= x"2693";
when "10" & x"ea9" => DATA <= x"0884";
when "10" & x"eaa" => DATA <= x"c26d";
when "10" & x"eab" => DATA <= x"5f87";
when "10" & x"eac" => DATA <= x"f400";
when "10" & x"ead" => DATA <= x"0673";
when "10" & x"eae" => DATA <= x"00e8";
when "10" & x"eaf" => DATA <= x"0011";
when "10" & x"eb0" => DATA <= x"0804";
when "10" & x"eb1" => DATA <= x"b004";
when "10" & x"eb2" => DATA <= x"4207";
when "10" & x"eb3" => DATA <= x"4028";
when "10" & x"eb4" => DATA <= x"2133";
when "10" & x"eb5" => DATA <= x"e000";
when "10" & x"eb6" => DATA <= x"3d00";
when "10" & x"eb7" => DATA <= x"a201";
when "10" & x"eb8" => DATA <= x"9580";
when "10" & x"eb9" => DATA <= x"1001";
when "10" & x"eba" => DATA <= x"a002";
when "10" & x"ebb" => DATA <= x"0700";
when "10" & x"ebc" => DATA <= x"7207";
when "10" & x"ebd" => DATA <= x"8078";
when "10" & x"ebe" => DATA <= x"0001";
when "10" & x"ebf" => DATA <= x"21a0";
when "10" & x"ec0" => DATA <= x"0011";
when "10" & x"ec1" => DATA <= x"1966";
when "10" & x"ec2" => DATA <= x"c004";
when "10" & x"ec3" => DATA <= x"4600";
when "10" & x"ec4" => DATA <= x"000a";
when "10" & x"ec5" => DATA <= x"8038";
when "10" & x"ec6" => DATA <= x"0905";
when "10" & x"ec7" => DATA <= x"e008";
when "10" & x"ec8" => DATA <= x"0d00";
when "10" & x"ec9" => DATA <= x"0400";
when "10" & x"eca" => DATA <= x"0196";
when "10" & x"ecb" => DATA <= x"0011";
when "10" & x"ecc" => DATA <= x"a000";
when "10" & x"ecd" => DATA <= x"8500";
when "10" & x"ece" => DATA <= x"5085";
when "10" & x"ecf" => DATA <= x"08f8";
when "10" & x"ed0" => DATA <= x"021f";
when "10" & x"ed1" => DATA <= x"4004";
when "10" & x"ed2" => DATA <= x"0aa3";
when "10" & x"ed3" => DATA <= x"3580";
when "10" & x"ed4" => DATA <= x"2000";
when "10" & x"ed5" => DATA <= x"1b00";
when "10" & x"ed6" => DATA <= x"40a8";
when "10" & x"ed7" => DATA <= x"07e7";
when "10" & x"ed8" => DATA <= x"6e07";
when "10" & x"ed9" => DATA <= x"1bc9";
when "10" & x"eda" => DATA <= x"e1f2";
when "10" & x"edb" => DATA <= x"e000";
when "10" & x"edc" => DATA <= x"0400";
when "10" & x"edd" => DATA <= x"0d13";
when "10" & x"ede" => DATA <= x"022a";
when "10" & x"edf" => DATA <= x"00e8";
when "10" & x"ee0" => DATA <= x"0601";
when "10" & x"ee1" => DATA <= x"014b";
when "10" & x"ee2" => DATA <= x"401c";
when "10" & x"ee3" => DATA <= x"0200";
when "10" & x"ee4" => DATA <= x"1494";
when "10" & x"ee5" => DATA <= x"b800";
when "10" & x"ee6" => DATA <= x"0340";
when "10" & x"ee7" => DATA <= x"0016";
when "10" & x"ee8" => DATA <= x"9700";
when "10" & x"ee9" => DATA <= x"0838";
when "10" & x"eea" => DATA <= x"0004";
when "10" & x"eeb" => DATA <= x"8016";
when "10" & x"eec" => DATA <= x"0338";
when "10" & x"eed" => DATA <= x"b056";
when "10" & x"eee" => DATA <= x"0804";
when "10" & x"eef" => DATA <= x"8006";
when "10" & x"ef0" => DATA <= x"0001";
when "10" & x"ef1" => DATA <= x"8152";
when "10" & x"ef2" => DATA <= x"8004";
when "10" & x"ef3" => DATA <= x"1e00";
when "10" & x"ef4" => DATA <= x"0045";
when "10" & x"ef5" => DATA <= x"2200";
when "10" & x"ef6" => DATA <= x"0a00";
when "10" & x"ef7" => DATA <= x"0280";
when "10" & x"ef8" => DATA <= x"008a";
when "10" & x"ef9" => DATA <= x"f000";
when "10" & x"efa" => DATA <= x"1004";
when "10" & x"efb" => DATA <= x"2bc0";
when "10" & x"efc" => DATA <= x"0050";
when "10" & x"efd" => DATA <= x"0006";
when "10" & x"efe" => DATA <= x"8300";
when "10" & x"eff" => DATA <= x"80ca";
when "10" & x"f00" => DATA <= x"04a0";
when "10" & x"f01" => DATA <= x"cf00";
when "10" & x"f02" => DATA <= x"4048";
when "10" & x"f03" => DATA <= x"0802";
when "10" & x"f04" => DATA <= x"8040";
when "10" & x"f05" => DATA <= x"7200";
when "10" & x"f06" => DATA <= x"0400";
when "10" & x"f07" => DATA <= x"054a";
when "10" & x"f08" => DATA <= x"9400";
when "10" & x"f09" => DATA <= x"21e0";
when "10" & x"f0a" => DATA <= x"0400";
when "10" & x"f0b" => DATA <= x"0680";
when "10" & x"f0c" => DATA <= x"0440";
when "10" & x"f0d" => DATA <= x"0050";
when "10" & x"f0e" => DATA <= x"0282";
when "10" & x"f0f" => DATA <= x"b801";
when "10" & x"f10" => DATA <= x"0140";
when "10" & x"f11" => DATA <= x"0106";
when "10" & x"f12" => DATA <= x"031d";
when "10" & x"f13" => DATA <= x"86c7";
when "10" & x"f14" => DATA <= x"61b1";
when "10" & x"f15" => DATA <= x"daeb";
when "10" & x"f16" => DATA <= x"f39a";
when "10" & x"f17" => DATA <= x"0ba0";
when "10" & x"f18" => DATA <= x"2a29";
when "10" & x"f19" => DATA <= x"5080";
when "10" & x"f1a" => DATA <= x"f7f2";
when "10" & x"f1b" => DATA <= x"fb07";
when "10" & x"f1c" => DATA <= x"c01f";
when "10" & x"f1d" => DATA <= x"efce";
when "10" & x"f1e" => DATA <= x"0002";
when "10" & x"f1f" => DATA <= x"001f";
when "10" & x"f20" => DATA <= x"88f4";
when "10" & x"f21" => DATA <= x"1a00";
when "10" & x"f22" => DATA <= x"0150";
when "10" & x"f23" => DATA <= x"0004";
when "10" & x"f24" => DATA <= x"2fff";
when "10" & x"f25" => DATA <= x"fffd";
when "10" & x"f26" => DATA <= x"7ff8";
when "10" & x"f27" => DATA <= x"0807";
when "10" & x"f28" => DATA <= x"4d28";
when "10" & x"f29" => DATA <= x"d801";
when "10" & x"f2a" => DATA <= x"7fe7";
when "10" & x"f2b" => DATA <= x"f005";
when "10" & x"f2c" => DATA <= x"5fd1";
when "10" & x"f2d" => DATA <= x"fd5f";
when "10" & x"f2e" => DATA <= x"f803";
when "10" & x"f2f" => DATA <= x"ffc0";
when "10" & x"f30" => DATA <= x"0fe7";
when "10" & x"f31" => DATA <= x"8a00";
when "10" & x"f32" => DATA <= x"ae26";
when "10" & x"f33" => DATA <= x"1382";
when "10" & x"f34" => DATA <= x"b01c";
when "10" & x"f35" => DATA <= x"f43e";
when "10" & x"f36" => DATA <= x"9fa1";
when "10" & x"f37" => DATA <= x"f0f0";
when "10" & x"f38" => DATA <= x"5d3e";
when "10" & x"f39" => DATA <= x"01a8";
when "10" & x"f3a" => DATA <= x"100a";
when "10" & x"f3b" => DATA <= x"2068";
when "10" & x"f3c" => DATA <= x"d06a";
when "10" & x"f3d" => DATA <= x"bf1f";
when "10" & x"f3e" => DATA <= x"afc7";
when "10" & x"f3f" => DATA <= x"a4f8";
when "10" & x"f40" => DATA <= x"0000";
when "10" & x"f41" => DATA <= x"4001";
when "10" & x"f42" => DATA <= x"e3f1";
when "10" & x"f43" => DATA <= x"5600";
when "10" & x"f44" => DATA <= x"0470";
when "10" & x"f45" => DATA <= x"007d";
when "10" & x"f46" => DATA <= x"feaf";
when "10" & x"f47" => DATA <= x"a00a";
when "10" & x"f48" => DATA <= x"0400";
when "10" & x"f49" => DATA <= x"26df";
when "10" & x"f4a" => DATA <= x"ebfd";
when "10" & x"f4b" => DATA <= x"000e";
when "10" & x"f4c" => DATA <= x"3fde";
when "10" & x"f4d" => DATA <= x"7400";
when "10" & x"f4e" => DATA <= x"100c";
when "10" & x"f4f" => DATA <= x"0007";
when "10" & x"f50" => DATA <= x"cff6";
when "10" & x"f51" => DATA <= x"de80";
when "10" & x"f52" => DATA <= x"0e1f";
when "10" & x"f53" => DATA <= x"e6da";
when "10" & x"f54" => DATA <= x"0010";
when "10" & x"f55" => DATA <= x"0c00";
when "10" & x"f56" => DATA <= x"0dda";
when "10" & x"f57" => DATA <= x"ffd0";
when "10" & x"f58" => DATA <= x"0723";
when "10" & x"f59" => DATA <= x"fde3";
when "10" & x"f5a" => DATA <= x"4004";
when "10" & x"f5b" => DATA <= x"0600";
when "10" & x"f5c" => DATA <= x"01e8";
when "10" & x"f5d" => DATA <= x"ff78";
when "10" & x"f5e" => DATA <= x"e803";
when "10" & x"f5f" => DATA <= x"21fe";
when "10" & x"f60" => DATA <= x"ead0";
when "10" & x"f61" => DATA <= x"061b";
when "10" & x"f62" => DATA <= x"fd77";
when "10" & x"f63" => DATA <= x"4014";
when "10" & x"f64" => DATA <= x"0200";
when "10" & x"f65" => DATA <= x"433f";
when "10" & x"f66" => DATA <= x"d9fa";
when "10" & x"f67" => DATA <= x"0087";
when "10" & x"f68" => DATA <= x"7fb3";
when "10" & x"f69" => DATA <= x"e802";
when "10" & x"f6a" => DATA <= x"8180";
when "10" & x"f6b" => DATA <= x"04d7";
when "10" & x"f6c" => DATA <= x"f97e";
when "10" & x"f6d" => DATA <= x"80b8";
when "10" & x"f6e" => DATA <= x"009c";
when "10" & x"f6f" => DATA <= x"ff2f";
when "10" & x"f70" => DATA <= x"d000";
when "10" & x"f71" => DATA <= x"2018";
when "10" & x"f72" => DATA <= x"0013";
when "10" & x"f73" => DATA <= x"bfcf";
when "10" & x"f74" => DATA <= x"fa00";
when "10" & x"f75" => DATA <= x"1c7f";
when "10" & x"f76" => DATA <= x"bba8";
when "10" & x"f77" => DATA <= x"0284";
when "10" & x"f78" => DATA <= x"000e";
when "10" & x"f79" => DATA <= x"c7fb";
when "10" & x"f7a" => DATA <= x"df80";
when "10" & x"f7b" => DATA <= x"1814";
when "10" & x"f7c" => DATA <= x"0002";
when "10" & x"f7d" => DATA <= x"7fd0";
when "10" & x"f7e" => DATA <= x"0031";
when "10" & x"f7f" => DATA <= x"0208";
when "10" & x"f80" => DATA <= x"1000";
when "10" & x"f81" => DATA <= x"1ff4";
when "10" & x"f82" => DATA <= x"0010";
when "10" & x"f83" => DATA <= x"0388";
when "10" & x"f84" => DATA <= x"2801";
when "10" & x"f85" => DATA <= x"ffc0";
when "10" & x"f86" => DATA <= x"07e7";
when "10" & x"f87" => DATA <= x"0500";
when "10" & x"f88" => DATA <= x"3fe8";
when "10" & x"f89" => DATA <= x"0006";
when "10" & x"f8a" => DATA <= x"e000";
when "10" & x"f8b" => DATA <= x"5403";
when "10" & x"f8c" => DATA <= x"fe98";
when "10" & x"f8d" => DATA <= x"00c0";
when "10" & x"f8e" => DATA <= x"7000";
when "10" & x"f8f" => DATA <= x"6dfe";
when "10" & x"f90" => DATA <= x"f7d0";
when "10" & x"f91" => DATA <= x"02f3";
when "10" & x"f92" => DATA <= x"fd37";
when "10" & x"f93" => DATA <= x"4000";
when "10" & x"f94" => DATA <= x"80c0";
when "10" & x"f95" => DATA <= x"002c";
when "10" & x"f96" => DATA <= x"ff6d";
when "10" & x"f97" => DATA <= x"e800";
when "10" & x"f98" => DATA <= x"e1fe";
when "10" & x"f99" => DATA <= x"e5a0";
when "10" & x"f9a" => DATA <= x"0100";
when "10" & x"f9b" => DATA <= x"c000";
when "10" & x"f9c" => DATA <= x"dd7f";
when "10" & x"f9d" => DATA <= x"bf74";
when "10" & x"f9e" => DATA <= x"01e6";
when "10" & x"f9f" => DATA <= x"ff78";
when "10" & x"fa0" => DATA <= x"f001";
when "10" & x"fa1" => DATA <= x"0000";
when "10" & x"fa2" => DATA <= x"b07f";
when "10" & x"fa3" => DATA <= x"be34";
when "10" & x"fa4" => DATA <= x"0190";
when "10" & x"fa5" => DATA <= x"ff75";
when "10" & x"fa6" => DATA <= x"f002";
when "10" & x"fa7" => DATA <= x"0000";
when "10" & x"fa8" => DATA <= x"c97f";
when "10" & x"fa9" => DATA <= x"bae8";
when "10" & x"faa" => DATA <= x"0280";
when "10" & x"fab" => DATA <= x"400d";
when "10" & x"fac" => DATA <= x"27fb";
when "10" & x"fad" => DATA <= x"3f40";
when "10" & x"fae" => DATA <= x"10ef";
when "10" & x"faf" => DATA <= x"f6ed";
when "10" & x"fb0" => DATA <= x"0050";
when "10" & x"fb1" => DATA <= x"1000";
when "10" & x"fb2" => DATA <= x"1aff";
when "10" & x"fb3" => DATA <= x"3de8";
when "10" & x"fb4" => DATA <= x"003d";
when "10" & x"fb5" => DATA <= x"fe1f";
when "10" & x"fb6" => DATA <= x"e000";
when "10" & x"fb7" => DATA <= x"6000";
when "10" & x"fb8" => DATA <= x"1cff";
when "10" & x"fb9" => DATA <= x"5ee8";
when "10" & x"fba" => DATA <= x"02f1";
when "10" & x"fbb" => DATA <= x"feae";
when "10" & x"fbc" => DATA <= x"a00a";
when "10" & x"fbd" => DATA <= x"1000";
when "10" & x"fbe" => DATA <= x"1b1f";
when "10" & x"fbf" => DATA <= x"efe0";
when "10" & x"fc0" => DATA <= x"00c3";
when "10" & x"fc1" => DATA <= x"800e";
when "10" & x"fc2" => DATA <= x"4ff7";
when "10" & x"fc3" => DATA <= x"d800";
when "10" & x"fc4" => DATA <= x"2620";
when "10" & x"fc5" => DATA <= x"3000";
when "10" & x"fc6" => DATA <= x"1e4f";
when "10" & x"fc7" => DATA <= x"f7d6";
when "10" & x"fc8" => DATA <= x"8039";
when "10" & x"fc9" => DATA <= x"1fef";
when "10" & x"fca" => DATA <= x"1d00";
when "10" & x"fcb" => DATA <= x"203f";
when "10" & x"fcc" => DATA <= x"d2a9";
when "10" & x"fcd" => DATA <= x"8000";
when "10" & x"fce" => DATA <= x"fa9f";
when "10" & x"fcf" => DATA <= x"a9fc";
when "10" & x"fd0" => DATA <= x"fcaf";
when "10" & x"fd1" => DATA <= x"1f80";
when "10" & x"fd2" => DATA <= x"41a4";
when "10" & x"fd3" => DATA <= x"0070";
when "10" & x"fd4" => DATA <= x"0120";
when "10" & x"fd5" => DATA <= x"ff00";
when "10" & x"fd6" => DATA <= x"809e";
when "10" & x"fd7" => DATA <= x"e000";
when "10" & x"fd8" => DATA <= x"1500";
when "10" & x"fd9" => DATA <= x"3fe8";
when "10" & x"fda" => DATA <= x"0033";
when "10" & x"fdb" => DATA <= x"4000";
when "10" & x"fdc" => DATA <= x"4203";
when "10" & x"fdd" => DATA <= x"fc88";
when "10" & x"fde" => DATA <= x"807f";
when "10" & x"fdf" => DATA <= x"8198";
when "10" & x"fe0" => DATA <= x"6f80";
when "10" & x"fe1" => DATA <= x"03fc";
when "10" & x"fe2" => DATA <= x"0080";
when "10" & x"fe3" => DATA <= x"013b";
when "10" & x"fe4" => DATA <= x"41e0";
when "10" & x"fe5" => DATA <= x"300b";
when "10" & x"fe6" => DATA <= x"fc00";
when "10" & x"fe7" => DATA <= x"88a0";
when "10" & x"fe8" => DATA <= x"f182";
when "10" & x"fe9" => DATA <= x"d1e2";
when "10" & x"fea" => DATA <= x"0f00";
when "10" & x"feb" => DATA <= x"11c0";
when "10" & x"fec" => DATA <= x"8000";
when "10" & x"fed" => DATA <= x"8700";
when "10" & x"fee" => DATA <= x"0228";
when "10" & x"fef" => DATA <= x"06c0";
when "10" & x"ff0" => DATA <= x"1542";
when "10" & x"ff1" => DATA <= x"8d00";
when "10" & x"ff2" => DATA <= x"1000";
when "10" & x"ff3" => DATA <= x"0800";
when "10" & x"ff4" => DATA <= x"000d";
when "10" & x"ff5" => DATA <= x"0007";
when "10" & x"ff6" => DATA <= x"8094";
when "10" & x"ff7" => DATA <= x"2ba0";
when "10" & x"ff8" => DATA <= x"0040";
when "10" & x"ff9" => DATA <= x"7031";
when "10" & x"ffa" => DATA <= x"f9e0";
when "10" & x"ffb" => DATA <= x"0ffe";
when "10" & x"ffc" => DATA <= x"00a8";
when "10" & x"ffd" => DATA <= x"0a01";
when "10" & x"ffe" => DATA <= x"02c8";
when "10" & x"fff" => DATA <= x"000c";
when "11" & x"000" => DATA <= x"a010";
when "11" & x"001" => DATA <= x"4078";
when "11" & x"002" => DATA <= x"000b";
when "11" & x"003" => DATA <= x"8000";
when "11" & x"004" => DATA <= x"4000";
when "11" & x"005" => DATA <= x"5700";
when "11" & x"006" => DATA <= x"2815";
when "11" & x"007" => DATA <= x"5200";
when "11" & x"008" => DATA <= x"a0ae";
when "11" & x"009" => DATA <= x"a742";
when "11" & x"00a" => DATA <= x"0000";
when "11" & x"00b" => DATA <= x"f339";
when "11" & x"00c" => DATA <= x"d799";
when "11" & x"00d" => DATA <= x"cde6";
when "11" & x"00e" => DATA <= x"6321";
when "11" & x"00f" => DATA <= x"a094";
when "11" & x"010" => DATA <= x"5d54";
when "11" & x"011" => DATA <= x"8a44";
when "11" & x"012" => DATA <= x"202d";
when "11" & x"013" => DATA <= x"fc8e";
when "11" & x"014" => DATA <= x"7f00";
when "11" & x"015" => DATA <= x"3158";
when "11" & x"016" => DATA <= x"2380";
when "11" & x"017" => DATA <= x"c3e0";
when "11" & x"018" => DATA <= x"0010";
when "11" & x"019" => DATA <= x"7e3f";
when "11" & x"01a" => DATA <= x"c060";
when "11" & x"01b" => DATA <= x"0783";
when "11" & x"01c" => DATA <= x"fe80";
when "11" & x"01d" => DATA <= x"1020";
when "11" & x"01e" => DATA <= x"7003";
when "11" & x"01f" => DATA <= x"fabf";
when "11" & x"020" => DATA <= x"dc08";
when "11" & x"021" => DATA <= x"007b";
when "11" & x"022" => DATA <= x"8001";
when "11" & x"023" => DATA <= x"bfe8";
when "11" & x"024" => DATA <= x"07fb";
when "11" & x"025" => DATA <= x"437f";
when "11" & x"026" => DATA <= x"ec06";
when "11" & x"027" => DATA <= x"9040";
when "11" & x"028" => DATA <= x"1468";
when "11" & x"029" => DATA <= x"36a3";
when "11" & x"02a" => DATA <= x"4a36";
when "11" & x"02b" => DATA <= x"7a7f";
when "11" & x"02c" => DATA <= x"ff1f";
when "11" & x"02d" => DATA <= x"83e4";
when "11" & x"02e" => DATA <= x"febf";
when "11" & x"02f" => DATA <= x"3c01";
when "11" & x"030" => DATA <= x"ff60";
when "11" & x"031" => DATA <= x"0e66";
when "11" & x"032" => DATA <= x"7b98";
when "11" & x"033" => DATA <= x"015c";
when "11" & x"034" => DATA <= x"0407";
when "11" & x"035" => DATA <= x"706c";
when "11" & x"036" => DATA <= x"3e9f";
when "11" & x"037" => DATA <= x"0fd4";
when "11" & x"038" => DATA <= x"f87d";
when "11" & x"039" => DATA <= x"3ed5";
when "11" & x"03a" => DATA <= x"6837";
when "11" & x"03b" => DATA <= x"1baf";
when "11" & x"03c" => DATA <= x"53eb";
when "11" & x"03d" => DATA <= x"e4e0";
when "11" & x"03e" => DATA <= x"f4ef";
when "11" & x"03f" => DATA <= x"078b";
when "11" & x"040" => DATA <= x"cebf";
when "11" & x"041" => DATA <= x"d803";
when "11" & x"042" => DATA <= x"0002";
when "11" & x"043" => DATA <= x"0160";
when "11" & x"044" => DATA <= x"340a";
when "11" & x"045" => DATA <= x"031a";
when "11" & x"046" => DATA <= x"c00a";
when "11" & x"047" => DATA <= x"1049";
when "11" & x"048" => DATA <= x"b416";
when "11" & x"049" => DATA <= x"0e30";
when "11" & x"04a" => DATA <= x"08d0";
when "11" & x"04b" => DATA <= x"e844";
when "11" & x"04c" => DATA <= x"002e";
when "11" & x"04d" => DATA <= x"2bfe";
when "11" & x"04e" => DATA <= x"8100";
when "11" & x"04f" => DATA <= x"0fc0";
when "11" & x"050" => DATA <= x"03de";
when "11" & x"051" => DATA <= x"bff8";
when "11" & x"052" => DATA <= x"01fc";
when "11" & x"053" => DATA <= x"b87f";
when "11" & x"054" => DATA <= x"aede";
when "11" & x"055" => DATA <= x"5400";
when "11" & x"056" => DATA <= x"8006";
when "11" & x"057" => DATA <= x"9e88";
when "11" & x"058" => DATA <= x"04a6";
when "11" & x"059" => DATA <= x"5001";
when "11" & x"05a" => DATA <= x"2efe";
when "11" & x"05b" => DATA <= x"4438";
when "11" & x"05c" => DATA <= x"7bbc";
when "11" & x"05d" => DATA <= x"00b4";
when "11" & x"05e" => DATA <= x"7abf";
when "11" & x"05f" => DATA <= x"eaf4";
when "11" & x"060" => DATA <= x"7e3d";
when "11" & x"061" => DATA <= x"a002";
when "11" & x"062" => DATA <= x"dd3d";
when "11" & x"063" => DATA <= x"8280";
when "11" & x"064" => DATA <= x"5c00";
when "11" & x"065" => DATA <= x"07d0";
when "11" & x"066" => DATA <= x"0aa0";
when "11" & x"067" => DATA <= x"583e";
when "11" & x"068" => DATA <= x"2400";
when "11" & x"069" => DATA <= x"8280";
when "11" & x"06a" => DATA <= x"1800";
when "11" & x"06b" => DATA <= x"5a1c";
when "11" & x"06c" => DATA <= x"0004";
when "11" & x"06d" => DATA <= x"04b0";
when "11" & x"06e" => DATA <= x"0000";
when "11" & x"06f" => DATA <= x"a415";
when "11" & x"070" => DATA <= x"0000";
when "11" & x"071" => DATA <= x"814d";
when "11" & x"072" => DATA <= x"0602";
when "11" & x"073" => DATA <= x"8421";
when "11" & x"074" => DATA <= x"c00d";
when "11" & x"075" => DATA <= x"00bb";
when "11" & x"076" => DATA <= x"0000";
when "11" & x"077" => DATA <= x"04e0";
when "11" & x"078" => DATA <= x"0398";
when "11" & x"079" => DATA <= x"55c0";
when "11" & x"07a" => DATA <= x"0390";
when "11" & x"07b" => DATA <= x"0728";
when "11" & x"07c" => DATA <= x"d454";
when "11" & x"07d" => DATA <= x"fbe0";
when "11" & x"07e" => DATA <= x"0300";
when "11" & x"07f" => DATA <= x"e380";
when "11" & x"080" => DATA <= x"7800";
when "11" & x"081" => DATA <= x"1415";
when "11" & x"082" => DATA <= x"e001";
when "11" & x"083" => DATA <= x"4700";
when "11" & x"084" => DATA <= x"0228";
when "11" & x"085" => DATA <= x"0281";
when "11" & x"086" => DATA <= x"2800";
when "11" & x"087" => DATA <= x"1415";
when "11" & x"088" => DATA <= x"e000";
when "11" & x"089" => DATA <= x"2500";
when "11" & x"08a" => DATA <= x"0a8a";
when "11" & x"08b" => DATA <= x"b600";
when "11" & x"08c" => DATA <= x"3c18";
when "11" & x"08d" => DATA <= x"0a0c";
when "11" & x"08e" => DATA <= x"0c27";
when "11" & x"08f" => DATA <= x"d508";
when "11" & x"090" => DATA <= x"7001";
when "11" & x"091" => DATA <= x"5280";
when "11" & x"092" => DATA <= x"6c00";
when "11" & x"093" => DATA <= x"de0e";
when "11" & x"094" => DATA <= x"2718";
when "11" & x"095" => DATA <= x"3801";
when "11" & x"096" => DATA <= x"fe03";
when "11" & x"097" => DATA <= x"0080";
when "11" & x"098" => DATA <= x"005c";
when "11" & x"099" => DATA <= x"00ff";
when "11" & x"09a" => DATA <= x"a04d";
when "11" & x"09b" => DATA <= x"007f";
when "11" & x"09c" => DATA <= x"e800";
when "11" & x"09d" => DATA <= x"8004";
when "11" & x"09e" => DATA <= x"ffb0";
when "11" & x"09f" => DATA <= x"0183";
when "11" & x"0a0" => DATA <= x"fe82";
when "11" & x"0a1" => DATA <= x"3801";
when "11" & x"0a2" => DATA <= x"800d";
when "11" & x"0a3" => DATA <= x"7f88";
when "11" & x"0a4" => DATA <= x"2401";
when "11" & x"0a5" => DATA <= x"8e00";
when "11" & x"0a6" => DATA <= x"7fe8";
when "11" & x"0a7" => DATA <= x"000c";
when "11" & x"0a8" => DATA <= x"84ff";
when "11" & x"0a9" => DATA <= x"0091";
when "11" & x"0aa" => DATA <= x"3800";
when "11" & x"0ab" => DATA <= x"c000";
when "11" & x"0ac" => DATA <= x"7ff0";
when "11" & x"0ad" => DATA <= x"0008";
when "11" & x"0ae" => DATA <= x"0003";
when "11" & x"0af" => DATA <= x"003f";
when "11" & x"0b0" => DATA <= x"e800";
when "11" & x"0b1" => DATA <= x"0200";
when "11" & x"0b2" => DATA <= x"0110";
when "11" & x"0b3" => DATA <= x"900f";
when "11" & x"0b4" => DATA <= x"fd00";
when "11" & x"0b5" => DATA <= x"00b0";
when "11" & x"0b6" => DATA <= x"5ff3";
when "11" & x"0b7" => DATA <= x"c140";
when "11" & x"0b8" => DATA <= x"0c9e";
when "11" & x"0b9" => DATA <= x"cb25";
when "11" & x"0ba" => DATA <= x"0228";
when "11" & x"0bb" => DATA <= x"0004";
when "11" & x"0bc" => DATA <= x"05a0";
when "11" & x"0bd" => DATA <= x"1027";
when "11" & x"0be" => DATA <= x"003c";
when "11" & x"0bf" => DATA <= x"1815";
when "11" & x"0c0" => DATA <= x"0010";
when "11" & x"0c1" => DATA <= x"e00a";
when "11" & x"0c2" => DATA <= x"0100";
when "11" & x"0c3" => DATA <= x"560b";
when "11" & x"0c4" => DATA <= x"0380";
when "11" & x"0c5" => DATA <= x"2a03";
when "11" & x"0c6" => DATA <= x"403a";
when "11" & x"0c7" => DATA <= x"0180";
when "11" & x"0c8" => DATA <= x"f07b";
when "11" & x"0c9" => DATA <= x"af47";
when "11" & x"0ca" => DATA <= x"c8f0";
when "11" & x"0cb" => DATA <= x"1b7d";
when "11" & x"0cc" => DATA <= x"a2e3";
when "11" & x"0cd" => DATA <= x"3416";
when "11" & x"0ce" => DATA <= x"432f";
when "11" & x"0cf" => DATA <= x"900b";
when "11" & x"0d0" => DATA <= x"f5e0";
when "11" & x"0d1" => DATA <= x"f13f";
when "11" & x"0d2" => DATA <= x"9bc5";
when "11" & x"0d3" => DATA <= x"6efe";
when "11" & x"0d4" => DATA <= x"f070";
when "11" & x"0d5" => DATA <= x"3c01";
when "11" & x"0d6" => DATA <= x"a100";
when "11" & x"0d7" => DATA <= x"2702";
when "11" & x"0d8" => DATA <= x"bd87";
when "11" & x"0d9" => DATA <= x"f608";
when "11" & x"0da" => DATA <= x"b400";
when "11" & x"0db" => DATA <= x"0438";
when "11" & x"0dc" => DATA <= x"0283";
when "11" & x"0dd" => DATA <= x"0afa";
when "11" & x"0de" => DATA <= x"0141";
when "11" & x"0df" => DATA <= x"03b0";
when "11" & x"0e0" => DATA <= x"1821";
when "11" & x"0e1" => DATA <= x"71d5";
when "11" & x"0e2" => DATA <= x"0081";
when "11" & x"0e3" => DATA <= x"7830";
when "11" & x"0e4" => DATA <= x"00f7";
when "11" & x"0e5" => DATA <= x"6abd";
when "11" & x"0e6" => DATA <= x"1fe0";
when "11" & x"0e7" => DATA <= x"07a3";
when "11" & x"0e8" => DATA <= x"e040";
when "11" & x"0e9" => DATA <= x"2ba2";
when "11" & x"0ea" => DATA <= x"f379";
when "11" & x"0eb" => DATA <= x"009e";
when "11" & x"0ec" => DATA <= x"7f60";
when "11" & x"0ed" => DATA <= x"0025";
when "11" & x"0ee" => DATA <= x"00b2";
when "11" & x"0ef" => DATA <= x"5c20";
when "11" & x"0f0" => DATA <= x"0448";
when "11" & x"0f1" => DATA <= x"000a";
when "11" & x"0f2" => DATA <= x"402c";
when "11" & x"0f3" => DATA <= x"9600";
when "11" & x"0f4" => DATA <= x"001a";
when "11" & x"0f5" => DATA <= x"00a4";
when "11" & x"0f6" => DATA <= x"07d8";
when "11" & x"0f7" => DATA <= x"52e0";
when "11" & x"0f8" => DATA <= x"164b";
when "11" & x"0f9" => DATA <= x"1b01";
when "11" & x"0fa" => DATA <= x"0180";
when "11" & x"0fb" => DATA <= x"7800";
when "11" & x"0fc" => DATA <= x"2140";
when "11" & x"0fd" => DATA <= x"0552";
when "11" & x"0fe" => DATA <= x"0580";
when "11" & x"0ff" => DATA <= x"2850";
when "11" & x"100" => DATA <= x"2001";
when "11" & x"101" => DATA <= x"0000";
when "11" & x"102" => DATA <= x"0400";
when "11" & x"103" => DATA <= x"050a";
when "11" & x"104" => DATA <= x"9456";
when "11" & x"105" => DATA <= x"0040";
when "11" & x"106" => DATA <= x"0030";
when "11" & x"107" => DATA <= x"9048";
when "11" & x"108" => DATA <= x"3015";
when "11" & x"109" => DATA <= x"4122";
when "11" & x"10a" => DATA <= x"d068";
when "11" & x"10b" => DATA <= x"8457";
when "11" & x"10c" => DATA <= x"4054";
when "11" & x"10d" => DATA <= x"52a8";
when "11" & x"10e" => DATA <= x"9f4f";
when "11" & x"10f" => DATA <= x"e7b7";
when "11" & x"110" => DATA <= x"fd3f";
when "11" & x"111" => DATA <= x"95c0";
when "11" & x"112" => DATA <= x"0f10";
when "11" & x"113" => DATA <= x"0a20";
when "11" & x"114" => DATA <= x"04fc";
when "11" & x"115" => DATA <= x"7c50";
when "11" & x"116" => DATA <= x"000c";
when "11" & x"117" => DATA <= x"0001";
when "11" & x"118" => DATA <= x"003f";
when "11" & x"119" => DATA <= x"c1e0";
when "11" & x"11a" => DATA <= x"0202";
when "11" & x"11b" => DATA <= x"0000";
when "11" & x"11c" => DATA <= x"e970";
when "11" & x"11d" => DATA <= x"1fe8";
when "11" & x"11e" => DATA <= x"037f";
when "11" & x"11f" => DATA <= x"c066";
when "11" & x"120" => DATA <= x"0006";
when "11" & x"121" => DATA <= x"ffb8";
when "11" & x"122" => DATA <= x"1fa5";
when "11" & x"123" => DATA <= x"8009";
when "11" & x"124" => DATA <= x"06c0";
when "11" & x"125" => DATA <= x"4683";
when "11" & x"126" => DATA <= x"6e00";
when "11" & x"127" => DATA <= x"1851";
when "11" & x"128" => DATA <= x"b57f";
when "11" & x"129" => DATA <= x"d004";
when "11" & x"12a" => DATA <= x"ff8f";
when "11" & x"12b" => DATA <= x"c020";
when "11" & x"12c" => DATA <= x"05f4";
when "11" & x"12d" => DATA <= x"dfbf";
when "11" & x"12e" => DATA <= x"2802";
when "11" & x"12f" => DATA <= x"bff8";
when "11" & x"130" => DATA <= x"01fe";
when "11" & x"131" => DATA <= x"fc40";
when "11" & x"132" => DATA <= x"001f";
when "11" & x"133" => DATA <= x"fc00";
when "11" & x"134" => DATA <= x"cf63";
when "11" & x"135" => DATA <= x"b9d8";
when "11" & x"136" => DATA <= x"15c0";
when "11" & x"137" => DATA <= x"0070";
when "11" & x"138" => DATA <= x"07c3";
when "11" & x"139" => DATA <= x"69f0";
when "11" & x"13a" => DATA <= x"f878";
when "11" & x"13b" => DATA <= x"3e1e";
when "11" & x"13c" => DATA <= x"0f86";
when "11" & x"13d" => DATA <= x"0a80";
when "11" & x"13e" => DATA <= x"5a46";
when "11" & x"13f" => DATA <= x"2456";
when "11" & x"140" => DATA <= x"2be5";
when "11" & x"141" => DATA <= x"fee0";
when "11" & x"142" => DATA <= x"0400";
when "11" & x"143" => DATA <= x"1ff5";
when "11" & x"144" => DATA <= x"7e01";
when "11" & x"145" => DATA <= x"659f";
when "11" & x"146" => DATA <= x"cf07";
when "11" & x"147" => DATA <= x"07e3";
when "11" & x"148" => DATA <= x"ddec";
when "11" & x"149" => DATA <= x"4c7f";
when "11" & x"14a" => DATA <= x"d803";
when "11" & x"14b" => DATA <= x"89fd";
when "11" & x"14c" => DATA <= x"200e";
when "11" & x"14d" => DATA <= x"0783";
when "11" & x"14e" => DATA <= x"5ddf";
when "11" & x"14f" => DATA <= x"c00e";
when "11" & x"150" => DATA <= x"a351";
when "11" & x"151" => DATA <= x"2ea1";
when "11" & x"152" => DATA <= x"b808";
when "11" & x"153" => DATA <= x"0cfe";
when "11" & x"154" => DATA <= x"6552";
when "11" & x"155" => DATA <= x"5c80";
when "11" & x"156" => DATA <= x"0040";
when "11" & x"157" => DATA <= x"15df";
when "11" & x"158" => DATA <= x"21c0";
when "11" & x"159" => DATA <= x"3005";
when "11" & x"15a" => DATA <= x"1ed8";
when "11" & x"15b" => DATA <= x"0032";
when "11" & x"15c" => DATA <= x"4010";
when "11" & x"15d" => DATA <= x"0f00";
when "11" & x"15e" => DATA <= x"2700";
when "11" & x"15f" => DATA <= x"3004";
when "11" & x"160" => DATA <= x"0007";
when "11" & x"161" => DATA <= x"79e8";
when "11" & x"162" => DATA <= x"403c";
when "11" & x"163" => DATA <= x"000e";
when "11" & x"164" => DATA <= x"47e0";
when "11" & x"165" => DATA <= x"07fb";
when "11" & x"166" => DATA <= x"0780";
when "11" & x"167" => DATA <= x"1014";
when "11" & x"168" => DATA <= x"0080";
when "11" & x"169" => DATA <= x"0020";
when "11" & x"16a" => DATA <= x"2801";
when "11" & x"16b" => DATA <= x"0140";
when "11" & x"16c" => DATA <= x"0800";
when "11" & x"16d" => DATA <= x"0143";
when "11" & x"16e" => DATA <= x"c028";
when "11" & x"16f" => DATA <= x"0009";
when "11" & x"170" => DATA <= x"a000";
when "11" & x"171" => DATA <= x"8f00";
when "11" & x"172" => DATA <= x"f00f";
when "11" & x"173" => DATA <= x"00f0";
when "11" & x"174" => DATA <= x"0e00";
when "11" & x"175" => DATA <= x"2250";
when "11" & x"176" => DATA <= x"0012";
when "11" & x"177" => DATA <= x"8000";
when "11" & x"178" => DATA <= x"8000";
when "11" & x"179" => DATA <= x"2780";
when "11" & x"17a" => DATA <= x"017c";
when "11" & x"17b" => DATA <= x"0030";
when "11" & x"17c" => DATA <= x"1048";
when "11" & x"17d" => DATA <= x"0628";
when "11" & x"17e" => DATA <= x"4030";
when "11" & x"17f" => DATA <= x"10a0";
when "11" & x"180" => DATA <= x"0058";
when "11" & x"181" => DATA <= x"0a80";
when "11" & x"182" => DATA <= x"0600";
when "11" & x"183" => DATA <= x"0140";
when "11" & x"184" => DATA <= x"0002";
when "11" & x"185" => DATA <= x"13f0";
when "11" & x"186" => DATA <= x"0d00";
when "11" & x"187" => DATA <= x"0250";
when "11" & x"188" => DATA <= x"0012";
when "11" & x"189" => DATA <= x"8000";
when "11" & x"18a" => DATA <= x"9e01";
when "11" & x"18b" => DATA <= x"4002";
when "11" & x"18c" => DATA <= x"0f00";
when "11" & x"18d" => DATA <= x"e000";
when "11" & x"18e" => DATA <= x"4500";
when "11" & x"18f" => DATA <= x"023c";
when "11" & x"190" => DATA <= x"0041";
when "11" & x"191" => DATA <= x"e014";
when "11" & x"192" => DATA <= x"0095";
when "11" & x"193" => DATA <= x"0004";
when "11" & x"194" => DATA <= x"0234";
when "11" & x"195" => DATA <= x"0001";
when "11" & x"196" => DATA <= x"f00e";
when "11" & x"197" => DATA <= x"0010";
when "11" & x"198" => DATA <= x"807c";
when "11" & x"199" => DATA <= x"0340";
when "11" & x"19a" => DATA <= x"021d";
when "11" & x"19b" => DATA <= x"c000";
when "11" & x"19c" => DATA <= x"1050";
when "11" & x"19d" => DATA <= x"0081";
when "11" & x"19e" => DATA <= x"f8fd";
when "11" & x"19f" => DATA <= x"7f80";
when "11" & x"1a0" => DATA <= x"0214";
when "11" & x"1a1" => DATA <= x"0010";
when "11" & x"1a2" => DATA <= x"4fd7";
when "11" & x"1a3" => DATA <= x"fe80";
when "11" & x"1a4" => DATA <= x"3993";
when "11" & x"1a5" => DATA <= x"eff0";
when "11" & x"1a6" => DATA <= x"0013";
when "11" & x"1a7" => DATA <= x"803b";
when "11" & x"1a8" => DATA <= x"fc00";
when "11" & x"1a9" => DATA <= x"20a0";
when "11" & x"1aa" => DATA <= x"0100";
when "11" & x"1ab" => DATA <= x"02bf";
when "11" & x"1ac" => DATA <= x"f401";
when "11" & x"1ad" => DATA <= x"cebf";
when "11" & x"1ae" => DATA <= x"7fc8";
when "11" & x"1af" => DATA <= x"0009";
when "11" & x"1b0" => DATA <= x"da9f";
when "11" & x"1b1" => DATA <= x"7fe8";
when "11" & x"1b2" => DATA <= x"010d";
when "11" & x"1b3" => DATA <= x"067f";
when "11" & x"1b4" => DATA <= x"d60a";
when "11" & x"1b5" => DATA <= x"007a";
when "11" & x"1b6" => DATA <= x"f802";
when "11" & x"1b7" => DATA <= x"f740";
when "11" & x"1b8" => DATA <= x"0040";
when "11" & x"1b9" => DATA <= x"001f";
when "11" & x"1ba" => DATA <= x"8058";
when "11" & x"1bb" => DATA <= x"00f0";
when "11" & x"1bc" => DATA <= x"005f";
when "11" & x"1bd" => DATA <= x"d000";
when "11" & x"1be" => DATA <= x"63b0";
when "11" & x"1bf" => DATA <= x"1741";
when "11" & x"1c0" => DATA <= x"0f8a";
when "11" & x"1c1" => DATA <= x"007e";
when "11" & x"1c2" => DATA <= x"bff8";
when "11" & x"1c3" => DATA <= x"01fe";
when "11" & x"1c4" => DATA <= x"0040";
when "11" & x"1c5" => DATA <= x"1fcb";
when "11" & x"1c6" => DATA <= x"fc00";
when "11" & x"1c7" => DATA <= x"ff00";
when "11" & x"1c8" => DATA <= x"0fc3";
when "11" & x"1c9" => DATA <= x"8783";
when "11" & x"1ca" => DATA <= x"e500";
when "11" & x"1cb" => DATA <= x"3fc0";
when "11" & x"1cc" => DATA <= x"0f46";
when "11" & x"1cd" => DATA <= x"c0a2";
when "11" & x"1ce" => DATA <= x"be00";
when "11" & x"1cf" => DATA <= x"03f1";
when "11" & x"1d0" => DATA <= x"c1e5";
when "11" & x"1d1" => DATA <= x"e8b0";
when "11" & x"1d2" => DATA <= x"5a3d";
when "11" & x"1d3" => DATA <= x"1e14";
when "11" & x"1d4" => DATA <= x"008e";
when "11" & x"1d5" => DATA <= x"48a0";
when "11" & x"1d6" => DATA <= x"5e07";
when "11" & x"1d7" => DATA <= x"1700";
when "11" & x"1d8" => DATA <= x"c280";
when "11" & x"1d9" => DATA <= x"002f";
when "11" & x"1da" => DATA <= x"f008";
when "11" & x"1db" => DATA <= x"0006";
when "11" & x"1dc" => DATA <= x"0200";
when "11" & x"1dd" => DATA <= x"0880";
when "11" & x"1de" => DATA <= x"0ffa";
when "11" & x"1df" => DATA <= x"0070";
when "11" & x"1e0" => DATA <= x"3e38";
when "11" & x"1e1" => DATA <= x"01ff";
when "11" & x"1e2" => DATA <= x"4014";
when "11" & x"1e3" => DATA <= x"fe00";
when "11" & x"1e4" => DATA <= x"7a00";
when "11" & x"1e5" => DATA <= x"1ff4";
when "11" & x"1e6" => DATA <= x"0040";
when "11" & x"1e7" => DATA <= x"0052";
when "11" & x"1e8" => DATA <= x"0001";
when "11" & x"1e9" => DATA <= x"ff50";
when "11" & x"1ea" => DATA <= x"0143";
when "11" & x"1eb" => DATA <= x"2210";
when "11" & x"1ec" => DATA <= x"a80a";
when "11" & x"1ed" => DATA <= x"47b4";
when "11" & x"1ee" => DATA <= x"5128";
when "11" & x"1ef" => DATA <= x"8402";
when "11" & x"1f0" => DATA <= x"2582";
when "11" & x"1f1" => DATA <= x"aa41";
when "11" & x"1f2" => DATA <= x"206a";
when "11" & x"1f3" => DATA <= x"aaa0";
when "11" & x"1f4" => DATA <= x"9567";
when "11" & x"1f5" => DATA <= x"ef7f";
when "11" & x"1f6" => DATA <= x"00b1";
when "11" & x"1f7" => DATA <= x"6800";
when "11" & x"1f8" => DATA <= x"05c0";
when "11" & x"1f9" => DATA <= x"0e07";
when "11" & x"1fa" => DATA <= x"fbf0";
when "11" & x"1fb" => DATA <= x"0940";
when "11" & x"1fc" => DATA <= x"0040";
when "11" & x"1fd" => DATA <= x"0547";
when "11" & x"1fe" => DATA <= x"a0ea";
when "11" & x"1ff" => DATA <= x"0001";
when "11" & x"200" => DATA <= x"501f";
when "11" & x"201" => DATA <= x"ffff";
when "11" & x"202" => DATA <= x"f5fe";
when "11" & x"203" => DATA <= x"0194";
when "11" & x"204" => DATA <= x"1a01";
when "11" & x"205" => DATA <= x"20f9";
when "11" & x"206" => DATA <= x"b002";
when "11" & x"207" => DATA <= x"ffc0";
when "11" & x"208" => DATA <= x"600a";
when "11" & x"209" => DATA <= x"3feb";
when "11" & x"20a" => DATA <= x"f008";
when "11" & x"20b" => DATA <= x"007d";
when "11" & x"20c" => DATA <= x"c00f";
when "11" & x"20d" => DATA <= x"f1f8";
when "11" & x"20e" => DATA <= x"0078";
when "11" & x"20f" => DATA <= x"fce0";
when "11" & x"210" => DATA <= x"03f9";
when "11" & x"211" => DATA <= x"f900";
when "11" & x"212" => DATA <= x"007f";
when "11" & x"213" => DATA <= x"b888";
when "11" & x"214" => DATA <= x"0e06";
when "11" & x"215" => DATA <= x"0381";
when "11" & x"216" => DATA <= x"c6e7";
when "11" & x"217" => DATA <= x"77a7";
when "11" & x"218" => DATA <= x"e87c";
when "11" & x"219" => DATA <= x"3c17";
when "11" & x"21a" => DATA <= x"4f86";
when "11" & x"21b" => DATA <= x"c3f4";
when "11" & x"21c" => DATA <= x"8ac4";
when "11" & x"21d" => DATA <= x"a446";
when "11" & x"21e" => DATA <= x"2915";
when "11" & x"21f" => DATA <= x"81f7";
when "11" & x"220" => DATA <= x"ebf7";
when "11" & x"221" => DATA <= x"b9dd";
when "11" & x"222" => DATA <= x"eb5e";
when "11" & x"223" => DATA <= x"e777";
when "11" & x"224" => DATA <= x"bbf0";
when "11" & x"225" => DATA <= x"3cff";
when "11" & x"226" => DATA <= x"0f00";
when "11" & x"227" => DATA <= x"120b";
when "11" & x"228" => DATA <= x"caff";
when "11" & x"229" => DATA <= x"7838";
when "11" & x"22a" => DATA <= x"5f0f";
when "11" & x"22b" => DATA <= x"07f8";
when "11" & x"22c" => DATA <= x"1cbe";
when "11" & x"22d" => DATA <= x"ff0b";
when "11" & x"22e" => DATA <= x"8028";
when "11" & x"22f" => DATA <= x"05fe";
when "11" & x"230" => DATA <= x"007e";
when "11" & x"231" => DATA <= x"bfc0";
when "11" & x"232" => DATA <= x"0200";
when "11" & x"233" => DATA <= x"0200";
when "11" & x"234" => DATA <= x"0e00";
when "11" & x"235" => DATA <= x"2fbf";
when "11" & x"236" => DATA <= x"c000";
when "11" & x"237" => DATA <= x"4000";
when "11" & x"238" => DATA <= x"15fc";
when "11" & x"239" => DATA <= x"0ea0";
when "11" & x"23a" => DATA <= x"f000";
when "11" & x"23b" => DATA <= x"1280";
when "11" & x"23c" => DATA <= x"1fe0";
when "11" & x"23d" => DATA <= x"4a00";
when "11" & x"23e" => DATA <= x"4050";
when "11" & x"23f" => DATA <= x"0081";
when "11" & x"240" => DATA <= x"fe48";
when "11" & x"241" => DATA <= x"a000";
when "11" & x"242" => DATA <= x"0d00";
when "11" & x"243" => DATA <= x"081f";
when "11" & x"244" => DATA <= x"e02a";
when "11" & x"245" => DATA <= x"0048";
when "11" & x"246" => DATA <= x"0810";
when "11" & x"247" => DATA <= x"0c07";
when "11" & x"248" => DATA <= x"f9b0";
when "11" & x"249" => DATA <= x"042f";
when "11" & x"24a" => DATA <= x"5800";
when "11" & x"24b" => DATA <= x"5c0f";
when "11" & x"24c" => DATA <= x"17ed";
when "11" & x"24d" => DATA <= x"0200";
when "11" & x"24e" => DATA <= x"c00b";
when "11" & x"24f" => DATA <= x"f1f9";
when "11" & x"250" => DATA <= x"fdfe";
when "11" & x"251" => DATA <= x"0404";
when "11" & x"252" => DATA <= x"5003";
when "11" & x"253" => DATA <= x"ec00";
when "11" & x"254" => DATA <= x"100f";
when "11" & x"255" => DATA <= x"8207";
when "11" & x"256" => DATA <= x"4420";
when "11" & x"257" => DATA <= x"03fc";
when "11" & x"258" => DATA <= x"0080";
when "11" & x"259" => DATA <= x"7a00";
when "11" & x"25a" => DATA <= x"2820";
when "11" & x"25b" => DATA <= x"00ff";
when "11" & x"25c" => DATA <= x"402f";
when "11" & x"25d" => DATA <= x"dff2";
when "11" & x"25e" => DATA <= x"00ff";
when "11" & x"25f" => DATA <= x"1800";
when "11" & x"260" => DATA <= x"1832";
when "11" & x"261" => DATA <= x"00ff";
when "11" & x"262" => DATA <= x"a001";
when "11" & x"263" => DATA <= x"dc80";
when "11" & x"264" => DATA <= x"3fc4";
when "11" & x"265" => DATA <= x"4047";
when "11" & x"266" => DATA <= x"da03";
when "11" & x"267" => DATA <= x"801b";
when "11" & x"268" => DATA <= x"f400";
when "11" & x"269" => DATA <= x"017f";
when "11" & x"26a" => DATA <= x"f003";
when "11" & x"26b" => DATA <= x"7e80";
when "11" & x"26c" => DATA <= x"018f";
when "11" & x"26d" => DATA <= x"fe00";
when "11" & x"26e" => DATA <= x"7f90";
when "11" & x"26f" => DATA <= x"1000";
when "11" & x"270" => DATA <= x"07f8";
when "11" & x"271" => DATA <= x"014c";
when "11" & x"272" => DATA <= x"007f";
when "11" & x"273" => DATA <= x"8002";
when "11" & x"274" => DATA <= x"0003";
when "11" & x"275" => DATA <= x"f800";
when "11" & x"276" => DATA <= x"1010";
when "11" & x"277" => DATA <= x"0fb0";
when "11" & x"278" => DATA <= x"580f";
when "11" & x"279" => DATA <= x"f56f";
when "11" & x"27a" => DATA <= x"003f";
when "11" & x"27b" => DATA <= x"1fe7";
when "11" & x"27c" => DATA <= x"f67b";
when "11" & x"27d" => DATA <= x"f380";
when "11" & x"27e" => DATA <= x"0a65";
when "11" & x"27f" => DATA <= x"b058";
when "11" & x"280" => DATA <= x"10fc";
when "11" & x"281" => DATA <= x"01a0";
when "11" & x"282" => DATA <= x"007d";
when "11" & x"283" => DATA <= x"7f88";
when "11" & x"284" => DATA <= x"0944";
when "11" & x"285" => DATA <= x"0080";
when "11" & x"286" => DATA <= x"0130";
when "11" & x"287" => DATA <= x"6379";
when "11" & x"288" => DATA <= x"3c00";
when "11" & x"289" => DATA <= x"2004";
when "11" & x"28a" => DATA <= x"0000";
when "11" & x"28b" => DATA <= x"0340";
when "11" & x"28c" => DATA <= x"0070";
when "11" & x"28d" => DATA <= x"1800";
when "11" & x"28e" => DATA <= x"0740";
when "11" & x"28f" => DATA <= x"0274";
when "11" & x"290" => DATA <= x"187d";
when "11" & x"291" => DATA <= x"fe00";
when "11" & x"292" => DATA <= x"0800";
when "11" & x"293" => DATA <= x"0102";
when "11" & x"294" => DATA <= x"5060";
when "11" & x"295" => DATA <= x"1002";
when "11" & x"296" => DATA <= x"0464";
when "11" & x"297" => DATA <= x"8015";
when "11" & x"298" => DATA <= x"0043";
when "11" & x"299" => DATA <= x"5021";
when "11" & x"29a" => DATA <= x"e26c";
when "11" & x"29b" => DATA <= x"4000";
when "11" & x"29c" => DATA <= x"0049";
when "11" & x"29d" => DATA <= x"9a00";
when "11" & x"29e" => DATA <= x"7fd6";
when "11" & x"29f" => DATA <= x"f801";
when "11" & x"2a0" => DATA <= x"ead4";
when "11" & x"2a1" => DATA <= x"6850";
when "11" & x"2a2" => DATA <= x"057a";
when "11" & x"2a3" => DATA <= x"0001";
when "11" & x"2a4" => DATA <= x"6110";
when "11" & x"2a5" => DATA <= x"c070";
when "11" & x"2a6" => DATA <= x"0cf0";
when "11" & x"2a7" => DATA <= x"0378";
when "11" & x"2a8" => DATA <= x"0302";
when "11" & x"2a9" => DATA <= x"800f";
when "11" & x"2aa" => DATA <= x"80d0";
when "11" & x"2ab" => DATA <= x"0040";
when "11" & x"2ac" => DATA <= x"00ff";
when "11" & x"2ad" => DATA <= x"a001";
when "11" & x"2ae" => DATA <= x"1500";
when "11" & x"2af" => DATA <= x"0800";
when "11" & x"2b0" => DATA <= x"007a";
when "11" & x"2b1" => DATA <= x"0008";
when "11" & x"2b2" => DATA <= x"4800";
when "11" & x"2b3" => DATA <= x"83c0";
when "11" & x"2b4" => DATA <= x"081e";
when "11" & x"2b5" => DATA <= x"0054";
when "11" & x"2b6" => DATA <= x"a004";
when "11" & x"2b7" => DATA <= x"0480";
when "11" & x"2b8" => DATA <= x"1068";
when "11" & x"2b9" => DATA <= x"0081";
when "11" & x"2ba" => DATA <= x"c004";
when "11" & x"2bb" => DATA <= x"030d";
when "11" & x"2bc" => DATA <= x"0000";
when "11" & x"2bd" => DATA <= x"a800";
when "11" & x"2be" => DATA <= x"0400";
when "11" & x"2bf" => DATA <= x"1850";
when "11" & x"2c0" => DATA <= x"0006";
when "11" & x"2c1" => DATA <= x"4003";
when "11" & x"2c2" => DATA <= x"dec0";
when "11" & x"2c3" => DATA <= x"6af0";
when "11" & x"2c4" => DATA <= x"0026";
when "11" & x"2c5" => DATA <= x"8010";
when "11" & x"2c6" => DATA <= x"0082";
when "11" & x"2c7" => DATA <= x"07f7";
when "11" & x"2c8" => DATA <= x"0e27";
when "11" & x"2c9" => DATA <= x"03c1";
when "11" & x"2ca" => DATA <= x"a0e3";
when "11" & x"2cb" => DATA <= x"ff80";
when "11" & x"2cc" => DATA <= x"03bc";
when "11" & x"2cd" => DATA <= x"00ff";
when "11" & x"2ce" => DATA <= x"d000";
when "11" & x"2cf" => DATA <= x"0801";
when "11" & x"2d0" => DATA <= x"ffe0";
when "11" & x"2d1" => DATA <= x"0ffb";
when "11" & x"2d2" => DATA <= x"0010";
when "11" & x"2d3" => DATA <= x"bfec";
when "11" & x"2d4" => DATA <= x"0020";
when "11" & x"2d5" => DATA <= x"fff0";
when "11" & x"2d6" => DATA <= x"07ff";
when "11" & x"2d7" => DATA <= x"0001";
when "11" & x"2d8" => DATA <= x"3801";
when "11" & x"2d9" => DATA <= x"fe00";
when "11" & x"2da" => DATA <= x"4068";
when "11" & x"2db" => DATA <= x"03fe";
when "11" & x"2dc" => DATA <= x"4000";
when "11" & x"2dd" => DATA <= x"5400";
when "11" & x"2de" => DATA <= x"ffb0";
when "11" & x"2df" => DATA <= x"0603";
when "11" & x"2e0" => DATA <= x"fff0";
when "11" & x"2e1" => DATA <= x"00e2";
when "11" & x"2e2" => DATA <= x"95d0";
when "11" & x"2e3" => DATA <= x"e576";
when "11" & x"2e4" => DATA <= x"2900";
when "11" & x"2e5" => DATA <= x"aee9";
when "11" & x"2e6" => DATA <= x"0082";
when "11" & x"2e7" => DATA <= x"4002";
when "11" & x"2e8" => DATA <= x"d000";
when "11" & x"2e9" => DATA <= x"5c28";
when "11" & x"2ea" => DATA <= x"806b";
when "11" & x"2eb" => DATA <= x"2000";
when "11" & x"2ec" => DATA <= x"0d57";
when "11" & x"2ed" => DATA <= x"ab55";
when "11" & x"2ee" => DATA <= x"51d5";
when "11" & x"2ef" => DATA <= x"2a85";
when "11" & x"2f0" => DATA <= x"7aad";
when "11" & x"2f1" => DATA <= x"9f50";
when "11" & x"2f2" => DATA <= x"0835";
when "11" & x"2f3" => DATA <= x"8a8d";
when "11" & x"2f4" => DATA <= x"e6a7";
when "11" & x"2f5" => DATA <= x"4597";
when "11" & x"2f6" => DATA <= x"edfc";
when "11" & x"2f7" => DATA <= x"8f40";
when "11" & x"2f8" => DATA <= x"0c56";
when "11" & x"2f9" => DATA <= x"0821";
when "11" & x"2fa" => DATA <= x"f8f8";
when "11" & x"2fb" => DATA <= x"0036";
when "11" & x"2fc" => DATA <= x"1f8f";
when "11" & x"2fd" => DATA <= x"f008";
when "11" & x"2fe" => DATA <= x"02bf";
when "11" & x"2ff" => DATA <= x"c000";
when "11" & x"300" => DATA <= x"4408";
when "11" & x"301" => DATA <= x"3e80";
when "11" & x"302" => DATA <= x"2bfd";
when "11" & x"303" => DATA <= x"c15f";
when "11" & x"304" => DATA <= x"eefa";
when "11" & x"305" => DATA <= x"005f";
when "11" & x"306" => DATA <= x"effb";
when "11" & x"307" => DATA <= x"e9f9";
when "11" & x"308" => DATA <= x"dfe4";
when "11" & x"309" => DATA <= x"1f01";
when "11" & x"30a" => DATA <= x"f000";
when "11" & x"30b" => DATA <= x"03c3";
when "11" & x"30c" => DATA <= x"ffc7";
when "11" & x"30d" => DATA <= x"e2fb";
when "11" & x"30e" => DATA <= x"3fb0";
when "11" & x"30f" => DATA <= x"0afc";
when "11" & x"310" => DATA <= x"b00a";
when "11" & x"311" => DATA <= x"ff73";
when "11" & x"312" => DATA <= x"002b";
when "11" & x"313" => DATA <= x"8080";
when "11" & x"314" => DATA <= x"e667";
when "11" & x"315" => DATA <= x"b1d3";
when "11" & x"316" => DATA <= x"f43e";
when "11" & x"317" => DATA <= x"9f0f";
when "11" & x"318" => DATA <= x"a7c3";
when "11" & x"319" => DATA <= x"e1b6";
when "11" & x"31a" => DATA <= x"2314";
when "11" & x"31b" => DATA <= x"0a45";
when "11" & x"31c" => DATA <= x"20d2";
when "11" & x"31d" => DATA <= x"0110";
when "11" & x"31e" => DATA <= x"ff57";
when "11" & x"31f" => DATA <= x"f4ff";
when "11" & x"320" => DATA <= x"dfe3";
when "11" & x"321" => DATA <= x"ca37";
when "11" & x"322" => DATA <= x"0c1f";
when "11" & x"323" => DATA <= x"1c60";
when "11" & x"324" => DATA <= x"7428";
when "11" & x"325" => DATA <= x"b380";
when "11" & x"326" => DATA <= x"090b";
when "11" & x"327" => DATA <= x"7401";
when "11" & x"328" => DATA <= x"041e";
when "11" & x"329" => DATA <= x"0008";
when "11" & x"32a" => DATA <= x"0004";
when "11" & x"32b" => DATA <= x"8f70";
when "11" & x"32c" => DATA <= x"2001";
when "11" & x"32d" => DATA <= x"fef8";
when "11" & x"32e" => DATA <= x"7e34";
when "11" & x"32f" => DATA <= x"1060";
when "11" & x"330" => DATA <= x"6430";
when "11" & x"331" => DATA <= x"027f";
when "11" & x"332" => DATA <= x"c3c0";
when "11" & x"333" => DATA <= x"0010";
when "11" & x"334" => DATA <= x"002e";
when "11" & x"335" => DATA <= x"02e1";
when "11" & x"336" => DATA <= x"f000";
when "11" & x"337" => DATA <= x"7838";
when "11" & x"338" => DATA <= x"1000";
when "11" & x"339" => DATA <= x"0104";
when "11" & x"33a" => DATA <= x"1e00";
when "11" & x"33b" => DATA <= x"f010";
when "11" & x"33c" => DATA <= x"8040";
when "11" & x"33d" => DATA <= x"6b80";
when "11" & x"33e" => DATA <= x"03fc";
when "11" & x"33f" => DATA <= x"00ff";
when "11" & x"340" => DATA <= x"2204";
when "11" & x"341" => DATA <= x"4021";
when "11" & x"342" => DATA <= x"1101";
when "11" & x"343" => DATA <= x"fc00";
when "11" & x"344" => DATA <= x"7e04";
when "11" & x"345" => DATA <= x"0880";
when "11" & x"346" => DATA <= x"4c30";
when "11" & x"347" => DATA <= x"80d0";
when "11" & x"348" => DATA <= x"00f4";
when "11" & x"349" => DATA <= x"e000";
when "11" & x"34a" => DATA <= x"1002";
when "11" & x"34b" => DATA <= x"805f";
when "11" & x"34c" => DATA <= x"bc00";
when "11" & x"34d" => DATA <= x"0300";
when "11" & x"34e" => DATA <= x"9040";
when "11" & x"34f" => DATA <= x"0ffa";
when "11" & x"350" => DATA <= x"0008";
when "11" & x"351" => DATA <= x"0481";
when "11" & x"352" => DATA <= x"8b87";
when "11" & x"353" => DATA <= x"600e";
when "11" & x"354" => DATA <= x"8000";
when "11" & x"355" => DATA <= x"4120";
when "11" & x"356" => DATA <= x"231c";
when "11" & x"357" => DATA <= x"4c08";
when "11" & x"358" => DATA <= x"e000";
when "11" & x"359" => DATA <= x"4000";
when "11" & x"35a" => DATA <= x"88f0";
when "11" & x"35b" => DATA <= x"0810";
when "11" & x"35c" => DATA <= x"0015";
when "11" & x"35d" => DATA <= x"0140";
when "11" & x"35e" => DATA <= x"0fa2";
when "11" & x"35f" => DATA <= x"03e0";
when "11" & x"360" => DATA <= x"00f0";
when "11" & x"361" => DATA <= x"e005";
when "11" & x"362" => DATA <= x"5808";
when "11" & x"363" => DATA <= x"0200";
when "11" & x"364" => DATA <= x"7fa3";
when "11" & x"365" => DATA <= x"2801";
when "11" & x"366" => DATA <= x"fe00";
when "11" & x"367" => DATA <= x"100d";
when "11" & x"368" => DATA <= x"100e";
when "11" & x"369" => DATA <= x"6101";
when "11" & x"36a" => DATA <= x"a1f2";
when "11" & x"36b" => DATA <= x"0062";
when "11" & x"36c" => DATA <= x"3440";
when "11" & x"36d" => DATA <= x"2627";
when "11" & x"36e" => DATA <= x"c001";
when "11" & x"36f" => DATA <= x"fe00";
when "11" & x"370" => DATA <= x"00af";
when "11" & x"371" => DATA <= x"6800";
when "11" & x"372" => DATA <= x"0208";
when "11" & x"373" => DATA <= x"7f80";
when "11" & x"374" => DATA <= x"0408";
when "11" & x"375" => DATA <= x"0000";
when "11" & x"376" => DATA <= x"4280";
when "11" & x"377" => DATA <= x"1fe0";
when "11" & x"378" => DATA <= x"0008";
when "11" & x"379" => DATA <= x"9240";
when "11" & x"37a" => DATA <= x"1fe0";
when "11" & x"37b" => DATA <= x"0008";
when "11" & x"37c" => DATA <= x"4421";
when "11" & x"37d" => DATA <= x"c00f";
when "11" & x"37e" => DATA <= x"f782";
when "11" & x"37f" => DATA <= x"c288";
when "11" & x"380" => DATA <= x"3800";
when "11" & x"381" => DATA <= x"2201";
when "11" & x"382" => DATA <= x"7b82";
when "11" & x"383" => DATA <= x"6801";
when "11" & x"384" => DATA <= x"00bc";
when "11" & x"385" => DATA <= x"5fa0";
when "11" & x"386" => DATA <= x"1fef";
when "11" & x"387" => DATA <= x"ba18";
when "11" & x"388" => DATA <= x"9030";
when "11" & x"389" => DATA <= x"3bbe";
when "11" & x"38a" => DATA <= x"4018";
when "11" & x"38b" => DATA <= x"0206";
when "11" & x"38c" => DATA <= x"e3f6";
when "11" & x"38d" => DATA <= x"8000";
when "11" & x"38e" => DATA <= x"2c00";
when "11" & x"38f" => DATA <= x"287c";
when "11" & x"390" => DATA <= x"aef7";
when "11" & x"391" => DATA <= x"138d";
when "11" & x"392" => DATA <= x"6401";
when "11" & x"393" => DATA <= x"9cff";
when "11" & x"394" => DATA <= x"0703";
when "11" & x"395" => DATA <= x"2b7d";
when "11" & x"396" => DATA <= x"80d0";
when "11" & x"397" => DATA <= x"aff7";
when "11" & x"398" => DATA <= x"b111";
when "11" & x"399" => DATA <= x"e8fc";
when "11" & x"39a" => DATA <= x"024f";
when "11" & x"39b" => DATA <= x"f8d1";
when "11" & x"39c" => DATA <= x"1ccf";
when "11" & x"39d" => DATA <= x"0057";
when "11" & x"39e" => DATA <= x"fa7c";
when "11" & x"39f" => DATA <= x"1a00";
when "11" & x"3a0" => DATA <= x"783f";
when "11" & x"3a1" => DATA <= x"c015";
when "11" & x"3a2" => DATA <= x"fe1f";
when "11" & x"3a3" => DATA <= x"0008";
when "11" & x"3a4" => DATA <= x"abfc";
when "11" & x"3a5" => DATA <= x"015f";
when "11" & x"3a6" => DATA <= x"ec04";
when "11" & x"3a7" => DATA <= x"0304";
when "11" & x"3a8" => DATA <= x"868f";
when "11" & x"3a9" => DATA <= x"003f";
when "11" & x"3aa" => DATA <= x"e47c";
when "11" & x"3ab" => DATA <= x"1000";
when "11" & x"3ac" => DATA <= x"083f";
when "11" & x"3ad" => DATA <= x"f400";
when "11" & x"3ae" => DATA <= x"0400";
when "11" & x"3af" => DATA <= x"7fc8";
when "11" & x"3b0" => DATA <= x"0281";
when "11" & x"3b1" => DATA <= x"5201";
when "11" & x"3b2" => DATA <= x"7f80";
when "11" & x"3b3" => DATA <= x"f806";
when "11" & x"3b4" => DATA <= x"a284";
when "11" & x"3b5" => DATA <= x"0ff1";
when "11" & x"3b6" => DATA <= x"8710";
when "11" & x"3b7" => DATA <= x"2108";
when "11" & x"3b8" => DATA <= x"4007";
when "11" & x"3b9" => DATA <= x"fc80";
when "11" & x"3ba" => DATA <= x"280a";
when "11" & x"3bb" => DATA <= x"2027";
when "11" & x"3bc" => DATA <= x"ff03";
when "11" & x"3bd" => DATA <= x"0081";
when "11" & x"3be" => DATA <= x"4050";
when "11" & x"3bf" => DATA <= x"03fe";
when "11" & x"3c0" => DATA <= x"400c";
when "11" & x"3c1" => DATA <= x"06a3";
when "11" & x"3c2" => DATA <= x"41fc";
when "11" & x"3c3" => DATA <= x"614e";
when "11" & x"3c4" => DATA <= x"0740";
when "11" & x"3c5" => DATA <= x"2d00";
when "11" & x"3c6" => DATA <= x"0428";
when "11" & x"3c7" => DATA <= x"0009";
when "11" & x"3c8" => DATA <= x"2000";
when "11" & x"3c9" => DATA <= x"c200";
when "11" & x"3ca" => DATA <= x"0140";
when "11" & x"3cb" => DATA <= x"c00f";
when "11" & x"3cc" => DATA <= x"50e1";
when "11" & x"3cd" => DATA <= x"783c";
when "11" & x"3ce" => DATA <= x"3c0e";
when "11" & x"3cf" => DATA <= x"07e8";
when "11" & x"3d0" => DATA <= x"0022";
when "11" & x"3d1" => DATA <= x"1000";
when "11" & x"3d2" => DATA <= x"0400";
when "11" & x"3d3" => DATA <= x"5200";
when "11" & x"3d4" => DATA <= x"11b0";
when "11" & x"3d5" => DATA <= x"0400";
when "11" & x"3d6" => DATA <= x"2800";
when "11" & x"3d7" => DATA <= x"80a0";
when "11" & x"3d8" => DATA <= x"0082";
when "11" & x"3d9" => DATA <= x"0005";
when "11" & x"3da" => DATA <= x"6000";
when "11" & x"3db" => DATA <= x"1061";
when "11" & x"3dc" => DATA <= x"4280";
when "11" & x"3dd" => DATA <= x"021c";
when "11" & x"3de" => DATA <= x"0002";
when "11" & x"3df" => DATA <= x"3070";
when "11" & x"3e0" => DATA <= x"0200";
when "11" & x"3e1" => DATA <= x"3024";
when "11" & x"3e2" => DATA <= x"e000";
when "11" & x"3e3" => DATA <= x"1480";
when "11" & x"3e4" => DATA <= x"182c";
when "11" & x"3e5" => DATA <= x"0004";
when "11" & x"3e6" => DATA <= x"fc02";
when "11" & x"3e7" => DATA <= x"3480";
when "11" & x"3e8" => DATA <= x"042e";
when "11" & x"3e9" => DATA <= x"0046";
when "11" & x"3ea" => DATA <= x"8012";
when "11" & x"3eb" => DATA <= x"c001";
when "11" & x"3ec" => DATA <= x"1500";
when "11" & x"3ed" => DATA <= x"1009";
when "11" & x"3ee" => DATA <= x"8004";
when "11" & x"3ef" => DATA <= x"b000";
when "11" & x"3f0" => DATA <= x"2400";
when "11" & x"3f1" => DATA <= x"1d2e";
when "11" & x"3f2" => DATA <= x"a8e9";
when "11" & x"3f3" => DATA <= x"743a";
when "11" & x"3f4" => DATA <= x"1d8e";
when "11" & x"3f5" => DATA <= x"801e";
when "11" & x"3f6" => DATA <= x"abfa";
when "11" & x"3f7" => DATA <= x"ad59";
when "11" & x"3f8" => DATA <= x"ab9a";
when "11" & x"3f9" => DATA <= x"9552";
when "11" & x"3fa" => DATA <= x"b516";
when "11" & x"3fb" => DATA <= x"8175";
when "11" & x"3fc" => DATA <= x"3ad5";
when "11" & x"3fd" => DATA <= x"4ea3";
when "11" & x"3fe" => DATA <= x"f9bd";
when "11" & x"3ff" => DATA <= x"fe5f";
when "11" & x"400" => DATA <= x"3fbd";
when "11" & x"401" => DATA <= x"e9fc";
when "11" & x"402" => DATA <= x"2000";
when "11" & x"403" => DATA <= x"7c80";
when "11" & x"404" => DATA <= x"0100";
when "11" & x"405" => DATA <= x"27e3";
when "11" & x"406" => DATA <= x"e280";
when "11" & x"407" => DATA <= x"007c";
when "11" & x"408" => DATA <= x"00ff";
when "11" & x"409" => DATA <= x"07a0";
when "11" & x"40a" => DATA <= x"0015";
when "11" & x"40b" => DATA <= x"00c0";
when "11" & x"40c" => DATA <= x"703f";
when "11" & x"40d" => DATA <= x"c1ff";
when "11" & x"40e" => DATA <= x"fe00";
when "11" & x"40f" => DATA <= x"fff7";
when "11" & x"410" => DATA <= x"b500";
when "11" & x"411" => DATA <= x"9c74";
when "11" & x"412" => DATA <= x"07c0";
when "11" & x"413" => DATA <= x"0015";
when "11" & x"414" => DATA <= x"fe07";
when "11" & x"415" => DATA <= x"0030";
when "11" & x"416" => DATA <= x"1f95";
when "11" & x"417" => DATA <= x"fe3f";
when "11" & x"418" => DATA <= x"0020";
when "11" & x"419" => DATA <= x"1795";
when "11" & x"41a" => DATA <= x"7e3f";
when "11" & x"41b" => DATA <= x"5fd0";
when "11" & x"41c" => DATA <= x"03ff";
when "11" & x"41d" => DATA <= x"c00f";
when "11" & x"41e" => DATA <= x"fa00";
when "11" & x"41f" => DATA <= x"e7ee";
when "11" & x"420" => DATA <= x"0005";
when "11" & x"421" => DATA <= x"7130";
when "11" & x"422" => DATA <= x"13e1";
when "11" & x"423" => DATA <= x"f0f7";
when "11" & x"424" => DATA <= x"0fa7";
when "11" & x"425" => DATA <= x"c3e4";
when "11" & x"426" => DATA <= x"5a44";
when "11" & x"427" => DATA <= x"2011";
when "11" & x"428" => DATA <= x"6934";
when "11" & x"429" => DATA <= x"0b5f";
when "11" & x"42a" => DATA <= x"f2fe";
when "11" & x"42b" => DATA <= x"7e3f";
when "11" & x"42c" => DATA <= x"f009";
when "11" & x"42d" => DATA <= x"cd26";
when "11" & x"42e" => DATA <= x"c329";
when "11" & x"42f" => DATA <= x"9ec4";
when "11" & x"430" => DATA <= x"1480";
when "11" & x"431" => DATA <= x"912c";
when "11" & x"432" => DATA <= x"1918";
when "11" & x"433" => DATA <= x"0000";
when "11" & x"434" => DATA <= x"1500";
when "11" & x"435" => DATA <= x"3dc8";
when "11" & x"436" => DATA <= x"4020";
when "11" & x"437" => DATA <= x"2023";
when "11" & x"438" => DATA <= x"801f";
when "11" & x"439" => DATA <= x"ede1";
when "11" & x"43a" => DATA <= x"0000";
when "11" & x"43b" => DATA <= x"1140";
when "11" & x"43c" => DATA <= x"0087";
when "11" & x"43d" => DATA <= x"f800";
when "11" & x"43e" => DATA <= x"0209";
when "11" & x"43f" => DATA <= x"1087";
when "11" & x"440" => DATA <= x"0e08";
when "11" & x"441" => DATA <= x"a25a";
when "11" & x"442" => DATA <= x"91c8";
when "11" & x"443" => DATA <= x"05e0";
when "11" & x"444" => DATA <= x"009a";
when "11" & x"445" => DATA <= x"71c6";
when "11" & x"446" => DATA <= x"011f";
when "11" & x"447" => DATA <= x"3803";
when "11" & x"448" => DATA <= x"080a";
when "11" & x"449" => DATA <= x"00af";
when "11" & x"44a" => DATA <= x"f3f8";
when "11" & x"44b" => DATA <= x"6000";
when "11" & x"44c" => DATA <= x"f7a0";
when "11" & x"44d" => DATA <= x"0aff";
when "11" & x"44e" => DATA <= x"e007";
when "11" & x"44f" => DATA <= x"bd00";
when "11" & x"450" => DATA <= x"57ff";
when "11" & x"451" => DATA <= x"003f";
when "11" & x"452" => DATA <= x"e800";
when "11" & x"453" => DATA <= x"3eff";
when "11" & x"454" => DATA <= x"6614";
when "11" & x"455" => DATA <= x"1000";
when "11" & x"456" => DATA <= x"e36b";
when "11" & x"457" => DATA <= x"8100";
when "11" & x"458" => DATA <= x"0000";
when "11" & x"459" => DATA <= x"8ec3";
when "11" & x"45a" => DATA <= x"e782";
when "11" & x"45b" => DATA <= x"c02c";
when "11" & x"45c" => DATA <= x"6214";
when "11" & x"45d" => DATA <= x"6000";
when "11" & x"45e" => DATA <= x"0049";
when "11" & x"45f" => DATA <= x"2090";
when "11" & x"460" => DATA <= x"1cc4";
when "11" & x"461" => DATA <= x"667f";
when "11" & x"462" => DATA <= x"bf81";
when "11" & x"463" => DATA <= x"04d0";
when "11" & x"464" => DATA <= x"0831";
when "11" & x"465" => DATA <= x"1880";
when "11" & x"466" => DATA <= x"0302";
when "11" & x"467" => DATA <= x"1015";
when "11" & x"468" => DATA <= x"8087";
when "11" & x"469" => DATA <= x"4b8b";
when "11" & x"46a" => DATA <= x"df80";
when "11" & x"46b" => DATA <= x"00f0";
when "11" & x"46c" => DATA <= x"01e0";
when "11" & x"46d" => DATA <= x"000f";
when "11" & x"46e" => DATA <= x"801f";
when "11" & x"46f" => DATA <= x"e000";
when "11" & x"470" => DATA <= x"6230";
when "11" & x"471" => DATA <= x"1f5f";
when "11" & x"472" => DATA <= x"85c1";
when "11" & x"473" => DATA <= x"fd00";
when "11" & x"474" => DATA <= x"5603";
when "11" & x"475" => DATA <= x"1c02";
when "11" & x"476" => DATA <= x"8007";
when "11" & x"477" => DATA <= x"7002";
when "11" & x"478" => DATA <= x"812c";
when "11" & x"479" => DATA <= x"0103";
when "11" & x"47a" => DATA <= x"1010";
when "11" & x"47b" => DATA <= x"000a";
when "11" & x"47c" => DATA <= x"405b";
when "11" & x"47d" => DATA <= x"a103";
when "11" & x"47e" => DATA <= x"0010";
when "11" & x"47f" => DATA <= x"9000";
when "11" & x"480" => DATA <= x"1800";
when "11" & x"481" => DATA <= x"7f85";
when "11" & x"482" => DATA <= x"8a1c";
when "11" & x"483" => DATA <= x"0040";
when "11" & x"484" => DATA <= x"001f";
when "11" & x"485" => DATA <= x"d834";
when "11" & x"486" => DATA <= x"0009";
when "11" & x"487" => DATA <= x"e003";
when "11" & x"488" => DATA <= x"e001";
when "11" & x"489" => DATA <= x"0481";
when "11" & x"48a" => DATA <= x"4150";
when "11" & x"48b" => DATA <= x"01f9";
when "11" & x"48c" => DATA <= x"8000";
when "11" & x"48d" => DATA <= x"6010";
when "11" & x"48e" => DATA <= x"041c";
when "11" & x"48f" => DATA <= x"0080";
when "11" & x"490" => DATA <= x"a40a";
when "11" & x"491" => DATA <= x"c0a0";
when "11" & x"492" => DATA <= x"8025";
when "11" & x"493" => DATA <= x"00f8";
when "11" & x"494" => DATA <= x"0680";
when "11" & x"495" => DATA <= x"0a29";
when "11" & x"496" => DATA <= x"0011";
when "11" & x"497" => DATA <= x"4008";
when "11" & x"498" => DATA <= x"0001";
when "11" & x"499" => DATA <= x"0000";
when "11" & x"49a" => DATA <= x"2504";
when "11" & x"49b" => DATA <= x"5091";
when "11" & x"49c" => DATA <= x"8800";
when "11" & x"49d" => DATA <= x"0d4c";
when "11" & x"49e" => DATA <= x"0000";
when "11" & x"49f" => DATA <= x"5400";
when "11" & x"4a0" => DATA <= x"1800";
when "11" & x"4a1" => DATA <= x"1028";
when "11" & x"4a2" => DATA <= x"0011";
when "11" & x"4a3" => DATA <= x"4001";
when "11" & x"4a4" => DATA <= x"8001";
when "11" & x"4a5" => DATA <= x"4802";
when "11" & x"4a6" => DATA <= x"0030";
when "11" & x"4a7" => DATA <= x"0000";
when "11" & x"4a8" => DATA <= x"4080";
when "11" & x"4a9" => DATA <= x"0014";
when "11" & x"4aa" => DATA <= x"10d0";
when "11" & x"4ab" => DATA <= x"6701";
when "11" & x"4ac" => DATA <= x"2800";
when "11" & x"4ad" => DATA <= x"0408";
when "11" & x"4ae" => DATA <= x"5829";
when "11" & x"4af" => DATA <= x"122a";
when "11" & x"4b0" => DATA <= x"8640";
when "11" & x"4b1" => DATA <= x"02bc";
when "11" & x"4b2" => DATA <= x"3bfd";
when "11" & x"4b3" => DATA <= x"c0c0";
when "11" & x"4b4" => DATA <= x"0170";
when "11" & x"4b5" => DATA <= x"f83c";
when "11" & x"4b6" => DATA <= x"3e0f";
when "11" & x"4b7" => DATA <= x"7f80";
when "11" & x"4b8" => DATA <= x"121a";
when "11" & x"4b9" => DATA <= x"003f";
when "11" & x"4ba" => DATA <= x"1c02";
when "11" & x"4bb" => DATA <= x"bc00";
when "11" & x"4bc" => DATA <= x"0200";
when "11" & x"4bd" => DATA <= x"00e8";
when "11" & x"4be" => DATA <= x"00c0";
when "11" & x"4bf" => DATA <= x"0020";
when "11" & x"4c0" => DATA <= x"f00b";
when "11" & x"4c1" => DATA <= x"0003";
when "11" & x"4c2" => DATA <= x"0000";
when "11" & x"4c3" => DATA <= x"8f04";
when "11" & x"4c4" => DATA <= x"8143";
when "11" & x"4c5" => DATA <= x"4028";
when "11" & x"4c6" => DATA <= x"0c00";
when "11" & x"4c7" => DATA <= x"027f";
when "11" & x"4c8" => DATA <= x"1c69";
when "11" & x"4c9" => DATA <= x"c000";
when "11" & x"4ca" => DATA <= x"e0a0";
when "11" & x"4cb" => DATA <= x"07fd";
when "11" & x"4cc" => DATA <= x"0010";
when "11" & x"4cd" => DATA <= x"1c0b";
when "11" & x"4ce" => DATA <= x"7700";
when "11" & x"4cf" => DATA <= x"01fe";
when "11" & x"4d0" => DATA <= x"086c";
when "11" & x"4d1" => DATA <= x"aa5f";
when "11" & x"4d2" => DATA <= x"c061";
when "11" & x"4d3" => DATA <= x"f861";
when "11" & x"4d4" => DATA <= x"fe1c";
when "11" & x"4d5" => DATA <= x"e1f3";
when "11" & x"4d6" => DATA <= x"e074";
when "11" & x"4d7" => DATA <= x"3c1f";
when "11" & x"4d8" => DATA <= x"a000";
when "11" & x"4d9" => DATA <= x"1000";
when "11" & x"4da" => DATA <= x"91a0";
when "11" & x"4db" => DATA <= x"0420";
when "11" & x"4dc" => DATA <= x"0203";
when "11" & x"4dd" => DATA <= x"c02c";
when "11" & x"4de" => DATA <= x"0012";
when "11" & x"4df" => DATA <= x"0023";
when "11" & x"4e0" => DATA <= x"0424";
when "11" & x"4e1" => DATA <= x"0006";
when "11" & x"4e2" => DATA <= x"0840";
when "11" & x"4e3" => DATA <= x"d000";
when "11" & x"4e4" => DATA <= x"9070";
when "11" & x"4e5" => DATA <= x"0003";
when "11" & x"4e6" => DATA <= x"040a";
when "11" & x"4e7" => DATA <= x"0000";
when "11" & x"4e8" => DATA <= x"880c";
when "11" & x"4e9" => DATA <= x"10c0";
when "11" & x"4ea" => DATA <= x"a004";
when "11" & x"4eb" => DATA <= x"8001";
when "11" & x"4ec" => DATA <= x"8140";
when "11" & x"4ed" => DATA <= x"0294";
when "11" & x"4ee" => DATA <= x"0000";
when "11" & x"4ef" => DATA <= x"4003";
when "11" & x"4f0" => DATA <= x"0e3b";
when "11" & x"4f1" => DATA <= x"0001";
when "11" & x"4f2" => DATA <= x"1d00";
when "11" & x"4f3" => DATA <= x"0380";
when "11" & x"4f4" => DATA <= x"1412";
when "11" & x"4f5" => DATA <= x"0004";
when "11" & x"4f6" => DATA <= x"9006";
when "11" & x"4f7" => DATA <= x"0391";
when "11" & x"4f8" => DATA <= x"48e2";
when "11" & x"4f9" => DATA <= x"602e";
when "11" & x"4fa" => DATA <= x"aaed";
when "11" & x"4fb" => DATA <= x"7b5d";
when "11" & x"4fc" => DATA <= x"d4dd";
when "11" & x"4fd" => DATA <= x"2aa5";
when "11" & x"4fe" => DATA <= x"77ed";
when "11" & x"4ff" => DATA <= x"2ab5";
when "11" & x"500" => DATA <= x"52ad";
when "11" & x"501" => DATA <= x"54ad";
when "11" & x"502" => DATA <= x"6aaf";
when "11" & x"503" => DATA <= x"deaa";
when "11" & x"504" => DATA <= x"957c";
when "11" & x"505" => DATA <= x"d5aa";
when "11" & x"506" => DATA <= x"5755";
when "11" & x"507" => DATA <= x"5482";
when "11" & x"508" => DATA <= x"40d5";
when "11" & x"509" => DATA <= x"5229";
when "11" & x"50a" => DATA <= x"1677";
when "11" & x"50b" => DATA <= x"f7f0";
when "11" & x"50c" => DATA <= x"0205";
when "11" & x"50d" => DATA <= x"8b40";
when "11" & x"50e" => DATA <= x"002e";
when "11" & x"50f" => DATA <= x"0040";
when "11" & x"510" => DATA <= x"3fdf";
when "11" & x"511" => DATA <= x"804a";
when "11" & x"512" => DATA <= x"0002";
when "11" & x"513" => DATA <= x"0001";
when "11" & x"514" => DATA <= x"e8f4";
when "11" & x"515" => DATA <= x"1d40";
when "11" & x"516" => DATA <= x"0010";
when "11" & x"517" => DATA <= x"0e00";
when "11" & x"518" => DATA <= x"07ff";
when "11" & x"519" => DATA <= x"b82f";
when "11" & x"51a" => DATA <= x"ffc0";
when "11" & x"51b" => DATA <= x"403e";
when "11" & x"51c" => DATA <= x"0000";
when "11" & x"51d" => DATA <= x"dff0";
when "11" & x"51e" => DATA <= x"3800";
when "11" & x"51f" => DATA <= x"09d7";
when "11" & x"520" => DATA <= x"e3f0";
when "11" & x"521" => DATA <= x"0800";
when "11" & x"522" => DATA <= x"603e";
when "11" & x"523" => DATA <= x"003f";
when "11" & x"524" => DATA <= x"cff4";
when "11" & x"525" => DATA <= x"00fc";
when "11" & x"526" => DATA <= x"e003";
when "11" & x"527" => DATA <= x"fbe0";
when "11" & x"528" => DATA <= x"00fc";
when "11" & x"529" => DATA <= x"7fd0";
when "11" & x"52a" => DATA <= x"0560";
when "11" & x"52b" => DATA <= x"381c";
when "11" & x"52c" => DATA <= x"6e76";
when "11" & x"52d" => DATA <= x"7b98";
when "11" & x"52e" => DATA <= x"001f";
when "11" & x"52f" => DATA <= x"0f05";
when "11" & x"530" => DATA <= x"d3e1";
when "11" & x"531" => DATA <= x"b0fa";
when "11" & x"532" => DATA <= x"7c3c";
when "11" & x"533" => DATA <= x"4423";
when "11" & x"534" => DATA <= x"7229";
when "11" & x"535" => DATA <= x"0088";
when "11" & x"536" => DATA <= x"45f7";
when "11" & x"537" => DATA <= x"f3e9";
when "11" & x"538" => DATA <= x"ce8c";
when "11" & x"539" => DATA <= x"d67c";
when "11" & x"53a" => DATA <= x"a6d3";
when "11" & x"53b" => DATA <= x"001c";
when "11" & x"53c" => DATA <= x"000e";
when "11" & x"53d" => DATA <= x"b09d";
when "11" & x"53e" => DATA <= x"0080";
when "11" & x"53f" => DATA <= x"0640";
when "11" & x"540" => DATA <= x"1000";
when "11" & x"541" => DATA <= x"3e80";
when "11" & x"542" => DATA <= x"1000";
when "11" & x"543" => DATA <= x"02b5";
when "11" & x"544" => DATA <= x"0020";
when "11" & x"545" => DATA <= x"2800";
when "11" & x"546" => DATA <= x"8000";
when "11" & x"547" => DATA <= x"193f";
when "11" & x"548" => DATA <= x"8026";
when "11" & x"549" => DATA <= x"1070";
when "11" & x"54a" => DATA <= x"0041";
when "11" & x"54b" => DATA <= x"4000";
when "11" & x"54c" => DATA <= x"f7e1";
when "11" & x"54d" => DATA <= x"8418";
when "11" & x"54e" => DATA <= x"0018";
when "11" & x"54f" => DATA <= x"5003";
when "11" & x"550" => DATA <= x"f07e";
when "11" & x"551" => DATA <= x"3001";
when "11" & x"552" => DATA <= x"8002";
when "11" & x"553" => DATA <= x"1400";
when "11" & x"554" => DATA <= x"2b00";
when "11" & x"555" => DATA <= x"0f3c";
when "11" & x"556" => DATA <= x"0000";
when "11" & x"557" => DATA <= x"0840";
when "11" & x"558" => DATA <= x"7800";
when "11" & x"559" => DATA <= x"0100";
when "11" & x"55a" => DATA <= x"0840";
when "11" & x"55b" => DATA <= x"0084";
when "11" & x"55c" => DATA <= x"0040";
when "11" & x"55d" => DATA <= x"9822";
when "11" & x"55e" => DATA <= x"a25b";
when "11" & x"55f" => DATA <= x"440a";
when "11" & x"560" => DATA <= x"c064";
when "11" & x"561" => DATA <= x"3380";
when "11" & x"562" => DATA <= x"6470";
when "11" & x"563" => DATA <= x"0018";
when "11" & x"564" => DATA <= x"661f";
when "11" & x"565" => DATA <= x"aff0";
when "11" & x"566" => DATA <= x"00a2";
when "11" & x"567" => DATA <= x"402b";
when "11" & x"568" => DATA <= x"fd00";
when "11" & x"569" => DATA <= x"de7c";
when "11" & x"56a" => DATA <= x"7003";
when "11" & x"56b" => DATA <= x"fc02";
when "11" & x"56c" => DATA <= x"c13f";
when "11" & x"56d" => DATA <= x"f000";
when "11" & x"56e" => DATA <= x"2d32";
when "11" & x"56f" => DATA <= x"010f";
when "11" & x"570" => DATA <= x"8528";
when "11" & x"571" => DATA <= x"003c";
when "11" & x"572" => DATA <= x"0000";
when "11" & x"573" => DATA <= x"851f";
when "11" & x"574" => DATA <= x"c90a";
when "11" & x"575" => DATA <= x"007e";
when "11" & x"576" => DATA <= x"802a";
when "11" & x"577" => DATA <= x"01a2";
when "11" & x"578" => DATA <= x"ff40";
when "11" & x"579" => DATA <= x"0001";
when "11" & x"57a" => DATA <= x"e706";
when "11" & x"57b" => DATA <= x"0d00";
when "11" & x"57c" => DATA <= x"07c0";
when "11" & x"57d" => DATA <= x"e04a";
when "11" & x"57e" => DATA <= x"0001";
when "11" & x"57f" => DATA <= x"8008";
when "11" & x"580" => DATA <= x"880e";
when "11" & x"581" => DATA <= x"0008";
when "11" & x"582" => DATA <= x"0010";
when "11" & x"583" => DATA <= x"ef80";
when "11" & x"584" => DATA <= x"0015";
when "11" & x"585" => DATA <= x"83c0";
when "11" & x"586" => DATA <= x"0072";
when "11" & x"587" => DATA <= x"980c";
when "11" & x"588" => DATA <= x"10c0";
when "11" & x"589" => DATA <= x"e003";
when "11" & x"58a" => DATA <= x"8008";
when "11" & x"58b" => DATA <= x"0080";
when "11" & x"58c" => DATA <= x"7fd0";
when "11" & x"58d" => DATA <= x"013d";
when "11" & x"58e" => DATA <= x"9e8f";
when "11" & x"58f" => DATA <= x"0030";
when "11" & x"590" => DATA <= x"5ff4";
when "11" & x"591" => DATA <= x"0141";
when "11" & x"592" => DATA <= x"23b0";
when "11" & x"593" => DATA <= x"0381";
when "11" & x"594" => DATA <= x"fec0";
when "11" & x"595" => DATA <= x"2002";
when "11" & x"596" => DATA <= x"000c";
when "11" & x"597" => DATA <= x"8207";
when "11" & x"598" => DATA <= x"0000";
when "11" & x"599" => DATA <= x"c300";
when "11" & x"59a" => DATA <= x"02ef";
when "11" & x"59b" => DATA <= x"8000";
when "11" & x"59c" => DATA <= x"6402";
when "11" & x"59d" => DATA <= x"9802";
when "11" & x"59e" => DATA <= x"0006";
when "11" & x"59f" => DATA <= x"04c0";
when "11" & x"5a0" => DATA <= x"7000";
when "11" & x"5a1" => DATA <= x"1fc0";
when "11" & x"5a2" => DATA <= x"3400";
when "11" & x"5a3" => DATA <= x"0460";
when "11" & x"5a4" => DATA <= x"a000";
when "11" & x"5a5" => DATA <= x"8700";
when "11" & x"5a6" => DATA <= x"0874";
when "11" & x"5a7" => DATA <= x"0005";
when "11" & x"5a8" => DATA <= x"4004";
when "11" & x"5a9" => DATA <= x"f405";
when "11" & x"5aa" => DATA <= x"8010";
when "11" & x"5ab" => DATA <= x"3400";
when "11" & x"5ac" => DATA <= x"05e0";
when "11" & x"5ad" => DATA <= x"1200";
when "11" & x"5ae" => DATA <= x"04a3";
when "11" & x"5af" => DATA <= x"87c1";
when "11" & x"5b0" => DATA <= x"82c0";
when "11" & x"5b1" => DATA <= x"1fe5";
when "11" & x"5b2" => DATA <= x"8d00";
when "11" & x"5b3" => DATA <= x"083f";
when "11" & x"5b4" => DATA <= x"dbfa";
when "11" & x"5b5" => DATA <= x"0010";
when "11" & x"5b6" => DATA <= x"7faf";
when "11" & x"5b7" => DATA <= x"ec01";
when "11" & x"5b8" => DATA <= x"fe10";
when "11" & x"5b9" => DATA <= x"e080";
when "11" & x"5ba" => DATA <= x"0570";
when "11" & x"5bb" => DATA <= x"3ff4";
when "11" & x"5bc" => DATA <= x"00be";
when "11" & x"5bd" => DATA <= x"ac38";
when "11" & x"5be" => DATA <= x"6803";
when "11" & x"5bf" => DATA <= x"e063";
when "11" & x"5c0" => DATA <= x"600e";
when "11" & x"5c1" => DATA <= x"f575";
when "11" & x"5c2" => DATA <= x"8000";
when "11" & x"5c3" => DATA <= x"db76";
when "11" & x"5c4" => DATA <= x"00cf";
when "11" & x"5c5" => DATA <= x"0700";
when "11" & x"5c6" => DATA <= x"1012";
when "11" & x"5c7" => DATA <= x"0017";
when "11" & x"5c8" => DATA <= x"0f00";
when "11" & x"5c9" => DATA <= x"0040";
when "11" & x"5ca" => DATA <= x"0025";
when "11" & x"5cb" => DATA <= x"0001";
when "11" & x"5cc" => DATA <= x"9880";
when "11" & x"5cd" => DATA <= x"0008";
when "11" & x"5ce" => DATA <= x"0007";
when "11" & x"5cf" => DATA <= x"4004";
when "11" & x"5d0" => DATA <= x"43e2";
when "11" & x"5d1" => DATA <= x"5280";
when "11" & x"5d2" => DATA <= x"020a";
when "11" & x"5d3" => DATA <= x"9003";
when "11" & x"5d4" => DATA <= x"05f6";
when "11" & x"5d5" => DATA <= x"f2e0";
when "11" & x"5d6" => DATA <= x"0008";
when "11" & x"5d7" => DATA <= x"01c8";
when "11" & x"5d8" => DATA <= x"ff53";
when "11" & x"5d9" => DATA <= x"f003";
when "11" & x"5da" => DATA <= x"0030";
when "11" & x"5db" => DATA <= x"017f";
when "11" & x"5dc" => DATA <= x"9958";
when "11" & x"5dd" => DATA <= x"0100";
when "11" & x"5de" => DATA <= x"f80e";
when "11" & x"5df" => DATA <= x"801f";
when "11" & x"5e0" => DATA <= x"e1f9";
when "11" & x"5e1" => DATA <= x"0000";
when "11" & x"5e2" => DATA <= x"b428";
when "11" & x"5e3" => DATA <= x"01b9";
when "11" & x"5e4" => DATA <= x"2000";
when "11" & x"5e5" => DATA <= x"fa00";
when "11" & x"5e6" => DATA <= x"6348";
when "11" & x"5e7" => DATA <= x"0202";
when "11" & x"5e8" => DATA <= x"8000";
when "11" & x"5e9" => DATA <= x"8800";
when "11" & x"5ea" => DATA <= x"002c";
when "11" & x"5eb" => DATA <= x"01dc";
when "11" & x"5ec" => DATA <= x"0804";
when "11" & x"5ed" => DATA <= x"8341";
when "11" & x"5ee" => DATA <= x"00d0";
when "11" & x"5ef" => DATA <= x"aee2";
when "11" & x"5f0" => DATA <= x"71ba";
when "11" & x"5f1" => DATA <= x"938d";
when "11" & x"5f2" => DATA <= x"e6e2";
when "11" & x"5f3" => DATA <= x"bfaa";
when "11" & x"5f4" => DATA <= x"dfab";
when "11" & x"5f5" => DATA <= x"94ca";
when "11" & x"5f6" => DATA <= x"caba";
when "11" & x"5f7" => DATA <= x"a75a";
when "11" & x"5f8" => DATA <= x"a914";
when "11" & x"5f9" => DATA <= x"8041";
when "11" & x"5fa" => DATA <= x"2a95";
when "11" & x"5fb" => DATA <= x"6aa5";
when "11" & x"5fc" => DATA <= x"5fbf";
when "11" & x"5fd" => DATA <= x"9ff8";
when "11" & x"5fe" => DATA <= x"018a";
when "11" & x"5ff" => DATA <= x"c10c";
when "11" & x"600" => DATA <= x"57c0";
when "11" & x"601" => DATA <= x"11b0";
when "11" & x"602" => DATA <= x"fc7f";
when "11" & x"603" => DATA <= x"80c0";
when "11" & x"604" => DATA <= x"0c77";
when "11" & x"605" => DATA <= x"fa01";
when "11" & x"606" => DATA <= x"0881";
when "11" & x"607" => DATA <= x"4781";
when "11" & x"608" => DATA <= x"c003";
when "11" & x"609" => DATA <= x"fdff";
when "11" & x"60a" => DATA <= x"7dd0";
when "11" & x"60b" => DATA <= x"033f";
when "11" & x"60c" => DATA <= x"7fda";
when "11" & x"60d" => DATA <= x"0fb7";
when "11" & x"60e" => DATA <= x"9f80";
when "11" & x"60f" => DATA <= x"807c";
when "11" & x"610" => DATA <= x"0000";
when "11" & x"611" => DATA <= x"e076";
when "11" & x"612" => DATA <= x"77fb";
when "11" & x"613" => DATA <= x"bebf";
when "11" & x"614" => DATA <= x"ecf9";
when "11" & x"615" => DATA <= x"7e0f";
when "11" & x"616" => DATA <= x"0008";
when "11" & x"617" => DATA <= x"a802";
when "11" & x"618" => DATA <= x"bf10";
when "11" & x"619" => DATA <= x"3400";
when "11" & x"61a" => DATA <= x"04a0";
when "11" & x"61b" => DATA <= x"0aff";
when "11" & x"61c" => DATA <= x"401e";
when "11" & x"61d" => DATA <= x"1c0e";
when "11" & x"61e" => DATA <= x"1603";
when "11" & x"61f" => DATA <= x"b99e";
when "11" & x"620" => DATA <= x"c773";
when "11" & x"621" => DATA <= x"b838";
when "11" & x"622" => DATA <= x"7d3e";
when "11" & x"623" => DATA <= x"1f0d";
when "11" & x"624" => DATA <= x"a7c3";
when "11" & x"625" => DATA <= x"e052";
when "11" & x"626" => DATA <= x"2904";
when "11" & x"627" => DATA <= x"8000";
when "11" & x"628" => DATA <= x"2211";
when "11" & x"629" => DATA <= x"4892";
when "11" & x"62a" => DATA <= x"fb3f";
when "11" & x"62b" => DATA <= x"bda6";
when "11" & x"62c" => DATA <= x"e573";
when "11" & x"62d" => DATA <= x"3d8c";
when "11" & x"62e" => DATA <= x"c7ea";
when "11" & x"62f" => DATA <= x"0020";
when "11" & x"630" => DATA <= x"adc9";
when "11" & x"631" => DATA <= x"8ff0";
when "11" & x"632" => DATA <= x"02ce";
when "11" & x"633" => DATA <= x"8000";
when "11" & x"634" => DATA <= x"4af1";
when "11" & x"635" => DATA <= x"33fc";
when "11" & x"636" => DATA <= x"00d9";
when "11" & x"637" => DATA <= x"a004";
when "11" & x"638" => DATA <= x"0b7d";
when "11" & x"639" => DATA <= x"66ff";
when "11" & x"63a" => DATA <= x"0033";
when "11" & x"63b" => DATA <= x"3800";
when "11" & x"63c" => DATA <= x"de99";
when "11" & x"63d" => DATA <= x"7f80";
when "11" & x"63e" => DATA <= x"04dc";
when "11" & x"63f" => DATA <= x"00b3";
when "11" & x"640" => DATA <= x"263f";
when "11" & x"641" => DATA <= x"c00b";
when "11" & x"642" => DATA <= x"3e00";
when "11" & x"643" => DATA <= x"6a99";
when "11" & x"644" => DATA <= x"9fe0";
when "11" & x"645" => DATA <= x"04cf";
when "11" & x"646" => DATA <= x"001e";
when "11" & x"647" => DATA <= x"866f";
when "11" & x"648" => DATA <= x"f003";
when "11" & x"649" => DATA <= x"3400";
when "11" & x"64a" => DATA <= x"6000";
when "11" & x"64b" => DATA <= x"1b53";
when "11" & x"64c" => DATA <= x"2ff0";
when "11" & x"64d" => DATA <= x"0198";
when "11" & x"64e" => DATA <= x"0004";
when "11" & x"64f" => DATA <= x"1037";
when "11" & x"650" => DATA <= x"8d8f";
when "11" & x"651" => DATA <= x"f001";
when "11" & x"652" => DATA <= x"be80";
when "11" & x"653" => DATA <= x"0807";
when "11" & x"654" => DATA <= x"f613";
when "11" & x"655" => DATA <= x"fc00";
when "11" & x"656" => DATA <= x"fe00";
when "11" & x"657" => DATA <= x"3418";
when "11" & x"658" => DATA <= x"0ef0";
when "11" & x"659" => DATA <= x"b3fc";
when "11" & x"65a" => DATA <= x"00b6";
when "11" & x"65b" => DATA <= x"2850";
when "11" & x"65c" => DATA <= x"03fd";
when "11" & x"65d" => DATA <= x"f0ff";
when "11" & x"65e" => DATA <= x"0024";
when "11" & x"65f" => DATA <= x"4000";
when "11" & x"660" => DATA <= x"8243";
when "11" & x"661" => DATA <= x"fdde";
when "11" & x"662" => DATA <= x"1d7c";
when "11" & x"663" => DATA <= x"00c0";
when "11" & x"664" => DATA <= x"0040";
when "11" & x"665" => DATA <= x"3365";
when "11" & x"666" => DATA <= x"fefe";
when "11" & x"667" => DATA <= x"6f85";
when "11" & x"668" => DATA <= x"4042";
when "11" & x"669" => DATA <= x"0002";
when "11" & x"66a" => DATA <= x"ffbf";
when "11" & x"66b" => DATA <= x"f801";
when "11" & x"66c" => DATA <= x"00f7";
when "11" & x"66d" => DATA <= x"5fbf";
when "11" & x"66e" => DATA <= x"d7f2";
when "11" & x"66f" => DATA <= x"00fe";
when "11" & x"670" => DATA <= x"7d8f";
when "11" & x"671" => DATA <= x"dbe0";
when "11" & x"672" => DATA <= x"07e0";
when "11" & x"673" => DATA <= x"0c04";
when "11" & x"674" => DATA <= x"ff7d";
when "11" & x"675" => DATA <= x"bf03";
when "11" & x"676" => DATA <= x"8001";
when "11" & x"677" => DATA <= x"7811";
when "11" & x"678" => DATA <= x"00d7";
when "11" & x"679" => DATA <= x"7bb3";
when "11" & x"67a" => DATA <= x"e800";
when "11" & x"67b" => DATA <= x"04cc";
when "11" & x"67c" => DATA <= x"003f";
when "11" & x"67d" => DATA <= x"dfcf";
when "11" & x"67e" => DATA <= x"b3e5";
when "11" & x"67f" => DATA <= x"0004";
when "11" & x"680" => DATA <= x"060f";
when "11" & x"681" => DATA <= x"daff";
when "11" & x"682" => DATA <= x"77d0";
when "11" & x"683" => DATA <= x"0081";
when "11" & x"684" => DATA <= x"467f";
when "11" & x"685" => DATA <= x"7f83";
when "11" & x"686" => DATA <= x"dff4";
when "11" & x"687" => DATA <= x"00aa";
when "11" & x"688" => DATA <= x"59d7";
when "11" & x"689" => DATA <= x"f805";
when "11" & x"68a" => DATA <= x"de00";
when "11" & x"68b" => DATA <= x"782e";
when "11" & x"68c" => DATA <= x"1166";
when "11" & x"68d" => DATA <= x"b7f0";
when "11" & x"68e" => DATA <= x"01ee";
when "11" & x"68f" => DATA <= x"007f";
when "11" & x"690" => DATA <= x"b058";
when "11" & x"691" => DATA <= x"0fe7";
when "11" & x"692" => DATA <= x"f801";
when "11" & x"693" => DATA <= x"ea00";
when "11" & x"694" => DATA <= x"7fb7";
when "11" & x"695" => DATA <= x"0a0f";
when "11" & x"696" => DATA <= x"f6f8";
when "11" & x"697" => DATA <= x"01fe";
when "11" & x"698" => DATA <= x"007f";
when "11" & x"699" => DATA <= x"d003";
when "11" & x"69a" => DATA <= x"fdfc";
when "11" & x"69b" => DATA <= x"007f";
when "11" & x"69c" => DATA <= x"8018";
when "11" & x"69d" => DATA <= x"0011";
when "11" & x"69e" => DATA <= x"057f";
when "11" & x"69f" => DATA <= x"8017";
when "11" & x"6a0" => DATA <= x"f400";
when "11" & x"6a1" => DATA <= x"0200";
when "11" & x"6a2" => DATA <= x"d7f8";
when "11" & x"6a3" => DATA <= x"01fc";
when "11" & x"6a4" => DATA <= x"40e0";
when "11" & x"6a5" => DATA <= x"0aff";
when "11" & x"6a6" => DATA <= x"003f";
when "11" & x"6a7" => DATA <= x"f800";
when "11" & x"6a8" => DATA <= x"415f";
when "11" & x"6a9" => DATA <= x"e007";
when "11" & x"6aa" => DATA <= x"ff00";
when "11" & x"6ab" => DATA <= x"006b";
when "11" & x"6ac" => DATA <= x"fc00";
when "11" & x"6ad" => DATA <= x"ffe0";
when "11" & x"6ae" => DATA <= x"0013";
when "11" & x"6af" => DATA <= x"fd06";
when "11" & x"6b0" => DATA <= x"005f";
when "11" & x"6b1" => DATA <= x"d010";
when "11" & x"6b2" => DATA <= x"00e0";
when "11" & x"6b3" => DATA <= x"ff04";
when "11" & x"6b4" => DATA <= x"a013";
when "11" & x"6b5" => DATA <= x"e000";
when "11" & x"6b6" => DATA <= x"6044";
when "11" & x"6b7" => DATA <= x"8cff";
when "11" & x"6b8" => DATA <= x"1980";
when "11" & x"6b9" => DATA <= x"1f7c";
when "11" & x"6ba" => DATA <= x"0050";
when "11" & x"6bb" => DATA <= x"7f80";
when "11" & x"6bc" => DATA <= x"080c";
when "11" & x"6bd" => DATA <= x"fe00";
when "11" & x"6be" => DATA <= x"0237";
when "11" & x"6bf" => DATA <= x"c60f";
when "11" & x"6c0" => DATA <= x"800b";
when "11" & x"6c1" => DATA <= x"2380";
when "11" & x"6c2" => DATA <= x"1d89";
when "11" & x"6c3" => DATA <= x"97f8";
when "11" & x"6c4" => DATA <= x"00c9";
when "11" & x"6c5" => DATA <= x"4002";
when "11" & x"6c6" => DATA <= x"03b3";
when "11" & x"6c7" => DATA <= x"25fe";
when "11" & x"6c8" => DATA <= x"0019";
when "11" & x"6c9" => DATA <= x"5000";
when "11" & x"6ca" => DATA <= x"8176";
when "11" & x"6cb" => DATA <= x"647f";
when "11" & x"6cc" => DATA <= x"8013";
when "11" & x"6cd" => DATA <= x"6800";
when "11" & x"6ce" => DATA <= x"0161";
when "11" & x"6cf" => DATA <= x"fe56";
when "11" & x"6d0" => DATA <= x"7fbc";
when "11" & x"6d1" => DATA <= x"08b4";
when "11" & x"6d2" => DATA <= x"00ad";
when "11" & x"6d3" => DATA <= x"1ab2";
when "11" & x"6d4" => DATA <= x"5bef";
when "11" & x"6d5" => DATA <= x"f23d";
when "11" & x"6d6" => DATA <= x"0001";
when "11" & x"6d7" => DATA <= x"9fe8";
when "11" & x"6d8" => DATA <= x"47fb";
when "11" & x"6d9" => DATA <= x"3803";
when "11" & x"6da" => DATA <= x"c00f";
when "11" & x"6db" => DATA <= x"f093";
when "11" & x"6dc" => DATA <= x"cd77";
when "11" & x"6dd" => DATA <= x"c000";
when "11" & x"6de" => DATA <= x"44a8";
when "11" & x"6df" => DATA <= x"90fe";
when "11" & x"6e0" => DATA <= x"fb00";
when "11" & x"6e1" => DATA <= x"2400";
when "11" & x"6e2" => DATA <= x"0807";
when "11" & x"6e3" => DATA <= x"e822";
when "11" & x"6e4" => DATA <= x"bfc0";
when "11" & x"6e5" => DATA <= x"0420";
when "11" & x"6e6" => DATA <= x"0045";
when "11" & x"6e7" => DATA <= x"ee00";
when "11" & x"6e8" => DATA <= x"7fbe";
when "11" & x"6e9" => DATA <= x"4000";
when "11" & x"6ea" => DATA <= x"8000";
when "11" & x"6eb" => DATA <= x"99fe";
when "11" & x"6ec" => DATA <= x"067f";
when "11" & x"6ed" => DATA <= x"bbe4";
when "11" & x"6ee" => DATA <= x"01fe";
when "11" & x"6ef" => DATA <= x"247f";
when "11" & x"6f0" => DATA <= x"bf38";
when "11" & x"6f1" => DATA <= x"0100";
when "11" & x"6f2" => DATA <= x"ff50";
when "11" & x"6f3" => DATA <= x"57ff";
when "11" & x"6f4" => DATA <= x"000e";
when "11" & x"6f5" => DATA <= x"1fe0";
when "11" & x"6f6" => DATA <= x"0aff";
when "11" & x"6f7" => DATA <= x"0000";
when "11" & x"6f8" => DATA <= x"8002";
when "11" & x"6f9" => DATA <= x"0338";
when "11" & x"6fa" => DATA <= x"01ec";
when "11" & x"6fb" => DATA <= x"7690";
when "11" & x"6fc" => DATA <= x"07f9";
when "11" & x"6fd" => DATA <= x"41fe";
when "11" & x"6fe" => DATA <= x"7fe0";
when "11" & x"6ff" => DATA <= x"0061";
when "11" & x"700" => DATA <= x"fc08";
when "11" & x"701" => DATA <= x"7f77";
when "11" & x"702" => DATA <= x"c803";
when "11" & x"703" => DATA <= x"dc00";
when "11" & x"704" => DATA <= x"fb5b";
when "11" & x"705" => DATA <= x"c803";
when "11" & x"706" => DATA <= x"6c44";
when "11" & x"707" => DATA <= x"f77f";
when "11" & x"708" => DATA <= x"f003";
when "11" & x"709" => DATA <= x"91fe";
when "11" & x"70a" => DATA <= x"007f";
when "11" & x"70b" => DATA <= x"ae40";
when "11" & x"70c" => DATA <= x"14e0";
when "11" & x"70d" => DATA <= x"7e3e";
when "11" & x"70e" => DATA <= x"802b";
when "11" & x"70f" => DATA <= x"fde0";
when "11" & x"710" => DATA <= x"0f37";
when "11" & x"711" => DATA <= x"93cd";
when "11" & x"712" => DATA <= x"eef0";
when "11" & x"713" => DATA <= x"fbfc";
when "11" & x"714" => DATA <= x"7e55";
when "11" & x"715" => DATA <= x"2a72";
when "11" & x"716" => DATA <= x"a800";
when "11" & x"717" => DATA <= x"ae00";
when "11" & x"718" => DATA <= x"3ab9";
when "11" & x"719" => DATA <= x"4ca7";
when "11" & x"71a" => DATA <= x"57aa";
when "11" & x"71b" => DATA <= x"c15e";
when "11" & x"71c" => DATA <= x"0045";
when "11" & x"71d" => DATA <= x"0294";
when "11" & x"71e" => DATA <= x"0f05";
when "11" & x"71f" => DATA <= x"331c";
when "11" & x"720" => DATA <= x"4f55";
when "11" & x"721" => DATA <= x"eb05";
when "11" & x"722" => DATA <= x"6a2d";
when "11" & x"723" => DATA <= x"56af";
when "11" & x"724" => DATA <= x"7f3a";
when "11" & x"725" => DATA <= x"48f4";
when "11" & x"726" => DATA <= x"feff";
when "11" & x"727" => DATA <= x"a7f6";
when "11" & x"728" => DATA <= x"39fc";
when "11" & x"729" => DATA <= x"0010";
when "11" & x"72a" => DATA <= x"003e";
when "11" & x"72b" => DATA <= x"c000";
when "11" & x"72c" => DATA <= x"8013";
when "11" & x"72d" => DATA <= x"e380";
when "11" & x"72e" => DATA <= x"007c";
when "11" & x"72f" => DATA <= x"00ff";
when "11" & x"730" => DATA <= x"7000";
when "11" & x"731" => DATA <= x"2a02";
when "11" & x"732" => DATA <= x"801c";
when "11" & x"733" => DATA <= x"1fff";
when "11" & x"734" => DATA <= x"5ff5";
when "11" & x"735" => DATA <= x"f77f";
when "11" & x"736" => DATA <= x"fe02";
when "11" & x"737" => DATA <= x"01f0";
when "11" & x"738" => DATA <= x"0001";
when "11" & x"739" => DATA <= x"bc0e";
when "11" & x"73a" => DATA <= x"e103";
when "11" & x"73b" => DATA <= x"b85d";
when "11" & x"73c" => DATA <= x"8ef7";
when "11" & x"73d" => DATA <= x"f801";
when "11" & x"73e" => DATA <= x"00a0";
when "11" & x"73f" => DATA <= x"5e0f";
when "11" & x"740" => DATA <= x"baf9";
when "11" & x"741" => DATA <= x"fd60";
when "11" & x"742" => DATA <= x"15ff";
when "11" & x"743" => DATA <= x"600f";
when "11" & x"744" => DATA <= x"f603";
when "11" & x"745" => DATA <= x"8001";
when "11" & x"746" => DATA <= x"5c4c";
when "11" & x"747" => DATA <= x"2703";
when "11" & x"748" => DATA <= x"003d";
when "11" & x"749" => DATA <= x"c3e9";
when "11" & x"74a" => DATA <= x"fa1f";
when "11" & x"74b" => DATA <= x"0f11";
when "11" & x"74c" => DATA <= x"081c";
when "11" & x"74d" => DATA <= x"8a05";
when "11" & x"74e" => DATA <= x"2215";
when "11" & x"74f" => DATA <= x"abf6";
when "11" & x"750" => DATA <= x"8078";
when "11" & x"751" => DATA <= x"0080";
when "11" & x"752" => DATA <= x"007f";
when "11" & x"753" => DATA <= x"bf8f";
when "11" & x"754" => DATA <= x"d3fc";
when "11" & x"755" => DATA <= x"2d5d";
when "11" & x"756" => DATA <= x"c802";
when "11" & x"757" => DATA <= x"e000";
when "11" & x"758" => DATA <= x"eb6c";
when "11" & x"759" => DATA <= x"c803";
when "11" & x"75a" => DATA <= x"7400";
when "11" & x"75b" => DATA <= x"5876";
when "11" & x"75c" => DATA <= x"4803";
when "11" & x"75d" => DATA <= x"bc00";
when "11" & x"75e" => DATA <= x"a933";
when "11" & x"75f" => DATA <= x"4801";
when "11" & x"760" => DATA <= x"f800";
when "11" & x"761" => DATA <= x"da5b";
when "11" & x"762" => DATA <= x"c802";
when "11" & x"763" => DATA <= x"fc00";
when "11" & x"764" => DATA <= x"bd4c";
when "11" & x"765" => DATA <= x"c803";
when "11" & x"766" => DATA <= x"7c00";
when "11" & x"767" => DATA <= x"7f66";
when "11" & x"768" => DATA <= x"c803";
when "11" & x"769" => DATA <= x"f400";
when "11" & x"76a" => DATA <= x"bd33";
when "11" & x"76b" => DATA <= x"4801";
when "11" & x"76c" => DATA <= x"1800";
when "11" & x"76d" => DATA <= x"563f";
when "11" & x"76e" => DATA <= x"c800";
when "11" & x"76f" => DATA <= x"4400";
when "11" & x"770" => DATA <= x"6776";
when "11" & x"771" => DATA <= x"5800";
when "11" & x"772" => DATA <= x"7477";
when "11" & x"773" => DATA <= x"6008";
when "11" & x"774" => DATA <= x"0678";
when "11" & x"775" => DATA <= x"8280";
when "11" & x"776" => DATA <= x"0400";
when "11" & x"777" => DATA <= x"0080";
when "11" & x"778" => DATA <= x"1059";
when "11" & x"779" => DATA <= x"e00f";
when "11" & x"77a" => DATA <= x"f000";
when "11" & x"77b" => DATA <= x"4240";
when "11" & x"77c" => DATA <= x"092f";
when "11" & x"77d" => DATA <= x"f000";
when "11" & x"77e" => DATA <= x"8240";
when "11" & x"77f" => DATA <= x"0681";
when "11" & x"780" => DATA <= x"c000";
when "11" & x"781" => DATA <= x"5680";
when "11" & x"782" => DATA <= x"0600";
when "11" & x"783" => DATA <= x"0022";
when "11" & x"784" => DATA <= x"0400";
when "11" & x"785" => DATA <= x"20a0";
when "11" & x"786" => DATA <= x"0510";
when "11" & x"787" => DATA <= x"0806";
when "11" & x"788" => DATA <= x"dbb0";
when "11" & x"789" => DATA <= x"0021";
when "11" & x"78a" => DATA <= x"d440";
when "11" & x"78b" => DATA <= x"4001";
when "11" & x"78c" => DATA <= x"0808";
when "11" & x"78d" => DATA <= x"0030";
when "11" & x"78e" => DATA <= x"e3aa";
when "11" & x"78f" => DATA <= x"80a8";
when "11" & x"790" => DATA <= x"0004";
when "11" & x"791" => DATA <= x"0017";
when "11" & x"792" => DATA <= x"16c4";
when "11" & x"793" => DATA <= x"5600";
when "11" & x"794" => DATA <= x"6fb0";
when "11" & x"795" => DATA <= x"0403";
when "11" & x"796" => DATA <= x"7f40";
when "11" & x"797" => DATA <= x"0020";
when "11" & x"798" => DATA <= x"37e2";
when "11" & x"799" => DATA <= x"0240";
when "11" & x"79a" => DATA <= x"0422";
when "11" & x"79b" => DATA <= x"0338";
when "11" & x"79c" => DATA <= x"0d00";
when "11" & x"79d" => DATA <= x"0000";
when "11" & x"79e" => DATA <= x"a000";
when "11" & x"79f" => DATA <= x"0166";
when "11" & x"7a0" => DATA <= x"3f80";
when "11" & x"7a1" => DATA <= x"28e4";
when "11" & x"7a2" => DATA <= x"01e4";
when "11" & x"7a3" => DATA <= x"0040";
when "11" & x"7a4" => DATA <= x"1fa4";
when "11" & x"7a5" => DATA <= x"00fe";
when "11" & x"7a6" => DATA <= x"0036";
when "11" & x"7a7" => DATA <= x"0ce4";
when "11" & x"7a8" => DATA <= x"017e";
when "11" & x"7a9" => DATA <= x"0057";
when "11" & x"7aa" => DATA <= x"b664";
when "11" & x"7ab" => DATA <= x"01fe";
when "11" & x"7ac" => DATA <= x"002d";
when "11" & x"7ad" => DATA <= x"3364";
when "11" & x"7ae" => DATA <= x"01fa";
when "11" & x"7af" => DATA <= x"0052";
when "11" & x"7b0" => DATA <= x"99a4";
when "11" & x"7b1" => DATA <= x"007c";
when "11" & x"7b2" => DATA <= x"0003";
when "11" & x"7b3" => DATA <= x"3efc";
when "11" & x"7b4" => DATA <= x"01f7";
when "11" & x"7b5" => DATA <= x"200a";
when "11" & x"7b6" => DATA <= x"0a00";
when "11" & x"7b7" => DATA <= x"2980";
when "11" & x"7b8" => DATA <= x"0214";
when "11" & x"7b9" => DATA <= x"0010";
when "11" & x"7ba" => DATA <= x"0008";
when "11" & x"7bb" => DATA <= x"0ec0";
when "11" & x"7bc" => DATA <= x"000c";
when "11" & x"7bd" => DATA <= x"8014";
when "11" & x"7be" => DATA <= x"19f2";
when "11" & x"7bf" => DATA <= x"0084";
when "11" & x"7c0" => DATA <= x"0021";
when "11" & x"7c1" => DATA <= x"4c92";
when "11" & x"7c2" => DATA <= x"006e";
when "11" & x"7c3" => DATA <= x"0012";
when "11" & x"7c4" => DATA <= x"86f2";
when "11" & x"7c5" => DATA <= x"00f7";
when "11" & x"7c6" => DATA <= x"0025";
when "11" & x"7c7" => DATA <= x"5372";
when "11" & x"7c8" => DATA <= x"00fb";
when "11" & x"7c9" => DATA <= x"001e";
when "11" & x"7ca" => DATA <= x"8fb4";
when "11" & x"7cb" => DATA <= x"0080";
when "11" & x"7cc" => DATA <= x"0001";
when "11" & x"7cd" => DATA <= x"400f";
when "11" & x"7ce" => DATA <= x"c3ed";
when "11" & x"7cf" => DATA <= x"0600";
when "11" & x"7d0" => DATA <= x"4294";
when "11" & x"7d1" => DATA <= x"0850";
when "11" & x"7d2" => DATA <= x"42d0";
when "11" & x"7d3" => DATA <= x"0013";
when "11" & x"7d4" => DATA <= x"8019";
when "11" & x"7d5" => DATA <= x"0fd0";
when "11" & x"7d6" => DATA <= x"00f0";
when "11" & x"7d7" => DATA <= x"0014";
when "11" & x"7d8" => DATA <= x"120f";
when "11" & x"7d9" => DATA <= x"022f";
when "11" & x"7da" => DATA <= x"bb00";
when "11" & x"7db" => DATA <= x"6837";
when "11" & x"7dc" => DATA <= x"821c";
when "11" & x"7dd" => DATA <= x"0010";
when "11" & x"7de" => DATA <= x"002e";
when "11" & x"7df" => DATA <= x"5bf2";
when "11" & x"7e0" => DATA <= x"0008";
when "11" & x"7e1" => DATA <= x"000c";
when "11" & x"7e2" => DATA <= x"59cc";
when "11" & x"7e3" => DATA <= x"00c0";
when "11" & x"7e4" => DATA <= x"0101";
when "11" & x"7e5" => DATA <= x"4000";
when "11" & x"7e6" => DATA <= x"14b5";
when "11" & x"7e7" => DATA <= x"800c";
when "11" & x"7e8" => DATA <= x"00fc";
when "11" & x"7e9" => DATA <= x"0080";
when "11" & x"7ea" => DATA <= x"a006";
when "11" & x"7eb" => DATA <= x"3b00";
when "11" & x"7ec" => DATA <= x"0340";
when "11" & x"7ed" => DATA <= x"020a";
when "11" & x"7ee" => DATA <= x"0020";
when "11" & x"7ef" => DATA <= x"6800";
when "11" & x"7f0" => DATA <= x"6000";
when "11" & x"7f1" => DATA <= x"46a0";
when "11" & x"7f2" => DATA <= x"010c";
when "11" & x"7f3" => DATA <= x"8011";
when "11" & x"7f4" => DATA <= x"1e60";
when "11" & x"7f5" => DATA <= x"8008";
when "11" & x"7f6" => DATA <= x"0011";
when "11" & x"7f7" => DATA <= x"400c";
when "11" & x"7f8" => DATA <= x"05f8";
when "11" & x"7f9" => DATA <= x"103c";
when "11" & x"7fa" => DATA <= x"0006";
when "11" & x"7fb" => DATA <= x"0780";
when "11" & x"7fc" => DATA <= x"02b1";
when "11" & x"7fd" => DATA <= x"7780";
when "11" & x"7fe" => DATA <= x"0216";
when "11" & x"7ff" => DATA <= x"0080";
when "11" & x"800" => DATA <= x"0282";
when "11" & x"801" => DATA <= x"802b";
when "11" & x"802" => DATA <= x"c1fc";
when "11" & x"803" => DATA <= x"e8af";
when "11" & x"804" => DATA <= x"8773";
when "11" & x"805" => DATA <= x"f17f";
when "11" & x"806" => DATA <= x"e7e0";
when "11" & x"807" => DATA <= x"e3f0";
when "11" & x"808" => DATA <= x"0168";
when "11" & x"809" => DATA <= x"ff00";
when "11" & x"80a" => DATA <= x"57fb";
when "11" & x"80b" => DATA <= x"81e8";
when "11" & x"80c" => DATA <= x"10ae";
when "11" & x"80d" => DATA <= x"b005";
when "11" & x"80e" => DATA <= x"55af";
when "11" & x"80f" => DATA <= x"15ca";
when "11" & x"810" => DATA <= x"8670";
when "11" & x"811" => DATA <= x"b950";
when "11" & x"812" => DATA <= x"b244";
when "11" & x"813" => DATA <= x"3a55";
when "11" & x"814" => DATA <= x"0aa4";
when "11" & x"815" => DATA <= x"1201";
when "11" & x"816" => DATA <= x"c551";
when "11" & x"817" => DATA <= x"54fe";
when "11" & x"818" => DATA <= x"3fd7";
when "11" & x"819" => DATA <= x"fa08";
when "11" & x"81a" => DATA <= x"60b1";
when "11" & x"81b" => DATA <= x"6800";
when "11" & x"81c" => DATA <= x"05c0";
when "11" & x"81d" => DATA <= x"15fe";
when "11" & x"81e" => DATA <= x"fc00";
when "11" & x"81f" => DATA <= x"0100";
when "11" & x"820" => DATA <= x"03e0";
when "11" & x"821" => DATA <= x"001d";
when "11" & x"822" => DATA <= x"1e81";
when "11" & x"823" => DATA <= x"a800";
when "11" & x"824" => DATA <= x"03bd";
when "11" & x"825" => DATA <= x"00c0";
when "11" & x"826" => DATA <= x"65bb";
when "11" & x"827" => DATA <= x"fbfd";
when "11" & x"828" => DATA <= x"f6f3";
when "11" & x"829" => DATA <= x"69d7";
when "11" & x"82a" => DATA <= x"9d7d";
when "11" & x"82b" => DATA <= x"bffc";
when "11" & x"82c" => DATA <= x"0403";
when "11" & x"82d" => DATA <= x"4001";
when "11" & x"82e" => DATA <= x"8d00";
when "11" & x"82f" => DATA <= x"eff1";
when "11" & x"830" => DATA <= x"7a1c";
when "11" & x"831" => DATA <= x"db5c";
when "11" & x"832" => DATA <= x"ebe5";
when "11" & x"833" => DATA <= x"f81f";
when "11" & x"834" => DATA <= x"8007";
when "11" & x"835" => DATA <= x"83e3";
when "11" & x"836" => DATA <= x"f80c";
when "11" & x"837" => DATA <= x"00fc";
when "11" & x"838" => DATA <= x"900a";
when "11" & x"839" => DATA <= x"c07f";
when "11" & x"83a" => DATA <= x"3fe4";
when "11" & x"83b" => DATA <= x"01c0";
when "11" & x"83c" => DATA <= x"e373";
when "11" & x"83d" => DATA <= x"b3dc";
when "11" & x"83e" => DATA <= x"c02a";
when "11" & x"83f" => DATA <= x"e00b";
when "11" & x"840" => DATA <= x"a7c3";
when "11" & x"841" => DATA <= x"61f4";
when "11" & x"842" => DATA <= x"f83e";
when "11" & x"843" => DATA <= x"a7f9";
when "11" & x"844" => DATA <= x"54a8";
when "11" & x"845" => DATA <= x"56e5";
when "11" & x"846" => DATA <= x"5a00";
when "11" & x"847" => DATA <= x"2018";
when "11" & x"848" => DATA <= x"0900";
when "11" & x"849" => DATA <= x"0381";
when "11" & x"84a" => DATA <= x"537f";
when "11" & x"84b" => DATA <= x"8fd5";
when "11" & x"84c" => DATA <= x"fdc0";
when "11" & x"84d" => DATA <= x"001a";
when "11" & x"84e" => DATA <= x"0008";
when "11" & x"84f" => DATA <= x"4802";
when "11" & x"850" => DATA <= x"0680";
when "11" & x"851" => DATA <= x"0114";
when "11" & x"852" => DATA <= x"00a1";
when "11" & x"853" => DATA <= x"0010";
when "11" & x"854" => DATA <= x"2800";
when "11" & x"855" => DATA <= x"0940";
when "11" & x"856" => DATA <= x"0d00";
when "11" & x"857" => DATA <= x"0082";
when "11" & x"858" => DATA <= x"8000";
when "11" & x"859" => DATA <= x"9400";
when "11" & x"85a" => DATA <= x"6800";
when "11" & x"85b" => DATA <= x"0428";
when "11" & x"85c" => DATA <= x"0005";
when "11" & x"85d" => DATA <= x"4002";
when "11" & x"85e" => DATA <= x"c000";
when "11" & x"85f" => DATA <= x"2280";
when "11" & x"860" => DATA <= x"1034";
when "11" & x"861" => DATA <= x"0002";
when "11" & x"862" => DATA <= x"0002";
when "11" & x"863" => DATA <= x"2800";
when "11" & x"864" => DATA <= x"8140";
when "11" & x"865" => DATA <= x"00a0";
when "11" & x"866" => DATA <= x"0012";
when "11" & x"867" => DATA <= x"8004";
when "11" & x"868" => DATA <= x"1400";
when "11" & x"869" => DATA <= x"1000";
when "11" & x"86a" => DATA <= x"00bc";
when "11" & x"86b" => DATA <= x"0000";
when "11" & x"86c" => DATA <= x"20b0";
when "11" & x"86d" => DATA <= x"0015";
when "11" & x"86e" => DATA <= x"0000";
when "11" & x"86f" => DATA <= x"8000";
when "11" & x"870" => DATA <= x"2a00";
when "11" & x"871" => DATA <= x"0970";
when "11" & x"872" => DATA <= x"0083";
when "11" & x"873" => DATA <= x"8018";
when "11" & x"874" => DATA <= x"1400";
when "11" & x"875" => DATA <= x"4490";
when "11" & x"876" => DATA <= x"0087";
when "11" & x"877" => DATA <= x"8020";
when "11" & x"878" => DATA <= x"3400";
when "11" & x"879" => DATA <= x"2000";
when "11" & x"87a" => DATA <= x"0248";
when "11" & x"87b" => DATA <= x"0088";
when "11" & x"87c" => DATA <= x"0002";
when "11" & x"87d" => DATA <= x"1150";
when "11" & x"87e" => DATA <= x"0202";
when "11" & x"87f" => DATA <= x"4002";
when "11" & x"880" => DATA <= x"1400";
when "11" & x"881" => DATA <= x"18a0";
when "11" & x"882" => DATA <= x"0100";
when "11" & x"883" => DATA <= x"0005";
when "11" & x"884" => DATA <= x"4000";
when "11" & x"885" => DATA <= x"1580";
when "11" & x"886" => DATA <= x"0005";
when "11" & x"887" => DATA <= x"c000";
when "11" & x"888" => DATA <= x"2f00";
when "11" & x"889" => DATA <= x"0000";
when "11" & x"88a" => DATA <= x"bc00";
when "11" & x"88b" => DATA <= x"0520";
when "11" & x"88c" => DATA <= x"008a";
when "11" & x"88d" => DATA <= x"0040";
when "11" & x"88e" => DATA <= x"7000";
when "11" & x"88f" => DATA <= x"8c07";
when "11" & x"890" => DATA <= x"e008";
when "11" & x"891" => DATA <= x"a040";
when "11" & x"892" => DATA <= x"01c4";
when "11" & x"893" => DATA <= x"23e0";
when "11" & x"894" => DATA <= x"0205";
when "11" & x"895" => DATA <= x"8001";
when "11" & x"896" => DATA <= x"3c02";
when "11" & x"897" => DATA <= x"4004";
when "11" & x"898" => DATA <= x"1400";
when "11" & x"899" => DATA <= x"8490";
when "11" & x"89a" => DATA <= x"0085";
when "11" & x"89b" => DATA <= x"0010";
when "11" & x"89c" => DATA <= x"8008";
when "11" & x"89d" => DATA <= x"1a00";
when "11" & x"89e" => DATA <= x"0450";
when "11" & x"89f" => DATA <= x"02cc";
when "11" & x"8a0" => DATA <= x"0040";
when "11" & x"8a1" => DATA <= x"d000";
when "11" & x"8a2" => DATA <= x"0800";
when "11" & x"8a3" => DATA <= x"4140";
when "11" & x"8a4" => DATA <= x"0049";
when "11" & x"8a5" => DATA <= x"0012";
when "11" & x"8a6" => DATA <= x"5000";
when "11" & x"8a7" => DATA <= x"8240";
when "11" & x"8a8" => DATA <= x"003a";
when "11" & x"8a9" => DATA <= x"0010";
when "11" & x"8aa" => DATA <= x"f00a";
when "11" & x"8ab" => DATA <= x"0001";
when "11" & x"8ac" => DATA <= x"6802";
when "11" & x"8ad" => DATA <= x"0000";
when "11" & x"8ae" => DATA <= x"40d0";
when "11" & x"8af" => DATA <= x"058c";
when "11" & x"8b0" => DATA <= x"8001";
when "11" & x"8b1" => DATA <= x"2800";
when "11" & x"8b2" => DATA <= x"b200";
when "11" & x"8b3" => DATA <= x"1050";
when "11" & x"8b4" => DATA <= x"000a";
when "11" & x"8b5" => DATA <= x"8009";
when "11" & x"8b6" => DATA <= x"8000";
when "11" & x"8b7" => DATA <= x"8500";
when "11" & x"8b8" => DATA <= x"2068";
when "11" & x"8b9" => DATA <= x"0009";
when "11" & x"8ba" => DATA <= x"4112";
when "11" & x"8bb" => DATA <= x"0001";
when "11" & x"8bc" => DATA <= x"d000";
when "11" & x"8bd" => DATA <= x"0f80";
when "11" & x"8be" => DATA <= x"0100";
when "11" & x"8bf" => DATA <= x"0080";
when "11" & x"8c0" => DATA <= x"80e0";
when "11" & x"8c1" => DATA <= x"0020";
when "11" & x"8c2" => DATA <= x"a003";
when "11" & x"8c3" => DATA <= x"8700";
when "11" & x"8c4" => DATA <= x"10a8";
when "11" & x"8c5" => DATA <= x"0084";
when "11" & x"8c6" => DATA <= x"0040";
when "11" & x"8c7" => DATA <= x"0004";
when "11" & x"8c8" => DATA <= x"040e";
when "11" & x"8c9" => DATA <= x"0008";
when "11" & x"8ca" => DATA <= x"7800";
when "11" & x"8cb" => DATA <= x"4380";
when "11" & x"8cc" => DATA <= x"1894";
when "11" & x"8cd" => DATA <= x"0080";
when "11" & x"8ce" => DATA <= x"6078";
when "11" & x"8cf" => DATA <= x"0700";
when "11" & x"8d0" => DATA <= x"1001";
when "11" & x"8d1" => DATA <= x"5c00";
when "11" & x"8d2" => DATA <= x"01e0";
when "11" & x"8d3" => DATA <= x"041f";
when "11" & x"8d4" => DATA <= x"0000";
when "11" & x"8d5" => DATA <= x"7c01";
when "11" & x"8d6" => DATA <= x"4140";
when "11" & x"8d7" => DATA <= x"0203";
when "11" & x"8d8" => DATA <= x"0000";
when "11" & x"8d9" => DATA <= x"0340";
when "11" & x"8da" => DATA <= x"0080";
when "11" & x"8db" => DATA <= x"0004";
when "11" & x"8dc" => DATA <= x"4000";
when "11" & x"8dd" => DATA <= x"0080";
when "11" & x"8de" => DATA <= x"011c";
when "11" & x"8df" => DATA <= x"001e";
when "11" & x"8e0" => DATA <= x"0050";
when "11" & x"8e1" => DATA <= x"7012";
when "11" & x"8e2" => DATA <= x"c001";
when "11" & x"8e3" => DATA <= x"1200";
when "11" & x"8e4" => DATA <= x"28a0";
when "11" & x"8e5" => DATA <= x"8145";
when "11" & x"8e6" => DATA <= x"7c3f";
when "11" & x"8e7" => DATA <= x"abe1";
when "11" & x"8e8" => DATA <= x"fce8";
when "11" & x"8e9" => DATA <= x"7c3f";
when "11" & x"8ea" => DATA <= x"f4fd";
when "11" & x"8eb" => DATA <= x"7f47";
when "11" & x"8ec" => DATA <= x"e00a";
when "11" & x"8ed" => DATA <= x"ff00";
when "11" & x"8ee" => DATA <= x"3feb";
when "11" & x"8ef" => DATA <= x"fa80";
when "11" & x"8f0" => DATA <= x"01ee";
when "11" & x"8f1" => DATA <= x"f601";
when "11" & x"8f2" => DATA <= x"2cde";
when "11" & x"8f3" => DATA <= x"6b00";
when "11" & x"8f4" => DATA <= x"5141";
when "11" & x"8f5" => DATA <= x"228a";
when "11" & x"8f6" => DATA <= x"05e0";
when "11" & x"8f7" => DATA <= x"000a";
when "11" & x"8f8" => DATA <= x"2aaa";
when "11" & x"8f9" => DATA <= x"aa05";
when "11" & x"8fa" => DATA <= x"54a3";
when "11" & x"8fb" => DATA <= x"547b";
when "11" & x"8fc" => DATA <= x"f9fc";
when "11" & x"8fd" => DATA <= x"41c0";
when "11" & x"8fe" => DATA <= x"0c50";
when "11" & x"8ff" => DATA <= x"0861";
when "11" & x"900" => DATA <= x"f000";
when "11" & x"901" => DATA <= x"0212";
when "11" & x"902" => DATA <= x"1f8f";
when "11" & x"903" => DATA <= x"f400";
when "11" & x"904" => DATA <= x"000f";
when "11" & x"905" => DATA <= x"d008";
when "11" & x"906" => DATA <= x"1a8f";
when "11" & x"907" => DATA <= x"a00b";
when "11" & x"908" => DATA <= x"ff64";
when "11" & x"909" => DATA <= x"002f";
when "11" & x"90a" => DATA <= x"fdf6";
when "11" & x"90b" => DATA <= x"f300";
when "11" & x"90c" => DATA <= x"eb8d";
when "11" & x"90d" => DATA <= x"00e8";
when "11" & x"90e" => DATA <= x"0508";
when "11" & x"90f" => DATA <= x"003b";
when "11" & x"910" => DATA <= x"bfbf";
when "11" & x"911" => DATA <= x"dde2";
when "11" & x"912" => DATA <= x"793e";
when "11" & x"913" => DATA <= x"5f8f";
when "11" & x"914" => DATA <= x"e402";
when "11" & x"915" => DATA <= x"bf00";
when "11" & x"916" => DATA <= x"e007";
when "11" & x"917" => DATA <= x"8700";
when "11" & x"918" => DATA <= x"3fd9";
when "11" & x"919" => DATA <= x"ec03";
when "11" & x"91a" => DATA <= x"e3fc";
when "11" & x"91b" => DATA <= x"0080";
when "11" & x"91c" => DATA <= x"7332";
when "11" & x"91d" => DATA <= x"d8ee";
when "11" & x"91e" => DATA <= x"7703";
when "11" & x"91f" => DATA <= x"01c0";
when "11" & x"920" => DATA <= x"1f4f";
when "11" & x"921" => DATA <= x"87c3";
when "11" & x"922" => DATA <= x"69f0";
when "11" & x"923" => DATA <= x"b878";
when "11" & x"924" => DATA <= x"3e51";
when "11" & x"925" => DATA <= x"2914";
when "11" & x"926" => DATA <= x"0281";
when "11" & x"927" => DATA <= x"5a14";
when "11" & x"928" => DATA <= x"a002";
when "11" & x"929" => DATA <= x"8500";
when "11" & x"92a" => DATA <= x"1528";
when "11" & x"92b" => DATA <= x"00a9";
when "11" & x"92c" => DATA <= x"ffcf";
when "11" & x"92d" => DATA <= x"ee00";
when "11" & x"92e" => DATA <= x"5c78";
when "11" & x"92f" => DATA <= x"037f";
when "11" & x"930" => DATA <= x"c01f";
when "11" & x"931" => DATA <= x"fe00";
when "11" & x"932" => DATA <= x"7fa0";
when "11" & x"933" => DATA <= x"0084";
when "11" & x"934" => DATA <= x"802f";
when "11" & x"935" => DATA <= x"e800";
when "11" & x"936" => DATA <= x"1120";
when "11" & x"937" => DATA <= x"0dff";
when "11" & x"938" => DATA <= x"007e";
when "11" & x"939" => DATA <= x"f803";
when "11" & x"93a" => DATA <= x"fbc0";
when "11" & x"93b" => DATA <= x"0234";
when "11" & x"93c" => DATA <= x"0010";
when "11" & x"93d" => DATA <= x"f00f";
when "11" & x"93e" => DATA <= x"00d0";
when "11" & x"93f" => DATA <= x"0010";
when "11" & x"940" => DATA <= x"0020";
when "11" & x"941" => DATA <= x"0210";
when "11" & x"942" => DATA <= x"7002";
when "11" & x"943" => DATA <= x"03c0";
when "11" & x"944" => DATA <= x"3c03";
when "11" & x"945" => DATA <= x"c002";
when "11" & x"946" => DATA <= x"3400";
when "11" & x"947" => DATA <= x"10a0";
when "11" & x"948" => DATA <= x"0080";
when "11" & x"949" => DATA <= x"0041";
when "11" & x"94a" => DATA <= x"400a";
when "11" & x"94b" => DATA <= x"2010";
when "11" & x"94c" => DATA <= x"8bc0";
when "11" & x"94d" => DATA <= x"3400";
when "11" & x"94e" => DATA <= x"4000";
when "11" & x"94f" => DATA <= x"1000";
when "11" & x"950" => DATA <= x"041e";
when "11" & x"951" => DATA <= x"0020";
when "11" & x"952" => DATA <= x"f00f";
when "11" & x"953" => DATA <= x"0000";
when "11" & x"954" => DATA <= x"00bc";
when "11" & x"955" => DATA <= x"02c0";
when "11" & x"956" => DATA <= x"0434";
when "11" & x"957" => DATA <= x"0003";
when "11" & x"958" => DATA <= x"a001";
when "11" & x"959" => DATA <= x"4a02";
when "11" & x"95a" => DATA <= x"8001";
when "11" & x"95b" => DATA <= x"1e00";
when "11" & x"95c" => DATA <= x"0020";
when "11" & x"95d" => DATA <= x"7800";
when "11" & x"95e" => DATA <= x"0821";
when "11" & x"95f" => DATA <= x"4007";
when "11" & x"960" => DATA <= x"aa00";
when "11" & x"961" => DATA <= x"0848";
when "11" & x"962" => DATA <= x"03ff";
when "11" & x"963" => DATA <= x"c01f";
when "11" & x"964" => DATA <= x"fe00";
when "11" & x"965" => DATA <= x"fff0";
when "11" & x"966" => DATA <= x"01fd";
when "11" & x"967" => DATA <= x"0004";
when "11" & x"968" => DATA <= x"3c03";
when "11" & x"969" => DATA <= x"4004";
when "11" & x"96a" => DATA <= x"1200";
when "11" & x"96b" => DATA <= x"10a0";
when "11" & x"96c" => DATA <= x"0085";
when "11" & x"96d" => DATA <= x"0004";
when "11" & x"96e" => DATA <= x"3c03";
when "11" & x"96f" => DATA <= x"4010";
when "11" & x"970" => DATA <= x"1e00";
when "11" & x"971" => DATA <= x"fff0";
when "11" & x"972" => DATA <= x"07bf";
when "11" & x"973" => DATA <= x"803e";
when "11" & x"974" => DATA <= x"ec00";
when "11" & x"975" => DATA <= x"c005";
when "11" & x"976" => DATA <= x"a001";
when "11" & x"977" => DATA <= x"0700";
when "11" & x"978" => DATA <= x"007c";
when "11" & x"979" => DATA <= x"02c0";
when "11" & x"97a" => DATA <= x"0600";
when "11" & x"97b" => DATA <= x"0300";
when "11" & x"97c" => DATA <= x"0041";
when "11" & x"97d" => DATA <= x"e014";
when "11" & x"97e" => DATA <= x"0040";
when "11" & x"97f" => DATA <= x"9000";
when "11" & x"980" => DATA <= x"8700";
when "11" & x"981" => DATA <= x"0801";
when "11" & x"982" => DATA <= x"1400";
when "11" & x"983" => DATA <= x"08e0";
when "11" & x"984" => DATA <= x"006d";
when "11" & x"985" => DATA <= x"0020";
when "11" & x"986" => DATA <= x"3c03";
when "11" & x"987" => DATA <= x"c03c";
when "11" & x"988" => DATA <= x"0280";
when "11" & x"989" => DATA <= x"041e";
when "11" & x"98a" => DATA <= x"0020";
when "11" & x"98b" => DATA <= x"0c70";
when "11" & x"98c" => DATA <= x"0004";
when "11" & x"98d" => DATA <= x"4160";
when "11" & x"98e" => DATA <= x"0200";
when "11" & x"98f" => DATA <= x"0800";
when "11" & x"990" => DATA <= x"1140";
when "11" & x"991" => DATA <= x"0080";
when "11" & x"992" => DATA <= x"0004";
when "11" & x"993" => DATA <= x"3c00";
when "11" & x"994" => DATA <= x"a0ef";
when "11" & x"995" => DATA <= x"00d0";
when "11" & x"996" => DATA <= x"0040";
when "11" & x"997" => DATA <= x"0141";
when "11" & x"998" => DATA <= x"a00e";
when "11" & x"999" => DATA <= x"c7e3";
when "11" & x"99a" => DATA <= x"e1d8";
when "11" & x"99b" => DATA <= x"fc7c";
when "11" & x"99c" => DATA <= x"3f9f";
when "11" & x"99d" => DATA <= x"167e";
when "11" & x"99e" => DATA <= x"bf1f";
when "11" & x"99f" => DATA <= x"d7f8";
when "11" & x"9a0" => DATA <= x"02bf";
when "11" & x"9a1" => DATA <= x"8015";
when "11" & x"9a2" => DATA <= x"fe2b";
when "11" & x"9a3" => DATA <= x"1780";
when "11" & x"9a4" => DATA <= x"0560";
when "11" & x"9a5" => DATA <= x"a200";
when "11" & x"9a6" => DATA <= x"b42e";
when "11" & x"9a7" => DATA <= x"01b0";
when "11" & x"9a8" => DATA <= x"0482";
when "11" & x"9a9" => DATA <= x"2900";
when "11" & x"9aa" => DATA <= x"8b44";
when "11" & x"9ab" => DATA <= x"a210";
when "11" & x"9ac" => DATA <= x"08a5";
when "11" & x"9ad" => DATA <= x"51fc";
when "11" & x"9ae" => DATA <= x"8f4f";
when "11" & x"9af" => DATA <= x"effa";
when "11" & x"9b0" => DATA <= x"7f23";
when "11" & x"9b1" => DATA <= x"be00";
when "11" & x"9b2" => DATA <= x"5400";
when "11" & x"9b3" => DATA <= x"fb00";
when "11" & x"9b4" => DATA <= x"0200";
when "11" & x"9b5" => DATA <= x"4ffe";
when "11" & x"9b6" => DATA <= x"0001";
when "11" & x"9b7" => DATA <= x"f000";
when "11" & x"9b8" => DATA <= x"fdc0";
when "11" & x"9b9" => DATA <= x"0098";
when "11" & x"9ba" => DATA <= x"0702";
when "11" & x"9bb" => DATA <= x"001f";
when "11" & x"9bc" => DATA <= x"7ffd";
when "11" & x"9bd" => DATA <= x"e6fb";
when "11" & x"9be" => DATA <= x"eff7";
when "11" & x"9bf" => DATA <= x"df80";
when "11" & x"9c0" => DATA <= x"847c";
when "11" & x"9c1" => DATA <= x"0000";
when "11" & x"9c2" => DATA <= x"e777";
when "11" & x"9c3" => DATA <= x"b9e7";
when "11" & x"9c4" => DATA <= x"bdfe";
when "11" & x"9c5" => DATA <= x"805c";
when "11" & x"9c6" => DATA <= x"0eb6";
when "11" & x"9c7" => DATA <= x"fb40";
when "11" & x"9c8" => DATA <= x"2bfc";
when "11" & x"9c9" => DATA <= x"1fa0";
when "11" & x"9ca" => DATA <= x"0ff6";
when "11" & x"9cb" => DATA <= x"0380";
when "11" & x"9cc" => DATA <= x"00e0";
when "11" & x"9cd" => DATA <= x"7130";
when "11" & x"9ce" => DATA <= x"9c0c";
when "11" & x"9cf" => DATA <= x"0703";
when "11" & x"9d0" => DATA <= x"8e87";
when "11" & x"9d1" => DATA <= x"d3f4";
when "11" & x"9d2" => DATA <= x"3e1e";
when "11" & x"9d3" => DATA <= x"09a7";
when "11" & x"9d4" => DATA <= x"c2b4";
when "11" & x"9d5" => DATA <= x"0a0d";
when "11" & x"9d6" => DATA <= x"0050";
when "11" & x"9d7" => DATA <= x"2014";
when "11" & x"9d8" => DATA <= x"fc54";
when "11" & x"9d9" => DATA <= x"0017";
when "11" & x"9da" => DATA <= x"c21c";
when "11" & x"9db" => DATA <= x"a9bf";
when "11" & x"9dc" => DATA <= x"d5fe";
when "11" & x"9dd" => DATA <= x"fe00";
when "11" & x"9de" => DATA <= x"d000";
when "11" & x"9df" => DATA <= x"4000";
when "11" & x"9e0" => DATA <= x"b8d0";
when "11" & x"9e1" => DATA <= x"0040";
when "11" & x"9e2" => DATA <= x"01bf";
when "11" & x"9e3" => DATA <= x"e00e";
when "11" & x"9e4" => DATA <= x"fa00";
when "11" & x"9e5" => DATA <= x"1048";
when "11" & x"9e6" => DATA <= x"01fa";
when "11" & x"9e7" => DATA <= x"8002";
when "11" & x"9e8" => DATA <= x"1400";
when "11" & x"9e9" => DATA <= x"0200";
when "11" & x"9ea" => DATA <= x"2df4";
when "11" & x"9eb" => DATA <= x"0102";
when "11" & x"9ec" => DATA <= x"006d";
when "11" & x"9ed" => DATA <= x"e801";
when "11" & x"9ee" => DATA <= x"0000";
when "11" & x"9ef" => DATA <= x"edf0";
when "11" & x"9f0" => DATA <= x"03f7";
when "11" & x"9f1" => DATA <= x"8006";
when "11" & x"9f2" => DATA <= x"fc03";
when "11" & x"9f3" => DATA <= x"c024";
when "11" & x"9f4" => DATA <= x"0021";
when "11" & x"9f5" => DATA <= x"a001";
when "11" & x"9f6" => DATA <= x"0031";
when "11" & x"9f7" => DATA <= x"0280";
when "11" & x"9f8" => DATA <= x"009c";
when "11" & x"9f9" => DATA <= x"0080";
when "11" & x"9fa" => DATA <= x"0878";
when "11" & x"9fb" => DATA <= x"0780";
when "11" & x"9fc" => DATA <= x"5800";
when "11" & x"9fd" => DATA <= x"4280";
when "11" & x"9fe" => DATA <= x"0412";
when "11" & x"9ff" => DATA <= x"0020";
when "11" & x"a00" => DATA <= x"0008";
when "11" & x"a01" => DATA <= x"b801";
when "11" & x"a02" => DATA <= x"01c0";
when "11" & x"a03" => DATA <= x"001f";
when "11" & x"a04" => DATA <= x"00f0";
when "11" & x"a05" => DATA <= x"0000";
when "11" & x"a06" => DATA <= x"07c0";
when "11" & x"a07" => DATA <= x"3803";
when "11" & x"a08" => DATA <= x"80bc";
when "11" & x"a09" => DATA <= x"02c0";
when "11" & x"a0a" => DATA <= x"1012";
when "11" & x"a0b" => DATA <= x"0008";
when "11" & x"a0c" => DATA <= x"1500";
when "11" & x"a0d" => DATA <= x"1008";
when "11" & x"a0e" => DATA <= x"221a";
when "11" & x"a0f" => DATA <= x"0000";
when "11" & x"a10" => DATA <= x"61f0";
when "11" & x"a11" => DATA <= x"0e00";
when "11" & x"a12" => DATA <= x"0168";
when "11" & x"a13" => DATA <= x"000a";
when "11" & x"a14" => DATA <= x"8004";
when "11" & x"a15" => DATA <= x"6001";
when "11" & x"a16" => DATA <= x"d800";
when "11" & x"a17" => DATA <= x"05c0";
when "11" & x"a18" => DATA <= x"0100";
when "11" & x"a19" => DATA <= x"0282";
when "11" & x"a1a" => DATA <= x"8010";
when "11" & x"a1b" => DATA <= x"3400";
when "11" & x"a1c" => DATA <= x"0800";
when "11" & x"a1d" => DATA <= x"0228";
when "11" & x"a1e" => DATA <= x"0081";
when "11" & x"a1f" => DATA <= x"2008";
when "11" & x"a20" => DATA <= x"da00";
when "11" & x"a21" => DATA <= x"1050";
when "11" & x"a22" => DATA <= x"0010";
when "11" & x"a23" => DATA <= x"000c";
when "11" & x"a24" => DATA <= x"f00f";
when "11" & x"a25" => DATA <= x"00b0";
when "11" & x"a26" => DATA <= x"0085";
when "11" & x"a27" => DATA <= x"0004";
when "11" & x"a28" => DATA <= x"2400";
when "11" & x"a29" => DATA <= x"41c0";
when "11" & x"a2a" => DATA <= x"010b";
when "11" & x"a2b" => DATA <= x"0040";
when "11" & x"a2c" => DATA <= x"6800";
when "11" & x"a2d" => DATA <= x"1000";
when "11" & x"a2e" => DATA <= x"66d0";
when "11" & x"a2f" => DATA <= x"0010";
when "11" & x"a30" => DATA <= x"0029";
when "11" & x"a31" => DATA <= x"4001";
when "11" & x"a32" => DATA <= x"0a00";
when "11" & x"a33" => DATA <= x"4080";
when "11" & x"a34" => DATA <= x"1154";
when "11" & x"a35" => DATA <= x"0018";
when "11" & x"a36" => DATA <= x"0810";
when "11" & x"a37" => DATA <= x"0e00";
when "11" & x"a38" => DATA <= x"0381";
when "11" & x"a39" => DATA <= x"40e1";
when "11" & x"a3a" => DATA <= x"c000";
when "11" & x"a3b" => DATA <= x"1000";
when "11" & x"a3c" => DATA <= x"0400";
when "11" & x"a3d" => DATA <= x"01e0";
when "11" & x"a3e" => DATA <= x"0027";
when "11" & x"a3f" => DATA <= x"8050";
when "11" & x"a40" => DATA <= x"000c";
when "11" & x"a41" => DATA <= x"0200";
when "11" & x"a42" => DATA <= x"2150";
when "11" & x"a43" => DATA <= x"0108";
when "11" & x"a44" => DATA <= x"01c0";
when "11" & x"a45" => DATA <= x"440e";
when "11" & x"a46" => DATA <= x"0008";
when "11" & x"a47" => DATA <= x"6800";
when "11" & x"a48" => DATA <= x"2340";
when "11" & x"a49" => DATA <= x"0080";
when "11" & x"a4a" => DATA <= x"0085";
when "11" & x"a4b" => DATA <= x"4050";
when "11" & x"a4c" => DATA <= x"0202";
when "11" & x"a4d" => DATA <= x"4008";
when "11" & x"a4e" => DATA <= x"1400";
when "11" & x"a4f" => DATA <= x"f0a0";
when "11" & x"a50" => DATA <= x"0024";
when "11" & x"a51" => DATA <= x"8030";
when "11" & x"a52" => DATA <= x"0056";
when "11" & x"a53" => DATA <= x"0029";
when "11" & x"a54" => DATA <= x"d000";
when "11" & x"a55" => DATA <= x"8000";
when "11" & x"a56" => DATA <= x"4140";
when "11" & x"a57" => DATA <= x"021f";
when "11" & x"a58" => DATA <= x"0000";
when "11" & x"a59" => DATA <= x"8001";
when "11" & x"a5a" => DATA <= x"0010";
when "11" & x"a5b" => DATA <= x"0063";
when "11" & x"a5c" => DATA <= x"c008";
when "11" & x"a5d" => DATA <= x"1e00";
when "11" & x"a5e" => DATA <= x"0014";
when "11" & x"a5f" => DATA <= x"2201";
when "11" & x"a60" => DATA <= x"0007";
when "11" & x"a61" => DATA <= x"c700";
when "11" & x"a62" => DATA <= x"3e1f";
when "11" & x"a63" => DATA <= x"ce87";
when "11" & x"a64" => DATA <= x"c3fd";
when "11" & x"a65" => DATA <= x"d8fc";
when "11" & x"a66" => DATA <= x"7c51";
when "11" & x"a67" => DATA <= x"fd5f";
when "11" & x"a68" => DATA <= x"d1fa";
when "11" & x"a69" => DATA <= x"fc7f";
when "11" & x"a6a" => DATA <= x"4015";
when "11" & x"a6b" => DATA <= x"fe00";
when "11" & x"a6c" => DATA <= x"7f9f";
when "11" & x"a6d" => DATA <= x"c001";
when "11" & x"a6e" => DATA <= x"c005";
when "11" & x"a6f" => DATA <= x"0300";
when "11" & x"a70" => DATA <= x"0034";
when "11" & x"a71" => DATA <= x"015e";
when "11" & x"a72" => DATA <= x"0e0a";
when "11" & x"a73" => DATA <= x"f048";
when "11" & x"a74" => DATA <= x"001e";
when "11" & x"a75" => DATA <= x"0a8a";
when "11" & x"a76" => DATA <= x"aa51";
when "11" & x"a77" => DATA <= x"2090";
when "11" & x"a78" => DATA <= x"08a7";
when "11" & x"a79" => DATA <= x"57bf";
when "11" & x"a7a" => DATA <= x"9fdf";
when "11" & x"a7b" => DATA <= x"8b80";
when "11" & x"a7c" => DATA <= x"c305";
when "11" & x"a7d" => DATA <= x"8b40";
when "11" & x"a7e" => DATA <= x"0227";
when "11" & x"a7f" => DATA <= x"fb84";
when "11" & x"a80" => DATA <= x"0007";
when "11" & x"a81" => DATA <= x"7fbf";
when "11" & x"a82" => DATA <= x"0000";
when "11" & x"a83" => DATA <= x"4aff";
when "11" & x"a84" => DATA <= x"7800";
when "11" & x"a85" => DATA <= x"01e0";
when "11" & x"a86" => DATA <= x"1a80";
when "11" & x"a87" => DATA <= x"eff6";
when "11" & x"a88" => DATA <= x"0001";
when "11" & x"a89" => DATA <= x"800f";
when "11" & x"a8a" => DATA <= x"3ff7";
when "11" & x"a8b" => DATA <= x"fbed";
when "11" & x"a8c" => DATA <= x"e0e3";
when "11" & x"a8d" => DATA <= x"5934";
when "11" & x"a8e" => DATA <= x"e5c6";
when "11" & x"a8f" => DATA <= x"4040";
when "11" & x"a90" => DATA <= x"010b";
when "11" & x"a91" => DATA <= x"007f";
when "11" & x"a92" => DATA <= x"bbcd";
when "11" & x"a93" => DATA <= x"e077";
when "11" & x"a94" => DATA <= x"3abd";
when "11" & x"a95" => DATA <= x"daef";
when "11" & x"a96" => DATA <= x"1f80";
when "11" & x"a97" => DATA <= x"8000";
when "11" & x"a98" => DATA <= x"2000";
when "11" & x"a99" => DATA <= x"a86c";
when "11" & x"a9a" => DATA <= x"3e00";
when "11" & x"a9b" => DATA <= x"3c2c";
when "11" & x"a9c" => DATA <= x"01f8";
when "11" & x"a9d" => DATA <= x"ffb0";
when "11" & x"a9e" => DATA <= x"073b";
when "11" & x"a9f" => DATA <= x"3dcc";
when "11" & x"aa0" => DATA <= x"02ae";
when "11" & x"aa1" => DATA <= x"0603";
when "11" & x"aa2" => DATA <= x"f836";
when "11" & x"aa3" => DATA <= x"1f4f";
when "11" & x"aa4" => DATA <= x"83c3";
when "11" & x"aa5" => DATA <= x"e9f0";
when "11" & x"aa6" => DATA <= x"fa7c";
when "11" & x"aa7" => DATA <= x"0800";
when "11" & x"aa8" => DATA <= x"0201";
when "11" & x"aa9" => DATA <= x"7804";
when "11" & x"aaa" => DATA <= x"0800";
when "11" & x"aab" => DATA <= x"2a10";
when "11" & x"aac" => DATA <= x"0000";
when "11" & x"aad" => DATA <= x"40a0";
when "11" & x"aae" => DATA <= x"00ab";
when "11" & x"aaf" => DATA <= x"dfc7";
when "11" & x"ab0" => DATA <= x"eefe";
when "11" & x"ab1" => DATA <= x"7fbe";
when "11" & x"ab2" => DATA <= x"2400";
when "11" & x"ab3" => DATA <= x"0200";
when "11" & x"ab4" => DATA <= x"5c37";
when "11" & x"ab5" => DATA <= x"6c01";
when "11" & x"ab6" => DATA <= x"aabf";
when "11" & x"ab7" => DATA <= x"e000";
when "11" & x"ab8" => DATA <= x"1500";
when "11" & x"ab9" => DATA <= x"3fcd";
when "11" & x"aba" => DATA <= x"b600";
when "11" & x"abb" => DATA <= x"ef5f";
when "11" & x"abc" => DATA <= x"f000";
when "11" & x"abd" => DATA <= x"1280";
when "11" & x"abe" => DATA <= x"16ef";
when "11" & x"abf" => DATA <= x"bb00";
when "11" & x"ac0" => DATA <= x"6dbf";
when "11" & x"ac1" => DATA <= x"6c01";
when "11" & x"ac2" => DATA <= x"fa4e";
when "11" & x"ac3" => DATA <= x"b007";
when "11" & x"ac4" => DATA <= x"f846";
when "11" & x"ac5" => DATA <= x"8002";
when "11" & x"ac6" => DATA <= x"014a";
when "11" & x"ac7" => DATA <= x"001f";
when "11" & x"ac8" => DATA <= x"f000";
when "11" & x"ac9" => DATA <= x"07c0";
when "11" & x"aca" => DATA <= x"041a";
when "11" & x"acb" => DATA <= x"0010";
when "11" & x"acc" => DATA <= x"0308";
when "11" & x"acd" => DATA <= x"3800";
when "11" & x"ace" => DATA <= x"09a0";
when "11" & x"acf" => DATA <= x"040f";
when "11" & x"ad0" => DATA <= x"00f0";
when "11" & x"ad1" => DATA <= x"0900";
when "11" & x"ad2" => DATA <= x"0850";
when "11" & x"ad3" => DATA <= x"0043";
when "11" & x"ad4" => DATA <= x"8002";
when "11" & x"ad5" => DATA <= x"2200";
when "11" & x"ad6" => DATA <= x"008a";
when "11" & x"ad7" => DATA <= x"8004";
when "11" & x"ad8" => DATA <= x"1e01";
when "11" & x"ad9" => DATA <= x"6003";
when "11" & x"ada" => DATA <= x"0f00";
when "11" & x"adb" => DATA <= x"f00b";
when "11" & x"adc" => DATA <= x"0001";
when "11" & x"add" => DATA <= x"5000";
when "11" & x"ade" => DATA <= x"4804";
when "11" & x"adf" => DATA <= x"00a0";
when "11" & x"ae0" => DATA <= x"2f00";
when "11" & x"ae1" => DATA <= x"a001";
when "11" & x"ae2" => DATA <= x"0d80";
when "11" & x"ae3" => DATA <= x"2000";
when "11" & x"ae4" => DATA <= x"1500";
when "11" & x"ae5" => DATA <= x"0060";
when "11" & x"ae6" => DATA <= x"1011";
when "11" & x"ae7" => DATA <= x"0002";
when "11" & x"ae8" => DATA <= x"0580";
when "11" & x"ae9" => DATA <= x"2000";
when "11" & x"aea" => DATA <= x"1501";
when "11" & x"aeb" => DATA <= x"c00c";
when "11" & x"aec" => DATA <= x"27dd";
when "11" & x"aed" => DATA <= x"0004";
when "11" & x"aee" => DATA <= x"4000";
when "11" & x"aef" => DATA <= x"2000";
when "11" & x"af0" => DATA <= x"45ff";
when "11" & x"af1" => DATA <= x"e00f";
when "11" & x"af2" => DATA <= x"ef00";
when "11" & x"af3" => DATA <= x"7ff8";
when "11" & x"af4" => DATA <= x"00ff";
when "11" & x"af5" => DATA <= x"c03c";
when "11" & x"af6" => DATA <= x"0000";
when "11" & x"af7" => DATA <= x"20f0";
when "11" & x"af8" => DATA <= x"0085";
when "11" & x"af9" => DATA <= x"0004";
when "11" & x"afa" => DATA <= x"3802";
when "11" & x"afb" => DATA <= x"8428";
when "11" & x"afc" => DATA <= x"0021";
when "11" & x"afd" => DATA <= x"c001";
when "11" & x"afe" => DATA <= x"1407";
when "11" & x"aff" => DATA <= x"803b";
when "11" & x"b00" => DATA <= x"fc01";
when "11" & x"b01" => DATA <= x"efe0";
when "11" & x"b02" => DATA <= x"0fff";
when "11" & x"b03" => DATA <= x"003b";
when "11" & x"b04" => DATA <= x"8001";
when "11" & x"b05" => DATA <= x"0100";
when "11" & x"b06" => DATA <= x"0102";
when "11" & x"b07" => DATA <= x"8000";
when "11" & x"b08" => DATA <= x"3e01";
when "11" & x"b09" => DATA <= x"e000";
when "11" & x"b0a" => DATA <= x"0012";
when "11" & x"b0b" => DATA <= x"0000";
when "11" & x"b0c" => DATA <= x"0640";
when "11" & x"b0d" => DATA <= x"5000";
when "11" & x"b0e" => DATA <= x"0404";
when "11" & x"b0f" => DATA <= x"0001";
when "11" & x"b10" => DATA <= x"1080";
when "11" & x"b11" => DATA <= x"0420";
when "11" & x"b12" => DATA <= x"0008";
when "11" & x"b13" => DATA <= x"21a0";
when "11" & x"b14" => DATA <= x"010f";
when "11" & x"b15" => DATA <= x"0000";
when "11" & x"b16" => DATA <= x"0228";
when "11" & x"b17" => DATA <= x"0009";
when "11" & x"b18" => DATA <= x"4000";
when "11" & x"b19" => DATA <= x"4200";
when "11" & x"b1a" => DATA <= x"6240";
when "11" & x"b1b" => DATA <= x"1c06";
when "11" & x"b1c" => DATA <= x"0183";
when "11" & x"b1d" => DATA <= x"c240";
when "11" & x"b1e" => DATA <= x"0805";
when "11" & x"b1f" => DATA <= x"e401";
when "11" & x"b20" => DATA <= x"4340";
when "11" & x"b21" => DATA <= x"0060";
when "11" & x"b22" => DATA <= x"1000";
when "11" & x"b23" => DATA <= x"6380";
when "11" & x"b24" => DATA <= x"003e";
when "11" & x"b25" => DATA <= x"0001";
when "11" & x"b26" => DATA <= x"a001";
when "11" & x"b27" => DATA <= x"0c80";
when "11" & x"b28" => DATA <= x"0068";
when "11" & x"b29" => DATA <= x"0002";
when "11" & x"b2a" => DATA <= x"6190";
when "11" & x"b2b" => DATA <= x"0100";
when "11" & x"b2c" => DATA <= x"00c9";
when "11" & x"b2d" => DATA <= x"a000";
when "11" & x"b2e" => DATA <= x"8b00";
when "11" & x"b2f" => DATA <= x"a085";
when "11" & x"b30" => DATA <= x"4021";
when "11" & x"b31" => DATA <= x"fcfc";
when "11" & x"b32" => DATA <= x"7c3f";
when "11" & x"b33" => DATA <= x"abe1";
when "11" & x"b34" => DATA <= x"fce8";
when "11" & x"b35" => DATA <= x"e3f5";
when "11" & x"b36" => DATA <= x"ff1f";
when "11" & x"b37" => DATA <= x"afd7";
when "11" & x"b38" => DATA <= x"cbf0";
when "11" & x"b39" => DATA <= x"027c";
when "11" & x"b3a" => DATA <= x"bf48";
when "11" & x"b3b" => DATA <= x"03f0";
when "11" & x"b3c" => DATA <= x"2228";
when "11" & x"b3d" => DATA <= x"6140";
when "11" & x"b3e" => DATA <= x"0161";
when "11" & x"b3f" => DATA <= x"0098";
when "11" & x"b40" => DATA <= x"0010";
when "11" & x"b41" => DATA <= x"6380";
when "11" & x"b42" => DATA <= x"1800";
when "11" & x"b43" => DATA <= x"0600";
when "11" & x"b44" => DATA <= x"0110";
when "11" & x"b45" => DATA <= x"8a61";
when "11" & x"b46" => DATA <= x"2290";
when "11" & x"b47" => DATA <= x"2825";
when "11" & x"b48" => DATA <= x"42aa";
when "11" & x"b49" => DATA <= x"5fcd";
when "11" & x"b4a" => DATA <= x"fcfe";
when "11" & x"b4b" => DATA <= x"0002";
when "11" & x"b4c" => DATA <= x"7003";
when "11" & x"b4d" => DATA <= x"1402";
when "11" & x"b4e" => DATA <= x"f8a0";
when "11" & x"b4f" => DATA <= x"0020";
when "11" & x"b50" => DATA <= x"01f8";
when "11" & x"b51" => DATA <= x"ff90";
when "11" & x"b52" => DATA <= x"0a80";
when "11" & x"b53" => DATA <= x"40d4";
when "11" & x"b54" => DATA <= x"7b83";
when "11" & x"b55" => DATA <= x"ffeb";
when "11" & x"b56" => DATA <= x"febe";
when "11" & x"b57" => DATA <= x"dfef";
when "11" & x"b58" => DATA <= x"beff";
when "11" & x"b59" => DATA <= x"0048";
when "11" & x"b5a" => DATA <= x"0f38";
when "11" & x"b5b" => DATA <= x"e800";
when "11" & x"b5c" => DATA <= x"4280";
when "11" & x"b5d" => DATA <= x"1df3";
when "11" & x"b5e" => DATA <= x"feef";
when "11" & x"b5f" => DATA <= x"03b9";
when "11" & x"b60" => DATA <= x"e8f9";
when "11" & x"b61" => DATA <= x"7cbf";
when "11" & x"b62" => DATA <= x"07d0";
when "11" & x"b63" => DATA <= x"0081";
when "11" & x"b64" => DATA <= x"f87c";
when "11" & x"b65" => DATA <= x"2780";
when "11" & x"b66" => DATA <= x"5c1c";
when "11" & x"b67" => DATA <= x"00ff";
when "11" & x"b68" => DATA <= x"603c";
when "11" & x"b69" => DATA <= x"0f8f";
when "11" & x"b6a" => DATA <= x"fe00";
when "11" & x"b6b" => DATA <= x"77b0";
when "11" & x"b6c" => DATA <= x"dcfd";
when "11" & x"b6d" => DATA <= x"c000";
when "11" & x"b6e" => DATA <= x"7107";
when "11" & x"b6f" => DATA <= x"c369";
when "11" & x"b70" => DATA <= x"f0f8";
when "11" & x"b71" => DATA <= x"7b87";
when "11" & x"b72" => DATA <= x"c000";
when "11" & x"b73" => DATA <= x"412d";
when "11" & x"b74" => DATA <= x"0200";
when "11" & x"b75" => DATA <= x"2914";
when "11" & x"b76" => DATA <= x"2940";
when "11" & x"b77" => DATA <= x"054a";
when "11" & x"b78" => DATA <= x"002a";
when "11" & x"b79" => DATA <= x"143b";
when "11" & x"b7a" => DATA <= x"f9ff";
when "11" & x"b7b" => DATA <= x"3fc1";
when "11" & x"b7c" => DATA <= x"0002";
when "11" & x"b7d" => DATA <= x"e280";
when "11" & x"b7e" => DATA <= x"1514";
when "11" & x"b7f" => DATA <= x"0008";
when "11" & x"b80" => DATA <= x"0037";
when "11" & x"b81" => DATA <= x"e800";
when "11" & x"b82" => DATA <= x"8400";
when "11" & x"b83" => DATA <= x"40d0";
when "11" & x"b84" => DATA <= x"03fe";
when "11" & x"b85" => DATA <= x"8017";
when "11" & x"b86" => DATA <= x"6002";
when "11" & x"b87" => DATA <= x"0500";
when "11" & x"b88" => DATA <= x"1fe8";
when "11" & x"b89" => DATA <= x"00a0";
when "11" & x"b8a" => DATA <= x"0010";
when "11" & x"b8b" => DATA <= x"5002";
when "11" & x"b8c" => DATA <= x"fe80";
when "11" & x"b8d" => DATA <= x"0114";
when "11" & x"b8e" => DATA <= x"0081";
when "11" & x"b8f" => DATA <= x"0036";
when "11" & x"b90" => DATA <= x"f400";
when "11" & x"b91" => DATA <= x"8000";
when "11" & x"b92" => DATA <= x"7ed0";
when "11" & x"b93" => DATA <= x"0282";
when "11" & x"b94" => DATA <= x"400d";
when "11" & x"b95" => DATA <= x"d400";
when "11" & x"b96" => DATA <= x"4a00";
when "11" & x"b97" => DATA <= x"0128";
when "11" & x"b98" => DATA <= x"0037";
when "11" & x"b99" => DATA <= x"4001";
when "11" & x"b9a" => DATA <= x"1000";
when "11" & x"b9b" => DATA <= x"0bc0";
when "11" & x"b9c" => DATA <= x"3c02";
when "11" & x"b9d" => DATA <= x"8000";
when "11" & x"b9e" => DATA <= x"400a";
when "11" & x"b9f" => DATA <= x"011b";
when "11" & x"ba0" => DATA <= x"8000";
when "11" & x"ba1" => DATA <= x"21fe";
when "11" & x"ba2" => DATA <= x"0001";
when "11" & x"ba3" => DATA <= x"7002";
when "11" & x"ba4" => DATA <= x"03c0";
when "11" & x"ba5" => DATA <= x"021e";
when "11" & x"ba6" => DATA <= x"01c0";
when "11" & x"ba7" => DATA <= x"010a";
when "11" & x"ba8" => DATA <= x"0008";
when "11" & x"ba9" => DATA <= x"4800";
when "11" & x"baa" => DATA <= x"8804";
when "11" & x"bab" => DATA <= x"2210";
when "11" & x"bac" => DATA <= x"0084";
when "11" & x"bad" => DATA <= x"480f";
when "11" & x"bae" => DATA <= x"00e0";
when "11" & x"baf" => DATA <= x"0107";
when "11" & x"bb0" => DATA <= x"0020";
when "11" & x"bb1" => DATA <= x"2400";
when "11" & x"bb2" => DATA <= x"0340";
when "11" & x"bb3" => DATA <= x"001f";
when "11" & x"bb4" => DATA <= x"0000";
when "11" & x"bb5" => DATA <= x"0080";
when "11" & x"bb6" => DATA <= x"002f";
when "11" & x"bb7" => DATA <= x"0000";
when "11" & x"bb8" => DATA <= x"0078";
when "11" & x"bb9" => DATA <= x"0011";
when "11" & x"bba" => DATA <= x"c002";
when "11" & x"bbb" => DATA <= x"0040";
when "11" & x"bbc" => DATA <= x"0042";
when "11" & x"bbd" => DATA <= x"0060";
when "11" & x"bbe" => DATA <= x"101c";
when "11" & x"bbf" => DATA <= x"0003";
when "11" & x"bc0" => DATA <= x"4d00";
when "11" & x"bc1" => DATA <= x"30ec";
when "11" & x"bc2" => DATA <= x"0080";
when "11" & x"bc3" => DATA <= x"0060";
when "11" & x"bc4" => DATA <= x"001c";
when "11" & x"bc5" => DATA <= x"1200";
when "11" & x"bc6" => DATA <= x"f001";
when "11" & x"bc7" => DATA <= x"800f";
when "11" & x"bc8" => DATA <= x"7400";
when "11" & x"bc9" => DATA <= x"f000";
when "11" & x"bca" => DATA <= x"00e8";
when "11" & x"bcb" => DATA <= x"0163";
when "11" & x"bcc" => DATA <= x"400b";
when "11" & x"bcd" => DATA <= x"7a00";
when "11" & x"bce" => DATA <= x"0400";
when "11" & x"bcf" => DATA <= x"1b34";
when "11" & x"bd0" => DATA <= x"0057";
when "11" & x"bd1" => DATA <= x"0020";
when "11" & x"bd2" => DATA <= x"6801";
when "11" & x"bd3" => DATA <= x"db40";
when "11" & x"bd4" => DATA <= x"0bd0";
when "11" & x"bd5" => DATA <= x"0100";
when "11" & x"bd6" => DATA <= x"0800";
when "11" & x"bd7" => DATA <= x"1750";
when "11" & x"bd8" => DATA <= x"006c";
when "11" & x"bd9" => DATA <= x"0020";
when "11" & x"bda" => DATA <= x"f00e";
when "11" & x"bdb" => DATA <= x"0010";
when "11" & x"bdc" => DATA <= x"7800";
when "11" & x"bdd" => DATA <= x"43c0";
when "11" & x"bde" => DATA <= x"2442";
when "11" & x"bdf" => DATA <= x"4010";
when "11" & x"be0" => DATA <= x"1400";
when "11" & x"be1" => DATA <= x"8000";
when "11" & x"be2" => DATA <= x"1000";
when "11" & x"be3" => DATA <= x"8003";
when "11" & x"be4" => DATA <= x"7500";
when "11" & x"be5" => DATA <= x"3bc0";
when "11" & x"be6" => DATA <= x"0200";
when "11" & x"be7" => DATA <= x"1001";
when "11" & x"be8" => DATA <= x"6f40";
when "11" & x"be9" => DATA <= x"0ff0";
when "11" & x"bea" => DATA <= x"0080";
when "11" & x"beb" => DATA <= x"0200";
when "11" & x"bec" => DATA <= x"4dd0";
when "11" & x"bed" => DATA <= x"03b8";
when "11" & x"bee" => DATA <= x"0010";
when "11" & x"bef" => DATA <= x"3800";
when "11" & x"bf0" => DATA <= x"0f25";
when "11" & x"bf1" => DATA <= x"0381";
when "11" & x"bf2" => DATA <= x"5400";
when "11" & x"bf3" => DATA <= x"7800";
when "11" & x"bf4" => DATA <= x"8000";
when "11" & x"bf5" => DATA <= x"6000";
when "11" & x"bf6" => DATA <= x"1d00";
when "11" & x"bf7" => DATA <= x"03c0";
when "11" & x"bf8" => DATA <= x"9e00";
when "11" & x"bf9" => DATA <= x"0100";
when "11" & x"bfa" => DATA <= x"07c1";
when "11" & x"bfb" => DATA <= x"e1c0";
when "11" & x"bfc" => DATA <= x"0540";
when "11" & x"bfd" => DATA <= x"1080";
when "11" & x"bfe" => DATA <= x"1404";
when "11" & x"bff" => DATA <= x"0001";
when "11" & x"c00" => DATA <= x"0008";
when "11" & x"c01" => DATA <= x"400a";
when "11" & x"c02" => DATA <= x"10e0";
when "11" & x"c03" => DATA <= x"0100";
when "11" & x"c04" => DATA <= x"0a80";
when "11" & x"c05" => DATA <= x"011e";
when "11" & x"c06" => DATA <= x"0140";
when "11" & x"c07" => DATA <= x"080a";
when "11" & x"c08" => DATA <= x"0002";
when "11" & x"c09" => DATA <= x"4803";
when "11" & x"c0a" => DATA <= x"4020";
when "11" & x"c0b" => DATA <= x"000a";
when "11" & x"c0c" => DATA <= x"4802";
when "11" & x"c0d" => DATA <= x"2e80";
when "11" & x"c0e" => DATA <= x"1012";
when "11" & x"c0f" => DATA <= x"0039";
when "11" & x"c10" => DATA <= x"a004";
when "11" & x"c11" => DATA <= x"3d00";
when "11" & x"c12" => DATA <= x"0600";
when "11" & x"c13" => DATA <= x"0210";
when "11" & x"c14" => DATA <= x"c000";
when "11" & x"c15" => DATA <= x"0320";
when "11" & x"c16" => DATA <= x"020f";
when "11" & x"c17" => DATA <= x"000c";
when "11" & x"c18" => DATA <= x"0000";
when "11" & x"c19" => DATA <= x"2409";
when "11" & x"c1a" => DATA <= x"0020";
when "11" & x"c1b" => DATA <= x"5001";
when "11" & x"c1c" => DATA <= x"97c0";
when "11" & x"c1d" => DATA <= x"2801";
when "11" & x"c1e" => DATA <= x"6560";
when "11" & x"c1f" => DATA <= x"0fc7";
when "11" & x"c20" => DATA <= x"dbb1";
when "11" & x"c21" => DATA <= x"f8f8";
when "11" & x"c22" => DATA <= x"7f57";
when "11" & x"c23" => DATA <= x"c2fc";
when "11" & x"c24" => DATA <= x"7f57";
when "11" & x"c25" => DATA <= x"e3f5";
when "11" & x"c26" => DATA <= x"ff1f";
when "11" & x"c27" => DATA <= x"802a";
when "11" & x"c28" => DATA <= x"5d00";
when "11" & x"c29" => DATA <= x"b709";
when "11" & x"c2a" => DATA <= x"0400";
when "11" & x"c2b" => DATA <= x"2261";
when "11" & x"c2c" => DATA <= x"0a85";
when "11" & x"c2d" => DATA <= x"cc00";
when "11" & x"c2e" => DATA <= x"6338";
when "11" & x"c2f" => DATA <= x"2b00";
when "11" & x"c30" => DATA <= x"00ef";
when "11" & x"c31" => DATA <= x"0600";
when "11" & x"c32" => DATA <= x"0fa7";
when "11" & x"c33" => DATA <= x"9452";
when "11" & x"c34" => DATA <= x"a994";
when "11" & x"c35" => DATA <= x"e840";
when "11" & x"c36" => DATA <= x"2290";
when "11" & x"c37" => DATA <= x"2eaa";
when "11" & x"c38" => DATA <= x"7f23";
when "11" & x"c39" => DATA <= x"d3fb";
when "11" & x"c3a" => DATA <= x"fe9f";
when "11" & x"c3b" => DATA <= x"df0f";
when "11" & x"c3c" => DATA <= x"d010";
when "11" & x"c3d" => DATA <= x"2000";
when "11" & x"c3e" => DATA <= x"ffa0";
when "11" & x"c3f" => DATA <= x"077b";
when "11" & x"c40" => DATA <= x"ff80";
when "11" & x"c41" => DATA <= x"0074";
when "11" & x"c42" => DATA <= x"0001";
when "11" & x"c43" => DATA <= x"0798";
when "11" & x"c44" => DATA <= x"0013";
when "11" & x"c45" => DATA <= x"00fc";
when "11" & x"c46" => DATA <= x"4000";
when "11" & x"c47" => DATA <= x"00e5";
when "11" & x"c48" => DATA <= x"f9ff";
when "11" & x"c49" => DATA <= x"7dbc";
when "11" & x"c4a" => DATA <= x"0827";
when "11" & x"c4b" => DATA <= x"0418";
when "11" & x"c4c" => DATA <= x"edf7";
when "11" & x"c4d" => DATA <= x"ce20";
when "11" & x"c4e" => DATA <= x"1000";
when "11" & x"c4f" => DATA <= x"0400";
when "11" & x"c50" => DATA <= x"01f0";
when "11" & x"c51" => DATA <= x"0003";
when "11" & x"c52" => DATA <= x"beb9";
when "11" & x"c53" => DATA <= x"fbbe";
when "11" & x"c54" => DATA <= x"bfc6";
when "11" & x"c55" => DATA <= x"03e9";
when "11" & x"c56" => DATA <= x"be1f";
when "11" & x"c57" => DATA <= x"83f8";
when "11" & x"c58" => DATA <= x"01fe";
when "11" & x"c59" => DATA <= x"3f07";
when "11" & x"c5a" => DATA <= x"801c";
when "11" & x"c5b" => DATA <= x"1c00";
when "11" & x"c5c" => DATA <= x"ff30";
when "11" & x"c5d" => DATA <= x"3c1f";
when "11" & x"c5e" => DATA <= x"cff7";
when "11" & x"c5f" => DATA <= x"1109";
when "11" & x"c60" => DATA <= x"c0c0";
when "11" & x"c61" => DATA <= x"7057";
when "11" & x"c62" => DATA <= x"3b3f";
when "11" & x"c63" => DATA <= x"87c3";
when "11" & x"c64" => DATA <= x"c174";
when "11" & x"c65" => DATA <= x"f86c";
when "11" & x"c66" => DATA <= x"3f44";
when "11" & x"c67" => DATA <= x"a000";
when "11" & x"c68" => DATA <= x"2210";
when "11" & x"c69" => DATA <= x"02a5";
when "11" & x"c6a" => DATA <= x"a002";
when "11" & x"c6b" => DATA <= x"252a";
when "11" & x"c6c" => DATA <= x"37c0";
when "11" & x"c6d" => DATA <= x"0542";
when "11" & x"c6e" => DATA <= x"c1fb";
when "11" & x"c6f" => DATA <= x"bf8f";
when "11" & x"c70" => DATA <= x"67e7";
when "11" & x"c71" => DATA <= x"fbf4";
when "11" & x"c72" => DATA <= x"0008";
when "11" & x"c73" => DATA <= x"900a";
when "11" & x"c74" => DATA <= x"ff00";
when "11" & x"c75" => DATA <= x"0124";
when "11" & x"c76" => DATA <= x"02bf";
when "11" & x"c77" => DATA <= x"c001";
when "11" & x"c78" => DATA <= x"2900";
when "11" & x"c79" => DATA <= x"aff0";
when "11" & x"c7a" => DATA <= x"0026";
when "11" & x"c7b" => DATA <= x"402b";
when "11" & x"c7c" => DATA <= x"fc00";
when "11" & x"c7d" => DATA <= x"0490";
when "11" & x"c7e" => DATA <= x"0aff";
when "11" & x"c7f" => DATA <= x"0010";
when "11" & x"c80" => DATA <= x"2402";
when "11" & x"c81" => DATA <= x"bfc0";
when "11" & x"c82" => DATA <= x"0a09";
when "11" & x"c83" => DATA <= x"00af";
when "11" & x"c84" => DATA <= x"f002";
when "11" & x"c85" => DATA <= x"4240";
when "11" & x"c86" => DATA <= x"2bfc";
when "11" & x"c87" => DATA <= x"2018";
when "11" & x"c88" => DATA <= x"900a";
when "11" & x"c89" => DATA <= x"ff10";
when "11" & x"c8a" => DATA <= x"e805";
when "11" & x"c8b" => DATA <= x"7fd8";
when "11" & x"c8c" => DATA <= x"057f";
when "11" & x"c8d" => DATA <= x"8fc0";
when "11" & x"c8e" => DATA <= x"2001";
when "11" & x"c8f" => DATA <= x"fd00";
when "11" & x"c90" => DATA <= x"57fc";
when "11" & x"c91" => DATA <= x"8002";
when "11" & x"c92" => DATA <= x"0015";
when "11" & x"c93" => DATA <= x"ff20";
when "11" & x"c94" => DATA <= x"0040";
when "11" & x"c95" => DATA <= x"057f";
when "11" & x"c96" => DATA <= x"d805";
when "11" & x"c97" => DATA <= x"7f84";
when "11" & x"c98" => DATA <= x"3800";
when "11" & x"c99" => DATA <= x"2200";
when "11" & x"c9a" => DATA <= x"affb";
when "11" & x"c9b" => DATA <= x"00af";
when "11" & x"c9c" => DATA <= x"fb00";
when "11" & x"c9d" => DATA <= x"aff0";
when "11" & x"c9e" => DATA <= x"8680";
when "11" & x"c9f" => DATA <= x"07df";
when "11" & x"ca0" => DATA <= x"f600";
when "11" & x"ca1" => DATA <= x"167f";
when "11" & x"ca2" => DATA <= x"d803";
when "11" & x"ca3" => DATA <= x"e1fe";
when "11" & x"ca4" => DATA <= x"12d0";
when "11" & x"ca5" => DATA <= x"0aff";
when "11" & x"ca6" => DATA <= x"b00a";
when "11" & x"ca7" => DATA <= x"ffb0";
when "11" & x"ca8" => DATA <= x"07fb";
when "11" & x"ca9" => DATA <= x"dd01";
when "11" & x"caa" => DATA <= x"4001";
when "11" & x"cab" => DATA <= x"25c0";
when "11" & x"cac" => DATA <= x"02bf";
when "11" & x"cad" => DATA <= x"ec02";
when "11" & x"cae" => DATA <= x"bfde";
when "11" & x"caf" => DATA <= x"1400";
when "11" & x"cb0" => DATA <= x"8845";
when "11" & x"cb1" => DATA <= x"022b";
when "11" & x"cb2" => DATA <= x"fc03";
when "11" & x"cb3" => DATA <= x"4000";
when "11" & x"cb4" => DATA <= x"f038";
when "11" & x"cb5" => DATA <= x"018e";
when "11" & x"cb6" => DATA <= x"87b0";
when "11" & x"cb7" => DATA <= x"0aff";
when "11" & x"cb8" => DATA <= x"b00a";
when "11" & x"cb9" => DATA <= x"ffb0";
when "11" & x"cba" => DATA <= x"0aff";
when "11" & x"cbb" => DATA <= x"b00a";
when "11" & x"cbc" => DATA <= x"ffb0";
when "11" & x"cbd" => DATA <= x"07f3";
when "11" & x"cbe" => DATA <= x"fec0";
when "11" & x"cbf" => DATA <= x"0fef";
when "11" & x"cc0" => DATA <= x"f087";
when "11" & x"cc1" => DATA <= x"0004";
when "11" & x"cc2" => DATA <= x"000f";
when "11" & x"cc3" => DATA <= x"c7f8";
when "11" & x"cc4" => DATA <= x"4380";
when "11" & x"cc5" => DATA <= x"0220";
when "11" & x"cc6" => DATA <= x"079b";
when "11" & x"cc7" => DATA <= x"fec0";
when "11" & x"cc8" => DATA <= x"1cef";
when "11" & x"cc9" => DATA <= x"fb00";
when "11" & x"cca" => DATA <= x"affb";
when "11" & x"ccb" => DATA <= x"00af";
when "11" & x"ccc" => DATA <= x"fb00";
when "11" & x"ccd" => DATA <= x"aff0";
when "11" & x"cce" => DATA <= x"8700";
when "11" & x"ccf" => DATA <= x"1800";
when "11" & x"cd0" => DATA <= x"15ff";
when "11" & x"cd1" => DATA <= x"2001";
when "11" & x"cd2" => DATA <= x"f105";
when "11" & x"cd3" => DATA <= x"7f84";
when "11" & x"cd4" => DATA <= x"2400";
when "11" & x"cd5" => DATA <= x"083f";
when "11" & x"cd6" => DATA <= x"7f8f";
when "11" & x"cd7" => DATA <= x"b800";
when "11" & x"cd8" => DATA <= x"fe53";
when "11" & x"cd9" => DATA <= x"aff0";
when "11" & x"cda" => DATA <= x"1700";
when "11" & x"cdb" => DATA <= x"5011";
when "11" & x"cdc" => DATA <= x"7dff";
when "11" & x"cdd" => DATA <= x"c001";
when "11" & x"cde" => DATA <= x"0a00";
when "11" & x"cdf" => DATA <= x"7e3f";
when "11" & x"ce0" => DATA <= x"c09c";
when "11" & x"ce1" => DATA <= x"0020";
when "11" & x"ce2" => DATA <= x"0057";
when "11" & x"ce3" => DATA <= x"ff00";
when "11" & x"ce4" => DATA <= x"1000";
when "11" & x"ce5" => DATA <= x"4003";
when "11" & x"ce6" => DATA <= x"fbfe";
when "11" & x"ce7" => DATA <= x"4000";
when "11" & x"ce8" => DATA <= x"c00a";
when "11" & x"ce9" => DATA <= x"ffd0";
when "11" & x"cea" => DATA <= x"0405";
when "11" & x"ceb" => DATA <= x"7ff0";
when "11" & x"cec" => DATA <= x"0006";
when "11" & x"ced" => DATA <= x"802b";
when "11" & x"cee" => DATA <= x"fe40";
when "11" & x"cef" => DATA <= x"0200";
when "11" & x"cf0" => DATA <= x"0aff";
when "11" & x"cf1" => DATA <= x"0000";
when "11" & x"cf2" => DATA <= x"4000";
when "11" & x"cf3" => DATA <= x"8008";
when "11" & x"cf4" => DATA <= x"02bf";
when "11" & x"cf5" => DATA <= x"c000";
when "11" & x"cf6" => DATA <= x"1a00";
when "11" & x"cf7" => DATA <= x"0080";
when "11" & x"cf8" => DATA <= x"2bfe";
when "11" & x"cf9" => DATA <= x"400b";
when "11" & x"cfa" => DATA <= x"602a";
when "11" & x"cfb" => DATA <= x"ff90";
when "11" & x"cfc" => DATA <= x"0600";
when "11" & x"cfd" => DATA <= x"02bf";
when "11" & x"cfe" => DATA <= x"e820";
when "11" & x"cff" => DATA <= x"00b8";
when "11" & x"d00" => DATA <= x"0400";
when "11" & x"d01" => DATA <= x"2bfd";
when "11" & x"d02" => DATA <= x"fd5f";
when "11" & x"d03" => DATA <= x"0ff7";
when "11" & x"d04" => DATA <= x"43f2";
when "11" & x"d05" => DATA <= x"bfec";
when "11" & x"d06" => DATA <= x"fd7e";
when "11" & x"d07" => DATA <= x"3f06";
when "11" & x"d08" => DATA <= x"3110";
when "11" & x"d09" => DATA <= x"8c26";
when "11" & x"d0a" => DATA <= x"2001";
when "11" & x"d0b" => DATA <= x"8a00";
when "11" & x"d0c" => DATA <= x"043b";
when "11" & x"d0d" => DATA <= x"dcf5";
when "11" & x"d0e" => DATA <= x"ee00";
when "11" & x"d0f" => DATA <= x"73d0";
when "11" & x"d10" => DATA <= x"04bc";
when "11" & x"d11" => DATA <= x"800f";
when "11" & x"d12" => DATA <= x"2104";
when "11" & x"d13" => DATA <= x"5555";
when "11" & x"d14" => DATA <= x"2815";
when "11" & x"d15" => DATA <= x"4824";
when "11" & x"d16" => DATA <= x"0ba4";
when "11" & x"d17" => DATA <= x"8fef";
when "11" & x"d18" => DATA <= x"e027";
when "11" & x"d19" => DATA <= x"e1e1";
when "11" & x"d1a" => DATA <= x"f0c1";
when "11" & x"d1b" => DATA <= x"6280";
when "11" & x"d1c" => DATA <= x"0020";
when "11" & x"d1d" => DATA <= x"07fb";
when "11" & x"d1e" => DATA <= x"0000";
when "11" & x"d1f" => DATA <= x"077f";
when "11" & x"d20" => DATA <= x"bf09";
when "11" & x"d21" => DATA <= x"0e0a";
when "11" & x"d22" => DATA <= x"ff7e";
when "11" & x"d23" => DATA <= x"2000";
when "11" & x"d24" => DATA <= x"6010";
when "11" & x"d25" => DATA <= x"06ff";
when "11" & x"d26" => DATA <= x"bf18";
when "11" & x"d27" => DATA <= x"000f";
when "11" & x"d28" => DATA <= x"ff7c";
when "11" & x"d29" => DATA <= x"5008";
when "11" & x"d2a" => DATA <= x"475c";
when "11" & x"d2b" => DATA <= x"4001";
when "11" & x"d2c" => DATA <= x"0b00";
when "11" & x"d2d" => DATA <= x"fef7";
when "11" & x"d2e" => DATA <= x"7808";
when "11" & x"d2f" => DATA <= x"0002";
when "11" & x"d30" => DATA <= x"073f";
when "11" & x"d31" => DATA <= x"a8f9";
when "11" & x"d32" => DATA <= x"7dc0";
when "11" & x"d33" => DATA <= x"0fe7";
when "11" & x"d34" => DATA <= x"f843";
when "11" & x"d35" => DATA <= x"402b";
when "11" & x"d36" => DATA <= x"fc3b";
when "11" & x"d37" => DATA <= x"400e";
when "11" & x"d38" => DATA <= x"6003";
when "11" & x"d39" => DATA <= x"81da";
when "11" & x"d3a" => DATA <= x"ef7a";
when "11" & x"d3b" => DATA <= x"309c";
when "11" & x"d3c" => DATA <= x"09f9";
when "11" & x"d3d" => DATA <= x"1fef";
when "11" & x"d3e" => DATA <= x"f005";
when "11" & x"d3f" => DATA <= x"0094";
when "11" & x"d40" => DATA <= x"0e1d";
when "11" & x"d41" => DATA <= x"ffc0";
when "11" & x"d42" => DATA <= x"0a04";
when "11" & x"d43" => DATA <= x"057f";
when "11" & x"d44" => DATA <= x"bbdf";
when "11" & x"d45" => DATA <= x"0c00";
when "11" & x"d46" => DATA <= x"03e0";
when "11" & x"d47" => DATA <= x"015f";
when "11" & x"d48" => DATA <= x"ef77";
when "11" & x"d49" => DATA <= x"fbbc";
when "11" & x"d4a" => DATA <= x"147d";
when "11" & x"d4b" => DATA <= x"003f";
when "11" & x"d4c" => DATA <= x"d9ef";
when "11" & x"d4d" => DATA <= x"f6f8";
when "11" & x"d4e" => DATA <= x"9097";
when "11" & x"d4f" => DATA <= x"4015";
when "11" & x"d50" => DATA <= x"fefb";
when "11" & x"d51" => DATA <= x"7fd0";
when "11" & x"d52" => DATA <= x"0200";
when "11" & x"d53" => DATA <= x"015f";
when "11" & x"d54" => DATA <= x"ef74";
when "11" & x"d55" => DATA <= x"fd00";
when "11" & x"d56" => DATA <= x"2bc0";
when "11" & x"d57" => DATA <= x"0ff7";
when "11" & x"d58" => DATA <= x"ed7f";
when "11" & x"d59" => DATA <= x"8802";
when "11" & x"d5a" => DATA <= x"80f2";
when "11" & x"d5b" => DATA <= x"057f";
when "11" & x"d5c" => DATA <= x"bcc0";
when "11" & x"d5d" => DATA <= x"7201";
when "11" & x"d5e" => DATA <= x"5fef";
when "11" & x"d5f" => DATA <= x"d003";
when "11" & x"d60" => DATA <= x"0110";
when "11" & x"d61" => DATA <= x"4010";
when "11" & x"d62" => DATA <= x"57fb";
when "11" & x"d63" => DATA <= x"ec00";
when "11" & x"d64" => DATA <= x"7637";
when "11" & x"d65" => DATA <= x"3fc0";
when "11" & x"d66" => DATA <= x"15fe";
when "11" & x"d67" => DATA <= x"fd00";
when "11" & x"d68" => DATA <= x"1080";
when "11" & x"d69" => DATA <= x"81f0";
when "11" & x"d6a" => DATA <= x"03fd";
when "11" & x"d6b" => DATA <= x"eeff";
when "11" & x"d6c" => DATA <= x"0003";
when "11" & x"d6d" => DATA <= x"0034";
when "11" & x"d6e" => DATA <= x"015f";
when "11" & x"d6f" => DATA <= x"efee";
when "11" & x"d70" => DATA <= x"0052";
when "11" & x"d71" => DATA <= x"005f";
when "11" & x"d72" => DATA <= x"e7f7";
when "11" & x"d73" => DATA <= x"cb02";
when "11" & x"d74" => DATA <= x"801f";
when "11" & x"d75" => DATA <= x"c00a";
when "11" & x"d76" => DATA <= x"ff7f";
when "11" & x"d77" => DATA <= x"0dd6";
when "11" & x"d78" => DATA <= x"0040";
when "11" & x"d79" => DATA <= x"1842";
when "11" & x"d7a" => DATA <= x"bfcf";
when "11" & x"d7b" => DATA <= x"c007";
when "11" & x"d7c" => DATA <= x"9182";
when "11" & x"d7d" => DATA <= x"803b";
when "11" & x"d7e" => DATA <= x"fc02";
when "11" & x"d7f" => DATA <= x"6751";
when "11" & x"d80" => DATA <= x"b700";
when "11" & x"d81" => DATA <= x"15fe";
when "11" & x"d82" => DATA <= x"7f02";
when "11" & x"d83" => DATA <= x"09eb";
when "11" & x"d84" => DATA <= x"fc01";
when "11" & x"d85" => DATA <= x"dfe0";
when "11" & x"d86" => DATA <= x"0109";
when "11" & x"d87" => DATA <= x"fc0e";
when "11" & x"d88" => DATA <= x"007f";
when "11" & x"d89" => DATA <= x"bf57";
when "11" & x"d8a" => DATA <= x"e000";
when "11" & x"d8b" => DATA <= x"0afc";
when "11" & x"d8c" => DATA <= x"0001";
when "11" & x"d8d" => DATA <= x"eff7";
when "11" & x"d8e" => DATA <= x"c001";
when "11" & x"d8f" => DATA <= x"fefa";
when "11" & x"d90" => DATA <= x"003f";
when "11" & x"d91" => DATA <= x"dbef";
when "11" & x"d92" => DATA <= x"e018";
when "11" & x"d93" => DATA <= x"006e";
when "11" & x"d94" => DATA <= x"ff00";
when "11" & x"d95" => DATA <= x"57fa";
when "11" & x"d96" => DATA <= x"fcd8";
when "11" & x"d97" => DATA <= x"d409";
when "11" & x"d98" => DATA <= x"5005";
when "11" & x"d99" => DATA <= x"7fb7";
when "11" & x"d9a" => DATA <= x"df2b";
when "11" & x"d9b" => DATA <= x"f495";
when "11" & x"d9c" => DATA <= x"0057";
when "11" & x"d9d" => DATA <= x"f9fd";
when "11" & x"d9e" => DATA <= x"fefb";
when "11" & x"d9f" => DATA <= x"2e39";
when "11" & x"da0" => DATA <= x"0015";
when "11" & x"da1" => DATA <= x"fedf";
when "11" & x"da2" => DATA <= x"7f8b";
when "11" & x"da3" => DATA <= x"c84f";
when "11" & x"da4" => DATA <= x"f003";
when "11" & x"da5" => DATA <= x"fcff";
when "11" & x"da6" => DATA <= x"5fe4";
when "11" & x"da7" => DATA <= x"2048";
when "11" & x"da8" => DATA <= x"0c01";
when "11" & x"da9" => DATA <= x"5fee";
when "11" & x"daa" => DATA <= x"e7fc";
when "11" & x"dab" => DATA <= x"e07f";
when "11" & x"dac" => DATA <= x"fcff";
when "11" & x"dad" => DATA <= x"f43b";
when "11" & x"dae" => DATA <= x"1e61";
when "11" & x"daf" => DATA <= x"ffff";
when "11" & x"db0" => DATA <= x"bffb";
when "11" & x"db1" => DATA <= x"cfb8";
when "11" & x"db2" => DATA <= x"ebfc";
when "11" & x"db3" => DATA <= x"6bff";
when "11" & x"db4" => DATA <= x"e007";
when "11" & x"db5" => DATA <= x"38ff";
when "11" & x"db6" => DATA <= x"7fc0";
when "11" & x"db7" => DATA <= x"0782";
when "11" & x"db8" => DATA <= x"057f";
when "11" & x"db9" => DATA <= x"bdeb";
when "11" & x"dba" => DATA <= x"fc42";
when "11" & x"dbb" => DATA <= x"fe00";
when "11" & x"dbc" => DATA <= x"57fb";
when "11" & x"dbd" => DATA <= x"eebf";
when "11" & x"dbe" => DATA <= x"d483";
when "11" & x"dbf" => DATA <= x"f003";
when "11" & x"dc0" => DATA <= x"fdcf";
when "11" & x"dc1" => DATA <= x"dfe0";
when "11" & x"dc2" => DATA <= x"b7f8";
when "11" & x"dc3" => DATA <= x"12bf";
when "11" & x"dc4" => DATA <= x"dfb5";
when "11" & x"dc5" => DATA <= x"fe00";
when "11" & x"dc6" => DATA <= x"6780";
when "11" & x"dc7" => DATA <= x"2bfd";
when "11" & x"dc8" => DATA <= x"f75f";
when "11" & x"dc9" => DATA <= x"e007";
when "11" & x"dca" => DATA <= x"f803";
when "11" & x"dcb" => DATA <= x"7fc0";
when "11" & x"dcc" => DATA <= x"0270";
when "11" & x"dcd" => DATA <= x"057f";
when "11" & x"dce" => DATA <= x"bf7b";
when "11" & x"dcf" => DATA <= x"fdce";
when "11" & x"dd0" => DATA <= x"00af";
when "11" & x"dd1" => DATA <= x"f7f5";
when "11" & x"dd2" => DATA <= x"7faf";
when "11" & x"dd3" => DATA <= x"d3c1";
when "11" & x"dd4" => DATA <= x"0aff";
when "11" & x"dd5" => DATA <= x"7ecf";
when "11" & x"dd6" => DATA <= x"f802";
when "11" & x"dd7" => DATA <= x"bfdf";
when "11" & x"dd8" => DATA <= x"ddfe";
when "11" & x"dd9" => DATA <= x"0f00";
when "11" & x"dda" => DATA <= x"3fdf";
when "11" & x"ddb" => DATA <= x"27fe";
when "11" & x"ddc" => DATA <= x"ff20";
when "11" & x"ddd" => DATA <= x"382f";
when "11" & x"dde" => DATA <= x"fdf0";
when "11" & x"ddf" => DATA <= x"f0ff";
when "11" & x"de0" => DATA <= x"ffff";
when "11" & x"de1" => DATA <= x"fff1";
when "11" & x"de2" => DATA <= x"fafe";
when "11" & x"de3" => DATA <= x"ffcb";
when "11" & x"de4" => DATA <= x"200b";
when "11" & x"de5" => DATA <= x"ff01";
when "11" & x"de6" => DATA <= x"803b";
when "11" & x"de7" => DATA <= x"fc01";
when "11" & x"de8" => DATA <= x"5fef";
when "11" & x"de9" => DATA <= x"c707";
when "11" & x"dea" => DATA <= x"7f80";
when "11" & x"deb" => DATA <= x"2bfc";
when "11" & x"dec" => DATA <= x"fb3f";
when "11" & x"ded" => DATA <= x"e01a";
when "11" & x"dee" => DATA <= x"ff01";
when "11" & x"def" => DATA <= x"1feb";
when "11" & x"df0" => DATA <= x"fdf6";
when "11" & x"df1" => DATA <= x"04af";
when "11" & x"df2" => DATA <= x"fa00";
when "11" & x"df3" => DATA <= x"aff6";
when "11" & x"df4" => DATA <= x"6831";
when "11" & x"df5" => DATA <= x"fefe";
when "11" & x"df6" => DATA <= x"1077";
when "11" & x"df7" => DATA <= x"fbdc";
when "11" & x"df8" => DATA <= x"015f";
when "11" & x"df9" => DATA <= x"e7d9";
when "11" & x"dfa" => DATA <= x"ff00";
when "11" & x"dfb" => DATA <= x"57fb";
when "11" & x"dfc" => DATA <= x"91c3";
when "11" & x"dfd" => DATA <= x"dfe0";
when "11" & x"dfe" => DATA <= x"0eff";
when "11" & x"dff" => DATA <= x"03f7";
when "11" & x"e00" => DATA <= x"f902";
when "11" & x"e01" => DATA <= x"afc7";
when "11" & x"e02" => DATA <= x"f3ff";
when "11" & x"e03" => DATA <= x"c00f";
when "11" & x"e04" => DATA <= x"6787";
when "11" & x"e05" => DATA <= x"7fa0";
when "11" & x"e06" => DATA <= x"1f00";
when "11" & x"e07" => DATA <= x"04b9";
when "11" & x"e08" => DATA <= x"57bf";
when "11" & x"e09" => DATA <= x"c000";
when "11" & x"e0a" => DATA <= x"3000";
when "11" & x"e0b" => DATA <= x"183c";
when "11" & x"e0c" => DATA <= x"ff7b";
when "11" & x"e0d" => DATA <= x"bf40";
when "11" & x"e0e" => DATA <= x"0a94";
when "11" & x"e0f" => DATA <= x"6a01";
when "11" & x"e10" => DATA <= x"047f";
when "11" & x"e11" => DATA <= x"7fbd";
when "11" & x"e12" => DATA <= x"80da";
when "11" & x"e13" => DATA <= x"fe7e";
when "11" & x"e14" => DATA <= x"7dd0";
when "11" & x"e15" => DATA <= x"0180";
when "11" & x"e16" => DATA <= x"0840";
when "11" & x"e17" => DATA <= x"0200";
when "11" & x"e18" => DATA <= x"002f";
when "11" & x"e19" => DATA <= x"f025";
when "11" & x"e1a" => DATA <= x"0001";
when "11" & x"e1b" => DATA <= x"2801";
when "11" & x"e1c" => DATA <= x"803f";
when "11" & x"e1d" => DATA <= x"a800";
when "11" & x"e1e" => DATA <= x"0200";
when "11" & x"e1f" => DATA <= x"0040";
when "11" & x"e20" => DATA <= x"2110";
when "11" & x"e21" => DATA <= x"00e0";
when "11" & x"e22" => DATA <= x"f9ff";
when "11" & x"e23" => DATA <= x"afe7";
when "11" & x"e24" => DATA <= x"0000";
when "11" & x"e25" => DATA <= x"c003";
when "11" & x"e26" => DATA <= x"3df7";
when "11" & x"e27" => DATA <= x"f9c4";
when "11" & x"e28" => DATA <= x"c200";
when "11" & x"e29" => DATA <= x"0080";
when "11" & x"e2a" => DATA <= x"3807";
when "11" & x"e2b" => DATA <= x"c003";
when "11" & x"e2c" => DATA <= x"8efb";
when "11" & x"e2d" => DATA <= x"ff77";
when "11" & x"e2e" => DATA <= x"afaa";
when "11" & x"e2f" => DATA <= x"ff8f";
when "11" & x"e30" => DATA <= x"80c3";
when "11" & x"e31" => DATA <= x"27f8";
when "11" & x"e32" => DATA <= x"7c4e";
when "11" & x"e33" => DATA <= x"0060";
when "11" & x"e34" => DATA <= x"7005";
when "11" & x"e35" => DATA <= x"3e3e";
when "11" & x"e36" => DATA <= x"2bfc";
when "11" & x"e37" => DATA <= x"0150";
when "11" & x"e38" => DATA <= x"0c07";
when "11" & x"e39" => DATA <= x"038d";
when "11" & x"e3a" => DATA <= x"cedf";
when "11" & x"e3b" => DATA <= x"6391";
when "11" & x"e3c" => DATA <= x"dfe1";
when "11" & x"e3d" => DATA <= x"f0ba";
when "11" & x"e3e" => DATA <= x"7f87";
when "11" & x"e3f" => DATA <= x"c1cf";
when "11" & x"e40" => DATA <= x"f780";
when "11" & x"e41" => DATA <= x"0807";
when "11" & x"e42" => DATA <= x"4054";
when "11" & x"e43" => DATA <= x"0027";
when "11" & x"e44" => DATA <= x"0080";
when "11" & x"e45" => DATA <= x"0020";
when "11" & x"e46" => DATA <= x"0008";
when "11" & x"e47" => DATA <= x"0280";
when "11" & x"e48" => DATA <= x"4015";
when "11" & x"e49" => DATA <= x"fc1e";
when "11" & x"e4a" => DATA <= x"a06a";
when "11" & x"e4b" => DATA <= x"80a0";
when "11" & x"e4c" => DATA <= x"03c0";
when "11" & x"e4d" => DATA <= x"e0f8";
when "11" & x"e4e" => DATA <= x"7e3f";
when "11" & x"e4f" => DATA <= x"bfd0";
when "11" & x"e50" => DATA <= x"004d";
when "11" & x"e51" => DATA <= x"001b";
when "11" & x"e52" => DATA <= x"8000";
when "11" & x"e53" => DATA <= x"5a00";
when "11" & x"e54" => DATA <= x"1200";
when "11" & x"e55" => DATA <= x"3003";
when "11" & x"e56" => DATA <= x"e030";
when "11" & x"e57" => DATA <= x"0b05";
when "11" & x"e58" => DATA <= x"e070";
when "11" & x"e59" => DATA <= x"0007";
when "11" & x"e5a" => DATA <= x"e87b";
when "11" & x"e5b" => DATA <= x"87c0";
when "11" & x"e5c" => DATA <= x"1480";
when "11" & x"e5d" => DATA <= x"4800";
when "11" & x"e5e" => DATA <= x"7201";
when "11" & x"e5f" => DATA <= x"2001";
when "11" & x"e60" => DATA <= x"b01c";
when "11" & x"e61" => DATA <= x"003f";
when "11" & x"e62" => DATA <= x"0780";
when "11" & x"e63" => DATA <= x"d02c";
when "11" & x"e64" => DATA <= x"1ae0";
when "11" & x"e65" => DATA <= x"a00d";
when "11" & x"e66" => DATA <= x"1f7f";
when "11" & x"e67" => DATA <= x"8828";
when "11" & x"e68" => DATA <= x"0101";
when "11" & x"e69" => DATA <= x"c008";
when "11" & x"e6a" => DATA <= x"da00";
when "11" & x"e6b" => DATA <= x"9c02";
when "11" & x"e6c" => DATA <= x"00f8";
when "11" & x"e6d" => DATA <= x"00f0";
when "11" & x"e6e" => DATA <= x"61a0";
when "11" & x"e6f" => DATA <= x"180e";
when "11" & x"e70" => DATA <= x"0780";
when "11" & x"e71" => DATA <= x"4001";
when "11" & x"e72" => DATA <= x"60e0";
when "11" & x"e73" => DATA <= x"0e10";
when "11" & x"e74" => DATA <= x"0048";
when "11" & x"e75" => DATA <= x"8001";
when "11" & x"e76" => DATA <= x"c060";
when "11" & x"e77" => DATA <= x"a203";
when "11" & x"e78" => DATA <= x"0082";
when "11" & x"e79" => DATA <= x"8002";
when "11" & x"e7a" => DATA <= x"0f0a";
when "11" & x"e7b" => DATA <= x"e0ef";
when "11" & x"e7c" => DATA <= x"0001";
when "11" & x"e7d" => DATA <= x"000e";
when "11" & x"e7e" => DATA <= x"47e0";
when "11" & x"e7f" => DATA <= x"73f8";
when "11" & x"e80" => DATA <= x"22c0";
when "11" & x"e81" => DATA <= x"0c60";
when "11" & x"e82" => DATA <= x"0009";
when "11" & x"e83" => DATA <= x"c29c";
when "11" & x"e84" => DATA <= x"6bc0";
when "11" & x"e85" => DATA <= x"7e00";
when "11" & x"e86" => DATA <= x"7c3c";
when "11" & x"e87" => DATA <= x"2b81";
when "11" & x"e88" => DATA <= x"e0e0";
when "11" & x"e89" => DATA <= x"a00d";
when "11" & x"e8a" => DATA <= x"0300";
when "11" & x"e8b" => DATA <= x"8000";
when "11" & x"e8c" => DATA <= x"8440";
when "11" & x"e8d" => DATA <= x"2002";
when "11" & x"e8e" => DATA <= x"4100";
when "11" & x"e8f" => DATA <= x"0b8e";
when "11" & x"e90" => DATA <= x"181c";
when "11" & x"e91" => DATA <= x"1e28";
when "11" & x"e92" => DATA <= x"000e";
when "11" & x"e93" => DATA <= x"fc7c";
when "11" & x"e94" => DATA <= x"7783";
when "11" & x"e95" => DATA <= x"8280";
when "11" & x"e96" => DATA <= x"3405";
when "11" & x"e97" => DATA <= x"bf5c";
when "11" & x"e98" => DATA <= x"460a";
when "11" & x"e99" => DATA <= x"e270";
when "11" & x"e9a" => DATA <= x"3000";
when "11" & x"e9b" => DATA <= x"15fe";
when "11" & x"e9c" => DATA <= x"f870";
when "11" & x"e9d" => DATA <= x"3010";
when "11" & x"e9e" => DATA <= x"2830";
when "11" & x"e9f" => DATA <= x"17c3";
when "11" & x"ea0" => DATA <= x"a03f";
when "11" & x"ea1" => DATA <= x"fdff";
when "11" & x"ea2" => DATA <= x"fc60";
when "11" & x"ea3" => DATA <= x"3aff";
when "11" & x"ea4" => DATA <= x"70a0";
when "11" & x"ea5" => DATA <= x"4060";
when "11" & x"ea6" => DATA <= x"7078";
when "11" & x"ea7" => DATA <= x"188e";
when "11" & x"ea8" => DATA <= x"0723";
when "11" & x"ea9" => DATA <= x"81e9";
when "11" & x"eaa" => DATA <= x"1c8c";
when "11" & x"eab" => DATA <= x"40a0";
when "11" & x"eac" => DATA <= x"0010";
when "11" & x"ead" => DATA <= x"0005";
when "11" & x"eae" => DATA <= x"4000";
when "11" & x"eaf" => DATA <= x"2001";
when "11" & x"eb0" => DATA <= x"fd8e";
when "11" & x"eb1" => DATA <= x"071b";
when "11" & x"eb2" => DATA <= x"83c7";
when "11" & x"eb3" => DATA <= x"e40a";
when "11" & x"eb4" => DATA <= x"000f";
when "11" & x"eb5" => DATA <= x"87a8";
when "11" & x"eb6" => DATA <= x"7030";
when "11" & x"eb7" => DATA <= x"f030";
when "11" & x"eb8" => DATA <= x"5800";
when "11" & x"eb9" => DATA <= x"2d20";
when "11" & x"eba" => DATA <= x"0440";
when "11" & x"ebb" => DATA <= x"5425";
when "11" & x"ebc" => DATA <= x"403f";
when "11" & x"ebd" => DATA <= x"400e";
when "11" & x"ebe" => DATA <= x"070d";
when "11" & x"ebf" => DATA <= x"0183";
when "11" & x"ec0" => DATA <= x"e8fc";
when "11" & x"ec1" => DATA <= x"11c1";
when "11" & x"ec2" => DATA <= x"e0e0";
when "11" & x"ec3" => DATA <= x"6020";
when "11" & x"ec4" => DATA <= x"0030";
when "11" & x"ec5" => DATA <= x"082c";
when "11" & x"ec6" => DATA <= x"000b";
when "11" & x"ec7" => DATA <= x"4080";
when "11" & x"ec8" => DATA <= x"c168";
when "11" & x"ec9" => DATA <= x"0060";
when "11" & x"eca" => DATA <= x"0008";
when "11" & x"ecb" => DATA <= x"1d81";
when "11" & x"ecc" => DATA <= x"4001";
when "11" & x"ecd" => DATA <= x"f7c3";
when "11" & x"ece" => DATA <= x"0002";
when "11" & x"ecf" => DATA <= x"070f";
when "11" & x"ed0" => DATA <= x"f004";
when "11" & x"ed1" => DATA <= x"8381";
when "11" & x"ed2" => DATA <= x"1f8f";
when "11" & x"ed3" => DATA <= x"8080";
when "11" & x"ed4" => DATA <= x"0284";
when "11" & x"ed5" => DATA <= x"2800";
when "11" & x"ed6" => DATA <= x"04ff";
when "11" & x"ed7" => DATA <= x"0030";
when "11" & x"ed8" => DATA <= x"c0e0";
when "11" & x"ed9" => DATA <= x"f3ff";
when "11" & x"eda" => DATA <= x"7f80";
when "11" & x"edb" => DATA <= x"07ef";
when "11" & x"edc" => DATA <= x"c783";
when "11" & x"edd" => DATA <= x"8002";
when "11" & x"ede" => DATA <= x"037f";
when "11" & x"edf" => DATA <= x"8018";
when "11" & x"ee0" => DATA <= x"1dff";
when "11" & x"ee1" => DATA <= x"580f";
when "11" & x"ee2" => DATA <= x"f003";
when "11" & x"ee3" => DATA <= x"c102";
when "11" & x"ee4" => DATA <= x"0307";
when "11" & x"ee5" => DATA <= x"9fdf";
when "11" & x"ee6" => DATA <= x"e7f4";
when "11" & x"ee7" => DATA <= x"001c";
when "11" & x"ee8" => DATA <= x"1e0e";
when "11" & x"ee9" => DATA <= x"4670";
when "11" & x"eea" => DATA <= x"0028";
when "11" & x"eeb" => DATA <= x"0080";
when "11" & x"eec" => DATA <= x"9000";
when "11" & x"eed" => DATA <= x"8001";
when "11" & x"eee" => DATA <= x"301f";
when "11" & x"eef" => DATA <= x"1fbf";
when "11" & x"ef0" => DATA <= x"df00";
when "11" & x"ef1" => DATA <= x"0603";
when "11" & x"ef2" => DATA <= x"f1fe";
when "11" & x"ef3" => DATA <= x"f060";
when "11" & x"ef4" => DATA <= x"2001";
when "11" & x"ef5" => DATA <= x"e1c0";
when "11" & x"ef6" => DATA <= x"0004";
when "11" & x"ef7" => DATA <= x"23c0";
when "11" & x"ef8" => DATA <= x"2006";
when "11" & x"ef9" => DATA <= x"e022";
when "11" & x"efa" => DATA <= x"8324";
when "11" & x"efb" => DATA <= x"0147";
when "11" & x"efc" => DATA <= x"5800";
when "11" & x"efd" => DATA <= x"2607";
when "11" & x"efe" => DATA <= x"613f";
when "11" & x"eff" => DATA <= x"8020";
when "11" & x"f00" => DATA <= x"f7c2";
when "11" & x"f01" => DATA <= x"0002";
when "11" & x"f02" => DATA <= x"1f3f";
when "11" & x"f03" => DATA <= x"87c0";
when "11" & x"f04" => DATA <= x"4000";
when "11" & x"f05" => DATA <= x"39fc";
when "11" & x"f06" => DATA <= x"fc78";
when "11" & x"f07" => DATA <= x"a005";
when "11" & x"f08" => DATA <= x"0043";
when "11" & x"f09" => DATA <= x"8002";
when "11" & x"f0a" => DATA <= x"1c00";
when "11" & x"f0b" => DATA <= x"0500";
when "11" & x"f0c" => DATA <= x"7605";
when "11" & x"f0d" => DATA <= x"0002";
when "11" & x"f0e" => DATA <= x"000c";
when "11" & x"f0f" => DATA <= x"4078";
when "11" & x"f10" => DATA <= x"fdfe";
when "11" & x"f11" => DATA <= x"fc00";
when "11" & x"f12" => DATA <= x"1c1f";
when "11" & x"f13" => DATA <= x"cff7";
when "11" & x"f14" => DATA <= x"8300";
when "11" & x"f15" => DATA <= x"021f";
when "11" & x"f16" => DATA <= x"1f50";
when "11" & x"f17" => DATA <= x"0022";
when "11" & x"f18" => DATA <= x"4010";
when "11" & x"f19" => DATA <= x"000a";
when "11" & x"f1a" => DATA <= x"0690";
when "11" & x"f1b" => DATA <= x"0285";
when "11" & x"f1c" => DATA <= x"0020";
when "11" & x"f1d" => DATA <= x"4006";
when "11" & x"f1e" => DATA <= x"170b";
when "11" & x"f1f" => DATA <= x"c5ff";
when "11" & x"f20" => DATA <= x"400f";
when "11" & x"f21" => DATA <= x"f600";
when "11" & x"f22" => DATA <= x"007e";
when "11" & x"f23" => DATA <= x"ff03";
when "11" & x"f24" => DATA <= x"d000";
when "11" & x"f25" => DATA <= x"0c3e";
when "11" & x"f26" => DATA <= x"fe70";
when "11" & x"f27" => DATA <= x"0040";
when "11" & x"f28" => DATA <= x"0403";
when "11" & x"f29" => DATA <= x"83c1";
when "11" & x"f2a" => DATA <= x"fd5f";
when "11" & x"f2b" => DATA <= x"f501";
when "11" & x"f2c" => DATA <= x"ffff";
when "11" & x"f2d" => DATA <= x"ff5f";
when "11" & x"f2e" => DATA <= x"fee2";
when "11" & x"f2f" => DATA <= x"710e";
when "11" & x"f30" => DATA <= x"7804";
when "11" & x"f31" => DATA <= x"f7d7";
when "11" & x"f32" => DATA <= x"fd00";
when "11" & x"f33" => DATA <= x"2f1f";
when "11" & x"f34" => DATA <= x"d3fe";
when "11" & x"f35" => DATA <= x"0060";
when "11" & x"f36" => DATA <= x"5ff8";
when "11" & x"f37" => DATA <= x"03ff";
when "11" & x"f38" => DATA <= x"c01f";
when "11" & x"f39" => DATA <= x"fe00";
when "11" & x"f3a" => DATA <= x"0fdf";
when "11" & x"f3b" => DATA <= x"fd00";
when "11" & x"f3c" => DATA <= x"36f7";
when "11" & x"f3d" => DATA <= x"fe80";
when "11" & x"f3e" => DATA <= x"0042";
when "11" & x"f3f" => DATA <= x"11ff";
when "11" & x"f40" => DATA <= x"7fd0";
when "11" & x"f41" => DATA <= x"03c1";
when "11" & x"f42" => DATA <= x"f0fe";
when "11" & x"f43" => DATA <= x"effa";
when "11" & x"f44" => DATA <= x"00bf";
when "11" & x"f45" => DATA <= x"fa00";
when "11" & x"f46" => DATA <= x"bffa";
when "11" & x"f47" => DATA <= x"0002";
when "11" & x"f48" => DATA <= x"9ce7";
when "11" & x"f49" => DATA <= x"fe80";
when "11" & x"f4a" => DATA <= x"1f0f";
when "11" & x"f4b" => DATA <= x"e9ff";
when "11" & x"f4c" => DATA <= x"003f";
when "11" & x"f4d" => DATA <= x"2ffc";
when "11" & x"f4e" => DATA <= x"0001";
when "11" & x"f4f" => DATA <= x"5ad7";
when "11" & x"f50" => DATA <= x"f9fc";
when "11" & x"f51" => DATA <= x"7ec7";
when "11" & x"f52" => DATA <= x"a000";
when "11" & x"f53" => DATA <= x"1004";
when "11" & x"f54" => DATA <= x"0084";
when "11" & x"f55" => DATA <= x"61bc";
when "11" & x"f56" => DATA <= x"4008";
when "11" & x"f57" => DATA <= x"07c3";
when "11" & x"f58" => DATA <= x"fa7f";
when "11" & x"f59" => DATA <= x"c01f";
when "11" & x"f5a" => DATA <= x"fe00";
when "11" & x"f5b" => DATA <= x"07df";
when "11" & x"f5c" => DATA <= x"fd00";
when "11" & x"f5d" => DATA <= x"07db";
when "11" & x"f5e" => DATA <= x"f3ff";
when "11" & x"f5f" => DATA <= x"400f";
when "11" & x"f60" => DATA <= x"07cc";
when "11" & x"f61" => DATA <= x"ffd0";
when "11" & x"f62" => DATA <= x"01ff";
when "11" & x"f63" => DATA <= x"7fc0";
when "11" & x"f64" => DATA <= x"0ff3";
when "11" & x"f65" => DATA <= x"6eff";
when "11" & x"f66" => DATA <= x"8000";
when "11" & x"f67" => DATA <= x"20d4";
when "11" & x"f68" => DATA <= x"7b3f";
when "11" & x"f69" => DATA <= x"bfe8";
when "11" & x"f6a" => DATA <= x"01e0";
when "11" & x"f6b" => DATA <= x"f17d";
when "11" & x"f6c" => DATA <= x"bf6b";
when "11" & x"f6d" => DATA <= x"fe80";
when "11" & x"f6e" => DATA <= x"2ffc";
when "11" & x"f6f" => DATA <= x"00f0";
when "11" & x"f70" => DATA <= x"bff0";
when "11" & x"f71" => DATA <= x"007c";
when "11" & x"f72" => DATA <= x"7fcf";
when "11" & x"f73" => DATA <= x"f5ff";
when "11" & x"f74" => DATA <= x"400e";
when "11" & x"f75" => DATA <= x"0733";
when "11" & x"f76" => DATA <= x"1ddf";
when "11" & x"f77" => DATA <= x"5ff4";
when "11" & x"f78" => DATA <= x"005f";
when "11" & x"f79" => DATA <= x"dffa";
when "11" & x"f7a" => DATA <= x"002d";
when "11" & x"f7b" => DATA <= x"6ff8";
when "11" & x"f7c" => DATA <= x"001f";
when "11" & x"f7d" => DATA <= x"47e7";
when "11" & x"f7e" => DATA <= x"feff";
when "11" & x"f7f" => DATA <= x"a007";
when "11" & x"f80" => DATA <= x"038a";
when "11" & x"f81" => DATA <= x"bdeb";
when "11" & x"f82" => DATA <= x"fe80";
when "11" & x"f83" => DATA <= x"2ffc";
when "11" & x"f84" => DATA <= x"00e0";
when "11" & x"f85" => DATA <= x"77ef";
when "11" & x"f86" => DATA <= x"f802";
when "11" & x"f87" => DATA <= x"80c0";
when "11" & x"f88" => DATA <= x"2311";
when "11" & x"f89" => DATA <= x"99cc";
when "11" & x"f8a" => DATA <= x"ff40";
when "11" & x"f8b" => DATA <= x"0efa";
when "11" & x"f8c" => DATA <= x"feef";
when "11" & x"f8d" => DATA <= x"fa00";
when "11" & x"f8e" => DATA <= x"bff0";
when "11" & x"f8f" => DATA <= x"03f9";
when "11" & x"f90" => DATA <= x"dfbf";
when "11" & x"f91" => DATA <= x"f401";
when "11" & x"f92" => DATA <= x"4063";
when "11" & x"f93" => DATA <= x"31da";
when "11" & x"f94" => DATA <= x"edff";
when "11" & x"f95" => DATA <= x"400e";
when "11" & x"f96" => DATA <= x"e7e3";
when "11" & x"f97" => DATA <= x"fbbf";
when "11" & x"f98" => DATA <= x"c008";
when "11" & x"f99" => DATA <= x"07ae";
when "11" & x"f9a" => DATA <= x"ff80";
when "11" & x"f9b" => DATA <= x"1fe7";
when "11" & x"f9c" => DATA <= x"fa3f";
when "11" & x"f9d" => DATA <= x"0f8f";
when "11" & x"f9e" => DATA <= x"c3f4";
when "11" & x"f9f" => DATA <= x"00f0";
when "11" & x"fa0" => DATA <= x"9e06";
when "11" & x"fa1" => DATA <= x"1d00";
when "11" & x"fa2" => DATA <= x"5ff8";
when "11" & x"fa3" => DATA <= x"01f1";
when "11" & x"fa4" => DATA <= x"7fe0";
when "11" & x"fa5" => DATA <= x"07ff";
when "11" & x"fa6" => DATA <= x"1ff0";
when "11" & x"fa7" => DATA <= x"fd00";
when "11" & x"fa8" => DATA <= x"1c3b";
when "11" & x"fa9" => DATA <= x"c1e2";
when "11" & x"faa" => DATA <= x"f0a0";
when "11" & x"fab" => DATA <= x"03de";
when "11" & x"fac" => DATA <= x"ff80";
when "11" & x"fad" => DATA <= x"1fef";
when "11" & x"fae" => DATA <= x"bdff";
when "11" & x"faf" => DATA <= x"003f";
when "11" & x"fb0" => DATA <= x"c1f4";
when "11" & x"fb1" => DATA <= x"3fc1";
when "11" & x"fb2" => DATA <= x"e000";
when "11" & x"fb3" => DATA <= x"0d7c";
when "11" & x"fb4" => DATA <= x"7783";
when "11" & x"fb5" => DATA <= x"8680";
when "11" & x"fb6" => DATA <= x"2ffc";
when "11" & x"fb7" => DATA <= x"00fe";
when "11" & x"fb8" => DATA <= x"bff0";
when "11" & x"fb9" => DATA <= x"03fc";
when "11" & x"fba" => DATA <= x"0740";
when "11" & x"fbb" => DATA <= x"fc1e";
when "11" & x"fbc" => DATA <= x"0001";
when "11" & x"fbd" => DATA <= x"bfeb";
when "11" & x"fbe" => DATA <= x"f9f8";
when "11" & x"fbf" => DATA <= x"f878";
when "11" & x"fc0" => DATA <= x"5005";
when "11" & x"fc1" => DATA <= x"ff80";
when "11" & x"fc2" => DATA <= x"1fec";
when "11" & x"fc3" => DATA <= x"040d";
when "11" & x"fc4" => DATA <= x"01d0";
when "11" & x"fc5" => DATA <= x"3800";
when "11" & x"fc6" => DATA <= x"03df";
when "11" & x"fc7" => DATA <= x"efe7";
when "11" & x"fc8" => DATA <= x"e3e0";
when "11" & x"fc9" => DATA <= x"0080";
when "11" & x"fca" => DATA <= x"bff0";
when "11" & x"fcb" => DATA <= x"03fe";
when "11" & x"fcc" => DATA <= x"8fcf";
when "11" & x"fcd" => DATA <= x"fdfe";
when "11" & x"fce" => DATA <= x"007f";
when "11" & x"fcf" => DATA <= x"be1e";
when "11" & x"fd0" => DATA <= x"0e06";
when "11" & x"fd1" => DATA <= x"0200";
when "11" & x"fd2" => DATA <= x"0340";
when "11" & x"fd3" => DATA <= x"1bfe";
when "11" & x"fd4" => DATA <= x"fe00";
when "11" & x"fd5" => DATA <= x"382f";
when "11" & x"fd6" => DATA <= x"fc01";
when "11" & x"fd7" => DATA <= x"ffe0";
when "11" & x"fd8" => DATA <= x"07f8";
when "11" & x"fd9" => DATA <= x"0c0f";
when "11" & x"fda" => DATA <= x"41f4";
when "11" & x"fdb" => DATA <= x"7e00";
when "11" & x"fdc" => DATA <= x"1fbf";
when "11" & x"fdd" => DATA <= x"dfcf";
when "11" & x"fde" => DATA <= x"c783";
when "11" & x"fdf" => DATA <= x"8189";
when "11" & x"fe0" => DATA <= x"4017";
when "11" & x"fe1" => DATA <= x"fe00";
when "11" & x"fe2" => DATA <= x"785f";
when "11" & x"fe3" => DATA <= x"f803";
when "11" & x"fe4" => DATA <= x"ffc0";
when "11" & x"fe5" => DATA <= x"0ff6";
when "11" & x"fe6" => DATA <= x"0004";
when "11" & x"fe7" => DATA <= x"060f";
when "11" & x"fe8" => DATA <= x"0f8f";
when "11" & x"fe9" => DATA <= x"c01d";
when "11" & x"fea" => DATA <= x"fefe";
when "11" & x"feb" => DATA <= x"7c3c";
when "11" & x"fec" => DATA <= x"5800";
when "11" & x"fed" => DATA <= x"07f5";
when "11" & x"fee" => DATA <= x"ff80";
when "11" & x"fef" => DATA <= x"3ffc";
when "11" & x"ff0" => DATA <= x"00ff";
when "11" & x"ff1" => DATA <= x"1fef";
when "11" & x"ff2" => DATA <= x"f801";
when "11" & x"ff3" => DATA <= x"fee0";
when "11" & x"ff4" => DATA <= x"0000";
when "11" & x"ff5" => DATA <= x"c1e7";
when "11" & x"ff6" => DATA <= x"f7f8";
when "11" & x"ff7" => DATA <= x"03bf";
when "11" & x"ff8" => DATA <= x"df8e";
when "11" & x"ff9" => DATA <= x"1460";
when "11" & x"ffa" => DATA <= x"c401";
when "11" & x"ffb" => DATA <= x"7fef";
when "11" & x"ffc" => DATA <= x"c003";
when "11" & x"ffd" => DATA <= x"dedc";
when "11" & x"ffe" => DATA <= x"4e07";
when "11" & x"fff" => DATA <= x"b0ff";
when others => DATA <= (others => '0');
end case;
end process;
end RTL;
|
gpl-3.0
|
hoglet67/CoPro6502
|
src/T80/SSRAM.vhd
|
2
|
3030
|
--
-- Inferrable Synchronous SRAM for XST synthesis
--
-- Version : 0220
--
-- Copyright (c) 2002 Daniel Wallner ([email protected])
--
-- All rights reserved
--
-- Redistribution and use in source and synthezised forms, with or without
-- modification, are permitted provided that the following conditions are met:
--
-- Redistributions of source code must retain the above copyright notice,
-- this list of conditions and the following disclaimer.
--
-- Redistributions in synthesized form must reproduce the above copyright
-- notice, this list of conditions and the following disclaimer in the
-- documentation and/or other materials provided with the distribution.
--
-- Neither the name of the author nor the names of other contributors may
-- be used to endorse or promote products derived from this software without
-- specific prior written permission.
--
-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-- THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-- PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE
-- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-- POSSIBILITY OF SUCH DAMAGE.
--
-- Please report bugs to the author, but before you do so, please
-- make sure that this is not a derivative work and that
-- you have the latest version of this file.
--
-- The latest version of this file can be found at:
-- http://www.opencores.org/cvsweb.shtml/t51/
--
-- Limitations :
--
-- File history :
-- 0208 : Initial release
-- 0218 : Fixed data out at write
-- 0220 : Added support for XST
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
entity SSRAM is
generic(
AddrWidth : integer := 11;
DataWidth : integer := 8
);
port(
Clk : in std_logic;
CE_n : in std_logic;
WE_n : in std_logic;
A : in std_logic_vector(AddrWidth - 1 downto 0);
DIn : in std_logic_vector(DataWidth - 1 downto 0);
DOut : out std_logic_vector(DataWidth - 1 downto 0)
);
end SSRAM;
architecture behaviour of SSRAM is
type Memory_Image is array (natural range <>) of std_logic_vector(DataWidth - 1 downto 0);
signal RAM : Memory_Image(0 to 2 ** AddrWidth - 1);
signal A_r : std_logic_vector(AddrWidth - 1 downto 0);
begin
process (Clk)
begin
if Clk'event and Clk = '1' then
if (CE_n nor WE_n) = '1' then
RAM(to_integer(unsigned(A))) <= DIn;
end if;
A_r <= A;
end if;
end process;
DOut <= RAM(to_integer(unsigned(A_r)))
-- pragma translate_off
when not is_x(A_r) else (others => '-')
-- pragma translate_on
;
end;
|
gpl-3.0
|
EliasLuiz/TCC
|
Leon3/lib/gaisler/pci/pcitrace/pcitrace.vhd
|
1
|
7763
|
------------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2003 - 2008, Gaisler Research
-- Copyright (C) 2008 - 2014, Aeroflex Gaisler
-- Copyright (C) 2015 - 2016, Cobham Gaisler
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-----------------------------------------------------------------------------
-- Entity: pcitrace
-- File: pcitrace.vhd
-- Author: Jiri Gaisler - Gaisler Research
-- Description: PCI trace buffer
------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
library grlib;
use grlib.amba.all;
use grlib.stdlib.all;
use grlib.devices.all;
library techmap;
use techmap.gencomp.all;
library gaisler;
use gaisler.pci.all;
entity pcitrace is
generic (
depth : integer range 6 to 12 := 8;
iregs : integer := 1;
memtech : integer := DEFMEMTECH;
pindex : integer := 0;
paddr : integer := 0;
pmask : integer := 16#f00#
);
port (
rst : in std_ulogic;
clk : in std_ulogic;
pciclk : in std_ulogic;
pcii : in pci_in_type;
apbi : in apb_slv_in_type;
apbo : out apb_slv_out_type
);
end;
architecture rtl of pcitrace is
constant REVISION : amba_version_type := 0;
constant pconfig : apb_config_type := (
0 => ahb_device_reg ( VENDOR_GAISLER, GAISLER_PCITRACE, 0, REVISION, 0),
1 => apb_iobar(paddr, pmask));
type reg_type is record
sample : std_ulogic;
armed : std_ulogic;
busy : std_ulogic;
timeout : std_logic_vector(depth-1 downto 0);
admask : std_logic_vector(31 downto 0);
adpattern : std_logic_vector(31 downto 0);
sigmask : std_logic_vector(15 downto 0);
sigpattern : std_logic_vector(15 downto 0);
count : std_logic_vector(7 downto 0);
end record;
type pci_reg_type is record
sample : std_ulogic;
armed : std_ulogic;
sync : std_ulogic;
start : std_ulogic;
timeout : std_logic_vector(depth-1 downto 0);
baddr : std_logic_vector(depth-1 downto 0);
count : std_logic_vector(7 downto 0);
end record;
signal r, rin : reg_type;
signal csad, csctrl : std_ulogic;
signal pr, prin : pci_reg_type;
signal bufout : std_logic_vector(47 downto 0);
signal pciad : std_logic_vector(31 downto 0);
signal vcc : std_ulogic;
signal pcictrlin, pcictrl : std_logic_vector(15 downto 0);
begin
vcc <= '1';
comb: process(pcii, apbi, rst, r, pr, bufout)
variable v : reg_type;
variable rdata : std_logic_vector(31 downto 0);
variable paddr : std_logic_vector(3 downto 0);
variable vcsad, vcssig : std_ulogic;
begin
v := r; vcsad := '0'; vcssig := '0'; rdata := (others => '0');
v.sample := r.armed and not pr.armed; v.busy := pr.sample;
if (r.sample and pr.armed) = '1' then v.armed := '0'; end if;
--registers
paddr := apbi.paddr(15) & apbi.paddr(4 downto 2);
if apbi.penable = '1' then
if (apbi.pwrite and apbi.psel(pindex)) = '1' then
case paddr is
when "0000" => v.admask := apbi.pwdata;
when "0001" => v.sigmask := apbi.pwdata(15 downto 0);
when "0010" => v.adpattern := apbi.pwdata;
when "0011" => v.sigpattern := apbi.pwdata(15 downto 0);
when "0100" => v.timeout := apbi.pwdata(depth-1 downto 0);
when "0101" => v.armed := '1';
when "0111" => v.count := apbi.pwdata(7 downto 0);
when others =>
if apbi.paddr(15 downto 14) = "10" then vcsad := '1';
elsif apbi.paddr(15 downto 14) = "11" then vcssig := '1'; end if;
end case;
end if;
case paddr is
when "0000" => rdata := r.admask;
when "0001" => rdata(15 downto 0) := r.sigmask;
when "0010" => rdata := r.adpattern;
when "0011" => rdata(15 downto 0) := r.sigpattern;
when "0100" => rdata(depth-1 downto 0) := r.timeout;
when "0101" => rdata(0) := r.busy;
when "0110" => rdata(3 downto 0) := conv_std_logic_vector(depth, 4);
when "0111" =>
rdata(depth-1+16 downto 16) := pr.baddr;
rdata(15 downto 0) := pr.count & r.count;
when others =>
if apbi.paddr(15 downto 14) = "10" then
vcsad := '1'; rdata := bufout(31 downto 0);
elsif apbi.paddr(15 downto 14) = "11" then
vcssig := '1'; rdata(15 downto 0) := bufout(47 downto 32);
end if;
end case;
end if;
if rst = '0' then
v.sample := '0'; v.armed := '0'; v.admask := (others => '0');
v.sigmask := (others => '0'); v.adpattern := (others => '0');
v.sigpattern := (others => '0'); v.timeout := (others => '0');
end if;
csad <= vcsad; csctrl <= vcssig; apbo.prdata <= rdata; rin <= v;
end process;
comb2 : process(r, pr, pciclk, pcii, pcictrl, rst)
variable v : pci_reg_type;
constant z : std_logic_vector(47 downto 0) := (others => '0');
begin
v := pr; v.sync := (r.sample and not pr.armed);
if (pr.sample = '1') then
v.baddr := pr.baddr + 1;
if ((((pcii.ad & pcictrl) xor (r.adpattern & r.sigpattern)) and (r.admask & r.sigmask)) = z) then
if pr.count = "00000000" then v.start := '0';
else v.count := pr.count -1; end if;
end if;
if (pr.start = '0') then
v.timeout := pr.timeout - 1;
if (v.timeout(depth-1) and not pr.timeout(depth-1)) = '1' then
v.sample := '0'; v.armed := '0';
end if;
end if;
end if;
if pr.sync = '1' then
v.start := '1'; v.sample := '1'; v.armed := '1';
v.timeout := r.timeout; v.count := r.count;
end if;
if rst = '0' then
v.sample := '0'; v.armed := '0'; v.start := '0';
v.timeout := (others => '0'); v.baddr := (others => '0');
v.count := (others => '0');
end if;
prin <= v;
end process ;
pcictrlin <= pcii.rst & pcii.idsel & pcii.frame & pcii.trdy & pcii.irdy &
pcii.devsel & pcii.gnt & pcii.stop & pcii.lock & pcii.perr &
pcii.serr & pcii.par & pcii.cbe;
apbo.pconfig <= pconfig;
apbo.pindex <= pindex;
apbo.pirq <= (others => '0');
seq: process (clk)
begin
if clk'event and clk = '1' then r <= rin; end if;
end process seq;
pseq: process (pciclk)
begin
if pciclk'event and pciclk = '1' then pr <= prin; end if;
end process ;
ir : if iregs = 1 generate
pseq: process (pciclk)
begin
if pciclk'event and pciclk = '1' then
pcictrl <= pcictrlin; pciad <= pcii.ad;
end if;
end process ;
end generate;
noir : if iregs = 0 generate
pcictrl <= pcictrlin; pciad <= pcii.ad;
end generate;
admem : syncram_2p generic map (tech => memtech, abits => depth, dbits => 32, sepclk => 1)
port map (clk, csad, apbi.paddr(depth+1 downto 2), bufout(31 downto 0),
pciclk, pr.sample, pr.baddr, pciad);
ctrlmem : syncram_2p generic map (tech => memtech, abits => depth, dbits => 16, sepclk => 1)
port map (clk, csctrl, apbi.paddr(depth+1 downto 2), bufout(47 downto 32),
pciclk, pr.sample, pr.baddr, pcictrl);
end;
|
gpl-3.0
|
EliasLuiz/TCC
|
Leon3/lib/tech/virage/simprims/virage_simprims.vhd
|
1
|
18579
|
------------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2003 - 2008, Gaisler Research
-- Copyright (C) 2008 - 2014, Aeroflex Gaisler
-- Copyright (C) 2015 - 2016, Cobham Gaisler
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-----------------------------------------------------------------------------
-- Package: virage_simprims
-- File: virage_simprims.vhd
-- Author: Jiri Gaisler, Gaisler Research
-- Description: Simple simulation models for VIRAGE RAMs
-----------------------------------------------------------------------------
-- pragma translate_off
library ieee;
use ieee.std_logic_1164.all;
package virage_simprims is
component virage_syncram_sim
generic ( abits : integer := 10; dbits : integer := 8 );
port (
addr : in std_logic_vector((abits -1) downto 0);
clk : in std_logic;
di : in std_logic_vector((dbits -1) downto 0);
do : out std_logic_vector((dbits -1) downto 0);
me : in std_logic;
oe : in std_logic;
we : in std_logic
);
end component;
-- synchronous 2-port ram
component virage_2pram_sim
generic (
abits : integer := 8;
dbits : integer := 32;
words : integer := 256
);
port (
addra, addrb : in std_logic_vector((abits -1) downto 0);
clka, clkb : in std_logic;
dia : in std_logic_vector((dbits -1) downto 0);
dob : out std_logic_vector((dbits -1) downto 0);
mea, wea, meb, oeb : in std_logic
);
end component;
component virage_dpram_sim
generic (
abits : integer := 8;
dbits : integer := 32
);
port (
addra : in std_logic_vector((abits -1) downto 0);
clka : in std_logic;
dia : in std_logic_vector((dbits -1) downto 0);
doa : out std_logic_vector((dbits -1) downto 0);
mea, oea, wea : in std_logic;
addrb : in std_logic_vector((abits -1) downto 0);
clkb : in std_logic;
dib : in std_logic_vector((dbits -1) downto 0);
dob : out std_logic_vector((dbits -1) downto 0);
meb, oeb, web : in std_logic
);
end component;
end;
-- 1-port syncronous ram
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity virage_syncram_sim is
generic (
abits : integer := 10;
dbits : integer := 8
);
port (
addr : in std_logic_vector((abits -1) downto 0);
clk : in std_logic;
di : in std_logic_vector((dbits -1) downto 0);
do : out std_logic_vector((dbits -1) downto 0);
me : in std_logic;
oe : in std_logic;
we : in std_logic
);
end;
architecture behavioral of virage_syncram_sim is
subtype word is std_logic_vector((dbits -1) downto 0);
type mem is array(0 to (2**abits -1)) of word;
begin
main : process(clk, oe, me)
variable memarr : mem;-- := (others => (others => '0'));
variable doint : std_logic_vector((dbits -1) downto 0);
begin
if rising_edge(clk) and (me = '1') and not is_x(addr) then
if (we = '1') then memarr(to_integer(unsigned(addr))) := di; end if;
doint := memarr(to_integer(unsigned(addr)));
end if;
-- if (me and oe) = '1' then do <= doint;
if oe = '1' then do <= doint;
else do <= (others => 'Z'); end if;
end process;
end behavioral;
-- synchronous 2-port ram
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity virage_2pram_sim is
generic (
abits : integer := 10;
dbits : integer := 8;
words : integer := 1024
);
port (
addra, addrb : in std_logic_vector((abits -1) downto 0);
clka, clkb : in std_logic;
dia : in std_logic_vector((dbits -1) downto 0);
dob : out std_logic_vector((dbits -1) downto 0);
mea, wea, meb, oeb : in std_logic
);
end;
architecture behavioral of virage_2pram_sim is
subtype word is std_logic_vector((dbits -1) downto 0);
type mem is array(0 to (words-1)) of word;
begin
main : process(clka, clkb, oeb, mea, meb, wea)
variable memarr : mem;
variable doint : std_logic_vector((dbits -1) downto 0);
begin
if rising_edge(clka) and (mea = '1') and not is_x(addra) then
if (wea = '1') then memarr(to_integer(unsigned(addra)) mod words) := dia; end if;
end if;
if rising_edge(clkb) and (meb = '1') and not is_x(addrb) then
doint := memarr(to_integer(unsigned(addrb)) mod words);
end if;
if oeb = '1' then dob <= doint;
else dob <= (others => 'Z'); end if;
end process;
end behavioral;
-- synchronous dual-port ram
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity virage_dpram_sim is
generic (
abits : integer := 10;
dbits : integer := 8
);
port (
addra : in std_logic_vector((abits -1) downto 0);
clka : in std_logic;
dia : in std_logic_vector((dbits -1) downto 0);
doa : out std_logic_vector((dbits -1) downto 0);
mea, oea, wea : in std_logic;
addrb : in std_logic_vector((abits -1) downto 0);
clkb : in std_logic;
dib : in std_logic_vector((dbits -1) downto 0);
dob : out std_logic_vector((dbits -1) downto 0);
meb, oeb, web : in std_logic
);
end;
architecture behavioral of virage_dpram_sim is
subtype word is std_logic_vector((dbits -1) downto 0);
type mem is array(0 to (2**abits -1)) of word;
begin
main : process(clka, oea, mea, clkb, oeb, meb)
variable memarr : mem;
variable dointa, dointb : std_logic_vector((dbits -1) downto 0);
begin
if rising_edge(clka) and (mea = '1') and not is_x(addra) then
if (wea = '1') then memarr(to_integer(unsigned(addra))) := dia; end if;
dointa := memarr(to_integer(unsigned(addra)));
end if;
if oea = '1' then doa <= dointa;
else doa <= (others => 'Z'); end if;
if rising_edge(clkb) and (meb = '1') and not is_x(addrb) then
if (web = '1') then memarr(to_integer(unsigned(addrb))) := dib; end if;
dointb := memarr(to_integer(unsigned(addrb)));
end if;
if oeb = '1' then dob <= dointb;
else dob <= (others => 'Z'); end if;
end process;
end behavioral;
library ieee;
use ieee.std_logic_1164.all;
library virage;
use virage.virage_simprims.all;
entity hdss1_128x32cm4sw0ab is
port (
addr, taddr : in std_logic_vector(6 downto 0);
clk : in std_logic;
di, tdi : in std_logic_vector(31 downto 0);
do : out std_logic_vector(31 downto 0);
me, oe, we, tme, twe, awt, biste, toe : in std_logic
);
end;
architecture behavioral of hdss1_128x32cm4sw0ab is
begin
syncram0 : virage_syncram_sim
generic map ( abits => 7, dbits => 32)
port map ( addr, clk, di, do, me, oe, we);
end behavioral;
library ieee;
use ieee.std_logic_1164.all;
library virage;
use virage.virage_simprims.all;
entity hdss1_256x32cm4sw0ab is
port (
addr, taddr : in std_logic_vector(7 downto 0);
clk : in std_logic;
di, tdi : in std_logic_vector(31 downto 0);
do : out std_logic_vector(31 downto 0);
me, oe, we, tme, twe, awt, biste, toe : in std_logic
);
end;
architecture behavioral of hdss1_256x32cm4sw0ab is
begin
syncram0 : virage_syncram_sim
generic map ( abits => 8, dbits => 32)
port map ( addr, clk, di, do, me, oe, we);
end behavioral;
library ieee;
use ieee.std_logic_1164.all;
library virage;
use virage.virage_simprims.all;
entity hdss1_512x32cm4sw0ab is
port (
addr, taddr : in std_logic_vector(8 downto 0);
clk : in std_logic;
di, tdi : in std_logic_vector(31 downto 0);
do : out std_logic_vector(31 downto 0);
me, oe, we, tme, twe, awt, biste, toe : in std_logic
);
end;
architecture behavioral of hdss1_512x32cm4sw0ab is
begin
syncram0 : virage_syncram_sim
generic map ( abits => 9, dbits => 32)
port map ( addr, clk, di, do, me, oe, we);
end behavioral;
library ieee;
use ieee.std_logic_1164.all;
library virage;
use virage.virage_simprims.all;
entity hdss1_512x38cm4sw0ab is
port (
addr, taddr : in std_logic_vector(8 downto 0);
clk : in std_logic;
di, tdi : in std_logic_vector(37 downto 0);
do : out std_logic_vector(37 downto 0);
me, oe, we, tme, twe, awt, biste, toe : in std_logic
);
end;
architecture behavioral of hdss1_512x38cm4sw0ab is
begin
syncram0 : virage_syncram_sim
generic map ( abits => 9, dbits => 38)
port map ( addr, clk, di, do, me, oe, we);
end behavioral;
library ieee;
use ieee.std_logic_1164.all;
library virage;
use virage.virage_simprims.all;
entity hdss1_1024x32cm4sw0ab is
port (
addr, taddr : in std_logic_vector(9 downto 0);
clk : in std_logic;
di, tdi : in std_logic_vector(31 downto 0);
do : out std_logic_vector(31 downto 0);
me, oe, we, tme, twe, awt, biste, toe : in std_logic
);
end;
architecture behavioral of hdss1_1024x32cm4sw0ab is
begin
syncram0 : virage_syncram_sim
generic map ( abits => 10, dbits => 32)
port map ( addr, clk, di, do, me, oe, we);
end behavioral;
library ieee;
use ieee.std_logic_1164.all;
library virage;
use virage.virage_simprims.all;
entity hdss1_2048x32cm8sw0ab is
port (
addr, taddr : in std_logic_vector(10 downto 0);
clk : in std_logic;
di, tdi : in std_logic_vector(31 downto 0);
do : out std_logic_vector(31 downto 0);
me, oe, we, tme, twe, awt, biste, toe : in std_logic
);
end;
architecture behavioral of hdss1_2048x32cm8sw0ab is
begin
syncram0 : virage_syncram_sim
generic map ( abits => 11, dbits => 32)
port map ( addr, clk, di, do, me, oe, we);
end behavioral;
library ieee;
use ieee.std_logic_1164.all;
library virage;
use virage.virage_simprims.all;
entity hdss1_4096x36cm8sw0ab is
port (
addr, taddr : in std_logic_vector(11 downto 0);
clk : in std_logic;
di, tdi : in std_logic_vector(35 downto 0);
do : out std_logic_vector(35 downto 0);
me, oe, we, tme, twe, awt, biste, toe : in std_logic
);
end;
architecture behavioral of hdss1_4096x36cm8sw0ab is
begin
syncram0 : virage_syncram_sim
generic map ( abits => 12, dbits => 36)
port map ( addr, clk, di, do, me, oe, we);
end behavioral;
library ieee;
use ieee.std_logic_1164.all;
library virage;
use virage.virage_simprims.all;
entity hdss1_16384x8cm16sw0 is
port (
addr : in std_logic_vector(13 downto 0);
clk : in std_logic;
di : in std_logic_vector(7 downto 0);
do : out std_logic_vector(7 downto 0);
me, oe, we : in std_logic
);
end;
architecture behavioral of hdss1_16384x8cm16sw0 is
begin
syncram0 : virage_syncram_sim
generic map ( abits => 14, dbits => 8)
port map ( addr, clk, di, do, me, oe, we);
end behavioral;
-- 2-port syncronous ram
library ieee;
use ieee.std_logic_1164.all;
library virage;
use virage.virage_simprims.all;
entity rfss2_136x32cm2sw0ab is
port (
addra, taddra : in std_logic_vector(7 downto 0);
addrb, taddrb : in std_logic_vector(7 downto 0);
clka, clkb : in std_logic;
dia, tdia : in std_logic_vector(31 downto 0);
dob : out std_logic_vector(31 downto 0);
mea, wea, tmea, twea, bistea : in std_logic;
meb, oeb, tmeb, awtb, bisteb, toeb : in std_logic
);
end;
architecture behavioral of rfss2_136x32cm2sw0ab is
begin
syncram0 : virage_2pram_sim
generic map ( abits => 8, dbits => 32, words => 136)
port map ( addra, addrb, clka, clkb, dia, dob, mea, wea, meb, oeb);
end behavioral;
library ieee;
use ieee.std_logic_1164.all;
library virage;
use virage.virage_simprims.all;
entity rfss2_136x40cm2sw0ab is
port (
addra, taddra : in std_logic_vector(7 downto 0);
addrb, taddrb : in std_logic_vector(7 downto 0);
clka, clkb : in std_logic;
dia, tdia : in std_logic_vector(39 downto 0);
dob : out std_logic_vector(39 downto 0);
mea, wea, tmea, twea, bistea : in std_logic;
meb, oeb, tmeb, awtb, bisteb, toeb : in std_logic
);
end;
architecture behavioral of rfss2_136x40cm2sw0ab is
begin
syncram0 : virage_2pram_sim
generic map ( abits => 8, dbits => 40, words => 136)
port map ( addra, addrb, clka, clkb, dia, dob, mea, wea, meb, oeb);
end behavioral;
library ieee;
use ieee.std_logic_1164.all;
library virage;
use virage.virage_simprims.all;
entity rfss2_168x32cm2sw0ab is
port (
addra, taddra : in std_logic_vector(7 downto 0);
addrb, taddrb : in std_logic_vector(7 downto 0);
clka, clkb : in std_logic;
dia, tdia : in std_logic_vector(31 downto 0);
dob : out std_logic_vector(31 downto 0);
mea, wea, tmea, twea, bistea : in std_logic;
meb, oeb, tmeb, awtb, bisteb, toeb : in std_logic
);
end;
architecture behavioral of rfss2_168x32cm2sw0ab is
begin
syncram0 : virage_2pram_sim
generic map ( abits => 8, dbits => 32, words => 168)
port map ( addra, addrb, clka, clkb, dia, dob, mea, wea, meb, oeb);
end behavioral;
-- dual-port syncronous ram
library ieee;
use ieee.std_logic_1164.all;
library virage;
use virage.virage_simprims.all;
entity hdss2_64x32cm4sw0ab is
port (
addra, taddra : in std_logic_vector(5 downto 0);
addrb, taddrb : in std_logic_vector(5 downto 0);
clka, clkb : in std_logic;
dia, tdia : in std_logic_vector(31 downto 0);
dib, tdib : in std_logic_vector(31 downto 0);
doa, dob : out std_logic_vector(31 downto 0);
mea, oea, wea, tmea, twea, awta, bistea, toea : in std_logic;
meb, oeb, web, tmeb, tweb, awtb, bisteb, toeb : in std_logic
);
end;
architecture behavioral of hdss2_64x32cm4sw0ab is
begin
syncram0 : virage_dpram_sim
generic map ( abits => 6, dbits => 32)
port map ( addra, clka, dia, doa, mea, oea, wea,
addrb, clkb, dib, dob, meb, oeb, web);
end behavioral;
library ieee;
use ieee.std_logic_1164.all;
library virage;
use virage.virage_simprims.all;
entity hdss2_128x32cm4sw0ab is
port (
addra, taddra : in std_logic_vector(6 downto 0);
addrb, taddrb : in std_logic_vector(6 downto 0);
clka, clkb : in std_logic;
dia, tdia : in std_logic_vector(31 downto 0);
dib, tdib : in std_logic_vector(31 downto 0);
doa, dob : out std_logic_vector(31 downto 0);
mea, oea, wea, tmea, twea, awta, bistea, toea : in std_logic;
meb, oeb, web, tmeb, tweb, awtb, bisteb, toeb : in std_logic
);
end;
architecture behavioral of hdss2_128x32cm4sw0ab is
begin
syncram0 : virage_dpram_sim
generic map ( abits => 7, dbits => 32)
port map ( addra, clka, dia, doa, mea, oea, wea,
addrb, clkb, dib, dob, meb, oeb, web);
end behavioral;
library ieee;
use ieee.std_logic_1164.all;
library virage;
use virage.virage_simprims.all;
entity hdss2_256x32cm4sw0ab is
port (
addra, taddra : in std_logic_vector(7 downto 0);
addrb, taddrb : in std_logic_vector(7 downto 0);
clka, clkb : in std_logic;
dia, tdia : in std_logic_vector(31 downto 0);
dib, tdib : in std_logic_vector(31 downto 0);
doa, dob : out std_logic_vector(31 downto 0);
mea, oea, wea, tmea, twea, awta, bistea, toea : in std_logic;
meb, oeb, web, tmeb, tweb, awtb, bisteb, toeb : in std_logic
);
end;
architecture behavioral of hdss2_256x32cm4sw0ab is
begin
syncram0 : virage_dpram_sim
generic map ( abits => 8, dbits => 32)
port map ( addra, clka, dia, doa, mea, oea, wea,
addrb, clkb, dib, dob, meb, oeb, web);
end behavioral;
library ieee;
use ieee.std_logic_1164.all;
library virage;
use virage.virage_simprims.all;
entity hdss2_512x32cm4sw0ab is
port (
addra, taddra : in std_logic_vector(8 downto 0);
addrb, taddrb : in std_logic_vector(8 downto 0);
clka, clkb : in std_logic;
dia, tdia : in std_logic_vector(31 downto 0);
dib, tdib : in std_logic_vector(31 downto 0);
doa, dob : out std_logic_vector(31 downto 0);
mea, oea, wea, tmea, twea, awta, bistea, toea : in std_logic;
meb, oeb, web, tmeb, tweb, awtb, bisteb, toeb : in std_logic
);
end;
architecture behavioral of hdss2_512x32cm4sw0ab is
begin
syncram0 : virage_dpram_sim
generic map ( abits => 9, dbits => 32)
port map ( addra, clka, dia, doa, mea, oea, wea,
addrb, clkb, dib, dob, meb, oeb, web);
end behavioral;
library ieee;
use ieee.std_logic_1164.all;
library virage;
use virage.virage_simprims.all;
entity hdss2_512x38cm4sw0ab is
port (
addra, taddra : in std_logic_vector(8 downto 0);
addrb, taddrb : in std_logic_vector(8 downto 0);
clka, clkb : in std_logic;
dia, tdia : in std_logic_vector(37 downto 0);
dib, tdib : in std_logic_vector(37 downto 0);
doa, dob : out std_logic_vector(37 downto 0);
mea, oea, wea, tmea, twea, awta, bistea, toea : in std_logic;
meb, oeb, web, tmeb, tweb, awtb, bisteb, toeb : in std_logic
);
end;
architecture behavioral of hdss2_512x38cm4sw0ab is
begin
syncram0 : virage_dpram_sim
generic map ( abits => 9, dbits => 38)
port map ( addra, clka, dia, doa, mea, oea, wea,
addrb, clkb, dib, dob, meb, oeb, web);
end behavioral;
library ieee;
use ieee.std_logic_1164.all;
library virage;
use virage.virage_simprims.all;
entity hdss2_8192x8cm16sw0ab is
port (
addra, taddra : in std_logic_vector(12 downto 0);
addrb, taddrb : in std_logic_vector(12 downto 0);
clka, clkb : in std_logic;
dia, tdia : in std_logic_vector(7 downto 0);
dib, tdib : in std_logic_vector(7 downto 0);
doa, dob : out std_logic_vector(7 downto 0);
mea, oea, wea, tmea, twea, awta, bistea, toea : in std_logic;
meb, oeb, web, tmeb, tweb, awtb, bisteb, toeb : in std_logic
);
end;
architecture behavioral of hdss2_8192x8cm16sw0ab is
begin
syncram0 : virage_dpram_sim
generic map ( abits => 13, dbits => 8)
port map ( addra, clka, dia, doa, mea, oea, wea,
addrb, clkb, dib, dob, meb, oeb, web);
end behavioral;
-- pragma translate_on
|
gpl-3.0
|
EliasLuiz/TCC
|
Leon3/lib/grlib/stdlib/testlib.vhd
|
1
|
31886
|
------------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2003 - 2008, Gaisler Research
-- Copyright (C) 2008 - 2014, Aeroflex Gaisler
-- Copyright (C) 2015 - 2016, Cobham Gaisler
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-----------------------------------------------------------------------------
-- package: testlib
-- file: testlib.vhd
-- author: Marko Isomaki - Aeroflex Gaisler
-- description: package for common vhdl functions for testbenches
------------------------------------------------------------------------------
-- pragma translate_off
library std;
use std.standard.all;
use std.textio.all;
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use ieee.math_real.all;
library grlib;
use grlib.stdio.all;
use grlib.stdlib.tost;
-- pragma translate_on
package testlib is
-- pragma translate_off
type octet_vector is array (natural range <>) of std_logic_vector(7 downto 0);
subtype data_vector8 is octet_vector;
type data_vector16 is array (natural range <>) of std_logic_vector(15 downto 0);
type data_vector32 is array (natural range <>) of std_logic_vector(31 downto 0);
type data_vector64 is array (natural range <>) of std_logic_vector(63 downto 0);
type data_vector128 is array (natural range <>) of std_logic_vector(127 downto 0);
type data_vector256 is array (natural range <>) of std_logic_vector(255 downto 0);
type nibble_vector is array (natural range <>) of std_logic_vector(3 downto 0);
subtype data_vector is data_vector32;
-----------------------------------------------------------------------------
-- compare function handling '-'. c is the expected data parameter. If it is
--'-' or 'U' then this bit is not compared. Returns true if the vectors match
-----------------------------------------------------------------------------
function compare(o, c: in std_logic_vector) return boolean;
-----------------------------------------------------------------------------
-- compare function handling '-'
-----------------------------------------------------------------------------
function compare(o, c: in std_ulogic_vector) return boolean;
-----------------------------------------------------------------------------
-- this procedure prints a message to standard output. Also includes the time
-- at which it occurs.
-----------------------------------------------------------------------------
procedure print(
constant comment: in string := "-";
constant severe: in severity_level := note;
constant screen: in boolean := true);
-----------------------------------------------------------------------------
-- synchronisation with respect to clock and with output offset
-----------------------------------------------------------------------------
procedure synchronise(
signal clock: in std_ulogic;
constant offset: in time := 5 ns;
constant enable: in boolean := true);
-----------------------------------------------------------------------------
-- this procedure initialises the test error counters. Used in testbenches
-- with a test variable to check if a subtest has failed and at the end how
-- many subtests have failed. This procedure is called before the first
-- subtest
-----------------------------------------------------------------------------
procedure tinitialise(
variable test: inout boolean;
variable testcount: inout integer);
-----------------------------------------------------------------------------
-- this procedure completes the sub-test. Called at the end of each subtest
-----------------------------------------------------------------------------
procedure tintermediate(
variable test: inout boolean;
variable testcount: inout integer);
-----------------------------------------------------------------------------
-- this procedure completes the test. Called at the end of the complete test
-----------------------------------------------------------------------------
procedure tterminate(
variable test: inout boolean;
variable testcount: inout integer);
-----------------------------------------------------------------------------
-- check std_logic_vector array
-----------------------------------------------------------------------------
procedure check(
variable tp: inout boolean;
constant received: in std_logic_vector;
constant expected: in std_logic_vector;
constant message: in string := "");
-----------------------------------------------------------------------------
-- check std_logic
-----------------------------------------------------------------------------
procedure check(
variable tp: inout boolean;
constant received: in std_logic;
constant expected: in std_logic;
constant message: in string := "");
-----------------------------------------------------------------------------
-- check std_ulogic_vector array
-----------------------------------------------------------------------------
procedure check(
variable tp: inout boolean;
constant received: in std_ulogic_vector;
constant expected: in std_ulogic_vector;
constant message: in string := "");
-----------------------------------------------------------------------------
-- check natural
-----------------------------------------------------------------------------
procedure check(
variable tp: inout boolean;
constant received: in natural;
constant expected: in natural;
constant message: in string := "");
-----------------------------------------------------------------------------
-- check time
-----------------------------------------------------------------------------
procedure check(
variable tp: inout boolean;
constant received: in time;
constant expected: in time;
constant spread: in time;
constant message: in string := "");
-----------------------------------------------------------------------------
-- check boolean
-----------------------------------------------------------------------------
procedure check(
variable tp: inout boolean;
constant received: in boolean;
constant expected: in boolean;
constant message: in string := "");
-----------------------------------------------------------------------------
-- Convert Data_Vector to Octet_Vector
-----------------------------------------------------------------------------
function conv_octet_vector(
constant d: in data_vector)
return octet_vector;
-----------------------------------------------------------------------------
-- Convert Octet_Vector to Data_Vector, with padding
-----------------------------------------------------------------------------
function conv_data_vector(
constant o: in octet_vector)
return data_vector;
procedure compare(
constant data: in octet_vector;
constant cxdata: in octet_vector;
variable tP: inout boolean);
----------------------------------------------------------------------------
-- Read file contents to octet vector
----------------------------------------------------------------------------
--Expects data only in hex with four bytes on each line.
procedure readfile(
constant filename: in string := "";
constant filetype: in integer := 0;
constant size: in integer := 0;
variable dataout: out octet_vector);
--Reads bytes from a file with the format packets are output from ethereal
procedure readfile(
constant filename: in string := "";
constant size: in integer := 0;
variable dataout: out octet_vector);
----------------------------------------------------------------------------
-- Read file contents to data_vector
----------------------------------------------------------------------------
--Expects data only in hex with four bytes on each line.
procedure readfile(
constant filename: in string := "";
constant size: in integer := 0;
variable dataout: out data_vector);
--generates an random integer from 0 to the maximum value specified with max
procedure gen_rand_int(
constant max : in real;
variable seed1 : inout positive;
variable seed2 : inout positive;
variable rand : out integer);
--reverses std_logic_vector
function reverse(din : std_logic_vector) return std_logic_vector;
-- Returns offset to start of valid data for an access of size 'size' in
-- AMBA data vector
function ahb_doff (
constant dw : integer;
constant size : integer; -- access size
constant addr : std_logic_vector(4 downto 0))
return integer;
-- pragma translate_on
end package testlib;
-- pragma translate_off
--============================================================================--
package body testlib is
-----------------------------------------------------------------------------
-- compare function handling '-'
-----------------------------------------------------------------------------
function compare(o, c: in std_logic_vector) return boolean is
variable t: std_logic_vector(o'range) := c;
variable result: boolean;
begin
result := true;
for i in o'range loop
if not (o(i)=t(i) or t(i)='-' or t(i)='U') then
result := false;
end if;
end loop;
return result;
end function compare;
-----------------------------------------------------------------------------
-- compare function handling '-'
-----------------------------------------------------------------------------
function compare(o, c: in std_ulogic_vector) return boolean is
variable t: std_ulogic_vector(o'range) := c;
variable result: boolean;
begin
result := true;
for i in o'range loop
if not (o(i)=t(i) or t(i)='-' or t(i)='U') then
result := false;
end if;
end loop;
return result;
end function compare;
-----------------------------------------------------------------------------
-- this procedure prints a message to standard output
-----------------------------------------------------------------------------
procedure print(
constant comment: in string := "-";
constant severe: in severity_level := note;
constant screen: in boolean := true) is
variable l: line;
begin
if screen then
write(l, now, right, 15);
write(l, " : " & comment);
if severe = warning then
write(l, string'(" # warning, "));
elsif severe = error then
write(l, string'(" # error, "));
elsif severe = failure then
write(l, string'(" # failure, "));
end if;
writeline(output, l);
end if;
end procedure print;
-----------------------------------------------------------------------------
-- synchronisation with respect to clock and with output offset
-----------------------------------------------------------------------------
procedure synchronise(
signal clock: in std_ulogic;
constant offset: in time := 5 ns;
constant enable: in boolean := true) is
begin
if enable then
wait until clock = '1'; -- synchronise
wait for offset; -- output offset delay
end if;
end procedure synchronise;
-----------------------------------------------------------------------------
-- this procedure initialises the test error counters
-----------------------------------------------------------------------------
procedure tinitialise(
variable test: inout boolean;
variable testcount: inout integer) is
begin
--------------------------------------------------------------------------
-- initialise test status
--------------------------------------------------------------------------
test := true; -- reset any errors
testcount := 0;
print("--=========================================================--");
print("*** test initialised ***");
print("--=========================================================--");
end procedure tinitialise;
-----------------------------------------------------------------------------
-- this procedure completes the sub-test
-----------------------------------------------------------------------------
procedure tintermediate(
variable test: inout boolean;
variable testcount: inout integer) is
variable l: line;
begin
--------------------------------------------------------------------------
-- report test status
--------------------------------------------------------------------------
wait for 10 us;
print("--=========================================================--");
if test then
print("*** sub-test completed successfully ***");
if testcount > 0 then
write(l, now, right, 15);
write(l, string'(" : "));
write(l, testcount);
write(l, string'(" sub-test(s) ended with one or more errors."));
writeline(output, l);
end if;
else
print("*** sub-test completed with errors -- # error # -- ***");
testcount := testcount + 1;
test := true;
if testcount > 0 then
write(l, now, right, 15);
write(l, string'(" : "));
write(l, testcount);
write(l, string'(" sub-test(s) ended with one or more errors."));
writeline(output, l);
end if;
end if;
print("--=========================================================--");
end procedure tintermediate;
-----------------------------------------------------------------------------
-- this procedure completes the test
-----------------------------------------------------------------------------
procedure tterminate(
variable test: inout boolean;
variable testcount: inout integer) is
variable l: line;
begin
--------------------------------------------------------------------------
-- end of test
--------------------------------------------------------------------------
wait for 1 ms;
print("--=========================================================--");
if testcount = 0 then
print("*** test completed successfully ***");
else
print("*** test completed with errors -- # error # -- ***");
write(l, now, right, 15);
write(l, string'(" : "));
write(l, testcount);
write(l, string'(" sub-test(s) ended with one or more errors."));
writeline(output, l);
end if;
print("--=========================================================--");
report "---- end of test ----"
severity failure;
wait;
end procedure tterminate;
-----------------------------------------------------------------------------
-- check std_logic_vector array
-----------------------------------------------------------------------------
procedure check(
variable tp: inout boolean;
constant received: in std_logic_vector;
constant expected: in std_logic_vector;
constant message: in string := "") is
variable l: line;
constant padding: std_logic_vector(1 to
(4-(received'length mod 4))) :=
(others => '0');
begin
if not compare(received, expected) then
write(l, now, right, 15);
write(l, string'(" : ") & message & string'(" :"));
write(l, string'(" received: "));
if padding'length > 0 and padding'length < 4 then
hwrite(l, padding & std_logic_vector(received));
else
hwrite(l, std_logic_vector(received));
end if;
write(l, string'(" expected: "));
if padding'length > 0 and padding'length < 4 then
hwrite(l, padding & std_logic_vector(expected));
else
hwrite(l, std_logic_vector(expected));
end if;
write(l, string'(" # error"));
writeline(output, l);
tp := false;
end if;
end procedure check;
-----------------------------------------------------------------------------
-- check std_logic
-----------------------------------------------------------------------------
procedure check(
variable tp: inout boolean;
constant received: in std_logic;
constant expected: in std_logic;
constant message: in string := "") is
variable l: line;
begin
if not (to_x01z(received)=to_x01z(expected)) then
write(l, now, right, 15);
write(l, string'(" : ") & message & string'(" :"));
write(l, string'(" received: "));
write(l, received);
write(l, string'(" expected: "));
write(l, expected);
write(l, string'(" # error"));
writeline(output, l);
tp := false;
end if;
end procedure check;
-----------------------------------------------------------------------------
-- check std_ulogic_vector array
-----------------------------------------------------------------------------
procedure check(
variable tp: inout boolean;
constant received: in std_ulogic_vector;
constant expected: in std_ulogic_vector;
constant message: in string := "") is
variable l: line;
constant padding: std_ulogic_vector(1 to
(4-(received'length mod 4))) :=
(others => '0');
begin
if not compare(received, expected) then
write(l, now, right, 15);
write(l, string'(" : ") & message & string'(" :"));
write(l, string'(" received: "));
if padding'length > 0 and padding'length < 4 then
hwrite(l, std_logic_vector(padding) & std_logic_vector(received));
else
hwrite(l, std_logic_vector(received));
end if;
write(l, string'(" expected: "));
if padding'length > 0 and padding'length < 4 then
hwrite(l, std_logic_vector(padding) & std_logic_vector(expected));
else
hwrite(l, std_logic_vector(expected));
end if;
write(l, string'(" # error"));
writeline(output, l);
tp := false;
end if;
end procedure check;
-----------------------------------------------------------------------------
-- check natural
-----------------------------------------------------------------------------
procedure check(
variable tp: inout boolean;
constant received: in natural;
constant expected: in natural;
constant message: in string := "") is
variable l: line;
begin
if received /= expected then
write(l, now, right, 15);
write(l, string'(" : ") & message & string'(" :"));
write(l, string'(" received: "));
write(l, received);
write(l, string'(" expected: "));
write(l, expected);
write(l, string'(" # error"));
writeline(output, l);
tp := false;
end if;
end procedure check;
-----------------------------------------------------------------------------
-- check time
-----------------------------------------------------------------------------
procedure check(
variable tp: inout boolean;
constant received: in time;
constant expected: in time;
constant spread: in time;
constant message: in string := "") is
variable l: line;
begin
if (received > expected+spread) or
(received < expected-spread) then
write(l, now, right, 15);
write(l, string'(" : ") & message & string'(" :"));
write(l, string'(" received: "));
write(l, received);
write(l, string'(" expected: "));
write(l, expected);
write(l, string'(" # error"));
writeline(output, l);
tp := false;
end if;
end procedure check;
-----------------------------------------------------------------------------
-- check boolean
-----------------------------------------------------------------------------
procedure check(
variable tp: inout boolean;
constant received: in boolean;
constant expected: in boolean;
constant message: in string := "") is
variable l: line;
begin
if received /= expected then
write(l, now, right, 15);
write(l, string'(" : ") & message & string'(" :"));
write(l, string'(" received: "));
write(l, received);
write(l, string'(" expected: "));
write(l, expected);
write(l, string'(" # error"));
writeline(output, l);
tp := false;
end if;
end procedure check;
-----------------------------------------------------------------------------
-- Convert Data_Vector to Octet_Vector
-----------------------------------------------------------------------------
function conv_octet_vector(
constant d: in data_vector)
return octet_vector is
variable o: octet_vector(0 to d'Length*4-1);
begin
for i in o'range loop
o(i) := d(i/4)((3-(i mod 4))*8+7 downto (3-(i mod 4))*8);
end loop;
return o;
end function conv_octet_vector;
-----------------------------------------------------------------------------
-- Convert Octet_Vector to Data_Vector, with padding
-----------------------------------------------------------------------------
function conv_data_vector(
constant o: in octet_vector)
return data_vector is
variable d: data_vector(0 to (1+(o'Length-1)/4)-1);
begin
for i in o'Range loop
d(i/4)((3-(i mod 4))*8+7 downto (3-(i mod 4))*8) := o(i);
end loop;
return d;
end function conv_data_vector;
procedure compare(
constant data: in octet_vector;
constant cxdata: in octet_vector;
variable tp: inout boolean) is
begin
if (data'length /= cxdata'length) then
tp := false;
print("compare error: lengths do not match");
else
for i in data'low to data'low+data'length-1 loop
if not compare(data(i), cxdata(i)) then
tp := false;
print("compare error. index: " & tost(i) & " data: " & tost(data(i)) & " expected: " & tost(cxdata(i)));
end if;
end loop;
end if;
end compare;
function FromChar(C: Character) return Std_Logic_Vector is
variable R: Std_Logic_Vector(0 to 3);
begin
case C is
when '0' => R := "0000";
when '1' => R := "0001";
when '2' => R := "0010";
when '3' => R := "0011";
when '4' => R := "0100";
when '5' => R := "0101";
when '6' => R := "0110";
when '7' => R := "0111";
when '8' => R := "1000";
when '9' => R := "1001";
when 'A' => R := "1010";
when 'B' => R := "1011";
when 'C' => R := "1100";
when 'D' => R := "1101";
when 'E' => R := "1110";
when 'F' => R := "1111";
when 'a' => R := "1010";
when 'b' => R := "1011";
when 'c' => R := "1100";
when 'd' => R := "1101";
when 'e' => R := "1110";
when 'f' => R := "1111";
when others => R := "XXXX";
end case;
return R;
end FromChar;
procedure readfile(
constant filename: in string := "";
constant filetype: in integer := 0;
constant size: in integer := 0;
variable dataout: out octet_vector) is
file readfile: text;
variable l: line;
variable test: boolean := true;
variable count: integer := 0;
variable dtmp: std_logic_vector(31 downto 0);
variable data: octet_vector(0 to size-1);
variable i: integer := 0;
variable good: boolean := true;
variable c: character;
begin
if size /= 0 then
if filename = "" then
print("no file given");
else
if filetype = 0 then
file_open(readfile, filename, read_mode);
while not endfile(readfile) loop
readline(readfile, l);
hread(l, dtmp, test);
if (not test) then
print("illegal data in file");
exit;
end if;
for i in 0 to 3 loop
data(count) := dtmp(31-i*8 downto 24-i*8);
count := count + 1;
if count >= size then
exit;
end if;
end loop;
if count >= size then
exit;
end if;
end loop;
if count < size then
print("not enough data in file");
else
for i in 0 to size-1 loop
dataout(dataout'low+i) := data(i);
end loop;
end if;
else
file_open(readfile, filename, read_mode);
while not endfile(readfile) loop
readline(readfile, L);
while (i < 4) loop
Read(L, C, good);
if not good then
Print("Error in read data");
exit;
end if;
if (C = character'val(32)) or (C = character'val(160)) or (C = HT) then
next;
else
i := i + 1;
end if;
end loop;
i := 0;
while (i < 32) loop
Read(L, C, good);
if not good then
Print("Error in read data");
exit;
end if;
if (C = character'val(32)) or (C = character'val(160)) or (C = HT) then
next;
else
if (i mod 2) = 0 then
data(count)(7 downto 4) := fromchar(C);
else
data(count)(3 downto 0) := fromchar(C);
-- Print(tost(data(count)));
count := count + 1;
if count >= size then
exit;
end if;
end if;
i := i + 1;
end if;
end loop;
i := 0;
end loop;
if count < size then
Print("Not enough data in file");
else
dataout := data;
end if;
end if;
end if;
else
print("size is zero. no data read");
end if;
end procedure;
procedure readfile(
constant filename: in string := "";
constant size: in integer := 0;
variable dataout: out octet_vector) is
begin
readfile(filename, 0, size, dataout);
end procedure;
procedure readfile(
constant filename: in string := "";
constant size: in integer := 0;
variable dataout: out data_vector) is
file readfile: text;
variable l: line;
variable test: boolean := true;
variable count: integer := 0;
variable data: data_vector(0 to size/4);
begin
if size /= 0 then
if filename = "" then
print("no file given");
else
file_open(readfile, filename, read_mode);
while not endfile(readfile) loop
readline(readfile, l);
hread(l, data(count/4), test);
if (not test) then
print("illegal data in file");
exit;
end if;
count := count + 4;
if count >= size then
exit;
end if;
end loop;
if count < size then
print("not enough data in file");
else
if (size mod 4) = 0 then
dataout(dataout'low to dataout'low+data'high-1) :=
data(0 to data'high-1);
else
dataout(dataout'low to dataout'low+data'high) := data(0 to data'high);
end if;
end if;
end if;
else
print("size is zero. no data read");
end if;
end procedure;
procedure gen_rand_int(
constant max : in real;
variable seed1 : inout positive;
variable seed2 : inout positive;
variable rand : out integer) is
variable rand_tmp : real;
begin
uniform(seed1, seed2, rand_tmp);
rand := integer(floor(rand_tmp*max));
end procedure;
function reverse(din : std_logic_vector)
return std_logic_vector is
variable dout: std_logic_vector(din'REVERSE_RANGE);
begin
for i in din'RANGE loop dout(i) := din(i); end loop;
return dout;
end function reverse;
function ahb_doff (
constant dw : integer;
constant size : integer;
constant addr : std_logic_vector(4 downto 0))
return integer is
variable off : integer;
begin -- ahb_doff
if size < 256 and dw = 256 and addr(4) = '0' then off := 128; else off := 0; end if;
if size < 128 and dw >= 128 and addr(3) = '0' then off := off + 64; end if;
if size < 64 and dw >= 64 and addr(2) = '0' then off := off + 32; end if;
if size < 32 and addr(1) = '0' then off := off + 16; end if;
if size < 16 and addr(0) = '0' then off := off + 8; end if;
return off;
end ahb_doff;
end package body ; --=======================================--
-- pragma translate_on
|
gpl-3.0
|
EliasLuiz/TCC
|
Leon3/lib/gaisler/srmmu/mmuconfig.vhd
|
1
|
22453
|
------------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2003 - 2008, Gaisler Research
-- Copyright (C) 2008 - 2014, Aeroflex Gaisler
-- Copyright (C) 2015 - 2016, Cobham Gaisler
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-----------------------------------------------------------------------------
-- Package: mmuconfig
-- File: mmuconfig.vhd
-- Author: Konrad Eisele, Jiri Gaisler, Gaisler Research
-- Description: MMU types and constants
------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
library grlib;
use grlib.stdlib.all;
library gaisler;
package mmuconfig is
constant M_CTX_SZ : integer := 8;
constant M_ENT_MAX : integer := 64;
constant XM_ENT_MAX_LOG : integer := log2(M_ENT_MAX);
constant M_ENT_MAX_LOG : integer := XM_ENT_MAX_LOG;
type mmu_idcache is (id_icache, id_dcache);
-- ##############################################################
-- 1.0 virtual address [sparc V8: p.243,Appx.H,Figure H-4]
-- +--------+--------+--------+---------------+
-- a) | INDEX1 | INDEX2 | INDEX3 | OFFSET |
-- +--------+--------+--------+---------------+
-- 31 24 23 18 17 12 11 0
constant VA_I1_SZ : integer := 8;
constant VA_I2_SZ : integer := 6;
constant VA_I3_SZ : integer := 6;
constant VA_I_SZ : integer := VA_I1_SZ+VA_I2_SZ+VA_I3_SZ;
constant VA_I_MAX : integer := 8;
constant VA_I1_U : integer := 31;
constant VA_I1_D : integer := 32-VA_I1_SZ;
constant VA_I2_U : integer := 31-VA_I1_SZ;
constant VA_I2_D : integer := 32-VA_I1_SZ-VA_I2_SZ;
constant VA_I3_U : integer := 31-VA_I1_SZ-VA_I2_SZ;
constant VA_I3_D : integer := 32-VA_I_SZ;
constant VA_I_U : integer := 31;
constant VA_I_D : integer := 32-VA_I_SZ;
constant VA_OFF_U : integer := 31-VA_I_SZ;
constant VA_OFF_D : integer := 0;
constant VA_OFFCTX_U : integer := 31;
constant VA_OFFCTX_D : integer := 0;
constant VA_OFFREG_U : integer := 31-VA_I1_SZ;
constant VA_OFFREG_D : integer := 0;
constant VA_OFFSEG_U : integer := 31-VA_I1_SZ-VA_I2_SZ;
constant VA_OFFSEG_D : integer := 0;
constant VA_OFFPAG_U : integer := 31-VA_I_SZ;
constant VA_OFFPAG_D : integer := 0;
-- 8k pages
-- 7 6 6 13
-- +--------+--------+--------+---------------+
-- a) | INDEX1 | INDEX2 | INDEX3 | OFFSET |
-- +--------+--------+--------+---------------+
-- 31 25 24 19 18 13 12 0
constant P8K_VA_I1_SZ : integer := 7;
constant P8K_VA_I2_SZ : integer := 6;
constant P8K_VA_I3_SZ : integer := 6;
constant P8K_VA_I_SZ : integer := P8K_VA_I1_SZ+P8K_VA_I2_SZ+P8K_VA_I3_SZ;
constant P8K_VA_I_MAX : integer := 7;
constant P8K_VA_I1_U : integer := 31;
constant P8K_VA_I1_D : integer := 32-P8K_VA_I1_SZ;
constant P8K_VA_I2_U : integer := 31-P8K_VA_I1_SZ;
constant P8K_VA_I2_D : integer := 32-P8K_VA_I1_SZ-P8K_VA_I2_SZ;
constant P8K_VA_I3_U : integer := 31-P8K_VA_I1_SZ-P8K_VA_I2_SZ;
constant P8K_VA_I3_D : integer := 32-P8K_VA_I_SZ;
constant P8K_VA_I_U : integer := 31;
constant P8K_VA_I_D : integer := 32-P8K_VA_I_SZ;
constant P8K_VA_OFF_U : integer := 31-P8K_VA_I_SZ;
constant P8K_VA_OFF_D : integer := 0;
constant P8K_VA_OFFCTX_U : integer := 31;
constant P8K_VA_OFFCTX_D : integer := 0;
constant P8K_VA_OFFREG_U : integer := 31-P8K_VA_I1_SZ;
constant P8K_VA_OFFREG_D : integer := 0;
constant P8K_VA_OFFSEG_U : integer := 31-P8K_VA_I1_SZ-P8K_VA_I2_SZ;
constant P8K_VA_OFFSEG_D : integer := 0;
constant P8K_VA_OFFPAG_U : integer := 31-P8K_VA_I_SZ;
constant P8K_VA_OFFPAG_D : integer := 0;
-- 16k pages
-- 6 6 6 14
-- +--------+--------+--------+---------------+
-- a) | INDEX1 | INDEX2 | INDEX3 | OFFSET |
-- +--------+--------+--------+---------------+
-- 31 26 25 20 19 14 13 0
constant P16K_VA_I1_SZ : integer := 6;
constant P16K_VA_I2_SZ : integer := 6;
constant P16K_VA_I3_SZ : integer := 6;
constant P16K_VA_I_SZ : integer := P16K_VA_I1_SZ+P16K_VA_I2_SZ+P16K_VA_I3_SZ;
constant P16K_VA_I_MAX : integer := 6;
constant P16K_VA_I1_U : integer := 31;
constant P16K_VA_I1_D : integer := 32-P16K_VA_I1_SZ;
constant P16K_VA_I2_U : integer := 31-P16K_VA_I1_SZ;
constant P16K_VA_I2_D : integer := 32-P16K_VA_I1_SZ-P16K_VA_I2_SZ;
constant P16K_VA_I3_U : integer := 31-P16K_VA_I1_SZ-P16K_VA_I2_SZ;
constant P16K_VA_I3_D : integer := 32-P16K_VA_I_SZ;
constant P16K_VA_I_U : integer := 31;
constant P16K_VA_I_D : integer := 32-P16K_VA_I_SZ;
constant P16K_VA_OFF_U : integer := 31-P16K_VA_I_SZ;
constant P16K_VA_OFF_D : integer := 0;
constant P16K_VA_OFFCTX_U : integer := 31;
constant P16K_VA_OFFCTX_D : integer := 0;
constant P16K_VA_OFFREG_U : integer := 31-P16K_VA_I1_SZ;
constant P16K_VA_OFFREG_D : integer := 0;
constant P16K_VA_OFFSEG_U : integer := 31-P16K_VA_I1_SZ-P16K_VA_I2_SZ;
constant P16K_VA_OFFSEG_D : integer := 0;
constant P16K_VA_OFFPAG_U : integer := 31-P16K_VA_I_SZ;
constant P16K_VA_OFFPAG_D : integer := 0;
-- 32k pages
-- 4 7 6 15
-- +--------+--------+--------+---------------+
-- a) | INDEX1 | INDEX2 | INDEX3 | OFFSET |
-- +--------+--------+--------+---------------+
-- 31 28 27 21 20 15 14 0
constant P32K_VA_I1_SZ : integer := 4;
constant P32K_VA_I2_SZ : integer := 7;
constant P32K_VA_I3_SZ : integer := 6;
constant P32K_VA_I_SZ : integer := P32K_VA_I1_SZ+P32K_VA_I2_SZ+P32K_VA_I3_SZ;
constant P32K_VA_I_MAX : integer := 7;
constant P32K_VA_I1_U : integer := 31;
constant P32K_VA_I1_D : integer := 32-P32K_VA_I1_SZ;
constant P32K_VA_I2_U : integer := 31-P32K_VA_I1_SZ;
constant P32K_VA_I2_D : integer := 32-P32K_VA_I1_SZ-P32K_VA_I2_SZ;
constant P32K_VA_I3_U : integer := 31-P32K_VA_I1_SZ-P32K_VA_I2_SZ;
constant P32K_VA_I3_D : integer := 32-P32K_VA_I_SZ;
constant P32K_VA_I_U : integer := 31;
constant P32K_VA_I_D : integer := 32-P32K_VA_I_SZ;
constant P32K_VA_OFF_U : integer := 31-P32K_VA_I_SZ;
constant P32K_VA_OFF_D : integer := 0;
constant P32K_VA_OFFCTX_U : integer := 31;
constant P32K_VA_OFFCTX_D : integer := 0;
constant P32K_VA_OFFREG_U : integer := 31-P32K_VA_I1_SZ;
constant P32K_VA_OFFREG_D : integer := 0;
constant P32K_VA_OFFSEG_U : integer := 31-P32K_VA_I1_SZ-P32K_VA_I2_SZ;
constant P32K_VA_OFFSEG_D : integer := 0;
constant P32K_VA_OFFPAG_U : integer := 31-P32K_VA_I_SZ;
constant P32K_VA_OFFPAG_D : integer := 0;
-- ##############################################################
-- 2.0 PAGE TABE DESCRIPTOR (PTD) [sparc V8: p.247,Appx.H,Figure H-7]
--
-- +-------------------------------------------------+---+---+
-- | Page Table Pointer (PTP) | 0 | 0 |
-- +-------------------------------------------------+---+---+
-- 31 2 1 0
--
-- 2.1 PAGE TABE ENTRY (PTE) [sparc V8: p.247,Appx.H,Figure H-8]
--
-- +-----------------------------+---+---+---+-----------+---+
-- |Physical Page Number (PPN) | C | M | R | ACC | ET|
-- +-----------------------------+---+---+---+-----------+---+
-- 31 8 7 6 5 4 2 1 0
--
constant PTD_PTP_U : integer := 31; -- PTD: page table pointer
constant PTD_PTP_D : integer := 2;
constant PTD_PTP32_U : integer := 27; -- PTD: page table pointer 32 bit
constant PTD_PTP32_D : integer := 2;
constant PTE_PPN_U : integer := 31; -- PTE: physical page number
constant PTE_PPN_D : integer := 8;
constant PTE_PPN_S : integer := (PTE_PPN_U+1)-PTE_PPN_D; -- PTE: pysical page number size
constant PTE_PPN32_U : integer := 27; -- PTE: physical page number 32 bit addr
constant PTE_PPN32_D : integer := 8;
constant PTE_PPN32_S : integer := (PTE_PPN32_U+1)-PTE_PPN32_D; -- PTE: pysical page number 32 bit size
constant PTE_PPN32REG_U : integer := PTE_PPN32_U; -- PTE: pte part of merged result address
constant PTE_PPN32REG_D : integer := PTE_PPN32_U+1-VA_I1_SZ;
constant PTE_PPN32SEG_U : integer := PTE_PPN32_U;
constant PTE_PPN32SEG_D : integer := PTE_PPN32_U+1-VA_I1_SZ-VA_I2_SZ;
constant PTE_PPN32PAG_U : integer := PTE_PPN32_U;
constant PTE_PPN32PAG_D : integer := PTE_PPN32_U+1-VA_I_SZ;
-- 8k pages
constant P8K_PTE_PPN32REG_U : integer := PTE_PPN32_U; -- PTE: pte part of merged result address
constant P8K_PTE_PPN32REG_D : integer := PTE_PPN32_U+1-P8K_VA_I1_SZ;
constant P8K_PTE_PPN32SEG_U : integer := PTE_PPN32_U;
constant P8K_PTE_PPN32SEG_D : integer := PTE_PPN32_U+1-P8K_VA_I1_SZ-P8K_VA_I2_SZ;
constant P8K_PTE_PPN32PAG_U : integer := PTE_PPN32_U;
constant P8K_PTE_PPN32PAG_D : integer := PTE_PPN32_U+1-P8K_VA_I_SZ;
-- 16k pages
constant P16K_PTE_PPN32REG_U : integer := PTE_PPN32_U; -- PTE: pte part of merged result address
constant P16K_PTE_PPN32REG_D : integer := PTE_PPN32_U+1-P16K_VA_I1_SZ;
constant P16K_PTE_PPN32SEG_U : integer := PTE_PPN32_U;
constant P16K_PTE_PPN32SEG_D : integer := PTE_PPN32_U+1-P16K_VA_I1_SZ-P16K_VA_I2_SZ;
constant P16K_PTE_PPN32PAG_U : integer := PTE_PPN32_U;
constant P16K_PTE_PPN32PAG_D : integer := PTE_PPN32_U+1-P16K_VA_I_SZ;
-- 32k pages
constant P32K_PTE_PPN32REG_U : integer := PTE_PPN32_U; -- PTE: pte part of merged result address
constant P32K_PTE_PPN32REG_D : integer := PTE_PPN32_U+1-P32K_VA_I1_SZ;
constant P32K_PTE_PPN32SEG_U : integer := PTE_PPN32_U;
constant P32K_PTE_PPN32SEG_D : integer := PTE_PPN32_U+1-P32K_VA_I1_SZ-P32K_VA_I2_SZ;
constant P32K_PTE_PPN32PAG_U : integer := PTE_PPN32_U;
constant P32K_PTE_PPN32PAG_D : integer := PTE_PPN32_U+1-P32K_VA_I_SZ;
constant PTE_C : integer := 7; -- PTE: Cacheable bit
constant PTE_M : integer := 6; -- PTE: Modified bit
constant PTE_R : integer := 5; -- PTE: Reference Bit - a "1" indicates an PTE
constant PTE_ACC_U : integer := 4; -- PTE: Access field
constant PTE_ACC_D : integer := 2;
constant ACC_W : integer := 2; -- PTE::ACC : write permission
constant ACC_E : integer := 3; -- PTE::ACC : exec permission
constant ACC_SU : integer := 4; -- PTE::ACC : privileged
constant PT_ET_U : integer := 1; -- PTD/PTE: PTE Type
constant PT_ET_D : integer := 0;
constant ET_INV : std_logic_vector(1 downto 0) := "00";
constant ET_PTD : std_logic_vector(1 downto 0) := "01";
constant ET_PTE : std_logic_vector(1 downto 0) := "10";
constant ET_RVD : std_logic_vector(1 downto 0) := "11";
constant PADDR_PTD_U : integer := 31;
constant PADDR_PTD_D : integer := 6;
-- ##############################################################
-- 3.0 TLBCAM TAG hardware representation (TTG)
--
type tlbcam_reg is record
ET : std_logic_vector(1 downto 0); -- et field
ACC : std_logic_vector(2 downto 0); -- on flush/probe this will become FPTY
M : std_logic; -- modified
R : std_logic; -- referenced
SU : std_logic; -- equal ACC >= 6
VALID : std_logic;
LVL : std_logic_vector(1 downto 0); -- level in pth
I1 : std_logic_vector(7 downto 0); -- vaddr
I2 : std_logic_vector(5 downto 0);
I3 : std_logic_vector(5 downto 0);
CTX : std_logic_vector(M_CTX_SZ-1 downto 0); -- ctx number
PPN : std_logic_vector(PTE_PPN_S-1 downto 0); -- physical page number
C : std_logic; -- cachable
end record;
constant tlbcam_reg_none : tlbcam_reg := ("00", "000", '0', '0', '0', '0',
"00", "00000000", "000000", "000000", "00000000", (others => '0'), '0');
-- tlbcam_reg::LVL
constant LVL_PAGE : std_logic_vector(1 downto 0) := "00"; -- equal tlbcam_tfp::TYP FPTY_PAGE
constant LVL_SEGMENT : std_logic_vector(1 downto 0) := "01"; -- equal tlbcam_tfp::TYP FPTY_SEGMENT
constant LVL_REGION : std_logic_vector(1 downto 0) := "10"; -- equal tlbcam_tfp::TYP FPTY_REGION
constant LVL_CTX : std_logic_vector(1 downto 0) := "11"; -- equal tlbcam_tfp::TYP FPTY_CTX
-- ##############################################################
-- 4.0 TLBCAM tag i/o for translation/flush/(probe)
--
type tlbcam_tfp is record
TYP : std_logic_vector(2 downto 0); -- f/(p) type
I1 : std_logic_vector(7 downto 0); -- vaddr
I2 : std_logic_vector(5 downto 0);
I3 : std_logic_vector(5 downto 0);
CTX : std_logic_vector(M_CTX_SZ-1 downto 0); -- ctx number
M : std_logic;
end record;
constant tlbcam_tfp_none : tlbcam_tfp := ("000", "00000000", "000000", "000000", "00000000", '0');
--tlbcam_tfp::TYP
constant FPTY_PAGE : std_logic_vector(2 downto 0) := "000"; -- level 3 PTE match I1+I2+I3
constant FPTY_SEGMENT : std_logic_vector(2 downto 0) := "001"; -- level 2/3 PTE/PTD match I1+I2
constant FPTY_REGION : std_logic_vector(2 downto 0) := "010"; -- level 1/2/3 PTE/PTD match I1
constant FPTY_CTX : std_logic_vector(2 downto 0) := "011"; -- level 0/1/2/3 PTE/PTD ctx
constant FPTY_N : std_logic_vector(2 downto 0) := "100"; -- entire tlb
-- ##############################################################
-- 5.0 MMU Control Register [sparc V8: p.253,Appx.H,Figure H-10]
--
-- +-------+-----+------------------+-----+-------+--+--+
-- | IMPL | VER | SC | PSO | resvd |NF|E |
-- +-------+-----+------------------+-----+-------+--+--+
-- 31 28 27 24 23 8 7 6 2 1 0
--
-- MMU Context Pointer [sparc V8: p.254,Appx.H,Figure H-11]
-- +-------------------------------------------+--------+
-- | Context Table Pointer | resvd |
-- +-------------------------------------------+--------+
-- 31 2 1 0
--
-- MMU Context Number [sparc V8: p.255,Appx.H,Figure H-12]
-- +----------------------------------------------------+
-- | Context Table Pointer |
-- +----------------------------------------------------+
-- 31 0
--
-- fault status/address register [sparc V8: p.256,Appx.H,Table H-13/14]
-- +------------+-----+---+----+----+-----+----+
-- | reserved | EBE | L | AT | FT | FAV | OW |
-- +------------+-----+---+----+----+-----+----+
-- 31 18 17 10 9 8 7 5 4 2 1 0
--
-- +----------------------------------------------------+
-- | fault address register |
-- +----------------------------------------------------+
-- 31 0
constant MMCTRL_CTXP_SZ : integer := 30;
constant MMCTRL_PTP32_U : integer := 25;
constant MMCTRL_PTP32_D : integer := 0;
constant MMCTRL_E : integer := 0;
constant MMCTRL_NF : integer := 1;
constant MMCTRL_PSO : integer := 7;
constant MMCTRL_SC_U : integer := 23;
constant MMCTRL_SC_D : integer := 8;
constant MMCTRL_PGSZ_U : integer := 17;
constant MMCTRL_PGSZ_D : integer := 16;
constant MMCTRL_VER_U : integer := 27;
constant MMCTRL_VER_D : integer := 24;
constant MMCTRL_IMPL_U : integer := 31;
constant MMCTRL_IMPL_D : integer := 28;
constant MMCTRL_TLBDIS : integer := 15;
constant MMCTRL_TLBSEP : integer := 14;
constant MMCTXP_U : integer := 31;
constant MMCTXP_D : integer := 2;
constant MMCTXNR_U : integer := M_CTX_SZ-1;
constant MMCTXNR_D : integer := 0;
constant FS_SZ : integer := 18; -- fault status size
constant FS_EBE_U : integer := 17;
constant FS_EBE_D : integer := 10;
constant FS_L_U : integer := 9;
constant FS_L_D : integer := 8;
constant FS_L_CTX : std_logic_vector(1 downto 0) := "00";
constant FS_L_L1 : std_logic_vector(1 downto 0) := "01";
constant FS_L_L2 : std_logic_vector(1 downto 0) := "10";
constant FS_L_L3 : std_logic_vector(1 downto 0) := "11";
constant FS_AT_U : integer := 7;
constant FS_AT_D : integer := 5;
constant FS_AT_LS : natural := 7; --L=0 S=1
constant FS_AT_ID : natural := 6; --D=0 I=1
constant FS_AT_SU : natural := 5; --U=0 SU=1
constant FS_AT_LUDS : std_logic_vector(2 downto 0) := "000";
constant FS_AT_LSDS : std_logic_vector(2 downto 0) := "001";
constant FS_AT_LUIS : std_logic_vector(2 downto 0) := "010";
constant FS_AT_LSIS : std_logic_vector(2 downto 0) := "011";
constant FS_AT_SUDS : std_logic_vector(2 downto 0) := "100";
constant FS_AT_SSDS : std_logic_vector(2 downto 0) := "101";
constant FS_AT_SUIS : std_logic_vector(2 downto 0) := "110";
constant FS_AT_SSIS : std_logic_vector(2 downto 0) := "111";
constant FS_FT_U : integer := 4;
constant FS_FT_D : integer := 2;
constant FS_FT_NONE : std_logic_vector(2 downto 0) := "000";
constant FS_FT_INV : std_logic_vector(2 downto 0) := "001";
constant FS_FT_PRO : std_logic_vector(2 downto 0) := "010";
constant FS_FT_PRI : std_logic_vector(2 downto 0) := "011";
constant FS_FT_TRANS : std_logic_vector(2 downto 0):= "100";
constant FS_FT_BUS : std_logic_vector(2 downto 0) := "101";
constant FS_FT_INT : std_logic_vector(2 downto 0) := "110";
constant FS_FT_RVD : std_logic_vector(2 downto 0) := "111";
constant FS_FAV : natural := 1;
constant FS_OW : natural := 0;
--# mmu ctrl reg
type mmctrl_type1 is record
e : std_logic; -- enable
nf : std_logic; -- no fault
pso : std_logic; -- partial store order
-- pre : std_logic; -- pretranslation source
-- pri : std_logic; -- i/d priority
pagesize : std_logic_vector(1 downto 0);-- page size
ctx : std_logic_vector(M_CTX_SZ-1 downto 0);-- context nr
ctxp : std_logic_vector(MMCTRL_CTXP_SZ-1 downto 0); -- context table pointer
tlbdis : std_logic; -- tlb disabled
bar : std_logic_vector(1 downto 0); -- preplace barrier
end record;
constant mmctrl_type1_none : mmctrl_type1 := ('0', '0', '0', (others => '0'), (others => '0'), (others => '0'), '0', (others => '0'));
--# fault status reg
type mmctrl_fs_type is record
ow : std_logic;
fav : std_logic;
ft : std_logic_vector(2 downto 0); -- fault type
at_ls : std_logic; -- access type, load/store
at_id : std_logic; -- access type, i/dcache
at_su : std_logic; -- access type, su/user
l : std_logic_vector(1 downto 0); -- level
ebe : std_logic_vector(7 downto 0);
end record;
constant mmctrl_fs_zero : mmctrl_fs_type :=
('0', '0', "000", '0', '0', '0', "00", "00000000");
type mmctrl_type2 is record
fs : mmctrl_fs_type;
valid : std_logic;
fa : std_logic_vector(VA_I_SZ-1 downto 0); -- fault address register
end record;
constant mmctrl2_zero : mmctrl_type2 :=
(mmctrl_fs_zero, '0', zero32(VA_I_SZ-1 downto 0));
-- ##############################################################
-- 6. Virtual Flush/Probe address [sparc V8: p.249,Appx.H,Figure H-9]
-- +---------------------------------------+--------+-------+
-- | VIRTUAL FLUSH&Probe Address (VFPA) | type | rvd |
-- +---------------------------------------+--------+-------+
-- 31 12 11 8 7 0
--
--
subtype FPA is natural range 31 downto 12;
constant FPA_I1_U : integer := 31;
constant FPA_I1_D : integer := 24;
constant FPA_I2_U : integer := 23;
constant FPA_I2_D : integer := 18;
constant FPA_I3_U : integer := 17;
constant FPA_I3_D : integer := 12;
constant FPTY_U : integer := 10; -- only 3 bits
constant FPTY_D : integer := 8;
-- ##############################################################
-- 7. control register virtual address [sparc V8: p.253,Appx.H,Table H-5]
-- +---------------------------------+-----+--------+
-- | | CNR | rsvd |
-- +---------------------------------+-----+--------+
-- 31 10 8 7 0
constant CNR_U : integer := 10;
constant CNR_D : integer := 8;
constant CNR_CTRL : std_logic_vector(2 downto 0) := "000";
constant CNR_CTXP : std_logic_vector(2 downto 0) := "001";
constant CNR_CTX : std_logic_vector(2 downto 0) := "010";
constant CNR_F : std_logic_vector(2 downto 0) := "011";
constant CNR_FADDR : std_logic_vector(2 downto 0) := "100";
-- ##############################################################
-- 8. Precise flush (ASI 0x10-14) [sparc V8: p.266,Appx.I]
-- supported: ASI_FLUSH_PAGE
-- ASI_FLUSH_CTX
constant PFLUSH_PAGE : std_logic := '0';
constant PFLUSH_CTX : std_logic := '1';
-- ##############################################################
-- 9. Diagnostic access
--
constant DIAGF_LVL_U : integer := 1;
constant DIAGF_LVL_D : integer := 0;
constant DIAGF_WR : integer := 3;
constant DIAGF_HIT : integer := 4;
constant DIAGF_CTX_U : integer := 12;
constant DIAGF_CTX_D : integer := 5;
constant DIAGF_VALID : integer := 13;
end mmuconfig;
|
gpl-3.0
|
EliasLuiz/TCC
|
Leon3/lib/grlib/dftlib/dftlib.vhd
|
1
|
2063
|
------------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2003 - 2008, Gaisler Research
-- Copyright (C) 2008 - 2014, Aeroflex Gaisler
-- Copyright (C) 2015 - 2016, Cobham Gaisler
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-----------------------------------------------------------------------------
-- Package: dftlib
-- File: dftlib.vhd
-- Author: Magnus Hjorth - Aeroflex Gaisler
-- Description: Package for ASIC design-for-test functionality
------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
package dftlib is
-----------------------------------------------------------------------------
-- Synchronous I/O test module
-----------------------------------------------------------------------------
component synciotest is
generic (
ninputs : integer;
noutputs : integer;
nbidir : integer;
dirmode : integer := 0
);
port (
clk: in std_ulogic;
rstn: in std_ulogic;
datain: in std_logic_vector(ninputs+nbidir-1 downto 0);
dataout: out std_logic_vector(noutputs+nbidir-1 downto 0);
tmode: in std_logic_vector(5 downto 0);
tmodeact: out std_ulogic;
tmodeoe: out std_ulogic
);
end component;
end;
|
gpl-3.0
|
EliasLuiz/TCC
|
Leon3/designs/leon3-altera-c5ekit/config.vhd
|
1
|
5501
|
-----------------------------------------------------------------------------
-- LEON3 Demonstration design test bench configuration
-- Copyright (C) 2009 Aeroflex Gaisler
------------------------------------------------------------------------------
library techmap;
use techmap.gencomp.all;
package config is
-- Technology and synthesis options
constant CFG_FABTECH : integer := altera;
constant CFG_MEMTECH : integer := altera;
constant CFG_PADTECH : integer := altera;
constant CFG_TRANSTECH : integer := GTP0;
constant CFG_NOASYNC : integer := 0;
constant CFG_SCAN : integer := 0;
-- LEON3 processor core
constant CFG_LEON3 : integer := 1;
constant CFG_NCPU : integer := (1);
constant CFG_NWIN : integer := (8);
constant CFG_V8 : integer := 2 + 4*0;
constant CFG_MAC : integer := 0;
constant CFG_BP : integer := 0;
constant CFG_SVT : integer := 0;
constant CFG_RSTADDR : integer := 16#00000#;
constant CFG_LDDEL : integer := (1);
constant CFG_NOTAG : integer := 0;
constant CFG_NWP : integer := (0);
constant CFG_PWD : integer := 0*2;
constant CFG_FPU : integer := 0 + 16*0 + 32*0;
constant CFG_GRFPUSH : integer := 0;
constant CFG_ICEN : integer := 1;
constant CFG_ISETS : integer := 1;
constant CFG_ISETSZ : integer := 4;
constant CFG_ILINE : integer := 8;
constant CFG_IREPL : integer := 0;
constant CFG_ILOCK : integer := 0;
constant CFG_ILRAMEN : integer := 0;
constant CFG_ILRAMADDR: integer := 16#8E#;
constant CFG_ILRAMSZ : integer := 1;
constant CFG_DCEN : integer := 1;
constant CFG_DSETS : integer := 1;
constant CFG_DSETSZ : integer := 4;
constant CFG_DLINE : integer := 8;
constant CFG_DREPL : integer := 0;
constant CFG_DLOCK : integer := 0;
constant CFG_DSNOOP : integer := 0 + 1*2 + 4*0;
constant CFG_DFIXED : integer := 16#0#;
constant CFG_DLRAMEN : integer := 0;
constant CFG_DLRAMADDR: integer := 16#8F#;
constant CFG_DLRAMSZ : integer := 1;
constant CFG_MMUEN : integer := 0;
constant CFG_ITLBNUM : integer := 2;
constant CFG_DTLBNUM : integer := 2;
constant CFG_TLB_TYPE : integer := 1 + 0*2;
constant CFG_TLB_REP : integer := 1;
constant CFG_MMU_PAGE : integer := 0;
constant CFG_DSU : integer := 1;
constant CFG_ITBSZ : integer := 1 + 64*0;
constant CFG_ATBSZ : integer := 1;
constant CFG_AHBPF : integer := 0;
constant CFG_LEON3FT_EN : integer := 0;
constant CFG_IUFT_EN : integer := 0;
constant CFG_FPUFT_EN : integer := 0;
constant CFG_RF_ERRINJ : integer := 0;
constant CFG_CACHE_FT_EN : integer := 0;
constant CFG_CACHE_ERRINJ : integer := 0;
constant CFG_LEON3_NETLIST: integer := 0;
constant CFG_DISAS : integer := 0 + 0;
constant CFG_PCLOW : integer := 2;
constant CFG_STAT_ENABLE : integer := 0;
constant CFG_STAT_CNT : integer := 1;
constant CFG_STAT_NMAX : integer := 0;
constant CFG_STAT_DSUEN : integer := 0;
constant CFG_NP_ASI : integer := 0;
constant CFG_WRPSR : integer := 0;
constant CFG_ALTWIN : integer := 0;
constant CFG_REX : integer := 0;
-- AMBA settings
constant CFG_DEFMST : integer := (0);
constant CFG_RROBIN : integer := 1;
constant CFG_SPLIT : integer := 0;
constant CFG_FPNPEN : integer := 0;
constant CFG_AHBIO : integer := 16#FFF#;
constant CFG_APBADDR : integer := 16#800#;
constant CFG_AHB_MON : integer := 0;
constant CFG_AHB_MONERR : integer := 0;
constant CFG_AHB_MONWAR : integer := 0;
constant CFG_AHB_DTRACE : integer := 0;
-- DSU UART
constant CFG_AHB_UART : integer := 1;
-- JTAG based DSU interface
constant CFG_AHB_JTAG : integer := 1;
-- Ethernet DSU
constant CFG_DSU_ETH : integer := 1 + 0 + 0;
constant CFG_ETH_BUF : integer := 2;
constant CFG_ETH_IPM : integer := 16#C0A8#;
constant CFG_ETH_IPL : integer := 16#0033#;
constant CFG_ETH_ENM : integer := 16#020000#;
constant CFG_ETH_ENL : integer := 16#000000#;
-- SSRAM controller
constant CFG_SSCTRL : integer := 0;
constant CFG_SSCTRLP16 : integer := 0;
-- I2C master
constant CFG_I2C_ENABLE : integer := 1;
-- AHB ROM
constant CFG_AHBROMEN : integer := 1;
constant CFG_AHBROPIP : integer := 0;
constant CFG_AHBRODDR : integer := 16#000#;
constant CFG_ROMADDR : integer := 16#100#;
constant CFG_ROMMASK : integer := 16#E00# + 16#100#;
-- AHB RAM
constant CFG_AHBRAMEN : integer := 0;
constant CFG_AHBRSZ : integer := 1;
constant CFG_AHBRADDR : integer := 16#A00#;
constant CFG_AHBRPIPE : integer := 0;
-- Gaisler Ethernet core
constant CFG_GRETH : integer := 1;
constant CFG_GRETH1G : integer := 0;
constant CFG_ETH_FIFO : integer := 8;
-- Gaisler Ethernet core
constant CFG_GRETH2 : integer := 1;
constant CFG_GRETH21G : integer := 0;
constant CFG_ETH2_FIFO : integer := 8;
-- UART 1
constant CFG_UART1_ENABLE : integer := 1;
constant CFG_UART1_FIFO : integer := 8;
-- LEON3 interrupt controller
constant CFG_IRQ3_ENABLE : integer := 1;
constant CFG_IRQ3_NSEC : integer := 0;
-- Modular timer
constant CFG_GPT_ENABLE : integer := 1;
constant CFG_GPT_NTIM : integer := (2);
constant CFG_GPT_SW : integer := (8);
constant CFG_GPT_TW : integer := (32);
constant CFG_GPT_IRQ : integer := (8);
constant CFG_GPT_SEPIRQ : integer := 1;
constant CFG_GPT_WDOGEN : integer := 0;
constant CFG_GPT_WDOG : integer := 16#0#;
-- GPIO port
constant CFG_GRGPIO_ENABLE : integer := 1;
constant CFG_GRGPIO_IMASK : integer := 16#000F#;
constant CFG_GRGPIO_WIDTH : integer := (2);
-- GRLIB debugging
constant CFG_DUART : integer := 0;
end;
|
gpl-3.0
|
EliasLuiz/TCC
|
Leon3/lib/techmap/saed32/clkgen_saed32.vhd
|
1
|
5051
|
------------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2003 - 2008, Gaisler Research
-- Copyright (C) 2008 - 2014, Aeroflex Gaisler
-- Copyright (C) 2015 - 2016, Cobham Gaisler
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-----------------------------------------------------------------------------
-- Entity: clkgen_saed32
-- File: clkgen_saed32.vhd
-- Author: Fredrik Ringhage - Aeroflex Gaisler AB
-- Description: Clock generator for SAED32
------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
library techmap;
use techmap.gencomp.all;
entity clkgen_saed32 is
port (
clkin : in std_logic;
clk : out std_logic; -- main clock
clk2x : out std_logic; -- 2x clock
sdclk : out std_logic; -- SDRAM clock
pciclk : out std_logic; -- PCI clock
cgi : in clkgen_in_type;
cgo : out clkgen_out_type;
clk4x : out std_logic; -- 4x clock
clk1xu : out std_logic; -- unscaled 1X clock
clk2xu : out std_logic); -- unscaled 2X clock
end;
architecture struct of clkgen_saed32 is
component PLL
port (
-- VDD25 : in std_logic;
-- DVDD : inout std_logic;
-- VSSA : in std_logic;
-- AVDD : inout std_logic;
REF_CLK : in std_logic;
FB_CLK : in std_logic;
FB_MODE : in std_logic;
PLL_BYPASS : in std_logic;
CLK_4X : out std_logic;
CLK_2X : out std_logic;
CLK_1X : out std_logic);
end component;
-----------------------------------------------------------------------------
-- attributes
-----------------------------------------------------------------------------
attribute DONT_TOUCH : Boolean;
attribute DONT_TOUCH of pll0 : label is True;
begin
pll0 : PLL port map (
-- VDD25 => '1',
-- DVDD => open,
-- VSSA => '0',
-- AVDD => open,
REF_CLK => clkin,
FB_CLK => cgi.pllref,
FB_MODE => cgi.pllctrl(1),
PLL_BYPASS => cgi.pllctrl(0),
CLK_4X => clk4x,
CLK_2X => clk2x,
CLK_1X => clk
);
cgo.clklock <= '1';
sdclk <= '0';
pciclk <= '0';
cgo.pcilock <= '1';
clk1xu <= '0';
clk2xu <= '0';
end;
library ieee;
use ieee.std_logic_1164.all;
-- pragma translate_off
--library saed32;
--use saed32.CGLPPSX4_LVT;
-- pragma translate_on
entity clkand_saed32 is
port (
i : in std_ulogic;
en : in std_ulogic;
o : out std_ulogic;
tsten : in std_ulogic := '0');
end clkand_saed32;
architecture rtl of clkand_saed32 is
component CGLPPSX4_LVT
port (
GCLK : out std_ulogic;
CLK : in std_ulogic;
EN : in std_ulogic;
SE : in std_ulogic
);
end component;
attribute DONT_TOUCH : Boolean;
attribute DONT_TOUCH of gate : label is True;
begin
gate: CGLPPSX4_LVT port map (GCLK => o , CLK => i , EN => en, SE => tsten);
end rtl;
library ieee;
use ieee.std_logic_1164.all;
-- pragma translate_off
--library saed32;
--use saed32.MUX21X1_LVT;
-- pragma translate_on
entity clkmux_saed32 is
port (
i0 : in std_ulogic;
i1 : in std_ulogic;
sel : in std_ulogic;
o : out std_ulogic);
end clkmux_saed32;
architecture rtl of clkmux_saed32 is
component MUX21X1_LVT
port (
Y : out std_ulogic;
A1 : in std_ulogic;
A2 : in std_ulogic;
S0 : in std_ulogic
);
end component;
attribute DONT_TOUCH : Boolean;
attribute DONT_TOUCH of m0 : label is True;
begin
m0: MUX21X1_LVT port map (A1 => i0 , A2 => i1 , S0 => sel, Y => o);
end rtl;
library ieee;
use ieee.std_logic_1164.all;
-- pragma translate_off
--library saed32;
--use saed32.INVX4_LVT;
-- pragma translate_on
entity clkinv_saed32 is
port (
i : in std_ulogic;
o : out std_ulogic);
end clkinv_saed32;
architecture rtl of clkinv_saed32 is
component INVX4_LVT
port (
Y : out std_ulogic;
A : in std_ulogic
);
end component;
attribute DONT_TOUCH : Boolean;
attribute DONT_TOUCH of gate : label is True;
begin
gate: INVX4_LVT port map (A => i , Y => o);
end rtl;
|
gpl-3.0
|
GLADICOS/SPACEWIRESYSTEMC
|
rtl/RTL_VJ/SpaceWireCODECIPLinkInterface.vhdl
|
1
|
22367
|
------------------------------------------------------------------------------
-- The MIT License (MIT)
--
-- Copyright (c) <2013> <Shimafuji Electric Inc., Osaka University, JAXA>
--
-- Permission is hereby granted, free of charge, to any person obtaining a copy
-- of this software and associated documentation files (the "Software"), to deal
-- in the Software without restriction, including without limitation the rights
-- to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
-- copies of the Software, and to permit persons to whom the Software is
-- furnished to do so, subject to the following conditions:
--
-- The above copyright notice and this permission notice shall be included in
-- all copies or substantial portions of the Software.
--
-- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
-- AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
-- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
-- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
-- THE SOFTWARE.
-------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.all;
use IEEE.STD_LOGIC_ARITH.all;
use IEEE.STD_LOGIC_UNSIGNED.all;
library work;
use work.SpaceWireCODECIPPackage.all;
entity SpaceWireCODECIPLinkInterface is
generic (
gDisconnectCountValue : integer := 141;
gTimer6p4usValue : integer := 640;
gTimer12p8usValue : integer := 1280;
gTransmitClockDivideValue : std_logic_vector (5 downto 0) := "001001"
);
port (
clock : in std_logic;
reset : in std_logic;
-- state machine.
transmitClock : in std_logic;
linkStart : in std_logic;
linkDisable : in std_logic;
autoStart : in std_logic;
linkStatus : out std_logic_vector (15 downto 0);
errorStatus : out std_logic_vector (7 downto 0);
spaceWireResetOut : out std_logic;
FIFOAvailable : in std_logic;
-- transmitter.
tickIn : in std_logic;
timeIn : in std_logic_vector (5 downto 0);
controlFlagsIn : in std_logic_vector (1 downto 0);
transmitDataEnable : in std_logic;
transmitData : in std_logic_vector (7 downto 0);
transmitDataControlFlag : in std_logic;
transmitReady : out std_logic;
transmitClockDivideValue : in std_logic_vector(5 downto 0);
creditCount : out std_logic_vector (5 downto 0);
outstndingCount : out std_logic_vector (5 downto 0);
-- receiver.
receiveClock : in std_logic;
tickOut : out std_logic;
timeOut : out std_logic_vector (5 downto 0);
controlFlagsOut : out std_logic_vector (1 downto 0);
receiveFIFOWriteEnable1 : out std_logic;
receiveData : out std_logic_vector (7 downto 0);
receiveDataControlFlag : out std_logic;
receiveFIFOCount : in std_logic_vector(5 downto 0);
-- serial i/o.
spaceWireDataOut : out std_logic;
spaceWireStrobeOut : out std_logic;
spaceWireDataIn : in std_logic;
spaceWireStrobeIn : in std_logic;
statisticalInformationClear : in std_logic;
statisticalInformation : out bit32X8Array
);
end SpaceWireCODECIPLinkInterface;
architecture Behavioral of SpaceWireCODECIPLinkInterface is
component SpaceWireCODECIPReceiverSynchronize is
generic (
gDisconnectCountValue : integer := 141
);
port (
spaceWireStrobeIn : in std_logic;
spaceWireDataIn : in std_logic;
receiveDataOut : out std_logic_vector (8 downto 0);
receiveDataValidOut : out std_logic;
receiveTimeCodeOut : out std_logic_vector (7 downto 0);
receiveTimeCodeValidOut : out std_logic;
receiveNCharacterOut : out std_logic;
receiveFCTOut : out std_logic;
receiveNullOut : out std_logic;
receiveEEPOut : out std_logic;
receiveEOPOut : out std_logic;
receiveOffOut : out std_logic;
receiverErrorOut : out std_logic;
parityErrorOut : out std_logic;
escapeErrorOut : out std_logic;
disconnectErrorOut : out std_logic;
receiveFIFOWriteEnable : out std_logic;
enableReceive : in std_logic;
spaceWireReset : in std_logic;
receiveClock : in std_logic
);
end component;
component SpaceWireCODECIPTransmitter
generic (
gInitializeTransmitClockDivideValue : std_logic_vector (5 downto 0) := "001001"
);
port (
transmitClock : in std_logic;
clock : in std_logic;
receiveClock : in std_logic;
reset : in std_logic;
spaceWireDataOut : out std_logic;
spaceWireStrobeOut : out std_logic;
tickIn : in std_logic;
timeIn : in std_logic_vector (5 downto 0);
controlFlagsIn : in std_logic_vector (1 downto 0);
transmitDataEnable : in std_logic;
transmitData : in std_logic_vector (7 downto 0);
transmitDataControlFlag : in std_logic;
transmitReady : out std_logic;
enableTransmit : in std_logic;
sendNulls : in std_logic;
sendFCTs : in std_logic;
sendNCharacters : in std_logic;
sendTimeCodes : in std_logic;
gotFCT : in std_logic;
gotNCharacter : in std_logic;
receiveFIFOCount : in std_logic_vector(5 downto 0);
creditError : out std_logic;
transmitClockDivide : in std_logic_vector(5 downto 0);
creditCountOut : out std_logic_vector (5 downto 0);
outstandingCountOut : out std_logic_vector (5 downto 0);
spaceWireResetOut : in std_logic;
transmitEEPAsynchronous : out std_logic;
transmitEOPAsynchronous : out std_logic;
transmitByteAsynchronous : out std_logic
);
end component;
component SpaceWireCODECIPStateMachine
port (
clock : in std_logic;
receiveClock : in std_logic;
reset : in std_logic;
after12p8us : in std_logic;
after6p4us : in std_logic;
linkStart : in std_logic;
linkDisable : in std_logic;
autoStart : in std_logic;
enableTransmit : out std_logic;
sendNulls : out std_logic;
sendFCTs : out std_logic;
sendNCharacter : out std_logic;
sendTimeCodes : out std_logic;
gotTimeCode : in std_logic;
gotFCT : in std_logic;
gotNCharacter : in std_logic;
gotNull : in std_logic;
gotBit : in std_logic;
creditError : in std_logic;
receiveError : in std_logic;
enableReceive : out std_logic;
characterSequenceError : out std_logic;
spaceWireResetOut : out std_logic;
FIFOAvailable : in std_logic;
timer6p4usReset : out std_logic;
timer12p8usStart : out std_logic;
linkUpTransitionSynchronize : out std_logic;
linkDownTransitionSynchronize : out std_logic;
linkUpEnable : out std_logic;
nullSynchronize : out std_logic;
fctSynchronize : out std_logic
);
end component;
component SpaceWireCODECIPTimer is
generic (
gTimer6p4usValue : integer := 640;
gTimer12p8usValue : integer := 1280
);
port (
clock : in std_logic;
reset : in std_logic;
timer6p4usReset : in std_logic;
timer12p8usStart : in std_logic;
after6p4us : out std_logic;
after12p8us : out std_logic
);
end component;
component SpaceWireCODECIPStatisticalInformationCount is
port (
clock : in std_logic;
reset : in std_logic;
transmitClock : in std_logic;
receiveClock : in std_logic;
receiveEEPAsynchronous : in std_logic;
receiveEOPAsynchronous : in std_logic;
receiveByteAsynchronous : in std_logic;
transmitEEPAsynchronous : in std_logic;
transmitEOPAsynchronous : in std_logic;
transmitByteAsynchronous : in std_logic;
linkUpTransition : in std_logic;
linkDownTransition : in std_logic;
linkUpEnable : in std_logic;
nullSynchronous : in std_logic;
fctSynchronous : in std_logic;
statisticalInformationClear : in std_logic;
statisticalInformation : out bit32X8Array;
characterMonitor : out std_logic_vector(6 downto 0)
);
end component;
component SpaceWireCODECIPTimeCodeControl is
port (
clock : in std_logic;
reset : in std_logic;
receiveClock : in std_logic;
gotTimeCode : in std_logic;
receiveTimeCodeOut : in std_logic_vector(7 downto 0);
timeOut : out std_logic_vector(5 downto 0);
controlFlagsOut : out std_logic_vector(1 downto 0);
tickOut : out std_logic
);
end component;
signal gotFCT : std_logic;
signal gotTimeCode : std_logic;
signal gotNCharacter : std_logic;
signal gotNull : std_logic;
signal iGotBit : std_logic;
signal iCreditError : std_logic;
signal parityError : std_logic;
signal escapeError : std_logic;
signal disconnectError : std_logic;
signal receiveError : std_logic;
signal enableReceive : std_logic;
signal sendNCharactors : std_logic;
signal sendTimeCode : std_logic;
signal after12p8us : std_logic;
signal after6p4us : std_logic;
signal enableTransmit : std_logic;
signal sendNulls : std_logic;
signal sendFCTs : std_logic;
signal spaceWireResetOutSignal : std_logic;
signal characterSequenceError : std_logic;
signal timer6p4usReset : std_logic;
signal timer12p8usStart : std_logic;
signal receiveFIFOWriteEnable0 : std_logic;
signal iReceiveFIFOWriteEnable1 : std_logic;
signal receiveOff : std_logic;
signal receiveTimeCodeOut : std_logic_vector(7 downto 0) := x"00";
signal linkUpTransitionSynchronize : std_logic;
signal linkDownTransitionSynchronize : std_logic;
signal linkUpEnable : std_logic;
signal nullSynchronize : std_logic;
signal fctSynchronize : std_logic;
signal receiveEEPAsynchronous : std_logic;
signal receiveEOPAsynchronous : std_logic;
signal receiveByteAsynchronous : std_logic;
signal transmitEEPAsynchronous : std_logic;
signal transmitEOPAsynchronous : std_logic;
signal transmitByteAsynchronous : std_logic;
signal characterMonitor : std_logic_vector(6 downto 0);
begin
spaceWireReceiver : SpaceWireCODECIPReceiverSynchronize
generic map (
gDisconnectCountValue => gDisconnectCountValue
)
port map (
receiveClock => receiveClock,
spaceWireDataIn => spaceWireDataIn,
spaceWireStrobeIn => spaceWireStrobeIn,
receiveDataOut(7 downto 0) => receiveData,
receiveDataOut(8) => receiveDataControlFlag,
receiveDataValidOut => receiveByteAsynchronous,
receiveTimeCodeOut => receiveTimeCodeOut,
receiveFIFOWriteEnable => receiveFIFOWriteEnable0,
receiveFCTOut => gotFCT,
receiveTimeCodeValidOut => gotTimeCode,
receiveNCharacterOut => gotNCharacter,
receiveNullOut => gotNull,
receiveEEPOut => receiveEEPAsynchronous,
receiveEOPOut => receiveEOPAsynchronous,
receiveOffOut => receiveOff,
receiverErrorOut => receiveError,
parityErrorOut => parityError,
escapeErrorOut => escapeError,
disconnectErrorOut => disconnectError,
enableReceive => enableReceive,
spaceWireReset => spaceWireResetOutSignal
);
spaceWireTransmitter : SpaceWireCODECIPTransmitter
generic map (
gInitializeTransmitClockDivideValue => gTransmitClockDivideValue
)
port map (
transmitClock => transmitClock,
clock => clock,
receiveClock => receiveClock,
reset => reset,
spaceWireDataOut => spaceWireDataOut,
spaceWireStrobeOut => spaceWireStrobeOut,
tickIn => tickIn,
timeIn => timeIn,
controlFlagsIn => controlFlagsIn,
transmitDataEnable => transmitDataEnable,
transmitData => transmitData,
transmitDataControlFlag => transmitDataControlFlag,
transmitReady => transmitReady,
enableTransmit => enableTransmit,
--autoStart.
sendNulls => sendNulls,
sendFCTs => sendFCTs,
sendNCharacters => sendNCharactors,
sendTimeCodes => sendTimeCode,
--tx_fct.
gotFCT => gotFCT,
gotNCharacter => gotNCharacter,
receiveFIFOCount => receiveFIFOCount,
creditError => iCreditError,
transmitClockDivide => transmitClockDivideValue,
creditCountOut => creditCount,
outstandingCountOut => outstndingCount,
spaceWireResetOut => spaceWireResetOutSignal,
transmitEEPAsynchronous => transmitEEPAsynchronous,
transmitEOPAsynchronous => transmitEOPAsynchronous,
transmitByteAsynchronous => transmitByteAsynchronous
);
spaceWireStateMachine : SpaceWireCODECIPStateMachine
port map (
clock => clock,
receiveClock => receiveClock,
reset => reset,
after12p8us => after12p8us,
after6p4us => after6p4us,
linkStart => linkStart,
linkDisable => linkDisable,
autoStart => autoStart,
enableTransmit => enableTransmit,
sendNulls => sendNulls,
sendFCTs => sendFCTs,
sendNCharacter => sendNCharactors,
sendTimeCodes => sendTimeCode,
gotFCT => gotFCT,
gotTimeCode => gotTimeCode,
gotNCharacter => gotNCharacter,
gotNull => gotNull,
gotBit => iGotBit,
creditError => iCreditError,
receiveError => receiveError,
enableReceive => enableReceive,
characterSequenceError => characterSequenceError,
spaceWireResetOut => spaceWireResetOutSignal,
FIFOAvailable => FIFOAvailable,
timer6p4usReset => timer6p4usReset,
timer12p8usStart => timer12p8usStart,
linkUpTransitionSynchronize => linkUpTransitionSynchronize,
linkDownTransitionSynchronize => linkDownTransitionSynchronize,
linkUpEnable => linkUpEnable,
nullSynchronize => nullSynchronize,
fctSynchronize => fctSynchronize
);
spaceWireTimer : SpaceWireCODECIPTimer
generic map (
gTimer6p4usValue => gTimer6p4usValue,
gTimer12p8usValue => gTimer12p8usValue
)
port map (
clock => clock,
reset => reset,
timer6p4usReset => timer6p4usReset,
timer12p8usStart => timer12p8usStart,
after6p4us => after6p4us,
after12p8us => after12p8us
);
spaceWireStatisticalInformationCount : SpaceWireCODECIPStatisticalInformationCount
port map (
clock => clock,
reset => reset,
statisticalInformationClear => statisticalInformationClear,
transmitClock => transmitClock,
receiveClock => receiveClock,
receiveEEPAsynchronous => receiveEEPAsynchronous,
receiveEOPAsynchronous => receiveEOPAsynchronous,
receiveByteASynchronous => receiveByteAsynchronous,
transmitEEPAsynchronous => transmitEEPAsynchronous,
transmitEOPAsynchronous => transmitEOPAsynchronous,
transmitByteAsynchronous => transmitByteAsynchronous,
linkUpTransition => linkUpTransitionSynchronize,
linkDownTransition => linkDownTransitionSynchronize,
linkUpEnable => linkUpEnable,
nullSynchronous => nullSynchronize,
fctSynchronous => fctSynchronize,
statisticalInformation => statisticalInformation,
characterMonitor => characterMonitor
);
SpaceWireTimeCodeControl : SpaceWireCODECIPTimeCodeControl
port map (
clock => clock,
reset => reset,
receiveClock => receiveClock,
gotTimeCode => gotTimeCode,
receiveTimeCodeOut => receiveTimeCodeOut,
timeOut => timeOut,
controlFlagsOut => controlFlagsOut,
tickOut => tickOut
);
receiveFIFOWriteEnable1 <= iReceiveFIFOWriteEnable1;
iReceiveFIFOWriteEnable1 <= (receiveFIFOWriteEnable0 and sendNCharactors);
iGotBit <= not receiveOff;
spaceWireResetOut <= spaceWireResetOutSignal;
----------------------------------------------------------------------
-- Define status signal as LinkStatus or ErrorStatus.
----------------------------------------------------------------------
linkStatus (0) <= enableTransmit;
linkStatus (1) <= enableReceive;
linkStatus (2) <= sendNulls;
linkStatus (3) <= sendFCTs;
linkStatus (4) <= sendNCharactors;
linkStatus (5) <= sendTimeCode;
linkStatus (6) <= '0';
linkStatus (7) <= spaceWireResetOutSignal;
linkStatus (15 downto 8) <= "0" & characterMonitor;
errorStatus (0) <= characterSequenceError; --sequence.
errorStatus (1) <= iCreditError; --credit.
errorStatus (2) <= receiveError; --receiveError(=parity, discon or escape error)
errorStatus (3) <= '0';
errorStatus (4) <= parityError; -- parity.
errorStatus (5) <= disconnectError; -- disconnect.
errorStatus (6) <= escapeError; -- escape.
errorStatus (7) <= '0';
end Behavioral;
|
gpl-3.0
|
EliasLuiz/TCC
|
Leon3/designs/leon3-altera-ep3c25-eek/leon3mp.vhd
|
1
|
32910
|
------------------------------------------------------------------------------
-- LEON3 Demonstration design
-- Copyright (C) 2008 Jiri Gaisler, Gaisler Research
------------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2003 - 2008, Gaisler Research
-- Copyright (C) 2008 - 2014, Aeroflex Gaisler
-- Copyright (C) 2015 - 2016, Cobham Gaisler
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
library grlib;
use grlib.amba.all;
use grlib.stdlib.all;
library techmap;
use techmap.gencomp.all;
library gaisler;
use gaisler.memctrl.all;
use gaisler.ddrpkg.all;
use gaisler.leon3.all;
use gaisler.uart.all;
use gaisler.misc.all;
use gaisler.net.all;
use gaisler.jtag.all;
use gaisler.i2c.all;
use gaisler.spi.all;
library esa;
use esa.memoryctrl.all;
use work.config.all;
entity leon3mp is
generic (
fabtech : integer := CFG_FABTECH;
memtech : integer := CFG_MEMTECH;
padtech : integer := CFG_PADTECH;
clktech : integer := CFG_CLKTECH;
ncpu : integer := CFG_NCPU;
disas : integer := CFG_DISAS; -- Enable disassembly to console
dbguart : integer := CFG_DUART; -- Print UART on console
pclow : integer := CFG_PCLOW;
freq : integer := 50000 -- frequency of main clock (used for PLLs)
);
port (
resetn : in std_ulogic;
clk : in std_ulogic;
errorn : out std_ulogic;
-- flash/ssram bus
address : out std_logic_vector(25 downto 1);
data : inout std_logic_vector(31 downto 0);
romsn : out std_ulogic;
oen : out std_logic;
writen : out std_logic;
rstoutn : out std_ulogic;
ssram_cen : out std_logic;
ssram_wen : out std_logic;
ssram_bw : out std_logic_vector (0 to 3);
ssram_oen : out std_ulogic;
ssram_clk : out std_ulogic;
ssram_adscn : out std_ulogic;
-- ssram_adsp_n : out std_ulogic;
-- ssram_adv_n : out std_ulogic;
-- pragma translate_off
iosn : out std_ulogic;
-- pragma translate_on
-- DDR
ddr_clk : out std_logic;
ddr_clkn : out std_logic;
ddr_cke : out std_logic;
ddr_csb : out std_logic;
ddr_web : out std_ulogic; -- ddr write enable
ddr_rasb : out std_ulogic; -- ddr ras
ddr_casb : out std_ulogic; -- ddr cas
ddr_dm : out std_logic_vector (1 downto 0); -- ddr dm
ddr_dqs : inout std_logic_vector (1 downto 0); -- ddr dqs
ddr_ad : out std_logic_vector (12 downto 0); -- ddr address
ddr_ba : out std_logic_vector (1 downto 0); -- ddr bank address
ddr_dq : inout std_logic_vector (15 downto 0); -- ddr data
-- debug support unit
dsubren : in std_ulogic;
dsuact : out std_ulogic;
-- I/O port
gpio : in std_logic_vector(CFG_GRGPIO_WIDTH-3 downto 0);
-- Connections over HSMC connector
-- LCD touch panel display
hc_vd : out std_logic;
hc_hd : out std_logic;
hc_den : out std_logic;
hc_nclk : out std_logic;
hc_lcd_data : out std_logic_vector(7 downto 0);
hc_grest : out std_logic;
hc_scen : out std_logic;
hc_sda : inout std_logic;
hc_adc_penirq_n : in std_logic;
hc_adc_dout : in std_logic;
hc_adc_busy : in std_logic;
hc_adc_din : out std_logic;
hc_adc_dclk : out std_logic;
hc_adc_cs_n : out std_logic; -- Shared with video decoder
-- Shared by video decoder and audio codec
hc_i2c_sclk : out std_logic;
hc_i2c_sdat : inout std_logic;
-- Video decoder
hc_td_d : inout std_logic_vector(7 downto 0);
hc_td_hs : in std_logic;
hc_td_vs : in std_logic;
hc_td_27mhz : in std_logic;
hc_td_reset : out std_logic;
-- Audio codec
hc_aud_adclrck : out std_logic;
hc_aud_adcdat : in std_logic;
hc_aud_daclrck : out std_logic;
hc_aud_dacdat : out std_logic;
hc_aud_bclk : out std_logic;
hc_aud_xck : out std_logic;
-- SD card
hc_sd_dat : inout std_logic;
hc_sd_dat3 : inout std_logic;
hc_sd_cmd : inout std_logic;
hc_sd_clk : inout std_logic;
-- Ethernet PHY
hc_tx_d : out std_logic_vector(3 downto 0);
hc_rx_d : in std_logic_vector(3 downto 0);
hc_tx_clk : in std_logic;
hc_rx_clk : in std_logic;
hc_tx_en : out std_logic;
hc_rx_dv : in std_logic;
hc_rx_crs : in std_logic;
hc_rx_err : in std_logic;
hc_rx_col : in std_logic;
hc_mdio : inout std_logic;
hc_mdc : out std_logic;
hc_eth_reset_n : out std_logic;
-- RX232 (console/debug UART)
hc_uart_rxd : in std_logic;
hc_uart_txd : out std_logic;
-- PS/2
hc_ps2_dat : inout std_logic;
hc_ps2_clk : inout std_logic;
-- VGA/DAC
hc_vga_data : out std_logic_vector(9 downto 0);
hc_vga_clock : out std_ulogic;
hc_vga_hs : out std_ulogic;
hc_vga_vs : out std_ulogic;
hc_vga_blank : out std_ulogic;
hc_vga_sync : out std_ulogic;
-- I2C EEPROM
hc_id_i2cscl : out std_logic;
hc_id_i2cdat : inout std_logic
);
end;
architecture rtl of leon3mp is
component serializer
generic (
length : integer := 8 -- vector length
);
port (
clk : in std_ulogic;
sync : in std_ulogic;
ivec0 : in std_logic_vector((length-1) downto 0);
ivec1 : in std_logic_vector((length-1) downto 0);
ivec2 : in std_logic_vector((length-1) downto 0);
ovec : out std_logic_vector((length-1) downto 0)
);
end component;
component altera_eek_clkgen
generic (
clk0_mul : integer := 1;
clk0_div : integer := 1;
clk1_mul : integer := 1;
clk1_div : integer := 1;
clk_freq : integer := 25000);
port (
inclk0 : in std_ulogic;
clk0 : out std_ulogic;
clk0x3 : out std_ulogic;
clksel : in std_logic_vector(1 downto 0);
locked : out std_ulogic);
end component;
constant blength : integer := 12;
constant fifodepth : integer := 8;
constant maxahbm : integer := NCPU+CFG_AHB_UART+CFG_AHB_JTAG+CFG_LCD_ENABLE+
CFG_SVGA_ENABLE+CFG_GRETH;
signal vcc, gnd : std_logic_vector(7 downto 0);
signal memi, smemi : memory_in_type;
signal memo, smemo : memory_out_type;
signal wpo : wprot_out_type;
signal ddrclkfb, ssrclkfb, ddr_clkl, ddr_clk90l, ddr_clknl, ddr_clk270l : std_ulogic;
signal ddr_clkv : std_logic_vector(2 downto 0);
signal ddr_clkbv : std_logic_vector(2 downto 0);
signal ddr_ckev : std_logic_vector(1 downto 0);
signal ddr_csbv : std_logic_vector(1 downto 0);
signal ddr_adl : std_logic_vector (13 downto 0);
signal clklock, lock, clkml, rst, ndsuact : std_ulogic;
signal tck, tckn, tms, tdi, tdo : std_ulogic;
signal ddrclk, ddrrst : std_ulogic;
signal apbi : apb_slv_in_type;
signal apbo : apb_slv_out_vector := (others => apb_none);
signal ahbsi : ahb_slv_in_type;
signal ahbso : ahb_slv_out_vector := (others => ahbs_none);
signal ahbmi : ahb_mst_in_type;
signal ahbmo : ahb_mst_out_vector := (others => ahbm_none);
signal clkm, rstn, rawrstn, ssram_clkl : std_ulogic;
signal cgi : clkgen_in_type;
signal cgo : clkgen_out_type;
signal u1i, dui : uart_in_type;
signal u1o, duo : uart_out_type;
signal irqi : irq_in_vector(0 to NCPU-1);
signal irqo : irq_out_vector(0 to NCPU-1);
signal dbgi : l3_debug_in_vector(0 to NCPU-1);
signal dbgo : l3_debug_out_vector(0 to NCPU-1);
signal dsui : dsu_in_type;
signal dsuo : dsu_out_type;
signal gpti : gptimer_in_type;
signal gpioi : gpio_in_type;
signal gpioo : gpio_out_type;
signal ps2i : ps2_in_type;
signal ps2o : ps2_out_type;
signal i2ci : i2c_in_type;
signal i2co : i2c_out_type;
signal spii : spi_in_type;
signal spio : spi_out_type;
signal slvsel : std_logic_vector(CFG_SPICTRL_SLVS-1 downto 0);
signal ethi : eth_in_type;
signal etho : eth_out_type;
signal lcdo : apbvga_out_type;
signal lcd_data : std_logic_vector(7 downto 0);
signal lcd_den : std_ulogic;
signal lcd_grest : std_ulogic;
signal lcdspii : spi_in_type;
signal lcdspio : spi_out_type;
signal lcdslvsel : std_logic_vector(1 downto 0);
signal lcdclksel : std_logic_vector(1 downto 0);
signal lcdclk : std_ulogic;
signal lcdclk3x : std_ulogic;
signal lcdclklck : std_ulogic;
signal vgao : apbvga_out_type;
signal vga_data : std_logic_vector(9 downto 0);
signal vgaclksel : std_logic_vector(1 downto 0);
signal vgaclk : std_ulogic;
signal vgaclk3x : std_ulogic;
signal vgaclklck : std_ulogic;
constant IOAEN : integer := 1;
constant BOARD_FREQ : integer := 50000; -- input frequency in KHz
constant CPU_FREQ : integer := BOARD_FREQ * CFG_CLKMUL / CFG_CLKDIV; -- cpu frequency in KHz
constant I2C_FILTER : integer := (CPU_FREQ*5+50000)/100000+1;
signal lclk, lclkout : std_ulogic;
signal dsubre : std_ulogic;
attribute syn_keep : boolean;
attribute syn_keep of clkm : signal is true;
attribute syn_keep of clkml : signal is true;
attribute syn_keep of lcdclk : signal is true;
attribute syn_keep of lcdclk3x : signal is true;
attribute syn_keep of vgaclk : signal is true;
attribute syn_keep of vgaclk3x : signal is true;
begin
----------------------------------------------------------------------
--- Reset and Clock generation -------------------------------------
----------------------------------------------------------------------
vcc <= (others => '1'); gnd <= (others => '0');
cgi.pllctrl <= "00"; cgi.pllrst <= not resetn; cgi.pllref <= '0';
clklock <= cgo.clklock and lock and lcdclklck and vgaclklck;
clk_pad : clkpad generic map (tech => padtech) port map (clk, lclk);
clkgen0 : clkgen -- clock generator using toplevel generic 'freq'
generic map (tech => CFG_CLKTECH, clk_mul => CFG_CLKMUL,
clk_div => CFG_CLKDIV, sdramen => 1,
freq => freq)
port map (clkin => lclk, pciclkin => gnd(0), clk => clkm, clkn => open,
clk2x => open, sdclk => ssram_clkl, pciclk => open,
cgi => cgi, cgo => cgo);
ssrclk_pad : outpad generic map (tech => padtech, slew => 1, strength => 24)
port map (ssram_clk, ssram_clkl);
rst0 : rstgen -- reset generator
port map (resetn, clkm, clklock, rstn, rawrstn);
rstoutn <= resetn;
----------------------------------------------------------------------
--- AVOID BUS CONTENTION --------------------------------------------
----------------------------------------------------------------------
-- This design uses the ethernet PHY and we must therefore disable the
-- video decoder and stay away from the touch panel.
-- Video coder
hc_td_reset <= '0'; -- Video Decoder Reset
----------------------------------------------------------------------
--- AHB CONTROLLER --------------------------------------------------
----------------------------------------------------------------------
ahb0 : ahbctrl -- AHB arbiter/multiplexer
generic map (defmast => CFG_DEFMST, split => CFG_SPLIT,
rrobin => CFG_RROBIN, ioaddr => CFG_AHBIO,
ioen => IOAEN, nahbm => maxahbm, nahbs => 8)
port map (rstn, clkm, ahbmi, ahbmo, ahbsi, ahbso);
----------------------------------------------------------------------
--- LEON3 processor and DSU -----------------------------------------
----------------------------------------------------------------------
l3 : if CFG_LEON3 = 1 generate
cpu : for i in 0 to NCPU-1 generate
u0 : leon3s -- LEON3 processor
generic map (i, fabtech, memtech, CFG_NWIN, CFG_DSU, CFG_FPU, CFG_V8,
0, CFG_MAC, pclow, CFG_NOTAG, CFG_NWP, CFG_ICEN, CFG_IREPL, CFG_ISETS, CFG_ILINE,
CFG_ISETSZ, CFG_ILOCK, CFG_DCEN, CFG_DREPL, CFG_DSETS, CFG_DLINE, CFG_DSETSZ,
CFG_DLOCK, CFG_DSNOOP, CFG_ILRAMEN, CFG_ILRAMSZ, CFG_ILRAMADDR, CFG_DLRAMEN,
CFG_DLRAMSZ, CFG_DLRAMADDR, CFG_MMUEN, CFG_ITLBNUM, CFG_DTLBNUM, CFG_TLB_TYPE, CFG_TLB_REP,
CFG_LDDEL, disas, CFG_ITBSZ, CFG_PWD, CFG_SVT, CFG_RSTADDR, NCPU-1,
CFG_DFIXED, CFG_SCAN, CFG_MMU_PAGE, CFG_BP, CFG_NP_ASI, CFG_WRPSR)
port map (clkm, rstn, ahbmi, ahbmo(i), ahbsi, ahbso,
irqi(i), irqo(i), dbgi(i), dbgo(i));
end generate;
errorn_pad : outpad generic map (tech => padtech) port map (errorn, dbgo(0).error);
dsugen : if CFG_DSU = 1 generate
dsu0 : dsu3 -- LEON3 Debug Support Unit
generic map (hindex => 2, haddr => 16#900#, hmask => 16#F00#,
ncpu => NCPU, tbits => 30, tech => memtech, irq => 0, kbytes => CFG_ATBSZ)
port map (rstn, clkm, ahbmi, ahbsi, ahbso(2), dbgo, dbgi, dsui, dsuo);
dsui.enable <= '1';
dsubre_pad : inpad generic map (tech => padtech) port map (dsubre, dsui.break);
dsuact_pad : outpad generic map (tech => padtech) port map (dsuact, dsuo.active);
end generate;
end generate;
nodsu : if CFG_DSU = 0 generate
ahbso(2) <= ahbs_none; dsuo.tstop <= '0'; dsuo.active <= '0';
end generate;
dcomgen : if CFG_AHB_UART = 1 generate
dcom0 : ahbuart -- Debug UART
generic map (hindex => NCPU, pindex => 7, paddr => 7)
port map (rstn, clkm, dui, duo, apbi, apbo(7), ahbmi, ahbmo(NCPU));
dsurx_pad : inpad generic map (tech => padtech) port map (hc_uart_rxd, dui.rxd);
dsutx_pad : outpad generic map (tech => padtech) port map (hc_uart_txd, duo.txd);
end generate;
nouah : if CFG_AHB_UART = 0 generate apbo(7) <= apb_none; end generate;
ahbjtaggen0 :if CFG_AHB_JTAG = 1 generate
ahbjtag0 : ahbjtag generic map(tech => fabtech, hindex => NCPU+CFG_AHB_UART)
port map(rstn, clkm, tck, tms, tdi, tdo, ahbmi, ahbmo(NCPU+CFG_AHB_UART),
open, open, open, open, open, open, open, gnd(0));
end generate;
----------------------------------------------------------------------
--- Memory controllers ----------------------------------------------
----------------------------------------------------------------------
mg2 : if CFG_MCTRL_LEON2 = 1 generate -- LEON2 memory controller
sr1 :mctrl generic map (hindex => 0, pindex => 0, paddr => 0,
ramaddr => 16#400#+16#600#*CFG_DDRSP, rammask =>16#F00#, srbanks => 1,
sden => 0, ram16 => 1)
port map (rstn, clkm, memi, memo, ahbsi, ahbso(0), apbi, apbo(0), wpo);
end generate;
memi.brdyn <= '1'; memi.bexcn <= '1';
memi.writen <= '1'; memi.wrn <= "1111"; memi.bwidth <= "01";
ssr0 : if CFG_SSCTRL = 1 generate
ssrctrl0 : ssrctrl generic map (hindex => 0, pindex => 0,
iomask => 0, ramaddr => 16#400#+16#600#*CFG_DDRSP,
bus16 => CFG_SSCTRLP16)
port map (rstn, clkm, ahbsi, ahbso(0), apbi, apbo(0), memi, memo);
end generate;
mg0 : if (CFG_MCTRL_LEON2 + CFG_SSCTRL) = 0 generate -- no prom/sram pads
apbo(0) <= apb_none; ahbso(0) <= ahbs_none;
roms_pad : outpad generic map (tech => padtech) port map (romsn, vcc(0));
end generate;
mgpads : if (CFG_MCTRL_LEON2 + CFG_SSCTRL) /= 0 generate -- prom/sram pads
addr_pad : outpadv generic map (width => 25, tech => padtech)
port map (address, memo.address(25 downto 1));
roms_pad : outpad generic map (tech => padtech)
port map (romsn, memo.romsn(0));
oen_pad : outpad generic map (tech => padtech)
port map (oen, memo.oen);
wri_pad : outpad generic map (tech => padtech)
port map (writen, memo.writen);
-- pragma translate_off
iosn_pad : outpad generic map (tech => padtech)
port map (iosn, memo.iosn);
-- pragma translate_on
-- ssram_adv_n_pad : outpad generic map (tech => padtech)
-- port map (ssram_adv_n, vcc(0));
-- ssram_adsp_n_pad : outpad generic map (tech => padtech)
-- port map (ssram_adsp_n, gnd(0));
ssram_adscn_pad : outpad generic map (tech => padtech)
port map (ssram_adscn, gnd(0));
ssrams_pad : outpad generic map ( tech => padtech)
port map (ssram_cen, memo.ramsn(0));
ssram_oen_pad : outpad generic map (tech => padtech)
port map (ssram_oen, memo.oen);
ssram_rwen_pad : outpadv generic map (width => 4, tech => padtech)
port map (ssram_bw, memo.wrn);
ssram_wri_pad : outpad generic map (tech => padtech)
port map (ssram_wen, memo.writen);
data_pad : iopadvv generic map (tech => padtech, width => 32)
port map (data(31 downto 0), memo.data(31 downto 0),
memo.vbdrive, memi.data(31 downto 0));
end generate;
ddrsp0 : if (CFG_DDRSP /= 0) generate
ddrc0 : ddrspa generic map ( fabtech => fabtech, memtech => memtech,
hindex => 3, haddr => 16#400#, hmask => 16#F00#, ioaddr => 1,
pwron => CFG_DDRSP_INIT, MHz => BOARD_FREQ/1000, rskew => CFG_DDRSP_RSKEW,
clkmul => CFG_DDRSP_FREQ/5, clkdiv => 10, ahbfreq => CPU_FREQ/1000,
col => CFG_DDRSP_COL, Mbyte => CFG_DDRSP_SIZE, ddrbits => 16, regoutput => 1)
port map (
resetn, rstn, lclk, clkm, lock, clkml, clkml, ahbsi, ahbso(3),
ddr_clkv, ddr_clkbv, open, gnd(0),
ddr_ckev, ddr_csbv, ddr_web, ddr_rasb, ddr_casb,
ddr_dm, ddr_dqs, ddr_adl, ddr_ba, ddr_dq);
ddr_ad <= ddr_adl(12 downto 0);
ddr_clk <= ddr_clkv(0); ddr_clkn <= ddr_clkbv(0);
ddr_cke <= ddr_ckev(0); ddr_csb <= ddr_csbv(0);
end generate;
ddrsp1 : if (CFG_DDRSP = 0) generate
ddr_cke <= '0'; ddr_csb <= '1'; lock <= '1';
end generate;
----------------------------------------------------------------------
--- APB Bridge and various periherals -------------------------------
----------------------------------------------------------------------
apb0 : apbctrl -- AHB/APB bridge
generic map (hindex => 1, haddr => CFG_APBADDR)
port map (rstn, clkm, ahbsi, ahbso(1), apbi, apbo);
ua1 : if CFG_UART1_ENABLE /= 0 generate
uart1 : apbuart -- UART 1
generic map (pindex => 1, paddr => 1, pirq => 2, console => dbguart,
fifosize => CFG_UART1_FIFO)
port map (rstn, clkm, apbi, apbo(1), u1i, u1o);
u1i.ctsn <= '0'; u1i.extclk <= '0';
upads : if CFG_AHB_UART = 0 generate
u1i.rxd <= hc_uart_rxd; hc_uart_txd <= u1o.txd;
end generate;
end generate;
noua0 : if CFG_UART1_ENABLE = 0 generate apbo(1) <= apb_none; end generate;
irqctrl : if CFG_IRQ3_ENABLE /= 0 generate
irqctrl0 : irqmp -- interrupt controller
generic map (pindex => 2, paddr => 2, ncpu => NCPU)
port map (rstn, clkm, apbi, apbo(2), irqo, irqi);
end generate;
irq3 : if CFG_IRQ3_ENABLE = 0 generate
x : for i in 0 to NCPU-1 generate
irqi(i).irl <= "0000";
end generate;
apbo(2) <= apb_none;
end generate;
gpt : if CFG_GPT_ENABLE /= 0 generate
timer0 : gptimer -- Timer unit
generic map (pindex => 3, paddr => 3, pirq => CFG_GPT_IRQ,
sepirq => CFG_GPT_SEPIRQ, sbits => CFG_GPT_SW, ntimers => CFG_GPT_NTIM,
nbits => CFG_GPT_TW)
port map (rstn, clkm, apbi, apbo(3), gpti, open);
gpti <= gpti_dhalt_drive(dsuo.tstop);
end generate;
notim : if CFG_GPT_ENABLE = 0 generate apbo(3) <= apb_none; end generate;
gpio0 : if CFG_GRGPIO_ENABLE /= 0 generate -- GPIO unit
grgpio0: grgpio
generic map(pindex => 5, paddr => 5, imask => CFG_GRGPIO_IMASK, nbits => CFG_GRGPIO_WIDTH)
port map(rst => rstn, clk => clkm, apbi => apbi, apbo => apbo(5),
gpioi => gpioi, gpioo => gpioo);
pio_pads : for i in 0 to CFG_GRGPIO_WIDTH-3 generate
gpioi.din(i) <= gpio(i);
end generate;
gpioi.din(3) <= hc_adc_penirq_n;
gpioi.din(4) <= hc_adc_busy;
end generate;
ps2 : if CFG_PS2_ENABLE /= 0 generate -- PS/2 unit
ps20 : apbps2 generic map(pindex => 6, paddr => 6, pirq => 6)
port map(rstn, clkm, apbi, apbo(6), ps2i, ps2o);
end generate;
nops2 : if CFG_PS2_ENABLE = 0 generate
apbo(4) <= apb_none; ps2o <= ps2o_none;
end generate;
ps2clk_pad : iopad generic map (tech => padtech)
port map (hc_ps2_clk, ps2o.ps2_clk_o, ps2o.ps2_clk_oe, ps2i.ps2_clk_i);
ps2data_pad : iopad generic map (tech => padtech)
port map (hc_ps2_dat, ps2o.ps2_data_o, ps2o.ps2_data_oe, ps2i.ps2_data_i);
i2cm: if CFG_I2C_ENABLE = 1 generate -- I2C master
i2c0 : i2cmst
generic map (pindex => 8, paddr => 8, pmask => 16#FFF#,
pirq => 11, filter => I2C_FILTER)
port map (rstn, clkm, apbi, apbo(8), i2ci, i2co);
-- The EEK does not use a bi-directional line for the I2C clock
i2ci.scl <= i2co.scloen; -- No clock stretch possible
-- When SCL output enable is activated the line should go low
i2c_scl_pad : outpad generic map (tech => padtech)
port map (hc_id_i2cscl, i2co.scloen);
i2c_sda_pad : iopad generic map (tech => padtech)
port map (hc_id_i2cdat, i2co.sda, i2co.sdaoen, i2ci.sda);
end generate i2cm;
spic: if CFG_SPICTRL_ENABLE = 1 generate -- SPI controller
spi1 : spictrl
generic map (pindex => 9, paddr => 9, pmask => 16#fff#, pirq => 7,
fdepth => CFG_SPICTRL_FIFO, slvselen => CFG_SPICTRL_SLVREG,
slvselsz => CFG_SPICTRL_SLVS, odmode => 1,
syncram => CFG_SPICTRL_SYNCRAM, ft => CFG_SPICTRL_FT)
port map (rstn, clkm, apbi, apbo(9), spii, spio, slvsel);
miso_pad : iopad generic map (tech => padtech)
port map (hc_sd_dat, spio.miso, spio.misooen, spii.miso);
mosi_pad : iopad generic map (tech => padtech)
port map (hc_sd_cmd, spio.mosi, spio.mosioen, spii.mosi);
sck_pad : iopad generic map (tech => padtech)
port map (hc_sd_clk, spio.sck, spio.sckoen, spii.sck);
slvsel_pad : outpad generic map (tech => padtech)
port map (hc_sd_dat3, slvsel(0));
spii.spisel <= '1'; -- Master only
end generate spic;
-----------------------------------------------------------------------
-- LCD touch panel ---------------------------------------------------
-----------------------------------------------------------------------
lcd: if CFG_LCD_ENABLE /= 0 generate -- LCD
lcd0 : svgactrl generic map(memtech => memtech, pindex => 11, paddr => 11,
hindex => CFG_NCPU+CFG_AHB_UART+CFG_AHB_JTAG,
clk0 => 30120, clk1 => 0, clk2 => 0, clk3 => 0, burstlen => 4)
port map(rstn, clkm, lcdclk, apbi, apbo(11), lcdo, ahbmi,
ahbmo(CFG_NCPU+CFG_AHB_UART+CFG_AHB_JTAG), open);
lcdser0: serializer generic map (length => 8)
port map (lcdclk3x, lcdo.hsync, lcdo.video_out_b, lcdo.video_out_g,
lcdo.video_out_r, lcd_data);
lcdclksel <= "00";
lcdclkgen : altera_eek_clkgen
generic map (clk0_mul => 166, clk0_div => 250, clk1_mul => 9,
clk1_div => 50, clk_freq => BOARD_FREQ)
port map (lclk, lcdclk, lcdclk3x, lcdclksel, lcdclklck);
lcd_vert_sync_pad : outpad generic map (tech => padtech)
port map (hc_vd, lcdo.vsync);
lcd_horiz_sync_pad : outpad generic map (tech => padtech)
port map (hc_hd, lcdo.hsync);
lcd_video_out_pad : outpadv generic map (width => 8, tech => padtech)
port map (hc_lcd_data, lcd_data);
lcd_video_clock_pad : outpad generic map (tech => padtech)
port map (hc_nclk, lcdclk3x);
lcd_den <= lcdo.blank;
end generate;
nolcd : if CFG_LCD_ENABLE = 0 generate
apbo(11) <= apb_none; lcdo <= vgao_none;
lcd_den <= '0'; -- LCD RGB Data Enable
lcdclk <= '0'; lcdclk3x <= '0'; lcdclklck <= '1';
end generate;
lcd_den_pad : outpad generic map (tech => padtech)
port map (hc_den, lcd_den);
lcdsysreset: if CFG_LCD_ENABLE /= 0 or CFG_LCD3T_ENABLE /= 0 generate
lcd_grest <= rstn;
end generate;
lcdalwaysreset: if CFG_LCD_ENABLE = 0 and CFG_LCD3T_ENABLE = 0 generate
lcd_grest <= '0';
end generate lcdalwaysreset;
lcd_reset_pad : outpad generic map (tech => padtech) -- LCD Global Reset, active low
port map (hc_grest, lcd_grest);
touch3wire: if CFG_LCD3T_ENABLE /= 0 generate -- LCD 3-wire and touch panel interface
-- TODO:
-- Interrupt and busy signals not connected
touch3spi1 : spictrl
generic map (pindex => 12, paddr => 12, pmask => 16#fff#, pirq => 12,
fdepth => 2, slvselen => 1, slvselsz => 2, odmode => 0,
syncram => 0, ft => 0)
port map (rstn, clkm, apbi, apbo(12), lcdspii, lcdspio, lcdslvsel);
adc_miso_pad : inpad generic map (tech => padtech)
port map (hc_adc_dout, lcdspii.miso);
adc_mosi_pad : outpad generic map (tech => padtech)
port map (hc_adc_din, lcdspio.mosi);
lcd_adc_dclk_pad : outpad generic map (tech => padtech)
port map (hc_adc_dclk, lcdspio.sck);
hcd_sda_pad : iopad generic map (tech => padtech)
port map (hc_sda, lcdspio.mosi, lcdspio.mosioen, lcdspii.mosi);
lcdspii.spisel <= '1'; -- Master only
end generate;
notouch3wire: if CFG_LCD3T_ENABLE = 0 generate
lcdslvsel <= (others => '1');
apbo(12) <= apb_none;
end generate;
hc_adc_cs_n_pad : outpad generic map (tech => padtech)
port map (hc_adc_cs_n, lcdslvsel(0));
hc_scen_pad : outpad generic map (tech => padtech)
port map (hc_scen, lcdslvsel(1));
-----------------------------------------------------------------------
-- SVGA controller ----------------------------------------------------
-----------------------------------------------------------------------
svga : if CFG_SVGA_ENABLE /= 0 generate -- VGA DAC
svga0 : svgactrl generic map(memtech => memtech, pindex => 13, paddr => 13,
hindex => CFG_NCPU+CFG_AHB_UART+CFG_AHB_JTAG+CFG_LCD_ENABLE,
clk0 => 40000, clk1 => 25000, clk2 => 0, clk3 => 0, burstlen => 4)
port map(rstn, clkm, vgaclk, apbi, apbo(13), vgao, ahbmi,
ahbmo(CFG_NCPU+CFG_AHB_UART+CFG_AHB_JTAG+CFG_LCD_ENABLE),
vgaclksel);
svgaser0: serializer generic map (length => 8)
port map (vgaclk3x, vgao.hsync, vgao.video_out_b, vgao.video_out_g,
vgao.video_out_r, vga_data(9 downto 2));
vga_data(1 downto 0) <= (others => '0');
vgaclkgen : altera_eek_clkgen
generic map (clk0_mul => 1, clk0_div => 2, clk1_mul => 4,
clk1_div => 5, clk_freq => BOARD_FREQ)
port map (lclk, vgaclk, vgaclk3x, vgaclksel, vgaclklck);
vga_blank_pad : outpad generic map (tech => padtech)
port map (hc_vga_blank, vgao.blank);
vga_comp_sync_pad : outpad generic map (tech => padtech)
port map (hc_vga_sync, vgao.comp_sync);
vga_vert_sync_pad : outpad generic map (tech => padtech)
port map (hc_vga_vs, vgao.vsync);
vga_horiz_sync_pad : outpad generic map (tech => padtech)
port map (hc_vga_hs, vgao.hsync);
vga_video_out_pad : outpadv generic map (width => 10, tech => padtech)
port map (hc_vga_data, vga_data);
vga_video_clock_pad : outpad generic map (tech => padtech)
port map (hc_vga_clock, vgaclk3x);
end generate svga;
nosvga : if CFG_SVGA_ENABLE = 0 generate
apbo(13) <= apb_none; vgao <= vgao_none;
vgaclk <= '0'; vgaclk3x <= '0'; vgaclklck <= '1';
end generate;
-----------------------------------------------------------------------
--- ETHERNET ---------------------------------------------------------
-----------------------------------------------------------------------
eth0 : if CFG_GRETH /= 0 generate -- Gaisler ethernet MAC
e1 : grethm generic map(
hindex => CFG_NCPU+CFG_AHB_UART+CFG_AHB_JTAG+CFG_LCD_ENABLE+CFG_SVGA_ENABLE,
pindex => 10, paddr => 10, pirq => 10, memtech => memtech,
mdcscaler => CPU_FREQ/1000, enable_mdio => 1, fifosize => CFG_ETH_FIFO,
nsync => 1, edcl => CFG_DSU_ETH, edclbufsz => CFG_ETH_BUF,
macaddrh => CFG_ETH_ENM, macaddrl => CFG_ETH_ENL, phyrstadr => 1,
ipaddrh => CFG_ETH_IPM, ipaddrl => CFG_ETH_IPL, giga => CFG_GRETH1G)
port map( rst => rstn, clk => clkm, ahbmi => ahbmi,
ahbmo => ahbmo(CFG_NCPU+CFG_AHB_UART+CFG_AHB_JTAG+CFG_LCD_ENABLE+CFG_SVGA_ENABLE),
apbi => apbi, apbo => apbo(10), ethi => ethi, etho => etho);
emdio_pad : iopad generic map (tech => padtech)
port map (hc_mdio, etho.mdio_o, etho.mdio_oe, ethi.mdio_i);
etxc_pad : clkpad generic map (tech => padtech, arch => 2)
port map (hc_tx_clk, ethi.tx_clk);
erxc_pad : clkpad generic map (tech => padtech, arch => 2)
port map (hc_rx_clk, ethi.rx_clk);
erxd_pad : inpadv generic map (tech => padtech, width => 4)
port map (hc_rx_d, ethi.rxd(3 downto 0));
erxdv_pad : inpad generic map (tech => padtech)
port map (hc_rx_dv, ethi.rx_dv);
erxer_pad : inpad generic map (tech => padtech)
port map (hc_rx_err, ethi.rx_er);
erxco_pad : inpad generic map (tech => padtech)
port map (hc_rx_col, ethi.rx_col);
erxcr_pad : inpad generic map (tech => padtech)
port map (hc_rx_crs, ethi.rx_crs);
etxd_pad : outpadv generic map (tech => padtech, width => 4)
port map (hc_tx_d, etho.txd(3 downto 0));
etxen_pad : outpad generic map (tech => padtech)
port map (hc_tx_en, etho.tx_en);
emdc_pad : outpad generic map (tech => padtech)
port map (hc_mdc, etho.mdc);
erst_pad : outpad generic map (tech => padtech)
port map (hc_eth_reset_n, rawrstn);
end generate;
-----------------------------------------------------------------------
--- AHB ROM ----------------------------------------------------------
-----------------------------------------------------------------------
bpromgen : if CFG_AHBROMEN /= 0 generate
brom : entity work.ahbrom
generic map (hindex => 6, haddr => CFG_AHBRODDR, pipe => CFG_AHBROPIP)
port map ( rstn, clkm, ahbsi, ahbso(6));
end generate;
nobpromgen : if CFG_AHBROMEN = 0 generate
ahbso(6) <= ahbs_none;
end generate;
-----------------------------------------------------------------------
--- AHB RAM ----------------------------------------------------------
-----------------------------------------------------------------------
ahbramgen : if CFG_AHBRAMEN = 1 generate
ahbram0 : ahbram generic map (hindex => 7, haddr => CFG_AHBRADDR,
tech => CFG_MEMTECH, kbytes => CFG_AHBRSZ, pipe => CFG_AHBRPIPE)
port map (rstn, clkm, ahbsi, ahbso(7));
end generate;
nram : if CFG_AHBRAMEN = 0 generate ahbso(7) <= ahbs_none; end generate;
-----------------------------------------------------------------------
--- Drive unused bus elements ---------------------------------------
-----------------------------------------------------------------------
nam1 : for i in (CFG_NCPU+CFG_AHB_UART+CFG_AHB_JTAG+CFG_LCD_ENABLE+CFG_SVGA_ENABLE+CFG_GRETH) to NAHBMST-1 generate
ahbmo(i) <= ahbm_none;
end generate;
-- invert signal for input via a key
dsubre <= not dsubren;
-----------------------------------------------------------------------
--- Boot message ----------------------------------------------------
-----------------------------------------------------------------------
-- pragma translate_off
x : report_design
generic map (
msg1 => "LEON3 Altera Embedded Evaluation Kit Demonstration Design",
fabtech => tech_table(fabtech), memtech => tech_table(memtech),
mdel => 1
);
-- pragma translate_on
end;
|
gpl-3.0
|
EliasLuiz/TCC
|
Leon3/designs/leon3-ztex-ufm-111/config.vhd
|
1
|
5992
|
-----------------------------------------------------------------------------
-- LEON3 Demonstration design test bench configuration
-- Copyright (C) 2009 Aeroflex Gaisler
------------------------------------------------------------------------------
library techmap;
use techmap.gencomp.all;
package config is
-- Technology and synthesis options
constant CFG_FABTECH : integer := spartan6;
constant CFG_MEMTECH : integer := spartan6;
constant CFG_PADTECH : integer := spartan6;
constant CFG_TRANSTECH : integer := GTP0;
constant CFG_NOASYNC : integer := 0;
constant CFG_SCAN : integer := 0;
-- Clock generator
constant CFG_CLKTECH : integer := spartan6;
constant CFG_CLKMUL : integer := (3);
constant CFG_CLKDIV : integer := (2);
constant CFG_OCLKDIV : integer := 1;
constant CFG_OCLKBDIV : integer := 0;
constant CFG_OCLKCDIV : integer := 0;
constant CFG_PCIDLL : integer := 0;
constant CFG_PCISYSCLK: integer := 0;
constant CFG_CLK_NOFB : integer := 0;
-- LEON3 processor core
constant CFG_LEON3 : integer := 1;
constant CFG_NCPU : integer := (1);
constant CFG_NWIN : integer := (8);
constant CFG_V8 : integer := 2 + 4*0;
constant CFG_MAC : integer := 0;
constant CFG_BP : integer := 1;
constant CFG_SVT : integer := 1;
constant CFG_RSTADDR : integer := 16#00000#;
constant CFG_LDDEL : integer := (2);
constant CFG_NOTAG : integer := 1;
constant CFG_NWP : integer := (0);
constant CFG_PWD : integer := 0*2;
constant CFG_FPU : integer := 0 + 16*0 + 32*0;
constant CFG_GRFPUSH : integer := 0;
constant CFG_ICEN : integer := 1;
constant CFG_ISETS : integer := 1;
constant CFG_ISETSZ : integer := 8;
constant CFG_ILINE : integer := 8;
constant CFG_IREPL : integer := 0;
constant CFG_ILOCK : integer := 0;
constant CFG_ILRAMEN : integer := 0;
constant CFG_ILRAMADDR: integer := 16#8E#;
constant CFG_ILRAMSZ : integer := 1;
constant CFG_DCEN : integer := 1;
constant CFG_DSETS : integer := 1;
constant CFG_DSETSZ : integer := 8;
constant CFG_DLINE : integer := 8;
constant CFG_DREPL : integer := 0;
constant CFG_DLOCK : integer := 0;
constant CFG_DSNOOP : integer := 0 + 0*2 + 4*0;
constant CFG_DFIXED : integer := 16#0#;
constant CFG_DLRAMEN : integer := 0;
constant CFG_DLRAMADDR: integer := 16#8F#;
constant CFG_DLRAMSZ : integer := 1;
constant CFG_MMUEN : integer := 1;
constant CFG_ITLBNUM : integer := 8;
constant CFG_DTLBNUM : integer := 2;
constant CFG_TLB_TYPE : integer := 1 + 0*2;
constant CFG_TLB_REP : integer := 1;
constant CFG_MMU_PAGE : integer := 0;
constant CFG_DSU : integer := 1;
constant CFG_ITBSZ : integer := 0 + 64*0;
constant CFG_ATBSZ : integer := 0;
constant CFG_AHBPF : integer := 0;
constant CFG_LEON3FT_EN : integer := 0;
constant CFG_IUFT_EN : integer := 0;
constant CFG_FPUFT_EN : integer := 0;
constant CFG_RF_ERRINJ : integer := 0;
constant CFG_CACHE_FT_EN : integer := 0;
constant CFG_CACHE_ERRINJ : integer := 0;
constant CFG_LEON3_NETLIST: integer := 0;
constant CFG_DISAS : integer := 0 + 0;
constant CFG_PCLOW : integer := 2;
constant CFG_STAT_ENABLE : integer := 0;
constant CFG_STAT_CNT : integer := 1;
constant CFG_STAT_NMAX : integer := 0;
constant CFG_STAT_DSUEN : integer := 0;
constant CFG_NP_ASI : integer := 0;
constant CFG_WRPSR : integer := 0;
constant CFG_ALTWIN : integer := 0;
constant CFG_REX : integer := 0;
-- AMBA settings
constant CFG_DEFMST : integer := (0);
constant CFG_RROBIN : integer := 1;
constant CFG_SPLIT : integer := 1;
constant CFG_FPNPEN : integer := 0;
constant CFG_AHBIO : integer := 16#FFF#;
constant CFG_APBADDR : integer := 16#800#;
constant CFG_AHB_MON : integer := 0;
constant CFG_AHB_MONERR : integer := 0;
constant CFG_AHB_MONWAR : integer := 0;
constant CFG_AHB_DTRACE : integer := 0;
-- DSU UART
constant CFG_AHB_UART : integer := 1;
-- JTAG based DSU interface
constant CFG_AHB_JTAG : integer := 1;
-- Xilinx MIG
constant CFG_MIG_DDR2 : integer := 1;
constant CFG_MIG_RANKS : integer := (1);
constant CFG_MIG_COLBITS : integer := (10);
constant CFG_MIG_ROWBITS : integer := (13);
constant CFG_MIG_BANKBITS: integer := (2);
constant CFG_MIG_HMASK : integer := 16#FC0#;
-- AHB ROM
constant CFG_AHBROMEN : integer := 1;
constant CFG_AHBROPIP : integer := 0;
constant CFG_AHBRODDR : integer := 16#000#;
constant CFG_ROMADDR : integer := 16#100#;
constant CFG_ROMMASK : integer := 16#E00# + 16#100#;
-- AHB RAM
constant CFG_AHBRAMEN : integer := 1;
constant CFG_AHBRSZ : integer := 4;
constant CFG_AHBRADDR : integer := 16#A00#;
constant CFG_AHBRPIPE : integer := 0;
-- UART 1
constant CFG_UART1_ENABLE : integer := 1;
constant CFG_UART1_FIFO : integer := 4;
-- LEON3 interrupt controller
constant CFG_IRQ3_ENABLE : integer := 1;
constant CFG_IRQ3_NSEC : integer := 0;
-- Modular timer
constant CFG_GPT_ENABLE : integer := 1;
constant CFG_GPT_NTIM : integer := (2);
constant CFG_GPT_SW : integer := (8);
constant CFG_GPT_TW : integer := (32);
constant CFG_GPT_IRQ : integer := (8);
constant CFG_GPT_SEPIRQ : integer := 1;
constant CFG_GPT_WDOGEN : integer := 0;
constant CFG_GPT_WDOG : integer := 16#0#;
-- GPIO port
constant CFG_GRGPIO_ENABLE : integer := 0;
constant CFG_GRGPIO_IMASK : integer := 16#0000#;
constant CFG_GRGPIO_WIDTH : integer := 1;
-- SPI controller
constant CFG_SPICTRL_ENABLE : integer := 1;
constant CFG_SPICTRL_NUM : integer := (1);
constant CFG_SPICTRL_SLVS : integer := (1);
constant CFG_SPICTRL_FIFO : integer := (2);
constant CFG_SPICTRL_SLVREG : integer := 1;
constant CFG_SPICTRL_ODMODE : integer := 1;
constant CFG_SPICTRL_AM : integer := 0;
constant CFG_SPICTRL_ASEL : integer := 0;
constant CFG_SPICTRL_TWEN : integer := 0;
constant CFG_SPICTRL_MAXWLEN : integer := (0);
constant CFG_SPICTRL_SYNCRAM : integer := 0;
constant CFG_SPICTRL_FT : integer := 0;
-- GRLIB debugging
constant CFG_DUART : integer := 0;
end;
|
gpl-3.0
|
EliasLuiz/TCC
|
Leon3/lib/gaisler/ddr/ddr1spax_ddr.vhd
|
1
|
40538
|
------------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2003 - 2008, Gaisler Research
-- Copyright (C) 2008 - 2014, Aeroflex Gaisler
-- Copyright (C) 2015 - 2016, Cobham Gaisler
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-----------------------------------------------------------------------------
-- Entity: ddr1spax_ddr
-- File: ddr1spax_ddr.vhd
-- Author: Magnus Hjorth - Aeroflex Gaisler
-- Description: Merged 16/32/64-bit DDR/mobile-DDR backend
-- Based on ddrsp*a and ddr2spax_ddr
--------------------------------------------------------------------------------
-- Added features from the original ddrspa:
-- * Separated AHB,DDR parts of controller like for DDR2SPA
-- * 64/32/16 bit interfaces in the same entity
-- * Checkbit support for use with ft_ddr2spax_ahb front-end.
-- * Extended timing fields plus tRAS setting to meet DDR400 timing.
-- * Configurable burst length
-- * Support for PHY:s with read data valid signaling and extra latency
-- Incompatibility/differences to the original ddrspa:
-- * The mobile DDR had an undocumented feature that tRFC was extended with 8
-- cycles if the TRP bit was set. This is replaced by the extended
-- timing fields.
-- * ddrsp16a used a separate read-clock supplied only from the Spartan PHY.
-- * Reads/writes are made as multiple length-2 burst commands.
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
library grlib;
use grlib.stdlib.all;
use grlib.amba.all;
use grlib.devices.all;
library gaisler;
use gaisler.ddrpkg.all;
use gaisler.ddrintpkg.all;
entity ddr1spax_ddr is
generic (
ddrbits : integer := 32;
burstlen : integer := 8;
MHz : integer := 100;
col : integer := 9;
Mbyte : integer := 8;
pwron : integer := 0;
oepol : integer := 0;
mobile : integer := 0;
confapi : integer := 0;
conf0 : integer := 0;
conf1 : integer := 0;
nosync : integer := 0;
ddr_syncrst: integer range 0 to 1 := 0;
chkbits : integer := 0;
hasdqvalid : integer := 0;
readdly : integer := 0;
regoutput : integer := 1;
ddr400 : integer := 1;
rstdel : integer := 200;
phyptctrl : integer := 0;
scantest : integer := 0
);
port (
ddr_rst : in std_ulogic;
clk_ddr : in std_ulogic;
request : in ddr_request_type;
start_tog: in std_logic;
response : out ddr_response_type;
sdi : in ddrctrl_in_type;
sdo : out ddrctrl_out_type;
wbraddr : out std_logic_vector(log2((16*burstlen)/ddrbits) downto 0);
wbrdata : in std_logic_vector(2*(ddrbits+chkbits)-1 downto 0);
rbwaddr : out std_logic_vector(log2((16*burstlen)/ddrbits)-1 downto 0);
rbwdata : out std_logic_vector(2*(ddrbits+chkbits)-1 downto 0);
rbwrite : out std_logic;
reqsel : in std_ulogic;
frequest : in ddr_request_type;
response2: out ddr_response_type;
testen : in std_ulogic;
testrst : in std_ulogic;
testoen : in std_ulogic
);
end ddr1spax_ddr;
architecture rtl of ddr1spax_ddr is
constant l2blen: integer := log2(burstlen)+log2(32);
constant l2ddrw: integer := log2(ddrbits*2);
constant l2ddr_burstlen: integer := l2blen-l2ddrw;
-- constant oepols: std_logic := tosl(oepol);
-- Write buffer dimensions
-- Write buffer is addressable down to 32-bit level on write (AHB) side.
constant wbuf_rabits: integer := 1+l2blen-l2ddrw; -- log2((burstlen*32)/(2*ddrbits));
constant wbuf_rdbits: integer := 2*ddrbits;
-- Read buffer dimensions
constant rbuf_wabits: integer := l2blen-l2ddrw; -- log2((burstlen*32)/(2*ddrbits));
constant rbuf_wdbits: integer := 2*(ddrbits+chkbits);
type ddrstate is (dsidle,dsact1,dsact2,dsact3,dswr1,dswr2,dswr3,dswr4,dswr5,dswr6,
dsrd1,dsrd2,dsrd3,dsrd4,dsreg1,dsreg2,dscmd1,dscmd2,dspdown1,dspdown2,dsref1,
dssrr1,dssrr2);
type ddrinitstate is (disrstdel,disidle,disrun,disfinished);
type sdram_cfg_type is record
command : std_logic_vector(2 downto 0);
csize : std_logic_vector(1 downto 0);
bsize : std_logic_vector(2 downto 0);
trcd : std_ulogic; -- tCD : 2/3 clock cycles
trfc : std_logic_vector(4 downto 0);
trp : std_logic_vector(1 downto 0); -- precharge to activate: 2/3 clock cycles
refresh : std_logic_vector(11 downto 0);
renable : std_ulogic;
dllrst : std_ulogic;
refon : std_ulogic;
cke : std_ulogic;
pasr : std_logic_vector(5 downto 0); -- pasr(2:0) (pasr(5:3) used to detect update)
tcsr : std_logic_vector(3 downto 0); -- tcrs(1:0) (tcrs(3:2) used to detect update)
ds : std_logic_vector(5 downto 0); -- ds(1:0) (ds(3:2) used to detect update)
pmode : std_logic_vector(2 downto 0); -- Power-Saving mode
mobileen : std_logic; -- Mobile SD support, Mobile SD enabled
txsr : std_logic_vector(5 downto 0); -- Exit Self Refresh timing
txp : std_logic_vector(1 downto 0); -- Exit Power-Down timing
tcke : std_logic; -- Clock enable timing
cl : std_logic; -- CAS latency 2/3 (0/1)
conf : std_logic_vector(63 downto 0); -- PHY control
tras : std_logic_vector(1 downto 0); -- tRAS minimum (6-9 cycles)
twr : std_logic; -- tWR write recovery, 2/3 cycles
end record;
type ddr_reg_type is record
s : ddrstate;
initstate : ddrinitstate;
cfg : sdram_cfg_type;
resp,resp2 : ddr_response_type;
req1,req2 : ddr_request_type;
start1,start2 : std_logic;
start3 : std_logic;
ramaddr : std_logic_vector(rbuf_wabits-1 downto 0);
readpipe : std_logic_vector(4+readdly downto 0);
initpos : std_logic_vector(2 downto 0);
cmdctr : std_logic_vector(7 downto 0);
readdone : std_logic;
refctr : std_logic_vector(17 downto 0);
refpend : std_logic;
idlectr : std_logic_vector(3 downto 0);
pdowns : std_logic_vector(1 downto 0);
sdo_casn : std_logic;
sdo_rasn : std_logic;
sdo_wen : std_logic;
sdo_csn : std_logic_vector(1 downto 0);
sdo_ba : std_logic_vector(1 downto 0);
sdo_address : std_logic_vector(14 downto 0);
sdo_data : std_logic_vector(2*ddrbits-1 downto 0);
sdo_dqm : std_logic_vector(ddrbits/4-1 downto 0);
sdo_cb : std_logic_vector(2*chkbits downto 0);
sdo_ck : std_logic_vector(2 downto 0);
sdo_bdrive : std_logic;
sdo_qdrive : std_logic;
end record;
signal dr,ndr: ddr_reg_type;
constant onev: std_logic_vector(15 downto 0) := x"FFFF";
constant zerov: std_logic_vector(15 downto 0) := x"0000";
signal arst : std_ulogic;
begin
arst <= testrst when (scantest/=0 and ddr_syncrst=0) and testen='1' else ddr_rst;
ddrcomb: process(ddr_rst,sdi,request,frequest,start_tog,dr,wbrdata,testen,testoen,reqsel)
variable dv: ddr_reg_type;
variable o: ddrctrl_out_type;
variable rbw: std_logic;
variable rbwd: std_logic_vector(2*(ddrbits+chkbits)-1 downto 0);
variable vstart, vstartd, vdone, incdone: std_logic;
variable vrctr: std_logic_vector(3 downto 0);
variable vreq,vreqf: ddr_request_type;
variable regsd1 : std_logic_vector(31 downto 0);
variable regsd2 : std_logic_vector(31 downto 0);
variable regsd3 : std_logic_vector(31 downto 0);
variable lastreadcmd: std_logic;
variable lastwrite : std_logic;
variable vmaskfirst, vmasklast: std_logic_vector(ddrbits/4-1 downto 0);
variable ea: std_logic_vector(3 downto 2);
variable inc_sdoaddr, inc_ramaddr: std_logic;
variable datavalid: std_logic;
variable vcsf: std_logic_vector(1 downto 0);
variable vrowf: std_logic_vector(14 downto 0);
variable vbankf: std_logic_vector(1 downto 0);
variable vcol,vcoladdr: std_logic_vector(14 downto 1);
variable seqin,seqout: std_logic_vector(3 downto 0);
variable regrdata: std_logic_vector(2*ddrbits-1 downto 0);
variable regad: std_logic_vector(2 downto 0);
variable wrdreg1,wrdreg2,wrdreg3: std_logic_vector(31 downto 0);
variable reqselv: std_logic_vector(3 downto 0);
begin
---------------------------------------------------------------------------
-- Init vars
---------------------------------------------------------------------------
dv := dr;
o := ddrctrl_out_none;
o.bdrive := '1'; o.qdrive := '1';
vdone := dr.resp.done_tog or dr.resp2.done_tog;
vrctr := dr.resp.rctr_gray or dr.resp2.rctr_gray;
incdone := '0';
lastreadcmd := '0';
lastwrite := '0';
reqselv := reqsel & reqsel & reqsel & reqsel;
-- Config registers
regsd1 := (others => '0');
regsd1(31 downto 15) := dr.cfg.refon & dr.cfg.trp(0) & dr.cfg.trfc(2 downto 0) &
dr.cfg.trcd & dr.cfg.bsize & dr.cfg.csize & dr.cfg.command &
dr.cfg.dllrst & dr.cfg.renable & dr.cfg.cke;
regsd1(11 downto 0) := dr.cfg.refresh;
regsd2 := (others => '0');
regsd2(8 downto 0) := conv_std_logic_vector(MHz, 9);
regsd2(14 downto 12) := conv_std_logic_vector(log2(ddrbits/8),3);
if mobile/=0 then regsd2(15):='1'; end if;-- Mobile DDR support
regsd2(19 downto 16) := conv_std_logic_vector(confapi, 4);
regsd3 := (others => '0');
regsd3(31) := dr.cfg.mobileen; -- Mobile DDR enable
regsd3(30) := dr.cfg.cl;
regsd3(24 downto 19) := dr.cfg.tcke & dr.cfg.txsr(3 downto 0) & dr.cfg.txp(0);
regsd3(18 downto 16) := dr.cfg.pmode;
regsd3( 7 downto 0) := dr.cfg.ds(2 downto 0) & dr.cfg.tcsr(1 downto 0)
& dr.cfg.pasr(2 downto 0);
-- Extended timing fields for DDR400
if ddr400 /= 0 then
regsd2(20) := '1'; -- Ext. fields available
regsd3(29 downto 28) := dr.cfg.tras;
regsd3(27 downto 26) := dr.cfg.txsr(5 downto 4);
regsd3(25) := dr.cfg.txp(1);
regsd3(11) := dr.cfg.twr;
regsd3(10) := dr.cfg.trp(1);
regsd3(9 downto 8) := dr.cfg.trfc(4 downto 3);
end if;
-- Data path
rbw := '0';
rbwd := (others => '0');
rbwd(ddrbits-1 downto 0) := sdi.data(ddrbits-1 downto 0);
rbwd(2*ddrbits+chkbits-1 downto ddrbits+chkbits) :=
sdi.data(2*ddrbits-1 downto ddrbits);
if chkbits > 0 then
rbwd(ddrbits+chkbits-1 downto ddrbits) := sdi.cb(chkbits-1 downto 0);
rbwd(2*(ddrbits+chkbits)-1 downto 2*ddrbits+chkbits) :=
sdi.cb(2*chkbits-1 downto chkbits);
end if;
dv.sdo_data(ddrbits-1 downto 0) := wbrdata(ddrbits-1 downto 0);
dv.sdo_data(2*ddrbits-1 downto ddrbits) :=
wbrdata(2*ddrbits+chkbits-1 downto ddrbits+chkbits);
dv.sdo_cb(chkbits) := '0'; -- dummy bit just to ensure length>0
if chkbits > 0 then
dv.sdo_cb(chkbits-1 downto 0) := wbrdata(ddrbits+chkbits-1 downto ddrbits);
dv.sdo_cb(2*chkbits-1 downto chkbits) :=
wbrdata(2*(ddrbits+chkbits)-1 downto 2*ddrbits+chkbits);
end if;
---------------------------------------------------------------------------
-- Request handling logic
---------------------------------------------------------------------------
-- Sync request inputs
dv.req1 := request;
dv.req2 := dr.req1;
dv.start1 := start_tog;
dv.start2 := dr.start1;
dv.start3 := dr.start2;
vstart := dr.start2;
vstartd := dr.start3;
vreq := dr.req2;
vreqf := dr.req1;
if nosync/=0 then
vstart:=start_tog;
vstartd:=start_tog;
vreq:=request;
vreqf:=request;
end if;
if nosync > 1 then
vreqf := frequest;
end if;
-- Address muxing
vcsf(0) := genmux(dr.cfg.bsize, vreqf.startaddr(30 downto 23));
vcsf(1) := not vcsf(0);
vbankf := genmux(dr.cfg.bsize, vreqf.startaddr(29 downto 22)) &
genmux(dr.cfg.bsize, vreqf.startaddr(28 downto 21));
case dr.cfg.csize is
when "00" => vrowf := vreqf.startaddr(19+l2ddrw downto 5+l2ddrw);
when "01" => vrowf := vreqf.startaddr(20+l2ddrw downto 6+l2ddrw);
when "10" => vrowf := vreqf.startaddr(21+l2ddrw downto 7+l2ddrw);
when others => vrowf := vreqf.startaddr(22+l2ddrw downto 8+l2ddrw);
end case;
vcol := vreq.startaddr(l2ddrw+10 downto l2ddrw-3);
-- vcoladdr==vcol when dr.ramaddr==lsb of vcol
vcoladdr := vcol(14 downto rbuf_wabits+1) & dr.ramaddr;
-- Generate data mask
-- Mask for 32-bit and larger bursts and single access
vmaskfirst := (others => '0');
vmasklast := (others => '0');
ea := vreq.endaddr(3 downto 2);
if vreq.hsize(1 downto 0)="11" then ea(2):='1'; end if;
if vreq.hsize(2)='1' then ea(3 downto 2):="11"; end if;
case ddrbits is
when 64 =>
-- 64-bit DDR width
case vreq.startaddr(3 downto 2) is
when "11" => vmaskfirst := "1111111111110000";
when "10" => vmaskfirst := "1111111100000000";
when "01" => vmaskfirst := "1111000000000000";
when others => vmaskfirst := "0000000000000000";
end case;
case ea(3 downto 2) is
when "11" => vmasklast := "0000000000000000";
when "10" => vmasklast := "0000000000001111";
when "01" => vmasklast := "0000000011111111";
when others => vmasklast := "0000111111111111";
end case;
if vreq.hsize(2 downto 1)="00" then
if vreq.startaddr(1)='1' then
vmaskfirst := vmaskfirst or "1100110011001100";
else
vmaskfirst := vmaskfirst or "0011001100110011";
end if;
end if;
if vreq.hsize="000" then
if vreq.startaddr(0)='1' then
vmaskfirst := vmaskfirst or "1010101010101010";
else
vmaskfirst := vmaskfirst or "0101010101010101";
end if;
end if;
when 32 =>
-- 32-bit DDR width
case vreq.startaddr(2) is
when '1' => vmaskfirst := "11110000";
when others => vmaskfirst := "00000000";
end case;
case ea(2) is
when '1' => vmasklast := "00000000";
when others => vmasklast := "00001111";
end case;
if vreq.hsize(2 downto 1)="00" then
if vreq.startaddr(1)='1' then
vmaskfirst := vmaskfirst or "11001100";
else
vmaskfirst := vmaskfirst or "00110011";
end if;
end if;
if vreq.hsize="000" then
if vreq.startaddr(0)='1' then
vmaskfirst := vmaskfirst or "10101010";
else
vmaskfirst := vmaskfirst or "01010101";
end if;
end if;
when others =>
-- 16-bit DDR width
if vreq.hsize(2 downto 1)="00" then
if vreq.startaddr(1)='1' then
vmaskfirst := vmaskfirst or "1100";
else
vmaskfirst := vmaskfirst or "0011";
end if;
end if;
if vreq.hsize="000" then
if vreq.startaddr(0)='1' then
vmaskfirst := vmaskfirst or "1010";
else
vmaskfirst := vmaskfirst or "0101";
end if;
end if;
end case;
-- Register read/write data muxing
regrdata := (others => '0');
case ddrbits is
when 64 =>
regad := vreq.startaddr(4 downto 2);
regrdata := regsd1 & regsd2 & regsd3 & x"00000000";
if confapi /= 0 and regad(2)='1' then
regrdata(95 downto 32) := dr.cfg.conf(31 downto 0) & dr.cfg.conf(63 downto 32);
end if;
wrdreg1 := wbrdata(128+chkbits-1 downto 96+chkbits);
wrdreg2 := wbrdata(96+chkbits-1 downto 64+chkbits);
wrdreg3 := wbrdata(63 downto 32);
when 32 =>
regad := dr.ramaddr(1 downto 0) & vreq.startaddr(2);
if regad(1)='0' then
regrdata := regsd1 & regsd2;
if confapi /= 0 and regad(2)='1' then
regrdata := regsd1 & dr.cfg.conf(31 downto 0);
end if;
else
regrdata := regsd3 & regsd2;
if confapi /= 0 and regad(2)='1' then
regrdata := dr.cfg.conf(63 downto 0);
end if;
end if;
wrdreg1 := wbrdata(64+chkbits-1 downto 32+chkbits);
wrdreg2 := wbrdata(31 downto 0);
wrdreg3 := wbrdata(64+chkbits-1 downto 32+chkbits);
when others =>
regad := dr.ramaddr(2 downto 0);
case regad is
when "000"|"100" => regrdata := regsd1;
when "001" => regrdata := regsd2;
when "010" => regrdata := regsd3;
when "101" =>
if confapi /= 0 then
regrdata := dr.cfg.conf(31 downto 0);
else
regrdata := regsd2;
end if;
when "110" =>
if confapi /= 0 then
regrdata := dr.cfg.conf(63 downto 32);
else
regrdata := regsd3;
end if;
when others => regrdata := regsd3;
end case;
wrdreg1 := wbrdata(31+chkbits downto 16+chkbits) & wbrdata(15 downto 0);
wrdreg2 := wbrdata(31+chkbits downto 16+chkbits) & wbrdata(15 downto 0);
wrdreg3 := wbrdata(31+chkbits downto 16+chkbits) & wbrdata(15 downto 0);
end case;
---------------------------------------------------------------------------
-- Main DDR-SDRAM access FSM
---------------------------------------------------------------------------
dv.sdo_ck := "111";
dv.sdo_rasn := '1';
dv.sdo_casn := '1';
dv.sdo_wen := '1';
dv.sdo_dqm := (others => '1');
dv.sdo_bdrive := '1';
dv.sdo_qdrive := '1';
inc_sdoaddr := '0';
inc_ramaddr := '0';
dv.readpipe := dr.readpipe(3+readdly downto 0) & '0';
datavalid := '0';
if hasdqvalid/=0 then
datavalid := sdi.datavalid;
if dr.s/=dsrd1 and dr.s/=dsrd2 and dr.s/=dsrd3 and dr.s/=dsrd4 and dr.s/=dssrr2 then
datavalid := '0';
end if;
end if;
if hasdqvalid=0 then
if dr.cfg.cl='0' then
datavalid := dr.readpipe(3+readdly);
else
datavalid := dr.readpipe(4+readdly);
end if;
end if;
if datavalid='1' and dr.s/=dsidle then
inc_ramaddr := '1';
rbw := '1';
vrctr(l2ddr_burstlen-1 downto 0) :=
nextgray(vrctr(l2ddr_burstlen-1 downto 0));
if dr.ramaddr=onev(dr.ramaddr'length-1 downto 0) then
dv.readdone := '1';
incdone:='1';
vrctr := "0000";
end if;
end if;
if dr.sdo_address((l2blen-l2ddrw) downto 1)=onev((l2blen-l2ddrw) downto 1) then
lastreadcmd := '1';
end if;
if dr.ramaddr=vreq.endaddr((l2blen-3)-1 downto (l2ddrw-3)) then
lastwrite := '1';
end if;
-- Update EMR when ds, tcsr or pasr change
if dr.cfg.command="000" and
( dr.cfg.ds(2 downto 0) /= dr.cfg.ds(5 downto 3) or
dr.cfg.tcsr(1 downto 0) /= dr.cfg.tcsr(3 downto 2) or
dr.cfg.pasr(2 downto 0) /= dr.cfg.pasr(5 downto 3) ) then
dv.cfg.command := "111";
end if;
-- Auto-refresh counter
dv.refctr := std_logic_vector(unsigned(dr.refctr)+1);
if (dr.refctr(11 downto 0)=dr.cfg.refresh and dr.cfg.refon='1') then
dv.refpend := '1';
dv.refctr := (others => '0');
end if;
if dr.initstate/=disrstdel and (dr.cfg.refon='0' or dr.cfg.pmode(1)='1') then
dv.refpend := '0';
dv.refctr := (others => '0');
end if;
dv.idlectr := "0000";
dv.pdowns(0) := '0';
if not (dr.cmdctr=(dr.cmdctr'range => '0')) and dr.pdowns(0)='0' then
dv.cmdctr := std_logic_vector(unsigned(dr.cmdctr)-1);
end if;
case dr.s is
when dsidle =>
vrctr := "0000";
dv.sdo_ck := "111";
if dr.cfg.pmode /= "000" then
dv.idlectr := std_logic_vector(unsigned(dr.idlectr)+1);
end if;
dv.sdo_csn := "11";
if dr.refpend='1' then
dv.sdo_csn := "00";
dv.sdo_rasn := '0';
dv.sdo_casn := '0';
dv.s := dsref1;
dv.refpend := '0';
elsif vstart /= vdone and dr.cfg.renable='0' then
-- Transfer
dv.sdo_csn := vcsf;
dv.sdo_address := vrowf;
dv.sdo_ba := vbankf;
dv.sdo_rasn := '0' or vreqf.hio;
dv.s := dsact1;
elsif dr.cfg.command /= "000" then
dv.s := dscmd1;
elsif dr.idlectr="1111" then
dv.s := dspdown1;
end if;
when dsact1 =>
dv.ramaddr := vcol(rbuf_wabits downto 1);
if ddr400 /= 0 then
dv.cmdctr(2 downto 0) := "1" & dr.cfg.tras; -- t(RAS)-2t(CK) = TRAS+6-2 = TRAS+4
else
dv.cmdctr(2 downto 0) := "10" & dr.cfg.trcd;
end if;
dv.readdone := '0';
if dr.cfg.trcd='1' then
dv.s := dsact2;
else
dv.s := dsact3;
end if;
if vreq.hio='1' then
dv.s := dsreg1;
end if;
when dsact2 =>
dv.s := dsact3;
when dsact3 =>
dv.sdo_casn := '0';
dv.sdo_wen := not vreq.hwrite;
dv.sdo_qdrive := not vreq.hwrite;
-- dv.sdo_address := vcol(12 downto 10) & '0' & vcol(9 downto 1) & '0';
-- Since part of column is stored in ramaddr in dsact1, use that to
-- reduce fanout on vreq.startaddr
dv.sdo_address := vcoladdr(13 downto 10) & '0' & vcoladdr(9 downto 1) & '0';
if vreq.hwrite='1' then
dv.s := dswr1;
else
dv.s := dsrd1;
dv.readpipe(0) := '1';
end if;
when dswr1 =>
-- NOP,NOP,[WR]: issue either WR+D or NOP+D
dv.sdo_bdrive := '0';
dv.sdo_qdrive := '0';
inc_sdoaddr := '1';
inc_ramaddr := '1';
if lastwrite='1' then
dv.sdo_dqm := vmaskfirst or vmasklast;
dv.s := dswr3;
else
dv.sdo_casn := '0';
dv.sdo_wen := '0';
dv.sdo_dqm := vmaskfirst;
dv.s := dswr2;
end if;
when dswr2 =>
dv.sdo_dqm := (others => '0');
dv.sdo_bdrive := '0';
dv.sdo_qdrive := '0';
inc_sdoaddr := '1';
inc_ramaddr := '1';
if lastwrite='0' then
dv.sdo_casn := '0';
dv.sdo_wen := '0';
else
dv.s := dswr3;
dv.sdo_dqm := vmasklast;
end if;
when dswr3 =>
-- ...,WR+D,WR+D,[NOP+D]: issue NOP
dv.sdo_qdrive := '0';
dv.sdo_dqm := (others => '1');
dv.s := dswr4;
incdone := '1';
when dswr4 =>
-- Issue more NOP:s to meet tWR
dv.idlectr := std_logic_vector(unsigned(dr.idlectr)+1);
if dr.idlectr(0)=dr.cfg.twr then
dv.s := dswr5;
end if;
when dswr5 =>
-- Issue NOP:s until tRAS met.
if dr.cmdctr(2 downto 0)="000" then
dv.sdo_rasn := '0';
dv.sdo_wen := '0';
dv.s := dswr6;
end if;
when dswr6 =>
-- PRE: issue one or two NOP:s depending on trp setting
if dr.idlectr(1 downto 0)=dr.cfg.trp then
dv.s := dsidle;
else
dv.idlectr := std_logic_vector(unsigned(dr.idlectr)+1);
end if;
when dsrd1 =>
inc_sdoaddr := '1';
if lastreadcmd='0' then
dv.sdo_casn := '0';
dv.readpipe(0):='1';
elsif dr.cmdctr(2 downto 0)="000" then
dv.sdo_rasn := '0';
dv.sdo_wen := '0';
dv.s := dsrd3;
else
dv.s := dsrd2;
end if;
when dsrd2 =>
if dr.cmdctr(2 downto 0)="000" then
dv.sdo_rasn := '0';
dv.sdo_wen := '0';
dv.s := dsrd3;
end if;
when dsrd3 =>
if dr.idlectr(1 downto 0)=dr.cfg.trp then
if dv.readdone='1' then
dv.s := dsidle;
else
dv.s := dsrd4;
end if;
else
dv.idlectr := std_logic_vector(unsigned(dr.idlectr)+1);
end if;
when dsrd4 =>
if dv.readdone='1' then
dv.s := dsidle;
end if;
when dsreg1 =>
rbw := '1';
rbwd(2*ddrbits+chkbits-1 downto ddrbits+chkbits) := regrdata(2*ddrbits-1 downto ddrbits);
rbwd(ddrbits-1 downto 0) := regrdata(ddrbits-1 downto 0);
if vreq.hwrite='1' then
dv.s := dsreg2;
elsif regad="100" and dr.cfg.mobileen='1' then
dv.sdo_address := (others => '0');
dv.sdo_ba := "01";
dv.sdo_csn := "10";
dv.sdo_rasn := '0';
dv.sdo_casn := '0';
dv.sdo_wen := '0';
dv.s := dssrr1;
dv.cmdctr(0) := '1';
null;
else
incdone := '1';
dv.s := dsidle;
end if;
when dsreg2 =>
case regad is
when "000" =>
dv.cfg.refon := wrdreg1(31);
dv.cfg.trp(0) := wrdreg1(30);
dv.cfg.trfc(2 downto 0) := wrdreg1(29 downto 27);
dv.cfg.trcd := wrdreg1(26);
dv.cfg.bsize := wrdreg1(25 downto 23);
dv.cfg.csize := wrdreg1(22 downto 21);
dv.cfg.command := wrdreg1(20 downto 18);
dv.cfg.dllrst := wrdreg1(17);
dv.cfg.renable := wrdreg1(16);
dv.cfg.cke := wrdreg1(15);
dv.cfg.refresh := wrdreg1(11 downto 0);
when "010" =>
dv.cfg.mobileen := wrdreg3(31);
dv.cfg.cl := wrdreg3(30);
dv.cfg.tcke := wrdreg3(24);
dv.cfg.txsr(3 downto 0) := wrdreg3(23 downto 20);
dv.cfg.txp(0) := wrdreg3(19);
dv.cfg.pmode := wrdreg3(18 downto 16);
dv.cfg.ds (5 downto 3) := wrdreg3(7 downto 5);
dv.cfg.tcsr(3 downto 2) := wrdreg3(4 downto 3);
dv.cfg.pasr(5 downto 3) := wrdreg3(2 downto 0);
-- Extended DDR400 fields
dv.cfg.tras := wrdreg3(29 downto 28);
dv.cfg.txsr(5 downto 4) := wrdreg3(27 downto 26);
dv.cfg.txp(1) := wrdreg3(25);
dv.cfg.twr := wrdreg3(11);
dv.cfg.trp(1) := wrdreg3(10);
dv.cfg.trfc(4 downto 3) := wrdreg3(9 downto 8);
when "101" =>
if confapi /= 0 then
dv.cfg.conf(31 downto 0) := wrdreg2;
end if;
when "110" =>
if confapi /= 0 then
dv.cfg.conf(63 downto 32) := wrdreg3;
end if;
when others =>
null;
end case;
incdone := '1';
dv.s := dsidle;
when dscmd1 =>
dv.sdo_csn := (others => '0');
dv.sdo_address(10) := '1';
dv.cfg.command := "000";
dv.s := dscmd2;
case dr.cfg.command is
when "010" => -- PRECHARGE ALL
dv.sdo_rasn := '0';
dv.sdo_wen := '0';
dv.cmdctr(1 downto 0) := "11";
when "100" => -- AUTO-REFRESH
dv.sdo_rasn := '0';
dv.sdo_casn := '0';
dv.cmdctr(4 downto 0) := dr.cfg.trfc;
when "110" => -- MODE REGISTER
dv.sdo_rasn := '0';
dv.sdo_casn := '0';
dv.sdo_wen := '0';
dv.sdo_ba := "00";
dv.sdo_address := "00000000" & "01" & dr.cfg.cl & "0001";
if dr.cfg.mobileen='0' then
dv.sdo_address(8) := dr.cfg.dllrst;
end if;
if dr.cfg.dllrst='1' then
dv.cmdctr := std_logic_vector(to_unsigned(200,dr.cmdctr'length));
end if;
when "111" => -- EXT. MODE REGISTER
dv.sdo_rasn := '0';
dv.sdo_casn := '0';
dv.sdo_wen := '0';
if dr.cfg.mobileen='1' then
dv.sdo_ba := "10";
dv.sdo_address := "0000000" & dr.cfg.ds(5 downto 3) & dr.cfg.tcsr(3 downto 2)
& dr.cfg.pasr(5 downto 3);
else
dv.sdo_ba := "01";
dv.sdo_address := "000000000000000"; -- bit0=0 -> DLL enable
end if;
dv.cfg.pasr(2 downto 0) := dr.cfg.pasr(5 downto 3);
dv.cfg.ds(2 downto 0) := dr.cfg.ds(5 downto 3);
dv.cfg.tcsr(1 downto 0) := dr.cfg.tcsr(3 downto 2);
when others => null;
end case;
when dscmd2 =>
if dr.cmdctr=(dr.cmdctr'range => '0') then
dv.s := dsidle;
end if;
when dspdown1 =>
dv.sdo_csn := "00";
if dr.cfg.pmode(0)='1' or dr.cfg.pmode(1)='1' then
dv.cfg.cke := '0';
end if;
if dr.cfg.pmode(1)='1' then
dv.sdo_rasn := '0';
dv.sdo_casn := '0';
end if;
if dr.cfg.pmode(2)='1' and dr.cfg.pmode(0)='1' then
dv.sdo_wen := '0';
end if;
if dr.cfg.pmode(0)='1' then
dv.cmdctr(1 downto 0) := dr.cfg.txp;
end if;
if dr.cfg.pmode(1)='1' then
if dr.cfg.mobileen='1' then
dv.cmdctr(5 downto 0) := dr.cfg.txsr;
else
dv.cmdctr(7 downto 0) := std_logic_vector(to_unsigned(200,8));
end if;
end if;
dv.pdowns(1) := '0';
dv.s := dspdown2;
when dspdown2 =>
dv.pdowns(0) := '1';
if dr.pdowns(0)='0' and dr.cmdctr=(dr.cmdctr'range => '0') then
dv.pdowns(1):='1';
end if;
if dr.cfg.pmode(2)='1' and dr.cfg.pmode(0)='0' then
dv.sdo_ck := "000";
end if;
if dr.cfg.pmode(1)='1' then
dv.refpend := '1';
end if;
if (dr.refpend='1' and dr.cfg.pmode(1)='0') or vstart /= vdone then
if (dr.pdowns(0) or not dr.cfg.tcke)='1' then
dv.cfg.cke := '1';
if dr.pdowns(1)='1' then
dv.s := dsidle;
else
dv.s := dscmd2;
dv.pdowns(0) := '0';
end if;
end if;
end if;
when dsref1 =>
dv.s := dscmd2;
dv.cmdctr(4 downto 0) := dr.cfg.trfc;
when dssrr1 =>
if dr.cmdctr(0)='0' then
dv.sdo_casn := '0';
dv.readpipe(0):='1';
dv.s := dssrr2;
end if;
when dssrr2 =>
if datavalid='1' then
incdone := '1';
dv.s := dsidle;
end if;
end case;
if inc_sdoaddr='1' then
dv.sdo_address(l2blen-l2ddrw downto 1) :=
std_logic_vector(unsigned(dr.sdo_address(l2blen-l2ddrw downto 1))+1);
end if;
if inc_ramaddr='1' then
dv.ramaddr := std_logic_vector(unsigned(dr.ramaddr)+1);
end if;
-- Update the done flags
dv.resp.done_tog := (dr.resp.done_tog xor incdone) and (not reqsel);
dv.resp.rctr_gray := vrctr and (not reqselv);
dv.resp2.done_tog := (dr.resp2.done_tog xor incdone) and reqsel;
dv.resp2.rctr_gray := vrctr and reqselv;
---------------------------------------------------------------------------
-- DDR Init Sequence FSM
---------------------------------------------------------------------------
-- Command sequence lookup table
seqin := dr.cfg.mobileen & dr.initpos;
case seqin is
-- Mobile DDR
when "1100" => seqout := "0010"; -- PRECHARGE ALL
when "1011" => seqout := "0100"; -- AUTO REFRESH #1
when "1010" => seqout := "0100"; -- AUTO REFRESH #2
when "1001" => seqout := "0110"; -- MODE REG
when "1000" => seqout := "0111"; -- EXT MODE REG
-- Normal DDR
when "0110" => seqout := "0010"; -- PRECHARGE ALL
when "0101" => seqout := "0111"; -- EXT MODE REG En DLL
when "0100" => seqout := "1110"; -- MODE REG Rst DLL
when "0011" => seqout := "0010"; -- PRECHARGE ALL
when "0010" => seqout := "0100"; -- AUTO REFRESH #1
when "0001" => seqout := "0100"; -- AUTO REFRESH #2
when "0000" => seqout := "0110"; -- MODE REG NoRst DLL
when others => seqout := "0000";
end case;
case dr.initstate is
when disrstdel =>
if dr.refctr=std_logic_vector(to_unsigned(MHz*rstdel,dr.refctr'length)) then
dv.initstate := disidle;
if pwron=0 then dv.cfg.renable:='0'; end if;
end if;
-- Bypass reset delay by writing anything to regsd2
if vstartd='1' and (vreq.hio='1' and vreq.hwrite='1' and vreq.endaddr(4 downto 2)="001") then
dv.initstate := disidle;
if pwron=0 then dv.cfg.renable:='0'; end if;
end if;
when disidle =>
if dr.cfg.renable='1' then
dv.cfg.cke := '1';
if dr.cfg.cke='1' then
dv.initpos := "111";
dv.initstate := disrun;
end if;
end if;
when disrun =>
if dr.cfg.command="000" then
dv.cfg.dllrst := seqout(3);
dv.cfg.command := seqout(2 downto 0);
dv.initpos := std_logic_vector(unsigned(dr.initpos)-1);
if dr.initpos="000" then
dv.initstate := disfinished;
end if;
end if;
when disfinished =>
if dr.cfg.command="000" then
dv.cfg.renable := '0';
dv.cfg.refon := '1';
dv.initstate := disidle;
end if;
end case;
---------------------------------------------------------------------------
-- Reset
---------------------------------------------------------------------------
if ddr_rst='0' then
dv.s := dsidle;
dv.cmdctr := (others => '0');
dv.refctr := (others => '0');
dv.resp := ddr_response_none;
dv.resp2 := ddr_response_none;
dv.initstate := disrstdel;
dv.refpend := '0';
-- Reset cfg record
dv.cfg.command := "000";
dv.cfg.csize := conv_std_logic_vector(col-9, 2);
dv.cfg.bsize := conv_std_logic_vector(log2(Mbyte/8), 3);
dv.cfg.refon := '0';
dv.cfg.refresh := conv_std_logic_vector(7800*MHz/1000, 12);
dv.cfg.dllrst := '0';
dv.cfg.pasr := (others => '0');
dv.cfg.tcsr := (others => '0');
dv.cfg.ds := (others => '0');
dv.cfg.pmode := (others => '0');
dv.cfg.txsr := conv_std_logic_vector(120*MHz/1000, 6);
dv.cfg.txp := "01";
dv.cfg.cl := '0'; -- CL = 3/2 -- ****
dv.cfg.tcke := '1';
if MHz > 100 then
dv.cfg.trcd := '1';
else dv.cfg.trcd := '0';
end if;
if MHz > 100 then
dv.cfg.trp := "01";
else dv.cfg.trp := "00";
end if;
dv.cfg.renable := '1'; -- Updated in disrstdel state
if mobile >= 2 then
dv.cfg.mobileen := '1'; -- Default: Mobile DDR
else dv.cfg.mobileen := '0';
end if;
if mobile >= 2 then
dv.cfg.trfc := conv_std_logic_vector(98*MHz/1000-2, 5);
else dv.cfg.trfc := conv_std_logic_vector(75*MHz/1000-2, 5);
end if;
if ddr_syncrst /= 0 then
dv.sdo_ck := "000";
if mobile >= 2 then
dv.cfg.cke := '1';
else dv.cfg.cke := '0';
end if;
end if;
if confapi /= 0 then
dv.cfg.conf(31 downto 0) := conv_std_logic_vector(conf0, 32); --x"0000A0A0";
dv.cfg.conf(63 downto 32) := conv_std_logic_vector(conf1, 32); --x"00060606";
else
dv.cfg.conf := (others => '0');
end if;
if MHz > 175 then
dv.cfg.tras := "10";
elsif MHz > 150 then
dv.cfg.tras := "01";
else
dv.cfg.tras := "00";
end if;
if MHz > 133 then
dv.cfg.twr := '1';
else
dv.cfg.twr := '0';
end if;
dv.sdo_csn := "11";
dv.sdo_dqm := (others => '1');
dv.sdo_wen := '1';
dv.sdo_rasn := '1';
dv.sdo_casn := '1';
-- Extra reset for X-sensitive techs
dv.ramaddr := (others => '0');
end if;
---------------------------------------------------------------------------
-- Static logic/forced regs, etc
---------------------------------------------------------------------------
-- Force mobile disable/enabled
if mobile=0 then dv.cfg.mobileen := '0'; end if;
if mobile=3 then dv.cfg.mobileen := '1'; end if;
if mobile=0 then
dv.cfg.pasr := (others => '0');
dv.cfg.tcsr := (others => '0');
dv.cfg.ds := (others => '0');
dv.cfg.pmode := (others => '0');
dv.cfg.txp := "00";
dv.cfg.txsr := (others => '0');
dv.cfg.tcke := '0';
end if;
if ddr400=0 then
dv.cfg.tras := "00";
dv.cfg.txsr(5 downto 4) := "00";
dv.cfg.txp(1) := '0';
dv.cfg.trp(1) := '0';
dv.cfg.trfc(4 downto 3) := "00";
dv.cfg.twr := '0';
end if;
-- Assign sdo
o.bdrive := '1'; o.qdrive := '1'; --Temp.
o.sdck := dr.sdo_ck;
if ddr_syncrst/=0 and phyptctrl/=0 then
o.sdck := o.sdck and (o.sdck'range => ddr_rst);
end if;
if regoutput /= 0 then
o.casn := dr.sdo_casn;
o.rasn := dr.sdo_rasn;
o.sdwen := dr.sdo_wen;
o.sdcsn := dr.sdo_csn;
o.ba := '0' & dr.sdo_ba;
o.address := dr.sdo_address;
o.sdcke := (others => dr.cfg.cke);
if ddr_syncrst /= 0 and phyptctrl /= 0 then
if ddr_rst='0' then
if mobile >= 2 then o.sdcke := (others => '1');
else o.sdcke := (others => '0');
end if;
end if;
end if;
o.data(2*ddrbits-1 downto 0) := dr.sdo_data;
o.dqm(ddrbits/4-1 downto 0) := dr.sdo_dqm;
if chkbits > 0 then
o.cb(2*chkbits-1 downto 0) := dr.sdo_cb(2*chkbits-1 downto 0);
end if;
o.bdrive := dr.sdo_bdrive;
o.qdrive := dr.sdo_qdrive;
else
o.casn := dv.sdo_casn;
o.rasn := dv.sdo_rasn;
o.sdwen := dv.sdo_wen;
o.sdcsn := dv.sdo_csn;
o.ba := '0' & dv.sdo_ba;
o.address := dv.sdo_address;
o.sdcke := (others => dv.cfg.cke);
o.data(2*ddrbits-1 downto 0) := dv.sdo_data;
o.dqm(ddrbits/4-1 downto 0) := dv.sdo_dqm;
if chkbits > 0 then
o.cb(2*chkbits-1 downto 0) := dv.sdo_cb(2*chkbits-1 downto 0);
end if;
o.bdrive := dv.sdo_bdrive;
o.qdrive := dv.sdo_qdrive;
end if;
for x in 7 downto 0 loop
o.cbdqm(x) := o.dqm(2*x);
end loop;
-- Diag access
if vreq.maskcb='1' then
o.cbdqm := (others => '1');
end if;
if vreq.maskdata='1' then
o.dqm := (others => '1');
end if;
if scantest/=0 and phyptctrl/=0 then
if testen='1' then
o.bdrive := testoen;
o.qdrive := testoen;
end if;
end if;
---------------------------------------------------------------------------
-- Drive outputs
---------------------------------------------------------------------------
ndr <= dv;
sdo <= o;
response <= dr.resp;
response2 <= dr.resp2;
rbwrite <= rbw;
rbwaddr <= dr.ramaddr;
rbwdata <= rbwd;
wbraddr <= vdone & dv.ramaddr;
end process;
ddrregs: process(clk_ddr,arst)
begin
if rising_edge(clk_ddr) then
dr <= ndr;
end if;
if ddr_syncrst=0 and arst='0' then
dr.sdo_ck <= "000";
if mobile >= 2 then
dr.cfg.cke <= '1';
else dr.cfg.cke <= '0';
end if;
end if;
end process;
end;
|
gpl-3.0
|
EliasLuiz/TCC
|
Leon3/designs/leon3-terasic-de0-nano/mt48lc16m16a2.vhd
|
2
|
69330
|
--*****************************************************************************
--
-- Micron Semiconductor Products, Inc.
--
-- Copyright 1997, Micron Semiconductor Products, Inc.
-- All rights reserved.
--
--*****************************************************************************
-- pragma translate_off
library ieee;
use ieee.std_logic_1164.ALL;
use std.textio.all;
PACKAGE mti_pkg IS
FUNCTION To_StdLogic (s : BIT) RETURN STD_LOGIC;
FUNCTION TO_INTEGER (input : STD_LOGIC) RETURN INTEGER;
FUNCTION TO_INTEGER (input : BIT_VECTOR) RETURN INTEGER;
FUNCTION TO_INTEGER (input : STD_LOGIC_VECTOR) RETURN INTEGER;
PROCEDURE TO_BITVECTOR (VARIABLE input : IN INTEGER; VARIABLE output : OUT BIT_VECTOR);
END mti_pkg;
PACKAGE BODY mti_pkg IS
-- Convert BIT to STD_LOGIC
FUNCTION To_StdLogic (s : BIT) RETURN STD_LOGIC IS
BEGIN
CASE s IS
WHEN '0' => RETURN ('0');
WHEN '1' => RETURN ('1');
WHEN OTHERS => RETURN ('0');
END CASE;
END;
-- Convert STD_LOGIC to INTEGER
FUNCTION TO_INTEGER (input : STD_LOGIC) RETURN INTEGER IS
VARIABLE result : INTEGER := 0;
VARIABLE weight : INTEGER := 1;
BEGIN
IF input = '1' THEN
result := weight;
ELSE
result := 0; -- if unknowns, default to logic 0
END IF;
RETURN result;
END TO_INTEGER;
-- Convert BIT_VECTOR to INTEGER
FUNCTION TO_INTEGER (input : BIT_VECTOR) RETURN INTEGER IS
VARIABLE result : INTEGER := 0;
VARIABLE weight : INTEGER := 1;
BEGIN
FOR i IN input'LOW TO input'HIGH LOOP
IF input(i) = '1' THEN
result := result + weight;
ELSE
result := result + 0; -- if unknowns, default to logic 0
END IF;
weight := weight * 2;
END LOOP;
RETURN result;
END TO_INTEGER;
-- Convert STD_LOGIC_VECTOR to INTEGER
FUNCTION TO_INTEGER (input : STD_LOGIC_VECTOR) RETURN INTEGER IS
VARIABLE result : INTEGER := 0;
VARIABLE weight : INTEGER := 1;
BEGIN
FOR i IN input'LOW TO input'HIGH LOOP
IF input(i) = '1' THEN
result := result + weight;
ELSE
result := result + 0; -- if unknowns, default to logic 0
END IF;
weight := weight * 2;
END LOOP;
RETURN result;
END TO_INTEGER;
-- Conver INTEGER to BIT_VECTOR
PROCEDURE TO_BITVECTOR (VARIABLE input : IN INTEGER; VARIABLE output : OUT BIT_VECTOR) IS
VARIABLE work,offset,outputlen,j : INTEGER := 0;
BEGIN
--length of vector
IF output'LENGTH > 32 THEN --'
outputlen := 32;
offset := output'LENGTH - 32; --'
IF input >= 0 THEN
FOR i IN offset-1 DOWNTO 0 LOOP
output(output'HIGH - i) := '0'; --'
END LOOP;
ELSE
FOR i IN offset-1 DOWNTO 0 LOOP
output(output'HIGH - i) := '1'; --'
END LOOP;
END IF;
ELSE
outputlen := output'LENGTH; --'
END IF;
--positive value
IF (input >= 0) THEN
work := input;
j := outputlen - 1;
FOR i IN 1 to 32 LOOP
IF j >= 0 then
IF (work MOD 2) = 0 THEN
output(output'HIGH-j-offset) := '0'; --'
ELSE
output(output'HIGH-j-offset) := '1'; --'
END IF;
END IF;
work := work / 2;
j := j - 1;
END LOOP;
IF outputlen = 32 THEN
output(output'HIGH) := '0'; --'
END IF;
--negative value
ELSE
work := (-input) - 1;
j := outputlen - 1;
FOR i IN 1 TO 32 LOOP
IF j>= 0 THEN
IF (work MOD 2) = 0 THEN
output(output'HIGH-j-offset) := '1'; --'
ELSE
output(output'HIGH-j-offset) := '0'; --'
END IF;
END IF;
work := work / 2;
j := j - 1;
END LOOP;
IF outputlen = 32 THEN
output(output'HIGH) := '1'; --'
END IF;
END IF;
END TO_BITVECTOR;
END mti_pkg;
-----------------------------------------------------------------------------------------
--
-- File Name: MT48LC16M16A2.VHD
-- Version: 0.0g
-- Date: June 29th, 2000
-- Model: Behavioral
-- Simulator: Model Technology (PC version 5.3 PE)
--
-- Dependencies: None
--
-- Author: Son P. Huynh
-- Email: [email protected]
-- Phone: (208) 368-3825
-- Company: Micron Technology, Inc.
-- Part Number: MT48LC16M16A2 (4Mb x 16 x 4 Banks)
--
-- Description: Micron 256Mb SDRAM
--
-- Limitation: - Doesn't check for 4096-cycle refresh --'
--
-- Note: - Set simulator resolution to "ps" accuracy
--
-- Disclaimer: THESE DESIGNS ARE PROVIDED "AS IS" WITH NO WARRANTY
-- WHATSOEVER AND MICRON SPECIFICALLY DISCLAIMS ANY
-- IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR
-- A PARTICULAR PURPOSE, OR AGAINST INFRINGEMENT.
--
-- Copyright (c) 1998 Micron Semiconductor Products, Inc.
-- All rights researved
--
-- Rev Author Phone Date Changes
-- ---- ---------------------------- ---------- -------------------------------------
-- 0.0g Son Huynh 208-368-3825 06/29/2000 Add Load/Dump memory array
-- Micron Technology Inc. Modify tWR + tRAS timing check
--
-- 0.0f Son Huynh 208-368-3825 07/08/1999 Fix tWR = 1 Clk + 7.5 ns (Auto)
-- Micron Technology Inc. Fix tWR = 15 ns (Manual)
-- Fix tRP (Autoprecharge to AutoRefresh)
--
-- 0.0c Son P. Huynh 208-368-3825 04/08/1999 Fix tWR + tRP in Write with AP
-- Micron Technology Inc. Fix tRC check in Load Mode Register
--
-- 0.0b Son P. Huynh 208-368-3825 01/06/1998 Derive from 64Mb SDRAM model
-- Micron Technology Inc.
--
-----------------------------------------------------------------------------------------
LIBRARY STD;
USE STD.TEXTIO.ALL;
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
LIBRARY WORK;
USE WORK.MTI_PKG.ALL;
use std.textio.all;
library grlib;
use grlib.stdlib.all;
use grlib.stdio.all;
ENTITY mt48lc16m16a2 IS
GENERIC (
-- Timing Parameters for -75 (PC133) and CAS Latency = 2
tAC : TIME := 6.0 ns;
tHZ : TIME := 7.0 ns;
tOH : TIME := 2.7 ns;
tMRD : INTEGER := 2; -- 2 Clk Cycles
tRAS : TIME := 44.0 ns;
tRC : TIME := 66.0 ns;
tRCD : TIME := 20.0 ns;
tRP : TIME := 20.0 ns;
tRRD : TIME := 15.0 ns;
tWRa : TIME := 7.5 ns; -- A2 Version - Auto precharge mode only (1 Clk + 7.5 ns)
tWRp : TIME := 15.0 ns; -- A2 Version - Precharge mode only (15 ns)
tAH : TIME := 0.8 ns;
tAS : TIME := 1.5 ns;
tCH : TIME := 2.5 ns;
tCL : TIME := 2.5 ns;
tCK : TIME := 10.0 ns;
tDH : TIME := 0.8 ns;
tDS : TIME := 1.5 ns;
tCKH : TIME := 0.8 ns;
tCKS : TIME := 1.5 ns;
tCMH : TIME := 0.8 ns;
tCMS : TIME := 1.5 ns;
addr_bits : INTEGER := 13;
data_bits : INTEGER := 16;
col_bits : INTEGER := 9;
index : INTEGER := 0;
fname : string := "ram.srec" -- File to read from
);
PORT (
Dq : INOUT STD_LOGIC_VECTOR (data_bits - 1 DOWNTO 0) := (OTHERS => 'Z');
Addr : IN STD_LOGIC_VECTOR (addr_bits - 1 DOWNTO 0) := (OTHERS => '0');
Ba : IN STD_LOGIC_VECTOR := "00";
Clk : IN STD_LOGIC := '0';
Cke : IN STD_LOGIC := '1';
Cs_n : IN STD_LOGIC := '1';
Ras_n : IN STD_LOGIC := '1';
Cas_n : IN STD_LOGIC := '1';
We_n : IN STD_LOGIC := '1';
Dqm : IN STD_LOGIC_VECTOR (1 DOWNTO 0) := "00"
);
END mt48lc16m16a2;
ARCHITECTURE behave OF mt48lc16m16a2 IS
TYPE State IS (ACT, A_REF, BST, LMR, NOP, PRECH, READ, READ_A, WRITE, WRITE_A, LOAD_FILE, DUMP_FILE);
TYPE Array4xI IS ARRAY (3 DOWNTO 0) OF INTEGER;
TYPE Array4xT IS ARRAY (3 DOWNTO 0) OF TIME;
TYPE Array4xB IS ARRAY (3 DOWNTO 0) OF BIT;
TYPE Array4x2BV IS ARRAY (3 DOWNTO 0) OF BIT_VECTOR (1 DOWNTO 0);
TYPE Array4xCBV IS ARRAY (4 DOWNTO 0) OF BIT_VECTOR (Col_bits - 1 DOWNTO 0);
TYPE Array_state IS ARRAY (4 DOWNTO 0) OF State;
SIGNAL Operation : State := NOP;
SIGNAL Mode_reg : BIT_VECTOR (addr_bits - 1 DOWNTO 0) := (OTHERS => '0');
SIGNAL Active_enable, Aref_enable, Burst_term : BIT := '0';
SIGNAL Mode_reg_enable, Prech_enable, Read_enable, Write_enable : BIT := '0';
SIGNAL Burst_length_1, Burst_length_2, Burst_length_4, Burst_length_8 : BIT := '0';
SIGNAL Cas_latency_2, Cas_latency_3 : BIT := '0';
SIGNAL Ras_in, Cas_in, We_in : BIT := '0';
SIGNAL Write_burst_mode : BIT := '0';
SIGNAL RAS_clk, Sys_clk, CkeZ : BIT := '0';
-- Checking internal wires
SIGNAL Pre_chk : BIT_VECTOR (3 DOWNTO 0) := "0000";
SIGNAL Act_chk : BIT_VECTOR (3 DOWNTO 0) := "0000";
SIGNAL Dq_in_chk, Dq_out_chk : BIT := '0';
SIGNAL Bank_chk : BIT_VECTOR (1 DOWNTO 0) := "00";
SIGNAL Row_chk : BIT_VECTOR (addr_bits - 1 DOWNTO 0) := (OTHERS => '0');
SIGNAL Col_chk : BIT_VECTOR (col_bits - 1 DOWNTO 0) := (OTHERS => '0');
BEGIN
-- CS# Decode
WITH Cs_n SELECT
Cas_in <= TO_BIT (Cas_n, '1') WHEN '0',
'1' WHEN '1',
'1' WHEN OTHERS;
WITH Cs_n SELECT
Ras_in <= TO_BIT (Ras_n, '1') WHEN '0',
'1' WHEN '1',
'1' WHEN OTHERS;
WITH Cs_n SELECT
We_in <= TO_BIT (We_n, '1') WHEN '0',
'1' WHEN '1',
'1' WHEN OTHERS;
-- Commands Decode
Active_enable <= NOT(Ras_in) AND Cas_in AND We_in;
Aref_enable <= NOT(Ras_in) AND NOT(Cas_in) AND We_in;
Burst_term <= Ras_in AND Cas_in AND NOT(We_in);
Mode_reg_enable <= NOT(Ras_in) AND NOT(Cas_in) AND NOT(We_in);
Prech_enable <= NOT(Ras_in) AND Cas_in AND NOT(We_in);
Read_enable <= Ras_in AND NOT(Cas_in) AND We_in;
Write_enable <= Ras_in AND NOT(Cas_in) AND NOT(We_in);
-- Burst Length Decode
Burst_length_1 <= NOT(Mode_reg(2)) AND NOT(Mode_reg(1)) AND NOT(Mode_reg(0));
Burst_length_2 <= NOT(Mode_reg(2)) AND NOT(Mode_reg(1)) AND Mode_reg(0);
Burst_length_4 <= NOT(Mode_reg(2)) AND Mode_reg(1) AND NOT(Mode_reg(0));
Burst_length_8 <= NOT(Mode_reg(2)) AND Mode_reg(1) AND Mode_reg(0);
-- CAS Latency Decode
Cas_latency_2 <= NOT(Mode_reg(6)) AND Mode_reg(5) AND NOT(Mode_reg(4));
Cas_latency_3 <= NOT(Mode_reg(6)) AND Mode_reg(5) AND Mode_reg(4);
-- Write Burst Mode
Write_burst_mode <= Mode_reg(9);
-- RAS Clock for checking tWR and tRP
PROCESS
variable Clk0, Clk1 : integer := 0;
begin
RAS_clk <= '1';
wait for 0.5 ns;
RAS_clk <= '0';
wait for 0.5 ns;
if Clk0 > 100 or Clk1 > 100 then
wait;
else
if Clk = '1' and Cke = '1' then
Clk0 := 0;
Clk1 := Clk1 + 1;
elsif Clk = '0' and Cke = '1' then
Clk0 := Clk0 + 1;
Clk1 := 0;
end if;
end if;
END PROCESS;
-- System Clock
int_clk : PROCESS (Clk)
begin
IF Clk'LAST_VALUE = '0' AND Clk = '1' THEN --'
CkeZ <= TO_BIT(Cke, '1');
END IF;
Sys_clk <= CkeZ AND TO_BIT(Clk, '0');
END PROCESS;
state_register : PROCESS
-- NOTE: The extra bits in RAM_TYPE is for checking memory access. A logic 1 means
-- the location is in use. This will be checked when doing memory DUMP.
TYPE ram_type IS ARRAY (2**col_bits - 1 DOWNTO 0) OF BIT_VECTOR (data_bits DOWNTO 0);
TYPE ram_pntr IS ACCESS ram_type;
TYPE ram_stor IS ARRAY (2**addr_bits - 1 DOWNTO 0) OF ram_pntr;
VARIABLE Bank0 : ram_stor;
VARIABLE Bank1 : ram_stor;
VARIABLE Bank2 : ram_stor;
VARIABLE Bank3 : ram_stor;
VARIABLE Row_index, Col_index : INTEGER := 0;
VARIABLE Dq_temp : BIT_VECTOR (data_bits DOWNTO 0) := (OTHERS => '0');
VARIABLE Col_addr : Array4xCBV;
VARIABLE Bank_addr : Array4x2BV;
VARIABLE Dqm_reg0, Dqm_reg1 : BIT_VECTOR (1 DOWNTO 0) := "00";
VARIABLE Bank, Previous_bank : BIT_VECTOR (1 DOWNTO 0) := "00";
VARIABLE B0_row_addr, B1_row_addr, B2_row_addr, B3_row_addr : BIT_VECTOR (addr_bits - 1 DOWNTO 0) := (OTHERS => '0');
VARIABLE Col_brst : BIT_VECTOR (col_bits - 1 DOWNTO 0) := (OTHERS => '0');
VARIABLE Row : BIT_VECTOR (addr_bits - 1 DOWNTO 0) := (OTHERS => '0');
VARIABLE Col : BIT_VECTOR (col_bits - 1 DOWNTO 0) := (OTHERS => '0');
VARIABLE Burst_counter : INTEGER := 0;
VARIABLE Command : Array_state;
VARIABLE Bank_precharge : Array4x2BV;
VARIABLE A10_precharge : Array4xB := ('0' & '0' & '0' & '0');
VARIABLE Auto_precharge : Array4xB := ('0' & '0' & '0' & '0');
VARIABLE Read_precharge : Array4xB := ('0' & '0' & '0' & '0');
VARIABLE Write_precharge : Array4xB := ('0' & '0' & '0' & '0');
VARIABLE RW_interrupt_read : Array4xB := ('0' & '0' & '0' & '0');
VARIABLE RW_interrupt_write : Array4xB := ('0' & '0' & '0' & '0');
VARIABLE RW_interrupt_bank : BIT_VECTOR (1 DOWNTO 0) := "00";
VARIABLE Count_time : Array4xT := (0 ns & 0 ns & 0 ns & 0 ns);
VARIABLE Count_precharge : Array4xI := (0 & 0 & 0 & 0);
VARIABLE Data_in_enable, Data_out_enable : BIT := '0';
VARIABLE Pc_b0, Pc_b1, Pc_b2, Pc_b3 : BIT := '0';
VARIABLE Act_b0, Act_b1, Act_b2, Act_b3 : BIT := '0';
-- Timing Check
VARIABLE MRD_chk : INTEGER := 0;
VARIABLE WR_counter : Array4xI := (0 & 0 & 0 & 0);
VARIABLE WR_time : Array4xT := (0 ns & 0 ns & 0 ns & 0 ns);
VARIABLE WR_chkp : Array4xT := (0 ns & 0 ns & 0 ns & 0 ns);
VARIABLE RC_chk, RRD_chk : TIME := 0 ns;
VARIABLE RAS_chk0, RAS_chk1, RAS_chk2, RAS_chk3 : TIME := 0 ns;
VARIABLE RCD_chk0, RCD_chk1, RCD_chk2, RCD_chk3 : TIME := 0 ns;
VARIABLE RP_chk0, RP_chk1, RP_chk2, RP_chk3 : TIME := 0 ns;
-- Load and Dumb variables
FILE file_load : TEXT open read_mode is fname; -- Data load
FILE file_dump : TEXT open write_mode is "dumpdata.txt"; -- Data dump
VARIABLE bank_load : bit_vector ( 1 DOWNTO 0);
VARIABLE rows_load : BIT_VECTOR (12 DOWNTO 0);
VARIABLE cols_load : BIT_VECTOR ( 8 DOWNTO 0);
VARIABLE data_load : BIT_VECTOR (15 DOWNTO 0);
VARIABLE i, j : INTEGER;
VARIABLE good_load : BOOLEAN;
VARIABLE l : LINE;
variable load : std_logic := '1';
variable dump : std_logic := '0';
variable ch : character;
variable rectype : bit_vector(3 downto 0);
variable recaddr : bit_vector(31 downto 0);
variable reclen : bit_vector(7 downto 0);
variable recdata : bit_vector(0 to 16*8-1);
-- Initialize empty rows
PROCEDURE Init_mem (Bank : bit_vector (1 DOWNTO 0); Row_index : INTEGER) IS
VARIABLE i, j : INTEGER := 0;
BEGIN
IF Bank = "00" THEN
IF Bank0 (Row_index) = NULL THEN -- Check to see if row empty
Bank0 (Row_index) := NEW ram_type; -- Open new row for access
FOR i IN (2**col_bits - 1) DOWNTO 0 LOOP -- Filled row with zeros
FOR j IN (data_bits) DOWNTO 0 LOOP
Bank0 (Row_index) (i) (j) := '0';
END LOOP;
END LOOP;
END IF;
ELSIF Bank = "01" THEN
IF Bank1 (Row_index) = NULL THEN
Bank1 (Row_index) := NEW ram_type;
FOR i IN (2**col_bits - 1) DOWNTO 0 LOOP
FOR j IN (data_bits) DOWNTO 0 LOOP
Bank1 (Row_index) (i) (j) := '0';
END LOOP;
END LOOP;
END IF;
ELSIF Bank = "10" THEN
IF Bank2 (Row_index) = NULL THEN
Bank2 (Row_index) := NEW ram_type;
FOR i IN (2**col_bits - 1) DOWNTO 0 LOOP
FOR j IN (data_bits) DOWNTO 0 LOOP
Bank2 (Row_index) (i) (j) := '0';
END LOOP;
END LOOP;
END IF;
ELSIF Bank = "11" THEN
IF Bank3 (Row_index) = NULL THEN
Bank3 (Row_index) := NEW ram_type;
FOR i IN (2**col_bits - 1) DOWNTO 0 LOOP
FOR j IN (data_bits) DOWNTO 0 LOOP
Bank3 (Row_index) (i) (j) := '0';
END LOOP;
END LOOP;
END IF;
END IF;
END;
-- Burst Counter
PROCEDURE Burst_decode IS
VARIABLE Col_int : INTEGER := 0;
VARIABLE Col_vec, Col_temp : BIT_VECTOR (col_bits - 1 DOWNTO 0) := (OTHERS => '0');
BEGIN
-- Advance Burst Counter
Burst_counter := Burst_counter + 1;
-- Burst Type
IF Mode_reg (3) = '0' THEN
Col_int := TO_INTEGER(Col);
Col_int := Col_int + 1;
TO_BITVECTOR (Col_int, Col_temp);
ELSIF Mode_reg (3) = '1' THEN
TO_BITVECTOR (Burst_counter, Col_vec);
Col_temp (2) := Col_vec (2) XOR Col_brst (2);
Col_temp (1) := Col_vec (1) XOR Col_brst (1);
Col_temp (0) := Col_vec (0) XOR Col_brst (0);
END IF;
-- Burst Length
IF Burst_length_2 = '1' THEN
Col (0) := Col_temp (0);
ELSIF Burst_length_4 = '1' THEN
Col (1 DOWNTO 0) := Col_temp (1 DOWNTO 0);
ELSIF Burst_length_8 = '1' THEN
Col (2 DOWNTO 0) := Col_temp (2 DOWNTO 0);
ELSE
Col := Col_temp;
END IF;
-- Burst Read Single Write
IF Write_burst_mode = '1' AND Data_in_enable = '1' THEN
Data_in_enable := '0';
END IF;
-- Data counter
IF Burst_length_1 = '1' THEN
IF Burst_counter >= 1 THEN
IF Data_in_enable = '1' THEN
Data_in_enable := '0';
ELSIF Data_out_enable = '1' THEN
Data_out_enable := '0';
END IF;
END IF;
ELSIF Burst_length_2 = '1' THEN
IF Burst_counter >= 2 THEN
IF Data_in_enable = '1' THEN
Data_in_enable := '0';
ELSIF Data_out_enable = '1' THEN
Data_out_enable := '0';
END IF;
END IF;
ELSIF Burst_length_4 = '1' THEN
IF Burst_counter >= 4 THEN
IF Data_in_enable = '1' THEN
Data_in_enable := '0';
ELSIF Data_out_enable = '1' THEN
Data_out_enable := '0';
END IF;
END IF;
ELSIF Burst_length_8 = '1' THEN
IF Burst_counter >= 8 THEN
IF Data_in_enable = '1' THEN
Data_in_enable := '0';
ELSIF Data_out_enable = '1' THEN
Data_out_enable := '0';
END IF;
END IF;
END IF;
END;
BEGIN
WAIT ON Sys_clk, RAS_clk;
IF Sys_clk'event AND Sys_clk = '1' AND Load = '0' AND Dump = '0' THEN --'
-- Internal Command Pipeline
Command(0) := Command(1);
Command(1) := Command(2);
Command(2) := Command(3);
Command(3) := NOP;
Col_addr(0) := Col_addr(1);
Col_addr(1) := Col_addr(2);
Col_addr(2) := Col_addr(3);
Col_addr(3) := (OTHERS => '0');
Bank_addr(0) := Bank_addr(1);
Bank_addr(1) := Bank_addr(2);
Bank_addr(2) := Bank_addr(3);
Bank_addr(3) := "00";
Bank_precharge(0) := Bank_precharge(1);
Bank_precharge(1) := Bank_precharge(2);
Bank_precharge(2) := Bank_precharge(3);
Bank_precharge(3) := "00";
A10_precharge(0) := A10_precharge(1);
A10_precharge(1) := A10_precharge(2);
A10_precharge(2) := A10_precharge(3);
A10_precharge(3) := '0';
-- Operation Decode (Optional for showing current command on posedge clock / debug feature)
IF Active_enable = '1' THEN
Operation <= ACT;
ELSIF Aref_enable = '1' THEN
Operation <= A_REF;
ELSIF Burst_term = '1' THEN
Operation <= BST;
ELSIF Mode_reg_enable = '1' THEN
Operation <= LMR;
ELSIF Prech_enable = '1' THEN
Operation <= PRECH;
ELSIF Read_enable = '1' THEN
IF Addr(10) = '0' THEN
Operation <= READ;
ELSE
Operation <= READ_A;
END IF;
ELSIF Write_enable = '1' THEN
IF Addr(10) = '0' THEN
Operation <= WRITE;
ELSE
Operation <= WRITE_A;
END IF;
ELSE
Operation <= NOP;
END IF;
-- Dqm pipeline for Read
Dqm_reg0 := Dqm_reg1;
Dqm_reg1 := TO_BITVECTOR(Dqm);
-- Read or Write with Auto Precharge Counter
IF Auto_precharge (0) = '1' THEN
Count_precharge (0) := Count_precharge (0) + 1;
END IF;
IF Auto_precharge (1) = '1' THEN
Count_precharge (1) := Count_precharge (1) + 1;
END IF;
IF Auto_precharge (2) = '1' THEN
Count_precharge (2) := Count_precharge (2) + 1;
END IF;
IF Auto_precharge (3) = '1' THEN
Count_precharge (3) := Count_precharge (3) + 1;
END IF;
-- Auto Precharge Timer for tWR
if (Burst_length_1 = '1' OR Write_burst_mode = '1') then
if (Count_precharge(0) = 1) then
Count_time(0) := NOW;
end if;
if (Count_precharge(1) = 1) then
Count_time(1) := NOW;
end if;
if (Count_precharge(2) = 1) then
Count_time(2) := NOW;
end if;
if (Count_precharge(3) = 1) then
Count_time(3) := NOW;
end if;
elsif (Burst_length_2 = '1') then
if (Count_precharge(0) = 2) then
Count_time(0) := NOW;
end if;
if (Count_precharge(1) = 2) then
Count_time(1) := NOW;
end if;
if (Count_precharge(2) = 2) then
Count_time(2) := NOW;
end if;
if (Count_precharge(3) = 2) then
Count_time(3) := NOW;
end if;
elsif (Burst_length_4 = '1') then
if (Count_precharge(0) = 4) then
Count_time(0) := NOW;
end if;
if (Count_precharge(1) = 4) then
Count_time(1) := NOW;
end if;
if (Count_precharge(2) = 4) then
Count_time(2) := NOW;
end if;
if (Count_precharge(3) = 4) then
Count_time(3) := NOW;
end if;
elsif (Burst_length_8 = '1') then
if (Count_precharge(0) = 8) then
Count_time(0) := NOW;
end if;
if (Count_precharge(1) = 8) then
Count_time(1) := NOW;
end if;
if (Count_precharge(2) = 8) then
Count_time(2) := NOW;
end if;
if (Count_precharge(3) = 8) then
Count_time(3) := NOW;
end if;
end if;
-- tMRD Counter
MRD_chk := MRD_chk + 1;
-- tWR Counter
WR_counter(0) := WR_counter(0) + 1;
WR_counter(1) := WR_counter(1) + 1;
WR_counter(2) := WR_counter(2) + 1;
WR_counter(3) := WR_counter(3) + 1;
-- Auto Refresh
IF Aref_enable = '1' THEN
-- Auto Refresh to Auto Refresh
ASSERT (NOW - RC_chk >= tRC)
REPORT "tRC violation during Auto Refresh"
SEVERITY WARNING;
-- Precharge to Auto Refresh
ASSERT (NOW - RP_chk0 >= tRP OR NOW - RP_chk1 >= tRP OR NOW - RP_chk2 >= tRP OR NOW - RP_chk3 >= tRP)
REPORT "tRP violation during Auto Refresh"
SEVERITY WARNING;
-- All banks must be idle before refresh
IF (Pc_b3 ='0' OR Pc_b2 = '0' OR Pc_b1 ='0' OR Pc_b0 = '0') THEN
ASSERT (FALSE)
REPORT "All banks must be Precharge before Auto Refresh"
SEVERITY WARNING;
END IF;
-- Record current tRC time
RC_chk := NOW;
END IF;
-- Load Mode Register
IF Mode_reg_enable = '1' THEN
Mode_reg <= TO_BITVECTOR (Addr);
IF (Pc_b3 ='0' OR Pc_b2 = '0' OR Pc_b1 ='0' OR Pc_b0 = '0') THEN
ASSERT (FALSE)
REPORT "All bank must be Precharge before Load Mode Register"
SEVERITY WARNING;
END IF;
-- REF to LMR
ASSERT (NOW - RC_chk >= tRC)
REPORT "tRC violation during Load Mode Register"
SEVERITY WARNING;
-- LMR to LMR
ASSERT (MRD_chk >= tMRD)
REPORT "tMRD violation during Load Mode Register"
SEVERITY WARNING;
-- Record current tMRD time
MRD_chk := 0;
END IF;
-- Active Block (latch Bank and Row Address)
IF Active_enable = '1' THEN
IF Ba = "00" AND Pc_b0 = '1' THEN
Act_b0 := '1';
Pc_b0 := '0';
B0_row_addr := TO_BITVECTOR (Addr);
RCD_chk0 := NOW;
RAS_chk0 := NOW;
-- Precharge to Active Bank 0
ASSERT (NOW - RP_chk0 >= tRP)
REPORT "tRP violation during Activate Bank 0"
SEVERITY WARNING;
ELSIF Ba = "01" AND Pc_b1 = '1' THEN
Act_b1 := '1';
Pc_b1 := '0';
B1_row_addr := TO_BITVECTOR (Addr);
RCD_chk1 := NOW;
RAS_chk1 := NOW;
-- Precharge to Active Bank 1
ASSERT (NOW - RP_chk1 >= tRP)
REPORT "tRP violation during Activate Bank 1"
SEVERITY WARNING;
ELSIF Ba = "10" AND Pc_b2 = '1' THEN
Act_b2 := '1';
Pc_b2 := '0';
B2_row_addr := TO_BITVECTOR (Addr);
RCD_chk2 := NOW;
RAS_chk2 := NOW;
-- Precharge to Active Bank 2
ASSERT (NOW - RP_chk2 >= tRP)
REPORT "tRP violation during Activate Bank 2"
SEVERITY WARNING;
ELSIF Ba = "11" AND Pc_b3 = '1' THEN
Act_b3 := '1';
Pc_b3 := '0';
B3_row_addr := TO_BITVECTOR (Addr);
RCD_chk3 := NOW;
RAS_chk3 := NOW;
-- Precharge to Active Bank 3
ASSERT (NOW - RP_chk3 >= tRP)
REPORT "tRP violation during Activate Bank 3"
SEVERITY WARNING;
ELSIF Ba = "00" AND Pc_b0 = '0' THEN
ASSERT (FALSE)
REPORT "Bank 0 is not Precharged"
SEVERITY WARNING;
ELSIF Ba = "01" AND Pc_b1 = '0' THEN
ASSERT (FALSE)
REPORT "Bank 1 is not Precharged"
SEVERITY WARNING;
ELSIF Ba = "10" AND Pc_b2 = '0' THEN
ASSERT (FALSE)
REPORT "Bank 2 is not Precharged"
SEVERITY WARNING;
ELSIF Ba = "11" AND Pc_b3 = '0' THEN
ASSERT (FALSE)
REPORT "Bank 3 is not Precharged"
SEVERITY WARNING;
END IF;
-- Active Bank A to Active Bank B
IF ((Previous_bank /= TO_BITVECTOR (Ba)) AND (NOW - RRD_chk < tRRD)) THEN
ASSERT (FALSE)
REPORT "tRRD violation during Activate"
SEVERITY WARNING;
END IF;
-- LMR to ACT
ASSERT (MRD_chk >= tMRD)
REPORT "tMRD violation during Activate"
SEVERITY WARNING;
-- AutoRefresh to Activate
ASSERT (NOW - RC_chk >= tRC)
REPORT "tRC violation during Activate"
SEVERITY WARNING;
-- Record variable for checking violation
RRD_chk := NOW;
Previous_bank := TO_BITVECTOR (Ba);
END IF;
-- Precharge Block
IF Prech_enable = '1' THEN
IF Addr(10) = '1' THEN
Pc_b0 := '1';
Pc_b1 := '1';
Pc_b2 := '1';
Pc_b3 := '1';
Act_b0 := '0';
Act_b1 := '0';
Act_b2 := '0';
Act_b3 := '0';
RP_chk0 := NOW;
RP_chk1 := NOW;
RP_chk2 := NOW;
RP_chk3 := NOW;
-- Activate to Precharge all banks
ASSERT ((NOW - RAS_chk0 >= tRAS) OR (NOW - RAS_chk1 >= tRAS))
REPORT "tRAS violation during Precharge all banks"
SEVERITY WARNING;
-- tWR violation check for Write
IF ((NOW - WR_chkp(0) < tWRp) OR (NOW - WR_chkp(1) < tWRp) OR
(NOW - WR_chkp(2) < tWRp) OR (NOW - WR_chkp(3) < tWRp)) THEN
ASSERT (FALSE)
REPORT "tWR violation during Precharge ALL banks"
SEVERITY WARNING;
END IF;
ELSIF Addr(10) = '0' THEN
IF Ba = "00" THEN
Pc_b0 := '1';
Act_b0 := '0';
RP_chk0 := NOW;
-- Activate to Precharge bank 0
ASSERT (NOW - RAS_chk0 >= tRAS)
REPORT "tRAS violation during Precharge bank 0"
SEVERITY WARNING;
ELSIF Ba = "01" THEN
Pc_b1 := '1';
Act_b1 := '0';
RP_chk1 := NOW;
-- Activate to Precharge bank 1
ASSERT (NOW - RAS_chk1 >= tRAS)
REPORT "tRAS violation during Precharge bank 1"
SEVERITY WARNING;
ELSIF Ba = "10" THEN
Pc_b2 := '1';
Act_b2 := '0';
RP_chk2 := NOW;
-- Activate to Precharge bank 2
ASSERT (NOW - RAS_chk2 >= tRAS)
REPORT "tRAS violation during Precharge bank 2"
SEVERITY WARNING;
ELSIF Ba = "11" THEN
Pc_b3 := '1';
Act_b3 := '0';
RP_chk3 := NOW;
-- Activate to Precharge bank 3
ASSERT (NOW - RAS_chk3 >= tRAS)
REPORT "tRAS violation during Precharge bank 3"
SEVERITY WARNING;
END IF;
-- tWR violation check for Write
ASSERT (NOW - WR_chkp(TO_INTEGER(Ba)) >= tWRp)
REPORT "tWR violation during Precharge"
SEVERITY WARNING;
END IF;
-- Terminate a Write Immediately (if same bank or all banks)
IF (Data_in_enable = '1' AND (Bank = TO_BITVECTOR(Ba) OR Addr(10) = '1')) THEN
Data_in_enable := '0';
END IF;
-- Precharge Command Pipeline for READ
IF CAS_latency_3 = '1' THEN
Command(2) := PRECH;
Bank_precharge(2) := TO_BITVECTOR (Ba);
A10_precharge(2) := TO_BIT(Addr(10));
ELSIF CAS_latency_2 = '1' THEN
Command(1) := PRECH;
Bank_precharge(1) := TO_BITVECTOR (Ba);
A10_precharge(1) := TO_BIT(Addr(10));
END IF;
END IF;
-- Burst Terminate
IF Burst_term = '1' THEN
-- Terminate a Write immediately
IF Data_in_enable = '1' THEN
Data_in_enable := '0';
END IF;
-- Terminate a Read depend on CAS Latency
IF CAS_latency_3 = '1' THEN
Command(2) := BST;
ELSIF CAS_latency_2 = '1' THEN
Command(1) := BST;
END IF;
END IF;
-- Read, Write, Column Latch
IF Read_enable = '1' OR Write_enable = '1' THEN
-- Check to see if bank is open (ACT) for Read or Write
IF ((Ba="00" AND Pc_b0='1') OR (Ba="01" AND Pc_b1='1') OR (Ba="10" AND Pc_b2='1') OR (Ba="11" AND Pc_b3='1')) THEN
ASSERT (FALSE)
REPORT "Cannot Read or Write - Bank is not Activated"
SEVERITY WARNING;
END IF;
-- Activate to Read or Write
IF Ba = "00" THEN
ASSERT (NOW - RCD_chk0 >= tRCD)
REPORT "tRCD violation during Read or Write to Bank 0"
SEVERITY WARNING;
ELSIF Ba = "01" THEN
ASSERT (NOW - RCD_chk1 >= tRCD)
REPORT "tRCD violation during Read or Write to Bank 1"
SEVERITY WARNING;
ELSIF Ba = "10" THEN
ASSERT (NOW - RCD_chk2 >= tRCD)
REPORT "tRCD violation during Read or Write to Bank 2"
SEVERITY WARNING;
ELSIF Ba = "11" THEN
ASSERT (NOW - RCD_chk3 >= tRCD)
REPORT "tRCD violation during Read or Write to Bank 3"
SEVERITY WARNING;
END IF;
-- Read Command
IF Read_enable = '1' THEN
-- CAS Latency Pipeline
IF Cas_latency_3 = '1' THEN
IF Addr(10) = '1' THEN
Command(2) := READ_A;
ELSE
Command(2) := READ;
END IF;
Col_addr (2) := TO_BITVECTOR (Addr(col_bits - 1 DOWNTO 0));
Bank_addr (2) := TO_BITVECTOR (Ba);
ELSIF Cas_latency_2 = '1' THEN
IF Addr(10) = '1' THEN
Command(1) := READ_A;
ELSE
Command(1) := READ;
END IF;
Col_addr (1) := TO_BITVECTOR (Addr(col_bits - 1 DOWNTO 0));
Bank_addr (1) := TO_BITVECTOR (Ba);
END IF;
-- Read intterupt a Write (terminate Write immediately)
IF Data_in_enable = '1' THEN
Data_in_enable := '0';
END IF;
-- Write Command
ELSIF Write_enable = '1' THEN
IF Addr(10) = '1' THEN
Command(0) := WRITE_A;
ELSE
Command(0) := WRITE;
END IF;
Col_addr (0) := TO_BITVECTOR (Addr(col_bits - 1 DOWNTO 0));
Bank_addr (0) := TO_BITVECTOR (Ba);
-- Write intterupt a Write (terminate Write immediately)
IF Data_in_enable = '1' THEN
Data_in_enable := '0';
END IF;
-- Write interrupt a Read (terminate Read immediately)
IF Data_out_enable = '1' THEN
Data_out_enable := '0';
END IF;
END IF;
-- Interrupt a Write with Auto Precharge
IF Auto_precharge(TO_INTEGER(RW_Interrupt_Bank)) = '1' AND Write_precharge(TO_INTEGER(RW_Interrupt_Bank)) = '1' THEN
RW_interrupt_write(TO_INTEGER(RW_Interrupt_Bank)) := '1';
END IF;
-- Interrupt a Read with Auto Precharge
IF Auto_precharge(TO_INTEGER(RW_Interrupt_Bank)) = '1' AND Read_precharge(TO_INTEGER(RW_Interrupt_Bank)) = '1' THEN
RW_interrupt_read(TO_INTEGER(RW_Interrupt_Bank)) := '1';
END IF;
-- Read or Write with Auto Precharge
IF Addr(10) = '1' THEN
Auto_precharge (TO_INTEGER(Ba)) := '1';
Count_precharge (TO_INTEGER(Ba)) := 0;
RW_Interrupt_Bank := TO_BitVector(Ba);
IF Read_enable = '1' THEN
Read_precharge (TO_INTEGER(Ba)) := '1';
ELSIF Write_enable = '1' THEN
Write_precharge (TO_INTEGER(Ba)) := '1';
END IF;
END IF;
END IF;
-- Read with AutoPrecharge Calculation
-- The device start internal precharge when:
-- 1. BL/2 cycles after command
-- and 2. Meet tRAS requirement
-- or 3. Interrupt by a Read or Write (with or without Auto Precharge)
IF ((Auto_precharge(0) = '1') AND (Read_precharge(0) = '1')) THEN
IF (((NOW - RAS_chk0 >= tRAS) AND
((Burst_length_1 = '1' AND Count_precharge(0) >= 1) OR
(Burst_length_2 = '1' AND Count_precharge(0) >= 2) OR
(Burst_length_4 = '1' AND Count_precharge(0) >= 4) OR
(Burst_length_8 = '1' AND Count_precharge(0) >= 8))) OR
(RW_interrupt_read(0) = '1')) THEN
Pc_b0 := '1';
Act_b0 := '0';
RP_chk0 := NOW;
Auto_precharge(0) := '0';
Read_precharge(0) := '0';
RW_interrupt_read(0) := '0';
END IF;
END IF;
IF ((Auto_precharge(1) = '1') AND (Read_precharge(1) = '1')) THEN
IF (((NOW - RAS_chk1 >= tRAS) AND
((Burst_length_1 = '1' AND Count_precharge(1) >= 1) OR
(Burst_length_2 = '1' AND Count_precharge(1) >= 2) OR
(Burst_length_4 = '1' AND Count_precharge(1) >= 4) OR
(Burst_length_8 = '1' AND Count_precharge(1) >= 8))) OR
(RW_interrupt_read(1) = '1')) THEN
Pc_b1 := '1';
Act_b1 := '0';
RP_chk1 := NOW;
Auto_precharge(1) := '0';
Read_precharge(1) := '0';
RW_interrupt_read(1) := '0';
END IF;
END IF;
IF ((Auto_precharge(2) = '1') AND (Read_precharge(2) = '1')) THEN
IF (((NOW - RAS_chk2 >= tRAS) AND
((Burst_length_1 = '1' AND Count_precharge(2) >= 1) OR
(Burst_length_2 = '1' AND Count_precharge(2) >= 2) OR
(Burst_length_4 = '1' AND Count_precharge(2) >= 4) OR
(Burst_length_8 = '1' AND Count_precharge(2) >= 8))) OR
(RW_interrupt_read(2) = '1')) THEN
Pc_b2 := '1';
Act_b2 := '0';
RP_chk2 := NOW;
Auto_precharge(2) := '0';
Read_precharge(2) := '0';
RW_interrupt_read(2) := '0';
END IF;
END IF;
IF ((Auto_precharge(3) = '1') AND (Read_precharge(3) = '1')) THEN
IF (((NOW - RAS_chk3 >= tRAS) AND
((Burst_length_1 = '1' AND Count_precharge(3) >= 1) OR
(Burst_length_2 = '1' AND Count_precharge(3) >= 2) OR
(Burst_length_4 = '1' AND Count_precharge(3) >= 4) OR
(Burst_length_8 = '1' AND Count_precharge(3) >= 8))) OR
(RW_interrupt_read(3) = '1')) THEN
Pc_b3 := '1';
Act_b3 := '0';
RP_chk3 := NOW;
Auto_precharge(3) := '0';
Read_precharge(3) := '0';
RW_interrupt_read(3) := '0';
END IF;
END IF;
-- Internal Precharge or Bst
IF Command(0) = PRECH THEN -- PRECH terminate a read if same bank or all banks
IF Bank_precharge(0) = Bank OR A10_precharge(0) = '1' THEN
IF Data_out_enable = '1' THEN
Data_out_enable := '0';
END IF;
END IF;
ELSIF Command(0) = BST THEN -- BST terminate a read regardless of bank
IF Data_out_enable = '1' THEN
Data_out_enable := '0';
END IF;
END IF;
IF Data_out_enable = '0' THEN
Dq <= TRANSPORT (OTHERS => 'Z') AFTER tOH;
END IF;
-- Detect Read or Write Command
IF Command(0) = READ OR Command(0) = READ_A THEN
Bank := Bank_addr (0);
Col := Col_addr (0);
Col_brst := Col_addr (0);
IF Bank_addr (0) = "00" THEN
Row := B0_row_addr;
ELSIF Bank_addr (0) = "01" THEN
Row := B1_row_addr;
ELSIF Bank_addr (0) = "10" THEN
Row := B2_row_addr;
ELSE
Row := B3_row_addr;
END IF;
Burst_counter := 0;
Data_in_enable := '0';
Data_out_enable := '1';
ELSIF Command(0) = WRITE OR Command(0) = WRITE_A THEN
Bank := Bank_addr(0);
Col := Col_addr(0);
Col_brst := Col_addr(0);
IF Bank_addr (0) = "00" THEN
Row := B0_row_addr;
ELSIF Bank_addr (0) = "01" THEN
Row := B1_row_addr;
ELSIF Bank_addr (0) = "10" THEN
Row := B2_row_addr;
ELSE
Row := B3_row_addr;
END IF;
Burst_counter := 0;
Data_in_enable := '1';
Data_out_enable := '0';
END IF;
-- DQ (Driver / Receiver)
Row_index := TO_INTEGER (Row);
Col_index := TO_INTEGER (Col);
IF Data_in_enable = '1' THEN
IF Dqm /= "11" THEN
Init_mem (Bank, Row_index);
IF Bank = "00" THEN
Dq_temp := Bank0 (Row_index) (Col_index);
IF Dqm = "01" THEN
Dq_temp (15 DOWNTO 8) := TO_BITVECTOR (Dq (15 DOWNTO 8));
ELSIF Dqm = "10" THEN
Dq_temp (7 DOWNTO 0) := TO_BITVECTOR (Dq (7 DOWNTO 0));
ELSE
Dq_temp (15 DOWNTO 0) := TO_BITVECTOR (Dq (15 DOWNTO 0));
END IF;
Bank0 (Row_index) (Col_index) := ('1' & Dq_temp(data_bits - 1 DOWNTO 0));
ELSIF Bank = "01" THEN
Dq_temp := Bank1 (Row_index) (Col_index);
IF Dqm = "01" THEN
Dq_temp (15 DOWNTO 8) := TO_BITVECTOR (Dq (15 DOWNTO 8));
ELSIF Dqm = "10" THEN
Dq_temp (7 DOWNTO 0) := TO_BITVECTOR (Dq (7 DOWNTO 0));
ELSE
Dq_temp (15 DOWNTO 0) := TO_BITVECTOR (Dq (15 DOWNTO 0));
END IF;
Bank1 (Row_index) (Col_index) := ('1' & Dq_temp(data_bits - 1 DOWNTO 0));
ELSIF Bank = "10" THEN
Dq_temp := Bank2 (Row_index) (Col_index);
IF Dqm = "01" THEN
Dq_temp (15 DOWNTO 8) := TO_BITVECTOR (Dq (15 DOWNTO 8));
ELSIF Dqm = "10" THEN
Dq_temp (7 DOWNTO 0) := TO_BITVECTOR (Dq (7 DOWNTO 0));
ELSE
Dq_temp (15 DOWNTO 0) := TO_BITVECTOR (Dq (15 DOWNTO 0));
END IF;
Bank2 (Row_index) (Col_index) := ('1' & Dq_temp(data_bits - 1 DOWNTO 0));
ELSIF Bank = "11" THEN
Dq_temp := Bank3 (Row_index) (Col_index);
IF Dqm = "01" THEN
Dq_temp (15 DOWNTO 8) := TO_BITVECTOR (Dq (15 DOWNTO 8));
ELSIF Dqm = "10" THEN
Dq_temp (7 DOWNTO 0) := TO_BITVECTOR (Dq (7 DOWNTO 0));
ELSE
Dq_temp (15 DOWNTO 0) := TO_BITVECTOR (Dq (15 DOWNTO 0));
END IF;
Bank3 (Row_index) (Col_index) := ('1' & Dq_temp(data_bits - 1 DOWNTO 0));
END IF;
WR_chkp(TO_INTEGER(Bank)) := NOW;
WR_counter(TO_INTEGER(Bank)) := 0;
END IF;
Burst_decode;
ELSIF Data_out_enable = '1' THEN
IF Dqm_reg0 /= "11" THEN
Init_mem (Bank, Row_index);
IF Bank = "00" THEN
Dq_temp := Bank0 (Row_index) (Col_index);
IF Dqm_reg0 = "00" THEN
Dq (15 DOWNTO 0) <= TRANSPORT TO_STDLOGICVECTOR (Dq_temp (15 DOWNTO 0)) AFTER tAC;
ELSIF Dqm_reg0 = "01" THEN
Dq (15 DOWNTO 8) <= TRANSPORT TO_STDLOGICVECTOR (Dq_temp (15 DOWNTO 8)) AFTER tAC;
Dq (7 DOWNTO 0) <= TRANSPORT (OTHERS => 'Z') AFTER tAC;
ELSIF Dqm_reg0 = "10" THEN
Dq (15 DOWNTO 8) <= TRANSPORT (OTHERS => 'Z') AFTER tAC;
Dq (7 DOWNTO 0) <= TRANSPORT TO_STDLOGICVECTOR (Dq_temp (7 DOWNTO 0)) AFTER tAC;
END IF;
ELSIF Bank = "01" THEN
Dq_temp := Bank1 (Row_index) (Col_index);
IF Dqm_reg0 = "00" THEN
Dq (15 DOWNTO 0) <= TRANSPORT TO_STDLOGICVECTOR (Dq_temp (15 DOWNTO 0)) AFTER tAC;
ELSIF Dqm_reg0 = "01" THEN
Dq (15 DOWNTO 8) <= TRANSPORT TO_STDLOGICVECTOR (Dq_temp (15 DOWNTO 8)) AFTER tAC;
Dq (7 DOWNTO 0) <= TRANSPORT (OTHERS => 'Z') AFTER tAC;
ELSIF Dqm_reg0 = "10" THEN
Dq (15 DOWNTO 8) <= TRANSPORT (OTHERS => 'Z') AFTER tAC;
Dq (7 DOWNTO 0) <= TRANSPORT TO_STDLOGICVECTOR (Dq_temp (7 DOWNTO 0)) AFTER tAC;
END IF;
ELSIF Bank = "10" THEN
Dq_temp := Bank2 (Row_index) (Col_index);
IF Dqm_reg0 = "00" THEN
Dq (15 DOWNTO 0) <= TRANSPORT TO_STDLOGICVECTOR (Dq_temp (15 DOWNTO 0)) AFTER tAC;
ELSIF Dqm_reg0 = "01" THEN
Dq (15 DOWNTO 8) <= TRANSPORT TO_STDLOGICVECTOR (Dq_temp (15 DOWNTO 8)) AFTER tAC;
Dq (7 DOWNTO 0) <= TRANSPORT (OTHERS => 'Z') AFTER tAC;
ELSIF Dqm_reg0 = "10" THEN
Dq (15 DOWNTO 8) <= TRANSPORT (OTHERS => 'Z') AFTER tAC;
Dq (7 DOWNTO 0) <= TRANSPORT TO_STDLOGICVECTOR (Dq_temp (7 DOWNTO 0)) AFTER tAC;
END IF;
ELSIF Bank = "11" THEN
Dq_temp := Bank3 (Row_index) (Col_index);
IF Dqm_reg0 = "00" THEN
Dq (15 DOWNTO 0) <= TRANSPORT TO_STDLOGICVECTOR (Dq_temp (15 DOWNTO 0)) AFTER tAC;
ELSIF Dqm_reg0 = "01" THEN
Dq (15 DOWNTO 8) <= TRANSPORT TO_STDLOGICVECTOR (Dq_temp (15 DOWNTO 8)) AFTER tAC;
Dq (7 DOWNTO 0) <= TRANSPORT (OTHERS => 'Z') AFTER tAC;
ELSIF Dqm_reg0 = "10" THEN
Dq (15 DOWNTO 8) <= TRANSPORT (OTHERS => 'Z') AFTER tAC;
Dq (7 DOWNTO 0) <= TRANSPORT TO_STDLOGICVECTOR (Dq_temp (7 DOWNTO 0)) AFTER tAC;
END IF;
END IF;
ELSE
Dq <= TRANSPORT (OTHERS => 'Z') AFTER tHZ;
END IF;
Burst_decode;
END IF;
ELSIF Sys_clk'event AND Sys_clk = '1' AND Load = '1' AND Dump = '0' THEN --'
Operation <= LOAD_FILE;
load := '0';
-- ASSERT (FALSE) REPORT "Reading memory array from file. This operation may take several minutes. Please wait..."
-- SEVERITY NOTE;
WHILE NOT endfile(file_load) LOOP
readline(file_load, l);
read(l, ch);
if (ch /= 'S') or (ch /= 's') then
hread(l, rectype);
hread(l, reclen);
recaddr := (others => '0');
case rectype is
when "0001" =>
hread(l, recaddr(15 downto 0));
when "0010" =>
hread(l, recaddr(23 downto 0));
when "0011" =>
hread(l, recaddr);
recaddr(31 downto 24) := (others => '0');
when others => next;
end case;
hread(l, recdata);
if index < 32 then
Bank_Load := recaddr(25 downto 24);
Rows_Load := recaddr(23 downto 11);
Cols_Load := recaddr(10 downto 2);
Init_Mem (Bank_Load, To_Integer(Rows_Load));
IF Bank_Load = "00" THEN
for i in 0 to 3 loop
Bank0 (To_Integer(Rows_Load)) (To_Integer(Cols_Load)+i) := ('1' & recdata(i*32+index to i*32+index+15));
end loop;
ELSIF Bank_Load = "01" THEN
for i in 0 to 3 loop
Bank1 (To_Integer(Rows_Load)) (To_Integer(Cols_Load)+i) := ('1' & recdata(i*32+index to i*32+index+15));
end loop;
ELSIF Bank_Load = "10" THEN
for i in 0 to 3 loop
Bank2 (To_Integer(Rows_Load)) (To_Integer(Cols_Load)+i) := ('1' & recdata(i*32+index to i*32+index+15));
end loop;
ELSIF Bank_Load = "11" THEN
for i in 0 to 3 loop
Bank3 (To_Integer(Rows_Load)) (To_Integer(Cols_Load)+i) := ('1' & recdata(i*32+index to i*32+index+15));
end loop;
END IF;
elsif(index < 1024) then
Bank_Load := recaddr(26 downto 25);
Rows_Load := recaddr(24 downto 12);
Cols_Load := recaddr(11 downto 3);
Init_Mem (Bank_Load, To_Integer(Rows_Load));
IF Bank_Load = "00" THEN
for i in 0 to 1 loop
Bank0 (To_Integer(Rows_Load)) (To_Integer(Cols_Load)+i) := ('1' & recdata(i*64+index-32 to i*64+index-32+15));
end loop;
ELSIF Bank_Load = "01" THEN
for i in 0 to 1 loop
Bank1 (To_Integer(Rows_Load)) (To_Integer(Cols_Load)+i) := ('1' & recdata(i*64+index-32 to i*64+index-32+15));
end loop;
ELSIF Bank_Load = "10" THEN
for i in 0 to 1 loop
Bank2 (To_Integer(Rows_Load)) (To_Integer(Cols_Load)+i) := ('1' & recdata(i*64+index-32 to i*64+index-32+15));
end loop;
ELSIF Bank_Load = "11" THEN
for i in 0 to 1 loop
Bank3 (To_Integer(Rows_Load)) (To_Integer(Cols_Load)+i) := ('1' & recdata(i*64+index-32 to i*64+index-32+15));
end loop;
END IF;
else
Bank_Load := recaddr(22 downto 21);
Rows_Load := '0' & recaddr(20 downto 9);
Cols_Load := '0' & recaddr(8 downto 1);
Init_Mem (Bank_Load, To_Integer(Rows_Load));
IF Bank_Load = "00" THEN
for i in 0 to 7 loop
Bank0 (To_Integer(Rows_Load)) (To_Integer(Cols_Load)+i) := ('1' & recdata(i*16 to i*16+15));
end loop;
ELSIF Bank_Load = "01" THEN
for i in 0 to 7 loop
Bank1 (To_Integer(Rows_Load)) (To_Integer(Cols_Load)+i) := ('1' & recdata(i*16 to i*16+15));
end loop;
ELSIF Bank_Load = "10" THEN
for i in 0 to 7 loop
Bank2 (To_Integer(Rows_Load)) (To_Integer(Cols_Load)+i) := ('1' & recdata(i*16 to i*16+15));
end loop;
ELSIF Bank_Load = "11" THEN
for i in 0 to 7 loop
Bank3 (To_Integer(Rows_Load)) (To_Integer(Cols_Load)+i) := ('1' & recdata(i*16 to i*16+15));
end loop;
END IF;
END IF;
END IF;
END LOOP;
ELSIF Sys_clk'event AND Sys_clk = '1' AND Load = '0' AND Dump = '1' THEN --'
Operation <= DUMP_FILE;
ASSERT (FALSE) REPORT "Writing memory array to file. This operation may take several minutes. Please wait..."
SEVERITY NOTE;
WRITE (l, string'("# Micron Technology, Inc. (FILE DUMP / MEMORY DUMP)")); --'
WRITELINE (file_dump, l);
WRITE (l, string'("# BA ROWS COLS DQ")); --'
WRITELINE (file_dump, l);
WRITE (l, string'("# -- ------------- --------- ----------------")); --'
WRITELINE (file_dump, l);
-- Dumping Bank 0
FOR i IN 0 TO 2**addr_bits -1 LOOP
-- Check if ROW is NULL
IF Bank0 (i) /= NULL THEN
For j IN 0 TO 2**col_bits - 1 LOOP
-- Check if COL is NULL
NEXT WHEN Bank0 (i) (j) (data_bits) = '0';
WRITE (l, string'("00"), right, 4); --'
WRITE (l, To_BitVector(Conv_Std_Logic_Vector(i, addr_bits)), right, addr_bits+1);
WRITE (l, To_BitVector(Conv_std_Logic_Vector(j, col_bits)), right, col_bits+1);
WRITE (l, Bank0 (i) (j) (data_bits -1 DOWNTO 0), right, data_bits+1);
WRITELINE (file_dump, l);
END LOOP;
END IF;
END LOOP;
-- Dumping Bank 1
FOR i IN 0 TO 2**addr_bits -1 LOOP
-- Check if ROW is NULL
IF Bank1 (i) /= NULL THEN
For j IN 0 TO 2**col_bits - 1 LOOP
-- Check if COL is NULL
NEXT WHEN Bank1 (i) (j) (data_bits) = '0';
WRITE (l, string'("01"), right, 4); --'
WRITE (l, To_BitVector(Conv_Std_Logic_Vector(i, addr_bits)), right, addr_bits+1);
WRITE (l, To_BitVector(Conv_std_Logic_Vector(j, col_bits)), right, col_bits+1);
WRITE (l, Bank1 (i) (j) (data_bits -1 DOWNTO 0), right, data_bits+1);
WRITELINE (file_dump, l);
END LOOP;
END IF;
END LOOP;
-- Dumping Bank 2
FOR i IN 0 TO 2**addr_bits -1 LOOP
-- Check if ROW is NULL
IF Bank2 (i) /= NULL THEN
For j IN 0 TO 2**col_bits - 1 LOOP
-- Check if COL is NULL
NEXT WHEN Bank2 (i) (j) (data_bits) = '0';
WRITE (l, string'("10"), right, 4); --'
WRITE (l, To_BitVector(Conv_Std_Logic_Vector(i, addr_bits)), right, addr_bits+1);
WRITE (l, To_BitVector(Conv_std_Logic_Vector(j, col_bits)), right, col_bits+1);
WRITE (l, Bank2 (i) (j) (data_bits -1 DOWNTO 0), right, data_bits+1);
WRITELINE (file_dump, l);
END LOOP;
END IF;
END LOOP;
-- Dumping Bank 3
FOR i IN 0 TO 2**addr_bits -1 LOOP
-- Check if ROW is NULL
IF Bank3 (i) /= NULL THEN
For j IN 0 TO 2**col_bits - 1 LOOP
-- Check if COL is NULL
NEXT WHEN Bank3 (i) (j) (data_bits) = '0';
WRITE (l, string'("11"), right, 4); --'
WRITE (l, To_BitVector(Conv_Std_Logic_Vector(i, addr_bits)), right, addr_bits+1);
WRITE (l, To_BitVector(Conv_std_Logic_Vector(j, col_bits)), right, col_bits+1);
WRITE (l, Bank3 (i) (j) (data_bits -1 DOWNTO 0), right, data_bits+1);
WRITELINE (file_dump, l);
END LOOP;
END IF;
END LOOP;
END IF;
-- Write with AutoPrecharge Calculation
-- The device start internal precharge when:
-- 1. tWR cycles after command
-- and 2. Meet tRAS requirement
-- or 3. Interrupt by a Read or Write (with or without Auto Precharge)
IF ((Auto_precharge(0) = '1') AND (Write_precharge(0) = '1')) THEN
IF (((NOW - RAS_chk0 >= tRAS) AND
(((Burst_length_1 = '1' OR Write_burst_mode = '1' ) AND Count_precharge(0) >= 1 AND NOW - Count_time(0) >= tWRa) OR
(Burst_length_2 = '1' AND Count_precharge(0) >= 2 AND NOW - Count_time(0) >= tWRa) OR
(Burst_length_4 = '1' AND Count_precharge(0) >= 4 AND NOW - Count_time(0) >= tWRa) OR
(Burst_length_8 = '1' AND Count_precharge(0) >= 8 AND NOW - Count_time(0) >= tWRa))) OR
(RW_interrupt_write(0) = '1' AND WR_counter(0) >= 1 AND NOW - WR_time(0) >= tWRa)) THEN
Auto_precharge(0) := '0';
Write_precharge(0) := '0';
RW_interrupt_write(0) := '0';
Pc_b0 := '1';
Act_b0 := '0';
RP_chk0 := NOW;
ASSERT FALSE REPORT "Start Internal Precharge Bank 0" SEVERITY NOTE;
END IF;
END IF;
IF ((Auto_precharge(1) = '1') AND (Write_precharge(1) = '1')) THEN
IF (((NOW - RAS_chk1 >= tRAS) AND
(((Burst_length_1 = '1' OR Write_burst_mode = '1' ) AND Count_precharge(1) >= 1 AND NOW - Count_time(1) >= tWRa) OR
(Burst_length_2 = '1' AND Count_precharge(1) >= 2 AND NOW - Count_time(1) >= tWRa) OR
(Burst_length_4 = '1' AND Count_precharge(1) >= 4 AND NOW - Count_time(1) >= tWRa) OR
(Burst_length_8 = '1' AND Count_precharge(1) >= 8 AND NOW - Count_time(1) >= tWRa))) OR
(RW_interrupt_write(1) = '1' AND WR_counter(1) >= 1 AND NOW - WR_time(1) >= tWRa)) THEN
Auto_precharge(1) := '0';
Write_precharge(1) := '0';
RW_interrupt_write(1) := '0';
Pc_b1 := '1';
Act_b1 := '0';
RP_chk1 := NOW;
END IF;
END IF;
IF ((Auto_precharge(2) = '1') AND (Write_precharge(2) = '1')) THEN
IF (((NOW - RAS_chk2 >= tRAS) AND
(((Burst_length_1 = '1' OR Write_burst_mode = '1' ) AND Count_precharge(2) >= 1 AND NOW - Count_time(2) >= tWRa) OR
(Burst_length_2 = '1' AND Count_precharge(2) >= 2 AND NOW - Count_time(2) >= tWRa) OR
(Burst_length_4 = '1' AND Count_precharge(2) >= 4 AND NOW - Count_time(2) >= tWRa) OR
(Burst_length_8 = '1' AND Count_precharge(2) >= 8 AND NOW - Count_time(2) >= tWRa))) OR
(RW_interrupt_write(2) = '1' AND WR_counter(2) >= 1 AND NOW - WR_time(2) >= tWRa)) THEN
Auto_precharge(2) := '0';
Write_precharge(2) := '0';
RW_interrupt_write(2) := '0';
Pc_b2 := '1';
Act_b2 := '0';
RP_chk2 := NOW;
END IF;
END IF;
IF ((Auto_precharge(3) = '1') AND (Write_precharge(3) = '1')) THEN
IF (((NOW - RAS_chk3 >= tRAS) AND
(((Burst_length_1 = '1' OR Write_burst_mode = '1' ) AND Count_precharge(3) >= 1 AND NOW - Count_time(3) >= tWRa) OR
(Burst_length_2 = '1' AND Count_precharge(3) >= 2 AND NOW - Count_time(3) >= tWRa) OR
(Burst_length_4 = '1' AND Count_precharge(3) >= 4 AND NOW - Count_time(3) >= tWRa) OR
(Burst_length_8 = '1' AND Count_precharge(3) >= 8 AND NOW - Count_time(3) >= tWRa))) OR
(RW_interrupt_write(0) = '1' AND WR_counter(0) >= 1 AND NOW - WR_time(3) >= tWRa)) THEN
Auto_precharge(3) := '0';
Write_precharge(3) := '0';
RW_interrupt_write(3) := '0';
Pc_b3 := '1';
Act_b3 := '0';
RP_chk3 := NOW;
END IF;
END IF;
-- Checking internal wires (Optional for debug purpose)
Pre_chk (0) <= Pc_b0;
Pre_chk (1) <= Pc_b1;
Pre_chk (2) <= Pc_b2;
Pre_chk (3) <= Pc_b3;
Act_chk (0) <= Act_b0;
Act_chk (1) <= Act_b1;
Act_chk (2) <= Act_b2;
Act_chk (3) <= Act_b3;
Dq_in_chk <= Data_in_enable;
Dq_out_chk <= Data_out_enable;
Bank_chk <= Bank;
Row_chk <= Row;
Col_chk <= Col;
END PROCESS;
-- Clock timing checks
-- Clock_check : PROCESS
-- VARIABLE Clk_low, Clk_high : TIME := 0 ns;
-- BEGIN
-- WAIT ON Clk;
-- IF (Clk = '1' AND NOW >= 10 ns) THEN
-- ASSERT (NOW - Clk_low >= tCL)
-- REPORT "tCL violation"
-- SEVERITY WARNING;
-- ASSERT (NOW - Clk_high >= tCK)
-- REPORT "tCK violation"
-- SEVERITY WARNING;
-- Clk_high := NOW;
-- ELSIF (Clk = '0' AND NOW /= 0 ns) THEN
-- ASSERT (NOW - Clk_high >= tCH)
-- REPORT "tCH violation"
-- SEVERITY WARNING;
-- Clk_low := NOW;
-- END IF;
-- END PROCESS;
-- Setup timing checks
Setup_check : PROCESS
BEGIN
wait;
WAIT ON Clk;
IF Clk = '1' THEN
ASSERT(Cke'LAST_EVENT >= tCKS) --'
REPORT "CKE Setup time violation -- tCKS"
SEVERITY WARNING;
ASSERT(Cs_n'LAST_EVENT >= tCMS) --'
REPORT "CS# Setup time violation -- tCMS"
SEVERITY WARNING;
ASSERT(Cas_n'LAST_EVENT >= tCMS) --'
REPORT "CAS# Setup time violation -- tCMS"
SEVERITY WARNING;
ASSERT(Ras_n'LAST_EVENT >= tCMS) --'
REPORT "RAS# Setup time violation -- tCMS"
SEVERITY WARNING;
ASSERT(We_n'LAST_EVENT >= tCMS) --'
REPORT "WE# Setup time violation -- tCMS"
SEVERITY WARNING;
ASSERT(Dqm'LAST_EVENT >= tCMS) --'
REPORT "Dqm Setup time violation -- tCMS"
SEVERITY WARNING;
ASSERT(Addr'LAST_EVENT >= tAS) --'
REPORT "ADDR Setup time violation -- tAS"
SEVERITY WARNING;
ASSERT(Ba'LAST_EVENT >= tAS) --'
REPORT "BA Setup time violation -- tAS"
SEVERITY WARNING;
ASSERT(Dq'LAST_EVENT >= tDS) --'
REPORT "Dq Setup time violation -- tDS"
SEVERITY WARNING;
END IF;
END PROCESS;
-- Hold timing checks
Hold_check : PROCESS
BEGIN
wait;
WAIT ON Clk'DELAYED (tCKH), Clk'DELAYED (tCMH), Clk'DELAYED (tAH), Clk'DELAYED (tDH);
IF Clk'DELAYED (tCKH) = '1' THEN --'
ASSERT(Cke'LAST_EVENT > tCKH) --'
REPORT "CKE Hold time violation -- tCKH"
SEVERITY WARNING;
END IF;
IF Clk'DELAYED (tCMH) = '1' THEN --'
ASSERT(Cs_n'LAST_EVENT > tCMH) --'
REPORT "CS# Hold time violation -- tCMH"
SEVERITY WARNING;
ASSERT(Cas_n'LAST_EVENT > tCMH) --'
REPORT "CAS# Hold time violation -- tCMH"
SEVERITY WARNING;
ASSERT(Ras_n'LAST_EVENT > tCMH) --'
REPORT "RAS# Hold time violation -- tCMH"
SEVERITY WARNING;
ASSERT(We_n'LAST_EVENT > tCMH) --'
REPORT "WE# Hold time violation -- tCMH"
SEVERITY WARNING;
ASSERT(Dqm'LAST_EVENT > tCMH) --'
REPORT "Dqm Hold time violation -- tCMH"
SEVERITY WARNING;
END IF;
IF Clk'DELAYED (tAH) = '1' THEN --'
ASSERT(Addr'LAST_EVENT > tAH) --'
REPORT "ADDR Hold time violation -- tAH"
SEVERITY WARNING;
ASSERT(Ba'LAST_EVENT > tAH) --'
REPORT "BA Hold time violation -- tAH"
SEVERITY WARNING;
END IF;
IF Clk'DELAYED (tDH) = '1' THEN --'
ASSERT(Dq'LAST_EVENT > tDH) --'
REPORT "Dq Hold time violation -- tDH"
SEVERITY WARNING;
END IF;
END PROCESS;
END behave;
-- pragma translate_on
|
gpl-3.0
|
EliasLuiz/TCC
|
Leon3/designs/leon3-gr-xc6s/leon3mp.vhd
|
1
|
50410
|
-----------------------------------------------------------------------------
-- LEON3 Demonstration design
-- Copyright (C) 2011 Jiri Gaisler, Gaisler Research
------------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2003 - 2008, Gaisler Research
-- Copyright (C) 2008 - 2014, Aeroflex Gaisler
-- Copyright (C) 2015 - 2016, Cobham Gaisler
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
library grlib, techmap;
use grlib.amba.all;
use grlib.amba.all;
use grlib.stdlib.all;
use techmap.gencomp.all;
use techmap.allclkgen.all;
library gaisler;
use gaisler.memctrl.all;
use gaisler.leon3.all;
use gaisler.uart.all;
use gaisler.misc.all;
use gaisler.spi.all;
use gaisler.i2c.all;
use gaisler.can.all;
use gaisler.net.all;
use gaisler.jtag.all;
use gaisler.spacewire.all;
-- pragma translate_off
use gaisler.sim.all;
library unisim;
use unisim.all;
-- pragma translate_on
library esa;
use esa.memoryctrl.all;
use work.config.all;
entity leon3mp is
generic (
fabtech : integer := CFG_FABTECH;
memtech : integer := CFG_MEMTECH;
padtech : integer := CFG_PADTECH;
clktech : integer := CFG_CLKTECH;
disas : integer := CFG_DISAS; -- Enable disassembly to console
dbguart : integer := CFG_DUART; -- Print UART on console
pclow : integer := CFG_PCLOW
);
port (
resetn : in std_ulogic;
clk : in std_ulogic; -- 50 MHz main clock
clk2 : in std_ulogic; -- User clock
clk125 : in std_ulogic; -- 125 MHz clock from PHY
wdogn : out std_ulogic;
address : out std_logic_vector(24 downto 0);
data : inout std_logic_vector(31 downto 24);
oen : out std_ulogic;
writen : out std_ulogic;
romsn : out std_logic;
ddr_clk : out std_logic;
ddr_clkb : out std_logic;
ddr_cke : out std_logic;
ddr_odt : out std_logic;
ddr_we : out std_ulogic; -- ddr write enable
ddr_ras : out std_ulogic; -- ddr ras
ddr_csn : out std_ulogic; -- ddr csn
ddr_cas : out std_ulogic; -- ddr cas
ddr_dm : out std_logic_vector (1 downto 0); -- ddr dm
ddr_dqs : inout std_logic_vector (1 downto 0); -- ddr dqs
ddr_dqsn : inout std_logic_vector (1 downto 0); -- ddr dqs n
ddr_ad : out std_logic_vector (12 downto 0); -- ddr address
ddr_ba : out std_logic_vector (2 downto 0); -- ddr bank address
ddr_dq : inout std_logic_vector (15 downto 0); -- ddr data
ddr_rzq : inout std_ulogic;
ddr_zio : inout std_ulogic;
txd1 : out std_ulogic; -- UART1 tx data
rxd1 : in std_ulogic; -- UART1 rx data
ctsn1 : in std_ulogic; -- UART1 ctsn
rtsn1 : out std_ulogic; -- UART1 trsn
txd2 : out std_ulogic; -- UART2 tx data
rxd2 : in std_ulogic; -- UART2 rx data
ctsn2 : in std_ulogic; -- UART2 ctsn
rtsn2 : out std_ulogic; -- UART2 rtsn
pio : inout std_logic_vector(17 downto 0); -- I/O port
genio : inout std_logic_vector(59 downto 0); -- I/O port
switch : in std_logic_vector(9 downto 0); -- I/O port
led : out std_logic_vector(3 downto 0); -- I/O port
erx_clk : in std_ulogic;
emdio : inout std_logic; -- ethernet PHY interface
erxd : in std_logic_vector(3 downto 0);
erx_dv : in std_ulogic;
emdint : in std_ulogic;
etx_clk : out std_ulogic;
etxd : out std_logic_vector(3 downto 0);
etx_en : out std_ulogic;
emdc : out std_ulogic;
ps2clk : inout std_logic_vector(1 downto 0);
ps2data : inout std_logic_vector(1 downto 0);
iic_scl : inout std_ulogic;
iic_sda : inout std_ulogic;
ddc_scl : inout std_ulogic;
ddc_sda : inout std_ulogic;
dvi_iic_scl : inout std_logic;
dvi_iic_sda : inout std_logic;
tft_lcd_data : out std_logic_vector(11 downto 0);
tft_lcd_clk_p : out std_ulogic;
tft_lcd_clk_n : out std_ulogic;
tft_lcd_hsync : out std_ulogic;
tft_lcd_vsync : out std_ulogic;
tft_lcd_de : out std_ulogic;
tft_lcd_reset_b : out std_ulogic;
spw_clk : in std_ulogic;
spw_rxdp : in std_logic_vector(0 to CFG_SPW_NUM-1);
spw_rxdn : in std_logic_vector(0 to CFG_SPW_NUM-1);
spw_rxsp : in std_logic_vector(0 to CFG_SPW_NUM-1);
spw_rxsn : in std_logic_vector(0 to CFG_SPW_NUM-1);
spw_txdp : out std_logic_vector(0 to CFG_SPW_NUM-1);
spw_txdn : out std_logic_vector(0 to CFG_SPW_NUM-1);
spw_txsp : out std_logic_vector(0 to CFG_SPW_NUM-1);
spw_txsn : out std_logic_vector(0 to CFG_SPW_NUM-1);
-- SPI flash
spi_sel_n : inout std_ulogic;
spi_clk : out std_ulogic;
spi_mosi : out std_ulogic
);
end;
architecture rtl of leon3mp is
component BUFG port (O : out std_logic; I : in std_logic); end component;
component IODELAY2
generic (
COUNTER_WRAPAROUND : string := "WRAPAROUND";
DATA_RATE : string := "SDR";
DELAY_SRC : string := "IO";
IDELAY2_VALUE : integer := 0;
IDELAY_MODE : string := "NORMAL";
IDELAY_TYPE : string := "DEFAULT";
IDELAY_VALUE : integer := 0;
ODELAY_VALUE : integer := 0;
SERDES_MODE : string := "NONE";
SIM_TAPDELAY_VALUE : integer := 75
);
port (
BUSY : out std_ulogic;
DATAOUT : out std_ulogic;
DATAOUT2 : out std_ulogic;
DOUT : out std_ulogic;
TOUT : out std_ulogic;
CAL : in std_ulogic;
CE : in std_ulogic;
CLK : in std_ulogic;
IDATAIN : in std_ulogic;
INC : in std_ulogic;
IOCLK0 : in std_ulogic;
IOCLK1 : in std_ulogic;
ODATAIN : in std_ulogic;
RST : in std_ulogic;
T : in std_ulogic
);
end component;
attribute syn_netlist_hierarchy : boolean;
attribute syn_netlist_hierarchy of rtl : architecture is false;
constant use_eth_input_delay : integer := 1;
constant use_eth_output_delay : integer := 1;
constant use_eth_data_output_delay : integer := 1;
constant use_eth_input_delay_clk : integer := 0;
constant use_gtx_clk : integer := 0;
constant blength : integer := 12;
constant fifodepth : integer := 8;
constant maxahbm : integer := CFG_NCPU+CFG_AHB_UART+CFG_GRETH+
CFG_AHB_JTAG+CFG_SPW_NUM*CFG_SPW_EN;
signal vcc, gnd : std_logic;
signal memi : memory_in_type;
signal memo : memory_out_type;
signal wpo : wprot_out_type;
signal sdi : sdctrl_in_type;
signal sdo : sdram_out_type;
signal apbi, apbi2 : apb_slv_in_type;
signal apbo, apbo2 : apb_slv_out_vector := (others => apb_none);
signal ahbsi : ahb_slv_in_type;
signal ahbso : ahb_slv_out_vector := (others => ahbs_none);
signal ahbmi : ahb_mst_in_type;
signal vahbmi : ahb_mst_in_type;
signal ahbmo : ahb_mst_out_vector := (others => ahbm_none);
signal vahbmo : ahb_mst_out_type;
signal clkm, rstn, rstraw, sdclkl : std_ulogic;
signal clk_200 : std_ulogic;
signal clk25, clk40, clk65 : std_ulogic;
signal cgi, cgi2, cgi3 : clkgen_in_type;
signal cgo, cgo2, cgo3 : clkgen_out_type;
signal u1i, u2i, dui : uart_in_type;
signal u1o, u2o, duo : uart_out_type;
signal irqi : irq_in_vector(0 to CFG_NCPU-1);
signal irqo : irq_out_vector(0 to CFG_NCPU-1);
signal dbgi : l3_debug_in_vector(0 to CFG_NCPU-1);
signal dbgo : l3_debug_out_vector(0 to CFG_NCPU-1);
signal dsui : dsu_in_type;
signal dsuo : dsu_out_type;
signal gmiii, rgmiii, rgmiii_buf, rgmii_pad : eth_in_type;
signal gmiio, rgmiio : eth_out_type;
signal gpti : gptimer_in_type;
signal gpto : gptimer_out_type;
signal gpioi : gpio_in_type;
signal gpioo : gpio_out_type;
signal gpioi2 : gpio_in_type;
signal gpioo2 : gpio_out_type;
signal gpioi3 : gpio_in_type;
signal gpioo3 : gpio_out_type;
signal can_lrx, can_ltx : std_logic_vector(0 to 7);
signal lock, calib_done, clkml, lclk, rst, ndsuact, wdogl : std_ulogic := '0';
signal tck, tckn, tms, tdi, tdo : std_ulogic;
signal ethclk, ddr2clk : std_ulogic;
signal kbdi : ps2_in_type;
signal kbdo : ps2_out_type;
signal moui : ps2_in_type;
signal mouo : ps2_out_type;
signal vgao : apbvga_out_type;
signal lcd_datal : std_logic_vector(11 downto 0);
signal lcd_hsyncl, lcd_vsyncl, lcd_del, lcd_reset_bl : std_ulogic;
signal i2ci, dvi_i2ci : i2c_in_type;
signal i2co, dvi_i2co : i2c_out_type;
signal spmi : spimctrl_in_type;
signal spmo : spimctrl_out_type;
signal spmi2 : spimctrl_in_type;
signal spmo2 : spimctrl_out_type;
constant BOARD_FREQ : integer := 50000; -- input frequency in KHz
constant CPU_FREQ : integer := BOARD_FREQ * CFG_CLKMUL / CFG_CLKDIV; -- cpu frequency in KHz
constant IOAEN : integer := CFG_CAN;
constant DDR2_FREQ : integer := 200000; -- DDR2 input frequency in KHz
signal spwi : grspw_in_type_vector(0 to CFG_SPW_NUM-1);
signal spwo : grspw_out_type_vector(0 to CFG_SPW_NUM-1);
signal dtmp : std_logic_vector(CFG_SPW_NUM*CFG_SPW_PORTS-1 downto 0);
signal stmp : std_logic_vector(CFG_SPW_NUM*CFG_SPW_PORTS-1 downto 0);
signal spw_rxtxclk : std_ulogic;
signal spw_rxclkn : std_ulogic;
signal spw_rxclk : std_logic_vector(0 to CFG_SPW_NUM*CFG_SPW_PORTS);
signal spw_rstn : std_ulogic;
signal spw_rstn_sync : std_ulogic;
signal stati : ahbstat_in_type;
signal fpi : grfpu_in_vector_type;
signal fpo : grfpu_out_vector_type;
signal rstgtxn : std_logic;
signal idelay_reset_cnt : std_logic_vector(3 downto 0);
signal idelay_cal_cnt : std_logic_vector(3 downto 0);
signal idelayctrl_reset : std_logic;
signal idelayctrl_cal : std_logic;
signal rgmiii_rx_clk_n : std_logic;
signal rgmiii_rx_clk_n_buf : std_logic;
signal rgmiio_tx_clk,rgmiio_tx_en : std_logic;
signal rgmiio_txd : std_logic_vector(3 downto 0);
-- Used for connecting input/output signals to the DDR2 controller
signal core_ddr_clk : std_logic_vector(2 downto 0);
signal core_ddr_clkb : std_logic_vector(2 downto 0);
signal core_ddr_cke : std_logic_vector(1 downto 0);
signal core_ddr_csb : std_logic_vector(1 downto 0);
signal core_ddr_ad : std_logic_vector(13 downto 0);
signal core_ddr_odt : std_logic_vector(1 downto 0);
constant SPW_LOOP_BACK : integer := 0;
signal video_clk, clk50, clk100, spw100 : std_logic; -- signals to vga_clkgen.
signal clk_sel : std_logic_vector(1 downto 0);
signal clkvga, clkvga_p, clkvga_n : std_ulogic;
signal clk_125, clk_125_pll, clk_125_bufg : std_ulogic;
signal nerror : std_ulogic;
attribute keep : boolean;
attribute syn_keep : boolean;
attribute syn_preserve : boolean;
attribute syn_keep of clk50 : signal is true;
attribute syn_preserve of clk50 : signal is true;
attribute keep of clk50 : signal is true;
attribute syn_keep of video_clk : signal is true;
attribute syn_preserve of video_clk : signal is true;
attribute keep of video_clk : signal is true;
attribute syn_preserve of ddr2clk : signal is true;
attribute keep of ddr2clk : signal is true;
attribute syn_keep of ddr2clk : signal is true;
attribute syn_preserve of spw100 : signal is true;
attribute keep of spw100 : signal is true;
attribute syn_preserve of clkm : signal is true;
attribute keep of clkm : signal is true;
begin
----------------------------------------------------------------------
--- Reset and Clock generation -------------------------------------
----------------------------------------------------------------------
vcc <= '1'; gnd <= '0';
cgi.pllctrl <= "00"; cgi.pllrst <= rstraw;
clk_pad : clkpad generic map (tech => padtech) port map (clk, lclk);
ddr2clk <= lclk;
ethclk <= lclk;
no_clk_mig : if CFG_MIG_DDR2 = 0 generate
clkgen0 : clkgen -- clock generator
generic map (clktech, CFG_CLKMUL, CFG_CLKDIV, CFG_MCTRL_SDEN,
CFG_CLK_NOFB, 0, 0, 0, BOARD_FREQ)
port map (lclk, lclk, clkm, open, open, sdclkl, open, cgi, cgo, open, clk50, clk100);
rst0 : rstgen -- reset generator
generic map(syncin => 1)
port map (rst, clkm, lock, rstn, rstraw);
end generate;
clk_mig : if CFG_MIG_DDR2 = 1 generate
clk50 <= clkm;
rstraw <= rst;
cgo.clklock <= '1';
end generate;
resetn_pad : inpad generic map (tech => padtech) port map (resetn, rst);
lock <= cgo.clklock and calib_done;
----------------------------------------------------------------------
--- AHB CONTROLLER --------------------------------------------------
----------------------------------------------------------------------
ahb0 : ahbctrl -- AHB arbiter/multiplexer
generic map (defmast => CFG_DEFMST, split => CFG_SPLIT,
rrobin => CFG_RROBIN, ioaddr => CFG_AHBIO,
ioen => IOAEN, nahbm => maxahbm, nahbs => 16)
port map (rstn, clkm, ahbmi, ahbmo, ahbsi, ahbso);
----------------------------------------------------------------------
--- LEON3 processor and DSU -----------------------------------------
----------------------------------------------------------------------
nosh : if CFG_GRFPUSH = 0 generate
cpu : for i in 0 to CFG_NCPU-1 generate
l3ft : if CFG_LEON3FT_EN /= 0 generate
leon3ft0 : leon3ft -- LEON3 processor
generic map (i, fabtech, memtech, CFG_NWIN, CFG_DSU, CFG_FPU*(1-CFG_GRFPUSH), CFG_V8,
0, CFG_MAC, pclow, CFG_NOTAG, CFG_NWP, CFG_ICEN, CFG_IREPL, CFG_ISETS, CFG_ILINE,
CFG_ISETSZ, CFG_ILOCK, CFG_DCEN, CFG_DREPL, CFG_DSETS, CFG_DLINE, CFG_DSETSZ,
CFG_DLOCK, CFG_DSNOOP, CFG_ILRAMEN, CFG_ILRAMSZ, CFG_ILRAMADDR, CFG_DLRAMEN,
CFG_DLRAMSZ, CFG_DLRAMADDR, CFG_MMUEN, CFG_ITLBNUM, CFG_DTLBNUM, CFG_TLB_TYPE, CFG_TLB_REP,
CFG_LDDEL, disas, CFG_ITBSZ, CFG_PWD, CFG_SVT, CFG_RSTADDR, CFG_NCPU-1,
CFG_IUFT_EN, CFG_FPUFT_EN, CFG_CACHE_FT_EN, CFG_RF_ERRINJ,
CFG_CACHE_ERRINJ, CFG_DFIXED, CFG_LEON3_NETLIST, CFG_SCAN, CFG_MMU_PAGE, CFG_BP,
CFG_NP_ASI, CFG_WRPSR)
port map (clkm, rstn, ahbmi, ahbmo(i), ahbsi, ahbso,
irqi(i), irqo(i), dbgi(i), dbgo(i), clkm);
end generate;
l3s : if CFG_LEON3FT_EN = 0 generate
u0 : leon3s -- LEON3 processor
generic map (i, fabtech, memtech, CFG_NWIN, CFG_DSU, CFG_FPU*(1-CFG_GRFPUSH), CFG_V8,
0, CFG_MAC, pclow, CFG_NOTAG, CFG_NWP, CFG_ICEN, CFG_IREPL, CFG_ISETS, CFG_ILINE,
CFG_ISETSZ, CFG_ILOCK, CFG_DCEN, CFG_DREPL, CFG_DSETS, CFG_DLINE, CFG_DSETSZ,
CFG_DLOCK, CFG_DSNOOP, CFG_ILRAMEN, CFG_ILRAMSZ, CFG_ILRAMADDR, CFG_DLRAMEN,
CFG_DLRAMSZ, CFG_DLRAMADDR, CFG_MMUEN, CFG_ITLBNUM, CFG_DTLBNUM, CFG_TLB_TYPE, CFG_TLB_REP,
CFG_LDDEL, disas, CFG_ITBSZ, CFG_PWD, CFG_SVT, CFG_RSTADDR, CFG_NCPU-1,
CFG_DFIXED, CFG_SCAN, CFG_MMU_PAGE, CFG_BP, CFG_NP_ASI, CFG_WRPSR)
port map (clkm, rstn, ahbmi, ahbmo(i), ahbsi, ahbso,
irqi(i), irqo(i), dbgi(i), dbgo(i));
end generate;
end generate;
end generate;
sh : if CFG_GRFPUSH = 1 generate
cpu : for i in 0 to CFG_NCPU-1 generate
l3ft : if CFG_LEON3FT_EN /= 0 generate
leon3ft0 : leon3ftsh -- LEON3 processor
generic map (i, fabtech, memtech, CFG_NWIN, CFG_DSU, CFG_FPU, CFG_V8,
0, CFG_MAC, pclow, CFG_NOTAG, CFG_NWP, CFG_ICEN, CFG_IREPL, CFG_ISETS, CFG_ILINE,
CFG_ISETSZ, CFG_ILOCK, CFG_DCEN, CFG_DREPL, CFG_DSETS, CFG_DLINE, CFG_DSETSZ,
CFG_DLOCK, CFG_DSNOOP, CFG_ILRAMEN, CFG_ILRAMSZ, CFG_ILRAMADDR, CFG_DLRAMEN,
CFG_DLRAMSZ, CFG_DLRAMADDR, CFG_MMUEN, CFG_ITLBNUM, CFG_DTLBNUM, CFG_TLB_TYPE, CFG_TLB_REP,
CFG_LDDEL, disas, CFG_ITBSZ, CFG_PWD, CFG_SVT, CFG_RSTADDR, CFG_NCPU-1,
CFG_IUFT_EN, CFG_FPUFT_EN, CFG_CACHE_FT_EN, CFG_RF_ERRINJ,
CFG_CACHE_ERRINJ, CFG_DFIXED, CFG_LEON3_NETLIST, CFG_SCAN, CFG_MMU_PAGE,
CFG_BP, CFG_NP_ASI, CFG_WRPSR)
port map (clkm, rstn, ahbmi, ahbmo(i), ahbsi, ahbso,
irqi(i), irqo(i), dbgi(i), dbgo(i), clkm, fpi(i), fpo(i));
end generate;
l3s : if CFG_LEON3FT_EN = 0 generate
u0 : leon3sh -- LEON3 processor
generic map (i, fabtech, memtech, CFG_NWIN, CFG_DSU, CFG_FPU, CFG_V8,
0, CFG_MAC, pclow, CFG_NOTAG, CFG_NWP, CFG_ICEN, CFG_IREPL, CFG_ISETS, CFG_ILINE,
CFG_ISETSZ, CFG_ILOCK, CFG_DCEN, CFG_DREPL, CFG_DSETS, CFG_DLINE, CFG_DSETSZ,
CFG_DLOCK, CFG_DSNOOP, CFG_ILRAMEN, CFG_ILRAMSZ, CFG_ILRAMADDR, CFG_DLRAMEN,
CFG_DLRAMSZ, CFG_DLRAMADDR, CFG_MMUEN, CFG_ITLBNUM, CFG_DTLBNUM, CFG_TLB_TYPE, CFG_TLB_REP,
CFG_LDDEL, disas, CFG_ITBSZ, CFG_PWD, CFG_SVT, CFG_RSTADDR, CFG_NCPU-1,
CFG_DFIXED, CFG_SCAN, CFG_MMU_PAGE, CFG_BP, CFG_NP_ASI, CFG_WRPSR)
port map (clkm, rstn, ahbmi, ahbmo(i), ahbsi, ahbso,
irqi(i), irqo(i), dbgi(i), dbgo(i), fpi(i), fpo(i));
end generate;
end generate;
grfpush0 : grfpushwx generic map ((CFG_FPU-1), CFG_NCPU, fabtech)
port map (clkm, rstn, fpi, fpo);
end generate;
nerror <= dbgo(0).error;
led1_pad : odpad generic map (tech => padtech) port map (led(1), nerror);
dsugen : if CFG_DSU = 1 generate
dsu0 : dsu3 -- LEON3 Debug Support Unit
generic map (hindex => 2, haddr => 16#900#, hmask => 16#F00#,
ncpu => CFG_NCPU, tbits => 30, tech => memtech, irq => 0, kbytes => CFG_ATBSZ)
port map (rstn, clkm, ahbmi, ahbsi, ahbso(2), dbgo, dbgi, dsui, dsuo);
dsuen_pad : inpad generic map (tech => padtech) port map (switch(7), dsui.enable);
dsubre_pad : inpad generic map (tech => padtech) port map (switch(8), dsui.break);
dsuact_pad : outpad generic map (tech => padtech) port map (led(0), ndsuact);
ndsuact <= not dsuo.active;
end generate;
nodsu : if CFG_DSU = 0 generate
dsuo.tstop <= '0'; dsuo.active <= '0'; ahbso(2) <= ahbs_none;
end generate;
dcomgen : if CFG_AHB_UART = 1 generate
dcom0: ahbuart -- Debug UART
generic map (hindex => CFG_NCPU, pindex => 7, paddr => 7)
port map (rstn, clkm, dui, duo, apbi, apbo(7), ahbmi, ahbmo(CFG_NCPU));
dsurx_pad : inpad generic map (tech => padtech) port map (rxd2, dui.rxd);
dsutx_pad : outpad generic map (tech => padtech) port map (txd2, duo.txd);
end generate;
nouah : if CFG_AHB_UART = 0 generate apbo(7) <= apb_none; end generate;
ahbjtaggen0 :if CFG_AHB_JTAG = 1 generate
ahbjtag0 : ahbjtag generic map(tech => fabtech, hindex => CFG_NCPU+CFG_AHB_UART)
port map(rstn, clkm, tck, tms, tdi, tdo, ahbmi, ahbmo(CFG_NCPU+CFG_AHB_UART),
open, open, open, open, open, open, open, gnd);
end generate;
----------------------------------------------------------------------
--- Memory controllers ----------------------------------------------
----------------------------------------------------------------------
memi.writen <= '1'; memi.wrn <= "1111"; memi.bwidth <= "00";
memi.brdyn <= '0'; memi.bexcn <= '1';
mctrl0 : if CFG_MCTRL_LEON2 /= 0 generate
mctrl0 : mctrl generic map (hindex => 0, pindex => 0,
paddr => 0, srbanks => 2, ram8 => CFG_MCTRL_RAM8BIT,
ram16 => CFG_MCTRL_RAM16BIT, sden => CFG_MCTRL_SDEN,
invclk => CFG_CLK_NOFB, sepbus => CFG_MCTRL_SEPBUS,
pageburst => CFG_MCTRL_PAGE, rammask => 0, iomask => 0)
port map (rstn, clkm, memi, memo, ahbsi, ahbso(0), apbi, apbo(0), wpo, sdo);
addr_pad : outpadv generic map (width => 25, tech => padtech)
port map (address, memo.address(24 downto 0));
roms_pad : outpad generic map (tech => padtech)
port map (romsn, memo.romsn(0));
oen_pad : outpad generic map (tech => padtech)
port map (oen, memo.oen);
wri_pad : outpad generic map (tech => padtech)
port map (writen, memo.writen);
bdr : for i in 0 to 0 generate
data_pad : iopadv generic map (tech => padtech, width => 8)
port map (data(31-i*8 downto 24-i*8), memo.data(31-i*8 downto 24-i*8),
memo.bdrive(i), memi.data(31-i*8 downto 24-i*8));
end generate;
end generate;
nomctrl : if CFG_MCTRL_LEON2 = 0 generate
romsn <= '1'; ahbso(0) <= ahbs_none;
end generate;
-----------------------------------------------------------------------
--- Test report module ----------------------------------------------
-----------------------------------------------------------------------
-- pragma translate_off
test0 : ahbrep generic map (hindex => 6, haddr => 16#200#)
port map (rstn, clkm, ahbsi, ahbso(6));
-- pragma translate_on
----------------------------------------------------------------------
--- DDR2 memory controller ------------------------------------------
----------------------------------------------------------------------
ddr_csn <= '0';
mig_gen : if (CFG_MIG_DDR2 = 1) generate
ddrc : entity work.ahb2mig_grxc6s_2p
generic map(
hindex => 4, haddr => 16#400#, hmask => 16#F80#,
pindex => 0, paddr => 0, vgamst => CFG_SVGA_ENABLE, vgaburst => 64,
clkdiv => 10)
port map(
mcb3_dram_dq => ddr_dq,
mcb3_dram_a => ddr_ad,
mcb3_dram_ba => ddr_ba,
mcb3_dram_ras_n => ddr_ras,
mcb3_dram_cas_n => ddr_cas,
mcb3_dram_we_n => ddr_we,
mcb3_dram_odt => ddr_odt,
mcb3_dram_cke => ddr_cke,
mcb3_dram_dm => ddr_dm(0),
mcb3_dram_udqs => ddr_dqs(1),
mcb3_dram_udqs_n => ddr_dqsn(1),
mcb3_rzq => ddr_rzq,
mcb3_zio => ddr_zio,
mcb3_dram_udm => ddr_dm(1),
mcb3_dram_dqs => ddr_dqs(0),
mcb3_dram_dqs_n => ddr_dqsn(0),
mcb3_dram_ck => ddr_clk,
mcb3_dram_ck_n => ddr_clkb,
ahbsi => ahbsi,
ahbso => ahbso(4),
ahbmi => vahbmi,
ahbmo => vahbmo,
apbi => apbi2,
apbo => apbo2(0),
calib_done => calib_done,
rst_n_syn => rstn,
rst_n_async => rstraw,
clk_amba => clkm,
clk_mem_n => ddr2clk,
clk_mem_p => ddr2clk,
test_error => open,
clk_125 => clk_125,
clk_100 => clk100
);
end generate;
noddr : if (CFG_DDR2SP+CFG_MIG_DDR2) = 0 generate calib_done <= '1'; end generate;
----------------------------------------------------------------------
--- SPI Memory Controller--------------------------------------------
----------------------------------------------------------------------
spimc: if CFG_SPICTRL_ENABLE = 0 and CFG_SPIMCTRL = 1 generate
spimctrl0 : spimctrl -- SPI Memory Controller
generic map (hindex => 3, hirq => 7, faddr => 16#e00#, fmask => 16#ff8#,
ioaddr => 16#002#, iomask => 16#fff#,
spliten => CFG_SPLIT, oepol => 0,
sdcard => CFG_SPIMCTRL_SDCARD,
readcmd => CFG_SPIMCTRL_READCMD,
dummybyte => CFG_SPIMCTRL_DUMMYBYTE,
dualoutput => CFG_SPIMCTRL_DUALOUTPUT,
scaler => CFG_SPIMCTRL_SCALER,
altscaler => CFG_SPIMCTRL_ASCALER,
pwrupcnt => CFG_SPIMCTRL_PWRUPCNT)
port map (rstn, clkm, ahbsi, ahbso(3), spmi, spmo);
-- MISO is shared with Flash data 0
spmi.miso <= memi.data(24);
mosi_pad : outpad generic map (tech => padtech)
port map (spi_mosi, spmo.mosi);
sck_pad : outpad generic map (tech => padtech)
port map (spi_clk, spmo.sck);
slvsel0_pad : odpad generic map (tech => padtech)
port map (spi_sel_n, spmo.csn);
end generate;
nospimc: if ((CFG_SPICTRL_ENABLE = 0 and CFG_SPIMCTRL = 0) or
(CFG_SPICTRL_ENABLE = 1 and CFG_SPIMCTRL = 1) or
(CFG_SPICTRL_ENABLE = 1 and CFG_SPIMCTRL = 0))generate
mosi_pad : outpad generic map (tech => padtech)
port map (spi_mosi, '0');
sck_pad : outpad generic map (tech => padtech)
port map (spi_clk, '0');
end generate;
----------------------------------------------------------------------
--- APB Bridge and various periherals -------------------------------
----------------------------------------------------------------------
apb0 : apbctrl -- AHB/APB bridge
generic map (hindex => 1, haddr => CFG_APBADDR, nslaves => 16)
port map (rstn, clkm, ahbsi, ahbso(1), apbi, apbo );
apb1 : apbctrl -- AHB/APB bridge
generic map (hindex => 13, haddr => CFG_APBADDR+1, nslaves => 16)
port map (rstn, clkm, ahbsi, ahbso(13), apbi2, apbo2 );
ua1 : if CFG_UART1_ENABLE /= 0 generate
uart1 : apbuart -- UART 1
generic map (pindex => 1, paddr => 1, pirq => 2, console => dbguart,
fifosize => CFG_UART1_FIFO)
port map (rstn, clkm, apbi, apbo(1), u1i, u1o);
u1i.extclk <= '0';
rxd1_pad : inpad generic map (tech => padtech) port map (rxd1, u1i.rxd);
txd1_pad : outpad generic map (tech => padtech) port map (txd1, u1o.txd);
cts1_pad : inpad generic map (tech => padtech) port map (ctsn1, u1i.ctsn);
rts1_pad : outpad generic map (tech => padtech) port map (rtsn1, u1o.rtsn);
end generate;
noua0 : if CFG_UART1_ENABLE = 0 generate apbo(1) <= apb_none; end generate;
rts1_pad : outpad generic map (tech => padtech) port map (rtsn2, '0');
irqctrl : if CFG_IRQ3_ENABLE /= 0 generate
irqctrl0 : irqmp -- interrupt controller
generic map (pindex => 2, paddr => 2, ncpu => CFG_NCPU)
port map (rstn, clkm, apbi, apbo(2), irqo, irqi);
end generate;
irq3 : if CFG_IRQ3_ENABLE = 0 generate
x : for i in 0 to CFG_NCPU-1 generate
irqi(i).irl <= "0000";
end generate;
apbo(2) <= apb_none;
end generate;
gpt : if CFG_GPT_ENABLE /= 0 generate
timer0 : gptimer -- timer unit
generic map (pindex => 3, paddr => 3, pirq => CFG_GPT_IRQ,
sepirq => CFG_GPT_SEPIRQ, sbits => CFG_GPT_SW, ntimers => CFG_GPT_NTIM,
nbits => CFG_GPT_TW, wdog => CFG_GPT_WDOGEN*CFG_GPT_WDOG)
port map (rstn, clkm, apbi, apbo(3), gpti, gpto);
gpti <= gpti_dhalt_drive(dsuo.tstop);
end generate;
wden : if CFG_GPT_WDOGEN /= 0 generate
wdogl <= gpto.wdogn or not rstn;
--wdogn_pad : odpad generic map (tech => padtech) port map (wdogn, wdogl);
wdogn_pad : outpad generic map (tech => padtech) port map (wdogn, wdogl);
end generate;
wddis : if CFG_GPT_WDOGEN = 0 generate
--wdogn_pad : odpad generic map (tech => padtech) port map (wdogn, vcc);
wdogn_pad : outpad generic map (tech => padtech) port map (wdogn, vcc);
end generate;
nogpt : if CFG_GPT_ENABLE = 0 generate apbo(3) <= apb_none; end generate;
kbd : if CFG_KBD_ENABLE /= 0 generate
ps21 : apbps2 generic map(pindex => 4, paddr => 4, pirq => 4)
port map(rstn, clkm, apbi, apbo(4), moui, mouo);
ps20 : apbps2 generic map(pindex => 5, paddr => 5, pirq => 5)
port map(rstn, clkm, apbi, apbo(5), kbdi, kbdo);
end generate;
nokbd : if CFG_KBD_ENABLE = 0 generate
apbo(4) <= apb_none; mouo <= ps2o_none;
apbo(5) <= apb_none; kbdo <= ps2o_none;
end generate;
kbdclk_pad : iopad generic map (tech => padtech)
port map (ps2clk(1),kbdo.ps2_clk_o, kbdo.ps2_clk_oe, kbdi.ps2_clk_i);
kbdata_pad : iopad generic map (tech => padtech)
port map (ps2data(1), kbdo.ps2_data_o, kbdo.ps2_data_oe, kbdi.ps2_data_i);
mouclk_pad : iopad generic map (tech => padtech)
port map (ps2clk(0),mouo.ps2_clk_o, mouo.ps2_clk_oe, moui.ps2_clk_i);
mouata_pad : iopad generic map (tech => padtech)
port map (ps2data(0), mouo.ps2_data_o, mouo.ps2_data_oe, moui.ps2_data_i);
vga : if CFG_VGA_ENABLE /= 0 generate
vga0 : apbvga generic map(memtech => memtech, pindex => 6, paddr => 6)
port map(rstn, clkm, ethclk, apbi, apbo(6), vgao);
video_clk <= not ethclk;
end generate;
svga : if CFG_SVGA_ENABLE /= 0 generate
svga0 : svgactrl generic map(memtech => memtech, pindex => 6, paddr => 6,
hindex => CFG_NCPU+CFG_AHB_UART+CFG_AHB_JTAG,
clk0 => 20000, clk1 => 0, --1000000000/((BOARD_FREQ * CFG_CLKMUL)/CFG_CLKDIV),
clk2 => 0, clk3 => 0, burstlen => 6)
port map(rstn, clkm, video_clk, apbi, apbo(6), vgao, vahbmi,
vahbmo, clk_sel);
end generate;
--b0 : techbuf generic map (2, fabtech) port map (clk50, video_clk);
video_clk <= clk50;
vgadvi : if (CFG_VGA_ENABLE + CFG_SVGA_ENABLE) /= 0 generate
dvi0 : entity work.svga2ch7301c generic map (tech => fabtech, dynamic => 1)
port map (clkm, vgao, video_clk, clkvga_p, clkvga_n,
lcd_datal, lcd_hsyncl, lcd_vsyncl, lcd_del);
i2cdvi : i2cmst
generic map (pindex => 9, paddr => 9, pmask => 16#FFF#, pirq => 3)
port map (rstn, clkm, apbi, apbo(9), dvi_i2ci, dvi_i2co);
end generate;
novga : if (CFG_VGA_ENABLE = 0 and CFG_SVGA_ENABLE = 0) generate
apbo(6) <= apb_none; vgao <= vgao_none;
end generate;
tft_lcd_data_pad : outpadv generic map (width => 12, tech => padtech)
port map (tft_lcd_data, lcd_datal);
tft_lcd_clkp_pad : outpad generic map (tech => padtech)
port map (tft_lcd_clk_p, clkvga_p);
tft_lcd_clkn_pad : outpad generic map (tech => padtech)
port map (tft_lcd_clk_n, clkvga_n);
tft_lcd_hsync_pad : outpad generic map (tech => padtech)
port map (tft_lcd_hsync, lcd_hsyncl);
tft_lcd_vsync_pad : outpad generic map (tech => padtech)
port map (tft_lcd_vsync, lcd_vsyncl);
tft_lcd_de_pad : outpad generic map (tech => padtech)
port map (tft_lcd_de, lcd_del);
tft_lcd_reset_pad : outpad generic map (tech => padtech)
port map (tft_lcd_reset_b, rstn);
dvi_i2c_scl_pad : iopad generic map (tech => padtech)
port map (dvi_iic_scl, dvi_i2co.scl, dvi_i2co.scloen, dvi_i2ci.scl);
dvi_i2c_sda_pad : iopad generic map (tech => padtech)
port map (dvi_iic_sda, dvi_i2co.sda, dvi_i2co.sdaoen, dvi_i2ci.sda);
gpio0 : if CFG_GRGPIO_ENABLE /= 0 generate -- GPIO unit
grgpio0: grgpio
generic map(pindex => 10, paddr => 10, imask => CFG_GRGPIO_IMASK, nbits => 16)
port map(rst => rstn, clk => clkm, apbi => apbi, apbo => apbo(10),
gpioi => gpioi, gpioo => gpioo);
p0 : if (CFG_CAN = 0) or (CFG_CAN_NUM = 1) generate
pio_pads : for i in 1 to 2 generate
pio_pad : iopad generic map (tech => padtech)
port map (pio(i), gpioo.dout(i), gpioo.oen(i), gpioi.din(i));
end generate;
end generate;
p1 : if (CFG_CAN = 0) generate
pio_pads : for i in 4 to 5 generate
pio_pad : iopad generic map (tech => padtech)
port map (pio(i), gpioo.dout(i), gpioo.oen(i), gpioi.din(i));
end generate;
end generate;
pio_pad0 : iopad generic map (tech => padtech)
port map (pio(0), gpioo.dout(0), gpioo.oen(0), gpioi.din(0));
pio_pad1 : iopad generic map (tech => padtech)
port map (pio(3), gpioo.dout(3), gpioo.oen(3), gpioi.din(3));
pio_pads : for i in 6 to 15 generate
pio_pad : iopad generic map (tech => padtech)
port map (pio(i), gpioo.dout(i), gpioo.oen(i), gpioi.din(i));
end generate;
end generate;
-- make an additonal 32 bit GPIO port for genio(31..0)
gpio1 : if CFG_GRGPIO_ENABLE /= 0 generate -- GPIO unit
grgpio1: grgpio
generic map(pindex => 11, paddr => 11, imask => CFG_GRGPIO_IMASK, nbits => 32)
port map(rst => rstn, clk => clkm, apbi => apbi, apbo => apbo(11),
gpioi => gpioi2, gpioo => gpioo2);
pio_pads : for i in 0 to 31 generate
pio_pad : iopad generic map (tech => padtech)
port map (genio(i), gpioo2.dout(i), gpioo2.oen(i), gpioi2.din(i));
end generate;
end generate;
gpio2 : if CFG_GRGPIO_ENABLE /= 0 generate -- GPIO unit
grgpio2: grgpio
generic map(pindex => 12, paddr => 12, imask => CFG_GRGPIO_IMASK, nbits => 28)
port map(rst => rstn, clk => clkm, apbi => apbi, apbo => apbo(12),
gpioi => gpioi3, gpioo => gpioo3);
pio_pads : for i in 0 to 27 generate
pio_pad : iopad generic map (tech => padtech)
port map (genio(i+32), gpioo3.dout(i), gpioo3.oen(i), gpioi3.din(i));
end generate;
end generate;
ahbs : if CFG_AHBSTAT = 1 generate -- AHB status register
stati <= ahbstat_in_none;
ahbstat0 : ahbstat generic map (pindex => 13, paddr => 13, pirq => 1,
nftslv => CFG_AHBSTATN)
port map (rstn, clkm, ahbmi, ahbsi, stati, apbi, apbo(13));
end generate;
-----------------------------------------------------------------------
--- ETHERNET ---------------------------------------------------------
-----------------------------------------------------------------------
eth0 : if CFG_GRETH = 1 generate -- Gaisler ethernet MAC
e1 : grethm generic map(
hindex => CFG_NCPU+CFG_AHB_UART+CFG_AHB_JTAG,
pindex => 14, paddr => 14, pirq => 6, memtech => memtech,
mdcscaler => CPU_FREQ/1000, rmii => 0, enable_mdio => 1, fifosize => CFG_ETH_FIFO,
nsync => 2, edcl => CFG_DSU_ETH, edclbufsz => CFG_ETH_BUF, phyrstadr => 1,
macaddrh => CFG_ETH_ENM, macaddrl => CFG_ETH_ENL, enable_mdint => 1,
ipaddrh => CFG_ETH_IPM, ipaddrl => CFG_ETH_IPL,
giga => CFG_GRETH1G)
port map( rst => rstn, clk => clkm, ahbmi => ahbmi,
ahbmo => ahbmo(CFG_NCPU+CFG_AHB_UART+CFG_AHB_JTAG),
apbi => apbi, apbo => apbo(14), ethi => gmiii, etho => gmiio);
end generate;
led(3 downto 2) <= not (gmiio.gbit & gmiio.speed);
noethindelay0 : if (use_eth_input_delay = 0) generate
rgmiii.rx_dv <= rgmiii_buf.rx_dv;
rgmiii.rxd <= rgmiii_buf.rxd;
end generate;
noethoutdelay0 : if (use_eth_output_delay = 0) generate
rgmiio_tx_clk <= rgmiio.tx_clk;
end generate;
noethdataoutdelay0 : if (use_eth_data_output_delay = 0) generate
rgmiio_tx_en <= rgmiio.tx_en;
rgmiio_txd <= rgmiio.txd(3 downto 0);
end generate;
ethindelay0 : if (use_eth_input_delay /= 0) generate
erx_clk0 : if (use_eth_input_delay_clk /= 0) generate
delay_rgmii_rx_clk : IODELAY2 generic map(
DELAY_SRC => "IDATAIN",
IDELAY_TYPE => "FIXED",
DATA_RATE => "DDR",
IDELAY_VALUE => 0 -- (See table 39 in Xilinx ds162.pdf)
)
port map(
IDATAIN => rgmiii_buf.rx_clk,
T => '1',
ODATAIN => '0',
CAL => '0',
IOCLK0 => '0',
IOCLK1 => '0',
CLK => '0',
INC => '0',
CE => '0',
RST => '0',
BUSY => OPEN,
DATAOUT => rgmiii.rx_clk,
DATAOUT2 => OPEN,
TOUT => OPEN,
DOUT => OPEN
);
end generate;
delay_rgmii_rx_ctl0 : IODELAY2 generic map(
DELAY_SRC => "IDATAIN",
IDELAY_TYPE => "FIXED",
DATA_RATE => "DDR",
IDELAY_VALUE => 80 -- (See table 39 in Xilinx ds162.pdf)
)
port map(
IDATAIN => rgmiii_buf.rx_dv,
T => '1',
ODATAIN => '0',
CAL => '0',
IOCLK0 => '0',
IOCLK1 => '0',
CLK => '0',
INC => '0',
CE => '0',
RST => '0',
BUSY => OPEN,
DATAOUT => rgmiii.rx_dv,
DATAOUT2 => OPEN,
TOUT => OPEN,
DOUT => OPEN
);
rgmii_rxd : for i in 0 to 3 generate
delay_rgmii_rxd0 : IODELAY2 generic map(
DELAY_SRC => "IDATAIN",
IDELAY_TYPE => "FIXED",
DATA_RATE => "DDR",
IDELAY_VALUE => 80 -- (See table 39 in Xilinx ds162.pdf)
)
port map(
IDATAIN => rgmiii_buf.rxd(i),
T => '1',
ODATAIN => '0',
CAL => '0',
IOCLK0 => '0',
IOCLK1 => '0',
CLK => '0',
INC => '0',
CE => '0',
RST => '0',
BUSY => OPEN,
DATAOUT => rgmiii.rxd(i),
DATAOUT2 => OPEN,
TOUT => OPEN,
DOUT => OPEN
);
end generate;
end generate;
ethoutdelay0 : if (use_eth_output_delay /= 0) generate
delay_rgmii_tx_clk0 : IODELAY2 generic map(
DELAY_SRC => "ODATAIN",
IDELAY_TYPE => "FIXED",
DATA_RATE => "DDR",
ODELAY_VALUE => 30 -- (See table 39 in Xilinx ds162.pdf)
)
port map(
IDATAIN => '0',
T => '1',
ODATAIN => rgmiio.tx_clk,
CAL => '0',
IOCLK0 => '0',
IOCLK1 => '0',
CLK => '0',
INC => '0',
CE => '0',
RST => '0',
BUSY => OPEN,
DATAOUT => OPEN,
DATAOUT2 => OPEN,
TOUT => OPEN,
DOUT => rgmiio_tx_clk
);
end generate;
ethoutdatadelay0 : if (use_eth_data_output_delay /= 0) generate
delay_rgmii_tx_en0 : IODELAY2 generic map(
DELAY_SRC => "ODATAIN",
IDELAY_TYPE => "FIXED",
DATA_RATE => "DDR",
ODELAY_VALUE => 0
)
port map(
IDATAIN => '0',
T => '1',
ODATAIN => rgmiio.tx_en,
CAL => '0',
IOCLK0 => '0',
IOCLK1 => '0',
CLK => '0',
INC => '0',
CE => '0',
RST => '0',
BUSY => OPEN,
DATAOUT => OPEN,
DATAOUT2 => OPEN,
TOUT => OPEN,
DOUT => rgmiio_tx_en
);
rgmii_txd : for i in 0 to 3 generate
delay_rgmii_txd0 : IODELAY2 generic map(
DELAY_SRC => "ODATAIN",
IDELAY_TYPE => "FIXED",
DATA_RATE => "DDR",
ODELAY_VALUE => 0
)
port map(
IDATAIN => '0',
T => '1',
ODATAIN => rgmiio.txd(i),
CAL => '0',
IOCLK0 => '0',
IOCLK1 => '0',
CLK => '0',
INC => '0',
CE => '0',
RST => '0',
BUSY => OPEN,
DATAOUT => OPEN,
DATAOUT2 => OPEN,
TOUT => OPEN,
DOUT => rgmiio_txd(i)
);
end generate;
end generate;
rgmii0 : rgmii generic map (pindex => 15, paddr => 16#010#, pmask => 16#ff0#, tech => fabtech,
gmii => CFG_GRETH1G, debugmem => 1, abits => 8, no_clk_mux => 0,
pirq => 15, use90degtxclk => 0)
port map (rstn, gmiii, gmiio, rgmiii, rgmiio, clkm, rstn, apbi, apbo(15));
ethpads : if (CFG_GRETH = 1) generate -- eth pads
etxc_pad : outpad generic map (tech => padtech)
port map (etx_clk, rgmiio_tx_clk);
erx_clk1 : if (use_eth_input_delay_clk = 0) generate
erxc_pad : clkpad generic map (tech => padtech, arch => 2)
port map (erx_clk, rgmiii.rx_clk);
end generate;
erx_clk2 : if (use_eth_input_delay_clk /= 0) generate
erxc_pad : inpad generic map (tech => padtech)
port map (erx_clk, rgmii_pad.rx_clk);
erxc_bufg0 : BUFG port map (O => rgmiii_buf.rx_clk, I => rgmii_pad.rx_clk);
end generate;
erxd_pad : inpadv generic map (tech => padtech, width => 4)
port map (erxd, rgmiii_buf.rxd(3 downto 0));
erxdv_pad : inpad generic map (tech => padtech)
port map (erx_dv, rgmiii_buf.rx_dv);
etxd_pad : outpadv generic map (tech => padtech, width => 4)
port map (etxd, rgmiio_txd(3 downto 0));
etxen_pad : outpad generic map (tech => padtech)
port map ( etx_en, rgmiio_tx_en);
emdio_pad : iopad generic map (tech => padtech)
port map (emdio, rgmiio.mdio_o, rgmiio.mdio_oe, rgmiii.mdio_i);
emdc_pad : outpad generic map (tech => padtech)
port map (emdc, rgmiio.mdc);
emdint_pad : inpad generic map (tech => padtech)
port map (emdint, rgmiii.mdint);
gtx_clk0 : if (use_gtx_clk = 0) generate
-- Use MIG PLL
-- Add to UCF (only if there is no BUFG left):
-- PIN "ethpads.gtx_clk0.clk_125_bufg0.O" CLOCK_DEDICATED_ROUTE = FALSE;
clk_125_bufg0 : BUFG port map (O => clk_125_bufg, I => clk_125);
rgmiii.gtx_clk <= clk_125_bufg;
end generate;
gtx_clk1 : if (use_gtx_clk = 1) generate
-- Incoming 125Mhz ref clock
clk125_pad : clkpad generic map (tech => padtech, arch => 3)
port map (clk125, rgmiii.gtx_clk);
end generate;
gtx_clk2 : if (use_gtx_clk = 2) generate
-- Use Separate PLL
-- Add to UCF (only if there is no BUFG left):
-- PIN "ethpads.gtx_clk2.clkgen0/xc3s.v/bufg0.O" CLOCK_DEDICATED_ROUTE =FALSE;
-- PIN "ethpads.gtx_clk2.clk_125_bufg0.O" CLOCK_DEDICATED_ROUTE = FALSE;
cgi2.pllctrl <= "00"; cgi2.pllrst <= rstraw;
clkgen0 : clkgen -- clock generator
generic map (clktech, 5, 2, CFG_MCTRL_SDEN,CFG_CLK_NOFB, 0, 0, 0, BOARD_FREQ)
port map (clkm, clkm, clk_125_pll, open, open, open, open, cgi2, cgo2, open, open, open);
clk_125_bufg0 : BUFG port map (O => clk_125_bufg, I => clk_125_pll);
rgmiii.gtx_clk <= clk_125_bufg;
end generate;
end generate;
-----------------------------------------------------------------------
--- AHB RAM ----------------------------------------------------------
-----------------------------------------------------------------------
ocram : if CFG_AHBRAMEN = 1 generate
ahbram0 : ahbram generic map (hindex => 7, haddr => CFG_AHBRADDR,
tech => CFG_MEMTECH, kbytes => CFG_AHBRSZ, pipe => CFG_AHBRPIPE)
port map ( rstn, clkm, ahbsi, ahbso(7));
end generate;
-----------------------------------------------------------------------
--- Multi-core CAN ---------------------------------------------------
-----------------------------------------------------------------------
can0 : if CFG_CAN = 1 generate
can0 : can_mc generic map (slvndx => 4, ioaddr => CFG_CANIO,
iomask => 16#FF0#, irq => CFG_CANIRQ, memtech => memtech,
ncores => CFG_CAN_NUM, sepirq => CFG_CANSEPIRQ)
port map (rstn, clkm, ahbsi, ahbso(4), can_lrx, can_ltx );
can_tx_pad1 : iopad generic map (tech => padtech)
port map (pio(5), can_ltx(0), gnd, gpioi.din(5));
can_rx_pad1 : iopad generic map (tech => padtech)
port map (pio(4), gnd, vcc, can_lrx(0));
canpas : if CFG_CAN_NUM = 2 generate
can_tx_pad2 : iopad generic map (tech => padtech)
port map (pio(2), can_ltx(1), gnd, gpioi.din(2));
can_rx_pad2 : iopad generic map (tech => padtech)
port map (pio(1), gnd, vcc, can_lrx(1));
end generate;
end generate;
-- standby controlled by pio(3) and pio(0)
-----------------------------------------------------------------------
--- SPACEWIRE -------------------------------------------------------
-----------------------------------------------------------------------
-- temporary, just to make sure the SPW pins are instantiated correctly
no_spw : if CFG_SPW_EN = 0 generate
pad_gen: for i in 0 to CFG_SPW_NUM-1 generate
spw_rxd_pad : inpad_ds generic map (padtech, lvds, x33v)
port map (spw_rxdp(i), spw_rxdn(i), dtmp(i));
spw_rxs_pad : inpad_ds generic map (padtech, lvds, x33v)
port map (spw_rxsp(i), spw_rxsn(i), stmp(i));
spw_txd_pad : outpad_ds generic map (padtech, lvds, x33v)
port map (spw_txdp(i), spw_txdn(i), dtmp(i), gnd);
spw_txs_pad : outpad_ds generic map (padtech, lvds, x33v)
port map (spw_txsp(i), spw_txsn(i), stmp(i), gnd);
end generate;
end generate;
spw : if CFG_SPW_EN > 0 generate
core0: if CFG_SPW_GRSPW = 1 generate
spw_rxtxclk <= clkm;
spw_rstn <= rstn;
end generate;
core1 : if CFG_SPW_GRSPW = 2 generate
spw_rxtxclk <= clk100;
spw_rstn_sync_proc : process(rstn,spw_rxtxclk)
begin
if rstn = '0' then
spw_rstn_sync <= '0';
spw_rstn <= '0';
elsif rising_edge(spw_rxtxclk) then
spw_rstn_sync <= '1';
spw_rstn <= spw_rstn_sync;
end if;
end process spw_rstn_sync_proc;
end generate;
spw_rxclkn <= not spw_rxtxclk;
swloop : for i in 0 to CFG_SPW_NUM-1 generate
-- GRSPW2 PHY
spw2_input : if CFG_SPW_GRSPW = 2 generate
spw_inputloop: for j in 0 to CFG_SPW_PORTS-1 generate
spw_phy0 : grspw2_phy
generic map(
scantest => 0,
tech => fabtech,
input_type => CFG_SPW_INPUT,
rxclkbuftype => 2)
port map(
rstn => spw_rstn,
rxclki => spw_rxtxclk,
rxclkin => spw_rxclkn,
nrxclki => spw_rxtxclk,
di => dtmp(i*CFG_SPW_PORTS+j),
si => stmp(i*CFG_SPW_PORTS+j),
do => spwi(i).d(j*2+1 downto j*2),
dov => spwi(i).dv(j*2+1 downto j*2),
dconnect => spwi(i).dconnect(j*2+1 downto j*2),
rxclko => spw_rxclk(i*CFG_SPW_PORTS+j));
end generate;
oneport : if CFG_SPW_PORTS = 1 generate
spwi(i).d(3 downto 2) <= "00"; -- For second port
spwi(i).dv(3 downto 2) <= "00"; -- For second port
spwi(i).dconnect(3 downto 2) <= "00"; -- For second port
end generate;
spwi(i).nd <= (others => '0'); -- Only used in GRSPW
end generate;
spw1_input: if CFG_SPW_GRSPW = 1 generate
spw_inputloop: for j in 0 to CFG_SPW_PORTS-1 generate
spw_phy0 : grspw_phy
generic map(
tech => fabtech,
rxclkbuftype => 2,
scantest => 0)
port map(
rxrst => spwo(i).rxrst,
di => dtmp(i*CFG_SPW_PORTS+j),
si => stmp(i*CFG_SPW_PORTS+j),
rxclko => spw_rxclk(i*CFG_SPW_PORTS+j),
do => spwi(i).d(j),
ndo => spwi(i).nd(j*5+4 downto j*5),
dconnect => spwi(i).dconnect(j*2+1 downto j*2));
end generate spw_inputloop;
oneport : if CFG_SPW_PORTS = 1 generate
spwi(i).d(1) <= '0'; -- For second port
spwi(i).d(3 downto 2) <= "00"; -- For GRSPW2 second port
spwi(i).nd(9 downto 5) <= "00000"; -- For second port
spwi(i).dconnect(3 downto 2) <= "00"; -- For second port
end generate;
spwi(i).dv <= (others => '0'); -- Only used in GRSPW2
end generate spw1_input;
sw0 : grspwm generic map(tech => memtech,
hindex => CFG_NCPU+CFG_AHB_UART+CFG_GRETH+CFG_AHB_JTAG+i,
sysfreq => CPU_FREQ, usegen => 1,
pindex => 10+i, paddr => 10+i, pirq => 10+i,
nsync => 1, rmap => CFG_SPW_RMAP, rxunaligned => CFG_SPW_RXUNAL,
rmapcrc => CFG_SPW_RMAPCRC, fifosize1 => CFG_SPW_AHBFIFO,
fifosize2 => CFG_SPW_RXFIFO, rxclkbuftype => 2, dmachan => CFG_SPW_DMACHAN,
rmapbufs => CFG_SPW_RMAPBUF, ft => CFG_SPW_FT, ports => CFG_SPW_PORTS,
spwcore => CFG_SPW_GRSPW, netlist => CFG_SPW_NETLIST,
rxtx_sameclk => CFG_SPW_RTSAME, input_type => CFG_SPW_INPUT,
output_type => CFG_SPW_OUTPUT)
port map(rstn, clkm, spw_rxclk(i*CFG_SPW_PORTS), spw_rxclk(i*CFG_SPW_PORTS+1),
spw_rxtxclk, spw_rxtxclk, ahbmi,
ahbmo(CFG_NCPU+CFG_AHB_UART+CFG_GRETH+CFG_AHB_JTAG+i),
apbi2, apbo2(10+i), spwi(i), spwo(i));
spwi(i).tickin <= '0'; spwi(i).rmapen <= '1';
spwi(i).clkdiv10 <= conv_std_logic_vector(CPU_FREQ/10000-1, 8) when CFG_SPW_GRSPW = 1
else conv_std_logic_vector(10-1, 8);
spwi(i).tickinraw <= '0';
spwi(i).timein <= (others => '0');
spwi(i).dcrstval <= (others => '0');
spwi(i).timerrstval <= (others => '0');
swportloop1: for j in 0 to CFG_SPW_PORTS-1 generate
spwlb0 : if SPW_LOOP_BACK = 1 generate
dtmp(i*CFG_SPW_PORTS+j) <= spwo(i).d(j); stmp(i*CFG_SPW_PORTS+j) <= spwo(i).s(j);
end generate;
nospwlb0 : if SPW_LOOP_BACK = 0 generate
spw_rxd_pad : inpad_ds generic map (padtech, lvds, x33v, 1)
port map (spw_rxdp(i*CFG_SPW_PORTS+j), spw_rxdn(i*CFG_SPW_PORTS+j), dtmp(i*CFG_SPW_PORTS+j));
spw_rxs_pad : inpad_ds generic map (padtech, lvds, x33v, 1)
port map (spw_rxsp(i*CFG_SPW_PORTS+j), spw_rxsn(i*CFG_SPW_PORTS+j), stmp(i*CFG_SPW_PORTS+j));
spw_txd_pad : outpad_ds generic map (padtech, lvds, x33v)
port map (spw_txdp(i*CFG_SPW_PORTS+j), spw_txdn(i*CFG_SPW_PORTS+j), spwo(i).d(j), gnd);
spw_txs_pad : outpad_ds generic map (padtech, lvds, x33v)
port map (spw_txsp(i*CFG_SPW_PORTS+j), spw_txsn(i*CFG_SPW_PORTS+j), spwo(i).s(j), gnd);
end generate;
end generate;
end generate;
end generate;
-----------------------------------------------------------------------
--- Drive unused bus elements ---------------------------------------
-----------------------------------------------------------------------
-- nam1 : for i in (CFG_NCPU+CFG_AHB_UART+CFG_GRETH+CFG_AHB_JTAG) to NAHBMST-1 generate
-- ahbmo(i) <= ahbm_none;
-- end generate;
-- nap0 : for i in 11 to NAPBSLV-1 generate apbo(i) <= apb_none; end generate;
-- nah0 : for i in 8 to NAHBSLV-1 generate ahbso(i) <= ahbs_none; end generate;
-----------------------------------------------------------------------
--- Boot message ----------------------------------------------------
-----------------------------------------------------------------------
-- pragma translate_off
x : report_design
generic map (
msg1 => "LEON3 GR-XC6S-LX75 Demonstration design",
fabtech => tech_table(fabtech), memtech => tech_table(memtech),
mdel => 1
);
-- pragma translate_on
end;
|
gpl-3.0
|
EliasLuiz/TCC
|
Leon3/lib/gaisler/leon3v3/leon3cg.vhd
|
1
|
6994
|
------------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2003 - 2008, Gaisler Research
-- Copyright (C) 2008 - 2014, Aeroflex Gaisler
-- Copyright (C) 2015 - 2016, Cobham Gaisler
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-----------------------------------------------------------------------------
-- Entity: leon3cg
-- File: leon3cg.vhd
-- Author: Jan Andersson, Aeroflex Gaisler
-- Description: Top-level LEON3 component with clock gating
------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
library grlib;
use grlib.amba.all;
library techmap;
use techmap.gencomp.all;
library gaisler;
use gaisler.leon3.all;
entity leon3cg is
generic (
hindex : integer := 0;
fabtech : integer range 0 to NTECH := DEFFABTECH;
memtech : integer := DEFMEMTECH;
nwindows : integer range 2 to 32 := 8;
dsu : integer range 0 to 1 := 0;
fpu : integer range 0 to 31 := 0;
v8 : integer range 0 to 63 := 0;
cp : integer range 0 to 1 := 0;
mac : integer range 0 to 1 := 0;
pclow : integer range 0 to 2 := 2;
notag : integer range 0 to 1 := 0;
nwp : integer range 0 to 4 := 0;
icen : integer range 0 to 1 := 0;
irepl : integer range 0 to 3 := 2;
isets : integer range 1 to 4 := 1;
ilinesize : integer range 4 to 8 := 4;
isetsize : integer range 1 to 256 := 1;
isetlock : integer range 0 to 1 := 0;
dcen : integer range 0 to 1 := 0;
drepl : integer range 0 to 3 := 2;
dsets : integer range 1 to 4 := 1;
dlinesize : integer range 4 to 8 := 4;
dsetsize : integer range 1 to 256 := 1;
dsetlock : integer range 0 to 1 := 0;
dsnoop : integer range 0 to 6 := 0;
ilram : integer range 0 to 1 := 0;
ilramsize : integer range 1 to 512 := 1;
ilramstart : integer range 0 to 255 := 16#8e#;
dlram : integer range 0 to 1 := 0;
dlramsize : integer range 1 to 512 := 1;
dlramstart : integer range 0 to 255 := 16#8f#;
mmuen : integer range 0 to 1 := 0;
itlbnum : integer range 2 to 64 := 8;
dtlbnum : integer range 2 to 64 := 8;
tlb_type : integer range 0 to 3 := 1;
tlb_rep : integer range 0 to 1 := 0;
lddel : integer range 1 to 2 := 2;
disas : integer range 0 to 2 := 0;
tbuf : integer range 0 to 128 := 0;
pwd : integer range 0 to 2 := 2; -- power-down
svt : integer range 0 to 1 := 1; -- single vector trapping
rstaddr : integer := 0;
smp : integer range 0 to 15 := 0; -- support SMP systems
cached : integer := 0; -- cacheability table
scantest : integer := 0;
mmupgsz : integer range 0 to 5 := 0;
bp : integer := 1;
npasi : integer range 0 to 1 := 0;
pwrpsr : integer range 0 to 1 := 0;
rex : integer range 0 to 1 := 0;
altwin : integer range 0 to 1 := 0
);
port (
clk : in std_ulogic; -- AHB clock (free-running)
rstn : in std_ulogic;
ahbi : in ahb_mst_in_type;
ahbo : out ahb_mst_out_type;
ahbsi : in ahb_slv_in_type;
ahbso : in ahb_slv_out_vector;
irqi : in l3_irq_in_type;
irqo : out l3_irq_out_type;
dbgi : in l3_debug_in_type;
dbgo : out l3_debug_out_type;
gclk : in std_ulogic -- gated clock
);
end;
architecture rtl of leon3cg is
signal gnd, vcc : std_logic;
signal fpuo : grfpu_out_type;
begin
gnd <= '0'; vcc <= '1';
fpuo <= grfpu_out_none;
leon3x0 : leon3x
generic map (
hindex => hindex,
fabtech => fabtech,
memtech => memtech,
nwindows => nwindows,
dsu => dsu,
fpu => fpu,
v8 => v8,
cp => cp,
mac => mac,
pclow => pclow,
notag => notag,
nwp => nwp,
icen => icen,
irepl => irepl,
isets => isets,
ilinesize => ilinesize,
isetsize => isetsize,
isetlock => isetlock,
dcen => dcen,
drepl => drepl,
dsets => dsets,
dlinesize => dlinesize,
dsetsize => dsetsize,
dsetlock => dsetlock,
dsnoop => dsnoop,
ilram => ilram,
ilramsize => ilramsize,
ilramstart => ilramstart,
dlram => dlram,
dlramsize => dlramsize,
dlramstart => dlramstart,
mmuen => mmuen,
itlbnum => itlbnum,
dtlbnum => dtlbnum,
tlb_type => tlb_type,
tlb_rep => tlb_rep,
lddel => lddel,
disas => disas,
tbuf => tbuf,
pwd => pwd,
svt => svt,
rstaddr => rstaddr,
smp => smp,
iuft => 0,
fpft => 0,
cmft => 0,
iuinj => 0,
ceinj => 0,
cached => cached,
clk2x => 0,
netlist => 0,
scantest => scantest,
mmupgsz => mmupgsz,
bp => bp,
npasi => npasi,
pwrpsr => pwrpsr,
rex => rex,
altwin => altwin)
port map (
clk => gnd,
gclk2 => gclk,
gfclk2 => clk,
clk2 => clk,
rstn => rstn,
ahbi => ahbi,
ahbo => ahbo,
ahbsi => ahbsi,
ahbso => ahbso,
irqi => irqi,
irqo => irqo,
dbgi => dbgi,
dbgo => dbgo,
fpui => open,
fpuo => fpuo,
clken => vcc
);
end;
|
gpl-3.0
|
EliasLuiz/TCC
|
Leon3/lib/techmap/stratixiii/clkgen_stratixiii.vhd
|
1
|
7261
|
------------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2003 - 2008, Gaisler Research
-- Copyright (C) 2008 - 2014, Aeroflex Gaisler
-- Copyright (C) 2015 - 2016, Cobham Gaisler
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
library techmap;
use techmap.gencomp.all;
-- pragma translate_off
library altera_mf;
use altera_mf.altpll;
-- pragma translate_on
entity stratix3_pll is
generic (
clk_mul : integer := 1;
clk_div : integer := 1;
clk_freq : integer := 25000;
clk2xen : integer := 0;
sdramen : integer := 0
);
port (
inclk0 : in std_ulogic;
c0 : out std_ulogic;
c0_2x : out std_ulogic;
e0 : out std_ulogic;
locked : out std_ulogic
);
end;
architecture rtl of stratix3_pll is
component altpll
generic (
intended_device_family : string := "Stratix III" ;
operation_mode : string := "NORMAL" ;
compensate_clock : string := "CLK0";
inclk0_input_frequency : positive;
width_clock : positive := 10;
clk0_multiply_by : positive := 1;
clk0_divide_by : positive := 1;
clk1_multiply_by : positive := 1;
clk1_divide_by : positive := 1;
clk2_multiply_by : positive := 1;
clk2_divide_by : positive := 1
);
port (
inclk : in std_logic_vector(1 downto 0);
clkena : in std_logic_vector(5 downto 0);
clk : out std_logic_vector(width_clock-1 downto 0);
locked : out std_logic
);
end component;
signal clkena : std_logic_vector (5 downto 0);
signal clkout : std_logic_vector (9 downto 0);
signal inclk : std_logic_vector (1 downto 0);
signal fb : std_logic;
constant clk_period : integer := 1000000000/clk_freq;
constant CLK_MUL2X : integer := clk_mul * 2;
begin
clkena(5 downto 3) <= (others => '0');
clkena(0) <= '1';
clkena(1) <= '1' when sdramen = 1 else '0';
clkena(2) <= '1' when clk2xen = 1 else '0';
inclk <= '0' & inclk0;
c0 <= clkout(0); c0_2x <= clkout(2); e0 <= clkout(1);
sden : if sdramen = 1 generate
altpll0 : altpll
generic map (
intended_device_family => "Stratix III",
--operation_mode => "ZERO_DELAY_BUFFER", inclk0_input_frequency => clk_period,
operation_mode => "NORMAL", inclk0_input_frequency => clk_period,
width_clock => 10, compensate_clock => "CLK1",
clk0_multiply_by => clk_mul, clk0_divide_by => clk_div,
clk1_multiply_by => clk_mul, clk1_divide_by => clk_div,
clk2_multiply_by => CLK_MUL2X, clk2_divide_by => clk_div)
port map ( clkena => clkena, inclk => inclk,
clk => clkout, locked => locked);
end generate;
nosd : if sdramen = 0 generate
altpll0 : altpll
generic map (
intended_device_family => "Stratix III",
operation_mode => "NORMAL", inclk0_input_frequency => clk_period,
width_clock => 10,
clk0_multiply_by => clk_mul, clk0_divide_by => clk_div,
clk1_multiply_by => clk_mul, clk1_divide_by => clk_div,
clk2_multiply_by => CLK_MUL2X, clk2_divide_by => clk_div)
port map ( clkena => clkena, inclk => inclk,
clk => clkout, locked => locked);
end generate;
end;
library ieee;
use ieee.std_logic_1164.all;
-- pragma translate_off
library altera_mf;
library grlib;
use grlib.stdlib.all;
-- pragma translate_on
library techmap;
use techmap.gencomp.all;
entity clkgen_stratixiii is
generic (
clk_mul : integer := 1;
clk_div : integer := 1;
sdramen : integer := 0;
sdinvclk : integer := 0;
pcien : integer := 0;
pcidll : integer := 0;
pcisysclk: integer := 0;
freq : integer := 25000;
clk2xen : integer := 0;
tech : integer := 0);
port (
clkin : in std_logic;
pciclkin: in std_logic;
clk : out std_logic; -- main clock
clkn : out std_logic; -- inverted main clock
clk2x : out std_logic; -- double clock
sdclk : out std_logic; -- SDRAM clock
pciclk : out std_logic; -- PCI clock
cgi : in clkgen_in_type;
cgo : out clkgen_out_type);
end;
architecture rtl of clkgen_stratixiii is
constant VERSION : integer := 1;
constant CLKIN_PERIOD : integer := 20;
signal clk_i : std_logic;
signal clkint, pciclkint : std_logic;
signal pllclk, pllclkn : std_logic; -- generated clocks
signal s_clk : std_logic;
component stratix3_pll
generic (
clk_mul : integer := 1;
clk_div : integer := 1;
clk_freq : integer := 25000;
clk2xen : integer := 0;
sdramen : integer := 0
);
port (
inclk0 : in std_ulogic;
c0 : out std_ulogic;
c0_2x : out std_ulogic;
e0 : out std_ulogic;
locked : out std_ulogic);
end component;
begin
cgo.pcilock <= '1';
-- c0 : if (PCISYSCLK = 0) generate
-- Clkint <= Clkin;
-- end generate;
-- c1 : if (PCISYSCLK = 1) generate
-- Clkint <= pciclkin;
-- end generate;
-- c2 : if (PCIEN = 1) generate
-- p0 : if (PCIDLL = 1) generate
-- pciclkint <= pciclkin;
-- pciclk <= pciclkint;
-- end generate;
-- p1 : if (PCIDLL = 0) generate
-- u0 : if (PCISYSCLK = 0) generate
-- pciclkint <= pciclkin;
-- end generate;
-- pciclk <= clk_i when (PCISYSCLK = 1) else pciclkint;
-- end generate;
-- end generate;
-- c3 : if (PCIEN = 0) generate
-- pciclk <= Clkint;
-- end generate;
c0: if (PCISYSCLK = 0) or (PCIEN = 0) generate
clkint <= clkin;
end generate c0;
c1: if PCIEN /= 0 generate
d0: if PCISYSCLK = 1 generate
clkint <= pciclkin;
end generate d0;
pciclk <= pciclkin;
end generate c1;
c2: if PCIEN = 0 generate
pciclk <= '0';
end generate c2;
sdclk_pll : stratix3_pll
generic map (clk_mul, clk_div, freq, clk2xen, sdramen)
port map ( inclk0 => clkint, e0 => sdclk, c0 => s_clk, c0_2x => clk2x,
locked => cgo.clklock);
clk <= s_clk;
clkn <= not s_clk;
-- pragma translate_off
bootmsg : report_version
generic map (
"clkgen_stratixiii" & ": altpll sdram/pci clock generator, version " & tost(VERSION),
"clkgen_stratixiii" & ": Frequency " & tost(freq) & " KHz, PLL scaler " & tost(clk_mul) & "/" & tost(clk_div));
-- pragma translate_on
end;
|
gpl-3.0
|
EliasLuiz/TCC
|
Leon3/designs/leon3-nuhorizons-3s1500/leon3mp.vhd
|
1
|
24538
|
-----------------------------------------------------------------------------
-- LEON3 Demonstration design
-- Copyright (C) 2004 Jiri Gaisler, Gaisler Research
------------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2003 - 2008, Gaisler Research
-- Copyright (C) 2008 - 2014, Aeroflex Gaisler
-- Copyright (C) 2015 - 2016, Cobham Gaisler
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
library grlib;
use grlib.amba.all;
use grlib.stdlib.all;
library techmap;
use techmap.gencomp.all;
library gaisler;
use gaisler.memctrl.all;
use gaisler.leon3.all;
use gaisler.uart.all;
use gaisler.misc.all;
use gaisler.can.all;
use gaisler.net.all;
use gaisler.jtag.all;
library esa;
use esa.memoryctrl.all;
use work.config.all;
entity leon3mp is
generic (
fabtech : integer := CFG_FABTECH;
memtech : integer := CFG_MEMTECH;
padtech : integer := CFG_PADTECH;
clktech : integer := CFG_CLKTECH;
disas : integer := CFG_DISAS; -- Enable disassembly to console
dbguart : integer := CFG_DUART; -- Print UART on console
pclow : integer := CFG_PCLOW
);
port (
pb_sw : in std_logic_vector (4 downto 1); -- push buttons
pll_clk : in std_ulogic; -- PLL clock
led : out std_logic_vector(8 downto 1);
flash_a : out std_logic_vector(20 downto 0);
flash_d : inout std_logic_vector(15 downto 0);
sdram_a : out std_logic_vector(11 downto 0);
sdram_d : inout std_logic_vector(31 downto 0);
sdram_ba : out std_logic_vector(3 downto 0);
sdram_dqm : out std_logic_vector(3 downto 0);
sdram_clk : inout std_ulogic;
sdram_cke : out std_ulogic; -- sdram clock enable
sdram_csn : out std_ulogic; -- sdram chip select
sdram_wen : out std_ulogic; -- sdram write enable
sdram_rasn : out std_ulogic; -- sdram ras
sdram_casn : out std_ulogic; -- sdram cas
uart1_txd : out std_ulogic;
uart1_rxd : in std_ulogic;
uart1_rts : out std_ulogic;
uart1_cts : in std_ulogic;
uart2_txd : out std_ulogic;
uart2_rxd : in std_ulogic;
uart2_rts : out std_ulogic;
uart2_cts : in std_ulogic;
flash_oen : out std_ulogic;
flash_wen : out std_ulogic;
flash_cen : out std_ulogic;
flash_byte : out std_ulogic;
flash_ready : in std_ulogic;
flash_rpn : out std_ulogic;
flash_wpn : out std_ulogic;
phy_mii_data: inout std_logic; -- ethernet PHY interface
phy_tx_clk : in std_ulogic;
phy_rx_clk : in std_ulogic;
phy_rx_data : in std_logic_vector(3 downto 0);
phy_dv : in std_ulogic;
phy_rx_er : in std_ulogic;
phy_col : in std_ulogic;
phy_crs : in std_ulogic;
phy_tx_data : out std_logic_vector(3 downto 0);
phy_tx_en : out std_ulogic;
phy_mii_clk : out std_ulogic;
phy_100 : in std_ulogic; -- 100 Mbit indicator
phy_rst_n : out std_ulogic;
gpio : inout std_logic_vector(CFG_GRGPIO_WIDTH-1 downto 0);
-- lcd_data : inout std_logic_vector(7 downto 0);
-- lcd_rs : out std_ulogic;
-- lcd_rw : out std_ulogic;
-- lcd_en : out std_ulogic;
-- lcd_backl : out std_ulogic;
can_txd : out std_ulogic;
can_rxd : in std_ulogic;
smsc_addr : out std_logic_vector(14 downto 0);
smsc_data : inout std_logic_vector(31 downto 0);
smsc_nbe : out std_logic_vector(3 downto 0);
smsc_resetn : out std_ulogic;
smsc_ardy : in std_ulogic;
-- smsc_intr : in std_ulogic;
smsc_nldev : in std_ulogic;
smsc_nrd : out std_ulogic;
smsc_nwr : out std_ulogic;
smsc_ncs : out std_ulogic;
smsc_aen : out std_ulogic;
smsc_lclk : out std_ulogic;
smsc_wnr : out std_ulogic;
smsc_rdyrtn : out std_ulogic;
smsc_cycle : out std_ulogic;
smsc_nads : out std_ulogic
);
end;
architecture rtl of leon3mp is
signal vcc, gnd : std_logic_vector(7 downto 0);
signal wpo : wprot_out_type;
signal sdi : sdctrl_in_type;
signal sdo : sdram_out_type;
signal apbi : apb_slv_in_type;
signal apbo : apb_slv_out_vector := (others => apb_none);
signal ahbsi : ahb_slv_in_type;
signal ahbso : ahb_slv_out_vector := (others => ahbs_none);
signal ahbmi : ahb_mst_in_type;
signal ahbmo : ahb_mst_out_vector := (others => ahbm_none);
signal clkm, rstn, rstraw, pciclk, sdclkl : std_ulogic;
signal cgi : clkgen_in_type;
signal cgo : clkgen_out_type;
signal u1i, u2i, dui : uart_in_type;
signal u1o, u2o, duo : uart_out_type;
signal irqi : irq_in_vector(0 to CFG_NCPU-1);
signal irqo : irq_out_vector(0 to CFG_NCPU-1);
signal dbgi : l3_debug_in_vector(0 to CFG_NCPU-1);
signal dbgo : l3_debug_out_vector(0 to CFG_NCPU-1);
signal dsui : dsu_in_type;
signal dsuo : dsu_out_type;
signal ethi, ethi1, ethi2 : eth_in_type;
signal etho, etho1, etho2 : eth_out_type;
signal gpti : gptimer_in_type;
signal gpioi : gpio_in_type;
signal gpioo : gpio_out_type;
signal can_lrx, can_ltx : std_ulogic;
signal lclk, pci_lclk, sdfb : std_ulogic;
signal tck, tms, tdi, tdo : std_ulogic;
signal resetn : std_ulogic;
signal pbsw : std_logic_vector(4 downto 1);
signal ledo : std_logic_vector(8 downto 1);
signal memi : memory_in_type;
signal memo : memory_out_type;
--for smc lan chip
signal s_eth_aen : std_logic;
signal s_eth_readn : std_logic;
signal s_eth_writen: std_logic;
signal s_eth_nbe : std_logic_vector(3 downto 0);
signal s_eth_din : std_logic_vector(31 downto 0);
constant ahbmmax : integer := CFG_NCPU+CFG_AHB_UART+CFG_AHB_JTAG+ CFG_GRETH;
constant BOARD_FREQ : integer := 50000; -- board frequency in KHz
constant CPU_FREQ : integer := (BOARD_FREQ*CFG_CLKMUL)/CFG_CLKDIV; -- cpu frequency in KHz
begin
----------------------------------------------------------------------
--- Reset and Clock generation -------------------------------------
----------------------------------------------------------------------
vcc <= (others => '1'); gnd <= (others => '0');
sdram_clk_pad : skew_outpad
generic map (tech => padtech, slew => 1, strength => 24, skew => -60)
port map (sdram_clk, sdclkl, rstn);
cgi.pllctrl <= "00"; cgi.pllrst <= rstraw;
resetn <= pbsw(4);
ledo(2) <= not cgo.clklock;
ledo(3) <= pbsw(3);
clk_pad : clkpad generic map (tech => padtech) port map (pll_clk, lclk);
clkgen0 : clkgen -- clock generator
generic map (clktech, CFG_CLKMUL, CFG_CLKDIV, CFG_MCTRL_SDEN,
CFG_CLK_NOFB, 0, 0, 0, BOARD_FREQ)
port map (lclk, pci_lclk, clkm, open, open, sdclkl, pciclk, cgi, cgo);
rst0 : rstgen -- reset generator
port map (resetn, clkm, cgo.clklock, rstn, rstraw);
----------------------------------------------------------------------
--- AHB CONTROLLER --------------------------------------------------
----------------------------------------------------------------------
ahb0 : ahbctrl -- AHB arbiter/multiplexer
generic map (defmast => CFG_DEFMST, split => CFG_SPLIT,
rrobin => CFG_RROBIN, ioaddr => CFG_AHBIO,
nahbm => ahbmmax, nahbs => 8)
port map (rstn, clkm, ahbmi, ahbmo, ahbsi, ahbso);
----------------------------------------------------------------------
--- LEON3 processor and DSU -----------------------------------------
----------------------------------------------------------------------
l3 : if CFG_LEON3 = 1 generate
cpu : for i in 0 to CFG_NCPU-1 generate
u0 : leon3s -- LEON3 processor
generic map (i, fabtech, memtech, CFG_NWIN, CFG_DSU, CFG_FPU, CFG_V8,
0, CFG_MAC, pclow, CFG_NOTAG, CFG_NWP, CFG_ICEN, CFG_IREPL, CFG_ISETS, CFG_ILINE,
CFG_ISETSZ, CFG_ILOCK, CFG_DCEN, CFG_DREPL, CFG_DSETS, CFG_DLINE, CFG_DSETSZ,
CFG_DLOCK, CFG_DSNOOP, CFG_ILRAMEN, CFG_ILRAMSZ, CFG_ILRAMADDR, CFG_DLRAMEN,
CFG_DLRAMSZ, CFG_DLRAMADDR, CFG_MMUEN, CFG_ITLBNUM, CFG_DTLBNUM, CFG_TLB_TYPE, CFG_TLB_REP,
CFG_LDDEL, disas, CFG_ITBSZ, CFG_PWD, CFG_SVT, CFG_RSTADDR, CFG_NCPU-1,
CFG_DFIXED, CFG_SCAN, CFG_MMU_PAGE, CFG_BP, CFG_NP_ASI, CFG_WRPSR)
port map (clkm, rstn, ahbmi, ahbmo(i), ahbsi, ahbso,
irqi(i), irqo(i), dbgi(i), dbgo(i));
end generate;
ledo(8) <= dbgo(0).error;
dsugen : if CFG_DSU = 1 generate
dsu0 : dsu3 -- LEON3 Debug Support Unit
generic map (hindex => 2, haddr => 16#900#, hmask => 16#F00#,
ncpu => CFG_NCPU, tbits => 30, tech => memtech, irq => 0, kbytes => CFG_ATBSZ)
port map (rstn, clkm, ahbmi, ahbsi, ahbso(2), dbgo, dbgi, dsui, dsuo);
dsui.enable <= '1'; dsui.break <= pbsw(1); ledo(1) <= not dsuo.active;
end generate;
end generate;
nodcom : if CFG_DSU = 0 generate
ahbso(2) <= ahbs_none; dsuo.tstop <= '0'; dsuo.active <= '0';
end generate;
dcomgen : if CFG_AHB_UART = 1 generate
dcom0: ahbuart -- Debug UART
generic map (hindex => CFG_NCPU, pindex => 7, paddr => 7)
port map (rstn, clkm, dui, duo, apbi, apbo(7), ahbmi, ahbmo(CFG_NCPU));
dui.rxd <= u2i.rxd; u2o.txd <= duo.txd; u2o.rtsn <= gnd(0);
end generate;
nouah : if CFG_AHB_UART = 0 generate apbo(7) <= apb_none; end generate;
ahbjtaggen0 :if CFG_AHB_JTAG = 1 generate
ahbjtag0 : ahbjtag generic map(tech => fabtech, hindex => CFG_NCPU+CFG_AHB_UART)
port map(rstn, clkm, tck, tms, tdi, tdo, ahbmi, ahbmo(CFG_NCPU+CFG_AHB_UART),
open, open, open, open, open, open, open, gnd(0));
end generate;
----------------------------------------------------------------------
--- PROM/SDRAM Memory controller ------------------------------------
----------------------------------------------------------------------
memi.brdyn <= '1'; memi.bexcn <= '1';
memi.writen <= '1'; memi.wrn <= "1111";
memi.bwidth <= "00" when CFG_MCTRL_RAM16BIT = 0 else "01";
mg2 : if CFG_MCTRL_LEON2 = 1 generate -- LEON2 memory controller
sr1 : entity work.smc_mctrl generic map (hindex => 0, pindex => 0, paddr => 0,
srbanks => 4+CFG_MCTRL_5CS, sden => CFG_MCTRL_SDEN,
ram8 => CFG_MCTRL_RAM8BIT, ram16 => CFG_MCTRL_RAM16BIT,
invclk => CFG_MCTRL_INVCLK, sepbus => CFG_MCTRL_SEPBUS,
sdbits => 32 + 32*CFG_MCTRL_SD64)
port map (rstn, clkm, memi, memo, ahbsi, ahbso(0), apbi, apbo(0),
wpo, sdo, s_eth_aen, s_eth_readn, s_eth_writen, s_eth_nbe, s_eth_din);
addr_pad : outpadv generic map (width => 21, tech => padtech)
port map (flash_a(20 downto 0), memo.address(21 downto 1));
roms_pad : outpad generic map (tech => padtech)
port map (flash_cen, memo.romsn(0));
oen_pad : outpad generic map (tech => padtech)
port map (flash_oen, memo.oen);
wri_pad : outpad generic map (tech => padtech)
port map (flash_wen, memo.writen);
rom8 : if CFG_MCTRL_RAM16BIT = 0 generate
data_pad : iopadv generic map (tech => padtech, width => 8)
port map (flash_d(7 downto 0), memo.data(31 downto 24),
memo.bdrive(0), memi.data(31 downto 24));
data15_pad : iopad generic map (tech => padtech)
port map (flash_d(15), memo.address(0), gnd(0), open);
end generate;
rom16 : if CFG_MCTRL_RAM16BIT = 1 generate
data_pad : iopadv generic map (tech => padtech, width => 16)
port map (flash_d(15 downto 0), memo.data(31 downto 16),
memo.bdrive(0), memi.data(31 downto 16));
end generate;
sa_pad : outpadv generic map (width => 12, tech => padtech)
port map (sdram_a, memo.sa(11 downto 0));
sba1_pad : outpadv generic map (width => 2, tech => padtech)
port map (sdram_ba(1 downto 0), memo.sa(14 downto 13));
sba2_pad : outpadv generic map (width => 2, tech => padtech)
port map (sdram_ba(3 downto 2), memo.sa(14 downto 13));
bdr : for i in 0 to 3 generate
sd_pad : iopadv generic map (tech => padtech, width => 8)
port map (sdram_d(31-i*8 downto 24-i*8), memo.data(31-i*8 downto 24-i*8),
memo.bdrive(i), memi.sd(31-i*8 downto 24-i*8));
end generate;
sdcke_pad : outpad generic map (tech => padtech)
port map (sdram_cke, sdo.sdcke(0));
sdwen_pad : outpad generic map (tech => padtech)
port map (sdram_wen, sdo.sdwen);
sdcsn_pad : outpad generic map (tech => padtech)
port map (sdram_csn, sdo.sdcsn(0));
sdras_pad : outpad generic map (tech => padtech)
port map (sdram_rasn, sdo.rasn);
sdcas_pad : outpad generic map (tech => padtech)
port map (sdram_casn, sdo.casn);
sddqm_pad : outpadv generic map (width => 4, tech => padtech)
port map (sdram_dqm, sdo.dqm(3 downto 0));
end generate;
nosd0 : if (CFG_MCTRL_SDEN = 0) generate -- no SDRAM controller
sdcke_pad : outpad generic map (tech => padtech)
port map (sdram_cke, gnd(0));
sdcsn_pad : outpad generic map (tech => padtech)
port map (sdram_csn, vcc(0));
end generate;
----------------------------------------------------------------------
--- APB Bridge and various periherals -------------------------------
----------------------------------------------------------------------
bpromgen : if CFG_AHBROMEN /= 0 generate
brom : entity work.ahbrom
generic map (hindex => 4, haddr => CFG_AHBRODDR, pipe => CFG_AHBROPIP)
port map ( rstn, clkm, ahbsi, ahbso(4));
end generate;
nobpromgen : if CFG_AHBROMEN = 0 generate
ahbso(4) <= ahbs_none;
end generate;
----------------------------------------------------------------------
--- APB Bridge and various periherals -------------------------------
----------------------------------------------------------------------
apb0 : apbctrl -- AHB/APB bridge
generic map (hindex => 1, haddr => CFG_APBADDR)
port map (rstn, clkm, ahbsi, ahbso(1), apbi, apbo );
ua1 : if CFG_UART1_ENABLE /= 0 generate
uart1 : apbuart -- UART 1
generic map (pindex => 1, paddr => 1, pirq => 2, console => dbguart,
fifosize => CFG_UART1_FIFO)
port map (rstn, clkm, apbi, apbo(1), u1i, u1o);
u1i.extclk <= '0';
end generate;
noua0 : if CFG_UART1_ENABLE = 0 generate apbo(1) <= apb_none; end generate;
ua1rx_pad : inpad generic map (tech => padtech) port map (uart1_rxd, u1i.rxd);
ua1tx_pad : outpad generic map (tech => padtech) port map (uart1_txd, u1o.txd);
ua1cts_pad : inpad generic map (tech => padtech) port map (uart1_cts, u1i.ctsn);
ua1rts_pad : outpad generic map (tech => padtech) port map (uart1_rts, u1o.rtsn);
ua2 : if (CFG_UART2_ENABLE /= 0) and (CFG_AHB_UART = 0) generate
uart2 : apbuart -- UART 2
generic map (pindex => 9, paddr => 9, pirq => 3, fifosize => CFG_UART2_FIFO)
port map (rstn, clkm, apbi, apbo(9), u2i, u2o);
u2i.extclk <= '0';
end generate;
noua1 : if CFG_UART2_ENABLE = 0 generate apbo(9) <= apb_none; end generate;
ua2rx_pad : inpad generic map (tech => padtech) port map (uart2_rxd, u2i.rxd);
ua2tx_pad : outpad generic map (tech => padtech) port map (uart2_txd, u2o.txd);
ua2cts_pad : inpad generic map (tech => padtech) port map (uart2_cts, u2i.ctsn);
ua2rts_pad : outpad generic map (tech => padtech) port map (uart2_rts, u2o.rtsn);
irqctrl : if CFG_IRQ3_ENABLE /= 0 generate
irqctrl0 : irqmp -- interrupt controller
generic map (pindex => 2, paddr => 2, ncpu => CFG_NCPU)
port map (rstn, clkm, apbi, apbo(2), irqo, irqi);
end generate;
irq3 : if CFG_IRQ3_ENABLE = 0 generate
x : for i in 0 to CFG_NCPU-1 generate
irqi(i).irl <= "0000";
end generate;
apbo(2) <= apb_none;
end generate;
gpt : if CFG_GPT_ENABLE /= 0 generate
timer0 : gptimer -- timer unit
generic map (pindex => 3, paddr => 3, pirq => CFG_GPT_IRQ,
sepirq => CFG_GPT_SEPIRQ, sbits => CFG_GPT_SW, ntimers => CFG_GPT_NTIM,
nbits => CFG_GPT_TW, wdog => CFG_GPT_WDOG)
port map (rstn, clkm, apbi, apbo(3), gpti, open);
gpti <= gpti_dhalt_drive(dsuo.tstop);
end generate;
notim : if CFG_GPT_ENABLE = 0 generate apbo(3) <= apb_none; end generate;
gpio0 : if CFG_GRGPIO_ENABLE /= 0 generate -- GPIO unit
grgpio0: grgpio
generic map(pindex => 5, paddr => 5, imask => CFG_GRGPIO_IMASK, nbits => CFG_GRGPIO_WIDTH)
port map(rst => rstn, clk => clkm, apbi => apbi, apbo => apbo(5),
gpioi => gpioi, gpioo => gpioo);
pio_pads : for i in 0 to CFG_GRGPIO_WIDTH-1 generate
pio_pad : iopad generic map (tech => padtech)
port map (gpio(i), gpioo.dout(i), gpioo.oen(i), gpioi.din(i));
end generate;
end generate;
-----------------------------------------------------------------------
--- ETHERNET ---------------------------------------------------------
-----------------------------------------------------------------------
eth0 : if CFG_GRETH = 1 generate -- Gaisler ethernet MAC
e1 : greth generic map(hindex => CFG_NCPU+CFG_AHB_UART+CFG_AHB_JTAG,
pindex => 15, paddr => 15, pirq => 12, memtech => memtech,
mdcscaler => CPU_FREQ/1000, enable_mdio => 1, fifosize => CFG_ETH_FIFO,
nsync => 1, edcl => CFG_DSU_ETH, edclbufsz => CFG_ETH_BUF,
macaddrh => CFG_ETH_ENM, macaddrl => CFG_ETH_ENL,
ipaddrh => CFG_ETH_IPM, ipaddrl => CFG_ETH_IPL)
port map( rst => rstn, clk => clkm, ahbmi => ahbmi,
ahbmo => ahbmo(CFG_NCPU+CFG_AHB_UART+CFG_AHB_JTAG), apbi => apbi,
apbo => apbo(15), ethi => ethi, etho => etho);
end generate;
ethpads : if CFG_GRETH = 0 generate -- no eth
etho <= eth_out_none;
end generate;
emdio_pad : iopad generic map (tech => padtech)
port map (phy_mii_data, etho.mdio_o, etho.mdio_oe, ethi.mdio_i);
etxc_pad : clkpad generic map (tech => padtech, arch => 0)
port map (phy_tx_clk, ethi.tx_clk);
erxc_pad : clkpad generic map (tech => padtech, arch => 0)
port map (phy_rx_clk, ethi.rx_clk);
erxd_pad : inpadv generic map (tech => padtech, width => 4)
port map (phy_rx_data, ethi.rxd(3 downto 0));
erxdv_pad : inpad generic map (tech => padtech)
port map (phy_dv, ethi.rx_dv);
erxer_pad : inpad generic map (tech => padtech)
port map (phy_rx_er, ethi.rx_er);
erxco_pad : inpad generic map (tech => padtech)
port map (phy_col, ethi.rx_col);
erxcr_pad : inpad generic map (tech => padtech)
port map (phy_crs, ethi.rx_crs);
etxd_pad : outpadv generic map (tech => padtech, width => 4)
port map (phy_tx_data, etho.txd(3 downto 0));
etxen_pad : outpad generic map (tech => padtech)
port map ( phy_tx_en, etho.tx_en);
emdc_pad : outpad generic map (tech => padtech)
port map (phy_mii_clk, etho.mdc);
ereset_pad : outpad generic map (tech => padtech)
port map (phy_rst_n, rstn);
-----------------------------------------------------------------------
--- CAN --------------------------------------------------------------
-----------------------------------------------------------------------
can0 : if CFG_CAN = 1 generate
can0 : can_oc generic map (slvndx => 6, ioaddr => CFG_CANIO,
iomask => 16#FF0#, irq => CFG_CANIRQ, memtech => memtech)
port map (rstn, clkm, ahbsi, ahbso(6), can_lrx, can_ltx );
end generate;
ncan : if CFG_CAN = 0 generate ahbso(6) <= ahbs_none; end generate;
can_loopback : if CFG_CANLOOP = 1 generate
can_lrx <= can_ltx;
end generate;
can_pads : if CFG_CANLOOP = 0 generate
can_tx_pad : outpad generic map (tech => padtech)
port map (can_txd, can_ltx);
can_rx_pad : inpad generic map (tech => padtech)
port map (can_rxd, can_lrx);
end generate;
-----------------------------------------------------------------------
--- AHB RAM ----------------------------------------------------------
-----------------------------------------------------------------------
ocram : if CFG_AHBRAMEN = 1 generate
ahbram0 : ahbram generic map (hindex => 7, haddr => CFG_AHBRADDR,
tech => CFG_MEMTECH, kbytes => CFG_AHBRSZ, pipe => CFG_AHBRPIPE)
port map ( rstn, clkm, ahbsi, ahbso(7));
end generate;
nram : if CFG_AHBRAMEN = 0 generate ahbso(7) <= ahbs_none; end generate;
-----------------------------------------------------------------------
--- I/O interface ---------------------------------------------------
-----------------------------------------------------------------------
pb_sw_pad : inpadv generic map (width => 4, tech => padtech)
port map (pb_sw, pbsw);
led_pad : outpadv generic map (width => 8, tech => padtech)
port map (led, ledo);
rom8 : if CFG_MCTRL_RAM16BIT = 0 generate
byte_pad : outpad generic map (tech => padtech) port map (flash_byte, gnd(0));
end generate;
rom16 : if CFG_MCTRL_RAM16BIT = 1 generate
byte_pad : outpad generic map (tech => padtech) port map (flash_byte, vcc(0));
end generate;
rpn_pad : outpad generic map (tech => padtech) port map (flash_rpn, rstn);
wpn_pad : outpad generic map (tech => padtech) port map (flash_wpn, vcc(0));
ready_pad : inpad generic map (tech => padtech) port map (flash_ready, open);
smsc_data_pads : for i in 0 to 3 generate
data_pad : iopadv generic map (tech => padtech, width => 8)
port map (smsc_data(31-i*8 downto 24-i*8), memo.data(31-i*8 downto 24-i*8),
memo.bdrive(i), s_eth_din(31-i*8 downto 24-i*8));
end generate;
smsc_addr_pad : outpadv generic map (tech => padtech, width => 15)
port map (smsc_addr, memo.address(15 downto 1));
smsc_nbe_pad : outpadv generic map (tech => padtech, width => 4)
port map (smsc_nbe, s_eth_nbe);
smsc_reset_pad : outpad generic map (tech => padtech)
port map (smsc_resetn, rstn);
smsc_nrd_pad : outpad generic map (tech => padtech)
port map (smsc_nrd, s_eth_readn);
smsc_nwr_pad : outpad generic map (tech => padtech)
port map (smsc_nwr, s_eth_writen);
smsc_ncs_pad : outpad generic map (tech => padtech)
port map (smsc_ncs, memo.iosn);
smsc_aen_pad : outpad generic map (tech => padtech)
port map (smsc_aen, s_eth_aen);
smsc_lclk_pad : outpad generic map (tech => padtech)
port map (smsc_lclk, vcc(0));
smsc_wnr_pad : outpad generic map (tech => padtech)
port map (smsc_wnr, vcc(0));
smsc_rdyrtn_pad : outpad generic map (tech => padtech)
port map (smsc_rdyrtn, vcc(0));
smsc_cycle_pad : outpad generic map (tech => padtech)
port map (smsc_cycle, vcc(0));
smsc_nads_pad : outpad generic map (tech => padtech)
port map (smsc_nads, gnd(0));
-- lcd_data_pad : iopadv generic map (width => 8, tech => padtech)
-- port map (lcd_data, nuo.lcd_data, nuo.lcd_ben, nui.lcd_data);
-- lcd_rs_pad : outpad generic map (tech => padtech)
-- port map (lcd_rs, nuo.lcd_rs);
-- lcd_rw_pad : outpad generic map (tech => padtech)
-- port map (lcd_rw, nuo.lcd_rw );
-- lcd_en_pad : outpad generic map (tech => padtech)
-- port map (lcd_en, nuo.lcd_en);
-- lcd_backl_pad : outpad generic map (tech => padtech)
-- port map (lcd_backl, nuo.lcd_backl);
-----------------------------------------------------------------------
--- Drive unused bus elements ---------------------------------------
-----------------------------------------------------------------------
-- nam1 : for i in (CFG_NCPU+CFG_AHB_UART+CFG_AHB_JTAG) to NAHBMST-1 generate
-- ahbmo(i) <= ahbm_none;
-- end generate;
-- nap0 : for i in 11 to NAPBSLV-1-CFG_GRETH generate apbo(i) <= apb_none; end generate;
apbo(6) <= apb_none;
-----------------------------------------------------------------------
--- Boot message ----------------------------------------------------
-----------------------------------------------------------------------
-- pragma translate_off
x : report_design
generic map (
msg1 => "LEON3 Demonstration design for Nuhorizon SP3 board",
fabtech => tech_table(fabtech), memtech => tech_table(memtech),
mdel => 1
);
-- pragma translate_on
end;
|
gpl-3.0
|
EliasLuiz/TCC
|
Leon3/lib/gaisler/srmmu/libmmu.vhd
|
1
|
11193
|
------------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2003 - 2008, Gaisler Research
-- Copyright (C) 2008 - 2014, Aeroflex Gaisler
-- Copyright (C) 2015 - 2016, Cobham Gaisler
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-----------------------------------------------------------------------------
-- Package: leon3
-- File: leon3.vhd
-- Author: Konrad Eisele, Jiri Gaisler, Gaisler Research
-- Description: MMU component declaration
------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
library grlib;
use grlib.stdlib.all;
library techmap;
use techmap.gencomp.all;
library gaisler;
use gaisler.mmuconfig.all;
use gaisler.mmuiface.all;
package libmmu is
component mmu
generic (
tech : integer range 0 to NTECH := 0;
itlbnum : integer range 2 to 64 := 8;
dtlbnum : integer range 2 to 64 := 8;
tlb_type : integer range 0 to 3 := 1;
tlb_rep : integer range 0 to 1 := 0;
mmupgsz : integer range 0 to 5 := 0;
ramcbits : integer := 1
);
port (
rst : in std_logic;
clk : in std_logic;
mmudci : in mmudc_in_type;
mmudco : out mmudc_out_type;
mmuici : in mmuic_in_type;
mmuico : out mmuic_out_type;
mcmmo : in memory_mm_out_type;
mcmmi : out memory_mm_in_type;
testin : in std_logic_vector(TESTIN_WIDTH-1 downto 0) := testin_none
);
end component;
function TLB_CreateCamWrite( two_data : std_logic_vector(31 downto 0);
read : std_logic;
lvl : std_logic_vector(1 downto 0);
ctx : std_logic_vector(M_CTX_SZ-1 downto 0);
vaddr : std_logic_vector(31 downto 0)
) return tlbcam_reg;
procedure TLB_CheckFault( ACC : in std_logic_vector(2 downto 0);
isid : in mmu_idcache;
su : in std_logic;
read : in std_logic;
fault_pro : out std_logic;
fault_pri : out std_logic );
procedure TLB_MergeData( mmupgsz : in integer range 0 to 5;
mmctrl : in mmctrl_type1;
LVL : in std_logic_vector(1 downto 0);
PTE : in std_logic_vector(31 downto 0);
data : in std_logic_vector(31 downto 0);
transdata : out std_logic_vector(31 downto 0));
function TLB_CreateCamTrans( vaddr : std_logic_vector(31 downto 0);
read : std_logic;
ctx : std_logic_vector(M_CTX_SZ-1 downto 0)
) return tlbcam_tfp;
function TLB_CreateCamFlush( data : std_logic_vector(31 downto 0);
ctx : std_logic_vector(M_CTX_SZ-1 downto 0)
) return tlbcam_tfp;
subtype mmu_gpsz_typ is integer range 0 to 3;
function MMU_getpagesize( mmupgsz : in integer range 0 to 4;
mmctrl : in mmctrl_type1
) return mmu_gpsz_typ;
end;
package body libmmu is
procedure TLB_CheckFault( ACC : in std_logic_vector(2 downto 0);
isid : in mmu_idcache;
su : in std_logic;
read : in std_logic;
fault_pro : out std_logic;
fault_pri : out std_logic ) is
variable c_isd : std_logic;
begin
fault_pro := '0';
fault_pri := '0';
-- use '0' == icache '1' == dcache
if isid = id_icache then
c_isd := '0';
else
c_isd := '1';
end if;
case ACC is
when "000" => fault_pro := (not c_isd) or (not read);
when "001" => fault_pro := (not c_isd);
when "010" => fault_pro := (not read);
when "011" => null;
when "100" => fault_pro := (c_isd);
when "101" => fault_pro := (not c_isd) or ((not read) and (not su));
when "110" => fault_pri := (not su);
fault_pro := (not read);
when "111" => fault_pri := (not su);
when others => null;
end case;
end;
procedure TLB_MergeData( mmupgsz : in integer range 0 to 5;
mmctrl : in mmctrl_type1;
LVL : in std_logic_vector(1 downto 0);
PTE : in std_logic_vector(31 downto 0);
data : in std_logic_vector(31 downto 0);
transdata : out std_logic_vector(31 downto 0) ) is
variable pagesize : integer range 0 to 3;
begin
--# merge data
transdata := (others => '0');
pagesize := MMU_getpagesize(mmupgsz, mmctrl);
case pagesize is
when 1 =>
-- 8k
case LVL is
when LVL_PAGE => transdata := PTE(P8K_PTE_PPN32PAG_U downto P8K_PTE_PPN32PAG_D) & data(P8K_VA_OFFPAG_U downto P8K_VA_OFFPAG_D);
when LVL_SEGMENT => transdata := PTE(P8K_PTE_PPN32SEG_U downto P8K_PTE_PPN32SEG_D) & data(P8K_VA_OFFSEG_U downto P8K_VA_OFFSEG_D);
when LVL_REGION => transdata := PTE(P8K_PTE_PPN32REG_U downto P8K_PTE_PPN32REG_D) & data(P8K_VA_OFFREG_U downto P8K_VA_OFFREG_D);
when LVL_CTX => transdata := data(P8K_VA_OFFCTX_U downto P8K_VA_OFFCTX_D);
when others => transdata := (others => 'X');
end case;
when 2 =>
-- 16k
case LVL is
when LVL_PAGE => transdata := PTE(P16K_PTE_PPN32PAG_U downto P16K_PTE_PPN32PAG_D) & data(P16K_VA_OFFPAG_U downto P16K_VA_OFFPAG_D);
when LVL_SEGMENT => transdata := PTE(P16K_PTE_PPN32SEG_U downto P16K_PTE_PPN32SEG_D) & data(P16K_VA_OFFSEG_U downto P16K_VA_OFFSEG_D);
when LVL_REGION => transdata := PTE(P16K_PTE_PPN32REG_U downto P16K_PTE_PPN32REG_D) & data(P16K_VA_OFFREG_U downto P16K_VA_OFFREG_D);
when LVL_CTX => transdata := data(P16K_VA_OFFCTX_U downto P16K_VA_OFFCTX_D);
when others => transdata := (others => 'X');
end case;
when 3 =>
-- 32k
case LVL is
when LVL_PAGE => transdata := PTE(P32K_PTE_PPN32PAG_U downto P32K_PTE_PPN32PAG_D) & data(P32K_VA_OFFPAG_U downto P32K_VA_OFFPAG_D);
when LVL_SEGMENT => transdata := PTE(P32K_PTE_PPN32SEG_U downto P32K_PTE_PPN32SEG_D) & data(P32K_VA_OFFSEG_U downto P32K_VA_OFFSEG_D);
when LVL_REGION => transdata := PTE(P32K_PTE_PPN32REG_U downto P32K_PTE_PPN32REG_D) & data(P32K_VA_OFFREG_U downto P32K_VA_OFFREG_D);
when LVL_CTX => transdata := data(P32K_VA_OFFCTX_U downto P32K_VA_OFFCTX_D);
when others => transdata := (others => 'X');
end case;
when others =>
-- 4k
case LVL is
when LVL_PAGE => transdata := PTE(PTE_PPN32PAG_U downto PTE_PPN32PAG_D) & data(VA_OFFPAG_U downto VA_OFFPAG_D);
when LVL_SEGMENT => transdata := PTE(PTE_PPN32SEG_U downto PTE_PPN32SEG_D) & data(VA_OFFSEG_U downto VA_OFFSEG_D);
when LVL_REGION => transdata := PTE(PTE_PPN32REG_U downto PTE_PPN32REG_D) & data(VA_OFFREG_U downto VA_OFFREG_D);
when LVL_CTX => transdata := data(VA_OFFCTX_U downto VA_OFFCTX_D);
when others => transdata := (others => 'X');
end case;
end case;
end;
function TLB_CreateCamWrite( two_data : std_logic_vector(31 downto 0);
read : std_logic;
lvl : std_logic_vector(1 downto 0);
ctx : std_logic_vector(M_CTX_SZ-1 downto 0);
vaddr : std_logic_vector(31 downto 0)
) return tlbcam_reg is
variable tlbcam_tagwrite : tlbcam_reg;
begin
tlbcam_tagwrite.ET := two_data(PT_ET_U downto PT_ET_D);
tlbcam_tagwrite.ACC := two_data(PTE_ACC_U downto PTE_ACC_D);
tlbcam_tagwrite.M := two_data(PTE_M) or (not read); -- tw : p-update modified
tlbcam_tagwrite.R := '1';
case tlbcam_tagwrite.ACC is -- tw : p-su ACC >= 6
when "110" | "111" => tlbcam_tagwrite.SU := '1';
when others => tlbcam_tagwrite.SU := '0';
end case;
tlbcam_tagwrite.VALID := '1';
tlbcam_tagwrite.LVL := lvl;
tlbcam_tagwrite.I1 := vaddr(VA_I1_U downto VA_I1_D);
tlbcam_tagwrite.I2 := vaddr(VA_I2_U downto VA_I2_D);
tlbcam_tagwrite.I3 := vaddr(VA_I3_U downto VA_I3_D);
tlbcam_tagwrite.CTX := ctx;
tlbcam_tagwrite.PPN := two_data(PTE_PPN_U downto PTE_PPN_D);
tlbcam_tagwrite.C := two_data(PTE_C);
return tlbcam_tagwrite;
end;
function MMU_getpagesize( mmupgsz : in integer range 0 to 4;
mmctrl : in mmctrl_type1
) return mmu_gpsz_typ is
variable pagesize : mmu_gpsz_typ;
begin
if mmupgsz = 4 then pagesize := conv_integer(mmctrl.pagesize); -- variable
else pagesize := mmupgsz; end if;
return pagesize;
end;
function TLB_CreateCamTrans( vaddr : std_logic_vector(31 downto 0);
read : std_logic;
ctx : std_logic_vector(M_CTX_SZ-1 downto 0)
) return tlbcam_tfp is
variable mtag : tlbcam_tfp;
begin
mtag.TYP := (others => '0');
mtag.I1 := vaddr(VA_I1_U downto VA_I1_D);
mtag.I2 := vaddr(VA_I2_U downto VA_I2_D);
mtag.I3 := vaddr(VA_I3_U downto VA_I3_D);
mtag.CTX := ctx;
mtag.M := not (read);
return mtag;
end;
function TLB_CreateCamFlush( data : std_logic_vector(31 downto 0);
ctx : std_logic_vector(M_CTX_SZ-1 downto 0)
) return tlbcam_tfp is
variable ftag : tlbcam_tfp;
begin
ftag.TYP := data(FPTY_U downto FPTY_D);
ftag.I1 := data(FPA_I1_U downto FPA_I1_D);
ftag.I2 := data(FPA_I2_U downto FPA_I2_D);
ftag.I3 := data(FPA_I3_U downto FPA_I3_D);
ftag.CTX := ctx;
ftag.M := '0';
return ftag;
end;
end;
|
gpl-3.0
|
EliasLuiz/TCC
|
Leon3/lib/gaisler/greth/grethm_mb.vhd
|
1
|
7138
|
------------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2003 - 2008, Gaisler Research
-- Copyright (C) 2008 - 2014, Aeroflex Gaisler
-- Copyright (C) 2015 - 2016, Cobham Gaisler
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-----------------------------------------------------------------------------
-- Entity: grethm_mb
-- File: grethm_mb.vhd
-- Author: Andrea Gianarro
-- Description: Module to select between greth_mb and greth_gbit_mb
------------------------------------------------------------------------------
library ieee;
library grlib;
library gaisler;
use ieee.std_logic_1164.all;
use grlib.stdlib.all;
use grlib.amba.all;
library techmap;
use techmap.gencomp.all;
use gaisler.net.all;
entity grethm_mb is
generic(
hindex : integer := 0;
ehindex : integer := 0;
pindex : integer := 0;
paddr : integer := 0;
pmask : integer := 16#FFF#;
pirq : integer := 0;
memtech : integer := 0;
ifg_gap : integer := 24;
attempt_limit : integer := 16;
backoff_limit : integer := 10;
slot_time : integer := 128;
mdcscaler : integer range 0 to 255 := 25;
enable_mdio : integer range 0 to 1 := 0;
fifosize : integer range 4 to 64 := 8;
nsync : integer range 1 to 2 := 2;
edcl : integer range 0 to 3 := 0;
edclbufsz : integer range 1 to 64 := 1;
burstlength : integer range 4 to 128 := 32;
macaddrh : integer := 16#00005E#;
macaddrl : integer := 16#000000#;
ipaddrh : integer := 16#c0a8#;
ipaddrl : integer := 16#0035#;
phyrstadr : integer range 0 to 32 := 0;
rmii : integer range 0 to 1 := 0;
sim : integer range 0 to 1 := 0;
giga : integer range 0 to 1 := 0;
oepol : integer range 0 to 1 := 0;
scanen : integer range 0 to 1 := 0;
ft : integer range 0 to 2 := 0;
edclft : integer range 0 to 2 := 0;
mdint_pol : integer range 0 to 1 := 0;
enable_mdint : integer range 0 to 1 := 0;
multicast : integer range 0 to 1 := 0;
edclsepahb : integer range 0 to 1 := 0;
ramdebug : integer range 0 to 2 := 0;
mdiohold : integer := 1;
maxsize : integer := 1500;
gmiimode : integer range 0 to 1 := 0
);
port(
rst : in std_ulogic;
clk : in std_ulogic;
ahbmi : in ahb_mst_in_type;
ahbmo : out ahb_mst_out_type;
ahbmi2 : in ahb_mst_in_type;
ahbmo2 : out ahb_mst_out_type;
apbi : in apb_slv_in_type;
apbo : out apb_slv_out_type;
ethi : in eth_in_type;
etho : out eth_out_type
);
end entity;
architecture rtl of grethm_mb is
begin
m100 : if giga = 0 generate
u0 : greth_mb
generic map (
hindex => hindex,
ehindex => ehindex,
pindex => pindex,
paddr => paddr,
pmask => pmask,
pirq => pirq,
memtech => memtech,
ifg_gap => ifg_gap,
attempt_limit => attempt_limit,
backoff_limit => backoff_limit,
slot_time => slot_time,
mdcscaler => mdcscaler,
enable_mdio => enable_mdio,
fifosize => fifosize,
nsync => nsync,
edcl => edcl,
edclbufsz => edclbufsz,
macaddrh => macaddrh,
macaddrl => macaddrl,
ipaddrh => ipaddrh,
ipaddrl => ipaddrl,
phyrstadr => phyrstadr,
rmii => rmii,
oepol => oepol,
scanen => scanen,
ft => ft,
edclft => edclft,
mdint_pol => mdint_pol,
enable_mdint => enable_mdint,
multicast => multicast,
edclsepahb => edclsepahb,
ramdebug => ramdebug,
mdiohold => mdiohold,
maxsize => maxsize,
gmiimode => gmiimode
)
port map (
rst => rst,
clk => clk,
ahbmi => ahbmi,
ahbmo => ahbmo,
ahbmi2 => ahbmi2,
ahbmo2 => ahbmo2,
apbi => apbi,
apbo => apbo,
ethi => ethi,
etho => etho);
end generate;
m1000 : if giga = 1 generate
u0 : greth_gbit_mb
generic map (
hindex => hindex,
ehindex => ehindex,
pindex => pindex,
paddr => paddr,
pmask => pmask,
pirq => pirq,
memtech => memtech,
ifg_gap => ifg_gap,
attempt_limit => attempt_limit,
backoff_limit => backoff_limit,
slot_time => slot_time,
mdcscaler => mdcscaler,
nsync => nsync,
edcl => edcl,
edclbufsz => edclbufsz,
burstlength => burstlength,
macaddrh => macaddrh,
macaddrl => macaddrl,
ipaddrh => ipaddrh,
ipaddrl => ipaddrl,
phyrstadr => phyrstadr,
sim => sim,
oepol => oepol,
scanen => scanen,
ft => ft,
edclft => edclft,
mdint_pol => mdint_pol,
enable_mdint => enable_mdint,
multicast => multicast,
edclsepahb => edclsepahb,
ramdebug => ramdebug,
mdiohold => mdiohold,
gmiimode => gmiimode
)
port map (
rst => rst,
clk => clk,
ahbmi => ahbmi,
ahbmo => ahbmo,
ahbmi2 => ahbmi2,
ahbmo2 => ahbmo2,
apbi => apbi,
apbo => apbo,
ethi => ethi,
etho => etho,
mdchain_ui => greth_mdiochain_down_first,
mdchain_uo => open,
mdchain_di => open,
mdchain_do => greth_mdiochain_up_last);
end generate;
end architecture;
|
gpl-3.0
|
EliasLuiz/TCC
|
Leon3/lib/gaisler/ddr/ddr2spa.vhd
|
1
|
9451
|
------------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2003 - 2008, Gaisler Research
-- Copyright (C) 2008 - 2014, Aeroflex Gaisler
-- Copyright (C) 2015 - 2016, Cobham Gaisler
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-----------------------------------------------------------------------------
-- Entity: ddr2spa
-- File: ddr2spa.vhd
-- Author: Nils-Johan Wessman - Gaisler Research
-- Description: 16-, 32- or 64-bit DDR2 memory controller module.
------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
library grlib;
use grlib.amba.all;
use grlib.stdlib.all;
library gaisler;
use grlib.devices.all;
use gaisler.ddrpkg.all;
library techmap;
use techmap.gencomp.all;
entity ddr2spa is
generic (
fabtech : integer := virtex4;
memtech : integer := 0;
rskew : integer := 0;
hindex : integer := 0;
haddr : integer := 0;
hmask : integer := 16#f00#;
ioaddr : integer := 16#000#;
iomask : integer := 16#fff#;
MHz : integer := 100;
TRFC : integer := 130;
clkmul : integer := 2;
clkdiv : integer := 2;
col : integer := 9;
Mbyte : integer := 16;
rstdel : integer := 200;
pwron : integer := 0;
oepol : integer := 0;
ddrbits : integer := 16;
ahbfreq : integer := 50;
readdly : integer := 1; -- 1 added read latency cycle
ddelayb0 : integer := 0; -- Data delay value (0 - 63)
ddelayb1 : integer := 0; -- Data delay value (0 - 63)
ddelayb2 : integer := 0; -- Data delay value (0 - 63)
ddelayb3 : integer := 0; -- Data delay value (0 - 63)
ddelayb4 : integer := 0; -- Data delay value (0 - 63)
ddelayb5 : integer := 0; -- Data delay value (0 - 63)
ddelayb6 : integer := 0; -- Data delay value (0 - 63)
ddelayb7 : integer := 0; -- Data delay value (0 - 63)
cbdelayb0 : integer := 0; -- Data delay value (0 - 63)
cbdelayb1 : integer := 0; -- Data delay value (0 - 63)
cbdelayb2 : integer := 0; -- Data delay value (0 - 63)
cbdelayb3 : integer := 0; -- Data delay value (0 - 63)
numidelctrl : integer := 4;
norefclk : integer := 0;
odten : integer := 0;
octen : integer := 0;
dqsgating : integer := 0;
nosync : integer := 0; -- Disable sync registers at CD crossings
eightbanks : integer range 0 to 1 := 0;
dqsse : integer range 0 to 1 := 0; -- single ended DQS
burstlen : integer range 4 to 128 := 8;
ahbbits : integer := ahbdw;
ft : integer range 0 to 1 := 0;
ftbits : integer := 0;
bigmem : integer range 0 to 1 := 0;
raspipe : integer range 0 to 1 := 0;
nclk : integer range 1 to 3 := 3;
scantest : integer := 0;
ncs : integer := 2;
cke_rst : integer := 0;
pipe_ctrl : integer := 0
);
port (
rst_ddr : in std_ulogic;
rst_ahb : in std_ulogic;
clk_ddr : in std_ulogic;
clk_ahb : in std_ulogic;
clkref200 : in std_logic;
lock : out std_ulogic; -- DCM locked
clkddro : out std_ulogic; -- DDR clock
clkddri : in std_ulogic;
ahbsi : in ahb_slv_in_type;
ahbso : out ahb_slv_out_type;
ddr_clk : out std_logic_vector(nclk-1 downto 0);
ddr_clkb : out std_logic_vector(nclk-1 downto 0);
ddr_clk_fb_out : out std_logic;
ddr_clk_fb : in std_logic;
ddr_cke : out std_logic_vector(1 downto 0);
ddr_csb : out std_logic_vector(1 downto 0);
ddr_web : out std_ulogic; -- ddr write enable
ddr_rasb : out std_ulogic; -- ddr ras
ddr_casb : out std_ulogic; -- ddr cas
ddr_dm : out std_logic_vector((ddrbits+ftbits)/8-1 downto 0); -- ddr dm
ddr_dqs : inout std_logic_vector((ddrbits+ftbits)/8-1 downto 0); -- ddr dqs
ddr_dqsn : inout std_logic_vector((ddrbits+ftbits)/8-1 downto 0); -- ddr dqsn
ddr_ad : out std_logic_vector(13 downto 0); -- ddr address
ddr_ba : out std_logic_vector(1+eightbanks downto 0); -- ddr bank address
ddr_dq : inout std_logic_vector((ddrbits+ftbits)-1 downto 0); -- ddr data
ddr_odt : out std_logic_vector(1 downto 0);
ce : out std_logic; -- Corrected error (for FT)
oct_rdn : in std_logic := '0';
oct_rup : in std_logic := '0'
);
end;
architecture rtl of ddr2spa is
constant DDR_FREQ : integer := (clkmul * MHz) / clkdiv;
signal sdi : ddrctrl_in_type;
signal sdo : ddrctrl_out_type;
--signal clkread : std_ulogic;
-- Reset scheme:
-- 1. rst_ddr inport is a raw async reset brought in from the outside - goes to PHY/PLL:s
-- 2. lock signal from PHY/PLLs goes out through lock outport to external
-- ahb rstgen and internal ddr reset gen
-- 3. AMBA synchronous reset signal rst_ahb comes back in
-- DDR Clock scheme:
-- 1. clk_ddr (and clkref200) goes into PHY
-- 2. clkddro comes out from PHY and goes out through clkddro port
-- 3. clkddri comes back in and is used to clock DDR-side logic
signal ilock: std_ulogic;
signal ddr_rst: std_logic;
signal ddr_rst_gen: std_logic_vector(3 downto 0);
constant ddr_syncrst: integer := 0;
begin
lock <= ilock;
ddr_rst <= (ddr_rst_gen(3) and ddr_rst_gen(2) and ddr_rst_gen(1)); -- Reset signal in DDR clock domain
ddrrstproc: process(clkddri, ilock)
begin
if rising_edge(clkddri) then
ddr_rst_gen <= ddr_rst_gen(2 downto 0) & '1';
if ddr_syncrst /= 0 and rst_ahb='0' then
ddr_rst_gen <= "0000";
end if;
end if;
if ddr_syncrst=0 and ilock='0' then
ddr_rst_gen <= "0000";
end if;
end process;
nftphy: if true generate
ddr_phy0 : ddr2phy_wrap_cbd
generic map (
tech => fabtech, MHz => MHz,
dbits => ddrbits, rstdelay => 0, clk_mul => clkmul,
clk_div => clkdiv,
ddelayb0 => ddelayb0, ddelayb1 => ddelayb1, ddelayb2 => ddelayb2,
ddelayb3 => ddelayb3, ddelayb4 => ddelayb4, ddelayb5 => ddelayb5,
ddelayb6 => ddelayb6, ddelayb7 => ddelayb7, cbdelayb0=> cbdelayb0,
cbdelayb1=> cbdelayb1, cbdelayb2=> cbdelayb2,cbdelayb3=> cbdelayb3,
numidelctrl => numidelctrl, norefclk => norefclk, rskew => rskew,
eightbanks => eightbanks, dqsse => dqsse,
chkbits => ftbits*ft, padbits => ftbits*(1-ft),
ctrl2en => 0, resync => 0, custombits => 8,
nclk => nclk, scantest => scantest, ncs => ncs )
port map (
rst_ddr, clk_ddr, clkref200, clkddro, clkddri, clkddri, ilock,
ddr_clk, ddr_clkb, ddr_clk_fb_out, ddr_clk_fb,
ddr_cke(ncs-1 downto 0), ddr_csb(ncs-1 downto 0), ddr_web, ddr_rasb, ddr_casb,
ddr_dm, ddr_dqs, ddr_dqsn,
ddr_ad, ddr_ba, ddr_dq, ddr_odt(ncs-1 downto 0),
open, open, open, open, open,
sdi, sdo, clkddri, "00000000", open,
ahbsi.testen, ahbsi.scanen, ahbsi.testrst, ahbsi.testoen,
oct_rdn, oct_rup);
ncs1: if ncs = 1 generate
ddr_cke(1) <= '0';
ddr_csb(1) <= '0';
ddr_odt(1) <= '0';
end generate;
end generate;
ddrc : ddr2spax generic map (memtech => memtech, phytech => fabtech, hindex => hindex,
haddr => haddr, hmask => hmask, ioaddr => ioaddr, iomask => iomask, ddrbits => ddrbits,
pwron => pwron, MHz => DDR_FREQ, TRFC => TRFC, col => col, Mbyte => Mbyte,
readdly => readdly, odten => odten, octen => octen, dqsgating => dqsgating,
nosync => nosync, eightbanks => eightbanks, dqsse => dqsse, burstlen => burstlen, ahbbits => ahbbits,
ft => ft, ddr_syncrst => ddr_syncrst, bigmem => bigmem, raspipe => raspipe, hwidthen => 0, rstdel => rstdel,
cke_rst => cke_rst, pipe_ctrl => pipe_ctrl)
port map (ddr_rst, rst_ahb, clkddri, clk_ahb, ahbsi, ahbso, sdi, sdo, '0');
ce <= sdo.ce;
end;
|
gpl-3.0
|
EliasLuiz/TCC
|
Leon3/designs/leon3-minimal/leon3mp.vhd
|
1
|
10495
|
------------------------------------------------------------------------------
-- LEON3 Demonstration design
-- Copyright (C) 2013 Aeroflex Gaisler
------------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2003 - 2008, Gaisler Research
-- Copyright (C) 2008 - 2014, Aeroflex Gaisler
-- Copyright (C) 2015 - 2016, Cobham Gaisler
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
library grlib;
use grlib.amba.all;
use grlib.stdlib.all;
use grlib.devices.all;
library techmap;
use techmap.gencomp.all;
use techmap.allclkgen.all;
library gaisler;
use gaisler.memctrl.all;
use gaisler.leon3.all;
use gaisler.uart.all;
use gaisler.misc.all;
use gaisler.jtag.all;
--pragma translate_off
use gaisler.sim.all;
--pragma translate_on
library esa;
use esa.memoryctrl.all;
use work.config.all;
entity leon3mp is
generic (
fabtech : integer := CFG_FABTECH;
memtech : integer := CFG_MEMTECH;
padtech : integer := CFG_PADTECH;
clktech : integer := CFG_CLKTECH
);
port (
clk : in std_ulogic; -- FPGA main clock input
-- Buttons & LEDs
btnCpuResetn : in std_ulogic; -- Reset button
Led : out std_logic_vector(15 downto 0);
-- Onboard Cellular RAM
RamOE : out std_ulogic;
RamWE : out std_ulogic;
RamAdv : out std_ulogic;
RamCE : out std_ulogic;
RamClk : out std_ulogic;
RamCRE : out std_ulogic;
RamLB : out std_ulogic;
RamUB : out std_ulogic;
address : out std_logic_vector(22 downto 0);
data : inout std_logic_vector(15 downto 0);
-- USB-RS232 interface
RsRx : in std_logic;
RsTx : out std_logic
);
end;
architecture rtl of leon3mp is
signal vcc : std_logic;
signal gnd : std_logic;
-- Memory controler signals
signal memi : memory_in_type;
signal memo : memory_out_type;
signal wpo : wprot_out_type;
-- AMBA bus signals
signal apbi : apb_slv_in_type;
signal apbo : apb_slv_out_vector := (others => apb_none);
signal ahbsi : ahb_slv_in_type;
signal ahbso : ahb_slv_out_vector := (others => ahbs_none);
signal ahbmi : ahb_mst_in_type;
signal ahbmo : ahb_mst_out_vector := (others => ahbm_none);
signal cgi : clkgen_in_type;
signal cgo : clkgen_out_type;
signal u1i, dui : uart_in_type;
signal u1o, duo : uart_out_type;
signal irqi : irq_in_vector(0 to 0);
signal irqo : irq_out_vector(0 to 0);
signal dbgi : l3_debug_in_vector(0 to 0);
signal dbgo : l3_debug_out_vector(0 to 0);
signal dsui : dsu_in_type;
signal dsuo : dsu_out_type;
signal ndsuact : std_ulogic;
signal gpti : gptimer_in_type;
signal clkm, rstn : std_ulogic;
signal tck, tms, tdi, tdo : std_ulogic;
signal rstraw : std_logic;
signal lock : std_logic;
-- RS232 APB Uart (unconnected)
signal rxd1 : std_logic;
signal txd1 : std_logic;
attribute keep : boolean;
attribute keep of lock : signal is true;
attribute keep of clkm : signal is true;
constant clock_mult : integer := 10; -- Clock multiplier
constant clock_div : integer := 20; -- Clock divider
constant BOARD_FREQ : integer := 100000; -- CLK input frequency in KHz
constant CPU_FREQ : integer := BOARD_FREQ * clock_mult / clock_div; -- CPU freq in KHz
begin
----------------------------------------------------------------------
--- Reset and Clock generation -------------------------------------
----------------------------------------------------------------------
vcc <= '1';
gnd <= '0';
cgi.pllctrl <= "00";
cgi.pllrst <= rstraw;
rst0 : rstgen generic map (acthigh => 0)
port map (btnCpuResetn, clkm, lock, rstn, rstraw);
lock <= cgo.clklock;
-- clock generator
clkgen0 : clkgen
generic map (fabtech, clock_mult, clock_div, 0, 0, 0, 0, 0, BOARD_FREQ, 0)
port map (clk, gnd, clkm, open, open, open, open, cgi, cgo, open, open, open);
----------------------------------------------------------------------
--- AHB CONTROLLER --------------------------------------------------
----------------------------------------------------------------------
ahb0 : ahbctrl
generic map (ioen => 1, nahbm => 4, nahbs => 8)
port map (rstn, clkm, ahbmi, ahbmo, ahbsi, ahbso);
----------------------------------------------------------------------
--- LEON3 processor and DSU -----------------------------------------
----------------------------------------------------------------------
-- LEON3 processor
u0 : leon3s
generic map (hindex=>0, fabtech=>fabtech, memtech=>memtech, dsu=>1, fpu=>0, v8=>2,
mac=>0, isetsize=>8, dsetsize=>8,icen=>1, dcen=>1,tbuf=>2)
port map (clkm, rstn, ahbmi, ahbmo(0), ahbsi, ahbso, irqi(0), irqo(0), dbgi(0), dbgo(0));
-- LEON3 Debug Support Unit
dsu0 : dsu3
generic map (hindex => 2, ncpu => 1, tech => memtech, irq => 0, kbytes => 2)
port map (rstn, clkm, ahbmi, ahbsi, ahbso(2), dbgo, dbgi, dsui, dsuo);
dsui.enable <= '1';
-- Debug UART
dcom0 : ahbuart
generic map (hindex => 1, pindex => 4, paddr => 7)
port map (rstn, clkm, dui, duo, apbi, apbo(4), ahbmi, ahbmo(1));
dsurx_pad : inpad generic map (tech => padtech) port map (RsRx, dui.rxd);
dsutx_pad : outpad generic map (tech => padtech) port map (RsTx, duo.txd);
led(0) <= not dui.rxd;
led(1) <= not duo.txd;
ahbjtag0 : ahbjtag generic map(tech => fabtech, hindex => 3)
port map(rstn, clkm, tck, tms, tdi, tdo, ahbmi, ahbmo(3),
open, open, open, open, open, open, open, gnd);
----------------------------------------------------------------------
--- Memory controllers ----------------------------------------------
----------------------------------------------------------------------
-- LEON2 memory controller
sr1 : mctrl generic map (hindex => 5, pindex => 0, paddr => 0, rommask => 0,
iomask => 0, ram8 => 0, ram16 => 1,srbanks=>1)
port map (rstn, clkm, memi, memo, ahbsi, ahbso(5), apbi, apbo(0), wpo, open);
memi.brdyn <= '1';
memi.bexcn <= '1';
memi.writen <= '1';
memi.wrn <= "1111";
memi.bwidth <= "01"; -- Sets data bus width for PROM accesses.
-- Bidirectional data bus
bdr : iopadv generic map (tech => padtech, width => 8)
port map (data(7 downto 0), memo.data(23 downto 16),
memo.bdrive(1), memi.data(23 downto 16));
bdr2 : iopadv generic map (tech => padtech, width => 8)
port map (data(15 downto 8), memo.data(31 downto 24),
memo.bdrive(0), memi.data(31 downto 24));
-- Out signals to memory
addr_pad : outpadv generic map (tech => padtech, width => 23) -- Address bus
port map (address, memo.address(23 downto 1));
oen_pad : outpad generic map (tech => padtech) -- Output Enable
port map (RamOE, memo.oen);
cs_pad : outpad generic map (tech => padtech) -- SRAM Chip select
port map (RamCE, memo.ramsn(0));
lb_pad : outpad generic map (tech => padtech)
port map (RamLB, memo.mben(0));
ub_pad : outpad generic map (tech => padtech)
port map (RamUB, memo.mben(1));
wri_pad : outpad generic map (tech => padtech) -- Write enable
port map (RamWE, memo.writen);
RamCRE <= '0'; -- Special SRAM signals specific
RamClk <= '0'; -- to Nexys4 board
RamAdv <= '0';
-----------------------------------------------------------------------
--- AHB ROM ----------------------------------------------------------
-----------------------------------------------------------------------
brom : entity work.ahbrom
generic map (hindex => 6, haddr => CFG_AHBRODDR, pipe => CFG_AHBROPIP)
port map ( rstn, clkm, ahbsi, ahbso(6));
----------------------------------------------------------------------
--- APB Bridge and various periherals -------------------------------
----------------------------------------------------------------------
apb0 : apbctrl -- APB Bridge
generic map (hindex => 1, haddr => 16#800#)
port map (rstn, clkm, ahbsi, ahbso(1), apbi, apbo);
irqctrl0 : irqmp -- Interrupt controller
generic map (pindex => 2, paddr => 2, ncpu => 1)
port map (rstn, clkm, apbi, apbo(2), irqo, irqi);
timer0 : gptimer -- Time Unit
generic map (pindex => 3, paddr => 3, pirq => 8,
sepirq => 1, ntimers => 2)
port map (rstn, clkm, apbi, apbo(3), gpti, open);
gpti <= gpti_dhalt_drive(dsuo.tstop);
uart1 : apbuart -- UART 1
generic map (pindex => 1, paddr => 1, pirq => 2, console => 1)
port map (rstn, clkm, apbi, apbo(1), u1i, u1o);
u1i.rxd <= rxd1;
u1i.ctsn <= '0';
u1i.extclk <= '0';
txd1 <= u1o.txd;
-----------------------------------------------------------------------
-- Test report module, only used for simulation ----------------------
-----------------------------------------------------------------------
--pragma translate_off
test0 : ahbrep generic map (hindex => 4, haddr => 16#200#)
port map (rstn, clkm, ahbsi, ahbso(4));
--pragma translate_on
-----------------------------------------------------------------------
--- Boot message ----------------------------------------------------
-----------------------------------------------------------------------
-- pragma translate_off
x : report_design
generic map (
msg1 => "LEON3 Demonstration design",
fabtech => tech_table(fabtech), memtech => tech_table(memtech),
mdel => 1
);
-- pragma translate_on
end rtl;
|
gpl-3.0
|
EliasLuiz/TCC
|
Leon3/lib/gaisler/greth/adapters/gmii_to_mii.vhd
|
1
|
8943
|
------------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2003 - 2008, Gaisler Research
-- Copyright (C) 2008 - 2014, Aeroflex Gaisler
-- Copyright (C) 2015 - 2016, Cobham Gaisler
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-----------------------------------------------------------------------------
-- Entity: gmii_to_mii
-- File: gmii_to_mii.vhd
-- Author: Andrea Gianarro - Aeroflex Gaisler AB
-- Description: GMII to MII Ethernet bridge
------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
library gaisler;
use gaisler.net.all;
library grlib;
use grlib.stdlib.all;
use grlib.config_types.all;
use grlib.config.all;
entity gmii_to_mii is
port (
tx_rstn : in std_logic;
rx_rstn : in std_logic;
-- MAC SIDE
gmiii : out eth_in_type;
gmiio : in eth_out_type;
-- PHY SIDE
miii : in eth_in_type;
miio : out eth_out_type
) ;
end entity ; -- gmii_to_mii
architecture rtl of gmii_to_mii is
constant RESET_ALL : boolean := GRLIB_CONFIG_ARRAY(grlib_sync_reset_enable_all) /= 0;
type sgmii_10_100_state_type is (idle, running);
type sgmii_10_100_rx_type is record
state : sgmii_10_100_state_type;
count : integer;
rxd : std_logic_vector(7 downto 0);
rx_dv : std_logic;
rx_en : std_logic;
rx_er : std_logic;
end record;
type sgmii_10_100_tx_type is record
state : sgmii_10_100_state_type;
count : integer;
txd_part : std_logic_vector(3 downto 0);
txd : std_logic_vector(7 downto 0);
tx_dv : std_logic;
tx_er : std_logic;
tx_er_part : std_logic;
tx_en : std_logic;
end record;
constant RES_RX : sgmii_10_100_rx_type := (
state => idle,
count => 0,
rxd => (others => '0'),
rx_dv => '0',
rx_en => '0',
rx_er => '0'
);
constant RES_TX : sgmii_10_100_tx_type := (
state => idle,
count => 0,
txd_part => (others => '0'),
txd => (others => '0'),
tx_dv => '0',
tx_er => '0',
tx_er_part => '0',
tx_en => '0'
);
signal r_rx, rin_rx : sgmii_10_100_rx_type;
signal r_tx, rin_tx : sgmii_10_100_tx_type;
signal rx_dv_int, rx_er_int, rx_col_int, rx_crs_int, tx_en_int, tx_er_int, tx_dv_int, rx_en_int : std_logic;
signal rxd_int, txd_int : std_logic_vector(7 downto 0);
begin
tx_10_100 : process(tx_rstn, r_tx, gmiio)
variable v_tx : sgmii_10_100_tx_type;
begin
v_tx := r_tx;
v_tx.tx_dv := '0';
tx_dv_int <= '1';
case r_tx.state is
when idle =>
if gmiio.tx_en = '1' and gmiio.gbit = '0' then
v_tx.state := running;
v_tx.count := 0;
tx_dv_int <= '0';
end if;
when running =>
-- increment counter for 10/100 sampling
if (r_tx.count >= 9 and gmiio.speed = '1') or (r_tx.count >= 99 and gmiio.speed = '0') then
v_tx.count := 0;
else
v_tx.count := r_tx.count + 1;
end if;
-- sample appropriately according to 10/100 settings
case r_tx.count is
when 0 =>
v_tx.txd_part := gmiio.txd(3 downto 0);
v_tx.tx_er_part := gmiio.tx_er;
v_tx.tx_dv := gmiio.tx_en;
when 5 =>
if gmiio.speed = '1' then
v_tx.txd := gmiio.txd(3 downto 0) & r_tx.txd_part;
v_tx.tx_er := r_tx.tx_er_part or gmiio.tx_er;
v_tx.tx_dv := gmiio.tx_en;
v_tx.tx_en := gmiio.tx_en;
-- exit condition
if gmiio.tx_en = '0' then
v_tx.state := idle;
v_tx.tx_en := '0';
end if;
end if;
when 50 =>
if gmiio.speed = '0' then
v_tx.txd := gmiio.txd(3 downto 0) & r_tx.txd_part;
v_tx.tx_er := r_tx.tx_er_part or gmiio.tx_er;
v_tx.tx_dv := gmiio.tx_en;
v_tx.tx_en := gmiio.tx_en;
-- exit condition
if gmiio.tx_en = '0' then
v_tx.state := idle;
v_tx.tx_en := '0';
end if;
end if;
when others =>
end case ;
tx_dv_int <= r_tx.tx_dv;
when others =>
end case ;
-- reset operation
if (not RESET_ALL) and (tx_rstn = '0') then
v_tx := RES_TX;
end if;
rin_tx <= v_tx;
end process ;
tx_regs : process(miii.gtx_clk, tx_rstn)
begin
if rising_edge(miii.gtx_clk) then
r_tx <= rin_tx;
if RESET_ALL and tx_rstn = '0' then
r_tx <= RES_TX;
end if;
end if;
end process;
miio.reset <= gmiio.reset;
miio.txd <= gmiio.txd when gmiio.gbit = '1' else r_tx.txd;
miio.tx_en <= gmiio.tx_en when gmiio.gbit = '1' else r_tx.tx_en;
miio.tx_er <= gmiio.tx_er when gmiio.gbit = '1' else r_tx.tx_er;
miio.tx_clk <= gmiio.tx_clk;
miio.mdc <= gmiio.mdc;
miio.mdio_o <= gmiio.mdio_o;
miio.mdio_oe <= gmiio.mdio_oe;
miio.gbit <= gmiio.gbit;
miio.speed <= gmiio.speed;
process (rx_rstn, r_rx, miii, gmiio)
variable v_rx : sgmii_10_100_rx_type;
begin
v_rx := r_rx;
v_rx.rx_en := '0';
rx_en_int <= '1';
case r_rx.state is
when idle =>
if miii.rx_dv = '1' and gmiio.gbit = '0' then
v_rx.state := running;
v_rx.count := 0;
rx_en_int <= '0';
end if;
when running =>
-- increment counter for 10/100 sampling
if (r_rx.count >= 9 and gmiio.speed = '1') or (r_rx.count >= 99 and gmiio.speed = '0') then
v_rx.count := 0;
else
v_rx.count := r_rx.count + 1;
end if;
-- sample appropriately according to 10/100 settings
case r_rx.count is
when 0 =>
v_rx.rxd := miii.rxd(3 downto 0) & miii.rxd(3 downto 0);
v_rx.rx_en := miii.rx_dv;
v_rx.rx_dv := miii.rx_dv;
v_rx.rx_er := miii.rx_er;
-- exit condition
if miii.rx_dv = '0' then
v_rx.state := idle;
v_rx.rx_dv := '0';
end if;
when 5 =>
if gmiio.speed = '1' then
v_rx.rxd := miii.rxd(7 downto 4) & miii.rxd(7 downto 4);
v_rx.rx_en := '1';
end if;
when 50 =>
if gmiio.speed = '0' then
v_rx.rxd := miii.rxd(7 downto 4) & miii.rxd(7 downto 4);
v_rx.rx_en := '1';
end if;
when others =>
end case ;
rx_en_int <= r_rx.rx_en;
when others =>
end case ;
-- reset operation
if (not RESET_ALL) and (rx_rstn = '0') then
v_rx := RES_RX;
end if;
-- update registers
rin_rx <= v_rx;
end process;
rx_regs : process(miii.rx_clk, rx_rstn)
begin
if rising_edge(miii.rx_clk) then
r_rx <= rin_rx;
if RESET_ALL and rx_rstn = '0' then
r_rx <= RES_RX;
end if;
end if;
end process;
---- RX Mux Select
gmiii.gtx_clk <= miii.gtx_clk;
gmiii.rmii_clk <= miii.rmii_clk;
gmiii.tx_clk <= miii.tx_clk;
gmiii.tx_clk_90 <= miii.tx_clk_90;
gmiii.tx_dv <= '1' when gmiio.gbit = '1' else tx_dv_int;
gmiii.rx_clk <= miii.rx_clk;
gmiii.rxd <= miii.rxd when gmiio.gbit = '1' else r_rx.rxd;
gmiii.rx_dv <= miii.rx_dv when gmiio.gbit = '1' else r_rx.rx_dv;
gmiii.rx_er <= miii.rx_er when gmiio.gbit = '1' else r_rx.rx_er;
gmiii.rx_en <= '1' when gmiio.gbit = '1' else rx_en_int;
gmiii.rx_col <= miii.rx_col when gmiio.gbit = '1' else r_rx.rx_dv and gmiio.tx_en; -- possible clock cross domain problem
gmiii.rx_crs <= miii.rx_crs when gmiio.gbit = '1' else r_rx.rx_dv or gmiio.tx_en;
gmiii.mdio_i <= miii.mdio_i;
gmiii.mdint <= miii.mdint;
gmiii.phyrstaddr <= miii.phyrstaddr;
gmiii.edcladdr <= miii.edcladdr;
gmiii.edclsepahb <= miii.edclsepahb;
gmiii.edcldisable <= miii.edcldisable;
end architecture;
|
gpl-3.0
|
EliasLuiz/TCC
|
Leon3/lib/gaisler/sim/ser_phy.vhd
|
1
|
5790
|
------------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2003 - 2008, Gaisler Research
-- Copyright (C) 2008 - 2014, Aeroflex Gaisler
-- Copyright (C) 2015 - 2016, Cobham Gaisler
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
----------------------------------------------------------------------------
-- Entity: ser_phy
-- File: ser_phy.vhd
-- Description: Serial wrapper for simulation model of an Ethernet PHY
-- Author: Andrea Gianarro
------------------------------------------------------------------------------
-- pragma translate_off
library ieee;
library grlib;
library gaisler;
use ieee.std_logic_1164.all;
use grlib.stdlib.all;
use gaisler.net.all;
use gaisler.sim.all;
library techmap;
use techmap.gencomp.all;
entity ser_phy is
generic(
address : integer range 0 to 31 := 0;
extended_regs : integer range 0 to 1 := 1;
aneg : integer range 0 to 1 := 1;
base100_t4 : integer range 0 to 1 := 0;
base100_x_fd : integer range 0 to 1 := 1;
base100_x_hd : integer range 0 to 1 := 1;
fd_10 : integer range 0 to 1 := 1;
hd_10 : integer range 0 to 1 := 1;
base100_t2_fd : integer range 0 to 1 := 1;
base100_t2_hd : integer range 0 to 1 := 1;
base1000_x_fd : integer range 0 to 1 := 0;
base1000_x_hd : integer range 0 to 1 := 0;
base1000_t_fd : integer range 0 to 1 := 1;
base1000_t_hd : integer range 0 to 1 := 1;
rmii : integer range 0 to 1 := 0;
rgmii : integer range 0 to 1 := 0;
fabtech : integer := 0;
memtech : integer := 0;
transtech : integer := 0
);
port(
rstn : in std_logic;
clk_125 : in std_logic;
rst_125 : in std_logic;
eth_rx_p : out std_logic;
eth_rx_n : out std_logic;
eth_tx_p : in std_logic;
eth_tx_n : in std_logic := '0';
mdio : inout std_logic;
mdc : in std_logic;
-- added for igloo2_serdes
apbin : in apb_in_serdes := apb_in_serdes_none;
apbout : out apb_out_serdes;
m2gl_padin : in pad_in_serdes := pad_in_serdes_none;
m2gl_padout : out pad_out_serdes;
serdes_clk125 : out std_logic;
rx_aligned : out std_logic
);
end;
architecture behavioral of ser_phy is
signal int_tx_rstn : std_logic;
signal int_rx_rstn : std_logic;
signal phy_ethi : eth_in_type;
signal pcs_ethi : eth_in_type;
signal phy_etho : eth_out_type;
signal pcs_etho : eth_out_type;
begin
p0: phy
generic map(
address => address,
extended_regs => extended_regs,
aneg => aneg,
fd_10 => fd_10,
hd_10 => hd_10,
base100_t4 => base100_t4,
base100_x_fd => base100_x_fd,
base100_x_hd => base100_x_hd,
base100_t2_fd => base100_t2_fd,
base100_t2_hd => base100_t2_hd,
base1000_x_fd => base1000_x_fd,
base1000_x_hd => base1000_x_hd,
base1000_t_fd => base1000_t_fd,
base1000_t_hd => base1000_t_hd,
rmii => 0,
rgmii => 0
)
port map(
rstn => rstn,
mdio => mdio,
tx_clk => open,
rx_clk => open,
rxd => phy_etho.txd,
rx_dv => phy_etho.tx_en,
rx_er => phy_etho.tx_er,
rx_col => open,
rx_crs => open,
txd => phy_ethi.rxd,
tx_en => phy_ethi.rx_dv,
tx_er => phy_ethi.rx_er,
mdc => mdc,
gtx_clk => phy_ethi.gtx_clk
);
-- GMII to MII adapter fixed to Gigabit mode (disabled)
phy_etho.gbit <= '1';
phy_etho.speed <= '0';
adapt_10_100_0: gmii_to_mii
port map (
tx_rstn => int_tx_rstn,
rx_rstn => int_rx_rstn,
gmiii => phy_ethi, -- OUT
gmiio => phy_etho, -- IN
miii => pcs_ethi, -- IN
miio => pcs_etho -- OUT
);
pcs0: sgmii
generic map (
fabtech => fabtech,
memtech => memtech,
transtech => transtech
)
port map(
clk_125 => clk_125,
rst_125 => rst_125,
ser_rx_p => eth_tx_p,
ser_rx_n => eth_tx_n,
ser_tx_p => eth_rx_p,
ser_tx_n => eth_rx_n,
txd => pcs_etho.txd,
tx_en => pcs_etho.tx_en,
tx_er => pcs_etho.tx_er,
tx_clk => pcs_ethi.gtx_clk,
tx_rstn => int_tx_rstn,
rxd => pcs_ethi.rxd,
rx_dv => pcs_ethi.rx_dv,
rx_er => pcs_ethi.rx_er,
rx_col => pcs_ethi.rx_col,
rx_crs => pcs_ethi.rx_crs,
rx_clk => pcs_ethi.rx_clk,
rx_rstn => int_rx_rstn,
mdc => mdc,
-- added for igloo2_serdes
apbin => apbin,
apbout => apbout,
m2gl_padin => m2gl_padin,
m2gl_padout => m2gl_padout,
serdes_clk125 => serdes_clk125,
rx_aligned => rx_aligned
);
end architecture;
-- pragma translate_on
|
gpl-3.0
|
EliasLuiz/TCC
|
Leon3/lib/gaisler/arith/mul32.vhd
|
1
|
15135
|
------------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2003 - 2008, Gaisler Research
-- Copyright (C) 2008 - 2014, Aeroflex Gaisler
-- Copyright (C) 2015 - 2016, Cobham Gaisler
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-----------------------------------------------------------------------------
-- Entity: mul
-- File: mul.vhd
-- Author: Jiri Gaisler - Gaisler Research
-- Description: This unit implements signed/unsigned 32-bit multiply module,
-- producing a 64-bit result.
------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
library grlib;
use grlib.config_types.all;
use grlib.config.all;
use grlib.stdlib.all;
use grlib.multlib.all;
library gaisler;
use gaisler.arith.all;
library techmap;
use techmap.gencomp.all;
entity mul32 is
generic (
tech : integer := 0;
multype : integer range 0 to 3 := 0;
pipe : integer range 0 to 1 := 0;
mac : integer range 0 to 1 := 0;
arch : integer range 0 to 3 := 0;
scantest: integer := 0
);
port (
rst : in std_ulogic;
clk : in std_ulogic;
holdn : in std_ulogic;
muli : in mul32_in_type;
mulo : out mul32_out_type;
testen : in std_ulogic := '0';
testrst : in std_ulogic := '1'
);
end;
architecture rtl of mul32 is
--attribute sync_set_reset : string;
--attribute sync_set_reset of rst : signal is "true";
constant m16x16 : integer := 0;
constant m32x8 : integer := 1;
constant m32x16 : integer := 2;
constant m32x32 : integer := 3;
constant MULTIPLIER : integer := multype;
constant MULPIPE : boolean := ((multype = 0) or (multype = 3)) and (pipe = 1);
constant MACEN : boolean := (multype = 0) and (mac = 1);
type mul_regtype is record
acc : std_logic_vector(63 downto 0);
state : std_logic_vector(1 downto 0);
start : std_logic;
ready : std_logic;
nready : std_logic;
end record;
type mac_regtype is record
mmac, xmac : std_logic;
msigned, xsigned : std_logic;
end record;
constant RESET_ALL : boolean := GRLIB_CONFIG_ARRAY(grlib_sync_reset_enable_all) = 1;
constant ASYNC_RESET : boolean := GRLIB_CONFIG_ARRAY(grlib_async_reset_enable) = 1;
constant MULRES : mul_regtype := (
acc => (others => '0'),
state => (others => '0'),
start => '0',
ready => '0',
nready => '0');
constant MACRES : mac_regtype := (
mmac => '0',
xmac => '0',
msigned => '0',
xsigned => '0');
signal arst : std_ulogic;
signal rm, rmin : mul_regtype;
signal mm, mmin : mac_regtype;
signal ma, mb : std_logic_vector(32 downto 0);
signal prod : std_logic_vector(65 downto 0);
signal mreg : std_logic_vector(49 downto 0);
signal vcc : std_logic;
begin
vcc <= '1';
arst <= testrst when (ASYNC_RESET and scantest/=0 and testen/='0') else
rst when ASYNC_RESET else
'1';
mulcomb : process(rst, rm, muli, mreg, prod, mm)
variable mop1, mop2 : std_logic_vector(32 downto 0);
variable acc, acc1, acc2 : std_logic_vector(48 downto 0);
variable zero, rsigned, rmac : std_logic;
variable v : mul_regtype;
variable w : mac_regtype;
constant CZero: std_logic_vector(47 downto 0) := "000000000000000000000000000000000000000000000000";
begin
v := rm; w := mm; v.start := muli.start; v.ready := '0'; v.nready := '0';
mop1 := muli.op1; mop2 := muli.op2;
acc1 := (others => '0'); acc2 := (others => '0'); zero := '0';
w.mmac := muli.mac; w.xmac := mm.mmac;
w.msigned := muli.signed; w.xsigned := mm.msigned;
if MULPIPE then rsigned := mm.xsigned; rmac := mm.xmac;
else rsigned := mm.msigned; rmac := mm.mmac; end if;
-- select input 2 to accumulator
case MULTIPLIER is
when m16x16 =>
acc2(32 downto 0) := mreg(32 downto 0);
when m32x8 =>
acc2(40 downto 0) := mreg(40 downto 0);
when m32x16 =>
acc2(48 downto 0) := mreg(48 downto 0);
when others => null;
end case;
-- state machine + inputs to multiplier and accumulator input 1
case rm.state is
when "00" =>
case MULTIPLIER is
when m16x16 =>
mop1(16 downto 0) := '0' & muli.op1(15 downto 0);
mop2(16 downto 0) := '0' & muli.op2(15 downto 0);
if MULPIPE and (rm.ready = '1' ) then
acc1(32 downto 0) := rm.acc(48 downto 16);
else acc1(32 downto 0) := '0' & rm.acc(63 downto 32); end if;
when m32x8 =>
mop1 := muli.op1;
mop2(8 downto 0) := '0' & muli.op2(7 downto 0);
acc1(40 downto 0) := '0' & rm.acc(63 downto 24);
when m32x16 =>
mop1 := muli.op1;
mop2(16 downto 0) := '0' & muli.op2(15 downto 0);
acc1(48 downto 0) := '0' & rm.acc(63 downto 16);
when others => null;
end case;
if (rm.start = '1') then v.state := "01"; end if;
when "01" =>
case MULTIPLIER is
when m16x16 =>
mop1(16 downto 0) := muli.op1(32 downto 16);
mop2(16 downto 0) := '0' & muli.op2(15 downto 0);
if MULPIPE then acc1(32 downto 0) := '0' & rm.acc(63 downto 32); end if;
v.state := "10";
when m32x8 =>
mop1 := muli.op1; mop2(8 downto 0) := '0' & muli.op2(15 downto 8);
v.state := "10";
when m32x16 =>
mop1 := muli.op1; mop2(16 downto 0) := muli.op2(32 downto 16);
v.state := "00";
when others => null;
end case;
when "10" =>
case MULTIPLIER is
when m16x16 =>
mop1(16 downto 0) := '0' & muli.op1(15 downto 0);
mop2(16 downto 0) := muli.op2(32 downto 16);
if MULPIPE then acc1 := (others => '0'); acc2 := (others => '0');
else acc1(32 downto 0) := rm.acc(48 downto 16); end if;
v.state := "11";
when m32x8 =>
mop1 := muli.op1; mop2(8 downto 0) := '0' & muli.op2(23 downto 16);
acc1(40 downto 0) := rm.acc(48 downto 8);
v.state := "11";
when others => null;
end case;
when others =>
case MULTIPLIER is
when m16x16 =>
mop1(16 downto 0) := muli.op1(32 downto 16);
mop2(16 downto 0) := muli.op2(32 downto 16);
if MULPIPE then acc1(32 downto 0) := rm.acc(48 downto 16);
else acc1(32 downto 0) := rm.acc(48 downto 16); end if;
v.state := "00";
when m32x8 =>
mop1 := muli.op1; mop2(8 downto 0) := muli.op2(32 downto 24);
acc1(40 downto 0) := rm.acc(56 downto 16);
v.state := "00";
when others => null;
end case;
end case;
-- optional UMAC/SMAC support
if MACEN then
if ((muli.mac and muli.signed) = '1') then
mop1(16) := muli.op1(15); mop2(16) := muli.op2(15);
end if;
if rmac = '1' then
acc1(32 downto 0) := muli.acc(32 downto 0);--muli.y(0) & muli.asr18;
if rsigned = '1' then acc2(39 downto 32) := (others => mreg(31));
else acc2(39 downto 32) := (others => '0'); end if;
end if;
acc1(39 downto 33) := muli.acc(39 downto 33);--muli.y(7 downto 1);
end if;
-- accumulator for iterative multiplication (and MAC)
-- pragma translate_off
if not (is_x(acc1 & acc2)) then
-- pragma translate_on
case MULTIPLIER is
when m16x16 =>
if MACEN then
acc(39 downto 0) := acc1(39 downto 0) + acc2(39 downto 0);
else
acc(32 downto 0) := acc1(32 downto 0) + acc2(32 downto 0);
end if;
when m32x8 =>
acc(40 downto 0) := acc1(40 downto 0) + acc2(40 downto 0);
when m32x16 =>
acc(48 downto 0) := acc1(48 downto 0) + acc2(48 downto 0);
when m32x32 =>
v.acc(31 downto 0) := prod(63 downto 32);
when others => null;
end case;
-- pragma translate_off
end if;
-- pragma translate_on
-- save intermediate result to accumulator
case rm.state is
when "00" =>
case MULTIPLIER is
when m16x16 =>
if MULPIPE and (rm.ready = '1' ) then
v.acc(48 downto 16) := acc(32 downto 0);
if rsigned = '1' then
v.acc(63 downto 49) := (others => acc(32));
end if;
else
v.acc(63 downto 32) := acc(31 downto 0);
end if;
when m32x8 => v.acc(63 downto 24) := acc(39 downto 0);
when m32x16 => v.acc(63 downto 16) := acc(47 downto 0);
when others => null;
end case;
when "01" =>
case MULTIPLIER is
when m16x16 =>
if MULPIPE then v.acc := (others => '0');
else v.acc := CZero(31 downto 0) & mreg(31 downto 0); end if;
when m32x8 =>
v.acc := CZero(23 downto 0) & mreg(39 downto 0);
if muli.signed = '1' then v.acc(48 downto 40) := (others => acc(40)); end if;
when m32x16 =>
v.acc := CZero(15 downto 0) & mreg(47 downto 0); v.ready := '1';
if muli.signed = '1' then v.acc(63 downto 48) := (others => acc(48)); end if;
when others => null;
end case;
v.nready := '1';
when "10" =>
case MULTIPLIER is
when m16x16 =>
if MULPIPE then
v.acc := CZero(31 downto 0) & mreg(31 downto 0);
else
v.acc(48 downto 16) := acc(32 downto 0);
end if;
when m32x8 => v.acc(48 downto 8) := acc(40 downto 0);
if muli.signed = '1' then v.acc(56 downto 49) := (others => acc(40)); end if;
when others => null;
end case;
when others =>
case MULTIPLIER is
when m16x16 =>
if MULPIPE then
v.acc(48 downto 16) := acc(32 downto 0);
else
v.acc(48 downto 16) := acc(32 downto 0);
if rsigned = '1' then
v.acc(63 downto 49) := (others => acc(32));
end if;
end if;
v.ready := '1';
when m32x8 => v.acc(56 downto 16) := acc(40 downto 0); v.ready := '1';
if muli.signed = '1' then v.acc(63 downto 57) := (others => acc(40)); end if;
when others => null;
end case;
end case;
-- drive result and condition codes
if (muli.flush = '1') then v.state := "00"; v.start := '0'; end if;
if (not ASYNC_RESET) and (not RESET_ALL) and (rst = '0') then
v.nready := MULRES.nready; v.ready := MULRES.ready;
v.state := MULRES.state; v.start := MULRES.start;
end if;
rmin <= v; ma <= mop1; mb <= mop2; mmin <= w;
if MULPIPE then mulo.ready <= rm.ready; mulo.nready <= rm.nready;
else mulo.ready <= v.ready; mulo.nready <= v.nready; end if;
case MULTIPLIER is
when m16x16 =>
if rm.acc(31 downto 0) = CZero(31 downto 0) then zero := '1'; end if;
if MACEN and (rmac = '1') then
mulo.result(39 downto 0) <= acc(39 downto 0);
if rsigned = '1' then
mulo.result(63 downto 40) <= (others => acc(39));
else
mulo.result(63 downto 40) <= (others => '0');
end if;
else
mulo.result(39 downto 0) <= v.acc(39 downto 32) & rm.acc(31 downto 0);
mulo.result(63 downto 40) <= v.acc(63 downto 40);
end if;
mulo.icc <= rm.acc(31) & zero & "00";
when m32x8 =>
if (rm.acc(23 downto 0) = CZero(23 downto 0)) and
(v.acc(31 downto 24) = CZero(7 downto 0))
then zero := '1'; end if;
mulo.result <= v.acc(63 downto 24) & rm.acc(23 downto 0);
mulo.icc <= v.acc(31) & zero & "00";
when m32x16 =>
if (rm.acc(15 downto 0) = CZero(15 downto 0)) and
(v.acc(31 downto 16) = CZero(15 downto 0))
then zero := '1'; end if;
mulo.result <= v.acc(63 downto 16) & rm.acc(15 downto 0);
mulo.icc <= v.acc(31) & zero & "00";
when m32x32 =>
-- mulo.result <= rm.acc(31 downto 0) & prod(31 downto 0);
mulo.result <= prod(63 downto 0);
mulo.icc(1 downto 0) <= "00";
if prod(31 downto 0) = zero32 then mulo.icc(2) <= '1' ;
else mulo.icc(2) <= '0'; end if;
mulo.icc(3) <= prod(31);
when others => null;
mulo.result <= (others => '-');
mulo.icc <= (others => '-');
end case;
end process;
xm1616 : if MULTIPLIER = m16x16 generate
m1616 : techmult generic map (tech, arch, 17, 17, pipe+1, pipe)
port map (ma(16 downto 0), mb(16 downto 0), clk, holdn, vcc, prod(33 downto 0));
syncrregs : if not ASYNC_RESET generate
reg : process(clk)
begin
if rising_edge(clk) then
if (holdn = '1') then
mm <= mmin;
mreg(33 downto 0) <= prod(33 downto 0);
end if;
if RESET_ALL and (rst = '0') then
mm <= MACRES;
mreg(33 downto 0) <= (others => '0');
end if;
end if;
end process;
end generate syncrregs;
asyncrregs : if ASYNC_RESET generate
reg : process(clk, arst)
begin
if (arst = '0') then
mm <= MACRES;
mreg(33 downto 0) <= (others => '0');
elsif rising_edge(clk) then
if (holdn = '1') then
mm <= mmin;
mreg(33 downto 0) <= prod(33 downto 0);
end if;
end if;
end process;
end generate asyncrregs;
mreg(49 downto 34) <= (others => '0');
prod(65 downto 34) <= (others => '0');
end generate;
xm3208 : if MULTIPLIER = m32x8 generate
m3208 : techmult generic map (tech, arch, 33, 8, 2, 1)
port map (ma(32 downto 0), mb(8 downto 0), clk, holdn, vcc, mreg(41 downto 0));
mm <= ('0', '0', '0', '0');
mreg(49 downto 42) <= (others => '0');
prod <= (others => '0');
end generate;
xm3216 : if MULTIPLIER = m32x16 generate
m3216 : techmult generic map (tech, arch, 33, 17, 2, 1)
port map (ma(32 downto 0), mb(16 downto 0), clk, holdn, vcc, mreg(49 downto 0));
mm <= ('0', '0', '0', '0');
prod <= (others => '0');
end generate;
xm3232 : if MULTIPLIER = m32x32 generate
m3232 : techmult generic map (tech, arch, 33, 33, pipe+1, pipe)
port map (ma(32 downto 0), mb(32 downto 0), clk, holdn, vcc, prod(65 downto 0));
mm <= ('0', '0', '0', '0');
mreg <= (others => '0');
end generate;
syncrregs : if not ASYNC_RESET generate
reg : process(clk)
begin
if rising_edge(clk) then
if (holdn = '1') then rm <= rmin; end if;
if (rst = '0') then
if RESET_ALL then
rm <= MULRES;
else
rm.nready <= MULRES.nready; rm.ready <= MULRES.ready;
rm.state <= MULRES.state; rm.start <= MULRES.start;
end if;
end if;
end if;
end process;
end generate syncrregs;
asyncrregs : if ASYNC_RESET generate
reg : process(clk, arst)
begin
if (arst = '0') then
rm <= MULRES;
elsif rising_edge(clk) then
if (holdn = '1') then rm <= rmin; end if;
end if;
end process;
end generate asyncrregs;
end;
|
gpl-3.0
|
hoglet67/CoPro6502
|
src/T80/T16450.vhd
|
2
|
13027
|
--
-- 16450 compatible UART with synchronous bus interface
-- RClk/BaudOut is XIn enable instead of actual clock
--
-- Version : 0249b
--
-- Copyright (c) 2002 Daniel Wallner ([email protected])
--
-- All rights reserved
--
-- Redistribution and use in source and synthezised forms, with or without
-- modification, are permitted provided that the following conditions are met:
--
-- Redistributions of source code must retain the above copyright notice,
-- this list of conditions and the following disclaimer.
--
-- Redistributions in synthesized form must reproduce the above copyright
-- notice, this list of conditions and the following disclaimer in the
-- documentation and/or other materials provided with the distribution.
--
-- Neither the name of the author nor the names of other contributors may
-- be used to endorse or promote products derived from this software without
-- specific prior written permission.
--
-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-- THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-- PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE
-- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-- POSSIBILITY OF SUCH DAMAGE.
--
-- Please report bugs to the author, but before you do so, please
-- make sure that this is not a derivative work and that
-- you have the latest version of this file.
--
-- The latest version of this file can be found at:
-- http://www.opencores.org/cvsweb.shtml/t80/
--
-- Limitations :
--
-- File history :
--
-- 0208 : First release
--
-- 0249 : Fixed interrupt and baud rate bugs found by Andy Dyer
-- Added modem status and break detection
-- Added support for 1.5 and 2 stop bits
--
-- 0249b : Fixed loopback break generation bugs found by Andy Dyer
--
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
entity T16450 is
port(
MR_n : in std_logic;
XIn : in std_logic;
RClk : in std_logic;
CS_n : in std_logic;
Rd_n : in std_logic;
Wr_n : in std_logic;
A : in std_logic_vector(2 downto 0);
D_In : in std_logic_vector(7 downto 0);
D_Out : out std_logic_vector(7 downto 0);
SIn : in std_logic;
CTS_n : in std_logic;
DSR_n : in std_logic;
RI_n : in std_logic;
DCD_n : in std_logic;
SOut : out std_logic;
RTS_n : out std_logic;
DTR_n : out std_logic;
OUT1_n : out std_logic;
OUT2_n : out std_logic;
BaudOut : out std_logic;
Intr : out std_logic
);
end T16450;
architecture rtl of T16450 is
signal RBR : std_logic_vector(7 downto 0); -- Reciever Buffer Register
signal THR : std_logic_vector(7 downto 0); -- Transmitter Holding Register
signal IER : std_logic_vector(7 downto 0); -- Interrupt Enable Register
signal IIR : std_logic_vector(7 downto 0); -- Interrupt Ident. Register
signal LCR : std_logic_vector(7 downto 0); -- Line Control Register
signal MCR : std_logic_vector(7 downto 0); -- MODEM Control Register
signal LSR : std_logic_vector(7 downto 0); -- Line Status Register
signal MSR : std_logic_vector(7 downto 0); -- MODEM Status Register
signal SCR : std_logic_vector(7 downto 0); -- Scratch Register
signal DLL : std_logic_vector(7 downto 0); -- Divisor Latch (LS)
signal DLM : std_logic_vector(7 downto 0); -- Divisor Latch (MS)
signal DM0 : std_logic_vector(7 downto 0);
signal DM1 : std_logic_vector(7 downto 0);
signal MSR_In : std_logic_vector(3 downto 0);
signal Bit_Phase : unsigned(3 downto 0);
signal Brk_Cnt : unsigned(3 downto 0);
signal RX_Filtered : std_logic;
signal RX_ShiftReg : std_logic_vector(7 downto 0);
signal RX_Bit_Cnt : integer range 0 to 11;
signal RX_Parity : std_logic;
signal RXD : std_logic;
signal TX_Tick : std_logic;
signal TX_ShiftReg : std_logic_vector(7 downto 0);
signal TX_Bit_Cnt : integer range 0 to 11;
signal TX_Parity : std_logic;
signal TX_Next_Is_Stop : std_logic;
signal TX_Stop_Bit : std_logic;
signal TXD : std_logic;
begin
DTR_n <= MCR(4) or not MCR(0);
RTS_n <= MCR(4) or not MCR(1);
OUT1_n <= MCR(4) or not MCR(2);
OUT2_n <= MCR(4) or not MCR(3);
SOut <= MCR(4) or (TXD and not LCR(6));
RXD <= SIn when MCR(4) = '0' else (TXD and not LCR(6));
Intr <= not IIR(0);
-- Registers
DM0 <= DLL when LCR(7) = '1' else RBR;
DM1 <= DLM when LCR(7) = '1' else IER;
with A select
D_Out <=
DM0 when "000",
DM1 when "001",
IIR when "010",
LCR when "011",
MCR when "100",
LSR when "101",
MSR when "110",
SCR when others;
process (MR_n, XIn)
begin
if MR_n = '0' then
THR <= "00000000";
IER <= "00000000";
LCR <= "00000000";
MCR <= "00000000";
MSR(3 downto 0) <= "0000";
SCR <= "00000000"; -- ??
DLL <= "00000000"; -- ??
DLM <= "00000000"; -- ??
elsif XIn'event and XIn = '1' then
if Wr_n = '0' and CS_n = '0' then
case A is
when "000" =>
if LCR(7) = '1' then
DLL <= D_In;
else
THR <= D_In;
end if;
when "001" =>
if LCR(7) = '1' then
DLM <= D_In;
else
IER(3 downto 0) <= D_In(3 downto 0);
end if;
when "011" =>
LCR <= D_In;
when "100" =>
MCR <= D_In;
when "111" =>
SCR <= D_In;
when others =>
end case;
end if;
if Rd_n = '0' and CS_n = '0' and A = "110" then
MSR(3 downto 0) <= "0000";
end if;
if MSR(4) /= MSR_In(0) then
MSR(0) <= '1';
end if;
if MSR(5) /= MSR_In(1) then
MSR(1) <= '1';
end if;
if MSR(6) = '0' and MSR_In(2) = '1' then
MSR(2) <= '1';
end if;
if MSR(7) /= MSR_In(3) then
MSR(3) <= '1';
end if;
end if;
end process;
process (XIn)
begin
if XIn'event and XIn = '1' then
if MCR(4) = '0' then
MSR(4) <= MSR_In(0);
MSR(5) <= MSR_In(1);
MSR(6) <= MSR_In(2);
MSR(7) <= MSR_In(3);
else
MSR(4) <= MCR(1);
MSR(5) <= MCR(0);
MSR(6) <= MCR(2);
MSR(7) <= MCR(3);
end if;
MSR_In(0) <= CTS_n;
MSR_In(1) <= DSR_n;
MSR_In(2) <= RI_n;
MSR_In(3) <= DCD_n;
end if;
end process;
IIR(7 downto 3) <= "00000";
IIR(2 downto 0) <=
"110" when IER(2) = '1' and LSR(4 downto 1) /= "0000" else
"100" when (IER(0) and LSR(0)) = '1' else
"010" when (IER(1) and LSR(5)) = '1' else
"000" when IER(3) = '1' and ((MCR(4) = '0' and MSR(3 downto 0) /= "0000") or
(MCR(4) = '1' and MCR(3 downto 0) /= "0000")) else
"001";
-- Baud x 16 clock generator
process (MR_n, XIn)
variable Baud_Cnt : unsigned(15 downto 0);
begin
if MR_n = '0' then
Baud_Cnt := "0000000000000000";
BaudOut <= '0';
elsif XIn'event and XIn = '1' then
if Baud_Cnt(15 downto 1) = "000000000000000" or (Wr_n = '0' and CS_n = '0' and A(2 downto 1) = "00" and LCR(7) = '1') then
Baud_Cnt(15 downto 8) := unsigned(DLM);
Baud_Cnt(7 downto 0) := unsigned(DLL);
BaudOut <= '1';
else
Baud_Cnt := Baud_Cnt - 1;
BaudOut <= '0';
end if;
end if;
end process;
-- Input filter
process (MR_n, XIn)
variable Samples : std_logic_vector(1 downto 0);
begin
if MR_n = '0' then
Samples := "11";
RX_Filtered <= '1';
elsif XIn'event and XIn = '1' then
if RClk = '1' then
Samples(1) := Samples(0);
Samples(0) := RXD;
end if;
if Samples = "00" then
RX_Filtered <= '0';
end if;
if Samples = "11" then
RX_Filtered <= '1';
end if;
end if;
end process;
-- Receive state machine
process (MR_n, XIn)
begin
if MR_n = '0' then
RBR <= "00000000";
LSR(4 downto 0) <= "00000";
Bit_Phase <= "0000";
Brk_Cnt <= "0000";
RX_ShiftReg(7 downto 0) <= "00000000";
RX_Bit_Cnt <= 0;
RX_Parity <= '0';
elsif XIn'event and XIn = '1' then
if A = "000" and LCR(7) = '0' and Rd_n = '0' and CS_n = '0' then
LSR(0) <= '0'; -- DR
end if;
if A = "101" and Rd_n = '0' and CS_n = '0' then
LSR(4) <= '0'; -- BI
LSR(3) <= '0'; -- FE
LSR(2) <= '0'; -- PE
LSR(1) <= '0'; -- OE
end if;
if RClk = '1' then
if RX_Bit_Cnt = 0 and (RX_Filtered = '1' or Bit_Phase = "0111") then
Bit_Phase <= "0000";
else
Bit_Phase <= Bit_Phase + 1;
end if;
if Bit_Phase = "1111" then
if RX_Filtered = '1' then
Brk_Cnt <= "0000";
else
Brk_Cnt <= Brk_Cnt + 1;
end if;
if Brk_Cnt = "1100" then
LSR(4) <= '1'; -- BI
end if;
end if;
if RX_Bit_Cnt = 0 then
if Bit_Phase = "0111" then
RX_Bit_Cnt <= RX_Bit_Cnt + 1;
RX_Parity <= not LCR(4); -- EPS
end if;
elsif Bit_Phase = "1111" then
RX_Bit_Cnt <= RX_Bit_Cnt + 1;
if RX_Bit_Cnt = 10 then -- Parity stop bit
RX_Bit_Cnt <= 0;
LSR(0) <= '1'; -- UART Receive complete
LSR(3) <= not RX_Filtered; -- Framing error
elsif (RX_Bit_Cnt = 9 and LCR(1 downto 0) = "11") or
(RX_Bit_Cnt = 8 and LCR(1 downto 0) = "10") or
(RX_Bit_Cnt = 7 and LCR(1 downto 0) = "01") or
(RX_Bit_Cnt = 6 and LCR(1 downto 0) = "00") then -- Stop bit/Parity
RX_Bit_Cnt <= 0;
if LCR(3) = '1' then -- PEN
RX_Bit_Cnt <= 10;
if LCR(5) = '1' then -- Stick parity
if RX_Filtered = LCR(4) then
LSR(2) <= '1';
end if;
else
if RX_Filtered /= RX_Parity then
LSR(2) <= '1';
end if;
end if;
else
LSR(0) <= '1'; -- UART Receive complete
LSR(3) <= not RX_Filtered; -- Framing error
end if;
RBR <= RX_ShiftReg(7 downto 0);
LSR(1) <= LSR(0);
if A = "101" and Rd_n = '0' and CS_n = '0' then
LSR(1) <= '0';
end if;
else
RX_ShiftReg(6 downto 0) <= RX_ShiftReg(7 downto 1);
RX_ShiftReg(7) <= RX_Filtered;
if LCR(1 downto 0) = "10" then
RX_ShiftReg(7) <= '0';
RX_ShiftReg(6) <= RX_Filtered;
end if;
if LCR(1 downto 0) = "01" then
RX_ShiftReg(7) <= '0';
RX_ShiftReg(6) <= '0';
RX_ShiftReg(5) <= RX_Filtered;
end if;
if LCR(1 downto 0) = "00" then
RX_ShiftReg(7) <= '0';
RX_ShiftReg(6) <= '0';
RX_ShiftReg(5) <= '0';
RX_ShiftReg(4) <= RX_Filtered;
end if;
RX_Parity <= RX_Filtered xor RX_Parity;
end if;
end if;
end if;
end if;
end process;
-- Transmit bit tick
process (MR_n, XIn)
variable TX_Cnt : unsigned(4 downto 0);
begin
if MR_n = '0' then
TX_Cnt := "00000";
TX_Tick <= '0';
elsif XIn'event and XIn = '1' then
TX_Tick <= '0';
if RClk = '1' then
TX_Cnt := TX_Cnt + 1;
if LCR(2) = '1' and TX_Stop_Bit = '1' then
if LCR(1 downto 0) = "00" then
if TX_Cnt = "10111" then
TX_Tick <= '1';
TX_Cnt(3 downto 0) := "0000";
end if;
else
if TX_Cnt = "11111" then
TX_Tick <= '1';
TX_Cnt(3 downto 0) := "0000";
end if;
end if;
else
TX_Cnt(4) := '1';
if TX_Cnt(3 downto 0) = "1111" then
TX_Tick <= '1';
end if;
end if;
end if;
end if;
end process;
-- Transmit state machine
process (MR_n, XIn)
begin
if MR_n = '0' then
LSR(7 downto 5) <= "011";
TX_Bit_Cnt <= 0;
TX_ShiftReg <= (others => '0');
TXD <= '1';
TX_Parity <= '0';
TX_Next_Is_Stop <= '0';
TX_Stop_Bit <= '0';
elsif XIn'event and XIn = '1' then
if TX_Tick = '1' then
TX_Next_Is_Stop <= '0';
TX_Stop_Bit <= TX_Next_Is_Stop;
case TX_Bit_Cnt is
when 0 =>
if LSR(5) <= '0' then -- THRE
TX_Bit_Cnt <= 1;
end if;
TXD <= '1';
when 1 => -- Start bit
TX_ShiftReg(7 downto 0) <= THR;
LSR(5) <= '1'; -- THRE
TXD <= '0';
TX_Parity <= not LCR(4); -- EPS
TX_Bit_Cnt <= TX_Bit_Cnt + 1;
when 10 => -- Parity bit
TXD <= TX_Parity;
if LCR(5) = '1' then -- Stick parity
TXD <= not LCR(4);
end if;
TX_Bit_Cnt <= 0;
TX_Next_Is_Stop <= '1';
when others =>
TX_Bit_Cnt <= TX_Bit_Cnt + 1;
if (TX_Bit_Cnt = 9 and LCR(1 downto 0) = "11") or
(TX_Bit_Cnt = 8 and LCR(1 downto 0) = "10") or
(TX_Bit_Cnt = 7 and LCR(1 downto 0) = "01") or
(TX_Bit_Cnt = 6 and LCR(1 downto 0) = "00") then
TX_Bit_Cnt <= 0;
if LCR(3) = '1' then -- PEN
TX_Bit_Cnt <= 10;
else
TX_Next_Is_Stop <= '1';
end if;
LSR(6) <= '1'; -- TEMT
end if;
TXD <= TX_ShiftReg(0);
TX_ShiftReg(6 downto 0) <= TX_ShiftReg(7 downto 1);
TX_Parity <= TX_ShiftReg(0) xor TX_Parity;
end case;
end if;
if Wr_n = '0' and CS_n = '0' and A = "000" and LCR(7) = '0' then
LSR(5) <= '0'; -- THRE
LSR(6) <= '0'; -- TEMT
end if;
end if;
end process;
end;
|
gpl-3.0
|
EliasLuiz/TCC
|
Leon3/lib/techmap/umc18/memory_umc18.vhd
|
1
|
9471
|
------------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2003 - 2008, Gaisler Research
-- Copyright (C) 2008 - 2014, Aeroflex Gaisler
-- Copyright (C) 2015 - 2016, Cobham Gaisler
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-----------------------------------------------------------------------------
-- Entity: various
-- File: mem_umc_gen.vhd
-- Author: Jiri Gaisler Gaisler Research
-- Description: Memory generators for UMC rams
------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
-- pragma translate_off
library umc18;
use umc18.SRAM_2048wx32b;
use umc18.SRAM_1024wx32b;
use umc18.SRAM_512wx32b;
use umc18.SRAM_256wx32b;
use umc18.SRAM_128wx32b;
use umc18.SRAM_64wx32b;
use umc18.SRAM_32wx32b;
use umc18.SRAM_2048wx40b;
use umc18.SRAM_1024wx40b;
use umc18.SRAM_512wx40b;
use umc18.SRAM_256wx40b;
use umc18.SRAM_128wx40b;
use umc18.SRAM_64wx40b;
use umc18.SRAM_32wx40b;
-- pragma translate_on
entity umc_syncram is
generic ( abits : integer := 10; dbits : integer := 8 );
port (
clk : in std_ulogic;
address : in std_logic_vector(abits -1 downto 0);
datain : in std_logic_vector(dbits -1 downto 0);
dataout : out std_logic_vector(dbits -1 downto 0);
enable : in std_ulogic;
write : in std_ulogic
);
end;
architecture rtl of umc_syncram is
component SRAM_2048wx32b is
port (
a : in std_logic_vector(10 downto 0);
data : in std_logic_vector(31 downto 0);
csn : in std_logic;
wen : in std_logic;
oen : in std_logic;
q : out std_logic_vector(31 downto 0);
clk : in std_logic
);
end component;
component SRAM_1024wx32b is
port (
a : in std_logic_vector(9 downto 0);
data : in std_logic_vector(31 downto 0);
csn : in std_logic;
wen : in std_logic;
oen : in std_logic;
q : out std_logic_vector(31 downto 0);
clk : in std_logic
);
end component;
component SRAM_512wx32b is
port (
a : in std_logic_vector(8 downto 0);
data : in std_logic_vector(31 downto 0);
csn : in std_logic;
wen : in std_logic;
oen : in std_logic;
q : out std_logic_vector(31 downto 0);
clk : in std_logic
);
end component;
component SRAM_256wx32b is
port (
a : in std_logic_vector(7 downto 0);
data : in std_logic_vector(31 downto 0);
csn : in std_logic;
wen : in std_logic;
oen : in std_logic;
q : out std_logic_vector(31 downto 0);
clk : in std_logic
);
end component;
component SRAM_128wx32b is
port (
a : in std_logic_vector(6 downto 0);
data : in std_logic_vector(31 downto 0);
csn : in std_logic;
wen : in std_logic;
oen : in std_logic;
q : out std_logic_vector(31 downto 0);
clk : in std_logic
);
end component;
component SRAM_64wx32b is
port (
a : in std_logic_vector(5 downto 0);
data : in std_logic_vector(31 downto 0);
csn : in std_logic;
wen : in std_logic;
oen : in std_logic;
q : out std_logic_vector(31 downto 0);
clk : in std_logic
);
end component;
component SRAM_32wx32b is
port (
a : in std_logic_vector(4 downto 0);
data : in std_logic_vector(31 downto 0);
csn : in std_logic;
wen : in std_logic;
oen : in std_logic;
q : out std_logic_vector(31 downto 0);
clk : in std_logic
);
end component;
component SRAM_2048wx40b is
port (
a : in std_logic_vector(10 downto 0);
data : in std_logic_vector(39 downto 0);
csn : in std_logic;
wen : in std_logic;
oen : in std_logic;
q : out std_logic_vector(39 downto 0);
clk : in std_logic
);
end component;
component SRAM_1024wx40b is
port (
a : in std_logic_vector(9 downto 0);
data : in std_logic_vector(39 downto 0);
csn : in std_logic;
wen : in std_logic;
oen : in std_logic;
q : out std_logic_vector(39 downto 0);
clk : in std_logic
);
end component;
component SRAM_512wx40b is
port (
a : in std_logic_vector(8 downto 0);
data : in std_logic_vector(39 downto 0);
csn : in std_logic;
wen : in std_logic;
oen : in std_logic;
q : out std_logic_vector(39 downto 0);
clk : in std_logic
);
end component;
component SRAM_256wx40b is
port (
a : in std_logic_vector(7 downto 0);
data : in std_logic_vector(39 downto 0);
csn : in std_logic;
wen : in std_logic;
oen : in std_logic;
q : out std_logic_vector(39 downto 0);
clk : in std_logic
);
end component;
component SRAM_128wx40b is
port (
a : in std_logic_vector(6 downto 0);
data : in std_logic_vector(39 downto 0);
csn : in std_logic;
wen : in std_logic;
oen : in std_logic;
q : out std_logic_vector(39 downto 0);
clk : in std_logic
);
end component;
component SRAM_64wx40b is
port (
a : in std_logic_vector(5 downto 0);
data : in std_logic_vector(39 downto 0);
csn : in std_logic;
wen : in std_logic;
oen : in std_logic;
q : out std_logic_vector(39 downto 0);
clk : in std_logic
);
end component;
component SRAM_32wx40b is
port (
a : in std_logic_vector(4 downto 0);
data : in std_logic_vector(39 downto 0);
csn : in std_logic;
wen : in std_logic;
oen : in std_logic;
q : out std_logic_vector(39 downto 0);
clk : in std_logic
);
end component;
signal d, q, gnd : std_logic_vector(41 downto 0);
signal a : std_logic_vector(17 downto 0);
signal vcc, csn, wen : std_ulogic;
constant synopsys_bug : std_logic_vector(41 downto 0) := (others => '0');
begin
csn <= not enable; wen <= not write;
gnd <= (others => '0'); vcc <= '1';
a(abits -1 downto 0) <= address;
d(dbits -1 downto 0) <= datain(dbits -1 downto 0);
a(17 downto abits) <= synopsys_bug(17 downto abits);
d(41 downto dbits) <= synopsys_bug(41 downto dbits);
dataout <= q(dbits -1 downto 0);
-- q(41 downto dbits) <= synopsys_bug(41 downto dbits);
d32 : if (dbits <= 32) generate
a5d32 : if (abits <= 5) generate
id0 : SRAM_32wx32b port map (a(4 downto 0), d(31 downto 0), csn,
wen, gnd(0), q(31 downto 0), clk);
end generate;
a6d32 : if (abits = 6) generate
id0 : SRAM_64wx32b port map (a(5 downto 0), d(31 downto 0), csn,
wen, gnd(0), q(31 downto 0), clk);
end generate;
a7d32 : if (abits = 7) generate
id0 : SRAM_128wx32b port map (a(6 downto 0), d(31 downto 0), csn,
wen, gnd(0), q(31 downto 0), clk);
end generate;
a8d32 : if (abits = 8) generate
id0 : SRAM_256wx32b port map (a(7 downto 0), d(31 downto 0), csn,
wen, gnd(0), q(31 downto 0), clk);
end generate;
a9d32 : if (abits = 9) generate
id0 : SRAM_512wx32b port map (a(8 downto 0), d(31 downto 0), csn,
wen, gnd(0), q(31 downto 0), clk);
end generate;
a10d32 : if (abits = 10) generate
id0 : SRAM_1024wx32b port map (a(9 downto 0), d(31 downto 0), csn,
wen, gnd(0), q(31 downto 0), clk);
end generate;
a11d32 : if (abits = 11) generate
id0 : SRAM_2048wx32b port map (a(10 downto 0), d(31 downto 0), csn,
wen, gnd(0), q(31 downto 0), clk);
end generate;
end generate;
d40 : if (dbits > 32) and (dbits <= 40) generate
a5d40 : if (abits <= 5) generate
id0 : SRAM_32wx40b port map (a(4 downto 0), d(39 downto 0), csn,
wen, gnd(0), q(39 downto 0), clk);
end generate;
a6d40 : if (abits = 6) generate
id0 : SRAM_64wx40b port map (a(5 downto 0), d(39 downto 0), csn,
wen, gnd(0), q(39 downto 0), clk);
end generate;
a7d40 : if (abits = 7) generate
id0 : SRAM_128wx40b port map (a(6 downto 0), d(39 downto 0), csn,
wen, gnd(0), q(39 downto 0), clk);
end generate;
a8d40 : if (abits = 8) generate
id0 : SRAM_256wx40b port map (a(7 downto 0), d(39 downto 0), csn,
wen, gnd(0), q(39 downto 0), clk);
end generate;
a9d40 : if (abits = 9) generate
id0 : SRAM_512wx40b port map (a(8 downto 0), d(39 downto 0), csn,
wen, gnd(0), q(39 downto 0), clk);
end generate;
a10d40 : if (abits = 10) generate
id0 : SRAM_1024wx40b port map (a(9 downto 0), d(39 downto 0), csn,
wen, gnd(0), q(39 downto 0), clk);
end generate;
a11d40 : if (abits = 11) generate
id0 : SRAM_2048wx40b port map (a(10 downto 0), d(39 downto 0), csn,
wen, gnd(0), q(39 downto 0), clk);
end generate;
end generate;
-- pragma translate_off
a_to_high : if (abits > 11) or (dbits > 40) generate
x : process
begin
assert false
report "Unsupported memory size (umc18)"
severity failure;
wait;
end process;
end generate;
-- pragma translate_on
end;
|
gpl-3.0
|
hoglet67/CoPro6502
|
src/TG68/TG68.vhd
|
1
|
7009
|
------------------------------------------------------------------------------
------------------------------------------------------------------------------
-- --
-- This is the TOP-Level for TG68_fast to generate 68K Bus signals --
-- --
-- Copyright (c) 2007-2008 Tobias Gubener <[email protected]> --
-- --
-- This source file is free software: you can redistribute it and/or modify --
-- it under the terms of the GNU Lesser General Public License as published --
-- by the Free Software Foundation, either version 3 of the License, or --
-- (at your option) any later version. --
-- --
-- This source file is distributed in the hope that it will be useful, --
-- but WITHOUT ANY WARRANTY; without even the implied warranty of --
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --
-- GNU General Public License for more details. --
-- --
-- You should have received a copy of the GNU General Public License --
-- along with this program. If not, see <http://www.gnu.org/licenses/>. --
-- --
------------------------------------------------------------------------------
------------------------------------------------------------------------------
--
-- Revision 1.02 2008/01/23
-- bugfix Timing
--
-- Revision 1.01 2007/11/28
-- add MOVEP
-- Bugfix Interrupt in MOVEQ
--
-- Revision 1.0 2007/11/05
-- Clean up code and first release
--
-- known bugs/todo:
-- Add CHK INSTRUCTION
-- full decode ILLEGAL INSTRUCTIONS
-- Add FDC Output
-- add odd Address test
-- add TRACE
-- Movem with regmask==x0000
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity TG68 is
port(
clk : in std_logic;
reset : in std_logic;
clkena_in : in std_logic:='1';
data_in : in std_logic_vector(15 downto 0);
IPL : in std_logic_vector(2 downto 0):="111";
dtack : in std_logic;
addr : out std_logic_vector(31 downto 0);
data_out : out std_logic_vector(15 downto 0);
as : out std_logic;
uds : out std_logic;
lds : out std_logic;
rw : out std_logic;
drive_data : out std_logic --enable for data_out driver
);
end TG68;
ARCHITECTURE logic OF TG68 IS
COMPONENT TG68_fast
PORT (
clk : in std_logic;
reset : in std_logic;
clkena_in : in std_logic;
data_in : in std_logic_vector(15 downto 0);
IPL : in std_logic_vector(2 downto 0);
test_IPL : in std_logic;
address : out std_logic_vector(31 downto 0);
data_write : out std_logic_vector(15 downto 0);
state_out : out std_logic_vector(1 downto 0);
decodeOPC : buffer std_logic;
wr : out std_logic;
UDS, LDS : out std_logic
);
END COMPONENT;
SIGNAL as_s : std_logic;
SIGNAL as_e : std_logic;
SIGNAL uds_s : std_logic;
SIGNAL uds_e : std_logic;
SIGNAL lds_s : std_logic;
SIGNAL lds_e : std_logic;
SIGNAL rw_s : std_logic;
SIGNAL rw_e : std_logic;
SIGNAL waitm : std_logic;
SIGNAL clkena_e : std_logic;
SIGNAL S_state : std_logic_vector(1 downto 0);
SIGNAL decode : std_logic;
SIGNAL wr : std_logic;
SIGNAL uds_in : std_logic;
SIGNAL lds_in : std_logic;
SIGNAL state : std_logic_vector(1 downto 0);
SIGNAL clkena : std_logic;
SIGNAL n_clk : std_logic;
SIGNAL cpuIPL : std_logic_vector(2 downto 0);
BEGIN
n_clk <= NOT clk;
TG68_fast_inst: TG68_fast
PORT MAP (
clk => n_clk, -- : in std_logic;
reset => reset, -- : in std_logic;
clkena_in => clkena, -- : in std_logic;
data_in => data_in, -- : in std_logic_vector(15 downto 0);
IPL => cpuIPL, -- : in std_logic_vector(2 downto 0);
test_IPL => '0', -- : in std_logic;
address => addr, -- : out std_logic_vector(31 downto 0);
data_write => data_out, -- : out std_logic_vector(15 downto 0);
state_out => state, -- : out std_logic_vector(1 downto 0);
decodeOPC => decode, -- : buffer std_logic;
wr => wr, -- : out std_logic;
UDS => uds_in, -- : out std_logic;
LDS => lds_in -- : out std_logic;
);
PROCESS (clk)
BEGIN
IF clkena_in='1' AND (clkena_e='1' OR state="01") THEN
clkena <= '1';
ELSE
clkena <= '0';
END IF;
END PROCESS;
PROCESS (clk, reset, state, as_s, as_e, rw_s, rw_e, uds_s, uds_e, lds_s, lds_e)
BEGIN
IF state="01" THEN
as <= '1';
rw <= '1';
uds <= '1';
lds <= '1';
ELSE
as <= as_s AND as_e;
rw <= rw_s AND rw_e;
uds <= uds_s AND uds_e;
lds <= lds_s AND lds_e;
END IF;
IF reset='0' THEN
S_state <= "11";
as_s <= '1';
rw_s <= '1';
uds_s <= '1';
lds_s <= '1';
ELSIF rising_edge(clk) THEN
IF clkena_in='1' THEN
as_s <= '1';
rw_s <= '1';
uds_s <= '1';
lds_s <= '1';
IF state/="01" OR decode='1' THEN
CASE S_state IS
WHEN "00" => as_s <= '0';
rw_s <= wr;
IF wr='1' THEN
uds_s <= uds_in;
lds_s <= lds_in;
END IF;
S_state <= "01";
WHEN "01" => as_s <= '0';
rw_s <= wr;
uds_s <= uds_in;
lds_s <= lds_in;
S_state <= "10";
WHEN "10" =>
rw_s <= wr;
IF waitm='0' THEN
S_state <= "11";
END IF;
WHEN "11" =>
S_state <= "00";
WHEN OTHERS => null;
END CASE;
END IF;
END IF;
END IF;
IF reset='0' THEN
as_e <= '1';
rw_e <= '1';
uds_e <= '1';
lds_e <= '1';
clkena_e <= '0';
cpuIPL <= "111";
drive_data <= '0';
ELSIF falling_edge(clk) THEN
IF clkena_in='1' THEN
as_e <= '1';
rw_e <= '1';
uds_e <= '1';
lds_e <= '1';
clkena_e <= '0';
drive_data <= '0';
CASE S_state IS
WHEN "00" => null;
WHEN "01" => drive_data <= NOT wr;
WHEN "10" => as_e <= '0';
uds_e <= uds_in;
lds_e <= lds_in;
cpuIPL <= IPL;
drive_data <= NOT wr;
IF state="01" THEN
clkena_e <= '1';
waitm <= '0';
ELSE
clkena_e <= NOT dtack;
waitm <= dtack;
END IF;
WHEN OTHERS => null;
END CASE;
END IF;
END IF;
END PROCESS;
END;
|
gpl-3.0
|
kdgwill/VHDL_Framer_Example
|
VHDL_Framer_Example/Example2/tb_Framer_generator.vhd
|
1
|
4435
|
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.numeric_bit.ALL;
entity tb_framer_generator is
port (clk :out std_logic;
resetb :out std_logic;
ser_in :out std_logic);
end tb_framer_generator;
architecture testbench_gen of tb_framer_generator is
signal clock:std_logic:= '0'; ---clock signal
signal reset_n:std_logic:='0'; ---reset signal
signal bit_count:integer:=0; ---counter
signal byte_count:integer:=0; ---incoming byte count
signal din:std_logic; ---data input
signal framereg:std_logic_vector(15 downto 0); ---frame register
signal dout_payload:std_logic_vector(7 downto 0); ---data out to payload
signal dout_d1_d3:std_logic_vector(7 downto 0); ---data out to D1-D3 port
signal dout_d4_d12:std_logic_vector(7 downto 0); ---Data out to D4-D12 ports
signal F6_byte:std_logic_vector(7 downto 0):=X"F6"; ---input F6 byte
signal TE_byte:std_logic_vector(7 downto 0):=X"28"; ---input 28 byte
signal C0_byte:std_logic_vector(7 downto 0):=X"C0"; ---input C0 byte
signal d1_byte: std_logic_vector(7 downto 0):=X"02"; ---input D1 byte
signal d2_byte: std_logic_vector(7 downto 0):=X"17"; ---input D2 byte
signal d3_byte: std_logic_vector(7 downto 0):=X"81"; ---input D3 byte
signal d4_byte: std_logic_vector(7 downto 0):=X"53"; ---input Ascii S in D4 byte
signal d5_byte: std_logic_vector(7 downto 0):=X"74"; ---input t in D5 byte
signal d6_byte: std_logic_vector(7 downto 0):=X"65"; ---input e in D6 byte
signal d7_byte: std_logic_vector(7 downto 0):=X"61"; ---input a in D7 byte
signal d8_byte: std_logic_vector(7 downto 0):=X"76"; ---input v in D8 byte
signal d9_byte: std_logic_vector(7 downto 0):=X"69"; ---input i in D9 byte
signal d10_byte: std_logic_vector(7 downto 0):=X"61"; ---input a in D10 byte
signal d11_byte: std_logic_vector(7 downto 0):=X"6E"; ---input n in D11 byte
signal d12_byte: std_logic_vector(7 downto 0):=X"53"; ---input S in D12 byte
signal payload_byte:std_logic_vector(7 downto 0):=X"55"; ---payload ?55? byte
signal bit_no: integer:=7;
BEGIN
clocking: block
BEGIN
clock <= not clock after 5 ns;
END block;
Reset: PROCESS
BEGIN
reset_n <= '0';
wait for 35 ns;
reset_n <= '1';
wait until false;
END Process;
-- output ports driven by signals
clk <= clock;
resetb <= reset_n;
ser_in <= din;
--bit counter
process (clock, reset_n)
begin
if (reset_n = '0') then
bit_count <= 0;
elsif (clock'event and clock = '1') then
if (bit_count = 7) then
bit_count <= 0;
else
bit_count <= bit_count + 1;
end if;
end if;
end process;
---byte counter
process (clock, reset_n)
begin
if (reset_n = '0') then
byte_count <= 0;
elsif (clock'event and clock = '1') then
if (byte_count = 809) then
byte_count <= 0;
elsif (bit_count = 7) then
byte_count<=byte_count+1;
end if;
end if;
end process;
process(bit_count, reset_n)
begin
case byte_count is
when 0=>
din<=F6_byte(7 - bit_count);
when 1=>
din<=TE_byte(7 - bit_count);
when 2=>
din<=C0_byte(7 - bit_count);
when 3 to 89|93 to 179|183 to 269|273 to 359|363 to 449|453 to 539|543 to 629|633 to 719|723 to 809=>
din<=payload_byte(7 - bit_count);
when 180=>
din<=D1_byte(7 - bit_count);
when 181=>
din<=D2_byte(7 - bit_count);
when 182=>
din<=D3_byte(7 - bit_count);
when 450=>
din<=D4_byte(7 - bit_count);
when 451=>
din<=D5_byte(7 - bit_count);
when 452=>
din<=D6_byte(7 - bit_count);
when 540=>
din<=D7_byte(7 - bit_count);
when 541=>
din<=D8_byte(7 - bit_count);
when 542=>
din<=D9_byte(7 - bit_count);
when 630=>
din<=D10_byte(7 - bit_count);
when 631=>
din<=D11_byte(7 - bit_count);
when 632=>
din<=D12_byte(7 - bit_count);
-- when 180 to 182|270 to 272|360 to 362|450 to 452|540 to 542|630 to 632|720 to 722 =>
-- din<=d4_d12_byte(7 - bit_count);
when others=>din<='0';
end case;
end process;
end testbench_gen;
|
gpl-3.0
|
EliasLuiz/TCC
|
Leon3/lib/techmap/maps/clkmux.vhd
|
1
|
4013
|
------------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2003 - 2008, Gaisler Research
-- Copyright (C) 2008 - 2014, Aeroflex Gaisler
-- Copyright (C) 2015 - 2016, Cobham Gaisler
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-----------------------------------------------------------------------------
-- Entity: clkmux
-- File: clkmux.vhd
-- Author: Edvin Catovic - Gaisler Research
-- Description: Glitch-free clock multiplexer
------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use work.gencomp.all;
use work.allclkgen.all;
entity clkmux is
generic(tech : integer := 0;
rsel : integer range 0 to 1 := 0); -- registered sel
port(
i0, i1 : in std_ulogic;
sel : in std_ulogic;
o : out std_ulogic;
rst : in std_ulogic := '1'
);
end entity;
architecture rtl of clkmux is
signal seli, sel0, sel1, cg0, cg1 : std_ulogic;
begin
rs : if rsel = 1 generate
rsproc : process(i0)
begin
if rising_edge(i0) then seli <= sel; end if;
end process;
end generate;
cs : if rsel = 0 generate seli <= sel; end generate;
tec : if has_clkmux(tech) = 1 generate
xil : if is_unisim(tech) = 1 generate
buf : clkmux_unisim port map(sel => seli, I0 => i0, I1 => i1, O => o);
end generate;
rhl : if tech = rhlib18t generate
buf : clkmux_rhlib18t port map(sel => seli, I0 => i0, I1 => i1, O => o);
end generate;
ut13 : if tech = ut130 generate
x0 : clkmux_ut130hbd port map (i0 => i0, i1 => i1, sel => sel, o => o);
end generate;
n2x : if tech = easic45 generate
mux : clkmux_n2x port map (i0 => i0, i1 => i1, sel => sel, o => o);
end generate;
ut90n : if tech = ut90 generate
x0 : clkmux_ut90nhbd port map (i0 => i0, i1 => i1, sel => seli, o => o);
end generate;
saed : if tech = saed32 generate
x0 : clkmux_saed32 port map (i0 => i0, i1 => i1, sel => seli, o => o);
end generate;
rhs : if tech = rhs65 generate
x0 : clkmux_rhs65 port map (i0 => i0, i1 => i1, sel => seli, o => o);
end generate;
dar : if tech = dare generate
x0 : clkmux_dare port map (i0 => i0, i1 => i1, sel => seli, o => o);
end generate;
rhu : if tech = rhumc generate
x0 : clkmux_rhumc port map (i0 => i0, i1 => i1, sel => seli, o => o);
end generate;
noxil : if not((is_unisim(tech) = 1) or (tech = rhlib18t) or (tech = ut130) or
(tech = easic45) or (tech = ut90) or (tech = saed32) or (tech = rhs65) or (tech = dare) or (tech = rhumc)) generate
o <= i0 when seli = '0' else i1;
end generate;
end generate;
gen : if has_clkmux(tech) = 0 generate
p0 : process(i0, rst)
begin
if rst = '0' then
sel0 <= '1';
elsif falling_edge(i0) then
sel0 <= (not seli) and (not sel1);
end if;
end process;
p1 : process(i1, rst)
begin
if rst = '0' then
sel1 <= '0';
elsif falling_edge(i1) then
sel1 <= seli and (not sel0);
end if;
end process;
cg0 <= i0 and sel0;
cg1 <= i1 and sel1;
o <= cg0 or cg1;
end generate;
end architecture;
|
gpl-3.0
|
EliasLuiz/TCC
|
Leon3/lib/gaisler/spi/spimctrl.vhd
|
1
|
39273
|
------------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2003 - 2008, Gaisler Research
-- Copyright (C) 2008 - 2014, Aeroflex Gaisler
-- Copyright (C) 2015 - 2016, Cobham Gaisler
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-------------------------------------------------------------------------------
-- Entity: spimctrl
-- File: spimctrl.vhd
-- Author: Jan Andersson - Aeroflex Gaisler AB
-- [email protected]
--
-- Description: SPI flash memory controller. Supports a wide range of SPI
-- memory devices with the data read instruction configurable via
-- generics. Also has limited support for initializing and reading
-- SD Cards in SPI mode.
--
-- The controller has two memory areas. The flash area where the flash memory
-- is directly mapped and the I/O area where core registers are mapped.
--
-- Revision 1 added support for burst reads when sdcard = 0
--
-- Post revision 1: Remove support for SD card by commenting out code
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
library grlib;
use grlib.amba.all;
use grlib.devices.all;
use grlib.stdlib.all;
library gaisler;
use gaisler.spi.all;
entity spimctrl is
generic (
hindex : integer := 0; -- AHB slave index
hirq : integer := 0; -- Interrupt line
faddr : integer := 16#000#; -- Flash map base address
fmask : integer := 16#fff#; -- Flash area mask
ioaddr : integer := 16#000#; -- I/O base address
iomask : integer := 16#fff#; -- I/O mask
spliten : integer := 0; -- AMBA SPLIT support
oepol : integer := 0; -- Output enable polarity
sdcard : integer range 0 to 0 := 0; -- Unused
readcmd : integer range 0 to 255 := 16#0B#; -- Mem. dev. READ command
dummybyte : integer range 0 to 1 := 1; -- Dummy byte after cmd
dualoutput : integer range 0 to 1 := 0; -- Enable dual output
scaler : integer range 1 to 512 := 1; -- SCK scaler
altscaler : integer range 1 to 512 := 1; -- Alternate SCK scaler
pwrupcnt : integer := 0; -- System clock cycles to init
maxahbaccsz : integer range 0 to 256 := AHBDW; -- Max AHB access size
offset : integer := 0
);
port (
rstn : in std_ulogic;
clk : in std_ulogic;
ahbsi : in ahb_slv_in_type;
ahbso : out ahb_slv_out_type;
spii : in spimctrl_in_type;
spio : out spimctrl_out_type
);
end spimctrl;
architecture rtl of spimctrl is
constant REVISION : amba_version_type := 1;
constant HCONFIG : ahb_config_type := (
0 => ahb_device_reg(VENDOR_GAISLER, GAISLER_SPIMCTRL, 0, REVISION, hirq),
4 => ahb_iobar(ioaddr, iomask),
5 => ahb_membar(faddr, '1', '1', fmask),
others => zero32);
-- BANKs
constant CTRL_BANK : integer := 0;
constant FLASH_BANK : integer := 1;
constant MAXDW : integer := maxahbaccsz;
-----------------------------------------------------------------------------
-- SD card constants
-----------------------------------------------------------------------------
-- constant SD_BLEN : integer := 4;
-- constant SD_CRC_BYTE : std_logic_vector(7 downto 0) := X"95";
-- constant SD_BLOCKLEN : std_logic_vector(31 downto 0) :=
-- conv_std_logic_vector(SD_BLEN, 32);
-- -- Commands
-- constant SD_CMD0 : std_logic_vector(5 downto 0) := "000000";
-- constant SD_CMD16 : std_logic_vector(5 downto 0) := "010000";
-- constant SD_CMD17 : std_logic_vector(5 downto 0) := "010001";
-- constant SD_CMD55 : std_logic_vector(5 downto 0) := "110111";
-- constant SD_ACMD41 : std_logic_vector(5 downto 0) := "101001";
-- -- Command timeout
-- constant SD_CMD_TIMEOUT : integer := 100;
-- -- Data token timeout
-- constant SD_DATATOK_TIMEOUT : integer := 312500;
-----------------------------------------------------------------------------
-- SPI device constants
-----------------------------------------------------------------------------
-- Length of read instruction argument-1
constant SPI_ARG_LEN : integer := 2 + dummybyte;
-----------------------------------------------------------------------------
-- Core constants
-----------------------------------------------------------------------------
-- OEN
constant OUTPUT : std_ulogic := conv_std_logic(oepol = 1); -- Enable outputs
constant INPUT : std_ulogic := not OUTPUT; -- Tri-state outputs
-- Register offsets
constant CONF_REG_OFF : std_logic_vector(7 downto 2) := "000000";
constant CTRL_REG_OFF : std_logic_vector(7 downto 2) := "000001";
constant STAT_REG_OFF : std_logic_vector(7 downto 2) := "000010";
constant RX_REG_OFF : std_logic_vector(7 downto 2) := "000011";
constant TX_REG_OFF : std_logic_vector(7 downto 2) := "000100";
-----------------------------------------------------------------------------
-- Subprograms
-----------------------------------------------------------------------------
-- Description: Determines required size of timer used for clock scaling
function timer_size
return integer is
begin -- timer_size
if altscaler > scaler then
return altscaler;
end if;
return scaler;
end timer_size;
-- Description: Returns the number of bits required for the haddr vector to
-- be able to save the Flash area address.
function req_addr_bits
return integer is
begin -- req_addr_bits
case fmask is
when 16#fff# => return 20;
when 16#ffe# => return 21;
when 16#ffc# => return 22;
when 16#ff8# => return 23;
when 16#ff0# => return 24;
when 16#fe0# => return 25;
when 16#fc0# => return 26;
when 16#f80# => return 27;
when 16#f00# => return 28;
when 16#e00# => return 29;
when 16#c00# => return 30;
when others => return 31;
end case;
end req_addr_bits;
-- Description: Returns true if SCK clock should transition
function sck_toggle (
curr : std_logic_vector((timer_size-1) downto 0);
last : std_logic_vector((timer_size-1) downto 0);
usealtscaler : boolean)
return boolean is
begin -- sck_toggle
if usealtscaler then
return (curr(altscaler-1) xor last(altscaler-1)) = '1';
end if;
return (curr(scaler-1) xor last(scaler-1)) = '1';
end sck_toggle;
-- Description: Short for conv_std_logic_vector, avoiding an alias
function cslv (
i : integer;
w : integer)
return std_logic_vector is
begin -- cslv
return conv_std_logic_vector(i,w);
end cslv;
-- Description: Calculates value for spi.cnt based on AMBA HSIZE
function calc_spi_cnt (
hsize : std_logic_vector(2 downto 0))
return std_logic_vector is
variable cnt : std_logic_vector(4 downto 0) := (others => '0');
begin -- calc_spi_cnt
for i in 0 to 4 loop
if i < conv_integer(hsize) then
cnt(i) := '1';
end if;
end loop; -- i
return cnt;
end calc_spi_cnt;
-----------------------------------------------------------------------------
-- States
-----------------------------------------------------------------------------
-- Main FSM states
type spimstate_type is (IDLE, AHB_RESPOND, USER_SPI, BUSY);
-- SPI device FSM states
type spistate_type is (SPI_PWRUP, SPI_READY, SPI_READ, SPI_ADDR, SPI_DATA);
-- SD FSM states
type sdstate_type is (SD_CHECK_PRES, SD_PWRUP0, SD_PWRUP1, SD_INIT_IDLE,
SD_ISS_ACMD41, SD_CHECK_CMD16, SD_READY,
SD_CHECK_CMD17, SD_CHECK_TOKEN, SD_HANDLE_DATA,
SD_SEND_CMD, SD_GET_RESP);
-----------------------------------------------------------------------------
-- Types
-----------------------------------------------------------------------------
type spim_ctrl_reg_type is record -- Control register
eas : std_ulogic; -- Enable alternate scaler
ien : std_ulogic; -- Interrupt enable
usrc : std_ulogic; -- User mode
end record;
type spim_stat_reg_type is record -- Status register
busy : std_ulogic; -- Core busy
done : std_ulogic; -- User operation done
end record;
type spim_regif_type is record -- Register bank
ctrl : spim_ctrl_reg_type; -- Control register
stat : spim_stat_reg_type; -- Status register
end record;
-- type sdcard_type is record -- Present when SD card
-- state : sdstate_type; -- SD state
-- tcnt : std_logic_vector(2 downto 0); -- Transmit count
-- rcnt : std_logic_vector(3 downto 0); -- Receive count
-- cmd : std_logic_vector(5 downto 0); -- SD command
-- rstate : sdstate_type; -- Return state
-- htb : std_ulogic; -- Handle trailing byte
-- vresp : std_ulogic; -- Valid response
-- cd : std_ulogic; -- Synchronized card detect
-- timeout : std_ulogic; -- Timeout status bit
-- dtocnt : std_logic_vector(18 downto 0); -- Data token timeout counter
-- ctocnt : std_logic_vector(6 downto 0); -- CMD resp. timeout counter
-- end record;
type spiflash_type is record -- Present when !SD card
state : spistate_type; -- Mem. device comm. state
cnt : std_logic_vector(4 downto 0); -- Generic counter
hsize : std_logic_vector(2 downto 0); -- Size of access
hburst : std_logic_vector(0 downto 0); -- Incremental burst
end record;
type spimctrl_in_array is array (1 downto 0) of spimctrl_in_type;
type spim_reg_type is record
-- Common
spimstate : spimstate_type; -- Main FSM
rst : std_ulogic; -- Reset
reg : spim_regif_type; -- Register bank
timer : std_logic_vector((timer_size-1) downto 0);
sample : std_logic_vector(1 downto 0); -- Sample data line
bd : std_ulogic;
sreg : std_logic_vector(7 downto 0); -- Shiftreg
bcnt : std_logic_vector(2 downto 0); -- Bit counter
go : std_ulogic; -- SPI comm. active
stop : std_ulogic; -- Stop SPI comm.
ar : std_logic_vector(MAXDW-1 downto 0); -- argument/response
hold : std_ulogic; -- Do not shift ar
insplit : std_ulogic; -- SPLIT response issued
unsplit : std_ulogic; -- SPLIT complete not issued
-- SPI flash device
spi : spiflash_type; -- Used when !SD card
-- SD
-- sd : sdcard_type; -- Used when SD card
-- AHB
irq : std_ulogic; -- Interrupt request
hsize : std_logic_vector(2 downto 0);
hwrite : std_ulogic;
hsel : std_ulogic;
hmbsel : std_logic_vector(0 to 1);
haddr : std_logic_vector((req_addr_bits-1) downto 0);
hready : std_ulogic;
frdata : std_logic_vector(MAXDW-1 downto 0); -- Flash response data
rrdata : std_logic_vector(7 downto 0); -- Register response data
hresp : std_logic_vector(1 downto 0);
splmst : std_logic_vector(log2(NAHBMST)-1 downto 0); -- SPLIT:ed master
hsplit : std_logic_vector(NAHBMST-1 downto 0); -- Other SPLIT:ed masters
ahbcancel : std_ulogic; -- Locked access cancels ongoing SPLIT
-- response
hburst : std_logic_vector(0 downto 0);
seq : std_ulogic; -- Sequential burst
-- Inputs and outputs
spii : spimctrl_in_array;
spio : spimctrl_out_type;
end record;
-----------------------------------------------------------------------------
-- Signals
-----------------------------------------------------------------------------
signal r, rin : spim_reg_type;
begin -- rtl
comb: process (r, rstn, ahbsi, spii)
variable v : spim_reg_type;
variable change : std_ulogic;
variable regaddr : std_logic_vector(7 downto 2);
variable hsplit : std_logic_vector(NAHBMST-1 downto 0);
variable ahbirq : std_logic_vector((NAHBIRQ-1) downto 0);
variable lastbit : std_ulogic;
variable enable_altscaler : boolean;
variable disable_flash : boolean;
variable read_flash : boolean;
variable hrdata : std_logic_vector(MAXDW-1 downto 0);
variable hwdatax : std_logic_vector(31 downto 0);
variable hwdata : std_logic_vector(7 downto 0);
begin -- process comb
v := r; v.spii := r.spii(0) & spii; v.sample := r.sample(0) & '0';
change := '0'; v.irq := '0'; v.hresp := HRESP_OKAY; v.hready := '1';
regaddr := r.haddr(7 downto 2); hsplit := (others => '0');
hwdatax := ahbreadword(ahbsi.hwdata, r.haddr(4 downto 2));
hwdata := hwdatax(7 downto 0);
ahbirq := (others => '0'); ahbirq(hirq) := r.irq;
-- if sdcard = 1 then v.sd.cd := r.spii(0).cd; else v.sd.cd := '0'; end if;
read_flash := false;
enable_altscaler := (not r.spio.initialized or r.reg.ctrl.eas) = '1';
-- disable_flash := (r.spio.errorn = '0' or r.reg.ctrl.usrc = '1' or
disable_flash := (r.reg.ctrl.usrc = '1' or
r.spio.initialized = '0' or r.spimstate = USER_SPI);
if dualoutput = 1 and sdcard = 0 then
lastbit := andv(r.bcnt(1 downto 0)) and
((r.spio.mosioen xnor INPUT) or r.bcnt(2));
else
lastbit := andv(r.bcnt);
end if;
v.bd := lastbit and r.sample(0);
---------------------------------------------------------------------------
-- AHB communication
---------------------------------------------------------------------------
if ahbsi.hready = '1' then
if (ahbsi.hsel(hindex) and ahbsi.htrans(1)) = '1' then
v.hmbsel := ahbsi.hmbsel(r.hmbsel'range);
if (spliten = 0 or r.spimstate /= AHB_RESPOND or
ahbsi.hmbsel(CTRL_BANK) = '1' or ahbsi.hmastlock = '1') then
-- Writes to register space have no wait state
v.hready := ahbsi.hmbsel(CTRL_BANK) and ahbsi.hwrite;
v.hsize := ahbsi.hsize;
v.hwrite := ahbsi.hwrite;
v.haddr := ahbsi.haddr(r.haddr'range);
v.hsel := '1';
if ahbsi.hmbsel(FLASH_BANK) = '1' then
if sdcard = 0 then
v.hburst(r.hburst'range) := ahbsi.hburst(r.hburst'range);
v.seq := ahbsi.htrans(0);
end if;
if ahbsi.hwrite = '1' or disable_flash then
v.hresp := HRESP_ERROR;
v.hsel := '0';
else
if spliten /= 0 then
if ahbsi.hmastlock = '0' then
v.hresp := HRESP_SPLIT;
v.splmst := ahbsi.hmaster;
v.unsplit := '1';
else
v.ahbcancel := r.insplit;
end if;
v.insplit := not ahbsi.hmastlock;
end if;
end if;
end if;
else
-- Core is busy, transfer is not locked and access was to flash
-- area. Respond with SPLIT or insert wait states
v.hready := '0';
if spliten /= 0 then
v.hresp := HRESP_SPLIT;
v.hsplit(conv_integer(ahbsi.hmaster)) := '1';
end if;
end if;
else
v.hsel := '0';
end if;
end if;
if (r.hready = '0') then
if (r.hresp = HRESP_OKAY) then v.hready := '0';
else v.hresp := r.hresp; end if;
end if;
-- Read access to core registers
if (r.hsel and r.hmbsel(CTRL_BANK) and not r.hwrite) = '1' then
v.rrdata := (others => '0');
v.hready := '1';
v.hsel := '0';
case regaddr is
when CONF_REG_OFF =>
-- if sdcard = 1 then
-- v.rrdata := (others => '0');
-- else
v.rrdata := cslv(readcmd, 8);
-- end if;
when CTRL_REG_OFF =>
v.rrdata(3) := r.spio.csn;
v.rrdata(2) := r.reg.ctrl.eas;
v.rrdata(1) := r.reg.ctrl.ien;
v.rrdata(0) := r.reg.ctrl.usrc;
when STAT_REG_OFF =>
-- v.rrdata(5) := r.sd.cd;
-- v.rrdata(4) := r.sd.timeout;
-- v.rrdata(3) := not r.spio.errorn;
v.rrdata(2) := r.spio.initialized;
v.rrdata(1) := r.reg.stat.busy;
v.rrdata(0) := r.reg.stat.done;
when RX_REG_OFF => v.rrdata := r.ar(7 downto 0);
when others => null;
end case;
end if;
-- Write access to core registers
if (r.hsel and r.hmbsel(CTRL_BANK) and r.hwrite) = '1' then
case regaddr is
when CTRL_REG_OFF =>
v.rst := hwdata(4);
if (r.reg.ctrl.usrc and not hwdata(0)) = '1' then
v.spio.csn := '1';
elsif hwdata(0) = '1' then
v.spio.csn := hwdata(3);
end if;
v.reg.ctrl.eas := hwdata(2);
v.reg.ctrl.ien := hwdata(1);
v.reg.ctrl.usrc := hwdata(0);
when STAT_REG_OFF =>
-- v.spio.errorn := r.spio.errorn or hwdata(3);
v.reg.stat.done := r.reg.stat.done and not hwdata(0);
when RX_REG_OFF => null;
when TX_REG_OFF =>
if r.reg.ctrl.usrc = '1' then
v.sreg := hwdata(7 downto 0);
end if;
when others => null;
end case;
end if;
---------------------------------------------------------------------------
-- SPIMCTRL control FSM
---------------------------------------------------------------------------
v.reg.stat.busy := '1';
case r.spimstate is
when BUSY =>
-- Wait for core to finish user mode access
if (r.go or r.spio.sck) = '0' then
v.spimstate := IDLE;
v.reg.stat.done:= '1';
v.irq := r.reg.ctrl.ien;
end if;
when AHB_RESPOND =>
if r.spio.ready = '1' then
if spliten /= 0 and r.unsplit = '1' then
hsplit(conv_integer(r.splmst)) := '1';
v.unsplit := '0';
end if;
if ((spliten = 0 or v.ahbcancel = '0') and
(spliten = 0 or ahbsi.hmaster = r.splmst or r.insplit = '0') and
(((ahbsi.hsel(hindex) and ahbsi.hready and ahbsi.htrans(1)) = '1') or
((spliten = 0 or r.insplit = '0') and r.hready = '0' and r.hresp = HRESP_OKAY))) then
v.spimstate := IDLE;
v.hresp := HRESP_OKAY;
if spliten /= 0 then
v.insplit := '0';
v.hsplit := r.hsplit;
end if;
v.hready := '1';
v.hsel := '0';
-- if r.spio.errorn = '0' then
-- v.hready := '0';
-- v.hresp := HRESP_ERROR;
-- end if;
elsif spliten /= 0 and v.ahbcancel = '1' then
v.spimstate := IDLE;
v.ahbcancel := '0';
end if;
end if;
when USER_SPI =>
if r.bd = '1' then
v.spimstate := BUSY;
v.hold := '1';
end if;
when others => -- IDLE
if spliten /= 0 and r.hresp /= HRESP_SPLIT then
hsplit := r.hsplit;
v.hsplit := (others => '0');
end if;
v.reg.stat.busy := '0';
if r.hsel = '1' then
if r.hmbsel(FLASH_BANK) = '1' then
-- Access to memory mapped flash area
v.spimstate := AHB_RESPOND;
read_flash := true;
elsif regaddr = TX_REG_OFF and (r.hwrite and r.reg.ctrl.usrc) = '1' then
-- Access to core transmit register
v.spimstate := USER_SPI;
v.go := '1';
v.stop := '1';
change := '1';
v.hold := '0';
if sdcard = 0 and dualoutput = 1 then
v.spio.mosioen := OUTPUT;
end if;
end if;
end if;
end case;
---------------------------------------------------------------------------
-- SD Card specific code
---------------------------------------------------------------------------
-- SD card initialization sequence:
-- * Check if card is present
-- * Perform power-up initialization sequence
-- * Issue CMD0 GO_IDLE_STATE
-- * Issue CMD55 APP_CMD
-- * Issue ACMD41 SEND_OP_COND
-- * Issue CMD16 SET_BLOCKLEN
-- if sdcard = 1 then
-- case r.sd.state is
-- when SD_PWRUP0 =>
-- v.go := '1';
-- v.sd.vresp := '1';
-- v.sd.state := SD_GET_RESP;
-- v.sd.rstate := SD_PWRUP1;
-- v.sd.rcnt := cslv(2, r.sd.rcnt'length);
-- when SD_PWRUP1 =>
-- v.sd.state := SD_SEND_CMD;
-- v.sd.rstate := SD_INIT_IDLE;
-- v.sd.cmd := SD_CMD0;
-- v.sd.rcnt := (others => '0');
-- v.ar := (others => '0');
-- when SD_INIT_IDLE =>
-- v.sd.state := SD_SEND_CMD;
-- v.sd.rcnt := (others => '0');
-- if r.ar(0) = '0' and r.sd.cmd /= SD_CMD0 then
-- v.sd.cmd := SD_CMD16;
-- v.ar := SD_BLOCKLEN;
-- v.sd.rstate := SD_CHECK_CMD16;
-- else
-- v.sd.cmd := SD_CMD55;
-- v.ar := (others => '0');
-- v.sd.rstate := SD_ISS_ACMD41;
-- end if;
-- when SD_ISS_ACMD41 =>
-- v.sd.state := SD_SEND_CMD;
-- v.sd.cmd := SD_ACMD41;
-- v.sd.rcnt := (others => '0');
-- v.ar := (others => '0');
-- v.sd.rstate := SD_INIT_IDLE;
-- when SD_CHECK_CMD16 =>
-- if r.ar(7 downto 0) /= zero32(7 downto 0) then
-- v.spio.errorn := '0';
-- else
-- v.spio.errorn := '1';
-- v.spio.initialized := '1';
-- v.sd.timeout := '0';
-- end if;
-- v.sd.state := SD_READY;
-- when SD_READY =>
-- v.spio.ready := '1';
-- v.sd.cmd := SD_CMD17;
-- v.sd.rstate := SD_CHECK_CMD17;
-- if read_flash then
-- v.sd.state := SD_SEND_CMD;
-- v.spio.ready := '0';
-- v.ar := (others => '0');
-- v.ar(r.haddr'left downto 2) := r.haddr(r.haddr'left downto 2);
-- end if;
-- when SD_CHECK_CMD17 =>
-- if r.ar(7 downto 0) /= X"00" then
-- v.sd.state := SD_READY;
-- v.spio.errorn := '0';
-- else
-- v.sd.rstate := SD_CHECK_TOKEN;
-- v.spio.csn := '0';
-- v.go := '1';
-- change := '1';
-- end if;
-- v.sd.dtocnt := cslv(SD_DATATOK_TIMEOUT, r.sd.dtocnt'length);
-- v.sd.state := SD_GET_RESP;
-- v.sd.vresp := '1';
-- v.hold := '0';
-- when SD_CHECK_TOKEN =>
-- if (r.ar(7 downto 5) = "111" and
-- r.sd.dtocnt /= zero32(r.sd.dtocnt'range)) then
-- v.sd.dtocnt := r.sd.dtocnt - 1;
-- v.sd.state := SD_GET_RESP;
-- if r.ar(0) = '0' then
-- v.sd.rstate := SD_HANDLE_DATA;
-- v.sd.rcnt := cslv(SD_BLEN-1, r.sd.rcnt'length);
-- end if;
-- v.spio.csn := '0';
-- v.go := '1';
-- change := '1';
-- else
-- v.spio.errorn := '0';
-- v.sd.state := SD_READY;
-- end if;
-- v.sd.timeout := not orv(r.sd.dtocnt);
-- v.sd.ctocnt := cslv(SD_CMD_TIMEOUT, r.sd.ctocnt'length);
-- v.hold := '0';
-- when SD_HANDLE_DATA =>
-- v.frdata := r.ar;
-- -- Receive and discard CRC
-- v.sd.state := SD_GET_RESP;
-- v.sd.rstate := SD_READY;
-- v.sd.htb := '1';
-- v.spio.csn := '0';
-- v.go := '1';
-- change := '1';
-- v.sd.vresp := '1';
-- v.spio.errorn := '1';
-- when SD_SEND_CMD =>
-- v.sd.htb := '1';
-- v.sd.vresp := '0';
-- v.spio.csn := '0';
-- v.sd.ctocnt := cslv(SD_CMD_TIMEOUT, r.sd.ctocnt'length);
-- if (v.bd or not r.go) = '1'then
-- v.hold := '0';
-- case r.sd.tcnt is
-- when "000" => v.sreg := "01" & r.sd.cmd;
-- v.hold := '1'; change := '1';
-- when "001" => v.sreg := r.ar(31 downto 24);
-- when "010" => v.sreg := r.ar(30 downto 23);
-- when "011" => v.sreg := r.ar(30 downto 23);
-- when "100" => v.sreg := r.ar(30 downto 23);
-- when "101" => v.sreg := SD_CRC_BYTE;
-- when others => v.sd.state := SD_GET_RESP;
-- end case;
-- v.go := '1';
-- v.sd.tcnt := r.sd.tcnt + 1;
-- end if;
-- when SD_GET_RESP =>
-- if v.bd = '1' then
-- if r.sd.vresp = '1' or r.sd.ctocnt = zero32(r.sd.ctocnt'range) then
-- if r.sd.rcnt = zero32(r.sd.rcnt'range) then
-- if r.sd.htb = '0' then
-- v.spio.csn := '1';
-- end if;
-- v.sd.htb := '0';
-- v.hold := '1';
-- else
-- v.sd.rcnt := r.sd.rcnt - 1;
-- end if;
-- else
-- v.sd.ctocnt := r.sd.ctocnt - 1;
-- end if;
-- end if;
-- if lastbit = '1' then
-- v.sd.vresp := r.sd.vresp or not r.ar(6);
-- if r.sd.rcnt = zero32(r.sd.rcnt'range) then
-- v.stop := r.sd.vresp and r.go and not r.sd.htb;
-- end if;
-- end if;
-- if r.sd.ctocnt = zero32(r.sd.ctocnt'range) then
-- v.stop := r.go;
-- end if;
-- if (r.go or r.spio.sck) = '0' then
-- v.sd.state := r.sd.rstate;
-- if r.sd.ctocnt = zero32(r.sd.ctocnt'range) then
-- if r.spio.initialized = '1' then
-- v.sd.state := SD_READY;
-- else
-- -- Try to initialize again
-- v.sd.state := SD_CHECK_PRES;
-- end if;
-- v.spio.errorn := '0';
-- v.sd.timeout := '1';
-- end if;
-- v.spio.csn := '1';
-- end if;
-- v.sd.tcnt := (others => '0');
-- when others => -- SD_CHECK_PRES
-- if r.sd.cd = '1' then
-- v.go := '1';
-- v.spio.csn := '0';
-- v.sd.state := SD_GET_RESP;
-- v.spio.cdcsnoen := OUTPUT;
-- end if;
-- v.sd.htb := '0';
-- v.sd.vresp := '1';
-- v.sd.rstate := SD_PWRUP0;
-- v.sd.rcnt := cslv(10, r.sd.rcnt'length);
-- v.sd.ctocnt := cslv(SD_CMD_TIMEOUT, r.sd.ctocnt'length);
-- end case;
-- end if;
---------------------------------------------------------------------------
-- SPI Flash (non SD) specific code
---------------------------------------------------------------------------
if sdcard = 0 then
case r.spi.state is
when SPI_READ =>
if r.go = '0' then
v.go := '1';
change := '1';
end if;
v.spi.cnt := cslv(SPI_ARG_LEN, r.spi.cnt'length);
if v.bd = '1' then
v.sreg := r.ar(23 downto 16);
end if;
if r.bd = '1' then
v.hold := '0';
v.spi.state := SPI_ADDR;
end if;
when SPI_ADDR =>
if v.bd = '1' then
v.sreg := r.ar(22 downto 15);
if dualoutput = 1 then
if r.spi.cnt = zero32(r.spi.cnt'range) then
v.spio.mosioen := INPUT;
end if;
end if;
end if;
if r.bd = '1' then
if r.spi.cnt = zero32(r.spi.cnt'range) then
v.spi.state := SPI_DATA;
v.spi.cnt := calc_spi_cnt(r.spi.hsize);
else
v.spi.cnt := r.spi.cnt - 1;
end if;
end if;
when SPI_DATA =>
if v.bd = '1' then
v.spi.cnt := r.spi.cnt - 1;
end if;
if lastbit = '1' and r.spi.cnt = zero32(r.spi.cnt'range) then
v.stop := r.go;
end if;
if (r.go or r.spio.sck) = '0' then
if r.spi.hburst(0) = '0' then -- not an incrementing burst
v.spi.state := SPI_PWRUP; -- CSN wait
v.spio.csn := '1';
v.go := '1';
v.stop := '1';
v.seq := '1'; -- Make right choice in SPI_PWRUP
v.bcnt := "110";
else
v.spi.state := SPI_READY;
end if;
v.hold := '1';
end if;
when SPI_READY =>
v.spio.ready := '1';
if read_flash then
v.go := '1';
if dualoutput = 1 then
v.bcnt(2) := '0';
end if;
if r.spio.csn = '1' then
-- New access, command and address
v.go := '0';
v.spio.csn := '0';
v.spi.state := SPI_READ;
elsif r.seq = '1' then
-- Continuation of burst
v.spi.state := SPI_DATA;
v.hold := '0';
else
-- Burst ended and new access
v.stop := '1';
v.spio.csn := '1';
v.spi.state := SPI_PWRUP;
v.bcnt := "011";
end if;
v.ar := (others => '0');
if offset /= 0 then
v.ar(r.haddr'range) := r.haddr + cslv(offset, req_addr_bits);
else
v.ar(r.haddr'range) := r.haddr;
end if;
v.spio.ready := '0';
v.sreg := cslv(readcmd, 8);
end if;
if r.spio.ready = '0' then
case r.spi.hsize is
when HSIZE_BYTE =>
for i in 0 to (MAXDW/8-1) loop
v.frdata(7+8*i downto 8*i):= r.ar(7 downto 0);
end loop; -- i
when HSIZE_HWORD =>
for i in 0 to (MAXDW/16-1) loop
v.frdata(15+16*i downto 16*i) := r.ar(15 downto 0);
end loop; -- i
when HSIZE_WORD =>
for i in 0 to (MAXDW/32-1) loop
v.frdata(31+32*i downto 32*i) := r.ar(31 downto 0);
end loop; -- i
when HSIZE_DWORD =>
if MAXDW > 32 and AHBDW > 32 then
for i in 0 to (MAXDW/64-1) loop
if MAXDW = 64 then
v.frdata(MAXDW-1+MAXDW*i downto MAXDW*i) :=
r.ar(MAXDW-1 downto 0);
elsif MAXDW = 128 then
v.frdata(MAXDW/2-1+MAXDW/2*i downto MAXDW/2*i) :=
r.ar(MAXDW/2-1 downto 0);
else
v.frdata(MAXDW/4-1+MAXDW/4*i downto MAXDW/4*i) :=
r.ar(MAXDW/4-1 downto 0);
end if;
end loop; -- i
else
null;
end if;
when HSIZE_4WORD =>
if MAXDW > 64 and AHBDW > 64 then
for i in 0 to (MAXDW/128-1) loop
if MAXDW = 128 then
v.frdata(MAXDW-1+MAXDW*i downto MAXDW*i) :=
r.ar(MAXDW-1 downto 0);
else
v.frdata(MAXDW/2-1+MAXDW/2*i downto MAXDW/2*i) :=
r.ar(MAXDW/2-1 downto 0);
end if;
end loop; -- i
else
null;
end if;
when others =>
if MAXDW > 128 and AHBDW > 128 then
v.frdata := r.ar;
else
null;
end if;
end case;
end if;
v.spi.hsize := r.hsize;
v.spi.hburst(0) := r.hburst(0);
v.spi.cnt := calc_spi_cnt(r.spi.hsize);
when others => -- SPI_PWRUP
v.hold := '1';
if r.spio.initialized = '1' then
-- Chip select wait
if (r.go or r.spio.sck) = '0' then
if r.seq = '1' then
v.spi.state := SPI_READY;
else
v.spi.state := SPI_READ;
v.spio.csn := '0';
end if;
if dualoutput = 1 then
v.spio.mosioen := OUTPUT;
v.bcnt(2) := '0';
end if;
end if;
else
-- Power up wait
if pwrupcnt /= 0 then
v.frdata := r.frdata - 1;
if r.frdata = zahbdw(r.frdata'range) then
v.spio.initialized := '1';
v.spi.state := SPI_READY;
end if;
else
v.spio.initialized := '1';
v.spi.state := SPI_READY;
end if;
end if;
end case;
end if;
---------------------------------------------------------------------------
-- SPI communication
---------------------------------------------------------------------------
-- Clock generation
if (r.go or r.spio.sck) = '1' then
v.timer := r.timer - 1;
if sck_toggle(v.timer, r.timer, enable_altscaler) then
v.spio.sck := not r.spio.sck;
v.sample(0) := not r.spio.sck;
change := r.spio.sck and r.go;
if (v.stop and lastbit and not r.spio.sck) = '1' then
v.go := '0';
v.stop := '0';
end if;
end if;
else
v.timer := (others => '1');
end if;
if r.sample(0) = '1' then
v.bcnt := r.bcnt + 1;
end if;
if r.sample(1-sdcard) = '1' then
if r.hold = '0' then
if sdcard = 0 and dualoutput = 1 and r.spio.mosioen = INPUT then
v.ar := r.ar(r.ar'left-2 downto 0) & r.spii(1-sdcard).miso & r.spii(1-sdcard).mosi;
else
v.ar := r.ar(r.ar'left-1 downto 0) & r.spii(1-sdcard).miso;
end if;
end if;
end if;
if change = '1' then
v.spio.mosi := v.sreg(7);
if sdcard = 1 or r.spi.state /= SPI_PWRUP then
v.sreg(7 downto 0) := v.sreg(6 downto 0) & '1';
end if;
end if;
---------------------------------------------------------------------------
-- System and core reset
---------------------------------------------------------------------------
if (not rstn or r.rst) = '1' then
-- if sdcard = 1 then
-- v.sd.state := SD_CHECK_PRES;
-- v.spio.cdcsnoen := INPUT;
-- v.sd.timeout := '0';
-- else
v.spi.state := SPI_PWRUP;
v.frdata := cslv(pwrupcnt, r.frdata'length);
v.spio.cdcsnoen := OUTPUT;
-- end if;
v.spimstate := IDLE;
v.rst := '0';
--
v.reg.ctrl := ('0', '0', '0');
v.reg.stat.done := '0';
--
v.sample := (others => '0');
v.sreg := (others => '1');
v.bcnt := (others => '0');
v.go := '0';
v.stop := '0';
v.hold := '0';
v.unsplit := '0';
--
v.hready := '1';
v.hwrite := '0';
v.hsel := '0';
v.hmbsel := (others => '0');
v.ahbcancel := '0';
--
v.spio.sck := '0';
v.spio.mosi := '1';
v.spio.mosioen := OUTPUT;
v.spio.csn := '1';
-- v.spio.errorn := '1';
v.spio.initialized := '0';
v.spio.ready := '0';
end if;
---------------------------------------------------------------------------
-- Drive unused signals
---------------------------------------------------------------------------
-- if sdcard = 1 then
-- v.spi.state := SPI_PWRUP;
-- v.spi.cnt := (others => '0');
-- v.spi.hsize := (others => '0');
-- v.spi.hburst := (others => '0');
-- v.hburst := (others => '0');
-- v.seq := '0';
-- else
-- v.sd.state := SD_CHECK_PRES;
-- v.sd.tcnt := (others => '0');
-- v.sd.rcnt := (others => '0');
-- v.sd.cmd := (others => '0');
-- v.sd.rstate := SD_CHECK_PRES;
-- v.sd.htb := '0';
-- v.sd.vresp := '0';
-- v.sd.timeout := '0';
-- v.sd.dtocnt := (others => '0');
-- v.sd.ctocnt := (others => '0');
-- end if;
if spliten = 0 then
v.insplit := '0';
v.unsplit := '0';
v.splmst := (others => '0');
v.hsplit := (others => '0');
v.ahbcancel := '0';
end if;
---------------------------------------------------------------------------
-- Signal assignments
---------------------------------------------------------------------------
-- Core registers
rin <= v;
-- AHB slave output
ahbso.hready <= r.hready;
ahbso.hresp <= r.hresp;
if r.hmbsel(CTRL_BANK) = '1' then
for i in 0 to (MAXDW/32-1) loop
hrdata(31 + 32*i downto 32*i) := zero32(31 downto 8) & r.rrdata;
end loop;
else
hrdata := r.frdata;
end if;
ahbso.hrdata <= ahbdrivedata(hrdata);
ahbso.hconfig <= HCONFIG;
ahbso.hirq <= ahbirq;
ahbso.hindex <= hindex;
ahbso.hsplit <= hsplit;
-- SPI signals
spio <= r.spio;
end process comb;
reg: process (clk)
begin -- process reg
if rising_edge(clk) then
r <= rin;
end if;
end process reg;
-- Boot message
-- pragma translate_off
bootmsg : report_version
generic map (
"spimctrl" & tost(hindex) & ": SPI memory controller rev " &
tost(REVISION) & ", irq " & tost(hirq));
-- pragma translate_on
end rtl;
|
gpl-3.0
|
fbelavenuto/msx1fpga
|
src/audio/vm2413/lineartable.vhd
|
2
|
5365
|
--
-- LinearTable.vhd
--
-- Copyright (c) 2006 Mitsutaka Okazaki ([email protected])
-- All rights reserved.
--
-- Redistribution and use of this source code or any derivative works, are
-- permitted provided that the following conditions are met:
--
-- 1. Redistributions of source code must retain the above copyright notice,
-- this list of conditions and the following disclaimer.
-- 2. Redistributions in binary form must reproduce the above copyright
-- notice, this list of conditions and the following disclaimer in the
-- documentation and/or other materials provided with the distribution.
-- 3. Redistributions may not be sold, nor may they be used in a commercial
-- product or activity without specific prior written permission.
--
-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-- "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
-- TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-- PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
-- CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
-- EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
-- PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
-- OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
-- WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
-- OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-- ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
--
--
--
-- modified by t.hara
--
-- ----------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use work.vm2413.all;
entity LinearTable is
port (
clk : in std_logic;
reset : in std_logic;
addr : in std_logic_vector( 13 downto 0 ); -- ® 8bit, ¬ 6bit
data : out signed_li_type
);
end LinearTable;
architecture rtl of lineartable is
type log2lin_type is array ( 0 to 127 ) of std_logic_vector( 8 downto 0 );
constant log2lin_data : log2lin_type := (
"111111111","111101001","111010100","111000000",
"110101101","110011011","110001010","101111001",
"101101001","101011010","101001011","100111101",
"100110000","100100011","100010111","100001011",
"100000000","011110101","011101010","011100000",
"011010111","011001110","011000101","010111101",
"010110101","010101101","010100110","010011111",
"010011000","010010010","010001011","010000110",
"010000000","001111010","001110101","001110000",
"001101011","001100111","001100011","001011110",
"001011010","001010111","001010011","001001111",
"001001100","001001001","001000110","001000011",
"001000000","000111101","000111011","000111000",
"000110110","000110011","000110001","000101111",
"000101101","000101011","000101001","000101000",
"000100110","000100100","000100011","000100001",
"000100000","000011110","000011101","000011100",
"000011011","000011001","000011000","000010111",
"000010110","000010101","000010100","000010100",
"000010011","000010010","000010001","000010000",
"000010000","000001111","000001110","000001110",
"000001101","000001101","000001100","000001011",
"000001011","000001010","000001010","000001010",
"000001001","000001001","000001000","000001000",
"000001000","000000111","000000111","000000111",
"000000110","000000110","000000110","000000101",
"000000101","000000101","000000101","000000101",
"000000100","000000100","000000100","000000100",
"000000100","000000011","000000011","000000011",
"000000011","000000011","000000011","000000011",
"000000010","000000010","000000010","000000010",
"000000010","000000010","000000010","000000000"
);
signal ff_sign : std_logic;
signal ff_weight : std_logic_vector( 5 downto 0 );
signal ff_data0 : std_logic_vector( 8 downto 0 );
signal ff_data1 : std_logic_vector( 8 downto 0 );
signal w_addr1 : std_logic_vector( 12 downto 6 );
signal w_data : std_logic_vector( 8 downto 0 );
signal w_sub : std_logic_vector( 9 downto 0 ); -- t«
signal w_mul : std_logic_vector( 9 downto 0 );
signal w_inter : std_logic_vector( 9 downto 0 );
begin
w_addr1 <= (addr( 12 downto 6 ) + 1) when( addr( 12 downto 6 ) /= "1111111" )else
"1111111";
process( clk )
begin
if( clk'event and clk = '1' )then
-- AhXwè³ê½ÌTCNÅηélªoÄéi1cycle delayj
ff_data0 <= log2lin_data( conv_integer( addr(12 downto 6) ) );
ff_data1 <= log2lin_data( conv_integer( w_addr1 ) );
end if;
end process;
process( clk )
begin
if( clk'event and clk = '1' )then
ff_sign <= addr( 13 );
ff_weight <= addr( 5 downto 0 );
end if;
end process;
-- âÔ (¦ðܽªéêÅÍ 0 ÉÈé©ç ff_sign ÍCɵȢj
-- o = i0 * (1 - k) + i1 * w = i0 - w * i0 + w * i1 = i0 + w * (i1 - i0)
w_sub <= ('0' & ff_data1) - ('0' & ff_data0);
u_linear_table_mul: entity work.LinearTableMul
port map (
i0 => ff_weight,
i1 => w_sub,
o => w_mul
);
w_inter <= ('0' & ff_data0) + w_mul;
process( clk )
begin
if( clk'event and clk = '1' )then
data <= (
sign => ff_sign,
value => w_inter( 8 downto 0 )
);
end if;
end process;
end rtl;
|
gpl-3.0
|
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