repo_name
stringlengths 6
79
| path
stringlengths 6
236
| copies
int64 1
472
| size
int64 137
1.04M
| content
stringlengths 137
1.04M
| license
stringclasses 15
values | hash
stringlengths 32
32
| alpha_frac
float64 0.25
0.96
| ratio
float64 1.51
17.5
| autogenerated
bool 1
class | config_or_test
bool 2
classes | has_no_keywords
bool 1
class | has_few_assignments
bool 1
class |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
lerwys/GitTest | hdl/modules/wb_un_cross/cross_uncross_core/un_cross_top.vhd | 1 | 7,329 | ------------------------------------------------------------------------------
-- Title : Cross and Uncross Top Entity
------------------------------------------------------------------------------
-- Author : José Alvim Berkenbrock
-- Company : CNPEM LNLS-DAC-DIG
-- Platform : FPGA-generic
-------------------------------------------------------------------------------
-- Description: This design is the top which put together all cores involved
-- in cross and uncross operation in channel pairs.
-------------------------------------------------------------------------------
-- Copyright (c) 2013 CNPEM
-- Licensed under GNU Lesser General Public License (LGPL) v3.0
-------------------------------------------------------------------------------
-- Revisions :
-- Date Version Author Description
-- 2013-04-09 1.0 jose.berkenbrock Created
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity un_cross_top is
generic(
g_delay_vec_width : natural range 0 to 16 := 16;
g_swap_div_freq_vec_width : natural range 0 to 16 := 16
);
port(
-- Commom signals
clk_i : in std_logic;
rst_n_i : in std_logic;
-- inv_chs_top core signal
const_aa_i : in std_logic_vector(15 downto 0);
const_bb_i : in std_logic_vector(15 downto 0);
const_cc_i : in std_logic_vector(15 downto 0);
const_dd_i : in std_logic_vector(15 downto 0);
const_ac_i : in std_logic_vector(15 downto 0);
const_bd_i : in std_logic_vector(15 downto 0);
const_ca_i : in std_logic_vector(15 downto 0);
const_db_i : in std_logic_vector(15 downto 0);
delay1_i : in std_logic_vector(g_delay_vec_width-1 downto 0);
delay2_i : in std_logic_vector(g_delay_vec_width-1 downto 0);
flag1_o : out std_logic;
flag2_o : out std_logic;
-- Input from ADC FMC board
cha_i : in std_logic_vector(15 downto 0);
chb_i : in std_logic_vector(15 downto 0);
chc_i : in std_logic_vector(15 downto 0);
chd_i : in std_logic_vector(15 downto 0);
-- Output to data processing level
cha_o : out std_logic_vector(15 downto 0);
chb_o : out std_logic_vector(15 downto 0);
chc_o : out std_logic_vector(15 downto 0);
chd_o : out std_logic_vector(15 downto 0);
-- Swap clock for RFFE
clk_swap_o : out std_logic;
clk_swap_en_i : in std_logic;
-- swap_cnt_top signal
mode1_i : in std_logic_vector(1 downto 0);
mode2_i : in std_logic_vector(1 downto 0);
swap_div_f_i : in std_logic_vector(g_swap_div_freq_vec_width-1 downto 0);
ext_clk_i : in std_logic;
ext_clk_en_i : in std_logic;
-- Output to RFFE board
ctrl1_o : out std_logic_vector(7 downto 0);
ctrl2_o : out std_logic_vector(7 downto 0)
);
end un_cross_top;
architecture rtl of un_cross_top is
signal status1 : std_logic;
signal status2 : std_logic;
-------------------------------------------------------
-- components declaration
-------------------------------------------------------
component swap_cnt_top
generic(
g_swap_div_freq_vec_width : natural range 0 to 16 := g_swap_div_freq_vec_width
);
port(
clk_i : in std_logic;
rst_n_i : in std_logic;
mode1_i : in std_logic_vector(1 downto 0);
mode2_i : in std_logic_vector(1 downto 0);
swap_div_f_i : in std_logic_vector(g_swap_div_freq_vec_width-1 downto 0);
ext_clk_i : in std_logic;
ext_clk_en_i : in std_logic;
clk_swap_o : out std_logic;
clk_swap_en_i : in std_logic;
status1_o : out std_logic;
status2_o : out std_logic;
ctrl1_o : out std_logic_vector(7 downto 0);
ctrl2_o : out std_logic_vector(7 downto 0)
);
end component;
component inv_chs_top
generic(
g_delay_vec_width : natural range 0 to 16 := g_delay_vec_width
);
port(
clk_i : in std_logic;
rst_n_i : in std_logic;
const_aa_i : in std_logic_vector(15 downto 0);
const_bb_i : in std_logic_vector(15 downto 0);
const_cc_i : in std_logic_vector(15 downto 0);
const_dd_i : in std_logic_vector(15 downto 0);
const_ac_i : in std_logic_vector(15 downto 0);
const_bd_i : in std_logic_vector(15 downto 0);
const_ca_i : in std_logic_vector(15 downto 0);
const_db_i : in std_logic_vector(15 downto 0);
delay1_i : in std_logic_vector(g_delay_vec_width-1 downto 0);
delay2_i : in std_logic_vector(g_delay_vec_width-1 downto 0);
status1_i : in std_logic;
status2_i : in std_logic;
status_en_i : in std_logic;
flag1_o : out std_logic;
flag2_o : out std_logic;
cha_i : in std_logic_vector(15 downto 0);
chb_i : in std_logic_vector(15 downto 0);
chc_i : in std_logic_vector(15 downto 0);
chd_i : in std_logic_vector(15 downto 0);
cha_o : out std_logic_vector(15 downto 0);
chb_o : out std_logic_vector(15 downto 0);
chc_o : out std_logic_vector(15 downto 0);
chd_o : out std_logic_vector(15 downto 0));
end component;
begin
-------------------------------------------------------
-- components instantiation
-------------------------------------------------------
cross_component: swap_cnt_top
generic map (
g_swap_div_freq_vec_width => g_swap_div_freq_vec_width
)
port map (
clk_i => clk_i,
rst_n_i => rst_n_i,
mode1_i => mode1_i,
mode2_i => mode2_i,
swap_div_f_i => swap_div_f_i,
ext_clk_i => ext_clk_i,
ext_clk_en_i => ext_clk_en_i,
clk_swap_o => clk_swap_o,
clk_swap_en_i => clk_swap_en_i,
status1_o => status1,
status2_o => status2,
ctrl1_o => ctrl1_o,
ctrl2_o => ctrl2_o
);
uncross_component: inv_chs_top
generic map (
g_delay_vec_width => g_delay_vec_width
)
port map (
clk_i => clk_i,
rst_n_i => rst_n_i,
const_aa_i => const_aa_i,
const_bb_i => const_bb_i,
const_cc_i => const_cc_i,
const_dd_i => const_dd_i,
const_ac_i => const_ac_i,
const_bd_i => const_bd_i,
const_ca_i => const_ca_i,
const_db_i => const_db_i,
delay1_i => delay1_i,
delay2_i => delay2_i,
status1_i => status1,
status2_i => status2,
status_en_i => clk_swap_en_i,
--output for debugging
flag1_o => flag1_o,
flag2_o => flag2_o,
cha_i => cha_i,
chb_i => chb_i,
chc_i => chc_i,
chd_i => chd_i,
cha_o => cha_o,
chb_o => chb_o,
chc_o => chc_o,
chd_o => chd_o
);
end;
| lgpl-3.0 | c6051eccc334c81848a9d294a69a63aa | 0.481305 | 3.190248 | false | false | false | false |
lerwys/GitTest | hdl/modules/position_calc/generated/artix7/mult_11_2_7786f9df1b07f80e.vhd | 1 | 4,569 | --------------------------------------------------------------------------------
-- This file is owned and controlled by Xilinx and must be used solely --
-- for design, simulation, implementation and creation of design files --
-- limited to Xilinx devices or technologies. Use with non-Xilinx --
-- devices or technologies is expressly prohibited and immediately --
-- terminates your license. --
-- --
-- XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" SOLELY --
-- FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR XILINX DEVICES. BY --
-- PROVIDING THIS DESIGN, CODE, OR INFORMATION AS ONE POSSIBLE --
-- IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD, XILINX IS --
-- MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE FROM ANY --
-- CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING ANY --
-- RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY --
-- DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE --
-- IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR --
-- REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF --
-- INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A --
-- PARTICULAR PURPOSE. --
-- --
-- Xilinx products are not intended for use in life support appliances, --
-- devices, or systems. Use in such applications are expressly --
-- prohibited. --
-- --
-- (c) Copyright 1995-2014 Xilinx, Inc. --
-- All rights reserved. --
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-- You must compile the wrapper file mult_11_2_7786f9df1b07f80e.vhd when simulating
-- the core, mult_11_2_7786f9df1b07f80e. When compiling the wrapper file, be sure to
-- reference the XilinxCoreLib VHDL simulation library. For detailed
-- instructions, please refer to the "CORE Generator Help".
-- The synthesis directives "translate_off/translate_on" specified
-- below are supported by Xilinx, Mentor Graphics and Synplicity
-- synthesis tools. Ensure they are correct for your synthesis tool(s).
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
-- synthesis translate_off
LIBRARY XilinxCoreLib;
-- synthesis translate_on
ENTITY mult_11_2_7786f9df1b07f80e IS
PORT (
clk : IN STD_LOGIC;
a : IN STD_LOGIC_VECTOR(24 DOWNTO 0);
b : IN STD_LOGIC_VECTOR(24 DOWNTO 0);
ce : IN STD_LOGIC;
sclr : IN STD_LOGIC;
p : OUT STD_LOGIC_VECTOR(49 DOWNTO 0)
);
END mult_11_2_7786f9df1b07f80e;
ARCHITECTURE mult_11_2_7786f9df1b07f80e_a OF mult_11_2_7786f9df1b07f80e IS
-- synthesis translate_off
COMPONENT wrapped_mult_11_2_7786f9df1b07f80e
PORT (
clk : IN STD_LOGIC;
a : IN STD_LOGIC_VECTOR(24 DOWNTO 0);
b : IN STD_LOGIC_VECTOR(24 DOWNTO 0);
ce : IN STD_LOGIC;
sclr : IN STD_LOGIC;
p : OUT STD_LOGIC_VECTOR(49 DOWNTO 0)
);
END COMPONENT;
-- Configuration specification
FOR ALL : wrapped_mult_11_2_7786f9df1b07f80e USE ENTITY XilinxCoreLib.mult_gen_v11_2(behavioral)
GENERIC MAP (
c_a_type => 0,
c_a_width => 25,
c_b_type => 0,
c_b_value => "10000001",
c_b_width => 25,
c_ccm_imp => 0,
c_ce_overrides_sclr => 1,
c_has_ce => 1,
c_has_sclr => 1,
c_has_zero_detect => 0,
c_latency => 8,
c_model_type => 0,
c_mult_type => 1,
c_optimize_goal => 1,
c_out_high => 49,
c_out_low => 0,
c_round_output => 0,
c_round_pt => 0,
c_verbosity => 0,
c_xdevicefamily => "artix7"
);
-- synthesis translate_on
BEGIN
-- synthesis translate_off
U0 : wrapped_mult_11_2_7786f9df1b07f80e
PORT MAP (
clk => clk,
a => a,
b => b,
ce => ce,
sclr => sclr,
p => p
);
-- synthesis translate_on
END mult_11_2_7786f9df1b07f80e_a;
| lgpl-3.0 | 0c15b9c383609d3dd50aabd7939ffa44 | 0.534471 | 4.057726 | false | false | false | false |
wltr/common-vhdl | memory/fifo/src/rtl/fifo.vhd | 1 | 4,236 | --------------------------------------------------------------------------------
-- LGPL v2.1, Copyright (c) 2014 Johannes Walter <[email protected]>
--
-- Description:
-- First-in, first-out buffer.
--------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use ieee.math_real.all;
entity fifo is
generic (
-- FIFO depth
depth_g : positive := 32;
-- Data bit width
width_g : positive := 16);
port (
-- Clock and resets
clk_i : in std_ulogic;
rst_asy_n_i : in std_ulogic;
rst_syn_i : in std_ulogic;
-- Write port
wr_en_i : in std_ulogic;
data_i : in std_ulogic_vector(width_g - 1 downto 0);
done_o : out std_ulogic;
full_o : out std_ulogic;
-- Read port
rd_en_i : in std_ulogic;
data_o : out std_ulogic_vector(width_g - 1 downto 0);
data_en_o : out std_ulogic;
empty_o : out std_ulogic);
end entity fifo;
architecture rtl of fifo is
------------------------------------------------------------------------------
-- Types and Constants
------------------------------------------------------------------------------
type mem_t is array (0 to depth_g - 1) of std_ulogic_vector(data_i'range);
------------------------------------------------------------------------------
-- Internal Registers
------------------------------------------------------------------------------
signal mem : mem_t;
signal wr_addr : unsigned(natural(ceil(log2(real(depth_g)))) - 1 downto 0);
signal rd_addr : unsigned(natural(ceil(log2(real(depth_g)))) - 1 downto 0);
signal data : std_ulogic_vector(data_o'range);
signal data_en : std_ulogic;
signal done : std_ulogic;
signal op : std_ulogic;
------------------------------------------------------------------------------
-- Internal Wires
------------------------------------------------------------------------------
signal full : std_ulogic;
signal empty : std_ulogic;
begin -- architecture rtl
------------------------------------------------------------------------------
-- Outputs
------------------------------------------------------------------------------
data_o <= data;
data_en_o <= data_en;
done_o <= done;
full_o <= full;
empty_o <= empty;
------------------------------------------------------------------------------
-- Registers
------------------------------------------------------------------------------
regs : process (clk_i, rst_asy_n_i) is
procedure reset is
begin
wr_addr <= to_unsigned(0, wr_addr'length);
rd_addr <= to_unsigned(0, rd_addr'length);
data <= (others => '0');
data_en <= '0';
done <= '0';
op <= '0';
end procedure reset;
begin -- process regs
if rst_asy_n_i = '0' then
reset;
elsif rising_edge(clk_i) then
-- Defaults
data_en <= '0';
done <= '0';
if rst_syn_i = '1' then
reset;
else
if wr_en_i = '1' and full = '0' then
mem(to_integer(wr_addr)) <= data_i;
done <= '1';
op <= '1';
if to_integer(wr_addr) < depth_g - 1 then
wr_addr <= wr_addr + 1;
else
wr_addr <= to_unsigned(0, wr_addr'length);
end if;
elsif wr_en_i = '0' and rd_en_i = '1' and empty = '0' then
data <= mem(to_integer(rd_addr));
data_en <= '1';
op <= '0';
if to_integer(rd_addr) < depth_g -1 then
rd_addr <= rd_addr + 1;
else
rd_addr <= to_unsigned(0, rd_addr'length);
end if;
end if;
end if;
end if;
end process regs;
------------------------------------------------------------------------------
-- Combinatorics
------------------------------------------------------------------------------
comb : process (wr_addr, rd_addr, op) is
begin -- process comb
-- Defaults
empty <= '0';
full <= '0';
if wr_addr = rd_addr then
if op = '1' then
full <= '1';
else
empty <= '1';
end if;
end if;
end process comb;
end architecture rtl;
| lgpl-2.1 | f41bfb88dfb6b7c9f1223adf46fed299 | 0.39424 | 4.194059 | false | false | false | false |
wltr/common-vhdl | communication/serial_3wire_transceiver/src/rtl/serial_3wire_rx.vhd | 1 | 4,466 | --------------------------------------------------------------------------------
-- LGPL v2.1, Copyright (c) 2013 Johannes Walter <[email protected]>
--
-- Description:
-- Receive synchronous serial data over 3 wires.
--------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
entity serial_3wire_rx is
generic (
-- Data bit width
data_width_g : positive := 32);
port (
-- Clock and resets
clk_i : in std_ulogic;
rst_asy_n_i : in std_ulogic;
rst_syn_i : in std_ulogic;
-- Reception lines
rx_frame_i : in std_ulogic;
rx_bit_en_i : in std_ulogic;
rx_i : in std_ulogic;
-- Interface
data_o : out std_ulogic_vector(data_width_g - 1 downto 0);
data_en_o : out std_ulogic;
error_o : out std_ulogic);
end entity serial_3wire_rx;
architecture rtl of serial_3wire_rx is
------------------------------------------------------------------------------
-- Types and Constants
------------------------------------------------------------------------------
-- Using odd parity detects empty frames as errors
constant parity_init_c : std_ulogic := '1';
------------------------------------------------------------------------------
-- Internal Registers
------------------------------------------------------------------------------
signal data : std_ulogic_vector(data_width_g downto 0) := (others => '0');
signal data_en : std_ulogic := '0';
signal parity : std_ulogic := parity_init_c;
signal parity_error : std_ulogic := '0';
------------------------------------------------------------------------------
-- Internal Wires
------------------------------------------------------------------------------
signal frame_fedge : std_ulogic;
signal bit_en_redge : std_ulogic;
begin -- architecture rtl
------------------------------------------------------------------------------
-- Outputs
------------------------------------------------------------------------------
data_o <= data(data_width_g - 1 downto 0);
data_en_o <= data_en;
error_o <= parity_error;
------------------------------------------------------------------------------
-- Instances
------------------------------------------------------------------------------
-- Detect falling edge on rx_frame_i
frame_edge_inst : entity work.edge_detector
generic map (
init_value_g => '0',
edge_type_g => 1,
hold_flag_g => false)
port map (
clk_i => clk_i,
rst_asy_n_i => rst_asy_n_i,
rst_syn_i => rst_syn_i,
en_i => '1',
ack_i => '0',
sig_i => rx_frame_i,
edge_o => frame_fedge);
-- Detect rising edge on rx_bit_en_i
bit_en_edge_inst : entity work.edge_detector
generic map (
init_value_g => '0',
edge_type_g => 0,
hold_flag_g => false)
port map (
clk_i => clk_i,
rst_asy_n_i => rst_asy_n_i,
rst_syn_i => rst_syn_i,
en_i => '1',
ack_i => '0',
sig_i => rx_bit_en_i,
edge_o => bit_en_redge);
------------------------------------------------------------------------------
-- Registers
------------------------------------------------------------------------------
regs : process (clk_i, rst_asy_n_i) is
procedure reset is
begin
data <= (others => '0');
data_en <= '0';
parity <= parity_init_c;
parity_error <= '0';
end procedure reset;
begin -- process regs
if rst_asy_n_i = '0' then
reset;
elsif rising_edge(clk_i) then
if rst_syn_i = '1' then
reset;
else
-- Shift-in data and calculate parity on rising edges within a valid frame
if rx_frame_i = '1' and bit_en_redge = '1' then
data <= rx_i & data(data'high downto data'low + 1);
parity <= parity xor rx_i;
end if;
-- Data is valid at the end of the frame if the parity is correct
data_en <= frame_fedge and (not parity);
-- If the parity is not correct at the end of the frame, an error is reported
parity_error <= frame_fedge and parity;
-- Reset parity at the end of every frame
if frame_fedge = '1' then
parity <= parity_init_c;
end if;
end if;
end if;
end process regs;
end architecture rtl;
| lgpl-2.1 | 8ca4cc943995786837b4e432c167d9a2 | 0.415137 | 4.253333 | false | false | false | false |
lerwys/GitTest | hdl/modules/position_calc/generated/virtex6/crdc_v5_0_951922a7ad5d425e.vhd | 1 | 5,799 | --------------------------------------------------------------------------------
-- This file is owned and controlled by Xilinx and must be used solely --
-- for design, simulation, implementation and creation of design files --
-- limited to Xilinx devices or technologies. Use with non-Xilinx --
-- devices or technologies is expressly prohibited and immediately --
-- terminates your license. --
-- --
-- XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" SOLELY --
-- FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR XILINX DEVICES. BY --
-- PROVIDING THIS DESIGN, CODE, OR INFORMATION AS ONE POSSIBLE --
-- IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD, XILINX IS --
-- MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE FROM ANY --
-- CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING ANY --
-- RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY --
-- DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE --
-- IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR --
-- REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF --
-- INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A --
-- PARTICULAR PURPOSE. --
-- --
-- Xilinx products are not intended for use in life support appliances, --
-- devices, or systems. Use in such applications are expressly --
-- prohibited. --
-- --
-- (c) Copyright 1995-2014 Xilinx, Inc. --
-- All rights reserved. --
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-- You must compile the wrapper file crdc_v5_0_951922a7ad5d425e.vhd when simulating
-- the core, crdc_v5_0_951922a7ad5d425e. When compiling the wrapper file, be sure to
-- reference the XilinxCoreLib VHDL simulation library. For detailed
-- instructions, please refer to the "CORE Generator Help".
-- The synthesis directives "translate_off/translate_on" specified
-- below are supported by Xilinx, Mentor Graphics and Synplicity
-- synthesis tools. Ensure they are correct for your synthesis tool(s).
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
-- synthesis translate_off
LIBRARY XilinxCoreLib;
-- synthesis translate_on
ENTITY crdc_v5_0_951922a7ad5d425e IS
PORT (
aclk : IN STD_LOGIC;
aclken : IN STD_LOGIC;
s_axis_cartesian_tvalid : IN STD_LOGIC;
s_axis_cartesian_tready : OUT STD_LOGIC;
s_axis_cartesian_tuser : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
s_axis_cartesian_tdata : IN STD_LOGIC_VECTOR(63 DOWNTO 0);
m_axis_dout_tvalid : OUT STD_LOGIC;
m_axis_dout_tuser : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
m_axis_dout_tdata : OUT STD_LOGIC_VECTOR(47 DOWNTO 0)
);
END crdc_v5_0_951922a7ad5d425e;
ARCHITECTURE crdc_v5_0_951922a7ad5d425e_a OF crdc_v5_0_951922a7ad5d425e IS
-- synthesis translate_off
COMPONENT wrapped_crdc_v5_0_951922a7ad5d425e
PORT (
aclk : IN STD_LOGIC;
aclken : IN STD_LOGIC;
s_axis_cartesian_tvalid : IN STD_LOGIC;
s_axis_cartesian_tready : OUT STD_LOGIC;
s_axis_cartesian_tuser : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
s_axis_cartesian_tdata : IN STD_LOGIC_VECTOR(63 DOWNTO 0);
m_axis_dout_tvalid : OUT STD_LOGIC;
m_axis_dout_tuser : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
m_axis_dout_tdata : OUT STD_LOGIC_VECTOR(47 DOWNTO 0)
);
END COMPONENT;
-- Configuration specification
FOR ALL : wrapped_crdc_v5_0_951922a7ad5d425e USE ENTITY XilinxCoreLib.cordic_v5_0(behavioral)
GENERIC MAP (
c_architecture => 1,
c_coarse_rotate => 1,
c_cordic_function => 1,
c_data_format => 0,
c_has_aclk => 1,
c_has_aclken => 1,
c_has_aresetn => 0,
c_has_s_axis_cartesian => 1,
c_has_s_axis_cartesian_tlast => 0,
c_has_s_axis_cartesian_tuser => 1,
c_has_s_axis_phase => 0,
c_has_s_axis_phase_tlast => 0,
c_has_s_axis_phase_tuser => 0,
c_input_width => 25,
c_iterations => 0,
c_m_axis_dout_tdata_width => 48,
c_m_axis_dout_tuser_width => 1,
c_output_width => 24,
c_phase_format => 0,
c_pipeline_mode => -1,
c_precision => 0,
c_round_mode => 3,
c_s_axis_cartesian_tdata_width => 64,
c_s_axis_cartesian_tuser_width => 1,
c_s_axis_phase_tdata_width => 32,
c_s_axis_phase_tuser_width => 1,
c_scale_comp => 3,
c_throttle_scheme => 3,
c_tlast_resolution => 0,
c_xdevicefamily => "virtex6"
);
-- synthesis translate_on
BEGIN
-- synthesis translate_off
U0 : wrapped_crdc_v5_0_951922a7ad5d425e
PORT MAP (
aclk => aclk,
aclken => aclken,
s_axis_cartesian_tvalid => s_axis_cartesian_tvalid,
s_axis_cartesian_tready => s_axis_cartesian_tready,
s_axis_cartesian_tuser => s_axis_cartesian_tuser,
s_axis_cartesian_tdata => s_axis_cartesian_tdata,
m_axis_dout_tvalid => m_axis_dout_tvalid,
m_axis_dout_tuser => m_axis_dout_tuser,
m_axis_dout_tdata => m_axis_dout_tdata
);
-- synthesis translate_on
END crdc_v5_0_951922a7ad5d425e_a;
| lgpl-3.0 | 24963a33297bb62a1b2e9e3f623477b8 | 0.568029 | 3.792675 | false | false | false | false |
lerwys/GitTest | hdl/modules/wb_position_calc/position_calc_counters_single.vhd | 1 | 3,044 | ------------------------------------------------------------------------------
-- Title : Position Calcualtion Error Counters
------------------------------------------------------------------------------
-- Author : Lucas Maziero Russo
-- Company : CNPEM LNLS-DIG
-- Created : 2014-01-13
-- Platform : FPGA-generic
-------------------------------------------------------------------------------
-- Description: Simple counters for errors on the DSP chain
-------------------------------------------------------------------------------
-- Copyright (c) 2014 CNPEM
-- Licensed under GNU Lesser General Public License (LGPL) v3.0
-------------------------------------------------------------------------------
-- Revisions :
-- Date Version Author Description
-- 2014-01-13 1.0 lucas.russo Created
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity position_calc_counters_single is
generic (
g_cntr_size : natural := 16
);
port (
fs_clk2x_i : in std_logic; -- clock period = 4.44116091946435 ns (225.16635135135124 Mhz)
fs_rst2x_n_i : in std_logic;
-- Clock enable
ce_i : in std_logic;
-- Error inputs (one clock cycle long)
err1_i : in std_logic;
-- Counter clear
cntr_clr_i : in std_logic;
-- Output counter
cntr_o : out std_logic_vector(g_cntr_size-1 downto 0)
);
end position_calc_counters_single;
architecture rtl of position_calc_counters_single is
signal cntr_clr_int : std_logic;
signal cntr_int : unsigned(g_cntr_size-1 downto 0);
begin
-- Hold counter clear until it is visible by the remaing of logic with
-- clock enable
p_hold_clr : process(fs_clk2x_i)
begin
if rising_edge(fs_clk2x_i) then
if fs_rst2x_n_i = '0' then
cntr_clr_int <= '0';
else
if cntr_clr_i = '1' then
cntr_clr_int <= '1';
elsif ce_i = '1' then
cntr_clr_int <= '0';
end if;
end if;
end if;
end process;
p_ctnr : process(fs_clk2x_i)
begin
if rising_edge(fs_clk2x_i) then
if fs_rst2x_n_i = '0' then
cntr_int <= to_unsigned(0, cntr_int'length);
elsif ce_i = '1' then
if cntr_clr_int = '1' then
cntr_int <= to_unsigned(0, cntr_int'length);
elsif err1_i = '1' then
cntr_int <= cntr_int + 1;
end if;
end if;
end if;
end process;
-- Output counters
cntr_o <= std_logic_vector(cntr_int);
end rtl;
| lgpl-3.0 | e09c5a7b0a59f20c79e953505ea0bb65 | 0.415572 | 4.450292 | false | false | false | false |
ricardo-jasinski/vhdl-game-engine | hdl/implementation/engine/npc_ai_bouncer.vhd | 1 | 2,704 | library ieee;
use ieee.std_logic_1164.all;
use work.graphics_types_pkg.all;
use work.game_state_pkg.all;
-- "Artifical intelligence" (for lack of a better name) for moving NPCs
-- (non-player characters, such as enemies) around the screen. The "bouncer"
-- strategy consists in moving the NPC within a square area, and inverting the
-- direction when it reaches the limits.
entity npc_ai_bouncer is
port (
reset, clock: in std_logic;
-- time base pulse, NPC state gets updated when high (tipically every 100 ms)
time_base: in std_logic;
-- true if NPC is active in the game and must be updated
enabled: in boolean;
-- starting point for the NPC
initial_position: in point_type;
-- start velocity for the NPC
initial_speed: in point_type;
-- limits for NPC movement
allowed_region: in rectangle_type;
-- calculated NPC position
npc_position: out point_type
);
end;
architecture rtl of npc_ai_bouncer is
-- current NPC position
signal position: point_type;
-- current NPC speed
signal speed: point_type;
begin
-- process (clock, reset) is
process (clock, reset, initial_position, initial_speed, time_base) is
variable new_position: point_type;
begin
if reset then
position <= initial_position;
speed <= initial_speed;
elsif rising_edge(clock) then
if enabled and time_base = '1' then
new_position := position + speed;
-- make sure x position is within limits; invert horizontal speed
-- when NPC reaches an edge
if new_position.x <= allowed_region.left then
new_position.x := allowed_region.left;
speed.x <= - speed.x;
elsif new_position.x >= allowed_region.right then
new_position.x := allowed_region.right;
speed.x <= - speed.x;
end if;
-- make sure y position is within limits; invert vertical speed
-- when NPC reaches an edge
if new_position.y <= allowed_region.top then
new_position.y := allowed_region.top;
speed.y <= - speed.y;
elsif new_position.y >= allowed_region.bottom then
new_position.y := allowed_region.bottom;
speed.y <= - speed.y;
end if;
position <= new_position;
end if;
end if;
end process;
npc_position <= position;
end; | unlicense | f4cd2a2575d8f98b525cc0624cdf8784 | 0.5625 | 4.375405 | false | false | false | false |
lerwys/GitTest | hdl/modules/wb_position_calc/position_calc_cdc_fifo.vhd | 2 | 3,356 | ------------------------------------------------------------------------------
-- Title : CDC FIFO for Position data
------------------------------------------------------------------------------
-- Author : Lucas Maziero Russo
-- Company : CNPEM LNLS-DIG
-- Created : 2013-09-23
-- Platform : FPGA-generic
-------------------------------------------------------------------------------
-- Description: CDC FIFO for generic data. Suitable for CDC position data
-------------------------------------------------------------------------------
-- Copyright (c) 2012 CNPEM
-- Licensed under GNU Lesser General Public License (LGPL) v3.0
-------------------------------------------------------------------------------
-- Revisions :
-- Date Version Author Description
-- 2013-09-23 1.0 lucas.russo Created
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
library work;
-- Genrams
use work.genram_pkg.all;
entity position_calc_cdc_fifo is
generic
(
g_data_width : natural;
g_size : natural
);
port
(
clk_wr_i : in std_logic;
data_i : in std_logic_vector(g_data_width-1 downto 0);
valid_i : in std_logic;
clk_rd_i : in std_logic;
data_o : out std_logic_vector(g_data_width-1 downto 0);
valid_o : out std_logic
);
end position_calc_cdc_fifo;
architecture rtl of position_calc_cdc_fifo is
constant c_guard_size : integer := 2;
constant c_almost_empty_thres : integer := c_guard_size;
constant c_almost_full_thres : integer := g_size - c_guard_size;
signal fifo_cdc_rd : std_logic;
signal fifo_cdc_empty : std_logic;
signal fifo_cdc_valid : std_logic;
begin
--cmp_position_calc_cdc_fifo : generic_async_fifo
cmp_position_calc_cdc_fifo : inferred_async_fifo
generic map(
g_data_width => g_data_width,
g_size => g_size,
g_almost_empty_threshold => c_almost_empty_thres,
g_almost_full_threshold => c_almost_full_thres
)
port map(
rst_n_i => '1',
-- write port
clk_wr_i => clk_wr_i,
d_i => data_i,
we_i => valid_i, -- and valid
wr_full_o => open,
-- read port
clk_rd_i => clk_rd_i,
q_o => data_o,
rd_i => fifo_cdc_rd,
rd_empty_o => fifo_cdc_empty
);
fifo_cdc_rd <= '1' when fifo_cdc_empty = '0' else '0';
p_gen_cdc_valid: process (clk_rd_i)
begin
if rising_edge (clk_rd_i) then
fifo_cdc_valid <= fifo_cdc_rd;
if fifo_cdc_empty = '1' then
fifo_cdc_valid <= '0';
end if;
end if;
end process;
valid_o <= fifo_cdc_valid;
end rtl;
| lgpl-3.0 | 6576b4655dbd6efa36ecc3b1061c86c8 | 0.401669 | 4.386928 | false | false | false | false |
wltr/common-vhdl | packages/lfsr/src/pkg/fibonacci_lfsr_pkg.vhd | 1 | 7,096 | --------------------------------------------------------------------------------
-- LGPL v2.1, Copyright (c) 2015 Johannes Walter <[email protected]>
--
-- Description:
-- Fibonacci Linear Feedback Shift Register (LFSR) package.
--------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.math_real.all;
package lfsr_pkg is
-- Maximum LFSR length supported by package
constant lfsr_max_length_c : natural range 2 to natural'high := 32;
-- Get LFSR bit length for a certain period, period = 2^n - 1
function lfsr_length(period : positive)
return natural;
-- Get LFSR maximum period polynomial for a certain bit length
function lfsr_polynomial(length : natural range 2 to lfsr_max_length_c)
return std_ulogic_vector;
-- Get LFSR seed value for a certain bit length
function lfsr_seed(length : natural range 2 to lfsr_max_length_c)
return std_ulogic_vector;
-- Get the next feedback value based on an LFSR using the maximum
-- period polynomial
function lfsr_feedback(lfsr : std_ulogic_vector)
return std_ulogic;
-- Get the next feedback value based on an LFSR and a given polynomial
function lfsr_feedback(lfsr : std_ulogic_vector; polynomial : std_ulogic_vector)
return std_ulogic;
-- Compute the LFSR value after a certain number of shifts using the maximum
-- period polynomial
function lfsr_shift(lfsr : std_ulogic_vector; num_shifts : natural := 1)
return std_ulogic_vector;
-- Compute the LFSR value with the given polynomial after a certain
-- number of shifts
function lfsr_shift(lfsr : std_ulogic_vector; polynomial : std_ulogic_vector;
num_shifts : natural := 1)
return std_ulogic_vector;
end package lfsr_pkg;
package body lfsr_pkg is
function lfsr_length(period : positive)
return natural is
begin
if period < 3 then
return 2;
else
return natural(ceil(log2(real(period + 1))));
end if;
end function lfsr_length;
function lfsr_polynomial(length : natural range 2 to lfsr_max_length_c)
return std_ulogic_vector is
variable polynomial : std_ulogic_vector(length - 1 downto 0);
begin
case length is
when 2 => polynomial := "11"; -- x^2 + x + 1
when 3 => polynomial := "110"; -- x^3 + x^2 + 1
when 4 => polynomial := "1100"; -- x^4 + x^3 + 1
when 5 => polynomial := "10100"; -- x^5 + x^3 + 1
when 6 => polynomial := "110000"; -- x^6 + x^5 + 1
when 7 => polynomial := "1100000"; -- x^7 + x^6 + 1
when 8 => polynomial := "10111000"; -- x^8 + x^6 + x^5 + x^4 + 1
when 9 => polynomial := "100010000"; -- x^9 + x^5 + 1
when 10 => polynomial := "1001000000"; -- x^10 + x^7 + 1
when 11 => polynomial := "10100000000"; -- x^11 + x^9 + 1
when 12 => polynomial := "111000001000"; -- x^12 + x^11 + x^10 + x^4 + 1
when 13 => polynomial := "1110010000000"; -- x^13 + x^12 + x^11 + x^8 + 1
when 14 => polynomial := "11100000000010"; -- x^14 + x^13 + x^12 + x^2 + 1
when 15 => polynomial := "110000000000000"; -- x^15 + x^14 + 1
when 16 => polynomial := "1011010000000000"; -- x^16 + x^14 + x^13 + x^11 + 1
when 17 => polynomial := "10010000000000000"; -- x^17 + x^14 + 1
when 18 => polynomial := "100000010000000000"; -- x^18 + x^11 + 1
when 19 => polynomial := "1110010000000000000"; -- x^19 + x^18 + x^17 + x^14 + 1
when 20 => polynomial := "10010000000000000000"; -- x^20 + x^17 + 1
when 21 => polynomial := "101000000000000000000"; -- x^21 + x^19 + 1
when 22 => polynomial := "1100000000000000000000"; -- x^22 + x^21 + 1
when 23 => polynomial := "10000100000000000000000"; -- x^23 + x^18 + 1
when 24 => polynomial := "110110000000000000000000"; -- x^24 + x^23 + x^21 + x^20 + 1
when 25 => polynomial := "1001000000000000000000000"; -- x^25 + x^22 + 1
when 26 => polynomial := "11100010000000000000000000"; -- x^26 + x^25 + x^24 + x^20 + 1
when 27 => polynomial := "111001000000000000000000000"; -- x^27 + x^26 + x^25 + x^22 + 1
when 28 => polynomial := "1001000000000000000000000000"; -- x^28 + x^25 + 1
when 29 => polynomial := "10100000000000000000000000000"; -- x^29 + x^27 + 1
when 30 => polynomial := "110010100000000000000000000000"; -- x^30 + x^29 + x^26 + x^24 + 1
when 31 => polynomial := "1001000000000000000000000000000"; -- x^31 + x^28 + 1
when 32 => polynomial := "10100011000000000000000000000000"; -- x^32 + x^30 + x^26 + x^25 + 1
end case;
return polynomial;
end function lfsr_polynomial;
function lfsr_seed(length : natural range 2 to lfsr_max_length_c)
return std_ulogic_vector is
begin
return (length - 1 downto 1 => '0') & '1';
end function lfsr_seed;
function lfsr_feedback(lfsr : std_ulogic_vector)
return std_ulogic is
begin
assert lfsr'length >= 2
report "LFSR vector is too short."
severity error;
assert lfsr'length <= lfsr_max_length_c
report "LFSR vector is too long."
severity error;
return lfsr_feedback(lfsr, lfsr_polynomial(lfsr'length));
end function lfsr_feedback;
function lfsr_feedback(lfsr : std_ulogic_vector; polynomial : std_ulogic_vector)
return std_ulogic is
variable res : std_ulogic := '0';
begin
assert lfsr'left > lfsr'right
report "Package requires an LFSR with DOWNTO range and minimum length of 2."
severity error;
assert polynomial'left > polynomial'right
report "Package requires a polynomial with DOWNTO range and minimum length of 2."
severity error;
assert lfsr'left = polynomial'left and lfsr'right = polynomial'right
report "Ranges of LFSR and polynomial have to be equal."
severity error;
for i in lfsr'range loop
if polynomial(i) = '1' then
res := res xor lfsr(i);
end if;
end loop;
return res;
end function lfsr_feedback;
function lfsr_shift(lfsr : std_ulogic_vector; num_shifts : natural := 1)
return std_ulogic_vector is
begin
assert lfsr'length >= 2
report "LFSR vector is too short."
severity error;
assert lfsr'length <= lfsr_max_length_c
report "LFSR vector is too long."
severity error;
return lfsr_shift(lfsr, lfsr_polynomial(lfsr'length), num_shifts);
end function lfsr_shift;
function lfsr_shift(lfsr : std_ulogic_vector; polynomial : std_ulogic_vector;
num_shifts : natural := 1)
return std_ulogic_vector is
variable res : std_ulogic_vector(lfsr'range) := lfsr;
begin
assert lfsr'left > lfsr'right
report "Package requires an LFSR with DOWNTO range and minimum length of 2."
severity error;
for i in 1 to num_shifts loop
res := res(res'left - 1 downto res'right) & lfsr_feedback(res, polynomial);
end loop;
return res;
end function lfsr_shift;
end package body lfsr_pkg;
| lgpl-2.1 | 1f98da3a2cd4a1a8bcbf63d2eb8c5a34 | 0.611894 | 3.83775 | false | false | false | false |
ricardo-jasinski/vhdl-game-engine | hdl/implementation/game/space_shooter_demo/game_logic.vhd | 1 | 11,334 | library ieee;
use ieee.std_logic_1164.all;
use work.basic_types_pkg.all;
use work.input_types_pkg.all;
use work.graphics_types_pkg.all;
use work.text_mode_pkg.all;
use work.resource_data_helper_pkg.all;
use work.resource_handles_pkg.all;
use work.resource_handles_helper_pkg.all;
use work.game_state_pkg.all;
use work.sprites_pkg.all;
-- Define all high-level game behavior.
--
-- Game logic and game engine cooperate to calculate the NPC positions:
-- - The game logic tells whether each NPC is enabled
-- - The game logic tells where the NPCs *should be* (their intended positions)
-- - The game engine calculates where the NPCs *actually are*
--
-- Game logic and game engine cooperate to draw sprites, calculate their
-- positions and checking for collisions:
-- - The game logic defines where the sprites must be drawn on the screen
-- - The game logic defines which sprites must be drawn and monitored for collisions
-- - The game engine draws the sprites and tells if there's been any collision
entity game_logic is
port (
-- Synchronous reset, used by all user logic
reset: in std_logic;
-- System clock used for all user logic
clock: in std_logic;
-- Medium-resolution time base for game state updates and input reading
time_base_50_ms: in std_logic;
-- The game logic tells whether each NPC is enabled
npc_enables: out bool_vector;
-- The game logic tells where the NPCs *should be* (their intended positions)
npc_assigned_positions: out point_array_type;
-- The game engine calculates where the NPCs *actually are*
npc_positions: in point_array_type;
-- The game logic defines where the sprites *must be drawn* on the screen.
sprites_positions: out point_array_type;
-- True if sprite must be drawn on the screen and monitored for collisions
sprites_enabled: out bool_vector;
-- Each element is 'true' while the two corresponding sprites are colliding.
sprite_collisions: in bool_vector;
-- Text strings displayed on the screen
text_mode_strings: out text_mode_strings_type;
input_buttons: in input_buttons_type;
game_state: out game_state_type;
-- debug pins to help debug game logic (e.g., connecting to board leds)
debug_bits: out std_logic_vector(7 downto 0)
);
end;
architecture rtl of game_logic is
-- Each sprite must have a position, which may be constant or changeable.
-- For static items (chest, axe) we may use a constant or a hardcoded value
-- in the sprite positions array. For the player and NPC sprites, we declare
-- signals and update them in the game logic to make them move.
signal player_position: point_type;
constant PLAYER_ABSOLUTE_SPEED: integer := 2;
-- Signals to help us keep track of the game state.
signal game_state_signal: game_state_type;
signal game_over, game_won: boolean;
-- Aliases to help us work with the NPC positions
alias player_shot_position: point_type is npc_positions(0);
alias enemy_ship_position: point_type is npc_positions(1);
alias alien_ship_1_position: point_type is npc_positions(2);
alias alien_ship_2_position: point_type is npc_positions(3);
alias alien_ship_3_position: point_type is npc_positions(4);
signal player_shot_fired: boolean;
begin
----------------------------------------------------------------------------
-- Overall architecture description:
-- 1) Update player position
-- 2) Generate NPC input data (enables and target positions)
-- 3) Generate sprite input data (enables and screen position)
-- 4) Update text strings displayed on the screen
-- 5) Update game state
----------------------------------------------------------------------------
----------------------------------------------------------------------------
-- Section 1: Update player position based on input buttons
----------------------------------------------------------------------------
update_player_position: process (clock, reset) begin
if reset then
player_position <= (64, 152);
elsif rising_edge(clock) then
if time_base_50_ms then
if input_buttons.right then
player_position.x <= player_position.x + PLAYER_ABSOLUTE_SPEED;
elsif input_buttons.left then
player_position.x <= player_position.x - PLAYER_ABSOLUTE_SPEED;
end if;
if input_buttons.down then
player_position.y <= player_position.y + PLAYER_ABSOLUTE_SPEED;
elsif input_buttons.up then
player_position.y <= player_position.y - PLAYER_ABSOLUTE_SPEED;
end if;
end if;
end if;
end process;
player_shot_state: process (clock, reset) begin
if reset then
player_shot_fired <= true;
elsif rising_edge(clock) then
if player_shot_fired then
if not is_in_view(npc_positions(get_id(NPC_PLAYER_SHOT))) then
player_shot_fired <= false;
end if;
else
if input_buttons.fire then
player_shot_fired <= true;
end if;
end if;
end if;
end process;
----------------------------------------------------------------------------
-- Section 2) Update NPC NPC input data (enables and target positions)
----------------------------------------------------------------------------
-- We only need to assign the values corresponding to followers and projectiles
npc_assigned_positions( get_id(NPC_PLAYER_SHOT) ) <= player_position + (16, 0);
npc_assigned_positions( get_id(NPC_ENEMY_SHIP) ) <= player_position + (24, -4);
npc_enables(npc_enables'range) <= (
get_id(NPC_PLAYER_SHOT) => player_shot_fired,
-- 0 => input_buttons.fire = '1',
others => true
);
----------------------------------------------------------------------------
-- Section 3) Provide a screen position for each sprite. For static objects,
-- we can use constants or hardcoded values. For moving objects and NPCs,
-- we use signals.
----------------------------------------------------------------------------
sprites_positions <= make_sprite_positions((
(SPRITE_PLAYER_SHIP_1, player_position),
(SPRITE_PLAYER_SHIP_2, player_position + point_type'(8,0)),
(SPRITE_PLAYER_SHOT, player_shot_position),
(SPRITE_ENEMY_SHIP_1, enemy_ship_position),
(SPRITE_ENEMY_SHIP_2, enemy_ship_position + point_type'(8,0)),
(SPRITE_ALIEN_SHIP_1, alien_ship_1_position),
(SPRITE_ALIEN_SHIP_2, alien_ship_2_position),
(SPRITE_ALIEN_SHIP_3, alien_ship_3_position)
));
update_sprites_enabled: process (clock, reset) is
variable enabled: bool_vector(sprites_enabled'range) := (others => true);
impure function collision(handle: sprite_collision_handle_type) return boolean is begin
return sprite_collisions( get_collision_id_from_handle( handle ) );
end;
procedure disable_sprite(enabled: inout bool_vector; handle: in sprite_handle_type) is begin
enabled( get_sprite_id_from_handle( handle ) ) := false;
end procedure;
begin
if reset then
enabled := (others => true);
game_over <= false;
elsif rising_edge(clock) then
if game_state_signal = GS_PLAY then
if collision(COLLISION_PLAYER_SHOT_ALIEN_1) then
disable_sprite(enabled, SPRITE_ALIEN_SHIP_1);
end if;
if collision(COLLISION_PLAYER_SHOT_ALIEN_2) then
disable_sprite(enabled, SPRITE_ALIEN_SHIP_2);
end if;
if collision(COLLISION_PLAYER_SHOT_ALIEN_3) then
disable_sprite(enabled, SPRITE_ALIEN_SHIP_3);
end if;
if collision(COLLISION_PLAYER_SHOT_ENEMY_1) then
disable_sprite(enabled, SPRITE_ENEMY_SHIP_1);
disable_sprite(enabled, SPRITE_ENEMY_SHIP_2);
end if;
if collision(COLLISION_PLAYER_2_ALIEN_1) or
collision(COLLISION_PLAYER_2_ALIEN_2) or
collision(COLLISION_PLAYER_2_ALIEN_3) or
collision(COLLISION_PLAYER_2_ENEMY_1)
then
disable_sprite(enabled, SPRITE_PLAYER_SHIP_1);
disable_sprite(enabled, SPRITE_PLAYER_SHIP_2);
game_over <= true;
end if;
end if;
end if;
sprites_enabled <= enabled;
end process;
----------------------------------------------------------------------------
-- Section 4) Update text strings displayed on the screen.
text_mode_strings <= (
( x => 30,
y => 0,
text => "Space shooter ",
visible => true
),
( x => 0,
y => 24,
text => "SCORE: 0 ",
visible => true
)
);
----------------------------------------------------------------------------
-- Section 5) Update game state. This game has a very simple state logic:
-- RESET --> PLAY --> GAME_WON or GAME_OVER
----------------------------------------------------------------------------
game_won <= false;
process (clock, reset) begin
if reset then
game_state_signal <= GS_RESET;
elsif rising_edge(clock) then
case game_state_signal is
when GS_RESET =>
if input_buttons /= (others => '0') then
game_state_signal <= GS_PLAY;
end if;
when GS_PLAY =>
if game_won then
game_state_signal <= GS_GAME_WON;
elsif game_over then
game_state_signal <= GS_GAME_OVER;
end if;
when others =>
null;
end case;
end if;
end process;
game_state <= game_state_signal;
debug_bits(7 downto 0) <= std_logic_vector_from_bool_vector(sprite_collisions);
-- debug_bits(7 downto 0) <= std_logic_vector_from_bool_vector(sprites_enabled_signal)(0 to 7);
-- debug_bits(0) <= '1' when enemy_ship_collision_2 else '0';
-- debug_bits(1) <= '1' when enemy_ship_collision_1 else '0';
-- debug_bits(2) <= '1';-- when death_by_oryx else '0';
-- debug_bits(3) <= '1' when game_logic_state = GS_RESET else '0';
-- debug_bits(4) <= '1' when game_logic_state = GS_PLAY else '0';
-- debug_bits(5) <= '1' when game_logic_state = GS_GAME_OVER else '0';
-- debug_bits(6) <= '1' when game_logic_state = GS_GAME_WON else '0';
-- debug_bits(7) <= '0';
end; | unlicense | ca3136c877efd23820b44d8d35ce7f20 | 0.538557 | 4.285066 | false | false | false | false |
lerwys/GitTest | hdl/modules/position_calc/generated/virtex6/mult_11_2_eb6becd4c4c6b065.vhd | 1 | 4,570 | --------------------------------------------------------------------------------
-- This file is owned and controlled by Xilinx and must be used solely --
-- for design, simulation, implementation and creation of design files --
-- limited to Xilinx devices or technologies. Use with non-Xilinx --
-- devices or technologies is expressly prohibited and immediately --
-- terminates your license. --
-- --
-- XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" SOLELY --
-- FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR XILINX DEVICES. BY --
-- PROVIDING THIS DESIGN, CODE, OR INFORMATION AS ONE POSSIBLE --
-- IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD, XILINX IS --
-- MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE FROM ANY --
-- CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING ANY --
-- RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY --
-- DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE --
-- IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR --
-- REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF --
-- INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A --
-- PARTICULAR PURPOSE. --
-- --
-- Xilinx products are not intended for use in life support appliances, --
-- devices, or systems. Use in such applications are expressly --
-- prohibited. --
-- --
-- (c) Copyright 1995-2014 Xilinx, Inc. --
-- All rights reserved. --
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-- You must compile the wrapper file mult_11_2_eb6becd4c4c6b065.vhd when simulating
-- the core, mult_11_2_eb6becd4c4c6b065. When compiling the wrapper file, be sure to
-- reference the XilinxCoreLib VHDL simulation library. For detailed
-- instructions, please refer to the "CORE Generator Help".
-- The synthesis directives "translate_off/translate_on" specified
-- below are supported by Xilinx, Mentor Graphics and Synplicity
-- synthesis tools. Ensure they are correct for your synthesis tool(s).
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
-- synthesis translate_off
LIBRARY XilinxCoreLib;
-- synthesis translate_on
ENTITY mult_11_2_eb6becd4c4c6b065 IS
PORT (
clk : IN STD_LOGIC;
a : IN STD_LOGIC_VECTOR(24 DOWNTO 0);
b : IN STD_LOGIC_VECTOR(24 DOWNTO 0);
ce : IN STD_LOGIC;
sclr : IN STD_LOGIC;
p : OUT STD_LOGIC_VECTOR(49 DOWNTO 0)
);
END mult_11_2_eb6becd4c4c6b065;
ARCHITECTURE mult_11_2_eb6becd4c4c6b065_a OF mult_11_2_eb6becd4c4c6b065 IS
-- synthesis translate_off
COMPONENT wrapped_mult_11_2_eb6becd4c4c6b065
PORT (
clk : IN STD_LOGIC;
a : IN STD_LOGIC_VECTOR(24 DOWNTO 0);
b : IN STD_LOGIC_VECTOR(24 DOWNTO 0);
ce : IN STD_LOGIC;
sclr : IN STD_LOGIC;
p : OUT STD_LOGIC_VECTOR(49 DOWNTO 0)
);
END COMPONENT;
-- Configuration specification
FOR ALL : wrapped_mult_11_2_eb6becd4c4c6b065 USE ENTITY XilinxCoreLib.mult_gen_v11_2(behavioral)
GENERIC MAP (
c_a_type => 0,
c_a_width => 25,
c_b_type => 0,
c_b_value => "10000001",
c_b_width => 25,
c_ccm_imp => 0,
c_ce_overrides_sclr => 1,
c_has_ce => 1,
c_has_sclr => 1,
c_has_zero_detect => 0,
c_latency => 8,
c_model_type => 0,
c_mult_type => 1,
c_optimize_goal => 1,
c_out_high => 49,
c_out_low => 0,
c_round_output => 0,
c_round_pt => 0,
c_verbosity => 0,
c_xdevicefamily => "virtex6"
);
-- synthesis translate_on
BEGIN
-- synthesis translate_off
U0 : wrapped_mult_11_2_eb6becd4c4c6b065
PORT MAP (
clk => clk,
a => a,
b => b,
ce => ce,
sclr => sclr,
p => p
);
-- synthesis translate_on
END mult_11_2_eb6becd4c4c6b065_a;
| lgpl-3.0 | 37d704b56826b0f7db6f50aaa73a6dd9 | 0.534573 | 4.022887 | false | false | false | false |
ricardo-jasinski/vhdl-game-engine | hdl/implementation/engine/sprites_pkg.vhd | 1 | 4,115 | use work.colors_pkg.all;
use work.graphics_types_pkg.all;
use work.basic_types_pkg.all;
-- Data types and functions for working with sprites in a high level of
-- abstraction.
package sprites_pkg is
-- VHDL won't allow sprites of different sizes in the same array, so we
-- simplify everything by making all sprites and bitmaps have the same size
constant BITMAP_WIDTH: integer := 8;
constant BITMAP_HEIGHT: integer := 8;
constant SPRITE_WIDTH: integer := BITMAP_WIDTH;
constant SPRITE_HEIGHT: integer := BITMAP_HEIGHT;
type sprite_type is record
x: integer;
y: integer;
enabled: boolean;
bitmap: paletted_bitmap_type(0 to SPRITE_WIDTH-1, 0 to SPRITE_HEIGHT-1);
end record;
type sprites_array_type is array (natural range <>) of sprite_type;
function sprite_contains_coordinate(sprite: sprite_type; coordinate: point_type) return boolean;
function update_sprite(sprite: sprite_type; raster_position: point_type; position: point_type; enabled: boolean) return sprite_type;
function get_sprite_pixel(sprite: sprite_type; raster_position: point_type) return palette_color_type;
-- A pair of sprites; used to define elements in the collision query array.
type sprite_id_pair is array (0 to 1) of integer;
-- We need to tell the sprites engine which sprites we want to monitor for
-- collisions. The query array helps us do it neatly.
type sprite_collision_query_type is array (natural range <>) of sprite_id_pair;
function check_collision(sprite_1, sprite_2: sprite_type) return boolean;
function get_sprites_collisions(sprites: sprites_array_type; collisions_query: sprite_collision_query_type) return bool_vector;
end;
package body sprites_pkg is
function get_sprites_collisions(sprites: sprites_array_type; collisions_query: sprite_collision_query_type) return bool_vector is
variable collisions: bool_vector(collisions_query'range);
variable sprite_1, sprite_2: sprite_type;
begin
for i in collisions_query'range loop
sprite_1 := sprites( collisions_query(i)(0) );
sprite_2 := sprites( collisions_query(i)(1) );
collisions(i) := check_collision(sprite_1, sprite_2);
end loop;
return collisions;
end;
function sprite_contains_coordinate(sprite: sprite_type; coordinate: point_type) return boolean is
begin
return
(coordinate.x >= sprite.x) and
(coordinate.x < (sprite.x + SPRITE_WIDTH)) and
(coordinate.y >= sprite.y) and
(coordinate.y < (sprite.y + SPRITE_HEIGHT));
end;
function update_sprite(sprite: sprite_type; raster_position: point_type; position: point_type; enabled: boolean) return sprite_type is
variable updated_sprite: sprite_type;
begin
updated_sprite := sprite;
updated_sprite.enabled := enabled;
if (raster_position.x = GAME_VIEWPORT_WIDTH-1 and
raster_position.y = GAME_VIEWPORT_HEIGHT-1)
then
updated_sprite.x := position.x;
updated_sprite.y := position.y;
end if;
return updated_sprite;
end;
function get_sprite_pixel(sprite: sprite_type; raster_position: point_type) return palette_color_type is
variable offset: point_type;
begin
offset.x := raster_position.x - sprite.x;
offset.y := raster_position.y - sprite.y;
return sprite.bitmap(offset.y, offset.x);
end;
function check_collision(sprite_1, sprite_2: sprite_type) return boolean is
variable positions_intersect: boolean;
begin
positions_intersect := not (
(sprite_1.y + SPRITE_HEIGHT < sprite_2.y) or
(sprite_1.y > sprite_2.y + SPRITE_HEIGHT) or
(sprite_1.x > sprite_2.x + SPRITE_WIDTH) or
(sprite_1.x + SPRITE_WIDTH < sprite_2.x)
);
return sprite_1.enabled and sprite_2.enabled and positions_intersect;
end;
end;
| unlicense | 79c902f5fe8b78cf0ce2243562083229 | 0.650061 | 3.907882 | false | false | false | false |
wltr/common-vhdl | interfaces/sram_interface/src/rtl/sram_interface.vhd | 1 | 5,958 | --------------------------------------------------------------------------------
-- LGPL v2.1, Copyright (c) 2014 Johannes Walter <[email protected]>
--
-- Description:
-- Generic SRAM interface. Tested with:
-- 16 Mbit Renesas R1LV1616RSA-7S and 8 Mbit Cypress CY62157EV30.
--------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
library work;
use work.lfsr_pkg.all;
entity sram_interface is
generic (
-- SRAM address width
addr_width_g : positive := 20;
-- SRAM data width
data_width_g : positive := 16;
-- Number of clock cycles to finish read operations
read_delay_g : positive := 3;
-- Number of clock cycles to finish write operations
write_delay_g : positive := 3);
port (
-- Clock and resets
clk_i : in std_ulogic;
rst_asy_n_i : in std_ulogic;
rst_syn_i : in std_ulogic;
-- Interface
addr_i : in std_ulogic_vector(addr_width_g - 1 downto 0);
rd_en_i : in std_ulogic;
wr_en_i : in std_ulogic;
data_i : in std_ulogic_vector(data_width_g - 1 downto 0);
data_o : out std_ulogic_vector(data_width_g - 1 downto 0);
data_en_o : out std_ulogic;
busy_o : out std_ulogic;
done_o : out std_ulogic;
-- SRAM signals
sram_addr_o : out std_ulogic_vector(addr_width_g - 1 downto 0);
sram_data_i : in std_ulogic_vector(data_width_g - 1 downto 0);
sram_data_o : out std_ulogic_vector(data_width_g - 1 downto 0);
sram_cs1_n_o : out std_ulogic;
sram_cs2_o : out std_ulogic;
sram_we_n_o : out std_ulogic;
sram_oe_n_o : out std_ulogic;
sram_le_n_o : out std_ulogic;
sram_ue_n_o : out std_ulogic;
sram_byte_n_o : out std_ulogic);
end entity sram_interface;
architecture rtl of sram_interface is
------------------------------------------------------------------------------
-- Functions
------------------------------------------------------------------------------
function max (l, r : integer) return integer is
begin
if l > r then return l;
else return r;
end if;
end function max;
------------------------------------------------------------------------------
-- Types and Constants
------------------------------------------------------------------------------
-- LFSR counter bit length
constant len_c : natural := lfsr_length(max(read_delay_g, write_delay_g));
-- LFSR counter initial value
constant seed_c : std_ulogic_vector(len_c - 1 downto 0) := lfsr_seed(len_c);
-- LFSR counter strobe value
constant rd_max_c : std_ulogic_vector(len_c - 1 downto 0) := lfsr_shift(seed_c, read_delay_g - 1);
constant wr_max_c : std_ulogic_vector(len_c - 1 downto 0) := lfsr_shift(seed_c, write_delay_g - 1);
------------------------------------------------------------------------------
-- Internal Registers
------------------------------------------------------------------------------
signal data : std_ulogic_vector(data_width_g - 1 downto 0);
signal data_en : std_ulogic;
signal done : std_ulogic;
signal sram_addr : std_ulogic_vector(addr_width_g - 1 downto 0);
signal sram_data : std_ulogic_vector(data_width_g - 1 downto 0);
signal sram_cs : std_ulogic;
signal sram_cs_n : std_ulogic;
signal sram_we_n : std_ulogic;
signal sram_oe_n : std_ulogic;
signal count : std_ulogic_vector(len_c - 1 downto 0);
begin -- architecture rtl
------------------------------------------------------------------------------
-- Outputs
------------------------------------------------------------------------------
data_o <= data;
data_en_o <= data_en;
busy_o <= sram_cs;
done_o <= done;
sram_addr_o <= sram_addr;
sram_data_o <= sram_data;
sram_cs1_n_o <= sram_cs_n;
sram_cs2_o <= sram_cs;
sram_we_n_o <= sram_we_n;
sram_oe_n_o <= sram_oe_n;
sram_le_n_o <= '0';
sram_ue_n_o <= '0';
sram_byte_n_o <= '1';
------------------------------------------------------------------------------
-- Registers
------------------------------------------------------------------------------
-- SRAM interface
intf : process (clk_i, rst_asy_n_i) is
procedure reset is
begin
data <= (others => '0');
data_en <= '0';
done <= '0';
sram_addr <= (others => '0');
sram_data <= (others => '0');
sram_cs <= '0';
sram_cs_n <= '1';
sram_we_n <= '1';
sram_oe_n <= '1';
count <= seed_c;
end procedure reset;
begin -- process intf
if rst_asy_n_i = '0' then
reset;
elsif rising_edge(clk_i) then
if rst_syn_i = '1' then
reset;
else
-- Default values for flags
done <= '0';
data_en <= '0';
if sram_cs = '0' then
-- SRAM is idle
if rd_en_i /= wr_en_i then
-- Common settings for read and write operations
sram_addr <= addr_i;
sram_cs <= '1';
sram_cs_n <= '0';
end if;
if rd_en_i = '1' and wr_en_i = '0' then
-- Read operation
sram_we_n <= '1';
sram_oe_n <= '0';
elsif rd_en_i = '0' and wr_en_i = '1' then
-- Write operation
sram_data <= data_i;
sram_we_n <= '0';
sram_oe_n <= '1';
end if;
else
-- SRAM is busy
if (sram_oe_n = '0' and count = rd_max_c) or (sram_we_n = '0' and count = wr_max_c) then
-- Counter reached num_delay_g
reset;
if sram_oe_n = '0' then
data <= sram_data_i;
data_en <= '1';
end if;
done <= '1';
else
-- Increment counter
count <= lfsr_shift(count);
end if;
end if;
end if;
end if;
end process intf;
end architecture rtl;
| lgpl-2.1 | 7469dcb169a5bb8a4e20e21d71f52216 | 0.461564 | 3.646267 | false | false | false | false |
ricardo-jasinski/vhdl-game-engine | hdl/testbench/sprites_engine_tb.vhd | 1 | 3,206 | library ieee;
use ieee.std_logic_1164.all;
use work.basic_types_pkg.all;
use work.graphics_types_pkg.all;
use work.colors_pkg.all;
use work.sprites_pkg.all;
use std.textio.all;
use std.env.all;
entity sprites_engine_tb is
end;
architecture testbench of sprites_engine_tb is
signal clock, reset: std_logic := '0';
signal raster_position: point_type;
signal sprite_pixel: palette_color_type;
signal sprite_pixel_is_valid: boolean;
procedure wait_clock_cycles(cycles_count: integer) is
begin
for i in 1 to cycles_count loop
wait until clock'event and clock = '1';
end loop;
end;
constant TOP_LEFT_SQUARE_BITMAP: paletted_bitmap_type := (
(1, 1, 1, 1, 1, 1, 1, 1),
(1, 2, 2, 2, 0, 0, 0, 1),
(1, 2, 2, 2, 0, 0, 0, 1),
(1, 2, 2, 2, 0, 0, 0, 1),
(1, 0, 0, 0, 0, 0, 0, 1),
(1, 0, 0, 0, 0, 0, 0, 1),
(1, 0, 0, 0, 0, 0, 0, 1),
(1, 1, 1, 1, 1, 1, 1, 1)
);
constant BOTTOM_RIGHT_TRIANGLE_BITMAP: paletted_bitmap_type := (
(1, 1, 1, 1, 1, 1, 1, 1),
(1, 0, 0, 0, 0, 0, 0, 1),
(1, 0, 0, 0, 0, 0, 2, 1),
(1, 0, 0, 0, 0, 2, 2, 1),
(1, 0, 0, 2, 2, 2, 2, 1),
(1, 0, 2, 2, 2, 2, 2, 1),
(1, 2, 2, 2, 2, 2, 2, 1),
(1, 1, 1, 1, 1, 1, 1, 1)
);
constant SPRITES: sprites_array_type := (
(x => 1, y => 1, bitmap => TOP_LEFT_SQUARE_BITMAP, enabled => true),
(x => 1, y => 1, bitmap => BOTTOM_RIGHT_TRIANGLE_BITMAP, enabled => true)
);
constant SPRITES_COORDINATES: point_array_type(SPRITES'range) := (
(0, 0),
(16, 0)
);
constant SPRITES_COLLISION_QUERY: sprite_collision_query_type := ( (0,1), (0,1) );
signal sprite_collisions_results: bool_vector(SPRITES_COLLISION_QUERY'range);
begin
uut: entity work.sprites_engine
generic map (
SPRITES_INITIAL_VALUES => (
(x => 1, y => 1, bitmap => TOP_LEFT_SQUARE_BITMAP, enabled => true),
(x => 5, y => 5, bitmap => BOTTOM_RIGHT_TRIANGLE_BITMAP, enabled => true)
),
SPRITES_COLLISION_QUERY => ( (0,1), (0,1) )
)
port map(
clock => clock,
reset => reset,
raster_position => raster_position,
sprites_coordinates => SPRITES_COORDINATES,
sprite_pixel => sprite_pixel,
sprite_pixel_is_valid => sprite_pixel_is_valid,
sprite_collisions_results => sprite_collisions_results,
sprites_enabled => (others => true)
);
clock <= not clock after 10 ns;
process
variable row: line;
begin
report "starting...";
reset <= '1';
wait_clock_cycles(2);
reset <= '0';
for y in 0 to 15 loop
for x in 0 to 15 loop
raster_position <= (x, y);
wait_clock_cycles(1);
write(row, sprite_pixel, field => 2);
end loop;
writeline(output, row);
end loop;
finish;
end process;
end; | unlicense | cdbcdcb229655f937b7bed2ddcf2ee01 | 0.493762 | 3.215647 | false | false | false | false |
ricardo-jasinski/vhdl-game-engine | hdl/implementation/engine/video_pll.vhd | 1 | 14,999 | -- megafunction wizard: %ALTPLL%
-- GENERATION: STANDARD
-- VERSION: WM1.0
-- MODULE: altpll
-- ============================================================
-- File Name: video_pll.vhd
-- Megafunction Name(s):
-- altpll
--
-- Simulation Library Files(s):
-- altera_mf
-- ============================================================
-- ************************************************************
-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
--
-- 12.1 Build 243 01/31/2013 SP 1 SJ Web Edition
-- ************************************************************
--Copyright (C) 1991-2012 Altera Corporation
--Your use of Altera Corporation's design tools, logic functions
--and other software and tools, and its AMPP partner logic
--functions, and any output files from any of the foregoing
--(including device programming or simulation files), and any
--associated documentation or information are expressly subject
--to the terms and conditions of the Altera Program License
--Subscription Agreement, Altera MegaCore Function License
--Agreement, or other applicable license agreement, including,
--without limitation, that your use is for the sole purpose of
--programming logic devices manufactured by Altera and sold by
--Altera or its authorized distributors. Please refer to the
--applicable agreement for further details.
LIBRARY ieee;
USE ieee.std_logic_1164.all;
LIBRARY altera_mf;
USE altera_mf.all;
ENTITY video_pll IS
PORT
(
inclk0 : IN STD_LOGIC := '0';
c0 : OUT STD_LOGIC
);
END video_pll;
ARCHITECTURE SYN OF video_pll IS
SIGNAL sub_wire0 : STD_LOGIC_VECTOR (5 DOWNTO 0);
SIGNAL sub_wire1 : STD_LOGIC ;
SIGNAL sub_wire2 : STD_LOGIC ;
SIGNAL sub_wire3 : STD_LOGIC_VECTOR (1 DOWNTO 0);
SIGNAL sub_wire4_bv : BIT_VECTOR (0 DOWNTO 0);
SIGNAL sub_wire4 : STD_LOGIC_VECTOR (0 DOWNTO 0);
COMPONENT altpll
GENERIC (
clk0_divide_by : NATURAL;
clk0_duty_cycle : NATURAL;
clk0_multiply_by : NATURAL;
clk0_phase_shift : STRING;
compensate_clock : STRING;
inclk0_input_frequency : NATURAL;
intended_device_family : STRING;
lpm_hint : STRING;
lpm_type : STRING;
operation_mode : STRING;
port_activeclock : STRING;
port_areset : STRING;
port_clkbad0 : STRING;
port_clkbad1 : STRING;
port_clkloss : STRING;
port_clkswitch : STRING;
port_configupdate : STRING;
port_fbin : STRING;
port_inclk0 : STRING;
port_inclk1 : STRING;
port_locked : STRING;
port_pfdena : STRING;
port_phasecounterselect : STRING;
port_phasedone : STRING;
port_phasestep : STRING;
port_phaseupdown : STRING;
port_pllena : STRING;
port_scanaclr : STRING;
port_scanclk : STRING;
port_scanclkena : STRING;
port_scandata : STRING;
port_scandataout : STRING;
port_scandone : STRING;
port_scanread : STRING;
port_scanwrite : STRING;
port_clk0 : STRING;
port_clk1 : STRING;
port_clk2 : STRING;
port_clk3 : STRING;
port_clk4 : STRING;
port_clk5 : STRING;
port_clkena0 : STRING;
port_clkena1 : STRING;
port_clkena2 : STRING;
port_clkena3 : STRING;
port_clkena4 : STRING;
port_clkena5 : STRING;
port_extclk0 : STRING;
port_extclk1 : STRING;
port_extclk2 : STRING;
port_extclk3 : STRING
);
PORT (
clk : OUT STD_LOGIC_VECTOR (5 DOWNTO 0);
inclk : IN STD_LOGIC_VECTOR (1 DOWNTO 0)
);
END COMPONENT;
BEGIN
sub_wire4_bv(0 DOWNTO 0) <= "0";
sub_wire4 <= To_stdlogicvector(sub_wire4_bv);
sub_wire1 <= sub_wire0(0);
c0 <= sub_wire1;
sub_wire2 <= inclk0;
sub_wire3 <= sub_wire4(0 DOWNTO 0) & sub_wire2;
altpll_component : altpll
GENERIC MAP (
clk0_divide_by => 2,
clk0_duty_cycle => 50,
clk0_multiply_by => 1,
clk0_phase_shift => "0",
compensate_clock => "CLK0",
inclk0_input_frequency => 20000,
intended_device_family => "Cyclone II",
lpm_hint => "CBX_MODULE_PREFIX=video_pll",
lpm_type => "altpll",
operation_mode => "NORMAL",
port_activeclock => "PORT_UNUSED",
port_areset => "PORT_UNUSED",
port_clkbad0 => "PORT_UNUSED",
port_clkbad1 => "PORT_UNUSED",
port_clkloss => "PORT_UNUSED",
port_clkswitch => "PORT_UNUSED",
port_configupdate => "PORT_UNUSED",
port_fbin => "PORT_UNUSED",
port_inclk0 => "PORT_USED",
port_inclk1 => "PORT_UNUSED",
port_locked => "PORT_UNUSED",
port_pfdena => "PORT_UNUSED",
port_phasecounterselect => "PORT_UNUSED",
port_phasedone => "PORT_UNUSED",
port_phasestep => "PORT_UNUSED",
port_phaseupdown => "PORT_UNUSED",
port_pllena => "PORT_UNUSED",
port_scanaclr => "PORT_UNUSED",
port_scanclk => "PORT_UNUSED",
port_scanclkena => "PORT_UNUSED",
port_scandata => "PORT_UNUSED",
port_scandataout => "PORT_UNUSED",
port_scandone => "PORT_UNUSED",
port_scanread => "PORT_UNUSED",
port_scanwrite => "PORT_UNUSED",
port_clk0 => "PORT_USED",
port_clk1 => "PORT_UNUSED",
port_clk2 => "PORT_UNUSED",
port_clk3 => "PORT_UNUSED",
port_clk4 => "PORT_UNUSED",
port_clk5 => "PORT_UNUSED",
port_clkena0 => "PORT_UNUSED",
port_clkena1 => "PORT_UNUSED",
port_clkena2 => "PORT_UNUSED",
port_clkena3 => "PORT_UNUSED",
port_clkena4 => "PORT_UNUSED",
port_clkena5 => "PORT_UNUSED",
port_extclk0 => "PORT_UNUSED",
port_extclk1 => "PORT_UNUSED",
port_extclk2 => "PORT_UNUSED",
port_extclk3 => "PORT_UNUSED"
)
PORT MAP (
inclk => sub_wire3,
clk => sub_wire0
);
END SYN;
-- ============================================================
-- CNX file retrieval info
-- ============================================================
-- Retrieval info: PRIVATE: ACTIVECLK_CHECK STRING "0"
-- Retrieval info: PRIVATE: BANDWIDTH STRING "1.000"
-- Retrieval info: PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING "0"
-- Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING "MHz"
-- Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING "Low"
-- Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING "1"
-- Retrieval info: PRIVATE: BANDWIDTH_USE_CUSTOM STRING "0"
-- Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING "0"
-- Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING "0"
-- Retrieval info: PRIVATE: CLKLOSS_CHECK STRING "0"
-- Retrieval info: PRIVATE: CLKSWITCH_CHECK STRING "1"
-- Retrieval info: PRIVATE: CNX_NO_COMPENSATE_RADIO STRING "0"
-- Retrieval info: PRIVATE: CREATE_CLKBAD_CHECK STRING "0"
-- Retrieval info: PRIVATE: CREATE_INCLK1_CHECK STRING "0"
-- Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING "c0"
-- Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "c0"
-- Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "6"
-- Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "1"
-- Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000"
-- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "25.000000"
-- Retrieval info: PRIVATE: EXPLICIT_SWITCHOVER_COUNTER STRING "0"
-- Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0"
-- Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1"
-- Retrieval info: PRIVATE: GLOCKED_FEATURE_ENABLED STRING "1"
-- Retrieval info: PRIVATE: GLOCKED_MODE_CHECK STRING "0"
-- Retrieval info: PRIVATE: GLOCK_COUNTER_EDIT NUMERIC "1048575"
-- Retrieval info: PRIVATE: HAS_MANUAL_SWITCHOVER STRING "1"
-- Retrieval info: PRIVATE: INCLK0_FREQ_EDIT STRING "50.000"
-- Retrieval info: PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING "MHz"
-- Retrieval info: PRIVATE: INCLK1_FREQ_EDIT STRING "100.000"
-- Retrieval info: PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING "1"
-- Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_CHANGED STRING "1"
-- Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING "MHz"
-- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone II"
-- Retrieval info: PRIVATE: INT_FEEDBACK__MODE_RADIO STRING "1"
-- Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING "0"
-- Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING "1"
-- Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "Not Available"
-- Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0"
-- Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "deg"
-- Retrieval info: PRIVATE: MIG_DEVICE_SPEED_GRADE STRING "Any"
-- Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0"
-- Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "1"
-- Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1"
-- Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "25.00000000"
-- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "1"
-- Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz"
-- Retrieval info: PRIVATE: PHASE_RECONFIG_FEATURE_ENABLED STRING "0"
-- Retrieval info: PRIVATE: PHASE_RECONFIG_INPUTS_CHECK STRING "0"
-- Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "0.00000000"
-- Retrieval info: PRIVATE: PHASE_SHIFT_STEP_ENABLED_CHECK STRING "0"
-- Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "deg"
-- Retrieval info: PRIVATE: PLL_ADVANCED_PARAM_CHECK STRING "0"
-- Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING "0"
-- Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC "1"
-- Retrieval info: PRIVATE: PLL_ENA_CHECK STRING "0"
-- Retrieval info: PRIVATE: PLL_ENHPLL_CHECK NUMERIC "0"
-- Retrieval info: PRIVATE: PLL_FASTPLL_CHECK NUMERIC "0"
-- Retrieval info: PRIVATE: PLL_FBMIMIC_CHECK STRING "0"
-- Retrieval info: PRIVATE: PLL_LVDS_PLL_CHECK NUMERIC "0"
-- Retrieval info: PRIVATE: PLL_PFDENA_CHECK STRING "0"
-- Retrieval info: PRIVATE: PLL_TARGET_HARCOPY_CHECK NUMERIC "0"
-- Retrieval info: PRIVATE: PRIMARY_CLK_COMBO STRING "inclk0"
-- Retrieval info: PRIVATE: RECONFIG_FILE STRING "video_pll.mif"
-- Retrieval info: PRIVATE: SACN_INPUTS_CHECK STRING "0"
-- Retrieval info: PRIVATE: SCAN_FEATURE_ENABLED STRING "0"
-- Retrieval info: PRIVATE: SELF_RESET_LOCK_LOSS STRING "0"
-- Retrieval info: PRIVATE: SHORT_SCAN_RADIO STRING "0"
-- Retrieval info: PRIVATE: SPREAD_FEATURE_ENABLED STRING "0"
-- Retrieval info: PRIVATE: SPREAD_FREQ STRING "50.000"
-- Retrieval info: PRIVATE: SPREAD_FREQ_UNIT STRING "KHz"
-- Retrieval info: PRIVATE: SPREAD_PERCENT STRING "0.500"
-- Retrieval info: PRIVATE: SPREAD_USE STRING "0"
-- Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING "0"
-- Retrieval info: PRIVATE: STICKY_CLK0 STRING "1"
-- Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC "1"
-- Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING "1"
-- Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
-- Retrieval info: PRIVATE: USE_CLK0 STRING "1"
-- Retrieval info: PRIVATE: USE_CLKENA0 STRING "0"
-- Retrieval info: PRIVATE: USE_MIL_SPEED_GRADE NUMERIC "0"
-- Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0"
-- Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
-- Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "2"
-- Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50"
-- Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "1"
-- Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0"
-- Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0"
-- Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "20000"
-- Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone II"
-- Retrieval info: CONSTANT: LPM_TYPE STRING "altpll"
-- Retrieval info: CONSTANT: OPERATION_MODE STRING "NORMAL"
-- Retrieval info: CONSTANT: PORT_ACTIVECLOCK STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_ARESET STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_CLKBAD0 STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_CLKBAD1 STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_CLKLOSS STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_CLKSWITCH STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_CONFIGUPDATE STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_FBIN STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_INCLK0 STRING "PORT_USED"
-- Retrieval info: CONSTANT: PORT_INCLK1 STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_LOCKED STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_PFDENA STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_PHASECOUNTERSELECT STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_PHASEDONE STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_PHASESTEP STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_PHASEUPDOWN STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_PLLENA STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_SCANACLR STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_SCANCLK STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_SCANCLKENA STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_SCANDATA STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_SCANDATAOUT STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_SCANDONE STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_SCANREAD STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_SCANWRITE STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_clk0 STRING "PORT_USED"
-- Retrieval info: CONSTANT: PORT_clk1 STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_clk2 STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_clk3 STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_clk4 STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_clk5 STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_clkena0 STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_clkena1 STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_clkena2 STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_clkena3 STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_clkena4 STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_clkena5 STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_extclk0 STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_extclk1 STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_extclk2 STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_extclk3 STRING "PORT_UNUSED"
-- Retrieval info: USED_PORT: @clk 0 0 6 0 OUTPUT_CLK_EXT VCC "@clk[5..0]"
-- Retrieval info: USED_PORT: @extclk 0 0 4 0 OUTPUT_CLK_EXT VCC "@extclk[3..0]"
-- Retrieval info: USED_PORT: @inclk 0 0 2 0 INPUT_CLK_EXT VCC "@inclk[1..0]"
-- Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT_CLK_EXT VCC "c0"
-- Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT_CLK_EXT GND "inclk0"
-- Retrieval info: CONNECT: @inclk 0 0 1 1 GND 0 0 0 0
-- Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0
-- Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0
-- Retrieval info: GEN_FILE: TYPE_NORMAL video_pll.vhd TRUE
-- Retrieval info: GEN_FILE: TYPE_NORMAL video_pll.ppf TRUE
-- Retrieval info: GEN_FILE: TYPE_NORMAL video_pll.inc FALSE
-- Retrieval info: GEN_FILE: TYPE_NORMAL video_pll.cmp TRUE
-- Retrieval info: GEN_FILE: TYPE_NORMAL video_pll.bsf FALSE
-- Retrieval info: GEN_FILE: TYPE_NORMAL video_pll_inst.vhd FALSE
-- Retrieval info: LIB_FILE: altera_mf
-- Retrieval info: CBX_MODULE_PREFIX: ON
| unlicense | 16cef0df6dc590fdb77d1b57f20ed366 | 0.684646 | 3.322774 | false | false | false | false |
lerwys/GitTest | hdl/modules/position_calc/generated/artix7/fr_cmplr_v6_3_8e79a078fc118dc6.vhd | 1 | 6,977 | --------------------------------------------------------------------------------
-- This file is owned and controlled by Xilinx and must be used solely --
-- for design, simulation, implementation and creation of design files --
-- limited to Xilinx devices or technologies. Use with non-Xilinx --
-- devices or technologies is expressly prohibited and immediately --
-- terminates your license. --
-- --
-- XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" SOLELY --
-- FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR XILINX DEVICES. BY --
-- PROVIDING THIS DESIGN, CODE, OR INFORMATION AS ONE POSSIBLE --
-- IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD, XILINX IS --
-- MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE FROM ANY --
-- CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING ANY --
-- RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY --
-- DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE --
-- IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR --
-- REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF --
-- INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A --
-- PARTICULAR PURPOSE. --
-- --
-- Xilinx products are not intended for use in life support appliances, --
-- devices, or systems. Use in such applications are expressly --
-- prohibited. --
-- --
-- (c) Copyright 1995-2014 Xilinx, Inc. --
-- All rights reserved. --
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-- You must compile the wrapper file fr_cmplr_v6_3_8e79a078fc118dc6.vhd when simulating
-- the core, fr_cmplr_v6_3_8e79a078fc118dc6. When compiling the wrapper file, be sure to
-- reference the XilinxCoreLib VHDL simulation library. For detailed
-- instructions, please refer to the "CORE Generator Help".
-- The synthesis directives "translate_off/translate_on" specified
-- below are supported by Xilinx, Mentor Graphics and Synplicity
-- synthesis tools. Ensure they are correct for your synthesis tool(s).
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
-- synthesis translate_off
LIBRARY XilinxCoreLib;
-- synthesis translate_on
ENTITY fr_cmplr_v6_3_8e79a078fc118dc6 IS
PORT (
aclk : IN STD_LOGIC;
aclken : IN STD_LOGIC;
s_axis_data_tvalid : IN STD_LOGIC;
s_axis_data_tready : OUT STD_LOGIC;
s_axis_data_tuser : IN STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axis_data_tdata : IN STD_LOGIC_VECTOR(23 DOWNTO 0);
m_axis_data_tvalid : OUT STD_LOGIC;
m_axis_data_tuser : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
m_axis_data_tdata : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
event_s_data_chanid_incorrect : OUT STD_LOGIC
);
END fr_cmplr_v6_3_8e79a078fc118dc6;
ARCHITECTURE fr_cmplr_v6_3_8e79a078fc118dc6_a OF fr_cmplr_v6_3_8e79a078fc118dc6 IS
-- synthesis translate_off
COMPONENT wrapped_fr_cmplr_v6_3_8e79a078fc118dc6
PORT (
aclk : IN STD_LOGIC;
aclken : IN STD_LOGIC;
s_axis_data_tvalid : IN STD_LOGIC;
s_axis_data_tready : OUT STD_LOGIC;
s_axis_data_tuser : IN STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axis_data_tdata : IN STD_LOGIC_VECTOR(23 DOWNTO 0);
m_axis_data_tvalid : OUT STD_LOGIC;
m_axis_data_tuser : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
m_axis_data_tdata : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
event_s_data_chanid_incorrect : OUT STD_LOGIC
);
END COMPONENT;
-- Configuration specification
FOR ALL : wrapped_fr_cmplr_v6_3_8e79a078fc118dc6 USE ENTITY XilinxCoreLib.fir_compiler_v6_3(behavioral)
GENERIC MAP (
c_accum_op_path_widths => "42",
c_accum_path_widths => "42",
c_channel_pattern => "fixed",
c_coef_file => "fr_cmplr_v6_3_8e79a078fc118dc6.mif",
c_coef_file_lines => 18,
c_coef_mem_packing => 0,
c_coef_memtype => 2,
c_coef_path_sign => "0",
c_coef_path_src => "0",
c_coef_path_widths => "16",
c_coef_reload => 0,
c_coef_width => 16,
c_col_config => "1",
c_col_mode => 1,
c_col_pipe_len => 4,
c_component_name => "fr_cmplr_v6_3_8e79a078fc118dc6",
c_config_packet_size => 0,
c_config_sync_mode => 0,
c_config_tdata_width => 1,
c_data_has_tlast => 0,
c_data_mem_packing => 1,
c_data_memtype => 1,
c_data_path_sign => "0",
c_data_path_src => "0",
c_data_path_widths => "24",
c_data_width => 24,
c_datapath_memtype => 2,
c_decim_rate => 2,
c_ext_mult_cnfg => "none",
c_filter_type => 1,
c_filts_packed => 0,
c_has_aclken => 1,
c_has_aresetn => 0,
c_has_config_channel => 0,
c_input_rate => 1400000,
c_interp_rate => 1,
c_ipbuff_memtype => 2,
c_latency => 18,
c_m_data_has_tready => 0,
c_m_data_has_tuser => 1,
c_m_data_tdata_width => 32,
c_m_data_tuser_width => 2,
c_mem_arrangement => 1,
c_num_channels => 4,
c_num_filts => 1,
c_num_madds => 1,
c_num_reload_slots => 1,
c_num_taps => 35,
c_opbuff_memtype => 0,
c_opt_madds => "none",
c_optimization => 0,
c_output_path_widths => "25",
c_output_rate => 2800000,
c_output_width => 25,
c_oversampling_rate => 9,
c_reload_tdata_width => 1,
c_round_mode => 4,
c_s_data_has_fifo => 0,
c_s_data_has_tuser => 1,
c_s_data_tdata_width => 24,
c_s_data_tuser_width => 2,
c_symmetry => 1,
c_xdevicefamily => "artix7",
c_zero_packing_factor => 1
);
-- synthesis translate_on
BEGIN
-- synthesis translate_off
U0 : wrapped_fr_cmplr_v6_3_8e79a078fc118dc6
PORT MAP (
aclk => aclk,
aclken => aclken,
s_axis_data_tvalid => s_axis_data_tvalid,
s_axis_data_tready => s_axis_data_tready,
s_axis_data_tuser => s_axis_data_tuser,
s_axis_data_tdata => s_axis_data_tdata,
m_axis_data_tvalid => m_axis_data_tvalid,
m_axis_data_tuser => m_axis_data_tuser,
m_axis_data_tdata => m_axis_data_tdata,
event_s_data_chanid_incorrect => event_s_data_chanid_incorrect
);
-- synthesis translate_on
END fr_cmplr_v6_3_8e79a078fc118dc6_a;
| lgpl-3.0 | b12e12dc05645665b460c8445790a8b4 | 0.552816 | 3.525518 | false | false | false | false |
lerwys/GitTest | hdl/modules/wb_position_calc/position_calc_counters.vhd | 1 | 11,378 | ------------------------------------------------------------------------------
-- Title : Position Calcualtion Error Counters (single)
------------------------------------------------------------------------------
-- Author : Lucas Maziero Russo
-- Company : CNPEM LNLS-DIG
-- Created : 2014-01-13
-- Platform : FPGA-generic
-------------------------------------------------------------------------------
-- Description: Simple counters for errors on the DSP chain
-------------------------------------------------------------------------------
-- Copyright (c) 2014 CNPEM
-- Licensed under GNU Lesser General Public License (LGPL) v3.0
-------------------------------------------------------------------------------
-- Revisions :
-- Date Version Author Description
-- 2014-01-13 1.0 lucas.russo Created
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
library work;
use work.position_calc_core_pkg.all;
entity position_calc_counters is
generic (
g_cntr_size : natural := 16
);
port (
fs_clk2x_i : in std_logic; -- clock period = 4.44116091946435 ns (225.16635135135124 Mhz)
fs_rst2x_n_i : in std_logic;
-- Clock enables for various rates
tbt_ce_i : in std_logic;
fofb_ce_i : in std_logic;
monit_cic_ce_i : in std_logic;
monit_cfir_ce_i : in std_logic;
monit_pfir_ce_i : in std_logic;
monit_01_ce_i : in std_logic;
tbt_decim_q_ch01_incorrect_i : in std_logic;
tbt_decim_q_ch23_incorrect_i : in std_logic;
tbt_decim_err_clr_i : in std_logic;
fofb_decim_q_ch01_missing_i : in std_logic;
fofb_decim_q_ch23_missing_i : in std_logic;
fofb_decim_err_clr_i : in std_logic;
monit_cic_unexpected_i : in std_logic;
monit_cfir_incorrect_i : in std_logic;
monit_part1_err_clr_i : in std_logic;
monit_pfir_incorrect_i : in std_logic;
monit_pos_1_incorrect_i : in std_logic;
monit_part2_err_clr_i : in std_logic;
tbt_incorrect_ctnr_ch01_o : out std_logic_vector(g_cntr_size-1 downto 0);
tbt_incorrect_ctnr_ch23_o : out std_logic_vector(g_cntr_size-1 downto 0);
fofb_incorrect_ctnr_ch01_o : out std_logic_vector(g_cntr_size-1 downto 0);
fofb_incorrect_ctnr_ch23_o : out std_logic_vector(g_cntr_size-1 downto 0);
monit_cic_incorrect_ctnr_o : out std_logic_vector(g_cntr_size-1 downto 0);
monit_cfir_incorrect_ctnr_o : out std_logic_vector(g_cntr_size-1 downto 0);
monit_pfir_incorrect_ctnr_o : out std_logic_vector(g_cntr_size-1 downto 0);
monit_01_incorrect_ctnr_o : out std_logic_vector(g_cntr_size-1 downto 0)
);
end position_calc_counters;
architecture rtl of position_calc_counters is
begin
-------------------------------------------------------------------------------
-- TBT error counters
-------------------------------------------------------------------------------
cmp_tbt_ch01_calc_counters : position_calc_counters_single
port map (
fs_clk2x_i => fs_clk2x_i,
fs_rst2x_n_i => fs_rst2x_n_i,
-- Clock enable
ce_i => tbt_ce_i,
-- Error inputs (one clock cycle long)
err1_i => tbt_decim_q_ch01_incorrect_i,
-- Counter clear (synchronous to fs_clk2x_i and NOT to fs_clk2x_i and ce_i)
cntr_clr_i => tbt_decim_err_clr_i,
-- Output counter
cntr_o => tbt_incorrect_ctnr_ch01_o
);
cmp_tbt_ch23_calc_counters : position_calc_counters_single
port map (
fs_clk2x_i => fs_clk2x_i,
fs_rst2x_n_i => fs_rst2x_n_i,
-- Clock enable
ce_i => tbt_ce_i,
-- Error inputs (one clock cycle long)
err1_i => tbt_decim_q_ch23_incorrect_i,
-- Counter clear (synchronous to fs_clk2x_i and NOT to fs_clk2x_i and ce_i)
cntr_clr_i => tbt_decim_err_clr_i,
-- Output counter
cntr_o => tbt_incorrect_ctnr_ch23_o
);
-------------------------------------------------------------------------------
-- FOFB error counters
-------------------------------------------------------------------------------
cmp_fofb_ch01_calc_counters : position_calc_counters_single
port map (
fs_clk2x_i => fs_clk2x_i,
fs_rst2x_n_i => fs_rst2x_n_i,
-- Clock enable
ce_i => fofb_ce_i,
-- Error inputs (one clock cycle long)
err1_i => fofb_decim_q_ch01_missing_i,
-- Counter clear (synchronous to fs_clk2x_i and NOT to fs_clk2x_i and ce_i)
cntr_clr_i => fofb_decim_err_clr_i,
-- Output counter
cntr_o => fofb_incorrect_ctnr_ch01_o
);
cmp_fofb_ch23_calc_counters : position_calc_counters_single
port map (
fs_clk2x_i => fs_clk2x_i,
fs_rst2x_n_i => fs_rst2x_n_i,
-- Clock enable
ce_i => fofb_ce_i,
-- Error inputs (one clock cycle long)
err1_i => fofb_decim_q_ch23_missing_i,
-- Counter clear (synchronous to fs_clk2x_i and NOT to fs_clk2x_i and ce_i)
cntr_clr_i => fofb_decim_err_clr_i,
-- Output counter
cntr_o => fofb_incorrect_ctnr_ch23_o
);
-------------------------------------------------------------------------------
-- Monit part 1 error counters
-------------------------------------------------------------------------------
cmp_monit_cic_calc_counters : position_calc_counters_single
port map (
fs_clk2x_i => fs_clk2x_i,
fs_rst2x_n_i => fs_rst2x_n_i,
-- Clock enable
ce_i => monit_cic_ce_i,
-- Error inputs (one clock cycle long)
err1_i => monit_cic_unexpected_i,
-- Counter clear (synchronous to fs_clk2x_i and NOT to fs_clk2x_i and ce_i)
cntr_clr_i => monit_part1_err_clr_i,
-- Output counter
cntr_o => monit_cic_incorrect_ctnr_o
);
cmp_monit_cfir_calc_counters : position_calc_counters_single
port map (
fs_clk2x_i => fs_clk2x_i,
fs_rst2x_n_i => fs_rst2x_n_i,
-- Clock enable
ce_i => monit_cfir_ce_i,
-- Error inputs (one clock cycle long)
err1_i => monit_cfir_incorrect_i,
-- Counter clear (synchronous to fs_clk2x_i and NOT to fs_clk2x_i and ce_i)
cntr_clr_i => monit_part1_err_clr_i,
-- Output counter
cntr_o => monit_cfir_incorrect_ctnr_o
);
-------------------------------------------------------------------------------
-- Monit part 2 error counters
-------------------------------------------------------------------------------
cmp_monit_pfir_calc_counters : position_calc_counters_single
port map (
fs_clk2x_i => fs_clk2x_i,
fs_rst2x_n_i => fs_rst2x_n_i,
-- Clock enable
ce_i => monit_pfir_ce_i,
-- Error inputs (one clock cycle long)
err1_i => monit_pfir_incorrect_i,
-- Counter clear (synchronous to fs_clk2x_i and NOT to fs_clk2x_i and ce_i)
cntr_clr_i => monit_part2_err_clr_i,
-- Output counter
cntr_o => monit_pfir_incorrect_ctnr_o
);
cmp_monit_0_1_calc_counters : position_calc_counters_single
port map (
fs_clk2x_i => fs_clk2x_i,
fs_rst2x_n_i => fs_rst2x_n_i,
-- Clock enable
ce_i => monit_01_ce_i,
-- Error inputs (one clock cycle long)
err1_i => monit_pos_1_incorrect_i,
-- Counter clear (synchronous to fs_clk2x_i and NOT to fs_clk2x_i and ce_i)
cntr_clr_i => monit_part2_err_clr_i,
-- Output counter
cntr_o => monit_01_incorrect_ctnr_o
);
end rtl;
| lgpl-3.0 | fac2cda17b605477f62b844bbf93e44d | 0.343909 | 4.949108 | false | false | false | false |
wltr/common-vhdl | dsp/ads1281_filter/src/rtl/ads1281_filter/ads1281_filter_output.vhd | 1 | 2,289 | --------------------------------------------------------------------------------
-- LGPL v2.1, Copyright (c) 2014 Johannes Walter <[email protected]>
--
-- Description:
-- Alternate between the outputs of the two interleaved filters.
--------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity ads1281_filter_output is
port (
-- Clock and resets
clk_i : in std_ulogic;
rst_asy_n_i : in std_ulogic;
rst_syn_i : in std_ulogic;
-- 1st MAC result
data1_i : in signed(23 downto 0);
data1_en_i : in std_ulogic;
-- 2nd MAC result
data2_i : in signed(23 downto 0);
data2_en_i : in std_ulogic;
-- Filter output
data_o : out std_ulogic_vector(23 downto 0);
data_en_o : out std_ulogic);
end entity ads1281_filter_output;
architecture rtl of ads1281_filter_output is
------------------------------------------------------------------------------
-- Internal Registers
------------------------------------------------------------------------------
signal data : signed(23 downto 0);
signal data_en : std_ulogic;
begin -- architecture rtl
------------------------------------------------------------------------------
-- Outputs
------------------------------------------------------------------------------
data_o <= std_ulogic_vector(data);
data_en_o <= data_en;
------------------------------------------------------------------------------
-- Registers
------------------------------------------------------------------------------
regs : process (clk_i, rst_asy_n_i) is
procedure reset is
begin
data <= to_signed(0, data'length);
data_en <= '0';
end procedure reset;
begin -- process regs
if rst_asy_n_i = '0' then
reset;
elsif rising_edge(clk_i) then
if rst_syn_i = '1' then
reset;
else
if data1_en_i = '1' then
data <= data1_i;
elsif data2_en_i = '1' then
data <= data2_i;
end if;
data_en <= data1_en_i xor data2_en_i;
end if;
end if;
end process regs;
end architecture rtl;
| lgpl-2.1 | 36fcbff884d7bc1abee58fe1aeb1577d | 0.408475 | 4.436047 | false | false | false | false |
lerwys/GitTest | hdl/modules/position_calc/generated/virtex6/fr_cmplr_v6_3_eb3f5e21c238e176.vhd | 1 | 6,993 | --------------------------------------------------------------------------------
-- This file is owned and controlled by Xilinx and must be used solely --
-- for design, simulation, implementation and creation of design files --
-- limited to Xilinx devices or technologies. Use with non-Xilinx --
-- devices or technologies is expressly prohibited and immediately --
-- terminates your license. --
-- --
-- XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" SOLELY --
-- FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR XILINX DEVICES. BY --
-- PROVIDING THIS DESIGN, CODE, OR INFORMATION AS ONE POSSIBLE --
-- IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD, XILINX IS --
-- MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE FROM ANY --
-- CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING ANY --
-- RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY --
-- DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE --
-- IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR --
-- REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF --
-- INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A --
-- PARTICULAR PURPOSE. --
-- --
-- Xilinx products are not intended for use in life support appliances, --
-- devices, or systems. Use in such applications are expressly --
-- prohibited. --
-- --
-- (c) Copyright 1995-2014 Xilinx, Inc. --
-- All rights reserved. --
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-- You must compile the wrapper file fr_cmplr_v6_3_eb3f5e21c238e176.vhd when simulating
-- the core, fr_cmplr_v6_3_eb3f5e21c238e176. When compiling the wrapper file, be sure to
-- reference the XilinxCoreLib VHDL simulation library. For detailed
-- instructions, please refer to the "CORE Generator Help".
-- The synthesis directives "translate_off/translate_on" specified
-- below are supported by Xilinx, Mentor Graphics and Synplicity
-- synthesis tools. Ensure they are correct for your synthesis tool(s).
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
-- synthesis translate_off
LIBRARY XilinxCoreLib;
-- synthesis translate_on
ENTITY fr_cmplr_v6_3_eb3f5e21c238e176 IS
PORT (
aclk : IN STD_LOGIC;
aclken : IN STD_LOGIC;
s_axis_data_tvalid : IN STD_LOGIC;
s_axis_data_tready : OUT STD_LOGIC;
s_axis_data_tuser : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
s_axis_data_tdata : IN STD_LOGIC_VECTOR(47 DOWNTO 0);
m_axis_data_tvalid : OUT STD_LOGIC;
m_axis_data_tuser : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
m_axis_data_tdata : OUT STD_LOGIC_VECTOR(63 DOWNTO 0);
event_s_data_chanid_incorrect : OUT STD_LOGIC
);
END fr_cmplr_v6_3_eb3f5e21c238e176;
ARCHITECTURE fr_cmplr_v6_3_eb3f5e21c238e176_a OF fr_cmplr_v6_3_eb3f5e21c238e176 IS
-- synthesis translate_off
COMPONENT wrapped_fr_cmplr_v6_3_eb3f5e21c238e176
PORT (
aclk : IN STD_LOGIC;
aclken : IN STD_LOGIC;
s_axis_data_tvalid : IN STD_LOGIC;
s_axis_data_tready : OUT STD_LOGIC;
s_axis_data_tuser : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
s_axis_data_tdata : IN STD_LOGIC_VECTOR(47 DOWNTO 0);
m_axis_data_tvalid : OUT STD_LOGIC;
m_axis_data_tuser : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
m_axis_data_tdata : OUT STD_LOGIC_VECTOR(63 DOWNTO 0);
event_s_data_chanid_incorrect : OUT STD_LOGIC
);
END COMPONENT;
-- Configuration specification
FOR ALL : wrapped_fr_cmplr_v6_3_eb3f5e21c238e176 USE ENTITY XilinxCoreLib.fir_compiler_v6_3(behavioral)
GENERIC MAP (
c_accum_op_path_widths => "45,45",
c_accum_path_widths => "45,45",
c_channel_pattern => "fixed",
c_coef_file => "fr_cmplr_v6_3_eb3f5e21c238e176.mif",
c_coef_file_lines => 140,
c_coef_mem_packing => 0,
c_coef_memtype => 2,
c_coef_path_sign => "0,0",
c_coef_path_src => "0,0",
c_coef_path_widths => "16,16",
c_coef_reload => 0,
c_coef_width => 16,
c_col_config => "4",
c_col_mode => 1,
c_col_pipe_len => 4,
c_component_name => "fr_cmplr_v6_3_eb3f5e21c238e176",
c_config_packet_size => 0,
c_config_sync_mode => 0,
c_config_tdata_width => 1,
c_data_has_tlast => 0,
c_data_mem_packing => 1,
c_data_memtype => 1,
c_data_path_sign => "0,0",
c_data_path_src => "0,1",
c_data_path_widths => "24,24",
c_data_width => 24,
c_datapath_memtype => 1,
c_decim_rate => 35,
c_ext_mult_cnfg => "none",
c_filter_type => 1,
c_filts_packed => 0,
c_has_aclken => 1,
c_has_aresetn => 0,
c_has_config_channel => 0,
c_input_rate => 1,
c_interp_rate => 1,
c_ipbuff_memtype => 0,
c_latency => 12,
c_m_data_has_tready => 0,
c_m_data_has_tuser => 1,
c_m_data_tdata_width => 64,
c_m_data_tuser_width => 1,
c_mem_arrangement => 1,
c_num_channels => 2,
c_num_filts => 1,
c_num_madds => 4,
c_num_reload_slots => 1,
c_num_taps => 248,
c_opbuff_memtype => 0,
c_opt_madds => "none",
c_optimization => 0,
c_output_path_widths => "25,25",
c_output_rate => 35,
c_output_width => 25,
c_oversampling_rate => 1,
c_reload_tdata_width => 1,
c_round_mode => 4,
c_s_data_has_fifo => 0,
c_s_data_has_tuser => 1,
c_s_data_tdata_width => 48,
c_s_data_tuser_width => 1,
c_symmetry => 1,
c_xdevicefamily => "virtex6",
c_zero_packing_factor => 1
);
-- synthesis translate_on
BEGIN
-- synthesis translate_off
U0 : wrapped_fr_cmplr_v6_3_eb3f5e21c238e176
PORT MAP (
aclk => aclk,
aclken => aclken,
s_axis_data_tvalid => s_axis_data_tvalid,
s_axis_data_tready => s_axis_data_tready,
s_axis_data_tuser => s_axis_data_tuser,
s_axis_data_tdata => s_axis_data_tdata,
m_axis_data_tvalid => m_axis_data_tvalid,
m_axis_data_tuser => m_axis_data_tuser,
m_axis_data_tdata => m_axis_data_tdata,
event_s_data_chanid_incorrect => event_s_data_chanid_incorrect
);
-- synthesis translate_on
END fr_cmplr_v6_3_eb3f5e21c238e176_a;
| lgpl-3.0 | 15408c80682d3000c573e86e12c67f52 | 0.552553 | 3.484305 | false | false | false | false |
lerwys/GitTest | hdl/platform/artix7/multiplier_16x10_DSP.vhd | 1 | 4,274 | --------------------------------------------------------------------------------
-- This file is owned and controlled by Xilinx and must be used solely --
-- for design, simulation, implementation and creation of design files --
-- limited to Xilinx devices or technologies. Use with non-Xilinx --
-- devices or technologies is expressly prohibited and immediately --
-- terminates your license. --
-- --
-- XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" SOLELY --
-- FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR XILINX DEVICES. BY --
-- PROVIDING THIS DESIGN, CODE, OR INFORMATION AS ONE POSSIBLE --
-- IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD, XILINX IS --
-- MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE FROM ANY --
-- CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING ANY --
-- RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY --
-- DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE --
-- IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR --
-- REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF --
-- INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A --
-- PARTICULAR PURPOSE. --
-- --
-- Xilinx products are not intended for use in life support appliances, --
-- devices, or systems. Use in such applications are expressly --
-- prohibited. --
-- --
-- (c) Copyright 1995-2013 Xilinx, Inc. --
-- All rights reserved. --
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-- You must compile the wrapper file multiplier_16x10_DSP.vhd when simulating
-- the core, multiplier_16x10_DSP. When compiling the wrapper file, be sure to
-- reference the XilinxCoreLib VHDL simulation library. For detailed
-- instructions, please refer to the "CORE Generator Help".
-- The synthesis directives "translate_off/translate_on" specified
-- below are supported by Xilinx, Mentor Graphics and Synplicity
-- synthesis tools. Ensure they are correct for your synthesis tool(s).
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
-- synthesis translate_off
LIBRARY XilinxCoreLib;
-- synthesis translate_on
ENTITY multiplier_16x10_DSP IS
PORT (
clk : IN STD_LOGIC;
a : IN STD_LOGIC_VECTOR(15 DOWNTO 0);
b : IN STD_LOGIC_VECTOR(9 DOWNTO 0);
p : OUT STD_LOGIC_VECTOR(25 DOWNTO 0)
);
END multiplier_16x10_DSP;
ARCHITECTURE multiplier_16x10_DSP_a OF multiplier_16x10_DSP IS
-- synthesis translate_off
COMPONENT wrapped_multiplier_16x10_DSP
PORT (
clk : IN STD_LOGIC;
a : IN STD_LOGIC_VECTOR(15 DOWNTO 0);
b : IN STD_LOGIC_VECTOR(9 DOWNTO 0);
p : OUT STD_LOGIC_VECTOR(25 DOWNTO 0)
);
END COMPONENT;
-- Configuration specification
FOR ALL : wrapped_multiplier_16x10_DSP USE ENTITY XilinxCoreLib.mult_gen_v11_2(behavioral)
GENERIC MAP (
c_a_type => 0,
c_a_width => 16,
c_b_type => 0,
c_b_value => "10000001",
c_b_width => 10,
c_ccm_imp => 0,
c_ce_overrides_sclr => 0,
c_has_ce => 0,
c_has_sclr => 0,
c_has_zero_detect => 0,
c_latency => 3,
c_model_type => 0,
c_mult_type => 1,
c_optimize_goal => 1,
c_out_high => 25,
c_out_low => 0,
c_round_output => 0,
c_round_pt => 0,
c_verbosity => 0,
c_xdevicefamily => "artix7"
);
-- synthesis translate_on
BEGIN
-- synthesis translate_off
U0 : wrapped_multiplier_16x10_DSP
PORT MAP (
clk => clk,
a => a,
b => b,
p => p
);
-- synthesis translate_on
END multiplier_16x10_DSP_a;
| lgpl-3.0 | 86ddfffb16bde09ce3420d66aa928c55 | 0.544221 | 4.5132 | false | false | false | false |
lerwys/GitTest | hdl/modules/position_calc/generated/artix7/addsb_11_0_293aa5f110d040c2.vhd | 1 | 4,567 | --------------------------------------------------------------------------------
-- This file is owned and controlled by Xilinx and must be used solely --
-- for design, simulation, implementation and creation of design files --
-- limited to Xilinx devices or technologies. Use with non-Xilinx --
-- devices or technologies is expressly prohibited and immediately --
-- terminates your license. --
-- --
-- XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" SOLELY --
-- FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR XILINX DEVICES. BY --
-- PROVIDING THIS DESIGN, CODE, OR INFORMATION AS ONE POSSIBLE --
-- IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD, XILINX IS --
-- MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE FROM ANY --
-- CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING ANY --
-- RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY --
-- DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE --
-- IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR --
-- REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF --
-- INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A --
-- PARTICULAR PURPOSE. --
-- --
-- Xilinx products are not intended for use in life support appliances, --
-- devices, or systems. Use in such applications are expressly --
-- prohibited. --
-- --
-- (c) Copyright 1995-2013 Xilinx, Inc. --
-- All rights reserved. --
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-- You must compile the wrapper file addsb_11_0_293aa5f110d040c2.vhd when simulating
-- the core, addsb_11_0_293aa5f110d040c2. When compiling the wrapper file, be sure to
-- reference the XilinxCoreLib VHDL simulation library. For detailed
-- instructions, please refer to the "CORE Generator Help".
-- The synthesis directives "translate_off/translate_on" specified
-- below are supported by Xilinx, Mentor Graphics and Synplicity
-- synthesis tools. Ensure they are correct for your synthesis tool(s).
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
-- synthesis translate_off
LIBRARY XilinxCoreLib;
-- synthesis translate_on
ENTITY addsb_11_0_293aa5f110d040c2 IS
PORT (
a : IN STD_LOGIC_VECTOR(24 DOWNTO 0);
b : IN STD_LOGIC_VECTOR(24 DOWNTO 0);
s : OUT STD_LOGIC_VECTOR(24 DOWNTO 0)
);
END addsb_11_0_293aa5f110d040c2;
ARCHITECTURE addsb_11_0_293aa5f110d040c2_a OF addsb_11_0_293aa5f110d040c2 IS
-- synthesis translate_off
COMPONENT wrapped_addsb_11_0_293aa5f110d040c2
PORT (
a : IN STD_LOGIC_VECTOR(24 DOWNTO 0);
b : IN STD_LOGIC_VECTOR(24 DOWNTO 0);
s : OUT STD_LOGIC_VECTOR(24 DOWNTO 0)
);
END COMPONENT;
-- Configuration specification
FOR ALL : wrapped_addsb_11_0_293aa5f110d040c2 USE ENTITY XilinxCoreLib.c_addsub_v11_0(behavioral)
GENERIC MAP (
c_a_type => 0,
c_a_width => 25,
c_add_mode => 0,
c_ainit_val => "0",
c_b_constant => 0,
c_b_type => 0,
c_b_value => "0000000000000000000000000",
c_b_width => 25,
c_borrow_low => 1,
c_bypass_low => 0,
c_ce_overrides_bypass => 1,
c_ce_overrides_sclr => 0,
c_has_bypass => 0,
c_has_c_in => 0,
c_has_c_out => 0,
c_has_ce => 0,
c_has_sclr => 0,
c_has_sinit => 0,
c_has_sset => 0,
c_implementation => 0,
c_latency => 0,
c_out_width => 25,
c_sclr_overrides_sset => 0,
c_sinit_val => "0",
c_verbosity => 0,
c_xdevicefamily => "artix7"
);
-- synthesis translate_on
BEGIN
-- synthesis translate_off
U0 : wrapped_addsb_11_0_293aa5f110d040c2
PORT MAP (
a => a,
b => b,
s => s
);
-- synthesis translate_on
END addsb_11_0_293aa5f110d040c2_a;
| lgpl-3.0 | 365a32eaf9ab8fcae62133c323bffd85 | 0.536238 | 4.066785 | false | false | false | false |
lerwys/GitTest | hdl/modules/position_calc/generated/virtex6/cmpy_v5_0_fc1d91881e8e8ae6.vhd | 1 | 5,807 | --------------------------------------------------------------------------------
-- This file is owned and controlled by Xilinx and must be used solely --
-- for design, simulation, implementation and creation of design files --
-- limited to Xilinx devices or technologies. Use with non-Xilinx --
-- devices or technologies is expressly prohibited and immediately --
-- terminates your license. --
-- --
-- XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" SOLELY --
-- FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR XILINX DEVICES. BY --
-- PROVIDING THIS DESIGN, CODE, OR INFORMATION AS ONE POSSIBLE --
-- IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD, XILINX IS --
-- MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE FROM ANY --
-- CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING ANY --
-- RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY --
-- DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE --
-- IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR --
-- REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF --
-- INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A --
-- PARTICULAR PURPOSE. --
-- --
-- Xilinx products are not intended for use in life support appliances, --
-- devices, or systems. Use in such applications are expressly --
-- prohibited. --
-- --
-- (c) Copyright 1995-2013 Xilinx, Inc. --
-- All rights reserved. --
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-- You must compile the wrapper file cmpy_v5_0_fc1d91881e8e8ae6.vhd when simulating
-- the core, cmpy_v5_0_fc1d91881e8e8ae6. When compiling the wrapper file, be sure to
-- reference the XilinxCoreLib VHDL simulation library. For detailed
-- instructions, please refer to the "CORE Generator Help".
-- The synthesis directives "translate_off/translate_on" specified
-- below are supported by Xilinx, Mentor Graphics and Synplicity
-- synthesis tools. Ensure they are correct for your synthesis tool(s).
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
-- synthesis translate_off
LIBRARY XilinxCoreLib;
-- synthesis translate_on
ENTITY cmpy_v5_0_fc1d91881e8e8ae6 IS
PORT (
aclk : IN STD_LOGIC;
aclken : IN STD_LOGIC;
s_axis_a_tvalid : IN STD_LOGIC;
s_axis_a_tdata : IN STD_LOGIC_VECTOR(47 DOWNTO 0);
s_axis_b_tvalid : IN STD_LOGIC;
s_axis_b_tuser : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
s_axis_b_tdata : IN STD_LOGIC_VECTOR(47 DOWNTO 0);
m_axis_dout_tvalid : OUT STD_LOGIC;
m_axis_dout_tuser : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
m_axis_dout_tdata : OUT STD_LOGIC_VECTOR(47 DOWNTO 0)
);
END cmpy_v5_0_fc1d91881e8e8ae6;
ARCHITECTURE cmpy_v5_0_fc1d91881e8e8ae6_a OF cmpy_v5_0_fc1d91881e8e8ae6 IS
-- synthesis translate_off
COMPONENT wrapped_cmpy_v5_0_fc1d91881e8e8ae6
PORT (
aclk : IN STD_LOGIC;
aclken : IN STD_LOGIC;
s_axis_a_tvalid : IN STD_LOGIC;
s_axis_a_tdata : IN STD_LOGIC_VECTOR(47 DOWNTO 0);
s_axis_b_tvalid : IN STD_LOGIC;
s_axis_b_tuser : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
s_axis_b_tdata : IN STD_LOGIC_VECTOR(47 DOWNTO 0);
m_axis_dout_tvalid : OUT STD_LOGIC;
m_axis_dout_tuser : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
m_axis_dout_tdata : OUT STD_LOGIC_VECTOR(47 DOWNTO 0)
);
END COMPONENT;
-- Configuration specification
FOR ALL : wrapped_cmpy_v5_0_fc1d91881e8e8ae6 USE ENTITY XilinxCoreLib.cmpy_v5_0(behavioral)
GENERIC MAP (
c_a_width => 24,
c_b_width => 24,
c_has_aclken => 1,
c_has_aresetn => 0,
c_has_s_axis_a_tlast => 0,
c_has_s_axis_a_tuser => 0,
c_has_s_axis_b_tlast => 0,
c_has_s_axis_b_tuser => 1,
c_has_s_axis_ctrl_tlast => 0,
c_has_s_axis_ctrl_tuser => 0,
c_latency => 6,
c_m_axis_dout_tdata_width => 48,
c_m_axis_dout_tuser_width => 1,
c_mult_type => 1,
c_optimize_goal => 1,
c_out_width => 24,
c_s_axis_a_tdata_width => 48,
c_s_axis_a_tuser_width => 1,
c_s_axis_b_tdata_width => 48,
c_s_axis_b_tuser_width => 1,
c_s_axis_ctrl_tdata_width => 8,
c_s_axis_ctrl_tuser_width => 1,
c_throttle_scheme => 3,
c_tlast_resolution => 0,
c_verbosity => 0,
c_xdevice => "xc6vlx240t",
c_xdevicefamily => "virtex6",
has_negate => 0,
round => 0,
single_output => 0,
use_dsp_cascades => 1
);
-- synthesis translate_on
BEGIN
-- synthesis translate_off
U0 : wrapped_cmpy_v5_0_fc1d91881e8e8ae6
PORT MAP (
aclk => aclk,
aclken => aclken,
s_axis_a_tvalid => s_axis_a_tvalid,
s_axis_a_tdata => s_axis_a_tdata,
s_axis_b_tvalid => s_axis_b_tvalid,
s_axis_b_tuser => s_axis_b_tuser,
s_axis_b_tdata => s_axis_b_tdata,
m_axis_dout_tvalid => m_axis_dout_tvalid,
m_axis_dout_tuser => m_axis_dout_tuser,
m_axis_dout_tdata => m_axis_dout_tdata
);
-- synthesis translate_on
END cmpy_v5_0_fc1d91881e8e8ae6_a;
| lgpl-3.0 | 92b32d6c083ebea030a9359469abd32a | 0.555364 | 3.582357 | false | false | false | false |
lerwys/GitTest | hdl/modules/position_calc/generated/artix7/addsb_11_0_44053abf11139d96.vhd | 1 | 4,568 | --------------------------------------------------------------------------------
-- This file is owned and controlled by Xilinx and must be used solely --
-- for design, simulation, implementation and creation of design files --
-- limited to Xilinx devices or technologies. Use with non-Xilinx --
-- devices or technologies is expressly prohibited and immediately --
-- terminates your license. --
-- --
-- XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" SOLELY --
-- FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR XILINX DEVICES. BY --
-- PROVIDING THIS DESIGN, CODE, OR INFORMATION AS ONE POSSIBLE --
-- IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD, XILINX IS --
-- MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE FROM ANY --
-- CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING ANY --
-- RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY --
-- DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE --
-- IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR --
-- REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF --
-- INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A --
-- PARTICULAR PURPOSE. --
-- --
-- Xilinx products are not intended for use in life support appliances, --
-- devices, or systems. Use in such applications are expressly --
-- prohibited. --
-- --
-- (c) Copyright 1995-2013 Xilinx, Inc. --
-- All rights reserved. --
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-- You must compile the wrapper file addsb_11_0_44053abf11139d96.vhd when simulating
-- the core, addsb_11_0_44053abf11139d96. When compiling the wrapper file, be sure to
-- reference the XilinxCoreLib VHDL simulation library. For detailed
-- instructions, please refer to the "CORE Generator Help".
-- The synthesis directives "translate_off/translate_on" specified
-- below are supported by Xilinx, Mentor Graphics and Synplicity
-- synthesis tools. Ensure they are correct for your synthesis tool(s).
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
-- synthesis translate_off
LIBRARY XilinxCoreLib;
-- synthesis translate_on
ENTITY addsb_11_0_44053abf11139d96 IS
PORT (
a : IN STD_LOGIC_VECTOR(25 DOWNTO 0);
b : IN STD_LOGIC_VECTOR(25 DOWNTO 0);
s : OUT STD_LOGIC_VECTOR(25 DOWNTO 0)
);
END addsb_11_0_44053abf11139d96;
ARCHITECTURE addsb_11_0_44053abf11139d96_a OF addsb_11_0_44053abf11139d96 IS
-- synthesis translate_off
COMPONENT wrapped_addsb_11_0_44053abf11139d96
PORT (
a : IN STD_LOGIC_VECTOR(25 DOWNTO 0);
b : IN STD_LOGIC_VECTOR(25 DOWNTO 0);
s : OUT STD_LOGIC_VECTOR(25 DOWNTO 0)
);
END COMPONENT;
-- Configuration specification
FOR ALL : wrapped_addsb_11_0_44053abf11139d96 USE ENTITY XilinxCoreLib.c_addsub_v11_0(behavioral)
GENERIC MAP (
c_a_type => 0,
c_a_width => 26,
c_add_mode => 1,
c_ainit_val => "0",
c_b_constant => 0,
c_b_type => 0,
c_b_value => "00000000000000000000000000",
c_b_width => 26,
c_borrow_low => 1,
c_bypass_low => 0,
c_ce_overrides_bypass => 1,
c_ce_overrides_sclr => 0,
c_has_bypass => 0,
c_has_c_in => 0,
c_has_c_out => 0,
c_has_ce => 0,
c_has_sclr => 0,
c_has_sinit => 0,
c_has_sset => 0,
c_implementation => 0,
c_latency => 0,
c_out_width => 26,
c_sclr_overrides_sset => 0,
c_sinit_val => "0",
c_verbosity => 0,
c_xdevicefamily => "artix7"
);
-- synthesis translate_on
BEGIN
-- synthesis translate_off
U0 : wrapped_addsb_11_0_44053abf11139d96
PORT MAP (
a => a,
b => b,
s => s
);
-- synthesis translate_on
END addsb_11_0_44053abf11139d96_a;
| lgpl-3.0 | 2650e8dcdc94600e86fe7ae557a5dd75 | 0.53634 | 4.141432 | false | false | false | false |
ricardo-jasinski/vhdl-game-engine | hdl/implementation/engine/npc_ai_follower.vhd | 1 | 3,754 | library ieee;
use ieee.std_logic_1164.all;
use work.graphics_types_pkg.all;
use work.game_state_pkg.all;
use work.npc_pkg.all;
-- "Artifical intelligence" (for lack of a better name) for moving NPCs
-- (non-player characters, such as enemies) around the screen. The "follower"
-- strategy consists in moving the NPC in the direction of a given point on
-- the screen, which may be variable.
entity npc_ai_follower is
port (
reset, clock: in std_logic;
-- time base pulse, NPC state gets updated when high (tipically every 100 ms)
time_base: in std_logic;
-- true if NPC is active in the game and must be updated
enabled: in boolean;
-- limits for NPC movement
allowed_region: in rectangle_type;
-- starting point for the NPC
initial_position: in point_type;
-- start velocity for the NPC
absolute_speed: in integer range 0 to NPC_SPEED_MAX;
slowdown_factor: in integer range 0 to NPC_SPEED_MAX;
-- goal position, NPC moves towards this point
assigned_position: in point_type;
-- calculated NPC position
npc_position: out point_type
);
end;
architecture rtl of npc_ai_follower is
-- current NPC position
signal position: point_type;
signal slowdown_counter: integer range 0 to NPC_SPEED_MAX;
signal scaled_time_base: std_logic;
begin
process (clock, reset) begin
if reset then
slowdown_counter <= 0;
scaled_time_base <= '0';
elsif rising_edge(clock) then
scaled_time_base <= '0';
if time_base = '1' then
if slowdown_counter < slowdown_factor then
slowdown_counter <= slowdown_counter + 1;
else
slowdown_counter <= 0;
scaled_time_base <= '1';
end if;
end if;
end if;
end process;
process (clock, reset, initial_position) is
variable new_position: point_type;
begin
if reset then
position <= initial_position;
elsif rising_edge(clock) then
-- if scaled_time_base then
if enabled and scaled_time_base = '1' then
if position.x < assigned_position.x then
new_position.x := position.x + absolute_speed;
elsif position.x > assigned_position.x then
new_position.x := position.x - absolute_speed;
end if;
if new_position.y < assigned_position.y then
new_position.y := position.y + absolute_speed;
elsif new_position.y > assigned_position.y then
new_position.y := position.y - absolute_speed;
end if;
-- make sure x position is within limits; invert horizontal speed
-- when NPC touches an edge
if new_position.x < allowed_region.left then
new_position.x := allowed_region.left;
elsif new_position.x > allowed_region.right then
new_position.x := allowed_region.right;
end if;
-- make sure y position is within limits
if new_position.y < allowed_region.top then
new_position.y := allowed_region.top;
elsif new_position.y > allowed_region.bottom then
new_position.y := allowed_region.bottom;
end if;
position <= new_position;
end if;
end if;
end process;
npc_position <= position;
end;
| unlicense | edceb6043e3fb29b56e13a07bab1932c | 0.555408 | 4.375291 | false | false | false | false |
lerwys/GitTest | hdl/modules/wb_un_cross/cross_uncross_core/inv_ch.vhd | 1 | 3,200 | ------------------------------------------------------------------------------
-- Title : Inverter of one Channel Pair
------------------------------------------------------------------------------
-- Author : José Alvim Berkenbrock
-- Company : CNPEM LNLS-DAC-DIG
-- Platform : FPGA-generic
-------------------------------------------------------------------------------
-- Description: This design takes a pair of channel from ADC converter and
-- inverts them.
-- The invertion occurs with rising edge of enable.
-------------------------------------------------------------------------------
-- Copyright (c) 2013 CNPEM
-- Licensed under GNU Lesser General Public License (LGPL) v3.0
-------------------------------------------------------------------------------
-- Revisions :
-- Date Version Author Description
-- 2013-02-18 1.0 jose.berkenbrock Created
-- 2013-02-25 1.0 jose.berkenbrock Changes in signals type
-- 2013-07-01 1.1 lucas.russo Changed to synchronous resets
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity inv_ch is
--generic(
--);
port(
clk_i : in std_logic;
rst_n_i : in std_logic;
en_i : in std_logic;
flag_o : out std_logic;
flasg_en_i : in std_logic;
ch1_i : in std_logic_vector(15 downto 0);
ch2_i : in std_logic_vector(15 downto 0);
ch1_o : out std_logic_vector(15 downto 0);
ch2_o : out std_logic_vector(15 downto 0));
end inv_ch;
architecture rtl of inv_ch is
signal en, en_old : std_logic;
signal flag : std_logic;
----------------------------------------------------------------
begin
reg_en_proc: process(clk_i)
begin
if (rising_edge(clk_i)) then
if (rst_n_i = '0') then
en <= '0';
en_old <= '0';
else
en <= en_i;
en_old <= en;
end if;
end if;
end process reg_en_proc;
----------------------------------------------------------------
inv_proc: process(clk_i)
begin
if (rising_edge(clk_i)) then
if (rst_n_i = '0') then
flag <= '0';
else
if (flasg_en_i = '0') then
flag <= '0';
elsif ((en = '1') and (en_old = '0')) then
flag <= not flag;
end if;
end if;
end if;
end process inv_proc;
----------------------------------------------------------------
output_proc: process (clk_i)
begin
if (rising_edge(clk_i)) then
if (rst_n_i = '0') then
ch1_o <= ch1_i;
ch2_o <= ch2_i;
else
if (flag = '1') then
ch1_o <= ch2_i;
ch2_o <= ch1_i;
else
ch1_o <= ch1_i;
ch2_o <= ch2_i;
end if;
end if;
end if;
end process output_proc;
----------------------------------------------------------------
flag_o <= flag;
end;
| lgpl-3.0 | 69fa60b31ff1261ed04d45bc2f79abe8 | 0.378868 | 4.159948 | false | false | false | false |
wltr/common-vhdl | dsp/ads1281_filter/src/rtl/ads1281_filter/ads1281_filter_select.vhd | 1 | 1,941 | --------------------------------------------------------------------------------
-- LGPL v2.1, Copyright (c) 2014 Johannes Walter <[email protected]>
--
-- Description:
-- Alternate between the two interleaved filters.
--------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
entity ads1281_filter_select is
port (
-- Clock and resets
clk_i : in std_ulogic;
rst_asy_n_i : in std_ulogic;
rst_syn_i : in std_ulogic;
-- Synchronization strobes
strb_ms_i : in std_ulogic;
-- Start interleaved filters
coeff1_start_o : out std_ulogic;
coeff2_start_o : out std_ulogic);
end entity ads1281_filter_select;
architecture rtl of ads1281_filter_select is
------------------------------------------------------------------------------
-- Internal Registers
------------------------------------------------------------------------------
signal toggle : std_ulogic;
begin -- architecture rtl
------------------------------------------------------------------------------
-- Outputs
------------------------------------------------------------------------------
coeff1_start_o <= strb_ms_i and not toggle;
coeff2_start_o <= strb_ms_i and toggle;
------------------------------------------------------------------------------
-- Registers
------------------------------------------------------------------------------
regs : process (clk_i, rst_asy_n_i) is
procedure reset is
begin
toggle <= '0';
end procedure reset;
begin -- process regs
if rst_asy_n_i = '0' then
reset;
elsif rising_edge(clk_i) then
if rst_syn_i = '1' then
reset;
else
if strb_ms_i = '1' then
toggle <= not toggle;
end if;
end if;
end if;
end process regs;
end architecture rtl;
| lgpl-2.1 | 4fca4415acc1ab5b1b4e302e95ac48c9 | 0.395672 | 5.028497 | false | false | false | false |
lerwys/GitTest | hdl/modules/wb_un_cross/cross_uncross_core/inv_chs_top.vhd | 1 | 8,225 | ------------------------------------------------------------------------------
-- Title : Inverter Channels Top Entity
------------------------------------------------------------------------------
-- Author : José Alvim Berkenbrock
-- Company : CNPEM LNLS-DAC-DIG
-- Platform : FPGA-generic
-------------------------------------------------------------------------------
-- Description: This design takes the signals from ADC FMC and invert them
-- according to control signals status[2..1]_i from swap_cnt_test
-- block.
-- This mechaninsm is necessary to compensate delay propagation
-- at ADC module.
-------------------------------------------------------------------------------
-- Copyright (c) 2013 CNPEM
-- Licensed under GNU Lesser General Public License (LGPL) v3.0
-------------------------------------------------------------------------------
-- Revisions :
-- Date Version Author Description
-- 2013-02-18 1.0 jose.berkenbrock Created
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity inv_chs_top is
generic(
g_delay_vec_width : natural range 0 to 16 := 10
);
port(
clk_i : in std_logic;
rst_n_i : in std_logic;
const_aa_i : in std_logic_vector(15 downto 0);
const_bb_i : in std_logic_vector(15 downto 0);
const_cc_i : in std_logic_vector(15 downto 0);
const_dd_i : in std_logic_vector(15 downto 0);
const_ac_i : in std_logic_vector(15 downto 0);
const_bd_i : in std_logic_vector(15 downto 0);
const_ca_i : in std_logic_vector(15 downto 0);
const_db_i : in std_logic_vector(15 downto 0);
delay1_i : in std_logic_vector(g_delay_vec_width-1 downto 0);
delay2_i : in std_logic_vector(g_delay_vec_width-1 downto 0);
-- input from rf_ch_swap core:
status1_i : in std_logic;
status2_i : in std_logic;
status_en_i : in std_logic;
--output for debugging
flag1_o : out std_logic;
flag2_o : out std_logic;
-- input from ADC FMC board:
cha_i : in std_logic_vector(15 downto 0);
chb_i : in std_logic_vector(15 downto 0);
chc_i : in std_logic_vector(15 downto 0);
chd_i : in std_logic_vector(15 downto 0);
-- output to data processing level:
cha_o : out std_logic_vector(15 downto 0);
chb_o : out std_logic_vector(15 downto 0);
chc_o : out std_logic_vector(15 downto 0);
chd_o : out std_logic_vector(15 downto 0));
end inv_chs_top;
architecture rtl of inv_chs_top is
signal en1 : std_logic;
signal en2 : std_logic;
signal s_cha : std_logic_vector(15 downto 0);
signal s_chb : std_logic_vector(15 downto 0);
signal s_chc : std_logic_vector(15 downto 0);
signal s_chd : std_logic_vector(15 downto 0);
----------------------------------------------------------------
-- Components Declaration
----------------------------------------------------------------
component inv_ch
--generic(
--);
port(
clk_i : in std_logic;
rst_n_i : in std_logic;
en_i : in std_logic;
flag_o : out std_logic;
flasg_en_i : in std_logic;
ch1_i : in std_logic_vector(15 downto 0);
ch2_i : in std_logic_vector(15 downto 0);
ch1_o : out std_logic_vector(15 downto 0);
ch2_o : out std_logic_vector(15 downto 0)
);
end component;
----------------------------------------------------------------
component delay_inv_ch
generic(
g_delay_vec_width : natural range 0 to 16 := g_delay_vec_width
);
port(
clk_i : in std_logic;
rst_n_i : in std_logic;
trg_i : in std_logic; -- trigger
cnt_lmt_i : in std_logic_vector(g_delay_vec_width-1 downto 0);
-- counter limit
en_o : out std_logic
);
end component;
----------------------------------------------------------------
component dyn_mult_2chs
port(
clk_i : in std_logic;
rst_n_i : in std_logic;
en_i : in std_logic;
const_11_i : in std_logic_vector(15 downto 0);
const_22_i : in std_logic_vector(15 downto 0);
const_12_i : in std_logic_vector(15 downto 0);
const_21_i : in std_logic_vector(15 downto 0);
ch1_i : in std_logic_vector(15 downto 0);
ch2_i : in std_logic_vector(15 downto 0);
ch1_o : out std_logic_vector(15 downto 0);
ch2_o : out std_logic_vector(15 downto 0)
);
end component;
----------------------------------------------------------------
begin
----------------------------------------------------------------
-- Components instantiation
----------------------------------------------------------------
delay_inst_1: delay_inv_ch
port map (
clk_i => clk_i,
rst_n_i => rst_n_i,
trg_i => status1_i,
cnt_lmt_i => delay1_i,
en_o => en1
);
delay_inst_2: delay_inv_ch
port map (
clk_i => clk_i,
rst_n_i => rst_n_i,
trg_i => status2_i,
cnt_lmt_i => delay2_i,
en_o => en2
);
inv_ch_inst_1: inv_ch
port map (
clk_i => clk_i,
rst_n_i => rst_n_i,
en_i => en1,
flag_o => flag1_o,
flasg_en_i => status_en_i,
ch1_i => cha_i,
ch2_i => chc_i,
ch1_o => s_cha,
ch2_o => s_chc
);
inv_ch_inst_2: inv_ch
port map (
clk_i => clk_i,
rst_n_i => rst_n_i,
en_i => en2,
flag_o => flag2_o,
flasg_en_i => status_en_i,
ch1_i => chb_i,
ch2_i => chd_i,
ch1_o => s_chb,
ch2_o => s_chd
);
mult_ch_pair1: dyn_mult_2chs
port map (
clk_i => clk_i,
rst_n_i => rst_n_i,
en_i => en1,
const_11_i => const_aa_i,
const_22_i => const_cc_i,
const_12_i => const_ac_i,
const_21_i => const_ca_i,
ch1_i => s_cha,
ch2_i => s_chc,
ch1_o => cha_o,
ch2_o => chc_o
);
mult_ch_pair2: dyn_mult_2chs
port map (
clk_i => clk_i,
rst_n_i => rst_n_i,
en_i => en2,
const_11_i => const_bb_i,
const_22_i => const_dd_i,
const_12_i => const_bd_i,
const_21_i => const_db_i,
ch1_i => s_chb,
ch2_i => s_chd,
ch1_o => chb_o,
ch2_o => chd_o
);
end;
| lgpl-3.0 | e1cf710bededf7efa81b2c263e8b45a6 | 0.365759 | 3.866479 | false | false | false | false |
lerwys/GitTest | hdl/modules/position_calc/generated/artix7/cntr_11_0_eb46eda57512a5a4.vhd | 1 | 4,452 | --------------------------------------------------------------------------------
-- This file is owned and controlled by Xilinx and must be used solely --
-- for design, simulation, implementation and creation of design files --
-- limited to Xilinx devices or technologies. Use with non-Xilinx --
-- devices or technologies is expressly prohibited and immediately --
-- terminates your license. --
-- --
-- XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" SOLELY --
-- FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR XILINX DEVICES. BY --
-- PROVIDING THIS DESIGN, CODE, OR INFORMATION AS ONE POSSIBLE --
-- IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD, XILINX IS --
-- MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE FROM ANY --
-- CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING ANY --
-- RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY --
-- DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE --
-- IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR --
-- REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF --
-- INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A --
-- PARTICULAR PURPOSE. --
-- --
-- Xilinx products are not intended for use in life support appliances, --
-- devices, or systems. Use in such applications are expressly --
-- prohibited. --
-- --
-- (c) Copyright 1995-2013 Xilinx, Inc. --
-- All rights reserved. --
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-- You must compile the wrapper file cntr_11_0_eb46eda57512a5a4.vhd when simulating
-- the core, cntr_11_0_eb46eda57512a5a4. When compiling the wrapper file, be sure to
-- reference the XilinxCoreLib VHDL simulation library. For detailed
-- instructions, please refer to the "CORE Generator Help".
-- The synthesis directives "translate_off/translate_on" specified
-- below are supported by Xilinx, Mentor Graphics and Synplicity
-- synthesis tools. Ensure they are correct for your synthesis tool(s).
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
-- synthesis translate_off
LIBRARY XilinxCoreLib;
-- synthesis translate_on
ENTITY cntr_11_0_eb46eda57512a5a4 IS
PORT (
clk : IN STD_LOGIC;
ce : IN STD_LOGIC;
sinit : IN STD_LOGIC;
q : OUT STD_LOGIC_VECTOR(1 DOWNTO 0)
);
END cntr_11_0_eb46eda57512a5a4;
ARCHITECTURE cntr_11_0_eb46eda57512a5a4_a OF cntr_11_0_eb46eda57512a5a4 IS
-- synthesis translate_off
COMPONENT wrapped_cntr_11_0_eb46eda57512a5a4
PORT (
clk : IN STD_LOGIC;
ce : IN STD_LOGIC;
sinit : IN STD_LOGIC;
q : OUT STD_LOGIC_VECTOR(1 DOWNTO 0)
);
END COMPONENT;
-- Configuration specification
FOR ALL : wrapped_cntr_11_0_eb46eda57512a5a4 USE ENTITY XilinxCoreLib.c_counter_binary_v11_0(behavioral)
GENERIC MAP (
c_ainit_val => "0",
c_ce_overrides_sync => 0,
c_count_by => "1",
c_count_mode => 0,
c_count_to => "1",
c_fb_latency => 0,
c_has_ce => 1,
c_has_load => 0,
c_has_sclr => 0,
c_has_sinit => 1,
c_has_sset => 0,
c_has_thresh0 => 0,
c_implementation => 0,
c_latency => 1,
c_load_low => 0,
c_restrict_count => 0,
c_sclr_overrides_sset => 1,
c_sinit_val => "0",
c_thresh0_value => "1",
c_verbosity => 0,
c_width => 2,
c_xdevicefamily => "artix7"
);
-- synthesis translate_on
BEGIN
-- synthesis translate_off
U0 : wrapped_cntr_11_0_eb46eda57512a5a4
PORT MAP (
clk => clk,
ce => ce,
sinit => sinit,
q => q
);
-- synthesis translate_on
END cntr_11_0_eb46eda57512a5a4_a;
| lgpl-3.0 | b6db3c855f0ca195f1dc13d92d719af2 | 0.534142 | 4.149115 | false | false | false | false |
lerwys/GitTest | hdl/modules/position_calc/generated/virtex6/addsb_11_0_8b0747970e52f130.vhd | 1 | 4,569 | --------------------------------------------------------------------------------
-- This file is owned and controlled by Xilinx and must be used solely --
-- for design, simulation, implementation and creation of design files --
-- limited to Xilinx devices or technologies. Use with non-Xilinx --
-- devices or technologies is expressly prohibited and immediately --
-- terminates your license. --
-- --
-- XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" SOLELY --
-- FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR XILINX DEVICES. BY --
-- PROVIDING THIS DESIGN, CODE, OR INFORMATION AS ONE POSSIBLE --
-- IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD, XILINX IS --
-- MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE FROM ANY --
-- CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING ANY --
-- RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY --
-- DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE --
-- IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR --
-- REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF --
-- INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A --
-- PARTICULAR PURPOSE. --
-- --
-- Xilinx products are not intended for use in life support appliances, --
-- devices, or systems. Use in such applications are expressly --
-- prohibited. --
-- --
-- (c) Copyright 1995-2013 Xilinx, Inc. --
-- All rights reserved. --
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-- You must compile the wrapper file addsb_11_0_8b0747970e52f130.vhd when simulating
-- the core, addsb_11_0_8b0747970e52f130. When compiling the wrapper file, be sure to
-- reference the XilinxCoreLib VHDL simulation library. For detailed
-- instructions, please refer to the "CORE Generator Help".
-- The synthesis directives "translate_off/translate_on" specified
-- below are supported by Xilinx, Mentor Graphics and Synplicity
-- synthesis tools. Ensure they are correct for your synthesis tool(s).
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
-- synthesis translate_off
LIBRARY XilinxCoreLib;
-- synthesis translate_on
ENTITY addsb_11_0_8b0747970e52f130 IS
PORT (
a : IN STD_LOGIC_VECTOR(25 DOWNTO 0);
b : IN STD_LOGIC_VECTOR(25 DOWNTO 0);
s : OUT STD_LOGIC_VECTOR(25 DOWNTO 0)
);
END addsb_11_0_8b0747970e52f130;
ARCHITECTURE addsb_11_0_8b0747970e52f130_a OF addsb_11_0_8b0747970e52f130 IS
-- synthesis translate_off
COMPONENT wrapped_addsb_11_0_8b0747970e52f130
PORT (
a : IN STD_LOGIC_VECTOR(25 DOWNTO 0);
b : IN STD_LOGIC_VECTOR(25 DOWNTO 0);
s : OUT STD_LOGIC_VECTOR(25 DOWNTO 0)
);
END COMPONENT;
-- Configuration specification
FOR ALL : wrapped_addsb_11_0_8b0747970e52f130 USE ENTITY XilinxCoreLib.c_addsub_v11_0(behavioral)
GENERIC MAP (
c_a_type => 0,
c_a_width => 26,
c_add_mode => 1,
c_ainit_val => "0",
c_b_constant => 0,
c_b_type => 0,
c_b_value => "00000000000000000000000000",
c_b_width => 26,
c_borrow_low => 1,
c_bypass_low => 0,
c_ce_overrides_bypass => 1,
c_ce_overrides_sclr => 0,
c_has_bypass => 0,
c_has_c_in => 0,
c_has_c_out => 0,
c_has_ce => 0,
c_has_sclr => 0,
c_has_sinit => 0,
c_has_sset => 0,
c_implementation => 0,
c_latency => 0,
c_out_width => 26,
c_sclr_overrides_sset => 0,
c_sinit_val => "0",
c_verbosity => 0,
c_xdevicefamily => "virtex6"
);
-- synthesis translate_on
BEGIN
-- synthesis translate_off
U0 : wrapped_addsb_11_0_8b0747970e52f130
PORT MAP (
a => a,
b => b,
s => s
);
-- synthesis translate_on
END addsb_11_0_8b0747970e52f130_a;
| lgpl-3.0 | b2fa83c849e7c4a333f907eb1c6bfc61 | 0.536441 | 4.068566 | false | false | false | false |
lerwys/GitTest | hdl/platform/virtex6/multiplier_u16x16_DSP.vhd | 1 | 4,287 | --------------------------------------------------------------------------------
-- This file is owned and controlled by Xilinx and must be used solely --
-- for design, simulation, implementation and creation of design files --
-- limited to Xilinx devices or technologies. Use with non-Xilinx --
-- devices or technologies is expressly prohibited and immediately --
-- terminates your license. --
-- --
-- XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" SOLELY --
-- FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR XILINX DEVICES. BY --
-- PROVIDING THIS DESIGN, CODE, OR INFORMATION AS ONE POSSIBLE --
-- IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD, XILINX IS --
-- MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE FROM ANY --
-- CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING ANY --
-- RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY --
-- DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE --
-- IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR --
-- REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF --
-- INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A --
-- PARTICULAR PURPOSE. --
-- --
-- Xilinx products are not intended for use in life support appliances, --
-- devices, or systems. Use in such applications are expressly --
-- prohibited. --
-- --
-- (c) Copyright 1995-2013 Xilinx, Inc. --
-- All rights reserved. --
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-- You must compile the wrapper file multiplier_u16x16_DSP.vhd when simulating
-- the core, multiplier_u16x16_DSP. When compiling the wrapper file, be sure to
-- reference the XilinxCoreLib VHDL simulation library. For detailed
-- instructions, please refer to the "CORE Generator Help".
-- The synthesis directives "translate_off/translate_on" specified
-- below are supported by Xilinx, Mentor Graphics and Synplicity
-- synthesis tools. Ensure they are correct for your synthesis tool(s).
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
-- synthesis translate_off
LIBRARY XilinxCoreLib;
-- synthesis translate_on
ENTITY multiplier_u16x16_DSP IS
PORT (
clk : IN STD_LOGIC;
a : IN STD_LOGIC_VECTOR(15 DOWNTO 0);
b : IN STD_LOGIC_VECTOR(15 DOWNTO 0);
p : OUT STD_LOGIC_VECTOR(31 DOWNTO 0)
);
END multiplier_u16x16_DSP;
ARCHITECTURE multiplier_u16x16_DSP_a OF multiplier_u16x16_DSP IS
-- synthesis translate_off
COMPONENT wrapped_multiplier_u16x16_DSP
PORT (
clk : IN STD_LOGIC;
a : IN STD_LOGIC_VECTOR(15 DOWNTO 0);
b : IN STD_LOGIC_VECTOR(15 DOWNTO 0);
p : OUT STD_LOGIC_VECTOR(31 DOWNTO 0)
);
END COMPONENT;
-- Configuration specification
FOR ALL : wrapped_multiplier_u16x16_DSP USE ENTITY XilinxCoreLib.mult_gen_v11_2(behavioral)
GENERIC MAP (
c_a_type => 0,
c_a_width => 16,
c_b_type => 1,
c_b_value => "10000001",
c_b_width => 16,
c_ccm_imp => 0,
c_ce_overrides_sclr => 0,
c_has_ce => 0,
c_has_sclr => 0,
c_has_zero_detect => 0,
c_latency => 3,
c_model_type => 0,
c_mult_type => 1,
c_optimize_goal => 1,
c_out_high => 31,
c_out_low => 0,
c_round_output => 0,
c_round_pt => 0,
c_verbosity => 0,
c_xdevicefamily => "virtex6"
);
-- synthesis translate_on
BEGIN
-- synthesis translate_off
U0 : wrapped_multiplier_u16x16_DSP
PORT MAP (
clk => clk,
a => a,
b => b,
p => p
);
-- synthesis translate_on
END multiplier_u16x16_DSP_a;
| lgpl-3.0 | c9eaf9615f955c49b1983c4ae09d895b | 0.545603 | 4.479624 | false | false | false | false |
lerwys/GitTest | hdl/modules/sw_windowing/counter.vhd | 1 | 3,916 | -------------------------------------------------------------------------------
-- Title : Window position index counter
-- Project :
-------------------------------------------------------------------------------
-- File : counter.vhd
-- Author : aylons <aylons@LNLS190>
-- Company :
-- Created : 2014-01-31
-- Last update: 2014-02-26
-- Platform :
-- Standard : VHDL'93/02
-------------------------------------------------------------------------------
-- Description: Up/Down for symmetrical window LUT
-------------------------------------------------------------------------------
-- Copyright (c) 2014
-------------------------------------------------------------------------------
-- Revisions :
-- Date Version Author Description
-- 2014-01-31 1.0 aylons Created
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use ieee.math_real.all;
library UNISIM;
use UNISIM.vcomponents.all;
entity counter is
generic (
g_mem_size : natural := 601;
g_bus_size : natural := 15
--g_switch_delay : natural := 2
);
port (
clk_i : in std_logic; -- input clock
ce_i : in std_logic; -- clock enable
reset_n_i : in std_logic; -- reset
switch_delay_i : in std_logic_vector(15 downto 0);
switch_en_i : in std_logic;
switch_o : out std_logic;
index_o : out std_logic_vector(g_bus_size-1 downto 0)); -- Memory address to current
-- window data
end entity counter;
architecture behavioural of counter is
-- This is the address of the last sample in a vector with half
-- the size of the window
constant last_address : natural := g_mem_size-1;
signal switch_state : std_logic := '0';
signal switch_delay_slice : std_logic_vector(g_bus_size-1 downto 0);
begin -- architecture behavioural
counting : process(clk_i)
variable going_up : boolean := true;
--variable count : natural := 0; -- internal counter
variable count : unsigned(g_bus_size-1 downto 0) :=
to_unsigned(0, g_bus_size); -- internal counter
begin
if rising_edge(clk_i) then
if reset_n_i = '0' then
count := (others => '0');
going_up := true;
switch_state <= '0';
else
if ce_i = '1' then
if switch_en_i = '0' then
count := (others => '0');
going_up := true;
switch_state <= '0';
else
if going_up then
count := count + 1;
if count = last_address then
going_up := false;
end if; --count = last_address
-- toggle switch clock. FIXME: switch_delay_slice
-- cannot be greater than last_address, otherwise
-- we will not switch properly
if count = last_address - unsigned(switch_delay_slice) then
switch_state <= not switch_state;
end if;
else
--counting down
count := count - 1;
if count = to_unsigned(0, g_bus_size) then
going_up := true;
end if; -- count = 0
--switch N samples before reaches zero
--if count = g_switch_delay then
if count = unsigned(switch_delay_slice) then
switch_state <= not switch_state;
end if; -- count = switch_state
end if; -- going up
index_o <= std_logic_vector(count);
switch_o <= switch_state;
end if; -- switch_en_i
end if; -- ce
end if; -- reset
end if; -- rising edge
end process counting;
switch_delay_slice <= switch_delay_i(g_bus_size-1 downto 0);
end architecture behavioural;
| lgpl-3.0 | 5332b2d8c380ae85d9076bec3f15be2c | 0.477017 | 4.247289 | false | false | false | false |
wltr/common-vhdl | dsp/ads1281_filter/src/rtl/ads1281_filter/ads1281_filter_accumulator.vhd | 1 | 5,659 | --------------------------------------------------------------------------------
-- LGPL v2.1, Copyright (c) 2014 Johannes Walter <[email protected]>
--
-- Description:
-- Add input data to a stored result.
--------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity ads1281_filter_accumulator is
port (
-- Clock and resets
clk_i : in std_ulogic;
rst_asy_n_i : in std_ulogic;
rst_syn_i : in std_ulogic;
-- Multiplier result
data_i : in signed(30 downto 0);
data_en_i : in std_ulogic;
-- Coefficient done flag
coeff_done_i : in std_ulogic;
-- MAC result
data_o : out signed(23 downto 0);
data_en_o : out std_ulogic);
end entity ads1281_filter_accumulator;
architecture rtl of ads1281_filter_accumulator is
------------------------------------------------------------------------------
-- Types and Constants
------------------------------------------------------------------------------
type state_t is (ACC_1, ACC_2, ACC_3, ACC_4);
type reg_t is record
state : state_t;
sum : signed(34 downto 0);
carry : std_ulogic;
done : std_ulogic;
en : std_ulogic;
end record reg_t;
constant init_c : reg_t := (
state => ACC_1,
sum => (others => '0'),
carry => '0',
done => '0',
en => '0');
------------------------------------------------------------------------------
-- Internal Registers
------------------------------------------------------------------------------
signal reg : reg_t;
------------------------------------------------------------------------------
-- Internal Wires
------------------------------------------------------------------------------
signal next_reg : reg_t;
signal sum_1 : signed(9 downto 0);
signal sum_2 : signed(9 downto 0);
signal sum_3 : signed(9 downto 0);
signal sum_4 : signed(10 downto 0);
signal sign : std_ulogic_vector(3 downto 0);
begin -- architecture rtl
------------------------------------------------------------------------------
-- Outputs
------------------------------------------------------------------------------
data_o <= reg.sum(reg.sum'high downto reg.sum'length - data_o'length);
data_en_o <= reg.en;
------------------------------------------------------------------------------
-- Signal Assignments
------------------------------------------------------------------------------
-- 1st Adder: sum(8:0) + y(8:0)
sum_1 <= signed('0' & std_ulogic_vector(reg.sum(8 downto 0))) + signed('0' & std_ulogic_vector(data_i(8 downto 0)));
-- 2nd Adder: sum(16:9) + y(16:9)
sum_2 <= signed('0' & std_ulogic_vector(reg.sum(16 downto 9)) & reg.carry) + signed('0' & std_ulogic_vector(data_i(16 downto 9)) & '1');
-- 3rd Adder: sum(24:17) + y(24:17)
sum_3 <= signed('0' & std_ulogic_vector(reg.sum(24 downto 17)) & reg.carry) + signed('0' & std_ulogic_vector(data_i(24 downto 17)) & '1');
-- 4th Adder: sum(34:25) + y(30:25) + sign extension
sum_4 <= signed(std_ulogic_vector(reg.sum(34 downto 25)) & reg.carry) + signed(sign & std_ulogic_vector(data_i(30 downto 25)) & '1');
-- 4th Adder: sign extension of y
sign <= (others => data_i(data_i'high));
------------------------------------------------------------------------------
-- Registers
------------------------------------------------------------------------------
regs : process (clk_i, rst_asy_n_i) is
procedure reset is
begin
reg <= init_c;
end procedure reset;
begin -- process regs
if rst_asy_n_i = '0' then
reset;
elsif rising_edge(clk_i) then
if rst_syn_i = '1' then
reset;
else
reg <= next_reg;
end if;
end if;
end process regs;
------------------------------------------------------------------------------
-- Combinatorics
------------------------------------------------------------------------------
comb : process (reg, data_en_i, coeff_done_i, sum_1, sum_2, sum_3, sum_4) is
begin -- process comb
-- Defaults
next_reg <= reg;
next_reg.en <= '0';
-- Remember if coefficient is the last one
if coeff_done_i = '1' then
next_reg.done <= '1';
end if;
case reg.state is
when ACC_1 =>
if reg.en = '1' then
next_reg.sum <= (others => '0');
end if;
if data_en_i = '1' then
-- If result of multiplier is available save 1st partial sum
next_reg.sum(8 downto 0) <= sum_1(8 downto 0);
-- Save carry for next state
next_reg.carry <= sum_1(sum_1'high);
next_reg.state <= ACC_2;
end if;
when ACC_2 =>
-- Save 2nd partial sum
next_reg.sum(16 downto 9) <= sum_2(8 downto 1);
-- Save carry for next state
next_reg.carry <= sum_2(sum_2'high);
next_reg.state <= ACC_3;
when ACC_3 =>
-- Save 3rd partial sum
next_reg.sum(24 downto 17) <= sum_3(8 downto 1);
-- Save carry for next state
next_reg.carry <= sum_3(sum_3'high);
next_reg.state <= ACC_4;
when ACC_4 =>
-- Save 4th partial sum
next_reg.sum(34 downto 25) <= sum_4(10 downto 1);
-- Check if done
next_reg.done <= '0';
next_reg.en <= reg.done;
next_reg.state <= ACC_1;
end case;
end process comb;
end architecture rtl;
| lgpl-2.1 | b431aea99135a921838e831ed54cdb44 | 0.423396 | 4.065374 | false | false | false | false |
freecores/raggedstone | source/generate_pci32tlite/new_pci32tlite.vhd | 1 | 19,658 | --+-------------------------------------------------------------------------------------------------+
--| |
--| File: pci32tlite.vhd |
--| |
--| Components: pcidec_new.vhd |
--| pciwbsequ.vhd |
--| pcidmux.vhd |
--| pciregs.vhd |
--| pcipargen.vhd |
--| -- Libs -- |
--| ona.vhd |
--| |
--| Description: TARGET PCI : |
--| |
--| * PCI Target 32 Bits |
--| * BAR0 32MByte address space |
--| * Whisbone compatible: D16, 32MB address space |
--| |
--+-------------------------------------------------------------------------------------------------+
--| |
--| Revision history : |
--| Date Version Author Description |
--| 2005-05-13 R00A00 PAU First alfa revision (eng) |
--| 2006-01-05 R00B00 MS inverted reset nres |
--| and added debug signals debug_init and debug_access | |
--| |
--| To do: |
--| |
--+-------------------------------------------------------------------------------------------------+
--+-----------------------------------------------------------------+
--| |
--| Copyright (C) 2005 Peio Azkarate, [email protected] |
--| |
--| This source file may be used and distributed without |
--| restriction provided that this copyright statement is not |
--| removed from the file and that any derivative work contains |
--| the original copyright notice and the associated disclaimer. |
--| |
--| This source file is free software; you can redistribute it |
--| and/or modify it under the terms of the GNU Lesser General |
--| Public License as published by the Free Software Foundation; |
--| either version 2.1 of the License, or (at your option) any |
--| later version. |
--| |
--| This source is distributed in the hope that it will be |
--| useful, but WITHOUT ANY WARRANTY; without even the implied |
--| warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR |
--| PURPOSE. See the GNU Lesser General Public License for more |
--| details. |
--| |
--| You should have received a copy of the GNU Lesser General |
--| Public License along with this source; if not, download it |
--| from http://www.opencores.org/lgpl.shtml |
--| |
--+-----------------------------------------------------------------+
--+-----------------------------------------------------------------------------+
--| LIBRARIES |
--+-----------------------------------------------------------------------------+
library ieee;
use ieee.std_logic_1164.all;
--+-----------------------------------------------------------------------------+
--| ENTITY |
--+-----------------------------------------------------------------------------+
entity pci32tlite is
generic (
vendorID : std_logic_vector(15 downto 0) := x"10EE";
deviceID : std_logic_vector(15 downto 0) := x"0100";
revisionID : std_logic_vector(7 downto 0) := x"37";
subsystemID : std_logic_vector(15 downto 0) := x"1558";
subsystemvID : std_logic_vector(15 downto 0) := x"0480";
jcarr1ID : std_logic_vector(31 downto 0) := x"12345671";
jcarr2ID : std_logic_vector(31 downto 0) := x"12345672";
jcarr3ID : std_logic_vector(31 downto 0) := x"12345673";
jcarr4ID : std_logic_vector(31 downto 0) := x"12345674";
jcarr5ID : std_logic_vector(31 downto 0) := x"12345675";
jcarr6ID : std_logic_vector(31 downto 0) := x"12345676";
jcarr7ID : std_logic_vector(31 downto 0) := x"12345677";
jcarr8ID : std_logic_vector(31 downto 0) := x"12345678";
jcarr9ID : std_logic_vector(31 downto 0) := x"12345679";
jcarr10ID : std_logic_vector(31 downto 0) := x"12345680";
jcarr11ID : std_logic_vector(31 downto 0) := x"12345681";
jcarr12ID : std_logic_vector(31 downto 0) := x"12345682";
jcarr13ID : std_logic_vector(31 downto 0) := x"12345683";
jcarr14ID : std_logic_vector(31 downto 0) := x"12345684";
jcarr15ID : std_logic_vector(31 downto 0) := x"12345685";
jcarr16ID : std_logic_vector(31 downto 0) := x"12345686";
jcarr17ID : std_logic_vector(31 downto 0) := x"12345687";
jcarr18ID : std_logic_vector(31 downto 0) := x"12345688";
jcarr19ID : std_logic_vector(31 downto 0) := x"12345689";
jcarr20ID : std_logic_vector(31 downto 0) := x"12345690";
jcarr21ID : std_logic_vector(31 downto 0) := x"12345691";
jcarr22ID : std_logic_vector(31 downto 0) := x"12345692";
jcarr23ID : std_logic_vector(31 downto 0) := x"12345693";
jcarr24ID : std_logic_vector(31 downto 0) := x"12345694";
jcarr25ID : std_logic_vector(31 downto 0) := x"12345695";
jcarr26ID : std_logic_vector(31 downto 0) := x"12345696";
jcarr27ID : std_logic_vector(31 downto 0) := x"12345697";
jcarr28ID : std_logic_vector(31 downto 0) := x"12345698";
jcarr29ID : std_logic_vector(31 downto 0) := x"12345699";
jcarr30ID : std_logic_vector(31 downto 0) := x"12345700";
jcarr31ID : std_logic_vector(31 downto 0) := x"12345701";
jcarr32ID : std_logic_vector(31 downto 0) := x"12345702";
jcarr33ID : std_logic_vector(31 downto 0) := x"12345703";
jcarr34ID : std_logic_vector(31 downto 0) := x"12345704";
jcarr35ID : std_logic_vector(31 downto 0) := x"12345705";
jcarr36ID : std_logic_vector(31 downto 0) := x"12345706";
jcarr37ID : std_logic_vector(31 downto 0) := x"12345707";
jcarr38ID : std_logic_vector(31 downto 0) := x"12345708";
jcarr39ID : std_logic_vector(31 downto 0) := x"12345709";
jcarr40ID : std_logic_vector(31 downto 0) := x"12345710";
jcarr41ID : std_logic_vector(31 downto 0) := x"12345711";
jcarr42ID : std_logic_vector(31 downto 0) := x"12345712"
);
port (
-- General
clk33 : in std_logic;
nrst : in std_logic;
-- PCI target 32bits
ad : inout std_logic_vector(31 downto 0);
cbe : in std_logic_vector(3 downto 0);
par : out std_logic;
frame : in std_logic;
irdy : in std_logic;
trdy : out std_logic;
devsel : out std_logic;
stop : out std_logic;
idsel : in std_logic;
perr : out std_logic;
serr : out std_logic;
intb : out std_logic;
-- Master whisbone
wb_adr_o : out std_logic_vector(24 downto 1);
wb_dat_i : in std_logic_vector(15 downto 0);
wb_dat_o : out std_logic_vector(15 downto 0);
wb_sel_o : out std_logic_vector(1 downto 0);
wb_we_o : out std_logic;
wb_stb_o : inout std_logic;
wb_cyc_o : out std_logic;
wb_ack_i : in std_logic;
wb_err_i : in std_logic;
wb_int_i : in std_logic;
-- debug signals
debug_init : out std_logic;
debug_access : out std_logic
);
end pci32tlite;
--+-----------------------------------------------------------------------------+
--| ARCHITECTURE |
--+-----------------------------------------------------------------------------+
architecture rtl of pci32tlite is
--+-----------------------------------------------------------------------------+
--| COMPONENTS |
--+-----------------------------------------------------------------------------+
component pcidec_new
port (
clk_i : in std_logic;
nrst_i : in std_logic;
--
ad_i : in std_logic_vector(31 downto 0);
cbe_i : in std_logic_vector(3 downto 0);
idsel_i : in std_logic;
bar0_i : in std_logic_vector(31 downto 25);
memEN_i : in std_logic;
pciadrLD_i : in std_logic;
adrcfg_o : out std_logic;
adrmem_o : out std_logic;
adr_o : out std_logic_vector(24 downto 1);
cmd_o : out std_logic_vector(3 downto 0)
);
end component;
component pciwbsequ
port (
-- General
clk_i : in std_logic;
nrst_i : in std_logic;
-- pci
cmd_i : in std_logic_vector(3 downto 0);
cbe_i : in std_logic_vector(3 downto 0);
frame_i : in std_logic;
irdy_i : in std_logic;
devsel_o : out std_logic;
trdy_o : out std_logic;
-- control
adrcfg_i : in std_logic;
adrmem_i : in std_logic;
pciadrLD_o : out std_logic;
pcidOE_o : out std_logic;
parOE_o : out std_logic;
wbdatLD_o : out std_logic;
wbrgdMX_o : out std_logic;
wbd16MX_o : out std_logic;
wrcfg_o : out std_logic;
rdcfg_o : out std_logic;
-- whisbone
wb_sel_o : out std_logic_vector(1 downto 0);
wb_we_o : out std_logic;
wb_stb_o : inout std_logic;
wb_cyc_o : out std_logic;
wb_ack_i : in std_logic;
wb_err_i : in std_logic;
-- debug signals
debug_init : out std_logic;
debug_access : out std_logic
);
end component;
component pcidmux
port (
clk_i : in std_logic;
nrst_i : in std_logic;
--
d_io : inout std_logic_vector(31 downto 0);
pcidatout_o : out std_logic_vector(31 downto 0);
pcidOE_i : in std_logic;
wbdatLD_i : in std_logic;
wbrgdMX_i : in std_logic;
wbd16MX_i : in std_logic;
wb_dat_i : in std_logic_vector(15 downto 0);
wb_dat_o : out std_logic_vector(15 downto 0);
rg_dat_i : in std_logic_vector(31 downto 0);
rg_dat_o : out std_logic_vector(31 downto 0)
);
end component;
component pciregs
generic (
vendorID : std_logic_vector(15 downto 0);
deviceID : std_logic_vector(15 downto 0);
revisionID : std_logic_vector(7 downto 0);
subsystemID : std_logic_vector(15 downto 0);
subsystemvID : std_logic_vector(15 downto 0);
jcarr1ID : std_logic_vector(31 downto 0);
jcarr2ID : std_logic_vector(31 downto 0);
jcarr3ID : std_logic_vector(31 downto 0);
jcarr4ID : std_logic_vector(31 downto 0);
jcarr5ID : std_logic_vector(31 downto 0);
jcarr6ID : std_logic_vector(31 downto 0);
jcarr7ID : std_logic_vector(31 downto 0);
jcarr8ID : std_logic_vector(31 downto 0);
jcarr9ID : std_logic_vector(31 downto 0);
jcarr10ID : std_logic_vector(31 downto 0);
jcarr11ID : std_logic_vector(31 downto 0);
jcarr12ID : std_logic_vector(31 downto 0);
jcarr13ID : std_logic_vector(31 downto 0);
jcarr14ID : std_logic_vector(31 downto 0);
jcarr15ID : std_logic_vector(31 downto 0);
jcarr16ID : std_logic_vector(31 downto 0);
jcarr17ID : std_logic_vector(31 downto 0);
jcarr18ID : std_logic_vector(31 downto 0);
jcarr19ID : std_logic_vector(31 downto 0);
jcarr20ID : std_logic_vector(31 downto 0);
jcarr21ID : std_logic_vector(31 downto 0);
jcarr22ID : std_logic_vector(31 downto 0);
jcarr23ID : std_logic_vector(31 downto 0);
jcarr24ID : std_logic_vector(31 downto 0);
jcarr25ID : std_logic_vector(31 downto 0);
jcarr26ID : std_logic_vector(31 downto 0);
jcarr27ID : std_logic_vector(31 downto 0);
jcarr28ID : std_logic_vector(31 downto 0);
jcarr29ID : std_logic_vector(31 downto 0);
jcarr30ID : std_logic_vector(31 downto 0);
jcarr31ID : std_logic_vector(31 downto 0);
jcarr32ID : std_logic_vector(31 downto 0);
jcarr33ID : std_logic_vector(31 downto 0);
jcarr34ID : std_logic_vector(31 downto 0);
jcarr35ID : std_logic_vector(31 downto 0);
jcarr36ID : std_logic_vector(31 downto 0);
jcarr37ID : std_logic_vector(31 downto 0);
jcarr38ID : std_logic_vector(31 downto 0);
jcarr39ID : std_logic_vector(31 downto 0);
jcarr40ID : std_logic_vector(31 downto 0);
jcarr41ID : std_logic_vector(31 downto 0);
jcarr42ID : std_logic_vector(31 downto 0)
);
port (
clk_i : in std_logic;
nrst_i : in std_logic;
--
adr_i : in std_logic_vector(7 downto 2);
cbe_i : in std_logic_vector(3 downto 0);
dat_i : in std_logic_vector(31 downto 0);
dat_o : out std_logic_vector(31 downto 0);
wrcfg_i : in std_logic;
rdcfg_i : in std_logic;
perr_i : in std_logic;
serr_i : in std_logic;
tabort_i : in std_logic;
bar0_o : out std_logic_vector(31 downto 25);
perrEN_o : out std_logic;
serrEN_o : out std_logic;
memEN_o : out std_logic
);
end component;
component pcipargen
port (
clk_i : in std_logic;
pcidatout_i : in std_logic_vector(31 downto 0);
cbe_i : in std_logic_vector(3 downto 0);
parOE_i : in std_logic;
par_o : out std_logic
);
end component;
--+-----------------------------------------------------------------------------+
--| CONSTANTS |
--+-----------------------------------------------------------------------------+
--+-----------------------------------------------------------------------------+
--| SIGNALS |
--+-----------------------------------------------------------------------------+
signal bar0 : std_logic_vector(31 downto 25);
signal memEN : std_logic;
signal pciadrLD : std_logic;
signal adrcfg : std_logic;
signal adrmem : std_logic;
signal adr : std_logic_vector(24 downto 1);
signal cmd : std_logic_vector(3 downto 0);
signal pcidOE : std_logic;
signal parOE : std_logic;
signal wbdatLD : std_logic;
signal wbrgdMX : std_logic;
signal wbd16MX : std_logic;
signal wrcfg : std_logic;
signal rdcfg : std_logic;
signal pcidatread : std_logic_vector(31 downto 0);
signal pcidatwrite : std_logic_vector(31 downto 0);
signal pcidatout : std_logic_vector(31 downto 0);
signal parerr : std_logic;
signal syserr : std_logic;
signal tabort : std_logic;
signal perrEN : std_logic;
signal serrEN : std_logic;
begin
--+-------------------------------------------------------------------------+
--| Component instances |
--+-------------------------------------------------------------------------+
--+-----------------------------------------+
--| PCI decoder |
--+-----------------------------------------+
u1: component pcidec_new
port map (
clk_i => clk33,
nrst_i => nrst,
--
ad_i => ad,
cbe_i => cbe,
idsel_i => idsel,
bar0_i => bar0,
memEN_i => memEN,
pciadrLD_i => pciadrLD,
adrcfg_o => adrcfg,
adrmem_o => adrmem,
adr_o => adr,
cmd_o => cmd
);
--+-----------------------------------------+
--| PCI-WB Sequencer |
--+-----------------------------------------+
u2: component pciwbsequ
port map (
-- General
clk_i => clk33,
nrst_i => nrst,
-- pci
cmd_i => cmd,
cbe_i => cbe,
frame_i => frame,
irdy_i => irdy,
devsel_o => devsel,
trdy_o => trdy,
-- control
adrcfg_i => adrcfg,
adrmem_i => adrmem,
pciadrLD_o => pciadrLD,
pcidOE_o => pcidOE,
parOE_o => parOE,
wbdatLD_o => wbdatLD,
wbrgdMX_o => wbrgdMX,
wbd16MX_o => wbd16MX,
wrcfg_o => wrcfg,
rdcfg_o => rdcfg,
-- whisbone
wb_sel_o => wb_sel_o,
wb_we_o => wb_we_o,
wb_stb_o => wb_stb_o,
wb_cyc_o => wb_cyc_o,
wb_ack_i => wb_ack_i,
wb_err_i => wb_err_i,
-- debug signals
debug_init => debug_init,
debug_access => debug_access
);
--+-----------------------------------------+
--| PCI-wb datamultiplexer |
--+-----------------------------------------+
u3: component pcidmux
port map (
clk_i => clk33,
nrst_i => nrst,
--
d_io => ad,
pcidatout_o => pcidatout,
pcidOE_i => pcidOE,
wbdatLD_i => wbdatLD,
wbrgdMX_i => wbrgdMX,
wbd16MX_i => wbd16MX,
wb_dat_i => wb_dat_i,
wb_dat_o => wb_dat_o,
rg_dat_i => pcidatread,
rg_dat_o => pcidatwrite
);
--+-----------------------------------------+
--| PCI registers |
--+-----------------------------------------+
u4: component pciregs
generic map (
vendorID => vendorID,
deviceID => deviceID,
revisionID => revisionID,
subsystemID => subsystemID,
subsystemvID => subsystemvID,
jcarr1ID => jcarr1ID,
jcarr2ID => jcarr2ID,
jcarr3ID => jcarr3ID,
jcarr4ID => jcarr4ID,
jcarr5ID => jcarr5ID,
jcarr6ID => jcarr6ID,
jcarr7ID => jcarr7ID,
jcarr8ID => jcarr8ID,
jcarr9ID => jcarr9ID,
jcarr10ID => jcarr10ID,
jcarr11ID => jcarr11ID,
jcarr12ID => jcarr12ID,
jcarr13ID => jcarr13ID,
jcarr14ID => jcarr14ID,
jcarr15ID => jcarr15ID,
jcarr16ID => jcarr16ID,
jcarr17ID => jcarr17ID,
jcarr18ID => jcarr18ID,
jcarr19ID => jcarr19ID,
jcarr20ID => jcarr20ID,
jcarr21ID => jcarr21ID,
jcarr22ID => jcarr22ID,
jcarr23ID => jcarr23ID,
jcarr24ID => jcarr24ID,
jcarr25ID => jcarr25ID,
jcarr26ID => jcarr26ID,
jcarr27ID => jcarr27ID,
jcarr28ID => jcarr28ID,
jcarr29ID => jcarr29ID,
jcarr30ID => jcarr30ID,
jcarr31ID => jcarr31ID,
jcarr32ID => jcarr32ID,
jcarr33ID => jcarr33ID,
jcarr34ID => jcarr34ID,
jcarr35ID => jcarr35ID,
jcarr36ID => jcarr36ID,
jcarr37ID => jcarr37ID,
jcarr38ID => jcarr38ID,
jcarr39ID => jcarr39ID,
jcarr40ID => jcarr40ID,
jcarr41ID => jcarr41ID,
jcarr42ID => jcarr42ID
)
port map (
clk_i => clk33,
nrst_i => nrst,
--
adr_i => adr(7 downto 2),
cbe_i => cbe,
dat_i => pcidatwrite,
dat_o => pcidatread,
wrcfg_i => wrcfg,
rdcfg_i => rdcfg,
perr_i => parerr,
serr_i => syserr,
tabort_i => tabort,
bar0_o => bar0,
perrEN_o => perrEN,
serrEN_o => serrEN,
memEN_o => memEN
);
--+-----------------------------------------+
--| PCI Parity Gnerator |
--+-----------------------------------------+
u5: component pcipargen
port map (
clk_i => clk33,
pcidatout_i => pcidatout,
cbe_i => cbe,
parOE_i => parOE,
par_o => par
);
--+-----------------------------------------+
--| Whisbone Address bus |
--+-----------------------------------------+
wb_adr_o <= adr;
--+-----------------------------------------+
--| unimplemented |
--+-----------------------------------------+
parerr <= '0';
syserr <= '0';
tabort <= '0';
--+-----------------------------------------+
--| unused outputs |
--+-----------------------------------------+
-- #stop: Curret TARGET indicates to Master stop current transaction
-- #perr:
-- #serr:
perr <= 'Z';
serr <= 'Z';
stop <= 'Z';
intb <= '0' when ( wb_int_i = '1' ) else 'Z';
end rtl;
| gpl-2.0 | a3b1696014cb747cad2906861c4256ab | 0.484586 | 2.953425 | false | false | false | false |
lerwys/GitTest | hdl/modules/position_calc/generated/virtex6/fr_cmplr_v6_3_a7495039d232075b.vhd | 1 | 6,993 | --------------------------------------------------------------------------------
-- This file is owned and controlled by Xilinx and must be used solely --
-- for design, simulation, implementation and creation of design files --
-- limited to Xilinx devices or technologies. Use with non-Xilinx --
-- devices or technologies is expressly prohibited and immediately --
-- terminates your license. --
-- --
-- XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" SOLELY --
-- FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR XILINX DEVICES. BY --
-- PROVIDING THIS DESIGN, CODE, OR INFORMATION AS ONE POSSIBLE --
-- IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD, XILINX IS --
-- MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE FROM ANY --
-- CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING ANY --
-- RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY --
-- DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE --
-- IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR --
-- REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF --
-- INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A --
-- PARTICULAR PURPOSE. --
-- --
-- Xilinx products are not intended for use in life support appliances, --
-- devices, or systems. Use in such applications are expressly --
-- prohibited. --
-- --
-- (c) Copyright 1995-2014 Xilinx, Inc. --
-- All rights reserved. --
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-- You must compile the wrapper file fr_cmplr_v6_3_a7495039d232075b.vhd when simulating
-- the core, fr_cmplr_v6_3_a7495039d232075b. When compiling the wrapper file, be sure to
-- reference the XilinxCoreLib VHDL simulation library. For detailed
-- instructions, please refer to the "CORE Generator Help".
-- The synthesis directives "translate_off/translate_on" specified
-- below are supported by Xilinx, Mentor Graphics and Synplicity
-- synthesis tools. Ensure they are correct for your synthesis tool(s).
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
-- synthesis translate_off
LIBRARY XilinxCoreLib;
-- synthesis translate_on
ENTITY fr_cmplr_v6_3_a7495039d232075b IS
PORT (
aclk : IN STD_LOGIC;
aclken : IN STD_LOGIC;
s_axis_data_tvalid : IN STD_LOGIC;
s_axis_data_tready : OUT STD_LOGIC;
s_axis_data_tuser : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
s_axis_data_tdata : IN STD_LOGIC_VECTOR(47 DOWNTO 0);
m_axis_data_tvalid : OUT STD_LOGIC;
m_axis_data_tuser : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
m_axis_data_tdata : OUT STD_LOGIC_VECTOR(63 DOWNTO 0);
event_s_data_chanid_incorrect : OUT STD_LOGIC
);
END fr_cmplr_v6_3_a7495039d232075b;
ARCHITECTURE fr_cmplr_v6_3_a7495039d232075b_a OF fr_cmplr_v6_3_a7495039d232075b IS
-- synthesis translate_off
COMPONENT wrapped_fr_cmplr_v6_3_a7495039d232075b
PORT (
aclk : IN STD_LOGIC;
aclken : IN STD_LOGIC;
s_axis_data_tvalid : IN STD_LOGIC;
s_axis_data_tready : OUT STD_LOGIC;
s_axis_data_tuser : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
s_axis_data_tdata : IN STD_LOGIC_VECTOR(47 DOWNTO 0);
m_axis_data_tvalid : OUT STD_LOGIC;
m_axis_data_tuser : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
m_axis_data_tdata : OUT STD_LOGIC_VECTOR(63 DOWNTO 0);
event_s_data_chanid_incorrect : OUT STD_LOGIC
);
END COMPONENT;
-- Configuration specification
FOR ALL : wrapped_fr_cmplr_v6_3_a7495039d232075b USE ENTITY XilinxCoreLib.fir_compiler_v6_3(behavioral)
GENERIC MAP (
c_accum_op_path_widths => "45,45",
c_accum_path_widths => "45,45",
c_channel_pattern => "fixed",
c_coef_file => "fr_cmplr_v6_3_a7495039d232075b.mif",
c_coef_file_lines => 140,
c_coef_mem_packing => 0,
c_coef_memtype => 2,
c_coef_path_sign => "0,0",
c_coef_path_src => "0,0",
c_coef_path_widths => "16,16",
c_coef_reload => 0,
c_coef_width => 16,
c_col_config => "4",
c_col_mode => 1,
c_col_pipe_len => 4,
c_component_name => "fr_cmplr_v6_3_a7495039d232075b",
c_config_packet_size => 0,
c_config_sync_mode => 0,
c_config_tdata_width => 1,
c_data_has_tlast => 0,
c_data_mem_packing => 1,
c_data_memtype => 1,
c_data_path_sign => "0,0",
c_data_path_src => "0,1",
c_data_path_widths => "24,24",
c_data_width => 24,
c_datapath_memtype => 1,
c_decim_rate => 35,
c_ext_mult_cnfg => "none",
c_filter_type => 1,
c_filts_packed => 0,
c_has_aclken => 1,
c_has_aresetn => 0,
c_has_config_channel => 0,
c_input_rate => 1,
c_interp_rate => 1,
c_ipbuff_memtype => 0,
c_latency => 12,
c_m_data_has_tready => 0,
c_m_data_has_tuser => 1,
c_m_data_tdata_width => 64,
c_m_data_tuser_width => 1,
c_mem_arrangement => 1,
c_num_channels => 2,
c_num_filts => 1,
c_num_madds => 4,
c_num_reload_slots => 1,
c_num_taps => 248,
c_opbuff_memtype => 0,
c_opt_madds => "none",
c_optimization => 0,
c_output_path_widths => "25,25",
c_output_rate => 35,
c_output_width => 25,
c_oversampling_rate => 1,
c_reload_tdata_width => 1,
c_round_mode => 4,
c_s_data_has_fifo => 0,
c_s_data_has_tuser => 1,
c_s_data_tdata_width => 48,
c_s_data_tuser_width => 1,
c_symmetry => 1,
c_xdevicefamily => "virtex6",
c_zero_packing_factor => 1
);
-- synthesis translate_on
BEGIN
-- synthesis translate_off
U0 : wrapped_fr_cmplr_v6_3_a7495039d232075b
PORT MAP (
aclk => aclk,
aclken => aclken,
s_axis_data_tvalid => s_axis_data_tvalid,
s_axis_data_tready => s_axis_data_tready,
s_axis_data_tuser => s_axis_data_tuser,
s_axis_data_tdata => s_axis_data_tdata,
m_axis_data_tvalid => m_axis_data_tvalid,
m_axis_data_tuser => m_axis_data_tuser,
m_axis_data_tdata => m_axis_data_tdata,
event_s_data_chanid_incorrect => event_s_data_chanid_incorrect
);
-- synthesis translate_on
END fr_cmplr_v6_3_a7495039d232075b_a;
| lgpl-3.0 | 57622ebf1afb81a99a2adb6f3763f8c8 | 0.552553 | 3.547945 | false | false | false | false |
lerwys/GitTest | hdl/modules/wb_un_cross/cross_uncross_core/swap_cnt_top.vhd | 1 | 7,231 | ------------------------------------------------------------------------------
-- Title : Swapping Channel Pairs under Counter, Top entity
------------------------------------------------------------------------------
-- Author : José Alvim Berkenbrock
-- Company : CNPEM LNLS-DIG
-- Platform : FPGA-generic
-------------------------------------------------------------------------------
-- Description: This design uses a counter to divide clock input frequency and
-- apply it as enable signal to swap the switches of rf_ch_swap
-- block. The counting constant is a generic parameter.
-- Is possible to select the blocks independently. This option
-- allow us to compare with x without swiching mode of channels to
-- see how useful is switching mode to mitigate board drifts.
-------------------------------------------------------------------------------
-- Copyright (c) 2013 CNPEM
-- Licensed under GNU Lesser General Public License (LGPL) v3.0
-------------------------------------------------------------------------------
-- Revisions :
-- Date Version Author Description
-- 2013-01-24 1.0 jose.berkenbrock Created
-- 2013-01-25 1.1 jose.berkenbrock Independently mode selection
-- 2013-01-30 1.1 jose.berkenbrock Core description
-- 2013-02-14 1.2 jose.berkenbrock Set enable divider as generic
-- 2013-02-18 2.0 jose.berkenbrock New outputs swap and en_inv[2:1]
-- 2013-02-21 3.0 jose.berkenbrock New flag output, en_inv supressed
-- 2013-02-22 4.0 jose.berkenbrock New status out;flag/swap supressed
-- 2013-03-09 5.0 jose.berkenbrock swap_div_f_i added
-- 2013-07-01 5.1 lucas.russo Changed to synchronous resets
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
--library unisim;
--use unisim.vcomponents.all;
entity swap_cnt_top is
generic(
--g_en_swap_div : natural := 1023
g_swap_div_freq_vec_width : natural range 0 to 16 := 10
);
port(
clk_i : in std_logic;
rst_n_i : in std_logic;
mode1_i : in std_logic_vector(1 downto 0);
mode2_i : in std_logic_vector(1 downto 0);
swap_div_f_i : in std_logic_vector(g_swap_div_freq_vec_width-1 downto 0);
ext_clk_i : in std_logic;
ext_clk_en_i : in std_logic;
clk_swap_o : out std_logic;
clk_swap_en_i : in std_logic;
--blink_fmc : out std_logic;
status1_o : out std_logic;
status2_o : out std_logic;
ctrl1_o : out std_logic_vector(7 downto 0);
ctrl2_o : out std_logic_vector(7 downto 0)
);
end swap_cnt_top;
architecture rtl of swap_cnt_top is
component rf_ch_swap
generic(
g_direct : std_logic_vector(7 downto 0) := "10100101";
g_inverted : std_logic_vector(7 downto 0) := "01011010");
port(
clk_i : in std_logic;
rst_n_i : in std_logic;
en_swap_i : in std_logic;
mode_i : in std_logic_vector(1 downto 0);
status_o : out std_logic;
ctrl_o : out std_logic_vector(7 downto 0)
);
end component;
signal count : natural range 0 to 2**g_swap_div_freq_vec_width-1;
signal count_half : natural range 0 to 1;
signal cnst_swap_div_f : natural range 0 to 2**g_swap_div_freq_vec_width-1;
signal count2 : natural range 0 to 20000000;
signal blink : std_logic;
signal swap : std_logic;
signal swap_mux : std_logic;
signal swap_posedge : std_logic;
signal swap_old : std_logic;
signal swap_half : std_logic;
signal status1, status1_old : std_logic;
signal status2, status2_old : std_logic;
begin
cnst_swap_div_f <= (to_integer(unsigned(swap_div_f_i))+1);
------------------------------------------------------------------
---- Mode Register
----------------------------------
-- p_reg_mode : process(clk_i)
-- begin
-- if rising_edge(clk_i) then
-- if rst_n_i = '0' then
-- s_mode <= (others => '0');
-- else
-- s_mode <= mode_i;
-- end if;
-- end if;
-- end process p_reg_mode;
----------------------------------------------------------------
-- Swapp_ch_rf Components Instantiation
----------------------------------------------------------------
swapp_inst_1: rf_ch_swap
port map (
clk_i => clk_i,
rst_n_i => rst_n_i,
--en_swap_i => swap,
en_swap_i => swap_half,
mode_i => mode1_i,
status_o => status1,
ctrl_o => ctrl1_o
);
swapp_inst_2: rf_ch_swap
port map (
clk_i => clk_i,
rst_n_i => rst_n_i,
--en_swap_i => swap,
en_swap_i => swap_half,
mode_i => mode2_i,
status_o => status2,
ctrl_o => ctrl2_o
);
----------------------------------------------------------------
p_freq_swap : process(clk_i)
begin
if rising_edge(clk_i) then
if rst_n_i = '0' then
count <= 0;
swap <= '0';
else
if clk_swap_en_i = '0' then
count <= 0;
swap <= '0';
elsif count = cnst_swap_div_f then
count <= 0;
swap <= not swap;
else
count <= count + 1;
end if;
end if;
end if;
end process p_freq_swap;
----------------------------------------------------------------
-- Use external provided clock or the internal generated one
swap_mux <= ext_clk_i when ext_clk_en_i = '1' else swap;
p_swap_reg : process(clk_i)
begin
if rising_edge(clk_i) then
if rst_n_i = '0' then
swap_old <= '0';
else
swap_old <= swap_mux;
end if;
end if;
end process p_swap_reg;
swap_posedge <= '1' when swap_mux = '1' and swap_old = '0' else '0';
p_freq_swap_half : process(clk_i)
begin
if rising_edge(clk_i) then
if rst_n_i = '0' then
--count_half <= 0;
swap_half <= '0';
else
if clk_swap_en_i = '0' then
swap_half <= '0';
elsif swap_posedge = '1' then
swap_half <= not swap_half;
end if;
end if;
end if;
end process p_freq_swap_half;
----------------------------------------------------------------
p_status : process(clk_i)
begin
if rising_edge(clk_i) then
if rst_n_i = '0' then
status1_old <= '0';
status2_old <= '0';
else
status1_old <= status1;
status2_old <= status2;
end if;
end if;
end process p_status;
----------------------------------------------------------------
clk_swap_o <= swap_mux;
status1_o <= status1 xor status1_old;
status2_o <= status2 xor status2_old;
end;
| lgpl-3.0 | 5e58328d8aa1a7137e4793523fc69445 | 0.459549 | 3.735021 | false | false | false | false |
freecores/raggedstone | source/pcipargen.vhd | 1 | 5,617 | --+-------------------------------------------------------------------------------------------------+
--| |
--| File: pcipargen.vhd |
--| |
--| Project: pci32tlite_oc |
--| |
--| Description: PCI Parity Generator. |
--| PCI Target generates PAR in the data phase of a read cycle. The 1's sum on AD, |
--| CBE and PAR is even. |
--| |
--+-------------------------------------------------------------------------------------------------+
--| |
--| Revision history : |
--| Date Version Author Description |
--| 2005-05-13 R00A00 PAU First alfa revision (eng) |
--| |
--| To do: |
--| |
--+-------------------------------------------------------------------------------------------------+
--+-----------------------------------------------------------------+
--| |
--| Copyright (C) 2005 Peio Azkarate, [email protected] |
--| |
--| This source file may be used and distributed without |
--| restriction provided that this copyright statement is not |
--| removed from the file and that any derivative work contains |
--| the original copyright notice and the associated disclaimer. |
--| |
--| This source file is free software; you can redistribute it |
--| and/or modify it under the terms of the GNU Lesser General |
--| Public License as published by the Free Software Foundation; |
--| either version 2.1 of the License, or (at your option) any |
--| later version. |
--| |
--| This source is distributed in the hope that it will be |
--| useful, but WITHOUT ANY WARRANTY; without even the implied |
--| warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR |
--| PURPOSE. See the GNU Lesser General Public License for more |
--| details. |
--| |
--| You should have received a copy of the GNU Lesser General |
--| Public License along with this source; if not, download it |
--| from http://www.opencores.org/lgpl.shtml |
--| |
--+-----------------------------------------------------------------+
--+-----------------------------------------------------------------------------+
--| LIBRARIES |
--+-----------------------------------------------------------------------------+
library ieee;
use ieee.std_logic_1164.all;
--+-----------------------------------------------------------------------------+
--| ENTITY |
--+-----------------------------------------------------------------------------+
entity pcipargen is
port (
clk_i : in std_logic;
pcidatout_i : in std_logic_vector(31 downto 0);
cbe_i : in std_logic_vector(3 downto 0);
parOE_i : in std_logic;
par_o : out std_logic
);
end pcipargen;
architecture rtl of pcipargen is
--+-----------------------------------------------------------------------------+
--| COMPONENTS |
--+-----------------------------------------------------------------------------+
--+-----------------------------------------------------------------------------+
--| CONSTANTS |
--+-----------------------------------------------------------------------------+
--+-----------------------------------------------------------------------------+
--| SIGNALS |
--+-----------------------------------------------------------------------------+
signal d : std_logic_vector(31 downto 0);
signal pardat : std_logic;
signal parcbe : std_logic;
signal par : std_logic;
signal par_s : std_logic;
component sync
port (
clk : in std_logic;
d : in std_logic;
q : out std_logic
);
end component;
component sync2
port (
clk : in std_logic;
d : in std_logic;
q : out std_logic
);
end component;
begin
d <= pcidatout_i;
--+-------------------------------------------------------------------------+
--| building parity |
--+-------------------------------------------------------------------------+
pardat <= d(0) xor d(1) xor d(2) xor d(3) xor d(4) xor d(5) xor d(6) xor d(7) xor
d(8) xor d(9) xor d(10) xor d(11) xor d(12) xor d(13) xor d(14) xor d(15) xor
d(16) xor d(17) xor d(18) xor d(19) xor d(20) xor d(21) xor d(22) xor d(23) xor
d(24) xor d(25) xor d(26) xor d(27) xor d(28) xor d(29) xor d(30) xor d(31);
parcbe <= cbe_i(0) xor cbe_i(1) xor cbe_i(2) xor cbe_i(3);
par <= pardat xor parcbe;
-- u1: sync port map ( clk => clk_i, d => par, q => par_s );
u1: sync2 port map (
clk => clk_i,
d => par,
q => par_s
);
--+-------------------------------------------------------------------------+
--| PAR |
--+-------------------------------------------------------------------------+
par_o <= par_s when ( parOE_i = '1' ) else 'Z';
end rtl;
| gpl-2.0 | e891245f5c2f2918d12a44d8d638a245 | 0.32455 | 4.317448 | false | false | false | false |
ricardo-jasinski/vhdl-game-engine | hdl/implementation/engine/vga_timing_generator.vhd | 1 | 4,075 | library ieee;
use ieee.std_logic_1164.all;
-- Module Generates Video Sync signals for Video Monitor Interface
-- RGB and Sync outputs tie directly to monitor connector pins
entity vga_timing_generator is
generic (
H_COUNT_MAX: integer := 800;
V_COUNT_MAX: integer := 525
);
port(
vga_clock_in: in std_logic;
horiz_sync_out: out std_logic;
vert_sync_out : out std_logic;
video_on: out std_logic;
pixel_row: out integer range 0 to V_COUNT_MAX;
pixel_column: out integer range 0 to H_COUNT_MAX
);
end vga_timing_generator;
architecture behavior of vga_timing_generator is
-- Horizontal Timing constants
constant H_PIXELS_COUNT: integer := 640;
constant H_FRONT_PORCH_LENGTH: integer := 16;
constant H_SYNC_PULSE_LENGTH: integer := 96;
constant H_COUNT_SYNC_LOW: integer := H_PIXELS_COUNT + H_FRONT_PORCH_LENGTH;
constant H_COUNT_SYNC_HIGH: integer := H_COUNT_SYNC_LOW + H_SYNC_PULSE_LENGTH;
-- Vertical Timing constants
constant V_PIXELS_COUNT: integer := 480;
constant V_FRONT_PORCH_LENGTH: integer := 9; -- 11;
constant V_SYNC_PULSE_LENGTH: integer := 2;
constant V_COUNT_SYNC_LOW: integer := V_PIXELS_COUNT + V_FRONT_PORCH_LENGTH;
constant V_COUNT_SYNC_HIGH: integer := V_COUNT_SYNC_LOW + V_SYNC_PULSE_LENGTH;
signal horiz_sync, vert_sync: std_logic;
signal video_on_v, video_on_h : std_logic;
signal h_count: integer range 0 to H_COUNT_MAX;
signal v_count: integer range 0 to V_COUNT_MAX;
begin
-- video_on is high only when RGB pixel data is being displayed
-- used to blank color signals at screen edges during retrace
video_on <= video_on_H and video_on_V;
process
begin
wait until rising_edge(vga_clock_in);
--Generate Horizontal and Vertical Timing signals for Video signal
-- H_count counts pixels (#pixels across + extra time for sync signals)
--
-- Horiz_sync ------------------------------------__________--------
-- H_count 0 #pixels sync low end
if (h_count = H_COUNT_MAX) then
h_count <= 0;
else
h_count <= h_count + 1;
end if;
--Generate Horizontal Sync signal using H_count
if (h_count <= H_COUNT_SYNC_HIGH) and (h_count >= H_COUNT_SYNC_LOW) then
horiz_sync <= '0';
else
horiz_sync <= '1';
end if;
--V_count counts rows of pixels (#pixel rows down + extra time for V sync signal)
--
-- Vert_sync -----------------------------------------------_______------------
-- V_count 0 last pixel row V sync low end
--
if (v_count >= V_COUNT_MAX) and (h_count >= H_COUNT_SYNC_LOW) then
v_count <= 0;
elsif (h_count = H_COUNT_SYNC_LOW) then
v_count <= v_count + 1;
end if;
-- Generate Vertical Sync signal using V_count
if (v_count <= V_COUNT_SYNC_HIGH) and (v_count >= V_COUNT_SYNC_LOW) then
vert_sync <= '0';
else
vert_sync <= '1';
end if;
-- Generate Video on Screen signals for Pixel Data
-- Video on = 1 indicates pixel are being displayed
-- Video on = 0 retrace - user logic can update pixel
-- memory without needing to read memory for display
if (h_count < H_PIXELS_COUNT) then
video_on_h <= '1';
pixel_column <= h_count;
else
video_on_h <= '0';
end if;
if (v_count <= V_PIXELS_COUNT) then
video_on_v <= '1';
pixel_row <= v_count;
else
video_on_v <= '0';
end if;
-- Put all video signals through DFFs to eliminate any small timing
-- delays that cause a blurry image
horiz_sync_out <= horiz_sync;
vert_sync_out <= vert_sync;
end process;
end Behavior;
| unlicense | c291c6929d795ad561a011d14314905b | 0.553129 | 3.906999 | false | false | false | false |
lerwys/GitTest | hdl/modules/position_calc/generated/artix7/perl_results.vhd | 1 | 210,574 |
-------------------------------------------------------------------
-- System Generator version 13.4 VHDL source file.
--
-- Copyright(C) 2011 by Xilinx, Inc. All rights reserved. This
-- text/file contains proprietary, confidential information of Xilinx,
-- Inc., is distributed under license from Xilinx, Inc., and may be used,
-- copied and/or disclosed only pursuant to the terms of a valid license
-- agreement with Xilinx, Inc. Xilinx hereby grants you a license to use
-- this text/file solely for design, simulation, implementation and
-- creation of design files limited to Xilinx devices or technologies.
-- Use with non-Xilinx devices or technologies is expressly prohibited
-- and immediately terminates your license unless covered by a separate
-- agreement.
--
-- Xilinx is providing this design, code, or information "as is" solely
-- for use in developing programs and solutions for Xilinx devices. By
-- providing this design, code, or information as one possible
-- implementation of this feature, application or standard, Xilinx is
-- making no representation that this implementation is free from any
-- claims of infringement. You are responsible for obtaining any rights
-- you may require for your implementation. Xilinx expressly disclaims
-- any warranty whatsoever with respect to the adequacy of the
-- implementation, including but not limited to warranties of
-- merchantability or fitness for a particular purpose.
--
-- Xilinx products are not intended for use in life support appliances,
-- devices, or systems. Use in such applications is expressly prohibited.
--
-- Any modifications that are made to the source code are done at the user's
-- sole risk and will be unsupported.
--
-- This copyright and support notice must be retained as part of this
-- text at all times. (c) Copyright 1995-2011 Xilinx, Inc. All rights
-- reserved.
-------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
package conv_pkg is
constant simulating : boolean := false
-- synopsys translate_off
or true
-- synopsys translate_on
;
constant xlUnsigned : integer := 1;
constant xlSigned : integer := 2;
constant xlFloat : integer := 3;
constant xlWrap : integer := 1;
constant xlSaturate : integer := 2;
constant xlTruncate : integer := 1;
constant xlRound : integer := 2;
constant xlRoundBanker : integer := 3;
constant xlAddMode : integer := 1;
constant xlSubMode : integer := 2;
attribute black_box : boolean;
attribute syn_black_box : boolean;
attribute fpga_dont_touch: string;
attribute box_type : string;
attribute keep : string;
attribute syn_keep : boolean;
function std_logic_vector_to_unsigned(inp : std_logic_vector) return unsigned;
function unsigned_to_std_logic_vector(inp : unsigned) return std_logic_vector;
function std_logic_vector_to_signed(inp : std_logic_vector) return signed;
function signed_to_std_logic_vector(inp : signed) return std_logic_vector;
function unsigned_to_signed(inp : unsigned) return signed;
function signed_to_unsigned(inp : signed) return unsigned;
function pos(inp : std_logic_vector; arith : INTEGER) return boolean;
function all_same(inp: std_logic_vector) return boolean;
function all_zeros(inp: std_logic_vector) return boolean;
function is_point_five(inp: std_logic_vector) return boolean;
function all_ones(inp: std_logic_vector) return boolean;
function convert_type (inp : std_logic_vector; old_width, old_bin_pt,
old_arith, new_width, new_bin_pt, new_arith,
quantization, overflow : INTEGER)
return std_logic_vector;
function cast (inp : std_logic_vector; old_bin_pt,
new_width, new_bin_pt, new_arith : INTEGER)
return std_logic_vector;
function shift_division_result(quotient, fraction: std_logic_vector;
fraction_width, shift_value, shift_dir: INTEGER)
return std_logic_vector;
function shift_op (inp: std_logic_vector;
result_width, shift_value, shift_dir: INTEGER)
return std_logic_vector;
function vec_slice (inp : std_logic_vector; upper, lower : INTEGER)
return std_logic_vector;
function s2u_slice (inp : signed; upper, lower : INTEGER)
return unsigned;
function u2u_slice (inp : unsigned; upper, lower : INTEGER)
return unsigned;
function s2s_cast (inp : signed; old_bin_pt,
new_width, new_bin_pt : INTEGER)
return signed;
function u2s_cast (inp : unsigned; old_bin_pt,
new_width, new_bin_pt : INTEGER)
return signed;
function s2u_cast (inp : signed; old_bin_pt,
new_width, new_bin_pt : INTEGER)
return unsigned;
function u2u_cast (inp : unsigned; old_bin_pt,
new_width, new_bin_pt : INTEGER)
return unsigned;
function u2v_cast (inp : unsigned; old_bin_pt,
new_width, new_bin_pt : INTEGER)
return std_logic_vector;
function s2v_cast (inp : signed; old_bin_pt,
new_width, new_bin_pt : INTEGER)
return std_logic_vector;
function trunc (inp : std_logic_vector; old_width, old_bin_pt, old_arith,
new_width, new_bin_pt, new_arith : INTEGER)
return std_logic_vector;
function round_towards_inf (inp : std_logic_vector; old_width, old_bin_pt,
old_arith, new_width, new_bin_pt,
new_arith : INTEGER) return std_logic_vector;
function round_towards_even (inp : std_logic_vector; old_width, old_bin_pt,
old_arith, new_width, new_bin_pt,
new_arith : INTEGER) return std_logic_vector;
function max_signed(width : INTEGER) return std_logic_vector;
function min_signed(width : INTEGER) return std_logic_vector;
function saturation_arith(inp: std_logic_vector; old_width, old_bin_pt,
old_arith, new_width, new_bin_pt, new_arith
: INTEGER) return std_logic_vector;
function wrap_arith(inp: std_logic_vector; old_width, old_bin_pt,
old_arith, new_width, new_bin_pt, new_arith : INTEGER)
return std_logic_vector;
function fractional_bits(a_bin_pt, b_bin_pt: INTEGER) return INTEGER;
function integer_bits(a_width, a_bin_pt, b_width, b_bin_pt: INTEGER)
return INTEGER;
function sign_ext(inp : std_logic_vector; new_width : INTEGER)
return std_logic_vector;
function zero_ext(inp : std_logic_vector; new_width : INTEGER)
return std_logic_vector;
function zero_ext(inp : std_logic; new_width : INTEGER)
return std_logic_vector;
function extend_MSB(inp : std_logic_vector; new_width, arith : INTEGER)
return std_logic_vector;
function align_input(inp : std_logic_vector; old_width, delta, new_arith,
new_width: INTEGER)
return std_logic_vector;
function pad_LSB(inp : std_logic_vector; new_width: integer)
return std_logic_vector;
function pad_LSB(inp : std_logic_vector; new_width, arith : integer)
return std_logic_vector;
function max(L, R: INTEGER) return INTEGER;
function min(L, R: INTEGER) return INTEGER;
function "="(left,right: STRING) return boolean;
function boolean_to_signed (inp : boolean; width: integer)
return signed;
function boolean_to_unsigned (inp : boolean; width: integer)
return unsigned;
function boolean_to_vector (inp : boolean)
return std_logic_vector;
function std_logic_to_vector (inp : std_logic)
return std_logic_vector;
function integer_to_std_logic_vector (inp : integer; width, arith : integer)
return std_logic_vector;
function std_logic_vector_to_integer (inp : std_logic_vector; arith : integer)
return integer;
function std_logic_to_integer(constant inp : std_logic := '0')
return integer;
function bin_string_element_to_std_logic_vector (inp : string; width, index : integer)
return std_logic_vector;
function bin_string_to_std_logic_vector (inp : string)
return std_logic_vector;
function hex_string_to_std_logic_vector (inp : string; width : integer)
return std_logic_vector;
function makeZeroBinStr (width : integer) return STRING;
function and_reduce(inp: std_logic_vector) return std_logic;
-- synopsys translate_off
function is_binary_string_invalid (inp : string)
return boolean;
function is_binary_string_undefined (inp : string)
return boolean;
function is_XorU(inp : std_logic_vector)
return boolean;
function to_real(inp : std_logic_vector; bin_pt : integer; arith : integer)
return real;
function std_logic_to_real(inp : std_logic; bin_pt : integer; arith : integer)
return real;
function real_to_std_logic_vector (inp : real; width, bin_pt, arith : integer)
return std_logic_vector;
function real_string_to_std_logic_vector (inp : string; width, bin_pt, arith : integer)
return std_logic_vector;
constant display_precision : integer := 20;
function real_to_string (inp : real) return string;
function valid_bin_string(inp : string) return boolean;
function std_logic_vector_to_bin_string(inp : std_logic_vector) return string;
function std_logic_to_bin_string(inp : std_logic) return string;
function std_logic_vector_to_bin_string_w_point(inp : std_logic_vector; bin_pt : integer)
return string;
function real_to_bin_string(inp : real; width, bin_pt, arith : integer)
return string;
type stdlogic_to_char_t is array(std_logic) of character;
constant to_char : stdlogic_to_char_t := (
'U' => 'U',
'X' => 'X',
'0' => '0',
'1' => '1',
'Z' => 'Z',
'W' => 'W',
'L' => 'L',
'H' => 'H',
'-' => '-');
-- synopsys translate_on
end conv_pkg;
package body conv_pkg is
function std_logic_vector_to_unsigned(inp : std_logic_vector)
return unsigned
is
begin
return unsigned (inp);
end;
function unsigned_to_std_logic_vector(inp : unsigned)
return std_logic_vector
is
begin
return std_logic_vector(inp);
end;
function std_logic_vector_to_signed(inp : std_logic_vector)
return signed
is
begin
return signed (inp);
end;
function signed_to_std_logic_vector(inp : signed)
return std_logic_vector
is
begin
return std_logic_vector(inp);
end;
function unsigned_to_signed (inp : unsigned)
return signed
is
begin
return signed(std_logic_vector(inp));
end;
function signed_to_unsigned (inp : signed)
return unsigned
is
begin
return unsigned(std_logic_vector(inp));
end;
function pos(inp : std_logic_vector; arith : INTEGER)
return boolean
is
constant width : integer := inp'length;
variable vec : std_logic_vector(width-1 downto 0);
begin
vec := inp;
if arith = xlUnsigned then
return true;
else
if vec(width-1) = '0' then
return true;
else
return false;
end if;
end if;
return true;
end;
function max_signed(width : INTEGER)
return std_logic_vector
is
variable ones : std_logic_vector(width-2 downto 0);
variable result : std_logic_vector(width-1 downto 0);
begin
ones := (others => '1');
result(width-1) := '0';
result(width-2 downto 0) := ones;
return result;
end;
function min_signed(width : INTEGER)
return std_logic_vector
is
variable zeros : std_logic_vector(width-2 downto 0);
variable result : std_logic_vector(width-1 downto 0);
begin
zeros := (others => '0');
result(width-1) := '1';
result(width-2 downto 0) := zeros;
return result;
end;
function and_reduce(inp: std_logic_vector) return std_logic
is
variable result: std_logic;
constant width : integer := inp'length;
variable vec : std_logic_vector(width-1 downto 0);
begin
vec := inp;
result := vec(0);
if width > 1 then
for i in 1 to width-1 loop
result := result and vec(i);
end loop;
end if;
return result;
end;
function all_same(inp: std_logic_vector) return boolean
is
variable result: boolean;
constant width : integer := inp'length;
variable vec : std_logic_vector(width-1 downto 0);
begin
vec := inp;
result := true;
if width > 0 then
for i in 1 to width-1 loop
if vec(i) /= vec(0) then
result := false;
end if;
end loop;
end if;
return result;
end;
function all_zeros(inp: std_logic_vector)
return boolean
is
constant width : integer := inp'length;
variable vec : std_logic_vector(width-1 downto 0);
variable zero : std_logic_vector(width-1 downto 0);
variable result : boolean;
begin
zero := (others => '0');
vec := inp;
-- synopsys translate_off
if (is_XorU(vec)) then
return false;
end if;
-- synopsys translate_on
if (std_logic_vector_to_unsigned(vec) = std_logic_vector_to_unsigned(zero)) then
result := true;
else
result := false;
end if;
return result;
end;
function is_point_five(inp: std_logic_vector)
return boolean
is
constant width : integer := inp'length;
variable vec : std_logic_vector(width-1 downto 0);
variable result : boolean;
begin
vec := inp;
-- synopsys translate_off
if (is_XorU(vec)) then
return false;
end if;
-- synopsys translate_on
if (width > 1) then
if ((vec(width-1) = '1') and (all_zeros(vec(width-2 downto 0)) = true)) then
result := true;
else
result := false;
end if;
else
if (vec(width-1) = '1') then
result := true;
else
result := false;
end if;
end if;
return result;
end;
function all_ones(inp: std_logic_vector)
return boolean
is
constant width : integer := inp'length;
variable vec : std_logic_vector(width-1 downto 0);
variable one : std_logic_vector(width-1 downto 0);
variable result : boolean;
begin
one := (others => '1');
vec := inp;
-- synopsys translate_off
if (is_XorU(vec)) then
return false;
end if;
-- synopsys translate_on
if (std_logic_vector_to_unsigned(vec) = std_logic_vector_to_unsigned(one)) then
result := true;
else
result := false;
end if;
return result;
end;
function full_precision_num_width(quantization, overflow, old_width,
old_bin_pt, old_arith,
new_width, new_bin_pt, new_arith : INTEGER)
return integer
is
variable result : integer;
begin
result := old_width + 2;
return result;
end;
function quantized_num_width(quantization, overflow, old_width, old_bin_pt,
old_arith, new_width, new_bin_pt, new_arith
: INTEGER)
return integer
is
variable right_of_dp, left_of_dp, result : integer;
begin
right_of_dp := max(new_bin_pt, old_bin_pt);
left_of_dp := max((new_width - new_bin_pt), (old_width - old_bin_pt));
result := (old_width + 2) + (new_bin_pt - old_bin_pt);
return result;
end;
function convert_type (inp : std_logic_vector; old_width, old_bin_pt,
old_arith, new_width, new_bin_pt, new_arith,
quantization, overflow : INTEGER)
return std_logic_vector
is
constant fp_width : integer :=
full_precision_num_width(quantization, overflow, old_width,
old_bin_pt, old_arith, new_width,
new_bin_pt, new_arith);
constant fp_bin_pt : integer := old_bin_pt;
constant fp_arith : integer := old_arith;
variable full_precision_result : std_logic_vector(fp_width-1 downto 0);
constant q_width : integer :=
quantized_num_width(quantization, overflow, old_width, old_bin_pt,
old_arith, new_width, new_bin_pt, new_arith);
constant q_bin_pt : integer := new_bin_pt;
constant q_arith : integer := old_arith;
variable quantized_result : std_logic_vector(q_width-1 downto 0);
variable result : std_logic_vector(new_width-1 downto 0);
begin
result := (others => '0');
full_precision_result := cast(inp, old_bin_pt, fp_width, fp_bin_pt,
fp_arith);
if (quantization = xlRound) then
quantized_result := round_towards_inf(full_precision_result,
fp_width, fp_bin_pt,
fp_arith, q_width, q_bin_pt,
q_arith);
elsif (quantization = xlRoundBanker) then
quantized_result := round_towards_even(full_precision_result,
fp_width, fp_bin_pt,
fp_arith, q_width, q_bin_pt,
q_arith);
else
quantized_result := trunc(full_precision_result, fp_width, fp_bin_pt,
fp_arith, q_width, q_bin_pt, q_arith);
end if;
if (overflow = xlSaturate) then
result := saturation_arith(quantized_result, q_width, q_bin_pt,
q_arith, new_width, new_bin_pt, new_arith);
else
result := wrap_arith(quantized_result, q_width, q_bin_pt, q_arith,
new_width, new_bin_pt, new_arith);
end if;
return result;
end;
function cast (inp : std_logic_vector; old_bin_pt, new_width,
new_bin_pt, new_arith : INTEGER)
return std_logic_vector
is
constant old_width : integer := inp'length;
constant left_of_dp : integer := (new_width - new_bin_pt)
- (old_width - old_bin_pt);
constant right_of_dp : integer := (new_bin_pt - old_bin_pt);
variable vec : std_logic_vector(old_width-1 downto 0);
variable result : std_logic_vector(new_width-1 downto 0);
variable j : integer;
begin
vec := inp;
for i in new_width-1 downto 0 loop
j := i - right_of_dp;
if ( j > old_width-1) then
if (new_arith = xlUnsigned) then
result(i) := '0';
else
result(i) := vec(old_width-1);
end if;
elsif ( j >= 0) then
result(i) := vec(j);
else
result(i) := '0';
end if;
end loop;
return result;
end;
function shift_division_result(quotient, fraction: std_logic_vector;
fraction_width, shift_value, shift_dir: INTEGER)
return std_logic_vector
is
constant q_width : integer := quotient'length;
constant f_width : integer := fraction'length;
constant vec_MSB : integer := q_width+f_width-1;
constant result_MSB : integer := q_width+fraction_width-1;
constant result_LSB : integer := vec_MSB-result_MSB;
variable vec : std_logic_vector(vec_MSB downto 0);
variable result : std_logic_vector(result_MSB downto 0);
begin
vec := ( quotient & fraction );
if shift_dir = 1 then
for i in vec_MSB downto 0 loop
if (i < shift_value) then
vec(i) := '0';
else
vec(i) := vec(i-shift_value);
end if;
end loop;
else
for i in 0 to vec_MSB loop
if (i > vec_MSB-shift_value) then
vec(i) := vec(vec_MSB);
else
vec(i) := vec(i+shift_value);
end if;
end loop;
end if;
result := vec(vec_MSB downto result_LSB);
return result;
end;
function shift_op (inp: std_logic_vector;
result_width, shift_value, shift_dir: INTEGER)
return std_logic_vector
is
constant inp_width : integer := inp'length;
constant vec_MSB : integer := inp_width-1;
constant result_MSB : integer := result_width-1;
constant result_LSB : integer := vec_MSB-result_MSB;
variable vec : std_logic_vector(vec_MSB downto 0);
variable result : std_logic_vector(result_MSB downto 0);
begin
vec := inp;
if shift_dir = 1 then
for i in vec_MSB downto 0 loop
if (i < shift_value) then
vec(i) := '0';
else
vec(i) := vec(i-shift_value);
end if;
end loop;
else
for i in 0 to vec_MSB loop
if (i > vec_MSB-shift_value) then
vec(i) := vec(vec_MSB);
else
vec(i) := vec(i+shift_value);
end if;
end loop;
end if;
result := vec(vec_MSB downto result_LSB);
return result;
end;
function vec_slice (inp : std_logic_vector; upper, lower : INTEGER)
return std_logic_vector
is
begin
return inp(upper downto lower);
end;
function s2u_slice (inp : signed; upper, lower : INTEGER)
return unsigned
is
begin
return unsigned(vec_slice(std_logic_vector(inp), upper, lower));
end;
function u2u_slice (inp : unsigned; upper, lower : INTEGER)
return unsigned
is
begin
return unsigned(vec_slice(std_logic_vector(inp), upper, lower));
end;
function s2s_cast (inp : signed; old_bin_pt, new_width, new_bin_pt : INTEGER)
return signed
is
begin
return signed(cast(std_logic_vector(inp), old_bin_pt, new_width, new_bin_pt, xlSigned));
end;
function s2u_cast (inp : signed; old_bin_pt, new_width,
new_bin_pt : INTEGER)
return unsigned
is
begin
return unsigned(cast(std_logic_vector(inp), old_bin_pt, new_width, new_bin_pt, xlSigned));
end;
function u2s_cast (inp : unsigned; old_bin_pt, new_width,
new_bin_pt : INTEGER)
return signed
is
begin
return signed(cast(std_logic_vector(inp), old_bin_pt, new_width, new_bin_pt, xlUnsigned));
end;
function u2u_cast (inp : unsigned; old_bin_pt, new_width,
new_bin_pt : INTEGER)
return unsigned
is
begin
return unsigned(cast(std_logic_vector(inp), old_bin_pt, new_width, new_bin_pt, xlUnsigned));
end;
function u2v_cast (inp : unsigned; old_bin_pt, new_width,
new_bin_pt : INTEGER)
return std_logic_vector
is
begin
return cast(std_logic_vector(inp), old_bin_pt, new_width, new_bin_pt, xlUnsigned);
end;
function s2v_cast (inp : signed; old_bin_pt, new_width,
new_bin_pt : INTEGER)
return std_logic_vector
is
begin
return cast(std_logic_vector(inp), old_bin_pt, new_width, new_bin_pt, xlSigned);
end;
function boolean_to_signed (inp : boolean; width : integer)
return signed
is
variable result : signed(width - 1 downto 0);
begin
result := (others => '0');
if inp then
result(0) := '1';
else
result(0) := '0';
end if;
return result;
end;
function boolean_to_unsigned (inp : boolean; width : integer)
return unsigned
is
variable result : unsigned(width - 1 downto 0);
begin
result := (others => '0');
if inp then
result(0) := '1';
else
result(0) := '0';
end if;
return result;
end;
function boolean_to_vector (inp : boolean)
return std_logic_vector
is
variable result : std_logic_vector(1 - 1 downto 0);
begin
result := (others => '0');
if inp then
result(0) := '1';
else
result(0) := '0';
end if;
return result;
end;
function std_logic_to_vector (inp : std_logic)
return std_logic_vector
is
variable result : std_logic_vector(1 - 1 downto 0);
begin
result(0) := inp;
return result;
end;
function trunc (inp : std_logic_vector; old_width, old_bin_pt, old_arith,
new_width, new_bin_pt, new_arith : INTEGER)
return std_logic_vector
is
constant right_of_dp : integer := (old_bin_pt - new_bin_pt);
variable vec : std_logic_vector(old_width-1 downto 0);
variable result : std_logic_vector(new_width-1 downto 0);
begin
vec := inp;
if right_of_dp >= 0 then
if new_arith = xlUnsigned then
result := zero_ext(vec(old_width-1 downto right_of_dp), new_width);
else
result := sign_ext(vec(old_width-1 downto right_of_dp), new_width);
end if;
else
if new_arith = xlUnsigned then
result := zero_ext(pad_LSB(vec, old_width +
abs(right_of_dp)), new_width);
else
result := sign_ext(pad_LSB(vec, old_width +
abs(right_of_dp)), new_width);
end if;
end if;
return result;
end;
function round_towards_inf (inp : std_logic_vector; old_width, old_bin_pt,
old_arith, new_width, new_bin_pt, new_arith
: INTEGER)
return std_logic_vector
is
constant right_of_dp : integer := (old_bin_pt - new_bin_pt);
constant expected_new_width : integer := old_width - right_of_dp + 1;
variable vec : std_logic_vector(old_width-1 downto 0);
variable one_or_zero : std_logic_vector(new_width-1 downto 0);
variable truncated_val : std_logic_vector(new_width-1 downto 0);
variable result : std_logic_vector(new_width-1 downto 0);
begin
vec := inp;
if right_of_dp >= 0 then
if new_arith = xlUnsigned then
truncated_val := zero_ext(vec(old_width-1 downto right_of_dp),
new_width);
else
truncated_val := sign_ext(vec(old_width-1 downto right_of_dp),
new_width);
end if;
else
if new_arith = xlUnsigned then
truncated_val := zero_ext(pad_LSB(vec, old_width +
abs(right_of_dp)), new_width);
else
truncated_val := sign_ext(pad_LSB(vec, old_width +
abs(right_of_dp)), new_width);
end if;
end if;
one_or_zero := (others => '0');
if (new_arith = xlSigned) then
if (vec(old_width-1) = '0') then
one_or_zero(0) := '1';
end if;
if (right_of_dp >= 2) and (right_of_dp <= old_width) then
if (all_zeros(vec(right_of_dp-2 downto 0)) = false) then
one_or_zero(0) := '1';
end if;
end if;
if (right_of_dp >= 1) and (right_of_dp <= old_width) then
if vec(right_of_dp-1) = '0' then
one_or_zero(0) := '0';
end if;
else
one_or_zero(0) := '0';
end if;
else
if (right_of_dp >= 1) and (right_of_dp <= old_width) then
one_or_zero(0) := vec(right_of_dp-1);
end if;
end if;
if new_arith = xlSigned then
result := signed_to_std_logic_vector(std_logic_vector_to_signed(truncated_val) +
std_logic_vector_to_signed(one_or_zero));
else
result := unsigned_to_std_logic_vector(std_logic_vector_to_unsigned(truncated_val) +
std_logic_vector_to_unsigned(one_or_zero));
end if;
return result;
end;
function round_towards_even (inp : std_logic_vector; old_width, old_bin_pt,
old_arith, new_width, new_bin_pt, new_arith
: INTEGER)
return std_logic_vector
is
constant right_of_dp : integer := (old_bin_pt - new_bin_pt);
constant expected_new_width : integer := old_width - right_of_dp + 1;
variable vec : std_logic_vector(old_width-1 downto 0);
variable one_or_zero : std_logic_vector(new_width-1 downto 0);
variable truncated_val : std_logic_vector(new_width-1 downto 0);
variable result : std_logic_vector(new_width-1 downto 0);
begin
vec := inp;
if right_of_dp >= 0 then
if new_arith = xlUnsigned then
truncated_val := zero_ext(vec(old_width-1 downto right_of_dp),
new_width);
else
truncated_val := sign_ext(vec(old_width-1 downto right_of_dp),
new_width);
end if;
else
if new_arith = xlUnsigned then
truncated_val := zero_ext(pad_LSB(vec, old_width +
abs(right_of_dp)), new_width);
else
truncated_val := sign_ext(pad_LSB(vec, old_width +
abs(right_of_dp)), new_width);
end if;
end if;
one_or_zero := (others => '0');
if (right_of_dp >= 1) and (right_of_dp <= old_width) then
if (is_point_five(vec(right_of_dp-1 downto 0)) = false) then
one_or_zero(0) := vec(right_of_dp-1);
else
one_or_zero(0) := vec(right_of_dp);
end if;
end if;
if new_arith = xlSigned then
result := signed_to_std_logic_vector(std_logic_vector_to_signed(truncated_val) +
std_logic_vector_to_signed(one_or_zero));
else
result := unsigned_to_std_logic_vector(std_logic_vector_to_unsigned(truncated_val) +
std_logic_vector_to_unsigned(one_or_zero));
end if;
return result;
end;
function saturation_arith(inp: std_logic_vector; old_width, old_bin_pt,
old_arith, new_width, new_bin_pt, new_arith
: INTEGER)
return std_logic_vector
is
constant left_of_dp : integer := (old_width - old_bin_pt) -
(new_width - new_bin_pt);
variable vec : std_logic_vector(old_width-1 downto 0);
variable result : std_logic_vector(new_width-1 downto 0);
variable overflow : boolean;
begin
vec := inp;
overflow := true;
result := (others => '0');
if (new_width >= old_width) then
overflow := false;
end if;
if ((old_arith = xlSigned and new_arith = xlSigned) and (old_width > new_width)) then
if all_same(vec(old_width-1 downto new_width-1)) then
overflow := false;
end if;
end if;
if (old_arith = xlSigned and new_arith = xlUnsigned) then
if (old_width > new_width) then
if all_zeros(vec(old_width-1 downto new_width)) then
overflow := false;
end if;
else
if (old_width = new_width) then
if (vec(new_width-1) = '0') then
overflow := false;
end if;
end if;
end if;
end if;
if (old_arith = xlUnsigned and new_arith = xlUnsigned) then
if (old_width > new_width) then
if all_zeros(vec(old_width-1 downto new_width)) then
overflow := false;
end if;
else
if (old_width = new_width) then
overflow := false;
end if;
end if;
end if;
if ((old_arith = xlUnsigned and new_arith = xlSigned) and (old_width > new_width)) then
if all_same(vec(old_width-1 downto new_width-1)) then
overflow := false;
end if;
end if;
if overflow then
if new_arith = xlSigned then
if vec(old_width-1) = '0' then
result := max_signed(new_width);
else
result := min_signed(new_width);
end if;
else
if ((old_arith = xlSigned) and vec(old_width-1) = '1') then
result := (others => '0');
else
result := (others => '1');
end if;
end if;
else
if (old_arith = xlSigned) and (new_arith = xlUnsigned) then
if (vec(old_width-1) = '1') then
vec := (others => '0');
end if;
end if;
if new_width <= old_width then
result := vec(new_width-1 downto 0);
else
if new_arith = xlUnsigned then
result := zero_ext(vec, new_width);
else
result := sign_ext(vec, new_width);
end if;
end if;
end if;
return result;
end;
function wrap_arith(inp: std_logic_vector; old_width, old_bin_pt,
old_arith, new_width, new_bin_pt, new_arith : INTEGER)
return std_logic_vector
is
variable result : std_logic_vector(new_width-1 downto 0);
variable result_arith : integer;
begin
if (old_arith = xlSigned) and (new_arith = xlUnsigned) then
result_arith := xlSigned;
end if;
result := cast(inp, old_bin_pt, new_width, new_bin_pt, result_arith);
return result;
end;
function fractional_bits(a_bin_pt, b_bin_pt: INTEGER) return INTEGER is
begin
return max(a_bin_pt, b_bin_pt);
end;
function integer_bits(a_width, a_bin_pt, b_width, b_bin_pt: INTEGER)
return INTEGER is
begin
return max(a_width - a_bin_pt, b_width - b_bin_pt);
end;
function pad_LSB(inp : std_logic_vector; new_width: integer)
return STD_LOGIC_VECTOR
is
constant orig_width : integer := inp'length;
variable vec : std_logic_vector(orig_width-1 downto 0);
variable result : std_logic_vector(new_width-1 downto 0);
variable pos : integer;
constant pad_pos : integer := new_width - orig_width - 1;
begin
vec := inp;
pos := new_width-1;
if (new_width >= orig_width) then
for i in orig_width-1 downto 0 loop
result(pos) := vec(i);
pos := pos - 1;
end loop;
if pad_pos >= 0 then
for i in pad_pos downto 0 loop
result(i) := '0';
end loop;
end if;
end if;
return result;
end;
function sign_ext(inp : std_logic_vector; new_width : INTEGER)
return std_logic_vector
is
constant old_width : integer := inp'length;
variable vec : std_logic_vector(old_width-1 downto 0);
variable result : std_logic_vector(new_width-1 downto 0);
begin
vec := inp;
if new_width >= old_width then
result(old_width-1 downto 0) := vec;
if new_width-1 >= old_width then
for i in new_width-1 downto old_width loop
result(i) := vec(old_width-1);
end loop;
end if;
else
result(new_width-1 downto 0) := vec(new_width-1 downto 0);
end if;
return result;
end;
function zero_ext(inp : std_logic_vector; new_width : INTEGER)
return std_logic_vector
is
constant old_width : integer := inp'length;
variable vec : std_logic_vector(old_width-1 downto 0);
variable result : std_logic_vector(new_width-1 downto 0);
begin
vec := inp;
if new_width >= old_width then
result(old_width-1 downto 0) := vec;
if new_width-1 >= old_width then
for i in new_width-1 downto old_width loop
result(i) := '0';
end loop;
end if;
else
result(new_width-1 downto 0) := vec(new_width-1 downto 0);
end if;
return result;
end;
function zero_ext(inp : std_logic; new_width : INTEGER)
return std_logic_vector
is
variable result : std_logic_vector(new_width-1 downto 0);
begin
result(0) := inp;
for i in new_width-1 downto 1 loop
result(i) := '0';
end loop;
return result;
end;
function extend_MSB(inp : std_logic_vector; new_width, arith : INTEGER)
return std_logic_vector
is
constant orig_width : integer := inp'length;
variable vec : std_logic_vector(orig_width-1 downto 0);
variable result : std_logic_vector(new_width-1 downto 0);
begin
vec := inp;
if arith = xlUnsigned then
result := zero_ext(vec, new_width);
else
result := sign_ext(vec, new_width);
end if;
return result;
end;
function pad_LSB(inp : std_logic_vector; new_width, arith: integer)
return STD_LOGIC_VECTOR
is
constant orig_width : integer := inp'length;
variable vec : std_logic_vector(orig_width-1 downto 0);
variable result : std_logic_vector(new_width-1 downto 0);
variable pos : integer;
begin
vec := inp;
pos := new_width-1;
if (arith = xlUnsigned) then
result(pos) := '0';
pos := pos - 1;
else
result(pos) := vec(orig_width-1);
pos := pos - 1;
end if;
if (new_width >= orig_width) then
for i in orig_width-1 downto 0 loop
result(pos) := vec(i);
pos := pos - 1;
end loop;
if pos >= 0 then
for i in pos downto 0 loop
result(i) := '0';
end loop;
end if;
end if;
return result;
end;
function align_input(inp : std_logic_vector; old_width, delta, new_arith,
new_width: INTEGER)
return std_logic_vector
is
variable vec : std_logic_vector(old_width-1 downto 0);
variable padded_inp : std_logic_vector((old_width + delta)-1 downto 0);
variable result : std_logic_vector(new_width-1 downto 0);
begin
vec := inp;
if delta > 0 then
padded_inp := pad_LSB(vec, old_width+delta);
result := extend_MSB(padded_inp, new_width, new_arith);
else
result := extend_MSB(vec, new_width, new_arith);
end if;
return result;
end;
function max(L, R: INTEGER) return INTEGER is
begin
if L > R then
return L;
else
return R;
end if;
end;
function min(L, R: INTEGER) return INTEGER is
begin
if L < R then
return L;
else
return R;
end if;
end;
function "="(left,right: STRING) return boolean is
begin
if (left'length /= right'length) then
return false;
else
test : for i in 1 to left'length loop
if left(i) /= right(i) then
return false;
end if;
end loop test;
return true;
end if;
end;
-- synopsys translate_off
function is_binary_string_invalid (inp : string)
return boolean
is
variable vec : string(1 to inp'length);
variable result : boolean;
begin
vec := inp;
result := false;
for i in 1 to vec'length loop
if ( vec(i) = 'X' ) then
result := true;
end if;
end loop;
return result;
end;
function is_binary_string_undefined (inp : string)
return boolean
is
variable vec : string(1 to inp'length);
variable result : boolean;
begin
vec := inp;
result := false;
for i in 1 to vec'length loop
if ( vec(i) = 'U' ) then
result := true;
end if;
end loop;
return result;
end;
function is_XorU(inp : std_logic_vector)
return boolean
is
constant width : integer := inp'length;
variable vec : std_logic_vector(width-1 downto 0);
variable result : boolean;
begin
vec := inp;
result := false;
for i in 0 to width-1 loop
if (vec(i) = 'U') or (vec(i) = 'X') then
result := true;
end if;
end loop;
return result;
end;
function to_real(inp : std_logic_vector; bin_pt : integer; arith : integer)
return real
is
variable vec : std_logic_vector(inp'length-1 downto 0);
variable result, shift_val, undefined_real : real;
variable neg_num : boolean;
begin
vec := inp;
result := 0.0;
neg_num := false;
if vec(inp'length-1) = '1' then
neg_num := true;
end if;
for i in 0 to inp'length-1 loop
if vec(i) = 'U' or vec(i) = 'X' then
return undefined_real;
end if;
if arith = xlSigned then
if neg_num then
if vec(i) = '0' then
result := result + 2.0**i;
end if;
else
if vec(i) = '1' then
result := result + 2.0**i;
end if;
end if;
else
if vec(i) = '1' then
result := result + 2.0**i;
end if;
end if;
end loop;
if arith = xlSigned then
if neg_num then
result := result + 1.0;
result := result * (-1.0);
end if;
end if;
shift_val := 2.0**(-1*bin_pt);
result := result * shift_val;
return result;
end;
function std_logic_to_real(inp : std_logic; bin_pt : integer; arith : integer)
return real
is
variable result : real := 0.0;
begin
if inp = '1' then
result := 1.0;
end if;
if arith = xlSigned then
assert false
report "It doesn't make sense to convert a 1 bit number to a signed real.";
end if;
return result;
end;
-- synopsys translate_on
function integer_to_std_logic_vector (inp : integer; width, arith : integer)
return std_logic_vector
is
variable result : std_logic_vector(width-1 downto 0);
variable unsigned_val : unsigned(width-1 downto 0);
variable signed_val : signed(width-1 downto 0);
begin
if (arith = xlSigned) then
signed_val := to_signed(inp, width);
result := signed_to_std_logic_vector(signed_val);
else
unsigned_val := to_unsigned(inp, width);
result := unsigned_to_std_logic_vector(unsigned_val);
end if;
return result;
end;
function std_logic_vector_to_integer (inp : std_logic_vector; arith : integer)
return integer
is
constant width : integer := inp'length;
variable unsigned_val : unsigned(width-1 downto 0);
variable signed_val : signed(width-1 downto 0);
variable result : integer;
begin
if (arith = xlSigned) then
signed_val := std_logic_vector_to_signed(inp);
result := to_integer(signed_val);
else
unsigned_val := std_logic_vector_to_unsigned(inp);
result := to_integer(unsigned_val);
end if;
return result;
end;
function std_logic_to_integer(constant inp : std_logic := '0')
return integer
is
begin
if inp = '1' then
return 1;
else
return 0;
end if;
end;
function makeZeroBinStr (width : integer) return STRING is
variable result : string(1 to width+3);
begin
result(1) := '0';
result(2) := 'b';
for i in 3 to width+2 loop
result(i) := '0';
end loop;
result(width+3) := '.';
return result;
end;
-- synopsys translate_off
function real_string_to_std_logic_vector (inp : string; width, bin_pt, arith : integer)
return std_logic_vector
is
variable result : std_logic_vector(width-1 downto 0);
begin
result := (others => '0');
return result;
end;
function real_to_std_logic_vector (inp : real; width, bin_pt, arith : integer)
return std_logic_vector
is
variable real_val : real;
variable int_val : integer;
variable result : std_logic_vector(width-1 downto 0) := (others => '0');
variable unsigned_val : unsigned(width-1 downto 0) := (others => '0');
variable signed_val : signed(width-1 downto 0) := (others => '0');
begin
real_val := inp;
int_val := integer(real_val * 2.0**(bin_pt));
if (arith = xlSigned) then
signed_val := to_signed(int_val, width);
result := signed_to_std_logic_vector(signed_val);
else
unsigned_val := to_unsigned(int_val, width);
result := unsigned_to_std_logic_vector(unsigned_val);
end if;
return result;
end;
-- synopsys translate_on
function valid_bin_string (inp : string)
return boolean
is
variable vec : string(1 to inp'length);
begin
vec := inp;
if (vec(1) = '0' and vec(2) = 'b') then
return true;
else
return false;
end if;
end;
function hex_string_to_std_logic_vector(inp: string; width : integer)
return std_logic_vector is
constant strlen : integer := inp'LENGTH;
variable result : std_logic_vector(width-1 downto 0);
variable bitval : std_logic_vector((strlen*4)-1 downto 0);
variable posn : integer;
variable ch : character;
variable vec : string(1 to strlen);
begin
vec := inp;
result := (others => '0');
posn := (strlen*4)-1;
for i in 1 to strlen loop
ch := vec(i);
case ch is
when '0' => bitval(posn downto posn-3) := "0000";
when '1' => bitval(posn downto posn-3) := "0001";
when '2' => bitval(posn downto posn-3) := "0010";
when '3' => bitval(posn downto posn-3) := "0011";
when '4' => bitval(posn downto posn-3) := "0100";
when '5' => bitval(posn downto posn-3) := "0101";
when '6' => bitval(posn downto posn-3) := "0110";
when '7' => bitval(posn downto posn-3) := "0111";
when '8' => bitval(posn downto posn-3) := "1000";
when '9' => bitval(posn downto posn-3) := "1001";
when 'A' | 'a' => bitval(posn downto posn-3) := "1010";
when 'B' | 'b' => bitval(posn downto posn-3) := "1011";
when 'C' | 'c' => bitval(posn downto posn-3) := "1100";
when 'D' | 'd' => bitval(posn downto posn-3) := "1101";
when 'E' | 'e' => bitval(posn downto posn-3) := "1110";
when 'F' | 'f' => bitval(posn downto posn-3) := "1111";
when others => bitval(posn downto posn-3) := "XXXX";
-- synopsys translate_off
ASSERT false
REPORT "Invalid hex value" SEVERITY ERROR;
-- synopsys translate_on
end case;
posn := posn - 4;
end loop;
if (width <= strlen*4) then
result := bitval(width-1 downto 0);
else
result((strlen*4)-1 downto 0) := bitval;
end if;
return result;
end;
function bin_string_to_std_logic_vector (inp : string)
return std_logic_vector
is
variable pos : integer;
variable vec : string(1 to inp'length);
variable result : std_logic_vector(inp'length-1 downto 0);
begin
vec := inp;
pos := inp'length-1;
result := (others => '0');
for i in 1 to vec'length loop
-- synopsys translate_off
if (pos < 0) and (vec(i) = '0' or vec(i) = '1' or vec(i) = 'X' or vec(i) = 'U') then
assert false
report "Input string is larger than output std_logic_vector. Truncating output.";
return result;
end if;
-- synopsys translate_on
if vec(i) = '0' then
result(pos) := '0';
pos := pos - 1;
end if;
if vec(i) = '1' then
result(pos) := '1';
pos := pos - 1;
end if;
-- synopsys translate_off
if (vec(i) = 'X' or vec(i) = 'U') then
result(pos) := 'U';
pos := pos - 1;
end if;
-- synopsys translate_on
end loop;
return result;
end;
function bin_string_element_to_std_logic_vector (inp : string; width, index : integer)
return std_logic_vector
is
constant str_width : integer := width + 4;
constant inp_len : integer := inp'length;
constant num_elements : integer := (inp_len + 1)/str_width;
constant reverse_index : integer := (num_elements-1) - index;
variable left_pos : integer;
variable right_pos : integer;
variable vec : string(1 to inp'length);
variable result : std_logic_vector(width-1 downto 0);
begin
vec := inp;
result := (others => '0');
if (reverse_index = 0) and (reverse_index < num_elements) and (inp_len-3 >= width) then
left_pos := 1;
right_pos := width + 3;
result := bin_string_to_std_logic_vector(vec(left_pos to right_pos));
end if;
if (reverse_index > 0) and (reverse_index < num_elements) and (inp_len-3 >= width) then
left_pos := (reverse_index * str_width) + 1;
right_pos := left_pos + width + 2;
result := bin_string_to_std_logic_vector(vec(left_pos to right_pos));
end if;
return result;
end;
-- synopsys translate_off
function std_logic_vector_to_bin_string(inp : std_logic_vector)
return string
is
variable vec : std_logic_vector(1 to inp'length);
variable result : string(vec'range);
begin
vec := inp;
for i in vec'range loop
result(i) := to_char(vec(i));
end loop;
return result;
end;
function std_logic_to_bin_string(inp : std_logic)
return string
is
variable result : string(1 to 3);
begin
result(1) := '0';
result(2) := 'b';
result(3) := to_char(inp);
return result;
end;
function std_logic_vector_to_bin_string_w_point(inp : std_logic_vector; bin_pt : integer)
return string
is
variable width : integer := inp'length;
variable vec : std_logic_vector(width-1 downto 0);
variable str_pos : integer;
variable result : string(1 to width+3);
begin
vec := inp;
str_pos := 1;
result(str_pos) := '0';
str_pos := 2;
result(str_pos) := 'b';
str_pos := 3;
for i in width-1 downto 0 loop
if (((width+3) - bin_pt) = str_pos) then
result(str_pos) := '.';
str_pos := str_pos + 1;
end if;
result(str_pos) := to_char(vec(i));
str_pos := str_pos + 1;
end loop;
if (bin_pt = 0) then
result(str_pos) := '.';
end if;
return result;
end;
function real_to_bin_string(inp : real; width, bin_pt, arith : integer)
return string
is
variable result : string(1 to width);
variable vec : std_logic_vector(width-1 downto 0);
begin
vec := real_to_std_logic_vector(inp, width, bin_pt, arith);
result := std_logic_vector_to_bin_string(vec);
return result;
end;
function real_to_string (inp : real) return string
is
variable result : string(1 to display_precision) := (others => ' ');
begin
result(real'image(inp)'range) := real'image(inp);
return result;
end;
-- synopsys translate_on
end conv_pkg;
-------------------------------------------------------------------
-- System Generator version 13.4 VHDL source file.
--
-- Copyright(C) 2011 by Xilinx, Inc. All rights reserved. This
-- text/file contains proprietary, confidential information of Xilinx,
-- Inc., is distributed under license from Xilinx, Inc., and may be used,
-- copied and/or disclosed only pursuant to the terms of a valid license
-- agreement with Xilinx, Inc. Xilinx hereby grants you a license to use
-- this text/file solely for design, simulation, implementation and
-- creation of design files limited to Xilinx devices or technologies.
-- Use with non-Xilinx devices or technologies is expressly prohibited
-- and immediately terminates your license unless covered by a separate
-- agreement.
--
-- Xilinx is providing this design, code, or information "as is" solely
-- for use in developing programs and solutions for Xilinx devices. By
-- providing this design, code, or information as one possible
-- implementation of this feature, application or standard, Xilinx is
-- making no representation that this implementation is free from any
-- claims of infringement. You are responsible for obtaining any rights
-- you may require for your implementation. Xilinx expressly disclaims
-- any warranty whatsoever with respect to the adequacy of the
-- implementation, including but not limited to warranties of
-- merchantability or fitness for a particular purpose.
--
-- Xilinx products are not intended for use in life support appliances,
-- devices, or systems. Use in such applications is expressly prohibited.
--
-- Any modifications that are made to the source code are done at the user's
-- sole risk and will be unsupported.
--
-- This copyright and support notice must be retained as part of this
-- text at all times. (c) Copyright 1995-2011 Xilinx, Inc. All rights
-- reserved.
-------------------------------------------------------------------
-- synopsys translate_off
library unisim;
use unisim.vcomponents.all;
-- synopsys translate_on
library IEEE;
use IEEE.std_logic_1164.all;
use work.conv_pkg.all;
entity srl17e is
generic (width : integer:=16;
latency : integer :=8);
port (clk : in std_logic;
ce : in std_logic;
d : in std_logic_vector(width-1 downto 0);
q : out std_logic_vector(width-1 downto 0));
end srl17e;
architecture structural of srl17e is
component SRL16E
port (D : in STD_ULOGIC;
CE : in STD_ULOGIC;
CLK : in STD_ULOGIC;
A0 : in STD_ULOGIC;
A1 : in STD_ULOGIC;
A2 : in STD_ULOGIC;
A3 : in STD_ULOGIC;
Q : out STD_ULOGIC);
end component;
attribute syn_black_box of SRL16E : component is true;
attribute fpga_dont_touch of SRL16E : component is "true";
component FDE
port(
Q : out STD_ULOGIC;
D : in STD_ULOGIC;
C : in STD_ULOGIC;
CE : in STD_ULOGIC);
end component;
attribute syn_black_box of FDE : component is true;
attribute fpga_dont_touch of FDE : component is "true";
constant a : std_logic_vector(4 downto 0) :=
integer_to_std_logic_vector(latency-2,5,xlSigned);
signal d_delayed : std_logic_vector(width-1 downto 0);
signal srl16_out : std_logic_vector(width-1 downto 0);
begin
d_delayed <= d after 200 ps;
reg_array : for i in 0 to width-1 generate
srl16_used: if latency > 1 generate
u1 : srl16e port map(clk => clk,
d => d_delayed(i),
q => srl16_out(i),
ce => ce,
a0 => a(0),
a1 => a(1),
a2 => a(2),
a3 => a(3));
end generate;
srl16_not_used: if latency <= 1 generate
srl16_out(i) <= d_delayed(i);
end generate;
fde_used: if latency /= 0 generate
u2 : fde port map(c => clk,
d => srl16_out(i),
q => q(i),
ce => ce);
end generate;
fde_not_used: if latency = 0 generate
q(i) <= srl16_out(i);
end generate;
end generate;
end structural;
library IEEE;
use IEEE.std_logic_1164.all;
use work.conv_pkg.all;
entity synth_reg is
generic (width : integer := 8;
latency : integer := 1);
port (i : in std_logic_vector(width-1 downto 0);
ce : in std_logic;
clr : in std_logic;
clk : in std_logic;
o : out std_logic_vector(width-1 downto 0));
end synth_reg;
architecture structural of synth_reg is
component srl17e
generic (width : integer:=16;
latency : integer :=8);
port (clk : in std_logic;
ce : in std_logic;
d : in std_logic_vector(width-1 downto 0);
q : out std_logic_vector(width-1 downto 0));
end component;
function calc_num_srl17es (latency : integer)
return integer
is
variable remaining_latency : integer;
variable result : integer;
begin
result := latency / 17;
remaining_latency := latency - (result * 17);
if (remaining_latency /= 0) then
result := result + 1;
end if;
return result;
end;
constant complete_num_srl17es : integer := latency / 17;
constant num_srl17es : integer := calc_num_srl17es(latency);
constant remaining_latency : integer := latency - (complete_num_srl17es * 17);
type register_array is array (num_srl17es downto 0) of
std_logic_vector(width-1 downto 0);
signal z : register_array;
begin
z(0) <= i;
complete_ones : if complete_num_srl17es > 0 generate
srl17e_array: for i in 0 to complete_num_srl17es-1 generate
delay_comp : srl17e
generic map (width => width,
latency => 17)
port map (clk => clk,
ce => ce,
d => z(i),
q => z(i+1));
end generate;
end generate;
partial_one : if remaining_latency > 0 generate
last_srl17e : srl17e
generic map (width => width,
latency => remaining_latency)
port map (clk => clk,
ce => ce,
d => z(num_srl17es-1),
q => z(num_srl17es));
end generate;
o <= z(num_srl17es);
end structural;
library IEEE;
use IEEE.std_logic_1164.all;
use work.conv_pkg.all;
entity synth_reg_reg is
generic (width : integer := 8;
latency : integer := 1);
port (i : in std_logic_vector(width-1 downto 0);
ce : in std_logic;
clr : in std_logic;
clk : in std_logic;
o : out std_logic_vector(width-1 downto 0));
end synth_reg_reg;
architecture behav of synth_reg_reg is
type reg_array_type is array (latency-1 downto 0) of std_logic_vector(width -1 downto 0);
signal reg_bank : reg_array_type := (others => (others => '0'));
signal reg_bank_in : reg_array_type := (others => (others => '0'));
attribute syn_allow_retiming : boolean;
attribute syn_srlstyle : string;
attribute syn_allow_retiming of reg_bank : signal is true;
attribute syn_allow_retiming of reg_bank_in : signal is true;
attribute syn_srlstyle of reg_bank : signal is "registers";
attribute syn_srlstyle of reg_bank_in : signal is "registers";
begin
latency_eq_0: if latency = 0 generate
o <= i;
end generate latency_eq_0;
latency_gt_0: if latency >= 1 generate
o <= reg_bank(latency-1);
reg_bank_in(0) <= i;
loop_gen: for idx in latency-2 downto 0 generate
reg_bank_in(idx+1) <= reg_bank(idx);
end generate loop_gen;
sync_loop: for sync_idx in latency-1 downto 0 generate
sync_proc: process (clk)
begin
if clk'event and clk = '1' then
if clr = '1' then
reg_bank_in <= (others => (others => '0'));
elsif ce = '1' then
reg_bank(sync_idx) <= reg_bank_in(sync_idx);
end if;
end if;
end process sync_proc;
end generate sync_loop;
end generate latency_gt_0;
end behav;
-------------------------------------------------------------------
-- System Generator version 13.4 VHDL source file.
--
-- Copyright(C) 2011 by Xilinx, Inc. All rights reserved. This
-- text/file contains proprietary, confidential information of Xilinx,
-- Inc., is distributed under license from Xilinx, Inc., and may be used,
-- copied and/or disclosed only pursuant to the terms of a valid license
-- agreement with Xilinx, Inc. Xilinx hereby grants you a license to use
-- this text/file solely for design, simulation, implementation and
-- creation of design files limited to Xilinx devices or technologies.
-- Use with non-Xilinx devices or technologies is expressly prohibited
-- and immediately terminates your license unless covered by a separate
-- agreement.
--
-- Xilinx is providing this design, code, or information "as is" solely
-- for use in developing programs and solutions for Xilinx devices. By
-- providing this design, code, or information as one possible
-- implementation of this feature, application or standard, Xilinx is
-- making no representation that this implementation is free from any
-- claims of infringement. You are responsible for obtaining any rights
-- you may require for your implementation. Xilinx expressly disclaims
-- any warranty whatsoever with respect to the adequacy of the
-- implementation, including but not limited to warranties of
-- merchantability or fitness for a particular purpose.
--
-- Xilinx products are not intended for use in life support appliances,
-- devices, or systems. Use in such applications is expressly prohibited.
--
-- Any modifications that are made to the source code are done at the user's
-- sole risk and will be unsupported.
--
-- This copyright and support notice must be retained as part of this
-- text at all times. (c) Copyright 1995-2011 Xilinx, Inc. All rights
-- reserved.
-------------------------------------------------------------------
-- synopsys translate_off
library unisim;
use unisim.vcomponents.all;
-- synopsys translate_on
library IEEE;
use IEEE.std_logic_1164.all;
use work.conv_pkg.all;
entity single_reg_w_init is
generic (
width: integer := 8;
init_index: integer := 0;
init_value: bit_vector := b"0000"
);
port (
i: in std_logic_vector(width - 1 downto 0);
ce: in std_logic;
clr: in std_logic;
clk: in std_logic;
o: out std_logic_vector(width - 1 downto 0)
);
end single_reg_w_init;
architecture structural of single_reg_w_init is
function build_init_const(width: integer;
init_index: integer;
init_value: bit_vector)
return std_logic_vector
is
variable result: std_logic_vector(width - 1 downto 0);
begin
if init_index = 0 then
result := (others => '0');
elsif init_index = 1 then
result := (others => '0');
result(0) := '1';
else
result := to_stdlogicvector(init_value);
end if;
return result;
end;
component fdre
port (
q: out std_ulogic;
d: in std_ulogic;
c: in std_ulogic;
ce: in std_ulogic;
r: in std_ulogic
);
end component;
attribute syn_black_box of fdre: component is true;
attribute fpga_dont_touch of fdre: component is "true";
component fdse
port (
q: out std_ulogic;
d: in std_ulogic;
c: in std_ulogic;
ce: in std_ulogic;
s: in std_ulogic
);
end component;
attribute syn_black_box of fdse: component is true;
attribute fpga_dont_touch of fdse: component is "true";
constant init_const: std_logic_vector(width - 1 downto 0)
:= build_init_const(width, init_index, init_value);
begin
fd_prim_array: for index in 0 to width - 1 generate
bit_is_0: if (init_const(index) = '0') generate
fdre_comp: fdre
port map (
c => clk,
d => i(index),
q => o(index),
ce => ce,
r => clr
);
end generate;
bit_is_1: if (init_const(index) = '1') generate
fdse_comp: fdse
port map (
c => clk,
d => i(index),
q => o(index),
ce => ce,
s => clr
);
end generate;
end generate;
end architecture structural;
-- synopsys translate_off
library unisim;
use unisim.vcomponents.all;
-- synopsys translate_on
library IEEE;
use IEEE.std_logic_1164.all;
use work.conv_pkg.all;
entity synth_reg_w_init is
generic (
width: integer := 8;
init_index: integer := 0;
init_value: bit_vector := b"0000";
latency: integer := 1
);
port (
i: in std_logic_vector(width - 1 downto 0);
ce: in std_logic;
clr: in std_logic;
clk: in std_logic;
o: out std_logic_vector(width - 1 downto 0)
);
end synth_reg_w_init;
architecture structural of synth_reg_w_init is
component single_reg_w_init
generic (
width: integer := 8;
init_index: integer := 0;
init_value: bit_vector := b"0000"
);
port (
i: in std_logic_vector(width - 1 downto 0);
ce: in std_logic;
clr: in std_logic;
clk: in std_logic;
o: out std_logic_vector(width - 1 downto 0)
);
end component;
signal dly_i: std_logic_vector((latency + 1) * width - 1 downto 0);
signal dly_clr: std_logic;
begin
latency_eq_0: if (latency = 0) generate
o <= i;
end generate;
latency_gt_0: if (latency >= 1) generate
dly_i((latency + 1) * width - 1 downto latency * width) <= i
after 200 ps;
dly_clr <= clr after 200 ps;
fd_array: for index in latency downto 1 generate
reg_comp: single_reg_w_init
generic map (
width => width,
init_index => init_index,
init_value => init_value
)
port map (
clk => clk,
i => dly_i((index + 1) * width - 1 downto index * width),
o => dly_i(index * width - 1 downto (index - 1) * width),
ce => ce,
clr => dly_clr
);
end generate;
o <= dly_i(width - 1 downto 0);
end generate;
end structural;
-------------------------------------------------------------------
-- System Generator version 13.4 VHDL source file.
--
-- Copyright(C) 2011 by Xilinx, Inc. All rights reserved. This
-- text/file contains proprietary, confidential information of Xilinx,
-- Inc., is distributed under license from Xilinx, Inc., and may be used,
-- copied and/or disclosed only pursuant to the terms of a valid license
-- agreement with Xilinx, Inc. Xilinx hereby grants you a license to use
-- this text/file solely for design, simulation, implementation and
-- creation of design files limited to Xilinx devices or technologies.
-- Use with non-Xilinx devices or technologies is expressly prohibited
-- and immediately terminates your license unless covered by a separate
-- agreement.
--
-- Xilinx is providing this design, code, or information "as is" solely
-- for use in developing programs and solutions for Xilinx devices. By
-- providing this design, code, or information as one possible
-- implementation of this feature, application or standard, Xilinx is
-- making no representation that this implementation is free from any
-- claims of infringement. You are responsible for obtaining any rights
-- you may require for your implementation. Xilinx expressly disclaims
-- any warranty whatsoever with respect to the adequacy of the
-- implementation, including but not limited to warranties of
-- merchantability or fitness for a particular purpose.
--
-- Xilinx products are not intended for use in life support appliances,
-- devices, or systems. Use in such applications is expressly prohibited.
--
-- Any modifications that are made to the source code are done at the user's
-- sole risk and will be unsupported.
--
-- This copyright and support notice must be retained as part of this
-- text at all times. (c) Copyright 1995-2011 Xilinx, Inc. All rights
-- reserved.
-------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
-- synopsys translate_off
library unisim;
use unisim.vcomponents.all;
-- synopsys translate_on
entity xlclockenablegenerator is
generic (
period: integer := 2;
log_2_period: integer := 0;
pipeline_regs: integer := 5
);
port (
clk: in std_logic;
clr: in std_logic;
ce: out std_logic
);
end xlclockenablegenerator;
architecture behavior of xlclockenablegenerator is
component synth_reg_w_init
generic (
width: integer;
init_index: integer;
init_value: bit_vector;
latency: integer
);
port (
i: in std_logic_vector(width - 1 downto 0);
ce: in std_logic;
clr: in std_logic;
clk: in std_logic;
o: out std_logic_vector(width - 1 downto 0)
);
end component;
function size_of_uint(inp: integer; power_of_2: boolean)
return integer
is
constant inp_vec: std_logic_vector(31 downto 0) :=
integer_to_std_logic_vector(inp,32, xlUnsigned);
variable result: integer;
begin
result := 32;
for i in 0 to 31 loop
if inp_vec(i) = '1' then
result := i;
end if;
end loop;
if power_of_2 then
return result;
else
return result+1;
end if;
end;
function is_power_of_2(inp: std_logic_vector)
return boolean
is
constant width: integer := inp'length;
variable vec: std_logic_vector(width - 1 downto 0);
variable single_bit_set: boolean;
variable more_than_one_bit_set: boolean;
variable result: boolean;
begin
vec := inp;
single_bit_set := false;
more_than_one_bit_set := false;
-- synopsys translate_off
if (is_XorU(vec)) then
return false;
end if;
-- synopsys translate_on
if width > 0 then
for i in 0 to width - 1 loop
if vec(i) = '1' then
if single_bit_set then
more_than_one_bit_set := true;
end if;
single_bit_set := true;
end if;
end loop;
end if;
if (single_bit_set and not(more_than_one_bit_set)) then
result := true;
else
result := false;
end if;
return result;
end;
function ce_reg_init_val(index, period : integer)
return integer
is
variable result: integer;
begin
result := 0;
if ((index mod period) = 0) then
result := 1;
end if;
return result;
end;
function remaining_pipe_regs(num_pipeline_regs, period : integer)
return integer
is
variable factor, result: integer;
begin
factor := (num_pipeline_regs / period);
result := num_pipeline_regs - (period * factor) + 1;
return result;
end;
function sg_min(L, R: INTEGER) return INTEGER is
begin
if L < R then
return L;
else
return R;
end if;
end;
constant max_pipeline_regs : integer := 8;
constant pipe_regs : integer := 5;
constant num_pipeline_regs : integer := sg_min(pipeline_regs, max_pipeline_regs);
constant rem_pipeline_regs : integer := remaining_pipe_regs(num_pipeline_regs,period);
constant period_floor: integer := max(2, period);
constant power_of_2_counter: boolean :=
is_power_of_2(integer_to_std_logic_vector(period_floor,32, xlUnsigned));
constant cnt_width: integer :=
size_of_uint(period_floor, power_of_2_counter);
constant clk_for_ce_pulse_minus1: std_logic_vector(cnt_width - 1 downto 0) :=
integer_to_std_logic_vector((period_floor - 2),cnt_width, xlUnsigned);
constant clk_for_ce_pulse_minus2: std_logic_vector(cnt_width - 1 downto 0) :=
integer_to_std_logic_vector(max(0,period - 3),cnt_width, xlUnsigned);
constant clk_for_ce_pulse_minus_regs: std_logic_vector(cnt_width - 1 downto 0) :=
integer_to_std_logic_vector(max(0,period - rem_pipeline_regs),cnt_width, xlUnsigned);
signal clk_num: unsigned(cnt_width - 1 downto 0) := (others => '0');
signal ce_vec : std_logic_vector(num_pipeline_regs downto 0);
signal internal_ce: std_logic_vector(0 downto 0);
signal cnt_clr, cnt_clr_dly: std_logic_vector (0 downto 0);
begin
cntr_gen: process(clk)
begin
if clk'event and clk = '1' then
if ((cnt_clr_dly(0) = '1') or (clr = '1')) then
clk_num <= (others => '0');
else
clk_num <= clk_num + 1;
end if;
end if;
end process;
clr_gen: process(clk_num, clr)
begin
if power_of_2_counter then
cnt_clr(0) <= clr;
else
if (unsigned_to_std_logic_vector(clk_num) = clk_for_ce_pulse_minus1
or clr = '1') then
cnt_clr(0) <= '1';
else
cnt_clr(0) <= '0';
end if;
end if;
end process;
clr_reg: synth_reg_w_init
generic map (
width => 1,
init_index => 0,
init_value => b"0000",
latency => 1
)
port map (
i => cnt_clr,
ce => '1',
clr => clr,
clk => clk,
o => cnt_clr_dly
);
pipelined_ce : if period > 1 generate
ce_gen: process(clk_num)
begin
if unsigned_to_std_logic_vector(clk_num) = clk_for_ce_pulse_minus_regs then
ce_vec(num_pipeline_regs) <= '1';
else
ce_vec(num_pipeline_regs) <= '0';
end if;
end process;
ce_pipeline: for index in num_pipeline_regs downto 1 generate
ce_reg : synth_reg_w_init
generic map (
width => 1,
init_index => ce_reg_init_val(index, period),
init_value => b"0000",
latency => 1
)
port map (
i => ce_vec(index downto index),
ce => '1',
clr => clr,
clk => clk,
o => ce_vec(index-1 downto index-1)
);
end generate;
internal_ce <= ce_vec(0 downto 0);
end generate;
generate_clock_enable: if period > 1 generate
ce <= internal_ce(0);
end generate;
generate_clock_enable_constant: if period = 1 generate
ce <= '1';
end generate;
end architecture behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity concat_cd3162dc0d is
port (
in0 : in std_logic_vector((16 - 1) downto 0);
in1 : in std_logic_vector((8 - 1) downto 0);
y : out std_logic_vector((24 - 1) downto 0);
clk : in std_logic;
ce : in std_logic;
clr : in std_logic);
end concat_cd3162dc0d;
architecture behavior of concat_cd3162dc0d is
signal in0_1_23: unsigned((16 - 1) downto 0);
signal in1_1_27: unsigned((8 - 1) downto 0);
signal y_2_1_concat: unsigned((24 - 1) downto 0);
begin
in0_1_23 <= std_logic_vector_to_unsigned(in0);
in1_1_27 <= std_logic_vector_to_unsigned(in1);
y_2_1_concat <= std_logic_vector_to_unsigned(unsigned_to_std_logic_vector(in0_1_23) & unsigned_to_std_logic_vector(in1_1_27));
y <= unsigned_to_std_logic_vector(y_2_1_concat);
end behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity constant_91ef1678ca is
port (
op : out std_logic_vector((8 - 1) downto 0);
clk : in std_logic;
ce : in std_logic;
clr : in std_logic);
end constant_91ef1678ca;
architecture behavior of constant_91ef1678ca is
begin
op <= "00000000";
end behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity reinterpret_7025463ea8 is
port (
input_port : in std_logic_vector((16 - 1) downto 0);
output_port : out std_logic_vector((16 - 1) downto 0);
clk : in std_logic;
ce : in std_logic;
clr : in std_logic);
end reinterpret_7025463ea8;
architecture behavior of reinterpret_7025463ea8 is
signal input_port_1_40: signed((16 - 1) downto 0);
signal output_port_5_5_force: unsigned((16 - 1) downto 0);
begin
input_port_1_40 <= std_logic_vector_to_signed(input_port);
output_port_5_5_force <= signed_to_unsigned(input_port_1_40);
output_port <= unsigned_to_std_logic_vector(output_port_5_5_force);
end behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity reinterpret_f21e7f2ddf is
port (
input_port : in std_logic_vector((8 - 1) downto 0);
output_port : out std_logic_vector((8 - 1) downto 0);
clk : in std_logic;
ce : in std_logic;
clr : in std_logic);
end reinterpret_f21e7f2ddf;
architecture behavior of reinterpret_f21e7f2ddf is
signal input_port_1_40: unsigned((8 - 1) downto 0);
begin
input_port_1_40 <= std_logic_vector_to_unsigned(input_port);
output_port <= unsigned_to_std_logic_vector(input_port_1_40);
end behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity reinterpret_4bf1ad328a is
port (
input_port : in std_logic_vector((24 - 1) downto 0);
output_port : out std_logic_vector((24 - 1) downto 0);
clk : in std_logic;
ce : in std_logic;
clr : in std_logic);
end reinterpret_4bf1ad328a;
architecture behavior of reinterpret_4bf1ad328a is
signal input_port_1_40: unsigned((24 - 1) downto 0);
signal output_port_5_5_force: signed((24 - 1) downto 0);
begin
input_port_1_40 <= std_logic_vector_to_unsigned(input_port);
output_port_5_5_force <= unsigned_to_signed(input_port_1_40);
output_port <= signed_to_std_logic_vector(output_port_5_5_force);
end behavior;
-------------------------------------------------------------------
-- System Generator version 13.4 VHDL source file.
--
-- Copyright(C) 2011 by Xilinx, Inc. All rights reserved. This
-- text/file contains proprietary, confidential information of Xilinx,
-- Inc., is distributed under license from Xilinx, Inc., and may be used,
-- copied and/or disclosed only pursuant to the terms of a valid license
-- agreement with Xilinx, Inc. Xilinx hereby grants you a license to use
-- this text/file solely for design, simulation, implementation and
-- creation of design files limited to Xilinx devices or technologies.
-- Use with non-Xilinx devices or technologies is expressly prohibited
-- and immediately terminates your license unless covered by a separate
-- agreement.
--
-- Xilinx is providing this design, code, or information "as is" solely
-- for use in developing programs and solutions for Xilinx devices. By
-- providing this design, code, or information as one possible
-- implementation of this feature, application or standard, Xilinx is
-- making no representation that this implementation is free from any
-- claims of infringement. You are responsible for obtaining any rights
-- you may require for your implementation. Xilinx expressly disclaims
-- any warranty whatsoever with respect to the adequacy of the
-- implementation, including but not limited to warranties of
-- merchantability or fitness for a particular purpose.
--
-- Xilinx products are not intended for use in life support appliances,
-- devices, or systems. Use in such applications is expressly prohibited.
--
-- Any modifications that are made to the source code are done at the user's
-- sole risk and will be unsupported.
--
-- This copyright and support notice must be retained as part of this
-- text at all times. (c) Copyright 1995-2011 Xilinx, Inc. All rights
-- reserved.
-------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use work.conv_pkg.all;
-- synopsys translate_off
library unisim;
use unisim.vcomponents.all;
-- synopsys translate_on
entity xlceprobe is
generic (d_width : integer := 8;
q_width : integer := 1);
port (d : in std_logic_vector (d_width-1 downto 0);
ce : in std_logic;
clk : in std_logic;
q : out std_logic_vector (q_width-1 downto 0));
end xlceprobe;
architecture behavior of xlceprobe is
component BUF
port(
O : out STD_ULOGIC;
I : in STD_ULOGIC);
end component;
attribute syn_black_box of BUF : component is true;
attribute fpga_dont_touch of BUF : component is "true";
signal ce_vec : std_logic_vector(0 downto 0);
begin
buf_comp : buf port map(i => ce, o => ce_vec(0));
q <= ce_vec;
end architecture behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity mux_a2121d82da is
port (
sel : in std_logic_vector((1 - 1) downto 0);
d0 : in std_logic_vector((24 - 1) downto 0);
d1 : in std_logic_vector((24 - 1) downto 0);
y : out std_logic_vector((24 - 1) downto 0);
clk : in std_logic;
ce : in std_logic;
clr : in std_logic);
end mux_a2121d82da;
architecture behavior of mux_a2121d82da is
signal sel_1_20: std_logic_vector((1 - 1) downto 0);
signal d0_1_24: std_logic_vector((24 - 1) downto 0);
signal d1_1_27: std_logic_vector((24 - 1) downto 0);
signal unregy_join_6_1: std_logic_vector((24 - 1) downto 0);
begin
sel_1_20 <= sel;
d0_1_24 <= d0;
d1_1_27 <= d1;
proc_switch_6_1: process (d0_1_24, d1_1_27, sel_1_20)
is
begin
case sel_1_20 is
when "0" =>
unregy_join_6_1 <= d0_1_24;
when others =>
unregy_join_6_1 <= d1_1_27;
end case;
end process proc_switch_6_1;
y <= unregy_join_6_1;
end behavior;
-------------------------------------------------------------------
-- System Generator version 13.4 VHDL source file.
--
-- Copyright(C) 2011 by Xilinx, Inc. All rights reserved. This
-- text/file contains proprietary, confidential information of Xilinx,
-- Inc., is distributed under license from Xilinx, Inc., and may be used,
-- copied and/or disclosed only pursuant to the terms of a valid license
-- agreement with Xilinx, Inc. Xilinx hereby grants you a license to use
-- this text/file solely for design, simulation, implementation and
-- creation of design files limited to Xilinx devices or technologies.
-- Use with non-Xilinx devices or technologies is expressly prohibited
-- and immediately terminates your license unless covered by a separate
-- agreement.
--
-- Xilinx is providing this design, code, or information "as is" solely
-- for use in developing programs and solutions for Xilinx devices. By
-- providing this design, code, or information as one possible
-- implementation of this feature, application or standard, Xilinx is
-- making no representation that this implementation is free from any
-- claims of infringement. You are responsible for obtaining any rights
-- you may require for your implementation. Xilinx expressly disclaims
-- any warranty whatsoever with respect to the adequacy of the
-- implementation, including but not limited to warranties of
-- merchantability or fitness for a particular purpose.
--
-- Xilinx products are not intended for use in life support appliances,
-- devices, or systems. Use in such applications is expressly prohibited.
--
-- Any modifications that are made to the source code are done at the user's
-- sole risk and will be unsupported.
--
-- This copyright and support notice must be retained as part of this
-- text at all times. (c) Copyright 1995-2011 Xilinx, Inc. All rights
-- reserved.
-------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use work.conv_pkg.all;
entity xlregister is
generic (d_width : integer := 5;
init_value : bit_vector := b"00");
port (d : in std_logic_vector (d_width-1 downto 0);
rst : in std_logic_vector(0 downto 0) := "0";
en : in std_logic_vector(0 downto 0) := "1";
ce : in std_logic;
clk : in std_logic;
q : out std_logic_vector (d_width-1 downto 0));
end xlregister;
architecture behavior of xlregister is
component synth_reg_w_init
generic (width : integer;
init_index : integer;
init_value : bit_vector;
latency : integer);
port (i : in std_logic_vector(width-1 downto 0);
ce : in std_logic;
clr : in std_logic;
clk : in std_logic;
o : out std_logic_vector(width-1 downto 0));
end component;
-- synopsys translate_off
signal real_d, real_q : real;
-- synopsys translate_on
signal internal_clr : std_logic;
signal internal_ce : std_logic;
begin
internal_clr <= rst(0) and ce;
internal_ce <= en(0) and ce;
synth_reg_inst : synth_reg_w_init
generic map (width => d_width,
init_index => 2,
init_value => init_value,
latency => 1)
port map (i => d,
ce => internal_ce,
clr => internal_clr,
clk => clk,
o => q);
end architecture behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity counter_41314d726b is
port (
rst : in std_logic_vector((1 - 1) downto 0);
en : in std_logic_vector((1 - 1) downto 0);
op : out std_logic_vector((1 - 1) downto 0);
clk : in std_logic;
ce : in std_logic;
clr : in std_logic);
end counter_41314d726b;
architecture behavior of counter_41314d726b is
signal rst_1_40: boolean;
signal en_1_45: boolean;
signal count_reg_20_23: unsigned((1 - 1) downto 0) := "0";
signal count_reg_20_23_rst: std_logic;
signal count_reg_20_23_en: std_logic;
signal bool_44_4: boolean;
signal rst_limit_join_44_1: boolean;
signal count_reg_join_44_1: unsigned((2 - 1) downto 0);
signal count_reg_join_44_1_en: std_logic;
signal count_reg_join_44_1_rst: std_logic;
begin
rst_1_40 <= ((rst) = "1");
en_1_45 <= ((en) = "1");
proc_count_reg_20_23: process (clk)
is
begin
if (clk'event and (clk = '1')) then
if ((ce = '1') and (count_reg_20_23_rst = '1')) then
count_reg_20_23 <= "0";
elsif ((ce = '1') and (count_reg_20_23_en = '1')) then
count_reg_20_23 <= count_reg_20_23 + std_logic_vector_to_unsigned("1");
end if;
end if;
end process proc_count_reg_20_23;
bool_44_4 <= rst_1_40 or false;
proc_if_44_1: process (bool_44_4, count_reg_20_23, en_1_45)
is
begin
if bool_44_4 then
count_reg_join_44_1_rst <= '1';
elsif en_1_45 then
count_reg_join_44_1_rst <= '0';
else
count_reg_join_44_1_rst <= '0';
end if;
if en_1_45 then
count_reg_join_44_1_en <= '1';
else
count_reg_join_44_1_en <= '0';
end if;
if bool_44_4 then
rst_limit_join_44_1 <= false;
elsif en_1_45 then
rst_limit_join_44_1 <= false;
else
rst_limit_join_44_1 <= false;
end if;
end process proc_if_44_1;
count_reg_20_23_rst <= count_reg_join_44_1_rst;
count_reg_20_23_en <= count_reg_join_44_1_en;
op <= unsigned_to_std_logic_vector(count_reg_20_23);
end behavior;
-------------------------------------------------------------------
-- System Generator version 13.4 VHDL source file.
--
-- Copyright(C) 2011 by Xilinx, Inc. All rights reserved. This
-- text/file contains proprietary, confidential information of Xilinx,
-- Inc., is distributed under license from Xilinx, Inc., and may be used,
-- copied and/or disclosed only pursuant to the terms of a valid license
-- agreement with Xilinx, Inc. Xilinx hereby grants you a license to use
-- this text/file solely for design, simulation, implementation and
-- creation of design files limited to Xilinx devices or technologies.
-- Use with non-Xilinx devices or technologies is expressly prohibited
-- and immediately terminates your license unless covered by a separate
-- agreement.
--
-- Xilinx is providing this design, code, or information "as is" solely
-- for use in developing programs and solutions for Xilinx devices. By
-- providing this design, code, or information as one possible
-- implementation of this feature, application or standard, Xilinx is
-- making no representation that this implementation is free from any
-- claims of infringement. You are responsible for obtaining any rights
-- you may require for your implementation. Xilinx expressly disclaims
-- any warranty whatsoever with respect to the adequacy of the
-- implementation, including but not limited to warranties of
-- merchantability or fitness for a particular purpose.
--
-- Xilinx products are not intended for use in life support appliances,
-- devices, or systems. Use in such applications is expressly prohibited.
--
-- Any modifications that are made to the source code are done at the user's
-- sole risk and will be unsupported.
--
-- This copyright and support notice must be retained as part of this
-- text at all times. (c) Copyright 1995-2011 Xilinx, Inc. All rights
-- reserved.
-------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use work.conv_pkg.all;
-- synopsys translate_off
library unisim;
use unisim.vcomponents.all;
-- synopsys translate_on
entity xlusamp is
generic (
d_width : integer := 5;
d_bin_pt : integer := 2;
d_arith : integer := xlUnsigned;
q_width : integer := 5;
q_bin_pt : integer := 2;
q_arith : integer := xlUnsigned;
en_width : integer := 1;
en_bin_pt : integer := 0;
en_arith : integer := xlUnsigned;
sampling_ratio : integer := 2;
latency : integer := 1;
copy_samples : integer := 0);
port (
d : in std_logic_vector (d_width-1 downto 0);
src_clk : in std_logic;
src_ce : in std_logic;
src_clr : in std_logic;
dest_clk : in std_logic;
dest_ce : in std_logic;
dest_clr : in std_logic;
en : in std_logic_vector(en_width-1 downto 0);
q : out std_logic_vector (q_width-1 downto 0)
);
end xlusamp;
architecture struct of xlusamp is
component synth_reg
generic (
width: integer := 16;
latency: integer := 5
);
port (
i: in std_logic_vector(width - 1 downto 0);
ce: in std_logic;
clr: in std_logic;
clk: in std_logic;
o: out std_logic_vector(width - 1 downto 0)
);
end component;
component FDSE
port (q : out std_ulogic;
d : in std_ulogic;
c : in std_ulogic;
s : in std_ulogic;
ce : in std_ulogic);
end component;
attribute syn_black_box of FDSE : component is true;
attribute fpga_dont_touch of FDSE : component is "true";
signal zero : std_logic_vector (d_width-1 downto 0);
signal mux_sel : std_logic;
signal sampled_d : std_logic_vector (d_width-1 downto 0);
signal internal_ce : std_logic;
begin
sel_gen : FDSE
port map (q => mux_sel,
d => src_ce,
c => src_clk,
s => src_clr,
ce => dest_ce);
internal_ce <= src_ce and en(0);
copy_samples_false : if (copy_samples = 0) generate
zero <= (others => '0');
gen_q_cp_smpls_0_and_lat_0: if (latency = 0) generate
cp_smpls_0_and_lat_0: process (mux_sel, d, zero)
begin
if (mux_sel = '1') then
q <= d;
else
q <= zero;
end if;
end process cp_smpls_0_and_lat_0;
end generate;
gen_q_cp_smpls_0_and_lat_gt_0: if (latency > 0) generate
sampled_d_reg: synth_reg
generic map (
width => d_width,
latency => latency
)
port map (
i => d,
ce => internal_ce,
clr => src_clr,
clk => src_clk,
o => sampled_d
);
gen_q_check_mux_sel: process (mux_sel, sampled_d, zero)
begin
if (mux_sel = '1') then
q <= sampled_d;
else
q <= zero;
end if;
end process gen_q_check_mux_sel;
end generate;
end generate;
copy_samples_true : if (copy_samples = 1) generate
gen_q_cp_smpls_1_and_lat_0: if (latency = 0) generate
q <= d;
end generate;
gen_q_cp_smpls_1_and_lat_gt_0: if (latency > 0) generate
q <= sampled_d;
sampled_d_reg2: synth_reg
generic map (
width => d_width,
latency => latency
)
port map (
i => d,
ce => internal_ce,
clr => src_clr,
clk => src_clk,
o => sampled_d
);
end generate;
end generate;
end architecture struct;
-------------------------------------------------------------------------------
-- Title : Look-up table sweeper
-- Project :
-------------------------------------------------------------------------------
-- File : lut_sweep.vhd
-- Author : aylons <aylons@LNLS190>
-- Company :
-- Created : 2014-03-07
-- Last update: 2014-03-07
-- Platform :
-- Standard : VHDL'93/02
-------------------------------------------------------------------------------
-- Description: Tool for sweeping through look-up table addresses
-------------------------------------------------------------------------------
-- Copyright (c) 2014
-------------------------------------------------------------------------------
-- Revisions :
-- Date Version Author Description
-- 2014-03-07 1.0 aylons Created
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
library UNISIM;
use UNISIM.vcomponents.all;
-------------------------------------------------------------------------------
entity lut_sweep is
generic (
g_bus_size : natural := 8;
g_first_address : natural := 0;
g_last_address : natural := 147;
g_sweep_mode : string := "sawtooth"
);
port (
rst_n_i : in std_logic;
clk_i : in std_logic;
ce_i : in std_logic;
address_o : out std_logic_vector(g_bus_size-1 downto 0));
end entity lut_sweep;
-------------------------------------------------------------------------------
architecture str of lut_sweep is
begin -- architecture str
counting : process(clk_i)
variable count : natural := 0;
begin
if rising_edge(clk_i) then
if rst_n_i = '0' then
count := 0;
elsif ce_i = '1' then
if count = g_last_address then
count := g_first_address;
else
count := count + 1;
end if; --count = last_address
address_o <= std_logic_vector(to_unsigned(count, g_bus_size));
end if; -- reset
end if; -- rising_edge
end process counting;
end architecture str;
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Title : Fixed sin-cos DDS
-- Project :
-------------------------------------------------------------------------------
-- File : fixed_dds.vhd
-- Author : aylons <aylons@LNLS190>
-- Company :
-- Created : 2014-03-07
-- Last update: 2014-03-07
-- Platform :
-- Standard : VHDL'93/02
-------------------------------------------------------------------------------
-- Description: Fixed frequency phase and quadrature DDS for use in tuned DDCs.
-------------------------------------------------------------------------------
-- Copyright (c) 2014
-------------------------------------------------------------------------------
-- Revisions :
-- Date Version Author Description
-- 2014-03-07 1.0 aylons Created
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
library UNISIM;
use UNISIM.vcomponents.all;
library work;
use work.genram_pkg.all;
-------------------------------------------------------------------------------
entity fixed_dds is
generic (
g_number_of_points : natural := 148;
g_output_width : natural := 24;
g_dither : boolean := false;
g_sin_file : string := "./dds_sin.ram";
g_cos_file : string := "./dds_cos.ram"
);
port (
clk_i : in std_logic;
ce_i : in std_logic;
rst_n_i : in std_logic;
sin_o : out std_logic_vector(g_output_width-1 downto 0);
cos_o : out std_logic_vector(g_output_width-1 downto 0)
);
end entity fixed_dds;
-------------------------------------------------------------------------------
architecture str of fixed_dds is
constant c_bus_size : natural := f_log2_size(g_number_of_points);
signal cur_address : std_logic_vector(c_bus_size-1 downto 0);
component generic_simple_dpram is
generic (
g_data_width : natural;
g_size : natural;
g_with_byte_enable : boolean;
g_addr_conflict_resolution : string;
g_init_file : string;
g_dual_clock : boolean);
port (
rst_n_i : in std_logic := '1';
clka_i : in std_logic;
bwea_i : in std_logic_vector((g_data_width+7)/8 -1 downto 0) := f_gen_dummy_vec('1', (g_data_width+7)/8);
wea_i : in std_logic;
aa_i : in std_logic_vector(c_bus_size-1 downto 0);
da_i : in std_logic_vector(g_data_width-1 downto 0);
clkb_i : in std_logic;
ab_i : in std_logic_vector(c_bus_size-1 downto 0);
qb_o : out std_logic_vector(g_data_width-1 downto 0));
end component generic_simple_dpram;
component lut_sweep is
generic (
g_bus_size : natural;
g_first_address : natural;
g_last_address : natural;
g_sweep_mode : string);
port (
rst_n_i : in std_logic;
clk_i : in std_logic;
ce_i : in std_logic;
address_o : out std_logic_vector(c_bus_size-1 downto 0));
end component lut_sweep;
begin -- architecture str
cmp_sin_lut : generic_simple_dpram
generic map (
g_data_width => g_output_width,
g_size => g_number_of_points,
g_with_byte_enable => false,
g_addr_conflict_resolution => "dont_care",
g_init_file => g_sin_file,
g_dual_clock => false
)
port map (
rst_n_i => rst_n_i,
clka_i => clk_i,
bwea_i => (others => '0'),
wea_i => '0',
aa_i => cur_address,
da_i => (others => '0'),
clkb_i => clk_i,
ab_i => cur_address,
qb_o => sin_o
);
cmp_cos_lut : generic_simple_dpram
generic map (
g_data_width => g_output_width,
g_size => g_number_of_points,
g_with_byte_enable => false,
g_addr_conflict_resolution => "dont_care",
g_init_file => g_cos_file,
g_dual_clock => false
)
port map (
rst_n_i => rst_n_i,
clka_i => clk_i,
bwea_i => (others => '0'),
wea_i => '0',
aa_i => cur_address,
da_i => (others => '0'),
clkb_i => clk_i,
ab_i => cur_address,
qb_o => cos_o
);
cmp_sweep : lut_sweep
generic map (
g_bus_size => c_bus_size,
g_first_address => 0,
g_last_address => g_number_of_points-1,
g_sweep_mode => "sawtooth")
port map (
rst_n_i => rst_n_i,
clk_i => clk_i,
ce_i => ce_i,
address_o => cur_address);
end architecture str;
-------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity constant_963ed6358a is
port (
op : out std_logic_vector((1 - 1) downto 0);
clk : in std_logic;
ce : in std_logic;
clr : in std_logic);
end constant_963ed6358a;
architecture behavior of constant_963ed6358a is
begin
op <= "0";
end behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity constant_6293007044 is
port (
op : out std_logic_vector((1 - 1) downto 0);
clk : in std_logic;
ce : in std_logic;
clr : in std_logic);
end constant_6293007044;
architecture behavior of constant_6293007044 is
begin
op <= "1";
end behavior;
-------------------------------------------------------------------
-- System Generator version 13.4 VHDL source file.
--
-- Copyright(C) 2011 by Xilinx, Inc. All rights reserved. This
-- text/file contains proprietary, confidential information of Xilinx,
-- Inc., is distributed under license from Xilinx, Inc., and may be used,
-- copied and/or disclosed only pursuant to the terms of a valid license
-- agreement with Xilinx, Inc. Xilinx hereby grants you a license to use
-- this text/file solely for design, simulation, implementation and
-- creation of design files limited to Xilinx devices or technologies.
-- Use with non-Xilinx devices or technologies is expressly prohibited
-- and immediately terminates your license unless covered by a separate
-- agreement.
--
-- Xilinx is providing this design, code, or information "as is" solely
-- for use in developing programs and solutions for Xilinx devices. By
-- providing this design, code, or information as one possible
-- implementation of this feature, application or standard, Xilinx is
-- making no representation that this implementation is free from any
-- claims of infringement. You are responsible for obtaining any rights
-- you may require for your implementation. Xilinx expressly disclaims
-- any warranty whatsoever with respect to the adequacy of the
-- implementation, including but not limited to warranties of
-- merchantability or fitness for a particular purpose.
--
-- Xilinx products are not intended for use in life support appliances,
-- devices, or systems. Use in such applications is expressly prohibited.
--
-- Any modifications that are made to the source code are done at the user's
-- sole risk and will be unsupported.
--
-- This copyright and support notice must be retained as part of this
-- text at all times. (c) Copyright 1995-2011 Xilinx, Inc. All rights
-- reserved.
-------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use work.conv_pkg.all;
-- synopsys translate_off
library unisim;
use unisim.vcomponents.all;
-- synopsys translate_on
entity xldsamp is
generic (
d_width: integer := 12;
d_bin_pt: integer := 0;
d_arith: integer := xlUnsigned;
q_width: integer := 12;
q_bin_pt: integer := 0;
q_arith: integer := xlUnsigned;
en_width: integer := 1;
en_bin_pt: integer := 0;
en_arith: integer := xlUnsigned;
ds_ratio: integer := 2;
phase: integer := 0;
latency: integer := 1
);
port (
d: in std_logic_vector(d_width - 1 downto 0);
src_clk: in std_logic;
src_ce: in std_logic;
src_clr: in std_logic;
dest_clk: in std_logic;
dest_ce: in std_logic;
dest_clr: in std_logic;
en: in std_logic_vector(en_width - 1 downto 0);
q: out std_logic_vector(q_width - 1 downto 0)
);
end xldsamp;
architecture struct of xldsamp is
component synth_reg
generic (
width: integer := 16;
latency: integer := 5
);
port (
i: in std_logic_vector(width - 1 downto 0);
ce: in std_logic;
clr: in std_logic;
clk: in std_logic;
o: out std_logic_vector(width - 1 downto 0)
);
end component;
component fdse
port (
q: out std_ulogic;
d: in std_ulogic;
c: in std_ulogic;
s: in std_ulogic;
ce: in std_ulogic
);
end component;
attribute syn_black_box of fdse: component is true;
attribute fpga_dont_touch of fdse: component is "true";
signal adjusted_dest_ce: std_logic;
signal adjusted_dest_ce_w_en: std_logic;
signal dest_ce_w_en: std_logic;
signal smpld_d: std_logic_vector(d_width-1 downto 0);
begin
adjusted_ce_needed: if ((latency = 0) or (phase /= (ds_ratio - 1))) generate
dest_ce_reg: fdse
port map (
q => adjusted_dest_ce,
d => dest_ce,
c => src_clk,
s => src_clr,
ce => src_ce
);
end generate;
latency_eq_0: if (latency = 0) generate
shutter_d_reg: synth_reg
generic map (
width => d_width,
latency => 1
)
port map (
i => d,
ce => adjusted_dest_ce,
clr => src_clr,
clk => src_clk,
o => smpld_d
);
shutter_mux: process (adjusted_dest_ce, d, smpld_d)
begin
if adjusted_dest_ce = '0' then
q <= smpld_d;
else
q <= d;
end if;
end process;
end generate;
latency_gt_0: if (latency > 0) generate
dbl_reg_test: if (phase /= (ds_ratio-1)) generate
smpl_d_reg: synth_reg
generic map (
width => d_width,
latency => 1
)
port map (
i => d,
ce => adjusted_dest_ce_w_en,
clr => src_clr,
clk => src_clk,
o => smpld_d
);
end generate;
sngl_reg_test: if (phase = (ds_ratio -1)) generate
smpld_d <= d;
end generate;
latency_pipe: synth_reg
generic map (
width => d_width,
latency => latency
)
port map (
i => smpld_d,
ce => dest_ce_w_en,
clr => src_clr,
clk => dest_clk,
o => q
);
end generate;
dest_ce_w_en <= dest_ce and en(0);
adjusted_dest_ce_w_en <= adjusted_dest_ce and en(0);
end architecture struct;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity relational_a892e1bf40 is
port (
a : in std_logic_vector((1 - 1) downto 0);
b : in std_logic_vector((1 - 1) downto 0);
op : out std_logic_vector((1 - 1) downto 0);
clk : in std_logic;
ce : in std_logic;
clr : in std_logic);
end relational_a892e1bf40;
architecture behavior of relational_a892e1bf40 is
signal a_1_31: unsigned((1 - 1) downto 0);
signal b_1_34: unsigned((1 - 1) downto 0);
type array_type_op_mem_32_22 is array (0 to (1 - 1)) of boolean;
signal op_mem_32_22: array_type_op_mem_32_22 := (
0 => false);
signal op_mem_32_22_front_din: boolean;
signal op_mem_32_22_back: boolean;
signal op_mem_32_22_push_front_pop_back_en: std_logic;
signal result_12_3_rel: boolean;
begin
a_1_31 <= std_logic_vector_to_unsigned(a);
b_1_34 <= std_logic_vector_to_unsigned(b);
op_mem_32_22_back <= op_mem_32_22(0);
proc_op_mem_32_22: process (clk)
is
variable i: integer;
begin
if (clk'event and (clk = '1')) then
if ((ce = '1') and (op_mem_32_22_push_front_pop_back_en = '1')) then
op_mem_32_22(0) <= op_mem_32_22_front_din;
end if;
end if;
end process proc_op_mem_32_22;
result_12_3_rel <= a_1_31 = b_1_34;
op_mem_32_22_front_din <= result_12_3_rel;
op_mem_32_22_push_front_pop_back_en <= '1';
op <= boolean_to_vector(op_mem_32_22_back);
end behavior;
-------------------------------------------------------------------
-- System Generator version 13.4 VHDL source file.
--
-- Copyright(C) 2011 by Xilinx, Inc. All rights reserved. This
-- text/file contains proprietary, confidential information of Xilinx,
-- Inc., is distributed under license from Xilinx, Inc., and may be used,
-- copied and/or disclosed only pursuant to the terms of a valid license
-- agreement with Xilinx, Inc. Xilinx hereby grants you a license to use
-- this text/file solely for design, simulation, implementation and
-- creation of design files limited to Xilinx devices or technologies.
-- Use with non-Xilinx devices or technologies is expressly prohibited
-- and immediately terminates your license unless covered by a separate
-- agreement.
--
-- Xilinx is providing this design, code, or information "as is" solely
-- for use in developing programs and solutions for Xilinx devices. By
-- providing this design, code, or information as one possible
-- implementation of this feature, application or standard, Xilinx is
-- making no representation that this implementation is free from any
-- claims of infringement. You are responsible for obtaining any rights
-- you may require for your implementation. Xilinx expressly disclaims
-- any warranty whatsoever with respect to the adequacy of the
-- implementation, including but not limited to warranties of
-- merchantability or fitness for a particular purpose.
--
-- Xilinx products are not intended for use in life support appliances,
-- devices, or systems. Use in such applications is expressly prohibited.
--
-- Any modifications that are made to the source code are done at the user's
-- sole risk and will be unsupported.
--
-- This copyright and support notice must be retained as part of this
-- text at all times. (c) Copyright 1995-2011 Xilinx, Inc. All rights
-- reserved.
-------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use work.conv_pkg.all;
entity xlpassthrough is
generic (
din_width : integer := 16;
dout_width : integer := 16
);
port (
din : in std_logic_vector (din_width-1 downto 0);
dout : out std_logic_vector (dout_width-1 downto 0));
end xlpassthrough;
architecture passthrough_arch of xlpassthrough is
begin
dout <= din;
end passthrough_arch;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity reinterpret_b62f4240f0 is
port (
input_port : in std_logic_vector((24 - 1) downto 0);
output_port : out std_logic_vector((24 - 1) downto 0);
clk : in std_logic;
ce : in std_logic;
clr : in std_logic);
end reinterpret_b62f4240f0;
architecture behavior of reinterpret_b62f4240f0 is
signal input_port_1_40: signed((24 - 1) downto 0);
begin
input_port_1_40 <= std_logic_vector_to_signed(input_port);
output_port <= signed_to_std_logic_vector(input_port_1_40);
end behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity xlcordic_baddbff1b3cb5131976384a2dda9ffff is
port(
ce:in std_logic;
clk:in std_logic;
m_axis_dout_tdata_phase:out std_logic_vector(23 downto 0);
m_axis_dout_tdata_real:out std_logic_vector(23 downto 0);
m_axis_dout_tuser_cartesian_tuser:out std_logic_vector(0 downto 0);
m_axis_dout_tvalid:out std_logic;
s_axis_cartesian_tdata_imag:in std_logic_vector(24 downto 0);
s_axis_cartesian_tdata_real:in std_logic_vector(24 downto 0);
s_axis_cartesian_tready:out std_logic;
s_axis_cartesian_tuser_user:in std_logic_vector(0 downto 0);
s_axis_cartesian_tvalid:in std_logic
);
end xlcordic_baddbff1b3cb5131976384a2dda9ffff;
architecture behavior of xlcordic_baddbff1b3cb5131976384a2dda9ffff is
component crdc_v5_0_9d3c9eaecfab6c0c
port(
aclk:in std_logic;
aclken:in std_logic;
m_axis_dout_tdata:out std_logic_vector(47 downto 0);
m_axis_dout_tuser:out std_logic_vector(0 downto 0);
m_axis_dout_tvalid:out std_logic;
s_axis_cartesian_tdata:in std_logic_vector(63 downto 0);
s_axis_cartesian_tready:out std_logic;
s_axis_cartesian_tuser:in std_logic_vector(0 downto 0);
s_axis_cartesian_tvalid:in std_logic
);
end component;
signal m_axis_dout_tdata_net: std_logic_vector(47 downto 0) := (others=>'0');
signal m_axis_dout_tuser_net: std_logic_vector(0 downto 0) := (others=>'0');
signal s_axis_cartesian_tdata_net: std_logic_vector(63 downto 0) := (others=>'0');
signal s_axis_cartesian_tuser_net: std_logic_vector(0 downto 0) := (others=>'0');
begin
m_axis_dout_tdata_phase <= m_axis_dout_tdata_net(47 downto 24);
m_axis_dout_tdata_real <= m_axis_dout_tdata_net(23 downto 0);
m_axis_dout_tuser_cartesian_tuser <= m_axis_dout_tuser_net(0 downto 0);
s_axis_cartesian_tdata_net(56 downto 32) <= s_axis_cartesian_tdata_imag;
s_axis_cartesian_tdata_net(24 downto 0) <= s_axis_cartesian_tdata_real;
s_axis_cartesian_tuser_net(0 downto 0) <= s_axis_cartesian_tuser_user;
crdc_v5_0_9d3c9eaecfab6c0c_instance : crdc_v5_0_9d3c9eaecfab6c0c
port map(
aclk=>clk,
aclken=>ce,
m_axis_dout_tdata=>m_axis_dout_tdata_net,
m_axis_dout_tuser=>m_axis_dout_tuser_net,
m_axis_dout_tvalid=>m_axis_dout_tvalid,
s_axis_cartesian_tdata=>s_axis_cartesian_tdata_net,
s_axis_cartesian_tready=>s_axis_cartesian_tready,
s_axis_cartesian_tuser=>s_axis_cartesian_tuser_net,
s_axis_cartesian_tvalid=>s_axis_cartesian_tvalid
);
end behavior;
-------------------------------------------------------------------
-- System Generator version 13.4 VHDL source file.
--
-- Copyright(C) 2011 by Xilinx, Inc. All rights reserved. This
-- text/file contains proprietary, confidential information of Xilinx,
-- Inc., is distributed under license from Xilinx, Inc., and may be used,
-- copied and/or disclosed only pursuant to the terms of a valid license
-- agreement with Xilinx, Inc. Xilinx hereby grants you a license to use
-- this text/file solely for design, simulation, implementation and
-- creation of design files limited to Xilinx devices or technologies.
-- Use with non-Xilinx devices or technologies is expressly prohibited
-- and immediately terminates your license unless covered by a separate
-- agreement.
--
-- Xilinx is providing this design, code, or information "as is" solely
-- for use in developing programs and solutions for Xilinx devices. By
-- providing this design, code, or information as one possible
-- implementation of this feature, application or standard, Xilinx is
-- making no representation that this implementation is free from any
-- claims of infringement. You are responsible for obtaining any rights
-- you may require for your implementation. Xilinx expressly disclaims
-- any warranty whatsoever with respect to the adequacy of the
-- implementation, including but not limited to warranties of
-- merchantability or fitness for a particular purpose.
--
-- Xilinx products are not intended for use in life support appliances,
-- devices, or systems. Use in such applications is expressly prohibited.
--
-- Any modifications that are made to the source code are done at the user's
-- sole risk and will be unsupported.
--
-- This copyright and support notice must be retained as part of this
-- text at all times. (c) Copyright 1995-2011 Xilinx, Inc. All rights
-- reserved.
-------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use work.conv_pkg.all;
entity convert_func_call is
generic (
din_width : integer := 16;
din_bin_pt : integer := 4;
din_arith : integer := xlUnsigned;
dout_width : integer := 8;
dout_bin_pt : integer := 2;
dout_arith : integer := xlUnsigned;
quantization : integer := xlTruncate;
overflow : integer := xlWrap);
port (
din : in std_logic_vector (din_width-1 downto 0);
result : out std_logic_vector (dout_width-1 downto 0));
end convert_func_call;
architecture behavior of convert_func_call is
begin
result <= convert_type(din, din_width, din_bin_pt, din_arith,
dout_width, dout_bin_pt, dout_arith,
quantization, overflow);
end behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use work.conv_pkg.all;
entity xlconvert is
generic (
din_width : integer := 16;
din_bin_pt : integer := 4;
din_arith : integer := xlUnsigned;
dout_width : integer := 8;
dout_bin_pt : integer := 2;
dout_arith : integer := xlUnsigned;
en_width : integer := 1;
en_bin_pt : integer := 0;
en_arith : integer := xlUnsigned;
bool_conversion : integer :=0;
latency : integer := 0;
quantization : integer := xlTruncate;
overflow : integer := xlWrap);
port (
din : in std_logic_vector (din_width-1 downto 0);
en : in std_logic_vector (en_width-1 downto 0);
ce : in std_logic;
clr : in std_logic;
clk : in std_logic;
dout : out std_logic_vector (dout_width-1 downto 0));
end xlconvert;
architecture behavior of xlconvert is
component synth_reg
generic (width : integer;
latency : integer);
port (i : in std_logic_vector(width-1 downto 0);
ce : in std_logic;
clr : in std_logic;
clk : in std_logic;
o : out std_logic_vector(width-1 downto 0));
end component;
component convert_func_call
generic (
din_width : integer := 16;
din_bin_pt : integer := 4;
din_arith : integer := xlUnsigned;
dout_width : integer := 8;
dout_bin_pt : integer := 2;
dout_arith : integer := xlUnsigned;
quantization : integer := xlTruncate;
overflow : integer := xlWrap);
port (
din : in std_logic_vector (din_width-1 downto 0);
result : out std_logic_vector (dout_width-1 downto 0));
end component;
-- synopsys translate_off
-- synopsys translate_on
signal result : std_logic_vector(dout_width-1 downto 0);
signal internal_ce : std_logic;
begin
-- synopsys translate_off
-- synopsys translate_on
internal_ce <= ce and en(0);
bool_conversion_generate : if (bool_conversion = 1)
generate
result <= din;
end generate;
std_conversion_generate : if (bool_conversion = 0)
generate
convert : convert_func_call
generic map (
din_width => din_width,
din_bin_pt => din_bin_pt,
din_arith => din_arith,
dout_width => dout_width,
dout_bin_pt => dout_bin_pt,
dout_arith => dout_arith,
quantization => quantization,
overflow => overflow)
port map (
din => din,
result => result);
end generate;
latency_test : if (latency > 0) generate
reg : synth_reg
generic map (
width => dout_width,
latency => latency
)
port map (
i => result,
ce => internal_ce,
clr => clr,
clk => clk,
o => dout
);
end generate;
latency0 : if (latency = 0)
generate
dout <= result;
end generate latency0;
end behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity reinterpret_31a4235b32 is
port (
input_port : in std_logic_vector((25 - 1) downto 0);
output_port : out std_logic_vector((25 - 1) downto 0);
clk : in std_logic;
ce : in std_logic;
clr : in std_logic);
end reinterpret_31a4235b32;
architecture behavior of reinterpret_31a4235b32 is
signal input_port_1_40: signed((25 - 1) downto 0);
begin
input_port_1_40 <= std_logic_vector_to_signed(input_port);
output_port <= signed_to_std_logic_vector(input_port_1_40);
end behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity reinterpret_fa01b5fd95 is
port (
input_port : in std_logic_vector((58 - 1) downto 0);
output_port : out std_logic_vector((58 - 1) downto 0);
clk : in std_logic;
ce : in std_logic;
clr : in std_logic);
end reinterpret_fa01b5fd95;
architecture behavior of reinterpret_fa01b5fd95 is
signal input_port_1_40: signed((58 - 1) downto 0);
begin
input_port_1_40 <= std_logic_vector_to_signed(input_port);
output_port <= signed_to_std_logic_vector(input_port_1_40);
end behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity constant_cda50df78a is
port (
op : out std_logic_vector((2 - 1) downto 0);
clk : in std_logic;
ce : in std_logic;
clr : in std_logic);
end constant_cda50df78a;
architecture behavior of constant_cda50df78a is
begin
op <= "00";
end behavior;
-------------------------------------------------------------------
-- System Generator version 13.4 VHDL source file.
--
-- Copyright(C) 2011 by Xilinx, Inc. All rights reserved. This
-- text/file contains proprietary, confidential information of Xilinx,
-- Inc., is distributed under license from Xilinx, Inc., and may be used,
-- copied and/or disclosed only pursuant to the terms of a valid license
-- agreement with Xilinx, Inc. Xilinx hereby grants you a license to use
-- this text/file solely for design, simulation, implementation and
-- creation of design files limited to Xilinx devices or technologies.
-- Use with non-Xilinx devices or technologies is expressly prohibited
-- and immediately terminates your license unless covered by a separate
-- agreement.
--
-- Xilinx is providing this design, code, or information "as is" solely
-- for use in developing programs and solutions for Xilinx devices. By
-- providing this design, code, or information as one possible
-- implementation of this feature, application or standard, Xilinx is
-- making no representation that this implementation is free from any
-- claims of infringement. You are responsible for obtaining any rights
-- you may require for your implementation. Xilinx expressly disclaims
-- any warranty whatsoever with respect to the adequacy of the
-- implementation, including but not limited to warranties of
-- merchantability or fitness for a particular purpose.
--
-- Xilinx products are not intended for use in life support appliances,
-- devices, or systems. Use in such applications is expressly prohibited.
--
-- Any modifications that are made to the source code are done at the user's
-- sole risk and will be unsupported.
--
-- This copyright and support notice must be retained as part of this
-- text at all times. (c) Copyright 1995-2011 Xilinx, Inc. All rights
-- reserved.
-------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use work.conv_pkg.all;
entity xldelay is
generic(width : integer := -1;
latency : integer := -1;
reg_retiming : integer := 0;
reset : integer := 0);
port(d : in std_logic_vector (width-1 downto 0);
ce : in std_logic;
clk : in std_logic;
en : in std_logic;
rst : in std_logic;
q : out std_logic_vector (width-1 downto 0));
end xldelay;
architecture behavior of xldelay is
component synth_reg
generic (width : integer;
latency : integer);
port (i : in std_logic_vector(width-1 downto 0);
ce : in std_logic;
clr : in std_logic;
clk : in std_logic;
o : out std_logic_vector(width-1 downto 0));
end component;
component synth_reg_reg
generic (width : integer;
latency : integer);
port (i : in std_logic_vector(width-1 downto 0);
ce : in std_logic;
clr : in std_logic;
clk : in std_logic;
o : out std_logic_vector(width-1 downto 0));
end component;
signal internal_ce : std_logic;
begin
internal_ce <= ce and en;
srl_delay: if ((reg_retiming = 0) and (reset = 0)) or (latency < 1) generate
synth_reg_srl_inst : synth_reg
generic map (
width => width,
latency => latency)
port map (
i => d,
ce => internal_ce,
clr => '0',
clk => clk,
o => q);
end generate srl_delay;
reg_delay: if ((reg_retiming = 1) or (reset = 1)) and (latency >= 1) generate
synth_reg_reg_inst : synth_reg_reg
generic map (
width => width,
latency => latency)
port map (
i => d,
ce => internal_ce,
clr => rst,
clk => clk,
o => q);
end generate reg_delay;
end architecture behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity relational_d29d27b7b3 is
port (
a : in std_logic_vector((1 - 1) downto 0);
b : in std_logic_vector((2 - 1) downto 0);
op : out std_logic_vector((1 - 1) downto 0);
clk : in std_logic;
ce : in std_logic;
clr : in std_logic);
end relational_d29d27b7b3;
architecture behavior of relational_d29d27b7b3 is
signal a_1_31: unsigned((1 - 1) downto 0);
signal b_1_34: unsigned((2 - 1) downto 0);
type array_type_op_mem_32_22 is array (0 to (1 - 1)) of boolean;
signal op_mem_32_22: array_type_op_mem_32_22 := (
0 => false);
signal op_mem_32_22_front_din: boolean;
signal op_mem_32_22_back: boolean;
signal op_mem_32_22_push_front_pop_back_en: std_logic;
signal cast_12_12: unsigned((2 - 1) downto 0);
signal result_12_3_rel: boolean;
begin
a_1_31 <= std_logic_vector_to_unsigned(a);
b_1_34 <= std_logic_vector_to_unsigned(b);
op_mem_32_22_back <= op_mem_32_22(0);
proc_op_mem_32_22: process (clk)
is
variable i: integer;
begin
if (clk'event and (clk = '1')) then
if ((ce = '1') and (op_mem_32_22_push_front_pop_back_en = '1')) then
op_mem_32_22(0) <= op_mem_32_22_front_din;
end if;
end if;
end process proc_op_mem_32_22;
cast_12_12 <= u2u_cast(a_1_31, 0, 2, 0);
result_12_3_rel <= cast_12_12 = b_1_34;
op_mem_32_22_front_din <= result_12_3_rel;
op_mem_32_22_push_front_pop_back_en <= '1';
op <= boolean_to_vector(op_mem_32_22_back);
end behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity xlcic_compiler_2d3b496704eca3daaae85383d488a908 is
port(
ce:in std_logic;
ce_1120:in std_logic;
ce_logic_1:in std_logic;
clk:in std_logic;
clk_1120:in std_logic;
clk_logic_1:in std_logic;
event_tlast_missing:out std_logic;
event_tlast_unexpected:out std_logic;
m_axis_data_tdata_data:out std_logic_vector(57 downto 0);
m_axis_data_tlast:out std_logic;
m_axis_data_tuser_chan_out:out std_logic_vector(0 downto 0);
m_axis_data_tuser_chan_sync:out std_logic_vector(0 downto 0);
m_axis_data_tvalid:out std_logic;
s_axis_data_tdata_data:in std_logic_vector(23 downto 0);
s_axis_data_tlast:in std_logic;
s_axis_data_tready:out std_logic
);
end xlcic_compiler_2d3b496704eca3daaae85383d488a908;
architecture behavior of xlcic_compiler_2d3b496704eca3daaae85383d488a908 is
component cc_cmplr_v3_0_964aa42461b15ac2
port(
aclk:in std_logic;
aclken:in std_logic;
event_tlast_missing:out std_logic;
event_tlast_unexpected:out std_logic;
m_axis_data_tdata:out std_logic_vector(63 downto 0);
m_axis_data_tlast:out std_logic;
m_axis_data_tuser:out std_logic_vector(15 downto 0);
m_axis_data_tvalid:out std_logic;
s_axis_data_tdata:in std_logic_vector(23 downto 0);
s_axis_data_tlast:in std_logic;
s_axis_data_tready:out std_logic;
s_axis_data_tvalid:in std_logic
);
end component;
signal m_axis_data_tdata_net: std_logic_vector(63 downto 0) := (others=>'0');
signal m_axis_data_tdata_data_ps_net: std_logic_vector(57 downto 0) := (others=>'0');
signal m_axis_data_tdata_data_ps_net_captured: std_logic_vector(57 downto 0) := (others=>'0');
signal m_axis_data_tdata_data_ps_net_or_captured_net: std_logic_vector(57 downto 0) := (others=>'0');
signal m_axis_data_tlast_ps_net: std_logic := '0';
signal m_axis_data_tlast_ps_net_captured: std_logic := '0';
signal m_axis_data_tlast_ps_net_or_captured_net: std_logic := '0';
signal m_axis_data_tuser_net: std_logic_vector(15 downto 0) := (others=>'0');
signal m_axis_data_tuser_chan_sync_ps_net: std_logic_vector(0 downto 0) := (others=>'0');
signal m_axis_data_tuser_chan_sync_ps_net_captured: std_logic_vector(0 downto 0) := (others=>'0');
signal m_axis_data_tuser_chan_sync_ps_net_or_captured_net: std_logic_vector(0 downto 0) := (others=>'0');
signal m_axis_data_tuser_chan_out_ps_net: std_logic_vector(0 downto 0) := (others=>'0');
signal m_axis_data_tuser_chan_out_ps_net_captured: std_logic_vector(0 downto 0) := (others=>'0');
signal m_axis_data_tuser_chan_out_ps_net_or_captured_net: std_logic_vector(0 downto 0) := (others=>'0');
signal m_axis_data_tvalid_ps_net: std_logic := '0';
signal m_axis_data_tvalid_ps_net_captured: std_logic := '0';
signal m_axis_data_tvalid_ps_net_or_captured_net: std_logic := '0';
signal s_axis_data_tdata_net: std_logic_vector(23 downto 0) := (others=>'0');
begin
m_axis_data_tdata_data_ps_net <= m_axis_data_tdata_net(57 downto 0);
m_axis_data_tuser_chan_sync_ps_net <= m_axis_data_tuser_net(8 downto 8);
m_axis_data_tuser_chan_out_ps_net <= m_axis_data_tuser_net(0 downto 0);
s_axis_data_tdata_net(23 downto 0) <= s_axis_data_tdata_data;
m_axis_data_tdata_data_ps_net_or_captured_net <= m_axis_data_tdata_data_ps_net or m_axis_data_tdata_data_ps_net_captured;
m_axis_data_tdata_data_ps_net_synchronizer_1 : entity work.synth_reg_w_init
generic map(
width => 58,
init_index => 0,
init_value => "0",
latency => 1
)
port map (
i => m_axis_data_tdata_data_ps_net_or_captured_net,
ce => ce_1120,
clr => '0',
clk => clk_1120,
o => m_axis_data_tdata_data
);
m_axis_data_tdata_data_ps_net_synchronizer_2 : entity work.synth_reg_w_init
generic map(
width => 58,
init_index => 0,
init_value => "0",
latency => 1
)
port map (
i => m_axis_data_tdata_data_ps_net,
ce => m_axis_data_tvalid_ps_net,
clr => '0',
clk => clk_1120,
o => m_axis_data_tdata_data_ps_net_captured
);
m_axis_data_tlast_ps_net_or_captured_net <= m_axis_data_tlast_ps_net or m_axis_data_tlast_ps_net_captured;
m_axis_data_tlast_ps_net_synchronizer_1 : entity work.synth_reg_w_init
generic map(
width => 1,
init_index => 0,
init_value => "0",
latency => 1
)
port map (
i(0) => m_axis_data_tlast_ps_net_or_captured_net,
ce => ce_1120,
clr => '0',
clk => clk_1120,
o(0) => m_axis_data_tlast
);
m_axis_data_tlast_ps_net_synchronizer_2 : entity work.synth_reg_w_init
generic map(
width => 1,
init_index => 0,
init_value => "0",
latency => 1
)
port map (
i(0) => m_axis_data_tlast_ps_net,
ce => m_axis_data_tvalid_ps_net,
clr => '0',
clk => clk_1120,
o(0) => m_axis_data_tlast_ps_net_captured
);
m_axis_data_tuser_chan_sync_ps_net_or_captured_net <= m_axis_data_tuser_chan_sync_ps_net or m_axis_data_tuser_chan_sync_ps_net_captured;
m_axis_data_tuser_chan_sync_ps_net_synchronizer_1 : entity work.synth_reg_w_init
generic map(
width => 1,
init_index => 0,
init_value => "0",
latency => 1
)
port map (
i => m_axis_data_tuser_chan_sync_ps_net_or_captured_net,
ce => ce_1120,
clr => '0',
clk => clk_1120,
o => m_axis_data_tuser_chan_sync
);
m_axis_data_tuser_chan_sync_ps_net_synchronizer_2 : entity work.synth_reg_w_init
generic map(
width => 1,
init_index => 0,
init_value => "0",
latency => 1
)
port map (
i => m_axis_data_tuser_chan_sync_ps_net,
ce => m_axis_data_tvalid_ps_net,
clr => '0',
clk => clk_1120,
o => m_axis_data_tuser_chan_sync_ps_net_captured
);
m_axis_data_tuser_chan_out_ps_net_or_captured_net <= m_axis_data_tuser_chan_out_ps_net or m_axis_data_tuser_chan_out_ps_net_captured;
m_axis_data_tuser_chan_out_ps_net_synchronizer_1 : entity work.synth_reg_w_init
generic map(
width => 1,
init_index => 0,
init_value => "0",
latency => 1
)
port map (
i => m_axis_data_tuser_chan_out_ps_net_or_captured_net,
ce => ce_1120,
clr => '0',
clk => clk_1120,
o => m_axis_data_tuser_chan_out
);
m_axis_data_tuser_chan_out_ps_net_synchronizer_2 : entity work.synth_reg_w_init
generic map(
width => 1,
init_index => 0,
init_value => "0",
latency => 1
)
port map (
i => m_axis_data_tuser_chan_out_ps_net,
ce => m_axis_data_tvalid_ps_net,
clr => '0',
clk => clk_1120,
o => m_axis_data_tuser_chan_out_ps_net_captured
);
m_axis_data_tvalid_ps_net_or_captured_net <= m_axis_data_tvalid_ps_net or m_axis_data_tvalid_ps_net_captured;
m_axis_data_tvalid_ps_net_synchronizer_1 : entity work.synth_reg_w_init
generic map(
width => 1,
init_index => 0,
init_value => "0",
latency => 1
)
port map (
i(0) => m_axis_data_tvalid_ps_net_or_captured_net,
ce => ce_1120,
clr => '0',
clk => clk_1120,
o(0) => m_axis_data_tvalid
);
m_axis_data_tvalid_ps_net_synchronizer_2 : entity work.synth_reg_w_init
generic map(
width => 1,
init_index => 0,
init_value => "0",
latency => 1
)
port map (
i(0) => '1',
ce => m_axis_data_tvalid_ps_net,
clr => '0',
clk => clk_1120,
o(0) => m_axis_data_tvalid_ps_net_captured
);
cc_cmplr_v3_0_964aa42461b15ac2_instance : cc_cmplr_v3_0_964aa42461b15ac2
port map(
aclk=>clk,
aclken=>ce,
event_tlast_missing=>event_tlast_missing,
event_tlast_unexpected=>event_tlast_unexpected,
m_axis_data_tdata=>m_axis_data_tdata_net,
m_axis_data_tlast=>m_axis_data_tlast_ps_net,
m_axis_data_tuser=>m_axis_data_tuser_net,
m_axis_data_tvalid=>m_axis_data_tvalid_ps_net,
s_axis_data_tdata=>s_axis_data_tdata_net,
s_axis_data_tlast=>s_axis_data_tlast,
s_axis_data_tready=>s_axis_data_tready,
s_axis_data_tvalid=>ce_logic_1
);
end behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity reinterpret_9934b94a22 is
port (
input_port : in std_logic_vector((26 - 1) downto 0);
output_port : out std_logic_vector((26 - 1) downto 0);
clk : in std_logic;
ce : in std_logic;
clr : in std_logic);
end reinterpret_9934b94a22;
architecture behavior of reinterpret_9934b94a22 is
signal input_port_1_40: unsigned((26 - 1) downto 0);
signal output_port_5_5_force: signed((26 - 1) downto 0);
begin
input_port_1_40 <= std_logic_vector_to_unsigned(input_port);
output_port_5_5_force <= unsigned_to_signed(input_port_1_40);
output_port <= signed_to_std_logic_vector(output_port_5_5_force);
end behavior;
-------------------------------------------------------------------
-- System Generator version 13.4 VHDL source file.
--
-- Copyright(C) 2011 by Xilinx, Inc. All rights reserved. This
-- text/file contains proprietary, confidential information of Xilinx,
-- Inc., is distributed under license from Xilinx, Inc., and may be used,
-- copied and/or disclosed only pursuant to the terms of a valid license
-- agreement with Xilinx, Inc. Xilinx hereby grants you a license to use
-- this text/file solely for design, simulation, implementation and
-- creation of design files limited to Xilinx devices or technologies.
-- Use with non-Xilinx devices or technologies is expressly prohibited
-- and immediately terminates your license unless covered by a separate
-- agreement.
--
-- Xilinx is providing this design, code, or information "as is" solely
-- for use in developing programs and solutions for Xilinx devices. By
-- providing this design, code, or information as one possible
-- implementation of this feature, application or standard, Xilinx is
-- making no representation that this implementation is free from any
-- claims of infringement. You are responsible for obtaining any rights
-- you may require for your implementation. Xilinx expressly disclaims
-- any warranty whatsoever with respect to the adequacy of the
-- implementation, including but not limited to warranties of
-- merchantability or fitness for a particular purpose.
--
-- Xilinx products are not intended for use in life support appliances,
-- devices, or systems. Use in such applications is expressly prohibited.
--
-- Any modifications that are made to the source code are done at the user's
-- sole risk and will be unsupported.
--
-- This copyright and support notice must be retained as part of this
-- text at all times. (c) Copyright 1995-2011 Xilinx, Inc. All rights
-- reserved.
-------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use work.conv_pkg.all;
entity xlslice is
generic (
new_msb : integer := 9;
new_lsb : integer := 1;
x_width : integer := 16;
y_width : integer := 8);
port (
x : in std_logic_vector (x_width-1 downto 0);
y : out std_logic_vector (y_width-1 downto 0));
end xlslice;
architecture behavior of xlslice is
begin
y <= x(new_msb downto new_lsb);
end behavior;
-------------------------------------------------------------------
-- System Generator version 13.4 VHDL source file.
--
-- Copyright(C) 2011 by Xilinx, Inc. All rights reserved. This
-- text/file contains proprietary, confidential information of Xilinx,
-- Inc., is distributed under license from Xilinx, Inc., and may be used,
-- copied and/or disclosed only pursuant to the terms of a valid license
-- agreement with Xilinx, Inc. Xilinx hereby grants you a license to use
-- this text/file solely for design, simulation, implementation and
-- creation of design files limited to Xilinx devices or technologies.
-- Use with non-Xilinx devices or technologies is expressly prohibited
-- and immediately terminates your license unless covered by a separate
-- agreement.
--
-- Xilinx is providing this design, code, or information "as is" solely
-- for use in developing programs and solutions for Xilinx devices. By
-- providing this design, code, or information as one possible
-- implementation of this feature, application or standard, Xilinx is
-- making no representation that this implementation is free from any
-- claims of infringement. You are responsible for obtaining any rights
-- you may require for your implementation. Xilinx expressly disclaims
-- any warranty whatsoever with respect to the adequacy of the
-- implementation, including but not limited to warranties of
-- merchantability or fitness for a particular purpose.
--
-- Xilinx products are not intended for use in life support appliances,
-- devices, or systems. Use in such applications is expressly prohibited.
--
-- Any modifications that are made to the source code are done at the user's
-- sole risk and will be unsupported.
--
-- This copyright and support notice must be retained as part of this
-- text at all times. (c) Copyright 1995-2011 Xilinx, Inc. All rights
-- reserved.
-------------------------------------------------------------------
-- synopsys translate_off
library XilinxCoreLib;
-- synopsys translate_on
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use work.conv_pkg.all;
entity xlmult is
generic (
core_name0: string := "";
a_width: integer := 4;
a_bin_pt: integer := 2;
a_arith: integer := xlSigned;
b_width: integer := 4;
b_bin_pt: integer := 1;
b_arith: integer := xlSigned;
p_width: integer := 8;
p_bin_pt: integer := 2;
p_arith: integer := xlSigned;
rst_width: integer := 1;
rst_bin_pt: integer := 0;
rst_arith: integer := xlUnsigned;
en_width: integer := 1;
en_bin_pt: integer := 0;
en_arith: integer := xlUnsigned;
quantization: integer := xlTruncate;
overflow: integer := xlWrap;
extra_registers: integer := 0;
c_a_width: integer := 7;
c_b_width: integer := 7;
c_type: integer := 0;
c_a_type: integer := 0;
c_b_type: integer := 0;
c_pipelined: integer := 1;
c_baat: integer := 4;
multsign: integer := xlSigned;
c_output_width: integer := 16
);
port (
a: in std_logic_vector(a_width - 1 downto 0);
b: in std_logic_vector(b_width - 1 downto 0);
ce: in std_logic;
clr: in std_logic;
clk: in std_logic;
core_ce: in std_logic := '0';
core_clr: in std_logic := '0';
core_clk: in std_logic := '0';
rst: in std_logic_vector(rst_width - 1 downto 0);
en: in std_logic_vector(en_width - 1 downto 0);
p: out std_logic_vector(p_width - 1 downto 0)
);
end xlmult;
architecture behavior of xlmult is
component synth_reg
generic (
width: integer := 16;
latency: integer := 5
);
port (
i: in std_logic_vector(width - 1 downto 0);
ce: in std_logic;
clr: in std_logic;
clk: in std_logic;
o: out std_logic_vector(width - 1 downto 0)
);
end component;
component mult_11_2_7786f9df1b07f80e
port (
b: in std_logic_vector(c_b_width - 1 downto 0);
p: out std_logic_vector(c_output_width - 1 downto 0);
clk: in std_logic;
ce: in std_logic;
sclr: in std_logic;
a: in std_logic_vector(c_a_width - 1 downto 0)
);
end component;
attribute syn_black_box of mult_11_2_7786f9df1b07f80e:
component is true;
attribute fpga_dont_touch of mult_11_2_7786f9df1b07f80e:
component is "true";
attribute box_type of mult_11_2_7786f9df1b07f80e:
component is "black_box";
signal tmp_a: std_logic_vector(c_a_width - 1 downto 0);
signal conv_a: std_logic_vector(c_a_width - 1 downto 0);
signal tmp_b: std_logic_vector(c_b_width - 1 downto 0);
signal conv_b: std_logic_vector(c_b_width - 1 downto 0);
signal tmp_p: std_logic_vector(c_output_width - 1 downto 0);
signal conv_p: std_logic_vector(p_width - 1 downto 0);
-- synopsys translate_off
signal real_a, real_b, real_p: real;
-- synopsys translate_on
signal rfd: std_logic;
signal rdy: std_logic;
signal nd: std_logic;
signal internal_ce: std_logic;
signal internal_clr: std_logic;
signal internal_core_ce: std_logic;
begin
-- synopsys translate_off
-- synopsys translate_on
internal_ce <= ce and en(0);
internal_core_ce <= core_ce and en(0);
internal_clr <= (clr or rst(0)) and ce;
nd <= internal_ce;
input_process: process (a,b)
begin
tmp_a <= zero_ext(a, c_a_width);
tmp_b <= zero_ext(b, c_b_width);
end process;
output_process: process (tmp_p)
begin
conv_p <= convert_type(tmp_p, c_output_width, a_bin_pt+b_bin_pt, multsign,
p_width, p_bin_pt, p_arith, quantization, overflow);
end process;
comp0: if ((core_name0 = "mult_11_2_7786f9df1b07f80e")) generate
core_instance0: mult_11_2_7786f9df1b07f80e
port map (
a => tmp_a,
clk => clk,
ce => internal_ce,
sclr => internal_clr,
p => tmp_p,
b => tmp_b
);
end generate;
latency_gt_0: if (extra_registers > 0) generate
reg: synth_reg
generic map (
width => p_width,
latency => extra_registers
)
port map (
i => conv_p,
ce => internal_ce,
clr => internal_clr,
clk => clk,
o => p
);
end generate;
latency_eq_0: if (extra_registers = 0) generate
p <= conv_p;
end generate;
end architecture behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity xlcomplex_multiplier_456da30af0f77a480cf80f52b29b4396 is
port(
ce:in std_logic;
clk:in std_logic;
m_axis_dout_tdata_imag:out std_logic_vector(23 downto 0);
m_axis_dout_tdata_real:out std_logic_vector(23 downto 0);
m_axis_dout_tuser:out std_logic_vector(0 downto 0);
m_axis_dout_tvalid:out std_logic;
s_axis_a_tdata_imag:in std_logic_vector(23 downto 0);
s_axis_a_tdata_real:in std_logic_vector(23 downto 0);
s_axis_a_tvalid:in std_logic;
s_axis_b_tdata_imag:in std_logic_vector(23 downto 0);
s_axis_b_tdata_real:in std_logic_vector(23 downto 0);
s_axis_b_tuser:in std_logic_vector(0 downto 0);
s_axis_b_tvalid:in std_logic
);
end xlcomplex_multiplier_456da30af0f77a480cf80f52b29b4396;
architecture behavior of xlcomplex_multiplier_456da30af0f77a480cf80f52b29b4396 is
component cmpy_v5_0_02d02e0a23eb9773
port(
aclk:in std_logic;
aclken:in std_logic;
m_axis_dout_tdata:out std_logic_vector(47 downto 0);
m_axis_dout_tuser:out std_logic_vector(0 downto 0);
m_axis_dout_tvalid:out std_logic;
s_axis_a_tdata:in std_logic_vector(47 downto 0);
s_axis_a_tvalid:in std_logic;
s_axis_b_tdata:in std_logic_vector(47 downto 0);
s_axis_b_tuser:in std_logic_vector(0 downto 0);
s_axis_b_tvalid:in std_logic
);
end component;
signal m_axis_dout_tdata_net: std_logic_vector(47 downto 0) := (others=>'0');
signal s_axis_a_tdata_net: std_logic_vector(47 downto 0) := (others=>'0');
signal s_axis_b_tdata_net: std_logic_vector(47 downto 0) := (others=>'0');
begin
m_axis_dout_tdata_imag <= m_axis_dout_tdata_net(47 downto 24);
m_axis_dout_tdata_real <= m_axis_dout_tdata_net(23 downto 0);
s_axis_a_tdata_net(47 downto 24) <= s_axis_a_tdata_imag;
s_axis_a_tdata_net(23 downto 0) <= s_axis_a_tdata_real;
s_axis_b_tdata_net(47 downto 24) <= s_axis_b_tdata_imag;
s_axis_b_tdata_net(23 downto 0) <= s_axis_b_tdata_real;
cmpy_v5_0_02d02e0a23eb9773_instance : cmpy_v5_0_02d02e0a23eb9773
port map(
aclk=>clk,
aclken=>ce,
m_axis_dout_tdata=>m_axis_dout_tdata_net,
m_axis_dout_tuser=>m_axis_dout_tuser,
m_axis_dout_tvalid=>m_axis_dout_tvalid,
s_axis_a_tdata=>s_axis_a_tdata_net,
s_axis_a_tvalid=>s_axis_a_tvalid,
s_axis_b_tdata=>s_axis_b_tdata_net,
s_axis_b_tuser=>s_axis_b_tuser,
s_axis_b_tvalid=>s_axis_b_tvalid
);
end behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity delay_961b43f67a is
port (
d : in std_logic_vector((24 - 1) downto 0);
q : out std_logic_vector((24 - 1) downto 0);
clk : in std_logic;
ce : in std_logic;
clr : in std_logic);
end delay_961b43f67a;
architecture behavior of delay_961b43f67a is
signal d_1_22: std_logic_vector((24 - 1) downto 0);
begin
d_1_22 <= d;
q <= d_1_22;
end behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity constant_f394f3309c is
port (
op : out std_logic_vector((24 - 1) downto 0);
clk : in std_logic;
ce : in std_logic;
clr : in std_logic);
end constant_f394f3309c;
architecture behavior of constant_f394f3309c is
begin
op <= "000000000000000000000000";
end behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity reinterpret_c88e29aa6b is
port (
input_port : in std_logic_vector((61 - 1) downto 0);
output_port : out std_logic_vector((61 - 1) downto 0);
clk : in std_logic;
ce : in std_logic;
clr : in std_logic);
end reinterpret_c88e29aa6b;
architecture behavior of reinterpret_c88e29aa6b is
signal input_port_1_40: signed((61 - 1) downto 0);
begin
input_port_1_40 <= std_logic_vector_to_signed(input_port);
output_port <= signed_to_std_logic_vector(input_port_1_40);
end behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity constant_3a9a3daeb9 is
port (
op : out std_logic_vector((2 - 1) downto 0);
clk : in std_logic;
ce : in std_logic;
clr : in std_logic);
end constant_3a9a3daeb9;
architecture behavior of constant_3a9a3daeb9 is
begin
op <= "11";
end behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity constant_a7e2bb9e12 is
port (
op : out std_logic_vector((2 - 1) downto 0);
clk : in std_logic;
ce : in std_logic;
clr : in std_logic);
end constant_a7e2bb9e12;
architecture behavior of constant_a7e2bb9e12 is
begin
op <= "01";
end behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity constant_e8ddc079e9 is
port (
op : out std_logic_vector((2 - 1) downto 0);
clk : in std_logic;
ce : in std_logic;
clr : in std_logic);
end constant_e8ddc079e9;
architecture behavior of constant_e8ddc079e9 is
begin
op <= "10";
end behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity relational_367321bc0c is
port (
a : in std_logic_vector((2 - 1) downto 0);
b : in std_logic_vector((2 - 1) downto 0);
op : out std_logic_vector((1 - 1) downto 0);
clk : in std_logic;
ce : in std_logic;
clr : in std_logic);
end relational_367321bc0c;
architecture behavior of relational_367321bc0c is
signal a_1_31: unsigned((2 - 1) downto 0);
signal b_1_34: unsigned((2 - 1) downto 0);
type array_type_op_mem_32_22 is array (0 to (1 - 1)) of boolean;
signal op_mem_32_22: array_type_op_mem_32_22 := (
0 => false);
signal op_mem_32_22_front_din: boolean;
signal op_mem_32_22_back: boolean;
signal op_mem_32_22_push_front_pop_back_en: std_logic;
signal result_12_3_rel: boolean;
begin
a_1_31 <= std_logic_vector_to_unsigned(a);
b_1_34 <= std_logic_vector_to_unsigned(b);
op_mem_32_22_back <= op_mem_32_22(0);
proc_op_mem_32_22: process (clk)
is
variable i: integer;
begin
if (clk'event and (clk = '1')) then
if ((ce = '1') and (op_mem_32_22_push_front_pop_back_en = '1')) then
op_mem_32_22(0) <= op_mem_32_22_front_din;
end if;
end if;
end process proc_op_mem_32_22;
result_12_3_rel <= a_1_31 = b_1_34;
op_mem_32_22_front_din <= result_12_3_rel;
op_mem_32_22_push_front_pop_back_en <= '1';
op <= boolean_to_vector(op_mem_32_22_back);
end behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity relational_83ca2c6a3c is
port (
a : in std_logic_vector((2 - 1) downto 0);
b : in std_logic_vector((2 - 1) downto 0);
op : out std_logic_vector((1 - 1) downto 0);
clk : in std_logic;
ce : in std_logic;
clr : in std_logic);
end relational_83ca2c6a3c;
architecture behavior of relational_83ca2c6a3c is
signal a_1_31: unsigned((2 - 1) downto 0);
signal b_1_34: unsigned((2 - 1) downto 0);
type array_type_op_mem_32_22 is array (0 to (4 - 1)) of boolean;
signal op_mem_32_22: array_type_op_mem_32_22 := (
false,
false,
false,
false);
signal op_mem_32_22_front_din: boolean;
signal op_mem_32_22_back: boolean;
signal op_mem_32_22_push_front_pop_back_en: std_logic;
signal result_12_3_rel: boolean;
begin
a_1_31 <= std_logic_vector_to_unsigned(a);
b_1_34 <= std_logic_vector_to_unsigned(b);
op_mem_32_22_back <= op_mem_32_22(3);
proc_op_mem_32_22: process (clk)
is
variable i: integer;
begin
if (clk'event and (clk = '1')) then
if ((ce = '1') and (op_mem_32_22_push_front_pop_back_en = '1')) then
for i in 3 downto 1 loop
op_mem_32_22(i) <= op_mem_32_22(i-1);
end loop;
op_mem_32_22(0) <= op_mem_32_22_front_din;
end if;
end if;
end process proc_op_mem_32_22;
result_12_3_rel <= a_1_31 = b_1_34;
op_mem_32_22_front_din <= result_12_3_rel;
op_mem_32_22_push_front_pop_back_en <= '1';
op <= boolean_to_vector(op_mem_32_22_back);
end behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity xlfir_compiler_2acadf5a08d72e0ee15ce4e1ac741dc6 is
port(
ce:in std_logic;
ce_1400000:in std_logic;
ce_2800000:in std_logic;
ce_logic_1400000:in std_logic;
clk:in std_logic;
clk_1400000:in std_logic;
clk_2800000:in std_logic;
clk_logic_1400000:in std_logic;
event_s_data_chanid_incorrect:out std_logic;
m_axis_data_tdata:out std_logic_vector(24 downto 0);
m_axis_data_tuser_chanid:out std_logic_vector(1 downto 0);
m_axis_data_tvalid:out std_logic;
s_axis_data_tdata:in std_logic_vector(23 downto 0);
s_axis_data_tready:out std_logic;
s_axis_data_tuser_chanid:in std_logic_vector(1 downto 0);
src_ce:in std_logic;
src_clk:in std_logic
);
end xlfir_compiler_2acadf5a08d72e0ee15ce4e1ac741dc6;
architecture behavior of xlfir_compiler_2acadf5a08d72e0ee15ce4e1ac741dc6 is
component fr_cmplr_v6_3_8e79a078fc118dc6
port(
aclk:in std_logic;
aclken:in std_logic;
event_s_data_chanid_incorrect:out std_logic;
m_axis_data_tdata:out std_logic_vector(31 downto 0);
m_axis_data_tuser:out std_logic_vector(1 downto 0);
m_axis_data_tvalid:out std_logic;
s_axis_data_tdata:in std_logic_vector(23 downto 0);
s_axis_data_tready:out std_logic;
s_axis_data_tuser:in std_logic_vector(1 downto 0);
s_axis_data_tvalid:in std_logic
);
end component;
signal m_axis_data_tdata_net: std_logic_vector(31 downto 0) := (others=>'0');
signal m_axis_data_tdata_ps_net: std_logic_vector(24 downto 0) := (others=>'0');
signal m_axis_data_tuser_net: std_logic_vector(1 downto 0) := (others=>'0');
signal m_axis_data_tuser_chanid_ps_net: std_logic_vector(1 downto 0) := (others=>'0');
signal m_axis_data_tvalid_ps_net: std_logic := '0';
signal m_axis_data_tvalid_ps_net_captured: std_logic := '0';
signal m_axis_data_tvalid_ps_net_or_captured_net: std_logic := '0';
signal s_axis_data_tdata_net: std_logic_vector(23 downto 0) := (others=>'0');
signal s_axis_data_tuser_net: std_logic_vector(1 downto 0) := (others=>'0');
begin
m_axis_data_tdata_ps_net <= m_axis_data_tdata_net(24 downto 0);
m_axis_data_tuser_chanid_ps_net <= m_axis_data_tuser_net(1 downto 0);
s_axis_data_tdata_net(23 downto 0) <= s_axis_data_tdata;
s_axis_data_tuser_net(1 downto 0) <= s_axis_data_tuser_chanid;
m_axis_data_tdata_ps_net_synchronizer : entity work.synth_reg_w_init
generic map(
width => 25,
init_index => 0,
init_value => "0",
latency => 1
)
port map (
i => m_axis_data_tdata_ps_net,
ce => ce_2800000,
clr => '0',
clk => clk_2800000,
o => m_axis_data_tdata
);
m_axis_data_tuser_chanid_ps_net_synchronizer : entity work.synth_reg_w_init
generic map(
width => 2,
init_index => 0,
init_value => "0",
latency => 1
)
port map (
i => m_axis_data_tuser_chanid_ps_net,
ce => ce_2800000,
clr => '0',
clk => clk_2800000,
o => m_axis_data_tuser_chanid
);
m_axis_data_tvalid_ps_net_or_captured_net <= m_axis_data_tvalid_ps_net or m_axis_data_tvalid_ps_net_captured;
m_axis_data_tvalid_ps_net_synchronizer_1 : entity work.synth_reg_w_init
generic map(
width => 1,
init_index => 0,
init_value => "0",
latency => 1
)
port map (
i(0) => m_axis_data_tvalid_ps_net_or_captured_net,
ce => ce_2800000,
clr => '0',
clk => clk_2800000,
o(0) => m_axis_data_tvalid
);
m_axis_data_tvalid_ps_net_synchronizer_2 : entity work.synth_reg_w_init
generic map(
width => 1,
init_index => 0,
init_value => "0",
latency => 1
)
port map (
i(0) => '1',
ce => m_axis_data_tvalid_ps_net,
clr => '0',
clk => clk_2800000,
o(0) => m_axis_data_tvalid_ps_net_captured
);
fr_cmplr_v6_3_8e79a078fc118dc6_instance : fr_cmplr_v6_3_8e79a078fc118dc6
port map(
aclk=>clk,
aclken=>ce,
event_s_data_chanid_incorrect=>event_s_data_chanid_incorrect,
m_axis_data_tdata=>m_axis_data_tdata_net,
m_axis_data_tuser=>m_axis_data_tuser_net,
m_axis_data_tvalid=>m_axis_data_tvalid_ps_net,
s_axis_data_tdata=>s_axis_data_tdata_net,
s_axis_data_tready=>s_axis_data_tready,
s_axis_data_tuser=>s_axis_data_tuser_net,
s_axis_data_tvalid=>ce_logic_1400000
);
end behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity xlcic_compiler_6efc67831a277bdb0701519c5a976f20 is
port(
ce:in std_logic;
ce_1400000:in std_logic;
ce_560:in std_logic;
ce_logic_560:in std_logic;
clk:in std_logic;
clk_1400000:in std_logic;
clk_560:in std_logic;
clk_logic_560:in std_logic;
event_tlast_missing:out std_logic;
event_tlast_unexpected:out std_logic;
m_axis_data_tdata_data:out std_logic_vector(60 downto 0);
m_axis_data_tlast:out std_logic;
m_axis_data_tuser_chan_out:out std_logic_vector(1 downto 0);
m_axis_data_tuser_chan_sync:out std_logic_vector(0 downto 0);
m_axis_data_tvalid:out std_logic;
s_axis_data_tdata_data:in std_logic_vector(23 downto 0);
s_axis_data_tlast:in std_logic;
s_axis_data_tready:out std_logic
);
end xlcic_compiler_6efc67831a277bdb0701519c5a976f20;
architecture behavior of xlcic_compiler_6efc67831a277bdb0701519c5a976f20 is
component cc_cmplr_v3_0_e58a4eb9f6488d2d
port(
aclk:in std_logic;
aclken:in std_logic;
event_tlast_missing:out std_logic;
event_tlast_unexpected:out std_logic;
m_axis_data_tdata:out std_logic_vector(63 downto 0);
m_axis_data_tlast:out std_logic;
m_axis_data_tuser:out std_logic_vector(15 downto 0);
m_axis_data_tvalid:out std_logic;
s_axis_data_tdata:in std_logic_vector(23 downto 0);
s_axis_data_tlast:in std_logic;
s_axis_data_tready:out std_logic;
s_axis_data_tvalid:in std_logic
);
end component;
signal m_axis_data_tdata_net: std_logic_vector(63 downto 0) := (others=>'0');
signal m_axis_data_tdata_data_ps_net: std_logic_vector(60 downto 0) := (others=>'0');
signal m_axis_data_tdata_data_ps_net_captured: std_logic_vector(60 downto 0) := (others=>'0');
signal m_axis_data_tdata_data_ps_net_or_captured_net: std_logic_vector(60 downto 0) := (others=>'0');
signal m_axis_data_tlast_ps_net: std_logic := '0';
signal m_axis_data_tlast_ps_net_captured: std_logic := '0';
signal m_axis_data_tlast_ps_net_or_captured_net: std_logic := '0';
signal m_axis_data_tuser_net: std_logic_vector(15 downto 0) := (others=>'0');
signal m_axis_data_tuser_chan_sync_ps_net: std_logic_vector(0 downto 0) := (others=>'0');
signal m_axis_data_tuser_chan_sync_ps_net_captured: std_logic_vector(0 downto 0) := (others=>'0');
signal m_axis_data_tuser_chan_sync_ps_net_or_captured_net: std_logic_vector(0 downto 0) := (others=>'0');
signal m_axis_data_tuser_chan_out_ps_net: std_logic_vector(1 downto 0) := (others=>'0');
signal m_axis_data_tuser_chan_out_ps_net_captured: std_logic_vector(1 downto 0) := (others=>'0');
signal m_axis_data_tuser_chan_out_ps_net_or_captured_net: std_logic_vector(1 downto 0) := (others=>'0');
signal m_axis_data_tvalid_ps_net: std_logic := '0';
signal m_axis_data_tvalid_ps_net_captured: std_logic := '0';
signal m_axis_data_tvalid_ps_net_or_captured_net: std_logic := '0';
signal s_axis_data_tdata_net: std_logic_vector(23 downto 0) := (others=>'0');
begin
m_axis_data_tdata_data_ps_net <= m_axis_data_tdata_net(60 downto 0);
m_axis_data_tuser_chan_sync_ps_net <= m_axis_data_tuser_net(8 downto 8);
m_axis_data_tuser_chan_out_ps_net <= m_axis_data_tuser_net(1 downto 0);
s_axis_data_tdata_net(23 downto 0) <= s_axis_data_tdata_data;
m_axis_data_tdata_data_ps_net_or_captured_net <= m_axis_data_tdata_data_ps_net or m_axis_data_tdata_data_ps_net_captured;
m_axis_data_tdata_data_ps_net_synchronizer_1 : entity work.synth_reg_w_init
generic map(
width => 61,
init_index => 0,
init_value => "0",
latency => 1
)
port map (
i => m_axis_data_tdata_data_ps_net_or_captured_net,
ce => ce_1400000,
clr => '0',
clk => clk_1400000,
o => m_axis_data_tdata_data
);
m_axis_data_tdata_data_ps_net_synchronizer_2 : entity work.synth_reg_w_init
generic map(
width => 61,
init_index => 0,
init_value => "0",
latency => 1
)
port map (
i => m_axis_data_tdata_data_ps_net,
ce => m_axis_data_tvalid_ps_net,
clr => '0',
clk => clk_1400000,
o => m_axis_data_tdata_data_ps_net_captured
);
m_axis_data_tlast_ps_net_or_captured_net <= m_axis_data_tlast_ps_net or m_axis_data_tlast_ps_net_captured;
m_axis_data_tlast_ps_net_synchronizer_1 : entity work.synth_reg_w_init
generic map(
width => 1,
init_index => 0,
init_value => "0",
latency => 1
)
port map (
i(0) => m_axis_data_tlast_ps_net_or_captured_net,
ce => ce_1400000,
clr => '0',
clk => clk_1400000,
o(0) => m_axis_data_tlast
);
m_axis_data_tlast_ps_net_synchronizer_2 : entity work.synth_reg_w_init
generic map(
width => 1,
init_index => 0,
init_value => "0",
latency => 1
)
port map (
i(0) => m_axis_data_tlast_ps_net,
ce => m_axis_data_tvalid_ps_net,
clr => '0',
clk => clk_1400000,
o(0) => m_axis_data_tlast_ps_net_captured
);
m_axis_data_tuser_chan_sync_ps_net_or_captured_net <= m_axis_data_tuser_chan_sync_ps_net or m_axis_data_tuser_chan_sync_ps_net_captured;
m_axis_data_tuser_chan_sync_ps_net_synchronizer_1 : entity work.synth_reg_w_init
generic map(
width => 1,
init_index => 0,
init_value => "0",
latency => 1
)
port map (
i => m_axis_data_tuser_chan_sync_ps_net_or_captured_net,
ce => ce_1400000,
clr => '0',
clk => clk_1400000,
o => m_axis_data_tuser_chan_sync
);
m_axis_data_tuser_chan_sync_ps_net_synchronizer_2 : entity work.synth_reg_w_init
generic map(
width => 1,
init_index => 0,
init_value => "0",
latency => 1
)
port map (
i => m_axis_data_tuser_chan_sync_ps_net,
ce => m_axis_data_tvalid_ps_net,
clr => '0',
clk => clk_1400000,
o => m_axis_data_tuser_chan_sync_ps_net_captured
);
m_axis_data_tuser_chan_out_ps_net_or_captured_net <= m_axis_data_tuser_chan_out_ps_net or m_axis_data_tuser_chan_out_ps_net_captured;
m_axis_data_tuser_chan_out_ps_net_synchronizer_1 : entity work.synth_reg_w_init
generic map(
width => 2,
init_index => 0,
init_value => "0",
latency => 1
)
port map (
i => m_axis_data_tuser_chan_out_ps_net_or_captured_net,
ce => ce_1400000,
clr => '0',
clk => clk_1400000,
o => m_axis_data_tuser_chan_out
);
m_axis_data_tuser_chan_out_ps_net_synchronizer_2 : entity work.synth_reg_w_init
generic map(
width => 2,
init_index => 0,
init_value => "0",
latency => 1
)
port map (
i => m_axis_data_tuser_chan_out_ps_net,
ce => m_axis_data_tvalid_ps_net,
clr => '0',
clk => clk_1400000,
o => m_axis_data_tuser_chan_out_ps_net_captured
);
m_axis_data_tvalid_ps_net_or_captured_net <= m_axis_data_tvalid_ps_net or m_axis_data_tvalid_ps_net_captured;
m_axis_data_tvalid_ps_net_synchronizer_1 : entity work.synth_reg_w_init
generic map(
width => 1,
init_index => 0,
init_value => "0",
latency => 1
)
port map (
i(0) => m_axis_data_tvalid_ps_net_or_captured_net,
ce => ce_1400000,
clr => '0',
clk => clk_1400000,
o(0) => m_axis_data_tvalid
);
m_axis_data_tvalid_ps_net_synchronizer_2 : entity work.synth_reg_w_init
generic map(
width => 1,
init_index => 0,
init_value => "0",
latency => 1
)
port map (
i(0) => '1',
ce => m_axis_data_tvalid_ps_net,
clr => '0',
clk => clk_1400000,
o(0) => m_axis_data_tvalid_ps_net_captured
);
cc_cmplr_v3_0_e58a4eb9f6488d2d_instance : cc_cmplr_v3_0_e58a4eb9f6488d2d
port map(
aclk=>clk,
aclken=>ce,
event_tlast_missing=>event_tlast_missing,
event_tlast_unexpected=>event_tlast_unexpected,
m_axis_data_tdata=>m_axis_data_tdata_net,
m_axis_data_tlast=>m_axis_data_tlast_ps_net,
m_axis_data_tuser=>m_axis_data_tuser_net,
m_axis_data_tvalid=>m_axis_data_tvalid_ps_net,
s_axis_data_tdata=>s_axis_data_tdata_net,
s_axis_data_tlast=>s_axis_data_tlast,
s_axis_data_tready=>s_axis_data_tready,
s_axis_data_tvalid=>ce_logic_560
);
end behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity xlfir_compiler_1da691037bdf8c1b85b3b4502d6e9610 is
port(
ce:in std_logic;
ce_2800000:in std_logic;
ce_5600000:in std_logic;
ce_logic_2800000:in std_logic;
clk:in std_logic;
clk_2800000:in std_logic;
clk_5600000:in std_logic;
clk_logic_2800000:in std_logic;
event_s_data_chanid_incorrect:out std_logic;
m_axis_data_tdata:out std_logic_vector(24 downto 0);
m_axis_data_tuser_chanid:out std_logic_vector(1 downto 0);
m_axis_data_tvalid:out std_logic;
s_axis_data_tdata:in std_logic_vector(23 downto 0);
s_axis_data_tready:out std_logic;
s_axis_data_tuser_chanid:in std_logic_vector(1 downto 0);
src_ce:in std_logic;
src_clk:in std_logic
);
end xlfir_compiler_1da691037bdf8c1b85b3b4502d6e9610;
architecture behavior of xlfir_compiler_1da691037bdf8c1b85b3b4502d6e9610 is
component fr_cmplr_v6_3_15ffe94f3ff4129f
port(
aclk:in std_logic;
aclken:in std_logic;
event_s_data_chanid_incorrect:out std_logic;
m_axis_data_tdata:out std_logic_vector(31 downto 0);
m_axis_data_tuser:out std_logic_vector(1 downto 0);
m_axis_data_tvalid:out std_logic;
s_axis_data_tdata:in std_logic_vector(23 downto 0);
s_axis_data_tready:out std_logic;
s_axis_data_tuser:in std_logic_vector(1 downto 0);
s_axis_data_tvalid:in std_logic
);
end component;
signal m_axis_data_tdata_net: std_logic_vector(31 downto 0) := (others=>'0');
signal m_axis_data_tdata_ps_net: std_logic_vector(24 downto 0) := (others=>'0');
signal m_axis_data_tuser_net: std_logic_vector(1 downto 0) := (others=>'0');
signal m_axis_data_tuser_chanid_ps_net: std_logic_vector(1 downto 0) := (others=>'0');
signal m_axis_data_tvalid_ps_net: std_logic := '0';
signal m_axis_data_tvalid_ps_net_captured: std_logic := '0';
signal m_axis_data_tvalid_ps_net_or_captured_net: std_logic := '0';
signal s_axis_data_tdata_net: std_logic_vector(23 downto 0) := (others=>'0');
signal s_axis_data_tuser_net: std_logic_vector(1 downto 0) := (others=>'0');
begin
m_axis_data_tdata_ps_net <= m_axis_data_tdata_net(24 downto 0);
m_axis_data_tuser_chanid_ps_net <= m_axis_data_tuser_net(1 downto 0);
s_axis_data_tdata_net(23 downto 0) <= s_axis_data_tdata;
s_axis_data_tuser_net(1 downto 0) <= s_axis_data_tuser_chanid;
m_axis_data_tdata_ps_net_synchronizer : entity work.synth_reg_w_init
generic map(
width => 25,
init_index => 0,
init_value => "0",
latency => 1
)
port map (
i => m_axis_data_tdata_ps_net,
ce => ce_5600000,
clr => '0',
clk => clk_5600000,
o => m_axis_data_tdata
);
m_axis_data_tuser_chanid_ps_net_synchronizer : entity work.synth_reg_w_init
generic map(
width => 2,
init_index => 0,
init_value => "0",
latency => 1
)
port map (
i => m_axis_data_tuser_chanid_ps_net,
ce => ce_5600000,
clr => '0',
clk => clk_5600000,
o => m_axis_data_tuser_chanid
);
m_axis_data_tvalid_ps_net_or_captured_net <= m_axis_data_tvalid_ps_net or m_axis_data_tvalid_ps_net_captured;
m_axis_data_tvalid_ps_net_synchronizer_1 : entity work.synth_reg_w_init
generic map(
width => 1,
init_index => 0,
init_value => "0",
latency => 1
)
port map (
i(0) => m_axis_data_tvalid_ps_net_or_captured_net,
ce => ce_5600000,
clr => '0',
clk => clk_5600000,
o(0) => m_axis_data_tvalid
);
m_axis_data_tvalid_ps_net_synchronizer_2 : entity work.synth_reg_w_init
generic map(
width => 1,
init_index => 0,
init_value => "0",
latency => 1
)
port map (
i(0) => '1',
ce => m_axis_data_tvalid_ps_net,
clr => '0',
clk => clk_5600000,
o(0) => m_axis_data_tvalid_ps_net_captured
);
fr_cmplr_v6_3_15ffe94f3ff4129f_instance : fr_cmplr_v6_3_15ffe94f3ff4129f
port map(
aclk=>clk,
aclken=>ce,
event_s_data_chanid_incorrect=>event_s_data_chanid_incorrect,
m_axis_data_tdata=>m_axis_data_tdata_net,
m_axis_data_tuser=>m_axis_data_tuser_net,
m_axis_data_tvalid=>m_axis_data_tvalid_ps_net,
s_axis_data_tdata=>s_axis_data_tdata_net,
s_axis_data_tready=>s_axis_data_tready,
s_axis_data_tuser=>s_axis_data_tuser_net,
s_axis_data_tvalid=>ce_logic_2800000
);
end behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity xlfir_compiler_6508759a07908936c4d12ef4ec464ceb is
port(
ce:in std_logic;
ce_35:in std_logic;
ce_logic_1:in std_logic;
clk:in std_logic;
clk_35:in std_logic;
clk_logic_1:in std_logic;
event_s_data_chanid_incorrect:out std_logic;
m_axis_data_tdata_path0:out std_logic_vector(24 downto 0);
m_axis_data_tdata_path1:out std_logic_vector(24 downto 0);
m_axis_data_tuser_chanid:out std_logic_vector(0 downto 0);
m_axis_data_tvalid:out std_logic;
s_axis_data_tdata_path0:in std_logic_vector(23 downto 0);
s_axis_data_tdata_path1:in std_logic_vector(23 downto 0);
s_axis_data_tready:out std_logic;
s_axis_data_tuser_chanid:in std_logic_vector(0 downto 0);
src_ce:in std_logic;
src_clk:in std_logic
);
end xlfir_compiler_6508759a07908936c4d12ef4ec464ceb;
architecture behavior of xlfir_compiler_6508759a07908936c4d12ef4ec464ceb is
component fr_cmplr_v6_3_483a28da4a562c1e
port(
aclk:in std_logic;
aclken:in std_logic;
event_s_data_chanid_incorrect:out std_logic;
m_axis_data_tdata:out std_logic_vector(63 downto 0);
m_axis_data_tuser:out std_logic_vector(0 downto 0);
m_axis_data_tvalid:out std_logic;
s_axis_data_tdata:in std_logic_vector(47 downto 0);
s_axis_data_tready:out std_logic;
s_axis_data_tuser:in std_logic_vector(0 downto 0);
s_axis_data_tvalid:in std_logic
);
end component;
signal m_axis_data_tdata_net: std_logic_vector(63 downto 0) := (others=>'0');
signal m_axis_data_tdata_path1_ps_net: std_logic_vector(24 downto 0) := (others=>'0');
signal m_axis_data_tdata_path0_ps_net: std_logic_vector(24 downto 0) := (others=>'0');
signal m_axis_data_tuser_net: std_logic_vector(0 downto 0) := (others=>'0');
signal m_axis_data_tuser_chanid_ps_net: std_logic_vector(0 downto 0) := (others=>'0');
signal m_axis_data_tvalid_ps_net: std_logic := '0';
signal m_axis_data_tvalid_ps_net_captured: std_logic := '0';
signal m_axis_data_tvalid_ps_net_or_captured_net: std_logic := '0';
signal s_axis_data_tdata_net: std_logic_vector(47 downto 0) := (others=>'0');
signal s_axis_data_tuser_net: std_logic_vector(0 downto 0) := (others=>'0');
begin
m_axis_data_tdata_path1_ps_net <= m_axis_data_tdata_net(56 downto 32);
m_axis_data_tdata_path0_ps_net <= m_axis_data_tdata_net(24 downto 0);
m_axis_data_tuser_chanid_ps_net <= m_axis_data_tuser_net(0 downto 0);
s_axis_data_tdata_net(47 downto 24) <= s_axis_data_tdata_path1;
s_axis_data_tdata_net(23 downto 0) <= s_axis_data_tdata_path0;
s_axis_data_tuser_net(0 downto 0) <= s_axis_data_tuser_chanid;
m_axis_data_tdata_path1_ps_net_synchronizer : entity work.synth_reg_w_init
generic map(
width => 25,
init_index => 0,
init_value => "0",
latency => 1
)
port map (
i => m_axis_data_tdata_path1_ps_net,
ce => ce_35,
clr => '0',
clk => clk_35,
o => m_axis_data_tdata_path1
);
m_axis_data_tdata_path0_ps_net_synchronizer : entity work.synth_reg_w_init
generic map(
width => 25,
init_index => 0,
init_value => "0",
latency => 1
)
port map (
i => m_axis_data_tdata_path0_ps_net,
ce => ce_35,
clr => '0',
clk => clk_35,
o => m_axis_data_tdata_path0
);
m_axis_data_tuser_chanid_ps_net_synchronizer : entity work.synth_reg_w_init
generic map(
width => 1,
init_index => 0,
init_value => "0",
latency => 1
)
port map (
i => m_axis_data_tuser_chanid_ps_net,
ce => ce_35,
clr => '0',
clk => clk_35,
o => m_axis_data_tuser_chanid
);
m_axis_data_tvalid_ps_net_or_captured_net <= m_axis_data_tvalid_ps_net or m_axis_data_tvalid_ps_net_captured;
m_axis_data_tvalid_ps_net_synchronizer_1 : entity work.synth_reg_w_init
generic map(
width => 1,
init_index => 0,
init_value => "0",
latency => 1
)
port map (
i(0) => m_axis_data_tvalid_ps_net_or_captured_net,
ce => ce_35,
clr => '0',
clk => clk_35,
o(0) => m_axis_data_tvalid
);
m_axis_data_tvalid_ps_net_synchronizer_2 : entity work.synth_reg_w_init
generic map(
width => 1,
init_index => 0,
init_value => "0",
latency => 1
)
port map (
i(0) => '1',
ce => m_axis_data_tvalid_ps_net,
clr => '0',
clk => clk_35,
o(0) => m_axis_data_tvalid_ps_net_captured
);
fr_cmplr_v6_3_483a28da4a562c1e_instance : fr_cmplr_v6_3_483a28da4a562c1e
port map(
aclk=>clk,
aclken=>ce,
event_s_data_chanid_incorrect=>event_s_data_chanid_incorrect,
m_axis_data_tdata=>m_axis_data_tdata_net,
m_axis_data_tuser=>m_axis_data_tuser_net,
m_axis_data_tvalid=>m_axis_data_tvalid_ps_net,
s_axis_data_tdata=>s_axis_data_tdata_net,
s_axis_data_tready=>s_axis_data_tready,
s_axis_data_tuser=>s_axis_data_tuser_net,
s_axis_data_tvalid=>ce_logic_1
);
end behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity mux_f062741975 is
port (
sel : in std_logic_vector((2 - 1) downto 0);
d0 : in std_logic_vector((24 - 1) downto 0);
d1 : in std_logic_vector((24 - 1) downto 0);
d2 : in std_logic_vector((24 - 1) downto 0);
d3 : in std_logic_vector((24 - 1) downto 0);
y : out std_logic_vector((24 - 1) downto 0);
clk : in std_logic;
ce : in std_logic;
clr : in std_logic);
end mux_f062741975;
architecture behavior of mux_f062741975 is
signal sel_1_20: std_logic_vector((2 - 1) downto 0);
signal d0_1_24: std_logic_vector((24 - 1) downto 0);
signal d1_1_27: std_logic_vector((24 - 1) downto 0);
signal d2_1_30: std_logic_vector((24 - 1) downto 0);
signal d3_1_33: std_logic_vector((24 - 1) downto 0);
signal unregy_join_6_1: std_logic_vector((24 - 1) downto 0);
begin
sel_1_20 <= sel;
d0_1_24 <= d0;
d1_1_27 <= d1;
d2_1_30 <= d2;
d3_1_33 <= d3;
proc_switch_6_1: process (d0_1_24, d1_1_27, d2_1_30, d3_1_33, sel_1_20)
is
begin
case sel_1_20 is
when "00" =>
unregy_join_6_1 <= d0_1_24;
when "01" =>
unregy_join_6_1 <= d1_1_27;
when "10" =>
unregy_join_6_1 <= d2_1_30;
when others =>
unregy_join_6_1 <= d3_1_33;
end case;
end process proc_switch_6_1;
y <= unregy_join_6_1;
end behavior;
-------------------------------------------------------------------
-- System Generator version 13.4 VHDL source file.
--
-- Copyright(C) 2011 by Xilinx, Inc. All rights reserved. This
-- text/file contains proprietary, confidential information of Xilinx,
-- Inc., is distributed under license from Xilinx, Inc., and may be used,
-- copied and/or disclosed only pursuant to the terms of a valid license
-- agreement with Xilinx, Inc. Xilinx hereby grants you a license to use
-- this text/file solely for design, simulation, implementation and
-- creation of design files limited to Xilinx devices or technologies.
-- Use with non-Xilinx devices or technologies is expressly prohibited
-- and immediately terminates your license unless covered by a separate
-- agreement.
--
-- Xilinx is providing this design, code, or information "as is" solely
-- for use in developing programs and solutions for Xilinx devices. By
-- providing this design, code, or information as one possible
-- implementation of this feature, application or standard, Xilinx is
-- making no representation that this implementation is free from any
-- claims of infringement. You are responsible for obtaining any rights
-- you may require for your implementation. Xilinx expressly disclaims
-- any warranty whatsoever with respect to the adequacy of the
-- implementation, including but not limited to warranties of
-- merchantability or fitness for a particular purpose.
--
-- Xilinx products are not intended for use in life support appliances,
-- devices, or systems. Use in such applications is expressly prohibited.
--
-- Any modifications that are made to the source code are done at the user's
-- sole risk and will be unsupported.
--
-- This copyright and support notice must be retained as part of this
-- text at all times. (c) Copyright 1995-2011 Xilinx, Inc. All rights
-- reserved.
-------------------------------------------------------------------
-- synopsys translate_off
library XilinxCoreLib;
-- synopsys translate_on
library IEEE;
use IEEE.std_logic_1164.all;
use work.conv_pkg.all;
entity xlcounter_free is
generic (
core_name0: string := "";
op_width: integer := 5;
op_arith: integer := xlSigned
);
port (
ce: in std_logic;
clr: in std_logic;
clk: in std_logic;
op: out std_logic_vector(op_width - 1 downto 0);
up: in std_logic_vector(0 downto 0) := (others => '0');
load: in std_logic_vector(0 downto 0) := (others => '0');
din: in std_logic_vector(op_width - 1 downto 0) := (others => '0');
en: in std_logic_vector(0 downto 0);
rst: in std_logic_vector(0 downto 0)
);
end xlcounter_free ;
architecture behavior of xlcounter_free is
component cntr_11_0_eb46eda57512a5a4
port (
clk: in std_logic;
ce: in std_logic;
SINIT: in std_logic;
q: out std_logic_vector(op_width - 1 downto 0)
);
end component;
attribute syn_black_box of cntr_11_0_eb46eda57512a5a4:
component is true;
attribute fpga_dont_touch of cntr_11_0_eb46eda57512a5a4:
component is "true";
attribute box_type of cntr_11_0_eb46eda57512a5a4:
component is "black_box";
-- synopsys translate_off
constant zeroVec: std_logic_vector(op_width - 1 downto 0) := (others => '0');
constant oneVec: std_logic_vector(op_width - 1 downto 0) := (others => '1');
constant zeroStr: string(1 to op_width) :=
std_logic_vector_to_bin_string(zeroVec);
constant oneStr: string(1 to op_width) :=
std_logic_vector_to_bin_string(oneVec);
-- synopsys translate_on
signal core_sinit: std_logic;
signal core_ce: std_logic;
signal op_net: std_logic_vector(op_width - 1 downto 0);
begin
core_ce <= ce and en(0);
core_sinit <= (clr or rst(0)) and ce;
op <= op_net;
comp0: if ((core_name0 = "cntr_11_0_eb46eda57512a5a4")) generate
core_instance0: cntr_11_0_eb46eda57512a5a4
port map (
clk => clk,
ce => core_ce,
SINIT => core_sinit,
q => op_net
);
end generate;
end behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity mux_187c900130 is
port (
sel : in std_logic_vector((2 - 1) downto 0);
d0 : in std_logic_vector((26 - 1) downto 0);
d1 : in std_logic_vector((26 - 1) downto 0);
d2 : in std_logic_vector((26 - 1) downto 0);
d3 : in std_logic_vector((26 - 1) downto 0);
y : out std_logic_vector((26 - 1) downto 0);
clk : in std_logic;
ce : in std_logic;
clr : in std_logic);
end mux_187c900130;
architecture behavior of mux_187c900130 is
signal sel_1_20: std_logic_vector((2 - 1) downto 0);
signal d0_1_24: std_logic_vector((26 - 1) downto 0);
signal d1_1_27: std_logic_vector((26 - 1) downto 0);
signal d2_1_30: std_logic_vector((26 - 1) downto 0);
signal d3_1_33: std_logic_vector((26 - 1) downto 0);
signal unregy_join_6_1: std_logic_vector((26 - 1) downto 0);
begin
sel_1_20 <= sel;
d0_1_24 <= d0;
d1_1_27 <= d1;
d2_1_30 <= d2;
d3_1_33 <= d3;
proc_switch_6_1: process (d0_1_24, d1_1_27, d2_1_30, d3_1_33, sel_1_20)
is
begin
case sel_1_20 is
when "00" =>
unregy_join_6_1 <= d0_1_24;
when "01" =>
unregy_join_6_1 <= d1_1_27;
when "10" =>
unregy_join_6_1 <= d2_1_30;
when others =>
unregy_join_6_1 <= d3_1_33;
end case;
end process proc_switch_6_1;
y <= unregy_join_6_1;
end behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity reinterpret_60ea556961 is
port (
input_port : in std_logic_vector((25 - 1) downto 0);
output_port : out std_logic_vector((25 - 1) downto 0);
clk : in std_logic;
ce : in std_logic;
clr : in std_logic);
end reinterpret_60ea556961;
architecture behavior of reinterpret_60ea556961 is
signal input_port_1_40: unsigned((25 - 1) downto 0);
signal output_port_5_5_force: signed((25 - 1) downto 0);
begin
input_port_1_40 <= std_logic_vector_to_unsigned(input_port);
output_port_5_5_force <= unsigned_to_signed(input_port_1_40);
output_port <= signed_to_std_logic_vector(output_port_5_5_force);
end behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity bitbasher_a756ba0096 is
port (
din : in std_logic_vector((26 - 1) downto 0);
dout : out std_logic_vector((25 - 1) downto 0);
vld_out : out std_logic_vector((1 - 1) downto 0);
clk : in std_logic;
ce : in std_logic;
clr : in std_logic);
end bitbasher_a756ba0096;
architecture behavior of bitbasher_a756ba0096 is
signal din_1_37: unsigned((26 - 1) downto 0);
signal slice_5_31: unsigned((25 - 1) downto 0);
signal fulldout_5_1_concat: unsigned((25 - 1) downto 0);
signal slice_6_44: unsigned((1 - 1) downto 0);
signal concat_6_35: unsigned((1 - 1) downto 0);
signal fullvld_out_6_1_concat: unsigned((1 - 1) downto 0);
begin
din_1_37 <= std_logic_vector_to_unsigned(din);
slice_5_31 <= u2u_slice(din_1_37, 24, 0);
fulldout_5_1_concat <= std_logic_vector_to_unsigned(unsigned_to_std_logic_vector(slice_5_31));
slice_6_44 <= u2u_slice(din_1_37, 25, 25);
concat_6_35 <= std_logic_vector_to_unsigned(unsigned_to_std_logic_vector(slice_6_44));
fullvld_out_6_1_concat <= std_logic_vector_to_unsigned(unsigned_to_std_logic_vector(concat_6_35));
dout <= unsigned_to_std_logic_vector(fulldout_5_1_concat);
vld_out <= unsigned_to_std_logic_vector(fullvld_out_6_1_concat);
end behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity inverter_e5b38cca3b is
port (
ip : in std_logic_vector((1 - 1) downto 0);
op : out std_logic_vector((1 - 1) downto 0);
clk : in std_logic;
ce : in std_logic;
clr : in std_logic);
end inverter_e5b38cca3b;
architecture behavior of inverter_e5b38cca3b is
signal ip_1_26: boolean;
type array_type_op_mem_22_20 is array (0 to (1 - 1)) of boolean;
signal op_mem_22_20: array_type_op_mem_22_20 := (
0 => false);
signal op_mem_22_20_front_din: boolean;
signal op_mem_22_20_back: boolean;
signal op_mem_22_20_push_front_pop_back_en: std_logic;
signal internal_ip_12_1_bitnot: boolean;
begin
ip_1_26 <= ((ip) = "1");
op_mem_22_20_back <= op_mem_22_20(0);
proc_op_mem_22_20: process (clk)
is
variable i: integer;
begin
if (clk'event and (clk = '1')) then
if ((ce = '1') and (op_mem_22_20_push_front_pop_back_en = '1')) then
op_mem_22_20(0) <= op_mem_22_20_front_din;
end if;
end if;
end process proc_op_mem_22_20;
internal_ip_12_1_bitnot <= ((not boolean_to_vector(ip_1_26)) = "1");
op_mem_22_20_push_front_pop_back_en <= '0';
op <= boolean_to_vector(internal_ip_12_1_bitnot);
end behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity logical_80f90b97d0 is
port (
d0 : in std_logic_vector((1 - 1) downto 0);
d1 : in std_logic_vector((1 - 1) downto 0);
y : out std_logic_vector((1 - 1) downto 0);
clk : in std_logic;
ce : in std_logic;
clr : in std_logic);
end logical_80f90b97d0;
architecture behavior of logical_80f90b97d0 is
signal d0_1_24: std_logic;
signal d1_1_27: std_logic;
signal fully_2_1_bit: std_logic;
begin
d0_1_24 <= d0(0);
d1_1_27 <= d1(0);
fully_2_1_bit <= d0_1_24 and d1_1_27;
y <= std_logic_to_vector(fully_2_1_bit);
end behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity logical_aacf6e1b0e is
port (
d0 : in std_logic_vector((1 - 1) downto 0);
d1 : in std_logic_vector((1 - 1) downto 0);
y : out std_logic_vector((1 - 1) downto 0);
clk : in std_logic;
ce : in std_logic;
clr : in std_logic);
end logical_aacf6e1b0e;
architecture behavior of logical_aacf6e1b0e is
signal d0_1_24: std_logic;
signal d1_1_27: std_logic;
signal fully_2_1_bit: std_logic;
begin
d0_1_24 <= d0(0);
d1_1_27 <= d1(0);
fully_2_1_bit <= d0_1_24 or d1_1_27;
y <= std_logic_to_vector(fully_2_1_bit);
end behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity expr_375d7bbece is
port (
a : in std_logic_vector((1 - 1) downto 0);
b : in std_logic_vector((1 - 1) downto 0);
c : in std_logic_vector((1 - 1) downto 0);
dout : out std_logic_vector((1 - 1) downto 0);
clk : in std_logic;
ce : in std_logic;
clr : in std_logic);
end expr_375d7bbece;
architecture behavior of expr_375d7bbece is
signal a_1_24: boolean;
signal b_1_27: boolean;
signal c_1_30: boolean;
signal bit_6_36: boolean;
signal fulldout_6_2_bit: boolean;
begin
a_1_24 <= ((a) = "1");
b_1_27 <= ((b) = "1");
c_1_30 <= ((c) = "1");
bit_6_36 <= ((boolean_to_vector(b_1_27) and boolean_to_vector(a_1_24)) = "1");
fulldout_6_2_bit <= ((boolean_to_vector(c_1_30) and boolean_to_vector(bit_6_36)) = "1");
dout <= boolean_to_vector(fulldout_6_2_bit);
end behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity xldivider_generator_47dc3a44bd8d9df86e42dac34ee6a9fc is
port(
ce:in std_logic;
clk:in std_logic;
m_axis_dout_tdata_fractional:out std_logic_vector(24 downto 0);
m_axis_dout_tdata_quotient:out std_logic_vector(25 downto 0);
m_axis_dout_tvalid:out std_logic;
s_axis_dividend_tdata_dividend:in std_logic_vector(25 downto 0);
s_axis_dividend_tready:out std_logic;
s_axis_dividend_tvalid:in std_logic;
s_axis_divisor_tdata_divisor:in std_logic_vector(25 downto 0);
s_axis_divisor_tready:out std_logic;
s_axis_divisor_tvalid:in std_logic
);
end xldivider_generator_47dc3a44bd8d9df86e42dac34ee6a9fc;
architecture behavior of xldivider_generator_47dc3a44bd8d9df86e42dac34ee6a9fc is
component dv_gn_v4_0_dc31160d1288a80d
port(
aclk:in std_logic;
aclken:in std_logic;
m_axis_dout_tdata:out std_logic_vector(55 downto 0);
m_axis_dout_tvalid:out std_logic;
s_axis_dividend_tdata:in std_logic_vector(31 downto 0);
s_axis_dividend_tready:out std_logic;
s_axis_dividend_tvalid:in std_logic;
s_axis_divisor_tdata:in std_logic_vector(31 downto 0);
s_axis_divisor_tready:out std_logic;
s_axis_divisor_tvalid:in std_logic
);
end component;
signal m_axis_dout_tdata_net: std_logic_vector(55 downto 0) := (others=>'0');
signal s_axis_dividend_tdata_net: std_logic_vector(31 downto 0) := (others=>'0');
signal s_axis_divisor_tdata_net: std_logic_vector(31 downto 0) := (others=>'0');
begin
m_axis_dout_tdata_quotient <= m_axis_dout_tdata_net(50 downto 25);
m_axis_dout_tdata_fractional <= m_axis_dout_tdata_net(24 downto 0);
s_axis_dividend_tdata_net(25 downto 0) <= s_axis_dividend_tdata_dividend;
s_axis_divisor_tdata_net(25 downto 0) <= s_axis_divisor_tdata_divisor;
dv_gn_v4_0_dc31160d1288a80d_instance : dv_gn_v4_0_dc31160d1288a80d
port map(
aclk=>clk,
aclken=>ce,
m_axis_dout_tdata=>m_axis_dout_tdata_net,
m_axis_dout_tvalid=>m_axis_dout_tvalid,
s_axis_dividend_tdata=>s_axis_dividend_tdata_net,
s_axis_dividend_tready=>s_axis_dividend_tready,
s_axis_dividend_tvalid=>s_axis_dividend_tvalid,
s_axis_divisor_tdata=>s_axis_divisor_tdata_net,
s_axis_divisor_tready=>s_axis_divisor_tready,
s_axis_divisor_tvalid=>s_axis_divisor_tvalid
);
end behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity reinterpret_040ef1b598 is
port (
input_port : in std_logic_vector((26 - 1) downto 0);
output_port : out std_logic_vector((26 - 1) downto 0);
clk : in std_logic;
ce : in std_logic;
clr : in std_logic);
end reinterpret_040ef1b598;
architecture behavior of reinterpret_040ef1b598 is
signal input_port_1_40: signed((26 - 1) downto 0);
begin
input_port_1_40 <= std_logic_vector_to_signed(input_port);
output_port <= signed_to_std_logic_vector(input_port_1_40);
end behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity relational_416cfcae1e is
port (
a : in std_logic_vector((26 - 1) downto 0);
b : in std_logic_vector((26 - 1) downto 0);
op : out std_logic_vector((1 - 1) downto 0);
clk : in std_logic;
ce : in std_logic;
clr : in std_logic);
end relational_416cfcae1e;
architecture behavior of relational_416cfcae1e is
signal a_1_31: signed((26 - 1) downto 0);
signal b_1_34: signed((26 - 1) downto 0);
type array_type_op_mem_32_22 is array (0 to (1 - 1)) of boolean;
signal op_mem_32_22: array_type_op_mem_32_22 := (
0 => false);
signal op_mem_32_22_front_din: boolean;
signal op_mem_32_22_back: boolean;
signal op_mem_32_22_push_front_pop_back_en: std_logic;
signal result_18_3_rel: boolean;
begin
a_1_31 <= std_logic_vector_to_signed(a);
b_1_34 <= std_logic_vector_to_signed(b);
op_mem_32_22_back <= op_mem_32_22(0);
proc_op_mem_32_22: process (clk)
is
variable i: integer;
begin
if (clk'event and (clk = '1')) then
if ((ce = '1') and (op_mem_32_22_push_front_pop_back_en = '1')) then
op_mem_32_22(0) <= op_mem_32_22_front_din;
end if;
end if;
end process proc_op_mem_32_22;
result_18_3_rel <= a_1_31 > b_1_34;
op_mem_32_22_front_din <= result_18_3_rel;
op_mem_32_22_push_front_pop_back_en <= '1';
op <= boolean_to_vector(op_mem_32_22_back);
end behavior;
-------------------------------------------------------------------
-- System Generator version 13.4 VHDL source file.
--
-- Copyright(C) 2011 by Xilinx, Inc. All rights reserved. This
-- text/file contains proprietary, confidential information of Xilinx,
-- Inc., is distributed under license from Xilinx, Inc., and may be used,
-- copied and/or disclosed only pursuant to the terms of a valid license
-- agreement with Xilinx, Inc. Xilinx hereby grants you a license to use
-- this text/file solely for design, simulation, implementation and
-- creation of design files limited to Xilinx devices or technologies.
-- Use with non-Xilinx devices or technologies is expressly prohibited
-- and immediately terminates your license unless covered by a separate
-- agreement.
--
-- Xilinx is providing this design, code, or information "as is" solely
-- for use in developing programs and solutions for Xilinx devices. By
-- providing this design, code, or information as one possible
-- implementation of this feature, application or standard, Xilinx is
-- making no representation that this implementation is free from any
-- claims of infringement. You are responsible for obtaining any rights
-- you may require for your implementation. Xilinx expressly disclaims
-- any warranty whatsoever with respect to the adequacy of the
-- implementation, including but not limited to warranties of
-- merchantability or fitness for a particular purpose.
--
-- Xilinx products are not intended for use in life support appliances,
-- devices, or systems. Use in such applications is expressly prohibited.
--
-- Any modifications that are made to the source code are done at the user's
-- sole risk and will be unsupported.
--
-- This copyright and support notice must be retained as part of this
-- text at all times. (c) Copyright 1995-2011 Xilinx, Inc. All rights
-- reserved.
-------------------------------------------------------------------
-- synopsys translate_off
library XilinxCoreLib;
-- synopsys translate_on
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use work.conv_pkg.all;
entity xladdsub is
generic (
core_name0: string := "";
a_width: integer := 16;
a_bin_pt: integer := 4;
a_arith: integer := xlUnsigned;
c_in_width: integer := 16;
c_in_bin_pt: integer := 4;
c_in_arith: integer := xlUnsigned;
c_out_width: integer := 16;
c_out_bin_pt: integer := 4;
c_out_arith: integer := xlUnsigned;
b_width: integer := 8;
b_bin_pt: integer := 2;
b_arith: integer := xlUnsigned;
s_width: integer := 17;
s_bin_pt: integer := 4;
s_arith: integer := xlUnsigned;
rst_width: integer := 1;
rst_bin_pt: integer := 0;
rst_arith: integer := xlUnsigned;
en_width: integer := 1;
en_bin_pt: integer := 0;
en_arith: integer := xlUnsigned;
full_s_width: integer := 17;
full_s_arith: integer := xlUnsigned;
mode: integer := xlAddMode;
extra_registers: integer := 0;
latency: integer := 0;
quantization: integer := xlTruncate;
overflow: integer := xlWrap;
c_latency: integer := 0;
c_output_width: integer := 17;
c_has_c_in : integer := 0;
c_has_c_out : integer := 0
);
port (
a: in std_logic_vector(a_width - 1 downto 0);
b: in std_logic_vector(b_width - 1 downto 0);
c_in : in std_logic_vector (0 downto 0) := "0";
ce: in std_logic;
clr: in std_logic := '0';
clk: in std_logic;
rst: in std_logic_vector(rst_width - 1 downto 0) := "0";
en: in std_logic_vector(en_width - 1 downto 0) := "1";
c_out : out std_logic_vector (0 downto 0);
s: out std_logic_vector(s_width - 1 downto 0)
);
end xladdsub;
architecture behavior of xladdsub is
component synth_reg
generic (
width: integer := 16;
latency: integer := 5
);
port (
i: in std_logic_vector(width - 1 downto 0);
ce: in std_logic;
clr: in std_logic;
clk: in std_logic;
o: out std_logic_vector(width - 1 downto 0)
);
end component;
function format_input(inp: std_logic_vector; old_width, delta, new_arith,
new_width: integer)
return std_logic_vector
is
variable vec: std_logic_vector(old_width-1 downto 0);
variable padded_inp: std_logic_vector((old_width + delta)-1 downto 0);
variable result: std_logic_vector(new_width-1 downto 0);
begin
vec := inp;
if (delta > 0) then
padded_inp := pad_LSB(vec, old_width+delta);
result := extend_MSB(padded_inp, new_width, new_arith);
else
result := extend_MSB(vec, new_width, new_arith);
end if;
return result;
end;
constant full_s_bin_pt: integer := fractional_bits(a_bin_pt, b_bin_pt);
constant full_a_width: integer := full_s_width;
constant full_b_width: integer := full_s_width;
signal full_a: std_logic_vector(full_a_width - 1 downto 0);
signal full_b: std_logic_vector(full_b_width - 1 downto 0);
signal core_s: std_logic_vector(full_s_width - 1 downto 0);
signal conv_s: std_logic_vector(s_width - 1 downto 0);
signal temp_cout : std_logic;
signal internal_clr: std_logic;
signal internal_ce: std_logic;
signal extra_reg_ce: std_logic;
signal override: std_logic;
signal logic1: std_logic_vector(0 downto 0);
component addsb_11_0_293aa5f110d040c2
port (
a: in std_logic_vector(25 - 1 downto 0);
s: out std_logic_vector(c_output_width - 1 downto 0);
b: in std_logic_vector(25 - 1 downto 0)
);
end component;
attribute syn_black_box of addsb_11_0_293aa5f110d040c2:
component is true;
attribute fpga_dont_touch of addsb_11_0_293aa5f110d040c2:
component is "true";
attribute box_type of addsb_11_0_293aa5f110d040c2:
component is "black_box";
component addsb_11_0_44053abf11139d96
port (
a: in std_logic_vector(26 - 1 downto 0);
s: out std_logic_vector(c_output_width - 1 downto 0);
b: in std_logic_vector(26 - 1 downto 0)
);
end component;
attribute syn_black_box of addsb_11_0_44053abf11139d96:
component is true;
attribute fpga_dont_touch of addsb_11_0_44053abf11139d96:
component is "true";
attribute box_type of addsb_11_0_44053abf11139d96:
component is "black_box";
component addsb_11_0_3537d66a2361cd1e
port (
a: in std_logic_vector(26 - 1 downto 0);
s: out std_logic_vector(c_output_width - 1 downto 0);
b: in std_logic_vector(26 - 1 downto 0)
);
end component;
attribute syn_black_box of addsb_11_0_3537d66a2361cd1e:
component is true;
attribute fpga_dont_touch of addsb_11_0_3537d66a2361cd1e:
component is "true";
attribute box_type of addsb_11_0_3537d66a2361cd1e:
component is "black_box";
begin
internal_clr <= (clr or (rst(0))) and ce;
internal_ce <= ce and en(0);
logic1(0) <= '1';
addsub_process: process (a, b, core_s)
begin
full_a <= format_input (a, a_width, b_bin_pt - a_bin_pt, a_arith,
full_a_width);
full_b <= format_input (b, b_width, a_bin_pt - b_bin_pt, b_arith,
full_b_width);
conv_s <= convert_type (core_s, full_s_width, full_s_bin_pt, full_s_arith,
s_width, s_bin_pt, s_arith, quantization, overflow);
end process addsub_process;
comp0: if ((core_name0 = "addsb_11_0_293aa5f110d040c2")) generate
core_instance0: addsb_11_0_293aa5f110d040c2
port map (
a => full_a,
s => core_s,
b => full_b
);
end generate;
comp1: if ((core_name0 = "addsb_11_0_44053abf11139d96")) generate
core_instance1: addsb_11_0_44053abf11139d96
port map (
a => full_a,
s => core_s,
b => full_b
);
end generate;
comp2: if ((core_name0 = "addsb_11_0_3537d66a2361cd1e")) generate
core_instance2: addsb_11_0_3537d66a2361cd1e
port map (
a => full_a,
s => core_s,
b => full_b
);
end generate;
latency_test: if (extra_registers > 0) generate
override_test: if (c_latency > 1) generate
override_pipe: synth_reg
generic map (
width => 1,
latency => c_latency
)
port map (
i => logic1,
ce => internal_ce,
clr => internal_clr,
clk => clk,
o(0) => override);
extra_reg_ce <= ce and en(0) and override;
end generate override_test;
no_override: if ((c_latency = 0) or (c_latency = 1)) generate
extra_reg_ce <= ce and en(0);
end generate no_override;
extra_reg: synth_reg
generic map (
width => s_width,
latency => extra_registers
)
port map (
i => conv_s,
ce => extra_reg_ce,
clr => internal_clr,
clk => clk,
o => s
);
cout_test: if (c_has_c_out = 1) generate
c_out_extra_reg: synth_reg
generic map (
width => 1,
latency => extra_registers
)
port map (
i(0) => temp_cout,
ce => extra_reg_ce,
clr => internal_clr,
clk => clk,
o => c_out
);
end generate cout_test;
end generate;
latency_s: if ((latency = 0) or (extra_registers = 0)) generate
s <= conv_s;
end generate latency_s;
latency0: if (((latency = 0) or (extra_registers = 0)) and
(c_has_c_out = 1)) generate
c_out(0) <= temp_cout;
end generate latency0;
tie_dangling_cout: if (c_has_c_out = 0) generate
c_out <= "0";
end generate tie_dangling_cout;
end architecture behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity concat_43e7f055fa is
port (
in0 : in std_logic_vector((1 - 1) downto 0);
in1 : in std_logic_vector((25 - 1) downto 0);
y : out std_logic_vector((26 - 1) downto 0);
clk : in std_logic;
ce : in std_logic;
clr : in std_logic);
end concat_43e7f055fa;
architecture behavior of concat_43e7f055fa is
signal in0_1_23: boolean;
signal in1_1_27: unsigned((25 - 1) downto 0);
signal y_2_1_concat: unsigned((26 - 1) downto 0);
begin
in0_1_23 <= ((in0) = "1");
in1_1_27 <= std_logic_vector_to_unsigned(in1);
y_2_1_concat <= std_logic_vector_to_unsigned(boolean_to_vector(in0_1_23) & unsigned_to_std_logic_vector(in1_1_27));
y <= unsigned_to_std_logic_vector(y_2_1_concat);
end behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity reinterpret_c3c0e847be is
port (
input_port : in std_logic_vector((25 - 1) downto 0);
output_port : out std_logic_vector((25 - 1) downto 0);
clk : in std_logic;
ce : in std_logic;
clr : in std_logic);
end reinterpret_c3c0e847be;
architecture behavior of reinterpret_c3c0e847be is
signal input_port_1_40: signed((25 - 1) downto 0);
signal output_port_5_5_force: unsigned((25 - 1) downto 0);
begin
input_port_1_40 <= std_logic_vector_to_signed(input_port);
output_port_5_5_force <= signed_to_unsigned(input_port_1_40);
output_port <= unsigned_to_std_logic_vector(output_port_5_5_force);
end behavior;
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.conv_pkg.all;
entity xlfir_compiler_eebfed0cb0075aa32aca169bb967f58b is
port(
ce:in std_logic;
ce_5600000:in std_logic;
ce_56000000:in std_logic;
ce_logic_5600000:in std_logic;
clk:in std_logic;
clk_5600000:in std_logic;
clk_56000000:in std_logic;
clk_logic_5600000:in std_logic;
event_s_data_chanid_incorrect:out std_logic;
m_axis_data_tdata:out std_logic_vector(25 downto 0);
m_axis_data_tuser_chanid:out std_logic_vector(1 downto 0);
m_axis_data_tvalid:out std_logic;
s_axis_data_tdata:in std_logic_vector(24 downto 0);
s_axis_data_tready:out std_logic;
s_axis_data_tuser_chanid:in std_logic_vector(1 downto 0);
src_ce:in std_logic;
src_clk:in std_logic
);
end xlfir_compiler_eebfed0cb0075aa32aca169bb967f58b;
architecture behavior of xlfir_compiler_eebfed0cb0075aa32aca169bb967f58b is
component fr_cmplr_v6_3_b1697e0c92d2e32a
port(
aclk:in std_logic;
aclken:in std_logic;
event_s_data_chanid_incorrect:out std_logic;
m_axis_data_tdata:out std_logic_vector(31 downto 0);
m_axis_data_tuser:out std_logic_vector(1 downto 0);
m_axis_data_tvalid:out std_logic;
s_axis_data_tdata:in std_logic_vector(31 downto 0);
s_axis_data_tready:out std_logic;
s_axis_data_tuser:in std_logic_vector(1 downto 0);
s_axis_data_tvalid:in std_logic
);
end component;
signal m_axis_data_tdata_net: std_logic_vector(31 downto 0) := (others=>'0');
signal m_axis_data_tdata_ps_net: std_logic_vector(25 downto 0) := (others=>'0');
signal m_axis_data_tuser_net: std_logic_vector(1 downto 0) := (others=>'0');
signal m_axis_data_tuser_chanid_ps_net: std_logic_vector(1 downto 0) := (others=>'0');
signal m_axis_data_tvalid_ps_net: std_logic := '0';
signal m_axis_data_tvalid_ps_net_captured: std_logic := '0';
signal m_axis_data_tvalid_ps_net_or_captured_net: std_logic := '0';
signal s_axis_data_tdata_net: std_logic_vector(31 downto 0) := (others=>'0');
signal s_axis_data_tuser_net: std_logic_vector(1 downto 0) := (others=>'0');
begin
m_axis_data_tdata_ps_net <= m_axis_data_tdata_net(25 downto 0);
m_axis_data_tuser_chanid_ps_net <= m_axis_data_tuser_net(1 downto 0);
s_axis_data_tdata_net(24 downto 0) <= s_axis_data_tdata;
s_axis_data_tuser_net(1 downto 0) <= s_axis_data_tuser_chanid;
m_axis_data_tdata_ps_net_synchronizer : entity work.synth_reg_w_init
generic map(
width => 26,
init_index => 0,
init_value => "0",
latency => 1
)
port map (
i => m_axis_data_tdata_ps_net,
ce => ce_56000000,
clr => '0',
clk => clk_56000000,
o => m_axis_data_tdata
);
m_axis_data_tuser_chanid_ps_net_synchronizer : entity work.synth_reg_w_init
generic map(
width => 2,
init_index => 0,
init_value => "0",
latency => 1
)
port map (
i => m_axis_data_tuser_chanid_ps_net,
ce => ce_56000000,
clr => '0',
clk => clk_56000000,
o => m_axis_data_tuser_chanid
);
m_axis_data_tvalid_ps_net_or_captured_net <= m_axis_data_tvalid_ps_net or m_axis_data_tvalid_ps_net_captured;
m_axis_data_tvalid_ps_net_synchronizer_1 : entity work.synth_reg_w_init
generic map(
width => 1,
init_index => 0,
init_value => "0",
latency => 1
)
port map (
i(0) => m_axis_data_tvalid_ps_net_or_captured_net,
ce => ce_56000000,
clr => '0',
clk => clk_56000000,
o(0) => m_axis_data_tvalid
);
m_axis_data_tvalid_ps_net_synchronizer_2 : entity work.synth_reg_w_init
generic map(
width => 1,
init_index => 0,
init_value => "0",
latency => 1
)
port map (
i(0) => '1',
ce => m_axis_data_tvalid_ps_net,
clr => '0',
clk => clk_56000000,
o(0) => m_axis_data_tvalid_ps_net_captured
);
fr_cmplr_v6_3_b1697e0c92d2e32a_instance : fr_cmplr_v6_3_b1697e0c92d2e32a
port map(
aclk=>clk,
aclken=>ce,
event_s_data_chanid_incorrect=>event_s_data_chanid_incorrect,
m_axis_data_tdata=>m_axis_data_tdata_net,
m_axis_data_tuser=>m_axis_data_tuser_net,
m_axis_data_tvalid=>m_axis_data_tvalid_ps_net,
s_axis_data_tdata=>s_axis_data_tdata_net,
s_axis_data_tready=>s_axis_data_tready,
s_axis_data_tuser=>s_axis_data_tuser_net,
s_axis_data_tvalid=>ce_logic_5600000
);
end behavior;
| lgpl-3.0 | cf96237bd47e9cce740d5569388b254e | 0.595073 | 3.392033 | false | false | false | false |
wltr/common-vhdl | dsp/ads1281_filter/src/rtl/ads1281_filter/ads1281_filter_channel.vhd | 1 | 4,333 | --------------------------------------------------------------------------------
-- LGPL v2.1, Copyright (c) 2014 Johannes Walter <[email protected]>
--
-- Description:
-- Calculate the coefficients and pass them on the each channel.
--------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity ads1281_filter_channel is
port (
-- Clock and resets
clk_i : in std_ulogic;
rst_asy_n_i : in std_ulogic;
rst_syn_i : in std_ulogic;
-- Control strobes
sample_i : in std_ulogic;
-- ADC bit streams
adc_m0_i : in std_ulogic;
adc_m1_i : in std_ulogic;
-- Filter coefficients
coeff1_i : in unsigned(23 downto 0);
coeff1_en_i : in std_ulogic;
coeff1_done_i : in std_ulogic;
coeff2_i : in unsigned(23 downto 0);
coeff2_en_i : in std_ulogic;
coeff2_done_i : in std_ulogic;
-- Filter values
result_o : out std_ulogic_vector(23 downto 0);
result_en_o : out std_ulogic);
end entity ads1281_filter_channel;
architecture rtl of ads1281_filter_channel is
------------------------------------------------------------------------------
-- Internal Wires
------------------------------------------------------------------------------
signal adc_m0_fifo : std_ulogic_vector(2 downto 0);
signal adc_m1_fifo : std_ulogic_vector(2 downto 0);
signal dec_data : signed(6 downto 0);
signal mac1 : signed(23 downto 0);
signal mac1_en : std_ulogic;
signal mac2 : signed(23 downto 0);
signal mac2_en : std_ulogic;
begin -- architecture rtl
------------------------------------------------------------------------------
-- Instances
------------------------------------------------------------------------------
-- Buffer M0 bit stream
ads1281_filter_fifo_inst_0 : entity work.ads1281_filter_fifo
generic map (
init_value_g => '0',
offset_g => 2)
port map (
clk_i => clk_i,
rst_asy_n_i => rst_asy_n_i,
rst_syn_i => rst_syn_i,
en_i => sample_i,
sig_i => adc_m0_i,
fifo_o => adc_m0_fifo);
-- Buffer M1 bit stream
ads1281_filter_fifo_inst_1 : entity work.ads1281_filter_fifo
generic map (
init_value_g => '0',
offset_g => 0)
port map (
clk_i => clk_i,
rst_asy_n_i => rst_asy_n_i,
rst_syn_i => rst_syn_i,
en_i => sample_i,
sig_i => adc_m1_i,
fifo_o => adc_m1_fifo);
-- Decode M0 and M1 bit stream samples
ads1281_filter_decoder_inst : entity work.ads1281_filter_decoder
port map (
clk_i => clk_i,
rst_asy_n_i => rst_asy_n_i,
rst_syn_i => rst_syn_i,
adc_m0_i => adc_m0_fifo,
adc_m1_i => adc_m1_fifo,
data_o => dec_data);
-- Multiply input data with 1st filter coefficients and accumulate
ads1281_filter_mac_inst_0 : entity work.ads1281_filter_mac
port map (
clk_i => clk_i,
rst_asy_n_i => rst_asy_n_i,
rst_syn_i => rst_syn_i,
data_i => dec_data,
coeff_i => coeff1_i,
coeff_en_i => coeff1_en_i,
coeff_done_i => coeff1_done_i,
data_o => mac1,
data_en_o => mac1_en);
-- Multiply input data with 2nd filter coefficients and accumulate
ads1281_filter_mac_inst_1 : entity work.ads1281_filter_mac
port map (
clk_i => clk_i,
rst_asy_n_i => rst_asy_n_i,
rst_syn_i => rst_syn_i,
data_i => dec_data,
coeff_i => coeff2_i,
coeff_en_i => coeff2_en_i,
coeff_done_i => coeff2_done_i,
data_o => mac2,
data_en_o => mac2_en);
-- Alternate between the two filter output values
ads1281_filter_output_inst : entity work.ads1281_filter_output
port map (
clk_i => clk_i,
rst_asy_n_i => rst_asy_n_i,
rst_syn_i => rst_syn_i,
data1_i => mac1,
data1_en_i => mac1_en,
data2_i => mac2,
data2_en_i => mac2_en,
data_o => result_o,
data_en_o => result_en_o);
end architecture rtl;
| lgpl-2.1 | c80cb02cfb6389bbcdf0d346d046ce5e | 0.480037 | 3.398431 | false | false | false | false |
lerwys/GitTest | hdl/modules/position_calc/generated/artix7/crdc_v5_0_9d3c9eaecfab6c0c.vhd | 1 | 5,798 | --------------------------------------------------------------------------------
-- This file is owned and controlled by Xilinx and must be used solely --
-- for design, simulation, implementation and creation of design files --
-- limited to Xilinx devices or technologies. Use with non-Xilinx --
-- devices or technologies is expressly prohibited and immediately --
-- terminates your license. --
-- --
-- XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" SOLELY --
-- FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR XILINX DEVICES. BY --
-- PROVIDING THIS DESIGN, CODE, OR INFORMATION AS ONE POSSIBLE --
-- IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD, XILINX IS --
-- MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE FROM ANY --
-- CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING ANY --
-- RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY --
-- DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE --
-- IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR --
-- REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF --
-- INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A --
-- PARTICULAR PURPOSE. --
-- --
-- Xilinx products are not intended for use in life support appliances, --
-- devices, or systems. Use in such applications are expressly --
-- prohibited. --
-- --
-- (c) Copyright 1995-2014 Xilinx, Inc. --
-- All rights reserved. --
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-- You must compile the wrapper file crdc_v5_0_9d3c9eaecfab6c0c.vhd when simulating
-- the core, crdc_v5_0_9d3c9eaecfab6c0c. When compiling the wrapper file, be sure to
-- reference the XilinxCoreLib VHDL simulation library. For detailed
-- instructions, please refer to the "CORE Generator Help".
-- The synthesis directives "translate_off/translate_on" specified
-- below are supported by Xilinx, Mentor Graphics and Synplicity
-- synthesis tools. Ensure they are correct for your synthesis tool(s).
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
-- synthesis translate_off
LIBRARY XilinxCoreLib;
-- synthesis translate_on
ENTITY crdc_v5_0_9d3c9eaecfab6c0c IS
PORT (
aclk : IN STD_LOGIC;
aclken : IN STD_LOGIC;
s_axis_cartesian_tvalid : IN STD_LOGIC;
s_axis_cartesian_tready : OUT STD_LOGIC;
s_axis_cartesian_tuser : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
s_axis_cartesian_tdata : IN STD_LOGIC_VECTOR(63 DOWNTO 0);
m_axis_dout_tvalid : OUT STD_LOGIC;
m_axis_dout_tuser : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
m_axis_dout_tdata : OUT STD_LOGIC_VECTOR(47 DOWNTO 0)
);
END crdc_v5_0_9d3c9eaecfab6c0c;
ARCHITECTURE crdc_v5_0_9d3c9eaecfab6c0c_a OF crdc_v5_0_9d3c9eaecfab6c0c IS
-- synthesis translate_off
COMPONENT wrapped_crdc_v5_0_9d3c9eaecfab6c0c
PORT (
aclk : IN STD_LOGIC;
aclken : IN STD_LOGIC;
s_axis_cartesian_tvalid : IN STD_LOGIC;
s_axis_cartesian_tready : OUT STD_LOGIC;
s_axis_cartesian_tuser : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
s_axis_cartesian_tdata : IN STD_LOGIC_VECTOR(63 DOWNTO 0);
m_axis_dout_tvalid : OUT STD_LOGIC;
m_axis_dout_tuser : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
m_axis_dout_tdata : OUT STD_LOGIC_VECTOR(47 DOWNTO 0)
);
END COMPONENT;
-- Configuration specification
FOR ALL : wrapped_crdc_v5_0_9d3c9eaecfab6c0c USE ENTITY XilinxCoreLib.cordic_v5_0(behavioral)
GENERIC MAP (
c_architecture => 1,
c_coarse_rotate => 1,
c_cordic_function => 1,
c_data_format => 0,
c_has_aclk => 1,
c_has_aclken => 1,
c_has_aresetn => 0,
c_has_s_axis_cartesian => 1,
c_has_s_axis_cartesian_tlast => 0,
c_has_s_axis_cartesian_tuser => 1,
c_has_s_axis_phase => 0,
c_has_s_axis_phase_tlast => 0,
c_has_s_axis_phase_tuser => 0,
c_input_width => 25,
c_iterations => 0,
c_m_axis_dout_tdata_width => 48,
c_m_axis_dout_tuser_width => 1,
c_output_width => 24,
c_phase_format => 0,
c_pipeline_mode => -1,
c_precision => 0,
c_round_mode => 3,
c_s_axis_cartesian_tdata_width => 64,
c_s_axis_cartesian_tuser_width => 1,
c_s_axis_phase_tdata_width => 32,
c_s_axis_phase_tuser_width => 1,
c_scale_comp => 3,
c_throttle_scheme => 3,
c_tlast_resolution => 0,
c_xdevicefamily => "artix7"
);
-- synthesis translate_on
BEGIN
-- synthesis translate_off
U0 : wrapped_crdc_v5_0_9d3c9eaecfab6c0c
PORT MAP (
aclk => aclk,
aclken => aclken,
s_axis_cartesian_tvalid => s_axis_cartesian_tvalid,
s_axis_cartesian_tready => s_axis_cartesian_tready,
s_axis_cartesian_tuser => s_axis_cartesian_tuser,
s_axis_cartesian_tdata => s_axis_cartesian_tdata,
m_axis_dout_tvalid => m_axis_dout_tvalid,
m_axis_dout_tuser => m_axis_dout_tuser,
m_axis_dout_tdata => m_axis_dout_tdata
);
-- synthesis translate_on
END crdc_v5_0_9d3c9eaecfab6c0c_a;
| lgpl-3.0 | fa9e3addfc3649a0ede53dee96c42e60 | 0.567954 | 3.719051 | false | false | false | false |
ricardo-jasinski/vhdl-game-engine | hdl/implementation/engine/resource_data_helper_pkg.vhd | 1 | 3,599 | use work.resource_handles_pkg.all;
use work.graphics_types_pkg.all;
use work.sprites_pkg.all;
use work.npc_pkg.all;
use work.resource_data_pkg.all;
use work.resource_handles_helper_pkg.all;
package resource_data_helper_pkg is
function sprite_initial_value_from_id(sprite_id: natural) return sprite_type;
function get_bitmap_from_handle(handle: bitmap_handle_type) return paletted_bitmap_type;
function make_sprites_initial_values(sprite_init_array: sprite_init_array_type) return sprites_array_type;
function make_sprite_positions(pairs: sprite_positions_init_array) return point_array_type;
function make_sprites_collision_query(collisions: sprite_collision_init_array_type) return sprite_collision_query_type;
function make_npcs_initial_values(npcs_init_array: npc_init_array_type) return npc_array_type;
end;
package body resource_data_helper_pkg is
function get_bitmap_from_handle(handle: bitmap_handle_type) return paletted_bitmap_type is
variable bitmap_init_value: bitmap_init_type;
begin
bitmap_init_value := GAME_BITMAPS( get_bitmap_id_from_handle(handle) );
return bitmap_init_value.bitmap;
end;
-- Merges all information provided by the user with the aditional information
-- required to create a sprite
function sprite_initial_value_from_id(sprite_id: natural) return sprite_type is
variable bitmap: paletted_bitmap_type(0 to BITMAP_WIDTH-1, 0 to BITMAP_HEIGHT-1);
variable bitmap_handle: bitmap_handle_type;
begin
bitmap_handle := GAME_SPRITES(sprite_id).bitmap_handle;
bitmap := get_bitmap_from_handle(bitmap_handle);
return (bitmap => bitmap, enabled => true, others => 0);
end;
-- We need to initialize the sprites engine with the game sprites. This
-- initialization array helps us do it neatly. The helper function will
-- fetch user-provided data from the GAME_SPRITES array and return an
-- array of sprites ready to be assigned to sprite engine upon reset.
function make_sprites_initial_values(sprite_init_array: sprite_init_array_type) return sprites_array_type is
variable sprites: sprites_array_type(sprite_init_array'range);
begin
for i in sprites'range loop
sprites(i) := sprite_initial_value_from_id(i);
end loop;
return sprites;
end;
function make_sprites_collision_query(collisions: sprite_collision_init_array_type) return sprite_collision_query_type is
variable query: sprite_collision_query_type(collisions'range);
begin
for i in query'range loop
query(i) := (
get_sprite_id_from_handle( collisions(i).sprite_1 ),
get_sprite_id_from_handle( collisions(i).sprite_2 )
);
end loop;
return query;
end;
function make_npcs_initial_values(npcs_init_array: npc_init_array_type) return npc_array_type is
variable npcs: npc_array_type(npcs_init_array'range);
begin
for i in npcs'range loop
npcs( get_id(npcs_init_array(i).npc_handle) ) := npcs_init_array(i).npc;
end loop;
return npcs;
end;
function make_sprite_positions(pairs: sprite_positions_init_array) return point_array_type is
variable positions: point_array_type(pairs'range);
begin
for i in pairs'range loop
positions(get_sprite_id_from_handle(pairs(i).id)) := pairs(i).position;
end loop;
return positions;
end;
end;
| unlicense | b5b6a7bb6d8e601d933564b34509ff24 | 0.676855 | 3.706488 | false | false | false | false |
jc38x/X38-02FO16 | benchmarks/LEKO_LEKU/leko/g125.vhd | 1 | 99,206 | -- Xilinx XPort Language Converter, Version 4.1 (110)
--
-- ABEL Design Source: C:\home\kirill\xillinx\testing.abl
-- VHDL Design Output: testing.vhd
-- Created 01-Sep-2005 07:39 PM
--
-- Copyright (c) 2005, Xilinx, Inc. All Rights Reserved.
-- Xilinx Inc makes no warranty, expressed or implied, with respect to
-- the operation and/or functionality of the converted output files.
--
-- ee200 assignment 1
Library IEEE;
use IEEE.std_logic_1164.all;
entity testing is
Port (
A538, A965: buffer std_logic;
A2147: in std_logic;
A900: buffer std_logic;
A2411: in std_logic;
A436: buffer std_logic;
A2674, A2608: in std_logic;
A534, A603, A699, A1099: buffer std_logic;
A2182, A2775, A2743, A2677: in std_logic;
A369, A732, A469, A601: buffer std_logic;
A2711, A2214: in std_logic;
A1029: buffer std_logic;
A2049: in std_logic;
A371: buffer std_logic;
A2017, A2180, A2378: in std_logic;
A504, A934: buffer std_logic;
A2577, A2513, A2150, A2279: in std_logic;
A505: buffer std_logic;
A2414: in std_logic;
A866, A337, A1033, A999: buffer std_logic;
A2610, A2018: in std_logic;
A702, A996, A1031, A1131: buffer std_logic;
A2575, A2643: in std_logic;
A1032, A1128, A636: buffer std_logic;
A2081, A2216: in std_logic;
A406: buffer std_logic;
A1983, A2014, A2579: in std_logic;
A471: buffer std_logic;
A2246: in std_logic;
A1098, A403: buffer std_logic;
A2476: in std_logic;
A767: buffer std_logic;
A2248, A2345: in std_logic;
A867, A868: buffer std_logic;
A2710, A2709: in std_logic;
A997, A1063, A634: buffer std_logic;
A2312, A2542: in std_logic;
A568: buffer std_logic;
A2280: in std_logic;
A967: buffer std_logic;
A2051, A2281: in std_logic;
A802, A899, A340, A404, A897, A734: buffer std_logic;
A2641: in std_logic;
A768: buffer std_logic;
A2380, A2741, A2347: in std_logic;
A963, A1066: buffer std_logic;
A2344: in std_logic;
A468, A669: buffer std_logic;
A2015, A2113, A2083, A2742: in std_logic;
A1095: buffer std_logic;
A2381, A2773, A2377, A2644: in std_logic;
A834, A1096, A336, A930: buffer std_logic;
A2115: in std_logic;
A667: buffer std_logic;
A2707: in std_logic;
A339, A635: buffer std_logic;
A2183, A2117: in std_logic;
A503: buffer std_logic;
A2509, A2511, A2444, A2410: in std_logic;
A798, A932: buffer std_logic;
A2315: in std_logic;
A736: buffer std_logic;
A2311: in std_logic;
A437, A799, A1062, A832: buffer std_logic;
A2446: in std_logic;
A501: buffer std_logic;
A2546: in std_logic;
A439: buffer std_logic;
A2479: in std_logic;
A402, A966: buffer std_logic;
A2213, A2148: in std_logic;
A800, A865: buffer std_logic;
A2642, A2048, A2146, A2740: in std_logic;
A1030: buffer std_logic;
A2744, A2445, A2611, A2215, A2776, A2084: in std_logic;
A831: buffer std_logic;
A2181: in std_logic;
A733: buffer std_logic;
A2047, A2609: in std_logic;
A570, A602: buffer std_logic;
A2544: in std_logic;
A1130: buffer std_logic;
A2082, A2016: in std_logic;
A1129, A833: buffer std_logic;
A2413, A2777, A2278: in std_logic;
A1132: buffer std_logic;
A2379: in std_logic;
A670: buffer std_logic;
A2080, A2447: in std_logic;
A372, A1000: buffer std_logic;
A2708: in std_logic;
A535, A600: buffer std_logic;
A2443: in std_logic;
A1064: buffer std_logic;
A2678, A2612, A2578, A1985: in std_logic;
A701, A765, A700: buffer std_logic;
A2249: in std_logic;
A338: buffer std_logic;
A2282, A2480: in std_logic;
A998, A1065, A536, A766, A964, A435: buffer std_logic;
A2314: in std_logic;
A637, A703: buffer std_logic;
A1981, A2576, A2645, A1984: in std_logic;
A472: buffer std_logic;
A2050, A2313, A2543: in std_logic;
A502, A633, A835, A405, A735, A801, A931: buffer std_logic;
A1982: in std_logic;
A569, A769, A668, A567: buffer std_logic;
A2477: in std_logic;
A898, A370: buffer std_logic;
A2675, A2247, A2412, A2149: in std_logic;
A470, A604: buffer std_logic;
A2545: in std_logic;
A901: buffer std_logic;
A2245, A2116: in std_logic;
A864, A537: buffer std_logic;
A2774: in std_logic;
A373, A933, A438: buffer std_logic;
A2512, A2346: in std_logic;
A666: buffer std_logic;
A2478, A2212, A2114: in std_logic;
A1097: buffer std_logic;
A2179: in std_logic;
A571: buffer std_logic;
A2510, A2676, A2348: in std_logic
);
end testing;
architecture testing_behav of testing is
signal A2009, A812, A2055, A388, A1820, A2457, A1025, A385, A1764, A615,
A2505, A1391, A1249, A353, A2640, A1425, A1516, A1042, A2615, A589,
A2143, A1185, A1558, A592, A483, A2417, A2078, A2184, A1398, A892,
A1067, A1490, A2071, A2194, A2591, A362, A995, A2288, A2418, A1853,
A2686, A1009, A443, A683, A2168, A824, A1498, A1632, A1905, A2202,
A1211, A1755, A1865, A609, A872, A1380, A432, A1965, A1627, A713,
A842, A1154, A2451, A846, A1793, A2098, A2553, A1221, A2176, A2290,
A2395, A1101, A2424, A2763, A1696, A1216, A1341, A2094, A1094, A1724,
A1049, A2713, A1165, A1737, A980, A1324, A1730, A2745, A2134, A611,
A2649, A1747, A1680, A332, A2564, A412, A2335, A751, A1936, A1819,
A979, A2064, A2535, A558, A2680, A2493, A644, A1205, A345, A1835,
A1504, A2265, A981, A2244, A1104, A1845, A2222, A1682, A2272, A2705,
A2762, A916, A2333, A1076, A1258, A906, A1885, A2340, A858, A1329,
A797, A1087, A722, A924, A940, A2431, A1791, A939, A661, A2300, A2514,
A2153, A1911, A2486, A623, A2211, A1952, A1587, A1648, A1692, A1125,
A793, A956, A1135, A1334, A1523, A1475, A1708, A2020, A2156, A1752,
A2697, A1461, A896, A416, A1767, A1419, A2603, A1645, A1292, A1483,
A1892, A1760, A823, A2441, A528, A533, A880, A2310, A2627, A1568,
A543, A510, A2461, A2468, A1414, A1804, A2122, A1117, A1544, A1712,
A2730, A1374, A1365, A1615, A2619, A2756, A1408, A395, A1174, A698,
A1597, A2370, A374, A972, A1606, A2354, A805, A1665, A478, A642, A759,
A819, A599, A1573, A991, A2658, A1362, A772, A1675, A1213, A746,
A1335, A654, A2749, A2768, A1974, A1727, A1051, A1187, A2398, A499,
A1992, A738, A1403, A1656, A1553, A2568, A1434, A2400, A2005, A1045,
A2259, A2771, A705, A2632, A2540, A2125, A2547, A552, A2668, A1388,
A2046, A2161, A1926, A2351, A2012, A1058, A1899, A2329, A1182, A447,
A1060, A1193, A1881, A2058, A1909, A1722, A973, A2759, A2767, A784,
A1464, A2403, A519, A1320, A2367, A1940, A2001, A1507, A1500, A763,
A2198, A1201, A1429, A1811, A1155, A1758, A911, A2026, A2399, A960,
A1235, A777, A1126, A2284, A2404, A909, A2704, A1541, A1394, A1083,
A1171, A580, A1959, A2595, A1621, A2421, A2701, A622, A2173, A2772,
A1070, A1422, A1700, A2035, A709, A806, A1307, A2683, A1493, A1856,
A912, A1325, A1618, A1961, A2294, A1018, A1158, A2696, A1623, A381,
A2695, A1896, A2287, A877, A2580, A2164, A2523, A984, A523, A616,
A2661, A1657, A2328, A2717, A397, A1077, A2090, A754, A1717, A1309,
A1686, A1579, A2320, A1169, A1237, A814, A1354, A968, A836, A2190,
A2021, A1650, A1511, A1768, A2357, A2465, A2570, A717, A2237, A2207,
A2252, A1270, A466, A1495, A585, A1296, A1100, A2787, A1453, A1222,
A1079, A1072, A1949, A2388, A1773, A396, A1162, A2737, A2061, A2276,
A1869, A1916, A1704, A1113, A2502, A2261, A2558, A1945, A344, A1487,
A1227, A1230, A2338, A2268, A1055, A2782, A2714, A595, A1731, A1561,
A1250, A433, A627, A1723, A1246, A2729, A1418, A451, A658, A630,
A1439, A1581, A2159, A333, A366, A2733, A1796, A952, A1893, A2232,
A1316, A2376, A853, A2152, A1489, A1953, A2240, A662, A1831, A1577,
A2766, A442, A1536, A943, A1034, A1970, A675, A935, A547, A1110,
A2111, A1266, A1503, A1871, A1241, A1274, A1609, A710, A1255, A688,
A1746, A647, A542, A1672, A1384, A1120, A563, A928, A1005, A1988,
A2538, A1783, A2622, A976, A803, A2102, A1809, A561, A990, A1090,
A1888, A1404, A1035, A2042, A1288, A2722, A460, A488, A554, A1999,
A1978, A2325, A473, A1527, A862, A1900, A811, A1639, A1143, A1993,
A2226, A1454, A1843, A2791, A1331, A2307, A2583, A704, A1282, A461,
A422, A694, A1291, A680, A2665, A1208, A1314, A1668, A1654, A490,
A1148, A1691, A2106, A818, A2620, A1081, A2123, A1802, A1041, A455,
A1602, A1548, A1441, A1021, A1862, A1733, A889, A1677, A750, A579,
A1740, A2437, A726, A779, A522, A1134, A428, A1310, A1697, A2364,
A557, A1681, A1816, A1664, A463, A346, A1284, A2394, A2205, A2387,
A2672, A2135, A2358, A2527, A2752, A2262, A2038, A2587, A1039, A1140,
A1501, A1470, A1109, A1530, A1102, A2599, A2536, A431, A747, A610,
A1048, A1838, A400, A2408, A1637, A690, A1093, A1583, A1683, A2384,
A936, A2648, A871, A1159, A583, A2496, A1714, A516, A915, A1225, A659,
A1226, A1259, A748, A2195, A2761, A850, A1232, A1882, A1348, A573,
A2425, A1476, A2033, A1194, A1014, A1748, A2628, A2109, A1219, A1204,
A1649, A2452, A389, A1778, A1426, A893, A1378, A2053, A1026, A489,
A902, A1276, A1617, A2054, A2283, A1763, A1186, A1027, A2293, A2416,
A1678, A2757, A2171, A1944, A1912, A1373, A770, A2556, A2803, A2341,
A2407, A1392, A2004, A456, A2592, A2593, A2210, A2571, A2193, A2614,
A2793, A1805, A2716, A2185, A650, A874, A1170, A1836, A969, A2522,
A1339, A720, A1592, A1315, A1188, A712, A825, A1304, A719, A1515,
A1264, A987, A354, A1240, A1628, A1821, A1633, A2112, A608, A1725,
A839, A2684, A2706, A873, A386, A764, A1906, A2230, A2530, A2178,
A1756, A1794, A377, A446, A1939, A560, A808, A2755, A2355, A1923,
A420, A2256, A2334, A1728, A1019, A949, A1173, A869, A1210, A755,
A1840, A1050, A1555, A1358, A971, A2562, A1780, A494, A1743, A1363,
A790, A1554, A2128, A2065, A1149, A1560, A1973, A641, A1212, A1387,
A1326, A2567, A2371, A2659, A845, A2618, A885, A2548, A1529, A730,
A2504, A2573, A2013, A1402, A1935, A628, A1879, A1787, A2541, A1736,
A2472, A1846, A841, A739, A2790, A2633, A758, A2296, A1368, A1124,
A2332, A375, A708, A1605, A2271, A2060, A1457, A2160, A1898, A2669,
A2653, A920, A687, A941, A1531, A1413, A2322, A614, A2469, A1612,
A1319, A484, A994, A1088, A1442, A879, A1052, A781, A721, A881, A1122,
A1269, A2234, A1437, A795, A551, A1901, A1707, A2154, A2602, A1469,
A1248, A2517, A794, A678, A1482, A1448, A1166, A1751, A1008, A1824,
A527, A1229, A1167, A1891, A1866, A2099, A1190, A1460, A2303, A1492,
A2487, A526, A2095, A2731, A2458, A2475, A1565, A1543, A923, A2552,
A1215, A1289, A1895, A1715, A1687, A2074, A2799, A840, A1969, A2581,
A1377, A2524, A1452, A646, A2167, A983, A2120, A1718, A1494, A1355,
A1586, A553, A1913, A2238, A415, A1144, A2306, A619, A2516, A1238,
A2689, A821, A2141, A2788, A506, A1446, A665, A474, A2253, A1071,
A1698, A507, A1271, A2269, A1954, A358, A1812, A1344, A640, A1280,
A1522, A467, A351, A532, A1703, A576, A2738, A2501, A1774, A1297,
A1948, A2786, A341, A1532, A1589, A1108, A2402, A907, A2000, A2617,
A760, A1119, A1932, A1980, A1301, A1244, A2432, A2188, A521, A1673,
A2638, A2201, A1759, A1308, A1423, A2549, A2034, A2275, A854, A1549,
A2199, A581, A1156, A2368, A480, A2804, A382, A1508, A1105, A2454,
A2297, A2068, A2499, A2175, A1624, A493, A830, A1056, A2286, A1477,
A544, A1395, A2393, A479, A2138, A2172, A2596, A2091, A2630, A2539,
A2206, A1962, A390, A1875, A975, A550, A849, A863, A2692, A1777,
A1601, A1364, A957, A2482, A511, A2654, A1017, A2623, A1989, A1966,
A1803, A1977, A586, A1852, A1179, A1038, A1313, A1352, A1338, A778,
A2584, A2462, A1007, A870, A2702, A922, A1207, A2794, A1596, A424,
A631, A2650, A1383, A485, A423, A1920, A2127, A462, A815, A498, A2321,
A1004, A1741, A1481, A1863, A1082, A695, A1889, A1784, A1655, A2229,
A2673, A1547, A1797, A2101, A2621, A1252, A1044, A2765, A1638, A2157,
A1629, A1580, A1781, A452, A1486, A1433, A1438, A2647, A1488, A1265,
A1347, A2142, A1576, A1200, A2557, A1275, A677, A1150, A2383, A2027,
A2070, A1540, A1591, A596, A2233, A1116, A1514, A674, A742, A1251,
A2492, A639, A1111, A1582, A334, A944, A927, A785, A440, A1283, A2734,
A2317, A2243, A1535, A2131, A515, A2422, A1870, A566, A1084, A1562,
A1407, A948, A2555, A1640, A411, A809, A929, A1608, A1197, A2349,
A1917, A590, A773, A1231, A2471, A1417, A1859, A2242, A2780, A1902,
A1053, A457, A530, A2605, A1121, A724, A673, A1526, A1256, A1563,
A2043, A2096, A789, A903, A1513, A1300, A1224, A1575, A629, A419,
A2789, A1960, A1443, A2723, A1318, A1372, A1485, A1412, A2044, A882,
A1431, A2651, A787, A1775, A1658, A2715, A1667, A1089, A756, A2151,
A1047, A2250, A408, A1534, A1566, A696, A2693, A1115, A817, A513,
A429, A2316, A2302, A1641, A2764, A2124, A1890, A1950, A774, A525,
A2319, A1022, A2434, A500, A1467, A1559, A1769, A363, A1938, A725,
A1750, A1285, A1037, A652, A807, A2024, A545, A393, A1160, A1546,
A1817, A1997, A2010, A2257, A2585, A572, A649, A1359, A2474, A1689,
A492, A1785, A2588, A1016, A2606, A886, A1878, A548, A2372, A2323,
A2634, A391, A1927, A1176, A1828, A1967, A2690, A1702, A2228, A791,
A1551, A2374, A740, A441, A1178, A2423, A1340, A1206, A2221, A1330,
A2108, A2100, A2189, A398, A2489, A1670, A1994, A1832, A2163, A1360,
A937, A855, A597, A1584, A2566, A1123, A2003, A749, A978, A1401,
A2656, A780, A2518, A782, A1694, A1636, A1788, A2022, A1436, A2662,
A686, A2754, A497, A2365, A2778, A1396, A2660, A1069, A1444, A1277,
A2459, A993, A2235, A1595, A582, A1023, A910, A878, A1729, A2353,
A689, A1459, A1518, A1040, A2391, A1651, A1468, A716, A953, A1233,
A1478, A844, A2800, A481, A1753, A908, A2032, A2551, A607, A826,
A1625, A1556, A1839, A426, A2688, A986, A961, A2798, A555, A1305,
A2236, A1263, A1837, A2267, A1799, A1822, A1195, A2277, A355, A1679,
A1934, A2796, A476, A1491, A1721, A1261, A875, A1473, A2192, A1867,
A1634, A1449, A2685, A360, A2397, A2204, A1642, A1356, A2525, A401,
A1855, A1092, A1080, A1218, A2528, A1343, A2639, A1502, A2224, A1749,
A848, A1841, A2166, A1239, A2598, A2136, A2299, A464, A1138, A2063,
A2386, A1719, A1903, A1825, A2561, A2170, A617, A2508, A587, A1684,
A1203, A1074, A1706, A2533, A2466, A2270, A2426, A1013, A1847, A2495,
A1542, A2703, A1943, A2331, A1735, A383, A2498, A2342, A1877, A1643,
A1463, A1043, A496, A1416, A1613, A914, A2783, A2726, A1848, A1886,
A1904, A1456, A2118, A676, A1112, A926, A655, A2449, A335, A1538,
A453, A2433, A1572, A593, A1782, A743, A342, A2805, A1744, A954,
A2438, A2470, A992, A1268, A2219, A1137, A2712, A1789, A1386, A2132,
A1432, A2483, A2225, A1860, A1243, A2392, A2092, A410, A384, A1674,
A1570, A1253, A1272, A2484, A378, A1661, A2428, A2197, A1286, A1057,
A2720, A2158, A1085, A2066, A829, A2601, A1716, A1003, A1663, A620,
A2727, A1567, A660, A512, A1990, A1800, A2352, A2139, A445, A1505,
A707, A728, A1924, A1806, A2655, A1141, A2616, A2186, A1367, A638,
A816, A549, A2779, A2087, A1333, A414, A2624, A2747, A1693, A2666,
A2515, A1585, A1874, A2104, A1995, A2631, A860, A744, A367, A376,
A2040, A945, A731, A475, A352, A1136, A2440, A729, A425, A1312, A1202,
A656, A1742, A529, A2309, A1921, A508, A671, A1480, A2670, A556, A692,
A1293, A1604, A959, A2574, A1972, A894, A2266, A1590, A859, A1521,
A1798, A2503, A1610, A577, A2057, A1907, A598, A1688, A2531, A2362,
A2494, A2200, A347, A1883, A761, A1814, A2231, A2406, A1720, A1826,
A2613, A2453, A1427, A2203, A837, A1351, A1399, A1151, A1963, A2698,
A2292, A1795, A1931, A2491, A2369, A1183, A2529, A1957, A786, A1474,
A2069, A2077, A2563, A2037, A359, A2073, A1346, A540, A890, A1321,
A775, A2519, A2409, A1198, A1406, A2360, A1028, A1411, A645, A517,
A2646, A1520, A1858, A2088, A1302, A1298, A651, A1420, A2174, A1766,
A2326, A1894, A624, A2663, A851, A1075, A684, A958, A618, A1327,
A2582, A1873, A1918, A2031, A711, A1771, A1376, A2751, A918, A1337,
A2572, A1652, A1214, A1710, A1281, A2760, A2735, A982, A2337, A1451,
A1163, A2463, A2162, A1851, A664, A2008, A2239, A1947, A2274, A2629,
A1106, A1353, A613, A1382, A2681, A1510, A574, A1447, A2500, A691,
A1813, A1616, A1191, A2382, A1646, A752, A2263, A820, A1594, A2359,
A1497, A2719, A2209, A2324, A449, A741, A392, A2691, A905, A394,
A1336, A1164, A2746, A1409, A546, A1955, A2298, A1323, A1161, A2025,
A1552, A2586, A379, A1653, A1829, A2635, A2460, A2607, A1550, A2537,
A1177, A1607, A1968, A364, A1175, A1545, A643, A477, A413, A2336,
A1991, A1598, A2565, A1659, A1181, A2373, A1015, A1738, A2700, A1695,
A887, A2011, A706, A1844, A399, A856, A2657, A565, A947, A2254, A1786,
A977, A2488, A1925, A2753, A1389, A1569, A1400, A1833, A1979, A2023,
A1525, A2520, A2045, A2119, A612, A2144, A1254, A723, A1588, A1564,
A2506, A531, A955, A1371, A1073, A1068, A1600, A788, A2604, A1361,
A1928, A663, A2217, A1059, A1533, A2481, A418, A1257, A626, A2456,
A1644, A888, A1430, A1524, A2097, A883, A2785, A361, A1599, A792,
A2724, A1614, A2251, A1790, A1006, A458, A757, A2637, A486, A1118,
A2121, A2169, A1975, A921, A2435, A444, A1145, A682, A2145, A1199,
A417, A1484, A2305, A434, A672, A1466, A2396, A520, A697, A1574,
A1666, A559, A2770, A1499, A1342, A1357, A1792, A2490, A1897, A1139,
A1662, A2343, A970, A524, A2718, A2318, A1260, A2264, A2467, A1854,
A2366, A1770, A1864, A1685, A771, A1107, A1818, A2130, A1287, A2534,
A2062, A2401, A2769, A2507, A1776, A1810, A1091, A1919, A2006, A745,
A653, A465, A2223, A2137, A2597, A1876, A514, A448, A2526, A1942,
A1012, A2028, A857, A985, A1245, A904, A2427, A1705, A1884, A938,
A796, A2350, A594, A387, A1046, A2795, A1754, A2801, A1024, A1458,
A350, A1397, A1317, A1445, A1517, A2554, A1234, A2056, A843, A2289,
A1914, A1834, A762, A1951, A1278, A2430, A2390, A2075, A2419, A1306,
A349, A822, A591, A1479, A1262, A1349, A2455, A1701, A2450, A1626,
A1196, A1424, A2590, A1153, A2687, A482, A409, A2739, A356, A1390,
A1761, A606, A1699, A1220, A357, A2682, A2308, A605, A1295, A1142,
A827, A1998, A2291, A714, A1823, A2187, A813, A2626, A962, A2085,
A2797, A1375, A1711, A715, A2442, A1472, A427, A1328, A2191, A2694,
A1369, A1850, A1929, A1933, A368, A1366, A2227, A562, A876, A847,
A621, A1147, A1690, A1709, A1603, A1861, A1002, A1405, A1996, A1635,
A1987, A2671, A2103, A2792, A407, A1168, A1964, A1036, A1011, A1209,
A450, A951, A2260, A2699, A1922, A421, A1311, A1127, A1512, A2667,
A1762, A2086, A946, A2105, A1133, A2625, A1887, A925, A588, A681,
A2258, A2664, A487, A539, A1779, A454, A2059, A1061, A2330, A2126,
A2464, A1801, A942, A2072, A1539, A884, A861, A1228, A753, A2652,
A2448, A679, A1294, A1462, A1880, A783, A459, A693, A1593, A2497,
A1827, A2728, A1223, A430, A2732, A913, A2140, A2436, A974, A1180,
A1381, A828, A2750, A2725, A2029, A2439, A1415, A2559, A1435, A2241,
A1571, A2389, A2784, A1345, A2301, A1857, A1332, A2067, A2052, A2473,
A2007, A1279, A1578, A2781, A2550, A919, A1189, A1267, A1808, A1849,
A2155, A1537, A2600, A2721, A2485, A1086, A1807, A2339, A564, A1941,
A2218, A2532, A1660, A1273, A917, A1217, A2196, A727, A2093, A1509,
A1379, A2356, A2736, A648, A2748, A1872, A2521, A1103, A2165, A1946,
A2327, A685, A1393, A491, A2076, A584, A2758, A2589, A1450, A1772,
A1868, A737, A380, A1757, A2110, A1410, A1630, A2429, A2802, A2304,
A2208, A1236, A1647, A1976, A1528, A1440, A2041, A1192, A2415, A810,
A1455, A1146, A2129, A1519, A1471, A1020, A2385, A1290, A895, A578,
A495, A1496, A1669, A1910, A1611, A1971, A1915, A2107, A1247, A575,
A2285, A2405, A1152, A852, A1184, A348, A1157, A1054, A989, A1815,
A838, A509, A2273, A2220, A632, A2036, A1557, A2039, A1114, A343,
A1322, A2019, A2363, A1739, A950, A1958, A1622, A1676, A1726, A657,
A1428, A1465, A1734, A1303, A1732, A1830, A2679, A988, A1620, A2636,
A2002, A1671, A1631, A1350, A365, A1956, A1172, A1010, A1745, A1713,
A891, A1842, A1937, A2079, A2133, A804, A1930, A2375, A718, A331,
A1986, A625, A2569, A1299, A1385, A776, A2089, A2255, A2594, A1001,
A2420, A2177, A1370, A1421, A2361, A1506, A1619, A1908, A2560, A2030,
A518, A1078, A2295, A1242, A1765, A541: std_logic;
begin
-- Start of original equations
A2013 <= A1991 and A2006;
A2012 <= (not A1991) and (not A2013);
A2011 <= A1991 or A2006;
A2010 <= (not A1984) or (not A1985);
A2009 <= A1991 or A2006;
A2008 <= (not A2007) and (not A1991);
A2007 <= A1991 and A2006;
A2006 <= (not A1982) or (not A1983);
A2005 <= A1983 and A1995;
A2004 <= A1984 or A1991;
A2003 <= A1984 or A1985;
A2002 <= (not A2012) or (not A2011);
A2001 <= A2010 and A2003;
A2000 <= ((not A1984) and A1991) or (A1984 and (not A1991));
A1999 <= (not A2008) or (not A2009);
A1998 <= (A1983 and A1995) or ((not A1983) and (not A1995));
A1997 <= A2005 or A1982;
A1996 <= A2002 and A1983;
A1995 <= A2004 and A2003;
A1994 <= A1999 and A1983;
A1993 <= A2001 and A2000;
A1992 <= ((not A1993) and A1983) or (A1993 and (not A1983));
A1991 <= ((not A1981) and A1982) or (A1981 and (not A1982));
A1990 <= A1991 and A1998;
A1989 <= A1991 and A1997;
A1988 <= A1996 or A1995;
A1987 <= A1994 or A1993;
A1986 <= A1992 and A1991;
A2019 <= A2025 and A2024;
A2020 <= A2027 or A2026;
A2021 <= A2029 or A2028;
A2022 <= A2024 and A2030;
A2023 <= A2024 and A2031;
A2024 <= ((not A2014) and A2015) or (A2014 and (not A2015));
A2025 <= ((not A2026) and A2016) or (A2026 and (not A2016));
A2026 <= A2034 and A2033;
A2027 <= A2032 and A2016;
A2028 <= A2037 and A2036;
A2029 <= A2035 and A2016;
A2030 <= A2038 or A2015;
A2031 <= (A2016 and A2028) or ((not A2016) and (not A2028));
A2032 <= (not A2041) or (not A2042);
A2033 <= ((not A2017) and A2024) or (A2017 and (not A2024));
A2034 <= A2043 and A2036;
A2035 <= (not A2045) or (not A2044);
A2036 <= A2017 or A2018;
A2037 <= A2017 or A2024;
A2038 <= A2016 and A2028;
A2039 <= (not A2015) or (not A2016);
A2040 <= A2024 and A2039;
A2041 <= (not A2040) and (not A2024);
A2042 <= A2024 or A2039;
A2043 <= (not A2017) or (not A2018);
A2044 <= A2024 or A2039;
A2045 <= (not A2024) and (not A2046);
A2046 <= A2024 and A2039;
A2052 <= A2058 and A2057;
A2053 <= A2060 or A2059;
A2054 <= A2062 or A2061;
A2055 <= A2057 and A2063;
A2056 <= A2057 and A2064;
A2057 <= ((not A2047) and A2048) or (A2047 and (not A2048));
A2058 <= ((not A2059) and A2049) or (A2059 and (not A2049));
A2059 <= A2067 and A2066;
A2060 <= A2065 and A2049;
A2061 <= A2070 and A2069;
A2062 <= A2068 and A2049;
A2063 <= A2071 or A2048;
A2064 <= (A2049 and A2061) or ((not A2049) and (not A2061));
A2065 <= (not A2074) or (not A2075);
A2066 <= ((not A2050) and A2057) or (A2050 and (not A2057));
A2067 <= A2076 and A2069;
A2068 <= (not A2078) or (not A2077);
A2069 <= A2050 or A2051;
A2070 <= A2050 or A2057;
A2071 <= A2049 and A2061;
A2072 <= (not A2048) or (not A2049);
A2073 <= A2057 and A2072;
A2074 <= (not A2073) and (not A2057);
A2075 <= A2057 or A2072;
A2076 <= (not A2050) or (not A2051);
A2077 <= A2057 or A2072;
A2078 <= (not A2057) and (not A2079);
A2079 <= A2057 and A2072;
A2085 <= A2091 and A2090;
A2086 <= A2093 or A2092;
A2087 <= A2095 or A2094;
A2088 <= A2090 and A2096;
A2089 <= A2090 and A2097;
A2090 <= ((not A2080) and A2081) or (A2080 and (not A2081));
A2091 <= ((not A2092) and A2082) or (A2092 and (not A2082));
A2092 <= A2100 and A2099;
A2093 <= A2098 and A2082;
A2094 <= A2103 and A2102;
A2095 <= A2101 and A2082;
A2096 <= A2104 or A2081;
A2097 <= (A2082 and A2094) or ((not A2082) and (not A2094));
A2098 <= (not A2107) or (not A2108);
A2099 <= ((not A2083) and A2090) or (A2083 and (not A2090));
A2100 <= A2109 and A2102;
A2101 <= (not A2111) or (not A2110);
A2102 <= A2083 or A2084;
A2103 <= A2083 or A2090;
A2104 <= A2082 and A2094;
A2105 <= (not A2081) or (not A2082);
A2106 <= A2090 and A2105;
A2107 <= (not A2106) and (not A2090);
A2108 <= A2090 or A2105;
A2109 <= (not A2083) or (not A2084);
A2110 <= A2090 or A2105;
A2111 <= (not A2090) and (not A2112);
A2112 <= A2090 and A2105;
A2118 <= A2124 and A2123;
A2119 <= A2126 or A2125;
A2120 <= A2128 or A2127;
A2121 <= A2123 and A2129;
A2122 <= A2123 and A2130;
A2123 <= ((not A2113) and A2114) or (A2113 and (not A2114));
A2124 <= ((not A2125) and A2115) or (A2125 and (not A2115));
A2125 <= A2133 and A2132;
A2126 <= A2131 and A2115;
A2127 <= A2136 and A2135;
A2128 <= A2134 and A2115;
A2129 <= A2137 or A2114;
A2130 <= (A2115 and A2127) or ((not A2115) and (not A2127));
A2131 <= (not A2140) or (not A2141);
A2132 <= ((not A2116) and A2123) or (A2116 and (not A2123));
A2133 <= A2142 and A2135;
A2134 <= (not A2144) or (not A2143);
A2135 <= A2116 or A2117;
A2136 <= A2116 or A2123;
A2137 <= A2115 and A2127;
A2138 <= (not A2114) or (not A2115);
A2139 <= A2123 and A2138;
A2140 <= (not A2139) and (not A2123);
A2141 <= A2123 or A2138;
A2142 <= (not A2116) or (not A2117);
A2143 <= A2123 or A2138;
A2144 <= (not A2123) and (not A2145);
A2145 <= A2123 and A2138;
A2151 <= A2157 and A2156;
A2152 <= A2159 or A2158;
A2153 <= A2161 or A2160;
A2154 <= A2156 and A2162;
A2155 <= A2156 and A2163;
A2156 <= ((not A2146) and A2147) or (A2146 and (not A2147));
A2157 <= ((not A2158) and A2148) or (A2158 and (not A2148));
A2158 <= A2166 and A2165;
A2159 <= A2164 and A2148;
A2160 <= A2169 and A2168;
A2161 <= A2167 and A2148;
A2162 <= A2170 or A2147;
A2163 <= (A2148 and A2160) or ((not A2148) and (not A2160));
A2164 <= (not A2173) or (not A2174);
A2165 <= ((not A2149) and A2156) or (A2149 and (not A2156));
A2166 <= A2175 and A2168;
A2167 <= (not A2177) or (not A2176);
A2168 <= A2149 or A2150;
A2169 <= A2149 or A2156;
A2170 <= A2148 and A2160;
A2171 <= (not A2147) or (not A2148);
A2172 <= A2156 and A2171;
A2173 <= (not A2172) and (not A2156);
A2174 <= A2156 or A2171;
A2175 <= (not A2149) or (not A2150);
A2176 <= A2156 or A2171;
A2177 <= (not A2156) and (not A2178);
A2178 <= A2156 and A2171;
A2184 <= A2190 and A2189;
A2185 <= A2192 or A2191;
A2186 <= A2194 or A2193;
A2187 <= A2189 and A2195;
A2188 <= A2189 and A2196;
A2189 <= ((not A2179) and A2180) or (A2179 and (not A2180));
A2190 <= ((not A2191) and A2181) or (A2191 and (not A2181));
A2191 <= A2199 and A2198;
A2192 <= A2197 and A2181;
A2193 <= A2202 and A2201;
A2194 <= A2200 and A2181;
A2195 <= A2203 or A2180;
A2196 <= (A2181 and A2193) or ((not A2181) and (not A2193));
A2197 <= (not A2206) or (not A2207);
A2198 <= ((not A2182) and A2189) or (A2182 and (not A2189));
A2199 <= A2208 and A2201;
A2200 <= (not A2210) or (not A2209);
A2201 <= A2182 or A2183;
A2202 <= A2182 or A2189;
A2203 <= A2181 and A2193;
A2204 <= (not A2180) or (not A2181);
A2205 <= A2189 and A2204;
A2206 <= (not A2205) and (not A2189);
A2207 <= A2189 or A2204;
A2208 <= (not A2182) or (not A2183);
A2209 <= A2189 or A2204;
A2210 <= (not A2189) and (not A2211);
A2211 <= A2189 and A2204;
A2217 <= A2223 and A2222;
A2218 <= A2225 or A2224;
A2219 <= A2227 or A2226;
A2220 <= A2222 and A2228;
A2221 <= A2222 and A2229;
A2222 <= ((not A2212) and A2213) or (A2212 and (not A2213));
A2223 <= ((not A2224) and A2214) or (A2224 and (not A2214));
A2224 <= A2232 and A2231;
A2225 <= A2230 and A2214;
A2226 <= A2235 and A2234;
A2227 <= A2233 and A2214;
A2228 <= A2236 or A2213;
A2229 <= (A2214 and A2226) or ((not A2214) and (not A2226));
A2230 <= (not A2239) or (not A2240);
A2231 <= ((not A2215) and A2222) or (A2215 and (not A2222));
A2232 <= A2241 and A2234;
A2233 <= (not A2243) or (not A2242);
A2234 <= A2215 or A2216;
A2235 <= A2215 or A2222;
A2236 <= A2214 and A2226;
A2237 <= (not A2213) or (not A2214);
A2238 <= A2222 and A2237;
A2239 <= (not A2238) and (not A2222);
A2240 <= A2222 or A2237;
A2241 <= (not A2215) or (not A2216);
A2242 <= A2222 or A2237;
A2243 <= (not A2222) and (not A2244);
A2244 <= A2222 and A2237;
A2250 <= A2256 and A2255;
A2251 <= A2258 or A2257;
A2252 <= A2260 or A2259;
A2253 <= A2255 and A2261;
A2254 <= A2255 and A2262;
A2255 <= ((not A2245) and A2246) or (A2245 and (not A2246));
A2256 <= ((not A2257) and A2247) or (A2257 and (not A2247));
A2257 <= A2265 and A2264;
A2258 <= A2263 and A2247;
A2259 <= A2268 and A2267;
A2260 <= A2266 and A2247;
A2261 <= A2269 or A2246;
A2262 <= (A2247 and A2259) or ((not A2247) and (not A2259));
A2263 <= (not A2272) or (not A2273);
A2264 <= ((not A2248) and A2255) or (A2248 and (not A2255));
A2265 <= A2274 and A2267;
A2266 <= (not A2276) or (not A2275);
A2267 <= A2248 or A2249;
A2268 <= A2248 or A2255;
A2269 <= A2247 and A2259;
A2270 <= (not A2246) or (not A2247);
A2271 <= A2255 and A2270;
A2272 <= (not A2271) and (not A2255);
A2273 <= A2255 or A2270;
A2274 <= (not A2248) or (not A2249);
A2275 <= A2255 or A2270;
A2276 <= (not A2255) and (not A2277);
A2277 <= A2255 and A2270;
A2283 <= A2289 and A2288;
A2284 <= A2291 or A2290;
A2285 <= A2293 or A2292;
A2286 <= A2288 and A2294;
A2287 <= A2288 and A2295;
A2288 <= ((not A2278) and A2279) or (A2278 and (not A2279));
A2289 <= ((not A2290) and A2280) or (A2290 and (not A2280));
A2290 <= A2298 and A2297;
A2291 <= A2296 and A2280;
A2292 <= A2301 and A2300;
A2293 <= A2299 and A2280;
A2294 <= A2302 or A2279;
A2295 <= (A2280 and A2292) or ((not A2280) and (not A2292));
A2296 <= (not A2305) or (not A2306);
A2297 <= ((not A2281) and A2288) or (A2281 and (not A2288));
A2298 <= A2307 and A2300;
A2299 <= (not A2309) or (not A2308);
A2300 <= A2281 or A2282;
A2301 <= A2281 or A2288;
A2302 <= A2280 and A2292;
A2303 <= (not A2279) or (not A2280);
A2304 <= A2288 and A2303;
A2305 <= (not A2304) and (not A2288);
A2306 <= A2288 or A2303;
A2307 <= (not A2281) or (not A2282);
A2308 <= A2288 or A2303;
A2309 <= (not A2288) and (not A2310);
A2310 <= A2288 and A2303;
A2316 <= A2322 and A2321;
A2317 <= A2324 or A2323;
A2318 <= A2326 or A2325;
A2319 <= A2321 and A2327;
A2320 <= A2321 and A2328;
A2321 <= ((not A2311) and A2312) or (A2311 and (not A2312));
A2322 <= ((not A2323) and A2313) or (A2323 and (not A2313));
A2323 <= A2331 and A2330;
A2324 <= A2329 and A2313;
A2325 <= A2334 and A2333;
A2326 <= A2332 and A2313;
A2327 <= A2335 or A2312;
A2328 <= (A2313 and A2325) or ((not A2313) and (not A2325));
A2329 <= (not A2338) or (not A2339);
A2330 <= ((not A2314) and A2321) or (A2314 and (not A2321));
A2331 <= A2340 and A2333;
A2332 <= (not A2342) or (not A2341);
A2333 <= A2314 or A2315;
A2334 <= A2314 or A2321;
A2335 <= A2313 and A2325;
A2336 <= (not A2312) or (not A2313);
A2337 <= A2321 and A2336;
A2338 <= (not A2337) and (not A2321);
A2339 <= A2321 or A2336;
A2340 <= (not A2314) or (not A2315);
A2341 <= A2321 or A2336;
A2342 <= (not A2321) and (not A2343);
A2343 <= A2321 and A2336;
A2349 <= A2355 and A2354;
A2350 <= A2357 or A2356;
A2351 <= A2359 or A2358;
A2352 <= A2354 and A2360;
A2353 <= A2354 and A2361;
A2354 <= ((not A2344) and A2345) or (A2344 and (not A2345));
A2355 <= ((not A2356) and A2346) or (A2356 and (not A2346));
A2356 <= A2364 and A2363;
A2357 <= A2362 and A2346;
A2358 <= A2367 and A2366;
A2359 <= A2365 and A2346;
A2360 <= A2368 or A2345;
A2361 <= (A2346 and A2358) or ((not A2346) and (not A2358));
A2362 <= (not A2371) or (not A2372);
A2363 <= ((not A2347) and A2354) or (A2347 and (not A2354));
A2364 <= A2373 and A2366;
A2365 <= (not A2375) or (not A2374);
A2366 <= A2347 or A2348;
A2367 <= A2347 or A2354;
A2368 <= A2346 and A2358;
A2369 <= (not A2345) or (not A2346);
A2370 <= A2354 and A2369;
A2371 <= (not A2370) and (not A2354);
A2372 <= A2354 or A2369;
A2373 <= (not A2347) or (not A2348);
A2374 <= A2354 or A2369;
A2375 <= (not A2354) and (not A2376);
A2376 <= A2354 and A2369;
A2382 <= A2388 and A2387;
A2383 <= A2390 or A2389;
A2384 <= A2392 or A2391;
A2385 <= A2387 and A2393;
A2386 <= A2387 and A2394;
A2387 <= ((not A2377) and A2378) or (A2377 and (not A2378));
A2388 <= ((not A2389) and A2379) or (A2389 and (not A2379));
A2389 <= A2397 and A2396;
A2390 <= A2395 and A2379;
A2391 <= A2400 and A2399;
A2392 <= A2398 and A2379;
A2393 <= A2401 or A2378;
A2394 <= (A2379 and A2391) or ((not A2379) and (not A2391));
A2395 <= (not A2404) or (not A2405);
A2396 <= ((not A2380) and A2387) or (A2380 and (not A2387));
A2397 <= A2406 and A2399;
A2398 <= (not A2408) or (not A2407);
A2399 <= A2380 or A2381;
A2400 <= A2380 or A2387;
A2401 <= A2379 and A2391;
A2402 <= (not A2378) or (not A2379);
A2403 <= A2387 and A2402;
A2404 <= (not A2403) and (not A2387);
A2405 <= A2387 or A2402;
A2406 <= (not A2380) or (not A2381);
A2407 <= A2387 or A2402;
A2408 <= (not A2387) and (not A2409);
A2409 <= A2387 and A2402;
A2415 <= A2421 and A2420;
A2416 <= A2423 or A2422;
A2417 <= A2425 or A2424;
A2418 <= A2420 and A2426;
A2419 <= A2420 and A2427;
A2420 <= ((not A2410) and A2411) or (A2410 and (not A2411));
A2421 <= ((not A2422) and A2412) or (A2422 and (not A2412));
A2422 <= A2430 and A2429;
A2423 <= A2428 and A2412;
A2424 <= A2433 and A2432;
A2425 <= A2431 and A2412;
A2426 <= A2434 or A2411;
A2427 <= (A2412 and A2424) or ((not A2412) and (not A2424));
A2428 <= (not A2437) or (not A2438);
A2429 <= ((not A2413) and A2420) or (A2413 and (not A2420));
A2430 <= A2439 and A2432;
A2431 <= (not A2441) or (not A2440);
A2432 <= A2413 or A2414;
A2433 <= A2413 or A2420;
A2434 <= A2412 and A2424;
A2435 <= (not A2411) or (not A2412);
A2436 <= A2420 and A2435;
A2437 <= (not A2436) and (not A2420);
A2438 <= A2420 or A2435;
A2439 <= (not A2413) or (not A2414);
A2440 <= A2420 or A2435;
A2441 <= (not A2420) and (not A2442);
A2442 <= A2420 and A2435;
A2448 <= A2454 and A2453;
A2449 <= A2456 or A2455;
A2450 <= A2458 or A2457;
A2451 <= A2453 and A2459;
A2452 <= A2453 and A2460;
A2453 <= ((not A2443) and A2444) or (A2443 and (not A2444));
A2454 <= ((not A2455) and A2445) or (A2455 and (not A2445));
A2455 <= A2463 and A2462;
A2456 <= A2461 and A2445;
A2457 <= A2466 and A2465;
A2458 <= A2464 and A2445;
A2459 <= A2467 or A2444;
A2460 <= (A2445 and A2457) or ((not A2445) and (not A2457));
A2461 <= (not A2470) or (not A2471);
A2462 <= ((not A2446) and A2453) or (A2446 and (not A2453));
A2463 <= A2472 and A2465;
A2464 <= (not A2474) or (not A2473);
A2465 <= A2446 or A2447;
A2466 <= A2446 or A2453;
A2467 <= A2445 and A2457;
A2468 <= (not A2444) or (not A2445);
A2469 <= A2453 and A2468;
A2470 <= (not A2469) and (not A2453);
A2471 <= A2453 or A2468;
A2472 <= (not A2446) or (not A2447);
A2473 <= A2453 or A2468;
A2474 <= (not A2453) and (not A2475);
A2475 <= A2453 and A2468;
A2481 <= A2487 and A2486;
A2482 <= A2489 or A2488;
A2483 <= A2491 or A2490;
A2484 <= A2486 and A2492;
A2485 <= A2486 and A2493;
A2486 <= ((not A2476) and A2477) or (A2476 and (not A2477));
A2487 <= ((not A2488) and A2478) or (A2488 and (not A2478));
A2488 <= A2496 and A2495;
A2489 <= A2494 and A2478;
A2490 <= A2499 and A2498;
A2491 <= A2497 and A2478;
A2492 <= A2500 or A2477;
A2493 <= (A2478 and A2490) or ((not A2478) and (not A2490));
A2494 <= (not A2503) or (not A2504);
A2495 <= ((not A2479) and A2486) or (A2479 and (not A2486));
A2496 <= A2505 and A2498;
A2497 <= (not A2507) or (not A2506);
A2498 <= A2479 or A2480;
A2499 <= A2479 or A2486;
A2500 <= A2478 and A2490;
A2501 <= (not A2477) or (not A2478);
A2502 <= A2486 and A2501;
A2503 <= (not A2502) and (not A2486);
A2504 <= A2486 or A2501;
A2505 <= (not A2479) or (not A2480);
A2506 <= A2486 or A2501;
A2507 <= (not A2486) and (not A2508);
A2508 <= A2486 and A2501;
A2514 <= A2520 and A2519;
A2515 <= A2522 or A2521;
A2516 <= A2524 or A2523;
A2517 <= A2519 and A2525;
A2518 <= A2519 and A2526;
A2519 <= ((not A2509) and A2510) or (A2509 and (not A2510));
A2520 <= ((not A2521) and A2511) or (A2521 and (not A2511));
A2521 <= A2529 and A2528;
A2522 <= A2527 and A2511;
A2523 <= A2532 and A2531;
A2524 <= A2530 and A2511;
A2525 <= A2533 or A2510;
A2526 <= (A2511 and A2523) or ((not A2511) and (not A2523));
A2527 <= (not A2536) or (not A2537);
A2528 <= ((not A2512) and A2519) or (A2512 and (not A2519));
A2529 <= A2538 and A2531;
A2530 <= (not A2540) or (not A2539);
A2531 <= A2512 or A2513;
A2532 <= A2512 or A2519;
A2533 <= A2511 and A2523;
A2534 <= (not A2510) or (not A2511);
A2535 <= A2519 and A2534;
A2536 <= (not A2535) and (not A2519);
A2537 <= A2519 or A2534;
A2538 <= (not A2512) or (not A2513);
A2539 <= A2519 or A2534;
A2540 <= (not A2519) and (not A2541);
A2541 <= A2519 and A2534;
A2547 <= A2553 and A2552;
A2548 <= A2555 or A2554;
A2549 <= A2557 or A2556;
A2550 <= A2552 and A2558;
A2551 <= A2552 and A2559;
A2552 <= ((not A2542) and A2543) or (A2542 and (not A2543));
A2553 <= ((not A2554) and A2544) or (A2554 and (not A2544));
A2554 <= A2562 and A2561;
A2555 <= A2560 and A2544;
A2556 <= A2565 and A2564;
A2557 <= A2563 and A2544;
A2558 <= A2566 or A2543;
A2559 <= (A2544 and A2556) or ((not A2544) and (not A2556));
A2560 <= (not A2569) or (not A2570);
A2561 <= ((not A2545) and A2552) or (A2545 and (not A2552));
A2562 <= A2571 and A2564;
A2563 <= (not A2573) or (not A2572);
A2564 <= A2545 or A2546;
A2565 <= A2545 or A2552;
A2566 <= A2544 and A2556;
A2567 <= (not A2543) or (not A2544);
A2568 <= A2552 and A2567;
A2569 <= (not A2568) and (not A2552);
A2570 <= A2552 or A2567;
A2571 <= (not A2545) or (not A2546);
A2572 <= A2552 or A2567;
A2573 <= (not A2552) and (not A2574);
A2574 <= A2552 and A2567;
A2580 <= A2586 and A2585;
A2581 <= A2588 or A2587;
A2582 <= A2590 or A2589;
A2583 <= A2585 and A2591;
A2584 <= A2585 and A2592;
A2585 <= ((not A2575) and A2576) or (A2575 and (not A2576));
A2586 <= ((not A2587) and A2577) or (A2587 and (not A2577));
A2587 <= A2595 and A2594;
A2588 <= A2593 and A2577;
A2589 <= A2598 and A2597;
A2590 <= A2596 and A2577;
A2591 <= A2599 or A2576;
A2592 <= (A2577 and A2589) or ((not A2577) and (not A2589));
A2593 <= (not A2602) or (not A2603);
A2594 <= ((not A2578) and A2585) or (A2578 and (not A2585));
A2595 <= A2604 and A2597;
A2596 <= (not A2606) or (not A2605);
A2597 <= A2578 or A2579;
A2598 <= A2578 or A2585;
A2599 <= A2577 and A2589;
A2600 <= (not A2576) or (not A2577);
A2601 <= A2585 and A2600;
A2602 <= (not A2601) and (not A2585);
A2603 <= A2585 or A2600;
A2604 <= (not A2578) or (not A2579);
A2605 <= A2585 or A2600;
A2606 <= (not A2585) and (not A2607);
A2607 <= A2585 and A2600;
A2613 <= A2619 and A2618;
A2614 <= A2621 or A2620;
A2615 <= A2623 or A2622;
A2616 <= A2618 and A2624;
A2617 <= A2618 and A2625;
A2618 <= ((not A2608) and A2609) or (A2608 and (not A2609));
A2619 <= ((not A2620) and A2610) or (A2620 and (not A2610));
A2620 <= A2628 and A2627;
A2621 <= A2626 and A2610;
A2622 <= A2631 and A2630;
A2623 <= A2629 and A2610;
A2624 <= A2632 or A2609;
A2625 <= (A2610 and A2622) or ((not A2610) and (not A2622));
A2626 <= (not A2635) or (not A2636);
A2627 <= ((not A2611) and A2618) or (A2611 and (not A2618));
A2628 <= A2637 and A2630;
A2629 <= (not A2639) or (not A2638);
A2630 <= A2611 or A2612;
A2631 <= A2611 or A2618;
A2632 <= A2610 and A2622;
A2633 <= (not A2609) or (not A2610);
A2634 <= A2618 and A2633;
A2635 <= (not A2634) and (not A2618);
A2636 <= A2618 or A2633;
A2637 <= (not A2611) or (not A2612);
A2638 <= A2618 or A2633;
A2639 <= (not A2618) and (not A2640);
A2640 <= A2618 and A2633;
A2646 <= A2652 and A2651;
A2647 <= A2654 or A2653;
A2648 <= A2656 or A2655;
A2649 <= A2651 and A2657;
A2650 <= A2651 and A2658;
A2651 <= ((not A2641) and A2642) or (A2641 and (not A2642));
A2652 <= ((not A2653) and A2643) or (A2653 and (not A2643));
A2653 <= A2661 and A2660;
A2654 <= A2659 and A2643;
A2655 <= A2664 and A2663;
A2656 <= A2662 and A2643;
A2657 <= A2665 or A2642;
A2658 <= (A2643 and A2655) or ((not A2643) and (not A2655));
A2659 <= (not A2668) or (not A2669);
A2660 <= ((not A2644) and A2651) or (A2644 and (not A2651));
A2661 <= A2670 and A2663;
A2662 <= (not A2672) or (not A2671);
A2663 <= A2644 or A2645;
A2664 <= A2644 or A2651;
A2665 <= A2643 and A2655;
A2666 <= (not A2642) or (not A2643);
A2667 <= A2651 and A2666;
A2668 <= (not A2667) and (not A2651);
A2669 <= A2651 or A2666;
A2670 <= (not A2644) or (not A2645);
A2671 <= A2651 or A2666;
A2672 <= (not A2651) and (not A2673);
A2673 <= A2651 and A2666;
A2679 <= A2685 and A2684;
A2680 <= A2687 or A2686;
A2681 <= A2689 or A2688;
A2682 <= A2684 and A2690;
A2683 <= A2684 and A2691;
A2684 <= ((not A2674) and A2675) or (A2674 and (not A2675));
A2685 <= ((not A2686) and A2676) or (A2686 and (not A2676));
A2686 <= A2694 and A2693;
A2687 <= A2692 and A2676;
A2688 <= A2697 and A2696;
A2689 <= A2695 and A2676;
A2690 <= A2698 or A2675;
A2691 <= (A2676 and A2688) or ((not A2676) and (not A2688));
A2692 <= (not A2701) or (not A2702);
A2693 <= ((not A2677) and A2684) or (A2677 and (not A2684));
A2694 <= A2703 and A2696;
A2695 <= (not A2705) or (not A2704);
A2696 <= A2677 or A2678;
A2697 <= A2677 or A2684;
A2698 <= A2676 and A2688;
A2699 <= (not A2675) or (not A2676);
A2700 <= A2684 and A2699;
A2701 <= (not A2700) and (not A2684);
A2702 <= A2684 or A2699;
A2703 <= (not A2677) or (not A2678);
A2704 <= A2684 or A2699;
A2705 <= (not A2684) and (not A2706);
A2706 <= A2684 and A2699;
A2712 <= A2718 and A2717;
A2713 <= A2720 or A2719;
A2714 <= A2722 or A2721;
A2715 <= A2717 and A2723;
A2716 <= A2717 and A2724;
A2717 <= ((not A2707) and A2708) or (A2707 and (not A2708));
A2718 <= ((not A2719) and A2709) or (A2719 and (not A2709));
A2719 <= A2727 and A2726;
A2720 <= A2725 and A2709;
A2721 <= A2730 and A2729;
A2722 <= A2728 and A2709;
A2723 <= A2731 or A2708;
A2724 <= (A2709 and A2721) or ((not A2709) and (not A2721));
A2725 <= (not A2734) or (not A2735);
A2726 <= ((not A2710) and A2717) or (A2710 and (not A2717));
A2727 <= A2736 and A2729;
A2728 <= (not A2738) or (not A2737);
A2729 <= A2710 or A2711;
A2730 <= A2710 or A2717;
A2731 <= A2709 and A2721;
A2732 <= (not A2708) or (not A2709);
A2733 <= A2717 and A2732;
A2734 <= (not A2733) and (not A2717);
A2735 <= A2717 or A2732;
A2736 <= (not A2710) or (not A2711);
A2737 <= A2717 or A2732;
A2738 <= (not A2717) and (not A2739);
A2739 <= A2717 and A2732;
A2745 <= A2751 and A2750;
A2746 <= A2753 or A2752;
A2747 <= A2755 or A2754;
A2748 <= A2750 and A2756;
A2749 <= A2750 and A2757;
A2750 <= ((not A2740) and A2741) or (A2740 and (not A2741));
A2751 <= ((not A2752) and A2742) or (A2752 and (not A2742));
A2752 <= A2760 and A2759;
A2753 <= A2758 and A2742;
A2754 <= A2763 and A2762;
A2755 <= A2761 and A2742;
A2756 <= A2764 or A2741;
A2757 <= (A2742 and A2754) or ((not A2742) and (not A2754));
A2758 <= (not A2767) or (not A2768);
A2759 <= ((not A2743) and A2750) or (A2743 and (not A2750));
A2760 <= A2769 and A2762;
A2761 <= (not A2771) or (not A2770);
A2762 <= A2743 or A2744;
A2763 <= A2743 or A2750;
A2764 <= A2742 and A2754;
A2765 <= (not A2741) or (not A2742);
A2766 <= A2750 and A2765;
A2767 <= (not A2766) and (not A2750);
A2768 <= A2750 or A2765;
A2769 <= (not A2743) or (not A2744);
A2770 <= A2750 or A2765;
A2771 <= (not A2750) and (not A2772);
A2772 <= A2750 and A2765;
A2778 <= A2784 and A2783;
A2779 <= A2786 or A2785;
A2780 <= A2788 or A2787;
A2781 <= A2783 and A2789;
A2782 <= A2783 and A2790;
A2783 <= ((not A2773) and A2774) or (A2773 and (not A2774));
A2784 <= ((not A2785) and A2775) or (A2785 and (not A2775));
A2785 <= A2793 and A2792;
A2786 <= A2791 and A2775;
A2787 <= A2796 and A2795;
A2788 <= A2794 and A2775;
A2789 <= A2797 or A2774;
A2790 <= (A2775 and A2787) or ((not A2775) and (not A2787));
A2791 <= (not A2800) or (not A2801);
A2792 <= ((not A2776) and A2783) or (A2776 and (not A2783));
A2793 <= A2802 and A2795;
A2794 <= (not A2804) or (not A2803);
A2795 <= A2776 or A2777;
A2796 <= A2776 or A2783;
A2797 <= A2775 and A2787;
A2798 <= (not A2774) or (not A2775);
A2799 <= A2783 and A2798;
A2800 <= (not A2799) and (not A2783);
A2801 <= A2783 or A2798;
A2802 <= (not A2776) or (not A2777);
A2803 <= A2783 or A2798;
A2804 <= (not A2783) and (not A2805);
A2805 <= A2783 and A2798;
A1188 <= A1166 and A1181;
A1187 <= (not A1166) and (not A1188);
A1186 <= A1166 or A1181;
A1185 <= (not A1159) or (not A1160);
A1184 <= A1166 or A1181;
A1183 <= (not A1182) and (not A1166);
A1182 <= A1166 and A1181;
A1181 <= (not A1157) or (not A1158);
A1180 <= A1158 and A1170;
A1179 <= A1159 or A1166;
A1178 <= A1159 or A1160;
A1177 <= (not A1187) or (not A1186);
A1176 <= A1185 and A1178;
A1175 <= ((not A1159) and A1166) or (A1159 and (not A1166));
A1174 <= (not A1183) or (not A1184);
A1173 <= (A1158 and A1170) or ((not A1158) and (not A1170));
A1172 <= A1180 or A1157;
A1171 <= A1177 and A1158;
A1170 <= A1179 and A1178;
A1169 <= A1174 and A1158;
A1168 <= A1176 and A1175;
A1167 <= ((not A1168) and A1158) or (A1168 and (not A1158));
A1166 <= ((not A1156) and A1157) or (A1156 and (not A1157));
A1165 <= A1166 and A1173;
A1164 <= A1166 and A1172;
A1163 <= A1171 or A1170;
A1162 <= A1169 or A1168;
A1161 <= A1167 and A1166;
A1160 <= A1990;
A1159 <= A2019;
A1158 <= A2052;
A1157 <= A2085;
A1156 <= A2118;
A1189 <= A2151;
A1190 <= A2184;
A1191 <= A2217;
A1192 <= A2250;
A1193 <= A2283;
A1194 <= A1200 and A1199;
A1195 <= A1202 or A1201;
A1196 <= A1204 or A1203;
A1197 <= A1199 and A1205;
A1198 <= A1199 and A1206;
A1199 <= ((not A1189) and A1190) or (A1189 and (not A1190));
A1200 <= ((not A1201) and A1191) or (A1201 and (not A1191));
A1201 <= A1209 and A1208;
A1202 <= A1207 and A1191;
A1203 <= A1212 and A1211;
A1204 <= A1210 and A1191;
A1205 <= A1213 or A1190;
A1206 <= (A1191 and A1203) or ((not A1191) and (not A1203));
A1207 <= (not A1216) or (not A1217);
A1208 <= ((not A1192) and A1199) or (A1192 and (not A1199));
A1209 <= A1218 and A1211;
A1210 <= (not A1220) or (not A1219);
A1211 <= A1192 or A1193;
A1212 <= A1192 or A1199;
A1213 <= A1191 and A1203;
A1214 <= (not A1190) or (not A1191);
A1215 <= A1199 and A1214;
A1216 <= (not A1215) and (not A1199);
A1217 <= A1199 or A1214;
A1218 <= (not A1192) or (not A1193);
A1219 <= A1199 or A1214;
A1220 <= (not A1199) and (not A1221);
A1221 <= A1199 and A1214;
A1222 <= A2316;
A1223 <= A2349;
A1224 <= A2382;
A1225 <= A2415;
A1226 <= A2448;
A1227 <= A1233 and A1232;
A1228 <= A1235 or A1234;
A1229 <= A1237 or A1236;
A1230 <= A1232 and A1238;
A1231 <= A1232 and A1239;
A1232 <= ((not A1222) and A1223) or (A1222 and (not A1223));
A1233 <= ((not A1234) and A1224) or (A1234 and (not A1224));
A1234 <= A1242 and A1241;
A1235 <= A1240 and A1224;
A1236 <= A1245 and A1244;
A1237 <= A1243 and A1224;
A1238 <= A1246 or A1223;
A1239 <= (A1224 and A1236) or ((not A1224) and (not A1236));
A1240 <= (not A1249) or (not A1250);
A1241 <= ((not A1225) and A1232) or (A1225 and (not A1232));
A1242 <= A1251 and A1244;
A1243 <= (not A1253) or (not A1252);
A1244 <= A1225 or A1226;
A1245 <= A1225 or A1232;
A1246 <= A1224 and A1236;
A1247 <= (not A1223) or (not A1224);
A1248 <= A1232 and A1247;
A1249 <= (not A1248) and (not A1232);
A1250 <= A1232 or A1247;
A1251 <= (not A1225) or (not A1226);
A1252 <= A1232 or A1247;
A1253 <= (not A1232) and (not A1254);
A1254 <= A1232 and A1247;
A1255 <= A2481;
A1256 <= A2514;
A1257 <= A2547;
A1258 <= A2580;
A1259 <= A2613;
A1260 <= A1266 and A1265;
A1261 <= A1268 or A1267;
A1262 <= A1270 or A1269;
A1263 <= A1265 and A1271;
A1264 <= A1265 and A1272;
A1265 <= ((not A1255) and A1256) or (A1255 and (not A1256));
A1266 <= ((not A1267) and A1257) or (A1267 and (not A1257));
A1267 <= A1275 and A1274;
A1268 <= A1273 and A1257;
A1269 <= A1278 and A1277;
A1270 <= A1276 and A1257;
A1271 <= A1279 or A1256;
A1272 <= (A1257 and A1269) or ((not A1257) and (not A1269));
A1273 <= (not A1282) or (not A1283);
A1274 <= ((not A1258) and A1265) or (A1258 and (not A1265));
A1275 <= A1284 and A1277;
A1276 <= (not A1286) or (not A1285);
A1277 <= A1258 or A1259;
A1278 <= A1258 or A1265;
A1279 <= A1257 and A1269;
A1280 <= (not A1256) or (not A1257);
A1281 <= A1265 and A1280;
A1282 <= (not A1281) and (not A1265);
A1283 <= A1265 or A1280;
A1284 <= (not A1258) or (not A1259);
A1285 <= A1265 or A1280;
A1286 <= (not A1265) and (not A1287);
A1287 <= A1265 and A1280;
A1288 <= A2646;
A1289 <= A2679;
A1290 <= A2712;
A1291 <= A2745;
A1292 <= A2778;
A1293 <= A1299 and A1298;
A1294 <= A1301 or A1300;
A1295 <= A1303 or A1302;
A1296 <= A1298 and A1304;
A1297 <= A1298 and A1305;
A1298 <= ((not A1288) and A1289) or (A1288 and (not A1289));
A1299 <= ((not A1300) and A1290) or (A1300 and (not A1290));
A1300 <= A1308 and A1307;
A1301 <= A1306 and A1290;
A1302 <= A1311 and A1310;
A1303 <= A1309 and A1290;
A1304 <= A1312 or A1289;
A1305 <= (A1290 and A1302) or ((not A1290) and (not A1302));
A1306 <= (not A1315) or (not A1316);
A1307 <= ((not A1291) and A1298) or (A1291 and (not A1298));
A1308 <= A1317 and A1310;
A1309 <= (not A1319) or (not A1318);
A1310 <= A1291 or A1292;
A1311 <= A1291 or A1298;
A1312 <= A1290 and A1302;
A1313 <= (not A1289) or (not A1290);
A1314 <= A1298 and A1313;
A1315 <= (not A1314) and (not A1298);
A1316 <= A1298 or A1313;
A1317 <= (not A1291) or (not A1292);
A1318 <= A1298 or A1313;
A1319 <= (not A1298) and (not A1320);
A1320 <= A1298 and A1313;
A1321 <= A1989;
A1322 <= A2020;
A1323 <= A2053;
A1324 <= A2086;
A1325 <= A2119;
A1326 <= A1332 and A1331;
A1327 <= A1334 or A1333;
A1328 <= A1336 or A1335;
A1329 <= A1331 and A1337;
A1330 <= A1331 and A1338;
A1331 <= ((not A1321) and A1322) or (A1321 and (not A1322));
A1332 <= ((not A1333) and A1323) or (A1333 and (not A1323));
A1333 <= A1341 and A1340;
A1334 <= A1339 and A1323;
A1335 <= A1344 and A1343;
A1336 <= A1342 and A1323;
A1337 <= A1345 or A1322;
A1338 <= (A1323 and A1335) or ((not A1323) and (not A1335));
A1339 <= (not A1348) or (not A1349);
A1340 <= ((not A1324) and A1331) or (A1324 and (not A1331));
A1341 <= A1350 and A1343;
A1342 <= (not A1352) or (not A1351);
A1343 <= A1324 or A1325;
A1344 <= A1324 or A1331;
A1345 <= A1323 and A1335;
A1346 <= (not A1322) or (not A1323);
A1347 <= A1331 and A1346;
A1348 <= (not A1347) and (not A1331);
A1349 <= A1331 or A1346;
A1350 <= (not A1324) or (not A1325);
A1351 <= A1331 or A1346;
A1352 <= (not A1331) and (not A1353);
A1353 <= A1331 and A1346;
A1354 <= A2152;
A1355 <= A2185;
A1356 <= A2218;
A1357 <= A2251;
A1358 <= A2284;
A1359 <= A1365 and A1364;
A1360 <= A1367 or A1366;
A1361 <= A1369 or A1368;
A1362 <= A1364 and A1370;
A1363 <= A1364 and A1371;
A1364 <= ((not A1354) and A1355) or (A1354 and (not A1355));
A1365 <= ((not A1366) and A1356) or (A1366 and (not A1356));
A1366 <= A1374 and A1373;
A1367 <= A1372 and A1356;
A1368 <= A1377 and A1376;
A1369 <= A1375 and A1356;
A1370 <= A1378 or A1355;
A1371 <= (A1356 and A1368) or ((not A1356) and (not A1368));
A1372 <= (not A1381) or (not A1382);
A1373 <= ((not A1357) and A1364) or (A1357 and (not A1364));
A1374 <= A1383 and A1376;
A1375 <= (not A1385) or (not A1384);
A1376 <= A1357 or A1358;
A1377 <= A1357 or A1364;
A1378 <= A1356 and A1368;
A1379 <= (not A1355) or (not A1356);
A1380 <= A1364 and A1379;
A1381 <= (not A1380) and (not A1364);
A1382 <= A1364 or A1379;
A1383 <= (not A1357) or (not A1358);
A1384 <= A1364 or A1379;
A1385 <= (not A1364) and (not A1386);
A1386 <= A1364 and A1379;
A1387 <= A2317;
A1388 <= A2350;
A1389 <= A2383;
A1390 <= A2416;
A1391 <= A2449;
A1392 <= A1398 and A1397;
A1393 <= A1400 or A1399;
A1394 <= A1402 or A1401;
A1395 <= A1397 and A1403;
A1396 <= A1397 and A1404;
A1397 <= ((not A1387) and A1388) or (A1387 and (not A1388));
A1398 <= ((not A1399) and A1389) or (A1399 and (not A1389));
A1399 <= A1407 and A1406;
A1400 <= A1405 and A1389;
A1401 <= A1410 and A1409;
A1402 <= A1408 and A1389;
A1403 <= A1411 or A1388;
A1404 <= (A1389 and A1401) or ((not A1389) and (not A1401));
A1405 <= (not A1414) or (not A1415);
A1406 <= ((not A1390) and A1397) or (A1390 and (not A1397));
A1407 <= A1416 and A1409;
A1408 <= (not A1418) or (not A1417);
A1409 <= A1390 or A1391;
A1410 <= A1390 or A1397;
A1411 <= A1389 and A1401;
A1412 <= (not A1388) or (not A1389);
A1413 <= A1397 and A1412;
A1414 <= (not A1413) and (not A1397);
A1415 <= A1397 or A1412;
A1416 <= (not A1390) or (not A1391);
A1417 <= A1397 or A1412;
A1418 <= (not A1397) and (not A1419);
A1419 <= A1397 and A1412;
A1420 <= A2482;
A1421 <= A2515;
A1422 <= A2548;
A1423 <= A2581;
A1424 <= A2614;
A1425 <= A1431 and A1430;
A1426 <= A1433 or A1432;
A1427 <= A1435 or A1434;
A1428 <= A1430 and A1436;
A1429 <= A1430 and A1437;
A1430 <= ((not A1420) and A1421) or (A1420 and (not A1421));
A1431 <= ((not A1432) and A1422) or (A1432 and (not A1422));
A1432 <= A1440 and A1439;
A1433 <= A1438 and A1422;
A1434 <= A1443 and A1442;
A1435 <= A1441 and A1422;
A1436 <= A1444 or A1421;
A1437 <= (A1422 and A1434) or ((not A1422) and (not A1434));
A1438 <= (not A1447) or (not A1448);
A1439 <= ((not A1423) and A1430) or (A1423 and (not A1430));
A1440 <= A1449 and A1442;
A1441 <= (not A1451) or (not A1450);
A1442 <= A1423 or A1424;
A1443 <= A1423 or A1430;
A1444 <= A1422 and A1434;
A1445 <= (not A1421) or (not A1422);
A1446 <= A1430 and A1445;
A1447 <= (not A1446) and (not A1430);
A1448 <= A1430 or A1445;
A1449 <= (not A1423) or (not A1424);
A1450 <= A1430 or A1445;
A1451 <= (not A1430) and (not A1452);
A1452 <= A1430 and A1445;
A1453 <= A2647;
A1454 <= A2680;
A1455 <= A2713;
A1456 <= A2746;
A1457 <= A2779;
A1458 <= A1464 and A1463;
A1459 <= A1466 or A1465;
A1460 <= A1468 or A1467;
A1461 <= A1463 and A1469;
A1462 <= A1463 and A1470;
A1463 <= ((not A1453) and A1454) or (A1453 and (not A1454));
A1464 <= ((not A1465) and A1455) or (A1465 and (not A1455));
A1465 <= A1473 and A1472;
A1466 <= A1471 and A1455;
A1467 <= A1476 and A1475;
A1468 <= A1474 and A1455;
A1469 <= A1477 or A1454;
A1470 <= (A1455 and A1467) or ((not A1455) and (not A1467));
A1471 <= (not A1480) or (not A1481);
A1472 <= ((not A1456) and A1463) or (A1456 and (not A1463));
A1473 <= A1482 and A1475;
A1474 <= (not A1484) or (not A1483);
A1475 <= A1456 or A1457;
A1476 <= A1456 or A1463;
A1477 <= A1455 and A1467;
A1478 <= (not A1454) or (not A1455);
A1479 <= A1463 and A1478;
A1480 <= (not A1479) and (not A1463);
A1481 <= A1463 or A1478;
A1482 <= (not A1456) or (not A1457);
A1483 <= A1463 or A1478;
A1484 <= (not A1463) and (not A1485);
A1485 <= A1463 and A1478;
A1486 <= A1988;
A1487 <= A2021;
A1488 <= A2054;
A1489 <= A2087;
A1490 <= A2120;
A1491 <= A1497 and A1496;
A1492 <= A1499 or A1498;
A1493 <= A1501 or A1500;
A1494 <= A1496 and A1502;
A1495 <= A1496 and A1503;
A1496 <= ((not A1486) and A1487) or (A1486 and (not A1487));
A1497 <= ((not A1498) and A1488) or (A1498 and (not A1488));
A1498 <= A1506 and A1505;
A1499 <= A1504 and A1488;
A1500 <= A1509 and A1508;
A1501 <= A1507 and A1488;
A1502 <= A1510 or A1487;
A1503 <= (A1488 and A1500) or ((not A1488) and (not A1500));
A1504 <= (not A1513) or (not A1514);
A1505 <= ((not A1489) and A1496) or (A1489 and (not A1496));
A1506 <= A1515 and A1508;
A1507 <= (not A1517) or (not A1516);
A1508 <= A1489 or A1490;
A1509 <= A1489 or A1496;
A1510 <= A1488 and A1500;
A1511 <= (not A1487) or (not A1488);
A1512 <= A1496 and A1511;
A1513 <= (not A1512) and (not A1496);
A1514 <= A1496 or A1511;
A1515 <= (not A1489) or (not A1490);
A1516 <= A1496 or A1511;
A1517 <= (not A1496) and (not A1518);
A1518 <= A1496 and A1511;
A1519 <= A2153;
A1520 <= A2186;
A1521 <= A2219;
A1522 <= A2252;
A1523 <= A2285;
A1524 <= A1530 and A1529;
A1525 <= A1532 or A1531;
A1526 <= A1534 or A1533;
A1527 <= A1529 and A1535;
A1528 <= A1529 and A1536;
A1529 <= ((not A1519) and A1520) or (A1519 and (not A1520));
A1530 <= ((not A1531) and A1521) or (A1531 and (not A1521));
A1531 <= A1539 and A1538;
A1532 <= A1537 and A1521;
A1533 <= A1542 and A1541;
A1534 <= A1540 and A1521;
A1535 <= A1543 or A1520;
A1536 <= (A1521 and A1533) or ((not A1521) and (not A1533));
A1537 <= (not A1546) or (not A1547);
A1538 <= ((not A1522) and A1529) or (A1522 and (not A1529));
A1539 <= A1548 and A1541;
A1540 <= (not A1550) or (not A1549);
A1541 <= A1522 or A1523;
A1542 <= A1522 or A1529;
A1543 <= A1521 and A1533;
A1544 <= (not A1520) or (not A1521);
A1545 <= A1529 and A1544;
A1546 <= (not A1545) and (not A1529);
A1547 <= A1529 or A1544;
A1548 <= (not A1522) or (not A1523);
A1549 <= A1529 or A1544;
A1550 <= (not A1529) and (not A1551);
A1551 <= A1529 and A1544;
A1552 <= A2318;
A1553 <= A2351;
A1554 <= A2384;
A1555 <= A2417;
A1556 <= A2450;
A1557 <= A1563 and A1562;
A1558 <= A1565 or A1564;
A1559 <= A1567 or A1566;
A1560 <= A1562 and A1568;
A1561 <= A1562 and A1569;
A1562 <= ((not A1552) and A1553) or (A1552 and (not A1553));
A1563 <= ((not A1564) and A1554) or (A1564 and (not A1554));
A1564 <= A1572 and A1571;
A1565 <= A1570 and A1554;
A1566 <= A1575 and A1574;
A1567 <= A1573 and A1554;
A1568 <= A1576 or A1553;
A1569 <= (A1554 and A1566) or ((not A1554) and (not A1566));
A1570 <= (not A1579) or (not A1580);
A1571 <= ((not A1555) and A1562) or (A1555 and (not A1562));
A1572 <= A1581 and A1574;
A1573 <= (not A1583) or (not A1582);
A1574 <= A1555 or A1556;
A1575 <= A1555 or A1562;
A1576 <= A1554 and A1566;
A1577 <= (not A1553) or (not A1554);
A1578 <= A1562 and A1577;
A1579 <= (not A1578) and (not A1562);
A1580 <= A1562 or A1577;
A1581 <= (not A1555) or (not A1556);
A1582 <= A1562 or A1577;
A1583 <= (not A1562) and (not A1584);
A1584 <= A1562 and A1577;
A1585 <= A2483;
A1586 <= A2516;
A1587 <= A2549;
A1588 <= A2582;
A1589 <= A2615;
A1590 <= A1596 and A1595;
A1591 <= A1598 or A1597;
A1592 <= A1600 or A1599;
A1593 <= A1595 and A1601;
A1594 <= A1595 and A1602;
A1595 <= ((not A1585) and A1586) or (A1585 and (not A1586));
A1596 <= ((not A1597) and A1587) or (A1597 and (not A1587));
A1597 <= A1605 and A1604;
A1598 <= A1603 and A1587;
A1599 <= A1608 and A1607;
A1600 <= A1606 and A1587;
A1601 <= A1609 or A1586;
A1602 <= (A1587 and A1599) or ((not A1587) and (not A1599));
A1603 <= (not A1612) or (not A1613);
A1604 <= ((not A1588) and A1595) or (A1588 and (not A1595));
A1605 <= A1614 and A1607;
A1606 <= (not A1616) or (not A1615);
A1607 <= A1588 or A1589;
A1608 <= A1588 or A1595;
A1609 <= A1587 and A1599;
A1610 <= (not A1586) or (not A1587);
A1611 <= A1595 and A1610;
A1612 <= (not A1611) and (not A1595);
A1613 <= A1595 or A1610;
A1614 <= (not A1588) or (not A1589);
A1615 <= A1595 or A1610;
A1616 <= (not A1595) and (not A1617);
A1617 <= A1595 and A1610;
A1618 <= A2648;
A1619 <= A2681;
A1620 <= A2714;
A1621 <= A2747;
A1622 <= A2780;
A1623 <= A1629 and A1628;
A1624 <= A1631 or A1630;
A1625 <= A1633 or A1632;
A1626 <= A1628 and A1634;
A1627 <= A1628 and A1635;
A1628 <= ((not A1618) and A1619) or (A1618 and (not A1619));
A1629 <= ((not A1630) and A1620) or (A1630 and (not A1620));
A1630 <= A1638 and A1637;
A1631 <= A1636 and A1620;
A1632 <= A1641 and A1640;
A1633 <= A1639 and A1620;
A1634 <= A1642 or A1619;
A1635 <= (A1620 and A1632) or ((not A1620) and (not A1632));
A1636 <= (not A1645) or (not A1646);
A1637 <= ((not A1621) and A1628) or (A1621 and (not A1628));
A1638 <= A1647 and A1640;
A1639 <= (not A1649) or (not A1648);
A1640 <= A1621 or A1622;
A1641 <= A1621 or A1628;
A1642 <= A1620 and A1632;
A1643 <= (not A1619) or (not A1620);
A1644 <= A1628 and A1643;
A1645 <= (not A1644) and (not A1628);
A1646 <= A1628 or A1643;
A1647 <= (not A1621) or (not A1622);
A1648 <= A1628 or A1643;
A1649 <= (not A1628) and (not A1650);
A1650 <= A1628 and A1643;
A1651 <= A1987;
A1652 <= A2022;
A1653 <= A2055;
A1654 <= A2088;
A1655 <= A2121;
A1656 <= A1662 and A1661;
A1657 <= A1664 or A1663;
A1658 <= A1666 or A1665;
A1659 <= A1661 and A1667;
A1660 <= A1661 and A1668;
A1661 <= ((not A1651) and A1652) or (A1651 and (not A1652));
A1662 <= ((not A1663) and A1653) or (A1663 and (not A1653));
A1663 <= A1671 and A1670;
A1664 <= A1669 and A1653;
A1665 <= A1674 and A1673;
A1666 <= A1672 and A1653;
A1667 <= A1675 or A1652;
A1668 <= (A1653 and A1665) or ((not A1653) and (not A1665));
A1669 <= (not A1678) or (not A1679);
A1670 <= ((not A1654) and A1661) or (A1654 and (not A1661));
A1671 <= A1680 and A1673;
A1672 <= (not A1682) or (not A1681);
A1673 <= A1654 or A1655;
A1674 <= A1654 or A1661;
A1675 <= A1653 and A1665;
A1676 <= (not A1652) or (not A1653);
A1677 <= A1661 and A1676;
A1678 <= (not A1677) and (not A1661);
A1679 <= A1661 or A1676;
A1680 <= (not A1654) or (not A1655);
A1681 <= A1661 or A1676;
A1682 <= (not A1661) and (not A1683);
A1683 <= A1661 and A1676;
A1684 <= A2154;
A1685 <= A2187;
A1686 <= A2220;
A1687 <= A2253;
A1688 <= A2286;
A1689 <= A1695 and A1694;
A1690 <= A1697 or A1696;
A1691 <= A1699 or A1698;
A1692 <= A1694 and A1700;
A1693 <= A1694 and A1701;
A1694 <= ((not A1684) and A1685) or (A1684 and (not A1685));
A1695 <= ((not A1696) and A1686) or (A1696 and (not A1686));
A1696 <= A1704 and A1703;
A1697 <= A1702 and A1686;
A1698 <= A1707 and A1706;
A1699 <= A1705 and A1686;
A1700 <= A1708 or A1685;
A1701 <= (A1686 and A1698) or ((not A1686) and (not A1698));
A1702 <= (not A1711) or (not A1712);
A1703 <= ((not A1687) and A1694) or (A1687 and (not A1694));
A1704 <= A1713 and A1706;
A1705 <= (not A1715) or (not A1714);
A1706 <= A1687 or A1688;
A1707 <= A1687 or A1694;
A1708 <= A1686 and A1698;
A1709 <= (not A1685) or (not A1686);
A1710 <= A1694 and A1709;
A1711 <= (not A1710) and (not A1694);
A1712 <= A1694 or A1709;
A1713 <= (not A1687) or (not A1688);
A1714 <= A1694 or A1709;
A1715 <= (not A1694) and (not A1716);
A1716 <= A1694 and A1709;
A1717 <= A2319;
A1718 <= A2352;
A1719 <= A2385;
A1720 <= A2418;
A1721 <= A2451;
A1722 <= A1728 and A1727;
A1723 <= A1730 or A1729;
A1724 <= A1732 or A1731;
A1725 <= A1727 and A1733;
A1726 <= A1727 and A1734;
A1727 <= ((not A1717) and A1718) or (A1717 and (not A1718));
A1728 <= ((not A1729) and A1719) or (A1729 and (not A1719));
A1729 <= A1737 and A1736;
A1730 <= A1735 and A1719;
A1731 <= A1740 and A1739;
A1732 <= A1738 and A1719;
A1733 <= A1741 or A1718;
A1734 <= (A1719 and A1731) or ((not A1719) and (not A1731));
A1735 <= (not A1744) or (not A1745);
A1736 <= ((not A1720) and A1727) or (A1720 and (not A1727));
A1737 <= A1746 and A1739;
A1738 <= (not A1748) or (not A1747);
A1739 <= A1720 or A1721;
A1740 <= A1720 or A1727;
A1741 <= A1719 and A1731;
A1742 <= (not A1718) or (not A1719);
A1743 <= A1727 and A1742;
A1744 <= (not A1743) and (not A1727);
A1745 <= A1727 or A1742;
A1746 <= (not A1720) or (not A1721);
A1747 <= A1727 or A1742;
A1748 <= (not A1727) and (not A1749);
A1749 <= A1727 and A1742;
A1750 <= A2484;
A1751 <= A2517;
A1752 <= A2550;
A1753 <= A2583;
A1754 <= A2616;
A1755 <= A1761 and A1760;
A1756 <= A1763 or A1762;
A1757 <= A1765 or A1764;
A1758 <= A1760 and A1766;
A1759 <= A1760 and A1767;
A1760 <= ((not A1750) and A1751) or (A1750 and (not A1751));
A1761 <= ((not A1762) and A1752) or (A1762 and (not A1752));
A1762 <= A1770 and A1769;
A1763 <= A1768 and A1752;
A1764 <= A1773 and A1772;
A1765 <= A1771 and A1752;
A1766 <= A1774 or A1751;
A1767 <= (A1752 and A1764) or ((not A1752) and (not A1764));
A1768 <= (not A1777) or (not A1778);
A1769 <= ((not A1753) and A1760) or (A1753 and (not A1760));
A1770 <= A1779 and A1772;
A1771 <= (not A1781) or (not A1780);
A1772 <= A1753 or A1754;
A1773 <= A1753 or A1760;
A1774 <= A1752 and A1764;
A1775 <= (not A1751) or (not A1752);
A1776 <= A1760 and A1775;
A1777 <= (not A1776) and (not A1760);
A1778 <= A1760 or A1775;
A1779 <= (not A1753) or (not A1754);
A1780 <= A1760 or A1775;
A1781 <= (not A1760) and (not A1782);
A1782 <= A1760 and A1775;
A1783 <= A2649;
A1784 <= A2682;
A1785 <= A2715;
A1786 <= A2748;
A1787 <= A2781;
A1788 <= A1794 and A1793;
A1789 <= A1796 or A1795;
A1790 <= A1798 or A1797;
A1791 <= A1793 and A1799;
A1792 <= A1793 and A1800;
A1793 <= ((not A1783) and A1784) or (A1783 and (not A1784));
A1794 <= ((not A1795) and A1785) or (A1795 and (not A1785));
A1795 <= A1803 and A1802;
A1796 <= A1801 and A1785;
A1797 <= A1806 and A1805;
A1798 <= A1804 and A1785;
A1799 <= A1807 or A1784;
A1800 <= (A1785 and A1797) or ((not A1785) and (not A1797));
A1801 <= (not A1810) or (not A1811);
A1802 <= ((not A1786) and A1793) or (A1786 and (not A1793));
A1803 <= A1812 and A1805;
A1804 <= (not A1814) or (not A1813);
A1805 <= A1786 or A1787;
A1806 <= A1786 or A1793;
A1807 <= A1785 and A1797;
A1808 <= (not A1784) or (not A1785);
A1809 <= A1793 and A1808;
A1810 <= (not A1809) and (not A1793);
A1811 <= A1793 or A1808;
A1812 <= (not A1786) or (not A1787);
A1813 <= A1793 or A1808;
A1814 <= (not A1793) and (not A1815);
A1815 <= A1793 and A1808;
A1816 <= A1986;
A1817 <= A2023;
A1818 <= A2056;
A1819 <= A2089;
A1820 <= A2122;
A1821 <= A1827 and A1826;
A1822 <= A1829 or A1828;
A1823 <= A1831 or A1830;
A1824 <= A1826 and A1832;
A1825 <= A1826 and A1833;
A1826 <= ((not A1816) and A1817) or (A1816 and (not A1817));
A1827 <= ((not A1828) and A1818) or (A1828 and (not A1818));
A1828 <= A1836 and A1835;
A1829 <= A1834 and A1818;
A1830 <= A1839 and A1838;
A1831 <= A1837 and A1818;
A1832 <= A1840 or A1817;
A1833 <= (A1818 and A1830) or ((not A1818) and (not A1830));
A1834 <= (not A1843) or (not A1844);
A1835 <= ((not A1819) and A1826) or (A1819 and (not A1826));
A1836 <= A1845 and A1838;
A1837 <= (not A1847) or (not A1846);
A1838 <= A1819 or A1820;
A1839 <= A1819 or A1826;
A1840 <= A1818 and A1830;
A1841 <= (not A1817) or (not A1818);
A1842 <= A1826 and A1841;
A1843 <= (not A1842) and (not A1826);
A1844 <= A1826 or A1841;
A1845 <= (not A1819) or (not A1820);
A1846 <= A1826 or A1841;
A1847 <= (not A1826) and (not A1848);
A1848 <= A1826 and A1841;
A1849 <= A2155;
A1850 <= A2188;
A1851 <= A2221;
A1852 <= A2254;
A1853 <= A2287;
A1854 <= A1860 and A1859;
A1855 <= A1862 or A1861;
A1856 <= A1864 or A1863;
A1857 <= A1859 and A1865;
A1858 <= A1859 and A1866;
A1859 <= ((not A1849) and A1850) or (A1849 and (not A1850));
A1860 <= ((not A1861) and A1851) or (A1861 and (not A1851));
A1861 <= A1869 and A1868;
A1862 <= A1867 and A1851;
A1863 <= A1872 and A1871;
A1864 <= A1870 and A1851;
A1865 <= A1873 or A1850;
A1866 <= (A1851 and A1863) or ((not A1851) and (not A1863));
A1867 <= (not A1876) or (not A1877);
A1868 <= ((not A1852) and A1859) or (A1852 and (not A1859));
A1869 <= A1878 and A1871;
A1870 <= (not A1880) or (not A1879);
A1871 <= A1852 or A1853;
A1872 <= A1852 or A1859;
A1873 <= A1851 and A1863;
A1874 <= (not A1850) or (not A1851);
A1875 <= A1859 and A1874;
A1876 <= (not A1875) and (not A1859);
A1877 <= A1859 or A1874;
A1878 <= (not A1852) or (not A1853);
A1879 <= A1859 or A1874;
A1880 <= (not A1859) and (not A1881);
A1881 <= A1859 and A1874;
A1882 <= A2320;
A1883 <= A2353;
A1884 <= A2386;
A1885 <= A2419;
A1886 <= A2452;
A1887 <= A1893 and A1892;
A1888 <= A1895 or A1894;
A1889 <= A1897 or A1896;
A1890 <= A1892 and A1898;
A1891 <= A1892 and A1899;
A1892 <= ((not A1882) and A1883) or (A1882 and (not A1883));
A1893 <= ((not A1894) and A1884) or (A1894 and (not A1884));
A1894 <= A1902 and A1901;
A1895 <= A1900 and A1884;
A1896 <= A1905 and A1904;
A1897 <= A1903 and A1884;
A1898 <= A1906 or A1883;
A1899 <= (A1884 and A1896) or ((not A1884) and (not A1896));
A1900 <= (not A1909) or (not A1910);
A1901 <= ((not A1885) and A1892) or (A1885 and (not A1892));
A1902 <= A1911 and A1904;
A1903 <= (not A1913) or (not A1912);
A1904 <= A1885 or A1886;
A1905 <= A1885 or A1892;
A1906 <= A1884 and A1896;
A1907 <= (not A1883) or (not A1884);
A1908 <= A1892 and A1907;
A1909 <= (not A1908) and (not A1892);
A1910 <= A1892 or A1907;
A1911 <= (not A1885) or (not A1886);
A1912 <= A1892 or A1907;
A1913 <= (not A1892) and (not A1914);
A1914 <= A1892 and A1907;
A1915 <= A2485;
A1916 <= A2518;
A1917 <= A2551;
A1918 <= A2584;
A1919 <= A2617;
A1920 <= A1926 and A1925;
A1921 <= A1928 or A1927;
A1922 <= A1930 or A1929;
A1923 <= A1925 and A1931;
A1924 <= A1925 and A1932;
A1925 <= ((not A1915) and A1916) or (A1915 and (not A1916));
A1926 <= ((not A1927) and A1917) or (A1927 and (not A1917));
A1927 <= A1935 and A1934;
A1928 <= A1933 and A1917;
A1929 <= A1938 and A1937;
A1930 <= A1936 and A1917;
A1931 <= A1939 or A1916;
A1932 <= (A1917 and A1929) or ((not A1917) and (not A1929));
A1933 <= (not A1942) or (not A1943);
A1934 <= ((not A1918) and A1925) or (A1918 and (not A1925));
A1935 <= A1944 and A1937;
A1936 <= (not A1946) or (not A1945);
A1937 <= A1918 or A1919;
A1938 <= A1918 or A1925;
A1939 <= A1917 and A1929;
A1940 <= (not A1916) or (not A1917);
A1941 <= A1925 and A1940;
A1942 <= (not A1941) and (not A1925);
A1943 <= A1925 or A1940;
A1944 <= (not A1918) or (not A1919);
A1945 <= A1925 or A1940;
A1946 <= (not A1925) and (not A1947);
A1947 <= A1925 and A1940;
A1948 <= A2650;
A1949 <= A2683;
A1950 <= A2716;
A1951 <= A2749;
A1952 <= A2782;
A1953 <= A1959 and A1958;
A1954 <= A1961 or A1960;
A1955 <= A1963 or A1962;
A1956 <= A1958 and A1964;
A1957 <= A1958 and A1965;
A1958 <= ((not A1948) and A1949) or (A1948 and (not A1949));
A1959 <= ((not A1960) and A1950) or (A1960 and (not A1950));
A1960 <= A1968 and A1967;
A1961 <= A1966 and A1950;
A1962 <= A1971 and A1970;
A1963 <= A1969 and A1950;
A1964 <= A1972 or A1949;
A1965 <= (A1950 and A1962) or ((not A1950) and (not A1962));
A1966 <= (not A1975) or (not A1976);
A1967 <= ((not A1951) and A1958) or (A1951 and (not A1958));
A1968 <= A1977 and A1970;
A1969 <= (not A1979) or (not A1978);
A1970 <= A1951 or A1952;
A1971 <= A1951 or A1958;
A1972 <= A1950 and A1962;
A1973 <= (not A1949) or (not A1950);
A1974 <= A1958 and A1973;
A1975 <= (not A1974) and (not A1958);
A1976 <= A1958 or A1973;
A1977 <= (not A1951) or (not A1952);
A1978 <= A1958 or A1973;
A1979 <= (not A1958) and (not A1980);
A1980 <= A1958 and A1973;
A1155 <= A1133 and A1148;
A1154 <= (not A1133) and (not A1155);
A1153 <= A1133 or A1148;
A1152 <= (not A1126) or (not A1127);
A1151 <= A1133 or A1148;
A1150 <= (not A1149) and (not A1133);
A1149 <= A1133 and A1148;
A1148 <= (not A1124) or (not A1125);
A1147 <= A1125 and A1137;
A1146 <= A1126 or A1133;
A1145 <= A1126 or A1127;
A1144 <= (not A1154) or (not A1153);
A1143 <= A1152 and A1145;
A1142 <= ((not A1126) and A1133) or (A1126 and (not A1133));
A1141 <= (not A1150) or (not A1151);
A1140 <= (A1125 and A1137) or ((not A1125) and (not A1137));
A1139 <= A1147 or A1124;
A1138 <= A1144 and A1125;
A1137 <= A1146 and A1145;
A1136 <= A1141 and A1125;
A1135 <= A1143 and A1142;
A1134 <= ((not A1135) and A1125) or (A1135 and (not A1125));
A1133 <= ((not A1123) and A1124) or (A1123 and (not A1124));
A1132 <= A1133 and A1140;
A1131 <= A1133 and A1139;
A1130 <= A1138 or A1137;
A1129 <= A1136 or A1135;
A1128 <= A1134 and A1133;
A1127 <= A1957;
A1126 <= A1924;
A1125 <= A1891;
A1124 <= A1858;
A1123 <= A1825;
A1122 <= A1100 and A1115;
A1121 <= (not A1100) and (not A1122);
A1120 <= A1100 or A1115;
A1119 <= (not A1093) or (not A1094);
A1118 <= A1100 or A1115;
A1117 <= (not A1116) and (not A1100);
A1116 <= A1100 and A1115;
A1115 <= (not A1091) or (not A1092);
A1114 <= A1092 and A1104;
A1113 <= A1093 or A1100;
A1112 <= A1093 or A1094;
A1111 <= (not A1121) or (not A1120);
A1110 <= A1119 and A1112;
A1109 <= ((not A1093) and A1100) or (A1093 and (not A1100));
A1108 <= (not A1117) or (not A1118);
A1107 <= (A1092 and A1104) or ((not A1092) and (not A1104));
A1106 <= A1114 or A1091;
A1105 <= A1111 and A1092;
A1104 <= A1113 and A1112;
A1103 <= A1108 and A1092;
A1102 <= A1110 and A1109;
A1101 <= ((not A1102) and A1092) or (A1102 and (not A1092));
A1100 <= ((not A1090) and A1091) or (A1090 and (not A1091));
A1099 <= A1100 and A1107;
A1098 <= A1100 and A1106;
A1097 <= A1105 or A1104;
A1096 <= A1103 or A1102;
A1095 <= A1101 and A1100;
A1094 <= A1792;
A1093 <= A1759;
A1092 <= A1726;
A1091 <= A1693;
A1090 <= A1660;
A1089 <= A1067 and A1082;
A1088 <= (not A1067) and (not A1089);
A1087 <= A1067 or A1082;
A1086 <= (not A1060) or (not A1061);
A1085 <= A1067 or A1082;
A1084 <= (not A1083) and (not A1067);
A1083 <= A1067 and A1082;
A1082 <= (not A1058) or (not A1059);
A1081 <= A1059 and A1071;
A1080 <= A1060 or A1067;
A1079 <= A1060 or A1061;
A1078 <= (not A1088) or (not A1087);
A1077 <= A1086 and A1079;
A1076 <= ((not A1060) and A1067) or (A1060 and (not A1067));
A1075 <= (not A1084) or (not A1085);
A1074 <= (A1059 and A1071) or ((not A1059) and (not A1071));
A1073 <= A1081 or A1058;
A1072 <= A1078 and A1059;
A1071 <= A1080 and A1079;
A1070 <= A1075 and A1059;
A1069 <= A1077 and A1076;
A1068 <= ((not A1069) and A1059) or (A1069 and (not A1059));
A1067 <= ((not A1057) and A1058) or (A1057 and (not A1058));
A1066 <= A1067 and A1074;
A1065 <= A1067 and A1073;
A1064 <= A1072 or A1071;
A1063 <= A1070 or A1069;
A1062 <= A1068 and A1067;
A1061 <= A1627;
A1060 <= A1594;
A1059 <= A1561;
A1058 <= A1528;
A1057 <= A1495;
A1056 <= A1034 and A1049;
A1055 <= (not A1034) and (not A1056);
A1054 <= A1034 or A1049;
A1053 <= (not A1027) or (not A1028);
A1052 <= A1034 or A1049;
A1051 <= (not A1050) and (not A1034);
A1050 <= A1034 and A1049;
A1049 <= (not A1025) or (not A1026);
A1048 <= A1026 and A1038;
A1047 <= A1027 or A1034;
A1046 <= A1027 or A1028;
A1045 <= (not A1055) or (not A1054);
A1044 <= A1053 and A1046;
A1043 <= ((not A1027) and A1034) or (A1027 and (not A1034));
A1042 <= (not A1051) or (not A1052);
A1041 <= (A1026 and A1038) or ((not A1026) and (not A1038));
A1040 <= A1048 or A1025;
A1039 <= A1045 and A1026;
A1038 <= A1047 and A1046;
A1037 <= A1042 and A1026;
A1036 <= A1044 and A1043;
A1035 <= ((not A1036) and A1026) or (A1036 and (not A1026));
A1034 <= ((not A1024) and A1025) or (A1024 and (not A1025));
A1033 <= A1034 and A1041;
A1032 <= A1034 and A1040;
A1031 <= A1039 or A1038;
A1030 <= A1037 or A1036;
A1029 <= A1035 and A1034;
A1028 <= A1462;
A1027 <= A1429;
A1026 <= A1396;
A1025 <= A1363;
A1024 <= A1330;
A1023 <= A1001 and A1016;
A1022 <= (not A1001) and (not A1023);
A1021 <= A1001 or A1016;
A1020 <= (not A994) or (not A995);
A1019 <= A1001 or A1016;
A1018 <= (not A1017) and (not A1001);
A1017 <= A1001 and A1016;
A1016 <= (not A992) or (not A993);
A1015 <= A993 and A1005;
A1014 <= A994 or A1001;
A1013 <= A994 or A995;
A1012 <= (not A1022) or (not A1021);
A1011 <= A1020 and A1013;
A1010 <= ((not A994) and A1001) or (A994 and (not A1001));
A1009 <= (not A1018) or (not A1019);
A1008 <= (A993 and A1005) or ((not A993) and (not A1005));
A1007 <= A1015 or A992;
A1006 <= A1012 and A993;
A1005 <= A1014 and A1013;
A1004 <= A1009 and A993;
A1003 <= A1011 and A1010;
A1002 <= ((not A1003) and A993) or (A1003 and (not A993));
A1001 <= ((not A991) and A992) or (A991 and (not A992));
A1000 <= A1001 and A1008;
A999 <= A1001 and A1007;
A998 <= A1006 or A1005;
A997 <= A1004 or A1003;
A996 <= A1002 and A1001;
A995 <= A1297;
A994 <= A1264;
A993 <= A1231;
A992 <= A1198;
A991 <= A1161;
A990 <= A968 and A983;
A989 <= (not A968) and (not A990);
A988 <= A968 or A983;
A987 <= (not A961) or (not A962);
A986 <= A968 or A983;
A985 <= (not A984) and (not A968);
A984 <= A968 and A983;
A983 <= (not A959) or (not A960);
A982 <= A960 and A972;
A981 <= A961 or A968;
A980 <= A961 or A962;
A979 <= (not A989) or (not A988);
A978 <= A987 and A980;
A977 <= ((not A961) and A968) or (A961 and (not A968));
A976 <= (not A985) or (not A986);
A975 <= (A960 and A972) or ((not A960) and (not A972));
A974 <= A982 or A959;
A973 <= A979 and A960;
A972 <= A981 and A980;
A971 <= A976 and A960;
A970 <= A978 and A977;
A969 <= ((not A970) and A960) or (A970 and (not A960));
A968 <= ((not A958) and A959) or (A958 and (not A959));
A967 <= A968 and A975;
A966 <= A968 and A974;
A965 <= A973 or A972;
A964 <= A971 or A970;
A963 <= A969 and A968;
A962 <= A1956;
A961 <= A1923;
A960 <= A1890;
A959 <= A1857;
A958 <= A1824;
A957 <= A935 and A950;
A956 <= (not A935) and (not A957);
A955 <= A935 or A950;
A954 <= (not A928) or (not A929);
A953 <= A935 or A950;
A952 <= (not A951) and (not A935);
A951 <= A935 and A950;
A950 <= (not A926) or (not A927);
A949 <= A927 and A939;
A948 <= A928 or A935;
A947 <= A928 or A929;
A946 <= (not A956) or (not A955);
A945 <= A954 and A947;
A944 <= ((not A928) and A935) or (A928 and (not A935));
A943 <= (not A952) or (not A953);
A942 <= (A927 and A939) or ((not A927) and (not A939));
A941 <= A949 or A926;
A940 <= A946 and A927;
A939 <= A948 and A947;
A938 <= A943 and A927;
A937 <= A945 and A944;
A936 <= ((not A937) and A927) or (A937 and (not A927));
A935 <= ((not A925) and A926) or (A925 and (not A926));
A934 <= A935 and A942;
A933 <= A935 and A941;
A932 <= A940 or A939;
A931 <= A938 or A937;
A930 <= A936 and A935;
A929 <= A1791;
A928 <= A1758;
A927 <= A1725;
A926 <= A1692;
A925 <= A1659;
A924 <= A902 and A917;
A923 <= (not A902) and (not A924);
A922 <= A902 or A917;
A921 <= (not A895) or (not A896);
A920 <= A902 or A917;
A919 <= (not A918) and (not A902);
A918 <= A902 and A917;
A917 <= (not A893) or (not A894);
A916 <= A894 and A906;
A915 <= A895 or A902;
A914 <= A895 or A896;
A913 <= (not A923) or (not A922);
A912 <= A921 and A914;
A911 <= ((not A895) and A902) or (A895 and (not A902));
A910 <= (not A919) or (not A920);
A909 <= (A894 and A906) or ((not A894) and (not A906));
A908 <= A916 or A893;
A907 <= A913 and A894;
A906 <= A915 and A914;
A905 <= A910 and A894;
A904 <= A912 and A911;
A903 <= ((not A904) and A894) or (A904 and (not A894));
A902 <= ((not A892) and A893) or (A892 and (not A893));
A901 <= A902 and A909;
A900 <= A902 and A908;
A899 <= A907 or A906;
A898 <= A905 or A904;
A897 <= A903 and A902;
A896 <= A1626;
A895 <= A1593;
A894 <= A1560;
A893 <= A1527;
A892 <= A1494;
A891 <= A869 and A884;
A890 <= (not A869) and (not A891);
A889 <= A869 or A884;
A888 <= (not A862) or (not A863);
A887 <= A869 or A884;
A886 <= (not A885) and (not A869);
A885 <= A869 and A884;
A884 <= (not A860) or (not A861);
A883 <= A861 and A873;
A882 <= A862 or A869;
A881 <= A862 or A863;
A880 <= (not A890) or (not A889);
A879 <= A888 and A881;
A878 <= ((not A862) and A869) or (A862 and (not A869));
A877 <= (not A886) or (not A887);
A876 <= (A861 and A873) or ((not A861) and (not A873));
A875 <= A883 or A860;
A874 <= A880 and A861;
A873 <= A882 and A881;
A872 <= A877 and A861;
A871 <= A879 and A878;
A870 <= ((not A871) and A861) or (A871 and (not A861));
A869 <= ((not A859) and A860) or (A859 and (not A860));
A868 <= A869 and A876;
A867 <= A869 and A875;
A866 <= A874 or A873;
A865 <= A872 or A871;
A864 <= A870 and A869;
A863 <= A1461;
A862 <= A1428;
A861 <= A1395;
A860 <= A1362;
A859 <= A1329;
A858 <= A836 and A851;
A857 <= (not A836) and (not A858);
A856 <= A836 or A851;
A855 <= (not A829) or (not A830);
A854 <= A836 or A851;
A853 <= (not A852) and (not A836);
A852 <= A836 and A851;
A851 <= (not A827) or (not A828);
A850 <= A828 and A840;
A849 <= A829 or A836;
A848 <= A829 or A830;
A847 <= (not A857) or (not A856);
A846 <= A855 and A848;
A845 <= ((not A829) and A836) or (A829 and (not A836));
A844 <= (not A853) or (not A854);
A843 <= (A828 and A840) or ((not A828) and (not A840));
A842 <= A850 or A827;
A841 <= A847 and A828;
A840 <= A849 and A848;
A839 <= A844 and A828;
A838 <= A846 and A845;
A837 <= ((not A838) and A828) or (A838 and (not A828));
A836 <= ((not A826) and A827) or (A826 and (not A827));
A835 <= A836 and A843;
A834 <= A836 and A842;
A833 <= A841 or A840;
A832 <= A839 or A838;
A831 <= A837 and A836;
A830 <= A1296;
A829 <= A1263;
A828 <= A1230;
A827 <= A1197;
A826 <= A1162;
A825 <= A803 and A818;
A824 <= (not A803) and (not A825);
A823 <= A803 or A818;
A822 <= (not A796) or (not A797);
A821 <= A803 or A818;
A820 <= (not A819) and (not A803);
A819 <= A803 and A818;
A818 <= (not A794) or (not A795);
A817 <= A795 and A807;
A816 <= A796 or A803;
A815 <= A796 or A797;
A814 <= (not A824) or (not A823);
A813 <= A822 and A815;
A812 <= ((not A796) and A803) or (A796 and (not A803));
A811 <= (not A820) or (not A821);
A810 <= (A795 and A807) or ((not A795) and (not A807));
A809 <= A817 or A794;
A808 <= A814 and A795;
A807 <= A816 and A815;
A806 <= A811 and A795;
A805 <= A813 and A812;
A804 <= ((not A805) and A795) or (A805 and (not A795));
A803 <= ((not A793) and A794) or (A793 and (not A794));
A802 <= A803 and A810;
A801 <= A803 and A809;
A800 <= A808 or A807;
A799 <= A806 or A805;
A798 <= A804 and A803;
A797 <= A1955;
A796 <= A1922;
A795 <= A1889;
A794 <= A1856;
A793 <= A1823;
A792 <= A770 and A785;
A791 <= (not A770) and (not A792);
A790 <= A770 or A785;
A789 <= (not A763) or (not A764);
A788 <= A770 or A785;
A787 <= (not A786) and (not A770);
A786 <= A770 and A785;
A785 <= (not A761) or (not A762);
A784 <= A762 and A774;
A783 <= A763 or A770;
A782 <= A763 or A764;
A781 <= (not A791) or (not A790);
A780 <= A789 and A782;
A779 <= ((not A763) and A770) or (A763 and (not A770));
A778 <= (not A787) or (not A788);
A777 <= (A762 and A774) or ((not A762) and (not A774));
A776 <= A784 or A761;
A775 <= A781 and A762;
A774 <= A783 and A782;
A773 <= A778 and A762;
A772 <= A780 and A779;
A771 <= ((not A772) and A762) or (A772 and (not A762));
A770 <= ((not A760) and A761) or (A760 and (not A761));
A769 <= A770 and A777;
A768 <= A770 and A776;
A767 <= A775 or A774;
A766 <= A773 or A772;
A765 <= A771 and A770;
A764 <= A1790;
A763 <= A1757;
A762 <= A1724;
A761 <= A1691;
A760 <= A1658;
A759 <= A737 and A752;
A758 <= (not A737) and (not A759);
A757 <= A737 or A752;
A756 <= (not A730) or (not A731);
A755 <= A737 or A752;
A754 <= (not A753) and (not A737);
A753 <= A737 and A752;
A752 <= (not A728) or (not A729);
A751 <= A729 and A741;
A750 <= A730 or A737;
A749 <= A730 or A731;
A748 <= (not A758) or (not A757);
A747 <= A756 and A749;
A746 <= ((not A730) and A737) or (A730 and (not A737));
A745 <= (not A754) or (not A755);
A744 <= (A729 and A741) or ((not A729) and (not A741));
A743 <= A751 or A728;
A742 <= A748 and A729;
A741 <= A750 and A749;
A740 <= A745 and A729;
A739 <= A747 and A746;
A738 <= ((not A739) and A729) or (A739 and (not A729));
A737 <= ((not A727) and A728) or (A727 and (not A728));
A736 <= A737 and A744;
A735 <= A737 and A743;
A734 <= A742 or A741;
A733 <= A740 or A739;
A732 <= A738 and A737;
A731 <= A1625;
A730 <= A1592;
A729 <= A1559;
A728 <= A1526;
A727 <= A1493;
A726 <= A704 and A719;
A725 <= (not A704) and (not A726);
A724 <= A704 or A719;
A723 <= (not A697) or (not A698);
A722 <= A704 or A719;
A721 <= (not A720) and (not A704);
A720 <= A704 and A719;
A719 <= (not A695) or (not A696);
A718 <= A696 and A708;
A717 <= A697 or A704;
A716 <= A697 or A698;
A715 <= (not A725) or (not A724);
A714 <= A723 and A716;
A713 <= ((not A697) and A704) or (A697 and (not A704));
A712 <= (not A721) or (not A722);
A711 <= (A696 and A708) or ((not A696) and (not A708));
A710 <= A718 or A695;
A709 <= A715 and A696;
A708 <= A717 and A716;
A707 <= A712 and A696;
A706 <= A714 and A713;
A705 <= ((not A706) and A696) or (A706 and (not A696));
A704 <= ((not A694) and A695) or (A694 and (not A695));
A703 <= A704 and A711;
A702 <= A704 and A710;
A701 <= A709 or A708;
A700 <= A707 or A706;
A699 <= A705 and A704;
A698 <= A1460;
A697 <= A1427;
A696 <= A1394;
A695 <= A1361;
A694 <= A1328;
A693 <= A671 and A686;
A692 <= (not A671) and (not A693);
A691 <= A671 or A686;
A690 <= (not A664) or (not A665);
A689 <= A671 or A686;
A688 <= (not A687) and (not A671);
A687 <= A671 and A686;
A686 <= (not A662) or (not A663);
A685 <= A663 and A675;
A684 <= A664 or A671;
A683 <= A664 or A665;
A682 <= (not A692) or (not A691);
A681 <= A690 and A683;
A680 <= ((not A664) and A671) or (A664 and (not A671));
A679 <= (not A688) or (not A689);
A678 <= (A663 and A675) or ((not A663) and (not A675));
A677 <= A685 or A662;
A676 <= A682 and A663;
A675 <= A684 and A683;
A674 <= A679 and A663;
A673 <= A681 and A680;
A672 <= ((not A673) and A663) or (A673 and (not A663));
A671 <= ((not A661) and A662) or (A661 and (not A662));
A670 <= A671 and A678;
A669 <= A671 and A677;
A668 <= A676 or A675;
A667 <= A674 or A673;
A666 <= A672 and A671;
A665 <= A1295;
A664 <= A1262;
A663 <= A1229;
A662 <= A1196;
A661 <= A1163;
A660 <= A638 and A653;
A659 <= (not A638) and (not A660);
A658 <= A638 or A653;
A657 <= (not A631) or (not A632);
A656 <= A638 or A653;
A655 <= (not A654) and (not A638);
A654 <= A638 and A653;
A653 <= (not A629) or (not A630);
A652 <= A630 and A642;
A651 <= A631 or A638;
A650 <= A631 or A632;
A649 <= (not A659) or (not A658);
A648 <= A657 and A650;
A647 <= ((not A631) and A638) or (A631 and (not A638));
A646 <= (not A655) or (not A656);
A645 <= (A630 and A642) or ((not A630) and (not A642));
A644 <= A652 or A629;
A643 <= A649 and A630;
A642 <= A651 and A650;
A641 <= A646 and A630;
A640 <= A648 and A647;
A639 <= ((not A640) and A630) or (A640 and (not A630));
A638 <= ((not A628) and A629) or (A628 and (not A629));
A637 <= A638 and A645;
A636 <= A638 and A644;
A635 <= A643 or A642;
A634 <= A641 or A640;
A633 <= A639 and A638;
A632 <= A1954;
A631 <= A1921;
A630 <= A1888;
A629 <= A1855;
A628 <= A1822;
A627 <= A605 and A620;
A626 <= (not A605) and (not A627);
A625 <= A605 or A620;
A624 <= (not A598) or (not A599);
A623 <= A605 or A620;
A622 <= (not A621) and (not A605);
A621 <= A605 and A620;
A620 <= (not A596) or (not A597);
A619 <= A597 and A609;
A618 <= A598 or A605;
A617 <= A598 or A599;
A616 <= (not A626) or (not A625);
A615 <= A624 and A617;
A614 <= ((not A598) and A605) or (A598 and (not A605));
A613 <= (not A622) or (not A623);
A612 <= (A597 and A609) or ((not A597) and (not A609));
A611 <= A619 or A596;
A610 <= A616 and A597;
A609 <= A618 and A617;
A608 <= A613 and A597;
A607 <= A615 and A614;
A606 <= ((not A607) and A597) or (A607 and (not A597));
A605 <= ((not A595) and A596) or (A595 and (not A596));
A604 <= A605 and A612;
A603 <= A605 and A611;
A602 <= A610 or A609;
A601 <= A608 or A607;
A600 <= A606 and A605;
A599 <= A1789;
A598 <= A1756;
A597 <= A1723;
A596 <= A1690;
A595 <= A1657;
A594 <= A572 and A587;
A593 <= (not A572) and (not A594);
A592 <= A572 or A587;
A591 <= (not A565) or (not A566);
A590 <= A572 or A587;
A589 <= (not A588) and (not A572);
A588 <= A572 and A587;
A587 <= (not A563) or (not A564);
A586 <= A564 and A576;
A585 <= A565 or A572;
A584 <= A565 or A566;
A583 <= (not A593) or (not A592);
A582 <= A591 and A584;
A581 <= ((not A565) and A572) or (A565 and (not A572));
A580 <= (not A589) or (not A590);
A579 <= (A564 and A576) or ((not A564) and (not A576));
A578 <= A586 or A563;
A577 <= A583 and A564;
A576 <= A585 and A584;
A575 <= A580 and A564;
A574 <= A582 and A581;
A573 <= ((not A574) and A564) or (A574 and (not A564));
A572 <= ((not A562) and A563) or (A562 and (not A563));
A571 <= A572 and A579;
A570 <= A572 and A578;
A569 <= A577 or A576;
A568 <= A575 or A574;
A567 <= A573 and A572;
A566 <= A1624;
A565 <= A1591;
A564 <= A1558;
A563 <= A1525;
A562 <= A1492;
A561 <= A539 and A554;
A560 <= (not A539) and (not A561);
A559 <= A539 or A554;
A558 <= (not A532) or (not A533);
A557 <= A539 or A554;
A556 <= (not A555) and (not A539);
A555 <= A539 and A554;
A554 <= (not A530) or (not A531);
A553 <= A531 and A543;
A552 <= A532 or A539;
A551 <= A532 or A533;
A550 <= (not A560) or (not A559);
A549 <= A558 and A551;
A548 <= ((not A532) and A539) or (A532 and (not A539));
A547 <= (not A556) or (not A557);
A546 <= (A531 and A543) or ((not A531) and (not A543));
A545 <= A553 or A530;
A544 <= A550 and A531;
A543 <= A552 and A551;
A542 <= A547 and A531;
A541 <= A549 and A548;
A540 <= ((not A541) and A531) or (A541 and (not A531));
A539 <= ((not A529) and A530) or (A529 and (not A530));
A538 <= A539 and A546;
A537 <= A539 and A545;
A536 <= A544 or A543;
A535 <= A542 or A541;
A534 <= A540 and A539;
A533 <= A1459;
A532 <= A1426;
A531 <= A1393;
A530 <= A1360;
A529 <= A1327;
A528 <= A506 and A521;
A527 <= (not A506) and (not A528);
A526 <= A506 or A521;
A525 <= (not A499) or (not A500);
A524 <= A506 or A521;
A523 <= (not A522) and (not A506);
A522 <= A506 and A521;
A521 <= (not A497) or (not A498);
A520 <= A498 and A510;
A519 <= A499 or A506;
A518 <= A499 or A500;
A517 <= (not A527) or (not A526);
A516 <= A525 and A518;
A515 <= ((not A499) and A506) or (A499 and (not A506));
A514 <= (not A523) or (not A524);
A513 <= (A498 and A510) or ((not A498) and (not A510));
A512 <= A520 or A497;
A511 <= A517 and A498;
A510 <= A519 and A518;
A509 <= A514 and A498;
A508 <= A516 and A515;
A507 <= ((not A508) and A498) or (A508 and (not A498));
A506 <= ((not A496) and A497) or (A496 and (not A497));
A505 <= A506 and A513;
A504 <= A506 and A512;
A503 <= A511 or A510;
A502 <= A509 or A508;
A501 <= A507 and A506;
A500 <= A1294;
A499 <= A1261;
A498 <= A1228;
A497 <= A1195;
A496 <= A1164;
A495 <= A473 and A488;
A494 <= (not A473) and (not A495);
A493 <= A473 or A488;
A492 <= (not A466) or (not A467);
A491 <= A473 or A488;
A490 <= (not A489) and (not A473);
A489 <= A473 and A488;
A488 <= (not A464) or (not A465);
A487 <= A465 and A477;
A486 <= A466 or A473;
A485 <= A466 or A467;
A484 <= (not A494) or (not A493);
A483 <= A492 and A485;
A482 <= ((not A466) and A473) or (A466 and (not A473));
A481 <= (not A490) or (not A491);
A480 <= (A465 and A477) or ((not A465) and (not A477));
A479 <= A487 or A464;
A478 <= A484 and A465;
A477 <= A486 and A485;
A476 <= A481 and A465;
A475 <= A483 and A482;
A474 <= ((not A475) and A465) or (A475 and (not A465));
A473 <= ((not A463) and A464) or (A463 and (not A464));
A472 <= A473 and A480;
A471 <= A473 and A479;
A470 <= A478 or A477;
A469 <= A476 or A475;
A468 <= A474 and A473;
A467 <= A1953;
A466 <= A1920;
A465 <= A1887;
A464 <= A1854;
A463 <= A1821;
A462 <= A440 and A455;
A461 <= (not A440) and (not A462);
A460 <= A440 or A455;
A459 <= (not A433) or (not A434);
A458 <= A440 or A455;
A457 <= (not A456) and (not A440);
A456 <= A440 and A455;
A455 <= (not A431) or (not A432);
A454 <= A432 and A444;
A453 <= A433 or A440;
A452 <= A433 or A434;
A451 <= (not A461) or (not A460);
A450 <= A459 and A452;
A449 <= ((not A433) and A440) or (A433 and (not A440));
A448 <= (not A457) or (not A458);
A447 <= (A432 and A444) or ((not A432) and (not A444));
A446 <= A454 or A431;
A445 <= A451 and A432;
A444 <= A453 and A452;
A443 <= A448 and A432;
A442 <= A450 and A449;
A441 <= ((not A442) and A432) or (A442 and (not A432));
A440 <= ((not A430) and A431) or (A430 and (not A431));
A439 <= A440 and A447;
A438 <= A440 and A446;
A437 <= A445 or A444;
A436 <= A443 or A442;
A435 <= A441 and A440;
A434 <= A1788;
A433 <= A1755;
A432 <= A1722;
A431 <= A1689;
A430 <= A1656;
A429 <= A407 and A422;
A428 <= (not A407) and (not A429);
A427 <= A407 or A422;
A426 <= (not A400) or (not A401);
A425 <= A407 or A422;
A424 <= (not A423) and (not A407);
A423 <= A407 and A422;
A422 <= (not A398) or (not A399);
A421 <= A399 and A411;
A420 <= A400 or A407;
A419 <= A400 or A401;
A418 <= (not A428) or (not A427);
A417 <= A426 and A419;
A416 <= ((not A400) and A407) or (A400 and (not A407));
A415 <= (not A424) or (not A425);
A414 <= (A399 and A411) or ((not A399) and (not A411));
A413 <= A421 or A398;
A412 <= A418 and A399;
A411 <= A420 and A419;
A410 <= A415 and A399;
A409 <= A417 and A416;
A408 <= ((not A409) and A399) or (A409 and (not A399));
A407 <= ((not A397) and A398) or (A397 and (not A398));
A406 <= A407 and A414;
A405 <= A407 and A413;
A404 <= A412 or A411;
A403 <= A410 or A409;
A402 <= A408 and A407;
A401 <= A1623;
A400 <= A1590;
A399 <= A1557;
A398 <= A1524;
A397 <= A1491;
A396 <= A374 and A389;
A395 <= (not A374) and (not A396);
A394 <= A374 or A389;
A393 <= (not A367) or (not A368);
A392 <= A374 or A389;
A391 <= (not A390) and (not A374);
A390 <= A374 and A389;
A389 <= (not A365) or (not A366);
A388 <= A366 and A378;
A387 <= A367 or A374;
A386 <= A367 or A368;
A385 <= (not A395) or (not A394);
A384 <= A393 and A386;
A383 <= ((not A367) and A374) or (A367 and (not A374));
A382 <= (not A391) or (not A392);
A381 <= (A366 and A378) or ((not A366) and (not A378));
A380 <= A388 or A365;
A379 <= A385 and A366;
A378 <= A387 and A386;
A377 <= A382 and A366;
A376 <= A384 and A383;
A375 <= ((not A376) and A366) or (A376 and (not A366));
A374 <= ((not A364) and A365) or (A364 and (not A365));
A373 <= A374 and A381;
A372 <= A374 and A380;
A371 <= A379 or A378;
A370 <= A377 or A376;
A369 <= A375 and A374;
A368 <= A1458;
A367 <= A1425;
A366 <= A1392;
A365 <= A1359;
A364 <= A1326;
A331 <= A1293;
A332 <= A1260;
A333 <= A1227;
A334 <= A1194;
A335 <= A1165;
A336 <= A342 and A341;
A337 <= A344 or A343;
A338 <= A346 or A345;
A339 <= A341 and A347;
A340 <= A341 and A348;
A341 <= ((not A331) and A332) or (A331 and (not A332));
A342 <= ((not A343) and A333) or (A343 and (not A333));
A343 <= A351 and A350;
A344 <= A349 and A333;
A345 <= A354 and A353;
A346 <= A352 and A333;
A347 <= A355 or A332;
A348 <= (A333 and A345) or ((not A333) and (not A345));
A349 <= (not A358) or (not A359);
A350 <= ((not A334) and A341) or (A334 and (not A341));
A351 <= A360 and A353;
A352 <= (not A362) or (not A361);
A353 <= A334 or A335;
A354 <= A334 or A341;
A355 <= A333 and A345;
A356 <= (not A332) or (not A333);
A357 <= A341 and A356;
A358 <= (not A357) and (not A341);
A359 <= A341 or A356;
A360 <= (not A334) or (not A335);
A361 <= A341 or A356;
A362 <= (not A341) and (not A363);
A363 <= A341 and A356;
end testing_behav;
| gpl-3.0 | 2b04ba4104e29c9ff3dff5aec970494f | 0.606334 | 2.646058 | false | false | false | false |
mkotormus/G3_OrchestraConductorDemo | src/ov7670_marker_tracker_use/ov7670_marker_tracker_use.srcs/sources_1/ipshared/xilinx.com/microblaze_v9_3/7b6e2d75/hdl/vhdl/victim_cache.vhd | 1 | 33,084 | `protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2014"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
HqZvvpiycgzVmI65ZQjxIsQo/b7qgrJHdRy9Sba2Px0qwYeLMzzLr5baQF+HJVIdtjDwq5N4GbQ/
813xKioLzA==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
GepuzmZoMHH+UeLVOOGIKwRT0wfeuqEZk/dOeyAH4tt9xSM4cTUhKU1NOa0iKWH9k4zYR8T0Hym9
3LnFD3kIlgFvlTpAjLbIqjLPd7DjLcFHCEOroDuoFOappl4HGSGFVNQ5Gg7EltUxFyaAdu0f+7px
23lbMdMfienMPNJ7whs=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2014_03", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
eLIU+7tkoobTqfiksOHYesumH/RCkftW+XBJ8RFVhgCzMSTOKkZ6lvwhzARCPxHHG9rsdNWTneBr
gK597/jYJ/oVHSkiVLwUrvtvTijZuhUbgYj+g7sw+8aLCdd/cVdFWK1ANRF0ZJHzcg61QHIs2S8R
pG9dNl8GeRCxwUBpFpmlc/dKSe+e6wW8bOoY7OiVYTqsF4JZpn3Y5jdmtZHG3NPqIUfy2Zrdh/AB
T1DxEPNN/tbUh3E5z3AT7/EiKt8Wae0riPP3tiSo8tEBrKP+2WnV7PLemZXtF987OmQWtNofnI0+
bL4DlcR6xxJvoUCi7xC3B9abT/459oXeXTY6pQ==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
0NYIqngVAVAJSO0bxD3Oz0+K+3e/5hHWSklEudg20eeITnfz17iMXvSuB8QrDEwPyl09cIncCa36
gBUaC1zj/DsOhG6dvD92wlzpYP9ejzSuoWuHIO3ASS5jOdBkGS4H7GDsgyVwbDTMqsFDWJ4dTV1r
DdjVa+iuyxXabBo1E3M=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
dxEQWD6vZHTE6LgiarfoXTLBmurZdnOi6fbbqfs1mWbH5hHus/Y5d8xvCNg4bA1tZLcGNWMWGwd1
EuTGCRRuTiTypsKfbIfQExgUrs1A/U4jxWyGxUWQEykHfam9r9krKKxYCsUCYlrf1+oeJr0YPcMg
aAlvS0kpfgV+ytqyPe6YW+Y4QAKLfsZf842SKWoQOT2d4jqnnjKkq0QVi0A9LVxUNuHfiEidvU93
J67Nj66mDStofNKa1FC7C27JxxMTKVGIA2s+QToDTaGOmlyWRUmHK8uOZDQrkIKsT0cbYMHIE/9g
S8BR2bUGw3uvZg6V8CrOHeHNTkGxxWbpl0myYg==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 22752)
`protect data_block
k0OHB3ANi8xvD+pNesWatsP2vA4znW/WvUGyCq/5AmbuGIkqQUYMqpT2uC9TYjlGPHfNAA5qY5V+
F3sEXLqgPwUwhAFcwD2Hj6pDJNuUVBwqOyC2YdTbrw4D4ZQUalosHT6cbxZnGXh17ACLigY9xcfX
lmf57SFUOWLJ3Q3zLhviSc+CGhKzCAvs/I0yDQvf4rT8SvcY5QhCTow2yiSzZINiBLm5ko63jUdz
qIF9I3Ai05EFRkXaeWoLAvPj80OFLlCB9Qno+QtObmHqOMXyFeUmP6EYJgIY3aT1D3u7BihhH0uP
xQhzilaLiMrNdgsFYWRyOYXFPhACOfFUwaKo/fnz3EQqXvqf3K8JslNO9Q4KJNE+oGZhzz+Hh/4T
xotLmEEtYbcEPtP5QChXBv5V7Tp9irMGFLNbAfeme0HNkGstp7YFaOfTqLYoVIo5sfmMM+7MSGzn
PWa8RRGh08Wm2SAlUfABRB34qYBJP7MxnJkXroeIJSXsiVNFOGTaBisQZ+JPOYMSUUjX3zkhq+8/
O9/BEDRIepd6iHh1NWMBt1+FtiD+2tOAvJYYMpreGqIAFN8wnX3/4/FQTQahGHSMl5tG5bvfiQ2B
DAUbAQ22+2wN8b9MZZUtCGbCm96RE2j3OmTFQld2tEi0Iuv1mDObXpwPHKZ4atJahlAd7YSnovvr
Lpmw6DqRsP1cgOyvB9L41YZIKrU1qUkXrX13Hvr3O2+tNL3xTp9GuLituqqc4Xzj4PhQGYW6qBCb
5ysi+imG1gV7CBDbFXbmZgXGg/klGiHdGjtD5rB2Dg69jsD2H9hZt2yfPSymSGdsAPRPed6Vekbl
cdl8HF8yS5iSsALSXWMKqzqzLD8ndSduGTT1a8g+Vp9o6qhVwWpRio8F+qohuVnHsx+5+Qj+DUw/
fJwG12Dhx6OHLqAt8/VkRKyINlHt20KxQWrwS+EiXDG2o6tUyG2vQ3XSoWlVBJ5N7spPA4fk7akv
QBgo7vSHiM/8F29ul6r3VQgLN43zZoQQGXDLgUIfR3KsSu24bQCRQkid5o8MrjBHAPqQO1hP3359
eHVRfUWYbGmGVCnQUdORBQb5Lk6BF8t6mMeDjHS6Uu1AH3p1FVPtCZ9qO9aUmdPUi5ShoH26hwIu
8yKhZlaAkGR20SZWwinqBMMWoRgcc2/OWVe0NDOFAP/ClQ991MH+ALAG3Qw9OxdBzsaMnoSCTjWi
2e1L7sBZjaoTq4G9tlVdPBsXbETHB/RGJP8KJHm6Pf/838CW5kZKUwDLqMs/H4w1ADswFcRVjeeb
l2h4KFiGLF1utBu901rcCro3IhMKqNVRZLLOIJMoyWX4NhGoCOoUc9pV3BETsqOlQEQRg9PjTbcA
8xr3GFtxhZkYkCmjlvL9TAxIhobsI1mzKwySvFJoLTJrRrcjHarhGNUWgTXF28Tc/PtWZ4nuqaj/
e7IjVXK5z+gg8e/u5IaL1O5uHPCXv4ARU3RK8F2R4xPL7XtclRDZlLb6DRFx9rIGjIR0Sy6zeMFx
EvDbRy28uyGTUvMD846HsDELG9Gur13xm92AYSxKxdbb8I+So5xdche92sTHeOffu4kD9U5bFiEB
cWgJwAcDE+JLW6s54A0S+jFRGR4MlscL4f/mTsGSNvTZlhpj9qvxQHAVl8BKYPbWjDby8aHOhL5Q
okdkK4mYdW5ruXZGuajCGMW80qTliQEhrsGTFGtcbOjePV/zEKukERhSqEsct1XLZKPUDIUsuA38
HGfn11n+dKh6M5ifYzeAWDKlt/zpL8Xr2ZQPJkIIOBYIC/9gUsCUFB3n4NmM+FuoLSRmOLTnLkvP
GJtoN57UrE+E2nUq4y67DyMKS16brcY6T6Q/lOdlFROcSQsro2MDy82n5xotImtKzAs6LM9P1ITU
+EBJkA5PIJfKGVyrM0z8IdAhUuaVJ7ujehQOIaPJbkJ66UKbuPr5gUSBv5NXeejI7Sisji1Hotff
MJurwKWFL97jvRUfmRXOjJRi6QCEnfHFQ2eL1JHXfe7XzbYRf7Ju0OGGJlf6HZ0mnxZbGTFmpEHS
wQ414ufsvgCGH2Ui/4VQv90MwoJstGYYdE8VDyyWZMMvVM+pdtVRDlw9QnnfzOPDtZFT6sWDfPzj
YDNBUkIr3oVLvfZ7qUrvYCz91M1h1hraq1EAUD5ojgCGP6PFU/1OXDatpicVUSdnEmmtUhg9TltC
bsK9ucs1StLKuj5u+9Cvjx8upbIh06JBPeO9grDl3Y3tnoK1dvMNfuvU/7ikLJOzvTDNB+6JfNkl
PzH3GQ57kImdsudAoLKk9vauxklCnqpfFLs0mVi99kOROHCc+8y26t2bhKCVNpG3UgmL9RPvu4AO
xaBzDOJOurccTk9T1y17E6yIscZ4Fn233KwE2xKkzyoKTK2UtCzKfLMxXsfY5GbHPp/1ubujzZ2B
2tF5UVUHicbl/fqnSZSZN0SDc6MidqpsxYsylivEGEWf727jHqRbrc1utrH49IfMVyR/RbOQZA88
43097Nuf+aaLUcWxYwA8zNaCWhfrzKEzGCCcUOSrLcrlnjucIK35F248NBzUpKEh5m0Es3nXtinj
O6gb132I0hET3+VH8SjfvAfsoa8enSsFUm8++Kef6DT7RFxtZsQEq0a03Dmunll3+zPBfqwVIvZ3
MQi6EFy4T4nRHgDaYL43jGJ6tJ92Mv7/W7fvHIWvwla+e5DeETNnm9tn76UE0MNMBZvTF2Fc+v99
TvrErOB6K1rGZsfYZWEiVE/UuDbhBYGHyaNXpA/fZf/NTGmImm/cQFWyPG82KTblbZs8ITJENJkD
SKobGSUxZ454hiSw/g/fXVbyx5zjzI++KFm/4NCyqpKzDJEMtRGG1pqcqX59q8nh+X9uafdHxo3G
T3ohGPC57s6poXg6TLv3U/Ow8XQydqhBvPcv/NHtee5IA201miqhMMy5h4OAxTs/l6eDWCmqeBIv
YIKqyPZz0xax4m5fkmqSPKHey815aF+tXiaZXJwfmYvoZf/eT03ESkvZUd/P92MJJ+yiD6x4cbfD
iCNPpSBdR11e6Ob2lCDoS0J/ivNZPY5ajvdbugznGSavo7rod9m+NfyQT9CXankFXauTlmYmWJYS
8x5uGG1yNM4c3zvsikdnhmxaCqnRVaJfmYZvokgWtd0wr/Clk+JRDKyntP2DXZZCvlxBYB6w3v7H
tDzw5+oPNkPm91yc29WM+dUrf6LYKzCHWXXqAhGNN+OSunVz4JmjSdiAzcz3xnrTXJ9klEpKmPqW
ZK41lo4VT0XaGop2pyZBLSEKJPKV86iE7HaB54JFAhNEPHFrzUP9AqNq7S9U0ylKWgDChq+18cTW
6wWKRCTXScIXlSI2aCkbB9X6++uSNVJXmSKzXoo0/sGJYVsFYtNy0RGAQfo2hZZGi/vvhXAg+g90
kNPQ+8eErxE8trtIOwl4RoitIvlPPi3rKx5PbIK9qravno85XX1E5GawlMBH4HeJYC0wp1LWKuG0
NxUVjNCl8lfcc8eFus2D8BQVyIZ5iq3ymrQgxYvACHKfWU66DflXGtfb2tl7fN0yOOR0dAWS5ati
0gKdA2naAa0Sl2+4CLOxgJGV3aFUQF7r2Mwg3O7kJxwcDCKsmdAcjm9UnVoP3Zz6H+cxJppGh5TI
tynMxnigO0tUEVqAP3qgzmmD1VA8pXRP7TVOIOYUbRsGChAZoMbkBH9trjulTPdEVzD7VM1AGjtJ
sDJHH3Tz0TvNsbJNCp+mBXLs5ULNgdzEbtmT5kMcEnCuC+yyhkuPe65w4eT3Jqxm4Wk22PTdQcR2
61pZXeUttV2qyAUnT98uiUBlFEdq8qBrV5ecOqdXREsBHc80PmAEy2sxbpR2Lu4iohAiLM8+hwnk
AKBTgrt5fEr2ghJTICixdcBu/962D2N89gviTG6/rz/AxLFSxXSek1zQM7cZo0wNH8fbyPBsRFuR
e8NZg94Nsonh5NyPrxaoXMj2MLLQg+PxaYV3MGxQAUiFkxWcVvfdJH7P3t8IycIYCP7QeomiwLVK
g7tlq0YbPq9+0MiH+HvVw6lClfvWylpLwc1crPlNOFhPVHN17ZfVdPGRXPkI8MpkMMVm+cE485VG
uh330Ravmab5K0g86/JA85cz5tpIxkWOkvEchJcEoBgvMv2EsrNc7X2pJy/4x3NvxzAMP9yDnKn7
OD2RDn1JfqnoVFvv9ryTTvIBzRf373HiHpDDUGA64wMAX0j9PzrV83dvuiiG/1cVXApzFWXOxJNG
Vu0dwvPjKgiC8ZdVmL5AOsA8MLJJm3Ce8PXQCxLV2VlNIr6jlJOZ/mAa11DbJOaVfrGiglBp3jud
m4XQvY1JzN6segVVToteoq6m5sNO+16I4FoZQF/xb7X+NHH7BD50ZPRpsWvXycXrZqqEbtWfQZTi
ZiksaNUih6DQRP9whON2DGSjfnwgfVNOokTB+lrOsvr7Xne3ywxI/bfVrTXoJZpTGJ3XMMv6Wd9o
Xvd1D+RL9s0JkyalUnTPekuxKLPBp/vEMCubzfWv0y+IpJ0LxNXiHXNS8jzvaDSOHbP6wE5nvQTt
UQ3iwhCbWPAqTn7EqdJh2F/nJGuGM4pIizLngOV0JD182gdL7mFARG/i/EIonTbrTLHQFneJCzLt
oBR9JeVzTrLxzrS5qgraEb8QFc29BDYuoHS+nXrhffKoR/p00QxDx1MARszsjTsqQDPlByWtxAp1
Q1EAFp1v1JUCnpayE4N+Arozg/dzbrx/kUzd6j0sSbRNFwDENlfidmlSA3t+Q0w+tnOfE9srRsYA
DjDvMT6KWmHYvfVVeZrs9Ex1MW9jVGgc18Cadej8YllS/Ezt4I6y1snuDD60VTTWcXZCyXvlV2nn
EWv11Nbrm4lJIIGmuc3FFNyu9u0y6hMNXDXI3UT3MYtYmRL6rpIDTsAi1rzNDg6LHTde4O+1e4AO
j+fqopNpifRwK2VSAnKL1Hz2Cx9RjCn5CLeVXcqBZeOKdIORgQVPF0XTGARrGJ8+nvJlaF44dKxu
yFrCQ4uizANn89iUBEopkBAkqmgE/1UTPmgbz34tUDo5udBgG1E8fM84MnSHhntI0Zb4KLpVXEWE
lG8UJNryaxop7fY6e+2N8+LLn15KaWzdYvrKjiESSB3ZkIhpi7IKsyV7JV5C7yr/ikSWBHzsZbID
edqqyeRmPig86w0NKOiC3YOc08jZ+OiFvU+xadB1YuClJq8oSJfKfVb5f56/K9mqyF0NB6M+BaXk
ci/SrlnAye0wKCYE4ewF7nHjwiuIYoidnfzKhWYgvD6SPeLvglqhxXqZn0YW0n7j/8OLSEpoz89o
VRw2s9WgXJKjTXaphRVj8pn4vW5aG901QgfTuYOmdaNKZtFOzWpRF6KTCafHIR1uuexw7amTF5gI
W7bWo5x8LTulsc4Opdzl7k/KpcKEwfTeUscwIGFQJKs6S6EXsPlCcypCdmssA7N671BfOT30cPpX
nrshEsHkXlzt1XyXVtD7Bu1NI4SuZoJUiQmRXqr4Wmohr/0ypy5DMK5Yup5sFYPEi7j5FuFOBox5
uJsGJiAv9MVUrcxkcjIHGncqs58rvnWzPuDrW4iwWrOKF3AKJPUz4PZ2nBwJCWK6B5NTMpyAxy1c
0CXov/G0/wVQLIFGL5aDZdqmpVgTN65YM+Nrmq2645v26sIIhvpupnymscYFhtlEn7ZFBPDaYl73
/bEuh7fRUGHl0LjnD3lHjQiEjyegik4iBnkj88+qW79sAlCOOEBLg8if3KLhd1gCM19QymUn4eiq
DQiE3i3OUYmNlVjywa1fhHt1wthw7Lsr28tbvdecYVgHDbSUp31a8wfiJ1pAPHFqzPQT8iOz9sJs
TbFOf/gcTbsk25ZWaAjaVeXm05j2azCKNBI1dmMb+nWPftTo9rEX6oQgfVKA07uhDX48w8Zi3Tbg
9YULAWkNT5Q8iWZu6Mp7CvaAV3izF4XymNj1mR0twkC0GKk2VlX6an5dA6FI5qJLIntYiAAuZp5t
F0BRlcYYHQTGTt2xexogDOq1cjDwFpor8uV0ZEZ225y9QGnVJC0DDXoXi1UmOnblUvYCY8+fSgeI
4oX9MqWJgCcQKlIUSWSxF9p4QS6jFls0p61G7z2tocNnYOCIGPLm3pfQ6YhT0Zwg56fqEPbk3bXy
ZpgZHK9zntaM6YVwzdFkYfOHsRyjPa+E1uJJRTwe744QOgtjNCgTO59WONoxxaEo35NRXiOo6uZl
fklOgjoQ37uGpaW0p2q5Ksq7Z5lg5t1dAA/HXSInogb8L7jJdgX8LsNalPR8MGoCm1uvRQwf4QgI
DgedpdYXSEoCAedV1IvdWiqE8IhEdx2s34IYc82/aDlDJ6gIM17P8i+bKpduOZqZ5l4U3Az5pU71
1xMOpgRKKEpOrXSaMuMisQgZyrxNeiP4g3VVD3HBG0SF+oiOA8CRHJalUCq/Aqs1BQThn/eOuVrP
Z82/ef6JcSLKlWbxTmuTjOseRNQovsp5rUbsAgHzQWsZpdAReB8MFmPBwvYP1LQ7y8pLOhvBZ1Tw
ZbOwbL4PGaAIV7MEbmW2/geYb4gz5yOODoj7SpLV3APvibbcLcII9NKn+r8qJ7OCuc+FO7GoThiE
IGKtHucaaP6oy2qbCXikJbyE2x15F2AezJIayZOQkbUF32sHZqUQR0pFdm6yCCvZtjo0hGb8FOKr
08lY9yjys/waeqDLFyyah0s4dXPpWbX6oKGRZPZRZbuT7nqkpNNcfogiqHFbb1+WywgjBylFORAX
l1Oi9YDuI3M43Rewy3pSP609xhQk+RM4NIi6dr0TKTfiXWiA6LBxq92a/FZU9fTW4GQZ91jcEOZk
YUf0GOflzhY/zDVymfMaIdSSxMASeWUxVC0wwbFmN6YGFE7z7PX8UNpIafhsEm+4lYbPQ9oTpspF
lHSy/sjYU9zK5h45xF4KQ9hhXXbbAKUbJ/tj6S8OEieF08ZEXlXdNVid4yVQ2/qcCI7BRviktIBO
Fueyc1UZFXIaj3sfPUe60khd8PbM2XrG+lEfrQUItxetOKpogXVulwHhN60D1RoItcjH2XXv7mUP
Sym5bGQv1wKNSTxKu4kgQXpog+NEMYHye9aixTlZKPFyYAFEf9nZRf672JTyhND/+oe0FysNyXhc
Zbn7/ukB8TA8pNo7TRikQtDtt6hjhg1etgYqU+MkrCV/z0j3WsQLBcXjxLVQOPa26kZUbX7fG5Qa
Ot07UMMvs16Ca1mEo17DNTw5MaeEYHVB39w/WcklmvD8ehI3R5Ll39uVgh5QnhM79I/AeGfcD676
AuEr8I0IXgwGaX0oxJ7Em2QmY4JgnUvSoSbkpByqZnmsf+JP3e7Y2DBrBhAyXftNp1KBWZVPJuCj
VNDfzlCfCaEqxvynOFkq2mh7hiI6Y4HrhhiC3BmI+/o9t5e4AF3mFEmO0e5Sp6LrGukKsMtjtEld
fEXTW9z4I4CWwea8edrROVPA7hl8nJ/Yue/8tbf5tpoKe5AJwjoUltJKjsOV+YCaWfUYka6F5aUc
TBC79aiy/3DseA/ywy8kk+lkvDV4PylDIVNUfj8dJ6r7V+Fkdddt5fW9VxvQf8BqmrFD8gXAysNV
i9zCX4Papd+j/YxwKqFrQuiA9lS2alWnfSxG4AcrCIQ8Sci67kI8fO1tEcYRxDh3ca2/Pz1RWzIR
ZIBd6o18P1W5L8eW5QvFvAj7I5tMIfi2VpTLj/9twlSJpGS+WkROYegIF/U6XB5nIiNdGl7ahlS0
e6cIpszPj8A/JVppkYaoVDo0qrrSJnDDHogKpU0De1NFTYd0eNXFlSnqvnEOHT9tHJQpnFRoQ6SQ
M7CDFwh7JEU2DQR+tvJMZm+S51Fdyq+wSUUXBo1weYHcDM+Arb4A6o3zmPI2OwlyGg/QGF+JpNDr
rQbUsChFcDIiLfnEoUOzjdQFhg8hXwstHhxQ4V7EFjERoJw81ES4Ulcyr1sEVt1iP4TO6rrqWVVd
qMDsQqsNW9cTNVX9imTmafyQn9gnGi0b+1VXAM0z0UOyo6BSB53wwx/YTdqkJCUWZ+SwO3LexFMB
XeUoeB7Ohu3XwExANa1ImXa8GXC1+xv8I32Cg16l9UxMsPVoVgqCC8/J3ygg2Ibvw7OyzERzuFy4
l62Fcwwnoob/R6Fi7zdm4flXApkTwPe64HugwnT6h1XOTyRAp/FU6RU5CtOMrQwYjvzgE58l0jyW
iI8/1GKx5JmzgygrFC8FpCrN809Vcm8e7TxJyPid9P5vHZqrwKtmovygfS/gvPS0n9Na8/h3qwfA
U9ZyM+naas/qtBQaPJVapGKLvZBQbWaLfrotJ7nymyFwScslrwQeudGgna3raAhUWwYNcgMwvaf9
d18cy21Gl0lE5GBG0x1ov9i+6aZ/PIrgGAZIUgzaQNeHJleulmcrrVxYWkISCp3MaDs3ZWznPg3r
jsYnP11ffEdhw/wqvHb5re4yg9HDhrFcIAQPDDFTlq4bce5lYnGjGHHt+aDydnfpPPHcMZ927ctB
OfC3/GseJfeNEKCbFtbsAHgRo7hs6Y7HQCEM6Pvj8b/1CtibgRvcpYIFv7zHpq2uoir5dswxfw44
+PhBRh9rBwll/3Xjz/7B9U98+PE4pGfv+7F4cA5yGnl8BHfJn5uIyp9zQg5hJV0EHNmZt2mI0m+s
DugE4cb9yw6KuLhgufa+fMWFAvRIlU2PDDr3oDQWpUviglt63BYMqQjOpMMyQrfFZR0T0f04zVDB
3CRQhJ8XpJa75L0RoX1F4vB/EGkFqT7D88pz9yuCflw1BGmcxn3S1BmqmE7xmhyRxX9h62WprpR8
GiMZzZ1Efez5O2+RyB5pyoifX0QupBwqSaqsSXu3wRjt0OTY8ZPY+aZeBXRfnXm9WCuazzKC3OFK
ZQCUVi2A9OLge68jOPEhSdwyaoOXgGqXNST0UZFLRcicunO4/TPcb6BbSzaR7r5M51UV0spJnV0k
CrZSoXv6fBmlPjJzUcxEnlTK7527yeqie3ZGXcD/rW2OXca//EndhkfxgiYbfO43fg2bNljgsH3I
2pITqWHOByNyChtusTxZk9IbnQbePQI62k07sd5Z1FyJU7j70JrC54YtqDh80SzdwsUuBCO3mwF+
IPFFY8Y3fffNNCSsE4YzyzLVogTHHF550fWFECVsMzMApSHQspvIwpI/07f9N5qsockeeYXW4pgl
+f9ctdyG2eccVzvDOS3IhSpBYbBN9rlSD2Q8x8OAuQW+179POhT4UgGKKsFWwqIql8HfIvSOWELM
uFrUajvhP2VbBf4COz50HEA4TGpTIktnjl6J0wBmzbPsvoC0H9XD1b1U+wsqS3TvXRecBpjHUqti
0ZMk3Zap23tMI62PhQNDEv8AaGxiQ4/NIGWzorlYDrJiviGZfbP4TEyCX4Jn+cVYVKDTakmU5NIq
5dV2KS6vs+uvaFEkz1I2aCL52aQp8u04nmQ9O60E7rxYvltO3M7X3pFcVVjG++NbSHFSwmjC3WTM
xmdjZZ6GWFmCpcZzbz+G/s5C63EIduBQE0iAFxq2DIMiNRAncOcqGh+p2EDNs5SLjRuyyrVLJct2
TDYT+KWZGW72WVLkwJyCV+Sxf2NaD8SwBr9L8jZ3vnB84KRytEC42lbfbvGkAwvdMktC2tU4ZpGC
RXHBxymr6n+aoZ5CNCg7urNwgSXg+UN29UzSTtSvGTXz1KbYLpDx0S8weBctmyLp3R8uYsHqh62C
KFxnF+uiPcUvvVSqBLmI7USE2MMuEjiwDnWUvd6unn6YZF2R0VYaijlwA3Jp5fn9JqZZ3nhQlfli
5ic8AFLj0RlZz3DTl3cmJcyABMEDmzisjmpnNtBPuRJRZFxBtBLELPpqNMDnUbEvgKIX/J8pytXV
o0cRJyuW1/tCORmJlVHbUuqHkbgyTKxvG01EVQQ+7jVrC4/7RbCUHkdagsZD7/cIv2EnPHxFIjbp
DfPV81mfYe2VTCyDRppLXc4kRYNqq/WzzZ1pyw8hnCAegmV3Qtau1zEIGxALv22Kr6LDrOBISeA3
qBnuuiLBCf8MIht0gURjZO0LdxWMX9yE60sbiBpMZ+eTgDKPFSXC9p1DkbNrvwirwzGRR5+Fh6rB
fc56m9BT2uEvXJr3ROOjTT2jOzpSxHuYxur/ftaPKn8ccZXDm2Kbi8JlMjXxdTHjho0zfRc6iI1M
rrSXeNPGv0j3eLs+l7xb/W3Eor/byUTq39PUMR38/rt+cq9opl9n3IlOjZEBIIn5A6ZuugtU+45N
EiwNydImqh9RvgSEtxBB7zotSF76NIlq3l53q9bK74SV2FRwX5nVkbieYVRLmK3va5wqnL1FcFoH
sGqOMmHVNi5JziAzwRbGzbFbIu2TaRVSWF6dGv2jnoqT7YqnFozZ/AUxasSt8cjBkTj4ilc2AJpp
YxD8ij+fzkoOZ2Ks+/lSyQWFXz7FKWNAI3t3CS8y69NC5RB2JJhEPoc8u92tTqLrZpDCQIn8TAx/
t4JAmowxFHOyW93Hbp2s/hVGRddkZUY7BNR26ZZnAOKs3dfI489jDMuzxEZ2T/nCrxuyTkvS5lYX
pi6C7vSMXdvORz+S3KtKfTR8wDG9mJ/9E0NM6bsl3nxdejpnQDjfvcdyzcV/q4Dsl+4DK9+ylMLM
5MHHU1fASnhaJxBAPWUr/mFky/98DK6uda7vM5kmCNftG6swRtg869RREDwjewPg4lsM06EF3E++
Q+HvqP90hGt7ZsiGyEBSvMHFHm3l4/MplYU0uKSW+NPUvSKmZ9PZlNZssrhJFcS3Iqop8BcsWzPJ
J5mDd65HMcCU4W8IrdDUeMbnMeXee+ycKBipxk2Tp8hlc4/mqWMijzvu43qNTp1fOfPoBd38vA1/
tY8hezp39IYK8pWHOuVKUmxl23T27gmXzJ0yDXtELvs94dGwy/BEvv6x/WOhDxnyT0P1Ou597KmL
KjlzY436HnOrLfAryZxx/XsE91DxFOyplfB16t8OYYu8mmBkiXq6F2j0IY9xo4p14MEWX/R/XBgO
HGXFHIkZM8/2+rNOwvAlFm9ke/ffwnk/+R8Jx3cSBfwp5papc8GcVwKMagx5XyDETq4rU1oe3+kF
29aDSTB2PrvOy6CwzI9OEPWPj6B6iTv+EcWGIvw+boS0LWTS7U3EI8Cn4st5sJRMLRnngtlAZQeD
lfU+ecEewxGaa0KmTIm51/EN0u0gXC+W0L/hE+Kv9XrGDkUhP55rt/LPN6HehhOQIIPu7x11jfgk
nm7+cdiXs67o69Ev2hOSYV7e8O/xJrwsXEe9hjm2ArU81kCFVR53kDtIlXT8Wkcnsmj2r3F7M0to
9Hcspvp2GWcmYQQOsN1li2nr1iTFTe43rSI7Agl1+0ep0FMfytJmn1j7MeDxyVN20NWxB6fsgnWW
SVrhQ2JfKbBwuJkeDN79xopS2gCZhkyz0eEwbDQCRTu8AvHbKIY7SLEXTJTjPLR2PjWw1srwahA1
kDbbCjmPbCH6oM08nfH2SBx9xIb6ln7JoKjgnHZd1/6R77L/7kbTfqXdl9HA8ENLMHU7hqy9ggAW
JegsosRsOJHrjVlILwkazz94+InFAECP9xhtZ8EnnF9zMOf5m5Jcb8M/R7tx02HpCMYnrkhBxSuu
ndBO6yhMflqjP0roUQ+UnAUYZDTcF9k/fc0D89ux4fesCnquBWwdTN8OfEzRBir9sElT9VOrUCtK
hFOcLe+UX0ym8Ti9+ZXDbZCzqu+O+Sgb3HSjyk9U3+8kilTPZHFuMWSuqnTbIB3uU+9n6rySsC65
A+ckvsFII4M5QvpWq5SH2uPwKee3CUiEpdlGwQUnGDKG685aVwxcdX0lEhU6aZalMcKPAaVq85jr
XPUXAMQcVJKBNmgfZq76hdOmiwGJhER6dEJ1IVW+dhPLZo1tB9giSkkacOcTcrNaq69ZGmQ1g5sT
grBOXPKg0T2AjnzoK0fLvZkYsQzSzo6dyWtm+7v5TVZPYC990hLynMTmC9VYtT2u6gfRhwwETqDB
+VXTBeql2rDGF7CrQYUsAx4ZEITM/K2ghpBxu91aW0pNFjLXIw2NTckSXeA4sZCH6+RRrFEnxgnY
dZn/BX69tPJKteP5z0MZUsjQvODp1aJQSn2glXywAQSWFtkpPQu3ugnizZPevDrMl2XA1vgH1Xfu
4e+qTV8MIUItGd4f0C4Httdn2jitDovpxqGQw8aLdF3IYO/Z+i1/pYdNEMS1AN98WcecbHTU7c/u
0gVWJdzLUN1w7hrwT1nWVnAFmi4X8n8vrutfOTzu3JGN2kB6F+q125V5yfUzv/yc3EvznN8x2GGY
wp7qUBpri9As3Dn6PBzwM7KJvsprJoX91gaHfqfDC3O2lH2oIQjYnRrwWn9FXcYSceNplYCfgtkl
KenVI7yfY+O1ln+E8yfFuNu2aUxAhRQbKM7OcuOEHap5XPKdYNVYgsTVcHt5q2Hfk4Hcek95hE0u
8+vpwcQGjnqZ9t/ZlvU0DwZ1WJwt31y6LDxndBVTWIlVhru3VsqasNjYAzN1elxLxZfJB995T+KN
p0I02TvARqsZVz9GQyIEix4A57VaLEHOuT8CB+gDE7zOhd8Mk0HHpo77HGgjWuheao7fHxMuhaDz
EMABVaKt2QxOdVHh1MiE2Akqk/EhxcJhepFkVinC68BHeEI4sKF01K9aL/3kCWXXs+Spze+R8IZn
H6WYAqQ7ECjve0x02GHke1C8lKxQjPCubA8A5gKeqYTQ8q6JimsUBwDjVpgsUM96Pkr+6Q8aHFHV
uNwQRVMkhOZpEOIeZV3BuvPTVmfJRmGpbFPqcC6cXVTCR9UkPjCersmIduCf91KfsTR4a/yXULZ+
tNugAVlSoMm2R/uv6RmAVfJ9TWsIMqvlf6EApjid0tTxvyT4OipTyyQyLFg/WkpD4uMVQM8mqXK/
LiBByyXYSfPaqkfge/ZVGqa2/Gq2tQ8NoRktxcdO8ckVsksC9TK11T5f5IpwKzxAR7P2FkAcymY1
ZlmEvH+1QyvBhuT8S9inuSz/YBA5IPimRDZhF22LoZWeFgE2yCxpnLURD0iOiiOtRo8yF3+fhCuC
n/dexyVunnSUGMySLUl6Rr0mBa8mrnMhW3P9/fjyh4OtgiVY72+jwyKFOGgdotktWs0qPE4BaEt1
eALTLrQvmSI49sfFsIjWFhMm+uxIuI6tKiIOzctyE1x1Rx0nkgeGjZSdwuJY0c1x4Usxkgfq6ghg
pkrWj6W9xWnlfm6mn41ZVICdyGo3K0pCzRVmy8E0a3lxLhGBKLbNOGkRg8PnUnSkIoMwHde5uDWY
nloVnlYSVbxZvaRvcT2dcLHUEar/Vo63F96aI7LbcLeZFfiygA81rMgttfPwKFUO0cSlX5yrQxoo
z3rfTYoFMe20GWErhBTYqQDw+GyhwfQleuY5RapiS2muaJ338xexj/0W1UDCFA1nZYkXw+kikhcz
5Q9pJphzO3xMWC35+12vkLdMXKDArGYJeHsgRq8aTh09NXzwg4xunVvtktt14N7aDiQoONwiHsWl
Xj2bP5pzC+ZK42oCopj1HMsDrz8f657V5+4WNE2E60u1RdASPx1MMXtLFr6kGeqvTM/LQtn+juGC
NmRQE0gt6GtoBIBaNKisXTzWj+AT6rg2ppKLicKylOoqAcmOtDDV9xg84pyxa4rYASpSmr5Zaqd/
epkyxIYs4VBVp54LRhHsvWQIYLisIYbFKatp5rcowiyqEvE0x506t4S8WwAO+gFdTpFUjlGVZ9aj
t0eRisEIlpvD0DaXu/ZwmsEeZujTPvkGCopQg7cLH+nXeToMQTYC8HHCU3FmWiGGdH4JOvdPoobT
pW+qRIDthUMiTgng8got1NTR+51KMdNX9xtv+xFzxnaTMU6RVqQGfn+5gSU/SKXNx3LQaQRtwSvZ
/5A3dZJghuQCtghEcNv/okWY+dJjRmmRF9nyyDAnUBfYbbaqAoWKqqlDM3OtFp0H5RClBmBpmz+y
H3+a16boljrz+iJvUDWMjY3B4SdfcVkbsiYj/B7lAlXnWvsrRjWG6rwITBw6/3VyeV6IS5qkWgxg
PWbYkj3o0399Q6WrpzLwHd4wvr0BwwLlMHVZQN2anPqUa/8Uc63rBGzvmgXh94bY0TusJQtbLh70
7KxbsTmfjeTspijfx0r40tw81nZz5c4rVbwTOSHZYmYOkKhNfnF4lZhHBD0uHLI9KkmkZ91Hd1Kj
Cjjw9uBmmDQXEyXxk0NDI0RjDGQ1QwTuKMxNxoYyrCh66FrTD4tBXGuPmZ7B/5WMXhT+Al6Kyqht
xXGGflA0tJ6MZ6FIfOJOaNJD4QzMZG9cWM/ASwxs+T4IKPFQUrHCfHSTRB7P5KXClm0FZ2eK3Z7r
be154HDijBMN3Beyv4YBdFzo3ngcZ/f9QC/rWtDaGE8cJItN/yglun+EQpuI24Wl8/RlttY6fV0O
Z0lxlDjMJo5/GxW/qXJTGTTYdh4yGnRkUl9EFgZv1j9ooYmRnB86ETDydfO77IXXgpBD17y8SBrw
/RfX0WM8P/xLdflzgeIXkAt1OFbjw8vjvdKw93pd4/ib51AzFReiUpzy3x9lsvFNignAuEFcrjDy
dioWyQHg5OzLFn0zLZ2nVLdDy7UKZp+Mf1ueDHQzWrT4njX1IJAqnmqTKtA5hpd48+ShJTjsO6OH
nwQwi1/7SV0MOCxZg8OfzVsJWzA1iHx6g3MvM5L62crfY4M3Nvr6ICylH9klUKMU6TrJSlN90647
13LiNtWYMxI7u6rHR18H/2yQHmPOI7BTFXTsey4ufNSh9nz7fPBc/fAUXK179S9OHb+dDXh5Np8y
bFGM62muMcxvB5KWA+PReJttv9Sk77mta9DILw5Vf5OzsKvkJ9GgzFKu9jrzUi5caRlwZgIlif8c
8SBiMFWwlv+1C3Pj+PWHM15aOkdSsL+ByMH89ltfhVzZ45goxhdk7RQIi4rI4MxCv9jPkoP5aaD7
5l34i1kRq5Uge0IkBRnRCaBbf9VpNC4eUUBXspdnrsm/QvOWCgQjRt6fDXiX89mSfe/5/o9yXGxy
kWW7vYj+RL69ckoi4JdA/V9fO7f8tVI9Hv426f39MbKXul5Vnx6Jd5fsvENEe1ooDCtQgCW+A8rP
duy/iQNDYxjdI3u/hHcsqwpeUL3XtQW/mvDD6ScfsWBuC8xRA7M7XkFGYj2xZKAqsFxhoeCkt6vw
0xm7JI/y62d8faG6aVNMj1Zr6+6OwJf1pJ67qhdNjUruGDxGv7g7kzC/uy1EO8Mj8D6DMRproXeZ
bEUPxQK1TBxlhKHP6J9bbVE8c8GHaNxw1GOIJS7PlFhOvucgIdbOgrh5YOl8VbJJjt/7xjS827eE
j1oc7uZ3GIe6sL8QARgCvXMgaZzT2DnsNvwiY/h3LNXK3mAfYluE12JrLXg0ew87s+qubQMUbngG
RbsOADPUe4lQ0QmNpegHzLrzsnIGSri02A0QUqfPDRoSCFwzBAL28WtXNMZUpGiQav1BcJWz4JVK
V680SWClb3VnXabm6CxdBlWJsGLbE+tl3TwMJZl0Mdt3TBZkspF4DdAz7KDpf0dWba7rq9+2Bbux
bdbmadVjHU3V2TGMS95K7zYPbZOqvpFuXRZun2djnu28RHo24908am3K3dnoqxNbpNHJ3F7MDHwx
/unS2+e227B0BSOXE9TdPywWXPBNxfpKbjOWAbiwCjxDl2fUN9pgiP5ojRuyaI6gMfJ0SNzs/9DZ
p6GUPZW+15bP3g8qLGTi1siEFuUIjsyWDBOsJlxpp/xz9PsQvfaTdlmxbv7hqyWxYyqGiQ35WJJB
CfqX/8Pds1jdPOuGKnaG9fl41dowH8EpXj1xy+M3+VL5BcFkX39UvlSSqH9ttlEbwLy66KDbGIz9
lg56ouMn3+HgQ9dkAGMpwcN+p8+9P5DAIJl+3C4jjPB32cxvCEcrjCOlDcLSS1UJymirZPVwJ5js
tDHTJp/WB8lugZ3raaEKOSPSq//LidxYn6aniPbsdaqqj9REK7iYwlBqpsj3NAjQNCRmunTT1J66
PwBOiB71Q9AjMgjscx5LGmCjavgTcHN4LjzB2jdLjLXvsn9Ld7fm87sHyUT3EEwQ6tgqIp5xQwYg
QEf9LkUcBFs/LuSOlpCDCHyUkWyXduY6fWhJxL/ESLUUq/2u7NoUf8dI6Y21f5NzfU8DLZTovhfm
OZPcKTlQOliekYC4LWhk/u3e3cNpgEA+a7ZpwapLXVPjBqj+43I0AdSWlUZ9LUmJuY7RGUKPIAQH
VezaQa/FHBmzI+QosIA34bKg6cXgQTA/DX8oNAQxj156CWJyTBxLu4hwOoYcv/opchOuc/27ltpw
2NeH2nrIP3RKdPIODeylBKYbyITBqr1Gfh/Z9UcSjqHgIL6zalfdEcfICx3TmUZhC+Page0Ag3yW
Amw9Czwa6C/u2lV6YRSQQM1RllptuYuH0mk1cIl2QvrggqDA4+/vmFJSMY/P3aHCXXu+MJM9u42e
uHOkBm78CPXmnr19P72S8SuDAcL7BzVTODFnbTx/Gdq5SWi0ZwAB/2z5irYuJyRGe7g9dqyxbdMU
LXlE9VrjYyBKCYaP4TS4HkvXepMrx6/nRiTKw2qqGoPRTrgSyEQRMcVguRqJ+Ou2QQeOqAIoKwN0
05KfjhKa/K6gatAt5srsRDEnGg5X/W6AbPKzm9NdBLITKykZqpd66uthgKF3gSjzEviD5cqNxEJ3
iJDazZ3kDOBcePDH9FoMzxlZntb++BzRKeeIr1IAktHgA3P9MSZBrhwIyA5Z295IVeJGEatymAXL
BF6ZjK5yUeHDOQF3vlsDejp6mAc/0u14jegQR8MQfGRo/swMxhkby95pJqE0o4mhhsGG1vvTgiKT
pySXzQufue1GbbPHoVYXJL2volaB6Y6FCAamJMUO9Rl9zoRxdX4DASUsrHA3pr0/AJq9FJ9weFLd
R3kDN/A0Pe3Tk//wVAFGmEIb1VXkoIiS02XE/aPfCvt44Md3+sVQJtw+KtkmYN8Rrg/wphIngQW5
QZNuhtGGYx0QwBau01O3zoU9zVdXXdLa/2+o8rLIHXTNvdBuk+G+adGNaME21hA4M6+jmOOH7/Rk
LWzdXTx2kWlO6WiscYIus8pZU94G6oZ7SWWUq8mTucWLiuVRH5zOka+RNpavJSD8uGjEQz2/kKiL
w65G+cyckkDgnrLplGTp5drKJrBz8e2UGB27TjYhP1vcMNppCM8aFPm7K9u/LENT3hQSiG7ZKzry
IUBHBrnsqsVKGer+JzNWlI8T9A7iug1WbsJDUP3FGGd7CiBt8MbtWWWd6kK6Vyg/1lOHAZWeZEXM
iR6W9uK/0mCwt8bl9KpFy72muJHIgGisyDkD8WPJDa+J4feYeYNX7Kla7loPsGGOE5PkgKRVgGdZ
22xPeZXG97QBeENmAWDHmFbasRDgd8dIpD5gqWMCZSh7H2rNOzf1pQo3paOMvIy67RrmfUTXfEbw
5Ip7CatKDpTPZ/vbLP5e83cRiAdfQfGc3VcjINfdMChqBFIR81BOt4U0AZ1CemMgjkzoWs00oFKz
6ULTwpJgoX8VymBvyi5gDScvDQ1L/0dTi2DSEOYnXdyY/5QjwIwzKUIjVLY05niuTnKo4KKguyiR
3lEZYh37+reE9Jlhp4jG7nM3N9nitFEKrWU9xIT2MhOT1A1pc0IKYhKSFMADDZrzi77TEnhctxTp
XHYDQh1KTcm5B5uKC6XHO3ufm4gSDF8x7BD0yqkIzp1e/1mtXd4c4eQCfMOcaAaD1zey3BpVaBaa
llC5kQCaohsUnn6XAU4SG0mw9Vf1zT6RrkVtjUxn/WGrbQNsG3MPh3qZ+gDJGI0WxR62Djm/2Oze
uHWim1iOeLeezNGWuCyYQwi+/VonDYb4a38uo7Vzi6ptmWGa0u4kb8lwew+RLqWiB4kTq35kH6oW
NrQ0vGZNkOpp09ZBx/gM0URS4jbRk6m3CtRLchkGlAEWABtnJ20eUvOug/dsoE/Ai6XMoBQRmXMC
rh0ZBQYAioSGHRTcfzT0ZJgYLTIlx5Z0IZ8H2yk6MBNLefpyIDDNMGlOWUb3leegUNboDOZeIx8/
szzjx41H2AkzXV0aXkPit0v/0navqzNq2Hv1pRa/6Moqv4wr4hLMbWIDAIwZj4gEa7pmEicz1xpt
yx7ulGvd6zBppqI7pTEiYsNJ/2iWSd9Nakuua4HjxdxtAHBM/6BnY5gOPc8Q6Nxjcx/YLDOxh2Ie
x5V9QkYVIXg2VDxGUN5fzlFyDfy1YEISrzSstMgsmjxXiPxeKdvhdcIHbqcKqM0qpIIE6GX9soch
CJwdxWEWzFd/wkFKadx3lqVee/4Ekgkxe8Ltw9vZuVzoZC12qx6Y2iJ56ME1PgqvZkKk2+gS4FRn
h5KeBN2zOMfqnuR1s53EpCMQgD0wo3OHU+qyREXSntgg0cxy7U8Lh5uTR9nVScarYzxOsrltvRZD
5XR+fE31CqwKKdwj3BjR1UAFo0MQn7TGedfa2v+cr8dQksy3nicJbvlZOZHVscPdChTlYnPHeQi2
QeOo9XYhBRmlM9p6Upv1tR0+UYpnwU9x5ub0a0y7xfS5//pidUsiFvEsg46TXc5Lr2CJjU50+Raz
c4GpCi/ogttGRS+OSIBvZaQqZKpgvc40yXO15eWLjEpcEWryvmNgndHOb+xyr9qBKm/+cggjBM/g
tKAGv9b86JJ4jFlmVQ9fm7O8KgPTfrK2yyoAJ4e3dVzGJFAb+oVugMYMwzes/le0pHzYepZTe9Jm
b2X2vPG8vb2QC9gpWOsylPuy08o08iBcJlcdx1CmFqA4dBcKk+MVCoT17zY8L89nMtL2V3DQbK1k
oIhTzQvB+3hnAA/vZeFevyTH6w2MvhQus16r41/x3XUGSV6tCDO34iOeqYoQ9SYNurBTQkNqBqMz
tC4SZ9x1yI1uI/+BsAMRZZSFbLEExf1s4JmPC3xpAEfShSzMFOT7Wq9XBFeXR5MhKkPPkzL68QRU
rA0ryj9t8O3OQfTg4+WJHssNZ9FCpHcZ1FXboQOwMXZW6aEG0GwFzEq8TdDW21uVtoTSwu2B7Z86
n9zMO/ORR7L+CMw6P4IDuO5kavVDuVl2aiuBs0M8uSBhjpHBrslLimWM6pBIrugcVjAfFubsDhcA
8QhurHCv/5P4fl7vTfDzbmxY34rbpeYF++EaEtO04JATAZYbnaXV+GRth0zeaTEgW01GHcVgz0R5
nsVY3DJtgeQ3Z2mgUdP5wFyCJuZQ7MUIF0gtZgrsNRO5HQcb5GadCV4d5xE6NdzCVCs7a5snlehz
SGt9jFURFc737IOXECVWXud9aRaqUYH1Kd3+DbZrVqqmUjGwYDiU11aYMbrbBbpLKYoPuCo3CUXi
i3IqhRq+yqqDTgx3M7Lr9cPYu4e/elgh9FIQTR+K21WxcTXAfKGNX+OVQfPCCup1ZsEFbRU2uliN
EZVwiFLmnYQRmAnrcVhtiZ1jOaokL5ZJw+2PZtaz6MuGH3Rbwrs2v7V9el3OnMS5/LMIIRUSnpFJ
vrVq995i6eoqYxDDZVUrwfpw/WQhRnFGqoOh/iw3YPB64EWBT5cZztUKlErYs1kzBFe8zmSgBrSt
eO7rVE/KK1TYDmWazC7ef/THo0ROqp8hI8mLNcXr4OyLAyTvAfNOjtmm7nBLj7kJqPeSAPZqOXD7
+pVeF0+CH6f4Spzzj63gv+3PxMxy3hdb05VkoLs/qlUbURNutrUA39Q+f5WQ2rwft4JKiqpZTHZM
azzd2icTi0tOrBVGSMXCeZ3X34PwDCE4n+iZDsqlLFwjOWoCvAh7UPNMFlvRzZlp0D7VuuTDCJsh
bLxE7jequIPCla4EvN8PZS025MKQF1bLWGDjYvNwMZTiVY5dyI0CGhtpEiR16CLmFUZYcl9b06VM
93/F1pbrijc+r8ZGBq7wZs1fZ68DI7naKeHagWPMsdcpirXHYQwYfOrtCAD65TuraT3obn8C2KPP
6UlZg1SBkWVTScLuyh306yXtFrfL9m6oxGmfXVAeL+i1NvZBo9z/OorkE76jgzJbrjKrawQL0HK2
jlIEbtAxVBtnVm57rRaolG+avNoDVs1BqLMCkgAXysGZRmPjY/d15B5PjHoqXpR1E5aN3MkRXzvM
dT+XQXOH2TXN0XTVyS5G366LNVdpwZDfBqYG0FeVVbQ51C6sT44KcPlofkW02C/WKEIb/JBVRtex
EtTMfSgvSQ2TLdETpRyHPdrSnGaBDzRvS+hDy43tov1lbHU1XvIIL5sTzGeRFoiyBbqHYtHxhyeb
F3ec2fy81c0iPpSznJwEdLyOEnj30YfpGHEMJiPHBqnC6LQyA6BrPbRZhHQ5XxdlOU2Jy/764/SO
TsZVgGBWISncaSZ8tMSJAKN+BCvkRoKDzke3KtVfPXDWb37UL32Z47/qjXx2/cOj+8jebWb9rZsI
CfJRhCignlF+PUPcHLYTXVyN9HdPOK6hcBaSSkk7w3OOpJx49bzPhTXRsl59eGJiqXrXieQlfSWF
P44VYIKLTycd24VZ74OGIAbtLkXnq8vLCtKxkjO0fAMY+MRyLmUXthCodAK+gSPTikzsqkqmh3F5
oa0Y7yUOrgbAFPtt8Hst255xb95ptcRlIgDmG2nrX4grNpBZEWvbGZwJdgbJohyiSFjjMgcM+hPd
K300b3FDp7TRYOVfenxk6wu1jjHEql0zmxVFiP4n+MFf+1pe35AvyaGbIAB8ea7n2FWsigluOg2r
SNui6lcZovO/rj4vcjoIN/RbuJaFkIWn23yO5t93JKVZNUXQxigxrAIEMcWZCICV8rJJw8qX8lco
v4bCs39ePDrRgNIqYapm3q6Hp5xCfKZSdSDi/NAj6X7vfVScI0PZ+WprZ2bd3hhsnMiiVb1THtoz
7pljxWD8lZNEntyOItllyFumN0We6CmMCzuzfCQlfCkqGTNtTIQynqlllTw848BSgC3b1uSbneFx
YvBTUKlymiVpqOjOgKxxdleaKg1F5YJuhiEOc+DNzEJEq7xpQ09MJ1ga/uNt4N1J+qPGAFSKLjAR
277y28ya+3/KBznzpAZMSgCNSI7YhEC006Dy1m7aZEEKuW3OP/YjyA98gDoBNub+AI/Uc7MJ+tsI
XiWZqlpYyoqob5vFaP5aDU2z2UEaOg+cKzfi/aSP9rBXldXL8uwocv2AjuKTkOF+uGR0/+k7VozR
Ieu435Wk5GYZ5chXtRd3wHdvFTQc8ZQ1de6Nitv/H4TSPe1bqPsZdN2GpyDG8SzDHgDWl1kRoGxA
9ChoGfHvPtfhlF/DokYmVWCfRfL1PpMVvGyT9jQF0SYkvsv2G2mj+CftCgCQ1fyphAeETmK56Of2
IF6PqVRYvK0rOKIJwnq53rvl3VjvtVvZtK5JipVCEEIpM5cY9poAlM3y5VxQro7bgXl8NvbUVnt5
pUyv1dKoYMCqbfmlzCLfRKfJH27syf4zL12cjMgKEX9xoOAk9FSqtBs90S0mfQzK0vcHbmdpYcU/
cjv1ADl7nu3P8YIaYGM9YTRsFjNw+yieSwuvQiRYGvqFlmC5G9P65eJjtl9tQ5iq8zueqOQc7LHP
mrbcjkfpm3U2ei0UcG5CbXF2QhRkh3teQtVIX5WpWbPdFR8VhAyE1VjNzzgOCDt73+RaauPJRYQj
nwTkwixPExGBv7ig/tupDbFwMxxZvt2msgq+NzqVZJkhtJAH44+aY0ome3G1w33tvraqpLOptf7U
7UxTKIkcyxe/caG5my1e2fhtRRewTmVSJt3g+7Vd9foLtVLRlS/IZfqCmaOhOiMzBCUA+KwkiYvH
S3VHDOFCiMYDyW2xZoKcB0l7qrO4WhbNttX3zIAfGvcHbGmgLxb18RXUHp+hAtg+4D1t+jDoSgoU
6mte+8rZu5cChOwjUi3R4SQh4wpBX12OYt5A1SR4LFTiz48xb2U07s7s3rXy9Pe4KU0VWTNwRPnS
eWhPs76cdy529k9ZulEbSi8wxGCQl81vsELphRaV26GmiCTvUOjHcI8ukC2FCXbYKA4MdmTLmVJc
KDlzPi5UCP+w71ZN50zbJwLwUCpQfKDD5SAKKV9qbr9VNxxkhiII6dtpMcz6bijLhwQ680hQgAMj
oDA7eHFQ6kR4ipH9tVMnStTuQ21aFSJrV0GS698oPtS6Zuyaa3tVuN56GIytWRI2Whacjlv+R5Cs
9rjExd2UNT6+NtYb/lPARhuwzy5dZfPn47NnN5ovSvZQXB3hNgjXouW22IE5snLCE7HvuKYWm+hu
zQD6r+3otf3A74r+3oRvH/UHl24qd0v0d9VgVmgOZZqtXte6j+1Awlwc0lrxcxqswqpyVjJ/bJLF
LNLn6h/xQhV+NJ7ffhWs+9FkoioopmzESPdqoGws48edK97KkFxszj3zdB7r5oCdBoWN92wLluKF
Z8+FRijnhbITVFKzgifbVx3oRAUr44Uxpc0S6bqRm4MKT8BzGKOjxOU1yG/zNOUrR7wV5STsripQ
7coZjbtQG1qSkNepYrgUdsYJqVPOOfx82JwMXYbeOxDmOlf9YxA2ljyG8ifXTTfdR9TsRLIwJ7vX
/BSlhYgGGurIaXGsM3ozApGMCM+B1J5iP+GGr+lGFfay5JiPAi3kcRC1ugBEH5M9mySxqPhKo2fP
XD79cHlR6E9rqNy19saS8xfRFeCjtGN3BmmJS2ajdff1jX+FGpvNAarHYt6tj4Ep8g9QEsmVMytn
XSrC/aUgNL/9OEv+QiGQ8I+hDZ0GOcvNW6FVB/JwH02veYhq1srF3864jwAEUrYrEnP6Gbyd656h
kdJ+x+GuINRbys5BzwizQXaMiMcpI+lJV4NkB1T32Y8Wl+RTr/pV3HZKp06NqqpfWPwZkAm+7C3X
ZWL7uCGjX6VtraH8RHktjG1nQywniaRZSDxq62fEqbqeFg56EqPoThRDWIdLCNSZpQROEiS0q92D
BAJGxqnEEcPvqlfdFIB4WjWvlD4dh+JOcsHin15+aDHuiCMGbl/9CfsMTrZuIP0cj5Xt4DCjlfRB
B7OcBF1VF0Veak6YGYwL+9eLw6xq0OMzoNnus62FjALN8oxw6e0djkoFehQQBzjrhZ1Chw9Lj0Ga
A9KqTq09vJ9If7hBR6zgLE44+FVZBWY81e192biy6nrEYv4lYf567n9pqsiA4Ud4coOdTjel2yhM
9l8TIGsWobbCHL7hpN2Qvs9rPVixFL/Kw8qjMF1tHY0u6hojWoCUyB3rWhZIoXPx3u7el9VmhtUq
7taYfvFA8ydK2XwS4wC5Ry4HU0ydudBK4nPAdpHge2DgjSPF0Ss4gZqQXS8H56FqiJegVK9bqQ+s
nxHhkJqxjJJcHTITjwpyuw1ZuikliCxMtwGvh30MYyaNUEBqy7aQkMr3bKD/i5QgoDINz66hA2sD
N7FSQlovb5kS7t9GqizSU5qzMbxGg6Im/XErC6tMHtwnqiMIKlzjZxCVtFdobhjl5vtCUeG0CH9d
pCR9fDA3G+luAjeQp8UX6VkAW7ULonKuhePwx7Jv1Or8TEYC1nMy/UBaMaRcFL/uEc+M+qrn9dfl
5Zy3rA2SJlrLt5QkgR2SKUxIl3fB9kx0CDgU8UDLaJpHKoOKuIFG1T6WUKVVCPJMdO6CGMAYYsVa
DCru2uha1brDg/6R2sM9tonwVD0w+JdbjDbVes3GtN8oZMrArZ7FdlmaIs5Cx8psZA+A5Rj6p+AA
ZTTGakFmqkoRzReCT0wTbCMPANxQRznGRop2ymP/t7bYZwHspomm1lhoB0SuTZNw+AlML5VTqhFW
4a4t3FV2TrdDPVQcFkdZj4Zx5LxsrmVQKx6aUCGtQdwlTVRuzMxg4i5QciUjISFxIScyDsyaRwkG
eiN9AFahAuYh+9wOQNz+lkHkJEkPbhStu7afU5SYA1fX3bYK4ZmWksPZ77nvtk9zdWBD8wSEh4/v
EaU0JNhS5aq2ETcoLy4H8T3IuVsivpOAqqiHn6jhKjWCEfd4YLPoIeSpuNBEkgVpecZjSmSRJ2Uh
lxG3vtD+WiVqayVcdyWNN5f4etlPzrYzarvHPj0f5GE+1h9JpoJApHnVC4lxrLdzT2rV6Pu3j+7x
SAgLvPyi2fSRciu7SsvWrsdCMa9SEEW9g668oEUtp3CP9wKq3cxwSjQiqf9QG+0EUCvz6tHVQQww
fx6mRYefbGvKl719PWYpg6B9BBQ4zKOG/gV2en+Ucmvvchb7HAfH9Czlh3+DNJye6Jud8t8j8L15
R3AUQ27t7UR/3l00QBQzbaXwTecI8izB6XJdCUYuGt0Hl5REJ78EzSV4+zdDAhyVEF50kfmfQBLa
hZvxicg8BkYDGSJ5mXK/Swp+Pm+q7GLaDZ/JUfdilwBiFcZW7qlnAMh5WGvUPOZMuaTxArAhGLTP
mwYXSgb04NxQptVFjQ4Lku5MJ6rIVN9ixVKebdcp5K7HgvR5mQC/EcysKOWbTFRPRDJpFN7hLpr8
nrklM2jxYJ4Uk/shzG2LypBnRi8TS6h3ONJuNdMN/I4aedDO3vLJzAy6pjLkVLxZceqmkh+IaTdJ
t1xNCiHp/rTBYDEOprF/4KARhS6e+VXrcnQh+Xidg38EvU+lgq3xTTPTlxNHAShRrVkfBbPBDhTD
9zWvNfwTiH/PKTT2iINKSIfH62P9KNphc/MQOtULIEETl8ke/KcfJi8UNdr5zqfrRuOhFVAE4yaZ
+YGlZsjhQIsQqKofrAVPpRigtuBlABKV44IarX2dpWc6Iq6mWIMWGGKecBAoF+0DUVuktXHfBky8
eSie1M5lFGKrzjjvAiw6yWTJYsDosCtDkjDwvmgT0bg/Qcl0a9COD3lhtw1vP8ja/WOz55Tqqpxr
KaTJ4asIDc6SiIMVSKUFp/ytZFfvIZoI4ffmFcMho6ewIFEMTrjT861SbmxUzg/srk1RPXzDwQZ3
EIyzwm1M5AfigDtin6ahvI+qUXivrBuzxrQwJJJAPKAhJ6FPticaWcB572tUCCthN2+k9I9zQK78
EctNVjYKKRNND70o0BoVH8n0ShwYjkz0zYd1xn/aFSBpVjXfY7WIh//5pbktD5L/l5ileEfW7R4s
GEtQnrUywt86GqL6/p4NIp/QC4mKu3H4OFNx31XZ8S00xZk1CEV9Dh9Ae+YckhIzWn0wUqjcY9g6
E7aIxOofbQheCLRDVI+WUqMb1bvNTabWNBaR81xadib/B9vxKBn0H1hMN0Du1RSVY4+yEg6XueeY
+jvrDY8Za32QmN8aR32yEXTdeWVImsbX3eJ8Pr7h87Mjv5w9s896R0/PAdAX2fHdKrBitfPLJ8uQ
vR6N2p+RDwu8Pfx61RDRq+aj4r6GrhiBHcfWgxvIwJAQMhtkp0hnd6KhoRq3LCRyYJb2nGY98MIm
kZCxM0+qZ8sqZk4RxIhENv94up42aXOfP27PylvpsNlEn04BPr55cK2fTseOTnhc2AFfGfXGWdRu
BnA5NdsF9PQx11YHMkGD84GVd5bbbQuHiBzwh27PzifPuUu/sYRrwTUwWT+RA6CJKYJ+3swM8fN8
3wCarpSrJK7WDl5nj+7+B8t5g5pHYJ+kZPajuvj06JQ2MUOV/oElHOQQf52x2ggY61otFKSt/M6o
sneN6OpXCXQpgAci37GsT5tZ3V/0LweFaw+pARkVxhihUJvJqdkTQSRxxsu7Q+aWakpD2N4mbrJJ
nVFGs1LgUz6PNo3eaH1KtX4ZjgXEhb3YgnaEMaZusgnlUnAwWaGahzlx7+wMPnIw+zsObFTuPA5u
6b5DzKhsUCHlpbVP1R7XsVXdkJfQQ4Iw2NkPMn9XXlhEtzpD9MKC+yTTw7qU1lPzMBKQk4c8wV7n
i3nC3QvRvK2CuxXOAI/vsFbcAVh5V87mlQTc3asnhkFWoIFyfefu5GG0Iu5DVv4xnB4d1dh3h4Cs
41ChgVfFXnXGm0k3aidQRxfpGweGlwsl0thAM4KTBealAOXmK/ZnpwqRHTZDSbjqZ+3bxGZd5Cxb
5JwUpvFBUM+dTcTCJKOy9J1eEfY7FevjXw0wbSSpqWKFLspJEWMZvU0brE91nD/1hF2O3+T2oj7w
j75Ljec00x9HdK14IykjmSheIyBybj1pg8K6JfQqY00dtRSawbfGdNtm8xr3lwgOrX3/66Nb299V
/egM92KYTxN03T+Ln11sx1BiP6U/P12Y9DbJjwb0ASMjcWAL1Xh2d2LdOTxUZP0oPeocBp8RwUfW
ndfG+yRriofwu6oHi+ctTy3VkUNb8WGcOuQi2WHFwBXSPEQqOkvEH2/Jw5KwwGVF+j0bbj5g2AUw
LiLACP9qKtt0AdP9E8hlR18x6k5uozVGlo3zcjCknPw6IdlxdEw/YfYotRA/EHQbGl8B6wSMqlMW
a0wUXXnK8/5QF0yOTttYr1KgOKsGCM7ABNqMQc3UFXviVhVyZkh2j1gR+tt3BRwlfzCmGw+VOoUR
NuX+7elN6sJ+5ceLiOsIjhi7r+DBH91d6xqvu4+gzw/MmrUDkHnmOk9qglR5o0MiwiFsnsiKRe6m
gB2GJY3bqZ/QmuzfQe7ryY2tyVlVqSx0hDXW+C7SXokhD7FwiWtR7e+u2wzhixxehAg/kiFU5Ntk
5aNow4nArozNJsaK6yJjwS9PV80mM6iOwCGccOzUkZuD1q942iM3Mr9qj/R7jP0iIOTDbV5Uu0cG
PHxRXDxqx0d2Ws9BNAh+GRSS6dzSJ4q0cTRb43yMQhhHI87gTR2bUaKnaCBHh+A+wSgX/7mFFUdk
LFiJnK3S2flU1aa6EMAq4hc5wlIr2bXgWDQdZeYyvr0VobGjnWJJuZJlY902TbMks1Xcj7SSkQ0U
KqO9RUXtp0E3RvsJjGHxDpxbVX8OAD8mP3eYkmZTl6B7H+xFWajLMHF4LuKQgZArHjtBfxoewXtS
oNaUig8DW575Tf8xoBgdyke3G7rkAoS4eLqsw+Y2MbfhVjNop9NQaSJ1yRjVqLMQH0JdG6ZzjaYR
9kmzKQbjZYJ04vJwLHpFnBf7fc4O0Tnzdm+yM+EDfLeVnhc/LuC2cB7CgwcLLf8pXaoRoJ5/agx4
NSG4MGi9NxJcZHT8FjeF0dDl8gsSPWGf6A59LgSjThPnl6NOZhO6XZEox0qhk70VvSK06nlRYMF2
S9eB6NxapTEMDU55oBnBsJ2eE6z5oZm978ib9su1L+uW+SCaqqz2iM0ZNKTWjfN8OCk4cAhDaQ2O
/mOmrWBxmQMjEIaj8O7J0Iq0T//81WXGCPRVYvMGjVMlsZO1LmgwALjk9lpt2+HOTkUuZ263qQpF
3r92DuIcdMGVhw2cg2ma3nchjFpOubzxNarzMiRkwkaNXnL/aYsgRwGjKO1S/wwx4YrVSzKu9Na/
KLUp0SfsKoP6C6KoFUYPsP5YtMKVmc5GetisLWTVx68dWMH4+UFAdKZanv7u+w7D7r5xA+BVR/Nb
FbqaNfe1sT1rXBS5WPgYCkyOKm1Z8ORZnr6ZeHX6Uaa96a/sHPIykLThyaBUHxq2a1eqIKXXq3zP
Ct08XS64pFSmyKCLEIdI6SWSKIvl2Y8XYGO/I8ZeIUJhXFOQwz/hsJj/k+wx0PPqzQ+uzP9Gv34j
a3f0ykGnLk6nFltiKMfNu8uHbS81DuAMfkySAYR0GOE9HoTnyZMcewpvJBsZVfLU2b76BmKWFv/L
waV20ZGwL1h5GAiXBMCiYub0pYUbORpJDwBITmJpO2uvW0ETTPkO+NJTkfnuWb9JBFQQRp4Tg1Gd
mS0PMIBGKZJE+qtUHzyPRE+rNuD2QEvzwh8iRndCTKYfW37orn4jQDKFOVTtTzXC4w2/kqb87Qas
JlzsPDwHWU5inACzCt8GdKf7f2ripdX21C+Yw+OYeEQr4nMgVbl3pbqWvqUCP3Logt6W8BMu3+Wv
C/MNP2BzB8jhWJJsKOjpuKdfpZIRj0/EmY6Mgoi045sw6TWkTHoBy8r1K8zaCvyiUnS9P5j5sGjj
uB59dlGtTuKlzcS3UrVsoeA7OWIj+D6r32fwJxIFL1bAsq2ak7QCZ7WYHVBs7//NwdquwuZXcp9k
x2NEFDbs0sTgQSpqkqtttkqR65CXW4XoNHlL1WBxtfri0Gg9SGb9nhTjELtaG8PXsjJ5ojHsqyjJ
KQazT7rGlcYjSOPa5eTrCSgvXjqz0bJ81bTQZkGxcOkVO7fdPqf1pRx6mY8B1XdGUsJ9yfSLWGsl
aSCRKkGEv2S9ve5qVry5cfZdUXopWoSmyhRfRAcJAI5+DRiv2FT/r9Bs0VrlzCt6wo8XmDOF6Smv
YpqfxLi2YpVsyssHRhCr0OVxyubVJbRmBbDn+okv7I1yr9sSgRliP2OPfs7ARoWqbP8yq1aiBsKA
HAzQKnLh+CwDoT9+8hIk5AGHZS8VhLuIjoPA/ValYacfaFJlSHBFDVAf/WaTCMeZQ6fxx1PaQ50p
MQ9UyYNmCazddLGCDB/r3P26wxC3i0rJpSXjedJe63nN6AIrNe7eR8PO3K46cNgX90g2HRdGPAIa
SCod/uodro0fkxcrEHkRG9gf6neEXTx8XKxKBsTNzLA4Ej1mij57KES/DZr3IY5PbuTGPLLYNTye
PYRD55QYQlUOlpySRh58t1KnnCb7FNzZESpFgthZvueMmPf4PgfKVACQaayIzlgOSHkRUPztlgKJ
u97YAFBoMLkkLMXaaVtQ2jFyqX76tSmFULrbSzp8Nobjo9+Ye2LjUTfXbiJIUFw8Llu5cXA95WoS
DbSTUZIhCHL19DzbX4YU/G64RYPXVWJaqbi/IfLWyqTKHi5SZutaZuKQQ2Eg8laWHF71SQFoQkkJ
pNzmVMfoxiAlgOvAeXKnyKiqzH4dF8jmtMRzb+/tySt/7Zpg/R0Jo1RBBYufNmPtjmhOTpxHjBfs
AK5225kuOLx0rMJ3d8o9EQOCq+1PMCmvx0FRjOU3e8aylqPf3W98YEoShELejIeRrSWG2J2eU1gI
22Uq9ZjpRJX+eo9yxqO4nBtPVU6BTE2naqn7o/934io4Q/oIxXoyhz+wHIgSiiCBpDY5DsbXLs5m
AtCSI67cpyxGxbVvltyxfuSQf9NqdJmWvc6jK7BwEaPM6tbvHjfoFzTDZnJ3oW8hSp8/wkeNCG06
gFlOyD8a0Am4GT1/fJPE/D6BfCZr4TMPOQRJQ6yJmxrJ+MF217o2AyP6tQGIBxM6+JHyE0vDcyn7
73gDToDQyS2ww7RD9/ihinLxlgykKzLfLdr2bZMgJYzwWcMZXanE8LPfNo0kiv+Lqd+kkaSoW6YO
JmSNADnNDtwBPR6ilq5QtN+6pdUorr6GNtK6gHEe6euup4KOPBI8S616ZWvEWG9XAwYA6/RNbk2F
S869jnGjXhJRBvCHmHnOxO+vk6JJUDDYx1N7G8uBQ8sce7uXgZxr4eEDgCIdCK49FVoK0IynkmI8
l+vKi0jHdegW0DLsoxw3NeaudiJ0NVLHYec7BV/izApRxddOyzY/bDDoAo9I7445KzQzd8/f91Br
ZM0vz8Wx170YtDjzpeTx66pX0T/Nefi3iSjbwPgpKY/LzaojSN4DCagZf2/MlD5LJcrN/IGAM8aW
tqJgKyNcM3brJJGNH7ymcSgY2RcJRHq0nSAiiC+Fq+1x5e8Juih4H6ie3FfmitYmY+zgzmb7PSr8
PctPPl0IKbVwV8z56vRXNhAoV6ngZpWbAwWiA4jzEogGprd/ckpuuNg72dxAu/D7WrxCBQcuG7Io
7Ife0eoHfLTChA5gaD6jmDnXiu1QEZ7RcYV1zHuxFEm8oPye+I0e/rSVLiYYDZXjmxbzNpN0QdIX
ZkHmu1AbXcOZdqyc8iN4vLFuQd57USpPxDTmrHQzBM83+4JL/mjVmKuEOVX8Q8hzV4taCX+98rOo
ZGyO2xbGJOmrobxYKPYUqfItmku29lMO0sy26OKm91a4+Iy47RSMEHJxEF3iSuEGOahv2f/ztGSQ
uxEnMozV8dCSKaCvrYilcpyqkVHo08e1T7To1DRGFhOGef6le8QGGsuDg7LemrQxWvIjf3AGoQIk
Cw+6q8JEwdomp9D1/hmPk93kUFUEUb/frPWbeZUHorT4jrNaxOqOAIGGGQ8ylKCe2XBW8T8ERt5A
S5rpFqUWaAgSQJsQKTLenmY64baluzNUHeqG0zpi0cAq8xKIw7hgppucxOYgYZw318vj+T+aX48P
ryGa6xNEZ1qnNbkgSTl8rEEs7UYEPJj0g7u7N3DTPqzWVINQWCatdCHlTsPh9JOzvEWMZCtyN09l
SBWSM3HnH7RVCmwSjk+cIwgO/ul++SKhyJ5na2l+qGZdc++lYZ1M2YX6+O5CtdHI04ouD8zoeGUA
4xYucA/X796X
`protect end_protected
| apache-2.0 | 9328b13250bb34d8626af7799e9bddb7 | 0.948525 | 1.836164 | false | false | false | false |
jc38x/X38-02FO16 | benchmarks/VHDL_Generado_desde_C++/inputs-30bits_outputs31bits/14-MESA-IA/asap-alap-random/mesaia_alap.vhd | 1 | 7,147 | -- IT Tijuana, NetList-FPGA-Optimizer 0.01 (printed on 2016-05-12.13:54:59)
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.all;
USE IEEE.NUMERIC_STD.all;
ENTITY mesaia_alap_entity IS
PORT (
reset, clk: IN std_logic;
input1, input2, input3, input4, input5, input6, input7, input8, input9, input10, input11, input12, input13, input14, input15, input16, input17, input18, input19, input20, input21, input22, input23, input24, input25, input26, input27, input28, input29, input30, input31, input32, input33, input34, input35, input36, input37, input38, input39, input40, input41, input42, input43, input44, input45, input46, input47, input48: IN unsigned(0 TO 30);
output1, output2, output3, output4: OUT unsigned(0 TO 31));
END mesaia_alap_entity;
ARCHITECTURE mesaia_alap_description OF mesaia_alap_entity IS
SIGNAL current_state : unsigned(0 TO 7) := "00000000";
SHARED VARIABLE register1: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register2: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register3: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register4: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register5: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register6: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register7: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register8: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register9: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register10: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register11: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register12: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register13: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register14: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register15: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register16: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register17: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register18: unsigned(0 TO 31) := "0000000000000000000000000000000";
BEGIN
moore_machine: PROCESS(clk, reset)
BEGIN
IF reset = '0' THEN
current_state <= "00000000";
ELSIF clk = '1' AND clk'event THEN
IF current_state < 4 THEN
current_state <= current_state + 1;
END IF;
END IF;
END PROCESS moore_machine;
operations: PROCESS(current_state)
BEGIN
CASE current_state IS
WHEN "00000001" =>
register1 := input1 + 1;
register2 := input2 * 2;
register3 := input3 + 3;
register4 := input4 * 4;
register5 := input5 + 5;
register6 := input6 * 6;
register7 := input7 + 7;
register8 := input8 * 8;
register9 := input9 + 9;
register10 := input10 * 10;
register11 := input11 + 11;
register12 := input12 * 12;
register13 := input13 + 13;
register14 := input14 * 14;
register15 := input15 + 15;
register16 := input16 * 16;
WHEN "00000010" =>
register1 := register2 + register1;
register2 := input17 * 17;
register3 := register4 + register3;
register4 := input18 * 18;
register5 := register6 + register5;
register6 := input19 * 19;
register7 := register8 + register7;
register8 := input20 * 20;
register9 := register10 + register9;
register10 := input21 * 21;
register11 := register12 + register11;
register12 := input22 * 22;
register13 := register14 + register13;
register14 := input23 * 23;
register15 := register16 + register15;
register16 := input24 * 24;
WHEN "00000011" =>
register1 := register2 + register1;
register2 := register4 + register3;
register3 := input25 + 25;
register4 := input26 * 26;
register5 := register6 + register5;
register6 := register8 + register7;
register7 := input27 + 27;
register8 := input28 * 28;
register9 := register10 + register9;
register10 := register12 + register11;
register11 := input29 + 29;
register12 := input30 * 30;
register13 := register14 + register13;
register14 := register16 + register15;
register15 := input31 + 31;
register16 := input32 * 32;
WHEN "00000100" =>
register1 := ((NOT register1) + 1) XOR register1;
register2 := ((NOT register2) + 1) XOR register2;
register3 := register4 + register3;
register4 := input33 * 37;
register5 := ((NOT register5) + 1) XOR register5;
register6 := ((NOT register6) + 1) XOR register6;
register7 := register8 + register7;
register8 := input34 * 42;
register9 := ((NOT register9) + 1) XOR register9;
register10 := ((NOT register10) + 1) XOR register10;
register11 := register12 + register11;
register12 := input35 * 47;
register13 := ((NOT register13) + 1) XOR register13;
register14 := ((NOT register14) + 1) XOR register14;
register15 := register16 + register15;
register16 := input36 * 52;
register17 := input37 + 53;
register18 := input38 * 54;
WHEN "00000101" =>
register1 := register2 - register1;
register2 := register4 + register3;
register3 := input39 + 55;
register4 := input40 * 56;
register5 := register6 - register5;
register6 := register8 + register7;
register7 := input41 + 57;
register8 := input42 * 58;
register9 := register10 - register9;
register10 := register12 + register11;
register11 := input43 + 59;
register12 := input44 * 60;
register13 := register14 - register13;
register14 := register16 + register15;
register15 := register18 + register17;
register16 := input45 * 61;
WHEN "00000110" =>
register1 := register1 * 63;
register2 := ((NOT register2) + 1) XOR register2;
register3 := register4 + register3;
register4 := input46 * 66;
register5 := register5 * 68;
register6 := ((NOT register6) + 1) XOR register6;
register7 := register8 + register7;
register8 := input47 * 71;
register9 := register9 * 73;
register10 := ((NOT register10) + 1) XOR register10;
register11 := register12 + register11;
register12 := input48 * 76;
register13 := register13 * 78;
register14 := ((NOT register14) + 1) XOR register14;
register15 := register16 + register15;
WHEN "00000111" =>
register1 := register2 + register1;
register2 := register4 + register3;
register3 := register6 + register5;
register4 := register8 + register7;
register5 := register10 + register9;
register6 := register12 + register11;
register7 := register14 + register13;
WHEN "00001000" =>
output1 <= register1(0 TO 14) & register15(0 TO 15);
output2 <= register3(0 TO 14) & register2(0 TO 15);
output3 <= register5(0 TO 14) & register4(0 TO 15);
output4 <= register7(0 TO 14) & register6(0 TO 15);
WHEN OTHERS =>
NULL;
END CASE;
END PROCESS operations;
END mesaia_alap_description; | gpl-3.0 | b40f91e13bb215390932f885f947a464 | 0.684483 | 3.479552 | false | false | false | false |
mkotormus/G3_OrchestraConductorDemo | src/ov7670_marker_tracker_use/ov7670_marker_tracker_use.srcs/sources_1/ipshared/xilinx.com/fifo_generator_v12_0/924f3d25/hdl/ramfifo/wr_status_flags_ss.vhd | 5 | 27,791 | `protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2014"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
kSRtqFeRldJxNwMSmZylQKOWBvPgcswwYwjcaCv++uEtxccD4VmJ9SIrpv+AN+kY1IRh0LbzzvfK
kVLdV0gL7A==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
ln9W15bwsrmxftclpSdCldSXJ0RM7hSOf8Kev576M9X9vVkxA94za0R/4IdNmceYoRENxtDrWruT
1UW/34cyhrTDwoh2zJHA46CoFn08s6bQ6jEQ8ODz51LlZvj7igIlswrKQNgOnMid6nf7Y+Bw9CMw
/Xy4rSckqDwXAPZXmaM=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2014_03", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
jm/xLU7uqDYJHrV0GSI6ndyHJ3oU8O8znzvl01OoyGyCtjZobPpFpxy/NuUCIgdqOHihiUhzHx5y
rgd6ZaRQl5o8x0UPp4epC3M/CasRvTp2DmjhTf8mq2wxKVsNjr+UJhUqEOBgmlXZOWnz3YWfWx57
WmvXYLveUR+8770PQbqJCeh8cln0vNbYr9bBHrB+CyTo4RRc1DcLTk59qMIUZ+wr1pIecQ65G/+u
UHo7mVxOMnpt/L7vHh8FW+Xkb89TkLkprB8eCHOpyJAuTIvMuN8TTM1ix4JbKJ/uRa/yl25Fs7y4
eFoJzKRbYqZZ1vHIiWb02ZLYuXt4ShDCbGR4tg==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
pMXUglZsvdvckG2gYoy06+LM/92JqvSmTr+VyEBnMo7/ATXYi6LkbsVW3XK/6G8RhHxjJdgZP76Q
r8vzm5J19MmXPZNLyEGSecU0YBzI+ZXFm5uk4/bgXWbqHKAUjoacbX5//sRZmwtzGannuiaN2uKp
lVrRo/jDL770TGnhmSA=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
hiLXLA14TYDfWRfBKb1k1x4sBG/sZp0xfVUc3VniU652cSjAs/1oENyUio/6or+5Ka1BhV+F6xYT
F9UEyUEn4IYzPbkUwFUt8EwkM7DquyBGOE2SIQpd4t5zrLBD6tUTlPRlbfHdTw+DyqSeRDDZNcbh
rR8E1Y6p3Jbf2zT4i/5pMAQRtz9/gVhgEioIjAPmubjIy0NNSdycqB/WykZnKJ/y7YS8LA64HQqY
hIazxWwcOxOKM5HGziWn0oQzRH4JAtjYyx+AQvUK5m4gofGqnrkU4MoM2PERQoZvCSuAH7YXCXCw
f7O2To8FnSZSNWLIrXlafuCz12c0f9RONI8KfQ==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 18832)
`protect data_block
Rs36OAy9bUCh/vgldYhH3MraRvbG3jb0ykBiPaadl2PeegQuk10obQ2Z0IJFIddKz1BeZxEhEdCy
bIFCoPsNgBEGgyXbddF8M5r0VJRs7eaSlLClF4IbSAd7PGZJFUPHcKVULjrVT/Am45OdP42IpwQL
a7GHqpuFLBgm9BgQR8RyFMX9AbCspI8D5z1wByl54Il6oobfTDO/Uyj1lwPIe3DDOH8HE/QIuaEU
7lbtbF9qnKmv2KgTYGj7Onj7LavrFtQUgQPWwDVSUxZiSpoRCECSI5sROo1sKjV3q5uFjObwdHlj
7YB5+S0oQE2iAJRK1M3F+NfPNV969aAR/GrzRn2GyuIM5kOKiSvT8N3XidA89E25O+nULt84h3GH
W8c7n5iw9cIC22w/7UfqtkDWKc53TLIqORadTcZCft8Q9j6TirCwRBhkE7+fR8vmFTda+eZUYMRW
4I0fmjLcHUQAhubv+XC+K5duI9GuT57q+zYU1r3xuBvNWF24JWzUdDr5pQSEodjIwtANGvOcPvuq
xR5A8yVh+57VeOBdMkZBLOpzM2xSV2e3t9FFZa9/CqZRniU7URM2fEIOpMrEWQA58d5XgEBP5ocg
D/luYueG7iSVCErjN+MN5CxC0/yE2SlQFUwOBYSYRGiplMJfJYlG/RQ2/IEpof5+xud/KYKrt7gW
n7ploLh5562l+n2zVzKjiSBav/GAiGPII/eaF/4kwjcqHPTzkCEj0N3W1E7QQPBPcSkqHCwOeIu4
do+HWJlmMlT0rJm9OjIS1AKo5OST/MRhW3JSiEbtVDdg54+gf0zjo9BgXofHgXsOBokt+L7kXn0T
aytDjJPeDubUdRzTneDLWGrqJ6IZ51ouB9sMYwF1TWtkOpsbBTYb8F/iEYIrhP+fYmaAMPMsYpRF
6yAbOpFt5vnvegefUUNBDU/P74KsRdE7lBJBFtTWGQxjX0SfPL/kQWCV02OBfUdWsF0MZ2S6eQnI
Z3prlMj9uhd0opozx14a0WsasbvKMqj7h1no6JnkZDTDtTic2Sxk2YQ7yeeD9YlQPxTGc9PVMH5n
Dx1hKpwhKSjs2SqivnzUaP9SQlHGBO0td/tEp9mPQ5RZQ+5PFBZvqwU0g61EgXIh1Mv4ho/JUOHS
BV/LIXZpsQJTq/IjU4DRQfuypT9/71Je9FSs8VauRP71663NXo87bcQepTCEP3GVjvNF9gZ1pdhD
4EPgjeox1+/BuQK0EfZ5Op40Zqg39gPNXvTUjYbTgNl7AOon1yxzP0GdSr9wI7ANPFyUM35ExTrM
ZeG4aSdvRgjGG+/ulnBOjqW2o546Y3HDCW2en/4+wV5Z7zsFiTjfmb7m3wz5RHnSqjpiWdk/hCLL
StpzWaq/Jx5+0x3uMqMNhax5Qg4ip4b+WMddLgXFUIO4a6vdErr2TwLOyQaCLrxPGF3JPKyB30tx
Z5U5xb3I61INXsHKbVx8R9QeTfQo/vi7t3yJSPm5wOTZ68M+0y8pqCM0mvI5Yifk83vsYvLlTiIh
S0hvfI+bTzrB5eQwiljp4RblwvKFOeYY6yR3xxmDp2Ma5T+tOJXquYQgOcg9++ipUTwtVWssYq1+
xmfabV3Ol65xWx+o+pliEJW88V1KGfl0w+Ty0gQvGIOAG/ucTrjUcUSFaMVu8QLpgp/AL+2/O4of
CGxahaCBWNrOT9C4QJeqeZdPK2ziQ8/Qtg+nmQ9EIXdVVcSPJa7Ug7FwSuasHm9K0EQeimNO+mai
RpMHl8BlUqQsn/BohRhtWVjO0K615y+pmELlB1Zh8ujkyChhnaFma7F49T9BGH7Oe2SPcPRsJgoa
Y6iwHX6vuCzEpE3A602cC84h00gDl3gB25R++i/Z3VQWzle/JwqGcf6KAVKehD2bFTGCQqt3/YhV
KrMSfaTXYg933ji57zKi7v7ASeu9cWwgglF9eT0UJYg5A0MxjdkZ/yLRQS4LniJ6cS8j+FOKRw3u
oegfb2+7okPBR+y4x2t9g95bWbOxIm/Ciqwvmt9MKdQZ19AmzxxhrXiH1VPZjjiwMDq9SV+xga97
Q9wc4kp04CpOlbXJhd4Y6N9shA9QyyV2y+2oY+mdeIZdtTJZsME6BDQHwJAMWx0fXNAaawD1BNDD
pATKdKk1O0yLA0RoPNsyYMWCeBtdpC37u4hSATgCS6wKBk936/y8maEWJxfMHaB+0n2wMFe4X3WG
GE7BOJ02It5c2ASMhmEZ3Fi0kK2qQwSxNelI/R/kwR5i5XKVGrSUCnJF+EgJEHg0cTnh6Kv0Lsr7
FlhWRPo8JveMY9RsVowS9v9VFbiG82gYgoeSqoawk0nJgG2t8tKgLoiDMwlwxsvqvZSIoWVtco+Q
g/dbOGfLZmW/eHKuwR6WZV40pOUZCLFfF6N5S/Kt1DadGYhqlZ2ifHLcyZAnc0VlyZ40wqmtyRgl
z7eCog1w2GNqFHIssrGDCFbFE5+8baGgTINv7R75TPS9r0zKKhRDpFh+G7w/SuOrlT8Gn4lqs11s
9Oi5nvQkoNUIHdOJBvwNPxnmcagk0rbIs3HQp2q7MHZoIfUAc8eKXnpruofWOC9aSPR2TMl48LSV
CEt4egu9YxgYqdyEXyCH4yHxBt2UP+VHPj4VRkJ5pLg2JtABam067tu4JLsOCITMKksJ4tEXp0EJ
1UHL2sR5rX6VbW4xCOkkaoDabn3GdL4gMDMZ3u3PAo4+j//D9nuRTIm+hR5DotpTiviFE4SVUIZc
iiNrxW+49MkXOkyvoGlGJVdXYgkJQ1e3+osFQHAn9PEb/UBozWZCElPrptoosaAHuBWaazscNGwZ
NsavtTYFnWDPsixBnMigt5vqlz2L2DZOJoVzP/sd9tofo6s7GW2efo1xLwujVQq9pc+wmn0q1ckS
cNzOGrAydElcy2mkm5WTmGAY+foKSGZboJsDDhlPyeMccT7vEp92rA3JNRbNNYjBDj58zbwLXG7N
H8FhAMQK52DmMfEROedmYqvEFkx5mFzCkFbiTkG/mJdqa9vt/0E3vz+MI0+wFP57MDrSblKe0pdG
6ao2VQBJSWQysVhBZF3n6/DOEpLZ1u47rDhgcIbZQUhB3oniIETtssZAv/1EKqhgcTtMgnPz14+1
cGGNYbFuw80MXQGexbXAjmUV3VxOXU4UL2XopqcXKG0V3ggsqeoMWdbXFFLyLSmPrtt9zMy8H1Gr
sokd8eyjquS9RIgMTlTLmhOceUcnAnPm2avHwV8vYT7Owz87NMm/W8yOXMoFef8oPgZx6SxO1ijJ
T17C0tJRm8tWWmXlrNh43MIV6FRmmJ/DCUPXdEEkKb1kw+ujksDt0SkkkPHAEHQuVHBMOsVvkh9a
VQnYySnz4Ua0h+oN8HQUbI2CW89F3t3LG46ffU0OvBz9MBMLExmZvGlk0kIWoEatYmNmj+eyhUj2
nNwj17YxkENOE82y1I0nwNiBbLlpgTeKLeWmvmiQXP+aNo14s0zRnociQdiSmlRR+bNVcLlSV0aM
QGmXSmxhmcZQoEdb96GurZqw2Kt2GkuO9GGVFMpJV980NmNTbQXsz8mwV/m/0zRNQub33pef7U/n
BcVg8HOLgzX8t7BDDNH9uleFBmsnigSq/851+LSR9MIQnJhGV5hhU0rz1JBTuKDIThjunEaZsYuB
ADmtqwN4xE7VYtPe0H0H9aZE2l8LH19k1uljsLAi4m+v/Ta3nv0ZG+ku/yAFxZ3JWYy7OD3nwfBt
KJrvIUnQu/HWmz+VTrxKMB5ZM/PeculaVQk7cpActgQ5xru5/1IKrHOhXgP8DLBIkI+h3ZhcZ1eI
yxMn+rYkFRqvBImqcE0qIWd5i3CTc8lVYKNCk3Om2RuyOisQ+t9NQ/Ul5aFtE4f7Wo7aOueI3Dj2
BYcyI1cL06XTCFPjodCIv7BfxCRZ9A9CHbnlNHRYs7EBUSifrtZqMknUpBGkyHzX2QlKTWoCgjGP
dxndIIblvqmeQINwaUzZhyyPYso7D2tSKVWHsp1dUTRc+7UBUyxODmg7fVw9Ucl9+VEL1JHgYbwB
LlrY0I4fuL5BwHcFeuQXZi8ooWnYl8BXQiN5NoF4doqneVOdolf2meOlC+AzpVNBiOn9rrnSvIIA
faKnC5mAV0xGdMIMu4JvwyZpEtj1pjZkOhsrqzx6SwQOeJFkrv9iYYwiSSHOuPfvMsPhGMra0NQC
EIV6p53C7BF7rIciocitnUBx+myvVC8lcTvOU1jxxgSOe0jhK1R1Ib0yiCuclDWHSKvRmOW54ETg
bmIKRKgn6qAgsyIX6DRjkiSsNlWSy+HuDzbu+IJEzOPrBanVhimDnZ7UK+stqbA6u5bySYTQLqzt
fbIg474M/yUZtnV4vrmQmvHWJus/zS9ruz5pmV3cup6CsrGn6OPafFNyRw+zt0eQiOKmWcV6h7Y4
M+mYooGCj05bt0KZh+McLdP5nYsm4vYkAHtScJaHLIUF705tN8TNY4BWCsIZBToe/SeXVLT8ynny
7oL8gJeV/AbEkm0VV1YhjoRdQhHZdwcQkvocWQjRYLE2hoN/2MBziHV9E67skZWWXKTiWJ6HEmIF
3ns4GDP6r6zO7rMZI307b8R2nBu9MSQkmZFPSuUhKf7TEIUUdiRsdHaSshgjPHurGGAZSfbfT/er
zq0WXfUCtHOxUo8FNiNHJU0MchN37HOuuFiBNsPZCFXWgAWeTMYONfu9xJO5uxU+DjSnypDHGMbo
plXFIvp3t/fYWXb+gZqjz659Q19ySxj+ATJKn6fgKl8TBSg6SP8+XoVeeHQFNy8XGLxeEvoWrHku
32EJM8IXuCzY/zsob+2i5T0Fi1Trw7cauWPBgadq6GdDSlJsr5FqX15YlLUxyldXR+9GQ8BBF40f
AsLe94MEgkHfHASbPqUlmPWujwDt1GuATxtyzP5pB5uHWVnXJDu+CxABNs9JmHN14Aq3Kw4iyb02
LghhDQjKZZ54a2oCiWSJfquSxPDVuwwPKtrC0zcB1SYZfNUhnEkbRMnxJF5HJYQ9AOdl9Q7SGwuz
nV1UJ7gQtDJviPfkd2L47kZ2WTWDwmUGSMgqAAR2426k7xj/CVj1+yGskVR3sI7qM5PMH7+GFbjy
d1Sy90JjTJy6656sMj5DBu23uX1lZkIkCmEah4TIq3vjAUATV3FlP1mFosdRa7q0ODmgDwpG8YoQ
8tDLr9fq6xCvM5ao4HcZCPZW8zimv7O7ynsL92b0bR/Ig8BRBR4XSNfXRDA85PwuWfTNQVaBjDip
EKzOsNh2UgTyBiWEwaG7goMB5rbea2PxvR2TsRn17wYaDUUt9Gxpxev4sPiKWLoupVVhwDBwvw95
z47YbwK+6UE5cluW7iJ6rjD52o2A6WOqFd/ipbc+4tM8dc46Z4rtTVCg8Tejt3eoSxNlhU2auTlj
pf39YHfTV3klsHvwUTKFRm0iZH2C0KZEUgr10+SaBxFcKZ+/TKqh+F+3wfKbMT0T08mlqfdnXVmU
3C7Y2Aql1qT4pwXlq89qXStg4pT1lNL963O2O7/vLaONFpSpUkSuzUmJHEM7c85YoAsz8aMqdVN9
0Zq0w+5qFoLQE8K/rb90jwNC39ZwPn1FMQ59b7LOWpfA4pC+HeTIRVpWwhL2HjlP0T1o2Gd7f6y5
Or/mkfypD8pekT8eTo+Z9U30Kc2v7z0P4FGq9lQr1scZhk9PGOWFVtIIMupGoIXL0u+tlieP8/Fs
JIsOrA3yC0Pe8P6fcNFODP/ggk/9JLNv1AqMDGPw65iqy1JuIVexrUR4E8k3H6oVQwDhFo54JrfG
T2faz1znlDloDd4Y103iRrkFa5RSs3YjGbWJB+g+gAAj/WI8EFC/q+lJh1nejPJCTwFEnz87lPIy
a5dX9tIO0h1T5GJSCM5SQLqO+wW+oFplJ7/2SPacmOCBYL5lIoukLyU2FfdOiHJoWMR0n5NYgkaH
XOcvSoWwAaQb4Y/Du7oFv9ev3yXruWXEV1/J0bHpv9Nb10cgYdEE7eJEJ/voT7roHMoiNlggctgm
sMdKFuFPLNhuoMxBZjGuCYE15TnI5+6J7R2Q0VEzF1wiapLMwU2ok84NhIismh2pb8QlIftvz8MY
lnqW9aXC3mOn/+i/HM3QnfzU0uq5Vvq3Y0BCJzXHkLunGAf28qt1R9Xc9IlUyYub0OglE7EhSO9D
4oyg8Qb0gMlOJ8pfoS2odV9yPpiCswGC/cAjVFUNrpR4SAsIgW+HvDMWzL8Kikp4n6P0RSByRS/2
vWNPdTay7fEOBfCz7NFjSGiMRMiJPzy/IeqZlj3ho3vb5oaTSdiToEfkUjOVbzeQtFmdLeNrzejV
GBsUVngj7Fv+biQHhOHogm3tMN8dysfzVv471CciG8H8PQqxyoneNh9TaeKx4JT/Kwrg1OdcFudk
qFMpVkluAAs1pcVfszVqhaCnIt0JBuWHuLtYqqmUd4AZaUsQYNijY5JKbwIYhLKgDOB8UcqU6B9z
TBqwcYf3hQsZ+Ikw9GoCpDX6TY+yAeElr7Ih5wN9JNpleqfFMGo4hhBl1lQEO+u3U5eKlr1Q3elE
WUvVDuY/M1nD2IH8ausSYXFhA+VR9bwetx4qXpOcp+U/yg1dYzccG8PSwc5ChQhHlbuLfR8g6f4k
xtBTfoPAsh4NT3yvO/TliUieiHXrrQugqiiF3pcEV73s+E2E2aZZLDRATFHyiFZ9+Koc19Sk9knX
F3eWjuCZiC9qWyEaotwQCM7E4PAOIGwW/g8aaveOps95nVGrDUY2DZdjyhVauDBXhBrAEyPn43od
WYQA8WrL/furSWY2AdBKqmHDJiIE/oWidPoldFaqbyub2dr9pRewjFIYs7bq0tJqalA8FcMpvw6D
WT8xPCPmBSfxIW6yGE3YVKgpp3Z4iWGa9ofqzxUxuOGkUmJtddwGM9QrInXmLXAw3JbluZoPacti
D9ZJYAspdNC31cK72pvfxkwHGmXEtkqSyRRstIESif3PCq3auHjs45pEZJeSteotFU8oclhNzMD0
xqcrqZtEUtH4u9Jhu4UmeMSNgyvGhqj9E7U56a0IRB5XHPGp2kXH6pj3b4NvAaUvd9GXXCi0jHqg
L2W/8xpu+IyRWRXHotp+FzTxy3DKuwoK6Fu8SYqvd20DX6IhdxRS0k2wBLcDIXuM4S+rccu3YDEL
vcM2Kteh3k5zrn+O2CfW024XMhFd5ziZQcSR6yjd5uDZ7EGFd3ILD+RG0SztRAcbP2mkrfBZuT/F
Q8FgMiQwc2A1rDKSPQzz/ztreJmOZnDk6Su6IarIWkjAhmROd16tLwA6sNVypGtAaLfDaEWlFH3j
oOidvHcEf4Yr0VSu9FfBoEbYWSLOg1FeMPgEaEi75U9MpU4EARMYDPP+C1dgUoIa4/Pz/Rq9nBNv
Ufqe6hGpHryKXSUIk4qbiqRojSeEPonH4Y5/bx94zkLtl/90ottg37HlJLHSy6nAtaVmLFC5ZLaa
p6WB8CkGJcVW4RkjYCN9KyE1eM+OY/5Tu9roKx6PompLafAYAk0CPVJx5t34acuvQ2tlpm+FNezz
SN9haQ288CajRY46a5BMRH0lhxKAlpgnlivZBJL5Qyw+Xuw5C5Wm/hE1z57/QBNfdR8OFvwG8L7n
PeIGEltcY61U7G1BCfjpxc0569h8WEwomZOSnRgSP33BQ7al6GuW5n1++P6VPAK/v7i8mlNgmtYd
FD534X1ljg4JSGk4iHZaE70C045K+2O0V1Wg5u7ePjpseFv2l8ptWj+66/YhZx9n1qM2QRSoBLpO
ekbECg5hKI+tn2odMsONe7QEvrQTE7WHTwn2jg3gUUVGOgHgRdzme4APgRLhmt1SNUU16wvvtjcF
cfOTjMv5B3TWrd2RYkE7TlpAUqUy2RyLE/q8q2tev0Fk7VrZfasUPIG2FDJYQquWH7WfXqtENj1u
hx9hehTZ4o823C+fmwawO70sh74ruHgmZHE+qN2OVQUtJqbG2rVF1h8+tpXy6ETg0y5jkoSr5iJG
tIGnTWYDAFin9U9q9x6wVvFvGzoPcdc9XCLg2dqFv42FzhFbiRJK9NrY3BE7EgRBl3RGW/FV6b7R
ebNM7XRIHRf0vvnXIRL8RThbZJAx/RhgcNVzTW7tK29nrzeo5Vi3fUNZu/Ql7jvmWCul9HMrsQfw
cLeumQXGIRdUnLJDmaMhUSZnjXlPJk1O41ko+d+ZnZCU0otlDrDtf000E8/oNdHdj489X/yNubh3
k8WwiQFD8fVgsVRP/cfK/GTQ2V/q7LKCwtoVAJg/yFdCuD+uZT5NJnCfEJIPrFnvP3AkDA4TcTzo
N0lFHTWCVuzYQDE8suy+5zsYlGa+lx5giecov/pQo/3ew0VzQc9xmScErwbSIVt487D/6VafWROE
29EBLeR2aM1mrx986P6R+JaiVyAIlCwEhl3mltBhHcQAnD+ywilmCrL2fE88xqX3SsXbZYfmd63Y
SNvi3+gRG2/7ZpmCLox9x/n3GxI+d67cwS1FPdrSfVZv4G8ZrJXE5yGrvQotcvVV1DlqZOXj4Nq5
nFfbFhKSVDFLb8p2xy9RizqT/0h9N8W8sSNb116GTJocWwF1cCbaX6AqqDO+ik//gm7pfIeIKBz2
N0bbT2E9tBUEP5qbuDo2U6sjdBYISDrSFKckL7IrJcTLYydzC1FQXgfnzycAS6h7CTWqqiJpCehU
rtPIg+1/EH4gubWYz5j5CiAutwWePIj5BA0CS1T33jQEnHXRWricegdP1FGogOmGtbvBFGRqF4TU
XiOwnkfvJqyyf3V6/tDVCyYvoE4YJKqpYhPFl7tw91CyujI6OP3xbOxRDUgGopNYzLfLYRR0+0qm
aazsQQ0e3zhne6NzSxe4vBvCsMOdnzZbtm4gOObV4vV9iYCZUP+OS8ML5fQzWqkSq1abv3gtep0i
cZ301s5628Yz41u/w74OhIdHJnu7MAeVyj2P7up5vM06C24CMggtL+Mcur2CmjmFuEsa3mbCQUaG
F4bDG2inIcX8pDmvWoHTFjhoOtjde52pQncDY1qqOp1X0jzcoK7vuXLKzvedJUHGv86AJBTKl04B
oXToj/4aLTR9xTT4/JKsurSkd/vEVBx4il6zTTDip0Uc3CuiBG4wRXn4IpT+y8GTZpR7sCJevPgz
IesR2ZE0DjB4D8/aOEQQ3n6gXsAX7i36zoCtWRmAJMN46rPtalgoQBLOIDyajHGSMp4GKUfvF0un
XNzTiNIAGJItVPkSVn/FKQYZkSPsXwkYZI4u911aEZ8qjpp2bzs+XZD78e0fvdlyf9625XA4FQKq
6Qf6u2AaaIGixJd29xl587nE/tw3RyKBoQCxKqYBHlDawyIQf8oD8jfmBhHdhZuX+ltrUPW6aqpc
7SMiNoY7vKpF5YKBTorXWb7bVO6qUbkrCmPpj3xwMAMRuc7x+aRC1HIbDi60CsflrrmIqMcxNe/t
u1L80IBs3GoHrvExC0RKwX9xYHkD9v43RGwLYlFo5lWjWg8sR5bMhPz+Yfghu1gwWPsnmvLzeiJQ
wwhLkxcYKGvgGDi1ksVDeVlqN0kg3jDCVeLtubjKwZmclodl/A6NotWE7eWIEiEgsS8JMR0jnkXz
G/+Os3RMRRpFSs0vIsM4zSrcdUcabxlqOwiA8GPYzUOK876LtZ+vaG1+Ew/+zQMUJC9zhyasu7SV
sKpiXYQz64sUOONKehdVd4oMFM22Ifp8w9DMfSP1QmKV6FyTPBvmB7A69CyVoUVmEAxBg0SoUJIs
9tuzotqRxZSzojASj8nkRUH58rN/fudcl3dGV8z2qr9s1InXAZj/OhcJxh9QEC2hbRr3CDsKPeC0
O8PnfA2EnK2aHibF0e0cQuYIAWvoEN7U7KoNRfw7Op+W/qP5hFNqHZWwdoFMFekRn1VzSXccDuFq
6Whysn0zK4+D5eEMZuOOsqeGO7JIB+iUI0W0t1hwUXI898KSaGLtwZYVUqwrnrAE0YEOwRP/2DiM
yVpAtMpyMFWNevWUCW7D7rW30xmzz3k+zhBIFmkVWI7JKuAhFREwODaj1tghp/sRW9sHDQmnOQgs
7ZSg2aI4bBYNTkMkz8ieH6vtF3jV3xtzl56Ra1rzQL9U4dBzFyYPV8Gpf4tncLZymSM21fer/DAc
PdlL6HweShxgGldKkrs5OfF0OdpSIRSWG4yqI6TIMxeyQhyo7SfwEmDkzXHA9dkFe4F1YllqiCuL
d22pq9oXrroR+xlNamks+D6UCtKrFBjaelLZxofb72hL+9XlUeucNCkApr18kUWj3OcKl2o6uWQj
DCUhsAvgL1K1PDCknqgakcvDOvnU4cqpE8Rp+gAFOjASMnxqqWnNew4WZWQiLpV7CQVB4LYQeOKA
bVeeUh7/E23c4pqjHnzIG4d9irPMxD8IF6lPgQQUgHjmY9RcnPFx5SyAdsz6dVuki5n41LBL7nRd
R/M5Zlmlkb4dRksUAq0kBHXT1CKKK2RQKaXmVQiXgWhEqNx2HfAl/T/t7ERWgLXhTr379FNf4iMn
EAt/LvwuiCtXSSN9D07nPFAYbmXmPoZjtdfMK3xdd0DMS2nMT2YBIv20eA3KnB/kjfNrSLUy6cTG
YtuMOcjrq0JNY14Prp/GYO7SSFPB/ryJgig56N7MBefms4ZG/32B3Yy75zlXsjI15dmCpxeQfq+t
rmaqCYFKji16nSIzj6+8UKfhJXPGriwGa0l3KwptkhBpvg0UCGP5QYD5/bEDBWpeeRwSEuhxsBTt
cnhAmypvXSjbpWtv9rlOtFrLmOvU4TZTmHyF8l6bMKI+gzb/ysQuenCi6HYIU8dPIlwLkKta3hIu
psOo/+QLOVcLVyMcinuaBOULAMoAOUnkl/EhWPFFCb4Yhk14XepakFDwug9msghffWburxeZ2XjX
Eio9fPo11ia42QxPBYJWzExiMxRgBCYw2uKWDXdRjCkNu//kx/v+JRaycGd07/qwiYskVkyFgC9y
UGvivLGfNpDKxCxX2l2FpdUDmLJ20AQTD12krCar8OxOCTQ6obifgL2m1VCeJ8ZoSCPJKAsDIFE8
lm54UeUV381/68zQjjlZoU1qV4/bp3iX2uapuXi4HHRczSigaOr+Ze8k/EbX4n6+fLn0m08IV7kK
umU59UalcKQne349vqEU28c+1N0ckh9B60SVXoJXKVDXAKVFi8Z//NIRL0Td1t0Z1Q8oVUTIuLfm
vlKX3pthHRSGMmtnCDTBwUL7+HLiY6wOn5/3+QoIc9hkWmvtEcF2aiNeeLpedPavDO5ao9fGMjAc
CbmFtJVV2td4pmt6ariVhrGswLoSuB/z2p16Y0weF55yeubQSN8t5iUVplmfl6GwRiva3DvuOSue
kkyqj0soi3U7DmEs9o+lSXTFLSXuruihsSlLTSGugYDg2ZYBWEN/+LAfifa2WLbp6S5C4dKYmagt
i0VOFfdcGXN/fjcG/2HIEzqojvUxr0gUN+8ybWlT1IzK2XTHbGw5M9NHndzy5UqNRf3KsJfNMOdI
j8/AfjcEu9bXq1HJTTwPbI9dOSMCJ+U/tTBRJnhTmGEh7RZroA5DH0G9JJFzOtIaad6IUmCLQSr9
GY/WE0cZol+4sjeTCmEnkxV9af/c51s0qVG6yDWFlFQN0mO09Fy7xOOtBjZNAfKVYscacXJDJMWh
f0KBbl5LTi6tcj69ZfVjjeeykdoWzVJ+R6BbKGzzFTT5ymJ2jhmbV73s/UKZhW8urotqRZEJNyz5
8lW9aEYvwuSUmMb+Bppu/66MtJUAB7/Eyk6NSLHqtpUp5IYz8F2EnLFX8sxNN2vrB10Zb2Wyvxel
G6iCIrJRT2q8cYYhKeMpwvJAwKhMtu+gI6FJtYsN/SkfNENId1vKRkCxDdyDLQlOvTuKRUYntlmL
HnPjhHokGDesAXIyLab4x6y3AfL1Jv6tqRBMbQgmL1PoKsHeyJHPMGEO+O09e3rddlvQ1moGW1lN
87WZJbGhULz0E9GTGLhRc54cQ/N94jUOXoZ2gb7BwX2w+cMjqBmfXJtgB5/SJkSg9I/Wv4q6rkB+
WVtzVrpYCwM03nbxSxtX3lrtA3tjp1pKsqCAXBJxKLG5FzvB5UdYvuheplz2/+ubH17jMpEayhCf
Fb6Iq7BNCnehVYQJ2wOkwLzMcVJ6pdm1IUmnPX1LsDEyGYxdZccwNa6ECwlGGuQvFTwQ5u8VvNq5
tDKM5KIlvrdvuEXKdNuaIvbeB1xruRA9hYNwbLK/ZB+4LBi7IJBFr/LAVgdbzqvTVOs4lEyJKSFq
k7WWEPx7CzMZE449kXKuxKFFjs52U/yKDUQgDCP/T0yJonr3G7vyj8pKaz7bJNT7Sxzb8NVGKs41
xHR86eo9A4AuYPjx63pQCJrJALDWnpNnR/RNc7udihMofbc7Yrrbw7Keyxq41OS5XMMHc2l66Shd
+ICg9P1iErdDi0PglBzX4orh5rHZNRL7ss0/XpibBl8ewGFeZGbjZa7wofwW3MaTpyGPCfVb2qEj
d+tsgJnf5Qc3MRirf7xQXFR1Ut7/ysUnKwwY6cY2j10Qzo37imjKPdGdxkuj4I84Kk72JykbCcK4
uWRaCtebvlWsFQpYbvqEEdCFNPy57K5teweORimgXpPFNbrGc0akT8cPCQLywLH6dWlit7rntIjn
Je3UQ/ZfTmUobBwgEskHTnyvWWqrr9Do2ngWETeBA/7h3JsqfS+XVNzqfUgC/Q/sjlTUS/upx66y
ZohgWLgUby8x856kpY7mbrAdQkcgKAb7yBmM0ROoufhGp9nv8yIU3drSigFDhWuyPfXREiimQsGY
Ih4FY6VP+eP84GWiqslf0mZ4NIB0+ZHjDnyw0k+tLbxH1EGMaQpKOeB6KIQfvTAELvEfhMn+uK2d
lcUgq1OzXIE0hKkyJptX64E9GK029RoDNp5eZmzTcXGeWZbaqjoC+66Z2CdqIr0HWuCflxeD5qpy
lltFNnHTWAb4ap5YMWITmoCG+So42gg38Iqe11Be+NgyoLGnD8YdW2qU3UslPr72kk7VRPE0nVho
69fw/g4g7jtBqdeIsKCzRTZvyYMwL5XCyWU+gndTN/KAMdALRhv9xaR1hPiLGQVEqpsqqoFjNs2Y
PS/pGOxer2GIu7QxRJ6YhZU2Di7TOcJPixcHYuI/Vx7zK0wJi+hDDDjGwNyFkXcJI7+500ukZ1F3
TwUi/FadEMrLrZVX76K0pt60lqvapIGF33pQW/Zn6bQrCatxv8XjjTBYKhuKDALkRx/qlZB1zGOZ
1vUMbWtfY62IEkWtPl5hak9eV+2ZLBJo4igOPqbF1UTG0TL+rgFOlfNGmpf/LNC6iTYcrWOWaXLj
K+IzMc8E0U6ItEiX+ATp4vXJl4Z6rw4QDGI4UD6Dc2+ioa8PV8xgPFqI5Q6WmMOlPp6CQb8ob6kw
dJ7jjAdqYZ2imjwrUlZd9gBfEOHU8yCy9sWwPW3VavbsRp07CuDezEMm3k4NcsamaoFQCpE1GCBO
xHZeq9icw0RwtZUJv6n8a6rQy0ERA/zIcLxmm16U3WZ5teksXwZziwyHO+HJw4t86WY8/h7JmnB6
+FJlnkbmJzOv0ftotRrBeCU/MCpGCGeXXj3shSGXFqL/ult5pLwPGIxksJOQOla1iYpOzxe9qKhG
gayoXxpPN+s4AG/3dxNqeoq1+t0fbjc5+f7dcNSrdLxvsSWRRIp9+jnmCXUAd96dMVp7kkw4f2ti
tBXHtaF2KMhz9K4vKE8QNgwyrgFZEKz5wBnnOKiAsYTF79pOQVHTdouWSPMVBwWTyQtC4qIeC64/
vu3tTUkHB7e8z46hg7Fe45txVi1u04Qxk+ZcEgvnvHJtwklwVRBTpCXkuOZTPIiSkFhWugIGoMTJ
44UW70SaMhd3BpSDOtYcuA2j1trZ+JemIXVpIBh3h/RmOMNzsNvTNcewHNnLeYzxTr3YiVM8cxM1
INYaTM0wk1qCOaiJcYrQSMHXiv/x0rlTZrIsfXFXe4XOSmmflpBZvpPX2xj3v+HB9ooXQl2GcGCW
pIKtnLKweidPqKdi8Vque3LBt3/nakxfQo6hsWemtpw2CpPvhCChklpveI/60ZdCED4ZFjdggq6w
Pi7/6sGt4/oda40N2awj9suksVxWZomDqoSDrTS3H80TzkyHoiMkBvLZWSErInWnZHcXqofRGcX8
h/ItW5AAbXYtBvck0pddx7bgxTof4u35bCggDsCrXKpdEJPTc2Em/GER1cwmK9FlOZcdclu8vUdE
xHrtpL6MRQfW2f6tJgtrBdNe25TJG4HIC+UonCgZPNs/3D+H1uuOtoO2ySNeaTg3rHSUHqkgWFjf
7qh9LGtUTGmk3QO2W8CeiYWFnpfcCIvCAu2NEOQFJT6AEIx8nUTv2SETF7YGtukCe6KbFpAbSbOh
RvOD6uRT0hkDubEjt6Bqbk6BuDpjoZ99VySX9Hj/RBVE6xxZfuzC4hANpCqIU7fH2oseWP2Lffb4
lSy8yg6Opfkc9WeCB8KJ5dY7zg6z7/soBDxYNOf7PAMbOIe22a4mpbjvFd+dcwiMoA/dwEC+EbJT
gAuIdFHlXKUNMx2luhNs4mSXpGgBCt6SVTDNcd6NLfRVs3gsQrl/9EyqNkcVivErOXoRn8rd3Sh7
aSpj3B3GnchyA2PsaOGPueIPP1skoviNzku7kjDB8S/qxCKwJ/CpDhKKEh86tlBy5/3CxlI+8gDB
iWsPE+fPrXvJCVgPBFdwE9X7c56qxTtn8Q65Y98O7KLOtbT15qfg1BBFeus8M70LRY9EU1slKHah
MZvxDEngGF/DTShkAn02TmbsVeqQ/2T3a0argcx00ZJCbvZIW9mywI8v76L0kc8e2zhr7VSQy/o2
lF9rN3TxZuqp1zJarFRPFQVuDEmdzDZ9QoMdhWL17u3CI6iBtDA6o9ix7eL2UG+/wfFWFyVHdh4L
6IviAEPOu7J6Jrex9p6Sgv8+vm8hg1HBw7CRHmnCTJrTexmddQTJzRHeO2cK7OPNw3W98J7/ToZs
pPzIh6k/p7qDzNonEbTb2y28lzDvrfYAGuboyYhMJDUaisu3MsIj/8Z+oovQVLHfOGRlbBToBi4y
fVMjzUcsLqJ2xl20faHdtIjHacCm9DlgwdADDouxhEH2MmCpQth9l/JhnZ6CoyZoWPHIy6WZRUXO
WbiTv1VAa0ivQM0J8sJTTaRWTCmvGAr3w/Poc16gcyPnTK0JcqSgILwlOaSFG1mL1KxabmEWgn99
ZyBrpBzIjGdfHqdesmSH/PjzA/OBQDaPolRk6tlyd8zrPQ5FzbS3QRC0leyqIKUjdYyCi9P9npTl
XdeDbtdkoK+iORVo9F6Gxp52jRNlxaN4jVjWwS663qHBK5tBLggqVMc4l8U/OCswaVeA0KpVVCGG
XpoJSHXrQs+vmrYuWl2i36xFmoPcszkZ8LWAhnnB5VE07J/LBTTJujYr+95zrm4MVlySYxCuxcBo
7vTmRBahopUoP5TDk5CHJU8XJ6PYwZc8w9qEBSJvdAvTH37JeWVDAQSXAQJDVNJoD/4tr4Q1g8fn
NXjrMRdOtHHnaem+JRQbUlt4qXzpVf0IAI/mAuVWio6EsmZiaorwcMdfeNQXQGHTsFgZq5t4RRb5
uWq/wPjCKXRJr6Uf0tA5hUmS9bxsIOVJ35DQ0o0VBZGA+Eyg5X+xFkVabIO0Zp2ZJ4lIyn5Pa/5t
afeXQtqhAKe3vP9c3lOtofOyuNiYUBa4bz2fbGIKsupJaX9b1gtNP6lyKDbGCClBKT5/3SQf9qSZ
VM3xj3u16iVck7hwGZa4mfv0TIZAny+pgpMLTUIlBcaWyrwGasIcgnt0vRO70yUd1Y06CiGqeLjJ
GEKg5fqLldJhbtvW7+1PNTJdUQCQD1SJtPWxI9FAdXO6y0YyGd0xrO8FBTbG0DcfbgW0r7Q+M59E
+2LzvszXoi4+JJMKkdtZkHtmXhWJYQZWACtOv2mM3HNM93f7RFAsQO5C8ncXcNkCEk2P5DNDcmIT
PbfPWNhMnFuO4XkdNSmFF8iWDV92WEdbb3yFv1YEyvl5pTRLVzTsn4awe64hgdGWiDiIsTnoNegA
zDqP8ZjNV9KXhbqefGwp7Y0ZKcS5Th8BVaIYW0OuAGWVZdfJiBufL9bmLF9QE1tpOU+IXIZziIhJ
F1I7x3bAvJz5IsGKOJqZylYOOPo06a5MVed96hPawhKa1lnJTSVTN7mHT6G0q4/a8W1BADj+ZYpJ
kUbPY4NvTDiKLddITY2EDjvq1uolTiE7Z7/U9ekdWba2mpdxMkyF2IObkBOcYr1+JvH6Q9b7fI/u
l54xx7vyUBOj89afwXajXGO5aJUyvmYyMVk+PmD0FIkWcvGn9Jg4E4u2inEBnV0uQkXSABPUD6Fd
YfSJ7kalrdi9yZFDG4Wcv2y4UBvXnyQIuCWuCA12FTRq4ezv4HVzZEQBcLYk6BhECtagJn4lxhya
CGHTZmEU7AymWRPB7V8YMkC2y/GurWrnovIZwjquYEwjDayncVHJr8y+H2EbsJxiqAY3U0Wjxz2U
n6c+4y/iW7a6R8Tt3MCD0/+h0kfCHjCHpAC1bqgiFoeNn4hkUBZuuaJ9hKhxqiuj2xU2I5iunWSE
ktJ/gBxzydPRb/NzBDpkoC3cZFEjLNGwhKv+TujnBW7rLPXKnhroHSe2WcmZmmuAO4W3FNR+/ZGM
R7marmM+ajC/FLNW0U6iuSk6ggwetuTjmEe/AMPeaF56tGwAfFDnEnBOPvgSMoCZhSa3pHU5z1NQ
DW4/hdSiwSIp2+ekKrg4IMLoKIXE5gXD2mdVnSI/50/z0X6ALbbRZwg6yRo3nctxi90c/DnKmHkc
hX4VoVNTGXQgxa1mH4J835DTDcWdWfBrSs7D2iZWR0UDBZsURT3SHDNK5r8HVcZHBlRgpEjGln1M
DOwrqvEX2ZmtJ8CoWYq6wDYwxdFjnxz+yxKm9HpvoVv1G6+pRIq+HB4wQU8b4vwWUUZwPbT7bNCt
pHVIePTYF/tYW8Cpn4nrqzcbCU9IszGC+mtAOXzcej6ufNYWIC11Lw6SDx6lNmsYm5BdkFm9o7dC
0DIjeezVPN9/DEfGD2v5mpJP6qV7DsTI5P+cD3ul6UN3PG4qFP6xR80jm7eBuwPJWfNFhYhlFrhE
JylfRlKk8hRwgtIBJIZokt0m91un9e5hOOVxj3XQBylbILrsYZewRCZCRdBZT/TCg3J7NFdYfmrL
mu8vXp1S8gZWoT8N9hk0gKkcvXNoNmEsZylczZjv67bN1DaBbbGqjjLGbnrQ3cltr1MgVNQvIG6O
aLDqBbt4bFR7Nw1WyGUCMragvL+6KKHANzNbzU2DjeY6TD0ZIm+yV6Fw257lN18XShHRe5zwh8Uk
1MZ/H7evJouYAoEPoEHriDoS2f6LORBx7IbWWyApJol86nyfXi3x4mRKTxACShLFaasoWibky98e
LeMdoly6t6VBasvpPD05Rcj3GEnT/XbQpC2LgdsQpr4OTYBtOVc/TSdcQe17lGTP+fG5kip3Je/A
HFjmTGwNwUuY+qvhI5pnqCcJ/pQyb/1/6+mp/y7klvYMvQ620SuYCTWqOTUp5UjQPgcyW/lvj++g
IY8skOlYRNHZ+4gMpNW3lH6IxcyV+lbRp4zKnU/WnfYak14ezNy6WTP14LqJiRo/Nbs/BYvYDhaQ
7zOfv25XaIPl3nC5oLmHgVzJrDTUt2B1U5EJXg7CiBWL97dNDYAEnHkhBszSJcKhljZqChimqczc
HNpQTuaalXh1Lext/0Klc0OPK48eoS8ecN7LtksLLKoQOVF6WJKZ7luCF7PrRSVq5ilhaJEHBqz4
Y/LdxBi5VVZOaNtMHdicsnI7xSudi/Ub+oH2+vKmmju7RGXf1HH/CgtmstGUyHNTBSaXZqyDP+MS
iXZa17CaR5xx6IWOx26P6jVTIsi2MdaBtdcKx2OyZOjwKVJjgP0HracQsjK9oKSOEqeTEA2nzOcG
dXdtq22nsQJhxUOhpaQANnJn/F00kJRZ6Rj+6WA8BPdpoBD3I8QURFrv8htq0MlGRi1ejIJvdRpI
y+yQBEbZa7cSuPtLAZoI4S/ADyU4PP6MCFiwQQ/G89VhZp2JmIxZbPDW/CXx1bv+EM5r3jDItVbp
H6mUYYDJoOmMgIXFiMLqRYGB6rR1RXumzYTlFWcu4AweDlS0fGgXlNXhc6oUNT+lz7f9trMZPe1O
+/za5gPqd0aJNLlML3adE3lzbcJkGFkEBeWa25KsqNDD0zcS2hWGS8pH4OFo5zpwh91bHpQh/WbE
eMis/ebIFbu/mOFpQXUo/y9aZj7owjWcS3i3SolrSzJi2IeeW+Fi5tRPGgSqt1vbjVYEAD968kd4
Yn7UE+Lx3OP18Xn0QeEA8yRBXVeBRchWbPxsug6x4XIKv3zQpeqasFLPq71mtOw+OnWyGY6EKvww
wuitjK0z3zdffVawWybfHA34Aftr5AzX/uqeQXGV3VyhKPQ2OudH7jyipMMv6+RWaL+wKc+O7Yof
FvriCg1Gau3OazGKz+wZ25wH+rFAvT5akYATlLop2xcSlDCu+s8wXvK7YZFq52fpi5yksBmCC+Ma
QhdMndMpcA93X96C7ldRIcdzCeNYrtI3uPrT7l2ByXDA0S5JwtM0J2RXTOdzC7mkUBzvGBjzyc8C
DymX2miS9lQkFz0kZCauoMZYL/AsQUEcdt1J3dJ+gn4pcJNNXP+dmX4H0Ds0YBjIdX3/uK+6ojMu
E2Z6QOcKLMDmvayjODVSNLtFiR+GM7d2O/odoOSm0iu2k+NLCH6DKP+fHfpa7Vik2GCOO6GHwp5j
UQE6eJw87t6rTCFzDOZjA6C6UUMs7Ie3OtNZS8vRpsRjyDntzhsxYHs8l3hh4Cupx5k7w65lKcxa
68pHarydBvAaaUe8iRY5eyXcYz7zFEGw+ou1ZVU/m+1yFWP9SR7QyN8Vci29yxrWkGw4M5qbetsO
WWz/TatqADgFbsdMDRepesgteJjzca3CSTIH84OcwqhPF1grPxnnbV5ad5gWvbYYAUWi8hur2PLM
JY4NSSOeakwbQpdjpuHmeJt4pf9TDpxJRCHgCQd/eaVQJopIo18ol0OYUm5Igw97iVeqpWi99Efk
8u7Mn614n1GB9mYf4Duirr+WFe2YQyy9ehCAlHqE/NwpEo6SROGvXgovSrEjxQCNf9H/9SlMW7I1
hK+Ul9FqehtsATralwsLJSsVKRCh9p5RAFhDvR7i/efLR/ywZj7z78SDkMv/G/hST3ygentZtEon
wBORR2Gwr8nFeMeM+9edyhA9UM9WjpNYta4K4lkV0C2o69uEtOAozbrvyyk4suO3hdkgLeSVao+6
QXcUn4+oW34uCbVEprA1PByekDzZbIpujSpQYIftXRSt1I6tAk5P/BS37US0u0rOdXZH7hVZp4IJ
zh12Icxx5tcNVIuV6t5tCBivS4hqzG9G/8nTJQo17tLxKI/WhrUbz1eFXZ9WXZmEMJbVcsfU3LlA
lrBghnszDEO9vYrjdED5LbasaiYkFIOmKyk0OcwplcXPw9GV2p6TwLvH9lN3NXnOQfN557j7yKGe
AwOEgbOtdaqeRgRE6mmOUJe4oc7g4dWYbmfhVHBVAJLXRndUKXCems2jA6k0GhNEyfFJsz6W/zHi
5NgrJU0Zuh6SaVMuux6QBKE+YNfn2Uq1np3pPMu29BEVQwksromGLi9u4/Ag7v1zrH85IuorNndj
sW+SRR3kn6pLD2q5lp9vAjZUPHe6GhTimH7yEZqu+zP136MJqK+W1twVfj3EmMLDjKrap5CkEbhO
q4i+peq51LSgFD/eT/YZKp+mNZBiq5YJtOmhPv9km7S/QbgnRLV2YzTFBtguvgICgG276qWGZYqE
Lk/K5VUz55JmWuZgpHRYockc2brBTZWbwnOEjq40LaXIMbqbjfrhc0La2HKX11zKSxP5QzXfeHxd
mPkx1ltSBYJQM1WpWo25omgDDlTDgrFvtVM53AGr80ujV88NoGgb7ROx8wLKw4zgC7GkX2TG6KxC
gdmXe5oE+eZbU/M31EDcIDzYVg3eHqSAUyUMj52UlhbY9y02aJXSynVbOmv37nbOHnkIn5e2YpgZ
K7k9qF4OrZ+v8OIbm2OqSfEpWsNTVmQs1fLRQugFVuBkHwXk9cKs16zi9iDqSOD+3quPYmPkCGID
nn0ehzygyk0/eeUfO5jYrkkAPtyiDHagRWxhIQsjitRSETVft5kBU4zdnVpScqKYySGA0kIhMUAo
oKAnWlDYL3yfHqjUwj03PnRya2dcbpCYhN8ImNf3479NKUf5Q0GeyweFmAwkLs4ZUOPcOTZu1K93
pIjdhfh76oES9yjTbzGxEvi5D2CgRlWomBhNv1XpcuOMg6IZqO1YX/pixFdzv6P9vABPpw/AliTp
uJUfGLVHOAQAbK3KA1eLVDCq4B7FVRs4EOlAgo/dHXpuIeaTFFcN/tdFlUK1ntljDZHnvpmtgsnW
tw1fjdsz8v7T9IB3M0sgeeFdpivoHFl/JFUe+EMi+pwRA78wZxiRbSFvBQYDYut3OHIZvPAdso0H
uAw8KXWFZ7sO8xBnBlrSLZ+Ef/xr3UAMkhhCqGHzeae8M6wuo1tbn5Ja3tw8ZSyiDjhFObIBL/ta
P5bLD5mKsdzc8l6rQdGMRzwmJn95Qdtap07zmfpoH0wEmSbpRToZ44OVFVk6aksSNAkprHUESSvr
wFFLGBlR1PN3aEzK74AeSFxE8LRR3LUXpsspkftSKyysmhgBDkOqHPssBHd04z4yUazIcHsoj1w/
JFzPCD/lKHpd2ejOh1LvAZQ5FAMCncaMUQWldbKpfuz9Q/yBx2xNYIKiIxYoG5DYTT3l4sL8C/Y3
XWvmbhbl6r21Qy5ulsu935nFjnVBIJditL7iuA+QcD253ziiu1EWZH+Ybp5T2Ta2HEWjUHpdnLBb
2bLqSdhlEe8UFfquaLv8Rg6RjdV8Bpjo1TFEtVIoebZu8yAr+BfJMDj8zX13Tl+y7DygD6p9PTdv
riBZToMWxa9vfM+gkOc1rgKzVDP29q+ov95GP8BbODnV4dsD+nh3x647tYmSQlliCcy+o4N9SPek
UEIluGt2NkWUTuQh2blwH6YQ5lLG2sae2j5xpgS+e82y47X/1yzPhCJLn3VhUmer5h7AEeJoOKek
k+GH3w0whpKI4DfhLrxt2OS2Z3SxEcJEF9wNIL4RGmfhCQIYxZVSfkXFZqLXSj9YLBYMu/SzRQI/
e3bW6DLLaKwXA1HNnTuHnJeiVsRlTmfcPRSAHFpYVqOUb0jW1WMbj8siVTvZHXi7J8nfEjtI4muM
xF6yjxj1AP938/5idulT/5+9yt1o2ofTPVwyixciSi2p0kxLHc2X/QIkYexWJU8T15n2Z1M9LmS9
cKcW4MNd2jK651H6pic1YSypKP/KMaiHIBvtjRceiocfIuwhHcIS0TRdVFreC7+XG0eIgoXO9468
SoRTRix5hwVcAdZkyWSob187UfjT0NXq4NS3uZ69CPdudeFN8xWPTBfMkyGoNu2oc4gFP+WNyl8F
C49n0BSWLh0sL8NVDSDDlxZ1oBvP/M4aWCFCExwc67USC4oz/N1sFOEnc6RF4pf1rN6od7zbqPXD
TmyL2fk5NW2ggpQIxcQi0Jb7EWWp9YuFJs0LBVURwzTnfhzE+/R9a+R7KNnkWU6JQ/ARjwWsbWwR
1/znQbkjVnes3ykl4mlY07I00q945wuHbhgXuWRTEpiP/+tA91Wz1q6OiBtA7S0ImRkanp1DPwAo
6zBW3BCfF/N5pYDFw/wLB2uV3ifGxhBdDiDrdPZ+6KNpx2jdfN7MdrypplfcD5uuhO+FboC/hDtH
WR2RyQGe3UtZ9bNFX4WRh/IUPk16NtQ6aYMXZfcIo1Qf33srcfWaJyyblM9QbXJUAV6nU4heAVTV
4JiCYDG2CBCBGnH9aCp1aj4Gq9ehmkgD7fryFPz1ZyFUWAX1TaH3CnbXzJDiYfw9XcGbfEqy/F0u
MpvwncctxW7UklRaffxPZCc3A1wsQCLIau4gbVLLfPCqCEgWiPV3AVRYev5LG7w9m4plNwdP0ss6
ibnMrSOprZNluQVwgnPJBXm2CYLgDfe2H1eEQYv8HGtxnCTDN2R5ip/jMlqBAtE9Lid/+U9suJXB
Qyp+zr5Q+/Ue5bFOZECEU7rRR/+ut4VjEvY+OhYixHUfNMXLibkhuT5aIunrIL0sSQXnAstb9tBm
XqFlEK5NnDjNcMx/Gzo2MYOm2ieKwj5HihPqcIIPnSIkGK5D62u7EGNpaXzDf3nBbjDt0h6apMwK
o5nDZNSn6F2aE2I1YwZPoEio6GKalZxsESLgDcfO05ZljqwHf6DHMVl5LJ0aBs2FFuDEQ0spM0kB
ZFyC+nyswU9M2Kq/w+V8sIYlo70B/vIbirl70gcrTmQSCSauBbW9UshEqjBtP5xeGpQ3SThonzeP
wwpy5PwFvLO5wzOW0J18wHkaeLtzcyPhJdVwfhAFDxXDZy0iUA6JMZrWGRxkOHpEgV0FrjlI6rTD
iBV/PvLLKF5ZuNdKIwELYQwu4q19suiORPWgRG3Vm1BZoM6aOGQNWfRgi0HoXTzSfT6dfT7fwMzK
xbEbYL5hv5PGkht9p/XRXVfUUraZnOOcq/j7f2brrQoWVIFyCOsDRKJLHvESBctWKuBKhmSgMs88
3ez6jLw/3U+DHrTTrSzbP1NEJVLQwsHbphb2d2O6NvlQS0sEu3OjsAa5kz3H/QrMTKF+1WApKZ/h
RGCBoIYTb0zZAteMgNV+QkEFL+xglxL7CK0WRuO93vT7oGZNjpO4OKfvT4J4HVBokKjEddfTufhO
JVxcjHgnJLUGcQzZK6m8sifVHKjjgOts3B8UGwSqOjoMECineQcxPka5iHQ4k0FBIT8YOJVkWmsf
YjQ3+DQbAWeHQncZw/i/tQqf4W9zW2cu5+JfVoaTsQsRCHwi79eUIx+lBQZSN33KIFg5OISyaGmt
zgt7CMlstRQvoRXRfUT/rwSyyOcGXsClpbRFK04IaDTzS4DxE0OP2fr7XpbQq/cixrlzd9nO0Y59
n/q9hVQ++CiIuhIpfp0/9c7DZii2LPNmw+UQnidTp19U/+CjY0fN3Cu52JL4JW4e8u7RZwGpithz
4XCFuQrtK43imcrysVgLBPhQnYP70Vs04Je9StH07ryMOFAMQQfosRYCkVFEuo1PpWGa+wM/5ict
dzrv11zKM+hxWlr5cIPjLRs8SDelFW6lgzQaXPcNcDM7jWNadPYNaetCjgrEhkcBrusUQK9B3GNq
EytGNV3ofvYpg181jj0ZdpKAwfjoB+ZVyBD7yCWSTR+6AxrFMCy6BpVgAzdzf9Rr2m0jvkPFwka1
cOujob51VWD7H+z12AWRaDWrgygtCBTlAmbdG/uDL7YJ4lqkpsQ5GkGFMatKXloV257D2lKqz0Kd
xtk60M5OYkw5cL2DalyLMKKYVcOaXRJnAkbCULD1XfEDlLElusTGFHYyTyyoH7CjeUWjTzyB2N3N
hoDC+1szAuVPsV5JVnY8QjZwkB4TAva3duqHPBCG60VEriMKOTCn4cqy+RPkOP9KZ1nQMUSYNK/t
9EMi8OIqfC+rmgOnxAIcuNZ9fr8gRkPxmDwHBKtgQHp2OAWNVqGF6RnIJMbNHy3ex7qFEEF+DQcb
lfPzI1GDDT+3t9uods7j6grihGriClgUQJUu0mPRmMHwy4Nbqn5s+FWWGpx3SxDCj9hjLXFcTthD
sXDQV0c0vQsDNGTpgWuS7aYHkf13011BjdS9L0VabDnvuLy2DXN4IxpYcaIsYrq6Cksk4jOxLoih
Sgx0xkXMqifFiJDXXwzrEQqDG3bz6YDv86x966RVyo0IxCZcmJ8sU7MXBqOKJj+B7aroEpFUzQ4r
JtLUZwqQamAXFX1XzPjtENo1jKqoCqVYS1Q1+ycIhcCW2VCBI3xzrG2bjTDu8p2ac87apUtbCR5j
SKxLBKHuBgHuje58OxEOn7Ukr7uuW8Pg3ZnatTP48XH9Xzdf5FAVYkFlswF2CF9e0tKK1Zm1THbp
n4T4EZKr6P3o1RDnFm/toVAqy8h79VcuJZESiJZKe4cIbuTUChII1v4+ilwrUeqmfcKdsp8fMjGJ
CwLq5bbitKIPSXiMJvFb+hAtLJBuPXvyZ5S5zS1lUk8xVlUPpyjZuH7Z3gSxxGK6caFJ9koQvBhI
oLStVC5JJvuw5R0ZHEhDxC+x9VGUGvfRvV6tH2QMz0RTlCQH0cfv7yYrZhLmcqQ90BYfMA1BNoLX
5f4N8MRSO6hHZo/SmjEWXlRk4lwsEHHTO3rc+uGfqDJIc1mhBLD4zUN2DYjRxpCwU5QWfAiWS5CV
l0dsl+psa5QbXduh5IdeayEVZARrbrc//3YUoeFK7zk0B2j88m0h3s70Yh64VaycXa50rEoeb9g4
NS1nEUwZvxGOhw38HEBuKBMNew3cGgryZAeHTRXvdrghAjfzzN0HXjcIsFOPkjlqgT2er8iykMnO
DZT5YSRKvep5B0kPT7jwj4N0UHLH9IiBaqCbI9/GY84YJV9uEUIyWx/C81ncYWHIl4SVYB+TB8Zm
Q6WLaHtu2B4quq3gwrL701VARe3Bhnypm/vqUzunfhJvi4raplxmYz3osHy5dfCNCPAlmEFbT36o
yF3AMUn1VZk/rENqdkcKNxmlUyUhF06WoJtr/5RZRQUyATQoyJSjav7l7fMeEG6aCBInVKbRHte+
gSMCHyXcS6IoaNyg1WibMxsBwTp9tOJmhAZdQorXhCampHZISx1lFp5sPl193DiACzVqGUkDhJtQ
CBdU2Me3WZNNRrGYHgmbXdXLxdzx0RvSeySNXG0d0exgl4gwUurA0I83EpDmWTPXDh6OIyxEzKpj
JRsgPZEoF/1BDnTfjlfxOUUuVGG9DxA/EvlMcqyOso3BunIv2+fl+4bYnPNeBrspZnO3EWqJX34p
4PltsMsuWAuNxBDHzboHhkzsqzwwL+hfqLN0NlQjuKSuMVwiPfwiuU18R9Gjbv7j54iZ36EyNuU+
b38T4vDbACvk8vqWf+Uy2amfAVgikUcrXosR8ii2CopGhASbTeNdIx4XHIAo+2M1U0+w6YPQhjPn
Catn0DEPxE+3pQVHKDZmdzC7scLUWw==
`protect end_protected
| apache-2.0 | 7c700e84834831d424a245c4d8e74221 | 0.945918 | 1.840098 | false | false | false | false |
sils1297/HWPrak14 | task_3/task_3.srcs/sources_1/new/oneringtorulethemall.vhd | 1 | 2,940 | library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use ieee.numeric_std.all;
entity unite is
Port (
LED : out std_ulogic_vector(3 downto 0);
CLK_66MHZ : in std_ulogic;
SDA, SCL: inout std_logic;
USER_RESET : in std_logic
);
end unite;
architecture Behavioral of unite is
signal duty_cycle : unsigned(7 downto 0);
signal scl_i : std_logic; -- i2c clock line input
signal scl_o : std_logic; -- i2c clock line output
signal scl_oen : std_logic; -- i2c clock line output enable, active low
signal sda_i : std_logic; -- i2c data line input
signal sda_o : std_logic; -- i2c data line output
signal sda_oen : std_logic;
signal start,
stop,
read,
write,
ack_in : std_logic;
signal din : std_logic_vector(7 downto 0);
signal dout : std_logic_vector(7 downto 0);
signal cmd_ack : std_logic; -- command done
signal ack_out : std_logic;
-- we ignore those values:
signal i2c_busy, i2c_al : std_logic;
begin
pwm : entity work.LEDPWM(Behavioral)
generic map (WIDTH => 25)
port map (
CLK_66MHZ => CLK_66MHZ,
LED => LED,
duty_cycle => duty_cycle
);
tristate : entity work.tristate(Behavioral)
port map (
-- Interface to byte_ctrl
scl_i => scl_i, -- i2c clock line input
scl_o => scl_o, -- i2c clock line output
scl_oen => scl_oen, -- i2c clock line output enable, active low
sda_i => sda_i, -- i2c data line input
sda_o => sda_o, -- i2c data line output
sda_oen => sda_oen, -- i2c data line output enable, active low
-- Interface to the outside world
scl => SCL,
sda => SDA
);
fsm : entity work.FSM(moore)
port map (
clk => CLK_66MHZ,
out_val=> duty_cycle,
user_reset => USER_RESET,
-- everything below is the interface to the i2c driver
start => start,
stop => stop,
read => read,
write => write,
ack_in => ack_in,
din => din,
dout => dout,
cmd_ack=> cmd_ack
);
i2c : entity work.i2c_master_byte_ctrl(structural)
port map (
clk => CLK_66MHZ,
rst => USER_RESET, -- synchronous active high reset (WISHBONE compatible)
nReset => '1', -- asynchronous active low reset (FPGA compatible)
ena => '1', -- core enable signal
clk_cnt => "0000000010100101",
--clk_cnt : in unsigned(15 downto 0); -- 4x SCL
-- input signals
start => start,
stop => stop,
read => read,
write => write,
ack_in => ack_in,
din => din,
-- output signals
cmd_ack => cmd_ack,
ack_out => open,
i2c_busy => open, -- ignored
i2c_al => open, -- ignored
dout => dout,
-- i2c lines
scl_i => scl_i, -- i2c clock line input
scl_o => scl_o, -- i2c clock line output
scl_oen => scl_oen, -- i2c clock line output enable, active low
sda_i => sda_i, -- i2c data line input
sda_o => sda_o, -- i2c data line output
sda_oen => sda_oen -- i2c data line output enable, active low
);
end Behavioral;
| agpl-3.0 | 60e79ed856655629e081e5abf923e76c | 0.609864 | 2.931206 | false | false | false | false |
mkotormus/G3_OrchestraConductorDemo | src/ov7670_marker_tracker_use/ov7670_marker_tracker_use.srcs/sources_1/ipshared/xilinx.com/proc_common_v4_0/bb615326/hdl/src/vhdl/ipif_mirror128.vhd | 15 | 17,011 | --SINGLE_FILE_TAG
-------------------------------------------------------------------------------
-- $Id: ipif_mirror128.vhd,v 1.1.4.1 2010/09/14 22:35:46 dougt Exp $
-------------------------------------------------------------------------------
-- ipif_mirror128 - entity/architecture pair
-------------------------------------------------------------------------------
--
-- *************************************************************************
-- ** **
-- ** DISCLAIMER OF LIABILITY **
-- ** **
-- ** This text/file contains proprietary, confidential **
-- ** information of Xilinx, Inc., is distributed under **
-- ** license from Xilinx, Inc., and may be used, copied **
-- ** and/or disclosed only pursuant to the terms of a valid **
-- ** license agreement with Xilinx, Inc. Xilinx hereby **
-- ** grants you a license to use this text/file solely for **
-- ** design, simulation, implementation and creation of **
-- ** design files limited to Xilinx devices or technologies. **
-- ** Use with non-Xilinx devices or technologies is expressly **
-- ** prohibited and immediately terminates your license unless **
-- ** covered by a separate agreement. **
-- ** **
-- ** Xilinx is providing this design, code, or information **
-- ** "as-is" solely for use in developing programs and **
-- ** solutions for Xilinx devices, with no obligation on the **
-- ** part of Xilinx to provide support. By providing this design, **
-- ** code, or information as one possible implementation of **
-- ** this feature, application or standard, Xilinx is making no **
-- ** representation that this implementation is free from any **
-- ** claims of infringement. You are responsible for obtaining **
-- ** any rights you may require for your implementation. **
-- ** Xilinx expressly disclaims any warranty whatsoever with **
-- ** respect to the adequacy of the implementation, including **
-- ** but not limited to any warranties or representations that this **
-- ** implementation is free from claims of infringement, implied **
-- ** warranties of merchantability or fitness for a particular **
-- ** purpose. **
-- ** **
-- ** Xilinx products are not intended for use in life support **
-- ** appliances, devices, or systems. Use in such applications is **
-- ** expressly prohibited. **
-- ** **
-- ** Any modifications that are made to the Source Code are **
-- ** done at the users sole risk and will be unsupported. **
-- ** The Xilinx Support Hotline does not have access to source **
-- ** code and therefore cannot answer specific questions related **
-- ** to source HDL. The Xilinx Hotline support of original source **
-- ** code IP shall only address issues and questions related **
-- ** to the standard Netlist version of the core (and thus **
-- ** indirectly, the original core source). **
-- ** **
-- ** Copyright (c) 2008-2010 Xilinx, Inc. All rights reserved. **
-- ** **
-- ** This copyright and support notice must be retained as part **
-- ** of this text at all times. **
-- ** **
-- *************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: ipif_steer128.vhd
-- Version: v1.00b
-- Description: Read and Write Steering logic for IPIF
--
-- For writes, this logic mirrors data from the master with
-- the smaller bus width to the correct byte lanes of the
-- larger IPIF devices. The BE signals are also mirrored.
--
-- For reads, the Decode_size signal determines how read
-- data is steered onto the byte lanes. To simplify the
-- logic, the read data is mirrored onto the entire data
-- bus, insuring that the lanes corrsponding to the BE's
-- have correct data.
--
--
--
-------------------------------------------------------------------------------
-- Structure:
--
-- ipif_steer128.vhd
--
-------------------------------------------------------------------------------
-- Author: Gary Burch
-- History:
-- GAB 10-10-2008 -- First version
-- ^^^^^^
-- First version of IPIF mirror logic.
-- ~~~~~~
--
--
-- DET 1/17/2008 v4_0
-- ~~~~~~
-- - Incorporated new disclaimer header
-- ^^^^^^
--
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_cmb"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
-------------------------------------------------------------------------------
-- Port declarations
-- generic definitions:
-- C_DWIDTH : integer := width of IPIF Slave
-- C_SMALLEST : integer := width of smallest Master (not access size)
-- that will access the IPIF Slave
-- C_AWIDTH : integer := width of the host address bus attached to
-- the IPIF
-- port definitions:
-- Wr_Data_In : in Write Data In (from host data bus)
-- Rd_Data_In : in Read Data In (from IPIC data bus)
-- Addr : in Address bus from host address bus
-- BE_In : in Byte Enables In from host side
-- Decode_size : in Size of Master accessing slave
-- Size indication (Decode_size)
-- 00 - 32-Bit Master
-- 01 - 64-Bit Master
-- 10 - 128-Bit Master
-- 11 - 256-Bit Master (Not Support)
--
-- Wr_Data_Out : out Write Data Out (to IPIF data bus)
-- Rd_Data_Out : out Read Data Out (to host data bus)
-- BE_Out : out Byte Enables Out to IPIF side
--
-------------------------------------------------------------------------------
entity ipif_mirror128 is
generic (
C_DWIDTH : integer := 32; -- 64, 128 (Slave Dwidth)
C_SMALLEST : integer := 32; -- 32, 64, 128 (Smallest Master)
C_AWIDTH : integer := 32
);
port (
Wr_Addr : in std_logic_vector(0 to C_AWIDTH-1);
Wr_Size : in std_logic_vector(0 to 1);
Rd_Addr : in std_logic_vector(0 to C_AWIDTH-1);
Rd_Size : in std_logic_vector(0 to 1);
Wr_Data_In : in std_logic_vector(0 to C_DWIDTH-1);
Rd_Data_In : in std_logic_vector(0 to C_DWIDTH-1);
BE_In : in std_logic_vector(0 to C_DWIDTH/8-1);
Wr_Data_Out : out std_logic_vector(0 to C_DWIDTH-1);
Rd_Data_Out : out std_logic_vector(0 to C_DWIDTH-1);
BE_Out : out std_logic_vector(0 to C_DWIDTH/8-1)
);
end entity ipif_mirror128;
-------------------------------------------------------------------------------
-- Architecture section
-------------------------------------------------------------------------------
architecture IMP of ipif_mirror128 is
-------------------------------------------------------------------------------
-- Begin architecture
-------------------------------------------------------------------------------
begin -- architecture IMP
GEN_SAME: if C_DWIDTH <= C_SMALLEST generate
Wr_Data_Out <= Wr_Data_In;
BE_Out <= BE_In;
Rd_Data_Out <= Rd_Data_In;
end generate GEN_SAME;
-------------------------------------------------------------------------------
-- Write Data Mirroring
-------------------------------------------------------------------------------
---------------------
-- 64 Bit Support --
---------------------
GEN_WR_64_32: if C_DWIDTH = 64 and C_SMALLEST = 32 generate
signal addr_bits : std_logic;
begin
CONNECT_PROC: process (addr_bits,Wr_Addr,Wr_Data_In,BE_In,Wr_Size)
begin
Wr_Data_Out <= Wr_Data_In;
BE_Out <= BE_In;
addr_bits <= Wr_Addr(C_AWIDTH-3); --a29
case addr_bits is
when '0' =>
case Wr_Size is
when "00" => -- 32-Bit Master
BE_Out(4 to 7) <= (others => '0');
when others => null;
end case;
when '1' =>
case Wr_Size is
when "00" => -- 32-Bit Master
Wr_Data_Out(32 to 63) <= Wr_Data_In(0 to 31);
BE_Out(4 to 7) <= BE_In(0 to 3);
BE_Out(0 to 3) <= (others => '0');
when others => null;
end case;
when others => null;
end case;
end process CONNECT_PROC;
end generate GEN_WR_64_32;
---------------------
-- 128 Bit Support --
---------------------
GEN_WR_128_32: if C_DWIDTH = 128 and C_SMALLEST = 32 generate
signal addr_bits : std_logic_vector(0 to 1);
begin
CONNECT_PROC: process (addr_bits,Wr_Addr,Wr_Data_In,BE_In,Wr_Size)
begin
Wr_Data_Out <= Wr_Data_In;
BE_Out <= BE_In;
addr_bits <= Wr_Addr(C_AWIDTH-4 to C_AWIDTH-3);
case addr_bits is
when "00" => --0
case Wr_Size is
when "00" => -- 32-Bit Master
BE_Out(4 to 15) <= (others => '0');
when "01" => -- 64-Bit Master
BE_Out(8 to 15) <= (others => '0');
when others => null;
end case;
when "01" => --4
case Wr_Size is
when "00" => -- 32-Bit Master
Wr_Data_Out(32 to 63) <= Wr_Data_In(0 to 31);
BE_Out(4 to 7) <= BE_In(0 to 3);
BE_Out(0 to 3) <= (others => '0');
BE_Out(8 to 15) <= (others => '0');
when others => null;
end case;
when "10" => --8
case Wr_Size is
when "00" => -- 32-Bit Master
Wr_Data_Out(64 to 95) <= Wr_Data_In(0 to 31);
BE_Out(8 to 11) <= BE_In(0 to 3);
BE_Out(0 to 7) <= (others => '0');
BE_Out(12 to 15) <= (others => '0');
when "01" => -- 64-Bit Master
Wr_Data_Out(64 to 127) <= Wr_Data_In(0 to 63);
BE_Out(8 to 15) <= BE_In(0 to 7);
BE_Out(0 to 7) <= (others => '0');
when others => null;
end case;
when "11" => --C
case Wr_Size is
when "00" => --32-Bit Master
Wr_Data_Out(96 to 127) <= Wr_Data_In(0 to 31);
BE_Out(12 to 15) <= BE_In(0 to 3);
BE_Out(0 to 11) <= (others => '0');
when "01" => --64-Bit Master
Wr_Data_Out(64 to 127) <= Wr_Data_In(0 to 63);
BE_Out(8 to 15) <= BE_In(0 to 7);
BE_Out(0 to 7) <= (others => '0');
when others => null;
end case;
when others => null;
end case;
end process CONNECT_PROC;
end generate GEN_WR_128_32;
GEN_WR_128_64: if C_DWIDTH = 128 and C_SMALLEST = 64 generate
signal addr_bits : std_logic;
begin
CONNECT_PROC: process (addr_bits,Wr_Addr,Wr_Data_In,BE_In,Wr_Size)
begin
Wr_Data_Out <= Wr_Data_In;
BE_Out <= BE_In;
addr_bits <= Wr_Addr(C_AWIDTH-4);
case addr_bits is
when '0' =>
case Wr_Size is
when "01" => -- 64-Bit Master
BE_Out(8 to 15) <= (others => '0');
when others => null;
end case;
when '1' => --8
case Wr_Size is
when "01" => -- 64-Bit Master
Wr_Data_Out(64 to 127) <= Wr_Data_In(0 to 63);
BE_Out(8 to 15) <= BE_In(0 to 7);
BE_Out(0 to 7) <= (others => '0');
when others => null;
end case;
when others =>
null;
end case;
end process CONNECT_PROC;
end generate GEN_WR_128_64;
-------------------------------------------------------------------------------
-- Read Data Steering
-------------------------------------------------------------------------------
---------------------
-- 64 Bit Support --
---------------------
GEN_RD_64_32: if C_DWIDTH = 64 and C_SMALLEST = 32 generate
signal addr_bits : std_logic;
begin
CONNECT_PROC: process (addr_bits,Rd_Addr,Rd_Data_In,Rd_Size)
begin
Rd_Data_Out <= Rd_Data_In;
addr_bits <= Rd_Addr(C_AWIDTH-3); --a29
case addr_bits is
when '1' =>
case Rd_Size is
when "00" => -- 32-Bit Master
Rd_Data_Out(0 to 31) <= Rd_Data_In(32 to 63);
when others => null;
end case;
when others => null;
end case;
end process CONNECT_PROC;
end generate GEN_RD_64_32;
---------------------
-- 128 Bit Support --
---------------------
GEN_RD_128_32: if C_DWIDTH = 128 and C_SMALLEST = 32 generate
signal addr_bits : std_logic_vector(0 to 1);
begin
CONNECT_PROC: process (addr_bits,Rd_Addr,Rd_Data_In,Rd_Size)
begin
Rd_Data_Out <= Rd_Data_In;
addr_bits <= Rd_Addr(C_AWIDTH-4 to C_AWIDTH-3);
case addr_bits is
when "01" => --4
case Rd_Size is
when "00" => -- 32-Bit Master
Rd_Data_Out(0 to 31) <= Rd_Data_In(32 to 63);
when others => null;
end case;
when "10" => --8
case Rd_Size is
when "00" => -- 32-Bit Master
Rd_Data_Out(0 to 31) <= Rd_Data_In(64 to 95);
when "01" => -- 64-Bit Master
Rd_Data_Out(0 to 63) <= Rd_Data_In(64 to 127);
when others => null;
end case;
when "11" => --C
case Rd_Size is
when "00" => --32-Bit Master
Rd_Data_Out(0 to 31) <= Rd_Data_In(96 to 127);
when "01" => --64-Bit Master
Rd_Data_Out(0 to 63) <= Rd_Data_In(64 to 127);
when others => null;
end case;
when others => null;
end case;
end process CONNECT_PROC;
end generate GEN_RD_128_32;
GEN_RD_128_64: if C_DWIDTH = 128 and C_SMALLEST = 64 generate
signal addr_bits : std_logic;
begin
CONNECT_PROC: process (addr_bits,Rd_Addr,Rd_Data_In,Rd_Size)
begin
Rd_Data_Out <= Rd_Data_In;
addr_bits <= Rd_Addr(C_AWIDTH-4);
case addr_bits is
when '1' => --8
case Rd_Size is
when "01" => -- 64-Bit Master
Rd_Data_Out(0 to 63) <= Rd_Data_In(64 to 127);
when others => null;
end case;
when others =>
null;
end case;
end process CONNECT_PROC;
end generate GEN_RD_128_64;
end architecture IMP;
| apache-2.0 | 9690d3d3ec3c49492151cd5d61fc725c | 0.421492 | 4.364033 | false | false | false | false |
CyAScott/CIS4930.DatapathSynthesisTool | docs/sample2/c_register.vhd | 1 | 752 | library IEEE;
use ieee.std_logic_1164.all;
entity c_register is
generic
(
width : integer := 4
);
port
(
input : in std_logic_vector((width - 1) downto 0);
wr : in std_logic;
clear : in std_logic;
clock : in std_logic;
output : out std_logic_vector((width - 1) downto 0)
);
end c_register;
architecture behavior of c_register is
begin
process (clock, clear, input, wr)
variable interim_val : std_logic_vector((width - 1) downto 0);
begin
if (clear = '1' and clear'event) then
for i in width - 1 downto 0 loop
interim_val(i) := '0';
end loop;
elsif (wr = '1' and clock = '1' and (clock'event or input'event or wr'event)) then
interim_val := input;
end if;
output <= interim_val;
end process;
end behavior;
| mit | bcccee89dc3e90bac7df1aeb92c74721 | 0.650266 | 2.785185 | false | false | false | false |
witoldo7/puc-2 | PUC/PUC_567/PUC_2/pulse.vhd | 2 | 656 | library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_signed.all;
entity pulse is
Port (
clko: out std_logic;
clk : in std_logic);
constant clk_period : time := 1 ns;
end pulse;
architecture Behavioral of pulse is
begin
process(clk)
begin
if(clk'event and clk = '1') then
wait for clk_period/2; --for 0.5 ns signal is '0'.
clko <= '0';
end if;
if(clk'event and clk = '0') then
clko <= '1';
wait for clk_period/2;
clko <= '0';
end if;
end process;
end Behavioral; | gpl-3.0 | ee032dca087cd592b42930ca50d94e38 | 0.495427 | 3.644444 | false | false | false | false |
BBN-Q/APS2-Comms | test/ethernet_frame_pkg.vhd | 1 | 6,499 | -- Helper procedures for handling writing raw ethernet frames
---
-- Original author: Colm Ryan
-- Copyright 2015,2016 Raytheon BBN Technologies
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
package ethernet_frame_pkg is
type byte_array is array(natural range <>) of std_logic_vector(7 downto 0);
subtype MACAddr_t is byte_array(0 to 5);
type APSCommand_t is record
ack : std_logic;
seq : std_logic;
sel : std_logic;
rw : std_logic;
cmd : std_logic_vector(3 downto 0);
mode : std_logic_vector(7 downto 0);
cnt : std_logic_vector(15 downto 0);
end record;
type APSEthernetFrameHeader_t is record
destMAC : MACAddr_t;
srcMAC : MACAddr_t;
seqNum : unsigned(15 downto 0);
command : APSCommand_t;
addr : std_logic_vector(31 downto 0);
end record;
type APSPayload_t is array(integer range <>) of std_logic_vector(7 downto 0);
procedure write_MAC_addr (
macAddr : in MACAddr_t;
signal clk : in std_logic;
signal mac_rx_tdata : out std_logic_vector(7 downto 0);
signal mac_rx_tready : in std_logic
);
procedure write_ethernet_frame_header (
destMAC : in MACAddr_t;
srcMAC : in MACAddr_t;
frameType : in std_logic_vector(15 downto 0);
signal clk : in std_logic;
signal mac_rx_tdata : out std_logic_vector(7 downto 0);
signal mac_rx_tready : in std_logic
);
procedure write_ethernet_frame(
destMAC : in MACAddr_t;
srcMAC : in MACAddr_t;
frameType : in std_logic_vector(15 downto 0);
payload : byte_array;
signal clk : in std_logic;
signal mac_rx_tdata : out std_logic_vector(7 downto 0);
signal mac_rx_tvalid : out std_logic;
signal mac_rx_tlast : out std_logic;
signal mac_rx_tready : in std_logic
);
-- procedure write_APS_command(cmd : in APSCommand_t; signal mac_rx : out std_logic_vector(7 downto 0); signal clk : in std_logic);
--
-- procedure write_APSEthernet_frame(frame : in APSEthernetFrameHeader_t; payload : in APSPayload_t; signal mac_rx : out std_logic_vector(7 downto 0);
-- signal clk : in std_logic; signal rx_valid : out std_logic; signal rx_eop : out std_logic; seqNum : in natural := 0; badFCS : in boolean := false; signal mac_fcs : out std_logic );
end ethernet_frame_pkg;
package body ethernet_frame_pkg is
procedure write_MAC_addr (
macAddr : in MACAddr_t;
signal clk : in std_logic;
signal mac_rx_tdata : out std_logic_vector(7 downto 0);
signal mac_rx_tready : in std_logic
) is
begin
for ct in 0 to 5 loop
mac_rx_tdata <= macAddr(ct);
wait until rising_edge(clk) and mac_rx_tready = '1';
end loop;
end procedure write_MAC_addr;
procedure write_ethernet_frame_header (
destMAC : in MACAddr_t;
srcMAC : in MACAddr_t;
frameType : in std_logic_vector(15 downto 0);
signal clk : in std_logic;
signal mac_rx_tdata : out std_logic_vector(7 downto 0);
signal mac_rx_tready : in std_logic
) is
begin
write_MAC_addr(destMAC, clk, mac_rx_tdata, mac_rx_tready);
write_MAC_addr(srcMAC, clk, mac_rx_tdata, mac_rx_tready);
mac_rx_tdata <= frameType(15 downto 8); wait until rising_edge(clk) and mac_rx_tready = '1';
mac_rx_tdata <= frameType(7 downto 0); wait until rising_edge(clk) and mac_rx_tready = '1';
end procedure write_ethernet_frame_header;
procedure write_ethernet_frame(
destMAC : in MACAddr_t;
srcMAC : in MACAddr_t;
frameType : in std_logic_vector(15 downto 0);
payload : byte_array;
signal clk : in std_logic;
signal mac_rx_tdata : out std_logic_vector(7 downto 0);
signal mac_rx_tvalid : out std_logic;
signal mac_rx_tlast : out std_logic;
signal mac_rx_tready : in std_logic
) is
begin
mac_rx_tvalid <= '1';
mac_rx_tlast <= '0';
write_ethernet_frame_header(destMAC, srcMAC, frameType, clk, mac_rx_tdata, mac_rx_tready);
for ct in 0 to payload'high loop
mac_rx_tdata <= payload(ct);
if ct = payload'high and ct >= 46 then
mac_rx_tlast <= '1';
end if;
wait until rising_edge(clk) and mac_rx_tready = '1';
end loop;
--Pad out 64 byte frame
for ct in (46 - payload'length - 1) downto 0 loop
mac_rx_tdata <= (others => '0');
if ct = 0 then
mac_rx_tlast <= '1';
end if;
wait until rising_edge(clk) and mac_rx_tready = '1';
end loop;
mac_rx_tvalid <= '0';
mac_rx_tlast <= '0';
end procedure write_ethernet_frame;
-- procedure write_APS_command(cmd : in APSCommand_t; signal mac_rx : out std_logic_vector(7 downto 0); signal clk : in std_logic) is
-- begin
-- mac_rx <= cmd.ack & cmd.seq & cmd.sel & cmd.rw & cmd.cmd; wait until rising_edge(clk);
-- mac_rx <= cmd.mode; wait until rising_edge(clk);
-- mac_rx <= cmd.cnt(15 downto 8); wait until rising_edge(clk);
-- mac_rx <= cmd.cnt(7 downto 0); wait until rising_edge(clk);
-- end procedure write_APS_command;
-- procedure write_APSEthernet_frame(frame : in APSEthernetFrameHeader_t; payload : in APSPayload_t; signal mac_rx : out std_logic_vector(7 downto 0);
-- signal clk : in std_logic; signal rx_valid : out std_logic; signal rx_eop : out std_logic; seqNum : in natural := 0; badFCS : in boolean := false; signal mac_fcs : out std_logic ) is
--
-- variable seqNum_u : std_logic_vector(15 downto 0) := std_logic_vector(to_unsigned(seqNum, 16));
-- begin
--
-- rx_valid <= '1';
--
-- write_ethernet_frame_header(frame.destMAC, frame.srcMAC, x"BB4E", mac_rx, clk);
--
-- --seq. num.
-- mac_rx <= seqNum_u(15 downto 8); wait until rising_edge(clk);
-- mac_rx <= seqNum_u(7 downto 0); wait until rising_edge(clk);
--
-- --command
-- write_APS_command(frame.command, mac_rx, clk);
--
-- --address
-- for ct in 4 downto 1 loop
-- --if there is no payload then the packet ends here
-- if (payload'length = 0) and (ct = 1) then
-- rx_eop <= '1';
-- if badFCS then
-- mac_fcs <= '1';
-- end if;
-- end if;
-- mac_rx <= frame.addr(ct*8-1 downto (ct-1)*8); wait until rising_edge(clk);
-- end loop;
--
-- -- clock in the payload
-- for ct in payload'range loop
-- --signal end of packet on the last byte
-- if ct = payload'right then
-- rx_eop <= '1';
-- if badFCS then
-- mac_fcs <= '1';
-- end if;
-- end if;
-- mac_rx <= payload(ct); wait until rising_edge(clk);
-- end loop;
--
-- --Frame check sequence
-- --Not passed through as FCS In Band Enable is disabled in the configuration vector
-- --rx_valid <= '0';
-- --for ct in 1 to 4 loop
-- -- wait until rising_edge(clk);
-- --end loop;
--
-- --Interframe gap of four beats
-- rx_valid <= '0';
-- rx_eop <= '0';
-- mac_fcs <= '0';
-- for ct in 1 to 4 loop
-- wait until rising_edge(clk);
-- end loop;
--
--
-- end procedure write_APSEthernet_frame;
end package body;
| mpl-2.0 | 890f8e91298de202ce3687daef49d80b | 0.672257 | 2.820747 | false | false | false | false |
jc38x/X38-02FO16 | benchmarks/VHDL_Generado_desde_C++/inputs-4bits_outputs5bits/9-MESA-FP/asap-alap-random/mesafp_alap.vhd | 1 | 3,941 | -- IT Tijuana, NetList-FPGA-Optimizer 0.01 (printed on 2016-05-26.16:15:32)
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.all;
USE IEEE.NUMERIC_STD.all;
ENTITY mesafp_alap_entity IS
PORT (
reset, clk: IN std_logic;
input1, input2, input3, input4, input5, input6, input7, input8, input9, input10, input11, input12, input13, input14, input15, input16, input17, input18, input19, input20, input21: IN unsigned(0 TO 3);
output1, output2, output3, output4, output5: OUT unsigned(0 TO 4));
END mesafp_alap_entity;
ARCHITECTURE mesafp_alap_description OF mesafp_alap_entity IS
SIGNAL current_state : unsigned(0 TO 7) := "00000000";
SHARED VARIABLE register1: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register2: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register3: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register4: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register5: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register6: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register7: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register8: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register9: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register10: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register11: unsigned(0 TO 4) := "00000";
BEGIN
moore_machine: PROCESS(clk, reset)
BEGIN
IF reset = '0' THEN
current_state <= "00000000";
ELSIF clk = '1' AND clk'event THEN
IF current_state < 4 THEN
current_state <= current_state + 1;
END IF;
END IF;
END PROCESS moore_machine;
operations: PROCESS(current_state)
BEGIN
CASE current_state IS
WHEN "00000001" =>
register1 := input1 + 1;
register2 := input2 * 2;
register3 := input3 + 3;
register4 := input4 * 4;
register5 := input5 + 5;
register6 := input6 * 6;
register7 := input7 + 7;
register8 := input8 * 8;
WHEN "00000010" =>
register1 := register2 + register1;
register2 := input9 * 9;
register3 := register4 + register3;
register4 := input10 * 10;
register9 := input11 + 11;
register10 := input12 * 12;
register5 := register6 + register5;
register6 := input13 * 13;
register7 := register8 + register7;
WHEN "00000011" =>
register8 := input14 * 14;
register1 := register2 + register1;
register2 := register4 + register3;
register3 := input15 + 15;
register4 := input16 + 16;
register9 := register10 + register9;
register10 := input17 * 17;
register5 := register6 + register5;
WHEN "00000100" =>
register6 := register8 + register7;
register1 := ((NOT register1) + 1) XOR register1;
register7 := input18 * 20;
register2 := ((NOT register2) + 1) XOR register2;
register3 := register3 + 24;
register4 := register4 + 26;
register8 := input19 * 27;
register9 := register10 + register9;
register10 := input20 * 28;
register5 := ((NOT register5) + 1) XOR register5;
register11 := input21 * 31;
WHEN "00000101" =>
register6 := ((NOT register6) + 1) XOR register6;
register1 := register1 / 2;
register7 := register7 + 37;
WHEN "00000110" =>
register2 := register1 * register2;
register3 := ((NOT register3) + 1) XOR register3;
register4 := ((NOT register4) + 1) XOR register4;
register8 := register8 + 43;
register9 := ((NOT register9) + 1) XOR register9;
register10 := register10 + 47;
register5 := register1 * register5;
register11 := register11 + 49;
register1 := register1 * register6;
WHEN "00000111" =>
output1 <= register2(0 TO 1) & register7(0 TO 2);
IF (register4 = 51 or register3 = 51) THEN
output2 <= register4;
ELSE
output2 <= "10011";
END IF;
output3 <= register9(0 TO 1) & register8(0 TO 2);
output4 <= register5(0 TO 1) & register10(0 TO 2);
output5 <= register1(0 TO 1) & register11(0 TO 2);
WHEN OTHERS =>
NULL;
END CASE;
END PROCESS operations;
END mesafp_alap_description; | gpl-3.0 | 6f1b0061e3c11b5c3270dfa9aef1d962 | 0.653895 | 3.110497 | false | false | false | false |
mkotormus/G3_OrchestraConductorDemo | src/ov7670_marker_tracker_use/ov7670_marker_tracker_use.srcs/sources_1/ipshared/xilinx.com/microblaze_v9_3/7b6e2d75/hdl/vhdl/icache.vhd | 1 | 200,487 | `protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2014"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
IG7zMKnL1nMstA6mQAvxCqZR4lv7AG0WEVILC8oKpL5wu2AnuYLQz9hrmlEAquvwMyhSI6w5fTN/
eNci98hpGw==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
Jh+4fXB9pDMtEUfiWXOf27qPTwwFktct1bxdugIGCExNqNrqpcs/vUnUyuzLftoVII3E59sXubRz
SkHHRjkp+bSDpOYl67JHDSQ+JJFz9ne9uDY9lKG6Z+wukA9tz/u9Id8G7vGfBvg4En+Tw38OpeVw
5L5v3GrZmQSJ2Of/F/U=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2014_03", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
GZzEkYDKKAdX9LdnsjWGc81qLaNEZD4ht7y4v97lfGdznI5x6q0Q/vyH+O9HocA8aeA1AGfjqEUH
H3HDe08URRnq2IrMB3MLhgUYaEZU7VKhj81vxSEkaT20mSc233dR284SCa+H/zkPRpMs+K53v2S8
+q8MkSyKT/+9xOksbdqvvM2t4d0QFd19DBz+lh4rlavltnGpEiMRhYQnrBIYMZTL4vo8EE+YD2ij
cBchQ5BIp/PrWNVhjhXxHUZdiNFkULDd+g4kz+5y+lIAifEUmrWyEK0E2LOyodVvv2hF05RhuSab
l0ERAbB30mSvPdfRc7Q16x9/xapFKvGLSsQr+A==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
B86WTs8EuOcJaz7y1+4F1bAj6+9PdLauJlNW4TmmGiAnx0PXTEQXBpglDkBupsqKBnnCoNVlSSxx
/DT4CXZZi0iu/w0/qACpwogW4NwB4ouKHcXh5qd8ypFcxGIqrTyspXapc/ELTcPCL095tSH6hZch
P/bsWo1+K0BLmkkE0EM=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
LGgB24VfAis2iqredzF2aKOn5HJivInePxdy96Rwh+StS2JaapN5H9lw8x+YOKCq+hBUsRnlKFpo
uuvdm4e12VAAVowFoe3FEMx9hNphDjM3ete89AGumENsa0KnFYdiSY4US/fQkP72imXSSrswZ2uZ
HmpWDmXuFWFSLlbhKrr6LrqF31AXpnkBViRCNaeh9+XKXutr+Ywl8jFZ3jhPjWnOQp+JzUH9gDEy
J5eLAyhLgK0MDTV3XLNOTtalUG2nUGlfUzReA8ny9ABZyoUdBiuth6O2zfM+L5DLK5jMZGVL04G3
JgSnMXdNQNxv5cdZtM8CHyDE+y9o4vWm620Ngg==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 146672)
`protect data_block
MLYJCwP39m8aO6rTOOlxl+a89uQQBmNCxfapJLEF7jgS00EAAXp9JFVtEgRYV1H8js4OFuBW4fyJ
16jHehzS+rD84PpG6x74j1Sgzoob/6yTJ+9KurJvvZuZKzoAIFZbgi+GsXyMUbSxt6+nk6Q8gsLE
CBOTCua/EgvWE09jQ/UsmirN1pVzrQOSRP7JFL5eafc0n/AA1OIfuaAdsNmb9psbcvQJ3pFzhYAK
A88+WZcR4WJbgW4yfyGE+n6M11OGlihbtQDj5CR3ZgJPAzPDJWAOlH8X4y6a7jEbPWGcdcVoIRj6
0SJr1+fvyJg4WMaslBLH7Baoh+MooNLaSGtsA6PIsvoubzlRGjlcdENSC0YYvUKOjZoXGlR7TKfx
HhdpfxA6WLclrDcUqSp3CTj+yDuK5rOxSrr+txt2vBxrMGKmBF6Yg2484YSSVJG0papXUDlQHQTS
psNbyCyV2BMJ4zIS12ckG0ki/OyJSt5WEBGrXvmUYRKjCWd6R96X9Js13728hFAbof+VxYk19rya
hzxL09MyieUgP6jMGz+ncTMRnndbCRnSdI5iubV2W+M/Ywpp9AX5wuPwEHywkI5L27Q6h6aNVmeK
TpGaGUeu3JcesvqI04a4Y0nXo1zayhqT4/MSijoRJRPOgJZoqsD1Ktq8C4SV8BACA9e7Fte2fO18
nmfjgUBIbFLXi0K2pMNu9fISWBrJL1baPwimENi/nJhlaloT/m8vi5yM66yAOspwdIGfq0GpqODp
5IpMyxhGkIZNqeQm/uBFT72r5W+Zc8hT+Eec+ZdqGdvtcGVwhh1jko9zFQMDSFQ2VuWKXACHCNgT
QbQZZxy46Xa+MXjGTbk8wzZKUAvxkievXWyuL7W3W5/eKxkoV/dUj8n3MXJn0vAbCKZwu8/0oOKl
ujD10NkuDJ2jq3jQjoknadDXS7WTYotS645k1ii+kKdY7NA5zv3EvDaGDwu+8FZYc+C2U6Dmtxq4
9JwWmOw4zfG/aFKm0OkFmPxPNwBsW41VEk9FMa6uZBTgNVxXlcEN7sm8G8RMinCM7Mm0dvs8ls/Y
1Ifcwf7o+NP2nOf+K3HUNaZw97Z4yCiNnSwgNHkkHtqva6GjtafaCHYgiueSjukWIWAanDcIWEG6
39heHouOOPYIAsbO0G5xRnhMLeF1Hiim8Jv7UaZok+u4rrMnj/O8rGNjqySUR28cavb8KuNg47MZ
SOMu1/PNQwXTs4urRI53nZq6s/J+iW+bQu0QCAhgUBO1ObVU90hxlrFeOejzZ+W4DQnjjhdFnkvs
6XW4KepXVFaroKEtz4GOnegq8gJ+1w/oCwluzxSX+j5e7m1BioU5+XF6CfsVwuUvB8XN3FElIMNM
k09Aqpc0yPm8WUjzZaVk1achiYWMVY/5CI/6L4I/964WOaIMJgET0nJr21fGjIoDFil0HZhJoD6G
PlflQnRJxxI4W3k0kQE8AxFS15iEwJEU+Z6dc3Yo2okIEYAquxfhDLOop3RJhnX0kKAXC80m9OPR
eUztlLIl3WPCH/t0eIxsRVN7hlDtAnuy62ytn2JWlD7mrpOBLrTxiaR4TeSVhxHLbnJVnhtF8jVv
lKU1PtexcO9l120cCCRiR1JxX9YjSHDu1wgTHdpGY6Yqb/5VWfmar1kQH/p1X5YhkD6oztWJcJm1
sLW4h6svtylzk1opygAPvyXvIx3tvi34eFPwAy+4gPPliR7LrNL+CBfvfHujckp792zTXcmNryXl
0WHXRXSPhoHtq5YlGk/+A+QaJV8TX5mPg/VFwD92eySea7rnFTEei531USfJ4NkAr952eTcZbhLX
q1uT6y8Q23Ej6x9lON0gvBJ31IhakR0qwb0hVWMR4r3293DxPIU3iy48NSds2/6I75h+9RC6JH1b
yjIHMzTUQcPLukiy05fyo6jXmq1O7tGyiVJDSdPKf/c8iisQ0fL0+2gxJRusbssCD8JsCZBzT+Ym
DFuW9nFA6HD5HYi3XsNlbsbKBLaI3wJIPyiolv1zY1+Agq7sQQVLzbG5kFzbPVqoJaEad4EYc2yl
YQEs3UrxqIzn4WUMLAbNxHYjqAz2sNP+vcNvujJXIxRW1LkzTEMiOCNmAcExKvoysIa4Qh75BJ+Q
ondq1LQNYEIULyoHDLViLPnXr30Jaj8NVzFkyVV8gOluU3K1Q9fESvgj2m0ULewC5JW77QOZ2TSS
dv9Th4bT6/JpsT7hQzEaFtM14d6kN0cExdZMBb7RCy4f2N8SWQIKxRzVOi3u4/Haj4AurTrK4+5S
3GFbLeNgKt0hNjJ1vjapPwgh5heTphdjwG55nfwdGvGlnwVmCnIOSVdFOflG8oP0B85wpWOyou9j
YkFQ/Is1pz0j4l9nHnCrll9EJWzLrY8Ql6EyuNLr+KWIIPX5CWg2/PP55ZskLJFFDpF/cLct2MhW
EEBOhWaYowO4YSY7e72VgKlns5SWrdsEId5lmasqfdaA9JtMKisXkZuaL2M4nqMLpkEdFTnh6MXL
U+BG6vBtF/cGnX6nvSTttO1W9jD0OKzrxGwhs9cKhmAkTADv/IyvRtWqih1PWDqVXZu8kgSwLCKO
zp31AVGzti3C0X0/GjUIhRjwvZFtlSi23+HqfIUpQwl4harEwI05tMnSsMyd2SOBXMMYo6fY836i
4iEapmWyQrH2zJS41rdARxSPEnQZRBlnxjjxFkqUECTW+kudPfQodaTo+me2l+QfXIrgDKxDtzl+
3DEfP3Kl2EypDz7+HAIZt0d9F+Nlir4/17rbLni4WzxKAJTyaFCr4O0VZzdYoJo9sJIFj2iSxEw0
rLlRHr4Ca8CpoI/MduwYDaFJbMpxykkGSAEof3OhP75zfMnbnAsO+vQPOlQyH50wLK1Rgy0CtlVZ
6zNI4umdBoYeVPBQvs7RTONpE6StjCrAn69xQoZRfnfbWaE9k4um1YGEFYTH9+AdhwshMEC4QFsI
MjvFR1FPluOTCytkUb3ldN7TXYRR6W+4WWNBZ+2RXWK9Ky4MEp5c9Gm/c8hC0jFSMMe3gZTTiCuK
HFfYwb+QA6TR8XoM9cMdbUxd2AmqH7xUZEnxaZuN5k09IA2L/4Lk192Fwc9xXfFRFQqQnrIQkain
XcxuHdlvxBpwWiwlLgdHz3LfUcLTQvLrm/ydfsEhSNEjlfNzzGWDTlL8NBVRopAqj7EfcFm9nNGE
s0DEa0VWPjoRsJH2VYvuleqT/qG/9/GGc4tyRrhRgp7g/6VbqgP2jWFt1hj45R+6X0gIYMnOQUPq
ZQH1ZpN6nxjgFkOBVHMTZRfum1J50ZcWus9F9jPzB9ObjnjngOa1jj9RAQOAPwGDli06FcwtKuWw
OkKXW8JjNqcGktrDIOihsQKAffI3ohFONu5tIV+AG/iUGDZXMIGBNHwxzu5QREPhj/YU3PAP7Snt
e/O6FqrLInOq2uklz4RppxuWza59Rg+9HkgF9cWebWcOoXjRUVJTHu1luyepEtJqoSV8NafPcaKn
I36JKD6Q1ow8aTkLQbwdkqRCQ9syj5xV0oCOheVc81eFldlzu/MsPmiceB7PdD2X17+83ON+BeT1
TR+AL4OpduM2zvmQ/AGBPYtAqVE6Y0WXq72RJwC2+lu90UoA/ZFikvJjQ99f/E1L7RdbRSxJzXOp
vAfTKIfEeRu80TLfmVCe5fN00y09rXc5M8BbYf8tQzAtRtRlmj5Ij5QIvrosnCjAWOGs3UJ2uIXP
7EYiphpmGnPCqQTkJz3vlDTYyjAk/4FzdjioSG2L/cjd/ueSNxA0GmKOJ2lhmAzA1wag2WNFgZmI
AbcAIZzYLr6k2XgXIjmoJA5ypKo1ivPD2YTIYOKCD4T9bv1yATRSn3VIriYV60bsiwCFSCKYlsTF
A3HCIub9OVb677hZoAHX0MHvVW8TlcnDwCWmFpnvsFYo4nU0Cg5XFsHCijtxSfjVt2t0iXeKjwmE
RNQsDbnEnt+P4DqbTDOaeeS/lCbooZdQmsVs3ThNA98pW+mWOw3zZorumL4joOiujWzdGbuOeo/p
nm/1LU4Iu9M/+a5t8FVmlqRN0/uUfE+g144zfY6v1UVcclEIGX68RkZXtm0+cZQQJ1qUdr4j6E36
N1FsUd2FIAM0UXeY8e+kneqa9iqiVPlSAisuXL1x7U+GZ2SGvRpv309OayhdE4jarC0CKI3cf5jE
te1i+1TSuoscQHERS8EgndYcTnoOAcl373nVJ4pQ+KJJZYEzd2cOhf3IXNKmRxui5AjDt3/ryX+d
oWvUwV+2DaYR7EBw622Yd+rZtROzGstU3QTtBPeDSPIviq7xILWrWg2XWiZQMeRgrRBr3Rap2V0E
R32Dh+6KapA+0azSbXgtJnvk1kAblNKJYJ9VOBzXkCm0V3Di2XuYzOGortWrD7AXYSQkluUWlLoo
dzuzUSWEcc25DAu/T3MkmWtXrNDhnwYnBXw1pIV60kweWO5iH5TKGgdFh9Vc95iRdr8GcsVLJASL
41ImzfG57267kw0NKJIvqYtQGp+jtVvpkzZLy+g8efi1Wf7Cyk9Nf2MYKnPTIwQoocxSQSyAZzrL
KD+7BwKnE/ewSxRklyv4hIHXdyF8Q5gWedyubDior6hZarcz6fhrFQ2bIKCVIGHZrjMo+khAkSJF
0M2Ny2uQDIy2iWazKeSP9iQ6N/TCUQR5hbQRqoONECelHxqsUuz6+q6sE8ZwYuKMrNCXSMxnIQZT
9m69jXxzr23l5s/VbAGnyoLnKAglCY13eM3NZ7YMcP2TBcYduLk0Y8cuJsSi7UxZoUfYGefam9ao
oiIaXrmN0Ueiior16cNwzMVJTT/c7ZQ2mWyhTyUmme7dFpZLbrdXPyf37a1DFK9arvzXCAiNI5Zo
yeYuBrJ7Co65/DnedRkBiDPwFyntQME/LB9Wv7wE8J4BMux5QveUEYvhZ3f0RKeG80cbM6aNtCLi
VRGZr1VTEO5/lctZ36hVwCWkpg0/5baZNuaGv6laa5XeiDsh9lhvaZaR6o3Bd5jdKMZ/0STXsubi
6Dw0wvmVTYQTxxwjJ0RuHLHZgIk2CKh/jdpswtGaaIsq8QqSZ0OM5Q1NPi9voJmDPXZgVpBBb7Gr
Bpt3lZdGjKZY7IOcMo5nJWMiLgzB5mhulfENsegARfsaGCw2ynHMgwXOnSqcbCnigQ8faVMhCarh
21pC5fUxDYwUIsDTrQO/TxwZAXEr/G8wyAQh5OYo71SlrTfmRrmVZxUB4WK95OzSFbjCosF/hRC4
ht1u88jP7F1B9y/oeOQZbzKcneluB8iafsTelpx0GvwsMYIU6SY5cFVLXAlcc21DrbXBtDwCE6xg
z+c9HBvEM2uCWETkW0+s6zLvR2MzHyTTVBTrcO3zth0lolOp19FriNT3LL0BPDil/sKOkYBKR8UH
dPdsEYACOKI1KlBB/c5NKcw3K4I4b4dCFOUKYat/2XAV6qERgPKNBSYHYtZy4j+fRtn+s7m+rTE9
5wSMbFwPudyXOwJ46hnfouPXhNm0E6dMzF0KmHr5TDcfxSqzZGdQvyctFnmVzbpDg0pSqs3CV5Pi
SH9Mj0xDlhZqEMc7ZOspurUuQwRDGURboplrwHwagxXLQMVMIZPVxXylnJ2GUtfE9+jpSFg3flq0
E3fXCsdl3NEvyrBgndm6BssykTf68FuyBVREeSxIH6P5FwNX1AD8ARUOGOfZEVtzm1bH6DZ8OFoX
8XRsla0NRluMZqPQhMJ9qo/8sN+MjZVnaas58LL8RG9sHg3UbWemYHOpM0xc5k4L6ZbTIW5G2T5z
EDkFMQYHBVAgyW4k14kxVUwKzuZRP4M9aJkFBy3f3eNbl3knEseAfMGEVzT98Rf0XNepTnaxyRoa
Vpo6zq910KL2b4146glkJ8DAT7FpMMl6kNIpy7/ErBpMjmp/Usdyo55iWndlWffboCIiKGzb9hpU
w4FnfwKlpJqsj35deg5psjs5T2MT/3BBw0O59SQ6JxEMWq4PJbwEqLE1vn8nUtbbiPDoIOJ1w7Li
rpYzhW9mkx13xCTN4BCa5gpoZEeBLSpW8ko13XQO3jsB68bwpLhfyO+eKPg13hBIoMr1knjGNczW
onxQMCy0vriF+rCxDQouGvhY/KJLu7esCNkwG1RBA3miwtDCASyfnkI25ZfTmTH5PdiCLvFXI5sn
4j1zU2GOhLPUrfz7U/u/ytc3fh0AkUh9D7QWRo8TA/PvcCXG2o/3ng45Ri6PBsxHc/I8SBItZu4k
JGPOPmdME8ECIJnNhpVYnEOS2GuOmURf80CucQrzG3lWxKrJFfwHQkwl2g5ScPLOwwqoi2jD+GBb
9XGd6Ol8lo4cr0DaVqk93H87bSKjsdyHlZUse5bVa3KmaMYgSDyeeo1q459m27ScPETmcykb3DwD
m0Ua+yCF+osiaMTFTwkH09JOMsOlCozSIiYKFjJuqXFvDgUjUtFvPXcBVfD+Jcxl/UYL6pSUXcOu
HJrNCiWc6o2IQjmm5sDJ+ntYLaLl9EKdu0jr+SsYTFPzm60A1jPrdTstc5BGAgwk9DbNxo8T9v1M
huLGt1L4OS40pVI7aI0CjplMhC8dIBKRCsZ1eGuCKS8Np2ZjZreE45cRJdIyv3XHkEKA/kabE+9G
uYN3AK1usY/T5nAm/18p1igXDpOp4ojUQ0wP8eh+U4+Ms552QbXnkOcX3p8KrtgozFKDKztplp2r
LJYVgdXsLDjO8SiXmRL+tY2Hrv5tIA1ga6oYcoNZiBIvuaoFF/N7tPeXwt3Vh05f73931m6GOthP
E65rUe+Utzmy5i6pZ3UBJoV9vPbaCveXHD6ky3m1nUWysNLwBK8dL1ex0hRgs0SbI+kD/Uee65qV
73gVnLW8m5OHAsSj0dcK+3FYi63VBPXkNZxnZAca+NfmGDqk6ckhjtoZSiRyPBQsp6buRQ48bxw4
1HW0pkvKfOYR+ZyUQ2TL2eCUKIyKnoEyA72iXVAEW7WD5L7XNng22EC1bjNkSD9ITRtn8FDe6d+v
8mkGgbQH9fUmPHiu6A3qDQvoIJtyKr5K/9QRTRywJGOgdkxOsvzNq5hOAn2qnODTyD76U0heB7FH
9U7M93oNi8FW9X4NZs3Nhigsoh8Ja6UlVsOopR3hhOGQYBhdw0+6X0TYUjXs2siOXjGLn0jTrI81
beJOewaLodqobxXaLBmEH5o4bGmmJ066LFSW5+nNLcQB02hnYKX0cWKES2yyD9DlV5rreoO0Mfej
Itv85rNMeuCsHGydTvVY6JI6YDQ9FYpFBGRhPCTj0BEHgwAMz3Q2PN6p2LGTfX0Z+lUthIi1s6Ft
WV0ty7j2xmqF9Ny4gxLU1nDBLGFRxoAG2QAz3Ye9elO2nlgw/XVQlOMrYWMBxpJKpUKsj/ahhLVS
TDDYn6DIngM7JMSSZ9Wj4AXjfk1WmAjkD/og+EjzSIKfVm1C7GOFtoXPXQyRSx6zbcmsLu8Cv5FJ
OdpULYPJf2OVfPmVvvTTdRB0y7zU1q+EE9v9JN/L5gomj0JVUTVnI+1qZQ72G0yNFovXxJTYuu+d
xYcGcXO2LN/nQxDEyhmCEJkM1pQra3TOsCKD6RcDRjxw5+t6WOw/XOHSSTuF8CoNrm2ej7NtB0gX
EDRW7zRj+BO123yf07FqOMIcax1LJxxA1hYW3PgKWfb2TafqIfInp3lo6/tKaL+rmHYDKCzR+QSw
BdqporRAqgB9u/llnd5pDRNNYeOrTzn+mJz+v9EzjoTPFthHrOUYxrmgWn0TGOlol2yw/cNIquYa
kwrZRq0x/9BDfsiYi2KzzwU+B+6PY/v25hB2+R0bZKyp0lUGqXltGPhSXrK5T5Pf0spqkcwnd31U
PtVXIzOjtEM9rQAUbkYLFcX9bOhhQH67N+EiOfWKKPw7oS3iohxlQRO7YULp3vfjuqCzL3GcDZVh
6d5OUB4JjJkbbritppzY1Ujm47Z7iyp9UoYpEgKYx/YyMgOdeScqhldMbu5JEwPztRXBHThOwS4x
9kN1D9UmQ8OdiEiYhnmu3u0KRCqPlHl3HtfVSoIjzQ5diuLeP4wYEmXojf1vXCeM0tK6Xd2fj4XB
Zprg/JoKgE2Wwudpe8zlf9emjHt2bAfKPbAW7dfRssNZYQKU/2fR1GtJAJ9aq2CLbY/4p0RYDIFY
SaUrdBqIOsTqIdzUJ8/w6M8NTQK9YLyTQGZCnDeL0n+mLX0KVbEcX8RQsJycLgoadZ09Io8xJP69
RIby2Gk3ZVJFFUsuIO81ewJO7l6gZXLJ7zSU28VB3vrwk7cLttcfnRysylhR3auPXO6IMPqjvHJs
z+3SY6EW1DjIrvGhonHxQeZMOBcqoLiIJxKdqCwwpb3sbdC5bqHhnDyQomd2lmSHzrRzx2vtrfjT
cYUz2BURlAYPyr9JMeEunl6hDCh0eVjdBDbgkhWRL3fYfChQ+oD/dT9qlB9Vud7Lo2zb02TVNJLx
8cTEcPRsWi4wtqtQxZKdipchSaRlSboav1zWJVG22+MdlsV7MNdHOf8FUYW9qY3lcMHq2TkoGoQ6
QAfkTlmkVmogAWf4y3m8IrAU18Bz58PhZAeb/dmLxiKKhlfD+So+0+2bL0XIn9eV1whsnfod44is
RS7KY40gE9CtgNEBluyorsh81PCcH0FTv9VDRM/P15udwzSYo+AtrKpaWrn+SLyYKq4EiyWSYucM
NO0M+J6E5Lj11hg4+rDJA3cLKHtMLuZp/URwoK1sCqszmZWRMfyK91ncd6UXhgJ0uLyDXKzQPDjR
2u/bdO4VhcWIsMqJ8S93K+IrY31xaEUuIEPEO2HxSNrvOplS3opGKsK4zqW8PIkVPfWMbQPN7dz3
QrVfBPIbJ/0kfkdEwWGJRCipIyTWIoXhL6M7ivdIOJ5TPCSHqXNyDbG0lEcB20dHdVJYsKJvRHW6
C7RJuiCsIgxoMkYciVeMSyXoAE9nZphL8Iy4cL8FdbyYLrUunfdZeNnimt1cIzBvUL4lvbmYMpm6
a8P81J6ruswZTPbkZUt7wuzR4H/yAQz+X4ZqI3A5+RaHzIootste29qe1f4BYh0rnc9pbmptBesg
muEQ2DyNMZLi7ONnoYII3/N4G82c44gK3GhqSMQiw+dGirJN/q3x4gaQ1SHmbL8cDV8MnnciJOzm
lxnss1T9CkcprdUXxJm5xlJPZWz9hZL3ZEES5GZ1eCN5FdZmF1jkZahfSVpUsk+atI3pV9ocvCST
1eqP/Ur6yAR6ILVeCYuJ6cdrNY2V0vCP0tdusAKdk3AUV2JFKsI/1OtoncDMTwrA94/Xa/QL5eqZ
U0MniwMLl8fN7kMS9VkCIO/A5qRz47c1MMt5jAmRucYv+NF4WC+tsJ9OTj68FiE9e54Xa2LkhyGE
3Ziu4JVgDZdmgHQwpWchTJMu99u212Kx1Hte243vOXg6kby6G/bzpl6cV5wD/phI1XW/jQq6jpB4
+KcbLh+8DZnoYi2/Tzs1d0hBPL0O662L4dmPC8nkE8ynZCK6yooICCSu6PCz3FxIClX4gR/6Ckl4
m0TJ9uT1EDtP1FXHdLdJHw6P8PwKlSc5orXQ/GnybQAFglfS9jHEJWi1WU0ZhOi4guPEQsEEUgZE
8012birOnFcZJwR9+eSD9t7MbflIkdY3B8rFqNG6DdGD1zMOXhTBGMqVP2qVRA3k+B1QSUBvTqea
kvOP2n0Bm8P95sYSI4VTboiO0tajLT1PSNdXl0qB9egt+hB/dr+Uiaa4j/zZG1nsu1j40binri67
uGpJLNzsXS9BWvMJuVAgXh6nCHkvkxNuKCg3rzDojIAQVEtyAJA8ObRyGASWvL33wiv20SR/r4mg
aCpenvh/HdXiqxGmBZxdP4BkSHbJ7x8K/2QgHOUQZo63A75VZBInn/l266YWWbooC79EMrOq3YXm
dYjyUru3urKhb0rlkVtFY4zRmv2gIwmET1f5qDf3UBKMA0f5PB4F9TyySufqHDh5Xu4oeOhys64+
8CfbxbqCIcHOpzCa+e8gI3Hdjj9BPXhYXBGbJHFLPJA659j4hwn2cbp/of02SuVsszvy3AdTLTof
6Y9Py+KHByZi/jcoIyrz57O/OEu93kgtAWfrS23PM90AW66JkDOywELA4YNuskfwIX/W+84BleLJ
B5IyrRFKaGhuBr4DYwPnkB6aky8mg8rIsGvz7V3c5LRlRiMaQGwZPpNodCjBFPTzRtrEuJXefyb9
Z8Wk89/3sJ31iqVe4L3agcpgtkNk8HSJmjViV+4WQE+ZvK+1lmlKdr9Tb+R7IqympTAo+3XOeuni
NxUF3V8rtzk4iKprti/z90RBIiygPMU4b3+rhF48CiKK2QWFPLNC86pBpalli4oI7GIOU7kZbQBj
Np51zWZrU8ax55f7eseEFqLp8XNF4uEJSEogSeXrwGT/tuEmjzRFoV75Xr/GvGlqJPjNtMmLMdy9
SgVLMX36dzXTlRxfzzEiKQj+5Q9Fz5pJtqkmT2DJ2mmZBE6ZBosJf1GNxX1qorocSm+tTZZ3wTV4
a3pImSZHRl63+Le630zZ7a5cuOaSYWw+zHbVym5ZEffcM3MahkoUTM8PQnNq4By/i+/81LcMTkfu
aFZ649LuogGZV7B8EloFMxr60HGDBSNRJeGAF9T9fethe+gPvNT+R+/vGtDYKMVzpDJqSgo4TUVk
Zp60z5hR5za/XrWCeq4pwyfajGvYHpLMQNkpf4LEVtwn95NXGtDdL5/TXQupqjSnZA/NTa+cXdht
wRa5pgsBJzhcBnBpTyuB/FYVZ91Hzq9Nl/8t7mx3hPGnS3Odypk6JbwNK9rACVfZ5mi9QCrnm4OH
bSEv3qdlbco3/usLBMXil0uqWtVv81y2BnhAyVU0haRAt1j+XZdASjMwqNKueg3Wqi3cB/2XixO9
fFVLLWlisVKgHE85Ui1G81qUSKWWfJ6vAIvH9jtkClARZsZbIYA3zmu2SoCLH7D61nh2q/njuTAO
OkiVrgJEr7q/EaW/6TqDe3QHFiOp9HogSArE1o4UJ2wTCKGNKRnAc2hFsVOeqGDi1jJtB3GfnGUk
8ijF6gwLA8DdtRYnrZesunKtbE/Og4L9SzWcQEUynLwA3xZx8OEV4ZzpjlTS5PEY0/rNc1ODsF4u
bErRhzz+yKBrrngMsegUxUAXZmJRVd6bIO8fPmv1wsxIn5DACz/VdIN5dJ+L4knKzzX40NWBVRhH
l25mR9+u3Fm6512x9gnF1+mACEsyCkss7QQ1NakaF+ol9O0WfdYc0VxNBWcup8ez9NJGtF/QoF/3
4imzelAmBEeHLw+atIu0NWf/5yygHgXlH3BhyDYUTSSH14YZDtO3Olaf61+c8bjx1/h2ci9ZL8ZT
xHt/ReMzDPaq0HFjNeD4G3X/LlBur0/agsk+tMq+QFT1YuNT6efFj/0vRS51XUvtId0A1FZsve4q
WQg/RJNaTVKQ4vDN+WJ4mabUXaVMj7atPyBwZuMq5IGTY5NA7gWvQhoQ5UrIQo5lDL0I0mw+d546
h5IpEBEMV0W4dmG537m8IN5sR3nQIYLfx887Ig4mD1yiXiH/OHB0wn0Yh/TJCd5IKuSPKhmV91dx
soAJhQ2Ni30NEt0xFLwJuZsjwdqOfJ7sDy12yc4remSi8FQ3gcA1gbzcPbxB4zsmmFoyXWbNbTVu
GgAd7KNRj2ulDjG/e95cPNwtQCAs+TS/v4SgDTbey+YsjV5DbvjPjDret6jxL1tbycCl1B5f7WvS
NtqGMulrtGrEjegDADNHfp1jVBRJQrzm77lUAD6oQCn1S5M/AGv5CTAIMVfJSVsAQWbmuaeuCsCL
IrNj2wWnRO1+pLbY0HZ0Cul8TkqcZxURlFxrf7Sj7w7R9LHZSKoSEcOdhDBurI5lvlbw4UTeT5be
oFbv4Ki20bNVhja1ZLcBS+/zNdT+wNYk5KAwLmH9MDKrLbmBlar+b84Tqxo7d3cGTn1+06tvbAjW
EhV00njx1A8ROa4CCIpcuMndhulwQPKEl/kHWSf6QPBg5xY2cZmNaI9nTZcASDP8I2oeN3KPJuzD
+uRT3B6Nz0LwnjqkK+g7FW5NolTYwI9hkJxEpWON0GeiyMHENrhB4mDg4PFL/P+SxASS4bEf42jq
TJSWEIM2XlSCGPbQGZNS3G37xQRzj3u0Ozu+4m7oBSkt5hR01Ll9KBTJst3Xc+pE6JjTfuZP0sPw
Fnb1nAaQSgYSbf1/dQwZARDNZqrzvskY7yCSEd/yEKm1rMNnKGKJq3qyoVB4fMhp2GmyLfKqj0wg
LrajZfnWVac9j7V0FC4tTVgJTyXHdvcryLjNDqxnYDCqrlbWuN6Xa7IvFmL4rNjHu4Ts0PQPlVXj
EQH++0/QPgZLhUXrCiRs8GpwwAg31p8Bq5uhGdgH5h5xV2ss0o5OJ9fjL38CL+ReT/g3I5EOooKI
bM0gZlOwBnFKgTIgXDtATZz9YHbMwrekvgW46CzLWLZWL2SZJ6KbJZWOTSBgaHexhMODx5zMlkFc
bzN4LsIA1dAP+opHlsb6jjuzmc/rV+1hHl3QmJfen7GnnWKQ+WKOx2rcNpVT9T5QySEQ3YrG3Smr
WCzCJShLl+lEvMpo/7M4KIbfTwhScdP2ftXBD1lm1xdzAgBuJDWu9MGJNN8zePZ/eS21NC3AhKI8
B9WEQsg1ADLvZO9RhLHx7X0GxB40uQr6+ca0GaCwEK4MwxWKqlxiuQtzQIUtzGZgqyELsKOLZSsf
2u9nWeiWfgmaOHY4DttJKZ92uwNirgZd02YwO68hxinvGOewUcSK/6NNp6KwKUoKqgUvsqBlRHjf
fDBn33h/aFM8lL51v6GYzIWshbSxgPYAkTI8pWLp8xa24JJNIazWGCgRPS5/oCAt7uixjYhmuyPC
f7B2PtOS9SnB/xJ64HJnVVDO8XBlGDzcGpHhZFgv51eA8nLX5xxPlT7SVFOh//aS3tpHGjk2R7bO
O0sru8oo+gFGWN0iR8xt7c1YufnPFcH18Vh7O86LeYr6R1YeNOzX9oFcq9dSrDXS8Dp5naWkCDYx
rhxOAJQJt7u0rQBImW6J87W/HfWtR5KWV/xkkP0VpH1FNjdm/wIrb7jjE+KnKat0u1clyiUHL2xz
9kXo7FPjUwSYlzF4YfHUOcXqJewlUFe+E/HkEJtAnqj8ufnuWFnK8clq1lSoemAT4elw9LzSsZKG
MlfxSYBXY3Xq24yZFT/Q6avct5jlK0qRASCUZX0D2MiUfCxhZ5p3R5l6LSfQ+mHVcBFwZDXTmekV
dfjFehzr2QPJZmI0C2wEZoz3zwYsn3TSBSQVcaHEquxTMBet5gYB2JHSxG99knln3IEg6bJkVh3o
EGM7HCNT4n4wO9s3xEiwx8epqVRYzkdfWxpbqt7HD1gRyRnZqZv8Eu75NX9aJpaLVsFBGxgY8Qbw
z5Kxbhi8g1yA6lVj/PIlHfE1mg+RRIjQAIoUWHkPKmbSIcBj+w+/+hsWHhYkExwvxssIIFtdRPBO
PJim5H3zEj1GHZ7/qyU3axsLhhzCaUgOkk2IOMcyxruDGsIYoDTDZJ/K7YqaiZ8LqIiSDsxpPxmW
330pgKUWYh5BrNrEoSfSU8WZEdrI0oJ7OvUGg62tprB2mqbWa0g04IjfImn2h6uoxFhxMaiOX3kk
/YIXaBz9A3sU9LKMxlrsAlTfn8+8vsaZfM2x3F4nMV3HzihTVQcCpmrHHKMYcFpnoeUNy50+OEpg
/EzDWTMUQgJEYowVs1KB9L+8RUhCE4BBqLFJ46dadv9XDBhTupwhFsbFQYaPbfo87v2Go39sj310
qr/z7baHZL+e88chqbRqkLYK+c2ricEDaXKqZvxYETcBtWiamEkyGA5aIYaPowRBjevJDtSnrzh4
CUMQfwMY1v17pIT9FO6I/Mq2PN+m3dfpS+YgoGgPpBCyCk1Za2N+lEB7mMdJu3mCp76gxREo77zR
YzUgdcSgg+P+y2jWD2RHoLOojQN6nAdVPJ6qjqF5xdIlIrESEnFbLMwL6NpUwrw+WAG/ERnsZvHW
sCzewgs7CMr+5q33wSdZIacgH3HeXhrF3m5SWsTjrKttuEGRt8FIBlcZ02nnDaFb9CCzqA2vNGhT
htzxOWe69HsrHjINvd1XH/Iw/65KxCIzIxQ/KmBjWDzXyBL7ythibl7LkcFlCQ/lDrBxgmXC3J05
kxBzSTuBwz3tOoA762OGm4GWf3zPkWGRJQszHcWFSomZjdHsGENZR7ADWrvOKdgub5G46jwyZdAl
Els4ZHAa3XDVGfMF7R12c/s3Hlz2OqjsZBlhfs/LcwuJ7HjwYcf3BQp5iXZygT9YvI5i9nAFQ+po
pw9MFAJ7aBrJAIc56A/B3X/LoGcvehehrO8VVuw+YYbUuNDxlY8FoREMUYoclbBPY1pwqKSyi/6L
UfiIz54JM4RKqJdxJIednIOGnbX1rxfzhgJ5wqnyLhdBb0bPCVa5Q29f0Uz4JbnwfyyirDcnGU2U
C44+1VMNVcTtBZSWUE/NElDCh4LCXENnXPKiU84dy0I/KsKkrRBx1oIolnLrnIOATSViG5yNnl+N
3ADfo49QvsQkehZwX44FzsKwHRRmMi7Du3/LS2oNF4w1u+yqFTTguhsVe8vZ9r1tUzqPvzLfCnwR
9LP7wip/6pwSwxwRQ5j0Xdm/ApMXIfKpvesV67/fmsuFVBQWiXLJsdlsB31LGEvV/07XIkJHDKeJ
VgMT/b8EJ/sdH1N8YMpEevYPhCdkbV7h8Md9xPCHXQ5xtcGDOxgtBHSIZk2cCUGhMn0R/kf9C7QV
WbrtxcTUAdjIyRyMBTYllckbFdNfyZ8IrE9O3QjyHkMuWwGz+1+HTADHcQ7sM3swAFlEpZ2pOwhg
mcM1CcwzCf3W8cpZc/5sNybEI1PkCC6MilA1jzSX9CpQhDjH+JBq2D/L+JEl13aelpaBqWJd8qiI
i85myh/FEkNtPf6zLtYoEoYVh2U7hvP95r/gvyQQ9FLI1w3jvc03Fc395z+qozGKqWdCwlTDvmZs
BOCTl7wh3tGH3jYZztKfJJAivghtWx14zWjT8JGYy36Ll5OpO+qf7DesOsLY+LAeOvzDDgiw+/RU
fslBpNbEytuJz+LntQLoAb7oPNPvdYs8M6nmsIFh83Q3fiYHeofOfle2crcsBCqnts55qVnKfCp3
GPSFzRmm2f45PoTJe/JidjbpiHurk0AWBZY4SCy/fGtJSV3DrLua8f77CKk8rTi3IXRrDBvB8u0w
R5qe5MzkfxkMLaNbJNfZGCxILdjwzfiEs7iF6+quGGOgBXhhcMsO+dKBty0o0+bUFu8pInSrGr+s
fECMj9U5UEy0zOOos05WiYSrHjCHRYGlNNwSp4WCLk+bOD6ddb6AZq98wDdyKB8VMyrGviDP8BK/
Q85AKSeJmpbdK+Jm8UxYVM/UWPvuEt0oQ2IEm//lLSf8rmmty7wch4iUaaFQnSVLtIFboLsiFCET
ISRnRr5snMeEkF4orGS2sKiaX+3aqDD2MKqXKFPRsSIm53mc3v9AqExt5ueZ4dKE6qDwGyPUkOjW
6uFfo1/OMr5i6EnXidupJnjS9cbWbbLROo7JodiKqy42d22wq5Wr1az3wq3ZS3FscYnJCHz+uA/b
0z/k4VPeSsYcSAgIdvoJ1NDsmTYxshQxUbHnGpXhZOQ0YGO6sAMuDMFUV+Cp5epEX7QVl97Vpkcm
brcwV8NQc1v/RXMtul9sF9wDxAHQBZZ90IlJF1CMud1PydbGe+k2RX9r3ozeqvGc7/AvmNnodSSx
kS6JjvJPHHB946pjkvcMiGoNdIyyfkXDzX+0BJ6yYAFhJwZDO7Zmlbw7cgQtoU7pNFyKvB/+qlWV
9X4wHHqoRQCkj2+f0a/pXd3PjsjTWkyFtMVBypwG/LAhrIvuf1M88YQHgeboKuY56VYNt7ZZjyXL
R40sRU3ji1JQ0Y0qUPnbyELhUrlg9Wjz6mobtxaOmQ2d0Yr9h4JWCBbHL63ImXHGVfTfYhsyS2Gc
xo4Fa8fyKdZsnFgetyBisxHoYZKk2OuAqTF/1WKw14x/xUbwBCXpCQ1ffSXEs41yhpf4a8kJmoQ+
31uGYuQVItoRFlrc83hQWoQ4oxsgpmSPuNymF6Ifn4yvnuKLNjFIcDszHvVEQmdmY2TAjWJvw+Kt
vTanCvEZ6q2lZfzOU27Vn/95ZYVWc8yo8+xc7s2eXJkJmrrk99mZh3MqKWNDqq8k/HcFNpP56hfy
AdYfhQAZY218LF8br8C2mP6vT/YTZqitMaylJ/ZlkB0ByAGYZnRBslPg8tDMsSEZNeKXoFCUnQx7
9ifHczR3kdR8hbCR3ySDbHhiP/EbE3TNSkl9cZhQ7U/GS6sluxI6fGaQmhXq9rl0uOe5iQPNU+Ya
7kyLmWTZe3e+awFlhAl4oqTih1So5ppr9qF0pXpIAWJXZ9vLZsOV6uswB0om2By4kJT8iUW1rnJp
n9Aq6VzslDNzOu0QcHlrJ2aiD/OF9PaTxYliw1dVDJlar6365RggkFjBfkNZWZXAeIYqfLokSztb
rPSlh+B/ci7xcKvjNB0S8YqkZjTT9sBu+p8X0GX0VPXF/Ci8WfsbNsI0RxUaBAorJDzFQnKIGE2j
f8PnQ7V6dzuGaiJ15Za0Qi48TB3pNFUDYSLiGXEQzKRgW/vc5HyuiI9TNr6WrB7p0yP3+dkid6hU
Gie6/rWEputvUeK0ckw6zmSf4MG+W2SPePGMxEFP3S+gfD5A8cYk0lGyjX2TXO+tXr+IvcSCBj0e
TTznXHNEL/7eI63Ha+rSrjM5f9gI5v5Fesz2taQJXv0kV/JsFcJt7IZdTDm7jFoZN0wN8CbsFTCz
bk/+Di1gSy5dC4xFwkdGcRVCEpwUh61M+ceE/k2NUnlBB8/iWBXe8xtsVP88E9VQMeUFKXiV2n+w
sGTg91FdxMPAsh1YiFpRIxM4nj1cBEHMC2VSa+vrzf2vAaGowp39c0zajQsiw7IdKn5NkGEbKMEu
QnKEIREPuaS0Rnm+7do5TktpJONyuyNhu6cTSpJWLwmkq7wHO86a1uuebTs0jjloDtNlTRzp7mOA
CGvvaTUnBfepxrzRi9zl8cW0NFz3ZzpQFRfEz50Ma58NY1n1NKXeYWuKTbQKvLcaPZzx4fQ0+Bza
1mvs8GaxLvvrb31Jh85zd59HhRx+LjbKUj0HJdkNtZQsQqF15AXtBXtnmNi8tA6oYz9FT7aqUp1x
Q54lieXTb5RB0CTpdx8ngDVgqmUP0XTg8TS6XshqOUoAY8hCR/7zNWrIyhAojoQW/9Kbk1nhTb3b
v06G1obo20i4IhAWAFSkuqdECCjSXpl1He+uhJgAgguhcObxZFIXHTcymiM/q8M8hJMyMr53OvD+
Y4rrULgfWlywlB0wSEyG+ND5NRp+gK3sFm63fANIUBu1jYV90FpZoLP4EptzY6Txb0ulC52dzAo9
rsdDb5y7YiF+uiVNwxJkc8DtXVXGUNcHgOl+SUsIR3g1ttDjjLyCxPE0MKHbTbRfB11Wj4sJ3m5v
kSbtWjj9A0M+BNCcJOV9ni+GeIkphCojUkfAVXJRomaFyCEgcd6GuBu9QftSAh2PQ7uZWPzsYMid
qnMjypj41NWXfBz56uzozK89S5u4UFIOE0rm1u5wS/1KCR8MSKhuNpZpxh9gZLENE6zFfUJ7/si/
PsPQRwDzO6CDYWUqCYPZLsFP1EgdCG/bONUYwCkrKEpLrHmgrlUGT2hxPnXp84I77HdBFCX6AURg
0+q72wrhPT4VfLTd+XbG2QUUmXN97v3vKI3n3zplzQBQUmwUrSa6IF7MMOSrgb5GInusGDevvro6
dXOeS1LXmYLBvJ2RgsNznbbHyHbGdgfWIcefO/39K4r6JCAWnmpjWQk0OtddMZ8cYcDQ9ZcyCa30
gjRDmGc77zBkQ4wk/MlTKjlgwmVO7cc2Wau7U7EkGAH/OTzrPDdFalTlSnKT6K+GuKVtfPvJzUFI
DPkQVRyjXaeZ7WihOQdD5X2nZwtx5nWCF7JN28OdclrvWhJ7XwHv/NNUOSQ1ihdvIRgyAaNsUiVI
SPtkmWs8AlqiOBAAkzzaDNGKY6bymCuc7L8xs4p3aw06Rk+3l8GDtjien6+wK6lNHSq68UGqnM+o
TVeVu4U8khOoH6tMrsAJRj+k7vxLax5okNyiwx7gYEgcqyWAHna8vdyHsMc6rue8EKQXvw09BxSm
blAFUBlNFWtMwPv7daeujXZfMk0amkRDoEzm7cCUfs5/RfTkKm+f/uELORC2gJ7rYRTWsmCi3F4K
BQEnq43IlKQYkAVNHR0ijwR05QQye0aKY4Aan1/gedR2nSKRzUkdgiS0gvcJT2KVHG+gX3gGg/TI
s3RKzIfKVZOrCZR+EDsLEAihKQm5Fb6bP+yWtMoU4pQ60wbaQBWl0/xftDzgwKoMjbYx/m5Iifwt
XGwBP8AXYlSRbTqyowud0D56Z0OxEFU9zC9PyKeawQMNkAs5y7dRXnaWf/ZRHNrcfvHqDh1VYt3h
KthY8gC5h2zj1xS4zOkSu97CsjP9NiMsw2c7ztSUQx55dwv/khm07nLDZhBd91IBpHREpt7WFAJV
lmjH3Hng/DICCNP96L6JM6PsxGYteXLWR1H0Bmkl29sfAfScJWs3Hs30Tk+CrN9JsBCgF6a4Efqo
3eET++Z4rhhFBO/pPSyZBNGHTLfuODJnIDPQxlJkX3twRgnPp5HMqejU+GiW984BMkzt+SCRCvOf
7wAACL7aQHSCLlpfzTo6kkJ/n3knNdiBMNQNz8xyGznNFhCaUishoSIlvZAeEGznnUqFsNixwr+O
2Fz2QBKsfNBUafT7JjyhGARsMQCTSbTsoIPuaSUUjplghRR69WqyzIaocgOLyO/PgWCEC7ieF79J
fS8cDpByzsqYZoehwsdQNw1ErgVjT6nVQhCGTM5MroLiBkuVezKJLPY9x44MzQgJWBoej7yPKMde
1QrNINGSqRymGQq4psRNMvU2BECLukb6os+oSzX71KkKU24wNODdP1EWMCSEHQ8oZvJWyISRMOzm
Rm52pUcGNnr3btGkVv1zg5Us9QaD6kcAiGpLuWzFzA/oWD9KXeRVwo78rEsUcdxKzBboSAp3j9Fg
UQUDcuEtI2Q5F+xBMEcui+iZrY7h8jSoXrPTpKwEVP0sQWwn9oM5prlVXYXyoSMbrwQ5Cb/Wtug0
0mbKMq0XeATAm2QgNWSGX47vTiRX2G/xZ7rmPUYPH+ZMHPuDLOc3ErUQ1zGU607MS/Ic6/aCxwbK
DBUZ/2gbUwgh9Yn3RVPgZDdyEUXNrAc99IDOndly3YXMsvavJZEa7qFnr2MXOjC8cB4quDsMirEw
TbLMHZoajbwl6y93mdL/ErUtahb+24bYK4aVvgm075jFsBSDCIeuAbuDRHZQ1JR3G4KTKGN/MR98
450YKL0SHYZmHz2D7mtWScFjUvXS8LxjJIYA23DNI/oOzT2UwMQ8prWCTmNKbBp84CEI+xV4l787
jmISAdBHBVF9Aod7xQg8OyR+linMPR6NbLL94UDOSQmaqhxPdbTZl1UB6v1rOT6cxPRD9K3Yc5Pa
ttfHq3Up0RYq7Ag/SwzoRMJSvXtWPH7uWD+cEqUWxOs7x75tfttz2NVZrBypnAQJCijddZLk9DOj
0WY28BokoIqZTvVxq9IpibDYPqjcaU96IjDknVJ6Yz+Opruw/p2jdJvq4d2SrXk8dfXEOW1L/kOJ
/KWz0+HZyrbPiCwsWHSgEvL7DkDtogZ/L+dtY5A2s6h2lSWFpkfx8Achcc4es//aHD8vw8YZTsS6
cEvBRJr6SFo910605ykMMI3WijWUbKn/41BOm+psKPMYmud80ngPuThwvzMqb1qD3xkx6cyGLdf0
6fLFV6lgFHvNBALnL81mJxKbKb2O1V7cfCTFAglJMbkOcTdYhWTfozZsk8AsaJFX3+pJarOHnsgE
1I6wJRYluPd4tfwBuk0ikZcVWvshgC512TF5NqzBYVHffTv+4Pvd8FliTs5Vbg/r833JB/kES1dg
aNrj/TjccvPvxy6T4AQMQjGMQmKcW4c9UeGY3Jd25KnmKBtVnzgSOXs3cBhqFHBltkblFd+N0HTL
/asj2rY/O267TeP/8rkratuKd+076+U16dTCAyzxwWMuMLcBB5xXSb/jnK6XJaRgVBOGvY37TpAl
bZ1aYyD9Kt4gl7e2oBatLh1iewwpPrxw1TzxrGXsBFGCSBW1pmsISvoZ8RZwzWDZxv2zEyICdNEQ
ze/tmfNq9iEgJp9DwEPYysuw34eqVxpbjgfmqYUOc4LatNIhS+OqoT8WFcd++JtqsWcYGCfOX2zq
rpFJ4qtn5IaB36g8hUGR7UbCerRaHyrAIfNow/h7a7C/JVdt/7ujqHlUvVM7WKUETqnb7O/W92G1
VGqQQMVGyjTEFDQNo/EXr4Y49uSRjRV7YrCz9OJulzkhEHc+7UAdZtPVKMqZqN4uLDXcBV3zbc7q
ReSNPwylbE9K5fzZSNePeYnmUONJI5G7C4cwLjPojUoLiElPTcOp6nRxmm4JMwKpzTgnvejFMWA7
BfZgRfoZZJ9derXZstWkJ2O2SilqpPXalkEKtlk1cToKd4oC4rC9iucdNcs5VUuviuGKW2eAqEJh
C1gSzNumqnAyNggXjqZZifu8EzYeUqcFCzQ9ShwjidWNCZObHMBqcOVwGZKImZSVGXzs13cxQowX
6MHG/HYoa/FQsv5ODWpzk5zrkPbchft2TS+m7YynYZVP2oOIHEoAgC63Pj81j/lDhStuzYaJACld
tyVfzs0MJcf+o6MXuH9Ku01XLTnh+laDCr9nUUhS98vqJAdCrtFEQY85IaLmjjA6/CXDLj/pMWEs
MnV5838UsK9E0qYp/1x7QcP6Bc5eP7baEg0jxfwfry20EfXuV24phb461+TOBnS86hobVcuXCM3q
NL2geHAfTxzaLsvCz/5B2/+7F2DBxm5KXNsspyBpcsbjMmwdgrsECkjty+Znbw60EZyr88CD4etG
KRLGTlVW3k7RbxuJu82EGT+gHZPuryZdHMqcgZJh+L1mXbL7Ifl/l4CjrtVqQIrPq/SDfsQD2Lok
aCUVPFAoWkFBTGvvLXfG3NOAX8kWJWnPkO0fBDGQ/uct0M3dXZolZ5EQiZbtRKAUlJbKhBo6Fdj/
ckApdQL+nmyBf0jmyrFKZDUZ7bmONh5Sja4Lpk2xSFM/msCVH4tkN6GYEsi0HcjXa/21SDA6k6tG
259cR8JZsfHqVaFdg/4eON/Mw9ZFPKiSDZHA5Dq1WtCCmi3PGSPEo4aSxmWw2havVHy3g9bQcSdQ
q03tbqaHxu+6Vp1J0nsGbY9j+GJFvp5Rz+R+TepXLBxi7Ujy64QjhsrF9kDWgQnmxS6HytazVERI
2Avr3K8nUvfiFnFeQi4oBcW9rn/qywh+501bKoQZn0Lma2UKm1Nryc+ib+QwJ/OAxD6f0SHl1Sdu
OHh/2pPDfI24V0Gfe80iafo4bYDBlxvFB499MTHc0KOjsUeFR79Qcz00r9kSUs3+SwWfTItEEG9x
vbvK1P0lOzq1jhkoAeFLUCgReMIAeQ3u46mhQZkoHUwN97V0+i4kYKad2+Pvu5H8y3KTm0ak+om7
jGdHXquDME7yVIlLSYdTrjR/eVh7MUco/68lbwjwfg1ifV9bpiHlv9R956iylKTzlwAZSUztn23/
DuiMKCYpUAkHDwj17Fz4FT8d0hBQ1W5FLS6OhgJj8GYWmEKd6wr6hkwq1C9/imHA8ikkp13pS64a
6X9dXwTmB6aO3JOqKdqxt9Y794cD4AC7OXIfhfXwtJ0KdPH6zp5PGzJ/XxKUxDEXQuGQYtI41Sph
InC/9pJooZzZb2j2IBzSWAQo8Wz1YXGfnJau75FsNaxHndsQh4yO0DkidKmRIqOMmcTgpMPYZwF8
z2ywT2SQ0XEGNDkWKeh+qk2+oE5VZ76mPlTTjCAM6sf6UPm5cYcGE3EwJ5dTgDTksmioGF3Dh4vh
WHlaFJodzSAUuDOt82C93MzbDN/ZuvkyTSEFi0wb1ZkSNpQZE6roVEAwA8FEdraYlk7AX9GCuKAa
b1bJWGtCT0rbwOGdNcfkbhndnc26mD76JRj5PU0x1Y31xOBr8gmL/vmqNQec9JipnbES2E6ozrOT
fcUZPQ1DCMSnsI6MeTQ2Wr9SWDkBjI91w5483wU1G2TXJDRF6Dk3pCRrApF/42i+07GNwuoDULrf
37uPJ5MU0aDHNgFb292OW0Mt56LZJFXUhiXPwL+OpyKjqKAb8RWAmxITiG365W+ARZWVk6zDSpFZ
UEM47qI0rItFdOw7532xn296RSq1uInu1ej/HeDKSEy99iaXSttUBb0NbN3uia3FJXPvoRYx9hzC
wuNzMKiFfuWU8nLVhTw0dRLuBg19VOJz7NusL/iS2C7NXVmTZc1Q+fetZtCvG3ZIXgA8LUgbLQd0
9tZAIzukeLCEXXGVgxjrt0t/pTag4pZYDMLUoBRVglfrEtYSEm9SANFVGB4H3/4PIds5sTN0tHFu
YG6qGQbsOhlhMt92Yd7stDl0/pgBL/b13/Rt3oXPh+cxzx1+yVxWvCovaFFiY8/W6zYmhY73LdBq
7AZQ6CdEasXP6+BU8UYdGOAW3qsd4mCbO/5x51UjMPRt4lQBRm21CIA7jkcVGDz4GwWWfUFd2Igm
+sdO0SHXE7PBsCzRmri+TpNkbvaMvY2naAAWJLKq9ZFb+wNpW81Rdif46xkbUmI1f7Ie0sDHwckt
7Ih+scftzJRkD+mnX1l1DMQLYJ/wlNMzXAzNWZI3lpUxP43QWGiEytW2dvMbcXCQg3vvyuYAye0F
P0fLCdKy/3BZBFewFyoMN0b0cNVOBSSIBuYh0CT/e0W9vwEtkt1bg6KQAJb6/WJBAbXVjBe/YyGX
fN5pz1athIjuL8ppa6VwYQz4dDHcmFgVJfKrVBhrC+J233Wfyecg0iy7gD08frEEMp9hee0Qmq4S
43gpZiGoQdbMYXbD+rd/fhGjbkgbUha4jvwD2jsdotSiacQrQNo28mSWMrEcmmk/gs+BanHVb4+K
pRvpvVedaXjUgBGvHdhbjKX8WPfsHlcnLE/6Lv/x/Czi+ZG1ZVBGeCfPVfRSbyEteCB+t+QaZQaI
dNZS2gVzRjzzhBH5X1C9qHOjxlwFtrtLE/8Xnbw5gTYG+G3KsQz33tbmoSFneyYKVEVK9SoZ/8+M
twpCD/qfYWqpOG0fEiv0j2yZ23Lv2UH73ES3ADLEBzo/sm16mJpc5Jpn84t9Wan05fYsfxLTUZyz
xaOHol182mJWCDKpjn6c9ZlgFgvydoQ+qRsfzQsluk8nJuHRgCiaPvIHds+6H4vR64PLuqmCrS86
VWsHnDK9Cs8al2I8pqDz+te32Rs/1s7SmO1P8wDfEAW0ungs9O7pFVjavrPsnkK6m24AhVJyx+si
BijozKKY6TXH4ai0soqHgakTBIJL+k3xtgCbmJXuqeSZZvFkfNh1ODelqlvffQCCouzwN8Kao2Gb
9MakYkamcbbtrcwU6Cq+ul90sjWO60qYCSyY1M4uXDLA08D3bu4p66itcmJR0yWotrk5qcohVX1v
chfc1iD1xcj+1iUNFCCXt1Qfmqe4jNdzQTCC/8aX/FkYKYLyW8fMskBfeHjBcL8JJ/VQ2PtudmOx
rCxKTjtFXGnMGn1NrXqR7Um5CTdzsFBaE8ol0I+0u4x1BOl1zOkGI/4a5cekHxYPHv0/OWOMdOim
jKTJazxQ33nzT3FqbIKSUJFml0e98/M5B15Pqvjl72t+tnpyJz3/ghtKnmbw/WdndJf+4ooxCU5z
ZpzRIycBCm/Hv9XEG9Xebe5NwUjGV7fv6WurSCcAzWEcE1sQRKnyFsShUzauA1uefUdiKoTt6fDc
JX70yitfaehE2OPS76xWd6AiAm6cWIQpAoJg/QuS4HAmf1NauIX3xABkzqE1YlW3L2a8vwIqLKqz
q8O/0sBQ8QgqGZ0xhAxl8YIeEdXK0L+Ubd9Xu0WJdNJQwF+zW480flrujmnPQbxmkLqnyS5hF+LB
qjCghPqy/9d+6tcqgMUfcKtLl+6kKbAEnkJ5L+SLappmhbJ6EYSNjELER9tQv+EqlMRb0F4YtiKx
ao1vU/DhwdjHEIonViaa3YzDPvWVshOdDTpPYSK7IwX0ZBNzNeb/ds8yatt0cFdnxqMaiycu6qn9
p8/tYqoZDjCvKW0lMFbgzRd9yzN0PMEvMuqXYZFkxmBVuyVwOgJ78pOBdzcUjPT7ZKkBZXSgNmpN
JPGZMtzsyyrUwfQHS3R1Z8pTMDLyZc0IgDCVfxA5sDx43xUIKuAgFuq8ggb+WRaYcXwhM8dv493Y
KP4+Pb0Fo23KOUIz0AGHpuGI4Gc451ubeg9AoUumE+V+G8KRrARWnfMn9XosaXQxgSk1S8G7d/aA
jzgyMRsN9D0OZSEOpI1Pa6QiG7BQgq1L/zzG4sc/88oHj/UndzuHQgBaQJAtYE9KQ8oT9irMBvJq
GJUY3Esads77XauXXwPbAP6BveD+4qHyQlqLGLSEP7+CUcAAc1gG8RTjaTzp0SWYm5xhETboj4zW
lOeYrfofE4JcCKhJl+hpDJLBpPOMHoY23xoYf1Z5ZCNnt++45QbhqRFyTOEf0ubec7SJohRiivHs
AFrP3ZI8izMPy931Zn7BjxzHs43nEppDoIvtr0Iucu+ZH2hmTQ/hD57w244MzAr/z18km7Vz4ZUc
GRtkh4RgK2bgSWxIxVY5XSh4gYY4E/RIvnDIKd8EfuVKYmMMYQc7nc33yMGBjNJ9hdjL3L6+PpgU
srcPtyiSoVteWr9pT+5wXUw0RhdmjKcuzds6H0stzAqP14K7uMsePBVfpLT2LLSWUn262y2JkwYL
Y0ySmBFfhtOh7eH48L2rBl/QhrRJVsyt3x9fsHzw8v4L23gtnj7wJn6tqs0dfzbDwN8+q6wxf+yn
ko3txeJWEJSBm8FdhmNeHBij4s02jMokwewY5Yol+nLDM4bPMzuBLGPtd/H32PeubXa+Y813x9Nb
vQtVMlDI4bNEhcwKItWoHTjnvBK+lbzjDGjllwehfOaqVBSwRo+IHDI5in1oKbgmGDK/BgQ2ABrQ
XXDPey56a4PT/XpuOKM5R2hqRA708wqWn7t6w1pcyI6kW4QDsL5WsRZDl3C8I/1SChvM9e9FFfbr
dNXdD4nJn8Ki5Ylp2grPoqPm3oAeZlJmA9THhrOi4JwIcKbAN1KCo4yRDpstQrQe7mV+W18pCyLP
90ccvVdTGwF4tMcUR0ENEe6UfzELbX8u9OtgeGf9dZYtVGmWyn8vI5ZqOyaj4OWPTfiAFrRLmDuU
1NKDz1LEMgfeI3yLeGk7qcQHxp81ggmjc6DjmVlWvBiJJtXV7nKMUMZjbvdTGJVu4YoZHTa7QvB4
88EwXVWpO9GeGOrVCMMQzPr0vlZbXWfIsUOCrGlS3rLtl2p76SyfUqZ1VF/sQPllfAXtZXY/9XfE
ICqHdqNguUl+TtMWxqkaoyvxIXfOnaoKvc2IMUWsVlOYRS+1JYrXzVDBsmdP5sdo0MTq4/UJl1vb
LmhpSdJbP2006Ueqq6xqPff0LzAQCPJvXokcd8Aq6BnLd3RTiKHNTWTUjNw1hO0GT6pe5ZKhk33N
r2CzL/VIqi5hFL4vNv0B0GIApNu/eL+LxcUb/Qt10JWJYfUS2Eehyte6FaA4N9otixVwBQm1W+cW
mVuyuFK/H4SKrpUBr2t5Lh+6VRhKahYMVHOo/cwSZ7DHjs9yHVXLzFD3gkpyNHxYxiLK6kbfenJH
lRSNO0j/rxWkpl7bV6xuu8YhVQr6AmxUkbiKS8fSw7grUlFla+9FXOoHoiKJ86E9FHcYpuwZSWM/
E0eA5Iixh9iYpJjtH9vvsdudfugLMHYACikMegy3wJITH3ox+GwcLOlRvvQamHVTbqwYT82YkcZK
JCxGWOcdDOW0B5Rf9BcAULdNI9iq2nE+R/K32ckulnwEUgkpq/J2Trvd0lE7e877tb/F8CF/fMFN
QnD97N8RtrcpoY2LZkpM4JxjeLOizQPx2y5HBZc2HmxZxSShX0G+dNeO0NhYiDKFs3NdDO4+MbGE
pdEwi654NggEvvprDxHxFLCZSE8A8G3JL2GchQCbUtj4rf/keAJm2Wdf0M8BuVAny5SPV5Hiyb6e
Zid6Vs5R2nFCYn6meLffslFoMWpKTPh13wdyd+MUNsfX+zSqOzrk2ZS1snwxFlJoKkcMJlQTxiIB
acyoUjVP14OEAVXNP45BBbpZUcLWlXljt1vN/OYuImGbFjpAjchC39FlU3//QagMtwVWFDLdB6Gu
ZDKzk3WC90y1jasOI5IXxha3H1CO/FcXDM00lA7ajuMyntTi5Ezu91KOnNb79Miyl1JeC49WPRll
vFG+/h2rBqBFfzepwciJKjhngOFDinbpP5eAk5EODr0pYFvfUe/E7is0zF3vfnCtSkFf5KcbLSmt
ZUYwji+J2eRjPdcbAwFZh9/xd59zMpAEmyOIfB5Y16zel0Ew3rYaFQLxu0A+0ef36R/IIfxll2p4
CwiIjKldwa/F+2pvgDHUbbZNxqq+yK4YokRQeBvBiAjZ8NyPGWB6SKvlc1WO8nm5c6Xzuxd9SMDp
0jjsJjXNXCJpBycjo+wAuP0+OC1vIOCdRrmx8BYKIeSExXMe5oIYtaoLErmyXUXvaMZXfhSCGlup
teivHdo4f4rz7iXI/YUGyK9tFm8sJFfmF4/bjl7N1XKLdpWlkRdbmYOgEB/o+hMbXXSXAIGzciVz
5xoFQYmpihPnj+rCR/0UhVlI4E0VBbKj59dQmGU+/DBPqUFmhQ5rGLCc4nqpoXSnPApprMVpFVrw
oLyt8s9/WKMegIS8FA6AKVoLSN/F8nI1Ilnyb85oqyu+twrOUmzehZoDe0+I3WgHrp7ILJ+MRvym
CkTgn+PHcnUmcWrMNITHZZvhnOQxSJsHa176a7avt3B2NDUuEnnexz4P/2WmST3Q46nrqq8wW/MM
Kn14mW6cy4/4/JLS1lZW5govoNmOv3tACzEkUZuat0Axrz1wAvAb4cKJDUEoJMjUA1yfCwAU5pcy
OWGFsefwtKQ5t6cLDdLAqvqer9/XonGlhh8DfuTivavUeI64VWqjaOidIlOtRPNFQQWHMAyTCEf2
P3l4UXXGWjETo52ahjOCkn2FhEkZGF4uoYNeDLqa1PuHAnbDqF50DcER7czuoNo86PI77CY0w4zf
vSmNDEQP04z6XdgOgvTfwuCWv4JNBUvHg3f2FUeHWE3jh8pbn5sF5xW3PdidEeFBIEKzXJHw/6D3
X9LwQ1C1S5BR3+YdwiB61goEdL8lPuA682kW4JCXccsO/XxVDv67TE9cg50S/L0enMbIIkYpbMoz
1zNBD/ujmqvZK3wRIFu6BeceWsArv71slUl6r0W0lbQ5a6Uh2e1O6EkGMdivkQDQ0E7T/yoJ7fBk
mGqwEKfzWwtdjESbaIJrFGNhvaDrVvbMZaM+5Zi62tRnOOqYNitL21wuzo6jEPBtUl8W2Q7+ldwI
cBq8oPW74BBiLCfYcu67nDld0465rd60PZEOswOmydDR8+OVcIf+J+VkJ63kbHkgnE2Kv7JH9+Iv
6E7aOJcmAJWNNahA5MNefE/rYlSybj9x7WgjNHkNbFfh1QF6uUZYbsoAqjvqItsSm6C/cYjCUAwg
OeZXS0DHZWk9+k1yn83/sWC3jsMFQL9syxxJaEyAnq8Ju3c7uk31FxB5Q1RbUKHnUmoMRWP0V3OZ
5wh5C0Ez0BLRkBS4OzFHwzXzKk5ZxzmczUv1sjyLAG8Vp4AIhodPz3YHP0ylEPAD89BGOSadbV2H
MmCRIep0bRIt/v8NN3Yct1zgSs84JQ9guAigBYRxy7j9splTQc8FLKrcD5WSmkZVzK+/LyVMlg1g
b6Pl6jR7Kuh7Mk+xfbFAGxjGqQlBqLK6Fz7aU4nLpkFroCaMVIWqMjhV35ITocaU328F699LMGyU
TbKai/6jxU428qNDHuDbM/xLoLegrU+32JzcXDN3x2hWzLQxPWvD0ndaxI70QKllYMLExM1aWN00
GUFPAOI7h3gf10nTypWWydAekahN/2G6XvzYnA+5Brrdka0/ml1gAUDD8BnapbYy63DrLT/aEj3X
I+uEFhDKaPOd4jItfkIFKHyAPC/9MY9g0RPuSRX4xzirrOE79KpdSDEAMm9QVAE9Vt9VRBhHBkPn
J23DfLHTWVHtf7aSinO5EOgBdHxiwgik05Gte6ecqEOnqIwuMmg6YAnz9wyV8U0Uvja/gdxgRjAU
cn7Ut71qPMWIxi9/lkF+fazN3rt8VpW96FKY8F+Nvt2/P25u5aYFtH5+IITOSqF+Ur8u34kuGxeH
rYxJH1vke8E7tT2cN52sDyyM7tB1WaYsTvGfI6/21zBXiSbtwuGgx49DClXjfjP+HDm1NebuJma3
YwjYhIYQUNrlNBOQW+QxigNynpQEJj2d2VGr5t5DHZ8Jo3ClGAHJ8nWfWvbTk/8O8Ytmsb385lQs
hh/Yia1nxg3ur0xrpWoLxduNa0HG1XoxUoCu5fRbMGR3lwCaWgrXTOV78lMG0UgKt0NE9zGEeGS/
tHIggQ5/+4v+Ti/dalq9VEtG+uCCrGvjNIi87gf+lABqrdJUYLMZIYezmumll5k0e4jXK4DSBAlX
dHobR9s4DVFvGAHTPU/YRrj+VluJnJojIbpJOrsjmqPtAw99ba9MJYpCzCXsW5QvdTFxntIgOEoq
wtpsLQ9A2SJcZ5PAp3qzjbWGPoAQ0qLqQiD9F97B4d/W7yU8XbrE/o9UYx5c1c7XQzEgKjseEq0O
cOFLAnbSv3fbLkH7g0f5JOvBFWOHuN0A98LaxhQExsgA0ffdEo1t1BhF9doUf9PhPCaLkvm/jEFM
oJkbs3cMWdt+TSxeOLNP8lnp/FCcEiqwahulq+Fo0xCkdOZMNEfi72W9WX+x2UP8KN/UU/C12jTn
m6ypj9jXEQCLQNpmng7tkUARvpLUe1sFANIQTXpKYAlhqfLXXlZUf8JSZfpDUEZ7advy30A0QvSN
DT54nuEcl185RimcQ1HuuJe20hADAQKbl0hkCpkFDoSFWRfxRNa3UB4lmzaZcVxLUNFBkUbxzFDQ
+FfMDCPPwuJ6JdfCWkqZawgwwKX9VfjrT94lsh6faqlIRC/3O7+sUQx81qrOLQsR4UHq/8hvr8YZ
qkkMmPdsJnn3xS90wU1Crq/SfVN0uQtTgL3TKSDvgUEra4TxuFM8cf6pn5Da6/boQQFBjri1aerv
Sjfxnz50LlPDOarsLxOEa/F29Z2Lxae34AT28pLxsgHW0l+YdAiwvO/7Q0fK8irYd7Ici+KEATT5
Jie/Fij73mGlsL5kr6RbQ82nk7I7gyEOylOjmvfqBjFnAd536bfVQskPtaPm5/Hm9ZjzO3RMcD2j
y38qbu5eX7JGPlYw1klkuC83ufkzPortKDgI69OMApmk4GgEle6fnSGpyIfeuZ4HGsSDeI3IHGdz
iF8UypE7pC88JrnHjj/KXTiHjNhIYqkaX88YAwmxA1hCZiewIFlQIDlce6NsbCQ5SAXZE3dv9nLv
NzdWrFh3ulis9rJDhWFBBPJAVl/9sn4UHhp5OIZiyF/zvPGRzgtTEK5JmUwQSNSX69IJXQAN4glJ
+9xJdofzMGqn1iKlNsEAOCY2ZVZeZ8ns3IsKNSINRbOHN7ki40gF/E+Bw0DuvzrlRFWz7o+8Jnoj
f7jnq682ReH0j/zqCoOom50brELZ6ZhQ3yfG7vXGTPXukOtLHgYLEqKTGasqiob3aHHfeSjigst/
GLKloj3zy/KbraPa11B03lgJgDPy9MPRya8MpNbeJ19kf5hR4UdbpdjbcxUP4ZYyPU272+efhzAI
nd/T9tQpJFpE3KYbJRGH8AwCuVsW0W/KeNdo6MnQrpKx8REk+GbzLpCXz396wybA77BkPBwEj6Rj
BN576GwDuKW7K9ia848RDGi9bFYFAvEgUWMy9HRigczys8+NEEXuSry+lu1E90cFoerts8hq83sr
hH35aV3BHYX2NGJZUQVSecw1WIXDycT1AC9gGIlZWoV/g9tH6FwVgIIaSvjF4X6ohQg8iJRarOeh
MREqa2d0vDfJ3F3SrIxaF7xzZ8Tk4ITTxENkmlQRCdDVZzw6FRrasTrNeIx102PX6WnZKTTZ8osL
WiaiJriWpiRD4XNeaBum174Vzok1E5y3d5h05JWzvWi17x2a/0RAN6zJLcw95z93ZkwbVVyVtTJy
efcM2PHGMMhRGaj3kA/ONtWWJli6gCIjztSqS3701/KY9Pcg7MW79ZTnbmFYjyjODd7A3+z8il4E
oErTxxnfbMOEFJu7Js/qu8v42CCw+LeQdLuxKY+UQx7H5NQpU1B53CT6N/I0kPV5QSXyKgF5c/A8
99LKilaqHzynV2JVukgkjMd9YhEiLuboYgBW+qc8Cp7x7HfZhDbMahjRPGxB2EtPKvJdb3yOxS6m
2lWc6JLlo+waTBwsaM/nuf9WEUfNQgdjGn5dvQ6GhYaQIuSaisoDEWEY7eY1YNinf7rHfnDRa+0X
8LsVZWjfwyGIeA/dcjp5B6zrLaImfLhEauQqJUEyZbYr3lEJnWmSV0IeQ02JhiDddbXbfnYf+Shy
a0MsA/58tTFkV5soq/nhtW483mh2eMagJMwr+mdXeT1Tarux1Y+MKDkUSFt7PGZHM6tx9HM1jDL2
tA3jz98ZWacQNPyFJ4L7j3v8lO9s9XQS1MA4bvr45IMAYy/B8+moWG2A0gpsQb2DEJVr0EjD8tQL
ihCpkPnI1UDA+eh2wfI2JjRyEeO0z/hU4m2EvrbMSEgGNaSrIfNrNjGCHT19E5QbVwHkiC1CYnMf
lrG6phmg0L+DbQI4ciNpsXhuA1xMdjTLFR2hKU5Qn1nEpD2Fc9yjxtHgPMsLsXGK6/7502DiKeYA
4AyTEjhoXCyw3GJ8NSQQ6eFhaI/U2cS4Wo88ew1dw8rWXAqF3+CUSn7a021sKAY5TVJF8d7Y8fJY
1pVnk+hz+9O9WgZWdwhSTM2qFFEwco1FMMhS8XVCFfxK1Bqrpu+6e2NJYriH634JZjTVDwL/iy/E
vd8e+tze/1enZOCEdKNEF84vNnZ990tPGIQ+94gu5xTXqYsMzFiVY65H2DnQtyOIP5OZ8XSkXzes
GahX/++fvWzo49t1du+RafPn/TgumVm94+WZtSUubKQKny8MG5B4p+q0X5LmVZCbxvn6pXY9lPPA
MwXkP89lbPJ/YyBgOW+wnu6rJKUz9+GmJ/4CdJEFq1usqeFM14gax/LtvRmIpdKH2kT1oNI1iMRK
ZiJNOg4M4p2Mo3k8cqVAh+5cx5FwezeZC95EyL/zP+tSGPTTxUCQ1UF2tYFC/4O3DEcFreM5uStm
4WIfRY6vejRMKkjg4Wt/8pCovtqzHdNU9wK2lM/Bx/ed+79I80lWZLWfqK8TvnOGFGiP8803LkMT
uhpWBIc5wYh4fRI4QTFpgndx99JbDIhErPL6DEj0yEoa2KJQwNTYZeWT+0hbQnmPg5hgrIEPQ0Dq
61iKTpIXLe/4zrpHR7PmGO/QdajfXM95wG9y+pLJSsfOJXf/bcgi3MFa51Vk8BNXZM+a/k9M6FVu
q96c/oSLS2ZIfcYiakvBw74yv1D+sksy31jQl/yvZaho5bUXqhdq6d3oIj3TE8StOkdByITcbxaE
Dk0O1awGmSqeSBeWIVS1uFU1o58heegGfN3nh/OyhLT4JoVFfJoDOZhZti5h/erWMvz9Vu4x10S0
3LnkKLbVK1u3oWKjTN1FA5c1z8JPHPSKWZ+Ua382wgE0ytaM7U5vKfyX+iP+SN4PL8DBwwHdE4on
CDwHjcfJVZDZXK4OKyQT2xvHeGm6Eh3lb4L17AlENUxtWM1mM05ThVa6hz/ElMgmKZtuMPsOJNyA
tJzebswZ4GCXyembmGtQA2lzldz9vnxmOumt4BBtMwqAv7EDfxi4nA2QmYAzfr5QyvUQk6M97Eqk
9LdM7GoeyEZyxMHSwHpjSeUl+V8qgvNABAFmLgg9Y9Wv9+sNkhMaWRCKFtva+s99T7OqvxBhvLT5
lArMblQHZF5I+QfUyodhJbZVgFwE8SlHLfASV1lUz4DGBBI5BczH40xdnhoBNhTEHEvHfZObFb/5
jG9bq3Yf4L4DGhO9kh7gPY/4WDegSxU2mDbWfuPngQkd3SZK8x3tUfa+b4h2SMA14cX60PHDZ5ML
7cIIV8O694Vw2MV5Ssj9GwoT05Qv34voa/7kOrKvJ6YQh2mZidK/+KVycdu9DwIZWQibK/UHFTfv
0g940bvPp7eKqcv43qO/BG15UQ2M6UI6Xy+OgEvf66NRj3bi2cMFkvxTUkvgDa5oUE3Rl6jtuQJW
Pb/f7d3kY0lBKE8r76D7xMv/HB2P8CtK+tEjTyUPHLpPXaSB07INNFkXpq2gjaDbcy1ITahTEWhA
5UjPj/vQfX66EefgVIWr6HaAJvh+5xZu6RHSxTnrNCRmnbIBoxK8BF6C2aL4k4ewOn9G45ytXKUb
dTsUxYg+j/Yo9lnQcLY2SSqcXHD8f9sdGE48V53bRgKzRhF6owbbTohEk1uSrBgi1odIXLVll+vS
pOJYd/zmrTnfmxacbqFAJat4P88SW5LrliQMdICV4OrthujejHj0+37IHXF/ogUqgexCoYdS/lAX
v5gluMFWB+GkxwXHDWztoY5GWJDNacrD+Pr8rTAhaqk1iXcLVnhS6zGXDEqrnaCcQX+WxF65xsS8
QwuAr5URbW8y4SLKdPuAvz+dSyXIHv8FASvJd65roXfpgcwbvs6YGF8LtQeonLPdDXoAjBfjGnza
DHoRblqSAlAz4VG5VxwBrg613tlILlNVNBeXEKHilDwH/mv8WEjZmmCc2UgQ6VqenWV/u1YS2/4p
+FSz4/f7Ip872/27OLNeN1iFm5A7typLTJmChQbGQRItNU9MmoK1ERbe/SCZRfOYfuouy5QQyYku
R7tiMOJd1c499Qwg3UocT9ky2/dZ0t0lZAfvONg/ZZxiqgPUfNGmxo/tH1twl/LBbrhxQguPdRYJ
iNJP1qLDX3T5X9kWk1T9AHnQ3ZNXMKLx4YAgM8pL/9xpfJtDWKj6C0qvyx0h2++DFnWXx5ZWAV2a
lIjWs2aPUalFeLxa/557H/rx4P1dxOe1JbJbOFAAMlx6J/atKmgdt3nPaeHEgmaunp9iIvnBosRj
Isyh1B1zYV/dIsbzhk3B9OlifCuY4fuxD3tl8qBSTbez0LdNoz4zEB4d9f6hfumiPz+TyJSlSuyx
6SaEOhUKE+iS3aFuR6qBsc/hnmjIr9U1CSQI3N0FPcX+pVsNFSt6zURWAvch3xDigTbMQEkYkEJr
/UhJdb7C6emORhdESNP2m3u3PUK3sF5weU1r0o3bn3GefvZ2Mrpb96NQpAooh/ack+43hj85xe8J
xhkOBVqfOGAA6t2LxvL+siQ1pBKXsb9OKLbYq/Psy+TFCQeAIt0kE+kgjVaN5CkFhQNb7KyJDaUv
zMu9wuhXdqNHAWqmM96CAAbQiApzT4lbOWYIxET4qtEbu4eho4Eh6lEGH2lQBH1K0QuLAElaNIqE
92tj7Ro5qYSPGzoT+0CECGRM8XDilGQcmetL8ezhMH9eOAyFIOCduK93cuhWlvVgUCrCxtKNHGag
Ns9/PVI6UcieZwsobiFP24hWtavZ7IlcgMD6Iw21tfRM6959u2jPKyPDwGta3Pa3zDODMjbxBZvX
ihtYy1rupgrceWtIA9NFXvHhWasO5gTDEPWbBNlOAmHvRWwtqKqoHWKZG0VVEMlgdQoK3OKMu3rD
jpt0tR5nR9oeJPcis4Bf1NFmYpPPpK5WhWxK78EMGnrp3kKzpuONVvA/RosH6b6T8ZIC3dzph0GH
wDqwJFxLbBfi4yhr6DijHdwY16NjBLK11CAtdVelg1xGhnJQABHLHAqNRnz9zxR6/hd0L0/sRs50
DRlUG4NgZ7p7yGZe7GPytRQQOdFzUgSDavyVWiow/dhbZm4EUHOatGeQKofEfZdweSUWaXx3R5Lz
7k7V1XofsgKOZq+fxJC2Q90g1MM+lzCYbc0oE6YSjlU18yJkZ550l7zs2CQcCZX4ou08Fs2gPVeK
+UU8aCOBLYTeHqCqtYE3KXc/qyQ75xpw9hRgLjmQGM/PFqxGDFw68bC7CuhBWp5D3h5+I7hqlFaa
G9lpu8laTBO6cDPy8178UVArhVd+T2Pt9kgL30R7Iobya1Si0AmogIDILJ/L1UDvowSRCI3X6Eig
vjdy0yzEOH99dhjdA+Vz5uWhEut3BYtgy4NHb8QcAZ25l6/s6Dtwq064pxSoOpo/S9OyB0c90Ye2
jL0ycdDteLFwbrrLRSKp1oMh9fDWzg9Y3vGiKo1ygQrUWlOeNK+JWVfrFOCgROXfOREV1wq+5tSC
tI1DsFreOGE0W1+gjjxqqaGQHhQdD7dXMWJ5hTrcjKEtnxJU5UjkudSKh/5yae1rcYX3RTiSkNGl
Xen6bQhhoiNMzKPDih2FhL5JVWYXrzsIG0C6fjJ//c7CtXijMHRXF6YKEgU1WWYxXwx2Su0BAcXo
Rd4q0pcq373XmfyjOiSA2IabEg90Uss7fdXFg7J4Es5vxtwYolq8Cngp84zJTCTESKg0oP0Zxhlb
Ri4IpeBz/8pGQuDhXZXGB1mRMOkd/0fL/y0wvZ5HUYs+GTIJEdiUoBmZ/ixghb1PidfkaEP4NjRE
NV2pzNuJpG5sp2/DgrKHmIxi26QK4c/biT01mvWSTzQsEDy08fzn7/tOpLF/1MytbvA+R+GBJHG3
S05tHLObxouPvlOSkudmshZJWS9KN08xyLzKe3V00X0PWNonNwlZu9XiKFihcauKVsmlwKRqoblz
PwwLPUp8bBctsTNB6FXqKHjnZuKW94jQdIMItIPrVeB50YF0RUvlQbms+xP9klY8VFPzVsVQBLzi
cgxg1RE6LTP5Xru0qYsIBpDmOcrdSJ2AmlcSJhKJMJXlcYd3g1gH23Q6mo2alQL+GvQLEGucioyK
BjbZfY7fUaV4djyEUIqSPu1eK7SyA98DoBJi1HK1XYIx5kXktQlySDRVy0AHupFGFGPAeuQD9hPQ
QOQJ5rJ8sPW/1hIQpqOCPkEKQtXmLVFVXLrE6T3pu40qTCSRTASNTFdmCjRNdd/xvR8Psq7s199I
+rQrYYVHVSSefecu8CtkGBRsgDwzh0z0vOMqMsvyPXJiCBManb9z6ePrdhr2iIUIRm8YKyzkl41G
tbXTF/GvYfrZY3OlFBDOOx1ZzfmQVc2LKLEDSP65y9pNsbto84Cf/aisUVL1GlU+BJFVEtirugto
W8qLB4zta1yGmgbXK0ID4ltrqxKF9b4CBr9Azmcxl0qvwR2u6JA5UJSHSy4TrYBkDbfdpqEn/6uS
MlGaO58y9Wi4w0LnnvsFfvEM8lYbddBejShYIirn1GnaGkxz3Q3WnNxComgqvaxE89uHrGyK77io
JbfKl7XRFG1E0TZgi0JRycOairKZbXzmM7TuXipx8M/UoaDurg3dXba0h1oLlSjJn11WW/OGH1tX
20QHXQISBwMum4aIcWnnqPul1Vcc/vVQRsWIHgR9JjOOgXKdXTgM/qFrjTZh19WP6rzz//Y0BK6h
rcXQk5OZoZpzSobjHHX5BzkmEIfe7GYFT/cz/EW745FvvpFi9Fof8wMbv+1/yZe/wKqOmdMKToth
CcKQeCG+Mpd5T6QHYuNum5Lv8SF8Xu3M82v72VmKmolknHExoYFw5iINIartohB/bsOrfNZAOa0g
Aaho69OO5ahkzoXmy41kp2L/k/vuhprDZq9v+rwgc7iw+Uc6cG56qo/2mOF58Wbw2oD6qyS+kDmi
3kTLMli8L2pAGp0Kx0mxE2+gd5uloD522xCGlSsCzmiz05IwvwhhRd2SaNY2fx4pOSnMrBXJ4AMS
xMbAcNpzmm6kEbFSP3N7wP+OTnnh/1Z7Cti4SYaJt3XQmOyaLjLkHKc2hQDgpvpyoufFNjIdOpfy
pWvpXUyAqr0Y7wgEoh4zG/ClLfVr9E5w/6XXZDPqrqxsh725HiYrdbpBwieAivJ2AJxZWfS0akpI
tbFWMw7uq536gjNoAC2FCiPU9apDmbA2eATrDQFi02w6zpeEh2ySUGwJDASU3MMce5Y+q/W4+RPk
etfvPp0eP+/EYynSJTh8bH8mGVJ5rR6vg7HTRXFkrpyuGq03eX2hjNZuWK1NbgnGtx2cuieHkY+G
LEDwdENG578/n2CFFZbyqhe5fWkVsWGyCpdvdO3cZMrwpO3FW2NUtZfm8TIjBEDaR7d205Gfwcdd
o7hwdCNiRPHRXGfV03Vi/HT3I3bMtdMPikEzcno2LHUMmZsGJvYyFsJ/IZByzIprUdKVsMAJ9jRa
dPVB24zobA43k+RfO5s3Vy4lOcDU2JbNDLiUPtkDm9ASKBWgNDsHJHzM9Uyhd2KsH2rGl1U6ZTMX
T1qpRZlxomgWXa1mLJYEmd3znw0KHHl+JX+a2PU3PBOCue2mBCH403XKpP/+fLUvUwAo+9Qg3DUL
uM6IaeDhu28LvBcQkE/BYSHjS/04e2HgXMFIdWsPOTw1YtzkOhiAPAfmOiTx6CxOAZGmHrqYabLu
BuMgK2ypVXnrbpaFz7OilhjgPG3yfDMT4W2tdPzHv7B/D5ZQnwTEkzImfhfiYHAytZPjcv8sSVXf
NMzEvUzjlkckMixK7AHoR+eXsWPygfjXUeuh+fFv1/36m9Dek74q+ruK4oz9aRn4z5xU4ID5eAzo
neUyKJeze9X1F4D0hgA6xbeomFdllBrJafeGDI5lwqTBzdw4tkFmOczO/vPL80yDL39fAbAzRoAm
fFdo0Q2cxZ6WOPkNwd4mB/3rLADFc9eZmcoCK/WX4emFMf05TQW4I+/SXnN7TsH13eEbRP1ln/ZN
KSlXOCbXYAUB8yJ6DeCmi0kXGj2ak4kDD8LwUx4pJXvkqX7by2RwRGKerzUhN6ObYEM0SiGAgH/M
Tl9+8crpl+4yg4r6RB1FliDDX6bVPTsWVLgFRnHbfyEz7oQbbCsFxN03tBDFl9jXsPhYYMx3v0xF
YS1eUJHs8e6lAut9Z+xXvnUTff/0hDPE3qNnSXn9m8BLY+6Etx34MdORaFYxLRFBlvmNRRwRs+Dy
kenKFyv+AkVz3HWT/+kunI/gzoPpS0eKRM8mXRNF0ZVTVb+BZ7kVyQBc+Nnek72/ngaTHUXtIizw
jFJ57tnEbkwKFQufh0kaN8wDyb7FE8pBNhrmzawaGgdDtLRXS/sCVZMvVGorkLmjW1c7tcWTtc5a
1XSiaN18svkF1aE08roLcYL6zehsnu/FKhST5dmUVtvu3NlU4hD1sMr6FlfA9mFWgNoB8vsYDrH4
fAMGgsw0TXy1ee+EtSZIdNyFJEq7XsSPmS9C7CKu+JmZ4Mg8z0+mrZrMImOVrRMUafexvXGAf+dW
XB3Zii3/DDA4L38dihRHa8vvUVyg/+JZgWfiGwKKeOOJyHObTH4Zl+YRdIHoN4j54mORvYzyqWj+
t+/f0LqjvSQEJWbrpBkJHIxWqc+9y+XxbJZCHQRX+HJI4wwLwsYJK6Eo/UmdudEWQMupiy525NLs
HZ+eSljVzQ3y7CYaDuOrKUqVi789298YIg5/nkPrAGy8UKPzJL/l14miSR6zWbG1W2yiqjjn/dV/
wFfSzdWmv5BbC0+aVE1mlVsxU/XiEtOWd5/AsNvBGduuszHZugavmLBndEvw7YPDI6Exx8gvWLq4
Jcxl8s+55BzczBjL6uaMdrVZz63Hq3WchO3puRtTg5d8JXjxYf67NySwmgGP8s/1JAUREfsNpbXi
DundkhfLSAXm/tiK14ZbW8TO00Wm+MCvx12/GbJygOMTfJppoqLGjGBHO9qPVeHseKVlr1XEfhVQ
pb9oSw2teFK/kLefPgYn0v1rAjmX4SUlexsRrWo7SeZEoxFx5kSkZdmZXXfe4s3TGhP2lTnpu5zh
Og3j/S47mokigF96cpzmQaFgeMuhAoa2seUC2/EV1RcSlhcJ93cC3ttAa30lB8S5BLBykJaGWDWj
ao75JKkfpXAWQKmTUW79bk/W7z+JqIrRPvjuauFWvSH51nNYYLQP/6wP25Z2W5rEz2GnVCiEO9J4
vFLyZdEnTUoDijVNKgZPYWLFwksiGwDII7XXuUEgkwilqB1xAJVrOCm70GvjnY2bbhq4Hzpsaksl
M73SNbO33BZ6EOkp7rsk0UjQKwYiIKvBm/zOl7CKVyWwk7Tt8McSZE5S0/XjUejT830AbV9a3eZR
mEwLiSj0EaN7H90ZfC5WZGIgIkVFrNByiuT4J09Zi+H6Q7DCtd+UEBtCE1nNv41PbOT/OnVXgzl1
HiSAwtdbNaRrJEfkeW3L6sNoJkXXctcBQlW7+On1XqEx1JT7hssg0pLAM4o9kqxEFRu4CZrPV8mo
ymM6Z/5j9oDvaBveF+byT03xgOoWMK40+Byr2lbhmEwobyYIT/Idh7af1TKYz6/O/7nWCFlYdMpP
pdHWuzDDBJyzBnaLYVFm71ydu98ELoy5tZZnT3lWQBjo1Q76p5O90UA7iBSMKi8w9YvzTIdZZAVT
UbTIhX8RH2tnJlHHtcO6w002Ut8qooZ3cOfvKONBRL5nWuvv3dol0K8lSz4xWlsqjUPSZ7PUXfK7
Y/cqpgUU8+BnDpT7Pvv9qBlktCG4I7q7HuH0KUBnshuLnnFOOtysT/SS66bXhvqnGUUQ+proXsfq
QEILT2Au9LIGZ2GK/U75Jvrzhdb+jJ9+P+J+L4smMwVyGuE0gnEkeCM8H29BlzZkuKrOVpqQLbr9
nCqortUZr1WRoP7OTPNV6U2oAcCeQWSbBmHtA8kLAj3P1HpV7bWfHVimlNMrL76xgQxI9PXxc6Z/
ZAtM0NYJsttbGSAVnDMOVJuzsIodzxjcRai7S3S5XwEFKsRYH1heU9QcawF/5kBa3XVrpkx3C9Ec
TiL+8uYJhRft85IujlEuLwhP2VfzojZE+x+FAM6S+GvZVEMDxDFOUYAWCa/BQd1UOgEGaok5zPpc
Co7RsEdi+JXhzCA9JwN4jPt7NjU8USyRWEwRGJwSLkm8Fm1tWalU99q7DzA+VNH7ByOJwtGekBrk
iqmk9qKU0zwCghJgZfg/bl4hsDZjtft+j25z/67OVbyB1vy4pHlm1DpWAQObBi76krQs1jI4sGQe
PYk5J+KEtFdDK3LLGCCkpOw4ORYEA6lPqg3eAuOVJ11hOxFMDjdZoN6HMQayb4rHLaT0cXrA6qp+
2nV2RP0epRloJdJ6FZAAlvWbFCj06fXrJ25J900xdNuw+/oejhPm9Vy2cHehdKB4Trqoc5uGiiPv
kcWZkn0g7AAN+HEOgXTXGp/G5Pa8LYW6G8qskffBmz0eJcf39cnQiRDCxK6sMUzHbPImw/lV2KJS
VUs42SLvSp7/r+HQjC0zsd4JYjnjmTEmtwVGH/pJ/L62qyKNRosFanApn6jwlIRIST3Y1/pM5RwX
sO26matxKK01ZqjmY5ilwbxpwwY7G3H6ODnb0bCrsdzOylsRUZriuOPsQ8Z4/xMqH9tWbwmHGtGa
tVyXkDk5EemxfCcVftdtEIjtHJXtSdmUAN/e5Owa+gcaZzrXtp6ZqO1z722aAS8GbQbn33uICLtW
UKncVwUrH/laFNFVjlppj0sM6DmszfDlQO8RvC7VdmtgeMopmHOCB8glveT0ceh7lCL0hkFqm8gI
hSlGPWZcfGKglVg0fkRvUbAYAFpqD2uMT1M012C6+JHbO/op2F/q0z/t2/DtUllGlW1GdAad3BtT
ZeBSkGh/8S7vgip17oyzQlzCAR73vFemlPaHDhwutz6gTwDY+qR41uDxd70AGOleZyJi1eRg88m/
h6WdpVRPvSV7wqW6QbvyDgQPqZCRLhQvrRkCld4pDt7uN2N/Yy2UcGlZgXi7jLtmdbKBOVxxSo9e
XDnhSGh6Wm7eY0oG/6Kp8uWl5k/aZaclwuc7Q5qEK5A4lqli7vI3OaFwBXjKQkxMD/gEqvPlh2eF
f17jW9ofjSQ6XAyy5tsV7noLq0ZiF8rWA5isigv+GD1lh6LLHmXCZc7/4f/Jrhx+Q7iZQc7KIy1A
9wWkKsRRE1cHyK+GhADV7ani30p9KSocUzrmeRD3+wXVr689JIq4tQkhf10PqAEPykGFEdrZrssX
7NnQjfbsH4YRJcJWuDrl0wtMPhCKFK70ce9gZxaaK3t6lT638oF8afxNFqLMYl/qdQDNDBXGVRTc
6Phh4wD/7EhsbplWL7OAHKysS1RAktCJeaT39KQu1SPfXlcK3OsHzif353iGTcIAQGlTaJ3cYFcl
XvRfh3l5hBULBU8y7Ma9NlRlqnxdj4v8cap8zx2OKu/i/NqAw/mZwKyaAbiKX2j6IRzv2JZIU6Md
c/6d+4mTgOdWsk1toJ6faUWwFMEEJzAz+fpXKvOcIH6cvlNEcqEn5zKxr0hgHjGFjTXcFXegJkBD
vXjWFUW0rcfyknZYuQjMUfHNhR+pcj8IXwROul0CfiDTRwDf/nZV7c6qVjtOjKFWV266IEJay4RT
BVAfgOTJLoJZi+O/+JI1P4gmXr18g24UYCbiNLZ23vuTc6cKIhgWpBA79JkGtZ6nArf3A54IFUjB
Do0cgAUeasDcylcClaSTT1MSmuymr6Jor+vokt2TxJNKLySPz1tCWx9GCzDNDMjAZkW0ER4/ThE7
t/tYyJOaT06ba0yyeNVgo0xtINwaE/Qc+J/5g0sq0mve8+8OLTCvegOaFCM9NFHZlvTn2Naa1i+A
L4AiCYt3i09jPnOyaLE4RflIpD+pS9p5SmWZX2w2vsSO/xR4Vv6bE7IKUHVaOrDBRQv2esnPOIiF
q3YJsTlS7JtFlCJ5nYBVksCu4QMULcnsor06s8+H5hWPes3CVKu2M3JecObQs1aaWPM+dPTe3j+7
IfWEVKRxDyT+Bkx0bwtYDBLsQ8dUaB91jKaBsYlusTP1w9Dl/6rLypGQbJTaUieHz1v+E7WFWceD
6fkOylfQhViz3U2ewFXTJZDiSOyVjmDyYGoZc4MvYC4GwEtuDbESxTi4g6C0FzEg36FZIXkoIsTM
FDrSNYyeuiU/eEYX0x6doFWC+kwnTFjBCWEGGiNV8bCvF65LnBgb9cynkWrg0iUiVja4UjvGXlve
/lle+QnK/jJko/2hJL0bm13jKr1GPrK3x+a1qCFRwNRL+UT/gqwEfgKLdss0fwxMipeVkRhEGjWW
Lw6X/T6aMR/lBLTzvGpqpMROVpi4znUPkgdx3oHjKkS+eVEQtMYNCivl1HtLdEyi69CE7YpvX/MH
xs472KsNwI5lR1ZwhX9eTZRywfaC3KajaINR06qSF6T+ORJIuKjeGbK1ivCd67NdrXktXRu6RjqC
r61cHTeu6h9mhvhH60kGcbQP/V8j4uimBJTV32A+dCGz5rhbUj0vnEVEkry7apkTsqiV841TjMWs
yAXNkZwMVFgT4tDLFfWNcxTVa+j3LiIrLUzhK7hkC8EFiUPAVg3p5Vxj1hqfe4DZnHwXkW18aHA+
dYURRSwxrpmk9B90/vAl0qufGWC6sflsQjiNLcwKjlhY+lsR2ROQ0ouDuVVXtuJk0aLzJrIFnNHi
BS7Bnt3z2bhgEgNJV0vCFAImWurO74hR/QkN0swLTKvNFywy7lIhHoRr7moZD7REBsA0LxfCKtYk
idibXqrGTqLvFG7X4TIbb9epqh5+rzlljLoKILY2/sZ3wbHR5PoMlo1crhf1AqBeh7hUTNDrJ9eD
DvKWtJCy6cNIP7lO8rU7aPU0Vcznt7f2ZBWuPqC6TE1ALV594GF5tKgmd92RmJSiySiViuFGgxJD
+gta2ETMxcdHAh8ukAF39PCmLhzMSxcBYjpArI+VlITeR2lijtmMoSIZRBB62GfvUqatJe1X/JGM
r8LbPuVG/Cjj732UG0KnyH6YekfXJo8S1Nzzf8dKxMBdiqUdiJgbhwUFKy1bY5BSAPf29Wnp+z3t
sDUNJooreWyxl+aCla4D4Ct34wsvCRYiZG3OQk4/8vdXO4CTgMzZpsm2norbp0g6eAPKF2HhKEjc
qGD7jEaIOsM+EovE73T4kgIRPndVA2v2TQbGsDN5xaA+/GiDFXrl3Qr+kgyJqefXZ59hVKzue3od
o5cBVGTcmW2OIkFv43RgLhfSuGgBuR53Pr2+rxhiuBYym8WXSuagYR/mZTM/D6at8IRXvWFEbGQn
J2ENor2KlGvLryFuGfpFX5osyeoxDSOa+oa5olsAyDHjILL4o/+qaaX4Gf637pLtYIzniG372y5L
Nmg7Jx0UKTaarANEM3/v1vXrdI9Yuq5jwwb9XP+kDHrpmKdd5yLOBhtkvHI1R7EkBwiIyhrM6NAL
tHTh0OyQXQBUg6ycMeqZA/UMzJnuoBN+9MUY+gAmlciSEqozISZT7etzkkvDv1dtAVPBvHcc6+uJ
fsUvmhilHj8/K0nrTA2iHR2nyTds4O5XIk45FBew56aWKsAKkFLbxcIeqpuJPWZOGlPFWBzMS4Me
T6IWPlnS307E40f/qx3uqOOKOW2GZI1FUic8vDJYvmRDLCF4NaQCdwO4sG/N67BXEy5m3AENyG+V
73wleMnLC0+b0jqMNeb20Dlzvb5C9cITiZli1Pv5FVa6YEoFR34n6+HrgXMxKpr5NZKaZ7U7ABmS
ANQjlt7dPBZ5ucFNd9rlrsFk2DphEQ2XlfeAPW0333cXMWrGs4brPnPvJsPWRb6+uIdQW8tk075R
7iW/gBFE2QyFTMbMs+OJSH5ggpRYQHuGMNGYHksZ1whUa0duFesOAbl/AkFGzGUFdfP1ByIX7l1b
8cRnasCKhdbRBmpgSurUtYy6ZTY1Dw/rrDTl4WZbocT6k2TAyO83coOdbmKtv8NZ90Xk0KV3dU8R
15PGDT2IGvZcICpGWF2D2Vjpgl+ZNjYl5JZdj8c8Ah2w+Kahh0rtYILEWbSb0nwfTmqI/oXYNJEK
yNQk7XgqRlxeJ9AWADQPg5ArcWqzA1b2sgCw4sOv5Md2R9JKCGv78J6h1sg9RTKqRJRmbVdKYdaK
1Msoc1UPj0ZvXT/o+wuqiWEPQWtm6mhjnDmo26XcWiAFThQ3rxgcBVkdSJTMHGoyqTb4VzlsBe1u
HkJprFkDJ6nbsARsc3LufTvvBdYJbhcVlK8jlfjHfFmYriykEFkfa3oo4meRb5rI/8aOqTxbyCcd
lOADA2vXgMaTX36nK3NLozsBWA2kA1/sf1c1Jb7AnFhoc6+Jg9Hy/MMUz6zXAabWud7bXIS3Z0zc
656uHqDUap1iRLWhPgTP3VZcfgRZlO2DUFCWrNcCYh/u9Hv1LvhkzxuMs/aIcKVjmW+agblzWqP4
Kf6J6enwyLl2ietnOJw5R6Y0/Ghn4GKDB7t8190okn/YcUpyoj0HOa1sGQ7HVgXBGC4iXN8OxD81
aGqgf+Uzkas3HI0A32rwngjvZgBRe6Kh7AQNgkodnFfbLXAc48HwiKe22ZdruwPUWAJRj1d31MFc
0NBmr2YWsZ876hmUkHRYuLem3Rpfg6s7KtmdG9x+P/LlFf3thsvyxsdb+wtNLRyG5LwHffHe+Ien
4GPhxkRwgQ3YypmvClQylr/cg2MGhXC/KABMMNJevHFIjanp3x2sZbfeVvwAJhLoxF04/B+XI4mn
3Q03IqjlxD9frTXd92LMMv2yKP0K/gWqAB4E7oOqMVQ54hF4rYq0Zq6lkb2EaFRUCrW7S4l9a908
3qF2FXdyCunwACJcmFuFquGZ/E0oC3warwXUMM2Ps7f8oorLeARegi5BYI+zK39eDWJFeMuUgUnq
2Pr8u1MzVtyeHNkjVEuw0qRuVQOGFYfNwkja0ZSdJtmsv4N89YHjCC+xx+CdLiIZHCbeDoLC+jCn
Ijh1PSzkG/UpL0WYbGb0L9ef0+yVKYfUwo1sDVBf861H9MVseypafYhFzEeQtvYrnX1zlIVv8Okr
azyWHEu7h1xmcZKI9DRoX4z1dwD5fqIEXG/TUyHhK6lmxpS/h5ANFnHTkxq+7zEuWac7D1tcLRMd
WV/u5AfwzNhok1pzmU3vXUMSgCjDU1+BW+HcuzRgXvVhLJ3ArFn47Q0NyqOu/RQxRbIJgxUgqAt7
APtpjVyplTv2grabvG/SLLHGdOlsDGVfVBG6ZE4o6iUNTnYfN8YRz9tixxE9IkZDoSn4CjKLDMva
cKdF7VEpz6xfgVEzxVGqJo8dPqQoYwTwiSqrP260lp5dQti1RpRIXdktFJZHIkqBQfeyw0HgQcF1
PumxneZ0hL6+cRRBGh4tylAvuvuq6q+YLPLxSTVjiOmwHlr3g1IBYPqV8xjfWGf6+beRnrbgaton
oPSEGQhXdZDe1mIpX2J1i367TkpiiEGxoErUi+XSD9NyNnLwLHm4/biUlYRh6AhnzHAcAY1NugAc
E4y9ZTT8AzNj3r7pdS3UULfE93czW5nfhY0Lg8mSN0hOAmtxbrQPh0HxF6zuY+CjO3uuXhhcFXHF
A2sFOiqsz3S7ivFCdBfHxAUFy50ATzpT9cmM90oyqwSaLQmZLe82WmDwBjSKZ8769Pn2yZ8IzEW2
8EXxlVWbRzqJoPcSMw/FP3+ZOygqS6Ik436mHje7n6NYxXBIfWTcED/xqzCW8NBBKzjkBsy1gHFi
oU9Ue0cAIbTt0Ea2UA5TdbeYeQmBQUDEw7J72YOfUwXbQuvF4M6vpnVLdRKz5RH51NFvWslsbLJJ
6jJr4VR2PDk2tfKj2zyD1ufiJO/N2RTBXru7BKyRHYj9SGrZkib4lOG6QkZMZkjDnKLV2qity/d+
jg3kQuy+m6BQojogKHQo2Y49fygd3l/uXA7a77cIWtfbuBMpbJtRGNw65YowRvtc8GlfnbZmlr5B
b+AnIEL2dYigf/nGQdy3D9aKs9CDVKItJ+8q3FOgkG1/KdjMxQN07dKS2FUTUZd3cWUW5vcoqlmt
GPCnBzxhYG4XgZQmWAINRphNEyrJ4WjaH80C968Yv34A5RwldAxl7cMaOIUyqlEuvw7rfi7AOH9O
W7siEHchtjut2xQJ1xPOxFPP1P4pYCoH1WLjkZus6tWOAIGMJ/XntMZWOWYp6qIrvZjiyvBPs+LF
2kCAJIvIs4zO9nD1VKyUZbWN0AqTHGaHy4SyN7jiQP15N2bHfXFcatRAdsHtedt9Upsvhxc/FWY4
IZEEvir0GTsqG71Ni7FhU0wlpRf8sTKdhiddW7i/hhiCf2SRslTFsuhQE5rJFEVRGNIBTFapx7iL
AAqlpQugJ2Oo7442h5n8J743Z1Pl9hUT5+Ku38wympz/WZN+WqAz2MugOWwKgNSk8sTX3AoHWcUh
zZqojg4PlPpVkxDHOwp4STkBlG3CJAnYRmpgzNOQyEfhrlmYQYDeGgeCgtMA0KS8UJJgpr+pRs6g
kuu4R2JUKm2O7F5zVqbTomzgiaQmfvXhjJNqdOxD9PXrykfdSiTCmK0Vlai+NwnGJkGhiFnce3Cw
8VFUbZtmuDL2Qc3tVwNhY7gSQONVoZXLKiUiEIzTGUIQFpMRnBQICZVHnoZktCi6mi1aMzZRrJ7U
gUxF+Uj5oP+LcoEyFx1LlXsfEh1ZpE5HQmWrOWcbETDYJlDnwmtyDLoTEMwmD2OS9ZYJ5XBVC+Rn
UmhLOdnMd5o5c8FyaB2hRrgjl+YHxOng6OnFPCV6Nqiee7VUMvU8SUNW692c0kk6cv6RGQreaua8
tr/nX7Y3XBGhJTOjamf/lbcH6GzQpPiQoEVFMm7983789zU7CvXZgBQT8I1fHjwjMWAHbpjZp8wD
UiNNhJYGrQSjOmvXEAhXbDr/FIC7oR94ui2Nz4hGKcHyZ34KqtZndvyeghEHy0gdNgB8O5gEJ8Ce
SbVs2jhgjB5m0seocRKVzxGhfmsJ4wigx+fYai/RHNn5/zIsCHOw8Y7dbY4qvw3pokI96+N+77TY
e1Cki7dY88+EW+9PK2hMYTD1AdGBY+KDVigP+ALqM7thBYOq2a7q8YofWs+uomtINfFjVTSU4H7i
nPjIqO/Jxff8QggbqiuJ3N6ZN8FS32+CkZamkC04D7YxNLOvTV+b8YTd7r1hwmgS0Sltq7uGDyrT
gk7idtXQcb7/JH2/n02w+WEYzX45s5cvtv2aX18fKW+e+65VlDYvtZwUrYfJe1Pp66HkwPSCe+L3
f0UaLcR5cfIO3RAWrbktXhoeOUOtMD1w+nnB0aogq46/ywAbFe4/znqYBQPwwon2CCyGoqNaKd58
HQt5VivEXObUqVE6nl84SPbUfvOLoHfSnfKEDyDkieSqRhjGdghku/jFTuWYIyAPewEQG1wc0j29
fpD68brDlKSlqxn9cFJ/8M09D4jzSbgDPdAbP+6Jys5SQDfEKHVTXEWTt/XaQlTjnpaS/sSGbJFm
Nbw/QLB9NEhcUSuzb1cRhkLXxJkDcCdwuK9Tu587GYH1JjYPjKPUwC5CwcsLtAfqFy4KcCSLOYt1
HVegwNQCZALBflsE+Xdxx6j0qmulAdy0+2UKr4YFL6aarXCsMo3EV1fQzS8NrdfvSVXBeTZCFkJ6
BlJk+yusPWThRkbteCh5i18C4hnTejpv8eTkZwZbXle53ijKab1HkpVGFAGgifPuugyUjs+i6kEo
3qzg4FDaEiK9zqvtCF1G5hTNsvYOJSYDd+YgexeTDg8PZS0qHitaBhDPcX2OYsixvGKlovDCM/GI
CZ8GBPvBuO+vUuQ/npgNgsc+UuNjQNcswLM4kN6jC8qoOdXQxz/jXocAMClTmKDnnMh1gMCSpABN
flRqv20Gn0AeMzy6YHnlT0JVOCSBeo84wtXziwlfD7IToVwk1xJDXmHZUg57qfOblqlXV2IXi+a2
AX1Ne2sBMj9cBM7Fx33uMp/1Pc+YHkfKuh4TkYBAJtbzPOqTHA0aASH3cUqbKxjRDpCeaBO/QqhI
4M69Yav6czaoQNRtIOclwDaNltHVBm6TmXN+Y5g5L+PnUOhSgRPTw5qu+86f5fBz9QSg3IQ5ixkS
xkQfP+q4S7u95pUtotjh4ZvA83AYP0t1NiXWl9ueG8SVx2P/7MDX9a83qgPLHvvuA6YCpSL+ByDQ
hrJ3cs90ZHr7JMl0AXXlYHx9ljdBPXRODPGsJwYxn5DpJro4A+wMtNTP5SzK8cXEKVwYRYtLYCxf
guoPX+nQbo4URmHt8wlgzfwK4VJitPFlRxE26DxhEX5Lrudt9OfFZkN9l1cJtF76A78YTaguEOAb
76o0MdS1T+HU1nZ61JgSi0FRfccdYWijbh36i+NBz6QFcTQ4A/E94Gk549RPw8bYmSFCGANfmmrz
7/NPKwKQk3tASmzl46xRDXapHvPQaKkionRtc73DRQjVGVi//i8bs6s9dp8huZVIqAl8cW8HkDfL
LogCrQ5SYJuNeJdtPJeDL+dzXPkerW0kyMLaJ5h2tf15RS+1A5dHbR4hCndODmCMegJNBmqIMykY
z7I5vj3+VSpvU2eNda54jgRlX+lIdbudDuTWYLIuk2Gl4SYkAMrfcGH0UtWXK53Zl7YwS+iDK7Jw
z8C2DIsTwjMThDRRDMXdPYNjF/JEESHh79DK2pADmdQpnxSdArdY/J+q7C8mj7KMhzMrf2Lc16TH
Skj7P1kIKeRKQ912txo6Y17JsTTquumyDTNuFCZYze7e5xsAlDZ5rfR/7MDCl2dRXtUlf7I/ae1T
DayE0dRxB7x9evPKNURtZ5FTUyfypZq63Vq7KazT8J9bNzzXLBMFESCRfaWxEFzc4zuOm24eR4Ur
gLJFCnPJQ7PthDvmoG6WODmHS3nBPllvarGr1I686BOyg8DB3qJendIRKy597V2u6wHAKX9djOi1
e6pa76zTJGmlwlDXHrS/bmU85bHrDuHPj547y4pbvCWC4KKiiJeMWIDs6OWbliWSOrjprsjrHh+P
/vjrrViT8PKGVFw7Mk7sxW1PqpPzfWSMBKPxzufXMoR7giWJbpeJN5MV0+g0JymcqTosmnDSoIk0
ggh/7eUqQn9p72luL95rfWviq97XeoW4ARzhTuTDEHUnbqmHS8+Ia1Ju+xNf3aHxvGUOI4VSKqfj
SDjGBbAvmXUp7o8oXZGPcP83TLhxIpcFYH/QYjq4aGhZP0YvsCZYXM9KtxhyHT9rzXuXXsX1lR1H
dsbYialRem0AHAgE/dOe2IVUdFeKrpHtsnfg1TNyagQ3T8PmaXFmNasMVmjgcHTO05JDWMYPtzxA
cQmcvGunLH7yMolHde/H4ct9DtXTbulVHD+JFTNYN3kGcyK7T6LJnCMkdH1kjUoCJgs5pPsUPNZR
6YKbwy+A87fWU9H4M4h+0n9EaMJqruESrMTFoZsQBdmI8L9mZSOE0TtD2cf5Vu5qcH08OmZDl0C2
kJxmeVgOXsKNckzob7Ws8K2kVp05m9Gc+5qSyVKoj+hCDzwN3tEqCWvWtxW++rCXOqLy0MvlAvJ7
mLXyaWkt/fZIT8EQUvNWtQ1KjY/2dNBGcT3M+NhQzng0ncQN0GO4+L8ABZw3ycxJgRXRY0doQXzS
qOi/4rFa/Y3KA7WF3Mj9kHnR63Ze9NpCRMuo3DkhECfNIxL5HPIg3wvWIO7CWSjgAgLD+HxUF8Jj
FBfhQ90dIm1En778imMSIna4RaxtOdha3LQYalS72ku5KKhGDtjbjx5KwtnuHI5yeq6BfPck4dZF
Qxo9nUztmkG30+byEHiq9yvfRoDW2zmhBhkQQ9g+cV0T+/V5+iIfBf/JO2VHdp/284thMb3AKGj9
quLqDLe26oDX8cJG9m2phT1clDGv9allrZ7yZ3qKEb4EPzBfKM1rWlC9/4plgD9qdYI1jqrspAaR
77lOTlsquQtnyu7c7Q/EZVRyoM9BSexAmMzXjjUFW0ECJ/f/XzX5uyZNSUFd50lsCw0EWqmQpkh/
Erfxm0uJAIw2RrcLPWOfeZ1K14ZaHTTM14GJCf9RLwbAcZ3pXKE6ycY4KzJRUZzzXNiy6TVL/P5n
FBk88SUc0p6R3TydzP9jcqgv7i7mmJ2p2F0reVAGGZymWGkkgnPJH5moYNY/gNEXAGpti82QDNZd
0CxPo2ZSfvBzG2PPLHyKvR99xelCRKCnjszrZ/cCQywVh+wC3Ri3H7xjkVNugEpynj8H9LF7lv2e
HfMFJbilVtHIutK6SqYKOHLNhnxThUlEc5OoTFfM1wLhcYvabMrtB11KxIpnHrsBjAbRllqB6pDC
lJiQi9gf+mLtXmWIcPboGX62Q3j0ub5106gUjGJK332kJiPi2XB0wbBJ94obZ76sG/E6j951Uj0w
EN9I+NSmdvR4C/KqKFupuglHJ/0+CUGrgvqYOjFjPILVRhQMgCo8kaJrW7GXAIrKaSV2HSk7Gc13
I00qZvgqonipoaCbCn0bxq53KzeZFCHR5Q58MZRcMEtEZip6Y8xHo77V1k6BTg57qP86bIvPgjyz
AqU8iOeaB6BQXtyjaxzWmbn9C9qLxO6oCshBaKAe2EQeV6ReZJNH20gCupUzzN+XkGqC8emh9MgI
rcxNx+S6lO10Bsvws0TCbR0F8YeLMDC/7jlvlLPleZGfIcV1Mr4ViESq8jE/MurwuPHvZLjOzvyH
5GcKjKi6s8QBk5/Bva8qIekizCWWu6evzYKQYB0IwhFanxPvCb/KUiOuKPDdw5jRUAtJljMnzZfV
cuZUNpUWlNFWX5Q+uQOq2b6DHiq+yL+GSkiaq1xqpdykvOor6JinN6TLGdkb4XzZn9H+u2FhHBbV
LjCIr78IRhA7GmIMTk3SwOYvajU7wo9sVd6MH4PW9ZlPly4NjiHLq36CEj9oziimN0e9G1stHsp/
rwOc6Y8RYkg1TUxOlJ/UVWmektNd/7tlC7Ho16XzNY3gbIODCHCaUj3nW4vvwUnRl3PkaynCfcNI
Y3zwNl3GLd8oznWx2P6BR6GIvzPXgTVvhWARorByC1l5Zquhk+7uSCJlikxMEOIqAxGIVGLWbyOx
1eQykwNZvDkTzPcNzi6uzuP4nwIycRNMAE7U5qX+T4PQlt9MXeYjDYEP8pz66uzgE1H3WjeEATHf
rw20Iy6GK3lDc9r+Z2Dl8H3DaNUN00U7rzj+wF2UId6b3YyERmgNVRjG0syStbxCqHNozeIUyaum
TIgL4hHsE5T3rjQh/HiZwDqulBK5W+xqlo1+/zNZgC9/uuqPJoiNyXVzGLBtqvVZ333w8fwxjs/b
sRrfphVcXV1zrjXvBfwVPTQxMPxny36sfzcIfiWy2l7QJaI3nmke4SmzA86tKB803o15Jv/FBnAT
kdBs2Pkf1ByoFsz8fLlMu7kxIUOftXOq18rnHHPvH+7AgxgSORooT7hxRprvDUJkPEWSq5pPGO84
zN4n+wS2PVyGNbY9lmoceFozHEYP5D0u5pBQPgSjb9u1GiST+o7gNQ1+mawi+u8fTyPuSjHsr1uR
PChEybB4VO/GAYeemNYe+68WidyiJRHlNRp4awpLqYbb7JmlC33X0Sh2iboq/zzT/OOaGP3WgcMF
SU6N7CyAnu2RyHfSLATeyx0FG0dXk9zyzBaJwOuwaPYOmRLQYP2QqBms1qJ+toBQNWWJPWayhi1l
wDaqyOeEgPRG3dx9LQ3EnekWDtM/Wiv3jFfW7Cxot6LORW1f4tpOWZGHn+B3QklknlUjjeRNWu0U
utS/IK7PafPNWOirSwx40RElQ6S5rdO9oUcyPIQoE1UY+aCul7KDF/nvyOQDvGHi7+q36+QI6WG7
emDWtwuHjsXuCqFlglaKA1qO5r5GfLqLvAi1T2SEKBM23Y0EDactktkWnIFFqvP9lztZT2k56FlH
Tu3kNQ5sO+IoBLwJn9x3gV/5LWoEaOWckVmXaLQ+xlZzRV2zy/3H/nf7+YXPxPG8xcbDm3QJKz9m
D9lXr7gasOF4UniLfjGiDuw0b1CT3QDXKd1+zw3zTbgj6q05WGiufDy6InywXppfPBX+2pFwmY/L
HXfXrcCeF8BEvRzVL9YJSbuSFkXHrOjrBuLCw4KlMF3B79CKaBRdwu2b2IIctQDMwjPr+JTcls3+
f9fwF/6wGX3ZIHB/XeRGEBDQ1EpqnOrfaPicw5M1aLLuTz84GVLWw90rbP80cDu7U4dVha8YwBmV
yEwLo04zmiXVFy8FYoxRKNKQdkvfbRS9xkqc0vf4/3hVxZKJoSrJche26JJUdKnocv6xGjcpdq4Q
XBl2XdJoZxclYPcGogLwdWOEHwcJWud0pJYYZSG+K8z+VMlCvPNev16v01efXOWvkO/T6LqOShEp
8CQGkG/OGF6KNVKBz2DpMJyeQ+cS7ZB4xGRRiSTlDkmqUIdjHe4ZUJX1VrE1Vd7oHLhlCJ8Kxa8j
WWWDXU5C4urAVv6kXZqJLjQlKEO9KJfY6Igj0l9QCOGipTigbST8fhczrxlJdrkuQY0ODJqxH7L5
dpkkQJ6Ui2/h0UE+Tfc+uYf+tD0GSmBwdqKIasOH0w+qyRxT0HyZDEfm6+FjMaVE8lLDBgCfXypE
VLZ/0M+ZK1Ge4gpzUL190fGQHg/6FZgx/zwkqE2XCTB5WzmH4RP9/YUxiJCwLvQMSLTAw7gNITXg
Rhq3g/5Py6GESSZOQQinG+76LCxFzQtcVYjL0Daou6ClloZZ0pCrCKdhTVpaoxDokwjjECLb+eCF
SCPsUwDerG67v9Hj8eDkd6gbCd83NzSuG6DAYHiycVavy9I6lCzAz+sntHJFFx0sK2J4Hyrl5n5Q
X4zTDJ5BLvWtBm3x8QGYkUcub4u5Ny+HcnCfvR7XNTekYKpW6UEsSB5SCfCvQ2AhnZqho6UWJkqb
v9Q+uyQ5f+OA54b/vVutqzO4rgYSNS/flJ8tQ+l1YDgLZ2dZ+IytHvHxeuJmsuHMPgK6A/0cqNUa
eBfdMejnTfA7Z87CPbItgZVRA1bLSOejj+HyJ/o3MVFkq8vLL4k3zukDQ2lVJz9GJSDyBt8z8KTd
cfk3seb+hwwjFjpqJRWM+Fx9coGI9Y6U4Wo8A/WwYqtlpvNLVpsNWzZ1IZcZLWS90Cgjr4vL197S
XUeQvKFv/rrPbbKbBU9L5gUa22hxdtOSlKGy7bv/r/iaBI4q0TJD7rCDjp7GcDRoQlPGk3CGJm77
iamS0vNMiXqDsZKB/+Q6f+21mwInbelm1BUXjCb8FXTbVI3nl6HuL5RNR21czo8Z5SuNuXI3v9jl
rbmYQAOS1+/towFh1g8JVwGCEmHz8xGnl84itUAw0XVGa1GVg5ME4RfKYVdDEg42suLJrm5wI1lD
aEmPQGpyAE+dWL1bh/FYcXFqw1k1DGDQp/6eZkxYJLb4kiFl2Cr9Y+o5UiQs8V9KkMOOyGD18VaD
hElm2L3VYa7U3BLrih6LUsdx/TIMyVus9TB3TcB7K5KmGARwRJtqfGHq95/Qtto/uD5ZWC3tzwKG
mVtnKZ9iOrkMUmO2KB7n/anoFnyjdpxXEjRvP+UQD+eGf+EtwZ7fbTINfdKkYuyiQ/aa+4YDV6dI
QkcaBTZ62do0Pc5pynvnpHyzw3dKNJmvKW1kOVPRC1sroEi4YlR4dA/79H6PXK4+5c6tbGidEml5
y9WhWrQlRLyhD6O+NLyQYVI5R6uiFJf8bwhTIXxzYwYuIH4r+IzmCsCIDQcGPhGXztjqHkFmcX7q
TjrjvqZhc7MCiDB8wHvWgJOozLpcG74I7MoaHBWTGJnA3ZwBp13BkxNfprQoHoG92SZPHOD9NMNa
r5fOw+9yJY72iW4YE+v6xTjmEE6xx2bLMa9iI5WUfjqSxOgZDNKq7AnZMfF+8OcGGLl9Gzy60YsD
BHMR77JbaTmWiTW5KK0hcazyYteujccx5M9IOrQ5++5nwASyoRLMBZu9ZwP+Oxj7d0T7IJNcKOMZ
CLuo+JSfocCiJVYtGE1USeUS8d89ojJFrsIlhYr5G7lYPZZeRxkw13DjncxSi8W1UnnT3WAzjt3l
EEqmOc4NVXycr+xAFep0/mwNWfA5JJBSV08uFPGdE3mNR+1IeUCt+RAnBzsDIsYnan/REmwbQTcj
wYWSbmxH7Nw3Kj7gKXMYEfLeLNdUmROSpyVO9TySpewvRyG+xB6Nar3+wtc9eJ/j3DkXy8v4h/Be
/DG5aPaloC25wYrooNtJ4wAUOHUNZrErNKObdF12urXN3MYZs62F8A6PjaRewEBbd1k5siMaY7bu
7bBKV+cSvvkq6Xy4qJN/yNqJf95a9jpDaaNy4OYN02OOy96/ww5t2+8Uoj8XSq2TRz7/DBXieyws
vd2A/Fgf33WM476HKxZXP3wk13c+kxYvZc5tpIJtI4J469fZtbV+SgksKMHPe+M7aTwZcXtVOOV7
5vDxrEBgecAzXkkiJWSQT8OftGTHbKOlIokHvWRuPFFk8PCRXzsUDMDtosgk9annOJA4KC3xtLkK
Wl+0B8EqbB8HeS522JdZgupgLnuPbxoqC+g661cZkLanptIzylXpHNIrRKPBGD90yMvCIU+D5QmR
cr/MJZsaZlz6jCm1PWVzxD6t9cRQbInv7X3I8a3RJSRBaPdGyzJJCRL0asoh0tI42Pg4TGw+h8cV
Glon6TXJL9r1ewt1wow+JwUmAZ5vk4/zp3Xo8U3kVBzgvARM9Uc4crB3Wr8PbBuls0etG2qNdcTb
3wSM14l6a76W2IH4RKskRtSIRk3niV4/vXfXMaexBy4f9QsFxR0i21qB6Tg6VrQG6CRAKQbhacmH
GPXZb0rn2ZKg/05DWotWTz+xUf/AbbdzwCdrCWay7hNvgWHiQZa7Tnaj2gOaT0jRS1MEpXcmDRiq
4fu/IQTsLxakYVimz5fHU1F9iiGwK22+yvN3jjjymXunXON3vU0dHZE10OPRQ3Ejt547GZ1dnnoK
BtF46pGDihXLK74PSMPDICrYanP7EEVYCnrSFqDl/o7jaFaF7y3LzNKjbhqplN90v/jkI5udPQd9
+GdOhQ+G1Mpj9HOeBNeIIsVLZ9D45WTBpZg1tBoQNOSo3u8JFL+H5olkwvQT36eSn+3j7Fc90EC/
SlKYrLbZTz7bhE4PkA1mtfQa0eLdR5fHWtaU93TCc5l7fZvzMOgvz65KR0usQJXF6sHwHuJjs7AI
jfpYUR7uN5O4BC30FeRGcd1ZHpskPEJlntG6kwj1KFOaCUNgwyC2eoGnsL8bTKlAB+CuZvR6prj4
0B7ioAGJfLnmpBxSiqYjHUDoerIPHdILcz+Gj5b3SqxuqMBuzuAWZ2n5SmibYdeX1Hxy+W629Yrd
gB0CQ8oV5zGkhI0EcY9h1CO8OonIh92vaYIMLL049wf/rcH8pg9EALU0xkUKtWwRx9JTrLyrYanA
2ATT9OG1q9cbqthMNxo7UL0qUeKEz+2TxtCOxFPYvkhnK9sThPNtieOpBJ2os9lsktNXOj99CIn7
4I3CiM/0cEU49grEh1gzq8I2ViCLDHtZc0wk/MpiZ/yL6XW1kE6RE837q0REXUn50q4gMig66Rd4
FhJVD9zulL/IvTwq74xDbcwEkGzKLq9IrkZMqTDVPHafZGW9eJqXt0tlZIGkyDtCGcu6FFZxokY+
+9SYF3qQM0X+XzultkArisIF5AjSuyckNx4EsnpGp0x/o/HFSz/kAX6pVt6h4TPXeaOKhD5/stbc
SDLfkYRuRpEHc/PAnrOWpnoreETwqW6sxuD9eh+nKU+8W8Hvp0iEWKsN2SCGB3e7QNmrrhWfy9bY
6rfCPjEDnVOwi4bhzNGLVBbjF1cMCX7iJADFu6vRGs4IKexpxmOeIpt7OAMvlDgAH1sJFul5QrT4
RFy88Rai8O0m17sxA9MSRXCBtPUW+inF9cso3VRUYf937MEGQ8YDkYz9bJ10j7qC5bhieQ2OqMeC
D4XQ29s2gXOvqJ+JaOa4MxLiCsX9Jm+udU7fCyzjOU8rbzPz2XygNBovoBSkYjX83lg3KHdQC+WC
S3OJ0VLhsfik6nL6NMJ6Micqu9HPCUyU5AV37YsZyrOhJw/biya+JLgUUwSPZJlj2YbFzXWx3T6A
F1gtpARggvH/MzUOxdh57u0e5rK2eL7NVMXB+jjE2+OrREoKQagQhrvoE/55z6PBvfTUBinsDlsz
W52GlV7SMpoEEzB7UQ9hdr7ujVmR/pRCQzAWe3YMYNkseouE7Uucjmjamr9BPfi4qtgO7DZAdzA5
AI93ieAsEKtt9nmCgJf8dOMHU3T/zSGsiTfw/Rni45sYSdZVU0yxDoTbl+AGNaGp7DHJmKkrpRgc
Jl0qHzUR+gzInQpQbnuefT1nNpd5YlsWs3NQ02oNJhrJMBhcMckDE5Sk9fZzPgO7n0osWFGJef14
qrJK6vqp+KHiOgIpqWkpJ+JCssj+MqvyKk4BcT9tzh8wVEMzhRFFw9w3wILQvV4wUhGENuEiBdnB
V32WLPoJO3IneabmRdsgWRtg9Qt7HnibgaxSBB7ei2l/P7pSPVkI5GDSeZ5M+8kpzgPup8Ov/oPS
lwO7Dq6tkDZV/HZdzrPCjdDubMQiZGsIaZ2sLzp7c4a+iIDuRd0IcWtdo7I/Ih/tRZTcP9TG43pg
Hhd7fraTfF1Zgrzc76odCOFqc6V62wbLd9UwY4LFcwLmz5v8pKkZsbQ9QwEMvnU5O9YIPfOo9EJg
KFx65x7Ma/mUQMmzVuL/e8Y+F6SIF+cNiZGF8EMrWgS1OokRjXlm4RKvlQDqyR1nxxI9rn7nzddB
qsPgqK9HGTQM/YHPBSb8mUukFF3ZqIIv1rOQA6lQll8G07EKhzN6X7LMcE32gQQ52yUxLJGhJ9n/
OWyQYQGXPa/mrarh2xuzPVMN6wp6m2HdPUud11JnBe9Qe8WK0sdg7Pk13cQ7O90pmdudg67dg1+p
ADy3hY0iuPzaoRuN32+Hrqsf4p74+xyB64Wo21Af0aBBKyBvu4LS/z3GqKfhvX7C5yzw4c9ncQSf
Ed3EpPLQe32TymmMQcrNGv2Xcf3+CTy9cy6IrukSWytu/QLkAAh8VRvk8rkAev6wbbSJ3gsoyy/2
Q5PPuyYIolYJS9yqzk4I8OXADOgnYrUaHyH8ISxItKD7mx104o1nW9JNhXKyBGedihPFTkXmhI9Z
PpabDTVhhcE4jnJHsCifD+6z/GQzPEJ6vipMNG8Ff3MjmiMhxfCObKmqiCnW3iNc5/801bz0rZVd
3M7q0tXkMk7RD2CzxTDZ20UNaUSw1Qij933CEZtBeZGjcoNwoCD5dRaLCeLjVXY/pmZOWGeiT0mp
LaCULPBIiFRwNnP0qY4gJFcXCjn/9iXsbANGAKv+PsD9REMBUEvtNeMTzaqcLAkNmNqrr8xshlUF
OBR7PPH1BhPhMIq8371Lve/v7l5MiZ41VS6Gtd2joOe93YT+IXhR4zF4bzww2hCRkJX0C//85QVc
2LSRXGgu/b2pk9hAbm260pg8YHrI/c98bixylCeZ+RsPNwri4msSPEp44hfc546MJP9/aSzecOzu
GWlcwOSEcP3Sx+MEN511DHYoFESxTtmFFkzeyXRfeBIwZz2cFU2B2IDnHNr1tpQGzSjz1nbjdaUI
c8E280vlD45Vg/9Yn8BybOg7djNmiO1/cxBh/orTuu0XsnVCy1k8oxQtX0Xj6/XiE+HrjOCRo5Jk
zZ++p42HsP13ECukxioyDq1slcrIm+b0wYpgy05T8QnuQBAHpmPCwrB4k3qXokFEe2KLKOOfEVyU
DDOHR9Ua+La2JOsBe+iSx+2gKDoXeuTAT1UquIzT9ZzjA4tBITZA0pMofHLkKb6LXwibar1jXQU3
BwmqX5qal0V7RhHLZJz6JTIXMU8kpyq/NvBb8Jj+k1NmbYtEt7UR0kQrOCmB9sylZSmlTz77n1xs
RI1y6kOu9GggRf/EY4sYPPxaHfBW96P3/DsOuW1zq6tfpAVZe28kOrZCixatxt0YoqNeGbPLoqEX
YtnTqA6NMNvcsrMJiTM7MDK/NhFK7ZsR4KO5z+bqGmk3vauNoS82EsV60qK0XQsqkmSnl17gmIyN
lt9BS8lOUm21aeNtfk4wpObZhlPNCpI90BntKlGsVtpP6Ksz3OulJrB+AN1q0Q+VWJniS7adwAw9
qVqyPxgebkNxdpQRWTBZxH2KnzthB902SrAYngy4TvaidQsPwIJ4yJCmaMY7WTEWgm++37VBGovS
JdoPmUEhl6N6IokWhM7ir3CFQvzmiwWfSezKH0t+QXhmbnHCGcxNaXEWoLM0tlL7bEgPxubVR/14
KyDAS+xj4ldqcpqRrGwZShFGgPY8m7zI/XRFujJvzUju5j+lpQBKFuPyHaYP1mWvbiFPNnxe+VhU
yx+dq/I3YaOUDL0qauE62sM8oLjCYoXnrAnZlLvT+KsksuAUPL1HKdlxqo5lfsmG1FGzA4H3sv9D
udELtA8C2/Xfdu0RHvaaD6hbF/MXE20cV0aAPQEHs1fNXnDbIAdlxpr/3xuJ73d4sSJKUAjsFbqh
6tYRjegbXm2UMOv0qYySJDTfcZtne45+8BjxrpJlk64XTsYbe4fTHdKjG0CStRe+qUeec8nKFOEZ
71o8PQa5iduVZ2wihiViRWpdfxFKxtzpyitJUEyKWRddDewoiuSl2e7X/A5+pDvt4Ap0fDM5TuOJ
9gcgDLwa7jrOyas3ez0qmsm2QFoMaa6OvGT3Rm4C3LRFKXYb1ItD4i3sL/vT3+415IfB//56ER4D
xqQH0m8s+eyNIYr17QR9JQ1YfImSrQaEb2mcgoxmAnO1pmCtwQinjGk+JqE/c2Jbg9znSqcZzYBO
HQn6lJvFnoy1aMZa5VOtguYUwoFUqEdmikdoQ/Dvjbuwj9qC1vPenwR+SsRVXI8sIZ+H+IDIZ2dL
/ouxOkhgToJpTFq5WfF1OwqUhDgazTpMneL/kykkaS4dX9w9/q6Suu4Hv9gvUG3QWmhmRP2e3MR8
AnE2acdi7atWOptY9CNZOkGkOiuzRyRkNrkVffS/eFXgbcdcAEBsXBPMY3toa+KyCWOahmadxPfc
XPM+vifDtAs3nOT67nhObHD2BcKqn1NL8IB3gHnqAjmOzOQ3iW+HS447Q1zsMRJpP5Ljs+M+hzcW
41j/T1Wyb7zBXkZns/AfdAWQIlGvTHFUl6RxvvIDtrhal8LbRMbJmxHBJpIQ1qIZKyoK+va/fuux
WKtV24kX4K1pAl6KPHS4KZ69KUqaCdh8sJLLL2mXJY91UbHAuvN1VvZ1t6q+FHjxFfizq34ygzsz
oPusLqgUpuTv2CxdhuJTjUci0rCJJcNh1Dn5+97zX7zftOdAkCYyTa4SsvvCPu3OZttQ8QP6lmPW
e9OAmqSgRJf6xkOJmUe/D7x6DtzQhuMqVwV7YEgTE0QkRzc3+nXOUgCgd75nIj6G96sdaS0ojdd+
5yKdHbJ3JjQYoSC1VK9mulNBQl9vru7pjqs3y/LgdiMF30Ap9Lz2Cip19o0OHXcYmhxrF3VV62OZ
bzDVXmLOdvMpXqC+pZ6gNDXwaJs991og9Rput33aBI39BTCX5KgBSHnjqCJsRuT3+DHZzCKhYWCD
4+hZTaIXiBA2P8HHkVyJyKcb/yyT971TVuxKkFJODMwo+fOIMg46aUvg5d36gO7LV6C5mzTFi2Ve
jsH2s1iZ9mGtJJBuBYoqQEpdRcPTrp5Mp5ZvqIT5I43H8jXP9aeWN8hbOAxA3V/3i7xOmjvrb9h+
pa8izlmVJTbndD/++ZzOab3kgsYNNgA8QG+3ILOLKCxVeRYI46l8+H3c02RgZpyHOVZXn1djk8u9
kBrtGH2bsVTW5R0gE59vbQ61HcNjjI/G6kT8nWi7gkyeaZNAkPEE4qA1dMibu90+CGRXeqjMp7iY
xC8IQaKXFYRztZlsyxPDeJqBM1m1UE1uRzyi3/wXeTyk1yMK8rHHBYs9bwWUJ4SHSakcuIWcUJT0
Wgsc7ieqs/QNnnha8hvABSscZmrx2CDdwdGygE6T+KZM1jUgREUhQi9F93kDygQChG3WdOMeWjq9
IgSL84xfSACBchtIp8b2Iw+ow95Own/4D8sS4OQaM0WYMJZr2mFuHZ6OKae14zRY1sBy5RMU+hT8
cVgLX4s8CXMBn3zIfKzTNEsjIMsKgePWQIOB7B27DYmr83ieKMh1jk+hDcpyk5K6tnIeMUQIaVQN
Rq40uYURJLOQtNtgQvqrbGMQcPfBxW0jvFPRGJahEa/Pm6TgxNrtDC0VS6casJTM/uhmkTvqcyVI
7YDfPTzNbULgPHbggBZL1trsRld6C+XgJKEi0NGyCx+w/F+yzzbN/z5ZE6Pt0kcu3pWo4MV5uTSC
y0URiiHfSSpNnpW25vIGS+x+vJOt+GShrul+kXDatTYGQOIbiQmNMYyEPkH64bm4uFlsU75Y67WK
V35kMgWrTQJGubGVkWTtisR/L72skg+5zGUfMu+oEnHhIQ+CE9QDBy7s0O7az6joTzwGhaAnFzM/
nwmZap9bfWmcAaEuPVaSueFhvuqQhbF5Qm3F6eIq+KXn7Ps7ZhuRHWqvIwDOkgNOgz+XgnMUYdN7
RT+Vza6FsOuj78OZCiHw35DPgd5Axn1Smp0IKeD2sc5/ay2oO7T9XIFExKs1xvsykIT4OYBGvIuR
1lhowks4BepHkon5DYpkqzDEv/l+5dd56zyE/XTnCl21AZTQrtTokABjuy64om+XryR01U8hLz0d
rvIlodP0l7xlJzaTRXaBVXrMqWHPac4aKmAl6VgQBkr5LJxn2pBsJyeN7vpUYEnoZqhVPcLlFctw
I80vT9O9ARLpltH4O5VXP7QKA9hlK+J7TbKrVSHaHC1hRABVY8aUsBBrZwi1TKHYCwv0D41r4HqE
SekrP5LTEM5mAvFeA+Be97m8hkYz7qll/9z35sEvp9jtF35Ud/j6PsSgJQX89WlaF8Q3qWd4EgK8
ydMWtHojlX8zOc7hFCKvjEHcL12F22rf8n5R947YaMfX5MAcuTYHxiOHMrY9ROu0DUL36W/Kczxe
dZpaVa6B3yAXMDVgnuke1ut1y0gaafLirRLSRtN6cY1sRgurML1sEU9EYmDy0tMyY4ury5Y2XvM4
Q/WQUaw4r3LiZ/gIjOb2sclUx8NA0fPUuSkHnKj1KVG0pWkMmeyZf8fO/ro5lxzaIIWYMZ5ZeUqj
FTgFqfW8Sin6DdrJKddmcPdMNslr/+c017RcBIRheVUkc9b5wcrFxqSn8WfPsxpD+e/uevRAXiE9
rNXCQwuk2zbYAxFuPJvKkjxnMAIX9KzjttVQjQaGzGjPwF+yJdENyifnU4mVWSak3Agos8iBaiY/
ZcgKRrPwNg5TsuOHUnda7t0XF1hM74fq3o/F8dJ9qrgSWUjcoIhea6dGJzmRWu9EewR2cqyfPXFn
HvkemWfjPqTSNjgWL19X8ttwpzcl4tre9FfNItOK+CVGskm+vmr40WzHXuyoCv+bpowEabcOF4Z9
2Gsu9TXv8YQghRq7Ducz8T5hz1b4Zz2xMSTAElmDyFg96Hm8XNssGM3LdWqKN7UhaPnvSq/zUS4M
hCupEf8QU0g5ZM3qCs1lfzc0df7ioxPrajONfszAiY1UpK08RAroMH73fxWmI2Me2sacNEpTPbA5
tBE+SbiwlWAdcYx8hpx+3LpPYaC2oBABQecmGfSz0mtCjxNENjX/a0mLx3bcREMQyfTpFimO0zKO
+yKCBn8PrP4dhAmCVcgyXwmDfk64NUbxMc3MuE5pc0ZChULbL/KrOy4+2rhW0MQXyuKhvIirHFrs
CFa5TkosBnLXweSaKL38Z1+k9teoD9CJhYFcOTpfUnChVDnrZLnAWkkjRORyXapv6xHV/8DM9/ww
hLX32BppqPDVjdys03ixOsmfAvJow3lxXlF9Ei8wIacFO0BYOf2CXiWUYsvmiimPiGHEUDCOE+sJ
eeWSqzP3/5OP0deK7ovFA5o53d/KA0MFzeFnEyVySTKsZ9QwOOnHWBPJuI/Lf+vluDsANuYOghWd
IASV8u+oMz/nCUPzsn29qUS0cMpbyrWHxlpjyFdE8n70UB6NRrMakHILClcsMBgcE8FtOUIu3Vze
TPX9Mp5MAwVzjbLGypNE4Swf1rS9UBQN9JVRV8MCy4LbJQ5FdX7df39tOEdZg0fdRiTRonG6YVtJ
1eUUxsLhanBRLUfxnYVy/otu5E/a8Xk7f4aPop2ogVBUYdctrrsMIDV2Kvf2ug1g6tzNGnvDxAeS
VY3sSbcbqctfFOQtV/j7NM02iSOEdz9O6ju+EnEQUCXqEW7WW0oGF6cLf7TIYHZssO9PvhVIEago
4Z39xSsH4irp6+hHnPjkQIL3CRjwAY9qlRKlaRrjLN7c+6iR2shrfXxVD8mN6OTNTRG/VqiJuN+3
D9j3ra8tJUn2sGaAIZhHmwdAZuChnVYv3VjJZFqFCIAroycTxXzsykY+HaH1nWvqQ1UXy98Rc//6
VdRqZ+CeEYt/CE4IsmpkeRk/yZkNbLgcYFsZVntACaVROljZYyOxNAKpl9MYVew7N0KF4L7y4ltc
GSTszuIn2WZtAo0EUdEajRfS12W431sJwDoMOUtZxiHFhKqkphsC8LuukfKUCcANMVACq55HES+3
KOxaQXcsttbOxHR1rjSeNmhA6tdicpcSDxyzt2J/6zRoffLKC+ZOxVPRPtRXLoPclHPitvalHIeM
3iiSRgiR/YnS7bldNN5Erm9fEEObBDSBAUDXN8KCbDpFlz1F5InN2rf1MCx6nigLCgB+HD8BbghX
qS/M/I2zfOeMVcYy7RKPGCxxsrQlSjtZN1z613KCfxYmsnr0XqtFytkR7F2hB7pZIdaFqCV4hfZS
BEAsTxsI7hV692pwHYJuN1cqyJZtxh0aH79RDbqGv5rjonfKPTfYPPYifh5N3HQ/uYTNUHj56HxW
ZpXqgv3OjNimPksTFc5XR5UtnCTzCXKuIKb0ds9We6CLNmWiOTFYV5FUzLaW+SJenxkNSW79sFtW
HeMUp00EyDql6tCwV/4pfshGnzSFa/XpFOSbWxOdRnc8DCOMrbhRsIrJpo/8V5i8YyrDnhJ60m09
exDenrql5GDogpkyYkY36zFG1GARhNOcsx4sQc87/NTvgQsCaSgsawuDww49pd122TfrfAiJ9WZB
Bmjz7yFzZ8VyWCx4lYLuRB6JnjR5qYQa57pX6571RRi4qMoMhp0czlBMCSGfdsFXWd33SMPN+u28
21rG6lnpniHIkbtdt+drU5GqvVnlieamFI4FSIsQnEyk0hZsekpAI3QGPqsCR9z9q85DUNK8z4dK
PPp/goxKLytLByKU06JoKv8DWSranDRevvRH51TZBO4WXSGH9YMU22yrhOUNtGBeWyNGWSW8TeIC
qP8bevP+mImiKbQfOkUXPu8drEyIHyVdu077KSbRmQiGDE1tX5huwJJwCMvmDQCkGs1gYnkpyrWe
zCG6qELepjuSzUfu36/GamVYx8O2aHa6RcoASFnKueYaZsCpwepWoSNBaDgw/O67OQg1/4faAiSq
fxGGI0clrgAuRgjd7PthbOY8cibIfQ7g5O/7bGnqI0qw8MjjotcRScTbsNvW7teX6oAUebur/GvL
3Msx7xeFLRL5ChYl2HiShnmuAJIAvQXQhVvswG1BQMPGwZbAUcjhp8Gy2GrJR+f0OOyfQGpvyN3R
0cm0tGvvR4ebDpXE0h93zQeabTQfeG1NoNJBbY8Y946r9UQI6TrZtMtr2fRQ5LYdk/T7kqRiiOW7
zid7I1NYf9rhDuyQVTT588Xb9E8JHQJg79rJKUpZNNf3KajCVz7Dk3XAgNVZ89uTVTdj9lOKYVlH
rIg5lQoLSnV9cLctK/2X5T9GsnqoGyERy2mz67ihV9gsRlSlkTHW64yyt8avjWStc5m2JS1hgwEF
zR61W6x72JsAlXAtp7UEzla+/FOE7+rhERMXq9l7d0SS6o78BslpxqQCttwtSRAba+K63u13fYhd
7W+OmswD+PB1sGRx1f1AUCcbXMC0m+DyRYbvMszxGYjbMSXxlbiRhemjr641bQBl0boF9NMD9y0v
jpxlYDkJ73J7WHmsFc2YbkrNaca3KsxOMjD9hDYpeBuyO/bWKR8N97lRTq5T4SNwnonRLDpt8RoW
b/EaktMZ5Kzm1l/MW69/9yWgpwGvo44X9cMDasKk9Iyez3FFOM6jpmx8YgV6AlCjgXpKC3zlnM4A
nY1eulOVqSKc0FFpaajFisZ3yeGiYCcGhmJdh8oPLmfzDx5wHD/PYLfwED5uSjbZcso+//cckTlW
Mx24YPIBvKtDxiUUbWtzb8cPiT1bG31ciMa844gOwIfVM7KAQjWiWtSYNVsH4uwXR1+KktphdjpE
yDxfTGyoxqPc0bjXAGCIVUQiOye/IAKAKV47ok/82strH0FEtnTi1q3lPFjSKUfdo9Jav7phMgry
nmrfERmfuxK0PWwgzT/6W3u6XEr+JchX9UTAHhTFs23cuUJ5qdwwlpylo0RiyYwHUSDSL+YEYRUm
iYqiRMJDZUW1ec5Mp/RG0IGy7lLl6FEAQJrOqb652PnDMScwJn+/383dTCAwPgkoTaFqd9DPjDx8
f9vbvGSILNtqKEzc+QnjS9qiM5LzonxURnxCMSd7xF5HrsdIV+lV0OXMpXJheCreWFBxvRVeJKG5
m1GasyJud3fHMrzWJ8FEio1+I83EwrYrw1BMyyF0GjORiiRMZzd08YrvpNii+xhZ7VuBaZKs/YSH
nhDAOwksWR9wnTJ87I2mcg9ERnXk8pySrmYiOR5ZoWIcMt+Su6XoDtHbxQzSBqtFvV7mW5vc+k4+
q2iYOfocQVUBgtAweYKwmMt+tonxx/XOTr0hKgK70tlr6eHlk/Db3wEEgyo2TnYGccncCxtFixVB
HRQfBsqMa8d0jZD2zbRJUeEm639mRewXnI9mqLBdZg0RQRmnZ3q8EuLNMoKSfhauuPm5kS9HMakd
C7z54dKlSczSVxYBeR32OD5iJ8Tdw02ppss2TfcxPa/h3C77rATI0O2A3rWB0/P4sMf/p8TMFrJq
jxcK5eBRigWxKBT6ME8GbYXgMbcq5a2HbkJaA10mqqDsXOwIlPTZDQu3FNN6VO35zOCo5Nw02oZJ
Jh4vQpkX/EWOcTfbNtwfZpQQSQc1vX4ZuZah6sijBYSPPuoR9seOsmLJ26bzsTTst0oF4Dxe9eAC
eQOuUsqSUj4w69erbu3OEHdaeF9621OxvQtf20oHyLzqkm/1vp/XOnoPLJ2uieSUo/i4twxMWNoY
WD8CU65mK4nSnf/UtnwEmt649QEWl9l7GC4FxeYTrA9n51fabx/n33A0u6B9la5s5SxeJteros3P
UKm0Wi4jZiDQ40W3Ugwn8us6f5AwoKg5nqA4KAj8CvaF0U9ASJUcyCljZTyeCuYO9Qvd015Yn3xm
GvEePvRtwwO+9hyqZEp4e9x50sp3rux7d3MIPsQri6e995ipTh5PtQi3bVbRk2jx+TUKkyin/lR2
MA6eUkjWhVaQC/JkuALxBRsjN5/6KgfYkut6EAShLPooJWeMrxfAmJjqz0eK1NUVhITpPi0BRMwP
feHZLsWI0XCFKTHqQW3Bf7psH34vABp2Fq+5EGvpRqe/DhjvJgRgHLI+DJj8m7CS3GzHt3DPAUC7
26biXb4wsB8d7AKFF1rnHZ+moWLbYOmBOQ6V7xmpl+T8YU9ck+pQEGe5jzZWhZ+bHqyK4WdgERNB
f7kFJDKUG+kK1QswIDH2VGbzPdVudWda5I4c8zay1CdXgwyM3abfdOYbKnV0PZoJ8Mjz4HYwHVd7
t0GbYHG5oF78KoCJanhAbx5S3IXaIQAVMX1dZmjN46qXpubiunqpmvxLw3I8rJAWNwlfbC8AfniH
kfvSdPRk9GxIRknaSllW/e4AcNUzocHTt3s/rlHbyzIARplptXAZj5U3aPaUjBgbMTlZIxQ218+j
VuJxMY2EtguFP/WGEqG/7emWK94Tnf5EdliVJFhfjJPdvPUJX2B+kmvgXV3tklDNSbXiXQc9VFFh
DBvF/+yUe5u0GGJEae+RHM3Xc4TlZIt6huRE9YNwhAzWQKdufWaBbrVtKjXqfB276uNZltmRdZEj
xjHGJwxo0G92tjxAwPkvRpHNYKViVAmc+ba7+AGxq55G3FOM3RUkd1i+6TJeG9DWtcHtX07/KgZz
DX13/LSlxXG88dRNAuVLr72s0RcCQvaYTM4Gqa2PA2JTBxQxEttYTgPdRGmNbE8juzjv9tL7rbJA
D38ReUpnPFcb6To+Jraw9yGZHWo2pmyooCpTZIuOVwwwbD/W6OvbmQdpROskCbf7z+7l4J1WwmIi
MsT5V1qaOa6sxfSJ1ZypCOT+eLb0aRpKNdCQTorq5FM0er7YRFBfhXlBiaE4aTdCy3T2xn58/AlZ
2ryudUhV3YKf3i3wRl4lsLEITd297aa5hfZOMm/o8NClqRuTm18qpmLHNLE/+RWdvlFL0TnGrBNz
w+jmmTqnHhzD/yoJKEcpDxGU6xZQ+vffFeqzLx0a9RDlEXhrpIUrxLtUcDKHlAT9iUfwX6Eb29iL
vhrVd6MTiXRoD6aGSb1Xk09fTlJHeFbBadByK9etYQFE70Y8I0P+uhl7SQTM0yK1qo1MNbMJQ2Fr
pw7H8P+wBdxEbpp7QwaY0Ed5bigWFcssmUnaHAWO3i5qTOmhSuBMXodcheavTBD1e8Wafos61I+9
lESQYxqpxq+liIhxA1oin5yKWQDq871NnlQ6evLPgZN87Q7juI1pRjgh+BEx0Hoj+cfi8akjuEur
vcDOm3sZLaf3oT8JcNtwB1jSB8+BFWMjqLeN3cwZrBRFJykYFIEcxk12td2o/psn+j8bw6sjV5F7
q5GPPyKKvOUTaj0NQAZHe5xcVCvihUpIQL0LANqEydjzqlV36eoQI2NEn1ZilOnMC3qhvkAQHyEw
UdfUMN4/DZv61MIgKi6BhDfofhctsQFEmjgz/PwzhyHNdewBj5NjFQxJCprIlPRLguGzrZ511yfR
XLQjX64Fcfh8hYy+NhmGlAEg9HKuVYfQNW6NsGyWVCKOUog502JvZrEw4UjtzqQNqxmB1IwQmV6A
dpkE42J+RNvzsaEP/j7eJrLnYLVtflKkougUow50BvMDNnshEcQXQQZmw67m7WV2mhZjQk66diw/
6qVui2feonh/f/lgjxUOnOEVIOfmKG+FK6xVxvmWkHrLB1cadBQxNsJzRQARb7dtwprUnEqpw/AS
IBHEE8NV8Byk3v2lXU56RRMQ3i0Q/BPwcv9GJMRPV1VIBO7ALbeyoC+SZ6PrKtF/RPILu20wRUTi
yR2vUE5r8CB2xKVsT7V+uG1Tke6nOiAAdnzd6pw6bdG1CdqV4KWumy9WZodcqWQ6MxcsMPcrs+On
Gw1kTP/kzS4afHDa0diH2s0y0dyixuiBvS3PoGLUrtBKynBHuqooGY7FZgAffCYtQuaWCFJ01UuU
piyuoQnSSUdtS9K4NUMwL2+muuLjjcVzANOmWdh4wpVrul/LeL/SyU8ZuLwKPq0v52Gq4D/sOpWS
owsgMKdHXYsWLFfSXRAuXmHCHKOhayAjeZeHyM/8VCGTM3RqRfXgwK1le93vv6PAmP3gC3bJlWt7
UQvvBXw6VkPIBER905ANwmnL5psX+MTmrIG2xHXFKfF6S95Ef6FRtTAt5gk+ERXeeskLR+soke0O
SgZrbIVIcRKlWrChNpcOS3ytOuC9nIdE2KwLpL11mzoHWbw9YQm0uzj08PvpEpiRf0NqO2tFP9bt
0165DKQYsYn/qzPY9EwMux2NEAY4WIzy6QXyE4SsRz++erC9xye8U8nvH2jroMG+rzJ1CZEDlo8Q
kSYcS1Jbaw+xielaVVz0MbsgBqZ9Fy+PwW/Av8+/gdQlpdwEeM8BRCqN9UWlk5DZMMS6wc5BIVvL
Sn3WAVUCLLHFayP03rlWELNC19DCFBe4n9s5aA9kth26ijwBITo7CuKacTexhawR5RWGrwvyamtn
sgiYIhU3LlEC+gHDzGJ2BPTLRqN41f4Gu8aBhxJKaW/3KLsZCD8Su7RKBROp8Es2eyjlYVJfQk86
KgbBKFT+FSa40yt7GHieaWj0zymM9zE01H2QeDgZLd6s/rX9Os4oS5xpadG1EOVird6ynXhVA8+k
oNrquLMJD1Z7IPs4AChbfdfULkAU2/pTTCZI72BjOiyXOXfr+gGOVVtTQxT72kQtIa8SdugRD8Hn
cpoYPaWGfSqO+4291cj+PyK6+LMKAGn/6XG4poOziIkH/oUHcSoGAsVeBBdJNT8X2uh9k5Drc29S
tWfILlA6DPvM5vdcSEwl34nwyhBW4f0n7PLi938Us/v1fGrD2Kc2GZtUUfrtlFibP7Egq45VkpgH
/IM3hRznfLLtzaCiVbYxaLOYV7A8zjaESr+WQlCcLU3zlU8nYnPlTB+wITIa4tAt2zWWbwtnCTN7
1bpZ0SLINdxK4bqE2N9C822Ic5jaPV8TBYVSr+dGZZ6xjhMGSYTbPQTO25wZNHbg+zEwmiLMes1X
Z9ArDUT2moFMG+8dCdeqe98uDlNMH5Q9OAdLTmlHO/kwWEh3xCG/gazf8yppo/wHhKQWFbmuZRp2
ZKVbgKRYojGPyXamm2NKtnySmahz8cYeaDBVNayuHKrzYhxGbVvSCEItQTE/PGO7WfwDdBMi9cBm
/AtM31m562cFbvyV0lgt+ds7MHJFlC8nN4ojeAEsNQAdWszgBhsk9RGWyZ+zxWIsbjOgfTPd5BJq
4w+Uqwt3+mivOFdOpWMRDBkyRGC58qe0ScVeNi5ANeIsEpp5tiqF8547flJEOO9S58GtUSrXfqPj
6mfcKGkIgbym7CdPiNwpClYZGzwoMELEOuQsEpdyaG1LgGqfZfRkGxufsAJW1b2XB8fDMNl44GU8
dC1ud5ww7fnd3uZyqeEd8+srrw/aogA6Bsg7EJUrkGHUwhLbvb028WRUkuJ8rMAiPUkymIIZmj4s
BCmZERstBL3rHHGqJK5N3FrpdcsS9bIzmEKqX2yESjFnPPHcvlUtmWWpTVubPUND5LedFA92mBBi
E0cM44VYt/F5BRwyi1b4A+TB4hSHX0WmpvSgSrIB/pUtOUe7KgVD6RbCcCE+fW8wFTsoANX36KIW
3d+gulswlYomsqW5gT4z+Cz84L1p4oZPaOFWwvi8QCkRWGKMl40A9YtyzyZrky7hgtGEgwdgHzkn
vmdVjMjZl8EuH0jXloWKvCdEOLYtQMWFGwp4mBK+ZHwYLjvlJLj2c5xfr36mdmhWg087GyMoPtBC
F30rUOdCaaPq37jI8Vs3wvjYEf3WDM5U9sfRiRdpZx6wzZnkeYQCUCsae3QqAGjtg6bZpvVGfAW3
c92+29OBzY8ZkyGiwZ8kmTniHY33UzViuqwEz+HnhyCaWJgtjZ4XD/Sy+TFei6h0Nu6nv/21lxiE
KAW/bOSC7xWBQTPcdgyl1LKPa8yPEnjgOUDpIhpCFzj1OPMaNFiPB3Q618HEDzKYn9GRN38ZMt9o
s/9fBkxEgztcdw+LBdMLyYCR+6i6EIo52h+DUFFsAYFNlPAiU1NF9GUjV27VaMZflKZIoo4v8KBg
ZgCt5DxLi533uvJXZ3fvidCe3PxwtZV3U9jK0AANWFLtUcyMshGq3e5EiKNDQRufHgBdZiZ6rZbn
x/dLbdFWIzRAfwMh+v7oDRvKFVIyCDkHA/vkjMqdw2YICOJEQp92Q331JFId4DX2LH0C4JafWuYC
tQCsVE+tfPKXMzGURVEaFB4wiWq5WnK9xFCS+qMSvqWkjtIjNQg1t/AkBGs3eDYg3+yt7tJQA58j
nlK6HE7CiDcs9iSecL0zcVPIJPUGDKpu5lOxvK+GCuGSpIT8wKnGdBNlOZv7eqrF+ru2S2LKfPHt
C8d+OB4C92QlPSBimJnjQNBtmmI+Z0mRtlm1Viiaz8JfpvkLjeRqZNOS71XBdYj/05lrnhoHuOuX
fZWWuPD9KMjpuspyxne+9JcTEpPckFtrtEhqsNMyBuX/mspHtbevCj2XFdyNtd4b62paVQ4KF5kO
k2if8Wt8ZtvUccjDv5fcOTNvTf8KA+tplhXskVHPvKfoIuN1osm1MKAdqutsDA4NqlZ47Zb+/H7R
Qt6u65z4VPCFG2UfNAXVQXXPwMj7Zuc6E+xE0PhzCBZX9ukHjMkNppCXXIGfDqljIvxPff7LWHNu
NZYFJCqygGHuCkxoVZub0phpDICQLWkUqoAOMsAJNnnG5o68D8Xf/kazFXrQcXgXDt0feXf4yZ//
/3mlJV/CbNCSILDJtL8ACcLEh8vmTSVZl74rcVPsRCPvOV7VvZW0sCr8XRb8PZbhhouVvFXKDjnJ
G/B6K0ej3UX7twWACSA7NiL79IWLqDTvoQ852zrvN0M8JYq4gOLMQbuK17clKRlHzeB80OJ0k49Q
lSKioksgiXaBStJ8h0iC+kvou4dil8OGIUctBbvLxOEOPn+LmwjDzihDrOP4SKMLbtMLvTBLdujA
IB9dDlQiBPKwvyUJ/UURN2Dcx3lDTewbAG9dYbhdfwTKSHWVGPhNYNcb+De++Z0WyDfdm3O/A0G1
UTrSgMBbca/c24VbvopsATI4nQQ7RAhu//itepL1KK8yEhkxyRPZJRQYRdOKNGNaD9t6omezE+m7
oPl6bKrSIGC4cVHxxJo+t4fBMfPglT21I26BsAUo+hcYMG8pWFLj5G3oDVQUdGH6i5DU4wKPDD5r
mmO0lLpxOr6FPnnXTd1H+WYsmWokw2MchF9GJSXlnv2ON7m86NMRysGysq6Hd0atPZ4T7tOqwQLt
b8FDpTJFSz0eQ3K28e/mRWzr4FR2fOD/Qt41XSfol3J5C6iPIdTuTkSkFFSGbWrffxSYf5T53Sl3
EKFLngKY0Y3k4pX8t9rhIHY4NYE2LDjOCVCiJ1BvZpXMssAJF7AWr0uTzORHnNARYa0au1ZmoKxC
wFz2Q1QFIaRnDk/GY07lElf4Tg8BUfYxGOhLCKOyH5t41AZNksq5zwsX4nDn5s6HiVoxQMpgaa3P
bax+I2TwpTdNhyvzD6WxiU3UptmuXDGQ1hIP4p9Bsl5bxQ/fwJKJJNGCJvc2k7H84tHM+SJQyABd
BOZRQ/hX9BG2K7nyVknC3jkK8VUYCtKn33Oux+C6MJud/JDWjhe7PeHs+qZEGjAukimScit9Mf14
Sx7uhlX9H/nDchNEDQVZWOh3sNM42VSuBB2ynevE63w2ntlG8WWpOqY2OpKZFpj2HSet4ukSZ+DG
O0IxuV88oy/4AKuShgQDkHoKTgFRmTHxpHllwQDnl46MVFpSzl0PaVO4Amc8zxYh54PqjrwhUYVz
/qAghn/OyEhvq3ChFeHja0awJu8gfyAIVfPq1bpn3agQxLBHfd6Ge2HbPwqTBA5DfB2cEWLPWZsP
liGQnkPjuFu0H3xsg+jzwdzv0FNQZQKGXv2G+zdfCQrTTcUIcdNfRAslwzWpJN+dDpjA94b2Y8FA
VONyiusD5am3CCwsStlYV2gtfVKImIQlw5QiqNKwN28h53ajBOCGW1c8dvpucsUzVS5lzjHPWIHW
pqaXRJf2xxNLbe97DKrxQ8ww2NNjg/DGAYdIEbh7hibC3CFJSpuNKP0kmNoiR1sHo1tLyhLvgpTE
l2tdDzAvcWLlDLDSCnnN8vNhSwtCNMITwPOKbudV/1hDyk8cVuCqTO+cFnfEo8dN12gdrhMGPlzr
jue2XzcE1gRqswKHiLBEBd3oyf7ufXmTHGdhu5EoLJQwq0Dp4vPaRzvkT4Tl7ICWYFfRzrsbTTqi
kCTQ93IJaA6N7xh2/fZ89WigyIOUOEAOddQTa9/JCCl4sL/Nt/x8/V2gxlJNg3STsfOMjs2jgoPw
uLaYcGsCMb3Mq3miuYk1mQ3v6YC5gReaLoMuFb3ngo2efW5WcEM/fIM4hEYDc+fR1fEWdJWiZsNz
77nJwz9OMfgVswkQXQuUlWL8RDT5PsBzFk20YSpNGTEr4wdu7WE/LdILAo1w4L6EhSTjHxEFy3pK
TgzlVJ5HsqZ5/Tt8urOsGTAZz/Zq9DiOyCkatHhU85PERllScLe1hsCqY4IqUwD3gEenKGaS4odM
etJovA1vB6uZtnmInMyBuh6WdrF/ZMRymi40TE8AIo8YBtC5QbHr8RCjaX5ZKOZJZMlAyc4d5364
7tTP6vAOUrv7hi+dsc+owPb6FnPhXboHdyBRBiMbjF9riFED4XsDUiiciyR+DZ29xlVrUWra/qCT
xVe0eiosMAjcjaRpgI/6ikuvGZj4JLzRch/fwtf5hzEzvSs6dm9MXu/GDx+kUhPs9ndQ4diRpUH/
8siGE2wAP+tsicJqJi2J8anpsn8v69JEaKoeuYeiVpMXT/kIYD5PfdcQcQVGyhwx2XyEXf1eoIZb
ktipVUiIna9OAo/kFTtOC421fMqH7EtHgNWnVbRnZQ5Q3lNX/3nz3gzb9E9k35ik+gIdxLvRpN0u
GHD3jJjg+74rdAhvld808LV6ECVWF5YxEMnDHaF5A7AiBaXx2+dqq66p5rX7tpcbW0yQLHRonOw7
WoXKrkrxUwKHSrvxUDpmnxpEZ2gRKJdaUjhf6mpQRjxMkpS0jz6LFD9qH3ynsYGi+8ouO43K2vbp
d9G3YO/RsI32JSmYInvufLCJ9ePn9ei+dzwx7x4fUOPAmRfyvXrVIZD5IrB3dW233crgY8w8l/El
PqxUCS2A9crG7eHmL9aMD+si8xOAKmvCrV+Lc8qByZ8bIMslHFWSlXYIGLRERbCoh0O7VH9532A3
sOq+E7Dsj/is3HPWQj5fhCXrdOIxEfA4F3aHKAGWegnR6GbUOd39/3EBobDHhiN06e/pROESuwW/
puxe0faFF/wCQoIdM43nR/m3dqYiIa/IAnSNlnQFIQrgm9fTnlpWrjG0YcZZxFW2j38bYl3/JsCp
w57+kRXwqrOkLIcdJeyLZtb7r2bJmo5msLxEoo3mEueMri6ULKrFb7prgDToSYLDLJ1dYaQHIyjR
ThaJJIDwZiHrgnu0spRZYRoKJaDS7jjeVCGn//y5W+jH9QZK75+QxXraE1g9M7ExPrwEqaZObuiW
iYDWysjh44zl5VzBtCuAoAC/Mf9zXbAiXd7C0aOoN+Mxn8hfaVO9sglFNDhviZgormZw/HkFpzUP
A8hZKiu+mHY88VMcmGM99mjhqy+yE1K6elNogVGNbEUEzmSRzv/ofnibpl1Tp9N1t/80z1QJzskG
0IWYrcLvS2YidA8V1H1m+pVEo4Af5EoBI86nSbG6xW0aGJI5OrhAIG+z7/EgJBgoaV49UdbWZeW+
8TCUxk3WglQihopu5wYAQ8K2YJ2nKpfvbac/KclTyjjHSPj5EV52O+8UaDpHITj8D9rqMJZH1Wde
d5whsnKpQWmORPM+Zw6xmTlA+QF2KgVN1UVqgMcDKP4Bu5QwQw/3X6ZGjFN7rjeb0cVlSZh/Vc3S
pdCUGVGMkbWif6vU1rAW1YtMI2weAKqVtmwUb2b1CO0bgMz/WnbpKSsXVVfE4de5CpokjHRhBVFD
36Qu3YPUAZnQNRTdSFXtRfvcGp46szLd8pwBrMHUR6UBOnMxKv1O8sw2t2Pvx0Sybk7PzqpI2IE2
QbCt/3JKJrjpLorDMq6djm07cAgEdP9bAk99kv8dRyPIm0URds91TDUwaFAvIJel4hB/h0qugrWt
QYxqx64sQSda5dGGtdYoagqUzhmKa4tfTrEwxBvnLypKt3Gdyl6Qdmxh2fJ3gdXFVTWPmk5q5uQ7
NzfFcoyGlfkDidmTpfOhKUlMIO30D/nkF0TJdoyf5Bw0GvLwOoN7PlrQrOeg81sXBXpVuHm0X0b+
ohp/URn4/CYvQIq2HwieMPRKawQbFF70jEuvIlrF6hANyrgeov7V+jxB2p27PrtC7LRC0++yhi7Q
j3/QSeqETpE3dU3uOlv0ZaoMJb+V3rd17fJmNWjz7J8+gQg+nJbARGKcU7/dwWrEDhodt+BzswpO
kiM0MmlqYc15golC2wwuAIgPNp5m6ia+cugSOSBIztyzV7NEif3j5csts7GoFOqSv//g7xX/LBA1
AX4qtXSFWXZqhWPMSdYHrhg0TiknvNaDiKG882qrI11rnAAIPUIGtkCvqmAU0oLbrU8Bt+67V5Z5
MOB4Yce/dwpv/9LlbtwsZ+UKzTT8OoN3PCrYGNHJsFvpd4IFm45D0n7Q6D9ZYe/gegOwd3iAmeq9
OEVdF3MSx/6RvRMu/2wEJ3bVjm0MNx8GE7W99T5rv32fLJbUVIh/KmnMm5JkqxU/uQheqef2t0IR
Ml0WA8ZQeKZX8DjR90hy/2TmR3nEmmBV7m+/1ufpZz5A1Gf+VAGOuj5UfQacHrcBUBpL8hcJPYCH
C56zdeAO/gix1/jPrPOlMb15r7rkIy4RANcKSKirDVMADAjsOHo8xv6y+2wse3+iY85WX18jQust
TlxNxrdIdGimFJRs0QDX3poXtdAcZ52D74toHjMMm8B35/CEMcHbwLMee99qkP/kRxxp1kaBCuYj
uRHpNIi/n8hSf55nzLi1Ri7Q3C844BRZ5iupWOFWS7eOPDbUemnp0uoc9NO50p+pv8346h8OjH6G
BdJwlSYSaMDKj/6iKrqPdiFVAZrXpIU/YG1L5uXGfxERbx1+KLl2ITbP8d8qhmlf6h9MrKCMnTgH
+HBI/W6nINYJ0MHzV6buL5QfpYlCKoNH8ws+3v14asDHXh8aWrl45xdZb/S1yKz+ubgpB6iCyiPu
DNt6X+TEhpPscU8+ZJ7W9k4mDbJ/l0k3jUk6OpxQx6Y5G7YvmY62zf0P0avKn3Ka0MWFwsQ4QBm+
h4buJd4DrGvHkUVdVuI02DETK5Z2A1AUB59Pb+I1I9qZ34JFHow20wL9K8NxmdHhuXK8HqZ6KK0N
ZKauN8iI5IsedbRbRvQJH2EZpKWBZkGaNugy1bEzq45CU8ucQY+rFvzvUTMa7hDRlvxk2mITuX+F
BXQWF2vzB7TR/7AFcjWZ/2TOoomFcw8DSAX/KE7y55WR1T/gXurDV3dIiR8JD/v4tYytXEDlcx5y
5xekd7SsgNxPoWo6M04pi8gXKIfXwMorkwRtPgz2ivMO48ldp9l+ANWxAF9FvjQL9751fIH9qIg5
5fMHGQR2cTAGhpj0MFzK+P/ewxwDT7Mhl++9HbQ96hT39LrqE6Y5EmKg7kqGW4RUEhH6Oq03F28/
hCOBoINdNQJcx6iiVONpQae83qg8AGyXhrYRAH0plaF9kxLQxdiNPa7ai6KDMwfCbiUZH6EqB/Vw
lE2NX9rgsDE/aDOpuCSb+4oVMlAfldDhZJLTSSUpsFiqo+FR47YTiEFvbxaGgsQCpPMOWu7//Nzo
x2AFqJ0liw/sAQaHaaVDRpHKcKqvv1gswaYkuan3HBpmD34PS1ZfufL+pZwhcC9P1qXOgGbjIUZA
VQdstD0GyPfAzMYvSGnKWHwX7+fdInsaA20SKrFMLL+B9M5wD2PI6VigEiyiERMgv7r8sUwEVmZS
fC8hvDU7fkV4AOotv0aQmD6KR5WbhP4G5yDgzwr+fIDoxd7RnV3nwNO20CGjuGbiK6PauTqAxMJj
WPX610F7CTadnKOJTtHyOpZ0imyXJgVp+vql7C71TSoqldqYD5ZFQj4cTkoZVgpuuHSvUTkRbx+x
a3IRJWxFV6S+vOMO+jhVQrWjmign8h7Mnk+4dhq08mT0efU7Yi1Q8e7aX48kXClGGaXMx6XVHYwq
5UK7EPRi8ooEPhd1Jj8PbFIC+wtcBxEAZX7604D92pCnMqk+PTryJtdRbeuYCdWirMzqoP1pE4kJ
04rTqIQi+ENyUCOv65jE2Az9fRW8LP7GzbBM/MaE//SU3n0fJhnoBUlpIP27oWq8Gbsb/uQtTo/o
TTe+iwXXG7+YJM+0wCCkmLhSehgp2fYmjoJGH2qUGv/QXE8ib/CFiIwGANbQS1cEWVWvQBdNG5N8
ydjWUTiIpd5rkkf2K8M1/hTginsNl9J0LX6WNMEyRMRYy3RXgYTLiLcO1NNxUhddcdstkwjEyrQf
hl4FFUsa5gEPEWtG7wQmPjWmhixDRdej7HArFxhS+XP5rHzihsRuNiHJvPVfkK+sxPgaiAX4Sm4x
r4Puqx97u/bH/ZyqViMnoyeGji6gcVBbRdg7vvHN8EHC0BpJ7omVaIfrQzxTEtXny4IGzDHSghoe
vhUr06ZqbNGayX7jeoLtn7ocFhBQUzR6hTE7wxPsK9gehKzvuVT5J9c7+DSjOynM1FYoKqzNCYZN
z8XQ7uLV+kURwydyWggsJQzwmuTva16KbALo3ovB2hF9SD+kwoO/AxvWYwPqfd+t4GCw6RB1qLyx
ltQlkMJYIjskwCXYyaDfrA7XhpZNBb1zHOz5eWWr7RGbrQCcLiRtCah45HCev+52tDv6tcUvI/rt
ihFBIB2wCp6VYL9OdSkdy7Rheb8f+1fD+j/lC6FgoeDxuVm6GJpa50FwLzZXE2+/7fOo6vgMsXmB
LnS4lRRwwSLP8pi7wGwGUv70X0D+t5/ptQTJgmn9KBiW/C2gSs5A6YMQvyFxtmRgu+ndqXqJXPsj
8M6s2xSpnTzKvdW900qFbdmlmvES9zBfsH6JWB4OZgtv3czCaT/uj/eSt/nP+PH6HKa0I/h7VZUv
XF0sV18Y0na8l552tQSBkk4dY4jNgZAPFcEXdmLMo/BvVtmiwfDid3cCXao0xhmeeWJC6kXiFip8
qaFE4vDUyKko5mzemL1nfEeWboMbW4fZAFC0Mu8Gg9IJzCDjnwnpcMg/QRzSFQTxcUkFJMjdc3j7
E8t68V/MEC+MF0BF5oyql9nVq6FXWO7HR0rYlc7sWqrVVP7OC+rVoCMPPbd42cF3GoWWUlB0Mi04
SiHCNon2AJ71J/t3QnIJUmRHFcIfpC19QtZlY9p3tAdVHQ/l0vQUinSXpjaGGk8Ve1GswrERkW1L
s1Qp07amp+nB0yJWiQu6/sqv1v3BNCNOUqm+QThdo/oG4TL7v6dckAb/4Lcf58F29CmFuOvSi/YM
A1VHjRtHosqbWYF7ODtnIldoIMkINB/3dsa3xJRTtbts8JqkpAzKQZOUyxpwlQOnQFfIEp1njaFM
S1x0Ev9I+xdc9rNYDXmNOP2exm+mfMFpWaTwM3oB1eDY4ZYKnZKFMYDxqxDgpe+7BVeKo8zIW4DQ
e318q2dMtzYWiiE7/NXz/0nES2S+vEEkSz0MQY2+lNFPtTuoLMzz364A0RFCPob9FDIbQdvPQTGA
QRo52kueF+VtZ4dCUinV1bKxqnrwml9kpEu7Slm1bxVJOeV1V9UpbQqbpgLODivq4Efn5dnwuHyh
u7zHTrALBAgCZK97hNld/R+772dFjCfozRBxQmDXuDutvh3Y55DQPDZzVncQGqsgKBsGbTv3cu5E
oqCUgNyzSpFauRjL7leE0OW0kcozUlJ01KM/7bkslbk59bdqFmxumPqFzD7EhjTQmz7LTQ4cCblf
t8+Nebsp+OKNSi0HhiayTOz3O033XfqrczIqV7RF2K9yu8JLkt+duyDtnblhQGaIa665M/5zP4Ew
8CI+Eo76I5kycRHcjn50MxWiUoJrKR6mkBIMZmAT6SCs2+g+FfOGTbZcermmEJVQPCVzYZJ4rQv5
gyuisUyvSnRbJTtOuirmXFoGTbx9VMTnl81Sn6ynHUpkUpANUwHAbtIqBqUWUcessVx+qKNdZfyU
xEyrazYa7WoBcFRHr7yhFyFVA0qcGEuZyD7pQUPDrwPdx06FVkzF3TR5ZycxrKw1J3dehuMKO4rq
dmvCE+clXN/LIKAZpZaE/+GCUm5+yMKih/ZHvdEvLPnjQG6uCSsPBLTH9gg8O/ZnyRerEUa4xVZX
mP/GsFMjP3TTkJKJPpmhuEJPTWaKnfRA+6rVY5eohaehlY7lYoOu8WF3HI7bNdTNK1UbKYQqzTE0
tYBf4++nxGpOAg8x/bZTpqJhpCvO7vmG8eqQ/Hwjdxd+Xm/4Ssz2wDELcneMytoTAiGxgDgV5LGh
t/ZXrsF3nJuV347P3z3JFOhEFOsL53O8Z7PGFNCgBWfR2UY4YGs87n2RC6V9uJmYgJW3kmPk10JZ
qbT238OBo+jst3o7VjnDqlylLyS6CT7MvEQwsSp5boHf2kxdTdx5/x8ykum1A9o/zVRc14kL5SAs
ff87TmJZ4BA2Muq0hToOLTDv9IzbiAm9tgwcILkz91016P+tqDrqiBtK9B/pXlC1/WqlrygGSK1O
D4lpfn2xBystS6Xy17Ct91ZgMKQUy4eeDSQCyVgJu6CgtnpvhKBw+a+/9xnUxdquGtWEisLcg15G
0sPmA+cWPXvaQ3biAnw/urXmmxXpcm5bhfnx1ChWPd8NUjXq58B+l4INZbLXFmoYCDg5+a7C7LL0
1WeveE29TUjLmiwFlNVq3ttz6ZzA8Ao+ESapy8bbqwATDGoBaRd9tl84Dp7eH2p+RwITemrgo6wb
MLlOA7L5nWoVOrouuBz6N9fSWiGQkwlDxwZsxnqJq8xhbj1GKJp3nk5Oa0GxHyXAwct0D8oBkm78
S3v+Q9S+uyB00yJLNHPagxxKM786WYwKSQlHXVq1icy5dgKP/8YXzvIdPBOZdOYSOA/Dju6/bWPP
+bkgDTGkOqcLKQpzA8Yi3Q/BsGfxk3EiongALgWVzI/rPIEnWd6XajUt8X2vxkrFAkQvx0TJ0yix
iktq6fEFUKTutXK9Eatj7yd34Q5a3/v19LLTHJuyRDTIOJiJdZdWzBTAQa4Ie6abwxqfI0yxsTwn
+9O8CTaAg+aFG/O25YWNu8sRSFAu4KSJ8oliOUTMFVMVd4cJsKRyZ5iBBOBt7yYlMLi2VHfYHaED
nyjiR+yrDtrftWLf7P9hg7ZW0/f+u+RmBh/TEGeAhRZ3mcqUTb6VST7sz1hhIT/FtVmBU3e/FdRp
hN5n/ZMh0j5nmcL7xST1BJa4AsI4/zbv9SuY/LXjzZ7zGOJ8VqWXMZzXG0h/XXq6rpRmg5BTt0TZ
SMKdEocrB5jorynI2E3+xeGONQV8mtKu7h8lcO7ywp9LsrEV4velilZSQZ1FSi/iPMUfEaCTxoFT
SnJvs91U+GqWg07FPRHSG6l1lDtpdxfaBba32SU0iAwwAL4xrIOQuLMBxZYLaGUxLZKgqfNZPRNO
iItJH6a8G2WCoPHDnDXYyQzyi8GrMqSyjUPzoM08ZsOIR8FuHRnBx7gUPhQmW7MXST/gOoQfkp5K
aOPyZFhBxQSV2ujYMolWKWbnTnyq+ZhAGuH9/D9qPTf6Y0BbKqKUJoWFKUAQkWTRSweDE5dk/G+C
qGJdgkKHlhM3Upk8Ecdq99gk7RMrzF++Nsa0SepYQusiFnERWWcPf5yriPlFaVb9gCUIunw9P+Sc
93LWYuxkr/rMxUtUzUhsMM1byb7AWUGnUtg7MZERDhQnyR8bp5a6FtjRxc/6mw7qovg8Xj4lv1qA
brmLrMXJD1h12pMEyGmSuck4FRYBMyTdi/4MP1GAHjXhm0SIYuXl6STYLt7y/LZFF9NzV7mr9qff
QWGlxQAz9TL6cvz95MOVvV2pt/YykX4tS5H80YMd3MiVxEG6+7rq4FcEewWP85b4ewUvcUoEBy0o
PKFnenp2sLpqk4PsbbQ5RetyzUKwUMFSBpXOF57EFIRYI6z++Y4Ra/1VL541+f2oOEqI5gvJK+7Q
MMTTpnubEWkn72IgF3JF0Zedx6HTEHDDPz8WcTEkXnl3svUV/bdgcUZLCyXYPxEjNkVQR+zDLNTy
fcm/RiqN4MkpmUgrh3zMakS9U/KN2rQ2PNilCiIvrR50FuFJcKB73NYlslCa2ibudLf6CF2rnopo
CqspvAPpdHgvNRadT9ZKIbXvW9S8F2MsfQQn1XJrni20q8oKG/jc1WudvIqdkdJ+0yWJEbpLU8h+
BVtBpDttDqEE74efDzFBryklal0jxf4dtPpyNiL3b2UVetM2NFAD3hCSYFZuW1OMSAxblUo6ScbL
qfTSikEUHekih17g8c0vn09g079cHmY6Tn9S85izHgF6LRdiHsi/e7H90ddaR4jXwRyUqsFdOOcn
hYfg7cXFG6Q4lFCIuugp+XymUtBAecNZ6bRCgX01tEdgYvS3YXF3HMwGjkhcu9vpG7S5cidBXtxO
8upmfx5L9lHDm3sJ0nHdolkB26BBRZ0sZx8Qf+KdZUhCeXWJO3N6KCD5jsT0EBDoReg7tT3LYBNG
/ptD+otKVpserrqqkWiAmaDhOwcOR0GioO+3odhw5vsWtjiupfLDeNwzh9U+zYAq5Q0v17dqAp2b
tP456Z5jvh7CB28mWKzBt1lw+B92USopYB3qWoumTUOCk60oBAzcv2xwv2FODMzZBllRIDqpNy8l
C9KfXDPNL+E1FQdwDlmfxhj99QWI869zH6M6r5UdkwMQT5zs2ntsR5DyQ5guMt6dbpXn9FjBM7Z2
hBFybZfUDmTh4HnTln/dqQjj0tv8Y6oefF78EcKFsF9Zw2/3lj3pPI56iBvS7yKZBP9+GaNGxzoj
8yIEHiqHGSfho3k37Xr8zALjU0188Eb3+3/vR21p24K6refPnkR5ptr5IK9+QT1sUNOCQW0YrmF3
oQAnnIS0mq6LOJZMVJdGYh3oF7fdWJ6U3zjBioJCJaqEOVU5fFAqLd5cyJhvFwQV+ad3imnFYnzb
KzGJXXlCvlY8K3ixlFamrZusyMLB/Q0uCnT+rbW6cKknNnyiJyOiR61YgfmZmhLv3gI2U/MdR/2g
qrP19YoJEmmwUAoQPJDTuQmjpeoCS53+1KDiyw51O2cTL/WfTbcb7uPyWCfeYs+m3ek+kOy6dmLz
mnhlgVK4TTYDPHc5YBwxYzsG7kRJZYwX6CfFbrkNKE/r+Ag8NbApzdStvemwGlgw+v70WtygDsti
mCjqZ0BKvqptwvXooWZJELeoBIZn39LTGAyW9SXQYY09l4HlQy4yoUb/2l+lIfGycWVBM0m07swK
gzXtkV2fzwM7667rz8ZDrGiFNHWEkqT74ITjBsRgu4qzQE+iRWCFI7dUerCWutbiEwJt1KzT8xXq
HBv1WjcefSXUUw3+PHb4h2G89eqTPGKJ9OIhCwz2SQEXEJizjZS0Cv32SqWmZgegzA9uOMhFmgp4
Bh9du33Bdoa4XEDpn0P78v9TpAGtmgg10Jjd6NkpnWCPnc6auX9iEfNnsf9FJA6+HdIaEnXMuDKQ
BzoiPjFISl/sN3Itxi5neCZhnO3VUPNL3BtBOSsoBY+qpgWwrM+xBa4c1QO3pi4b8YZAkqFKnKfs
sIZsey3oHj/+P45clfr1rJiTwFIwbhvCfrGNnxucW28RN6nq/dfH06wgmsK7eayn18Xp0TwOjf3o
SOFLaYIX6euwXF21Nu0x/eQiodqEKZKRZNzCbsyIZ7TzxeYpCNDo+dGB2H+7BpfjGNZtNWHuzNhH
jDKf2WPMlliL8QLNa9tVDVF54tKXOIZj0FkoWduiTi+y9oiI7kC1iftJbBk/rQB+enwljPqmsQ9u
SND6C/DlWhloqCQRiiLLi6hsHAQeYMF08yIzNj0J+fw0GW55p6XrOpP95ExRElfvNn7e+z/p7giw
yesAPQU+iy3x0Yu1lk/4MkZjmbTckTXQNcILPQrBcTQE5EtWwd2PFSnXCr0dgZNOtBsJS+oeZwQ0
R14vs+aNrxoeD0zMx4d4utWnr4KGHE/EDrtqd49aGT7u6YD/YN9cNv8sF51pwtKEKPgzGjMjMBrV
+/zES4BpjnUUJZPufad7hg14ntCiDohwK0JggU3fiUqaBiS14h6liAPsmTpwO6ar7nFtm0trJCTK
0cUBQjZ+kvLmaFVjrYATsm4FIZhNwlmtcS517m/ka7EoXLuNsiRH93PrD91+IGOV8MWHBw+F/tTh
/9W2AQuSz+Gr4vCyxH+4hihk7pUiTAgC1CtvHvK5AZXJ1m8D+a6LRRnxdME44VW1DBRlzvyLz9ER
+iKUkqZYOfekX+/rZWC4tyvuY8O1+CO7g0/O+fDkLt5a7gnlpVHmOwQMj2dHqk2/m+Harc/3483N
TQ1vlZ6mmEAlw2Ay/VY2149Fwud6RjAkUE8+M7XOBQfjeP6d876z7DrDmx8Oa3milxFDImH973JK
3TSCMORCCnLIpUkJXrBUwMQybEwMU1tB9stQ98OkuM2o1SF96+F7/w5Jcnaz7ugmGRGYiGfZpNHz
c332F7Lu0F/mDMRyHGIpHINObhG3tYUcsjSsunkVXu2WDLxKu+yZBMwzXlhn/zJT30clj46FLoKq
eOoP3BWPkggmGfI7NNbfqDw1vAn9yHw+AwCssyA5hvJ5GRktxtQOrbr5viC0ihkMOgWYAxm/S8sz
HPwweSW+kAVtzNEvpr6p3FUa8hwH6NOU8anlmsLyy1B2j/z526XL9xl/AvUwDjtwHE4y4H3cxAvp
2u6rdHghTf1OGphDogUQFZGMrcQe8AUcrzswB+lolgXtdVLk9r9YrNs5YxslYjriR6OAARN/Z1D3
uqZ8HfSgEmtVM/Z1299AkvwLvokMCgwOG0y7ZYP38DwXvnvFD5kx9zx32781L3JWaf8YtaAkHc44
gUKWh1pzSU2XdkWdQRlLs+bbX8/9ID0tKQOR2S0Amk+YDPiq2aV7VultbV7u3poLjP5mYciktTqk
NQ19zXfLOe53pybR+tJZg/n9GMjgAYlCY/OeZYrFglJ3icm0ANa1bO6C/dNz0+Klh4RWPHnRx01o
BxC45ezI2h2Zmikk2zmLm6N2c9yCbifjAVCM4ovAVCan76wF2hCcxbarcpYfwv7em8Vu4v6oL3su
+PTEMCr+70CLKeuEIO0xrXGnK5OLSLe6+e4N+JgpGePLMiyZyHklBq+vN+4c6fFZ3AJxQUxKf0lE
qLr6X7rQC7Re0I6P/ZztdLrXvuSwyoySAlW+NQcs+2vx351bmS+LKlCp5RYlyHdNT+al75xn0g3h
6iQzorYjuU1SjKTXAjCmG0Wh67mJ+nTEqm7sObJpc9WSVReIiPuQhP+11hW3aPRBune3qk/IUdUm
XjsudaHBgQDIdtgs8TjClklvjVpXkmvoH486J83G9V3wa848dnT5BQXOlfg7utXH125KauySgTST
EmAD+X+6LhFmQTYu/OPgYD9G3rsMlXIVcT+wU+hYZJMcVq8RAjryU2klJvVk1VzATjkL8cSwhlX5
0rqm4zrxN2SI2+jyruWmbktp07Byn3okFkFQyIFwtrE1jPjEZnxGia1GNWwAvd/Im2JnAdRZAV/k
rWpU5DX/BjXTiN8cnrBrQPzVi6NFhD/In8eDXT1keXZl5CpJty4BPgbxxYKzJO1INd/nwCnXtUgC
QUWS7qpkf99qrUWYXMkvse77+2Flxnq6hEG7Z5QtYnJ84YncjL4BJe+FtiFJbUWz8lPjTNQ3buFN
7J9dYlXokqL1TKqBxVlhLHWpzmCmII7ocYzpH7To16Y0NGS/hSTZ0MaIxwpG2OJ9DHTTgycQvg4g
/F1wQljAf65XoaS6pWmeQyCc9ApndoXX1avXdJiR3RODmF8ha8uc1Cl4mKnJyi/SArrqWc774IMq
eqt4UhuvciO12NJ958JW+tf5GQtimbCebirsChueCM/pAd3f6Au4L0wtyGiOVnvhmWnJpS1kwWJh
koe43SNBNn1ZU4lOnTHCwrHmnA02BwipkI7GXght5vox5G/bXRGnR2+yuindt8bHa3Vi9IvyQIEd
Ab7/AJco99Ez7dME/L1Myq98sm8nquumMsDN38679eGWXv/AJ4B8MVNIKWW8qfFhuUPJwwJVKf5L
KiYfq2cfsCmWAayiXtv4MAVeLrDQJ9UK05bCR+aWB8Ghn4dodHfnw4SSr+exq+cuVOebNgUSfg34
Y7ZcIXX7pUr5zab1JeBYSJcOCb+1ArfOrmDbcAUFjc8+ukP903xvc0qm91/+cbvXbvRXFhgYs4hW
Os9uk358aInQFBQ2/l5mIGUtyNSsSSCM1H7rb0z6PD2Dj1Z1wAHJftX+/LdB5qein/eHLmfSKfME
L1jx80z/dxbQGG9o0wxNl48hq+JDjELJkVeW9MJZ/J/gV6E/89gfs1X8rFqV+PjO+qYgQe7twuXw
X1av3MuqK2oRcj8OfL9DPi9CP1h5C/omV7E/862DSBUxu2G+eSm4eKz/5nDeIa1ZLhMvaH21SxVi
4Z745qNVuAew+GJYpqhT1FsEOq6a/o59Pu3Ed5IUgfitYng7jHSBxmwNtN6SsMN/2UpN/CsKRS5x
Fb3FGt2dfx6NvvZoTQ58KUmsbfH5zovdtNZCeTcetdmOdYP3wUJfoy5xVDr9Wl30w+H3D9JI9L1p
+UW3OCDtVa1YtPwWSmSjmdCC1mqdKieFoveq4an9tmOAhTECudr8GCTvNdJiDgn4VxPiiQZnwO3K
XL4VNHjhwCBATh6uJsNer/hItra/K3dfx7+ukMHGyUjQRlHC9WY4nMbkZiFp1DbLqfQrPqVPWqQp
gB/upeg6JgxZLEq+OiXiPRELaQ39MQ8l08FWGaM8uEGCBsXROSRWWKJC6IjvZc+VFNVOn+q/Gwd0
cU+QIdacBjrmgLXbBRmd9bQhFRR5aD9LU60//3ObusAPdrtctBzs180cYlP1hlIYdZnPTr672sqL
3XMRcQlChyagHqFlSpebRnavwtip8FB790cP7X25ADsx9wMZA6oLDnYeK5oQZkCi1LdN7zrTNPyE
pMSCL+NG2nntFWuyT40tp20r/ZB9SQJd7ja4Qphlm4EQwZjFQItUPzOWqo+WYTi/7DeoUd5F9Gt6
wiWZAdXf101srDg6rWPoyfHMNd89AC9URoojP2/RnbvRVHstjpppCV6EcB83dxowhwiw9QBdr46b
ymDnZqnClMxPGRbzFBMYUbKoR3KnexLQCMf8NDKWX8leOD+DMknBBQQBvmRwbDB5CTPi3FCUM5Ij
2F6NOcsl8yiwN0wGXqbEWYYoYxWaPmsk0QJCfxSHz0TavCEpNreR863cJ4xHvvf45zZk2hbuoDP6
W6sx20wBkpONINpPzhBPrg/ODRa5eLu5liCnnpcOZ5pGMwZZLE/00N+7ls6SNIHLqhBvX/L4Pwd7
dusfla7C9s9Ubt7sdepb4Q5Hth+3v29/6WGJEV/8o2OleUh+CoYgqMKktPmot+NVbXPnvsee1N4X
G/yI9j2xjyvLrJBvJlI3dvtTm7aFAYRojzHLLwq8is95UGCFlXTnfZwZCo4B+6JxayeOjkddEGgD
Ip3AIJUE5nMeH5xHaI3wSYhl1kOJILy5u5yu7QY1WwSFRkcvykaqETOp+PoPMOdlX0DWeUmL3Nur
rnfV+sM16rr6GJ4OP02JNQWPtX6Pae0pY2kb/iQDnLBCDPxmij4bMaOCuBVpwDgZ4LnZuBmTYZY8
20hg+dXeRW+vXUODoSzpghccchwxnwtW5iDd9G92bOimuCHsDXkpsFWTeu26oUVAyd5x0BHm7nXE
/gROu0x0UcW4KAGvpMaL0iryMVVrKBoxpONSBYz69jzdAJuE7np0WXPKD2DYJaMX4OBvG+Mn1E41
d/32NQLmtuHorOGlFLu79+fbWhh3R4kkVaITnoAnMux5coi5s/AT9pKFS+CKo9Sm6YbQvCACeyIP
boV7tYITAVNfCcrHdhlER4GP6132PI9DHTMf1d0AfBuNaZcwwVQTXT0IIK0ET+V479epxFDhRAyx
7QkUbV9Hak2G+11kf81pxompRMk5WzNk6o0/57u2KlMsk5+K4kSiZP2dwxnKk9/ZRKMwVnxIBEMJ
2WS1j/Ta/irU5fyLFL93YT9+jCRaf8X387Y4BQ6v1Hfgv3etgShwNk/6jhx1RNSqC7Vcl/qE2LR3
QraQrLhLa4mR+akCcwGDcPINPQr2UJRjw6NK6UKn7A2PPEQYrF6jGbBxEcbVuaWtPITVI8F6B3Tl
sT3ZiajC04LuNBWrEYq1BWkDKR7+2P2x1otZbcExoGTsFJ5qZkuCnjhB3zpqFAg4PvxQo7mZ3FE9
iZKvgKgrf1NCDSxSRVjIjl9ULEwhK2Se7uA0gtgn147jw00c66d/9NMItm7TwAsJLHcrA51PBgLV
F+hBY3zUi6yZQ01RUtja7FPOxbtdUfSD5JUsiy2kc7DFuMy4MuRIdtDinQvz2OUF9JzSL6Q3rCzE
kyOcMElYu8xiHu4agd2yZFGZfODL16pzYOM4bWPmuIDsROZ4I9Lyj88I+iXVsPz1mCgikbPFEp4i
rpIKQdIHh/bmPhAUtUf0sJsDcODw6ldWcqIBr1HpLYb/KgYq4Fzlr1kHVSOkVz3VSWvss9soF1xx
LtLJVuT/3+9nv0KdgBqeGK6cGEyNVZAngxtql1YocKLUPr67n52lpidHRwyzM1J5L5y9nwZV2n4/
I5CqDJQwLX4xYsaI9m0bAsrQHQTdlAtjLIJKoDGV0Pc3hCLcRIjC/kGeu5wQUjglKmtZe6xpyMmw
MNvl+TaRwJkUijxJdnYkrKc+qvRdAaTOLmBOHw1tRI3Vo6oGwoNK8Ns4UXGWtID9LI5V9eU1Yayp
uJRp1dr99thDJy9mNXz9UhoLGyIw3xjhiVICIyNegILZMZy2F4bqaycwyuSibj2eK9XzrWCnGkeD
lPwNZ8BE+2TibPHE/1D31plkybCVW62rSFz/AFLJViFraAT06n7bieUjc7P8/U2uALVIWKn5tMXi
chA4lvh9m8iuH4F6EPPBHsp+2yUj8/Co5qkyOP4ne3YTU6ykOBbEFoW3pwTQS6O0UuErQbWYEKhy
erHc4WzUE2zhgBbINh2Oafr9UB2l6wvXCjXtbR9P49J2DiJ+XsrKQcEehE6lqNTMrPS7cai656KK
f6ZOcQoqSxAsHuFfPrdh6oBKOZuN7Pp5POzIinWoUu9MH7ubf0kBIAgOsOzWCyDC8NXGSSWZ9inl
B1tXeu52XrOYbnzKkPN+Iag8UkpEEAN6/39FNy4qtB9YktrZVSUyn/wme0pBFnnc9fPPD9P3SCE+
kAIbWF2uGb1KJSPWiljMeWfb58smtD+FE2WFGeFmbJVDfiXTPZTDhjXF4Sj6mtdG567xY7ahceyw
nmWNCnDYIKSzsA/EkRVf9RVQ2zbEm0H2QGdZNqKXgJYiWhtQG7U43f6tDoUZBedh1KquoT6ukpMg
HkKnT7c+wsQ2OxvZ/vWJjKq2M1ZujSy+hC0ER1UKhXjNudUdQqvCgaJroNxVwgxtgPaG95eduTds
acZ5ZFht/zq2hjUJZNaNYtmObOxknD6HOPqkW8NrtMeco5DvhRiYwnsxirQxDmWxd7lmIyBXtvpN
0O/fMeNcxjrsa/DkPrgelO9rdMStXlpXFzdAwEK0nvSQnCHozOUYeOzgXjy6PALnRSRm9GICvzRm
iUqnLAL8eP24netXBjjT0mP9g2ETIjj7OWQ+qo0RAFGWZU9bNqSSmGKSmYCJXVhz6/QpU3QMHBrk
3tqMYSK0pWnRRNHfbonSPP0O8wlOvwWkkznI/8EkpJ3c8CYjn7Cm419/MS/XjY02GRk8ZyuFk/yK
TOTAiInGoLk2aHVYhLtEuHR9GCD8dhcEcxNRr5HcX/VWvocCH4TYAyDwxVHGrlZQdxDALqJWG3L9
Bmi/7T6xUdze1eWcC+o7+vOl10Im95LgSHwf9oUhbXvM9bP4GqIKL4zWiX7Z/yzvaD4K9rYszQDI
6LcTBVQ8mMoSHJ6cYgB/zP+NzZBft+mlOW4QMHRzEiFXTPZq+SaFwUnriSXxAjWmOGX+maXwH6zE
zW4RLpMZ/N68WO4Th1ONHpqTcvmiHRMfthqXcCz0jCVZkUffjbyc3Q/gqvfBbNC5lORwFgxzeFCi
KXb7iGpz0LYmIsubHUCEx50PhQfPbk8XVk5z7GtiW9ND9WwDJ6mVdM64VTsHGvWAuV+m3/akvArz
tjp1ldhTIBBsK6nO8oGOUhmqXK5IRgbHOCH8PmqbgeRQfwX8cbnAIg8Hlx21WLT/11HR/UyIjXK5
8BDe7p5qsMV/ohbFoENwwRZ7KTeYHT8Qlu+f+Lq0gA9xbWBTVjAf/mhp1Rs0CqJ77TA5bmk+keXb
J2vZnqj/c1N2+IN3XP4wwUE49eKiliY0st8lSziXuKbDEp/FKIMsX1gjCIf+X1E4d1cqKjdFYfSU
FjOYsrUwKmjg2iszQXneLgBpy/ZfG8qp7M4BCVIeiuEXjo1riD+zEdod96rB7XDJlLSjJdwQlx/s
sF+2VNxi+2KKW2UcZ5d7wpWl98G3aNWto84klFhbFabN1Krv+uzmp7P4EKy++R37k2j2frr6IhY9
vWHdpMjsKWrbM61rB21cZPXQd1kAl22mePs+vrwuTaPGGO3DxUl2jvdX7EDfxUTQarl2F0w6/sq7
11CBAxb6CrWDqQQUIeWO2fIL6mx4qLUA1+LAnRXPGiz3Ik0jYbYnF2sopTIP53cePQtcM9aPZFZs
yGg8qG9ElgAbHd707ak6TzJXWpkwndW7XuJ209JoQQwRkdcUPUl/sM6uHued2MqTNwicb7vl1yDs
DD0PURUztFk0BewgKXmRgmo+en+3hd2U6giNdwldXwpSzu43L0r1Z2Gc08RGUjcm2gs1WwZROWb9
aRTMq9A+Lu8KXRqz7C2+S2XZNLCR3fDyLJ+H2znAF5NcOZmvV6aPYlrYY3IPXcr44nvq1kmPSKNb
N+I834uNJbavMFVDrvY78JR3NcyJp2dP4SD8FOtHh4YMWDnsW8ZQoqshkJ/5TPfCXZq0HqaU0q0C
8FBF7J2t6C8zbkzeuAhnaO3FhBs0NgNfZJ5hhWf0TndecU/Xna27kBy18DwPN5B2gjDV9kqe/z+G
YOUdSAmBDpbdL6UgJEQBUlrLVv3ZT7eWtH8gTEszVuwK8MM1t4pt4zvt7JEGr/KvpVPnu6XmwMvX
kxhE8GjDip6aXev80fdpoTjUn3uA2buQabtqQbSYih9nBFPSuLOi5EGYVG319WRRsnkO7QdZ7dNG
hX5NNfCiYJlRjBOKScO0ZAyaVjEz9KmAhDdB06IRltduHgiL5z8ovz+kM5sjhNqvO6oFSOHrQxzp
mQx/Qw583xHCPpv/Cn3aYV503bLSqRteeemhTW3UxHh0nqYGbOTiQmrVQFnoTZyX3Vs6V8b/v2T6
GfX2knSab79YKJkA8sKlyvcreWAGSmBYCjqs1SahtvR1BtqJhrz1w42yPVrta6gbUtvvKzgR8sIT
yswf6/0zZi+7Z9VhqjbOHU+tibmMD8N/MTdL9h42i+J3Rz7PptzYc5328IpJ3xJbI5H37DFf4GXV
3sILAVXqpMTYvtkXib0SbzGTQJkIQ1dR1kqNy+A2E4HjmdgxBRPEw+cJs+lkUnnwy1C+LrlcFWFB
46OOb80hPGDYvbkiRVpM/bAUeN5oitGLgRJT/viVS9RkGQ/S0Nu8nbZoJj4zhJWrZpz8pSyQoIIs
nTqumttiCOCF4HVaMnjkTEZoA38IcY8M9dhnlG7KbqpGVeblsRd1cltDTqp/vRAJKBCOqR1k6tgU
DYQ229Dx488bcbO6X1g7lkRYVs6rEJj1DLKnMbGw7bcyFVy1HXJIC/Pr8YSi7T32Q6c349QdiefK
HZM01oZSzIAwEPZMI1r8osggVfcsqHPYVQznRUEoPit9xEyX2v6pC9TX3mYvY8/BQkeVkTNoiAD+
MFRNAJkzFtzgIyIjDW8gidRlOIgz3AIbHNNlxeag1G4A0kR/DGbnJbm0T0e8SGVEEZa7lTR3B6aH
arg33J+/WGV+ufcFcZ0C4K321p5x0QZJ/RMCFj107GHokeLtNL9j+Fjq531fgi23aQWx34qQRcxS
WH7VeFNQLRwYMpZGF02VMnwVnK1yie/PijlNsRkJ+CBEzdk8g6PdsEXAe+EgblcjTu4OWKmWXMXk
p/hVzxLi2XKH1wxOOC76LyycAs4lJkOgJMMqSvwamuVSmDzb4E9S8s/oj/wpVofzfomwjSY8BGcp
Ri0w+HURpssf0R1OntisAzqQbrYKDBESsvUUtJAYfxOEMjcx3n2OLhIkfm3JdfFoVgNiWn/am/c2
x0UZLpRuRG3xSBSHTObdRLir1TVOf+yObcpahwXG5AUDv4G8nGI15jbO8ZQgCZpknDM/BSwDBQ1D
NJR6bi2zUOb0fBInt8C2WACCLS4F+0gH4f470yq7Zq6XhdTogwMnR8vjy/hxwXq2XxBCvdM/EH9T
nWmcmM3UX/mI9ltLl3cNgGmQdjrMds9351uJnCISfVRDgPh7ui33YBeMVano58oHt11MJd7HxKQx
8cnIjKXAAxVBFXrq7sDzEe9mbu7Y7oWZRKoncLRS9jESrcvUsqqfYyRz3s85qXeNwac0vEKTgnvC
s/Cp28R2bQ9ZuBLiSKMrogJbUd+Lj4E5KhQnlibdEC00Z7rB8STA28iV5lUqTV12bskf4zbrGICC
sQriWQDq/DbwFuiMHdOCkDTXAqDvqzGoH7gfIXKhCW+5dzUEeFQVeFzpxWxk9c+dRW7XHATNscDE
tLpD3Us/9o8mhEypZ1/vTN9wfAmmB059Px0oEJb0xNhhDpyRexW6T8Qy21hYzxzeJhmFfV/Xs3fD
S8NjZfn5GHpBGKczvTy34aPN50b4dDkqUXg9V+cQaxT1hMRqPgqIQjC5RkVhq9gty4iiug3Re5KQ
NoaSEoGGt44iBSm99eX/NwX4L2Q3jCHZpFDCJkT6HM6hSowISTs52kEAlcEHp4lfAWS/v1X3dPLN
Il3vPlahf7JbrB0LHbdRBwqcYX2PqtAiI28O8H25vrDhuFo1U5AG2/OpmaLGyRrwTZXT036LlP/k
Y2hDA6C2diA9OWSgRsT4WPzXfSrvlmj3SWWQUN/u2uhkXoCAe7KLXWv5W61PZhLV3ULYIYhnNguS
PXFSGeUqOrrT2Gp39y0gD74mUnAg/ZM8+RFuRqPGm5N1u0uRMUB53x27DVoN/p+hvuxrtxVt5wjq
93ympRVwUXyVy0tdTQJjf30A1FyRtHBeLVK9rGWUhIiMlzxXifvTrXaiS0Yfq9z2Ou/k20ML23fv
QaYOj2rkrmbP3eWEsn0UfV7aXWonEjhKYRiclmhUQfTeGC9vfkdVYpAS8twIKbiDtrR5cA/jrIOE
Pie+kM7FO4+xYrs42YYLIF8YHkr5HTKn+2T+9DZa9rkEyNk127U8bgzLC6TqHfeGNLjjLfZyrPAY
vzP5OX2RX8/g1BQxlznAcXHhVEPY3QUS8OSnRkssKWNXXvzkwKoo5yjGnb/TsIg+qCe3iqoiv289
uR5H0xJifwtqBed+FNlxUpZ5r6KEdXjvO7LYk5r5XiKbjQLTeVwq22tdE3ZHsKCyQY7FRwNn8sV0
KlC3VGjaSGHZeWFGKXgAyenxGiFybV8gnIj0R3m7Pu6AM5oNQShrocPNsmhr1oEU01V7k6TvWlaI
G2L/VX/dUhVngqVqXRbMHr4uduVEys54fc+ZQqRxH5Hr7maSQ0Ajhg4PgmlYE9qKsZhwhrGStukv
cAu9e4QH4ZhuXy3o/QC5y9p4c0L62Z9Y9wubzf9QKHttmYVaqBzA8q7wTXgLcZUkTHrM1ptn2Ufx
tuTDAbkhxQASRcg/a0hGqs7uJbcLEbuqpIfiPGwpIpSS0nrt6J4u5+NXh6vGEHb+NvSkcnn8f5rE
UKZ6SRm7QrGKjQWH2eK1TTBxi0fQQq2Jx2BmNPS5gVebn2KoZ3aUp+bMAVAhA6Zu+Spqr2jF8D0w
/8vzVLzqvWa4BSS90A9JjfbN1Qob9Zf6fFlUgFOZ1y8szIKdAyLkFZGkCtF28u6jJi6XYDhTNsg8
CjG80E6/Dqp6qcfclVAtZdl7V9x4pKuE7TfLOz9mCMpiJTl8gsOFx781w4F3U/uNOnD+5S0dkrlN
P2uMqeGTR0oRd8bm17Tm2MVT0Fj/N6CYRPHSYe0+SMq2ynL7NbzIdRdaXekfciPbxUs0j9+TnXKk
KFi3FYaec44N10h81uRlANjPi37lHLhvI8yUupcOHv7xotvQqdQOtYkmKz19tcsCjUwbwH+pKEe/
hOXz9GJJTfP2653H5XQ6ay8bHqQSIA2s5FvB8YG9FWqoBBVRH7SoQBPPXnAi4RMmgInqgxiEbrYR
wW0y1tdGc/dZuvxjZYLmPNIMog1uX3TvoVVEmByWAkTbgAiB+pfg5pJHMNfwgqGbhxdFpwB8pz3T
1kZBmZJnU81bVcEWa1a6U9R0sPCt9uRBDZcbLgOv6o84lHerfTaIt/n2i2sawTcOOtUB18kFCnet
w+FitE9VoQjmaP0C87Ie1nigQkzZHqsej2IKR+aJvbzG4Ng1ALcyCiqLjXnZbPKNwOloUPliRxTT
hSAJcF+fJ5C1tdwjt9fGY4gK2olhvoKbjZq8W6p0JXPMj9Lp1uCW/cpl3mZ1HfpbTW+CfIWYUvCh
MAkaDO/r2xnujyA7WsNqFARuqL4xaiMM9HsvfHJzA9CMkpw/El0M/ZD9YbEAHN3VlH0A57jMGpUJ
zF59qhoOBgU0y5s2JQVAV8+wAmZXX9TwtACJuvWDO1hF8nLpkHYkmwcHQ/AnQapNm+rT2wBgRoaq
Z/uubAh5O9EfOMKwe2ku+RkgbkY5TOWO0+aZFgA8ofRheLRWf4ZxXCgGEcs4eEAStTz6Cgumo/S0
W+uKUJ56EeFk2JsE3SC0C9ow+LgwDLr4W270L5rf+C+52scmDwG6Y8/a8wiASBEpB+XLz5pRbiIm
CNIjq8t8p6An2PDflKcvIHxdc/eJU8G1Qrfzzq822AhsNSDel/Xw5ArIuv4FMUBajNZjsva1dYpm
o2Nc8twbXXbRwtTKaV2R26nuSzcKgPH6Xm4Nc77OK0BhNHfbaDDA7XTM8CWR5OJTO/gF6AL6E8Cx
IP8yCy+rCHfrtifB/sF2or+MDvRbgA/5NhqWaj4mn8aTlhO315RNnYLOOoWuiO7b//pc/41sDvgr
DBs1zntROT9gbd3yn8KY5i1xrZWZ4bOfCqgW0GDIEeGkuQNETP53hThxHuKxY/ATE783LpTXBTsU
Z0dSaXh1MYjcWuO35GUGjlAHLt7Lq380UZakZ+IUagYB2xsMLKs+E9y+Rp+8+dm4rNXRF/cfiFDu
0sYUHuwAEsmm1oIXmkdW5SKxYjmbk1lY7wmZCw2cGPfNdP78EuOq7ScsBFsIOEY+xlORYn7kKX/O
FEib9f9dqPMEIE9THB/QqVIHvS4NDzUEn+ys8rf8yoA2g7R16z/I9owo1b8AhomOe8iGJ6gZDykC
/KjWxVk2VmR9GJLvSZ7LPOurhatkuu/npMPKyyP1jrcYRG5LLaEy+xR1Kalmuyf+SxBc6pMnJDdW
09xrbZv45z4OJ1+pWkKHTmm9QMH+D1azrnzJFX0vclQVgSWOQhzt/O0QpiSm6lhuRHasXwqU0iLw
52L+wHFmsWuJglXqGSBzShFMV9qWrFuF3oOP0WtCY2xW/htHqebTn43ScVdoHR7WHBoX0TpK7pOJ
2NJUdSLut7nVoSST4XwrZTDj/uUZ5MPr2rAGYgvKqgT2Htq6h/ClScdmWjfjJO4ElSrM+RRjSkbG
d5iBrwRFrbFKI7wVzgpaw2h0rYi0QE2yCPSe4oP8KHGv8AzyoK1Pnw7BAb9h+JA4mJQBFAkw3SXT
NVAakhblaVSkxkXPlrn8PfFYGBAl/ypYfDzreu/jrIVyrI+NVJneyPZxIXagrwp1WSY/TQ6qiB6t
0/qkPHEZXoeilnnN3gwNLFk6w/m9brNMVlbm6OeWYTL+p4/KrYcy9GgCzZ+FjAm3RIiQEj7B2G0f
YiVhrNjHKtutuiUGP1dIsrZLSnTOuLicoizF8R6lMTro6JdvdEeZlL1zA/Ykb2M1ICoLuYjI4gsp
wu3j2wktA99c81tvfHq9PzatbsyOent8KUHk9i/+BcDvx8sERGmhAXpkr3nF3Oc5ByS48XW+T5Yo
teorp3IazYdKpBvV1Rs/Ay/UbqZVqfQF4wIggjNa0uCuJK0qSOpSkQ524xbSZCYrsu9NbU35dE13
xSdT81dHoGhSSpyswLojdiPKWfA2U7x572VzHS25w6laRzshXge4T2tH4eVw3pYRbKFxs7G/pEer
gh/XOFuA8VmNSjFlBTZYuZS8I4GK5uMSoiBbMW+POgrzVu/9osetHh7xiWGw8NO9byKGqT+E5itG
eT0JYoWHMKmESJPCfWl/FleIZnZM047b7SvNvdWsxTbTNLtUxHVO2+LlPuZ+Jo7ZhaHN4Lrn744a
+d4WnwUHFOwkQMlzN6mKwErlaTO79OEzdZFwjjjVCFgzXMaAjeiOFNEzMyadDR5Ktv1Tpn8U+eZO
wSauhd6E87L0evuy713uJw2IBpm+bv58oXaikUeMkMbEL3kGdjXhxDNBSSM+op7gE2ES/UAKGoR4
p//4Xef/QuylIorq3G30BN+y6Y1k0qOvblwyT4JvhgCHUjmLhW3vcTI6gAlflVpc1LTnj9d1wgMF
IDzsbmUlYxImI35+wr3t0XYfWN461pzGO9HlGVWagNSk5aDJvJkQKkP/SsUsDx1gW+EsmdGMR/MD
O1Kg5ArVKMP9XvXRsvp6N+aPN9UThiRVfuH66HMpFfoaIFIiugYXwcSmmR9KYczaJsbLqzN2IVaG
NrkL02DouX3t9DWALnz0fVEEf/xKQqaxMWK0WoicOIiAjLZsxHHfNI9KKYfdrTSKbEPboqntPou1
tX33yJPXbbPSUFENjH2sL/1sQBYZvY9ObTHTxITjm0ucCrtMTqkiQNf6G0/foq/jdpf/wUPibvVc
iGoTbYvlvJs4dX3NbipyBBHBUbjRfiM26wKMj3ZV+Bp2U+kwsqZohq4OD2dnr0GN43m+9W49HE3R
VoW9fBMNyowrRHj/oUdcmQyK4RZuH8i1QhQQLo41bM7JZwUj59d54Lv7u3QkKIgEX8VUgKD4YpuJ
cZQvuQEtPQZVhAIDqCvhWalqghJyvhTo+3e7U340z3pGxpwq6VHwR2vYtMjIUI323JOfNq86tNTn
9QD2WCC+4uxTMV1xn9vQJ/4u9oDjaUqMXKvCsMR9Bl9G0WmlfVvKMjoIO28u+rh4kXjF8j/xNJJO
1eAAwZ5nvXOkSrAQ1+8XAuMnb64h8xbhkYH9kBYP1Uwhxt2oX36kiXzbFX1zEDL5/nhoPpJQhnnQ
Hk219H66CxNMa71QZOWVoy4Jb0tUaG0jLrK+pTDtIPbSb+WHXPaIoB7XBI/5EpZeghMXk2tzdega
6xz0CXunnhO4yTwegtJPIC+2/Gq7VUp7qb6ZhWtXCXNEirTGFPTIliF/PXKHWK06rghvxCUR6zs6
7y1vHC8IB0L3BCYl0+wnET8Ye9vdhqT7/tb8NPX3+utXWDTb6ccLsHgLEjJkVGRNtmUX2kQcT1b2
+hSbuxWTdx70azdzEYfBArLZQ9NTt9rrohr6g6y8T9AgZ+1CBMgTl7JumiGZG99OcwyT6l5L3GTv
ilm+T36LdZ4JFYQjrvCap5pk129JBCgjdmd2F/wqF+5jl8QedYNY2kRhg1oDkP0iTn26vrAc+2l6
+7YEqQBaNUUWokeCzlvlypgtw9B/J5TIuiYG8yE5q0oG2V630bh3vEZwc4mCBpFzgq6Nt95p43Wy
4yiibnxwplIe7ctkOc1JqnqobKMTu87iqycI+l346uTEZs5sQzErT3JyUNqrRYQwlMPYdYRGrBgS
BfPhwuv06ZXnr93PbBxSpU2mPOkIiYpZ41iF3WXwSXBrORSRY/o3zECrHQcFjEd4eg6LPlHhAmoj
KFnrJaTaN4L3lUC128NUbBKiQcVfsZqWE6YVUwd1moq6dMKxhbEp8jJHIHE/kgV2xZYj1cQpVS3t
4vTy8U9Bolp97G0HFGZzyH6F4SYpw4KyDmWoWbqCPNecgmHzIFCeRWui/pwG2v/SngAPz2btBcWK
xivgexjTg1rwQr76TGNnMHBUxYXt1p4ZGm455hsON2rCJMLWaPRxlSt7P+0yR9Ngb/lZtYD5dcz2
nllymWKHJhSQ+yzOEHdwgk//vAjm8OvzEUi/gbyPY6ZAJK+exW+2TLD16vDlvHAAQ35jawguiiAb
yt5MtZwZ5Up4s/hYGTtdGKy3SPRZYZORTSbzFGh1eyR2ebBT2odjyqqDoJzt8LxWk+6o/7H7I87y
+KJNgCsDYB14QwIQ276xot7eucmyG2n96K5APqQzjKk4CkgD3rxk4qdkNba4iuPVWqSgp1XN8W3K
xPkNhFjOOSKYL/m2FjXuulmZaEvo+k+x5UOqAWgfMSvJvV/HRPuyqW9/XZ7n6h1CRWKCkUG/9FlP
4z9GSlYNO1pPD6Hr/iG0aiVb+GfXZ80xKm05sdgqABjUojoqScVFGvaLIa2UxjY97bzmBCVyGh0k
yGQq7g+S2JIzcP1hgXxuTRJ7UPBCoiQL7BMcH/7kdPEhcTBJ5DRbn7MW/oj7fE3QP2kl0CCXTF/O
e54jTKHAcSldJVYbmU81vPkSXbclLO2s1SwEMtF2Qa6HXtbUOb6fRVoN0O7XgL5maMSAo648ORuw
S5Vm7TpYia64YTmKWK5fdU+nAMK9rPBrnTmWZ3ZIntQO3XXNl46mZd3Anb3pRPglTz/cnygegBTv
yGamJbMz4jIEldW2ZaQzAwqvJOqlgv58BcXaorK6zJiXcUHug/6PFqPjjwERLaVL3bGwT/7m1Z4g
D19R5MsJtGpgwYVlMP1GyEUC7UbvtXOhqPuubIQ4gHPETMB1S+YGSbAjZglnZDVDhSBBAE/zRIuW
DuNAR+G73NWRfWAtJIhpUpYdv1cNh/L2oG5VJ8ijxbYMKQ/wDWW5bQeI90aQ1b4hRDGfbRq56YkP
co6583F8CyTigbLGvs35+mhgkpQyUWZZuwsiVU2/To7x19F7Q3NIZnkb1okjxgCGt+UoV63By5Ji
NPax8xW1O7HaIkQ33/oZiQq4Ia0Qqx1BiKTvNdIPp/S/YZ7KGgrAhWo/hA6yLjdkEHD/IUg389We
CMII/9W+gzQagyjGgZA32VcUg/ZRTnTWdScG83jm0jSqAwunLkeIMtGdbPqisTGiV8GK2+vqWWxV
iKPcdqg9r/NatTcqgP4D9KxMUbrfTp79rLqtRGVCB6hL4K+8M+NiK9NMACHuNHs2rXfWnObYopAR
Kr8l3mPuKxGTo+qctNe3EqO9y0JolWkU6LLwH2EisqohQIEYbU05Whw4vdsBgh1VzeDmS/ZemdUg
buqC/PHbGz2S8VIDo8eICRIz6yNLGhlZ226mKVaCbJ6I5xD7TxJbP658Ed+k7vELeXUA6DLCtXJE
v3UKbfUqXg8WygQ+CUCGTsqk9t/LEih0rg3RnZJ1yUBmpfDDslq4jKkblexZxGSwl7nc2r85u90N
QxmJV0kSpgJ0/oKg8ZCYnJsLiEn0C3l9ifs2Lc6EFfxArwmJGdjLaoyrTskIIZcwrVBxDCJBrieO
knFMaUBU3jqznmlCq91fPvvNLLktGTf035azK2DxXONYlpUHaWZZKxiSxd4lPhUgC/Y5bmNWWQWe
fr0AJhpxu5ioVR8znXWV9JpxYaB4mK+6bTAiMJ6TUl/6u+owThZD9HIItjWTZxeH2m/Z+lRERIH1
KZQCx95+RxpEBpDYL4BmDiATOWNOIP91sBT5bsBbQgAdC3+zPN/7CPdKixgJLEyisI6Kw7/WcUZA
brKGdpuVuoMHcfOEQr/HssB+rIrueDdWuaBxqH6AXnhWRbauH9ghKtJT4TA5xXFUGGdeEVlGkw1O
lEdK2eCdL2zMy1OrrgkjcaADTm+L5ou1oS8CwtZmavxjtutRkUTLfX+7GOGnHEWjZIdn5k3b8UAf
JGpbiofpQDnypMhhwqWDT6XpCoS3CrN7D9W+7+5dp+OXh0J1pFtShmJHdX5NE9wcoj/Ecc9nik0k
gAKdPSKEBjM8OAFnMHAhYA3CfnHuLOEKIgLGDPxF5isNPnHBwQJY+95Morlwxln4xONH1ks/ZHCl
I1vRQAGPYSL7v27HSM0qkDJtfWAxM/or1/AeuZ7R+CaVlgJ67H6zTdwP0wh22LCcZ7kleu+djeri
b38hyJefFkcNRq21VWpsctNZzfxuQv1bG+ZzNQGbgn37lvXPIVAqEYo3jwGsY6q5nREibc24gO1v
dPfAo/xJh7dzLtrS+2C1yKqMfWkFEN2+wPe6YTXAZL1oJpb81wewW4MHRvk/cvZEJCYfeY10S012
ml8GhEsu0LidJTctx4Yz6cUIKvN4mj2omCJCP5RaDCHjhyuUOE/W6TgPeDHM+Tz4FTU3sXAWhqlA
wHlYjv22rT7M1aXPBKXwg6y1KgDONdn6Vugs9mFu0gXNNk4vHmaYwY0N0ePX8bLOxDdf3Vb0tTu2
RhM5G1qcJgzijvHSGSd6wApXItZXXpPbrVIGo5ba5ChkgC47NWNpLSOFbB43HnR3CDtDWhH+LJmj
OT9qj39RVPEXz02Z6UeFusz90RAxLbLbJN8fRrQPwXfMU47OOUYNv1WglDyDsFqFjriI96tMgGO8
PE+aWahKj4NyQyL8SNbclogBZD5D2Z1NrKxasclDQ99D0XIZ+17UA3NDEoUHqhWMovXnHyxs3xf4
E84WpSTUKeXW03LRCtORZi5jORXRpK+2Ph6pJpELa5qZgD7U7TPyVRSnPSwreZ0emssFOwNrcGc6
/jbyRCmAm09aiUxnywvsukVcQevtl3xSLKtkG8/xWRk72yFmzlwgFdzgGmrhzc97QeQPUfru2sQY
yKRRUO4mYmLE0LQGAY7H3zCA/AJJF5yC4FBLBiegDrs2W7CE5waZMMrBs8vIZhmHf4y5Nv3vmom7
n5/RZB9kxn1tSKgztDC9qEtenewIi6IBUY4shOhEX1kOZLZdQqmkFXnatSmmAVH5NpSqWP2dJW6W
LTD3gN2tMfojbid4/gKhrxgcnFz4+sTqKBJtkkjOWHLAzR29nS40wbRpacjYDtTUHgZ7KjRW65vZ
RCNekkFrI0isvR4fStXsbIOOBvAmN1OtiMHXNbP+tQyf63Un1JXJme8k7Cr4uMTfZMtpRWYUQSkm
kwoZ0FthvtcJxl2PNWRymAoNUKQ5turVUPo26c2LguH0Yck0l47qC5/mlXO0TTZ5/7PS7lT4l+iI
JNHFl4ZqPWcFil7/RHWqb7tcO49zJDsOKWtYN75yHWsn5Vo00Tn0KnUZZaOPMYrnEp8X9EoTGlSc
SlOPsxgT8lrBjD/HMoe9zT3e8Tg3Cixb38JHGDe9XZDCKsu8/P0NSU76OT+xSu6BTSpfgMoPPfoV
Y0KNDR1vM6dmixd51KSwLGBENk52hEDwAePu7hkpMJBaQa/kHXx4CljG/THbPrI9wysVFU8TCDKC
17o2xKhk7hlvxDQwCNhT2XHR9GAQ6SJuAapGyvky/c2qKfM+HfcbtR8nGEKGVG17JbZlJ2vmh/2W
6+94UVgIIJkQJgnzSaYdiy7Xk3fm04WAeSoQNtUZ+MT9QLOsi1yYkVLIdTyW2qjybITuuwgTK6EL
gJ4+LV7TUW5V1QlBMhCkoAaHPPQsFeTPTKv7uqnfPItX1PWHBeE2QvFmhORAeR0uEcUO0rRwymko
fPrG+4E4taeEJS+YB1KmOJluvFIpTikZIKlbcNI11pCjUvH1aIbimxG1JHDz7YC/1JAc4xGs0bNh
+o7et0mR7jzm2AVpoZ8M7dyYG/iC2mNp+NW3e+tk11D2LhmYlhop1/VxLDpZru4nnJbsg0oKhRZ1
5l5r2oqKQvHkKaEPaDITyZQL+otkoJB+FL7HLFj01Qo7unN8cLHPVffcGaT2PM9YN3/2obolEVIr
V+po01Hp5V9khLVgQ0efFG0ZaFKBX0uLpUi+EpLxjeGYJyrKsS8WDfb0gtNKB2B6TUWyuJGk/RG+
pwSAhQTgIqApixSAlW8q9a5rDxkCUswCWp4gnAOYi/cdyxwMvGpxG/qbPsAgMA2PdL3hgC0oVKVB
xEwcvIPlsAzMplhC/HZbC+SeD7PzRV4Yj+v8aedhgP0k4YfWkgehmYFslSg26ZTVACI1OxVL+5zZ
QXzaSXOMquSc/FLg0fD4KZVoZWrh2QG+QhDhtSXS4MF+r5hd53p4/kEGK2Nk44+JAnLmEvXYZ621
JGVKS9u1qszBKdsN37nc1P0P/fyNpstQTIrrLr2ejAfQKCOcxz8ylxE6WR17L2+42zUa2Y6zikTO
lxme1Ofz6gXMgAqNd5/bYcgAa8vsefvaJe71Wdje5+6cnVkorFMlBxVCAe5YS9hbWTSy5rXKjsZY
PN4IYtBhr40+vlDf7lPSNvjr6ys2CKYmnghmALM379mzSVz5XY+6FmnCLg2OmOKbNWZm7s1lLXPI
u2djvy7SEpELYmNh7JxWZBIUmQZgcUZLVVgVtPkRhINm5+RVFnwJ6lo9aRwfEf2zpq2lmxBcUt2f
ynuzhLF8EKm35pV/Kc1a7/6PafZ5ZBqhfQJuejlthIEg9S74EuO9ydJUomuQaSnVh3DPs5/olDJ9
dzVBG2jnLQCIjUvfp9RO5jWuATd9c/Bc7SizBMyTkFOcFLmEd48WT63rrpcz21CYnr3g5nfNrCN5
otnh1+r4DcynU291n/NQKpoRFVkCu7U+xoeXzPk+cSCTJj3pTH5L4XbqsXllfj39JSJYOhunzZux
x5/IxFz5IWX9vipYJ5HBli0BFaaJDSoDhst4rjuWeAz00pGFWcsB7T+RYSWR5XN092bF8uKWhrLu
6Kl/LJBRLNYGwSJsGIVPJkFjSB3TqS3jnkWl3SLOA2tU2xnOeIQLB0t9lqgXZs3jRG73rt3p5VZw
bNKRZPDJhKlUP8wAmYjkUtST2wahN7301Vx8+cYCvNBapiP1L5Wh1QOdXN3CZIWTpWzYlkWHpnRZ
7PwOfOnua5EaFXckRnvV88UFqSq8ECiArPywkZPrl0kZGHAP+4YQX6/wwmg+OQcDCxcd+rhZR0zf
pxIInncXfB/tnNP1D8k76Ks6Sgj+UV3kPxija1ScN8LY32zE9QxhBMhU1uY+TcCNNqWh4vv4QK8s
+wgS1QnxI58UaCNCBVzvjTDLVnLz2oNftMfKTrCX60gN4+UVuXj8THLbl713ly2TmwSMcX54x4rW
2SaydBtzBETaVBWNzJMRo+VvYKIwnxxpOQCZjX8nvrhtWID2dvRs61r3N+cj4Am2C6OdAaRJJwWA
zBWRoiE7UnSFQ7bZsEr3WqunJ7c/BoKZ21crc6R04ayEPFTK+bnCpxQ/uJYRLElv+afOepoBY44s
n9VDliOyDHSkEqETBh8w0pAT6zh5sJ2QyEimEtu2YGj8rNQEfoBBB4YVdOox0yDg1cn0OFIogjIG
QgfXToCXziDhYLE1oBuTjRJjCC79JFvHI7fGppwkqPH6gRP3bbLFBfnIybbBFpPo7ko6hSSqnxKe
nlSNyyxrc6lK8M9H3qkyrsAfC3hAKQMOk9p+UA9K8pNhbZ9AIE+9UEhu5jSzlSAfGf4Z3c6WNLyj
CZlG+DG7KdXp3tXfy/yUpiNKl2a9AoAtcCuJox6JiLHTg2KQ7iCkrf3Eks1vIaJfZ+ZqgCdmOfVt
U1FF97L65uDpqrqrVeyxuLRuz8DRcHnVBkWZtNJtx8EIBkSn/DnDXRIn81faxXIGr3tx8tkyb+ho
BTJj+GjRGX7qbACFV5RENTlghtNG5OVlWbnylcy/DopKtE19Tvby7nG2RwsB3ZlORBzfjFTuy7eb
ewWeDxjeaxxMVvx1tT/jA+qsh/zt2FUocoV0e5u+HLpR2nDN8dGTZYvR+ZlTov0B1aVSzJALT5Lq
7UoYAwPf8VXAhr1PtVOA39q3t+uSTB2RjnZYir/NWSM836aH8/EjyMs+53DHBPsjjGIAY7j6sI2F
ExvRcESWlJiUrGTDmNEj/veZs3so/do5jgbykw7QnjlmOicPb4qgDkAlK1h4POHE8f7EampzRCy0
1340YCmC4SuN7NqwMPry8DegJG/FOnzZDgcARb/H9sje+d87+8xCikzNh4zaiNLB/DR9l6Tl/wxc
tEGSpoDiLcJrn9zds/LG9WEExzcMP0IUf6nymBUwo03FHIwZvEC5NjURhgLFgL2MFh75rSnALfRF
l4sWkPzZkvYx0/aEfKPapbjdHH/GMbkEx2au+EmC0aT6lYM2KTZWpo/Pn6F3Lio0QokItC1acgHI
AqHVtIZ3vXfUoOxlnkTavj8bLbpl47ImDzkH4zZphvZc7ibFp8lfUMeVn4fZpMhXqhmiiYD4YZA7
6sRWNmo8gyb+UgkD66OyDjwbP/pEOykNj+zkl6bjtzfRBOFUZPEt1WnV5MidyaMlXR1n8sup/rHr
XuQHaXuJGmAjarLGWoVJpbywE5TUX9IRx22dALapYvW0KDyeID99/dQRWGInPFcKd6p8+Hp6L8+1
XicWhIK1+koFsvqTvO067ho9Mn6JYMIesycd9a+NCe5Adej7BRmdxeoEbu13EkGFVDpP0yJgea1d
nLTxgrNdSp7xRPSHb16zT7YcbPX/v/fVwq/X32iZ8gJoA92eXImw8fAV9eblK6+/7DjD3FID2tIr
pnhlUFybU1K0k8ELPWmvsnVjN14pAjN8Ua3Dyj38XSG07xDKRqRKjMUrxpDGHlaPeMo9je2jxodg
sHq2URtQ0xZUtc+htXyVHvvYQ/8ZalCtgFVX3CwNFeeMg2C6aSnQktkRqLoLGSME8EYxpvqiqZxi
ARqu9dXy6WzrGuOBifH3K2/bPriLIqK4M6OpXCXd/LTijhb6mzCinQUcrWxloLd8/GuHw+fSa9lr
u8Hlr9x0ebfym2kMti8RNDffbyzBw0PQG/MwFFRKZa1G+iLH3r/xrMxw8pA9Uw15ig+fkXW2KcJy
wsMaZanb7vLCYtDaQWpzvl1HRezOAhY3zHwqCISGelE4dU7dM7glKeRyNV91cMZOaYzkKL43KtW5
WX0pE95xOSrD5DSyen407E7lx8nPla3KFDBv3EzvOZvooSQgrWRZQzZdkEnKAmiKlK160aWn8jMx
UT7TjKtwNAlj6jhKbLBgr5Cb5ZqhiW4eyhwSDpUFeXjawRBX1SfFGR4wcECkgZTcYwVXGXzflI2N
2wWzpH7mYqWXWENEdLV7W9usVIXSkXyIxCp7jZ8gsFng2wCfpW0VvEeU6NyTuaHvR5EpivlhvDiq
NQi70NVepwKDjjVryvGUzafE7BqdVcByNh/mDzS76TcxmH3J85zNf9ubKzkL+xE6sJ/gG/e7EX6M
vClZkD/nLvF/kQHTOuGN5OMrGUT0cTVBuMhFZZke9hm1OImTW1Z81/x7AHoamIqdSna50XPmO+81
DgZm7OqVVqusduPRHsohI36Pdg+djHy5cYqIV2rU2YORZR6FGdRHEeey2exz66vfBp+1fiuz8UOt
Bp4BEsdjVFltAicP8TL4wcNzxgagj+s+r6PBvx9IDhxBSgamH2fFhs9vmTpsOsHj2+02tsHL86RG
5WM6vMzVbnUm0CCqtNgDE15Qt39WZcPJcTUTKZ3UvRDdBrgjivURkt4Hn6iGvduZWG6FfhYU12ir
TRSXijwESU52qSVWffmFNYLGAbHYqAhekeVcJ9Du2PpUOnhoM7mzYo0UFvqns15Qbv5K3r2U950S
ZZ98hsgu2fw6Ri3Ffv4Q6VNoceaHVZ5A8dsHK7yTgqnQQdwfIIK3OQN69vANldAH7irahMB5M4+f
7HNGgk2fcycNlHjEoQeiCKHYKAMRRkz8YHoo8XhaB0fzngJjFCTpCOtsugZyAJKV612Iu9ous5IW
0CMV6IZNUlfq9Rks8qXFjGyhUyvL1rZ+b5i5d0xavEz+NJmb0wrye4Fw35Uo/W40dqGSiaCl60zK
kSoBQPmITlekVXxp0r9xlf+1JxAtTTLJvNe2hTcC+8LQJ1KJMxEoAbCOsF5eWQD1oMV9L1ZXi9bT
FOFEIPV/tLOvIJZWvKRj1hcqD+3t/ihiadiIfWedXG8mBDAvkRnpzqeMaMzawaj9AGQqZVXP+D9/
KKsym82t9sGeye7noObeHsGxcr+70NyvOcHLtXyNX9DTBEgrqs9QYuCSxyW/O86ICYr5P3X7Eetu
uTR+zDNYk/053O3y/OfRYPW7hsd15y3mS9eDh1pJfnwu05ttWOuOuaj33fCtAqTfOvEKBFWXvKPm
3NPoozeIkjsqVYJqkIYBPuLLN5pXD0k3O+1KB6CI3qoq9jQp2SzHTzM7HhtWaro7wWJ8XWJVjphY
4hAX3hgnexAnVTxcfJpB1T4K4+oh6WvuKwSPYyz3lhxqGdNnEHkXCaha0Vg1g7IsItmcRXdEgwAu
35KOLLOtqudWMb21pYb5MU5OKzm940451XuB/j0WLKZ8X8r32wmN4TV7Mah3kZQWWla/lZ17yW7A
sISE0tzBekjBiK5vv3lavDvsWYHUAzkLlhGftdKXe95IxTvqB+pdXVMryVuDV9Dn4I5Msf0/5lCu
3suGsoaK2rGW6Y3Cdu3rInyKyIqOedJgCwumRl3K3JNG1DLZECgn2nr1cgYVysrjR3seT6jMXgCY
8LiUrKZewjjMdf2eiH/d6EbBBSIAkJuq96Y7rg8goVDq/c43iEUEE1ZINfPQNgGhaZ3yTAK8kNTz
4/S3UtGus2DtFtuU1IusCEWFvsuFyPlK5em8qaElgO3Cd103JsY5B6d89u6MlLaD2JHFMnwb1BOj
v5r2twbdsubNBHDP5H4qMuqKhG+e4k1IS7fin270KdzKcINa3n1JCTvlW5Af9psR5MH/4OGDiMBJ
OSz+5whAZPbw1LxU500Cw4ignfPSJ6q1ZCA1cX1wErs40odDNLDHW5dWmHqNA7mecwYRz62CbBtv
O9HEdNFsDxL1qTiXhVh1WwFmNsZH/0/WKyIP6I0/LZnC7XA4MiYqgu4iMBGf2/wKBJ04bhfaGZSB
7SYAwPP6H0eG1p13X5xc6Gyz02Zcyf5vMgOQZ7j0I68TFo8XXj9cHgOGvStnL63Laf8nvY5sfg2S
VrhM/dFdn3X+HmVjjggJrynFwPxgv9q+kSj3QW3K9UUZc8s5EzXfZ2VhKHTEdcW3kA8SsM+7L3Gk
sfWnmurzyT45tl5rf4ixqQ2XdZo9LK/m4k7pCp3e1BixNevibuIhTSlNDeHa/wVC7JpvZXxw0Hho
8IZaTQm0aAj6wDUYHeA4zirJ7CLuOzkbl41YUozmkYTK3k1VXAHI/sUYU02X32SONyGDzv527BKr
WY7mjvplRNSLIzSI70P1+RDI7KADr5uYOvCeGya5qfnsw8ryeG72OmGL7QPDV+rEHZZHWHqQtEdm
HDk2h9HazK82ZwqPVii4QBw9hulEurDOUZlFA8zgYLXkV+3eGV0yB46pBoSm509i2V7XXa5C3m3t
KL5EmE/F+7ZjqU5MRKUanOxORtdhMyNTPD7dofbM3m9M4GEcK0Cp3FBs/n4DjwJvm8wZS3qdiD+1
05XsSlV6/rLmXPBN1i8845sXAgz/nG32AyVJ5RLPFvWw8ap8CGBSpG4/S9ked1ruZI0QHQpGUqeH
Bfq8HOQnduiOcW9iDz6RZaqXEL1rjVWD52MjLhUS8MOOh7sLJSolp1M9S1xbzWZPZdhVz9/mXHto
KWhhl0TRvCO9EsetYIHwtyDHCl5am2tpSNQ2vFTp5LD4xpdoQkgdiapym42WUHDmU3V8BQ1JQAwH
YJMX5v509PedZfmvniXls3BrelZsM2lMiGpBqnmT2lFUD76C1Uu+LAbcw3jkO0nYN/pVTHmmQW/V
goC6DtTwheKLi4n5LtxjwsEZOMlEQi/Mqz767U2t+Kmh3w0Yaocp/KUYmCsFoYyZl3Gr/Y4RAxZz
e0tSugr4SUt+ft8PAUP2t6aOagbu1ONa2GtsSdCFSZ+mrAVyuhvlZkUOU+MLYksMe6zD2YLlJbAZ
7yLpauGPN2gupn0Eb85T+dwbS77oGr/TZx3x3sYeT21dw3aid2urTsBmnkCeIVrsVjnONrknIqVj
7ItSWDp0s+saBoWoy0BXodvf5J4MzzKPkdyvlrEOO90LX9kf4rdxcppSkax8h2FGmxJ2mCfwKWwE
tHOLQgu3/0HEpi5wZt6e7ZcJ3tAQDaLFs6tSegPfi+vyYYY1TzwFyTYIBXHntapWUcoZxV7dKBct
sn5bW1VFWaxX86/o+0GQTvD2WZiBLmTAB5DNfMNQmK+2u3kgw+7J+kM40nDchPIi0zSC+yuVZhmw
waOgkE9s7OJj/meaCvNmGKIzpnY9l+EejhYpIMcaLxxjMB0G16T7rcaZY6rz721ota4+XjbAWGrT
5EZrPmLtCbyqb4raSyuGgVrDu8Omvn5zPu/xRR/3SJHsZ41Zt8xtAxmF/5MjIce37wS33zylKT9r
QI4Wnnmc/sbMh1C8fib5tZJpbVKTI2TbmhEKdzn0B29K7t+G50k9AyJq6QOkaQO0MJeJ2nHqsAu9
OvvIYO2C0aztD/2Ol8ZN6VtB5Vx2oo7YW9tFRBBn1JV0+Ig5GlyqK46AVIYceHX2ERHju7qtVkmy
duFEYUxjL0tERfR+P22wY4FewXNxE6cT2mUrtodFW5MGhvjE7sEz95KehmrLaE0tBnU8IwDa4ZuT
7KrQTjt4Xjm3OBwuO9eZObhaWQf8pjbIBB0FDjDef1R58Rnj6aFJUBhHyc0zKWL46XLFKIeXqCf0
aXwK+Zc/t5POwRHivjxy4yhm2DcXOerpIRPbJThic6s1vx6Q613X2ZlIREisTgV29luZd6E3RMJ1
RZzjRGhtWWTqGKvG8eoOcH/d0Ab8F2U3IBY2F+KvcGahEv+YIO+J+0JBv5QB8ipCBjwcRhBNBuEN
jAjypRzsY2CBaTjY/LNOohq3vnDSM2GRYd0xLocpDxSr7szFpv4Ss2waAyzNURryy00+zKzun4bY
fe4Ji9o4S9FTZ/tKThToV6TpCN340gRrOiZRqFEneJ1FFIP/r13QAqAXHei7iWgeo0bz+zm3AnVa
bGluoM1vUVp0e+N2Jdng7x2OZKWaYjgbLdGfxNplVWrXL7bvmnwdkgIyQdDKYxp7nUO0en32ymor
6Iu7hEkblU6DcaQaBtGiTMLh4kR37SoECqqDkqp2j8nCTjvl/9dd424h9ozOoSF2qgHYZg2YgiCa
HzewcTMEASrA46aEMgURfVvb2S3Uf5cHwQFp5IPI3xjhvyxPnLmbOPs2eJsioXQvbNYEpNBHq9wA
ofxQhVD5ZNbDSbm+aCqgU7Tkv9jWjv9RaN+j5K3XcAFc8GJP4JpFHHYhqfu7AJVADH9Y4fk2WHJL
uI9suDXMdM61Dmu+pWhLW2CyqMBSAuQJ7rhVofjoa2ChtaZWU76ghhBPZe1JK73TG+Nezx0qrHpQ
bFRK+bd+4ejirm/zooKU6PZPXy1xn530jJnrPduWaSNod/qfXuP0HGVCsvFpfLnuSvvQ5JuCoolJ
TSoqLQHtMyZwRI+ELLTW4j3taYz27G50sVv6Xa7gJnvxqPDiQBqfPt98tfrwajHjVvZt6fXQ8cHq
bb7OZc0qEOVbsSwRomBUFuIZLulI1SmFX4QdUaAy5ymeXgsQjUpsVpZJFxN/2ycC+63rbQneUXy3
r0zEbvIoOIJZKTuO6VtdRf7mbM91E8jZFggisde4dvGLz7f7UiR9YzGopW8Ily1CMQ06SvucNGLW
NwWLnQRvtqnsGFKtqWovbFdtdXgaWsXCAKiCPi5USeYHNfm7q0UwD26H/D/AS/5WzrypOcsME/HR
mIveWV0r60vEDAWE/dW+BtPmrFmlCVH3RoguATJuZlOiIfc57iskTK+41yePyOuXzSiuBiiM51Cr
7fG6KRXRJlOmdPBa1YFHmjul8UCvru7zhYC8qmQFCVs2LEQQHeFpDqLr+6Za/lMvHxowvfFb72pa
NHqmPq0Woy73KwS3eKJ0KPLcAb4EVbPvqcRSzpvr2+ODMwluTQy1cqrN+KtoaxACfx8A5rBnAEjp
ThvvXocHSGyOexxYO7i+darvMG0GJfOwcEOEZGbwDI4AS795T4vbCCUx2kIQ5dKtc4+4eTgTcb43
hpRLhZpiyc7a/l57jrMNRNkBOsI4C8Mx7i49lih2YUitDY3B1159DZMJTSjXmfauRh5MPV+6kLcA
09QDsQzRGyuXsiUPy5J356KE3lHyEFBgO+ETunBzhOlzUjGMXewosRVlz1yPWh96JYpVtiWIqc8+
4hhDypdZBUYT7puIQb4owDXCZTw1/7ha+5IJCxsK4463DHOBad77bzbPiQXl2dB2dHDZUwDJhkVH
//ytUrYavqRB+zhGjuUiLryb8dkMuyrPpCObZY3YmnPUhYgqTOTPxex+sqwRtNr4wQclhisAC2EA
JO3VV33Nt+Gqr5vsqfmrx9q7YmrPiLA1Ep1HTmYcEbtl1GWWodp/bULnwvwfBTwajWw1vBM+xXvV
EzTrlseic4EWIKvZQ9qX3dZJTyI6/W1wmlvvvhR1dFohpDqAUbc/gOR7JcMeGWSXggBvLROp2Juc
x0aIB8Q2GZ3lAWjcehEr/6Mpm6iEXaHif96CiVlmrXTPFFkX3L+Kh9jhFQLAbvahSi1VG3dkJIUt
JGULaEluhqGLEszxcIEqQwUnWFlS/7KaWsRFJUtq6ESeJyh3wCNxknZ8yoIam3y78AjqtTkZg6qQ
30w2HSof3XrkGdNgRKpsd1WdWAdAgNJ3+ng4wURyxk/hAKcXm3hyqUcCi9Z10a06blEwxQB0OK7q
xx6G8UUQrMnEWjOLgY0eGnDm4hslxU/EvojspEyyrOAl+UBziQb1h+KDP1+64B5YgeWcbpezSHeW
YlsNIgZGJ3pP0kuikzUV0Q0uA/XPvKHKDeu/wX6uMDM7SlvC8KzM81fB4hNEZKGitG/Vh3w5qXYz
jf7unx7vl4ciaNDLUPZzY5jWYbURrYtglbxoTu1sCuZ/rLUAkCAr62H8I7wK2RMjWc6dxOhaDI3c
0+VLos61G7U8p27ducK7gt1IvPW3UitGRNmGUPnV14ljSZmogm07DXe8D5MSqppc5oopzoIUDrlh
O9UjyaNPCYbTYCZ0lsMk3GueZadmbNciOROYWRz0VE9vEhR0GtRFLrJAZUtiZPi+vraAD9BFoNnw
m4KJ5QHIdkpvfKy2KQ2mtyu9Iq9WNvrdU4Ha4xYlErobzVkq2NjgRCHED9iazj+VG8PIym40C8ar
if0DM20E9X2C6Y7ou7l+9+q9q/ZSas3QQtzXv0Y9pKd++jxaUT0qKAi5N7GhEhI2/o83B2xFqK2+
Lf2ArG5qlREUtJEXEHsEbsQ5y+M50hIe/33cUnFsO1vpJKW9ARTaDVmPSqOyJLwKQGn54HmkvFUP
MJnt+K/oP9IUECVWnQNYoUVm8ngBi92YQ8XATCkoD0UogzcCb1sQejemsu3EBhw/FG3Ge1apilIo
5zzji/sDGAHYOdoOoqzI/XcXfGzYa8MJ0I1o53LddNDqor8XjaYdeTH25gJxdJcr50ggI0pVXOrw
+9D9zoERC7Eybw9wW7vMT5G/TYXg7LVwVPDiTRONjBiyLOvHVdnN4I1AaeKmzTxVA0ej1VLUV31W
7hnOfVPknEvwmPi2tHTXNqkgpFGFgtk0wCw/pCv4CFHj3ITPsgTOutN6ZDoEkK/kSbMqfRjcImtK
mW7SCLVpI+ujr59hXq0E84YfEZFDTtF0XYyziPAwPOdO7/fx6T4WEVDM04WOs+9cNnBnxfBJ9Nq8
RovRQCqh38MTUpAD6xvzSwLTrGnDRCLVLXhBWEtC0wihf+TgmWtiVZ7Rfb3rOio/0VqkGS5ZaSzM
xQHO0NV5t3Y6iEiJCrjAhmQDoyyYuURPRBLAx+tfQlcye3GdRBOIAZOkE33xKH7gFTmCTUm3fIX3
kTMvH0YdzBSkVw8KzV5Y0mm003tpY0jFe1ZRAXSHzGZhjgMWUYQiQb8YcpjfHy3zVUigKAZyUkWs
7byUF0yNZxOGxd0ZZ3nUnz1kON98JuBxm5Z/114QZBYAn4/fsVPCzjHiJ6R321uXGbZ5rrh8woM/
CFKffpBXt9cCAnRqcatnXozzDHkRqlHupFIwyV5+lAOXPIOPDNZMfu9hf0Qn6uc9/ciBM0lMyr3A
a/kYLaHmBsINPgv1SH8A9hdVahmtM696NCtePcfs3ygKkR+9ITR8zB2WFv0g0Qn0d+GsoOx8Xcyy
gPJ1jRmfFiiTXcsOiVwpK0stYRHzQgHCNNOSb/9iqy5OaCP00LqjrZLW+aWA82ZcVq8PNSHJufEF
oUKmNZvCgVvqs+ms/9L3m5tRo0Xo5uHF9aNBhn4c93W4HteK9PzorLV1L2Waf/zH5RdCbutfvflP
h7U1Htxg6aQKAh+A9psJHfph2+GsvBtyBab+uSrsFLnPgGXP4vMsUNfYQeB2EYGYqnPs5fxwDHTV
ZPRhY4AomRTYui1GYBtCn+RhdwLlKfGYGjcocg0rMVuxEmiwT9+JU6AhERB4xV+BaggcUOv6nxAM
KlJIxjfBP/eYMVCfZZISZZawaljjxcYrv2s/R9QUfj7Vc6+FAT4YFTdsmxhdqGniTLnnNCm7tRR8
cugSHPh3vcNHe/dUBwvPo5By9FN1mR87A3vEOAjp9FPkaFsj1OZ6o2F1ZiDbqd0BcbWzhzAhAXkz
jTwCrMODFLhKzoxMiPA86VCIViKmiQjchYN1RuDxUBSaEa7sf9xKGnWfVMvuVLU76y2UNHETOiuh
3234Isp+9Cx49lKAX0KIxj7JmWJ97x5wF3/39c4fH5o8m/K7kXvpk3pSFHWbDTw7lfBnvloRjj9R
62NRSPIBT7i+Q/8CEeSK3Ivy/Ok8SwBHc2lWSGQgESuEQJlepk7rajQWvRYoQEvrsCsriUSl2jsv
ScyERJJzcat4vV6/KQnYAJMjrOmAhA9BpvA2swJ4qjwv0ND+9D/SAmj92U4Qr6OavgfTbZJV3zlO
wykl77iAtcoapZva7UvFxdcmFS32OBeoIyKyhVinWPAxcoCAjhFzspffKSnZz93Yj43TIeOPS0aH
FI2Dq5LstrNUZ1qp+Sr0Yx6I34q+NZGuIXrg9YoKBru9sn582op1OGmBmJYlPYf4MfQBEKiS6cQ7
vTQbIb/Z4IY5id2uZOkjdTM74QySI2fNb1BRssmKImeWANTba/qF/Ya1Y8sr+PjYnBwK8w8MOIAW
z6FuMoNWdSoc+COqJLiTGxo9FzMlpNiZEMNu+7AxP7bOgLxmloIsWaJ584Ddpy+qFbDqF+rv/aSk
xc+AqaGGBP3ByIVl9rAZzw3F6g9YY5nHHhveTHr32hJFMVfZezn0moj8DTQnEW+2ZygKab3NrCJ4
P/2Yh2pnQssT2ub4O/hIgxZFGwUDkTp7EI6HtPWs+qRtLcYXTGPN7/+Lg44ajV9BHshgYdTeVNAN
HykFVnaxYuhhoso5c55JG38N8A+Mi+rw9T8rP8vBQvvgnDGN33SoEghBrwQMNXTHh1k3QP24Mwsz
kHMnEItvj8Y61obB+9Rczv47V1i0iPg22z5vfvW3V0amwdt0uRWFsKAoqTR9eroKGpkkBXC3EzDg
Rn/jyGGkrlllJf3EJRxF/TEhuLS3Pf4cgG8pG7vxJoNehnWUXnBYh+3l0rMm5Aq0vMtpatDyYVNJ
QhuelekV92nswtsoAFMpvl7la9CfEEvAhdhBU2hj57AniS5misF/1pWtUkFakNlQscxyqH6ywD05
QsgEzxKBuE/m9W1Z2MG6fs7md7AJb8cJbRigJohfC0CbhnuGLWG2ij2ti9sH5KDEHngWLS/2P/ry
iQzlGBBavUHwoH8B/UhbijSbEkXDddQJW/pWf8uXcJlqNUBs8TXgDvaoEwS8aZLOU/rVjInHif/H
ZlyqgsZNOT/fkkIImmc1H9uVadSDzAh4gOqjIu0Ma+XbenZzLoqP5mUSXxFZ0r+As3tN74dftlGM
lp5N5zA6k+afMGwEMDH4REHzmklOW2Mmg+1pG75xcZXqL1wBuyNEN/lIyU/PTELmpVEbj7wyphRD
NeRI0zU0ezHkHomyVu1s7ghLEjL+1q3FHVbfd0wXFOEOUot7s+Fmyp8t2b7DuP/XXUYaHiVAkkqj
NfjTUqq0gGFhfnNkTVCH/MlBOZYDieZGXtSLfIyzGGTQYpTMk73jG8cB8GTki/jNWLWFMWtJRdUg
rzxV0plf4bjMBrxr4UCgwYNrVZnWPOAzJoYntaZLFuRHn5QWPwq5LPMEghVp3rbjqQ8BVV4cbR8x
19z6/Dc/p1pqxq3X7sYQAvTy1s/FjTt+1xKQCClGVn+y07UiV6AYNXmaMwlQWJSPL7G1lWd4sLuM
J5hNXEgzW6Z3TfBxIiSlLgHBr591wA2+CNkNYiYBJ53eLYcFnWtnV26PZFIqyai/AqiLX7JNYm7g
nspS3Ysyt7kSY5Jx6gsmfAal8ok1ab8p6S8XnV0RN6pH3GMT/G78ebTrsxpbCc0TwiYEbi9iL+r9
GXX1tf4CcaJ3yBVNiL9cxHBVLKKernXZ4SAPaEhbCwk8j38nwd1ohkWJbiRhGcwkNcrjCFRLES1g
oBvdip457Af0kS7ID3mNQKlj3qDhi52ItkuranGabybvBuNsz4gI+U/0Ge3G+Q35yx816XttKBki
9cmWy5zemxbuGfCTHk3MFVC2p+fNbAcV4HJAnZYzeVaZtffTti1pCmvOqEeVel7fWDQAXg1nrbs1
lb5cm/MGN9JNSIOWzxf2FPjNusz3kODlfyiZ/Okf67SoTKjW1Jr4lyQT7eT7wg+krnnkAqB7SWc8
Mr4OhI9vpKS/h6b8w8l393xXWW7UhNijtOa7DKew0Jcu7nrPPMCa98H7A48IYkRpcbXTJiIeIZRu
z9RWRrmsc2OwgxvJaJhrOmIRJOAhYybDZs88m86Qr11fRWH2rug04G5dnxt+kUNbOiddt/0Vicuw
uk3AIWDCaxWmSAOeqAVFA1So+dKOTCbKE6Q0JUioY+ubSfoDCdWL/lTb7vgEkVEc48HWdtrQOqaL
1Mnh6Y6eHpYyto+HgxY+wmlnxVISG52Ssss94l09Bj6oGX5/K4fXw8M1zEHxT81rNniBza72e3Jt
YIcSYe0d/YiTrnuCdXx60ilONksOnbOKe+txHWgTMvEIS9atHKQfY4+Zjw/tzoEN66TJ63Kib15V
NPVvCbcU+8GMZKEa2giTtcoD54sD99gRaKCpwTnSKEkmXFlZShrRyUgMaSs/bhvW+EngvnZXzuXW
AD9I3WQxkW6GYN2SPdhdQsIffcZiRQwO3X8NrVBJngJsoxhEtFdCdECYlY2wBW8ppUZRsKR8xsyG
ONTSOVOxVz2hbOwuifdzNmGbXoohqSZ/T/TrguTT5zQSpOw0LH7tPf7ah6jNDSbEgdFMzhzzpuEK
qgjbqcSTJzz6mOm9f6//sfV/SzAvYlhtZM4zimgwRUqu250cENwv3S76XqHmF+bfXSUUh2WnfM+d
JYkerWRkOEuVvzTO5iwmQlUU6cx19iDcdzxqeR6TKHRNjXaqWHCll8k+kcO0tLP0vL/Pk7yZ6Ypo
sfzA1HPJYtQx2WjeKaPdduymiWuph7UPEAnkUPRgKVBoXPn+swH+8HwCgI4jA34WWk/yxctpWW2r
dv+PKmGAk2+YUUW1MYcEpwrcGlSSJp7hAqFeZrHeLeogqdy7hr6BBSjdnvSBuh+xUwre4wW2Xk5y
kS20GJwKW2s61WI9g+m0rTwVnJH6hSStwhuNpFGi2ijvYqHKvKoifpjxZ7ZiPsxMo24bly+ZdEey
vYBsjsXB4p8l3P8wq9atBGuNMtsHHCbwhtHhU9tzhkr6NMMzzdyveagMpFWnkrFKDQape6ZpCgfd
cGwesppg5nmE+tBowz6rzy8FJg8AxRQH2VK0n8KqsixyQYMwa3eMvqFSZr71/kSHNol5YUxY+CNW
uU+07+K0cIPnNDbKtvodIJtqNVrEqunmgGCUP06ydrXkEK+fn/SHKp2DjyFChoxIVradTzL2XYKT
brELmSdEbd26QgZtHG+4A/DzPkoGt1Aeyh5NtendLiIRyrGUCgFM0hHExLubeQYV7/WQY3bLrDrW
/q1ws/3DcXDEnGn1/lSqJ1FDkhP94UZfQuoG5GzroBEUcybaef/0QPDTQ2aO4zqsF2wTqwtRIYt9
PINWfxCQrGPiYpyWJQJDWxBilXUy/afHttmK4JmO1KZQvz49csxkmNxaL0TgX2wJ8rSgux8DCrLE
SWWaYmI5+8tlV/HNYpgV0C8RdpVQSq2zr6vFygqJn2EFZTJ9Q3Pt7sG8iKpod/XyMDDy8ZtSPj/3
bzfX83IU7nlYNKG0vc0ZDj9tWLFfgGvKdP3YP8z0BkkPRvcUbqWcsQv+enmbUMp4b3EHHSL+QZx0
J3dcbk1A1XkY+i9RynhAS47ra3ln1T75vsqcYLwHhmbkvKMACl8Qu+nVkEYCjk7+2UccHK350B1y
bIQ7WPptHK+EyV2JOq4cNU1hnAkF0Urtuldv5cYm+0SD1j9OXaThnt9YYfoHygkY4EeFZnEl9aRS
O5ZiR8uxKtvB9LTm/3Zc/S4e5FqyMQ3j9QFJs3ae6L2JWiZwOq1qHa4F7ZzBDfuhmVT86idtdoZu
0zlDX74F0nok6k5LtaaK8ae1XDfD9t/dzA8/jy+a3NsFjB4UEkM3I5kc5977WCEeOUD/mKzbTux6
Kee71zioB0sU3RC6p+zbAxoV/lyPfKN5AqYyaUDQ48kIWAU4z+Z+mEkyhzGQtgv7ttHpM6EHHn2p
BRTQFzbMtcRNKKV+JdaG8Q5nzyclGCrAAs673KwSvei7Cgui2cOdkdiKVDs0Z1OnaIFXHJ+IdYtW
BVWe1RbfeD/R6PNQTnlHatibfZN5J8KziY0+zG94ghKUJ7x+y7Zmi/GzgsbAKGkDGtrBDx0R4dly
aUjxC4JtjymRQCGTVnGU0F+P+950ucsorcv8v65d82ZACaQcI5uNsT6kn8O7cGYPqMnRRi4DkC0K
KKxeoR43w39ss9GwLC2t8Px1M7re7znl8kj9lJeErK9WWUsi0885VOzq+05H+KbJ3xKpPIPXwxbB
bhvZWDJAX0k6a2NuaAiFcRPMuqr3GwzZWlqLOxOz73nMopVyO+/Lv6HOwx3GrbjyjVN4Fm0vJteX
OzdpZtQ5o5se5D222XGfFOI290RN+KW5EYih3bo2AReHWKsJy20cffOxc9GQwdykkhpgtxk8Pfro
noHtG7lriBkhCQDEAXiNYCjSXI0BnuOXVIFkmNViewUS4/CAUNg3HNPNwcJYZpL1TuCYw5I1SVhY
zL4sHLj/LUTb4+aaWiLTx6mfNb8viO0M4x9L9ljMKVtrAGrrz5Z32oRFMUZZg65XvpusA4SjSGJ7
9b0b5ZmbHVjx6j1yh5tn98Ra4okJud0e4pqLP3/XjJiWT+4Xw+GSHxJ6pW+fMjofccw5gS+upTu7
PzD9bOAGHKK+UPu5JN8RZ4t6LBBvEMOTWkOlZcS4b+CzNxFwbHVEJyDq1u08TqRaC9OmxMF40VhT
1cQGBzqi6KJC8zPbCjiBdQ1qvAMn0p0WNYpjUz9n7gU6Qjw2o/FoK6QqTPT8Ds2btRZfK9d6pDAd
ScM4Ng+pPgBoxIhmWbAnETSwjxOcUAMJXaBrg4PeGk41oNY8Ltlull379jA4KS6bKfLhu9gyV2wf
Skn2a59XWDWZOlG32lT8hvvAp52VRx16KvQQ/6uPjq0cnGLyk+fSYkZXokhDpF1ynuvCH/15Rl4Y
YsXogzcuuYMNjGEsjw2my4XGhhr0QlkA30BLCo4GPtHJzR1GzWnZ0+RHV2/q6qHlSkUG6OnvUW8a
pREnrAYO/mfQ2/mW/innnIZKUiTMvVPX6OSmftspcJmLKmt2lhb/BePsIMP2RCgwgG+CLgmRhlWH
QnxHm0sy89cb5vZ7BYhSbChc3/cFX3VIUkNMNLpHjQ4/IBzrk3HzwrSLCF4uqij3zU+WTV9vnhu0
91LDrjhZjuHW1/+6nwFIEI5m5SsCQ/KBvox/Fo73ghJP/ZOSawb6Ta/F1oA80YRHPfrLutHzT0M5
MMxOrsEoytkGxCBEPZuTiKokVYxaYB5rLqL5xtCQ3tE12nBEWnRNcXR6vtzTcPHj8Gus+HvWPr9q
fUi6aCfXzkiT2NNtbjWTgfmxMU+kM1lBHpGjCeJvYnjE4+wYU6Am7S338gznCuF8E4vZwi37V0o9
I+/JNMHiyrIcuvI2I5JWNhuytvWGLtL4qDFF7H1/3Yg1oHtBhNvW/VnOO0YJr7jMoq8GViz2d2IX
E5sjFkz0d27XRwN/YrPzhNFv3U73PHi8HzCHVkp4QxMFw93aeQWOS228+BhiKSvRuifaqTB9Ivl0
PyeKBKJf1T4bbHl4PKVuArSAvFm1qChP94ZClOy8qlztNwZhfz9BrsxpLxIfhw8++9x2IpXHgs6i
e2A5PZh3kRAadqiKy+6PLsmqJs1Q0QGTxB1yjPoY2TXLLNpUmvC7kPFwQwQ28Nv+mZUZ2v54fYd6
iQm1eD9+PxnBjyYN/Ny0yORe453FgPYE0WhpMyaLVbzKrosc7zGW1DujLHWczEu70i8Du4LALcdi
Y0J/V5welHs50du+KihnvRbl5xyuVvSAfmurMcWmrAc5eL9AkaTTHQz+dgeHFfyZoTBA2bM02BuV
8eK55mlUsu1mzazmLdUvtE9ZNVXVEXv86fDQnVlYegh1ZLT/FYabhVmLeYt9ZLuoJJ9P1jG/FPGk
8V2GyGA4eZ5RmLxhiB2SgeUNbOpcwOFM8zTX/YMWhNjI2fhrwMathIQEeLWh9shGbUpL8nSufyvF
2cKdEb66cyG/1Yr6Pl9v8WxPgb56YcsJQwR+2xv5HAsQ601whbjxdmSi1z48crS69yU1UFt4lsH7
C9Jk3yRTOfEfRZNvVBKd8OjZUS+Ti8Ypuwnvxw069/0SDCPMkm6QTNxiEkWnqI9kIPAMjB92sGbf
/5jQ4ei67E8NsbrlNnTIuN7wYSovejTEmBfInUyz77J8F6GE/4mK/rirBEBP6QqkXapLM0/Q3KBg
3ZMyBnVcIh+wRyBc5Ar0LevizKuUDBv/CjYjIVNq07Bw2lPDYrJY0UCLIuW7V7q8mEvg/4xNDud1
KF6AfPF6ZfqObU7JkKCXto0Fa3rKCGBccA1/Cnbx64BcKOSI/D+ytElfp/xiHdEWYG+RILWJDjBi
lqpJ8rLdvQbOwVA89Bapi1b9/POmZTgV2ACynND3P6tgICONY2yEvJd8V7dSjq4xvtmbNpP6KzUm
a2TmFWcHjAkKq4tBgBcaHmQc1S3lZoS/UuXZNW4wbpUxTNCkcQbvhX/pnokiStYSjvK0GHq4IDD6
NblWlz/+NQjUTSczaAgzxbF0xkfLfbzicFUCLJi1uSP8trGtiufnzuC1uj512e5Z7SFI1Y4HUs8k
wFhaD9gMAMqQgMrnXtsIu7gjy2/ZDuPzKtJyMWIGssk/q5q95zUS6Bsd6s+A7oaLhbcUkglPrvxc
da/YnaNk07Tdc3DoJUcqvcLh9pT/baTApzK7eM6FLPOP8/ZJVH8lFo1AFfHsOFd8vXoAvcNU5Q5+
ebYp/fn6mm0xiqKlEFr/+jd42eqJFTruqb0OqtglOPp+F4CbAXD2r45GB3OT/wDh71BBdaaWQpif
4sv0YFlyhz0SoEBwOz3qyyw9phX2acpAy6UY/Ii+AqS0BCeGimH33nN/U9ZOZ8dBhWdR6+HU7whK
0DrWrwjgAa/CyeXEGdVu5hxmtOgDyKUuwNzb/o1+SgMJuJ6+OlaRxKKcj54iTftY11IjZ4ma8zHl
M/Wk5A+g6qX8/oKK/xAbqXJyOYtShD/xLilkBFDnfQZCVRJ19vqNrYpR/y3IyCe5FISK/KdO7/rD
Oe4XQSZne/J2ATI8X88yoeIE0XP7AreTFfhuaJrH8ejYpv2yEU/czBnEYNpCuiTrLT6QCzIUWUa3
5VQLz/73n3c7OuoAAYNZzBTCBVzMwf0dgqS0dE//TqW2ZueFgu0WGX4xQOxIC0TqvFHU+VyQqgnz
Q/r2HJLcPzdil7ObnrEf01yYG6YWwDphmiyNEu0pv9qf8c5DgpP4LOH54dtx5jvqfleIC6ZSgsir
LIySQeWnmfAY7vU6dmlFc4Sf7blw6bj5+mYDJDU6Bufynqz33OHTk05ZCLhuiAHQiJtvO41pD8g2
tfghp+DAlEV8ZN1ytupoYs1yNjmKJh5jx3gEor6dPAwIf3gLZS0enMvm9Otdi8gYynjV8pUSNgrK
bQRqzjApryOW3FE+wLA1AJ2tvvX0dEEKN5hv99cRjy4a+/fsVBbNkKftmdzLVKBSYQ6DMSDGiPSY
UaotH/zhAdTHB5RyxMh+PPkMJ6NYl+orlqp4+wqMVyMVLh/CxD5SGoFszkKyaCqHPuH/i4FnQbkQ
PM39SCqto4QeNXIHuXiHD8C9fVD2NflcEEi+giQCmaMuvMxksbfxt6WY9fn0opOhSIbtbGWnl9n1
Ytxz+zQr1TEZG53NJB6gPjoA4sMxyiUfDUC7NCmPONrwyDj4rd7hxt1rjGljtTL2QMixOc9TKcHe
vGfdyMcl4asb0IViTzzkWZZYKUDzW2xnFnu5jsCJgWUFYIE5vJsyJAnufN10oQoTPeQaG7kEBCj4
mEKlmWHr4W3c7F7IGr+2BcztoJWjrfxzbic/zoH+kEtnL61/pUrUZz4xBHPbH5RZyk70/yONMhho
EibJxllqFAk6SJEqyJ+2VtBMl8BNLkwSkNl+HXMiGBdh1GfeHCL6Unra0niSixjw+xNn0HZ4ZxHE
DXWlpsCQhnjpntYkRJeKC86wkf4pPo2PpL0i7wmWgBnmK2I1YHGIX3OG858iTOVnqjESfOZK0lcE
vyHAKm2ZUJjb5tfeLnFGPrtQ8l7fBwTcz89a+at3VM7q9wz/nK9IxZPXjTx3BNt70e/fEv1d8U4Y
ppRSf8X9oT9wBzWe/YhPkPyiflKgH0ZxCl5f2KkyJkq/A9r/fBbb1yI87mNgRY4rZoJbtAmySf8q
S8RjOXQzvgL1d7kaTBt0lJz94bQt00uOuJTApgJrQ+xb768BJd0phKKypfI1Zt8VHzdxpymbsJAy
f80olTUMYmJ3X744wvKoRAYKzSPPEz7ujhnU8FN1Uj3M1JBlqZGIZKEEGS5i8QbQ6XRBK/AkqPHS
oW3Vwxwshh7JRxcSnYpN3Ap1vd/J6R+WiqiJFE5mpakcq9M0BIN5yjler5KCxd0u0/1+5gXThUbH
fn0MO5GuHx0QotGXYcywFzLpNCl52xpLMrArETcK+NmEuj3UQDkapr2V0Uv2MXNSSSV7Xl8/AWkO
BioYMlX2+BtqXP85extCqmO2ggWYasxgbmryPNlih9VMaIP9xkAomvI34Ov1PqX06ckXqDO4IiQN
TseLQDjsv1But9Iei14EsHlEflpIeVLc0zuXL9HJiI5vegs8rSvRL8p7/7u9xcfoPRETa7HneTYi
/BDGrD82haHSt2WB+mFMfbiqCS+ilqDLK+jX3aeK4wmiR3711tYsFpSfvAVjxuIHX4jJgpuEU7gc
dra4wqm4oRHPbfrmsG1E6PRcPUC8OvmlJ/iLQKHnFfNmkv5bIEdRxRcFtjh1XlohO2bKQfVzQBFn
3zcwl6Q05p7b+sqSIW9+19PjfJdPS7QncREkuc4VT6e4VuEAyFC8DrhWrVIoVFXXvlfe34ivNS/D
BQ6HfVbKZpwAd4aENfrN5ox+a7f+nhOvCMr1YRC/Zp0dqDh4djiafAlZZPCURblEoBlXNLp39LJn
Z/uuDDCfiDAbNlB2fV/9WqdSca55C5jwOAEgrWL1DYIGOH8sqfT88J0VpkDd4bBvaSd4zzAQ3P3F
eDGKweUBBYxd4onL3oy5HUTSi/MYQdCQB7VXRxkeVdkNORy0VJlFF0RuDtPpb+UuexXMYOG1XTIp
7Np8iPSBXjsDQeNMqUrDp8zd+9CvUwHGlmLoKFgrV1ib+kiHirM6fToASwb4hKPjxb1EfM1LJlhD
rdaQ7vNVub+5wsR1BoSGYne8ef3fBta75qCS0PS4zIR+0hV5vjpHGzHh052p/btrTcrraHRqJzFX
NNr9vmNYXoH7IvMhW2v6JzMjVpS+aaqTfy+hgb6CjB5q+v2YsxmMFnWN8eUG3GDKo7z1ePsOCANw
Sk6dD4BiAROjtvG7uZqFJknR9nq8KVFQSzXh2mBfPYwqkbNDaBigNh9Ep24f8VJzJHMFCjq40Ljg
d5FrqnkT4iSBxmS9ALEZTkR6H6wXT2Mj7GO31YDIVlP3uDC8LeZb8c6PNIgXO1HvqeZkfQGievX5
8A0d6q8E8AtIi4vKb+toN+z/Rj2L3NF3qcWi+LMz8FyQfLTMvDsYFliIYKj5R1tgYoxNPUIXXXpy
zM+HUlzOrL5od1oIs3Ud8fxnL24JE1pa3zWCgoD6O/3U3iit4ohA0R9b9E+sN+9vUEl+QjxVWzJj
5LT3PrCVKmIzeZHzly5xYm5C0tM0pVfDCF6MgYdKqFe1qllVfSQyo5O34dWZ2YJoBFm6Na9Rw0E6
RmNeDSutDOK8S+ChpuJCtpbok7SKvUnEuZcuU9fHzv3674hjeBFmnNQEuvYTn/8pJaVaZOZVk1z+
G30hfxLrQIqn5MO+Ept1Z4DlRBzqhK3lCfLHk7gne+FeJ3QU0YNlBUDZjtvthD1iHdpz/bfs0G1w
gFAT+wN7KiXff1fLpzwZ0G/gHULUrceT0attw3UWDfTtYgav6Bu3QLplXEmn0DD1rYPCLe08cG7f
2l5JjLXKcx+On3cot7iCm70L5nMHg+fWsvcKqECwC6x+wnMQugI0VHx8rVFT4y8ERN1def6AWVia
TJ0pY0PSO0no2WXJM3j4AmUpgVs3S9st1bNJUdp9ZxQdJjj6Y1KptRdJS6JOPniZ/yX6hDuKNKxG
5tMbjqab3nz8sD9E9Q3VXrfLtRiMrV93kO1nIlmLmsfBnWJ8ZbjbMDxdjwrodWaUAt8h7GTP/z2a
GqbuBOoafrLpbqQEQ2KJ/nEo4CoZsKvZw/T9OKLygGZQhi+50C5dN0WQtz2sp74rQ92CTnmmP3TL
Sn3ZgUa5kMUL8Fu1uhixFSR4NuRGNsRwhte/qW2R+sqIbyGQNddv745sHV96h+aKbmMmD2Y732N+
ODh+jCvCCzbAvXoolH6oxMofWP26AVzvdn8O61nI49SrLq1jzDxoa19hBKJTtMGaZZL+zME9ppsL
leNBQo3G9CGKYQB8SHgQdFltPk58eHoGJhnax2lyXySKc//qgLD1zDDV4u6akHeN8uSd7RioMFkM
PfYPGLmK4O1NPF10/7Wvu0XtKr1UOUwLzMonVZltbI1fJwgiVHfKeh4B7oKOu6c0p+R995tQBlCK
g0LnBAmYQcT5hhg8QElSxRmPBMqSivA8fBbua3aKpDgnwE8s8sSfFR4xqvQScXCwCozpyKGwgEu/
Rrf4rrl4x+mbBjrOHJg6ibzO8QZnlLOQAYQhydVtAgUwc5MFPclZaaCpcmXnGZfZBit3rR5V+N8M
GXUXxxLAhtjJvYj1sj+b37dQL1dXKc2zB3d9RT/IYF16QDa/sq5E43fe+lsY4KtwR4DMRZO0ZR4R
Bj+stVcM/eKOnTDZbjcVuLse0bi0ybGwALvXkPjago9WtOHuVPgcCdlZvqRQds2bPjR7BIc9y5WU
R2m1aekC1wGXKzQPXC37NvqbIFhuoJw7kLOnp+UPTQzIEh5+gmsQx+jZe2co1unQhQUZVnQf8246
bYYkyu4l5/JqgrvYq8wnOQwtJ0D63ZWE5e42v2/a/FCgEvc2wBoc2SGG2qU9CqLFqyGx4x3j2kyq
OeIDvGUZNgZhYT6rRpA2G6Cg+A/6xQERdcdClF1n+SGV62cF2w1zdBaL9D933hZmug9vYNfnLJ11
ViCsicHF59/OVPNhfSdxGGzL5UT671NjgZ0KFxpZrkfZHebWD+uPpVOC85FM8nvFC+sD30Ih8DYF
Y88GIOfbmbT9pN+G4B4feNqgiSZqiEJKtvSjHOegwxo7UkKJUp29Zl7H+VpSGzFgHBvRT144OiNg
4yilpbo/XtSlrLiemXrEPXBSiSA0NrD8nDbT8XxPHEg04BXuxK8+TKsbROwsB4hjX64wbiyga+v8
ZlLNqqHtBTchy+YYEgFFR3kKyVl25SSvPNuvppsjxr/vU7GOrixgAGl5sOckVM7qPERtXBuLi79C
7n78onIp2A/p+yv2WO9JYeigb4/rKI1qTl3r1iw9b44++4IEmA8IiS6HZH12a6wmNQG5zVEmQ5Fr
i6vdouGTnxlRlYHhsGdmnlcKhom7+djdPxQXPIwgOSlmdO3ebcmsGXCOpjfmHqInB+aoK55pN/ls
X+7ewYxb/kBTu8WlhT68usn3eFoOV2l9NbfH/ah4vLPQNE4vybjSVgiNGU5C521bjIJiZUN2IFRl
PsU4owtdodP1UvZnNe99dR/h0s61cYmSgogMMUfVpx90oerJ5jsfid362j1mzmwIwnyhpdXvKp5B
E/Bg/VR7K4SeMhDk2gLwps/mvw2pYAXhWLz3xf+iTZs1XpeWBh1y1B1tE7dSOw7dWXY3Xpx/harx
AV8HAsXpJAQS3VCjeWWlHxVU1XsVcZY9pQxZaS6QUxfmKhcX1ViCFHAtBgd9eyZ/1g6MrgZycLgq
ELd6HPCmGoJyymEldxW/6MchKFnejFccp4JdgidA/jBXozPr34fLWZDjcqiBjDJGTnFXt6EGeLPe
wtJmfzpx7u7bMhT7yHks0VX5kHIGaTJXlMuGCvHbeD+LAyePpD08pxYPhI84SEGQU580Up9MOaxA
O+LOp2RRbOnAUgD02VpnBzGYmG+unYMY2RPegTG2q4/Kf2CHBrfgFctl/QW3/RXlImPwddekkhEm
OG9NsT+xL9Y2buJfrUD9+KkytT6Ox1gQ+hWumicNvG/AjUXLpNmHHzbwwA3iS7+wF7l+0HaXuYVI
3t7zNtxo/dhkMMqi8TiyIRBJDivOWvA5dx5G22Fpb4B8qoWOHzKwtWWPzKJnpiHxCBPvq3qut5iw
X5eQBq/POxifJXIhNKEXVsT+VJcb1IqeHmKoBnClrqlDhGCgHkLiYvMlUxMi2X21/mQ3pgDsvh5s
2kvj4eMUiGz/w9MdNMxEYHxpfl6gMaPeuB4RBJ6unm5d/JzrULY/YjzApqzr/vohSEc8E5EXt2zA
1epQDYHp6wIgTB4g+NiqPz9RkHIiCwEd6HbKMx+JWn03QgNuxzWidpk9lPPpV/FHCkQ17Sn8/9dM
uwz80PsE4GACZ4q7P5TQ6fvhQsV9Dhi/cvgQ4+C3fGORmSmR6wvlzcULj+o/iZjYK50x0CwbcQct
kwT2BDzw7QHwhSLMhzrEIekCgp3nYZkS3bQfmI1/afMpn/9oweBir4R1QfnzZKnEZF5KACSaOLUB
Ugkoamt+Hx9EiickeDSHfZYtSKRzYt3fAKXD/lMDpBVfotmgMkdkDrHPTTW1YhcUpQVH1z5pT1Kd
75JAHl7dBgPwCtebZJNsvV9bAUITIhLXPk+Cvi40ZnzMTgSwjajcRQpqKZVR2SwaZjDlrb1YMRmb
P8ht1y1EnuLlszDGYI1ur4Zf95vvQUuepyYFm4t1+r5XzTvIMOqkB4jO5AISZlg8FiN7caS+XXC4
I3Q08cQJryr4q8Ok/TEdo/xqWaEIw735/TQ+1CzA++oOrsGLAVjrL6MqM8I1MBgeqlv6HnrSXjVx
49cvvPoBTFKI1/SBowZJAhjYQZUffW14C4R8f6ZXEETDGfLJzNdeURt99bcKJiA+I0SFCedVPGkA
kd1djzMk6UD719qUS2/EztQcvPyoTT9MJ9ysufVZa0sgfPOboHb6NSdTKoY25r2dqSYqWIobbmdc
S+Uq3Yvj1zQxrndJEADDnwLwpyxUAqeEzqxBSBKhcIR9H1UfHPkcrd5MpHcz8A+KbL0O4d/veUTX
ddRW05V0FsSEI7Lmte/ZsTT7kxtilztwua3t5P9pGVBV/QycGJDMUKPuOgfbJ4j5pQaZ39WPk0dt
fVu5mntSNutHgFJOwVlJ4PxqJJ5tszWLsKgG9yYyiFU6TMO73TpFa2tkKyb7hVdgLxwkTBBS0VXG
l037uIkfoktGmmP9Q5bY0WmIr6/Zq861Emoxd1S9nIsq7xNDZdb0Fn0zDkXEn4j3xsik/e41AXOf
Un78M26n4PWusSfpUnLr0VkUlmIr5zy+Qu0iwYBwH713e7tsnKkkmbvzV2Z/tyIGcS2yswSavJMW
kZUtyu5JAchj+ukZdU/KcuU/dABFdlmSSz5xzGL2erdU/2Pov3pnbOBkvPLW88tRxr2T+1pwLPeN
zbG9lEeVuOqMBDJ1AdHiVAGKQmBuC63LMfn3wsmfiIh6aDEKZpghpZTeNCQ3crplSTxOhRU6VuKj
a45xIkITHI86m39QNDtp40j3pK54nBZNQbaTnVEkIYlXpCaSINdr4WWUBXthVOHIi+f4ybXNuFRv
orl6xC3IRR2j5BXpi7kd/EgA8Kusq5tjHA87inyIN1yn9ZAH0sswGF/cs7c/ScvrURXyVyhAHWan
yw1kVB3U3GFB0c1rfkGmmkhSpCheiP9wvKuQnDWXLEusNFUFJJeI+LXw7sTBB+3I4Ne/yMzjkxIl
OXwswL8lVIGa+8tRPdBqrJbnuED2nRkNX+g9Jt5udJbCXB44qprtBumddCUGEeUs+CYaW0K8SCb/
PtEMhA9nuIR5CHHpyocE6hO95kWzWJ9etovQMVW34aVIT7jzFYC71HCBPjbafNBPYy51k1ntcJUG
Nm6VC7GYg9MJ04eP0GDpwzPEWvl80OPxARoPc/kH3mjhMCJdr4qZ16d5KIpGIzB6zqLeIvWf3UmK
oukTXVb7DYe+2lyy6IykVK0GCT0RRCoBlhuBe2mlLMtFH8A9XifIKfmjiTeO/DwXbOnss7mtHCdi
C1sHTJE789U2Jm2pAiMlUs0AuRhq8WRSAAsZ4EPhtlmf5tJd+O69Ngo4jgJZk29Ny8Hzizp4Owxg
4uEBaQBS4o7ni/i8DlrpTf3FBOnqpVQ4LGbnRYm3+atdpPfNbHhwCZWF+ILNjkWsopbkRb2wL5UR
vaNl5VJESuPnrfShDX3A1TS90cHTomdQzgoHo6KCv1uybUKjpZe/H/hU5GEShqF6nSk94B1M/QFF
VXFMd2T16PiD6VqNkY3/Wn+dXws0fHtq49IwLnxiP0o4ItWJUUPHnw2VCe9Wp/NRT4hzexuOrugH
dP5+PlNVUdCo65y51ipVhALUHK7XM8LvcrJmNGB1xINdFBqRSecomNrxFLbnjUNO4qBWKCi2KYGr
iTUO95f3u7oxZGryFL9ksIJRRl2dV7dyJ7E7ZlPZ2+0r7unO603ch9SV1XI69faAUchTGVYLaufg
UMifnizmW+fd3saBPS1zLSNT3DGdQw+PNrINWvQSeXNg2qPUnf0ZgvNM7gPlIhN09/wveic/L/9Z
tLaZNL1tBNUEWWOzRzZHDlICnAg+cINmMVFJgCAsbXWe+EUJ44P2M/lIG2btb9fLvqG9hXETKbUd
/ZsD8uQwVYPN2NrJaO60CBvY9GiTAynUg4swX7tvByjAnlX74wrKx3+FN8gtdDH1hM66XD8mltcr
i4+m8aWMLVdWiswIWEg/klCoA02MFpglmct4eIJryxFZI1Jxfg5axEKNNR4zTHXdg9/V42v3PqWz
LQRo09WyyT/SvWN3IPQGBjLghQ6Moj545l6Zjbe3Ckty1/jyL03Nsf80VPqekNsDC98POZonuPFS
CmX0t+jlUEYxbPk0IRC4aUwOZa/cNfoR2pbBMTYv3VpfPHgMX/LrF4eKGaHEx+Jv7Yl9NmOv1vTy
ZtniAwVc3y4dP/UrF4E5IT0h3udH9A7U4VAC2pI+a/RxkiAdLSzkUScsLXB46ULsf6krCV4m9yOY
MR0H/UFrJH75Ars+9EZvoreA16eXtP8LxgUl258xa2S8wU5DZGLqxhNGh0ClBESK5x6KJFQjoxLp
agxKZLeOcAUeFE8UwQp6EHcIB5A0qVYbcIwj4bOU1CvJnjF3EHH4jKSCZlqnDNem2Izgoqpj+th1
mthoHlsv6TFUj8EIM3bngCcTIZUONZbo6l8jOzJU+f1hVryNhks7SgGJKn/cyTdVWndU37oSt6NN
Y9tVmQlL1lxp95hXFKPP/8Vo7n3Hb+pvAU3lxOVxASkBW4QoTp9qEWh8EYFH4I8j2TxmoZNv04P2
3U0i0VfRhe5/oxo7b5Flq+Cct9+cOjPS9optlViloCL7hLZeJp4RL4t71Be5ROBEVcaCPgkiruCO
RexSV5+mB6DO1Mn7fXHaskQ587HGPwFma772NZ5bEASvDYjcjaDnR+BFAyaMjtFOAr5IUDyXhDxo
7XlhqrmjoCFs43oBp1/GxKc0X8dd104sUvBzGwxsZ2Y856+kCHCB474ELYgOAoUCEJzmOgN0dcbE
5EAbYwwh68SCoxlryNs0SAcNyOXhzMEpnOGpKLFrfJTBbbrfqR+OdhaWBYQFFU7ZFprT70YuZjOr
yaphAepMy+Q5I9NNfaTP2P6Y7zgYIJONhkP010UmeAJ6Fe3BI4IR5QSFGXSo52EfWGXKNMTCJT4S
kI209dOSkleb2qE+3ODO1XUi0AA8P3YC5eVpeWl++3+C1n2svhMCwtwzLwsweilQrGDGH0O2/RGK
yxMumq3RQEgMCoybz1Prdua+ktWJozIeqD+M3E2C3tZze5WCJwTFZMpczC1cRF44TW47n3p3Lr4Y
O3HI1y/MOQWqePs3rqRX6M+4CU537YgyND/q6oJkqsEacIhugxAIhi6vFtB6r7deHHjD9dzBWN7g
8k+L2fab6ns579qnovWGTQwZG4Rp7+JXOZX6WipPFFOhd3YOVUKQsOB4HFAO2AbUKu77LziW9qyE
B+DxE3OIjMdpGQa+B9hLig2scZA5BZoDPB8MDsM7Rzez8gCqa4rwO49S7MAHsH5GqNdb41DwCCjN
23rM0zCOgZO5uBbclMQx7vggB9BVcPuFZ18o+8wD6KH4WqTbU7FdgepP3K12CAIT4g+o1If9OS5E
2Ql3zafV40uq54zcWp1gFKo4QWaH4No0vikJi2cz7NXA+eGpqgxf8BtCvj5pFJhurRgfZi63ZG8h
6repcxA0BgAVwrCABUlhnYR7kB65T8alurp/6vQbxnsUGPBznKjVf8/Qd5YxhEwvgGBSsMiS/5JS
rROFZO26J7Sj38CltxKgCj8A15EzZKDPk3kzUeH6Cy+bZCCQ1ZSdB6i4T9+pCfPq3vellXUUyhmk
vm1DTDsS7iC8VMCHrXXDhNWQcG9JDNais7BPlA44eL9uLaj1mOT60LM9UNknbqUm7C29NWI0LqUT
EpIzzDawnMPCLs9Gz7aidZObiQFGoamVuVJCOjmg5OgFsUk5D3q1/1fNIjKJdt00xGVAA41IvxYk
BW9MQruVjt1cOb2T3xpVoVKHalj/Bt/hrfy2fHbSrFl/zVcB/zBBoY+kbvQVERdDL2198mMWNdGe
3yo2c9+aJK+CXV0XOF7hQy6+lP+quLwKYTvi5YVVILFmo/3QRyjaix7t3fuLbv2WrI+gcIT2tivA
iQ7l57cntULyblBsVFHqRNlhx16N0oL7diEA8/mTqPYD5wGXPLnnlQ1vbrzHqUsw29hKLtIn5a7i
x9YoRlg7bGITVDewNALqorZTimLB8q6Keylkmrat/EWO3K5RiHRuOqgS7Hwt9u8Ry1z2aq/rulif
5iiz4IFKIU8VReLZDQ9qGJlwRno06+YJJFv4mUUCO35MlMZ5BwE77Iek09vXBofPktHptCm7phNP
D0XwxtOZkDEMBGq2c7C0b0HUhvF679Ndm2dwWkoDNgUt9nIjU6+yLgbPci2wS/SJBbXOWs7C8uJ2
tmf45w5bdFlWcUKEwRPM6SRImTC/pya9EqkAW9FH35Ts8zjvVwDBxd7cKzf0JOZjyuu3mg/gI0Og
ouAPCLGPGhhVT0aoh4UX+eDIKooWn9azSRCKXDMhRqfVpf/VTaW2UOB7/FXcVycH8rPOPwMiNU7a
cZY3yqURd2AHb58rRcKpNWZOebeyJqW7Q1u2vv95ySaKcKDmLcqftHMdSekbW3PEmwCVMKz3I+IT
tclH7q3IfGEIj5wbjr0GWpKQ9p/vkv5uLS9X5KSk5oLjc01dlaYPdAG64mGhcuiOaysNWAeCCo2I
JIozPLx+F5CO0xo9OZZ3RWotrn/yi9OuOEOfTqb5hUq2XOsKgDAK5UvPxJH7wxLsFiylPlrnZLNF
xIcG8fyQjGLUZ5thdT7tCkTZyAJZDF3L4PIFL22Kyt80gVAxqhnVqtdJ7Fn1+Gq/KWc/cNXpGYIl
BFlQ12LL5sxCM3WPlOXEz8dk2x4oaO4HVheO1oTKkw4mKIJr2dOVSG3LrHO6FR0F/GZ+jZULGk2M
bpS9vPKe//2vLxxvHvFj0Y6rEC9pkjJUT8lMZ5kNmEcDb6b0K4DWMRPp1Zi8VHV3oLdGoiHAXZR4
c4zGaUConlyDgjHcOad7G6v70Bx8oWBRW00Zz6UsGrw+4AYwFanQX8Afsk7WJ82pZ8khurlxduep
N83r0w3HPjfcxkWcc+w2OQgKrrAPpHAeaPtaHuEukF+79K++Bbkvq74mtrdMTtKWP+233iIa8PZW
W1W0PTdgMVbQ1ESvjB5IwWmMNTutuZYBsVUY3KjUsOBJXd2KcibWSNAR5sSmIkH1wLRaWcQrNenC
EfIbmmsNhFoXtuFEGpqrtTtkG2hgaCRKi6wdA8GL3/j8DwflzNjuKRbrQMSqyc8hRYN7eHfvmipw
yHXVsFjF1Bh9e4vpB2BcgXnWdRYyFh/mPjtpY1DDv8UZca9UhdzqDF7TquLSQY8cnwHwBBNGaIcY
vzhrGM4WyB2AMHo44b7B0CaIPAEzYW7C80TO+kwfiCTKLrF0DAFaGAFuoo0lHj7txHUh4H+rOO5/
Ss/YwJmcc9d1+o2+EmRpcQlmJEpp5ktWiIvaMJ8uvUSpLB7qNCHTcLOPZLD6ijJoafE+xwcpKuML
UQ6+S0ig1FyONkzoMUQq4wzGqo54igdMWEdraBBW2Kb0BT1Xi2lytNnMYlZPi/fCVeoKRaM00uKf
ixfL8K1hNsGnAYTrJqST7YvWZ+k1SAYEvP1XG5ZDbw0VMoR5PnheVqNuqunTJ2IUM689J5h1k5Vk
Igkg6vI+FZJQMRUOBOdUp/e0UJakon9ZiAE0zz/oOGvmd6JT9t3xD41+UBmPwV6qBn2XclDDJdom
mtEOiJevXa0YGuhgDnzZjP9NImoqpJoN9hWIPgWyrujanJ/z4hIY2Qeav1J9HgrXsho5UOJPw4Kn
U+akFoZBu5aH5uefOkloYJI7xEI7lUPkJFYXPQRoXAC2hRWdFQKIMrqBrfyWf+Kw4+z+fCYUJvoK
68NQBbP404AX5WQzuxaZ6gT+RchSLRuBgehHlzrrn8oicq01O3v09EcNrFFW+j27puKCqvtjMcjF
oCWk81NLaHn/2fMzHp2MO4LOKEDI0Bd3h02vvXQO1VeYPN+2NDK06Xg9VJJpoVoFqY9DrGRKFDGl
Y5CbI5VPOxupMYx4+TExq0hlvv89nI7sURosCNbjSm82POzHlcpeOEcCkYTUWzvrXSD77eCczmfF
xNLzhDkxuv/vPCf2BKTyLFmY6K6U8UuoQMIw0ZTSDRAAzDOyqO+QP9BQC5AmOW0H1qjpdH5pbhZR
dW+x2Y+aZVTd5/sSDBDuf8ivV0u2orBC4I5c8g0aA64tFPwx7PDfIE+mw5vKEKPQ1/SxfVC6ioUv
rEZhgrG8wV8yuElpPhK5hysdxU8ZMjIsjMPJ3iuVaavIlgx9oF4MDK96He4x6atHoAE5fJ2gcnV0
Qs8V3k9UTERHQeN7R2KxjnCAN1q+XpVpKH8TOBQw/CZTcnIBOtbfKvaKSt815QiTQNor/Y1ACIvB
4s812LDCkLM4183GFMKD9DydTq7DjKTQdkz6T+ey4MFa7avGnRx2LQZrSrGj6uY366YaV3NB2yB/
yjqYZRYadcU8Zz3GHokfBX3Z6vL7SKz80M1TMxrfz3qwFMQmQK/eI1S+H7bsLNfFtx2c8R7MKuNg
n3531szsRFndAfcz+LWo/l9fsAO65xDcAN3l0nk5dxM7qjow0RWPy78QIBlc0rSzyqg2oTg1Gh4F
K5H7lShN5wQGcdfBodcpLIFOkQlmEY3HKcDJ8CqoW+tWDaDzZgyvbcDVRpgYKQD6j7ZuSU5XtOn4
2kZa4bp42wTNNKby+k5mWZKzu+r2C3iOn/xnCf/vfVwF18z1bwI5ZdDiFhVWUZzPuXs0sbnV/5NA
RiOYs8fx5MQCd6cGyuWVIh6NAlF4MBP7vjhg67wGbaIWrBEpaphsvQvUxtt9KMUENyf2Le7Nekcx
JzNb6TO8gaEf0KzT30E1G3xCao9Sh0mg5s5XCTmLEPwHrpWFpydmSWNOBbsFB5ZA8rRy/UkdW6O2
loGFe0SRBVhXFCf07UhP+lwKY3WLJXzapq6DlfoznIxjVtei1u3VowdJvC3iflG9G/hg0nLdKkjj
5FpAbXpD03/lu9gC+y0eN5HJsfg+0FU9hdWBNSnhZ1pkgaZ3hvy8JLSJ743JUZJARiCNJ83B0Mdx
4znfL+rPO/M8t1DwGYWBapaOtSkQ5CdiDtS10Bvjty0LE5x29NgBPTgD7RIsMoVb1GxCO9Rw+26y
oAD/AQ6mDixZ5YXweaMvx3L299fmelj2dTZ4F6NY3tPVQsR8FFyFz4niswQXBrKxmg3u4h4lu4WM
CPThWcaZGbgIYEM+JYR08aF17uxLOXyO9y1508UsRAsLDUS2WQdYwaVj557NeiNnt0hnUuYxoh8N
dSKXQTcd5LOFQcsQu2T6XUxRDBQKb/pv09PjpofI+/StNJCQ4MFEStqMxc2KSR/rcRJGsv6l0rHi
FimMcRByoQZgqlsuzFnX6e6FRQM1REcp07Sq365UY+Y9TzIUZrwYKAPdmNI5CImIpC5fNQOZfX89
hcMozs4SyaTFW1FFm6uHAm3t0rGDk4yVnmubZ3GY5YPRoIWqfCTOCAxnXfwX3cCtRjxCb2AiUOEp
WnyWfrevk8eUPyidvOgUavwJdWblTlub33JTF628t0sNcXzIwwcs20tDMllr1V1LTN0dwcLzbe0c
0L5cCTH1gTOSimYmmMlMbUbxeNXrnJvG1WZ8des5qqZuxAQy9qbLJM7jNHHJhxk13jlmRpkGJN3o
mYHRRQW31F0oyhMhi7Ip92kjRXbsmgrSKekNwY/eSA/d9f5oUj19r59cLRru9FEmLEMxIk2eKE6Z
vsJ6vuejx2uxrHa09z780VKRm7YKdkJTiLx9wTZ2UaBv0FE+hr5nKzh2DydZwvV3YBcKGaGcYrus
M71d5r7KJQrBeNs1Nc/ehZIA+BDIr71mV/eh1pXi7TcZxTbXGJXKSCt7mpuOsgK456NglqUZVAxl
g/0s13MegyswbfEgsOTg9H+uS4VkNf8Ju60QceacSsxKrKTWoBY8UGFJRIIFsBk9olUiDtai4NWJ
jFS16Ws6TCr52UUOU5PUOp7FCKFvXE7mX7Ty30Im/gVt8q3o51veRWDoGtRQ5OF/+aak27dLrePK
n70AC5bGa4zK3gVkXD97HVtqS/3/is1KXxTy026006o78d7/A08UA/pPyJYFyI+MBWHl21xUgGzG
OWgPCZpn1tAMaQltF3rKOJ78Zq62bXN4MlInL6RRPEu+V0wPDVzyDOLeIQdDW/FnYhr0yJIK6e8J
/oRi0Wptf2vUVjVGzVc36NBwv9Vh3SwC1WUokiQV0yNbAtWCwN9ae0Ox0jyLpbX1E1TFo0OuKCUe
fY5V+i6R5R2it8MAepYRrVk75NKBR645lWNEpAkNOcbPEH/aOCvUI4oTaQaxXy9d8+/zI0EaaYkx
KzWi/SLQsiJRxYy4HGkR+utw1vuhDr9VLIGo6uP5epQHToDCxHA+A6nZRFRkCWp6KUUWO/V58wwF
hPx3LXFNbfpY0p/Uhe1wBrOpg9wx8HqGZY+qCOhirU77jqR7XkTfAbn8e5ZxxzxCq40GT4fJmmpc
Z750kuS2ofJsKsxZHswHbFFvvPXIfFIf+KY7Zv+/vr+hwPULQHrO2FA1gGuhML2dBuJRHkKm2UBF
vI254/GSDXZxqg6kaZq3WicDJJYMJEl0fcxRI4VX4wmMeJaLfbh6cY4YxSrHSZTZDfBGapaR7gY3
X4grxWLXEcvUl/vms2jK6o7C/KpLdvJqtC09pbz74A9t24PPBYPnHHEjX5Eo5zK1wuo0bt0pnPie
fttXk3VI+SfxwwDUrbruNxdiDkkU8DApZc98BllSXqa5109qMsBF/vyE4oSCHM7s2ckT1mwgB7yy
jS4SxgfEa69Rmx1vAPfp2SDi7iHDr5dw8a25J+UITquCpwkwrnjbQFLZwI8t152Ic09OMfmLaPmS
o5bldE+nmayCDY7mUf5pLib994xt79oGHCJ/o1SNipWK0TOmoyEebiI1RGBhPTtmjjR8+GN9R3/i
2BdpMuEu8vOLM95hp587fWpLO6kPUh7v+MqcLRGFzEC14YQBLW45o0osaUDz3K5Ns2AtfeF68lRp
Fu9Ylm/s/Mi9j9VlBlmOc6I8bUMq87gyXOdG7BO7rQW3LDhaQeMY+gojDlJW+dPujQS4PDZuqICu
mq+tLXiU+bf1J+DwHNBcC5y+ujsZKsxPcwh1ZS0n6nGliPKSHbJBy9MPD7FyqsceAynZDXkeq+MD
QV/WtSCojlv4clYI0fqUxG5iXiV3DLu2a3+BTLYGD6Jsv57OQKD5VBDmzZ1yX6Bs9sirsQxMiZ4K
aRcwzvLcOCZBlOlYToi80DR3g/wXrgFhtL2PMol8/7aFJeDqmadybrt3Mv7GO4WQz8a1a5WAvBiF
TZKHSBhRD6FLFfYC4CgtNbmt0TszFBl1ThHtbpXSXcKn852DPDxmQfhv8xp66q60zuGAXyBLk0g5
dCP1Oa93EOcbItexCgeQWRqIGTEtev9hJs7Ux3u/t+ydiNQ8IsaaFHSS6GwqjiGaMYjp1aelB2Mc
cqAE812MeksTD7iGGriCZchuQ2I36X7joGD+4OuwFSekg3mOF0HqdMM9QEp+hnWyKoeUh9R7muxQ
/KuokD/daou/gFAIzXU7rcWuV5A3XUhrucK4VprscQZ1Kn17zSlnHSv2YSwcHIGgEEVdspTT3qrs
DyJidIDIUnGFkc+aYzucz9AEd792o0Gf9w+2vIlZ9/QsEsS7ZMtNMcfhRK0s+P/mq4cZFgjCQSJa
/C1RP8r5BYxnYqOauIWAJOCWKvcwqE2BDReE73f0BHIp60uJp4LFmsEyC+shJC477Tpcjkkx6RzZ
3FtakHZt0+2Cz6nTu1V5vP9IqdhflJARWl1Ggjt0Q/5ZUMW5FNi0xeDZv8mp2UyYvRX0HDPhB7BT
xcnZFRzRUbjPZXN8fyYGsirAPyVC9llRS2p5eQqqYSHc9LbdWH3BLun0eWTZBpCxUqZKUPhdBLAq
PawpXx2N2XFRpi9fU29aLQc8kLk4yndfqtfaz5CTUKfB9gCcb1fgP6fSOV5VS44fsGeKgufGoquE
weQV++PChr1Qklf6IWAYXS6T6Kkz0jJOWiTxt0/XsgedwyyzRj811ULcO795FBNDIeg2tgNgyRM0
tlzUWNZ6OdMOXcOVgnN09F8ILn3Z9pUOhnv8L+Xm9AcsDkD/6WfAqMvtT64yBUDfbMh8ovKnv5aM
Ry+ar+rAmcYgrh0fzVDBU0uxw1kAyMb61W8OBSVf8POtnsyBkkPp8VsIDHyNVJov4cdL/MUz0Czd
xasVxfVJvCSe+xlZ1yIgUSEQvX8FiLwzCKN8sfaQsdq3Ki0jytiybYtmkUSdtP4Kc/KgIhAIPwxx
59WzsX6iJAWLO2zRq/5DNpiwsweWitOPXqPxpXaIABxyckpFMe5eM994qRvDl4AxLI2bbvOTqyGr
MBDN5YgfkudS9bbiSjPMJjjPBT/aRrIiYWIwe97M9+i5bodRSHaNt95xcsIBE0fReKJXYTGT0mMe
SOKnc2GCHA5E9StR3yGIgYzRvOZ32seVQR//W9XhFgj188T9uz6mJoVy19xd/dc1qChG3UwB0fmp
GMFqAQvEzOrSUI+X6tuE7HK2lg5B4E/iEIdf8SyOdcQrhegvJj0fniR4VgWpfhJLVX+AixqykEQ6
/XlgftpOWjeDOyJyDHtutHWsJWtMq+7vRKVO3qW26A1JCnSPVhs5nTx/e9nvpGv9VNv46wMtZ/4j
WBKUwPsI4l4uzD9CQOgrjqsigiR9yd726zWue4JRES6yJ0BtOSxV6fk6/nBEbiM/EvcQgecRRzkx
nYTdEYaG81N72UbRLYDODi0JsmjFOsSf8dKu67ljptKDMUGOB0ZVzfZt4ePKmEcNxfFXplTU6VLo
iP4quje4CqS1a8AlnfRYrh0CclZgzoYbnLtA3jctKKcDzp1YyyMKiZH6I/NFogVl3ZK6SrlV9Jpi
D8YMPiP6fPzwDFYYo+o/Ql5QU6gITmgGALcg0Dy6poBii/ztFcprgYR2GZ1OkVmVBYaYCNmgrpx/
xgotBJ/VvqveQsFt6wJVp4psct4+6bvZ+e1b/syVodKtrzNSgLr/mU9muuMnf5C1v/k5y/14lbC3
EscG+71nggWnee1nOccCYPmX1OKyFUZ75GHYnOndCu+NIiyjsS9szCcfUHEKc9ZCdtjoHge2qeHq
jfRhFzLiqRp/Sn8JC7X0PiCabQAXowT0vIUGnfL6lWsvPBFXIGxvidq2h1dlJeDHXtuJUrAjiVEk
hSLe2r0ugCOq01hkDkP30TCV3smoaQ8cXv2+k2eowHSrn7ieNZ+sHehGFIhUpAdAv9OgnfqatcLK
nfZ8TgizHSHfQmQTHrEOAGXZMZul/+IGpuG7jSOZ5o+1U+tDl51zgDDCjlgOY0gcxG6VGACXwXVX
Agly8WvIwrArYZTOzTtuCdUdOWIwCQEbEfM4+6AzH8q/qwh2MfgmtGv/UJEPNqvW3J6Jx7jm605/
JUM6aETcd6ZvGQ8mTXrwXxQD7mFaxl8wfjjRRylXlIfQ+IvSW6u4aVAVqMO6Qw1Nx/PPPGUZ/LRI
0YvyU0HALvkH4ZJBIqX57OJhw5cctspTVriHMv7uPmLMpgN5Qw9Fzy0vjSN5bBFD0uocsdd/EKH0
5ptjYjMR1hewn8CP4qdVzF8gN1ADBKK8rPpU5U4/jTRJMihC7u+J+BC8hWMPJZr3uk3AAsix+FYf
NQxzP+yhsDLU95iTgpuDTznzWGvV1vo9UAD/qFsiWZTGXMRz+0UQKkg9Eqg8GPr4yb25pM7+PbIQ
yTk8PEeu5/mW1LlGpHB8HtJmolT1FJPq9l3P8lBbjK9cUg7SR88pjAiuU5+3hi/MDGjuLDXSW+ib
6PxbW8AQNjVgXL7wBKic3vA0EoBsthVMemxKBIfNNqW07rvGPVELvl/FDWXbo/QYWfOiVsdHAC85
KgzFtTRhhTpcU/A1h0XAPJopcsApy7ZplLbF759Y4nj3ndPoka18piXqOkpVb+8kT0BYI5g7YGPB
gm0Nzyymh4zck3pY/CIY5IK2QDnE6xNDI/uTiAwX+sWB2gyLfjgA5YdNVO3JE+tb8KIuGcWlzSO0
dMmUaJiuItgaydBq9/oVcvuUq7kxhBA0cPF0jzldXj3Lq6EVtH9YuQVUep9RhYqqLTvrfFlP2PJM
1RbrZHkTcUmA1FQR/aqXXiKGGDI0zfUB+/zGQpz5tHMqnLgSCafYM7t17hrggT1VTCoOFKTR5Ip4
awwwsJ/n41lch4G/M34T/bCqF79hpW2FtVg+sMZtXeO8G72H9LPZew8eVgk2d1pG+ANyOO8nl+pg
b12bm31i/Toh2bCUttLpALvziny2AXN4uqlj3BL8sbaDdPK6wjrVWXcRvwJgNIKzZws6MnDwhsKE
M7xfxoHDKl0Xv52ICBns06EHoPtITWwMYrusWVDJJz8xtz62yh/kRNl5YHemFOcHbqHE57NXelzl
sVUfsXXygyWui5eUxvoDMP+X8JzjhLSfissWE5JGRXN6gFD6pyl2afT/YWYgRK93vhzslgmASqck
6Rw2bLHtSzytWMEXuv7CN0CqC7EE75TJrnID3QaTZX2KEe7MXUGbrjUvWhyoYOdAoTKtBnhIKHWC
FES0xtms+UCUO1VbJGmI8VkBTh016I1rBqDxmECH4qpve8AKO9alb5/SKVGpCxT+IPF1Z6Dm5qjg
XOsKs78/2G+Ys/UsJACPmlwnuaYPwjJFGEVs2OBBz2Dpo03JOYjCppCKggKPq44fUO4e4OujWVFj
cDj2iSnY7Xnf9LKq6tOuf2WPRJ8xMz1sTJ/AnhdV6UoRumxwgmzYCh7AlNKmeokoP+HtOt1EWtBV
JxZptSqF1GKIzCF0mNHA6pK/maraeHnr80A13osfki3p8fGpcQvrIzEBiQ8/bywoP79xKCOu3fe8
8mzKZ/HPYN6/clFPfJFbeQRK0Z8QMnLHNfeWeb2xTo8MFritR1UpTder6hTQdVdqh20mTkiHpVIx
5Dh2IfuuHhiKtJMIGLa3CmSACtaWnYKDx9qC1QfQJJqH+6fHYDPo6mz5M9A/6Fx2io5hLjYaK2nr
OsovpmMi+5U3txmz/MEVXk5M+MD+GMx6bsB/WFo0BsWQtId6MOIFubJOIFfZy/fX39CVLS1h3blZ
gjxMhyDLhSZFvm5rWOOB4+Ti/eZDjMF6Iy4eUFZtB+TYbFpuovxnx6cW8JIpodkQZnFA3ktqSQjV
27ktIvqHj26892vgQ/T8bl0N9fyNm37mdvbfXWb7huV2Vf5FM0gzbV4YWb7vd0fytEPSgROVkVEH
Nlkb0Fn5xzbnZ6ZtUVT/o6OmazXl6ml1JaDHZyDbS3YocYB55WcgCLdm+l1mo5lYHVYnUDNih+Oz
EwK+bUn3pKyDj/4L8b+P0E01TxBA62iKJWT1/CstWnYEtPN7D8i4pK9kL4amaKxwVPx/SufumRga
QogDdD1PPRRGYUSnkR/5o51IMIEQA20k2JftTCoXA6LjvK91clZFvBro1/hj6K5TNk4SR0YwDo83
S5GQcrAU1SnYkdV0INg5HFsdbkUtyht3aAj/GfbozqWbM5AwKMoDxZFO1kOVue8w2JZGGKJ6B9Pd
Ms7vuWTGEFbIT8vGWVRtLvL8CnOieJcLDSL8CIpNN72od3pFCoSWZsu98e3n1LQXAChBivY2rpFb
MfGacR+Z7YFd71Xk1SeJ9hOItzsVLdr5ROHR19U0vRrBK7EN1QEG6moimu5E90GQT7fYKke5L0Mt
RWg06DaXn0xkU/kA5t2/dZYXEGHv/oEGTKqtje/bw4pAyn5FU8335AzK1pvfiUUL43vDmgrxKBjf
PXy3b9kal2P4SPgRPN8vsDCVzzcxE0sMR1baIpQqyW8IxcqhOI40CEPM515lnC5sqN1w/eEkHiU+
wgCN8Nby3PnDx5atIwWRGAALQO7wngehkRpl/KssqLrk1SQN34I+KlA0tHCKtBEYtZMYehDWEQ99
uriKGYXhcECAK9Gb1wiKEmN2QaUkGyBXHWZIwyvfP/IQPrIdTw8Rjt7pg3+OEaguTlUpPFtYW0hP
79yBJeB1mt70elptEPsEKIpr5outxV0qXqeoDXQMUCjSxc5j4OtGgpvr/enNa/pGci429JhR2V/M
3xm+gHUlAH23l1MV7sCppNtFQVe98/tPaY5K8T4SiHKBLy5W47Pqz7Vq6ICzd53ZbEznDf3EozlK
5OPcSX/JXQzi4BbBWgDOslTKc021+icq1dK/CYBjwTSGNEqYW50D53loZ3d1NLmBTE61zoTwLbTd
x4weIn2uVGLv5q1AnRHxTXwUUfTCyNxzCqovC1jIk3z7FiBlZ7LTPmfo0b6AhPvTNRvRL0xMWXn6
tDuKwuCygrAEti12LsNTR+FZrjvzEO5TNkyYyaBRweXnCkdYBlCXrdDOmP5lK+J2wFQzqxCOwSqC
3cbSXrAwXYFEDbH2nbIgIvDw60/Klu2204acK7bSDXIDEWSTXTMr0gzOn+DZvUTARqPSI6Jyu7Do
0dTH2psll+JuLcXray75KmV0UoaxNd2PCPDiMvBAyqcAqSkgdBHDin87jbdVkQ8+G5AsgoktRyr1
OBfomWJzQeo327tX58ghdWrpY1E6uNePiV84cYf0Dpd+SbUK0rqDS8ipdWKsqDKVhhDqfAaVNYyZ
NLr5nDh9DQoxr1WmsxOqGJVvgv99pMdQgNA9osPXJOCF+WFx9phNmsWoxQjR1ucYjDX9lMIE8IQp
LJNFVO8Nh49ZWcOOmLOAGBkdfqICnEtfzJWmCoMSJjKm3jHdsIvMabVdlbqtuz7Ge+A7f6dOtkv4
DLyEQvrJGibopVduDYNOdnEk2oHyGYzySRBjKy3qWGBhz4WtIw3tvIl++eqSZ69mX908RpdQcwKt
xcGiK7x5faSOUA5CO+tc/Qiu6EHooznuPj55HG+Vwbvqn4QmYbf98DJNtXVxnumW2UEsbBhs8ee6
YSNRprXovId5YemKh6REGOds1Uo0x6FaeBbeMZTwURj5N7JeFwNJKo3iQZ4Tjh1e95S0vJcWIEyI
db4nFuI4GfGC034p/MvuWmpv1wTS8lY0Gl2dDNK8uak38v0daIB1bDre0tgTrQc8AHEcjZD1iCcf
lrN+BN+S+5pkqCd3oFZHK+Wub3ei2g+uRwro1Jw4DSPyLIWSul4GvMwaw1S6aZTRud1y2829evDv
PqN4mwLoJBAeD0AEUH6KVkBitTkFFL5ZrMUzcadkTnuUhWunm5L1LlcKpCOdfPq1hhAv1ck54PT4
FTckCMslRD9RTGdYjVLM9SCaTyvNmBQj56VjNEbYbNjc9wuBSBsCjAj8HTeKH6oejbsy6XNhf9Tq
yjRVIkoU+CuYQ9HEnhp9Eju5wPlCOydzGdd7dpaZCh390DV143D45iwBr0aifFclOKPIA68ZHZgW
4Gxj3OcQ/sVIeFtnWXBmgGofpEmZavuGIMhoVEqJZX24kiHihzpFdpPofXttrnGk1pJ1nVc6t4MN
cX83dhr9y1dBJ5k5HrzVKuGrzUxGp4Dlmmd99E1XgykJVp1ByLFxE2HCcvVdU5u+fUB5u80hGiYo
rglScRY+kehQT0/jn3J90T7aE4yyJ/zqMQ6KhlkpCt2U0vHagTxzv2BIez5y/70sLziigWgcQA3y
2GF0ynyRR8TpBI1QqUESL3GE7wzZhDYG7bbvlJHWRuWKTcC3UUxOhCSkQ+0OyM3oNnLuJiNl7cw3
x5yLbnvaZQkJ17x3x5mKYt3eVsWN+dKTRz1mnUfbKwQ7LaNeVbp9mJnxLnH2oSNnOECOpJftwmg5
tPYtl4YAY7nq5g+DaqFdE/RmJMgd3k41smrRTxQuBgKCjJx/f0Zzp29jDyiiUzByyT/RZ+BPkMBl
NEDfeCek0Bo2a3bsOMgu45EdTJtR9v0RERABfHczxLfIy/yP32tMnlQyQxtU4pnZEIOOqU/jkKjc
L9zKMI1ldB/KwTsq/hCRNm3wAQSkE2mwk3BATytB4aQE18dhfEuIO+8BM0O73fCGW4eW1gdfd8K2
dkULDVQ2ZbmR+uJC4BtL+EyY/8Zn82DukMw2TZaKmDKkE1ygKxLJsbTinhm88I1i/ZZaRVl6LcWR
28e3exJqs+EeO5+oV2BAjv5dVrhqHVQW8BMwsovJM4KtdtAiwGZV6DI8E+EFwZ2aYsVqZ8Z0tcVh
RtWLzN1Z8jPAzPiNK6CuA5vFjItYwup6aECVrZjnQGkoNTRx/T0FjKkDeYn08yvrMUcosWRrH1bW
SAcnywzItLb1hHU2MoHU0fJpJnWGxF8ptS714tDfZoz03dzcbk1v3sN5M/ghIkvp161vi9Ehu0cQ
dR32Bo3GZ/R5gc/lx+3mEYfY9oE3vbGrGzKJAm5J20BofCuZ2OvSy2kAQVoeJoTmkz1Ssbh/JT3Y
81kjmlhH8IHwdq3Fwpj0UHBMuX3VDFMn0g8rancv8JxPvZ0J0rTz+2YjIbSHl8QBgN8bY4oClf/u
j92QEOVE/ag3GSOxje55N+6QjihrlojVZbkHvcR6GwOtv+wxIGTgtm+U3nb/PFmQ1bRQblZ/7+Yg
GvYdcS0rzzzm3qd1c8PzBUs9A8UMpy8zeT0IKENVcYM2VmuNuX4ev3+RgEToAL8bGrfM6h5Ye1cs
RjzW/DB+kTbdxUq4dqvNqNfz2lq2ucljZ2xprDLaWns+p3+EMO5gDAgcTGDWLPqU8beWUtA+kSFS
dItBSPrFxj07Om9/seSns992YyaETSIyTANx8f9d33e0NJNVT0MZAurkgESExO+PGMVqtIz1d4Xf
gVo4dggl+ZZHa4Qp2tVkOtY4cxzXSG1688iL6PdnPxn4jzKN9qSkOe6weZc+dJFeH70+xwV3a9hu
o2oH0Fedco4pY44TfFPB1v6TL53Hbs7VjeBKjCRZ/hfe6GqmE8HctYT56dNuF8PqlpdQ+lLtMK1S
aE134p38OYR1a71qwcnuGP6TpJMqZ132q3m6dX00roYLpVvACu4LR/rwiYHTUt32c3pSFDEImRFX
vEYkbt6qiuk1l4sVBDW873/KZaXFXH1HLZlbgzFtmD/XJgp5l/LASIigg7rvPK/gjxjpXAW0og07
R1wtbn49UJsPcK4fRyhsfqqGORfNlGEYX3BFc8sN4VxE6zq6Uib8tkC/LwLS6tPviHLt4h5E5t8Z
d2iPmnN3RwZkYSaLtki5blKC23FxH+WdkpehB61uwzcAeTLF6H7+bNVzbX9MMkK+XV+Oo5ThQK+U
suZSG5PyKdIGMhEao/YCi9BgXo9vyXjLc6PnFThvQ8JUtZV8CkpN63nC4bI7FB8Pt/HDjgCzxE7M
NbtHBgZsKcekkiqp9pxu2AIZuUZvt8bputIOeNfjolwE0EDk/9pAP5L4SikR8eRUzHrM+l7vAFY0
LFfCdmC57nPiZfiV9KpEm6VqrBmMs/hpeQMwSnO3AqOeYw2dwstvUuGH7AiuDxbVihuXkl1WxiMx
sSdOmaLmVzCNk2fNnWy0BhkBf5BDTl2EqVpoiY1aP6UZ1q78a9pVqIgtZ05p0+y7GFNBwNY8/yUL
oBeFRR9sGTArPnYH4vzETTU3cRvICA947LZ7+QVnDbYIEygzGsNIfV4+TnvPoj+SrI8T3ivCPcRO
HMYGi9mqKnGBhzYtCdZxs3ep5nUUSw1peEN+cyARjL6qtnT+gLqblvHiKkOimYCRuvWWmW9ubUaS
f1uTQlxfq69Oe38/zqqgYbN3/tZGQMB1Oar1NJhhRmbjZwOJGhMz4BfxbZBzqTycu+gtQqGFl+5Q
UbiJcQq7/MWSB5U5WqtMJDdBfj2jpk1z5sH3qVV7lEx3jSqrzG5h2Bp/J+4QQx1IAMbV7eL33wQO
MkTBZ7frFurJe0obJpBsIlYZ43i8CBU/z7M/WjZ7YT0bPjgWRi7lC9JaUQkZnAHE4ObZ+i/g8scY
y3qDFVTqDPlWtegNgy/Ocin6hQZUJ/IHG2wecmNtidzX6PRFTw9TXaOl2x6gZQaavuqKxyVHDUOz
DoV24ZT2K7QbampSwsTWh/XabWSTBVNDL9q+A2zMEDSN2pqHGeZCFYXGFpL+ogEf1fc5F0jg94SH
73bnWuaBQQtAxMcbQvp6fUBFwtHRTWzr81NW1VFfRz/ds4/jN3Ye2PN35SHdhr0ina8eTHeDvCWX
WD4LUtRRZUopm+c2wXOY9fYjcTHtW0avOhy3BVi6+GaIsgEAAFAVqUJfEVvIW9Pw6vEpGNrAvKiZ
ubMCy8tsdNv/pgaCeYtVCYlZP5GhpZK2wHfSayed3DuZFcy4FpnlZDzhGU9KGDeKrwxXtjnyW9tu
t+3Ms0NXteccmWrAW608NjeGnFJBYI/f2rZXHy+Dm9zuDKs9erznFHxAyw3qyToQHKGRDExsBRJn
wuBgIkAEeoMVcQGC/9NZ2tKBTpeTBH9SOemyqtwEHgP8C6gqSLEvm+9UgrkgFuS22a2KQsZm6Vuk
AECt7/gzQwXVCia/GS8DYsBQYf9yho7o0eSDxhpVcET2RfCSXMzTcCxipKPg6flGYY1aUrz/+qJh
PtgsHK60ieheoqknVLLtyFDK/qQQ2m8AoJzOrhVqU+cnmrpC/yRaD+nu8o++sSdxQf70FI4n9xoT
8uL1U5JgCl9kbQcxu5K86Uql7q2EthppkRw9iaTHzTjGI6o4oMTugVZDaHzoUcil7wfZhZ2qtIl3
MyWcUqKuQNo36lxXr0g5uFafLLNEGGOIzu4M2n7Iq78pDZz4Ct4z+Jb7I1Pl7TZHQVwysSeV8n6C
kEU0wLun3cjEqku9YxdrppDT7Lkl7zzW2mN4pggtkt9RROq6cs8i3Icod9E9kd8nkBd8dWCPPn6O
fiSp28SZ+96X/J58bUeN55D7yTEu0bbL0O8F0QrOJjViQMJ+PFUfgp5D6Z4dXDMLDUEZ4ZlE/TKK
aDEi7Hg3iF7PqifhR5k26FyoiPKR5tKbFxDZ3mAIjYU6dvC8LlP3ta6sjnKMOEB14s0fs0NDdH5f
6rtcQaOYb4gNBAxTWZ6eHA6qO1y6qKLd1UPwIGZ15YIbwTq4GRiKj/RkoU5b00nLI4PGtzQJ1cCk
R3XRLDO6vlQgh+fSRMDyxzJDfQLnKAlaivaNzSRvrrLEfQ7kbfKoCiRFE1iVQNVYKcCjqMer+AXK
7PaWb5a0RRdVlCo0+uI5yGzFPN4/TVQK4ZqisvExIbf/kui3zVr8PZWy6jwVfC+OFdIDVMp0rc7c
96sfYSd2pBB8TqO0lYvq8cjGDal53LTqHDabD15NRBgaiYqTF5hsrqrabl4ouDuMpv20GUySkVY1
vJ5aiHthYyWY+dHaA3j4HktgKhhtX6rdcWy3sB0Tvdh+QLRvz/RxWp/CPKKEPJZokI/yqFNv+GNq
B1L65UuzPXPIwQ5wTSs1YIX/2J+mj6n63n7V8mDYirBCT7oQnemDuo/w87ByMa6t0xj3cr29Nnwa
IKKL+a1QSq0LGFBvOKQI6Osde4lhKERfdNd/fRYWnoSHf0TVO6hWTgnKRQIPR/4b8BNssSbKFLfF
kS3q9uJzBB4fcIdb3JPxq8kQjRfpit7fh1VRykdCBvfpqCjbg+SSNGCIu5tQLAo1w9VEHrTApVEi
+NzI2qKvyMksofv2/ZOr7bXQBiLgFUVKBFf1SuCsKMQttOy5+XrC9tts5jVSq//nE3IgLtZ0006V
0GQ3qm7/5hOF95twgUIJksZU3uIHtNl5s/xSjjUSmOqiMVCx1bDOvTvJ1mNX2L/4UPZKSFhdP6Vo
RNCa5a7wVQYnjUA91u329rpTB01EZKCR3BprnF0X1higmMytHcR4KhCWcRT0OnFA4MHvzJ9kVPu/
ePbm0ChNkLk5fqzGcRZxdKZrtQJTMstNtH6BPTKKsVs49PG7caRWw1cGgtuKrooPJRumWcQ0P5nn
lrcGHWolBIsYSkQQliXA2cP4zanHK6PilydWzv3TG/9RFUrJ+da8UiZ5qsfFWITLuLC0U/SV0wMR
dTlEqJ0zIhArnFeh8RmRE1kHn0WWRogSCz4rQs+OuuvwPs36Z9K3I7lleusKIn6YJRA7HdmHns/P
YbVJbSvq9Clwk4iBn8WoEoi6Ody87AE5RI1F4w8nAnCRubuh7Ks8PRzZPZrEv8D1qPGrgK8HNQxO
hhBpQbhybRNzwsx7dmIsmB/MY/eHzwnhxoXLIh/b2UIljM0dBDw5AraZ7M3FedXrZInR5p3weC9P
NKV+Rf2fHSynOMEgmmZYs6TSL4do9uJ8mWhqWCBjlKDloZUPoowgzIR5p/HU/AclwFZRIkNmjEZA
VniWtDVYqgI5GyjsxxWY03ze7zRS+MCYxRUY1NFETfRriE5l5W+vkj0CyoiskAT1E6gdAgr6BGfR
KFy4JFzAOCrwxN1LlWDynTWH3tsli65Bb/fWNpX649+91bf0Ly4TsWCqes2AuMstmaK1YrX0dSCG
5HqPsHSjUDaFR9i5i4fSGdGFtwknxKZUgWy45st0GNdwpjNERR4kMTMBbRhiwgBzDH7WzhgSXP3n
i/rkNAVI+HFoBUJU5kZ8PVGD4fbUZSGF1wz2L82zL+ln45s7leSKDgVp4fmCVZIX0FiHOE1drhB/
Ap58yr/G1J1ey/A+ui23rDhEg5ZiDxD7IBAhLKnDPtMEdeJ2J3MWSTf87Ndn+kZDqCXcpoQkxdrN
j++/VSm0fWBUKXfsBlIv80O2MDjzlHM5OLUW6c3hAqyzp95k6pL2HPYF9TgcpIwe1WKd8Nv6ywnn
WFZLORIYZlYAW0tKz6OBSCO0SkEtu0pD4x7H+LmalAXJhm9vBNeG9zlWmADH06PiY+BdFOtP/bFO
zYZsHroQoApu7kLm7uLHsv1GSrw4VukwjSm3rmiggq8cZFCtRiO8avg6h7x4Aq41jrx8eOal9Zvz
fCMzekMFnwxSPalc7yEZiA7Z2X22bNqOoFdPsPhbWTdQJMBcIS4Snfe8Qr2zDVlH8+Lqb6IPFHAO
IyF7cw5sgx/tIf8lP9be17Cd6B+2Gi8NKzgRAP7Ux3xlZMi37XbzTcO1USPY3+JBUr9WRguYdbeN
QuTnGJmqDbelOp7U1c+SELV3kEEbjhyrOt/Ptho/uNx4c4lbAJQ197QGYFmyPx/Ctj6+I0k4gwar
DkE5lbO52iE0wkkVac+GX5+TIMj5FTvHhm0TTJwc2n2W+nV2D3wPhZSBq+k7R14me0Dscio8XTua
kXXpblAoDGcOxXJ9ICKX/CuEHPhX7HkjLMmEXi9h+0FaXJsRv7hub8oHuMXNIYmuHUDjSCyI7KuR
cIawmQ+7djQ/y0jkvtvEFdUMUIHz+sdSfMN/fsIrF4aa9ASimMzxWPYxOlVCmHaN1YDzus7yHBZ6
3EZA2Ggz0pQeSPMllnGoJzaVm0ZQ52xPd2OG/wWohleR2DyWXpOQkmitgOJd0zVjCXSplZwjkuSD
kAXyqqFGfyiPKwVsXxpBBoYvEMjrtcUBKPKLhhLp9VdPBo7Vj8QPjcQImko683kRFzFy8rmBG2IA
gxRi113cIfUOfoyySzjTLShQFgRaUZCUK2MfiKVVuO4rZPsyWW3lruT6veEkwL7N+S+zt3t0XNW6
33cYHPzGkUjsrQK+r/WOsRuUZ7pHyReT+b5DrFTwyELQ6bPGQG0n6UAjhQgp1h0jLIzuOnFwLT6F
U21AGTOvrAt3Rp7T90hDSx8wIqowS/03+vEOMdWQbBPG7syRJBN2EnU5WHHcv+AVz6Fx42mR8mA7
NqPxymy7oX5ju3/xrI7+U4/GVKdiwUBenbaGTW4WfD0Lfg7X9sXWGB0G2XP5rSzFND7Xpj00bfdC
QvAkleOSZptD9qSppzOlABmH+iTKsG6LoBKbDb8GpZGVrKaZpLXHqKBCuvPrS8ykTQDZyMrzuPxo
aDFpUQjxR8ZnPtHiDaa/Ope+GphobpID2Ffli0JcPxjIFgXWbPgieLWGQ1rslFkozas07zBsl3gi
cToiJuXhjarnf6FVT4P4TJrUe4X16+vhm6ETZGQ56QmKGma1HI3F4S2jAhcWCXP3L5lzPwjR5WZ3
7C7Bz17Mvn4l0MgyXgQeEMZAUzDpXnUKUOY+JYlZUdZbXiwLvAa/UWsUKHu/OihOgPgZMxzcrJir
yYgttfV1Oq+ZMmBE4Bbt0UJ7FbodYWr/d0ePyGKijdQ1wWwRyFXckEg35tX3qfZ3yO4iCF+0ZRyl
cbueQG2c8M7hNdKANCtFaKggj0CfvIQuJSkIFa7gkFhgqr2XdX+lxMsZTS99e9UHLUo+pCLuyJhq
O1PNBPX+fiBHRvqDZh6HSgGjx3quN3rBwZ342e/hbxJi8uXptOYF/6BZuTunlw7sL1uvFQhjmH0r
yXOL18GVNBvejirh93RJ5YONPjAbL5UH4FFCNb/cNstMqmoPgNz6M3awIWSCTd0zCy5ufWq2RScI
dS6DGYX6aqL4fpD0W227596fqkjiL5zuKjJqp1chkxPIoHUxx4rldqTu3qsCqzT+ngsel/540z8q
n3JG1cki0MqZ3QBpgv+TjQxBte3hHA8Se0TNsOydvTIqSPLHeFXq2W4DLfr+ZXZc+6qmimXzVwnX
xJeOGi+RXI9TGyAoio3poR51TvJXCxwJPx/ygFCaGw08lv+smaKHZllR2dcm0IVqgd9waa3b/UlH
EDMBt3TPFqrp/jdZPdKBZTBL/DFJ/1pgjxhKNjq6J7j5L459pVTT7cQqKWu3ON5KmE7IDOl7jmYE
KvfSYW1XtPQU7BUq1JIFpptOcn1ZZpYFSOP/Ic/qLNCGAf3zLOEusAQ6isVoigOr31oDJaC+zWq/
oPdiM/+pdYiAx0c+1RFKl4OkGBULlpMenXwnWoGj39IZ3p3wC96tN9QD9j5o/JOSNLd1UvWk0VJv
fOV5Lm1PDGV96oBc24t8lzX9zahyuJ/O7Zx4z4kb3gc52CC6jCc00V0ZUSt+7G7HPiZsvUVMZh/0
iBdVloRQz/7WDxzGOtiWVQs8o3VS5mhpbSZIpX6F30KQ3y3Db9uRCPbI7xEu+xTMyD7oyAHuc1M3
Z3sGhhPC2RA9/HMz/kiArUnSTtBEDfaadrcR57JlIMqaFS3aZu9N52I9ft3KdD1AuzCljwVWhqhX
EzloloQbyV3QaPprLeUost4D1mp88Vna8zKOtVcUL0bTbADVUr+t6CQgTqThzw2YqefSzK8zh5mV
KTg6eniyPZ1hG7y9bhN2FfR2QHhoVminLNkZtpvQM4HSNO9wT/Wg/E0q5BnOMkjv68I5i5cCjoz9
oz3mCCKlbMnpuV/o2I1jDE6FIWcfCEt5uTmznrZUvxCMfo2mBeGnmpm1MjV7cJ8OzjZ2WwfouS38
bMrYMtbK4RUVUq6AK63wzEK2KQDQbJI9J5HMwjrNawXxHTDMBQWgibeOeWYKa/ih+fRW5F0jSrGD
22eFZ6yTWEGKzMTefIpsDJavL+naCanIJ8Fh4lr8ONy7GKlWzqPyf8JrCG0iEwAT1w2vWoPdq104
NE6QeA0x6oZ77VvvLZQgdryFUJu3qdJzpxv0elEWuWogjty80UDRIbMfVunViV3eC0FK/oGpV89H
4Ldn7YdeRLKrcM1nd+2zIW0xeuDKxORmazBtEuuHwOQ5WOg0DIaav1o6Ga70jud9KF1PkdhAVGQR
KOjgKJ9+0nCeztgII73m1GUldqj7qHu8TIGgoWWsTXKml8smx3XdnTPbAM7ciFYO/1V9fzCzdVRu
4eXQLzFWg8+16Jec1yXZmOQtSxtjWyeXeaoLXIPYZ+1RSHQarKf+Jlr7P42V6JhQTezdcxWWtvIm
Vl/qWaatEDApaZImJm6yVB2V43HqMaqD58e84WucuSFpmxaU/a4dEFMepLqo/40G4yIpqKvU0EKU
O9OCDPhzW83ayXoM9520dP/bRYoGrlCJOMnPTxjVLddSmIkLkafhQWcrqS9Mvew/r0bRGmujk659
iRn7SU1/iPVzTkW5kCnjcOeuBaDGhu7buqnZ6YO6ZAda14eku5cJnEr/ej5n3aRkfduKItQ9RqCU
Bp2IAjS4K+3SjFcXjG4FrZfmjFy8nCEsDV40yiVFEILlMI3XGToT+JKM3RLky4/3qyRxqwoC2q56
AZJzhW67YBv7Nn/U40SsQ1M4h9ftUzQnOffNM37oEjuCzKc5GrFP6qMKSELxqZs6NEyHoGkHKkdr
KX388EoFbu1Dwq/n7OXMfvJIP42dsFqKnLRefi8ujmT+C504azHzmfMYHu9sJAXJU5C9dTbZQbHC
U/EXowdTv3Z0Qzk/Ct0rTv8HnygmUl3m9SwFhdx7QgDAr0WwPCGqeJCFBUTMwB7vxJoyFNQDgpKE
06DOdszSGaFhTLktKUM0MM4w8hklbf+U/B6KCIuj17WCJ7ihwrcGo02lwOMmQgGCneQhjMJw/pHM
j/x5/Sc73Uz07F/7GfPvonRfgGF8uMsNIonfiALcDCqeAlT7Vnkh92QafxdLrvjprWDyMbO2RQaA
y15afp3Wng3+k9WLEXJRAQuUwtxindJAglOQkK0GoaeJOMeqB39yzDFWvTIfsQ3QAsvTw1jMb9rK
/ncvA3euR2Zq3KDz1YeVs97GiYG03RXgoFBVA+1+smmO9lJG8mDVruI4WsPtenS3/VYSGd8dLDub
1xGQNOwm/rI9YR1kUdHPBjKAVDsG5pAXgLVlozlbVAlK2WsD2jNJf1v+zCTl5QIWaiHX4u95Zln9
x9dTkpnDf6cqVT57Jv73Ib5DMiLjNVGHunsrvXFcGrhAAjEcjuE/yYrWn4USnajcK2tmE74pS1vO
XTGyzTU8JETpgdh7bOo1LxzcaUTKL8cMATNbAxfYt+kY9/Nj66JNhj/wHi+aPpursJFnCU2CjiZ0
C/WMxN+Cpl5XgX7iA4W8HXTbT37JMXe2lvKU5CNdXNHzov1WLNQpcxHepCAd5gT1W2hIH5IGLw8U
V6YgsoeUMg3+BelSxDfoBSkbWK8GfLSWR72uJoFfbynD6pgtmyYlLOVYypP6H4XhNmCZyZe7Szq6
cF2Bdhiv5PBieJBKmBSz7DwiOUPL3cAZCAQpkoE5zSagRPDJVKzOhatGA4O2d//Iddrjo7qKPz8z
06XtFQ5EPYj2qqAsqf1yemu30owSJy8/ZlLds6clhABTtbVz6OSotRPdq48CFQq94noxSGUXjUfV
YVcIvLIVyn7yw19SO8JFkOirt4+GH2fwHKxn4sX2B1adx2f7YlqbWpjzoQhasINDRCf6+4bBzNBM
4DrwUEc7bHJfwzeY1f+K/4/0NIYDo/EJgzgnzu3FM6uCTUmS2xw3lfbWtHQtjpitfb8maVMq04rY
pdGoL3cmugt+PpS0lIIeC733JOYKGwI/uGIIFtoxd3F1RxeqHwTijcPpHS+ud4f6Dyw9czZ3rwNb
kzpCwb+It4jgOfaE62/ZMBtmKG76olrVXqbUk7yEMqEmRUdSmQ+5gr76e/3vmiZ0xt+1njkj72p9
I9RnHwCouuNx4zZSJTWjONxOb6hDR+J2YW+1gUI6xJuOAGDDaudnDXYIcu43TYX8nRvT5TBCwHtQ
nqZySHRYfmxS7E+Hu+LrtvNHxR8EuYf11vg8wb/xO4Ytxz+pYBd96AV7DM+5htwgnIByQiMxlI20
FxhGW+z2tHEfhCvSALr/IzyyTwVSTdxoEGmoeAqV3tE7Tq3nUYF8KLrfOIjm2E+A8okM7EJuKbFi
/1vNyAW/NmO2Vz2c18sntTc8yypm+d9nEghKLJQfTWtTyrhZYAl1OTvXQqeWIJo3YUclM8XHp/Fe
wlFmHZZ8n3HNKBWajO1v1+BO4VD9lZ/0WjGNyvcmoZN/7nzAz2dWJGTZGy9Fm4IIj2afNP9c+W/z
n+yQRt7jKyf/JOHK+Danc3JIu9YF8e4n3mNxthHhkTciSfQ02zA/LuYlPm94k3Dl3vqBuLxtUwgu
SHHJ4o5vGwVQpjDOrB8lODCtPWMb+afirFMSEwAK9IPU7QmpG1qkh45kuJ87KUTc07jU+8wzA15u
383G/t9gDA3Ecfch2tP3rgoV/hx55HrbebYerGz5lsErxdC5lIiJUL7DJN/HsX/46ClQC0oYBQkU
pagxW+Kc4Rec7qc8iLjNmDjs6j+d5HOGQSAjFlJnAuG4j15VLQUHsuU/UiuToYkDukYm3A9F/U5I
D6jfWWLQLA6acmdNcRlQlA8ppYAalPA7imcNCx+Qs59M8gVkG5s8qrPgt3o06tR7CWY7OV5oqaAm
45ERM2sFLD+SjeYdD11P7X4/kwFoO0Knh04rtAhD8n0LDHPlQ5qhOVFz0uKsTg/vWAfcfYh1Q5YQ
JvHApWaGkdBcPvN4rJRsYUwF9vl7EOz+/P2mTUbCP3vwUxPd+72o3iqq7Dh4u/oC9ylByyX0MYBd
Tt9uRFfWOzUdtteSu17yicAKylZPQwuVosRuA3afPtkWT+cih6NSpJYg39FNP8SUa9GFJdg5HOqu
OCvOtrl8gfkHddmHtvxtjC0vGdKiUs6lPxzIEQox6mNZgzMfMeGWmXmw0FrFv0yYG2sP+iYg7XE6
TSF1LQCg3zJQMGIqAkC0zdTfPnLl/Qf7fudR0qZdm5KCnztOAfMS3BcChtaofLH1RFpCeqQOEByl
NDJRCP4LM+mJ51pXJgRaZYrph9C6iFK3MwPvVNfK9rzR1Fu/4DoACUqaN17RmwYOZuDtFebFCGlw
X3noWEURDVAbyS/WYtbVdLp77mT2euMD7OfhBk7Mst+cbvhfKJm3pnl0hK0keKthnwP9q17GG93q
wQN9BTNHvipWd/GUh1ytE98bkg21Wjb//0Ebenj6sSIqGWG14aBur7iSgbzAMR6KvzSjlLDoq9qD
A+JEan3Zvu+VybjCin9cjntT1OXJQ5hpAD+4VbbhavhvS8aFjHOJci+PGzwdi3mD4FFOCCROzaAG
1AqI/ZwMd0zId+8FBEqtTMSgM/By48D1x+Hju09H1QMknfIJ3shsj+w/c/FAkidaPOSgO1lBm+pw
UH/qc3HYuh86THPAPDlSoJBWgB5HlOPJxAmf5MyZ3uE/w4T9Fko/L3va/l7HnXRteh9WBZtpqStT
9QD6Bvn816L+PwnO8jS8RA/HF9sWVB2yMMRRTb5iAb60WSnlQEsKHYJ2hXK6YVJG4CV/yo0zB0ow
FUKdFMoYDLDJzyVPVTEsxHvkpGb9Q5bZ/VwsSpfjEIE/Lyecc0JWzf4AsSozDELvdk1651RpMLqD
FBaQ2SBTD0StyYXjbD7AE1w4YzHPBwGzcFlXK/RuV0zVe+oJv+dEa3YeFZDUVc0K+uHzVwSwvx7M
VF2YGjzTcxhoouCPEV2tXG5U9MB3P8rpRndwTBgOYBW5+d7yTnkcRS174hhjA3yJsIf7/qiz7q4w
nBErTraRCrl/YpoJMHsOqP7X/wA3jvMx9wiut+22uSGJtmA1TMVZvcwy4yms0nmhwR3CFf07zL8q
HxQ7c6pPOHitYhdZi7aROiV8jDtJpw80vvadYY2CmYr3u5Ml95eFKeHy9aTtyl39IDp9Pn86Xvg3
Zcb2lTp/5jMRd8LGQemaor9nVyhJ3QPWGBtgQh8E4dYVGJTOkvqKgRcx2yoXOCEbrA+3gZjVIWe7
Qd4WBuPfRDI7peFcwslBdb7hvNAhaMRMpe8yTzpmEHLDBwrvIsn8vcFj2MDTg56W1qN55RbUNgR6
bF5utTNXMEEc/Bzzie6sXq+XhWDx03LGGZr/a7Ec6bkeUt+/flJBcEXy4JFvQBWZ9J24ZqljawKQ
cgvkpcxDBsno4jIJx2J4l0SOmwlkKqo2L3SNNbxgwDoaUybgoUYyD3jpQM4u6cV60jrWicGI6w7m
9fbWeXB0Yv9XiJO1IyG+Boku+92Wstdmv+PDl78PNAvSHFCWqgCYCshW9qaJDHyyjwQtTlrdooPj
Y3viTi7KFL/Cu0meRWi/rUmHMhK7F5I7gGLXwygclz71tlZG8jsNZQBMhCVkAUOpEvRS7q9NnFLe
nHVD8W86XOy7NlAtxLVpSk5f7eQTqn/79d9d5OEDOuw7yDdd58UizcvjgiFNYLXvU1XcyWHDvINm
abj3V333yVETtW4ZRdjMVgfh6koV/jZmaZPNkkDnKz8asHNyJoOGfEACxdFW9sdfWFRNeoQZvm5X
VJ+n2QNenIxpAVNp+06Pz9w4UjHU/Gwp943khX10dkYTtx1RaIvV2EZvkKkaw5K+sJrCSRKIFTL+
sWSoA+78kynqEw8rZd1RA4opERZdqYN2I2VMoV4kEY4CV1x4eEy6cPpejUCVq5hycQb8+4qIbvoX
k0bfg9T50Ae8NZpO7/o6Onymo7DeUimckN73QY5TVc7ryG9qZkTabDyshicu1OWCPSH+OE/Rfly1
swli05aNDlPOKxVsjM0DzbZyvpT4HgFKJHmg0+uLMKYygpxnQifBJBAIMl74n0LrWTZsJicoU/rG
pUTlxZ58RxsNUKwv1aOWDIzRxxAjSVbBD30zOCg87WcW+JB3vqAdJ/QDxj1iyu7dk6iHrKg4opcw
MXuveKPXc+D2w/Omynhl3v38ujhcOFOnGUOSJzMHMxtwMQIO2nWW/nDSJgsZZDsRkjH1l+W+MsqN
rMFsmbVSVUxue88KQJIJQ7FNCKTLd4KeQt0pR35PgTulos2ii7meKCnTCSlQ3lxJ8BQIxqRkOFc/
GXh0ynjsXuKKB5bEpt2ATLuW/NK2CZkn3ZRnlgwthMnjliArZqHkxbmVhlanNeBCF4jCV6k7o98I
q28pcB+lFYY9+kbr/6VRqCo5j5nUS28qOXaj9v0K6FXa8DRrjW57N/VV/W0/ckrwM0tjN/liHpyu
RtFx+Z9nooT/6BgzducgorLTUjPgPVFt1apoSRYYMWE5OI6m3yM1C0PKSh0zN1UJFWcJSdkOtdiJ
bfvggt+9gtXcwhQJQvfp+I8yd13qkDozzd7nqvC0GC/Rfnd1n2m2oBfek+fGN5/GiZr5NkUBK9iD
ASifZ+q3dFQkyjWbfDQLzT+Z/IsPw0jERHgdUGmP5kJ6EibYtZXPq+05bFfG7+QfQr3fF/kXhBlF
+ZtQgeHJITnzzP6ic1ULuOV2PDgvdOXhVRPILJHk94t+55sza3q/UDWHz1qfZcerhuCYh4MfCrzr
RZQ38KVOjV1OVfpIvvgq3YSggvj7Q12YmVp9w+dJrE0l+lM3CeER2nKDVyBgs+1fKnY7QLvvQ/ou
E9K+Je76VMoipv1OLMtYtVesyGzp78krj1L3xfCbGCxpJ66AIC/prZVhOYK5QjRIzQgoJRkcTDGO
fAEs0GkclgfDguCqzQuVw/n7/5uL/3Yf6Zf1uMosE5lFBqXxiqAavQ6LOqdBH7pzT+DSlYXve7b9
TA3LSP1pQl8nzbJX4pOkZogzpycAH9bi3TJZIClxstjWALU8/WMfWrQBZO0dTnQBE353lfs8mIwO
uPfr8ibKPxJ+bInO5tE1myEe7HdVzDZdQRFbl97dpy1wY6hkfJdxu5kvFacDb8z2wkWtMt6qwmVl
TushWWsS68CK8Lgy+6rSpt10I9OjYRpg7eluKRuBXA7ZvVILe0qvRnajXkLMy+le98Mw7m9hSTKE
4Noiak4P/gQZQiKWU7b1kp4HavS4mS2lcQFuGlX2nK3doTIWeJ4JZqc71otjIFn3BFPAwoyeGjjO
uES6DYijyIDCfRJT4wybvHTBhZp1+VHkKmsXoj1TLwKs6TafQTvCyWjwg3toTgp1ZkO6QOAoTpYx
vcS0audeRrxJJFNB8hqtg1aYvf+V9QoxbLloN+gbBLwveVcwmegr7xg3IRivsji0I1KS6EHUTjlB
fi3fTto5JR9RSo8NDDLNkeuqml7+8FmPC8rjwxfYOBlDK67cYP+nYxeDOENvntDQ2TUSYslSZXY3
k3sQo1jLD6/77dDbScSgKSEqK2nbnpiLfQJUDnzKELvTe+QCvzs6ORIykOZNq4rvImTeBFFePtYv
0aamy2qNHkJOW4jwCsvYmtG9JkwooP7E1T1QHL80GpoleFG47yqMs33B10nA2rXGsfkSpNPKPqyW
8QkHUfgVkvNUyhHz0BpNbywhp3vL6bdXlNi2i6kUkSN9q4GDm/fywxxiN6ilofgD327VidTk9zOr
2AUdV5s7nlOH6NT42Q9m4Pt2c56usg8US43KLMbqaYTGPndMynViNv3JsAymQ8s2ftCQF71Etgr5
wQEeEzsAiT5WixyNQPfXZEwsR2w+tdOACiomlNwPxPlfVZGJfKbuQjyFKjSRkbn+5Lubyvo63eCq
8rjdULznge2HD7F2fblSftjKX9lBb+wbuCaIND00yUStZ4YjV71EMGae1KK+MEm8E0xmuyrkBCGU
XE9s+NPyuZKDd9bFy/k2N/CiAVzSjKYUdH5vG7/3QXr/MeDH0fT16Yplm7Of+zHXmnbTkQDYDuEZ
vxcyovAbrgNW7NXxCDwW15Wit9wN1D3qQnJGYvrIhcEx9+GdmXrLi/VFhc/VvP52VCONNGc5h1Yq
oi4AKj2kQ+uiLnNLIRk42LY2+r0LgNnKkoj0nu77ZqpG8jMZkyWtL4IN4eQgIohDk+XqtBL67WaS
ohslXkf2ybuP2NfbwQIWFj/7kewITnu/x9RgT5XCCtzWA4A3acLDU7zmiMTXGoo7WTbOxwPFbuRA
xU2zcT2cb6CiWxM2N+LjNUwRGs3hrDWBJ636U0k0WKhRUjHgOuCNuieAOAZaKWTdZUm3OaA28iqX
xy+Hcsx+vgnPi/0Ua1SyrSpnbbCnivHv/HhvQf196F4v7vvgIClVr9ojBfmSIg9USWHZ9c4WFJaO
bzQ6RSVX3bn/WJKj2sYfYa2PmCFw3MrHg0Bj0zz10h8plymFtm/KNrP4QQZchjPTNlCFHiKnVaZT
pQTeWZrhezuSB/T994njgrByuYu/9ZawDRaW86c2QI1vGbuauL8Oh86MgsNWdkFC/OIymsBWcNRd
UmBPmDQAWLcT/UrNyP4/C9wDZnaVhpAAMFkvuOahQGZKmgW3FuSZ2e8txbjCsh8o5SNah/e483ob
FpBA2XXAVjQfVtntJzDtUYP0h02oIYuAVDbOCeM9u2zDVm4+eaSC+42m5kqY+F8RzjNIYJtLw63W
mCaad6Zc4O4wsEM6uEkAlQSir2CSfS2w/v6wsps/t/TAk/Tpw3eVTdpOg2V+wE2ROtmSRx4/QiMF
F5ir6Bm5ibag5X0D2XnP9Z74xVTefolLFIJkmLqXuhY9j17HgmpnWJclrMkf+wgczaigxsbiO12P
/eMGWupUPiIi8QZvycmbiSptzlsRUaZ8iVjg+y9ZEKBuQopeGk1lui4qSK/gFcVRyxpt32W1c8c1
XI7+0SkVjX9fca85YtSJouLbODEv0KyNcJPW4uyWtbVGiGn3d7v3tvkWO2wZQ4M7tU1ND4Yr4iK/
a1mrsTepjUL0TvemHFFBG9Y4ajvLssvtL7PPv58TBxijBV52YqtqfBqJ72tMwo/dm1EIWBqwGN7B
ZFAkfRzGkzFk7Ga8aHc4+8qdaGL63V6EsEdquO/Yf4wg0Q0ceDPtx7G1fTLznjTL+d4be7tkiLIx
U+Zu//vjoe/6JrLwyTh8ZAVDEjQJbyzHUhY9sAkA+60Y+TRn3FQH7oEuwzFHIFfJreIeyUjC4qnH
CzhixkvUx2p6sZsXlcmCyRe5IHCvR6cmv/eTSE9VSG43p8A+VPYrklC4mEqh4YLNoW0GUz91o5kY
SyK7ICSOVydLrWZb20wBL/8BqB2jvV8IR2lheWBsxlTt7CBrNvJoSyPiMmSuPFoMuatQUcZT9ACt
f4iN7fMEWKdrX53xvXo4m3XGsE2/WRBthVNkCeQh29VKA74JLz/y0lmJYPKjYMYBOoIjgFwyrzjE
FxC9Vlq3Xt/HNooq+HY3EOdymF/hgbxs2JWe+ovmaAlrCElXen1eALxnAxJUZs61J0DvKM7bL3X/
kUTm14JJNaxN3wt/1I2JZISabCuA7e+zVEa+M12tn+ka8Hzp5vAmhZLw6V0Knhgm6RtJHIviCH8D
qQEwuUjnjnYbwr8u//gt8K1uaXR8YIKOeWPMjLsT36Jp9XThGPTzNKcsT50rnm5O3KV/DUw/bV3d
lycpbHolYLgFQHxkYcWWkGVQhTl0N7qAKTzlQYL0/TkeefFLuiK5mOiXi9tSQ7UIohfxrTPBoceI
FiKcSlNVbe6ucwFKz+lzoSaBAhR9Zz0aKzu3u4bbwRkGdL+YFt+cbQG7wleoSCaLNtk5ycCFjwpI
acQ1P6UtEFxsBzgzeXB0aPQIy9OKIYcPBG+zCq4zx8TSj1xEJHdlT4pDES0JtQDk1e1n6S9YXA8S
zr7/XfhZ0pASb07IZv0Euev885bit2LI163yxum4iiubLdF4WTfVtHq1oVVTRnA0u0RpeJz7Us2O
VR96Z8n1qq6AHUoG/2r+q1J/O6W+useaO7z2BL5JV0bnbQj9WZEnlRw//2hKVsN6d8a67EPZF91a
ptfSyAYlX/DWpw7nmiBdYI+GvoaQCPBmNWbLpD1b441V5g4WIhV3b2urDZyJ7ZDfmtWHvsjLKwfQ
iUO4GRZ3s2tWUV2Lo/RCSyRYsR7v63WGRWvxSB+kIqJ/wsN6EVuKpd2AbIPHvQcoYuxMVrPPTJt4
Co8h6Prm5/P69HSoPsOZGD09dC2Mce1caa4pTeXwUBUIZ6YXlWWFPes4oBxSJfCSCCoy5pgAwhtq
hjSSeZfQPCnW/dju9QIUU5rtlPo/xMrBx/957lM272Bn/jGkLgakoyTGucYGqpgyIiWRevB8DJuR
W69AGw1ZWW3UkdMja3n9dxCp5yGWE5YIIJm1GDsYIPUNkSIhrMNnff6IkOQfvlVfWqjNL6bVvUp0
oTzVFP19UFzAR/w9yCJOXUk3DQ7Mn+ALc8+cpxmBq5J3uuEkQALdS8G7BcdJXHUenR8ziQFzPzbk
V6FM8JBVPzIZbddh5mqhBzveqq98sCht+HsDb8n+mREj1S7bImR9uwn0sLYJet5z2lY2OmvSk86e
VhwWnUZGRqquFFs47hiFjn+fT5hnLwjSUvEoQIOgJed/G+80j1By76jx8mYHLEKpCzDlvYOTysyg
Dy4l5bS9YQdH62r3jvZFspaKiavEo1LDnSSU7U3ry6P7lBtMqRnlQrWxyKwOLiwu/8SkyVhBZ/Gp
NFDcd/L/U3+Y8hj0mKKhNNgK4lKtmsKjlFj30i9h34XLDUQPzFuYGGE0XTM83lrUhw/e2/DwpP4m
fUZXBl8y89alGWFwZ7Jl+kEAMbZQU+9Gm00oJZxaFcsg72YdsTpLy8aA+ncP+V7ptwkhZF5tcjps
MXlYoPiStroSN1UXwvH3mCARbWL0kdx7oItgP6u+qdfnB7sWdEndpSKmJ4aL/kMq+9bieTRmKLi7
UlPN2uUJgf5eo5YwZnlZcx8WZSYizLVeqYDye2B0RfYX4+xVgsgQsrU1OrAVNt79Q5m1YZVVMx0b
CDqP7obLX2PflYb188UZyyLJqJ72/uSkid7OG3Drf+U98bKmyfHvrndPnkLRBOdW1zZ+R6awuUEu
YMp/eyBF0qNeQg9OPbgQtfnnY9oE23uT5288St0HpQMTq7sjgl52i26Jj5xS+ZXcCD88if3BNnEI
laDbZtnVQ/nNEPqc7l2t/aA1CyM5LHdfUdm/c5JcyzbC+aNvHFPKZLSKBGDd1iTdW8i+MRV+SDWR
rEbNX2GpZpAsXv6325ts2AW2dHCj04J3NRg/+uwt+m23HYmK84+ik9OzJVucAs5Gq6M7cJ8fUGp5
I8GiC0kS2r9R2ihiKSpoa/GsU8Z/GbsS2gt6VXYozhd4OTHyksC9XF9QzQ6ndoyLmJ3mwQD+l1jJ
ipbpHHA5UKgd2OnfhQXL+m+chD5wd1zryc0mbD4FDKQw+iDgXIGLTv4o791bVSZEzW6Golb/WuqV
3KugZwZ7V8CtMBO3nSVZ7mLzY9JxhN03YemOZjkniMOExmA1tXPj+tZ1OQLELr4V3cdutkY+XvfL
/Suy+Tc4tBw0CSldxp3fuF65f5JdXVt6xXEKeVNd3Hlr2zMs+mP7mm8J17yAGMzZXo9olDtz+fXx
0uRg0S+aZuM5IgxX9PVMRSnjLaAJSAE1YUenB+4szKa1aZTVacmC2zHIsrEaawlMfYkwU3jpzxPT
TEtKGSMZiZ3BgEd/tEsx6MctRBcNZZiLXU3DPw1/4qYoXpxPFIEteGXrOSrKd2NlPolbXb49kLoo
O8hjl4cYrgujLrXAdnjJrv2AuIKaq9UvqzOhTjiIw+WJKCS8o2kqE2V7Hb/s1x+3NUQeYv+qLUJC
iEQy5TmNVAWiVFRLLCt/674uNuhQwq5fFaca4H/+5DlrggnKKJ9ho/ZqUTVnn3y1rpXflEDI3Xgz
yIGce8LawJtxjBjWUARK8r9V6JGp2EK08i3Iq4at9elJ7MoqyCnIzi5ln91BUue2/tmUY07XahDI
81dnKxjMRyRF81b95hRlgFWQdD9GsRUIiyNlOsLMq2ded4XLba6Ju1WG6LltAf0Xy5++/AFY6hQb
JKBNpcLQyUck+ztjra3CbgtjjDKH2SpN2mfE7E2Na3BovvAyTfG1JxCH0siM8MJQrc/7urJauGtG
tEb93JxGwUACHFCAwpLgkWyLDhRfcZ5YA0L5tiAf7XQJrrhnEdvqYNPYPwvLsK1DkQk2iZZVz8Gq
FKab3GKeEny0agY1quF86fGpfIefgbgFXAq/SeSJPKIzwqLFcFeTCJUVNyJOzmvm1ApE6EFRdS1k
u2ihOwCKJBc8m2wPTg26fG/LQhVNT5zcjrpEVK6T37Lu0EqYk8H97xmq8eudpUJcv8egG+1hihwy
HDYWg2TgOxmsc44ekUS5ZQHjnqy1hsMxe8wNHqZbaK66FjAKQy1uWRIkZhTSYvSQ0ikPajMX26ia
wnEqZhOCd0lH241x73qVMGhMZeysWo7HooRoSU39QTgV+tNUWtvJQkRwz1/DRgyD8082qHM3lTcq
1dZnC8NTStHHqgCWG8pGFC8bo7y/WdO72Or7QS7UMrAFeSmzyIyB+Ixz7WVZ/ZpXwD4bT/ZbWsOE
y4DCh/cfy0iUsR390RFgeAhvKUizce8HkweVKeOk0zDM5/Fmjlh1sSMLGkYMlEco/4BFtL15yPG+
SvwxOnyPLvQyq3PMzNCmhxXSoIx3rn6E2bAzkcivh9qYpEX0T75MvL00BYK2Lzm4ehACi8HKkwlR
A2PnYAVkVRR2+fCpFr/rlepuQMSNOdCCAVodxIUCR3GSv8JdlSLlennjRRWyCndE/TaxQMab4Xkt
xQJUHD4jD+uWX2Bpv0EuwGv+TOqJB6e/Eo4In0akOTZr54wg8RKQz5qFb8pZZFBxv+IRfvoq2aR3
miFjwzHvxYQH86rNlOsM0SU2jIUafOO+3wmAIXQwZDj/aUPr7osZ0sy6VKzBzdJDsOan72e1GZac
I8HROndLKJrHMz4IcnHVu6gvNseGwRbPA0wsexEla5r2Hb30FYedcR+SxH7jfVO5NJt0XerqG6qz
UnTzNi9UOLIKqfAfnHOwKpBYNil8BDGxtswhZD8OB+TBfKBu3mXAjopwWVvxIhfVPI/Rm8PefmTk
tasB+dvU0uA7JRe+klpCqbne+wef7PC7U5cRRO5Rf99J6ctx2kOl1SHPrecWntfpoyGYq8l6MCkN
Wts/Dv/+T15WP/g87cEDYs6Uj7GW9BOhR87SnpWntsCvnWTnT9x6Iml9cMvHpb1uht8cqxLPQaVF
W/r8FWsB+B17S4RpwL15KQLR4GS0c+Q2rBR+eLEn5/Hxg6DwRp5zkX1h/tfSD7CUk0glBMZSI9sp
7HuA0+P4aVj5QELeEhd/24p49eGJvPptU5iJ75tRiAAsVK4TaB+KiimAxC5rwj/8irLjbf0y/aUU
w8JRhy6UAuVv3LUtY2uH3mrk54rbN7lWPqyCgc1ZnM1BI64o0E77I+agyfszNyvAhIXGj97PZvUk
5pBzTB/XyC+zwE5poy2hmuavIxB2d6HTfJe0M9ArDlnyvpyJkBnxvRq2yqIET0U5P7U8b/uOpzCY
7RFUyyxBPw6pHsuo9Bd/W33mu22FZcdHqEEistLTNhj/q9Xst4DDPPi4DhOPQP9dsjPHKGqmsubx
ALrSQ226AtWd6IBYUH4BRrFJXXU5EjelEvugXgPKi/9JTupUDYJL/YKgxk0rQSo6mOYuYar/OlRs
cxZT5+dk4eHXPbH5oC4x1gkhTjxeLRwBTrrYp4RNYA4RAqdYE9F8+4xSTaRRzslK4OV276Z4CP3L
50cQP4SeuNdE9uX2uPxyCGkSlUorbjtZSQuOjEqC76jid5XL/Fmspzd/J6wwlXcXzQ+jZk1pcUx6
tPV/XlhKRzLw7yEwspA+TMrBoVaHzaZr2DsOn15SceqlFhTaKZFokRopfp2IV7onjdkC3aEvaT/M
RJcJFwSXcDPCqzJ34ZzvaDm1vUELuYcx5MrWR9f0swd32EEZ4dDUc6ESAGTtj/XzyuIH8k3F48of
vNPAYIOcvLk0vE9vLrdoNeErB/4xLZ6Qbf+kmhnXu3WlIqEoDFTRIjI52YtpZl82bGLWAesu2wyr
Iz9vG+VRcdxoVQxP/GQsunK6H3cWvVwQ3jvTS/+3iWzxB5F6OHMk+TgdkrdSNYZGt+QdXJE6Z/bD
Rxv8sqeY7BOL/+6Z8nraHbUHy809Az73OpBwe7QCpiVHKhGldtsKgO7pSTy9VL8fe8ditGtsSmAa
4f44ySCX0mn6IZBQgnTFy0hk1RSr4AGP7L5cYEdB9GV8E1kXo3k30xP5DwJ4SyQ3DHRVTh+bb/sS
M4B2PRpkMhERuugxB9TpItBftNc8YmIwrk0IIWpRLVe+C6d6AWEYZLr5i4Lk8BLBLHz+221B47BL
f/XgPrFM3hCGHb9ihNsXQFQiI53p9I/PdRslOK20vqnNO3OuItcBmA8ngX9JBxQvDAOmsD/pbdhu
p0CLSjgw151GKbJ4CWb0QTV630crfDI/ioPe+6/hUW6dFH9Rxjd4qMMhUSz/g9QbXbMHakbJcpk1
3qMaBkxpRcIZP1Sh9WG7t74xe5vkyiEWxJovGR7UPPvVXdCMR2aDf0kZWR/KHMRhDMMa1+F6jjql
Fg7GJZaH+WdxT5lMlYsmbbo+6WIWa4FlJP5bOYTxVRKzz+ZLlbdy9CtApDMesZX/nQ3JTKGM3SRD
xu+6Y0vLBtni7KnNTP4Ufi1HTgYiC+nCAw+Tjy817tKqObSEfesVpWrHQ45oMKVPRgzP6DkFhsiB
FftUd+XsX01wSau/bB0zi030mQIN/5jwhPHVPNSK41aG8Z4cMMFf4lkhFirgPERqJcZe0Gw3GFho
viE45eCFAN3NKPd2I0l1vcza6SfWqAX1OH1cDVxQ/qeRHGo1vyMyq6ZUx4o35cTEOMZboswFf2u5
f5nUMXZbloz8SI6BXjcgGUgadVmPjbkqP5ozOwNyW1d+7iLEgXssJHpW9wMfKmVq+cnSo7owLhJQ
c+h3w5ox5j1qli/l4FFJ2xaEhzEHQIwv4nAEzbZq1tRSawSc0BywoxG1SYoFsdz0FhghXjgU74qT
NVf5PMHURtlhSnpU8e7a+tgcLQ2LQg7ZEibxG9NEzpauGibsqz24PIcAiQFsf3BRwZd9RpWK1yP+
btwwRShIlbtYECfbhaM6Bxx8iWth3AN/DBiWvLGBObXv1WC3uvr0MzPlM2TX3lWcRtE4XnxnhwzE
cGS1juPkQwCscRzGxx8KxykyUhbzfOw7SMV0idNOSXWMCxj7QVwFed0iqxpGhhM2mRckqDgr67EI
91bXdtV0FRX65wmIReJSc3APWvco2fmx4q0VYoArZjVozgokRWWoe9MlZNoXxYuQFAWRPjwIqJ46
2hW9T+rhaqZ3esA+UYZG+T0GhFIvWV2Q2jHOrUBJDO4zXR/TY18NFlBeTxiws0bACRhWjdb9Mi/f
eTH4WbP6KnMRtcCRS6aVX28/SE8W9TQoV2sSXRYAeknjohEX1kqO1VdbTno948sHKSNNqT9AQMct
JRcLz7/IQYX7WgTpA1RnTOs5MGmMEBaBDm7YlIlh4hBDUcD2+2wbNCONKG7G+AxZq3uojmDbbGe6
ftrR4tRNZtbisbLAdDA9FDvvuqkonsFlBz1/QyJu/2rm3iYtHZzKPHPNwnR/ESDuBVUDya/8d+TQ
kqa9Yw1jdJtIdrhQTdQMqLhW2xizh3E/ECn9crA5O+qUm4iFaT50V1pG24oqiJSMX8cGjfFbR9Zz
QOu97iTjpe2mA//+7meLBrJCyP24U6WMFpIPiwBP4CAaMJf1CNOjhTYy9NO1A7mTLyknvMrY3BIy
gjnZ0QxA3vVzR75/ZChKgtzT8skPJISpPOMi00HPpK81534Lp9fzckqdtbTGRz/bCAKBWKfk/kaO
4WJSilaAc9VKJgbH4rRv10v2k63otGZBBAaass1PtzEUxLVozgZYmsAaePXlmne5v/cuCfP0j75L
ocUb4wf0k0NPmdO3VgRjtml5JcyjTdDH2lPxaIZOmlEqk/zQsy0QYkFKzw7Hv2HB99r5Zp19Q9XS
aJk4Aginxhy08D6UdVXhibZGgbUXtEaB9hd6h44iYD+bGZ3asIDa3fCuw18JqqrBF1GcSvt7gC87
EZHWBMfbnN4So03UDMyInnXjiSu28tX+PqaN+WU88PvAtVWedk3nA7F0u+rmv0X8ABw+8z1fYJDh
LxvmCVtwvUXjgzWl9m8asCfP8iIR2ICekeXIvGAxnI8rEo4Qk5JtFkLHjFWvMWkqbbyAWO64CqBX
dkuJ/Ob/fIpoAtg2xx0K1UMoVL6PV57pRvPEYOpzbptdtOSxjb4TE/2ie9P1Vf6py8ULt1kLsvPV
IJfaYoVxt2V9pA/1+Q73DR2lrUvPDIMVXtfe9kN1rdOsaCXtLm+qql9+MhtEDSjYoznm90r40tiw
iLALBIOSOYfqQImVTcI3IT27J+WTptfID6pcdxD1TuUc/VH5mO+RXzo7ZhRsErLwnhOGecE2KGtx
sPoHkrmy1qRntv208QN3Mho4yH1B2L/ZWGOHL1uX+w0I5ZWTj89klXDl9B/FoAC3eNo+irl4GF6c
bpbYl7wsfjwX6zMTkq/8WWpbFjwXclpSyCkdapFKZSjU6eeRrRagveyMNJeP4h0c1P8hAo15ips/
GokweV9JQK6bvvgHVd5LN5sXG6oPbnnb3lqQgXUVM8W6quM6KGuH4sjrfC20KR4VqVYk9cbh9c4G
fi1ySggXrzGu9de8RVsZ/wqC/gqmNMSD+j7Jpl2/5YNIyRBAosUa0aew5FTeMIK7RX86O/W76w2V
vzDEc6IzCHr1U+9Hs5elXbokEFsIkU9NIkuJJoKqH8G2OH1UJdnMjPaIEmdENHAepJnc6HGfEjZv
bcKkKXOFXTglG/+5y4eHHkERjSw5KUf9Bd5V+r2ikDoWztWKVgSvFUGn9ekGB+xdbKWp0Itt55ih
7f1dvhxCk+5h0c+k8uMxZ/F53/tYqGZLbjWZCihBGYi+k/xiSoKGs82nqjhtrmY6xKR/TJjtCIb9
B83dk4cS6wgR165VaynO2boxCiLsX0ImeA/mpN9Vw3IKj85UlD1gGzuvsgaJGfBAo2SJn6YTIpOe
XaCoy3RNYlTvKez3HnwXRSjvNWHXphSjepciMj1SCNFNbKmTBGi9+u4n32ni7KoP+5y6KuETG+WJ
v/E6kd7ei0ZWHmO7nZSjEyFJB9LhOtJEnxZQz4v1DJaRZnoiB2Sf6FtWFm4fpMwK0NkFdE2P3ZHv
xrigxa7UCu0RngXeXuukhsIYb7hBdyoB2fyNX8t/hOzhq3MZpHWamZNQBcYl/q+LQ+zL4ujlbrBl
FD61FIT4LgghunZXUBVW2KdYdu4LPwhJk4wCyK5inb3qtZ16cpAnb2df8jb2oYuUjrwWW6BlTcc7
2tDC+Nmp/+DxqGqdlarL2F6JuwUBvN5Z8XRGNES44izB7Derxzg1/qlGFh67b4/hGDsMgyGeqji9
GlRRewsHsGi39/HnZilydSvH7nZDxtS1OjiQkmPDEEzbb6TnBwS+PqRxUyZ1bgokWm37cosFKWKj
vkCgX4wG5T8YDZuhrj/8hqPY1hkJiySu/4UWCXlJj0FjXl44RCURF/QxcrV20v4w3RWq6QoZaAKz
LBM+E+ug2QPJhlAV/XkkPLPbWq6vaDGYmvlUiTQXsKpVb2JgbJKoIcukLNnY50V1hbwVRBLNt/az
7T9GkojLqqLQ6WI2aDyfTAToto2tFgXAiwD+/lla6GHCD9av6H9PmZY9QSWnGeRDkv2KHmJfzQHp
j8haBPQQhhs2RImPaocAP0RgGMz0jloDGh5Y3+x2o+hsQIuImgfnHGo+57C52BRD//Yuw9q2c/BV
qvi11Z1Cetaa7ErlKy2tJKw0u8rgGlNioeAV59JsorM+cbsW1enSSNZ9xxzjsGNFcpXOUGh0IIEA
ftdxPSHmS1bd5SU20HvQOIyb+CQd5Y40X1Jryk92hgSw89caibk305grzVpmrYVuL4dpFADahwL1
f6JVhywr4mF+arRs6Wq7xNvQHq3iYaVb9KUsLfUFSrFlI6ikZGWmL4p02RkDMytCY+GlHJ0Qclr7
MRePS1zcl/DL/C+8xt8zblIK8dQw6vQnwP7oX7U+zjhxdXJur/KMtW8Kx9Kjdqhll0tUpUO9MuhP
TtPOp6W+4/cJXhQBDxN1MVZNwuJaTxP0U8nMl4k2kGR2yGkLEjfTw+0YGn/be83OYyxDj2boI1cG
HxDJkuRGvbULQ6ADoSLPFmznWY1BRmK0xsqnHQEonx2SdgaRHbQFWW+uVgU42/uAfSqAWwcq+d43
eNlpyY9M6Uxh6LIVZ81C7Z0+fqG/twvY3ekk5s8737T1zi4VozNpHVLO1gbbSRUVtVz9gZN2m0jK
CrSbkdFxS6Cyys44SbLlMI7NBAbqDHiIrQseGtUKHYKRLC2ROxoIy3VRpMnVSLOL4WYfsFFCHkzS
T6V+76RxuKMZpROAJODqDcW1di6ycY9fauA6hjmfTxbo4q9rTCPC9NyxfZp2RU8MCtCcpRYtWFbr
HBnbydGnCpek/6NWlrkOj0zUI1rCv4hsBneRQQY/B/YP6vkaBElkXhmH27QOob/ENzFpO8jPflim
iGM353zlp8Qswu7GD7/HtAxVQ4aoJgzWCvi0ODBJXtilfz2YPyo36U2WSn0vh0IQyqqbip8SibjC
++9lxjm8g0Rk/rb+5IwzBB4NRR5TVLNX1aDbmOLBdPsRyTAsJ172oHuxkcShpARojgAwcerQp/If
WPreEjAQ9WELnenkE2DpR6mxFWLOwxOsTBtvB21jdPwMpy14VJ7BroHajXvE/JTHHIy2e5bYZ0zU
D6QeqdKwtNCzyC+eqfn3tR8g9Gi+EIJkWUe7Yl6TKnnaYwxsvxKtTYQq2d4XgP0XRKL7GLad1reu
69FmdVHw18e1YRU3/Ve/VUDxxZ8s2nZOU2aBbqJ6e54MgxyqyiZIFTgCDUyDkl9yl2Y69VNATDIu
o0UR3eU0gM6jyJ+dQV4iWKFsQOs0WmEz96LqXcJQ4K0UBPoHaHll03M6P9r8AGU08+IJmc+jltOZ
F0PjR94Kh2bOGZUaWw9cukwAaM9NTd/vaWsESXyWm6gZNC6SqahJfQf0gpvyn60aFe0kFJ0NjOL4
b6ioabihCpMJDRgVmQHG72IE45orfHA2cMKIXcjv60DxWZEczaIfb7Kd9B0SInNlmnBRujWjy5mX
UkG1/WAvj9z0iRy+4ZAvbubWDJpk2Ltop7kFq6GRJqK71Ou67FqIZcg1Yt7A1ToZDPS0X0uiN+Qs
1KIz+RtOiNLefAkl1kUi4KJnrTTaxBUKZqy3kcGCjaON5vJNMgWJpD0Qyv7QCp1NQ8s/lo6VTyQr
VUGZR2cRfxiRakzhlt9U0fBc4jqanIGpJc+CljJ7au4YpBvtBKu9cyk1dKm5ccle01e6duJNonwd
TbqoUcogip/0hwUJcyjv4LzWAV8ao9gFfTyIfo5ZFwC5xgKaMIvSDK05uNAVm1RQctPWQk41JGPa
tp2ZINQNtIGyZaV9GFkVjsNVi22PshXRiBnabF5Cs3bvUnf8tw1/U5+AtJ/A6jDj0cA0RXn7oeWE
tWKkOxys/4ZhGcXTbeCxrfSsh8JYm81WKRbRhE+6pcnzNAlWm6gI9nNXYmzdHCtwssZD9fwuBuRt
6WPi3mJrjuvZubP0qYWgiAfm99HCZIOKYNLwvxJg2iT5G9QNwVFQxPNFQYdVZRg0RtF8ldpnADW/
niF2xdEuCpTm1B9R7etOAy/fRVlu8ztdPpKgRlLAE2tKkgyMufaGcWoS6pZ6jYDo8jUoLtrh+khT
TL5OSZVrJCf9ReENd38jMGuFKrvsfO/n7I3FRn5V7JxS2gUFcVhXofZjcuIFjLC22EuVgCy6ynVc
U43pli/RME1XOhr9B+5YOjNRWRgdVbsYR4eYnw9FDzG5IhS2g+iTf5UmSUCnAJyel7hDcosOAuwH
jBu0ny6d9HZuzeuiE2NJ9sPeKeQHhudt1//f25voiuwClOv6ssaM2zw96jBFLGXEMe4AJpozQ1dv
2xL8oRK0RoaJwZDMTDd/1Jyqjg3P09xATr/S6ilwURZfmDiIO5TILlyuca1a//vYn3xLf8PYYsS4
TYJHF43KuxVvu6XbGCk3a4DTAOyyVX2VJMYBk57ioYbJb7Jm7B0A1O3cadL1pf9Nlaxm38QVoNJz
jNHfWOUa9lg7evYHU2jb425/F9AQBPsRmhTW/dePAbMv4RH/jpAnjPIZyZpHNA06RwE8qPyrbiHF
69S154w8CVRq3/5O6uB+u24hLrUcguop2K1fydNdJVXoiLCEwULkWLIuXHRDJZnbMfkHq/+mDBhW
kjKU2EH61s1Hr994xDTHItirY1tJowQsALEDIvKHeyQYwWK5WtZamX1fepfltjt7/YNBVaHES9Q5
izF3YoFzKF/E7iiRQYuvtmgWj74O4pLST5fJMFURYMQkqyqwLUGpV56MVMbsf3GYU8xRn9fIOfP/
qu/cqPFAte7WkZ7vVBTUMBYoGsd1nqknMjPmAQjUMaVMbV7U8CkDI/HISPW211fIBys2KDYhuLPA
K12tBfJXcfJaoMCg4tIW5DArgTiZgXmehDzpggIYt5nN8sIWjz+igIAxXH+Is2jT1uJpNepN8Z5Z
FMuwfc1cou2MhtnZwthKprbiOpjEfxy7OBdqB0Qga4QskBP1KnpYl8PkOv82js6vusvmkEQ8mH2h
THAzhhnGGHYTVar4L4DrJ74P3JFkz72CYikIktOrAY3q0/KmpKnApNAsjoG5rQ1uaNxO6lhXkeKK
cKE0i/V0HV3REfWoKT/XgdS1VB+j0odX98eW1FOcU3MVknpGEAGbKKD9s1xhZmKrJbZSDfG6c3ay
8QZjSp5rRihSIdHtykfn+QpYnpR8RT6fQ/NZBaYq1eH/H5Z4qYR/M1USwrqouIdIt2dXDOszvhxI
7ijVWheGuHy0YwWeiMJK8zzIt/pdAN03IGL75DVH0moePQz9p08uFvzwGM8jGQYgJZ6CpkzwNggM
eAvx50gCtsvsFFu6Iq80j0MdhHBj1qwF1r8nw+EpDKSx+EayzOj5uw+GskP1cWTiIMJsnLiR5tZf
xqMa2yMXHiihhbu3PLmPoBpRTb6l/jA00/k6OIT0uxceolA1vSb0xlHMcuZ3U/lWwQUA2caqoZWm
w1nGap3zTNiIiE0JUTddqN4MJ1OpFcf7EnXNg6Sy9WtjNYun8zEFze7nYxwxvzIztOj7JP0l/Sz9
N7uY8j5E9ND+1XAFJUT1lvJul+Wobt9FT0dhgmtqtHmf226pXcxZ6kQmFdqOisezXJ5bWaT4aTFG
04CZGDYwAeIxt6Js+igf33EWrAawSbibeJUQRuddQiAxh4LYRVMFJbyHknqVWV1V6qNncBMhsCFk
mwwLmTbYL1PPLFUoAp8m6X+9nDZTsC2zbaamfF+Vi0NJocUsVgyN4Vjz64/dnFlk58W+jAuw0JXs
8uJMO/12SJZThWRnkyw72oZaoxOBDZjV+qn27IrXUwzbst0H2dk7mgJOrBG5znVqGFntdl3UqQMm
jRRc168KKpfp0dgvXCn4fgenoMWl1dkMEhBYMBYgRW9WBomXXt8cqb05Y6184kozEo+coGnLmeYi
m31kUppQn62Hljbi9wnGPNc6kUHpwlVwXKYWZ1djgrEiscl+vFTMwIMvYBrtno4e8/x8VB3YZpTX
b3kIxPwIcbjDT8+uWXz56fSGrAEfeTbfStsVk3CQbbYwc1Q/jC7VQu2t6cYVbqCwoTUw9vt4LnZb
DbkjXgzq+CN9eweeqHB1q+vmWe4Yd6pYRp36nsEVYZW42iQ7oJmQann34X1vXoxzT0yZXU1WruOB
FOqSGyKjpjDyXVA+e7bKB2NdaGYRfCSR8Z+nx2QhyKmS+/SCCUCiqX8VbVxYgMzxEhWg/vVdMiB6
Z7YYcvDM4GpTiMNyOBj8UEP+s+hn5LyUrhThZCbiDcx6CZh/45I/uFKn6Wi8U/72vKIRHUciTZik
/JqZSfsGQXCkHVs3WoGll07ElN8pkQfIpyFbOq0YJZknnJqi5MVxH6mkLL2S86763Qvt8WFzP3bm
NlxbArHpGouwhNJ63WjcZJeYZ+gFUwHRIoR76/ON8mxpRnPu4mptDatIUon3YGUpAEeUiVMeJ2Mo
MvfhzaujqDdESZzlDzngfGn4+oQErukRjQjhpWDUIFNiBXsT/3cg2sN4POUEK6uxt0HMCftEEiAp
uja10dmtDXr4RTxFwT9x12pVqqRITGeT7FqBoSJIZu80bNW/jli/FfJryfZLYpE5r8v1B1Ox1hdr
LOCRpl4ncmhNDR5MUccrNkfQWzIfpDwv+WeTEdSgieXIoQVPz0BXkyhIram76ZKxbE7hsbm0FnCX
3rtsc8t/ZQmfwdJGwuum1q6HRexS/qAjWOcZ5PgijqhCSaiJbKPZa6/D8Lz7Z/6wE5IZx6dbMmgR
e7zo70etUuhHGFOswUlcfQbdz7zNrOyBImfNksbpSr8VfEfewrKrZDFxMEFxDvu6y405Zu+FI9x6
t5d/OujYvFywnVUkxp0t0lH+CSgHAgWqvmwx7iZ5KtlZaRzGNC+lThAaoIOSEISCsF61XBIVXLHT
aXjsgNYqUhE9iKCOro3E86kwGK6AL0ztLcOfbKLorYlpqIcMyWbgHy5HzHjBbRzRcT6ri31krmgz
CuOzFTnb0XCO8gpm1/4D97y3Zh2v8igwwr7lehCuus5F3ZboECZAR0pob9JeLmeB5crzPnPln5Fm
7I0meqgP390xYI+1aHKcmmjgx8sJutgOt0vjNc06nuagcFOpC6rVgOaClR037ZzS0V6RNfeMFvCf
2vOSzd2/NjxjYHar1bkSyxqA2CvFioGk8lMQYn7F+psUzfR7cRwpyOOpaaDqAW8+6plZk9vyX5+z
1j2JVeKbnkvmif0A0JQoTL8tra3IICCubSezKDuMfZc7At8ipXmB1THWa0Ze02PGfC+VIUn6Rg59
KdiYe92bGzXeII0hR/dHCqs22mo4gP6u8qDfizqVeeiziH1VWGejupfiyFfvqvOgms3ilNty7Nf0
bSQmwu0sHvLhrujrRlmGKg/ijrMDOzlhkZRw4d5eEHA3WCmMyRoWWRdVX+hnjyl4McEBXstroFI2
FaEBgpsvLtmtuo4RV2vkHfcgSEUAe074CqIfbkclQBo2CHAsy4MQpoQptuWhNiWeS0Zetz4GFgAl
mNiZxWRobsr44aIQTZFajRaepLYX3HcD1qjMaAzbRgDy33fCMVQmd2H2T2NW7YkH+x9kHhiGxken
gaLPnu/fTguKw2LP3qbBTaEfaHJ2T+82h746md5I5v1Bu00ZXn/5poKBa0pvZU+5WjgLGicyG7uJ
xxWTDlRiqGlVyEd5yG2S0h6xPlgpzCkXsoxo8yTeBV2B7x1wb+o6GjEXa5+fw2JdCnbqTz/nSW5M
fI1+YUh4Qu/42gg/ujat5cvsTxrC/PEsKSn6V4k68zgumfZezZ6BYBaWIk00Nfv9DvmOiZn08dHb
C8+TZL65qH6GWb0q1EbXj1FYQYEwpF5DsqEIY/fGK2+xCI8mex4LBhQjvbNZoP/Gl8cxuipMzafO
9YJC+KLMesboMjaRmoT+2Zt56PN4+4nPrAYgc3jvTIft0Co6TK52BLmh+Zk9GdwfCCX93mveB3qX
EH6vx+6byarPnI+/v4dHhTU/gwac16co8a0fnKsp0zrf0s51J513PndCfic/OHuy4POyD7SPlSif
R1fa7dXtg/zFM1EzoQ1JulkFk46a2VuwiZ5EdU8+P/Cd0xnFLqXCSJkZ2tsHUyVZAw8KHYnPeCAz
QRo3dt1VKnxc+74tGuPHArCbf6QcDg3laY8nmd6SuZ9XpZjJsH6vCxe6y6fg9pTWKkRVxdNdSmQy
N7+Bi3kqcIIsq7MFmSUKBXqUNw8oU/c9Rojl7cY2yDUIFHAmIv/tiHCtgHCXWdazLHxVEQicFspO
pb/O/wPYXmMsqotfCUEjU/7gbSDM7VmRcGwOxBuvUiMoTxg302XBE8wS4tgZmomeXhYrbHLncf3J
wPncHoq6nUrLOVYZBjTd3qAzwcMPv85fmFU0sqqihSXOIfFh3kmV6xoshFmgp6gWAy/Co04Vb6jh
VphJIMpDXnt2V41hpdykbHdvKk+Z6F84523AW9jFClpNUBv93ssYU8WGXKRS2TRVTFMSpM9+bzeu
9KFytiBzMi6eHJ0N0KvZt/4SGF5qKdSUMwuVLnF3ciCQDTF02vocx6bdUyBEKaKfhTjxGh4dvj5A
aQ39woPGwGDsTXgqNslCmNhqKwcBGqyAWvpMwwa5Je9oTvHPCGh6aGkNp/mQ1fbljUaOBM3Qedjs
7vicGAWtXhQkL124G0MCwK1NrfB+eeI5npiI/Uek6hIGvX2fkG4pev3pjtb0lWnQxW1akjwoRUJz
yQoQbqnfAbcLpf+Tqb6f93KfYVD/vQUiCfuoCaAcWcR1PK9RZPtcGmakdSau65Qs5XgG/rh4cA4v
yMtGeX1BlrdC7jLPuj/c++X2QHaSYl9eAm6p78b8SYhT5v9xMHyNcJ3TRizggJGGQYzerRrX5FqX
KU+puuBUleAeNV8sSLn4MYToA8VbLFzAVi8Dl8IJNyQfaP1nM3njoQIqRYBKXm2eyZL9gRu9lfUV
0LRmfbkKKbi4gWLfk1O9PXigoZabxQd9s/7M5fnr10vZFEjS9nwLAxpiWwq4d5I35W/pHZ0szNc/
Ljbwiu3ZM+QFb/ivo8PeENP6fC1ykXmawLsIZ4iuyHD5j+Dans8UeDdrplmby4zJ4Z5ndGjktHR3
vcaRZc41MMftzaSU+nTWh/f5MTzmsnwkMcWP/UU+phF9b2DWb0eEis8n67KIMtIbo+ExrS0JbS28
wVfuil5bTyNEyJss8fe1QWzGYURTo2x1MuFLkuhB216zU5yiOh1TBDnrjaWKwnSNHqOcGZh4v5/4
J6ieo+TkhUnmk8dSCqYIgzssDf1IqMJ+1eyqHRGUAaGYZwRWmwzA2sOynJ/ZkPXaPtgYPX8b1Svu
NQYfLE823iZoy2VKjsZFXN+Fv6XvAoIg90Rg4+uWOasRCBI95ziIfvo0IIwlIor0HSMv40vbZ2sS
uhfy7XndfuvS3U9Bv3q7qR1OfFeQLFxODibu7Hgv6LDMvfkHcby1TgsQrX2o/ho683Y0+5GVBdgD
VbLXHR8Ari9NgE6N8hAz5LzGCKszU6Wgmq736mTS62hrYmkrD/72ACJ5Re1dHT6s2WCczfwi4yh/
HVEnLNeVHtVaYYummYdrAwN0378Z7SUMT45lXbj1XBAUtkkMT6CZVLF4/HaDHbOGHNw3sWxa/Ppl
C/IQXQoUP+XTnDERSsAaPEHydKODDbd2/9g8UusVP06aytyjX7I9ogrEj1nrdVgQSyCwjeCZFdIH
gNcNwFZ4HGzdTtHEs6pTQkssgEbhzj7FBoELnBKZ0WkvZ6bzgNNtIMYZtlGxAQuxRBN1Azx+WvZV
HGICQY7d8GrsCBtlnXp3CQXpCZ6c8aZeZQ6C+S+C1PetUFMHUxXzkMY8YAivD3Gqj6LeCY7IrcrB
Cf0uiDqrEIWANKwPPlnlHE2einx1VU2rm9XTx44u5RKG47OK+TGTadqfBeHATtYZ2ahhCTYAn0Ek
mrnU1hg1GhSqsOJPcrBvIm9Zio7psVpu0QfrbJ48kX/Y9+57s+0nipkfGzk0cR0zu11X252RH2DM
zjK/WTBGp/UTT8viV2YupcIfefvCNFwiHX5gFe+yNWwXJD02XINVfoa20KSjf+dGdrT0M047p63t
iPJu6CVWxcbXsuo037dkHpL6GcjSAAwcUhgpdOoIi6KZ5SPlYXkKOfb57SKMZsxJnrOMEt0ytgp7
gofAK6bwMYvNiAxE5yrs2+xj7plqCWDoITjYMMlgyJ//NVb3FHzbgcDmUEFdLBje/KygbmMEEgqp
YSascTThqebjU6jkNLJFoa4aoz5trBGhhUX3OnNO7UkC8g9NiWEvJ0IQNN58xwm1ieNu/gCjgZlG
rspAsQI8K/4qgV7Il9jbr0lB2Y73nJNsx145nv1iWeUojdPAAC9GC9FDvZkwkvSCn/2aMNQfdoBS
ecgbq1U8fKsFdWcbIY69H09CoOR9FRGqL5I9dsC8++ybkKIZ5uIC7419h4vONOXkX2LlpFglQsLN
Ua4uk7NfrYCzCGxeCUAtDm3RIDNkRBFKIFIRNnBp33kggCIdNbKdVKbBg0dsA865A+KItsqWdsES
qKjbU8tNOdcH9AA2nzBfDZtDn//D9/JVroMjCdh+tRxTcgIst8ZC8S3DQ/7T3CxFa718wjL97orN
y75w0Gg2IUnPEE5LVw67QJqWl4Kcj9U5/kPpR/I56At0hUMvGHAyyjjiOww6fmdPF2Yc6xu6NUpb
fqh+5tXbRiXOUQwcwDTgNBkcCNp62IdSrWJeg/KXAEuwMeAAtX5uQidZZitr0+lrD9JLVk2UtuaE
/bi9gY6PDaWeongGdaRNepwDKhYTyXF18m8UuMLd9MYteW1eYyWGE8m2urecVMijFbieJ9XYUeoE
Zc5Ju+vK1tIztJf43/tRU4wqQs759vszry1K/PKWUvB1WvQBcI7494FHsNMDFk5Q7mPDIwsy85G1
5j1guuycIIYoNPAGXhtQipR049+bLwgixoZHCJREtN0DXodFyv3t418cK9Ujy/COT8j9ZKlu09oq
8IqhTsnEvxyjqfkePMJcFCSDaaE0IG20PVVqKTxhYrgA76WIZAQXaMe3V93XIJKJSJkQQuPCeL1a
c6ugyn0737y9R82B6Sm7IEWFDWvz4wjcmis4DKhazas+zGddTYAVd/vayh97pPsC4WTf6tfkLdXY
sJ0JebJ1GHL/atiLZ4eYX7wdyu3RQFH59dzVtlXF7OECmSw358C4tWOHjiflp38F+JyGsChW6fzH
zaojwGlnOAd2GulBIyZHbdsUYd1A6aH69Fq3MRoHctZIc1P2dG04c/3LU/hoTmYBX0abukd5WAY1
gcx0aJSVV2SVsqGXWf+R7uCtV615yPVOkzVjGBOV5jIGzwymQP7j6eUIYKPxVijd+qDOhqYcdE4G
c0oxk802FclmjFwby2VyTH2vnvBqAmhXZ97OIFGTGCShMhe7rfI+hbqxRDzIzIAfO66Td4IKwPB1
cwpXSsOpAXtD+xfJxKFdDQsPhe3JKj6O01JKSQMrNdBOn4prvNPj2Q3LCexvsXZxFAMG1N0ZEGmB
NlB1MAQ+q4RUJQNj3feLeBuk3lg2N32QiOEHDz3o9yU+hu9hXi4TU2rYHjkXUKle/n2Cx29xOkL9
EwYtxnfAjk4bd5cZ1ymqYWTvwTtUUWm8ohdutCGvVHoi7lDg1Io98g9QVrh/nJ1YcOIyxbYWTHNO
opoRnF5ZbkWZNuNIK8hLEhloSEdil+jm080Lo7GzUBQ5LvCHpsOpSfku2HeEsLZyuJTnT6vR9atr
bqrAW3M3zdOQZEqua/uZPOWvBESlwQerabALsXHd6QnjbWy2jAx81hTfxTmCRmRXp1oy4M5M1F6q
WVwQjFcx3LCRQwj0kh/yHPvTBARp0mEv2s44BG5qwsSHxl9kPhygparrOzJGml+5xLNs3afwBai8
vswYMY2Yp+oGvUT9YGuEm42IehdjzXHGEi3jnwZkkqr8ffh6/SBN/pXzw0hiU+yvyi60bgZClgTR
gYHN/S79TNwozul8qBg+cxrJcbJvi2Ny1it0bceccu51jWqndbxzVo+woz11wgm04uLN+8bC47ED
F9voNaeDQH1M0FWbIwCDu8/2jNH4RaBB7Nth/+enq4yGV2TcFty2quXKzREfqKFJSm+e9YZpKDB8
rWGS0BISRnj9FCKMMswqcwjJcmVcW2RvVSlQdPRgWf+JyhUb5b+Gs+2+7s7wQVOy3NUgD+dBwZas
1Ats5qytDM6ejoNwLHbDw3uiBKVs4Zu9rPF01Ui5i6tBHmJKhOGM2dWbUq6r2KIOrdY0UsqI4Za0
PeUdzoFI527SIoa3bMP1hSfxboGu68g3zT0KQtcQkzjcDuTT/vgH9UN4xHaEQnNGQjWAjfRlx7gd
TsXv9YUcL0D2FUooLHmKL1tRuqzMHcimVH/r1+ncGf4sJHi1LCHwHt61sWOvYRlq2IpyZ1sGXq5u
Yerm9DsKRwHGamQhF2xkIcgQz4HEb8zTj/FbXsDpDGpdJGu+2u8thviHtZxNr+Qhz2ylFzJFpEvq
ov93cUoB0kzk9lW53KNevhFoT5Aqk6zy6XmO8u8tNml0S+5zhDYuAungHF7b3ru7kzOJUsuHwTcc
pxlNESOpHyNeCW6ME+r92R45SDgj7lBbqsAhQCV+AXhm+4w2utPavLZoe5XepWu3xipks8ypa3cM
VWu94xCCQ7mSEBS16dlik5cDmsEGaunmfkH5ufRVWeLAglDOa4IJCzQTBbCRNMezk7XUOmI9tpe3
wHWu7WJW0iRflohzl5LNTrugqABcHn4e8kOaNI3I1JZnxzT2R6IFJZ7KoGoE/3ytkbYCFtkGGxLo
axvF81WJSLbxoOg+cOcWSeo1YrZeKqAA7YGdu9VPVCxv2lOlYlgJMYPDBR+pC9u5U2Ec6ajPUCdu
3dI05vFg4mEkSG9zzJ5RmXp2wN4Bd+vLXV5JCcM73CjsNIiHcqu0RPQmi/Ptvs80k9Gi8HMBwGyQ
HjCgzG0o0qU5zOJb9cbR1sNOLc3Rj7lAoT2RG/IySTDXcgiBiTMFEFFar1amdKIFMt7Hy1YhaKB6
BGKM1gPFEVjFNl/dWivxuoN1Il6UC5xLz35Ews26FZKuUTYs/UACjv+2qzQgVrnpLbNSLmkMiWzw
L6Att7tIl/iISMjZukc6F0viDoFFWDPzzz/x8/ARJjBkp1djMOSHp2Z2mMyLd2javZABdtIkQRnf
6XdhO/xtJAktKfB6Hhp5Y0xfhflo9ZVTGPCCxlNp/dletjmKBfgv0jzu1+cXr+N6I5Qd7TDqJBgl
d7SyiFwDdleenobfiPpwyC7IFUU8Un7i+EE4ZafUdRU9BM+xp/chelAEpU1urPp7K2/XUV+2e+65
LQHoeJS0/UQvM7k2TU9WIgCe4wbfPGwTcZN1GXjGncCU0ZTW/P5oCL32OwzWDny7dZ0vwfSnVpLX
abuRkvrgWH5Kdg2QwradwTAJeebUaPf/Sot6XirxwErFP6dHHdUZXIKNMgeOuDXj33OEdC05RNJl
2IOLC2h7G1QWneSbVzIcac3TjVCbPI6Mf4IpF22dvdovvPXGdE0XCc5PW0jD0dnktXRdXS0DfXpv
0A0ykrMsgNFw+P9YQsfKLRJjLS0CsljN5auvLcAexer0dRrQcOgLpZyn3NUVXRmd7hRSGsSx1Zqk
FZZ1nMs7hhUDik6y9bgB010fvTkWdF1OWzPyYO09gxFdUHmnOt8dgW6Uh5TRgzYWTVeSIKDeqIxy
kBOcVO6eASbns5jrSaMAvwObrKvUMQNS9gbFwZvo2XiSgsIp6z798MUHRGMOJkJOMRby/3qko+/a
JQAXQNIEr+QzYT8WFQJUaNTxujmelVjH+HUqRLqLVMN3m8ER2SR9YT+2O189cU6cLM/A68Y233MB
Pg1QpTUmTmfGdZmpUHyY4dZWqNuQesw3sfFNc1rKyGccwYk+afnqiKypdiwI//0V2e31yaSq8bDG
07FVKT8Ak62g0twDMuVu+lSqD5drUn28dDRG8WXwHpl5SUTerax9pMfCNpGt0kffM6E+t9pqa6o+
mhBpj/qQVUU9f+cO01RkFhIBf5VcH8YF6kKTxYeERuSeUBfMIzcERTlFeYuxD1pQ9G87QJtborrv
Pgg7Lat70retHomYxpr4wDeFI2OdJxn+ITIsPyQoIcS7gxyfYEi7Ro9ORIUJnIT49yfPw3AMVEyp
xLO/UXTzTeuX8SG+BnCfG755Y9wEUYMkOWEgu9vtONoEFZoTtmZAT1jNqF8Onxw2fQIwtDOh/A1s
WtJw2A3ZXTp2Cg7Wi50nk3XJdvpjHalPm5ln28Oa/HzeruQVuTn/XrZA+RJpdJAXC8MZkYRD6mNt
5QGMvXxz8CPIDoLRWoof3W4su2z0H/ImKiZk+J3rTEuowW6tQJDR+W4w9xCpEYZXh+fBSTCgD5rn
mHk3Xp/sjLOYuhmn2BBbJPICNtLHcAygvL3XwJFkAe1LWaCjLeL0CitZekTxcla3Lkk27xbDkxFi
5McH0YJTn7M8hNsRe3jvPCtWLgKNsio+J+x6PO4losSPgCntdtmcDKe2hVg/6TXC5MHCycB4qoIY
u9/YxahgoAyFiG923+GIZdR67DDLGjBTc00DYHE6jWxoV4NjC9p42NxEK6MKQSK2g1N5q77M2rQq
Zk1TFzOl3S3MCJJUELClf65ch/5RoknAYvvIoCI8WCLIKq0ow56+BXoBNlS5jzPph25Gp41JFOtR
Y3az3Ube49Qn5p3MyVaCchS0Ep6mQfqcqKt+kl7yWwyjp+gpi6zE/c6Z/75zcbIiktMx5n9yLKtT
RHCII4xqmI0W1+l/f+GujvjC200hXvVDsPgVj0H5MbFH2KXE4hVUuDLtd3pc+0kFlEMIRwewVDU8
zNM3aGODwqUbPcQuzmDWu5MtOzhHiZz3gbZKQpUkaTPDIfNhg8EnnX07DFNLbKI3nffIDw3SqpgC
89unMZKiDapitWX6ytgb1h2PzrtalJ3HqQbKjrOVPMOMMzxK1bLiizNansMO8oVYixkSk/OTVI2t
Xz+89CFANDUTH0cJ/fl8FUhh7+vsDexYUnxlJCL4vbg8BfbTyrnczVdNbmkUTnvOijt5+eGzYsPk
snY7gedenDA0HXpNOXjz0zOnnvDRZ1RcZHqXOKBb2pLlSQxPbz60dw4ePWxCF/6xdByz9E+SdXEb
XH6ObOkGDmSOa61iC8325J2bL4QS4hUUmwTwC2hSdGyCiEl3cxMZVGW2YNbbeiiz3M8q4DX/1CJT
EJl+DTyLmbO3qGBoenWSduIxT0lXPQ8A1CdH6gMz7oJrrDT++WcCzM55l34G+APzx7ipK09IKifb
Z0XvGHIhQ1diFQAf3fRj8ndUrt/ysgNFnAjmdvLpHw7fQHZFP0PHfnE02SHRIiLesnygtXISpais
kOzETYx4DscM+Fc7qpE1uQMpm28XFxb6B3uZuAs/HvLBCt6ZGHc+2cdMpBMhhR7lDtmoey22ujG1
UYddGH8SvS5eonEmsIi3SSXFBak3pXiymnXqPcpk5QC5e4Pol7xe2zJ81iXPS4Eir6VIqyUeKSur
UFs5z4kKhDV4Cbz9gIC4hMgiS45q4exVcS2XC3wBWSA9w7QPpJlfWbjwJEHHhqIXVoPj6sW0J5K6
2ckaSf/eONynqi4HKbHjbp68A1n6yA/ZS0B10474b9UaSNnuO1SPnK6dTqAqnKQkY7iJawsymfp5
1hfcoQDkfNAydAuv7Pnr8bONk+fWqnPB0Zb2lFKmx5NW6I+okE5xu67L8C/XtIm4bpU6dax8drno
i4ImpEcmLnA381JV+5N9yVH0swu3m4QS+b+r/aclKYEsMH9aUA7weWzICynxYBUb78cFp1WU0PCu
76wOBf2ngS1zVNknbB4zV1IJNaLbAi7zB/Yfq+Hu9pa8Im58ES0azgjocTgZfXNnsPakLPoISBab
UNR29JDEza9LBEfVKfdJSOOOFZ6JDkASc2wKz1+JN+lGUAi1hrfQVlgE7p452luew73HuC9UDW0E
/OIyY3CDmWbEaSokTrDDaMM+4PokyHDVPTIwi8HpAADlX77d+HZevTj+YiIt0Tl+gyBb5/j2DFiT
54fUjb8DyD/Onp364OIQOQSNbsFmlawZp+OWIJqi4ISoNx//jh8BqJ86XljxSX+MLs07ywOXBO7S
MCjE5jF2kgkrCMYwVKEA6vvYh9rxn/+6THH9XV2jyoyZLQyFfKn5bbv/TI8EnNcKN7ybMhvXmMfC
YgSsALyra44H1AtD/kHyjPWp5YSPFlUA/Efq90aVnPqDNRSny75WuxpoPtkrIhWIpJLI2+osDB3b
HYEENAZ2cLShJ1B1zma9+QNVoV04c7bKiJE01B97phHIYm96A47Yn7xuv2D8H6odR8XvIiqw66ch
zd//6Z5DVWT1b5oKpDQId6vBmh5hA1ysiL6AP2sJmNoKGegr4mt0OpDuEcZMN8NrKUajs14sjUl4
4SH1HAlwZcjIGNIisGmAI2B3vpQzbal1IlOkSRBS/ChjwuwMmvT4i1I5rStb49WMPR4hZWBMjVac
feRgutWFoqxnkvJQMrr+5ryUveGWJkOBoBhMxm5Yva4HkEzJEjMZL38QavGHKLVpfMY1iWTM6L4e
7jjoLYQIDeF7kVqM1pTi2LPztoKDcF0yKrsuzHW+dX4b0aUg/je8QFBT/59XEAnuwwuIA4rUmh66
83ep3qAWAzynaYticzOdBt4x9PTb6hSIyReoF75nR7hQxOZiungd8gpRciKTWbJT6fifWQwctTvL
oMBzCx50CxlvXntwOrAP3nMN1K/5TWscuS0sGlWk2pkzPQwL8FxptC53dPXytb2PQhgk/SY8jKK5
0NfCO8ovnk7+hLrKaRbhWrsFJ3K6mJOY65f9zFi8cO3tcxBtKo02OA4p3zcoLjUWxTeBBxyCtGcy
zhAZiiQxm+PAqZEs5H0cxYuJP/n4LGOKsD6lnL2Q5lcQZJaYpYEKxAMvEwy9S9YbTVtGevwWP4mH
C9gy+VD8zHOG99V1mOHMtJJP0KB8awW5VrCNElo6HJ5GESK2eqfLx7tWEkwrLVNYeCIpCkgBp/tJ
b4NVnterYYfXEfYQWleUm+0XdJMCm98y5uBs0OLbYUFS+j13GBkeSUqxvtmgd0hL8YpnavP2FP04
ofAhfQShQXzIMMSb72IlRhEgmcreJ+47rMTIZW8ki6C+4NLCQeC2J8vbySdOvQJaall2INpQFE27
7pZdpaRKZGdohLjea0oA/R/MucLM+sJzFhUFHda+0Qk0V77i0UuGP6g/pR4icq9oUc6iGHsemAuH
ktyDAxvep6EaCgvmNjbzWFbRlOnJ4AG4dA2W6fVUJHxfrsNih/6oCYFyBDv6/dB3SzsXnX9SZsOn
31d6wVOHojfHUFmsrkdpZpxtu5g21b6wUUhG+jXfIMKEAka9jqsdS2mvXOqIWPYfVnbGUIEYfDUP
UFhdfGzA7w4L4tc7CMYqXHtx5AwI5ueIUJVDy6ExnMkpb8PxY330fVGNJwwV6OOoInryjaLJ8r3t
It9GyFDxMfa9Lq7i5HE+wYm9ClyLwyVU8+fhts5AU3CWM9c0GMO/+FDxixhNwtfa/KiU7+WSozYd
oxH+QkgC3GemRUqQ3yHZAJ15LaVNPSoACopaNhO+9j/TcqxWGHd+nm+6ZJ9c8Aq9Y6ELKLZ9ZNiq
0jCSfBPo5XySnlakDgIBYOclZFqXlHO3x3hpU/zRE6HSpas+ArPDlOIGzJNfBWtDsTf5WuSedXf1
QiCZ29+tHxxvvYPys6Nr4YMpB+yzRTN7renrVkJZ0IhJazcl4GBjxeZHCO8+4xrF+jZdHxCuCNVZ
HgBhGNjnhX7f0MrLyplDgfEeMxRHt4j8ZXVZL1lNCP7V43T9EEC6yMaMCn+okl6IDooxIH30Q5IQ
Whl0x60hA+IDdfORe+ddaR4nGB3M2WY4aHoAEMZCtBfOHZmkl7a1ToOK3ZBPDquYb+Eg9VuEe4H+
pmYz+OGOVmQvm6quxCRSa9a39gobxcwE2wa8c6pnVEsQcb3QtysW9oxyXaPKRy2SoPKl+aG0TLv4
HQARMzEHLF9UWjwouoWCi04jTXr2MZlygED57ydLxmAi5BI98wsaZt6bcyl/FcrPjgxyEZx9yn9X
/FJouvjO4iyWIVBEj4587VPJNBfpoOYrUuj4GrxFrT0UFJjll++pi8p5lUaZECwqfk5pPAujF5kI
C1b5i+SWinzB9GSU4klV8zuSYv5Jixk3bWr/JP6Dx1JDNgrlmLiIhUc8RKPzAtp569XVuyGcyfL6
7m3qQDYNIBXJkXxI9k4v7dChZCHpym+gNyi7DmbsuMvNYXwb1iKjkG3p82cdWY+ggKUQ0KWWVZsi
E7rCQt5kmojyfCb5CiMmF5vIkkaff2FgkmRNGqnW1JpitXZJJW0x8Y2O3cm8NCRzEOIqELSvYDUM
zVGzWjBKDSgipEgtLNHG2uFhbrUZOGebwvMvrcW/tGsKWxMp9jZUZPjWcJrLT04x7LC5VA0SG49D
x8hqWrnRcra2D4c403y1xBblKG+sBJoF8a7R30zw5ZF+SJ64BqezER3eK01yZoHuRgvBVd/PSS7C
OLlv9mhbIYs9M2H0VbapgDe65e25KaUV+fWKmGp8HLXcJH8ypUlAAy6GPGctXY68r9w3I+48w7GR
u/XtHItoj5Eiq9VjHGPzlVG/KO2W9pjM79t7RIoJK4wT2K2DPvYDFcUNRZlD2v+c+rBNHiTvzFWd
R+aSMMg+z5qai5qGe8gOqSkmsFrS6S+t3BoC1OSrNqkquqcqQnkgfzxQiuF0St9riWfjLZ8E6je/
S9QuvpsQzW0ZUT9F3ORacWZy8oScFI1W/U2slHdXocRTY7WUz0zPhMAk0JCpJtI2vyIxEvb6Kk+W
AAl9DnbcPPLRvULmol4rWKrL2dFs4iqshA06YIlMVv+czL6DKVvYEhqx5v1vBdGFOkFVrkRrOzKN
aG+S92TFVI31uGczW++jqnl4BLf7KFIjC41qbzTKLqhPNjjYDKvr9aCGpePCUElDCawn9hglAj5E
dDV+fM3cERPD7q1oj0I8sy8wrX+akGBuUVnY30uheyvsooF85ePzAFcQr+IBr21u+TB+mMyWy2U9
L/lYggeCBAnaG0mqgIL+p1mFzvXXWV6aK7ReRsRKCoRAoqYFyMoIDCIfMTlphSE7sNoqPqp2Qkdw
ZLfXQslQhKEwfadHlgr3YNHsLiLoKy15c3ms3uirB0/lhi9r0Fc5F2n+KZilEA1tpCcBwLrAYy9x
nh3svCV4kryuOZYz1QSNR0fNhquxiyiZxIe4s4Cyz0z4zDYlgElLLuIfWK+TYFgCtYpasRXIHNqU
/2TVd6hXs/S00gIfLT4NMgHrw5XMwfFwlSDBAZ392iK4woZlSuOAaDPA4WVy03JaCRJ//xd3IgFX
2krOUiw3E2DLGKp2K8LrhuXw8uOWaxNuTaBE27z5PQ+Com4xpLsd417hQj81nc5hFyxThYPuj3i3
yx9mC2Shpntk8ZOAZv50rd8QDl+O8c2xmb48xykZ04T2ZwHu/+5uNOfpXLcaRHeOD+s7EokvI40v
2KJmF2/imXnzpCmKmYeqqAETph5XcweTzQpccHfnpknnCVoUhjFod8mpEGWzqRFkQFCrSZL6BqJ6
fd2d6VnwAx9y53/P4MbISrqxnyC9pYq8poGfvd3/JQwXYuO7FWOReyqb9o1MR+io7AxOy6Q0A/LJ
jd7ZERFnkosPmnoTBHtgj+daHGjUPDpqgCi3mxD7kOUPa+z4LV4QvZRoj+2Tp2tTGLse7YDDkHMj
4VBYYqBbX3p1uz8r6T2BCr7lUCKlhyNyASSlEdiSLMoe8DzdzuSo/AvGFE5rA0/wc4Gt5F7AXU2h
7nYHS+KAMEDuMaU2g60OI30/vmjpWirYnpWoF6ImOkulnE5dFs49muIkKInlpMBgfbpflW2NelQD
e9LEXdzT+wmm3aAumNsGOgCi8A44uDVbyrO32Xa/TUHlXlPgK31pDdVz//TbUpUSONDI7pcH/mc5
AAgUcLTcHu8Mw609AqhtHPZGC6kwqaxxsaWt5H8JOaXCF/0abt9URtmZgqjYfR2e1wI0iwc3HqlJ
gtH5cdKd5QvmwePS/81CicYnE2XrvHhq1sXo6THr8WSEPZQvv+z6GMDIJ6s7ZIM6s2jIVbKezHJx
XwMgd2L8RwRB/yPdApOkevhazxj3d1shx7o5uXLuvxcaRsop2Hkmcl7sAQP1mPT4reWQtEnB1I9K
K2CG1BGFmamuXWwGW2DYZGbeK6MSWcSSAAV31qEnmCseTBFqXdRA/BglNYLnRi+rSPH31ZQDdomG
RRCIJkya5AiSzbpLYxk9UYgMAi9zXZlA11mNA+Hjl06ud7y9H8s1mMppnFmvaVes5SXnch3i/jsS
LpEb/zsZuMt9U1NK1G197ElccYXunOkErgKbDu19R26r652Bl56kaVQymoBeuy3f9ueDto7czOqj
jPOaV5ofADIwNkGiKl3hyNuqBwEOPVIqLQVIapqllTZA+HJehHBCItIpvGK9/20GPvA3LWdlMN1Z
0cVs4T90n07fUN8YilmzRjLJJttIN+9WyhO5g0P4u3rVrlWq132YahKe6RJ6Mm0TDCY/vPcgT8ch
uNZ9ze2dqSqkV1XuEUq/HC6yNcEPCWWOFbakcLvObu1APh28H8GRWG9TxE/n7Xh/NGnTktp1jwCT
YkFu7uaOouZ7LXnImvo2dwKpeSpCik1pIcjI0+XNf42uh2vvp251RCw+MAiNsfqlXGl5a97JsnFl
EcnIBL0Pv0HLMNPn4pEgtV0yyC/ExU0+oLhldcHGCngnZnOlhr3bDq5Jhrf+rJcXRh/XGCnDMsat
jg2THBQ57pswtSgHlbsq1oua6K/an5ZR/RmNCs+cMFVtr1C9i15gn73JnNfYcf2bwC8cqDG4FHmW
oXLhoqzQG3yyNeixiHyoBXbeF3DcOzdWIm+dxR1BTVSNp13DOJQyxCg6Ss2iCALsuvjxR8DlXwiz
WDBzacq61TAr9SXuXRzt16KBZ0YevLQ53TkyOuf9KCQsNlUxJLisiMuDD4U0kO66nEtbSMrJRnMg
lJL8WJlfUxjUqQHolABb0KlvYi2s7caw7xj2xkj35ladPEPlGXahwtClIccWjEdaKKtP9C9mH0nK
mFyNTtS2+QMRDkhXzPZp/xyEl4hyCmwb3ZMGxG636OW+z85HkUuN7hgqAo+A6WHYnY7xvub1xPZM
W4oqg9RuUzE54iHmnPwRzeCW30b9+50BAW/5g0pfoFI/Up1hWCLT7ZTh4ejibmA1s48ZwkaKOS86
R0ny9ptN7NC6mrQ55i+uy1uOj/REvLZfpZ2/th4aCmWHoOEUSDtapjfV43m3TOoWJbnk3oOwINSA
c03PbPWkP0+sB5bj2LDaMj1AXzpc+irdKnKGKEHHy7gOp85eG50aAkVQrE/aQDfJEJ34XwoH6mXk
P6DDzxSd+qQbOoMhgebfZSvgbh7aALhafrIuY5Jc4xXJ3ergrordSS4gR+z+fvbwSFE+tj7HkWoX
jPvcH/Cyj2hZjOWHPnfTybWYEDxCggLhh1wwblyb+HRVdoTFAJ58Vdg+yseqdliv9FW4zrFi4n6C
QaL28gCcSzbvqrZXRMWqqOSmPm4+20r9t/QUtXvaZiPSERS0uem/Oxe6qh3IHoHSiOMtk9EUXy2X
l244GgUZbMbrhcAC4hWZvdTaiB5nAzcUkjbKvEkCxZabBpmu0W5oFmAF/iGkaRWSWIE+xOv+I1c3
wGwRm16rv2ccfVGwj77Ryu2WACFt8inX9RYm3stwZg3dRPvwsZfEQZcqvN4Mxis+nk7sfjPF2gUq
BN3jKNwMykZ9ghW5HwniG0J2g3qo8lbUsjIMVRbFQT8w7/kSftdkDGG58UpkG6ZuaejlWaySm7hY
oMpv+8TgEKfkTJKpr2gFIgxuNtUx5VJpVeLuBgxCrg8pFvMka1sWSVbCcppgMHaHxLo4RYkWZaGH
avW4WiSEK0u+8a+KmmHt5wdbZ6kd2JKWLAfa8dOXp/OzE9+BX2pcyccrJKLAakPSPr1ALX7Tko7v
YC52Y7j2/XO2075Pi7jf45L2uoJwiA7RAwM5zSpmkBMNgT6QBgIvcOZM16+bHaF0yykOj1EjzLxn
lRrwKduRrr6XnRXYGVhG1bNOZkJH2JRHCO6n6p8go7VslempdmT6ge/BZ06+YGec5r95YsNdkfOB
atq1IPzoipYA3BcpE33NfoVuNgFiaeZclP3Fc4Ds4wVSfbVS/DxS6wLWr8uABrsNYjO/LEo8hvFz
juRjAQO4Cr63aYiq4E3Y3/XzIFC1Vom3Pz7lidTY7bQHGAhVpW5weqm4bawr8+95r9ExF2dgsCh7
YKAjEoLIAaPk6ayhftlZOEmFqSE1xt52drUeIZjtESCU9I8qfMAnYy5gvpI/DCJlnwtHqIkuOAHV
zm9nwiM0u5AwTNJ4fsolcDVc5r8FPdSZPeFcX+uPzXWh3Vsd5/v5xLkABGynYS8+gLllp9bW3uvG
75Bxwn90MH4hcFwadkjq5p87kIKBtb8r4yaHxUzCBABq169HwM93k1Qp5nEu+qaggnTCasaDaKpA
2OV5iqj52yMHgEFSs5mzc9jIW9rAvstfQm4hZzS8XWj3GR87xwlJTKQB/73DN9iZVqEipW8WKPSh
R0hIv9s2mB9KA8VgbOrYI2+Lv89UAsl260qMBuZA2Tlzyp8bCMLePAKtysvNZB+eiGPpZU2e2mEs
ZNLLYKsoEpb3OZg040zZmmXiMvjcCzGBxCnJ+eSWm8cAipQtf0BSRCS8aisb/hYfDIL8FatLv82N
QNzZfMFPJx4AyLnzQ+RZ7rjBKOz3ROf5oZKiGm9EXajpXM3K5B2t3INwHqb+UzFYafmCM6EZ4Wij
cVhjnqwJlUwyfZk8RHQaUv0CK7L5wlyIA108gnKg66PmNbCOfbuLwprYld+4i8Z9B1XbyQI8AKSb
Uj/8loLet8jjLGoysQ7/7illzp5b4lNp25YfYtbn7Hm4qwhs8xrAJlf69yaLvNS6wgkjnB8Npf1o
tHbeMsHZnnf3ZKaOUW04FWyQjqSxnVlYQPDXZyKLqae8NPrVelLrrlkiaRGbxk6nq/l6IRKl5QZk
GOlSz0HQn2bZH0sp7yLUqfF28MU5Nb26BTeXW9HmcDNyj295xo9D0nUojQjknNT+qxbOTnH1sVFr
xv+IKFi0rW1llX8fFTaQvEpi+7lkOQM9wKxuHpct/gbtYH6u5hMPldmnnlLlBACeAbQfTaK5ywr8
kaqvZVL65NboQN3aXfVb5S6lT2zI0LspIqrqhDvdL/04JnyZmd60kiBeEDLTtLMOgXrUTPTqTb7T
QoFKStLtI4z35CcIUIdY8dfUS+3PYxk1gQbqsGaevjaMtNid+S2gMyBmV/8Rzyue8h8bV3Zmyf+k
CFNAAKvP4l90hGVFbFhcKDQwpyy0nJ/PrGG13gXdejixWUdaFe3T6rBM/oAEdyb60rdhMxpo0+ih
fmwhbpBjjEpiDirPW89jMymjcMClIA3u+fB4ihzi2XpAKsRzk+ej4ppuE2XL9L9mN7aFyr5oqKTf
LvoECdhCdibRxLjEdlvdZd191snY/64gDV6upvKaidezhMmbqcm3uFO83Xd7h8nCp5AURVogL3e9
FazDAZ42oBQGt4kM9wJDOfW3BYyCQr0pi+A/RPUUWeYZagXRxWDFdP1V+4iC8xd9M9/o1fmrXqXh
lUtivaNf7Itjj1bEVhtJymuTG8g7P97Qm+CnKgSK3MhCzoZ38/NGYV2iGEGV9ZLRQ8Yk15JHcA8s
lOoPXRB1Z0nXs0AqWc5uupHWODmc415P/plCYGNzyagsCfTb6ZlbfsGQ/RWOSfb9lgW2JVPzYPxj
ZgIsW4NMctNNEy/X5wfIEUgfozN+7EZtAXLqkOwJmHky7Lm49ZSRLaCNOcJ3OuO9QMpqw/U79Ih/
bJqIp84sML0g5Mz4P5LNFak1B242uADkeIwpGNyGqSmppC6MeJzGeMH2b0O07Pxhnir4/AWrSK8/
FYiMJFWgjSvNo0RWaFzsniuEpGmd8BHCGsR3SXJzr7PHQHNJEVLHBbDoS9d3jg4Z4zzrX5/6iPMD
S5Np6WSJ0t0LLPK0MTJs3oye6ae65Qw2yvnsXKPAi8cKHrSOFREk7Qhy5Bf/kiV4fsM7prNqVuLD
40vtLSdYtlz5zjAfVTCdtyXiFyXQXsPxlWto+fGGU235SE9ZkDscxdKvvsnGKKhib7qfTueI7JRY
r/5I9EHWbdqbWPJcyflHVZGU6j4MYIlAFi4itFiqACCwMu/1M87L/Lq9O0FGdJVSiskdDaWHOq20
pOzMzv33Kg/cEcNai5UfHGMflFS4KSbEKmK7tHNzXDJ/gCL6jNEFKbosLH1nbH628Lq1G3tTq8Mr
wP1L8dHTRNE+POoIGp54DRWM9wqkENEy6/bsaJu2HtTyym8AyuQtd5Em4Hc148o0e6AnP6KkggKk
fTteWqqHAPE8Ruhamx1J3AF6KcjmCdSL91EeBhj3L0jWyBTQ+kh/g5iQRHato9cT3t7r0SG/vCU5
/W7pwoDdCfHLmiXWpPPrETWunV9XH3i9Mw3fZ55bm7DZQJLmQ3Vxkkw2uKpivqmPkQ+1mqSzG6rb
KhCpo5YABvtbZT0BOV04OpMMz0a8/13ZviWqZ4dIaFL2uIibKzfDgUMurM677mLCJqogoWyM0niY
VdgeobJrpG8BVoqqFublT+Kyx96mLFp2Q1XoxApPJRkHbiRZL1Q4dLGb4J8VwSN/QUO//USMt//f
FqFdlaxE4PtnhlLv5vdfhqAzx52xNRMPZrUv1Tj6hTpDa/HYN7q5zsgMP0VA2UnqGmYHLAvwnk7G
kzgPVsPeNwzXtFkkjxEic2/9fSG0TJrEHsQbdt5zyhxHhFaYyRhspxYdhj2f/D3MGjOt1dlI5nPP
CQ8R5Bameb0xCd/qY8WHs0SPSKLHfN3mqIk0tKwV5t0ILSwt2G9VgZX3Ua2xdPnKTr+pUNY1BHid
T45RWQKjo9kUC77lOUaF0QfTVwq/gDjquC4yPGXLXub6advUBpHdgniYTbbEK6dZEth9aunnLeHX
3r09FluNDcOkFrvxQbZFn42m64HdtSCLK+krcm+zT1l/kEz8bFBncKSNV9WIk/5pedTvP66eN6vX
CPTRk5vUidj2K9gPiuq6b5H+i5V0N0eFZVSeHZYeYtiBcQLqDCjcpJUAskQGMJ6Us9omplt6djwp
YZnDptGN8dB1jEH+9Zn6YX5eD/9dB7CNpoXJhTo5ZSgYG/EaRRh0b6bT2n+QFA2jOHK0/utJ+2dv
9CRQNp27YmTBFoT/2ooq7HKsRBxBceekOxB8RV4Ez+79GPdnz66gQJgqr4SOyeh0cmM1uMFIeenC
1YAzu+A4HAErh+WXwiGTvkjDppFWzbHfYrZS1yR/Y8xJBkx8HSvZQn8dReNZ9Atw34Q46n9xLbTm
EebndbfsqXKuRpwpwgYk5D34mYAuB4hjR88tevC3rOMMP01AgjYP5hp5jYDJZz+qX72h87I/Ht2N
eDUx50X9o7SA1oCdU7e5+cbpl+ENqelyzwk5stO7jm+0qsOCgApeAf5kLI0Z94KZdjM3YtGCDxNO
Sx/KUPlFJAe/chGOaLvVaiWebBTOr/aWtjnP6kK1w9we2CaiwBtq+lJ+3m7pSoDPF3zf2RX1A+Hc
rkpdK4H/jK3suDWh2CZfC1fv+lSSh7D0W01/lyJVpcR6IjTacVJVajc2A12He9ZB8V6+7aPTr7U4
ABWBhigYmNNSQyoMgBXPEKHn7aD3syLuUKE6lDJ4Os5OKbXIoNvILs4uKu94OXlkcZmH9f/Tym6P
yZMNIeZOz4TskLobIth3ibchAz8Au3+r+WJEwtqZmncU0rmolW+NHHt5imAeelXXXzvn/JK5ok3d
uBA+YXNFhYkpcCjMv34upxYMKTybzQDsQ1BifP3JZp1sOyA7/2bAkRdpj2//kQB612c9B4Gk081l
IJn5vyRKpJCBJpnvUE7N+nlNvMUDRlbyz2dhnYeDVMZ4wpax/8UM+/i6/sw48UCDhGfFkNLIwbBm
he6B/9yds2Zd7q8zRqN9TByFOGBtmc2FWgG3Lj9e6PiN5vUALTAJYD2QjqJ25cBoRr7+v5YVJQmq
r1sRyGOmtJqtAPaDk9HNJpp8XOQGK4vfHOcnzlaMn0Hg2ALe7iy1wMKscPrOJJJbW9lUfrvbQXw5
eKenat7gXZlmYK4Z2IblOczU7uwC5+jWtIsrhvHmEASl/ilaWxxqY/6/zBP/lneeOk0tMhVTP/VU
5dfKIR5ZOWmLEJUXx+BaWxJ1p8OPIee8RE0MIXl6w2fSpkM65/asFqYpqSQhr6cb6Km/+xlPJ6LS
w3i1kwe2tL3ktNXXIlrlAf5U/vVcX9o4N4UDZLcDAZsRAd+/j8DRLiO9F5a7N0NXj/yQqH4jaduo
NDGGW6qIY/G21HdMz3i0Xq5kAZALgRmQvVDEYmKV+XRqqtdOIBc/d+TrfNdVkEW5eXcV1Q7lXDqg
AbyaJecbYgVoT6q2/yIozwtCmu/IusBidpVxEpjvezNa3s/aUJvHh79LGa8507xOjSYOe1HA4O/m
fTq4U0L+KSdzb1HKdR761GUxqiTPG0vJqF6vLE9C//yY2JCEoFIBehhwQ8qWeh/zj09xKgmgv7+l
kMQm17pgIOwpbC+wSfgOm8EWd/sa6UGFIUJFYkkzBZfYriwC3ik4mRv6EW5+Et94TAeX2+UU11Ww
ki/plMldKNe1irDd/hAS0HqjOO7WjZRa9aVsnFq5YFTyxD0HVbjmWp68lN0s7XKLL8xOwrf/7DDP
3yW8mZ2+31uwPeS/Vf3X83Xol/7ph4hvEL+QdP3xkb4AEzI29OMnVP5fd4rdGQi2aORj5DTG52cd
Ooy4ZklY9yCAgfYisH48HaGO0Lo76qJU/418dwkgt84xwWMMtDdGpQThuCaYyJ9+XzXEsRFWh/Hu
gO6Fy0aErbi3VvVYYmHOSMVmgPi8lJaV9UmsRMO5IuoiuFaCKkm5OAJ4K5NEkQGQOc0qafaX93bM
0VCB1djnT2r5tNT2wyp6pLgq+tQT66/WY//drJWk6MnoZsUCL9hMdeflKr/Yy0pnKkx3JU053+ok
vKRvHhd8KEKRImL4Ru18vL+E9Gke5AJz/58qdAjZ/cfuDVBN3ffpRbphckorkDKVjQDDBWkqSmTJ
KT30CTtbctkfuqna9QF2kcyjfuzDq4dJ7VVASb8CZA/9WlsbIckkMt/UPMI2Rf/39dXYKx3jqvuF
SOb9r58+7/WhRrM5zRsDPv9P2ffGIu655mToj2ZY9cDVpVF5IUD3trux3gWVWP7AMwzAtDvr83Gg
4d21o14bKM7/5o6rXJcBBBXb4LQoGrJ2NSuB7/2BSOGcgF7kM2JLlLb1b3VGPBmAHibJ/lViaIYV
cE+DYRXA6U65SFztxGQ8MJfuPlecYlQKNTdUSG+nczWLRDK0cxZTHUYMtmGrhZsEDlc0KCDi+frI
anwjqTEHNzZ6+Wc5HcFAtJWkIWdleEhq/qPMnperYWmqLPnSkm6mrdaM4woAbryHekSytW45di+e
HhcY9I5/c16i7isErEn+f+aVgHGr+tCKA9n6+jb3PSdeSsSoiFnJ7n3MKKmj19hsmL4hi3d0Im/h
a9pO7rOFh3OkW6sy34fgoSX0BS0sHogTBudJwBejtu5ohV4E+D/fC5hncw9zJzEadsAK3uTzv2Qu
TFx7N75Jo695lmDGW1x5rTLXdVbz0YGQ3R9xb66aXgD/JAg3MMlDxWC7315XdwL6PJ2qxyg2aily
FPZR29nYYFeFMt5Tnw+gcluHWAJJ1uA42FMIirSJ6aSf5o9VnmXa+fYpc5yMc3IbAGkWfpJhSeGf
zgonVWrse0AP53I7YHOyApGCL4NSjU+5GDWXxAvSs/8evdSrI/YhHfRXdgUds61e8mHZyazQKSZn
48rv5daDPYFw7d2MM6gLSHgXMm7+2Jo9DM0fkFdZmaswPDfkSa7eXyfbi5o/Vnii9Aq3XXsiWLgg
3bs0hzqEx9y096vipx2aOojmWpOlI2RVC5adtHA9z6KIhVoQsrYVSNvw4sR5Bx9BFED4CyRFNJx/
uhuyILVwkv+/HyczgKa9pUNJXJKwKsbya6fn+pM+BlFynDH7WZIJScwK1EZIYp4MxcKALmUglKue
mw1YCgdEcyg1ljlTu7ma25sVgR4yS/CCSu3rYDpZ4xQBkaK5smQj6IQHD6Td9xL1Etu+F43TKkWG
+OxDvRP3gMbL8Z9YkW2FFCIF1KK9lhP0u2uuZcZZHyL+ENSvKuE/CCEd+eGPvrqQxjJIQp/ZuFKl
uykdlmgigM1OiKmdeGjbg7LkwIYAHeXC5RdPhdDgxdJ2Kbh5kgEzrxjRCtgrz71OhwZYYUWLMuqx
UxJ0OpCKghLVGNDbuUrgrj+ugVWwTrnPkKsNe8U1Gh4iCoKi5rcZFb4tx6KQOSOHhJb0nAnqUZJh
/wh7dlpq+lQb1yItaZDP1SOYdJpo1wQh5qfJMco5Fw2jFyLozzUMquBXYLUJbthGAev0lodMoN5T
025Mp+FAKcPw8Vx+xRw1tehe1WrJLie+5hD56Dk/BFi63bAdb5pE/c5OpYQu19+fBuxvHf/VKftR
dewTlKgCm82cQ8jU2iznoWlyExUNfwnmO1/wMckKqPXIbsF0F5AbZ2bTM4U4LZeLvv15p4gPINPv
iT1bwke6HbWD3rp1yy/gFtUkL5UgTzs5/bOOeON/PdyAh6ejq51YrjxtzkUt8q2j36Ojp0NANeZF
L/hikeuiEI5/AOlsPGFMruNPJ/FxgIy6HR5HxNkHpn7AshMrxznIBeYneR8tvcXq6VZxk4bxhNwU
bM2H2OTKPBCHteZI/rDHs7a5XkxFTK/s9l7NJh6XGJ40uSxNPSwqRXvsJ/oo79YZwJi+0RzFogRF
w8Vhi0jB7lcvjEYI4yA7P8MtJthbqZGX3b5bYBQYYi/Ur3sEaEvDL7YLpvsB/v1S2LRI/IO/5YR3
JLMh+zNFb8dCS7ps9wXvKRMR7WjC/EKsQXT/nl82MlxEuXqRWXG60KZ3r85BJJ9iBNoFSzkEM/se
epAXESQXWBCjUnZwAB0IFEZxgLMMN3bYnqu682Wic26LL4UxTRpxOG1tm4NgbWcWCUkswILHIjLC
fsYqaxMa6oSs1Q9J5WsnUo4/02/GHMmhXXj0MMbR5Mi7x1BJWLQ8Ubi3rOHaVmvJu4WtnrhNK/MG
RSO2rsj5qX8bKzhWUKXUTylFkKt2E/kl35RG3e1zwJdswz9VQIE2kH0JKO1nfnGdAJeyW57HFeM6
ZGuCGTUnBHu8yXXBarYcxXs3gsKadXWu6JJC1ctBkyZkB3Z0HPiif7hik++erOx2HtWlk+lrcO+5
JewhBINxXLxktUqdG3STyiCp1L8UIReELoha2qU/oqxyXym1glhSi+ryfn/Qe1lOOR5aCeP7yVSq
C4nQDAyLVWgXR+ZLbYnWYdCJ8p2RilIhZuWDFrxsSSj1tU1cdZzGVxT2jTDiSIZG1dRTtrrrOozf
+mWCS90YBFCyv2Vtasa50F20q/8n/IdWC81tylZq0O9mMYhkylrEt3QtO1UNVwW6Z2iTlK/yBWTU
z0aiXx74xYOhBsaMj/dzJSZylz18kTmiFDeW94FxoaieGOgixrNREyccBktGq+Ay2MWC1qOWz3tt
nBL5pwzjsr6R1+mlJ65lWU9MojI2IoV7km1hCF9rbohKdjF1656nx9deIFAUnSnS/MxSGWfedDZi
qZH7BC++eRVUcF9kD/kAGW1R9NAxgWrJMkF4g0zNrUjQDEefoYmupI+e9elAcshSsCLp8efgqlGe
BTaPDPkV9aNpcYKLoRtZnja4IVCMcdSB1JY3Hiy6WHgKbrs3lm506ClsVu2wQY1Eq2H0RhkKEnQq
+ryDbmVuyGqunDZw3L9miBN4CNC1xGXo26sanWhmra0fhi29UBMhxCnq/cdsL1YrYWcreiTVFT8b
fDk3oua9mosOUP45oCWqb7gOoZgs/ZTOfJNTXBQEcwGo6hGtKQ6dD0iGVz+2K+OrrmKPwFsNRlLa
XH/Ows5wBZP9304gAOmMUBUcFXwKmbKl+cJc2xJfWaVxflSzFc4y9LYX0QV3247DSwkeft01BzFv
mcZMfpGcjISq+VFF6EPctoCwZ6iVSztgvKn7Z+HGCGGA0q8EVPzITUrUGXVk5us4vgWyhXyLH7e3
RTOdJ0RTlRg/1DXq39VCsS6bxsCNWKPhM9MdXRvfsKHFTfA4DGAPeJ4gNRLWiuc+gSOSyJDeTip+
mtoRBB7FL5lqLbj6Hz0FB3kAufOzMGuriB0ZtdJQL7xTyJjCAZcpDl3G+PEeXK3LcrNv1nFRed6/
FKFVe3m+eq7ed9PwKrZ4CKqSyBF+uG+ln5WMUeDonb1LpWKEOG0/f4fTsfx50hm0jenj0clRXq6A
dDubpvofIeoBPpQNcflkodkuQeR1kHqxeRa6O+BBrBILuZlS7uvjMjpQCi87BDhLZ9bzje08iyH5
5J9Jvtad2I+x4f2gyMNQ9boomNBB8u8IpcsMSTbAxv+/KKNEfq6RZXJx/IXdSGnOwX9HpxfjnpB0
PHhAolK9zr7SimO23CJMuiGz3xdRU7OvaMTrr3Ms9e4Nu1fR2MQlMMgunEm+b1d/Cpp8lm83HmEJ
/dgesT/ACkcePqNbfRiv/+Q0DYg/mRgEb30DjnOg2fVLQUy1PcN6t1dKFeLoyitwD8JAkLsUQxcQ
7+aFv3H5WbqoRTpBSMEg+n9OnvcB/Be+Zt/NrI706P7abJJw7zoZMKxfJ43vlCRaakk+2t0rvQLP
ZSdyvA8H98CDLs4uzixm/hjCJKfjJrOV9HanVDaXJHQeW3Qd//kb5afDUAhwYb77Duz+n513HpTS
moQkVtyKnj5Rh/ncP09ifQGndMKYDsU7nk71UwTLyA4skgsfREfSCtU2/kpy//bykZs0gkq9smVD
LOAnWoGq+7xCp4auyWzXmbHDzi+iMS4HLg9EVMHceZQOX4kLR3OFDbREp8QV1HgrNDIDKgXHdl2G
DRVEVBqmvliXXnfYF+3Okt91gMlhO/G1s2B9uqsZN4j11uNrj+E/nnHkD1U9E9YWKL1+t/ktGvew
6MxAgdd2dQCJzf/GYyUVOKN+/a/2yx2gvH4GJP8dTqIaV0tPUt3i75V2xqq4tHI4WyeQuPHVcwqR
M3Q3GX28oVSB9W5QigVJyTecdiJQ1j2i2rHODjiQrVRh8v5oAc1P+AsOKoa6dd/8wCwSbVZaI8R4
dFZZ7vTiQnYFc9v/AzLxIr3zoYYat1IIYolLsyXDT30OAesVHLYt2cC7fIFSXNEgXn+7DFn/9wn3
+I4p2PRlDQZGvM50Uwzr4AftqDj1V+fTSjLSxCoxrTFm6lcfzifp6uAi3P0UW7+vhsAMnIYYO61E
IUon33kwV68A4hpvMF2HiF0gT9aBDWgCHkLb6SoR4r5sQtV2bHVQ84LFxvox79ZEgB0jHUdNHyuV
2EGOQUTXZTbdE2hAHnenliw+CdmwYmAzmsz6ohqxFYo0dlzRCkCHC6I0DrVi5l5tngMb6ikVmOeN
eFHm1ZyQImFJqLjOn7kbQUB8xdfXTrzxP9/Jb8AtC90mbYqgxpssL07COOlKl5LtIMhsg2f6i1+F
bVnSDOM+IWKw8x76K09WZQrhSHR/3CFey1cxTbrf1xb87hnGmvLhj/j8hiwnz+351fGy1cDaHm05
MXxJ3rt5yiQACwoQNyGCdDQmqF4HWsWYZ50nSu43yUd8pnroW1BNGcAN1HmeKNPrkrsu0YS2Nqm6
/ILgyypvqGwJNObY+dqFoRYKAaVTkOW/rZdmh9/JirABI7SUo+kRYR6CpZgcK6R9NCY3THY6hlOF
HiuG6PUqDeR/YjAocfe8dGiGsbn3W4Ivz2UVa0hk2XLxgLDbyYkvHqVKo9gDF6zwQoor2NKQ1Q6H
FWikJ8uQTJ0+gn7cLfO9bT2wZBFtHHFFHVuO3SHZMqAwUw3WZs/eXGaLGoB69xww1hrAXKUSWHSx
rQJRLglSMFzv6if5yJfK93qqjDYRAkhk+mVDAg0YurwVinM7A4LUUw07wo/NRxYICgWG6TG8YOK9
mB5KafEpX1mpKF8u2gVNI/QKyHxFoQheUHUnTwaAhxF1TxytJAQ5F3PDDcoadu8eFzTA04QZn3Di
ZlTU51oyO/shOC895m58Dpj4AJeo22YBlUPutUvNoaYYorOVUavm7t+UT3WJ3UEsp96hw/QpoVAL
2Bk2QYnROrcim7trhypm30Xw+EssdCnigC/A9BFf+0SGnwngnyecU3zAQy/2Li3qDCmmHiKfE2eA
kyz7Se4dCqluezpoWest3yp4YICzynv1yBvzksQDaOuXqKpXLTTREwQoCi8qoMFIa9T4ep8oVh5R
t1dnAH6MxQS/l+ApEe7l0pixTvMhGkB+VgUE8HjJNDBL6uK4IPx4kcuF6rSOPlu3tJZvxSjx6Vui
RdziPx48qA6fylFH/w0TDWjW9TQlPJ3oYV3+VEdebxU6y/jlyXi+/UJbFywFgULjopx6lrDuf4R9
MtDES1PgleS5clnV3j5xWTC/EPndzwxEMLf0W7zE031kj5nCF8UFdYecvADdjsA7Rmn9N5SumdDJ
n0TFI1UV7vWhCUVduv1HaFBiDYgB7pVQGjBuTj3UDiEvHd9WdsD2N1KmQRVYnigE2HkG3CA8WzfP
eF0jd/RRn6KW3VSYe/2bYydeEM15odSrPNranbOhbtLEbGK0+u2Hbimrjpqe8U6VC8vIagqB70qE
G+74/6J6qEqPpPG9DhXyb85Sz0iuYr2HF45UZMGqph2ZrNmD2fi31+zPZZipqk1QOomRsZBmdBuC
rBYGmwPCR3z6eKTcrd7VJUf2IQoLoEXyJf4ME3m+kvgB/7ORW7rf3nnDYd99cIpKYe0YhMW2oKgf
jiWWFLH3jKGCHWvsS6DEy7buQsgEhfJtZW0j3TXDoLdCoH4aMkBfiC5k3idV29mKqLHer+mdJSBl
DERTwN7BndrHoF/6YIWKt/D6+aZSXQZtGw8L5yesLdB2fuDVajx/NOWV5bQfmcItgHlde/yJG+0E
gfT1V840YoVZWknvOMGSq3WC7g4HDj7s+bjYVdGkbbScjDRZSosG9c3XsrxyWMcCUcVZMDfOiQ3R
VxFkC+b7R+QGdVWRaBJDZbKPlmczcTf/33Esk/+sXI9qIqKIBMOPUO9/yTIhDOxn72wdRcWXH2cc
ixX2YYgyjbnh2a8q0MqVy0/UboqEn7SAYXuVg6gO4/mWMBfydBM8knsvmj7ECYFO9z0Co1lb3PCj
ShpbLYQSEUsM/5JH/b9D3lcvgi/N0wdvRlMbO2TtBkfgVmqnjxt5fuoTOlvxCGPM1BTcbCncYvDO
0Elx3YFegrnyvFqnOBgtht30sa60ZwZUWQ9UCq/5EEBj9yL/SBP1FQJUJj/UNahQwsWijppfitKP
F6nXKkxCnytW1JbrMBOZzBpPel+nB9e2WYZJ0dXfDom3aUNDwwEGgjUGocodcSk6zC0QsgRu14ow
uOrrNyoXE1SvbiwkdbEGEr/YzTNRyewR9VH7g6ddMOJFxaDC8xWFKpOHLVnEFWTSETgNcMpMxgld
n3DtS/Tf5m/yVAS8Uy2F73pqC2HNpx14PIM0Iyaf5YalSGvagcalSIZ36Z8pfNhmx21FsUA1FXhq
jrpPOCeRdfrePIkTk1hVzWrr8aIKTo/C90WWyBPOpRJ+fp56evZrw8nbUsC1+vGhyxMMb/gYvWqY
5NQ1aP7T6vDmrzEe07Ajfe3skLKGsKdcgmPjzFK/+6JXKHnJJSnxYxGgdKk7K+VXZ9KmSyrJPkb7
eRkuYOKEEGS4Zk9zyxtB/UCRktdxTke59NdFCwzyD4KyaKRBcmmHgG4DkWKrEeF5JDL35NPzyRUg
6ycwx0LsWFd+KZMRAgwP9yKWv3cB+V65glUH/OmVM+2PxsD8yp2WTT/nz08F6cbfDV417DpsFiC1
28jZI4qyB2lYqOVhnnpyX4qazDHkdC8zsO6jfO0p1V6LfF8qHAag/PeCssqSqHF6mzRz9fPN50qc
sfKNJJu+XuYPF3oOnUqZiXiN5dMfSwH0E22QPfiheXLCj0fxjY0/TLJ/29L2mzIe5ILO+Myx5GNl
zA7qEqcqurSXCk7McfSqb8eRCvUfuZSGNpvleay46o08nvlEAtT5kIesVJWD1QHFE1wzn4pNx7hu
HFdBi6tDnI/5EIi4gwAgNatQ8wDsPx46FD9Abbeyq/JEU5//NtiTunfilwgVUG7LE0sL/fR9cGYz
ivhL0rVwXz37bmgn1Ejg1wW2EM/n14N1JOIx1FEHyF4LT8lFFavAO7/GO3xAeQ6qrKK5FMrgbNlJ
BodBUOc94XcddoAmYWCCp/u9dZt1GS9j2EiZ0+33NLkHFbdvRbCR9Xck2rXCQI0d0e6D4AE8ZVlC
U4ddPdvON0CulnJC0WaAALNGt0/LpQzvmPv4G8Ob/7rP88qnxc+QAetUCNeKutrjjiRQPlFC+wWC
F9xr3MJkaapGwa6/Okxn/ey7qXCCjwdV7kSl4YGVi2P430txqlIm+YvuUHJpnsZQ9/i+/ie4v8QQ
wo6Rd7EcrzcRUNCVACJpjsPEyW/8PkMLKz4fzbr0E4DE98IdX9fkJD8Y0cEF03RHUGimAfhaXCFS
BzngqYsn2r65EUKVcdKdetmWcn1ToPPNxbMVdtlXG9T0GeUezpJoxannxstPNbNxwvOLeXc9GMKF
DPMJv2pgWAVySqg=
`protect end_protected
| apache-2.0 | 67568891a073af8a86e30752fb07797a | 0.954052 | 1.81323 | false | false | false | false |
mkotormus/G3_OrchestraConductorDemo | src/ov7670_marker_tracker_use/ov7670_marker_tracker_use.srcs/sources_1/ipshared/xilinx.com/axi_tft_v2_0/05601f17/hdl/src/vhdl/axi_tft.vhd | 1 | 46,835 | -------------------------------------------------------------------
-- (c) Copyright 1984 - 2012 Xilinx, Inc. All rights reserved. --
-- --
-- This file contains confidential and proprietary information --
-- of Xilinx, Inc. and is protected under U.S. and --
-- international copyright and other intellectual property --
-- laws. --
-- --
-- DISCLAIMER --
-- This disclaimer is not a license and does not grant any --
-- rights to the materials distributed herewith. Except as --
-- otherwise provided in a valid license issued to you by --
-- Xilinx, and to the maximum extent permitted by applicable --
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND --
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES --
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING --
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- --
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and --
-- (2) Xilinx shall not be liable (whether in contract or tort, --
-- including negligence, or under any other theory of --
-- liability) for any loss or damage of any kind or nature --
-- related to, arising under or in connection with these --
-- materials, including for any direct, or any indirect, --
-- special, incidental, or consequential loss or damage --
-- (including loss of data, profits, goodwill, or any type of --
-- loss or damage suffered as a result of any action brought --
-- by a third party) even if such damage or loss was --
-- reasonably foreseeable or Xilinx had been advised of the --
-- possibility of the same. --
-- --
-- CRITICAL APPLICATIONS --
-- Xilinx products are not designed or intended to be fail- --
-- safe, or for use in any application requiring fail-safe --
-- performance, such as life-support or safety devices or --
-- systems, Class III medical devices, nuclear facilities, --
-- applications related to the deployment of airbags, or any --
-- other applications that could lead to death, personal --
-- injury, or severe property or environmental damage --
-- (individually and collectively, "Critical --
-- Applications"). Customer assumes the sole risk and --
-- liability of any use of Xilinx products in Critical --
-- Applications, subject only to applicable laws and --
-- regulations governing limitations on product liability. --
-- --
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS --
-- PART OF THIS FILE AT ALL TIMES. --
-------------------------------------------------------------------
-- axi_tft.vhd - entity/architecture pair
-------------------------------------------------------------------------------
-- Filename: axi_tft.vhd
-- Version: v1.00.a
-- Description: Top level design file for AXI TFT controller. It instantiate
-- AXI maste/slave interface and TFT controller logic. This
-- supports display resolution 640*480 pixels at 25 MHz display
-- clock for 60 Hz TFT refresh rate.
--
-- VHDL-Standard: VHDL'93
-------------------------------------------------------------------------------
-- Structure:
-- -- axi_tft.vhd
-- -- axi_master_burst.vhd
-- -- axi_lite_ipif.vhd
-- -- tft_controller.v
-- -- line_buffer.v
-- -- v_sync.v
-- -- h_sync.v
-- -- slave_register.v
-- -- tft_interface.v
-- -- iic_init.v
--
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_com"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
--
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
-------------------------------------------------------------------------------
-- proc common package of the proc common library is used for different
-- function declarations
-------------------------------------------------------------------------------
library proc_common_v4_0;
use proc_common_v4_0.ipif_pkg.INTEGER_ARRAY_TYPE;
use proc_common_v4_0.ipif_pkg.SLV64_ARRAY_TYPE;
use proc_common_v4_0.ipif_pkg.calc_num_ce;
use proc_common_v4_0.family.all;
use proc_common_v4_0.family_support.all;
-------------------------------------------------------------------------------
-- axi_lite_ipif_v2_0 library is used for axi_lite_ipif
-- component declarations
-------------------------------------------------------------------------------
library axi_lite_ipif_v2_0;
use axi_lite_ipif_v2_0.axi_lite_ipif;
-------------------------------------------------------------------------------
-- axi_master_burst_v2_0 library is used for axi_master_burst
-- component declarations
-------------------------------------------------------------------------------
library axi_master_burst_v2_0;
use axi_master_burst_v2_0.axi_master_burst;
-------------------------------------------------------------------------------
-- Entity section
-------------------------------------------------------------------------------
-- Definition of Generics:
-- C_FAMILY -- Xilinx FPGA family
--
-- -- TFT Controller Generics
------------------------------------
-- C_TFT_INTERFACE -- Specifies TFT display interface (VGA/DVI)
-- C_I2C_SLAVE_ADDR -- I2C slave address of chrontel chip
-- C_DEFAULT_TFT_BASE_ADDR -- TFT Video memory base address
--
-- -- AXI Master Burst Interface Generics
------------------------------------
-- C_M_AXI_ADDR_WIDTH -- AXI master: address bus width
-- C_M_AXI_DATA_WIDTH -- AXI master: data bus width
--
-- -- AXI Slave Single Interface Generics
------------------------------------
--
--
-- Definition of Ports:
-- -- System Interface signals
------------------------------------
-- s_axi_aclk -- PLB main bus clock
-- s_axi_aresetn -- PLB main bus reset
-- m_axi_aclk -- PLB main bus Clock
-- m_axi_aresetn -- PLB main bus Reset
-- md_error -- Master detected error status output
-- ip2intc_irpt -- Interrupt to processor
--
-- -- AXI Master Interface signals
------------------------------------
---- MMap Read Address Channel -- AXI4
-- m_axi_arready : in std_logic ;-- AXI4
-- m_axi_arvalid : out std_logic ;-- AXI4
-- m_axi_araddr : out std_logic_vector -- AXI4
-- (C_M_AXI_ADDR_WIDTH-1 downto 0) ;-- AXI4
-- m_axi_arlen : out std_logic_vector(7 downto 0) ;-- AXI4
-- m_axi_arsize : out std_logic_vector(2 downto 0) ;-- AXI4
-- m_axi_arburst : out std_logic_vector(1 downto 0) ;-- AXI4
-- m_axi_arprot : out std_logic_vector(2 downto 0) ;-- AXI4
-- m_axi_arcache : out std_logic_vector(3 downto 0) ;-- AXI4
-- -- AXI4
-- -- MMap Read Data Channel -- AXI4
-- m_axi_rready : out std_logic ;-- AXI4
-- m_axi_rvalid : in std_logic ;-- AXI4
-- m_axi_rdata : in std_logic_vector -- AXI4
-- (C_M_AXI_DATA_WIDTH-1 downto 0) ;-- AXI4
-- m_axi_rresp : in std_logic_vector(1 downto 0) ;-- AXI4
-- m_axi_rlast : in std_logic ;-- AXI4
---- Write Address Channel -- AXI4
-- m_axi_awready : in std_logic ; -- AXI4
-- m_axi_awvalid : out std_logic ; -- AXI4
-- m_axi_awaddr : out std_logic_vector -- AXI4
-- (C_M_AXI_ADDR_WIDTH-1 downto 0) ; -- AXI4
-- m_axi_awlen : out std_logic_vector(7 downto 0) ; -- AXI4
-- m_axi_awsize : out std_logic_vector(2 downto 0) ; -- AXI4
-- m_axi_awburst : out std_logic_vector(1 downto 0) ; -- AXI4
-- m_axi_awprot : out std_logic_vector(2 downto 0) ; -- AXI4
-- m_axi_awcache : out std_logic_vector(3 downto 0) ; -- AXI4
-- -- AXI4
-- -- Write Data Channel -- AXI4
-- m_axi_wready : in std_logic ; -- AXI4
-- m_axi_wvalid : out std_logic ; -- AXI4
-- m_axi_wdata : out std_logic_vector -- AXI4
-- (C_M_AXI_DATA_WIDTH-1 downto 0) ; -- AXI4
-- m_axi_wstrb : out std_logic_vector -- AXI4
-- ((C_M_AXI_DATA_WIDTH/8)-1 downto 0); -- AXI4
-- m_axi_wlast : out std_logic ; -- AXI4
-- -- Write Response Channel -- AXI4
-- m_axi_bready : out std_logic ; -- AXI4
-- m_axi_bvalid : in std_logic ; -- AXI4
-- m_axi_bresp : in std_logic_vector(1 downto 0) ; -- AXI4
--
-- -- AXI Slave Interface signals
------------------------------------
-- s_axi_aclk -- AXI Clock
-- s_axi_aresetn -- AXI Reset
-- s_axi_awaddr -- AXI Write address
-- s_axi_awvalid -- Write address valid
-- s_axi_awready -- Write address ready
-- s_axi_wdata -- Write data
-- s_axi_wstrb -- Write strobes
-- s_axi_wvalid -- Write valid
-- s_axi_wready -- Write ready
-- s_axi_bresp -- Write response
-- s_axi_bvalid -- Write response valid
-- s_axi_bready -- Response ready
-- s_axi_araddr -- Read address
-- s_axi_arvalid -- Read address valid
-- s_axi_arready -- Read address ready
-- s_axi_rdata -- Read data
-- s_axi_rresp -- Read response
-- s_axi_rvalid -- Read valid
-- s_axi_rready -- Read ready
--
-- TFT Interface Signals
------------------------------------
-- sys_tft_clk -- TFT input clock
--
-- -- TFT Common Interface Signals
------------------------------------
-- tft_hsync -- TFT Hsync
-- tft_vsync -- TFT Vsync
-- tft_de -- TFT Data enable
-- tft_dps -- TFT display scan pin
--
-- -- TFT VGA Interface Signals
------------------------------------
-- tft_vga_clk -- TFT VGA clock output
-- tft_vga_r -- TFT VGA Red pixel data
-- tft_vga_g -- TFT VGA Green pixel data
-- tft_vga_b -- TFT VGA Blue pixel data
--
-- -- TFT DVI Interface Signals
------------------------------------
-- tft_dvi_clk_p -- TFT DVI differntial clock P output
-- tft_dvi_clk_n -- TFT DVI differntial clock N output
-- tft_dvi_data -- TFT DVI RGB pixel data
--
-- -- Chrontel I2C Interface Signals
------------------------------------
-- tft_iic_scl_i -- I2C clock input
-- tft_iic_scl_o -- I2C clock output
-- tft_iic_scl_t -- I2C clock tristate cntrol
-- tft_iic_sda_i -- I2C data input
-- tft_iic_sda_o -- I2C data output
-- tft_iic_sda_t -- I2C data tristate cntrol
--
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Entity section
-------------------------------------------------------------------------------
entity axi_tft is
generic
(
C_FAMILY : string := "virtex5";
------------------------------------------------------------------
-- TFT Controller generics
C_TFT_INTERFACE : integer range 0 to 1 := 1; -- (0:VGA, 1:DVI)
C_EN_I2C_INTF : integer range 0 to 1 := 1;
C_I2C_SLAVE_ADDR : std_logic_vector := "1110110";
C_DEFAULT_TFT_BASE_ADDR : std_logic_vector := X"F0000000";
------------------------------------------------------------------
-- AXI Master Burst Interface generics
C_M_AXI_ADDR_WIDTH : integer range 32 to 32 := 32;
C_M_AXI_DATA_WIDTH : integer range 32 to 128 := 32;
C_MAX_BURST_LEN : Integer range 16 to 256 := 16
------------------------------------------------------------------
-- AXI Slave Interface generics --Need to decide Ravi
------------------------------------------------------------------
);
port
(
-------------------
-- SYSTEM INTERFACE SIGNALS
-------------------
s_axi_aclk : in std_logic;
s_axi_aresetn : in std_logic;
m_axi_aclk : in std_logic;
m_axi_aresetn : in std_logic;
md_error : out std_logic;
ip2intc_irpt : out std_logic;
--------------------------------------
-- AXI Master Interface signals
--------------------------------------
-- MMap Read Address Channel -- AXI4
m_axi_arready : in std_logic ;-- AXI4
m_axi_arvalid : out std_logic ;-- AXI4
m_axi_araddr : out std_logic_vector -- AXI4
(C_M_AXI_ADDR_WIDTH-1 downto 0) ;-- AXI4
m_axi_arlen : out std_logic_vector(7 downto 0) ;-- AXI4
m_axi_arsize : out std_logic_vector(2 downto 0) ;-- AXI4
m_axi_arburst : out std_logic_vector(1 downto 0) ;-- AXI4
m_axi_arprot : out std_logic_vector(2 downto 0) ;-- AXI4
m_axi_arcache : out std_logic_vector(3 downto 0) ;-- AXI4
-- AXI4
-- MMap Read Data Channel -- AXI4
m_axi_rready : out std_logic ;-- AXI4
m_axi_rvalid : in std_logic ;-- AXI4
m_axi_rdata : in std_logic_vector -- AXI4
(C_M_AXI_DATA_WIDTH-1 downto 0) ;-- AXI4
m_axi_rresp : in std_logic_vector(1 downto 0) ;-- AXI4
m_axi_rlast : in std_logic ;-- AXI4
-- Write Address Channel -- AXI4
m_axi_awready : in std_logic ; -- AXI4
m_axi_awvalid : out std_logic ; -- AXI4
m_axi_awaddr : out std_logic_vector -- AXI4
(C_M_AXI_ADDR_WIDTH-1 downto 0) ; -- AXI4
m_axi_awlen : out std_logic_vector(7 downto 0) ; -- AXI4
m_axi_awsize : out std_logic_vector(2 downto 0) ; -- AXI4
m_axi_awburst : out std_logic_vector(1 downto 0) ; -- AXI4
m_axi_awprot : out std_logic_vector(2 downto 0) ; -- AXI4
m_axi_awcache : out std_logic_vector(3 downto 0) ; -- AXI4
-- AXI4
-- Write Data Channel -- AXI4
m_axi_wready : in std_logic ; -- AXI4
m_axi_wvalid : out std_logic ; -- AXI4
m_axi_wdata : out std_logic_vector -- AXI4
(C_M_AXI_DATA_WIDTH-1 downto 0) ; -- AXI4
m_axi_wstrb : out std_logic_vector -- AXI4
((C_M_AXI_DATA_WIDTH/8)-1 downto 0); -- AXI4
m_axi_wlast : out std_logic ; -- AXI4
-- Write Response Channel -- AXI4
m_axi_bready : out std_logic ; -- AXI4
m_axi_bvalid : in std_logic ; -- AXI4
m_axi_bresp : in std_logic_vector(1 downto 0) ; -- AXI4
--------------------------------------
-- AXI Slave Interface signals
--------------------------------------
s_axi_awaddr : in std_logic_vector
(3 downto 0);
s_axi_awvalid : in std_logic;
s_axi_awready : out std_logic;
s_axi_wdata : in std_logic_vector
(31 downto 0);
s_axi_wstrb : in std_logic_vector
(3 downto 0);
s_axi_wvalid : in std_logic;
s_axi_wready : out std_logic;
s_axi_bresp : out std_logic_vector(1 downto 0);
s_axi_bvalid : out std_logic;
s_axi_bready : in std_logic;
s_axi_araddr : in std_logic_vector
(3 downto 0);
s_axi_arvalid : in std_logic;
s_axi_arready : out std_logic;
s_axi_rdata : out std_logic_vector
(31 downto 0);
s_axi_rresp : out std_logic_vector(1 downto 0);
s_axi_rvalid : out std_logic;
s_axi_rready : in std_logic;
----------------------
-- TFT INTERFACE SIGNALS
----------------------
sys_tft_clk : in std_logic;
-- TFT Common Interface Signals
tft_hsync : out std_logic;
tft_vsync : out std_logic;
tft_de : out std_logic;
tft_dps : out std_logic;
-- TFT VGA Interface Ports
tft_vga_clk : out std_logic;
tft_vga_r : out std_logic_vector(5 downto 0);
tft_vga_g : out std_logic_vector(5 downto 0);
tft_vga_b : out std_logic_vector(5 downto 0);
-- TFT DVI Interface Ports
tft_dvi_clk_p : out std_logic;
tft_dvi_clk_n : out std_logic;
tft_dvi_data : out std_logic_vector(11 downto 0);
-------------------------------------------
-- I2C INTERFACE SIGNALS FOR CHRONTEL CH7301C
-- DVI TRANSMITTER CHIP
-------------------------------------------
tft_iic_scl_i : in std_logic;
tft_iic_scl_o : out std_logic;
tft_iic_scl_t : out std_logic;
tft_iic_sda_i : in std_logic;
tft_iic_sda_o : out std_logic;
tft_iic_sda_t : out std_logic
);
-------------------------------------------------------------------------------
-- PSFUTIL Attributes
-------------------------------------------------------------------------------
ATTRIBUTE SIGIS : string;
ATTRIBUTE MAX_FANOUT : string;
ATTRIBUTE SIGIS of s_axi_aclk : signal is "CLK";
ATTRIBUTE SIGIS of m_axi_aclk : signal is "CLK";
ATTRIBUTE SIGIS of s_axi_aresetn : signal is "RST";
ATTRIBUTE SIGIS of m_axi_aresetn : signal is "RST";
--ATTRIBUTE SIGIS of DCR_Clk : signal is "CLK";
--ATTRIBUTE SIGIS of DCR_Rst : signal is "RST";
ATTRIBUTE SIGIS of sys_tft_clk : signal is "CLK";
ATTRIBUTE SIGIS of ip2intc_irpt : signal is "INTR_EDGE_RISING";
ATTRIBUTE MAX_FANOUT of s_axi_aclk : signal is "10000";
ATTRIBUTE MAX_FANOUT of s_axi_aresetn : signal is "10000";
ATTRIBUTE MAX_FANOUT of m_axi_aclk : signal is "10000";
ATTRIBUTE MAX_FANOUT of m_axi_aresetn : signal is "10000";
end entity axi_tft;
-------------------------------------------------------------------------------
-- Architecture section
-------------------------------------------------------------------------------
architecture imp of axi_tft is
attribute DowngradeIPIdentifiedWarnings: string;
attribute DowngradeIPIdentifiedWarnings of imp : architecture is "yes";
------------------------------------------
-- Array of base/high address pairs for each address range
------------------------------------------
constant ZERO_ADDR_PAD : std_logic_vector(31 downto 0) := (others => '0');
constant USER_BASEADDR : std_logic_vector := X"00000000";
constant USER_HIGHADDR : std_logic_vector := X"0000000F";
constant IPIF_ARD_ADDR_RANGE_ARRAY : SLV64_ARRAY_TYPE :=
(
ZERO_ADDR_PAD & USER_BASEADDR, -- user logic space base address
ZERO_ADDR_PAD & USER_HIGHADDR -- user logic space high address
);
------------------------------------------
-- Array of desired number of chip enables for each address range
------------------------------------------
constant USER_MST_NUM_REG : integer := 4;
constant USER_NUM_REG : integer := USER_MST_NUM_REG;
constant IPIF_ARD_NUM_CE_ARRAY : INTEGER_ARRAY_TYPE :=
(
0 => 4 -- number of ce for user logic master space
);
------------------------------------------
-- Inhibit the automatic inculsion of the Conversion Cycle and Burst Length
-- Expansion logic
-- 0 = allow automatic inclusion of the CC and BLE logic
-- 1 = inhibit automatic inclusion of the CC and BLE logic
------------------------------------------
constant IPIF_INHIBIT_CC_BLE_INCLUSION : integer := 0;
------------------------------------------
-- Width of the master address bus (32 only)
------------------------------------------
constant USER_MST_AWIDTH : integer := C_M_AXI_ADDR_WIDTH;
------------------------------------------
-- TFT Base Address, I2C Slave Address,
-- DCR base address
-- Converting std_logic_vector to Integer
------------------------------------------
constant DEFAULT_TFT_BASE_ADDR : std_logic_vector(0 to 10)
:= C_DEFAULT_TFT_BASE_ADDR(0 to 10);
constant TFT_BASE_ADDR : integer
:= CONV_INTEGER(DEFAULT_TFT_BASE_ADDR);
constant I2C_SLAVE_ADDR : integer := CONV_INTEGER(C_I2C_SLAVE_ADDR);
-- Added for generating IO styles
--constant V2P_IO : boolean := supported(C_FAMILY, (u_FDDRRSE));
--constant S3E_IO : boolean := supported(C_FAMILY, (u_ODDR2));
--constant V4_IO : boolean := supported(C_FAMILY, (u_ODDR));
constant V8_IO : boolean := supported(C_FAMILY, (u_OSERDESE3));
-----------------------------------------------------------------------------
-- Function: get_io_reg_style
-- Purpose: Get array size for ARD_ID_ARRAY, ARD_DWIDTH_ARRAY, and
-- ARD_NUM_CE_ARRAY
-----------------------------------------------------------------------------
function get_io_reg_style return integer is
variable io_reg_style_i : integer;
begin
io_reg_style_i := 0;
if (V8_IO = TRUE) then
io_reg_style_i := 1;
--elsif (S3E_IO = TRUE) then
-- io_reg_style_i := 1;
--elsif (V2P_IO = TRUE) then
-- io_reg_style_i := 2;
else
io_reg_style_i := 0;
end if;
return io_reg_style_i;
end function get_io_reg_style;
function get_ipif_dwidth (axi_width : integer) return integer is
variable ipif_dwidth : integer;
begin
ipif_dwidth := 64;
if (axi_width = 32) then
ipif_dwidth := 32;
else
ipif_dwidth := 64;
end if;
return ipif_dwidth;
end function get_ipif_dwidth;
constant IO_REG_STYLE : integer := get_io_reg_style;
constant IPIF_NATIVE_DWIDTH : integer := get_ipif_dwidth(C_M_AXI_DATA_WIDTH);
------------------------------------------
-- Signal Declaration
------------------------------------------
signal bus2ip_clk : std_logic;
signal bus2ip_sreset : std_logic;
signal bus2ip_mreset : std_logic;
signal bus2ip_resetn : std_logic;
signal ip2bus_data : std_logic_vector(0 to 31):=
(others => '0');
signal ip2bus_error : std_logic;
signal ip2bus_wrack : std_logic;
signal ip2bus_rdack : std_logic;
signal bus2ip_data : std_logic_vector
(0 to 31);
signal bus2ip_rdce : std_logic_vector
(calc_num_ce(IPIF_ARD_NUM_CE_ARRAY)-1 downto 0);
signal bus2ip_wrce : std_logic_vector
(calc_num_ce(IPIF_ARD_NUM_CE_ARRAY)-1 downto 0);
signal bus2ip_be : std_logic_vector(0 to 3);
signal ip2bus_mstrd_req : std_logic;
signal ip2bus_mst_addr : std_logic_vector(C_M_AXI_ADDR_WIDTH-1 downto 0);
signal ip2bus_mst_length : std_logic_vector(11 downto 0);
signal ip2bus_mst_be : std_logic_vector
(((IPIF_NATIVE_DWIDTH/8)-1) downto 0);
signal ip2bus_mst_type : std_logic;
signal ip2bus_mst_lock : std_logic;
signal ip2bus_mst_reset : std_logic;
signal bus2ip_mst_cmdack : std_logic;
signal bus2ip_mst_cmplt : std_logic;
signal bus2ip_mstrd_d : std_logic_vector
(0 to IPIF_NATIVE_DWIDTH-1);
signal temp_bus2ip_mstrd_d : std_logic_vector
(IPIF_NATIVE_DWIDTH-1 downto 0);
signal bus2ip_mstrd_eof_n : std_logic;
signal bus2ip_mstrd_src_rdy_n : std_logic;
signal ip2bus_mstrd_dst_rdy_n : std_logic;
signal ip2bus_mstrd_dst_dsc_n : std_logic;
signal ip2bus_mstwr_d : std_logic_vector
(IPIF_NATIVE_DWIDTH-1 downto 0)
:= (others => '0');
signal ip2bus_mstwr_rem : std_logic_vector
(((IPIF_NATIVE_DWIDTH/8)-1) downto 0)
:= (others => '0');
signal bus2ip_mstr_data : std_logic_vector(0 to 63);
signal bus2ip_mstrd_d1 : std_logic_vector(0 to 31);
signal mstr_src_rdy_n : std_logic;
------------------------------------------
-- Component declaration for verilog user logic
------------------------------------------
component axi_tft_v2_0_tft_controller is
generic
(
-- TFT Controller parameters
C_TFT_INTERFACE : integer := 1;
C_I2C_SLAVE_ADDR : integer;
C_DEFAULT_TFT_BASE_ADDR : integer;
C_IOREG_STYLE : integer := 1;
C_EN_I2C_INTF : integer := 1;
-- Bus protocol parameters
C_FAMILY : string := "virtex5";
C_SLV_DWIDTH : integer := 32;
C_MST_AWIDTH : integer := 32;
C_MST_DWIDTH : integer := 32;
C_NUM_REG : integer := 4
-------------------------------------------------------
);
port
(
-- TFT Interface Ports
SYS_TFT_Clk : in std_logic;
-- TFT Common Interface Ports
TFT_HSYNC : out std_logic;
TFT_VSYNC : out std_logic;
TFT_DE : out std_logic;
TFT_DPS : out std_logic;
-- VGA Interface Ports
TFT_VGA_CLK : out std_logic;
TFT_VGA_R : out std_logic_vector(5 downto 0);
TFT_VGA_G : out std_logic_vector(5 downto 0);
TFT_VGA_B : out std_logic_vector(5 downto 0);
-- DVI Interface Ports
TFT_DVI_CLK_P : out std_logic;
TFT_DVI_CLK_N : out std_logic;
TFT_DVI_DATA : out std_logic_vector(11 downto 0);
-- I2C interface for Chrontel Chip
TFT_IIC_SCL_I : in std_logic;
TFT_IIC_SCL_O : out std_logic;
TFT_IIC_SCL_T : out std_logic;
TFT_IIC_SDA_I : in std_logic;
TFT_IIC_SDA_O : out std_logic;
TFT_IIC_SDA_T : out std_logic;
-- Bus protocol ports
S_AXI_Clk : in std_logic;
S_AXI_Rst : in std_logic;
Bus2IP_Data : in std_logic_vector(0 to C_SLV_DWIDTH-1);
Bus2IP_RdCE : in std_logic_vector(0 to C_NUM_REG-1);
Bus2IP_WrCE : in std_logic_vector(0 to C_NUM_REG-1);
Bus2IP_BE : in std_logic_vector(0 to C_SLV_DWIDTH/8-1);
IP2Bus_Data : out std_logic_vector(0 to C_SLV_DWIDTH-1);
IP2Bus_RdAck : out std_logic;
IP2Bus_WrAck : out std_logic;
IP2Bus_Error : out std_logic;
-- Interrupt (Frame complete)
IP2INTC_Irpt : out std_logic;
M_AXI_Clk : in std_logic;
M_AXI_Rst : in std_logic;
IP2Bus_MstRd_Req : out std_logic;
IP2Bus_Mst_Addr : out std_logic_vector(0 to C_MST_AWIDTH-1);
IP2Bus_Mst_BE : out std_logic_vector(0 to C_MST_DWIDTH/8-1);
IP2Bus_Mst_Length : out std_logic_vector(0 to 11);
IP2Bus_Mst_Type : out std_logic;
IP2Bus_Mst_Lock : out std_logic;
IP2Bus_Mst_Reset : out std_logic;
Bus2IP_Mst_CmdAck : in std_logic;
Bus2IP_Mst_Cmplt : in std_logic;
Bus2IP_MstRd_d : in std_logic_vector(0 to C_MST_DWIDTH-1);
Bus2IP_MstRd_eof_n : in std_logic;
Bus2IP_MstRd_src_rdy_n : in std_logic;
IP2Bus_MstRd_dst_rdy_n : out std_logic;
IP2Bus_MstRd_dst_dsc_n : out std_logic
);
end component axi_tft_v2_0_tft_controller;
begin
-----------------------------------------------------------------------------
-- converting Active low reset signal to Active high reset signals for TFT controller
-----------------------------------------------------------------------------
M_RESET_TOGGLE: process (m_axi_aclk) is
begin
if(m_axi_aclk'event and m_axi_aclk = '1') then
bus2ip_mreset <= not(m_axi_aresetn);
end if;
end process M_RESET_TOGGLE;
-----------------------------------------------------------------------------
-- Instantiate AXI slave interface.
-- Include AXI Slave interface to provide TFT Register access
-----------------------------------------------------------------------------
-- converting Active low reset signal to Active high reset signals for TFT controller
-----------------------------------------------------------------------------
S_RESET_TOGGLE: process (bus2ip_clk) is
begin
if(bus2ip_clk'event and bus2ip_clk = '1') then
bus2ip_sreset <= not(bus2ip_resetn);
end if;
end process S_RESET_TOGGLE;
------------------------------------------
-- instantiate plbv46_slave_single
------------------------------------------
AXI_LITE_IPIF_I: entity axi_lite_ipif_v2_0.axi_lite_ipif
generic map
(
C_S_AXI_DATA_WIDTH => 32 ,
C_S_AXI_ADDR_WIDTH => 4 ,
C_S_AXI_MIN_SIZE => X"0000000F" ,
C_USE_WSTRB => 0 ,
C_DPHASE_TIMEOUT => 0 ,
C_ARD_ADDR_RANGE_ARRAY => IPIF_ARD_ADDR_RANGE_ARRAY ,
C_ARD_NUM_CE_ARRAY => IPIF_ARD_NUM_CE_ARRAY ,
C_FAMILY => C_FAMILY
)
port map
(
--System signals
s_axi_aclk => s_axi_aclk ,
s_axi_aresetn => s_axi_aresetn ,
s_axi_awaddr => s_axi_awaddr ,
s_axi_awvalid => s_axi_awvalid ,
s_axi_awready => s_axi_awready ,
s_axi_wdata => s_axi_wdata ,
s_axi_wstrb => s_axi_wstrb ,
s_axi_wvalid => s_axi_wvalid ,
s_axi_wready => s_axi_wready ,
s_axi_bresp => s_axi_bresp ,
s_axi_bvalid => s_axi_bvalid ,
s_axi_bready => s_axi_bready ,
s_axi_araddr => s_axi_araddr ,
s_axi_arvalid => s_axi_arvalid ,
s_axi_arready => s_axi_arready ,
s_axi_rdata => s_axi_rdata ,
s_axi_rresp => s_axi_rresp ,
s_axi_rvalid => s_axi_rvalid ,
s_axi_rready => s_axi_rready ,
-- Controls to the IP/IPIF modules
Bus2IP_Clk => bus2ip_clk ,
Bus2IP_Resetn => bus2ip_resetn ,
Bus2IP_Addr => open ,
Bus2IP_RNW => open ,
Bus2IP_BE => bus2ip_be ,
Bus2IP_CS => open ,
Bus2IP_RdCE => bus2ip_rdce ,
Bus2IP_WrCE => bus2ip_wrce ,
Bus2IP_Data => bus2ip_data ,
IP2Bus_Data => ip2bus_data ,
IP2Bus_WrAck => ip2bus_wrack ,
IP2Bus_RdAck => ip2bus_rdack ,
IP2Bus_Error => ip2bus_error
);
-----------------------------------------------------------------------------
-- Instantiate axi_master_burst
-----------------------------------------------------------------------------
AXI_MASTER_BURST_I: entity axi_master_burst_v2_0.axi_master_burst
generic map
(
C_M_AXI_ADDR_WIDTH => C_M_AXI_ADDR_WIDTH ,
C_M_AXI_DATA_WIDTH => C_M_AXI_DATA_WIDTH ,
C_MAX_BURST_LEN => C_MAX_BURST_LEN ,
C_ADDR_PIPE_DEPTH => 1 ,
C_NATIVE_DATA_WIDTH => IPIF_NATIVE_DWIDTH ,
C_LENGTH_WIDTH => 12 ,
C_FAMILY => C_FAMILY
)
port map
(
m_axi_aclk => m_axi_aclk ,
m_axi_aresetn => m_axi_aresetn ,
md_error => md_error ,
-- MMap Read Address Channel
m_axi_arready => m_axi_arready ,
m_axi_arvalid => m_axi_arvalid ,
m_axi_araddr => m_axi_araddr ,
m_axi_arlen => m_axi_arlen ,
m_axi_arsize => m_axi_arsize ,
m_axi_arburst => m_axi_arburst ,
m_axi_arprot => m_axi_arprot ,
m_axi_arcache => m_axi_arcache ,
-- MMap Read Data Channel
m_axi_rready => m_axi_rready ,
m_axi_rvalid => m_axi_rvalid ,
m_axi_rdata => m_axi_rdata ,
m_axi_rresp => m_axi_rresp ,
m_axi_rlast => m_axi_rlast ,
-- Write Address Channel
m_axi_awready => m_axi_awready ,
m_axi_awvalid => m_axi_awvalid ,
m_axi_awaddr => m_axi_awaddr ,
m_axi_awlen => m_axi_awlen ,
m_axi_awsize => m_axi_awsize ,
m_axi_awburst => m_axi_awburst ,
m_axi_awprot => m_axi_awprot ,
m_axi_awcache => m_axi_awcache ,
-- Write Data Channel
m_axi_wready => m_axi_wready ,
m_axi_wvalid => m_axi_wvalid ,
m_axi_wdata => m_axi_wdata ,
m_axi_wstrb => m_axi_wstrb ,
m_axi_wlast => m_axi_wlast ,
-- Write Response Channel
m_axi_bready => m_axi_bready ,
m_axi_bvalid => m_axi_bvalid ,
m_axi_bresp => m_axi_bresp ,
-- IPIC Request/Qualifiers
ip2bus_mstrd_req => ip2bus_mstrd_req ,
ip2bus_mstwr_req => '0' ,
ip2bus_mst_addr => ip2bus_mst_addr ,
ip2bus_mst_length => ip2bus_mst_length ,
ip2bus_mst_be => ip2bus_mst_be ,
ip2bus_mst_type => ip2bus_mst_type ,
ip2bus_mst_lock => ip2bus_mst_lock ,
ip2bus_mst_reset => ip2bus_mst_reset ,
-- IPIC Request Status Reply
bus2ip_mst_cmdack => bus2ip_mst_cmdack ,
bus2ip_mst_cmplt => bus2ip_mst_cmplt ,
bus2ip_mst_error => open ,
bus2ip_mst_rearbitrate => open ,
bus2ip_mst_cmd_timeout => open ,
-- IPIC Read LocalLink Channel
bus2ip_mstrd_d => temp_bus2ip_mstrd_d ,
bus2ip_mstrd_rem => open ,
bus2ip_mstrd_sof_n => open ,
bus2ip_mstrd_eof_n => bus2ip_mstrd_eof_n ,
bus2ip_mstrd_src_rdy_n => bus2ip_mstrd_src_rdy_n ,
bus2ip_mstrd_src_dsc_n => open ,
ip2bus_mstrd_dst_rdy_n => ip2bus_mstrd_dst_rdy_n ,
ip2bus_mstrd_dst_dsc_n => ip2bus_mstrd_dst_dsc_n ,
-- IPIC Write LocalLink Channe
ip2bus_mstwr_d => ip2bus_mstwr_d ,
ip2bus_mstwr_rem => ip2bus_mstwr_rem ,
ip2bus_mstwr_sof_n => '0' ,
ip2bus_mstwr_eof_n => '0' ,
ip2bus_mstwr_src_rdy_n => '0' ,
ip2bus_mstwr_src_dsc_n => '0' ,
bus2ip_mstwr_dst_rdy_n => open ,
bus2ip_mstwr_dst_dsc_n => open
);
-----------------------------------------------------------------------------
-- ENDEANESS correction for master read signals
-----------------------------------------------------------------------------
AXI_DATA_WIDTH_32: if (C_M_AXI_DATA_WIDTH = 32) generate
begin
bus2ip_mstrd_d(0 to 31) <= temp_bus2ip_mstrd_d(31 downto 0);
bus2ip_mstr_data <= (bus2ip_mstrd_d1 & bus2ip_mstrd_d);
ip2bus_mst_be <= (others => '1');
RD_DATA_ALIGN: process (m_axi_aclk) is
begin
if m_axi_aclk'event and m_axi_aclk = '1' then
if bus2ip_mreset = '1' then
bus2ip_mstrd_d1 <= (others => '0');
mstr_src_rdy_n <= '1';
else
bus2ip_mstrd_d1 <= bus2ip_mstrd_d;
if (bus2ip_mstrd_src_rdy_n = '0') then
mstr_src_rdy_n <= not mstr_src_rdy_n;
else
mstr_src_rdy_n <= '1';
end if;
end if;
end if;
end process RD_DATA_ALIGN;
end generate AXI_DATA_WIDTH_32;
AXI_DATA_WIDTH_GT32: if (C_M_AXI_DATA_WIDTH > 32) generate
begin
bus2ip_mstrd_d(0 to 63) <= (temp_bus2ip_mstrd_d(31 downto 0) & temp_bus2ip_mstrd_d(63 downto 32));
bus2ip_mstr_data <= bus2ip_mstrd_d;
mstr_src_rdy_n <= bus2ip_mstrd_src_rdy_n;
ip2bus_mst_be <= (others => '1');
end generate AXI_DATA_WIDTH_GT32;
-----------------------------------------------------------------------------
-- Instantiate TFT Controller
-----------------------------------------------------------------------------
TFT_CTRL_I: axi_tft_v2_0_tft_controller
generic map (
C_TFT_INTERFACE => C_TFT_INTERFACE ,
C_I2C_SLAVE_ADDR => I2C_SLAVE_ADDR ,
C_DEFAULT_TFT_BASE_ADDR => TFT_BASE_ADDR ,
C_FAMILY => C_FAMILY ,
C_IOREG_STYLE => IO_REG_STYLE ,
C_EN_I2C_INTF => C_EN_I2C_INTF ,
C_SLV_DWIDTH => 32 ,
C_MST_AWIDTH => USER_MST_AWIDTH ,
C_MST_DWIDTH => 64 ,
C_NUM_REG => USER_NUM_REG
)
port map
(
-- TFT SIGNALS OUT TO HW
SYS_TFT_Clk => sys_tft_clk ,
TFT_HSYNC => tft_hsync ,
TFT_VSYNC => tft_vsync ,
TFT_DE => tft_de ,
TFT_DPS => tft_dps ,
TFT_VGA_CLK => tft_vga_clk ,
TFT_VGA_R => tft_vga_r ,
TFT_VGA_G => tft_vga_g ,
TFT_VGA_B => tft_vga_b ,
TFT_DVI_CLK_P => tft_dvi_clk_p ,
TFT_DVI_CLK_N => tft_dvi_clk_n ,
TFT_DVI_DATA => tft_dvi_data ,
-- IIC init state machine for Chrontel CH7301C
TFT_IIC_SCL_I => tft_iic_scl_i ,
TFT_IIC_SCL_O => tft_iic_scl_o ,
TFT_IIC_SCL_T => tft_iic_scl_t ,
TFT_IIC_SDA_I => tft_iic_sda_i ,
TFT_IIC_SDA_O => tft_iic_sda_o ,
TFT_IIC_SDA_T => tft_iic_sda_t ,
-- PLB slave interface signals
S_AXI_Clk => bus2ip_clk ,
S_AXI_Rst => bus2ip_sreset ,
Bus2IP_Data => bus2ip_data ,
Bus2IP_RdCE => bus2ip_rdce ,
Bus2IP_WrCE => bus2ip_wrce ,
Bus2IP_BE => bus2ip_be ,
IP2Bus_Data => ip2bus_data ,
IP2Bus_RdAck => ip2bus_rdack ,
IP2Bus_WrAck => ip2bus_wrack ,
IP2Bus_Error => ip2bus_error ,
-- Frame Comeplete Interrupt
IP2INTC_Irpt => ip2intc_irpt ,
-- PLB Master interface signals
M_AXI_Clk => m_axi_aclk ,
M_AXI_Rst => bus2ip_mreset ,
IP2Bus_MstRd_Req => ip2bus_mstrd_req ,
IP2Bus_Mst_Addr => ip2bus_mst_addr ,
IP2Bus_Mst_BE => open, --ip2bus_mst_be ,
IP2Bus_Mst_Length => ip2bus_mst_length ,
IP2Bus_Mst_Type => ip2bus_mst_type ,
IP2Bus_Mst_Lock => ip2bus_mst_lock ,
IP2Bus_Mst_Reset => ip2bus_mst_reset ,
Bus2IP_Mst_CmdAck => bus2ip_mst_cmdack ,
Bus2IP_Mst_Cmplt => bus2ip_mst_cmplt ,
Bus2IP_MstRd_d => bus2ip_mstr_data, --bus2ip_mstrd_d ,
Bus2IP_MstRd_eof_n => bus2ip_mstrd_eof_n ,
Bus2IP_MstRd_src_rdy_n => mstr_src_rdy_n, --bus2ip_mstrd_src_rdy_n ,
IP2Bus_MstRd_dst_rdy_n => ip2bus_mstrd_dst_rdy_n ,
IP2Bus_MstRd_dst_dsc_n => ip2bus_mstrd_dst_dsc_n
);
end imp;
| apache-2.0 | 33c1a8cf55d9909537e1acc6cdc6a524 | 0.409331 | 4.201579 | false | false | false | false |
jc38x/X38-02FO16 | benchmarks/VHDL_Generado_desde_C++/inputs-4bits_outputs5bits/4-MPEG-MV/asap-alap-random/mpegmv_asap.vhd | 1 | 3,070 | -- IT Tijuana, NetList-FPGA-Optimizer 0.01 (printed on 2016-05-13.07:37:02)
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.all;
USE IEEE.NUMERIC_STD.all;
ENTITY mpegmv_asap_entity IS
PORT (
reset, clk: IN std_logic;
input1, input2, input3, input4, input5, input6, input7, input8, input9, input10, input11, input12, input13, input14: IN unsigned(0 TO 3);
output1, output2, output3: OUT unsigned(0 TO 4));
END mpegmv_asap_entity;
ARCHITECTURE mpegmv_asap_description OF mpegmv_asap_entity IS
SIGNAL current_state : unsigned(0 TO 7) := "00000000";
SHARED VARIABLE register1: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register2: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register3: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register4: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register5: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register6: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register7: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register8: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register9: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register10: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register11: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register12: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register13: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register14: unsigned(0 TO 4) := "00000";
BEGIN
moore_machine: PROCESS(clk, reset)
BEGIN
IF reset = '0' THEN
current_state <= "00000000";
ELSIF clk = '1' AND clk'event THEN
IF current_state < 4 THEN
current_state <= current_state + 1;
END IF;
END IF;
END PROCESS moore_machine;
operations: PROCESS(current_state)
BEGIN
CASE current_state IS
WHEN "00000001" =>
register1 := input1 * 1;
register2 := input2 * 2;
register3 := input3 * 3;
register4 := input4 * 4;
register5 := input5 * 5;
register6 := input6 * 6;
register7 := input7 * 7;
register8 := input8 * 8;
register9 := input9 * 9;
register10 := input10 * 10;
register11 := input11 * 11;
register12 := input12 * 12;
register13 := input13 * 13;
register14 := input14 * 14;
WHEN "00000010" =>
register1 := register1 + 16;
register6 := register6 + 18;
register7 := register7 + 20;
register9 := register9 + 22;
register13 := register13 + 24;
WHEN "00000011" =>
register1 := register2 + register1;
register2 := register4 + register6;
output1 <= register3 + register7;
register3 := register8 + register9;
register4 := register12 + register13;
WHEN "00000100" =>
register1 := register14 + register1;
register2 := register5 + register2;
register3 := register10 + register3;
register4 := register11 + register4;
WHEN "00000101" =>
register1 := ((NOT register1) + 1) XOR register1;
register4 := ((NOT register4) + 1) XOR register4;
WHEN "00000110" =>
output2 <= register1(0 TO 1) & register3(0 TO 2);
output3 <= register4(0 TO 1) & register2(0 TO 2);
WHEN OTHERS =>
NULL;
END CASE;
END PROCESS operations;
END mpegmv_asap_description; | gpl-3.0 | 2c7def155429cc70d3d4c58abcd1711a | 0.666775 | 3.11359 | false | false | false | false |
mkotormus/G3_OrchestraConductorDemo | src/ov7670_marker_tracker_use/ov7670_marker_tracker_use.srcs/sources_1/ipshared/xilinx.com/fifo_generator_v12_0/924f3d25/hdl/common/rd_pe_ss.vhd | 5 | 46,465 | `protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2014"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
p9mk9oDYGr8pmZkWXbY2TLDcNbG5E8gje77Jb79LHblLzT6z9srp4YogxjZP3AdpB91kWPxyMOW6
yZ8yldjKJQ==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
mVXEkppMj6g1IXjCy7VbBKs+xRMg53vy4CptQMu5kxBNHV1PdY2Z6vTMCczc46movp6tA+re7V/F
HsTTtWCV8ZPfOv3mcdhM4UeGfFJKyzETnvTW+7FBhhQEC7rVDuHV/zQIpFu2woT92yIODVDJv0OJ
d7TknpWbiizNGWwk/hI=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2014_03", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
kaEPvPGfpEJgQQGZTZXbF/2CvE4Ypzvh7RT2RT4lopARsSjuV2b5tLmuzYSb85Q5AFDGlfRWDwtx
F2YZzMpA5KuWPN8p6nQWyhLNm/SzroKHii7qBz7lYa3mPULaNNzH3dQ4LQE55pFWYPOfv3yGdzz+
x0MEF1ydRO95dewin0KqN+iIoWFhfzxKJvwhtWiiI/X05UUfC8+LXpcJqGLxKw605Jlb+NeKbbhq
fYieug+3ebVwrZawhJ1LjKOdIJ8rUBrE5RUDvZKfy1WLh7meweDSbRCQB5rPDK3OcggQilKZ2mNq
8WI66wOyhQxGZBLF65BiKY2T7DqYxJCp5hGwRQ==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
CVvJhNJw6EHSDIQ731Kbkfkwh9Wl9VKmiOV38T/SVAU+kI3c+cxqP00ao5AoKfnBVtld7H9d2J6J
kXhNjYdDnAvSRM/7oTsMkgQ3b7EgkwQVLR7bm4uQPlxcIXIdQ0tZoHzgZNTJUL7DL73vJLbed2E/
KzI+61P+AYGjXhbYkqY=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
ga5Bitt3CebGZAmuyISY0yRlSG9x1Tj+suj5BLHTSTSYidEbK8uW4qCTr6BxF0yV4Xp11LL0s44p
pTF4j1DpdFDEchCdBhPTnweZZpfsgl1tF2onzxM6huOLdb8WUzx98iaDFlYXkwOae5tqfbg/QqYr
LyzTmB6gN+UHIqqd0Nvja/wQ+C8qsyVXUotU7XSAyQnl09HX5VboIooc80WNwl7i2epmVdrXOo1U
vnq8TH8TcTYxW0QC7SWveJRCbce/nT+MzP+z7RYjxYN8q+AXvkoPoJzcA3kTVwwvXpW3tNSYC/EL
DULswVBWDYJoUSH86zvW8e9kh4GPJv6rviHyhg==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 32656)
`protect data_block
GFUOlaXsp9nvniuf9Yj+35P3XFkM33Rly/Cql6L+SVOFmDHwBnnl311fReTRdQswrOQzkIK9mLV3
Y+dA2qHWprdNKpYEA/FKxgvP9cBaoJrnWYNV9lVLg0aeJ5CMyiLrZ8uLViaNWnQcGAEK1EVOh8UL
zIePotyeAlUUm4fx4kAukivMG1+ioQAfnSS7NCTp9WoreSpneaw0J2BtIBwDvzO90Km6jK4nCxmL
y6xUpkGHEkXeJVC9VJ4GfBtb3XU5LUPMW6BWuNVnTDodSW85M1IVYLcvA47nJsdjT74DatyIgYUs
9zipUpHjbhfo1guYIveV6AOOwzclevEJzodFZNIs6MDOl7Ue1k63UM6tOBgRCSAVpdTtX43KSdyi
W8gSSE/xRO2zd6CEtdTMUECMgz+FM0B8rdhfvw1+PFgul8ga9w47Mlr58ZFW6w3gnvpHAXW1yzwo
ZWlth4GrpB65EaNMZGfnnMeFy00Qa+ShgUUX0ogN1bQoXO+NyAmZbFFniUxaCvsyhRILviiQPiUM
z9joSRDSoKam7aQ9M99HubxmB/uQcJHmoCEmfkeyXp699SJwCFc5BlI4cLWYSTmfbDOmGPqYAsGf
Y11t8WlliSLcAjqgX9O7Az7cJvYB0B6F/fjcIl0Z4Qy8/c+9y9NSpts14y+eecL3o7CsTFGYCxts
mcfvGzAD4jaRf3eE7U62zUK1740KMj8i1V+dUZ+H9pdT2BOhyQOWt30MzHy/bt1Hm74dX5t/TkQK
OyB6pSWgm/eVnEz+sARa2+v04N2rJC5tA0HXAyR4AohGrMuxgbzhVutpRXQ0+dT7+puOzOnglslc
6GSUcdugLQRCDdC8vaeLrPZdyI6FFtxWl0V5XkM9sAVNDWc7rwo5goLkzYqMwdGfXwnmlDOD/qhg
xQ59aZRzFo1TUwUktuFrnMqJpiYjES00iA8Cs4o928AIbanp39AgHKzL5g5CWLiDax+O0A0avJtm
GDB1kQnIbMHXOKmoIxZZ/RkehaDc6r3UtRYqREaJId46EcNdYFHXUAnJATvu0utFCOcMPs2Bivo3
fTJrFGJboYO987BWLtP4TOQzrzqLQ3cghfIWGZuAAONScAf/4CqwqrC1PxzEPfNxgWLnoCvO1cAm
4v8mkhe6yEC54/HDXzbJIRAVexllKZnjw5FYIgnyzgkGpZv3pTQ8cP+BNMpwL+pre52bX7ZfHYFz
Z/v3axxsmtz2XzyNPpHKB8n+yFlaYXt7yLwQLkdOs6xxFSL5bFf9VIlUullom31Lib5XsWh5bd5m
VJuUKcG2wLmgcrlVtA0qACulzxVbgznOq3wKISC3nGZy7q4Y1CqKEVUuXvVdJQM4bdlAqUzKOnvF
Z2llXnGXMHdNpJnBPYNzd/vdunDO21Zm4aghBDU1ZotyfIKNtiWvyyctK4cxUcJ6BipqhxtmjZAz
+pOV1SBbqnBMr4WdvNmon242BUAMsiBhu/otZNFoydHK38NqIlAbXYS9d10/D2x/Cn9XnXEKLK4N
hNtEEPDnCOg10GHtVARfC3toVhbWL3fK7jos7yBSsQxtGVzYZqBXvf8bd93J0eWP8eyHYpYeB24Z
JUzjNn5s1C7uBNKYcw3OOGUI6iHLC95nJuaSljThX+O4j+HlwRUdpOCNgX2pws9WVa23bVvFFd/F
NUwHsacvXufCrBQnFvn9082Y/2nCLZ/wST1gE7blYRsHouXCsHD+Ca+QksQcOl3XQ7PQRYeSM1do
TjMAou110MAB3/b2SyIOb9Ue9/qDK4CCUZ7VCxxlfXKlT/ubgVHNJbG9rV+TyHntRFdZjt5IXYqi
XzP7iq936Uc+LXXvZbOj2Tw4SK9gU895jH4b3BOwIyhXqrQpQjrAVTJuTuDZb7Z8mHDIhVtN/p+k
5RvZ9iFnh689QcqtGxMD9EHcAv+jkvE4fs3aChn9D8Qstg5dhXT5++NoKYNpEdiPYNYJXKPo2kU/
1NkgyB1Alp+6af9pSiQF/cCpOF0YrAWGZoY+GRBdAU8IR31+r6Yv7Fe6gPHA9rTvhhUdOG4WWRiM
U9nnPUfh4H37StBYotcgmCPEGaX+t+w8QZCsyi1gHKm5mt/AT3LWqhEamXTl/RAn2YitGOIi0bEK
s3RrCofyxJJQ9yDD2mzb+GEmhfq6NpjokNr32lDB9S6aErABkdqPY6KDGvgAaimH3e9lkuXHW7/5
mdTDegHSn2eTA52aCNBl99m0Dj/5CNdH7yntyvZ7vDSvoq8uM3ouzvc1KZWwjAm+oWbpmh5bZ7Jr
l9laaq7ij1rnk6BoAQJbRQ5hwwBlwi+GQr+yLtejWMG12aP5b1SdtGCFCqiGP5QxfD1irT5HqJst
WMl4UWOeti1okuC8PDkPI9mwHRsIByul8KOhAn9Bn9HiG47sr7b/9A8oY9js/SS37agXjo3Fzjig
b/R9i5J4Y38Uku4mwYUqjl/s/hNfUjOPnD4VwVFE4kEPoPTqM16rdESFfy6HCl6YiCNVo2sTQzUm
wAX3yrUrLsDU357DXZ3n6q4s7BQX472RIkkuyLHyPlj5JoWt19KCqhuSxY+SKLAJ3gzQ7Gc+3xNY
+UtvZxy/l9r35kvBExK2ZmMZTYkQIJDkB91/dRfp+HtjmH45UZo0Gv7Psi5JC5iXq5QHde6rNJvv
9Cl3E3gKlTZI346mD/dyJL44mJZ1WMLFAtCHDLRTHgY82n8vLRYvp9iLSa4XgWpnUCp+sphjdy5T
OtjC23CERotVZflihiI8rJvJMfwlEM4z/fUqy+7Ii90jKsJJEr1GjQbbA0/EzLkFQrjRxuE348ma
jqvx2vA7zKZYI1cJjrmaHEYjmy+0TdxMldLeaH15WM7sJ2Uz5om8ItqtmzMbWYt03QMPeCvWUmXv
rxFzNpTCRtDC1hpMOtkX3EX3UsEXhggiit9pycCRvnQ4HbDSQ/4ugE4GObty5kZrpYAbyo9MEhYy
L+mU2G6p92qHx9560fpesWTDTiFwrPksBy2i9KJp35q0Z2m3e4MxnV1L822Sb9o29PlIBESXPtTi
73PqX7GI9pUbJJGT4IDGg5pgkvdzJQwhnYcg4UyARnU1xiYdCaBHeSK+HPnzzor/0FNUVcshRV1Y
fmM23qJlOfaNE4XKZTby7CLYkYYEDjBzZY3tscXRr8pSwI6zW4Pk9WMr90F0z40fS9bhzSEE6Om0
hG0Q+FBEJdf0Gl5y6fXOw1F6OGyBfvfGcAm8+cVY6gjCoDXLoCo3i64sHT8jRgNbfXCclqP+Mj/g
2UOnDMOhEPdHlu4VNxtHiu/zQvYBOzJobM7Z5fIjnYB1TQ1vsNMgcFQbRvMqYkIXA3WZ/4mBMf7H
lfwRg5WlBgaWZOpDI1gLY8NlJxDtzwCQXAyBXos2x3QryjqD9N4FboB2Qz3MjPO/YlSUhtonp2CF
uaa3Sja2XFk0qjZM7MEwzBbqt7cDnJiBQMukWgRxnxOKo4oA0WXNu3nFP2d+uko8bpiuvmJUesLC
bjiwqELal6KrawqFPKLLIKipReChhx4cs2tM+4+cqHeIw8CYzqRlM8sj1Tc0n+TjtdHorDlkVZM0
1MVMOUrjO/HP2kOD/XKZ1OJajoLoWens7tG89ojmqQW2KtOIXS7h58vYTP/iU9wltq9Skc2xlq3L
Byi1P3j50rjnU6/zUHJwiGNvzzFkg7nYkju55rd+JTKkBu5myRg+T8VOTtu9i3K7+PYmfuQBfqYU
7pGjQ9+rn98G+o3IEsgPv3z/lXf+S8npKA4NXWdAZwAHhSyaHZL4mNlJsxa0qCVvLhRlxlhH3QPu
IOvTv8LlcjyGsoKziHALm53faD4Xd0YBcXvn4cHuQ1uw8jq9nvyxc4u5PyhK3+i31+rUb+XbM/Sv
ewUi78bhNKcEFbFPt6FHYjp3G2kpcSm6HsfLDcn5mBoC+8p4d7BUMuGgJZZ/gmX/0/eOGmYGYjOx
7NNRik3UfdR/UA7ZN7ehnHi+9ld0iHUDziUhU39iEmpdF4Va0u0JW8F+M0bydAPS5+EEECuGpyjo
2JKNqXXAVkyxUXh52aeN1kAyFYTPV/Kz/ZBY3zkCBZBpTgyfYXjFZYq8iB9+drVZYwQrAaZTe8ty
RqGi+5YHC6eqmXJxhyGf/I74xSRm+FQrje20QjAsE8NJq+72xoKs8zi5X05lUJ1nMPjWNqeB9MrE
2yL6BsR2P5DbhvYudxssOVPZINBUXvsxX+KRrH+kbr9gYq5+4yE25fPKqfZ/GzquTCC17UQ7ZaC6
wKy8Go/pUZDy9EtybH67LigexrJHrDrgkgXcc0c3t8/jJ3xCvEhZrgMQra21f0J8VtK9iD8+aKra
FU5ImN4Usi+W5y8hlzuO+oq0TS8JOT3QpYZCzTGGlGJ1PR2tjkBEjegrdqH17q6TP6+zCBuhVegB
7QdKLx6m+jeup/gyBD+r570fsEX9MyHyIJulVpdz2Ltfwz6V63t/mUM9IR5OcljACsqkdqs1OLxZ
4hNBHsg/TtSeUtRoyBg0ZckTKTC7urRkGzygJV92J4T86ejueXXmy8SRCQVPm2FtIorgiUZPYNto
onmMJGOPOlIXjoqGZz6qpu/M1iGybBxUYASxVBAPbogxGq+qC4ITbkudC2wICFBW77qOYyF7G6d2
dKjvMRJU8v2HuNWKAYrtrFLJPpzCVd6yffSOv3ZzXBDQXj5briW9/vQEAAwoGgvrUb1X56ZFBLFn
K5LO099HTTUVbdgC8l8c5eZGVdZpDHUNMGi6EJYRVTqQ1SVvk1eJa8M2LGesV/xMLhliwQU+2Toz
Rz7ARCL/sja5+LTLXFA8u5BWPxZelVHE70bIfj88Ng8i6t8sQZsC9Vgjmp/VjX+lWlILYPnTiNjv
gxAld512KtZqgUHzExDG+u5cvDFJyUIUFx1CyavAzuX3rm9zU5d+5lUAVeNi7DythVQGGmZMy9Uy
RLOXO0Ka58TAoN2WufFs/ZXUkrDTUh86XchCzvLMV7tpum5G3kPclfgYTNqtPt+WriS887hX/9pJ
oz4ZErpyeNA59ysZEsszE3Gesn2w9UyxXQeVbFgp7+YV6vVBymfGdjoATMUJlPfF7ydF9HZ00fJV
f+u0DcjVh57osxTbpkFH4mpoUSn/WSPHD+XGJxmpzupdVlwfqwFKemc6XyIwczMTF6jln7/giGkz
0YRGftw/OCEfWmvtnZQ8OIhG/XUpKyokAnPa0blQoNgY2ppcoSIE6ie1JmMGAy/QEN7NN3LghGs1
zwIdDKjzJjqL6eDc/+imDlYfSn5aHqLxAVLR6HNzKExTUaK30BqZtJjRUe36hTSmmBfh4CFd5Af6
EmO9Loy+myB7ksmZIg2v4JaWD0xoJNiroFAt9i7N4PPvI3g8q0iYNWHUmmAy2lQ49FOzsTjmXl6w
RSGxChASJUr8vaUrWVabkzxdctrmIrRe057N47PLFt6GvPwHbsV5FGo9uWI1XnsFjxKTCkfDuZtp
s9RsCGQ7NywBa2/JYvO/4bN4Td/Us0xf7ihaZaCtMbFRjWS7Wt+6IjLk5DoDfed+5HaV2A8ax5jX
/WJgon3QWaCJ9aglMObF793Qx2q0pxKQ4Kl492tkrh+Lv1c20Eg72gbNNb5ciPVqcbePSco9+IEw
MVCp89rCg1ec/vdhOurSrUH7FsbOdxphOcBPyXIR+D/73D9BtZM5w3ooZlAANdI6P37vbSRQs5c1
B4a3mCA47D4setXN5h7br2XUs0nlaqu9wyDR3ZqAfwHP0kewJxTlhvtgorm7JmCxDbanI/ccDA5o
0XP28j+zURJy0g15L6Nkn1FqrMuvVlS6xqA1HDtuIxR0x2IbueGIhRaYyEZj/F5N2rL31XoesIpr
nE49CHIVX+EBwoOVoStdAyUMWxjy+cy1/PsBTAhWfeDfh4OPoRYKzsh8gZIVtiH3yU9QMLd2ujIe
PddS1dAKC75RCQYCr5tEKbcDby8afrzrzZcB12qmbhsmMFTKspQb/LHAtE21qigRl2PZF9zBa5bp
427bK9Lgi5dcq0fbwZJVYrpVX2/XNkE0U5VzG7u4xxOOozLPrYXBChOY6xgqhFyrCTB3mxnghqgo
cYw91pJ1o8lF5t2eKZl37TYLVxObYnV1sbMlG+ghQYEY+b2/gtsftczvyeI/qVdJwSVox9GpHmsH
Go6M9zkod3xPTASLx3giE/yiJls7JqEQH5PFEcDvGB+YcsxrP/VIAe2qoDQSGpqwgfJaodL0Pp52
GuUf7BkUEburuFwWSV5URnWD0DVPMwHGUeuB5YgbUsRrOrYyPVlE2EHyMqIwtUV3gQNCj9xfNIcS
fPd/VwAmHZg7i7Y19lWzWI7nqLTNzlW3QrGj6WKT6a7OMFDTb4mjGt0LNeoK0GI5M0pus1aLe5+z
Njx21lflLewsuQ+T93vxaHIjXwYD7vWRIkAUHlk6+eYDn0E3IDDIicDs+0Sv3G4OSc/4FT3JJnSu
n8JNBgGd/TDg4mClXg8Tz5ZtUWi+ievggz3kN0/JEQkflKY0PTZz1cd9XZOGkgLHyKKW5n7q65Tu
aLKSIPpYNtLOAGfrJ6FyHTOI7jy/lYdmZUW4Y54S4WpOVEXSOZXNd7l/dZlfc2VhVRh0fofRmiRK
m6j1bN/T0U0QWe1U3ARkYNUKeuHSCw5XecNlhe3KxcsGXgA5ptL40PsGLpHMWGV8xbbCb9ccfqx4
VZ73Dqq5usYtLEUKCSprRgvzfsCWk4HPUijC2BYMOTGX4AgP+DUAFTvSB8hs/qiuAtlRO/BJSNkT
0WxMFB2E8DLk8cZMvx5bXJ5zzuoQBPv9Pdv5bvkX3NqcSyQpLjRkkdYFXdDRg6wg45vRhhmblTTB
XYecDVVOOU6HHYQyS83x71ytKTdBKiNgn4ght1t9Vr9N559XnGXxxwhARabbkGoTidKHKrD30Y6l
64xsRV7KArCmff8SaHGo4oxhpFxnluPZy7EnBCaiLJsCpmMvIRjsUtPHDsh8v7iOgKB7AHrxZif0
hRCogLUru9+NaeZigDbxg+yRhfFoB0h0xi9ukc7wMvdHUBFDkf9oU8OGMsd1daPn2HXLCZ1IuQJa
SawiJc3XRPCaj0OF0AydmC8pI/eqW0ROPpDURY074TtqYUtF+GPFqofNur92/1K2BMhwzUIQ766Q
zM3QKBiyPFlLrtuXArrHlaZJDQ1GCM83Bchy8tVAZE6lsVQHvMa6h/9tUIlU9g4ZMhWsk2EGmmTJ
O3GhAUOqWArirRHw71JAj22mckaYZObVuk9L6/wWKwHDtHIhiAd1SXFwTeK4NCq2fxtWnhl1oiVG
ty0YeDcnDro4zmK0nhIq8LWGGixtb4thV53+hsZBdBiHEx6iKc8/5djk0tFoQGFLvAq1IBo55QNS
VkDYfZHt+h2hWKcvgOFzZmNvIbZF8/pLky1Yho624pak2W6Zg9lbWVyqrfhxqAxQ3kyhuHr/+XbL
ONng/eLXF4De5VigdOcLKxiwrREvC5SiQLZe+4pxkFJMItqjUVdi3z6YhyZ3RwFHC3qvPhwk1qw+
w4NMtBUwC774HUuXRfft97peLjV4clkNFEqhZloC0BpBiKLqtG/qd3/nfTvxbwit0rB6R1AC30Jg
ewu1+CJXvoTTecvDJw9YBhs5HSxUti/gsTeU6XRS3ZB0AKF8NTYL88Z2ot9O7Uwkzg8sTXU4bYAj
iDr3JcmlvTIHgWyxGApizQG7OPX5ZlcwH1yihATZ84ieNXJKvbGFcGuxSc3iH0DuqLJlK+EvJ1r5
9T+Nd3JuVSl89jb0y66+XRUKhsDT8nAuoK9RnbYa6gQeyUYt7MTBlvcrLUOaFsxmMAgtyH8pTDth
BfIYwHunDqFrgmWsfqEwfHvNr42qvwVhJFqZVr3BBl7CjTHy2bLFgvNMlJ8vqsVVlqqKJhqPYM0o
+qZ4hyMfV7cIhZOPAQzYl3HR46yVqOpYUmJAEXjDU4VdvBrhHNLZ2bhqK/K3jcFkTfl1KkAkwbpR
R6qbf2Y8T1smB3BqwS8NocdAUPHGePsHcdzfTLWRfnGzjMD++/hBi5k8ug6Yg7vLqfNeunCTU72c
LVsune+VlwI8vQGSBoHeiwqAn+gaKdgAndHGIO8oZJTEaSoXVomTP15rDcfmbJ26llTpWNL8cjVm
sEChKwgE5PyZe9fiUhbK0KIX+QWAlS2ChAgiXyo2jGvDAnNcwc9B/uZfuTQjE/wseDNPsuvukbuX
TFWqyO8debMRjJpjFQcXwa680nTw73SHfFxLtk716fNUaGSJ4Gkq4wNtoHp6bU3IJC377ws+OCd+
qQ4oji9ekJKmzqs5tN07MMIOtizFj2+NRk4CnYEfCeLW+kmqV5sWPaICKnhJt/5D9Gf2SNCJ/fK3
LjP5urLBkIgkolTsjOYRMSjoLxSInDmKiZ2ZFPD4ejONDIOiQOdhhZr/9PBHBY7IOMEHpRbhZ8ZD
+sSEUYKhWaGkXaI93odHHD6jHar5Qe7OVZf/CCYP8ykWGccYgkeJrxtrcMuYL+RqZlLZuuCB6Ljf
cjTzL9l7j52yalOB0QaMkYymzd5u+hIXUJXtbfm39lEi7n4CQQclHrd0WuefYmwTep7R7Xs2SkJO
Atrt8AEuduP4qDfIMa1O5u/pokQxDyCl92c0+EBBB7Fw1pXrEnad0rdh1SkRxn3miXoEZXWgONyL
PpfrJYHaEkNWS1T7w8xA36trCdRTsFSq/rA/iRAWk1vITQAyx9xQiV71ZTbAg8ntw8d7wzfBkPbF
rRMdBumHLc2WHAdcPEqePArGnzoGu47DoniekD0/WzZv9/NKM5HkTbsaZYPUc84suhWVVJ3zpSfV
JS4rjQIiQGQcSEQbVstNoBHuNfiPPK8cMbX/NXiu+AKJV3bu9R7P9dmG7ir8GVnvmqvfjNg8lGhE
HYV2V+UZlapgqWj/CLa01p1AWKZXSAVQuACWjn6xFULdUXJ8F7/ZwjjVKCp5N5UbJnjEZADGH1mZ
Fy7KRGJKUtisC2i4PF+fCdZ9hA9mC+IXr/VrDKGqHgB6nr9/D/NlFDuKppdKfrmq35PCfiIkuxIl
CgiZhOO8IhxAxur7VEILq+MWXYBnZ58B3dBBaHwPFGLRDjPkY+LQA9Rtm6T2o+hkLoXowt3BLX4G
QV05tGmWlWQ8G33ltzwnSkjht+lvHo4bO9hE7Hha/1F8/70O+Mxt2TG8tpjo83S428Zc0pFJwaB9
et6zH7JpmYAFWMA9jy7dkGzCV6BB5QcK3RzEYL9kB8Ec1jWKoqhrwqF8OYfg43YYOxRzRF37dUbC
/5kD6DZeHzwZyrW7288awpo7dUdBv1ecYPkfcmq6Z4PIx7M60mFVEoMtrygbA8zasM8qyaA4Kxvs
7CgALcC1/Y0yEvyBTHhnZ0J4lZBJHa88dDEtep2G/eFuaxeM2KBzRJQqBe+k10BrEWihCzMW/prM
BAaa13grzc/v3R38zREzZ9q1Ezt1WxxrCpqDpd4B7gPTuLhowCl89wo0basrggcdk7cL67ShQcfp
1dRe/fzisiPr+PVlYq6+wMZpO00RsIuDYHMbpZlNL8i5ugpEKlbcWMrZkFAiMYfIEoSUBLLtb5jj
Kg/RL96pyaXyTwDtn0ZUYQ+tn8QW8RVyLm9EVgKVSxEANY4LXTNuFvnR4ppEEEURyvimVq1ynnBn
nAJ8FRLi7aQyOVYsUqbbF62ppxp11XQVNnCNi0iNzN0ZM+nBGwupJI40W6klrQOYMPaQu4GRXNXx
nI/tdr24UVOCBVTUcL3CK3HYWAJW0IMn8uXnnFeni1cYntZelEHd/tL0PcvOfdd4F8Q1dmtr1NXg
d6gYsW4itF3D4bU4CFqVYZTTLER6UhwUH2XuVnG/b/ezEgu5aim+QKjXnWTNTDz8FsPH3rhXLDlq
CWQJxea5j7CN7sutc18JeplTvKnjAFXr1N7qEubtpHydsPBSLifBDE1WSX+w+hITwWGm7SbghkW3
YYPvb/VdI49G2BKyz7HpH1jQpwv8ZaQbhR9Etaang+elIjqBdywb9PYzz5ya/UX8J+rogpq35YdR
DuQCdBafd/ITzev5gZBhfjAtiMEwSSwPvZAW8xt5Hcw1E3S0Tec1mfm5DSFzTDI5Je4G19yZEHai
16uNjvrN+A0Dvz2xIBOPUFwR8Lhjka4KlGECeYXll8CZVXyFsrSQu2fTwc1EtVzuil5cKeryNDvD
DDtzroo215xVpPSxC78Mgdk+u2iYEA/N7wQCiNxRLpQdb0ib7D0hiQKRkfmpOdgOroscm5nbZqWG
RjshSMLcbPZbSzU9hoo9WCTr3EaqJ4wXuJhmdjxCDet7F0kYlNeH+di3HYmNEU2TYA74/CtcXBIw
sYrF+kAFdV9HcV+O1Mo0/JJJeBoZYlNbOxSoBnBj3wekPeixjCwt5XYH7JouqT5hR2opLW1T3/lU
X0duslGOHqo592zKYQG4QLq/13N+4PjH12zrrcAZZmPvQw1Kfp81w2esG4rI5LFxssk7Zh+I8K/H
XrKKPy4uBu971xpLmRoa7Fl0VmWappV0yLFdwbsyThhsifc+JYoJDRDfHODOXNqiW6MHTNG96nTe
D4wBdJJQztmLxI8w5QejTwApT/Hiz+1+kCcymnqLN+7g0vE0ip1JY4T6OCkYvuTsimYwxwsP7Jxk
frPIh8sJr69nrOIx8yjmmkTTpflptT+Huakp8Y9ESI57sCNS3zwqHt3caP8h0/gi8ov90tJAkfaE
nZkL/J+CBrG2qegt5ub9gOnh2idXbPBbSRSqQFDY2E62ZsceQzIJWF7wP8DtZVLRAx4yffuZWeT/
lqfUM9EZg+vnxF1hxJUIKtVrvUwrKQ0oOgWPVwST0t6LlA13m+jmyRXFwqbQJNQXhpEzootLGNDG
23loWlsMy2g0Al2imdrQM4Vc2TLPOPwHiaGMA2a4VJlTiA2KuJ63qfh/FR17VOrRLpl1urwlAoWG
CoYltSN0ozWhZE6bb/9lI7uliXFrZObBJzlDd5f3FP++kivfn/GjPFW34Z+KLPD515gnQMZTqWBe
zem7y/lSgI0imG4c/sJjZoCkcrrMtq+RxwA7tZJLJSITpS67SvL7pN5caPs0x1t/b0FkeDEFq10c
EgQC1rBW9Oy0LCLFIurbQ8YOmyUxSdT7iBGS7F4uf52i/BS8AdNJoGOsCWSoYFite1NSl3+ZEjd9
vGNKoLWBLfzPyt3O0c1eBfEJhhT7Db4j4Xmr/hPJlej2mFqy9j5ZcQ/TQHYXmMN+Y3lBDmWgGBNh
sCjKRfXjTF6WaU2smy3SbrXsmEeftdOY0fey2kbZ2KTx6JNYXeB5SOQVXlya2BFqhg/gfCxzmBvk
enudwKRE+dRjF9GSb31xPymydVh/+93sXe6wNMxPZlcweQWxt2cRWvtFqqGd522T9Qq1M9RWdTgB
p8ozV5KjEl/J9DFBYod9zSyCOlAhHVAi+1XW8bzI97EqHSKIgI2DBc9uFKez4NL335fKNKafa5E9
BZ+yzlH9/tBe07UfX78xsmN8YkZ8eFP6eFY54x0pAA51egMW+8Qe0vkjoBSN/L6CvhiT+7xm14pB
PjGPqGrMd81PNpJXeAgPZ2U9ukP1Ea2PYg+X/8x32512S7tqBVyHUD9kFmHT0jC7gPi6X2+6uGbk
9vzJLuy7kdqJkmGfHQ70VOzOpeZec7Ytn+JfLJJ3J+e30+julJUpfQunXXYPaQMVxYPq94RCtIcd
HjimGr2f+h7Objl07fQ+RY9Dp6wL/A5u8uY9nnASyiNs0Z9xA/4VZU/g3b62hqwq7lxbHmvyyVNM
TY8rINJ4MQC2rGG0Aj2zSmn0CAivZguyPwn45L+kkk7FO7uLoDP20mlEcvC7LED0k15+COV4rDzj
FGFkM4gvkSWQcBgysEIp+lPL5sIk9eWkC51C97O4N/3cHyzyBgUu+5U5hqQsXJIN5dPpouUAwV+k
nSfHnrtqXl/XWYySTCcA1xnqsCKdMrpVyzaEZIumlZjHpWmmkFlg7nj6lY8ShrwiVMLEsHOawODO
YlvXUO/xHtKlHia+X0n1ZAw/1CzAS3+gNyCeWyDzgKhr06+nsFxqmOi1ioOdSh5Cj9w2EuyyCTgs
8q0XASW/wTbRVBWtpNtV0w0AgCWM2Czufys+uI5T9Fm88pX156Mplr7EUUPpjDYFRvEBo+uHUjHW
lYnk84KcmMQaieMcXr72gzeBIg4HLdrfG6iGZhM2fy8Fj6r2oapsWat1y0yW9mi6NUeBA+Gh/JOp
on+ZDmHgdfTW75wYLjyT5IPsyJNbyqoHk3O+x4iIrSwFOFjgr8+Umgw95kAOhsL3Kgmo+1M47lTu
Do75wvyTtNPUlKxPqPRDtCtL+HiNipZfdXlbKwsndHV4t67uB+35AV5hSON0Ezc8wP42v1R8f5sW
Da+QM70ukqd2GT9pNBLxp3mnpvbtGswuV7uhWJXfL3L6CpIe7cttNMScPRLf3q77PK6HPWYCDEL7
z509NgQr0ojk9kw9A44m6EKPpm42Ecf3KipMbFB4PNHsXCIM4YtClzSE1b4dlJZD+rJvjVnR7ahj
k1IrSU6IOBlcUvOtK6JnCqVtcCAQdNcb7kW2C3Xe17dkfgXug2R7CSAdCwqzFrPnfTYIS8uJrobY
S9ur/YTsqTdeQGNRLWdfB+vZvPgp/Qzmi2rOcWwxqg378559E4M/lGti446Yttn823g2s4lJDMQa
FMPZX8eJ4RPwweUWY8ljA3ZfYVeeOgRc8JkBWjuuZwd9i9QZlJWbQQROkSh8ZyAk9qgwnGFpHB8j
VpgViKNIVqIF1PowCE2dNKWDuAR9nhyIVR6mFWSGMZHbt5eEXugCVplwTvcHTIkbe0BOgqUuZjmF
fqdVdH3gdOYCqZnqigmkvAY28/+CUPKlhBGzjSNLYOsretXbR5LnQ6o9qVNf95MYBHWLYg9Ko8Sr
44YODC/apcouJOiXqkHA/6gc0DOs1YeNomcvHdE9/v4zVMAwQ8BULQL+2KFaLjkVG8/eTtTyooqc
mX67uU+Uu6V8vcGT25AgSAyCdud/rSU6PdEs7QOSaDcSZQaX42nzP9O6a2FHmTFaTv6dCSCoZsVi
dxIYiHxWuV3vlyMYrCo/t16yazDd/klWmyDSuDrhhO5oUNEc8VRl0G8PYNyy+eNgkqv2BaZM98Ou
Edokq0O+5rzI7DhVT+dxHLgJLwwarVgWP3O4mg8ayyPNbCLBbrto3E1kYExfd2LA+cQ6hh4pjFH3
VuUPbMc3toUAM7jU1t9b/KqyQZ680pI8s9PdHuQJwJFld/RCFSsORLmf8qJ7KL7an/dS7U94WgFr
KhCo1pgViOeZMCyuTtclpK+b8HWrLT1VsJXpz+gFCBmkTD9gxVvmpchso1uc7R39IYPXX7inJzx4
Y4N4t7uCQ5kBmCPRGQAhAfcRblxqWlAyJwhUtxB/eqXox0R1/JthofmouAjKR/Vt6WYKzGQWGkf1
DxlFy6Id43Ay3pboD/k5jfsFeVLqV2LNuW2IE7Z8QQIsQN/5MIwbSgAa12sMdilD3wHvqNZJixDZ
+6YvqkSUUTw6OVPOVBkQPqtAD5f/leGfX4zFMFg/qnyjMXvBbmYsL1515jyvrGjQWwLQNAF2Voep
xNHkvFADx/eJE+DfhJGKjJK4/hd7V2vO28jTmq4z2JIjmcp/lS41dDhoweuJUJuERDIXH3Fh6mSU
F3kjAlhR+/yOjTmpGucVzWUVjTXsh3iDaWau+u1cMKUvHaBCagpq+d2cHSCoB4Y292XnP+NSXxZj
fxoXbC+lzEqHK5nNN6E3Yu/8XTP6sbZ6qbcvCWCgudXFoFukAH3jLjGkR0n+zkRS2D9o330ba2TS
s+OLTd+o9E4rsWeB0rbTLacbHbQd86jDuBDpCCcQe077eymRWO5LIRKWsuaXtY010+TdgF9ENFRj
LiUBSVjTjvC3J06RVPcfYTvzuftvo7Fwfc8PaRlyy7iYXlACAirB91tJsroGMc9+rP40IMiOcht2
6WiGRbKSw6NQoCFr3HP8pz7vkK/X5aYtu3orkpxj7rT+OSHGkuYaltfCnZZX+gx68p5kaepEOv+2
/tbP7+hEPQjXCfPhHWgC93w1ppVZTLWVsC9Xaa+cFS+Zn1QLANL5YymjvgtR8PUDzvnIifecM+N4
6O5KT9wIW+S/C/zSEB/3262DsaZaUKlxVr0HrkLLfa9Ytrh4FMbhbRrTUbt3UYCnOeXe3h+AwoeR
rwkIbjPRQ4GRZaxFlXHeaRJSaaICEPoCmmamGWYUlVXhKk4Snc/28seJeAHAPWUDcbSNP11tGM6x
USg4tWC1yne1Jd29OJkqIMBLUlpa0vClcG1jFjksPal6JgKK8TuDmUfWHA2pnlhunS4VFkPd4643
WOPS82eIasxIQ8g9wPio3Q/kzMSzUqh7BXHpttqX97nzy2c2F2WErxsX/Ip0mRBB/bizwr996qm6
HIk3VS5XcgeF3gi9DqMaKz4TpideGvxdxe0h+iguZMnKnBvVgSoG8hTQ9W5GbflkZ9GkiPx5//Uq
13XPzEj4K8WuY/IsfvAallxUyWiJprMF3vHzIXWaIfV+0WtG1qVFfmeAYzxitmVaWaIWbIiID9im
qag8BWGzRJcyrNQHI69mCJJlnhtBnTkKKWDrN1ccTTaKu9rx7xen0pcxHMLR8pAxMprSiW+22NrJ
TvWgPGBYr9UwXf1NB8s/DJ435ZooS0SwicjybVPNI0cpQ7OL3Gj6A1Zp3UTGs9eXwvrtPmeXEIeS
9ggjkIu6x693HsP0WShhz7UsMnIo7Buz5q6QcR1RLXGTCYWKXta3pS8cBDXYPKuFEzFObzva93gs
j6J1vKnNzWiV8iGG5eyo4UGcYrP7eed6QAHX7Yw+6ttYqRJt+0TLDHRpuC60p3O5ePo/ekGuDVyG
hItMSZuaPU9pLiBY6zS3jt4moYHoNb1pKQHk4S3feTaD3v+bi8wMQvVk/ONKscr3z/zS0VtIjsOR
d6Dhcf2arPJSXdWBk5O3Se7ulG0l66S/jt8+Nl1g2w5L1ZAxsd0wvKcNO1pexCUM14/xZHF11t/U
4i/KYDyTmD2KWxmXTFhdni/HwC8qYDMw+WssfjpEdXP+cJczMDuHkQoiwJF8R3SdU2hV8wU5jM5c
/ixvgOcxqZDMjpn5bhmRACXQpe9GAq8kceIh62n2pjpvSUIxXq0tlH9bORqarNOIGFXOp3uG1c+9
GGkbQWgHZDpqkM16RYR0nH14I7uXc7m175Zi0XLdAy61Gwg/SzugMl6aozcsyNy16QAnNT51wVtj
V64QN1sCkpAOer3qSM167kgCULqGrhHCKD4b0U0ckc0h4m4lhYXsOjF2k0jCRfwctE+LlWkxAZpN
7lTPU48/1642DRlnbOh5+c+mAi6K8T7Zd4faltUtPGvCeU5vEgwNi4i2CkTpKiYm3X9vY9V1SsDE
JNPEouQNPaACWx3LvV3I+tn0zJMoIDvYRlaNzlXJIkzQmHicMFDtdxe198R38B/mVYpaaCz1gKAy
yAl0Hmn23xjyIXbcqZ/BcBo4CuMsGm3XlfTkNoaqowlZFBnzZTVao7dFcgK6Z0V8a8gQTNTGrsPy
gotaWzCShbQToI5DZc7CAQpl2moxOv52dgf8LPyO/ivfdfPRCy8AfBORXOBAKTMDNXNMoAPn/LAy
LjOEiqj1Kk4gRbond4byJajW0Lh4RoglpDvQ1bBAdXpfOUOqF0U6oNV3E27xMsW2pFESh6N6oyw8
XWpSz3yHHRnWXnHhnLAw798dBZCK+vB1rG1DCuu0X94Sbjv0Nj933c++H8dmEdwFmNTWf10ApEW5
cPEBnM1Rcg2aS/2YLKsOY8R38Omt5T8Ff+OEPmTOhh9F5Xw07Ysx6V6G7amjKhV14JsAD3wwaOiS
gnHbv9es35KdH3YirE84/dEajcs46rvt/ZqJUgZWn6veoK8ioD8+Qz3l7yZM3OnJlYPJv3OcsMaz
B6QW8sPKvjuxauc8CTEsLoZjrYbfEGFv+OhFDYtmKr75reds3+I8GyMHiG7KM7rjUsT6OOecq71C
K6bR2K6AZNoFjuBfBXWVSZWXJbobGQtpomRz4/9iELHPqL0VyuAMfsNr0QMyYBJ1SxrQa8GqLdE+
Eripbq4ZbY1FO4ItwMs6zLwRg41hlXaCe9/7E6Qw7aT1WdzaH5FBwS/Qts4Yvno6igvgISNo5nzm
LUGKotCuVwDuqyxS0c7zlN2JPG7lR9Bsg+XB83R2aDEhQym6GABLdOzNYDtwvcyVdMJ1Ko8KzhKF
50oB+PJhUz75BauAD0aahAAoYZd3DdNTIRsBFAp/F8Hn9r2vNAPRNar8lEMGTYhdeuSvAQTLetaA
79REFot1c/ikwoQScl8QANUfR5SK+8H8Qqd+Sp9TxgwQweX78hdL3YBFomG+j8nEAkFE/2XXbGJD
BcbNCshiN0yEsE5Ebfax3lbdn6jB4eGfdsSfpW9SP25covyEvaWMb/nKOO3OKABsZyl90hEdgG+Q
0A1blQm6E9n1kpripgX87Ynvf75ND1t3kNrelCgDLj2ihFHw5BxWKaL5pR0uT5uhE1q5FvCN22Fi
lD3wcA0Bm8NDBrAPNTncu9xikv1HT3adoRAeJkYf9HjXzUrsV4mwqw/g22eFw10ZBh3gW/oBh9Y1
Avlt6+d74318pvXIMebYnrDIsGDXQ7PBtXqTz9jFBGDuocfQlEgJwCP6CYc8DYSjEW5PwQ3b7KCO
CSmKKmw6SsTakTjVHL2CV303/vwMPsiZ99FjIXzYM1zvSuHYMt5pmWftQjP0BvAg87Q6SFVwSGc6
hbUnctnYILcifEt044Zd6lm8v+Y/gg9tdtOzv/fFa/O3Rll7kDQ9BroHCj6Qln21I8+S4Rsx0oGv
jhV4HjtQGrDoq0cf/KxWjnh9blXcW7rAUXiJ/MahVq7VGWakfj6oDgAvT4J22sZ6mXXkGCeStk0w
isNQQ93P38201NuCZk3ha7Awe4Zu2keBm+K43Io+x9+yject7G0IwMQKO40KDiyjmixpSODYambf
L5uGKIOxzLW8MH12M//wnThw5nzFy7vNfIiCzyqbFjML2y28z5ShVC2ZkUqjxtjTW2JFymd6ix+U
Va2Dz6F4my/7xjQAr/bE6IUQn44nA++owGd95AH3XYwfGCaRSBi+Mm2v+alhLXTi+o7sF3YxO9vU
JQbBFmdekFsgNQAfvinvs/u2tLCTzcy9GHPiySu9ngvb1yzCsCOPS10M8phaKCuAFYE3UsOCrp4w
CHGrIxd58cRUgXrkDZ79cDIb6W2J5a25uQsaYmH+IFCbKWgi1szvYNroAZiey17hqsT7s8pd+4yF
e57B9oIzu62Xbw673lj0YikDwAsrjhSQwpOyx5S7yC3BZVliJv2l7RtE2dMwqN206gBDAB3Qb+m9
VWmue4jW91LWPBW+hB1IcXM1GvxWUcdLVgTbuBevfyfaj8fe63hM4SG0xbuRTPomQ0WaMDNkdoHA
IEvZbth6K8tf9PCgWEB1d+JkvMCdDxXJj2F2rEswkaI7/QLslLQs9EJVhDV33aOiiqeJ2nn64w30
YvLv3n1GDSjOpqmVQLn2btZkxJfVvX5abhwmyHRYjtoaMYNUd0g4AH52ywLS+0sDheK773yIb0Kk
Wkj9BknZ4A/eAR2Kon6K55eAilHKFeBDfilrzizG9uKgTM4BV6k0Su/DRj5cCI8NwewtNQB1SgJY
7xIE116oqTA9hgoEHAaJ+UAARLyKY53GS2sk+kiPJqMb1d3AmmU0qQiozXG0hjso4jgkXqgEf29V
puVbvz/vbCqqfb/nRUIvSCkhAjxYWMNJcPp1VZujY9tl6EJk2nxGDlwh4TsiFr4ErUT1j/y566ls
uKB7g/xsr00+fG8B7+Pt1+MEdnbfzDTOJtohH25ZSsF/XwiWf6O7AbGUUAJmGx2Ltr8mb4o3QUwU
WljsBT5d2NFT0dFd3A9BkWRzGPY6XsOv33tM5RRB2s9dviFq+obgEO9qs+Fuv9l4U9cvKcZ/16pX
5XuWANKDD25MHpGpGtObgh5WWAC61AS9RXuXLCAiLKHx3X2iE3JXDHrfL1ACK3Lf/8ZCnqnF0ShL
85Mg3qeuE1iIMWpYjTfqnF40zdFF4N7e22ybIXVZ8RIfif80NwDCFAvPA6xngtSnkDoanP4A/0G8
xn47CzPecoiHSC5HHIb8Dy82vGn2yQfsOQe6xYf/sAxsRPWt8sz7BKIGCv3ysrrQPm4uFDQuyCBH
oTi+l4y/IXslruqkRvOcPkCUzpBHH0wy8N0wSxVKRaF6qGohzt4W4hewFdjgsmn0xf8k4VK97/23
e9KQBfVK4UbQGbQBwP2LUzVclV6F/HNG8BWcBp6nlh1iBwMa/5oGVU4CocEVgl9/HKWgQczdgrnz
8KWSHQLq6U4JEpl183tHYg2LGu58jzzzw5fgVVKCj5wi9RkMjdy/o5b/95sHwG4z0Ww6TfrR2LOH
HTLDI0IQ/xwDSf+l+7Mb9v8uzDFaRYwzppostwuwRFVWQa7HA7fUGX4maIdXj+rmv2ijX3vCPvPr
Uq4sYBuj+s0Tw1CbbV3fLIJ61yw4527eoXX0Syr7EnBvpqRYpbkjtji+04XI+cQ9VFFYAI2nySmE
TrmeOe8VffrIXjX6kBB7d9JnLmX0gbaPPFoqpEX9PYdEzJnG8ncfjzioFtXbzerHUucjz78ibwbt
ROeosKcJO9hYovz6Z+8xKuXA0onCeVrx7UrJa6SOQFLgp4BqD8O94XDxC0t+u6sQZWmQiVLKc5Fb
YEElTOgzGgXgw807v0rslrfblJvQ7CJR6HyLceCca/6s2IEYy0dssJR5kmP19C/GQoCypxFt0wuG
QDMM0dPZci9TfMfmtGdFzoGu+A3z/6LGdfIDjE/Af+2UcF3CBCGzukn9OWyL9SZrXWHTlFE0ReX9
RDwWR6tI3iimaiEPdvwm8eY5XeR4E19u4JfVc8rYTj3cZHHA2Sa+Y5y4lnAOYmgcnyjPOGaldEFX
u++qfX9NC4k/gu52wXSweS8QxkEapUZUMlelOgxt3fedTjka5PkU56glnBHPq74YCpmVHCKslE9t
9WP9mFgJ3ZN7TkiVNRzVT/hCBH++QO/Kw/JToNvZAhcsyTYcuxBJmkO/Vkw1XVG3NiVMf+v0d5zI
CulzFnpfzRwM8xwhGnh43MK/NV2tusY5eYXkr8vAnang6tl/skwwW4wdcjYPWQps39etOnb+GL3l
M52Ha/6aFEw50tbX1Op022TnAuKm18SJSHMmDF7MJceoHKPSd4kuqkzUo7ss97FNUyZA383u5bHh
kTczjd7RZDDDdaz53q4GGHOe6jpz1HArxaSTxtEqbdYbjvHrT+6LiUi3Czr4h9mckHeOHdgyYkXG
j48yqF48ZKchEoISZclVbDZ8YPFUBry5ndhmV+ydRywGXi41sVbtj8V0lerV5XA38I98i0Rf9DFG
AB/PtN7GQ+h/iyFW3TA+eNV4X8Vl9L20321mg1vEYVUJCkORpLWfzrX4q3wJYst9w/GLepI4LJxz
nH6+TPe9MJGRm/izNpygvauFghAUrCLhmdekq2BJE4cCXB7BySfr5OvSw9M7NrMaBpgXZFZrZycA
1s/rA1WdF/g4C9bihiv3k4tFU3eMaIbPaSgMg58UGeWf23qXcVPWFY98jJcalPyLRh434lnzDSr+
pQfRAKulS5Fdcb5vZwV0Sje4VKuwaTF0aHvPxhX0D/Yxi4AIWJgCU01HparQ2002ahMbQWJ2sGxs
/jOJHSWzj25EKK7Oa3WtMRAstGyWsPq51BJoMNMa46JR+8OAsaUCwgCAO/6RqGvwchB/UlSEvw8Q
rwrpOMvMI3HiSc5OM3h5vIn/ERNVMgnteuuO/ORoA7/Dlw0JQpECMhEJNyn/nqXrEHXtfEN1CrLw
rqpEQE8dU4mKQSU9TBSDx0bSsiZg3+zrGuaiRZCaphsaTWcEUUiw5QyGXVpPrnYZ2mMwp2M/u6Zf
5JByqUg7Vn9M15rvmNQ+H0T5/gSV+Fp0z7jRdBG+jVsHEvzy2s4utee9LMNaKNLSzgfVuJ/eXc7j
ADa2u5XeLYrsrxmn0V1Nx/RDHVgwD62r3689PSlcEaOy8zIO5FHpFciP0uED1ZHhoMQ2jHuwS0bR
G81n50Q/xJhE9oVWWh1VVqvlaXC4SQ08kMjRHu2gc7PxkTGkf1YExHs2pR+NpMZ5vrSHwNEYY/Ke
/ahcMCCa/Atotp0Rty/fCrnrcyiJEZy19gOyRt79NVtP4Cw/m3cRmxiWsUZuaVKsfj1BUUkPgQ6j
56LN9u8ImmOUG8kh0DT8tuOvdLaP3QRtEKZ06AuV/A2zARXpWfP1GmhSkua755cAJX1F2hZn2ZnO
DKv8w0Q7unNxWgGHvw/mGXWvujIIE6sDVEnzWDvgCeg3jtW6XCVyBjCkNLrGQgkHqF1Tw3Q4U2I4
R+fvcFYnMnm34qg7RSKkW6WEB6bk/I6/mf1YqIdxoHAUce0BjdcBMAGSbFp0CZAjMlkoX64Wpbzx
KXAfYZR53bzj0xfiScwlggnUwiEqkKuIYmqqCC2asr4ySmUu+Auew1tzlDHTImLts+v3HqFBKayg
W7NBHR8ypaCkBRfL78vX0RMW2PwTxQOIV5izOFSFpTfWx2NsUQRkRi2MkP4LcxjlcoPQz8YxS8Bb
BHFs5ZBw6zO1rTKchQfQ4G3l6CU9fGRy+PeZlQIlYsR9JTnDUgweaYuB8XY5sbc81F9trDxOiiWR
G5ip+aK9MBh8Ieh+jmmJKuvjUVpsNDO5+i6aB/4++iPW+yuX+Ws9buucz2zYw1EE9zJJeFhYhIbu
aLw0yB4DN4FkyR9lR+MqW/lNsMJFvqzIl1KnNfQhiUX6T+v+lOexNUoH65bQ1BDxdzDtr4IzZg4S
m9Ua51cjweFn3U+7alkR3v7RNAXNGoZYjvoxMGVRER0GQ3nitKprcLKZ3hkG3/2UuMIyOsJQwNID
6j+Q0CWApTqFtRA2zueCFmq7dW5gJCmHyCGqitZCcSdH9KyKugJrkzNi5sNja3os6KUCErlX/W3A
Pzj/6qxbOEnuTCXY5NJqp4tjxZL++zfQ5PCQWUUP6yLS5JBo77SU6HTVCvVb3+oUY9xLeVv+JKD/
ENIgYUq0bbYbHEiqVWM655i4P8agto5Rd39Wc12q5Kg1qx41EJLzBqGmKn4vwOOu5dNporK3gHoa
j2Lcj/e2Yra0Vk5h+dUIyikDfWLUMYcFLROM4zGj02N+fTa+RlGAXcaJAWb+oVanSqnGCo+JTljW
03w+4CA/va5FlBdkfLKkti8lCZD/sIHsWk1vjnJvVIpsxSxl6sNoaPT5e2LldOddgUnIWOCPPQG8
YEcxMxIasK+y6jYVc/burKncR0wq91Tzc0lwiZE7nr4cRZQwEG8But/AEkELayQdVAdlDgpIe4Yz
SP1EzMD7q/O2yaLzsw0KJ8PwYcuF8jw4USH8vLTS3lNR3QL/wQS0yW0kb75CbZhWEqhUC/MlRjMF
/pOVlDYsxgD8Jj6z/GxvRzS2ov1sWZmhs2s4XRuGe1Dprk4qZ0WlpOdTdO20xcIgFvdcmSUtvyVr
urdaV9tt84QYCB28ZVdNwJGDF4mPWAn1NB8hwCqwSFizHucsn7QDScppH+6xF/7LsD6gRmU6DAcH
Yri8CbWSEabKBN3mlhZ8uv1xE7SBIsdQzFd/mpU2jUzOYUwB4IhHsglOa6Krh0rJxpyhXjwhWz3I
dzu4ehsXN2Vw5g5YqBsRda8eucQZDOCzkc19W+1lc63T0b8m0NxcvB3F0kVWnxjbl+vrleUtDG9/
dbSYrk5vyMBPOywynPlAmIizsr4JzziZ1k1jRZKIJZBWXAg5eq/aH+kdGdDOmG2i47xZMivxPxWB
NZCpsqIqy+H6e+FRu1j8Kbu3unpuskd6H1s3IXHF9iZmRyZ3P94sX1m7Cwu7Idkp8czTbWj4NJsF
UuSLSGTCfLSDJj+O5mdlRYwgfDirFu74KFoO1xZBxMhynJSg9dSKCatLrfd+NIHmyzNWeSP071uA
V3zujN+EEj3mGyOvkerUMPd6JeQzhBS+EudJTVPU8AQWnpxAXQo1x2QEaNwBmvB+K4oIbZ5LYxbX
lhkaDayLf7Il+9ay/lAUqaJoYk0dvkQLA+eFf0fP1cYoC5UWnZ1khE5ouEYn5uon1oNWGEqKWf+X
eDD1NUOSnksU8taWSxjwbuN1vXU/xxTYAoUhnuP2vbswcCQLYpYC/8lsZy/yEd43r1+cbRbt617m
WAmauE1I7gCQyEEe4tbp0py+q1Q1eJQ90N9n7lZxyCn9D7Nj7k6WdOBcgX69Tb9m1fmEWQM2Rcg1
L4BiSMmMF+BWjyZTaSNY5vEgquZQ48z69fnuf7aMHGZjZuONsinSIbzI7D9NvfgNR2VM35O+Rhpr
1C5GkTVABZa+BcPyrYIF237nvoPq0sEQlCukfL0pzEDmnV99EFQ+JOOpLcVmmchjkAc6nnxYic4X
LW6PeY1MaNS+3OwA+xKHcOqDe6670XbDPJPha330K3ZjARShUtFJrWhi+7QL5l2JCJcSJAC5BXFG
JW95hWYELLJQ6tydScMxAzpALLn1egNAcdvEIf9PMeE0iZRlB9IhuirHbjkdWdSDRcMSagBf+QRd
OVZrnl7AYW8VM2/GEch3ND7Ygk9arJGmp2eRyy9hpG0NLc71WDEjF071pp3NdzVysQsuGhYgkJTm
eXMHZ1wNlLR7fyb6gSlbBNbGvtOBYeJzS1kfWkNNZKSMGJbbVdE8XZP1dNtdHku6NsitSXFWAUoQ
Tj8XzV1EEIESqMnaBXTK+69bn13Sr7XhhNcKeDcWZwjrjRmUsJ0RRfyyrdjscPrA5HcSaqCjpHIy
mVvcHSFuDaoUYz6AIhQ0JGlcD9EclO2Q5Gnx+UZ+Ss8qUDdvf9o475V9YDJtVWCK+05hshGWsYaz
ZY7r0yu1gDs+KS9HSl0VQJaeCxQwvUW18AhzXTxCMKrmGWe5xhGJw1y/qxPT6xgUx29g9EpGR0T6
5+HpfiC2bWilJSDNA6ZC7MaBXfPSQYs9yGIp1khJYR2Y6AniYqw8gjYCV3WeME5IKcVf14tJbnUr
dUYI+9INlz6Cjpc6EeZYyOUF4V8fBGLJsnhTTi+/kMm5bquuzSPagOps664X5ibI8e0hhG9ioO9A
/8NKInC72LhHJwJR3uzefSDLOl7Dg9AcB7HYjWFfEMHjRfJ8hXe5L/Ro71gMeXcod73/xDx6XBXQ
pVG7p00WQnkKvfuXIDz5fDdfo1lmnSD3OfPDcqJ9Zx7CvBhomRLS0DsqtyA27fHFbjz/nze+JnaF
oWNFUNZtZrckOFdyOSIo5c8RGK6lBt0NRfFCgMsweXhObAeAdVDTYnEmyrf5p2Izr/Gxcagm0dOZ
IKMa07W5NKIEur9wamaIAEubgZNASLIvo+p5SuMcEAmodkerty9jUZuGhKbiWIYjS80BmS27QS9z
jrHqOHIF5aPgjj/luBao86GQRxcBnF7CWwZPKdA0MDjbgHIuWyLS3tnvNkbW663wkm9ie/lBg+X9
l0Pbtp6Zxtg/U8CFcMc8hqI2y6hV3ou9qHaemym5Z9RwLGKU6qETFCq2hEYrQRt7Ftbef0MxQZQt
ukwt7+VGn3OhTBDBTxmdcc+XvaF84OUdWee40ZwreOW0Ld/05RDeql6blwq9P4RNFnBjn8lT/ihv
9uHU07wJA+h2rC5IgTmrlr7n5/Ow5p8kt0iYdzEJvNZ7oS7JLpTwXzbjK2kdNzPMRL3+kWtLiOqT
t/YtvJw36523wR8KgHj1zSsAzxMl4VIxt01drDtxjy1ScZ0c6VfpTGopo9dx+sRWzLPToXjFeHkI
/lw6qLgud+FKeTJfH17IcQVtEzgVDGeqmYdUtVfpVwgPOZRriP2/cKCQgXNutWehzQg+XS6p9Spf
WDD/vBZDgurQ1UDsfQ/2EKRCfELM4sZpjD6ilMShWamJDDLUScnWI/IDeYFHWPwH0bpHoaubO3hJ
ckB6YRIP3OkmkF0jTjppfYTUrFKr+s6GL0NPSwmgdj9jemVGUfvEZaAdi0W1eCmRPV8F1sFpnbU4
FSxpMxp3asf34T1GbGMhitEWvjNN6MaWE6FQfB3+FaRkP/k+ywgVGbeOLSR8ba5xyYdTXixkGWED
5GZFzPIl4J5QTaDV9EMtU+3SUbF63zYQG5l4Fpf5MSIG6K4iHXfsJCSAIOIVSZgNxZAyBmfCgzGO
2acchpmqdt+9FsNvF/gRjVOtRQI6mhAI8k9wCUtIAXP2MP499EpMPI2+QXiOA5CEqfCGYbM71ldW
UxXEHC2SI6A9dYtvQHLDjStg2JdLtmRzSknGl+v6nV3sOdkkRAnlgHdUmAUXfeSkI0c4Qjlo0LhY
+KU83nt/TRFXkTaUCIqEgfgbRFD8MANqTnBW9yl244J9V0C1on2BRGpvQ3kg9D8GtoufR7bhECBY
jEi/HuwJsLWKgnRMGjAixRJR/DgKCE1NwDRm17XCUQqT98JP33qzXIhjrNZBh+fcUEOIiZ48Cww6
YS+Kp34xBcHNtD6YEKV0hJG7qlCknixO/dACI9yjFSnuIqAin1MFYkHKchSvFjBLet6pYtj2f87C
agYl0BBjoVomGKgKtjmDTzEQ4phwa+htxr+kKQT0SZe7fgmaT9RVU1ZPoZjpXdclzO71DtznnX3u
cWopsJ6afm5xaagsXpKfmVc2MStMsh4rrqZG5j2rsfW6cuYya4ChkEShHy1dNi4VDXH8PAyoidmk
cZVqgMri3mr4aL1X5M9ZkjuBfJr3GCZnfFRN8W8f0EftUieoz/VR+V5F6iRRseE8dHqqL1v8Lek1
ckPkabbXORP5H09uLiTBSn/Ac6RyUfIO3dFUiyK1VeHpM/OXC04VkqbCIUR1MVa3U8TrKYJ5tDe4
4mF3Olr30WBu0nAIUDPOZrGGo610ZgpiOmSe3GShE7X4acBUGeU3eS7sThxkA3f1hPMlGON5tZMp
vG8wABxQzcGw6PdMjunGAryAIE1tkTuGUtkz8NvUtl+PAsj9YPBIGLv9XU48ARQOcQo2cNEOrAMv
dVcPlH0zpUfo4mEt7avjgNA79sDftqkAkK7N1OWAVBC+a39XE5XglMjENczYAcl+O/QZwm80UaJV
SPCtVl8c3ZITIZNryGMuL0Lpn1RjQFrPzpi2e/bxJj33+mbuISwC7cmFAFeTolG7NuNADL87WZDw
s6dMC5pX6z4Tlo160tAPIfNO0o+ls0Hzjx1JiKIr43ScveY2lENC2+NirR4QgEcJ35XgGNGjLpYb
pdrpoXKQ7TONLu/Zinaz5UF4cKynrqc36Zzo+BwNLc6adUoHeOoARkfzafeBQtCE+/ncSaVpKbQh
3VZrekcupyS1FldF/7Jb0SB+VX6Tg6jYNo4XscHIq2qrWpJHUkj2jqYrpe9wJQLquW/+Fz0hCM37
vILmJaDwLyqOYrICoheox+/GKBMNykuUgGusK00JRZ7tdDzGdRvDNSJKk5Mi9vpzJugwABQby3Xz
BtvrWLUpJsfwukKIIRUxVxeVkJG7FRQEr8Vt03lLb9CjhxpFRk+ps5cid6URx2avtxRcd3/ky7E6
oUfIgC0NiISniNVNsxdQhBliDDSbAGKc+GR9ck4CJgDj59JyBpIY94hpKPWzXGgIChYWC/hjuFz8
eG4DVomHZ9P6Tz4cpwEt82HG8MvMEOFVj/uPG6bZPu1lfS9WMIMXhnb9OiZvvhyio3VRQaqHnN2U
9zedV1WQ7rwSceXs4441UB8liIqEmYwFTWs3IFwaPXRhMVZh7e7TouElacq0rv6PnbE90j+jMaLF
rvsVwbjp0TJ4sL3X1JokZvn637AEfj++ybOBnHQFo37ig4tzel+psE+aRSf8FmB+nPrVXxbVqTpr
9w+YSfsvrdOGX0egG6556bdBFEspMXjlO/RUQL8UjAJpcWZ2cVWjtr04INiBLrgQORSZbMSjsQ8w
nU/s4xu5deXzVQ8OAQANT5mL6Gmuq2Wm11BUeLRmCzMguBnLl0Ok6VIgvROuYIjrcyk838GCSl3b
mr0+D19LskstHRgcdzfbBn4PcdVFQvnQ3CM3gbOByzpDZdSC8wtn6XTL38jafVFheF7ghahxEkZT
uE0kJD/312YYpaYpGcqUxUjwazU5pN5kK8vj/HzUcgLs1i8fhiRD156Bq1BPVlYAUkSM8ANosc7S
TglZ9fXuh2l0KeXNPrdFeifM5BJMLgPZ+1MdvPe9LHYdt8ryH5DMw5nieKwQdsyKSClD6VoXwDet
uCFceCNhbD/YtpelyXCRh5e7I+WVSJM0YnIRd5FJTaWi5U2SMHTcd1Rad2PiOaBRzUj93MdH/Bt0
183CT6rg+SNdx3rFLsRUYBrFnjkLj7gxIxV9uoRQe0ptM84WAg8HK6ar9eZ5tkXdIZYzKno6ndlk
4zzs7HcXsZt0m0DCXFMyhehk1zA9MUTKFTlmK+fzf0JCHnmjjNQkcMDBWebUcuGhhtpmpUxdvID/
a0mzznaZQDpdx1fPpfMOGxlNOs0YC1rXqp7GvRnmBVtCoO7GaHH1ZoO1PfgHlBGj8UgXFGavVQGY
BE1rVnFSUa7lABa2EBeEhyDU/wgk+B6m2AUxhN9O9gl39E+qeaDCKSTx6SpbNGCx81I7M6E3IniT
/Re8SWc+GTAjKxmugRnZsNIh5GgKy1OiFJ6YYyib7FldhOfaqUPIa2kds0WwnnzuoPm66NOAWDbN
wXtl3J9sALO2FrfrDmQhCs4P9u/DTdGcu3NX1bQkRryglppX5cs59Nm5mGmdR88ihpGo3v1F4sAO
Ap41lXSe3CWSkKydGqLBUFsF//egpZ/dLIcknq3Q1rQJiNgUiptd999CAC+YK72pMqqQ12xVz1Gg
C3OmsDOSW3VdCPsSnXg2lgrfsJb8wKMccPioMptiqUkUyZFQcK+gsww69M1W2FcI7LQUs2/6A8f9
hJBaTFOW5Yxo7IddJ28QJaJ6k4oF5diUXjRgONJWBiC6j9Bm/6oD+7Qq+3G5FDcL55fDdPj8Wzu4
un60Jmb15baFUxy0Z9rhlQ6mnwIp2IWy5O9LAFdW82sMVhrJ54I+9MRa/l4Vw5br8GsRxI60hGLX
sFxeCq4Ko4q9ZZPB4tDE9vnJWe9jr4BDg1SWshsjJULNzANMlwKI0EfUhS8J4W195jcWVuJNgHV7
d6D0q20jRmxp2FwXhsu6CgLfxZNQco6+YuXgowQFVcUOkGM9SHb/8f3eKEQkV5F7KbM0ehiN3BN4
T/PuDSdqYpXWErlNf7wQSdJrC2k8X4gXmwSVqjmw2ggx/PF3NVJUl3H3xTXYghOabSQREgph5Jy5
LFvmCfBdkOd7U6/Um9Z8UfspPNIkW7Sh2lnF2Jhw3okoQ0LVBjxeUVHApAlQSm48QyN1Yrhs0xw7
RDYWUN5ZA07uYxBrJuPibNxfCBa+czfQeBDG1DGtPHm7wxXmY9M/5SVeSprVl3dqsQrr2gCphI1n
+LHhJexN1PIm53Gd4ULcGAxubGL/S+mfDnyj1bV5LP5/FweaghKpvJYaeco/Du/ToRbDn7EsQf0S
2hlvV+Iv2RnBEDtCsfBLczQRxQLPTxP3yeqrHHUIfTCLr4IkEvE5mkALVjw0P737dM6iFKCHQMvc
1a8JLOyP7oFzWHYXmyDDGpqs1R17FOTMYyrMwQu/EcIGDy01/zH1ewF3vGFBFsErorcjOzPHMyPA
4bz3B/3bS2oFj4B4XPHdJFgJ8Vh3yiWuv3bZQq/Fm6e44vlr8YWALVzSu4tXj1Qhx26elmqoE+Kj
ZFr/8DL6iDVUXxIn0ujJJdRE3Yh1VXlBRiWq08cuYxm4OpbLevE3qcTFfU5bTadh0VNSDqcF4VQj
NcpMu2y3wKdM6wDvtQ8YEnkQVtHeb0pxYZz61a3xPg1mZB/ux9XmT7LPaqA4EVfYYOSZxt93/Uo+
5NX1N64yiyEmNk0tp9KAdCJs7QeqQ8WwzgSglqT2skZdlxwkB3w6Vtq4NtmvZen3ulSHLJ3aUEZs
9UEQjukIv/vzBKNhtwpjw1f1eMZdpD/0WgJNwESEBjOcIQ30bNrWZ2qcDqIuPTGjf3grZ/mA4VHl
T0buC+P4PKEB3lxzh96dXPFPfRtpCgKDn0aO4l66hZINDqZg0aPLtJ9JW1KJmJiqIJla72rrOtAr
UfI95nKMNrU4GUlIpbJT4Ru5dNushZ8wQFfHNnOWzX6ptPD0kwwhzq5Ho7k7h9idLMCPPibb3KDY
7X1sZYqUuctuSiy5a2ByBXJ68GdPqqA9EO+coGF6GTMQ6VOgsfWHTWYOs2BQy8Bf8xR6f/6CWGGj
OesMGNDuUoUlRIwZjjWSVVSX803yPauWAYWuYNPPFXUKxu7+uSm+GJlOAbyVp9RNwlkm9NRr0YTD
MrkTZRgajj0hnYgyEIVSgjbBAGbx6/EklJRXxJ8Iz7m5Zgfc3rQvmF8xJgmFu0I3/nx4IDtgtq9d
iJWYbD0CpTYaSEy/YNMwa2gQC9NJsOLmHlXnunR/QSnQOfw7nn2JpcUF5vRa2Sjo9m+nYnZxepO+
zmn3WpNKjVA54x4duOaVvG2xKWIQMh7wEPMpOtbGEhlcIcTBeFz7Az8UzSPuY+hL35Vw7CXCx0bW
VA6xFJ40KGMvgMFOmaPXmztXHbkIUfkdzTwBmeHq70J5BQpU7rjWiqKFitAzUXX1pB+Z91j1yvEk
YkgjsP/4kjPknl3W+eczONV6dtJE4pGxifOV2ZqrAr2r9Zn+PVVs1NogynOZBF46sjXs2CmqDs6+
QtuZ2c6JDZPNq8ZGtss4TTdK/L4n8VckGehee9bgBD6oqOyFZ1+wNthiA924cA2WJ5JBTrBqr+1O
BFUXq0EIKEATAYPhMw5W+QJaLlxT3ZchOHFygqHp+yTH6EbralrHfQCcknda0p3mugku3TiRFbPC
3LTioRaQaEZY3i9CuxRVJ8ppcPt5zr3ek79BaMfg87VnBSsPEcK/uWifDyuZImt0xTob23swyxkf
Yx22/p0dot+TqGV91dPdFhreSao9aGRDYn6F8AJKRHUrSNLC5cX5Fyqn8fcqB2aIj+F9iCsv2Jo0
u1xwek+0GaNcxV/ZppMJhHGCWlh8w856VaQzqUfRkN9bqicnfSo1zCwbNEPXQnPN6deaNL+dJLFk
mwqOemNfVYeQLRgL13PcXfUjf8GMzEGVaRtgJcLHRDPjftDxflmZ4JTcUdGG/RRllz6n+7APyNAt
c/LluWO4CnNKv194pv3twb6QXuTnsLoD1lG7q0gGXfOP6mHYF+W994JiSblhfvQ8MRbIWTVwcKVn
kO0yKQfObTs7OSPjKNGgMBwUYaTwiszTkPxkpOYOtMHXTIOIDp3XtfGHX1mgide8OciGBnsNWshG
fvYqw0GD/sH7gKO1IMeYoPD+xzkREDUMG3caOSrVe+Wf7NUb57QQ+yPxO2vinFEmbI+snnNX70su
UYG5wy49DgaDjPmHwKZ7l9PKVwYUFpUWeFVG1GDXOx0brNFiWlxJMgqpn/wIoEUQZqls2j0NgOcH
u388Oz+JBlQbEuuvOUmdS0wGVbqVpNetMCOvSIcIh4S0QJ+d/M0OnjWTUCBHLBKV8i1AYjAVz+GZ
pV7rY3sFyW13lpEKat9K2HIcLz5pkuiE6VOsqQyy4LVgP6CiNRgdXi+FHRz0D1gs1mPbsBt4n8yP
yelt3oal2+gfTV+kshaf9Nf953ErX0z0HFVGY7Vr62odvMDUBaG1rFPDYnrSjHDX1kxgFa37m1Vz
cgL05AiOwt332bBY/FC+Ym8NKs/QwTXBqAlRP+lpTwA8qYmfSkeYXHA/4FeZTb+LGlG46NXcv+8X
VXg8EMerb92hTWYfI69dHPonmzEYLXPile2dN43VKMiyH5B4wCnTrdZNsJ8OOv9D4qrJkIT8ulS8
GtpB/1LYrS6aZta0oZg4PDI/9C9gtCnafLBYs8tpDU6j2YMMfyW19PfEV1GPs6RX9UTjRuzuOs22
wVwfK80SJLRDqHGSfuHlrv7+yPHA4KTqNMapytLjPsaTWWsrh6m33KmnL6MXtSFejOc/kudIz8IQ
SfN7LJSM5W2sGTZrR9mxc4dDFPd7QJg0VEqzzZgpvBYQZ3B/GIhROsTTsyp3mINJbJIAnPA1nUST
Zs3upQKkFSLKk959ccdoLxDaKXIpIORm0RbzrRAb2Pgs+022uQaSgQQqrPgf6rZ6vinzjqeEcS3h
+43y3mciwPf4W9CBTG/30MFzwMMVP65mSk/GtWPJV/Tv+xc83VoV/A0Qvy4OUVG0SaDPFifk3ksO
LnFSM6UbxobQJK+V2E8Dz0qGmMHueS+fkCmvuFZFhy159n2mgo69eo9odM3pFr3MlMAxJGELvsLN
6oyuBQYBEMTtTe8yQ7Q/Gv2rVS0FBcUlVqwaiq4VUlWJCc3N7U+9/C1iwgml93JpbtQc20Vgg7Dy
cmw29fP5fRqhHNvPtF+e6SPAEugQ8fUYumFJn5zjMWjY8DEU+YoKWsFhKEj8TghFm2GeMztynpke
/cUY/HxoX/T6FoXmZvb3Af0ZlP6m3p4oagFHREOYdyElGfOEukBxkHhDRuXhGtp0ssjtJ69a2zYP
gA8NpF8AtJVdZuu57o1Xt5P3331mVTP4gMILgitlL+/mLiQo6LolaoqK/oUcbpcXMOxK2Diif+lF
YpH/z6vvLMtf5QV7VRFcz6tEt3LwZ+bXQ6AiH1mT+3O4zFo+1Zu0hWGkos4EM8uU0Gf0XlMBLoou
Iac0bsWVBYopmfbpLYcBNdkSoCsCZ7ToMCZ1sWYP3spgSJPCg24whYgu3rLfWT8RKE8I+62H1hvZ
BmY18HKGxrOcqycQTxX1x2O7FP3ZYy5XuZXLZLxUzkIbxqmRSf56NsA6pwB15ss8xBn7avNK4omp
s7cRqyT7Ik7mM8Q7taFJs7gys3STCqMhvTx8CJB0eMbS1cmbmdvM+kEv/y0yhvwcyK/iIoZ0dqBO
sKYHNTyOUHf6xlbDMsClUShhJ9tqZhEZHTu8eI7uHgcLp+NEdrPxr34W+ERn13MFpRWTPWue5Tif
/Os0Jsv09u/K666JAmSj+83WDgfIt1SkgXpUKIZ7G0VxM9Y8W9OFfI4cayj14MJWmrY6EQbKb0Gu
p6TPaypchGSuJu/D8Dfsg60WrmlAnNBkcUdlIp0yvzJksofFS+Y39fdfLXckh4GHENfqbn8LCcHy
8XnwuaHUtGXBxdgutXXLn0X8vvacxvXiY40QgONU+W2R/HPbVhGijN3OVC+9bb/Om+AQYNb0Ybsi
gYHRkmu607e+JQFjN972t7a7IXqYVGkbR4m4HENdKy6YMV7Gr6bjYEGnn4lk5c2eSRmH8Caf/7AH
TKZrrny5MQwqn9Bk8CtOk7iGDh8/Q2qXpPK9+wZJMVh/9QMhc8O2Z8l/AfJGwDyA2LfBf4QPhvw6
e6UqAqyJNnIGX/0t1PT1fdw2laYrSxgUsFElOpvZRqjmx2vXvHC0R7DO/BfJnUQ4I1fWHoAT3uG9
h2f9hsKyegovRteavYDZTVdqOQoFAGUKJ5JIdAneduFf4uEbR6pJaraMo5Z1Ws59YlUVaZbVMRqI
KvF+TXkTXJ7El/DeLcBE/o7Ai67lR3+YK2KoNSDRZZmwf0X/3UzO7FIPExuQop5Hxmk3mQCM2oHb
6dFgiQjGxCvkeSN1V2fB4R/bz8BkezfNKBgL0lEM/PnkhdHefAfs8cgZs1ZNUDk0R2laLUqX2EdY
ZJjstGWCg461biBhT/mBxXxa4iPJIX+qkhEIAEM9Uj3g6/BNbYdYZjUN2zxX6CwyaRqV6K2/wqiF
8DA+ZdH526WdsbPwhAY5bessQoFtZUJ3AcsBkGqdgVi5aJB8EBTTuHc5sZ50fAH+uXE77VHrx2Gc
5dnsNfTLwd6SL3XYdeSyh936Qhxxwty79/tNCX/o80CrkXM3B3vHMZ/UUXT1OXxk+o2uJd9Xo+JA
GOWoVJyOXRhlexl3UZUmG5tvj5BoKxz7bcrdZ50Vws4llU1OGDVpF3u6c6viGhqlmQg2SMGmJsOE
jV2D70s7wf4NzuUEIXCfCTkRTBI51I419ckc+mNVB9udf8co2sXzZnWHUYXk4Dsuj/fKGpO8m9SW
o8TetB1vGzX0QhZcE4PZPFcgSwZ7Cp4dhBOs4NR1E58v8awbBQEWo6rYeU1lDAXiXn63lfhjPv1x
KakrqnDTB30O0tVwR8tnTFrRrbpnoNGZGzGQcHd3IQfL4vsJ9uJAULaUBraA6DDRNK6JvPdKvAzs
Aspvk1uMqpKiZKQNrKfA3mJ/v260StH3qu6c3RH6fTpSBBK7lPYnL0HMDa4krD+YORbLbfVoL2Ni
qzmLaV+chAJz5UY7xcPqaUsl0iC2pRIT8esBH7IKlB3E3AOBubaBILQYHJfD2oVnlqPQHiTuQCzR
Dt2kxqR0AEjuIf3cBCubEG2oE9bdilaPieizBUeoOhpWgdRYShugnn92YJdaJYTZNKT4PuhYNoUC
BqWzMzf3tsHoTMVYOg5gEz+ijh99CSjkDFkVuAVjxPqmbUVsQJ6VBx21M5sfbUG5tqGS+nr2VKjp
wF0dv9ONvCGHWhyDE3gqM5cHn1SeclhVe2dIBjDoL1OHDzV8xZJSKzDDNfRt2uiZIjRyc6myp8Wb
GRkJoGFsqGMNSC+fhHBXAD/xtzUdYl+Tw12doHVyju3VwufBlk9eNnkUgpZpMslcLV83cQC1vU3n
ngw1npoi9ZHCFSeopN+7CLmcvLVvAyb9xg/DcO3DS9P7FABsDHDrgflwZDGeIlVfsjACfiEKExwW
RZb2FcG4mlQ0xOjj8A3Yj9tvqbkHV3vNhy4V8W79Uqd4Kf1xrD8CtPk//jxvLY2bQGVbh/EdlTV/
1bd9PvhVGxQ6T2q/Dwva8i2sfW9dJyoJOEioI3OZQWAc9Axr9LZbyMO0Zraeai/1l5p8/BT8ffrG
zU1cWpfCUR9Ka1O5DqB5L6IDwt+kfWe9FqyalD3v+jMeK4V3uXPKY34I+QFhQ0XgzVJaFmilLGfn
RN3JXgfgGMeRWbgeqFFKF0duBLdeI+QhJaOUY0mIbRG2A/C+roT56vG0oWAvEjWp1tpmpzeowAbf
MX9UOkA3ppgyTSHExaMRqtSPW9boY5mhEtL6J2rlZZ6g6uqJG/vi0bWBudJWqgEMSw/s+gl6TwSm
zw2eafu2W0dCeQPAGjIo6ugs4UJHZ+1HUE0uq2Frw8T+NJul4zBFdhxiTcuUzKgysHHnMsVth5HR
3ieQKVZL4rA0obtY28Ivp+ndgDRHEah4PXDf1S3Wy3vi7xqMFCJrLJzGy2VKXyoMd2U900s5jr6m
YEWwz4C6877610Y0ZhPFw35UC61JUI1gg9SasUGJC8KCnV5pnHMrBPaaY4VCjTrs2ZkQ9gortswI
xopyqG/NQ2kSDPvmnniGcvi3p5W67O+HsHB9B0a630Xwt/0NMNifJAdITDJ/3NctS3FcyB8WJVds
PvldVBqgUq6oayKvGtcbeDOFwoRQYBlKB4iVIQDawquENIcJXetL9k0iw96IovXVsVeUTz9Rzldz
D267XNKZm2fq4nNnBwropr2FDvnYFUPssgOYXJ4uxjgV9IWvP8d/ILYhaoIjMCMxKnRMYXGx23Jc
/5JOd4WKnDSuwaU60o5OJhdsjN15YiCqPwM5ARHCddFPzcuyed0a3qH8UJ93765+SoYAGnNuO9LQ
H42ZLImeTZbWgwamXcYa3ELeOWJdyP57wmhlfuFSei5nds1vktleXQM85InB3eH/gHwJpnHA16y1
eMsx+NANuFrCRZ9JzmlapiTUr4l+XfycC83K3UQKSZr1YvGngSgpSsBu6tMwl8s+ZhMqrrlfGJ/N
c3FiG9ANlrJIuU4pisHZs2UgjdORiwVL4IPWkfOQSk+09tN1WHToc6BSwUEdP7+cDCI/kXvv6oCm
4vuPPKScEFv0cFvwg/C62PxvGipEnC6nkPpaW6lsMWoXjar9OHXeIgGGVOtyvuOLLjPlbWIDK8n+
pqZnWTRwUig10EC3CPSYtRk+6srwGhhHe4P2hgBLdb91KVweayoCF/rYT7ra0KiXQIqsz8LGlWzx
O5xuI5/aaO6cNy0NURJDayX2Agd0aVB8NMMjqrGI3594Rhj+LoQZ5F4lb5ugQDgqDsK4pT6f36b4
cxeKCe2exvQ04F80ivNHuO5ywPIn+n26mRbOrIs6blx7Bcr1XsnYfSJnzeWaBpmm3spDuorEF4jk
Uj9bUKMZGm/2pWDLZNwQTcqo2CcqgP4ZJDvYkZuEQl0ubefintDn7YTUwra3/6lFHv9CJ0ZLJdvK
VXMQ9PnsbqcbQMKQQsANXpR1hmn2/rcX+OK5mG1v7oeg2JXgSGOTi+WNPz8Iw7Zl/sq4yJoyKgMe
FEvPsQwLeCDoEbTLK7LmUUZjbw+ycISUNU/0Er9rEFA9Ax3635xgddBu4gKR3aeaaOLJpIVa7X+J
zyJtJLWlW54XMpeMnuKrg0IaEKMeR8N0nCeC+DVOO1QeZjycyevjg/SLNP0bauqwacULCc5ccGUD
fLQYcL3fKeppkijfeo5nR3jkU1ab+1exr07Oljs4QnO8kaE6Fk+/5HKDi39yGXY7xyi4IqKkB/FR
fT9Vv+ZPi4HvqdaqQI+AsorFskkff60DGFWxAULsuiVX+rIHqQQZggwT21jus8gCbHYpZpw+Pg/y
Az95NYjgjOlf4N/TfoMw3j3Gvsa6HflUPYDPjek7Pyaf/cRWKEd5Pr5hZIKlMzl5NHUx3sR0ga5x
MyvSnVZGkZfEgC0A8IamHgc3UNup6N6XRk1g2BLYndonKg6oTrALIZ/2fAw1NND8JVYWx6h+HxFN
uD8DlZJEwfKAm2tmWVb3iGj2fNg6OSRHWOjKzCN6Dlk/l7v+n3gEGpkxWWUcHY9PX8HyulNpwJbU
M7+9DK+n4iOM4atss6sdh76ehEkJaM1/4VszkvIRLFWiFefkwUaeHzqBLSP+pewNKm5baAd5Rigv
I37H/tIKvv0BwtnCK5+/GrcP/NGk02r7msbtINSsP16Ig/Ey4dH8Ydhtpab9cQ0YNt1QAiEOQIhq
B7y8ZCc6TUwWYsqRHKa3QgcO79Mz5qcsmMaO5Mco8NBnkNQ4j+pBnrHHsUStaQNC65OncP8rsTFX
+lNuUfSi0nIk54ONAXse3sq3j4xS2dOK7/1w0fBLglNlVDGzU+AIAiAQxPP2ftwr5won6Nn2HeZN
ZLnA6eKVWZGz3GYpRd/wyI5SSZ/+PJh9NK1nBr4O6oua951K0ruaa4ufOkzEbKiEY7vUXwbGLAvk
abRXlIxt4S90miymWfORxegVYSqFqSiXGbGKzNLvYvNdQO0k4o4LgD2T6H5+figPwidihXHFJRCk
UPAUOD3xrMgNTHR/y/eugZG8/lLzKhWNpUkHA+O0O8x0MTLak4kAesYvnZVqA955KoilOROgcGIn
I2tUEQ3xmoF92r2sLyYlSlMwWVHLBj33Ps/Np7ngI2ebgI4+JbAnlPHRm5LB0WH53XyDNgLaNjUf
qBd2FKO856qKqz7uZbmSocWthsJyePdP9tcb2Ps2vDwJgIC2qZ7eGyD4kUCZOIi4QCmPyiXMEcxm
Eqav2r4+pdb6e2J4ZaoQ2Xzeh9akIxxl906YoLwPum+Sblx5vsMqktGPnLeNDnVm7BP2ZB44IYd5
SxWtWXHTuspwrdX2JlITZ9QKIazykfLVh3HjnwmYROh0rxv0qXnNZuX4fEK/wdnEz/uyd8a0WmGO
OZeEmZ/nYGWMIFlpBVAQWANuOyQkktBO1DkKZEZTVFaFaPZXqipdaG2lDCsTauvWBAiU4jMaD03+
VFgUvwgtvCNYuxRyJcShO4MA8kTkNQi/J8Xnuj+eQlAQ/VeUTAJ+5m0gC+xU6k2aAoZ8J/OlBwiK
wT/FkuLADHLRQTYip0flCVrlB/urySFdaArRAGKFZPNFQCWmuMLWu2oP3ERAcxFnl+cQNFjzNza3
lwv7F7v11D1qgdSPwl91A8VnB9piVWZm93UCGdqvx9R9IYOXJ6y94NUZq+byTQOD0dZNCj+ir/Ps
vfNE2y83Y4IN59HSY54aC8Lj5K/MRXJYwvUgmWdbpu0FY9RSPhvD9TF1zkfn99+3E5rm34qhP4Xc
tYzg6VRAPyxaWKOavHj92IuhLxFC7axapIjS2oRfMqp4TG8YIuAJffRH9A38Yrmc5B5C1gRBXMP3
KQMwvTIiviF53mi+UwQPf7jSvzxtsFXxEgEWDoVdVZUUjq2CRMNpjf7uN5qyS86eaSxEErBwPphb
M3jh59q9t4hBIg92EC0GO/NLQbdAPQhrpXxrwMXLPPCd6x+kkAN/a6WxUgLc3Vi4E6jjvoVoFa1H
3UZxy75d87JDQlq1eJrZjpxao2H6FpuHrc0HjkG2cbqtIRHGNRAeBNIqKU8UfGOgGnmp0QKle1Gp
+wQuHBYDDMecuC7O+u8OjnBTWPqouq8cC4TkfpklpEzxYFGGRf2k9aEU6LUEEbu+lZNKx1TnSeDP
UtEeoMkupnZsImkdKDFNDvZdGSPCqjyVOfQjWcNu4W5G+Lhk9Dy0taI/bNCSl6MBAt9aGMizR5Jg
nLV5r1f6yK45uNgHuIJxHJ6EdCkHlxJHbndgMycBaWcBeQMyLvkPqqSsjYWyn03qd2u7dtI36JUO
Dw3jZpHW4XXoYL+HmxQsYMROFk8M2eM9wTo7cwVE2AFZZReC4QDLiuS5daEdspE4Ofh+NNw8ulMq
mi8ZVptmQ7Sk2TcE0qlRLI3miqeR5V3VaHXkwa39uErBQxo6LZuPbS9DJCF3tSaWgOCLOkznSRmM
TjDsLsmEb81+YcTaAp33leQ4RKQuYOlThNdabG4sq4YsutJil24QhQft24zKBwciyE6Smk0kAS8i
akCcRHbSagVg2fixaeRgaXUtjd5yBafnbuwwo94zW9AarMPTFnw6pLNEfhlWXibriMeKPgwuoaCC
JQryXsIhi1pG/ohrDOI+uCDEeZGcF5sBfE0ogPYmc+PZeJHZs2Mmeq6FFzGCWUluyW3DYedY/IgH
0SRGDj3vncD0UcrD6hdJ3UPqHt4edeu/n/JczYUfKYWqN/dKMkLtiupbWsAMfVqEGhkGdxb3EFfw
RoisfhlcPB0a+nYoYPdNl3EThL0QRpzaWm1Sk+iv0aPMGgX7CAoKtB7PWK88SF8KD6emrh3m4PTt
y5pCDjdvr0ceq6LcRPQqS93qLV78JwU/IP3R57rPHz3l0q7s+KrPial4XAabtj0jJsMx/iJAPD3G
EzFw5sLt85Wfz6Iij/wWmCD4W21QvLPv/UKumpe3yOjH7cF6AWNbXnXsDxLsQWPb+CYLR1m0diEn
K7lQRloL2wBxne0DdGYTY2jrRskXUWGvTkkTnq0OmIDamr2fXWqQ4fgs0trZBWEgIIxwe+sJHs/6
31aIwQTf/1Gcb0hzVfbkADWNDVQisn9BzAgk5l9A5W4mXoL5kMWOqwrk3FgPFai3xKmWA8wqi9xD
EWaUhmAvzuH+iB17inrxW4tmdMiSEC7j/MkiqN0tklwpd2wcmD6QzjUZhZB5f/W1oQdxbL1YswyJ
rjsxtdYKQhQ6XQAsMtAcF/vRqlyBnVgT9nZnNjf+mlZnEz5X23k5df4oTq8vwI9Vn3Fn9JjZxOU5
U/R/bRSN/9KMp8A+qGbwkGkBADU4lK0FmEb3pPTLlc2YzCncGJUY5N+RJbgpXzI4SSrPilWehQA0
+vO6Xu/no3tH9pVwn0ms7/vmQB3FizmlcpbyDyRkUP+aCuq8qFTc1EHGN5y6e0c7nMC3uMU/tkV3
KeUBJvCKSBqGH74i0SruFhvGtNObYK0bNqZsjrdfP2JnUUMVgVbWWbviml1ESTw1vR2RXOq11zY2
8aFBut2cI/MjG1eBKuI/joEbNdd+v6yBWJ5EbVJszArzRfaG7aQatnvCRuhws8zVICochza7trcc
upF1GnbDDBSZGHiMIeak7uKkVNdWXFLqRsRZc0BKBYyLn7SuW1GcTJaYXm6WyOpIRbDaqIOPibhO
zN82IebEK1FeGTrnKODf+o1Rpyx19Jdre+q5SRZiimyFJW6BhlpmxJKKUtPYCija7CWWJp8UeZDZ
mbfwDVUm5W8OvRCUjYMTyTRaCXKSZtg3iyEClbBBLbuT7abgaN2ZqXiTx1G26vO42l3qdHmXPE0I
mOKOIHm0sSAUQuEaF4ilwwbQumHOUlbxXxbQrdZBVyo/QhiwEB9/WlCrpDU1XeT2oenh53+8pfx+
XE1XCrwJS9uc6hs7Svx+SR7lcveY3luVqun0VEEHc96K5MNUpWtqb1SJ2bdSuz/VK4c8szgTBBvv
e1rbW/vJYRv1eX/JAgp0DmUdF0HlpFAHBvDcmRbWG/EH7nw2EbKmYrtwcRABHKKJfu5Adxc1SoVu
RHDDeX2BXUFvwhQavw87XPmxnbonN4JS9uu36tPUX3HMDmS9FiF4+/vPifNpOMrF83M4aceuSiD9
2MeVpqO0rPr/TRaQEhugICfJpI5K4uFfhhheiE0HxqVdZoTsDnZAz2USwRaX/zxRS2n+BHmywe7W
Biu6OtNV71MniyRrzeM5xyLJDOODQRf7xSX40okDfuTVgXCeP8kiDSZuYG2xuv+Ok0t3N5+293NC
+gWEoFvO9pIN2R2oP+uvxBZRGA1MUlRy2jLXKNkjRnsfewW+DwUN/Mgcnfua13ylDO8mYUUxFrgE
rukjmMaYKNzgGdC2KgTMeBUWCwNkRS5qQzeG96anMp/vpb5PgYnvBEmJp0xcdzwT7T0aJZE9JK4f
cTzB/wb/2f1Hyvt5RaQpPutcerC+yrbtcOKhPvaXkhr2uqt/L9vs+8NDSqvM+zTpT5E16x5m1U6p
U2l/HTCP3/r57oyJ0CKPUWwdN8WuAFWAQaOLdveqjFAQL67nfn5OWfxgAB7u000EdsX6VSSErglH
Bx3uE9PbeKnDqBtkAgdhDRVnKbXLGtELyRjqY1wBcAjQU4vSrItPOVySabH5W2k67z5nckGLsh+V
onik+UjuDf/AaY1TwiaiRxqCZVhk+HQDlvKJNYhzsooeM4kMEyWy8QcHid8YERYAb+ds5GgTjJfE
ZldmerEgQN9dKYCMFhKvAN3q2EpqHHFqoGkoHT0+k075jF2G8yCKy5nDKFvhwnCbcgDG01Rkne0d
tHfH4iE3DWj0ec2d+0n6P5RE54YKi1b2TpqXvlA3sLm+sq7yimjajzHH3NwsCnJk1nE4PM8v7JhU
rumVlxs7gT/7ueiCgExITcJUFOl0vfsybo0rikjS18kEMzcvKJyfr3Dmrztz9xHNjVsXNP0Q151M
NAJ52mRQl/lLBJHz4GcFdub7bM7AlCgfs3/V+keRqR7X+NcZYBSrYRQQkzMOcKMYpUK9yVP1iaZK
/DdyVVnhIEraI3gm89qTXjMMyzirxZTUL41nAZh1mjOKIcJm17gYSdDnKMeY8e7SFvFbi82sSoUd
tejbVSGgJY5Xi/m/rfW3OORThdtqnk500DzIpAXGpHL76/2VoUDQJZd+lRT9uNvJ0q3IRgbvsydK
HnbbR0hoeya2HBThdJvmmS7Izl88I0Jfe/BvA9ho+n7ekzx0dC6tBPB3aPF7o9h60ONeJR7s6jPE
yjUcZyrpkqbcRPOqXl3/6JuFFA2QY6Jr4Rm3aT8zcJHnnW4Kc2O1tA4ph8QQ2V2b2NiPobF/y7L9
yPcN9c53Awou1LASbU9bybG7/vieNSRUzLain1BO12jgknDjGfz/iRChHzE0+b1Y9Tqjk8AeYDTL
hn+3z4ozvfS28UW1oh8iPENmNuJ3auPVwyd7iVuk+Lst5jPYEDTRBOcEye7kBEUybjYguX0+PEMt
e3sbDcaM8JNQBJTuvebM8zr8oXlPNuH4qOY4F4cN9poj9RTt7NYsN5FBbo2d+R6IwfPkBG4NPY8z
Ksoc0ThhERynlR03PdXmW/Z5eEcnHdfeSSAFC1OXtqRm+DHcZcDFVfudVPnX08iH6kIld5L/Kt0l
34gLMgh23ch8XGkEwuWs6m4IMe+fvhYHk03CUuhVZDy/UibHjjI8Xgb38by4qK3YiV1dUIF86I55
yhdKdYeO4pFsEsv+ZOr3IBcr35/D80E3SGghZheBxy1PUyLonnI91CrNOuMHwcnGVeOFwr56FxRE
6fnYB9+7IrH0byfFs/g6Jh0/XObamX3oXnGy1EStagl+dLw0nkcFPPQ+wqOfuUzZ7y0u+ryi7/Mv
GpvFu23AcXpTm4CboDDNC0CJ/cx1s98ico2YK1YFKO1vX8yNGHR9fhdCCZrh9Pn6zgnbdMgRHUoj
qVzg+DAZD+jSWUsSOSPrMYWFoZ5WJu0WIQCrDaO+dEkw+W4EQBTYGm44szr7drSfXUyXbDuv/W1i
47qJ8TwH9YWOs8Nk7UPtljwO97Oae95mjBWGzLn4SVwSrBEnxxwWuZLDLxLbCmbWVEPy174KNZHp
R8S/mHSyc7PvWDjOjYetXi4b8GjdI0FJdP0Su8KepkPtMfR3K8NAGyDVBMWZZDqWJJ9IAqq8mof3
cK9NW60p28ljapPGHcTWDiWjjLFAKa+baUBlBjqMFi6CjrXLbmNdkFT3vi/2gzfKdspSNGMOuG/k
Uawu732u9g/kZMH4SKsAyyqUTvEDdXnOZ0mEDM9Tanov/5pr6y/nS1dErkSg3P4mcGNveFjAiI8D
wDjuNI3chGR8TXEJSL8Ei84HWRUw2TdZslB+bypmZUOhBhGRwr6BoWlmOgBuvYK1fzB+3fa9S6cK
4BA/RrL8dKOjbyJpj+8hnbq3fCPasv76mdEX5T4lvg7qTEC7LeJtklMF4Qenb8VrITIKNgMKpEJd
RdaB3YPqaapOC2yoCi5c2H7BPmwie4Spkdd8Hm6u2kkbvEgxkAQd0WjjwCizTUNCxl39a9KN0AP/
KSIj2RRZrAQiflHCzeDtcn8CZSfSetr+CoCE+viheBImLOMhfYKEaxtQ5vMHfhtWQsb1r0ma7Lal
pVfqkn4NCfEqjxWPfcPWXr0k3tKpMu4MjVyNARdzsbyDslfwqLrbUvcjoK7pFV8RES9+gZvbKUb3
UGzAMalwNH+QoHyTjZ1y0IPNH3/JonvSr+vC1OiTsa0TYZvxi5sEGGyANKOiLUCwP5tVByrQtLMg
PJBYaAlCmegS5ncUxaNwEFTeZO9YtB4kdPZyAcHyivMGS7j5JpiNiH0BwlNhPg+dN66T8UjiggBE
vEAnfpEhHiNmVjLe18lre7I3Ru1qMEhJjjeHN6BNP4fpHUJhn+F0EEyEb9zM2BiEltzTJdajIVko
xLkFSQeBa4gF6OzquOCQfbhiFxo4fFvvIpBHXk0yg5aRw+cbZb6Qk7crr5YgNJ5D5D1VLtprnFtL
Qr0ZJ6KtbQlZWbYXOFtDUeu46WdTSCASMvnkJyyNMbUlJxePqtzAZOU+QZ9kDe1JhT3LtpZsPB0r
AZA6gvYlvf92JZARYVat0TfvnewSnk60zpr7kMQco18Y2yGrhmUFmvPsFtI7ZwDiQ2boTKYB34T+
SqVupvX5EO5MTDvJHJ0tneSLB1yYTbjNDfKTSaBpqGkRGrZfBywKGjn9H7m+BJlHqBqDRrBGs+2P
5ltocpVG6JSCjbLxORw0q4/j3xZaAS70gq7HUzgAqdzHLx/LtWn93xaZyOWChQO3+GUXiObWC7kB
q1Qws7842QIbOrAl5w6NE9iHhNf1pQl6iSHSonsxAA5i780Zpeo8G8SUZtDNsbfmV5H8QaeYd4bD
eyVlixmdN1cZ2e7XNdgw9m0OLmJgg/lyPN5PWVVc41ASGb/57DZNHdBh4iqOPmupx6PDtd9z5lii
6SDTLXUY47QCHsebnsuE8UixphBK6M9jmF2IE9lqI9LBxBccQPXWXuGNEv5hYGxUmmMpNZP4ikmt
3U+a4eWiagMCrwwpJtbvw6ueWhT6X3prkQQMyhf/F4+Ug9az5WkiuavEDEMxHWHCQjnol/puuRsB
e+ghlOfVgmoMedcLqB0diPA+Y9XyqbeVfwDBb2Ewpd8kv+vTXzXqwEu+jngpiRvvXfaFfDR59PyB
PXKlsqLJ1yo1CuEqHsSA/XSLKhH+sksPYp/Q+typpKfmHSKksZXvHkX2elAr5VhtSLPOzF1us/f0
e/kJhSnhK3ijgU4byuGgsRaO0GahHq1iqj4VeAuwE4W+9I3ICRC1Fr68dRcwBX3WWyfG/VoQ4reB
+53JuWDrN22m5GOh9z3iQ21jc/oIJ/rLBxT8EnMXrEVa78/W3kGQrq8Z3riEdZtLFqHOLlW34964
ruGwj8qzWxSvmT9G87wfOnDM8vsSSYo/R6UHg9Y8o6GpkWisxxcXexi6dSq7DY1pD2v9slVbqCWl
FC+BuKaoHcFjA8gEdpYIudnQUIYFyJrsfkPh+rACguBzvnL/ORQ7UXP3ryAAWpVNzH+kaXdazCDz
ry7xFyBHMYwPB5XShZAzvJzt4+K9wgb8rrpv3B5un5zVHi833E0zH696zNsAzaCabMDQCVq7LdWD
Zksl85thw9drK1j0yT6eIfCCiEeeN6+mdvsYPcr41uPPTOQkmpnDgeKFKmlkQNQ1c6pnxVMhOxdE
dJDGqNL5J7aHSrHsqUCQfJdG6/sz15m4AaOSNSWgf3HxbY81FG4ymPFrhFtnXnu70z49pWa3vG7c
+Y9JM4pfz/Va+cYxA+OYpinLh2jpGzNcsgJmMtfegfJJRmH634Z7Bh7WU8ACTxAIWkzjp7BK5w96
hWNdTZ+uhie5Z8E7l8ukFI2YyBjpv43Rbe2vxVZrl8wI/bpfW6szMSztwspxewzoSmkEBbursz4O
2qknI5SiONYDfUdMQdHKPlslq8lA8mySsshmb9H0jh/NQZVGr+pfdEqnbup6IFZ2O+XiouifrXOi
jkRgq2zhdm5IfyhgXu+4vEXfW5o8OFZjzJ8Os6B7XFYFzrvBb+ozYvp9nv//dKQykHEv2XHbciXh
+EzIs6YzqJ3KQXD2tfrxfKDTEfixz6cX7qQ1I/4thokmKZZQDib41iEiDmOW3vKNKovmVRsyLOW+
ktfJbFxsiyig8Cymqbnq4miUmxjzosso33+cr6cDP1ELmhDDiZOJPV4WUcxgpCCCZaGInHUcoYlm
bvFU1Sk1jBOeFl/u4KaXh8DiivWAH/bHQNJaVuumBrom0k31Nc7kv/hxOq5mXwnbY+QqDq6KkCo8
bLdjb6rBbT1oK144x2r9NFRvl58OB3QBT0GWj1AIYMgn8o7WqxeH1ADEWvVIGxsu2RiNCU4Q1Hys
Z6fnuwo7pGX/J2gv0azltitQWT6+BfeAwanmWQcYE/jSdtB8Ju1S3ZEGKiC4wFvZNEgPDHUqBCSp
Yrgygi3OahV2z6NeRMsZChb4H0rp3a/LKybIqn4a/7/cSuHeH7pgx90wCEY163PNWof8oyofaE2v
q0MZNUvDWs8rmtTkp8e6OaRGp3UVQXzWW+fS8Ni55LgX4xaSw8XU0LHYcL/U5TP6p+AEsw==
`protect end_protected
| apache-2.0 | c2ac1bfb5b9363cf4e1d8e123bb342ac | 0.950199 | 1.826813 | false | false | false | false |
mkotormus/G3_OrchestraConductorDemo | src/ov7670_marker_tracker_use/ov7670_marker_tracker_use.srcs/sources_1/ipshared/xilinx.com/fifo_generator_v12_0/924f3d25/hdl/ramfifo/rd_status_flags_ss.vhd | 5 | 20,269 | `protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2014"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
Y/l51FFDy4EG5im87XNcmL8LAM+J6ck3LmPLutc61WOG0Wgp1Ryu7lTyRxlkRoBBbksz7nXNGPPP
HBwhB1SE0Q==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
HEy63cTkByJaXFv0zDeVS2Z9R70KvKBdmycA2zZ1AaaOxZ6nGO40qyjsPOJAStaMRVY6G96B8/2I
J/EYi0o1w9JlwWcYpSWOjpbFO/CFlP6eBytwcDYmNqcN6G6ZWr0nMtscaIun7OdbgUeaiL8BHbSk
/AeracxMDAeZFhGAEcg=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2014_03", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
DoGiEX4NXkofGvMke3Q6Jk6Rvm9x07kvCJ/RC+a/IFqbl3PuvRjbuDQjPNAcP3CPWi2Nzu063wyv
k/vcgMh3Y7ByyqtW31HwCtJZo+yWLI92ztIYvIUE5aeozSk4F92Q/XJ/VU7p5pGFdUZOql7Lc7Lm
WaqYGTdaKcKDX9Ra0mPVjrBNrs8tnhO9DGjIIP4oOwbGruZKZY9s+Bk/8dg/6yKJ1vr8I/mGzfeg
T7j1uP4v+e2/DoKP2+WS4pIKMo6KQNiN8K785RnpCE/dAPV+66MlcJYsAvKkrntFxuIV0LC8UPtU
V96zQqcwmsCloud2CwSXVrdYgxNo7pd771aMgg==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
pqlvwfBRP807PGy4nOaVSMJT1vbp8CK2NdIJdGDxXDc5FQOHAGJRZxbcg29Dc8SeuEkcnoDgPT/E
pXh3CuVR4EIIsM3Ks5lW3tVzZu8dRB3eTwf2914ULHWZTE2zEvsuWEut+DTL7TtsT7bvB9G2kU3j
Nym13rNlu+leF8R95JQ=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
PFWy+niDgehlrmQa6uqO1pfacyPTbI2/5mwN/NzeU5QZ9F/jMub3NL55cvAGcoZRXB8YTaj4ugSJ
BcCVa67HZHJ1CeSsJzcJT0oZOjYsXsiXNmG0FxylIzbekZdKLTwkN5HVnfs4NAULe9eeAoVpU3yi
jkJuGqSI1Z2eG+mUSvcPODh+gxXll4fRTQbA55REH2MlAJ86YukG9ph+a6qwLImsQZzFQQcvO7df
ErbGiHbkoFaV2MMHLrivQvnj6c3RmFug2dGd8/Mo6669AI6Vl/lAC6A4CiP0pPmrPIeGAu8kfXXn
o3Qta0iAcsmEw/q9hai7GGTP8BVzHiooKScs3A==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 13264)
`protect data_block
rYfpseLxZ2vNkNiBIv1y1fIqeVveLO3HRvQH8qcKoCLVBu7Y86oVpBm39nMiEj/CQosCdjDJXiRj
YhHThJYZ5I9fzE+AaIqMfBwsXgQ6KNbXglXpjRU+Je7jOh3Fx7fM5+bqHnxrGlMvJDagtNwPlVvj
W7NJjRyIzGHFW0ZbH6MzaVGMEdIXl2tHIdOOOzEEKgZn55SDtAdTW9dFgyBnhe2i/fAWxY+w2Xrc
vnyhSjCgkLgyPvP9VDBfGZ0nvLCHOG7X8mFjBp56ycqeAI1KwZKJJmUaiBNwfi0yNlTJfHBuqbkw
1kDjG9AqPf+bMJNJjdR//ON/WyQT61N5ItufPF0xnBQ5psPvv/mLg5KV9GKdAcxJgsT93hqJcB5v
26eHh53+yPDsub+EB1KpoPDnimWGeR28LpM4I5LPnLGvWF/9E+7xcliuyr2XVf0mVJXjSb/TnffJ
KVdAD1LJ4Ec6oOdaa0V2T37jvsbBlFvoy/soEujVbm8sITAbZy3djL23XZpayWscpWlyH6ZYSVi3
OSyeaUp1rhhEcmnpQcY+RpiP4eQ9dKTQpNIdUQKf0YN13tAgMPpybHfxDsCbEBQFgyNmK5zl8JWp
q6IkBQtV5vVu1ec2fm1e8B3cGJ4zqraOKG1ZLmXejUewCYB3ZXIFVgD425AeRRb0uMFNYK8WSUKU
izYWcSxY0KzZjItw4NDfFa7Uqw+hxbDT6ZMbaYgypIHSn5TTiN5a1jUTQsY4/3ZynpcYpKpuIjBS
z4FjN+1zQgkPGLV23tZOh7t7tN1ZTuDJo9925HtCwzLXk+99MxcMu1NLj+ZsabVkU1yNDijr/BaS
uwdVkNkjRYFi3o88+wuFUeL82c41orLd3QgY+9ie7YQoSlD0PXN0y5UrB5Dzs8T6mfaGByAIfCb5
x2JvxXp12b/1F/w7J39Dk6ygXb9WPLcg3FX2PDP9DlslVnEMYFX3tRh2g/dROBNPv+kl+PhGFf28
NPulqIIBBxyJgUfpfM5gvpYloGaURFcQIFcJhmz/Fd4YnfcdgC4F6ftlHj7W5m6yZdQ57nQ7PZbD
YxZcySxdzVvy1RpSoxsL7SqAt1Pq+mL3XgvQG5zrOVk/0Z0vQQ6BCUUDhglzJO+6adh7Z/H9aMT1
WaVcW1okXsFLfC+ch4kwjAAUJShoCPOK89Bb1dcZWi/r+7SdlXKaXux6zffhv2NQJ2z3B/OfyLON
tuHz/6x9S7V/EQc0WRTnuIaFuB81u+aCG+pvExvkv9wdpJpfjCiJGsRABd5dJkMtDhsaviX7EDhj
KZMtr3dYoN3FlBoS0PwJ4JCsf0MioT1BgH5+879S5QC7bmBR0V+n6E6aehqwClRxGaSaT2gUVyyF
xVWkwdI+wi+yWnFFZwUkHgylA0gyJpoVfnKTtghMq0+cY76wVXl7Aqvcg/K2xKZSd+sbRR9ZFBh0
18WZUwNS4uajxIwjbqLg31+einCVjr9xMVXnXt4p/nuveDZS5QkAh8z43MSl1HHrbpGA9y5cn636
LVuHvUqVaIBHbRRFX+iWrTvGz3N1KWxL2rG2bY8aojMWaWnUKo9fumXocTKKgg5YajnFZIhfiRIb
GBvkuCj45zCGldh4CzQQgPYE3Uqz6kz6jOVUX7ezAzeZu7cN1pUPkGXXoXkAgg/COu3kHoGe7YZd
a16j136+R0vgusZPpLj8V/KKeQEECjgP8gIda7UXQmFrHu4NI3Iqq2XhBzhPRz4z3OuWeExeVUGo
rj/yxBxUGVNFLJBAAMSFDI+7vdLLNzSs0Vmv33QgwZ/rQdMW7kizGNJtRTrZZDxPU1dNbn3zdmgH
X6NwA4IXD6LBZPSPfVeozFzfjOXdDHAyjZMwBkXkzZInk0woeoacfhgTg7/jzIVQstJS7RMmWXaH
TojfWREqhacEHRJjQ/50m01avFypYSAqfFv7c3tg3X3O8daS+FHc3FdmM6TSy3KivSZx2+Xd7Uar
2j8MeckPAd0IuwgmnugOlTtke8Wtw3V6MUi+rkXncBQWpt6ZRPRBg2rkpL6qbaPiFgNYdS/FCIUj
CZLq2KC7iOMd7njPuyXX8Ep4jy7TIEu4lPex036NIwXruKY4P3jIoBXwX7HKpG9tXPNEd1Fabqc8
lo/6aJ1u3Hn/2iksm1T3s+eeMvc1LX0KpuGbXAlGTuygWhvZHD3rOtlSexLCiS+u8JDsPuc6+NEI
keUe//+JWfMVZ7vq7mNc4O1T4AYGI4wooX2Hk64SiibE1J2rtvfpqtGtEwXAcq1TrePbZDCkM5es
Uq9Ks9gHpWGFXvA5POAo/m6xdn+xzrCvmKfACiUio61PEkQ390wbE+DJFX9P+9eGo8T75+1n2DwZ
d1GCx/qB+N+C6fZMqfT4ggdnBQiwHwwtgT5tQphLF+L3AAwsdxY4DfyJmM+kWDpNh8364w+2NPKz
iTdfOuySHWL7umHccnBY5DbGcawR2+WL5GHpHL/R4PraXO5U1zCAkCjIhjqCfvj+i/C2xakSPGBz
mzWoJpCAswNgaMtw2ws1xOTrhJ7RBseHSPHH82r73WIiR+vEFl/JmyBhbo4NcCvzMLok8VoLkyp2
s500ILt6gFISIF3h8gjneBOKMACXYQcsmXcObkiQkZZqNYs9O9VBJ/iH+IfxiTUSPsu5z4ro2E3Y
FkgXbMG3xfWk6xve0ejTpD7I0g05RLyN9QwBLN/NTd3Y3CCkMlOfb6FjBip2gpl7AGnjl55yP3It
WSgsXtUa2Mq3y7XV1wxp+mUHH4/ngjbSAzBuPOrPkFopeRXnb3QVPeKibFkW/XqhJwXXo5c+SZEA
Ont5BJcjOMhLMraQgdy2548hxgL01nIYjrEuWX7WS7beCtABW2oJCCNlW0BwacHbAnQONyJi3y1F
WoDDYKCPePIKSztzPJG82+g+pY2Ljr5XzLnEuwite4k9Z0rsSinFR1QE+WIMbt4E9kMARm/pRJRh
0GF8UzkaIT6WqQlXwEx+2B4OlXBbdAG/JEWtANfHMOztEwJ1Wecl0OsA1U2iijHQyoUzoQgAshsT
DrWzAuCNqrKRcCrNIYPThH9pbF2it9fJvQ/Oa6nXcG1TecuF2L1fMsxAcSKR5R5CXQavaoRdmSl1
HWfv3+TBV8GpFK6WQkNzFG0+OGKj3AGw2UmtkvjeJtiixDdOaOKM2whC2B3q0ZK9Wx8gGqhO6Xdv
edvvGQsm5RIcHTcU664tLulC8ka30mKe/0AQyoE9co4lhjNxEZGklouwb7X+RamqEgMoNNZeaTZD
hiD6UELV+9IRHkZ+d3G7yCFRNmDJyi3T2MYm/XZbPf3WcJbOgu1Olen4UF0TXY4wSeGnQ3knGGYe
csyGMnFo9hnnYe/2IXE+yppOFc19ZA58UyBe/sF3K6YK1UxTqQhPumKoepORK66kufzL4znbpW6/
I4US/twlsFZEXV9UQnAUOvP7BaDm5oNbBNJgCYJM4sZ9aXLsGUIKLUj4S5iY03BbW8npuorC2nfC
lKbPMvIw8PucekI6B2WrmY1KOU6RBcR10mGx24m2DJESVePgJhwI/nT8oLXWlbfljy51IXB2n/w/
RzDgw7BpJdvPdw5zWLBdjvuXRbsDloFDMKM0cAgYSMmou4QRP47RKGTNkTTiRpK3aAIhXl1ur25e
pIehELdIvlBGf3QruXeWcH7bdvmg72l3Y3KCuRrR4QxuC7FFWAsYYFWCR9X2Mj5pgRGxUde28PHb
hkbwb1nL0vyH/ainUQGRNLPcGw4jif8D2ytutVzjcqnHetZcjSfgN0HtIS9M/k77IX79mCNkdzax
fwTBGyZziHN2XwhEusV7gfWMNZakFfZy4uGLCJ95uJS1pIOzJMZtRJiiSEDvHHLR2KzNI5i50sTB
uk3wXU9xx8Vc8s0wi5OZzZ3LNcD67hA3Hv4Pn9Yq+cTGsjItWcBxCCmbVW2SDsz82FJZEYNmVkfR
Rnw/KlO/eoAONteq0Ro+hB9HbFax+cOKmssGc+bqfs3vAsRclvwQNfEEzvidV95WaozZ11IZH/ae
bJH72KclzzgGnJWnnSB+VdGoNEyV1rl0uJHf8YnAAH6DFITVyFO3AXwN3AcNCni12B+Y2n4x3cwV
/ScHqx4owOCBe0JIet8Xy9fymDQYcVpQCtjeU/0tKHS6u7zl9qLTW3qA3scjdsgn/hiI6Qem33zE
K8UKnMQ3mHcfXJV1n+x87bSrRwIRlouPPqdp+rPgMTxe7JuUH+JXdyApferLeyv88jvVmurQCNKI
Frty2dIegvNhjVKYT2h4xFRJSDFJ56GZLJpwEG1L/YX3+DeDJlFIn2WeJ80KF0yqVsxik4kQw7wP
ZR8RswZhLLmj0NYKnGtSHSnSYedqvHKhWmayPjal5S0ZU3ONx7h9LmjAU06vl9AQ1+9OiwfupzM8
Igl2mO0NIBlhwJ0eKi9Ztx0tpoCP5ZfZn9iffDmmT8YMVZKmKD1LcR4toPPxHiixOR7VQFf/krFK
kweoloYxSoKKvVKTDoVXKsuM0C89ys7QLIuFxhQBKYNQ6i4htHmiIUtTUSqD0FYdLmB2QxZSdhJg
DM4ssRQ/H0pxf2wtJTfOojDMuqjigd0zmdj4MxFzwPmnkYTtIwcBYpJxZwr1Ljkf56dj+k7YmhPw
PwxRcAwl6mfU9zWUuaZeKAI2aBhNA6hf5j6ygNsFSP3Wc+rZa8dCYh8bjiIb/TxC8nYIjrQghBkJ
0gdsJ+kGSOT5Sw0AZm/UHvnQYjJxAnP6f9cnPay+6glJuHGoauf8eQVR243apEpjaKNoK4d0vKC8
NzFWiAw0ilduS5ihc8qSYn0RMzIgR2NtZqT3M5BfsoDarrI30u1xo8rxp6CJBHKBBioja60i7IoQ
gqFEgxvD9C4XQXlVl7Qtvs30bRTRmw0FxUGNlmjMfSxwSBy0rbswfWZsopyuHEchYm8FMY8obofF
j2OwM/oBrSjByGUZwJDoetj8j5bJhRtyTLIiyxJ8a76qyVtZMnWIL6Q6LZjXAGy0QPQV8CG5nUuB
XX2f4eWUO0ZnZgWKk53o4Sjwmq25cmX3wBcBkK6roqpSySdcmDFCz58ts5raiboFUIGTz7uczyo6
ZsxKjvI+j+/7dHHbHGIs064jZrHYcFaEse+JsF2q2a4T0bi+xZWtOgQByOfYF1env1bR4G9Rz9u9
euL1IvusGuXeDHl3H008NQ2g89ahTC1akAgZGYc8yfGkgtQ1W2MbDEpSqDxXiMOKSanoZ4dFM6wY
E0t7eVCG8DtZcd2Yn7HXYp/ZjapGJASiFDz0yYgqM6VGQRWtx0Drzo2K1Ep/RQ6ftV9+oJm8VBct
wouGdA78cLEe5dXnLzmFSj9INEfPGif6khT2yiaz6m26sc2l4qV7VPQ8dY7MMROwDHbazaGEue/G
4kZ6/sMGm3MzQQCebRLVBxm95zPptO5rpBbOLbjTvj1eenMvUNOKlmNFFuVdtMW9GlEx5p5gBk+7
qFhXb+5L7TiQjbXszNyiOK9oiembaiRxPkM/btJiS/sWa89mGQthVYgKigwetjRMaH+Rfh4RHBhD
cIEHhq/1LlOqZ0hGPmbdFC7XrPw3tZJ/hgi3O9u535/ee4YbiSDzVvrEE9SUGyBk6U0GXkISz6m0
d+yhlFPkFVkSg0Gi2oznmhI6vKYlCl75M/OP6dfKpYxdWx/znxPxOs4f+36f9asHF+QqnQBhLhVs
4TcDssQgrRG/IekuOMsidP5F9yBu5nPAvnMYoaccVakDBxV9hyym+h6800qLMWyn2k8dyZCxRoI4
PGZ0dwMVE1SPRZpc97OqJ9M9TrDU390ATMZKUS4SI6ruz4TzjQZzCgnKidLmtG66vrQBwdJGFMxM
lO8QenG3ptbf8Y55v6n8qaJYLGPwf0tD+f4QUlzs6cb8yeMVpRKACuip3frXPFW71Uw0UgBBTo1S
kbxIg21xB1h0dAGQwVWQbe79ef9JShP8ftpXjlAlRKBPBPJUTFA/GRNc288VEdXZ5FVFSXklXMyr
fd+N6cFe4iDmAxZXB+idTclO+bXD0Vc5LEzS/5Q12qSd7jENcbGhr7Tq9BMQTkcNuoQREv7Wxv5q
KDzFmdxzIMOfmR3WsjqqBWGXiiE5dc/i0YQCI3ro6T3QNht1HnhO85qYehGkd8gLrJ0cVn2wTiG/
RlNzYZj25vvVQ6LrutnErZuEvkpt8uJvsvejacnRSbvhLWCmxlUGK7/S12YFM0ZJTnj/QRAXBZjk
owVe8I7OlaJQCSqCw6XOQKi7aFY031JdHe8Vhc9XWeKntLT94iIWmtQTVaK00ZdGZXOsoJztFFUQ
nGKifxzjown3YNa3DQmeLMlkErYs/DR/NNLdU9ZVSB/KeSJfBvTnGnrvTJ5geHvJy2mwJxZ5pfSj
B4efJYJwS/Qc7K/4Jfm5O4K8f2wvbuagl60ZkouzMtTkW/u5Ia5uFYcSwnZFgev7dzUPk9oTjxDK
mbR6ba9rKnkKT8oHMFhWEM0MosEdX1m7ieoWJIuI1h7Ggm2Ps+tR9wB+nAjHqsyDrez0AKkc5bnc
hjFxBmg2xKG3zleQiwqp6GdvofLhmu7jIZSF87LzF8in+/w2bMaoMBMThum9Lna/DrYQWjg/gCy1
z7KjiELOPNTlBm8M6a05OC0IvjjnaJF5XXGjLyrDWkM/Iw+yTWzbdHoNZrynWeChB07lf+6s8nkx
YCHtb6bHTnNXOS6YVx+5cT5qyekjZ6WEyQozFp6DcE9CMZbilT5UPmi6iTzeBpaRpJIzocFlh9Kb
vydfTAKe1ur7r7S2swYC+NmMzob4/xOQzSzz2Nu6KZxNJWUunzOOQx5cfssBZQsIRma5CuXdov21
xMC4CV0/A2pknXNcyRGr9D9Lm9h5Tj71uu4Dw0y+biQBSEfzrzVIiImnaJfSPCQKxjMcbfaCcMD5
riO2b+s4K/nEnqgcJvbrO7x4/cX6C5M482vZKCCuq0ortGxaKuWQpHJQIjJsml7WuhV9jo1+cxll
NeGtGDjRw4/5oqXhiwLSoZ8XOZhFhjYnsoidzWYqVC6oAHK4WeFX/8g1r3HFSwhh/zPxYSCXO91K
3eGPw0ezm8uvrG7DxPEZ2lRpEmEPnBhrZZdtIPVLS5O9yuUR84NxWwY2Y09307H30S+ML5T1Q8C5
vH995NB0xf7j1Y5bmiy7itpxPDSciaTGIVIv15AZtptttRmCwJkT/BJqHR832rFdQW/1GrtwnXyc
sTPdUy5Vc5koysKh81oSKRYzyBXG3xAZJ6KL7vOmQIko5+/upRIoTC36C9/Dx3JcI20tI/X3XFsp
wAKAx4Cnx7FQk87LPP9ijz+y4hp6IvETd3dgLcPdEN6/BHX+Mm8eSGB70LUdTGqJ9D2mfUTM0a2n
jZZ3QU7SCh+0RXPX841xUH8LxKW6RXQTa6LelG2OohLWTn2HwAnYX0qqfno5h3ZnOcnHe/sPb1UZ
hsB6cnckGKUSTy9WP/VHc82U3CwOlhwEel535rVWu1Wx6tazdOYFT7UF8tRCTPQ7zllzk8Js7DId
AVBrDd8GCWbB76n4a1i0g2gdJA3nywCHm7qEF07kOy4OISfIfO0qLAKBRAL8gAERzgqn0wywQKsd
R/x0AJBo1CDv1cAs2QvKQq0fO0BqxGwUfJVr4WFB8pmmh82M2sOPH7Kdne+rldT7zIiIIH2OZMuV
v0Tviasid0etL1xGhgCAHPiOxry7W+kI00+oInd9q5Ib1rsdlFtrFE/e71P93jdHHrfrMpOK5BUI
zgDqZDzeMsOUgdVijSLY9bgwggnsZvOXo5f9+557IhMsdnMcm8ULYEUyGI0M2owMbYAowjDaHGPe
69pDL0AiWnoUmn0mmiaj5kmqLbg8KAoyW3ps2UbQ0mZ4zo7GvK3WEZp/O3+o0jsqEsfuRmr4arxs
fzyUAALJfVCvKwFgpnUMr1Eox7jPHvKiO9+UlrQClODJMOFyLpcqzOxiYK7vA1pwAuTCCyyUEg3e
hg57zhRvkDAYlkIGdtWhkWhqVmipWl8GqTPm9ykTqIelCDjHTdXvT9tyLrKOT9UxX/M3QoPj5uyA
DRqnT8ylNpBUX4Hxr8TguzlUSerXzWXHh28E6zhuOEkiP9QCfybF3PPlmOpYAT4yCAYdd+4Rh5Ea
2GIND/OqtZeIPOb1YmcM7o8mMBMu7v4h3oN3Ulh5l3s0uq3SgiX0izZ6Ej1DMECxn4Te8t/FHgY6
Gpm+xRjEQTrhSAOqWnGxp4OK1kaH5gyEU5ynxVaMZ/EHES0kUXxsmZQVkYJ5LG9nnPnAEF56T4/J
lLKT+D5+XYCb1CU8JSiJ0euQeiBMVFX9VpFZHsl2UYGEoCxnkUHDQ8YRpwb28KzW+xuSPiR9MK3r
65t8qaMtLrls5NnABFBW24eJuhqIa3YOVZQjDJfsAFh4mMDhcGlfeh1egRXpYSS+neCphXLcMxR+
cQHgdMfZaO5ATqcPxp2/WmALmf9mX6wEeunsb4v5E1idYtRQnRV1kdaeEWJMmTBxJK27ZG+RIIb5
wKzbYRQjOXFz9nP5fxBwebV8DFLRAHfiELrR4W1+RCEAvouZ6nXWsjIA/1juyGFUPP8nmd191qFw
u4/zThaM2Qg6BEzMToH9cR3FBZkBox3qLvOLOEa0cY70wJh9gEPtMsmZUmDSTw5YRFu3Y6mqVziU
ZMQx7RrLg0mEjz91P7v1xKw6ZoXf7CLfV50HF6TnMkeOXHuBhBBTL4waeYGPJMzyk4Heb4broXYv
oMUwfUbAQltEwwaRLfSLbplfTGiOyiVJr+W88niDKyFbnxb4THwhMJebaVQBmgoaL+cVPnBUk54y
SZMW4RemsK/sVJnh03Q8bwg8bAjTRArnJ0+GDdRYEQJu62XD+S6PGgVSnltbcXwXdkgF+BSPM35N
CzorS9rT4rcdJ1bF7fvAgH6QnoHIYR2/pazqk4LGBIQZ48chSYLN++2EBBL3bNA00OIiEIEK/MNK
77w1rIRldr0e0RGY6K8q/BOR9hc+aNFPjDYk5quDtXTJqH7pznhtn69QSLhW+gt/OgHhijxKmdfZ
84KLv798cCByo4RttnBNiSBfApuHgAKPL2D3Qov1Lb0gtOES79mXWO+ZVYsAK64VSX+IiClZbU4E
r0kNjYdhgHWUhA2qTQ5hq9upCaMf2ECMNezBZ6fiCxKG885ZXSWcJW/h3HQDKetlr2OmdSwo1epH
pNQnmhWdvy0J0cOABi7W7tWiAXbDUBgQYi67Q/5rrr/yZK+WjHumlWOjCgOCkJsAaG5czkaMmK1a
mqBlxNZwAwNCDoqvngQ88qqH4I1a/VJZpBw4CygM++fiuKKv9BHI5GTOKsaUhmMQjWQJQyVb4bu+
sSK53E5z3MXjTdvArgsXsi5CqAjqX2v7yHmHp2jSQ7QiobmP+iZkRqZWXt6vm8u/FJEX64c04gr1
1IZblgdGTG218Qqz9KrFpm9zPfDqS2AUF1jdaCy6l5u99n4EBjAi0+9vMEaCqeXSp/DONj71gA3O
tvROTsscwqYigpKnIWLQgt0OWMf/PgLIL9q0OmBtbD0cbmS8VzBl2pUm4ME4OGdKyDeHW7DCR7v3
UQ6/gULZssKhurNV/5T6bd9u922jeZTJnDxS67wuZBZPImxg1Y3lm6BsU+Nbx99xey6Jj6TWATl0
bpCeHQ/mkbDyeBsHhENeAppcVtOSgAYcN8OyXLhZAr3ClNdHgzylHWZiFklUjF3gaGDUqfNk3Zl5
PBShuRKWu+gxukDdBolR8/nfxLMisVkbDyOstKjkzdIOfKusBZ98dghULC0Xp9/Dy26Z97PJW5p0
jhbo2S+8BZU3Jwesl/wTY3tztkjojfdRVC/8b+Dr1ui57uOVfYmPs/w47u3RluRTr7avg0POTPjv
61ZBYOry5xLtHaTeI8OXixqYBvsAovzBp3/O66ECyJP2V3F1s7fP3eNf+YJ6CmF6iVAhM3Lm/+2d
zHo6Mf6gU1nXPKsNPR8bBCjJqMs1AcAtVYiBSc990flYM2KDmqwgfx8z7rOybgat9sdy9YkH9qhB
VA8rbHHU4nrjjnus9nGMjoOqaQR1IUsZGOl1Q1ODLH1vjqgDIxRg9y6rNgrnUiwpvqOY0Vt0UfrD
0PaVc/gwDxnawIZY51KgS3UzCvqiJpueiH/7D51w0JNdRULDsBo1X2qxrHhUDcvWA+iJMieYBRXC
2M0UFacER8N6FOyxiWNTl30YRMpuY2t0iOls0e1KuNKvdlTlThmC7LyetEQctpj3ZaKl+eOoXAC/
cgr1cPyWKMyy7ywrbHJH1iBWO0PtKv10VdqRfRlK+3cdpgnjoKx712u8KcmkPhvGm/zKqsS5U/ks
HwapiuakpFzvf63NedlawArDgtql8R0bihZYqjRbqf4eveyQIL8cJhfW1Lfel5zcLx0L0dIQI7Gt
hZFfoJmQSA3RTK2IyE6NuDNjxtp9hu/CxREM5GO2Vz8Xm6fydMMwpdezZgWTrhkF+YOvpx1a4Zpy
GmwmdT6LRhle0bBBmPunN23EBM+M2DCFQ1oxqB6n6lh+36gNysPLz3TC8YHxv04Bta4FA/DFUV4G
fmDKa6v4488t91dXaPDRKJu3kRAmM9oZf0abPBMJ6GpqRPa8feRH9YD9penB2esmeotX2awoz/VZ
5nLq2QV14489fzhGecBYOQiqYkm0Ve3vQ3PXJ/TVhTe+T+9ii6+240sKgS3Wm8jD5cKbkObLiGqB
PINW0czgGJl+EYwAdGkeeAKhNJXIw5y9+GA03TP2M1fdrIq593fi5hkjQJpWadIV5k/4hOw1FQXd
I1Y96xl23R2kW6+XWQ4ElaZQi6oy3UeXEekCIX2Yrznxw7A3CThUMg+96LA1hLATJ6NUgoi6/jPi
S7cZp8oqDKM9C+mcOIMyVO7zauksHaCAUkALIniZ3UlShaVbVRgqQT8OBzn6LnH5YALsGOg/znWj
gAtSZC/6AEg1ZFyQXjGYZUCTvDWaHo2MS5bpKP5luR65FxJ5G9t3eCMCNCYE0hUPSTEnKgPsnyp4
9N4GW7ArKZIc9fv9gNPlcuOcbXs1xN3Zo2t9u0+P0GKyVqnMQgWUQWKWg4+t3kWBZJNOmi9y3diu
hJS2x4ZA15T8r97rbF4LkazJEIWchW0FggY6TKUqoTlUDRh22zff5Z3/FC3pL26TPLV06aTd6oAM
q1TkUmt7MC75RKv7M8z3kV08SxcKeeYc409VZGed1n41PQcMWQIGufaz58Vg7r6kPcm5hCN1aVmI
UskRw21HdEtvNvGgbIiv7ouz6mFwyQtiw4QnFx7U96BCLs2IkHza9aYj9JhrCarlhz2uL1PkdHcW
AAD43VqCYrSnuzCpw8zdg7K9fQuu714zuYxvaKQ0qpVzcFquVh6gKH2QqZfleQdfTshivWugB60i
yBoKdzIkkvoKJ/Z3tdOgo1ZVNANGVhZop8Atiea74JgVPAdA669caXhVaycfEMXjhKrwnXqp5mg9
/KLaF/d8iCmjXw/u4QpBAKrMnv5BDLMPao6KNR3t0KPNpy62PDUkl51wi5ch9g8ezuaxJmJIjEPy
K55Yd6sjsCt8gdThsHaaTGeKWXl1xGcwt7M5HCsNuHxwJ0OoxIoNQ5RM4SrkZRsb8lgZlEyfSVuT
TaulQFTZGIkVBITkSWogP8gSXCdLWCK1HxFDOa17HVZLkFAI7qUgzSkKLjGOMlMj1qzfzjjZLp0G
pInG9rdb4t0XPoOA1aNy/CLJaKdEcPI9BUvkpp7DWaxKIz0Dn2ExTO9ICTuScbXtEEkBAWvdUd1q
FQ0GveNXbwRP8g1aoQy1+fPMVO2dXWttrkv5edoamAxUqjEPaZ+9eI/Us1jfaGx8oAXukqDBhIif
LjBGXcMiQB75zyl9H0DMUpxsA7UqtKZe2alOxEV/DSlYsfkZhFXRl4IQpvAm1g7ExnTWlB+Eicyr
itcrrx7JVJ9uKvg7izaXQmp8YJuai7E22vQYXbF1FgKpGkXGnFrFrdil/nQjU2fvKzUaTm+nOA8W
g56WxTOv/Z8wsT66veJTiKOqS3+HuezcH1JE/CpJqofcOxrvhkIygi0CTX4NOnTGLg5RKBJ2V4J0
1G/C4Zxd1+5idH/sFVE2jhqKcyI2/yNmeb8EH5lJE8jcwCm3gXui0FZuqXZ2hcvHYSWYLAy83fVP
OZWCn/Q2qqnv8b04iymorp73ZBNIY14+nVx8y4RSzxwql9hrFCk5XhjVC9/s+3vGIVzULI8nZ4l6
ihruBE1Doan8pQ2+Qc6xzT1A6+Xq9AYByyJBM1zAkOVgPTLAojDNjvIrOd3+HW80hMVXaRWk349r
FQTpvcY+KD+NaoElFGKm0Rd/36yxL2NxE42OARLCucGG5BERjUUNABdyh99ta1hhAlImtF7FXIUy
Nwa/fNmhzseaUZ4Xuw3tQvuv6EJdyXyIhpu0dJZFm3trtXhgc3Q+xrht62Jm/IApIPnNYGjYS87o
1/ocXAoiNwZJAKryPhqLzqzqzjnaj1v+n4krsYkDl7k7Qqf8O012BuKv7IVzAfTPKFTiY71RpZeP
yZ/cwma/vDiROr8sj2upx7v1Rr4wwBhby2DEn2KcQ7/cf+7wPtY0KQ6XntWCQyPL+TJqYbHfGxux
NhlyRzY2I673Wv4vBQzrdx9bN38KEKseWPmgDMW8VMZZq4ofeyAUKW7KNavJlRVTkSdjIqArItMr
iMUw7P+ciI5SOuwvG/qyJ4Z392UZOCIrh38kQ9f3F6tLLbbv9gb3l1D2dbbf3wXghzc6268Hid0R
fs5ouqBqc3/850DtvfQdj6hku7VSoOISbUvH2WkuNPG5G7/ZiTEYlhL06XeyCt9CJZmXJ67KML4D
VYodhkwlDpXXI6cWL94WgapRWuqfDgl1NciSM6LVxh28bscKfb1fZv78oGEBfpC6PBHibnjHt/Dy
4FBfE0sfe5bJJkgngNR6+h9DCNWxFlmMgxFNx39hXEX+rqDL6yqsh4o3p4QpdTKMw+d5VAT4Sc24
WWKnSrMYCVhuxyFlU6VhjOplLZlmHbNsSCLPIvX5GYqtYr3DXxEkD0oxeu674olkFTqhAQzgEk0I
YS/YRG5Id3Y5NaxqQWyWvW81t5MABG73hOlY8HXzjtb6fhMpPW2w8Lpb/raAhbpQTsrY6qWcWsHc
8a/y6xgroVumh2mtwJoW844dvw5D+DN1KNiv6ICRh+eFqSaotcCtNiIAeoKc/AV80a+/LMZG+7Ff
nLh3RopFcI5YnL64kPEsZwkDpKOYAaPYBeq2ScMJQH+YNlzrQkV7W7eyKe75dHfFVVa+dCSSVlqE
cGFK0PhcUQ2vXRaX7CTQ1lMXjXsQElppB1GqtUTx/8fP0PMYP2ZT4rwLNctsiH07owbRWMXLyL5I
6g+FEwtOogCnpVAgWJgxMsoHBnGTFKL+dtKa/4YLReSgrjF1azxDV7b7wChBCanDJUcfkLqJQmK6
iA9hHK/rvmTCV4q3WT8sEXwLGX9CaX7w6R/XXtAmKPMdpSl39UugWEwKrnK8mCnftpa3jyzOMdHU
tp/LRqAQoa2LKCwo4CJY22liejhf56lj9SBGCo0PpjzREuRyLMyzg1Ezz9l21aeyISV2sZYsmGLw
efmo4Ph9gp3a8rtz2NOU80iLaxxreYHRwRFZa2cV0sKegCXGzA4JIUJ3vOexpHjsm6mfgIFvXoT9
3aNK4vE5IYAmpZmrsKDbgyFs2/re8PYo/4WdVBNgpv8g6v17Qr9G1Fk1u6HiuSV3+PS22eC9psMr
b7XAUg61dJYbe7brKswRYJB6ef3+4x0CpxwCnyLX027MptdKjlJilbceKb2qYEPbpnOa+6Ssx98I
NG5bUErV6XoMr3YnecCcbTj8P5HW3SyCDyXdRoEoBCdb0QbdPifXbnFPxC/5qV/aCSN0UsLPunST
Bc2/Oj2cU3T+4J8K1NTv8BpOI/ceo8RrKCr4CCjPJp6hSup8O9OTKmu9XdpnvaLvqNeOLHVmycbj
i6o7Lg5LSNFu65dlE61bOkSsUS3WFEo8ZspyNnnqvT1XB9u7e9M1MpkKVBXSDN6eapbG8OqRViqY
e3dG52pku4duMTBtf+7L0MqMFEeyBU/JbB84sk9UNNbcmmGpSk5ZW5aamI20vOlGVD7OeRCvXqBv
KLgd1VxKua6CaRirq5FZXfh7+vDvV0cO0ZX9pQSgH0VOSqbnkWd/9Oh0LwVagABfphpCkC3Dpbxg
mW2pX1XxNgrizJPqcr9G9SPAvm+MElnXRQcXFwtUldf4DPulpmSe8NBEnTjBw6jqhtjjeOgs+reT
xJxtChmQhLk0cjQ8rn8wV0CGPF5AyxRqddooKNBAf3R7ixqvqiYxMLcxawGDlQpTPFGb74VoC4a2
ukCoARAII9WAadjq/kb7zNVGYUqiJOIXC8qAExl3oZLOZG1SwClUh4NpAXiVWb8TdSokGedtfgHs
uUdwpd2u/xLK/xnYKLn4+iyis/n76+zQrBgxwYK0uGVPmIySAop4oYAPV40p7/ewrCi2sYm2O8uE
4O047dluVwNnaqlbZBSjt/yCEGdMs/l9DC4NAKU7pccCcS7GdFYljCxlGZTovSwQBKYqX9EBozt0
GbeI1v5lbZBBFTzdQY2dSH6h4PRrHVzAEeeAI88Qyc627Vz8gFpLZnBYR/iO2S5sH7cHu7KegJjy
aQX3o0RpevxbxLALcdYVXYvc02yW3MkB5LfgwkaqhWLFxMlSiqnheU8o5qru4GWzEXXzPzzXGPjy
Wa9eiktF6h0FCdXXSxeSjcAufQyt/VG9gYf9EjDb1+KmuQcZQ4fOeIJ+AlkgdPZG3yHZ6kM+Kf7x
DRbATlefNkndnC7RwgvnW5DAC+qb3pn4yVFnrDPOGT1+q0FPK2xkeoSWfBcnF/gDTQZYpy1Vwfr/
GmeJuLt5EBBuHdgO7UXE5rJPe7PiUJC+0xto4YrWv0eDG47J5O1hP70k5TLwAyuOPxWu+zJVX28i
8HTWxQeUfvJvY4vdb2uoKHh1WUozJTlubeZtPkcNNiSmwpGmIPEzd+sPyCeB05O2WacHv+eISCvj
iV94Nga3RYMOe2TAgfb13gRSFiOcYgpIa1lmzYOVkYHhyXi2gjTK34oIKv3dezrRJB9DBBTMcLM1
8OOLQGoc0FaI/YClzRHpGmtWEfogaBl+oblkQn5ujWgfGRZ64DC9QSAmQ8WS6X2bMCGJ0elvsGU+
XdKeyFUhtQmKC1B+4DwhCwBTPz/ES0RZtITnNTldOjr9GG1B65y5K86F0ocRtEQS5EL1FXPrvCzh
uIhRqzPv541msc3arFgmv9cHgTW1JG/73apatGoQ1Ihcbt0kKzdMXlnqXr5+MylfltjcN1yqubXc
FK1yo2Fh11BPnZGVaO1lR3yFcY8xIIlwljMRmIcJuNya+LziAA71KJ2HN3WpvV5NUr5eZ54b2HRm
9xAWiQsenr48g9EB196F4OYrMtmTcTTkodeXAe8flNqdslVEK1uQp07JSk6ImzWT97byXxigCXAR
q7ratHTbmB+f5N6SLz6T624Ub16Mcq668r1AqSI5D4C+wgL/2kQ3Qys5v6660JEtN8a/GqoK9glX
UDFAZCQJW0Z075UCH3NXpCqYeyhWcA4EcamZIdmh2UllTzn2rEmw3xrgIH8R46iGe/kPWKFbT6pX
jQl3NpJ0pExg51sFuUO9S+lADXnB51DSljqwT6uTmJoHbuadCfXVM9Ot7Oacrdt+XpSwEZmYjACK
kD3Vr160R49RmVyiOGtmU4Ejr3LY4A5SFfwGcflVRDA82NXKxbO7nxTiznaro769fr7zPpwrPzg/
iae8YNDeqdWc8jSEMF48P5tpNwNa1hD3yxZYLtw6ibuXQg/QLvd0frxzpsXmh9vzVYeThBo1Y209
Y8AXCw23iziE0RS/7EDX8TwQBc0Kr5cWEGYH0D6AL9bxety2Yha8A29J/JH8k8PXRtPzN3GxN01l
pzBooc5pjwkcBzERIyEm3VmA/RT1YQ9I5sCZ7qf1eERrfjWkVAgRSvhZU1jrWyvjnein3kbv02ef
L/zqzgQ6+nQKKmzg2DCXNhppZVSRyJY7hnw6aiKpzLPNSKp89EVuis5Mw0mgPXAsIFDxnlds7/Z0
AOTU25z3yAQVSvqN/bgIT9GG8XfoFqIp94sNVACnmqpffDRtcYeaP/MTmMxltN4qPvr4YIhHExH4
EA1GYMn6aFFllG5Xotk3EacW2Y6iGQ05eJB0w8Hc+C7xs5l3b3C7p4dWlcJR7hxFz0uJMQir64vC
61+zwgTBYXcf8pWTOKvPY6tGDkzKLGoLnqszLS7BUy5dq5Kg3RzimNh3tsQArzGpjhqsVE9QgaBR
5BtpO+O57xmw/OE/n2POaSDzLARPp4YTXkTXRcrWZIJ0g7oRqD6fXkL6gdyCoYOJE5tXXrdyobSY
EqasEzS1mY/Qc+mkNyvacK3wTHEjXCbjCO08N5P5dcWgnmnxHEsl9rK1wLUoP6kHxh1iI6USqi1n
oKGhBINzUJa+32O2+Xj1Hey0zp1gXQPzHJUOt+ap/8lU7NklTIimK+LGwEKcPv350/iqk3goDgZz
9U4k8HhAHba+bwd8KqsdNfAQBjVjdPoQVyJWfz/BpOWTgerl4AFrxNXkAgk5VKxZEC8fCRvStdJd
HdQmRcRGLgqSmIQ0orhIFolQBglCmYcfKG7Wp/okvN+KzZ8KsjovhBm/FTE6B7I2AtnFbh972NnE
/qj8sTOMl56ni4kd+oiWLjVdRkfwDOpa3fxBhw0Q8jmirnXYoNeZMyc0XMRos6iMO5yDH5U6UjJ3
bXXNLoYQlGCZepkiThiMsCUlx7Kv+B0lPzeRy6vGoYQwCOqXV/NVTEwCvCmw0ctPvlt72VDVkoOq
3ByzzGqV1/RUkDEA4C73eMevJ34s1CiUaRHjh5jgIpmLnirGChjK5iDlJyjuSQPtG2H+wwhjjWuN
lEcfpYg6vOaCeTlO+WKnfMm5aslc9KUlfkECexpv9s7QkUESVx2OoZaI7yDCJ9wS0ouqof8c3gXw
3kWAhxHPe5K4MGbxQTcvZQLQ/tquvLg88oDRuj5V1oEyHuZTFbDzb8rx5jB7GbBxAvETQ/tFRrYg
+WudM2Y/YAJQMRyil+xDzE9RnicMJmoGcL0fwaUX6OYuC4rVYpcSEHbtMVZISXnt1LxM8SzKo6fK
v2bIMvpbhBk224P71Xi1hPTrveHaqZFd5w374UOpmAPt+iLOmPSL4MlTepZDDxKsa6tgZbWhM8xy
zLlwkPWQuGDme9+Ka8qnGrGj+T0X4syMHJP/F7G8EOkjOayw5syaNyXKYs610SNj5m5gxEQiQ6IH
zBigadVlLOdw5dI/iA//niEztTpJxPYD00t0PK+VgsjuFtuLlaxDXHNdMSL+smy07eG3GIzgLbht
ke+c1nB69IAQ0WK8ZiSZnzyQ8htG08eZU171W7mTZqfJ7wd2D8mSTsKtBCt9DyIC8HjLJfHUNeqv
Royn/0FT00WaNysIbYJHLXoFUwzZUJ5KvS+0hUjRUH/xrZnWb2k4qpuXTdJHa1WFqe9WrmBN618b
Kdn3CREU59owSPjZtlrAhLHkne6z2udrNUtSSP2neKQhFSMRBjAFvKGShH5+0ojMF3li9JKQdnZF
Qlnm4PQaUwCH8UboRbWLrdkT1GmjCGYvXl3M5sZBvqTBfS28bdYVEg==
`protect end_protected
| apache-2.0 | db8a229724793ece9a838f973de8ca97 | 0.943312 | 1.855116 | false | false | false | false |
jc38x/X38-02FO16 | benchmarks/VHDL_Generado_desde_C++/inputs-4bits_outputs5bits/10-EPIC/asap-alap-random/epic_alap.vhd | 1 | 4,687 | -- IT Tijuana, NetList-FPGA-Optimizer 0.01 (printed on 2016-05-26.16:17:03)
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.all;
USE IEEE.NUMERIC_STD.all;
ENTITY epic_alap_entity IS
PORT (
reset, clk: IN std_logic;
input1, input2, input3, input4, input5, input6: IN unsigned(0 TO 3);
output1, output2, output3, output4, output5, output6, output7, output8, output9: OUT unsigned(0 TO 4));
END epic_alap_entity;
ARCHITECTURE epic_alap_description OF epic_alap_entity IS
SIGNAL current_state : unsigned(0 TO 7) := "00000000";
SHARED VARIABLE register1: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register2: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register3: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register4: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register5: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register6: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register7: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register8: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register9: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register10: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register11: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register12: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register13: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register14: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register15: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register16: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register17: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register18: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register19: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register20: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register21: unsigned(0 TO 4) := "00000";
BEGIN
moore_machine: PROCESS(clk, reset)
BEGIN
IF reset = '0' THEN
current_state <= "00000000";
ELSIF clk = '1' AND clk'event THEN
IF current_state < 4 THEN
current_state <= current_state + 1;
END IF;
END IF;
END PROCESS moore_machine;
operations: PROCESS(current_state)
BEGIN
CASE current_state IS
WHEN "00000001" =>
register1 := input1 + 1;
register2 := input2 - 2;
WHEN "00000010" =>
register3 := register2 - register1;
register4 := input3 + 3;
register5 := register2 + 5;
register6 := register2 - 7;
register7 := register2 + register1;
register8 := input4 - 8;
WHEN "00000011" =>
register3 := register3 * 10;
register2 := register2 * 12;
register4 := register4 * 14;
register9 := input5 srl 15;
register1 := register1 * 17;
register5 := register5 * 19;
register6 := register6 * 21;
register10 := input6 * 22;
register7 := register7 * 24;
register8 := register8 * 26;
WHEN "00000100" =>
register3 := register3 + 28;
register2 := register2 + 30;
register4 := register4 + 32;
register11 := register9 srl 34;
register1 := register1 + 36;
register5 := register5 + 38;
register6 := register6 + 40;
register10 := register10 + 42;
register7 := register7 + 44;
register8 := register8 + 46;
WHEN "00000101" =>
register12 := ((NOT register3) + 1) XOR register3;
register13 := ((NOT register2) + 1) XOR register2;
register14 := ((NOT register4) + 1) XOR register4;
register15 := register9 sll to_integer(register11);
register16 := ((NOT register1) + 1) XOR register1;
register17 := ((NOT register5) + 1) XOR register5;
register18 := ((NOT register6) + 1) XOR register6;
register19 := ((NOT register10) + 1) XOR register10;
register20 := ((NOT register7) + 1) XOR register7;
register21 := ((NOT register8) + 1) XOR register8;
WHEN "00000110" =>
register12 := register9 + register11 + register12;
register13 := register9 - register13;
register14 := register9 - register14;
register15 := register16 - register15;
register16 := register9 + register11 + register17;
register17 := register11 + register18;
register18 := register19 + 66;
register11 := register9 + register11 + register20;
register9 := register9 - register21;
WHEN "00000111" =>
output1 <= register3(0 TO 1) & register12(0 TO 2);
output2 <= register2(0 TO 1) & register13(0 TO 2);
output3 <= register4(0 TO 1) & register14(0 TO 2);
output4 <= register1(0 TO 1) & register15(0 TO 2);
output5 <= register5(0 TO 1) & register16(0 TO 2);
output6 <= register6(0 TO 1) & register17(0 TO 2);
output7 <= register10(0 TO 1) & register18(0 TO 2);
output8 <= register7(0 TO 1) & register11(0 TO 2);
output9 <= register8(0 TO 1) & register9(0 TO 2);
WHEN OTHERS =>
NULL;
END CASE;
END PROCESS operations;
END epic_alap_description; | gpl-3.0 | 4793321718af7cdfe4076d753c18685b | 0.664178 | 3.177627 | false | false | false | false |
mkotormus/G3_OrchestraConductorDemo | src/ov7670_marker_tracker_use/ov7670_marker_tracker_use.srcs/sources_1/ipshared/xilinx.com/microblaze_v9_3/7b6e2d75/hdl/vhdl/alu.vhd | 1 | 24,743 | `protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2014"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
M8KKhPO0PbfNNE6X9vCXpg6uueiNubrfsTjaWJ/c8MP9vo+4ANjopEhafyk/RvTgQCEeRi990MZi
LaqmoPczMA==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
ZUPl4YVP3GbJFv+ALV7e/+UcfOYR+cNJdY6K0qFxOSQfKxYejEdV89rvjGANMBue/rrwS5bRglwT
znNMSb3A301LVKQQboClX2hy1JdT/uHdGrnUztcwhFzbcTAcuxcjgxKisrRWXj+0+/qeadX6gcuz
nyRhXsXDli4dBY6WROU=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2014_03", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
JFj2oP3DUZCyteF5f4/KVFMTY0BoT407h8d7FaRShUqlbTaQQJLnvljV23FFjwPIup2xj4ZANbVJ
PyYGBzeNXZtnM+Lk1J3+BjAN8tulPcxTVQsREcHyEZ0y7W8d/mRN7CP9/00b8eBvWj+cYpiJkTVW
3aXUHCNChCLTc+1f8YuVyzKtd4/1qiF01NLTf0rOVh8z2TayyzS1Fu3wTYXY9X6MSij/X0IOZQh3
5Zu7/gsY7oLJiHPR6HgH1Zt8x6eeid88AvVs4ViZbraBwAB5G+izEd5NACrYdZL5lnzwS9o+PSHo
ycgoW0mRT3JgEQy8q1lRE+8p+OGlFC0LZamGTQ==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
vYxP/wVt61XSEVX4T3rURK52VN2/QUMk73kvA8J8q3o/wcVG7Ozb+oPG/XUkq+F+X5MPo0hGgWq4
GiOfImNwQRWZm6wEgrQTPynfT0jr5ej05h5qUOhyja84R9Jo4T1ekXYniSbYxWLDOCKPWTgVVlkn
Y6ku+MbjlNltt3AgYhI=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
dfB2ezjtX8A1IA7+CScdrxUvQyaxYTo8kMhuM+5jBSRpbJx2FfvAy3DF68jWpRdipfU+uVg2I9UZ
V8t2nQIxDYGJI0YsegnL6IPDJDmqzB5Po2ShGkSOQpAvZthLQMbi5M9nDIGFQ+Hcip32bBA2iP1E
jSgvtTrkVgAtOcEQS562iXlPqSWKYD36fVFpWNLnZQQHYt5ZF8T51rUghUJYDnTtyKCWM4cre0wJ
fHqr+wF4WeYw0jbpfqM+Lb7mrjWoo8t5ocMxjFTFasFqUW9XpLMPB2eDQ099HuKnluD4Epf3Zrh+
c6aysbyZ3xc0L00hRPVjANr8Ozxxgwm1wlEAuA==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 16576)
`protect data_block
3Ky4aP/xRbi9rg6v3Qmh7g8o1DF06862ckUcizmu+ub1RpsiYthM7BWJs1P33DZuU0QbkJZcb+uD
1tgMRDNO1lKODP5GQEjiJrJIWpQfkvSdvvxwfTJW9g5X1EwRrnyzpEW5D1/hVslveQGD0NhDrInM
TWMGrVwtp6arihhdOFZTiocsQSdB6DhQcPmHXb6QqCei1JY1XvcN9XDUdUTZN2lRE/hnQjZ3QVIp
TVh+ROnId21ZW8s1RxAD8pbzPNXgpvxnMPkCV8HauSFe/QNEKny25vFJjpKRtQT21P8qTTOS+weO
eJdjAc8qmNUfPiGWnkxlStuBkWVS7bgNdgsUQaRGgyPlbdi/1kE/3icJdOyyPJwOrtZBvTKuKBqm
IIIE1bxnbyKIcXhJHUWoOWa8+j/XYxxwqXpdGxkUprSgbQ7Q0iSApDZANEdTrXCZKdJyutiQPiTm
TfnUXO4EQxqi5mPWznPwf6brm9dYWOrN+gu4gV12XfchBhOq/F3wSIVlRhyJhxNNRQ1ckTp7y8SD
g/VQYVbyH5QSzgt2kfjHBJL50M34CNrMhbwo+49wZyYVbhdgS5IvsIylg9AmffqXSVDyKPDR3yYB
KVJOVybtLf3T91D1XFFLQ7d4eWP+gn2+W45ShIzQKIHb1vK6PHaAeZGKFj39fnZp2I69n6JbmVWi
ua6or4r+hOcn7deU6ZSzz8W3isGkBCuSdOEoa3YdBjq2qajPv21R/Du36UBgGWfFd6qxjOnTKqCo
ZC5SZxR4clEFZ4q0ICdInhcumA5PeWX8QvE4w9Emd6OtS6w07dZHD2gl/pKq+S++bzdcdx6ap10r
JtWBv51QOnhSSr63aG8g8ARUn515GR7iR48Xw8+NWqufEX6joTootEyyA3fmZA81XSfu9/RBpdQi
Vwoxdz1DTVUY9UDfAyEo8oeRnI0EfdjjwFcgYAXeb4mxGSJ7moVQUAZYMGlMm7UYfpzr0b+ztD1h
Mi6NqH7B54Ox+2ujhqc1zWrGR1HSjXaiqzwe0IsNhcqkGUZFCaKU9rfBQUcm0BRHbCD2rKtNDlBU
OWjcYYzDPzyD0HNbgiKHALeomQJlkqCuYqP0cx6rkcFiSZvyr8FO5lWVQeazsUyyLloKq+vj+DW0
dIYghRJn53puDKj5/D/O118cRC9y0a+cYxd0Seu4Unu6vUhsMzjxo0I1FKQgTeiDOV6WSASUDxYe
IqpXVZb/q33kXD5t0ST4tcVApa50dBnh9/inZtGf+FL/laODI8CtJhWxqt7+ALngHjCnC3Fv9zQN
mO4rkkAAyyCy9GFF6kVOn8fXCMfGR8PTrFEVWgQs65T4qoxZo/DTXIoNYmi/4gIHx5BZRl4IOkfl
SLH7qgJx2SewEg41EfA6uCNlB8wwCFLNAnROsCLyNW+3I2T2aoxAd4FmqqnG7jJgEEhbvK1dRwaj
FN8UY7UKWetFIwenDXn5wSVjK5JaUZBS+PkdZ+gSIU2yj7OPjZqOAj+x/fEuLuY9Lc1AQ1o+nbi9
ExR30h1BG/14VVWJHm1raD0BfsZjUI+d1I4hCY73SlrT52yF1xwqfcaqx0xSTBcPn9X09v7/Ox+e
df69fQHWWKVqW4Yq8b5SOLJ/fWMLa/liMoR/5aCCXlYaA1ZYTMWJAW7wVkbhvA95naf6w5cFrygI
jJf/DaNxKSoZCJZA5UpTpahpKhjLlUuuV/FoAjSAVMBEU+CnEFaf0jEd8YanLTW4l4prANlRx5KF
4/ycuiiT5Z+kEWlFeyJZv/IiW4O1rEq9emLv4gjYxnd1OSd8NzvfwW6TFa1MxZzHg8NUSej3S/tL
VzA3VDeTepZGQta+9mLr7L9GMbrGnmvNBVaLXw8egeNj/s+zjOH8uV8kWuxnDNUQZz6XI4WtOM0K
0+O8N64sI41MSLRHO+Ob4QHQp+MXuWqy64UYWbvX/27eDMUwgTNhxSp2eVwcsOokuS86x2tf7pU5
WxInVZ8KC4/MlZZgZEHInzTw6B8MvD13OlJnZt+Epc3KYh/HD60FX7UrTqQ3TRObEsaEExQgUfvl
I04ycN+bLOdxPPZWHr62CgyaSypfYyhY8Ij0f5wR0xn/vDcIfHCcjwRd0vKrzcNz0SL2ThxpssRu
Af6rsQF1aQHAhExuC2U1Jk4cgdm8aWHd9oSnzt2N/ZjD2zSwchqbP9KuQEOjPEaCQNcp2iu9wL/J
42GjLta8XCZKI0LOdANxtTEJUdQyeuFsOawvf9UtOD3785M4I8RoOomZZNMl0o/hzVkfjiVbJfFB
4uByWgzdkl6pIluAEHhNOs7lTjd8oPEawYBA3Xi0zOY9JSm24LmuGUZ4D1FTVCIuBiYklC9t+Zz2
Rp9bit1NxmM3mT2/YYzZ1YxkOCO0irwj00gLn8VKMTOx0qrdCClM4pj6PfHSqmtnKPWUCNnIuWmR
0/HvjZ+EM3zfk+HTJsQQeWwJZvAgJuwowGcCxuW9h70FV620mSwjrsmKJq3BwOVsB4r4Ge3cWS92
qMyQ5XU43wsSK+DVOUBZvWxKkSU5dubOf7axaV+O6v7D+W4wkNzzoQNqTFZxcHl/ur7jSW+d86+y
WLAR/Dvm3MZLLykEDl2ja8WdeQitBLMaYPRXRR/0TPWR46Vt0+Z8K7eHJsPt2nOYsc1OIBA1LrH1
iXyVlDkCA/b8y+FDVmWDj/ExndcXqHMDFT2XmnsmB7Ye3BlDd6Cl7OcQzgsA8LRpY5RR0kIpe3ky
nTARMsH9qQbUU7SHhb+06/OMp640PBwyyYW3ePLwxKxMLPQhDJtoPrC/74ppEG6w5WlKeWZT/EsJ
4fB2HRhzdTjIbBSGcGX0S/iltFkuI824f+Y+e3WqW2sLhqs7D1fDnCw2EnBYV/fvoLJAtOSdebxC
FIUXoBGalOgJKumxRQ5/Gk9FBg7lxN+sAFZ6XHSBUbtKPz2msDAcy7qc/KMubp67zTvAHhXh+oMd
26eptv3elBnn3AiQBMwiUsLvcokUYBJ2d1BGpb+kTwBvUloleT4nApmW7XPKJN5C0xz4lGeCwt2G
9pKLsDJ/cWRYMwp3DlkPE7iIAfmxUC+lIUv0cNSvD2UVA3LkYVeVgWRzAlcAjqZdFLNFkFSvTW4C
lyYXjavMNnXauFEaFLIh/tC+XuO8jYvAxKZEEEM6Op9gFPpgvb0yAiaBd2wIZSuApWrXYaEpBhTR
7uIsgkqiL9G+P4FR9AQ5udT5Xzx+t2FHroj7O809ltLDqjQr2rPQI/3/DdgxmsQe7cx1LTsHQuNd
T65dTLeuLPoeiE9hsktEWS8MmtDGpTdiLts9WhDHwapvS7/SxQMVhkuBh6dOcGXdMTxue2Y/Khw9
cueWK7mFnq11wqTcWeEenX3EgC44NR0Bxe8YupNDzEQmhm+v6AEBhPkbKXoJyRtG4BakAz0k8KFC
Y0U/vaDEJVKlYP3Mu4H3ZlheIwxiF5Pfm7DU48z/pTuLih8lZ2Id9Q9RG2Po8MDMIQMYqd0hEmHX
aek3H1aoEajorGuNYaWDjMq8w9irjbVaF8zI441N/acggNLaxD4XxWVHfcTkOW2RtDWzkgr3RGs7
0oFDsg4aJgsAe3AlTyMorfzAQhVGytsgosQm3vODqaJYwmiJO8UUAOAGSdC5hUNkRJtPnJ9BZ8Qj
hYtRmPz3xGkldiK6I7LFS61GXJENaca/M+VC3xUCSNrwCEiuxFlgrH5t6Q8simvZG8pw0+RNOz/h
vvLpvo94S2dHzC+2JXnwc8WebckK98L9z3BnQhT3nSeZgVl/ULgikW79ltufbQrIPuO8/ef5wpVF
Jn8Bque1ElE2eKGE5iAkL/oHQkX2XTCTbJvSuoXBVXoV9X9Q2a+Db/Mdp1kaiPDWJW//B8oanwwY
X1MMPZPF33r5v3epD4AGjEHmHVvbA8n08YwmU/9gRvSYPDmxXVtmyffT0eECdb1ruGhVt7hAPvxk
ftXlK8WunsDiN1RAdfDBHh8b2T0JcX65d8x5cm24ls1Dha7HtnjYoz2qOB1AY5RjZhfqevc1BkoF
GYU6CFbWwH0wIaQHW3j3UKw4rNW+qDk1ibnjL9u1b1KfL7sc8sL1VaSAqCJzMnmU3gW2Y2EnxRJJ
kdVM5lcad7w3pvK/Vz9rWiPEjsZEyIn3BEmAEZslbKaOUwqDoMGIjszFE/g/uFPiCw6aIWiP5Iz1
xLwXqnnUsUeEQK4DWLmd/B35UjRaQcnoi75kOt0eGRWZGye6R4dvSUR1SPuPf53z5aNk6zsiq3Pq
ssci6kY14YmUWiE1HvaFVyGtmgWUfD5P34x0Gq68W+XUh92+ckxcpW9gtLksFvuLYfp8SSHe+4xf
/xKkw7aqKYwDEIeAKLvUIxnKpXxbmojA7H/mqdPG1X2iu7eTWjWATc1XomWxfTONefjT+FlZMgOb
iV9yZHZnfmq+GhTsCiFTws1JSiJJv0RIfS+CDMyYt04FLxX25zfTNRHGoy8gQFRvuzYGihIP0JWF
Fzp5N7FGDEaGB8IuRvR+jSUMCy8Y5TXHDH4NsasGJv//4v/TEuxzyyt+P7qZht4owUoYvCeO2z5A
CeViFJuHlub71uuqidYM4KObtgD/iesJp8ajn+O+vK0MyGRWCEfOMpnR50077e2b1bR+XGpKbGPn
jmRKXtX4pkGdSFh1SZX5Z7UG8ir2uQL67Am4LqnS9gr77UIHHRhzambqq4+r8Zcy9UO0EZYrum1Q
ToLZ0eNZlVOZ2kVyQiHbUog+/rQCz/StaDA/c8e/4XiO+HRJVRQIQHJQEI+CPJLlzy1CELL3BTHb
0Twn3j8bDJt0DfBIl5yv6qT+T6XOaLEMjRJ8nNy8XuyRlHDX2yo4l+lxjZotGRA9EeftUhMItga9
JXhgLGBwF+bvQ8THad2GpFYHhp/KUXZ8UGh7SEpQhYdcKaRurwIPhVKkNl/25daHi4NbfmPdFOY0
ty+/fybBUhewmg2vS3SetthAYGveT2EfudAN7q5e8Bz16fxo6zIArOe11ym6DWsFw6D7125z6af5
1Wr4C1f1kUVfCWGhTHjSNrKEQcfg31VLMz7DzArXFuEMKf9b7OlvUpvS99ghNjVBCg6w3SHsx4L2
jJcZHKZA45WeG1N7cL2MKGd2wsNf7U+Lj5s04G13a3w6LYnGDrO4JapSWm631hr3XTjMXVry9e3N
mu0vAK5GAauBNGnHZwSutbkvsizpo8FJqnLCg747P5DcPMV8r51LO/az5l6QpEqIFzabktn+Ojsj
ls602CGvcXAoMAL57/qXYlekNpuXoRvzEkolK1J6s1i9LvGoEwY0u1DK+lBYkIdEwphsz9o5axon
P9purJotTfyxV3GIBE46bfqWIya3ad5UJy41+BCDJrqIzqRy8hWBOOPgXZ8d8/kFuH7J72Ps9U3Z
P32ypqbtN2YjIhYKgBnQSVgfk0caSt8WRN1jnVXpZHsrqpv07BAeGhWxEqpQllumRGeNeL4ONjDg
dLkX0+96Xb2WQEOxc4te0nHkzTen9dek79HC0lgMUL/8z61nW/gQHCxrkiwhPKMfNE10ZNx4J57J
bh8oYla2UnmfmXONlNylHBLl/VW/xQO74G8+nSxKUEFKoMxN5rGK8EwMQjHBCIyDFpGlcN9in/VV
w68NDHrOlYnippmivPCfrZ5setrHNyBA/OGY21GnG9dcqGXIRgmD+nDy1++vrlpEuvcSL4AwMHYf
vQxZq+junLY/3jsQ6N66PTNgSu+dvl3cb9MmHcBFz9ZXlm9ziB0PlyZ6QtvcWzkqijhaON4r7Dhw
4VE3liISE9p1lbyqcCjDWcymI18qZvn3xJGu8dIoSfx3CQ4bjdTl+VZrSTHiZfN6A7N/xqGt2YBF
BJsHtzfzMO3r1JSPO9r7jgEqtuKXT28DfVz7cSb3SYO9nE+6WrTpEp9SRbXYAC52mW5q1D+mfwMP
itrQQYDcvtc/ezyPhN/P3Bpg1317s9wzfepYWM9njRmdHAuBd54tvHSWu7lZt8ciel2s8iFodZ3d
HZEtS4wve7uhIXiLdbfAmNJVtFw+doMckYURBEZVf6MsDn7N7boI1yifA7J1nNMXKBKTerm6BuJC
SZUqfxu2XejLBPwA9o2pAPvdNZsRju5fGx3Pi735ZifD41G0rrQjPzGgkxvSZqekXEuT4fUuQyaJ
WydVwev5q/d5dM4lfm4b929qn+V+5b/Y5U/kj/Vx+zzbJXRurjWr+jsVgyJ0uDbBiNtl9k+C3Pe9
uya/dOY5jgnfi5FchuVX3hcR+GGFOuE0ejfb5trQuRBm9mQOI9hZzFqyc/lwH+7l3/8aSA/iktxj
GO/uCrx6CtdlATENmtCAQsjxb4kZhXr5PTpYnLFy8HQx7xCweVjpFc0KorRetdBTzvPIGugBKDD7
4p7YvJLu/fUWcLdVxkOdeHtdzXZW6CEeHLRJtmi5gQNuLEcg9fjoRTJLtf9I/0pEoDJzwSs3ZiNH
JqThbE8U8OnbMTfetVq6hQo08SKd7a+RfW7ghRLrlgah6u3NmWsgWdjWTlvJpMyZKoxr0dkOtrr7
iZkRfxW0jGlvHK0bdJJyzNQAcWWxvLI6BGLuhUk/a7gYB+1RBloSZhd/u30nVW+GHTaIyaITwRvr
5v01QlKrOnlIGyShMGllSlHnASMnmmFnhiOY+3GJrITg+I8RZBtRfv0aYxPQyV4tGDrOctpEmZOU
S3dqp+Jk8CDkeCRi6hqyeo3k8Hg/LnKb681W8VSFE/fuwSaaeQfEYEANZVL4HBvFY9JcVmmwjJew
HVZTFnzlzRMwCfGuBlHontqxf8eESVzThCuaIYiqsfjtCAi14JFIQmcwd6BOffDDTVUDftXt6lGf
nTGqJ2liyo2WY8D5uViYWX5SM5jPw2o9HpWe07TIeXGvM4PlA89DP22XN31B6lHE5em/pJ7vw5lh
SytceRjiwdTEFo4Q1G1tezaQluVqKoHedZ3h7MAhl1PzfK7JqAQgeYdvBntutoNHUXA87OHlrLbA
+P5LJBFPA+ly1luNANUXmqfl0Wh3Fjboc2JIjirWvTpIG9xVWSUScfotDnI1ILVdVE5d0BcYBliS
oIdwsb2OJvROa8tUAQBJN85T2+M7mVcW0rzHw2tcHuxrwueNSDVQdRaykDstfhcxb+d9jt0rp9gv
dQZqpOx7TOzLYUcM83uCKuqw4cWuNEAR3AkyJhLAQXPwGruVfX0q4ao0Z69HzB4hjEw+T2PA07cW
f3cEQnUtAnR8V8lSK22WuPTc6D4cPukr/5bw38Spk/s4oLpnKP6qEfWUWi3J1HZYmZMx67TDALOR
jie9rGsXEkDnUFMLasZUdwP2hUhjs5nkJB219rjKzP765VEQhMskYK7NDbv3FJeCg3GN0fCmuE3U
z8wJYvjoRf6YPiRDxpjjjO5F7b5h6VEt4KxYZvlmI0iqcbziQ/gifZAM/VIXnAJSQP2NpTMBgAMl
qOBuAS8YCjFYfD3Cc1yabqTQlVijoEZHYOhtLPLV4cLiQQy30nZaUqCq3Rvt7fw83CV/aSM/YQH8
zq4oCIMbOmbQ6oFk0DgpiY0o26wRAvEhC81WDxgNleoY9mn7CFje2LaIlU2KU0eKMTb34yHSKfOX
qFKDaFfz4QywDDc1DaLiXoh1Vir0A2E6GgKgsTlMpvfsS5g4aLV88brqAPZGJiCoYOIatsg9gMdt
MfHzvgyPu3n7p4ICxeVXh561mv9zsvQ6vNeDvrCglAza4ZzcglSacThX46K/Xd6+zwF9XWpfw7QF
cEleyVOZeSu2YSII7BrgnDkbjzaRifQZp6Jk83PqoVgUZ1+kn/tTkuaxCaWGKROy05lZvVw1CrHT
6KRP5+4zzHOOAtJbohV3grKUQmaFG7fCWE/qwZy7EceHWm0OLaXX5tPb4LRgiAwLg6YmVO19br0Z
bD12YDEk1h9CBUilDidq4kUTh4nGqATuBUVtpEFmMH9TNY5HQxeGYyTQu8We+fKeIRBOr9bj/zBl
43+B5iV0zmBXngwglSctM1xguKG7x+ZwjolIcySKXdwMK64OuZ1UB6R2AU6E8u8CTL6uDH1nzohX
w3A3GCnSI4kPK9c88vayAY53LVL0W9JkyadUEw1/05F/TjAXaIsyoABxMEFivENjNGFgvFI1RAtK
bIALh068TyyIn4Ce2UlY9AF4c5i8EnoP0+U12Qequo1xVymcN3Eem1xfRonTlhGpdJ817xI9LObn
zu4OtfWZ67/TQY1JrlG89HMSwTfBKSbyJRRBYGbF1LE3EdsO6K1H9/NhszccJBqIa3v4cNU75Ho1
saNpAaSDLpZGk+TDW0um1ixQrf0NSZKgMyTB8LGhBEU3yYiswAXJvBIPSr2WjTdFOBvnFI93qR9J
d+tLtl3gt3eWGXPQqjJSUhERw5G51LqdKbuuisbbVN6PLH5PVW4mNifuBPqbPHPK0SxEJzlOlN74
iB1ES9L1uID/jwINkKrl2Jg9+yS54dn8d9orX6kH8AWozgUJ6uiNW3z+dRVtRhyI6SKsjvHTPm+S
mIeNfXXfgBr+4c0h8fqTEERczMZa+JAqSDoBMq3wFlUUWQYLHocdXlkttUXQt++fawUtUs8oBjZL
qKQopAqJV9xKPlSqjDTD089FD7gNl5vETIOqLbzrf4CiRKgmJ6N9MwDOEIi1FI68l449DF+EcLWX
CDzvTFnXh1DUeNRAnBzJKNK/d/JXWbR3ZKg34FvYqbH5SoZeDCppdB3A8kd0lpr+j6Io+0l70EBu
M5lecfiYmn6k/07Nn4sIlNy4geR/AMXTW9YSudwqcR6MuhHM6war1/AqqKpz/Rm7FG30Tg71lLte
aiUryfrFqxJd7X1vS0PuTHuhUqN49lDox1DdSUU3OwFnn93jAicDR58bteLPv/9QPloA5NcS/TkA
KBAP3GdHeMT/5c3O4Kbudt2Cq9NhyaFv4kesH6gy764fPheNlwW4GJhErGZW7jD+I4QoeM455Hl5
VHpmpwWrBrX6eXVZV7byGMCdb0M4vQgUaBEUqPSVaWvJpVbrLF4LFgr5X3uuH80f7rx91tU8g8Lw
sS2o8eCxRkUWqSBFh2Ky+HO1iAZ3HgJ8MLpXnKWr4O6HpAawCIvvjJNHumh9WE86QLibeUvoknmm
vqYW/wRnbYAml/hhXNvXPOU8y/vu/pxpmvbar7LFK0yULget/kzgiip5Cz88MPeRa186C1UI/rkD
+B84UW1DfFxRAAQX2HEOpG4waeznp1wRl/+kmM1iuuTm2fzQ+lRVUcgUNvMelTvNoZv6cMf0Wk1Q
CmMOFR1k4S/d9OhTGrTWiYELu22ORznf1hwOo38zS47roUp+bdW6y6Iaw2QwTsUoMby4HCBFsuYA
3lyFwnYoI1eVBfwhgprD/fnBNMpylQ2f4ZG5ixgPAPL4XRy0yjMJA038rMbvrkpt3xw0zwlLMaWZ
nJ59mOQazGngJgaikWGSExSIrJXVU6UJ/ADyZDoO941kJdMY72ORjkmr0IW4EYSLH8tFtj4hgfAJ
ElLFZbY0YfbLBQLQ9pXl3DPe4f8jM0SeaFQk7PlFsy5b8NlBP8DayYQ7cjg7LnBurqAlhWC7F3w6
TyRsGnPPa94JAaLaJbVpLOyl5zepxt3OBfWnOoAsqwOWbRLgCZGs6a1qQvNQ1W0Y409mdkohAbB9
Ixop9NDvCucS+C930iW7WfHTgY2Iqb5G8nBi9MuGEFbwGTTsyjQyLzA377bf8zwQ9eyZ4lbYrNZe
9nJxwdrtlGdl5mDnwzmgPIf+UbQPZXCdUn7Ch87wsbMfT/Zs6H7crAgtO8YHoutrMSFRNIWM2HA5
zDOdy9Ftud+yKLDHEFBQmWgWlqROCr+jp7YwtViUND0em2pL6WyhoJ92W80kX3QDNNN3Z/opCiPt
YsUsTEN5jEWQrzR4OVTjecX928E4mD/8bxkxjaEnApNtoi1lRT/U23BBYIBuUM+o109sPLkgYyK2
mJKjG8viuBxKpKLgrDmjMGwjR6lQIHjxADWLlUZSjvXtGzddbRSMdtgiaO4ym3BWH5pJTfC5yNqW
hka5F7t8RsINvyABLg6NHyrKi39WfgBHh53e+qaUubjE0vcxg+KchOfqV0bhWJgLCEF3JbGj3ewO
g5Gll/KrMTBw/lDqEv1a6mOceyrN3EHzCxOm1qUhQDlUQgTt1oIfkISVI+B+kN7d5MGV3kLOHJy7
ODY6DOSjDs1ZiohTiBBwAmw3BU16LzPg+qGxRQRoApfzu2Y6TgiX9zVyVzTs0gQWSY3iCcn88qCW
53ooQT4N6+mTLhfLJfbXRzwUPI/TwSIbttirgYgUDSFWXatgvcFAZ9s3IgPGL2NF/y9YQINb/Nmb
aQCCcWzVqk0RJGG3f5zbDOjnnZUavD3kwUMCHssKWSPH/lf+FOJTORjm1vokAnVF2FGmu3ESlELa
K3n1iesllGbpym27WFGBmppOBbwBVjeFMsbLYCE8rYljXhXDDYhzDQvl6XKzWU8a0sDGzIGj9B6x
RsodJi2HdqURACJhogFjp2hm8LC9n7WmpVAXkzorMJkSD2mY9iUyHhX6yHVxl2NqiR4F64OO/AqV
zBoYSmYzbfoYR2/3T3UwdozY1F+HrrwL+vQBR4DlToqP7hQsub5Cf5yZUoBE72esFXjLMaeFVpaj
3c5w2tCs+SNLXE8kLSMhzy8w6DUmYRf+uEv/TNKHxKpnk7h6h9KsxjftvuMLNUV+JZrVjkBwwseZ
aEecNET4n3uQ09HCMVSfiPcS/WNkIA3GFOxCjnK4qvCxZhO/QdxNRUDK4iPOUI3ddw9d6Jt32uMz
EwRcBsd2dbAdUmGjqR3lcsztgvcRGL09YiLlRgqhDk61y6HC/BQwNf1owooT/kUcqiHClalOIm0O
81MymvoXCpt2HqxNzbhiFPRHOl3Nl//RMeWM1uELTP0vs+JN0Zjh+S3KxuLagQNiBTa5ogPdYjFE
QLvy29a8RQUyKOlyZYEyrkpmlPeunU83wDKt77eLMxdiC84rQKH0UhkLFz4dZJioEVK+5wQq7bH2
fRbQqmh5VaWitQ4khuUYOxk+0p0T5FP0HJEv22avv0HFvZrM4ttU3PJDqYqQ3c0VDnI9tmA3+vcj
NP3evWEbi0ZsHbpo34kpw4bw2mkRf+r2OC2i9KDtSziK8j7Pjrz9gMnhKxG4NDOmShMcFmtjboUc
77NaJNiRFOLjF+8bHc8Y80rpo49/hhx7sgPF4Z0vc4F1KnUhZ3fsFp+G6bNbj6qucErU3qmsR3qs
B6qxel9zDpshgWbpW2nU9S3q31H1LUeZUiX5MOm+zLE+Guz/lulZObskzTagk/5aObrbe5pa6ktF
1xPVjTRZQW+kO2RjKCfq24T+apjycAydeEdbd3xkvcBmUgMCF0iXnT5rydXvLBesky5lRGgbLoKQ
2/tsLKqy76EOqwj7fnYSUAk7VYOcgd6j1umQkEUCiPCpj7JiFwwSmRDYF3/Xq9DbKZJnOWTJwXAX
Q0h7e9gbrrSkUkDA6vqSDaQ7DWSB+a60TO856tpoTjfuP9xk18RUdxyvvSLHZXi3igtWPsc6D+4q
MyFRzv3aCqUG08GE8K4cxoTjD0+ggVOAx6Y7tnSaFXKeu4Vj0+MQQPnXUN3sy1pnnEM6OwCarfqO
bIG5OYBn8W7QLJ+y6mQa7zYZ8gr3yNDCoFjh4QK5E1K/tp7Y9FnoOL7dHJg3+p4VxKx4nDmW3426
6vZaH2zVZCNzhvWlOPfSvhT+UHnzoIbWt4zGthVDwk+O9pt7UxEsJ4ClhnnnmabriO+U4zRGYmoH
nLRyWc2ryqJZCBrZMALwIbE8Jdd4QWzUWznnoxLuacDyxAvcdO8cLQ9TxOpxpFB3lC9h9CiOqE4j
VSxqJHEQh+Lj3skj2WgGXSavCNSBxgnoBT9vuD1TLoJu7qU5czLqVYsaML4lkYLJiEygzZopxwk2
7lbDAsz8Xs09c/xyaYQGk4ihxqxru9EqKzssOX8SsDUleqctal+YQd45SatL3GUrcAqGhKg1rzZT
IZPkf2Uf/uLIsjP/wlsXn29q04TVWSMp4ZkM1J74flvXqUy9HDOogWtdaBaNXsRxp+dgWbtNpN48
JHKf2C/XJocRsR094kTStyQ/nUhiT2NwFQwKopHPOQS1ToU9JvS1xYERIvYJYPXwIu6AnA223aNq
bfvXy3vrjzAtf1m33J1xfJcB/ONeoag2VqR9Cp1D3nfTvsscSpqNXzFbQjOI+DMWA3xpGx76fewd
JZUKLhcq1REl6HgqMkGa0nm8/kg9EtiAMQNKeNQUjKA8H22xBOC4rbmcUnvFmY3/T9Dn4/wLCWtv
UrhCadZniUpGbjvhRCW1r16ContsUBIqy68XIMEY1PaDUh2s5r37ZA6dJ6D13KR3CoxmHOp2Tewz
J2Fg2cR4to5cje/RTiDRm1ddfxjKRnhKRooaCD7kYEFa6/T8c/jCq28eyI3My7MPhimao7Sfb3Fl
TrOBLKB5+hlj4SMZor4OAPUyPYpXr3RazbA1kvMmd4HHaQ8UBwPbmFmagNmW6SOV1TqtyWc4LnKc
tP/H575BtRS67iUGf/L3JnoUfw4LK8M1hTqQJaU8bDMZwgpz/A6kFUaE9ZP2V8vL696Kp48vWXkR
hirBRHAd6Suio7Fa+OU67/50/w+eha5R4k2aVEkwdR77cZWgSBt5hCRXtCH+qft2YHp4ekcMioas
1N9zPFYUB5VMZQS6NugiL6prZ9mJXqB7jf3JbISBbvDBFYbg0zG2qFoegvIXT70eq+bZFRoe+Zqt
oFMNovVn24fSDlP20B9ImN/Q0rhNLzGqBdzK7mQ3jBX4eXNp1oSK0ZnN1gK3+jcDvw4e812Az5bX
LHgwSUhqlresBTY6AkLKZxejXRGg2NXKOhpW03iwR4MHqlOr+Y0JUN8IERwudsI7EEixzRv8JlS/
IoNhTzp5Dwwmlivp9HooU1aIuIupKMeVbaBRvvZdCUCFyvMgVt3ZuwHURkO1CKUHnta/WjtAZj/M
TTWj1KkPUHXawUDZt3bUaYMuZ2TCVGGc4Wnl67GKL9f1UeW9N9uNvsrQsmOv21LE2Lc/165FV2TF
KC8WEwMy7cnHRxix2Xj6bV4Ygv2k1P0GpzmxIY3eXStgFGFMqly5clXfjF7WEC07xVyR6sbBMqvp
vaBMyBDl/5NoXbfR3xVDEn99iueyEqiWO6d8ZKkwurqesq/D98yxTuBwIaHszf50k/8sX9srFgyM
Ap9/aJ+IBDhuNHMMbe7rtKYKkX+5YSMfySufJdmEgmwoIpKBrEagti3IxkCnDvdwk4ln/dXncNGz
AreecBhonq486PNY8PlJws9bkTC1atffljCjj6m4xlYt2uImFgkxeLGKAjLuZGz2nD10NSR5tg5E
Zr/SyfjAKJ9I3rTmwxtayGxqGGtUbwlmjjLDkkishhsySyuWr7VZGc/QHxUZdu8HvdAQ6Eld9x4G
WoD/0LUztNQbwNRIxPoRsbUunfhZq/fCEHj8KMR3Ax7MztuJMOB0ecOam83TKo5BW4QeOPITbfba
ABXkqvR0ZN3VSDvxSR4j8lyzD3NkH2PdKS5x/YUwYT+vrSIc8jNBxIJtAJ7bisPS8fOknfIHOAsU
32hxt/9UT5lnL61trvhj+8/73+TDHi+0cW9ywczSimRkD0vQh0aJg95s1nxHTBjuRUGJT1wWzIKd
CwgWUzVFg3i8CNG2FUB5y+d4b5SwKRfJ22ixD0CKN+ZA/YrfbY42cRvgEfTn2RjQcy/IQrCdzK62
XHYVKySflMCF5mJNXfW4n6r7LcYgRrzgNsbXpuTieKbis60RCdJrHKyMXZuHEsmKkwZ7BUarTsFR
v8zXmDCHW0TXLmXaSyq8Skvz/tAHSb/HEAUV+cvQlFhHzHUwtdGSdB1rqF0XHyhUB62uacACEHvp
5noLpFc60drU/AXJbT52W6QefBpkNwZxmO+I8acjmx8fYRgjSN5UevOD3CVofF79vI1uUvqfLxw9
bf8DhI62sAgcv+KoXRw3BCWhLdozHXLPZqF4Oy9b+FWlds2tLZ8T9S3ISYfMn2eVeTqhFcvAZfVJ
wovoNQhpgmBEMsRmUf65fZXL64LL3kUT/U+sgRG6rdWA40hrbL5ytrHvizhRF/e+qYe5bMA+Fpyh
8h3GUw+4EXWv/7LQhVCuda84sY7b6wpYcf073Zj6qiuw9IJPdpjyJRIkNi6SvfYmGSzZl3Z3HFnR
zMlu/QkDRirpat4W/apJmrRMXSXaeXRGGOvNwj0pNO/5FqWpjlOB7THfxjVhLpWJ/BFp74CboodT
MWC4qI1azxxUZEvM2wHX0/jkdGcw5Rj+mrzrA64CPDroc8X9RhUQ1IZcWZyLlanjCaSjeG1RYU9S
ax5MKk+HhwiyLjyp26lm0rSA48fyk8QoS8vufhPJABoqeul4A/iSPCkENje1/O6tb90xvIFNz67l
9b88ZclqVD3tzvSqBM0pUTyn3vH93YBX53hq+QJABv64KJS5tWU90QiSRUDo1YQnmTEosvLMBdby
V+qptm4ynDawZzei7QxYYnwkh/ZbKzI7p7i7qc3Nv58kCooBEcDBlo+agrhAROn5iiXkMuTAsh4E
Dt6rXhboKvS/ESk1ND+ItX0e8BIvM8jQvPqFjZq/Mr8Be7o9DfFM8ttdRPLNYzDLecdNlWyT1LYi
EAYWa76NTPFMEwWLw77kpjbhJNqHHD/G5zXmB+KvCR8Eyw0Mx9Wk8JlC4dE0frJS7DxLpjP8svxE
wzHPb9elC0OWJ6+c3bkI44f+W1ADtyjv8KbfNA81oZJstxWQsUP+JjAnh4xtprq2BeW/EmRBzBKm
CAv3n2R1hNjRs9HHMhbt+dyOnQD0jSJYve/SMUWQ/qVjX43RTKLTMyKfeBPV8QDSUoAHCLWTNhjV
jBGDdPMZQfxkmLXEKTMjGVmFSfoKN0G25lrbWbMJU6KPbVGiKbH2wly3gqdWFUooo+HPlnfreap8
pr/QhS7t2HhQl+xzJQm64SVsf8KK9y4Dx38nshG/Fs8roENS4lm+IXHMIi7dzj26Cf/O7vilNBkv
Utlr86tcdi4wEHGwwBvHypt90hTzVEaMT1HXHt2g66tBNlxonmfoztqPKX060Dm4/epawTPBScQQ
F3MhJdrPwBV0fzBBkjOwy7X4IgnF01/C1bhj/2s9h04isi+n+2VfKViIY7uDUuoY5YWnJi4wWMnh
ga1zx7tCDfRjg+FxQrW0GZPgKreaSBXclXgyPaq6O+Snk2uliKedakH5UONHG6Zxs1Y+nIz8vm5X
kwFCCqcVb6CmOoJtJJrvB+3WajeZxfEju2ltUKPWlUF0WC0vPkNbzBnysG+kYtv6dVmg4TFcDw23
h/0dLlI50pYcd/IwhuP4qh0+kCCpuizvvgSzbCWR5PmL9Qug2IwfETXawL4IdtL2qOtzs1RgHJmU
UJ9U0Hm2WkEjKwWjC8XWWtP9FmFlHWjEJ1sTsBYAPl27ZmZeLfAZmhO0/fskOv8o9IdSXPLHWvSD
W4FeQjGds7RxPFmKMSHIROpa+rPW1qF7oGdBlX4IEn01TqIYgscjnORIzfSmd8MyoL7UYdHUKuq9
4LmR8ARFEHzZhs9Q9ns39ZvaUBTdBNtk/9ywgC/CLDDgCAROKX7yebcqdbzwOFZMSttjg5J+gMyT
ResAIXo55IsFNKe+uD/JM54xU0imXtcbE20wrsjTOcQNrxl3JHbEKdm61B7a07n8ZOIauCezucVK
RiHsCfCr75DhMzXCIcr0CtPck7qybc2kfpjQHTM5Ygcji8sXF5uTxPFpDdROKTXR0P+U2JJO/4/7
6ofEWdbwxTRAhZXNH3HVO3TtN378SR0fkZYKKc7YcUJ48E0763yghbeh4G4rmyteJzqjshNJW3wv
aHc13Uyl0mbL8aa0KCoXuQqgoY9ZsVdTTj0Ss+li2kTs3RYBggdBZqIyloJR2HkEg5741XKZn5Ou
kP0Q8F2CvvfeGke2Kj/Iqy1FGmqjF4xcZEWIJWl9SKNaqMRxdeHzq8yFyvERik1GTyPpB2PI8To8
/l5MU8VnMmx4qvtkkUHDTVtjfkCKLWJ8AtRDvRUASgsC3gMvBffbAw2cIdRTtudv2lTH4xtA7CAY
OvCz1HMTLTEYg/ibiLXGb7RqyJo8zHrYsmu6oNhpPDBsPhyBUHo0UTRoxzxIKEqvLIUIWr/RRr2/
ptBKNkFutI189cl/nqm7+iXaPahfMtYVs7yjbkcnBnb26xd6KGavN3gztmu9VisMfmsTnGKMoHbq
7037vTuTHK/LKUl0rOVZoa4XnrsLFTio4Ye7Ovg0p4THPndOGzJfk28FdiyxPCWSHKd1hYrWox8l
aiPqIemJhAC/REqnYou6gTg35NeBllQorqC0qsuAkDHqZrGnU49Bv6UKTAuqem3jikzTM+n0E0MJ
ckXMKDM5iTsam1IOrA965aBrEAT9mwfAQ3oEpnWCRf10FOg93Bw+t6sedjgThrmsft//zdDcylw8
ss4q0C/CIY3Y+JXgdFs6rUYEN+7Mhwru7juHmuf5CAoAAvpOBuXbh4/A4LtF4W6SFvwZntKUncKr
N0DPiJqisfAr6LONCAtSihmRHL4HC/E08JXukIgQSnpKskKbnVpc+4UfMRu2dkQcbQzAkZtOxe5H
w7GL4xz5CyXbTJ8nVt2dx5sgJk80G/lSredEijoK6zZbMJFiIQMuP7/bN9CwLypAJJ5evpebJaGR
KVW1d/L6YUJ0pfVBuyBv2cL0XVKex4f9d6cYWEPk1VUecyOFwDvz1VCxCmv7TwfTm1V6jwWZ9BlE
qQUIvgqyb/Cwm+GUz7Zprjr0iL6NaqKQEgowH1/Rn1QUv6NVSgBjkN85tQtoa5snPumqjqrSVhEg
kwtNkA0QaGNVu9faQDQMzG164LADB6KmR/tJqVNvYxgzpkSLjC98caQO8xPE63Dbtb9Geoc97ZsB
ZOumMEhJ5GAaiNWqjUktmvrdH++LXwE1MLNnJNZaTjqmBpxsaOuRngvB8HdneUMFeSiONZkSl0cv
OtqX16Pf/fVGXYi4+bRrtTs7mT0tbl6d8VjL6kfC7F2kexqAUESusetK0i1r4X8qKzjEa4D95uBb
MpCchi5RDChdsp7KAi110pQOTh0PG5w9ZIy4fupkjG84w9UNxLj3uKC9YDJaGoe/vUCcsoTK/2MT
n9CCqOgQ1+IEWVOrd3Fe44LSfQ1D9qGWnKz0Q++WQV2ykIGSBBNyPWen4akAPvKozwnGgsrldCB1
MIv2TSnC/BRYUuFozzpInjNEcIogsXLwBbg2s8nAqGBqw19vDQDVZXwJb2hwU7+agvTcdS6BUWtY
x9cQUFNAu1fK0Ntk+fSz4tEonwwnx+ik82y7ZjIzcyv+UqyIHKBF6I36pT4YXUNOufnaodzOt5u+
YpAV83v4qfRMF46SbFEHtuU3iiPiZl70eP/rDurlyDR/V3WiC2uC6bMoqnUHJ6L53mRKHUw79AUB
47TxL/Tlp5n3S/Q3ZsYrW2ZxS71+lC6nUiw+5lZqD/a9wnUpM7BWWRN/Mzkh+S8U/4q5WpGxYT1y
KdtE3Km6YyFKEPmF38jX7jIbmNkbbXivbZIewYQ6WYow7Tz5SrGKb6VSpc04Ba2Eb75SKCBoEKBh
C6A21Fj43ANTUqoejkO2LD1UgVlRSq60xgV3OzfXwmethzuWL7LtlgHcTiLRxK+U/7seBhOhkLJL
lYqWoqT0SDVGGYZKwdja/zRH2srgYERKLYf+YGnOrrOC8h0SGO1o1d65a/Tv5tEh5F+tPVpOoocS
Xl2sWfn4cgLXAbgIvn7MG0hacFJLh2kz57oK38Fq314MFxiUpwGwyyx3oWTslhDb/JHYInJ3gtkJ
UFvJhJ0Retwj96KpnSWSKLlO7Y7rs/Y13okVWghm5sYXn1QbudWPjOCziy9MIe0e0XnLU4unkvtw
yNJJ+hZYJvxz+CvTtT2nmRof6Ug4EW9rgp1IophhUmkVL355Y3qmyZoDmKs17VbFfXQbva93196a
Bk0Uuo54cSHkT/+VEqK0YITzX9WjWTfjQrBuN7bdxtemN6ZOoHcXpN7XWFXELTI+0uQ3CTB7+gB8
EzcAe1DyMwjL9gMXfDkNsloKjVakiFzYZW4dd8cUCfjPGBMoenes75UTR5LsNTKKwG5BkQG5wC5D
m1WdEXQGHY5HTsSmEpNfj47qp8rXApZt3DowxCxrbdKaOL47pDm6Btv9aFf5hlbq5TSrO1EE1ZtW
G27O8sfFxFai+91BNJusLwW6aRYsPuEpdPYDDlJaPmWklqh4KEzgDYB7d2TJpTKYsBCr2QUhv+ir
TveFKsSM7iJjF9fHB6yyaeCyJXc4KN6acHSlaF3mZmBHkBvmvhNVJbjGTcGER0J6cFdKP07uafhP
frPKCKSQSFPgvpWzLEKC4P0G3LAOsYyrEgCptB/2T6erdg6RPW5P4ukqKptVWtZdTgGtMQG1dMbT
Gfiomxlc9/2A6Q8QMvM10aRLxthfIci69OIimEpHI1soN6X6GX/+bx84KUbKcniRCNMf4djgsKjd
I5lFZ7BNkfG4QdgCI+PYUVYtOcdnSWiVDqXPHwP5yWBuNWfO5nkEckuEdLQunkb7ULW/r93d95Ji
4kp4j/g+d0ziCcVAIy8NxdaCqP1YxwmchI9jia/GFWSlM1+3fLlkdMCGRKqnMrGPPvgBoknnwgLK
oHLgOj46QlCWX/BvU1koJ89SjKz212yCeX6nnN2ZZIlf1t0/mQCArsLX2VMQsTZwK8bbhctwd49Q
3mdYWgg8hRBRInbENSkHD+peJ8Hko4fL8XHs88V7IctHS8k1vPeCTPHoBRJl9cMTvekAwMQ6+g85
6UG6qq2t71le+XkOqUDcWvJmNyBYK35UC61nnS8q1kcu40ZBCVNEehEr7vvFnixTrM++4fN5kiRL
esbaPq3l7YfOX6l730VWuMJ1AqAfoD95/Scv0xiFZIX9S01ZxF7Mml3xOUbIkzX5yvm6f3uLihsT
p70i/Asl6f++8KtqsXi3zk2ZaM4cDz9yk7183hue1Lszmf6SGj4LgZcBCX94dfCWU9O2E9KoZyOY
HtCaq5dy5AmZrUv5YubUARmJb5/iiNf9wjtFHIf1MYU1zKfkNlCjgv2c6FEobucKR/hM/9irWMUx
Vju5I8AKyVB15LJ/jFxuLSR3jR/OpbQDrpySQAEDoQQ9zPkJHokj5jXl2GU9liyKVFvWxYiw2pUf
/gkJABO5OIwJcqKdFP/3jdKIjpUig7Zk5kIJaU28oI1wd9Df3wWy3dMZ15LvadQz+yKpxVaLgjJf
8342cxO78KyX6fZHB0EEu/mHvzrO/cO8g7zz8O/lmI+b/teuKShORzOh/W8kpR7eo1jmDghKcIjY
xbLi0Q98RAtGNJq8HFrclusLM3crM57LqpenZJDqa3YLJSB0S9FqUBf/4syYHuxW6yNsbeIFQRyZ
ZVf2P+QjIR/pDNVEMZcjIQQT2OJo2EXCDMZsruo2XFYEIdyP91PiCowGy3wy0N2kE+xKyKOOaXfi
OwPxuKv/SZPQH6xFnlBUjEyNMIFzJdWJWoY3HsjAcCaAzmdP20644yUd0by84o3+T4xv9xAJwRT4
2l9F2oBZUx+mwzeRhcPgyKBwLq+F5ATcEYhaHSxcy1WmIMmrzE5KHvda6QAEZDDNaign+71+CLuZ
Yt/rHbbX6bLwwAPxNTCZwdiiRBNlNQcOijZfEeG1SQS2WrkHVrgVL3+zzj1i7h0lftSSS5fdnb1M
AyBeMk+qJO3SbwTkfsevltrTvT+mS7Q/pW2jR/G9f23JE5EAbsVYBlp4urktAkyh8MTPPR0fXvnk
mNHwWKYO4nEPs7bsnpfZREscCXLB3zkSlw0I0twg7QC5Wj7ECkPWBTUsZOLmlhW5auuPERDshGWJ
0m1xut0paAxzncMMVfd+jMsCZoEdJ/GjqY1Oiaqz5FgQupjg6brNMrciNsKYmoXKHVpYkrCyfjDc
ZjYPwdEsS0/UwkWlyEkkZj4U5PHE7Jdo1ahvlWIWF+UybVEsVHAzwQPkPlOIocRb15//5kkU2Spl
KnSpdC9TENtbzoxQPXtxLBF0BGeTJzzlh2rpOFzpFF0IVTxSl4kkXIGYNbehjC7AEQWYdYSn7mbY
TQjY3UWbwmwjXAkYy9VCC0NptWcrqC6eXwZJAXaOsCV62EJd130dMHUQMfVa9jRUsPESfV3dCcB7
i9gPMmVETivxu8bYPDwONDCb6jTK03i6wHlrd8U5kGvUAvo6ewX/0goEweY1T6S+r4z8o8hFr6DJ
Mstu86Bj7H2NbNGwk5s/XwLnxCTODyo+zaonOqXNeXlgv3RcyKtxXJ4J0JfpBwDaQZOWjIbP0FOA
WLKr2Tq0/oE3Xq/pP3Hxh9mk4kynYexfhL0vhnPxYp+cgZs7kxy7mQRQTjAzeg2armOikDJLSCou
24y3EhXZlaz14Wcva4RXio8u4LAJILGjijjXy796U6BlpgXdV49DnhbVE8OpayBxNDHwFxmh31tW
i0qHu0BWBG081aRYsXm/eeYR6S2pgFWqmFO0qxcIQWLfuxmBTVHe4zS0xWzst/T/RdzSCjfLgFRw
NvX9FaqGn4ME4y0AG6SXv7tcyxQbyagvvnbU7UA4MAwV+CqMhYq4t+17Prh+C3qloubk0XZ89xJX
168g6AcxnHrgqQCi49FTE7Y21vEXzPDBx41aKWf8HdnpN9HOi7F5HQ9H0VUg6ZfVTCupnfjnfFbe
0V84AlQ7UHuqtke+84+0elmguTXBnXcc8TgcZZieLFhAAHJ2qMcI1eU8moF/nDAJX7qqhIuz38z7
XI59hr1jkqElXGJlrvDSopqxvEsPjpdzqZQVmNRVk/MM1F4jaof9YbxAOEtUEoGnFvKVlVqMJsQ+
soJJlky511YempkrXlj/iJpib4gbmCRwb2JTt0jjMz+QEvauKbEs89MLfW6I4YmsrvUkCsVhIQ2V
lyeJ6fdGjocG8tNPiRDo4xolv+2wHwV1LLIAjL11G/JpiQYSnoRXjIcCjRRW/1OrL15A8CddaRQK
El7ij4D0uT8KexInDCeG+WynvMWFvByAhTj8rzHTePAnoOMGDPsCbIeZ+M+GxASBnT+7q/UwpUEU
qOCV7UB1LTgCV9rsVGYGdjjozF4D0hEPhg1MvgpbAmdCPo84Vua1nd4twRJxCHrFlxCBODpP0RSS
UFaCHkYGPLOv0caYi6pt0RG1jAkRX2gk2yu5eSwc1JDtBIqKXlzrbq5sUoC1qYvpp4EZqj7n0axX
C11QI5q9BeC1CI71gTaXWHHKDp3AFzmpUp+nHbylF6wiunqroCMRjepmg9fX/SQ+N4CHmURQ3c2x
06m4wYm2A1+CY3ht1MCHkh33RyRAQRoYIL4yte732qHWyYNgBEsGywiNYWOLIUO3JNAH4af1u1/2
XMwYi2kXq5yvONmrg0I8k3btQ7jEgqmaDnVTHh3WElHFZm4dy1EOumLO/nau7VKC0Kd5Ulk96ejb
E79YYCbi9r7+RQktYhivEg3nLwMKzLp8HEXGbDsDb0nihRp3h365zdbuxXxVsViTvFo3rxPVGpf7
OnEP5QB8upWawy3bNaQgffHlr6ESJ/DAP3O3LuzyXuCIRE2pUiz6OssPHu73d6QaNgzjE5t1BbU9
yoRWtGE2tcCn+ECtX05bCxblhDYfLXGOMiwVU5t/Rfn4WUiYeEed5/zq0MwsG08G3hIqyOEqscvs
GHaDQh+ibS1H+EzgE46/1A0kZAV/izaQyb8nPLR26QuOnVfoWESmjyy507zCKLr2sFKiyStTv6Z0
2sgSyUtXJkU70l2l2urWbnnTs6tSdx1zgd9NZpvOnU68iPnuqAes4Rd4KaGRX+NvQD9Y27XVQNBh
KnqC9Ofop+HhoOiXUGpCWwi8ero570IOwnxze8CEypH6dzLr75abhDMo4jA4tMchD/9ASmV26voi
SwMmE3Z3+k6bKTzl1dLENDqRjEicQAr0oJHJG1ughsCOEk5K/qW1UfoXGNmKF6jJXYhSbqQ0uW/3
1/wi+gT4vDByE048dDtErCSWWkhbVEp8fHI5g1Ymyce0Ecg5MchpVcCz+X/Tqg==
`protect end_protected
| apache-2.0 | 23964fb3addec722923bebe3e0f4cbbc | 0.94459 | 1.852714 | false | false | false | false |
jdryg/tis100cpu | alu.vhd | 1 | 1,543 | library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity alu is
generic (WIDTH: integer := 8);
port ( I_a, I_b : in STD_LOGIC_VECTOR (WIDTH-1 downto 0);
I_op : in STD_LOGIC_VECTOR (2 downto 0);
O_isZero : out STD_LOGIC;
O_y : buffer STD_LOGIC_VECTOR (WIDTH-1 downto 0));
end alu;
architecture Behavioral of alu is
begin
process(I_a, I_b, I_op)
variable aluResult : STD_LOGIC_VECTOR (WIDTH-1 downto 0);
variable checkForZero : STD_LOGIC_VECTOR (WIDTH-1 downto 0);
begin
if(I_op = "000") then
-- ADD
aluResult := I_a + I_b;
checkForZero := aluResult;
elsif (I_op = "001") then
-- SUB
aluResult := I_a - I_b;
checkForZero := aluResult;
elsif (I_op = "010") then
-- NOT A + B
aluResult := NOT I_a + I_b;
checkForZero := aluResult;
elsif (I_op = "011") then
-- SLT
aluResult := (0 => I_a(WIDTH-1), others => '0'); -- SLT: implied comparison with 0
checkForZero := I_a; -- isZero is set based on the value of I_a
elsif (I_op = "100") then
-- Inverse SUB
aluResult := I_b - I_a;
checkForZero := aluResult;
else
aluResult := (others => 'X');
checkForZero := (others => 'X');
end if;
-- Outputs
O_y <= aluResult;
if(checkForZero = X"0") then
O_isZero <= '1';
else
O_isZero <= '0';
end if;
end process;
end Behavioral;
| mit | 0acd44095bca479c36956d4194994afa | 0.543746 | 3.276008 | false | false | false | false |
mkotormus/G3_OrchestraConductorDemo | src/ov7670_marker_tracker_use/ov7670_marker_tracker_use.srcs/sources_1/ipshared/xilinx.com/proc_common_v4_0/bb615326/hdl/src/vhdl/ld_arith_reg.vhd | 15 | 15,091 | -------------------------------------------------------------------------------
-- $Id: ld_arith_reg.vhd,v 1.1.4.1 2010/09/14 22:35:46 dougt Exp $
-------------------------------------------------------------------------------
-- Loadable arithmetic register.
-------------------------------------------------------------------------------
--
-- *************************************************************************
-- ** **
-- ** DISCLAIMER OF LIABILITY **
-- ** **
-- ** This text/file contains proprietary, confidential **
-- ** information of Xilinx, Inc., is distributed under **
-- ** license from Xilinx, Inc., and may be used, copied **
-- ** and/or disclosed only pursuant to the terms of a valid **
-- ** license agreement with Xilinx, Inc. Xilinx hereby **
-- ** grants you a license to use this text/file solely for **
-- ** design, simulation, implementation and creation of **
-- ** design files limited to Xilinx devices or technologies. **
-- ** Use with non-Xilinx devices or technologies is expressly **
-- ** prohibited and immediately terminates your license unless **
-- ** covered by a separate agreement. **
-- ** **
-- ** Xilinx is providing this design, code, or information **
-- ** "as-is" solely for use in developing programs and **
-- ** solutions for Xilinx devices, with no obligation on the **
-- ** part of Xilinx to provide support. By providing this design, **
-- ** code, or information as one possible implementation of **
-- ** this feature, application or standard, Xilinx is making no **
-- ** representation that this implementation is free from any **
-- ** claims of infringement. You are responsible for obtaining **
-- ** any rights you may require for your implementation. **
-- ** Xilinx expressly disclaims any warranty whatsoever with **
-- ** respect to the adequacy of the implementation, including **
-- ** but not limited to any warranties or representations that this **
-- ** implementation is free from claims of infringement, implied **
-- ** warranties of merchantability or fitness for a particular **
-- ** purpose. **
-- ** **
-- ** Xilinx products are not intended for use in life support **
-- ** appliances, devices, or systems. Use in such applications is **
-- ** expressly prohibited. **
-- ** **
-- ** Any modifications that are made to the Source Code are **
-- ** done at the users sole risk and will be unsupported. **
-- ** The Xilinx Support Hotline does not have access to source **
-- ** code and therefore cannot answer specific questions related **
-- ** to source HDL. The Xilinx Hotline support of original source **
-- ** code IP shall only address issues and questions related **
-- ** to the standard Netlist version of the core (and thus **
-- ** indirectly, the original core source). **
-- ** **
-- ** Copyright (c) 2001-2010 Xilinx, Inc. All rights reserved. **
-- ** **
-- ** This copyright and support notice must be retained as part **
-- ** of this text at all times. **
-- ** **
-- *************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: ld_arith_reg.vhd
-- Version:
--------------------------------------------------------------------------------
-- Description: A register that can be loaded and added to or subtracted from
-- (but not both). The width of the register is specified
-- with a generic. The load value and the arith
-- value, i.e. the value to be added (subtracted), may be of
-- lesser width than the register and may be
-- offset from the LSB position. (Uncovered positions
-- load or add (subtract) zero.) The register can be
-- reset, via the RST signal, to a freely selectable value.
-- The register is defined in terms of big-endian bit ordering.
--
-------------------------------------------------------------------------------
-- Structure:
--
-- ld_arith_reg.vhd
-------------------------------------------------------------------------------
-- Author: FO
--
-- History:
--
-- FO 08/01 -- First version
--
-- FO 11/14/01 -- Cosmetic improvements
--
-- FO 02/22/02 -- Switched from MUXCY_L primitive to MUXCY.
--
-- DET 1/17/2008 v4_0
-- ~~~~~~
-- - Incorporated new disclaimer header
-- ^^^^^^
--
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_com"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
entity ld_arith_reg is
generic (
------------------------------------------------------------------------
-- True if the arithmetic operation is add, false if subtract.
C_ADD_SUB_NOT : boolean := false;
------------------------------------------------------------------------
-- Width of the register.
C_REG_WIDTH : natural := 8;
------------------------------------------------------------------------
-- Reset value. (No default, must be specified in the instantiation.)
C_RESET_VALUE : std_logic_vector;
------------------------------------------------------------------------
-- Width of the load data.
C_LD_WIDTH : natural := 8;
------------------------------------------------------------------------
-- Offset from the LSB (toward more significant) of the load data.
C_LD_OFFSET : natural := 0;
------------------------------------------------------------------------
-- Width of the arithmetic data.
C_AD_WIDTH : natural := 8;
------------------------------------------------------------------------
-- Offset from the LSB of the arithmetic data.
C_AD_OFFSET : natural := 0
------------------------------------------------------------------------
-- Dependencies: (1) C_LD_WIDTH + C_LD_OFFSET <= C_REG_WIDTH
-- (2) C_AD_WIDTH + C_AD_OFFSET <= C_REG_WIDTH
------------------------------------------------------------------------
);
port (
CK : in std_logic;
RST : in std_logic; -- Reset to C_RESET_VALUE. (Overrides OP,LOAD)
Q : out std_logic_vector(0 to C_REG_WIDTH-1);
LD : in std_logic_vector(0 to C_LD_WIDTH-1); -- Load data.
AD : in std_logic_vector(0 to C_AD_WIDTH-1); -- Arith data.
LOAD : in std_logic; -- Enable for the load op, Q <= LD.
OP : in std_logic -- Enable for the arith op, Q <= Q + AD.
-- (Q <= Q - AD if C_ADD_SUB_NOT = false.)
-- (Overrrides LOAD.)
);
end ld_arith_reg;
library unisim;
use unisim.all;
library ieee;
use ieee.numeric_std.all;
architecture imp of ld_arith_reg is
component MULT_AND
port(
LO : out std_ulogic;
I1 : in std_ulogic;
I0 : in std_ulogic);
end component;
component MUXCY is
port (
DI : in std_logic;
CI : in std_logic;
S : in std_logic;
O : out std_logic);
end component MUXCY;
component XORCY is
port (
LI : in std_logic;
CI : in std_logic;
O : out std_logic);
end component XORCY;
component FDRE is
port (
Q : out std_logic;
C : in std_logic;
CE : in std_logic;
D : in std_logic;
R : in std_logic
);
end component FDRE;
component FDSE is
port (
Q : out std_logic;
C : in std_logic;
CE : in std_logic;
D : in std_logic;
S : in std_logic
);
end component FDSE;
signal q_i,
q_i_ns,
xorcy_out,
gen_cry_kill_n : std_logic_vector(0 to C_REG_WIDTH-1);
signal cry : std_logic_vector(0 to C_REG_WIDTH);
begin
-- synthesis translate_off
assert C_LD_WIDTH + C_LD_OFFSET <= C_REG_WIDTH
report "ld_arith_reg, constraint does not hold: " &
"C_LD_WIDTH + C_LD_OFFSET <= C_REG_WIDTH"
severity error;
assert C_AD_WIDTH + C_AD_OFFSET <= C_REG_WIDTH
report "ld_arith_reg, constraint does not hold: " &
"C_AD_WIDTH + C_AD_OFFSET <= C_REG_WIDTH"
severity error;
-- synthesis translate_on
Q <= q_i;
cry(C_REG_WIDTH) <= '0' when C_ADD_SUB_NOT else OP;
PERBIT_GEN: for j in C_REG_WIDTH-1 downto 0 generate
signal load_bit, arith_bit, CE : std_logic;
begin
------------------------------------------------------------------------
-- Assign to load_bit either zero or the bit from input port LD.
------------------------------------------------------------------------
D_ZERO_GEN: if j > C_REG_WIDTH - 1 - C_LD_OFFSET
or j < C_REG_WIDTH - C_LD_WIDTH - C_LD_OFFSET generate
load_bit <= '0';
end generate;
D_NON_ZERO_GEN: if j <= C_REG_WIDTH - 1 - C_LD_OFFSET
and j >= C_REG_WIDTH - C_LD_OFFSET - C_LD_WIDTH
generate
load_bit <= LD(j - (C_REG_WIDTH - C_LD_WIDTH - C_LD_OFFSET));
end generate;
------------------------------------------------------------------------
-- Assign to arith_bit either zero or the bit from input port AD.
------------------------------------------------------------------------
AD_ZERO_GEN: if j > C_REG_WIDTH - 1 - C_AD_OFFSET
or j < C_REG_WIDTH - C_AD_WIDTH - C_AD_OFFSET
generate
arith_bit <= '0';
end generate;
AD_NON_ZERO_GEN: if j <= C_REG_WIDTH - 1 - C_AD_OFFSET
and j >= C_REG_WIDTH - C_AD_OFFSET - C_AD_WIDTH
generate
arith_bit <= AD(j - (C_REG_WIDTH - C_AD_WIDTH - C_AD_OFFSET));
end generate;
------------------------------------------------------------------------
-- LUT output generation.
-- Adder case
------------------------------------------------------------------------
Q_I_GEN_ADD: if C_ADD_SUB_NOT generate
q_i_ns(j) <= q_i(j) xor arith_bit when OP = '1' else load_bit;
end generate;
------------------------------------------------------------------------
-- Subtractor case
------------------------------------------------------------------------
Q_I_GEN_SUB: if not C_ADD_SUB_NOT generate
q_i_ns(j) <= q_i(j) xnor arith_bit when OP = '1' else load_bit;
end generate;
------------------------------------------------------------------------
-- Kill carries (borrows) for loads but
-- generate or kill carries (borrows) for add (sub).
------------------------------------------------------------------------
MULT_AND_i1: MULT_AND
port map (
LO => gen_cry_kill_n(j),
I1 => OP,
I0 => Q_i(j)
);
------------------------------------------------------------------------
-- Propagate the carry (borrow) out.
------------------------------------------------------------------------
MUXCY_i1: MUXCY
port map (
DI => gen_cry_kill_n(j),
CI => cry(j+1),
S => q_i_ns(j),
O => cry(j)
);
------------------------------------------------------------------------
-- Apply the effect of carry (borrow) in.
------------------------------------------------------------------------
XORCY_i1: XORCY
port map (
LI => q_i_ns(j),
CI => cry(j+1),
O => xorcy_out(j)
);
CE <= LOAD or OP;
------------------------------------------------------------------------
-- Generate either a resettable or setable FF for bit j, depending
-- on C_RESET_VALUE at bit j.
------------------------------------------------------------------------
FF_RST0_GEN: if C_RESET_VALUE(j) = '0' generate
FDRE_i1: FDRE
port map (
Q => q_i(j),
C => CK,
CE => CE,
D => xorcy_out(j),
R => RST
);
end generate;
FF_RST1_GEN: if C_RESET_VALUE(j) = '1' generate
FDSE_i1: FDSE
port map (
Q => q_i(j),
C => CK,
CE => CE,
D => xorcy_out(j),
S => RST
);
end generate;
end generate;
end imp;
| apache-2.0 | f219c23964d20ca4d2fa876d46a34e89 | 0.380889 | 4.978885 | false | false | false | false |
mkotormus/G3_OrchestraConductorDemo | src/ov7670_marker_tracker_use/ov7670_marker_tracker_use.srcs/sources_1/ipshared/xilinx.com/microblaze_v9_3/7b6e2d75/hdl/vhdl/fpu_mul.vhd | 1 | 65,724 | `protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2014"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
CiZKVZHM84F8NTEA9YhLGHpcWfei2BuxQI0JBcHvmJVawt5EeKGSYZyaopYeZmT+ui0TEp2Q5RqM
Am8TNH/2Hw==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
aAFGBdyBJJ24tHYHVWueV10xrz0B5Ux3rD/7bicotUQI0JoGSTuaPqLOByXFcuCaA6Vpp2jfoCJs
43g/HcrFL4VovcXvIZGsnrxXOJS5xYKM1Z8ht4L0X4LBJQhpS2/62AdtPaZT4J7S7WhD1FBEwSRu
GFwi7ItrpRc2Ltso+UU=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2014_03", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
pmYd0gzNdoG03LsXfOTgeN6BKF5gEK20c+Rs5hqhPI4AecgTMwS1oCYMUJLuR03PrU6ytQ6brxU3
aZHat5NnSQZet5FmAxkLbxufzJZKDMxBkiHZQ+G3WFt3odgL0Y+yb7BETzQ8xQK06bgrUHMZx+H0
SBJfD7o+niZwEpN/f/W/nhHiEffyTgHVxkAJna+ojOK/0C4dq1qJTUXlV4+gZYWAg9ynd58sD65t
ocFShMmop7ZNmNqkgm59bHP10en8wOmlBd8QNnU/pGp3/IQw1DHEYPQj9dLDqmaTfNjaUeBv0c4D
ZHI6eT9wuDGKwOMuoEM+2FpBHIuQHWyNl9QEgQ==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
qUjQYZYAV7E6h69ns3V6UjO2XYTSs141iVlAdyhsP9vE7SIJvGDoFINSaeon0jxdFfiwlILzVsZB
OAd1W7xvf7SXdoB1O4tTHzuiReiLWgNXPE23gIkeYgyWa8nwQdowEO7Rr3B5KFhJ0bU1lCS9nMqv
OOqvv9NtopHuPAd126M=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
JbDCpvY8F1qrTwfHBXLaWtnZ2KxuUQP91ipNSLLpqxjRr/i3pjMdS5X4rH9DZSDYGqg5+otD0hhb
qWWiuBz/wR1cRycu38U4WgHjONEFVKigRAemooSjZjNbcOHMevniUx756CBlMGv8FGoZXohHxoRZ
BlzSE0OQ96ts7jJN3z28Mb5uxG6jd40uWez4NOQJW+GkqsQi3LBiiS9IiHgMM0TjHakBJE/cSWC5
3ie5bqM/p/X3vI+tgfoymaxn2GhxMUiXW5njWAUu92Be99sCisxzQV4N2JW8Wj7HOhUy+Gpi9b7p
tABRKGq1AUQIxqMPL+bUTnNP8Q9TpITIvOeJGQ==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 46912)
`protect data_block
+jauddyyjLoY+iAfIX+JE00g1xcRQveed92h2fIzypHzYinWGaJvxbOmjQuHBvgGyEInkK5M9HXV
nsf91cpbYsKyVUHOLB8HitT+48d/DIIVpkqRFWA086ZkWpzyreIdpfar7z1X0V0mkxglH+wqOE4V
lZiE223U30I+Ia7kddTiAfoFVXlYWyV9kZDLH7Zc5bvTAP33HOEfPocrsuUjfaC0syc0WpclnjhR
Vi90gLr0kOETYr/hri7ku/GaEx2+NQ6VsFBF30rY9fDjfXa+F3mjnxPVxW9whH+gx3nb8YllrUAW
MBMxC125tKTyFtfma1PuPy0M49W9ocT5mumAKpXczGX2bXdOpZzYVU6TZvB2W/1UgDSZwr5DVBb5
VUSUWv0foYRr5WuCYNVO6GVI5eB2rQ0q+GQK71eEcm08xkIqFpQ/v7GmWeaSottoVYpa3VlLqbXH
0j/y4HNFw0LRu1Wn0iO9jPqvvwDUrMRVLWAakeuWD1Z3l6Ra+SSJe85xKH9r7/ERIokIC4/2df6s
z07JW5B8OTGmB1TPQ8fp2llaLCR2fj6uPhwjvp8UXqumr0nzNL91+NaWpnbM29Tdv8qtB9b0CshD
m9O/U+gThxqxnmQ0upryDJmNEUR7SH00e9B7K/wMrVKAnagrlqEd++8vr/Y/MBc1eX0542iknn62
AtHAj3MBDJCNyvrgO3ZRM0UMWSENn2BzOZeoW01oh1ql+9Km6MmuEG4gFSTfwW7LzRq30ALPJnZt
UDWqsKVuS88xy1rSbryPg40thB/ha9pCl00VxRF8IAl7Yfet5lkrawyoB+f6rtcRzXNaiv3p3Cwn
mwY573ZVDWEx1SRihXCR2sxMoC+i3467KgaRV82J5YNzEbAQOMVfp3pz/PvtARYlHCzd4o2KZZ18
Ur/+jNORMJx9nHoNdlnsZKoIoZjGnGjiYYGFi4l/T8koqQ1QdrFJx+HEg1xFLoR5wRsIvpiwt6be
bLWn1S9Gm0NNfJxkN4cr7y5EheVnsxHoYvb7fqUZ7jq23yUUIazoWVMsHjbqQrIIWsuHi39VK5ON
qsd4dQP87mrY9UHMqvM0YbUPPHJWdhgDJ3kiTu2xBUiZu45+V5PLF02i1kMIZDHPvziprAUzTUZA
t2/F8VHGI1vFiVOB2AWlu70BnquQifs5rE74FJHGRlPfVHpB7yAMcYaFthmQVCltIT0UVDoZOceo
cFEhPzNg7UQMBJMvDNWi6jHS76Wj2pRJJBYciusD9ul4nJDTTZLV2Pj86olWo8p2/K21Z7PwXDzm
HGjVUGPK5756vggqv1COL81DdHhXTWm9tWEacm4j3xWabzmgnKWfp/MshLued/ilp1AbE/H8Y4nw
l7WrqAa6uwB1Uzkuxdbw3w3QyLFcwWrRtoPZ9sAWZ0Zf3rY3SsgnPuLCuc65hph0DwgTEe+u+Xwf
mr49tRtN4XL+KidHPh3is3T6WsPcznF5GHLeP4SPfMWlclTB/rY30/xG8cNzNyCqHFtdHh/LnsP0
SdT6FCsGu2M/iXJu7kYiIvkYHT5etEah6uhrnqQtBvzT01VCy0MhgNxLpEo4b9f+E/mLR1JYRxwn
lQh0i8RgeV91ZMj4uLlog1VFkMynymPhljM/rZrr7z3HvL0K7qz4jHKTyp+RHTor4biRh9M7IKJd
DTPIFe1HZyTy8GvGhvDcCt+nAm+GSxw4Srim1DHwIqXUPM/VG8pQaq7Y1tbH5/w2WRSDRBuQeoyU
02MkcU71EpBS1U+deU6yWLqmKlEORkp9VFzTFDassL+OS3ZaJ5rVi25Sahr2gIVItMQUhRavivyf
SD69Nou43DkeAabOi4+xnCoDZ/HPeKEROy4637KTsMDnugP4C5cNsxvCMMmPTZJOCPqwwl1B9udH
XaOHGWoTvu+u3SCATRtp+uOd4gEbTb+BxovrlJA5x1K6B9kia44ZcPYaTEv8ji+tGdYdAS7QmlLF
X9Hl6okDhMDbxumOhy7Q9Nc938/3enIh6ozVnX+CbHjRaOkKE0GgD76DN0oOW0XWh7lY61QncOd5
pvcuaid9lZiQAm+OAa1VYtKO6ByNMYVf7qv6+h+WuxKaVAbTqbNbhXkMUtlZHijdPDqfiWIxKhKb
Qv37F55lKAsXFxEaGyCMN4HrhwB6blqyaAJ/MkB2TeBnkhEGsIkB4XgyG0S1BOe4ESaUpinz/f6I
4KTIsTBXPv2oE8zY9IBbI+vpl4kNkazZa2LvmO1rM9/qiXNPo1AKyi2Zu6YqiDwM6wUoNVzY3B5b
6u5XowDGViXVVIh1YuesyHFA6L8KkSYtFiSCbTNzHwr6M3qzA34oUexFY1/8IZMEqOrKxxbEw28+
mF3bJjxn6aStUp+XVIiUGrOLuhTI2wRtCMmGz1AmQneqHr25sJZZMq7F/5Gu9AGh5I4GJx2TE/DZ
75NF6NfOFUV/XkNwCNfJXs9w1dwPjQKyHYOolERgCCo0mABiYDqh2ar2kiFdwpXD8Dw/fraq8nmP
4uUDojg1ER11wjumpLF8T/SQ+S9IMgkzM38ZtcfXzad9O/TAUtxEiSCZ9aQRVpi60+xu5Cq/O8r1
wQ4ZlgL6nrtDPg+wUWmZ0jf4hU+IYWzVZTL+5Kr0C1Q+gC4mlGEUpCuFQirqW2rMFw3t6IBBMC8V
eBW0XPHKy7VAuRdYD9DLI0kgwdXnfP4YrDLHz2tIJ1Hk30ka4jse7ZZH7I6QXesBoPLUjl+BgcK4
Bd3z8AA6gG0TyPXg/EEP6Oc8JEuvQd/FLzpWUPVL+VVu7tHSf273YVS7fEItitCUgKO23IDh/Wtm
EW+O1Ke/EQTR6o471OcV4XsTvQSnn41/qttQRR0+41xuInXKqWFwOZNzoYOrwTBLu+SQoQHJl3a/
Fvn5GnwSeDBme+WC5fQ7fKmb23tI+TzaByfkhCHrqZCMNkDDdBXpCtfcfb2kH191meajcw3jLzbm
ZQlEQA5v1EnV0kYoUq9wigUjFrnadqDRNE3dDmaYdy0XDN8B02FtQ4kZ1RsAuwnCFRHKMrCbbKGL
oGnUkvbEaYLuLPHGlBZ0uV6hJgNZqZ7g6kVo5uve/mpX55TiWfTPXuOD+Pm6PLO+K0tO8ROGzvlW
TCHGr9noWJ1jydGbeXxJpw+E+132fbxaMlx30yD31ThbkdK6jyIVodV5rVSWqKjDQQ/PzLSa5KGz
bGbZSiHTCUZh2kaiqOTtnQkY5XYU1VjI4ezTeeu4YnO1GiOwmrG5PjU3C+nBG9QSt1F8ceCm43xe
rQ9vumSpPy8QGtpqRWlJkEVoK6GrdC5BEud+P8s/Bv71yjdRFIUkEsDEtzJ5Gq30Wv6HZL8MTHo1
lsEhfZwySXzIXjwPw/jphiDLOscBD3j+Wls9FbwWHuV66WiH5fdxFc0R14YRjsbYCtJA3rgMP9aH
Ae4LtFAeBKtRUuDGty7+2hQqJfBfnJMPLA1KO8C8wB37l5US8R73Baq4pve/EojP0UZPRklEm8pm
utM+mPPPXjkhst7OQRFdfai5YwCbceAZ8nw21TA9n0zYwloElyilalpi5m0iCXSbiZFcBuhjhyoU
LTY9zGH9TUBoQ5alQcMpM/qoqKyCixWM2kpCreRi3qAB+SOKnaRbY072Ko9g9/zHHS1OfQRB80Zv
zDmNC7wl9ev7YUsysA0Vl9HHu12RZ+KmqRh4S26M769UA1DozEyuER7TzfRwktIqonUAWEYcVnkA
FvyOMwm0pq0KsNRfzTDOxiVOYsnkCRECzYXkjyX9350fny6R6ukUqFnqPWwNLPNJGjWrRFs5TiQw
54vxPxKnmyzEybv2pLcjadCnrLDjcFcAaH+VJFXukBwb76R/SLCiq/i4FTzJ232TbuU7jDijK0/w
otrUvZ+p+jQ7zL8lNCTqLYslfG/n64oCHW0EHqBgsLpfy/wkMUq5GN62OaMad4Xs8JA2JvLuvxsU
BhnfnaFhEi8M/gtIg3nfzegG3tNj3A/tRYLQOajc9l5DIHEA7VGe/ZM7AsJe7EzL4U8RrUoZaJVi
MipNMbs6lNd0iFd/o2TWrat6VBo0e/D3KNRUS6TR8HTQ1mIID/+mjEZkICln+YG4C5g4gmd0IPgP
vKOrbv35yGrn0ydHpT8j05nkuioXzDFl8WuqLmQdHRmJ+lAETfHJFPf6YMzUSxE6aSJ0U4yzFnfD
3Xn7w1BTH0h4lfrv1VRmVpFFmS3B4SH006EyjMXvXi8w1+LYtVfYLDeXuETCeIxC45/SWAWnps6C
93WFNgWqPEqE6KYxSV2eXu9XcWpeYeWGtFzLVVachBEOt0K/CuPKcJ0ffrp8exaBhTcjksW8+/aV
DJpuFJuXDQ75RvBVAv6Y2kEGupjoliwmIJIChoLJy2A6C4tUa9itD6o0sOHABIf2mu+3O8HIdBG/
LHdPIoRjDwoidXy0VHgc0DZpumKst07R1VZaJmir1q1OmbGpXTZXteqSPaw6hNr9TkFCR8qnpG2W
/vRWzKOzTCYCF6Wymxsm5YV+Kvqr+UFhTUr8VtMA20oY5nqN8Lj//eDQOrI7RJ/xJUxeDFFQV0nf
uMt/VmG4FBWDRfCndMbQWdFccKxtwlv2xvO06NvY+HPpMskH41jSEg7sOjAwGhVuwQnLauk3EX6U
T5wXJ6oI+qm+poquPHu/CjtEd/M4JyVODezTJ7Fyl2bkbYKyhu+ml1PY05ORcIRkkeGLUMmAo7hU
MyMdwYl+CnTf0SRZCvtdVLrAwAJnPa79ut+59MGeWHOosnFAXvmCdxZyRWnpvSpY61jNyhKj8WY/
rL/uLBTE9n3fozWPBEeYjqIFO3q5n5g01y6DctyjvfwR4+h449zFSDXTUgVEesHPLLnHJYne+/Xn
Luhe8xOlT+6oCx3+Al2BnlINzWgvcDAq7KDmuLVeNYnFOQ0lFDWvXAn+zhVTIJNX7QDboOYhYCug
8TEqE8fp3gTlBTXfW3eAtKIFiYI0gh1UhcvCM6T+5HwU+oAygvRl25ekJLErImmOq9ttpcjYY11F
l/Dg3vCtq2alRULViQY0V2PpHxpbkuUwpk8DguJJBKNv3RtyQQL7r6DLvqM9PNqpaCaAnu/2dpaD
WOAvLWw5CJwcE7jpaU3fM4aROR2Rw35LiK3SbsJqQNSrJ6doszLrWDFgOaSaJCdkgORto8mOQuAB
0t9glf4wZKYs0/xEdb5TcvKczKhP1y5cycQbDQfqBut7DJvIcuLD0irSYtmucG5570HHNfXAGjvp
vWuHsYWz12UfUvkTxkzHoRfqDvhUa9zB7gTFyCdV3YEvrvvvZs2Pydm/U2ypZ6GOV396C8j7elX3
qoXY6eS48SSiBLeDSsc5e1HpSdZL4XaQKSt5ifLJAeKg3sFv/sqC79D4BFl8OSgiuefXe+sVNEjM
mCoBfpBPdKRe5iPHoaZlfVVNLCf47QpchKdQ9Vpm4bQiGj8K4PjfFJJpXDWbrHXGG4LVgSzorW/8
PF25d4QRP8QLnuZAFfyQjJL9IbydjS/JVhv10UhCpmb3liLWCz7LXTz2Es9R5t+YsoFkNLpdtyEz
3Zy35jRUYyoDMgwvxjaqqkPfbf848ahvoPJm5nULmn2W0dmVg4tuN2mGHEhbNq6ZAQQlopvTPHfK
/01SBWGya3r14O+ygR9Bv++p/mQM49YJ0EwiMz2edqMemcwhDLrcZ06tsehqqMOmeG9mlA/d3NI+
ziHiMEAacK0nJzAqS9qIsMbnr5U2dSFX9VjXqHHCvf4ZgNWGFTh4eClPSzwwhSwYGMWt6yjMxSEf
mVb1LZzKzzd5VZTuJ52jK4u4apzY0j7xb3dP8R4yt0MqQy+9/X7maeAGBLfUz/pd9uZbssbNIuIj
BjWwWv1lWYJfCYwANdJcV7VyiCQ+AA8irXC5qSTGCZy89/2eIQ0VBbfP8bkRndHEMJcj3UilgH7t
/2rbSj4H7pQ0we8/LpELAJtsIbT4euo8uIz3aDSyxD1D62JAXYpAnw1GBL9P0DK1qXLZMI4dBoBT
rXP606kksUb7GsHzvgo8jBahQKM6b2djRD2qObUzImznazcXQxW6tnHyACJcKRUK1IaP7Zq3Fo87
mlK63MCzoLCjXb00ZO1rfoo0ifHeJIAsVbShFSfVYoEgV++x4YW2VD3kDRmlQbsjCZcNWIDOHWpt
kgvAJgqM0Rd+WPbwM6dKaGLth5jifHTOXHoElbZ5PKFwamRnGaaeBdvN1JeC0rvqXm+VpH3V87lG
YAt4FY64LENSqMKv2pH4LbBREX6lygU4+0k8Id2evB6OsftaTEU5U/Sb6Km2Q9KWUNFmUX8jrngp
7pdjXFZvQnntfMuy+SvW573tfFTtqDUEKbnq9CbcnFgD54kZ5P+dJeL7jugy6wi2ZQRKltsh9Der
IPY+97u4ZVArMczgkS4B6l7NpSANHmfDWnZADKZHNWjhK5U6A3wC2p2yOYHqaWRN4Y9mdXln9wzw
OQQwoimSLCYe0LJllZ+b0p9rrRbLAv3xWbY49Lm70xGlMpZ9CLiETz+k0v3o2BwaTlukTCCQlzKs
WQzIAhXR8EDrh1GzW1RMXH/KOPhFFbIbSD0actMM0+RLKfguVZqB+xLZo858EcNXcpGA/MH5QdVN
lSVGHxbeLdN/xG2y30dPIDr6cZe3vsGBHOfUUlX3hIojZVzYKgwy77oaloQXIOWOSoeT3g0ALGcs
MQtgm/gf8XghvJR7/iJbmb6S2FhjY4DCaty5KTpetTOkg2f3doqta5147Rq+81HyFWI/r2xhmbaS
pXAq4iDNQ0jJAiNbDTNEoLFYXiYu2gL680eKQfIJNn5BrW/tVMMUY5ZOH9COaGdlLyqzzRTFjiH9
KbYNlSFCr6d8KUzyZiJuugdm1P9BDyFBEFWH0BGM8JOwsVdY6jrAHY2e6jnrg2+PZNoeRMQ/IqyY
c4Ar6Ih/whxzpfgJAcMZCtiG8JWOij5S1z85eCWI/kWM5Sfq9B0ZiX6kPUEVAGyUz1VCtrCHnOJb
KosXwwhbaOKYvnt4h/h8yzH2VZ3tvysoHx6G6ZGWylt1R3+g19jLmfKvW6cgljxHQU4cKzk9vsIR
LvUmIr34KjOpPQZys0b96mmL7oAiAoRtqRycfyzp3l6urti8N1S9DNQUeUvRlCX912FJ/Ei9UMYu
bpZwMlLUa0RuD74dJVVBzmKLOpXMGx8rf7/TMrvWrHzhT0n1OOH9cTZ4Di+NqNQyoVSvwyaoLYAi
8LQ9q8IDpPDXlUHxyIhO4Q2utTOeKMVLgywm4fz3Q2SF4bmL4J4GYY7ea3L8H6h55q5bV2T165o4
vsC5IsDCUtBKMXielHPXNT8/M30Bq+lt0OZlOqiDKCdIYodn0QkY0mjbm2KAzHdrcbGEUDnP9vZa
yOCFgBoVM01YjAQfF/S/413HXeFZTMEk0Pe3oLIsHeiEaX0iY8GiM938Q+NK/bDXFLZF43n/hCnS
Cl0Y7WPt9/hhMzaXWy+oX4EPynFA7ej2xBJUyAR1iTRWaPhHY9MYRIduq1lLNi4Jx1RgbhNh/3Xt
J3tn+OQQIdXBZo9LSmbU04wSeDt6TPr0v9b2yiX81VHX7rJsztGAZeBlFDtE2d3JBh9sbPJdZra0
9LPBJHvgs5PDKGYN6iSd07EFYfuHEYHj4IjlM1FGJxlMPIG7kaErfNBbmm1NSPE4Hn4dr/PwKbwl
lMZQh9/I8bTZ3v9JL9SXYf/JlS3ArGvvhvLzxcQN9c1ER7NefLDY6/NYQ6QgrSutu6UJJrpTQ7Zi
qCAmVzQTphPqejiyZzXIi8Xm5pq5kC8tCEXhj3gPKi9YEp7QRE/yVhUvsU3NZSFCrKxDfiRimugp
CCwtbix6xKTpE3tCP3pgyZeLZ3U3vtrFdbKPqiUnHvxkCrUcTrFvx8aysGPwBNgd9qnC3Up5rIwh
Bm6e9XovEboLVNtZaGnSKgEiNauS9FvqHUF+A2FlM5k9/PJc71GxDfFpPWyY2PVMw5zQZcNW7/6L
9MWUcpFIpz+lvk38V/Fiqi0IFU/epvTJvxc7LfCflbu6k0bH289suKA0xdk7d+KOLh7Id6BKHHdU
Y3UcFFogl3e1YF08ColgiZ1SbO/xejgLiJBtjnT1vaqUv2pY03/LFLdyCRDAeLHlM7j8kQnsSIuw
CuzXg8CCcY9LH/xO7OlxK8mO7lDonW2+QlytJPgvpDBAVQUubmHzmkU9p7og0TNWzdlDb561Tsk/
xy8sHc82tc7KyzYaz699MIoBtZd6wfz4FTSIjFm1ZMCBlPJQMpgOcQhUuQuwNY2+tph5KuVA13q6
rNinwoJ00aaCW30jdjwnhXonzfjgn6gsxV47PlW6CB4h2dpu10FcodpmUHrvtN17RcsuLrtlnqSv
DROoubZ2QqEvlFYEt3YKVj29xG/GAN8Ffz0iDjRn8SQ2UE0WDckEO1VR7TegH7XbUFl2kUj4p/Pz
aPmpElkhUU8xrXn8MDky7cU9EHFXRGHXHwGIAldDzr8pYpORGvkkqKLOC60eBgqNRNZ3R/4ijwqq
5CJmfBQgofIIQp2pdbBm2WsN4LLypD1ksDfe6TeTVSYOhEOHsHRgiDqtI//tOpcEVE8rLjW57fXQ
bWkH6FtQPmBfMFIpA3evgWHE7Aa5xjSaeLn6XqEq35Tt2UgU4wuQ3evEc+42nYolNipn3X4BVpzM
30mko+fB2QhfyeUrghUCBX0wkYavOHBaQ92004XdWHTI5bg8fjktY18V8d7Vy6maFH8ckXvN1Rkf
B8TXaQX3YKk7BTQDP4hFqjWiX7rfiG33CMaBXmjLoelvuPDpfwIJ2ucMJFvHMx9KuNUmUybBad0g
+nVnszkczZrKlBOvmjhQMCFVU+vj/QmlXTGNWSiz89T0XEMlqkM6H6VHo+kn4v6xCe3PfzsvTo+8
V2czeNO1SUlfG8rDVPdvkIpxWBOydrBRLDc63LbFWLL7SJouMW6vdko5ZKriCEjaH/01UoAe23d/
oBJtza3LAuMZ99euLq9s0UaiiHpqS8Qw50/gdfgGbJQWlBre5YYzQSWltrwV3X5xQvO9ntmUvD8Z
464vxXMV75M31rpvMzL0fMjaWAPyzHWhoOQ6P6l0phqM/RZGnWjOzTdTs1geHXFBmmSRB+4TUnqP
uf2hV+l3q044D28ZHhmHVrs5b1FWva7Dtx/rJbs0pUgM6Q7mt67yM3PLfGBQmtcAs0eECaREX1VV
O8ayiHEyyuEnR/MKWuD15O0KuG8cb63GAD1AGKhJQKsxdoqdPnEfgPVB7H8wo5fJ2m2Gk8LoXGi1
B/sEE+NV+AjLaWqXXH8lchz4ubos6WCnd14JJ8NLmGCNtHbtuI4hcOQkLc0JvfOzL9qXedXTQ2yg
TGzhfFKKOEjY1FqRboF3t1I9rH3+1U4vbl1h4dRQ7qj9tTWAW5siCbZ4MX9RAryLAF1pP9QDEDxI
BWezCj8+i9X1mVsopPy/EmKNSRhjYvdCSrxtQtA83p8ldxVag9huIcvum8ByNyPc0uhC6z7zA5zH
L3J+GnyUjCdOcRCA4f25eS5RUbvm/3s9+PUIh4LSGm7bdBHUaZk8Rgjd0aa04c5x4WOqH29wgAn/
Jz6ifuoprwsDhiYu1TV9siXw6C0CkzYfMzXBi/8DF26fPgyg4v8+Er4kXiF3faNLs3+Yt2YrKt81
3/HHCLtFkjohILKtEiuJJmssWcIhplsHyHiX2tvWJzMqwUrhHhlRiZeLou7pQ1tp43GDsRxndi8c
R+bthgTRQWcCSoIhKvBPdPP1KzoaY0tv/0R3dN0QeV5Hbu9rU0TgYm72Rwcz0MWROOMBbJGZg4ZO
kFuigvj/rmvfbMrF6xEVmY1M7ZdDXKmSJR4pTu/VCTJDk9smttlcuzo96cVCi7nIxh8ROmCwPaFg
oHa+BvcVU2aDRD9ersqfYHVdc5Ah4l6hlrT9d5AiY31CQyJAuDGCYr5kBb8RSDoKpZgUlACtS/rl
drnS4k1JlqZYM6L88xzj2vHpChYB1LtaFACrzaXvA7GEC9FAW46x0pm9rAXsTrf7vHysBrXxrQ1K
eKhIPcw0l4+C09S+k+lc6PQyiP3E+SxNo0fxp9xOW/1GfbqAOqBHDVIE7BHsgYZSnYksfLGmyITA
br+jAMK8XceGZIYmMeklCrbL+LucCfbe4bgngc7IR7CVHnOXhLNl17odl80EqwIT8SpWNvSrrUwy
8O3tmu7hnKMHFWHGdhGUSip/gHpSadOAmo3fo0u2nRpnmGzQJ5PIUgoEmbtZ4LlydqU4vGZtL0Yh
Okwp+ADhRWekn8rP8E2mQMF79waWt8Ig3lCpqUyGgp/84YDgdWuFzFx1c3mDe2bpKB+v5lRadEd9
NBs/QBbSIRwHuS2gLWyMdcKgsSYFvZNU4f+fDEin/IZAj7kw6PhWHV9yMItk8ntFX5Dw3LfR7xhP
Ko+Ivmw0Gc6O4EeVzu6e9mdA1tRXouHJXmOnXk6zcii0kp9xOxbBtwx+3DhzuNBLJ1RSZ25Px2Ow
Mw680Bd+SIjjLL/C1AXpavLWcwlxfdfR8wUPz1P/8LDN69kX2QumxCYjSMtzNtr7s7JaQX3YrM6q
urPuvKF02iTAH/QUjXktQGjN/ySWJr7bpIosKJGk3YVvpBEf4csMuzr15wc5fH5JMW+8NH89LgQd
7c77MdLpmU95ddPqrEbz+OyuyfnM2qum86Nm2NTqeZfdcO3Z7G4u4Hrnb5pUpLVfYFZ1cUNceQT8
QO5U8pkZzKGF+bEKZW4IndH003SC4VmpxToPs1KJgrZUNzB/cPq44JufJp//BDwGa2MjQnFUp+lZ
By95Qtd6jySOzQzqcq4VXTYe+dLgXa8X8CzKBmTetZsYlAXTJ+B8HHBaXxq5iZNaSXiWnBoksFuO
f5ZTnyBREwkyGww4q7ZnU2NDO4ni/rwems+fDyMh7yXG4jr0eb5wTGdNsbyQRCX154NvOfmF1ZwJ
3zNvy5G2fimtTlrOovASzQsKFFAbBUD+3n7a7LK6mlcu0Q4nQIdY9/H114cxtRxtY5H+sZ+ZDoKM
0z0SSBLNoAFUnmzNIUWMSAsHURoVaorUgVO2voIPtIRzAYJgp4tyNSuOXfmnuW+3skIWIG4xRTBH
diM4ETx0jmgolyoZ7HXuKWdrLjd7q0iRRlWU6wK6qk5KIhZuwvu5iMSlE+am1TBegPtPRozDdary
ia7vwXMyQimYUKOmbfsTFGPqOqPFDUbFcIvNr07VL8jv9tB7L1DBqftM/UHoSNsm8JvkqEBndAhy
XcMg9YYAhq9OajIw1ftASQODsFOseR+vvFeWwp3HkknWQ8C6QCatSNZhzsAoYYn5CLViTTuLjsJy
/FTDqVrZDTjNl67eHX4n1VxyU8Rbb4bOhYX0mIwS+AvMSm+4ucYcyfr/tD+UHmUvgE2ckCmvhrko
aIEiQ5ITGjaSaalzkNS65kRuA/77HLnDPmOTXlN/WqQ/vJlqv5NqVlRhJBjmr9r+PIT4ZwaOE1+I
gMcM/FlclN9ixtyydqN2DxbL9b8DwdD3DYjzvCjnRA3+lxeG9tU592HsZWyYz7HTsI7dB9wJgod0
5vcun8szjbDkOW8F3q9uKsgntsNXDiK/n/anMcgLKNlHiXBnpdKs2LRcbRoXQNenaAONlhMDqcJB
KIysakjVUJO+13SExIT3QhkJX49J20kJwLKOwPRai+Dc3FTeLC5ZIlALjslO02spP4bHI2q1OzHs
FJmHuq87BU3LweGbZPvQQyodHltlnw8Bu2/PYqs9sTRAR9qzMn78fulfM/sMCZVgeSYWRUqMPq3k
zPtYgwk3e/FbVUuD/qlqj2jdiSikQRuaPCRRI2wnqBsEWke9WoqMH7H4aU/YVE0ostoIO/dghpFv
n/Hx1lY58jHKghPx3ZxzMZDBgQZc/liHBrBcrFB2Uj43cgamaJ8bfVehwMCrllJ5MZCBi3QCxE+k
+V+BfyQjYYLqrWwDahJ+iIs9Bm2KY8GJLLGs7S+PoEkFA3vpSjc+2TIjPI+Fu6fvF1XEb3X1xPEw
Tq6mH+tD76d7jbk2zMKLqZoL6BEznwXycSJymT/9eNAIF2C0TuXCiDWl6uv6Ne6iiNQZhm1sR2PP
yXCMOKL7HdJZ6JJtvJVYFIhs1HZ1kp7WOVvXZyQYi7iuAa0faZ4pg7Z3QQ5JMW3hHF3QUs77R/Jx
NFiuK8PqAtbWCIap4nDA7OBM509BJ8rWyJMCrY19ZHm2rB4ltO3kvkfs3X2IXuByV9a+817R90/7
5rAiL6igcOm6mtDPEaFGkBZPcrXIb4qCy6k5W4XORy0/HsePu8/1WXGxdbTrf7LXdNyXPtbr9Rzk
5nfpswz5w/SrqnheZDQBbYYU/SC+Qydmu9MtcWKry394Zsw6pVhIxFNqRNRAnFS/vjkCy9SlOCw2
rCKvhCcTNqs+qEkzqLc+MGeEJpj6jwl1VxtF4CI9LeYl81DMh10NoSryWLSWPy3Ki0bvsAIqH5H7
2w1qDj0IzBwi3cF9/Yk+aWFNnrgfAmhLHPCwYDcnaw8XeLc+Km51eAxMkRUX2Pb8+lqvUvmFBez2
XgstHinHt4F8JhwLjhZ15QgnpxNWDRqsRf4PJw1puXumSViSyqDBu4nsB4VncbGW445CldRAIdsP
6agrULwRIerIIqqVqr81cK7OIRI7E6QGz6azRSGv0wVTYd4ki64hbe6EqJnCz4g49ac6CC9KnHvs
LBFfg9gERnVHUsys4Og6/E/oBUUTHcwOjGClstBbSerTTSQDxrZEkIrxulQ75VcalgUVSXhXnNBg
JC4TT2UAIyq6FDndFhaMgtbx9ZaHQ3R23N6Inhbwt1tYbssYvel+F9g49G7xqWS8jfNA1CEaVTaI
5Tls0AGVsDv8po62QJmMjehBAxGWe+y8vcQBHs2HF1WTjXah6+LXujk9ekzjTeAnxImG3iR6WdPw
UiSS7NHb+UQ+9j2o4x5eZpnrDrt4HxDwcqAZLt8V8JVaPMNOg8pdQMAXsPKGIEbVCk51Xx1b4RQX
+f0A3jEG4Vobx/nLr6kAaot6guP10BoSKeMoWXxcLv7uYx93wbTP9yu3nultOcKtJGZjt4swX1ZC
MWjtgjp40J41n+Lh2GY+9NHOq3+mScGmVfNfuRlo0hmUaKG3BnAkfO8NYBBYcZC0SyAebFzGq3eh
VxC+efmiOt5Sd+xKTQ1MPiDBbVdYEwoUGf07931ZsNrM8NoLU9YL4pgRD3EBftI0juAnUapgMYqx
kb2ZeXDzlIlmS2nylc+Q0VHON1uOvDVr5pdBX6gnhIqzoq5yLWQPCfTuc6Twybltik7LHcOojmtu
F8cbLcG6VGaBnn30M88o+YFyuryRkpGxc8owyn70w/K/fGfDvZTXaE8DK9ezEN3+7imNDgLHkfPz
03cv9h4ktnA7gQBbsJOmXDgzXwAIcqtbTs8JIhXm4HpIrDjrbH5tR2ZvEOGbUjYZ7mAclQAwMKku
y8CkCxFq0BCZkZ6/87FvxoEP9vDxjybJrm1O5KI2g/pYd5pjzzh3gSBnDMaiGKjpc5RpSqSaKynk
f2ttjVU+364CGlhCmnMU7DgeqLrQcV4VaACNu1+eyPykIOQTL15ep1jhWY+hXFOapmTDfNNp+aX3
GQ5qvWEQ+c1l0vBvfFcDv/5bW5msnpxNrw+XFZdroQLnJupvysmotN+lM64R1MUIOj07l/KkDtJS
mIHaC0HMXutX7jGu5FE6rLN8cfeEoTXt7JqkOIkMYQ/I00jPs4qK7zkuoLeupKRXyaLEUT8VgITm
DR1eSRcDRej5t8P5kyYGm+CiBw4NbLgY6T/A3sa267DdpboX0wDVyyFV9S7S7hLvGmaWXDo7R6gk
FocWGKJ0fwMzCGA/88jWiXuRsNW4/3nnEyOA51LAiH58VLV9t0KGw5uAeltibUsy+UKDJmbSDoUA
TGt9xQ1fIhrfH/lrg55Rf7c2RlwIx/OQcnxNh0KybMZLZOYjTor8RbLarodjmeCt3JuZkSW8m1xD
70fcXVQ1pQhALSKfbjVdl34vnTuI5a2dyKroEK9PaK7qf4WyLo/9yCMI9Aa/A0Y/kCa8DAT9Xm7X
es/+rMexNoeP19zTXyo1ex7wEv93rPdAeG1hUZbGfcci9fUcter5UCXiETyRFcwv9YpaX3VbZ8nA
qaC57neRIWzwPeDnXit6LPxl0RVXuXybj5X20Hg4yO90rBezQgQyvCvGMoPrCDz0hKn7LrIcOjp3
MJVaGyZ7TW33ZNeCtHehmMOWQJxIcNdYpgRk5M2GVotO/eCZxKq5jeNj5BADea26/53v1afe+3ZW
knjBlfdYkmYPK27GkGvoeII1mT1f6wA8tY/i+aKY8y1dMFBMc2c3OCUlT4YlhtN8aNmjgBOJGq6A
wybsDiS6o9HQdNRx7CFJ/EbXSd4HOtbyoV5cP5dG8ug5LHMpdfVzRUZKmSyrd/lP0hP/0VH9gXNX
ndwk9A0hbTAYLhq4GTptZVdVxqdtF10CUC0L7mPIG3ChqOCcScWs4ghqBbQvZICqQ5TRGMNtWiXG
6UGYiZqQ4dkdu1klAdPuGnf2kfdNaOx/484XLLvOLPf0rg4MCRE1u7sRE6eEAxSRR/BLjopWsY9K
gzr4Vzyw5ga19cGdfIHe6EpUM/x7gIk5N++KC2ISlnWbBipjeqezRf2S5xMN3LyrYn/Z3RiDIEJ4
d9fefglxJUWWIVnRt4Tls0BOZl2U8aVLFMhp2klm1Jnc6AML7unB83dz/1eUdVIwPEDWwuTnLCcK
EetMxXMk57FcVnAf5UbsDQvxL9f5vIBrasR2kXNY4WIl61v6p6ioArIbymxSO0iEiLpd39dR9esQ
OFlU5WH3lPEX9c2wIFFtJOFArTUMcy9cgRO+4m8Mh6FGHWATmCPpzIYVccPu/o+HrieNoWazPZJH
+vR7NJJ/IGPV4hVgpzjXH1XQatfU4Ckz5SZWowpXyXiQIVvcwDDOoY6RjYm7N4o5bYp+pV76Oklf
LS3WD6Hz7Zy3L+l2e/UHD7a1WxBFyU3t4NEc9oNSR/qc2ULaOc/qEq6QnRQxucoOz5ZGkmCyUWxT
6Q/kQU6rMbqqV0ajbsnGyVOaVcg1WpMzO9MJZWfXbavsFKTt4+z2vnyGyn98XHo9a/CxOjjbo42O
X9yHpaDPdF1/lKyStN1oGscZVSxYTTT/51I2nkmD/nvyCeMlfy1yura1ZJFAQbeyyFYPnDewjr84
VIcFw5T6puDTu7GTblsO5E0IztLwaBP99ToayKIBb1gwAa6zkkWCuyVmMMK+VTqgFvZJqT0PIgLW
aqEi/qUOu/G1rzLjXomn7yl0iN0fyjqlMGKf9z9v8eYaAMNMHD6BmEhfeyv4CXQyeJN4rPRJLqP5
GeRwLcZvRZTR7tB9s1VKS/unSCaJ0quqTdNIsjnrlrsmRD3iC2fHpFMkxAndh54DinXUW4WK7due
kPXWVkb+BvLPd7gguW2SXWwI1RIbK0I/9WTh+1Lx9iSy+YlHpfQqSc8LfDZvy0zAmzLJvn6fNxxl
dla3zRXiUGVEG6GbwqAcyBM+Lxpq+d5Sw9a6PrXq97MBx/qVSSoXYdgQHNzY5rnQZ8BBLJaBR8wR
vi4fMDqoXrITuQvKR1YcqKVp4dub+tt+UkYCJr1vQwYCMnVEB3BSyx1UgKAYuxSE0y3V83/o9jHk
wCg86+Uq7NLWLVrxpfnqVjMHH2OjECzMv8QA0pNM+HczqV4Bojaf63pcu86nLL5EuyMEHxH97no4
jgxYyI2xkHPdWhfaEZ4UyjKpe2j2w/v8t7nqeiwgEi5tTESk5JJO+JpgTefIcRULMSg62iSg8e2/
6TP6u3fRd0xHAIDZG7ggn0bJE+agrNts4zXZoF2nn1v3YsjZU2b5Y6mUkd4UCvm3pU7Y6N62QBsL
4AUt/yB+OCZNhYli0IL3ts4JxtZG4V9V1Fo64UY/rkmY3IjHDkjmq7WPgDldzY8Giojn6RcMFOI8
EPcLEEImebBfRJzDlmSmM2Yh339yhtIu/PpvsJFGU37Gh9fGKYyIwZY0sEV9LAfubHf3wGSKBR6i
bIrxcaPyul1JYhXbAPyf2wny382sYw1GFWDfeWvAbiZMIoGtdfurkt4qUqTrKeJCkE5TNMkbBb0o
CHgMovacVgL/VJmIK21IbhCUkx+QEAHMsmasaP1NkU4oHLf0fwEhzI1o+AbBpei7g8agrybzdZtU
uLuPg83GgefCkGH1sME1plLJFdiOpkNjQMQTXb7zUcByxngNqgykjrEvaJqsgmgFRSfn1h70MVNr
+4IL14uRNML/0YDpnHztOiqU/0Z77vVjGukLzbfeaBmO8LIplg1knMFznRz6HpSJc3/PPM7EVhiJ
e55Tbyut3ShdknM1fHE8dANb21Rdc5Fm77K8HM4xeOT5Swy1klFFMJvixmhoMtITB7bnzNeUc2bI
hVJ1FKkeQi6LzqCxhA9GUrApI/edZaX/kCvD4qshvjAbY7V3dXnu/gWpinALbVRNshsCrAJ5093p
l+MJWlbWfSFSuz2MeKFHuSrnCCoAQpIbeVlM5J7wpjFHvtDHgcnW6BSIdQMzGQ6Bn8Gs1IcI6c9j
LPkBf2hVYArt2P/7gXncIRDasQsdp71jXkEjiULrgO2chTZGSLhdL1WFBdFS2PwF8z1W3TUdp2P7
5c1a9TmoVHOSNMKuXw+++Y7In9/msnOP0nKKj2ZgGvWMtq9JHuymvgOif5J5GXO140QVhaykWkRn
cREZaMJqlujcZqrmP6MFEeXQC1njFTS5JblyycwVXnM6B91ViaLCm2pTzRp9nnOrYo5DXZ2ZWc1d
jIWFOlIC9l2VhGEr3Oa08SzLFCvy8dhGaATVFBV6RhdG2n9QMGLtnUyrr1tyg8inMJVlPgJPDBel
I4tJEKPPK8/lJA83XxAX8T7frKeCMVolu+Tlmvss00IObtPtYRhynsevBTHDBpbVazZ2nrGW/Pt/
jLIbqkuDfq7zvbU8pUeoGY6MBB1ynQf0QEI7/y8F3+19+G4z+EsMQaISPDunuAOJ1eTphiM8vN+I
BL0GVlth3EKiy7C2EyJ9yFk1Xsqxk9I5rzqIRu+yqrQX9tGoxI7LH8BcY7XPEleWL0P9ST2Z+p73
mFrSQgwmCY3RNK8kOXwPcxoZg3fwPFSFAnUK3yaOJZ3s/InjSGmdFYpI9g6bULvwQVdhLnTSYnF7
S3kfDhYvkCkCKibSTfNuAReK7m5vyZ5y4LjJjLgeLLYq0/KoWPx0ZxVpxaPTL1EPb70w+973/2yl
qDOyp7XDOKbNWP2RdF50SECmRq/lgN3TN9PwPHB4UmZg+tF2iTxJUhvZLG1byeOM8lZq+HGhjxk+
Sp70LUJBECQXpEZlWMEpI/WYbcQncjNYZVF00lN2FWfe3f/RJVxoZV94zP4a9cKbpcBpY1o3MrTI
IH3hg1ltHJPdV+Ta9Uw9LpWN0jLnCr4zNjbtPc7VkanaBJv4jQGFgq6D/6tVNUn9DkPMO5Gft1RV
DGaYWsxuaDSoDqiMe2fp9H1jvXCbtCGDwakZ2K9qK1xNiwwxZ8jNEWD/p+8e3ZOoL9SUw9k2QZnX
a4MbrKMqDT1py25JwAwdLElcDAAw4EU9w3M0MhdYOldA49h5grKULDNzYukUHk3+m7nLAP0yRkeU
B2vRP5QIPq1xql976/4KX65PzLuCE0u8oZjCZ/kPI5RoSOzTM8HwVVKIRERVJkLzflMYyENIFUcG
yMDrY80eiMYcj7/OLic4tg5p9IPn9pq3ONEulJe2pzpQiv9Y6KRg4EiRF3RdcpYo3Y6RVv3U43hK
c3BJE4TCrv2vVILqDZsSkb5sEn3xnG3LgjCCeicx64Fd4gJwDXNce5wcWcfoelmPy1JaZLjItB0W
ZKpcnjmfWAvYUjvkSvJ7UvaxRnDOj4HprGLT8J4kopc70osYjPzTRFsyvnwglkX+58BITe4h+Vdy
kMbShvkkfS4B8GVTjSOavud3pJOu8DfMnTn1vCS+9KljzrZjKf+LLNkyhZ16Lky5zjErTw3qQqn2
/8rCYAqqffWVOuyMmlL1c+KF2iCaKfsQpWCWi/1LGfbmTbTEKEBvR5QYINWRyScfRgi9LecZFxY9
tTaR7f/LePRmNluJcqQ4T1biYdwYS7H/WXouozvwah+BffT8SsD942EWSxPzlm5AlyNKocRv3Bw7
ZXqE052w5bsvMOrCnmcVhI8Su+409Aa3cSrCqEwUg5ELV67yxinCAGu/2/jy5O/N4Isadtu39Gab
1yneEA7ZEDDFeUlLLIbwKNPEvDrPQeKFsMhwrfrAQtIcUy9h9SuFBjGt9PM9wKzIAayR731L4UOs
NXx4INun0fk8otJZS734bXURR5cxR4jn0ZEdO5mBiyK4S0dit72E7ZU5bPZDW/g+fsEZo2npEJAO
vjfaG4VztxSo1Kaa/+VP1DHyl2xCQ4tHmwtNKbN189w8EZdlJAzJxvfmdqjdwCi3tnZnf/trf2yW
Rd9gf39tvLKea6U+kLO9cgEkMCYud01X0N82OzqIEnTs3UAc16sOgbhQHOXvTW25nCZCRo6WVdD8
AG8UbPrfKwGv+eAz9jGO3eS6V3DKVA8lPhoXs4LVzIcnHSDFPI91/2hN5Kg+wqjT6zTLiCtDvuK7
bJn+NUU3K0gknseXyX+s+1MZEj6YzbhwABa+cKIsid9mtPvJvvEfUOdel7RDRw/knusHMiPR3DQk
5nALO8qSv26bO/DMB0kXhPb0GsC2et6Tv0MMJd5c7148azWUMiZQMxVfPaLRfEPufeQo43m6XQYK
swIzxxHJsIDtLastlh11GJnwHP3v+BdZ6CYJja1jozaipjEzwwV1pJxALrJHSA7Wf0ZFDyv1Oun+
RtDtav8WEt0ZjRNJtkyThryGrHnFpK5uBmvSM2sa1WfvGuuz4ZH2FNZqGnvQlYmLQjQNxQdqjXXU
8mTBDBh5tSZunlJi01XgLJf+nUAC4yYVr9SrczCGz02gE3if6qDmmc6chSmBJRJkUhKmhIHRftdr
WVBh2SHJXp55XEelwQNsW0dbwD5Qi+mExPCzQmxJC4+jO14FSV9KHl/+kuIXSBuZeHA6QhdkJn6n
OfgW1uwFqw21Sky68IbaZWnwgE+XfvUZwfsqKytVp5JWZmPxM5y1eZT2x9ycdCKGK3hLZApMQQqV
0XsWJrNghOehWQWjnUdGI2pLIYoaTB12aldaEf4Q3LE4LrsHFk+XvkZphz/IT/nfZx6aBlyddhEm
FuQPcLoDeOrPnfv17dDkniPW6YtqfQ3pfmjLAITpuZjiOue3mC7Chu+fHy7zxaTu2n6GmKAp1NLX
DnjDdJrD/IQ1mWsoCiwpj2V0YjgbMGBYz38aMd9NmOHvsDkjZgM+SHu/lMKz02+79S10vyza/R/W
Xl5SVmoKWVup+yPjEhxrrLc89/p3l9DTbFw/3xN18rXJzkKIQEl71XR2t8dA51bY2AAOFCYx9iTD
ZVuu/jYgLb+U55x8PS45cEVJcR5vItbhHHLCtSX1884ibz9BBO/9Q8EjtPPFJQvO1XrE4obwvsP7
qqBvCttTzo50s5xgXkJa9nJx/gcXdV6GxeBnq4TCVRKvAQnABuNAHxuB2hvQh9Ra0BV3cRs3OfQ+
HMlqHxyJ8puB1WNtwEUtf88iunc0MvqVm9ot/A93J2lOcS9jokZhqlf+PpYGiaFYcBJdRlqSL+1I
guIJUNx1KTuExZcE6meB0tazF8KLtH/DpgVA4i90KWuz80DJdU7AYsaJjW3Y7qocHZ2K2qCAom5m
PoVLiOFjekNg8cTKqWi85pW8sYWKrGCwGE1Q22AuONAUU07DmFzfMbsPMgl/lf9MqnYeIX8ncT2G
CBXegVrzzJy7Qzs0br8xZo7JWsFt9E42/Jt4s9NyFbroBCqFplh6JMExVi6Xiuy6P8RIq16yfSsM
4OgZmTbtX5pJAaXoO6viqM/IGFWZ9vkpwSp9EUuoenFQUeifSdQ6oHGBkM/0ryLlTzjI545183/+
RJYUz/PIPyBxiR4ItDQ4ST2qk+MCVPE9Hns/cATv0H3+oWG16GvlRpWjj3zweDxUZRWL+km5WAcs
TfY0v1gN4HfkxWZUE/nYGI+Y2Vf83M6vKNOJKKlgwbqIWpOxNS9KQEgDfF810RcvFzSkXfdNDGgK
y03/2AnMHgYqvzriSTPkhwekycHlAS/m7SZDYctK9DoMXBe5ml6ulgKIiyFQdvZSflLKX3DZviOr
By2JYr2fxFKeE+mq58RdQXURVMEFuE/g9AffRL/zIImXvL/fOSa+mKW3FpoK6HgTeCOdc4o8hq5H
EQYTPQ9qQGtRzWM3WuJnvIML+2MDambPCmn2QGBBHouGVyO0d3Y5lQi7DeVJQe0558DS2eC/Jj8A
qsF3plqH5ftFSt5K5pXiA1JVNuKhhZ4cDcV20FEqgh0xjM1KgDbj227lfKLSLEFtjOcDcPJwUj4H
cd1PNmihmB3X36UW6YiYYnU6j0bZyYG80+Oms2i7I7a1g8d3lpw1wJGz0qYc15ZPzxj0KAETUL+J
F686DYLF3s4othfaPkoG1f70OdNakuA1eiEGHj56oMbwLSFrX5HQ68CV5ZnU4TEbQnQF3YbC6vza
Rv/uyjK6XUv9cV9Lx4E+eGhblu0lEAnvQhdrhSHOh5eQAYsedXMG55orDAkPn4FYVOEEl7Y7fouZ
WFcxww1FHT+GGFjyahWuTGaXheCQ2Xmoa38AAWQ9Tond+jRY8M+apuA7uGFTrZl68ujCRbhzcnTv
XcBH9VPR6T3Xd52sBNmzCMoz36EEj0TBq6/FF9J6LpSNAlCjbhRNmciSpj7GLnJlC1+inobP3urd
PiLOH5HGPgJl7w0nWLu1vMquAVDKR7lMu/GsYz8EDWYQFo1hArX7Ky4P/BqAmvHBL9yk5xv1Q1Ra
EnbDkcWXuvuyJyY15yJa86xjdqRuiH8WlSF07URS16G37WnkzMlIfvXZNhB+veclfV3lJRm7g9rs
e9D/0GhrU5upMsKBzbSvvb1XJ17wykVQ8DOTiL95eL+N/UlLNCnIrEG8HVRultfNocz6LNfvKlOg
ByuV53Dgjv+Dif/Z2dV2Sn+5mz9EQ1MJFm0BAIg7ZC/8Ko8Oqxp7D4ARjCRTzhA0QVwcfc258HNR
ADaQicgTioIf4laiBE8n0t9iw+h32TlVcwZHYon0H1bQ07NAEj0vNn+MpP2jd1LimubGfLI4zRmV
DqlVDC0a69T/Z1amihOm/zXt+EeVJTf4hukyDfiXgkYlc1TlHZ3f4mPl1HXgXo0HQtAX6XvWijs0
ZMvXP7uOUrXqMsYa9qWhFNOuQFNy0HDUcczREqLNtx4I0grMSvRp+phU63HyrHaBVFax0kh4vMXo
Y0etRayZwTO6Y4I+Yiowdu11Cl8a+feAAh/IsrK3vVGlwsuHPVJfRWu3m9Q2TZEJ4HfFVI6iPmfq
BRRaRzOALFysuhei4hoLD2CS4isn0wdfMjepPTi5JdZfMFZ0qb+CvrWdo1dFZWFVgvcqPhIgGFx+
N7Xd5ktRUxYoEyxyZ3/rPro3W/gOd59AQQ60K2c7VEffD/CckclDuUsGB9fnKUascqcxbKElnzL9
w0KLUgvrIVg6a4Oby+Syi8/hjGb5cJee4i5xQX5HYFFhQrj8S6k3aP93nOUGVrx0KqI59zGD/2jJ
kO8XEGH4U1DZHhbpISwrflLBlwNGmEF0L/dRoEbNtOv3EHGt8rw8nSjmuvJKiqlRQUjhOjWRKwhF
uSweY0OfVvBURzgq0iLO36duvUVd2/0cc7+uJnrY0JxCRen0hYgwF7kAYkphzj3jK5agDHkkKhsX
J73iBYGbOctzCwn5H/XdxmmL0Cw9/fTtC7ftWgjftf7DIr82z+04x3uexhbpv+UAwQboEYUhnup/
ngRp2l/sOsPrFnnp9axIDvkb0F+2vRjXZv8TNB1UmqDlPiRYgk6acXx/JsVDoI/tT8fWXx1ybEj8
GLeN6pD5F65rBTUgL2XOVLY96O4lHvXRvXKt7yiT+2d1b5uxWcD4TO0xgR7Fj3HQ8dBz3jY1jU32
m76RbPAaCpkPY4hjMmp+yozGpXcbblECgqD4AqOrljFm0/X8HOl+TQearte8XBKA2ctXTtDKhVv1
F6eK4LDo3LhkXsMKuYvaqvY0V0LLYj7X+AIKgvoAKsJBHHkUJqhPgLVZ7dzuBlTzjkqowFge3opj
RbDPnY0O9aIc1fzgftgubbf5LsqDxl2itVz3bXGKX1Hgub+J9kiv9TLVimbJp4+i73BHL7A/AwZI
XWchTgyWuPRomlEw1+kpR0onUX3L2Q7DaT3wc+GFH4lmGKR78/6NHeRK8pf/5kvIMDf/KcN3K0+r
u0k76PouPPkm9WBzCH3CwYDIB2JQCjqOANKb52GWsLIwPe44JxliWdODtqm4phX6xIeGHHTbsXNQ
pS3Y+ybAGE4BE2szB8ZlOAsMo6D39/lxxzxQIfeNvLj5bCz5mJubB6iBQA85JID3BcJFVdqmQTH6
0RAZfGti/iGsJaczJKvGBz7SjHLVPeIkgzrbkCKzPBgQ4z/5eYw6XrKfmP8dIcuwFtWySiUuqst7
ivJSjBYANrJsDs4dvxD7Wt3yyGRw3sKUVC32+WXaIoab0KFu0SzxT/2SiDUc/tVtSAn1Rg1bzvku
MpH8s/9iwm1bPlnpf4b/ayfRLYDSJKLFiZlCq9iLmHIzc0wWwwXWUd5Jtc0gFyFF13CO1sGY5Hs8
09KOq90qmX9qay8LMrm/SjhNDllG2jQlfEfmTx+2fVcqozas3D7D2I/N7opS83OiFaQUo5OYeTib
yLoxaowFNYu0GfQhUCdVnse0UBkuNTSCbxw3OV/7arDcyZ+lOU5twgTbhOyHuJWEBTrEg8uUTp+h
WHyQ4gqO8BZCUTgDjHu21Gpj2UnYS9nAcjjeZeNbdSWTdtLAxV5jfNJDaWNa4w2zJymzYF+ut/Cw
9vLTtl6ZSupCUHxreivejogZ7P1ca3kRaECHvPhMWgqhjK/E42F8k9dUtzT/WTPlYm7iwTsqeG+J
bJwoIfkWFoESH/VAOBQQ+JO2XOpVhmabE3n3nlIlMrr2qoHwb9Jkw78YXre9FBd376ySjiNRpOOz
Vlu43ZTUEXCryD2OeWPl47irhNzQDEk1dy0FRtyFntsIAZjW9Te8gXSs85X2iktWAm7Y61OFZLZR
X9GLUysg7XgvzF7D3tJa6Bmpr/4SjlL3d9SHqvl8aoTDIE+4IspEhYOvoubzZgCJ7x7iGOv+W/Ks
vE/FC21IBLb5x4Tg42ddrKnLCpgye/55ZkohPIsW3qp2HgD0chjlStDLxH0NE0RZA7vz1tbk3Kzm
HqxplypsEeN1wZWvKXxpTyuihbxsBWhxuBbnCw+0NBrtySZ6JyWHTxCsl6SFM+HoVBb30hs0NPJS
tFMLhqtd0Vd8kH2eaFFU4fgIOw7MW+lCXe3tdj5+a6YFFbMFZaobUCKypUxQ5uBJSL5wncmRLS/B
kSaCOrjo62JW3uNY9Yp1B+FZcIh2IElZt4rEn8tGRTUPVWTjnPOG2esndupGJ7n8h2v1ZWiN3XM6
+mGyo/STjvAZcBch/15tW4bapGNdo09MLNcX5l4gxXZDoEp3TQxP/tUKr5pzNsVFon6xPa5B4xYh
GFVQsCJUaD9dHWNntm7BclRtNjr5AGzY5oSiIpWkbQK2J0M2VztLEkEhLHkSDxZTd2Nc1Bt7lNK0
01lcv/knx6VligVJ4fOZ8HfJC+PromK1T69MqMU9OTpribeT/0iHPwl+z3arMmli6jNFCTbaH+B/
CGlavaZHLJfEgdJMvvtBVuREcK8obSz8AJxHB0pUYdKJibthmBiyuCSIBhuq61ANxDldExOgbiaO
3r7XgbeCVsM7OJ4dwgO/rHxQxG2YM2g3ISqnuqXnV2DhDEqeMEyHvWBDlUBkvBaVYIaaDm4v6VS3
n7b1BvxjF7PsoUtt3NqJwyYsJc3RgXdVEbq0/fpwwUAW6lfBV8cknT8J498yrRRdC9GmoKLXl0Ds
+FWz8XPU5+HuZrDww2nSDYhh72tS4ehobPDBR05gGM+sLGLX2Al5RXGLmqkv2qv/xGmG1m7odDwF
tgZ67zDlGNWG/8ObkvGCt8kN4phwoaeFAj0T/TLhmphG0UT4Vb9UaQmiZ7moEn/l8A52f/ueWFEG
3F44ec+XfZYPnCn6ihTfXMM+SbTWyOmjeE30NyOZmOL+qXa+ervTrOTtGJhT74I9UZ4gM4edxTZz
xs6QuxOU+Ta5FR7uilBmEPf3sobkwDkcRAEwIoWJbmru+V1ZYfgW/TEtHDv4uH71yCT90AV+8Jdh
r6MNFEnwpqmsmz2V3cwF8qb2jnjUrR9P6pWatIysVaEng3y+Y1wU8qXF7LhANl3wrbjLuM1MWaMA
c3BR68u7dV8BNWEZTEA45R0g4iF0KCbN5POT2uTylV09u1ndBFiRyV9+XYX1TiJ5SovNMkFJcksb
AMIrGzpA8dJ3DO/BUW35mq0m+dirdAb9R/7zJui+p9fZwjGXeD3Ma/87r/E4CBwf2A5eXkON1ldd
eCHn2ifHJV7heutTAtuR6gMGTjnFnX6wI+DFaBAOfQF3Trl1IDmR+fx39axOkBSzTDi0z8r0j7Ko
zNLQvSGbgRhyVIwb1EOjfEGEw02hPCU0gB63zmAsn7JdWnq9BG6+opV/MCuMQwfGrCLFueh1xTT+
I03zGeP5rVdM89XD/vaUKD9uwoBq+LieVJ3lQq5HCkynTaMZrH9qlZuKFzRfuz36t/DfkahvhZMg
T5GbPokvEo3CkRcUvB0s6F2U/PfBpF7/4hTjrbzf+OOob5QI+Qkxpk+X5qfh3Hp+qJOX6AZIRNHm
Hcq4TQjtmMQ3n4Cxp5ptSjpR+AOeZfn9fo8tUMVtR0W9QSe25yA9YNo96mzXhzCeSbMtKsPdgg8/
q4nkaQuQ8KnDMXMcuRdCee+aoZE5E/Ri/F6DRkZZi8FaRbzJP19DZ9CCIAkAELL8u8w16JwKutpj
uHtyPsbjbPM/ym0d+W4lpa8le5aaLGvVcvev8izXxgkR1LgWv+8NSlF7iFc6DcpLQuTXdnR/XOYv
hK4Ebedi/WxHJfFMDlpdokrEhu+pwIvqez1Y6ZsUeQjl5DqReSIDbrBpXzYSjCG023gmp3zodN1q
TAsqTqp9z/nH5HcorXLQQ+MmBuRqVy+h4StFFEGruHBFaCMflYHYQngcONAAGIZlurj+UA+82HBr
dpgIxZWh/qPsVyHO+V08eR0IiapfGPiIb3FXOeAsi2gz5UUG3C44M2P+qDQ/lkEqSy3SJgYUAlZU
L/DZwVBxXgwDU7GfK9eStTZnnfAMD2JWZBF+kjkltSS2JPJos3J/4YjjhWi5MvmKBkNgYsuPHVZO
XJA+XeMcRbODhYj3MkenGDCxzFM3FOf4Flby40IdPToKVGqfjZV/73ldvOGDOcVnVPP5K39deMUt
Nne5Np3ABW61mzidOMcxhuxzvyqYHslUq7s8rCNfP6LV/GDcadgupMUVkcK/aMnm4FpkU5wQSYT4
YsfxMc3y3E7EDs7bwg0UV6iLAfJ3WjPcZxj3K04EuZfOfUUwPYWQaEOhAGJctJL/waoCWVclRbpc
emFolX9eQiYzyl/tq3chbrmqbIGTxalMfh+diUl0qdyMbRJd8j9Ma51h71DHWw5VjWrj+MWdtPgs
lIEkK0vBtRsCkP9ju3o6SbJl85bL0tpmjRsf38OLbqaRWHzxDubXPDx9Ysi0oCvkC7wdJe7veeOc
4DMjfNOY8YuqGE6SnXkWIKh//KIv3jWU/pJUWSMona6cYvUuBzp3/q+XLJzQ6oSinHLc5N9YLO4o
dQmokHotX5GYB9PNTQxrwGlDnNSkeUFIEFtTNArDg2eBjTRZ7u4YYOOMHIikK9EsMKLvUGzbixvy
I/n8GyM5dJiXnb/q+qoFe9WYM+2LaDExIMmE8Ifg0SQStYD1DrVdXolVJ7AhkfcmNsjqzo2GsviA
j8baAhyk0skzwqTG7z0a0LceAbq6WTFML7TdObe/73g6b6TFbdEZGbRH7k4rnR8vYo78XSltmjP/
0B3siei1aFVVBHrWHAiVeKwVMqPchPM1R2c3RQx+09dW30+l0bKVJ6Dff7EOllo9z7KGU3j32mxo
YSFtOj7UsLx7U+N9MNeUCLMAMKPbxZ4vpNfWSwwiBLfpbUWuXJ4INcuOAVfZNU5Ef/2GJQ1xLcXy
Pc2cgZRXJ9FQxo0SjhKDbTFE4+LmWfvkwu+LMOQ+6RO9SeCOikCrbZW+nDXMT+s0o8/h1aak1BQJ
EZVIjyif55Nc6C2fk+jp6MIRHCbaA8GbiS4QWYrVU6E2TtusS2rYZ3zma7MDy8Md9U7I1CFQGfk7
VN2kozsl94TTMnHPdtKx/AFr9nGqVpI3E5HnXTMDnSwLhmy6l/bM8Z4ORoNpEt1EzWciHuV723KZ
TVifqB6L3eCq0gzbTnz4MfnwJw/Axmo7gPIfJoX5+BZUXHcOUtWAnJ3gVDWWIS0pZeL5OGiyAmXF
5zVbdXrYAVpoHpY1JxCS2qKwnLb9AtgJNJTqbrJT0GIdpaLM1H7JKI1b40sneZD4KtkRrIU2jLUx
q/cuqs+CBz7TzgntWY3cBRM1GAT4ScYKmJH3MeVnj+49IaqIxQ9260CqSvl0TQr9LrolzLWDp9do
8dO9SAMMlmPlT8VblfFaeGc+CgvJcKZypV5g2g07jpo4zHTQ8cMNsRZi3h4WF2ffWTCcRNUD20ZU
ZCZfxIVyYaWtMUrV35apBB5yGje/X8sFJMAIvHzE9E9p0464HKEaSp0KisGJRGp/l+SYRlnnGGJg
m6I114y41df9ovAobVURSPJwkN5M1y9Mh+r94tvYVFuFEyMd/bAnC/m7VcjaRUny6iX28ammtzHX
SsE8k6sVrJ4ZkwLUCAh4fEapPPD9JRzYx4FKkR7TRhOsO+GRr912RvL8zG7u+sTcd9VtRx1BFtek
3WrjkkqAZOfOrUcO/csZRgSa1W116KpKOSNzLJns+9HjGo7M9K715QDysA7ol4v1eRxC2P6t3FfW
HgzeuqCrp8F1HaaT1L9tVQpxkg1hv9jcv509MPt6ZT/PQiHQBQ+HuEd2ha+NiZZw1PGYNIuLZvMh
XX15g90exkO+xlpjCpEWc6OoRsKyKkHYtTzPCL0sfWF/3uiBlzLWREXZ0r+e7D+2NRigGyUuPlHG
YZabrfu6c7lbOKzrVjUil/8PnbJqM0l1HG4MwNgMffvtMtM/cAHGgDDcmyV6sh2g4oNj47/IWY+2
bxF4P83/E5fgeou+5t20OLsiaTCLIN7MV6P9XUZHuParzr37WfB+w6QwUjJH9blateEXTfAtlsT5
KkZokQEG2o0w6mUoXKqWnl9zHmMeYTXCu/rtmCpANNfl4WrGmOLwgEIw8NOIQHUYdYeBUUTuKzhy
ZsuW2Unsd8248cu4git7i0uagjZdbeQycs+2u17s9/8llLJLXACSiFA6TvtoKg1h/sLPRryaAMxp
R07s99cN+nTuzAimAh6TvaEOiaTupZCRJ22+JQQ3NOWSlFeK/ehfYpnKGLlNJnNQTpBS+9/wPabk
qJoH16p/MqG6Nm9WXhb9ULc3ffd5gWiK3RgT9xUdC7qNwrD9OaWtPThvvKFwxLYGArlfyk2k06l5
Hn0DKiyqpmIEwCLzMMELheyHS/a7MuHLsRwdshGMr4o6AKX8n5bIyctBc3jIm1YxoeAu+JFjN/Sr
scm9lWZMnl/PfJ6aQcsDh8ZjR6PJiGMkEG8oUsn8w2gBjY60Qw5JgUE7rO273mirVGnzWlMNzok0
plknFXyNwr0QdX4Y0TtzwtT2ek80ltThOgtumhjJRMl+ZdkwAx4jAbATL6M9bMho6y8XU4SxMT/u
PBEJqsckv3H5Xvd/XDcfwBv0neidvGm1g7nevuaBDSnusDXUf8h9pUKZxrN12dPlqkF+sAQ+c89B
nuXuhSW0+m6XPTxxTu75y1T1p2JM50Dutu0ZlG2fyohcjnOzwvtbskU3SwgLHzL8BLFZbsztgyQZ
JGdQ7leUf9l3xfPxHAt4YkLzJxrE0tDhRjps1RASG5GkncuCfgyBvv7Ub3N6VP3aJOBCoEJ1Wcgo
1vLXwNA0G667fXU3d53rwBIbZDTjKXP8JGbYEHF70W3Stfl8U6Y7PgKl6EGLr+ZGGC8JfuQoUH3Q
abJIqDRgSpHdYO5K/AWIKjwW/npt8ZCdSnbrNZFjtvk+hQUr3pz8GbrgJRcP7+5cMl5jhInKg34U
g/y1bRgcmJKe6ai4sNScPPeSTWXTD3hz5ly46HZHpQ78iSpcAaGqNYp7PskSptV108RJ6DEsBdgc
bx950uA31qFCKfYH9AqqRR3gOmL6IU4TQMFFSG1deQ4ZIhbkCD1/mE35BzwbgkY41ydkj72dtCG2
v8IfG7PxG9OkFF9lcfV+RfMJbMb51zhpfAYXfumBaecF0pElLD2kppBscCghg00ixHi2LVLAGOWA
XFyNGsnlB0TeotlEQZpJ0metqnGsbJvDJ9vptsr8TwKcsvEWiUfucJ/jb0/YVgSolejWUTRJ5PbW
4jq6yMdBm61x/21PdCaQaWQDoX+o/3URUP+gXkjmpzQ2wMn/cE5JNlfp3uawUXwFAv8Cc9qrpOJ1
efObbAmxiqjLDBgx/rTB5C+6h+pt3TwgngzcIMoAqUUFdzT/Dkr63Uoy0cCqDIgG8WGm9nPAh48J
rsOFwpPjS4FIoKkHfmXMB+cQQGtxUv6i0UbAXOaE9imaSv2synOdTU6y6OiSYGFXsblyBrRA6wFk
SzguaXjTr5+PpAUJKZ90Lwo6h8e/yuHMjiDYclVgl9BQ9/cfzFRxlwbaVDHeiUvqSfF7p1sT8Hd6
FrKlItPSJagWMeQVcSnN6Yzg6sJiexGV/oz6IxDbkIwEgXdYN6X9XgWbjOKhFqMFpTLAh2qV4WpQ
8kw+WLKNbzR1AkdpieC8SMcvDahOCwBVqGJY/h52g0EFxDTPY1iCumw3827AbRQGZR8xzv5QAsu0
GoCX1TFefcSC1wwNGY+h90l6vLQrmaqRLRs4bhkVt7I1JWjRI4zuGHtfhSBQ1+/tsH7uyVxoC7tk
1ZbKIt63TJ4VQhLEfLxmZGp9jq+RCDBHVxQQG5Rh3shdySNQLX23aD/IDg0QCTBbtrHqSBYh7aDV
O+7g7cWTtGsLRTdCFP3K8jv1QEcKcyy0AKlJVyaqBGWRp4Uy+k7wTHUvbDPqjcxhNmwJZsK/9K3A
rDAVWxr3UN9FerTGz/lUAs7q9M9zde7ZxQDc+GKUXHnrnjIXPlceb6Gu7YV+gt4Tc7gzxEu8N1Bw
0iy601IfVJo8/QsmYfbXEw3fsaXsxLlzod3qvuZ0OsmkVY6hOpXW0J8uuyhbqcX4be50vx869mPF
bPCMZ5mHFi+Jboe4pEKJYxWcVgsWXiWtPYaCY3dVyfy8JIMOnO8ayoVJjdUcn/Hha9TKCKEfLHyS
fr0BmsK3+5t5Ry1xwqxcYcZqBXUn/qJDemhqOfftYUsZN4hYC7x8BsznBY0J4/moB8FGk/TD3UBp
bcBjQr+jqH912xEUFNuAiFdyYsxgIzYu/oi7dzMl1gEsUIxCpyRFkKjDWoMER+mck9YBtRkOd+fm
yydryqhvQ9n9hGo4N6zgvm77B33kBm0uzvUkSAGzYqhbevyYbsoT7Dj+00dyPJnuhCq2BUTYzgBf
J82fLH+nb3aDxicup2wtYUK2OvGSQ9n3YYWAOLRHUCnQE5/MozNaH6qyWUpa8Cn+MpPPkUbXTDHf
G9RKckpsjtYHFNzXvfwDBxBCGbX10zC8toAVuxGq2GUKZRaq2qwDpZ45V8O9mldQttCznCKRAHH/
QeCCtVRs25Y+mMy3AF5qjDB7j1INk6DDASHW7aTtsn5q+RzEBcLaTa+ZVEJPWhQh1WLcsBGc3hRR
jxqKxATG30/DbulNDW5GNQV8zDwuG4oAADkQtfPKIpb3XTQ5/EE3xs+xTjPpFN/ILytr+q1P6So+
diFsCDIhVEX628bLRbasmQi1Vzcf2lxOPXC22R46AxvQOvBbEokT6yAIkeaE0KYqwTzePYgRYvia
ML7g2+Gomn0MhDFJnCJ9GgOoWE0z5WazO6sAUdrOaaS4HDRsQ0KFhwIxJl9unF6BFrtzuF2W4CTi
T9NI8VwLz82WcSS6obWy5oC+9YH+GM5GUWTTEaQLxqEcFc2jcB/SXp1+JTYrpjhsIjccx+TwYKfH
G0zHoOAvqsKftOvjRqMLK2xGiLsqGKPOClDL7Zi5YEJJJnDXxr0ljDcdHxnV7iydonkMt/rmvVll
hzjre3LaE7L3j38nXuGkuuTLfswe7cfGrpK6Zuxn/rPReUH3VBy7bpgiZ24gWrwL8Rr5df7txS8F
p5kiyWA8VrP8om1/0lwFPFycDVSap2dafxh9e3H2+rxzM7nkDBH3RFmWYFrQ2weUaJE1dq3jeg5B
Lvk7GnWFmN28SazmUUBdb08D16cPEzZWyvHcgj8mu5vEP5NlzFFAth895pfvMDOci2cQv9bqNXmX
B93W7exNqdZ4G0RSwPctteaP6yygkGaA6Zj6Y0xkKQ8QobmRFLgfMgISZJ/25CAJRGBnwpP7a64S
y5iT+jIlNFBwkPxvqmdg3dGJKwsNy2s5WceMXmytmwL302rgZoOPn14HwOj9heztuAlGyLx+2gxX
jT2lvGPBQV2gzDdeVU4IQ/DTibgPLjaqJ9pmQBGwCtDHJYoRybvj16r4rxd4qh+d8nv/LkgIOU7N
9LnWTKI09SNX+qvloq4KaKRaQFJ/8h7+R/NE33c4h3ptmv9n7tUiS2oeUd78Xkw4lsmscnCBA4+9
IY98+iKQntiWynmI1c/xaO7xiTmbf8HqoGBiMBexZR+rphSIbWpxOmGinnXdgNwL/75foZwF7q5j
GH9MRrsxkkbY3fah8y0lkRTEcp8ohBQvn6QsmUWeproNadWp2Vy6enn/dTTlT7Bt7u6dfp6amP64
n6inmGvSbAJwVyJlNKbPyzDYHyZ6tvRHKIEdaX2PLQebWkEpMvD9YpMEXf8aIQj9YX4gZ45apheA
6V20c41VTuQn5v52V63w+R4Cyp+plUbzKQiaqxCnd571HRM0tY1h+3QamgcxH8xzNdHPSOboNkMp
Ng8NWCaPWUeMfUOJv/jeYOWmtFje7110uslwcT+KpNLJdE+IFfDH2mMTgBtn0OZLyrLwYLU5ukdw
mr+vNOCpIlq1eOUvLOkz6bxXnyFREfLEVV8YnNs2zNC1hutbs2+9VrYCs0iraKxMrI85x+8F++GW
BA7EH+lttqdyg+g5TeRisN4zGPGkIUlWtUu9Jnx27+rt9e2huFwEsvenB05oez5KWuaCsZuFR96n
jIc02/YCaRvg3pVY9RUkV8KpXAPGGXj7vODMF40af66oZ4SpFxoP7AFeDhaflAGH8KxQ/XHBZm6+
DFx53x43n8ZHlaFX0F6ftc9+tePZei6K47kyE4T87iWai7kgNJvNmyrMFVhg4tfaj+4rfOkrxuba
MeXObCd5giSptD5xF6eDjqsiyjF1m2CvLH1rpYtUm0mkQKOQ0PgidA6Q9/FZgy7ke2aT/1OXnGgs
eEpHYe5euAIrZ9OkfJX5aStPPdRD0U3LQmHL5Wxt6BQAh1Wny76u1ESx5DNZsYQRhRidwYq03p6L
lYTnJpstxDeLo+J/V7S6bxEPZHJktfK5wiTsAeMa4KEJdW59CQnaH6E98ok1hUSCTIHHPvFiK1+i
mOH7/lxzW1uNjFj/pk+oFg1ln25HvS1gBBVlt4KrZ7g+jcLKpZzTLLSRwIevPuie1bp8g0HEDbi/
mG0uqU5nRVuItT8XhCFNRYDY7/JiQgdpmcP1OKjVCyrO2JJp8o6XUGCx4yMutqw+HuPzbG9ePQxz
2+EkcvtPhcmk16QBpOkS/aAuZpnprE+he9/9/ysIGSmdycsI+l6R4EVRK7A6pV1QQsQG3z09SteU
t0xHwm7E6bdw0OqKA4PvQ2/yFBCbl4m7p1ilsCI4tFlfdxAoKAgEdZmUhZa1fuH5Y0L7g8QFRsAU
2BmVm9btcucLNtmTVWdpscpN1FFc2XwOjOtnZMq1FkVSnLDmTFaUvShOiF9/QJ2kAnEslhTwdYqN
gGnvYTnpFmZ7EpBFt6jog4zYReo50kgTtsQfOC40iPDTqdcJB+3rPYiOah7iGUUnSjDXiwM8ZPHB
xCYlxZ1tAuPt4dLp733vnBmq9lNs0CRLns4Z4JWIc3SSDcLJTPec04NDY/XgG0mBEr+V05CaYvrH
h0DhNTaJWqYkQScjItWrHV/+XAoL6xXZ7MUIcZXp169+4hpnXsiKVto1UdrBh1dx0oUdFvvouztR
8kelOu5rJQNVK+vWdP+iNpW6POdYu7KZ2+M0HJZuvNYQXDEBfTE5PRTu8q4z9QGHcFj5auENLCN0
wT1Mxec0NJ4n/R1iGrU1BcMv8ScgB+WhoCnWcWfbqVGL2LEWWR3B7zPqtEnqpSZcg5K0AmTmTWhl
z2YAdmPgnvc2XWhbuBCaQgdc2SHjao8/harw03d1xEjZF2hSxvj7eyipO8Zzo2odQVv8SkNff5YD
C4EXbzPt8ggP9hND9+8foS92QzClh65T64wn5Y/tKfoHuZBEuAw47EA0H6mFp9QQ7vdYspKE5NwG
6nMl/2E2gGXP9or/Za8r6cXnzFNFt9c8oM6dodhv2XoJ/BC1DnmecajaHCftJ/g60VDpGT1M8Tgq
tTagXTyeZnpuL4IyT54k4+XfPc+0rfdclFsSWfeUBdw/aXNt7+rP1gnbKMIKggTwvDd9NCq5dlQa
0y3hBDvd7eDZHqEZg0jRZyBr+NzZ2tJrPt1/7OWsgcxBNmmEjoaFHwBCJqkSbN+Edac05Ebe8X7a
w+SsPEQKMNK8rsPpBuVt+F5Dk0I26PVa+1XW1Ptr2VFXHT8j50vkLqwP2AScgNYJ59yEawjDcyA6
tnT/FZzSRJjYqZIeXq8KBG/LDv8lyLlcEH2Ef8aX2bE/5Dzc00+KLw8IMIbNG7a0lF6ZLQozhtBS
45OP7Iit11zUQh5m9oq+lMgztJLJavC36kY9oEZfYDMZvRDUNW1Bxx4n8iwi2v7zczN0MMSUPbhZ
oTYvdBCAckGJhL4/7Ol+kt3PDMFtoeSkxn8xxXCAZCY14JEKSp55hKRSo5FakzG149uVFD5Hnwzb
wtnKh3blQz0FdmEEpiKvFO+qsoQvDTG+t4h+npQpwiGFSBsDqbPZOnspfGPDPpnwUjsX6FlQAB30
uVWfvHuaE2Ts9/e+3hSAs/H0AQ2WcKckSJKAZhPIl9Gwtm2rr81FKugcd2ZAXwWbmvwyhPEpP5mq
LYj1ydgRggVLX3LblcpCY2FoKPdDpJ/Ce3Yvjl88Ksm5VC4hJZzHYmEkbeYxZYN0WBhVUlJXb0y5
xxxNXisPV7lJSVpfMe6gt08K69aP7IMOqBkZ/odG8rKLk6GWzfs8wB2rourdxXzHuckK5FkC+kkz
ZQvutza0A8XPIqLmHrIVH+PthxN4qNkW9eKooWJ/pkR9WJF6BVjk87ItsALHEVbRr72rdSOsZV1U
YRzw47ICxX+hAM84rbjihad01sBFTvCej1BXAUxtHRRBEPaZuZzi7DgcUX6Y4maTJHW+C0z/fdEX
goteEUPPI7zwiBWaP6NfvlmuP3PR+DGKYRWDO9CoZfpikqU1d4DVN49ipjVC6Mk4yJ9a37PTm9OT
rGgZrXB2bQKFTQtATmZNSR2KgAeYGvXCAhL0Wp/rxQLUOuMSyiy4/r+7NihlOXICaGb20VQeB5fE
lwf2esuYQsWAsYifg+pYGQOkD8JT71yj2F4JgCAP7Mez7LNxlwYchkiVaY3W7n1ftrx1S7ozWtcd
k+ZD4rgPRgkeWmPQ5R89+fx5gOWS0u9nragNpNAcvXr2ZtFTKi+BPc4TFAJbhcECrcxNRCxARB0D
bRqi4g44r6iD0x+eR4eOCErvPOfkkmkXyH60uMt5jSOQwxeZs19SsBs2/rPbivwuPPckKl9OeRcQ
Bhp8KTKSwoSsDU0R1NszyqJeAJUbKR7Z+qKqP/sqcnzRPRl/jlDGkbiCSg/rj52rsfcSuBsDVytC
IUk7386AZJ7rXDeIJP+5gh8TIvhfn+vzjhip/pIr8TorcxAGaWSInTo34PXFkl6TAs/FIObmNjyg
KHxbAHohGry6Ixsm1Ej0nHzYh8NqohWR0NQlwqXZimejgC9madwtPLJAjouGYhETYCkBnI8Bf+CN
AXYjgOIStoDaLejkSp/fgAL4W99gNiAI886BJ2zpNnnBzlAiyK1V02YTN0oaG8mv4/Fqv0IR6phv
Wh0DVCgj04P41SbttCOv2KfL0zxESrhadtZK2kdG2KwJtIkrqE05k6qdrbS6f+qUKtaIEz2m2zBi
O9XUjhsBav8E1Zx/2dFHpCmG5Asydsf9tFPP+BI0sFCEOotq7zdOID5wMaBdxwTGDyFCr7ine0HI
zH8d2HgIgDpB4CP2XjFPL9rgicdSsPd7D2xayfdLbbPuHNZzuPUnnRiglZojpSQp5zZYDLcH2YSA
uNHeTg1E7/DjQbrxvJ0Tl58luy80TqRRQa3f7u1rGCXXk+U8qq85bgeVKd0e9cVFxyOMv2b4mdur
oV07qB7zfRmxfcElhceNmWWQAjSN3fPalAL1y6OFnkH6zi8+8fhq8kK/x/wIwmTFBuk9uVQbXYYX
LgoX929uZaXhMj8+NcIlF0MouZsFyjyl5gbpW/1eTQa5JD7ycAQjZSVoK18OzJYNRZml12/Qch2k
RmA2S0UC+J/kLhkc4839Pnp0bvMG4Har+XysuAOB/BUJ4u4n8OFmqvr7DuCBTn3BNdz4s5yK98YW
sAYvWs/q7i975BQBFF9OG93W1KqWD5lrfc2Z0w7cV3g/NDpRYQtaJ1r5OpPQcAyGP73xjoG5qoom
eiUtkOl1/MFBcA98fAKxt/Hfrf3JP5oucMeI2EGodBc5oAE+zV8ktqeCa/mwoXskx/21WDsavoP7
tH8lE3UDkdlwR1cglCs5r7umc4BmOsjygbRZimQbz8hVmBpigMADbc2ZcKSi2BUOy7DtRvQrCZGl
4+HORPuGZzDQwC8JSBqNETeQZjGxKtLZbChYXMirF8LVkmGHPDXLlhyANmmUGfYEu56hvJ2q9Y7e
rVRCb3rtv174YaqY8h0LkhJL6W3OXpAnytkcU+mUO3ROZuop/Sii63vsR64UrI4SQKTu17rFL1AI
YVvMNJKqnJwTklEf2EKnVjjiQnuRw0yYNlb3rL8uByO0unX9NLVsqCbShCtWY6DgHgBg1UxvUFTu
YdM7sS/vJpeoRdjnR+M2859msOwj+bS4lI5m3MFlheb5u3eZvS8ugs//4tvsdAyGS96HnQlVLUCk
NZLJT18GOJF9SqV9KHAdYwlpseja3zYFxTcZltdu17Si1kuz1ZoFk9FU8NwOYM+x2sxgJymJJwjL
daRcNBXeL4wB47SZm0nJm0bAYMNuN+YAWfXfaGlVZV0IoFgOVCOUuosktEGYJRD7NiQTvFIPC83G
r1qYLMZXR94uVOVdJTAmBZYIIf5JIx7SBIGcU54/lFRx+/mhRhJYAXZ+Ca2MKNkYv7uWYgfDvHYM
X7n5Dhge0KHvO3IniJfpHTCkyzrOrvOoObQ/l5bbK4ZDQKKsdshSP02co3dkiNvK+Jff7rwlH/Ef
kLhFThcbH6jFmVdFh020w74ihskHt36Vh4xco/KM+C2coA/0KT+H2lIF3hqenhDpEnrXHUYOAzUU
Ri6PUG/yhcDR2tSdFv0uj03B1dflQ02mkfeqlNXqOlgdFOeAwQM+BZy7DjqPlEi2X57O7zGbsZ6N
VCi0fKpBe132cHsXIvjK55Vr/ePYSiW2yR5fjlqhuxku7AGW7tTcLTFPhrEV2aL/ptdbXALKOtgr
S1d3+Sq8WPyQClG+5SrDXGQw24zxFAgPGg2xlYT6CD3DoIH3T4W2QCeVwu4Nesik5PKOEFtjiguy
r3AFPkQ/EPeP7K2+gkxelRmwG4LDU2/h08TdF2/YaHwRA2CJ1UGet9V/u7Ypss+nCy2wJYuAU9so
uJg4yNynmYTHmiWGHiQKMK/CioHb1huTO+i63PUVkdwyhMoOkuofWYCbvo5U0y6n3VdcCtWwzpQA
b54qpXcrwJmSZP8v0uQo/wY6lkNr1N+Uny4ZA0B4iRdZgQaL4mM8PipJeNdql3aMJNsZzkBAyGob
85EFaMpqVYlZa38/qDnEpxxitCwk9ERgiFLFUPYQPCzBIQ1dDSrspeSnpqfgn7XPUbbeIi6HeRnT
0+YKHEIj/x8o0sImAizUO97y1RV93JE+yWjV0goCct+ca8d780yceYFU8ra0aVOkLKUrhG931YOp
G8sZNmNLZJ7K6qbYWI2fOSbiAwoOyBrF8HxoADT5wuQThJ8uD+A3MpgQLOF830ypy5mD0A02O3LT
XL6weRxtFKU29CrN61i6x4BYezlu7s1KQFVCbsMtB3OLkGq+EE9ymv23baMpu/1bR5ik58B1uUQy
O4ulgOuOfs4TGNYsFaK36af3QeoTHFwLlybuo9a49i7dlG6KaLWgYhbNocgnGKJxTl5cig6rlqBE
yyiTl5KCzGj5EJOn4F/85mwJa5CjCKWW6WSeeH9HoCdIZSVUIecNBo5GWCk/5/MlwA0+mVDUcFWe
z5Rqf/8xBdEljxIYIq6a03LSSarsQscZoSjqhpZds3bh0f/IIG62f1jpILC9QG5n7REBoKwb345L
ttZtMAWCdl2Cw4NCUj/whojE77wtuuK/Wv5jeJhJCVgzE8G14GIhxpvaFHw8KSi1zhixSZLrHbwy
nn5SInHh1COBuZb2Ezak2tLcMlcwNnOnOCU3OHeAU6Rl8+EOPqMDhdpvwOGu5tockbSiGEfZD4zl
jZx1k9jUafA3TFNVPuYOBOaT1CepxDH7vjH1cZK8lyctQUWOTRyN1GKy/bcWzBZHf0mv1dpp40Ca
9GO8PesgnNilLfrlP+wd6KUJEEa157vHTUd2X5GVWfYi5SQqQFBb6PLwlhW22DoYcHgbGknhUQ7C
tv514Cvo0U9UD/jbnhRo2V2VHtE8OrzEwKMtpdkXgt7aYGVs0m6PbZeWkAmCZI3WjKb4zs4zYLB5
xbig6yL+UD8YPZbW2FN+C7H+9X7cy2GdgEtJemm2ffUkaTBzS3g+HfBR/QlPqIpeDRXJZRl8uJ1w
ScfwV6TYjay8Wt49YxhQ1T3p7KPiFOdXxx/5Aj7WD9Ju7mAGN0Awy+RACHzMhs/3/ZEXFDJC+fQk
x7c+BWjNxMWvNASfKXHAnZIBCXS2xIWdob/cReUzHJ3rkT3txH9KnaCPQAhtkNGZObSgohUKqCJ1
0EaVf+oODNfbapxhDtC6sSM9zk4QPhtrZoydcdp8kbkLCQRivMATwkLuTYW+Qi+MwCtb24UbEPoc
/IH7yjvXYLqEg4MSJFBNjjkIuAnym+/5RgcIwrFLl90W8DbvvojlpS4JdP7kmT4E+YNZy0osKunF
vt3Zgl1Xmx0lnkl22CHN0N3oLlEkOx3it71rFwmBQmtTl+MlfQZwprA8hAPtOk02zirbDXL64dH+
YTwUflbSMVXP1WQ4GiSxOpGomGaYneyjSs6EkQkHOcCtuyINSooSAHpT5HWtLgDUeOIc3Xp3HDKC
KiRk+Q1LoMIbV55RgE5VDsuTjYydP/PR2SfNDS7+GxrFECVZ0BS2sLtDoevyvXbrxdziPT8v688q
B1etKKLDDiCb+pcx5jiRvCQ5WSBhk/+5UX0q6vbGEgjPwnzK+YcV5ZzbAfXFX/5hf0O/blUqpPMZ
VQLdJC1U9y0Eu+QO5H+fj3MBM2v/gwEukeYw++komUjTLWr0LO60v7kdPfG6UGhiNwFPLtbdoVzY
Z0jQqbXylIheg7XE7z68WtVTivVfZu1n9IKTiohxvn+3k+6+4wnOnbMq2a4vmno5baBQI6RrQH34
dTRBQ4IJvS2QOF1aXjZzWIG5azKBquJ3LrQl3XuIwJyoNe9H7Kabl1zDxOcfDEOUOfs9VIs4V50r
DQdMxcOpvTRGDz/5CfjAR+e8lNY3kclLQMPzz7qz5f0oQB/rpci2ejCpciCV2OGIk/AQoQM4mRj4
k0DGPRnFn82orm7Klqh/hi4W+DbFX4UWaJDs/oaVjo14JCK4ZIayXmihvWvgsF2x80QX6gjug3mt
HaOCNJr1B5dTJzQVHW/zRs4znKhBT1La3SbH9RUQvCoGfq8H0XRv7N3EkIupAPjeiXg8+al/RPQU
vwxvo4Q2KsWIIMg9OlL+sEgzM/CsU1+0L6Mx+VGs+GP3hOhALpxRWgow68PWH2Y8q2uZFb5NOUbW
v9aztjQLoGdEkebOp00BIE8dH/+2kO79cmGE74QhgxHF1f/PFSUkRC63CSjOSoc+tthLbZ1Ui5e8
T8AAgpI0TTvtOJnwLPRDud3bDUg8W0jSrBtAXuZUmxMWPGsTRq0ZJl7P0jLnnqKLTkx9fhmuluGf
oV5AvFw7VusFkMSpl0+Nt5Eqx/XrRCw4LfPObL7jTaSkHCiioltji00zFsHSsT7YJqWCwjFtw92V
/JmKLwPvbrtotgBsjhC6objvbwDPfVV8CBxpuJvSUpGNavRgq40aTOd+g/EgfZPuTUKW3xL3paz7
juihPutHC0eHl0bCMkY8EZkJ5Q+e5KxprYwlXuW/LkMaIvZ32qNQcdfOgltl7x74OOXfm/vV1FeX
MOGWM/AdG84hysxPX4PatCC0jZAeB13ZBhU+jeVHWA8IC9/ucCf3g3OWdPsregBDnA4ElIwCnVyR
ip8+pXBWCpY/rOlqrTiNbMnCx7iMf6X2ssbHdcgXymLKv6UD8X75oaiwBZqqRDMgvxNXeBkpTO6X
yqgNQQYuPgeDHcqJQqZkq67lEZX72Ev27SOa/C2XAO4PPNI1cinsLTiWM0Y7lTsgZQ50H8xWKgez
3gccd8ljt7BgELkuGqp17z+avozBL15rzld/WHhHbW4ZLRoSjT+jdI/7n7RCItx8TuX2RKHRjC7k
rqn8vXSZYfRHypGp5Moato/BbCOhpVIB3HTvi49b4hhXr5nEVjb64bo5XQVUc9KWEAuFDcDjBtNT
7Ad9DfCCbMO+2EgHFSsFG7L7os7OyTuc+0fBw53tOX+qrRoiey3BSNaAC2SirA9gO32+CBxg16Yi
ExToYMZ9Jix/iBxC5TLf2oZqnRjpnP1CKaiGfpl0rgqgvcRHll4gv1ZXMgR/KyAue3P6k5ifWE5H
hRUPKK+0FcN05pJFbzySjG692ednDauIhNwYW40Jxz23ilkdnUt3HaOM4J+Vh9M77InzsGL13Xs6
eijwXsrplNmNCBOr5ux0nXwuNqKjp+484hU7atXjVk2PYy9ZshHSimeKqtld2O3P1v9LfGpU9NBX
HZ4f3llI6pxPmFrH1M2v9ZU3FMX46uC2ZY6F4i92F5hKqo2gMe+cOIMb0NRfzRjTzz9TS9evcFap
krB2DWsK2ITsClRrZjaQJYkJe7M3RdtJwhfqEyvWLBgxLcuq2cAcKv+LEryrj+7kO2hMGJxUVY3b
WzPqmvxZE6lxg5q6v0+kmqkrYIaNePi5RaBpq6VOueUaJssFRlfMkLLYeh0FQ0R+PJh+i7EtQfKB
lqQzfNkfmqeQE5nfirlKn48PQ0j3Q1PCFON0Mryeh3QWZmYfO4HjyuNEytUBhlfNyko7Fs5rubWt
Z0tMVijNRAy+zw5J3+1UUqcuGYRITJv/JK1lM4wf2qzChM3jGlWZ3bddLc2/zl4LsfmxTTO9givP
vXTtENd5qOPmYCNrwq1uBd/h6g9Vja63VsjtIZgXVmI+vpJNnyzftMKliBeuHHPJ7liW24MVh/4f
TorwawjHxR3pFuFBmh64MK87nHKMnexeMFnwtHsMM5u95RjJnb2761j3BIjwOUp9lqXgB5rPDAXo
whophJ59YXQtNPKta5ir1SQI6VzOUBkyXK6ecX9WpZ3asN0MYT0HRbMqEOfOWdovyh53jc8TuaHi
qQlceBU/mEXzR9Qc8PDm/CTaLUeA6LizwsdQI2FqOzwGOhibjWrK+ZdfZiUSU+/NwzJRRW2Fv4zZ
IaEzlUSheGyxKGkXXqdhclwwKd0CISX0Z1TwE23H1GPkxb4HKveW+rU8hsRO5G6mKQXUc3B1kJs2
vtWaYyP05dekiblgzVG6n6Au+Fl2mHhd9sensVhOTfiw12edLS9nU//jOZD+OKMq1S6973ZthKth
m7L2v/zcu2dXZyiSyEt71U8zLSIrsIhrxA2b/+WrZQ35lT8Prk2drC39G9K7u90P8Mk5L9FvqvxR
ERiDklbvj7ysDKh1+X7wfS8rIEuwEfXCpFkOJ8nYjWjzBcz8BSw5li4SePcSMxFu7p8F+oh2cYEZ
D5axqQMQEOkzW52n8bOpd/FgrRW1TnUZ4WxsZnG3xYlbqYxk5+IwWlmC9GgWXI6XRqkaRe+/+1JP
1CAa/0jyOkuTs0n+D3NBB5VlELNZJzAJt2DetMr+/Cakxiq1bOHyVWiYq2vzhbHh5zHefojRsI8C
HExvopTu3Am9mhJH3hJak4OlPXRdwtTyRcY1drDYdXXT25bU9CIW4ZvtHdeS5fE1zy6Moagjm3GW
Oz3Zg7oYZlMK5q16Czw9q8SVXJHUa1rBhwFJ2Tch0zwbneU4Ng2P39kVhpAk8oSBjXr518bp9Mkx
hHxgp4qXUVErciV/HH1qmmzpL9l4l19Tio1vjLfsd2eyuH/eb43L3U1Wcy43LRiCgLJGzCeP5Ylh
yoltvalCz9UXeOY9+9kiGlk29+5NpavRYKnUs1jFIqFdRQkx9mKtmOfI9LO4erO+z8hkaGu5gA5e
dzBs9k9A7E2Pfo8yvA7pDRV+avDPkNcIB7RFLjyk/1MWMy/lYcIHSsKcO2If+2aYjJBLZ4pv7H21
xK9ouZnSZp/8Fs9qwEIScLqpkgqlO8M0hghgQGL4jrS2CtThugqlhdYRqA+XxTaxdTCBuDuyZOsz
ZL7TV4k0r8prSUiisu1VCVSNS49T3qoXs2cuBAXM5PuD9HUX2/YXHi9e5p0FtozuL+JR2na2XIOX
TyKPui7V5d9/dq8HiZ9UGkSMMW6nnrlqjCs3G5gFbAN1i2Awka4SyxjLX9ZvYlU+oQArZLUSlTsx
m9mwMDrgxrrWcD1n5L6VdcOm+0lG5Pi/ThBeC88MlhY2dES7T9XZTULHjkHA+DtjYmQBbw1+Xm3i
g5yHvLtgNp1pMQIYzLDch42QGep8TzWqt8eM0Py+dQcglO66imeVLi4AW7wVkwMHOYhMP1M7FhzW
lVGyWbmTh/0PVW4fcQLSOuKbB7CPj+FMwVC7wcQNxJ+QsPj/8FyD5gGlcmi/xBI7kqmTvn16EjWc
ZW2lv0T+MWzHc/KcRJhMcep2I/U0OjZotubpok8AxS8M4mZgUXDU0u/FoQ3AMTt4mCq5qOlf5dym
vcl15U9atC5ZGLxx7dBOP7qW8f9akavPQotYSpq//TNOeWuJ5o412MVhmHjNE+SXzuGjZ+t/EeWB
Uc+00BZUfAK2mXcWQbHem9EkxIFinF3wCd9uKySN1lJXxZYW4ktzqXW8oB5Hcx99DRNqYGQi6g7t
SQO7LU6dxwDiAE3BiM/+a7v3/hsMgZbXTGuLJtnYGK6OQw4jlcRuLBmzj1ipP1ZQhcq1zCYTbfF6
13APH/QwOTWRh06YPgqB7VIPiHtxLu+YH0IOJGiMvm+Jo6uiDVpTApgyCrVnJrQXoHU2SKAO8Uf9
WVbXmpdo/W6/KKFxDJM+6m6/9DIRWAgbtsmiYlrGdpBpgNiF3DLS2jrJZPK1JMFJuKXMuBCKYpL6
uyDxrS23TBwyGblEcBCmWAQXvbAHG2ePRTIdYQcNKtVOrEniXXTkxuZjYOHgE6HhuJ3r8kmo32b7
dwlodH2/fgds+McUJli6fbLsR++hiqynGfxz39bYDnrjUV3hYeaOZJ8TgYrpWHqwjAK5KM8c46eK
0xX8VvMfGKQD5Gqwloy0Sx9nkXfjCYfoWyYY4teEFCrb2LyfXSs85So+uuYITZpCABWExKVbi3wq
CEtNOCCPMUd4hjde7sCVthaI97uYhI0fiVCiJA/4O6PdJsQZio25RWsihUWwR413ibBcZXLMJOAQ
4Tg29Qzqd5S2LBf7TMDvpADN5JsG7hr6VlaCRFnWqKBZm5v9TLBM/ahUGt7KerciUoJxZjPXvLB+
6zAJuxCzAIMcaackFHCM8oi3c1wFA4S66RpyMRNYALpLRKXD8VSCUoh/hLxoVu8QG+SoPRUyIAJL
VfJ71Mgj8Aht1HeaGbWwC6WPAUNxQrFbABHWrHerZaF+OwUigoVfbF1g1w19A5D72wBT/Um4seku
JMtA0JRdMD3HUoUapgFPB2WMJIxEDBz3/TB18IhfzTlQdySJt7TkyXkl8+8M+/SUIhVG6zrOCFFG
ld3mDx9LSFQvttjK4MwXykjLPU3bUtyrpfMRXTos8PVKXvxMQvI+eLjcDLOHHrml5+attfBbzokn
0teOCMtX6GTbHKPO3wEE7CdSPst5G+rRGM5aK12oYLJoJj4kG2YyLe9Pif9LN4mqmiDZ/1gjE+3h
x967Oe52zibMuCiEjvqTQwlVr1xCrIZC9Zct/UiTmKKC3FzeWnSV0aiC0G/M2RFlhk1S3Mqn53oa
LfZxmhG5XxJRaLlmWUsiKfWDuE4rn8oN0Tnjs3x7+LaKgfWWbb4qzizYJzl8T0ZZE6+J0U9XiHuF
uDHdciRaeFf1dI/Pf0HTaIgRVGT70Sdl/BR1Ac10aXuAHInxzuOcOhdJPvtrpDnYRQqJ3Q077s4Y
IMqBh/lM0xkWFOfRG+zmE6nxhAd43cAtbKA5ks5LC45VQq9jHpFG++FFWFCnzUTBuisyDP1Hlp3i
h94dfT39427A2pCEkJGO+HHmXOXjven4L/2hKrSjmQObdxChck+qxTMQeIWOvVTx1kp54OH4wzYk
Zqd3Ypmmk7cunnVrRmP7awILunfC/DswPfYX1NHMXCM0yByfM+v/4xkH0ayMmSvqhEBRxWW+M/6p
OpBP6MDyxczBPiqLOJO7F5TB4Z/xCbYeJu/mnGVgSMywMzYaxXbwC5LhLND3CkdkmN4avGe9KWeR
iutXeDF7ZV8dJ9ukLi53ynABYN15NZsEwms2LA2asfDltQfWMB2Tb2tWt7yHMkPCP/kUdQ/TZqRn
JUQ/aW06YalREGpc4mPd9vmUiSvM9e2uHlx7PqYyaAZRDjL3zIFmdlk4mPUfaOJuJGlndO5lJzhb
Fx6FpKe013Lt7OBohYZ3awGDALh8NRAAghvPIzPWMFEYM7/R8IDlJYOrXHmQ0zXlpIUNvXH5UGbq
rmf9+ahs0YCa6PcbMfy5uVlSfhKJOI0dQESanR7q8+pTdp0e9Zq1KeQTuh78P3btiwRyMySAnr2b
5GcwtMMbF7dLzJD81cQZOS8bQEnjcfqlH3XgRVgjEiwArwSnAsOlx8eKG6FgcpgRxu5gNA6gpRvp
G5yPGxqjKkbLJiOoRr63qnpJxmR7yJLbe8XihtnRYaWsN1eRanyNmAMxEtlwMlV6MWKy+wh9AKs1
UhRO9Ozla5gFB9RHaEJFrhmoZVaLdCwIBZKOFuMGPDY6T6mJeZsnicldT/551wVDU6UxHCyM67JJ
MaW9VyYfzS/1T+gq4cCHgOEhVdrAYMzujOZND3aimrKyIPTEnxcA8YTSlCU7ORy8Q7dzcUXxUv8b
dJHMPKrR94qDTXxCsvf+5LJ4v6/CbAjd5Bu0gPkSQeFJ1dGUkjkh0OMQUX5MQMH215fVSrzqJ5n3
iFJiSY7mEKZn1l51VeG1v8HQ4hRdklYeRNIPcizwtaMxm2IS7Iu5VaWb+8RSz5Xc2hr4+5lv4Jf1
CtidagnTrfI6KWpa/HMTsGB9y32HCFeBb6QCfG459JQCPEzBm/xDeuPq71+wNy2ouVl/FfJ9GDF7
zBJIRTrqMSH/k1y3lG2+/Pc0ldLX5RdN1UIFubtI9YDSitBCW9ro0MB0Db/Ny4FXvLU7MJHIaBC4
cfqMgww7r7OZBarWRgzX63UUDo03YuVgoSekBdeFP5JAZULDwLrG/AZeAsWA5E36/lvd9tbWUW0D
NiT2rglaIjy82AgSH1GP5U2n8fQuccqAo6dbjc0QwoyluR/wmRvYgxVA14RMUjfbR9x+R1hu7Qxh
DrnBAydVOHzPdSHD7gxHENlZ6vm40xDUzkDOQqe/E6W+xkwV7Ys8PEznGtX6Uidf+xuEu99ByyTS
22URdVFhkS+AqvILASqjxK+JDbhSHgY0HzMJhp3YC0qI69S7Odln6alfUkDleAj5bYrLFoIUCmGz
Amznp4hhN3tWzustFNCHgpJQGEs/3FyV2pZhhmQ4BSVjMml7Hz+aw3is7sFF3BoIn+Mgjl1hMp6i
MJlKAvzwRieLnrUEodZtoL0BkDNmYBT+CwGQzfjeYHQbnCjnIXVrvQql5lRZzZll8rYeRSMIA5mE
9qQ78vGY1jAOWe+XZl1RFebBS4Eo3EDEMHd7YeW6MqG8nYkMu9Z0waFfd8upmP6gzYmAFRkZItr3
0sdel4NHi1ru6dwqzLxgVCMUTOI/vqHlExIacxRxCeRq8QS4RIRwmme24X5MSHUjVVNu2s7tbczM
HvOB2o/56tq0Cwtmq5CmHnqa1AWFUhKAcOWU1JS55IFVSBbEHbDQfg6XnIDME4N6qImw6qU9KcXC
6xHgcqUSUM4472SI5mfy1hkiXmCyDJ4V6F+MaHhidNLaLowFiRpmnWZXBwR1UdxeIpVGJKjzXIBo
k+qZEYgSucuNMgAn06eR1fptjAU6JfjYnvpUcVe4t2WGsbcAmso2sB19B2EjY8FUhEgCv0a3BCoU
JXmdRGNiSK0LMfd0djNFb/JSDCgLIgI0B8iJCkukYUpwyJ5CQwz7Ygej4xlngN6IIe/YC6hPhrJO
ytDeHu6ljmMiOrNcL3o/eWKWUYgKSWchK0lhGvpMdTrM2vWW02pfSBsAmX4THkshpvRzETbNSc6H
YchmciRia4YcQ34pv4FHhlfg9R14uhsK+U041eSpgqnzuPQk2wZZ+VFvA3zYcIvjroMs7T4Hq6ZE
gqSFcOhifO1RjYK2bGcIo3BIJaP0sdH3PrRHkVfIHqFzJRM9prJ6f+IhoZILskpzKvMZ9BenHMoU
idn1MXq9by+DYbHNTJ0SP+DDqe2EPoZO5z0qXybIx4XmdcfAJtWcoRbaRTR2oHa/NEjDXlk1i0O5
Nf7mvX2Di4+9gx3HPrKPfvCFqFO1gA8Ucg+jGXIw+762D7b44jx++JooVc23ap6y4eV85lOZP+i4
yPv6t1VFbs6evSNMyJlVHVOQxd8uqHw7QFbKIWJKLjtYLJwiMRyN2sLqpuR3FP9cTCQAKSeOfvKu
y6r/S8DC8dQU120kJlak9iaYG8XdwkwmuGIWzcOt9UcT9Tvn6ExTyJsiJuAlkF3fL+krDhNj9JtB
88vdOhhLoI6/p6N7WXRKwSI02YaZ7w01HQ0ZTTYwsi6XR5GHg9gMYb9AjLxPbiK4l7ddQJKzJUqI
qTyUhs2n6VOqYAfouj3q/EEfAJ3zP2EtAqU2K6N/c8fa88fy1d9UmYma9WuoH9KQh1iqMn6IoUFT
iVywzfi/I015jlNo/SxTOBaibyD5t6JY6VN3FUqud8Csa4UIMSThvi9gn7tl6AYIih+qOcKuXq0/
DNIPVZp2i1zQ//RAFHCNmZJPNrqVQ8mg7n0RMLYfKGVWMfp+449VmSmIz4MYwydGs8VjZMKBJRMF
rqwzD1VxeQOVmj6dDSqpTwylhzB52hEuj8ic/Wv5K3H/w+AEiOqpyo0mUd6bJBWdt/fDHLD7Hfwx
6h6W7LHBGfDzEZ1vfl/Ss+kftJc7ObXyBPJQ/bV+3f95+qCDH6G8rCvOy9L/E3/qp13lIPygHK0o
KbqHeBO92AxOsAz4HXP7O9qXk3i2ZOHqUJzohasJzAYvgd7TY3yGHhO046jaJc6dUhNisgu9ti7x
Si8z1M6jXnL5Di20icDLIVI+VDlZWBqLMJEE2HPMq/QnUTU1WD0cqi6Stwojob+L2yKwJpdD5ArQ
rMl0IgFF4Xvz+DhaMHwnXctLwRATonY38LHPqUfDLGcmWK2aDl5nSqftPjdqCoUi4NgvDprIAhbD
x0n85gP/EzjKqvD4tW/ZC0ys38A4f1V4UbMWZF12uY0C6eIfcwgB7n3pV8UnvvSowGcLCxuT5wAQ
T/7du7NaDN4jGN7RRr2NZp9LVvNL9xbC7konvKhQN4UQ370bLwcxcLd/r0LYvmNghnp5HLZauYOc
IaYxHOy0qeMZJdaZ0VgslzP54rY80I5gB11CIL21yd+5RRBEj4evlM53VP6DwiJi/Ey5r+hV/Dbr
0b2o+g/aK3YsfCdwgb2ZR8XrBqxQAsl3sKlsUyNiN+BEfDYHC60kWn1v7Jcx0ZR/aU7ijy6NamyT
eD5bwAqNMHzs5Du89zBuptjPQQUPVpq8dk52mvnSvOf/15fInL+LSLSFwN3zuj33FPiGzfMrSc3g
k0zdBmJsSmLijs+CELbS3WYl/J8CmBOQyDLpZIrCEmVT9UltUP3t4R8T4NlTD4t2izYxj62qKDae
XO6lx3Un6u/TPtvgA6PFdJGW7eazRA4Zzz5yZNAIqGpCiy19IuDrXdABw3BvJe6bjEV/OBLU3z0F
ZDKWB/bX/WlrN/qiBqtTtv97QSbqjns2waqUUvWxCoiVL+1WFN8F0XIGlhYeKirviX8h6B/54gzW
XU+YMSamEzjjDVaSSIHQcVr2uo7CQrJPrezLIa46Uxlp2rPU1goTc8Qgq7CUQHO9yheB24KRurGI
N0ocreDxhtENDc0hYjt+YJY9trBQU2K9HzKjavaj3RpbdSNzSXnDLlifhEUzU7vl7YNRvRX/1Dyo
WSWnvma2Rf2gPftfT9Q4Mkk17ag7z0lxtxhVG6wEWp7t/tLARQdLG7oeJiqlSiBWgdL/ze3WDN7r
Xw+PPcsOvyFqHk37EAxnKGB9YMiAZqNci3jjGc1Vi+TZTXJIIQ3I0ASCzdAqVbW2Ai3ZvNsyJv+3
WmO6b5JsPNlKOH82tfoOaE6ak3EdkvcpNpYTlkDE+iqgc0uR57NmL81f9I0EK6Se03WinIl8FdZE
dacuSqjdW20N4KuEivCXs4jd6sGxHjpMM/0o0Q1MVbIP5CAik/rQEUxAaqhgF3W+G0mhm7BZij7u
zOZv9Yn7w1MdbyXNr40Gfp3sBVf5uShOQ9UW2JtMuKHp/kHQQQzlPx7Kpfem7Gwo5VTmMcHfaEnd
6iUk66gGEXnM9QJE7tzS1hEsTAcNXbHO0NQDNgL2s3VoNqP60MoLfgBH5tjoEF18JqjSTRqbUMjq
btu4+vPNR2vp3hQStCCt0iMYlap/nyJJeo+hfONXFtQnAFasyBvIzKJyeNGZWneeZgMiIpCLv2mY
1ljD6GBrXTpYAN8qDv+T73QdfyAUoEs1mmF7+y+6Yrz61/Aq8yh5bWEQ45BS3y4txlWv7mCtlOrf
OVb7JanN7PWFocXYFv36OUOIsEK5D95PNqIaq+N9SFO8eXHIuOBM/J93jTaD08A5QcdNDSZgd9kc
MrWFuxZ3GYOOdqiIMh/YmxPkXsHHANMBv33SWokmfjpmafIh5A4UhdITaV7/bbZIHKfOKi/NOtMf
s7UY9ehImgA4DbueDWf8ormmASysLYJ5hvUik+I1dyP6zTIY8ghQ/7ucdPgnWslBM3iC+a6BSmuR
/o1AJTtNTY8QaGrfgekzPYgRm0vuRdOX+JoSWZx7kfh3xcukba/GGsGVLAp7zl5TL9UQN6/VRu6D
UZp7Bi+W8Yy6e4xsk3/Z0/0XndItVtg6aiGXPWMlep4ZBMsiAvbt1Ek1CPSi95clnOfhDMS1ktob
7Xz+vguhPfs+PxoCFsr+p3tZegbNNPfV8UdotIvcn1LwYIJ+XAJFvybJ2wvZM5W909HxfIyshXSZ
3lCRN/8AD+fX+HetorYnRucvLgtiXLh4vP4GUC1E+JcMGsFlRlTZbqgqqP1KZRVNTI7kXQ1HSBXM
etf9iuRKxECUssTzBCjf1HnnrBWxy5t8k8drv3hgiDUvzWx7Kfny9XmwOvFwYeU1Kz0FqitH/tCw
WFcrNAvXeXFj5uNuaaEAiBuwzgR3HgCheyxDXWo4lwOrL9jUraNb0rSIwFLgneVPXh7veG+d+KRj
MBKursLs6X9iDk/Nl+FPg02sx5JKQJZd6n3inNOgSyzN/NGzG9awoxv/FfirzRdcjG4c/5AcyrCq
l/eRcDkTB2NO85MdjaMs1rH6uWMhYsBEe82g+tfSPrscp3JUc5nxMH+pcfIFN4hQ3fFBPV8+U1j3
s/+iz+zqO7IoRk1GXOaD/+LZPEh+y87h7YmeTSkvc04NdmswigLbR91M6tyvXEXDUnkl6Xb0bMcZ
NUKLBND3iK5yCyYtjiM8ixfxPZqYhylfvXg3/vL1FiqBB9YwqeIlAJTToMtiLck6qBNvmMVF86ca
YfFoQiyTVcJymNoyHdqxfjkOYTYY0uZNNK0QHOGfxJ/f7Fnx5+GgW8OM6dZdijAljKF7yefCrSFU
/VotQ36fNJpUM0E83UWJOn0R/atbjusisYUslfnNx26bhuCDN7iR4S+qmaQMnF5V1bOCjmmm9jTO
Bk+sC9fr/frShznGoVB/4lAPASaONNhVk/0NOpkkIl+X5uGcM+d7sW/ctex2AhR7mP8/JK6zcKHh
dfeMeVEbpKvpYFJgo2Gmil7Yfw/La5gWXh9x3NB1D0NnWKyMA5S98PzuiX1Eufx1y91VsFydnEsz
hefPW9FynOfJqD5A0c0WLmqd3R658qyjTusICFvR8yfzC9hLYdbhdC6dcsmodiDLdHkewxmsExeT
/1gPqW4ZY1GErZ5GnqqYeScjV7ugiCYz470tQo5pPYJoQcvFVms9N01dsab4KHXdo/obv3wRasPx
vF6jIEajnx3usUlN68cVX2+xI0LuENtaGQ3U2jTjeKCsYIG7PMkHT5iiaB0fFkQuDApjrByFfnhK
zalPiVOtMK8UC5ZNfJ8j3w1f3Fw8zDX9zebdpvCgRjYiLBgbXO9KVt1bdV2jBur+2yQ4Ut7DkkPm
eAzW/3oC2LCWv2SVzfYYPyIMK4ONLmEuCSkSOMu9Tmy5fPUIPepyu8EVpPVoJ3CyRGkcbjCFhBxZ
kx8Pa27rkiP2YjvTckdvRoM+hdfjOoKWTHaWCMg4MEjc8DcUNa8ldttPumwp2WGFenlkhXW63lc4
GvfyOqY9mrhpW8kNTJpCkFWPyke+yr1KC/26CX6PAEq5yeY/fhXtwQ/CSaV+siQ55ngrLI8sue/8
b1W5dqkccqeepEvdCYUNXx5T6QZ53hxo26XF5AG5PeZMj6pqamg3g++EM738W0Yij88YhZmQC4EL
FOUl/0U+RxAcg1KranNfhemESOLB2vM9g/4RzzMOJ+KTkOFJS6RWQAKizQNQug2TOKucyccMsG28
SKKtSTqEFYYb9mDjY+Ax+xykGhHpT3BNjtxBvsgZeKpLoMtRVExiPXvkAu4JlWh+335FWO8s7ymQ
24/ymgYL8ETQ9/Be/oBBGNtay1NGC9YXq+cP7/04Y4nkTylyLyGK2JOxcrpj462SZzBAlTwhb3vD
CLvUiPse45pwta37jaJAayWhcKfKitvdVTefrNE/1WDMgpPm2GmdBy0UGe10vk3qJIYSmLY4T5F/
3UVhWO8KwApgDgBNaQMPuWqarUbHTWpxXZKY0jrdG3k5dC1yuiGLEC7Q92Nro5c13X2CBwWsrSjQ
XGynIw9jG019TA2Ccf/T05tAqTrhf6THGW/vF7EsNOIqk7ywmo6lrcJvnujQJt+OLY5BXpm3l6QE
mMX3mY9CoaoS04KQElbYhOMKNWit4DlHYQl+AV1yO4d+RaEkqR+Y+nF3n2073M0r12uSOoLmDSrj
F4eKHWBsmc+WWrjorygifcUbOUDcFjaCVAQfew6XpXeyq+5iKlyN1nKjgJCTczLAhXtWfwo0czIX
QQoYjZx9pyNu4XKKrXULXahzqZHbB4oiWwSO42pSPaN85ukEnSoHARZ8mRM52B3IN4bvtbkn/xte
3BmdNy7BKCsljzUlvVumBig6/KF7URUAkbkGUJioZsiJBG2JtRXAQm25Z6L3c+WC2UIlVJ4HKHIz
YZLCnM5Dm3K6ULW5GHAzTRa7hc7g9psMRb9s8KLvWaFhed32qSIG3PjhQLAc3NrhalWL9i3qnIh0
ipGuV+cUVwTx5yK6BJHRXgJ+p5xp5ThmaFBh5O89sgvjknMpjQdKb9eQaY+J993ot1cll6wzQOVd
psRcB+MJHv8WclKgIUbb4HUNb8EKQjOMz3h8yutijrM6DnCEat3r0iM084aLMo1K53zUikc03dTD
HC9n48BI5nmZ+BB3DOqN9odLuDGUoTylinTcOE8L2F6TO5yKttsOjFkEWuNILAbRrrzbL3UGbQ38
mhGB0bMm/b1WMDpUzGEcTVtvzDcfIaHdyvpsfPBlI+qB6vEKU+jwR6jWNtfvZJB/guboqgfUjBUJ
U+KbhFOgpGM7ClA7fAta/4U0SX8hY1CBPZLXAkWWdH9iiYOn7rT3wcDGWfFcIieDKqGrQokmOj76
YtbaB8I7n7GEQX5f4H/A5DTcGM3Py2SjQQpSh9eX9xfY69USNWiZAfbzZ6EWAk0ujMtE0J2KxGsB
LrI7gExNumzxBWG4a14V5eM+EZul5m5gHMddTI8TXgacFgzvJ280scORJWwhasATitYeAcSmuS1J
mysU1qhARwZQM+AQrmo2uO7vhKbNVYsdstjnl/jt3K6NngWVP/UB361MkGn87c1PUZTu8YuhySlb
2n+mq8Rs7WtMsksgusoW8xiZFrDQZNpD+C1i2EjRufs3yG8gbaCvWEIoa2O/CKkeCvDWYchhhU/O
a14nWwjnqSdNz0POz7nm5N/iJcdxbShOwwQxFjyQrtqtiAwM2+MLJXUg9fyelmPc0gq0PEkFuwmK
ibwmYray5Ctkvfu9Jm9QMJebe9n7zBRe4Btha3XcbNaiXMKv6sR+IWFDr0M3kDwP6n1vgsYse9Nd
b6IN4e992rO+EpD6h/8hvOCKQxSZOXd7YdI5T0LdX/Ki3IPRSg4s+IDJywezoutWsnIdWXZfUrYU
iw4SDj+zMR9thZ0X4ZllnSB57BcdU+hzD3AFMUuWpG4dwRcCXGC0c7bZMSyXc1oXY5UPJRHbo1Kt
+k4lPItaaSFWwSxHdwM9bDu+7o/JRqIVt7w79WB634DdCekRXf2c1T4q0eXsH1ajFeP0PRr/KEg+
ZrKrguxbyh1iNcdZCfT27D8iugVIx2Em5xROfadoGWQgi0lX6/gdbMOl3v8jZ9LpI+0t68Uf0AvN
FawE+f39rvrVN17hBHAzNTR+2U+o3O73RB4L99kn45dhD8zwn1cZVd4R3Ox6BIcWFM8MJ0VkShjL
Yh1m0yBbbK+XsGFlGqTFjsWc59heFTSX1/MQMmhHY+j55aeGgK4OgDOMIH8sx3MnE9bdwHVedSUE
4nsTpQ3G/d+UrSRjLc0gzSh6I6oDV+1WCpcbuS7gXoA5l/VR9qBPbpQwbNvA+g0kzPUu5GNeyBdG
Xeul69AXBvZSURCF/T4d/uTbPP5QIcstbOij9PJB2nWIhWhskPOdvp0b6xz/BJgcaM3Jtyd3KT/n
6eMYFrhiTGYY5ZnAa2c1RZoTUZE1GGwFEYaP90l548/w+XTOlveZqpE2aPZ3xdorS+TUlkc4DE+k
PRZeQhp0BZNaI8V55XeEAuyAp35UOLWqN8Ud7OpIts42N2wv4MwC3PhOgIALrcarhE+aaDBAtswd
k6urnfSrOO8SkoBoNZadaFhbV3u8b9K7XQkNHSm4Kgr+Ls4RSsJVjE4Sw2OePVMjbNOJf+eag5MZ
Iku4VyH8oNDjrnLvyA/AA7R1N6zWBJDrOIk9mk/NNGVG9/ywgXt/L56y2K0kb7xiPPNbbI4XrVb9
Rojil4FDYQTBHW61ePcePLeG3VADmRwRlTFC2DeHGjPgEtq1EJbiOXBcIFxTNI5qFyNbSHsqVk2U
OsOv5rfUAmgo7bfmJExUUHMQXyUQqDCrWjs9jYPHb5FVgoW/zxpYXfESHts8P+w1foBXy2nmezdr
Q76dNZFC0nq4pdV64dia3dnRPu6UqQCd3xKLtYp1/lavqZE8nLCP7hzorgM/zRleU33SHicknF12
V03jQr/xD5EnwgahuXJIzUpe+BqIKrmY4iIsmrjveS+OBn6/UksKrF/IYPqUthA8EnWcnOrDeWyH
1H2HzfbUb5AWQ0dAAQBz/tWvQRijZplCekiofX0JssMl2dP77cWDW4EC8DOiyO5Jy4MzXUHpVs61
LmzAni9RPT6zRpRwSvi73xxV81BqmxnXOWrzk829X29OihaiiMxhZWQ/KTzbSxXbFIPCwCQRXbgc
cxspYvPSLhci256iBHd4Op0vUgD+5Kuc1p0/EALIkEvB8CEWQ/Me2n7CRXaQJ0MFgBJkjNlIDRfp
38dZ/XCaQrUugr3UiFpJgloxws6YEdk4SvhaGAtbUcq9HcI5ofOuyKO90dlPB/1EVIeSVrcfT/kA
4S+cW+CnZdW2whFyiDwdQST0jvMTbD6qH9rwbxVE2e02ERvfu4kgFjufKLjcx17p8ZzN0c9n+PPx
dfcLfZIo21Esno47h630x4sXlSRZA+YJHxAi94HTgL5I9NxBBP11QYbF0myd7IR5Qhq2s75MjLS0
Ulw197z2Qdmagqjv3CT+S5UnFUZlLeI60Bmg+5ooq0hI8KKNvfGrtXFMG7339ZPPAhBAcNs4jWDj
1rkNJKpRd9SjPmfVjryS+23lS4a+qLntnoUryGDOTcZAAwHMa8V7bJGwi7UISewFrdO8dzBvawp7
pr6OJlyWY0ANoR/RqQ7GqHlbeRyvWNEuWx4/tAbPgmbIqLgoW9l8Gu9AGb4CkvSq4CyXnO2pXLdL
r9Mc07HWsrrM1lFzrwaIl6Fg1qdaKFnGpaPjmR0JObhbI+rxIOQvupk2gB5hmUKnqOSWTS2erROd
OtWy5txheqmuK1ki2q/HwSs99a8qO8XbFH/QhXUVL8PczTV/AeES11NJTKC2vCk1ZpHMhgIHclaC
RjxXwXVO2msNIpB4X1HowWtnMzEN1GnpanZsmoxyVLvhOev5a32XasoPJ03slGf6MkwN/LRFTtAF
MMiMt/8vHtBa8GJCxvF8Iq88jzdw3L+2ETAgc12CI2qHh9/g2veoc485ptybZqqe7y+AtVd1Nmn+
QG2KDV7Z+9iScbaD1yaNCFTcrxmCbrrKJB8PNALXN8rkrnp2TijXt33O3PS5zDhQ+nY7cy+SOsBr
29VjY+fCf0DMN5ClA1fsa/KkzY7Y807dhb098hz+WuZB1J51Q3rq2m/4Nq/48DqD2rh7KJpmYNU5
WFo4VQ1XxDQgRx0SBN3gbvg/xlXJCY3jpZ2CqoMTn3jsOXCVvcDCnofgPU0laD1aiqCDxUMNTuuJ
8x287ivBRtnmPR5keIUNl9J4iWT8i+d913xOBMlketWlzUXL5ONEZdhOUh8xiASads/fknn1FYuV
90KtV8JajxISqmpjOIfRvrAGMNoZlwxP/qqfvGgNBDrd2dyB5P/uV4I9UIZkyD0T8R24xGkxZsCQ
5yyB244Q3cEHI5F42HjD+7JqfA2GX51xnpGBdJ0E2CA1gjb5OGNhrCGg8lBGVctyyCfUVRsTLMcc
QqA3IAtafy6Dj+ksznGQ/sKBGIxMNLsNITv+TTm3S5Df+ApsM0HKCEZ5xsD+yaoi2SEdSg2dYL0T
48h2liUYJvmQez1jNmT/xEKNvV8t4agToS/T9sZZJEXhI4E62gTKXwbyXVmmEtDp7UCn8SPIbfOz
09P7YgHeQWpoT38eNLBg40jie8jH3Z5HgJg/chBf9AqpIxANPOS0nIcU8qcBH5jt/4wmEdUX13g5
LW8UEiM/2C30Tq7yjjmyWvgusrwxaUhKTfNSOct4KTObNUsCq/90NOvj1IhdgcutV7fFJOqcDUqK
jNtmm53d3jZK1g/pZvbZJvWibwkdJgbooNs3zwefTU18KHNZGRVu7fzbyXJbxxBSQAZ4tb7PjbdE
c+rwksiLx5SiMFFVqUHvvT6j2TYHlY/TAjbKD8uca4X4yUFCFIkAorQxydNX38jsalpP8ylLE+2R
jZ7EnnBXFyQ+gYv0HQKE4ZqledzYObFXEPRcvtVwHQd4MbH12K2Wf6ZQ85Z0cKXl+ohd616NBf+n
qgpW5V/DdoMID3IRVDUKfiKvspYUZvwtyd+8MHkqt/KG3MwC8M6WHs2S0Sa0BjYoE3CXvp+18mnl
Sr+ho1zOUgq0zhn589LjKRHPLvEPTuDR7nOIFNIODiAlXyR3ZvnC4U2PCjerYo9L+1M5Jjzo+0yD
i7gmZOnxzy13JrkYdFdtcZJZiJ0J2sBaq8R86y1k2Q5supvx29rEPI8cqu5mE55ebh0srxg2BBb9
hnjLpsweb7HDUVx7K/BDe2MchUwiyfzxquhO4+AVUaLyIiNDm2MT6lXy7PUefPj0Vx2bUs0tdk17
77ZhbVOF4zn92qdhzDEhEQsUT2LXPxD9cnA0ni3FLowV+Fj+SzCOEs8bAk6ukorftniIC7b8yJrc
1euWgnMq3+O4w8bGrWr5KV2dmYMZXNOuQlD9ZhW/nZf0YVRsWuEDXDZaWOXn5sQCH3dQwb4sCke8
FocjkjNm/BBWHJR4MXcJyQgJoM1ljCkgfdpKe7UOYiaivw+IWqo9HKzyc/Mr9eGCj/1iy3BklaOf
4CIUBwKpAIRgQsMlU+Fohy43Ohmt/wmBef1+boQEUl/+sqNYMx9te5X44Q9kretScJifESEJ1cTu
6H+3e9iA+6ifZNWbP7CfWW1m3n6JBFWEES9zsUENzaNWAS+RweVu+DqYnKlG0WT0wLsz5znoKKl/
HKdfLXA1gGuDkkkgKRs7tD1RI7xKPNrZZNp8hXV/uPNUEz6NTZg1UmyMj1HiGsM0PeoIDiG0EM8y
u2MaQmXgSyQG3/KwaX73PyzbN+rVYu7SSnShq88dwooZUfm4aporJEx+Bbvsz8ttwKFF4Ov+vbqo
pNxU8jPvw0tnt6+IQsC+VYVimxCB1QCbcvufcbjOJwLk6HVxPpb7/lNItng0qRWnIoKeqmous7sB
ZFrTU2eqqJhQb8M1zjchS0p/PUSF6L4c1amPXQpDaaLilx4TMAidYHDRq5VCqqC+Lw/MlWkDxYbI
LHcZfyjh/Bx/9ULc6PIYop7lu0+hCyftBOIMCrJN5FOmRVa/4Er0Gw+DoVqRS0gVFQrpfCKDxyjc
mwFtU/qQEyxJNL9Tvk5QAhU2NOnQQSiiO6Q4AjjHIkINAE3qPgEyVKIchWsRIRv8nu6LiaO5+tvx
rT+XK6+YuOovSXow9UqKFdFBXwNBmtDFn/iYoU+EmIkQk8Qsw+FnhfLIDtZMS006fFO6yptubTk3
ehs3TfvDyCGb/pnZrItgGUFgSjUE97Ci7wv3AXlHuafFwJtBOin0Xsk54BUa1jIln6AkmoiFoUeN
m9PdAgFY94rhJjZzlD1mxGoPbeZlSvsqXawJ3DxvatZNPvbf5OZ3Ec8+IoDBNEK+BywH/dOcA4JL
Y0CHD/hDhqRa8B50cqJRaWScrYiHQB3Aaf6sAgHqJvvJYGbgLzR3bBqsMryY23UYWBpsFxUCYlwo
BgBQO1ifg5jJ1A6IH7AZiBmtphD2ZSKFy0YSMUOwP6EQ1QOk1cZg1ZM4A6pjHLIRDwsMY6KyqUOJ
u75BFfCU41ex3I94s+HZwoO/JqMxaHiueE1UllnTtOHxlKXOChyKGdU2wvIL5eDmjThoReg4ivKO
IPNeVkwdU/6lfoxPYmvVEVp2vzA8Em2xY6vnH7ogKgY2V8OH93IYbvfh6tTYvjA95bBI+LV1uhfM
RJqGw2wkGlS1WXbTOo4pWx6OHQ4eb7Xh+l+IbEVbPOP7Mk2PmWxsDT+5chlwxNFlenA9W0GbR9bq
poLXiKe7wihki/YVnr2zNZplPeIY18XTXXBq619xajRUwbpXlLzekbV94PpIetDWRL+Amh5Pae1A
ML8aCYWUXxrcqllmBpZ5UmPCYOc75kqH65sUEikEdjpRXwAoHVtvZIxic+8ywKNpx+Fh+bBRsg9L
k4izEvIQOPYNkfGNlqe8Bo/asHLgQRMn/P76/2+b86+MXIcQThplIZ6pBsgbd0EgaEK2Kny6AmFW
9+ZxpZNR03270yVWV9X3hGlFIa/vLSYJSYy/OV9ZsYaSm14bT/lXHCIF4N3Q2sMJAmNLTDjFVvZ8
QsKS8dTnl0CZ09lMp+ruiZ9vZKmy4Q1aWX1eUdCnd+IoRgtRh6QQnJQRRYGJNBohO8vmWCtVYdk0
hHKmP8O0oJchbk+AVcU/bfbxdECC4yvPwfvn+uT66r97M6NVN5NWLJuKz9cSVZsmot7LkXejm2s5
yUaBOTQD1GzbFa5PdMhMkx9kH47L2UlBkT7lfaKDoEe2H809uT5to7t7VGFlO0QGWJSdyd74Rg3A
ltcXy5LTHebXaU9TqCW4J7ZROlpTPLgD8zR/mM0UqM26tBItpQ49r/GVTzWvwarDivOYEIXejXUe
4z/tc0HhruZgrkrxsGsG7WHBJsCJpyTrjFaA1XG3r/aoBCq4TRCQKsHWxAc+CRLhg0W7ES+068yM
NVNzwlcMZgmfSuU5wk5GisXLPteKwlFxZoGzp5cuHJCyaKGjjXLHbtXLkAZQvVNjeE2pD8aGRCgV
tI7i0SB0gdUgkCpweMJypDA5K6Fuxqo0L5i0f2kCOc4aBfKbCYbVBepay04E4IB2Cgrm85zHri0c
lQzQE5WNedtm50BEwbsqpeZ0y7Ug24zmeKoMKpNTmlsZTHLHNhU00Kd65HO4g4UCOi5NbVTAc4mZ
DW47UxG+aJiqrxtmzAL2MnUDGvR4UajQ3D8hpX9IHKVAFGjHSZV4s1CPmhruQCPjOw3dc11md3WP
s3JCRTLKqUNCilN5WG2f7Jy/Jxai9b1Xja32MhmsfDBexRpvH/MsTRVvc0EV/IXV+xTTpcB7q4q2
ncULGvs8EKk7BIgDlOn/i0Rp7eytfm+LA3kzgdw5ZILdJ7iAXOap+xg8KV/OAj5LmMz/1L3cYsSx
vpVouJJ3vErH6HobfKdouFUkOOb8eJLm5Z36PC+xux/MJwYBfw99sF3j8i08t9hV2/+Vy4HMvSww
IApCwr2q54K44ElJDLDmDcTj21m1YlK7s4u2HHTx38/7z/bA8RPpihcxps8jI+MDqR+SfA4BLa+y
olz1SnXPv69tDlN5mt+vvaTXKoazUf2gJ2N5hRvtcGUoEt4jCKYazum80XcyoJpGWuzlUFLbRgWq
YcTQe/0Of39ApVH0mR3JjtGw0VnKNIhDdgeVlHFwJKDijeVru6/ht713whiG3y/0wSyeE6Fm9NQ3
emstjPUQDs9YPgyEDmUqN/mki000gtArhbfxFVG1SR44QeBnQlV0+riAGJTvpV0CxXE79H1bwG/Z
GbdVs/dMmNcZrqfaQlpqbGRbplseSZL7lSFneshToZvcdi3BurRvAYEnfWXBYmmEvRpQr1F6BCae
CNtUmFPVtlB2oR+cl3s8amwRDIgC8ZxJ4HQeORUg4VHuRC2IwdyAFTw+piFGOt+xssIpqYmelAJo
lfzPBA84bS266uJBjXGmXqfa7YiQ9FZHsZ523ZC5ApTOLtmO2Rs/AKfZ3xa8h828Zz/rLRHyXPTJ
hbZ2WIcT6tAB+XkzAeHlRF3K9HyAUD4pXNQdTTEwog9hMVqFWxPgEdD3U5Ij5SQgllXaLxMvIqi5
6hyVFO0SS0/uUV+NU/BA+DXi3+FrY/Hpc+T43FMND0BuhDN/99seUpDLEIo/9yfrh6pUrP6iWlNs
kbe7giJWF/D1dHiD0Xx5HRZYuNV2tuT2VCa4BUjixE7THwSuRvdW++x19T/kb0FBLMxriCo3lG5Q
Bc3rymApEIQR3/ZUxWRh1HQSaLTpBFWfs6WBlP/kAXO5Cm8OkRFDJphcNxlaEhMlegDXkF4ewNJ5
BrdAkA5XmxNP18Sm4xsty+gpnOnCrY88J657u1LWHTcMp8jnRmXY75o7LYEDBoCUIrNZHzHSboZA
wsCnlLzCYZNf5A/ATXyp3lKVDffcgM5DZw6GdTGGpKBuAdZ6RqDohk6bn6Z0z9gPyLBSTvcoDsxh
GwM9/r0JEq5WLcuf6s8zVYDfrJZOCVFX3zK0vASv1R/6z/31hxriuH1j6lBffLNbZZJhuU4qMrXB
5KkplBsOynJcOmxRP2I5paVH0RjSDzaaAerFtr6q9tZt9qENV/9sIlahsVD1z0ZB4keZ9NDl9dPF
6IKP64LsWDHxcWKapvVQ+V48KG2OwqB6cC+Wf4Q2I6kj417oQJpaABMOPRbkunj53RKwUecwchFr
C7iQsSrLVENNVsRWQ767KapUZj31HNZFMswFxwsYcKwmDXyB5l2zBeuRYPuRw6YEULb+UL0tVupO
ofX6FHwtFyMijXcC8GpPISVimbXPCgJ5DjXdbM7GwmtZZILhUp6p8wbWQjnoRnyT4chxw+yzImzM
tI+tpk77EiXdsCaJKxEco/u1YpkePAflV6BeZ0rGO3UnHHcavNChchn+yX7OTC2rPAJ4h1B4pPgx
J9Sau/5K7wVTZ4g1M+VA/r0ME0XG32Jb/3/2CHFLu5c9pmYGmNVaOSwBFZvTjBZbIGjO7Z0OW0v+
uN/v+dWQwnF8MuxuLZsod3D0voaCHiA8m5Ept5g9rUjnNDg/lvaBSjseaz/ph9L/LxZencpFedHc
zdwue980qNg3u9vXa6ll47cJn0UvY26tFjY9swYnBr1cGSxirznZqIATraMj8sNKe5GVXvS15YJD
lqKhFbTsjmQA02xXNi7laRsfh8ycYgUmczB2U+JNJieoMB78U+B2M+7Spalga7Kw+4ZY54tRpaXf
PtDW/i/KDwVfQwKaw20izGh9lvmEugNQ2ARLIhMkxerc+qCLZwmMIgPv6sTQ6NnAYaKQ4FpPEm/w
HViwXnuGjHj5XkPZgKrfOBVkBxOBMgJlgfcGagEx9HdHlJHg48v4TrBWntds4COlgmJvgM2B6ITH
qxi4ca/oyt/z9eQltoY1wQao6WkAZaoZFtT1Aq5USdOMmPTh45GeZIk2c9eKvuv/Wn92CcHWfJvd
9H8TvIW5HGcTqXTLjaxAdHdurkdxWpQu+JbaHy4f1AlC9/WYDScT8yReQJv6QCiMLS3VSWf9FMYc
6prnI2q1XHMLTvA7Lx8bqeqnywSOB/gPHpt9xRil7vuiCyhvuFawx8zvdkZO47mXbJDx6bICbMys
Ip5OXdUEBi7KSBPNXsOczGYteJa1ZRlG6OyHYVjYoCQ3h2uV7m3GjFR1y0QAAb18CUT5JUVS2d4z
r1H+pt3rfY05INnTg2JNMSmN7GDTzo4U7Cn0ed4eqPYZK+QZAdCMBhV4c3y0I+0cD9wOQaaKftvt
aDDc+OJkcseQJCIxV2nBG6eGgNEn8hpdBfgOT4dPWOpP9IWAuJ7uQkgBJAY6O9YliiHaUdsPIrZx
xYXZzDu5ona5J6JnqYiJjfLcaWjxNvA1uEIcDeC5WNuvUponQaDU9w3Pdx/PLQKmBMEA5SqyVHAC
gSzEUYG9EWJEqUBoOIcOxd84Mg6ju7aMUU1gd+KGdt2dltN9CI6ULa/CAPySGLDAH1ve4NDQV7U0
smU8YFFkTFhoH3Lme/uWhCyL6b80GYlxiuU9fDmuyPTkgoxhiHVjIX8MQhOQ7lcPByP79BsP4E2U
JhNZepOUqZ9zb9kOQ2f07Xr2DJE8sxt0owI3CyIkrX4hi7iz7a9hmdgzPGgTtHLmPEFP+1SpnSQZ
FyBXC/W0+jE0IOP5YjpB9nvKiFKoPNlHbXfOYO4Q8i0i1NM48scfQefF/b9YZJh9CQjHR4Q+mOCJ
bIxc3cW6ysX+lAvz53P3aubNvfi1bq240HAdNYvXDtUZ40DI35TzHciQo8Zt4mlZOLcCH0I1iMPy
anZssKumbxvqKWUKr40aOjraARTBXiIRiIiMfnzYjaAi9ZKFGKnsudVEzljwhK/MYE+UjG9Jlaz5
I8aVZQa5bYMcHX3vKGUYYJ1FlS8sA0+21Jzhfu5x0WK94aCCmVUyGsI4vsn6NJe1Imik7ZN6SCcA
tSnrT8yGHBL3PzvdsvCiIfu6kTtAf3yEMTVoDRVIp5uHVGSyrtbymkxUvakc6Va7jZKhB2xkURpV
m9lO2DwGLXqlmK++V0TOxdzfVF15AIazkg73xDPGlqdmQiC6EQQFrC9G96cf+NZmLTSajOSe5xyj
aX25f/Ta+gbX38yWcDqkDRhTv7790FhZUd9ClcEyxA7MVtRyYQYv+FzcK/h7gmHNaJwlS5z26MX7
P8C322adoJraBV2MiRdUn/ed3Os3jnnOri4xMuuH+5xZlwt3Ug3kohBjYueNG/tmvbtKvMXRWFcj
5HzrDjqRRNrl7mIw0o7uEuDznRy/YQMLhr910ZWXSbveKmdGGq0A32bZ7MOC8d4KkTtcTLOa8StS
q7SF0qEcK9B2NdpaV4BMYfw2bKxTbXUvbIOmkq7yUjwJ5/jFHn0krWNRn0ifV+ajBcez085dImYB
vav6t/DzWt0Cug3UUS7n/Pkdqk8i7TR7P7zSyj5BSl0Or1zbqj1PK5J8F8daDPiZxyzV3BM0iqz6
s7kc64kf88mW/+7ifioywCPQUCKvaQoJLPARINpiftxSZFRolmJHb4zrRwBbxTNdQ28v8r6OhJpx
f4nYXM3XFU2DWRBziZsENoJNjg/2Cix/VROl6WaceRan/LizcWbEufWcCEcEUZ10ivCHRi6DCHc6
E8GFyzJudiS3CxZF1/TTVFFxTRh3ijHUOwzbeXz0nAch8mQ7+DgnpEVbP/vveSb1L0eYXDnzoZt5
V5QPY3Dl9eC/w53Qzr/SqNr+fa+mP7k6rBa3pElue753hunuHuqxIA2mGngquu9lmr0wEiHjVHD8
RAShzkqZ8LNAE2F72C6nEIFdoW6uyB0hP40iRAcexyG2QbHiphWE8KZm/fxAP5FPPLljkPce1Bs+
NaqKOdo+dL3GC9bPgoPErkeS9itvIrtFCgOc3PHLTirxWAqclufywBbtEEINzS1eiKNXCNTYTaWW
3U+o9RRGGbiRa4QEdLgRIegjHZ1/ssXJXvxkc0InMelV4cIBTL0GNWV40uU2DY+9Y3eUczNu2zPX
T7VYxXfdFMvEmnoTt1erINejbydK+rmxJPKxK2xcHaiwMOv5JF4GRV5HkoaY7AanmFRPVcZW7XtF
IB99FhKlLXQ/FpOxZAqD3Ltv7D8VDQAnu4gbsEj6YputsCy2rgqoxkki8gHuuzogX7DfDkV2zQy2
IQ65SXbUN08E5DQPhlud9hJXfEPRnk6yn4kqC7UXiJ3j325TbGYjiAP5NX/Pz7KF2s7xdW+QHht3
tinOvP3vHVT5Aakuv7CWb9HH5fs0S7CkDKjgUDvxs7B96NtKKpNMyytBmZd8dl585YaxnmTfhtAu
30xDCPJVmUWFJ9nc4qSlFgPiFVPDm7HoZLEAgFiNw+HF5RKdXlpEkuNdPIGi7pqb5Q5dMhap77oA
pdhQ2SyxUkxAwUYmJtSonuZblyB9+/aANbt6gwEPGs2Szo0fSEfI9I/AjuK1WqdoIlTjdTfohQAJ
mwfV+4K/hkcdCuTCoLZ43L0ohcd5KU/B5Sc1IPNHeuPpRp30vMmh1xGAvg3t9Wol0MNzAQ/nM6ML
xLhx30KPxGKy3XkIY1W7H7fQJyrmPrbDAifKyGMrUJxEYopACMDnEJMeycXCD4hdllK8V2k42rHc
3/Z+FKjskv0lNSgE/sJtRJw+wjYz4Gg6oC7V4pBBi9K13EsiUG0DfeoPpqmNwjJyix0bmhG45hCB
y9zCeZAibLzq1BCYvidelk+FFim6Du9EeLEbasbz1NIfxzXI5eFqWehi/h4e+WGn3Oq80pzxuRwE
b+ob/cUDwRvSFBTFHYa0cE9Le/R8yHgeWg19m6lCMo4B7ph7vL6MXRbAZagx/HsiDFfYxOSGsig8
zAlXHVNcx9MUh92bEP0dp1xn61kasZZf3EtBNeokuZ2L55aXAZo++mKDRORgzOR3AcZQB2Ec4VGE
pqYrtWWkP8gFP/tkn26SbAo9eXLvBwVQWf7pq95lea9H04GNuwbXig5+MIHkWiIZKYsM03oJTPbE
qklTqWKQJijHLX+ByH087Ykm2gI3qVi+onl7/e21Qd+hCuh9uBmx8LAAW2HWulW4VOS/NP/QHDmM
qpjJA9UurRjN9hNXlXmm4vgkDxWoySBRxIgNIOoR51hawKccKb7uK1J7AyzEp0TMrA7t1y6Hu5WM
aupxQjUsUZHNCkKI5Ms63w7bx+oKqS41IaAI9Xl/mLh+nWHPIYioBvZFOuulsh+PE2wlT0VgW7Xx
Ug==
`protect end_protected
| apache-2.0 | 8e287fa2e93e52e0d8de8d53835d6b94 | 0.951479 | 1.818393 | false | false | false | false |
mkotormus/G3_OrchestraConductorDemo | src/ov7670_marker_tracker_use/ov7670_marker_tracker_use.srcs/sources_1/ipshared/xilinx.com/fifo_generator_v12_0/924f3d25/hdl/common/synchronizer_ff.vhd | 5 | 8,637 | `protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2014"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
TzIiEMtvO6aATpAtL7cifRYecx7zo8XqEtOIGl2U8qAWu4EPO5yX9IJNXk72IOS1ltnUXQqR69f3
B6QpVjfnPQ==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
DxJZUvltyEq6qJ3C722l3oEd0ejNiidFAUUWEZRjnajRyvuRKM4LnkdgMjQh2z1Z9JnU19tU0Sh1
xsX2zoJhW1PNZr3YdKS7kREU2ZaIrR2dYK7qVamHmjMmsyAYqRESuxPXEsNLBBG9bizURmqkRCSm
Yrlp1QWTnXwxQ5hvnC0=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2014_03", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
Hdn4/V2pUq9izJyUhDCyZDTwujvykX/eyFQ3+UnsybE7V475vPzplMT4cOPeFuUq9BYQ4STnr277
iDaaRHFzLn5ct7Tn1XLwWw0gUj9ktqROMa1Pc64mnLuJXtw3JUM5fVEaZCR7/HZpGAtV+dHw/fAI
9Ddt6mZ5FSiEFgui0xL/koc8zo1jac4MMeBaHasqb0T5WRUws3n/yBxyACXsUpNEiEL5UNaGu5s3
S16xeAuK7SqIE4DtgxqBYYWx6eiy3Ws+k5on7TW9LFRC49uaVchs8B/AiYMXmx7Uk3R0XySa0Jla
wy3MR+rjV+p9WbTFsR0Ia+hiTyVluC6nuQ8T/A==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
g7/I+Zv7t15xDNb79Z5Z0LdkVeoQuvr9vwEyA9Gz7P+XXaL3mKtC9ba6fHja6T4sIcW9smQKlrpI
UIbpE6b7wC27IdfUaVenB9eSLp1oim6Ym6iOVaHIzIY7MOyUhce7HOsye7kinmZ+2UrLH/XU/swZ
CdXbYeuJcBbKnxo2e9w=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
OEKn+Zcnj7wYOTFSM6WyEqNWHcPmFfVh8vYwq3uT62xdINEZ8kOtiTDz/W8P+37aFQBu392Ro2Dr
Dpt22eyk8hM6CwjpHmO6+pJu8gMM/Iascx5fxY39tNbZJTPdvzF3IlurziOuz7a5UySS55OmbTSW
WhFJ+dquq0sO+XSnH0q3dR+FSboyYyg9SpGRn5PKwD75+8HK8M9Jnxd4fsxFvgoCNmXBNng0XbX3
AcX3/VkKpWTzD2/EdVc7lqcH64jbK9J5vqeE3+wIlaS7tPDigA5VeWPK1rCcOEO6FTvl/i86DYIO
i+IdRlrGcK3jiZzWJo95VidfPqrycYocISMknQ==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 4656)
`protect data_block
WSb4NJMG6tDDjWuGtoGDDfKJTo5PrXaspzv6esWhmkP1vGrKF6CTAmC4qVCCDf4MJ4WgSwdNM5ki
fiiidiYaUn+oDj/tbwuG8QUzt3WO/HILmeEf6ObuhlsD60ijhw8ByEtRLrorvTdQpiaHbdo87k5w
y5m302HMWD2lCT0HEo12CJLE+yAyxZCYNc17s67OcbW2t0aDuzRYAiOFbo9NgUMq20qqDorQtoAc
Y5MPw9ZCgudWCB3TBZ7VvnuvX285JWC99RAnuqv1Qxl4hZpnoE5R1tykpZQTwXfukKLMFwPFxbzV
WCPeO39n3bFZa/VEX9grbmi7HEO9l3TSuA9f27YFwVZ9PxPUmA9IZjyUGgPJGDLXBagY/gWe+ngP
t6UyujhbT5TlFHxioUbwL30m3kt8XpRXDiHvu68VnHmun/zA/DwSujw/wBlQIpEMq+gjcU5bKGF6
X8WPiT85YE08r2ABY1y09QFpP3R1BTjfZfRNc3PZRC6ID5Lhw59XVACLTKFihsOG6QAIx1CCLtM0
Og3AW7i3K5C089ykfVDvcWIU7iV6+0Uk1anl5REQ4n69eelsaS3MZHo1HPnjh8fNjhLOQ0VvcLDs
hOoA4twQ0S35GTdFuyG0CKPivxEqpkWLtodYtwMT6TjTfeU23CxdLrzbZ/R+ERDpyNEEJ+9jUIZD
5HZjkLpwOVV3fHv/Pglmc+NURNEPiGj4Im01Wo/21HV7xprz3hW7ga9eaJxZmYliRm/kF1allwzt
lw1cQxVPlkoDI4MUo4iMEwjhZ5MbIFgStUOpEVyz0gRWesrQJGEWoXfww1QXo29aIxIOeTzkkigI
QM63Qq2Mm7+lcv1nTWfYP+cTV92Sl4rrAsJdaj0GUE44f0Q67mwsed9rEEqaBWxIQA8fEUY2AO9U
2ATcn13tlWv944Qd1vAyNm2/uqVofRx2d3dpvgEgIfw5aXQEx6zi3tvP3RmImDK2EL4tpLGKUevs
DCO6i+eTjB1sSf/Dtk399YZl0kaDoh0c0zqEfHlgbsiEpsBhk8AHBkXZbXY8AWrwXa+VXYarICII
GHEtdx/aHrUR/RXeHeYQp7cfOLM2eCpmWJ+2/KBJFtylwh6kzur1gGXLljDa3Td70GzRK1RjoET/
B1TMtHawAS+VAEmV/RKWjuOKVsI10oqbxEdYKFQq0SLn6c6+kZC4AevLp0n3IeHW9X+0X4ceF+Qr
StUY3BscjfRhBpVSLCPtKoYCXOApMqiwmZIxaeVZ/KWJoi50HB6aexfsUXo9ekUilC7Mw8jSVAhN
JmxA+QozVWJQhPhRt65GaMWcn/pkCK2n4tyQ5Di5Oa4t7CcwYYzEXZMIKw4D1iSo+RrcOmAArvYA
20AQyfQ7C5RsSFv4ZexQ+5pW6hPlbIkJOfn/YY3m4igIvfYBFbnE3HV0JFR/x7i5aqFw+GTTw4eM
+h1MhRZFQLDoEUoMk17F58GxJ8G1JYVI0ki8EhRGTWce/f4eLMTKdv0/JjDIUk9inxD3GeTAll7+
AMyl1iKVSIgD4moN8xwCfunj+PSULyrJkKGyohYicZS0YOJ3333chcq25BAEYPGj1JqN4xc4gjbJ
E7Mf0+BPIpRhJ3iS/Fqp+v6QDDbP4kTgSdO8wkaWOw4xJGh7V3De7lvOAUXIbxWHGUveFn8yPLMp
vEbF1tfDaumkiTvMCrc8R5rbK0IGlfzzbdUHg9ImpZRawRwtDYPfIdKXEUiEPgFBSDF7k+wvi+5l
9ofXCh19oRU6wJj0mfNPWpgXS/pKoAuAuxRuzJQN8UlWQ+i7hld4nMxMBG/xDl48gx8uArmXCKoG
lBg5WXYMzGRWc5CadnsJ6b60Zh3qRBM3xNns48gT2F/oWwhk8K+eBKSk9vyVy66fRuAzAGOscHJZ
k3b43T9ASyteJ9rsuoJAuz3vUFvrXzKyXPK0jvITDvg9/XEqIbmgePV2jCIoLJxeVxMXSWOUcAMM
IO6J4ew1E6N7ju4MI1blppHXzH8uzs0fXqFND9F0nQD1xC2wTCsC+mJ2UhPAa2H9v6/PdBYhvw1L
fE7bzwUBJoyZMfTI1X07qiD+qh10TiyZtgTQiSxi4iTs3Zo4JExuh/e94QNfekyKuKFOy3MUo6iR
2SJT63vbyC1gyVr5olRO86jWDmEYNA+xr9KhaiiuF4ZOxx0Uw/1MWkHVazA5hP2V8ENX3co/RVso
wBcc7XrcS9am7x7huaE6v9dJ7QRibQCPLOU+3YwNsvQXym/uQHA6XmSwFQ9x5GKGTL2EezfH3ykI
HIHJMxejQ7UI8ZHCsRgl73YhnfepVkCqpxkhRkcxjzglm09s7CMIK5bvWrAqdj6W6/IG0YJdV5RI
c+StMl//FZgqDkGK333NXv9nzpQHDZAEQ878tgpwTES8hNySuoaDjEfx8ju5v6tV4CA9Himhmqz3
LZPiOEcuJD1V8QeD0LrngppoLIEXMjXvnthJiTscRYLTH8zzRXMSLnJ/7byCTJ9N4rH1n+l/08Xl
hH4yTYxdyCLu3ZG1m9UarxrItaN7KRY107vsdB9bzklVcKtUgrbU2jQQI9Ls1ujaAvh/ksCeXUN0
vE1JpC/zqa3eGezBJBf4URvrXMMk478CZV0A54AMfXwyse2hl7wBEolr2I4m8QuFL16NKDMUwJvS
LJDzRrjaGYjcJu7rH+i6K3VrHH2y2SpUJEzRPgEcMA+xv0poix3ZwlyM3hyUvOYTl84YfZRI79K7
+hfyIAP0UJ8yUQEx95EKF2Qo2GBddQ8RVcpk4HvqCZRUC0pA7IyQ4cisYNcKXSARjIlR1myQA+KY
Z8i+HwrwsfO0lzrEdhmjT8s3OzNjgBmICKLYO5V/35BdaDC+ompU1GmdpF3oiOq7z7kDPUvELQ6r
1BZAV6zO8RBJbWHsEVtKdgVZNnD69drjJieN4XtInNVLu2PC1/ui3mDk9JegPDFLLq4YF+F15Y66
FFvMcqKFc+r13tTGS2PWArLt8KmVFuJ1EtlEO8fIbdaXaVYbpcwIQl8+fUBrL3rD/rhcY43cSFDe
b2NSckOcIsXAcUNJJPmCfkfVHOPNNjbENAdrf12waSSmK670lasJnY1a8hCC7WzOnVe7vOrcSOwT
HnRDjxXID7uLY2RtBrkjtzyBjibw4XuHBqwGRWxt00cta1uzi5f0Qy0rTwCDhhk7FfGAwaaISwT9
Sxu4iOlUTQ2TEZfM+fr73UV45IQowMACfzS1xtOT+2uFrynG+upDrbMPB5fTnjyYDUP9wG5CXZWN
Ec5I5gg1nE3LltKqQcpt3VCiYMjjdSPhgwKtO6Ay8d+xSHOmvNYMbEgrzrcFxl54OqKnD0CsfOo5
8i+/+DISf+o4bHfnxan2j5+L/Vr75GgGdOI32Lr972g850bfj5U58ZBXCc4R4hxQrz2HO57G8jb3
0qMN3Tu2bm/oEEKqiUxuojQtX2jUrK5utpvjBIs43wzi8pbDPxgxeQYEMQ/buPhqmvYuw+nwwFBh
p1pf+zpCjgYrshauC7o0wSVw+8pTKv4aUlNstgaiL8TbdhvAT5scs+s2JWfn5uJIHBMf2rs7LBAp
wSiEb4HRXgDY7/9EihVUgozSwiGssrNAxlh0aTwQw4NZu03zXlR6BCkzdCQ1pcCIe6z/GBn/mgJ4
ySaGW4HrUa+5mewzcnGe9wwfS8EdS8+EaL0bUOzB5QvYT8Sur9eeWjuZj1n43hSa9BZ25ySv8mUK
2DdTNCjYVdzWbde1SjB0HJDLZvnmylDN2Rzx6ZrFwJ9m7UXq3yYcfL12V+iZ68iwGl0Zw+7KuqnK
vwHK+jWIv2Jt+wizLBrk2cebRNplMCzyKinvOB2Y6wO5NpVC7FjK4H7S+iPsRQciZXf8U8/Dzkj3
RNq+pBor7AFzEkcDsHrOZQgyCNBA7kP+DCy78E5FhibSZj5iXvocNnj/FK2xHo0a4WXQF8CAOAQZ
DPeaLACjSCXTCT7z1tG7/7c5qrg9c1wvys8TOWevtOz87ZzKcYRrRjpVdgXiI+3D5phxmPP7Je/S
KbonLMGzi6rBVykfZ5u7e/viZHxokpfUrGgX2dz8kvOG99HaVvuwDptyiTLzf3FY+8K40h4gMZTS
beFqF48i6BC2JaGGJNDakx35t6s3yfEklyHJEuLdbe+UVMUFxz8bxSz81eAQ3RQF61B+FIxMyN1+
zZST2oeugh3Q+gs8yReBvkJmz2HkZonRKY43xtATdLgq7lGrKsueU2qh1WYvf87bo8ICLg9kGtyZ
tDwpUH2jAzor+tyv3I5XRGKhvRlHr64nltU5pWBFU7dbuXSBJmHRYVwg6v0qsY6aWp0MH5RNdBMW
tY5mpxplnB/cZhqqFnwt9QpjmIRo4ylZoWY0qzdlxRvEHJ88XnxcpIAbdX2tgZWqEsmW4dwVnfQK
IlXUNupNEHMBffUd3UpXBk91gNGPNymZ0SSIpvz2X37JGJBxSTEGTzCoKNgT1o8a4gpe6+Gn37UG
Fq64mD5E7ag4j9U3hSNKU+skZmtbaBr+1M3xCgaMil3ecnlde4YMVjLfEAwLwb3EdLrcshXlIgHY
cBy1TyNET0k3eLMN/81hTc2tnVDuYcOYBh6VGvJOHbAGeL5ZpGNj7orsYndlXODESTCyGZP+IKec
TBrxLxGp5KIuKzAG06k1EgfO0vP5AfOu5U0msSPV4hRycqfjgVKBRqD2Yh9S0n/KKbn85EWvbEIm
+QkYekneJHX1LKH692jOJ8Ww2RrNj11CTjjtkN+nuV5MYWodHuDNQes5RrPEVbWrI3CR4jD5lRR0
4fE2yPeb/3SWqtB9M997BrzQMAT6TRVPEhABSbdp89HcUz6VqsIguY8teF/z6121ZqCnHPycmptd
DuX90qcYDGX+pWfKMWycpeGteq7k4lg889ndD2gnh+KgoUj3Dokyn6Cf6RYceTXZovxxCu6Itr/D
lbqyoeKolkxFCslxTUbhtF3LYMF8RflTZEzMUw2eSfdQxIGGIT4zhjbM3Z3LLH9w9+6mtHiu1Ver
hfqyYUFljX3at7ZweTpaFYiAGoAN3wfHm4L3sAgrptGdhZojXaUeB4B7AJzmJl7mxzHlNXaa9fEe
lJxrcxf8VnS3rc52g8dFEDuQv4/elcXevYjPHZanAcvQAjjOHwDPlIS04xIrcmW7Jh5nG8n1kLF8
0VAUtD+psgl+EHMbNhz7C9RLtCbMBrt/+3hZT3A2Ixedds2o2jGjGVB1uaUH6x/Yaaf33FTPl4l+
r4bOd4YWv2Wn1Bw4KFvqP3np9wxhIfE9pFwHlXZM5n/YE5Rhkr6UHQwsLrX3NwV17FH3eEEpyyJ1
O55bPArqhXZ1kAYdAxBxljtUKk8LJZKuBU+RL6bwkloDa5cTDRwofRMaUrGp19rQ6/+otAgo5hH/
YFoODxqMuYWiIXHvdH150q41U/g/e5EOCMmQSnezv0jyPh7/5h3R6HiLo/+0vSJ26DBhB43niQ5p
4L3PG7yahWax1678ASiKia5DxkeeQzZMbo1WLwoKhA5ihKSMwsplkeeV9RN0qbGbvwR09pjczQTN
P78OQqEoNSTh0kfUFL9h+ljyzeI1FA3x5BGW0w0sm6oQL8jh4KPEHVqjhmMFZrx3W2ElXTwvid0c
4acTL/Ce+wwHfI12WDYeb5zYH/2tLJqVg67hUuObf6z4dKOlex3m48lIgyPWtlBQp3jGSmdwSJdP
hiwQ/tJLrTRporHhl5W0Cd5zY+Q4R3eWtHOMdMHYJE5UBzqCMAd5xbr19TX/fnAbKqSBy0U99puj
MOu3ENRx8jXc50x78BbZvnL0WgljEKKprs266I/PK+1/5VZSXcat3VAGEt+Gl4cAKnF5KqHuOW5H
hVgm+I4mrjV7YK6PXunDBFq2YObWRZHTX8hqEaAdEYLheqpQw0SAyuSCIHGZnV+PkqYSj06uVO5c
ia4lOUWYSFt40aLeZ+GO7ejhOnt7/FXSkCS2D1s7eLo8uf42GxRqc79fKQRzEajsj3ZXkeSLHY27
xOO4ZT9awc0YAZMyZHYqeSkULVfskKsPUpdgSE6Ebq6qZNpYD/ZUKD8sYrGxc8xoLG10vNNs01V8
fCZfixI1v1Db32WQLnc2YKTAAkiH+o+IFjLL4FoLUPKiEqUTpMwIOa4J/i+eUm/Z+QxNCg8sZZon
m48Tg24MSVJ+WCsSlO1u4inYDO6t6F2Ja86O7Y3OZJi8TigkzsQM
`protect end_protected
| apache-2.0 | a4b82e35546d961f0ff475dd22a22f0d | 0.921037 | 1.907465 | false | false | false | false |
Abeergit/UART | UART_TX.vhd | 1 | 4,351 | library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity uart_tx is
generic(
DBIT: integer := 8; -- Anzahl Datenbits
PARITY_EN: std_logic := '1'; -- Parity bit (1 = enable, 0 = disable)
SB_TICK: integer := 16 -- Anzahl s_tick f stopbbit
);
port(
clk, reset: in std_logic;
tx_start: in std_logic;
s_tick: in std_logic;
din: in std_logic_vector(7 downto 0);
tx_done_tick: out std_logic;
tx: out std_logic;
parity_bit: in std_logic
);
end uart_tx ;
architecture main of uart_tx is
type state_type is (idle, start, data, parity, stop);-- FSM status typen
signal state_reg, state_next: state_type; -- Status Register
signal s_reg, s_next: unsigned(4 downto 0); -- Register für Stop Bit
signal n_reg, n_next: unsigned(3 downto 0); -- Anzahl empfangener bits
signal b_reg, b_next: std_logic_vector(7 downto 0); -- Datenwort
signal tx_reg, tx_next: std_logic; -- tx_reg: transmission register, routed to tx
begin
-- register
process(clk,reset)
begin
if (rising_edge(clk) and clk='1') then
if reset = '1' then
state_reg <= idle;
s_reg <= (others=>'0');
n_reg <= (others=>'0');
b_reg <= (others=>'0');
tx_reg <= '1';
elsif reset = '0' then
state_reg <= state_next;
s_reg <= s_next;
n_reg <= n_next;
b_reg <= b_next;
tx_reg <= tx_next;
end if;
end if;
end process;
-- next-state logic & data path functional units/routing
process(state_reg,s_reg,n_reg,b_reg,s_tick,
tx_reg,tx_start,din, parity_bit)
begin
state_next <= state_reg;
s_next <= s_reg;
n_next <= n_reg;
b_next <= b_reg;
tx_next <= tx_reg ;
tx_done_tick <= '0';
case state_reg is -- state machine (idle, start, data, stop)
when idle => --idle
tx_next <= '1'; -- tx = 1 während idle
if tx_start='1' then -- tx_start = 1 => state: data
state_next <= start;
s_next <= (others=>'0');
b_next <= din; --b_next = 8 bit Datenwort aus din
end if;
when start => --start
tx_next <= '0'; --startbit
if (s_tick = '1') then
if s_reg=7 then --nach 15 sample ticks status => data
state_next <= data;
s_next <= (others=>'0');
n_next <= (others=>'0');
else
s_next <= s_reg + 1;
end if;
end if;
when data => --data
tx_next <= b_reg(0);
if (s_tick = '1') then
if s_reg=15 then
s_next <= (others=>'0');
b_next <= '0' & b_reg(7 downto 1) ; --shift register
if n_reg=(DBIT-1) then --then n_reg = 8 => stop
if PARITY_EN = '1' then
state_next <= parity;
elsif PARITY_EN = '0' then
state_next <= stop;
end if;
else
n_next <= n_reg + 1;
end if;
else
s_next <= s_reg + 1;
end if;
end if;
when parity =>
tx_next <= parity_bit;
if s_tick = '1' then
if s_reg = 15 then
s_next <= (others=>'0');
state_next <= stop;
else
s_next <= s_reg + 1;
end if;
end if;
when stop => --stop
tx_next <= '1';
if (s_tick = '1') then
if s_reg=(SB_TICK-1) then
state_next <= idle;
tx_done_tick <= '1';
else
s_next <= s_reg + 1;
end if;
end if;
end case;
end process;
tx <= tx_reg;
end main;
| mit | 6c962df7ccb9cd5af10549386f329f69 | 0.412968 | 3.818262 | false | false | false | false |
mkotormus/G3_OrchestraConductorDemo | src/ov7670_marker_tracker_use/ov7670_marker_tracker_use.srcs/sources_1/ipshared/xilinx.com/axi_master_burst_v2_0/1af76933/hdl/src/vhdl/axi_master_burst_cmd_status.vhd | 1 | 39,989 | -------------------------------------------------------------------
-- (c) Copyright 1984 - 2012 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
-------------------------------------------------------------------
-- Filename: axi_master_burst_cmd_status.vhd
--
-- Description:
-- This file implements the AXI Master Burst Command and Status interfaces.
--
--
--
--
-- VHDL-Standard: VHDL'93
-------------------------------------------------------------------------------
-- Structure:
-- axi_master_burst_cmd_status.vhd
--
-------------------------------------------------------------------------------
-- Revision History:
--
--
-- Author: DET
-- Revision: $Revision: 1.0 $
-- Date: $1/20/2011$
--
-- History:
-- DET 1/20/2011 Initial
-- ~~~~~~
-- - New file for AXi Master burst
-- ^^^^^^
--
-- DET 2/10/2011 Initial for 13.2
-- ~~~~~~
-- - Registered the bus2ip_mst_cmdack and bus2ip_mst_cmplt ouputs per
-- Linting guidelines.
-- ^^^^^^
--
-- DET 2/17/2011 Initial for 13.2
-- ~~~~~~
-- -- Per CR593967
-- - Added the port rdwr2llink_int_err. This output is now used to initiate
-- a Locallink discontinue when an internal error is detected.
-- - Added the logic for to drive the new rdwr2llink_int_err port.
-- ^^^^^^
-- ~~~~~~
-- SK 12/16/12 -- v2.0
-- 1. up reved to major version for 2013.1 Vivado release. No logic updates.
-- 2. Updated the version of AXI MASTER BURST to v2.0 in X.Y format
-- 3. updated the proc common version to proc_common_v4_0
-- 4. No Logic Updates
-- ^^^^^^
-------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
library axi_master_burst_v2_0;
Use axi_master_burst_v2_0.axi_master_burst_stbs_set ;
Use axi_master_burst_v2_0.axi_master_burst_first_stb_offset;
-------------------------------------------------------------------------------
entity axi_master_burst_cmd_status is
generic (
C_ADDR_WIDTH : Integer range 32 to 64 := 32;
-- The bit width of the AXI address Buses
C_NATIVE_DWIDTH : Integer range 32 to 128 := 32;
-- The bit width of the Master's data Buses
C_CMD_WIDTH : Integer range 64 to 128 := 68;
-- The bit width of the command bus to the RD/WR Controller
C_CMD_BTT_USED_WIDTH : Integer range 12 to 20 := 12;
-- The bit width of the input ip2bus_mst_length (Bytes to Transfer)
C_STS_WIDTH : Integer := 8;
-- The bit width of the input status bus from the Rd/Wr Controller
C_FAMILY : string := "virtex7"
-- The target FPGA device familiy
);
port (
-- Clock inputs
axi_aclk : in std_logic;
-- Reset inputs
axi_reset : in std_logic;
-----------------------------------------------------------------------------
-- RW_ERROR Output Discrete
-----------------------------------------------------------------------------
rw_error : Out std_logic;
-----------------------------------------------------------------------------
-- Internal error Output Discrete to LocalLink backends
-- (Asserted until Pertinent LocalLink IF is not busy)
-----------------------------------------------------------------------------
rdwr2llink_int_err : Out std_logic;
-----------------------------------------------------------------------------
-- IPIC Request/Qualifiers
-----------------------------------------------------------------------------
ip2bus_mstrd_req : In std_logic; -- IPIC Cmd
ip2bus_mstwr_req : In std_logic; -- IPIC Cmd
ip2bus_mst_addr : in std_logic_vector(0 to C_ADDR_WIDTH-1); -- IPIC Cmd
ip2bus_mst_length : in std_logic_vector(0 to C_CMD_BTT_USED_WIDTH-1); -- IPIC Cmd
ip2bus_mst_be : in std_logic_vector(0 to (C_NATIVE_DWIDTH/8)-1); -- IPIC Cmd
ip2bus_mst_type : in std_logic; -- IPIC Cmd
ip2bus_mst_lock : In std_logic; -- IPIC Cmd
ip2bus_mst_reset : In std_logic; -- IPIC Cmd
-----------------------------------------------------------------------------
-- IPIC Request Status Reply
-----------------------------------------------------------------------------
bus2ip_mst_cmdack : Out std_logic; -- IPIC Status Reply
bus2ip_mst_cmplt : Out std_logic; -- IPIC Status Reply
bus2ip_mst_error : Out std_logic; -- IPIC Status Reply
bus2ip_mst_rearbitrate : Out std_logic; -- IPIC Status Reply
bus2ip_mst_cmd_timeout : out std_logic; -- IPIC Status Reply
-----------------------------------------------------------------------------
-- IPIC LocalLink Busy Flag
-----------------------------------------------------------------------------
mstrd_llink_busy : In std_logic; -- LLink Busy Ooutput Discrete
mstwr_llink_busy : In std_logic; -- LLink Busy Ooutput Discrete
-----------------------------------------------------------------------------
-- PCC Command Interface
-----------------------------------------------------------------------------
pcc2cmd_cmd_ready : in std_logic;
-- Handshake bit indicating the Predictive Command Calculator is ready
-- to accept another command
cmd2pcc_cmd_valid : Out std_logic;
-- Handshake bit indicating the Command module has at least 1 valid
-- command entry
cmd2pcc_command : Out std_logic_vector(C_CMD_WIDTH-1 downto 0);
-- The next command value available from the Command Register
-----------------------------------------------------------------------------
-- Read/Write Command Indicator Interface
-----------------------------------------------------------------------------
cmd2all_doing_read : out std_logic;
-- Indication that the current command is a read
cmd2all_doing_write : out std_logic;
-- Indication that the current command is a write
-----------------------------------------------------------------------------
-- Read Status Controller Interface
-----------------------------------------------------------------------------
stat2rsc_status_ready : Out std_logic;
-- Handshake bit indicating that the Status FIFO/Register is ready for transfer
rsc2stat_status_valid : In std_logic ;
-- Handshake bit for writing the Status value into the Status FIFO/Register
rsc2stat_status : in std_logic_vector(C_STS_WIDTH-1 downto 0);
-- The input for writing the status value to the Status FIFO/Register
-----------------------------------------------------------------------------
-- Write Status Controller Interface
-----------------------------------------------------------------------------
stat2wsc_status_ready : Out std_logic;
-- Handshake bit indicating that the Status FIFO/Register is ready for transfer
wsc2stat_status_valid : In std_logic ;
-- Handshake bit for writing the Status value into the Status FIFO/Register
wsc2stat_status : in std_logic_vector(C_STS_WIDTH-1 downto 0)
-- The input for writing the status value to the Status FIFO/Register
);
end entity axi_master_burst_cmd_status;
architecture implementation of axi_master_burst_cmd_status is
attribute DowngradeIPIdentifiedWarnings: string;
attribute DowngradeIPIdentifiedWarnings of implementation : architecture is "yes";
-- Functions
-------------------------------------------------------------------
-- Function
--
-- Function Name: get_addr_lsb_slice_width
--
-- Function Description:
-- Calculates the number of Least significant Address bits that
-- need to be overridden by the position of the first asserted BE
-- specified during a commanded single data beat transfer.
-------------------------------------------------------------------
function get_addr_lsb_slice_width (native_dwidth: integer) return integer is
Variable temp_ls_slice_width : natural := 2;
begin
case native_dwidth is
when 32 =>
temp_ls_slice_width := 2; -- 4 bytes max transfer
when 64 =>
temp_ls_slice_width := 3; -- 8 bytes max transfer
when others => -- assume 128 bit
temp_ls_slice_width := 4; -- 16 bytes max transfer
end case;
Return (temp_ls_slice_width);
end function get_addr_lsb_slice_width;
-- Constants
-- Constant REGISTER_TYPE : integer := 0;
-- Constant BRAM_TYPE : integer := 1;
-- Constant SRL_TYPE : integer := 2;
-- Constant FIFO_PRIM_TYPE : integer := SRL_TYPE;
Constant STRB_WIDTH : integer := C_NATIVE_DWIDTH/8;
Constant BE_WIDTH : integer := C_NATIVE_DWIDTH/8;
Constant CMD_BTT_WIDTH : integer := 23;
Constant CMD_BTT_USED_WIDTH : integer := C_CMD_BTT_USED_WIDTH;
Constant CMD_BTT_NOTUSED_WIDTH : integer := CMD_BTT_WIDTH-CMD_BTT_USED_WIDTH;
Constant CMD_TAG_WIDTH : integer := C_CMD_WIDTH-64;
Constant CMD_DSA_WIDTH : integer := 6;
Constant STRB_ASSERTED_WIDTH : integer := 8;
Constant OFFSET_WIDTH : Integer := 8;
Constant TAG_CNTR_ONE : unsigned(CMD_TAG_WIDTH-1 downto 0) :=
TO_UNSIGNED(1, CMD_TAG_WIDTH);
Constant ADDR_LS_SLICE_WIDTH : integer := get_addr_lsb_slice_width(C_NATIVE_DWIDTH);
Constant ADDR_MS_SLICE_WIDTH : integer := C_ADDR_WIDTH - ADDR_LS_SLICE_WIDTH;
Constant ADDR_LS_SLICE_HIGH_INDEX : integer := ADDR_LS_SLICE_WIDTH-1;
Constant ADDR_MS_SLICE_LOW_INDEX : integer := ADDR_LS_SLICE_WIDTH;
Constant STAT_OKAY_BIT : integer := 7;
Constant STAT_SLVERR_BIT : integer := 6;
Constant STAT_DECERR_BIT : integer := 5;
Constant STAT_INTERR_BIT : integer := 4;
Constant STAT_TAG_MSBIT : integer := 3;
-- Signals
--signal sig_cmd_ack : std_logic := '0';
signal sig_cmd_cmplt : std_logic := '0';
signal sig_cmd_error : std_logic := '0';
signal sig_addr_out : std_logic_vector(C_ADDR_WIDTH-1 downto 0) := (others => '0');
signal sig_addr_ms_slice : std_logic_vector(ADDR_MS_SLICE_WIDTH-1 downto 0) := (others => '0');
signal sig_addr_ls_slice : std_logic_vector(ADDR_LS_SLICE_WIDTH-1 downto 0) := (others => '0');
signal sig_addr_be_offset : std_logic_vector(ADDR_LS_SLICE_WIDTH-1 downto 0) := (others => '0');
signal sig_cmd_mstrd_req : std_logic;
signal sig_cmd_mstwr_req : std_logic;
signal sig_cmd_mst_addr : std_logic_vector(C_ADDR_WIDTH-1 downto 0);
signal sig_cmd_mst_length : std_logic_vector(CMD_BTT_USED_WIDTH-1 downto 0);
signal sig_cmd_mst_be : std_logic_vector((C_NATIVE_DWIDTH/8)-1 downto 0);
signal sig_cmd_type_req : std_logic;
signal sig_init_done : std_logic := '0';
signal sig_init_reg1 : std_logic := '0';
signal sig_init_reg2 : std_logic := '0';
signal sig_muxed_length : std_logic_vector(CMD_BTT_USED_WIDTH-1 downto 0) := (others => '0');
signal sig_sngl_beat_length : std_logic_vector(CMD_BTT_USED_WIDTH-1 downto 0) := (others => '0');
signal sig_num_stbs_asserted : std_logic_vector(STRB_ASSERTED_WIDTH-1 downto 0) := (others => '0');
signal sig_cmd_full_reg : std_logic := '0';
signal sig_cmd_empty_reg : std_logic := '0';
signal sig_push_cmd_reg : std_logic := '0';
signal sig_pop_cmd_reg : std_logic := '0';
signal sig_cmd_tag_slice : std_logic_vector(CMD_TAG_WIDTH-1 downto 0) := (others => '0');
signal sig_cmd_addr_slice : std_logic_vector(C_ADDR_WIDTH-1 downto 0) := (others => '0');
signal sig_cmd_drr_slice : std_logic := '0';
signal sig_cmd_eof_slice : std_logic := '0';
signal sig_cmd_dsa_slice : std_logic_vector(CMD_DSA_WIDTH-1 downto 0) := (others => '0');
signal sig_cmd_type_slice : std_logic := '0';
signal sig_cmd_btt_rsvd_slice : std_logic_vector(CMD_BTT_NOTUSED_WIDTH-1 downto 0) := (others => '0');
signal sig_cmd_btt_slice : std_logic_vector(CMD_BTT_USED_WIDTH-1 downto 0) := (others => '0');
signal sig_pcc_cmd_rdy : std_logic := '0';
signal sig_pcc_taking_command : std_logic := '0';
signal sig_incr_tag_cnt : std_logic := '0';
Signal sig_tag_counter : unsigned(CMD_TAG_WIDTH-1 downto 0) := (others => '0');
signal sig_strt_addr_offset : unsigned(OFFSET_WIDTH-1 downto 0) ;
signal sig_doing_read_reg : std_logic := '0';
signal sig_doing_write_reg : std_logic := '0';
signal sig_push_status : std_logic := '0';
signal sig_pop_status : std_logic := '0';
signal sig_status_reg : std_logic_vector(C_STS_WIDTH-1 downto 0) := (others => '0');
signal sig_status_reg_full : std_logic := '0';
signal sig_status_reg_empty : std_logic := '0';
signal sig_status_valid : std_logic := '0';
signal sig_muxed_status : std_logic_vector(C_STS_WIDTH-1 downto 0) := (others => '0');
signal sig_stat_tag : std_logic_vector(CMD_TAG_WIDTH-1 downto 0) := (others => '0');
signal sig_stat_tag_reg : std_logic_vector(CMD_TAG_WIDTH-1 downto 0) := (others => '0');
signal sig_stat_error : std_logic := '0';
signal sig_stat_error_reg : std_logic := '0';
signal sig_stat_int_error : std_logic := '0';
signal sig_error_sh_reg : std_logic := '0';
signal sig_int_error_pulse_reg : std_logic := '0';
signal sig_cmdack_reg : std_logic := '0';
signal sig_cmd_cmplt_reg : std_logic := '0';
signal sig_llink_busy : std_logic := '0';
begin --(architecture implementation)
-- IPIC Status Reply Port
bus2ip_mst_cmdack <= sig_cmdack_reg ;
bus2ip_mst_cmplt <= sig_cmd_cmplt_reg ;
bus2ip_mst_error <= sig_cmd_error ;
bus2ip_mst_rearbitrate <= '0' ;
bus2ip_mst_cmd_timeout <= '0' ;
-- Type of command discrete indicators
cmd2all_doing_read <= sig_doing_read_reg ;
cmd2all_doing_write <= sig_doing_write_reg ;
-- PCC Command Interface Port Assignments
sig_pcc_cmd_rdy <= pcc2cmd_cmd_ready;
cmd2pcc_cmd_valid <= sig_cmd_full_reg ;
cmd2pcc_command <= sig_cmd_tag_slice &
sig_cmd_addr_slice &
sig_cmd_drr_slice &
sig_cmd_eof_slice &
sig_cmd_dsa_slice &
sig_cmd_type_slice &
sig_cmd_btt_rsvd_slice &
sig_cmd_btt_slice ;
-- Generate a flag indicating the PCC is accepting the
-- new command being output
sig_pcc_taking_command <= sig_cmd_full_reg and
pcc2cmd_cmd_ready;
-- Build the PCC command from the input IPIC Command Qualifiers
sig_cmd_tag_slice <= STD_LOGIC_VECTOR(sig_tag_counter); -- tag count
sig_cmd_addr_slice <= sig_addr_out; -- formulated starting address
sig_cmd_drr_slice <= '1'; -- always a sof started packet
sig_cmd_eof_slice <= '1'; -- always a eof terminated packet
sig_cmd_dsa_slice <= (others => '0'); -- no DRE so set to zeros
sig_cmd_type_slice <= '0'; -- reserved, set to zero
sig_cmd_btt_rsvd_slice <= (others => '0'); -- unused portion of the BTT field
sig_cmd_btt_slice <= sig_muxed_length; -- transfer length in bytes
-- Resize the strobes asserted value (from the BE) up to a 20-bit value. This is
-- only used for Single Beat commands
sig_sngl_beat_length <= STD_LOGIC_VECTOR(RESIZE(UNSIGNED(sig_num_stbs_asserted), CMD_BTT_USED_WIDTH));
-- If a single beat command, then the length must be derived
-- from the asserted BE bits, else just use the command's length
-- when the command is a burst.
sig_muxed_length <= sig_sngl_beat_length
When (sig_cmd_type_req = '0')
Else sig_cmd_mst_length;
-- Rip the upper address bit field from the input command address.
sig_addr_ms_slice <= sig_cmd_mst_addr(C_ADDR_WIDTH-1 downto ADDR_MS_SLICE_LOW_INDEX);
-- If the command is a single beat request, then the LS Bits of the AXI
-- Address must be set to the byte offset of the first asserted BE in the
-- input BE command qualifier. Otherwise, it is a burst request so use the
-- original address offset from the command.
sig_addr_ls_slice <= sig_cmd_mst_addr(ADDR_LS_SLICE_HIGH_INDEX downto 0)
When (sig_cmd_type_req = '1')
Else sig_addr_be_offset;
-- Formulate the final address to be used for the starting AXI4 Address by
-- concatonating the Upper address slice with the multiplexed lower address
-- slice.
sig_addr_out <= sig_addr_ms_slice & sig_addr_ls_slice;
---------------------------------------------------------------------------------
-- IPIC Status IF Registering
---------------------------------------------------------------------------------
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_CMDACK_REG
--
-- Process Description:
-- Generates a 1-clock wide command acknowledge pulse.
--
-------------------------------------------------------------
IMP_CMDACK_REG : process (axi_aclk)
begin
if (axi_aclk'event and axi_aclk = '1') then
if (axi_reset = '1' or
sig_cmdack_reg = '1') then
sig_cmdack_reg <= '0';
else
sig_cmdack_reg <= sig_push_cmd_reg;
end if;
end if;
end process IMP_CMDACK_REG;
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_CMDCMPLT_REG
--
-- Process Description:
-- Generates a 1-clock wide command complete pulse and the
-- status register pop control.
--
-------------------------------------------------------------
IMP_CMDCMPLT_REG : process (axi_aclk)
begin
if (axi_aclk'event and axi_aclk = '1') then
if (axi_reset = '1' or
sig_cmd_cmplt_reg = '1') then
sig_cmd_cmplt_reg <= '0';
sig_pop_status <= '0';
else
sig_cmd_cmplt_reg <= sig_cmd_cmplt;
sig_pop_status <= sig_cmd_cmplt;
end if;
end if;
end process IMP_CMDCMPLT_REG;
---------------------------------------------------------------------------------
-- User Command Input Register
---------------------------------------------------------------------------------
sig_push_cmd_reg <= (ip2bus_mstrd_req or
ip2bus_mstwr_req) and
sig_cmd_empty_reg;
sig_pop_cmd_reg <= sig_pcc_taking_command;
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_CMD_REG_FIFO
--
-- Process Description:
-- This process implements the input command register and
-- associated full flag (emulates a 1-deep FIFO). It also
-- re-orders the vector bit sequence from (x to y) to
-- (y downto x).
--
-------------------------------------------------------------
IMP_CMD_REG_FIFO : process (axi_aclk)
begin
if (axi_aclk'event and axi_aclk = '1') then
if (axi_reset = '1' or
(sig_pop_cmd_reg = '1' and
sig_push_cmd_reg = '0')) then
sig_cmd_mstrd_req <= '0';
sig_cmd_mstwr_req <= '0';
sig_cmd_mst_addr <= (others => '0');
sig_cmd_mst_length <= (others => '0');
sig_cmd_mst_be <= (others => '0');
sig_cmd_type_req <= '0';
sig_cmd_full_reg <= '0';
elsif (sig_push_cmd_reg = '1') then
sig_cmd_mstrd_req <= ip2bus_mstrd_req ;
sig_cmd_mstwr_req <= ip2bus_mstwr_req ;
sig_cmd_mst_addr <= ip2bus_mst_addr ;
sig_cmd_mst_length <= ip2bus_mst_length ;
sig_cmd_mst_be <= ip2bus_mst_be ;
sig_cmd_type_req <= ip2bus_mst_type ;
sig_cmd_full_reg <= '1';
else
null; -- don't change state
end if;
end if;
end process IMP_CMD_REG_FIFO;
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_CMD_REG_EMPTY_FLOP
--
-- Process Description:
-- This process implements the empty flag for the
-- register fifo. The register is only allowed to go empty
-- on reset or when a command has completed (as indicated
-- by the assertion of the Command Complete status output).
--
-------------------------------------------------------------
IMP_CMD_REG_EMPTY_FLOP : process (axi_aclk)
begin
if (axi_aclk'event and axi_aclk = '1') then
if (axi_reset = '1') then
sig_cmd_empty_reg <= '0'; -- since this is used for the ready (invertd)
-- it can't be asserted during reset
--elsif (sig_pop_cmd_reg = '1' or
elsif (sig_cmd_cmplt_reg = '1' or
sig_init_done = '1') then
sig_cmd_empty_reg <= '1';
elsif (sig_push_cmd_reg = '1') then
sig_cmd_empty_reg <= '0';
else
null; -- don't change state
end if;
end if;
end process IMP_CMD_REG_EMPTY_FLOP;
---------------------------------------------------------------------
-- Single DataBeat Support logic
---------------------------------------------------------------------
sig_addr_be_offset <= STD_LOGIC_VECTOR(RESIZE(sig_strt_addr_offset, ADDR_LS_SLICE_WIDTH));
------------------------------------------------------------
-- Instance: I_FIRST_BE_OFFSET
--
-- Description:
-- Finds the first asserted BE bit (searching from ls to
-- ms bit) and returns the address offset of that asserted
-- strobe.
--
------------------------------------------------------------
I_FIRST_BE_OFFSET : entity axi_master_burst_v2_0.axi_master_burst_first_stb_offset
generic map(
C_STROBE_WIDTH => BE_WIDTH ,
C_OFFSET_WIDTH => OFFSET_WIDTH
)
port map(
tstrb_in => sig_cmd_mst_be ,
first_offset => sig_strt_addr_offset
);
------------------------------------------------------------
-- Instance: I_GET_BE_SET
--
-- Description:
-- Calculates the number of asserted BE in a single beat transfer
-- type.
--
------------------------------------------------------------
I_GET_BE_SET : entity axi_master_burst_v2_0.axi_master_burst_stbs_set
generic map (
C_STROBE_WIDTH => BE_WIDTH
)
port map (
tstrb_in => sig_cmd_mst_be,
num_stbs_asserted => sig_num_stbs_asserted
);
---------------------------------------------------------------------------------
-- TAG Counter Logic
---------------------------------------------------------------------------------
sig_incr_tag_cnt <= sig_push_cmd_reg;
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_TAG_CNTR
--
-- Process Description:
-- Implements the TAG counter used for tracking commands
-- through the pipeline back to status generation.
--
-------------------------------------------------------------
IMP_TAG_CNTR : process (axi_aclk)
begin
if (axi_aclk'event and axi_aclk = '1') then
if (axi_reset = '1') then
sig_tag_counter <= (others => '1'); -- Init to max count
-- Will roll to zero on first command push
elsif (sig_incr_tag_cnt = '1') then
sig_tag_counter <= sig_tag_counter + TAG_CNTR_ONE;
else
null; -- Hold Current State
end if;
end if;
end process IMP_TAG_CNTR;
---------------------------------------------------------------------------------
-- Doing a Read discrete Register
---------------------------------------------------------------------------------
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_DOING_READ_FLOP
--
-- Process Description:
-- Implement the Doing Read discrete Register.
--
-------------------------------------------------------------
IMP_DOING_READ_FLOP : process (axi_aclk)
begin
if (axi_aclk'event and axi_aclk = '1') then
if (axi_reset = '1' or
sig_cmd_cmplt_reg = '1') then
sig_doing_read_reg <= '0';
elsif (sig_pcc_taking_command = '1') then
sig_doing_read_reg <= sig_cmd_mstrd_req;
else
null; -- Hold Current State
end if;
end if;
end process IMP_DOING_READ_FLOP;
---------------------------------------------------------------------------------
-- Doing a Write discrete Register
---------------------------------------------------------------------------------
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_DOING_WRITE_FLOP
--
-- Process Description:
-- Implement the Doing Write discrete Register.
--
-------------------------------------------------------------
IMP_DOING_WRITE_FLOP : process (axi_aclk)
begin
if (axi_aclk'event and axi_aclk = '1') then
if (axi_reset = '1' or
sig_cmd_cmplt_reg = '1') then
sig_doing_write_reg <= '0';
elsif (sig_pcc_taking_command = '1') then
sig_doing_write_reg <= sig_cmd_mstwr_req;
else
null; -- Hold Current State
end if;
end if;
end process IMP_DOING_WRITE_FLOP;
---------------------------------------------------------------------------------
-- Status Register Support Logic
--
-- Input status is either from the Write Status Controller or the Read Status
-- Controller depending on if a Read or Write in being performed.
---------------------------------------------------------------------------------
-- sig_cmd_cmplt <= ((sig_doing_read_reg and not(mstrd_llink_busy)) or
-- (sig_doing_write_reg and not(mstwr_llink_busy))) and
-- sig_status_reg_full;
sig_llink_busy <= (sig_doing_read_reg and mstrd_llink_busy) or
(sig_doing_write_reg and mstwr_llink_busy);
sig_cmd_cmplt <= not(sig_llink_busy) and
sig_status_reg_full;
sig_cmd_error <= sig_stat_error_reg;
-- Mux the input status value from either the Write status
-- controller or the Read Status Controller.
sig_muxed_status <= wsc2stat_status
When (sig_doing_write_reg = '1')
Else rsc2stat_status;
sig_stat_tag <= sig_muxed_status(STAT_TAG_MSBIT downto 0);
-- Merge Slave error, Decode Error, and Internal Error into 1 flag
sig_stat_error <= sig_muxed_status(STAT_SLVERR_BIT) or
sig_muxed_status(STAT_DECERR_BIT) or
sig_muxed_status(STAT_INTERR_BIT);
-- Rip the internal error status bit for use in causeing the
-- LocalLink backends to assert discontinue if needed.
sig_stat_int_error <= sig_muxed_status(STAT_INTERR_BIT);
stat2rsc_status_ready <= sig_status_reg_empty and sig_doing_read_reg;
stat2wsc_status_ready <= sig_status_reg_empty and sig_doing_write_reg;
sig_status_valid <= wsc2stat_status_valid
when (sig_doing_write_reg = '1')
Else rsc2stat_status_valid
When (sig_doing_read_reg = '1')
Else '0';
sig_push_status <= sig_status_valid and
sig_status_reg_empty;
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_STATUS_REG_FIFO
--
-- Process Description:
-- This process implements the input status register and
-- associated full flag (emulates a 1-deep FIFO).
--
-------------------------------------------------------------
IMP_STATUS_REG_FIFO : process (axi_aclk)
begin
if (axi_aclk'event and axi_aclk = '1') then
if (axi_reset = '1' or
(sig_pop_status = '1' and
sig_push_status = '0')) then
sig_stat_tag_reg <= (others => '0');
sig_stat_error_reg <= '0';
sig_status_reg_full <= '0';
elsif (sig_push_status = '1') then
sig_stat_tag_reg <= sig_stat_tag ;
sig_stat_error_reg <= sig_stat_error ;
sig_status_reg_full <= '1';
else
null; -- don't change state
end if;
end if;
end process IMP_STATUS_REG_FIFO;
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_STATUS_REG_EMPTY_FLOP
--
-- Process Description:
-- This process implements the empty flag for the
-- register fifo. The register is only allowed to go empty
-- on reset or when a command has completed (as indicated
-- by the assertion of the Command Complete status output).
--
-------------------------------------------------------------
IMP_STATUS_REG_EMPTY_FLOP : process (axi_aclk)
begin
if (axi_aclk'event and axi_aclk = '1') then
if (axi_reset = '1') then
sig_status_reg_empty <= '0'; -- since this is used for the ready (invertd)
-- it can't be asserted during reset
--elsif (sig_pop_cmd_reg = '1' or
elsif (sig_cmd_cmplt_reg = '1' or
sig_init_done = '1') then
sig_status_reg_empty <= '1';
elsif (sig_push_status = '1') then
sig_status_reg_empty <= '0';
else
null; -- don't change state
end if;
end if;
end process IMP_STATUS_REG_EMPTY_FLOP;
-----------------------------------------------------------------------------
-- RW_ERROR Output Discrete Logic
-----------------------------------------------------------------------------
rw_error <= sig_error_sh_reg ;
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_ERROR_SH_REG
--
-- Process Description:
-- Sample and Hold register for the rw_error output
-- discrete port. This is a sticky register. Once set,
-- it can only be cleared by a reset.
--
-------------------------------------------------------------
IMP_ERROR_SH_REG : process (axi_aclk)
begin
if (axi_aclk'event and axi_aclk = '1') then
if (axi_reset = '1') then
sig_error_sh_reg <= '0';
elsif (sig_push_status = '1' and
sig_error_sh_reg = '0') then
sig_error_sh_reg <= sig_stat_error;
else
null; -- Hold Current State
end if;
end if;
end process IMP_ERROR_SH_REG;
-----------------------------------------------------------------------------
-- Internal Error Output Discrete Logic
-----------------------------------------------------------------------------
rdwr2llink_int_err <= sig_int_error_pulse_reg ;
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_INT_ERROR_REG
--
-- Process Description:
-- Creates a 1-clock wide pulse when an internal error is
-- reported by the status controllers. This pulse is sent to
-- the LocalLink modules causing them to initiate a discontinue
-- sequence (if needed) to terminate a LocalLink transfer in
-- progress.
--
-------------------------------------------------------------
IMP_INT_ERROR_REG : process (axi_aclk)
begin
if (axi_aclk'event and axi_aclk = '1') then
if (axi_reset = '1' or
sig_llink_busy = '0') then
sig_int_error_pulse_reg <= '0';
elsif (sig_push_status = '1') then
sig_int_error_pulse_reg <= sig_stat_int_error;
else
null; -- Hold Current State
end if;
end if;
end process IMP_INT_ERROR_REG;
---------------------------------------------------------------------------------
-- Init Done Logic
--
-- This is used to keep some logic in reset for an extra 2 clock cycles after
-- reset de-asserts. This is used to keep any AXI-Like Ready signals from
-- asserting during reset but allows assertion after coming out of reset.
---------------------------------------------------------------------------------
sig_init_done <= sig_init_reg1 and not(sig_init_reg2) ;
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_INIT_DONE_REGS
--
-- Process Description:
-- Creates a 1 clock period wide pulse that asserts 1 clock
-- after reset de-asserts.
--
-------------------------------------------------------------
IMP_INIT_DONE_REGS : process (axi_aclk)
begin
if (axi_aclk'event and axi_aclk = '1') then
if (axi_reset = '1') then
sig_init_reg1 <= '0';
sig_init_reg2 <= '0';
else
sig_init_reg1 <= '1';
sig_init_reg2 <= sig_init_reg1;
end if;
end if;
end process IMP_INIT_DONE_REGS;
end implementation;
| apache-2.0 | 50ac662585c386d1208b9098ac050566 | 0.458326 | 4.582216 | false | false | false | false |
mkotormus/G3_OrchestraConductorDemo | src/ov7670_marker_tracker_use/ov7670_marker_tracker_use.srcs/sources_1/ipshared/xilinx.com/fifo_generator_v12_0/924f3d25/hdl/ramfifo/rd_dc_fwft_ext_as.vhd | 5 | 12,811 | `protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2014"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
hTCDc+asW/tBEkbiwaBbFmNMVZoDIFcAY1Xtjw2/5qvTHrHxfjowMxaSTdMaDg3UjW0H+j7OosIR
k1LvNj9d5A==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
ZSTMgs/LbjErzH9NHtGXsu+wUOxrtBka2Dwwd5+WgqsTn1nwo6yr+5bBE7IgRrYr9r5UzZiofPTu
pNnDSTkt404JAQVxGBoHEF6wlWpLvowa74xYZg+Aac4SZ30LpgToFmDkXAlaLhkvrXT/Ejux+Uim
szhrZbEWaHtwX6/BzNk=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2014_03", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
Tprp6nw1jVDd54Xf1Dm1u9TK24DNFYXUErYdnmETt+ODG6rrBqZk6L33n7nmdLiOSsU2uMnKrHtG
joqyTXSqgeFMATzx6W2AI5Uol4k2/GIqWRK339RCGceybJ4Nq8JdzJsK0L5a8iOsiFHk29kBCepF
PCo3g0yINyGAy03PCilnYVJFMEZWDxgxrnUuSQ64wmq8jRAuthxUURNqwx6xdEosiIPgiabRofgK
LH4tc1Adh56PSs9upj48JIWjNF5Bk5tsfp8DGAwIqQEz3R/iO8k/tQ7cAsYfbt+4aIqgZU7E+GQu
E3YLwJloH/jKtLyTF03aYk6JmWjYU6DT2/FLDQ==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
aVks7Fu7AE0DZAqytEkKo7vhq38Uaqwk7TMz/9bGeHNTxS9GZkC3gQE5QEivi1OXs5k8JsD14Oum
j1NGXYl3eQ9RwoBEycLNilyYp6lyHeW+bns+ZeHrwvcveQzXkTmqo/kVhql8Kyw6n5uYCTWgaYBr
n+m83SY+ly/2O++pg88=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
VLxvk+kn2ZK43mWV4Imivw0/sYDs1FIHNvrYlglwOzUif/l9R+KRCReEHG8fltOjMOE8xtSqXFJL
smZzKwJWUy2h6c7gLO+7W8OVkjkTe+7EAhCkxBTYsjVa3Fa5SL0JMMjUil8XGYUoeK/H9jbh5E4d
+PGLXdiabEaV+H6/qMNC7jM1H4D+iYuVMxONX7w6QOw5uf1Mitfjc1hc9S64QksviBT2MsmCMlBZ
zckw1G2XkWMrmlFxZenhfZUr84nfcafcoQtc4m0qaqpzCJ2JtE5ZBIGVcoLqmCSekmwpb9oY/w/y
mZyQlu4brgvGVq9F7e/u7mI1J6o4eQTw3g7RTA==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 7744)
`protect data_block
Yr8mTeds+09OY8u3sv8e2Xt+0+O9lefpRyYfbfkcvnmDvFKPWz/eAuHxX8MfCUIXUfXWKcQVptSL
MIik4x8SZCbWgaE3LlI0uB9V8D6oqhCEa4U8P3DBN6UbidtHOhRz3lupWQN1P0GOwMCfNq1sWmDW
2wzFQsyUiQ3ffhd62d6ewRCZTFiY+e8Q108K+NQMXK2I5bGrtbObddvIIBAYwO3q5az0fgRbsnTx
jszBGSdHi0GwKoQMrdyPSAgr/hdV8nGCp6AzZzeeNtaOeaiBmhsRbrY6Isi4LriC30DxgOiCKHEM
DqJ0bSt5N8OcwfmfzcfEvibsilF9v55Kk5tv6IwLaTXPwwDJnzjYzhZyBtvOwSJyRYp9XREKeehz
CSLUMddVg3TGoO12P5WxCBCAQrEGi87Phi6ZoLvpd9Eb9S/fpxwjbG7/PzXhoOplskaakWiOfl4g
igjX3UhU0Olbes9C18GUpHL5WL6t5jIDvb+PGYFb7OY2msTHdMK4zsSkKzJID1RflNYUgAmF2aVh
IwNkVJIUCh+yW++4IBilJfHp5sJ0g3WLOqjX4ueRwtaVAWSMEQUSlv4dMTEGVcx4IC7x21MVtX47
zu2U+1jjVkwTObT+XRUEAK/knLy0KRrW8l86cL0LcIDwHqoYXxxhDSIF51LHL4JBN3tTxw4PgT33
GEc35cVoBpH9TUAbXwL4KBZKFOHrr9EieMtT9mcQ1lYPzZWSIwjjItTLNaso7WrrkeAMjdYYZZHe
p0Wk26+TCC8zdSHJbylvDrlvEmDuoRmBX8YZwTASNuA6U7jgbpgaLwn/m+AjnqK1RwkFPVqzoR8j
2Xk+aCOGZr3aVJlDyaiSoAUHb3Pg2FnLCayDqNn01U2IXuNCZW+ABiwa9qRTSbQm6gtCYNa3yySQ
IOs4NbMaB/3dZPheOti/fBkU5Kqy7qsA8dDtGXystSJ0ScF83ctT8C1gezgejGpdr/Db1N1D9Kuz
Xfly0LmkJDy4+y8/1CqN2SJ4vkoXrKMLO+zy8Qtal7vFxMlWSl17dFcgjOVyIpwgjNRRBk2E5wtK
wu546ugI8PFI4W++au+u3udu4JQ9AXVYKpC01Ld2cAD32f7k2opfAHMjL7d7ydL4Gxx+s1geTmHQ
xgUV+qP6QA8pRMB7upsqcjm3eFAdjC+05zQHivDD7wiwLDNFP/w4tBOqSr9nfN73xt5NwK1dN012
W0emCXWna0KMtL5FKMeBAql5Uo8M2ayejKdgVON6Rg7Px5PdwQXCzR5LjqkajfAz25CiDm2pdYiD
wQFCMaaAIS/vYg90o0kWzUE/hAvunlgpMnaSiHsmCXNRyZ/TkP2ryLuld9ucQQTq1mxUAnBGZmvN
YeypaIO7y8DUMZc2nqfLKWE/n6qBF9M0MWizhMgDro9PqbNkXXeA+3B8/9+4yfC10JvZnRjl7eJT
A0QiT1UJXL1yJ9Pf+9E4tpliZRsDJiGGM1aMPM0ssDdDUGspxZ6rNTEw1AL++EhssihBUMxHUaZ3
IGilDuLarK8/dM+fGty4e48aBJe/6qB7m28k0YyirL2BtVz1w4oWDrmFRoc5jyik4idNNuZMA7vW
Qs+OuXypgFN/FYNQMD1MgRwqoXlTd7ZvMRg3vjaF9shp7VLvz+huPjMzki69I70w2gSXwbOI231b
A7qlD3hTN2k03qa3IVvFdbTDAcwJ/XSa4tvF7tM87m9NhMR99WmpRSp8q5UrqEqV95SChNuQg7jk
cwivcYKVH7po+qlzIOm/sJ032OraZeFFIsNnoBwmSCg9QLObIHgBG2saOFXG7h1JeRVvmIvKE0Fd
lHEFoupQ3whJLUeJjtZY5t+qA/Cq2DUpEGLKvT+/m3E6qDE7BKhH5ARtH3fOFUxq9I6+zJh2+WKs
7cneAJp2GJfq28O4dhIt65gQ5CWR4qZYGEQrqPF5uKEsCMLpNn6eoGsr4ge89r1qpzxbHWVAAXDh
F70PkjaM6FMtHypMAvZIVjotAHLcDsVgw7Eh2//EXb5UV+GYQaVAcxPlJNQJ72aACPnfDEMsDcL7
IhBTPJVNKeyRKr+0L8YSecgcu0047Eu+lcfFhAygBae0v9haKGJAl6yCo0/dWCFH0SNjmchrokpp
/LVvjnP9F2E5J0pM2vRZHvPa31p+CyMLauFHBM4tl1mHxEcvTDEcQF+hZQqVMWXZkLjTocCKNLsP
wS+aCABjEUWbc2yUAaFMpkLlQVo71Z/HZhSgxvSn33fyugrs31DmQEGte1vh1h5GMoMD+6EeQlhi
m3TtYfErMw6wbJL/1a4M5KEDUnI8/WID64rzQeE10OnnxHOUiJ8WWa+cjrjWBjUK6efFsuOWyisg
WVmVauETNdXu+fGu3kFUM1E+exJciYgnvTwLjyUiIKnCM3yCF7Yb8iRDn1LKizUNtNmiON7xbqsv
mlHLzyp8tJQzppoBNzbP6J5uP8OyGryvEI6REIpw82bCPXqHBC/IOALiUxiKwbuEgG7FVZ2YXHBU
U49jQl/KgV5Ny6Vuyk4zwsSH69dlWMvg2gnVQZjJmJmyguDQxU9i5epi+p1ni/hsmy8w7lRQ4sTi
n7M4uFYOkq1WoWJ/t6r/2s73nZ+GGh3Ml4RCDIrcWT6vH+KDZPLZqWLVIweeqaXDNTr7ywf8JE5h
LyZzjGzH5mWBbfGSuOOxyfoU9H594+L0DW0dJxhEX86kjPYpFZz+vEF0mZBizLmM6RqWmJgNGxP6
edhOg+Saf5DzYtMcYpYQ+ULwLh5BM1alpNut8ClK1ICREXGqnRnj9MzZe5jMknuBPGiwdq8hgpDe
E6SzHl95KSC7lV/BNqzmkSKTb4vE2pt5CxegiM53nYnFUOy8pyO2sm9Yj03wSnG5LxTsVIGJc5m6
Yi7+lYvXWfW/f9xA4nCbT8DAmfy9ghbtkXs7W7pFo7rNBiO5cwwlsOr6w3WyYuF3PUjm1tseCVU2
MJaCNDoRd+CDVsSW55yJ81lNT9MXrngj5iaHuJGPgB4WU8uUK/YBb5RDeKEvR7p+U6ZDD6uoVIQE
QbdjGQAHjhmsL1WBiJ/sKQGhbkXnEXYgzO53XwLTIsodVaFFQmaY72KEQYs8gVCEgczxEKJ2hT9d
FUEEEv+zV0RAB2jBpD1Z0hzgzafQHEVvCNwszyoKEj+EbZ0ey27YXexeYiX/F7LYDKCIS4wZHa16
gOfaCJa4VW4rFqmwXb+UYbRc2hvRYPrwxr61B4H+USIG1vcsdLB50wNjY4fd4Zc7WHsYqAD1UkVF
fljiT0sqIVnwke5ACkc5kVy3D+sux4bBMwnWGAn1xnX0iZL6Z3iAz1ZgTzNoLrfr7upi+5EqgICW
hD+XJR57AqumVoD2wLoHGmowNW7rk3aYUnPUCi1krviAY78RtZsXe9RPIq9MW2zXEeEwnlf7Akzw
AnqIpREduke+/fmtSsY/FXLvFTV6tN0NqEYBjSIwEJ6B9Cjh6jtDlY6RQJkQTyD9V3g9ErHmR6Kr
p+t7u2JBabz8GDAOYfGxJsWTTJtMmp5/0dCKEsM936dYPSjbrpaymQG3hAggYX1bw5QyCCh26g90
tJsBinHJ5UIo1eAs6GrLdaW5KurlwFxE84JX//RVy9RjGgrUg+fjGM+cUwJnMjBpppOWbdkeypRz
ASwqM8ct2IOX+mPovhcLUj07QogOLvxFpL+gWk1j3TIErK0Zux1UPYZQoAMCUGiB8bTd6xaG7V6Q
IPqtff0xW3+GnYf7Q3klZmm6fQ0KjD6CWmPEZP3KZBDb8aQbqkBvbRAZ821uePByJ8o9QWO7y7Iq
4FQqE66FjqjXFeyhPUxOF3uY92dkGI5+moWpolYpY9ChRH3ETtQJI4797aSAXh7VvX2tU0lEHOvq
SURRTIAcZJ8EUeNLtpJWc8P/n82kABROg3zq4DFqxniOnvqsJv2lIdE5wR/u7On8BXkpx8ARZk1h
cL0Ke+PKVJix/CbiENWRFUb0Ac3XohxmcxRd8kDylSyQi626v13qYY4yYL14S83h1N6rMKvrHZFZ
MX6jXcCLRqG7E7gs4aWA3aNvj8UekR32tWGjTobnTC0mkd7msUGcXms3ycecAbbWxDB9HUu6SfTa
j8OS1Iy7pkR+eqLeT8PC77CYVWrw6fLw5waIYIe82fA4/AyHyMrHWeTyPn/+ZWqGHsTAqsPQvo1q
2701RFgTvPxR2eH7m0uBrFHOuJdbQyRKA1gxia5dAdFGNzjruF2rK9AcPhyaIS1cVX5ctI56ljLx
wPfxtNJOyrzjWACtQGRfdMAPcK/JFslFIgfPxHn4Dr5Iu3NIM9lbQjYUe0QRIdwmYeG08OAMJNS4
rkDvAgf9gNLlp+yBPJiuH71uiopWODTjF0UnS3cAtpA9qLGbRa8MZQNkxLWbwO4/6FLuXS5l3lty
pf/WNHvrFBGgtVWL/na8TuP6p5q9h7CcI+GnQTLEap/kRBLKOIcqA1nm5aF8tkihJkEYO56hIYWD
sj9/acJL/0kUop38LKGR8vdUdkvU4exXhOUJ6FMcZL0LX2xfGn2H6hQR96k7LnfbL6La8eLt2o7r
kwOEXx6uw2l/KZFh8DYAbowAGcuQMSctw/mtk0AEPpf4FtID525dzDMaeHnejdX+v45n3nWrDHCx
CXh7OKsVHT7vp4uKRWNjquVofyLTZ9DApxsiIcH5Qzv8y1FkPHNjY4IE5A/X5OHCz/wrQRBaqdBT
+tEp50bo4Hykqtn5t0wkaskYevYG/sYjPtdxj31+0GFd7hDxXloSVMps9Mc1Jr7W/NwyMRa9mniR
7hUXftesa3qZNabB5wulMImRd00PJptf74F7FELCRoZbUxfNrpd20qxH0iSG18oupcMsOy/fuVbi
azUMdZCH5h3FyluuVfBsHwGmJQQQxBSmkNx1AvRoeLmR6xNBPj+MTswz0PkokNGrJUaEv4rWHR6k
37ZHnv+GzYR0QaVp5wt5oj+rYGBjRqcYfirbKSeqdRaLD3vDBIZGqs+H2He35TD6Tfb3z1+mkNj4
GmXNHXFC7NuIeschux+z5kCRzeqI102FVEKYPVbhWyWxbNl1/BE9/dWOA9WCKea4rdWU5PWZdlTo
17QVrM6MW5bJu+HwznQ8sRF5ET7JHSm85Blm9CHRetziQ8IfQZai1Mhf3Ia3+dyQAib9a+Zm3lgH
z4EnZCo5RptowMO8kgrBlOtPwQ6zjEmbR4rKPSm3niGX388X50LVPgiHCL8f25NtpwOeRfKnQ+pu
Tr0zB2TxvpKQcCz6+EG+ZYG/cNTEwx4BGoUlQIpKU2mQNf2P5kNGu4f0B2w+AvkUhXM0gkgx1Nsv
PyiWCDh0MiTg1FX+TZdnbfzlsVshMrcAMlXAM67/7htaMofjSgqG3notwiCUrMUJawE94arqF4bN
Du2Z17qIEeKNB8z+WLxZHHxHNC60LOgKBTXAuPPgnDfwcJ9nE8G6U1YjT2U7ckNhGQeZqsiSurp+
ck2X5Y8K+ilWqjGFH7aOxyp772Nf92L7Kw1SVxV8wMyi2j1f7v+wU7fvdGYqbGe3KrAXk+cP2rqq
CfDasJtl2t2vHJZ2fnZFhB6fOrjlLz9BB03HXlt27hqN3QdL3ZcE+F4nJMlGfrrw7iZDsBlFsrJC
VjxFg+SoiVMW2i2TUyDe1S6UN/hKlxCxMMHKQ+kkB+vYyTLD24ft3Hmqj7FG7z0ltSd+qPS+j2BB
2u5g9Q80W1Xzxzm+qbro2FHq8NTh0iTwWOE8iWC4YDblOmy1j0egXNk3fEnPKwVk9oRv7Siy4KqB
NPBkD+WZ7GzqU6our8y/d8Oaw3qEhPfhnIYo3AjwfXOn9WP/e3QGpVJ6Sjp9pRySP7AESwUTZbOy
M+aURguqUd+WrGzMSIOyV4Q7HeD+44kNWSLv/bjXRkiBI1jDQ3+5reVOWWZOSjlqZJz3s0WVAAph
/6WECc29w7/M/SAGYk4krPwIRQ1ec7DNRnABaa8lby2W2ECjPk9HXK7YpLokw8pTqs24JScPpt4y
9L68u2B+NHbhVWyWbldCGoIRMxfZIJWaq/lnDHF/bw9u9Ur897lUQlDKodWVQ1gMKTAsJJ0Dd+G9
1uhDB5Lh79S2HSmrqaYDeqplH3XLuH2v4GjyxCnUvVXuJgWux0RsDAekSu61wqqAXV8XpQ0rxTDZ
okh7FfE4CjlLw1D6Wi5/vJUUYCGwb1n2BBwMSw6s9rrxNSVWnTVvPTt4gXE8xCSe2NGNMDvtGGZ/
yGEtRxZ8SiL5t43NUlTDkVlzGUcD5yNSRzeTYKuKcgJ7UxVy0a1gyJi/Kg4lcwVoFitGB7xPt1Sn
q0yQnmndxgxLTvfHRZzLrcDsGN8yZWGTTkfcUOksgT9nhCJrHW11HsWNedG2ICt+IXb9ZLPKeGm7
tObs3Q9dNZRfrufhHySf+8fekeB9hoPTvW/8mx/iOnESwTzpJoX8NsmNcR9+IMkx56gFc0SLX7FJ
XF5Qi3NQlVvMt0bopkPlovG88UKR2jRKxuKyVCOQ0RC4Z+SI4SSuH1s48EXCJ0BYPdvggIGmXjsE
ZZNIfOw4pJJ+gsTENdA9a6YQYIKt+TIjDrgzGUUZ4/Nif/Km5g1vMr4JqUSADHzt5lBVhuVkvLQk
c2zUu8JuL1QPEkyY2Sspe58DNmL/mD0sPHjz0ysI/g9qUmsIHfRkr22HtS95kM+DEpczPYEoiMF3
2yxIP2/I7fPdy9OiJZN0v3etO63PSjhUFKekFMBxInFc/nq8Hpyru+KCrULkkBkOzZwiPjfCEHFG
plqL0JYAlyq9lNH0UNeJOzPVNcYD7VhMARVllRMtnaP8WUKW/UQ2H0zBIDpd2c6WsofE9wvEzg0C
MqN5Z/g1UxyTl+ZKOnh56TvXDncSoZgQlKVBVFeYwwk6j4i6cujGS/TxSpYoFDXMCQpGHNLh7t/k
yZQSRaphKMdGzbIiuc2NAMY1DK6sgYId3txyMo/wCOhaSmE/8yyhqxgpMlTAfXLw1kLg3ucPW2u8
rTtAyyAAzWF80q9fhdQ3J0RgLI4gwV8BnoH3+gJJ4qJJmEqXBu74F/LTwd1CUa1SLuUKxcO874PP
lIVVY+JwFcucbCRInBPZaewtCdUNxctJulVFLnk4SzPXlbti7R4ZNzj93tfgOBaslgqzMMMm5Z0Y
AHKqzh8Xd2gQzZmrttcNgV758OgSxZJHZhHJ68wPyHMDRr05OD+ItdWFyhWN548LYJX3gZu0rJiR
BYfPyNe1SPGs5C8EpDOKhXeJ++y5KHHierjczzVaGy2iW2eTWomcVW4xARw3/ycXbq5wH2mZWYwn
8N/WWw58EyHcBizzSd7ySlvGTxo5W/mk4I361fpWfErTwZPeEN4v50VbJWzMPAwCvhMamII/tUhI
M5M8G/5IDoLrIynOAv/mlwe1snhluE8mRjMF+GC0r6dT+wP9c/YqHjIy+WANFqGQfq2Y3rNAQvM3
PM1RzFsno/+Z+1tIsjYHI8lFEN4mEO5pB5DsE+27XKbdc5Rm+YYTtd3jDL0FDMvJQ55m0pCPf7Ui
1aGiKihOC6QHLF74/HCsVnYXuVVKznJ6sYzPHWwUsilASY7yv5xvu7E6iRyyP9Xptj9DV5mp6SFR
TUIcO43qOQleRoWDii2NHKrpoO7zzrMtpoxkvWh+1prrjqgJkx7nltWcd3msbNRqR9KnYpmrb/0h
+kqzBYGBhCXnRS7uUVOitHyWlK7aNorRBRdAbu7U+hMCvjmc8J64yJepH3tZsSOelisHMCU66bR9
YdpWGBoyiUUQ0W42ngxsK2QQfzcE3ZoCROFTVwys1Pu5ygGaVsQiiBrlNOMg+tvr9Noc7HeYFkEt
Y9fM7zWcxjR5gxqcKhxkt4DNu2m4I73fLLIx3XFcVLndNghzTvrukV9qywmhDy9KAVF03wFmXFsU
1+HKEW48WB6/31P0vRSLujpNE5EbPSm6BMNNy46Dh7v+FMOz5GqDysRm5gI/kfiyOB81T3WvEEbr
Bt6UrJsgieeb+BVBmxqLcNhHxQvkpTMMIuQiH3rkfs7Koe3F+/Cgt956BATaU92rzkSY1ufsS4lP
u7KwgBgm9UzGiZ2WNLp1o5Eze35AO8b6CcFD8RwcM6w4xMmIjFxU293Bj3JWxcULyzGg1ifOhH4T
q9vBxTpf1bfNQF+/L/wKaOd4/HmtF+3CHthZ59I27i7NCs3GnQetDcnVGFyb4TCUsrvssxN49fBz
S4hbisHyvxTPRP4NrLod0QsJUPL+LCxTc+HgjvADC7BB4INcQCt33gEiNp5IT/1SIXI5uzR/IPgv
buFVuhKwRJdffTgfIkN5+Qf2ZJiAqdVZK7tmh0Hr/p1W/Ft7Cc3xWqdbpj2umLta37I4iXLqPQk8
cODVY9UDrarxwvUVrG5hk8Bgdv4vTbIvqKlaf0nqRiSsk6xRW0/wyxt90/KNMwvCMzaA3daA2qwJ
WHQhVBxfarXNtdtFFC06uXIdQFRZeWWTWrgpMMn920O3i0nLZmMq7OUTuhSAEiXymd+0kTth+C/o
FQhasnCB+1Z/xBz657G8FGgmGX1ImZnX1wr8xlKSDQrj/2SeX+Ko8avXANp4g/E/lCQq9VhqvCfA
Fdt+feFWb/6pQUNsC7valbVZyDQ245Q7lGDjjdYuzlC/ES4ey0/SFeXDmodeuKTOcFyUyjDQ38WS
U6wDR1M7sCjlf0igopogco9zeO/5aCJSm+561xAoDGKUw7EXcuLTsKLd7O8XgFihtqjQVADtvXlu
b/Gk+XDTbDDVjaVUoFXIsK5ldKmdVt81N5vIv3tvHIMckazfD9skVA296om22EGIMrfcqoASuywN
K0x4ZyFYNpNp41Rr8CQ/h/B0g47QLZUjtNCITdMqkC4r+1G0oJOhUU0cj+l+tjAlnH3/6DVRsKUA
jbs8qQfhPkDq01cSaR6uuZUEwIUKUAejqC5ORIRojP64ARh6WL4ZjaDMjMgC40nGFk7g0+GRmei3
XLswHlHuj4G/CvdngT++ky32kySYo1t4LZ6DTfhW6D5KpmDpISMbvPnnVcBGg5cgCdK+YPD65cZT
uX1/aPqylcJybIxc4WntwmPifMlYkmFBeGmch6bl2NLQbOy4SRTv8JsBGpZbHPz3O2w1Lf4d7Cik
65MxpU2S24kb45TDGUQeZNjLYDdDAe0iigOjz6s+hRzPex72OuMDd5h/WjYQwnpmlmkiPB1jGoRY
9GSh30VjzdgZam3cplTCRVKei8ZgFCUoluSiXKltRNlgPcd6rzICb/hUTmJc2G8fpGKAH+UVyIpC
opCUsXw0poZdCWxQ9qq2c+iosQm0uN5cPGHnvmSsvY89DV1AyzVCJoGC2IDzh/813GQn1nEJB72v
2r5VVngejFvTt2mtSoJ+na5whipi393JiwRaOa2Kxj/1b53isp3IW8aYot+c7TFFmac/lhghNP3b
nfqvWRkVpXtvGfpjQrhoZlQwd4ixPXGIzzai5AE9HMRD2+frog4sF+1/q/2itf4r5cNkbkkLj3dJ
gtnt1p1ComZK1FUP05zDOMIl85wrlzyFrctsOQ27lK+WH2VkpsZLFWbvuf/NwuKXCwi04hZVGtsa
AX+GFB8Sxz+PWJExpa6rOCMyWo5YYPBF3W02hvurmnhh5zSymDvf+JQ4VlncUvmLKGqWtV6xzdUo
frCDVo+kfShjKdgq6fp41n7++4fcYh/aZa/VgUHGP0kiz4nVxvywnUJ2JCSBH3g6eikbC2iIcO83
0PIWiQW6O4Zk3R2iDBYdq62G8ou1kY+udiQxmJIUiCD5uJ76AFs5OqPge5eGnQCsu3wbFa/Fl8tK
g5mgdp3Njcs+b9rfOYF9A87v5wxe31NseQWbZz+zDBxGV7+vGZOE4gCBKrIIUYpM2vBGDvqEfyk3
WXz9qBjjos70fmH6hr2bWk+bOZRZyobORhZVcICF2+QD5VNaXFDvy++e21jsRyLICFX1ruwMObhW
e9Xeenx6dpgNl8h7pHHOtOggaA2AZbQyHdt1Z6KVDACNVDCUcKm8ifK4Wn0iUeLbLDQBWbK0QARA
5qX0q7ASKa4ahihJncMyIP1B4KitTT9uEXYfcL9CTfRT6XnsnMAIaelXuP3fUzEAcrAVGA5cvzZy
CV6xuLgLsEfKg0kZbpvQffFk4Ym8uFA5JNIi7Xwq3S+tJiwJ/SCG0gMyjgIVotbjEZHNVntTu52D
zrqLFJZRQnzXnLFhOQ+UVyEj/oXzSYQjMUUKv+mq6CZERCyo3PLl4AhK9AF+maqnM/U4KQlEtVYu
FPezK+bBjU63qDOIcFJ9vsThwgPRVuNnuCH1cQ1CWVzBkQs3mb+7MZTzKN3XrP5u5g==
`protect end_protected
| apache-2.0 | 03e12aed90e603f867decc0b31945044 | 0.929982 | 1.880376 | false | false | false | false |
jdryg/tis100cpu | ben.vhd | 1 | 11,891 | -- TIS-100 16-bit Basic Execution Node (BEN)
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity ben is
Generic (PROGRAM_FILENAME : string := "unknown.prg");
Port ( I_clk, I_reset : in STD_LOGIC;
I_puw_dataValid : in STD_LOGIC;
I_pdw_dataValid : in STD_LOGIC;
I_plw_dataValid : in STD_LOGIC;
I_prw_dataValid : in STD_LOGIC;
I_pur_dataValid : in STD_LOGIC;
I_pdr_dataValid : in STD_LOGIC;
I_plr_dataValid : in STD_LOGIC;
I_prr_dataValid : in STD_LOGIC;
I_pur_data : in STD_LOGIC_VECTOR (15 downto 0);
I_pdr_data : in STD_LOGIC_VECTOR (15 downto 0);
I_plr_data : in STD_LOGIC_VECTOR (15 downto 0);
I_prr_data : in STD_LOGIC_VECTOR (15 downto 0);
O_puw_writeEnable : out STD_LOGIC;
O_pdw_writeEnable : out STD_LOGIC;
O_plw_writeEnable : out STD_LOGIC;
O_prw_writeEnable : out STD_LOGIC;
O_puw_data : out STD_LOGIC_VECTOR (15 downto 0);
O_pdw_data : out STD_LOGIC_VECTOR (15 downto 0);
O_plw_data : out STD_LOGIC_VECTOR (15 downto 0);
O_prw_data : out STD_LOGIC_VECTOR (15 downto 0);
O_pur_readEnable : out STD_LOGIC;
O_pdr_readEnable : out STD_LOGIC;
O_plr_readEnable : out STD_LOGIC;
O_prr_readEnable : out STD_LOGIC);
end ben;
architecture Behavioral of ben is
-- Intermediate signals
signal PC, NewPC : STD_LOGIC_VECTOR (5 downto 0);
signal opcode : STD_LOGIC_VECTOR (31 downto 0);
signal dst, srcA : STD_LOGIC_VECTOR (2 downto 0);
signal srcB : STD_LOGIC_VECTOR (1 downto 0);
signal imm : STD_LOGIC_VECTOR (15 downto 0);
signal aluOp : STD_LOGIC_VECTOR (2 downto 0);
signal srcA_isPort, dst_isPort, enableWrite, containsIMM, isJmp : STD_LOGIC;
signal jmpCondition : STD_LOGIC_VECTOR (2 downto 0);
signal aluResult, regA_data, regB_data : STD_LOGIC_VECTOR (15 downto 0);
signal readPortData : STD_LOGIC_VECTOR (15 downto 0);
signal isReadPortDataValid : STD_LOGIC;
signal portWriteCompleted : STD_LOGIC;
signal isALUResultZero : STD_LOGIC;
signal aluOpA, aluOpB : STD_LOGIC_VECTOR (15 downto 0);
signal swpRegs, isLastInstr : STD_LOGIC;
component reg
Generic(WIDTH: integer := 8);
Port (
I_clk : in STD_LOGIC;
I_reset : in STD_LOGIC;
I_dataIn : in STD_LOGIC_VECTOR (WIDTH-1 downto 0);
O_dataOut : out STD_LOGIC_VECTOR (WIDTH-1 downto 0));
end component;
component instruction_memory is
generic (FILENAME : string := PROGRAM_FILENAME);
port ( I_addr : in STD_LOGIC_VECTOR (5 downto 0);
O_instr : out STD_LOGIC_VECTOR (31 downto 0));
end component;
component instruction_decoder is
Port ( I_instr : in STD_LOGIC_VECTOR (31 downto 0);
O_dst : out STD_LOGIC_VECTOR (2 downto 0);
O_srcA : out STD_LOGIC_VECTOR (2 downto 0);
O_srcB : out STD_LOGIC_VECTOR (1 downto 0);
O_imm : out STD_LOGIC_VECTOR (15 downto 0);
O_aluOp: out STD_LOGIC_VECTOR (2 downto 0);
O_srcA_isPort : out STD_LOGIC;
O_dst_isPort : out STD_LOGIC;
O_enableWrite : out STD_LOGIC;
O_containsIMM : out STD_LOGIC;
O_isJmp : out STD_LOGIC;
O_jmpCondition : out STD_LOGIC_VECTOR (2 downto 0);
O_isSWP : out STD_LOGIC;
O_isLastInstr : out STD_LOGIC);
end component;
component register_file is
generic (WIDTH : integer := 8);
port ( I_clk : in STD_LOGIC;
I_swp : in STD_LOGIC;
I_enableWrite : in STD_LOGIC;
I_srcAID : in STD_LOGIC_VECTOR (1 downto 0);
I_srcBID : in STD_LOGIC_VECTOR (1 downto 0);
I_dstID : in STD_LOGIC_VECTOR (1 downto 0);
I_dstData : in STD_LOGIC_VECTOR (WIDTH-1 downto 0);
O_srcAData : out STD_LOGIC_VECTOR (WIDTH-1 downto 0);
O_srcBData : out STD_LOGIC_VECTOR (WIDTH-1 downto 0));
end component;
component node_port_readdec is
port ( I_clk : in STD_LOGIC;
I_portID : in STD_LOGIC_VECTOR (2 downto 0);
I_readEnable : in STD_LOGIC;
O_readEnableUp : out STD_LOGIC;
O_readEnableDown : out STD_LOGIC;
O_readEnableLeft : out STD_LOGIC;
O_readEnableRight : out STD_LOGIC);
end component;
component node_port_readmux is
Generic (WIDTH: integer := 8);
Port ( I_portID : in STD_LOGIC_VECTOR (2 downto 0);
I_dataUp : in STD_LOGIC_VECTOR (WIDTH-1 downto 0);
I_dataDown : in STD_LOGIC_VECTOR (WIDTH-1 downto 0);
I_dataLeft : in STD_LOGIC_VECTOR (WIDTH-1 downto 0);
I_dataRight : in STD_LOGIC_VECTOR (WIDTH-1 downto 0);
I_isDataUpValid : in STD_LOGIC;
I_isDataDownValid : in STD_LOGIC;
I_isDataLeftValid : in STD_LOGIC;
I_isDataRightValid : in STD_LOGIC;
O_dataOut : out STD_LOGIC_VECTOR (WIDTH-1 downto 0);
O_isDataOutValid : out STD_LOGIC);
end component;
component node_port_writedec is
Generic (WIDTH : integer := 8);
Port ( I_clk : in STD_LOGIC;
I_portID : in STD_LOGIC_VECTOR (2 downto 0);
I_writeEnable : in STD_LOGIC;
I_data : in STD_LOGIC_VECTOR (WIDTH-1 downto 0);
O_writeEnableUp : out STD_LOGIC;
O_writeEnableDown : out STD_LOGIC;
O_writeEnableLeft : out STD_LOGIC;
O_writeEnableRight : out STD_LOGIC;
O_dataUp : out STD_LOGIC_VECTOR (WIDTH-1 downto 0);
O_dataDown : out STD_LOGIC_VECTOR (WIDTH-1 downto 0);
O_dataLeft : out STD_LOGIC_VECTOR (WIDTH-1 downto 0);
O_dataRight : out STD_LOGIC_VECTOR (WIDTH-1 downto 0));
end component;
component node_port_writermux is
Port ( I_portID : in STD_LOGIC_VECTOR (2 downto 0);
I_isDataUpValid : in STD_LOGIC;
I_isDataDownValid : in STD_LOGIC;
I_isDataLeftValid : in STD_LOGIC;
I_isDataRightValid : in STD_LOGIC;
O_isDataValid : out STD_LOGIC);
end component;
component alu is
generic (WIDTH: integer := 8);
port ( I_a, I_b : in STD_LOGIC_VECTOR (WIDTH-1 downto 0);
I_op : in STD_LOGIC_VECTOR (2 downto 0);
O_isZero : out STD_LOGIC;
O_y : buffer STD_LOGIC_VECTOR (WIDTH-1 downto 0));
end component;
component mux2 is
generic (WIDTH: integer := 8);
port ( I_A, I_B : in STD_LOGIC_VECTOR (WIDTH-1 downto 0);
I_Sel : in STD_LOGIC;
O_Y : out STD_LOGIC_VECTOR (WIDTH-1 downto 0));
end component;
component next_pc is
Port ( I_srcA_isPort : in STD_LOGIC;
I_dst_isPort : in STD_LOGIC;
I_pr_isDataOutValid : in STD_LOGIC;
I_pw_isDataOutValid : in STD_LOGIC;
I_regB_data : in STD_LOGIC_VECTOR (15 downto 0);
I_imm : in STD_LOGIC_VECTOR (15 downto 0);
I_containsIMM : in STD_LOGIC;
I_isJump : in STD_LOGIC;
I_jmpCondition : in STD_LOGIC_VECTOR (2 downto 0);
I_isZero : in STD_LOGIC;
I_isLessThan : in STD_LOGIC;
I_PC : in STD_LOGIC_VECTOR (5 downto 0);
O_NewPC : out STD_LOGIC_VECTOR (5 downto 0));
end component;
begin
-- PC register
regPC: reg
generic map(WIDTH => 6)
port map(
I_clk => I_clk,
I_reset => I_reset OR isLastInstr, -- Enhancement #2: Zero cycle jump to top
I_dataIn => NewPC,
O_dataOut => PC
);
-- Instruction memory
imem: instruction_memory
generic map(FILENAME => PROGRAM_FILENAME)
port map(
I_addr => PC,
O_instr => opcode
);
-- Instruction decoder
idec: instruction_decoder
port map(
I_instr => opcode,
O_dst => dst,
O_srcA => srcA,
O_srcB => srcB,
O_imm => imm,
O_aluOp => aluOp,
O_srcA_isPort => srcA_isPort,
O_dst_isPort => dst_isPort,
O_enableWrite => enableWrite,
O_containsIMM => containsIMM,
O_isJmp => isJmp,
O_jmpCondition => jmpCondition,
O_isSWP => swpRegs, -- Enhancement #1: Single cycle SWP
O_isLastInstr => isLastInstr -- Enhancement #2: Zero cycle jump to top
);
-- Register file
regFile: register_file
generic map (WIDTH => 16)
port map(
I_clk => I_clk,
I_swp => swpRegs, -- Enhancement #1: Single cycle SWP
I_enableWrite => (NOT dst_isPort) AND enableWrite,
I_srcAID => srcA (1 downto 0),
I_srcBID => srcB (1 downto 0),
I_dstID => dst(1 downto 0),
I_dstData => aluResult,
O_srcAData => regA_data,
O_srcBData => regB_data
);
-- Port Reader decoder
portReaderDecoder: node_port_readdec
port map(
I_clk => I_clk,
I_portID => srcA,
I_readEnable => srcA_isPort AND enableWrite,
O_readEnableUp => O_pur_readEnable,
O_readEnableDown => O_pdr_readEnable,
O_readEnableLeft => O_plr_readEnable,
O_readEnableRight => O_prr_readEnable
);
-- Port Reader multiplexer
portReaderMux: node_port_readmux
generic map(WIDTH => 16)
port map(
I_portID => srcA,
I_dataUp => I_pur_data,
I_dataDown => I_pdr_data,
I_dataLeft => I_plr_data,
I_dataRight => I_prr_data,
I_isDataUpValid => I_pur_dataValid,
I_isDataDownValid => I_pdr_dataValid,
I_isDataLeftValid => I_plr_dataValid,
I_isDataRightValid => I_prr_dataValid,
O_dataOut => readPortData,
O_isDataOutValid => isReadPortDataValid
);
-- Port Writer decoder
portWriterDecoder: node_port_writedec
generic map(WIDTH => 16)
port map(
I_clk => I_clk,
I_portID => dst,
I_writeEnable => dst_isPort AND enableWrite,
I_data => aluResult,
O_writeEnableUp => O_puw_writeEnable,
O_writeEnableDown => O_pdw_writeEnable,
O_writeEnableLeft => O_plw_writeEnable,
O_writeEnableRight => O_prw_writeEnable,
O_dataUp => O_puw_data,
O_dataDown => O_pdw_data,
O_dataLeft => O_plw_data,
O_dataRight => O_prw_data
);
-- Port Writer multiplexer
portWriterMux: node_port_writermux
port map(
I_portID => dst,
I_isDataUpValid => I_puw_dataValid,
I_isDataDownValid => I_pdw_dataValid,
I_isDataLeftValid => I_plw_dataValid,
I_isDataRightValid => I_prw_dataValid,
O_isDataValid => portWriteCompleted
);
-- ALU operand logic
srcA_mux: mux2
generic map(WIDTH => 16)
port map(
I_A => regA_data,
I_B => readPortData,
I_Sel => srcA_isPort,
O_Y => aluOpA
);
srcB_mux: mux2
generic map(WIDTH => 16)
port map(
I_A => regB_data,
I_B => imm,
I_Sel => containsIMM,
O_Y => aluOpB
);
-- ALU
arithmeticLogicUnit: alu
generic map(WIDTH => 16)
port map(
I_a => aluOpA,
I_b => aluOpB,
I_op => aluOp,
O_isZero => isALUResultZero,
O_y => aluResult
);
-- Next PC logic
pcLogic: next_pc
port map(
I_srcA_isPort => srcA_isPort,
I_dst_isPort => dst_isPort,
I_pr_isDataOutValid => isReadPortDataValid,
I_pw_isDataOutValid => portWriteCompleted,
I_regB_data => regB_data,
I_imm => imm,
I_containsIMM => containsIMM,
I_isJump => isJmp,
I_jmpCondition => jmpCondition,
I_isZero => isALUResultZero,
I_isLessThan => aluResult(0),
I_PC => PC,
O_NewPC => NewPC
);
end Behavioral;
| mit | 34231c7d69ffb1c53baf6d6041e81c10 | 0.570684 | 3.415972 | false | false | false | false |
rhexsel/xinu-cMIPS | vhdl/core.vhd | 1 | 125,889 | -- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-- cMIPS, a VHDL model of the classical five stage MIPS pipeline.
-- Copyright (C) 2013 Roberto Andre Hexsel
--
-- This program is free software: you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation, version 3.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program. If not, see <http://www.gnu.org/licenses/>.
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-- CPU core
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.p_wires.all;
use work.p_memory.all;
use work.p_exception.all;
entity core is
port (
rst : in std_logic;
clk : in std_logic;
phi1 : in std_logic;
phi2 : in std_logic;
phi3 : in std_logic;
i_aVal : out std_logic;
i_wait : in std_logic;
i_addr : out reg32;
instr : in reg32;
d_aVal : out std_logic;
d_wait : in std_logic;
d_addr : out reg32;
data_inp : in reg32;
data_out : out reg32;
wr : out std_logic;
b_sel : out reg4;
busFree : out std_logic;
nmi : in std_logic;
irq : in reg6;
i_busErr : in std_logic;
d_busErr : in std_logic);
end core;
architecture rtl of core is
-- control pipeline registers ------------
component reg_excp_IF_RF is
port(clk, rst, ld: in std_logic;
IF_excp_type: in exception_type;
RF_excp_type: out exception_type;
PC_abort: in boolean;
RF_PC_abort: out boolean;
IF_PC: in std_logic_vector;
RF_PC: out std_logic_vector);
end component reg_excp_IF_RF;
component reg_excp_RF_EX is
port(clk, rst, ld: in std_logic;
RF_cop0_reg: in reg5;
EX_cop0_reg: out reg5;
RF_cop0_sel: in reg3;
EX_cop0_sel: out reg3;
RF_can_trap: in std_logic_vector;
EX_can_trap: out std_logic_vector;
RF_exception: in exception_type;
EX_exception: out exception_type;
RF_is_delayslot: in std_logic;
EX_is_delayslot: out std_logic;
RF_PC_abort: in boolean;
EX_PC_abort: out boolean;
RF_PC: in std_logic_vector;
EX_PC: out std_logic_vector;
RF_trap_taken: in boolean;
EX_trapped: out boolean);
end component reg_excp_RF_EX;
component reg_excp_EX_MM is
port(clk, rst, ld: in std_logic;
EX_cop0_reg: in reg5;
MM_cop0_reg: out reg5;
EX_cop0_sel: in reg3;
MM_cop0_sel: out reg3;
EX_PC: in std_logic_vector;
MM_PC: out std_logic_vector;
EX_v_addr: in std_logic_vector;
MM_v_addr: out std_logic_vector;
EX_nullify: in boolean;
MM_nullify: out boolean;
EX_addrError: in boolean;
MM_addrError: out boolean;
EX_addrErr_stage_mm: in boolean;
MM_addrErr_stage_mm: out boolean;
EX_is_delayslot: in std_logic;
MM_is_delayslot: out std_logic;
EX_trapped: in boolean;
MM_trapped: out boolean;
EX_ll_sc_abort: in boolean;
MM_ll_sc_abort: out boolean;
EX_tlb_exception: in boolean;
MM_tlb_exception: out boolean;
EX_tlb_stage_MM: in boolean;
MM_tlb_stage_MM: out boolean;
EX_int_req: in reg6;
MM_int_req: out reg6;
EX_is_SC: in boolean;
MM_is_SC: out boolean;
EX_is_MFC0: in boolean;
MM_is_MFC0: out boolean;
EX_is_exception: in exception_type;
MM_is_exception: out exception_type);
end component reg_excp_EX_MM;
component reg_excp_MM_WB is
port(clk, rst, ld: in std_logic;
MM_PC: in std_logic_vector;
WB_PC: out std_logic_vector;
MM_cop0_LLbit: in std_logic;
WB_cop0_LLbit: out std_logic;
MM_is_delayslot: in std_logic;
WB_is_delayslot: out std_logic;
MM_cop0_val: in std_logic_vector;
WB_cop0_val: out std_logic_vector);
end component reg_excp_MM_WB;
signal nullify_MM_pre, nullify_MM_int :std_logic;
signal annul_1, annul_2, annul_twice : std_logic;
signal interrupt, exception_stall : std_logic;
signal dly_i0, dly_i1, dly_i2, dly_interr: std_logic;
signal exception_taken, interrupt_taken, tlb_excp_taken : std_logic;
signal nullify_fetch, nullify, MM_nullify : boolean;
signal addrError, MM_addrError, abort_ref, MM_ll_sc_abort : boolean;
signal PC_abort, RF_PC_abort, EX_PC_abort : boolean;
signal IF_excp_type,RF_excp_type : exception_type;
signal mem_excp_type, tlb_excp_type : exception_type;
signal trap_instr: instr_type;
signal RF_PC,EX_PC,MM_PC,WB_PC, LLaddr: reg32;
signal ll_sc_bit, MM_LLbit,WB_LLbit: std_logic;
signal LL_update, LL_SC_abort, LL_SC_differ: std_logic;
signal EX_trapped, MM_trapped, EX_ovfl, trap_taken: boolean;
signal int_req, MM_int_req: reg6;
signal can_trap,EX_can_trap : reg2;
signal is_trap, tr_signed, tr_stall: std_logic;
signal tr_is_equal, tr_less_than: std_logic;
signal tr_fwd_A, tr_fwd_B, tr_result : reg32;
signal excp_IF_RF_ld,excp_RF_EX_ld,excp_EX_MM_ld,excp_MM_WB_ld: std_logic;
signal update, not_stalled: std_logic;
signal update_reg : reg5;
signal status_update,epc_update,compare_update: std_logic;
signal disable_count, compare_set, compare_clr: std_logic;
signal STATUSinp, STATUS, CAUSE, EPCinp,EPC : reg32;
signal COUNT, COMPARE : reg32;
signal count_eq_compare,count_update,count_enable : std_logic;
signal exception,EX_exception, MM_exception : exception_type;
signal is_exception, EX_is_exception : exception_type;
signal ExcCode : reg5 := cop0code_NULL;
signal exception_dec,TLB_excp_num,trap_dec: integer; -- debugging
signal RF_is_delayslot,EX_is_delayslot,MM_is_delayslot,WB_is_delayslot,is_delayslot : std_logic;
signal cop0_sel, EX_cop0_sel, MM_cop0_sel, epc_source : reg3;
signal cop0_reg,EX_cop0_reg,MM_cop0_reg : reg5;
signal cop0_inp, RF_cop0_val,MM_cop0_val,WB_cop0_val : reg32;
signal BadVAddr, BadVAddr_inp : reg32;
signal BadVAddr_update : std_logic;
signal is_SC, MM_is_SC, is_MFC0, MM_is_MFC0 : boolean;
signal is_busError, is_nmi, is_interr, is_ovfl : boolean;
signal busError_type : exception_type;
-- MMU signals --
signal INDEX, index_inp, RANDOM, WIRED, wired_inp : reg32;
signal index_update, wired_update : std_logic;
signal EntryLo0, EntryLo1, EntryLo0_inp, EntryLo1_inp : reg32;
signal EntryHi, EntryHi_inp, v_addr, MM_v_addr : reg32;
signal Context, PageMask, PageMask_inp : reg32;
signal entryLo0_update, entryLo1_update, entryHi_update : std_logic;
signal context_upd_pte, context_upd_bad, tlb_read, tlb_ex_2 : std_logic;
signal tlb_entrylo0_mm, tlb_entrylo1_mm, tlb_entryhi : reg32;
signal tlb_tag0_updt, tlb_tag1_updt, tlb_tag2_updt, tlb_tag3_updt : std_logic;
signal tlb_tag4_updt, tlb_tag5_updt, tlb_tag6_updt, tlb_tag7_updt : std_logic;
signal tlb_dat0_updt, tlb_dat1_updt, tlb_dat2_updt, tlb_dat3_updt : std_logic;
signal tlb_dat4_updt, tlb_dat5_updt, tlb_dat6_updt, tlb_dat7_updt : std_logic;
signal hit0_pc, hit1_pc, hit2_pc, hit3_pc, hit_pc : boolean;
signal hit4_pc, hit5_pc, hit6_pc, hit7_pc : boolean;
signal hit0_mm, hit1_mm, hit2_mm, hit3_mm, hit_mm : boolean;
signal hit4_mm, hit5_mm, hit6_mm, hit7_mm: boolean;
signal tlb_exception,MM_tlb_exception,tlb_stage_mm,MM_tlb_stage_mm : boolean;
signal addrErr_stage_mm, MM_addrErr_stage_mm : boolean;
signal hit_mm_v, hit_mm_d, hit_pc_v : std_logic;
signal tlb_adr_mm : MMU_idx_bits;
signal tlb_probe, probe_hit, hit_mm_bit : std_logic;
signal mm, tlb_excp_VA : std_logic_vector(VA_HI_BIT downto VA_LO_BIT);
signal tlb_adr,tlb_a0_pc,tlb_a1_pc,tlb_a2_pc : natural range 0 to (MMU_CAPACITY-1);
signal hit_pc_adr, hit_mm_adr : natural range 0 to (MMU_CAPACITY-1);
signal tlb_a0_mm,tlb_a1_mm,tlb_a2_mm : natural range 0 to (MMU_CAPACITY-1);
signal tlb_ppn_pc0,tlb_ppn_pc1 : mmu_dat_reg;
signal tlb_ppn_mm0,tlb_ppn_mm1 : mmu_dat_reg;
signal tlb_ppn_mm, tlb_ppn_pc : std_logic_vector(PPN_BITS - 1 downto 0);
signal tlb_tag0, tlb_tag1, tlb_tag2, tlb_tag3, tlb_tag_inp : reg32;
signal tlb_tag4, tlb_tag5, tlb_tag6, tlb_tag7, e_hi, e_hi_inp : reg32;
signal tlb_dat0_inp, tlb_dat1_inp, e_lo0, e_lo1 : mmu_dat_reg;
signal tlb_dat0_0, tlb_dat1_0, tlb_dat2_0, tlb_dat3_0 : mmu_dat_reg;
signal tlb_dat0_1, tlb_dat1_1, tlb_dat2_1, tlb_dat3_1 : mmu_dat_reg;
signal tlb_dat4_0, tlb_dat5_0, tlb_dat6_0, tlb_dat7_0 : mmu_dat_reg;
signal tlb_dat4_1, tlb_dat5_1, tlb_dat6_1, tlb_dat7_1 : mmu_dat_reg;
signal tlb_entryLo0, tlb_entryLo1, phy_i_addr, phy_d_addr : reg32;
-- other components ------------
component FFD is
port(clk, rst, set, D : in std_logic; Q : out std_logic);
end component FFD;
component adder32 is
port(A, B : in std_logic_vector;
C : out std_logic_vector);
end component adder32;
component mf_alt_add_4 IS
port(datab : IN STD_LOGIC_VECTOR (31 DOWNTO 0);
result : OUT STD_LOGIC_VECTOR (31 DOWNTO 0) );
end component mf_alt_add_4;
component mf_alt_adder IS
port(dataa : IN STD_LOGIC_VECTOR (31 DOWNTO 0);
datab : IN STD_LOGIC_VECTOR (31 DOWNTO 0);
result : OUT STD_LOGIC_VECTOR (31 DOWNTO 0));
end component mf_alt_adder;
component subtr32 IS
port(A,B : in std_logic_vector (31 downto 0);
C : out std_logic_vector (31 downto 0);
sgnd : in std_logic;
ovfl,lt : out std_logic);
end component subtr32;
component reg_bank is
port(wrclk, rdclk, wren: in std_logic;
a_rs, a_rt, a_rd: in std_logic_vector;
C: in std_logic_vector;
A, B: out std_logic_vector);
end component reg_bank;
component register32 is
generic (INITIAL_VALUE: std_logic_vector);
port(clk, rst, ld: in std_logic;
D: in std_logic_vector;
Q: out std_logic_vector);
end component register32;
component registerN is
generic (NUM_BITS: integer; INIT_VAL: std_logic_vector);
port(clk, rst, ld: in std_logic;
D: in std_logic_vector;
Q: out std_logic_vector);
end component registerN;
component counter32 is
generic (INITIAL_VALUE: std_logic_vector);
port(clk, rst, ld, en: in std_logic;
D: in std_logic_vector;
Q: out std_logic_vector);
end component counter32;
component alu is
port(clk, rst: in std_logic;
A, B: in std_logic_vector;
C: out std_logic_vector;
LO: out std_logic_vector;
HI: out std_logic_vector;
wr_hilo: in std_logic;
move_ok: out std_logic;
fun: in t_alu_fun;
postn: in std_logic_vector;
shamt: in std_logic_vector;
ovfl: out std_logic);
end component alu;
signal PC,PC_aligned : reg32;
signal PCinp,PCinp_noExcp, PCincd : reg32;
signal instr_fetched : reg32;
signal PCload, IF_RF_ld : std_logic;
signal PCsel : reg2;
signal excp_PCsel : reg3;
signal rom_stall, iaVal, if_stalled, mem_stall, pipe_stall : std_logic;
signal ram_stall, daVal, mm_stalled : std_logic;
signal br_target, br_addend, br_tgt_pl4, br_tgt_displ, j_target : reg32;
signal RF_PCincd, RF_instruction : reg32;
signal eq_fwd_A,eq_fwd_B : reg32;
signal dbg_jr_stall: integer; -- debugging only
-- register fetch/read and instruction decode --
component reg_IF_RF is
port(clk, rst, ld: in std_logic;
PCincd_d: in std_logic_vector;
PCincd_q: out std_logic_vector;
instr: in std_logic_vector;
RF_instr: out std_logic_vector);
end component reg_IF_RF;
signal opcode, func: reg6;
signal ctrl_word: t_control_type;
signal funct_word: t_function_type;
signal rimm_word: t_rimm_type;
signal syscall_n : reg20;
signal displ16: reg16;
signal br_operand: reg32;
signal br_opr: reg2;
signal br_equal,br_negative,br_eq_zero: boolean;
signal flush_RF_EX: boolean := FALSE;
signal is_branch: std_logic;
signal c_sel : reg2;
-- execution and beyond --
signal RF_EX_ld, EX_MM_ld, MM_WB_ld: std_logic;
signal a_rs,EX_a_rs, a_rt,EX_a_rt,MM_a_rt, a_rd: reg5;
signal a_c,EX_a_c,MM_a_c,WB_a_c: reg5;
signal move,EX_move,MM_move : std_logic;
signal is_load,EX_is_load,MM_is_load : boolean;
signal muxC,EX_muxC,MM_muxC,WB_muxC: reg3;
signal wreg,EX_wreg_pre,EX_wreg,MM_wreg_cond,MM_wreg,WB_wreg: std_logic;
signal aVal,EX_aVal,EX_aVal_cond,MM_aVal: std_logic;
signal wrmem,EX_wrmem,EX_wrmem_cond,MM_wrmem, m_sign_ext: std_logic;
signal mem_t, EX_mem_t,MM_mem_t: reg4;
signal WB_mem_t : reg2;
signal alu_inp_A,alu_fwd_B,alu_inp_B : reg32;
signal alu_move_ok, MM_alu_move_ok, ovfl : std_logic;
signal selB,EX_selB: std_logic;
signal oper,EX_oper: t_alu_fun;
signal EX_postn, shamt,EX_shamt: reg5;
signal regs_A,EX_A,MM_A,WB_A, regs_B,EX_B,MM_B: reg32;
signal displ32,EX_displ32: reg32;
signal result,MM_result,WB_result,WB_C, EX_addr,MM_addr: reg32;
signal pc_p8,EX_pc_p8,MM_pc_p8,WB_pc_p8 : reg32;
signal HI,MM_HI,WB_HI, LO,MM_LO,WB_LO : reg32;
-- data memory --
signal rd_data_raw, rd_data, WB_rd_data, WB_mem_data: reg32;
signal MM_B_data, WB_B_data: reg32;
signal jr_stall, br_stall, sw_stall, lw_stall : std_logic;
signal fwd_lwlr : boolean;
signal fwd_mem, WB_addr2: reg2;
component reg_RF_EX is
port(clk, rst, ld: in std_logic;
selB: in std_logic;
EX_selB: out std_logic;
oper: in t_alu_fun;
EX_oper: out t_alu_fun;
a_rs: in std_logic_vector;
EX_a_rs: out std_logic_vector;
a_rt: in std_logic_vector;
EX_a_rt: out std_logic_vector;
a_c: in std_logic_vector;
EX_a_c: out std_logic_vector;
wreg: in std_logic;
EX_wreg: out std_logic;
muxC: in std_logic_vector;
EX_muxC: out std_logic_vector;
move: in std_logic;
EX_move: out std_logic;
postn: in std_logic_vector;
EX_postn: out std_logic_vector;
shamt: in std_logic_vector;
EX_shamt: out std_logic_vector;
aVal: in std_logic;
EX_aVal: out std_logic;
wrmem: in std_logic;
EX_wrmem: out std_logic;
mem_t: in std_logic_vector;
EX_mem_t: out std_logic_vector;
is_load: in boolean;
EX_is_load: out boolean;
A: in std_logic_vector;
EX_A: out std_logic_vector;
B: in std_logic_vector;
EX_B: out std_logic_vector;
displ32: in std_logic_vector;
EX_displ32: out std_logic_vector;
pc_p8: in std_logic_vector;
EX_pc_p8: out std_logic_vector);
end component reg_RF_EX;
component reg_EX_MM is
port(clk, rst, ld: in std_logic;
EX_a_rt: in std_logic_vector;
MM_a_rt: out std_logic_vector;
EX_a_c: in std_logic_vector;
MM_a_c: out std_logic_vector;
EX_wreg: in std_logic;
MM_wreg: out std_logic;
EX_muxC: in std_logic_vector;
MM_muxC: out std_logic_vector;
EX_aVal: in std_logic;
MM_aVal: out std_logic;
EX_wrmem: in std_logic;
MM_wrmem: out std_logic;
EX_mem_t: in std_logic_vector;
MM_mem_t: out std_logic_vector;
EX_is_load: in boolean;
MM_is_load: out boolean;
EX_A: in std_logic_vector;
MM_A: out std_logic_vector;
EX_B: in std_logic_vector;
MM_B: out std_logic_vector;
EX_result: in std_logic_vector;
MM_result: out std_logic_vector;
EX_addr: in std_logic_vector;
MM_addr: out std_logic_vector;
HI: in std_logic_vector;
MM_HI: out std_logic_vector;
LO: in std_logic_vector;
MM_LO: out std_logic_vector;
EX_alu_move_ok: in std_logic;
MM_alu_move_ok: out std_logic;
EX_move: in std_logic;
MM_move: out std_logic;
EX_pc_p8: in std_logic_vector;
MM_pc_p8: out std_logic_vector);
end component reg_EX_MM;
component reg_MM_WB is
port(clk, rst, ld: in std_logic;
MM_a_c: in std_logic_vector;
WB_a_c: out std_logic_vector;
MM_wreg: in std_logic;
WB_wreg: out std_logic;
MM_muxC: in std_logic_vector;
WB_muxC: out std_logic_vector;
MM_A: in std_logic_vector;
WB_A: out std_logic_vector;
MM_result: in std_logic_vector;
WB_result: out std_logic_vector;
MM_HI: in std_logic_vector;
WB_HI: out std_logic_vector;
MM_LO: in std_logic_vector;
WB_LO: out std_logic_vector;
rd_data: in std_logic_vector;
WB_rd_data: out std_logic_vector;
MM_B_data: in std_logic_vector;
WB_B_data: out std_logic_vector;
MM_addr2: in std_logic_vector;
WB_addr2: out std_logic_vector;
MM_oper: in std_logic_vector;
WB_oper: out std_logic_vector;
MM_pc_p8: in std_logic_vector;
WB_pc_p8: out std_logic_vector);
end component reg_MM_WB;
-- fields of the control table
-- aVal: std_logic; -- addressValid, enable data-mem=0
-- wmem: std_logic; -- READ=1/WRITE=0 in/to memory
-- i: instr_type; -- instruction
-- wreg: std_logic; -- register write=0
-- selB: std_logic; -- B ALU input, reg=0 ext=1
-- fun: std_logic; -- check function_field=1
-- oper: t_alu_fun; -- ALU operation
-- muxC: reg3; -- select result mem=0 ula=1 jr=2 pc+8=3
-- c_sel: reg2; -- select destination reg RD=0 RT=1 31=2
-- extS: std_logic; -- sign-extend=1, zero-ext=0
-- PCsel: reg2; -- PCmux 0=PC+4 1=beq 2=j 3=jr
-- br_t: t_comparison; -- branch: 0=no 1=beq 2=bne
-- excp: reg2 -- stage with exception 0=no,1=rf,2=ex,3=mm
constant ctrl_table : t_control_mem := (
--aVal wmem ins wreg selB fun oper muxC csel extS PCsel br_t excp
('1','1',iALU, '1','0','1',opNOP,"001","00", '0', "00",cNOP,"00"),--ALU=0
('1','1',RIMM, '1','0','0',opNOP,"001","00", '1', "00",cOTH,"00"),--BR=1
('1','1',J, '1','0','0',opNOP,"001","00", '0', "10",cNOP,"00"),--j=2
('1','1',JAL, '0','0','0',opNOP,"011","10", '0', "10",cNOP,"00"),--jal=3
('1','1',BEQ, '1','0','0',opNOP,"001","00", '1', "01",cEQU,"00"),--beq=4
('1','1',BNE, '1','0','0',opNOP,"001","00", '1', "01",cNEQ,"00"),--bne=5
('1','1',BLEZ, '1','0','0',opNOP,"001","00", '1', "01",cLEZ,"00"),--blez=6
('1','1',BGTZ, '1','0','0',opNOP,"001","00", '1', "01",cGTZ,"00"),--bgtz=7
('1','1',ADDI, '0','1','0',opADD,"001","01", '1', "00",cNOP,"10"),--addi=8
('1','1',ADDIU,'0','1','0',opADD,"001","01", '1', "00",cNOP,"00"),--addiu=9
('1','1',SLTI, '0','1','0',opSLT,"001","01", '1', "00",cNOP,"10"),--slti=10
('1','1',SLTIU,'0','1','0',opSLTU,"001","01",'1', "00",cNOP,"00"),--sltiu11
('1','1',ANDI, '0','1','0',opAND,"001","01", '0', "00",cNOP,"00"),--andi=12
('1','1',ORI, '0','1','0',opOR, "001","01", '0', "00",cNOP,"00"),--ori=13
('1','1',XORI, '0','1','0',opXOR,"001","01", '0', "00",cNOP,"00"),--xori=14
('1','1',LUI, '0','1','0',opLUI,"001","01", '0', "00",cNOP,"00"),--lui=15
('1','1',COP0, '1','0','1',opNOP,"110","01", '0', "00",cNOP,"00"),--COP0=16
('1','1',NIL, '1','0','0',opNOP,"001","00", '0', "00",cNOP,"00"),--17
('1','1',NIL, '1','0','0',opNOP,"001","00", '0', "00",cNOP,"00"),--18
('1','1',NIL, '1','0','0',opNOP,"001","00", '0', "00",cNOP,"00"),--19
('1','1',NIL, '1','0','0',opNOP,"001","00", '0', "00",cNOP,"00"),--beql=20
('1','1',NIL, '1','0','0',opNOP,"001","00", '0', "00",cNOP,"00"),--bnel=21
('1','1',NIL, '1','0','0',opNOP,"001","00", '0', "00",cNOP,"00"),--blzel=22
('1','1',NIL, '1','0','0',opNOP,"001","00", '0', "00",cNOP,"00"),--bgtzl=23
('1','1',NIL, '1','0','0',opNOP,"001","00", '0', "00",cNOP,"00"),--24
('1','1',NIL, '1','0','0',opNOP,"001","00", '0', "00",cNOP,"00"),--25
('1','1',NIL, '1','0','0',opNOP,"001","00", '0', "00",cNOP,"00"),--26
('1','1',NIL, '1','0','0',opNOP,"001","00", '0', "00",cNOP,"00"),--27
('1','1',SPEC2,'0','0','0',opSPC,"001","00", '0', "00",cNOP,"00"),--28
('1','1',NIL, '1','0','0',opNOP,"001","00", '0', "00",cNOP,"00"),--29
('1','1',NIL, '1','0','0',opNOP,"001","00", '0', "00",cNOP,"00"),--30
('1','1',SPEC3,'0','0','0',opSPC,"001","00", '0', "00",cNOP,"00"),--special3
('0','1',LB, '0','1','0',opADD,"000","01", '1', "00",cNOP,"11"),--lb=32
('0','1',LH, '0','1','0',opADD,"000","01", '1', "00",cNOP,"11"),--lh=33
('0','1',LWL, '0','1','0',opADD,"000","01", '1', "00",cNOP,"11"),--lwl=34
('0','1',LW, '0','1','0',opADD,"000","01", '1', "00",cNOP,"11"),--lw=35
('0','1',LBU, '0','1','0',opADD,"000","01", '1', "00",cNOP,"11"),--lbu=36
('0','1',LHU, '0','1','0',opADD,"000","01", '1', "00",cNOP,"11"),--lhu=37
('0','1',LWR, '0','1','0',opADD,"000","01", '1', "00",cNOP,"11"),--lwr=38
('1','1',NIL, '1','0','0',opNOP,"001","00", '0', "00",cNOP,"00"),--39
('0','0',SB, '1','1','0',opADD,"001","00", '1', "00",cNOP,"11"),--sb=40
('0','0',SH, '1','1','0',opADD,"001","00", '1', "00",cNOP,"11"),--sh=41
('1','1',NIL, '1','0','0',opNOP,"001","00", '0', "00",cNOP,"00"),--swl=42
('0','0',SW, '1','1','0',opADD,"001","00", '1', "00",cNOP,"11"),--sw=43
('1','1',NIL, '1','0','0',opNOP,"001","00", '0', "00",cNOP,"00"),--44
('1','1',NIL, '1','0','0',opNOP,"001","00", '0', "00",cNOP,"00"),--45
('1','1',NIL, '1','0','0',opNOP,"001","00", '0', "00",cNOP,"00"),--swr=46
('1','1',NIL, '1','0','0',opNOP,"001","00", '0', "00",cNOP,"00"),--cache=47
('0','1',LL, '0','1','0',opADD,"000","01", '1', "00",cNOP,"11"),--ll=48
('1','1',NIL, '1','0','0',opNOP,"001","00", '0', "00",cNOP,"00"),--lwc1=49
('1','1',NIL, '1','0','0',opNOP,"001","00", '0', "00",cNOP,"00"),--lwc2=50
('1','1',NIL, '1','0','0',opNOP,"001","00", '0', "00",cNOP,"00"),--pref=51
('1','1',NIL, '1','0','0',opNOP,"001","00", '0', "00",cNOP,"00"),--52
('1','1',NIL, '1','0','0',opNOP,"001","00", '0', "00",cNOP,"00"),--ldc1=53
('1','1',NIL, '1','0','0',opNOP,"001","00", '0', "00",cNOP,"00"),--ldc2=54
('1','1',NIL, '1','0','0',opNOP,"001","00", '0', "00",cNOP,"00"),--55
('0','0',SC, '0','1','0',opADD,"111","01", '1', "00",cNOP,"11"),--sc=56
('1','1',NIL, '1','0','0',opNOP,"001","00", '0', "00",cNOP,"00"),--swc1=57
('1','1',NIL, '1','0','0',opNOP,"001","00", '0', "00",cNOP,"00"),--swc2=58
('1','1',NIL, '1','0','0',opNOP,"001","00", '0', "00",cNOP,"00"),--59
('1','1',NIL, '1','0','0',opNOP,"001","00", '0', "00",cNOP,"00"),--60
('1','1',NIL, '1','0','0',opNOP,"001","00", '0', "00",cNOP,"00"),--sdc1=61
('1','1',NIL, '1','0','0',opNOP,"001","00", '0', "00",cNOP,"00"),--sdc2=62
('1','1',NOP, '1','0','0',opNOP,"000","00", '0', "00",cNOP,"00") --63
);
-- fields of the function table (opcode=0)
-- i: instr_type; -- instruction
-- wreg: std_logic; -- register write=0
-- selB: std_logic; -- B ALU input, reg=0 ext=1
-- oper: t_alu_fun; -- ALU operation
-- muxC: reg3; -- select result mem=0 ula=1 jr=2 pc+8=3
-- trap: std_logic; -- trap on compare
-- move: std_logic; -- conditional move
-- sync: std_logic; -- synch the memory hierarchy
-- PCsel: reg2; -- PCmux 0=PC+4 1=beq 2=j 3=jr
-- excp: reg2 -- stage with exception 0=no,1=rf,2=ex,3=mm
constant func_table : t_function_mem := (
-- i wreg selB oper muxC trap mov syn PCsel excp
(iSLL, '0','0',opSLL, "001",'0','0','0',"00","00"), --sll=0, EHB
(NIL, '1','0',opNOP, "001",'0','0','0',"00","00"), --1, FlPoint
(iSRL, '0','0',opSRL, "001",'0','0','0',"00","00"), --srl=2
(iSRA, '0','0',opSRA, "001",'0','0','0',"00","00"), --sra=3
(SLLV, '0','0',opSLLV, "001",'0','0','0',"00","00"), --sllv=4
(NIL, '1','0',opNOP, "001",'0','0','0',"00","00"), --5
(SRLV, '0','0',opSRLV, "001",'0','0','0',"00","00"), --srlv=6
(SRAV, '0','0',opSRAV, "001",'0','0','0',"00","00"), --srav=7
(JR, '1','0',opNOP, "001",'0','0','0',"11","00"), --jr=8
(JALR, '0','0',opNOP, "011",'0','0','0',"11","00"), --jalr=9
(MOVZ, '0','0',opMOVZ, "001",'0','1','0',"00","00"), --movz=10
(MOVN, '0','0',opMOVN, "001",'0','1','0',"00","00"), --movn=11
(SYSCALL,'1','0',trNOP,"001",'1','0','0',"00","00"), --syscall=12
(BREAK,'1','0',trNOP, "001",'1','0','0',"00","00"), --break=13
(NIL, '1','0',opNOP, "001",'0','0','0',"00","00"), --14
(NIL, '1','0',opNOP, "001",'0','0','0',"00","00"), --15
(MFHI, '0','0',opMFHI, "100",'0','0','0',"00","00"), --mfhi=16
(MTHI, '1','0',opMTHI, "001",'0','0','0',"00","00"), --mthi=17
(MFLO, '0','0',opMFLO, "101",'0','0','0',"00","00"), --mflo=18
(MTLO, '1','0',opMTLO, "001",'0','0','0',"00","00"), --mtlo=19
(NIL, '1','0',opNOP, "001",'0','0','0',"00","00"), --20
(NIL, '1','0',opNOP, "001",'0','0','0',"00","00"), --21
(NIL, '1','0',opNOP, "001",'0','0','0',"00","00"), --22
(NIL, '1','0',opNOP, "001",'0','0','0',"00","00"), --23
(MULT, '1','0',opMULT, "001",'0','0','0',"00","00"), --mult=24
(MULTU,'1','0',opMULTU,"001",'0','0','0',"00","00"), --multu=25
(DIV, '1','0',opDIV, "001",'0','0','0',"00","00"), --div=26
(DIVU, '1','0',opDIVU, "001",'0','0','0',"00","00"), --divu=27
(NIL, '1','0',opNOP, "001",'0','0','0',"00","00"), --28
(NIL, '1','0',opNOP, "001",'0','0','0',"00","00"), --29
(NIL, '1','0',opNOP, "001",'0','0','0',"00","00"), --30
(NIL, '1','0',opNOP, "001",'0','0','0',"00","00"), --31
(ADD, '0','0',opADD, "001",'0','0','0',"00","10"), --add=32
(ADDU, '0','0',opADDU, "001",'0','0','0',"00","00"), --addu=33
(SUB, '0','0',opSUB, "001",'0','0','0',"00","10"), --sub=34
(SUBU, '0','0',opSUBU, "001",'0','0','0',"00","00"), --subu=35
(iAND, '0','0',opAND, "001",'0','0','0',"00","00"), --and=36
(iOR, '0','0',opOR, "001",'0','0','0',"00","00"), --or=37
(iXOR, '0','0',opXOR, "001",'0','0','0',"00","00"), --xor=38
(iNOR, '0','0',opNOR, "001",'0','0','0',"00","00"), --nor=39
(NIL, '1','0',opNOP, "001",'0','0','0',"00","00"), --40
(NIL, '1','0',opNOP, "001",'0','0','0',"00","00"), --41
(SLT, '0','0',opSLT, "001",'0','0','0',"00","10"), --slt=42
(SLTU, '0','0',opSLTU, "001",'0','0','0',"00","00"), --sltu=43
(NIL, '1','0',opNOP, "001",'0','0','0',"00","00"), --44
(NIL, '1','0',opNOP, "001",'0','0','0',"00","00"), --45
(NIL, '1','0',opNOP, "001",'0','0','0',"00","00"), --46
(NIL, '1','0',opNOP, "001",'0','0','0',"00","00"), --47
(TGE, '1','0',trGEQ, "001",'1','0','0',"00","10"), --tge=48
(TGEU, '1','0',trGEU, "001",'1','0','0',"00","10"), --tgeu=49
(TLT, '1','0',trLTH, "001",'1','0','0',"00","10"), --tlt=50
(TLTU, '1','0',trLTU, "001",'1','0','0',"00","10"), --tltu=51
(TEQ, '1','0',trEQU, "001",'1','0','0',"00","10"), --teq=52
(NIL, '1','0',opNOP, "001",'0','0','0',"00","00"), --53
(TNE, '1','0',trNEQ, "001",'1','0','0',"00","10"), --tne=54
(NIL, '1','0',opNOP, "001",'0','0','0',"00","00"), --55
(NIL, '1','0',opNOP, "001",'0','0','0',"00","00"), --56
(NIL, '1','0',opNOP, "001",'0','0','0',"00","00"), --57
(NIL, '1','0',opNOP, "001",'0','0','0',"00","00"), --58
(NIL, '1','0',opNOP, "001",'0','0','0',"00","00"), --59
(NIL, '1','0',opNOP, "001",'0','0','0',"00","00"), --60
(NIL, '1','0',opNOP, "001",'0','0','0',"00","00"), --61
(NIL, '1','0',opNOP, "001",'0','0','0',"00","00"), --62
(NOP, '1','0',opNOP, "001",'0','0','0',"00","00") --63
);
-- fields of the register-immediate control table (opcode=1)
-- i: instr_type; -- instruction
-- wreg: std_logic; -- register write=0
-- selB: std_logic; -- B ALU input, reg=0 ext=1
-- br_t: t_comparison; -- comparison type: ltz,gez
-- muxC: reg3; -- select result mem=0 ula=1 jr=2 *al(pc+8)=3
-- c_sel: reg2 -- select destination reg rd=0 rt=1 31=2
-- trap: std_logic; -- trap on compare
-- PCsel: reg2; -- PCmux 0=PC+4 1=beq 2=j 3=jr
-- excp: reg2 -- stage with exception 0=no,1=rf,2=ex,3=mm
constant rimm_table : t_rimm_mem := (
-- i wreg selB br_t muxC csel trap PCsel excp
(BLTZ, '1','0',cLTZ, "001","00",'0',"01","00"), --0bltz
(BGEZ, '1','0',cGEZ, "001","00",'0',"01","00"), --1bgez
(NIL, '1','0',cNOP, "001","00",'0',"00","00"), --2
(NIL, '1','0',cNOP, "001","00",'0',"00","00"), --3
(NIL, '1','0',cNOP, "001","00",'0',"00","00"), --4
(NIL, '1','0',cNOP, "001","00",'0',"00","00"), --5
(NIL, '1','0',cNOP, "001","00",'0',"00","00"), --6
(NIL, '1','0',cNOP, "001","00",'0',"00","00"), --7
(TGEI, '1','1',tGEQ, "001","00",'1',"00","10"), --8tgei
(TGEIU,'1','1',tGEU, "001","00",'1',"00","10"), --9tgeiu
(TLTI, '1','1',tLTH, "001","00",'1',"00","10"), --10tlti
(TLTIU,'1','1',tLTU, "001","00",'1',"00","10"), --11tltiu
(TEQI, '1','1',tEQU, "001","00",'1',"00","10"), --12teqi
(NIL, '1','0',cNOP, "001","00",'0',"00","00"), --13
(TNEI, '1','1',tNEQ, "001","00",'1',"00","10"), --14tnei
(NIL, '1','0',cNOP, "001","00",'0',"00","00"), --15
(BLTZAL,'0','0',cLTZ,"011","10",'0',"01","00"), --16bltzal
(BGEZAL,'0','0',cGEZ,"011","10",'0',"01","00"), --17bgezal
(NIL, '1','0',cNOP, "001","00",'0',"00","00"), --18
(NIL, '1','0',cNOP, "001","00",'0',"00","00"), --19
(NIL, '1','0',cNOP, "001","00",'0',"00","00"), --20
(NIL, '1','0',cNOP, "001","00",'0',"00","00"), --21
(NIL, '1','0',cNOP, "001","00",'0',"00","00"), --22
(NIL, '1','0',cNOP, "001","00",'0',"00","00"), --23
(NIL, '1','0',cNOP, "001","00",'0',"00","00"), --24
(NIL, '1','0',cNOP, "001","00",'0',"00","00"), --25
(NIL, '1','0',cNOP, "001","00",'0',"00","00"), --26
(NIL, '1','0',cNOP, "001","00",'0',"00","00"), --27
(NIL, '1','0',cNOP, "001","00",'0',"00","00"), --28
(NIL, '1','0',cNOP, "001","00",'0',"00","00"), --29
(NIL, '1','0',cNOP, "001","00",'0',"00","00"), --30
(NOP, '1','0',cNOP, "001","00",'0',"00","00") --31
);
-- Table 8-30 Config Register Field Descriptions, pg 101
constant CONFIG0 : reg32 := (
'1'& -- M, Config1 implemented = 1
b"000"& -- K23, with MMU, kseg2,kseg3 coherency algorithm
b"000"& -- KU, with MMU, kuseg coherency algorithm
b"000000000"& -- Impl, implementation dependent = 0
'0'& -- BE, little endian = 0
b"00"& -- AT, MIPS32 = 0
b"001"& -- AR, Release 2 = 1
b"001"& -- MT, MMU type = 1, standard
b"000"& -- nil, always zero = 0
'1'& -- VI, Instruction Cache is virtual = 1
b"000" -- K0, Kseg0 coherency algorithm
);
-- Table 8-31 Config1 Register Field Descriptions, pg 103
constant CONFIG1 : reg32 := (
'0'& -- M, Config2 not implemented = 0
MMU_SIZE & -- MMUsz, MMU entries minus 1
IC_SETS_PER_WAY & -- ICS, IC sets per way
IC_LINE_SIZE & -- ICL, IC line size
IC_ASSOCIATIVITY & -- ICA, IC associativity
DC_SETS_PER_WAY & -- DCS, DC sets per way
DC_LINE_SIZE & -- DCL, DC line size = 3 16 bytes/line
DC_ASSOCIATIVITY & -- DCA, DC associativity = 0 direct mapped
'0'& -- C2, No coprocessor 2 implemented = 0
'0'& -- MD, No MDMX ASE implemented = 0
'0'& -- PC, No performance counters implemented = 0
'0'& -- WR, No watch registers implemented = 0
'0'& -- CA, No code compression implemented = 0
'0'& -- EP, No EJTAG implemented = 0
'0' -- FP, No FPU implemented = 0
);
-- pipeline ============================================================
begin
-- INSTR_FETCH_STATE_MACHINE: instruction-bus control
U_ifetch_stalled: FFD port map (clk => phi2, rst => rst, set => '1',
D => mem_stall, Q => if_stalled);
-- iaVal <= '1' when ((phi0 = '1' and if_stalled = '0')) else '0';
i_aVal <= '0'; -- interface signal/port, always fetches a new instruction
iaVal <= '0'; -- internal signal
rom_stall <= not(iaVal) and not(i_wait);
mem_stall <= ram_stall or rom_stall;
not_stalled <= not(mem_stall);
-- end INSTR_FETCH_STATE_MACHINE --------------------------
-- PROGRAM COUNTER AND INSTRUCTION FETCH ------------------
pipe_stall <= rom_stall or ram_stall or jr_stall or br_stall or
sw_stall or lw_stall or tr_stall or exception_stall;
PCload <= '1' when pipe_stall = '1' else '0';
IF_RF_ld <= '1' when pipe_stall = '1' else '0';
RF_EX_ld <= mem_stall; -- or exception_stall;
EX_MM_ld <= mem_stall;
MM_WB_ld <= mem_stall;
excp_IF_RF_ld <= '1' when pipe_stall = '1' else '0';
excp_RF_EX_ld <= mem_stall; -- or exception_stall;
excp_EX_MM_ld <= mem_stall;
excp_MM_WB_ld <= mem_stall;
with PCsel select
PCinp_noExcp <= PCincd when b"00", -- next instruction
br_target when b"01", -- taken branch
j_target when b"10", -- jump
eq_fwd_A when b"11", -- jump register regs_A
(others => 'X') when others;
with excp_PCsel select
PCinp <= PCinp_noExcp when PCsel_EXC_none, -- no exception
EPC when PCsel_EXC_EPC, -- ERET
x_EXCEPTION_0000 when PCsel_EXC_0000, -- TLBrefill entry point
x_EXCEPTION_0180 when PCsel_EXC_0180, -- general exception handler
x_EXCEPTION_0200 when PCsel_EXC_0200, -- separate interrupt handler
x_EXCEPTION_BFC0 when PCsel_EXC_BFC0, -- NMI or soft-reset handler
(others => 'X') when others;
-- x_EXCEPTION_0100 when PCsel_EXC_0100, -- Cache Error
PC_abort <= PC(1 downto 0) /= b"00";
IF_excp_type <= IFaddressError when PC_abort else exNOP;
PIPESTAGE_PC: register32 generic map (x_INST_BASE_ADDR)
port map (clk, rst, PCload, PCinp, PC);
PC_aligned <= PC(31 downto 2) & b"00";
-- PCincd <= std_logic_vector( 4 + signed(PC_aligned) );
U_INCPC: mf_alt_add_4 PORT MAP( datab => PC_aligned, result => PCincd );
-- uncomment this when NOT making use of the TLB
i_addr <= PC_aligned; -- fetch instruction from aligned address
-- uncomment this when making use of the TLB
-- i_addr <= phy_i_addr;
nullify_fetch <= (MM_tlb_exception and not(MM_tlb_stage_mm));
instr_fetched(25 downto 0) <= instr(25 downto 0);
instr_fetched(31 downto 26) <= instr(31 downto 26)
when not(nullify_fetch or PC_abort
or MM_addrError)
else NULL_INSTRUCTION(31 downto 26); -- x"fc";
PIPESTAGE_IF_RF: reg_IF_RF
port map (clk,rst, IF_RF_ld, PCincd, RF_PCincd,
instr_fetched, RF_instruction);
-- INSTRUCTION DECODE AND REGISTER FETCH -----------------
annul_1 <= BOOL2SL(nullify or MM_addrError);
U_NULLIFY_TWICE: FFD port map (clk, rst, '1', annul_1, annul_2);
annul_twice <= annul_1 or annul_2;
opcode <= RF_instruction(31 downto 26) when annul_twice = '0' else
NULL_INSTRUCTION (31 downto 26);
a_rs <= RF_instruction(25 downto 21);
a_rt <= RF_instruction(20 downto 16);
a_rd <= RF_instruction(15 downto 11);
shamt <= RF_instruction(10 downto 6);
func <= RF_instruction( 5 downto 0);
displ16 <= RF_instruction(15 downto 0);
syscall_n <= RF_instruction(25 downto 6);
ctrl_word <= ctrl_table( to_integer(unsigned(opcode)) );
funct_word <=
func_table( to_integer(unsigned(func)) ) when opcode = b"000000" else
func_table( 63 ); -- null instruction (sigs inactive)
rimm_word <=
rimm_table( to_integer(unsigned(a_rt)) ) when opcode = b"000001" else
rimm_table( 31 ); -- null instruction (sigs inactive)
is_branch <= '1' when ((ctrl_word.br_t /= cNOP)
or((rimm_word.br_t /= cNOP)and(rimm_word.trap='0')))
else '0';
is_trap <= '1' when ((funct_word.trap = '1')or(rimm_word.trap = '1'))
else '0';
RF_is_delayslot <= '1' when ((ctrl_word.PCsel /= "00") or
(funct_word.PCsel /= "00") or
(rimm_word.PCsel /= "00"))
else '0';
RF_STOP_SIMULATION: process (rst, phi2, opcode, func,
ctrl_word, funct_word, rimm_word,
RF_PC, exception, syscall_n)
begin
if rst = '1' and phi2 = '1' then
-- normal end of simulation, instruction "wait 0"
assert not(exception = exWAIT and syscall_n = x"80000")
report LF & "cMIPS BREAKPOINT at PC="& SLV32HEX(RF_PC) &
" opc="& SLV2STR(opcode) & " fun=" & SLV2STR(func) &
" brk=" & SLV2STR(syscall_n) &
LF & "SIMULATION ENDED (correctly?) AT exit();"
severity failure;
-- simulation aborted by instruction "wait N"
assert not(exception = exWAIT and syscall_n /= x"80000")
report LF & " PC="& SLV32HEX(PC) &
" EPC="& SLV32HEX(EPC) &
" bad="& SLV32HEX(BadVAddr) &
" opc="& SLV2STR(opcode) & " wait=" & SLV2STR(syscall_n(7 downto 0)) &
" instr=" & SLV32HEX(RF_instruction) &
LF & "SIMULATION ABORTED AT EXCEPTION HANDLER;"
severity failure;
-- abort on invalid/unimplemented opcodes
if opcode = b"000000" and funct_word.i = NIL then
assert (1=0)
report LF & "INVALID OPCODE at PC="& SLV32HEX(RF_PC) &
" opc="& SLV2STR(opcode) & " instr=" & SLV32HEX(RF_instruction) &
LF & "SIMULATION ABORTED"
severity failure;
elsif opcode = b"000001" and rimm_word.i = NIL then
assert (1=0)
report LF & "INVALID OPCODE at PC="& SLV32HEX(RF_PC) &
" opc="& SLV2STR(opcode) & " instr=" & SLV32HEX(RF_instruction) &
LF & "SIMULATION ABORTED"
severity failure;
elsif ctrl_word.i = NIL then
assert (1=0)
report LF & "INVALID OPCODE at PC="& SLV32HEX(RF_PC) &
" opc="& SLV2STR(opcode) & " instr=" & SLV32HEX(RF_instruction) &
LF & "SIMULATION ABORTED"
severity failure;
end if;
end if;
end process RF_STOP_SIMULATION;
move <= funct_word.move when opcode = b"000000" else '0';
U_regs: reg_bank -- phi1=read_early, clk=write_late
port map (clk, phi1, WB_wreg, a_rs,a_rt, WB_a_c,WB_C, regs_A,regs_B);
-- U_PC_plus_8: adder32 port map (x"00000004", RF_PCincd, pc_p8); -- (PC+4)+4
-- pc_p8 <= std_logic_vector( 4 + signed(RF_PCincd) ); -- (PC+4)+4
U_PC_plus_8: mf_alt_add_4 PORT MAP( datab => RF_PCincd, result => pc_p8 );
displ32 <= x"FFFF" & displ16 when
(displ16(15) = '1' and ctrl_word.extS = '1') else
x"0000" & displ16;
j_target <= RF_PCincd(31 downto 28) & RF_instruction(25 downto 0) & b"00";
RF_JR_STALL: process (funct_word,a_rs,EX_a_c,MM_a_c,EX_wreg,MM_wreg,
MM_is_load)
variable i_dbg_jr_stall : integer := 0; -- debug only
begin
if ( (funct_word.PCsel = b"11")and -- load-delay slot
(EX_a_c /= a_rs)and(EX_wreg = '0')and
(MM_a_c = a_rs)and(MM_wreg = '0')and(MM_a_c /= b"00000") ) then
jr_stall <= '1';
i_dbg_jr_stall := 1;
elsif ( (funct_word.PCsel = b"11")and -- ALU hazard
(EX_a_c = a_rs)and(EX_wreg = '0')and(EX_a_c /= b"00000") ) then
jr_stall <= '1';
i_dbg_jr_stall := 2;
elsif ( (funct_word.PCsel = b"11")and -- 2nd load-delay slot
MM_is_load and
(MM_a_c = a_rs)and(MM_wreg = '0')and(MM_a_c /= b"00000") ) then
jr_stall <= '1';
i_dbg_jr_stall := 3;
else
jr_stall <= '0';
i_dbg_jr_stall := 0;
end if;
dbg_jr_stall <= i_dbg_jr_stall;
end process RF_JR_STALL;
RF_LD_DELAY_SLOT: process (a_rs,a_rt,EX_a_c,EX_wreg,EX_is_load)
begin
if ( EX_is_load and
(EX_wreg = '0') and (EX_a_c /= b"00000") and
( (EX_a_c = a_rs)or(EX_a_c = a_rt) ) ) then
lw_stall <= '1';
else
lw_stall <= '0';
end if;
end process RF_LD_DELAY_SLOT;
RF_SW_STALL: process (ctrl_word,a_rs,EX_a_c,EX_wreg,EX_is_load)
variable is_store : boolean := false;
begin
case ctrl_word.i is
when LB | LH | LWL | LW | LBU | LHU | LWR =>
is_load <= TRUE;
is_store := FALSE;
when SB | SH | SW =>
is_store := TRUE;
is_load <= FALSE;
when others =>
is_load <= FALSE;
is_store := FALSE;
end case;
if ( is_store and EX_is_load and
(EX_a_c = a_rs)and(EX_wreg = '0')and(EX_a_c /= b"00000") ) then
sw_stall <= '1';
else
sw_stall <= '0';
end if;
end process RF_SW_STALL;
RF_FORWARDING_BRANCH: process (a_rs,a_rt,EX_wreg,EX_a_c,MM_wreg,MM_a_c,
MM_aVal,MM_result,MM_cop0_val,MM_is_MFC0,
regs_A,regs_B,is_branch,
is_SC, LL_SC_abort)
variable rs_stall, rt_stall : boolean;
begin
if ( (is_branch = '1') and -- forward_A
(EX_wreg = '0') and (EX_a_c = a_rs) and (EX_a_c /= b"00000") ) then
if is_SC then
eq_fwd_A <= x"0000000" & b"000" & not(LL_SC_abort);
rs_stall := FALSE;
else
eq_fwd_A <= regs_A;
rs_stall := TRUE;
end if;
elsif ( (MM_wreg = '0') and (MM_a_c = a_rs) and (MM_a_c /= b"00000") ) then
if ( (MM_aVal = '0') and (is_branch = '1') ) then -- LW load-delay slot
eq_fwd_A <= regs_A;
rs_stall := TRUE;
elsif MM_is_MFC0 then -- non-LW
eq_fwd_A <= MM_cop0_val;
rs_stall := FALSE;
elsif MM_is_SC then
eq_fwd_A <= x"00000000";
rs_stall := FALSE;
else
eq_fwd_A <= MM_result;
rs_stall := FALSE;
end if;
else
eq_fwd_A <= regs_A;
rs_stall := FALSE;
end if;
if ( (is_branch = '1') and -- forward_B
(EX_wreg = '0') and (EX_a_c = a_rt) and (EX_a_c /= b"00000") ) then
if is_SC then
eq_fwd_B <= x"0000000" & b"000" & not(LL_SC_abort);
rt_stall := FALSE;
else
eq_fwd_B <= regs_B;
rt_stall := TRUE;
end if;
elsif ( (MM_wreg = '0') and (MM_a_c = a_rt) and (MM_a_c /= b"00000") ) then
if ( (MM_aVal = '0') and (is_branch = '1') ) then -- LW load-delay slot
eq_fwd_B <= regs_B;
rt_stall := TRUE;
elsif MM_is_MFC0 then -- non-LW
eq_fwd_B <= MM_cop0_val;
rt_stall := FALSE;
elsif MM_is_SC then
eq_fwd_B <= x"00000000";
rt_stall := FALSE;
else
eq_fwd_B <= MM_result;
rt_stall := FALSE;
end if;
else
eq_fwd_B <= regs_B;
rt_stall := FALSE;
end if;
br_stall <= BOOL2SL(rs_stall or rt_stall);
end process RF_FORWARDING_BRANCH;
br_equal <= (eq_fwd_A = eq_fwd_B);
br_negative <= (eq_fwd_A(31) = '1');
br_eq_zero <= (eq_fwd_A = x"00000000");
RF_BR_tgt_select: process (br_equal,br_negative,br_eq_zero,
ctrl_word,rimm_word)
variable branch_type, regimm_br_type : t_comparison;
variable i_br_opr : reg2;
begin
branch_type := ctrl_word.br_t;
regimm_br_type := rimm_word.br_t;
i_br_opr := b"01"; -- assume not taken, PC+4 + 4 (delay slot)
case branch_type is
when cNOP => -- no branch, PC+4
i_br_opr := b"00";
when cEQU => -- beq
if br_equal then i_br_opr := b"10"; -- br_target;
end if;
when cNEQ => -- bne
if not(br_equal) then i_br_opr := b"10"; -- br_target;
end if;
when cLEZ =>
if (br_negative or br_eq_zero) then i_br_opr := b"10"; -- br_target;
end if;
when cGTZ =>
if not(br_negative or br_eq_zero) then i_br_opr := b"10"; -- br_target;
end if;
when cOTH => -- bltz,blez,bgtz,bgez
case regimm_br_type is
when cLTZ =>
if br_negative then i_br_opr := b"10"; -- br_target;
end if;
when cGEZ =>
if not(br_negative) then i_br_opr := b"10"; -- br_target;
end if;
when others =>
i_br_opr := b"00"; -- x"00000000";
end case;
when others =>
i_br_opr := b"00"; -- x"00000000";
end case;
br_opr <= i_br_opr;
-- assert false report
-- "branch_add32 A="& SLV32HEX(RF_PCincd) &" B="& SLV32HEX(br_operand) &
-- " A+B="& SLV32HEX(br_target); -- DEBUG
end process RF_BR_tgt_select;
-- U_BR_ADDER: adder32 port map (RF_PCincd, br_operand, br_target);
-- br_target <= std_logic_vector( signed(RF_PCincd) + signed(br_operand) );
-- branch target computation is in the citical path; add early, select late
br_addend <= displ32(29 downto 0) & b"00";
U_BR_tgt_pl_4: mf_alt_add_4 port map (RF_PCincd, br_tgt_pl4);
U_BR_tgt_pl_displ: mf_alt_adder port map (RF_PCincd, br_addend, br_tgt_displ);
with br_opr select
br_target <= br_tgt_pl4 when b"01",
br_tgt_displ when b"10",
RF_PCincd when others;
RF_DECODE_FUNCT: process (opcode,IF_RF_ld,ctrl_word,funct_word,rimm_word,
func,shamt, a_rs,a_rd, STATUS,
RF_excp_type,RF_instruction)
variable i_wreg : std_logic;
variable i_csel : reg2;
variable i_oper : t_alu_fun := opNOP;
variable i_exception : exception_type;
variable i_trap : instr_type;
variable i_cop0_reg : reg5;
variable i_cop0_sel : reg3;
begin
i_wreg := '1';
i_exception := exNOP;
i_oper := opNOP;
i_csel := "00";
i_trap := NOP;
i_cop0_reg := b"00000";
i_cop0_sel := b"000";
case opcode is
when b"000000" => -- ALU
i_wreg := funct_word.wreg;
selB <= funct_word.selB;
i_oper := funct_word.oper;
muxC <= funct_word.muxC;
i_csel := ctrl_word.c_sel;
PCsel <= funct_word.PCsel;
i_trap := funct_word.i;
if (funct_word.trap = '1') then -- traps
case funct_word.i is
when SYSCALL => i_exception := exSYSCALL;
when BREAK => i_exception := exBREAK;
when iSLL =>
if RF_instruction = x"000000c0" then
i_exception := exEHB;
end if;
when others => i_exception := exNOP;
end case;
end if;
when b"000001" => -- register immediate
i_wreg := rimm_word.wreg;
selB <= rimm_word.selB;
muxC <= rimm_word.muxC;
i_csel := rimm_word.c_sel;
PCsel <= rimm_word.PCsel;
i_trap := rimm_word.i;
i_oper := opNOP; -- no ALU operation
if (rimm_word.trap = '1') then -- traps
i_exception := exNOP;
end if;
when b"010000" => -- COP-0
i_cop0_reg := a_rd;
i_cop0_sel := func(2 downto 0);
case a_rs is
when b"00100" => -- MTC0
i_exception := exMTC0;
when b"00000" => -- MFC0
i_exception := exMFC0;
i_wreg := '0';
when b"10000" => -- ERET
case func is
when b"000001" => i_exception := exTLBR;
when b"000010" => i_exception := exTLBWI;
when b"000110" => i_exception := exTLBWR;
when b"001000" => i_exception := exTLBP;
when b"011000" => i_exception := exERET;
when b"011111" => i_exception := exDERET;
when b"100000" => i_exception := exWAIT;
when others => i_exception := exRESV_INSTR;
end case;
when b"01011" => -- EI and DI
case func is
when b"100000" => -- EI;
i_exception := exEI;
i_wreg := '0';
when b"000000" => -- DI;
i_exception := exDI;
i_wreg := '0';
when others => i_exception := exRESV_INSTR;
end case;
when others => i_exception := exRESV_INSTR;
end case;
selB <= '0';
i_oper := opNOP;
muxC <= ctrl_word.muxC;
i_csel := ctrl_word.c_sel;
PCsel <= ctrl_word.PCsel;
when b"011100" => -- special2
i_wreg := ctrl_word.wreg;
selB <= ctrl_word.selB;
muxC <= ctrl_word.muxC;
i_csel := ctrl_word.c_sel;
PCsel <= ctrl_word.PCsel;
case func is
when b"000010" => -- MUL R[rd] <= R[rs]*R[rt]
i_oper := opMUL;
when others =>
i_oper := opNOP;
i_exception := exRESV_INSTR;
end case;
when b"011111" => -- special3
case func is
when b"100000" => -- BSHFL
i_csel := ctrl_word.c_sel;
case shamt is
when b"00010" => -- word swap bytes within halfwords
i_oper := opSWAP;
when b"10000" => -- sign-extend byte
i_oper := opSEB;
when b"11000" => -- sign-extend halfword
i_oper := opSEH;
when others =>
i_oper := opNOP;
end case;
when b"000000" => -- extract bit field
i_csel := b"01"; -- dest = rt
i_oper := opEXT;
when b"000100" => -- insert bit field
i_csel := b"01"; -- dest = rt
i_oper := opINS;
when others => i_exception := exRESV_INSTR;
end case;
i_wreg := ctrl_word.wreg;
selB <= ctrl_word.selB;
muxC <= ctrl_word.muxC;
PCsel <= ctrl_word.PCsel;
when others =>
case opcode is
when b"110000" => i_exception := exLL; -- not REALLY exceptions
when b"111000" => i_exception := exSC;
when others => null; -- i_exception := exRESV_INSTR;
end case;
i_wreg := ctrl_word.wreg;
selB <= ctrl_word.selB;
i_oper := ctrl_word.oper;
muxC <= ctrl_word.muxC;
i_csel := ctrl_word.c_sel;
PCsel <= ctrl_word.PCsel;
end case;
oper <= i_oper;
c_sel <= i_csel;
trap_instr <= i_trap;
cop0_reg <= i_cop0_reg;
cop0_sel <= i_cop0_sel;
if IF_RF_ld = '1' then -- bubble (OR flush_RF_EX)
wreg <= '1';
aVal <= '1';
wrmem <= '1';
exception <= exNOP;
else
wreg <= i_wreg;
aVal <= ctrl_word.aVal;
wrmem <= ctrl_word.wmem;
exception <= i_exception;
end if;
end process RF_DECODE_FUNCT;
-- exception_dec <= exception_type'pos(exception); -- debugging only
can_trap <= ctrl_word.excp or funct_word.excp or rimm_word.excp;
RF_DECODE_MEM_REF: process (ctrl_word)
variable i_type : reg4;
-- bit3: LWL,LWR=1, bit2: signed=1, bits10:xx,byte,half,word
begin
case ctrl_word.i is
when LB => i_type := b"0101"; -- signed, byte (sign extend)
when LH => i_type := b"0110"; -- signed, half-word
when LW | LL => i_type := b"0011"; -- word
when LBU => i_type := b"0001"; -- unsigned, byte (zero extend)
when LHU => i_type := b"0010"; -- unsigned, half-word
when SB => i_type := b"0001";
when SH => i_type := b"0010";
when SW | SC => i_type := b"0011";
when LWL => i_type := b"1011"; -- unaligned LOADS
when LWR => i_type := b"1111"; -- unaligned LOADS
when others => i_type := b"0000";
end case;
mem_t <= i_type;
end process RF_DECODE_MEM_REF;
with c_sel select -- select destination register
a_c <= a_rd when b"00", -- type-R
a_rt when b"01", -- type-I
b"11111" when b"10", -- jal
b"00000" when others;
PIPESTAGE_RF_EX: reg_RF_EX
port map (clk,rst, RF_EX_ld, selB,EX_selB, oper,EX_oper,
a_rs,EX_a_rs, a_rt,EX_a_rt, a_c,EX_a_c,
wreg,EX_wreg_pre, muxC,EX_muxC, move,EX_move,
a_rd,EX_postn, shamt,EX_shamt, aVal,EX_aVal,
wrmem,EX_wrmem, mem_t,EX_mem_t, is_load,EX_is_load,
regs_A,EX_A, regs_B,EX_B, displ32,EX_displ32,
pc_p8,EX_pc_p8);
-- EXECUTION ---------------------------------------------
EX_FORWARDING_ALU: process (EX_a_rs,EX_a_rt,EX_a_c, EX_A,EX_B,
MM_ll_sc_abort, MM_is_SC,
MM_a_c,MM_wreg,WB_a_c,WB_wreg,
MM_is_MFC0,MM_cop0_val, MM_result,WB_C)
variable i_A,i_B : reg32;
begin
FORWARD_A:
if ((MM_wreg = '0')and(MM_a_c /= b"00000")and(MM_a_c = EX_a_rs)) then
if MM_is_MFC0 then
i_A := MM_cop0_val;
elsif MM_is_SC then
i_A := x"0000000" & b"000" & not( BOOL2SL(MM_ll_sc_abort) );
else
i_A := MM_result;
end if;
elsif ((WB_wreg = '0')and(WB_a_c /= b"00000")and(WB_a_c = EX_a_rs)) then
i_A := WB_C;
else
i_A := EX_A;
end if;
alu_inp_A <= i_A;
assert TRUE report -- DEBUG
"FWD_A: alu_A="&SLV32HEX(alu_inp_A)&" alu_B="&SLV32HEX(alu_fwd_B);
FORWARD_B:
if ((MM_wreg = '0')and(MM_a_c /= b"00000")and(MM_a_c = EX_a_rt)) then
if MM_is_MFC0 then
i_B := MM_cop0_val;
elsif MM_is_SC then
i_B := x"0000000" & b"000" & not( BOOL2SL(MM_ll_sc_abort) );
else
i_B := MM_result;
end if;
elsif ((WB_wreg = '0')and(WB_a_c /= b"00000")and(WB_a_c = EX_a_rt)) then
i_B := WB_C;
else
i_B := EX_B;
end if;
alu_fwd_B <= i_B;
assert TRUE report -- DEBUG
"FWD_B: alu_A="&SLV32HEX(alu_inp_A)&" alu_B="&SLV32HEX(alu_fwd_B);
end process EX_FORWARDING_ALU;
alu_inp_B <= alu_fwd_B when (EX_selB = '0') else EX_displ32;
U_ALU: alu port map(clk,rst,
alu_inp_A, alu_inp_B, result, LO, HI, annul_twice,
alu_move_ok, EX_oper,EX_postn,EX_shamt, ovfl);
-- this adder performs address calculation so the TLB can be checked during
-- EX and thus signal an exception as early as possible
U_VIR_ADDR_ADD: mf_alt_adder port map (alu_inp_A, EX_displ32, v_addr);
U_EX_ADDR_ERR_EXCP: process(EX_mem_t,EX_aVal,EX_wrmem, v_addr)
variable i_stage_mm, i_addrError : boolean;
variable i_excp_type : exception_type;
begin
case EX_mem_t(1 downto 0) is -- xx,by,hf,wd
when b"11" =>
if ( EX_mem_t(3) = '0' and -- normal LOAD, not LWL,LWR
EX_aVal = '0' and v_addr(1 downto 0) /= b"00" ) then
if EX_wrmem = '1' then
i_excp_type := MMaddressErrorLD;
else
i_excp_type := MMaddressErrorST;
end if;
i_addrError := TRUE;
i_stage_mm := TRUE;
else
i_excp_type := exNOP;
i_addrError := FALSE;
i_stage_mm := FALSE;
end if;
when b"10" => -- LH*, SH
if EX_aVal = '0' and v_addr(0) /= '0' then
if EX_wrmem = '1' then
i_excp_type := MMaddressErrorLD;
else
i_excp_type := MMaddressErrorST;
end if;
i_addrError := TRUE;
i_stage_mm := TRUE;
else
i_excp_type := exNOP;
i_addrError := FALSE;
i_stage_mm := FALSE;
end if;
when others => -- LB*, SB
i_excp_type := exNOP;
i_addrError := FALSE;
i_stage_mm := FALSE;
end case;
mem_excp_type <= i_excp_type;
addrErr_stage_mm <= i_stage_mm;
addrError <= i_addrError;
-- assert mem_excp_type = exNOP -- DEBUG
-- report LF & "SIMULATION ERROR -- data addressing error: " &
-- integer'image(exception_type'pos(mem_excp_type)) &
-- " at address: " & SLV32HEX(v_addr)
-- severity error;
end process U_EX_ADDR_ERR_EXCP; ----------------------------------
-- uncomment this when making use of the TLB CHANGE
-- EX_addr <= phy_d_addr; -- with TLB
-- uncomment this when NOT making use of the TLB
EX_addr <= v_addr; -- without TLB
-- assert ( (phy_d_addr = v_addr) and (EX_aVal = '0') ) -- DEBUG
-- report LF&"mapping mismatch V:P "&SLV32HEX(v_addr)&":"&SLV32HEX(phy_d_addr);
EX_wreg <= EX_wreg_pre -- movz,movn, move/DO_NOT move
-- abort wr if previous exception in EX
or ( BOOL2SL(nullify) and not(MM_is_delayslot) )
-- abort wr if TLB exception in EX (nullify=1 on next cycle)
or ( BOOL2SL( tlb_exception and tlb_stage_mm ) );
EX_wrmem_cond <= EX_wrmem
or BOOL2SL(abort_ref) -- abort write if exception in MEM
or LL_SC_abort -- SC is to be killed
-- abort memWrite if exception in EX, but not in IF
or ( BOOL2SL(nullify) and
(MM_is_delayslot and not BOOL2SL(nullify_fetch)) )
or ( BOOL2SL(nullify) and not BOOL2SL(nullify_fetch) );
-- check_this
EX_aVal_cond <= EX_aVal
or BOOL2SL(abort_ref) -- abort ref if exception in MEM
or LL_SC_abort -- SC is to be killed
-- abort memWrite if exception in EX, but not in IF
or ( BOOL2SL(nullify) and
(MM_is_delayslot and not BOOL2SL(nullify_fetch)) )
or ( BOOL2SL(nullify) and not BOOL2SL(nullify_fetch) );
-- check_this
abort_ref <= (addrError or (tlb_exception and tlb_stage_mm));
busFree <= EX_aVal_cond;
-- ----------------------------------------------------------------------
PIPESTAGE_EX_MM: reg_EX_MM
port map (clk,rst, EX_MM_ld,
EX_a_rt,MM_a_rt, EX_a_c,MM_a_c, EX_wreg,MM_wreg,
EX_muxC,MM_muxC, EX_aVal_cond,MM_aVal, EX_wrmem_cond,MM_wrmem,
EX_mem_t,MM_mem_t, EX_is_load,MM_is_load,
EX_A,MM_A, alu_fwd_B,MM_B,
result,MM_result, EX_addr,MM_addr,
HI,MM_HI, LO,MM_LO,
alu_move_ok,MM_alu_move_ok, EX_move,MM_move,
EX_pc_p8,MM_pc_p8);
-- MEMORY ---------------------------------------------------------------
-- DATA_BUS_STATE_MACHINE: data-bus control
U_dmem_stalled: FFD port map (clk => phi2, rst => rst, set => '1',
D => mem_stall, Q => mm_stalled);
d_aVal <= MM_aVal; -- interface signal/port
daVal <= MM_aVal; -- internal signal
ram_stall <= not(daVal) and not(d_wait);
-- end DATA_BUS_STATE_MACHINE -------------------------------------
wr <= MM_wrmem; -- abort write if SC fails
rd_data_raw <= data_inp when (MM_wrmem = '1' and MM_aVal = '0') else
(others => 'X');
MM_MEM_CTRL_INTERFACE: process(MM_mem_t, MM_addr)
variable i_d_addr : reg2;
variable i_byte_sel : reg4;
begin
case MM_mem_t(1 downto 0) is -- xx,by,hf,wd
when b"11" =>
i_byte_sel := b"1111"; -- LW, SW, LWL, LWR
i_d_addr := b"00"; -- align reference
when b"10" =>
i_d_addr := MM_addr(1) & '0'; -- align reference
if MM_addr(1) = '0' then -- LH*, SH
i_byte_sel := b"0011";
else
i_byte_sel := b"1100";
end if;
when b"01" => -- LB*, SB
i_d_addr := MM_addr(1 downto 0);
case MM_addr(1 downto 0) is
when b"00" => i_byte_sel := b"0001";
when b"01" => i_byte_sel := b"0010";
when b"10" => i_byte_sel := b"0100";
when others => i_byte_sel := b"1000";
end case;
when others =>
i_d_addr := (others => 'X'); -- MM_addr;
i_byte_sel := b"0000";
end case;
d_addr <= MM_addr(31 downto 2) & i_d_addr;
b_sel <= i_byte_sel;
end process MM_MEM_CTRL_INTERFACE; ---------------------------------
MM_MEM_DATA_INTERFACE: process(MM_mem_t, MM_addr, rd_data_raw)
variable bytes_read : reg32;
variable i_byte : reg8;
variable i_half : reg16;
constant c_24_ones : reg24 := b"111111111111111111111111";
constant c_24_zeros : reg24 := b"000000000000000000000000";
constant c_16_ones : reg16 := b"1111111111111111";
constant c_16_zeros : reg16 := b"0000000000000000";
begin
case MM_mem_t(1 downto 0) is -- 10:xx,by,hf,wd
when b"11" =>
bytes_read := rd_data_raw;
when b"10" =>
if MM_addr(1) = '0' then -- LH*, SH
i_half := rd_data_raw(15 downto 0);
else
i_half := rd_data_raw(31 downto 16);
end if;
if MM_mem_t(2) = '1' and i_half(15) = '1' then -- mem_t(2):signed=1
bytes_read := c_16_ones & i_half;
else
bytes_read := c_16_zeros & i_half;
end if;
when b"01" => -- LB*, SB
case MM_addr(1 downto 0) is
when b"00" => i_byte := rd_data_raw(7 downto 0);
when b"01" => i_byte := rd_data_raw(15 downto 8);
when b"10" => i_byte := rd_data_raw(23 downto 16);
when others => i_byte := rd_data_raw(31 downto 24);
end case;
if MM_mem_t(2) = '1' and i_byte(7) = '1' then -- mem_t(2):signed=1
bytes_read := c_24_ones & i_byte;
else
bytes_read := c_24_zeros & i_byte;
end if;
when others =>
bytes_read := (others => 'X');
end case;
rd_data <= bytes_read;
end process MM_MEM_DATA_INTERFACE; ---------------------------------
-- forwarding for LW -> SW
MM_FORWARDING_MEM: process (MM_aVal,MM_wrmem,MM_a_rt,WB_a_c,WB_wreg,WB_C,MM_B)
variable f_m: reg2;
variable i_data : reg32;
begin
f_m := "XX";
if ( (MM_wrmem = '0') and (MM_aVal = '0') ) then
if ( (MM_a_rt = WB_a_c) and (WB_wreg = '0') and (WB_a_c /= b"00000")) then
f_m := "01"; -- forward from WB
i_data := WB_C;
else
f_m := "00"; -- not forwarding
i_data := MM_B;
end if;
else
f_m := "11"; -- not a write, (others=>'Z')
i_data := (others => 'X');
end if;
fwd_mem <= f_m; -- for debugging
data_out <= i_data;
end process MM_FORWARDING_MEM; -------------------------------
-- forwarding for LWL, LWR
MM_FWD_LWLR: process (MM_aVal,MM_wreg,MM_a_rt,WB_a_c,WB_wreg,WB_C,MM_B)
variable f_m: boolean;
variable i_data : reg32;
begin
if ( (MM_wreg = '0') and (MM_aVal = '0') and
(MM_a_rt = WB_a_c) and (WB_wreg = '0') and
(WB_a_c /= b"00000") ) then
f_m := TRUE; -- forward from WB
i_data := WB_C;
else
f_m := FALSE; -- not forwarding
i_data := MM_B;
end if;
fwd_lwlr <= f_m; -- for debugging
MM_B_data <= i_data;
end process MM_FWD_LWLR;
-- if interrupt is in J/BR delaySlot, and JR was stalled, kill instr in MM
U_NULLIFY_THRICE:
FFD port map (clk, rst, '1', nullify_MM_pre, nullify_MM_int);
MM_wreg_cond <= '1' when ( (ram_stall = '1')
or MM_addrError -- abort regWrite if excptn in MEM
or (MM_move = '1' and MM_alu_move_ok = '0')
or (nullify_MM_int = '1')
)
else MM_wreg;
-- ----------------------------------------------------------------------
PIPESTAGE_MM_WB: reg_MM_WB
port map (clk,rst, MM_WB_ld,
MM_a_c,WB_a_c, MM_wreg_cond,WB_wreg, MM_muxC,WB_muxC,
MM_A,WB_A, MM_result,WB_result, MM_HI,WB_HI,MM_LO,WB_LO,
rd_data,WB_rd_data, MM_B_data,WB_B_data,
MM_addr(1 downto 0),WB_addr2, MM_mem_t(3 downto 2),WB_mem_t,
MM_pc_p8,WB_pc_p8);
-- WRITE BACK -----------------------------------------------------------
-- merge unaligned loads LWL,LWR
mergeLOAD: process (WB_rd_data, WB_B_data, WB_addr2, WB_mem_t)
variable mem, reg, res : reg32;
begin
mem := WB_rd_data;
reg := WB_B_data;
case WB_mem_t is
when "10" => -- LWL
case WB_addr2 is
when "00" =>
res := mem( 7 downto 0) & reg(23 downto 0);
when "01" =>
res := mem(15 downto 0) & reg(15 downto 0);
when "10" =>
res := mem(23 downto 0) & reg( 7 downto 0);
when others =>
res := mem;
end case;
when "11" => -- LWR
case WB_addr2 is
when "01" =>
res := reg(31 downto 24) & mem(31 downto 8);
when "10" =>
res := reg(31 downto 16) & mem(31 downto 16);
when "11" =>
res := reg(31 downto 8) & mem(31 downto 24);
when others =>
res := mem;
end case;
when others => -- normal LOAD
res := mem;
end case;
WB_mem_data <= res;
end process mergeLOAD;
with WB_muxC select WB_C <=
WB_mem_data when b"000", -- from memory
WB_result when b"001", -- from ALU
WB_A when b"010", -- A, for jr
WB_pc_p8 when b"011", -- PC+8 for jal
WB_HI when b"100", -- MFHI
WB_LO when b"101", -- MFLO
WB_cop0_val when b"110", -- from COP0 registers
(x"0000000" & b"000" & WB_LLbit) when b"111", -- from LLbit
(others => 'X') when others; -- invalid selection
--++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-- end of data pipeline
--++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
--++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-- control pipeline
--++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-- IF instruction fetch ---------------------------------------------
PIPESTAGE_EXCP_IF_RF: reg_excp_IF_RF
port map (clk, rst, excp_IF_RF_ld,
IF_excp_type,RF_excp_type, PC_abort,RF_PC_abort, PC,RF_PC);
-- RF decode & register fetch ---------------------------------------------
RF_FORWARDING_TRAPS: process (a_rs,a_rt,rimm_word,displ32,
EX_wreg,EX_a_c,MM_wreg,MM_a_c,
MM_aVal,MM_result,regs_A,regs_B,is_trap)
begin
tr_stall <= '0';
if ( (is_trap = '1') and -- forward_A:
(EX_wreg = '0') and (EX_a_c = a_rs) and (EX_a_c /= b"00000") ) then
tr_stall <= '1';
tr_fwd_A <= regs_A;
elsif ((MM_wreg = '0') and (MM_a_c = a_rs) and (MM_a_c /= b"00000")) then
if (MM_aVal = '0') then -- LW load-delay slot
if (is_trap = '1') then
tr_stall <= '1';
end if;
tr_fwd_A <= regs_A;
else -- non-LW
tr_fwd_A <= MM_result;
end if;
else
tr_fwd_A <= regs_A;
end if;
if ( (is_trap = '1') and (rimm_word.selB = '1') ) then -- from immediate
tr_fwd_B <= displ32;
elsif ( (is_trap = '1') and -- forward_B:
(EX_wreg = '0') and (EX_a_c = a_rt) and (EX_a_c /= b"00000") ) then
tr_stall <= '1';
tr_fwd_B <= regs_B;
elsif ((MM_wreg = '0') and (MM_a_c = a_rt) and (MM_a_c /= b"00000")) then
if (MM_aVal = '0') then -- LW load-delay slot
if (is_trap = '1') then
tr_stall <= '1';
end if;
tr_fwd_B <= regs_B;
else -- non-LW
tr_fwd_B <= MM_result;
end if;
else
tr_fwd_B <= regs_B;
end if;
end process RF_FORWARDING_TRAPS;
tr_signed <= '0' when ((funct_word.trap = '1' and
((funct_word.oper = trGEU)or(funct_word.oper = trLTU)))
or
(rimm_word.trap = '1' and
((rimm_word.br_t = tGEU)or(rimm_word.br_t = tLTU))))
else '1';
tr_is_equal <= '1' when (tr_fwd_A = tr_fwd_B) else '0';
U_COMP_TRAP: subtr32
port map (tr_fwd_A, tr_fwd_B, tr_result, tr_signed, open, tr_less_than);
trap_dec <= instr_type'pos(trap_instr); -- debugging only
RF_EVALUATE_TRAPS: process (trap_instr, tr_is_equal, tr_less_than)
variable i_take_trap : boolean;
begin
case trap_instr is
when TEQ | TEQI =>
i_take_trap := tr_is_equal = '1';
when TNE | TNEI =>
i_take_trap := tr_is_equal = '0';
when TLT | TLTI | TLTU | TLTIU =>
i_take_trap := tr_less_than = '1';
when TGE | TGEI | TGEU | TGEIU =>
i_take_trap := tr_less_than = '0';
when others =>
i_take_trap := FALSE;
end case;
trap_taken <= i_take_trap;
end process RF_EVALUATE_TRAPS;
-- ----------------------------------------------------------------------
PIPESTAGE_EXCP_RF_EX: reg_excp_RF_EX
port map (clk, rst, excp_RF_EX_ld,
cop0_reg,EX_cop0_reg, cop0_sel,EX_cop0_sel,
can_trap,EX_can_trap,
exception,EX_exception,
RF_is_delayslot,EX_is_delayslot,
RF_PC_abort,EX_PC_abort, RF_PC,EX_PC,
trap_taken,EX_trapped);
is_nmi <= ( (nmi = '1') and (STATUS(STATUS_ERL) = '0') );
int_req(5) <= (irq(5) or count_eq_compare);
int_req(4) <= irq(4);
int_req(3) <= irq(3);
int_req(2) <= irq(2);
int_req(1) <= irq(1);
int_req(0) <= irq(0);
interrupt <= int_req(5) or int_req(4) or int_req(3) or int_req(2) or
int_req(1) or int_req(0) or
CAUSE(CAUSE_IP1) or CAUSE(CAUSE_IP0);
is_interr <= ( (interrupt = '1') and
(STATUS(STATUS_EXL) = '0') and
(STATUS(STATUS_ERL) = '0') and
(STATUS(STATUS_IE) = '1') and
(dly_interr = '0') and
(interrupt_taken = '0') ); -- single cycle exception req
-- While returning from an exception (especially another interrupt),
-- delay the IRQ to make sure the interrupted instruction completes;
-- This is needed to ensure forward-progress: at least one instruction
-- must complete before another interrupt may be taken.
-- Also, delay the interrupt requests to avoid hazards while
-- the interrupt-enable bit is changed in the STATUS register.
-- dly_i0 <= '1' when ( (EX_exception = exERET) or -- forward progress
-- (EX_exception = exEI) or -- interrupt hazard
-- (EX_exception = exDI) or -- interrupt hazard
-- (EX_exception = exEHB) or -- interrupt hazard
-- (EX_exception = exMTC0 -- interrupt hazard
-- and EX_cop0_reg = cop0reg_STATUS) or
-- (EX_exception = exMFC0 -- interrupt hazard
-- and EX_cop0_reg = cop0reg_STATUS) ) else
-- '0';
dly_i0 <= '1' when ( EX_exception /= exNOP ) else '0';
U_DLY_INT1: FFD port map (clk, rst, '1',dly_i0, dly_i1);
U_DLY_INT2: FFD port map (clk, rst, '1',dly_i1, dly_i2);
dly_interr <= dly_i0 or dly_i1 or dly_i2;
-- check for overflow in EX, send it to MM for later processing
is_ovfl <= (EX_can_trap = b"10" and ovfl = '1');
is_SC <= (EX_exception = exSC); -- is StoreConditional? (alu_fwd)
is_mfc0 <= (EX_exception = exMFC0); -- is MFC0? (alu_fwd)
-- priority is always given to events later in the pipeline
busError_type <= exDBE when d_busErr = '0' else
exIBE when i_busErr = '0' else
exNOP;
is_busError <= (i_busErr = '0') or (d_busErr = '0');
EX_is_exception <= busError_type when is_busError else
TLB_excp_type when tlb_exception else
mem_excp_type when addrError else
IFaddressError when EX_PC_abort else
exTrap when EX_trapped else
exOvfl when is_ovfl else
exNMI when is_nmi else
exInterr when is_interr else
EX_exception;
exception_dec <= exception_type'pos(EX_is_exception); -- debugging only
-- ----------------------------------------------------------------------
PIPESTAGE_EXCP_EX_MM: reg_excp_EX_MM
port map (clk, rst, excp_EX_MM_ld,
EX_cop0_reg, MM_cop0_reg, EX_cop0_sel, MM_cop0_sel,
EX_PC,MM_PC, v_addr,MM_v_addr, nullify,MM_nullify,
addrError,MM_addrError,
addrErr_stage_mm,MM_addrErr_stage_mm,
EX_is_delayslot,MM_is_delayslot,
EX_trapped,MM_trapped,
SL2BOOL(LL_SC_abort), MM_ll_sc_abort,
tlb_exception,MM_tlb_exception,
tlb_stage_mm,MM_tlb_stage_mm,
int_req,MM_int_req,
is_SC, MM_is_SC, is_MFC0, MM_is_MFC0,
EX_is_exception, is_exception);
-- exception_dec <= exception_type'pos(is_exception); -- debugging only
-- STATUS -- pg 79 -- cop0_12 --------------------
COP0_DECODE_EXCEPTION_AND_UPDATE_STATUS:
process (MM_a_rt, is_exception, cop0_inp,
MM_cop0_reg, MM_cop0_sel,
RF_is_delayslot, EX_is_delayslot, MM_is_delayslot, WB_is_delayslot,
rom_stall,ram_stall, STATUS)
variable newSTATUS : reg32;
variable i_update,i_epc_update,i_stall : std_logic;
variable i_nullify: boolean;
variable i_update_r : reg5;
variable i_epc_source : reg3;
begin
newSTATUS := STATUS;
i_epc_update := '1';
i_epc_source := EPC_src_PC;
i_update := '0';
i_update_r := b"00000";
i_stall := '0';
i_nullify := FALSE;
exception_taken <= '0';
interrupt_taken <= '0';
ExcCode <= cop0code_NULL;
is_delayslot <= '0';
nullify_MM_pre <= '0';
newSTATUS := STATUS; -- preserve as needed
newSTATUS(STATUS_BEV) := '0'; -- interrupts at offset 0x200, not boot
newSTATUS(STATUS_CU3) := '0'; -- COP-3 absent (always)
newSTATUS(STATUS_CU2) := '0'; -- COP-2 absent (always)
newSTATUS(STATUS_CU1) := '0'; -- COP-1 absent (always)
newSTATUS(STATUS_CU0) := '1'; -- COP-0 present=1 (always)
newSTATUS(STATUS_RP) := '0'; -- reduced power (always)
case is_exception is
when exMTC0 => -- move to COP-0
i_update_r := MM_cop0_reg;
case MM_cop0_reg is
when cop0reg_STATUS =>
newSTATUS := cop0_inp;
i_update := '1';
i_stall := '0';
when cop0reg_COUNT | cop0reg_COMPARE | cop0reg_CAUSE |
cop0reg_EntryLo0 | cop0reg_EntryLo1 | cop0reg_EntryHi |
cop0reg_Index | cop0reg_Context | cop0reg_Wired =>
i_update := '1';
i_stall := '0';
when cop0reg_EPC =>
i_epc_update := '0';
i_epc_source := EPC_src_B;
i_stall := '0';
when others =>
i_stall := '0';
i_update := '0';
end case;
when exEI => -- enable interrupts
newSTATUS(STATUS_IE) := '1';
i_update := '1';
i_update_r := cop0reg_STATUS;
i_stall := '0';
when exDI => -- disable interrupts
newSTATUS(STATUS_IE) := '0';
i_update := '1';
i_update_r := cop0reg_STATUS;
i_stall := '0';
when exMFC0 => -- move from COP-0
i_stall := '0'; -- register selection below
when exERET => -- EXCEPTION RETURN
newSTATUS(STATUS_EXL) := '0'; -- leave exception level
i_update := '1';
i_update_r := cop0reg_STATUS;
i_stall := '0'; -- do not stall
i_nullify := TRUE; -- nullify instructions in IF,RF
-- when processor goes into exception-level, IRQs are ignored,
-- hence disabled
when exSYSCALL | exBREAK => -- SYSCALL, BREAK
i_stall := '0';
if is_exception = exSYSCALL then
ExcCode <= cop0code_Sys;
else
ExcCode <= cop0code_Bp;
end if;
newSTATUS(STATUS_EXL) := '1'; -- at exception level
newSTATUS(STATUS_UM) := '0'; -- enter kernel mode
i_update := '1';
i_update_r := cop0reg_STATUS;
i_stall := '0'; -- do not stall
i_epc_update := '0';
i_nullify := TRUE; -- nullify instructions in IF,RF
exception_taken <= '1';
if MM_is_delayslot = '1' then -- instr is in delay slot
i_epc_source := EPC_src_WB; -- re-execute branch/jump
is_delayslot <= WB_is_delayslot;
else
i_epc_source := EPC_src_MM;
is_delayslot <= MM_is_delayslot;
end if;
when exTRAP =>
ExcCode <= cop0code_Tr;
newSTATUS(STATUS_EXL) := '1'; -- at exception level
newSTATUS(STATUS_UM) := '0'; -- enter kernel mode
i_update := '1';
i_update_r := cop0reg_STATUS;
i_stall := '0';
i_epc_update := '0';
i_nullify := TRUE; -- nullify instructions in IF,RF,EX
exception_taken <= '1';
if MM_is_delayslot = '1' then -- instr is in delay slot
i_epc_source := EPC_src_WB; -- WB_PC, re-execute branch/jump
is_delayslot <= WB_is_delayslot;
else
i_epc_source := EPC_src_MM; -- MM_PC
is_delayslot <= MM_is_delayslot;
end if;
when exLL => -- load linked (not a real exception)
i_update := '1';
i_update_r := cop0reg_LLaddr;
-- when exSC => null; if treated here, SC might delay an interrupt
when exRESV_INSTR => -- reserved instruction ABORT SIMULATION
assert FALSE -- invalid opcode
report LF & "invalid opcode (resv instr) at PC="& SLV32HEX(EX_PC)
severity failure;
when exOvfl => -- OVERFLOW happened one cycle earlier
newSTATUS(STATUS_EXL) := '1'; -- at exception level
exception_taken <= '1';
i_update := '1';
i_update_r := cop0reg_STATUS;
i_epc_update := '0';
ExcCode <= cop0code_Ov;
i_nullify := TRUE; -- nullify instructions in IF,RF,EX
if WB_is_delayslot = '1' then -- instr is in delay slot
i_epc_source := EPC_src_WB; -- WB_PC, re-execute branch/jump
is_delayslot <= WB_is_delayslot;
else
i_epc_source := EPC_src_MM; -- offending instr PC is in MM_PC
is_delayslot <= MM_is_delayslot;
end if;
when IFaddressError => -- fetch from UNALIGNED ADDRESS
newSTATUS(STATUS_EXL) := '1'; -- at exception level
exception_taken <= '1';
i_update := '1';
i_update_r := cop0reg_STATUS;
ExcCode <= cop0code_AdEL;
i_nullify := TRUE; -- nullify instructions in IF,RF,EX
i_epc_source := EPC_src_MM; -- bad address is in EXCP_MM_PC
i_epc_update := '0';
is_delayslot <= MM_is_delayslot;
when MMaddressErrorLD | MMaddressErrorST =>
-- load/store from/to UNALIGNED ADDRESS
newSTATUS(STATUS_EXL) := '1'; -- at exception level
exception_taken <= '1';
i_update := '1';
i_update_r := cop0reg_STATUS;
i_epc_update := '0';
i_nullify := TRUE; -- nullify instructions in IF,RF,EX
if is_exception = MMaddressErrorST then
ExcCode <= cop0code_AdES;
else
ExcCode <= cop0code_AdEL;
end if;
if WB_is_delayslot = '1' then -- instr is in delay slot
i_epc_source := EPC_src_WB; -- WB_PC, re-execute branch/jump
is_delayslot <= WB_is_delayslot;
else
i_epc_source := EPC_src_MM; -- offending instr PC is in MM_PC
is_delayslot <= MM_is_delayslot;
end if;
when exEHB => -- stall processor to clear hazards
i_stall := '1';
when exTLBP | exTLBR | exTLBWI | exTLBWR => -- TLB access
i_stall := '0'; -- do not stall the processor
when exTLBrefillIF =>
ExcCode <= cop0code_TLBL;
if RF_is_delayslot = '1' then -- instr is in delay slot
i_epc_source := EPC_src_EX; -- EX_PC, re-execute branch/jump
is_delayslot <= RF_is_delayslot;
elsif EX_is_delayslot = '1' then
i_epc_source := EPC_src_MM; -- MM_PC check_this
is_delayslot <= '0';
else
i_epc_source := EPC_src_RF; -- RF_PC check_this
is_delayslot <= '0';
end if;
newSTATUS(STATUS_EXL) := '1'; -- at exception level
i_update := '1';
i_update_r := cop0reg_STATUS;
i_epc_update := '0';
i_nullify := TRUE; -- nullify instructions in IF,RF,EX
exception_taken <= '1';
when exTLBrefillRD | exTLBrefillWR =>
case is_exception is
when exTLBrefillRD =>
ExcCode <= cop0code_TLBL;
when exTLBrefillWR =>
ExcCode <= cop0code_TLBS;
when others => null;
end case;
if WB_is_delayslot = '1' then -- instr is in delay slot
i_epc_source := EPC_src_WB; -- MM_PC, re-execute branch/jump
is_delayslot <= WB_is_delayslot;
else
i_epc_source := EPC_src_MM; -- EX_PC
is_delayslot <= MM_is_delayslot;
end if;
newSTATUS(STATUS_EXL) := '1'; -- at exception level
i_update := '1';
i_update_r := cop0reg_STATUS;
i_epc_update := '0';
i_nullify := TRUE; -- nullify instructions in IF,RF,EX
exception_taken <= '1';
when exTLBdblFaultIF | exTLBinvalIF =>
ExcCode <= cop0code_TLBL;
if RF_is_delayslot = '1' then -- instr is in delay slot
i_epc_source := EPC_src_RF; -- RF_PC, re-execute branch/jump
is_delayslot <= RF_is_delayslot;
else
i_epc_source := EPC_src_PC; -- PC
is_delayslot <= '0';
end if;
newSTATUS(STATUS_EXL) := '1'; -- at exception level
i_update := '1';
i_update_r := cop0reg_STATUS;
i_epc_update := '0';
i_nullify := TRUE; -- nullify instructions in IF,RF,EX
when exTLBdblFaultRD | exTLBdblFaultWR |
exTLBinvalRD | exTLBinvalWR | exTLBmod =>
case is_exception is
when exTLBinvalRD | exTLBdblFaultRD =>
ExcCode <= cop0code_TLBL;
when exTLBinvalWR | exTLBdblFaultWR =>
ExcCode <= cop0code_TLBS;
when exTLBmod =>
ExcCode <= cop0code_Mod;
when others => null;
end case;
if WB_is_delayslot = '1' then -- instr is in delay slot
i_epc_source := EPC_src_WB; -- MM_PC, re-execute branch/jump
is_delayslot <= WB_is_delayslot;
else
i_epc_source := EPC_src_MM; -- EX_PC
is_delayslot <= MM_is_delayslot;
end if;
newSTATUS(STATUS_EXL) := '1'; -- at exception level
i_update := '1';
i_update_r := cop0reg_STATUS;
i_epc_update := '0';
i_nullify := TRUE; -- nullify instructions in IF,RF,EX
when exIBE | exDBE => -- BUS ERROR
if is_exception = exIBE then
ExcCode <= cop0code_IBE;
else
ExcCode <= cop0code_DBE;
end if;
newSTATUS(STATUS_EXL) := '1'; -- at exception level
i_update := '1';
i_update_r := cop0reg_STATUS;
i_nullify := TRUE; -- nullify instructions in IF,RF,EX
exception_taken <= '1';
when exInterr => -- normal interrupt
if (rom_stall = '0') and (ram_stall = '0') then
assert TRUE report "interrupt PC="&SLV32HEX(PC) severity note;
interrupt_taken <= '1';
newSTATUS(STATUS_UM) := '0'; -- enter kernel mode
newSTATUS(STATUS_EXL) := '1'; -- at exception level
ExcCode <= cop0code_Int;
i_update := '1';
i_update_r := cop0reg_STATUS;
i_stall := '0';
i_epc_update := '0';
i_nullify := TRUE; -- nullify instructions in IF,RF,EX
if MM_is_delayslot = '1' then -- instr is in delay slot
i_epc_source := EPC_src_MM; -- re-execute branch/jump
is_delayslot <= MM_is_delayslot;
nullify_MM_pre <= '1'; -- if stalled, kill instrn in MM
else
i_epc_source := EPC_src_EX;
is_delayslot <= EX_is_delayslot;
nullify_MM_pre <= '0';
end if;
end if;
when exNMI => -- non maskable interrupt
-- assert false report "NMinterrupt PC="&SLV32HEX(PC) severity note;
exception_taken <= '1';
newSTATUS(STATUS_BEV) := '1'; -- locationVector at bootstrap
newSTATUS(STATUS_TS) := '0'; -- not TLBmatchesSeveral
newSTATUS(STATUS_SR) := '0'; -- not softReset
newSTATUS(STATUS_NMI) := '1'; -- non maskable interrupt
newSTATUS(STATUS_ERL) := '1'; -- at error level
i_update := '1';
i_update_r := cop0reg_STATUS;
i_stall := '0';
i_epc_update := '0';
i_nullify := TRUE; -- nullify instructions in IF,RF,EX
if MM_is_delayslot = '1' then -- instr is in delay slot
i_epc_source := EPC_src_MM; -- re-execute branch/jump
is_delayslot <= MM_is_delayslot;
nullify_MM_pre <= '1'; -- if stalled, kill instrn in MM
else
i_epc_source := EPC_src_EX;
is_delayslot <= EX_is_delayslot;
nullify_MM_pre <= '0';
end if;
when others => null;
end case;
STATUSinp <= newSTATUS;
update <= i_update;
update_reg <= i_update_r;
if is_exception = exMTC0 and MM_cop0_reg = cop0reg_EPC then
epc_update <= i_epc_update;
else
epc_update <= i_epc_update OR STATUS(STATUS_EXL);
end if;
epc_source <= i_epc_source;
exception_stall <= i_stall;
nullify <= i_nullify;
end process COP0_DECODE_EXCEPTION_AND_UPDATE_STATUS;
-- Select value to be read by instruction MFC0 --------------------
COP0_READ: process (is_exception, MM_cop0_reg, MM_cop0_sel,
INDEX, RANDOM, EntryLo0, EntryLo1,
CONTEXT, PAGEMASK, WIRED, EntryHi,
COUNT, COMPARE, STATUS, CAUSE, EPC, BadVAddr)
variable i_COP0_rd : reg32;
begin
case is_exception is
when exEI | exDI => -- enable/disable interrupts
i_COP0_rd := STATUS;
when exMFC0 => -- move from COP-0
case MM_cop0_reg is
when cop0reg_Index => i_COP0_rd := INDEX;
when cop0reg_Random => i_COP0_rd := RANDOM;
when cop0reg_EntryLo0 => i_COP0_rd := EntryLo0;
when cop0reg_EntryLo1 => i_COP0_rd := EntryLo1;
when cop0reg_Context => i_COP0_rd := CONTEXT;
when cop0reg_PageMask => i_COP0_rd := PAGEMASK;
when cop0reg_Wired => i_COP0_rd := WIRED;
when cop0reg_EntryHi => i_COP0_rd := EntryHi;
when cop0reg_COUNT => i_COP0_rd := COUNT;
when cop0reg_COMPARE => i_COP0_rd := COMPARE;
when cop0reg_STATUS => i_COP0_rd := STATUS;
when cop0reg_CAUSE => i_COP0_rd := CAUSE;
when cop0reg_EPC => i_COP0_rd := EPC;
when cop0reg_BadVAddr => i_COP0_rd := BadVAddr;
when cop0reg_CONFIG =>
if MM_cop0_sel = b"000" then
i_COP0_rd := CONFIG0; -- constant
else
i_COP0_rd := CONFIG1; -- constant
end if;
when others =>
i_COP0_rd := STATUS;
end case;
when others =>
i_COP0_rd := STATUS;
end case;
MM_cop0_val <= i_COP0_rd;
end process COP0_READ;
-- Select input to PC on an exception --------------------
COP0_SEL_EPC: process (is_exception, STATUS, CAUSE, MM_trapped)
variable i_excp_PCsel : reg3;
begin
case is_exception is
when exERET => -- exception return
i_excp_PCsel := PCsel_EXC_EPC; -- PC <= EPC
when exSYSCALL | exBREAK | exRESV_INSTR | exOvfl
| IFaddressError | MMaddressErrorLD | MMaddressErrorST
| exTLBdblFaultIF | exTLBdblFaultRD | exTLBdblFaultWR
| exTLBinvalIF | exTLBinvalRD | exTLBinvalWR | exTLBmod
| exIBE | exDBE =>
i_excp_PCsel := PCsel_EXC_0180; -- PC <= exception_180
when exTRAP =>
if MM_trapped then
i_excp_PCsel := PCsel_EXC_0180; -- PC <= exception_180
else
i_excp_PCsel := PCsel_EXC_none;
end if;
when exTLBrefillIF | exTLBrefillRD | exTLBrefillWR =>
i_excp_PCsel := PCsel_EXC_0000; -- PC <= exception_0000
when exNMI => -- non maskable interrupt
i_excp_PCsel := PCsel_EXC_BFC0; -- PC <= 0xBFC0.0000
when exInterr => -- normal interrupt
if CAUSE(CAUSE_IV) = '1' then
i_excp_PCsel := PCsel_EXC_0200; -- PC <= exception_0200
else
i_excp_PCsel := PCsel_EXC_0180; -- PC <= exception_0180
end if;
-- when exNOP =>
-- i_excp_PCsel := PCsel_EXC_none; -- no exception, do nothing to PC
when others => -- should never get here
i_excp_PCsel := PCsel_EXC_none;
end case;
excp_PCsel <= i_excp_PCsel;
end process COP0_SEL_EPC;
COP0_FORWARDING: process (WB_a_c,WB_wreg,MM_a_rt,WB_C,MM_B)
variable i_B : reg32;
begin
if ((WB_wreg = '0')and(WB_a_c /= b"00000")and(WB_a_c = MM_a_rt)) then
i_B := WB_C;
else
i_B := MM_B;
end if;
cop0_inp <= i_B;
end process COP0_FORWARDING;
-- STATUS -- pg 79 -- cop0_12 --------------------
status_update <= '0' when (update = '1' and update_reg = cop0reg_STATUS and
not_stalled = '1')
else '1';
COP0_STATUS: register32 generic map (RESET_STATUS)
port map (clk, rst, status_update, STATUSinp, STATUS);
U_DLY_TLB_EXCP: FFD
port map (clk, rst, '1', BOOL2SL(tlb_exception), tlb_excp_taken);
-- CAUSE -- pg 92-- cop0_13 --------------------------
COP0_COMPUTE_CAUSE: process(rst, clk)
-- update, update_reg,
-- MM_int_req, ExcCode, cop0_inp, is_delayslot,
-- count_eq_compare,
-- interrupt_taken, exception_taken,
-- STATUS)
variable branch_delay : std_logic;
variable excp_code : reg5;
begin
if (STATUS(STATUS_EXL) = '1') then
branch_delay := CAUSE(CAUSE_BD); -- do NOT update
else
branch_delay := is_delayslot; -- may update
end if;
if ( (interrupt_taken = '1') or (exception_taken = '1') or
(tlb_excp_taken = '1') )
then
excp_code := ExcCode; -- record new exception
elsif ( (is_exception = exMFC0) and (MM_cop0_reg = cop0reg_CAUSE) ) then
excp_code := cop0code_NULL; -- clear code when sw reads CAUSE
else
excp_code := CAUSE(CAUSE_ExcCodeHi downto CAUSE_ExcCodeLo); -- hold
end if;
if rst = '0' then
CAUSE <= RESET_CAUSE;
elsif rising_edge(clk) then
if (update = '1' and update_reg = cop0reg_CAUSE) then
CAUSE <= branch_delay & -- b31, CAUSE_BD
count_eq_compare & -- b30, CAUSE_TI timer interrupt
b"00" & -- b29,28, CAUSE_CE1,CAUSE_CE0
cop0_inp(CAUSE_DC) & -- b27, disable COUNT register
'0' & -- b26, CAUSE_PCI
b"00" & -- b25,b24, nil
cop0_inp(CAUSE_IV) & -- b23, separate interrupr vector
cop0_inp(CAUSE_WP) & -- b22, watch exception
b"000000" & -- b21..b16, nil
MM_int_req(5 downto 0) & -- b15..b10, update HW IRQs
cop0_inp(CAUSE_IP1 downto CAUSE_IP0) & -- b10,b9, SW IRQs
'0' & -- b7, nil
excp_code & -- b6..b2, ExcCode
b"00"; -- b1,b0, nil
else
CAUSE <= branch_delay & -- b31, CAUSE_BD
count_eq_compare & -- b30, CAUSE_TI timer interrupt
b"00" & -- b29,b28, CAUSE_CE1,CAUSE_CE0
CAUSE(CAUSE_DC) & -- b27, disable COUNT register
'0' & -- b26, CAUSE(CAUSE_PCI)
b"00" & -- b25,b24, nil
CAUSE(CAUSE_IV) & -- b23, separate interrupr vector
CAUSE(CAUSE_WP) & -- b22, watch exception
b"000000" & -- b21..b16, nil
MM_int_req(5 downto 0) & -- b15..b10, update HW IRQs
CAUSE(CAUSE_IP1 downto CAUSE_IP0) & -- b10,b9, SW IRQs
'0' & -- b7, nil
excp_code & -- b6..b2, ExcCode
b"00"; -- b1,b0, nil
end if;
end if;
end process COP0_COMPUTE_CAUSE;
-- EPC -- pg 97 -- cop0_14 -------------------
with epc_source select EPCinp <=
PC when EPC_src_PC, -- instr fetch exception
RF_PC when EPC_src_RF, -- invalid instr exception
EX_PC when EPC_src_EX, -- interrupt, eret, overflow
MM_PC when EPC_src_MM, -- data memory exception
WB_PC when EPC_src_WB, -- overflow in a branch delay slot
MM_B when EPC_src_B, -- mtc0
(others => 'X') when others; -- invalid selection
COP0_EPC: register32 generic map (x"00000000")
port map (clk, rst, epc_update, EPCinp, EPC);
-- COUNT & COMPARE -- pg 75, 78 -----------------
compare_update <= '0' when (update = '1' and update_reg = cop0reg_COMPARE)
else '1';
COP0_COMPARE: register32 generic map(x"00000000")
port map (clk, rst, compare_update, cop0_inp, COMPARE);
count_update <= '0' when (update = '1' and update_reg = cop0reg_COUNT)
else '1';
COP0_COUNT: counter32 generic map (x"00000001")
port map (clk, rst, count_update, count_enable, cop0_inp, COUNT);
-- port map (clk, rst, count_update, PCload, cop0_inp, COUNT); -- DEBUG
compare_set <= (count_eq_compare or BOOL2SL(COUNT = COMPARE))
when compare_update = '1'
else '0';
COP0_COUNT_INTERRUPT: FFD
port map (clk, rst, '1', compare_set, count_eq_compare);
disable_count <= CAUSE(CAUSE_DC) when (CAUSE(CAUSE_DC) /= count_enable)
else count_enable; -- load new CAUSE(CAUSE_DC)
COP0_DISABLE_COUNT: FFD port map (clk,'1',rst, disable_count, count_enable);
-- BadVAddr -- pg 74 ---------------------------
U_BadVAddr_UPDATE: process(is_exception, RF_is_delayslot, RF_PC, EX_PC,
MM_v_addr)
variable i_update : std_logic;
begin
case is_exception is
when IFaddressError | exTLBrefillIF | exTLBdblFaultIF | exTLBinvalIF =>
if RF_is_delayslot = '1' then -- instr is in delay slot
BadVAddr_inp <= EX_PC;
else
BadVAddr_inp <= RF_PC;
end if;
i_update := '0';
when MMaddressErrorLD | MMaddressErrorST | exTLBrefillRD | exTLBrefillWR
| exTLBdblFaultRD | exTLBdblFaultWR | exTLBinvalRD | exTLBinvalWR
| exTLBmod =>
BadVAddr_inp <= MM_v_addr;
i_update := '0';
when others =>
BadVAddr_inp <= (others => 'X');
i_update := '1';
end case;
BadVAddr_update <= i_update;
end process U_BadVAddr_UPDATE;
COP0_BadVAddr: register32 generic map(x"00000000")
port map (clk, rst, BadVAddr_update, BadVAddr_inp, BadVAddr);
-- LLaddr & LLbit --------------------------------------------------
-- check address of SC at stage EX, in time to kill memory reference
LL_update <= '0' when (update = '1' and update_reg = cop0reg_LLAddr)
else '1';
COP0_LLaddr: register32 generic map(x"00000000") -- update at MM
port map (clk, rst, LL_update, MM_v_addr, LLaddr);
LL_SC_differ <= '0' when (v_addr = LLaddr) else '1'; -- check at EX
LL_SC_abort <= (LL_SC_differ or not(ll_sc_bit))
when (EX_exception = exSC) -- and pipe_stall = '0')
else '0';
COP0_LLbit: process(rst,clk)
begin
if rst = '0' then
ll_sc_bit <= '0';
elsif rising_edge(clk) then
case is_exception is
when exERET =>
ll_sc_bit <= '0'; -- break SC -> LL
when exLL =>
ll_sc_bit <= not LL_update; -- update only if instr is an LL
when others =>
null;
end case;
end if;
end process COP0_LLbit;
MM_llbit <= ll_sc_bit and not(BOOL2SL(MM_ll_sc_abort));
-- MMU-TLB ===============================================================
-- assert false -- true -- DEBUG
-- report "pgSz " & integer'image(PAGE_SZ_BITS) &
-- " va-1 "& integer'image(VABITS-1) &
-- " pg+1 "& integer'image(PAGE_SZ_BITS+1) &
-- " add " & integer'image(VABITS-1 - PAGE_SZ_BITS+1) &
-- " lef "&integer'image( PC(VABITS-1 downto PAGE_SZ_BITS+1)'left)&
-- " rig "&integer'image(PC(VABITS-1 downto PAGE_SZ_BITS+1)'right);
-- MMU Index -- cop0_0 -------------------------
index_update <= '0' when (update = '1' and update_reg = cop0reg_Index)
else not(tlb_probe);
hit_mm_bit <= '0' when (hit_mm = TRUE) else '1';
with hit_mm_adr select tlb_adr_mm <= "000" when 0,
"001" when 1,
"010" when 2,
"011" when 3,
"100" when 4,
"101" when 5,
"110" when 6,
"111" when 7,
"XXX" when others;
index_inp <= hit_mm_bit & MMU_IDX_0s & tlb_adr_mm when tlb_probe = '1' else
hit_mm_bit & MMU_IDX_0s & cop0_inp(MMU_CAPACITY_BITS-1 downto 0);
MMU_Index: register32 generic map(x"00000000")
port map (clk, rst, index_update, index_inp, INDEX);
-- MMU Wired -- pg 72 -- cop0_6 ----------------
wired_update <= '0' when (update = '1' and update_reg = cop0reg_Wired)
else '1';
wired_inp <= '0' & MMU_IDX_0s & cop0_inp(MMU_CAPACITY_BITS-1 downto 0);
MMU_Wired: register32 generic map(MMU_WIRED_INIT)
port map (clk, rst, wired_update, wired_inp, WIRED);
-- MMU Random -- cop0_1 ------------------------
MMU_Random: process(clk, rst, WIRED, wired_update)
variable count : integer range -1 to MMU_CAPACITY-1 := MMU_CAPACITY-1;
begin
if rst = '0' then
count := MMU_CAPACITY - 1;
elsif rising_edge(clk) then
count := count - 1;
if count = to_integer(unsigned(WIRED))-1 or wired_update = '0' then
count := MMU_CAPACITY - 1;
end if;
end if;
RANDOM <= std_logic_vector(to_signed(count, 32));
end process MMU_Random;
-- MMU EntryLo0 -- pg 63 -- cop0_2 ------------
entryLo0_update <= '0' when (update = '1' and update_reg = cop0reg_EntryLo0)
else not(tlb_read);
entryLo0_inp <= cop0_inp when tlb_read = '0' else tlb_entryLo0;
MMU_EntryLo0: register32 generic map(x"00000000")
port map (clk, rst, entryLo0_update, entryLo0_inp, EntryLo0);
-- MMU EntryLo1 -- pg 63 -- cop0_3 ------------
entryLo1_update <= '0' when (update = '1' and update_reg = cop0reg_EntryLo1)
else not(tlb_read);
entryLo1_inp <= cop0_inp when tlb_read = '0' else tlb_entryLo1;
MMU_EntryLo1: register32 generic map(x"00000000")
port map (clk, rst, entryLo1_update, entryLo1_inp, EntryLo1);
-- MMU Context -- pg 67 -- cop0_4 ------------
context_upd_pte <= '0' when (update = '1' and update_reg = cop0reg_Context)
else '1';
--
-- these registers are non-compliant so the Page Table can be set
-- at low addresses
--
-- MMU_ContextPTE: registerN generic map(9, ContextPTE_init)
-- port map (clk, rst, context_upd_pte,
-- cop0_inp(31 downto 23), Context(31 downto 23));
MMU_ContextPTE: registerN generic map(16, b"0000000000000000")
port map (clk, rst, context_upd_pte,
cop0_inp(31 downto 16), Context(31 downto 16));
context_upd_bad <= '0' when MM_tlb_exception else '1';
-- MMU_ContextBAD: registerN generic map(19, b"0000000000000000000")
-- port map (clk, rst, context_upd_bad, tlb_context_inp, Context(22 downto 4));
MMU_ContextBAD: registerN generic map(12, b"000000000000")
port map (clk, rst, context_upd_bad,
tlb_excp_VA(VA_HI_BIT-7 downto VA_LO_BIT), Context(15 downto 4));
Context(3 downto 0) <= b"0000";
-- MMU Pagemask -- pg 68 -- cop0_5 -----------
-- page size is fixed = 4k, thus PageMask is not register
-- pageMask_update <= '0' when (update='1' and update_reg=cop0reg_PageMask)
-- else '1';
-- pageMask_inp <= cop0_inp when tlb_read = '0' else tlb_pageMask_mm;
-- MMU_PageMask: register32 generic map(x"00000000")
-- port map (clk, rst, pageMask_update, pageMask_inp, PageMask);
PageMask <= mmu_PageMask;
-- MMU EntryHi -- pg 76 -- cop0_10 -----------
-- EntryHi holds the ASID of the current process, to check for a match
entryHi_update <= '0' when ( (update = '1' and update_reg = cop0reg_EntryHi)
or ( MM_tlb_exception ) )
else not(tlb_read);
entryHi_inp <= tlb_excp_VA & EHI_ZEROS & EntryHi(EHI_G_BIT) & EntryHi(EHI_ASIDHI_BIT downto EHI_ASIDLO_BIT) when MM_tlb_exception else
cop0_inp when tlb_read = '0' else
tlb_entryhi;
MMU_EntryHi: register32 generic map(x"00000000")
port map (clk, rst, entryHi_update, entryHi_inp, EntryHi);
-- == MMU ===============================================================
-- -- pg 41 ----------------------------------
MMU_exceptions: process(iaVal, EX_wrmem, EX_aVal, hit_mm, hit_pc,
hit_mm_v, hit_mm_d, hit_pc_v, STATUS, tlb_ex_2)
variable i_stage_mm, i_exception, i_miss_mm, i_miss_pc : boolean;
variable i_excp_type : exception_type;
begin
i_miss_pc := not(hit_pc) and (iAval = '0');
i_miss_mm := not(hit_mm) and (EX_aval = '0');
-- check first for events later in the pipeline: LOADS and STORES
if i_miss_mm then
if EX_wrmem = '0' then
if STATUS(STATUS_EXL) = '1' then
i_excp_type := exTLBdblFaultWR;
else
i_excp_type := exTLBrefillWR;
end if;
else
if STATUS(STATUS_EXL) = '1' then
i_excp_type := exTLBdblFaultRD;
else
i_excp_type := exTLBrefillRD;
end if;
end if;
i_stage_mm := TRUE;
i_exception := TRUE;
elsif (i_miss_pc and FALSE) then -- only MM exceptions with TLB
if STATUS(STATUS_EXL) = '1' then
i_excp_type := exTLBdblFaultIF;
else
i_excp_type := exTLBrefillIF;
end if;
i_exception := TRUE;
i_stage_mm := FALSE;
elsif hit_mm and EX_aVal = '0' then
if hit_mm_v = '0' then -- check for TLBinvalid
if EX_wrmem = '0' then
i_excp_type := exTLBinvalWR;
else
i_excp_type := exTLBinvalRD;
end if;
i_exception := TRUE;
elsif (EX_wrmem = '0' and hit_mm_d = '0') then -- check for TLBmodified
i_excp_type := exTLBmod;
i_exception := TRUE;
else
i_excp_type := exNOP;
i_exception := FALSE;
end if;
i_stage_mm := TRUE;
elsif (hit_pc and hit_pc_v = '0' and iaVal = '0' and FALSE) then -- TLBinvalid IF?
i_excp_type := exTLBinvalIF;
i_stage_mm := FALSE;
i_exception := TRUE;
else
i_excp_type := exNOP;
i_stage_mm := FALSE;
i_exception := FALSE;
end if;
-- uncomment when making use of the TLB
-- TLB_excp_type <= i_excp_type;
-- tlb_stage_MM <= i_stage_mm;
-- tlb_exception <= i_exception and not(SL2BOOL(tlb_ex_2));
-- uncomment when NOT making use of the TLB
TLB_excp_type <= exNOP;
tlb_stage_MM <= FALSE;
tlb_exception <= FALSE;
end process MMU_exceptions; -- -----------------------------------------
-- catch only first exception, if there are two in consecutive cycles
U_TLB_EXCP_ONCE: FFD port map (clk, rst, '1',
BOOL2SL(tlb_exception), tlb_ex_2);
TLB_excp_num <= exception_type'pos(TLB_excp_type); -- for debugging only
-- MMU TLB TAG-DATA array -- pg 17 ------------------------------------
-- TLB_tag: 31..13 = VPN, 12..9 = 0, 8 = G, 7..0 = ASID
-- TLB_dat: 29..6 = PPN, 5..3 = C, 2 = D, 1 = V, 0 = G
MMU_CONTROL: process(is_exception, INDEX, RANDOM)
variable i_tlb_adr : integer range MMU_CAPACITY-1 downto 0;
begin
tlb_tag0_updt <= '1';
tlb_tag1_updt <= '1';
tlb_tag2_updt <= '1';
tlb_tag3_updt <= '1';
tlb_tag4_updt <= '1';
tlb_tag5_updt <= '1';
tlb_tag6_updt <= '1';
tlb_tag7_updt <= '1';
tlb_dat0_updt <= '1';
tlb_dat1_updt <= '1';
tlb_dat2_updt <= '1';
tlb_dat3_updt <= '1';
tlb_dat4_updt <= '1';
tlb_dat5_updt <= '1';
tlb_dat6_updt <= '1';
tlb_dat7_updt <= '1';
case is_exception is
when exTLBP =>
tlb_probe <= '1';
tlb_read <= '0';
i_tlb_adr := 0;
when exTLBR =>
tlb_probe <= '0';
tlb_read <= '1';
i_tlb_adr := to_integer(unsigned(INDEX(MMU_CAPACITY-1 downto 0)));
when exTLBWI | exTLBWR =>
tlb_probe <= '0';
tlb_read <= '0';
if is_exception = exTLBWI then
i_tlb_adr := to_integer(unsigned(INDEX(MMU_CAPACITY-1 downto 0)));
else
i_tlb_adr := to_integer(unsigned(RANDOM));
end if;
case i_tlb_adr is
when 0 => tlb_tag0_updt <= '0'; tlb_dat0_updt <= '0';
when 1 => tlb_tag1_updt <= '0'; tlb_dat1_updt <= '0';
when 2 => tlb_tag2_updt <= '0'; tlb_dat2_updt <= '0';
when 3 => tlb_tag3_updt <= '0'; tlb_dat3_updt <= '0';
when 4 => tlb_tag4_updt <= '0'; tlb_dat4_updt <= '0';
when 5 => tlb_tag5_updt <= '0'; tlb_dat5_updt <= '0';
when 6 => tlb_tag6_updt <= '0'; tlb_dat6_updt <= '0';
when 7 => tlb_tag7_updt <= '0'; tlb_dat7_updt <= '0';
when others => null;
end case;
when others =>
tlb_probe <= '0';
tlb_read <= '0';
i_tlb_adr := 0;
end case;
tlb_adr <= i_tlb_adr;
end process MMU_CONTROL; ------------------------------------------------
with tlb_adr select
e_hi <= tlb_tag0 when 0,
tlb_tag1 when 1,
tlb_tag2 when 2,
tlb_tag3 when 3,
tlb_tag4 when 4,
tlb_tag5 when 5,
tlb_tag6 when 6,
tlb_tag7 when others;
with tlb_adr select
e_lo0 <= tlb_dat0_0 when 0,
tlb_dat1_0 when 1,
tlb_dat2_0 when 2,
tlb_dat3_0 when 3,
tlb_dat4_0 when 4,
tlb_dat5_0 when 5,
tlb_dat6_0 when 6,
tlb_dat7_0 when others;
with tlb_adr select
e_lo1 <= tlb_dat0_1 when 0,
tlb_dat1_1 when 1,
tlb_dat2_1 when 2,
tlb_dat3_1 when 3,
tlb_dat4_1 when 4,
tlb_dat5_1 when 5,
tlb_dat6_1 when 6,
tlb_dat7_1 when others;
-- assert false
-- report "e_hi="&SLV32HEX(e_hi)&" adr="&natural'image(tlb_adr);--DEBUG
-- tlb_entryhi(EHI_AHI_BIT downto EHI_ALO_BIT)
tlb_entryhi(31 downto PAGE_SZ_BITS + 1)
<= e_hi(TAG_AHI_BIT downto TAG_ALO_BIT);
tlb_entryhi(PAGE_SZ_BITS downto EHI_ASIDHI_BIT+1) <= (others => '0');
tlb_entryhi(EHI_ASIDHI_BIT downto EHI_ASIDLO_BIT)
<= e_hi(TAG_ASIDHI_BIT downto TAG_ASIDLO_BIT);
tlb_entryLo0(31 downto ELO_AHI_BIT+1) <= (others => '0');
tlb_entryLo0(ELO_AHI_BIT downto ELO_ALO_BIT)
<= e_lo0(DAT_AHI_BIT downto DAT_ALO_BIT);
tlb_entryLo0(ELO_CHI_BIT downto ELO_CLO_BIT)
<= e_lo0(DAT_CHI_BIT downto DAT_CLO_BIT);
tlb_entryLo0(ELO_D_BIT) <= e_lo0(DAT_D_BIT);
tlb_entryLo0(ELO_V_BIT) <= e_lo0(DAT_V_BIT);
tlb_entryLo0(ELO_G_BIT) <= e_lo0(DAT_G_BIT);
tlb_entryLo1(31 downto ELO_AHI_BIT+1) <= (others => '0');
tlb_entryLo1(ELO_AHI_BIT downto ELO_ALO_BIT)
<= e_lo1(DAT_AHI_BIT downto DAT_ALO_BIT);
tlb_entryLo1(ELO_CHI_BIT downto ELO_CLO_BIT)
<= e_lo1(DAT_CHI_BIT downto DAT_CLO_BIT);
tlb_entryLo1(ELO_D_BIT) <= e_lo1(DAT_D_BIT);
tlb_entryLo1(ELO_V_BIT) <= e_lo1(DAT_V_BIT);
tlb_entryLo1(ELO_G_BIT) <= e_lo1(DAT_G_BIT);
e_hi_inp <= EntryHi(EHI_AHI_BIT downto EHI_ALO_BIT) & EHI_ZEROS &
(EntryLo0(ELO_G_BIT) and EntryLo1(ELO_G_BIT)) &
EntryHi(EHI_ASIDHI_BIT downto EHI_ASIDLO_BIT); -- pg64
tlb_tag_inp <= e_hi_inp;
tlb_dat0_inp <= EntryLo0(ELO_AHI_BIT downto ELO_G_BIT);
tlb_dat1_inp <= EntryLo1(ELO_AHI_BIT downto ELO_G_BIT);
-- MMU TLB TAG+DATA array -------------------------
mm <= entryHi(EHI_AHI_BIT downto EHI_ALO_BIT) when tlb_probe = '1' else
v_addr(VA_HI_BIT downto VA_LO_BIT);
tlb_excp_VA <= MM_v_addr(VA_HI_BIT downto VA_LO_BIT) when MM_tlb_stage_mm else
PC(VA_HI_BIT downto VA_LO_BIT);
-- TLB entry 0 -- initialized to 1st,2nd pages of ROM
-- this mapping must be pinned down at all times (Wired >= 2, see next entry)
MMU_TAG0: register32 generic map(MMU_ini_tag_ROM0)
port map (clk, rst, tlb_tag0_updt, tlb_tag_inp, tlb_tag0);
MMU_DAT0_0: registerN generic map(DAT_REG_BITS, MMU_ini_dat_ROM0)
port map (clk, rst, tlb_dat0_updt, tlb_dat0_inp, tlb_dat0_0); -- d=1,v=1,g=1
MMU_DAT0_1: registerN generic map(DAT_REG_BITS, MMU_ini_dat_ROM1)
port map (clk, rst, tlb_dat0_updt, tlb_dat1_inp, tlb_dat0_1); -- d=1,v=1,g=1
hit0_pc <= TRUE when (tlb_tag0(VA_HI_BIT downto VA_LO_BIT) = PC(VA_HI_BIT downto VA_LO_BIT)
and ( (tlb_tag0(TAG_G_BIT) = '1') OR
tlb_tag0(ASID_HI_BIT downto 0) = EntryHi(ASID_HI_BIT downto 0) ) )
else FALSE;
hit0_mm <= TRUE when (tlb_tag0(VA_HI_BIT downto VA_LO_BIT) = mm(VA_HI_BIT downto VA_LO_BIT)
and ( (tlb_tag0(TAG_G_BIT) = '1') OR
tlb_tag0(ASID_HI_BIT downto 0) = EntryHi(ASID_HI_BIT downto 0) ) )
else FALSE;
-- TLB entry 1 -- initialized to page with I/O devices
-- this mapping must be pinned down at all times (Wired >= 2)
MMU_TAG1: register32 generic map(MMU_ini_tag_IO)
port map (clk, rst, tlb_tag1_updt, tlb_tag_inp, tlb_tag1);
MMU_DAT1_0: registerN generic map(DAT_REG_BITS, MMU_ini_dat_IO0) -- d=1,v=1,g=1
port map (clk, rst, tlb_dat1_updt, tlb_dat0_inp, tlb_dat1_0);
MMU_DAT1_1: registerN generic map(DAT_REG_BITS, MMU_ini_dat_IO1) -- d=1,v=1,g=1
port map (clk, rst, tlb_dat1_updt, tlb_dat1_inp, tlb_dat1_1);
hit1_pc <= TRUE when (tlb_tag1(VA_HI_BIT downto VA_LO_BIT) = PC(VA_HI_BIT downto VA_LO_BIT)
and ( (tlb_tag1(TAG_G_BIT) = '1') OR
tlb_tag1(ASID_HI_BIT downto 0) = EntryHi(ASID_HI_BIT downto 0) ) )
else FALSE;
hit1_mm <= TRUE when (tlb_tag1(VA_HI_BIT downto VA_LO_BIT) = mm(VA_HI_BIT downto VA_LO_BIT)
and ( (tlb_tag1(TAG_G_BIT) = '1') OR
tlb_tag1(ASID_HI_BIT downto 0) = EntryHi(ASID_HI_BIT downto 0) ) )
else FALSE;
-- TLB entry 2 -- initialized to 3rd,4th pages of ROM
MMU_TAG2: register32 generic map(MMU_ini_tag_ROM2)
port map (clk, rst, tlb_tag2_updt, tlb_tag_inp, tlb_tag2);
MMU_DAT2_0: registerN generic map(DAT_REG_BITS, MMU_ini_dat_ROM2) -- d=1,v=1,g=1
port map (clk, rst, tlb_dat2_updt, tlb_dat0_inp, tlb_dat2_0);
MMU_DAT2_1: registerN generic map(DAT_REG_BITS, MMU_ini_dat_ROM3) -- d=1,v=1,g=1
port map (clk, rst, tlb_dat2_updt, tlb_dat1_inp, tlb_dat2_1);
hit2_pc <= TRUE when (tlb_tag2(VA_HI_BIT downto VA_LO_BIT) = PC(VA_HI_BIT downto VA_LO_BIT)
and ( (tlb_tag2(TAG_G_BIT) = '1') OR
tlb_tag2(ASID_HI_BIT downto 0) = EntryHi(ASID_HI_BIT downto 0) ) )
else FALSE;
hit2_mm <= TRUE when (tlb_tag2(VA_HI_BIT downto VA_LO_BIT) = mm(VA_HI_BIT downto VA_LO_BIT)
and ( (tlb_tag2(TAG_G_BIT) = '1') OR
tlb_tag2(ASID_HI_BIT downto 0) = EntryHi(ASID_HI_BIT downto 0) ) )
else FALSE;
-- TLB entry 3 -- initialized to 5th,6th pages of ROM
MMU_TAG3: register32 generic map(MMU_ini_tag_ROM4)
port map (clk, rst, tlb_tag3_updt, tlb_tag_inp, tlb_tag3);
MMU_DAT3_0: registerN generic map(DAT_REG_BITS, MMU_ini_dat_ROM5) -- d=1,v=1,g=1
port map (clk, rst, tlb_dat3_updt, tlb_dat0_inp, tlb_dat3_0);
MMU_DAT3_1: registerN generic map(DAT_REG_BITS, MMU_ini_dat_ROM6) -- d=1,v=1,g=1
port map (clk, rst, tlb_dat3_updt, tlb_dat1_inp, tlb_dat3_1);
hit3_pc <= TRUE when (tlb_tag3(VA_HI_BIT downto VA_LO_BIT) = PC(VA_HI_BIT downto VA_LO_BIT)
and ( (tlb_tag3(TAG_G_BIT) = '1') OR
tlb_tag3(ASID_HI_BIT downto 0) = EntryHi(ASID_HI_BIT downto 0) ) )
else FALSE;
hit3_mm <= TRUE when (tlb_tag3(VA_HI_BIT downto VA_LO_BIT) = mm(VA_HI_BIT downto VA_LO_BIT)
and ( (tlb_tag3(TAG_G_BIT) = '1') OR
tlb_tag3(ASID_HI_BIT downto 0) = EntryHi(ASID_HI_BIT downto 0) ) )
else FALSE;
-- TLB entry 4 -- initialized to 1st,2nd pages of RAM
MMU_TAG4: register32 generic map(MMU_ini_tag_RAM0)
port map (clk, rst, tlb_tag4_updt, tlb_tag_inp, tlb_tag4);
MMU_DAT4_0: registerN generic map(DAT_REG_BITS, MMU_ini_dat_RAM0) -- d=1,v=1,g=1
port map (clk, rst, tlb_dat4_updt, tlb_dat0_inp, tlb_dat4_0);
MMU_DAT4_1: registerN generic map(DAT_REG_BITS, MMU_ini_dat_RAM1) -- d=1,v=1,g=1
port map (clk, rst, tlb_dat4_updt, tlb_dat1_inp, tlb_dat4_1);
hit4_pc <= TRUE when (tlb_tag4(VA_HI_BIT downto VA_LO_BIT) = PC(VA_HI_BIT downto VA_LO_BIT)
and ( (tlb_tag4(TAG_G_BIT) = '1') OR
tlb_tag4(ASID_HI_BIT downto 0) = EntryHi(ASID_HI_BIT downto 0) ) )
else FALSE;
hit4_mm <= TRUE when (tlb_tag4(VA_HI_BIT downto VA_LO_BIT) = mm(VA_HI_BIT downto VA_LO_BIT)
and ( (tlb_tag4(TAG_G_BIT) = '1') OR
tlb_tag4(ASID_HI_BIT downto 0) = EntryHi(ASID_HI_BIT downto 0) ) )
else FALSE;
-- TLB entry 5 -- initialized to 3rd,4th pages of RAM
MMU_TAG5: register32 generic map(MMU_ini_tag_RAM2)
port map (clk, rst, tlb_tag5_updt, tlb_tag_inp, tlb_tag5);
MMU_DAT5_0: registerN generic map(DAT_REG_BITS, MMU_ini_dat_RAM2) -- d=1,v=1,g=1
port map (clk, rst, tlb_dat5_updt, tlb_dat0_inp, tlb_dat5_0);
MMU_DAT5_1: registerN generic map(DAT_REG_BITS, MMU_ini_dat_RAM3) -- d=1,v=1,g=1
port map (clk, rst, tlb_dat5_updt, tlb_dat1_inp, tlb_dat5_1);
hit5_pc <= TRUE when (tlb_tag5(VA_HI_BIT downto VA_LO_BIT) = PC(VA_HI_BIT downto VA_LO_BIT)
and ( (tlb_tag5(TAG_G_BIT) = '1') OR
tlb_tag5(ASID_HI_BIT downto 0) = EntryHi(ASID_HI_BIT downto 0) ) )
else FALSE;
hit5_mm <= TRUE when (tlb_tag5(VA_HI_BIT downto VA_LO_BIT) = mm(VA_HI_BIT downto VA_LO_BIT)
and ( (tlb_tag5(TAG_G_BIT) = '1') OR
tlb_tag5(ASID_HI_BIT downto 0) = EntryHi(ASID_HI_BIT downto 0) ) )
else FALSE;
-- TLB entry 6 -- initialized to RAM 5th, 6th (1st,2nd pages of SDRAM)
MMU_TAG6: register32 generic map(MMU_ini_tag_RAM4)
port map (clk, rst, tlb_tag6_updt, tlb_tag_inp, tlb_tag6);
MMU_DAT6_0: registerN generic map(DAT_REG_BITS, MMU_ini_dat_RAM4) -- d=1,v=1,g=1
port map (clk, rst, tlb_dat6_updt, tlb_dat0_inp, tlb_dat6_0);
MMU_DAT6_1: registerN generic map(DAT_REG_BITS, MMU_ini_dat_RAM5) -- d=1,v=1,g=1
port map (clk, rst, tlb_dat6_updt, tlb_dat1_inp, tlb_dat6_1);
hit6_pc <= TRUE when (tlb_tag6(VA_HI_BIT downto VA_LO_BIT) = PC(VA_HI_BIT downto VA_LO_BIT)
and ( (tlb_tag6(TAG_G_BIT) = '1') OR
tlb_tag6(ASID_HI_BIT downto 0) = EntryHi(ASID_HI_BIT downto 0) ) )
else FALSE;
hit6_mm <= TRUE when (tlb_tag6(VA_HI_BIT downto VA_LO_BIT) = mm(VA_HI_BIT downto VA_LO_BIT)
and ( (tlb_tag6(TAG_G_BIT) = '1') OR
tlb_tag6(ASID_HI_BIT downto 0) = EntryHi(ASID_HI_BIT downto 0) ) )
else FALSE;
-- TLB entry 7 -- initialized to 7th,8th pages of RAM = stack
MMU_TAG7: register32 generic map(MMU_ini_tag_RAM6)
port map (clk, rst, tlb_tag7_updt, tlb_tag_inp, tlb_tag7);
MMU_DAT7_0: registerN generic map(DAT_REG_BITS, MMU_ini_dat_RAM6) -- d=1,v=1,g=1
port map (clk, rst, tlb_dat7_updt, tlb_dat0_inp, tlb_dat7_0);
MMU_DAT7_1: registerN generic map(DAT_REG_BITS, MMU_ini_dat_RAM7) -- d=1,v=1,g=1
port map (clk, rst, tlb_dat7_updt, tlb_dat1_inp, tlb_dat7_1);
hit7_pc <= TRUE when (tlb_tag7(VA_HI_BIT downto VA_LO_BIT) = PC(VA_HI_BIT downto VA_LO_BIT)
and ( (tlb_tag7(TAG_G_BIT) = '1') OR
tlb_tag7(ASID_HI_BIT downto 0) = EntryHi(ASID_HI_BIT downto 0) ) )
else FALSE;
hit7_mm <= TRUE when (tlb_tag7(VA_HI_BIT downto VA_LO_BIT) = mm(VA_HI_BIT downto VA_LO_BIT)
and ( (tlb_tag7(TAG_G_BIT) = '1') OR
tlb_tag7(ASID_HI_BIT downto 0) = EntryHi(ASID_HI_BIT downto 0) ) )
else FALSE;
-- end of TLB TAG+DATA ARRAY ----------------------------------------
-- select mapping for IF --------------------------------------------
tlb_a2_pc <= 4 when (hit4_pc or hit5_pc or hit6_pc or hit7_pc) else 0;
tlb_a1_pc <= 2 when (hit2_pc or hit3_pc or hit6_pc or hit7_pc) else 0;
tlb_a0_pc <= 1 when (hit1_pc or hit3_pc or hit5_pc or hit7_pc) else 0;
hit_pc <= hit0_pc or hit1_pc or hit2_pc or hit3_pc or
hit4_pc or hit5_pc or hit6_pc or hit7_pc;
hit_pc_adr <= (tlb_a2_pc + tlb_a1_pc + tlb_a0_pc);
with hit_pc_adr select
tlb_ppn_pc0 <= tlb_dat0_0 when 0,
tlb_dat1_0 when 1,
tlb_dat2_0 when 2,
tlb_dat3_0 when 3,
tlb_dat4_0 when 4,
tlb_dat5_0 when 5,
tlb_dat6_0 when 6,
tlb_dat7_0 when others;
with hit_pc_adr select
tlb_ppn_pc1 <= tlb_dat0_1 when 0,
tlb_dat1_1 when 1,
tlb_dat2_1 when 2,
tlb_dat3_1 when 3,
tlb_dat4_1 when 4,
tlb_dat5_1 when 5,
tlb_dat6_1 when 6,
tlb_dat7_1 when others;
tlb_ppn_pc <= tlb_ppn_pc0(DAT_AHI_BIT downto DAT_ALO_BIT)
when PC(PAGE_SZ_BITS) = '0'
else tlb_ppn_pc1(DAT_AHI_BIT downto DAT_ALO_BIT);
hit_pc_v <= tlb_ppn_pc0(DAT_V_BIT) when PC(PAGE_SZ_BITS) = '0' else
tlb_ppn_pc1(DAT_V_BIT);
phy_i_addr <= tlb_ppn_pc(PPN_BITS-1 downto 0) & PC(PAGE_SZ_BITS-1 downto 0);
-- select mapping for MM --------------------------------------------
tlb_a2_mm <= 4 when (hit4_mm or hit5_mm or hit6_mm or hit7_mm) else 0;
tlb_a1_mm <= 2 when (hit2_mm or hit3_mm or hit6_mm or hit7_mm) else 0;
tlb_a0_mm <= 1 when (hit1_mm or hit3_mm or hit5_mm or hit7_mm) else 0;
hit_mm <= (hit0_mm or hit1_mm or hit2_mm or hit3_mm or
hit4_mm or hit5_mm or hit6_mm or hit7_mm);
-- and EX_mem_t /= b"0000"; -- hit AND is load or store
hit_mm_adr <= (tlb_a2_mm + tlb_a1_mm + tlb_a0_mm);
with hit_mm_adr select
tlb_ppn_mm0 <= tlb_dat0_0 when 0,
tlb_dat1_0 when 1,
tlb_dat2_0 when 2,
tlb_dat3_0 when 3,
tlb_dat4_0 when 4,
tlb_dat5_0 when 5,
tlb_dat6_0 when 6,
tlb_dat7_0 when others;
with hit_mm_adr select
tlb_ppn_mm1 <= tlb_dat0_1 when 0,
tlb_dat1_1 when 1,
tlb_dat2_1 when 2,
tlb_dat3_1 when 3,
tlb_dat4_1 when 4,
tlb_dat5_1 when 5,
tlb_dat6_1 when 6,
tlb_dat7_1 when others;
tlb_ppn_mm <= tlb_ppn_mm0(DAT_AHI_BIT downto DAT_ALO_BIT) when v_addr(PAGE_SZ_BITS) = '0' else
tlb_ppn_mm1(DAT_AHI_BIT downto DAT_ALO_BIT);
hit_mm_v <= tlb_ppn_mm0(DAT_V_BIT) when v_addr(PAGE_SZ_BITS) = '0' else
tlb_ppn_mm1(DAT_V_BIT);
hit_mm_d <= tlb_ppn_mm0(DAT_D_BIT) when v_addr(PAGE_SZ_BITS) = '0' else
tlb_ppn_mm1(DAT_D_BIT);
phy_d_addr <= tlb_ppn_mm(PPN_BITS-1 downto 0) & v_addr(PAGE_SZ_BITS-1 downto 0);
-- MMU-TLB == end =======================================================
-- ----------------------------------------------------------------------
PIPESTAGE_EXCP_MM_WB: reg_excp_MM_WB
port map (clk, rst, excp_MM_WB_ld,
MM_PC,WB_PC, MM_LLbit,WB_LLbit,
MM_is_delayslot,WB_is_delayslot,
MM_cop0_val,WB_cop0_val);
-- WB is shared with datapath -------------------------------------------
-- nothing to do here
--++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-- end of control pipeline
--++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
end rtl;
--+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
| gpl-3.0 | 43568eec1b0265607f36dea66ccce0bd | 0.505263 | 3.127366 | false | false | false | false |
mkotormus/G3_OrchestraConductorDemo | src/ov7670_marker_tracker_use/ov7670_marker_tracker_use.srcs/sources_1/ipshared/xilinx.com/axi_uartlite_v2_0/6e58ba99/hdl/src/vhdl/uartlite_tx.vhd | 1 | 23,383 | -------------------------------------------------------------------------------
-- uartlite_tx - entity/architecture pair
-------------------------------------------------------------------------------
--
-- *******************************************************************
-- -- ** (c) Copyright [2007] - [2011] Xilinx, Inc. All rights reserved.*
-- -- ** *
-- -- ** This file contains confidential and proprietary information *
-- -- ** of Xilinx, Inc. and is protected under U.S. and *
-- -- ** international copyright and other intellectual property *
-- -- ** laws. *
-- -- ** *
-- -- ** DISCLAIMER *
-- -- ** This disclaimer is not a license and does not grant any *
-- -- ** rights to the materials distributed herewith. Except as *
-- -- ** otherwise provided in a valid license issued to you by *
-- -- ** Xilinx, and to the maximum extent permitted by applicable *
-- -- ** law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND *
-- -- ** WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES *
-- -- ** AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING *
-- -- ** BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- *
-- -- ** INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and *
-- -- ** (2) Xilinx shall not be liable (whether in contract or tort, *
-- -- ** including negligence, or under any other theory of *
-- -- ** liability) for any loss or damage of any kind or nature *
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-- -- ** materials, including for any direct, or any indirect, *
-- -- ** special, incidental, or consequential loss or damage *
-- -- ** (including loss of data, profits, goodwill, or any type of *
-- -- ** loss or damage suffered as a result of any action brought *
-- -- ** by a third party) even if such damage or loss was *
-- -- ** reasonably foreseeable or Xilinx had been advised of the *
-- -- ** possibility of the same. *
-- -- ** *
-- -- ** CRITICAL APPLICATIONS *
-- -- ** Xilinx products are not designed or intended to be fail- *
-- -- ** safe, or for use in any application requiring fail-safe *
-- -- ** performance, such as life-support or safety devices or *
-- -- ** systems, Class III medical devices, nuclear facilities, *
-- -- ** applications related to the deployment of airbags, or any *
-- -- ** other applications that could lead to death, personal *
-- -- ** injury, or severe property or environmental damage *
-- -- ** (individually and collectively, "Critical *
-- -- ** Applications"). Customer assumes the sole risk and *
-- -- ** liability of any use of Xilinx products in Critical *
-- -- ** Applications, subject only to applicable laws and *
-- -- ** regulations governing limitations on product liability. *
-- -- ** *
-- -- ** THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS *
-- -- ** PART OF THIS FILE AT ALL TIMES. *
-- *******************************************************************
--
-------------------------------------------------------------------------------
-- Filename: uartlite_tx.vhd
-- Version: v2.0
-- Description: UART Lite Transmit Interface Module
--
-- VHDL-Standard: VHDL'93
-------------------------------------------------------------------------------
-- Structure: This section shows the hierarchical structure of axi_uartlite.
--
-- axi_uartlite.vhd
-- --axi_lite_ipif.vhd
-- --uartlite_core.vhd
-- --uartlite_tx.vhd
-- --uartlite_rx.vhd
-- --baudrate.vhd
-------------------------------------------------------------------------------
-- Author: USM
--
-- USM 07/22/09
-- ^^^^^^
-- - Initial release of v1.00.a
-- ~~~~~~
-- ~~~~~~
-- 20/09/20 SK
-- - Updated the version as AXI Lite IPIF version is updated.
-- ^^^^^^
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_com"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.UNSIGNED;
use IEEE.numeric_std.to_unsigned;
use IEEE.numeric_std."-";
library proc_common_v4_0;
-- dynshreg_i_f refered from proc_common_v4_00_a
use proc_common_v4_0.dynshreg_i_f;
-- srl_fifo_f refered from proc_common_v4_00_a
use proc_common_v4_0.srl_fifo_f;
-------------------------------------------------------------------------------
-- Port Declaration
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Definition of Generics :
-------------------------------------------------------------------------------
-- UART Lite generics
-- C_DATA_BITS -- The number of data bits in the serial frame
-- C_USE_PARITY -- Determines whether parity is used or not
-- C_ODD_PARITY -- If parity is used determines whether parity
-- is even or odd
-- System generics
-- C_FAMILY -- Xilinx FPGA Family
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Definition of Ports :
-------------------------------------------------------------------------------
-- System Signals
-- Clk -- Clock signal
-- Rst -- Reset signal
-- UART Lite interface
-- TX -- Transmit Data
-- Internal UART interface signals
-- EN_16x_Baud -- Enable signal which is 16x times baud rate
-- Write_TX_FIFO -- Write transmit FIFO
-- Reset_TX_FIFO -- Reset transmit FIFO
-- TX_Data -- Transmit data input
-- TX_Buffer_Full -- Transmit buffer full
-- TX_Buffer_Empty -- Transmit buffer empty
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Entity Section
-------------------------------------------------------------------------------
entity uartlite_tx is
generic
(
C_FAMILY : string := "virtex7";
C_DATA_BITS : integer range 5 to 8 := 8;
C_USE_PARITY : integer range 0 to 1 := 0;
C_ODD_PARITY : integer range 0 to 1 := 0
);
port
(
Clk : in std_logic;
Reset : in std_logic;
EN_16x_Baud : in std_logic;
TX : out std_logic;
Write_TX_FIFO : in std_logic;
Reset_TX_FIFO : in std_logic;
TX_Data : in std_logic_vector(0 to C_DATA_BITS-1);
TX_Buffer_Full : out std_logic;
TX_Buffer_Empty : out std_logic
);
end entity uartlite_tx;
-------------------------------------------------------------------------------
-- Architecture Section
-------------------------------------------------------------------------------
architecture RTL of uartlite_tx is
-- Pragma Added to supress synth warnings
attribute DowngradeIPIdentifiedWarnings: string;
attribute DowngradeIPIdentifiedWarnings of RTL : architecture is "yes";
type bo2sl_type is array(boolean) of std_logic;
constant bo2sl : bo2sl_type := (false => '0', true => '1');
-------------------------------------------------------------------------
-- Constant Declarations
-------------------------------------------------------------------------
constant MUX_SEL_INIT : std_logic_vector(0 to 2) :=
std_logic_vector(to_unsigned(C_DATA_BITS-1, 3));
-------------------------------------------------------------------------
-- Signal Declarations
-------------------------------------------------------------------------
signal parity : std_logic;
signal tx_Run1 : std_logic;
signal select_Parity : std_logic;
signal data_to_transfer : std_logic_vector(0 to C_DATA_BITS-1);
signal div16 : std_logic;
signal tx_Data_Enable : std_logic;
signal tx_Start : std_logic;
signal tx_DataBits : std_logic;
signal tx_Run : std_logic;
signal mux_sel : std_logic_vector(0 to 2);
signal mux_sel_is_zero : std_logic;
signal mux_01 : std_logic;
signal mux_23 : std_logic;
signal mux_45 : std_logic;
signal mux_67 : std_logic;
signal mux_0123 : std_logic;
signal mux_4567 : std_logic;
signal mux_Out : std_logic;
signal serial_Data : std_logic;
signal fifo_Read : std_logic;
signal fifo_Data_Present : std_logic := '0';
signal fifo_Data_Empty : std_logic;
signal fifo_DOut : std_logic_vector(0 to C_DATA_BITS-1);
signal fifo_wr : std_logic;
signal fifo_rd : std_logic;
signal tx_buffer_full_i : std_logic;
signal TX_FIFO_Reset : std_logic;
begin -- architecture IMP
---------------------------------------------------------------------------
--MID_START_BIT_SRL16_I : Shift register is used to generate div16 that
-- gets shifted for 16 times(as Addr = 15) when
-- EN_16x_Baud is high.
---------------------------------------------------------------------------
MID_START_BIT_SRL16_I : entity proc_common_v4_0.dynshreg_i_f
generic map
(
C_DEPTH => 16,
C_DWIDTH => 1,
C_INIT_VALUE => X"8000",
C_FAMILY => C_FAMILY
)
port map
(
Clk => Clk,
Clken => EN_16x_Baud,
Addr => "1111",
Din(0) => div16,
Dout(0) => div16
);
------------------------------------------------------------------------
-- TX_DATA_ENABLE_DFF : tx_Data_Enable is '1' when div16 is 1 and
-- EN_16x_Baud is 1. It will deasserted in the
-- next clock cycle.
------------------------------------------------------------------------
TX_DATA_ENABLE_DFF: Process (Clk) is
begin
if (Clk'event and Clk = '1') then -- rising clock edge
if Reset = '1' then -- synchronous reset (active high)
tx_Data_Enable <= '0';
else
if (tx_Data_Enable = '1') then
tx_Data_Enable <= '0';
elsif (EN_16x_Baud = '1') then
tx_Data_Enable <= div16;
end if;
end if;
end if;
end process TX_DATA_ENABLE_DFF;
------------------------------------------------------------------------
-- TX_START_DFF : tx_start is '1' for the start bit in a transmission
------------------------------------------------------------------------
TX_START_DFF : process (Clk) is
begin
if Clk'event and Clk = '1' then -- rising clock edge
if Reset = '1' then -- synchronous reset (active high)
tx_Start <= '0';
else
tx_Start <= (not(tx_Run) and (tx_Start or
(fifo_Data_Present and tx_Data_Enable)));
end if;
end if;
end process TX_START_DFF;
--------------------------------------------------------------------------
-- TX_DATA_DFF : tx_DataBits is '1' during all databits transmission
--------------------------------------------------------------------------
TX_DATA_DFF : process (Clk) is
begin
if Clk'event and Clk = '1' then -- rising clock edge
if Reset = '1' then -- synchronous reset (active high)
tx_DataBits <= '0';
else
tx_DataBits <= (not(fifo_Read) and (tx_DataBits or
(tx_Start and tx_Data_Enable)));
end if;
end if;
end process TX_DATA_DFF;
-------------------------------------------------------------------------
-- COUNTER : If mux_sel is zero then reload with the init value else if
-- tx_DataBits = '1', decrement
-------------------------------------------------------------------------
COUNTER : process (Clk) is
begin -- process Mux_Addr_DFF
if Clk'event and Clk = '1' then -- rising clock edge
if Reset = '1' then -- synchronous reset (active high)
mux_sel <= std_logic_vector(to_unsigned(C_DATA_BITS-1,
mux_sel'length));
elsif (tx_Data_Enable = '1') then
if (mux_sel_is_zero = '1') then
mux_sel <= MUX_SEL_INIT;
elsif (tx_DataBits = '1') then
mux_sel <= std_logic_vector(UNSIGNED(mux_sel) - 1);
end if;
end if;
end if;
end process COUNTER;
------------------------------------------------------------------------
-- Detecting when mux_sel is zero, i.e. all data bits are transfered
------------------------------------------------------------------------
mux_sel_is_zero <= '1' when mux_sel = "000" else '0';
--------------------------------------------------------------------------
-- FIFO_READ_DFF : Read out the next data from the transmit fifo when the
-- data has been transmitted
--------------------------------------------------------------------------
FIFO_READ_DFF : process (Clk) is
begin -- process FIFO_Read_DFF
if Clk'event and Clk = '1' then -- rising clock edge
if Reset = '1' then -- synchronous reset (active high)
fifo_Read <= '0';
else
fifo_Read <= tx_Data_Enable and mux_sel_is_zero;
end if;
end if;
end process FIFO_READ_DFF;
--------------------------------------------------------------------------
-- Select which bit within the data word to transmit
--------------------------------------------------------------------------
--------------------------------------------------------------------------
-- PARITY_BIT_INSERTION : Need special treatment for inserting the parity
-- bit because of parity generation
--------------------------------------------------------------------------
data_to_transfer(0 to C_DATA_BITS-2) <= fifo_DOut(0 to C_DATA_BITS-2);
data_to_transfer(C_DATA_BITS-1) <= parity when select_Parity = '1' else
fifo_DOut(C_DATA_BITS-1);
mux_01 <= data_to_transfer(1) when mux_sel(2) = '1' else
data_to_transfer(0);
mux_23 <= data_to_transfer(3) when mux_sel(2) = '1' else
data_to_transfer(2);
--------------------------------------------------------------------------
-- DATA_BITS_IS_5 : Select total 5 data bits when C_DATA_BITS = 5
--------------------------------------------------------------------------
DATA_BITS_IS_5 : if (C_DATA_BITS = 5) generate
mux_45 <= data_to_transfer(4);
mux_67 <= '0';
end generate DATA_BITS_IS_5;
--------------------------------------------------------------------------
-- DATA_BITS_IS_6 : Select total 6 data bits when C_DATA_BITS = 6
--------------------------------------------------------------------------
DATA_BITS_IS_6 : if (C_DATA_BITS = 6) generate
mux_45 <= data_to_transfer(5) when mux_sel(2) = '1' else
data_to_transfer(4);
mux_67 <= '0';
end generate DATA_BITS_IS_6;
--------------------------------------------------------------------------
-- DATA_BITS_IS_7 : Select total 7 data bits when C_DATA_BITS = 7
--------------------------------------------------------------------------
DATA_BITS_IS_7 : if (C_DATA_BITS = 7) generate
mux_45 <= data_to_transfer(5) when mux_sel(2) = '1' else
data_to_transfer(4);
mux_67 <= data_to_transfer(6);
end generate DATA_BITS_IS_7;
--------------------------------------------------------------------------
-- DATA_BITS_IS_8 : Select total 8 data bits when C_DATA_BITS = 8
--------------------------------------------------------------------------
DATA_BITS_IS_8 : if (C_DATA_BITS = 8) generate
mux_45 <= data_to_transfer(5) when mux_sel(2) = '1' else
data_to_transfer(4);
mux_67 <= data_to_transfer(7) when mux_sel(2) = '1' else
data_to_transfer(6);
end generate DATA_BITS_IS_8;
mux_0123 <= mux_23 when mux_sel(1) = '1' else mux_01;
mux_4567 <= mux_67 when mux_sel(1) = '1' else mux_45;
mux_Out <= mux_4567 when mux_sel(0) = '1' else mux_0123;
--------------------------------------------------------------------------
-- SERIAL_DATA_DFF : Register the mux_Out
--------------------------------------------------------------------------
SERIAL_DATA_DFF : process (Clk) is
begin
if Clk'event and Clk = '1' then -- rising clock edge
if Reset = '1' then -- synchronous reset (active high)
serial_Data <= '0';
else
serial_Data <= mux_Out;
end if;
end if;
end process SERIAL_DATA_DFF;
--------------------------------------------------------------------------
-- SERIAL_OUT_DFF :Force a '0' when tx_start is '1', Start_bit
-- Force a '1' when tx_run is '0', Idle
-- otherwise put out the serial_data
--------------------------------------------------------------------------
SERIAL_OUT_DFF : process (Clk) is
begin -- process Serial_Out_DFF
if Clk'event and Clk = '1' then -- rising clock edge
if Reset = '1' then -- synchronous reset (active high)
TX <= '1';
else
TX <= (not(tx_Run) or serial_Data) and (not(tx_Start));
end if;
end if;
end process SERIAL_OUT_DFF;
--------------------------------------------------------------------------
-- USING_PARITY : Generate parity handling when C_USE_PARITY = 1
--------------------------------------------------------------------------
USING_PARITY : if (C_USE_PARITY = 1) generate
PARITY_DFF: Process (Clk) is
begin
if (Clk'event and Clk = '1') then
if (tx_Start = '1') then
parity <= bo2sl(C_ODD_PARITY = 1);
elsif (tx_Data_Enable = '1') then
parity <= parity xor serial_Data;
end if;
end if;
end process PARITY_DFF;
TX_RUN1_DFF : process (Clk) is
begin
if Clk'event and Clk = '1' then -- rising clock edge
if Reset = '1' then -- synchronous reset (active high)
tx_Run1 <= '0';
elsif (tx_Data_Enable = '1') then
tx_Run1 <= tx_DataBits;
end if;
end if;
end process TX_RUN1_DFF;
tx_Run <= tx_Run1 or tx_DataBits;
SELECT_PARITY_DFF : process (Clk) is
begin
if Clk'event and Clk = '1' then -- rising clock edge
if Reset = '1' then -- synchronous reset (active high)
select_Parity <= '0';
elsif (tx_Data_Enable = '1') then
select_Parity <= mux_sel_is_zero;
end if;
end if;
end process SELECT_PARITY_DFF;
end generate USING_PARITY;
--------------------------------------------------------------------------
-- NO_PARITY : When C_USE_PARITY = 0 select parity as '0'
--------------------------------------------------------------------------
NO_PARITY : if (C_USE_PARITY = 0) generate
tx_Run <= tx_DataBits;
select_Parity <= '0';
end generate NO_PARITY;
--------------------------------------------------------------------------
-- Write TX FIFO when FIFO is not full when AXI writes data in TX FIFO
--------------------------------------------------------------------------
fifo_wr <= Write_TX_FIFO and (not tx_buffer_full_i);
--------------------------------------------------------------------------
-- Read TX FIFO when FIFO is not empty when AXI reads data from TX FIFO
--------------------------------------------------------------------------
fifo_rd <= fifo_Read and (not fifo_Data_Empty);
--------------------------------------------------------------------------
-- Reset TX FIFO when requested from the control register or system reset
--------------------------------------------------------------------------
TX_FIFO_Reset <= Reset_TX_FIFO or Reset;
--------------------------------------------------------------------------
-- SRL_FIFO_I : Transmit FIFO Interface
--------------------------------------------------------------------------
SRL_FIFO_I : entity proc_common_v4_0.srl_fifo_f
generic map
(
C_DWIDTH => C_DATA_BITS,
C_DEPTH => 16,
C_FAMILY => C_FAMILY
)
port map
(
Clk => Clk,
Reset => TX_FIFO_Reset,
FIFO_Write => fifo_wr,
Data_In => TX_Data,
FIFO_Read => fifo_rd,
Data_Out => fifo_DOut,
FIFO_Full => tx_buffer_full_i,
FIFO_Empty => fifo_Data_Empty
);
TX_Buffer_Full <= tx_buffer_full_i;
TX_Buffer_Empty <= fifo_Data_Empty;
fifo_Data_Present <= not fifo_Data_Empty;
end architecture RTL;
| apache-2.0 | cfd624592341d5ed3dd50ced7823c210 | 0.400291 | 4.873489 | false | false | false | false |
mkotormus/G3_OrchestraConductorDemo | src/ov7670_marker_tracker_use/ov7670_marker_tracker_use.srcs/sources_1/ipshared/xilinx.com/proc_common_v4_0/bb615326/hdl/src/vhdl/sync_fifo_fg.vhd | 1 | 69,489 | -------------------------------------------------------------------------------
-- $Id:$
-------------------------------------------------------------------------------
-- sync_fifo_fg.vhd
-------------------------------------------------------------------------------
--
-- *************************************************************************
-- ** **
-- ** DISCLAIMER OF LIABILITY **
-- ** **
-- ** This text/file contains proprietary, confidential **
-- ** information of Xilinx, Inc., is distributed under **
-- ** license from Xilinx, Inc., and may be used, copied **
-- ** and/or disclosed only pursuant to the terms of a valid **
-- ** license agreement with Xilinx, Inc. Xilinx hereby **
-- ** grants you a license to use this text/file solely for **
-- ** design, simulation, implementation and creation of **
-- ** design files limited to Xilinx devices or technologies. **
-- ** Use with non-Xilinx devices or technologies is expressly **
-- ** prohibited and immediately terminates your license unless **
-- ** covered by a separate agreement. **
-- ** **
-- ** Xilinx is providing this design, code, or information **
-- ** "as-is" solely for use in developing programs and **
-- ** solutions for Xilinx devices, with no obligation on the **
-- ** part of Xilinx to provide support. By providing this design, **
-- ** code, or information as one possible implementation of **
-- ** this feature, application or standard, Xilinx is making no **
-- ** representation that this implementation is free from any **
-- ** claims of infringement. You are responsible for obtaining **
-- ** any rights you may require for your implementation. **
-- ** Xilinx expressly disclaims any warranty whatsoever with **
-- ** respect to the adequacy of the implementation, including **
-- ** but not limited to any warranties or representations that this **
-- ** implementation is free from claims of infringement, implied **
-- ** warranties of merchantability or fitness for a particular **
-- ** purpose. **
-- ** **
-- ** Xilinx products are not intended for use in life support **
-- ** appliances, devices, or systems. Use in such applications is **
-- ** expressly prohibited. **
-- ** **
-- ** Any modifications that are made to the Source Code are **
-- ** done at the users sole risk and will be unsupported. **
-- ** The Xilinx Support Hotline does not have access to source **
-- ** code and therefore cannot answer specific questions related **
-- ** to source HDL. The Xilinx Hotline support of original source **
-- ** code IP shall only address issues and questions related **
-- ** to the standard Netlist version of the core (and thus **
-- ** indirectly, the original core source). **
-- ** **
-- ** Copyright (c) 2008-2010 Xilinx, Inc. All rights reserved. **
-- ** **
-- ** This copyright and support notice must be retained as part **
-- ** of this text at all times. **
-- ** **
-- *************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: sync_fifo_fg.vhd
--
-- Description:
-- This HDL file adapts the legacy CoreGen Sync FIFO interface to the new
-- FIFO Generator Sync FIFO interface. This wrapper facilitates the "on
-- the fly" call of FIFO Generator during design implementation.
--
--
--
-- VHDL-Standard: VHDL'93
-------------------------------------------------------------------------------
-- Structure:
-- sync_fifo_fg.vhd
-- |
-- |-- fifo_generator_v4_3
-- |
-- |-- fifo_generator_v9_3
--
-------------------------------------------------------------------------------
-- Revision History:
--
--
-- Author: DET
-- Revision: $Revision: 1.5.2.68 $
-- Date: $1/16/2008$
--
-- History:
-- DET 1/16/2008 Initial Version
--
-- DET 7/30/2008 for EDK 11.1
-- ~~~~~~
-- - Replaced fifo_generator_v4_2 component with fifo_generator_v4_3
-- ^^^^^^
--
-- MSH and DET 3/2/2009 For Lava SP2
-- ~~~~~~
-- - Added FIFO Generator version 5.1 for use with Virtex6 and Spartan6
-- devices.
-- - IfGen used so that legacy FPGA families still use Fifo Generator
-- version 4.3.
-- ^^^^^^
--
-- DET 4/9/2009 EDK 11.2
-- ~~~~~~
-- - Replaced FIFO Generator version 5.1 with 5.2.
-- ^^^^^^
--
--
-- DET 2/9/2010 for EDK 12.1
-- ~~~~~~
-- - Updated the S6/V6 FIFO Generator version from V5.2 to V5.3.
-- ^^^^^^
--
-- DET 3/10/2010 For EDK 12.x
-- ~~~~~~
-- -- Per CR553307
-- - Updated the S6/V6 FIFO Generator version from V5.3 to V6.1.
-- ^^^^^^
--
-- DET 6/18/2010 EDK_MS2
-- ~~~~~~
-- -- Per IR565916
-- - Added derivative part type checks for S6 or V6.
-- ^^^^^^
--
-- DET 8/30/2010 EDK_MS4
-- ~~~~~~
-- -- Per CR573867
-- - Updated the S6/V6 FIFO Generator version from V6.1 to 7.2.
-- - Added all of the AXI parameters and ports. They are not used
-- in this application.
-- - Updated method for derivative part support using new family
-- aliasing function in family_support.vhd.
-- - Incorporated an implementation to deal with unsupported FPGA
-- parts passed in on the C_FAMILY parameter.
-- ^^^^^^
--
-- DET 10/4/2010 EDK 13.1
-- ~~~~~~
-- - Updated the FIFO Generator version from V7.2 to 7.3.
-- ^^^^^^
--
-- DET 12/8/2010 EDK 13.1
-- ~~~~~~
-- -- Per CR586109
-- - Updated the FIFO Generator version from V7.3 to 8.1.
-- ^^^^^^
--
-- DET 3/2/2011 EDK 13.2
-- ~~~~~~
-- -- Per CR595473
-- - Update to use fifo_generator_v8_2
-- ^^^^^^
--
--
-- RBODDU 08/18/2011 EDK 13.3
-- ~~~~~~
-- - Update to use fifo_generator_v8_3
-- ^^^^^^
--
-- RBODDU 06/07/2012 EDK 14.2
-- ~~~~~~
-- - Update to use fifo_generator_v9_1
-- ^^^^^^
-- RBODDU 06/11/2012 EDK 14.4
-- ~~~~~~
-- - Update to use fifo_generator_v9_2
-- ^^^^^^
-- RBODDU 07/12/2012 EDK 14.5
-- ~~~~~~
-- - Update to use fifo_generator_v9_3
-- ^^^^^^
-- RBODDU 07/12/2012 EDK 14.5
-- ~~~~~~
-- - Update to use fifo_generator_v12_0
-- - Added sleep, wr_rst_busy, and rd_rst_busy signals
-- - Changed FULL_FLAGS_RST_VAL to '1'
-- ^^^^^^
--
-------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
library proc_common_v4_0;
library fifo_generator_v12_0;
--use proc_common_v4_0.coregen_comp_defs.all;
use fifo_generator_v12_0.all;
use proc_common_v4_0.proc_common_pkg.all;
use proc_common_v4_0.proc_common_pkg.log2;
use proc_common_v4_0.family_support.all;
-- synopsys translate_off
--library XilinxCoreLib;
--use XilinxCoreLib.all;
-- synopsys translate_on
-------------------------------------------------------------------------------
entity sync_fifo_fg is
generic (
C_FAMILY : String := "virtex5"; -- new for FIFO Gen
C_DCOUNT_WIDTH : integer := 4 ;
C_ENABLE_RLOCS : integer := 0 ; -- not supported in sync fifo
C_HAS_DCOUNT : integer := 1 ;
C_HAS_RD_ACK : integer := 0 ;
C_HAS_RD_ERR : integer := 0 ;
C_HAS_WR_ACK : integer := 0 ;
C_HAS_WR_ERR : integer := 0 ;
C_HAS_ALMOST_FULL : integer := 0 ;
C_MEMORY_TYPE : integer := 0 ; -- 0 = distributed RAM, 1 = BRAM
C_PORTS_DIFFER : integer := 0 ;
C_RD_ACK_LOW : integer := 0 ;
C_USE_EMBEDDED_REG : integer := 0 ;
C_READ_DATA_WIDTH : integer := 16;
C_READ_DEPTH : integer := 16;
C_RD_ERR_LOW : integer := 0 ;
C_WR_ACK_LOW : integer := 0 ;
C_WR_ERR_LOW : integer := 0 ;
C_PRELOAD_REGS : integer := 0 ; -- 1 = first word fall through
C_PRELOAD_LATENCY : integer := 1 ; -- 0 = first word fall through
C_WRITE_DATA_WIDTH : integer := 16;
C_WRITE_DEPTH : integer := 16;
C_SYNCHRONIZER_STAGE : integer := 2 -- Valid values are 0 to 8
);
port (
Clk : in std_logic;
Sinit : in std_logic;
Din : in std_logic_vector(C_WRITE_DATA_WIDTH-1 downto 0);
Wr_en : in std_logic;
Rd_en : in std_logic;
Dout : out std_logic_vector(C_READ_DATA_WIDTH-1 downto 0);
Almost_full : out std_logic;
Full : out std_logic;
Empty : out std_logic;
Rd_ack : out std_logic;
Wr_ack : out std_logic;
Rd_err : out std_logic;
Wr_err : out std_logic;
Data_count : out std_logic_vector(C_DCOUNT_WIDTH-1 downto 0)
);
end entity sync_fifo_fg;
architecture implementation of sync_fifo_fg is
-- Function delarations
-------------------------------------------------------------------
-- Function
--
-- Function Name: GetMaxDepth
--
-- Function Description:
-- Returns the largest value of either Write depth or Read depth
-- requested by input parameters.
--
-------------------------------------------------------------------
function GetMaxDepth (rd_depth : integer;
wr_depth : integer)
return integer is
Variable max_value : integer := 0;
begin
If (rd_depth < wr_depth) Then
max_value := wr_depth;
else
max_value := rd_depth;
End if;
return(max_value);
end function GetMaxDepth;
-------------------------------------------------------------------
-- Function
--
-- Function Name: GetMemType
--
-- Function Description:
-- Generates the required integer value for the FG instance assignment
-- of the C_MEMORY_TYPE parameter. Derived from
-- the input memory type parameter C_MEMORY_TYPE.
--
-- FIFO Generator values
-- 0 = Any
-- 1 = BRAM
-- 2 = Distributed Memory
-- 3 = Shift Registers
--
-------------------------------------------------------------------
function GetMemType (inputmemtype : integer) return integer is
Variable memtype : Integer := 0;
begin
If (inputmemtype = 0) Then -- distributed Memory
memtype := 2;
else
memtype := 1; -- BRAM
End if;
return(memtype);
end function GetMemType;
-- Constant Declarations ----------------------------------------------
Constant FAMILY_TO_USE : string := get_root_family(C_FAMILY); -- function from family_support.vhd
Constant FAMILY_NOT_SUPPORTED : boolean := (equalIgnoringCase(FAMILY_TO_USE, "nofamily"));
Constant FAMILY_IS_SUPPORTED : boolean := not(FAMILY_NOT_SUPPORTED);
--Constant FAM_IS_S3_V4_V5 : boolean := (equalIgnoringCase(FAMILY_TO_USE, "spartan3" ) or
-- equalIgnoringCase(FAMILY_TO_USE, "virtex4" ) or
-- equalIgnoringCase(FAMILY_TO_USE, "virtex5")) and
-- FAMILY_IS_SUPPORTED;
--Constant FAM_IS_NOT_S3_V4_V5 : boolean := not(FAM_IS_S3_V4_V5) and
-- FAMILY_IS_SUPPORTED;
-- Calculate associated FIFO characteristics
Constant MAX_DEPTH : integer := GetMaxDepth(C_READ_DEPTH,C_WRITE_DEPTH);
Constant FGEN_CNT_WIDTH : integer := log2(MAX_DEPTH)+1;
Constant ADJ_FGEN_CNT_WIDTH : integer := FGEN_CNT_WIDTH-1;
-- Get the integer value for a Block memory type fifo generator call
Constant FG_MEM_TYPE : integer := GetMemType(C_MEMORY_TYPE);
-- Set the required integer value for the FG instance assignment
-- of the C_IMPLEMENTATION_TYPE parameter. Derived from
-- the input memory type parameter C_MEMORY_TYPE.
--
-- 0 = Common Clock BRAM / Distributed RAM (Synchronous FIFO)
-- 1 = Common Clock Shift Register (Synchronous FIFO)
-- 2 = Independent Clock BRAM/Distributed RAM (Asynchronous FIFO)
-- 3 = Independent/Common Clock V4 Built In Memory -- not used in legacy fifo calls
-- 5 = Independent/Common Clock V5 Built in Memory -- not used in legacy fifo calls
--
Constant FG_IMP_TYPE : integer := 0;
-- The programable thresholds are not used so this is housekeeping.
Constant PROG_FULL_THRESH_ASSERT_VAL : integer := MAX_DEPTH-3;
Constant PROG_FULL_THRESH_NEGATE_VAL : integer := MAX_DEPTH-4;
-- Constant zeros for programmable threshold inputs
signal PROG_RDTHRESH_ZEROS : std_logic_vector(ADJ_FGEN_CNT_WIDTH-1
DOWNTO 0) := (OTHERS => '0');
signal PROG_WRTHRESH_ZEROS : std_logic_vector(ADJ_FGEN_CNT_WIDTH-1
DOWNTO 0) := (OTHERS => '0');
-- Signals
signal sig_full : std_logic;
signal sig_full_fg_datacnt : std_logic_vector(FGEN_CNT_WIDTH-1 downto 0);
signal sig_prim_fg_datacnt : std_logic_vector(ADJ_FGEN_CNT_WIDTH-1 downto 0);
--Signals added to fix MTI and XSIM issues caused by fix for VCS issues not to use "LIBRARY_SCAN = TRUE"
signal ALMOST_EMPTY : std_logic;
signal RD_DATA_COUNT : std_logic_vector(ADJ_FGEN_CNT_WIDTH-1 downto 0);
signal WR_DATA_COUNT : std_logic_vector(ADJ_FGEN_CNT_WIDTH-1 downto 0);
signal PROG_FULL : std_logic;
signal PROG_EMPTY : std_logic;
signal SBITERR : std_logic;
signal DBITERR : std_logic;
signal WR_RST_BUSY : std_logic;
signal RD_RST_BUSY : std_logic;
signal S_AXI_AWREADY : std_logic;
signal S_AXI_WREADY : std_logic;
signal S_AXI_BID : std_logic_vector(3 DOWNTO 0);
signal S_AXI_BRESP : std_logic_vector(2-1 DOWNTO 0);
signal S_AXI_BUSER : std_logic_vector(0 downto 0);
signal S_AXI_BVALID : std_logic;
-- AXI Full/Lite Master Write Channel (Read side)
signal M_AXI_AWID : std_logic_vector(3 DOWNTO 0);
signal M_AXI_AWADDR : std_logic_vector(31 DOWNTO 0);
signal M_AXI_AWLEN : std_logic_vector(8-1 DOWNTO 0);
signal M_AXI_AWSIZE : std_logic_vector(3-1 DOWNTO 0);
signal M_AXI_AWBURST : std_logic_vector(2-1 DOWNTO 0);
signal M_AXI_AWLOCK : std_logic_vector(2-1 DOWNTO 0);
signal M_AXI_AWCACHE : std_logic_vector(4-1 DOWNTO 0);
signal M_AXI_AWPROT : std_logic_vector(3-1 DOWNTO 0);
signal M_AXI_AWQOS : std_logic_vector(4-1 DOWNTO 0);
signal M_AXI_AWREGION : std_logic_vector(4-1 DOWNTO 0);
signal M_AXI_AWUSER : std_logic_vector(0 downto 0);
signal M_AXI_AWVALID : std_logic;
signal M_AXI_WID : std_logic_vector(3 DOWNTO 0);
signal M_AXI_WDATA : std_logic_vector(63 DOWNTO 0);
signal M_AXI_WSTRB : std_logic_vector(7 DOWNTO 0);
signal M_AXI_WLAST : std_logic;
signal M_AXI_WUSER : std_logic_vector(0 downto 0);
signal M_AXI_WVALID : std_logic;
signal M_AXI_BREADY : std_logic;
-- AXI Full/Lite Slave Read Channel (Write side)
signal S_AXI_ARREADY : std_logic;
signal S_AXI_RID : std_logic_vector(3 DOWNTO 0);
signal S_AXI_RDATA : std_logic_vector(63 DOWNTO 0);
signal S_AXI_RRESP : std_logic_vector(2-1 DOWNTO 0);
signal S_AXI_RLAST : std_logic;
signal S_AXI_RUSER : std_logic_vector(0 downto 0);
signal S_AXI_RVALID : std_logic;
-- AXI Full/Lite Master Read Channel (Read side)
signal M_AXI_ARID : std_logic_vector(3 DOWNTO 0);
signal M_AXI_ARADDR : std_logic_vector(31 DOWNTO 0);
signal M_AXI_ARLEN : std_logic_vector(8-1 DOWNTO 0);
signal M_AXI_ARSIZE : std_logic_vector(3-1 DOWNTO 0);
signal M_AXI_ARBURST : std_logic_vector(2-1 DOWNTO 0);
signal M_AXI_ARLOCK : std_logic_vector(2-1 DOWNTO 0);
signal M_AXI_ARCACHE : std_logic_vector(4-1 DOWNTO 0);
signal M_AXI_ARPROT : std_logic_vector(3-1 DOWNTO 0);
signal M_AXI_ARQOS : std_logic_vector(4-1 DOWNTO 0);
signal M_AXI_ARREGION : std_logic_vector(4-1 DOWNTO 0);
signal M_AXI_ARUSER : std_logic_vector(0 downto 0);
signal M_AXI_ARVALID : std_logic;
signal M_AXI_RREADY : std_logic;
-- AXI Streaming Slave Signals (Write side)
signal S_AXIS_TREADY : std_logic;
-- AXI Streaming Master Signals (Read side)
signal M_AXIS_TVALID : std_logic;
signal M_AXIS_TDATA : std_logic_vector(63 DOWNTO 0);
signal M_AXIS_TSTRB : std_logic_vector(3 DOWNTO 0);
signal M_AXIS_TKEEP : std_logic_vector(3 DOWNTO 0);
signal M_AXIS_TLAST : std_logic;
signal M_AXIS_TID : std_logic_vector(7 DOWNTO 0);
signal M_AXIS_TDEST : std_logic_vector(3 DOWNTO 0);
signal M_AXIS_TUSER : std_logic_vector(3 DOWNTO 0);
-- AXI Full/Lite Write Address Channel Signals
signal AXI_AW_DATA_COUNT : std_logic_vector(4 DOWNTO 0);
signal AXI_AW_WR_DATA_COUNT : std_logic_vector(4 DOWNTO 0);
signal AXI_AW_RD_DATA_COUNT : std_logic_vector(4 DOWNTO 0);
signal AXI_AW_SBITERR : std_logic;
signal AXI_AW_DBITERR : std_logic;
signal AXI_AW_OVERFLOW : std_logic;
signal AXI_AW_UNDERFLOW : std_logic;
signal AXI_AW_PROG_FULL : STD_LOGIC;
signal AXI_AW_PROG_EMPTY : STD_LOGIC;
-- AXI Full/Lite Write Data Channel Signals
signal AXI_W_DATA_COUNT : std_logic_vector(10 DOWNTO 0);
signal AXI_W_WR_DATA_COUNT : std_logic_vector(10 DOWNTO 0);
signal AXI_W_RD_DATA_COUNT : std_logic_vector(10 DOWNTO 0);
signal AXI_W_SBITERR : std_logic;
signal AXI_W_DBITERR : std_logic;
signal AXI_W_OVERFLOW : std_logic;
signal AXI_W_UNDERFLOW : std_logic;
signal AXI_W_PROG_FULL : STD_LOGIC;
signal AXI_W_PROG_EMPTY : STD_LOGIC;
-- AXI Full/Lite Write Response Channel Signals
signal AXI_B_DATA_COUNT : std_logic_vector(4 DOWNTO 0);
signal AXI_B_WR_DATA_COUNT : std_logic_vector(4 DOWNTO 0);
signal AXI_B_RD_DATA_COUNT : std_logic_vector(4 DOWNTO 0);
signal AXI_B_SBITERR : std_logic;
signal AXI_B_DBITERR : std_logic;
signal AXI_B_OVERFLOW : std_logic;
signal AXI_B_UNDERFLOW : std_logic;
signal AXI_B_PROG_FULL : STD_LOGIC;
signal AXI_B_PROG_EMPTY : STD_LOGIC;
-- AXI Full/Lite Read Address Channel Signals
signal AXI_AR_DATA_COUNT : std_logic_vector(4 DOWNTO 0);
signal AXI_AR_WR_DATA_COUNT : std_logic_vector(4 DOWNTO 0);
signal AXI_AR_RD_DATA_COUNT : std_logic_vector(4 DOWNTO 0);
signal AXI_AR_SBITERR : std_logic;
signal AXI_AR_DBITERR : std_logic;
signal AXI_AR_OVERFLOW : std_logic;
signal AXI_AR_UNDERFLOW : std_logic;
signal AXI_AR_PROG_FULL : STD_LOGIC;
signal AXI_AR_PROG_EMPTY : STD_LOGIC;
-- AXI Full/Lite Read Data Channel Signals
signal AXI_R_DATA_COUNT : std_logic_vector(10 DOWNTO 0);
signal AXI_R_WR_DATA_COUNT : std_logic_vector(10 DOWNTO 0);
signal AXI_R_RD_DATA_COUNT : std_logic_vector(10 DOWNTO 0);
signal AXI_R_SBITERR : std_logic;
signal AXI_R_DBITERR : std_logic;
signal AXI_R_OVERFLOW : std_logic;
signal AXI_R_UNDERFLOW : std_logic;
signal AXI_R_PROG_FULL : STD_LOGIC;
signal AXI_R_PROG_EMPTY : STD_LOGIC;
-- AXI Streaming FIFO Related Signals
signal AXIS_DATA_COUNT : std_logic_vector(10 DOWNTO 0);
signal AXIS_WR_DATA_COUNT : std_logic_vector(10 DOWNTO 0);
signal AXIS_RD_DATA_COUNT : std_logic_vector(10 DOWNTO 0);
signal AXIS_SBITERR : std_logic;
signal AXIS_DBITERR : std_logic;
signal AXIS_OVERFLOW : std_logic;
signal AXIS_UNDERFLOW : std_logic;
signal AXIS_PROG_FULL : STD_LOGIC;
signal AXIS_PROG_EMPTY : STD_LOGIC;
begin --(architecture implementation)
------------------------------------------------------------
-- If Generate
--
-- Label: GEN_NO_FAMILY
--
-- If Generate Description:
-- This IfGen is implemented if an unsupported FPGA family
-- is passed in on the C_FAMILY parameter,
--
------------------------------------------------------------
GEN_NO_FAMILY : if (FAMILY_NOT_SUPPORTED) generate
begin
-- synthesis translate_off
-------------------------------------------------------------
-- Combinational Process
--
-- Label: DO_ASSERTION
--
-- Process Description:
-- Generate a simulation error assertion for an unsupported
-- FPGA family string passed in on the C_FAMILY parameter.
--
-------------------------------------------------------------
DO_ASSERTION : process
begin
-- Wait until second rising clock edge to issue assertion
Wait until Clk = '1';
wait until Clk = '0';
Wait until Clk = '1';
-- Report an error in simulation environment
assert FALSE report "********* UNSUPPORTED FPGA DEVICE! Check C_FAMILY parameter assignment!"
severity ERROR;
Wait;-- halt this process
end process DO_ASSERTION;
-- synthesis translate_on
-- Tie outputs to logic low or logic high as required
Dout <= (others => '0'); -- : out std_logic_vector(C_DATA_WIDTH-1 downto 0);
Almost_full <= '0' ; -- : out std_logic;
Full <= '0' ; -- : out std_logic;
Empty <= '1' ; -- : out std_logic;
Rd_ack <= '0' ; -- : out std_logic;
Wr_ack <= '0' ; -- : out std_logic;
Rd_err <= '1' ; -- : out std_logic;
Wr_err <= '1' ; -- : out std_logic
Data_count <= (others => '0'); -- : out std_logic_vector(C_WR_COUNT_WIDTH-1 downto 0);
end generate GEN_NO_FAMILY;
------------------------------------------------------------
-- If Generate
--
-- Label: V6_S6_AND_LATER
--
-- If Generate Description:
-- This IfGen implements the fifo using fifo_generator_v9_3
-- when the designated FPGA Family is Spartan-6, Virtex-6 or
-- later.
--
------------------------------------------------------------
FAMILY_SUPPORTED: if(FAMILY_IS_SUPPORTED) generate
begin
UltraScale_device: if (FAMILY_TO_USE = "virtexu" or FAMILY_TO_USE = "kintexu") generate
begin
Full <= sig_full or WR_RST_BUSY;
end generate UltraScale_device;
Series7_device: if (FAMILY_TO_USE /= "virtexu" and FAMILY_TO_USE /= "kintexu") generate
begin
Full <= sig_full;
end generate Series7_device;
-- Create legacy data count by concatonating the Full flag to the
-- MS Bit position of the FIFO data count
-- This is per the Fifo Generator Migration Guide
sig_full_fg_datacnt <= sig_full & sig_prim_fg_datacnt;
Data_count <= sig_full_fg_datacnt(FGEN_CNT_WIDTH-1 downto
FGEN_CNT_WIDTH-C_DCOUNT_WIDTH);
-------------------------------------------------------------------------------
-- Instantiate the generalized FIFO Generator instance
--
-- NOTE:
-- DO NOT CHANGE TO DIRECT ENTITY INSTANTIATION!!!
-- This is a Coregen FIFO Generator Call module for
-- BRAM implementations of a legacy Sync FIFO
--
-------------------------------------------------------------------------------
I_SYNC_FIFO_BRAM : entity fifo_generator_v12_0.fifo_generator_v12_0
generic map(
C_COMMON_CLOCK => 1,
C_COUNT_TYPE => 0,
C_DATA_COUNT_WIDTH => ADJ_FGEN_CNT_WIDTH, -- what to do here ???
C_DEFAULT_VALUE => "BlankString", -- what to do here ???
C_DIN_WIDTH => C_WRITE_DATA_WIDTH,
C_DOUT_RST_VAL => "0",
C_DOUT_WIDTH => C_READ_DATA_WIDTH,
C_ENABLE_RLOCS => 0, -- not supported
C_FAMILY => FAMILY_TO_USE,
C_FULL_FLAGS_RST_VAL => 0,
C_HAS_ALMOST_EMPTY => 1,
C_HAS_ALMOST_FULL => C_HAS_ALMOST_FULL,
C_HAS_BACKUP => 0,
C_HAS_DATA_COUNT => C_HAS_DCOUNT,
C_HAS_INT_CLK => 0,
C_HAS_MEMINIT_FILE => 0,
C_HAS_OVERFLOW => C_HAS_WR_ERR,
C_HAS_RD_DATA_COUNT => 0, -- not used for sync FIFO
C_HAS_RD_RST => 0, -- not used for sync FIFO
C_HAS_RST => 0, -- not used for sync FIFO
C_HAS_SRST => 1,
C_HAS_UNDERFLOW => C_HAS_RD_ERR,
C_HAS_VALID => C_HAS_RD_ACK,
C_HAS_WR_ACK => C_HAS_WR_ACK,
C_HAS_WR_DATA_COUNT => 0, -- not used for sync FIFO
C_HAS_WR_RST => 0, -- not used for sync FIFO
C_IMPLEMENTATION_TYPE => FG_IMP_TYPE,
C_INIT_WR_PNTR_VAL => 0,
C_MEMORY_TYPE => FG_MEM_TYPE,
C_MIF_FILE_NAME => "BlankString",
C_OPTIMIZATION_MODE => 0,
C_OVERFLOW_LOW => C_WR_ERR_LOW,
C_PRELOAD_LATENCY => C_PRELOAD_LATENCY, -- 0 = first word fall through
C_PRELOAD_REGS => C_PRELOAD_REGS, -- 1 = first word fall through
C_PRIM_FIFO_TYPE => "512x36", -- only used for V5 Hard FIFO
C_PROG_EMPTY_THRESH_ASSERT_VAL => 2,
C_PROG_EMPTY_THRESH_NEGATE_VAL => 3,
C_PROG_EMPTY_TYPE => 0,
C_PROG_FULL_THRESH_ASSERT_VAL => PROG_FULL_THRESH_ASSERT_VAL,
C_PROG_FULL_THRESH_NEGATE_VAL => PROG_FULL_THRESH_NEGATE_VAL,
C_PROG_FULL_TYPE => 0,
C_RD_DATA_COUNT_WIDTH => ADJ_FGEN_CNT_WIDTH,
C_RD_DEPTH => MAX_DEPTH,
C_RD_FREQ => 1,
C_RD_PNTR_WIDTH => ADJ_FGEN_CNT_WIDTH,
C_UNDERFLOW_LOW => C_RD_ERR_LOW,
C_USE_DOUT_RST => 1,
C_USE_ECC => 0,
C_USE_EMBEDDED_REG => C_USE_EMBEDDED_REG, ----0, Fixed CR#658129
C_USE_FIFO16_FLAGS => 0,
C_USE_FWFT_DATA_COUNT => 0,
C_VALID_LOW => C_RD_ACK_LOW,
C_WR_ACK_LOW => C_WR_ACK_LOW,
C_WR_DATA_COUNT_WIDTH => ADJ_FGEN_CNT_WIDTH,
C_WR_DEPTH => MAX_DEPTH,
C_WR_FREQ => 1,
C_WR_PNTR_WIDTH => ADJ_FGEN_CNT_WIDTH,
C_WR_RESPONSE_LATENCY => 1,
C_MSGON_VAL => 1,
C_ENABLE_RST_SYNC => 1,
C_ERROR_INJECTION_TYPE => 0,
C_SYNCHRONIZER_STAGE => C_SYNCHRONIZER_STAGE,
-- AXI Interface related parameters start here
C_INTERFACE_TYPE => 0, -- : integer := 0; -- 0: Native Interface; 1: AXI Interface
C_AXI_TYPE => 0, -- : integer := 0; -- 0: AXI Stream; 1: AXI Full; 2: AXI Lite
C_HAS_AXI_WR_CHANNEL => 0, -- : integer := 0;
C_HAS_AXI_RD_CHANNEL => 0, -- : integer := 0;
C_HAS_SLAVE_CE => 0, -- : integer := 0;
C_HAS_MASTER_CE => 0, -- : integer := 0;
C_ADD_NGC_CONSTRAINT => 0, -- : integer := 0;
C_USE_COMMON_OVERFLOW => 0, -- : integer := 0;
C_USE_COMMON_UNDERFLOW => 0, -- : integer := 0;
C_USE_DEFAULT_SETTINGS => 0, -- : integer := 0;
-- AXI Full/Lite
C_AXI_ID_WIDTH => 4 , -- : integer := 0;
C_AXI_ADDR_WIDTH => 32, -- : integer := 0;
C_AXI_DATA_WIDTH => 64, -- : integer := 0;
C_AXI_LEN_WIDTH => 8, -- : integer := 8;
C_AXI_LOCK_WIDTH => 2, -- : integer := 2;
C_HAS_AXI_ID => 0, -- : integer := 0;
C_HAS_AXI_AWUSER => 0 , -- : integer := 0;
C_HAS_AXI_WUSER => 0 , -- : integer := 0;
C_HAS_AXI_BUSER => 0 , -- : integer := 0;
C_HAS_AXI_ARUSER => 0 , -- : integer := 0;
C_HAS_AXI_RUSER => 0 , -- : integer := 0;
C_AXI_ARUSER_WIDTH => 1 , -- : integer := 0;
C_AXI_AWUSER_WIDTH => 1 , -- : integer := 0;
C_AXI_WUSER_WIDTH => 1 , -- : integer := 0;
C_AXI_BUSER_WIDTH => 1 , -- : integer := 0;
C_AXI_RUSER_WIDTH => 1 , -- : integer := 0;
-- AXI Streaming
C_HAS_AXIS_TDATA => 0 , -- : integer := 0;
C_HAS_AXIS_TID => 0 , -- : integer := 0;
C_HAS_AXIS_TDEST => 0 , -- : integer := 0;
C_HAS_AXIS_TUSER => 0 , -- : integer := 0;
C_HAS_AXIS_TREADY => 1 , -- : integer := 0;
C_HAS_AXIS_TLAST => 0 , -- : integer := 0;
C_HAS_AXIS_TSTRB => 0 , -- : integer := 0;
C_HAS_AXIS_TKEEP => 0 , -- : integer := 0;
C_AXIS_TDATA_WIDTH => 64, -- : integer := 1;
C_AXIS_TID_WIDTH => 8 , -- : integer := 1;
C_AXIS_TDEST_WIDTH => 4 , -- : integer := 1;
C_AXIS_TUSER_WIDTH => 4 , -- : integer := 1;
C_AXIS_TSTRB_WIDTH => 4 , -- : integer := 1;
C_AXIS_TKEEP_WIDTH => 4 , -- : integer := 1;
-- AXI Channel Type
-- WACH --> Write Address Channel
-- WDCH --> Write Data Channel
-- WRCH --> Write Response Channel
-- RACH --> Read Address Channel
-- RDCH --> Read Data Channel
-- AXIS --> AXI Streaming
C_WACH_TYPE => 0, -- : integer := 0; -- 0 = FIFO; 1 = Register Slice; 2 = Pass Through Logic
C_WDCH_TYPE => 0, -- : integer := 0; -- 0 = FIFO; 1 = Register Slice; 2 = Pass Through Logie
C_WRCH_TYPE => 0, -- : integer := 0; -- 0 = FIFO; 1 = Register Slice; 2 = Pass Through Logie
C_RACH_TYPE => 0, -- : integer := 0; -- 0 = FIFO; 1 = Register Slice; 2 = Pass Through Logie
C_RDCH_TYPE => 0, -- : integer := 0; -- 0 = FIFO; 1 = Register Slice; 2 = Pass Through Logie
C_AXIS_TYPE => 0, -- : integer := 0; -- 0 = FIFO; 1 = Register Slice; 2 = Pass Through Logie
-- AXI Implementation Type
-- 1 = Common Clock Block RAM FIFO
-- 2 = Common Clock Distributed RAM FIFO
-- 11 = Independent Clock Block RAM FIFO
-- 12 = Independent Clock Distributed RAM FIFO
C_IMPLEMENTATION_TYPE_WACH => 1, -- : integer := 0;
C_IMPLEMENTATION_TYPE_WDCH => 1, -- : integer := 0;
C_IMPLEMENTATION_TYPE_WRCH => 1, -- : integer := 0;
C_IMPLEMENTATION_TYPE_RACH => 1, -- : integer := 0;
C_IMPLEMENTATION_TYPE_RDCH => 1, -- : integer := 0;
C_IMPLEMENTATION_TYPE_AXIS => 1, -- : integer := 0;
-- AXI FIFO Type
-- 0 = Data FIFO
-- 1 = Packet FIFO
-- 2 = Low Latency Data FIFO
C_APPLICATION_TYPE_WACH => 0, -- : integer := 0;
C_APPLICATION_TYPE_WDCH => 0, -- : integer := 0;
C_APPLICATION_TYPE_WRCH => 0, -- : integer := 0;
C_APPLICATION_TYPE_RACH => 0, -- : integer := 0;
C_APPLICATION_TYPE_RDCH => 0, -- : integer := 0;
C_APPLICATION_TYPE_AXIS => 0, -- : integer := 0;
-- Enable ECC
-- 0 = ECC disabled
-- 1 = ECC enabled
C_USE_ECC_WACH => 0, -- : integer := 0;
C_USE_ECC_WDCH => 0, -- : integer := 0;
C_USE_ECC_WRCH => 0, -- : integer := 0;
C_USE_ECC_RACH => 0, -- : integer := 0;
C_USE_ECC_RDCH => 0, -- : integer := 0;
C_USE_ECC_AXIS => 0, -- : integer := 0;
-- ECC Error Injection Type
-- 0 = No Error Injection
-- 1 = Single Bit Error Injection
-- 2 = Double Bit Error Injection
-- 3 = Single Bit and Double Bit Error Injection
C_ERROR_INJECTION_TYPE_WACH => 0, -- : integer := 0;
C_ERROR_INJECTION_TYPE_WDCH => 0, -- : integer := 0;
C_ERROR_INJECTION_TYPE_WRCH => 0, -- : integer := 0;
C_ERROR_INJECTION_TYPE_RACH => 0, -- : integer := 0;
C_ERROR_INJECTION_TYPE_RDCH => 0, -- : integer := 0;
C_ERROR_INJECTION_TYPE_AXIS => 0, -- : integer := 0;
-- Input Data Width
-- Accumulation of all AXI input signal's width
C_DIN_WIDTH_WACH => 32, -- : integer := 1;
C_DIN_WIDTH_WDCH => 64, -- : integer := 1;
C_DIN_WIDTH_WRCH => 2 , -- : integer := 1;
C_DIN_WIDTH_RACH => 32, -- : integer := 1;
C_DIN_WIDTH_RDCH => 64, -- : integer := 1;
C_DIN_WIDTH_AXIS => 1 , -- : integer := 1;
C_WR_DEPTH_WACH => 16 , -- : integer := 16;
C_WR_DEPTH_WDCH => 1024, -- : integer := 16;
C_WR_DEPTH_WRCH => 16 , -- : integer := 16;
C_WR_DEPTH_RACH => 16 , -- : integer := 16;
C_WR_DEPTH_RDCH => 1024, -- : integer := 16;
C_WR_DEPTH_AXIS => 1024, -- : integer := 16;
C_WR_PNTR_WIDTH_WACH => 4 , -- : integer := 4;
C_WR_PNTR_WIDTH_WDCH => 10, -- : integer := 4;
C_WR_PNTR_WIDTH_WRCH => 4 , -- : integer := 4;
C_WR_PNTR_WIDTH_RACH => 4 , -- : integer := 4;
C_WR_PNTR_WIDTH_RDCH => 10, -- : integer := 4;
C_WR_PNTR_WIDTH_AXIS => 10, -- : integer := 4;
C_HAS_DATA_COUNTS_WACH => 0, -- : integer := 0;
C_HAS_DATA_COUNTS_WDCH => 0, -- : integer := 0;
C_HAS_DATA_COUNTS_WRCH => 0, -- : integer := 0;
C_HAS_DATA_COUNTS_RACH => 0, -- : integer := 0;
C_HAS_DATA_COUNTS_RDCH => 0, -- : integer := 0;
C_HAS_DATA_COUNTS_AXIS => 0, -- : integer := 0;
C_HAS_PROG_FLAGS_WACH => 0, -- : integer := 0;
C_HAS_PROG_FLAGS_WDCH => 0, -- : integer := 0;
C_HAS_PROG_FLAGS_WRCH => 0, -- : integer := 0;
C_HAS_PROG_FLAGS_RACH => 0, -- : integer := 0;
C_HAS_PROG_FLAGS_RDCH => 0, -- : integer := 0;
C_HAS_PROG_FLAGS_AXIS => 0, -- : integer := 0;
C_PROG_FULL_TYPE_WACH => 5 , -- : integer := 0;
C_PROG_FULL_TYPE_WDCH => 5 , -- : integer := 0;
C_PROG_FULL_TYPE_WRCH => 5 , -- : integer := 0;
C_PROG_FULL_TYPE_RACH => 5 , -- : integer := 0;
C_PROG_FULL_TYPE_RDCH => 5 , -- : integer := 0;
C_PROG_FULL_TYPE_AXIS => 5 , -- : integer := 0;
C_PROG_FULL_THRESH_ASSERT_VAL_WACH => 1023, -- : integer := 0;
C_PROG_FULL_THRESH_ASSERT_VAL_WDCH => 1023, -- : integer := 0;
C_PROG_FULL_THRESH_ASSERT_VAL_WRCH => 1023, -- : integer := 0;
C_PROG_FULL_THRESH_ASSERT_VAL_RACH => 1023, -- : integer := 0;
C_PROG_FULL_THRESH_ASSERT_VAL_RDCH => 1023, -- : integer := 0;
C_PROG_FULL_THRESH_ASSERT_VAL_AXIS => 1023, -- : integer := 0;
C_PROG_EMPTY_TYPE_WACH => 5 , -- : integer := 0;
C_PROG_EMPTY_TYPE_WDCH => 5 , -- : integer := 0;
C_PROG_EMPTY_TYPE_WRCH => 5 , -- : integer := 0;
C_PROG_EMPTY_TYPE_RACH => 5 , -- : integer := 0;
C_PROG_EMPTY_TYPE_RDCH => 5 , -- : integer := 0;
C_PROG_EMPTY_TYPE_AXIS => 5 , -- : integer := 0;
C_PROG_EMPTY_THRESH_ASSERT_VAL_WACH => 1022, -- : integer := 0;
C_PROG_EMPTY_THRESH_ASSERT_VAL_WDCH => 1022, -- : integer := 0;
C_PROG_EMPTY_THRESH_ASSERT_VAL_WRCH => 1022, -- : integer := 0;
C_PROG_EMPTY_THRESH_ASSERT_VAL_RACH => 1022, -- : integer := 0;
C_PROG_EMPTY_THRESH_ASSERT_VAL_RDCH => 1022, -- : integer := 0;
C_PROG_EMPTY_THRESH_ASSERT_VAL_AXIS => 1022, -- : integer := 0;
C_REG_SLICE_MODE_WACH => 0, -- : integer := 0;
C_REG_SLICE_MODE_WDCH => 0, -- : integer := 0;
C_REG_SLICE_MODE_WRCH => 0, -- : integer := 0;
C_REG_SLICE_MODE_RACH => 0, -- : integer := 0;
C_REG_SLICE_MODE_RDCH => 0, -- : integer := 0;
C_REG_SLICE_MODE_AXIS => 0 -- : integer := 0
)
port map(
backup => '0',
backup_marker => '0',
clk => Clk,
rst => '0',
srst => Sinit,
wr_clk => '0',
wr_rst => '0',
rd_clk => '0',
rd_rst => '0',
din => Din,
wr_en => Wr_en,
rd_en => Rd_en,
prog_empty_thresh => PROG_RDTHRESH_ZEROS,
prog_empty_thresh_assert => PROG_RDTHRESH_ZEROS,
prog_empty_thresh_negate => PROG_RDTHRESH_ZEROS,
prog_full_thresh => PROG_WRTHRESH_ZEROS,
prog_full_thresh_assert => PROG_WRTHRESH_ZEROS,
prog_full_thresh_negate => PROG_WRTHRESH_ZEROS,
int_clk => '0',
injectdbiterr => '0', -- new FG 5.1/5.2
injectsbiterr => '0', -- new FG 5.1/5.2
sleep => '0',
dout => Dout,
full => sig_full,
almost_full => Almost_full,
wr_ack => Wr_ack,
overflow => Wr_err,
empty => Empty,
almost_empty => ALMOST_EMPTY,
valid => Rd_ack,
underflow => Rd_err,
data_count => sig_prim_fg_datacnt,
rd_data_count => RD_DATA_COUNT,
wr_data_count => WR_DATA_COUNT,
prog_full => PROG_FULL,
prog_empty => PROG_EMPTY,
sbiterr => SBITERR,
dbiterr => DBITERR,
wr_rst_busy => WR_RST_BUSY,
rd_rst_busy => RD_RST_BUSY,
-- AXI Global Signal
m_aclk => '0', -- : IN std_logic := '0';
s_aclk => '0', -- : IN std_logic := '0';
s_aresetn => '0', -- : IN std_logic := '0';
m_aclk_en => '0', -- : IN std_logic := '0';
s_aclk_en => '0', -- : IN std_logic := '0';
-- AXI Full/Lite Slave Write Channel (write side)
s_axi_awid => "0000", --(others => '0'), -- : IN std_logic_vector(C_AXI_ID_WIDTH-1 DOWNTO 0) := (OTHERS => '0');
s_axi_awaddr => "00000000000000000000000000000000", --(others => '0'), -- : IN std_logic_vector(C_AXI_ADDR_WIDTH-1 DOWNTO 0) := (OTHERS => '0');
s_axi_awlen => "00000000", --(others => '0'), -- : IN std_logic_vector(8-1 DOWNTO 0) := (OTHERS => '0');
s_axi_awsize => "000", --(others => '0'), -- : IN std_logic_vector(3-1 DOWNTO 0) := (OTHERS => '0');
s_axi_awburst => "00", --(others => '0'), -- : IN std_logic_vector(2-1 DOWNTO 0) := (OTHERS => '0');
s_axi_awlock => "00", --(others => '0'), -- : IN std_logic_vector(2-1 DOWNTO 0) := (OTHERS => '0');
s_axi_awcache => "0000", --(others => '0'), -- : IN std_logic_vector(4-1 DOWNTO 0) := (OTHERS => '0');
s_axi_awprot => "000", --(others => '0'), -- : IN std_logic_vector(3-1 DOWNTO 0) := (OTHERS => '0');
s_axi_awqos => "0000", --(others => '0'), -- : IN std_logic_vector(4-1 DOWNTO 0) := (OTHERS => '0');
s_axi_awregion => "0000", --(others => '0'), -- : IN std_logic_vector(4-1 DOWNTO 0) := (OTHERS => '0');
s_axi_awuser => "0", --(others => '0'), -- : IN std_logic_vector(C_AXI_AWUSER_WIDTH-1 DOWNTO 0) := (OTHERS => '0');
s_axi_awvalid => '0', -- : IN std_logic := '0';
s_axi_awready => S_AXI_AWREADY, -- : OUT std_logic;
s_axi_wid => "0000", --(others => '0'), -- : IN std_logic_vector(C_AXI_ID_WIDTH-1 DOWNTO 0) := (OTHERS => '0');
s_axi_wdata => "0000000000000000000000000000000000000000000000000000000000000000", --(others => '0'), -- : IN std_logic_vector(C_AXI_DATA_WIDTH-1 DOWNTO 0) := (OTHERS => '0');
s_axi_wstrb => "00000000", --(others => '0'), -- : IN std_logic_vector(C_AXI_DATA_WIDTH/8-1 DOWNTO 0) := (OTHERS => '0');
s_axi_wlast => '0', -- : IN std_logic := '0';
s_axi_wuser => "0", --(others => '0'), -- : IN std_logic_vector(C_AXI_WUSER_WIDTH-1 DOWNTO 0) := (OTHERS => '0');
s_axi_wvalid => '0', -- : IN std_logic := '0';
s_axi_wready => S_AXI_WREADY, -- : OUT std_logic;
s_axi_bid => S_AXI_BID, -- : OUT std_logic_vector(C_AXI_ID_WIDTH-1 DOWNTO 0) := (OTHERS => '0');
s_axi_bresp => S_AXI_BRESP, -- : OUT std_logic_vector(2-1 DOWNTO 0);
s_axi_buser => S_AXI_BUSER, -- : OUT std_logic_vector(C_AXI_BUSER_WIDTH-1 DOWNTO 0);
s_axi_bvalid => S_AXI_BVALID, -- : OUT std_logic;
s_axi_bready => '0', -- : IN std_logic := '0';
-- AXI Full/Lite Master Write Channel (Read side)
m_axi_awid => M_AXI_AWID, -- : OUT std_logic_vector(C_AXI_ID_WIDTH-1 DOWNTO 0);
m_axi_awaddr => M_AXI_AWADDR, -- : OUT std_logic_vector(C_AXI_ADDR_WIDTH-1 DOWNTO 0);
m_axi_awlen => M_AXI_AWLEN, -- : OUT std_logic_vector(8-1 DOWNTO 0);
m_axi_awsize => M_AXI_AWSIZE, -- : OUT std_logic_vector(3-1 DOWNTO 0);
m_axi_awburst => M_AXI_AWBURST, -- : OUT std_logic_vector(2-1 DOWNTO 0);
m_axi_awlock => M_AXI_AWLOCK, -- : OUT std_logic_vector(2-1 DOWNTO 0);
m_axi_awcache => M_AXI_AWCACHE, -- : OUT std_logic_vector(4-1 DOWNTO 0);
m_axi_awprot => M_AXI_AWPROT, -- : OUT std_logic_vector(3-1 DOWNTO 0);
m_axi_awqos => M_AXI_AWQOS, -- : OUT std_logic_vector(4-1 DOWNTO 0);
m_axi_awregion => M_AXI_AWREGION, -- : OUT std_logic_vector(4-1 DOWNTO 0);
m_axi_awuser => M_AXI_AWUSER, -- : OUT std_logic_vector(C_AXI_AWUSER_WIDTH-1 DOWNTO 0);
m_axi_awvalid => M_AXI_AWVALID, -- : OUT std_logic;
m_axi_awready => '0', -- : IN std_logic := '0';
m_axi_wid => M_AXI_WID, -- : OUT std_logic_vector(C_AXI_ID_WIDTH-1 DOWNTO 0);
m_axi_wdata => M_AXI_WDATA, -- : OUT std_logic_vector(C_AXI_DATA_WIDTH-1 DOWNTO 0);
m_axi_wstrb => M_AXI_WSTRB, -- : OUT std_logic_vector(C_AXI_DATA_WIDTH/8-1 DOWNTO 0);
m_axi_wlast => M_AXI_WLAST, -- : OUT std_logic;
m_axi_wuser => M_AXI_WUSER, -- : OUT std_logic_vector(C_AXI_WUSER_WIDTH-1 DOWNTO 0);
m_axi_wvalid => M_AXI_WVALID, -- : OUT std_logic;
m_axi_wready => '0', -- : IN std_logic := '0';
m_axi_bid => "0000", --(others => '0'), -- : IN std_logic_vector(C_AXI_ID_WIDTH-1 DOWNTO 0) := (OTHERS => '0');
m_axi_bresp => "00", --(others => '0'), -- : IN std_logic_vector(2-1 DOWNTO 0) := (OTHERS => '0');
m_axi_buser => "0", --(others => '0'), -- : IN std_logic_vector(C_AXI_BUSER_WIDTH-1 DOWNTO 0) := (OTHERS => '0');
m_axi_bvalid => '0', -- : IN std_logic := '0';
m_axi_bready => M_AXI_BREADY, -- : OUT std_logic;
-- AXI Full/Lite Slave Read Channel (Write side)
s_axi_arid => "0000", --(others => '0'), (others => '0'), -- : IN std_logic_vector(C_AXI_ID_WIDTH-1 DOWNTO 0) := (OTHERS => '0');
s_axi_araddr => "00000000000000000000000000000000", --(others => '0'), (others => '0'), -- : IN std_logic_vector(C_AXI_ADDR_WIDTH-1 DOWNTO 0) := (OTHERS => '0');
s_axi_arlen => "00000000", --(others => '0'), (others => '0'), -- : IN std_logic_vector(8-1 DOWNTO 0) := (OTHERS => '0');
s_axi_arsize => "000", --(others => '0'), (others => '0'), -- : IN std_logic_vector(3-1 DOWNTO 0) := (OTHERS => '0');
s_axi_arburst => "00", --(others => '0'), (others => '0'), -- : IN std_logic_vector(2-1 DOWNTO 0) := (OTHERS => '0');
s_axi_arlock => "00", --(others => '0'), (others => '0'), -- : IN std_logic_vector(2-1 DOWNTO 0) := (OTHERS => '0');
s_axi_arcache => "0000", --(others => '0'), (others => '0'), -- : IN std_logic_vector(4-1 DOWNTO 0) := (OTHERS => '0');
s_axi_arprot => "000", --(others => '0'), (others => '0'), -- : IN std_logic_vector(3-1 DOWNTO 0) := (OTHERS => '0');
s_axi_arqos => "0000", --(others => '0'), (others => '0'), -- : IN std_logic_vector(4-1 DOWNTO 0) := (OTHERS => '0');
s_axi_arregion => "0000", --(others => '0'), (others => '0'), -- : IN std_logic_vector(4-1 DOWNTO 0) := (OTHERS => '0');
s_axi_aruser => "0", --(others => '0'), (others => '0'), -- : IN std_logic_vector(C_AXI_ARUSER_WIDTH-1 DOWNTO 0) := (OTHERS => '0');
s_axi_arvalid => '0', -- : IN std_logic := '0';
s_axi_arready => S_AXI_ARREADY, -- : OUT std_logic;
s_axi_rid => S_AXI_RID, -- : OUT std_logic_vector(C_AXI_ID_WIDTH-1 DOWNTO 0);
s_axi_rdata => S_AXI_RDATA, -- : OUT std_logic_vector(C_AXI_DATA_WIDTH-1 DOWNTO 0);
s_axi_rresp => S_AXI_RRESP, -- : OUT std_logic_vector(2-1 DOWNTO 0);
s_axi_rlast => S_AXI_RLAST, -- : OUT std_logic;
s_axi_ruser => S_AXI_RUSER, -- : OUT std_logic_vector(C_AXI_RUSER_WIDTH-1 DOWNTO 0);
s_axi_rvalid => S_AXI_RVALID, -- : OUT std_logic;
s_axi_rready => '0', -- : IN std_logic := '0';
-- AXI Full/Lite Master Read Channel (Read side)
m_axi_arid => M_AXI_ARID, -- : OUT std_logic_vector(C_AXI_ID_WIDTH-1 DOWNTO 0);
m_axi_araddr => M_AXI_ARADDR, -- : OUT std_logic_vector(C_AXI_ADDR_WIDTH-1 DOWNTO 0);
m_axi_arlen => M_AXI_ARLEN, -- : OUT std_logic_vector(8-1 DOWNTO 0);
m_axi_arsize => M_AXI_ARSIZE, -- : OUT std_logic_vector(3-1 DOWNTO 0);
m_axi_arburst => M_AXI_ARBURST, -- : OUT std_logic_vector(2-1 DOWNTO 0);
m_axi_arlock => M_AXI_ARLOCK, -- : OUT std_logic_vector(2-1 DOWNTO 0);
m_axi_arcache => M_AXI_ARCACHE, -- : OUT std_logic_vector(4-1 DOWNTO 0);
m_axi_arprot => M_AXI_ARPROT, -- : OUT std_logic_vector(3-1 DOWNTO 0);
m_axi_arqos => M_AXI_ARQOS, -- : OUT std_logic_vector(4-1 DOWNTO 0);
m_axi_arregion => M_AXI_ARREGION, -- : OUT std_logic_vector(4-1 DOWNTO 0);
m_axi_aruser => M_AXI_ARUSER, -- : OUT std_logic_vector(C_AXI_ARUSER_WIDTH-1 DOWNTO 0);
m_axi_arvalid => M_AXI_ARVALID, -- : OUT std_logic;
m_axi_arready => '0', -- : IN std_logic := '0';
m_axi_rid => "0000", --(others => '0'), -- : IN std_logic_vector(C_AXI_ID_WIDTH-1 DOWNTO 0) := (OTHERS => '0');
m_axi_rdata => "0000000000000000000000000000000000000000000000000000000000000000", --(others => '0'), -- : IN std_logic_vector(C_AXI_DATA_WIDTH-1 DOWNTO 0) := (OTHERS => '0');
m_axi_rresp => "00", --(others => '0'), -- : IN std_logic_vector(2-1 DOWNTO 0) := (OTHERS => '0');
m_axi_rlast => '0', -- : IN std_logic := '0';
m_axi_ruser => "0", --(others => '0'), -- : IN std_logic_vector(C_AXI_RUSER_WIDTH-1 DOWNTO 0) := (OTHERS => '0');
m_axi_rvalid => '0', -- : IN std_logic := '0';
m_axi_rready => M_AXI_RREADY, -- : OUT std_logic;
-- AXI Streaming Slave Signals (Write side)
s_axis_tvalid => '0', -- : IN std_logic := '0';
s_axis_tready => S_AXIS_TREADY, -- : OUT std_logic;
s_axis_tdata => "0000000000000000000000000000000000000000000000000000000000000000", --(others => '0'), -- : IN std_logic_vector(C_AXIS_TDATA_WIDTH-1 DOWNTO 0) := (OTHERS => '0');
s_axis_tstrb => "0000", --(others => '0'), -- : IN std_logic_vector(C_AXIS_TSTRB_WIDTH-1 DOWNTO 0) := (OTHERS => '0');
s_axis_tkeep => "0000", --(others => '0'), -- : IN std_logic_vector(C_AXIS_TKEEP_WIDTH-1 DOWNTO 0) := (OTHERS => '0');
s_axis_tlast => '0', -- : IN std_logic := '0';
s_axis_tid => "00000000", --(others => '0'), -- : IN std_logic_vector(C_AXIS_TID_WIDTH-1 DOWNTO 0) := (OTHERS => '0');
s_axis_tdest => "0000", --(others => '0'), -- : IN std_logic_vector(C_AXIS_TDEST_WIDTH-1 DOWNTO 0) := (OTHERS => '0');
s_axis_tuser => "0000", --(others => '0'), -- : IN std_logic_vector(C_AXIS_TUSER_WIDTH-1 DOWNTO 0) := (OTHERS => '0');
-- AXI Streaming Master Signals (Read side)
m_axis_tvalid => M_AXIS_TVALID, -- : OUT std_logic;
m_axis_tready => '0', -- : IN std_logic := '0';
m_axis_tdata => M_AXIS_TDATA, -- : OUT std_logic_vector(C_AXIS_TDATA_WIDTH-1 DOWNTO 0);
m_axis_tstrb => M_AXIS_TSTRB, -- : OUT std_logic_vector(C_AXIS_TSTRB_WIDTH-1 DOWNTO 0);
m_axis_tkeep => M_AXIS_TKEEP, -- : OUT std_logic_vector(C_AXIS_TKEEP_WIDTH-1 DOWNTO 0);
m_axis_tlast => M_AXIS_TLAST, -- : OUT std_logic;
m_axis_tid => M_AXIS_TID, -- : OUT std_logic_vector(C_AXIS_TID_WIDTH-1 DOWNTO 0);
m_axis_tdest => M_AXIS_TDEST, -- : OUT std_logic_vector(C_AXIS_TDEST_WIDTH-1 DOWNTO 0);
m_axis_tuser => M_AXIS_TUSER, -- : OUT std_logic_vector(C_AXIS_TUSER_WIDTH-1 DOWNTO 0);
-- AXI Full/Lite Write Address Channel Signals
axi_aw_injectsbiterr => '0', -- : IN std_logic := '0';
axi_aw_injectdbiterr => '0', -- : IN std_logic := '0';
axi_aw_prog_full_thresh => "0000", --(others => '0'), -- : IN std_logic_vector(C_WR_PNTR_WIDTH_WACH-1 DOWNTO 0) := (OTHERS => '0');
axi_aw_prog_empty_thresh => "0000", --(others => '0'), -- : IN std_logic_vector(C_WR_PNTR_WIDTH_WACH-1 DOWNTO 0) := (OTHERS => '0');
axi_aw_data_count => AXI_AW_DATA_COUNT, -- : OUT std_logic_vector(C_WR_PNTR_WIDTH_WACH DOWNTO 0);
axi_aw_wr_data_count => AXI_AW_WR_DATA_COUNT, -- : OUT std_logic_vector(C_WR_PNTR_WIDTH_WACH DOWNTO 0);
axi_aw_rd_data_count => AXI_AW_RD_DATA_COUNT, -- : OUT std_logic_vector(C_WR_PNTR_WIDTH_WACH DOWNTO 0);
axi_aw_sbiterr => AXI_AW_SBITERR, -- : OUT std_logic;
axi_aw_dbiterr => AXI_AW_DBITERR, -- : OUT std_logic;
axi_aw_overflow => AXI_AW_OVERFLOW, -- : OUT std_logic;
axi_aw_underflow => AXI_AW_UNDERFLOW, -- : OUT std_logic;
axi_aw_prog_full => AXI_AW_PROG_FULL, -- : OUT STD_LOGIC := '0';
axi_aw_prog_empty => AXI_AW_PROG_EMPTY, -- : OUT STD_LOGIC := '1';
-- AXI Full/Lite Write Data Channel Signals
axi_w_injectsbiterr => '0', -- : IN std_logic := '0';
axi_w_injectdbiterr => '0', -- : IN std_logic := '0';
axi_w_prog_full_thresh => "0000000000", --(others => '0'), -- : IN std_logic_vector(C_WR_PNTR_WIDTH_WDCH-1 DOWNTO 0) := (OTHERS => '0');
axi_w_prog_empty_thresh => "0000000000", --(others => '0'), -- : IN std_logic_vector(C_WR_PNTR_WIDTH_WDCH-1 DOWNTO 0) := (OTHERS => '0');
axi_w_data_count => AXI_W_DATA_COUNT, -- : OUT std_logic_vector(C_WR_PNTR_WIDTH_WDCH DOWNTO 0);
axi_w_wr_data_count => AXI_W_WR_DATA_COUNT, -- : OUT std_logic_vector(C_WR_PNTR_WIDTH_WDCH DOWNTO 0);
axi_w_rd_data_count => AXI_W_RD_DATA_COUNT, -- : OUT std_logic_vector(C_WR_PNTR_WIDTH_WDCH DOWNTO 0);
axi_w_sbiterr => AXI_W_SBITERR, -- : OUT std_logic;
axi_w_dbiterr => AXI_W_DBITERR, -- : OUT std_logic;
axi_w_overflow => AXI_W_OVERFLOW, -- : OUT std_logic;
axi_w_underflow => AXI_W_UNDERFLOW, -- : OUT std_logic;
axi_w_prog_full => AXI_W_PROG_FULL, -- : OUT STD_LOGIC := '0';
axi_w_prog_empty => AXI_W_PROG_EMPTY, -- : OUT STD_LOGIC := '1';
-- AXI Full/Lite Write Response Channel Signals
axi_b_injectsbiterr => '0', -- : IN std_logic := '0';
axi_b_injectdbiterr => '0', -- : IN std_logic := '0';
axi_b_prog_full_thresh => "0000", --(others => '0'), -- : IN std_logic_vector(C_WR_PNTR_WIDTH_WRCH-1 DOWNTO 0) := (OTHERS => '0');
axi_b_prog_empty_thresh => "0000", --(others => '0'), -- : IN std_logic_vector(C_WR_PNTR_WIDTH_WRCH-1 DOWNTO 0) := (OTHERS => '0');
axi_b_data_count => AXI_B_DATA_COUNT, -- : OUT std_logic_vector(C_WR_PNTR_WIDTH_WRCH DOWNTO 0);
axi_b_wr_data_count => AXI_B_WR_DATA_COUNT, -- : OUT std_logic_vector(C_WR_PNTR_WIDTH_WRCH DOWNTO 0);
axi_b_rd_data_count => AXI_B_RD_DATA_COUNT, -- : OUT std_logic_vector(C_WR_PNTR_WIDTH_WRCH DOWNTO 0);
axi_b_sbiterr => AXI_B_SBITERR, -- : OUT std_logic;
axi_b_dbiterr => AXI_B_DBITERR, -- : OUT std_logic;
axi_b_overflow => AXI_B_OVERFLOW, -- : OUT std_logic;
axi_b_underflow => AXI_B_UNDERFLOW, -- : OUT std_logic;
axi_b_prog_full => AXI_B_PROG_FULL, -- : OUT STD_LOGIC := '0';
axi_b_prog_empty => AXI_B_PROG_EMPTY, -- : OUT STD_LOGIC := '1';
-- AXI Full/Lite Read Address Channel Signals
axi_ar_injectsbiterr => '0', -- : IN std_logic := '0';
axi_ar_injectdbiterr => '0', -- : IN std_logic := '0';
axi_ar_prog_full_thresh => "0000", --(others => '0'), -- : IN std_logic_vector(C_WR_PNTR_WIDTH_RACH-1 DOWNTO 0) := (OTHERS => '0');
axi_ar_prog_empty_thresh => "0000", --(others => '0'), -- : IN std_logic_vector(C_WR_PNTR_WIDTH_RACH-1 DOWNTO 0) := (OTHERS => '0');
axi_ar_data_count => AXI_AR_DATA_COUNT, -- : OUT std_logic_vector(C_WR_PNTR_WIDTH_RACH DOWNTO 0);
axi_ar_wr_data_count => AXI_AR_WR_DATA_COUNT, -- : OUT std_logic_vector(C_WR_PNTR_WIDTH_RACH DOWNTO 0);
axi_ar_rd_data_count => AXI_AR_RD_DATA_COUNT, -- : OUT std_logic_vector(C_WR_PNTR_WIDTH_RACH DOWNTO 0);
axi_ar_sbiterr => AXI_AR_SBITERR, -- : OUT std_logic;
axi_ar_dbiterr => AXI_AR_DBITERR, -- : OUT std_logic;
axi_ar_overflow => AXI_AR_OVERFLOW, -- : OUT std_logic;
axi_ar_underflow => AXI_AR_UNDERFLOW, -- : OUT std_logic;
axi_ar_prog_full => AXI_AR_PROG_FULL, -- : OUT STD_LOGIC := '0';
axi_ar_prog_empty => AXI_AR_PROG_EMPTY, -- : OUT STD_LOGIC := '1';
-- AXI Full/Lite Read Data Channel Signals
axi_r_injectsbiterr => '0', -- : IN std_logic := '0';
axi_r_injectdbiterr => '0', -- : IN std_logic := '0';
axi_r_prog_full_thresh => "0000000000", --(others => '0'), -- : IN std_logic_vector(C_WR_PNTR_WIDTH_RDCH-1 DOWNTO 0) := (OTHERS => '0');
axi_r_prog_empty_thresh => "0000000000", --(others => '0'), -- : IN std_logic_vector(C_WR_PNTR_WIDTH_RDCH-1 DOWNTO 0) := (OTHERS => '0');
axi_r_data_count => AXI_R_DATA_COUNT, -- : OUT std_logic_vector(C_WR_PNTR_WIDTH_RDCH DOWNTO 0);
axi_r_wr_data_count => AXI_R_WR_DATA_COUNT, -- : OUT std_logic_vector(C_WR_PNTR_WIDTH_RDCH DOWNTO 0);
axi_r_rd_data_count => AXI_R_RD_DATA_COUNT, -- : OUT std_logic_vector(C_WR_PNTR_WIDTH_RDCH DOWNTO 0);
axi_r_sbiterr => AXI_R_SBITERR, -- : OUT std_logic;
axi_r_dbiterr => AXI_R_DBITERR, -- : OUT std_logic;
axi_r_overflow => AXI_R_OVERFLOW, -- : OUT std_logic;
axi_r_underflow => AXI_R_UNDERFLOW, -- : OUT std_logic;
axi_r_prog_full => AXI_R_PROG_FULL, -- : OUT STD_LOGIC := '0';
axi_r_prog_empty => AXI_R_PROG_EMPTY, -- : OUT STD_LOGIC := '1';
-- AXI Streaming FIFO Related Signals
axis_injectsbiterr => '0', -- : IN std_logic := '0';
axis_injectdbiterr => '0', -- : IN std_logic := '0';
axis_prog_full_thresh => "0000000000", --(others => '0'), -- : IN std_logic_vector(C_WR_PNTR_WIDTH_AXIS-1 DOWNTO 0) := (OTHERS => '0');
axis_prog_empty_thresh => "0000000000", --(others => '0'), -- : IN std_logic_vector(C_WR_PNTR_WIDTH_AXIS-1 DOWNTO 0) := (OTHERS => '0');
axis_data_count => AXIS_DATA_COUNT, -- : OUT std_logic_vector(C_WR_PNTR_WIDTH_AXIS DOWNTO 0);
axis_wr_data_count => AXIS_WR_DATA_COUNT, -- : OUT std_logic_vector(C_WR_PNTR_WIDTH_AXIS DOWNTO 0);
axis_rd_data_count => AXIS_RD_DATA_COUNT, -- : OUT std_logic_vector(C_WR_PNTR_WIDTH_AXIS DOWNTO 0);
axis_sbiterr => AXIS_SBITERR, -- : OUT std_logic;
axis_dbiterr => AXIS_DBITERR, -- : OUT std_logic;
axis_overflow => AXIS_OVERFLOW, -- : OUT std_logic;
axis_underflow => AXIS_UNDERFLOW, -- : OUT std_logic
axis_prog_full => AXIS_PROG_FULL, -- : OUT STD_LOGIC := '0';
axis_prog_empty => AXIS_PROG_EMPTY -- : OUT STD_LOGIC := '1';
);
end generate FAMILY_SUPPORTED;
end implementation;
| apache-2.0 | 4fc092904fb4a0038e50b53f1cbc53b3 | 0.422124 | 3.88185 | false | false | false | false |
mkotormus/G3_OrchestraConductorDemo | src/ov7670_marker_tracker_use/ov7670_marker_tracker_use.srcs/sources_1/ipshared/xilinx.com/microblaze_v9_3/7b6e2d75/hdl/vhdl/stack_protection.vhd | 1 | 15,814 | `protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2014"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
bftUYz/ivZwRKHjNRH7kkXvh+fjWYfki6YLqsAb7cm5RYoxFBK99SvnX1vTo6Jj8x4ilV9GTbgQc
+XyX4KRcfg==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
biM8blG9r9dCNtJXz9Tz8RRSAcK8xhkXuhy/HcHrgLADVErYuvGjEZngExoMdfSTPECGP6BIJeDo
paFjQYUEAV+Y0UDn+VOS6eSLZaJskXcjcXPqVQMrBYzBFy9aARohuL+cbiwNjBy6yV4TXZHTPLnW
Rq+N4dJ3ltw2ldDPjwk=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2014_03", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
n/LIdf4SQqHyjXjXmZoyEJdkDwomos228O2OmjJlTvJET0+c2FL3jqwIYwlL1JV2PCyIhK011LDD
dJaHetVg0cej7SGocO+eB27v5kZbKu0t72lc2NirX8Fm3VnEsw+ukjvOQdFqca9DTd0NLWyE6G2j
btWopzvOiNbMvEZYbCd2oApXcCfyH4BTO7dLwQxCRGgRnmxjfKndbuzI85zOnjOe5C6F6hTWeOzF
b8izeHnoySZ7JE4uoTUfKqfw4204PsmuSlKNfj76DDMV6vsxdamDmxwTN1lhrzblXIViWcUSXyXW
Ho3ePALY2OybKEtZBu2HgqztD7lY1FSP9qhZ8A==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
QG65+ZhI2Dqy8fg9i3oZaFPsuNgH4p35Ij36mifNdj7rIEA1T1mpUdG7wxgLaUZE4NmhQC8LBdKj
NpV/8H6veLkQuJJdqeEK0j/hobsuESGmlEqSe3MOCKX1DPI1ZU+5sp8ht3fMqngmVRcIMhlPk6NZ
i9mrekuwqN3AqZjYKi4=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
bPMoNtnlXSeDoisscH1EG1S302cyTozdB7J9B0mWqwmBH+HSSKXtW0oABBWLZY61LTnxFx+yPVKY
GxuhT/ot16rTDeM7x21n/zxLvszVCmoZGwewdiBaJZD4iUOT4ZvQIN5lsy3xd4FejhhEX+srCJcq
U3xm9FWVWqgrw3uGAo08GpR+DXiLfsz6rksR/QaqtPnEqOGbqLpRL/ABFd7U0fdyr3Vi++gCFIH+
7gL05AnPxXx0EOwNEvtG56c2/E33A9UsHYH2Qc0Yz2tICsf2A7dfgwCi0I/02K5LeyUjuLTlIecu
R3wAiHnUX9StY59iP+FRBdzxRqfUmm64zyfy5g==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 9968)
`protect data_block
Pq6a4u3wSmBkFVmnWkLU4BNz2FzQK45Ej0Ya7fnaNPvKCBKzmXlI1p0tGz9r8SrSHO9nx7iuUEFq
79W+l0cu9e0UNLhw57rsoHpBTYSsDv7424TZhbleUq6mDuB8ce+87KClpjAIRf7m7gFNoDoDywKf
SyWt3snjGi42eynNObrwmRetDHM6RwzIj8hZcvK1IhJzGYkqjF5hLICij1EhiRA1kndNRVFApnLs
txpuBQPZUgZ9H7V93vwAmp1U6ImYJ/errJ134MQQKp7XDmthwMtN9WdE6rN/P7e180SfhDtKXfln
c7F/9UPbFX8qTWRs5RpqdG+r2GkGFZX4egbhaiZXSq3RVIy8Nr/97uguCEe6I1XmMdOjsLPnPXHv
fhgN6r5PeAJ02UsGxkxckCzx/RlbCemndqLTWwNph7VTsumFl90t6WTVQ0FgGqgXRNeXNPVKZkxo
pBpHqcv04HJNPCg/VO3fr6O4/Wz06qLAdFkLBIrgexx5xfyiUqmEZS1afZB9WL0X30x56TFbw7Bq
OshyzdEwKvOgq9924W375+NA9m4j7MWXbsW/XKnjSTufhxbmBzpI2POv05A8sYoWRWhSjoBsjRET
diH5f3a7KLHIZW1z0TQ9/zYyCC7UhIV3M0qFfaznKy85ouJQ76nxB71ZppWDDRcBnpnQUH/ZcxM1
xHOvF2PjirrGPu9BTQJr0GmC3zlD2B2yYqiIBfyVXHOoQEsU4TR09EA9i2T2VqeFoNL6WNfPUIT+
e+FTwvlHZzyMJAzOSLFh+RE1fSBKNp95XSQxBimtT7p2KbffkBtYx+WSDxVuuEd/UWMjBquSe3gW
ere5rLH7RS3nag6WbDOMEoZ0XuAZ3qpzztDy6Uir1U8dwiwtTkvTVoph/Xiwn9uKeMIG+vVQ4Zqc
m5/xxtRl0wfdvIO1MxgMTBu6HJltrrOwQ0eN7T738+1Nib4VNOH0H9T3csg0Pk/BVrlrhZ43m6sK
p2yGXQ8FDowOpNc3v2u4nfK7uFv/V2oG4dJBdIvAEyrcfQslFC+/mQQKOJpq6XHkBDSgF58x8tHj
A4XOvzZizD+qqrai752KjJfWOBiklX1DkKEuXjzaBw8xuIxpffBdGUb6qlLWTCeUExftEPUjiYpQ
L/L6RZU66HJVRhnox5IXtSfUA/LyQjrWbqqfi9Q3zvbew74l8irS3qx0kPctxvjDjO7kI0ifYw1y
ed5dNPXzva4EEwqgw2pSz5S1Tng2fuTRew/pzeDsPzkOlFVGkuyMVevsRS8rBDKv0eKwtqa/um6+
80dN73xGOxOj5mfbMeaNCUWMVUgFL+SFTjw//miryf3dDAWVSKmC1jy42Qg0pShEi5XkPWlijBfN
NOAb58OEkIHn/TEW33akALwXxN87PZ5ErQgXiFLJlxxC2cI17JkLbNPWIw8m8CE37KKskmbI/UGu
I6ip/RpKGvXsXugl2h9hXP2myIgN8MOkyI0e7OT2+jU4txsZvHD0fVuElbAMukeh+J11hLEspJwC
XfTgDo+uPfKvsjVmIi/UpUjmH+0lyiQ7A3lQnwoPoMFLNYkrm3xRcrPTR4JouVXmVTPY5RkrhAer
iB8VDCsSVK2DsTqUx64KNkQh6WsfMVbR7sMPYDXq6tUrcDKdZq/bkXTQ/ZeFTuqgGMcsQdSjTD3X
5sr5dWBgxWDIAL4g9iwqkEZPXOamXPQRszUAewqdx5958+5of9z3o7eCzqxhIx57lmJx3szA96Iw
88Ab5zNDmwv1QY4VbHqziY+tDBxujnVU0tOhGcNY0rOJ05g2BzFmulfCY97jzAFbISnvWAunJG2H
4lSk9WTWPYP+wX28+sQuuqXLNC2HSrvl/hPWyJfUmAO1+kG59tMvsDwPK+4QT7gQ+jZwBETqCg3d
POUhePDbUqeCUMIle9tOQi/2nSP6tMFDv3vjiBlFUC1Zftg1TWczeWcLdZelheX0C3XUD5cd8/V+
tHJ+9DrkIaHoTQWHwZnH6IvBBNZ/PqSbfmPhItShBK+5LLHu6TJ+Ak+4eJifYuMxjiNSpWVrf67x
QjpqKdEBmJYr3uGF4t1A9TXhIwmBBJtDCynP4C+caWWhW9r7+iU5BCx1aBU6aPzlqkKNyzK+NuUV
VL1ELFFEFbce6JBXfDU8ubGZikbkksh54UA948+VowSX88aVCgIncRqsWY2O0p/czI2dMe1nCX+U
uizPKq9L2WkWgfI5HjlnmD02Jz6VbYjdFfT/7z/0wmDv4pumCoG8gwzm0k1/eNbNk/V+tDzaZPkn
mGNyi4hzkjn9s6Pm9vLYCEAGX4MlNWFP1l8tJ3UQCgpoqewNWAgrQEKrvwesdBuNKv6/fXJS9xSH
Iuf7cCT5IigXWkqDaHZ++NKbqirX8+0Iq87roS4NQUUJj7KxBbhdsdx04Ycvg3lI74jRzjS3CQRj
412XJ5k35uNFAaZQexf1hIud4aRG3dgoQxg4U6Iy6XHFtRDqoiU+bdTz/uvQ9mgnTghcQ2CCeKGT
Lplh4QbEXtxXvsgjDFWLhK/lPFCDdMZF/VJqVmmWCeC6fb/LTL3n0InGgV5u9bzmKy3am/8U+1lv
JteImdZ4bBR7mgZyps003ibQQ56MHir+doifphdYgE+xzXPQbSXm4CT4t/vnNAiPR2VskIMRxPFD
pg/ul73j4lV5E4Ga1xpLdHVYDIjWNEFo5SrVOFEImW+6B9EeqPwcb0Vnh2H1Go5Set20GOdrbYy1
apxVvAQDvxiLZk0XWCURFecKZgZPrfVNGd3+UqvCZuSFiLXVf98k/AKJ25/Lx4oHgvgL6Kk6l6kt
5auRUnCRqXmGLKDwYuVLfdld0jA8uHy2sZmuN+p6zgrNRTC5YFoevU5aLYN7++tC6C46yh89lrq7
HMauUwTIcxwmN5ASMMoIvpy5RSdJ4p9ouN+G/V4/wUNKiaW0OPw8dogNDsOU+XawNXfvQYIBGMgo
8a3BUee3MmDKgaaW5IbS+LTNNXfQwJiEOOOfAsrtv7rB26CqrTLfDp7ZXtJxuObnFkyos+GH6qiC
MWiNZgak+ELPLFT8IKMijoUBb45cwYstHTrmLJ+dokuOh3CGVKsR4h42DbZG0rtDhs1GG68/zit7
dQ1N4pGMKf/JsAdFH80ggJniVzTogiD8fsH2GZy3CruHuv5Q/ZI7vM1NT6KEXSDfympk1u+fyu7h
3CoL4hWkm0qrk3Hyy5XHU/Cgsgoc9Rt2ykwkZokdsG6cjknpVV6WDTyWvttFw9CIqAM2lgTR7PKz
EaWbTdcWub2lztc1G22qUrCQq8XcgxnBlgqKADwTp8lTJFUm4qC3JOv5nLofVJLzjKF2orUJxXsL
Si7R2njXFQVWT6D43HOHnPRoxiFaHV7Jv7wF1je9vWuDSVzDt6jEc74qjTnnb4WhRDfDjy94Nz8V
BI5UOlFahgHGshWklwQbBRBxxiuF8CY36hBgt1sY0tXCW28i7hpkNQuj02dWQTCdE7A0tfn/Z6r1
xuZYX/MUcI0pUo5C3lULbOstPPglcpMkDdX9plY4FCFZ+QRQ+szgSUmMKqoJ/beiciY9LJ8Sd+vh
5H31JEGiIlt9Zp/DjeOBqHbRSy25ObCCUzDEA3ZPW55pakgXJTCaxfyEdV98qwz8YvWXCXbzHPn8
az1qJM1w55S6Xa+GoYHRAVqgLk0R60bW9pi5ds0wbst7uvFNjqP+91OryCjmgEPtKe73kQlGPTVQ
xgzW/sxYPvT9Wu55ZuW6aD1tKRCq7qluZ0ET36FCj4EeWqDi2oHfDFEEytxEzh8RL24zq8TNPQ8d
+vH4+e4LFB+a4bPuUmK57nd9zsAhBt0uW5pnrjwsoHKnwX+HzgRmR69AVRa5UAFnl7IuX7o618z0
whixqwy5OzamjQG0lEX8Mjk9Rg1smopipUlndgu4vrg70dffWUGoVNDPkp8hQAVLeqari9D7fiii
CdKE3ZYdbWpp0qZpOXZdjqq1c6GjvJC4CCut/AxdWPjwtOx4VKw21TB91omX/eHLQ0RJ96aZ7t9Q
ER30lQ1QhmDusKskvXlg4HAZ8Y0bxIUBRLlrLTYKdoTHCtPnBZZfbKYTIxvYer4SSU4KbJ13DJx4
WjZeRb5g/RcQgDNnMotOLO+fk+NJmOQgrnJAFJ/6Jk3rbgmQNYTCqaKfnAL3WgXzTwJQseFvwqAo
RyKReQRBmBvJjyfOmfcUe9AlYz5X0ME3bextXVhRGWTwCHy2AKKPMj0eWMnE11BaCuFW618kPRsm
2yaznN+ki6atpU+98TedRUP8ESFwnJvaVTYSf0ecwW0yxfh0L9Y9c0AyYgo7Wx9QwecG/ljuFygc
ohP5n63kYGcZBQmeVRMyLS4lBHlj48FTXABmRJi3WqjEPs6LbqKJZjm1ZfSKRRn6EZ+Lbg4JbVRg
BhmHPHs0L7ISeSaBZ/ai1eY1HGpB+k1WncESnoKqZ4KnyfwNn9eijj3bbshXmcAGhmyGdBTRg/WJ
eN7peD0rVD4mfjY0AuOzTW1IWt92GbxVUslMYAkF/1jr7BvetjQqqrkI0vNKyq4Ew6zuWBCR5rjT
FnlsfH2YED4nEi/UsdKwkMSaTM+mvWeIqLVG6mPGa8HyoGhTYTPtHTO5ZIhI8W8MdEbB0Y9m96aF
zpy2Bgtm13zwKrEayl1G6/2N+1kP7eotZsHtYMk3R3WG0bj8/n5M+EfyC9uJ+zafi3F4J5k0lQUW
U1upPiXXBvu7/DqaO1KNqUWlO1Uk0of8WVtlqlQt+Ggwo3qXmuGRdzpGCJXIN9d3OY8IIfAJ4V+d
6CQj7hI/cloOyC5eNcAB1cYc9ywswV3+1XknI8bGI7laLid8Pt+0wluOiF3pWNoCvSI41Oqfit9/
VTz38zE++nfgmZo4g2rlxQJ3zxgm987Q8bC8K8EHGzpKGUIHx45pZciAcCywUT5Pi41ckDBoLucK
sT2bUDGM+6h08VHYtvyspbVE9FbRZLqPhKlvgmAz5AZIw7Kv5NaFt7S2e42zXuSevO/nfRWeyVzX
hEsjjufidOrgEU56wVjIcTOzpIlieY//esauSE+HqB6pbE+3WX2vnFmdt0PR5KQU0l6VthTH3Azx
URMxNSvX3Lds+UBc0Qie/jeiblPWJIH5ASsl48vw2AWO76+bwGgGxmh97AoORyTmoVYUiyWmk90L
bDy5+U9FwCCTKarKGNTRJAfvhxzE9JInLf3HPdO4kaWYD+qHtsGBVUPdwphWJURyczZo8roUd9aM
/KfECxOMHbTKJyz1JTCSb8HtrqVYvwVRmgB80+Q/qpiuZas2NG8RTKnLl5wXhZx35HykVIsnIwXn
Fi62JoT074VupvlgTI827tMtL3BapmwgWnlxfSV2GzW1d+xlBb1suuea5/nH6jPc4EAMC/9BzuQS
DKTgoEm8xCa3sMS3IclZ1BQ9XiuHh3x1nsZ+4cDqEEHzu7Pf278CX8412WgjZLOCaPvMcgevVqH8
LuTdDWN8a84gDoqfbPvlANc9VSrelJVenAVqtgy4LqRs2+pX1rhKrg5YmVifz4Li85ImwUNJTdKP
xp6mNhv0OmQa/v2/8K34JXudj1pbm1AATWo/BgN3ZsV9Rd+YZYje607kheWyG5wFO2V/pHv3+0y4
oLl1EpJLe9YqX+ik/o2rYONo6cN2f00vAYpW8oMzwQZQLfne2bZ1KBwRGdqO2/nbdeFnjE1Q71wX
jQbEeFNj3hl9D3J/CMq0AHlT4KO8y/7CUN+roM8YWRHXpk/ZCBVktj0a/4SpA4IJDVMmP3Fv7LXm
8FtS3fhjIinsRqzpZDWb9j664abYaVTfUarOMpH5KLOoB4HYsGsiGK7CXqJMJm6SA/YENhpbtTt/
lnPg0t450EIKl+irxDxofDp2Plq37sEyqmOVch2FHGTCERv6r4aCCKvUjY8UGHknGWSMqm0jd6LS
K4eIEqygHn5z/uGzuLDCxWG0j5GEgC0YgV4qjMOfwxW8sE2qORzuDBRlHCAnB5hLTGxbZq98B6Xc
BazJ/bHI0Co2OZG4kLQFSYK2diuBKrJgJ1GufgPjqJ0twNay1JsMVbt9uhupqy8dvPrYaI8ufap1
HBPDTbLORk4x+RYWrSx9dus9NNo4s8dR2FMVyhsEm8PMGJGyk8Upa1FCw6qrpRFNperdlm65WZ+g
G1AfHp12KEGE1D3dEJmG8eHi8LYwCAS2HB2YIneYOzN4XUQfLhyeDq8NRpksg8KEWYC2yK591UPS
rGsoCfAaPv0vSr5fjcC6gsgNfWKfJ2WKO4RGqU/xjaDZXXoWITKlq311PqqmAYkkgOU+Ys8xgEHt
ZsAi/fOVweWFdxoBmW9Jr/EYWqZDJJXo5TnPYZQbnRmztJUV5OiEkaYti4NI+ujUEAmA9+rFSmcD
WQ1q/YBTntaFKUIDKFXoyU5xZFxC6anqHWPCEs0HCt74R1TQ/T49NMXXtGsEugOjPEv29IvQv6uS
PhBIWI5pz806FqW945P1y0GNBzGGkD2vS2O/dPgr8QEQYtMrc6zJVg5MDxL1HlVwTE9vl7/YwpZk
Q/uWG/B7eT/unR8BeOfzNleoa9m2tkOa57FuGzeDtcuVhV3DGEZ7zk/cjlAgJj4oWKoOcVoP02mQ
FodXonILrcmrXh+udcotwbbEHptLbcvQnuHaBsYoa1mGXXaIsdW+3BSKowx74aD/sddqOKOUdTb7
X7eKnnsayW/zzZWgwEBVHUlhmS2Z0VaoxpE9wpMaXH5YCQ9tPX0IBzFG6O2XJnY1Kg01S3l6buME
laJ0xO6pm/kasjWOfmLv0ohcxcfoI36b/zY4YGz99XZ/8gyl5WjewYSV1JsYXC5Vj9qlXRaEOLpl
Mjc+k7zIqHwXZogDzbQHR8hkLCD9dNdAImREYPDgv7M22ZhSfO428MHrBrFzu6nwmhmWzvHflxtL
4PF+YH0KY6/pxzaAMF4CMssMujmV/1AkdiXmvyKAzfeXAQL6UfMmSXUkna9cjV7+opFXe07+bbJX
xy9DayPuBTjDNmMEwxHIv796yW8n3wGHMgvQ00V59HToDIfdErqOMGY8TOstQbePn3XnGWDkfMfI
rZvXKuxZ9PxdHownksPPpUls1WIEkGvY2M0jrBVuI0U6EEsWMFHMDzXsYr0CqaDkmfNxN6G1E0oE
GXS/imsNHtL+R68Ehg5XiLBS9D6qvdsznqPf9Ls1ixT0p+7cmYMFjVzFqrsBhYt1fWNrLVpCprbt
V8aBYxaOurNXPSAQGv8yWygv8LEr3j4ltIFuS/CTnLhgNDObF97d++Sl2wy1nECXXFWqrc5ZRJjI
ksgJ/rYARRoanwIarlgMxo5uJQkPWj5nLBIZVjPZmIFdWAJdWOtkMnm+Iksn5icFf7vgZtc4/tuX
u3szj661sCTb68fa4eqEdZ+ZjDIX5KdKEFxzckp3wzZu/OJThNXlYe0rKr4LDBlALlwc+TXRX2My
vV5YIl1cGSUlm97H1js37r2Hy3B9F2Wk/eZ6bQFXPPJitUElL27PdjF11zQBCG046xjhgNsUuCru
7PT1dBYbcOeXbT1fwwg2IZ4nGrMi4VGrokFgEdcct5tNVMJb1CLbkuSk4GHsBNHp7HahNjuwXGqS
HORY3fjOZGVwK5S/LhM9SEwwnBlUiNVQzvBiZeCmlfThZvd7OwcWoujwupcUzCrTvqSVyzMV/MSj
9jn+a/1uWxeBWx1VrAb5tQwLEr/wKaaB4ufa/BMjKDyQnLUrs0XBczVves4hMRq9zsgA1Vi1LbGF
i5UXFeA/Yw93dempc7c1EjYncN6eahaz4zqqq1mkEAVrEpC6CGI8JmB1POSnoKnc36EzsrUz8GvL
Y3YTaw1cqXBArdNVOjhntoQ6oWOM/ElboixD7uIrHwhM9uT69ux38P1y5IuBBxOeWEFZbz88Y49h
K09oSQ7lmAXR6IEueeKgTvgHGJbukUKbxu0l+bGt97t1PS/O7bxHvLQhPspQgJPE0HTcg9Olv1xf
RdvNzw/TLujG6ua8lDfUB8wMXXTfejS1NDE/8+h/6qwWIku1k1l3GZslHqNZ1EI6lonkAraqeGby
51hmdeG/gQ2yqwr27hXhajiIEKnwhT6aVoboI0rq/C5d690lZ1rlteUZpMJCC++mmveP8Kx5JP8q
l9UqGjnuCUQH/IjTMFwIZQJML725SHFNu/aeG9tSK1M+oPmoij9GUi59XoAfOTOhSTLY8/Lz1Oy7
ou9VGNEBzgDCLdhV/Fs84fxqAUdpWypDsnpvuQ3gNiWxCRiH5Lmoohn/Gfi8wGjiad36op2vTGRQ
XChEinQGk5ZGAlTaIlW+ujcQfyiIMHfmsKiaTWyKxpKno+LGgCGY1M3oIp3Ts2EchI9Fnma5Hd/e
wrNSayRAwOW2fjM1IxBGgW1f99eVdoP0myClFZxkaTAsyX123XXVVuUG2nMtP7V9pEGaJagy2kQI
vsiBmPRTLe0dLsPmatW1bmAsykFDfoh62SwpJZNGsjHjTogm+xwiH+k7OwcVAidbbtGD6IzftH1X
B00AwSnzqL4lEI//+LWD3xM2THR4grbg9kaB8lGFGHUUZCJav6fJHFevjW+qZxAA3PB9KjIdJPi6
F2L+8Yi9bZ91P/dHUynmmTPS4W2+V4KyPWOP27yd0BLaPuQWXOR7FmtyOOuJqCsExEpp5fKzqK55
4sVSpszMEcky1gmrlJiYXdp01fXlQMwVexhD++4qeiiffSsKSFU4C0QzQm+x7W3PHSQh76YOXZBe
UEBsT9fJTL43eKnDqS+Y3tCsKFtSWch+uHanf4kcJ0ZWH6g6E6mJdA4KtNrRvh8/1bbHd5i5Vpk1
PgwcvVFBrINU38b2Xarc9bimkK+IkqBjzhrJ1SWu56aXHeVOyCz4D+FjC2OunH/yST+l3pUVdjlq
qlyyC9v5t+/2tZ3FgVon33yo8E/1sJpGT4i07dmSKb+YeON+M4wm1RszYRhNzGCLoffOJr33e1In
m9kkN7urXXDDBj1BffZY0tI8p8b+zqV0mF/tvSsH2JxAHiCXYIHV803YK+/cuoQ/ySLMQ1DRoNg7
FbxecVV20P8KSev7BUP5i4UsOVBxP/iXbBzdsAUbee1intIMEJik4bEOsMjipgYUJnUShBxo2HtV
PL9X2tMySgTimcMzPHoszupun11CFu36JOl/XPgeCxOhtZJ1ZV4JdTPFWSpiJpHsQpNHKVJY6SyF
14386ePlLv87hISnpoyGAxkdm7Oiroc83w3Iq9voG46Gklh7G+aLlM9ZekiltWH0RjEgSIyRwML/
OrRq5xvCD861q1WGD7rbJ2uP12eR5DK/5zmSNAiBtq+7o/nie8n8PkIDMEGJQljkjuoqmOZxJd+A
SDYAyv8R5ptjBYcCCCJieIc0Xa1yS1x7YyVRQyDuZtPwdZZ0achQmD7FXibBaRVC5kyGndtSxbUS
L5p+nuw+CSoQK26aFRq1l4nmopPL1Nz+/sZMUZ2SdtlrS3ZpXtnZ5IWydEcUoAjdbqk4MOBrLfKX
VLPQi/ti3Fs0vMY1PJfuWZNEyCtDLFSr2bE6S/WY8RTSb3ZEM+Ge4ymK14a/5CPb+gKU/2KTC3J0
V4BkGf2rXBIARm09rjWQ0cYb9j+VfFLvIXXL0kt7+in5MUlXmj2HtdEeLy0PrdpFFWqj4jY5mWVw
rQRAcDsMkFPKR/rVaFDmLCKwVNiJGlP/Y4s3V8tISpkx38JrD/nwXS59gCLk7vBNBAOfA0hKdV0h
h/dY9eg3LtxfwXNMNtNI7gEY3Gy86pErL0LDwfTiN0SCTg30GmLlSze5ngbf+B5B+QBgWS6a9haH
wbbfBL4H6ZFttju6dBj76JiDNnFHN/EtjUfGUBBYk0pDTNeS9/vAekEPBD4l3HWRPNf4a7leUgtn
dmCvjx/GvNJsoEgO/6nW1UdH0kawmCeKpwc4LyBOgiCOUNi71RxSAnWGrtGPdp9wc5o0PXObkbtt
ZQdT/tf3LadD3jq1Sxwp7D05nxM1suEShvkrorYUSmwkq6TqOmeKVqS3WCSA+D/RjS2JMBm3iVjw
EbpYTq7wsvQX/d9ssEH8bzbVwSU9QTiRaRUKg6f13Uk5pxUtaNTSRKBJ1BvgyP2/nzsfRA8MHZc8
hJ79/9qJVLkp6g64Zzd4eR0brvJK0Y/03YGK9WbHuqcQXkVF1IQHVoPy/uKqYfOu+bPCVhoLNgSo
4+Q45oFVr6+iPqwpsP8cVzLMvuyqU6lT3DE1fwbe4eBmRQoXzq9vXlnSBYxF68+X7q7InYqODTOp
XrHsOAYfHcuHauSHfGfXvDZ/OJ4IfhlJ3SIunlT3kb+PmJMoouTmfT7KUHFlG8KAMbw3QXhezeKU
0MHGcRD06Yt2gdgzkn1oE7PviQeRhJ8fjGC+sJbSuqwVQ/Eva74iI97nfBQzKKrua0yU0qFYERsY
vCSVBqnBpLV8PdqaYeXotF+vWRCkk4bcllY8Lzd6chnFhn+5rW0WVQVcslYaAqWyKg4uAhDCYzmu
u+fztBsIUb39lyzs2b5J83ZTxPoqQZTlXS4wJC8xs1Ic8BiBhdeKEi5q3NBBDC3Ccwy5kIiMgMEZ
fYGlnlARFYGNflnDdQJNk2K3ulxFqY1a1BGxjnAmf4XPf0PSpIhkwH091abe2feotKaZfFj3b/nS
f/Ac4uILe1JnJIoqJYFDNqIbxo+1NyMhPDTDeiGNec1iVfqJ/CWHx9Wz+CBqJKrhLiUXXno7lhrv
T5jn9SKnADuBLg19zgm20CT3czmoZxnw5mXjIVBu1/myI8Bv2/eAUS7MZ2/CUTMIoBn//iRb6la7
VlmAm2GLDHagpkgMNhcfXoJavXCIhFiGLUzCDcWXYHu8kBlcre4kxAMOPwLyoKTyWoHvwsSPhMHV
BCqJoNBP7530OnMPpbArRgnubgrL+nmwaCAOnCtmrxvlFEFcIxaH56jioihEQ71aw7vg/GfeHV5B
IXjwKlVF1DGAZ8mpq/CLK8vW1VglKbaRuSrkA6vUkMlbcw2CEsyosYMLiG+5+6CcsQtEqyMvqQ0R
mAWndqTM8xyRXML1L4E7PgAPXc0P+ySkZSKtUOBotXWMAUiaUa0m/rL8udTW5kRLV/VoyLYXdfn3
cjSHa5HCWvt9iFU4hk4VLEoL9WuvqudoLpBue5wd41ae2g0GZseXSzotNxFe0qSseYDX9IntkZ6/
B78lk/4w3hexYTMHgbMddLFs2L+1KKuLTB+9ZTNPGfNtm+jglM2h5sCqtvOl+ua+e+D/P1oDIm+D
7uNljkXySfCZiZ99MXFgDuFd6y77+XZH8mPpsw1CB76AF0yoMnx4r03JAzak983/P3Io7iGPXZUR
X1mMGeEvy/VAglV6RN8FyIqcppvLfOdj7b+50uWYySpnfC1sOaYqs5nnqxmtd2WdHDtpzePS/cq+
X85Hme6b/z7hEcg77UETr4TyuqIr65OKwXzj/Gfo6rWFpCpStqKj0cEg7/IWDYP6J5jBq+XGKraW
A0/bak4j2qun6+IdVezNu/CswBTPlPRKB+RoC9wRmBAoDs/H7k54ZTl5udI0D+4sshoEGe+LAHTZ
kGuslnJLJrv/e1fDEvCVwSJ0Jyv0Jm9EOkPF7L36EP5kLpoa0CEVxg3uko+8+m+BB0uQWAUbHuhK
YSUDNfzQde341dckvEYq5lkoLXBe086TffKLBrHUyg67vY61hvlKH+8nm3cFF/JnL82N6ILbV1EC
wuqdW+YA7wNvY96uUOWhP3y9ZROH+rogk4jRu7yi9lgIGyqdH/tgYyYhte7Qr5hRcJegV95CB8XZ
X5m0VsHqan/qdZd/YIk3x5cv9eW+bWA3+Q5niaV/VtLhP5dY7OltYobo87e7T8UEN3CMuzBZo41f
a4zcr3UI1Zsyw/cOLgxchSEoLujzr4gYbIE9ZSHvCMfDnwpdcgP/u9Zy94XA9MfDcA7hX80I6A3C
HTUUGc11levRcSVOhZgbZnDPawSU5J+6c56GaOtJ/5yZCRy0E4qcOqiarPzTEuFg6m1nedKXhGu3
L81122e3HDzJ4VLgwEdcBpJ1J4b365sP4LOpaZNM2MFhrU7ZSiqYMZtUtJUNZbWkape4g0a+6W2x
CJr928uhYrmSUVAMFUzMSwgE1tk0kPu4ysWABF/4EbXgalMhAjTzAYIU4Npsf2ZPpOCmqvCNx4wz
lZOmN6I6Gz4aeUYFCcCBo9vmslhEIcQW8sracV9pv0vtkHXdSIQXUGTygdmdwGbyDjFhNvS1q9H7
1sijtvCA+bnKYXIDbCzHwF7qfw8DSkdRHhY39V+Ze0WcEVqXhIFMHzUOikZ9GwjPRNVU332haVgs
j9TcjbP4tD+drqCL2RlIS64uPMVePcqp5vcASTYE3+K1ndu0oajHjEMFiuNuOj7b+KTj2L2JbNbC
KK4XXvon1SltMhruwWgsEIdFxVo7eYsC/BMQU5AZYpefC08HUePK+OuAzLADFfZt1RfqGDEm/yeM
qpUML8Mzngcn3QWxgn6sZYf/bRrBta3b3O3NewPpfAHBje1Y5CmVJUE6KWxhFIAeHWTZdcLFW3ME
5FAXdCclRp3H/rnnMGaD/LwwzHsse578Mo0xvbva2mG8dhZ/vUt3iq2NrEw3FSoQuO6xdsNE5yQx
mmQ15BrE/r1NqFgsB6DSujxvHpSY9aKb7RbpC7gwfAmimsUavNrlMutN9soYQxjgo4M37Elo6GvV
8jxxLcVOhO0qhlkd/faevsPUDp+rJrAHTL/eI032k5fyDOxN3s1RrF/v9GuSEff1de73uV8S1Opo
nUJggG8zysI2JY99CVQ+P8L8h/QnYU3Xu/AM4Fne34p9uK4j+yRhcyKML7c9cFfDYs49+KBjX+72
R3a7t11jxNAo1d++vNnA91oyz7v1ohG3yd1Z2x0xEGQOGua/QmR477/Cv2jIn71XjZxj9Rk+26kN
6uFTPuz8nCmtAxPSvi4fvN6ChJXrZZUU2Ajcwyd+lzI5An5qPrzpUShen21y8JpF3eBnYyO/HkiE
b29QNOHXzSku4eoVnlJHDga+qZ9q8yXkCBCWvGZ1qHDxjRsz+rAejZpjN3P4zDoP3W98bSfOF3jB
+cAqTgvmXlWiYGk+kYm0TdUtcikeBocmUNwkVqp7Uud5xp418duXV9TlyjCLd16PEvcdwo4jOPiH
ugEp3dx9b6ehhkiW9fSVl3OCh76SWwA15fSdyeuGoLKrfds91IdwKJtd63o0Ts+Cwb0+z+Ap+VRH
CgSMoH6ZlFzPdvVxnPeS5m4qR8rAi5Wa1NerGSMIQTVkDqSQ/9mtrvX8Zt5AI+8v2aw=
`protect end_protected
| apache-2.0 | 3553503bedb48a9d458d7040c19d6942 | 0.934868 | 1.870594 | false | false | false | false |
jc38x/X38-02FO16 | benchmarks/VHDL_Generado_desde_C++/inputs-30bits_outputs31bits/3-ARF/asap-alap-random/arf_random.vhd | 1 | 2,757 | -- IT Tijuana, NetList-FPGA-Optimizer 0.01 (printed on 2016-05-12.14:37:51)
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.all;
USE IEEE.NUMERIC_STD.all;
ENTITY arf_random_entity IS
PORT (
reset, clk: IN std_logic;
input1, input2, input3, input4, input5, input6, input7, input8: IN unsigned(0 TO 30);
output1, output2: OUT unsigned(0 TO 31));
END arf_random_entity;
ARCHITECTURE arf_random_description OF arf_random_entity IS
SIGNAL current_state : unsigned(0 TO 7) := "00000000";
SHARED VARIABLE register1: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register2: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register3: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register4: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register5: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register6: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register7: unsigned(0 TO 31) := "0000000000000000000000000000000";
BEGIN
moore_machine: PROCESS(clk, reset)
BEGIN
IF reset = '0' THEN
current_state <= "00000000";
ELSIF clk = '1' AND clk'event THEN
IF current_state < 4 THEN
current_state <= current_state + 1;
END IF;
END IF;
END PROCESS moore_machine;
operations: PROCESS(current_state)
BEGIN
CASE current_state IS
WHEN "00000001" =>
register1 := input1 * 1;
register2 := input2 * 2;
register3 := input3 * 3;
register4 := input4 * 4;
register5 := input5 * 5;
WHEN "00000010" =>
register1 := register4 + register1;
register4 := input6 * 6;
WHEN "00000011" =>
register2 := register4 + register2;
register4 := input7 * 7;
register6 := input8 * 8;
WHEN "00000100" =>
register5 := register6 + register5;
WHEN "00000101" =>
register5 := register5 + 10;
WHEN "00000110" =>
register6 := register5 * 12;
register2 := register2 + 14;
register5 := register5 * 16;
WHEN "00000111" =>
register7 := register2 * 18;
WHEN "00001000" =>
register5 := register7 + register5;
register3 := register3 + register4;
WHEN "00001001" =>
register4 := register5 * 20;
register5 := register5 * 22;
register2 := register2 * 24;
WHEN "00001010" =>
register2 := register2 + register6;
WHEN "00001011" =>
register6 := register2 * 26;
WHEN "00001100" =>
register4 := register6 + register4;
register2 := register2 * 28;
WHEN "00001101" =>
register2 := register2 + register5;
WHEN "00001110" =>
output1 <= register1 + register2;
output2 <= register3 + register4;
WHEN OTHERS =>
NULL;
END CASE;
END PROCESS operations;
END arf_random_description; | gpl-3.0 | 701d37f55490fe8ae1c3a0e19085e2ac | 0.677911 | 3.3663 | false | false | false | false |
jc38x/X38-02FO16 | benchmarks/VHDL_Generado_desde_C++/inputs-4bits_outputs5bits/3-ARF/metaheurísticas/arf_nsga2.vhd | 1 | 2,438 | -- IT Tijuana, NetList-FPGA-Optimizer 0.01 (printed on 2016-05-13.07:34:32)
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.all;
USE IEEE.NUMERIC_STD.all;
ENTITY arf_nsga2_entity IS
PORT (
reset, clk: IN std_logic;
input1, input2, input3, input4, input5, input6, input7, input8: IN unsigned(0 TO 3);
output1, output2: OUT unsigned(0 TO 4));
END arf_nsga2_entity;
ARCHITECTURE arf_nsga2_description OF arf_nsga2_entity IS
SIGNAL current_state : unsigned(0 TO 7) := "00000000";
SHARED VARIABLE register1: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register2: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register3: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register4: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register5: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register6: unsigned(0 TO 4) := "00000";
BEGIN
moore_machine: PROCESS(clk, reset)
BEGIN
IF reset = '0' THEN
current_state <= "00000000";
ELSIF clk = '1' AND clk'event THEN
IF current_state < 4 THEN
current_state <= current_state + 1;
END IF;
END IF;
END PROCESS moore_machine;
operations: PROCESS(current_state)
BEGIN
CASE current_state IS
WHEN "00000001" =>
register1 := input1 * 1;
register2 := input2 * 2;
WHEN "00000010" =>
register1 := register2 + register1;
register2 := input3 * 3;
register3 := input4 * 4;
WHEN "00000011" =>
register2 := register3 + register2;
register3 := input5 * 5;
register4 := input6 * 6;
WHEN "00000100" =>
register3 := register3 + register4;
register2 := register2 + 8;
register4 := input7 * 9;
register1 := register1 + 11;
register5 := input8 * 12;
WHEN "00000101" =>
register4 := register4 + register5;
register5 := register1 * 14;
register6 := register2 * 16;
WHEN "00000110" =>
register1 := register1 * 18;
register2 := register2 * 20;
register5 := register6 + register5;
WHEN "00000111" =>
register1 := register2 + register1;
WHEN "00001000" =>
register2 := register1 * 22;
register6 := register5 * 24;
WHEN "00001001" =>
register1 := register1 * 26;
register5 := register5 * 28;
register2 := register6 + register2;
WHEN "00001010" =>
register1 := register5 + register1;
output1 <= register3 + register2;
WHEN "00001011" =>
output2 <= register4 + register1;
WHEN OTHERS =>
NULL;
END CASE;
END PROCESS operations;
END arf_nsga2_description; | gpl-3.0 | d9e7306c800c25d008e4b59ae8fd85bc | 0.655045 | 3.082174 | false | false | false | false |
jc38x/X38-02FO16 | benchmarks/VHDL_Generado_desde_C++/inputs-30bits_outputs31bits/3-ARF/metaheurísticas/arf_ibea.vhd | 1 | 2,625 | -- IT Tijuana, NetList-FPGA-Optimizer 0.01 (printed on 2016-05-13.07:35:07)
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.all;
USE IEEE.NUMERIC_STD.all;
ENTITY arf_ibea_entity IS
PORT (
reset, clk: IN std_logic;
input1, input2, input3, input4, input5, input6, input7, input8: IN unsigned(0 TO 30);
output1, output2: OUT unsigned(0 TO 31));
END arf_ibea_entity;
ARCHITECTURE arf_ibea_description OF arf_ibea_entity IS
SIGNAL current_state : unsigned(0 TO 7) := "00000000";
SHARED VARIABLE register1: unsigned(0 TO 31) := "00000000000000000000000000000000";
SHARED VARIABLE register2: unsigned(0 TO 31) := "00000000000000000000000000000000";
SHARED VARIABLE register3: unsigned(0 TO 31) := "00000000000000000000000000000000";
SHARED VARIABLE register4: unsigned(0 TO 31) := "00000000000000000000000000000000";
SHARED VARIABLE register5: unsigned(0 TO 31) := "00000000000000000000000000000000";
SHARED VARIABLE register6: unsigned(0 TO 31) := "00000000000000000000000000000000";
BEGIN
moore_machine: PROCESS(clk, reset)
BEGIN
IF reset = '0' THEN
current_state <= "00000000";
ELSIF clk = '1' AND clk'event THEN
IF current_state < 4 THEN
current_state <= current_state + 1;
END IF;
END IF;
END PROCESS moore_machine;
operations: PROCESS(current_state)
BEGIN
CASE current_state IS
WHEN "00000001" =>
register1 := input1 * 1;
register2 := input2 * 2;
WHEN "00000010" =>
register3 := input3 * 3;
register1 := register2 + register1;
register2 := input4 * 4;
WHEN "00000011" =>
register2 := register3 + register2;
register3 := input5 * 5;
register4 := input6 * 6;
WHEN "00000100" =>
register3 := register4 + register3;
register4 := input7 * 7;
register5 := input8 * 8;
WHEN "00000101" =>
register4 := register5 + register4;
register2 := register2 + 10;
register3 := register3 + 12;
WHEN "00000110" =>
register5 := register2 * 14;
register6 := register3 * 16;
WHEN "00000111" =>
register5 := register6 + register5;
register2 := register2 * 18;
register3 := register3 * 20;
WHEN "00001000" =>
register6 := register5 * 22;
register2 := register3 + register2;
WHEN "00001001" =>
register3 := register2 * 24;
WHEN "00001010" =>
register3 := register6 + register3;
register5 := register5 * 26;
register2 := register2 * 28;
WHEN "00001011" =>
output1 <= register1 + register3;
register1 := register5 + register2;
WHEN "00001100" =>
output2 <= register4 + register1;
WHEN OTHERS =>
NULL;
END CASE;
END PROCESS operations;
END arf_ibea_description; | gpl-3.0 | dfc83febce914dc470a550a5b53d16fa | 0.67581 | 3.310214 | false | false | false | false |
freecores/twofish | vhdl/twofish_ecb_vk_testbench_192bits.vhd | 1 | 10,490 | -- Twofish_ecb_vk_testbench_192bits.vhd
-- Copyright (C) 2006 Spyros Ninos
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this library; see the file COPYING. If not, write to:
--
-- Free Software Foundation
-- 59 Temple Place - Suite 330
-- Boston, MA 02111-1307, USA.
--
-- description : this file is the testbench for the VARIABLE KEY KAT of the twofish cipher with 192 bit key
--
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_textio.all;
use ieee.std_logic_arith.all;
use std.textio.all;
entity vk_testbench192 is
end vk_testbench192;
architecture vk_encryption192_testbench_arch of vk_testbench192 is
component reg128
port (
in_reg128 : in std_logic_vector(127 downto 0);
out_reg128 : out std_logic_vector(127 downto 0);
enable_reg128, reset_reg128, clk_reg128 : in std_logic
);
end component;
component twofish_keysched192
port (
odd_in_tk192,
even_in_tk192 : in std_logic_vector(7 downto 0);
in_key_tk192 : in std_logic_vector(191 downto 0);
out_key_up_tk192,
out_key_down_tk192 : out std_logic_vector(31 downto 0)
);
end component;
component twofish_whit_keysched192
port (
in_key_twk192 : in std_logic_vector(191 downto 0);
out_K0_twk192,
out_K1_twk192,
out_K2_twk192,
out_K3_twk192,
out_K4_twk192,
out_K5_twk192,
out_K6_twk192,
out_K7_twk192 : out std_logic_vector(31 downto 0)
);
end component;
component twofish_encryption_round192
port (
in1_ter192,
in2_ter192,
in3_ter192,
in4_ter192,
in_Sfirst_ter192,
in_Ssecond_ter192,
in_Sthird_ter192,
in_key_up_ter192,
in_key_down_ter192 : in std_logic_vector(31 downto 0);
out1_ter192,
out2_ter192,
out3_ter192,
out4_ter192 : out std_logic_vector(31 downto 0)
);
end component;
component twofish_data_input
port (
in_tdi : in std_logic_vector(127 downto 0);
out_tdi : out std_logic_vector(127 downto 0)
);
end component;
component twofish_data_output
port (
in_tdo : in std_logic_vector(127 downto 0);
out_tdo : out std_logic_vector(127 downto 0)
);
end component;
component demux128
port ( in_demux128 : in std_logic_vector(127 downto 0);
out1_demux128, out2_demux128 : out std_logic_vector(127 downto 0);
selection_demux128 : in std_logic
);
end component;
component mux128
port ( in1_mux128, in2_mux128 : in std_logic_vector(127 downto 0);
selection_mux128 : in std_logic;
out_mux128 : out std_logic_vector(127 downto 0)
);
end component;
component twofish_S192
port (
in_key_ts192 : in std_logic_vector(191 downto 0);
out_Sfirst_ts192,
out_Ssecond_ts192,
out_Sthird_ts192 : out std_logic_vector(31 downto 0)
);
end component;
FILE input_file : text is in "twofish_ecb_vk_testvalues_192bits.txt";
FILE output_file : text is out "twofish_ecb_vk_192bits_results.txt";
-- we create the functions that transform a number to text
-- transforming a signle digit to a character
function digit_to_char(number : integer range 0 to 9) return character is
begin
case number is
when 0 => return '0';
when 1 => return '1';
when 2 => return '2';
when 3 => return '3';
when 4 => return '4';
when 5 => return '5';
when 6 => return '6';
when 7 => return '7';
when 8 => return '8';
when 9 => return '9';
end case;
end;
-- transforming multi-digit number to text
function to_text(int_number : integer range 1 to 193) return string is
variable our_text : string (1 to 3) := (others => ' ');
variable hundreds,
tens,
ones : integer range 0 to 9;
begin
ones := int_number mod 10;
tens := ((int_number mod 100) - ones) / 10;
hundreds := (int_number - (int_number mod 100)) / 100;
our_text(1) := digit_to_char(hundreds);
our_text(2) := digit_to_char(tens);
our_text(3) := digit_to_char(ones);
return our_text;
end;
signal odd_number,
even_number : std_logic_vector(7 downto 0);
signal input_data,
output_data,
to_encr_reg128,
from_tdi_to_xors,
to_output_whit_xors,
from_xors_to_tdo,
to_mux, to_demux,
from_input_whit_xors,
to_round,
to_input_mux : std_logic_vector(127 downto 0) ;
signal twofish_key : std_logic_vector(191 downto 0);
signal key_up,
key_down,
Sfirst,
Ssecond,
Sthird,
from_xor0,
from_xor1,
from_xor2,
from_xor3,
K0,K1,K2,K3,
K4,K5,K6,K7 : std_logic_vector(31 downto 0);
signal clk : std_logic := '0';
signal mux_selection : std_logic := '0';
signal demux_selection: std_logic := '0';
signal enable_encr_reg : std_logic := '0';
signal reset : std_logic := '0';
signal enable_round_reg : std_logic := '0';
-- begin the testbench arch description
begin
-- getting data to encrypt
data_input: twofish_data_input
port map (
in_tdi => input_data,
out_tdi => from_tdi_to_xors
);
-- producing whitening keys K0..7
the_whitening_step: twofish_whit_keysched192
port map (
in_key_twk192 => twofish_key,
out_K0_twk192 => K0,
out_K1_twk192 => K1,
out_K2_twk192 => K2,
out_K3_twk192 => K3,
out_K4_twk192 => K4,
out_K5_twk192 => K5,
out_K6_twk192 => K6,
out_K7_twk192 => K7
);
-- performing the input whitening XORs
from_xor0 <= K0 XOR from_tdi_to_xors(127 downto 96);
from_xor1 <= K1 XOR from_tdi_to_xors(95 downto 64);
from_xor2 <= K2 XOR from_tdi_to_xors(63 downto 32);
from_xor3 <= K3 XOR from_tdi_to_xors(31 downto 0);
from_input_whit_xors <= from_xor0 & from_xor1 & from_xor2 & from_xor3;
round_reg: reg128
port map ( in_reg128 => from_input_whit_xors,
out_reg128 => to_input_mux,
enable_reg128 => enable_round_reg,
reset_reg128 => reset,
clk_reg128 => clk );
input_mux: mux128
port map ( in1_mux128 => to_input_mux,
in2_mux128 => to_mux,
out_mux128 => to_round,
selection_mux128 => mux_selection
);
-- creating a round
the_keysched_of_the_round: twofish_keysched192
port map (
odd_in_tk192 => odd_number,
even_in_tk192 => even_number,
in_key_tk192 => twofish_key,
out_key_up_tk192 => key_up,
out_key_down_tk192 => key_down
);
producing_the_Skeys: twofish_S192
port map (
in_key_ts192 => twofish_key,
out_Sfirst_ts192 => Sfirst,
out_Ssecond_ts192 => Ssecond,
out_Sthird_ts192 => Sthird
);
the_encryption_circuit: twofish_encryption_round192
port map (
in1_ter192 => to_round(127 downto 96),
in2_ter192 => to_round(95 downto 64),
in3_ter192 => to_round(63 downto 32),
in4_ter192 => to_round(31 downto 0),
in_Sfirst_ter192 => Sfirst,
in_Ssecond_ter192 => Ssecond,
in_Sthird_ter192 => Sthird,
in_key_up_ter192 => key_up,
in_key_down_ter192 => key_down,
out1_ter192 => to_encr_reg128(127 downto 96),
out2_ter192 => to_encr_reg128(95 downto 64),
out3_ter192 => to_encr_reg128(63 downto 32),
out4_ter192 => to_encr_reg128(31 downto 0)
);
encr_reg: reg128
port map ( in_reg128 => to_encr_reg128,
out_reg128 => to_demux,
enable_reg128 => enable_encr_reg,
reset_reg128 => reset,
clk_reg128 => clk );
output_demux: demux128
port map ( in_demux128 => to_demux,
out1_demux128 => to_output_whit_xors,
out2_demux128 => to_mux,
selection_demux128 => demux_selection );
-- don't forget the last swap !!!
from_xors_to_tdo(127 downto 96) <= K4 XOR to_output_whit_xors(63 downto 32);
from_xors_to_tdo(95 downto 64) <= K5 XOR to_output_whit_xors(31 downto 0);
from_xors_to_tdo(63 downto 32) <= K6 XOR to_output_whit_xors(127 downto 96);
from_xors_to_tdo(31 downto 0) <= K7 XOR to_output_whit_xors(95 downto 64);
taking_the_output: twofish_data_output
port map (
in_tdo => from_xors_to_tdo,
out_tdo => output_data
);
-- we create the clock
clk <= not clk after 50 ns; -- period 100 ns
vk_proc: process
variable key_f, -- key input from file
ct_f : line; -- ciphertext from file
variable key_v : std_logic_vector(191 downto 0); -- key vector input
variable ct_v : std_logic_vector(127 downto 0); -- ciphertext vector
variable counter : integer range 1 to 193 := 1; -- counts the encryptions
variable round : integer range 1 to 16 := 1; -- holds the rounds of encryption
begin
-- plaintext stays fixed to zero
input_data <= (others => '0');
while not endfile(input_file) loop
readline(input_file, key_f);
readline(input_file,ct_f);
hread(key_f,key_v);
hread(ct_f,ct_v);
twofish_key <= key_v;
wait for 25 ns;
reset <= '1';
wait for 50 ns;
reset <= '0';
mux_selection <= '0';
demux_selection <= '1';
enable_encr_reg <= '0';
enable_round_reg <= '0';
wait for 50 ns;
enable_round_reg <= '1';
wait for 50 ns;
enable_round_reg <= '0';
-- the first round
even_number <= "00001000"; -- 8
odd_number <= "00001001"; -- 9
wait for 50 ns;
enable_encr_reg <= '1';
wait for 50 ns;
enable_encr_reg <= '0';
demux_selection <= '1';
mux_selection <= '1';
-- the rest 15 rounds
for round in 1 to 15 loop
even_number <= conv_std_logic_vector(((round*2)+8), 8);
odd_number <= conv_std_logic_vector(((round*2)+9), 8);
wait for 50 ns;
enable_encr_reg <= '1';
wait for 50 ns;
enable_encr_reg <= '0';
end loop;
-- taking final results
demux_selection <= '0';
wait for 25 ns;
assert (ct_v = output_data) report "file entry and encryption result DO NOT match!!! :( " severity failure;
assert (ct_v /= output_data) report "Encryption I=" & to_text(counter) &" OK" severity note;
counter := counter+1;
hwrite(ct_f,output_data);
hwrite(key_f,key_v);
writeline(output_file,key_f);
writeline(output_file,ct_f);
end loop;
assert false report "***** Variable Key Known Answer Test with 192 bits key size ended succesfully! :) *****" severity failure;
end process vk_proc;
end vk_encryption192_testbench_arch;
| gpl-2.0 | a45b3b78de8ca0c2816cfec5b5fd8139 | 0.650048 | 2.691124 | false | false | false | false |
mkotormus/G3_OrchestraConductorDemo | src/ov7670_marker_tracker_use/ov7670_marker_tracker_use.srcs/sources_1/ipshared/xilinx.com/proc_common_v4_0/bb615326/hdl/src/vhdl/srl_fifo_rbu_f.vhd | 15 | 16,038 | -------------------------------------------------------------------------------
-- $Id: srl_fifo_rbu_f.vhd,v 1.1.4.2 2010/09/14 22:35:47 dougt Exp $
-------------------------------------------------------------------------------
-- srl_fifo_rbu_f - entity / architecture pair
-------------------------------------------------------------------------------
--
-- *************************************************************************
-- ** **
-- ** DISCLAIMER OF LIABILITY **
-- ** **
-- ** This text/file contains proprietary, confidential **
-- ** information of Xilinx, Inc., is distributed under **
-- ** license from Xilinx, Inc., and may be used, copied **
-- ** and/or disclosed only pursuant to the terms of a valid **
-- ** license agreement with Xilinx, Inc. Xilinx hereby **
-- ** grants you a license to use this text/file solely for **
-- ** design, simulation, implementation and creation of **
-- ** design files limited to Xilinx devices or technologies. **
-- ** Use with non-Xilinx devices or technologies is expressly **
-- ** prohibited and immediately terminates your license unless **
-- ** covered by a separate agreement. **
-- ** **
-- ** Xilinx is providing this design, code, or information **
-- ** "as-is" solely for use in developing programs and **
-- ** solutions for Xilinx devices, with no obligation on the **
-- ** part of Xilinx to provide support. By providing this design, **
-- ** code, or information as one possible implementation of **
-- ** this feature, application or standard, Xilinx is making no **
-- ** representation that this implementation is free from any **
-- ** claims of infringement. You are responsible for obtaining **
-- ** any rights you may require for your implementation. **
-- ** Xilinx expressly disclaims any warranty whatsoever with **
-- ** respect to the adequacy of the implementation, including **
-- ** but not limited to any warranties or representations that this **
-- ** implementation is free from claims of infringement, implied **
-- ** warranties of merchantability or fitness for a particular **
-- ** purpose. **
-- ** **
-- ** Xilinx products are not intended for use in life support **
-- ** appliances, devices, or systems. Use in such applications is **
-- ** expressly prohibited. **
-- ** **
-- ** Any modifications that are made to the Source Code are **
-- ** done at the users sole risk and will be unsupported. **
-- ** The Xilinx Support Hotline does not have access to source **
-- ** code and therefore cannot answer specific questions related **
-- ** to source HDL. The Xilinx Hotline support of original source **
-- ** code IP shall only address issues and questions related **
-- ** to the standard Netlist version of the core (and thus **
-- ** indirectly, the original core source). **
-- ** **
-- ** Copyright (c) 2007-2010 Xilinx, Inc. All rights reserved. **
-- ** **
-- ** This copyright and support notice must be retained as part **
-- ** of this text at all times. **
-- ** **
-- *************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: srl_fifo_rbu_f.vhd
--
-- Description: A small-to-medium depth FIFO with optional
-- capability to back up and reread data. For
-- data storage, the SRL elements native to the
-- target FGPA family are used. If the FIFO depth
-- exceeds the available depth of the SRL elements,
-- then SRLs are cascaded and MUXFN elements are
-- used to select the output of the appropriate SRL stage.
--
-- Features:
-- - Width and depth are arbitrary, but each doubling of
-- depth, starting from the native SRL depth, adds
-- a level of MUXFN. Generally, in performance-oriented
-- applications, the fifo depth may need to be limited to
-- not exceed the SRL cascade depth supported by local
-- fast interconnect or the number of MUXFN levels.
-- However, deeper fifos will correctly build.
-- - Commands: read, write, and reread n.
-- - Flags: empty and full.
-- - The reread n command (executed by applying
-- a non-zero value, n, to signal Num_To_Reread
-- for one clock period) allows n
-- previously read elements to be restored to the FIFO,
-- limited, however, to the number of elements that have
-- not been overwritten. (It is the user's responsibility
-- to assure that the elements being restored are
-- actually in the FIFO storage; once the depth of the
-- FIFO has been written, the maximum number that can
-- be restored is equal to the vacancy.)
-- The reread capability does not cost extra LUTs or FFs.
-- - Commands may be asserted simultaneously.
-- However, if read and reread n are asserted
-- simultaneously, only the read is carried out.
-- - Overflow and underflow are detected and latched until
-- Reset. The state of the FIFO is undefined during
-- status of underflow or overflow.
-- Underflow can occur only by reading the FIFO when empty.
-- Overflow can occur either from a write, a reread n,
-- or a combination of both that would result in more
-- elements occupying the FIFO that its C_DEPTH.
-- - Any of the signals FIFO_Full, Underflow, or Overflow
-- left unconnected can be expected to be trimmed.
-- - The Addr output is always one less than the current
-- occupancy when the FIFO is non-empty, and is all ones
-- otherwise. Therefore, the value <FIFO_Empty, Addr>--
-- i.e. FIFO_Empty concatenated on the left with Addr--
-- when taken as a signed value, is one less than the
-- current occupancy.
-- This information can be used to generate additional
-- flags, if needed.
--
-- VHDL-Standard: VHDL'93
-------------------------------------------------------------------------------
-- Structure:
-- srl_fifo_rbu_f.vhd
-- dynshreg_f.vhd
-- cntr_incr_decr_addn_f.vhd
--
-------------------------------------------------------------------------------
-- Author: Farrell Ostler
--
-- History:
-- FLO 12/05/05 First Version. Derived from srl_fifo_rbu.
-- ~~~~~~
-- FLO 2007-12-12
-- ^^^^^^
-- Using function clog2 now instead of log2 to eliminate superfluous warnings.
-- ~~~~~~
--
-- DET 1/17/2008 v4_0
-- ~~~~~~
-- - Changed proc_common library version to v4_0
-- - Incorporated new disclaimer header
-- ^^^^^^
-- FLO 2008-11-25
-- ^^^^^^
-- Changed to functionally equivalent code to generate FIFO_Full. The new code
-- steers the current XST toward a better implementation. CR 496211.
-- ~~~~~~
--
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_com"
-- pipelined or register delay signals: "*_d#"
-- predecessor value by # clks: "*_p#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.UNSIGNED;
use ieee.numeric_std.">=";
use ieee.numeric_std.TO_UNSIGNED;
library proc_common_v4_0;
use proc_common_v4_0.proc_common_pkg.clog2;
entity srl_fifo_rbu_f is
generic (
C_DWIDTH : natural;
C_DEPTH : positive := 16;
C_FAMILY : string := "nofamily"
);
port (
Clk : in std_logic;
Reset : in std_logic;
FIFO_Write : in std_logic;
Data_In : in std_logic_vector(0 to C_DWIDTH-1);
FIFO_Read : in std_logic;
Data_Out : out std_logic_vector(0 to C_DWIDTH-1);
FIFO_Full : out std_logic;
FIFO_Empty : out std_logic;
Addr : out std_logic_vector(0 to clog2(C_DEPTH)-1);
Num_To_Reread : in std_logic_vector(0 to clog2(C_DEPTH)-1);
Underflow : out std_logic;
Overflow : out std_logic
);
end entity srl_fifo_rbu_f;
architecture imp of srl_fifo_rbu_f is
function bitwise_or(s: std_logic_vector) return std_logic is
variable v: std_logic := '0';
begin
for i in s'range loop v := v or s(i); end loop;
return v;
end bitwise_or;
constant ADDR_BITS : integer := clog2(C_DEPTH);
-- An extra bit will be carried as the empty flag.
signal addr_i : std_logic_vector(ADDR_BITS downto 0);
signal addr_i_p1 : std_logic_vector(ADDR_BITS downto 0);
signal num_to_reread_zeroext : std_logic_vector(ADDR_BITS downto 0);
signal fifo_empty_i : std_logic;
signal overflow_i : std_logic;
signal underflow_i : std_logic;
signal fifo_full_p1 : std_logic;
begin
fifo_empty_i <= addr_i(ADDR_BITS);
Addr(0 to ADDR_BITS-1) <= addr_i(ADDR_BITS-1 downto 0);
FIFO_Empty <= fifo_empty_i;
num_to_reread_zeroext <= '0' & Num_To_Reread;
----------------------------------------------------------------------------
-- The FIFO address counter. Addresses the next element to be read.
-- All ones when the FIFO is empty.
----------------------------------------------------------------------------
CNTR_INCR_DECR_ADDN_F_I : entity proc_common_v4_0.cntr_incr_decr_addn_f
generic map (
C_SIZE => ADDR_BITS + 1,
C_FAMILY => C_FAMILY
)
port map (
Clk => Clk,
Reset => Reset,
Incr => FIFO_Write,
Decr => FIFO_Read,
N_to_add => num_to_reread_zeroext,
Cnt => addr_i,
Cnt_p1 => addr_i_p1
);
----------------------------------------------------------------------------
-- The dynamic shift register that holds the FIFO elements.
----------------------------------------------------------------------------
DYNSHREG_F_I : entity proc_common_v4_0.dynshreg_f
generic map (
C_DEPTH => C_DEPTH,
C_DWIDTH => C_DWIDTH,
C_FAMILY => C_FAMILY
)
port map (
Clk => Clk,
Clken => FIFO_Write,
Addr => addr_i(ADDR_BITS-1 downto 0),
Din => Data_In,
Dout => Data_Out
);
----------------------------------------------------------------------------
-- Full flag.
----------------------------------------------------------------------------
fifo_full_p1 <= '1' when ( addr_i_p1
= std_logic_vector(
TO_UNSIGNED(C_DEPTH-1, ADDR_BITS+1)
)
)
else '0';
FULL_PROCESS: process (Clk)
begin
if Clk'event and Clk='1' then
if Reset='1' then
FIFO_Full <= '0';
else
FIFO_Full <= fifo_full_p1;
end if;
end if;
end process;
----------------------------------------------------------------------------
-- Underflow detection.
----------------------------------------------------------------------------
UNDERFLOW_PROCESS: process (Clk)
begin
if Clk'event and Clk='1' then
if Reset = '1' then
underflow_i <= '0';
elsif underflow_i = '1' then
underflow_i <= '1'; -- Underflow sticks until reset
else
underflow_i <= fifo_empty_i and FIFO_Read;
end if;
end if;
end process;
Underflow <= underflow_i;
----------------------------------------------------------------------------
-- Overflow detection.
-- The only case of non-erroneous operation for which addr_i (including
-- the high-order bit used as the empty flag) taken as an unsigned value
-- may be greater than or equal to C_DEPTH is when the FIFO is empty.
-- No overflow is possible when FIFO_Read, since Num_To_Reread is
-- overriden in this case and the number elements can at most remain
-- unchanged (that being when there is a simultaneous FIFO_Write).
-- However, when there is no FIFO_Read and there is either a
-- FIFO_Write or a restoration of one or more read elements, or both, then
-- addr_i, extended by the carry-out bit, becoming greater than
-- or equal to C_DEPTH indicates an overflow.
----------------------------------------------------------------------------
OVERFLOW_PROCESS: process (Clk)
begin
if Clk'event and Clk='1' then
if Reset = '1' then
overflow_i <= '0';
elsif overflow_i = '1' then
overflow_i <= '1'; -- Overflow sticks until Reset
elsif FIFO_Read = '0' and
(FIFO_Write= '1' or bitwise_or(Num_To_Reread)='1') and
UNSIGNED(addr_i_p1) >= C_DEPTH then
overflow_i <= '1';
else
overflow_i <= '0';
end if;
end if;
end process;
Overflow <= overflow_i;
end architecture imp;
| apache-2.0 | acbfe75f6fa9edac9a2078adbeae29c0 | 0.449495 | 4.994706 | false | false | false | false |
mkotormus/G3_OrchestraConductorDemo | src/ov7670_marker_tracker_use/ov7670_marker_tracker_use.srcs/sources_1/ipshared/xilinx.com/proc_common_v4_0/bb615326/hdl/src/vhdl/or_with_enable_f.vhd | 15 | 11,958 | -------------------------------------------------------------------------------
-- $Id: or_with_enable_f.vhd,v 1.1.4.1 2010/09/14 22:35:46 dougt Exp $
-------------------------------------------------------------------------------
-- or_with_enable_f
-------------------------------------------------------------------------------
--
-- *************************************************************************
-- ** **
-- ** DISCLAIMER OF LIABILITY **
-- ** **
-- ** This text/file contains proprietary, confidential **
-- ** information of Xilinx, Inc., is distributed under **
-- ** license from Xilinx, Inc., and may be used, copied **
-- ** and/or disclosed only pursuant to the terms of a valid **
-- ** license agreement with Xilinx, Inc. Xilinx hereby **
-- ** grants you a license to use this text/file solely for **
-- ** design, simulation, implementation and creation of **
-- ** design files limited to Xilinx devices or technologies. **
-- ** Use with non-Xilinx devices or technologies is expressly **
-- ** prohibited and immediately terminates your license unless **
-- ** covered by a separate agreement. **
-- ** **
-- ** Xilinx is providing this design, code, or information **
-- ** "as-is" solely for use in developing programs and **
-- ** solutions for Xilinx devices, with no obligation on the **
-- ** part of Xilinx to provide support. By providing this design, **
-- ** code, or information as one possible implementation of **
-- ** this feature, application or standard, Xilinx is making no **
-- ** representation that this implementation is free from any **
-- ** claims of infringement. You are responsible for obtaining **
-- ** any rights you may require for your implementation. **
-- ** Xilinx expressly disclaims any warranty whatsoever with **
-- ** respect to the adequacy of the implementation, including **
-- ** but not limited to any warranties or representations that this **
-- ** implementation is free from claims of infringement, implied **
-- ** warranties of merchantability or fitness for a particular **
-- ** purpose. **
-- ** **
-- ** Xilinx products are not intended for use in life support **
-- ** appliances, devices, or systems. Use in such applications is **
-- ** expressly prohibited. **
-- ** **
-- ** Any modifications that are made to the Source Code are **
-- ** done at the users sole risk and will be unsupported. **
-- ** The Xilinx Support Hotline does not have access to source **
-- ** code and therefore cannot answer specific questions related **
-- ** to source HDL. The Xilinx Hotline support of original source **
-- ** code IP shall only address issues and questions related **
-- ** to the standard Netlist version of the core (and thus **
-- ** indirectly, the original core source). **
-- ** **
-- ** Copyright (c) 2006-2010 Xilinx, Inc. All rights reserved. **
-- ** **
-- ** This copyright and support notice must be retained as part **
-- ** of this text at all times. **
-- ** **
-- *************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: or_with_enable_f.vhd
--
-- Description: Y <= or_reduce(OR_bits) and Enable
--
-- i.e., OR together the OR_bits and AND the result with Enable.
--
-- The implementation uses a single LUT if possible.
-- Otherwise, if C_FAMILY supports the carry chain concept,
-- it uses a minimal number of LUTs on a carry chain.
-- The native LUT size of C_FAMILY is taken into account.
--
-------------------------------------------------------------------------------
-- Structure: Common use module
-------------------------------------------------------------------------------
-- Author: FLO
-- History:
-- FLO 05/06/06 -- First version
-- ~~~~~~
-- FLO 05/25/06
-- ^^^^^^
-- -Using native_lut_size function from family_support.
-- -Moved C_FAMILY to end of generics.
-- -Minor cleanup.
-- ~~~~~~
-- FLO 11/17/07
-- ^^^^^^
-- -Work around because XST doesn't yet support or_reduce with null argument.
-- ~~~~~~
--
-- DET 1/17/2008 v4_0
-- ~~~~~~
-- - Changed proc_common library version to v4_0
-- - Incorporated new disclaimer header
-- ^^^^^^
--
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_cmb"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
--
entity or_with_enable_f is
generic (
C_OR_WIDTH : natural;
C_FAMILY : string := "nofamily"
);
port (
OR_bits : in std_logic_vector(0 to C_OR_WIDTH-1);
Enable : in std_logic;
Y : out std_logic
);
end or_with_enable_f;
library proc_common_v4_0;
use proc_common_v4_0.family_support.all;
-- Makes visible the function 'supported' and related types,
-- including enumeration literals for the unisim primitives (e.g.
-- the "u_" prefixed identifiers such as u_MUXCY, u_LUT4, etc.).
library unisim;
use unisim.all; -- Make unisim entities available for default binding.
--
architecture implementation of or_with_enable_f is
----------------------------------------------------------------------------
-- Here is determined the largest LUT width supported by the target family.
-- If no LUT is supported, the width is set to a very large number, which,
-- as things are structured, will cause an inferred implementation
-- to be used.
----------------------------------------------------------------------------
constant LUT_SIZE : integer := native_lut_size(fam_as_string => C_FAMILY,
no_lut_return_val => integer'high
);
----------------------------------------------------------------------------
-- Here is determined which structural or inferred implementation to use.
----------------------------------------------------------------------------
constant USE_STRUCTURAL_A : boolean := supported(C_FAMILY, u_MUXCY) and
OR_bits'length + 1 > LUT_SIZE;
-- Structural implementation not needed if the number of logic
-- inputs, i.e., the Enable plus the number of bits to be ORed,
-- will fit into a single LUT.
constant USE_INFERRED : boolean := not USE_STRUCTURAL_A;
----------------------------------------------------------------------------
-- Reduction OR function.
----------------------------------------------------------------------------
function or_reduce (v : std_logic_vector) return std_logic is
variable r : std_logic := '0';
begin
for i in v'range loop
r := r or v(i);
end loop;
return r;
end;
----------------------------------------------------------------------------
-- Signal to recast OR_bits into a local array whose index bounds and
-- direction are known.
----------------------------------------------------------------------------
signal OB : std_logic_vector(0 to OR_bits'length-1);
----------------------------------------------------------------------------
-- Unisim components declared locally for maximum avoidance of default
-- binding and vcomponents version issues.
----------------------------------------------------------------------------
component MUXCY
port
(
O : out std_ulogic;
CI : in std_ulogic;
DI : in std_ulogic;
S : in std_ulogic
);
end component;
begin
OB <= OR_bits;
----------------------------------------------------------------------------
-- Inferred implementation.
----------------------------------------------------------------------------
INFERRED_GEN : if USE_INFERRED generate
begin
Y <= Enable and or_reduce(OB);
end generate INFERRED_GEN;
----------------------------------------------------------------------------
-- Structural implementation.
----------------------------------------------------------------------------
STRUCTURAL_A_GEN : if USE_STRUCTURAL_A generate
constant NUM_PURE_OR_LUTS : positive := (OB'length / LUT_SIZE);
signal cy : std_logic_vector(0 to NUM_PURE_OR_LUTS);
signal final_lut : std_logic;
begin
--
cy(0) <= '0';
--
PURE_OR_GEN : for i in 0 to NUM_PURE_OR_LUTS-1 generate
signal lut : std_logic;
begin
lut <= not or_reduce(OB(i*LUT_SIZE to (i+1)*LUT_SIZE-1));
--
I_MUXCY : component MUXCY
port map (O =>cy(i+1),
CI=>cy(i),
DI=>'1',
S =>lut);
end generate;
--
XST_WA_GEN : if (OB'length mod LUT_SIZE) = 0 generate begin
final_lut <= Enable;
end generate;
--
ORIG_GEN : if (OB'length mod LUT_SIZE) /= 0 generate begin
final_lut <= Enable
and not or_reduce(OB(NUM_PURE_OR_LUTS*LUT_SIZE to OB'right));
end generate;
--
I_MUXCY_FINAL : component MUXCY
port map (O =>Y,
CI=>cy(NUM_PURE_OR_LUTS),
DI=>Enable,
S =>final_lut);
--
end generate STRUCTURAL_A_GEN;
end implementation;
| apache-2.0 | b065ff1b86b3108ea57ca293eedac63e | 0.411106 | 5.442877 | false | false | false | false |
mkotormus/G3_OrchestraConductorDemo | src/ov7670_marker_tracker_use/ov7670_marker_tracker_use.srcs/sources_1/ipshared/xilinx.com/axi_master_burst_v2_0/1af76933/hdl/src/vhdl/axi_master_burst_pcc.vhd | 1 | 68,635 | -------------------------------------------------------------------
-- (c) Copyright 1984 - 2012 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
-------------------------------------------------------------------
-- Filename: axi_master_burst_pcc.vhd
--
-- Description:
-- This file implements the AXI Master burst Predictive Command Calculator
-- (PCC). It has been adapted from the AXI DataMover PCC.
--
--
--
--
-- VHDL-Standard: VHDL'93
-------------------------------------------------------------------------------
-- Structure:
--
-- axi_master_burst.vhd
-- |
-- |-- proc_common_v4_0 (helper library)
-- |
-- |-- axi_master_burst_reset.vhd
-- |
-- |-- axi_master_rd_llink.vhd
-- |
-- |-- axi_master_wr_llink.vhd
-- |
-- |
-- |-- axi_master_burst_cmd_status.vhd
-- | |-- axi_master_burst_first_stb_offset.vhd
-- | |-- axi_master_burst_stbs_set.vhd
-- |
-- |-- axi_master_burst_rd_wr_cntlr.vhd
-- |-- axi_master_burst_pcc.vhd
-- | |-- axi_master_burst_strb_gen.vhd
-- |-- axi_master_burst_addr_cntl.vhd
-- |-- axi_master_burst_rddata_cntl.vhd
-- |-- axi_master_burst_wrdata_cntl.vhd
-- |-- axi_master_burst_rd_status_cntl.vhd
-- |-- axi_master_burst_wr_status_cntl.vhd
-- |-- axi_master_burst_skid_buf.vhd
-- |-- axi_master_burst_skid2mm_buf.vhd
--
--
--
-------------------------------------------------------------------------------
-- Revision History:
--
--
-- Author: DET
-- Revision: $Revision: 1.0 $
-- Date: $1/19/2011$
--
-- History:
-- DET 1/19/2011 Initial
-- ~~~~~~
-- - Adapted from AXI DataMover v2_00_a axi_datamover_pcc.vhd
-- ^^^^^^
--
-- DET 2/15/2011 Initial for EDk 13.2
-- ~~~~~~
-- -- Per CR593812
-- - Modifications to remove unused features to improve Code coverage.
-- Used "-- coverage off" and "-- coverage on" strings.
-- ^^^^^^
-- ~~~~~~
-- SK 12/16/12 -- v2.0
-- 1. up reved to major version for 2013.1 Vivado release. No logic updates.
-- 2. Updated the version of AXI MASTER BURST to v2.0 in X.Y format
-- 3. updated the proc common version to proc_common_v4_0
-- 4. No Logic Updates
-- ^^^^^^
-------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
library axi_master_burst_v2_0;
use axi_master_burst_v2_0.axi_master_burst_strb_gen;
-------------------------------------------------------------------------------
entity axi_master_burst_pcc is
generic (
C_DRE_ALIGN_WIDTH : Integer range 1 to 3 := 2;
C_SEL_ADDR_WIDTH : Integer range 1 to 8 := 5;
C_ADDR_WIDTH : Integer range 32 to 64 := 32;
C_STREAM_DWIDTH : Integer range 8 to 256 := 32;
C_MAX_BURST_LEN : Integer range 16 to 256 := 16;
C_CMD_WIDTH : Integer := 68;
C_TAG_WIDTH : Integer range 1 to 8 := 4;
C_BTT_USED : Integer range 8 to 23 := 16;
C_SUPPORT_INDET_BTT : Integer range 0 to 1 := 0
);
port (
-- Clock input
primary_aclk : in std_logic;
-- Primary synchronization clock for the Master side
-- interface and internal logic. It is also used
-- for the User interface synchronization when
-- C_STSCMD_IS_ASYNC = 0.
-- Reset input
mmap_reset : in std_logic;
-- Reset used for the internal master logic
-- Master Command FIFO/Register Interface -------------------------------
cmd2mstr_command : in std_logic_vector(C_CMD_WIDTH-1 downto 0);
-- The next command value available from the Command FIFO/Register
cmd2mstr_cmd_valid : in std_logic;
-- Handshake bit indicating if the Command FIFO/Register has at leasdt 1 entry
mst2cmd_cmd_ready : out std_logic;
-- Handshake bit indicating the Command Calculator is ready to accept
-- another command
-- Address Channel Controller Interface ---------------------------------
mstr2addr_tag : out std_logic_vector(C_TAG_WIDTH-1 downto 0);
-- The next command tag
mstr2addr_addr : out std_logic_vector(C_ADDR_WIDTH-1 downto 0);
-- The next command address to put on the AXI MMap ADDR
mstr2addr_len : out std_logic_vector(7 downto 0);
-- The next command length to put on the AXI MMap LEN
mstr2addr_size : out std_logic_vector(2 downto 0);
-- The next command size to put on the AXI MMap SIZE
mstr2addr_burst : out std_logic_vector(1 downto 0);
-- The next command burst type to put on the AXI MMap BURST
mstr2addr_cmd_cmplt : out std_logic;
-- The indication to the Address Channel that the current
-- sub-command output is the last one compiled from the
-- parent command pulled from the Command FIFO
mstr2addr_calc_error : out std_logic;
-- Indication if the next command in the calculation pipe
-- has a calcualtion error
mstr2addr_cmd_valid : out std_logic;
-- The next command valid indication to the Address Channel
-- Controller for the AXI MMap
addr2mstr_cmd_ready : In std_logic;
-- Indication from the Address Channel Controller that the
-- command is being accepted
-- Data Channel Controller Interface ------------------------------------
mstr2data_tag : out std_logic_vector(C_TAG_WIDTH-1 downto 0);
-- The next command tag
mstr2data_saddr_lsb : out std_logic_vector(C_SEL_ADDR_WIDTH-1 downto 0);
-- The next command start address LSbs to use for the read data
-- mux (only used if Stream data width is less than the MMap data
-- width).
mstr2data_len : out std_logic_vector(7 downto 0);
-- The LEN value output to the Address Channel
mstr2data_strt_strb : out std_logic_vector((C_STREAM_DWIDTH/8)-1 downto 0);
-- The starting strobe value to use for the data transfer
mstr2data_last_strb : out std_logic_vector((C_STREAM_DWIDTH/8)-1 downto 0);
-- The endiing (LAST) strobe value to use for the data transfer
mstr2data_drr : out std_logic;
-- The starting tranfer of a sequence of transfers
mstr2data_eof : out std_logic;
-- The endiing tranfer of a sequence of parent transfer commands
mstr2data_sequential : Out std_logic;
-- The next sequential tranfer of a sequence of transfers
-- spawned from a single parent command
mstr2data_calc_error : out std_logic;
-- Indication if the next command in the calculation pipe
-- has a calculation error
mstr2data_cmd_cmplt : out std_logic;
-- The indication to the Data Channel that the current
-- sub-command output is the last one compiled from the
-- parent command pulled from the Command FIFO
mstr2data_cmd_valid : out std_logic;
-- The next command valid indication to the Data Channel
-- Controller for the AXI MMap
data2mstr_cmd_ready : In std_logic ;
-- Indication from the Data Channel Controller that the
-- command is being accepted on the AXI Address
-- Channel
mstr2data_dre_src_align : Out std_logic_vector(C_DRE_ALIGN_WIDTH-1 downto 0);
-- The source (input) alignment for the MM2S DRE
mstr2data_dre_dest_align : Out std_logic_vector(C_DRE_ALIGN_WIDTH-1 downto 0);
-- The destinstion (output) alignment for the MM2S DRE
calc_error : Out std_logic;
-- Indication from the Command Calculator that a calculation
-- error has occured.
-- Special S2MM DRE Controller Interface --------------------------------
dre2mstr_cmd_ready : In std_logic ;
-- Indication from the S2MM DRE Controller that it can
-- accept another command.
mstr2dre_cmd_valid : out std_logic ;
-- The next command valid indication to the S2MM DRE
-- Controller.
mstr2dre_tag : out std_logic_vector(C_TAG_WIDTH-1 downto 0);
-- The next command tag
mstr2dre_dre_src_align : Out std_logic_vector(C_DRE_ALIGN_WIDTH-1 downto 0) ;
-- The source (S2MM Stream) alignment for the S2MM DRE
mstr2dre_dre_dest_align : Out std_logic_vector(C_DRE_ALIGN_WIDTH-1 downto 0) ;
-- The destinstion (S2MM MMap) alignment for the S2MM DRE
mstr2dre_btt : out std_logic_vector(C_BTT_USED-1 downto 0) ;
-- The BTT value output to the S2MM DRE. This is needed for
-- Scatter operations.
mstr2dre_drr : out std_logic ;
-- The starting tranfer of a sequence of transfers
mstr2dre_eof : out std_logic ;
-- The endiing tranfer of a sequence of parent transfer commands
mstr2dre_cmd_cmplt : Out std_logic ;
-- The last child tranfer of a sequence of transfers
-- spawned from a single parent command
mstr2dre_calc_error : out std_logic
-- Indication if the next command in the calculation pipe
-- has a calculation error
);
end entity axi_master_burst_pcc;
architecture implementation of axi_master_burst_pcc is
attribute DowngradeIPIdentifiedWarnings: string;
attribute DowngradeIPIdentifiedWarnings of implementation : architecture is "yes";
-- Function declarations -------------------
-------------------------------------------------------------------
-- Function
--
-- Function Name: funct_get_dbeat_residue_width
--
-- Function Description:
-- Calculates the number of Least significant bits of the BTT field
-- that are unused for the LEN calculation
--
-------------------------------------------------------------------
function funct_get_dbeat_residue_width (bytes_per_beat : integer) return integer is
Variable temp_dbeat_residue_width : Integer := 0; -- 8-bit stream
begin
case bytes_per_beat is
-- coverage off
when 32 =>
temp_dbeat_residue_width := 5;
-- coverage on
when 16 =>
temp_dbeat_residue_width := 4;
when 8 =>
temp_dbeat_residue_width := 3;
when 4 =>
temp_dbeat_residue_width := 2;
-- coverage off
when 2 =>
temp_dbeat_residue_width := 1;
when others => -- assume 1-byte transfers
temp_dbeat_residue_width := 0;
-- coverage on
end case;
Return (temp_dbeat_residue_width);
end function funct_get_dbeat_residue_width;
-------------------------------------------------------------------
-- Function
--
-- Function Name: funct_get_burstcnt_offset
--
-- Function Description:
-- Calculates the bit offset from the residue bits needed to detirmine
-- the load value for the burst counter.
--
-------------------------------------------------------------------
function funct_get_burst_residue_width (max_burst_len : integer) return integer is
Variable temp_burst_residue_width : Integer := 0;
begin
case max_burst_len is
when 256 =>
temp_burst_residue_width := 8;
when 128 =>
temp_burst_residue_width := 7;
when 64 =>
temp_burst_residue_width := 6;
when 32 =>
temp_burst_residue_width := 5;
when others => -- assume 16 dbeats
temp_burst_residue_width := 4;
end case;
Return (temp_burst_residue_width);
end function funct_get_burst_residue_width;
-------------------------------------------------------------------
-- Function
--
-- Function Name: func_get_axi_size
--
-- Function Description:
-- Calculates the AXI SIZE Qualifier based on the data width.
--
-------------------------------------------------------------------
function func_get_axi_size (native_dwidth : integer) return std_logic_vector is
Constant AXI_SIZE_1BYTE : std_logic_vector(2 downto 0) := "000";
Constant AXI_SIZE_2BYTE : std_logic_vector(2 downto 0) := "001";
Constant AXI_SIZE_4BYTE : std_logic_vector(2 downto 0) := "010";
Constant AXI_SIZE_8BYTE : std_logic_vector(2 downto 0) := "011";
Constant AXI_SIZE_16BYTE : std_logic_vector(2 downto 0) := "100";
Constant AXI_SIZE_32BYTE : std_logic_vector(2 downto 0) := "101";
Variable temp_size : std_logic_vector(2 downto 0) := (others => '0');
begin
case native_dwidth is
-- coverage off
when 8 =>
temp_size := AXI_SIZE_1BYTE;
when 16 =>
temp_size := AXI_SIZE_2BYTE;
-- coverage on
when 32 =>
temp_size := AXI_SIZE_4BYTE;
when 64 =>
temp_size := AXI_SIZE_8BYTE;
when 128 =>
temp_size := AXI_SIZE_16BYTE;
-- coverage off
when others =>
temp_size := AXI_SIZE_32BYTE;
-- coverage on
end case;
Return (temp_size);
end function func_get_axi_size;
-- Constant Declarations ----------------------------------------
Constant BASE_CMD_WIDTH : integer := 32; -- Bit Width of Command LS (no address)
Constant CMD_BTT_WIDTH : integer := C_BTT_USED;
Constant CMD_BTT_LS_INDEX : integer := 0;
Constant CMD_BTT_MS_INDEX : integer := CMD_BTT_WIDTH-1;
Constant CMD_TYPE_INDEX : integer := 23;
Constant CMD_DRR_INDEX : integer := BASE_CMD_WIDTH-1;
Constant CMD_EOF_INDEX : integer := BASE_CMD_WIDTH-2;
Constant CMD_DSA_WIDTH : integer := 6;
Constant CMD_DSA_LS_INDEX : integer := CMD_TYPE_INDEX+1;
Constant CMD_DSA_MS_INDEX : integer := (CMD_DSA_LS_INDEX+CMD_DSA_WIDTH)-1;
Constant CMD_ADDR_LS_INDEX : integer := BASE_CMD_WIDTH;
Constant CMD_ADDR_MS_INDEX : integer := (C_ADDR_WIDTH+BASE_CMD_WIDTH)-1;
Constant CMD_TAG_WIDTH : integer := C_TAG_WIDTH;
Constant CMD_TAG_LS_INDEX : integer := C_ADDR_WIDTH+BASE_CMD_WIDTH;
Constant CMD_TAG_MS_INDEX : integer := (CMD_TAG_LS_INDEX+CMD_TAG_WIDTH)-1;
----------------------------------------------------------------------------------------
-- Command calculation constants
Constant SIZE_TO_USE : std_logic_vector(2 downto 0) := func_get_axi_size(C_STREAM_DWIDTH);
Constant BYTES_PER_DBEAT : integer := C_STREAM_DWIDTH/8;
Constant DBEATS_PER_BURST : integer := C_MAX_BURST_LEN;
Constant BYTES_PER_MAX_BURST : integer := DBEATS_PER_BURST*BYTES_PER_DBEAT;
Constant LEN_WIDTH : integer := 8; -- 8 bits fixed
Constant MAX_LEN_VALUE : integer := DBEATS_PER_BURST-1;
Constant XFER_LEN_ZERO : std_logic_vector(LEN_WIDTH-1 downto 0) := (others => '0');
Constant DBEAT_RESIDUE_WIDTH : integer := funct_get_dbeat_residue_width(BYTES_PER_DBEAT);
Constant BURST_RESIDUE_WIDTH : integer := funct_get_burst_residue_width(C_MAX_BURST_LEN);
Constant BURST_RESIDUE_LS_INDEX : integer := DBEAT_RESIDUE_WIDTH;
Constant BTT_RESIDUE_WIDTH : integer := DBEAT_RESIDUE_WIDTH+BURST_RESIDUE_WIDTH;
Constant BTT_ZEROS : std_logic_vector(CMD_BTT_WIDTH-1 downto 0) := (others => '0');
Constant BTT_RESIDUE_1 : unsigned := TO_UNSIGNED( 1, BTT_RESIDUE_WIDTH);
Constant BTT_RESIDUE_0 : unsigned := TO_UNSIGNED( 0, BTT_RESIDUE_WIDTH);
Constant BURST_CNT_LS_INDEX : integer := DBEAT_RESIDUE_WIDTH+BURST_RESIDUE_WIDTH;
Constant BURST_CNTR_WIDTH : integer := CMD_BTT_WIDTH - (DBEAT_RESIDUE_WIDTH+BURST_RESIDUE_WIDTH);
Constant BRST_CNT_1 : unsigned := TO_UNSIGNED( 1, BURST_CNTR_WIDTH);
Constant BRST_CNT_0 : unsigned := TO_UNSIGNED( 0, BURST_CNTR_WIDTH);
Constant BRST_RESIDUE_0 : std_logic_vector(BURST_RESIDUE_WIDTH-1 downto 0) := (others => '0');
Constant DBEAT_RESIDUE_0 : std_logic_vector(DBEAT_RESIDUE_WIDTH-1 downto 0) := (others => '0');
Constant ADDR_CNTR_WIDTH : integer := 16; -- Addres Counter slice
Constant ADDR_MS_SLICE_WIDTH : integer := C_ADDR_WIDTH-ADDR_CNTR_WIDTH;
Constant ADDR_CNTR_MAX_VALUE : unsigned := TO_UNSIGNED((2**ADDR_CNTR_WIDTH)-1, ADDR_CNTR_WIDTH);
Constant ADDR_CNTR_ONE : unsigned := TO_UNSIGNED(1, ADDR_CNTR_WIDTH);
Constant MBAA_ADDR_SLICE_WIDTH : integer := BTT_RESIDUE_WIDTH;
Constant STRBGEN_ADDR_SLICE_WIDTH : integer := DBEAT_RESIDUE_WIDTH;
Constant STRBGEN_ADDR_0 : std_logic_vector(STRBGEN_ADDR_SLICE_WIDTH-1 downto 0) := (others => '0');
-- Type Declarations --------------------------------------------
type PCC_SM_STATE_TYPE is (
INIT,
WAIT_FOR_CMD,
CALC_1,
CALC_2,
WAIT_ON_XFER_PUSH,
CHK_IF_DONE,
ERROR_TRAP
);
-- Signal Declarations --------------------------------------------
Signal sig_pcc_sm_state : PCC_SM_STATE_TYPE := INIT;
Signal sig_pcc_sm_state_ns : PCC_SM_STATE_TYPE := INIT;
signal sig_sm_halt_ns : std_logic := '0';
signal sig_sm_halt_reg : std_logic := '0';
signal sig_sm_ld_xfer_reg_ns : std_logic := '0';
signal sig_sm_pop_input_reg_ns : std_logic := '0';
signal sig_sm_pop_input_reg : std_logic := '0';
signal sig_sm_ld_calc1_reg_ns : std_logic := '0';
signal sig_sm_ld_calc1_reg : std_logic := '0';
signal sig_sm_ld_calc2_reg_ns : std_logic := '0';
signal sig_sm_ld_calc2_reg : std_logic := '0';
signal sig_parent_done : std_logic := '0';
signal sig_ld_xfer_reg : std_logic := '0';
signal sig_btt_raw : std_logic := '0';
signal sig_btt_is_zero : std_logic := '0';
signal sig_btt_is_zero_reg : std_logic := '0';
signal sig_next_tag : std_logic_vector(CMD_TAG_WIDTH-1 downto 0) := (others => '0');
signal sig_next_addr : std_logic_vector(C_ADDR_WIDTH-1 downto 0) := (others => '0');
signal sig_next_len : std_logic_vector(LEN_WIDTH-1 downto 0) := (others => '0');
signal sig_next_size : std_logic_vector(2 downto 0) := (others => '0');
signal sig_next_burst : std_logic_vector(1 downto 0) := (others => '0');
signal sig_next_strt_strb : std_logic_vector((C_STREAM_DWIDTH/8)-1 downto 0) := (others => '0');
signal sig_next_end_strb : std_logic_vector((C_STREAM_DWIDTH/8)-1 downto 0) := (others => '0');
----------------------------------------------------------------------------------------
-- Burst Buster signals
signal sig_burst_cnt_slice : unsigned(BURST_CNTR_WIDTH-1 downto 0) := (others => '0');
signal sig_last_xfer_valid : std_logic := '0';
signal sig_brst_cnt_eq_zero : std_logic := '0';
signal sig_brst_cnt_eq_one : std_logic := '0';
signal sig_brst_residue_eq_zero : std_logic := '0';
signal sig_no_btt_residue : std_logic := '0';
signal sig_btt_residue_slice : Unsigned(BTT_RESIDUE_WIDTH-1 downto 0) := (others => '0');
-- Input command register
signal sig_push_input_reg : std_logic := '0';
signal sig_pop_input_reg : std_logic := '0';
signal sig_input_burst_type_reg : std_logic := '0';
signal sig_input_btt_residue_minus1_reg : std_logic_vector(BTT_RESIDUE_WIDTH-1 downto 0) := (others => '0');
signal sig_input_dsa_reg : std_logic_vector(CMD_DSA_WIDTH-1 downto 0) := (others => '0');
signal sig_input_drr_reg : std_logic := '0';
signal sig_input_eof_reg : std_logic := '0';
signal sig_input_tag_reg : std_logic_vector(C_TAG_WIDTH-1 downto 0) := (others => '0');
signal sig_input_reg_empty : std_logic := '0';
signal sig_input_reg_full : std_logic := '0';
-- Output qualifier Register
signal sig_ld_output : std_logic := '0';
signal sig_push_xfer_reg : std_logic := '0';
signal sig_pop_xfer_reg : std_logic := '0';
signal sig_xfer_addr_reg : std_logic_vector(C_ADDR_WIDTH-1 downto 0) := (others => '0');
signal sig_xfer_type_reg : std_logic := '0';
signal sig_xfer_len_reg : std_logic_vector(LEN_WIDTH-1 downto 0) := (others => '0');
signal sig_xfer_tag_reg : std_logic_vector(C_TAG_WIDTH-1 downto 0) := (others => '0');
signal sig_xfer_dsa_reg : std_logic_vector(CMD_DSA_WIDTH-1 downto 0) := (others => '0');
signal sig_xfer_drr_reg : std_logic := '0';
signal sig_xfer_eof_reg : std_logic := '0';
signal sig_xfer_strt_strb_reg : std_logic_vector(BYTES_PER_DBEAT-1 downto 0) := (others => '0');
signal sig_xfer_end_strb_reg : std_logic_vector(BYTES_PER_DBEAT-1 downto 0) := (others => '0');
signal sig_xfer_is_seq_reg : std_logic := '0';
signal sig_xfer_cmd_cmplt_reg : std_logic := '0';
signal sig_xfer_calc_err_reg : std_logic := '0';
signal sig_xfer_reg_empty : std_logic := '0';
signal sig_xfer_reg_full : std_logic := '0';
-- Address Counter
signal sig_ld_addr_cntr : std_logic := '0';
signal sig_incr_addr_cntr : std_logic := '0';
signal sig_addr_cntr_incr : Unsigned(ADDR_CNTR_WIDTH-1 downto 0) := (others => '0');
signal sig_byte_change_minus1 : Unsigned(ADDR_CNTR_WIDTH-1 downto 0) := (others => '0');
-- misc
signal sig_xfer_len : std_logic_vector(LEN_WIDTH-1 downto 0);
signal sig_xfer_strt_strb : std_logic_vector(BYTES_PER_DBEAT-1 downto 0) := (others => '0');
signal sig_xfer_strt_strb2use : std_logic_vector(BYTES_PER_DBEAT-1 downto 0) := (others => '0');
signal sig_xfer_end_strb : std_logic_vector(BYTES_PER_DBEAT-1 downto 0) := (others => '0');
signal sig_xfer_end_strb2use : std_logic_vector(BYTES_PER_DBEAT-1 downto 0) := (others => '0');
signal sig_xfer_address : std_logic_vector(C_ADDR_WIDTH-1 downto 0) := (others => '0');
signal sig_xfer_size : std_logic_vector(2 downto 0) := (others => '0');
signal sig_cmd_addr_slice : std_logic_vector(C_ADDR_WIDTH-1 downto 0) := (others => '0');
signal sig_cmd_btt_slice : std_logic_vector(CMD_BTT_WIDTH-1 downto 0) := (others => '0');
signal sig_cmd_type_slice : std_logic := '0';
signal sig_cmd_tag_slice : std_logic_vector(CMD_TAG_WIDTH-1 downto 0) := (others => '0');
signal sig_cmd_dsa_slice : std_logic_vector(CMD_DSA_WIDTH-1 downto 0) := (others => '0');
signal sig_cmd_drr_slice : std_logic := '0';
signal sig_cmd_eof_slice : std_logic := '0';
signal sig_calc_error_reg : std_logic := '0';
signal sig_calc_error_pushed : std_logic := '0';
-- PCC2 stuff
signal sig_finish_addr_offset : std_logic_vector(STRBGEN_ADDR_SLICE_WIDTH-1 downto 0) := (others => '0');
signal sig_xfer_len_eq_0 : std_logic := '0';
signal sig_first_xfer : std_logic := '0';
signal sig_bytes_to_mbaa : unsigned(ADDR_CNTR_WIDTH-1 downto 0) := (others => '0');
signal sig_addr_lsh_rollover : std_logic := '0';
signal sig_predict_addr_lsh_slv : std_logic_vector(ADDR_CNTR_WIDTH-1 downto 0) := (others => '0');
signal sig_predict_addr_lsh : unsigned(ADDR_CNTR_WIDTH-1 downto 0) := (others => '0');
signal sig_addr_cntr_lsh : unsigned(ADDR_CNTR_WIDTH-1 downto 0) := (others => '0');
signal sig_addr_cntr_lsh_slv : std_logic_vector(ADDR_CNTR_WIDTH-1 downto 0) := (others => '0');
signal sig_addr_cntr_msh : unsigned(ADDR_CNTR_WIDTH-1 downto 0) := (others => '0');
signal sig_strbgen_addr : std_logic_vector(STRBGEN_ADDR_SLICE_WIDTH-1 downto 0) := (others => '0');
signal sig_strbgen_bytes : std_logic_vector(STRBGEN_ADDR_SLICE_WIDTH downto 0) := (others => '0');
signal sig_ld_btt_cntr : std_logic := '0';
signal sig_decr_btt_cntr : std_logic := '0';
signal sig_btt_cntr : unsigned(CMD_BTT_WIDTH-1 downto 0) := (others => '0');
signal sig_cmd2data_valid : std_logic := '0';
signal sig_clr_cmd2data_valid : std_logic := '0';
signal sig_cmd2addr_valid : std_logic := '0';
signal sig_clr_cmd2addr_valid : std_logic := '0';
signal sig_btt_lt_b2mbaa : std_logic := '0';
signal sig_btt_eq_b2mbaa : std_logic := '0';
signal sig_addr_incr_ge_bpdb : std_logic := '0';
-- Unaligned start address support
signal sig_adjusted_addr_incr : Unsigned(ADDR_CNTR_WIDTH-1 downto 0) := (others => '0');
signal sig_adjusted_addr_incr_reg : Unsigned(ADDR_CNTR_WIDTH-1 downto 0) := (others => '0');
signal sig_start_addr_offset_slice : Unsigned(DBEAT_RESIDUE_WIDTH-1 downto 0) := (others => '0');
signal sig_mbaa_addr_cntr_slice : Unsigned(MBAA_ADDR_SLICE_WIDTH-1 downto 0) := (others => '0');
signal sig_addr_aligned : std_logic := '0';
-- S2MM DRE Support
signal sig_cmd2dre_valid : std_logic := '0';
signal sig_clr_cmd2dre_valid : std_logic := '0';
signal sig_input_xfer_btt : std_logic_vector(CMD_BTT_WIDTH-1 downto 0) := (others => '0');
signal sig_xfer_btt_reg : std_logic_vector(CMD_BTT_WIDTH-1 downto 0) := (others => '0');
signal sig_xfer_dre_eof_reg : std_logic := '0';
-- Long Timing path breakup intermediate registers
signal sig_strbgen_addr_reg : std_logic_vector(STRBGEN_ADDR_SLICE_WIDTH-1 downto 0) := (others => '0');
signal sig_strbgen_bytes_reg : std_logic_vector(STRBGEN_ADDR_SLICE_WIDTH downto 0) := (others => '0');
signal sig_finish_addr_offset_reg : std_logic_vector(STRBGEN_ADDR_SLICE_WIDTH-1 downto 0) := (others => '0');
signal sig_xfer_strt_strb_imreg : std_logic_vector(BYTES_PER_DBEAT-1 downto 0) := (others => '0');
signal sig_xfer_end_strb_imreg : std_logic_vector(BYTES_PER_DBEAT-1 downto 0) := (others => '0');
signal sig_xfer_len_eq_0_reg : std_logic := '0';
signal sig_addr_cntr_incr_imreg : Unsigned(ADDR_CNTR_WIDTH-1 downto 0) := (others => '0');
signal sig_predict_addr_lsh_imreg_slv : std_logic_vector(ADDR_CNTR_WIDTH-1 downto 0) := (others => '0');
signal sig_predict_addr_lsh_im : unsigned(ADDR_CNTR_WIDTH-1 downto 0) := (others => '0');
signal sig_predict_addr_lsh_imreg : unsigned(ADDR_CNTR_WIDTH-1 downto 0) := (others => '0');
signal sig_addr_lsh_rollover_im : std_logic := '0';
----------------------------------------------------------
begin --(architecture implementation)
-- Assign calculation error output
calc_error <= sig_calc_error_reg;
-- Assign the ready output to the Command FIFO
mst2cmd_cmd_ready <= not(sig_sm_halt_reg) and
sig_input_reg_empty and
not(sig_calc_error_pushed);
-- Assign the Address Channel Controller Qualifiers
mstr2addr_tag <= sig_xfer_tag_reg ;
mstr2addr_addr <= sig_xfer_addr_reg;
mstr2addr_len <= sig_xfer_len_reg ;
mstr2addr_size <= sig_xfer_size ;
mstr2addr_burst <= '0' & sig_xfer_type_reg; -- only fixed or increment supported
mstr2addr_cmd_valid <= sig_cmd2addr_valid;
mstr2addr_calc_error <= sig_xfer_calc_err_reg;
mstr2addr_cmd_cmplt <= sig_xfer_cmd_cmplt_reg;
-- Assign the Data Channel Controller Qualifiers
mstr2data_tag <= sig_xfer_tag_reg ;
mstr2data_saddr_lsb <= sig_xfer_addr_reg(C_SEL_ADDR_WIDTH-1 downto 0);
mstr2data_len <= sig_xfer_len_reg ;
mstr2data_strt_strb <= sig_xfer_strt_strb_reg;
mstr2data_last_strb <= sig_xfer_end_strb_reg ;
mstr2data_drr <= sig_xfer_drr_reg ;
mstr2data_eof <= sig_xfer_eof_reg ;
mstr2data_sequential <= sig_xfer_is_seq_reg ;
mstr2data_cmd_cmplt <= sig_xfer_cmd_cmplt_reg;
mstr2data_cmd_valid <= sig_cmd2data_valid ;
mstr2data_dre_src_align <= sig_xfer_addr_reg(C_DRE_ALIGN_WIDTH-1 downto 0); -- Used by MM2S DRE
mstr2data_dre_dest_align <= sig_xfer_dsa_reg(C_DRE_ALIGN_WIDTH-1 downto 0); -- Used by MM2S DRE
mstr2data_calc_error <= sig_xfer_calc_err_reg ;
-- Assign the S2MM DRE Controller Qualifiers
mstr2dre_cmd_valid <= sig_cmd2dre_valid ; -- Used by S2MM DRE
mstr2dre_tag <= sig_xfer_tag_reg ; -- Used by S2MM DRE
mstr2dre_btt <= sig_xfer_btt_reg ; -- Used by S2MM DRE
mstr2dre_dre_src_align <= sig_xfer_dsa_reg(C_DRE_ALIGN_WIDTH-1 downto 0) ; -- Used by S2MM DRE
mstr2dre_dre_dest_align <= sig_xfer_addr_reg(C_DRE_ALIGN_WIDTH-1 downto 0); -- Used by S2MM DRE
mstr2dre_drr <= sig_xfer_drr_reg ; -- Used by S2MM DRE
mstr2dre_eof <= sig_xfer_dre_eof_reg ; -- Used by S2MM DRE
mstr2dre_cmd_cmplt <= sig_xfer_cmd_cmplt_reg; -- Used by S2MM DRE
mstr2dre_calc_error <= sig_xfer_calc_err_reg ; -- Used by S2MM DRE
-- Start internal logic.
sig_cmd_type_slice <= '1'; -- always incrementing (per Interface_X guidelines)
sig_cmd_addr_slice <= cmd2mstr_command(CMD_ADDR_MS_INDEX downto CMD_ADDR_LS_INDEX);
sig_cmd_tag_slice <= cmd2mstr_command(CMD_TAG_MS_INDEX downto CMD_TAG_LS_INDEX);
sig_cmd_btt_slice <= cmd2mstr_command(CMD_BTT_MS_INDEX downto CMD_BTT_LS_INDEX);
sig_cmd_dsa_slice <= cmd2mstr_command(CMD_DSA_MS_INDEX downto CMD_DSA_LS_INDEX);
sig_cmd_drr_slice <= cmd2mstr_command(CMD_DRR_INDEX);
sig_cmd_eof_slice <= cmd2mstr_command(CMD_EOF_INDEX);
-- Check for a zero length BTT (error condition)
sig_btt_is_zero <= '1'
when (sig_cmd_btt_slice = BTT_ZEROS)
Else '0';
sig_xfer_size <= SIZE_TO_USE;
-----------------------------------------------------------------
-- Input xfer register design
sig_push_input_reg <= not(sig_sm_halt_reg) and
cmd2mstr_cmd_valid and
sig_input_reg_empty and
not(sig_calc_error_reg);
sig_pop_input_reg <= sig_sm_pop_input_reg;
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: REG_INPUT_QUAL
--
-- Process Description:
-- Implements the input command qualifier holding register
--
-------------------------------------------------------------
REG_INPUT_QUAL : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (mmap_reset = '1' or
sig_pop_input_reg = '1' or
sig_calc_error_pushed = '1') then
sig_input_burst_type_reg <= '0';
sig_input_tag_reg <= (others => '0');
sig_input_dsa_reg <= (others => '0');
sig_input_drr_reg <= '0';
sig_input_eof_reg <= '0';
sig_input_reg_empty <= '1';
sig_input_reg_full <= '0';
elsif (sig_push_input_reg = '1') then
sig_input_burst_type_reg <= sig_cmd_type_slice;
sig_input_tag_reg <= sig_cmd_tag_slice;
sig_input_dsa_reg <= sig_cmd_dsa_slice;
sig_input_drr_reg <= sig_cmd_drr_slice;
sig_input_eof_reg <= sig_cmd_eof_slice;
sig_input_reg_empty <= '0';
sig_input_reg_full <= '1';
else
null; -- Hold current State
end if;
end if;
end process REG_INPUT_QUAL;
----------------------------------------------------------------------
-- Calculation Error Logic
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_CALC_ERROR_FLOP
--
-- Process Description:
-- Implements the flop for the Calc Error flag, Once set,
-- the flag cannot be cleared until a reset is issued.
--
-------------------------------------------------------------
IMP_CALC_ERROR_FLOP : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (mmap_reset = '1') then
sig_calc_error_reg <= '0';
elsif (sig_push_input_reg = '1' and
sig_calc_error_reg = '0') then
sig_calc_error_reg <= sig_btt_is_zero;
else
Null; -- hold the current state
end if;
end if;
end process IMP_CALC_ERROR_FLOP;
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_CALC_ERROR_PUSHED
--
-- Process Description:
-- Implements the flop for generating a flag indicating the
-- calculation error flag has been pushed to the addr and data
-- controllers.
--
-------------------------------------------------------------
IMP_CALC_ERROR_PUSHED : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (mmap_reset = '1') then
sig_calc_error_pushed <= '0';
elsif (sig_push_xfer_reg = '1' and
sig_calc_error_pushed = '0') then
sig_calc_error_pushed <= sig_calc_error_reg;
else
Null; -- hold the current state
end if;
end if;
end process IMP_CALC_ERROR_PUSHED;
---------------------------------------------------------------------
-- Strobe Generator Logic
sig_xfer_strt_strb2use <= sig_xfer_strt_strb_imreg
When (sig_first_xfer = '1')
Else (others => '1');
sig_xfer_end_strb2use <= sig_xfer_strt_strb2use
When (sig_xfer_len_eq_0_reg = '1' and
sig_first_xfer = '1')
else sig_xfer_end_strb_imreg
When (sig_last_xfer_valid = '1')
Else (others => '1');
----------------------------------------------------------
-- Intermediate registers for STBGEN Fmax path
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_IM_STBGEN_REGS
--
-- Process Description:
-- Intermediate registers for Strobegen inputs to break
-- long timing paths.
--
-------------------------------------------------------------
IMP_IM_STBGEN_REGS : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (mmap_reset = '1') then
sig_strbgen_addr_reg <= (others => '0');
sig_strbgen_bytes_reg <= (others => '0');
sig_finish_addr_offset_reg <= (others => '0');
elsif (sig_sm_ld_calc1_reg = '1') then
sig_strbgen_addr_reg <= sig_strbgen_addr;
sig_strbgen_bytes_reg <= sig_strbgen_bytes;
sig_finish_addr_offset_reg <= sig_finish_addr_offset;
else
null; -- hold state
end if;
end if;
end process IMP_IM_STBGEN_REGS;
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_IM_STBGEN_OUT_REGS
--
-- Process Description:
-- Intermediate registers for Strobegen outputs to break
-- long timing paths.
--
-------------------------------------------------------------
IMP_IM_STBGEN_OUT_REGS : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (mmap_reset = '1') then
sig_xfer_strt_strb_imreg <= (others => '0');
sig_xfer_end_strb_imreg <= (others => '0');
sig_xfer_len_eq_0_reg <= '0';
elsif (sig_sm_ld_calc2_reg = '1') then
sig_xfer_strt_strb_imreg <= sig_xfer_strt_strb;
sig_xfer_end_strb_imreg <= sig_xfer_end_strb;
sig_xfer_len_eq_0_reg <= sig_xfer_len_eq_0;
else
null; -- hold state
end if;
end if;
end process IMP_IM_STBGEN_OUT_REGS;
------------------------------------------------------------
-- Instance: I_STRT_STRB_GEN
--
-- Description:
-- Strobe generator instance
--
------------------------------------------------------------
I_STRT_STRB_GEN : entity axi_master_burst_v2_0.axi_master_burst_strb_gen
generic map (
C_ADDR_MODE => 0 , -- 0 = normal, 1 = Address only
C_STRB_WIDTH => BYTES_PER_DBEAT ,
C_OFFSET_WIDTH => STRBGEN_ADDR_SLICE_WIDTH ,
C_NUM_BYTES_WIDTH => STRBGEN_ADDR_SLICE_WIDTH+1
)
port map (
start_addr_offset => sig_strbgen_addr_reg ,
num_valid_bytes => sig_strbgen_bytes_reg ,
strb_out => sig_xfer_strt_strb
);
------------------------------------------------------------
-- Instance: I_END_STRB_GEN
--
-- Description:
-- Strobe generator instance
--
------------------------------------------------------------
I_END_STRB_GEN : entity axi_master_burst_v2_0.axi_master_burst_strb_gen
generic map (
C_ADDR_MODE => 1 , -- 0 = normal, 1 = Address only
C_STRB_WIDTH => BYTES_PER_DBEAT ,
C_OFFSET_WIDTH => STRBGEN_ADDR_SLICE_WIDTH ,
C_NUM_BYTES_WIDTH => STRBGEN_ADDR_SLICE_WIDTH
)
port map (
start_addr_offset => STRBGEN_ADDR_0 ,
num_valid_bytes => sig_finish_addr_offset_reg ,
strb_out => sig_xfer_end_strb
);
-----------------------------------------------------------------
-- Output xfer register design
sig_push_xfer_reg <= (sig_ld_xfer_reg and sig_xfer_reg_empty);
-- Data taking xfer after Addr and DRE
sig_pop_xfer_reg <= (sig_clr_cmd2data_valid and not(sig_cmd2addr_valid) and not(sig_cmd2dre_valid)) or
-- Addr taking xfer after Data and DRE
(sig_clr_cmd2addr_valid and not(sig_cmd2data_valid) and not(sig_cmd2dre_valid)) or
-- DRE taking xfer after Data and ADDR
(sig_clr_cmd2dre_valid and not(sig_cmd2data_valid) and not(sig_cmd2addr_valid)) or
-- data and Addr taking xfer after DRE
(sig_clr_cmd2data_valid and sig_clr_cmd2addr_valid and not(sig_cmd2dre_valid)) or
-- Addr and DRE taking xfer after Data
(sig_clr_cmd2addr_valid and sig_clr_cmd2dre_valid and not(sig_cmd2data_valid)) or
-- Data and DRE taking xfer after Addr
(sig_clr_cmd2data_valid and sig_clr_cmd2dre_valid and not(sig_cmd2addr_valid)) or
-- Addr, Data, and DRE all taking xfer
(sig_clr_cmd2data_valid and sig_clr_cmd2addr_valid and sig_clr_cmd2dre_valid);
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: REG_OUTPUT_QUAL
--
-- Process Description:
-- Implements the output xfer qualifier holding register
--
-------------------------------------------------------------
REG_OUTPUT_QUAL : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (mmap_reset = '1' or
(sig_pop_xfer_reg = '1' and
sig_push_xfer_reg = '0')) then
sig_xfer_addr_reg <= (others => '0');
sig_xfer_type_reg <= '0';
sig_xfer_len_reg <= (others => '0');
sig_xfer_tag_reg <= (others => '0');
sig_xfer_dsa_reg <= (others => '0');
sig_xfer_drr_reg <= '0';
sig_xfer_eof_reg <= '0';
sig_xfer_strt_strb_reg <= (others => '0');
sig_xfer_end_strb_reg <= (others => '0');
sig_xfer_is_seq_reg <= '0';
sig_xfer_cmd_cmplt_reg <= '0';
sig_xfer_calc_err_reg <= '0';
sig_xfer_btt_reg <= (others => '0');
sig_xfer_dre_eof_reg <= '0';
sig_xfer_reg_empty <= '1';
sig_xfer_reg_full <= '0';
elsif (sig_push_xfer_reg = '1') then
sig_xfer_addr_reg <= sig_xfer_address ;
sig_xfer_type_reg <= sig_input_burst_type_reg ;
sig_xfer_len_reg <= sig_xfer_len ;
sig_xfer_tag_reg <= sig_input_tag_reg ;
sig_xfer_dsa_reg <= sig_input_dsa_reg ;
sig_xfer_drr_reg <= sig_input_drr_reg and
sig_first_xfer ;
sig_xfer_eof_reg <= sig_input_eof_reg and
sig_last_xfer_valid ;
sig_xfer_strt_strb_reg <= sig_xfer_strt_strb2use ;
sig_xfer_end_strb_reg <= sig_xfer_end_strb2use ;
sig_xfer_is_seq_reg <= not(sig_last_xfer_valid) ;
sig_xfer_cmd_cmplt_reg <= sig_last_xfer_valid or
sig_calc_error_reg ;
sig_xfer_calc_err_reg <= sig_calc_error_reg ;
sig_xfer_btt_reg <= sig_input_xfer_btt ;
sig_xfer_dre_eof_reg <= sig_input_eof_reg ;
sig_xfer_reg_empty <= '0';
sig_xfer_reg_full <= '1';
else
null; -- Hold current State
end if;
end if;
end process REG_OUTPUT_QUAL;
--------------------------------------------------------------
-- BTT Counter Logic
sig_ld_btt_cntr <= sig_ld_addr_cntr;
sig_decr_btt_cntr <= sig_incr_addr_cntr;
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_BTT_CNTR
--
-- Process Description:
-- Bytes to transfer counter implementation.
--
-------------------------------------------------------------
IMP_BTT_CNTR : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (mmap_reset = '1') then
sig_btt_cntr <= (others => '0');
elsif (sig_ld_btt_cntr = '1') then
sig_btt_cntr <= UNSIGNED(sig_cmd_btt_slice);
Elsif (sig_decr_btt_cntr = '1') Then
sig_btt_cntr <= sig_btt_cntr-RESIZE(sig_addr_cntr_incr_imreg, CMD_BTT_WIDTH);
else
null; -- hold current state
end if;
end if;
end process IMP_BTT_CNTR;
-- Convert to logic vector for the S2MM DRE use
-- The DRE will only use this value prior to the first
-- decrement of the BTT Counter. Using this saves a separate
-- BTT register.
sig_input_xfer_btt <= STD_LOGIC_VECTOR(sig_btt_cntr);
-- Rip the Burst Count slice from BTT counter value
sig_burst_cnt_slice <= sig_btt_cntr(CMD_BTT_WIDTH-1 downto BURST_CNT_LS_INDEX);
sig_brst_cnt_eq_zero <= '1'
When (sig_burst_cnt_slice = BRST_CNT_0)
Else '0';
sig_brst_cnt_eq_one <= '1'
When (sig_burst_cnt_slice = BRST_CNT_1)
Else '0';
-- Rip the BTT residue field from the BTT counter value
sig_btt_residue_slice <= sig_btt_cntr(BTT_RESIDUE_WIDTH-1 downto 0);
-- Check for transfer length residue of zero prior to subtracting 1
sig_no_btt_residue <= '1'
when (sig_btt_residue_slice = BTT_RESIDUE_0)
Else '0';
-- Unaligned address compensation
-- Add the number of starting address offset byte positions to the
-- final byte change value needed to calculate the AXI LEN field
sig_start_addr_offset_slice <= sig_addr_cntr_lsh(DBEAT_RESIDUE_WIDTH-1 downto 0);
sig_adjusted_addr_incr <= sig_addr_cntr_incr +
RESIZE(sig_start_addr_offset_slice, ADDR_CNTR_WIDTH);
-- adjust the address increment down by 1 byte to compensate
-- for the LEN requirement of being N-1 data beats
sig_byte_change_minus1 <= sig_adjusted_addr_incr_reg-ADDR_CNTR_ONE;
-- Rip the new transfer length value
sig_xfer_len <= STD_LOGIC_VECTOR(
RESIZE(
sig_byte_change_minus1(BTT_RESIDUE_WIDTH-1 downto
DBEAT_RESIDUE_WIDTH),
LEN_WIDTH)
);
-- Check to see if the new xfer length is zero (1 data beat)
sig_xfer_len_eq_0 <= '1'
when (sig_xfer_len = XFER_LEN_ZERO)
Else '0';
-- Check for Last transfer condition
sig_last_xfer_valid <= (sig_brst_cnt_eq_one and
sig_no_btt_residue and
sig_addr_aligned) or -- always the last databeat case
((sig_btt_lt_b2mbaa or sig_btt_eq_b2mbaa) and -- less than a full burst remaining
(sig_brst_cnt_eq_zero and not(sig_no_btt_residue)));
------------------------------------------------------------
-- If Generate
--
-- Label: GEN_ADDR_32
--
-- If Generate Description:
-- Implements the Address Counter logic for the 32-bit
-- address width case. The address counters are split into two
-- 16-bit sections to improve Fmax convergence.
--
--
------------------------------------------------------------
GEN_ADDR_32 : if (C_ADDR_WIDTH = 32) generate
begin
-- Populate the transfer address value by concatonating the
-- address counter segments
sig_xfer_address <= STD_LOGIC_VECTOR(sig_addr_cntr_msh) &
STD_LOGIC_VECTOR(sig_addr_cntr_lsh);
-- Rip the LS bits of the LS Address Counter for the StrobeGen
-- starting address offset
sig_strbgen_addr <= STD_LOGIC_VECTOR(sig_addr_cntr_lsh(STRBGEN_ADDR_SLICE_WIDTH-1 downto 0));
-- Check if the calcualted address increment (in bytes) is greater than the
-- number of bytes that can be transfered per data beat
sig_addr_incr_ge_bpdb <= '1'
When (sig_addr_cntr_incr >= TO_UNSIGNED(BYTES_PER_DBEAT, ADDR_CNTR_WIDTH))
Else '0';
-- If the calculated address increment (in bytes) is greater than the
-- number of bytes that can be transfered per data beat, then clip the
-- strobegen byte value to the number of bytes per data beat, else use the
-- increment value.
sig_strbgen_bytes <= STD_LOGIC_VECTOR(TO_UNSIGNED(BYTES_PER_DBEAT, STRBGEN_ADDR_SLICE_WIDTH+1))
when (sig_addr_incr_ge_bpdb = '1')
else STD_LOGIC_VECTOR(sig_addr_cntr_incr(STRBGEN_ADDR_SLICE_WIDTH downto 0));
--------------------------------------------------------------------------
-- Address Counter logic
sig_ld_addr_cntr <= sig_push_input_reg;
-- don't increment address cntr if type is '0' (non-incrementing)
sig_incr_addr_cntr <= sig_push_xfer_reg and
sig_input_burst_type_reg;
sig_mbaa_addr_cntr_slice <= sig_addr_cntr_lsh(MBAA_ADDR_SLICE_WIDTH-1 downto 0);
sig_bytes_to_mbaa <= TO_UNSIGNED(BYTES_PER_MAX_BURST, ADDR_CNTR_WIDTH) -
RESIZE(sig_mbaa_addr_cntr_slice,ADDR_CNTR_WIDTH);
sig_addr_aligned <= '1'
when (sig_mbaa_addr_cntr_slice = BTT_RESIDUE_0)
Else '0';
-- Check to see if the jump to the Max Burst Aligned Address (mbaa) is less
-- than or equal to the remaining bytes to transfer. If it is, then at least
-- two tranfers have to be scheduled.
sig_btt_lt_b2mbaa <= '1'
when ((RESIZE(sig_btt_residue_slice, ADDR_CNTR_WIDTH) < sig_bytes_to_mbaa) and
(sig_brst_cnt_eq_zero = '1'))
Else '0';
sig_btt_eq_b2mbaa <= '1'
when ((RESIZE(sig_btt_residue_slice, ADDR_CNTR_WIDTH) = sig_bytes_to_mbaa) and
(sig_brst_cnt_eq_zero = '1'))
Else '0';
-- Select the address counter increment value to use
sig_addr_cntr_incr <= RESIZE(sig_btt_residue_slice, ADDR_CNTR_WIDTH)
When (sig_btt_lt_b2mbaa = '1')
else sig_bytes_to_mbaa
when (sig_first_xfer = '1')
else TO_UNSIGNED(BYTES_PER_MAX_BURST, ADDR_CNTR_WIDTH);
-- calculate the next starting address after the current
-- xfer completes
sig_predict_addr_lsh <= sig_addr_cntr_lsh + sig_addr_cntr_incr;
-- Predict next transfer's address offset for the Strobe Generator
sig_finish_addr_offset <= STD_LOGIC_VECTOR(sig_predict_addr_lsh(STRBGEN_ADDR_SLICE_WIDTH-1 downto 0));
sig_addr_cntr_lsh_slv <= STD_LOGIC_VECTOR(sig_addr_cntr_lsh);
-- Determine if an address count lsh rollover is going to occur when
-- jumping to the next starting address by comparing the MS bit of the
-- current address lsh to the MS bit of the predicted address lsh .
-- A transition of a '1' to a '0' is a rollover.
sig_addr_lsh_rollover_im <= '1'
when (
(sig_addr_cntr_lsh_slv(ADDR_CNTR_WIDTH-1) = '1') and
(sig_predict_addr_lsh_imreg_slv(ADDR_CNTR_WIDTH-1) = '0')
)
Else '0';
----------------------------------------------------------
-- Intermediate registers for reducing the Address Counter
-- Increment timing path
----------------------------------------------------------
-- calculate the next starting address after the current
-- xfer completes using intermediate register values
sig_predict_addr_lsh_im <= sig_addr_cntr_lsh + sig_addr_cntr_incr_imreg;
sig_predict_addr_lsh_imreg_slv <= STD_LOGIC_VECTOR(sig_predict_addr_lsh_imreg);
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_IM_ADDRINC_REG
--
-- Process Description:
-- Intermediate registers for address counter increment to
-- break long timing paths.
--
-------------------------------------------------------------
IMP_IM_ADDRINC_REG : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (mmap_reset = '1') then
sig_addr_cntr_incr_imreg <= (others => '0');
elsif (sig_sm_ld_calc1_reg = '1') then
sig_addr_cntr_incr_imreg <= sig_addr_cntr_incr;
else
null; -- hold state
end if;
end if;
end process IMP_IM_ADDRINC_REG;
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_IM_PREDICT_ADDR_REG
--
-- Process Description:
-- Intermediate register for predicted address to break up
-- long timing paths.
--
-------------------------------------------------------------
IMP_IM_PREDICT_ADDR_REG : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (mmap_reset = '1') then
sig_predict_addr_lsh_imreg <= (others => '0');
elsif (sig_sm_ld_calc2_reg = '1') then
sig_predict_addr_lsh_imreg <= sig_predict_addr_lsh_im;
else
null; -- hold state
end if;
end if;
end process IMP_IM_PREDICT_ADDR_REG;
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: REG_ADDR_STUFF
--
-- Process Description:
-- Implements a general register for address counter related
-- things.
--
-------------------------------------------------------------
REG_ADDR_STUFF : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (mmap_reset = '1') then
sig_adjusted_addr_incr_reg <= (others => '0');
else
sig_adjusted_addr_incr_reg <= sig_adjusted_addr_incr;
end if;
end if;
end process REG_ADDR_STUFF;
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_LSH_ADDR_CNTR
--
-- Process Description:
-- Least Significant Half Address counter implementation.
--
-------------------------------------------------------------
IMP_LSH_ADDR_CNTR : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (mmap_reset = '1') then
sig_addr_cntr_lsh <= (others => '0');
elsif (sig_ld_addr_cntr = '1') then
sig_addr_cntr_lsh <= UNSIGNED(sig_cmd_addr_slice(ADDR_CNTR_WIDTH-1 downto 0));
Elsif (sig_incr_addr_cntr = '1') Then
sig_addr_cntr_lsh <= sig_predict_addr_lsh_imreg;
else
null; -- hold current state
end if;
end if;
end process IMP_LSH_ADDR_CNTR;
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_MSH_ADDR_CNTR
--
-- Process Description:
-- Least Significant Half Address counter implementation.
--
-------------------------------------------------------------
IMP_MSH_ADDR_CNTR : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (mmap_reset = '1') then
sig_addr_cntr_msh <= (others => '0');
elsif (sig_ld_addr_cntr = '1') then
sig_addr_cntr_msh <= UNSIGNED(sig_cmd_addr_slice((2*ADDR_CNTR_WIDTH)-1 downto ADDR_CNTR_WIDTH));
Elsif (sig_incr_addr_cntr = '1' and
sig_addr_lsh_rollover_im = '1') then
sig_addr_cntr_msh <= sig_addr_cntr_msh+ADDR_CNTR_ONE;
else
null; -- hold current state
end if;
end if;
end process IMP_MSH_ADDR_CNTR;
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_FIRST_XFER_FLOP
--
-- Process Description:
-- Implements the register flop for the first transfer flag.
--
-------------------------------------------------------------
IMP_FIRST_XFER_FLOP : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (mmap_reset = '1' or
sig_incr_addr_cntr = '1') then
sig_first_xfer <= '0';
elsif (sig_ld_addr_cntr = '1') then
sig_first_xfer <= '1';
else
null; -- hold current state
end if;
end if;
end process IMP_FIRST_XFER_FLOP;
end generate GEN_ADDR_32;
------------------------------------------------------------
-- If Generate
--
-- Label: GEN_ADDR_GT_32
--
-- If Generate Description:
-- Implements the Address Counter logic for the case when
-- the address width is greater than 32 bits.
--
------------------------------------------------------------
GEN_ADDR_GT_32 : if (C_ADDR_WIDTH > 32) generate
begin
-- No support for greater than 32-bit address
end generate GEN_ADDR_GT_32;
-- Addr and data Cntlr FIFO interface handshake logic ------------------------------
sig_clr_cmd2data_valid <= sig_cmd2data_valid and data2mstr_cmd_ready;
sig_clr_cmd2addr_valid <= sig_cmd2addr_valid and addr2mstr_cmd_ready;
sig_clr_cmd2dre_valid <= sig_cmd2dre_valid and dre2mstr_cmd_ready;
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: CMD2DATA_VALID_FLOP
--
-- Process Description:
-- Implements the set/reset flop for the Command Valid control
-- to the Data Controller Module.
--
-------------------------------------------------------------
CMD2DATA_VALID_FLOP : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (mmap_reset = '1' or
sig_clr_cmd2data_valid = '1') then
sig_cmd2data_valid <= '0';
elsif (sig_push_xfer_reg = '1') then
sig_cmd2data_valid <= '1';
else
null; -- hold current state
end if;
end if;
end process CMD2DATA_VALID_FLOP;
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: CMD2ADDR_VALID_FLOP
--
-- Process Description:
-- Implements the set/reset flop for the Command Valid control
-- to the Address Controller Module.
--
-------------------------------------------------------------
CMD2ADDR_VALID_FLOP : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (mmap_reset = '1' or
sig_clr_cmd2addr_valid = '1') then
sig_cmd2addr_valid <= '0';
elsif (sig_push_xfer_reg = '1') then
sig_cmd2addr_valid <= '1';
else
null; -- hold current state
end if;
end if;
end process CMD2ADDR_VALID_FLOP;
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: CMD2DRE_VALID_FLOP
--
-- Process Description:
-- Implements the set/reset flop for the Command Valid control
-- to the DRE Module (S2MM DRE Only).
--
-- Note that the S2MM DRE only needs to be loaded with a command
-- for each parent command, not every child command.
--
-------------------------------------------------------------
CMD2DRE_VALID_FLOP : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (mmap_reset = '1' or
sig_clr_cmd2dre_valid = '1') then
sig_cmd2dre_valid <= '0';
elsif (sig_push_xfer_reg = '1' and
sig_first_xfer = '1') then
sig_cmd2dre_valid <= '1';
else
null; -- hold current state
end if;
end if;
end process CMD2DRE_VALID_FLOP;
-------------------------------------------------------------------------
-- PCC State machine Logic
-------------------------------------------------------------
-- Combinational Process
--
-- Label: PCC_SM_COMBINATIONAL
--
-- Process Description:
-- PCC State Machine combinational implementation
--
-------------------------------------------------------------
PCC_SM_COMBINATIONAL : process (sig_pcc_sm_state ,
sig_parent_done ,
sig_push_input_reg ,
sig_push_xfer_reg ,
sig_calc_error_pushed)
begin
-- SM Defaults
sig_pcc_sm_state_ns <= INIT;
sig_sm_halt_ns <= '0';
sig_sm_ld_xfer_reg_ns <= '0';
sig_sm_pop_input_reg_ns <= '0';
sig_sm_ld_calc1_reg_ns <= '0';
sig_sm_ld_calc2_reg_ns <= '0';
case sig_pcc_sm_state is
--------------------------------------------
when INIT =>
sig_pcc_sm_state_ns <= WAIT_FOR_CMD;
sig_sm_halt_ns <= '1';
--------------------------------------------
when WAIT_FOR_CMD =>
If (sig_push_input_reg = '1') Then
sig_pcc_sm_state_ns <= CALC_1;
sig_sm_ld_calc1_reg_ns <= '1';
else
sig_pcc_sm_state_ns <= WAIT_FOR_CMD;
End if;
--------------------------------------------
when CALC_1 =>
sig_pcc_sm_state_ns <= CALC_2;
sig_sm_ld_calc2_reg_ns <= '1';
--------------------------------------------
when CALC_2 =>
sig_pcc_sm_state_ns <= WAIT_ON_XFER_PUSH;
sig_sm_ld_xfer_reg_ns <= '1';
--------------------------------------------
when WAIT_ON_XFER_PUSH =>
if (sig_push_xfer_reg = '1') then
sig_pcc_sm_state_ns <= CHK_IF_DONE;
else -- wait until output register is loaded
sig_pcc_sm_state_ns <= WAIT_ON_XFER_PUSH;
end if;
--------------------------------------------
when CHK_IF_DONE =>
If (sig_calc_error_pushed = '1') then -- Internal error, go to trap
sig_pcc_sm_state_ns <= ERROR_TRAP;
sig_sm_halt_ns <= '1';
elsif (sig_parent_done = '1') Then -- done with parent command
sig_pcc_sm_state_ns <= WAIT_FOR_CMD;
sig_sm_pop_input_reg_ns <= '1';
else -- Still breaking up parent command
sig_pcc_sm_state_ns <= CALC_1;
sig_sm_ld_calc1_reg_ns <= '1';
end if;
--------------------------------------------
when ERROR_TRAP =>
sig_pcc_sm_state_ns <= ERROR_TRAP;
sig_sm_halt_ns <= '1';
--------------------------------------------
when others =>
sig_pcc_sm_state_ns <= INIT;
end case;
end process PCC_SM_COMBINATIONAL;
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: PCC_SM_REGISTERED
--
-- Process Description:
-- PCC State Machine registered implementation
--
-------------------------------------------------------------
PCC_SM_REGISTERED : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (mmap_reset = '1') then
sig_pcc_sm_state <= INIT;
sig_sm_halt_reg <= '1' ;
sig_sm_pop_input_reg <= '0' ;
sig_sm_ld_calc1_reg <= '0' ;
sig_sm_ld_calc2_reg <= '0' ;
else
sig_pcc_sm_state <= sig_pcc_sm_state_ns ;
sig_sm_halt_reg <= sig_sm_halt_ns ;
sig_sm_pop_input_reg <= sig_sm_pop_input_reg_ns;
sig_sm_ld_calc1_reg <= sig_sm_ld_calc1_reg_ns ;
sig_sm_ld_calc2_reg <= sig_sm_ld_calc2_reg_ns ;
end if;
end if;
end process PCC_SM_REGISTERED;
------------------------------------------------------------------
-- Transfer Register Load Enable logic
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: LD_XFER_REG_FLOP
--
-- Process Description:
-- Sample and Hold FLOP for signaling a load of the output
-- xfer register.
--
-------------------------------------------------------------
LD_XFER_REG_FLOP : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (mmap_reset = '1' or
sig_push_xfer_reg = '1') then
sig_ld_xfer_reg <= '0';
Elsif (sig_sm_ld_xfer_reg_ns = '1') Then
sig_ld_xfer_reg <= '1';
else
null; -- hold current state
end if;
end if;
end process LD_XFER_REG_FLOP;
------------------------------------------------------------------
-- Parent Done flag logic
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: PARENT_DONE_FLOP
--
-- Process Description:
-- Sample and Hold FLOP for signaling a load of the output
-- xfer register.
--
-------------------------------------------------------------
PARENT_DONE_FLOP : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (mmap_reset = '1' or
sig_push_input_reg = '1') then
sig_parent_done <= '0';
Elsif (sig_push_xfer_reg = '1') Then
sig_parent_done <= sig_last_xfer_valid;
else
null; -- hold current state
end if;
end if;
end process PARENT_DONE_FLOP;
end implementation;
| apache-2.0 | f24516997708fd5713a4d1d3ef18cba6 | 0.512275 | 3.938429 | false | false | false | false |
jc38x/X38-02FO16 | benchmarks/VHDL_Generado_desde_C++/inputs-30bits_outputs31bits/14-MESA-IA/asap-alap-random/mesaia_random.vhd | 1 | 8,970 | -- IT Tijuana, NetList-FPGA-Optimizer 0.01 (printed on 2016-05-12.13:55:20)
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.all;
USE IEEE.NUMERIC_STD.all;
ENTITY mesaia_random_entity IS
PORT (
reset, clk: IN std_logic;
input1, input2, input3, input4, input5, input6, input7, input8, input9, input10, input11, input12, input13, input14, input15, input16, input17, input18, input19, input20, input21, input22, input23, input24, input25, input26, input27, input28, input29, input30, input31, input32, input33, input34, input35, input36, input37, input38, input39, input40, input41, input42, input43, input44, input45, input46, input47, input48: IN unsigned(0 TO 30);
output1, output2, output3, output4: OUT unsigned(0 TO 31));
END mesaia_random_entity;
ARCHITECTURE mesaia_random_description OF mesaia_random_entity IS
SIGNAL current_state : unsigned(0 TO 7) := "00000000";
SHARED VARIABLE register1: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register2: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register3: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register4: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register5: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register6: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register7: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register8: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register9: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register10: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register11: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register12: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register13: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register14: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register15: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register16: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register17: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register18: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register19: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register20: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register21: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register22: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register23: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register24: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register25: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register26: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register27: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register28: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register29: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register30: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register31: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register32: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register33: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register34: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register35: unsigned(0 TO 31) := "0000000000000000000000000000000";
SHARED VARIABLE register36: unsigned(0 TO 31) := "0000000000000000000000000000000";
BEGIN
moore_machine: PROCESS(clk, reset)
BEGIN
IF reset = '0' THEN
current_state <= "00000000";
ELSIF clk = '1' AND clk'event THEN
IF current_state < 4 THEN
current_state <= current_state + 1;
END IF;
END IF;
END PROCESS moore_machine;
operations: PROCESS(current_state)
BEGIN
CASE current_state IS
WHEN "00000001" =>
register1 := input1 + 1;
register2 := input2 * 2;
register3 := input3 * 3;
register4 := input4 * 4;
register5 := input5 * 5;
register6 := input6 * 6;
register7 := input7 + 7;
register8 := input8 * 8;
register9 := input9 * 9;
register10 := input10 * 10;
register11 := input11 * 11;
register12 := input12 + 12;
register13 := input13 * 13;
register14 := input14 + 14;
register15 := input15 * 15;
register16 := input16 + 16;
register17 := input17 * 17;
register18 := input18 * 18;
register19 := input19 + 19;
register20 := input20 * 20;
register21 := input21 * 21;
register22 := input22 * 22;
register23 := input23 + 23;
register24 := input24 * 24;
WHEN "00000010" =>
register19 := register20 + register19;
register20 := input25 * 25;
register25 := input26 + 26;
register8 := register8 + register16;
register16 := input27 * 27;
register26 := input28 + 28;
register27 := input29 + 29;
register28 := input30 * 30;
register29 := input31 + 31;
register30 := input32 + 32;
register31 := input33 + 33;
register32 := input34 * 34;
WHEN "00000011" =>
register18 := register18 + register27;
register27 := input35 * 35;
register33 := input36 + 36;
register34 := input37 * 37;
register35 := input38 + 38;
WHEN "00000100" =>
register4 := register4 + register35;
register18 := register28 + register18;
register28 := input39 + 39;
register35 := input40 * 40;
register14 := register32 + register14;
register32 := input41 * 41;
register36 := input42 * 42;
WHEN "00000101" =>
register4 := register6 + register4;
register6 := register36 + register25;
register18 := ((NOT register18) + 1) XOR register18;
register7 := register15 + register7;
register13 := register13 + register23;
WHEN "00000110" =>
register4 := ((NOT register4) + 1) XOR register4;
register14 := register17 + register14;
WHEN "00000111" =>
register14 := ((NOT register14) + 1) XOR register14;
register12 := register34 + register12;
register8 := register35 + register8;
register15 := input43 * 49;
register17 := input44 * 50;
register5 := register5 + register26;
register21 := register21 + register30;
register23 := register27 + register29;
register25 := input45 * 51;
register26 := input46 * 52;
WHEN "00001000" =>
register19 := register26 + register19;
register13 := register15 + register13;
register15 := register32 + register33;
register26 := input47 * 53;
WHEN "00001001" =>
register5 := register26 + register5;
register6 := register22 + register6;
register22 := input48 * 54;
register17 := register17 + register31;
WHEN "00001010" =>
register1 := register22 + register1;
register7 := register25 + register7;
register11 := register11 + register21;
register5 := ((NOT register5) + 1) XOR register5;
register17 := register20 + register17;
WHEN "00001011" =>
register7 := ((NOT register7) + 1) XOR register7;
register3 := register3 + register28;
register13 := ((NOT register13) + 1) XOR register13;
WHEN "00001100" =>
register11 := ((NOT register11) + 1) XOR register11;
register10 := register10 + register12;
register7 := register13 - register7;
WHEN "00001101" =>
register11 := register11 - register14;
register7 := register7 * 64;
register10 := ((NOT register10) + 1) XOR register10;
register2 := register2 + register15;
register1 := register24 + register1;
WHEN "00001110" =>
register11 := register11 * 68;
register9 := register9 + register23;
register3 := register16 + register3;
register6 := ((NOT register6) + 1) XOR register6;
register12 := ((NOT register19) + 1) XOR register19;
register4 := register4 - register10;
WHEN "00001111" =>
register3 := ((NOT register3) + 1) XOR register3;
register7 := register12 + register7;
register1 := ((NOT register1) + 1) XOR register1;
WHEN "00010000" =>
register1 := register1 - register5;
register4 := register4 * 78;
WHEN "00010001" =>
register4 := register18 + register4;
register1 := register1 * 80;
register3 := register3 + register11;
output1 <= register7(0 TO 14) & register2(0 TO 15);
WHEN "00010010" =>
output2 <= register3(0 TO 14) & register9(0 TO 15);
output3 <= register4(0 TO 14) & register17(0 TO 15);
register1 := register6 + register1;
WHEN "00010011" =>
output4 <= register1(0 TO 14) & register8(0 TO 15);
WHEN OTHERS =>
NULL;
END CASE;
END PROCESS operations;
END mesaia_random_description; | gpl-3.0 | 5eda17839bf79e04b024f2852bd09ef9 | 0.70223 | 3.688322 | false | false | false | false |
mkotormus/G3_OrchestraConductorDemo | src/ov7670_marker_tracker_use/ov7670_marker_tracker_use.srcs/sources_1/ipshared/xilinx.com/microblaze_v9_3/7b6e2d75/hdl/vhdl/mul_unit.vhd | 1 | 72,119 | `protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2014"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
QO5s5ApCTmsGUFg+izwv8aGDxQ+wnWI23c51fJaFRh7iOPM3k0P4T/4NM9jzPsCvelg4Iio61P0o
g2P+LiX3Bw==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
Y+n27wXvudVP4Z+DZMBiKkSXXaFLsZQEjggv1i8srirDsfyh9QCGeq4eE1CNDmZsLy6+vsEK7n8T
7Yw2fRWmApsMpAJk9XP3JbOF8nK4s+Qk00rrIGkV1ixSgrmMtPKjVpN+eTkIgGS5c2ed9cfg+NfU
ravsxFHv88DlodISL8A=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2014_03", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
NUKnv6n4E111zSDgZ6XNDTNJPYc+89giWE2DXOx1utKBYL4H//Tp4wtd8Exf1gIxRLBIvsn/6vn5
0JmryslqBqsuUnvDEZLCpbdwpcUzsEbZ5ega6MdF4ZaQsLvTd3H/p6SWJt6WDKz6Q8ZdTFO0Eaye
Jvj6lqENsftHJygVYpD69vZhu6+NMVixxbJzGf8QdFLBIDQyLTiTxnaqYHSvhjuVx1nanX2yIdDg
kCQMBt8lIEpIzjvR1bm6O6zrJFZdPp2adxo5IQyt/L9PMSf54cyDpnmgDOyV+MXSc5HSxp4ZfYYg
xJC02YqJPRwX81G1ExoOk8hHpBvIkEPCpTRDZg==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
1eW35Rfe7APU55r9xOJuXT8uJJ6bARuUx6v3yZ2B8Lk1BUUUjqkvNhGVssEeEc28ti1h88gGyO+9
4GQqMqHkhtbiXw1Cm7soCzoTaFDp5wSjQO08qumPQQr7SfqYvLhlTE+4qUhiHNh96x2tzjaHceIO
ZRpz5Jn2mHrWh3Zzz6w=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
nkfG8pNE4T+M9lDM1NO69fd6AfrDM5cxhzEDI4iDk5Nmrq5vKDtbdIhg5k8EN7Zm5jfn93SpKC+z
8bTVcY7Wh8/1afiCDyUeOFumQXZfevjwxF0nG0nLUNDESUehmINo5vVhrSyfhXGXVkzvAIRWikrW
WylWZ+GiSBr27qDxY2pCaioMMp8p2DZWkPEbw42jR2cJIOTzrK/R2xp9AJE44TDtnuEiyUaAeU86
N+k71wjMyUhGxEYw0rQXx5DSxR9FzUapFCEpyui2bcFeuzv959OWefdkzcsjADBmowX5a3fojiDB
tn8+LSKZAkANzeMOqQwQwQ37VTVun8uNaX43Cw==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 51648)
`protect data_block
VKbWMWxjaG0/FVyYjwXAvdTKDO0wCFSEceB4w5zs2LC80dB/ryorrUeqhtbvMYSY3SLBj2aCTHYu
+Jl7Cshka8IeHrUyDRz7/V5MRok22AOZxCtrZovSTIgEdpeadkpHd/Rn58SXTxbr3ZoZ5TLkUe+g
mW5pOtX2oITa99CCjCO97OxQu7SiMS3pDCQ2akMe2N4WEf1eo+vI2aHCkvIcz4zl13ryUdCD07qr
TM3gIUJAbB3Wx9Z9U61tS9UFCIHJnEQbUW7WNN1uTj5Np3knCQjBo0y1zR3lIQtxt9225+sw7fWT
cYnFMbSERhBc78Acb+ThgFbF9JLEtbnen1aO5K7lL36+U8r1d6mq1tfKm/3MmeheXi6Iq/sSSnSm
0Z8+zpD1+pzdAfXl/BkkJ44kTHiPhArEfOCCiADju4j/icKKzRYTEO+B8IQHAwrNLcWyYQvqfvFi
f70wnDvCiSAfuBJUIFiyW8FBSltnKxZlJsr6XHPv/LPYk2FiqbVnzzOfw86oYXlq/fh4DyqzWxna
7LLjRH7l85Ojo3qYqShVxaQM7LUUEaVGL0h4GZWcVhVbJQymOkAXh3PjMsehtsgwij5BLGigeLe8
0+kJMW6acSQQutlvwyR/FQce1NJvfXJSkK37MrM16emXU+whCbLDPIhX2QX26EjlyUcqpYk8Vcrs
9i9DGo8X0T4J6Yf9DvhLEtQx2/FB/ZTIjU5N87VD4KmiC/Col/UwMExgY2xnln3M0doZoNcmvbnC
rU6egrepsC6r6SU8nBE7mGLgK/LHGggWkX8dWz2hfh8PTbPpGTOD6DxASSVrQQYM4jOTNJyfa4iY
hRXnI/5i7IX6rKcSzIFXUeNRyX1x4Y/ObswFBLjuaKB5CGEQP+nxpCVevnBt71ZC65bmJjPurwxd
mrsTASTGZNM8ritByksGZRIdllYoQRPXnSX6cu/gnfn/socJTSTk0irlhzJL041u2to6VaS+JryY
bmvW+PARJUoxRe0TsIy81ACnWFYJV8uAXYUQvTbEGN2XIFuziFQ5nE2FgibKbWbRIV/jytEW1loJ
sWgR8U0Xc5zIOuf5Jxsl56FFntDnvXnwR11b31tpbkJ55gXhjHgJ5Tl1E27iVJlHggZcqdS/ow/F
4U3PxoVyvXs/yVc553cYcKUg9/rG/W/pnAcp4uYLSjnmW4laWKMSi8iThYvO3krcxGmsZbbVb/2+
rFwsDAApcoa3bHPQ2IpeAxv/RQlYV388qfkw36OhVwVGDyVU8yMw8BMUDs1OydS7lqGm2cHjAypL
X4LHuhwpP/tRlRfp8reh0iWeWP4S+xMZqtZ10yqlDQyEbiq2CUgDI1n8rLh7k9cyQX4/BoQxlS5z
zz8Ijs3lRBR+Tsm7z44+8V2qfFQRbMY+UqeLYjFIdNqZQmSHVSHnYb3Y97QUT4T8tRLFGflijvW1
vyq2CRldDyeuItpnfdeIxV5UIBkyeNg9UVSIbejnMskRx6NCA5Q6O2guU4Aejw4rROmONocDmbJl
s8My5Mz2s1EvicKddds2fvrWXhX4PFUR3kk7sIYLddc0QvJTxFu36sV1CUCptf5z03uMQYjfXW/P
JsFiGni498Vf/jFAX3UEGhQaavOQnVPIesao/RnyKzfZSuNqQ1KYcs6esVn+AxlIqH5T8tZnmZVu
ijvqUdB+0FcOwRzBOMrSAyIEEK/GRtqgV4djn7X3N6AtSoCVXXKJGOQ4nn2pMjGMu2kToj8lKJHN
VwOaBoxxbDUgiHDy0YGBfHi0MNzSEIqWIaYxw9oYElL0Hp90v3QQuhxM3ChdgPgB5n8zk4z2Z4/I
xl6vNiqThzIYhvJiL9cYdmScKk7zlLjdfQ/AdwOorCWVEEUpsevLKy96QLteseegBMfx0/3NVRWJ
9fSh7DFFLAKxL8vQ9ChZHlrYIS4alPloQ6O8fziSdMdVb6+Ky+TW6WaUGI0ElQDMsVk6yP8iplKB
cw/Cc1Cf6qY73oOqmg1Aiff5CmhMyUobWQhFLein+8JTht00jBGvEaKWFe+EkDgxKhJW3HYUpBbN
NnAF3rhF8CaYm6LSOsf7xl+Uj1q94Lopb/SaxqXwfpbrJDbaNeK99YQ4yHHLNfBPMxKUzOg9id1h
yfC/4GXUNdUBpjwno2OKTxR4bfFeagmfgnl/kvQj+9+MnKy/V1yQmWGPKkQcm5JVwf6yojboTCGc
ZidNSMl3WcXHpF6bx5ZputbvvMPZ9z9r6gis/Xh96R3SfdB3bUb1Y0vj4jz1GJcvi/+cf4PMIriu
cMbuOka2kQtC61exz9ztfGfoG3xptYSje25AYY6Oq/JfAGNJBU7bqudu5fEmcXgys3Zr1z2td1ZB
KTHhO2gM9Z7kn/jYo7AyKdPhKzsEbO6Qlw/iGFYX9qvGng9ON3nE/PIHZYusSFwjZcbAu3OJohxQ
tuJIPslCJ9j9TK9ktyed9J0CATzo84wnA/YYcxHJQl5fuCaIpExMsqyjZm3tc4S9r9s5h6d/fSXY
kraRlvAaDfcwDCrtUx1sHUGIkD9AOCaH62kQ5OLywjDMOkX4UdTO4d1xw9JPLCYBqBcsETaYSZV5
bQpykVjz/Sjaff54UotVLXIZF5OK06W29L8ps2XhHlcAdps9tmBrR3G6U5PjVU/vpkvvRABRPcig
FYSIbw8ryOwR/1x0I5UAzA2aQhi905W5OqSN2zE2AdrtkFqDmSqIScDkvPceRPf6hTnLgKKzf9pw
W1XdYuPRfygZ3C0s+u/Bfyi5TtUGV8LxHps6A358/0a66VuRPWDJhTcg+TdVKBUnvqSARmbboOrZ
6AT8mLjzpLKFHEXRX4wHnumxBYkEzSrsGVRw8/HsyGZeBzgrt5lTHj6L1lTjDaTkSLkMZj9VXfXd
92uOD0NFHwv+lqTu7QBgP+73nocAr98/auuMneCce555kJmpLiJdXHMEZ7HE085WBy4z8OjCTnZq
OsHyWyccIVg8A5LSmXS1C0xdUyp9N85Wu2TqCRcNd6fSwgHlw0f4cMqkLqiRPpW3ySvv+gBtJT6X
evulWA+k4QWwO6AW6nVzKAqbSTcdnSmpmsUuZ0ZrTRARnZjbXhCNJ6tjipMESBjRKbC/atQoN71D
E3Hcj1/Ly7WHvSw3+mwAwkmYUhkIoBQac2gKzxe+TijhFVX4PxSWQ8mzyvdcybkAI7KKJBA7cfW2
tK5IwXnwhrpq6gySHGKPScN1pVx04PJVzHy+IgrIforpZZS6KAbWu1fx7VKKV9vQvd1W6fByvfEL
DiyW4FiNx9SA/3RYcCtfCItSM/ZF4sgNfg4ruU3jhdIB2Wv4/dMyKvmRX09u5XC+KSGD70D9zmfb
+ZTtblQ9fx9gdA0L5ZFFa76FkNhlYe9H4rsRIvdo/KeMOVW3Jg8xWDyTSjBQ0qc46e9BHrIGRiM9
1e76w+3gjBKR5YX8mdF3osL+Fp27yfGLf3Hiyz9tLZTVrwweyFNP7r26oZ9DzGtemdGf4UM0QP9f
c/gKSHZShh7XE8bk4cx7MgqbElaWzFB/FILEsMuWXfGdKzTOdDxGme4JxaxWJ6nleGuOJg/S2bDE
04pkH+98dNLLWL6iI3VFIuBGNfZ8vHWPrJCoHkotdqILH+T0jQhEuATDoNCcIvPraBk/VC1ArCyr
XSgYWQCmyt6UfpdwuqJJ6H82nzSLOr7VwaxwFFfbU//Jhp6PrMm0qzboAuzJZY+dE+RwhMX0DfMl
TtB05Xhl9JrBYGWmYgHvroG73yrpnL96Sbc6/1suflgU0l+H5kYQmB7E/09xyxsw01mXI9BOe3ao
z23SMOsxLusl8nhnrnGU654mH/88PaUo8UK+8vZ4GCnETTCnybhs82dTq0bWaxRSB+Hj6TK6SCsO
tUTS51tpIHcfpf8SBXWpQbXkONUZdNTGImR/xzvhn6Zz/YohI91dBXAqLUvoWdn58OMCYLJePxg/
SnvNj2XAL43WyxQGAlGKuQ14daLiYH3d48jp5JqCddXYaUDD7pk3lHg3hkLBgdegjq6lIS6ahtuF
/zJLTqP52E1hWtXiC26F1PAr7s9nSUlLY2LKOBfqaoKL+AaDTGqeT5LiVcOV13xkO0gl8orojWMO
fugFAGSrk44H0+l0RrlNHmrx8eOWU9xUwlaRbcI5pmf5gDIm/xzgVz3cdCxh69yIN+0/3DqxBe1r
SxyNeJPAK0nmv6dEPtTRwMPwPViCwqoqEfiqtSODbAx5tAbojq6BrjqPkmMkZ+YqJYKpKv3ivjYY
iTuLonSGPFeFkS5m5d5nr5OUoBCcWuaUyyU3Xg1MTlgUd7nr3zIBUolOoYMadDkZHtlqH8O1e59P
pBELImAN5hEs8aJFJdBlOPsDPwrRWM3iKAh9J4sF2anOYT+d8tHznuvvTiiTgd/klx8RhO5M5VpD
P58t7csbcxFVN7gfFkanpvu2xgipInMaPnOBFYgHiiFBnmQRIPVAcyPJI1Wr5HKgPld9aQvTS9Ez
/qQixCVZ7a7JQlS6P2xTfg6EbnIJFfK/rmbXJix0yhYbUiSyk/EHaLAqhejfyn0+CH2RzFE7m2As
O4pCQDUqQsvhfxKtTsiCUZM8NkvczWiQ/cKNgJ0xHy2Z6gto/k+1iWACRIisIWbcp8UoFwdyoEbB
1rQwO6RFf79WemEUsnninKkza6C2XYn6x4P/cZnY3/hRj91Tycf1AbQFBJww+de8pYb1SGndJNbv
lcyv0+V56FYBTO+lyUU3blk3TEiYzrNphK8oJcS062mqevuvgRyUaisXXr1O6wQs5TExWWBtgJcN
mGnX39NHsBvo1LxGdPIvhRomCqVnw2138a6tIMj7czIb1wpZ7raVwVSYxJh2Rq1TBFe9GNDYxplR
sMKevUg4LFA4xUcv1QgW/lqhLGbMlTbkQ0CtgZ4HDDrNl2maoLbmMvLXmYup17ZS5+Aj686Lb1IU
Vpa58rePtI+yElaDTfcHXY6JWABE38arqYrpyJR52amuSe1C/fYKO6IrgFG672OrEJJeXECvaJBt
uWwaMbmT8HBLi+Nac81EKFD+4ASaDd0w0HqFlxhevTMMd8tIPdHy6yY1V8bI3QKBlcGUfTqzDdtD
UN6NR4UF1ZTF4tZzel3eBZVa4WKZFu8sfS7YUhpG4yu9Qn+V73jDRwA62Ny8gqWwqzGlsn/oyQMJ
8XdS4eUJ6pJtjxNDWFa61sIF9XQIcalJOcv0DpvrA9hsmA0MhfGan+UfpjjEFWXfSuD6IW3mSZKD
N9sme3zZ2OXzolWUvncg6L2DKGoRqnUIoMpIQicL5mUTTxD1rPP3uJlgyv2XaSsA9FegoXuva5yv
NH9l0z186oD1vo3VCpc6qNyE6Shbd17OrLC9GMhaJpSGYWrmVxjVN3JVkJfKuevdLB1m7TYCeeIh
JOF9GppBlA4PYDAoYfT9IHZRWSgkaQulror4kC+iLFvqtTVA4LYMq38zQbKRTBvmA0pA/jAM2fPw
NTQwwtbK8B2+b4htUvhrQRrF6Mr/TNGMzjOlEAZmUW8AOQAWqSLUvHjyzvRzYm5ktoovt04+iNV7
w4+4fQ5z+eMyzrQdqZhAQR0Gj02Xtsw48XQ6ksR4OUADjPYrid4Q+Y/cdS7zFVfaih9DESogH70A
hBb1Q6n/qCOO7CrP2tYVinuKK9n8vK6aC+b0w2Xc7UCF3qsbNBjU4u8faV48XHeQlxtxuTx/feq+
UyiELbYI1wbXzTm2xhzt212K5mmO0rx1SzNc5sb9LYBaOihI2zrVOH9/qT8qg2WOa56x8KrBMteU
cdjq72VZhubBviVH8Mm7epHmHlm6sTSPMZVirX1SY9kj4uIBJRiMdqn8G+yEc0XcudQEBYjV87oM
RtZFmbar0LnvKSc0HwQn7is2aXBQzI10mB0g2ZGVII/rfhmSh28w2bPrcaKqo8IIBzo7CRVpRh2b
WC687qOhvdDKPH5iBlztsop+OzcyNtApbDzbvRJFq9yKhUbuTClkl9zBbDpjXYcJUWKbkWeICgsm
E841H1V7SEALn/wx3Y0F8gJ77qI0upgON/Gnq45I75wcGQkZAyzBRn9QC2rgbdboHYH1UbrvrSXm
OdDGJHmXNkiawGTAYsEkys10t0VP7/sYW0kgPG90pFXzcGDo5I14TmBB8P3BZSu1ilSW/qE+UKyR
pShoex5SNl3IprhdsEXXwyLH5upCCraUh+wsCCSet8pttM3psBiaLo+3g1McsIexbTXX1Ngfw4qA
GJWAZUG8LVveqjJ5vBfrNW+2lpeYLhfashItpnOaPGYYmpnWl6O3Wr7ORVxC1uUa+BfzfgRCHaKi
XAA5yKKb25fPrcmciWGCiWIqiwbJSCokEXy4KLX+H6F+mJDa9I9gGu5jS5UL0QW2HIP2lNd42LPO
Hm9jDqjCmPbWlIXrSkSl90WrB2U4P4aSX77bqMnTxCVV08M0PJP8lue3yKHNjyVMhbP5iwGdwzaE
hAzVhsaNtpW6ZNy5z8FcWCjG8IW3b+1/s2vT5idJk8uqc2aYeWapARFU2fkUgs8zSK33Zo+sYBVf
TcfcQnMWnywetTSnH/ACjkzeHe0cJyecI0XEXxvwLJqxah/4qNrjZJfTSGBxXCSqPdGQsYcCHLHD
j64DCePpGZdPDFGqPDU3DU+gy1qA6R5RcFos2OZ6nYOFmYxoin8NZzPnHqObXLNuTlsnnYdzTM+T
9+3O9fdZtNNNyNY5OMse00p3U2KyClGOV51lc3IsE9Cm2skHdMFwbqOnvEA1Q7Y81C5Ng5xhdpLG
+z7b10TGF5GNIv0pEEtavI4SQjQEf1vpoFmCmRjt6oLAtK0NKe2H3vyfIkrLrElA8MmMvEMsOOyN
mkr5w5in85Rr1JGrK4HBQkwWYiQx6xa6nu7BNBYuHxxnwY2zh94uMJ2nfZ2WRMiEm5HoS5eLE7o6
kIBfKveM5ZXNF9ElzgyFpAQeL3v9Ra4bgN1yNfcIx0AiXLQdv6bK2YcLYuXqmmFwMFkWreT8/Li7
aPZhg7ASa/9pOKxv0XR1rxcYmE/yPH3mNecdCsQaoZYnksSYN5/F/2RU/XrdSgVYWL8AaqnKWc0K
SQcIyY34GfCSaAo8WI1URD6MB6EW8jwM7ghm/9bElsfvrNzFUhpk0AJhJGqIYIfBuSPSENSGOKZ8
k/4NlxEwF6ta4UYiSUyvhRzw5Sfi43SBaEQN4VDoPLtoev74QzSAMeiIW8BAGmyEvXlq282RY1v2
hiiEi0K3ql2Vm1/+0Cf39x/tm9Objus/s8hw2pYM5If0RL0T9/M4ChyrFeCk04Ice+dxHXmWprMx
HH1Q5IHHtXl21tNbNWYSMfWk/r2NASoHr8QaH5x5J5VHVOWbC4N1epT18/jGtdKZNiarmIQ459ww
mPxWN9GwxIM4L1lvkkxAFeuP2nzUzQVA5ICjT1gi0mUEMmbInekDazwoFVZvF+7ApG+bOenwnBK0
SI9mbt0FY3RCi/8XqKutLZH/dmywWX/1o/LFySf7enG7tXwA2FV6UHF546euo/5vsmg+Y9ClfoRb
xymvsYdloSW3bmkh6nt0mfYJRKpKrZ3j4NA6C9VlAn3ZY+DYdq81ueRgYc1zP/r4Nm3ihpxHohGh
Wr9aMtrisVIWKmXa9nOsZgDJ8/3fVG8dZ/4NTYSJOngHvBGSX4Ex6YmontjUk613lwKHHyVTDw6T
2Pf0DUzPZB1pj/hHavux4pFNpEmYFvZfVqqPvCiAWHxoXgx5b4ObXWh7VDXzGeNAB8NZyHsNo5PP
OzrAXQS5f5ww33KmUsPCEbqozq7+BuGzg26IN7DNW8kpreYqV/EQGnt31VfMDbqjWMHzqV9E7MTX
BGu2e99vDpGNrylhLAisWAwMBrCGDeSChCq1qBdzHvL1twKwHnkCbbGbv2u1tAn/du/hMqh57EHb
6Es6ojNXjaw5GB+L6vxqfbdCxxNofV6a/j+SfKZdq2/rTLCCDgWFQfzSRMed/m691+Ph09FwMrpW
dEU1iO/65LCNUD6+8Za/zqa1+U+tpSbnHTKwEQt7PruOSXAIn976ni4UGvk1FsWN1FULWEdarmt7
YfPVFBshkJvKvmmWafPyr3ka5eXjwpQYFs8pdBspPhp90hBrEEJGjRt6lm/JTxQkjca2qPQp/ydr
wiV70YHhKB03gJq8Y6jvDmQbtoy7iE9d7dJr3vwZ9u+rSFZDbGExOpGmbZqKMVrXMjbDWxxCQrc5
pvUG+CVifwLHfYNuG3HvcRaTJdOwkYlBiSyhFou6lQDLbkzuzdMeCLOcjlVtnOvpvLOje0oi78pC
G3v+YRcTJYXVs/XdCZCV8lVoLGOdfeyPYRKEc44aZxbEzQXtLFotCU1bhopQCDQRmsFPhM7GIyr1
yjtZvK1iP6mvdDBocvUZJ4s/SPXaSRiZ0cMk6h0qk4X4zKYoiLZX1rehBJ4QmDsZUUTxXukQ5dPp
dnd8GA54HeJdTa6gjMCe9w1ztzwfalE97/pc33SSF8XkZuwK8E1s4oxqInv5Uhz+jliMFoEkLZBL
dzlsw4epO0y0wQFOy7HltQS4oG7D9sr3bQ3NA9miNFa02ViT2AgkZbgE3DR5ZT2yPKQnFp0AZt5/
qagzW+srqKxz4VHhXbNULbw69HbnIWCpHGog+QwOYQeAUDPEY/RXjciVhuTiDGuyv1hrKEUxB3hV
fV9cN9ZJ4iinsRaqSg5hFyGHqw/dc2o0/aPnFQUGmjpJnl2QMy/zHNWcxlTjtkN6YbpJr0goGTwd
5nqfxAcG8wjZvNbb/HPhy2XWECBR3bZRn44D/sa5RBvQbud8uISPimm3EBSqSIvlS6+XA11NvYKj
prcI/fsjnefThncEMb0nqTFpFUMYIQ8ap+mLSKeN1fXQuyQ0fy/QJ1i8lEOl7s3/1SQ4Wcl5Vmcg
7LqobNtDxxMw1RYf/77nhklFaJ0S94U5xZSz6o6pO2+0VI1j8xnir2FLimb45cXZRQpTitLzppv6
RBdBJxHx+k9TbKwVlo0Jwig+tpKkjyLA2DRcTpWG0Mx1l7B9ICTT8DSdj8W5zm6F077RLyK00TI8
ryNYVCOhPEV3J9qnOvwBM7XJLEdcPfCxw2bfZmUG/kW/P4QC3ZSYrjNkOLgd4erGqPY5+wSUTE/w
VDCjkmQ3iGn4dQbbhGe69CX+Vohvaj4999zwiPFJdJTvJvJeWEoyLMjuhUMFcCZd0d5sGC2OX0BI
598+h1gZsnU/FP24C+qOBQNJmucXkDUqccxNzM7CiwkX9Os7dnMD315IzjmIG6SLAqD3Zsatfclq
ZacqZy6v3ENscvzcB/TxjpPllj3V0uDzVsCiOwJqyfxzfYQLzyijFvZx9McAvGdETV1YixFrLMws
2Js3f/LcxZMNeNM3YafZYWJ88/+KP4ap+yC29EqCYNPUyyny1ya8cZKb/HDK3EbpD5u3t+/46+tF
nj8+BdxAoenWq2j9O+ZP8gQnpjEYt96G26hPP2341ekBbGnh2M94svEOx/Az+wbbGf7wju7lWzfy
1mDLkZ8vbRFHqP6sBqY6P2tEwVbTiptcg6RB2yA/URB9lTX3fUMOw0TJDGcZBMPv8Kbb+vUBPyV0
rsC0KDgAbUxiY1JdusVdlJeIgfT8+5CVEMF3+9anrTXBYgd2iYkydwIBPvq2S/5DHLx4A41Ygv89
ndMoGxEfsmg5oinnVOdkHiWGeubl5ZZ8RISLqmNgRxyKFczakIGxFg3AP0JnHzXwtQNecUDq3IMf
fowU70hEULFbByPRn8RA/oa4cxmEKO6JsJhayeZfUdu8SVuxrZQtNDhLym2Al7a925GOo9X/AcHz
sM2XYCbrylqLJm9QfMG37n4816D6LpObzYprgjjVMNrUKG5DnUiyw8D3v0XZm5+/uscnbisMH/9n
KJ1vRRqB3DnJanMqGJQCf72/GOcaakiSrpaWZ+EZfaEprdz3bZou+bFoLTsez8pD4TkBRqQfTx/B
E39/XgYvHLi3LcQQZ1JDcEoT5PckEud3RAIyiVlOplm+DBJxDtiuGTG7gKZVNg4kl+e9PeIMvbud
5NXjzUAyJCfPojW+3Evufwuyacs7XoYmgWYEGsOvCvLMjMP4Jhv+X96Z6FjWBdi/q0kZkHvBKOoZ
xmYabcOjVV1JQkymeSJqnQSVzo8oHVj/YBpFbQBJGtgVm2eUGcyg/+zCBaZBzM3ftmLtHIy4tNr/
qY6Y3Ivpt8SFlQXKgdCkRXfMc9s8mvIcT2sgSf28fbbXNmNYILFRUnmrhIEDG+C6E5No65b7/84Z
oZz/LX+1yOJFcwP3BwlRC/J7Gfi5+MJV0lcym/TGCvLTNGZXIid/uX3BJQqFV9uLtCQGkKnSucqf
5gSrEAxtAsdjrOPy5fYPrj6dES6ab07+tpMILYbZqQ6W9S7msFzN7H5K34slw7STPVs7jdjQuw7S
hir9Lmkeciu/et17mYqRFgVK8xJv2vLoqbRqQDocbdkKD7gk5VBFMt7mpo35qP5IS6YDu8BdF5Aq
PkVRlbuhLsav4sd/jAWKJ+78HPSmScCpZUZIg82YBFxXZtC0R9MOszNuNa+znUbdaXOPru/ZfYwK
9hlLHQNNfgzuAFSUG8H0kveDduCTLyWr8JwwuV/JiSJj3cxJcrnyCfjzutecceOEwv34ExLLvX+W
AF065mkUI0Lx9R24SkEWNSwarMjae2vk6KP27wHWMQ4DHIAseLbhFV7Z5l0HH3tUk7wPWWxNuQjL
smxhRyRUSqRpiWsifHw1NJ4tL0+BxnbS8bblTnLHELSUHJ4++5PNC7QZK2E+Cf/pu0Q7Net4iT7M
C8ekw6Sgxci4oKVQ9WJv2xD+VbXzbCm8fTMFiJkFD/zsny0yngVJFuDPqdmtY6ZLgV7v4R/OulOx
hP+YUdpfXutpQR8EpYXD6CH20IRz7rhF2QVN/m+bf7h3gyBMl2IYSbFn3AVAaHqYHw/R/R/czNHV
xr3nfaH+YgxzeY49EITEUPR6/sFsjHNMGd5IsbX6G/eDmDIgNZdx9NSWSKgo7Oh0RKPLyNOrIpDM
BHARcxB8FqKeYQzVXsM3IWvn2of/B6HgOUdw71vyBW7oZlynSgpdrhSzt5lHxrAox2Sq5YPBOOc9
mRobkAFAmaG3OPofVymSy22BMZFLLI2z28GL5l6hFXX/j1R5kie3kDve65CZQARVIlguPpiK2cwT
cW+Fn8GqigxAny4xde1FsVUzH7YKzMaStuDzM3lPRzOQQmP8qIk+coKbGuklWfbv5cXaRM0/9F3c
N0fOs0hPz2w6pSqDx0BzSOYt2YyAopYPHHU4zj5z9aDoeWYDNDRbwYj1X2Xke2I7VBlTlWSovO9h
rMem6EbEbuqkaNbqj1qMZA2sHXAcQqbqU/0ba35ja7VahdXm0i42XN75qYt9sInekcizcT6EOHII
NO/Gv0zov1vUG+NNkxq/h4oUMpodXlyrcmqh6Tl6qlzEZQiV+6K0f1sML8FUPjatxSVdsbgyJvi3
MaLFRkdO6VGS8UABWCot+aPON/C5nQeROO4q8I6sD3FX/KuQoQOl+I1e04gyRJWOa3av8ldVO6po
SvfqKgD4jPa4eZJZZDkQ8RxGyI0Fkx30qnt/1KLERQrWVD/+usekEHCwYNHudnhjJkI/NuJZJwz9
bp5Cedhw9Xnv4N8RAfMOkPEolUPj8+8jCdDG2HnCxzWRhKD1W88y/LsOoiVxUDNgBqV7YQlQ3aCa
iUWw9mIy/S7HRtw6kkz4RinBnKj6n1F5L4Q3AVeUiScWLXbrUDzIze5c+BbdrY5Kcar1IbchOMPJ
PqG8wRVFdBduZZu71aZYIMMcGchTGSeIVw1GUbav5TJo2b4WKASE4mYsKU0Dzne1fhWuxPgjuArd
tokpJzyadNq58xkwkdYpO4sJUijYPxRntjmtPvrTG2TfxQ7Dz0EI3lW+qSjYHc4KwkzMMJpB+99N
m86mASnpGQQs1zYD+oH/qgwyW4ofuLsHECcoH+60leRYlc+/w2jq+TaOzIhPjTeB0jhPYm3FPNLh
AqGge+jUawIpd7xs1BRsSlZMyS/i/pFsk287f9KeXs54RCB5iPJ2zuGJRnekJ6zm8cMksroXrmcD
yrwW5HURBP6kxSTZD4vV/4B61kgIEp5Y7wA1D4l7dFqNkCE8Xum5WatLRn5v9HSeBwJHjDnmTf2A
n832CYSKLv4J7Crkzk6/UkApswHyBuCpPrytNCMnQSzWNSoz8CjLmlCupkelyOFj45oFXWR7SGDZ
8JXY6VT2fiFMH+aEbwjaOqPBf05M9B05Ko9z53qDENflDtVEu5yRxsPoNXtvm3qCesI0CCYv9uvz
iFskraeB2245iestoJw0Cf+aTbxeUaVfdjAjo+sgGO+YikhwAEKarVE7sNXLIuwb2YYiZoATULeo
doI0ewkG38i8UAzIWrsVdJdO2SHjMWDAWrm9rypwb6HpJSDaSGNgDJHrofV1U99v35iviVfsgbzo
lGo47Su1ZvDGC0UpbioGg9eABzQ3ZjzAOLKV5c2gyM15Vq6lEDFKqVI2qOUbYFSm7FEdcHUcbBD5
SXNwcBKAMhioFLmj71sK8NeQzWw3F1iofNC/A3fWiUinc1DFE4wSapf4nA7Q83D9J2XVh68McidD
ZtVtE5FgSyVg7b4seiAnt5ZEiHODxxGPbFW+/rjZpzefIgAOqliT06k9nplA06RNvkId8Fmpg3w3
tBPttPAVomCxIg7xgkaOeTtKmiBPEVnT6homJOpCsztu6cTsSxwuuiE+pzIwJO87bZE6875Yes2g
o7W4d+DALtD4ctNibBfrV6l1n3p8eJzwP9p9tpraKsfP1ASMML0sxoV0nEjMgg/KAKe0KTU0GOhL
pJzJ78GEpbtR2CWEawD22EY/SGU/3ntEF+LPxO48bdQefQ7g4+2x0e3xkzw2GF2hka5sJ+zepA6h
KqTJ/4OEeU8Fk9fHDbCeepUIJPGmil6B9ocXpITHBdleHCZXbJoQ/PpBiXpUKqVY6sAKbnrUYPFx
zMJaZQDTXgnFBWKzNw2bgaoTmmCRK5F9Z+qg7KJi7RrGmQOZZTRbuiUmCwO1LcI5Bi6hKl7a2T5q
oKSzux9yBrWRsU4wCDC7NwApTEEw5A8YTuEMRYwzAfxykoyQR5xHI4ehMA4BoD0oYJ5l2wGlUBHl
EeztqG2YUfwvfUClqBFzhXTJtgH7a4695G5oSoXLVi0plPdGdoDAVpWl5RxUFCfpO/657pYeQiAv
rwQA9oHVe0FTfF8e7OJRYp9HYvYzUQHafYQeP08puvF3Dje2uWC2NR7R5SDZxFSPW9eqPR/QS0+r
nRtRwXc51YODG9vSMUx/iN8wdrxDBgySV3ppljrAQneKIsvOPfNpCUFyqA/GRnS0P5A6IK/EWstr
X0OICAtZV49RWj6ZwyriiY5ElOUbRMcrfG8vt6SsjfN2m25Sui34utdrwYdXNhv1G7g1I3+jUnup
5EbKdy9V5rcmK7wKMQBwatKkUVP1hyc3u9vUlLFNqx6KLBmtONDuYqWI09XzZx/mREfXuTkmZDPY
IdHohaXwEBtLMPAy7DUYB54tiKpUWl4eqYmJ+XHRGUExh/WUn8THFoPXhsNFfvDG0hXHUrRVMfzN
uSol8mjJJsDRT77wR3t7tYOSS57SgEGRsfemTKvNSuKtVqHLf5BMOPJwiW422MfoYOJ3hGXJFZn7
1p1+8T/rN4KVVkwpuwEtKACIuHmVdgeLUBLaFDOdMMfmZSmXv4p9EKRADwLJvQrUg9+ZGOLasdGk
jri+r8LVCO+VW1Q9icRtTQ76klK3w04CLjCMXW/xw8zGomUGysGTiLPGWu+l9uwzsQM9CFlONp9q
IqYrf4gL7n1iScZPrWtqstSi2GfIuef7Hp/MryUBYCeRVgC9yNwWYep7uoRmgyFXFApdLRN/SWA5
YEBSMTwywbGh80G4fO+oCvxMC/Zf14gwZkI8GcYtfoU9PBfVNik/KdcwU53fTZKSOU+4j40zT02m
Ko3cvFv9ew5YatnJSEP/ehlRVOLZxp0aZkyWqEs8TQi3m5X5aH29YoBxZkVzvHDfSsyMTGcQOBgP
er/aIDDTc0q2kWGQVs13fQSytharQfgPXIGcYXRJS/6bHCUN4jpEBIbSV8PTryUbo3Gv45KMGt85
obm2ErDayJ0RIir/wQxyDFansTr1TfnwCk9LZ4OXdNpbsmyF2suwSNjU7L31irlcSYR/XGhNk18Q
aohw/FkOOJhy/Rl3zCzt/ulG0870yXMukW4bdAb7naAjxny6Rh1NQy/QETSd/3zhw+DwfrLmBrCn
wjcOCsPYnFyWG1NSymYikRtW6pvIpwoAzCHiCDdshnMSCd/5vI6PxfMVC3RjPJmCXzat+NVTFvpy
0e/BlNhglCeEh7YKR/lu7w3lwfIFbOzrnatFT/kBAEPk7VJVwJQL21vncnvvBcbUgK64nC+12sey
svU1xYPQizWjH9SBqnGvo2Mx6JUgNZqMs1AnHDCDLtYuI4bAQtsRTtKh/snzwq6XRDwtjctnLAzv
BqU6ZDd1idaT8GS2sUP7YP2jeK7IK0s7o7kH2lKlJxqxBg7Y1W8zap7nVShw/g4v5NJq+27Qq2a0
QYzp0slKIgLl6hMiUhIB5Pjaj7nW+mI1tcTXYb/CRYaQcwYf9KcGtX06yo9j/IB1NJMVU4nUYMq6
tW51hOzK50ZWgXJ88Gv0vutxxHCVK7gbArTrEj3GngwSpuqEa8RCwBLTQmkqPtKy+LK8oujTgUqC
mkA6Iw5e+8O9AP37Be8y6KVgh93KoXGYbqXc7TXV7fm27Mgs+YtLDEg2wlp++vWCd0Fv+OIaDNeo
12i3tPuE4x3tKVdZrYeOTVIw4phgOeTQGp4HhxUb4ukU7eHP6lFEBjOnpF9waMDc00DwHX1RSvt2
5gzJ4a6RAW5acMBNBahuwvjvIaQK6Pl3/Iu0NVhxTVZpy9aVBkrmDHBMStPQbTCV9kO3LhciBxgK
5PQwC9EqeruQhEQpyh+6RdNzA+xJuSOfC/W6pU8YT3GKQ8YMJ6wTJyQYMeY4xbe9Q4KW2D2Qcjwp
6ddiwDV3/ahTAGhA5tBz5Twb6fx0Z/izLaF00HMg7QBBhHeqo6vUHnkAeFqU/kEgVLH9tzv/VdWu
Lq5p/SocXN2GpFpjt0CBCyWOXwoqmXS7Ka8jYxpK8jKWOfFP+qqxidFKxyW7lQThW/3XdoLk9lwK
A5BttSb9ZFL6aJTvF490cXpVipNXlT7aICVI10N79A4Wv8O257gLBOA4B636wgrcPQuvC1/FzSun
vrr9uwsrg4EBroA/hFMG60KgAZo4TQiJ1ynomX2bqUXc+49Fy63PBd2sCNCDHapZts9LQO8mRYFX
neViytYnGt6L/1XmBkOV2NxHRKJ9YqCJktuZaiQYVEkXqhTLu27hk0Lsr1iXsHiKZgSzf8g3iyi3
o3ySlaLyaUfs5FYamhrPl8oBe1LjOQKF/0itvzod4ZtD+zjuYg6cvCEoy9kXyPyCNjEgYhNSqG6P
HEFx3798qXBjnRBzeb++l+CCFtc/mF50Fxju6Z02bXaGXycrLIP8sCpAgnqammG6NW7azfqGwho+
5mY0SM4a0QPfuiJXMr5lHFYc1YzGOrl3Oybj4Q8hGtRj+Hgvnsc3e+sp+IopWtmdxF9tPqU4clDY
XtGlCn1UFPvwBHyBY9n5EvdteiX5qz91xS2FDJ3Gn22l3ruJN44LwFT6ggRUQ0nq/udpmI6J14tn
Bw16AdXJiF9J1LgIkrRB+yMzNCqIuLniuxHG/tKnzTLhn6F+/X8MkxdDpDdzxh8mN5qSlxVhRQvI
sksTtPOMso0WBcoY4UD9wm6mih7yEMruY3YQDRedR95OF7Brc83cyRufpLdAQS63rLFP1YsJGkRo
IBAjc3atQ5pPb7KfofIAZuFJ1+u9+g2GA5PYjAiVTMVD5Ai+86Hv/KY6OzsRoJ2JnaATy8XgJLow
ZN6LLXhWvIoCbx/06UWPS1D2CsgrihYRIgsNrn3pnZxwccYTHR3D/de87DCDncBeWy8iwAEmC/Jh
wrKZh6DwEi/r+SRonhO85wMQ8vYbnw13Lg9nH6U9+vRiWC1j6sBoEiMtkLz6U9cYcYkRfNF+HWqi
4cyu9BIYIt07o3q2vku/f6Q7zbpEOXw7RBPCP58I5G6Y1kbD0sj7dfTT6QS/ABo1Q5snHVT4c7fV
D3CIAB5WSc31z5oe+xDeIT3pKlvxXLUfApBhTpuP/pIoOAHO+aH+4Ld7X3aD0H2IUlArrO831Z5G
4Z/mRS+H9Ho1NLM1xVU6fCa9BLoHdal91BRjlRgZ1lFpJaCfsMfhUF0eiPO9hOrYWwqYru3niaQh
NdBjc8/GH4bX6RwwBIQU/1w/7I2gU9xaW/tkTcHn+tAffDVMtBlXtNzP1EBFqUl7HScCSbS7smcB
AVJ/NnMPaes56pn72QqOYTCVHvdb2tiAMweMqeQ7sk//eWIdWTsaXNCeNVaegafWfEl9ZiOzL4IZ
f2KLzKM12SaBIi5C0AWpECeMfV3xzUfuTuIzGhXNyP9pag8t/bJTP7sANzeRi/ltehgAuZ3KuNWq
Yhnwl+HK6EAAlyITKqglr19jenDmylhqO6cxtwo3R8ZanjG48ZJtJDejkg0iWY09Pb5qruzVVQAp
6zEzFBYzS2cF/bedGRMPwsosnfhn+7LG5XGV6Lqz9X4H0HPEcWSHvBdthuaOkF8m32WzJZ0MhxOy
yXgLNFPunWSzqckOFNP8z7tM1iuJY1+bwnDuYRgjI0fnbw3+1bPjpVbBNVWe5Zvumjobtqgkkqm3
ZL++n/fHPSFfsu2UvaGbjoDOinHuTqmKELMKWvoIWIfp2V+uMvltP83TNcKgf7KNU1iUf3U6dT6j
BQeMBOXyn3xRMRAQ8aVR5Sv/tNwAFDsxqa5RjN6d12iL8g/qjuvN5nsgt1WBGHyamjq4YgT421GB
uS8XjCeWuSDTPiZPcWKAT4EPVwu8hKvxdNj/iORMCNR8DG/f+st2Ij9+oxUCn2AjmN8mmL2NL5VY
WSs/rpsyOiCX66V3mT5ayukkvK18CYMkiY/7CIMv59fV4Mx5Jbxjcbt85ldMPxeIJZfIFehvqG2n
DSDGXmphn1GM9tAxoUa3JIbBQUedAMm5odPXOig7AVL84t8/6pHc4qmersT4u5vMeuJswdFhp4Ut
Xl8w1AnWC78PTxb8nxnM/Of3ZUwr2BoOLM+vIIvm4DOAgx9ua/XJnlGmKauJKyPrHT5EwQFpXEbP
GYQwXRUsGpM6r5l0riJK0eEKl9edBCPhqBsSfcmXVqimCSbKPWaQ+sGE5U5BYJVec8iyUruqdeds
xLqYcy0c0qaaOm5PHEhGozs9M5cvtlCQmVs+ZFz+neFavolpRygJAUQ3QEkINM79Oqwk+xOYsR6s
HttfH+QVvVB8c+nWR9w0StlC7SIA3FLTdY5qDAce5HDevY1A48SJtUeAmN7NazKWMFd1FQgo15Nu
jXnEYhUuIY3MMgcthBvU8729gB2c+aet/T6nCyPpTPWgauqpqSgl/bFv0jnyZfUFEM01vmDV8MQZ
dAmFPGD1Ycbk2baJQNnxSFQTLNozZkZqnSuThuMdH14riENp0OfLDmhoHTkSP7sNREFsxcmUBIN1
ZvTrgEFhav3GOx5nTV8+VQRLFsZ6aIMEAM9MQlgsXuQwyDAZTj5U4yLfJoxn2Pa057NWfWwOfyhO
LAH5ZwhuqL22JReZiEgceohhHnWFnAs7Lzc4qMsQbaOwhYSC3EbTPJO8lKgSLQgNg834sCwR+NPX
0ky3XvJFQwSfqJXL0LpsHUA2d05g+IwRuB56X+ORvSlfqMiePf1dRKLbEPybxP+YyKeuLYIGuEvM
rHp6oytje52ci4tlettB8Sm/H1oH8lAX0yxWQdnnWbvWhN0uNDJLI8d1T3JqqhDGWfQbtfwHSc6U
dauzCJvBdGBTlGGfwD7EqT+LMs96KwlQKZntc5if65yXn/ZbYPS2uhvxEEKYNNnu76CE2II8RIsK
t4LsAZNMmNONoQMKGVGszLvISrds4l970FaWvWLQ8QI+FjsAoeK9ZeE4R4sBdJykvw+Z8jGeFl1i
rgDB+gGjGj57VyVLC45baR3xaCKKu3B02Bj+TwpKffyIDGwCpSrku2nyJS0mpNTI8AxvXU3nSqlb
dWnzlDaBbCZrHaQXvXjweeMhCppbCCDQAcOF9MAfnMy9v4Eg7cvgF9sUmvacYFY+b3JZIaQkZjKf
nNpgqA8uW/Naa0Ig75K3boLCqVWIKH/Pgj1n4c7CCVSM37LzYoylhaVn16FrhxeFxPicBOT7+FPl
x6RbvFwfIYS/0FE+4VE5IuMOFauwqLiIRf0wrfiLF0akFlc/y4jC2DamxGD2PnbPIFZph7VXIFc1
YOxgJGEhBxfD/1IPn1hAHlbUL/DPpbJ7HG3dXqlBZXNRNYbBredUe0KBmiOcMP9D49eMjAalM1NE
M2yBsOdpx1D25rat7WztXlqvLWUQztzkf1wZ9hN/E+/qrwN6D+PtRLVudqXCTnBNueANnT/j0kO/
yNe5qJS7m15wN32yyW+yCNyXaaMRGG/bDHtjQVisXv1/i91qvOmodjcu8mbD7j6dLHBerkAhwDLJ
Esc5y1XWoeILP1orGiZ2Bg5bkjtWYvory/q/f85JliMohdj+4f8qPK/sR+FlkP7nlo23g3Kdikw8
f5zscg/HB0oN3V/lQCaxEMsnzJ1XVhlHHsi9Annm/iWUK3JjgDmmFZWQhuaX7iMfyT4NeRUgr9Pa
P3MSTNivYyHTKzd/WtzbdSaVIp9yEK75nlLgQnI+H0OwNAvGj1WOCUNfve6wS1K7V/GgAuZVia+y
dZVl1MjNJ2EZK52SVnTaZsgkjxzBjzoedpJVB+koCho4Id2Z1RboOnHgP1KberB1BnsUjIgbE40Z
rA2cBC3aNV3o2x0Yl4aHZ3XtaznvDniN7k5EZf8lZuWxMhd4EhhNbu8oDPEfuP3byFiThkcp15gC
wPTp6ljNGInayUFLNKl3qymLgJmwcgEXd6pCgxfAktLLT38hQbA5Rci/t16eZ/29Z/j99O7Jzxa4
rs8pKqyQaWgqxl6rZsWBEi/NGL/YxL9xlqEBYzG951zdrqB6f2jFZwIs0oMBKYeMsuwazFVNyr+Z
8FMyIwj9NeoKw91MhGTfFJrMYe2j7r4mzYUDt3k+Mc0xijpWGd7jamo9BisqHHt+1QbXbEIXzggK
EFyenhDpXTDK+aXkDQdWePobDEp45ZBtixR7/WMtGLc/qTKs9OMU2M4QQoeJWJhyBGyKtiuGlzA9
k4ZvGF9SjOwTGmCp6iVnGI1HPY82T21ow6gJQWjf+mBmXlq09k79bCAewA9jZAOliNVCyH0dnMSF
qT9vGtu0GATQubkyE1uP8wqgBVWXW5Xd5PSnpRZJTt8lj8GtAb0gQi5khFU/B7LdCdh4hyahHCh1
AL5JbzVCyJ0MIhf1AsVbF2rcOck10w0hs0o7wfXxvGQ+pPSOpDxEkhe3Q3Gj/5jYEP2zSVbTgkoh
rFqkydODUIP4dYk2HR1cPk4sZ7JmuCWhbelsnGBQ07K/Zs9ELlE6GPE+GGT5IOH0bAs8P7+DdO9t
QeiycnQzPc5xe9aqJwu9C0XcN1PB42JAbvHwh+EFl9wHoDkLIE1dltNSumktNo5nCUtkjsxKps2f
vevOyPXPqP8h29j9AWzCFE9gX9jPSEqcTRxDaoFTL8b2CAsQY+CaK91zpJOOvxmeUJhyMyKnmOz0
gMs+xRXbjAJU6Zpm1JbcHLVND40GPqy4pB7bR46W8MrAIDfBj/+cmizPNv3mNeNcMc0yo/4OIlWS
pcD08TCCN4ma4eD422QkkuyaPZjwDrFD1HR+17o11rJwYsT+sIosNT4tEND+sTSrfADiCDlusnA3
peJbxVSfezSvVoQEmUfWdwjhUErcej86D8/wkoC7RF6OccP4FmJjpYEPDPLdRFeFtZRTtoj5kUpv
UivVJn8JlR9MtgfDLCAlT4DqUf1xD4JulHD1h+Wbmwn74IjblG8DGxElFy2sFYIEIIxFJhZJjqME
zKcfArcOdMhp48UcdRIR2VnpcOq+0YD/0zxMk8AMATYCIrsQKyC4F4XjgjlgqKGwth82LdtIN93h
hkrYYaZm+Kn1DEJInepaLwP9E60Ud+Y4073dAazMolMKUEHPNt1gxGLH5OyVz2fn9zWgu5kn+iS4
P+rMeXvA8KDIB0tVCUpmrhcO0NviZxeW5wlEyvjcOQt3M8KyGQHAr3g0BHjM3ZouC7GdFxK200EN
GUMzAGFiWXIPZTzaKgsMhscN0J2YwRBPeGsjsPZggRU0Rtp02t4AKOYjNF8XBw1bez1rsbAiScJ9
WhWaMCyyK+hGm8oeTWuT79r3y5aN0rJ2ZUxkcoynJiI8J/ED1ztcGYIIeJQ1jrFqAvDL1Xjl63iM
AyM7eFb5KHVE/IDwnog8KDuSqCCyPU2+T7L3V/kaBsl3AEupxzq6EYFkqR2553g2cUTpgkrjx8ih
9IQdNp48XFX1Hk2PzbilfztfXHXlwDIImwUXnf5spfkm2W5nL93x7/r4b/+9cKN3CpLi/7+SG/aP
E11Y6OFgWQwbvXgrAzi906XCr11I24olqWQsdWXxm/SxBy30UaweB96fE8HF6MRBULoQC/XKR30Q
lZv2Toq93JaWt3MaCPtruBLGu/KaxpRQ4cOPalrls5kHi1XgYmRQlDFfAwQJm9xGd2RtFxyZLNJd
4intpx7K5GaFmy1mWxbscyTRJJp6gyhE6k3l9LRk5uEcpbh8o/I8nUpZzu0w2ZI8L5gkVRtSZ7Ot
L+98NOPEgdi1CVEaYpGaQh4Tdc9313mqw2aN6+xpprcOb/y+6lTwksGfC4D72o6SQGfoiAI0P1NU
H+34emnVpfvOzyS6N2ZnGszaq2ew7KpuKVBrwDGPT6UJfBtwXaGC3vixAN1U4bta7pYU3NG9s9Mr
kxyiMcOesbHMJAy5KTYCX4TOmxVecXV/AQI7W/ghkPJ0gl8ro2RELOszH7lIy3mHNsgqAacUW+C0
9UFqCLD3YA7ecMvge3MklnqAu3slpGQWQ0sYE9LigrNsMYEI8hFGjaDuBxir1DeBAdSNqCHpmI2t
Sx8tcuwnfNae9uLDDXBHsq+SOT3+imJ0qksVmebC1bXDKmnJyefeavhCfdX2PmZkDWwu045GBMwj
xBJUS1gc61//P95gjM0IaYH1yFQT3gubbBfIw9OG0bqewSHu9rZQme4xfPdy7rClshsmy89tf/rD
Pymz3u47Ast7URm5ukfdA2U8sLp+rH9UmIzmlV60JYfO0jUEX0vQ59n9aKbdHfPdFwA9wTFZ3zTy
r1BNQzkHBQI3ys4LDVy/VGKwo7z+wZJd5ppZRQXmAsLmzKBCIPfAHncWeC2rpMdToEIQJer+1sL/
JMV+9CbytximAnHGNyp438RMDc2fLV0HhA0kqfP0MFb0Oyy9JY2EIiOr3LYOOIp25wXoMNdAhsXf
iuWKC9w9lM9NTr3YczE18bhS44h/bUWdsGdYcuzsLZGyW84JUHCFJ8zZBDrsu32cBmUFUECnEOJR
sxsHt+/1/qvcnzUkXPZJ6lPVxZvpJaSAxiSOiJTY8JjtHn9kR0n0pqvHAN71x5bUa7DL4SNZVaw+
v1boTmCt8BHL+pehxUerT6KWxMMdQZm5KCR5udonyEGCua7OUKC3OD04/iyt5tNfSo6hzliKz+x8
iXdFRjL4GYxX773V/MZPqNe7LwiGLoZfhmDBcil0WW5ppq629s1dedLrm2A4Hc+ihaEJ/VDXl/gV
VAHo89dLMA86Rq5zGax0k/v+kCYbDqY884Y02AfBOoQetetN1NJ/Ros3y+nOLoV+y3td4DuBwFLC
aLefBwu8kEj9TDzxqZlBSgcN72NFxT8KR/HUOAO9tekFReYP4XlkDTxbnndwt7HtPKNO9AJEB4Sp
iZPGiuSqcoFWVIGHphLHII0CcnPTJmhPJnu2pcU9SJ+s/QqO3uxucSUDf0DAliRvSwnJAdynhC6Q
CGXjWdXRSO5f56Ba2idQ85rg4vMeLpEnSTDymWdbd1OsAl+me8HqWihvImABrFTyVrV8+PQ5tWqX
6MhvpWtB22I9fJ8xlOgwa+afVQRkHZdqbaFy/8kQ0FyOlyFC1WYsaRNx73vufbFTlZu9vPKpa8yv
UGMYIV/Ttz9eMvIR6HuCcAAw/X62luXiS4vCOtJKYckOsQ8QC5kNDgSV7dHu4ZfNjNnRif9zRPr5
aDW2h6JMbyr1Dq7ftVXNdEJirH79/Nc2ZN+SZa/I1GqixH4XcQ3krGDc5ZkSsQo2njIRHbuZPog6
WpexDZQWUWOIhvO2nouePRKAudO9RrMWk62pjRkRMydka6Q98x4clwQLKp/AfnxVLotaUiNtw6ug
nNYR0PizQHu2Z+Z+BDC3Ud8apcwU6ialvBbCjwrX+4bx14sxNb1HwlTmnIyEodOi7dhB2tznGUw6
kN+SnG6Cd2Lf/DeWRppn5zGqcHdlanRfpn77dLg2ZELdmPyxAQW5ciGoxwnwxeNWK1N28buaWxvr
Q/be85jEJMdtmCMM9bp+4wVDavRfXPtUL8G3l9TLciTyZklSbeqDNFiy7l/zYt+E6U9YUSb223XQ
Fz7wCxuQMB23wDUWg3RQ5gFU2SP/dwY/CvUacMmnFm1VB4Kau6hHWlCAV+G6fFeTqwmsHvfX9uyj
k9BljPTxQKUiwWfyVT1AkP3Gw7r8GupXdFTps7AtwH8EmZc6guXoVyuLGvH5VTg4qMyVH2rovrB9
+1V22K7kq/9Rr5sk8nkE3x6xHuDK5Kd/xIyhQYJfIkJPMYwySEhXKM9aaU3j24IJZ9h5Fef6JMJT
ZzT7O9Ft+TnSeU2pCL/pNOvp/zDE/nb5JFR4CsDmdAimkLAOeb088L5mpmscNDSmqE3wcIXRiEJk
VGZIa/T38u7r68q+yubSZb5U0q0xWEB+20HMPOCp88OUJKtU5QQIpgdGYHVJmFGS05uQWfujfjIe
ZXcHs8r4yYomAh6hlldy9XRZBPp5Auj7ddgB114HSzfW1spSRibdB3L0UaRO3QsKdZml5Uw1H+aX
+GXua3CB2TVGz2GaTC14V5jIV1eF/pGkzCnRFAtGycUEYD+gfrXSBxsXWHWnUooU0Q3g7yIjzrgt
iyk/JD/NT4uZnPHe22F0C9TNccISXmE201PyhO2EHDGL43TZm09lBXTwv1DF8U+o/0Lw1NR0gS1x
vWmYTJyio+gyLDJTTLM1FVU6oMjrj8BSlsUmjItMuSmWBSZRMhZlEPFq7o8l/zlGoydZVSAh94Kj
vnE6T68lWJ/+uM8Zr7xL7pTeL/q6nTABViM5s8w2u0qciHlVetWnvNw6zodaHJaVDQJtQbym4GGL
9iSZxgSneTx/5FfoBSVmLcV38fTBW1vOclHong+WlZXIKaMiPp1DcTBx0FHm3xZ8eZ/9i6Ysynbt
N4uLXJcHmH6GgtNP8Y00MomB/Mo+6pP/SX8/0D1z757uFxEN8SOk5Qh1jq49GSYY+90jn6wOXijA
HoH0DdVgirc2rcUsY9b63Ivl1+Wv946R3s9PSOyk8RK0GvY3lsZQg0H2sVoGYoB9lRB3TBdHgaZh
OMWSr47J1i8tve4Epe5y+yzpUStYrMCH10bRXowLTQMw2HY56dEhZwEYV2JNkdMGy7jBRQdLQZFQ
lrN7yjvEmwtxSagzADQxSmquCSovj6nU1Qc24vvzq5C2O1wxP+PBmGYlHcOsPjgFD+dd8bPP5Yrw
HW325prGsO1AoZOqpOa0jfDJWH/RoFXl5AfoMjhfpQOVnQJU/n3eEKWdaOjrvIHL0kMBx45hNCUo
+UDqsobdPqvbdJa9Z+Yow5zh7qkNNL4FCFTzLNWZ7DloQIFltCFLVzpW8AzJVyrcb73YlK1aJEIO
GJNuAwycxjy/BDUZsb6EPEJaXfKnHomwFV5DEtwLzvK2Ca/MnCNEig/1TAK35PKYms/lmnQnv/9h
RU5Z6Fc7m1LC9mFq+eXZr6MHFM9CurmHVxns8PKIub8J2n5BO/uJAI0AxHbdIpM8bp6W+Go4+4yA
6+Y6cNnvKBSYVY6TKDSMMr2qpv9fiQtVTQgMY0NqollxLPn2n9NguwWhtb4BXSNcE0oErUW/24Vj
lJ2PxTQTbwG/fibJ5JHhajawFJBdT3ErsYhxUl2OdQei/MMcxwLWzElzeVU5F3kTDZgKX+cMdU6B
6eH3FCDoxxTMnDc2reUCEWnTd764Y/VdA890qGqPXnmz2DeXwdTI2ePrOVT8IlnXcbVm42Ow+OXF
XXyZz9GwcAVbgPZjgITe9+o2XuzaMBXm4BCleSgKxjc7cRIkbPhLmQCalRf9SdQZqaaLtBCR+IxI
hTsi6Q9poed/VoLcFR9vHm7UY1g7LRpiBM2q5IkvoPuL5JUfht+rIUoWE355MNxnB8jpEDxGcNEB
8r9OIT9+gGAuh23nQ/Do8x0Pnh4y2ZJ/iUgvZ8hK49P3VVBdciimArNKkIj6RuAANtmNEakd2eoA
JlWXIJzs/pbZ2gtdng5uw9vk5qWODUKfZnvHp412WFhwU7RsYH32P596yo+j9XDCMWsRwYV0KrNk
zLT6jtolWPMxBuFYuivfVXQPiJ/uPSkLLv0xVoNQQYeIy1irlIFDTIfNR8mfBe7Ls2vXBIBz9gv/
nIl8HQXYmcj32KPScXjYt8cVTL1jT+X2IiQ2WT77Dgy6vX/6nn4s7OKMqOb3r/26k50JGy/IGldu
xHThIM5a6WzkebuwBHudOFRTGt7MqIwhtH8ToMZGStbnjXx53EXh7gt4IfC/i/jVfqf0TEumFeHV
7+zQf5i7K5okIOJGRr8lkKVKXhPSxL5vd8tn4WlOZ952kHu48YA5ID7j59Rl/hKCXpNtxwpxTxqQ
EEHj4JumTJbn0Cmm9mPpCwCMT8sDcpP4+QAtbP0gi+neQEUEvJhZwJeJNeZZpSzovFnKqmNdqSyV
NjLA6TBpkm1mhlyJLYwZpMpVvxHLKok5oClqP79XdFGUtXpsrVyZRbnC6t8/xJIFx4wW0+QH3gQO
2y0rP41uktfGAW1BXP2Qk1RItkef0fj6W1R3DNUSa6J72YnAmxWxBw93VXVZCoDpHO9NKahr1aof
SHtH2FaIEe7QErcUP2qLgDyiszaa3CZw8OiMeVQxFA460bxOg7k42xSyMO/aTc9hrcXtYf9w/TyO
BAFWQi/gjn5YUMWu1Euf2nhfmuqb4bRuF6rIkx7jEQc2UGUISA09R0iEKFIIAwg6bqd1Ox2l8Qwy
WSXcsmgDBXqAbOAZep+i1VPta34athHNeZpFE2+76f7LWiHlD8mYOz6pdJTw3qsi1wKyTH6X7Soe
M6O74b7DKtZO1CwfzC05GnoV4ot6kc7YpA40BBpl6VxDe9dENH3K2XpnPulq9je8wOQ5ga+4QnxT
ECPgDDLAhX8bSwukv6AxKFb8qrHTTTrYOQL68TXkEnOM1Xn4w/FS6nB2O5gCkHlcY6Al8FeoGcBz
VHXdIuAT3II1TLOCVRGYaxW3Io74zaEdEXcposrpmSf9Sfcm3PtcWNuBq46eLKr/LOKCWmgnKOaY
XkOALNwIo7Jy54YxCmByAudJa38K1ESnsLGEceCYavPpc0LuR7iYdJapz7qIeFy0Lw8V48IgdrYK
s/o3/z/m4SsDI4Ar10DhQS+ULvOWONhNKkKCYC2O1YxrcM8Lv8u7gtoQWn2kyhWbSflwcTZwHMQq
ZeWzFWxhx2lSm3xzpxxsebKMVmGVzHLrfqtuttoxINsRBsDdjypQHCFKiB3EJ0ws2jM1BIqNsRMS
ykbZVimFhLg3ozUzSSJgGgBO5/T3Qcgz6RhEq+gLnNSREhyWmCAxhjQgUvhfUkyR/HESyO0zJ5A7
aG2GoiL4z8/0FXP0vcS0WmQOej0V+15khWwn1WDZ86DzHeYfG1s6IHI/mb7saS6hjdI7YIIvShDI
MME4ZyKEvvUvEEc4CYu/0kb9uzrIIPHJHHTeMv3KGnN/xXxmhehGkGVLuKnfaOz+GQvuX2TfSy5O
5ytknDoWc3p+F+L/LaqcdxJjsDWVeOc9klb5jVJIxYv/ErzKUnukuPSWBDOy/oPeL4GTKqzYXlK4
Tmkweat1vieM3Cvlk65wkMh/DbogvDRnIoUXCah+shB54Lg/FLkZJ25xsf6rtUC69w8GxUXRGcCM
6RC2qJ5X7V+I+xZ0o53IjnegXxGfteDTD2Ll/aE8PEdomeYYb87PWJe+ewJ1xHQZPxVQuy+1H0IT
U8rn/jnlXTEOGGC7Ov0hdBF8kYW2gezkEUWMzEFqiSXHD3jOSvSXcvdxyKrfuWkka3LhFcQhIE7W
SC+o4kvO6X0oPQU5n27AzWfyx2Eg5U/Ifc2mPa48MhXrbWIzgUV0MRO2q3p46pMgTGsLRQ4ExBBx
7ioU5C3ibGXmuTqlszSkd5I7lLd/IjSCPSuulDfe/aFUzRuPEkxg7w1GSqBBr1y3AyiZIoiKbwxI
X54TzST0KmNiBK9jkx3S97KyUfxOoH6VGLYThBC8d7i2WcnvYqRvQlruLVOGp2M2DD89I8SwhhLH
lJYcJWGNgeMWiB5ROV6AJ6mQ6E/Pt42BwiRsXBLhitxvwCKuDf/LjMBnTMuwW1BaHnpY9mY0HKwL
Ksm4GRoIiwaYLarzSGlJ7xG5ZmuKYPAJ+ofvrB9C/ORvVgW64cDUM5nImh1HebHSE5qX4KcFDINj
0H8OjeGFRMObkllrd4fhZCRvuzuumeHj4ddVDC1/o2ESJuLzoh7IcOmxa8uFwQ5gihhasQ5rigdT
yBHrjLRPNI+domQYC6CtXeVdzFQVBfD7IKNj/y3EMKTdt38FY7iXk5jdSmTLgu7IBRAhxcywcs4k
q0fGCYcNqvxk7i8VkKd3ZtzdeGpDidszhA/S+xATOsgknV+7kU7eLnjVa8RGmDJN+oQ7oZuPvW7Y
Wg+Q0wJVxRqkglebvENqGZabpjRvjGlThJZgFXr6UaEWU5jLzpVbAgS30RBNOJTInyuUuXVV/yYh
05uJy1EEX1nUTqqE6edffUDeIEV6flFLQaJbK/rpBU5xsAv+pyQ9CTiaWW4xZA5APE3YQ88TJhyY
REj//UKWvtqKzrqHCp2F6ylNAHgfsQzdJZBcUrvzIeAlqn5SY0CpjhY3aN/8phkS8olgeEnrfZzP
xVvdL+t+9XdPB7qKCXeHEY1T5gCcXDPN6UjenoiwJGEcZZGfYB9kCi12wrl9ixLrB8YEMWdT+xC9
uKxx9qAKYfiTQc0p0Vs6Oqh8nJWaAH71qsYMxibvRZtRwVamOz9POBDTbArPBCnTHxARhtMUmIJm
AeLH/BAx+13S56DhropXBeAMTqrxNyXdfid8rHXfu2RSPkvsqc8+b2gEY9thpEYmbaPpDFftgjeF
9EVQsJtIaBlhPN7bmnpu1JP2Dv3xVNqATOxxuuArUw500wbv7OCYH7r5I3poVisJWxdFI6DQdaFx
C0H5Rj7o4AlRmWbthBl/pjnvkuCeEP/QDAX8vglA0rjQFvi/Uf4tiUiOIMs0/gM5mMxGAABPns4n
07WbFIEWidPhd8Oqp5c2YmrTxm9bGKW9Fh2CxsTcTd6GoQFgdeES/m5gLeIYY8/fIYe0GEFhxzsq
JPiu+Me2Auwm3/eHb9+zQOMidvbVeMJNz8fvdil1JUbRZ20WSFPk+ZodLLha8VyLgdlpb4NdHGoP
pbrkORMoALlDaG5OCLLOccrLUcNai4mmL8Eulz7VIwu+/csM66uV1B6iL7WJfvM29Q/u3R88M4Ts
uN58xxVuRX/9zSnxAA7utxVgJNfEHxzXHwJRRNElUepePyRVNV7pJBZRIc4CApRyOFD8ZmoMRIsy
ixoxfDB46PtNIkMUFqSIFmc9pT9/Q1N54WD4feQOqhjnGw/d72tLljamo0J0w5Oo2Gt1VeFLNSg+
J4d/xpE+u+5nBj1PkYghNBlzhNMmV+god5tBsCqfcAZU4jw4vS8sJKs3fkadbVi3q6o+QmV9BHWp
qeGyUuz9/2LGIExNepIIEeKZhg0Mpk7ke6LzrHs8F5UKbH8Q1JSDbtiLldLw49h/tqdmrm/Y1HOg
pWx/Dib3kWVJmKFRoPQWQp8ZAbI5CIn1irmgO87ulWO/npGilK2M/vEH9HoBEyDPdrTn7325xGgb
VKW0XANacap2cBSUIUiwhMMMA7UO8lH1tKNBDxw+6Ghh5MuBgRM5ETYVhCWGPloYsiDWyscBrz2y
yA2epIfWetukHFNw5gf0UQHEtq37V88jfFpyR36GW0VcrxYPvGtKiPU09p9r8BHIAxBXus7j270A
3QMr02rmcVRoqGFZarzeh3sSM0a4A82hlTbZcYJg4IkPw+fkfYCCOjoFmHTGNBTqfvc6aupOwAPC
0Jf7U4/gE+IovcjHHJdYfgGDehy7v9v7xMjmqmpfE3ShY4jABkfcgQVC5iiZU3wZaHEJfN1zx6qJ
MmC/pbgLT4FKw3Mwgaj2b+vjxZpxxwjVMvvECEQ/L3B0qvCLLBg5GQnOtDy/e6f06uy74nu4PlNA
xFnKzk6yXOZJyqlfr4mFiXMXl9ZIRO5KP98Kkk892hrYPNp3pZjaOlu95N30oqiKyQ4yRNZYuh3B
VYpuntsXea4n+uwarxGWK8NbZgo2upl0GyVOTFYUwAhGg8QhFZFNaKpmSWjcvm7UgS8dxYkOfxpQ
hTH8LnKmps6BV2SVoIeNinV4Ha1NQcUoyD1LJoiUjKYMj/UB3dCGu1IQ8+xCe39qpTYzl6breYZu
dK3G5fTQTRYssTSd75iBeRCIT2KnqcTXwntEsEE5slftb0aVz5Ys3gWuGNtZW9NI3EpfB38Xm1v5
upTZFtgN91RCCAISc4+zrrVJNkaA5XU5LCLEZ/D93+Wp2o+1sh0jPXR7gqVtN8Pbi05b5E6Q/N3l
nUfh5ZmqZCIoexH6k+3XohVymDz1CqJteaeEsQbFtMSssC8D+m0wD6Qa8nyjF9zMkxqfyOvkpG78
unYqedl4jf1mI62Yjd3jVNFk7uAtoTTqs4FeZfVRT2opTvQeQFB6e1MJEGabCi+SjY28SWXqMEfn
j3gPXabyWo3iHdXtYr5hRJvrbIlPA0aK0j4D1NhYTkwIGyn9FtUffZXuO6cHS29s4IbGVQlMDbug
omi0njQhBD1XvNqjK2Q//gxyN9xrnLNznMKuoPGcOWmur8Pw2T9RcVk3w491qDQ2IpM1im6Mc5dR
KBgTx7PrkDtfbpSpQLWmt6/BXF91FxaWTcAKtzefB1jhIo7iJy6fkIxjEUIOkMYyFNbpER27pdJ0
lcY5/I4D9o3PLj6vQt97spNjOJe/ng2nObI/8Br7Iqk37jJUMvqCHT8nJBEh/X5GYla4RoVPwyuo
Ak3VIxQNk9kD9RbSLQS4qudwSKmkmr/2zdtSHm4IJXFe98mmmQWAowMO5Ux+KH0tAB+pUD2YaWwl
stlQCS+6MCRlIr5bMYHsTv2jcJC9t5bMRYROR4YqNu29BmELix+RSazZIBSLOaxUEC1rAy4UXGpw
CGybzRsOST58wTzQyPPcAQUoW3kquc0dJB15w1rSzsdFxCkGv4wUnd4H7n7rLYQMFoOuhdo6+FUg
QN7tEmz1ABeL2vJ+wDyRyvuPs1HpbpOMkbIBmkMPacVRruJrQMweVZAzdNGAov143jKeogu9no3O
cnfFdr1hj2pjvvb9C8ltEBACSAwfG2Uq+0OQbpWBgn84FD63HwNDczIjGjAtht8xlkFLoqCkXKQY
9knls4oIV3lL4K+iaxEOCvClNrZVgpk47JQjbdDG/juLOEf3Ubc5NgGWkqDyqco9h46mFMN/tmkp
LKRfCnD/STwE0kA2mFLMIG3dJVXMXe2/Tvi2Roz84JrrL9n0I09k/51cJfdAcVYtT2/QOuZOLjh/
rnQQ4FpbyamZqRzygFUDKckI/SoDfHdQJZ7DNAfMNK7Se1YaJa2DcKDbbW1Td+/HmU+F7GBppLVZ
vGZBGzk/tNrFHYVw1eam9GyUmrnwAY2G92uXMRMSnRTZY7apSy1IdLvMVeOyhKIfrkHp65Xc9xhn
2ztOSuHnbpEO+SSyIo8fQo+8IKZvD0qBCrKv9bqafjTCw9LibpdsV5FI0uPfhv6EmzRm8gDJQogw
i5wsnyFsizbkgWW2xhpwOXqOjZUI28zUmxlwwmleASvlq4L9k/I2ukwvXSpOGnbehjbkl9o61Ci2
X4WRF3f4lvqgnP1RkGPR/9JT0vF5Z7Qc4dI0tpJJqUeg08/jBral0lCqH64WlUi0M4HxunvM51gH
m/vzP8WiDokglrSLcnetxXX15LXjHnOSzMoQyuncGHO0RUFkyqoz6ieucwNCdgUBv2kCWhC7u9p/
yhqwlt4JaycZtdNqwT6ymLscGqmDZGtFeXBV0ELL9qp9yhqQIR6u2A7PQWk+qEXxVUClxbIfiX/6
uzNykqZtbvMaNUKbtJ6vVHFQfJEHq1jvkdvF3xeiK9cVRmCT83rJ8AbfyakY48P0wFmwQ9teUczj
CywrrIKVIp3Tk3FOwe/sQQZ9NpDgwOk/nRftsMysHsjzDWLz8QoEqVBmYtwwPy6GQb8elUbXn7y5
xiC4N8hrpaSReAxBtfkJR7wLXKhj2Kpetu6RlteFxRplvPCZpaUTUoY8nRj7HSFcw9f49HErPvIk
Vclmj0TXdTC+yf70xrtx3/JhChZJRQHB5rRxWM114ees70DMjfjm+VaJ1El3RUG2FJbv9TwEgKqT
8oh7+zzexjuIWodmm6wQVjG+prr5dJ/v1TV+9bkNB3P5c8d7ySAKV/WIBpcnF2ABBFPiGlRPvtMI
oPsZFJx3RnVLft0jjwl9U/PwKLQzrbnoIBQbOQzrkC7ZGaBapmuscUlxg+yG5pi6KsjNJHP41l0d
f403qdXoV6DpTie20nUFLSsoSbIlzTSCoQNaRwyDjfTk8i8v0ET2/UvHof4j/tFva2B0xkSe9zoe
mrDxShyC+PJYEa7BXM82KFdGj0uVCD462ZbNfxnwaAXuGkeeSuvCad6c7OrnCaQj9ONSzU1P4tD1
JrAoDFdYPxcF9zw2kyhACr1GT/1aiiBUnNky991gR4x/ajAqkkVdGgZK9/V05+m/uYx+lvgDiiOC
1aay+LOVZcl+RZ0ZEgjJOyPtuQ7Y+haNJDlrXRYGvLsy28krnNNLBSG+EmQzlFqMk012SBnno+Jz
jrJ7W805e8RUFQFG5F0gVflfSIfoAg48jcAdmd0b+zuLZzJszR5UVvJ5MqbR9e9iMCT482/0/aqb
x6+BVZXexviAHTyHFgrPS3kVyvfrgKquCk7uyjjjzlrQ0b1zssP4UZI6YVsPXw1It6vc9KPO9oUi
YLeQsaNw+UvOxkCMbb8iaOOMlrqxliislwawuROARb9S31ZfUiIJI8Dk+i3Jfum3vFHHNduQtRr6
kt2kko6JshgpHCjUY+wD/GFgxO+8fEbkbNfszw5oSQ/Ojy+VPndWBC5UZ2uxPg7nwRGoSaLcXj95
5rAptyV7AVZe3jDnnLQekggmGUr2az5X8gGJJDqChaibhdwdwc+De0KDmsmX7VVtd1MOPzBUgnd0
/MgIDmAOXuxbOuccRnLsRRNGW0sx4P2/gEgk2fPWE0Ni8xvgFf+oCORwxEQA2XX1UkCmi2jMgUyK
POpdbsngHtU4YQCicZzbzEEGD+Z2COrFiUCkm2i8a31tAzjizicq5jfe9uX+lI6lWzI4Af9/GVyX
q/25OzXdRxrPt0J0yvOmdxCeZkda/jKNDz4BgGzlGuDzQw9XgJUn4aqLlZxWRxXK/DcKmJaoBl8u
pn6XG0IL9nLvtvYYg1bogxeMovKBxITH3iAt4zdTSRnwz7B1rmKne+rJqYKBtGaASP4OMCSUuIhR
D9805zmFThqPks2jp2LWmX43k4Us4G2cMRC1t6aGWyyj7MjfC25mSWtZB+7cnJjuSDmeSWQQba5G
ZJsxWGbdjF/rDbs9wKiFqV9LxfTkxRTBLkLgu+TN1s21jHh3wFi6wGeu66kt5I2HlpGs2TejsfQw
8IBO5LXClss7KfSFhYsEcg1sLx5XdSGHVNiPVWhi0qI69kDcbllqNJHgW0KTbXB3N+B66KfbTp2l
HmLN38PkjeRtkNrynfPZFa/4uH+F2rP0W4Wl0Pjz7HdTc4y75w7Ji7GhPonxYCZHNvXBWxWt3vFo
YqF1WCcGI9qGpDYMI7XF19JF7+t1Gm0BrPN90yIEDWKduXxhHAKmo90cZiLByUN+0quDK+I2KQ0P
OKFCCo1EOerdy8Hx233lIttjKNWdJvcDkhFa1iOWNocP5/QupVTjPxtF4Vdc9s9kA1w+htCY4DLB
eohy9Ui3BNv8tDvDkKIyhGOUW4c51fpJaEKXggMoCcW2o4rkjf5AVGY/mIPUvNCLox3dDoTTwBda
vBzflsGJ+kvaFbM9vdzxktX1N3e6F70T1eGLrfkZnUItXYHPrhufQ/jZKt7ea1RGRnzSKCVuaH1+
GTY0gVaSnz/GuHRNvXWbUYUO/UZ/xkmaQlZUO99rmjxgnuGhAUhaZbkgL855Yd6Wsqnl5DVwEZX3
hEJExXamAXymHFo84k3mD3eDr8rPyWoZbQUi1rMZQ1sFGBZtmjxEyWDS06MAIA6asWit4Z1lK9mR
C0rqN1Oy4dCBzOF9JF61dNdGSRwaZUE7FomDMKp3W+OQQxoZoReemUZuMM7mrDcLIx62qM/JobGF
/LKOUEBEaXObZ0SQMxL1h+8jIlM/DM3G9e8cH/UheRUAwRQTszmvBVSO9fw5UDbKjAcLCJOIpUYk
Phf4nnugEMHsDjtVxhfnXpZZ1YN56QmuC8whytkFsXw3lNOf0CuUvBHSzkUgY1AqmdYUGf15vHxn
+kxcs6ZWCZhEs7h/1sgMmP53At9Xqk2vJWBB8dqnu6ny+jtnDZpu+jFgcEF/Llhk8lq0FYrz8nXe
UPQrA51BvndxoQ5OaZe11qRK/iPvQYJZ743BuGpIX+CoxfhLegZUovHw5GKid9Lq7PzQ92XKnYb7
aKWDUlcJyEGSARuYPVrZyhffvwYIupslwtAzT2Wzu8ESqvCS/1p69sl3xbLrwmAjPSGP8nKUDnBk
OnDEw/SnHYNyya9JXU+5AGkgoPTVNMHyBM3lt0AblYeFngW3aLRJwkZnX1isz75kJZwhPk6ELNWy
eVcu5xDcX8gYokD6bB92SB2yxzAxy2YwtlC0siaTxpEdXkzj7bLKf7SZHelLaEmN532F+2iXmYww
FUGRr5CKnetNIgF5OCSxfQ9shazFGfgzoLV6sIP7fymRSRzJL7A2r2I8iUWSMrYAA6sMcAogG2IX
idaJenH1dYYvJpHArZlO3b8ai/E57hL3lNcB1c+ofH88uj9R6dxTveiYyZtwCW9E5GTe16ySabC9
OyOYjrdlzwGDzx4ZEtM6PnlreOXQYh9IqleHnMsV9QMZEtjb3kaTejXjFtS9QolMQeYB2r+6O1Nm
bzNwrOPXhBW9GHLu31F+FYmQlaN2MY0NqtNjgIDHDJHYT6TRZPjAGCFwThqGCm/AybRxf6e4M6al
Hw9c/Ey0X0mPxBdEAHN/wVhjU9Safgg2Q9mfYaMmyjOG34qzr5WuKGM2y2OU//iz4AtTzdMhRncA
ETKeOqIiXcfhOx2OC8rP4nlrN6rK9V/p6TrCbuaKkaYIhVzhBHUf5POVkhhuOsAaQF9x3hRPxlRf
cwVxCrmSVM/lSTV4OqByGhkyAEHx+sAbrQzY0v+o3wiJy/h4dX1LIlm9ZVsNOngrGy3AOleK+o2j
6bNPicCqSEWg41e+pk5NStzKP2nJB2+pT/Z+DQOf+HJlhoo9wEl1DP5O73RGBmgcIyP3FGmVP2Xl
aemhFnl73fkboMlWroenFsFxk4Ij3n3jMmzIUf1/pDn1yYVPtA39PW82TRosi3HSiPoo/SMESpI3
LzUGc+EuQxrvhsZEB0GWuf1jgcRsgaObVasu+Eqc8xcCIEcjBE4aEOblUbs9TCdQxAj8/rVTYSc0
nogVHJrIUfdyvd8gNvXplNoHNs/fiAbOs9bDMqKTBpdQb9eWPPlT+Ri2/FZ6uUdAq6hM442Zq5m8
QzQt8f+50+YUGvnVeJhwj3+2sGrUN65+g+FqLF04R+TuwjtDwdSt6xvSnTkFw7zhSbDuNJTdJs/4
8+Ggfem3QOE+8+GNpiBsJ/iWx11Ulw1x28rVicQPmgvSZNNdOJiiDd0RLIq7PO8TRMkvPxLwT/xc
Rbw96JkHzl72QsEI8i14MXN5A0pFkznu11RfKt7gIu2KNKeUInWretE4IdLj8gpRkcuQLXbnsqgB
i5EGOS0dtC12AApvcPB8rckcSyQ4QT4c6ymMVuV7K8mDAfFDXur6kmoE2HeMMvtlJFEtidLW/CyX
l9tzTK5gscGkrRIOIDI9tSVo/e6yDOKcuiYygyoweeb/EtfvckQ3IDFPg+ftMs019fvn96yGRvrN
PuYeY8g3tUJcSLZEJW+yTCLpitz3zg14JTORkVTmTUfWdKevMwnZF2htRkWA3mGdHrOQBhjNqBNL
yXYYxop67urCofBbrRtdi/MC50R0W+lV4zUZyzx94/UC82MH8WQk8cV0RK5KFCWNRE8yDnrS3III
j2gzo4jBzOzPqM4XARkikJE+zkTrhZYCWJ89N7ZrbL0l7hV5pn5fsl0vp26rP5wDdIEQctnmNj1q
YekWmucOTm/jq6ysUkUxBr7S7W6Wiai6JtUkoCjF2//nxfuKd7vHmlJf24l8W82muPHXKlTZUPT8
ley+xVurXK5vmWMxSI3/KTbJya+h4rlKoyfKe4ZTxh1AqnxTeJfoT9pgLmcqZp56j9B6ZmOslRGi
jgBffdTpsToiejTmuMZ36oIaoZQgMPlU8VRXmj1kvTuDFvFlozXNb5ykh+qXKBLgEqDhlOBp6Pt9
B4EUiRoWeFWtLEeBVfeQveoTb8aXG5XMDgaMJhU7quuZxpzKGJi46T4iNJPBs1VP4nyrjgfhbEuf
/WfpaKstgTRjJXXQS5+/Rm26V44YwZ/v4gl0otB99fPB3CtHDrP+NOIclk1XEmWb6V6Vl7h/A1go
PYZbtvJd6hfYvsM+UKESAcmPKIfwx0qzLOJDUdoqDfvKWnwS8WXCfX2JF4LLGgrYjILN2pno4nCt
3u8Clypu5OIbaJFQ/QROxbVpur5VhWVwiNMJanbTKGWZsTUC1Wt+DqoIj9OB+wfGSlXl2QHhRNdq
kc3M8Au0ZAXvfQW84RUcebyai6KPHkdfnIVwkOxroCNkVM8lBJsnZNPCZZH9NCZW2HJY+qhHUjj6
gosyZHJqeC5oQFRN1fl4urKYPD4Y5HRjVmyZp1enX3g1s1A3Ip2d1oaevLdb/DElGvZYu00fabr5
36GACYCXEVKLENioaXur1Q1vmPPBJVDESgcud+cHRCoVqN6Bj4o8/PXYJX9fqnp4+HczEz5C7kcG
PiuS9Mz2eY9CsgT327hLF0BE2f6kgQuUtIwYLNh1uTETNSgxj6HvjbSXPDbPF3PgUK6uqT3wCHdY
LjxpOyMU7euLZ41pr86mdnl4nKtVGgt+CDOVlCUZ39djP9Toadg9ot4mdpf07fqmtQV0iwkQZ/UY
mrkMQYgjq1WHyiqk918SnGd1k05rlDI283Nze2LMmfSqqNTZWqitlBEJt1i/z2Z4Q2bB+ptPCa0c
Lg9NIkZnQUPsHEMWBEYtWUNZBynMZD15Cs91L+bQYhfrUNmY2wjTJ7wUKf9OxlOa27Y9iV49faW8
KrUWVjJ7nHGO4oPz3pphuDCcKDTzfwQDHP3Wn0qLCge122mDm1w1Tay+KjD20RHs68F4v7c/nbEK
/m6yk//FCgoBg9HrRFj/PaRsR+T2L+aQFbKqjPYl9gM2Y3G9FjzM7wPLl9EheZot2kxkXeBuGO8/
p+w699yydZAfUGslO3kILPNB7iHhkWeJqZ3Qw91TSZAnjCr8NQclxSjZWfO08lKuBJe1PwyNDJLu
LPp7kt7KcoUrPOEbSJ2f/WDDWP/X31W/0evnKvFkyoaxtQ1zy0NI0axQ/6bNvQ2k9T9ouUjze0ap
VKud2hM29chZy1BxWITWN1icKROQ/sGkb086d6bvwdxoCYdJSRruKV2MSSTauDm8HDCPtdxE9vE9
iD7FnY3qFr2hId1y/zplrbWMz7S9sygQ0KaNEolK9DMPeaRObJyUHZwzcI1uAEoCXYB3IUVcLuEy
cKoRyOhiOrv+C/rEmCRUh6ETVcTwfC9nxasDxlwXJWfuIksmgj9k4sCVxjcJUkKkSvmoRZ6ewuoE
odeBSiZPjkYpEriHiTEHJp/r07VSZ5+v9+PfmK/OlsnuAytGH2L+L2K34IwZG6d/SEwG9E33Bw9m
SxTtLsHGmJNXnW7yeJLY211Q87BxM6+R1+1cXxSA5v3nh0hO0ixLSEdh8GoqUQ+BB5SOqt8Z4dg6
Zh1wGqa5IOSgdilE5G5AAEx0VGFIDICsJmkkBXspI+6n8mGLjV6iKuYH7/eiE/1QwSWKcdJU4MG8
oDzV/zEcm9PKWqQjqBmJUO4aqp2I68SJmqaLHdKQ10NpA7ZR4RadUgMyLBEzIytjfWzbP2mvkfMS
C5ZAKRUphn5ep5tfNLEYCRhi9UQTYAGZzBmjR3EeoX5mJ/ufzG6wyJsOlrH0wMb5XbJYRiXvULdW
DopDSw3+eDU9WxkJ6F0nq5U4Euo4tevSqYYxg4TD6CbXAgG1/D1AUaLr19e9a2tSMfAZb1rumLDA
iYaNnZKI0xrvel/vnWojsft7j4W8T+bVvyB8clpxd6mpDO/V8WZmpv51zre+S9KedC/5n9CSsv84
/G2Vb5joJLEMDbdUQ2kUhrpPNI5VGaJcZ7W3faXber1+ZPHD1hsrq3LdwRIvroKcbzYUHpEbjHVk
9nSh3UTYky4UtB68gU12DuV00gGEDKjsTGbVEzXbPEK1dYjc56Fgp9VlDy0YRMh1TR+2pekWSA14
dz3QsqXs6de4POth20lWTlJOqpepqecdUan76OYmDhs2pYzalfwOprK27DlHVfMBxGbNuzf8HiZt
NYTsbz1/vnTSpa5gaF57C1QOx7RcF6LIRyI7hQ2zeIOkrXk9gBhmcstqJK+wKiZ294IVN0xHKJPA
wrT+6K7gIp0LHEvF3s5xuRV4fW39WEb0K6CaHeSvYsJaG/rC/anDcOXMkxYlvEwFzopfDtgI/CwY
Bm3C1NyBb3yDASWtgAmOa64npAbKh/Lk0wPkC+r8WNrCJTP6JhYngyDv4jlmvdEg0ht2snV+gAX+
do+2L5i99U/47QH0c6wqXNbtgw925fenwh8oFREwugJovr+bBEOjm+0x5/J/rVQ8mirmfs5DEC3R
j86V1EGNBig26evY4xeDNkKrchAnFDt+fM3SB4xg9QL/GSupWBXEMa1OI2Ye1okmFTshvK4shyUZ
3Lr7WZNa+/xjO6iusyl0ETRboXAtKzyHg9jeJJnIFye9U/ftlWIRi+MIgGsP2ztP/oykSkZjDpxR
q07+PYMJSj1FU3SOOYD9CyckLQWKepcyEXbEBW0WuleR4dMS5YhBbWnLR7kl/fOF2c+uqheMIl1v
1CuNswg7k/2nH5AILxWAarel3fh5TskpKten0OxF5dPi2rgY1D5uI3bAzBC1Zu938TtjzfNbco3G
1gicQRDDn89aKdtGaa5LDqk7vFYlTDLLmYU9e6k5Ps2AMcfzjVmoQj0e1ERb98LUAiDRcD0gvxSH
sS2Rd6h+1RP2LtSKrz8g0iacbJhUcCojubBRv3Vm+NrJYESednO3adCc6qFR/l3tk2O9bu1PJDeP
uFbZBLILpj/EGCcCYnnM40evL65bpgpmToT/jSutShFrPZlS1y/xuI4PWoPm87765CoZurUGIHfM
kJt5oYAUKva8Ky9V1m62LXkQd8dZA+OO/gbA8Rw2lpsbXQw6pORESR6duPsUR7+YEwWV5nGE2anN
iRYIFb1M6btvjs8AxxXi8fd/DuN1fNTeix71BZf1hT3VjoCiIXHEW8RaEREV7k2PFaqPLdYesypi
Z86q8uTSR54go1/YtJGaDWG+3k8blrudrIsEnvilSLPIlVKDOuEP6X7lI6MbIe2HgIPmP+mwVLhH
9877qKg9N7rwfTY3yhzvYV41ctqkI4iGrEy2oc2kmDk8KVU1Hl76FX5OVivzNEoyZ7+OsHv9gDYH
cS2OVWJpTIF/NlKP38JvYUZeQLmIK9T6GuN2XDQrChTEzpH67bS5ZKpAhBfJycZf/G5MMbLHKFfI
MMAhShWJvazDDpJufqLObVEUpAM0zvT4m6LecaDSYVVmWheJ4xs/PpTx4GZPY6C7xvGZYRRnxDCP
n62NLIKHlIQmTSaNgzc2hIMfpj5DE7QGXL70c2+nwuqH4YmYxVRS5lL8JeujaIVr2tR3sMl3M8xz
ia154pNiQnCHdz/UPbRbWFBBJ9aAARJJl8EfWzPny3mP3jVu3T8LBlIa83Mw6Q3GG3reP2FwamhS
NFAEBvlhue8eB5UGtbAY9cdi08AJ7RbPLUuBwPFo9y6TA92bbVgokgeoA2AMgofqMyHAdzbgYQlD
h/mfbqTIY+o1nmYKmytCFQylEzWQjhMljcnpZ2qPjMsr5BIklSmoE4You7GEaLzeFoKRLF28t7+H
7BfaVvrzRFNpteZAMSidnCLPVpaTLqUhwfZjXIguuk2f0A0FcYU+3PgTLwNySfAfdRD15GbQyngv
4lBDBT6k3t/vjqE7o5pEmsDmUrvWiTEC425GQvWQd+F+y8fbOSYFB4xt+l1OCmCc2OBkK2uctPRJ
ndS1ZK5maeR5g8Z0CbhNmq6PcTkIOXHlZnKqxO1qFOvXL59W2g47oP4MGGrQ0ky7hR+4wHStLMX6
u0lu9ik25lI08YaOpqJsdD7H6hMs7tIJkX38ZBs+d06v9mWHAvSvQOLPZ+4XCGCOUpaSRz1ZY/ah
GZ+5V7JVqQT00FjsxQhitQCAfkLUMDxfjgfY0vLiJH0c3ep08L3sqEWDbp1idCUmFAYYiQMD0MxB
j4x4i0t1HE/X9sUxPw/cjcMbXKQqOabfpzLv9Utk6bsTjpfDIBRaGxT9Wb7fvy1ZWHzY81d+/DIi
5Sdfaa/JfYK/62/vcM34FB3p8/H/iSI/aGdyW6aJI7/2amawAs2CqhGlTHDboZL+/WuokgvXsKfl
2BmaPulBCTimR/x6yJd7gbdSBumbRTxnfTFRp9P9/d4UBnltGfebNjHTfCLVoDQENFLVcZVPBFjh
NRFkLMgGfHaOEuuPxAbtx/bztE19B6Ym3jXEr+hgczNUh6tNTDXvrfsabpu0WkwZ1ao3LQDkl052
1JOh+WSXzbejuQeBhQ8wWoKs+kX1jJjpNRmH06325BOksB4wyp/gxlZc6voGUcdpedbPVJfQwyk8
Kz+MTGBIzfOECSoVBYw8rtSD3MR11n3ePjK1zpfyvRWNIElhXv49SGnPfqxllbj/TOiz1JTK4dx6
biCx42OswPoP14ROojoSZc2/gWWiMDywbmUubUj+39rRLBKhuJFTbQxeWGseThw3V4J7dSmo2niA
lqPj0DOsPTyaHnPI9XxJdpGbJ0HrgxO8cJTuT5vPRVal8b4pp6haz6gk0q4pEy6yxBFgBqRzF5dy
sWbdvxpFiNJFv2Q6YGxBQeN1hP8Xl2Q9N0xTBUFmmOKIqPXAGp8nadSKUYvk0KvkR4wN7657duIO
YVtsIDXS22wwnsZzpd+swI/GCZfB9cP4oVVrtN4u5nIkoFln2+IADD6Ql3mG+icVsC7UhNgJtkjZ
XB5eespJfW8QrMzfvbQX46VQgMQ9xme08xjKnEQiCmhWXW9aJn8uF9ZWqLZyNFp43jTEYiO0/Dnf
XMpKSJHchpWySkareS1eUcfaHdlZfRf3tYo/rzN1+yBYuXsvPNpvSBAg6E74qfAoWeFF2oh66qAL
jdD7loATbA0J3ae6g/BFvLVFa/Ui+poMEkXddtcLsqW2WMOKoaafowSnC8LtvcETaM9xmQyVUHa7
/NdrFwMKGsGr4jTBQmmFBLUfYzQgesP3kS0LYfctnc0RCEjEKAkdVXiriqsfVifHe/g5fbS9Udiv
5I+eI4O30qKptwphK+YeM+H7zGD4Hm/+SUO+7Wce3k6wI7WyO8VW5HIwb9GQ+AKmi9RX3yK1Inu7
Y5QsTNqirq+bI7ylsF0G7G5QNT2P+xIQ8rwTIEdhayUwiJbxPV/FPiCqZv91con9XOiMBI9TnJJ1
XCcBe4rvnGCNfnMTP6E3/sBl8v44UY1cMHSHn+wSpMvs39/ndUi+R6Ypbn2Srvihi1UWVFoG2q/Y
qp84dWwWvTYl+eoExwXzHDG4pL5+ra18A+kHRAbssQk7RwbDkeAZwKhQczCrH44omQd6Viz8Mkin
I8/i1UCR6Oq69sPTzAaeitSaTdB62xfDEhcmutSu4wPvnDhnxZVWKvprZVaX0UhJqm1gfNvKHfem
FxW3p6fZdahG8svIiLcg4QrWQgelEOS/e0RXdZaoph+MkJ5JPN4XOMwsd4zf0SJw9txd3aH8yZqN
OCrkkMwyMSEHF6V/g9HEQ88C8eKbiADxrW/i/XcO10A1R0GXAYV8HulCzQbX3+kTsFBiwIE8Zqxw
FzaUObZzXac+3zYPnhtqBQvbnKCgNl7yhulv3/TT2lWqBN5k45zw+HqVCIPI9k6w9DhLFA02jae+
N+WzC88Aa68EntawZYzMYK6wmXaIlTl+di+rSvwhe4hsqXn8ABVvQWqdRo/6kx0UDHlyvmB+wAT1
JOSlUEFY/4NlaaoBrXTM8YdCV5nBINRY8Na/pWusAP0ZMaOBZXdWgBnjutdYuBE5j1BczDipGtg2
/XnOsIz8b2HsTDDo7Fng+miiRZ+ufANxPyBGRMApaxhdykqgPfh/t/STgsdlYGSuW7QB5c3kYFew
PJVuA2jQm5Rk9kIglAzw0pNhg8o0l2o0EPCUIGu/cIb5lq2215aBuOK+4P+RyRIvDM9IM7n0NnQu
N85zOq+dRkjCwc9l7efv8tQ/X+Hkbc4X6hih4NTKctEmci2Qsk7eTGE4piGUoWn6gpeGU2JilxmU
HDJXBGS/v0oJ0Pe3/Q6MvK0gGSgLzOSOGFQMw50aNHqk9GfgcATBrQPUZabgkUrasxpZJxLaP6Ek
SCTQr562zeEUo7DNy+0iCzUSSJJmZSIbkXIJNAUKGH4F+5Z6l+XF1eLO7XDdS5Ucd8FpCgorB/UX
90GCHHiCp4kg/DEmxwUkfzMxeHRiJG4v3uLMe1OtEwlPST+Bzoo+ivbqqtFugcI70QpQ339iGopz
WCpUAHQ13l0WO2++h1QqZW19OmDMAsFmOO1c9CoDusmmgGeRxofLFesWchyCLnrfbHN5NPoF8Vf/
90p7uqukD7XZ0P5oPqwHIUCLx2AbjP9T8U8dg4av4KNjTXlM4PfYHDd9XoyZTA0pKrdkLaacJTwp
VpVQeT5TTZ9Kxtlwm2IfMF7Rnl1zqKQ61OuFIW4DulVHrXiVJQ78AZQfd7duei7eH2aQFvRMLJr5
Tm0lqIyHSzUptZrl7APf4o+kuvZpyFlGkigN//2o3MK3iloRtxh5fWF36Yql+7MmVX+E2zXu+3P4
yWXL4qfDHzbWF8abbOEaZ8bteDLjifl1OwdSqgblCqbpKe6nPNePYNICoTZZ/QV56FHe1B1cST0Z
CVxqOZI/VTN/9DMFmox5DLVstHE8gIXLgP9LqpUCPykmrLDj623gg888LqpHar3qQtEDbuQczwcw
oQuyZoUvth3YYXgC8sPfuDOxpLi7mFUWsOJ8PdMXZdxe+VgdCmF0KhXEDI5UuENsX8V+HZq8nbNY
1B6NDfc7pV/NcHDLmUzJmTZ11pko/3rxckdnt0LR3NFOXRxZeBQMBKpmfYC4P7a2CcmaVPO2oi0I
DN3hJZekvGEXOuMYsdLQRSEj4CaRtvqlpF+mKro9cE1pZ4htQRFt1cREmx+WUDweOIYfFgBEE1PS
DTv9jFomTZw1uPSCrRSfnWuBtvWvE1/XAVC628yoBRxCSU0MWmdlZBGAQs5BnJN0u/YMvH8dPrah
7yqX+GldFYlA4/6cOOS1mRdJWBb5yxLsTV0uATyIg6rlrSr3FYEfqZ3VPeLArWWVR4I9Fnkz9OkT
kMP59ZHJ+RG7r69a+Kr0pvCXwtydjfCEgUdkhwzMCQ4yGNpHLb08ND/Sw2yfrtB9znLNjKiM/JNg
jyJTZAr7zaUOBAt4KgfWHL5CAl5K+pJt2TsenO1dAQBeAXKSh3hAfe/MhZEyNNOerV98Bo9ii/EC
/ps1KOkPO0wfir7mm7NjMlfGkDhMcXUCZhkxm3R+FoKsSgnnrLjGvUVQDzWCWsn9qaFqqPaAV3H1
cUnMayaKfcNq2CcaCPhHuZMycrPnGDAyIyqnRN4krLAO543PlVnY8xDa33TS9LHm6KWGPZJiVIRl
agQgAUF611GB3NvKsk39qy8llBB0axqq0MjRW+dRVx4aT9xNG/gusoZFVlWla7XftQDvETAzUvUs
8Z6DcR1msFEOZj/yKW3P9QiIk6Az0e+wCUjUJ3KpVpIS3g7Kn3eLbVJ3dVOjGIUZoMQgnk4yDKmX
GAq4stodMEt++021X2lbb7LWW3/EIAvLPw0hg5aykbeUQySzAkXJ61gdDV5CZrKhG3+Krjei8eU0
S80bD8r7sLLTL5QaQt7h3BP0+NICk50MMCsKLnI7zWqXH3Pr22ibmVgXLJ6dYe4pi2XY842SoiP0
sdyN4L5LbVz6Y0P6hkvcxdBaz2GZ046oFTS6RbNTGEGkMQZehqBXfZ7p0TImVkq8A+MvcM3+vdf3
xd9ZVKn56HQJBISoS1exHbsPAnx4P+3J7Qe3ca7BpGgJ/c++ItJHfXQi22poluyzL/j+Y+u6D0PO
YbfkSQx6bv4/Qrbr1nHJa6VR+KGNBKAc/bH36zyBziqYUjSzDe/bFS3mCpgnspXrJeFmsfN2q+gc
osBoDoPZ906uyOnHPiXSPoVgLrDYDEMOhJA6VqCeF0Ye2k+94giSiESZiStxqbNdmW8KhbUPuGO1
2UmYF2dVHAO5drinkgLgWw286zsqy4+aHwz7pvHbhVVJEZ4Riy52cTE97Rmv7DdaQUB+6GTZTHIf
LQyQiJwveX0tH3eBobzjFJxjRiHxvPPPPWIjWdlGDGUrHLqHZ+CEtzhYUDdaqQduvsyteBOmOot2
2KUs26dw2bRkolVI35Ju9vJ5RsYy8KbhliPOolXWMMc6ZL5vne97/vQieFeBWZ66kZt4a/ZCD4wW
FRMz8jBHxoULa0/vMgmWP6HF0QfleKFxEpRg/YZh5Ewlkr3kC4CQJpM9Z6YGJimXawKr4hymwp92
s5SGfAcG2UANmWLTI2B4fBzP18KdY/SVfd0lbUYdqUvcTr0yYjiFBuuJaORfoCbhM4rJE/HcIpf0
IonqKQx7zyq67jzLBQSPxfEcO87ZY5au6SWjpa6MHUE1039Bf9VGy32JP2ZKipPLQEQ2CuPsPGBf
l0gC5OIx20mptBWHdinlWq1678HClhW4lJLJPAtee6xVRcqzIhya8Q8dyugqnzb2MS0vzuJUlWnr
mJJ0qSQ4B84OMn4HvCx+lnizFoSVxaMTrd+MJ/aqZa55/8gGEC2nqNpPTRcr7sHbCHCxTCjSFya2
FNuL11sqUBG/6Ny1JsSu2MxTrYbKXOo+0FIf0LDQwwfAyUVwdyX+apTbrbBFNdSz+iYX9dWpnbMc
bGYjP0AVIIfV/St/9d2xusqi3THI+nwq1Fk0SntLwE66FvBg9aq5ti1MK4bK14NSqidvveFwLRGd
J9kMB8te0DBEXNdAQNNtUFlxAyGTFnWUge3sRuFlzZUDAUS31R1FTfmxiHxQm+aMy+k7KGcd9Ma4
eLK5aksj0Pf0G2L475OnGlNBdsXptZY3jP4zp7v3gch5jAZBgtJMb7I+tcXspafBjqP0VU5qgAPP
qCuqm8LF8VlXN4sX1phMoalHQvdVVTXFnYOXf5rtGhf6N+dPZXObvPLBnf6xDwRy0GNlILn267mb
n653i5CkLMkxdg9rG6OItVmDfYr5JAu1ohR97Unk3dxHLNf7jwNJea9olZ6wg3gwbrdxn+gbaH5g
bULneedaTXQcrz03HyF3vVAzTyGNnZrEgvfcXoiyllDR0YrefCQ28sPKi81SIL5mUBIOgauamTcr
LINEMPC4d7IaDsciSw7bT8h+FkqKIAH/Bqyyg4d7Mta1+bzY5JJXDKaoQX6gocKOQCGWKjQVQSrc
yDK8j7nqKlmG7in5UVUev4W/TQGnWwzT+Pl9wP8WLWrRvsgYVh4/db4eOvsDorNRC7v4GVhF2N/w
k/k7c+kVhTtm2LyfIDBh6OEScz2yTX/ZfWE7ITYWDY3fqf/8VlRMDq3xm9ll49B2gheXsu+404Ze
PEv0vykeCWy18UzQh56a1YnVJjwLUg1VhVVzPG0slvGmicfIuTY7GJiD23kQK1i7eng8/JjDBxTW
yTNIYHaCGOoPYjuhhFzBddrMM+UEwtE7Y3DYfWJhlPdAUGdcuh4V51cJ2naI98DyiGCNViSFOSYg
DdYKrBKrWurxjPgsgQkn8mC1ut4vxgCvfmDASIY+Qke/h3FydGkG5/Xd1WOVOmU5LIACWVb16Tzq
6VZMnClgudsO3wprfbNDAfRJIm+KoydclEe1gw4Mg/qzi88nP0VfThybEV3LXTUSdpJRIeeAH1FU
LPSZNPzcHTVk4dsrfdJW7ADnjZylK2ZyxzuVZ2OBGd1vw+sE5bJ2OFLJXJEkGWVA1sLI0Oume/Mw
wULtl03BHfBDLqQgZAT3vmZfn5PW+dWUQys2M7Xna+LtsWIJH0Tc/+IbOmZI55RKjy3dqDQ0BUsY
TZGIMLnnxdQHxKiZPqNe7ulo2+Hvj5Y8lgiEP0sOXxOEiA2SKCFeclqCr7DIuyGmzU8CSl2n3800
Nj/053b/3C0sz7QubWnloFN1blYzh/v82Izx5M6DrIdGtP4GcFCmddpKhkn1dqlkqwJiBCfDJGp3
bbZXMfHIzsdIyxXlLeAUbLMffCZRmGmiSPGWcx3hzl6HfvnmJFAL75ACcKLF9X+4bh+Wh3uVBpM0
0xt1Cs6Zj/I5+6Jx4Zp5SQjmEN0V+lGnHyXk5iknByhfZxC50Lc6rCUwsCzgnA6JH7ldkAIrWRgd
FVGB//MUyXF4PichbZo80K2lEGx+Z9bD4C3LyLB597oT/4K7qazcPp+zz5gFZCCjpWY8v+r4Y4ir
Qp0agczob2TfeZJslasCHIkoYsUw7tUnO5CJTST4mWHLYXs92C5dW5KIOgzUQsXg/CZu1wW0iI1A
z+TzvI0K1bnm3tJ4PLCSjUkSZfgVp4EGR3CCCvtaOG3hBtQEUKaHn+TPSO2sGRnVhlP7DOwwTRX9
kNDewI4IHGy+d8iQrWji9LjIfUA6Pttzd7IDuwnJ+dAjr3JRarj4etopqnd+RoqIvP2yJxqMdPKx
qUFnlMbNeDVHs37HyyIq2rQa4IlHVQgBAD3ZM/ARvVQxbHg6yryA4+tbUfOBUgX4WJPSEEEvGJns
KyQJ++5rwlJ1ZsF97B1pmAhcZzep3Cl/duiGONBQpWECq9OZakFcb6hNrAciQONhACcn4lI/fdEx
7HUq3QSlBf1SEak3p4gllbedsOR/762MNpmT4edtpAXd5UyDgarz1MBzgwRcTbr4NOnMytQPuZBL
Yvfq2fus/ddzoq8X02TLlNn4+yaCAkxNmacehf9l1rzfsTp7XG1mBzpT/E/S5gLqEYnJ9lu6dLxE
+brzzK6u0bu1tqPt1Zfk7697f4pk5E6hUmZAG6YldyqPwm7uN6Qy+i96sksex8a2pZcDvRU4uSh4
2nUjq6DJILet5Xykt91ks1vKctQJO1Dr7IWmyDtgm6nf78h5EpXGarYG8nhen8X81NV34iuHaNwz
3SvuuM1A++ItOL9UwqcyVGDCbz8Zg5W3aeHhEvN+WDCNgyeclGFhBJP9TBTCeVd00yHbVaVfCisl
+za6a4lwIBv4YrH1atxkdtptUsYiA3mfvaFOzmy6trOHDPgfqvECpMegKfp8z6a9dxP2gcscY8pk
x4rXuf1duj/xAGv0Y0W1tvgL8SD7uPDFonnhZMPXNg8/LmdYCAoveTgJ+LJhPI4rWZOed7aLb5HF
1cxTLt6z8dsMWexF3WzJW3qElNTnpFTnaENiTc23qCx2b7lxblrTMbYOQYuK2FXNNyjZqNi5zQ6H
bwPNUsWA8aPCojccRmdhx3vfyMSFV2LuxFCnnlN9SSjx8d3Bmajt+9nAnMQSVpsoxeEO+FbDr5wO
xxw/gwaUPVLGh0Jj6cwnst8VOaEKobvTnaDRJ/qPHL5csWNO2TDd7c8UR0TJKISPvAjMV8mhm9l1
BmWDxGtiZqAqkern7bxAHQIbLvD5weEDbkfvMqcgpVAT5EFtzoNqGGJgzJlM1wmRS7q/1ixUt2Z0
4E+4tihO4fsitF1UbgyBQ/3mGNk1OUymddj48ve3HSud3XpTyu5U2oAvXzsoUziFbM/LtCRv9ObI
+ePkPcwNrLpGZahUWYsW05tnB0yNFDruDhJ2VEsHLtIzao9UTKAi8KQldH7jKusdhGp/lNN9L/AO
9x56kFaK4BgLe2gxO4zKi/Pg6gcXQ2VdDxYYcEmZSx3tgqCl7AZkPW3vTWVGvzTPc/BNLZI3aqUS
jHz0GjI9jj15t0eyj6xloVJKglXrzO+EpWl5q8gXOmjxXTS8ZvoaaoCJM/YpVjPfXG3PRkmhuPcI
BcVmd14in2OjUx2OJLrDLMJlc/uHRSePcPZmY9E01a2TjkaG9750lGoTOKpkRdTZ/aNYtRgvpSJ7
7WsTVcFAEUpzrqLyiOtve22UtvxwXemj0apmfKOAR/vJAMs6OFnZPp+FmRTmxIkmXHAdr2sgyHe6
9KXv0SmOydlhr95HxxEG5lYZSaupa3/Zv5TE+dVOxnS67nYi0OuLrB0GG5WaeybDFpFyV7oRfIxL
S9ORDVrLzdE/FfYx2PC3dmo26pq2npw5R9+sF7AK1Ctr0rTly8Z1PBN5a+qeBo4Mf5Y7CX4Wyfu1
5X/mpTKllzEnMXDptGwgdRsjMK0TcTyytKtct6IjmHESG9TDrl2GA+MsObBmacwIHC+mRoDeD6WK
ygnZMsl2Y+9kcOhF2IMHui4deWtzmZSodWdGyP9+tuYIn3p2Z9uVKXi1sE42xk/eo3NeVRgkGbvn
d2Avlcka48AWK5mIfWv7FZc/VsyNaqv6OT24PHH/kq0cNr83AbdOdK4MMWKT0m55pFOUPHuiaNQX
ikb4uKUSg9wez74F0p7LDn/rf9mPWaUUxpZWICEhr+Nk2W54SPtNirDYAejyUvQOxKgDTux5Tq47
66zhUgqBf4xCqEmoVoiEjmLBLjKPYH6aOp96arG8zd9u20/UFwKAoyFVdb5LCndpZcrKGdxK2m8G
Qb6JCLgmeLprTP96vAEY+N2QNURmw39ZmrRvKLlfCpyWdpCliRgVAqsOYICk4xNytzO6BpDZ7N2i
coT0OsmOUqiLMV/aMPlhssnV3EwvC52CgwdNAZjEA7ZGQfKA/1SUC5acS2N1BYSYYMZiipEbp/DC
tmC/ZeE8p1MYss+iS2X99AxLRHAw29dxWfIo82Z+TdGF01YKP/HjAc5ZCFPXBd8H6cOg4e6C0LZ7
VSu/BhIPo6NPn02uJYcupe3cR9q4w/XtiQsP2/sthk379sKCNlNEIyExoB1W+Anf+bu4H4ldbPte
xJ9UUi5NnSc2WZtUhiW4LbNBvpvEu23QqWqJOiusNWmOSEMLB8sNJTRxvkYx3edR4oXaxyqWXN8s
J8/Pn9rlyiVn0Yud38rrcnqeD+Z9bgRHNYOZZY82c6UYTK8xnD8h6bfpySpan7cXyWMPFtxVnMJm
ky37Rh08KhLPYbCg84u12ynZ0r2JmoMIQWty64lkENeYVHbuXwnAN2+XqM9TVsolxifW4tY8ANZN
Jl8aFebzdfgxng2ZEF7kzDXkcQ66hdnG+ugpbxNUje19HVaMubiUCQqkyRVZVRhYXyBCl9bp9Rxn
uDPDF338VyLtKsYVjx/VaCzb3Tas/KxGxEm7ErwxbM3CQEIiL408VEk80UvztRLwsWCLMrtY+8PO
aIYRP5cHSznqcZ63kv7gHeqIpyMcdd9fuw2L5MZZ4+V7Q8cnWHCZkVcxER+j9NI9Vlr9RWAlEAuV
O73Ee1kGb1Atx53eBi2PE9isjNTpWQNSyMA+fh/kQh4shpRWTeLSK4TcPbSsBF7IGdqwK6W1hGrR
EToYWaY5xI80ZzqHphthNU74t85bVAzykLPIxzOhJTgsyzhNE4B9FR8saIuqKpMiE+DuNx7JxK9b
eYDH9A9igqLGOaTCaLdqd2QIJSr8Ynxq3n0gvDeRcvcxzB7U7DkClSGhkxAsg2a+1aEH2eQB8qgp
AcFOyk4LuJeNTPm7m0L+9hVtkXRPFrVXXaHU7qHsljvtqGVzUXiMx/HPBfUdCbPe3OCk5Mp8LfHw
Egt0t3YBJ+PE4ILbtXlphBzdddBa9S+9kPK2vouvCka1gD2wsZJr8TLvhC+oxv5KM0Iae0ch8tpO
l9/N3Xy7i1VhCy4j6iX1cqupKIVedfkJVmrS0Ak0I8YDa1Ta4Hqhu/q7r1ukgeLwWIPVKHuRSa3/
yo1bn3fyVZXnUtHxM9iaQKp34psO+5YMM7AmTekgPloPa54LjZt7rXfopju/YUXASiGTEBpUXYAO
VKb02A0UzG5F4eVdSCElODsFw3/6k3qjiGk3XFpfW4pG2EyR3GHrMpGPJfiZxYz+Lh+DqaocF5DJ
6oti6McIeWcl9OVCtitqeA/STCOaPXsb8B1LznP+i46LnF59x/G6SOfKWg9LqzSeseEIcBikpKLd
OnJCtNJbUslScPcHh4D6G++tXYqsHu+cHgVdVWKK/dL+AUv+oBTvd7i8cc0an6oaXMZrgJmH4z2i
pso0SM9PmbNlE7za1yh4E22CvXThVxFMoxNBy/RjlQSeIYcG8YHf6Ket8W5/DnimzN/lGoqyS6C5
T+LI/zgUxKfAjFvAHWhqGPP+mE6jQo1gBnBRAgCJ4h8pXp4DSRl0YzRW4mCozXqEWhK5ItnYCXm4
GPRkymSpskHM6/A8YzhWKQzm4uRJThHJIrom+3Nl/ECPUIs6qs2Cx2/F/LfgE4pqSzVF76hPUrme
dKShd8qyoZZTCE/OcAvPo3FXe3N7K95gI9caUdJBobSCfeVkpHJRkol8RVYrKNT5mV7uEFjY1eT6
h6FAfTtzZXJ16UCHpedkTbrIp7szSaWaPdq4kw/kAHC49IIzZihuZ8PFtB0YTKMVgAYhkD3tCuoa
/B+KkUuG1GnozIlJCH9s+rEG+vR4beE1bzlVhd4R3HXyGp61ZN7gk6IQNW+20sUFuiIBh6CdQEsY
y0AloLailsxotQbJ8EOZWy3545mX8x3tne7+PwEoHQkbcIwJtICJje5ws+D1EgjDO0fiepBJ8M1H
wxRWHoiV/vUedZRtENgPvVD97009PQNuM4SdlbYphYGoC7zEaQKJ48VcxVbALwpjeqJyrmRwOMBD
cgVxZQgtHkuG1s4KJyrhxkKg0iUUN0w5IH37gL2skfD63pNbBIvtOcD/sU2QlR/JR+bxqRA5T6az
EOrGz12kNKWbzbKwpTtjGTUsY/dUoFhM4q6DcQk7s2/74qrx3Crv/l9HXsSFc5Tpeo+VXzXHguP3
12Fu4W5FOppGAy9SV4kVCZubIER8FpkWgj7j3Rb+ZQ61QRFbMYW50dcU0P4v06ZsGPY018FaYSGf
D0Aw7epoCQ+vo8Exb/k1JyxnPhT5sUesFtYKZrU1FN/tvSPf8xJXaviqZqq1z73Gy6PKE2I3FNZr
xHdaaNRiGV9svXuX47Evqd7JtCBV8N/FLJ+hcuyqLmabhANim/PitFIcWPqT4NS/VskaLRQ+xRI2
VsUGsAduFXjhWuOjtZ50Jg3AGaiN7T7oi77redB2xMu39Y1rmALZ9E2iSOIcsuOB5odUMBgdMbxm
6IPi0VHl3pd4rjkPWYlS8lgxVVa064V55jfZLFvpgpQyK4FKqkpc5CMuREG+ag+XrzQxcuUb7qBJ
ZgoGqOF8XHP9uEJxUJI2K/lsLquzm6uZ20rQE+m3QJDRBgb/KgB3Mqfue7T2Od55CYEn/ALoQYWy
EN1hdPWy+mmGC71u1e6umYCGtka68rBi5gH0SuYYkJ0A3OXFEmUhqb9d0QUrAEt+uoceiZ10YdpL
M0AIJRZ2RJ+R+Dg633JJpZi0XYA04oO5NRwjXTKOLqB1ViGKFxETqSCjmECWfsl9n9pADToJBdzg
HghldyX93BEVFQLYgDmC9ZS9r3JZp6eM9pSc49Hvx5g2g+qePFmKoS8oETGbE880pmLl76seOnMA
CR71/KztCP4TrKOD66UG4kmtp1WhmmAaeK9RDgVlgKcXQoj8kN8H+FGnbeHq6O5DOUYgFMJ6Xjnn
aj1ZGDtxSUJFnz0kL14mQrWC1TuLsnP+jwYmDgTzQ3HdFIBLHuRqapQLTGAGTxSBVMtRfyzbrM+f
Alh+VDtCIwRflnh+q7lPNxrNs2RilHOyMX9Rz/IMvk5V5oueRExNMxF2Q9nkR78y0LVkUi4ziH9D
Rze/qwoRH7a+QUBNPgbEtQeFJfyGAKudZcHerAFJa1Y1+2ZILfP1XgpPCXGpP3TbJfaiZvBNQFfr
071V+GuNn3bxObhjXHlTn4evGVCfsfBdny+aaOxYy2/JzpwaHr1v2d3tc1LcGOi5AJmndy2DMGDs
kBHieQWeReu+0fVjdpNa7Tug57c4m2P6e7joUewFOASl69LyCxREY7cL0KEJFrEzzKuMKi9JrKA/
yU1hAqx/v1ma9dsHUqvnp+yTIvlKUpkMUxfnBtRV8IpkgZioNuhqfqD5fFhJkm4075ROQp1YwQy4
AdkM1kjQp1dxbLuvR3eOyNX1p/zK5m+LKhy0iYfPa5e0EC689vpib/93q9PYhnhIxlKiQr3roaGA
38oIf/Qv7Fhk3PK3nJtqfpxm9U3PAwcJ6S0lXhDqDIRP1Ur/WU8R1/ezM10cpXl2QUJWWnv17ml8
ZBmhL6+c65NT+yY8WiKRICV89hIHpYesIe1g+rbnGa3m0Ew8w9rbRmINNh7yFqwpzKRa4vaWrTFC
00zfeJum2U2eSfzAzIzlRCsPff5ue0jmV/EVTAKIq8H9sNcUrXg2b/iz30R2XWoJf0eB3RvK8mzh
qAmntl1qazT1BSx+8SSeMfQs1a1nGu33FHMliNZPs78EtUL4Fdq42y4COgamqLlID6uJ2WjPBOXZ
aQgneEKC2l1YJFd8MvVOww77EUd14NkNgrek1mIANs0Czng0kD8D7CasZ4Qwmd4XcMBL9oDpGN/j
RNYDXzhK1WTYtijGW3D2h/1oGwFOb86qvmX6C3yNflEMl6innRWV5ML8Fu398IOv2mo7H50zJqPw
Y4hbkgmyoQrMcHWzoYCNULbVJkByevTGvUx9WLoIUoxj4mMw17OjfuB71W6s/odi0UCiugNNT8ym
wl4P3ASmosVoJrLzFAYOtyjvT+WBV+mjNJzg9IoXvxNiqsBVc7Nr9XUeYHiVT+lr5vjFB1YlvFOw
sM3KpGyn4LFASZk5LD9q2eGyz3/S3p6c8p8U2wJw4XvJxt1sbVqV3qxeUfo5Ym0WoWr6CtYdK6sr
Y6Z+zMzbFk01cWkI5lNNi1B/IKXKAlQmH2CxCTjXinAnAzRnHHBbjdoZ3QNZpdAFmQmm2y6Orb6h
qjYEpR1RmKRDsVi9+Ywc+5hBR0Xgw45frOi/d8ftw3wrXJuFINtQ7TrXc2JcwYbMz59RyNgjmPRd
PWTov4yV3VOuvhog02zyZ5vHMQTZT8OQxeGojNGxIlc53Qa2VrforZBtxQZPnCOOinRq4GGsM1Dr
5l+ipVPLYyTNBeXyj9vTXHaLYuQyCkemu63XRXCEsPO5+k3PSkmeEQUJ+KBe3Rry/ddg6S0c3JhK
BSNg2PVUrWYrYCMaYG4PZklZ8nRR4nTB+vrt/GcaVsUVz1zwXbMnmQMnNr8xevQ9Lk5WAQYQloHD
Frrilb4me7Nny0QEmoS0at/Qn3eRLZ/BFokwd8K3kWgTjSl7DswJJjWgzTTsmm0YswL/1k9AJ7cm
6lPD+jP3RDbsjZAwPHmTSQQ60dEVZk6S7NN3QZnMithgg0RZSudAwGhQMy+2hvmSHZJY15BDb+hE
huRS0UAtxxP7M/r61ePFl768uGaewb/LOBHJHYKGewGMi+5y7TR/1IM4hTCLax6l4DGtdSV+pgHv
uAhiMDDm336tMT1X3mnliLfY5XhsX5MOCCP0YVXuVsoV/sjm6h5jE51FOTNEdWVrGklPAKCA66Rj
8XOOSRUFX6xKcXdpDY8a0GNQHdWJloLecTnebUQ0OxMGbapuF9q6A1bs8dYEVdghoCJHQ6Isk546
OVWAY/krmJW3G6r9opINIPE5RZj832T+xrFzzhgYvwwd5tLdaB5AQ44qxoNZTXJ/l+hEEjqvCTJQ
/Cgs1C29OG2jYhQCIGQJZbIsqy+1cxMT4UdSv3mHsAasQssBIM9whnH6lPf84LB23W/6pzaVtBDJ
J7oGDwWQczV3IE1IuqYb1UC4rsZjUAOjAoRyO60HQNpgrp6j48qTmQ6hGXgZd5j62iFN2Ui9nes4
OMb2AEi5f+uuas07Ojdg+eu7w4gahE2U4W/xbqCYoIKXBYld2DGY7jAuSDb37EB/ljIMB9q6yHII
QQ8FtH6xnWOEzniykwP8kI0OIDJwD6y+OzjA3F0AL2X2tEj9TwCbVr+RD3NCvk5SszdsOpQHApOB
504hFnr9gpjsSvGipX7fMVi1QhbmHjKLN3YxZeu3Yw/4IlQTAcizaIUa7uYA7tr1cvgu/OdGjfgF
deEf9fX4oREvC4ELkyMxuWCIj2TPq7YxT2Z0Ehe5UAbZR7Ij20jHPhBWn+A/Ql2mohi0SxP7w/8I
r3C/q+XQCe3MvNUSfJqKKkPgF65kfZa6NL6xIaDdIMql0jscrj7pO52043kg3ee/fiRzEl9D5zyF
8tRZAv+X9QScTaPGSUpfc2wfXV8ZkV9sKzLa1dgeGxYDGKt3c6T7xMb0TBcLB34gVYO30C9de2Ss
8xfTmvMY7nVzPlDgt1kyAvFkPZPa9+pqr7+U9jIvjT2w7/mKNJHHG+ZCosFtDX/C8MfIVogOfnNV
KQVlyMIPArlbt0FDDTbzPB1zWQfSEgH4XXS5/JpfD5jb80d6mhDjsNrD1+KRksK2EMuK9ugoMciL
FgmM3UZl4nLO01uilqpAmiFgWHKcOiWtGlil2r5pzS6ZqBRjL3c+/UPPUVJ5/jsJ2dOOovvx5+u2
AyftlLj32x8OunUwE8NANqqXERfIrkvsHgNmCw6WKjSxoWq9rJ/FYQfFb5jiSc3egj+7S40FDZKl
EbhILK9VL2BholNbNsZGR5AWBUJWuoK7Hb4akTAgViN5owcLhvb6Br3BwT6cFBhz4Gx3QNmyPwso
K17ClIIahD6kBSgWunBKapOoS0whmyy+nDFJmjDMfw4b4OP34+f9EMsg2KL3NIKMUJrDbs+T3YeE
p4JRppx//gVEn0rELh8Sc2mubwtNPZEIqAxVAyAxtCf7Qz3N/A+cOa9/r9ksLtYWWaCL37o6lUKN
VTTKNnCzvIpNodkJXPaNH0wdve1gH2+6isQrbzUBWbi6ZwyWwODvxS1vE3mWJ0gBlyk3HfQmGu1S
GXo4MIjDZvI8uTTtZKKMuLzvUmm3Qzy0PcQJkbsTwNN4uN692Uup10gY1L6HKdGL/RHpqDoA3xD6
LfSpaiyu/qbsQGYgHhdu0EWYjfjeuavvX93mUvLX2fkG5NOugFf5FyfgiNOgcyLmyI5TAVWQOkL2
rWQOK+hYzfKqOZWHuxwCYmQbMZTD1B1y4sV+ss8Gk+kegjNMNZSWNm92M5/PokgJaHqjv8RiEdkZ
jK4hKU9oZ+IPXpZZHxIPfZeXtu5fO6KoSIn5B2Oj3+pmkeKnHKu3U8DiD18WNWTkSf2298E9pdYP
W8rcDq7XJAP2hadjF/GZq/HP2bRM8GrdYtooyIaXOM+e6+wt3bXMI7N5UopPK99x+R2DKQfohV5r
ZxfOAeECQ98cqsUm67qpKqAHLSTfX0GCxMzSDVp4gesOW/4jWc3YPqfAYyDN0rs6IcIgbX4a2l7B
5Wwy5ETmNyoqha+oIRypG1gDKA+bemPGc206KHYasnzZDeY+AlFS/xpPhvFOdfjXrlE4oAhA3lhu
8M1Yy4OF+6hWdx96+p42p/3u/dkWoAZftw89PPGkO8gFNI7Qb3BkISR49xuKI+7GhC25LGbp+I0B
NWG5flUooIfB4Q4sLQLKO1Qe4OTIfl93hTMaYRfHBP6QkJObFUskQ182VxSj0wEx+AUqFCS7hHMr
galJj0ZZFP98bziJUwTMVjjAttA5LReLXavpOdKQk3fDwClof4togToNqhGGlN7ts+AaNSiUgOD1
UphRBJ7bHo2UYEMAgu/IvYTmZzLGeJ9f45pmYouX1n05kJcsz3a4kV1q4BgNOu2aDuz5mpUg52uR
Ldp0uWt++cB5ljrcmBJnrRPHj9yRS+u5FHW75t1XEDuLS93FtoQOZfIhYfoloqghwxbLYvVRBVu+
HIprMab7d+CLpmViaKmFbf/DJ09bPYfrFvcxZfU1YJF6czxfVHmo4Bbar/B+/N9JVmZPXiKFGjuV
yMx3AIeDwe4X+zYo8OhkqX8Kq24IqV9LDavGxCiLaqesJX4UBnc2x09LrfYTguNyzhm6fMYH5aSF
fRAJ9l+aZ3BOXlHZ5uuqjEzuRhf1jWl2Rwc8fYbEkRshhHpwOg1WAV2SL4CPSbXzlTt19/k2l4ZJ
5MjuM+FDWpMu/Kk9deefI+o1fSY29XO6nRfzwurFsRBzQ6tyjMDryWNFU73YseDXTKptmS5CoX7z
IMDUDKY5aRsShDTzeuxiqwYBtZP/FrvMV638YvvGT28ePCSQY2XoxJRG6MZ+jcwefv7cvgZchqON
etnTbmHm7k5SgkuHVE2DwACuk8frO2yj/MWoOdymcn/irEYPZqhRCK/GAEKWrOUElEo+tLRisY5+
kM9NAnxUCOjptlYqy8LlgvNTNBd3CzrDIlOiwQGjLfCa2Fim8ZXIt+jRSmSoNgAOfuns4yO0naHh
+8zZr2XzYjvO9gZuTbz/FiBXYokWkdhCNAOFE4ozcLsFTyOAannZNI+McE5aRYNKBTW3kKsXDS8U
mTaVixx/HBGHIIRb4kVkd3vibfBTdjLKab9scEkjcfnsCmT2FcCQrEYr3+OppvbydjzXw2w9Q+H3
VhQMNENT/vV2DF5bzwte0m9AqKmjnCDN0bJipldDT2yH0VkAAFhqQi4vafja6BvdClnMhSKFQuUI
wVieTsRX3M19MWdLJf1u1VZjeegbFi6P0PZI73r8xSllluVjSWy5THAQvBk3I6pNfoGtoAp7cJe4
4WNV9BqDtuUhTKHF8U9nRko8MIgJRu+9J83KlSUxd2IQk7GAMWAvMACmz1iO/kusP3MpPFHMbJ+O
9rtgNK0gDLKo04Y8/hk3M9X4PiH5S/Ap5tMHZRJRoYW0YeqnWW/Xx4az3whTNAjFf3G3KByYTWbn
Do05j2xf3qje+RPmVjYfZTRX55lzSoIwMfYBWfxOh/PtI1toAM91JXNONnOIhXuDjMXqtKpobAfR
RlpwSr7QIvk/54CVFjx5NmimLzFXhUX2Eg994rNSCaMs1TqQCDjLy312cPZHHS5f18JQquajQCAK
0NR8McfgJexldGOwtvxr9KTOWIpPkIQ0Y1Ef64PQ7alTWmPep6IjWsV7BcqAYehA5iG9v1vkCGRh
N4rgGrE+ik+uDa0tGGEIYGr5A3/OkymOOqi3mPEs04W8LLXJcw464bdi0SqMgDjWaV/UjYSJ5tfn
eCm35jawPlt6v4Yy5mmrbpkP6ilzO8r6Ol9nfyRi3Zy8P5z/XjHY+h9Cly6QcpxufUPGGl1DFOdp
9XtS1M1VmHRI/IKK/Ar2Hsf/7yXCXR5SkMyFTX3JX4ikzvVYF2K8bAvifiWD/1n3ijr2hWTF34CY
VUNROWR4Z7VMn7ysenBE2MPWgtPnwKm0ZbKg9+PAvFWnWvh6ytoSs6FNKJrwe0WMijt8/ohIatgP
hBUeqgGPFJuQKl/FcWyuIMbXAIojwrs6NDlbH640pwZSM1fxshNEOGZdXzFhFAgYLKvMeF26hG1w
lGXQWpRG8H4YYZlmIr7wJk6mftt4n6mF6KAZbUZIPoZ3E3YMhs8vzx1tyBPLeJ6TCspzx7mDQMhk
vG1TuUlMP/kEuXYXRJgaemL/TtT2D8tYEzqovWymX/AXxNkwcIy3SrnHEMcMs1TtOF51i99KTKwE
EVcKxsqDfyxvgVC6o2dp4hCxfibFnBFIWZ76nLnRCe4irn/adnhyhDW+revQiPMyRFI0uanB6/A/
WxQ9qGKHaBVpU+OQjDeWZJ6NxXoMjBXgygUAMc95BAnU/yAtntCmMaR+ZMALjDFQ/vNn51MKPXX3
WPPZjJb+2QCBJqSF9hqZkWJ6VUCHNZgNkbmCh9kvvN1h8x3kxPskNzEjCcFarV2fFUA4qabYoGb8
LB6kgNvtYkeT3iOZUpDI5HMra0e69clXxcXQOw1l3U4DSjGBz+YIbQwGp4iwTuLJx28pF11EpBeu
jiBfkyWHKhk/NT5MusI/+0NgRPZCVAWavvFZFt/CPWGDwjOAUano0TjuU8soEao818Uo8zJRzFI3
VTeIcdeMxVSfEYask2h5d4l3D/NDL9/LqMhlRGn0AbHqljE2vj5jVMM0bk5p9z7OwsxegjJelRwQ
NmsRvG1qdPTFQRUewO7a2uxlQR2i6CJ/Fm1CqWnqOkxnm02Ts+GOl9UG+beMbrKMbivSAGmysS+o
HLSzGDuXxzX0dVbfA9Fv17/cics6iJn+W1Kry6ophdneKQiNF91FfZ0Wt6xnm6JpKf56mKiNxYpH
KUnpwFoXV4/xyAHgCXzOyEyBNeSwJ/dNu6o7dPu01+R+BJxHPofcTjzcIFVkkP1bPV31pdaUhSiJ
wRX/BoNkagnq1EmeyYBO+2fSaqSemuifKIWS5MhrAgXlRDcdVSAyW8M3uQCqcBbqnkkzUzx+P64g
+QLwZpU7X9wYsTfoAgw93SVBaxvO8rU2MXqDbeBGn8/G0nuDatJHCA+/UlmhDQjC7Gkh07nYs6vs
jH/1i9nGU3PclQWU4DXPaww71dUEz0u6WFVAJb20FhKPOCNfdD1jzfS5jqg5pBCc9dqWx84s5r2L
uvtCbbiy/p73QRneLD3oK01yfvrkUrYwBnf5GAnZOXAa2IU5sJ3Zb2kFN8zswiQz1J0lRrWardyX
4WCiZ1RQlT28Pu35LbuSj8BWIgUZJqhWrUG8ftXgWDpO/5mHL0XgS01SOiJKcm8rMU/16nlwJZ28
rjKER2fvdeVvuiNPj2nhKUWnET+umjcKxgU6gBWZVzbhjeWoZDHhMvPOhOWOugiw1mbrdV1/MaZK
2JF54mmdRutwIxOcMIEqgzinvKXYlq3bPvBaXs+RUFJSxS1Q9fQ9vijaSsSkrmRg99hSdbWkiq5E
AFxPlo3W1oMwKdaTn9DIDXV3RMytyfcFWwx4f81yiYK0SDUQq4r3P3HLtq62ryygZERcPNmJKTZz
V4bLKMDAgnaGzCHiokSUCMe4dUeVf9mtb29dP9Suk3vBCshXEeF4NrAzpoNe3PUsSPFH4RhncMA/
rVpJ5W0wR17zgJBo1fZYNPUHVm1XMkv39PICinK+6Jy9/BhFyUVDMktSsbZtpytgT0neN6FBiI0n
86dmgp1/sFwvFzzM1JEArvdY2PuNBFrQ3gEsJ/UNyd59mCnukVLFKDtHCBD59tinaYazGK+CHjUP
CtgrEvf8Lz7fxDzONol/iq9/1xrUMf50NC51FPoxwbVx54gvRQaYQkXwar1oHyhKCXFmvVkYGGLP
5wz1lZC8HrUp17V8x4IY0j7aJ0yeDCOlIGJ4owoj59CbeEk7MIFwkFLk/n1TABki+hQ8ymDhRgEc
FaopsJa1Cr7zwGvibpWNvMNW6wUMzg57w0JunNR43VJqG36sFVrsPmJDTDOZFNZ1H4WwwCu5s9pk
O0AjwPJFwBWrFHfOGYQuwfOFf4p1fagnc5GHByjK4tJcPCZ80LFl7taGS+SGULZWryBfM1fPQf6M
t7Ft7OIlDEQMOKms8vg9Man1t0jWlXwSprufzL4p99NnAVNRelxAP5Cep/7tFglR49Nx9cdP4zm1
ngiaZN7hxH0l6cufdko/dTECzhk3CGq7Pqm5s6l85FkmU7eIC99ZqU4x12SXYWu+btvxafPDZCi2
CDcXHZwrzJnQH4LeTx9CFqcXdB91k1YklLEvZ45bUeKwTE/yFq+hUQtWl14t2GxSEojWQXELmndm
r03TVzS2l5kHfpAZv5FvlxzR7XbG0cOnfuGqJbApmpPdy6wqZf4YXk3k4lwLfypshOrF2MePHo4F
xJcBdzsoMcFA4jT7Z4bicaltCs4HE+HvivmzEAK1MrJ6xsOKObUIyYL476I4HhrR0ZumSOCS6ai7
ELAhPU/Eibh0w27dfeIafN6XXuXnfH7yg/K8L6lilm9B8WhKPm1zM32mllZj3Hlroln1K6g5+3hA
5HtpuE4lVqf7R52SEmuWcQfwQuefmRPbfp3qBlyo6fe9ktXSFhU6D0tzvPj3r9z0Wl7tCcKp9uKf
TtfH/gB2rd8L8G9pEeHX2ZQttxt7SuELHHr0FrGAUUDhIi70xTF4dXbOAwPsnZIlm6qArVaerTdN
XRcid7hS+P5MeIZ77sN9k1bh4FabWTjvsoab1JUasxf+/3EsTufb5OZZlJV21rmZ3Cz/Jv0i9vS1
q6RTlUI+bvg1ziG4mwmRtHnrZujEibp2pR2jpzcMC87doPgsJg4zP+uMD+nIwNODokCVMjUmN9Ll
vd+QdZzqSnbYyxFNxs/wgrtR94+chydZxBnqvK7EWa8s3wHlcHIF1/VYmMPrA0+oYnme70nhtdl8
En/o2Q9oaAx1WKjEky1WV9GHJX8kkzQbF+CngS3gZmu7pdsgeOOoQxOOK6pEByRIUvsB6caXtzyZ
63xNoaO1MuWFZbxIhcwAQG0Jb88z3tyZStOGbXcBsJYXkSpgsrNna0Ry3jogppWJ84NyO5Xy1IH5
9wilNWW9+gApemA9tM3H/oxWqMgOMN8Mm8BLI3/KQPG0RiZ5+RrqBQAhHNvuf3+buaMhw4/1g24J
lBMRNBZsrYUixIWvcsuZMmBoNBNsBcTVTyVkVaEg7t6R0Yel/0UXNQztVkaWaPecmNFBOVzrPiWu
R2W20COegjJG2pnMaMDhelTFLnclzVmfFijLAhTUhYT1zGUVUNN3ih3KGqyx84Ux1ht4z8hEE8gm
94KU+e1FZfgfX1yqDGTLgp6ljjTMHNBV/HV5V3S3BN7JraTbEpn68sZHCu4PvXznzBpXUOQPMCIT
VnXT6BnFHNHKx0hUPhCXPfOqY2a+JsV4M+GXN6F4yT+rWOiwrTEeI0tiRPiZaA5F1E+39XN3xeF+
7Vl0mupz0jW/az+UhoBZMVL2mLnEyTlzpDET2FzMNAwDT9ieDCpM8kYGdDLGmgg78w3dIL+zqx8W
dsk9SknPe5kXEqiD2FkM4LhaH2BpUqDTQtWE5UGAzAgABC+t0KOMLVbC6ukWY1GtNY68F4E9p7Fk
2/pmmIg+Lq8IqWAFhskoMn/tIqs2gj+mFTCEtK89SCf7+O/ulLN8IbIaki4fYWS2jeOUYfk7dVFR
xwXQA0DJBxoXiFQ0wVWwA25IJ4ldeAhI3dk+kEY6Ie5npqEL10/wUKjO9pwP+0FWLVofTMSG7ksF
hD55w9HdJndKj8+dYiyrOHAB9JOU98WZ5y+SdlW2JGw+3gDlPuGozfJ9hBtANPmv8E+dZOiUCckx
+HNQ0Ye7J9vRTK7Ud2QTpC9vAz0RUKj7v+8CAOvUb8m1AgQcXTVqvhyKnOy14W9JV6nbgeOaYYPX
xhXJrUMJA/JUF1DNMS11Og+STymSuSk3KTn+ahIHfqpJ0PyvbRUhzPbnx6FE4PB6XTuMtcJTULVa
y4vyNdh8x2WP2Y+rUqnjsmfTatEipJYbnUZSc8OopBA3HfwNraUFtPs00hpf+SwNNuta/sVKAy3x
s6ucgJqOXpEK2fk0727XX6QI4DwCnQ2v1VTiXeOJe/nQ54gwjru/Y/B5SA42D4DCTsu5WOnPmhp5
3j1IGrvb8T0wEGVdzwq2fmUlCpWlQkzyGvOvjdNcGoT83Q2BAE6Bz/Pja62uL/+oNbpvQj/LCdTl
HTAsWT7p7IS8ZR53NoCvZbf03KzTHX0nuQhR94+Kzgx7GM2Rqrehg/YsQYtfy1WYueWjVTqy/jP3
6mybiEXuzPM/MEX9IQ9jsqjEwzptjF/I/+A3iG3LkEPUqmE0OWaRPh1JPHPIJaU0yR2MnESCdEiZ
jxFQO4OxJooaSOs/TYsYFzZlyb7558hv4nndD8m2aNt/FPhWhZML51JIk5cG58lQSem5CIGdCrsW
lXZcCTak4z7OIBFqUttp3z068XfHbDziRnt6hbJBZAST8ZlmBzL2mzPsifpDnmQI2WF+1f4KlzBU
6yot3Hb9jYBp5bl9okkoMUCJbHD94oG7p4I0RS2BrWcNeYBI7hOrUleVSgYqL7Izt1Y50wc6aD2T
NHNy9+bTfxtgCoiacPMtQSnuU8v4Cm7Za+yuXaI/Nugv2Ytou76nINTOAGpyKljpj0DxX5qgSGJC
3s5p/hey8QBUBX2gHIWzSTokTOE4xXBrh49gRmpXCCTkhBHFlresyja2Hjz0kFCf///v6Ch2suWR
FSIkkAsPujY7XMwODSQCQofvVHnX3ZtRSLQ8EHjT/RK30Hll9Matm7Sre5gZvtcuHGUfZy2Pj23Z
hL+3LBgbmVkvOAuMfZT/abDYhc0dsfaCDeWEml/3Xmlathh8nQKZ/o2hB6QOA/Ye6wF9QttsOltE
ojKzn6m25x/2kCA8Esr8IiOg2U2tFMIwtDgEmEvsbFJ7u5DEG3B+HlcEBAyccpbXYV1z2kKssuJP
Qu5j/D5zXBe7avQSXDrGKQNvnbi8rO9Wn28mhvForvJ1W1cRnSuq5hnL4TKgKZcc1TW/TJnaPb90
iV81IZUTqlODZtBhg3RdnPuJa/Xf3krZcDJgoYFOd+JATAYKm31UoFwYXPRdTUQuEcSarfm0YWc3
CzJhQTgTVAixlI1+5dhObm1WzLQSBMQgXkYwyl4aVwYumcgMjfo9jgg0ZXZVSgBGhPuxUI+nBbY5
/jgE9C8fexJaTtHmHdq8GHhwc3V80Ub0+lfIHXnjKUMXp11Wiz+eFHs8+30WUvvnkUqvEpglWX5n
WJg+vWlutHKVmYPnPE5xYJ+6taDUQY2smrgYdcgJo7nlp2hKesFb1a6Aos4A6gBNYAvILWIQ+J/u
LPWubW/5cHYOa5ErUL7q7Q6zH22JyfIiTR8q7URNc3nxPL983NSyEGC3yXH1dNnxaFuTvO8AvkvV
aDb2Sfd7NKu9dondHc/epsE2ShfFNa/7pL3UF9uw2Iauuria7+A9r2ic4PNDeVFKQvXoKNkgOpPM
+sY1IRyGpPqc0YfO1QpjBnOPYrE3URwqO/6oYFO+GDqKwwFvuBf972kmE687KnrnpixaDgj6DWrV
ZvkzXyuNmXHn8E5WJO2CvCjRarSrWn+fFSlv43zsvvPB8wFoG2ImZh58Z/I9QJtvRsSixLfMuWvm
JlyK5LNnxyh+kcdLojUo2kL8cb+D30F1oCwmdssYZvtjNO2oP40oS/JwDr/qAlwl9aUbkwYuIGxq
JxQyE1DqzdS8jte1zt+GR5DF7eXIFs7xaJ2yzBthz0Rge1teAiCnzZHspSQK0BNOQM/I3Vz/cdOf
32oLOLQv+U+MakUMq0whFz8hLpNn5c2Jv+riHEJfPEIpqUIp5Kt3t7wQl9b7nwILyNZNziR1DcQC
4Wst1MyhhePFSOstGw/gnO2qLd4iK7gBFj93M/GeyGa+ai2k6w+ZKHILMRokZTj8dKXLH1zIfs+J
dfjJe+VsQP1pE4y5hl7GBrdheNqknr0KqKSZxrG84R+IiQHyHPhOPCXgyP2m32QeHeweJiCzSwUl
x9uhwwckDbgJk9fBwTZte2T/Lxcp3WQlplZJjKR5VIq4H3Drq/ExRR4B5X/MpSVf/UG8nMYfeE+0
+xy3FWW4Pijzaa5ZcuY+4sFACqtSpzIlo7nMSc0zvE+cUgdbdGB7JB/cwa1hcBJX1Dn2eMjzqyuE
vHOr5so9ylClUkiMbvE524ZSDM7GBQoxkbMQyKzVvzTxVijhbRjxG1ypHpNZtC/YZO/SdURYO/Go
Uadd4a93KrDgwMfvA/Z+BfM+zQ/eZWoaum6YgBMq+gxpULYNv8LDSFAeJDfukTVos1OXZf5ADlB1
ky1spli2MLiuVaCK2H2LACblsYLPY3wwYxDS5GzkGaPVg8AVsCgTRVrJkHuqAAkbnXGJifZ23R+H
zq9yMmrw5liIjFYrS3GmarkIbBueT192PD9Vaa/7NhzcfA2vIofCiqEiqdGeIBIZo21wrZYXcY3b
C0A2ukAk5gLbYe4laRbTgNI5b9najfCkivWh4I7ecjV6xsxzjx/aQRe4GnJbl6JheyDu7ljqxp0g
uwGtqg/sBb4g/JbGq/uCMTjz1UCycRfy0wIiw/+3fTcJjc/bHX0THqjyJIXnqTLCm35vFCQPomeE
HfFDgNkC9CnOAsNvapNaKSrV56+22d63zZjaS2HZWTLU5aEjYr4CVo2sLHzAAwuTsQusyPJzrJ3/
7L/6HUQw3U/P74Sq9/HlULgqpRQUBukRuxhYX02ei0JC9T+VdNBMGtuoYefUUVzMrn7njncM9X8j
GzmfRXfTSXYaSB0XskpLpok/P53jMDnZHYaMQjkW8+DswWBWZJqZ/zP15Pjy/L9PByfuTJROHwTM
CXu+4rKg2Ncr0neGYJZUcxfZR10k3kqXTzqaSR4de0fObb74eAjcSW/x4DKeeRtoSVHUz4VTi+Xb
Ss+vwIqxU4hUn8lpIF7s46ZUf44zFcL0GKzsKW83dwB1kbzd8qUL7uEMMbzRQZ22eSdSO5eEicXx
H171AIn3Sbk3J1S5mX+cwi3Ri5lbORa0ewj29jLeoT5nwgzLTaw2wzsoYMLIncx4jO1DQBYFxY7m
LEOdywHM2+q7VCFjus75LI3S9r2+G6DXBJQHNphWQqMIW2q8m7iLhyHLhJ0yqa3xKNmbUNDPsjb9
hYLcN3xMBvMquk/UsSMw4jgmPLC1XGcRBUmwB+9PCJ/aYKdnxEpwAI3VoKhqNd38QzIQGHyXe9+E
aDyu1qnLXH6Dqy6Zz660HvwOb/upNOeMyUIjWjWJg9jT/MRWEJTQSejw/84BtqVFrvhPcDkm2jZa
ajBMm9XmDkM18yNvnkzBs845zmSOIYOdn+dj2lRPbHe6+Ey1TVLiAVghLxBfSRw00EuoQr32Rn2X
xyDDkxU5BwBBoKGi7SlVOffzu60BiSHkFtjtX9cWkxmg/8yHHKqag3C36T2dVccd914r1XA1Rr+0
u/H+M646GS4QrX27uWo3niqSmujn1nOQwndOeGOD93VZlmX5Rzjqpu902nZ8SzaaNr2OoANWc0oB
EMzxSQpDUC8zEsm5QVnwHH77CrD9Z1yBRJ3HWPCu0g6wnlkL0XZ6a94doZP8YSYWIarH5jjzYbFi
fx+3Kb40h6qfEto8/bRvQt+zsMpwuBIrsCBqunTw6Wwe98cwYIj9VJWrA5UlTX/VaGvBqqykT7MB
OrmGSZr32Ssw7Z/CYW6uechCsk68Ls6tLCbLhp3a1j4MA1596lc1UJfH6jfQvIIARYHdTUrJFjZp
zXijEBkjphVzCbCiCjVflNA4Q4SdITF4PZHfp37Y3i+/9uk6sdOQHAY6W++7to1QCUoOVoy0dwl0
ex9ifAwBT5QxE0C1pjGs8llkVp5OekAuVq9qhR0eRFLt1mBKwoV0IXpwXH8zZNHbkrt93clcnkFQ
6gYdnfLZcP7nLfWC6FkwQnPAed3154TKwllGmty+yNfnKb4SriWmgwlrKyMDS5ogouoAi9wC29QV
ucdVg5EK8f2ACk+qZvPX91rFzYrtusQC/1sIc5uqlS0BMgKXlnm1mJZbOhFHpEFeEiL/WKjGXBXq
i8yASL7jUicvDPfx3BRPlCxAtbUAMUVEN19K7GbQS7SklBArHvX6yqAW0aZH2G9o9I1vdpoKK8/7
kJOr6pC4gYfwTZJGYfuSPJH4eySo7c//G3JIQcULpnZqZSsadtGPfHZ60uSnjYtbi1voDWcw/iA1
a76CZQyrdYlNvNKetCStrCVJDJ8vf3333GuZl1cVqRCF4RWKOQh1MTL5ulT8QU4ythnOvBmThYUJ
ICemnWww427nn8/Vdx226T4soFOiA7PfOCLB8ErHjb5Zth4UICHjoWNxqpWeP6t7qzbo4j9wEQRT
iZmbyT7Ha+GpX2CU7aBGZLyAFXIXTF++Q1L37HtFEy1t4P8aNbWUqErK6Ho594IksawLoxHYWxij
gt0MD9GrZul+K5vcnw0ZxKbo+qLKd2nXGqEFQY/rraTF4mS04ebCqmbeBt2MwOsUiRgd03ReRb0c
5ize88aVU5DQmNSXQIKcEdpzbpPaFhxVIilnNZxWB89XEgpBkUHY7JhfYkYOpOkIr6NuY1dUjObd
c8r9mCsfsB7glYNN9DL6XVuldqb4eGnXwjWwUo5PFGnmx0NpScWtfd0LK01vFjfgYB0dZbCOPy1G
F7UiZr1M6bg5sYrz/NxReQJxPRCmr0hkWvLvCuqek1BZKK32uz2qYnljVFbwowRYuwYEZaoMvVXX
Iibl9GcAaUFdRHxpHIdJDlHRJ+UMb2dSs00cWSLzbuSu9UZOMFcwxU0h6VdicDtdNdcxsd4+Fliz
oaE4GU8ZIv7s3R2bfFTSX7AxUGnQflrn0AaREqZcuCctSQWkhmFJBeOzuXEvTX8G6nVhsqnTEYf6
9huRRYTvh8P9d2YNkzDmCoZrUQU05Q7U0MSlCWErr54wh/ChPicxV2Cji6b8kEdXf+aJnQi9200o
ayb5UZYP914+Ph428Wy9nHhishhnjIStp4lq7HrKXLOt5NCPwY28FNgjcF1Oe22FkBoA2v2+skvt
wQje5t8EgG1rpuhjRDZQfVS06Rwss9tQVPNO08ZbplM0x0bTqb2Ze197VHNyMLHXcujaeFep6eZM
0FnQHeZ9whD9IzZQJPmSaDAu+Wvkxv3J2OG8fz04Fl/B3BwaBncIwLxaj3SM7bEKpmFWuldZqOrW
QzBypWTrsf3tIwDCywqWcj69t8BGny+QLUmfjYhzaSgh421OaG/64G82yvraZ11U+NkrFTZ0d9o/
gVnTueYLy3QmosPZ58uJWREPkvWDsc/y/cYpJbfztB01gdCEkHVvvrsEyGOKo+/LwwPvFENh7zIV
lp6QxabyYZD5m5vKE7wXTdraJz4bZNJxGykJyb/gfVwOvmnxaNmu5B4Hg3WjOsb6khTRe1F5V+p9
sN06uqVnvb2+gbLCbpv8u4zwig1m2x4rUi5fEcXo23hodO3uKkG5ZhzakBzQRQJjET0FQuZtSc/3
ilZjfJvH97iMlji66FtkVxIlJa44v1XmICSXxFOwmr/3OkjjPvOYmmWWfuSg4fjG4CGd4knCoZAi
ZCmzLYV5x53dZktRG06WTQ+m98JWqmZrjPi5cuo3i9zDmr39Ys+hLKD/KazWfi9ca5yiQbFwiidp
ntUvpywQy5vowwh4DykkcQIko6oKRUJR8A2v+8SyIPmy34YLkV4RKyB5sJZmetLXTdAcvFeG3EwS
UUJQXpdpyCYVD11zf5sNWp8Pz+euK1MYAwfREEZMZWTUGjXZss+oSusBl7z6pqrMSJZVac3A2fcR
g9M9fxwyrYPnlVYGMnv3ZGhyUPFavrNHP7o6EJHyZ6XaDXRIc18wtRO3DRGmj3ydpHLzf7skxRpI
N86iqMm4A25Duz4R9M2vY1RgHPQ8/tn0USlG4JXZw10XRKZHbRrCbPljc64xb45iv1oBX6N56zK4
YAIYOP3jXSfa6/Bm+SguQ/1RKs9qpz2xqTUf4xaMM7LCtsa3rR7xa5rlAqwsIsErf8oGUZ5gHCyz
f5BwG6kUyd8ny8e3v4jVcYdv2vM1O4qyPxEck1bkLTI4ro1/tTSbtJM8jDlg/m/z3bzSpaKgW7cU
AQYyiLnZFhL+iFlTGN5hgf1Dk5Q11B+02Wgc5Qfjtt1KWIkiN1XBaTs8M+PwVFdCXlga8/Zkkb3b
qqylMSnPqG2mWM2QTTpmHgkDRoiYA9R2H0dxC1kNkwtzwxZC7u+Mtv3cK17G+2vz2m1QJbEAkQDd
uCdf9ZnJXpp3LTy1H5S+Qbcdr6SqRaJGbSdTWvF0PHswPVBugaUURTDcyAbjcgoGL04sI+ZoL0wV
Kq1MUo2X73MMpi1JPdb/P7uywJVt7HybwHsSDvN3LxjFuOxYYTP9v/XXkHe/5LDW190Rwr38xBby
xpUOoQp5BdapGCX3sg94hRDv4S8NmLeI0n8r3yiiVySTqfB7jOZGnK14mG2gu+guIE+Tll2I3sC2
R8O4h/Ip+nHekKmCfPTmk3DaKQzaSj88nWuai6Vg2cmjt9jS0rLvz+0KPeLMpf3OwogUCb04lBXn
dnqUqwfYrpcxcD6OfvhCwGxTG6aMHhU36GnSdH6Gm8q2ItM62wlctivQJlt/EofPRocNeMDV6/fG
O5XIBEoGJkkIqZ6uF3zmNjlTeFTTPq7Fx7O2MciYvvE86q44puO/Lc66DqVvGfWSLddF7Z5Q4bZl
N3T6GZBwqJVWJCRXd5V6m5c7wrjwR7As7qGhBFcPoX4blUUaGzC7jEJ7ZKHSk0Wi5I706ihPYO8h
VIJeToDZS2FOQ1It1Ip/OKnwqyu6rjgU3hvSCXRgBBrH1By0/MkncN6GYFwUsAAGpLmT2c7Y5gzH
p11vFy7ex7JzKfM5kg7ug7jWoSYiHGGE8XBObwXhFDidbMDg8eqonVISC/rEEzhOo+p6hBPtln4S
2wN5Ak5+KFwjTWX381i1OamfwGwy3KT/fithDn+91vkvTEP8vlaBBYNkAyUN7OxSWNwusoWJJVFG
fz+MIhaz6VYCWwltwDHFqEQQ6DUDc6ukbmzmKmoP4PLQvT3XZpuesc7Hhhn2hZu+aM9Btyxeoa9L
Ve2XIur3iwDdyD0mTdPisPJYhcmsZPQ3kOw3ETmyAn1fuhkhnqYvBHgPXR4GQ/oJ60i3JZEG5zDR
qnTkb0ArLYUY8ODPVAYGa4ML4KsCMshgDmDOvEvECytY3xq3s8//yq4ELCdeLBYVv+r4NZY2HL+g
DmHEbeBjuPj5ylfA5CDUAdnso+r5Pozcz5oYxy3/1S2/uS9xSTnOQNboUEh0sGnSlakgdEgE86ra
1iPVuDP/2fkiy1ZZqbI2x1CIsIUFr/zDbBfxRWLqMYATB9JH7LAAHvjicpv3KvKZK+BFkjXWOF44
ADDd8T5nGE7nd8fEjzBbqv0zTW/O/mn6MdnwjwcQGw2TtRehVfbwH/nOaZdW4OQoGbzO06apvzDQ
sqKd1EiYrN0p4ij0bGEXNj2hG4B+hzgSMkrOjW+rFFRJ9XqG5SVbHQ7wGQRpUzcwEdvSlVJxRF2f
4B09eVIAE46SIONnSwL+POxQbjZQ1EW0nvyrA7mcR1UCOv6dGuNnce7Xvck0ENLaUnVzcFpzXl6W
UKI1rz6aVd9l0q7tQCkUPNHBby+BjZOkofNLsAmA8oTnsk0lQIIFY8VjkzcGS/Sgf+l9WWP2AxEG
DsrTPfXxKUEmW79Pv6fLBKW8dL5CZZjPb2GENOeHBmzmq8w3NMW52wJzOqbPXraGrUZ6HbXUkUkJ
tps6mwyS0Kw7HSSdszGi44c2hO6OilitkkpEuvydHVc+WoQlbBLKD4vl5xuWQzD2013jN7DAyuPH
kkUoT/kdjTcIAHO4/T7cxieCFbJU8xQ/JQv/P71/eYRo/bY4yuF9RLQObnxkinb4sbPELkLuEPPD
FZCGbkc1tFaSsAhTht8jINU7Aw/lXa3tq6rGseDdu8ivZyA2R9o7zJdkVO3uXTyr/Q9XqnN3EhDz
KwfWzO5eAsGqYOlJkuM3Q2siDO++SAijOMYAcc2+c5jf0IcjJndxrLgK8XEJxK5RZEWDaYr0F5kC
BNAKuLI/ttwg4tvhOP6l+QyLd0MVY/wT8lcpKro22CpNfuUxHiMSOECpoYmIOFMmFCMKJmQ2kILD
3fakkKAKfRdv4dFj3fiN8fqTP/YOQbEPiskOIBnfPXzRo7CJEh41GLc3IKKNSbjSPTmh4rGEi6n7
CFRIbXWb0woo+G7CUvzZXAyeXBXR8gq4OmLSLQHbTSJhgTxb/HoWrywXbYNeG7wdfuCvuQGokppk
arF87c4WhjZSxPliPsvMnassOg/DS2d7X209DzO0SkHnUKj8UeTYrBjbplQPKBVVT7/M2H9lU+ew
aLXV9Tznx8XTXm3Dc595Lcm5nHrVwJUCoSkrf9xnv49b5VHLM5RfaGPMEX9Wpq4hCEys2iH6+4NR
A+ZeJK15nIslb36jXS/04XziGuj6a9s2cUcBLwGeS8yMjZkJLIMNOgRo6asPnCzvcdt9o+mHU6Je
O+ePm3gzza2yawlrZYTB3/cDDOzaI+jyD5YS+m6pL2+ID58y/qmY2BjWp0GvDakwP1M70xHdDvmn
4zCyCQ8l
`protect end_protected
| apache-2.0 | bbcdb423b5c135d2422667c5b3168fdb | 0.952523 | 1.820497 | false | false | false | false |
mkotormus/G3_OrchestraConductorDemo | src/ov7670_marker_tracker_use/ov7670_marker_tracker_use.srcs/sources_1/ipshared/xilinx.com/axi_intc_v4_1/28e93d3e/hdl/src/vhdl/axi_intc.vhd | 1 | 26,008 | -------------------------------------------------------------------
-- (c) Copyright 1984 - 2013 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
-------------------------------------------------------------------
-- ***************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: axi_intc.vhd
-- Version: v3.1
-- Description: Interrupt controller interfaced to AXI.
--
-- VHDL-Standard: VHDL'93
-------------------------------------------------------------------------------
-- Structure:
-- -- axi_intc.vhd (wrapper for top level)
-- -- axi_lite_ipif.vhd
-- -- intc_core.vhd
--
-------------------------------------------------------------------------------
-- Author: PB
-- History:
-- PB 07/29/09
-- ^^^^^^^
-- - Initial release of v1.00.a
-- ~~~~~~
-- PB 03/26/10
--
-- - updated based on the xps_intc_v2_01_a
-- PB 09/21/10
--
-- - updated the axi_lite_ipif from v1.00.a to v1.01.a
-- ~~~~~~
-- ^^^^^^^
-- SK 10/10/12
--
-- 1. Added cascade mode support
-- 2. Updated major version of the core
-- ~~~~~~
-- ~~~~~~
-- SK 12/16/12 -- v3.0
-- 1. up reved to major version for 2013.1 Vivado release. No logic updates.
-- 2. Updated the version of AXI LITE IPIF to v2.0 in X.Y format
-- 3. updated the proc common version to proc_common_v4_0
-- 4. No Logic Updates
-- ^^^^^^
-- ^^^^^^^
-- SA 03/25/13
--
-- 1. Added software interrupt support
-- ~~~~~~
-- SA 09/05/13
--
-- 1. Added support for nested interrupts using ILR register in v4.1
-- ~~~~~~
--
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_cmb"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
--
library ieee;
use ieee.std_logic_1164.all;
library proc_common_v4_0;
-------------------------------------------------------------------------
-- Package proc_common_pkg is used because it contains the RESET_ACTIVE
-- constant used to assign reset as active high status.
-------------------------------------------------------------------------
--use proc_common_v4_0.proc_common_pkg.RESET_ACTIVE;
-------------------------------------------------------------------------
-- Package ipif_pkg is used because it contains the calc_num_ce,
-- INTEGER_ARRAY_TYPE & SLV64_ARRAY_TYPE.
-- 1. calc_num_ce is used to get the number of chip selects.
-- INTEGER_ARRAY_TYPE is used for type declaration on constants
-- 2. ARD_ID_ARRAY & ARD_NUM_CE_ARRAY.
-- type declaration on constants ARD_ID_ARRAY & ARD_NUM_CE_ARRAY.
-- 3. SLV64_ARRAY_TYPE is used for type declaration on constants
-- on constants ARD_ADDR_RANGE_ARRAY.
-------------------------------------------------------------------------
use proc_common_v4_0.ipif_pkg.calc_num_ce;
use proc_common_v4_0.ipif_pkg.INTEGER_ARRAY_TYPE;
use proc_common_v4_0.ipif_pkg.SLV64_ARRAY_TYPE;
-------------------------------------------------------------------------
-- Library axi_lite_ipif_v2_0 is used because it contains the
-- axi_lite_ipif which interraces intc_core to AXI.
-------------------------------------------------------------------------
library axi_lite_ipif_v2_0;
use axi_lite_ipif_v2_0.axi_lite_ipif;
-------------------------------------------------------------------------
-- Library axi_intc_v4_1 is used because it contains the intc_core.
-- The complete interrupt controller logic is designed in intc_core.
-------------------------------------------------------------------------
library axi_intc_v4_1;
use axi_intc_v4_1.intc_core;
-------------------------------------------------------------------------------
-- Definition of Generics:
-- System Parameter
-- C_FAMILY -- Target FPGA family
-- AXI Parameters
-- C_S_AXI_ADDR_WIDTH -- AXI address bus width
-- C_S_AXI_DATA_WIDTH -- AXI data bus width
-- Intc Parameters
-- C_NUM_INTR_INPUTS -- Number of interrupt inputs
-- C_NUM_SW_INTR -- Number of software interrupts
-- C_KIND_OF_INTR -- Kind of interrupt (0-Level/1-Edge)
-- C_KIND_OF_EDGE -- Kind of edge (0-falling/1-rising)
-- C_KIND_OF_LVL -- Kind of level (0-low/1-high)
-- C_ASYNC_INTR -- Interrupt is asynchronous (0-sync/1-async)
-- C_NUM_SYNC_FF -- Number of synchronization flip-flops for async interrupts
-- C_HAS_IPR -- Set to 1 if has Interrupt Pending Register
-- C_HAS_SIE -- Set to 1 if has Set Interrupt Enable Bits Register
-- C_HAS_CIE -- Set to 1 if has Clear Interrupt Enable Bits Register
-- C_HAS_IVR -- Set to 1 if has Interrupt Vector Register
-- C_HAS_ILR -- Set to 1 if has Interrupt Level Register for nested interupt support
-- C_IRQ_IS_LEVEL -- If set to 0 generates edge interrupt
-- -- If set to 1 generates level interrupt
-- C_IRQ_ACTIVE -- Defines the edge for output interrupt if
-- -- C_IRQ_IS_LEVEL=0 (0-FALLING/1-RISING)
-- -- Defines the level for output interrupt if
-- -- C_IRQ_IS_LEVEL=1 (0-LOW/1-HIGH)
-- C_IVR_RESET_VALUE -- Reset value for the vectroed interrupt registers in RAM
-- C_DISABLE_SYNCHRONIZERS -- If the processor clock and axi clock are of same
-- value then user can decide to disable this
-- C_MB_CLK_NOT_CONNECTED -- If the processor clock is not connected or used in design
-- C_HAS_FAST -- If user wants to choose the fast interrupt mode of the core
-- -- then it is needed to have this paraemter set. Default is Standard Mode interrupt
-- C_ENABLE_ASYNC -- This parameter is used only for Vivado standalone mode of the core, not used in RTL
-- C_EN_CASCADE_MODE -- If no. of interrupts goes beyond 32, then this parameter need to set
-- C_CASCADE_MASTER -- If cascade mode is set, then this parameter should be set to the first instance
-- -- of the core which is connected to the processor
-------------------------------------------------------------------------------
-- Definition of Ports:
-- Clocks and reset
-- s_axi_aclk -- AXI Clock
-- s_axi_aresetn -- AXI Reset - Active Low Reset
-- Axi interface signals
-- s_axi_awaddr -- AXI Write address
-- s_axi_awvalid -- Write address valid
-- s_axi_awready -- Write address ready
-- s_axi_wdata -- Write data
-- s_axi_wstrb -- Write strobes
-- s_axi_wvalid -- Write valid
-- s_axi_wready -- Write ready
-- s_axi_bresp -- Write response
-- s_axi_bvalid -- Write response valid
-- s_axi_bready -- Response ready
-- s_axi_araddr -- Read address
-- s_axi_arvalid -- Read address valid
-- s_axi_arready -- Read address ready
-- s_axi_rdata -- Read data
-- s_axi_rresp -- Read response
-- s_axi_rvalid -- Read valid
-- s_axi_rready -- Read ready
-- Intc Interface Signals
-- intr -- Input Interruput request
-- irq -- Output Interruput request
-- processor_clk -- in put same as processor clock
-- processor_rst -- in put same as processor reset
-- processor_ack -- input Connected to processor ACK
-- interrupt_address -- output Connected to processor interrupt address pins
-- interrupt_address_in-- Input this is coming from lower level module in case
-- -- the cascade mode is set and all AXI INTC instances are marked
-- -- as C_HAS_FAST = 1
-- processor_ack_out -- Output this is going to lower level module in case
-- -- the cascade mode is set and all AXI INTC instances are marked
-- -- as C_HAS_FAST = 1
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Entity
-------------------------------------------------------------------------------
entity axi_intc is
generic
(
-- System Parameter
C_FAMILY : string := "virtex6";
C_INSTANCE : string := "axi_intc_inst";
-- AXI Parameters
C_S_AXI_ADDR_WIDTH : integer := 9; -- 9
C_S_AXI_DATA_WIDTH : integer := 32;
-- Intc Parameters
C_NUM_INTR_INPUTS : integer range 1 to 32 := 2;
C_NUM_SW_INTR : integer range 0 to 31 := 0;
C_KIND_OF_INTR : std_logic_vector(31 downto 0) :=
"11111111111111111111111111111111";
C_KIND_OF_EDGE : std_logic_vector(31 downto 0) :=
"11111111111111111111111111111111";
C_KIND_OF_LVL : std_logic_vector(31 downto 0) :=
"11111111111111111111111111111111";
C_ASYNC_INTR : std_logic_vector(31 downto 0) :=
"11111111111111111111111111111111";
C_NUM_SYNC_FF : integer range 0 to 7 := 2;
-- IVR Reset value parameter
C_IVAR_RESET_VALUE : std_logic_vector(31 downto 0) :=
"00000000000000000000000000010000";
C_HAS_IPR : integer range 0 to 1 := 1;
C_HAS_SIE : integer range 0 to 1 := 1;
C_HAS_CIE : integer range 0 to 1 := 1;
C_HAS_IVR : integer range 0 to 1 := 1;
C_HAS_ILR : integer range 0 to 1 := 0;
C_IRQ_IS_LEVEL : integer range 0 to 1 := 1;
C_IRQ_ACTIVE : std_logic := '1';
C_DISABLE_SYNCHRONIZERS : integer range 0 to 1 := 0;
C_MB_CLK_NOT_CONNECTED : integer range 0 to 1 := 1;
C_HAS_FAST : integer range 0 to 1 := 0;
-- The below parameter is unused in RTL but required in Vivado Native
C_ENABLE_ASYNC : integer range 0 to 1 := 0; --not used for EDK, used only for Vivado
--
C_EN_CASCADE_MODE : integer range 0 to 1 := 0; -- default no cascade mode, if set enable cascade mode
C_CASCADE_MASTER : integer range 0 to 1 := 0 -- default slave, if set become cascade master and connects ports to Processor
--
);
port
(
-- system signals
s_axi_aclk : in std_logic;
s_axi_aresetn : in std_logic;
-- axi interface signals
s_axi_awaddr : in std_logic_vector (8 downto 0);
s_axi_awvalid : in std_logic;
s_axi_awready : out std_logic;
s_axi_wdata : in std_logic_vector (31 downto 0);
s_axi_wstrb : in std_logic_vector (3 downto 0);
s_axi_wvalid : in std_logic;
s_axi_wready : out std_logic;
s_axi_bresp : out std_logic_vector(1 downto 0);
s_axi_bvalid : out std_logic;
s_axi_bready : in std_logic;
s_axi_araddr : in std_logic_vector (8 downto 0);
s_axi_arvalid : in std_logic;
s_axi_arready : out std_logic;
s_axi_rdata : out std_logic_vector (31 downto 0);
s_axi_rresp : out std_logic_vector(1 downto 0);
s_axi_rvalid : out std_logic;
s_axi_rready : in std_logic;
-- Intc iInterface signals
intr : in std_logic_vector(C_NUM_INTR_INPUTS-1 downto 0);
processor_clk : in std_logic; --- MB Clk, clock from MicroBlaze
processor_rst : in std_logic; --- MB rst, reset from MicroBlaze
irq : out std_logic;
processor_ack : in std_logic_vector(1 downto 0); --- newly added port
interrupt_address : out std_logic_vector(31 downto 0); --- newly added port
--
interrupt_address_in : in std_logic_vector(31 downto 0);
processor_ack_out : out std_logic_vector(1 downto 0)
--
);
-------------------------------------------------------------------------------
-- Attributes
-------------------------------------------------------------------------------
-- Fan-Out attributes for XST
ATTRIBUTE MAX_FANOUT : string;
ATTRIBUTE MAX_FANOUT of S_AXI_ACLK : signal is "10000";
ATTRIBUTE MAX_FANOUT of S_AXI_ARESETN : signal is "10000";
-----------------------------------------------------------------
-- Start of PSFUtil MPD attributes
-----------------------------------------------------------------
-- SIGIS attribute for specifying clocks,interrupts,resets for EDK
ATTRIBUTE IP_GROUP : string;
ATTRIBUTE IP_GROUP of axi_intc : entity is "LOGICORE";
ATTRIBUTE IPTYPE : string;
ATTRIBUTE IPTYPE of axi_intc : entity is "PERIPHERAL";
ATTRIBUTE HDL : string;
ATTRIBUTE HDL of axi_intc : entity is "VHDL";
ATTRIBUTE STYLE : string;
ATTRIBUTE STYLE of axi_intc : entity is "HDL";
ATTRIBUTE IMP_NETLIST : string;
ATTRIBUTE IMP_NETLIST of axi_intc : entity is "TRUE";
ATTRIBUTE RUN_NGCBUILD : string;
ATTRIBUTE RUN_NGCBUILD of axi_intc : entity is "TRUE";
ATTRIBUTE SIGIS : string;
ATTRIBUTE SIGIS of S_AXI_ACLK : signal is "Clk";
ATTRIBUTE SIGIS of S_AXI_ARESETN : signal is "Rstn";
end axi_intc;
-------------------------------------------------------------------------------
-- Architecture
-------------------------------------------------------------------------------
architecture imp of axi_intc is
---------------------------------------------------------------------------
-- Component Declarations
---------------------------------------------------------------------------
constant ZERO_ADDR_PAD : std_logic_vector(31 downto 0)
:= (others => '0');
constant ARD_ID_ARRAY : INTEGER_ARRAY_TYPE := (0 => 1);
constant ARD_ADDR_RANGE_ARRAY : SLV64_ARRAY_TYPE
:= (
ZERO_ADDR_PAD & X"00000000",
ZERO_ADDR_PAD & (X"00000000" or X"0000003F"), --- changed the high address
ZERO_ADDR_PAD & (X"00000000" or X"00000100"), --- changed the high address
ZERO_ADDR_PAD & (X"00000000" or X"0000017F") --- changed the high address
);
constant ARD_NUM_CE_ARRAY : INTEGER_ARRAY_TYPE := (16, 1); --- changed no. of chip enables
constant C_S_AXI_MIN_SIZE : std_logic_vector(31 downto 0):= X"0000017F"; --- changed min memory size required
constant C_USE_WSTRB : integer := 1;
constant C_DPHASE_TIMEOUT : integer := 8;
constant RESET_ACTIVE : std_logic := '0';
---------------------------------------------------------------------------
-- Signal Declarations
---------------------------------------------------------------------------
signal register_addr : std_logic_vector(6 downto 0); -- changed
signal read_data : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);
signal write_data : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);
signal bus2ip_clk : std_logic;
signal bus2ip_resetn : std_logic;
signal bus2ip_addr : std_logic_vector(C_S_AXI_ADDR_WIDTH-1 downto 0);
signal bus2ip_rnw : std_logic;
signal bus2ip_cs : std_logic_vector((
(ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1 downto 0);
signal bus2ip_rdce : std_logic_vector(
calc_num_ce(ARD_NUM_CE_ARRAY)-1 downto 0);
signal bus2ip_wrce : std_logic_vector(
calc_num_ce(ARD_NUM_CE_ARRAY)-1 downto 0);
signal bus2ip_be : std_logic_vector((C_S_AXI_DATA_WIDTH/8)-1 downto 0);
signal ip2bus_wrack : std_logic;
signal ip2bus_rdack : std_logic;
signal ip2bus_error : std_logic;
signal word_access : std_logic;
signal ip2bus_rdack_int : std_logic;
signal ip2bus_wrack_int : std_logic;
signal ip2bus_rdack_int_d1 : std_logic;
signal ip2bus_wrack_int_d1 : std_logic;
signal ip2bus_rdack_prev2 : std_logic;
signal ip2bus_wrack_prev2 : std_logic;
function Or128_vec2stdlogic (vec_in : std_logic_vector) return std_logic is
variable or_out : std_logic := '0';
begin
for i in 0 to 16 loop
or_out := vec_in(i) or or_out;
end loop;
return or_out;
end function Or128_vec2stdlogic;
------------------------------------------------------------------------------
-----
begin
-----
assert C_NUM_SW_INTR + C_NUM_INTR_INPUTS <= 32
report "C_NUM_SW_INTR + C_NUM_INTR_INPUTS must be less than or equal to 32"
severity error;
register_addr <= bus2ip_addr(8 downto 2); -- changed the range as no. of register increased
--- Internal ack signals
ip2bus_rdack_int <= Or128_vec2stdlogic(bus2ip_rdce); -- changed, utilized function as no. chip enables increased
ip2bus_wrack_int <= Or128_vec2stdlogic(bus2ip_wrce); -- changed, utilized function as no. chip enables increased
-- Error signal generation
word_access <= bus2ip_be(0) and
bus2ip_be(1) and
bus2ip_be(2) and
bus2ip_be(3);
ip2bus_error <= not word_access;
--------------------------------------------------------------------------
-- Process DACK_DELAY_P for generating write and read data acknowledge
-- signals.
--------------------------------------------------------------------------
DACK_DELAY_P: process (bus2ip_clk) is
begin
if bus2ip_clk'event and bus2ip_clk='1' then
if bus2ip_resetn = RESET_ACTIVE then
ip2bus_rdack_int_d1 <= '0';
ip2bus_wrack_int_d1 <= '0';
ip2bus_rdack <= '0';
ip2bus_wrack <= '0';
else
ip2bus_rdack_int_d1 <= ip2bus_rdack_int;
ip2bus_wrack_int_d1 <= ip2bus_wrack_int;
ip2bus_rdack <= ip2bus_rdack_prev2;
ip2bus_wrack <= ip2bus_wrack_prev2;
end if;
end if;
end process DACK_DELAY_P;
-- Detecting rising edge by creating one shot
ip2bus_rdack_prev2 <= ip2bus_rdack_int and (not ip2bus_rdack_int_d1);
ip2bus_wrack_prev2 <= ip2bus_wrack_int and (not ip2bus_wrack_int_d1);
---------------------------------------------------------------------------
-- Component Instantiations
---------------------------------------------------------------------------
-----------------------------------------------------------------
-- Instantiating intc_core from axi_intc_v4_1
-----------------------------------------------------------------
INTC_CORE_I : entity axi_intc_v4_1.intc_core
generic map
(
C_FAMILY => C_FAMILY,
C_DWIDTH => C_S_AXI_DATA_WIDTH,
C_NUM_INTR_INPUTS => C_NUM_INTR_INPUTS,
C_NUM_SW_INTR => C_NUM_SW_INTR,
C_KIND_OF_INTR => C_KIND_OF_INTR,
C_KIND_OF_EDGE => C_KIND_OF_EDGE,
C_KIND_OF_LVL => C_KIND_OF_LVL,
C_ASYNC_INTR => C_ASYNC_INTR,
C_NUM_SYNC_FF => C_NUM_SYNC_FF,
C_HAS_IPR => C_HAS_IPR,
C_HAS_SIE => C_HAS_SIE,
C_HAS_CIE => C_HAS_CIE,
C_HAS_IVR => C_HAS_IVR,
C_HAS_ILR => C_HAS_ILR,
C_IRQ_IS_LEVEL => C_IRQ_IS_LEVEL,
C_IRQ_ACTIVE => C_IRQ_ACTIVE,
C_DISABLE_SYNCHRONIZERS => C_DISABLE_SYNCHRONIZERS,
C_MB_CLK_NOT_CONNECTED => C_MB_CLK_NOT_CONNECTED,
C_HAS_FAST => C_HAS_FAST,
C_IVAR_RESET_VALUE => C_IVAR_RESET_VALUE,
--
C_EN_CASCADE_MODE => C_EN_CASCADE_MODE,
C_CASCADE_MASTER => C_CASCADE_MASTER
--
)
port map
(
-- Intc Interface Signals
Clk => bus2ip_clk,
Rst_n => bus2ip_resetn,
Intr => intr,
Reg_addr => register_addr,
Bus2ip_rdce => bus2ip_rdce,
Bus2ip_wrce => bus2ip_wrce,
Wr_data => write_data,
Rd_data => read_data,
Processor_clk => processor_clk,
Processor_rst => processor_rst,
Irq => Irq,
Processor_ack => processor_ack,
Interrupt_address => interrupt_address,
Interrupt_address_in => interrupt_address_in,
Processor_ack_out => processor_ack_out
);
-----------------------------------------------------------------
--Instantiating axi_lite_ipif from axi_lite_ipif_v2_0
-----------------------------------------------------------------
AXI_LITE_IPIF_I : entity axi_lite_ipif_v2_0.axi_lite_ipif
generic map
(
C_S_AXI_DATA_WIDTH => C_S_AXI_DATA_WIDTH,
C_S_AXI_ADDR_WIDTH => C_S_AXI_ADDR_WIDTH,
C_S_AXI_MIN_SIZE => C_S_AXI_MIN_SIZE,
C_USE_WSTRB => C_USE_WSTRB,
C_DPHASE_TIMEOUT => C_DPHASE_TIMEOUT,
C_ARD_ADDR_RANGE_ARRAY=> ARD_ADDR_RANGE_ARRAY,
C_ARD_NUM_CE_ARRAY => ARD_NUM_CE_ARRAY,
C_FAMILY => C_FAMILY
)
port map
(
--System signals
S_AXI_ACLK => s_axi_aclk,
S_AXI_ARESETN => s_axi_aresetn,
-- AXI interface signals
S_AXI_AWADDR => s_axi_awaddr,
S_AXI_AWVALID => s_axi_awvalid,
S_AXI_AWREADY => s_axi_awready,
S_AXI_WDATA => s_axi_wdata,
S_AXI_WSTRB => s_axi_wstrb,
S_AXI_WVALID => s_axi_wvalid,
S_AXI_WREADY => s_axi_wready,
S_AXI_BRESP => s_axi_bresp,
S_AXI_BVALID => s_axi_bvalid,
S_AXI_BREADY => s_axi_bready,
S_AXI_ARADDR => s_axi_araddr,
S_AXI_ARVALID => s_axi_arvalid,
S_AXI_ARREADY => s_axi_arready,
S_AXI_RDATA => s_axi_rdata,
S_AXI_RRESP => s_axi_rresp,
S_AXI_RVALID => s_axi_rvalid,
S_AXI_RREADY => s_axi_rready,
-- Controls to the IP/IPIF modules
Bus2IP_Clk => bus2ip_clk,
Bus2IP_Resetn => bus2ip_resetn,
Bus2IP_Addr => bus2ip_addr,
Bus2IP_RNW => bus2ip_rnw,
Bus2IP_BE => bus2ip_be,
Bus2IP_CS => bus2ip_cs,
Bus2IP_RdCE => bus2ip_rdce,
Bus2IP_WrCE => bus2ip_wrce,
Bus2IP_Data => write_data,
IP2Bus_Data => read_data,
IP2Bus_WrAck => ip2bus_wrack,
IP2Bus_RdAck => ip2bus_rdack,
IP2Bus_Error => ip2bus_error
);
end imp;
| apache-2.0 | a00fed7086ec14e20aabf2e9c740577a | 0.506152 | 4.056145 | false | false | false | false |
mkotormus/G3_OrchestraConductorDemo | src/ov7670_marker_tracker_use/ov7670_marker_tracker_use.srcs/sources_1/ipshared/xilinx.com/microblaze_v9_3/7b6e2d75/hdl/vhdl/zero_detect.vhd | 1 | 13,395 | `protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2014"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
EUyOSXGLM4aG/Apa3pFTAVmOryMy3pqQDuF5POBNTN2hoaQJpxICx3xD5IzkBUUayHj8fGb+B67x
bj+dYQH5jw==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
aXk2xr6QrfdSaa2rUHBpNpo6Y+KvSwhBQlMVnOg8+kXLvALiFwc9+dAelHmmna4j/MQDs91WRsKT
PSDCuyR/iTrc+OYBfsHNPUamyx/51zUNfMEHEDyWYRWM025xu5l02YD3FHKEhNChOYhl5zECy7V/
0ZlrlWFvkC4FsCcxBfA=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2014_03", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
dv67HHpByRu4ZDlkw+LnVJxfkCAzPS9/0vYkqfDNd1nOmGh1L4BLGyPqCtjzgH+t9lZftYnPDZpO
pQJUh19tYeDPwUsFtgBmzOhYYODbQBZFr1P68cL2MuDbgUmcOuXiMgJvWhMu+swC6KaMfMV214ss
StrdrgmjjsuPmVoKPylyBeqaH6grumLXGohXs++fiYTD++SEvaLOPpjkw0OR21ZOT5wN0AQFlvL/
y+y8ZVtfoeTHS+7cEZYvlaP/5qInvu2f1//lwKj1Sy4Hm76VbjLh6tcSAFD6tYIzpLh6rbRwp6Q9
cGXPM3qgTuWlt9JsjkhaoMgBUc3cruKHDGnGHw==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
EsTp3f6fOKQbVmg5LWb4PlDdy7edlaLOs9zNfvkf2m6UEr+wZnKIMZynecbzYg8HQ5dfalzxVSX4
I3ntb9wdDMH1VXB23hc1WryBZYfnEONicVSuhnXWcTu66ao79RJtCqJlJzlYZkkL/VYvnBv2LGjN
CoZ4v86pTPk9jHDJGDs=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
PFXny+AZmsizSeERSPS1jLxeVd5Of7nQbHkfaiE5hVb1kyEbaZwqBDZSrwHYBRIWeqtNjDejof2u
3jOgVxf5yjJMoLl/1KVeePMdIIRePKiHB/kcNtjHvPVvm1F2/Mv0HE6fF9Y5LKBY6pIaaV/QWBMR
6xq3zraSZIPeG9uwWZCmh2B9PbPbwrNMkX9wQ41sn0Yhi9TwSL2+zRm0MVeCy+LypY7zzppvtiaL
pBLyNuFyGhz7gmyK5ACh+wRH5tah40BVGoqY0WYsYfCtUYi5CjfSdib+HRqxpEKaZI5duNzPqinA
bSdw+IeIxWQFw5WE/4z5+MHPDPYfcBzUCSb+1Q==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 8176)
`protect data_block
pU8QP9hYTxworzfdi9iPHUN7poB3qDajiTGjugd7kBWVB9BQKb2RGaN82iiEza+Jcsi9EmPE+UUy
t/nGNYvN9kSTz4tPew8Fb1+ISvHHePT+lsLjrokHy25go56/TM2ABItySGJ40eQIAJciHvXcgYLi
XT08vde2Tv1FIOjn2B2+mDgWQsbTMtd+1zuSO7oVsvUxivIfcN1wYPph/rB5kc5QF0vZuO5+zTQh
8BAZmOWBJC+6E63HyJsoyb7jpkYCRFgmgivnpTcm18U6fya1l9fPBQH3ac2BHK9N+HRg/UkjtGmM
nmys1cZMms55AwqprP4SjRLHwd4h6l8CJOEZAu+ogtOC40YMsI3dRzsDld+DpSp1NI9iHL46b+/t
CGE5XqD48k1wywEyUFePunw+Ni4eTCB8ZOzJsbmv5rjSPogN8Ex4PY5LCkaqNHkdUtYqH6cFFrwe
6YO8qI2/JPrUPDV3G+ExIOS+tm9CKqGHBMcguCdy9U/8OsSP80gTTETxBuuey2x4c2+8WnXH6yxO
3MuC3/9yatgrqs2LHp/shaDFw393N3yAaz3EHblMrdQHToUo5ILuL5KkvagYgHnFLWE6V8W2cdH2
934CqqshWOs9JkGZG2K9pYHkM3KYxrOZMvUegqGS3vgl6MhFtwlQsQnfuOz+OUTtMYDhjwWLdvmO
2/wiJoILC5czk2WzwHpD8KSuDKHf/2SFF2YDXwnRH6ElP/ufcQl45J+vSrNcnRCIz0dAAqzK7vCb
0pNrO5Cn1kSgWTuySsLV5p7z0htS09eWuvoHZj3TEw+p+fBMaQ0fNSDyXcaoO0F3q1qAFDv/XzfN
nNdCEu2w0CVKJKVvUTjDhX8XToWNBD+g8Fw9Kf89970loImepYBTpc0h3NuQeTCncXcCy4eO4l7F
zpj/BEGnXISDajml4cs73QY8sGfldyIC9JlJduJzBU+uCqPJRmDDohTNqJww/w2kqVuIQsDArX6s
LjB/ZsMY8Nz81TVUlt6XlTQhMq9cbZJR8RoKb3/fP55KScWAGEJCa7RAsI+uXZc+2ff89deV7mc6
GDGRIj3S0kjZ7o9gpyFn0+1ef+FT2ZRGiQW+n24IqqhRYqZDLnFrOqvUqaq3+iks4Lj3G7IsVIqT
PE68bFH50Jc0m3sbq2uD827SLrgP4Vx54/9lUXEpQw1nywymXFZVPCYOlqPV+OY9cOI6Agg3Qh1A
ZcZhfK9sY/3ptduqGR5EWANJWXaXgvNb/++Fjm596OvF7j2DNwVjAq3EdXmDWDPWohRUuDYwU1o8
105BE66edI5TiwWKauheNIQWtTlHuLN9VuZE4pyzWHZrE5Gwu35TNF30etD9NoH9EMJ+fnJVdG31
l2dBRSRhNbetip6crqc0+qQI3GDav0+cyseJBDnSu1cqAVKrHKBlW3hW1k4TCMm0UEO8BICmU2j/
UrQK3RzuQw5jMSfGk5dTXNBCYxLqhB0vy5zu4RfyaKih9mIEcaWbIMKf+bs6I+g5IYvkcKLGpRum
1ELGhBwLnJ1idbGp5zCErUkzCccRhuLoYruTDNrd25xlKPx3lEbcYNq+D2EHSZsolu48XJ7sE2bp
nuzVyfd+xRoec1wJk7eCDVE17vRpYIsT4Twmj/C2+cuyp8qBY0OoBRbUvsHJLH3FIqgvKgTLawu5
1XaXLGZclO/4pOO+L3+KojMDsTk4q7jffMHA+TG7++5+QQMJvNc0M2m1f38ECeGcWcNEnZzwv4sS
TH+xKg6s9zlCyr0ffRmAynDA0Kvr/EmFrpJBJ12Zs8yGBkQ9CudPZg9iTfJt1RMlrLLnNoI8/M8I
jXla0E/fw1nAXT1e9R6yhSpOGEJH2QOGKONlcwW783tvSQPbf7duYIeaHruzpshpW0CLtdc2k+x/
96rbVJphj6ZufZ80vQAhNZTFrZwBhs9na065MIrtxcxjgb5TZ5r7Z3lkqQ33Nm8QuuWzcvWJ1zrA
rN/ZfHChz3itFa+QqtB7Pizho+TqY2bTXuPzESxYkDr14w4taL4p+EbIFtYR413xADgPf/IbnROM
9oGzrTVf+jam3+u32Zj5+CP+AOLJV/bETyTkDwV675hm+eOvmo00nrnY4HghyWt1Iac8Iw2j+Ew+
fgisgqUSt9P7mrgKDoGwGqvQOWj6LOtWYZfQyKU42s+TiBdGcyqf6fNTtJV0aHXZYuFJbOQ9EpJb
iFWjpCU/YOcXGpNwt7VzeylfQcfa+wvS/fPHjcqLFEfE2UYT2+N06HJwatE0kjUgdsUGa1fJdSBH
sb3QVYdtW8D4rLLKagKJwiTx0HMQ0dgEFjKmtsFvnEWHnh7NA42CeItTxh4b0vl6usHEzlUU4V31
UJcM4FVpzsG4M8une4kM8eN4MV0x7uwB7Q+vNH5+og3/2hdApyblUp69N7nd/ATDxc5MaRC/Da9R
NMGCs4oEgA7AKKNvwpbaQx+F7CocPw4Y00vOeGNJtBfbTMCRjNWUVD9vKQBXSTvaxYwJvquZ0kFc
ACpdYFrVTXpS4HFFmbhlP+B2u7DbYvLncqU3i0B6CFsYfVBvq16s8rRVzZ8e85jLru2EV3iPET44
3zAuo09AYThLxmMSZUUfFowl70AIrXOuwNi/A9oxF9XAq9BrGXR/zpUuvonkZMQ3Z0U4pD9UH9f8
CKrY5zY7Py3rtqyqc/TeNsT2odEkaEOcuYKT718uS4LFgVo41tbHei0pmZksRv8BxE1xLIAfKm3b
5N+OZbJadNvWrkEmKKsSTXpYs+AsH+g83445N3QSOHc9BVtBbgCs5k6LASJ8HSo5d2KQlrHV2ecL
K/S9w9aE50kFRmo2fW3ADnLmWOtGi8KiweL/wf3/WVsia6pvMLZW3G90190dnY2bGLo+CcUK4vnq
Y35itGi2kZPyYqGCwIotwvR1xmG5CJKOdhP+60ZmajZl2gGSJJapQEBfpiwdzw4l1TQSENdP642l
yT2w1B/ngqYuKx0dQ1sYvghGOq6A2IBdfIae+gbEKkmNaLo0UKcPcIzu48ZWRSstzDjowXZvCsA2
Xwt5a1VAi6BcGgo4VYm3u+/XujIqugtBiKKzlFHSILKctHFw/hcEhZGB00BtNFj1z2kUA6hW+hFJ
eIvu06x8KXqJ7HiUxBVRWacuh4MIUY9drDrpFQFHya+NoVYW+8qRmShb3j0jl+/iSewbwS13yy+o
dWm5sdV3Rc6ALWkcd99g9gTjlHSGIDNDw5gxaDXZG9+fz7CdTayLbe1aKCWZr8PTS3t8rWq6JeXj
4xJAYaThYP6X9/yqWVDs5MBBFMksC/s6xlqYkfnx6qc5wNzCYaU7uQeKdjltyE6pJnwK9ErQnf4u
ACypC44hrpc+g/ZiIL41w/M6FS/qT006mSffmQacK5o1KZZF5TB0FWyLdy8QuWKUSZFHcawx4Ywj
4WDrfTZCG4ZkGXYqo9W2nf5SJv2qSQHXItk41I1arh49AVfyJz1u9uuvjDvx6YoXt7YlLHDGuoAG
FxTsZ4y5JcUpQxYKP9lja/IaxN4ZKaAqR/75ayQSJ6ggTz9AtLGWj1qKXlA4RaTcn685IXgUv00v
TWaADg47IahseMQ7f8MTULPeDJZc90Ho9Tg5x2y+RmtouOxComMMKK2DnIrN7Ef9JmIPYXBnpccY
o2a+B1KNTomI0bK23UY2nfemWGlEHtFSDX8gJPp8Qii1oOhBijNi2wXyvu7Jj2yAdzAevj3nRD9b
iPKMLJvMbxNxTLXJ1NMSzjPjs/wyk39SNXUbY536KLLVfnt/asw6rbaU8hnDM2gk8Vv/FdmXVeGh
3F6rE49y0fHdGXzDvUKhyIscA1aOXDiMZPmEPnbU9cCj+RopbusJ0kcLvnHUWkY65eIOuo0LVNyi
ZL6EWGvefw4LSXWHjVRI8yBi37DsM8Y9Ll16hMFmVTKdXHBZ1hnIoXfOjYmcLJ3o4yr7xWUrXNJS
oZLT2flr08qLcw+xjVQyJsvAyI4zSRXh1VeXZ2ntaIGrQG1ApCGHZlV6GQLjnuulFt2rGdjNztyN
sgV3/LjZDAfUtk5mLJfMHwDhkYH3g4qDdP9hfQbK9QBIazml23Q/wM2NNw6bxrccq6nH6ezMa/uq
Iq1zqqkwn5JJNYqBsgzWT0xcicBl9YbOlgajyL37v9CUfaTE1KcCvkTmVjFLabLWkHS6pte4gnG9
2STzMaGhCzv0NRJKYJSNUbmN7ZQd+PDyGlInzq/+Vk/mnL6A+A/kGRW4mErkvifE8iX7OfYj0OW9
eHYDSqPggEk/cyuICbBhh03dPWFQk6sb8ZxTVgnmrHDRWWB24vcNqzGAjwLnE95JtIYAhAqyuWcA
+IdqnSVp3ZstVWW8V21ngn/J6rGqr3h9PqpGADo95YvQyHmnQ3jm405arg5dL1tyxNlOpL+Tf/at
bx8Y8jP+DMMVPTaTgEPqs4FKrZd2fxZWZ0LzigSwQxEXaGZBPFi5mS1rRWujhnjVK88nT+mmwwE4
Km1hnLhMNFqNONIOPcYOj0TuKoGFsQMaLxbYOOtByykYLcBMpWrQ6WaYTO8ipA0xRiKTAFu1WlUb
VTZ5tBDlUpX7kP/S4WUUN3fbb6QB6pKjxMags8cahUFeJ20ZnujonhzxxDV84L2g5dTkeD6LDxau
I8yJNCxQxjNlXofUcYUPTQuhlV/x0FeAhD+UVt7IpX9iJjgrHHT6iD2QZghsUiEejLkBPIjlEecS
ToDDwr+A5SW7wdtALqpMADWUh8i3zK2qo8uh0gq3j74I2ZEv5gzFMn3i7ePof1yt+/rdXLMxNUP7
YZQxsq/ctWLc4Um1thD6seTQM0iRwNtKttgLWxSb34zDl99aqMulSv3KjaxR4zBKyJ53+4FktW8K
tIbEhwTQL3K7IUIrYt8tDRv7pDnoLu4kXQj5rhgGBOI/bQcC46j7ot7yTZPmaeR+QgBGzHlhEM2a
0f9VBAKt75DOaN9JlVpLX9viwBo/L21eKb7mwO1kPDLSnUHq3eZQdf9wRLq1Z3Bwwh8a13xQXS+g
fNURt2OFhj2eDlOFivKDqgOLZoNfCtmo2pxmDSbbWHDrhgmf8IXcpZoQ0urvX/hnpvkXyWFgLKX+
0iRSR2DpQZsCyKdpU9suLWWt1tXihHXrK35BHTBu1PoAxQeiQQfjgZVK8BTr4Wx7/rLeD2upZYjr
HLbvT7AJetUKcTtlZSoVWltHlF9ZZoveeg69KEINzugElD85cEiSN58kT8lsPZuPC7NMBtZ1+Zrz
ZzeB8wioaIaWmibcEnICdvL++BDBMyDEd7tNz0hB4P9sMS+bvxZkSaU8Q+6OGhVNMzYmlKzDJmJZ
01Apz+mjSiTi2q/hu9Nk7S6B41Hd2Ie5OVu3xpb69Qp1dSN4Ax4sdjWbpzseWZTBblum0/fE7BGA
XWOa6fyfrH4ttgarh6WWxuXSz9PGcZ7x6tjee0id369L5w9j7ykFHArkKjStcaaw2M3aMTRtpRKr
QOXaK87KnvaRlWaqlU4BFNjuLEdL7qr39HJxm0GbUNshW57LJTsiO2lshGKK4bqyPoON1Qb8Py7C
FRJnhyKu1H1PO3gqpGb2PRogPbrKcY4Qkd4aVQxsWt1XvAnH8GppH7fYm40x7ZVQCBIi8Iauq7uA
09qEZ/RPtfQUN5Ip609RAWzR0/ZDCbZgYXcDiN41yNFmftk2TMgeFnc8wIZvSJMxDorFIdzhBpRg
mKKU8DXq59ALQY/nwP+uOwEJeNlYiBJIqwN9earYksHRAR2VgwTMZ1p1Bv5F4RvzzfGnrYItWM9y
Z7Kvz1e8m9oSGz7SAGyoUTbsdFui58JaaQFCpuZgydWb9oqvTVLnhI+dZpcX7Yq24gObaYUQ9F48
a+79Ol2IhSoJgEGmhog8r8uZlaN/JH3PNQUwNRGWaVXBhuxbq/AwvU4hVQEB6NbqvWh0GfOZZRvR
v+LuLiSKPloW8Mu50QSJiY/fIdace0cWK+QZi0Ayz3WmK7ZVduwW6HQLr005be90xJqBB4ElbIcE
0UcYGu2ioz3UmeyjJZq/dZk7HCdrkebynpyGLArAYL2ikSOB3Yd8TOmxCNW5Q4KaXBrZwKVnXRBz
GRgfVPt4DSZOXYzR01Hw6itLCUmJEg+DUSE3ZuLM1xgapQB+UA1JsrIsgBv7Pv1SQLLs9mbVc2Sg
PbkNDo+dFNL7/JrZ8ofANOV9GDI9qhq4fsJBDz1rTHxM6NlwqsYcHDZN0jRDgQI2bpuRiCig3Ry/
oFAhos8MpdypxAPe8ezvIuxb4UbzSKhXwZ2sCx6Jw+QIEcQMWonK3fYPhqNdjcHN6k3oDUicbp6D
c1jLDk4XCZZbUYeVkL6IaE9hfh4oaAT09BpamwWMO00ILZL3M36cQw9g3r4Vv0mjGG7QZFz2ltvc
F8gATNjZUewyRLK+BqYFAYRveHW9nIpca48xosZkLNUQTMyyCzMXZMrSqkqvMGil1USLKio33Uzo
p28zLa9TmHKl243pxeTZRA3QXaYxcBalCwIQFc84u6zA327njo/SlWD27JWJJrE0dD4o1WoDmi1t
9W0t7/MhP78O55PQwudu0vYXPPk31iHW0RaeneccpiDWvS2Htt/bv3hl/qDtL12ORDDBqe93krjI
HyLswshxkCIY3/G2eTInOUbhs7k88pYdjHloj0voEB9JXS3BeYjnK6kjwTMe4CTB6M7KWXdvuHj0
nU1nHI0WTR6MghvlgRydCO3WnjSbYEfoLrEFWwAp85kQ/aAgT9HECghXV+I/UzKMRQbKS/V2D5Sz
zTGv2PQdL8Q5UpUBIwEYqHdgEUcT1Uy1yTzpyIFnUoC9tRQzdqHsC21bmHtUIrH13Q/NRHp08bRK
1nb/e6ohzlNl5y2MkrhTtOUr6hlv75wwNapBPxiRTLiaLx3lFj6eSqmqyEFsGg9VgU05O8KEIdTg
blqpcBLpVKB7wIz8EQeh3kOsyvhdNNleuzzenBHtyTNswlqNrwtQzZikKu/qcp3zXxm+tYv7xB9w
2op89vuFLY2h48eXyv0SSvSbImjMBBq2ssylNjAlZ8q+KsrmkwT+5YbncOJRnd6qel5zAAYd1iwk
JS5/b0BVYnhwXZgdlByz49jBuc8TPPKzVrhkdpgcZW4CzcvE9tkJNGs/LfAwLwkJ/PbxWNrqqORd
hyK6m/qYXy2wnQt1N0xOavLt8zXPflK7VLVJdRCroVS7dJTK59uwveMgDN2JSf6sPhMJKfUFIlQo
QjB7eTCVm/nPG3b5h2VyUMVrS0IAMpijcG5mXqpk1lZrZ3/iIJvruNEy7d9s/hXrybuR/X9WYVTM
tS/5t9pxIeJ9Mkrx33QRuvV+5l5YCMSF6vW5fUgdZzi28vZsiVi3FhTED5+WpwSoOLY9Yw29q8I5
6FXzzRWCrEKh0dhAZ6DxHQHnrHi3Ze6OzbaeQCk2IZws802G/Zc3Iaao5gkxtr9OFuEWeSw2ogH/
sM2OxYDlg/HW/GRNHYRzjcChPstNDFxep3+PLIsxGPcLA6ml/6hwc+cPtGmQRHFrxK5lkD+X9Y53
DLaQ5xbdCr/D+UQagakNARtwaPspOX8BRJngtJAKOgLY3q/xoZ2GtY3FTINzDYMNPrQkCsKYuLXg
moV6nHgC+WHp7rxdQjRNEfyDUutTFQ8rWfmTl930upKGfX4XLWb+hHbzrOoNYEe7ZCaBG3NBah2a
icTIjYjCLukyT3iFij9hb7o7UGELGgsx/nm03RrssyyZJ1+lk0szphqj3foYcoVC+TqN3ISsHzHl
XspxbCYoiKVXRa+4JrasEeDIErDMCEQ9zdTDXFSYUi2t1ZV8SKmr8iGVaLPxxR4ZMa38U3lTwD3p
j+u/zoOl0EJpd9Jg+Y3jbyn+4S5G6zRut68e9473+Q5p0gm4L6xLi1OP2TUJMEZk35rCOyMMnPyQ
zU285OCE5PjAgxpRk2Q82WuWQmxXJ/87ZOgFGQKL6S2KIT3PvCAiK2nVfEErzbmoY2c3NQUzG0mG
4E1Ytak1u/E8aqVdSPZebuigwAn9Kq/VSHQteLirnUgWAV73VhoPK/cL0McYkuYmcZnS+4/dOwfm
zfUYQ9+R98ohQz/b8PouwQiwFqXZuMI0LH0Ee0cueIFH10RzXxUqFO+F4XViyGKESr4F/lgIi/TV
TzbIb2FqbiOdQkODPag02MnFA8vxEn10xq9sOlf/nIAqFB835Au9RxcC9cu2E4zLklxvtI4FCBCo
9sB5/YzvRL6sPtHYpQU6HTkKXwEf4kcK+iPkWEcIWRWYb7fuY35vTILW2FQy7EVFLMiIldMdzAO1
cha3N+sFnyzN3S6M+FJ+NyZ9X+vFgiTzEZoWL0zbI/We0PUWVFsETHJdYLidUgRNaiH/lKLXKHgn
l8glj/F/kX5/2gPM4J8HtNIudJ67wJKErg2cP0OJcN5z/ErQR7AM/JP2NB64ljKuJ+zKAct1mwq3
jcQ4vR66gwX1G5CHoAlC4Sk34+/Ne51mS4uB5PBAWi1M72JIintSkiLINrpe3I1pd3NesaknywjI
2mXam+AUsi5LMmcx5ZLQ6gEOyjPP2xv9/xLZFe99H+NOQ1XeQax/S7pm8h4QQpcvH/T9I9Z/5nck
BqLw5Z9Mpjf+KBMznAhOSx94N3hQcCEH5I5EPz3ABQXde0t3gqby5kykDDutqCXioIz7QqyhTJC8
l9FqkNwh7mBKG/2zuh4dotioePP51TmjCPA+QtWcunJwTrq1AkxeYbZXSlogCVP+FMWYX4cqIrMf
U96pvUfINiu4mDp1K5wowZI+2u6T0haOuwW3zOxg5onf5Q5qj2to3TlKs9vf/jVkQ1E2QAWd5ygj
uP2vHHlJc8R4rzmp9Ky++2WEm619i5nKtQySfzwJQcGe3POWNfK5ffMuQsSVdtH6rhPyTZkCUAhb
tpXV+9BK2tU+DSBQjCOTfWZ9ZVWWKW44AtJWD4b/JomrI4EoLwMLC3aYLmWH2QxiyfI50MpbAkVA
ocqLbZouuX370WV9GFs2ECp2kJQwojxM5W3iuwbNDmBd16FF5Mkuz9R+bqirYLmRlVaKI7/zNVVq
0uHqujqe+JbenmUycyoLXajcJeqYO6Jc4GkKimBYNMoEWRP/IUv/7h0nkdQ7Avc+GUSY7/Rzgxcd
A4yZXVz/m9W64rIC5jItAvWFKu1ZOJu+WKpyn9yYxqV+84FlhrYRmU8ryzXR+UpV0/x7Qc+d15HD
rEHfbCyDgtTDyfW3bTtFAZmQRT51Zf852XmqL8z1BZ0BIwVusNS1r+tYVNwaVIt4SFk5IBPX/BOv
jfo16jmHtzYm+8SNisXtHfHXAZYxnlq8Wffp61bGPrrndIeHK/RreHW5KbJK4kwkN4pMAjIb36nl
c/BEucCNnPFCA9JMLNa4HpcKl8sWiLSD2fsiOfF+RyBOqmNURGLoq6EF1OA6849DtW5ggV09/70H
akNykZU5XCg+5zLOYTHRmXBMP0IACsoKaCONv6HUtY5De+Br3Dh/F+6Rla1wFmdWN23C2TjbDSrK
cF+RPZdNlMiiDTbUTBcriSP8Y4xbUxJt/Jbmfn7tqp0DYG0UqpAfJsfRyZUvDMTLrONHuni1dYYD
CgswPleONLUTj4TQxLOe4ILP2Fylcuz3du0L6IXS79h2UrSUBdVWCoqgRMvCfzFL74c70sLMg5JR
dD3wDm7fKsrSiF2vajUTb8WQ0QIFMC8S40IW2LNB3z+2g8vqCJPkim2xf+KgbqsHfaT4RrwmttuT
D2I86iZxPhcrH/211lhr3A4tpwwof541dGHXAeSx10Tw5y4rE2iCSPh2M8PBhJM921gPQ361tdGw
guaHkelHmaPtBSNwvmXd0SsXYkirDRZsmdEX4cVAcD6fiWNc9HlsgN8Kkha+PA/TqW1KFVJOVDtE
u/lzcbgd0Juxi/0h2J/k8MvpueTfmaxEN2JzxCAJycPkzYTsrmoJNjK5c8NxVwmde3uOzJkgwX/J
kDVwW7od/nvAiBPiypHDkhDs94WSxC5GtM9zSbkmBO68whoFXJM9bZRYHn1lVL+1kfemH32lQBUT
qwMB5GrEKSqr11xXQVz465WPNHjCkzBadtCCirKSKS0Q6uvNGoRDU25TAHB6FjDKbgzQx0XsY8PP
t2KhOEGQamVd2KpyozKHaOpo1T7Y0OZvynu3QIvMNHIOf9OSfZ/5ae/RTKhol2Q7+30ZQsnHdiqV
gbvB/H7cQEzB9QBnJmNjQ3c+xFlR66WnuHlirD1aFKZUK70jlXh69jeA8j5IPEwRyazsnNc9V1zj
6eCVnx5bqV1OYkSok23P5jKTnHs3efAykUpzNT6Zts8Odtn5oj8sUUh23xaU7LjDjXWHz9IDwIB9
JzOSeMkqIgD1aYEkVlavDbwBSL3l7vcVB7cDcdCoFWISFwOa+0OUrQzYKJ+wYHrmtsi10HtgQoT6
snfyEZzcxcxdlkMe4OKki2I4K+LzSQUAi6zgg6r9aDXHdFzeW/b4PjAk4pbdcHOrURg46eIsMBlF
Sd5jo2xbRkJhHJ97ObZawp1BGZ/JpS9N5VOv+tCvUoDwg25cS0w8FfdZNaJkOIiR1VNwNGWbb8Oo
OUPl/0cf6m+Wkq7u8waoko3PHfDKzmJe4dHrV5nNMxMoAoyxSo3rYgWluqDQxDpBJ9P2j9wnJdLY
0P8/TrFfYaRFLoERgvEmVayQ69xDTHt4L7qqbOlIW9Y+NJxB6DgMz0YGs1BxMq3jfx3Mr+6hqmhc
nQenrz6No7nm7ZaEq/tTDXflL951E/VNihxikS8A5QycMRXf6oPvkXO9oWIkVRX8nNhpEcv/+L3H
iU+P+rms9rL1wue1307q+t7W8LxAQaGwV3RRap+To00a60JaG2oRb5aQR7QQr9zpmun3r8AN/Rd7
2/IbGQ8PWJtRH/yPPK5wdn/ifIUWfqZM/g==
`protect end_protected
| apache-2.0 | 0e38e3f4641df27c52eb995b986d834b | 0.931168 | 1.875262 | false | false | false | false |
mkotormus/G3_OrchestraConductorDemo | src/ov7670_marker_tracker_use/ov7670_marker_tracker_use.srcs/sources_1/ipshared/xilinx.com/fifo_generator_v12_0/924f3d25/hdl/common/rd_pe_as.vhd | 5 | 25,238 | `protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2014"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
SYrTT8vRVlz4UcbcwKgJ/U2zcY0Gw+2M2xSPd1pCai5wVCAHUg1U7EY/KACUq4fVXVxbAR+6kD91
+7bt9SIT/w==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
SrkE43E0DHSeNJItWd7ftK0x9usmjrS5g/8t5TOe5u9NX+OZBrNZKow6mNsFzQJyBhPtb5HpJwCJ
gdALQI4luG7aLmleMTOilyx6bkrkmMvLcQB1pvf/hf/Pb8VJRBoc2sO2Y77lbCDxRHIAci+oou6q
qPNzbkg0P9G4nlYiDV0=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2014_03", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
hVbmY8XUxCZkcX+QFvZWdwniOnOI887VPdjJOihjNGombqL4NOu2IQDAFjsRZRVsJ7GJAwUYdtIl
vHuSnCeSwExj+7HFTf5qUMR924i+ZamuuTEu0/7bt01+Fale4VAEvHFh2dE/ZCb5jiS+FSIeI0AZ
NW+0U/NA63QMYepLe1j+TpK/hDn1IHfFsvTP/KUq23ntTs/2Bw/CECwhlnmnL8VS5RmPx1YTT7sz
PiNT36ft+DgOmrLp7LoXDRDWt4sKbbQTO3vWxGVMDxvz9+jea6S4w+g1o+zthF37N+X93TVe+JRH
HVyN856chxJZxOFJbmsuW05ivQxfoPS8lvl4Kg==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
fZ6/SYhW8TG8yxkmGHpw9sbSg7zzri3DOGB9q0SdOXhya3Mioz6gmHnbrV2ebXufk63R39HqzCBf
wKTDvfKqegBEdFT4ZJ1+bgC1VYJDxHjyNeTx7rQYko2recj18a6bZaVbH7lL5ua1Yd+2Is+zHcTK
ZiCtnFlDaWZRrKmfjlo=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
F0obLtODuPglv4OWUeueqwSWpOtsiwy5TNdPfzLpejVjWZjuW3LuakjFNh0Rff3e3Ve23Qea2tJ4
BitB9zJkp75pwzMxjG3OgSPouZbZ2Hft4GW2OlsldBUfOBdSfFaS3OUi8SRAkaCUttngZMD7Za3v
7cWS5g3qnIMfMu/RfSKF7IQLhO5IadoRInOhBxEOgT6UlQOILJvHj0X9p05gWcIzZkXhc71N2/qZ
TENjfk7pS3FlvlxspcNx7+iqPHEgvTaSTORvjbvp/ARyHr9cUDR1X+TZHnADA6b6QarADp1yeEsw
2S/qjtcGcabE6Z5Jrv/Bapia/oKVPbETNu1Uxw==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 16944)
`protect data_block
pcN12pC4aGPN73n+MnBWYO6P+NEHtuBzDkl8If00SYsVP9RMvFu4sUVmMmoXlVbtPHH+p5mDLmEz
HZt6CkcpYxazPJO5aCtXJUXAA/nl3RcfJwwgGkl+JVChzKWjOEOW83EWSJs29rp5wjZHpSrb8SAs
hjfWUWvnIBybSY7SpLeQlQKPugwrky9EZw034lAZEXkwEtOqQ1IcrqcFr0hH8pv7hHcC7c2wWQjr
2ocNrIaj8QkotxfMhE46umweN/MipYB5paFKwHlxJk20VBImpG+IYaYY+eCwv5BJxjaLZfYWTK9w
84rZ4l7qiw4kliewyIC9ZmtQ7p80yHkXLoPFB8xipY37G9c13FUMqwGB92uTHYNphz/3thkVoyYn
CUdukqBWF+ZNjHxIhUn3/0gmVw3OvqORmgYGXx1uuS29WGEsK+pR/UUwHDIEZJmx0d+xFph9fVmF
rK/QC60Y0JTW4Oo3WGVJN/2cEkJl3LNPZyG0FPbQs/JqzOPU9ipGXSCxyArC6owvWjB8LOSHVUQ1
tXdk6ilfH4tU47XMTJ3wnScs1wRamrcBmqytjiiSEnXG9Exke3fTihhBW2FfKmupoiO7gw7Ip3VK
mn1F+8Z+sljxoYGX4Jw3X3DdPclry6gkWxX8ICT0x/Fpzgep4Eipnwr37KsrLn7xLk+WfVlg1u7N
MznOy3mKts3crdIw+SfKFbJ+6nclV2GfN5z2oBxUrcmAt4mtkINXUyOPtkGEd/ex0Xr6oAEk1k+r
wzeoxi9v36exla9q8eIbI4TrO90Iwqp/mSYWM9aNIgGxSvJNbyqpxu2eb2tDm6OGHhmJ8JODsVdc
DRxadOpoRELwmhjWl/2BkBbtdClgZK+ybPpQFBmTLPjYZPTe3EAzBPU4bNakaqM58cKNkQcqjCEc
SGn1yGOQa0AMHpv94cKyTuPs0mHBBVhzfkIlrEJXgA2yDQqG1oTD/gVyHzr1lTY3iWNykE6IDAsQ
fsXQXs5cKTqf6HHfZ/s5gfbGLpNOVmCOkSwPm9KzCVxQp7zl7p31sWWB960QM2o8tRondbr4XRBp
q6l2d3pfv3UmJ7Ck8yBLa959gsoB8kGjwSdz8jwQr+vIzek8T9HHgU56CT8PXvmzff++fBVlgopE
GRIFk27WU15LQHy9bUlWGH/PNqiQgFsMUGKOCPTI4bUk0v5ApjVr/G+02zuJLbdJ3ogi/rtmoTBz
IbfKz/3q9/qalvBS2GOqyK1zErUP+WldugOhPM/VhZK1XAKwftJg4HA/n8fG4w7QkuUqC2PUeQeI
AfrOSRL6h98yU4wQXyGQMN/j2ITKkn4HQLh33JS/hTp44C1alq5SGl8OgD4VdJA3YmKQBuzc/Pim
AA2SM6ejIfvT8e0TcZA8cobMb7ChKWcpbeZCdyVkE377KLdWa76EQ9vpHBEvwEaivPYWi4BsMTsF
UkWqXLPlRs39QQTQWGP7QJ7dNyjfcPgxaUSW5bj6GI2vYDNwM34dDcmfX76c/OgMn5l7shaIVrk7
w3d9jezTy5uQgoTgUSTw7Vpkn8YYrP41FEyZdlRsisA3dmcL5vbZaWEjjIFflk7QD+7NrwgRqZJZ
GCfio6IVUwyaGV5UG4YnhLeBKr/0Xf/KeVZeajQJAlvKqdVMWe/ce1EyrWti+aCXcmQgF3ZIXHcS
C9NbjTXvdUtNrv5k2dDaEdlx1Myz/CTmi+a9cp5eeI2Z31a/ukRKjDkvcbcclSBnPOc9/xMYq3H8
zUeJ0xJ+MqOIZdlipEyCiqc9mMEM/aYZR7XO5xxRWguTnCvGTkGVziIFmIcVZbWJHQaRTTuPletH
D4dqatUvO3G/xZBuHHHznxb5i+meEd/8SGLoEt00xM9VuddELfPiGR9vB2+kyor3syIwvlkNxv9z
9r0ks2bwTG09eVBZGYvKnqEbz29x6XUHh2RRGdk3DpU6DI9ihjnPvq9zsujYbMS7j7aqoKW9GUy+
ui0yKJx5rdBjjcJ1uUF4Q9hI9s0Z4Yx23WfWkw3t/Y6HGQUtvbNj2y3Xw9V6kvi/nVhHMNTBeSF1
igKWMeTj5wykWhy/z8zgCOqCOgs16Bti11TjuznJD7rm1O9ho+uc5AYmlFaXyTYhjLigieIaOTQC
jQbd4DDzRuH4WghZFIQR6Cw2xDAoyBGqSzjkkWS6OTc9CHeoNSG+weFcR1VDULGDpGDvY3lR791/
DwMdoa1XET7zdscoI33w+7KgJ5cTY/fQvJmeHIvHlWiVPnQjKTS0+I9j9ctSROKNPm7mSBQpkuHw
3j5aQAYiYhn3YY5w938gwvkNq04jjMgguSEBfTj/AEpMVrj9+892MdGZ8dOMnBIHxOBsiivQnRva
0OMzn9HPqHZbff/nC3C5yRW5zzUz9Ac8CYeD2nQdXGLMV+mfa+K+ZbRhjM58lchMIrdjsyfhv9UD
aji3LImuV+0S9x0j+ZL7ubVvT/LfLVYkc//X3oLnNiooxwDvWNREYEy7NAVceNqbQp1iWSiazWcT
iMIckKxWxvO1Kv4XQLTHH2bf0cSHEz1oWSF27d+P36NfE4bBJiqghsQtYXxoNBEdhP2Xo7kIJKml
8JwAuj3lfX/pt+B0Dv0QLAM1FgKh9ycWvIJiGBQRRtlDA1XbiN4gDFdIwONGyZgvOxIjDsdNy5nB
6ptfBcAcCmQ0XPfQlggz45euZ75mP8v4xYtVz18e1M/FK2jkfaXCseXojN9VuYxm6TDaacEsY2Nf
3EdQTEvm20gB7Bp7ZIepRsbUVju1IUXScgrYarG2AdeGgap+jqvc8mUpwWjgklIkDKbxi1BLZsCH
EPrSznxsWVLbVP7YC+OIM6bTll6TIjhXGUd7O/NfhFRxq3i16OyPTAktRa5Y02V7n5FY8ZHzQZYR
ELFityriaLOzF5tVMK9Q9bHwGMnmLf7TRvDNnko/zyah/ZqiLB1Oq+m7mP7mJA5R2nNL88RPyE1t
E2AUfO0nrJAL8EAFWEy1X/rgvKnbk0IPxe6V42tBFjbPxQ7srRjMgX6C92keCjCgnQuh2rPFpGbj
kCUrkOxdouIpdWfP6JZdWloRf3e8nPHC7XDefFOBqW4EeaC4yj7zGkEgoea6xUbx44ofTZKZor80
cSFn7vbe3elGiEk5JfakbD/xKU7/0Sl+J0hgYgL8S2TLxrXgq8vn89fB936fXTaNUuBMe6BhTRH2
j6Es2kPCXqKsgTU3pKyxWm06jkk4RgENyE4M9Px9j7t+A4EYOGm1NOysgLFAWX1IlWRbtjUd8BZO
BjL33c3uSp4mIWAq5tFZcmm59c2s2kn8RWXeJysX8e3S6vycSzG5DS31+VqfLDM3qOEaDkOqfh7g
x55KDYgGNMgY/9coRTm+IIUxQ9bYCsv5f6oSkQMDX48XBrSR68gYbMN+7Fk1cwr/2IDQrnDD9Keb
r7SiU6P3wdG0qjHrmmLRDLaTB/SLMDv6GXV+rJASltK8BpJpQdSM05mdXmy9DGpWxSWryhCkTL9q
zNj4g1xRAiVEH0B4Rf4R6zA4eLcXZXrHDpKB9OhzlFZUCbbnklQVl/8FEttizueW36nUA1d9bZJq
krhpT8boBEnTIreyvqbl8Mfpb/ZH9KA+sNXwOn/fN/pNsdcWepUrvu2ParAjuHY/TWCGvzM3ypOg
/Yt+hXXTbi2zz2BwfsywdA5vXesvKilFQSxRQbIo8C4FxGTAO7YKMTCHiyqIYMnhSWrYW4ZRZkSi
aL05fvJcfLg8kptUDm3dNP7dgr7yxeNhap0Q1Zf0doUu9CGIvUhzUP2qfLPzOsxwh5NDTg7FDL40
FstJPpUhehLBuWlg67F2WMdPmqe+g78eAzyvS6gRJNRl1LEA6tO7IMKc/D4R9/R/CmjGCNlsUVlC
oCSny5w659TBiadEf3e9Kplu4ALbT4QCePmSKMF/saxGXDr+D/8HaF8vohir33O+f1as8Z7v+mTt
EXg79e9XsppLkGE5cWoL6uwxXbAbjjkh5pNUp2tWWI7lJGr8zI7CTfK5OVxlIaBrWuEWEvo1Mlib
TSIVZkLHm66VCNdAwAwb7xLhBNY1Yac0f/L1yyDBCOjCl696ISoUFGqKdR4JiI9bLgLG6X6zDJyH
8qxsfNGUtXstplM1thQqZVoJ8SKDgoYIrjsrHy1TMpTd9RDCBgFRZJqEEgt8tlWPZVcebHEZ6kpC
nLWUHyAHA+ppZsB3R/KZxSxSRQADOodtXjnJ5KXQhOvzGqYvh12j1GAaudHA2uTq0plOUheETjlq
oQh9iebVguxxlDAQJpOuDh0SJwbnZEh/LAgZZvj8MqL4lz/4ZExV+1NN74wl0Faw7MELZ3//mXBZ
4j42YAh2UOMUAVz/8BKnitbAxCiC24uLSVaj4MX8nZlpVvyausF5VZENND4zbBRjakw9fc96SSg8
572FFbjwRDIE56rVZfZWaRLxh3UfhpZxf4h30zrH8zolLQpJyxxoj16ig+u3nmnGZ4R3oPvEH34+
LOjfHvWuahK/lPp96Irz49lDpUoxqophIU8EL/gsRwD12DiKgSHyvKopkmp2LHKLVqpHiGkqq/dv
NssJhxp5NCODRNHNO2yzHXn1rjUhbc4Dlwj9g9uSAIEoMNJFZsc1KgEqB0s4oOS/ZHbNysOi1eOk
kUeAFFclBpACWIfHX6k33+63eIMFLyt8eWZpwL3t5/VDJB/Wc+/DEsJN/Lz1PfMbcoLOQc6PumQ2
6m/gQ7uYvh7/7GHqOIazQvrW/4mgN1nykSfu2TaTCJwNknN5F6MV7i/BjkMSGX6S+MXUv/xp4Avr
ToT5IcRWX9kRU+fJzEMXzOs/jofFpzNKn5O5p94xIZppTEt1e+uRN8v6BS1r1tKEfZbKrD+xyejB
jKG4VXX1lTZo27ezaDbOJDDbLj6wVs/85u45IvF3Cg35qHSEmg5EwZUSRezPEYr2sOpF0jVmBZC2
B8Ft5C0kN2LOEYyrjB2LS4xBFSSSqdApWrQd2Ic/agonqf6uYvFm1VkHtV4LvlGNuiFZW3yx8hyz
dj6NE4bG++ni6FAP8iBwJ/xL1GrEpq9Pz3aS7LM/D2HlolTTPpwb1AkwZSTB7rANruKRPfw1UREk
2lCY4Fb+RVBe+XCHJATQPJ2tW2d64xKqlqTkWjCDxoNFJEBRIK93cFbDJd+HauALYzDdAbO1KKD+
bMmtUljOUwnYWgRBhgU4ESfZsfyKTJTYHiQB51rcqqnNww8oK7ejMz+SrX44bA+L/GzXNQndoAq4
dJ3Jwfvbrl80JZFN33osnQ0wmyjrGRFco8TfEGtKPoaoA9mXbDk5sgao5F8n0lIZk8qWmla29f9n
hABk57apcnpvHElVCVmrAAMsjTxneJFRFSmCwY4615P0bbu26sQ5NWNHELuf9vq2mj6FjnLNeWwI
bbZtw/3uPURfZttAVL/ZVgHF6yP9Wb4jaGauRVRU7bIk26lrRDQX2pqGvuBbq5rC09NvV86pI9cc
AjjO32ZYYlSJ4KyWXIhhGMLg6vRUFP9Cld+lv8R9/+UsT5U6ElITRVKMVwjsOBD5o7Qz0imgNKyO
Fcq7fBugKInWuvH6aGYx5DyqEaiJ5SPu52vyRmePwtRghgN99mih6RkXJmDM75jG3egbkYSKi39L
Jmd4Wt1EzPGN+1JIg5H0s6ewzq/PsMRLFhcFiWVBKupoe9pD6CenIQ95ZpMCOfVaDUCsegGFuC94
3iiQ8hpnaoB6U08LTiYH+RYhCrUHlhVRKcxW5gWuJRg90XA6p01l2lvmVmFqmgyWo402yoocEnck
mX/kKpOdXKxj/Wd9NysMMTTTIVvEHuQUZAAnSuF2Lv0hoKICorYWPYgo4BEYqVCnP9gWyrPKHtqI
EVpTe0ARobVWjwRAfNL1v2c+ta/3zfFkE0mgGLfMQeG+S1HB+7f5MbH5mGwyPN2y8j+btlo9skXA
9E/96Qmoqdv3HqGCTzXqjd1A3pHg9osvAKTNEtmblx8tudBxNH9tqBb3yak1szU6uvEXofy/4Vm3
Esb9seDBm/u9prscg1hEONwmfP4lOJOjkd9B82P9OtRAgVSlxu+0aZ7nuk/6FCUMTeRAHxnyt+Fh
xrKulS82qq4MbPdAEdpjUyFEhJ2djPqvaZRFo/PnrmQM32l/A21HyeYWJM0op9vKoYB5LOu7zgVx
ULpkbH6Ff83/KSqw8DWYAtLjhFOq01mNVvZ1rzHa1/Ql3DcwfceWWhr31cXwBZli6eHJBQgbyffV
zO8MXRN7KGg6kKYtpWTnAJeoT4SgHgYSXzJmI1b1WiUoWeArQB+70coW1vaUvAhWATyoZnwIjyG3
OaVUrt2UcPk5eP5AMVEUqkqLpfxBV74F3kpAZAOFXawEqwZ/cqk3yIdK69rM4472IUxVgxVU0eVy
6Mw/bToNnqytfbCDF0ZlMIsi+CBjLLB09K/KJq38/s+Rc/Wyz8OGMCD9+03fwi+4Z47hA2SCxOIa
/HrntLyKpwYCXQ5tAZiGn5KqpJIe97LwlgFlk3Z5hF+BqKq5vCjUN7mU6b1I/+iMhLtDL4mvn07i
FZsPKGKIvhUdQER/kRyCGP1KmvzRM0XeLaFpL+kPdS2UdSCaVJOuwMh+FOh0niJkbJgiyKtDSIH7
hwDefALfIQgHzErKAiH9ahK2jh3GWLOR/PZrI+VofEi2XieVGsNzYnQmSfDBRfXPhWQR4dMy3Gf6
0daa0NVazwsElj1Ljf7vwchY3ha/6d5jLEIvx/yKfMlW6+Qlapjko4pW6PU69kwsLM1umv9TC+py
Am1FSbH1hetZ6mVlT7PG2s3Uyc8fh7ak5QtTdbwFM7nCdthvyfKl+/clbtdVOD6ekKKW6iS2MC+8
+YvB/WjfSJQozGoJ3B6nTHpS9HyKbZqGwxUdr4HMye3eeyx2PrVkWWFT/BiKExJhB6Skx7arjMuX
lsNEiumv5iq9wqp7Im6HGfpc+9U6kWe5cyf8gA4blWsX6quZ2TpQ1WqNjpe3623KgvOJgz0Kjvr5
RUyeGgNxphs5gTgASn2E4qcWrTnjjDt70ssoWsuS+q5Vm/9LaAsT1qLWZ1Fe9p6xre2sbj+oHLzs
/X4BXkXqjhi4ANrIrd7ZWR3EO4MR8im83y3F5oYZUUqH83AoptLykWppSZ5StruMyWUHukwt1RHd
rdlzr3spGe6ebVRW6iJfCK7/05wDLRJeP0q0NQ7hr5inu9fxTWgsWIucMXpW6Bki9npQ5qXFJZWU
Lo1uUqSJB37gxurlPQPQgwibkbuzP+WR5V2lXZ3bm7V9tSnAtCZrFaqkq+CLixb9Kjfhy7K6/j6k
MmJK0BGuKY05ruHXsqdAXCX5pqwl27GS4RT21FGQAl8kpyoXaDZbaxbvS36JdpH4vJ4WSDXVlesA
3255La5ndZI4LCH63SGxjs5j+UIN45bK4iE19ifKjjXxC18bA902CPfJAYkFGjt/txGCgSJq61vw
DsSGDBIxLdDqcX1Pa8Ia2XaVB+C3KFoqsf8l8Q3kjMOCXpHVUg649l4i0Kn8jV14gawzeFmxKPgL
hsu5vn9cO2tP3kUDCHmhEcypCxymmYC9oaI9LZ7Y/i2NjophXgi4FzPWjaL0mq/CWuwQtdKpRlwF
exMRIrKgdvClrLGA0i6MmCyIb4SkOdCG/nZxPSwBiGhD66zy+9TobNeTZW1cWQhLyWXFE6nnGwSV
Wj4xLAehUvlH+AzqhHyzEiVTS5mPq/m5DkMCPqHoEYsCpbc+ksY5dfFCgxtKKFyg8X2eLGR04Z8v
REHn6pq2CJ7Z7iD6cFih7ranE0p9KqDo4U2zXYbMoLw4036/qtApTDzQmBJ73WnvQvRNGVHOgF3Q
cQ/OxCorK/AjvB4VW2F5Qr5PFh2luAaP5/qfJFsZBSh1lrmswHZRNEqFU8b14YDsQe49ny7ql3dk
Ho5+OzXT6Dpo4SLrctNLvdu7ICALQjNRu5tiJ+4BX7pcdfIXI8l0ADp/Kr6HQFIWV7kU7nEL/hiM
RjUzyz9zcw2MCZZ2KM7Hg/YC+e8vzz3tEmmfDm1QQsGkuaT1Oxd00shVAvdj8o+DUO7N5rr2986q
K3V5RA1nmxXn/jg6m1EAqSDqWQm4DtkRfeIb9pp4CsJpPXAA+tmtIe8sQNy/p8vRP5NpFlxVU/eY
zLqB2aVp1sE0pk0KbAvcd/2PLDOFBeThi2b642uxD47gd/JnJg9r4RXPAkviiPbQrpuTMa2n3IdR
uNJAQ0tpEetz3hSicRWpTtBY6v7HYYTss88jmtUmPq0NZoBasG9QOmcb7mcYFJp9lW9lrM4dlCSt
2ULt6aZqluYegwruxqJ7sy9crnlF7HvD9iTdJzRki6ADoL/27vssG5nwKOCUcekoFv+K9+mMYyVv
9wk2q3Nj3D3CJhMzQfaGXAg05EGvLGby/nz8AYfgQWObKC7o9lkJ5ksamlmAiJZHMBbLi6y+7FW8
Z89msrAZTvwBe+F7GUTZajl3vSvme95YomVtBVNDWLqo3gnOcuPxnKo95exNmI3g7ZaVbKtFVQXC
9wNWq2fwW3QPD/usEI5udB6L3fw+KVOutpxQiulKxIS1T5CJAAzKKLZNa6jBxBHdJMQNwUVkfBMl
a4nL46BHNjYLl+j84Gga3jTukBr2zOKedY0SVmdr8dyiwy950EmkBTBQks4tlaqFAnjuWQXqSyRX
dVs7tIpOA+cTgYbFjSNEWD+LMlL+jV6cllS7hrioxCPN6OeO9afHuJwFH5ROlENY2zdE18HpQqSY
kdCBjlN5ex+IkXbZZ0KRWIJsNIcTnmMwmQh6CzNKki4BkZHRj5i4O3qWgM4vp/1bsm0qAQanjjqX
i8YNIA1eAbxJ6bsy65w1UtG1l+islgGK2sogQ+EOizZHJsrVs0BLsxYdTNU/xW370WT+k5Blhnmd
orkkCZiA1RZ4q830fqRxOSP5uT+xVY55DU65i75hE/6S8LihMjkEEla5azFbwQelVq+qDx8NESt5
ShkfKG8khNMEU/9beMp/rOBeZnFDr4i5nM/ntiFyEhdiebnFNuolzghnsImOJntlNAuZF9jeCfXZ
4lRQAmSW7tZp8NdHpEqZWjTTgXil2Jk+VDaJ3i9Z61Klsxh2FReu+31tavojTEhvQXktpHEEt91Z
29W2o0XsSSkGh3W+LN9hIoQAtP375A6EsgFIC0OEP1fLYVuyZRwtg8cE4D+F/xwM+5bz8FDDzbVu
3pf5asOzo2KvOBxhKXzq9Tb7S4MWUlU0VvbBzpmy8g+22p4Bu/MMHwza4rCkiTh6a0ipF8ir0xkr
v+VJVY8DSbHoLKtLdG5wcSKDjTZ++CT6ZcNhkHmKIFxFu9QoqbyKVaCqh/UpuZeoL1xXs7D0fXNc
afonh5smCaXuRbohgQo3dxn25AvGkCVyay0+reqFXXKuQQuUtRYoty+o6i+q29w83pH5dL7To8ij
K4tgB0PFS72e4RubuN3VPvQKPyxM5o7I23SRdr5wG6H4L4iqXAJtjUJQvXEiN8/vukS4wCL/+32q
HuAYJfuUcus2Pag6nt290ubYoLqpe9o1JVnG4dnzn7loaw7gjB7qPi0yxKEDk8kkiRJWTSR6nWPB
gfW5xpJQdsjRURkNn5qZ/2WsdvWconP9lgpCmkktMExeTe1xNosSYBgJL+hpiovDcPk7g0VImm6d
si2npoMpeyPmya3ElTXa3zrT+2vTmacGYm51aJ4usha9wUeVsGLR4HLWxEoHcK/z1+qhjcaD0L6R
OCbWMaF9KyE95ygXiZQg2siM+ohLMTkEpOUPLMlmJdAxe2abhUybYO/VdVXMGGyzh6bmPyz6Km/3
3ev7W62ii1br7lHdhYaovSSVJTT9FJpP0+GJt97QwHnX/SFk8xQcuX/ehIypAxe604qx3cFeawVr
WHMZ3rj5dKCTeuZE303Va6TmCH17V16La22xRR+Q5DsfdspJld7ltDn3IH8LF24rscXLKyfRUtNm
Ne7lynwtQ8/GkYMJSzx6FrjNgdxafxx9xDEL4KXslp/a12N9i1UdCO9k6RdZR/gL8dSabTX9jSoX
+DWreGV2uOoqv0+U4V3s7van3Sk2qzSDiIZcdhkEzuXwcELTiILkd8IbEbfqPecast3Cav6VcXfy
j/I4SofqeMsgj3OhdwT3a3dvlX3TkJGOWothod7Fkx12ZLqCn35QK8R0GtGVqf4skolpapiSsxjO
Mo0R62/O7oT5dShZ2/vEbShiLI06iI196m/7lgqZnTM2nZ7wYkVhGrOClUcUIj3DUPFBYJ3Bn1Jx
qDmSUAZcNZdKOzPuK12YVI7/JE01201B0jANFFN/NqT+H6hkqw8pWWz1zObIuL76i/41bb6Fk27s
iUjfJ/9gvWT4QnUKmb5VJIwu2NtY209jaU3Z+WtE7y4C8kS71NGV6C+GhSuq6YYvz5HycK6RiyPt
emMPmFc+iXhsTTMogotsVCwJEtiLbc7SFpc5LlBiRdnh6fp5i11IlWwS+cOwAlrwu+iicPZR3Og/
HTdAdYEPaKk36X7tZVSbUj13M7GMcF1IdTVe3RjmrAukXNj1K8ZeyKW283vQ1kd/3zXWhZu7vLli
itr59wxOqdiesgxB7M6QeVDJJWowCloD4Yj4CxANaC85fkK8ETg4KDWl+zfxMisTw5RkQdLji44D
7iab6O7NrkgCuZ8XFf9mOlBgn1TZT0KLyVqqItKiFkfz9ORvvSk1P+kNc6YeYgSf3TPEHZ6vCbdR
G3Ita4REedzJukeol5ub932gU63PdxA318R1TwZ+jMYCAfrP4kaqJE+sTkSGH3dRYXJorqpDPpVH
L2jSEQiAmigNp2S8qc0NEvJWWxKmn+UYYsmZV8D5REi6LZJgCZPFPTZr7i/p0/ordqHp0nI5ar0h
fezGkusIC3YNWdMS72w7ngLHMQUjfNO6kBbcbYUcp+Oora/xEJ+hmt9VBlaoOkJQfjj33ggHPqxh
+hwsUVbS6PKVmMe9im9ZKAdIdhldQknmZ0uZtM91NyTqsqZ6QPpgACeViu0UFIqBfthTOSMIJEp0
T1KCyKw1rDNaiy5/nnN1bvGXJaOdcGAdDewVEih+ovw59Nk17I5r9z8PBo8yKdepRKdPxsHIkrWy
H54Aq0EXfXDEf+8I5JmO7HtpDaLqgkvT3+uTLznas4jyo92ukukIb0IX4X+SyBo/aHctC1BOM+N6
YAkjTFhHvbwFZNpRtyv5OptJvHFIIjhnsVE6BuvmPnP4ET2EQPfO1GGqbsXPiGHRu34EqZhaxmwz
HR6DMBDdng7otEi3/vUct745mP04xCcnxRy4c1/ws/pHh6ll93btEnV7fA8lGrMiLpvC04WQP+FF
URKlP9mgbqS/Vh4moSYW9Nism5EYcrbEij+8+dVeo3Xni5VJArnkJ+MzSLRkrMgz66AxiEje2jVU
B+Ny2ivP7gXWvknaH/PZVf+02/i6SSJCEZssKQoJ5Uupfv3gNKLouZcKNpa2C2U4XDH5kmigA/lK
C5x7DFHNizNAk0oFCAkcJB70szxPRivsO/itPeOybkqIjHKLe7LnNz9i9rFoyQkUvqw/9GzLDG9t
h7aYClFTVVSIhwNpCVtnAwEaP3HldiMg8h0GgDycOA6Kh3WdvFkXABEMK2F5lRLP3TzXtytnjS4b
+2s2dtJ0rGI3Sqh8+sFZo/P3GKCpCFhWkAKZC/iEWTrl2O7hqmLtcI3+5Sgvng+9X4M7rP6ndoCv
TgarkWoZen/v6r3/5RnXTaNr2GNIQr+zCKqqSyXrPWE0mAabjkZqgFiih1qC6CNVugLRiFILPaNh
TJhZSu9GZhVFVnLT9F3oxL7okJ8P0/KMKjrS+Zcd2OKE014c87TNHZhnPDLIpa+8lPLGZhhZXmLF
svu7h3zWk16frhbqfuApV1YFIca9axhhQfxKv+yRin7V15laCMUrdleuOKa8wFDcWVUBmxC34eVt
S2w1uJwyedDXHxBfv+sVoFzCa6z8AJ5u2iasWI4a7jXd6C35OdHMMYnhSHzJxIDuezVMk9P8fz7O
mwTxKzVEfK/Q6EauLNTIxnpdtqj3fhBshhoA1TnEDdx5JrB/DsmWjCbEfEMndMjGyE/2omNmSifX
ZfHu3sGOf5kuSfi2HmEOmaHBLlhaJuucl6U+To9fFtSfG7i1dngHC7nTMCx4wGylWyZ3WElF2Aa3
TSpcM5mRKCk4JzHxARNuTAv/YfuzRlqbJ/jmu0bC4Pp9A0IOsoTI2ITBjsoDTwQU17B7U4MzTBg1
ndL98XyQth97C6nPEduITPCBMNJlc6kCEYKo8PBJFYutI6vq3RgqQeZ1KMvEJENCohTCWg+e+ZTz
CrpWtN8AY+YvrW1Tsk3dSare5LiuZ/L8cYsmlBzQbis9NGIO9LQ++ZdGJqOiJHjwIjPLNlGT6KLE
XFmHzO4tDBFv6/nA5oiRZ2b40KM2S4iZ+yrsMeUovGnP2SIRINs65ox5uddP0l4yIWf/cu3EbyAB
19LxDByPa3btIc5nfSsfFXzX6BzLjpklNjAHSEoDah75ori9+BC9IWRjioI2emBDarAr84IiuzYw
dhVH62EHmO2n/W7zIi8IIF/4/pJd7iASF97FkeRwSqcMx6IxVxm7uLEUGASfnRyxpATwA57RCPlC
ywdhEPJT7ptaLcaqT08dBOo61llPVboIQTd3N5ztYUw/xDyim+MFQ1FSG+Pq8gNWNvdOG5ompiLN
K06VbLtzb+jAVLcPVRI/bk8JHh0CI0Eg4w8KZ9d8x+LygdSR+xvSovPhd8iGXWC2nnwtGl5lz6d/
I4tgMzVetDi5YlquHSoxv1yoZqEl3AFrWft/NV057kgIT63GLASSe+Go8R8W4vxB3dPpBkB20oS4
jqr4SNroADqu1Us8ITpw0j2TCtIVyFbcm51Rudc5Kdcpm3bclGrKlt/muWYJB6/87j/amx0t9pBj
D1xjX8PZZWA7qacy/Nru6Y/OCKwdNTSrNbODDVmJsWONK1UPpK3Wk+s8T5KNNk/NHiFKp7UipT/r
2ihtdGTSvdsf/VBqVJ8ZFNQq2uzl+Ksz5ij7FOSnpf1sks3HBfdY8kfVUvWlQg87erCBIHX6AtkJ
Y6p49DTQGIRvSNfiw06fgg0zJwv2Zzx0uXMK1V1LWo6l//B7S5n7JxheH5JO49CcOLZQmypCacUg
iE4FKMSZQiuSUz2jBjl7mT6cObZojRieGB9p5P3Yh4AusPr4+c1SSYaIdC/7M+DBW4zBN12CsupF
Z137USvcGnj5T3XMchUd5sLh+OWkJDA4Yo+a/WLl7iR9Pb57iXK0zaMES/0zQaheGNs9tAOyxX6R
WpdqT99k0hv6DvZiuBaeZHFvlZD/MK3ujNcCPqx3n0qBMgjXy1gDwZI27CE3fpEF0NaKiT6n/Ps+
wzVVCrSSS7CCt8ufwXfeLJ0FbkOiGPcC4Vl9DQPcIVQm49qL2asptNskFr9hIy3EjJp+LBGiytA9
oT/pVq9WZ4EV2B1kjTVCk22Ix+lFPrGoZUL9/H9BTpBP0KETdEZLhgBqe55q+6NuH6SITI1k45RR
lakwPUniJLZqinx6yNaJZ4g5xC2blm0kjKPj+Xv8/oJOPcYmGt61R0/qFm3Q2HY4VNTSQNjvD8gp
MZHw9xYYu1ELPD/Ogh2cv0ir1TQ6L/8ZgsqhWPm00t0z8HtWOpaL+h+ra8/Z/HGun9yRDd2RxD6/
KvHmcvslil1AcfCH+UGPegFnYXQ7fuA9jkkOnKbbc4bLeSQaPDkGXvyC5sZDfGkBLmumDOJofQDX
Sl6YsXp8oaA+YYTchPgqbVdGlJk4kOSKQ/d96UkVWAn63E7lOxJzxiVGo2SFA0E8cuQIQdZBogCK
klq3qeVSsCrhL8O2tMkHXlknnTG1tqam/+6amI2wr1pVRXvZkY12BU3OgxgFCqjyrL52zHnz70kO
/u05IMNZaKj/vz7VvwXFJJVvZda8P8BOShhORPR9VrRNSf/ZylNsFqIK5r6Xt0QbtEznUgWK+4SA
HlUsIq6HuN3PdFEgVGLT3sqT/W7/qOm9rLnqCSBS3cqG3J9wiGfb9bRwJ1ilxCpF7X5Z7MJnS96E
cwUE4r2uhX4xOmJAETWn+mMJreyVLb5Qpl78rAHHQua36WCC6UAfyTh8OALR1JROtrFxqzsSwGSy
npci2NIjt+Ov3dVRLboVOtnTzadFAlyjttf6bBj/Cy2aQFdMQtafBEDLRg86iXnOLzZbhE5Tg4IP
f2C3FIAK/1XFg2k7ZKKGy9FvYYdVmNnrgdRb+ZiyZpAy2MOJgrmWCjzGyTjEXTpNDVxyrUfNPYtT
azhDnsHWWGIIaJhcWJNN0u7VVWECwlqakdIV59GK+RTvuzn98t/16EBFSfLshRtYgFMq7TilDid3
zThp6qGLVx3tAPdOe2N08v7iRHJoUlhrPUyRzeHpKyVSYSTgCvZzAjzb6Kg4VaR77wbZ7q7QQUHJ
cljtgupVHAvRT197XKoQwT0gKCHTVOfod7913sWtvDNRA49ucv4fL2gn2285cN4FWuj2//T+AurY
DevNbxJzd3wztT+7/0/b8tGbvbRsTpKz/Bwn5BCqJhDDLOO0lT2aMXF93Y9ExJ1UQBZcZ0WpxArQ
JiMs6Y65Nmf8n6QeZxpWgLJNLjZpS7+O19QqLQbR6w3fhceCEYePmWOq2GVmfO8zIBGoXaWSOjbS
NTjS/0Wua0WC8Zt/wN1tRBXHc+hlKX8D4sWBIWKo4f6kRGUhigOZkw3saHRYctfaAgIjBra531Z6
ER8irYnm1znMG4oSo5Xc1xPNwTGUko2mfUf1H9A32oSRtOuQpYWSsg/AGgSk56inK76OUSejRhEZ
QUUFvd2bv0nKuMStsNsqsFrtAFgotzVnl4jDCWokxvvPabru0bsPobBYKUSYu8cU0ibE1tsv22yt
bQbWXZDhKA2CXUyY/HXfDbmazEhVA7FafoP1kBwlMl2N2xwUf7l8tMiehEwfqbHv4IQoTNv+VBBW
tUMBDdIhCW1vAA4WYuKL733pPrwuo2Oxa+7MM76bJrrqVAmWbTL5Udr9tNBHhC82n/B487nx3PUV
+C3ciTKtT+K4mwgS2FERvHkmdKiDU0+msE6ngnnfO0nAEK1IBPOh377gn8m2l35IF3uahi/e1ygx
EYkGyOJzm9N8nXERNFLXN+gW3z2D82a9gJZifqrcXnz/cEaneuOxDoPRF5EmtlluAIHRN6AqLEGd
wYhQRLoir2h37fuXlV60cHtbQZ/6RD+1RvAs+6Z79axsZiOgfhUx8n6cXnFLfU27qEG2ZHv1aqOO
DeDgTNmCHaQIar3fRhBkXUA3WWhGYM4l9Yy5yFQAwo5g547D5uBJwZGeF9P6n2etI3Lpy5efCZaI
lun9CmMgIqpV/OW8iAhAkJVNEdTZtJNDO8pW5Q8PwApytZpbc0gkh1lxFZNhyuEGCTUjidGI9TRP
8pAzSBYBrYHcapyIphdyZQv568HinSXYvEvYSVp1FNTpDs48XBxcFqQhqmH4qzw6Cdro+UWZncqa
QPI0wAPWdfElllyQcqyIkQK22CJziHyfoNz+fBsdEmjOytRPVONh4NiV/HGLSoH6LpyeZRplKcJ0
hdEdQAwdiH/TseA0Lmn/d6ZXo70KZlSjROnvojVt3AkZa0twC1qGVvbC+e1VkTfdKtxsQ0SiaysK
wYw1bKjbIlZTufMPdgx0PXIZi0i0J8lPduI2ofjBQsSHWCpq5zYed75AEBmmTMVGV5o/HqC4y2cu
+znjXZE7HA6xhItiF/ofmH58fgYB3VcerIghz3mFa5JwR+jurgdYTOJLUjhlFVQirToQp3B5FcTI
xvIvUVfKV6qKFgoIojfB1H4k2JGDnRDX2xMhbdybVhzW7B9LjKLFBAAdtewsuytrT4yCN3FWfiNM
f2/qdXjMYjAvkrzUZ0HcqMwmGMLJqSvnoWuy2xgxHDfLf2YGcP7bescIoQuBKRpv/2eEsDWxrl8K
ztfy0RZHKan+4TKzQaYVVX5y1rfp8fhJsScqAPp4sEEjzyY+/KuEqP4ntlSXEaR/T25hIMvrFtYe
cNe8kF0/1iVv96aCw/R3ff7OA0AJIU/Nb1Tyov7etMSQxMMzBV0vlbj4vuZPPHE/6PNFps42M1IL
qMzv7kNVrui8Z+JDqK9mpjvRPsmq1EB1juo6lJTc73BAxp/aqiQiuDPRBiICwo74XRPZR4KC4G6S
AJEDsK5jNVEUgKlber/st1FTMb4F02iuekIyl3QUFZe4Xij31bojHm4FZRtXZftEqXzLUvhZTQjH
4vNth46bvYsFDZNXhOpE6QZ3SuH+lX+8oW3f0lVeeT1lJ683osIimbBVyJeTGo9KcZfVjYNkYrCT
vGrW/KxkcMkKyIVXbv2/pEQOXhQ6wgYfiIoG5I/Gn1VF9QoHco7qoIsE5iSs8eu/j+Nb+Hg0Uwmk
Tc008Ji4M6r02qcMTBS/6Epo6+q7FyOAPTSRzKlJiALmso3ZoeJfHmXSbQHHsolhAPV2iukZKuIU
z4Q1alLTeFZMkLYzkM+y6J7OOC8K21gGjCbSLkAVpki2nG85R/++Agv8j2No1xc9PDIHZf0xsPWu
h6YqEcnZdPNJNI9gb4baKCld4E0Pwo6lQvm77lp4MuQ8mwmFMpA/d1ZCArb3tRUcvGGAz38R2Ejt
swgaJ8zDPTxknAnShdz7kX2AI1y/wqD/3sf6VD9sAViXKg117lLu7tZ9ygAcdb91H6QcHXt7BUa2
+vjl8Xs+bfB7CjaLOtWM3+pibsEuerbMieHS3KkUMVzNbamojTo8wSjZMnYHdjqbAraF7IBDZxgn
zsi3tiFiHuD5RzNIfHbtcPC2bnyDRZHHKlGPho5rs/PywBXX0ULrlPKgHSnBbTX21huBqArbZJDD
tbOLYDFIwH2H2t/rSurrgjKsYLUlGvvQTFMKbRui84FNASCvDCSVFIcb+V0J0lztkjWlQyrheQAT
4uoXQd7+N6/p1hTPgVH46BAgOhJwdyyw5Yz4eQ1tznC7LxX0unQ0cVjiduCcsfnpKzLpeV/o/Vjt
wMC33cetIeC4iftjCtFh8icJcfJGvPrivuncAlMeMQ1xF846OJz/xCMqtLUesvZY4Qv0qRef4A2o
bRRuYCbGChG24dHTYRyeENfKbvHUEYxtzfoD3g+yNRfcq5EgLrN6YZJGjhT3EcTwBvOoPicQHjxZ
k2QbfRmLs9ZObu4QJ9evkxNDhwnhL7nn399AwKp0ybr86+w5Lqk94eV/zYYV2bRtTqaAbnEBwGzx
H0E8ioErmWCrhiLtkRxvW0hu7PSdd8j/EtbmERcXMRp7nF7sRVWnhmncd8wJV9N/TvMVFhg6pCp7
H1o3Yrj/vMNtGI8pbhUYaNLO/BUOIc4Tvkn3bgVMMIhB6VwSVvZfLZHIySmPQ0z16E0bCM8QIaoH
imX3ztp8CVqnGJqpkNVdoSXkxQ/x7sMr8cubveNb+3keBzPBRY2X8UK2qlEmpXv9ew8Vad+7qpgO
MksBI45MOEJLATyjZIoAd0HdrCgSDRybViSKeUUg5waWsrMOcYtX60u8rgIr/LHJaPNf5ACxJr4C
BbQ2LH6+w+ZEDXWzbb7HBA5BIJk949iE92gs3MB8vJWCosb6k9MdPrHsimk66psjU1E16+Jf1ch6
dg+379MdJXZFWVvzmYFcsD3b9cXBnrwF/Si6GVFEdvRHO6MhlYdGoIE/ALo+396zUfPydu+raYWC
FGQyXL+ukRjyQjduhaGIcoCi40aX1Zv1/pNNsQf2lMDDADGlILBY+KUIJRFR3jlzR06U7B0S/7jt
VX9BJpQ0JgYyWvvcUm57pwnXvkfGFVCvuPqigTolw6cosr065SBuqi/ohE8pmNcZQPQiJClKdsOI
gWcIKyPjboCdlPo5H3G0oBRrBbi2d6xb4Gr5/vH1RzP/+iq/QORFZ44sfVQbsiWzrdeDLG4qjSzV
10tDJ7b1QJ6gJhYTa0GquvPJH/ceSeSHTGN5f54e9N7mdplj3IXSFwF7+T5yJKiRbK7Al+7MFDdL
Kx4ps+kUl/CgK/CQPU5sAMwIR/yE++baYVekMDHWXu8rtSoydurAJKfbBXVJmqiG/bF03mgJDaDE
WyiBSVKB1CDlpmS64q3OEJF7Q3wTmxjqTDmQQIOOJ2Aa6zeO3cRQqExAp3sIRdjRd0C6xAutGlKR
hhl5yjbai4GViAe2te698GFzlcLoIJfQrMZcCWExocVm8rD9Oum5xUUxNzpGjro234Me5CNM/3EO
oCGOSEAVzviEDVXdm1ZqG7QxMeBdLcfDPtuIT04HvCm/bOaHOeSY08Y+4MxZ/nP+yJVRW9omrBIu
WUoNWt3ivjBoockcDNkiW/dLqRv4fpshHSZOp15MapSIJQbLqgle5droXw+5KRk0GFrzQTcnV+z2
Bygc6S50MGICW+c51n6kX5jFpdvxl/2kun/H6FpH5yQpYbqYh5P/DtMS7JteLOHG7sazWxxAY21z
B74E3gh2/sAbgqgaBZiNDrf8SyG3PkNDgXYLg86tZN+NMFCczhW+BVo/AX92WWXVvgTtiOPOb4K0
gZ9lY4wZm8e5uRtWFqy4YPuo0JLtcwEURVbf8sWQnhyx3WM2zhgy75kvZCdbeGyxnc3dYv827K4i
M3KizGsHqjKYpb7MZmF4ZOZvYu7VTepeN+QkUjbcE4gPcMQMAqOpisBf25uWqwNhJx8EsmaIxJLn
Dint9YURjvwyqzEwi/mwS11e6sso+LSsHsxm5ZzFA1msM+e4yOc3qGGje9Hjv8McPjCrtWRvM8pN
0qUxVVQYPV/jb92rItyrvleBOUgxbNwO4G6Fwu3nXSBErBwycYxYf32kxa/98gKiBY94yBte8QZm
LQxNjtLIgCVjqj1q+vGR4GyhrLLqcCx8deaUac0irq3ZMH6YU5pi88lcAcFoN3RHXgiuK2nIuQwY
QjChvglfoZ841FgX0GmG4wrOZJnO9WNjldPRsaWT5R6zkx+Qa8hivV78py3X7gth7ye6hWW74Sbp
rDW531ie6ugPmtAJiLTKUnE0mqaWrZPH7tgpK2O/2KGy7l8jSnQ4Kzf5jwCXroXD9nbfh57nbkmP
d6FsdWrUZUqhHuWCOMmPIRZ9v7MzWUWtFmdyWs2ngqdavjeJVgpre7SNuZMpS8dh5XihAZqtRUBI
3Gpm/VWSpGGzJnGj63Y19LeBIgsUJ7N965pTiFIJLk/jSJ5qaxRllne9VB2niy4x5zlU93EJsvBa
Rf6qSJcBCmyNSLpzwNEx5FD0Y0EKOLqktU6CFXJ3i82zb+47148YQUM31pj1kHJzBh/FpWDfKqXm
tuDg/9dCJOZx/E4oqT62cEEavO8h5lD3pORHQhyAJleZxv3JDay+NAW9uGUzKXgecgpo6wZS1iEc
P0NRmkNEp7cRYBqBOwhwTnbxbl2TQBe/egtRo4iDdFeM03qrPhA4T+CArFwbCCh4BmoR9YIneM3D
zTPJpll6u3rnH12UoSkQR4iKKYRYA5s2FuKXDkd6cPIOYnc3d37U+v8hJdCNGCMEkQ0EKNEoIoHz
5TF3HwtmKEE4IlYWmfvWDtG3wMjXZz56zOd5gHW5xzc0RyXvSKTMiNNShYpGcFTip94I/g1TGQ41
pIVIHgdtQBMGshYF7MejBKMyZwU0cB6YTnDbFNZmX3m4t/NHSzwPFPO3JdyVHTJ5O+pEz4fgoEnf
FU89+1S+2v42P8Wdu7LOGl23Vfdn7xFvOdZ4AHs2AzCk/xiQP0hp/tCPR4R+C8MVtaWUHYkrJDTD
WYx4D10nRKTVOR/g/hIhXbulCD6ZwVPKzt81WqmWmApQhYdXNrRJ1AdxcaCkKzOYKuyN1fCbYlxy
GUrofv7OPz3myRnmwWyzcl68INQAoPvOkYPJugB/98MkdcaG6dD1wuQwMfRZSWpKejqxVXrdM1WF
5mI/y9/+DuA/oqSntFd3Kha7wbpxBXQ15FRsHK407cdxzmwPlwZ2/eszgkKqArOqnRm9W6KujmDG
3mUTX7YjNWwQ0DbUN3YaWAHa51FWzJ93peQyswvci7k8Dyd9h0YwNza5yFO7WjTEGggMHHKhl2K9
snAa/MnQJ02Xj+Ljl2WWQieAfD8mk5IlaA6LjfzJAMqyCva81+d6+VluZyFtzSUgVURqW+CbK9Qd
AGCLnOCkWsTw2NawPUKT7pk7lX77Mnx/anod4gsvck7KzDhuFtwO/ox9nNnrbQ7d68f16rRPIgHE
4055ZZEO4Behqw7jRWgtwUMF1Vp+DUoSZfr5TDK6IkwJwuTAld/fPKDZBBnFGdOucC0hJ/gHGERX
4dYwSINdcQNumf+xGx5vnVlvZUrNTvROsvFt0pth//zAF5mEgAlo8LekDbzQeGnLk5Yyb0QvmWqT
ke++0mKCfE+Oogo6iaGL5ysiZJjAVCiBvc8bjFOoNcyq2KbbAHht/LkrchhGBaYVB/KqTOyuFoxg
20WAts7zOnxOeTWi2ImqVAl8PI6G7HIjpiEdNRh6zIPy3TohbrRpGMJgzg+wmoEQiV+laBCDY642
qER0UZZriiZBdP+pyb2UJ8ly2y5n+YLV1kBsXQAKeeAUCrpbfhxwbTE+ZHMH9PE0hvwnmFBQm3m8
1alrYven9KiaZriZke2YckaHeM6Pvpfs/JnvL8ApeGQwVTkPVYlkaL/2vJkFOXA/h6PdGxqSsjlN
cMrg09lDI5DYiNnmyv3DgqaJc94R2ATN2h9HcCfQhRSJftcvlRGDTEF+MnaQmMv0irAWQEYN0GXR
SXpq7S6KPn0Bg9vA14/R2ALzkEtbfy86S5oMxjP47Wv3E+aX7cOw5j/qh45OghY0XNQbFWz5zMsm
pkkohMCu5iu+bZrUBe5EONQZgI2+V6O6k60oIdYsqQ80otwN5YNTiCLJ+Qb67OrHD69onuXCofE5
v9ETlbjtCg8SsfnwbeuclGt0BLQMr3it1VxMgA9G7PjLkOapi/47H8fed/HCSgRI2aiNph1p+Uvt
v5H3CPIkY0usGHih0f27OzuQYkigi04iRQfRUCcjaGHbWEdLyUw08JxgQorr6WhVYDOLmBfPiiKC
hMTgcQTVdv1zgRIkNvdImBvomIaFiGWQuLY1Q0zmpWEk96HjgP8roinClN74iPue/izoHZ6AU8AE
FcHHgL7GNn/UHOh2ZAbAxB4WRfNrfEGkwPfUkcOHoAO5w9pbSd7pRaQ2b9qLMgk9D/has2FR0IsV
htH8EDc361UZ0q0bc7FR8Dkdt4DBVcDF9OWMxPGRjGJ6ufMPwUgCCtPKTyJi5UgRlvuPsSR4eDaC
kzZuMuZrNa/qn6p86y0mGv73CcuQVWCjGIfu/ba/pBkm+L98ob0mC9299eAPy0lEic//nddfs3Kn
3GMkHM2MWnkSuOcrufD0S2elHFFhH1f7jeueC1bZ3qafOlXEqfTYo1d7VFJsLKbiApNRyGYAzBMY
JycB/0uCHwKHSNFH+iclt25YYQ66bThTfBSu3L0aSp+SdzoX0rvQTsHN0siKNDc/aTBJEB9pJ3sz
FCeC9rBD04AZSd/2qXyohIE64FsCUSMSYTN1eFoBRqWEbtXVPS0Vf56cTnSfqSgfD4oRZ1Z1MlhQ
aoD3ryt1808PE5GA9KTgv0CfzHdELhvWMgacFwexEp9ssw9rYboTmhTzOy4oRTKidOK6l9vnTuBd
WtpJGjYYA3h1J4M0JXIEQbM5UOvFXL9cFVzVXk8iM8nbtXwaN4AN9hQIDDcsLg1QfNubcyMcRmXc
bw8JshnU7h/UwXHIFHI9HmonOZIx4H9kpgf+hrxignPYisER11AouSQNszrB1D/qAPDwjNBlBRsX
QYlbW3yfROSe5MCxwYG9GMv7eIvhJ5DnqzLIHCUspvTHWM6zSUbPjaiVjjX0KTJYWYfY2z3XHM2y
/U2Y/ruzAotAsXZ52gmvN+vhEaKC2NPy0Zs7uEIsc428BdcNTWOh1tsXjLIbS2SSwFDk98amM6Ob
HjBIL/UvxtEy0PfN0Nzd0uxKS1E8LUAQlIYHWfglr6agM94fZeVgZfNHpdXIha510hobTgRVppet
XWKGu8P8hyxjGnbKgdy3e4WB1rN+rS8T0NLsvCyhzH5cfj8JQ/bDt6/69GP2e00d2jT9o6s1etdE
gjaJsdxAZs8os00AbvMO+z7oCugSS68dGRME/a0lP5lIRh9+4FhRd9hWhIc5ZzdbHMDLFH/DnzwN
o5IwZzgwLx6txxVfJSZLrlu8iJdkthuHkSRB5EOh+cCjHNEtVcm+yFrr2EnyHe5Wxd0mIj9fpUjo
i9EeF9CrnfzTV2YRxG9sQeQVTv/OdRraxNfvc0t8YhQ0S0aypg+jFKsq1SB0iSVtYUWoGszYB6QG
BPlWRKA3rYjYvpM5WDIkBooMddLV/TCK40CHMMrMPggTpemSSbHfmvAMtql0SqQvNv6rSoumIw2S
6whlscv4zYW7HGo+fZ2M12YVblJkjUU9Y3CEx/l6xGpg3P/DgZm8urWWqHxjBeiBdxbNmGvWSEfI
e2hocvdXyyi9m++jhSpbygpzqyewRsjOV0T0MwQ7ZsQzauGlsfZ7m1SbHr8BM1Cjg0uFsnUsk0T2
GtSAyMriTKLzVABa2tni
`protect end_protected
| apache-2.0 | dd564eb9468b61519860a7c00e575f50 | 0.943577 | 1.851108 | false | false | false | false |
jc38x/X38-02FO16 | benchmarks/LEKO_LEKU/leku/LEKU-CD'/25_12.vhd | 1 | 324,984 | Library IEEE;
use IEEE.std_logic_1164.all;
entity x25_12x is
Port (
A302,A301,A300,A299,A298,A269,A268,A267,A266,A265,A236,A235,A234,A233,A232,A203,A202,A201,A200,A199,A166,A167,A168,A169,A170: in std_logic;
A75: buffer std_logic
);
end x25_12x;
architecture x25_12x_behav of x25_12x is
signal a1a,a2a,a3a,a4a,a5a,a6a,a7a,a8a,a9a,a10a,a11a,a12a,a13a,a14a,a15a,a16a,a17a,a18a,a19a,a20a,a21a,a22a,a23a,a24a,a25a,a26a,a27a,a28a,a29a,a30a,a31a,a32a,a33a,a34a,a35a,a36a,a37a,a38a,a39a,a40a,a41a,a42a,a43a,a44a,a45a,a46a,a47a,a48a,a49a,a50a,a51a,a52a,a53a,a54a,a55a,a56a,a57a,a58a,a59a,a60a,a61a,a62a,a63a,a64a,a65a,a66a,a67a,a68a,a69a,a70a,a71a,a72a,a73a,a74a,a75a,a76a,a77a,a78a,a79a,a80a,a81a,a82a,a83a,a84a,a85a,a86a,a87a,a88a,a89a,a90a,a91a,a92a,a93a,a94a,a95a,a96a,a97a,a98a,a99a,a100a,a101a,a102a,a103a,a104a,a105a,a106a,a107a,a108a,a109a,a110a,a111a,a112a,a113a,a114a,a115a,a116a,a117a,a118a,a119a,a120a,a121a,a122a,a123a,a124a,a125a,a126a,a127a,a128a,a129a,a130a,a131a,a132a,a133a,a134a,a135a,a136a,a137a,a138a,a139a,a140a,a141a,a142a,a143a,a144a,a145a,a146a,a147a,a148a,a149a,a150a,a151a,a152a,a153a,a154a,a155a,a156a,a157a,a158a,a159a,a160a,a161a,a162a,a163a,a164a,a165a,a166a,a167a,a168a,a169a,a170a,a171a,a172a,a173a,a174a,a175a,a176a,a177a,a178a,a179a,a180a,a181a,a182a,a183a,a184a,a185a,a186a,a187a,a188a,a189a,a190a,a191a,a192a,a193a,a194a,a195a,a196a,a197a,a198a,a199a,a200a,a201a,a202a,a203a,a204a,a205a,a206a,a207a,a208a,a209a,a210a,a211a,a212a,a213a,a214a,a215a,a216a,a217a,a218a,a219a,a220a,a221a,a222a,a223a,a224a,a225a,a226a,a227a,a228a,a229a,a230a,a231a,a232a,a233a,a234a,a235a,a236a,a237a,a238a,a239a,a240a,a241a,a242a,a243a,a244a,a245a,a246a,a247a,a248a,a249a,a250a,a251a,a252a,a253a,a254a,a255a,a256a,a257a,a258a,a259a,a260a,a261a,a262a,a263a,a264a,a265a,a266a,a267a,a268a,a269a,a270a,a271a,a272a,a273a,a274a,a275a,a276a,a277a,a278a,a279a,a280a,a281a,a282a,a283a,a284a,a285a,a286a,a287a,a288a,a289a,a290a,a291a,a292a,a293a,a294a,a295a,a296a,a297a,a298a,a299a,a300a,a301a,a302a,a303a,a304a,a305a,a306a,a307a,a308a,a309a,a310a,a311a,a312a,a313a,a314a,a315a,a316a,a317a,a318a,a319a,a320a,a321a,a322a,a323a,a324a,a325a,a326a,a327a,a328a,a329a,a330a,a331a,a332a,a333a,a334a,a335a,a336a,a337a,a338a,a339a,a340a,a341a,a342a,a343a,a344a,a345a,a346a,a347a,a348a,a349a,a350a,a351a,a352a,a353a,a354a,a355a,a356a,a357a,a358a,a359a,a360a,a361a,a362a,a363a,a364a,a365a,a366a,a367a,a368a,a369a,a370a,a371a,a372a,a373a,a374a,a375a,a376a,a377a,a378a,a379a,a380a,a381a,a382a,a383a,a384a,a385a,a386a,a387a,a388a,a389a,a390a,a391a,a392a,a393a,a394a,a395a,a396a,a397a,a398a,a399a,a400a,a401a,a402a,a403a,a404a,a405a,a406a,a407a,a408a,a409a,a410a,a411a,a412a,a413a,a414a,a415a,a416a,a417a,a418a,a419a,a420a,a421a,a422a,a423a,a424a,a425a,a426a,a427a,a428a,a429a,a430a,a431a,a432a,a433a,a434a,a435a,a436a,a437a,a438a,a439a,a440a,a441a,a442a,a443a,a444a,a445a,a446a,a447a,a448a,a449a,a450a,a451a,a452a,a453a,a454a,a455a,a456a,a457a,a458a,a459a,a460a,a461a,a462a,a463a,a464a,a465a,a466a,a467a,a468a,a469a,a470a,a471a,a472a,a473a,a474a,a475a,a476a,a477a,a478a,a479a,a480a,a481a,a482a,a483a,a484a,a485a,a486a,a487a,a488a,a489a,a490a,a491a,a492a,a493a,a494a,a495a,a496a,a497a,a498a,a499a,a500a,a501a,a502a,a503a,a504a,a505a,a506a,a507a,a508a,a509a,a510a,a511a,a512a,a513a,a514a,a515a,a516a,a517a,a518a,a519a,a520a,a521a,a522a,a523a,a524a,a525a,a526a,a527a,a528a,a529a,a530a,a531a,a532a,a533a,a534a,a535a,a536a,a537a,a538a,a539a,a540a,a541a,a542a,a543a,a544a,a545a,a546a,a547a,a548a,a549a,a550a,a551a,a552a,a553a,a554a,a555a,a556a,a557a,a558a,a559a,a560a,a561a,a562a,a563a,a564a,a565a,a566a,a567a,a568a,a569a,a570a,a571a,a572a,a573a,a574a,a575a,a576a,a577a,a578a,a579a,a580a,a581a,a582a,a583a,a584a,a585a,a586a,a587a,a588a,a589a,a590a,a591a,a592a,a593a,a594a,a595a,a596a,a597a,a598a,a599a,a600a,a601a,a602a,a603a,a604a,a605a,a606a,a607a,a608a,a609a,a610a,a611a,a612a,a613a,a614a,a615a,a616a,a617a,a618a,a619a,a620a,a621a,a622a,a623a,a624a,a625a,a626a,a627a,a628a,a629a,a630a,a631a,a632a,a633a,a634a,a635a,a636a,a637a,a638a,a639a,a640a,a641a,a642a,a643a,a644a,a645a,a646a,a647a,a648a,a649a,a650a,a651a,a652a,a653a,a654a,a655a,a656a,a657a,a658a,a659a,a660a,a661a,a662a,a663a,a664a,a665a,a666a,a667a,a668a,a669a,a670a,a671a,a672a,a673a,a674a,a675a,a676a,a677a,a678a,a679a,a680a,a681a,a682a,a683a,a684a,a685a,a686a,a687a,a688a,a689a,a690a,a691a,a692a,a693a,a694a,a695a,a696a,a697a,a698a,a699a,a700a,a701a,a702a,a703a,a704a,a705a,a706a,a707a,a708a,a709a,a710a,a711a,a712a,a713a,a714a,a715a,a716a,a717a,a718a,a719a,a720a,a721a,a722a,a723a,a724a,a725a,a726a,a727a,a728a,a729a,a730a,a731a,a732a,a733a,a734a,a735a,a736a,a737a,a738a,a739a,a740a,a741a,a742a,a743a,a744a,a745a,a746a,a747a,a748a,a749a,a750a,a751a,a752a,a753a,a754a,a755a,a756a,a757a,a758a,a759a,a760a,a761a,a762a,a763a,a764a,a765a,a768a,a772a,a773a,a774a,a778a,a779a,a783a,a784a,a785a,a786a,a790a,a791a,a795a,a796a,a797a,a801a,a802a,a806a,a807a,a808a,a809a,a810a,a814a,a815a,a819a,a820a,a821a,a825a,a826a,a830a,a831a,a832a,a833a,a837a,a838a,a842a,a843a,a844a,a848a,a849a,a853a,a854a,a855a,a856a,a857a,a858a,a862a,a863a,a867a,a868a,a869a,a873a,a874a,a878a,a879a,a880a,a881a,a885a,a886a,a890a,a891a,a892a,a896a,a897a,a901a,a902a,a903a,a904a,a905a,a909a,a910a,a914a,a915a,a916a,a920a,a921a,a925a,a926a,a927a,a928a,a932a,a933a,a937a,a938a,a939a,a943a,a944a,a948a,a949a,a950a,a951a,a952a,a953a,a954a,a958a,a959a,a963a,a964a,a965a,a969a,a970a,a974a,a975a,a976a,a977a,a981a,a982a,a986a,a987a,a988a,a992a,a993a,a997a,a998a,a999a,a1000a,a1001a,a1005a,a1006a,a1010a,a1011a,a1012a,a1016a,a1017a,a1021a,a1022a,a1023a,a1024a,a1028a,a1029a,a1033a,a1034a,a1035a,a1039a,a1040a,a1044a,a1045a,a1046a,a1047a,a1048a,a1049a,a1053a,a1054a,a1058a,a1059a,a1060a,a1064a,a1065a,a1069a,a1070a,a1071a,a1072a,a1076a,a1077a,a1081a,a1082a,a1083a,a1087a,a1088a,a1092a,a1093a,a1094a,a1095a,a1096a,a1100a,a1101a,a1105a,a1106a,a1107a,a1111a,a1112a,a1116a,a1117a,a1118a,a1119a,a1123a,a1124a,a1128a,a1129a,a1130a,a1134a,a1135a,a1139a,a1140a,a1141a,a1142a,a1143a,a1144a,a1145a,a1146a,a1149a,a1153a,a1154a,a1155a,a1159a,a1160a,a1164a,a1165a,a1166a,a1167a,a1171a,a1172a,a1176a,a1177a,a1178a,a1182a,a1183a,a1187a,a1188a,a1189a,a1190a,a1191a,a1195a,a1196a,a1200a,a1201a,a1202a,a1206a,a1207a,a1211a,a1212a,a1213a,a1214a,a1218a,a1219a,a1223a,a1224a,a1225a,a1229a,a1230a,a1234a,a1235a,a1236a,a1237a,a1238a,a1239a,a1243a,a1244a,a1248a,a1249a,a1250a,a1254a,a1255a,a1259a,a1260a,a1261a,a1262a,a1266a,a1267a,a1271a,a1272a,a1273a,a1277a,a1278a,a1282a,a1283a,a1284a,a1285a,a1286a,a1290a,a1291a,a1295a,a1296a,a1297a,a1301a,a1302a,a1306a,a1307a,a1308a,a1309a,a1313a,a1314a,a1318a,a1319a,a1320a,a1324a,a1325a,a1329a,a1330a,a1331a,a1332a,a1333a,a1334a,a1335a,a1339a,a1340a,a1344a,a1345a,a1346a,a1350a,a1351a,a1355a,a1356a,a1357a,a1358a,a1362a,a1363a,a1367a,a1368a,a1369a,a1373a,a1374a,a1378a,a1379a,a1380a,a1381a,a1382a,a1386a,a1387a,a1391a,a1392a,a1393a,a1397a,a1398a,a1402a,a1403a,a1404a,a1405a,a1409a,a1410a,a1414a,a1415a,a1416a,a1420a,a1421a,a1425a,a1426a,a1427a,a1428a,a1429a,a1430a,a1434a,a1435a,a1439a,a1440a,a1441a,a1445a,a1446a,a1450a,a1451a,a1452a,a1453a,a1457a,a1458a,a1462a,a1463a,a1464a,a1468a,a1469a,a1473a,a1474a,a1475a,a1476a,a1477a,a1481a,a1482a,a1486a,a1487a,a1488a,a1492a,a1493a,a1497a,a1498a,a1499a,a1500a,a1504a,a1505a,a1509a,a1510a,a1511a,a1515a,a1516a,a1520a,a1521a,a1522a,a1523a,a1524a,a1525a,a1526a,a1527a,a1528a,a1531a,a1535a,a1536a,a1537a,a1541a,a1542a,a1546a,a1547a,a1548a,a1549a,a1553a,a1554a,a1558a,a1559a,a1560a,a1564a,a1565a,a1569a,a1570a,a1571a,a1572a,a1573a,a1577a,a1578a,a1582a,a1583a,a1584a,a1588a,a1589a,a1593a,a1594a,a1595a,a1596a,a1600a,a1601a,a1605a,a1606a,a1607a,a1611a,a1612a,a1616a,a1617a,a1618a,a1619a,a1620a,a1621a,a1625a,a1626a,a1630a,a1631a,a1632a,a1636a,a1637a,a1641a,a1642a,a1643a,a1644a,a1648a,a1649a,a1653a,a1654a,a1655a,a1659a,a1660a,a1664a,a1665a,a1666a,a1667a,a1668a,a1672a,a1673a,a1677a,a1678a,a1679a,a1683a,a1684a,a1688a,a1689a,a1690a,a1691a,a1695a,a1696a,a1700a,a1701a,a1702a,a1706a,a1707a,a1711a,a1712a,a1713a,a1714a,a1715a,a1716a,a1717a,a1721a,a1722a,a1726a,a1727a,a1728a,a1732a,a1733a,a1737a,a1738a,a1739a,a1740a,a1744a,a1745a,a1749a,a1750a,a1751a,a1755a,a1756a,a1760a,a1761a,a1762a,a1763a,a1764a,a1768a,a1769a,a1773a,a1774a,a1775a,a1779a,a1780a,a1784a,a1785a,a1786a,a1787a,a1791a,a1792a,a1796a,a1797a,a1798a,a1802a,a1803a,a1807a,a1808a,a1809a,a1810a,a1811a,a1812a,a1816a,a1817a,a1821a,a1822a,a1823a,a1827a,a1828a,a1832a,a1833a,a1834a,a1835a,a1839a,a1840a,a1844a,a1845a,a1846a,a1850a,a1851a,a1855a,a1856a,a1857a,a1858a,a1859a,a1863a,a1864a,a1868a,a1869a,a1870a,a1874a,a1875a,a1879a,a1880a,a1881a,a1882a,a1886a,a1887a,a1891a,a1892a,a1893a,a1897a,a1898a,a1902a,a1903a,a1904a,a1905a,a1906a,a1907a,a1908a,a1909a,a1913a,a1914a,a1918a,a1919a,a1920a,a1924a,a1925a,a1929a,a1930a,a1931a,a1932a,a1936a,a1937a,a1941a,a1942a,a1943a,a1947a,a1948a,a1952a,a1953a,a1954a,a1955a,a1956a,a1960a,a1961a,a1965a,a1966a,a1967a,a1971a,a1972a,a1976a,a1977a,a1978a,a1979a,a1983a,a1984a,a1988a,a1989a,a1990a,a1994a,a1995a,a1999a,a2000a,a2001a,a2002a,a2003a,a2004a,a2008a,a2009a,a2013a,a2014a,a2015a,a2019a,a2020a,a2024a,a2025a,a2026a,a2027a,a2031a,a2032a,a2036a,a2037a,a2038a,a2042a,a2043a,a2047a,a2048a,a2049a,a2050a,a2051a,a2055a,a2056a,a2060a,a2061a,a2062a,a2066a,a2067a,a2071a,a2072a,a2073a,a2074a,a2078a,a2079a,a2083a,a2084a,a2085a,a2089a,a2090a,a2094a,a2095a,a2096a,a2097a,a2098a,a2099a,a2100a,a2104a,a2105a,a2109a,a2110a,a2111a,a2115a,a2116a,a2120a,a2121a,a2122a,a2123a,a2127a,a2128a,a2132a,a2133a,a2134a,a2138a,a2139a,a2143a,a2144a,a2145a,a2146a,a2147a,a2151a,a2152a,a2156a,a2157a,a2158a,a2162a,a2163a,a2167a,a2168a,a2169a,a2170a,a2174a,a2175a,a2179a,a2180a,a2181a,a2185a,a2186a,a2190a,a2191a,a2192a,a2193a,a2194a,a2195a,a2199a,a2200a,a2204a,a2205a,a2206a,a2210a,a2211a,a2215a,a2216a,a2217a,a2218a,a2222a,a2223a,a2227a,a2228a,a2229a,a2233a,a2234a,a2238a,a2239a,a2240a,a2241a,a2242a,a2246a,a2247a,a2251a,a2252a,a2253a,a2257a,a2258a,a2262a,a2263a,a2264a,a2265a,a2269a,a2270a,a2274a,a2275a,a2276a,a2280a,a2281a,a2285a,a2286a,a2287a,a2288a,a2289a,a2290a,a2291a,a2292a,a2293a,a2296a,a2299a,a2302a,a2305a,a2308a,a2312a,a2313a,a2316a,a2320a,a2321a,a2324a,a2328a,a2329a,a2332a,a2336a,a2337a,a2340a,a2344a,a2345a,a2349a,a2350a,a2354a,a2355a,a2359a,a2360a,a2364a,a2365a,a2369a,a2370a,a2374a,a2375a,a2379a,a2380a,a2384a,a2385a,a2389a,a2390a,a2394a,a2395a,a2399a,a2400a,a2404a,a2405a,a2409a,a2410a,a2414a,a2415a,a2419a,a2420a,a2424a,a2425a,a2429a,a2430a,a2434a,a2435a,a2439a,a2440a,a2444a,a2445a,a2449a,a2450a,a2453a,a2456a,a2457a,a2461a,a2462a,a2465a,a2468a,a2469a,a2473a,a2474a,a2477a,a2480a,a2481a,a2485a,a2486a,a2489a,a2492a,a2493a,a2497a,a2498a,a2501a,a2504a,a2505a,a2509a,a2510a,a2513a,a2516a,a2517a,a2521a,a2522a,a2525a,a2528a,a2529a,a2533a,a2534a,a2537a,a2540a,a2541a,a2545a,a2546a,a2549a,a2552a,a2553a,a2557a,a2558a,a2561a,a2564a,a2565a,a2569a,a2570a,a2573a,a2576a,a2577a,a2581a,a2582a,a2585a,a2588a,a2589a,a2593a,a2594a,a2597a,a2600a,a2601a,a2605a,a2606a,a2609a,a2612a,a2613a,a2617a,a2618a,a2621a,a2624a,a2625a,a2629a,a2630a,a2633a,a2636a,a2637a,a2641a,a2642a,a2645a,a2648a,a2649a,a2653a,a2654a,a2657a,a2660a,a2661a,a2665a,a2666a,a2669a,a2672a,a2673a,a2677a,a2678a,a2681a,a2684a,a2685a,a2689a,a2690a,a2693a,a2696a,a2697a,a2701a,a2702a,a2705a,a2708a,a2709a,a2713a,a2714a,a2717a,a2720a,a2721a,a2725a,a2726a,a2729a,a2732a,a2733a,a2737a,a2738a,a2741a,a2744a,a2745a,a2749a,a2750a,a2753a,a2756a,a2757a,a2761a,a2762a,a2765a,a2768a,a2769a,a2773a,a2774a,a2777a,a2780a,a2781a,a2784a,a2787a,a2788a,a2791a,a2794a,a2795a,a2798a,a2801a,a2802a,a2805a,a2808a,a2809a,a2812a,a2815a,a2816a,a2819a,a2822a,a2823a,a2826a,a2829a,a2830a,a2833a,a2836a,a2837a,a2840a,a2843a,a2844a,a2847a,a2850a,a2851a,a2854a,a2857a,a2858a,a2861a,a2864a,a2865a,a2868a,a2871a,a2872a,a2875a,a2878a,a2879a,a2882a,a2885a,a2886a,a2889a,a2892a,a2893a,a2896a,a2899a,a2900a,a2903a,a2906a,a2907a,a2910a,a2913a,a2914a,a2917a,a2920a,a2921a,a2924a,a2927a,a2928a,a2931a,a2934a,a2935a,a2938a,a2941a,a2942a,a2945a,a2948a,a2949a,a2952a,a2955a,a2956a,a2959a,a2962a,a2963a,a2966a,a2969a,a2970a,a2973a,a2976a,a2977a,a2980a,a2983a,a2984a,a2987a,a2990a,a2991a,a2994a,a2997a,a2998a,a3001a,a3004a,a3005a,a3008a,a3011a,a3012a,a3015a,a3018a,a3019a,a3022a,a3025a,a3026a,a3029a,a3032a,a3033a,a3036a,a3039a,a3040a,a3043a,a3046a,a3047a,a3050a,a3053a,a3054a,a3057a,a3060a,a3061a,a3064a,a3067a,a3068a,a3071a,a3074a,a3075a,a3078a,a3081a,a3082a,a3085a,a3088a,a3089a,a3092a,a3095a,a3096a,a3099a,a3102a,a3103a,a3106a,a3109a,a3110a,a3113a,a3116a,a3117a,a3120a,a3123a,a3124a,a3127a,a3130a,a3131a,a3134a,a3137a,a3138a,a3141a,a3144a,a3145a,a3148a,a3151a,a3152a,a3155a,a3158a,a3159a,a3162a,a3165a,a3166a,a3169a,a3172a,a3173a,a3176a,a3179a,a3180a,a3183a,a3186a,a3187a,a3190a,a3193a,a3194a,a3197a,a3200a,a3201a,a3204a,a3207a,a3208a,a3211a,a3214a,a3215a,a3218a,a3221a,a3222a,a3225a,a3228a,a3229a,a3232a,a3235a,a3236a,a3239a,a3242a,a3243a,a3246a,a3249a,a3250a,a3253a,a3256a,a3257a,a3260a,a3263a,a3264a,a3267a,a3270a,a3271a,a3274a,a3277a,a3278a,a3281a,a3284a,a3285a,a3288a,a3291a,a3292a,a3295a,a3298a,a3299a,a3302a,a3305a,a3306a,a3309a,a3312a,a3313a,a3316a,a3319a,a3320a,a3323a,a3326a,a3327a,a3330a,a3333a,a3334a,a3337a,a3340a,a3341a,a3344a,a3347a,a3348a,a3351a,a3354a,a3355a,a3358a,a3361a,a3362a,a3365a,a3368a,a3369a,a3372a,a3375a,a3376a,a3379a,a3382a,a3383a,a3386a,a3389a,a3390a,a3393a,a3396a,a3397a,a3400a,a3403a,a3404a,a3407a,a3410a,a3411a,a3414a,a3417a,a3418a,a3421a,a3424a,a3425a,a3428a,a3431a,a3432a,a3435a,a3438a,a3439a,a3442a,a3445a,a3446a,a3449a,a3452a,a3453a,a3456a,a3459a,a3460a,a3463a,a3466a,a3467a,a3470a,a3473a,a3474a,a3477a,a3480a,a3481a,a3484a,a3487a,a3488a,a3491a,a3494a,a3495a,a3498a,a3501a,a3502a,a3505a,a3508a,a3509a,a3512a,a3515a,a3516a,a3519a,a3522a,a3523a,a3526a,a3529a,a3530a,a3533a,a3536a,a3537a,a3540a,a3543a,a3544a,a3547a,a3550a,a3551a,a3554a,a3557a,a3558a,a3561a,a3564a,a3565a,a3568a,a3571a,a3572a,a3575a,a3578a,a3579a,a3582a,a3585a,a3586a,a3589a,a3592a,a3593a,a3596a,a3599a,a3600a,a3603a,a3606a,a3607a,a3610a,a3613a,a3614a,a3617a,a3620a,a3621a,a3624a,a3627a,a3628a,a3631a,a3634a,a3635a,a3638a,a3641a,a3642a,a3645a,a3648a,a3649a,a3652a,a3655a,a3656a,a3659a,a3662a,a3663a,a3666a,a3669a,a3670a,a3673a,a3676a,a3677a,a3680a,a3683a,a3684a,a3687a,a3690a,a3691a,a3694a,a3697a,a3698a,a3701a,a3704a,a3705a,a3708a,a3711a,a3712a,a3715a,a3718a,a3719a,a3722a,a3725a,a3726a,a3729a,a3732a,a3733a,a3736a,a3739a,a3740a,a3743a,a3746a,a3747a,a3750a,a3753a,a3754a,a3757a,a3760a,a3761a,a3764a,a3767a,a3768a,a3771a,a3774a,a3775a,a3778a,a3781a,a3782a,a3785a,a3788a,a3789a,a3792a,a3795a,a3796a,a3799a,a3802a,a3803a,a3806a,a3809a,a3810a,a3813a,a3816a,a3817a,a3820a,a3823a,a3824a,a3827a,a3830a,a3831a,a3834a,a3837a,a3838a,a3841a,a3844a,a3845a,a3848a,a3851a,a3852a,a3855a,a3858a,a3859a,a3862a,a3865a,a3866a,a3869a,a3872a,a3873a,a3876a,a3879a,a3880a,a3883a,a3886a,a3887a,a3890a,a3893a,a3894a,a3897a,a3900a,a3901a,a3904a,a3907a,a3908a,a3911a,a3914a,a3915a,a3918a,a3921a,a3922a,a3925a,a3928a,a3929a,a3932a,a3935a,a3936a,a3939a,a3942a,a3943a,a3946a,a3949a,a3950a,a3953a,a3956a,a3957a,a3960a,a3963a,a3964a,a3967a,a3971a,a3972a,a3973a,a3976a,a3979a,a3980a,a3983a,a3987a,a3988a,a3989a,a3992a,a3995a,a3996a,a3999a,a4003a,a4004a,a4005a,a4008a,a4011a,a4012a,a4015a,a4019a,a4020a,a4021a,a4024a,a4027a,a4028a,a4031a,a4035a,a4036a,a4037a,a4040a,a4043a,a4044a,a4047a,a4051a,a4052a,a4053a,a4056a,a4059a,a4060a,a4063a,a4067a,a4068a,a4069a,a4072a,a4075a,a4076a,a4079a,a4083a,a4084a,a4085a,a4088a,a4091a,a4092a,a4095a,a4099a,a4100a,a4101a,a4104a,a4107a,a4108a,a4111a,a4115a,a4116a,a4117a,a4120a,a4123a,a4124a,a4127a,a4131a,a4132a,a4133a,a4136a,a4139a,a4140a,a4143a,a4147a,a4148a,a4149a,a4152a,a4155a,a4156a,a4159a,a4163a,a4164a,a4165a,a4168a,a4171a,a4172a,a4175a,a4179a,a4180a,a4181a,a4184a,a4187a,a4188a,a4191a,a4195a,a4196a,a4197a,a4200a,a4203a,a4204a,a4207a,a4211a,a4212a,a4213a,a4216a,a4219a,a4220a,a4223a,a4227a,a4228a,a4229a,a4232a,a4235a,a4236a,a4239a,a4243a,a4244a,a4245a,a4248a,a4251a,a4252a,a4255a,a4259a,a4260a,a4261a,a4264a,a4267a,a4268a,a4271a,a4275a,a4276a,a4277a,a4280a,a4283a,a4284a,a4287a,a4291a,a4292a,a4293a,a4296a,a4299a,a4300a,a4303a,a4307a,a4308a,a4309a,a4312a,a4315a,a4316a,a4319a,a4323a,a4324a,a4325a,a4328a,a4331a,a4332a,a4335a,a4339a,a4340a,a4341a,a4344a,a4347a,a4348a,a4351a,a4355a,a4356a,a4357a,a4360a,a4363a,a4364a,a4367a,a4371a,a4372a,a4373a,a4376a,a4379a,a4380a,a4383a,a4387a,a4388a,a4389a,a4392a,a4395a,a4396a,a4399a,a4403a,a4404a,a4405a,a4408a,a4411a,a4412a,a4415a,a4419a,a4420a,a4421a,a4424a,a4427a,a4428a,a4431a,a4435a,a4436a,a4437a,a4440a,a4443a,a4444a,a4447a,a4451a,a4452a,a4453a,a4456a,a4459a,a4460a,a4463a,a4467a,a4468a,a4469a,a4472a,a4475a,a4476a,a4479a,a4483a,a4484a,a4485a,a4488a,a4491a,a4492a,a4495a,a4499a,a4500a,a4501a,a4504a,a4507a,a4508a,a4511a,a4515a,a4516a,a4517a,a4520a,a4523a,a4524a,a4527a,a4531a,a4532a,a4533a,a4536a,a4539a,a4540a,a4543a,a4547a,a4548a,a4549a,a4552a,a4555a,a4556a,a4559a,a4563a,a4564a,a4565a,a4568a,a4571a,a4572a,a4575a,a4579a,a4580a,a4581a,a4584a,a4587a,a4588a,a4591a,a4595a,a4596a,a4597a,a4600a,a4603a,a4604a,a4607a,a4611a,a4612a,a4613a,a4616a,a4619a,a4620a,a4623a,a4627a,a4628a,a4629a,a4632a,a4635a,a4636a,a4639a,a4643a,a4644a,a4645a,a4648a,a4651a,a4652a,a4655a,a4659a,a4660a,a4661a,a4664a,a4667a,a4668a,a4671a,a4675a,a4676a,a4677a,a4680a,a4683a,a4684a,a4687a,a4691a,a4692a,a4693a,a4696a,a4699a,a4700a,a4703a,a4707a,a4708a,a4709a,a4712a,a4715a,a4716a,a4719a,a4723a,a4724a,a4725a,a4728a,a4731a,a4732a,a4735a,a4739a,a4740a,a4741a,a4744a,a4747a,a4748a,a4751a,a4755a,a4756a,a4757a,a4760a,a4763a,a4764a,a4767a,a4771a,a4772a,a4773a,a4776a,a4779a,a4780a,a4783a,a4787a,a4788a,a4789a,a4792a,a4795a,a4796a,a4799a,a4803a,a4804a,a4805a,a4808a,a4811a,a4812a,a4815a,a4819a,a4820a,a4821a,a4824a,a4827a,a4828a,a4831a,a4835a,a4836a,a4837a,a4840a,a4843a,a4844a,a4847a,a4851a,a4852a,a4853a,a4856a,a4859a,a4860a,a4863a,a4867a,a4868a,a4869a,a4872a,a4875a,a4876a,a4879a,a4883a,a4884a,a4885a,a4888a,a4891a,a4892a,a4895a,a4899a,a4900a,a4901a,a4904a,a4907a,a4908a,a4911a,a4915a,a4916a,a4917a,a4920a,a4923a,a4924a,a4927a,a4931a,a4932a,a4933a,a4936a,a4939a,a4940a,a4943a,a4947a,a4948a,a4949a,a4952a,a4955a,a4956a,a4959a,a4963a,a4964a,a4965a,a4968a,a4971a,a4972a,a4975a,a4979a,a4980a,a4981a,a4984a,a4987a,a4988a,a4991a,a4995a,a4996a,a4997a,a5000a,a5003a,a5004a,a5007a,a5011a,a5012a,a5013a,a5016a,a5019a,a5020a,a5023a,a5027a,a5028a,a5029a,a5032a,a5035a,a5036a,a5039a,a5043a,a5044a,a5045a,a5048a,a5051a,a5052a,a5055a,a5059a,a5060a,a5061a,a5064a,a5067a,a5068a,a5071a,a5075a,a5076a,a5077a,a5080a,a5083a,a5084a,a5087a,a5091a,a5092a,a5093a,a5096a,a5099a,a5100a,a5103a,a5107a,a5108a,a5109a,a5112a,a5115a,a5116a,a5119a,a5123a,a5124a,a5125a,a5128a,a5131a,a5132a,a5135a,a5139a,a5140a,a5141a,a5144a,a5147a,a5148a,a5151a,a5155a,a5156a,a5157a,a5160a,a5163a,a5164a,a5167a,a5171a,a5172a,a5173a,a5176a,a5179a,a5180a,a5183a,a5187a,a5188a,a5189a,a5192a,a5195a,a5196a,a5199a,a5203a,a5204a,a5205a,a5208a,a5211a,a5212a,a5215a,a5219a,a5220a,a5221a,a5224a,a5227a,a5228a,a5231a,a5235a,a5236a,a5237a,a5240a,a5243a,a5244a,a5247a,a5251a,a5252a,a5253a,a5256a,a5259a,a5260a,a5263a,a5267a,a5268a,a5269a,a5272a,a5275a,a5276a,a5279a,a5283a,a5284a,a5285a,a5288a,a5291a,a5292a,a5295a,a5299a,a5300a,a5301a,a5304a,a5307a,a5308a,a5311a,a5315a,a5316a,a5317a,a5320a,a5323a,a5324a,a5327a,a5331a,a5332a,a5333a,a5336a,a5339a,a5340a,a5343a,a5347a,a5348a,a5349a,a5352a,a5355a,a5356a,a5359a,a5363a,a5364a,a5365a,a5368a,a5371a,a5372a,a5375a,a5379a,a5380a,a5381a,a5384a,a5387a,a5388a,a5391a,a5395a,a5396a,a5397a,a5400a,a5403a,a5404a,a5407a,a5411a,a5412a,a5413a,a5416a,a5419a,a5420a,a5423a,a5427a,a5428a,a5429a,a5432a,a5435a,a5436a,a5439a,a5443a,a5444a,a5445a,a5448a,a5451a,a5452a,a5455a,a5459a,a5460a,a5461a,a5464a,a5467a,a5468a,a5471a,a5475a,a5476a,a5477a,a5480a,a5483a,a5484a,a5487a,a5491a,a5492a,a5493a,a5496a,a5499a,a5500a,a5503a,a5507a,a5508a,a5509a,a5512a,a5515a,a5516a,a5519a,a5523a,a5524a,a5525a,a5528a,a5531a,a5532a,a5535a,a5539a,a5540a,a5541a,a5544a,a5547a,a5548a,a5551a,a5555a,a5556a,a5557a,a5560a,a5563a,a5564a,a5567a,a5571a,a5572a,a5573a,a5576a,a5579a,a5580a,a5583a,a5587a,a5588a,a5589a,a5592a,a5595a,a5596a,a5599a,a5603a,a5604a,a5605a,a5608a,a5611a,a5612a,a5615a,a5619a,a5620a,a5621a,a5624a,a5627a,a5628a,a5631a,a5635a,a5636a,a5637a,a5640a,a5643a,a5644a,a5647a,a5651a,a5652a,a5653a,a5656a,a5659a,a5660a,a5663a,a5667a,a5668a,a5669a,a5672a,a5675a,a5676a,a5679a,a5683a,a5684a,a5685a,a5688a,a5691a,a5692a,a5695a,a5699a,a5700a,a5701a,a5704a,a5707a,a5708a,a5711a,a5715a,a5716a,a5717a,a5720a,a5723a,a5724a,a5727a,a5731a,a5732a,a5733a,a5736a,a5739a,a5740a,a5743a,a5747a,a5748a,a5749a,a5752a,a5755a,a5756a,a5759a,a5763a,a5764a,a5765a,a5768a,a5771a,a5772a,a5775a,a5779a,a5780a,a5781a,a5784a,a5787a,a5788a,a5791a,a5795a,a5796a,a5797a,a5800a,a5803a,a5804a,a5807a,a5811a,a5812a,a5813a,a5816a,a5819a,a5820a,a5823a,a5827a,a5828a,a5829a,a5832a,a5835a,a5836a,a5839a,a5843a,a5844a,a5845a,a5848a,a5851a,a5852a,a5855a,a5859a,a5860a,a5861a,a5864a,a5867a,a5868a,a5871a,a5875a,a5876a,a5877a,a5880a,a5883a,a5884a,a5887a,a5891a,a5892a,a5893a,a5896a,a5899a,a5900a,a5903a,a5907a,a5908a,a5909a,a5912a,a5915a,a5916a,a5919a,a5923a,a5924a,a5925a,a5928a,a5931a,a5932a,a5935a,a5939a,a5940a,a5941a,a5944a,a5947a,a5948a,a5951a,a5955a,a5956a,a5957a,a5960a,a5963a,a5964a,a5967a,a5971a,a5972a,a5973a,a5976a,a5979a,a5980a,a5983a,a5987a,a5988a,a5989a,a5992a,a5995a,a5996a,a5999a,a6003a,a6004a,a6005a,a6008a,a6011a,a6012a,a6015a,a6019a,a6020a,a6021a,a6024a,a6027a,a6028a,a6031a,a6035a,a6036a,a6037a,a6040a,a6043a,a6044a,a6047a,a6051a,a6052a,a6053a,a6056a,a6059a,a6060a,a6063a,a6067a,a6068a,a6069a,a6072a,a6075a,a6076a,a6079a,a6083a,a6084a,a6085a,a6088a,a6091a,a6092a,a6095a,a6099a,a6100a,a6101a,a6104a,a6107a,a6108a,a6111a,a6115a,a6116a,a6117a,a6120a,a6123a,a6124a,a6127a,a6131a,a6132a,a6133a,a6136a,a6139a,a6140a,a6143a,a6147a,a6148a,a6149a,a6152a,a6155a,a6156a,a6159a,a6163a,a6164a,a6165a,a6168a,a6171a,a6172a,a6175a,a6179a,a6180a,a6181a,a6184a,a6187a,a6188a,a6191a,a6195a,a6196a,a6197a,a6200a,a6203a,a6204a,a6207a,a6211a,a6212a,a6213a,a6216a,a6219a,a6220a,a6223a,a6227a,a6228a,a6229a,a6232a,a6235a,a6236a,a6239a,a6243a,a6244a,a6245a,a6248a,a6251a,a6252a,a6255a,a6259a,a6260a,a6261a,a6264a,a6267a,a6268a,a6271a,a6275a,a6276a,a6277a,a6280a,a6283a,a6284a,a6287a,a6291a,a6292a,a6293a,a6296a,a6299a,a6300a,a6303a,a6307a,a6308a,a6309a,a6312a,a6315a,a6316a,a6319a,a6323a,a6324a,a6325a,a6328a,a6331a,a6332a,a6335a,a6339a,a6340a,a6341a,a6344a,a6347a,a6348a,a6351a,a6355a,a6356a,a6357a,a6360a,a6363a,a6364a,a6367a,a6371a,a6372a,a6373a,a6376a,a6379a,a6380a,a6383a,a6387a,a6388a,a6389a,a6392a,a6395a,a6396a,a6399a,a6403a,a6404a,a6405a,a6408a,a6411a,a6412a,a6415a,a6419a,a6420a,a6421a,a6424a,a6427a,a6428a,a6431a,a6435a,a6436a,a6437a,a6440a,a6443a,a6444a,a6447a,a6451a,a6452a,a6453a,a6456a,a6459a,a6460a,a6463a,a6467a,a6468a,a6469a,a6472a,a6475a,a6476a,a6479a,a6483a,a6484a,a6485a,a6488a,a6491a,a6492a,a6495a,a6499a,a6500a,a6501a,a6504a,a6507a,a6508a,a6511a,a6515a,a6516a,a6517a,a6520a,a6523a,a6524a,a6527a,a6531a,a6532a,a6533a,a6536a,a6539a,a6540a,a6543a,a6547a,a6548a,a6549a,a6552a,a6555a,a6556a,a6559a,a6563a,a6564a,a6565a,a6568a,a6571a,a6572a,a6575a,a6579a,a6580a,a6581a,a6584a,a6588a,a6589a,a6590a,a6593a,a6597a,a6598a,a6599a,a6602a,a6606a,a6607a,a6608a,a6611a,a6615a,a6616a,a6617a,a6620a,a6624a,a6625a,a6626a,a6629a,a6633a,a6634a,a6635a,a6638a,a6642a,a6643a,a6644a,a6647a,a6651a,a6652a,a6653a,a6656a,a6660a,a6661a,a6662a,a6665a,a6669a,a6670a,a6671a,a6674a,a6678a,a6679a,a6680a,a6683a,a6687a,a6688a,a6689a,a6692a,a6696a,a6697a,a6698a,a6701a,a6705a,a6706a,a6707a,a6710a,a6714a,a6715a,a6716a,a6719a,a6723a,a6724a,a6725a,a6728a,a6732a,a6733a,a6734a,a6737a,a6741a,a6742a,a6743a,a6746a,a6750a,a6751a,a6752a,a6755a,a6759a,a6760a,a6761a,a6764a,a6768a,a6769a,a6770a,a6773a,a6777a,a6778a,a6779a,a6782a,a6786a,a6787a,a6788a,a6791a,a6795a,a6796a,a6797a,a6800a,a6804a,a6805a,a6806a,a6809a,a6813a,a6814a,a6815a,a6818a,a6822a,a6823a,a6824a,a6827a,a6831a,a6832a,a6833a,a6836a,a6840a,a6841a,a6842a,a6845a,a6849a,a6850a,a6851a,a6854a,a6858a,a6859a,a6860a,a6863a,a6867a,a6868a,a6869a,a6872a,a6876a,a6877a,a6878a,a6881a,a6885a,a6886a,a6887a,a6890a,a6894a,a6895a,a6896a,a6899a,a6903a,a6904a,a6905a,a6908a,a6912a,a6913a,a6914a,a6917a,a6921a,a6922a,a6923a,a6926a,a6930a,a6931a,a6932a,a6935a,a6939a,a6940a,a6941a,a6944a,a6948a,a6949a,a6950a,a6953a,a6957a,a6958a,a6959a,a6962a,a6966a,a6967a,a6968a,a6971a,a6975a,a6976a,a6977a,a6980a,a6984a,a6985a,a6986a,a6989a,a6993a,a6994a,a6995a,a6998a,a7002a,a7003a,a7004a,a7007a,a7011a,a7012a,a7013a,a7016a,a7020a,a7021a,a7022a,a7025a,a7029a,a7030a,a7031a,a7034a,a7038a,a7039a,a7040a,a7043a,a7047a,a7048a,a7049a,a7052a,a7056a,a7057a,a7058a,a7061a,a7065a,a7066a,a7067a,a7070a,a7074a,a7075a,a7076a,a7079a,a7083a,a7084a,a7085a,a7088a,a7092a,a7093a,a7094a,a7097a,a7101a,a7102a,a7103a,a7106a,a7110a,a7111a,a7112a,a7115a,a7119a,a7120a,a7121a,a7124a,a7128a,a7129a,a7130a,a7133a,a7137a,a7138a,a7139a,a7142a,a7146a,a7147a,a7148a,a7151a,a7155a,a7156a,a7157a,a7160a,a7164a,a7165a,a7166a,a7169a,a7173a,a7174a,a7175a,a7178a,a7182a,a7183a,a7184a,a7187a,a7191a,a7192a,a7193a,a7196a,a7200a,a7201a,a7202a,a7205a,a7209a,a7210a,a7211a,a7214a,a7218a,a7219a,a7220a,a7223a,a7227a,a7228a,a7229a,a7232a,a7236a,a7237a,a7238a,a7241a,a7245a,a7246a,a7247a,a7250a,a7254a,a7255a,a7256a,a7259a,a7263a,a7264a,a7265a,a7268a,a7272a,a7273a,a7274a,a7277a,a7281a,a7282a,a7283a,a7286a,a7290a,a7291a,a7292a,a7295a,a7299a,a7300a,a7301a,a7304a,a7308a,a7309a,a7310a,a7313a,a7317a,a7318a,a7319a,a7322a,a7326a,a7327a,a7328a,a7331a,a7335a,a7336a,a7337a,a7340a,a7344a,a7345a,a7346a,a7349a,a7353a,a7354a,a7355a,a7358a,a7362a,a7363a,a7364a,a7367a,a7371a,a7372a,a7373a,a7376a,a7380a,a7381a,a7382a,a7385a,a7389a,a7390a,a7391a,a7394a,a7398a,a7399a,a7400a,a7403a,a7407a,a7408a,a7409a,a7412a,a7416a,a7417a,a7418a,a7421a,a7425a,a7426a,a7427a,a7430a,a7434a,a7435a,a7436a,a7439a,a7443a,a7444a,a7445a,a7448a,a7452a,a7453a,a7454a,a7457a,a7461a,a7462a,a7463a,a7466a,a7470a,a7471a,a7472a,a7475a,a7479a,a7480a,a7481a,a7484a,a7488a,a7489a,a7490a,a7493a,a7497a,a7498a,a7499a,a7502a,a7506a,a7507a,a7508a,a7511a,a7515a,a7516a,a7517a,a7520a,a7524a,a7525a,a7526a,a7529a,a7533a,a7534a,a7535a,a7538a,a7542a,a7543a,a7544a,a7547a,a7551a,a7552a,a7553a,a7556a,a7560a,a7561a,a7562a,a7565a,a7569a,a7570a,a7571a,a7574a,a7578a,a7579a,a7580a,a7583a,a7587a,a7588a,a7589a,a7592a,a7596a,a7597a,a7598a,a7601a,a7605a,a7606a,a7607a,a7610a,a7614a,a7615a,a7616a,a7619a,a7623a,a7624a,a7625a,a7628a,a7632a,a7633a,a7634a,a7637a,a7641a,a7642a,a7643a,a7646a,a7650a,a7651a,a7652a,a7655a,a7659a,a7660a,a7661a,a7664a,a7668a,a7669a,a7670a,a7673a,a7677a,a7678a,a7679a,a7682a,a7686a,a7687a,a7688a,a7691a,a7695a,a7696a,a7697a,a7700a,a7704a,a7705a,a7706a,a7709a,a7713a,a7714a,a7715a,a7718a,a7722a,a7723a,a7724a,a7727a,a7731a,a7732a,a7733a,a7736a,a7740a,a7741a,a7742a,a7745a,a7749a,a7750a,a7751a,a7754a,a7758a,a7759a,a7760a,a7763a,a7767a,a7768a,a7769a,a7772a,a7776a,a7777a,a7778a,a7781a,a7785a,a7786a,a7787a,a7790a,a7794a,a7795a,a7796a,a7799a,a7803a,a7804a,a7805a,a7808a,a7812a,a7813a,a7814a,a7817a,a7821a,a7822a,a7823a,a7826a,a7830a,a7831a,a7832a,a7835a,a7839a,a7840a,a7841a,a7844a,a7848a,a7849a,a7850a,a7853a,a7857a,a7858a,a7859a,a7862a,a7866a,a7867a,a7868a,a7871a,a7875a,a7876a,a7877a,a7880a,a7884a,a7885a,a7886a,a7889a,a7893a,a7894a,a7895a,a7898a,a7902a,a7903a,a7904a,a7907a,a7911a,a7912a,a7913a,a7916a,a7920a,a7921a,a7922a,a7925a,a7929a,a7930a,a7931a,a7934a,a7938a,a7939a,a7940a,a7943a,a7947a,a7948a,a7949a,a7952a,a7956a,a7957a,a7958a,a7961a,a7965a,a7966a,a7967a,a7970a,a7974a,a7975a,a7976a,a7979a,a7983a,a7984a,a7985a,a7988a,a7992a,a7993a,a7994a,a7997a,a8001a,a8002a,a8003a,a8006a,a8010a,a8011a,a8012a,a8015a,a8019a,a8020a,a8021a,a8024a,a8028a,a8029a,a8030a,a8033a,a8037a,a8038a,a8039a,a8042a,a8046a,a8047a,a8048a,a8051a,a8055a,a8056a,a8057a,a8060a,a8064a,a8065a,a8066a,a8069a,a8073a,a8074a,a8075a,a8078a,a8082a,a8083a,a8084a,a8087a,a8091a,a8092a,a8093a,a8096a,a8100a,a8101a,a8102a,a8105a,a8109a,a8110a,a8111a,a8114a,a8118a,a8119a,a8120a,a8123a,a8127a,a8128a,a8129a,a8132a,a8136a,a8137a,a8138a,a8141a,a8145a,a8146a,a8147a,a8150a,a8154a,a8155a,a8156a,a8159a,a8163a,a8164a,a8165a,a8168a,a8172a,a8173a,a8174a,a8177a,a8181a,a8182a,a8183a,a8186a,a8190a,a8191a,a8192a,a8195a,a8199a,a8200a,a8201a,a8204a,a8208a,a8209a,a8210a,a8213a,a8217a,a8218a,a8219a,a8222a,a8226a,a8227a,a8228a,a8231a,a8235a,a8236a,a8237a,a8240a,a8244a,a8245a,a8246a,a8249a,a8253a,a8254a,a8255a,a8258a,a8262a,a8263a,a8264a,a8267a,a8271a,a8272a,a8273a,a8276a,a8280a,a8281a,a8282a,a8285a,a8289a,a8290a,a8291a,a8294a,a8298a,a8299a,a8300a,a8303a,a8307a,a8308a,a8309a,a8312a,a8316a,a8317a,a8318a,a8321a,a8325a,a8326a,a8327a,a8330a,a8334a,a8335a,a8336a,a8339a,a8343a,a8344a,a8345a,a8348a,a8352a,a8353a,a8354a,a8357a,a8361a,a8362a,a8363a,a8366a,a8370a,a8371a,a8372a,a8375a,a8379a,a8380a,a8381a,a8384a,a8388a,a8389a,a8390a,a8393a,a8397a,a8398a,a8399a,a8402a,a8406a,a8407a,a8408a,a8411a,a8415a,a8416a,a8417a,a8420a,a8424a,a8425a,a8426a,a8429a,a8433a,a8434a,a8435a,a8438a,a8442a,a8443a,a8444a,a8447a,a8451a,a8452a,a8453a,a8456a,a8460a,a8461a,a8462a,a8465a,a8469a,a8470a,a8471a,a8474a,a8478a,a8479a,a8480a,a8483a,a8487a,a8488a,a8489a,a8492a,a8496a,a8497a,a8498a,a8501a,a8505a,a8506a,a8507a,a8510a,a8514a,a8515a,a8516a,a8519a,a8523a,a8524a,a8525a,a8528a,a8532a,a8533a,a8534a,a8537a,a8541a,a8542a,a8543a,a8546a,a8550a,a8551a,a8552a,a8555a,a8559a,a8560a,a8561a,a8564a,a8568a,a8569a,a8570a,a8573a,a8577a,a8578a,a8579a,a8582a,a8586a,a8587a,a8588a,a8591a,a8595a,a8596a,a8597a,a8600a,a8604a,a8605a,a8606a,a8609a,a8613a,a8614a,a8615a,a8618a,a8622a,a8623a,a8624a,a8627a,a8631a,a8632a,a8633a,a8636a,a8640a,a8641a,a8642a,a8645a,a8649a,a8650a,a8651a,a8654a,a8658a,a8659a,a8660a,a8663a,a8667a,a8668a,a8669a,a8672a,a8676a,a8677a,a8678a,a8681a,a8685a,a8686a,a8687a,a8690a,a8694a,a8695a,a8696a,a8699a,a8703a,a8704a,a8705a,a8708a,a8712a,a8713a,a8714a,a8717a,a8721a,a8722a,a8723a,a8726a,a8730a,a8731a,a8732a,a8735a,a8739a,a8740a,a8741a,a8744a,a8748a,a8749a,a8750a,a8753a,a8757a,a8758a,a8759a,a8762a,a8766a,a8767a,a8768a,a8771a,a8775a,a8776a,a8777a,a8780a,a8784a,a8785a,a8786a,a8789a,a8793a,a8794a,a8795a,a8798a,a8802a,a8803a,a8804a,a8807a,a8811a,a8812a,a8813a,a8816a,a8820a,a8821a,a8822a,a8825a,a8829a,a8830a,a8831a,a8834a,a8838a,a8839a,a8840a,a8843a,a8847a,a8848a,a8849a,a8852a,a8856a,a8857a,a8858a,a8861a,a8865a,a8866a,a8867a,a8870a,a8874a,a8875a,a8876a,a8879a,a8883a,a8884a,a8885a,a8888a,a8892a,a8893a,a8894a,a8897a,a8901a,a8902a,a8903a,a8906a,a8910a,a8911a,a8912a,a8915a,a8919a,a8920a,a8921a,a8924a,a8928a,a8929a,a8930a,a8933a,a8937a,a8938a,a8939a,a8942a,a8946a,a8947a,a8948a,a8951a,a8955a,a8956a,a8957a,a8960a,a8964a,a8965a,a8966a,a8969a,a8973a,a8974a,a8975a,a8978a,a8982a,a8983a,a8984a,a8987a,a8991a,a8992a,a8993a,a8996a,a9000a,a9001a,a9002a,a9005a,a9009a,a9010a,a9011a,a9014a,a9018a,a9019a,a9020a,a9023a,a9027a,a9028a,a9029a,a9032a,a9036a,a9037a,a9038a,a9041a,a9045a,a9046a,a9047a,a9050a,a9054a,a9055a,a9056a,a9059a,a9063a,a9064a,a9065a,a9068a,a9072a,a9073a,a9074a,a9077a,a9081a,a9082a,a9083a,a9086a,a9090a,a9091a,a9092a,a9095a,a9099a,a9100a,a9101a,a9104a,a9108a,a9109a,a9110a,a9113a,a9117a,a9118a,a9119a,a9122a,a9126a,a9127a,a9128a,a9131a,a9135a,a9136a,a9137a,a9140a,a9144a,a9145a,a9146a,a9149a,a9153a,a9154a,a9155a,a9158a,a9162a,a9163a,a9164a,a9167a,a9171a,a9172a,a9173a,a9176a,a9180a,a9181a,a9182a,a9185a,a9189a,a9190a,a9191a,a9194a,a9198a,a9199a,a9200a,a9203a,a9207a,a9208a,a9209a,a9212a,a9216a,a9217a,a9218a,a9221a,a9225a,a9226a,a9227a,a9230a,a9234a,a9235a,a9236a,a9239a,a9243a,a9244a,a9245a,a9248a,a9252a,a9253a,a9254a,a9257a,a9261a,a9262a,a9263a,a9266a,a9270a,a9271a,a9272a,a9275a,a9279a,a9280a,a9281a,a9284a,a9288a,a9289a,a9290a,a9293a,a9297a,a9298a,a9299a,a9302a,a9306a,a9307a,a9308a,a9311a,a9315a,a9316a,a9317a,a9320a,a9324a,a9325a,a9326a,a9329a,a9333a,a9334a,a9335a,a9338a,a9342a,a9343a,a9344a,a9347a,a9351a,a9352a,a9353a,a9356a,a9360a,a9361a,a9362a,a9365a,a9369a,a9370a,a9371a,a9374a,a9378a,a9379a,a9380a,a9383a,a9387a,a9388a,a9389a,a9392a,a9396a,a9397a,a9398a,a9401a,a9405a,a9406a,a9407a,a9410a,a9414a,a9415a,a9416a,a9419a,a9423a,a9424a,a9425a,a9428a,a9432a,a9433a,a9434a,a9437a,a9441a,a9442a,a9443a,a9446a,a9450a,a9451a,a9452a,a9455a,a9459a,a9460a,a9461a,a9464a,a9468a,a9469a,a9470a,a9473a,a9477a,a9478a,a9479a,a9482a,a9486a,a9487a,a9488a,a9491a,a9495a,a9496a,a9497a,a9500a,a9504a,a9505a,a9506a,a9509a,a9513a,a9514a,a9515a,a9518a,a9522a,a9523a,a9524a,a9527a,a9531a,a9532a,a9533a,a9536a,a9540a,a9541a,a9542a,a9545a,a9549a,a9550a,a9551a,a9554a,a9558a,a9559a,a9560a,a9563a,a9567a,a9568a,a9569a,a9572a,a9576a,a9577a,a9578a,a9581a,a9585a,a9586a,a9587a,a9590a,a9594a,a9595a,a9596a,a9599a,a9603a,a9604a,a9605a,a9608a,a9612a,a9613a,a9614a,a9617a,a9621a,a9622a,a9623a,a9626a,a9630a,a9631a,a9632a,a9635a,a9639a,a9640a,a9641a,a9644a,a9648a,a9649a,a9650a,a9653a,a9657a,a9658a,a9659a,a9662a,a9666a,a9667a,a9668a,a9671a,a9675a,a9676a,a9677a,a9680a,a9684a,a9685a,a9686a,a9689a,a9693a,a9694a,a9695a,a9698a,a9702a,a9703a,a9704a,a9707a,a9711a,a9712a,a9713a,a9716a,a9720a,a9721a,a9722a,a9725a,a9729a,a9730a,a9731a,a9734a,a9738a,a9739a,a9740a,a9743a,a9747a,a9748a,a9749a,a9752a,a9756a,a9757a,a9758a,a9761a,a9765a,a9766a,a9767a,a9770a,a9774a,a9775a,a9776a,a9779a,a9783a,a9784a,a9785a,a9788a,a9792a,a9793a,a9794a,a9797a,a9801a,a9802a,a9803a,a9806a,a9810a,a9811a,a9812a,a9815a,a9819a,a9820a,a9821a,a9824a,a9828a,a9829a,a9830a,a9833a,a9837a,a9838a,a9839a,a9842a,a9846a,a9847a,a9848a,a9851a,a9855a,a9856a,a9857a,a9860a,a9864a,a9865a,a9866a,a9869a,a9873a,a9874a,a9875a,a9878a,a9882a,a9883a,a9884a,a9887a,a9891a,a9892a,a9893a,a9896a,a9900a,a9901a,a9902a,a9905a,a9909a,a9910a,a9911a,a9914a,a9918a,a9919a,a9920a,a9923a,a9927a,a9928a,a9929a,a9932a,a9936a,a9937a,a9938a,a9941a,a9945a,a9946a,a9947a,a9950a,a9954a,a9955a,a9956a,a9959a,a9963a,a9964a,a9965a,a9968a,a9972a,a9973a,a9974a,a9977a,a9981a,a9982a,a9983a,a9986a,a9990a,a9991a,a9992a,a9995a,a9999a,a10000a,a10001a,a10004a,a10008a,a10009a,a10010a,a10013a,a10017a,a10018a,a10019a,a10022a,a10026a,a10027a,a10028a,a10031a,a10035a,a10036a,a10037a,a10040a,a10044a,a10045a,a10046a,a10049a,a10053a,a10054a,a10055a,a10058a,a10062a,a10063a,a10064a,a10067a,a10071a,a10072a,a10073a,a10076a,a10080a,a10081a,a10082a,a10085a,a10089a,a10090a,a10091a,a10094a,a10098a,a10099a,a10100a,a10103a,a10107a,a10108a,a10109a,a10112a,a10116a,a10117a,a10118a,a10121a,a10125a,a10126a,a10127a,a10130a,a10134a,a10135a,a10136a,a10139a,a10143a,a10144a,a10145a,a10148a,a10152a,a10153a,a10154a,a10157a,a10161a,a10162a,a10163a,a10166a,a10170a,a10171a,a10172a,a10175a,a10179a,a10180a,a10181a,a10184a,a10188a,a10189a,a10190a,a10193a,a10197a,a10198a,a10199a,a10202a,a10206a,a10207a,a10208a,a10211a,a10215a,a10216a,a10217a,a10220a,a10224a,a10225a,a10226a,a10229a,a10233a,a10234a,a10235a,a10238a,a10242a,a10243a,a10244a,a10247a,a10251a,a10252a,a10253a,a10256a,a10260a,a10261a,a10262a,a10265a,a10269a,a10270a,a10271a,a10274a,a10278a,a10279a,a10280a,a10283a,a10287a,a10288a,a10289a,a10292a,a10296a,a10297a,a10298a,a10301a,a10305a,a10306a,a10307a,a10310a,a10314a,a10315a,a10316a,a10319a,a10323a,a10324a,a10325a,a10328a,a10332a,a10333a,a10334a,a10338a,a10339a,a10343a,a10344a,a10345a,a10348a,a10352a,a10353a,a10354a,a10358a,a10359a,a10363a,a10364a,a10365a,a10368a,a10372a,a10373a,a10374a,a10378a,a10379a,a10383a,a10384a,a10385a,a10388a,a10392a,a10393a,a10394a,a10398a,a10399a,a10403a,a10404a,a10405a,a10408a,a10412a,a10413a,a10414a,a10418a,a10419a,a10423a,a10424a,a10425a,a10428a,a10432a,a10433a,a10434a,a10438a,a10439a,a10443a,a10444a,a10445a,a10448a,a10452a,a10453a,a10454a,a10458a,a10459a,a10463a,a10464a,a10465a,a10468a,a10472a,a10473a,a10474a,a10478a,a10479a,a10483a,a10484a,a10485a,a10488a,a10492a,a10493a,a10494a,a10498a,a10499a,a10503a,a10504a,a10505a,a10508a,a10512a,a10513a,a10514a,a10518a,a10519a,a10523a,a10524a,a10525a,a10528a,a10532a,a10533a,a10534a,a10538a,a10539a,a10543a,a10544a,a10545a,a10548a,a10552a,a10553a,a10554a,a10558a,a10559a,a10563a,a10564a,a10565a,a10568a,a10572a,a10573a,a10574a,a10578a,a10579a,a10583a,a10584a,a10585a,a10588a,a10592a,a10593a,a10594a,a10598a,a10599a,a10603a,a10604a,a10605a,a10608a,a10612a,a10613a,a10614a,a10618a,a10619a,a10623a,a10624a,a10625a,a10628a,a10632a,a10633a,a10634a,a10638a,a10639a,a10643a,a10644a,a10645a,a10648a,a10652a,a10653a,a10654a,a10658a,a10659a,a10663a,a10664a,a10665a,a10668a,a10672a,a10673a,a10674a,a10678a,a10679a,a10683a,a10684a,a10685a,a10688a,a10692a,a10693a,a10694a,a10698a,a10699a,a10703a,a10704a,a10705a,a10708a,a10712a,a10713a,a10714a,a10718a,a10719a,a10723a,a10724a,a10725a,a10728a,a10732a,a10733a,a10734a,a10738a,a10739a,a10743a,a10744a,a10745a,a10748a,a10752a,a10753a,a10754a,a10758a,a10759a,a10763a,a10764a,a10765a,a10768a,a10772a,a10773a,a10774a,a10778a,a10779a,a10783a,a10784a,a10785a,a10788a,a10792a,a10793a,a10794a,a10798a,a10799a,a10803a,a10804a,a10805a,a10808a,a10812a,a10813a,a10814a,a10818a,a10819a,a10823a,a10824a,a10825a,a10828a,a10832a,a10833a,a10834a,a10838a,a10839a,a10843a,a10844a,a10845a,a10848a,a10852a,a10853a,a10854a,a10858a,a10859a,a10863a,a10864a,a10865a,a10868a,a10872a,a10873a,a10874a,a10878a,a10879a,a10883a,a10884a,a10885a,a10888a,a10892a,a10893a,a10894a,a10898a,a10899a,a10903a,a10904a,a10905a,a10908a,a10912a,a10913a,a10914a,a10918a,a10919a,a10923a,a10924a,a10925a,a10928a,a10932a,a10933a,a10934a,a10938a,a10939a,a10943a,a10944a,a10945a,a10948a,a10952a,a10953a,a10954a,a10958a,a10959a,a10963a,a10964a,a10965a,a10968a,a10972a,a10973a,a10974a,a10978a,a10979a,a10983a,a10984a,a10985a,a10988a,a10992a,a10993a,a10994a,a10998a,a10999a,a11003a,a11004a,a11005a,a11008a,a11012a,a11013a,a11014a,a11018a,a11019a,a11023a,a11024a,a11025a,a11028a,a11032a,a11033a,a11034a,a11038a,a11039a,a11043a,a11044a,a11045a,a11048a,a11052a,a11053a,a11054a,a11058a,a11059a,a11063a,a11064a,a11065a,a11068a,a11072a,a11073a,a11074a,a11078a,a11079a,a11083a,a11084a,a11085a,a11088a,a11092a,a11093a,a11094a,a11098a,a11099a,a11103a,a11104a,a11105a,a11108a,a11112a,a11113a,a11114a,a11118a,a11119a,a11123a,a11124a,a11125a,a11128a,a11132a,a11133a,a11134a,a11138a,a11139a,a11143a,a11144a,a11145a,a11148a,a11152a,a11153a,a11154a,a11158a,a11159a,a11163a,a11164a,a11165a,a11168a,a11172a,a11173a,a11174a,a11178a,a11179a,a11183a,a11184a,a11185a,a11188a,a11192a,a11193a,a11194a,a11198a,a11199a,a11203a,a11204a,a11205a,a11208a,a11212a,a11213a,a11214a,a11218a,a11219a,a11223a,a11224a,a11225a,a11228a,a11232a,a11233a,a11234a,a11238a,a11239a,a11243a,a11244a,a11245a,a11248a,a11252a,a11253a,a11254a,a11258a,a11259a,a11263a,a11264a,a11265a,a11268a,a11272a,a11273a,a11274a,a11278a,a11279a,a11283a,a11284a,a11285a,a11288a,a11292a,a11293a,a11294a,a11298a,a11299a,a11303a,a11304a,a11305a,a11308a,a11312a,a11313a,a11314a,a11318a,a11319a,a11323a,a11324a,a11325a,a11328a,a11332a,a11333a,a11334a,a11338a,a11339a,a11343a,a11344a,a11345a,a11348a,a11352a,a11353a,a11354a,a11358a,a11359a,a11363a,a11364a,a11365a,a11368a,a11372a,a11373a,a11374a,a11378a,a11379a,a11383a,a11384a,a11385a,a11388a,a11392a,a11393a,a11394a,a11398a,a11399a,a11403a,a11404a,a11405a,a11408a,a11412a,a11413a,a11414a,a11418a,a11419a,a11423a,a11424a,a11425a,a11428a,a11432a,a11433a,a11434a,a11438a,a11439a,a11443a,a11444a,a11445a,a11448a,a11452a,a11453a,a11454a,a11458a,a11459a,a11463a,a11464a,a11465a,a11468a,a11472a,a11473a,a11474a,a11478a,a11479a,a11483a,a11484a,a11485a,a11488a,a11492a,a11493a,a11494a,a11498a,a11499a,a11503a,a11504a,a11505a,a11508a,a11512a,a11513a,a11514a,a11518a,a11519a,a11523a,a11524a,a11525a,a11528a,a11532a,a11533a,a11534a,a11538a,a11539a,a11543a,a11544a,a11545a,a11548a,a11552a,a11553a,a11554a,a11558a,a11559a,a11563a,a11564a,a11565a,a11568a,a11572a,a11573a,a11574a,a11578a,a11579a,a11583a,a11584a,a11585a,a11588a,a11592a,a11593a,a11594a,a11598a,a11599a,a11603a,a11604a,a11605a,a11608a,a11612a,a11613a,a11614a,a11618a,a11619a,a11623a,a11624a,a11625a,a11628a,a11632a,a11633a,a11634a,a11638a,a11639a,a11643a,a11644a,a11645a,a11648a,a11652a,a11653a,a11654a,a11658a,a11659a,a11663a,a11664a,a11665a,a11668a,a11672a,a11673a,a11674a,a11678a,a11679a,a11683a,a11684a,a11685a,a11688a,a11692a,a11693a,a11694a,a11698a,a11699a,a11703a,a11704a,a11705a,a11708a,a11712a,a11713a,a11714a,a11718a,a11719a,a11723a,a11724a,a11725a,a11728a,a11732a,a11733a,a11734a,a11738a,a11739a,a11743a,a11744a,a11745a,a11748a,a11752a,a11753a,a11754a,a11758a,a11759a,a11763a,a11764a,a11765a,a11768a,a11772a,a11773a,a11774a,a11778a,a11779a,a11783a,a11784a,a11785a,a11788a,a11792a,a11793a,a11794a,a11798a,a11799a,a11803a,a11804a,a11805a,a11808a,a11812a,a11813a,a11814a,a11818a,a11819a,a11823a,a11824a,a11825a,a11828a,a11832a,a11833a,a11834a,a11838a,a11839a,a11843a,a11844a,a11845a,a11848a,a11852a,a11853a,a11854a,a11858a,a11859a,a11863a,a11864a,a11865a,a11868a,a11872a,a11873a,a11874a,a11878a,a11879a,a11883a,a11884a,a11885a,a11888a,a11892a,a11893a,a11894a,a11898a,a11899a,a11903a,a11904a,a11905a,a11908a,a11912a,a11913a,a11914a,a11918a,a11919a,a11923a,a11924a,a11925a,a11928a,a11932a,a11933a,a11934a,a11938a,a11939a,a11943a,a11944a,a11945a,a11948a,a11952a,a11953a,a11954a,a11958a,a11959a,a11963a,a11964a,a11965a,a11968a,a11972a,a11973a,a11974a,a11978a,a11979a,a11983a,a11984a,a11985a,a11988a,a11992a,a11993a,a11994a,a11998a,a11999a,a12003a,a12004a,a12005a,a12008a,a12012a,a12013a,a12014a,a12018a,a12019a,a12023a,a12024a,a12025a,a12028a,a12032a,a12033a,a12034a,a12038a,a12039a,a12043a,a12044a,a12045a,a12048a,a12052a,a12053a,a12054a,a12058a,a12059a,a12063a,a12064a,a12065a,a12068a,a12072a,a12073a,a12074a,a12078a,a12079a,a12083a,a12084a,a12085a,a12088a,a12092a,a12093a,a12094a,a12098a,a12099a,a12103a,a12104a,a12105a,a12108a,a12112a,a12113a,a12114a,a12118a,a12119a,a12123a,a12124a,a12125a,a12128a,a12132a,a12133a,a12134a,a12138a,a12139a,a12143a,a12144a,a12145a,a12148a,a12152a,a12153a,a12154a,a12158a,a12159a,a12163a,a12164a,a12165a,a12168a,a12172a,a12173a,a12174a,a12178a,a12179a,a12183a,a12184a,a12185a,a12188a,a12192a,a12193a,a12194a,a12198a,a12199a,a12203a,a12204a,a12205a,a12208a,a12212a,a12213a,a12214a,a12218a,a12219a,a12223a,a12224a,a12225a,a12228a,a12232a,a12233a,a12234a,a12238a,a12239a,a12243a,a12244a,a12245a,a12248a,a12252a,a12253a,a12254a,a12258a,a12259a,a12263a,a12264a,a12265a,a12268a,a12272a,a12273a,a12274a,a12278a,a12279a,a12283a,a12284a,a12285a,a12288a,a12292a,a12293a,a12294a,a12298a,a12299a,a12303a,a12304a,a12305a,a12308a,a12312a,a12313a,a12314a,a12318a,a12319a,a12323a,a12324a,a12325a,a12328a,a12332a,a12333a,a12334a,a12338a,a12339a,a12343a,a12344a,a12345a,a12348a,a12352a,a12353a,a12354a,a12358a,a12359a,a12363a,a12364a,a12365a,a12368a,a12372a,a12373a,a12374a,a12378a,a12379a,a12383a,a12384a,a12385a,a12388a,a12392a,a12393a,a12394a,a12398a,a12399a,a12403a,a12404a,a12405a,a12408a,a12412a,a12413a,a12414a,a12418a,a12419a,a12423a,a12424a,a12425a,a12428a,a12432a,a12433a,a12434a,a12438a,a12439a,a12443a,a12444a,a12445a,a12448a,a12452a,a12453a,a12454a,a12458a,a12459a,a12463a,a12464a,a12465a,a12468a,a12472a,a12473a,a12474a,a12478a,a12479a,a12483a,a12484a,a12485a,a12488a,a12492a,a12493a,a12494a,a12498a,a12499a,a12503a,a12504a,a12505a,a12508a,a12512a,a12513a,a12514a,a12518a,a12519a,a12523a,a12524a,a12525a,a12528a,a12532a,a12533a,a12534a,a12538a,a12539a,a12543a,a12544a,a12545a,a12548a,a12552a,a12553a,a12554a,a12558a,a12559a,a12563a,a12564a,a12565a,a12568a,a12572a,a12573a,a12574a,a12578a,a12579a,a12583a,a12584a,a12585a,a12588a,a12592a,a12593a,a12594a,a12598a,a12599a,a12603a,a12604a,a12605a,a12608a,a12612a,a12613a,a12614a,a12618a,a12619a,a12623a,a12624a,a12625a,a12628a,a12632a,a12633a,a12634a,a12638a,a12639a,a12643a,a12644a,a12645a,a12648a,a12652a,a12653a,a12654a,a12658a,a12659a,a12663a,a12664a,a12665a,a12668a,a12672a,a12673a,a12674a,a12678a,a12679a,a12683a,a12684a,a12685a,a12688a,a12692a,a12693a,a12694a,a12698a,a12699a,a12703a,a12704a,a12705a,a12708a,a12712a,a12713a,a12714a,a12718a,a12719a,a12723a,a12724a,a12725a,a12728a,a12732a,a12733a,a12734a,a12738a,a12739a,a12743a,a12744a,a12745a,a12748a,a12752a,a12753a,a12754a,a12758a,a12759a,a12763a,a12764a,a12765a,a12768a,a12772a,a12773a,a12774a,a12778a,a12779a,a12783a,a12784a,a12785a,a12788a,a12792a,a12793a,a12794a,a12798a,a12799a,a12803a,a12804a,a12805a,a12808a,a12812a,a12813a,a12814a,a12818a,a12819a,a12823a,a12824a,a12825a,a12828a,a12832a,a12833a,a12834a,a12838a,a12839a,a12843a,a12844a,a12845a,a12848a,a12852a,a12853a,a12854a,a12858a,a12859a,a12863a,a12864a,a12865a,a12868a,a12872a,a12873a,a12874a,a12878a,a12879a,a12883a,a12884a,a12885a,a12888a,a12892a,a12893a,a12894a,a12898a,a12899a,a12903a,a12904a,a12905a,a12908a,a12912a,a12913a,a12914a,a12918a,a12919a,a12923a,a12924a,a12925a,a12928a,a12932a,a12933a,a12934a,a12938a,a12939a,a12943a,a12944a,a12945a,a12948a,a12952a,a12953a,a12954a,a12958a,a12959a,a12963a,a12964a,a12965a,a12968a,a12972a,a12973a,a12974a,a12978a,a12979a,a12983a,a12984a,a12985a,a12988a,a12992a,a12993a,a12994a,a12998a,a12999a,a13003a,a13004a,a13005a,a13008a,a13012a,a13013a,a13014a,a13018a,a13019a,a13023a,a13024a,a13025a,a13028a,a13032a,a13033a,a13034a,a13038a,a13039a,a13043a,a13044a,a13045a,a13048a,a13052a,a13053a,a13054a,a13058a,a13059a,a13063a,a13064a,a13065a,a13068a,a13072a,a13073a,a13074a,a13078a,a13079a,a13083a,a13084a,a13085a,a13088a,a13092a,a13093a,a13094a,a13098a,a13099a,a13103a,a13104a,a13105a,a13108a,a13112a,a13113a,a13114a,a13118a,a13119a,a13123a,a13124a,a13125a,a13128a,a13132a,a13133a,a13134a,a13138a,a13139a,a13143a,a13144a,a13145a,a13148a,a13152a,a13153a,a13154a,a13158a,a13159a,a13163a,a13164a,a13165a,a13168a,a13172a,a13173a,a13174a,a13178a,a13179a,a13183a,a13184a,a13185a,a13188a,a13192a,a13193a,a13194a,a13198a,a13199a,a13203a,a13204a,a13205a,a13208a,a13212a,a13213a,a13214a,a13218a,a13219a,a13223a,a13224a,a13225a,a13228a,a13232a,a13233a,a13234a,a13238a,a13239a,a13243a,a13244a,a13245a,a13248a,a13252a,a13253a,a13254a,a13258a,a13259a,a13263a,a13264a,a13265a,a13268a,a13272a,a13273a,a13274a,a13278a,a13279a,a13283a,a13284a,a13285a,a13288a,a13292a,a13293a,a13294a,a13298a,a13299a,a13303a,a13304a,a13305a,a13308a,a13312a,a13313a,a13314a,a13318a,a13319a,a13323a,a13324a,a13325a,a13328a,a13332a,a13333a,a13334a,a13338a,a13339a,a13343a,a13344a,a13345a,a13348a,a13352a,a13353a,a13354a,a13358a,a13359a,a13363a,a13364a,a13365a,a13368a,a13372a,a13373a,a13374a,a13378a,a13379a,a13383a,a13384a,a13385a,a13388a,a13392a,a13393a,a13394a,a13398a,a13399a,a13403a,a13404a,a13405a,a13408a,a13412a,a13413a,a13414a,a13418a,a13419a,a13423a,a13424a,a13425a,a13428a,a13432a,a13433a,a13434a,a13438a,a13439a,a13443a,a13444a,a13445a,a13448a,a13452a,a13453a,a13454a,a13458a,a13459a,a13463a,a13464a,a13465a,a13468a,a13472a,a13473a,a13474a,a13478a,a13479a,a13483a,a13484a,a13485a,a13488a,a13492a,a13493a,a13494a,a13498a,a13499a,a13503a,a13504a,a13505a,a13508a,a13512a,a13513a,a13514a,a13518a,a13519a,a13523a,a13524a,a13525a,a13528a,a13532a,a13533a,a13534a,a13538a,a13539a,a13543a,a13544a,a13545a,a13548a,a13552a,a13553a,a13554a,a13558a,a13559a,a13563a,a13564a,a13565a,a13568a,a13572a,a13573a,a13574a,a13578a,a13579a,a13583a,a13584a,a13585a,a13588a,a13592a,a13593a,a13594a,a13598a,a13599a,a13603a,a13604a,a13605a,a13608a,a13612a,a13613a,a13614a,a13618a,a13619a,a13623a,a13624a,a13625a,a13628a,a13632a,a13633a,a13634a,a13638a,a13639a,a13643a,a13644a,a13645a,a13648a,a13652a,a13653a,a13654a,a13658a,a13659a,a13663a,a13664a,a13665a,a13668a,a13672a,a13673a,a13674a,a13678a,a13679a,a13683a,a13684a,a13685a,a13689a,a13690a,a13694a,a13695a,a13696a,a13700a,a13701a,a13705a,a13706a,a13707a,a13711a,a13712a,a13716a,a13717a,a13718a,a13722a,a13723a,a13727a,a13728a,a13729a,a13733a,a13734a,a13738a,a13739a,a13740a,a13744a,a13745a,a13749a,a13750a,a13751a,a13755a,a13756a,a13760a,a13761a,a13762a,a13766a,a13767a,a13771a,a13772a,a13773a,a13777a,a13778a,a13782a,a13783a,a13784a,a13788a,a13789a,a13793a,a13794a,a13795a,a13799a,a13800a,a13804a,a13805a,a13806a,a13810a,a13811a,a13815a,a13816a,a13817a,a13821a,a13822a,a13826a,a13827a,a13828a,a13832a,a13833a,a13837a,a13838a,a13839a,a13843a,a13844a,a13848a,a13849a,a13850a,a13854a,a13855a,a13859a,a13860a,a13861a,a13865a,a13866a,a13870a,a13871a,a13872a,a13876a,a13877a,a13881a,a13882a,a13883a,a13887a,a13888a,a13892a,a13893a,a13894a,a13898a,a13899a,a13903a,a13904a,a13905a,a13909a,a13910a,a13914a,a13915a,a13916a,a13920a,a13921a,a13925a,a13926a,a13927a,a13931a,a13932a,a13936a,a13937a,a13938a,a13942a,a13943a,a13947a,a13948a,a13949a,a13953a,a13954a,a13958a,a13959a,a13960a,a13964a,a13965a,a13969a,a13970a,a13971a,a13975a,a13976a,a13980a,a13981a,a13982a,a13986a,a13987a,a13991a,a13992a,a13993a,a13997a,a13998a,a14002a,a14003a,a14004a,a14008a,a14009a,a14013a,a14014a,a14015a,a14019a,a14020a,a14024a,a14025a,a14026a,a14030a,a14031a,a14035a,a14036a,a14037a,a14041a,a14042a,a14046a,a14047a,a14048a,a14052a,a14053a,a14057a,a14058a,a14059a,a14063a,a14064a,a14068a,a14069a,a14070a,a14074a,a14075a,a14079a,a14080a,a14081a,a14085a,a14086a,a14090a,a14091a,a14092a,a14096a,a14097a,a14101a,a14102a,a14103a,a14107a,a14108a,a14112a,a14113a,a14114a,a14118a,a14119a,a14123a,a14124a,a14125a,a14129a,a14130a,a14134a,a14135a,a14136a,a14140a,a14141a,a14145a,a14146a,a14147a,a14151a,a14152a,a14156a,a14157a,a14158a,a14162a,a14163a,a14167a,a14168a,a14169a,a14173a,a14174a,a14178a,a14179a,a14180a,a14184a,a14185a,a14189a,a14190a,a14191a,a14195a,a14196a,a14200a,a14201a,a14202a,a14206a,a14207a,a14211a,a14212a,a14213a,a14217a,a14218a,a14222a,a14223a,a14224a,a14228a,a14229a,a14233a,a14234a,a14235a,a14239a,a14240a,a14244a,a14245a,a14246a,a14250a,a14251a,a14255a,a14256a,a14257a,a14261a,a14262a,a14266a,a14267a,a14268a,a14272a,a14273a,a14277a,a14278a,a14279a,a14283a,a14284a,a14288a,a14289a,a14290a,a14294a,a14295a,a14299a,a14300a,a14301a,a14305a,a14306a,a14310a,a14311a,a14312a,a14316a,a14317a,a14321a,a14322a,a14323a,a14327a,a14328a,a14332a,a14333a,a14334a,a14338a,a14339a,a14343a,a14344a,a14345a,a14349a,a14350a,a14354a,a14355a,a14356a,a14360a,a14361a,a14365a,a14366a,a14367a,a14371a,a14372a,a14376a,a14377a,a14378a,a14382a,a14383a,a14387a,a14388a,a14389a,a14393a,a14394a,a14398a,a14399a,a14400a,a14404a,a14405a,a14409a,a14410a,a14411a,a14415a,a14416a,a14420a,a14421a,a14422a,a14426a,a14427a,a14431a,a14432a,a14433a,a14437a,a14438a,a14442a,a14443a,a14444a,a14448a,a14449a,a14453a,a14454a,a14455a,a14459a,a14460a,a14464a,a14465a,a14466a,a14470a,a14471a,a14475a,a14476a,a14477a,a14481a,a14482a,a14486a,a14487a,a14488a,a14492a,a14493a,a14497a,a14498a,a14499a,a14503a,a14504a,a14508a,a14509a,a14510a,a14514a,a14515a,a14519a,a14520a,a14521a,a14525a,a14526a,a14530a,a14531a,a14532a,a14536a,a14537a,a14541a,a14542a,a14543a,a14547a,a14548a,a14552a,a14553a,a14554a,a14558a,a14559a,a14563a,a14564a,a14565a,a14569a,a14570a,a14574a,a14575a,a14576a,a14580a,a14581a,a14585a,a14586a,a14587a,a14591a,a14592a,a14596a,a14597a,a14598a,a14602a,a14603a,a14607a,a14608a,a14609a,a14613a,a14614a,a14618a,a14619a,a14620a,a14624a,a14625a,a14629a,a14630a,a14631a,a14635a,a14636a,a14640a,a14641a,a14642a,a14646a,a14647a,a14651a,a14652a,a14653a,a14657a,a14658a,a14662a,a14663a,a14664a,a14668a,a14669a,a14673a,a14674a,a14675a,a14679a,a14680a,a14684a,a14685a,a14686a,a14690a,a14691a,a14695a,a14696a,a14697a,a14701a,a14702a,a14706a,a14707a,a14708a,a14712a,a14713a,a14717a,a14718a,a14719a,a14723a,a14724a,a14728a,a14729a,a14730a,a14734a,a14735a,a14739a,a14740a,a14741a,a14745a,a14746a,a14750a,a14751a,a14752a,a14756a,a14757a,a14761a,a14762a,a14763a,a14767a,a14768a,a14772a,a14773a,a14774a,a14778a,a14779a,a14783a,a14784a,a14785a,a14789a,a14790a,a14794a,a14795a,a14796a,a14800a,a14801a,a14805a,a14806a,a14807a,a14811a,a14812a,a14816a,a14817a,a14818a,a14822a,a14823a,a14827a,a14828a,a14829a,a14833a,a14834a,a14838a,a14839a,a14840a,a14844a,a14845a,a14849a,a14850a,a14851a,a14855a,a14856a,a14860a,a14861a,a14862a,a14866a,a14867a,a14871a,a14872a,a14873a,a14877a,a14878a,a14882a,a14883a,a14884a,a14888a,a14889a,a14893a,a14894a,a14895a,a14899a,a14900a,a14904a,a14905a,a14906a,a14910a,a14911a,a14915a,a14916a,a14917a,a14921a,a14922a,a14926a,a14927a,a14928a,a14932a,a14933a,a14937a,a14938a,a14939a,a14943a,a14944a,a14948a,a14949a,a14950a,a14954a,a14955a,a14959a,a14960a,a14961a,a14965a,a14966a,a14970a,a14971a,a14972a,a14976a,a14977a,a14981a,a14982a,a14983a,a14987a,a14988a,a14992a,a14993a,a14994a,a14998a,a14999a,a15003a,a15004a,a15005a,a15009a,a15010a,a15014a,a15015a,a15016a,a15020a,a15021a,a15025a,a15026a,a15027a,a15031a,a15032a,a15036a,a15037a,a15038a,a15042a,a15043a,a15047a,a15048a,a15049a,a15053a,a15054a,a15058a,a15059a,a15060a,a15064a,a15065a,a15069a,a15070a,a15071a,a15075a,a15076a,a15080a,a15081a,a15082a,a15086a,a15087a,a15091a,a15092a,a15093a,a15097a,a15098a,a15102a,a15103a,a15104a,a15108a,a15109a,a15113a,a15114a,a15115a,a15119a,a15120a,a15124a,a15125a,a15126a,a15130a,a15131a,a15135a,a15136a,a15137a,a15141a,a15142a,a15146a,a15147a,a15148a,a15152a,a15153a,a15157a,a15158a,a15159a,a15163a,a15164a,a15168a,a15169a,a15170a,a15174a,a15175a,a15179a,a15180a,a15181a,a15185a,a15186a,a15190a,a15191a,a15192a,a15196a,a15197a,a15201a,a15202a,a15203a,a15207a,a15208a,a15212a,a15213a,a15214a,a15218a,a15219a,a15223a,a15224a,a15225a,a15229a,a15230a,a15234a,a15235a,a15236a,a15240a,a15241a,a15245a,a15246a,a15247a,a15251a,a15252a,a15256a,a15257a,a15258a,a15262a,a15263a,a15267a,a15268a,a15269a,a15273a,a15274a,a15278a,a15279a,a15280a,a15284a,a15285a,a15289a,a15290a,a15291a,a15295a,a15296a,a15300a,a15301a,a15302a,a15306a,a15307a,a15311a,a15312a,a15313a,a15317a,a15318a,a15322a,a15323a,a15324a,a15328a,a15329a,a15333a,a15334a,a15335a,a15339a,a15340a,a15344a,a15345a,a15346a,a15350a,a15351a,a15355a,a15356a,a15357a,a15361a,a15362a,a15366a,a15367a,a15368a,a15372a,a15373a,a15377a,a15378a,a15379a,a15383a,a15384a,a15388a,a15389a,a15390a,a15394a,a15395a,a15399a,a15400a,a15401a,a15405a,a15406a,a15410a,a15411a,a15412a,a15416a,a15417a,a15421a,a15422a,a15423a,a15427a,a15428a,a15432a,a15433a,a15434a,a15438a,a15439a,a15443a,a15444a,a15445a,a15449a,a15450a,a15454a,a15455a,a15456a,a15460a,a15461a,a15464a,a15467a,a15468a,a15469a,a15473a,a15474a,a15478a,a15479a,a15480a,a15484a,a15485a,a15488a,a15491a,a15492a,a15493a,a15497a,a15498a,a15502a,a15503a,a15504a,a15508a,a15509a,a15512a,a15515a,a15516a,a15517a,a15521a,a15522a,a15526a,a15527a,a15528a,a15532a,a15533a,a15536a,a15539a,a15540a,a15541a,a15545a,a15546a,a15550a,a15551a,a15552a,a15556a,a15557a,a15560a,a15563a,a15564a,a15565a,a15569a,a15570a,a15574a,a15575a,a15576a,a15580a,a15581a,a15584a,a15587a,a15588a,a15589a,a15593a,a15594a,a15598a,a15599a,a15600a,a15604a,a15605a,a15608a,a15611a,a15612a,a15613a,a15617a,a15618a,a15622a,a15623a,a15624a,a15628a,a15629a,a15632a,a15635a,a15636a,a15637a,a15641a,a15642a,a15646a,a15647a,a15648a,a15652a,a15653a,a15656a,a15659a,a15660a,a15661a,a15665a,a15666a,a15670a,a15671a,a15672a,a15676a,a15677a,a15680a,a15683a,a15684a,a15685a,a15689a,a15690a,a15694a,a15695a,a15696a,a15700a,a15701a,a15704a,a15707a,a15708a,a15709a,a15713a,a15714a,a15718a,a15719a,a15720a,a15724a,a15725a,a15728a,a15731a,a15732a,a15733a,a15737a,a15738a,a15742a,a15743a,a15744a,a15748a,a15749a,a15752a,a15755a,a15756a,a15757a,a15761a,a15762a,a15766a,a15767a,a15768a,a15772a,a15773a,a15776a,a15779a,a15780a,a15781a,a15785a,a15786a,a15790a,a15791a,a15792a,a15796a,a15797a,a15800a,a15803a,a15804a,a15805a,a15809a,a15810a,a15814a,a15815a,a15816a,a15820a,a15821a,a15824a,a15827a,a15828a,a15829a: std_logic;
begin
A75 <=( a2293a ) or ( a1528a );
a1a <=( a15829a and a15816a );
a2a <=( a15805a and a15792a );
a3a <=( a15781a and a15768a );
a4a <=( a15757a and a15744a );
a5a <=( a15733a and a15720a );
a6a <=( a15709a and a15696a );
a7a <=( a15685a and a15672a );
a8a <=( a15661a and a15648a );
a9a <=( a15637a and a15624a );
a10a <=( a15613a and a15600a );
a11a <=( a15589a and a15576a );
a12a <=( a15565a and a15552a );
a13a <=( a15541a and a15528a );
a14a <=( a15517a and a15504a );
a15a <=( a15493a and a15480a );
a16a <=( a15469a and a15456a );
a17a <=( a15445a and a15434a );
a18a <=( a15423a and a15412a );
a19a <=( a15401a and a15390a );
a20a <=( a15379a and a15368a );
a21a <=( a15357a and a15346a );
a22a <=( a15335a and a15324a );
a23a <=( a15313a and a15302a );
a24a <=( a15291a and a15280a );
a25a <=( a15269a and a15258a );
a26a <=( a15247a and a15236a );
a27a <=( a15225a and a15214a );
a28a <=( a15203a and a15192a );
a29a <=( a15181a and a15170a );
a30a <=( a15159a and a15148a );
a31a <=( a15137a and a15126a );
a32a <=( a15115a and a15104a );
a33a <=( a15093a and a15082a );
a34a <=( a15071a and a15060a );
a35a <=( a15049a and a15038a );
a36a <=( a15027a and a15016a );
a37a <=( a15005a and a14994a );
a38a <=( a14983a and a14972a );
a39a <=( a14961a and a14950a );
a40a <=( a14939a and a14928a );
a41a <=( a14917a and a14906a );
a42a <=( a14895a and a14884a );
a43a <=( a14873a and a14862a );
a44a <=( a14851a and a14840a );
a45a <=( a14829a and a14818a );
a46a <=( a14807a and a14796a );
a47a <=( a14785a and a14774a );
a48a <=( a14763a and a14752a );
a49a <=( a14741a and a14730a );
a50a <=( a14719a and a14708a );
a51a <=( a14697a and a14686a );
a52a <=( a14675a and a14664a );
a53a <=( a14653a and a14642a );
a54a <=( a14631a and a14620a );
a55a <=( a14609a and a14598a );
a56a <=( a14587a and a14576a );
a57a <=( a14565a and a14554a );
a58a <=( a14543a and a14532a );
a59a <=( a14521a and a14510a );
a60a <=( a14499a and a14488a );
a61a <=( a14477a and a14466a );
a62a <=( a14455a and a14444a );
a63a <=( a14433a and a14422a );
a64a <=( a14411a and a14400a );
a65a <=( a14389a and a14378a );
a66a <=( a14367a and a14356a );
a67a <=( a14345a and a14334a );
a68a <=( a14323a and a14312a );
a69a <=( a14301a and a14290a );
a70a <=( a14279a and a14268a );
a71a <=( a14257a and a14246a );
a72a <=( a14235a and a14224a );
a73a <=( a14213a and a14202a );
a74a <=( a14191a and a14180a );
a75a <=( a14169a and a14158a );
a76a <=( a14147a and a14136a );
a77a <=( a14125a and a14114a );
a78a <=( a14103a and a14092a );
a79a <=( a14081a and a14070a );
a80a <=( a14059a and a14048a );
a81a <=( a14037a and a14026a );
a82a <=( a14015a and a14004a );
a83a <=( a13993a and a13982a );
a84a <=( a13971a and a13960a );
a85a <=( a13949a and a13938a );
a86a <=( a13927a and a13916a );
a87a <=( a13905a and a13894a );
a88a <=( a13883a and a13872a );
a89a <=( a13861a and a13850a );
a90a <=( a13839a and a13828a );
a91a <=( a13817a and a13806a );
a92a <=( a13795a and a13784a );
a93a <=( a13773a and a13762a );
a94a <=( a13751a and a13740a );
a95a <=( a13729a and a13718a );
a96a <=( a13707a and a13696a );
a97a <=( a13685a and a13674a );
a98a <=( a13665a and a13654a );
a99a <=( a13645a and a13634a );
a100a <=( a13625a and a13614a );
a101a <=( a13605a and a13594a );
a102a <=( a13585a and a13574a );
a103a <=( a13565a and a13554a );
a104a <=( a13545a and a13534a );
a105a <=( a13525a and a13514a );
a106a <=( a13505a and a13494a );
a107a <=( a13485a and a13474a );
a108a <=( a13465a and a13454a );
a109a <=( a13445a and a13434a );
a110a <=( a13425a and a13414a );
a111a <=( a13405a and a13394a );
a112a <=( a13385a and a13374a );
a113a <=( a13365a and a13354a );
a114a <=( a13345a and a13334a );
a115a <=( a13325a and a13314a );
a116a <=( a13305a and a13294a );
a117a <=( a13285a and a13274a );
a118a <=( a13265a and a13254a );
a119a <=( a13245a and a13234a );
a120a <=( a13225a and a13214a );
a121a <=( a13205a and a13194a );
a122a <=( a13185a and a13174a );
a123a <=( a13165a and a13154a );
a124a <=( a13145a and a13134a );
a125a <=( a13125a and a13114a );
a126a <=( a13105a and a13094a );
a127a <=( a13085a and a13074a );
a128a <=( a13065a and a13054a );
a129a <=( a13045a and a13034a );
a130a <=( a13025a and a13014a );
a131a <=( a13005a and a12994a );
a132a <=( a12985a and a12974a );
a133a <=( a12965a and a12954a );
a134a <=( a12945a and a12934a );
a135a <=( a12925a and a12914a );
a136a <=( a12905a and a12894a );
a137a <=( a12885a and a12874a );
a138a <=( a12865a and a12854a );
a139a <=( a12845a and a12834a );
a140a <=( a12825a and a12814a );
a141a <=( a12805a and a12794a );
a142a <=( a12785a and a12774a );
a143a <=( a12765a and a12754a );
a144a <=( a12745a and a12734a );
a145a <=( a12725a and a12714a );
a146a <=( a12705a and a12694a );
a147a <=( a12685a and a12674a );
a148a <=( a12665a and a12654a );
a149a <=( a12645a and a12634a );
a150a <=( a12625a and a12614a );
a151a <=( a12605a and a12594a );
a152a <=( a12585a and a12574a );
a153a <=( a12565a and a12554a );
a154a <=( a12545a and a12534a );
a155a <=( a12525a and a12514a );
a156a <=( a12505a and a12494a );
a157a <=( a12485a and a12474a );
a158a <=( a12465a and a12454a );
a159a <=( a12445a and a12434a );
a160a <=( a12425a and a12414a );
a161a <=( a12405a and a12394a );
a162a <=( a12385a and a12374a );
a163a <=( a12365a and a12354a );
a164a <=( a12345a and a12334a );
a165a <=( a12325a and a12314a );
a166a <=( a12305a and a12294a );
a167a <=( a12285a and a12274a );
a168a <=( a12265a and a12254a );
a169a <=( a12245a and a12234a );
a170a <=( a12225a and a12214a );
a171a <=( a12205a and a12194a );
a172a <=( a12185a and a12174a );
a173a <=( a12165a and a12154a );
a174a <=( a12145a and a12134a );
a175a <=( a12125a and a12114a );
a176a <=( a12105a and a12094a );
a177a <=( a12085a and a12074a );
a178a <=( a12065a and a12054a );
a179a <=( a12045a and a12034a );
a180a <=( a12025a and a12014a );
a181a <=( a12005a and a11994a );
a182a <=( a11985a and a11974a );
a183a <=( a11965a and a11954a );
a184a <=( a11945a and a11934a );
a185a <=( a11925a and a11914a );
a186a <=( a11905a and a11894a );
a187a <=( a11885a and a11874a );
a188a <=( a11865a and a11854a );
a189a <=( a11845a and a11834a );
a190a <=( a11825a and a11814a );
a191a <=( a11805a and a11794a );
a192a <=( a11785a and a11774a );
a193a <=( a11765a and a11754a );
a194a <=( a11745a and a11734a );
a195a <=( a11725a and a11714a );
a196a <=( a11705a and a11694a );
a197a <=( a11685a and a11674a );
a198a <=( a11665a and a11654a );
a199a <=( a11645a and a11634a );
a200a <=( a11625a and a11614a );
a201a <=( a11605a and a11594a );
a202a <=( a11585a and a11574a );
a203a <=( a11565a and a11554a );
a204a <=( a11545a and a11534a );
a205a <=( a11525a and a11514a );
a206a <=( a11505a and a11494a );
a207a <=( a11485a and a11474a );
a208a <=( a11465a and a11454a );
a209a <=( a11445a and a11434a );
a210a <=( a11425a and a11414a );
a211a <=( a11405a and a11394a );
a212a <=( a11385a and a11374a );
a213a <=( a11365a and a11354a );
a214a <=( a11345a and a11334a );
a215a <=( a11325a and a11314a );
a216a <=( a11305a and a11294a );
a217a <=( a11285a and a11274a );
a218a <=( a11265a and a11254a );
a219a <=( a11245a and a11234a );
a220a <=( a11225a and a11214a );
a221a <=( a11205a and a11194a );
a222a <=( a11185a and a11174a );
a223a <=( a11165a and a11154a );
a224a <=( a11145a and a11134a );
a225a <=( a11125a and a11114a );
a226a <=( a11105a and a11094a );
a227a <=( a11085a and a11074a );
a228a <=( a11065a and a11054a );
a229a <=( a11045a and a11034a );
a230a <=( a11025a and a11014a );
a231a <=( a11005a and a10994a );
a232a <=( a10985a and a10974a );
a233a <=( a10965a and a10954a );
a234a <=( a10945a and a10934a );
a235a <=( a10925a and a10914a );
a236a <=( a10905a and a10894a );
a237a <=( a10885a and a10874a );
a238a <=( a10865a and a10854a );
a239a <=( a10845a and a10834a );
a240a <=( a10825a and a10814a );
a241a <=( a10805a and a10794a );
a242a <=( a10785a and a10774a );
a243a <=( a10765a and a10754a );
a244a <=( a10745a and a10734a );
a245a <=( a10725a and a10714a );
a246a <=( a10705a and a10694a );
a247a <=( a10685a and a10674a );
a248a <=( a10665a and a10654a );
a249a <=( a10645a and a10634a );
a250a <=( a10625a and a10614a );
a251a <=( a10605a and a10594a );
a252a <=( a10585a and a10574a );
a253a <=( a10565a and a10554a );
a254a <=( a10545a and a10534a );
a255a <=( a10525a and a10514a );
a256a <=( a10505a and a10494a );
a257a <=( a10485a and a10474a );
a258a <=( a10465a and a10454a );
a259a <=( a10445a and a10434a );
a260a <=( a10425a and a10414a );
a261a <=( a10405a and a10394a );
a262a <=( a10385a and a10374a );
a263a <=( a10365a and a10354a );
a264a <=( a10345a and a10334a );
a265a <=( a10325a and a10316a );
a266a <=( a10307a and a10298a );
a267a <=( a10289a and a10280a );
a268a <=( a10271a and a10262a );
a269a <=( a10253a and a10244a );
a270a <=( a10235a and a10226a );
a271a <=( a10217a and a10208a );
a272a <=( a10199a and a10190a );
a273a <=( a10181a and a10172a );
a274a <=( a10163a and a10154a );
a275a <=( a10145a and a10136a );
a276a <=( a10127a and a10118a );
a277a <=( a10109a and a10100a );
a278a <=( a10091a and a10082a );
a279a <=( a10073a and a10064a );
a280a <=( a10055a and a10046a );
a281a <=( a10037a and a10028a );
a282a <=( a10019a and a10010a );
a283a <=( a10001a and a9992a );
a284a <=( a9983a and a9974a );
a285a <=( a9965a and a9956a );
a286a <=( a9947a and a9938a );
a287a <=( a9929a and a9920a );
a288a <=( a9911a and a9902a );
a289a <=( a9893a and a9884a );
a290a <=( a9875a and a9866a );
a291a <=( a9857a and a9848a );
a292a <=( a9839a and a9830a );
a293a <=( a9821a and a9812a );
a294a <=( a9803a and a9794a );
a295a <=( a9785a and a9776a );
a296a <=( a9767a and a9758a );
a297a <=( a9749a and a9740a );
a298a <=( a9731a and a9722a );
a299a <=( a9713a and a9704a );
a300a <=( a9695a and a9686a );
a301a <=( a9677a and a9668a );
a302a <=( a9659a and a9650a );
a303a <=( a9641a and a9632a );
a304a <=( a9623a and a9614a );
a305a <=( a9605a and a9596a );
a306a <=( a9587a and a9578a );
a307a <=( a9569a and a9560a );
a308a <=( a9551a and a9542a );
a309a <=( a9533a and a9524a );
a310a <=( a9515a and a9506a );
a311a <=( a9497a and a9488a );
a312a <=( a9479a and a9470a );
a313a <=( a9461a and a9452a );
a314a <=( a9443a and a9434a );
a315a <=( a9425a and a9416a );
a316a <=( a9407a and a9398a );
a317a <=( a9389a and a9380a );
a318a <=( a9371a and a9362a );
a319a <=( a9353a and a9344a );
a320a <=( a9335a and a9326a );
a321a <=( a9317a and a9308a );
a322a <=( a9299a and a9290a );
a323a <=( a9281a and a9272a );
a324a <=( a9263a and a9254a );
a325a <=( a9245a and a9236a );
a326a <=( a9227a and a9218a );
a327a <=( a9209a and a9200a );
a328a <=( a9191a and a9182a );
a329a <=( a9173a and a9164a );
a330a <=( a9155a and a9146a );
a331a <=( a9137a and a9128a );
a332a <=( a9119a and a9110a );
a333a <=( a9101a and a9092a );
a334a <=( a9083a and a9074a );
a335a <=( a9065a and a9056a );
a336a <=( a9047a and a9038a );
a337a <=( a9029a and a9020a );
a338a <=( a9011a and a9002a );
a339a <=( a8993a and a8984a );
a340a <=( a8975a and a8966a );
a341a <=( a8957a and a8948a );
a342a <=( a8939a and a8930a );
a343a <=( a8921a and a8912a );
a344a <=( a8903a and a8894a );
a345a <=( a8885a and a8876a );
a346a <=( a8867a and a8858a );
a347a <=( a8849a and a8840a );
a348a <=( a8831a and a8822a );
a349a <=( a8813a and a8804a );
a350a <=( a8795a and a8786a );
a351a <=( a8777a and a8768a );
a352a <=( a8759a and a8750a );
a353a <=( a8741a and a8732a );
a354a <=( a8723a and a8714a );
a355a <=( a8705a and a8696a );
a356a <=( a8687a and a8678a );
a357a <=( a8669a and a8660a );
a358a <=( a8651a and a8642a );
a359a <=( a8633a and a8624a );
a360a <=( a8615a and a8606a );
a361a <=( a8597a and a8588a );
a362a <=( a8579a and a8570a );
a363a <=( a8561a and a8552a );
a364a <=( a8543a and a8534a );
a365a <=( a8525a and a8516a );
a366a <=( a8507a and a8498a );
a367a <=( a8489a and a8480a );
a368a <=( a8471a and a8462a );
a369a <=( a8453a and a8444a );
a370a <=( a8435a and a8426a );
a371a <=( a8417a and a8408a );
a372a <=( a8399a and a8390a );
a373a <=( a8381a and a8372a );
a374a <=( a8363a and a8354a );
a375a <=( a8345a and a8336a );
a376a <=( a8327a and a8318a );
a377a <=( a8309a and a8300a );
a378a <=( a8291a and a8282a );
a379a <=( a8273a and a8264a );
a380a <=( a8255a and a8246a );
a381a <=( a8237a and a8228a );
a382a <=( a8219a and a8210a );
a383a <=( a8201a and a8192a );
a384a <=( a8183a and a8174a );
a385a <=( a8165a and a8156a );
a386a <=( a8147a and a8138a );
a387a <=( a8129a and a8120a );
a388a <=( a8111a and a8102a );
a389a <=( a8093a and a8084a );
a390a <=( a8075a and a8066a );
a391a <=( a8057a and a8048a );
a392a <=( a8039a and a8030a );
a393a <=( a8021a and a8012a );
a394a <=( a8003a and a7994a );
a395a <=( a7985a and a7976a );
a396a <=( a7967a and a7958a );
a397a <=( a7949a and a7940a );
a398a <=( a7931a and a7922a );
a399a <=( a7913a and a7904a );
a400a <=( a7895a and a7886a );
a401a <=( a7877a and a7868a );
a402a <=( a7859a and a7850a );
a403a <=( a7841a and a7832a );
a404a <=( a7823a and a7814a );
a405a <=( a7805a and a7796a );
a406a <=( a7787a and a7778a );
a407a <=( a7769a and a7760a );
a408a <=( a7751a and a7742a );
a409a <=( a7733a and a7724a );
a410a <=( a7715a and a7706a );
a411a <=( a7697a and a7688a );
a412a <=( a7679a and a7670a );
a413a <=( a7661a and a7652a );
a414a <=( a7643a and a7634a );
a415a <=( a7625a and a7616a );
a416a <=( a7607a and a7598a );
a417a <=( a7589a and a7580a );
a418a <=( a7571a and a7562a );
a419a <=( a7553a and a7544a );
a420a <=( a7535a and a7526a );
a421a <=( a7517a and a7508a );
a422a <=( a7499a and a7490a );
a423a <=( a7481a and a7472a );
a424a <=( a7463a and a7454a );
a425a <=( a7445a and a7436a );
a426a <=( a7427a and a7418a );
a427a <=( a7409a and a7400a );
a428a <=( a7391a and a7382a );
a429a <=( a7373a and a7364a );
a430a <=( a7355a and a7346a );
a431a <=( a7337a and a7328a );
a432a <=( a7319a and a7310a );
a433a <=( a7301a and a7292a );
a434a <=( a7283a and a7274a );
a435a <=( a7265a and a7256a );
a436a <=( a7247a and a7238a );
a437a <=( a7229a and a7220a );
a438a <=( a7211a and a7202a );
a439a <=( a7193a and a7184a );
a440a <=( a7175a and a7166a );
a441a <=( a7157a and a7148a );
a442a <=( a7139a and a7130a );
a443a <=( a7121a and a7112a );
a444a <=( a7103a and a7094a );
a445a <=( a7085a and a7076a );
a446a <=( a7067a and a7058a );
a447a <=( a7049a and a7040a );
a448a <=( a7031a and a7022a );
a449a <=( a7013a and a7004a );
a450a <=( a6995a and a6986a );
a451a <=( a6977a and a6968a );
a452a <=( a6959a and a6950a );
a453a <=( a6941a and a6932a );
a454a <=( a6923a and a6914a );
a455a <=( a6905a and a6896a );
a456a <=( a6887a and a6878a );
a457a <=( a6869a and a6860a );
a458a <=( a6851a and a6842a );
a459a <=( a6833a and a6824a );
a460a <=( a6815a and a6806a );
a461a <=( a6797a and a6788a );
a462a <=( a6779a and a6770a );
a463a <=( a6761a and a6752a );
a464a <=( a6743a and a6734a );
a465a <=( a6725a and a6716a );
a466a <=( a6707a and a6698a );
a467a <=( a6689a and a6680a );
a468a <=( a6671a and a6662a );
a469a <=( a6653a and a6644a );
a470a <=( a6635a and a6626a );
a471a <=( a6617a and a6608a );
a472a <=( a6599a and a6590a );
a473a <=( a6581a and a6572a );
a474a <=( a6565a and a6556a );
a475a <=( a6549a and a6540a );
a476a <=( a6533a and a6524a );
a477a <=( a6517a and a6508a );
a478a <=( a6501a and a6492a );
a479a <=( a6485a and a6476a );
a480a <=( a6469a and a6460a );
a481a <=( a6453a and a6444a );
a482a <=( a6437a and a6428a );
a483a <=( a6421a and a6412a );
a484a <=( a6405a and a6396a );
a485a <=( a6389a and a6380a );
a486a <=( a6373a and a6364a );
a487a <=( a6357a and a6348a );
a488a <=( a6341a and a6332a );
a489a <=( a6325a and a6316a );
a490a <=( a6309a and a6300a );
a491a <=( a6293a and a6284a );
a492a <=( a6277a and a6268a );
a493a <=( a6261a and a6252a );
a494a <=( a6245a and a6236a );
a495a <=( a6229a and a6220a );
a496a <=( a6213a and a6204a );
a497a <=( a6197a and a6188a );
a498a <=( a6181a and a6172a );
a499a <=( a6165a and a6156a );
a500a <=( a6149a and a6140a );
a501a <=( a6133a and a6124a );
a502a <=( a6117a and a6108a );
a503a <=( a6101a and a6092a );
a504a <=( a6085a and a6076a );
a505a <=( a6069a and a6060a );
a506a <=( a6053a and a6044a );
a507a <=( a6037a and a6028a );
a508a <=( a6021a and a6012a );
a509a <=( a6005a and a5996a );
a510a <=( a5989a and a5980a );
a511a <=( a5973a and a5964a );
a512a <=( a5957a and a5948a );
a513a <=( a5941a and a5932a );
a514a <=( a5925a and a5916a );
a515a <=( a5909a and a5900a );
a516a <=( a5893a and a5884a );
a517a <=( a5877a and a5868a );
a518a <=( a5861a and a5852a );
a519a <=( a5845a and a5836a );
a520a <=( a5829a and a5820a );
a521a <=( a5813a and a5804a );
a522a <=( a5797a and a5788a );
a523a <=( a5781a and a5772a );
a524a <=( a5765a and a5756a );
a525a <=( a5749a and a5740a );
a526a <=( a5733a and a5724a );
a527a <=( a5717a and a5708a );
a528a <=( a5701a and a5692a );
a529a <=( a5685a and a5676a );
a530a <=( a5669a and a5660a );
a531a <=( a5653a and a5644a );
a532a <=( a5637a and a5628a );
a533a <=( a5621a and a5612a );
a534a <=( a5605a and a5596a );
a535a <=( a5589a and a5580a );
a536a <=( a5573a and a5564a );
a537a <=( a5557a and a5548a );
a538a <=( a5541a and a5532a );
a539a <=( a5525a and a5516a );
a540a <=( a5509a and a5500a );
a541a <=( a5493a and a5484a );
a542a <=( a5477a and a5468a );
a543a <=( a5461a and a5452a );
a544a <=( a5445a and a5436a );
a545a <=( a5429a and a5420a );
a546a <=( a5413a and a5404a );
a547a <=( a5397a and a5388a );
a548a <=( a5381a and a5372a );
a549a <=( a5365a and a5356a );
a550a <=( a5349a and a5340a );
a551a <=( a5333a and a5324a );
a552a <=( a5317a and a5308a );
a553a <=( a5301a and a5292a );
a554a <=( a5285a and a5276a );
a555a <=( a5269a and a5260a );
a556a <=( a5253a and a5244a );
a557a <=( a5237a and a5228a );
a558a <=( a5221a and a5212a );
a559a <=( a5205a and a5196a );
a560a <=( a5189a and a5180a );
a561a <=( a5173a and a5164a );
a562a <=( a5157a and a5148a );
a563a <=( a5141a and a5132a );
a564a <=( a5125a and a5116a );
a565a <=( a5109a and a5100a );
a566a <=( a5093a and a5084a );
a567a <=( a5077a and a5068a );
a568a <=( a5061a and a5052a );
a569a <=( a5045a and a5036a );
a570a <=( a5029a and a5020a );
a571a <=( a5013a and a5004a );
a572a <=( a4997a and a4988a );
a573a <=( a4981a and a4972a );
a574a <=( a4965a and a4956a );
a575a <=( a4949a and a4940a );
a576a <=( a4933a and a4924a );
a577a <=( a4917a and a4908a );
a578a <=( a4901a and a4892a );
a579a <=( a4885a and a4876a );
a580a <=( a4869a and a4860a );
a581a <=( a4853a and a4844a );
a582a <=( a4837a and a4828a );
a583a <=( a4821a and a4812a );
a584a <=( a4805a and a4796a );
a585a <=( a4789a and a4780a );
a586a <=( a4773a and a4764a );
a587a <=( a4757a and a4748a );
a588a <=( a4741a and a4732a );
a589a <=( a4725a and a4716a );
a590a <=( a4709a and a4700a );
a591a <=( a4693a and a4684a );
a592a <=( a4677a and a4668a );
a593a <=( a4661a and a4652a );
a594a <=( a4645a and a4636a );
a595a <=( a4629a and a4620a );
a596a <=( a4613a and a4604a );
a597a <=( a4597a and a4588a );
a598a <=( a4581a and a4572a );
a599a <=( a4565a and a4556a );
a600a <=( a4549a and a4540a );
a601a <=( a4533a and a4524a );
a602a <=( a4517a and a4508a );
a603a <=( a4501a and a4492a );
a604a <=( a4485a and a4476a );
a605a <=( a4469a and a4460a );
a606a <=( a4453a and a4444a );
a607a <=( a4437a and a4428a );
a608a <=( a4421a and a4412a );
a609a <=( a4405a and a4396a );
a610a <=( a4389a and a4380a );
a611a <=( a4373a and a4364a );
a612a <=( a4357a and a4348a );
a613a <=( a4341a and a4332a );
a614a <=( a4325a and a4316a );
a615a <=( a4309a and a4300a );
a616a <=( a4293a and a4284a );
a617a <=( a4277a and a4268a );
a618a <=( a4261a and a4252a );
a619a <=( a4245a and a4236a );
a620a <=( a4229a and a4220a );
a621a <=( a4213a and a4204a );
a622a <=( a4197a and a4188a );
a623a <=( a4181a and a4172a );
a624a <=( a4165a and a4156a );
a625a <=( a4149a and a4140a );
a626a <=( a4133a and a4124a );
a627a <=( a4117a and a4108a );
a628a <=( a4101a and a4092a );
a629a <=( a4085a and a4076a );
a630a <=( a4069a and a4060a );
a631a <=( a4053a and a4044a );
a632a <=( a4037a and a4028a );
a633a <=( a4021a and a4012a );
a634a <=( a4005a and a3996a );
a635a <=( a3989a and a3980a );
a636a <=( a3973a and a3964a );
a637a <=( a3957a and a3950a );
a638a <=( a3943a and a3936a );
a639a <=( a3929a and a3922a );
a640a <=( a3915a and a3908a );
a641a <=( a3901a and a3894a );
a642a <=( a3887a and a3880a );
a643a <=( a3873a and a3866a );
a644a <=( a3859a and a3852a );
a645a <=( a3845a and a3838a );
a646a <=( a3831a and a3824a );
a647a <=( a3817a and a3810a );
a648a <=( a3803a and a3796a );
a649a <=( a3789a and a3782a );
a650a <=( a3775a and a3768a );
a651a <=( a3761a and a3754a );
a652a <=( a3747a and a3740a );
a653a <=( a3733a and a3726a );
a654a <=( a3719a and a3712a );
a655a <=( a3705a and a3698a );
a656a <=( a3691a and a3684a );
a657a <=( a3677a and a3670a );
a658a <=( a3663a and a3656a );
a659a <=( a3649a and a3642a );
a660a <=( a3635a and a3628a );
a661a <=( a3621a and a3614a );
a662a <=( a3607a and a3600a );
a663a <=( a3593a and a3586a );
a664a <=( a3579a and a3572a );
a665a <=( a3565a and a3558a );
a666a <=( a3551a and a3544a );
a667a <=( a3537a and a3530a );
a668a <=( a3523a and a3516a );
a669a <=( a3509a and a3502a );
a670a <=( a3495a and a3488a );
a671a <=( a3481a and a3474a );
a672a <=( a3467a and a3460a );
a673a <=( a3453a and a3446a );
a674a <=( a3439a and a3432a );
a675a <=( a3425a and a3418a );
a676a <=( a3411a and a3404a );
a677a <=( a3397a and a3390a );
a678a <=( a3383a and a3376a );
a679a <=( a3369a and a3362a );
a680a <=( a3355a and a3348a );
a681a <=( a3341a and a3334a );
a682a <=( a3327a and a3320a );
a683a <=( a3313a and a3306a );
a684a <=( a3299a and a3292a );
a685a <=( a3285a and a3278a );
a686a <=( a3271a and a3264a );
a687a <=( a3257a and a3250a );
a688a <=( a3243a and a3236a );
a689a <=( a3229a and a3222a );
a690a <=( a3215a and a3208a );
a691a <=( a3201a and a3194a );
a692a <=( a3187a and a3180a );
a693a <=( a3173a and a3166a );
a694a <=( a3159a and a3152a );
a695a <=( a3145a and a3138a );
a696a <=( a3131a and a3124a );
a697a <=( a3117a and a3110a );
a698a <=( a3103a and a3096a );
a699a <=( a3089a and a3082a );
a700a <=( a3075a and a3068a );
a701a <=( a3061a and a3054a );
a702a <=( a3047a and a3040a );
a703a <=( a3033a and a3026a );
a704a <=( a3019a and a3012a );
a705a <=( a3005a and a2998a );
a706a <=( a2991a and a2984a );
a707a <=( a2977a and a2970a );
a708a <=( a2963a and a2956a );
a709a <=( a2949a and a2942a );
a710a <=( a2935a and a2928a );
a711a <=( a2921a and a2914a );
a712a <=( a2907a and a2900a );
a713a <=( a2893a and a2886a );
a714a <=( a2879a and a2872a );
a715a <=( a2865a and a2858a );
a716a <=( a2851a and a2844a );
a717a <=( a2837a and a2830a );
a718a <=( a2823a and a2816a );
a719a <=( a2809a and a2802a );
a720a <=( a2795a and a2788a );
a721a <=( a2781a and a2774a );
a722a <=( a2769a and a2762a );
a723a <=( a2757a and a2750a );
a724a <=( a2745a and a2738a );
a725a <=( a2733a and a2726a );
a726a <=( a2721a and a2714a );
a727a <=( a2709a and a2702a );
a728a <=( a2697a and a2690a );
a729a <=( a2685a and a2678a );
a730a <=( a2673a and a2666a );
a731a <=( a2661a and a2654a );
a732a <=( a2649a and a2642a );
a733a <=( a2637a and a2630a );
a734a <=( a2625a and a2618a );
a735a <=( a2613a and a2606a );
a736a <=( a2601a and a2594a );
a737a <=( a2589a and a2582a );
a738a <=( a2577a and a2570a );
a739a <=( a2565a and a2558a );
a740a <=( a2553a and a2546a );
a741a <=( a2541a and a2534a );
a742a <=( a2529a and a2522a );
a743a <=( a2517a and a2510a );
a744a <=( a2505a and a2498a );
a745a <=( a2493a and a2486a );
a746a <=( a2481a and a2474a );
a747a <=( a2469a and a2462a );
a748a <=( a2457a and a2450a );
a749a <=( a2445a and a2440a );
a750a <=( a2435a and a2430a );
a751a <=( a2425a and a2420a );
a752a <=( a2415a and a2410a );
a753a <=( a2405a and a2400a );
a754a <=( a2395a and a2390a );
a755a <=( a2385a and a2380a );
a756a <=( a2375a and a2370a );
a757a <=( a2365a and a2360a );
a758a <=( a2355a and a2350a );
a759a <=( a2345a and a2340a );
a760a <=( a2337a and a2332a );
a761a <=( a2329a and a2324a );
a762a <=( a2321a and a2316a );
a763a <=( a2313a and a2308a );
a764a <=( a2305a and a2302a );
a765a <=( a2299a and a2296a );
a768a <=( a764a ) or ( a765a );
a772a <=( a761a ) or ( a762a );
a773a <=( a763a ) or ( a772a );
a774a <=( a773a ) or ( a768a );
a778a <=( a758a ) or ( a759a );
a779a <=( a760a ) or ( a778a );
a783a <=( a755a ) or ( a756a );
a784a <=( a757a ) or ( a783a );
a785a <=( a784a ) or ( a779a );
a786a <=( a785a ) or ( a774a );
a790a <=( a752a ) or ( a753a );
a791a <=( a754a ) or ( a790a );
a795a <=( a749a ) or ( a750a );
a796a <=( a751a ) or ( a795a );
a797a <=( a796a ) or ( a791a );
a801a <=( a746a ) or ( a747a );
a802a <=( a748a ) or ( a801a );
a806a <=( a743a ) or ( a744a );
a807a <=( a745a ) or ( a806a );
a808a <=( a807a ) or ( a802a );
a809a <=( a808a ) or ( a797a );
a810a <=( a809a ) or ( a786a );
a814a <=( a740a ) or ( a741a );
a815a <=( a742a ) or ( a814a );
a819a <=( a737a ) or ( a738a );
a820a <=( a739a ) or ( a819a );
a821a <=( a820a ) or ( a815a );
a825a <=( a734a ) or ( a735a );
a826a <=( a736a ) or ( a825a );
a830a <=( a731a ) or ( a732a );
a831a <=( a733a ) or ( a830a );
a832a <=( a831a ) or ( a826a );
a833a <=( a832a ) or ( a821a );
a837a <=( a728a ) or ( a729a );
a838a <=( a730a ) or ( a837a );
a842a <=( a725a ) or ( a726a );
a843a <=( a727a ) or ( a842a );
a844a <=( a843a ) or ( a838a );
a848a <=( a722a ) or ( a723a );
a849a <=( a724a ) or ( a848a );
a853a <=( a719a ) or ( a720a );
a854a <=( a721a ) or ( a853a );
a855a <=( a854a ) or ( a849a );
a856a <=( a855a ) or ( a844a );
a857a <=( a856a ) or ( a833a );
a858a <=( a857a ) or ( a810a );
a862a <=( a716a ) or ( a717a );
a863a <=( a718a ) or ( a862a );
a867a <=( a713a ) or ( a714a );
a868a <=( a715a ) or ( a867a );
a869a <=( a868a ) or ( a863a );
a873a <=( a710a ) or ( a711a );
a874a <=( a712a ) or ( a873a );
a878a <=( a707a ) or ( a708a );
a879a <=( a709a ) or ( a878a );
a880a <=( a879a ) or ( a874a );
a881a <=( a880a ) or ( a869a );
a885a <=( a704a ) or ( a705a );
a886a <=( a706a ) or ( a885a );
a890a <=( a701a ) or ( a702a );
a891a <=( a703a ) or ( a890a );
a892a <=( a891a ) or ( a886a );
a896a <=( a698a ) or ( a699a );
a897a <=( a700a ) or ( a896a );
a901a <=( a695a ) or ( a696a );
a902a <=( a697a ) or ( a901a );
a903a <=( a902a ) or ( a897a );
a904a <=( a903a ) or ( a892a );
a905a <=( a904a ) or ( a881a );
a909a <=( a692a ) or ( a693a );
a910a <=( a694a ) or ( a909a );
a914a <=( a689a ) or ( a690a );
a915a <=( a691a ) or ( a914a );
a916a <=( a915a ) or ( a910a );
a920a <=( a686a ) or ( a687a );
a921a <=( a688a ) or ( a920a );
a925a <=( a683a ) or ( a684a );
a926a <=( a685a ) or ( a925a );
a927a <=( a926a ) or ( a921a );
a928a <=( a927a ) or ( a916a );
a932a <=( a680a ) or ( a681a );
a933a <=( a682a ) or ( a932a );
a937a <=( a677a ) or ( a678a );
a938a <=( a679a ) or ( a937a );
a939a <=( a938a ) or ( a933a );
a943a <=( a674a ) or ( a675a );
a944a <=( a676a ) or ( a943a );
a948a <=( a671a ) or ( a672a );
a949a <=( a673a ) or ( a948a );
a950a <=( a949a ) or ( a944a );
a951a <=( a950a ) or ( a939a );
a952a <=( a951a ) or ( a928a );
a953a <=( a952a ) or ( a905a );
a954a <=( a953a ) or ( a858a );
a958a <=( a668a ) or ( a669a );
a959a <=( a670a ) or ( a958a );
a963a <=( a665a ) or ( a666a );
a964a <=( a667a ) or ( a963a );
a965a <=( a964a ) or ( a959a );
a969a <=( a662a ) or ( a663a );
a970a <=( a664a ) or ( a969a );
a974a <=( a659a ) or ( a660a );
a975a <=( a661a ) or ( a974a );
a976a <=( a975a ) or ( a970a );
a977a <=( a976a ) or ( a965a );
a981a <=( a656a ) or ( a657a );
a982a <=( a658a ) or ( a981a );
a986a <=( a653a ) or ( a654a );
a987a <=( a655a ) or ( a986a );
a988a <=( a987a ) or ( a982a );
a992a <=( a650a ) or ( a651a );
a993a <=( a652a ) or ( a992a );
a997a <=( a647a ) or ( a648a );
a998a <=( a649a ) or ( a997a );
a999a <=( a998a ) or ( a993a );
a1000a <=( a999a ) or ( a988a );
a1001a <=( a1000a ) or ( a977a );
a1005a <=( a644a ) or ( a645a );
a1006a <=( a646a ) or ( a1005a );
a1010a <=( a641a ) or ( a642a );
a1011a <=( a643a ) or ( a1010a );
a1012a <=( a1011a ) or ( a1006a );
a1016a <=( a638a ) or ( a639a );
a1017a <=( a640a ) or ( a1016a );
a1021a <=( a635a ) or ( a636a );
a1022a <=( a637a ) or ( a1021a );
a1023a <=( a1022a ) or ( a1017a );
a1024a <=( a1023a ) or ( a1012a );
a1028a <=( a632a ) or ( a633a );
a1029a <=( a634a ) or ( a1028a );
a1033a <=( a629a ) or ( a630a );
a1034a <=( a631a ) or ( a1033a );
a1035a <=( a1034a ) or ( a1029a );
a1039a <=( a626a ) or ( a627a );
a1040a <=( a628a ) or ( a1039a );
a1044a <=( a623a ) or ( a624a );
a1045a <=( a625a ) or ( a1044a );
a1046a <=( a1045a ) or ( a1040a );
a1047a <=( a1046a ) or ( a1035a );
a1048a <=( a1047a ) or ( a1024a );
a1049a <=( a1048a ) or ( a1001a );
a1053a <=( a620a ) or ( a621a );
a1054a <=( a622a ) or ( a1053a );
a1058a <=( a617a ) or ( a618a );
a1059a <=( a619a ) or ( a1058a );
a1060a <=( a1059a ) or ( a1054a );
a1064a <=( a614a ) or ( a615a );
a1065a <=( a616a ) or ( a1064a );
a1069a <=( a611a ) or ( a612a );
a1070a <=( a613a ) or ( a1069a );
a1071a <=( a1070a ) or ( a1065a );
a1072a <=( a1071a ) or ( a1060a );
a1076a <=( a608a ) or ( a609a );
a1077a <=( a610a ) or ( a1076a );
a1081a <=( a605a ) or ( a606a );
a1082a <=( a607a ) or ( a1081a );
a1083a <=( a1082a ) or ( a1077a );
a1087a <=( a602a ) or ( a603a );
a1088a <=( a604a ) or ( a1087a );
a1092a <=( a599a ) or ( a600a );
a1093a <=( a601a ) or ( a1092a );
a1094a <=( a1093a ) or ( a1088a );
a1095a <=( a1094a ) or ( a1083a );
a1096a <=( a1095a ) or ( a1072a );
a1100a <=( a596a ) or ( a597a );
a1101a <=( a598a ) or ( a1100a );
a1105a <=( a593a ) or ( a594a );
a1106a <=( a595a ) or ( a1105a );
a1107a <=( a1106a ) or ( a1101a );
a1111a <=( a590a ) or ( a591a );
a1112a <=( a592a ) or ( a1111a );
a1116a <=( a587a ) or ( a588a );
a1117a <=( a589a ) or ( a1116a );
a1118a <=( a1117a ) or ( a1112a );
a1119a <=( a1118a ) or ( a1107a );
a1123a <=( a584a ) or ( a585a );
a1124a <=( a586a ) or ( a1123a );
a1128a <=( a581a ) or ( a582a );
a1129a <=( a583a ) or ( a1128a );
a1130a <=( a1129a ) or ( a1124a );
a1134a <=( a578a ) or ( a579a );
a1135a <=( a580a ) or ( a1134a );
a1139a <=( a575a ) or ( a576a );
a1140a <=( a577a ) or ( a1139a );
a1141a <=( a1140a ) or ( a1135a );
a1142a <=( a1141a ) or ( a1130a );
a1143a <=( a1142a ) or ( a1119a );
a1144a <=( a1143a ) or ( a1096a );
a1145a <=( a1144a ) or ( a1049a );
a1146a <=( a1145a ) or ( a954a );
a1149a <=( a573a ) or ( a574a );
a1153a <=( a570a ) or ( a571a );
a1154a <=( a572a ) or ( a1153a );
a1155a <=( a1154a ) or ( a1149a );
a1159a <=( a567a ) or ( a568a );
a1160a <=( a569a ) or ( a1159a );
a1164a <=( a564a ) or ( a565a );
a1165a <=( a566a ) or ( a1164a );
a1166a <=( a1165a ) or ( a1160a );
a1167a <=( a1166a ) or ( a1155a );
a1171a <=( a561a ) or ( a562a );
a1172a <=( a563a ) or ( a1171a );
a1176a <=( a558a ) or ( a559a );
a1177a <=( a560a ) or ( a1176a );
a1178a <=( a1177a ) or ( a1172a );
a1182a <=( a555a ) or ( a556a );
a1183a <=( a557a ) or ( a1182a );
a1187a <=( a552a ) or ( a553a );
a1188a <=( a554a ) or ( a1187a );
a1189a <=( a1188a ) or ( a1183a );
a1190a <=( a1189a ) or ( a1178a );
a1191a <=( a1190a ) or ( a1167a );
a1195a <=( a549a ) or ( a550a );
a1196a <=( a551a ) or ( a1195a );
a1200a <=( a546a ) or ( a547a );
a1201a <=( a548a ) or ( a1200a );
a1202a <=( a1201a ) or ( a1196a );
a1206a <=( a543a ) or ( a544a );
a1207a <=( a545a ) or ( a1206a );
a1211a <=( a540a ) or ( a541a );
a1212a <=( a542a ) or ( a1211a );
a1213a <=( a1212a ) or ( a1207a );
a1214a <=( a1213a ) or ( a1202a );
a1218a <=( a537a ) or ( a538a );
a1219a <=( a539a ) or ( a1218a );
a1223a <=( a534a ) or ( a535a );
a1224a <=( a536a ) or ( a1223a );
a1225a <=( a1224a ) or ( a1219a );
a1229a <=( a531a ) or ( a532a );
a1230a <=( a533a ) or ( a1229a );
a1234a <=( a528a ) or ( a529a );
a1235a <=( a530a ) or ( a1234a );
a1236a <=( a1235a ) or ( a1230a );
a1237a <=( a1236a ) or ( a1225a );
a1238a <=( a1237a ) or ( a1214a );
a1239a <=( a1238a ) or ( a1191a );
a1243a <=( a525a ) or ( a526a );
a1244a <=( a527a ) or ( a1243a );
a1248a <=( a522a ) or ( a523a );
a1249a <=( a524a ) or ( a1248a );
a1250a <=( a1249a ) or ( a1244a );
a1254a <=( a519a ) or ( a520a );
a1255a <=( a521a ) or ( a1254a );
a1259a <=( a516a ) or ( a517a );
a1260a <=( a518a ) or ( a1259a );
a1261a <=( a1260a ) or ( a1255a );
a1262a <=( a1261a ) or ( a1250a );
a1266a <=( a513a ) or ( a514a );
a1267a <=( a515a ) or ( a1266a );
a1271a <=( a510a ) or ( a511a );
a1272a <=( a512a ) or ( a1271a );
a1273a <=( a1272a ) or ( a1267a );
a1277a <=( a507a ) or ( a508a );
a1278a <=( a509a ) or ( a1277a );
a1282a <=( a504a ) or ( a505a );
a1283a <=( a506a ) or ( a1282a );
a1284a <=( a1283a ) or ( a1278a );
a1285a <=( a1284a ) or ( a1273a );
a1286a <=( a1285a ) or ( a1262a );
a1290a <=( a501a ) or ( a502a );
a1291a <=( a503a ) or ( a1290a );
a1295a <=( a498a ) or ( a499a );
a1296a <=( a500a ) or ( a1295a );
a1297a <=( a1296a ) or ( a1291a );
a1301a <=( a495a ) or ( a496a );
a1302a <=( a497a ) or ( a1301a );
a1306a <=( a492a ) or ( a493a );
a1307a <=( a494a ) or ( a1306a );
a1308a <=( a1307a ) or ( a1302a );
a1309a <=( a1308a ) or ( a1297a );
a1313a <=( a489a ) or ( a490a );
a1314a <=( a491a ) or ( a1313a );
a1318a <=( a486a ) or ( a487a );
a1319a <=( a488a ) or ( a1318a );
a1320a <=( a1319a ) or ( a1314a );
a1324a <=( a483a ) or ( a484a );
a1325a <=( a485a ) or ( a1324a );
a1329a <=( a480a ) or ( a481a );
a1330a <=( a482a ) or ( a1329a );
a1331a <=( a1330a ) or ( a1325a );
a1332a <=( a1331a ) or ( a1320a );
a1333a <=( a1332a ) or ( a1309a );
a1334a <=( a1333a ) or ( a1286a );
a1335a <=( a1334a ) or ( a1239a );
a1339a <=( a477a ) or ( a478a );
a1340a <=( a479a ) or ( a1339a );
a1344a <=( a474a ) or ( a475a );
a1345a <=( a476a ) or ( a1344a );
a1346a <=( a1345a ) or ( a1340a );
a1350a <=( a471a ) or ( a472a );
a1351a <=( a473a ) or ( a1350a );
a1355a <=( a468a ) or ( a469a );
a1356a <=( a470a ) or ( a1355a );
a1357a <=( a1356a ) or ( a1351a );
a1358a <=( a1357a ) or ( a1346a );
a1362a <=( a465a ) or ( a466a );
a1363a <=( a467a ) or ( a1362a );
a1367a <=( a462a ) or ( a463a );
a1368a <=( a464a ) or ( a1367a );
a1369a <=( a1368a ) or ( a1363a );
a1373a <=( a459a ) or ( a460a );
a1374a <=( a461a ) or ( a1373a );
a1378a <=( a456a ) or ( a457a );
a1379a <=( a458a ) or ( a1378a );
a1380a <=( a1379a ) or ( a1374a );
a1381a <=( a1380a ) or ( a1369a );
a1382a <=( a1381a ) or ( a1358a );
a1386a <=( a453a ) or ( a454a );
a1387a <=( a455a ) or ( a1386a );
a1391a <=( a450a ) or ( a451a );
a1392a <=( a452a ) or ( a1391a );
a1393a <=( a1392a ) or ( a1387a );
a1397a <=( a447a ) or ( a448a );
a1398a <=( a449a ) or ( a1397a );
a1402a <=( a444a ) or ( a445a );
a1403a <=( a446a ) or ( a1402a );
a1404a <=( a1403a ) or ( a1398a );
a1405a <=( a1404a ) or ( a1393a );
a1409a <=( a441a ) or ( a442a );
a1410a <=( a443a ) or ( a1409a );
a1414a <=( a438a ) or ( a439a );
a1415a <=( a440a ) or ( a1414a );
a1416a <=( a1415a ) or ( a1410a );
a1420a <=( a435a ) or ( a436a );
a1421a <=( a437a ) or ( a1420a );
a1425a <=( a432a ) or ( a433a );
a1426a <=( a434a ) or ( a1425a );
a1427a <=( a1426a ) or ( a1421a );
a1428a <=( a1427a ) or ( a1416a );
a1429a <=( a1428a ) or ( a1405a );
a1430a <=( a1429a ) or ( a1382a );
a1434a <=( a429a ) or ( a430a );
a1435a <=( a431a ) or ( a1434a );
a1439a <=( a426a ) or ( a427a );
a1440a <=( a428a ) or ( a1439a );
a1441a <=( a1440a ) or ( a1435a );
a1445a <=( a423a ) or ( a424a );
a1446a <=( a425a ) or ( a1445a );
a1450a <=( a420a ) or ( a421a );
a1451a <=( a422a ) or ( a1450a );
a1452a <=( a1451a ) or ( a1446a );
a1453a <=( a1452a ) or ( a1441a );
a1457a <=( a417a ) or ( a418a );
a1458a <=( a419a ) or ( a1457a );
a1462a <=( a414a ) or ( a415a );
a1463a <=( a416a ) or ( a1462a );
a1464a <=( a1463a ) or ( a1458a );
a1468a <=( a411a ) or ( a412a );
a1469a <=( a413a ) or ( a1468a );
a1473a <=( a408a ) or ( a409a );
a1474a <=( a410a ) or ( a1473a );
a1475a <=( a1474a ) or ( a1469a );
a1476a <=( a1475a ) or ( a1464a );
a1477a <=( a1476a ) or ( a1453a );
a1481a <=( a405a ) or ( a406a );
a1482a <=( a407a ) or ( a1481a );
a1486a <=( a402a ) or ( a403a );
a1487a <=( a404a ) or ( a1486a );
a1488a <=( a1487a ) or ( a1482a );
a1492a <=( a399a ) or ( a400a );
a1493a <=( a401a ) or ( a1492a );
a1497a <=( a396a ) or ( a397a );
a1498a <=( a398a ) or ( a1497a );
a1499a <=( a1498a ) or ( a1493a );
a1500a <=( a1499a ) or ( a1488a );
a1504a <=( a393a ) or ( a394a );
a1505a <=( a395a ) or ( a1504a );
a1509a <=( a390a ) or ( a391a );
a1510a <=( a392a ) or ( a1509a );
a1511a <=( a1510a ) or ( a1505a );
a1515a <=( a387a ) or ( a388a );
a1516a <=( a389a ) or ( a1515a );
a1520a <=( a384a ) or ( a385a );
a1521a <=( a386a ) or ( a1520a );
a1522a <=( a1521a ) or ( a1516a );
a1523a <=( a1522a ) or ( a1511a );
a1524a <=( a1523a ) or ( a1500a );
a1525a <=( a1524a ) or ( a1477a );
a1526a <=( a1525a ) or ( a1430a );
a1527a <=( a1526a ) or ( a1335a );
a1528a <=( a1527a ) or ( a1146a );
a1531a <=( a382a ) or ( a383a );
a1535a <=( a379a ) or ( a380a );
a1536a <=( a381a ) or ( a1535a );
a1537a <=( a1536a ) or ( a1531a );
a1541a <=( a376a ) or ( a377a );
a1542a <=( a378a ) or ( a1541a );
a1546a <=( a373a ) or ( a374a );
a1547a <=( a375a ) or ( a1546a );
a1548a <=( a1547a ) or ( a1542a );
a1549a <=( a1548a ) or ( a1537a );
a1553a <=( a370a ) or ( a371a );
a1554a <=( a372a ) or ( a1553a );
a1558a <=( a367a ) or ( a368a );
a1559a <=( a369a ) or ( a1558a );
a1560a <=( a1559a ) or ( a1554a );
a1564a <=( a364a ) or ( a365a );
a1565a <=( a366a ) or ( a1564a );
a1569a <=( a361a ) or ( a362a );
a1570a <=( a363a ) or ( a1569a );
a1571a <=( a1570a ) or ( a1565a );
a1572a <=( a1571a ) or ( a1560a );
a1573a <=( a1572a ) or ( a1549a );
a1577a <=( a358a ) or ( a359a );
a1578a <=( a360a ) or ( a1577a );
a1582a <=( a355a ) or ( a356a );
a1583a <=( a357a ) or ( a1582a );
a1584a <=( a1583a ) or ( a1578a );
a1588a <=( a352a ) or ( a353a );
a1589a <=( a354a ) or ( a1588a );
a1593a <=( a349a ) or ( a350a );
a1594a <=( a351a ) or ( a1593a );
a1595a <=( a1594a ) or ( a1589a );
a1596a <=( a1595a ) or ( a1584a );
a1600a <=( a346a ) or ( a347a );
a1601a <=( a348a ) or ( a1600a );
a1605a <=( a343a ) or ( a344a );
a1606a <=( a345a ) or ( a1605a );
a1607a <=( a1606a ) or ( a1601a );
a1611a <=( a340a ) or ( a341a );
a1612a <=( a342a ) or ( a1611a );
a1616a <=( a337a ) or ( a338a );
a1617a <=( a339a ) or ( a1616a );
a1618a <=( a1617a ) or ( a1612a );
a1619a <=( a1618a ) or ( a1607a );
a1620a <=( a1619a ) or ( a1596a );
a1621a <=( a1620a ) or ( a1573a );
a1625a <=( a334a ) or ( a335a );
a1626a <=( a336a ) or ( a1625a );
a1630a <=( a331a ) or ( a332a );
a1631a <=( a333a ) or ( a1630a );
a1632a <=( a1631a ) or ( a1626a );
a1636a <=( a328a ) or ( a329a );
a1637a <=( a330a ) or ( a1636a );
a1641a <=( a325a ) or ( a326a );
a1642a <=( a327a ) or ( a1641a );
a1643a <=( a1642a ) or ( a1637a );
a1644a <=( a1643a ) or ( a1632a );
a1648a <=( a322a ) or ( a323a );
a1649a <=( a324a ) or ( a1648a );
a1653a <=( a319a ) or ( a320a );
a1654a <=( a321a ) or ( a1653a );
a1655a <=( a1654a ) or ( a1649a );
a1659a <=( a316a ) or ( a317a );
a1660a <=( a318a ) or ( a1659a );
a1664a <=( a313a ) or ( a314a );
a1665a <=( a315a ) or ( a1664a );
a1666a <=( a1665a ) or ( a1660a );
a1667a <=( a1666a ) or ( a1655a );
a1668a <=( a1667a ) or ( a1644a );
a1672a <=( a310a ) or ( a311a );
a1673a <=( a312a ) or ( a1672a );
a1677a <=( a307a ) or ( a308a );
a1678a <=( a309a ) or ( a1677a );
a1679a <=( a1678a ) or ( a1673a );
a1683a <=( a304a ) or ( a305a );
a1684a <=( a306a ) or ( a1683a );
a1688a <=( a301a ) or ( a302a );
a1689a <=( a303a ) or ( a1688a );
a1690a <=( a1689a ) or ( a1684a );
a1691a <=( a1690a ) or ( a1679a );
a1695a <=( a298a ) or ( a299a );
a1696a <=( a300a ) or ( a1695a );
a1700a <=( a295a ) or ( a296a );
a1701a <=( a297a ) or ( a1700a );
a1702a <=( a1701a ) or ( a1696a );
a1706a <=( a292a ) or ( a293a );
a1707a <=( a294a ) or ( a1706a );
a1711a <=( a289a ) or ( a290a );
a1712a <=( a291a ) or ( a1711a );
a1713a <=( a1712a ) or ( a1707a );
a1714a <=( a1713a ) or ( a1702a );
a1715a <=( a1714a ) or ( a1691a );
a1716a <=( a1715a ) or ( a1668a );
a1717a <=( a1716a ) or ( a1621a );
a1721a <=( a286a ) or ( a287a );
a1722a <=( a288a ) or ( a1721a );
a1726a <=( a283a ) or ( a284a );
a1727a <=( a285a ) or ( a1726a );
a1728a <=( a1727a ) or ( a1722a );
a1732a <=( a280a ) or ( a281a );
a1733a <=( a282a ) or ( a1732a );
a1737a <=( a277a ) or ( a278a );
a1738a <=( a279a ) or ( a1737a );
a1739a <=( a1738a ) or ( a1733a );
a1740a <=( a1739a ) or ( a1728a );
a1744a <=( a274a ) or ( a275a );
a1745a <=( a276a ) or ( a1744a );
a1749a <=( a271a ) or ( a272a );
a1750a <=( a273a ) or ( a1749a );
a1751a <=( a1750a ) or ( a1745a );
a1755a <=( a268a ) or ( a269a );
a1756a <=( a270a ) or ( a1755a );
a1760a <=( a265a ) or ( a266a );
a1761a <=( a267a ) or ( a1760a );
a1762a <=( a1761a ) or ( a1756a );
a1763a <=( a1762a ) or ( a1751a );
a1764a <=( a1763a ) or ( a1740a );
a1768a <=( a262a ) or ( a263a );
a1769a <=( a264a ) or ( a1768a );
a1773a <=( a259a ) or ( a260a );
a1774a <=( a261a ) or ( a1773a );
a1775a <=( a1774a ) or ( a1769a );
a1779a <=( a256a ) or ( a257a );
a1780a <=( a258a ) or ( a1779a );
a1784a <=( a253a ) or ( a254a );
a1785a <=( a255a ) or ( a1784a );
a1786a <=( a1785a ) or ( a1780a );
a1787a <=( a1786a ) or ( a1775a );
a1791a <=( a250a ) or ( a251a );
a1792a <=( a252a ) or ( a1791a );
a1796a <=( a247a ) or ( a248a );
a1797a <=( a249a ) or ( a1796a );
a1798a <=( a1797a ) or ( a1792a );
a1802a <=( a244a ) or ( a245a );
a1803a <=( a246a ) or ( a1802a );
a1807a <=( a241a ) or ( a242a );
a1808a <=( a243a ) or ( a1807a );
a1809a <=( a1808a ) or ( a1803a );
a1810a <=( a1809a ) or ( a1798a );
a1811a <=( a1810a ) or ( a1787a );
a1812a <=( a1811a ) or ( a1764a );
a1816a <=( a238a ) or ( a239a );
a1817a <=( a240a ) or ( a1816a );
a1821a <=( a235a ) or ( a236a );
a1822a <=( a237a ) or ( a1821a );
a1823a <=( a1822a ) or ( a1817a );
a1827a <=( a232a ) or ( a233a );
a1828a <=( a234a ) or ( a1827a );
a1832a <=( a229a ) or ( a230a );
a1833a <=( a231a ) or ( a1832a );
a1834a <=( a1833a ) or ( a1828a );
a1835a <=( a1834a ) or ( a1823a );
a1839a <=( a226a ) or ( a227a );
a1840a <=( a228a ) or ( a1839a );
a1844a <=( a223a ) or ( a224a );
a1845a <=( a225a ) or ( a1844a );
a1846a <=( a1845a ) or ( a1840a );
a1850a <=( a220a ) or ( a221a );
a1851a <=( a222a ) or ( a1850a );
a1855a <=( a217a ) or ( a218a );
a1856a <=( a219a ) or ( a1855a );
a1857a <=( a1856a ) or ( a1851a );
a1858a <=( a1857a ) or ( a1846a );
a1859a <=( a1858a ) or ( a1835a );
a1863a <=( a214a ) or ( a215a );
a1864a <=( a216a ) or ( a1863a );
a1868a <=( a211a ) or ( a212a );
a1869a <=( a213a ) or ( a1868a );
a1870a <=( a1869a ) or ( a1864a );
a1874a <=( a208a ) or ( a209a );
a1875a <=( a210a ) or ( a1874a );
a1879a <=( a205a ) or ( a206a );
a1880a <=( a207a ) or ( a1879a );
a1881a <=( a1880a ) or ( a1875a );
a1882a <=( a1881a ) or ( a1870a );
a1886a <=( a202a ) or ( a203a );
a1887a <=( a204a ) or ( a1886a );
a1891a <=( a199a ) or ( a200a );
a1892a <=( a201a ) or ( a1891a );
a1893a <=( a1892a ) or ( a1887a );
a1897a <=( a196a ) or ( a197a );
a1898a <=( a198a ) or ( a1897a );
a1902a <=( a193a ) or ( a194a );
a1903a <=( a195a ) or ( a1902a );
a1904a <=( a1903a ) or ( a1898a );
a1905a <=( a1904a ) or ( a1893a );
a1906a <=( a1905a ) or ( a1882a );
a1907a <=( a1906a ) or ( a1859a );
a1908a <=( a1907a ) or ( a1812a );
a1909a <=( a1908a ) or ( a1717a );
a1913a <=( a190a ) or ( a191a );
a1914a <=( a192a ) or ( a1913a );
a1918a <=( a187a ) or ( a188a );
a1919a <=( a189a ) or ( a1918a );
a1920a <=( a1919a ) or ( a1914a );
a1924a <=( a184a ) or ( a185a );
a1925a <=( a186a ) or ( a1924a );
a1929a <=( a181a ) or ( a182a );
a1930a <=( a183a ) or ( a1929a );
a1931a <=( a1930a ) or ( a1925a );
a1932a <=( a1931a ) or ( a1920a );
a1936a <=( a178a ) or ( a179a );
a1937a <=( a180a ) or ( a1936a );
a1941a <=( a175a ) or ( a176a );
a1942a <=( a177a ) or ( a1941a );
a1943a <=( a1942a ) or ( a1937a );
a1947a <=( a172a ) or ( a173a );
a1948a <=( a174a ) or ( a1947a );
a1952a <=( a169a ) or ( a170a );
a1953a <=( a171a ) or ( a1952a );
a1954a <=( a1953a ) or ( a1948a );
a1955a <=( a1954a ) or ( a1943a );
a1956a <=( a1955a ) or ( a1932a );
a1960a <=( a166a ) or ( a167a );
a1961a <=( a168a ) or ( a1960a );
a1965a <=( a163a ) or ( a164a );
a1966a <=( a165a ) or ( a1965a );
a1967a <=( a1966a ) or ( a1961a );
a1971a <=( a160a ) or ( a161a );
a1972a <=( a162a ) or ( a1971a );
a1976a <=( a157a ) or ( a158a );
a1977a <=( a159a ) or ( a1976a );
a1978a <=( a1977a ) or ( a1972a );
a1979a <=( a1978a ) or ( a1967a );
a1983a <=( a154a ) or ( a155a );
a1984a <=( a156a ) or ( a1983a );
a1988a <=( a151a ) or ( a152a );
a1989a <=( a153a ) or ( a1988a );
a1990a <=( a1989a ) or ( a1984a );
a1994a <=( a148a ) or ( a149a );
a1995a <=( a150a ) or ( a1994a );
a1999a <=( a145a ) or ( a146a );
a2000a <=( a147a ) or ( a1999a );
a2001a <=( a2000a ) or ( a1995a );
a2002a <=( a2001a ) or ( a1990a );
a2003a <=( a2002a ) or ( a1979a );
a2004a <=( a2003a ) or ( a1956a );
a2008a <=( a142a ) or ( a143a );
a2009a <=( a144a ) or ( a2008a );
a2013a <=( a139a ) or ( a140a );
a2014a <=( a141a ) or ( a2013a );
a2015a <=( a2014a ) or ( a2009a );
a2019a <=( a136a ) or ( a137a );
a2020a <=( a138a ) or ( a2019a );
a2024a <=( a133a ) or ( a134a );
a2025a <=( a135a ) or ( a2024a );
a2026a <=( a2025a ) or ( a2020a );
a2027a <=( a2026a ) or ( a2015a );
a2031a <=( a130a ) or ( a131a );
a2032a <=( a132a ) or ( a2031a );
a2036a <=( a127a ) or ( a128a );
a2037a <=( a129a ) or ( a2036a );
a2038a <=( a2037a ) or ( a2032a );
a2042a <=( a124a ) or ( a125a );
a2043a <=( a126a ) or ( a2042a );
a2047a <=( a121a ) or ( a122a );
a2048a <=( a123a ) or ( a2047a );
a2049a <=( a2048a ) or ( a2043a );
a2050a <=( a2049a ) or ( a2038a );
a2051a <=( a2050a ) or ( a2027a );
a2055a <=( a118a ) or ( a119a );
a2056a <=( a120a ) or ( a2055a );
a2060a <=( a115a ) or ( a116a );
a2061a <=( a117a ) or ( a2060a );
a2062a <=( a2061a ) or ( a2056a );
a2066a <=( a112a ) or ( a113a );
a2067a <=( a114a ) or ( a2066a );
a2071a <=( a109a ) or ( a110a );
a2072a <=( a111a ) or ( a2071a );
a2073a <=( a2072a ) or ( a2067a );
a2074a <=( a2073a ) or ( a2062a );
a2078a <=( a106a ) or ( a107a );
a2079a <=( a108a ) or ( a2078a );
a2083a <=( a103a ) or ( a104a );
a2084a <=( a105a ) or ( a2083a );
a2085a <=( a2084a ) or ( a2079a );
a2089a <=( a100a ) or ( a101a );
a2090a <=( a102a ) or ( a2089a );
a2094a <=( a97a ) or ( a98a );
a2095a <=( a99a ) or ( a2094a );
a2096a <=( a2095a ) or ( a2090a );
a2097a <=( a2096a ) or ( a2085a );
a2098a <=( a2097a ) or ( a2074a );
a2099a <=( a2098a ) or ( a2051a );
a2100a <=( a2099a ) or ( a2004a );
a2104a <=( a94a ) or ( a95a );
a2105a <=( a96a ) or ( a2104a );
a2109a <=( a91a ) or ( a92a );
a2110a <=( a93a ) or ( a2109a );
a2111a <=( a2110a ) or ( a2105a );
a2115a <=( a88a ) or ( a89a );
a2116a <=( a90a ) or ( a2115a );
a2120a <=( a85a ) or ( a86a );
a2121a <=( a87a ) or ( a2120a );
a2122a <=( a2121a ) or ( a2116a );
a2123a <=( a2122a ) or ( a2111a );
a2127a <=( a82a ) or ( a83a );
a2128a <=( a84a ) or ( a2127a );
a2132a <=( a79a ) or ( a80a );
a2133a <=( a81a ) or ( a2132a );
a2134a <=( a2133a ) or ( a2128a );
a2138a <=( a76a ) or ( a77a );
a2139a <=( a78a ) or ( a2138a );
a2143a <=( a73a ) or ( a74a );
a2144a <=( a75a ) or ( a2143a );
a2145a <=( a2144a ) or ( a2139a );
a2146a <=( a2145a ) or ( a2134a );
a2147a <=( a2146a ) or ( a2123a );
a2151a <=( a70a ) or ( a71a );
a2152a <=( a72a ) or ( a2151a );
a2156a <=( a67a ) or ( a68a );
a2157a <=( a69a ) or ( a2156a );
a2158a <=( a2157a ) or ( a2152a );
a2162a <=( a64a ) or ( a65a );
a2163a <=( a66a ) or ( a2162a );
a2167a <=( a61a ) or ( a62a );
a2168a <=( a63a ) or ( a2167a );
a2169a <=( a2168a ) or ( a2163a );
a2170a <=( a2169a ) or ( a2158a );
a2174a <=( a58a ) or ( a59a );
a2175a <=( a60a ) or ( a2174a );
a2179a <=( a55a ) or ( a56a );
a2180a <=( a57a ) or ( a2179a );
a2181a <=( a2180a ) or ( a2175a );
a2185a <=( a52a ) or ( a53a );
a2186a <=( a54a ) or ( a2185a );
a2190a <=( a49a ) or ( a50a );
a2191a <=( a51a ) or ( a2190a );
a2192a <=( a2191a ) or ( a2186a );
a2193a <=( a2192a ) or ( a2181a );
a2194a <=( a2193a ) or ( a2170a );
a2195a <=( a2194a ) or ( a2147a );
a2199a <=( a46a ) or ( a47a );
a2200a <=( a48a ) or ( a2199a );
a2204a <=( a43a ) or ( a44a );
a2205a <=( a45a ) or ( a2204a );
a2206a <=( a2205a ) or ( a2200a );
a2210a <=( a40a ) or ( a41a );
a2211a <=( a42a ) or ( a2210a );
a2215a <=( a37a ) or ( a38a );
a2216a <=( a39a ) or ( a2215a );
a2217a <=( a2216a ) or ( a2211a );
a2218a <=( a2217a ) or ( a2206a );
a2222a <=( a34a ) or ( a35a );
a2223a <=( a36a ) or ( a2222a );
a2227a <=( a31a ) or ( a32a );
a2228a <=( a33a ) or ( a2227a );
a2229a <=( a2228a ) or ( a2223a );
a2233a <=( a28a ) or ( a29a );
a2234a <=( a30a ) or ( a2233a );
a2238a <=( a25a ) or ( a26a );
a2239a <=( a27a ) or ( a2238a );
a2240a <=( a2239a ) or ( a2234a );
a2241a <=( a2240a ) or ( a2229a );
a2242a <=( a2241a ) or ( a2218a );
a2246a <=( a22a ) or ( a23a );
a2247a <=( a24a ) or ( a2246a );
a2251a <=( a19a ) or ( a20a );
a2252a <=( a21a ) or ( a2251a );
a2253a <=( a2252a ) or ( a2247a );
a2257a <=( a16a ) or ( a17a );
a2258a <=( a18a ) or ( a2257a );
a2262a <=( a13a ) or ( a14a );
a2263a <=( a15a ) or ( a2262a );
a2264a <=( a2263a ) or ( a2258a );
a2265a <=( a2264a ) or ( a2253a );
a2269a <=( a10a ) or ( a11a );
a2270a <=( a12a ) or ( a2269a );
a2274a <=( a7a ) or ( a8a );
a2275a <=( a9a ) or ( a2274a );
a2276a <=( a2275a ) or ( a2270a );
a2280a <=( a4a ) or ( a5a );
a2281a <=( a6a ) or ( a2280a );
a2285a <=( a1a ) or ( a2a );
a2286a <=( a3a ) or ( a2285a );
a2287a <=( a2286a ) or ( a2281a );
a2288a <=( a2287a ) or ( a2276a );
a2289a <=( a2288a ) or ( a2265a );
a2290a <=( a2289a ) or ( a2242a );
a2291a <=( a2290a ) or ( a2195a );
a2292a <=( a2291a ) or ( a2100a );
a2293a <=( a2292a ) or ( a1909a );
a2296a <=( (not A167) and (not A169) );
a2299a <=( A202 and (not A166) );
a2302a <=( (not A169) and (not A170) );
a2305a <=( A202 and (not A168) );
a2308a <=( (not A167) and (not A169) );
a2312a <=( A201 and A199 );
a2313a <=( (not A166) and a2312a );
a2316a <=( (not A167) and (not A169) );
a2320a <=( A201 and A200 );
a2321a <=( (not A166) and a2320a );
a2324a <=( (not A168) and (not A169) );
a2328a <=( A202 and A166 );
a2329a <=( A167 and a2328a );
a2332a <=( (not A169) and (not A170) );
a2336a <=( A201 and A199 );
a2337a <=( (not A168) and a2336a );
a2340a <=( (not A169) and (not A170) );
a2344a <=( A201 and A200 );
a2345a <=( (not A168) and a2344a );
a2349a <=( (not A202) and (not A201) );
a2350a <=( A169 and a2349a );
a2354a <=( A301 and A235 );
a2355a <=( (not A203) and a2354a );
a2359a <=( (not A202) and (not A201) );
a2360a <=( A169 and a2359a );
a2364a <=( A268 and A235 );
a2365a <=( (not A203) and a2364a );
a2369a <=( (not A200) and (not A199) );
a2370a <=( A169 and a2369a );
a2374a <=( A301 and A235 );
a2375a <=( (not A202) and a2374a );
a2379a <=( (not A200) and (not A199) );
a2380a <=( A169 and a2379a );
a2384a <=( A268 and A235 );
a2385a <=( (not A202) and a2384a );
a2389a <=( (not A166) and (not A167) );
a2390a <=( (not A169) and a2389a );
a2394a <=( A203 and A200 );
a2395a <=( (not A199) and a2394a );
a2399a <=( (not A166) and (not A167) );
a2400a <=( (not A169) and a2399a );
a2404a <=( A203 and (not A200) );
a2405a <=( A199 and a2404a );
a2409a <=( A167 and (not A168) );
a2410a <=( (not A169) and a2409a );
a2414a <=( A201 and A199 );
a2415a <=( A166 and a2414a );
a2419a <=( A167 and (not A168) );
a2420a <=( (not A169) and a2419a );
a2424a <=( A201 and A200 );
a2425a <=( A166 and a2424a );
a2429a <=( (not A168) and (not A169) );
a2430a <=( (not A170) and a2429a );
a2434a <=( A203 and A200 );
a2435a <=( (not A199) and a2434a );
a2439a <=( (not A168) and (not A169) );
a2440a <=( (not A170) and a2439a );
a2444a <=( A203 and (not A200) );
a2445a <=( A199 and a2444a );
a2449a <=( (not A201) and A166 );
a2450a <=( A168 and a2449a );
a2453a <=( (not A203) and (not A202) );
a2456a <=( A301 and A235 );
a2457a <=( a2456a and a2453a );
a2461a <=( (not A201) and A166 );
a2462a <=( A168 and a2461a );
a2465a <=( (not A203) and (not A202) );
a2468a <=( A268 and A235 );
a2469a <=( a2468a and a2465a );
a2473a <=( (not A199) and A166 );
a2474a <=( A168 and a2473a );
a2477a <=( (not A202) and (not A200) );
a2480a <=( A301 and A235 );
a2481a <=( a2480a and a2477a );
a2485a <=( (not A199) and A166 );
a2486a <=( A168 and a2485a );
a2489a <=( (not A202) and (not A200) );
a2492a <=( A268 and A235 );
a2493a <=( a2492a and a2489a );
a2497a <=( (not A201) and A167 );
a2498a <=( A168 and a2497a );
a2501a <=( (not A203) and (not A202) );
a2504a <=( A301 and A235 );
a2505a <=( a2504a and a2501a );
a2509a <=( (not A201) and A167 );
a2510a <=( A168 and a2509a );
a2513a <=( (not A203) and (not A202) );
a2516a <=( A268 and A235 );
a2517a <=( a2516a and a2513a );
a2521a <=( (not A199) and A167 );
a2522a <=( A168 and a2521a );
a2525a <=( (not A202) and (not A200) );
a2528a <=( A301 and A235 );
a2529a <=( a2528a and a2525a );
a2533a <=( (not A199) and A167 );
a2534a <=( A168 and a2533a );
a2537a <=( (not A202) and (not A200) );
a2540a <=( A268 and A235 );
a2541a <=( a2540a and a2537a );
a2545a <=( (not A202) and (not A201) );
a2546a <=( A169 and a2545a );
a2549a <=( A235 and (not A203) );
a2552a <=( A300 and A299 );
a2553a <=( a2552a and a2549a );
a2557a <=( (not A202) and (not A201) );
a2558a <=( A169 and a2557a );
a2561a <=( A235 and (not A203) );
a2564a <=( A300 and A298 );
a2565a <=( a2564a and a2561a );
a2569a <=( (not A202) and (not A201) );
a2570a <=( A169 and a2569a );
a2573a <=( A235 and (not A203) );
a2576a <=( A267 and A265 );
a2577a <=( a2576a and a2573a );
a2581a <=( (not A202) and (not A201) );
a2582a <=( A169 and a2581a );
a2585a <=( A235 and (not A203) );
a2588a <=( A267 and A266 );
a2589a <=( a2588a and a2585a );
a2593a <=( (not A202) and (not A201) );
a2594a <=( A169 and a2593a );
a2597a <=( A232 and (not A203) );
a2600a <=( A301 and A234 );
a2601a <=( a2600a and a2597a );
a2605a <=( (not A202) and (not A201) );
a2606a <=( A169 and a2605a );
a2609a <=( A232 and (not A203) );
a2612a <=( A268 and A234 );
a2613a <=( a2612a and a2609a );
a2617a <=( (not A202) and (not A201) );
a2618a <=( A169 and a2617a );
a2621a <=( A233 and (not A203) );
a2624a <=( A301 and A234 );
a2625a <=( a2624a and a2621a );
a2629a <=( (not A202) and (not A201) );
a2630a <=( A169 and a2629a );
a2633a <=( A233 and (not A203) );
a2636a <=( A268 and A234 );
a2637a <=( a2636a and a2633a );
a2641a <=( A200 and A199 );
a2642a <=( A169 and a2641a );
a2645a <=( (not A202) and (not A201) );
a2648a <=( A301 and A235 );
a2649a <=( a2648a and a2645a );
a2653a <=( A200 and A199 );
a2654a <=( A169 and a2653a );
a2657a <=( (not A202) and (not A201) );
a2660a <=( A268 and A235 );
a2661a <=( a2660a and a2657a );
a2665a <=( (not A200) and (not A199) );
a2666a <=( A169 and a2665a );
a2669a <=( A235 and (not A202) );
a2672a <=( A300 and A299 );
a2673a <=( a2672a and a2669a );
a2677a <=( (not A200) and (not A199) );
a2678a <=( A169 and a2677a );
a2681a <=( A235 and (not A202) );
a2684a <=( A300 and A298 );
a2685a <=( a2684a and a2681a );
a2689a <=( (not A200) and (not A199) );
a2690a <=( A169 and a2689a );
a2693a <=( A235 and (not A202) );
a2696a <=( A267 and A265 );
a2697a <=( a2696a and a2693a );
a2701a <=( (not A200) and (not A199) );
a2702a <=( A169 and a2701a );
a2705a <=( A235 and (not A202) );
a2708a <=( A267 and A266 );
a2709a <=( a2708a and a2705a );
a2713a <=( (not A200) and (not A199) );
a2714a <=( A169 and a2713a );
a2717a <=( A232 and (not A202) );
a2720a <=( A301 and A234 );
a2721a <=( a2720a and a2717a );
a2725a <=( (not A200) and (not A199) );
a2726a <=( A169 and a2725a );
a2729a <=( A232 and (not A202) );
a2732a <=( A268 and A234 );
a2733a <=( a2732a and a2729a );
a2737a <=( (not A200) and (not A199) );
a2738a <=( A169 and a2737a );
a2741a <=( A233 and (not A202) );
a2744a <=( A301 and A234 );
a2745a <=( a2744a and a2741a );
a2749a <=( (not A200) and (not A199) );
a2750a <=( A169 and a2749a );
a2753a <=( A233 and (not A202) );
a2756a <=( A268 and A234 );
a2757a <=( a2756a and a2753a );
a2761a <=( A167 and (not A168) );
a2762a <=( (not A169) and a2761a );
a2765a <=( (not A199) and A166 );
a2768a <=( A203 and A200 );
a2769a <=( a2768a and a2765a );
a2773a <=( A167 and (not A168) );
a2774a <=( (not A169) and a2773a );
a2777a <=( A199 and A166 );
a2780a <=( A203 and (not A200) );
a2781a <=( a2780a and a2777a );
a2784a <=( A166 and A168 );
a2787a <=( (not A202) and (not A201) );
a2788a <=( a2787a and a2784a );
a2791a <=( A235 and (not A203) );
a2794a <=( A300 and A299 );
a2795a <=( a2794a and a2791a );
a2798a <=( A166 and A168 );
a2801a <=( (not A202) and (not A201) );
a2802a <=( a2801a and a2798a );
a2805a <=( A235 and (not A203) );
a2808a <=( A300 and A298 );
a2809a <=( a2808a and a2805a );
a2812a <=( A166 and A168 );
a2815a <=( (not A202) and (not A201) );
a2816a <=( a2815a and a2812a );
a2819a <=( A235 and (not A203) );
a2822a <=( A267 and A265 );
a2823a <=( a2822a and a2819a );
a2826a <=( A166 and A168 );
a2829a <=( (not A202) and (not A201) );
a2830a <=( a2829a and a2826a );
a2833a <=( A235 and (not A203) );
a2836a <=( A267 and A266 );
a2837a <=( a2836a and a2833a );
a2840a <=( A166 and A168 );
a2843a <=( (not A202) and (not A201) );
a2844a <=( a2843a and a2840a );
a2847a <=( A232 and (not A203) );
a2850a <=( A301 and A234 );
a2851a <=( a2850a and a2847a );
a2854a <=( A166 and A168 );
a2857a <=( (not A202) and (not A201) );
a2858a <=( a2857a and a2854a );
a2861a <=( A232 and (not A203) );
a2864a <=( A268 and A234 );
a2865a <=( a2864a and a2861a );
a2868a <=( A166 and A168 );
a2871a <=( (not A202) and (not A201) );
a2872a <=( a2871a and a2868a );
a2875a <=( A233 and (not A203) );
a2878a <=( A301 and A234 );
a2879a <=( a2878a and a2875a );
a2882a <=( A166 and A168 );
a2885a <=( (not A202) and (not A201) );
a2886a <=( a2885a and a2882a );
a2889a <=( A233 and (not A203) );
a2892a <=( A268 and A234 );
a2893a <=( a2892a and a2889a );
a2896a <=( A166 and A168 );
a2899a <=( A200 and A199 );
a2900a <=( a2899a and a2896a );
a2903a <=( (not A202) and (not A201) );
a2906a <=( A301 and A235 );
a2907a <=( a2906a and a2903a );
a2910a <=( A166 and A168 );
a2913a <=( A200 and A199 );
a2914a <=( a2913a and a2910a );
a2917a <=( (not A202) and (not A201) );
a2920a <=( A268 and A235 );
a2921a <=( a2920a and a2917a );
a2924a <=( A166 and A168 );
a2927a <=( (not A200) and (not A199) );
a2928a <=( a2927a and a2924a );
a2931a <=( A235 and (not A202) );
a2934a <=( A300 and A299 );
a2935a <=( a2934a and a2931a );
a2938a <=( A166 and A168 );
a2941a <=( (not A200) and (not A199) );
a2942a <=( a2941a and a2938a );
a2945a <=( A235 and (not A202) );
a2948a <=( A300 and A298 );
a2949a <=( a2948a and a2945a );
a2952a <=( A166 and A168 );
a2955a <=( (not A200) and (not A199) );
a2956a <=( a2955a and a2952a );
a2959a <=( A235 and (not A202) );
a2962a <=( A267 and A265 );
a2963a <=( a2962a and a2959a );
a2966a <=( A166 and A168 );
a2969a <=( (not A200) and (not A199) );
a2970a <=( a2969a and a2966a );
a2973a <=( A235 and (not A202) );
a2976a <=( A267 and A266 );
a2977a <=( a2976a and a2973a );
a2980a <=( A166 and A168 );
a2983a <=( (not A200) and (not A199) );
a2984a <=( a2983a and a2980a );
a2987a <=( A232 and (not A202) );
a2990a <=( A301 and A234 );
a2991a <=( a2990a and a2987a );
a2994a <=( A166 and A168 );
a2997a <=( (not A200) and (not A199) );
a2998a <=( a2997a and a2994a );
a3001a <=( A232 and (not A202) );
a3004a <=( A268 and A234 );
a3005a <=( a3004a and a3001a );
a3008a <=( A166 and A168 );
a3011a <=( (not A200) and (not A199) );
a3012a <=( a3011a and a3008a );
a3015a <=( A233 and (not A202) );
a3018a <=( A301 and A234 );
a3019a <=( a3018a and a3015a );
a3022a <=( A166 and A168 );
a3025a <=( (not A200) and (not A199) );
a3026a <=( a3025a and a3022a );
a3029a <=( A233 and (not A202) );
a3032a <=( A268 and A234 );
a3033a <=( a3032a and a3029a );
a3036a <=( A167 and A168 );
a3039a <=( (not A202) and (not A201) );
a3040a <=( a3039a and a3036a );
a3043a <=( A235 and (not A203) );
a3046a <=( A300 and A299 );
a3047a <=( a3046a and a3043a );
a3050a <=( A167 and A168 );
a3053a <=( (not A202) and (not A201) );
a3054a <=( a3053a and a3050a );
a3057a <=( A235 and (not A203) );
a3060a <=( A300 and A298 );
a3061a <=( a3060a and a3057a );
a3064a <=( A167 and A168 );
a3067a <=( (not A202) and (not A201) );
a3068a <=( a3067a and a3064a );
a3071a <=( A235 and (not A203) );
a3074a <=( A267 and A265 );
a3075a <=( a3074a and a3071a );
a3078a <=( A167 and A168 );
a3081a <=( (not A202) and (not A201) );
a3082a <=( a3081a and a3078a );
a3085a <=( A235 and (not A203) );
a3088a <=( A267 and A266 );
a3089a <=( a3088a and a3085a );
a3092a <=( A167 and A168 );
a3095a <=( (not A202) and (not A201) );
a3096a <=( a3095a and a3092a );
a3099a <=( A232 and (not A203) );
a3102a <=( A301 and A234 );
a3103a <=( a3102a and a3099a );
a3106a <=( A167 and A168 );
a3109a <=( (not A202) and (not A201) );
a3110a <=( a3109a and a3106a );
a3113a <=( A232 and (not A203) );
a3116a <=( A268 and A234 );
a3117a <=( a3116a and a3113a );
a3120a <=( A167 and A168 );
a3123a <=( (not A202) and (not A201) );
a3124a <=( a3123a and a3120a );
a3127a <=( A233 and (not A203) );
a3130a <=( A301 and A234 );
a3131a <=( a3130a and a3127a );
a3134a <=( A167 and A168 );
a3137a <=( (not A202) and (not A201) );
a3138a <=( a3137a and a3134a );
a3141a <=( A233 and (not A203) );
a3144a <=( A268 and A234 );
a3145a <=( a3144a and a3141a );
a3148a <=( A167 and A168 );
a3151a <=( A200 and A199 );
a3152a <=( a3151a and a3148a );
a3155a <=( (not A202) and (not A201) );
a3158a <=( A301 and A235 );
a3159a <=( a3158a and a3155a );
a3162a <=( A167 and A168 );
a3165a <=( A200 and A199 );
a3166a <=( a3165a and a3162a );
a3169a <=( (not A202) and (not A201) );
a3172a <=( A268 and A235 );
a3173a <=( a3172a and a3169a );
a3176a <=( A167 and A168 );
a3179a <=( (not A200) and (not A199) );
a3180a <=( a3179a and a3176a );
a3183a <=( A235 and (not A202) );
a3186a <=( A300 and A299 );
a3187a <=( a3186a and a3183a );
a3190a <=( A167 and A168 );
a3193a <=( (not A200) and (not A199) );
a3194a <=( a3193a and a3190a );
a3197a <=( A235 and (not A202) );
a3200a <=( A300 and A298 );
a3201a <=( a3200a and a3197a );
a3204a <=( A167 and A168 );
a3207a <=( (not A200) and (not A199) );
a3208a <=( a3207a and a3204a );
a3211a <=( A235 and (not A202) );
a3214a <=( A267 and A265 );
a3215a <=( a3214a and a3211a );
a3218a <=( A167 and A168 );
a3221a <=( (not A200) and (not A199) );
a3222a <=( a3221a and a3218a );
a3225a <=( A235 and (not A202) );
a3228a <=( A267 and A266 );
a3229a <=( a3228a and a3225a );
a3232a <=( A167 and A168 );
a3235a <=( (not A200) and (not A199) );
a3236a <=( a3235a and a3232a );
a3239a <=( A232 and (not A202) );
a3242a <=( A301 and A234 );
a3243a <=( a3242a and a3239a );
a3246a <=( A167 and A168 );
a3249a <=( (not A200) and (not A199) );
a3250a <=( a3249a and a3246a );
a3253a <=( A232 and (not A202) );
a3256a <=( A268 and A234 );
a3257a <=( a3256a and a3253a );
a3260a <=( A167 and A168 );
a3263a <=( (not A200) and (not A199) );
a3264a <=( a3263a and a3260a );
a3267a <=( A233 and (not A202) );
a3270a <=( A301 and A234 );
a3271a <=( a3270a and a3267a );
a3274a <=( A167 and A168 );
a3277a <=( (not A200) and (not A199) );
a3278a <=( a3277a and a3274a );
a3281a <=( A233 and (not A202) );
a3284a <=( A268 and A234 );
a3285a <=( a3284a and a3281a );
a3288a <=( A167 and A170 );
a3291a <=( (not A201) and (not A166) );
a3292a <=( a3291a and a3288a );
a3295a <=( (not A203) and (not A202) );
a3298a <=( A301 and A235 );
a3299a <=( a3298a and a3295a );
a3302a <=( A167 and A170 );
a3305a <=( (not A201) and (not A166) );
a3306a <=( a3305a and a3302a );
a3309a <=( (not A203) and (not A202) );
a3312a <=( A268 and A235 );
a3313a <=( a3312a and a3309a );
a3316a <=( A167 and A170 );
a3319a <=( (not A199) and (not A166) );
a3320a <=( a3319a and a3316a );
a3323a <=( (not A202) and (not A200) );
a3326a <=( A301 and A235 );
a3327a <=( a3326a and a3323a );
a3330a <=( A167 and A170 );
a3333a <=( (not A199) and (not A166) );
a3334a <=( a3333a and a3330a );
a3337a <=( (not A202) and (not A200) );
a3340a <=( A268 and A235 );
a3341a <=( a3340a and a3337a );
a3344a <=( (not A167) and A170 );
a3347a <=( (not A201) and A166 );
a3348a <=( a3347a and a3344a );
a3351a <=( (not A203) and (not A202) );
a3354a <=( A301 and A235 );
a3355a <=( a3354a and a3351a );
a3358a <=( (not A167) and A170 );
a3361a <=( (not A201) and A166 );
a3362a <=( a3361a and a3358a );
a3365a <=( (not A203) and (not A202) );
a3368a <=( A268 and A235 );
a3369a <=( a3368a and a3365a );
a3372a <=( (not A167) and A170 );
a3375a <=( (not A199) and A166 );
a3376a <=( a3375a and a3372a );
a3379a <=( (not A202) and (not A200) );
a3382a <=( A301 and A235 );
a3383a <=( a3382a and a3379a );
a3386a <=( (not A167) and A170 );
a3389a <=( (not A199) and A166 );
a3390a <=( a3389a and a3386a );
a3393a <=( (not A202) and (not A200) );
a3396a <=( A268 and A235 );
a3397a <=( a3396a and a3393a );
a3400a <=( (not A201) and A169 );
a3403a <=( (not A203) and (not A202) );
a3404a <=( a3403a and a3400a );
a3407a <=( A298 and A235 );
a3410a <=( A302 and (not A299) );
a3411a <=( a3410a and a3407a );
a3414a <=( (not A201) and A169 );
a3417a <=( (not A203) and (not A202) );
a3418a <=( a3417a and a3414a );
a3421a <=( (not A298) and A235 );
a3424a <=( A302 and A299 );
a3425a <=( a3424a and a3421a );
a3428a <=( (not A201) and A169 );
a3431a <=( (not A203) and (not A202) );
a3432a <=( a3431a and a3428a );
a3435a <=( (not A265) and A235 );
a3438a <=( A269 and A266 );
a3439a <=( a3438a and a3435a );
a3442a <=( (not A201) and A169 );
a3445a <=( (not A203) and (not A202) );
a3446a <=( a3445a and a3442a );
a3449a <=( A265 and A235 );
a3452a <=( A269 and (not A266) );
a3453a <=( a3452a and a3449a );
a3456a <=( (not A201) and A169 );
a3459a <=( (not A203) and (not A202) );
a3460a <=( a3459a and a3456a );
a3463a <=( A234 and A232 );
a3466a <=( A300 and A299 );
a3467a <=( a3466a and a3463a );
a3470a <=( (not A201) and A169 );
a3473a <=( (not A203) and (not A202) );
a3474a <=( a3473a and a3470a );
a3477a <=( A234 and A232 );
a3480a <=( A300 and A298 );
a3481a <=( a3480a and a3477a );
a3484a <=( (not A201) and A169 );
a3487a <=( (not A203) and (not A202) );
a3488a <=( a3487a and a3484a );
a3491a <=( A234 and A232 );
a3494a <=( A267 and A265 );
a3495a <=( a3494a and a3491a );
a3498a <=( (not A201) and A169 );
a3501a <=( (not A203) and (not A202) );
a3502a <=( a3501a and a3498a );
a3505a <=( A234 and A232 );
a3508a <=( A267 and A266 );
a3509a <=( a3508a and a3505a );
a3512a <=( (not A201) and A169 );
a3515a <=( (not A203) and (not A202) );
a3516a <=( a3515a and a3512a );
a3519a <=( A234 and A233 );
a3522a <=( A300 and A299 );
a3523a <=( a3522a and a3519a );
a3526a <=( (not A201) and A169 );
a3529a <=( (not A203) and (not A202) );
a3530a <=( a3529a and a3526a );
a3533a <=( A234 and A233 );
a3536a <=( A300 and A298 );
a3537a <=( a3536a and a3533a );
a3540a <=( (not A201) and A169 );
a3543a <=( (not A203) and (not A202) );
a3544a <=( a3543a and a3540a );
a3547a <=( A234 and A233 );
a3550a <=( A267 and A265 );
a3551a <=( a3550a and a3547a );
a3554a <=( (not A201) and A169 );
a3557a <=( (not A203) and (not A202) );
a3558a <=( a3557a and a3554a );
a3561a <=( A234 and A233 );
a3564a <=( A267 and A266 );
a3565a <=( a3564a and a3561a );
a3568a <=( (not A201) and A169 );
a3571a <=( (not A203) and (not A202) );
a3572a <=( a3571a and a3568a );
a3575a <=( A233 and (not A232) );
a3578a <=( A301 and A236 );
a3579a <=( a3578a and a3575a );
a3582a <=( (not A201) and A169 );
a3585a <=( (not A203) and (not A202) );
a3586a <=( a3585a and a3582a );
a3589a <=( A233 and (not A232) );
a3592a <=( A268 and A236 );
a3593a <=( a3592a and a3589a );
a3596a <=( (not A201) and A169 );
a3599a <=( (not A203) and (not A202) );
a3600a <=( a3599a and a3596a );
a3603a <=( (not A233) and A232 );
a3606a <=( A301 and A236 );
a3607a <=( a3606a and a3603a );
a3610a <=( (not A201) and A169 );
a3613a <=( (not A203) and (not A202) );
a3614a <=( a3613a and a3610a );
a3617a <=( (not A233) and A232 );
a3620a <=( A268 and A236 );
a3621a <=( a3620a and a3617a );
a3624a <=( A199 and A169 );
a3627a <=( (not A201) and A200 );
a3628a <=( a3627a and a3624a );
a3631a <=( A235 and (not A202) );
a3634a <=( A300 and A299 );
a3635a <=( a3634a and a3631a );
a3638a <=( A199 and A169 );
a3641a <=( (not A201) and A200 );
a3642a <=( a3641a and a3638a );
a3645a <=( A235 and (not A202) );
a3648a <=( A300 and A298 );
a3649a <=( a3648a and a3645a );
a3652a <=( A199 and A169 );
a3655a <=( (not A201) and A200 );
a3656a <=( a3655a and a3652a );
a3659a <=( A235 and (not A202) );
a3662a <=( A267 and A265 );
a3663a <=( a3662a and a3659a );
a3666a <=( A199 and A169 );
a3669a <=( (not A201) and A200 );
a3670a <=( a3669a and a3666a );
a3673a <=( A235 and (not A202) );
a3676a <=( A267 and A266 );
a3677a <=( a3676a and a3673a );
a3680a <=( A199 and A169 );
a3683a <=( (not A201) and A200 );
a3684a <=( a3683a and a3680a );
a3687a <=( A232 and (not A202) );
a3690a <=( A301 and A234 );
a3691a <=( a3690a and a3687a );
a3694a <=( A199 and A169 );
a3697a <=( (not A201) and A200 );
a3698a <=( a3697a and a3694a );
a3701a <=( A232 and (not A202) );
a3704a <=( A268 and A234 );
a3705a <=( a3704a and a3701a );
a3708a <=( A199 and A169 );
a3711a <=( (not A201) and A200 );
a3712a <=( a3711a and a3708a );
a3715a <=( A233 and (not A202) );
a3718a <=( A301 and A234 );
a3719a <=( a3718a and a3715a );
a3722a <=( A199 and A169 );
a3725a <=( (not A201) and A200 );
a3726a <=( a3725a and a3722a );
a3729a <=( A233 and (not A202) );
a3732a <=( A268 and A234 );
a3733a <=( a3732a and a3729a );
a3736a <=( (not A199) and A169 );
a3739a <=( (not A202) and (not A200) );
a3740a <=( a3739a and a3736a );
a3743a <=( A298 and A235 );
a3746a <=( A302 and (not A299) );
a3747a <=( a3746a and a3743a );
a3750a <=( (not A199) and A169 );
a3753a <=( (not A202) and (not A200) );
a3754a <=( a3753a and a3750a );
a3757a <=( (not A298) and A235 );
a3760a <=( A302 and A299 );
a3761a <=( a3760a and a3757a );
a3764a <=( (not A199) and A169 );
a3767a <=( (not A202) and (not A200) );
a3768a <=( a3767a and a3764a );
a3771a <=( (not A265) and A235 );
a3774a <=( A269 and A266 );
a3775a <=( a3774a and a3771a );
a3778a <=( (not A199) and A169 );
a3781a <=( (not A202) and (not A200) );
a3782a <=( a3781a and a3778a );
a3785a <=( A265 and A235 );
a3788a <=( A269 and (not A266) );
a3789a <=( a3788a and a3785a );
a3792a <=( (not A199) and A169 );
a3795a <=( (not A202) and (not A200) );
a3796a <=( a3795a and a3792a );
a3799a <=( A234 and A232 );
a3802a <=( A300 and A299 );
a3803a <=( a3802a and a3799a );
a3806a <=( (not A199) and A169 );
a3809a <=( (not A202) and (not A200) );
a3810a <=( a3809a and a3806a );
a3813a <=( A234 and A232 );
a3816a <=( A300 and A298 );
a3817a <=( a3816a and a3813a );
a3820a <=( (not A199) and A169 );
a3823a <=( (not A202) and (not A200) );
a3824a <=( a3823a and a3820a );
a3827a <=( A234 and A232 );
a3830a <=( A267 and A265 );
a3831a <=( a3830a and a3827a );
a3834a <=( (not A199) and A169 );
a3837a <=( (not A202) and (not A200) );
a3838a <=( a3837a and a3834a );
a3841a <=( A234 and A232 );
a3844a <=( A267 and A266 );
a3845a <=( a3844a and a3841a );
a3848a <=( (not A199) and A169 );
a3851a <=( (not A202) and (not A200) );
a3852a <=( a3851a and a3848a );
a3855a <=( A234 and A233 );
a3858a <=( A300 and A299 );
a3859a <=( a3858a and a3855a );
a3862a <=( (not A199) and A169 );
a3865a <=( (not A202) and (not A200) );
a3866a <=( a3865a and a3862a );
a3869a <=( A234 and A233 );
a3872a <=( A300 and A298 );
a3873a <=( a3872a and a3869a );
a3876a <=( (not A199) and A169 );
a3879a <=( (not A202) and (not A200) );
a3880a <=( a3879a and a3876a );
a3883a <=( A234 and A233 );
a3886a <=( A267 and A265 );
a3887a <=( a3886a and a3883a );
a3890a <=( (not A199) and A169 );
a3893a <=( (not A202) and (not A200) );
a3894a <=( a3893a and a3890a );
a3897a <=( A234 and A233 );
a3900a <=( A267 and A266 );
a3901a <=( a3900a and a3897a );
a3904a <=( (not A199) and A169 );
a3907a <=( (not A202) and (not A200) );
a3908a <=( a3907a and a3904a );
a3911a <=( A233 and (not A232) );
a3914a <=( A301 and A236 );
a3915a <=( a3914a and a3911a );
a3918a <=( (not A199) and A169 );
a3921a <=( (not A202) and (not A200) );
a3922a <=( a3921a and a3918a );
a3925a <=( A233 and (not A232) );
a3928a <=( A268 and A236 );
a3929a <=( a3928a and a3925a );
a3932a <=( (not A199) and A169 );
a3935a <=( (not A202) and (not A200) );
a3936a <=( a3935a and a3932a );
a3939a <=( (not A233) and A232 );
a3942a <=( A301 and A236 );
a3943a <=( a3942a and a3939a );
a3946a <=( (not A199) and A169 );
a3949a <=( (not A202) and (not A200) );
a3950a <=( a3949a and a3946a );
a3953a <=( (not A233) and A232 );
a3956a <=( A268 and A236 );
a3957a <=( a3956a and a3953a );
a3960a <=( A166 and A168 );
a3963a <=( (not A202) and (not A201) );
a3964a <=( a3963a and a3960a );
a3967a <=( A235 and (not A203) );
a3971a <=( A302 and (not A299) );
a3972a <=( A298 and a3971a );
a3973a <=( a3972a and a3967a );
a3976a <=( A166 and A168 );
a3979a <=( (not A202) and (not A201) );
a3980a <=( a3979a and a3976a );
a3983a <=( A235 and (not A203) );
a3987a <=( A302 and A299 );
a3988a <=( (not A298) and a3987a );
a3989a <=( a3988a and a3983a );
a3992a <=( A166 and A168 );
a3995a <=( (not A202) and (not A201) );
a3996a <=( a3995a and a3992a );
a3999a <=( A235 and (not A203) );
a4003a <=( A269 and A266 );
a4004a <=( (not A265) and a4003a );
a4005a <=( a4004a and a3999a );
a4008a <=( A166 and A168 );
a4011a <=( (not A202) and (not A201) );
a4012a <=( a4011a and a4008a );
a4015a <=( A235 and (not A203) );
a4019a <=( A269 and (not A266) );
a4020a <=( A265 and a4019a );
a4021a <=( a4020a and a4015a );
a4024a <=( A166 and A168 );
a4027a <=( (not A202) and (not A201) );
a4028a <=( a4027a and a4024a );
a4031a <=( A232 and (not A203) );
a4035a <=( A300 and A299 );
a4036a <=( A234 and a4035a );
a4037a <=( a4036a and a4031a );
a4040a <=( A166 and A168 );
a4043a <=( (not A202) and (not A201) );
a4044a <=( a4043a and a4040a );
a4047a <=( A232 and (not A203) );
a4051a <=( A300 and A298 );
a4052a <=( A234 and a4051a );
a4053a <=( a4052a and a4047a );
a4056a <=( A166 and A168 );
a4059a <=( (not A202) and (not A201) );
a4060a <=( a4059a and a4056a );
a4063a <=( A232 and (not A203) );
a4067a <=( A267 and A265 );
a4068a <=( A234 and a4067a );
a4069a <=( a4068a and a4063a );
a4072a <=( A166 and A168 );
a4075a <=( (not A202) and (not A201) );
a4076a <=( a4075a and a4072a );
a4079a <=( A232 and (not A203) );
a4083a <=( A267 and A266 );
a4084a <=( A234 and a4083a );
a4085a <=( a4084a and a4079a );
a4088a <=( A166 and A168 );
a4091a <=( (not A202) and (not A201) );
a4092a <=( a4091a and a4088a );
a4095a <=( A233 and (not A203) );
a4099a <=( A300 and A299 );
a4100a <=( A234 and a4099a );
a4101a <=( a4100a and a4095a );
a4104a <=( A166 and A168 );
a4107a <=( (not A202) and (not A201) );
a4108a <=( a4107a and a4104a );
a4111a <=( A233 and (not A203) );
a4115a <=( A300 and A298 );
a4116a <=( A234 and a4115a );
a4117a <=( a4116a and a4111a );
a4120a <=( A166 and A168 );
a4123a <=( (not A202) and (not A201) );
a4124a <=( a4123a and a4120a );
a4127a <=( A233 and (not A203) );
a4131a <=( A267 and A265 );
a4132a <=( A234 and a4131a );
a4133a <=( a4132a and a4127a );
a4136a <=( A166 and A168 );
a4139a <=( (not A202) and (not A201) );
a4140a <=( a4139a and a4136a );
a4143a <=( A233 and (not A203) );
a4147a <=( A267 and A266 );
a4148a <=( A234 and a4147a );
a4149a <=( a4148a and a4143a );
a4152a <=( A166 and A168 );
a4155a <=( (not A202) and (not A201) );
a4156a <=( a4155a and a4152a );
a4159a <=( (not A232) and (not A203) );
a4163a <=( A301 and A236 );
a4164a <=( A233 and a4163a );
a4165a <=( a4164a and a4159a );
a4168a <=( A166 and A168 );
a4171a <=( (not A202) and (not A201) );
a4172a <=( a4171a and a4168a );
a4175a <=( (not A232) and (not A203) );
a4179a <=( A268 and A236 );
a4180a <=( A233 and a4179a );
a4181a <=( a4180a and a4175a );
a4184a <=( A166 and A168 );
a4187a <=( (not A202) and (not A201) );
a4188a <=( a4187a and a4184a );
a4191a <=( A232 and (not A203) );
a4195a <=( A301 and A236 );
a4196a <=( (not A233) and a4195a );
a4197a <=( a4196a and a4191a );
a4200a <=( A166 and A168 );
a4203a <=( (not A202) and (not A201) );
a4204a <=( a4203a and a4200a );
a4207a <=( A232 and (not A203) );
a4211a <=( A268 and A236 );
a4212a <=( (not A233) and a4211a );
a4213a <=( a4212a and a4207a );
a4216a <=( A166 and A168 );
a4219a <=( A200 and A199 );
a4220a <=( a4219a and a4216a );
a4223a <=( (not A202) and (not A201) );
a4227a <=( A300 and A299 );
a4228a <=( A235 and a4227a );
a4229a <=( a4228a and a4223a );
a4232a <=( A166 and A168 );
a4235a <=( A200 and A199 );
a4236a <=( a4235a and a4232a );
a4239a <=( (not A202) and (not A201) );
a4243a <=( A300 and A298 );
a4244a <=( A235 and a4243a );
a4245a <=( a4244a and a4239a );
a4248a <=( A166 and A168 );
a4251a <=( A200 and A199 );
a4252a <=( a4251a and a4248a );
a4255a <=( (not A202) and (not A201) );
a4259a <=( A267 and A265 );
a4260a <=( A235 and a4259a );
a4261a <=( a4260a and a4255a );
a4264a <=( A166 and A168 );
a4267a <=( A200 and A199 );
a4268a <=( a4267a and a4264a );
a4271a <=( (not A202) and (not A201) );
a4275a <=( A267 and A266 );
a4276a <=( A235 and a4275a );
a4277a <=( a4276a and a4271a );
a4280a <=( A166 and A168 );
a4283a <=( A200 and A199 );
a4284a <=( a4283a and a4280a );
a4287a <=( (not A202) and (not A201) );
a4291a <=( A301 and A234 );
a4292a <=( A232 and a4291a );
a4293a <=( a4292a and a4287a );
a4296a <=( A166 and A168 );
a4299a <=( A200 and A199 );
a4300a <=( a4299a and a4296a );
a4303a <=( (not A202) and (not A201) );
a4307a <=( A268 and A234 );
a4308a <=( A232 and a4307a );
a4309a <=( a4308a and a4303a );
a4312a <=( A166 and A168 );
a4315a <=( A200 and A199 );
a4316a <=( a4315a and a4312a );
a4319a <=( (not A202) and (not A201) );
a4323a <=( A301 and A234 );
a4324a <=( A233 and a4323a );
a4325a <=( a4324a and a4319a );
a4328a <=( A166 and A168 );
a4331a <=( A200 and A199 );
a4332a <=( a4331a and a4328a );
a4335a <=( (not A202) and (not A201) );
a4339a <=( A268 and A234 );
a4340a <=( A233 and a4339a );
a4341a <=( a4340a and a4335a );
a4344a <=( A166 and A168 );
a4347a <=( (not A200) and (not A199) );
a4348a <=( a4347a and a4344a );
a4351a <=( A235 and (not A202) );
a4355a <=( A302 and (not A299) );
a4356a <=( A298 and a4355a );
a4357a <=( a4356a and a4351a );
a4360a <=( A166 and A168 );
a4363a <=( (not A200) and (not A199) );
a4364a <=( a4363a and a4360a );
a4367a <=( A235 and (not A202) );
a4371a <=( A302 and A299 );
a4372a <=( (not A298) and a4371a );
a4373a <=( a4372a and a4367a );
a4376a <=( A166 and A168 );
a4379a <=( (not A200) and (not A199) );
a4380a <=( a4379a and a4376a );
a4383a <=( A235 and (not A202) );
a4387a <=( A269 and A266 );
a4388a <=( (not A265) and a4387a );
a4389a <=( a4388a and a4383a );
a4392a <=( A166 and A168 );
a4395a <=( (not A200) and (not A199) );
a4396a <=( a4395a and a4392a );
a4399a <=( A235 and (not A202) );
a4403a <=( A269 and (not A266) );
a4404a <=( A265 and a4403a );
a4405a <=( a4404a and a4399a );
a4408a <=( A166 and A168 );
a4411a <=( (not A200) and (not A199) );
a4412a <=( a4411a and a4408a );
a4415a <=( A232 and (not A202) );
a4419a <=( A300 and A299 );
a4420a <=( A234 and a4419a );
a4421a <=( a4420a and a4415a );
a4424a <=( A166 and A168 );
a4427a <=( (not A200) and (not A199) );
a4428a <=( a4427a and a4424a );
a4431a <=( A232 and (not A202) );
a4435a <=( A300 and A298 );
a4436a <=( A234 and a4435a );
a4437a <=( a4436a and a4431a );
a4440a <=( A166 and A168 );
a4443a <=( (not A200) and (not A199) );
a4444a <=( a4443a and a4440a );
a4447a <=( A232 and (not A202) );
a4451a <=( A267 and A265 );
a4452a <=( A234 and a4451a );
a4453a <=( a4452a and a4447a );
a4456a <=( A166 and A168 );
a4459a <=( (not A200) and (not A199) );
a4460a <=( a4459a and a4456a );
a4463a <=( A232 and (not A202) );
a4467a <=( A267 and A266 );
a4468a <=( A234 and a4467a );
a4469a <=( a4468a and a4463a );
a4472a <=( A166 and A168 );
a4475a <=( (not A200) and (not A199) );
a4476a <=( a4475a and a4472a );
a4479a <=( A233 and (not A202) );
a4483a <=( A300 and A299 );
a4484a <=( A234 and a4483a );
a4485a <=( a4484a and a4479a );
a4488a <=( A166 and A168 );
a4491a <=( (not A200) and (not A199) );
a4492a <=( a4491a and a4488a );
a4495a <=( A233 and (not A202) );
a4499a <=( A300 and A298 );
a4500a <=( A234 and a4499a );
a4501a <=( a4500a and a4495a );
a4504a <=( A166 and A168 );
a4507a <=( (not A200) and (not A199) );
a4508a <=( a4507a and a4504a );
a4511a <=( A233 and (not A202) );
a4515a <=( A267 and A265 );
a4516a <=( A234 and a4515a );
a4517a <=( a4516a and a4511a );
a4520a <=( A166 and A168 );
a4523a <=( (not A200) and (not A199) );
a4524a <=( a4523a and a4520a );
a4527a <=( A233 and (not A202) );
a4531a <=( A267 and A266 );
a4532a <=( A234 and a4531a );
a4533a <=( a4532a and a4527a );
a4536a <=( A166 and A168 );
a4539a <=( (not A200) and (not A199) );
a4540a <=( a4539a and a4536a );
a4543a <=( (not A232) and (not A202) );
a4547a <=( A301 and A236 );
a4548a <=( A233 and a4547a );
a4549a <=( a4548a and a4543a );
a4552a <=( A166 and A168 );
a4555a <=( (not A200) and (not A199) );
a4556a <=( a4555a and a4552a );
a4559a <=( (not A232) and (not A202) );
a4563a <=( A268 and A236 );
a4564a <=( A233 and a4563a );
a4565a <=( a4564a and a4559a );
a4568a <=( A166 and A168 );
a4571a <=( (not A200) and (not A199) );
a4572a <=( a4571a and a4568a );
a4575a <=( A232 and (not A202) );
a4579a <=( A301 and A236 );
a4580a <=( (not A233) and a4579a );
a4581a <=( a4580a and a4575a );
a4584a <=( A166 and A168 );
a4587a <=( (not A200) and (not A199) );
a4588a <=( a4587a and a4584a );
a4591a <=( A232 and (not A202) );
a4595a <=( A268 and A236 );
a4596a <=( (not A233) and a4595a );
a4597a <=( a4596a and a4591a );
a4600a <=( A167 and A168 );
a4603a <=( (not A202) and (not A201) );
a4604a <=( a4603a and a4600a );
a4607a <=( A235 and (not A203) );
a4611a <=( A302 and (not A299) );
a4612a <=( A298 and a4611a );
a4613a <=( a4612a and a4607a );
a4616a <=( A167 and A168 );
a4619a <=( (not A202) and (not A201) );
a4620a <=( a4619a and a4616a );
a4623a <=( A235 and (not A203) );
a4627a <=( A302 and A299 );
a4628a <=( (not A298) and a4627a );
a4629a <=( a4628a and a4623a );
a4632a <=( A167 and A168 );
a4635a <=( (not A202) and (not A201) );
a4636a <=( a4635a and a4632a );
a4639a <=( A235 and (not A203) );
a4643a <=( A269 and A266 );
a4644a <=( (not A265) and a4643a );
a4645a <=( a4644a and a4639a );
a4648a <=( A167 and A168 );
a4651a <=( (not A202) and (not A201) );
a4652a <=( a4651a and a4648a );
a4655a <=( A235 and (not A203) );
a4659a <=( A269 and (not A266) );
a4660a <=( A265 and a4659a );
a4661a <=( a4660a and a4655a );
a4664a <=( A167 and A168 );
a4667a <=( (not A202) and (not A201) );
a4668a <=( a4667a and a4664a );
a4671a <=( A232 and (not A203) );
a4675a <=( A300 and A299 );
a4676a <=( A234 and a4675a );
a4677a <=( a4676a and a4671a );
a4680a <=( A167 and A168 );
a4683a <=( (not A202) and (not A201) );
a4684a <=( a4683a and a4680a );
a4687a <=( A232 and (not A203) );
a4691a <=( A300 and A298 );
a4692a <=( A234 and a4691a );
a4693a <=( a4692a and a4687a );
a4696a <=( A167 and A168 );
a4699a <=( (not A202) and (not A201) );
a4700a <=( a4699a and a4696a );
a4703a <=( A232 and (not A203) );
a4707a <=( A267 and A265 );
a4708a <=( A234 and a4707a );
a4709a <=( a4708a and a4703a );
a4712a <=( A167 and A168 );
a4715a <=( (not A202) and (not A201) );
a4716a <=( a4715a and a4712a );
a4719a <=( A232 and (not A203) );
a4723a <=( A267 and A266 );
a4724a <=( A234 and a4723a );
a4725a <=( a4724a and a4719a );
a4728a <=( A167 and A168 );
a4731a <=( (not A202) and (not A201) );
a4732a <=( a4731a and a4728a );
a4735a <=( A233 and (not A203) );
a4739a <=( A300 and A299 );
a4740a <=( A234 and a4739a );
a4741a <=( a4740a and a4735a );
a4744a <=( A167 and A168 );
a4747a <=( (not A202) and (not A201) );
a4748a <=( a4747a and a4744a );
a4751a <=( A233 and (not A203) );
a4755a <=( A300 and A298 );
a4756a <=( A234 and a4755a );
a4757a <=( a4756a and a4751a );
a4760a <=( A167 and A168 );
a4763a <=( (not A202) and (not A201) );
a4764a <=( a4763a and a4760a );
a4767a <=( A233 and (not A203) );
a4771a <=( A267 and A265 );
a4772a <=( A234 and a4771a );
a4773a <=( a4772a and a4767a );
a4776a <=( A167 and A168 );
a4779a <=( (not A202) and (not A201) );
a4780a <=( a4779a and a4776a );
a4783a <=( A233 and (not A203) );
a4787a <=( A267 and A266 );
a4788a <=( A234 and a4787a );
a4789a <=( a4788a and a4783a );
a4792a <=( A167 and A168 );
a4795a <=( (not A202) and (not A201) );
a4796a <=( a4795a and a4792a );
a4799a <=( (not A232) and (not A203) );
a4803a <=( A301 and A236 );
a4804a <=( A233 and a4803a );
a4805a <=( a4804a and a4799a );
a4808a <=( A167 and A168 );
a4811a <=( (not A202) and (not A201) );
a4812a <=( a4811a and a4808a );
a4815a <=( (not A232) and (not A203) );
a4819a <=( A268 and A236 );
a4820a <=( A233 and a4819a );
a4821a <=( a4820a and a4815a );
a4824a <=( A167 and A168 );
a4827a <=( (not A202) and (not A201) );
a4828a <=( a4827a and a4824a );
a4831a <=( A232 and (not A203) );
a4835a <=( A301 and A236 );
a4836a <=( (not A233) and a4835a );
a4837a <=( a4836a and a4831a );
a4840a <=( A167 and A168 );
a4843a <=( (not A202) and (not A201) );
a4844a <=( a4843a and a4840a );
a4847a <=( A232 and (not A203) );
a4851a <=( A268 and A236 );
a4852a <=( (not A233) and a4851a );
a4853a <=( a4852a and a4847a );
a4856a <=( A167 and A168 );
a4859a <=( A200 and A199 );
a4860a <=( a4859a and a4856a );
a4863a <=( (not A202) and (not A201) );
a4867a <=( A300 and A299 );
a4868a <=( A235 and a4867a );
a4869a <=( a4868a and a4863a );
a4872a <=( A167 and A168 );
a4875a <=( A200 and A199 );
a4876a <=( a4875a and a4872a );
a4879a <=( (not A202) and (not A201) );
a4883a <=( A300 and A298 );
a4884a <=( A235 and a4883a );
a4885a <=( a4884a and a4879a );
a4888a <=( A167 and A168 );
a4891a <=( A200 and A199 );
a4892a <=( a4891a and a4888a );
a4895a <=( (not A202) and (not A201) );
a4899a <=( A267 and A265 );
a4900a <=( A235 and a4899a );
a4901a <=( a4900a and a4895a );
a4904a <=( A167 and A168 );
a4907a <=( A200 and A199 );
a4908a <=( a4907a and a4904a );
a4911a <=( (not A202) and (not A201) );
a4915a <=( A267 and A266 );
a4916a <=( A235 and a4915a );
a4917a <=( a4916a and a4911a );
a4920a <=( A167 and A168 );
a4923a <=( A200 and A199 );
a4924a <=( a4923a and a4920a );
a4927a <=( (not A202) and (not A201) );
a4931a <=( A301 and A234 );
a4932a <=( A232 and a4931a );
a4933a <=( a4932a and a4927a );
a4936a <=( A167 and A168 );
a4939a <=( A200 and A199 );
a4940a <=( a4939a and a4936a );
a4943a <=( (not A202) and (not A201) );
a4947a <=( A268 and A234 );
a4948a <=( A232 and a4947a );
a4949a <=( a4948a and a4943a );
a4952a <=( A167 and A168 );
a4955a <=( A200 and A199 );
a4956a <=( a4955a and a4952a );
a4959a <=( (not A202) and (not A201) );
a4963a <=( A301 and A234 );
a4964a <=( A233 and a4963a );
a4965a <=( a4964a and a4959a );
a4968a <=( A167 and A168 );
a4971a <=( A200 and A199 );
a4972a <=( a4971a and a4968a );
a4975a <=( (not A202) and (not A201) );
a4979a <=( A268 and A234 );
a4980a <=( A233 and a4979a );
a4981a <=( a4980a and a4975a );
a4984a <=( A167 and A168 );
a4987a <=( (not A200) and (not A199) );
a4988a <=( a4987a and a4984a );
a4991a <=( A235 and (not A202) );
a4995a <=( A302 and (not A299) );
a4996a <=( A298 and a4995a );
a4997a <=( a4996a and a4991a );
a5000a <=( A167 and A168 );
a5003a <=( (not A200) and (not A199) );
a5004a <=( a5003a and a5000a );
a5007a <=( A235 and (not A202) );
a5011a <=( A302 and A299 );
a5012a <=( (not A298) and a5011a );
a5013a <=( a5012a and a5007a );
a5016a <=( A167 and A168 );
a5019a <=( (not A200) and (not A199) );
a5020a <=( a5019a and a5016a );
a5023a <=( A235 and (not A202) );
a5027a <=( A269 and A266 );
a5028a <=( (not A265) and a5027a );
a5029a <=( a5028a and a5023a );
a5032a <=( A167 and A168 );
a5035a <=( (not A200) and (not A199) );
a5036a <=( a5035a and a5032a );
a5039a <=( A235 and (not A202) );
a5043a <=( A269 and (not A266) );
a5044a <=( A265 and a5043a );
a5045a <=( a5044a and a5039a );
a5048a <=( A167 and A168 );
a5051a <=( (not A200) and (not A199) );
a5052a <=( a5051a and a5048a );
a5055a <=( A232 and (not A202) );
a5059a <=( A300 and A299 );
a5060a <=( A234 and a5059a );
a5061a <=( a5060a and a5055a );
a5064a <=( A167 and A168 );
a5067a <=( (not A200) and (not A199) );
a5068a <=( a5067a and a5064a );
a5071a <=( A232 and (not A202) );
a5075a <=( A300 and A298 );
a5076a <=( A234 and a5075a );
a5077a <=( a5076a and a5071a );
a5080a <=( A167 and A168 );
a5083a <=( (not A200) and (not A199) );
a5084a <=( a5083a and a5080a );
a5087a <=( A232 and (not A202) );
a5091a <=( A267 and A265 );
a5092a <=( A234 and a5091a );
a5093a <=( a5092a and a5087a );
a5096a <=( A167 and A168 );
a5099a <=( (not A200) and (not A199) );
a5100a <=( a5099a and a5096a );
a5103a <=( A232 and (not A202) );
a5107a <=( A267 and A266 );
a5108a <=( A234 and a5107a );
a5109a <=( a5108a and a5103a );
a5112a <=( A167 and A168 );
a5115a <=( (not A200) and (not A199) );
a5116a <=( a5115a and a5112a );
a5119a <=( A233 and (not A202) );
a5123a <=( A300 and A299 );
a5124a <=( A234 and a5123a );
a5125a <=( a5124a and a5119a );
a5128a <=( A167 and A168 );
a5131a <=( (not A200) and (not A199) );
a5132a <=( a5131a and a5128a );
a5135a <=( A233 and (not A202) );
a5139a <=( A300 and A298 );
a5140a <=( A234 and a5139a );
a5141a <=( a5140a and a5135a );
a5144a <=( A167 and A168 );
a5147a <=( (not A200) and (not A199) );
a5148a <=( a5147a and a5144a );
a5151a <=( A233 and (not A202) );
a5155a <=( A267 and A265 );
a5156a <=( A234 and a5155a );
a5157a <=( a5156a and a5151a );
a5160a <=( A167 and A168 );
a5163a <=( (not A200) and (not A199) );
a5164a <=( a5163a and a5160a );
a5167a <=( A233 and (not A202) );
a5171a <=( A267 and A266 );
a5172a <=( A234 and a5171a );
a5173a <=( a5172a and a5167a );
a5176a <=( A167 and A168 );
a5179a <=( (not A200) and (not A199) );
a5180a <=( a5179a and a5176a );
a5183a <=( (not A232) and (not A202) );
a5187a <=( A301 and A236 );
a5188a <=( A233 and a5187a );
a5189a <=( a5188a and a5183a );
a5192a <=( A167 and A168 );
a5195a <=( (not A200) and (not A199) );
a5196a <=( a5195a and a5192a );
a5199a <=( (not A232) and (not A202) );
a5203a <=( A268 and A236 );
a5204a <=( A233 and a5203a );
a5205a <=( a5204a and a5199a );
a5208a <=( A167 and A168 );
a5211a <=( (not A200) and (not A199) );
a5212a <=( a5211a and a5208a );
a5215a <=( A232 and (not A202) );
a5219a <=( A301 and A236 );
a5220a <=( (not A233) and a5219a );
a5221a <=( a5220a and a5215a );
a5224a <=( A167 and A168 );
a5227a <=( (not A200) and (not A199) );
a5228a <=( a5227a and a5224a );
a5231a <=( A232 and (not A202) );
a5235a <=( A268 and A236 );
a5236a <=( (not A233) and a5235a );
a5237a <=( a5236a and a5231a );
a5240a <=( A167 and A170 );
a5243a <=( (not A201) and (not A166) );
a5244a <=( a5243a and a5240a );
a5247a <=( (not A203) and (not A202) );
a5251a <=( A300 and A299 );
a5252a <=( A235 and a5251a );
a5253a <=( a5252a and a5247a );
a5256a <=( A167 and A170 );
a5259a <=( (not A201) and (not A166) );
a5260a <=( a5259a and a5256a );
a5263a <=( (not A203) and (not A202) );
a5267a <=( A300 and A298 );
a5268a <=( A235 and a5267a );
a5269a <=( a5268a and a5263a );
a5272a <=( A167 and A170 );
a5275a <=( (not A201) and (not A166) );
a5276a <=( a5275a and a5272a );
a5279a <=( (not A203) and (not A202) );
a5283a <=( A267 and A265 );
a5284a <=( A235 and a5283a );
a5285a <=( a5284a and a5279a );
a5288a <=( A167 and A170 );
a5291a <=( (not A201) and (not A166) );
a5292a <=( a5291a and a5288a );
a5295a <=( (not A203) and (not A202) );
a5299a <=( A267 and A266 );
a5300a <=( A235 and a5299a );
a5301a <=( a5300a and a5295a );
a5304a <=( A167 and A170 );
a5307a <=( (not A201) and (not A166) );
a5308a <=( a5307a and a5304a );
a5311a <=( (not A203) and (not A202) );
a5315a <=( A301 and A234 );
a5316a <=( A232 and a5315a );
a5317a <=( a5316a and a5311a );
a5320a <=( A167 and A170 );
a5323a <=( (not A201) and (not A166) );
a5324a <=( a5323a and a5320a );
a5327a <=( (not A203) and (not A202) );
a5331a <=( A268 and A234 );
a5332a <=( A232 and a5331a );
a5333a <=( a5332a and a5327a );
a5336a <=( A167 and A170 );
a5339a <=( (not A201) and (not A166) );
a5340a <=( a5339a and a5336a );
a5343a <=( (not A203) and (not A202) );
a5347a <=( A301 and A234 );
a5348a <=( A233 and a5347a );
a5349a <=( a5348a and a5343a );
a5352a <=( A167 and A170 );
a5355a <=( (not A201) and (not A166) );
a5356a <=( a5355a and a5352a );
a5359a <=( (not A203) and (not A202) );
a5363a <=( A268 and A234 );
a5364a <=( A233 and a5363a );
a5365a <=( a5364a and a5359a );
a5368a <=( A167 and A170 );
a5371a <=( A199 and (not A166) );
a5372a <=( a5371a and a5368a );
a5375a <=( (not A201) and A200 );
a5379a <=( A301 and A235 );
a5380a <=( (not A202) and a5379a );
a5381a <=( a5380a and a5375a );
a5384a <=( A167 and A170 );
a5387a <=( A199 and (not A166) );
a5388a <=( a5387a and a5384a );
a5391a <=( (not A201) and A200 );
a5395a <=( A268 and A235 );
a5396a <=( (not A202) and a5395a );
a5397a <=( a5396a and a5391a );
a5400a <=( A167 and A170 );
a5403a <=( (not A199) and (not A166) );
a5404a <=( a5403a and a5400a );
a5407a <=( (not A202) and (not A200) );
a5411a <=( A300 and A299 );
a5412a <=( A235 and a5411a );
a5413a <=( a5412a and a5407a );
a5416a <=( A167 and A170 );
a5419a <=( (not A199) and (not A166) );
a5420a <=( a5419a and a5416a );
a5423a <=( (not A202) and (not A200) );
a5427a <=( A300 and A298 );
a5428a <=( A235 and a5427a );
a5429a <=( a5428a and a5423a );
a5432a <=( A167 and A170 );
a5435a <=( (not A199) and (not A166) );
a5436a <=( a5435a and a5432a );
a5439a <=( (not A202) and (not A200) );
a5443a <=( A267 and A265 );
a5444a <=( A235 and a5443a );
a5445a <=( a5444a and a5439a );
a5448a <=( A167 and A170 );
a5451a <=( (not A199) and (not A166) );
a5452a <=( a5451a and a5448a );
a5455a <=( (not A202) and (not A200) );
a5459a <=( A267 and A266 );
a5460a <=( A235 and a5459a );
a5461a <=( a5460a and a5455a );
a5464a <=( A167 and A170 );
a5467a <=( (not A199) and (not A166) );
a5468a <=( a5467a and a5464a );
a5471a <=( (not A202) and (not A200) );
a5475a <=( A301 and A234 );
a5476a <=( A232 and a5475a );
a5477a <=( a5476a and a5471a );
a5480a <=( A167 and A170 );
a5483a <=( (not A199) and (not A166) );
a5484a <=( a5483a and a5480a );
a5487a <=( (not A202) and (not A200) );
a5491a <=( A268 and A234 );
a5492a <=( A232 and a5491a );
a5493a <=( a5492a and a5487a );
a5496a <=( A167 and A170 );
a5499a <=( (not A199) and (not A166) );
a5500a <=( a5499a and a5496a );
a5503a <=( (not A202) and (not A200) );
a5507a <=( A301 and A234 );
a5508a <=( A233 and a5507a );
a5509a <=( a5508a and a5503a );
a5512a <=( A167 and A170 );
a5515a <=( (not A199) and (not A166) );
a5516a <=( a5515a and a5512a );
a5519a <=( (not A202) and (not A200) );
a5523a <=( A268 and A234 );
a5524a <=( A233 and a5523a );
a5525a <=( a5524a and a5519a );
a5528a <=( (not A167) and A170 );
a5531a <=( (not A201) and A166 );
a5532a <=( a5531a and a5528a );
a5535a <=( (not A203) and (not A202) );
a5539a <=( A300 and A299 );
a5540a <=( A235 and a5539a );
a5541a <=( a5540a and a5535a );
a5544a <=( (not A167) and A170 );
a5547a <=( (not A201) and A166 );
a5548a <=( a5547a and a5544a );
a5551a <=( (not A203) and (not A202) );
a5555a <=( A300 and A298 );
a5556a <=( A235 and a5555a );
a5557a <=( a5556a and a5551a );
a5560a <=( (not A167) and A170 );
a5563a <=( (not A201) and A166 );
a5564a <=( a5563a and a5560a );
a5567a <=( (not A203) and (not A202) );
a5571a <=( A267 and A265 );
a5572a <=( A235 and a5571a );
a5573a <=( a5572a and a5567a );
a5576a <=( (not A167) and A170 );
a5579a <=( (not A201) and A166 );
a5580a <=( a5579a and a5576a );
a5583a <=( (not A203) and (not A202) );
a5587a <=( A267 and A266 );
a5588a <=( A235 and a5587a );
a5589a <=( a5588a and a5583a );
a5592a <=( (not A167) and A170 );
a5595a <=( (not A201) and A166 );
a5596a <=( a5595a and a5592a );
a5599a <=( (not A203) and (not A202) );
a5603a <=( A301 and A234 );
a5604a <=( A232 and a5603a );
a5605a <=( a5604a and a5599a );
a5608a <=( (not A167) and A170 );
a5611a <=( (not A201) and A166 );
a5612a <=( a5611a and a5608a );
a5615a <=( (not A203) and (not A202) );
a5619a <=( A268 and A234 );
a5620a <=( A232 and a5619a );
a5621a <=( a5620a and a5615a );
a5624a <=( (not A167) and A170 );
a5627a <=( (not A201) and A166 );
a5628a <=( a5627a and a5624a );
a5631a <=( (not A203) and (not A202) );
a5635a <=( A301 and A234 );
a5636a <=( A233 and a5635a );
a5637a <=( a5636a and a5631a );
a5640a <=( (not A167) and A170 );
a5643a <=( (not A201) and A166 );
a5644a <=( a5643a and a5640a );
a5647a <=( (not A203) and (not A202) );
a5651a <=( A268 and A234 );
a5652a <=( A233 and a5651a );
a5653a <=( a5652a and a5647a );
a5656a <=( (not A167) and A170 );
a5659a <=( A199 and A166 );
a5660a <=( a5659a and a5656a );
a5663a <=( (not A201) and A200 );
a5667a <=( A301 and A235 );
a5668a <=( (not A202) and a5667a );
a5669a <=( a5668a and a5663a );
a5672a <=( (not A167) and A170 );
a5675a <=( A199 and A166 );
a5676a <=( a5675a and a5672a );
a5679a <=( (not A201) and A200 );
a5683a <=( A268 and A235 );
a5684a <=( (not A202) and a5683a );
a5685a <=( a5684a and a5679a );
a5688a <=( (not A167) and A170 );
a5691a <=( (not A199) and A166 );
a5692a <=( a5691a and a5688a );
a5695a <=( (not A202) and (not A200) );
a5699a <=( A300 and A299 );
a5700a <=( A235 and a5699a );
a5701a <=( a5700a and a5695a );
a5704a <=( (not A167) and A170 );
a5707a <=( (not A199) and A166 );
a5708a <=( a5707a and a5704a );
a5711a <=( (not A202) and (not A200) );
a5715a <=( A300 and A298 );
a5716a <=( A235 and a5715a );
a5717a <=( a5716a and a5711a );
a5720a <=( (not A167) and A170 );
a5723a <=( (not A199) and A166 );
a5724a <=( a5723a and a5720a );
a5727a <=( (not A202) and (not A200) );
a5731a <=( A267 and A265 );
a5732a <=( A235 and a5731a );
a5733a <=( a5732a and a5727a );
a5736a <=( (not A167) and A170 );
a5739a <=( (not A199) and A166 );
a5740a <=( a5739a and a5736a );
a5743a <=( (not A202) and (not A200) );
a5747a <=( A267 and A266 );
a5748a <=( A235 and a5747a );
a5749a <=( a5748a and a5743a );
a5752a <=( (not A167) and A170 );
a5755a <=( (not A199) and A166 );
a5756a <=( a5755a and a5752a );
a5759a <=( (not A202) and (not A200) );
a5763a <=( A301 and A234 );
a5764a <=( A232 and a5763a );
a5765a <=( a5764a and a5759a );
a5768a <=( (not A167) and A170 );
a5771a <=( (not A199) and A166 );
a5772a <=( a5771a and a5768a );
a5775a <=( (not A202) and (not A200) );
a5779a <=( A268 and A234 );
a5780a <=( A232 and a5779a );
a5781a <=( a5780a and a5775a );
a5784a <=( (not A167) and A170 );
a5787a <=( (not A199) and A166 );
a5788a <=( a5787a and a5784a );
a5791a <=( (not A202) and (not A200) );
a5795a <=( A301 and A234 );
a5796a <=( A233 and a5795a );
a5797a <=( a5796a and a5791a );
a5800a <=( (not A167) and A170 );
a5803a <=( (not A199) and A166 );
a5804a <=( a5803a and a5800a );
a5807a <=( (not A202) and (not A200) );
a5811a <=( A268 and A234 );
a5812a <=( A233 and a5811a );
a5813a <=( a5812a and a5807a );
a5816a <=( (not A201) and A169 );
a5819a <=( (not A203) and (not A202) );
a5820a <=( a5819a and a5816a );
a5823a <=( A234 and A232 );
a5827a <=( A302 and (not A299) );
a5828a <=( A298 and a5827a );
a5829a <=( a5828a and a5823a );
a5832a <=( (not A201) and A169 );
a5835a <=( (not A203) and (not A202) );
a5836a <=( a5835a and a5832a );
a5839a <=( A234 and A232 );
a5843a <=( A302 and A299 );
a5844a <=( (not A298) and a5843a );
a5845a <=( a5844a and a5839a );
a5848a <=( (not A201) and A169 );
a5851a <=( (not A203) and (not A202) );
a5852a <=( a5851a and a5848a );
a5855a <=( A234 and A232 );
a5859a <=( A269 and A266 );
a5860a <=( (not A265) and a5859a );
a5861a <=( a5860a and a5855a );
a5864a <=( (not A201) and A169 );
a5867a <=( (not A203) and (not A202) );
a5868a <=( a5867a and a5864a );
a5871a <=( A234 and A232 );
a5875a <=( A269 and (not A266) );
a5876a <=( A265 and a5875a );
a5877a <=( a5876a and a5871a );
a5880a <=( (not A201) and A169 );
a5883a <=( (not A203) and (not A202) );
a5884a <=( a5883a and a5880a );
a5887a <=( A234 and A233 );
a5891a <=( A302 and (not A299) );
a5892a <=( A298 and a5891a );
a5893a <=( a5892a and a5887a );
a5896a <=( (not A201) and A169 );
a5899a <=( (not A203) and (not A202) );
a5900a <=( a5899a and a5896a );
a5903a <=( A234 and A233 );
a5907a <=( A302 and A299 );
a5908a <=( (not A298) and a5907a );
a5909a <=( a5908a and a5903a );
a5912a <=( (not A201) and A169 );
a5915a <=( (not A203) and (not A202) );
a5916a <=( a5915a and a5912a );
a5919a <=( A234 and A233 );
a5923a <=( A269 and A266 );
a5924a <=( (not A265) and a5923a );
a5925a <=( a5924a and a5919a );
a5928a <=( (not A201) and A169 );
a5931a <=( (not A203) and (not A202) );
a5932a <=( a5931a and a5928a );
a5935a <=( A234 and A233 );
a5939a <=( A269 and (not A266) );
a5940a <=( A265 and a5939a );
a5941a <=( a5940a and a5935a );
a5944a <=( (not A201) and A169 );
a5947a <=( (not A203) and (not A202) );
a5948a <=( a5947a and a5944a );
a5951a <=( A233 and (not A232) );
a5955a <=( A300 and A299 );
a5956a <=( A236 and a5955a );
a5957a <=( a5956a and a5951a );
a5960a <=( (not A201) and A169 );
a5963a <=( (not A203) and (not A202) );
a5964a <=( a5963a and a5960a );
a5967a <=( A233 and (not A232) );
a5971a <=( A300 and A298 );
a5972a <=( A236 and a5971a );
a5973a <=( a5972a and a5967a );
a5976a <=( (not A201) and A169 );
a5979a <=( (not A203) and (not A202) );
a5980a <=( a5979a and a5976a );
a5983a <=( A233 and (not A232) );
a5987a <=( A267 and A265 );
a5988a <=( A236 and a5987a );
a5989a <=( a5988a and a5983a );
a5992a <=( (not A201) and A169 );
a5995a <=( (not A203) and (not A202) );
a5996a <=( a5995a and a5992a );
a5999a <=( A233 and (not A232) );
a6003a <=( A267 and A266 );
a6004a <=( A236 and a6003a );
a6005a <=( a6004a and a5999a );
a6008a <=( (not A201) and A169 );
a6011a <=( (not A203) and (not A202) );
a6012a <=( a6011a and a6008a );
a6015a <=( (not A233) and A232 );
a6019a <=( A300 and A299 );
a6020a <=( A236 and a6019a );
a6021a <=( a6020a and a6015a );
a6024a <=( (not A201) and A169 );
a6027a <=( (not A203) and (not A202) );
a6028a <=( a6027a and a6024a );
a6031a <=( (not A233) and A232 );
a6035a <=( A300 and A298 );
a6036a <=( A236 and a6035a );
a6037a <=( a6036a and a6031a );
a6040a <=( (not A201) and A169 );
a6043a <=( (not A203) and (not A202) );
a6044a <=( a6043a and a6040a );
a6047a <=( (not A233) and A232 );
a6051a <=( A267 and A265 );
a6052a <=( A236 and a6051a );
a6053a <=( a6052a and a6047a );
a6056a <=( (not A201) and A169 );
a6059a <=( (not A203) and (not A202) );
a6060a <=( a6059a and a6056a );
a6063a <=( (not A233) and A232 );
a6067a <=( A267 and A266 );
a6068a <=( A236 and a6067a );
a6069a <=( a6068a and a6063a );
a6072a <=( A199 and A169 );
a6075a <=( (not A201) and A200 );
a6076a <=( a6075a and a6072a );
a6079a <=( A235 and (not A202) );
a6083a <=( A302 and (not A299) );
a6084a <=( A298 and a6083a );
a6085a <=( a6084a and a6079a );
a6088a <=( A199 and A169 );
a6091a <=( (not A201) and A200 );
a6092a <=( a6091a and a6088a );
a6095a <=( A235 and (not A202) );
a6099a <=( A302 and A299 );
a6100a <=( (not A298) and a6099a );
a6101a <=( a6100a and a6095a );
a6104a <=( A199 and A169 );
a6107a <=( (not A201) and A200 );
a6108a <=( a6107a and a6104a );
a6111a <=( A235 and (not A202) );
a6115a <=( A269 and A266 );
a6116a <=( (not A265) and a6115a );
a6117a <=( a6116a and a6111a );
a6120a <=( A199 and A169 );
a6123a <=( (not A201) and A200 );
a6124a <=( a6123a and a6120a );
a6127a <=( A235 and (not A202) );
a6131a <=( A269 and (not A266) );
a6132a <=( A265 and a6131a );
a6133a <=( a6132a and a6127a );
a6136a <=( A199 and A169 );
a6139a <=( (not A201) and A200 );
a6140a <=( a6139a and a6136a );
a6143a <=( A232 and (not A202) );
a6147a <=( A300 and A299 );
a6148a <=( A234 and a6147a );
a6149a <=( a6148a and a6143a );
a6152a <=( A199 and A169 );
a6155a <=( (not A201) and A200 );
a6156a <=( a6155a and a6152a );
a6159a <=( A232 and (not A202) );
a6163a <=( A300 and A298 );
a6164a <=( A234 and a6163a );
a6165a <=( a6164a and a6159a );
a6168a <=( A199 and A169 );
a6171a <=( (not A201) and A200 );
a6172a <=( a6171a and a6168a );
a6175a <=( A232 and (not A202) );
a6179a <=( A267 and A265 );
a6180a <=( A234 and a6179a );
a6181a <=( a6180a and a6175a );
a6184a <=( A199 and A169 );
a6187a <=( (not A201) and A200 );
a6188a <=( a6187a and a6184a );
a6191a <=( A232 and (not A202) );
a6195a <=( A267 and A266 );
a6196a <=( A234 and a6195a );
a6197a <=( a6196a and a6191a );
a6200a <=( A199 and A169 );
a6203a <=( (not A201) and A200 );
a6204a <=( a6203a and a6200a );
a6207a <=( A233 and (not A202) );
a6211a <=( A300 and A299 );
a6212a <=( A234 and a6211a );
a6213a <=( a6212a and a6207a );
a6216a <=( A199 and A169 );
a6219a <=( (not A201) and A200 );
a6220a <=( a6219a and a6216a );
a6223a <=( A233 and (not A202) );
a6227a <=( A300 and A298 );
a6228a <=( A234 and a6227a );
a6229a <=( a6228a and a6223a );
a6232a <=( A199 and A169 );
a6235a <=( (not A201) and A200 );
a6236a <=( a6235a and a6232a );
a6239a <=( A233 and (not A202) );
a6243a <=( A267 and A265 );
a6244a <=( A234 and a6243a );
a6245a <=( a6244a and a6239a );
a6248a <=( A199 and A169 );
a6251a <=( (not A201) and A200 );
a6252a <=( a6251a and a6248a );
a6255a <=( A233 and (not A202) );
a6259a <=( A267 and A266 );
a6260a <=( A234 and a6259a );
a6261a <=( a6260a and a6255a );
a6264a <=( A199 and A169 );
a6267a <=( (not A201) and A200 );
a6268a <=( a6267a and a6264a );
a6271a <=( (not A232) and (not A202) );
a6275a <=( A301 and A236 );
a6276a <=( A233 and a6275a );
a6277a <=( a6276a and a6271a );
a6280a <=( A199 and A169 );
a6283a <=( (not A201) and A200 );
a6284a <=( a6283a and a6280a );
a6287a <=( (not A232) and (not A202) );
a6291a <=( A268 and A236 );
a6292a <=( A233 and a6291a );
a6293a <=( a6292a and a6287a );
a6296a <=( A199 and A169 );
a6299a <=( (not A201) and A200 );
a6300a <=( a6299a and a6296a );
a6303a <=( A232 and (not A202) );
a6307a <=( A301 and A236 );
a6308a <=( (not A233) and a6307a );
a6309a <=( a6308a and a6303a );
a6312a <=( A199 and A169 );
a6315a <=( (not A201) and A200 );
a6316a <=( a6315a and a6312a );
a6319a <=( A232 and (not A202) );
a6323a <=( A268 and A236 );
a6324a <=( (not A233) and a6323a );
a6325a <=( a6324a and a6319a );
a6328a <=( (not A199) and A169 );
a6331a <=( (not A202) and (not A200) );
a6332a <=( a6331a and a6328a );
a6335a <=( A234 and A232 );
a6339a <=( A302 and (not A299) );
a6340a <=( A298 and a6339a );
a6341a <=( a6340a and a6335a );
a6344a <=( (not A199) and A169 );
a6347a <=( (not A202) and (not A200) );
a6348a <=( a6347a and a6344a );
a6351a <=( A234 and A232 );
a6355a <=( A302 and A299 );
a6356a <=( (not A298) and a6355a );
a6357a <=( a6356a and a6351a );
a6360a <=( (not A199) and A169 );
a6363a <=( (not A202) and (not A200) );
a6364a <=( a6363a and a6360a );
a6367a <=( A234 and A232 );
a6371a <=( A269 and A266 );
a6372a <=( (not A265) and a6371a );
a6373a <=( a6372a and a6367a );
a6376a <=( (not A199) and A169 );
a6379a <=( (not A202) and (not A200) );
a6380a <=( a6379a and a6376a );
a6383a <=( A234 and A232 );
a6387a <=( A269 and (not A266) );
a6388a <=( A265 and a6387a );
a6389a <=( a6388a and a6383a );
a6392a <=( (not A199) and A169 );
a6395a <=( (not A202) and (not A200) );
a6396a <=( a6395a and a6392a );
a6399a <=( A234 and A233 );
a6403a <=( A302 and (not A299) );
a6404a <=( A298 and a6403a );
a6405a <=( a6404a and a6399a );
a6408a <=( (not A199) and A169 );
a6411a <=( (not A202) and (not A200) );
a6412a <=( a6411a and a6408a );
a6415a <=( A234 and A233 );
a6419a <=( A302 and A299 );
a6420a <=( (not A298) and a6419a );
a6421a <=( a6420a and a6415a );
a6424a <=( (not A199) and A169 );
a6427a <=( (not A202) and (not A200) );
a6428a <=( a6427a and a6424a );
a6431a <=( A234 and A233 );
a6435a <=( A269 and A266 );
a6436a <=( (not A265) and a6435a );
a6437a <=( a6436a and a6431a );
a6440a <=( (not A199) and A169 );
a6443a <=( (not A202) and (not A200) );
a6444a <=( a6443a and a6440a );
a6447a <=( A234 and A233 );
a6451a <=( A269 and (not A266) );
a6452a <=( A265 and a6451a );
a6453a <=( a6452a and a6447a );
a6456a <=( (not A199) and A169 );
a6459a <=( (not A202) and (not A200) );
a6460a <=( a6459a and a6456a );
a6463a <=( A233 and (not A232) );
a6467a <=( A300 and A299 );
a6468a <=( A236 and a6467a );
a6469a <=( a6468a and a6463a );
a6472a <=( (not A199) and A169 );
a6475a <=( (not A202) and (not A200) );
a6476a <=( a6475a and a6472a );
a6479a <=( A233 and (not A232) );
a6483a <=( A300 and A298 );
a6484a <=( A236 and a6483a );
a6485a <=( a6484a and a6479a );
a6488a <=( (not A199) and A169 );
a6491a <=( (not A202) and (not A200) );
a6492a <=( a6491a and a6488a );
a6495a <=( A233 and (not A232) );
a6499a <=( A267 and A265 );
a6500a <=( A236 and a6499a );
a6501a <=( a6500a and a6495a );
a6504a <=( (not A199) and A169 );
a6507a <=( (not A202) and (not A200) );
a6508a <=( a6507a and a6504a );
a6511a <=( A233 and (not A232) );
a6515a <=( A267 and A266 );
a6516a <=( A236 and a6515a );
a6517a <=( a6516a and a6511a );
a6520a <=( (not A199) and A169 );
a6523a <=( (not A202) and (not A200) );
a6524a <=( a6523a and a6520a );
a6527a <=( (not A233) and A232 );
a6531a <=( A300 and A299 );
a6532a <=( A236 and a6531a );
a6533a <=( a6532a and a6527a );
a6536a <=( (not A199) and A169 );
a6539a <=( (not A202) and (not A200) );
a6540a <=( a6539a and a6536a );
a6543a <=( (not A233) and A232 );
a6547a <=( A300 and A298 );
a6548a <=( A236 and a6547a );
a6549a <=( a6548a and a6543a );
a6552a <=( (not A199) and A169 );
a6555a <=( (not A202) and (not A200) );
a6556a <=( a6555a and a6552a );
a6559a <=( (not A233) and A232 );
a6563a <=( A267 and A265 );
a6564a <=( A236 and a6563a );
a6565a <=( a6564a and a6559a );
a6568a <=( (not A199) and A169 );
a6571a <=( (not A202) and (not A200) );
a6572a <=( a6571a and a6568a );
a6575a <=( (not A233) and A232 );
a6579a <=( A267 and A266 );
a6580a <=( A236 and a6579a );
a6581a <=( a6580a and a6575a );
a6584a <=( A166 and A168 );
a6588a <=( (not A203) and (not A202) );
a6589a <=( (not A201) and a6588a );
a6590a <=( a6589a and a6584a );
a6593a <=( A234 and A232 );
a6597a <=( A302 and (not A299) );
a6598a <=( A298 and a6597a );
a6599a <=( a6598a and a6593a );
a6602a <=( A166 and A168 );
a6606a <=( (not A203) and (not A202) );
a6607a <=( (not A201) and a6606a );
a6608a <=( a6607a and a6602a );
a6611a <=( A234 and A232 );
a6615a <=( A302 and A299 );
a6616a <=( (not A298) and a6615a );
a6617a <=( a6616a and a6611a );
a6620a <=( A166 and A168 );
a6624a <=( (not A203) and (not A202) );
a6625a <=( (not A201) and a6624a );
a6626a <=( a6625a and a6620a );
a6629a <=( A234 and A232 );
a6633a <=( A269 and A266 );
a6634a <=( (not A265) and a6633a );
a6635a <=( a6634a and a6629a );
a6638a <=( A166 and A168 );
a6642a <=( (not A203) and (not A202) );
a6643a <=( (not A201) and a6642a );
a6644a <=( a6643a and a6638a );
a6647a <=( A234 and A232 );
a6651a <=( A269 and (not A266) );
a6652a <=( A265 and a6651a );
a6653a <=( a6652a and a6647a );
a6656a <=( A166 and A168 );
a6660a <=( (not A203) and (not A202) );
a6661a <=( (not A201) and a6660a );
a6662a <=( a6661a and a6656a );
a6665a <=( A234 and A233 );
a6669a <=( A302 and (not A299) );
a6670a <=( A298 and a6669a );
a6671a <=( a6670a and a6665a );
a6674a <=( A166 and A168 );
a6678a <=( (not A203) and (not A202) );
a6679a <=( (not A201) and a6678a );
a6680a <=( a6679a and a6674a );
a6683a <=( A234 and A233 );
a6687a <=( A302 and A299 );
a6688a <=( (not A298) and a6687a );
a6689a <=( a6688a and a6683a );
a6692a <=( A166 and A168 );
a6696a <=( (not A203) and (not A202) );
a6697a <=( (not A201) and a6696a );
a6698a <=( a6697a and a6692a );
a6701a <=( A234 and A233 );
a6705a <=( A269 and A266 );
a6706a <=( (not A265) and a6705a );
a6707a <=( a6706a and a6701a );
a6710a <=( A166 and A168 );
a6714a <=( (not A203) and (not A202) );
a6715a <=( (not A201) and a6714a );
a6716a <=( a6715a and a6710a );
a6719a <=( A234 and A233 );
a6723a <=( A269 and (not A266) );
a6724a <=( A265 and a6723a );
a6725a <=( a6724a and a6719a );
a6728a <=( A166 and A168 );
a6732a <=( (not A203) and (not A202) );
a6733a <=( (not A201) and a6732a );
a6734a <=( a6733a and a6728a );
a6737a <=( A233 and (not A232) );
a6741a <=( A300 and A299 );
a6742a <=( A236 and a6741a );
a6743a <=( a6742a and a6737a );
a6746a <=( A166 and A168 );
a6750a <=( (not A203) and (not A202) );
a6751a <=( (not A201) and a6750a );
a6752a <=( a6751a and a6746a );
a6755a <=( A233 and (not A232) );
a6759a <=( A300 and A298 );
a6760a <=( A236 and a6759a );
a6761a <=( a6760a and a6755a );
a6764a <=( A166 and A168 );
a6768a <=( (not A203) and (not A202) );
a6769a <=( (not A201) and a6768a );
a6770a <=( a6769a and a6764a );
a6773a <=( A233 and (not A232) );
a6777a <=( A267 and A265 );
a6778a <=( A236 and a6777a );
a6779a <=( a6778a and a6773a );
a6782a <=( A166 and A168 );
a6786a <=( (not A203) and (not A202) );
a6787a <=( (not A201) and a6786a );
a6788a <=( a6787a and a6782a );
a6791a <=( A233 and (not A232) );
a6795a <=( A267 and A266 );
a6796a <=( A236 and a6795a );
a6797a <=( a6796a and a6791a );
a6800a <=( A166 and A168 );
a6804a <=( (not A203) and (not A202) );
a6805a <=( (not A201) and a6804a );
a6806a <=( a6805a and a6800a );
a6809a <=( (not A233) and A232 );
a6813a <=( A300 and A299 );
a6814a <=( A236 and a6813a );
a6815a <=( a6814a and a6809a );
a6818a <=( A166 and A168 );
a6822a <=( (not A203) and (not A202) );
a6823a <=( (not A201) and a6822a );
a6824a <=( a6823a and a6818a );
a6827a <=( (not A233) and A232 );
a6831a <=( A300 and A298 );
a6832a <=( A236 and a6831a );
a6833a <=( a6832a and a6827a );
a6836a <=( A166 and A168 );
a6840a <=( (not A203) and (not A202) );
a6841a <=( (not A201) and a6840a );
a6842a <=( a6841a and a6836a );
a6845a <=( (not A233) and A232 );
a6849a <=( A267 and A265 );
a6850a <=( A236 and a6849a );
a6851a <=( a6850a and a6845a );
a6854a <=( A166 and A168 );
a6858a <=( (not A203) and (not A202) );
a6859a <=( (not A201) and a6858a );
a6860a <=( a6859a and a6854a );
a6863a <=( (not A233) and A232 );
a6867a <=( A267 and A266 );
a6868a <=( A236 and a6867a );
a6869a <=( a6868a and a6863a );
a6872a <=( A166 and A168 );
a6876a <=( (not A201) and A200 );
a6877a <=( A199 and a6876a );
a6878a <=( a6877a and a6872a );
a6881a <=( A235 and (not A202) );
a6885a <=( A302 and (not A299) );
a6886a <=( A298 and a6885a );
a6887a <=( a6886a and a6881a );
a6890a <=( A166 and A168 );
a6894a <=( (not A201) and A200 );
a6895a <=( A199 and a6894a );
a6896a <=( a6895a and a6890a );
a6899a <=( A235 and (not A202) );
a6903a <=( A302 and A299 );
a6904a <=( (not A298) and a6903a );
a6905a <=( a6904a and a6899a );
a6908a <=( A166 and A168 );
a6912a <=( (not A201) and A200 );
a6913a <=( A199 and a6912a );
a6914a <=( a6913a and a6908a );
a6917a <=( A235 and (not A202) );
a6921a <=( A269 and A266 );
a6922a <=( (not A265) and a6921a );
a6923a <=( a6922a and a6917a );
a6926a <=( A166 and A168 );
a6930a <=( (not A201) and A200 );
a6931a <=( A199 and a6930a );
a6932a <=( a6931a and a6926a );
a6935a <=( A235 and (not A202) );
a6939a <=( A269 and (not A266) );
a6940a <=( A265 and a6939a );
a6941a <=( a6940a and a6935a );
a6944a <=( A166 and A168 );
a6948a <=( (not A201) and A200 );
a6949a <=( A199 and a6948a );
a6950a <=( a6949a and a6944a );
a6953a <=( A232 and (not A202) );
a6957a <=( A300 and A299 );
a6958a <=( A234 and a6957a );
a6959a <=( a6958a and a6953a );
a6962a <=( A166 and A168 );
a6966a <=( (not A201) and A200 );
a6967a <=( A199 and a6966a );
a6968a <=( a6967a and a6962a );
a6971a <=( A232 and (not A202) );
a6975a <=( A300 and A298 );
a6976a <=( A234 and a6975a );
a6977a <=( a6976a and a6971a );
a6980a <=( A166 and A168 );
a6984a <=( (not A201) and A200 );
a6985a <=( A199 and a6984a );
a6986a <=( a6985a and a6980a );
a6989a <=( A232 and (not A202) );
a6993a <=( A267 and A265 );
a6994a <=( A234 and a6993a );
a6995a <=( a6994a and a6989a );
a6998a <=( A166 and A168 );
a7002a <=( (not A201) and A200 );
a7003a <=( A199 and a7002a );
a7004a <=( a7003a and a6998a );
a7007a <=( A232 and (not A202) );
a7011a <=( A267 and A266 );
a7012a <=( A234 and a7011a );
a7013a <=( a7012a and a7007a );
a7016a <=( A166 and A168 );
a7020a <=( (not A201) and A200 );
a7021a <=( A199 and a7020a );
a7022a <=( a7021a and a7016a );
a7025a <=( A233 and (not A202) );
a7029a <=( A300 and A299 );
a7030a <=( A234 and a7029a );
a7031a <=( a7030a and a7025a );
a7034a <=( A166 and A168 );
a7038a <=( (not A201) and A200 );
a7039a <=( A199 and a7038a );
a7040a <=( a7039a and a7034a );
a7043a <=( A233 and (not A202) );
a7047a <=( A300 and A298 );
a7048a <=( A234 and a7047a );
a7049a <=( a7048a and a7043a );
a7052a <=( A166 and A168 );
a7056a <=( (not A201) and A200 );
a7057a <=( A199 and a7056a );
a7058a <=( a7057a and a7052a );
a7061a <=( A233 and (not A202) );
a7065a <=( A267 and A265 );
a7066a <=( A234 and a7065a );
a7067a <=( a7066a and a7061a );
a7070a <=( A166 and A168 );
a7074a <=( (not A201) and A200 );
a7075a <=( A199 and a7074a );
a7076a <=( a7075a and a7070a );
a7079a <=( A233 and (not A202) );
a7083a <=( A267 and A266 );
a7084a <=( A234 and a7083a );
a7085a <=( a7084a and a7079a );
a7088a <=( A166 and A168 );
a7092a <=( (not A201) and A200 );
a7093a <=( A199 and a7092a );
a7094a <=( a7093a and a7088a );
a7097a <=( (not A232) and (not A202) );
a7101a <=( A301 and A236 );
a7102a <=( A233 and a7101a );
a7103a <=( a7102a and a7097a );
a7106a <=( A166 and A168 );
a7110a <=( (not A201) and A200 );
a7111a <=( A199 and a7110a );
a7112a <=( a7111a and a7106a );
a7115a <=( (not A232) and (not A202) );
a7119a <=( A268 and A236 );
a7120a <=( A233 and a7119a );
a7121a <=( a7120a and a7115a );
a7124a <=( A166 and A168 );
a7128a <=( (not A201) and A200 );
a7129a <=( A199 and a7128a );
a7130a <=( a7129a and a7124a );
a7133a <=( A232 and (not A202) );
a7137a <=( A301 and A236 );
a7138a <=( (not A233) and a7137a );
a7139a <=( a7138a and a7133a );
a7142a <=( A166 and A168 );
a7146a <=( (not A201) and A200 );
a7147a <=( A199 and a7146a );
a7148a <=( a7147a and a7142a );
a7151a <=( A232 and (not A202) );
a7155a <=( A268 and A236 );
a7156a <=( (not A233) and a7155a );
a7157a <=( a7156a and a7151a );
a7160a <=( A166 and A168 );
a7164a <=( (not A202) and (not A200) );
a7165a <=( (not A199) and a7164a );
a7166a <=( a7165a and a7160a );
a7169a <=( A234 and A232 );
a7173a <=( A302 and (not A299) );
a7174a <=( A298 and a7173a );
a7175a <=( a7174a and a7169a );
a7178a <=( A166 and A168 );
a7182a <=( (not A202) and (not A200) );
a7183a <=( (not A199) and a7182a );
a7184a <=( a7183a and a7178a );
a7187a <=( A234 and A232 );
a7191a <=( A302 and A299 );
a7192a <=( (not A298) and a7191a );
a7193a <=( a7192a and a7187a );
a7196a <=( A166 and A168 );
a7200a <=( (not A202) and (not A200) );
a7201a <=( (not A199) and a7200a );
a7202a <=( a7201a and a7196a );
a7205a <=( A234 and A232 );
a7209a <=( A269 and A266 );
a7210a <=( (not A265) and a7209a );
a7211a <=( a7210a and a7205a );
a7214a <=( A166 and A168 );
a7218a <=( (not A202) and (not A200) );
a7219a <=( (not A199) and a7218a );
a7220a <=( a7219a and a7214a );
a7223a <=( A234 and A232 );
a7227a <=( A269 and (not A266) );
a7228a <=( A265 and a7227a );
a7229a <=( a7228a and a7223a );
a7232a <=( A166 and A168 );
a7236a <=( (not A202) and (not A200) );
a7237a <=( (not A199) and a7236a );
a7238a <=( a7237a and a7232a );
a7241a <=( A234 and A233 );
a7245a <=( A302 and (not A299) );
a7246a <=( A298 and a7245a );
a7247a <=( a7246a and a7241a );
a7250a <=( A166 and A168 );
a7254a <=( (not A202) and (not A200) );
a7255a <=( (not A199) and a7254a );
a7256a <=( a7255a and a7250a );
a7259a <=( A234 and A233 );
a7263a <=( A302 and A299 );
a7264a <=( (not A298) and a7263a );
a7265a <=( a7264a and a7259a );
a7268a <=( A166 and A168 );
a7272a <=( (not A202) and (not A200) );
a7273a <=( (not A199) and a7272a );
a7274a <=( a7273a and a7268a );
a7277a <=( A234 and A233 );
a7281a <=( A269 and A266 );
a7282a <=( (not A265) and a7281a );
a7283a <=( a7282a and a7277a );
a7286a <=( A166 and A168 );
a7290a <=( (not A202) and (not A200) );
a7291a <=( (not A199) and a7290a );
a7292a <=( a7291a and a7286a );
a7295a <=( A234 and A233 );
a7299a <=( A269 and (not A266) );
a7300a <=( A265 and a7299a );
a7301a <=( a7300a and a7295a );
a7304a <=( A166 and A168 );
a7308a <=( (not A202) and (not A200) );
a7309a <=( (not A199) and a7308a );
a7310a <=( a7309a and a7304a );
a7313a <=( A233 and (not A232) );
a7317a <=( A300 and A299 );
a7318a <=( A236 and a7317a );
a7319a <=( a7318a and a7313a );
a7322a <=( A166 and A168 );
a7326a <=( (not A202) and (not A200) );
a7327a <=( (not A199) and a7326a );
a7328a <=( a7327a and a7322a );
a7331a <=( A233 and (not A232) );
a7335a <=( A300 and A298 );
a7336a <=( A236 and a7335a );
a7337a <=( a7336a and a7331a );
a7340a <=( A166 and A168 );
a7344a <=( (not A202) and (not A200) );
a7345a <=( (not A199) and a7344a );
a7346a <=( a7345a and a7340a );
a7349a <=( A233 and (not A232) );
a7353a <=( A267 and A265 );
a7354a <=( A236 and a7353a );
a7355a <=( a7354a and a7349a );
a7358a <=( A166 and A168 );
a7362a <=( (not A202) and (not A200) );
a7363a <=( (not A199) and a7362a );
a7364a <=( a7363a and a7358a );
a7367a <=( A233 and (not A232) );
a7371a <=( A267 and A266 );
a7372a <=( A236 and a7371a );
a7373a <=( a7372a and a7367a );
a7376a <=( A166 and A168 );
a7380a <=( (not A202) and (not A200) );
a7381a <=( (not A199) and a7380a );
a7382a <=( a7381a and a7376a );
a7385a <=( (not A233) and A232 );
a7389a <=( A300 and A299 );
a7390a <=( A236 and a7389a );
a7391a <=( a7390a and a7385a );
a7394a <=( A166 and A168 );
a7398a <=( (not A202) and (not A200) );
a7399a <=( (not A199) and a7398a );
a7400a <=( a7399a and a7394a );
a7403a <=( (not A233) and A232 );
a7407a <=( A300 and A298 );
a7408a <=( A236 and a7407a );
a7409a <=( a7408a and a7403a );
a7412a <=( A166 and A168 );
a7416a <=( (not A202) and (not A200) );
a7417a <=( (not A199) and a7416a );
a7418a <=( a7417a and a7412a );
a7421a <=( (not A233) and A232 );
a7425a <=( A267 and A265 );
a7426a <=( A236 and a7425a );
a7427a <=( a7426a and a7421a );
a7430a <=( A166 and A168 );
a7434a <=( (not A202) and (not A200) );
a7435a <=( (not A199) and a7434a );
a7436a <=( a7435a and a7430a );
a7439a <=( (not A233) and A232 );
a7443a <=( A267 and A266 );
a7444a <=( A236 and a7443a );
a7445a <=( a7444a and a7439a );
a7448a <=( A167 and A168 );
a7452a <=( (not A203) and (not A202) );
a7453a <=( (not A201) and a7452a );
a7454a <=( a7453a and a7448a );
a7457a <=( A234 and A232 );
a7461a <=( A302 and (not A299) );
a7462a <=( A298 and a7461a );
a7463a <=( a7462a and a7457a );
a7466a <=( A167 and A168 );
a7470a <=( (not A203) and (not A202) );
a7471a <=( (not A201) and a7470a );
a7472a <=( a7471a and a7466a );
a7475a <=( A234 and A232 );
a7479a <=( A302 and A299 );
a7480a <=( (not A298) and a7479a );
a7481a <=( a7480a and a7475a );
a7484a <=( A167 and A168 );
a7488a <=( (not A203) and (not A202) );
a7489a <=( (not A201) and a7488a );
a7490a <=( a7489a and a7484a );
a7493a <=( A234 and A232 );
a7497a <=( A269 and A266 );
a7498a <=( (not A265) and a7497a );
a7499a <=( a7498a and a7493a );
a7502a <=( A167 and A168 );
a7506a <=( (not A203) and (not A202) );
a7507a <=( (not A201) and a7506a );
a7508a <=( a7507a and a7502a );
a7511a <=( A234 and A232 );
a7515a <=( A269 and (not A266) );
a7516a <=( A265 and a7515a );
a7517a <=( a7516a and a7511a );
a7520a <=( A167 and A168 );
a7524a <=( (not A203) and (not A202) );
a7525a <=( (not A201) and a7524a );
a7526a <=( a7525a and a7520a );
a7529a <=( A234 and A233 );
a7533a <=( A302 and (not A299) );
a7534a <=( A298 and a7533a );
a7535a <=( a7534a and a7529a );
a7538a <=( A167 and A168 );
a7542a <=( (not A203) and (not A202) );
a7543a <=( (not A201) and a7542a );
a7544a <=( a7543a and a7538a );
a7547a <=( A234 and A233 );
a7551a <=( A302 and A299 );
a7552a <=( (not A298) and a7551a );
a7553a <=( a7552a and a7547a );
a7556a <=( A167 and A168 );
a7560a <=( (not A203) and (not A202) );
a7561a <=( (not A201) and a7560a );
a7562a <=( a7561a and a7556a );
a7565a <=( A234 and A233 );
a7569a <=( A269 and A266 );
a7570a <=( (not A265) and a7569a );
a7571a <=( a7570a and a7565a );
a7574a <=( A167 and A168 );
a7578a <=( (not A203) and (not A202) );
a7579a <=( (not A201) and a7578a );
a7580a <=( a7579a and a7574a );
a7583a <=( A234 and A233 );
a7587a <=( A269 and (not A266) );
a7588a <=( A265 and a7587a );
a7589a <=( a7588a and a7583a );
a7592a <=( A167 and A168 );
a7596a <=( (not A203) and (not A202) );
a7597a <=( (not A201) and a7596a );
a7598a <=( a7597a and a7592a );
a7601a <=( A233 and (not A232) );
a7605a <=( A300 and A299 );
a7606a <=( A236 and a7605a );
a7607a <=( a7606a and a7601a );
a7610a <=( A167 and A168 );
a7614a <=( (not A203) and (not A202) );
a7615a <=( (not A201) and a7614a );
a7616a <=( a7615a and a7610a );
a7619a <=( A233 and (not A232) );
a7623a <=( A300 and A298 );
a7624a <=( A236 and a7623a );
a7625a <=( a7624a and a7619a );
a7628a <=( A167 and A168 );
a7632a <=( (not A203) and (not A202) );
a7633a <=( (not A201) and a7632a );
a7634a <=( a7633a and a7628a );
a7637a <=( A233 and (not A232) );
a7641a <=( A267 and A265 );
a7642a <=( A236 and a7641a );
a7643a <=( a7642a and a7637a );
a7646a <=( A167 and A168 );
a7650a <=( (not A203) and (not A202) );
a7651a <=( (not A201) and a7650a );
a7652a <=( a7651a and a7646a );
a7655a <=( A233 and (not A232) );
a7659a <=( A267 and A266 );
a7660a <=( A236 and a7659a );
a7661a <=( a7660a and a7655a );
a7664a <=( A167 and A168 );
a7668a <=( (not A203) and (not A202) );
a7669a <=( (not A201) and a7668a );
a7670a <=( a7669a and a7664a );
a7673a <=( (not A233) and A232 );
a7677a <=( A300 and A299 );
a7678a <=( A236 and a7677a );
a7679a <=( a7678a and a7673a );
a7682a <=( A167 and A168 );
a7686a <=( (not A203) and (not A202) );
a7687a <=( (not A201) and a7686a );
a7688a <=( a7687a and a7682a );
a7691a <=( (not A233) and A232 );
a7695a <=( A300 and A298 );
a7696a <=( A236 and a7695a );
a7697a <=( a7696a and a7691a );
a7700a <=( A167 and A168 );
a7704a <=( (not A203) and (not A202) );
a7705a <=( (not A201) and a7704a );
a7706a <=( a7705a and a7700a );
a7709a <=( (not A233) and A232 );
a7713a <=( A267 and A265 );
a7714a <=( A236 and a7713a );
a7715a <=( a7714a and a7709a );
a7718a <=( A167 and A168 );
a7722a <=( (not A203) and (not A202) );
a7723a <=( (not A201) and a7722a );
a7724a <=( a7723a and a7718a );
a7727a <=( (not A233) and A232 );
a7731a <=( A267 and A266 );
a7732a <=( A236 and a7731a );
a7733a <=( a7732a and a7727a );
a7736a <=( A167 and A168 );
a7740a <=( (not A201) and A200 );
a7741a <=( A199 and a7740a );
a7742a <=( a7741a and a7736a );
a7745a <=( A235 and (not A202) );
a7749a <=( A302 and (not A299) );
a7750a <=( A298 and a7749a );
a7751a <=( a7750a and a7745a );
a7754a <=( A167 and A168 );
a7758a <=( (not A201) and A200 );
a7759a <=( A199 and a7758a );
a7760a <=( a7759a and a7754a );
a7763a <=( A235 and (not A202) );
a7767a <=( A302 and A299 );
a7768a <=( (not A298) and a7767a );
a7769a <=( a7768a and a7763a );
a7772a <=( A167 and A168 );
a7776a <=( (not A201) and A200 );
a7777a <=( A199 and a7776a );
a7778a <=( a7777a and a7772a );
a7781a <=( A235 and (not A202) );
a7785a <=( A269 and A266 );
a7786a <=( (not A265) and a7785a );
a7787a <=( a7786a and a7781a );
a7790a <=( A167 and A168 );
a7794a <=( (not A201) and A200 );
a7795a <=( A199 and a7794a );
a7796a <=( a7795a and a7790a );
a7799a <=( A235 and (not A202) );
a7803a <=( A269 and (not A266) );
a7804a <=( A265 and a7803a );
a7805a <=( a7804a and a7799a );
a7808a <=( A167 and A168 );
a7812a <=( (not A201) and A200 );
a7813a <=( A199 and a7812a );
a7814a <=( a7813a and a7808a );
a7817a <=( A232 and (not A202) );
a7821a <=( A300 and A299 );
a7822a <=( A234 and a7821a );
a7823a <=( a7822a and a7817a );
a7826a <=( A167 and A168 );
a7830a <=( (not A201) and A200 );
a7831a <=( A199 and a7830a );
a7832a <=( a7831a and a7826a );
a7835a <=( A232 and (not A202) );
a7839a <=( A300 and A298 );
a7840a <=( A234 and a7839a );
a7841a <=( a7840a and a7835a );
a7844a <=( A167 and A168 );
a7848a <=( (not A201) and A200 );
a7849a <=( A199 and a7848a );
a7850a <=( a7849a and a7844a );
a7853a <=( A232 and (not A202) );
a7857a <=( A267 and A265 );
a7858a <=( A234 and a7857a );
a7859a <=( a7858a and a7853a );
a7862a <=( A167 and A168 );
a7866a <=( (not A201) and A200 );
a7867a <=( A199 and a7866a );
a7868a <=( a7867a and a7862a );
a7871a <=( A232 and (not A202) );
a7875a <=( A267 and A266 );
a7876a <=( A234 and a7875a );
a7877a <=( a7876a and a7871a );
a7880a <=( A167 and A168 );
a7884a <=( (not A201) and A200 );
a7885a <=( A199 and a7884a );
a7886a <=( a7885a and a7880a );
a7889a <=( A233 and (not A202) );
a7893a <=( A300 and A299 );
a7894a <=( A234 and a7893a );
a7895a <=( a7894a and a7889a );
a7898a <=( A167 and A168 );
a7902a <=( (not A201) and A200 );
a7903a <=( A199 and a7902a );
a7904a <=( a7903a and a7898a );
a7907a <=( A233 and (not A202) );
a7911a <=( A300 and A298 );
a7912a <=( A234 and a7911a );
a7913a <=( a7912a and a7907a );
a7916a <=( A167 and A168 );
a7920a <=( (not A201) and A200 );
a7921a <=( A199 and a7920a );
a7922a <=( a7921a and a7916a );
a7925a <=( A233 and (not A202) );
a7929a <=( A267 and A265 );
a7930a <=( A234 and a7929a );
a7931a <=( a7930a and a7925a );
a7934a <=( A167 and A168 );
a7938a <=( (not A201) and A200 );
a7939a <=( A199 and a7938a );
a7940a <=( a7939a and a7934a );
a7943a <=( A233 and (not A202) );
a7947a <=( A267 and A266 );
a7948a <=( A234 and a7947a );
a7949a <=( a7948a and a7943a );
a7952a <=( A167 and A168 );
a7956a <=( (not A201) and A200 );
a7957a <=( A199 and a7956a );
a7958a <=( a7957a and a7952a );
a7961a <=( (not A232) and (not A202) );
a7965a <=( A301 and A236 );
a7966a <=( A233 and a7965a );
a7967a <=( a7966a and a7961a );
a7970a <=( A167 and A168 );
a7974a <=( (not A201) and A200 );
a7975a <=( A199 and a7974a );
a7976a <=( a7975a and a7970a );
a7979a <=( (not A232) and (not A202) );
a7983a <=( A268 and A236 );
a7984a <=( A233 and a7983a );
a7985a <=( a7984a and a7979a );
a7988a <=( A167 and A168 );
a7992a <=( (not A201) and A200 );
a7993a <=( A199 and a7992a );
a7994a <=( a7993a and a7988a );
a7997a <=( A232 and (not A202) );
a8001a <=( A301 and A236 );
a8002a <=( (not A233) and a8001a );
a8003a <=( a8002a and a7997a );
a8006a <=( A167 and A168 );
a8010a <=( (not A201) and A200 );
a8011a <=( A199 and a8010a );
a8012a <=( a8011a and a8006a );
a8015a <=( A232 and (not A202) );
a8019a <=( A268 and A236 );
a8020a <=( (not A233) and a8019a );
a8021a <=( a8020a and a8015a );
a8024a <=( A167 and A168 );
a8028a <=( (not A202) and (not A200) );
a8029a <=( (not A199) and a8028a );
a8030a <=( a8029a and a8024a );
a8033a <=( A234 and A232 );
a8037a <=( A302 and (not A299) );
a8038a <=( A298 and a8037a );
a8039a <=( a8038a and a8033a );
a8042a <=( A167 and A168 );
a8046a <=( (not A202) and (not A200) );
a8047a <=( (not A199) and a8046a );
a8048a <=( a8047a and a8042a );
a8051a <=( A234 and A232 );
a8055a <=( A302 and A299 );
a8056a <=( (not A298) and a8055a );
a8057a <=( a8056a and a8051a );
a8060a <=( A167 and A168 );
a8064a <=( (not A202) and (not A200) );
a8065a <=( (not A199) and a8064a );
a8066a <=( a8065a and a8060a );
a8069a <=( A234 and A232 );
a8073a <=( A269 and A266 );
a8074a <=( (not A265) and a8073a );
a8075a <=( a8074a and a8069a );
a8078a <=( A167 and A168 );
a8082a <=( (not A202) and (not A200) );
a8083a <=( (not A199) and a8082a );
a8084a <=( a8083a and a8078a );
a8087a <=( A234 and A232 );
a8091a <=( A269 and (not A266) );
a8092a <=( A265 and a8091a );
a8093a <=( a8092a and a8087a );
a8096a <=( A167 and A168 );
a8100a <=( (not A202) and (not A200) );
a8101a <=( (not A199) and a8100a );
a8102a <=( a8101a and a8096a );
a8105a <=( A234 and A233 );
a8109a <=( A302 and (not A299) );
a8110a <=( A298 and a8109a );
a8111a <=( a8110a and a8105a );
a8114a <=( A167 and A168 );
a8118a <=( (not A202) and (not A200) );
a8119a <=( (not A199) and a8118a );
a8120a <=( a8119a and a8114a );
a8123a <=( A234 and A233 );
a8127a <=( A302 and A299 );
a8128a <=( (not A298) and a8127a );
a8129a <=( a8128a and a8123a );
a8132a <=( A167 and A168 );
a8136a <=( (not A202) and (not A200) );
a8137a <=( (not A199) and a8136a );
a8138a <=( a8137a and a8132a );
a8141a <=( A234 and A233 );
a8145a <=( A269 and A266 );
a8146a <=( (not A265) and a8145a );
a8147a <=( a8146a and a8141a );
a8150a <=( A167 and A168 );
a8154a <=( (not A202) and (not A200) );
a8155a <=( (not A199) and a8154a );
a8156a <=( a8155a and a8150a );
a8159a <=( A234 and A233 );
a8163a <=( A269 and (not A266) );
a8164a <=( A265 and a8163a );
a8165a <=( a8164a and a8159a );
a8168a <=( A167 and A168 );
a8172a <=( (not A202) and (not A200) );
a8173a <=( (not A199) and a8172a );
a8174a <=( a8173a and a8168a );
a8177a <=( A233 and (not A232) );
a8181a <=( A300 and A299 );
a8182a <=( A236 and a8181a );
a8183a <=( a8182a and a8177a );
a8186a <=( A167 and A168 );
a8190a <=( (not A202) and (not A200) );
a8191a <=( (not A199) and a8190a );
a8192a <=( a8191a and a8186a );
a8195a <=( A233 and (not A232) );
a8199a <=( A300 and A298 );
a8200a <=( A236 and a8199a );
a8201a <=( a8200a and a8195a );
a8204a <=( A167 and A168 );
a8208a <=( (not A202) and (not A200) );
a8209a <=( (not A199) and a8208a );
a8210a <=( a8209a and a8204a );
a8213a <=( A233 and (not A232) );
a8217a <=( A267 and A265 );
a8218a <=( A236 and a8217a );
a8219a <=( a8218a and a8213a );
a8222a <=( A167 and A168 );
a8226a <=( (not A202) and (not A200) );
a8227a <=( (not A199) and a8226a );
a8228a <=( a8227a and a8222a );
a8231a <=( A233 and (not A232) );
a8235a <=( A267 and A266 );
a8236a <=( A236 and a8235a );
a8237a <=( a8236a and a8231a );
a8240a <=( A167 and A168 );
a8244a <=( (not A202) and (not A200) );
a8245a <=( (not A199) and a8244a );
a8246a <=( a8245a and a8240a );
a8249a <=( (not A233) and A232 );
a8253a <=( A300 and A299 );
a8254a <=( A236 and a8253a );
a8255a <=( a8254a and a8249a );
a8258a <=( A167 and A168 );
a8262a <=( (not A202) and (not A200) );
a8263a <=( (not A199) and a8262a );
a8264a <=( a8263a and a8258a );
a8267a <=( (not A233) and A232 );
a8271a <=( A300 and A298 );
a8272a <=( A236 and a8271a );
a8273a <=( a8272a and a8267a );
a8276a <=( A167 and A168 );
a8280a <=( (not A202) and (not A200) );
a8281a <=( (not A199) and a8280a );
a8282a <=( a8281a and a8276a );
a8285a <=( (not A233) and A232 );
a8289a <=( A267 and A265 );
a8290a <=( A236 and a8289a );
a8291a <=( a8290a and a8285a );
a8294a <=( A167 and A168 );
a8298a <=( (not A202) and (not A200) );
a8299a <=( (not A199) and a8298a );
a8300a <=( a8299a and a8294a );
a8303a <=( (not A233) and A232 );
a8307a <=( A267 and A266 );
a8308a <=( A236 and a8307a );
a8309a <=( a8308a and a8303a );
a8312a <=( A167 and A170 );
a8316a <=( (not A202) and (not A201) );
a8317a <=( (not A166) and a8316a );
a8318a <=( a8317a and a8312a );
a8321a <=( A235 and (not A203) );
a8325a <=( A302 and (not A299) );
a8326a <=( A298 and a8325a );
a8327a <=( a8326a and a8321a );
a8330a <=( A167 and A170 );
a8334a <=( (not A202) and (not A201) );
a8335a <=( (not A166) and a8334a );
a8336a <=( a8335a and a8330a );
a8339a <=( A235 and (not A203) );
a8343a <=( A302 and A299 );
a8344a <=( (not A298) and a8343a );
a8345a <=( a8344a and a8339a );
a8348a <=( A167 and A170 );
a8352a <=( (not A202) and (not A201) );
a8353a <=( (not A166) and a8352a );
a8354a <=( a8353a and a8348a );
a8357a <=( A235 and (not A203) );
a8361a <=( A269 and A266 );
a8362a <=( (not A265) and a8361a );
a8363a <=( a8362a and a8357a );
a8366a <=( A167 and A170 );
a8370a <=( (not A202) and (not A201) );
a8371a <=( (not A166) and a8370a );
a8372a <=( a8371a and a8366a );
a8375a <=( A235 and (not A203) );
a8379a <=( A269 and (not A266) );
a8380a <=( A265 and a8379a );
a8381a <=( a8380a and a8375a );
a8384a <=( A167 and A170 );
a8388a <=( (not A202) and (not A201) );
a8389a <=( (not A166) and a8388a );
a8390a <=( a8389a and a8384a );
a8393a <=( A232 and (not A203) );
a8397a <=( A300 and A299 );
a8398a <=( A234 and a8397a );
a8399a <=( a8398a and a8393a );
a8402a <=( A167 and A170 );
a8406a <=( (not A202) and (not A201) );
a8407a <=( (not A166) and a8406a );
a8408a <=( a8407a and a8402a );
a8411a <=( A232 and (not A203) );
a8415a <=( A300 and A298 );
a8416a <=( A234 and a8415a );
a8417a <=( a8416a and a8411a );
a8420a <=( A167 and A170 );
a8424a <=( (not A202) and (not A201) );
a8425a <=( (not A166) and a8424a );
a8426a <=( a8425a and a8420a );
a8429a <=( A232 and (not A203) );
a8433a <=( A267 and A265 );
a8434a <=( A234 and a8433a );
a8435a <=( a8434a and a8429a );
a8438a <=( A167 and A170 );
a8442a <=( (not A202) and (not A201) );
a8443a <=( (not A166) and a8442a );
a8444a <=( a8443a and a8438a );
a8447a <=( A232 and (not A203) );
a8451a <=( A267 and A266 );
a8452a <=( A234 and a8451a );
a8453a <=( a8452a and a8447a );
a8456a <=( A167 and A170 );
a8460a <=( (not A202) and (not A201) );
a8461a <=( (not A166) and a8460a );
a8462a <=( a8461a and a8456a );
a8465a <=( A233 and (not A203) );
a8469a <=( A300 and A299 );
a8470a <=( A234 and a8469a );
a8471a <=( a8470a and a8465a );
a8474a <=( A167 and A170 );
a8478a <=( (not A202) and (not A201) );
a8479a <=( (not A166) and a8478a );
a8480a <=( a8479a and a8474a );
a8483a <=( A233 and (not A203) );
a8487a <=( A300 and A298 );
a8488a <=( A234 and a8487a );
a8489a <=( a8488a and a8483a );
a8492a <=( A167 and A170 );
a8496a <=( (not A202) and (not A201) );
a8497a <=( (not A166) and a8496a );
a8498a <=( a8497a and a8492a );
a8501a <=( A233 and (not A203) );
a8505a <=( A267 and A265 );
a8506a <=( A234 and a8505a );
a8507a <=( a8506a and a8501a );
a8510a <=( A167 and A170 );
a8514a <=( (not A202) and (not A201) );
a8515a <=( (not A166) and a8514a );
a8516a <=( a8515a and a8510a );
a8519a <=( A233 and (not A203) );
a8523a <=( A267 and A266 );
a8524a <=( A234 and a8523a );
a8525a <=( a8524a and a8519a );
a8528a <=( A167 and A170 );
a8532a <=( (not A202) and (not A201) );
a8533a <=( (not A166) and a8532a );
a8534a <=( a8533a and a8528a );
a8537a <=( (not A232) and (not A203) );
a8541a <=( A301 and A236 );
a8542a <=( A233 and a8541a );
a8543a <=( a8542a and a8537a );
a8546a <=( A167 and A170 );
a8550a <=( (not A202) and (not A201) );
a8551a <=( (not A166) and a8550a );
a8552a <=( a8551a and a8546a );
a8555a <=( (not A232) and (not A203) );
a8559a <=( A268 and A236 );
a8560a <=( A233 and a8559a );
a8561a <=( a8560a and a8555a );
a8564a <=( A167 and A170 );
a8568a <=( (not A202) and (not A201) );
a8569a <=( (not A166) and a8568a );
a8570a <=( a8569a and a8564a );
a8573a <=( A232 and (not A203) );
a8577a <=( A301 and A236 );
a8578a <=( (not A233) and a8577a );
a8579a <=( a8578a and a8573a );
a8582a <=( A167 and A170 );
a8586a <=( (not A202) and (not A201) );
a8587a <=( (not A166) and a8586a );
a8588a <=( a8587a and a8582a );
a8591a <=( A232 and (not A203) );
a8595a <=( A268 and A236 );
a8596a <=( (not A233) and a8595a );
a8597a <=( a8596a and a8591a );
a8600a <=( A167 and A170 );
a8604a <=( A200 and A199 );
a8605a <=( (not A166) and a8604a );
a8606a <=( a8605a and a8600a );
a8609a <=( (not A202) and (not A201) );
a8613a <=( A300 and A299 );
a8614a <=( A235 and a8613a );
a8615a <=( a8614a and a8609a );
a8618a <=( A167 and A170 );
a8622a <=( A200 and A199 );
a8623a <=( (not A166) and a8622a );
a8624a <=( a8623a and a8618a );
a8627a <=( (not A202) and (not A201) );
a8631a <=( A300 and A298 );
a8632a <=( A235 and a8631a );
a8633a <=( a8632a and a8627a );
a8636a <=( A167 and A170 );
a8640a <=( A200 and A199 );
a8641a <=( (not A166) and a8640a );
a8642a <=( a8641a and a8636a );
a8645a <=( (not A202) and (not A201) );
a8649a <=( A267 and A265 );
a8650a <=( A235 and a8649a );
a8651a <=( a8650a and a8645a );
a8654a <=( A167 and A170 );
a8658a <=( A200 and A199 );
a8659a <=( (not A166) and a8658a );
a8660a <=( a8659a and a8654a );
a8663a <=( (not A202) and (not A201) );
a8667a <=( A267 and A266 );
a8668a <=( A235 and a8667a );
a8669a <=( a8668a and a8663a );
a8672a <=( A167 and A170 );
a8676a <=( A200 and A199 );
a8677a <=( (not A166) and a8676a );
a8678a <=( a8677a and a8672a );
a8681a <=( (not A202) and (not A201) );
a8685a <=( A301 and A234 );
a8686a <=( A232 and a8685a );
a8687a <=( a8686a and a8681a );
a8690a <=( A167 and A170 );
a8694a <=( A200 and A199 );
a8695a <=( (not A166) and a8694a );
a8696a <=( a8695a and a8690a );
a8699a <=( (not A202) and (not A201) );
a8703a <=( A268 and A234 );
a8704a <=( A232 and a8703a );
a8705a <=( a8704a and a8699a );
a8708a <=( A167 and A170 );
a8712a <=( A200 and A199 );
a8713a <=( (not A166) and a8712a );
a8714a <=( a8713a and a8708a );
a8717a <=( (not A202) and (not A201) );
a8721a <=( A301 and A234 );
a8722a <=( A233 and a8721a );
a8723a <=( a8722a and a8717a );
a8726a <=( A167 and A170 );
a8730a <=( A200 and A199 );
a8731a <=( (not A166) and a8730a );
a8732a <=( a8731a and a8726a );
a8735a <=( (not A202) and (not A201) );
a8739a <=( A268 and A234 );
a8740a <=( A233 and a8739a );
a8741a <=( a8740a and a8735a );
a8744a <=( A167 and A170 );
a8748a <=( (not A200) and (not A199) );
a8749a <=( (not A166) and a8748a );
a8750a <=( a8749a and a8744a );
a8753a <=( A235 and (not A202) );
a8757a <=( A302 and (not A299) );
a8758a <=( A298 and a8757a );
a8759a <=( a8758a and a8753a );
a8762a <=( A167 and A170 );
a8766a <=( (not A200) and (not A199) );
a8767a <=( (not A166) and a8766a );
a8768a <=( a8767a and a8762a );
a8771a <=( A235 and (not A202) );
a8775a <=( A302 and A299 );
a8776a <=( (not A298) and a8775a );
a8777a <=( a8776a and a8771a );
a8780a <=( A167 and A170 );
a8784a <=( (not A200) and (not A199) );
a8785a <=( (not A166) and a8784a );
a8786a <=( a8785a and a8780a );
a8789a <=( A235 and (not A202) );
a8793a <=( A269 and A266 );
a8794a <=( (not A265) and a8793a );
a8795a <=( a8794a and a8789a );
a8798a <=( A167 and A170 );
a8802a <=( (not A200) and (not A199) );
a8803a <=( (not A166) and a8802a );
a8804a <=( a8803a and a8798a );
a8807a <=( A235 and (not A202) );
a8811a <=( A269 and (not A266) );
a8812a <=( A265 and a8811a );
a8813a <=( a8812a and a8807a );
a8816a <=( A167 and A170 );
a8820a <=( (not A200) and (not A199) );
a8821a <=( (not A166) and a8820a );
a8822a <=( a8821a and a8816a );
a8825a <=( A232 and (not A202) );
a8829a <=( A300 and A299 );
a8830a <=( A234 and a8829a );
a8831a <=( a8830a and a8825a );
a8834a <=( A167 and A170 );
a8838a <=( (not A200) and (not A199) );
a8839a <=( (not A166) and a8838a );
a8840a <=( a8839a and a8834a );
a8843a <=( A232 and (not A202) );
a8847a <=( A300 and A298 );
a8848a <=( A234 and a8847a );
a8849a <=( a8848a and a8843a );
a8852a <=( A167 and A170 );
a8856a <=( (not A200) and (not A199) );
a8857a <=( (not A166) and a8856a );
a8858a <=( a8857a and a8852a );
a8861a <=( A232 and (not A202) );
a8865a <=( A267 and A265 );
a8866a <=( A234 and a8865a );
a8867a <=( a8866a and a8861a );
a8870a <=( A167 and A170 );
a8874a <=( (not A200) and (not A199) );
a8875a <=( (not A166) and a8874a );
a8876a <=( a8875a and a8870a );
a8879a <=( A232 and (not A202) );
a8883a <=( A267 and A266 );
a8884a <=( A234 and a8883a );
a8885a <=( a8884a and a8879a );
a8888a <=( A167 and A170 );
a8892a <=( (not A200) and (not A199) );
a8893a <=( (not A166) and a8892a );
a8894a <=( a8893a and a8888a );
a8897a <=( A233 and (not A202) );
a8901a <=( A300 and A299 );
a8902a <=( A234 and a8901a );
a8903a <=( a8902a and a8897a );
a8906a <=( A167 and A170 );
a8910a <=( (not A200) and (not A199) );
a8911a <=( (not A166) and a8910a );
a8912a <=( a8911a and a8906a );
a8915a <=( A233 and (not A202) );
a8919a <=( A300 and A298 );
a8920a <=( A234 and a8919a );
a8921a <=( a8920a and a8915a );
a8924a <=( A167 and A170 );
a8928a <=( (not A200) and (not A199) );
a8929a <=( (not A166) and a8928a );
a8930a <=( a8929a and a8924a );
a8933a <=( A233 and (not A202) );
a8937a <=( A267 and A265 );
a8938a <=( A234 and a8937a );
a8939a <=( a8938a and a8933a );
a8942a <=( A167 and A170 );
a8946a <=( (not A200) and (not A199) );
a8947a <=( (not A166) and a8946a );
a8948a <=( a8947a and a8942a );
a8951a <=( A233 and (not A202) );
a8955a <=( A267 and A266 );
a8956a <=( A234 and a8955a );
a8957a <=( a8956a and a8951a );
a8960a <=( A167 and A170 );
a8964a <=( (not A200) and (not A199) );
a8965a <=( (not A166) and a8964a );
a8966a <=( a8965a and a8960a );
a8969a <=( (not A232) and (not A202) );
a8973a <=( A301 and A236 );
a8974a <=( A233 and a8973a );
a8975a <=( a8974a and a8969a );
a8978a <=( A167 and A170 );
a8982a <=( (not A200) and (not A199) );
a8983a <=( (not A166) and a8982a );
a8984a <=( a8983a and a8978a );
a8987a <=( (not A232) and (not A202) );
a8991a <=( A268 and A236 );
a8992a <=( A233 and a8991a );
a8993a <=( a8992a and a8987a );
a8996a <=( A167 and A170 );
a9000a <=( (not A200) and (not A199) );
a9001a <=( (not A166) and a9000a );
a9002a <=( a9001a and a8996a );
a9005a <=( A232 and (not A202) );
a9009a <=( A301 and A236 );
a9010a <=( (not A233) and a9009a );
a9011a <=( a9010a and a9005a );
a9014a <=( A167 and A170 );
a9018a <=( (not A200) and (not A199) );
a9019a <=( (not A166) and a9018a );
a9020a <=( a9019a and a9014a );
a9023a <=( A232 and (not A202) );
a9027a <=( A268 and A236 );
a9028a <=( (not A233) and a9027a );
a9029a <=( a9028a and a9023a );
a9032a <=( (not A167) and A170 );
a9036a <=( (not A202) and (not A201) );
a9037a <=( A166 and a9036a );
a9038a <=( a9037a and a9032a );
a9041a <=( A235 and (not A203) );
a9045a <=( A302 and (not A299) );
a9046a <=( A298 and a9045a );
a9047a <=( a9046a and a9041a );
a9050a <=( (not A167) and A170 );
a9054a <=( (not A202) and (not A201) );
a9055a <=( A166 and a9054a );
a9056a <=( a9055a and a9050a );
a9059a <=( A235 and (not A203) );
a9063a <=( A302 and A299 );
a9064a <=( (not A298) and a9063a );
a9065a <=( a9064a and a9059a );
a9068a <=( (not A167) and A170 );
a9072a <=( (not A202) and (not A201) );
a9073a <=( A166 and a9072a );
a9074a <=( a9073a and a9068a );
a9077a <=( A235 and (not A203) );
a9081a <=( A269 and A266 );
a9082a <=( (not A265) and a9081a );
a9083a <=( a9082a and a9077a );
a9086a <=( (not A167) and A170 );
a9090a <=( (not A202) and (not A201) );
a9091a <=( A166 and a9090a );
a9092a <=( a9091a and a9086a );
a9095a <=( A235 and (not A203) );
a9099a <=( A269 and (not A266) );
a9100a <=( A265 and a9099a );
a9101a <=( a9100a and a9095a );
a9104a <=( (not A167) and A170 );
a9108a <=( (not A202) and (not A201) );
a9109a <=( A166 and a9108a );
a9110a <=( a9109a and a9104a );
a9113a <=( A232 and (not A203) );
a9117a <=( A300 and A299 );
a9118a <=( A234 and a9117a );
a9119a <=( a9118a and a9113a );
a9122a <=( (not A167) and A170 );
a9126a <=( (not A202) and (not A201) );
a9127a <=( A166 and a9126a );
a9128a <=( a9127a and a9122a );
a9131a <=( A232 and (not A203) );
a9135a <=( A300 and A298 );
a9136a <=( A234 and a9135a );
a9137a <=( a9136a and a9131a );
a9140a <=( (not A167) and A170 );
a9144a <=( (not A202) and (not A201) );
a9145a <=( A166 and a9144a );
a9146a <=( a9145a and a9140a );
a9149a <=( A232 and (not A203) );
a9153a <=( A267 and A265 );
a9154a <=( A234 and a9153a );
a9155a <=( a9154a and a9149a );
a9158a <=( (not A167) and A170 );
a9162a <=( (not A202) and (not A201) );
a9163a <=( A166 and a9162a );
a9164a <=( a9163a and a9158a );
a9167a <=( A232 and (not A203) );
a9171a <=( A267 and A266 );
a9172a <=( A234 and a9171a );
a9173a <=( a9172a and a9167a );
a9176a <=( (not A167) and A170 );
a9180a <=( (not A202) and (not A201) );
a9181a <=( A166 and a9180a );
a9182a <=( a9181a and a9176a );
a9185a <=( A233 and (not A203) );
a9189a <=( A300 and A299 );
a9190a <=( A234 and a9189a );
a9191a <=( a9190a and a9185a );
a9194a <=( (not A167) and A170 );
a9198a <=( (not A202) and (not A201) );
a9199a <=( A166 and a9198a );
a9200a <=( a9199a and a9194a );
a9203a <=( A233 and (not A203) );
a9207a <=( A300 and A298 );
a9208a <=( A234 and a9207a );
a9209a <=( a9208a and a9203a );
a9212a <=( (not A167) and A170 );
a9216a <=( (not A202) and (not A201) );
a9217a <=( A166 and a9216a );
a9218a <=( a9217a and a9212a );
a9221a <=( A233 and (not A203) );
a9225a <=( A267 and A265 );
a9226a <=( A234 and a9225a );
a9227a <=( a9226a and a9221a );
a9230a <=( (not A167) and A170 );
a9234a <=( (not A202) and (not A201) );
a9235a <=( A166 and a9234a );
a9236a <=( a9235a and a9230a );
a9239a <=( A233 and (not A203) );
a9243a <=( A267 and A266 );
a9244a <=( A234 and a9243a );
a9245a <=( a9244a and a9239a );
a9248a <=( (not A167) and A170 );
a9252a <=( (not A202) and (not A201) );
a9253a <=( A166 and a9252a );
a9254a <=( a9253a and a9248a );
a9257a <=( (not A232) and (not A203) );
a9261a <=( A301 and A236 );
a9262a <=( A233 and a9261a );
a9263a <=( a9262a and a9257a );
a9266a <=( (not A167) and A170 );
a9270a <=( (not A202) and (not A201) );
a9271a <=( A166 and a9270a );
a9272a <=( a9271a and a9266a );
a9275a <=( (not A232) and (not A203) );
a9279a <=( A268 and A236 );
a9280a <=( A233 and a9279a );
a9281a <=( a9280a and a9275a );
a9284a <=( (not A167) and A170 );
a9288a <=( (not A202) and (not A201) );
a9289a <=( A166 and a9288a );
a9290a <=( a9289a and a9284a );
a9293a <=( A232 and (not A203) );
a9297a <=( A301 and A236 );
a9298a <=( (not A233) and a9297a );
a9299a <=( a9298a and a9293a );
a9302a <=( (not A167) and A170 );
a9306a <=( (not A202) and (not A201) );
a9307a <=( A166 and a9306a );
a9308a <=( a9307a and a9302a );
a9311a <=( A232 and (not A203) );
a9315a <=( A268 and A236 );
a9316a <=( (not A233) and a9315a );
a9317a <=( a9316a and a9311a );
a9320a <=( (not A167) and A170 );
a9324a <=( A200 and A199 );
a9325a <=( A166 and a9324a );
a9326a <=( a9325a and a9320a );
a9329a <=( (not A202) and (not A201) );
a9333a <=( A300 and A299 );
a9334a <=( A235 and a9333a );
a9335a <=( a9334a and a9329a );
a9338a <=( (not A167) and A170 );
a9342a <=( A200 and A199 );
a9343a <=( A166 and a9342a );
a9344a <=( a9343a and a9338a );
a9347a <=( (not A202) and (not A201) );
a9351a <=( A300 and A298 );
a9352a <=( A235 and a9351a );
a9353a <=( a9352a and a9347a );
a9356a <=( (not A167) and A170 );
a9360a <=( A200 and A199 );
a9361a <=( A166 and a9360a );
a9362a <=( a9361a and a9356a );
a9365a <=( (not A202) and (not A201) );
a9369a <=( A267 and A265 );
a9370a <=( A235 and a9369a );
a9371a <=( a9370a and a9365a );
a9374a <=( (not A167) and A170 );
a9378a <=( A200 and A199 );
a9379a <=( A166 and a9378a );
a9380a <=( a9379a and a9374a );
a9383a <=( (not A202) and (not A201) );
a9387a <=( A267 and A266 );
a9388a <=( A235 and a9387a );
a9389a <=( a9388a and a9383a );
a9392a <=( (not A167) and A170 );
a9396a <=( A200 and A199 );
a9397a <=( A166 and a9396a );
a9398a <=( a9397a and a9392a );
a9401a <=( (not A202) and (not A201) );
a9405a <=( A301 and A234 );
a9406a <=( A232 and a9405a );
a9407a <=( a9406a and a9401a );
a9410a <=( (not A167) and A170 );
a9414a <=( A200 and A199 );
a9415a <=( A166 and a9414a );
a9416a <=( a9415a and a9410a );
a9419a <=( (not A202) and (not A201) );
a9423a <=( A268 and A234 );
a9424a <=( A232 and a9423a );
a9425a <=( a9424a and a9419a );
a9428a <=( (not A167) and A170 );
a9432a <=( A200 and A199 );
a9433a <=( A166 and a9432a );
a9434a <=( a9433a and a9428a );
a9437a <=( (not A202) and (not A201) );
a9441a <=( A301 and A234 );
a9442a <=( A233 and a9441a );
a9443a <=( a9442a and a9437a );
a9446a <=( (not A167) and A170 );
a9450a <=( A200 and A199 );
a9451a <=( A166 and a9450a );
a9452a <=( a9451a and a9446a );
a9455a <=( (not A202) and (not A201) );
a9459a <=( A268 and A234 );
a9460a <=( A233 and a9459a );
a9461a <=( a9460a and a9455a );
a9464a <=( (not A167) and A170 );
a9468a <=( (not A200) and (not A199) );
a9469a <=( A166 and a9468a );
a9470a <=( a9469a and a9464a );
a9473a <=( A235 and (not A202) );
a9477a <=( A302 and (not A299) );
a9478a <=( A298 and a9477a );
a9479a <=( a9478a and a9473a );
a9482a <=( (not A167) and A170 );
a9486a <=( (not A200) and (not A199) );
a9487a <=( A166 and a9486a );
a9488a <=( a9487a and a9482a );
a9491a <=( A235 and (not A202) );
a9495a <=( A302 and A299 );
a9496a <=( (not A298) and a9495a );
a9497a <=( a9496a and a9491a );
a9500a <=( (not A167) and A170 );
a9504a <=( (not A200) and (not A199) );
a9505a <=( A166 and a9504a );
a9506a <=( a9505a and a9500a );
a9509a <=( A235 and (not A202) );
a9513a <=( A269 and A266 );
a9514a <=( (not A265) and a9513a );
a9515a <=( a9514a and a9509a );
a9518a <=( (not A167) and A170 );
a9522a <=( (not A200) and (not A199) );
a9523a <=( A166 and a9522a );
a9524a <=( a9523a and a9518a );
a9527a <=( A235 and (not A202) );
a9531a <=( A269 and (not A266) );
a9532a <=( A265 and a9531a );
a9533a <=( a9532a and a9527a );
a9536a <=( (not A167) and A170 );
a9540a <=( (not A200) and (not A199) );
a9541a <=( A166 and a9540a );
a9542a <=( a9541a and a9536a );
a9545a <=( A232 and (not A202) );
a9549a <=( A300 and A299 );
a9550a <=( A234 and a9549a );
a9551a <=( a9550a and a9545a );
a9554a <=( (not A167) and A170 );
a9558a <=( (not A200) and (not A199) );
a9559a <=( A166 and a9558a );
a9560a <=( a9559a and a9554a );
a9563a <=( A232 and (not A202) );
a9567a <=( A300 and A298 );
a9568a <=( A234 and a9567a );
a9569a <=( a9568a and a9563a );
a9572a <=( (not A167) and A170 );
a9576a <=( (not A200) and (not A199) );
a9577a <=( A166 and a9576a );
a9578a <=( a9577a and a9572a );
a9581a <=( A232 and (not A202) );
a9585a <=( A267 and A265 );
a9586a <=( A234 and a9585a );
a9587a <=( a9586a and a9581a );
a9590a <=( (not A167) and A170 );
a9594a <=( (not A200) and (not A199) );
a9595a <=( A166 and a9594a );
a9596a <=( a9595a and a9590a );
a9599a <=( A232 and (not A202) );
a9603a <=( A267 and A266 );
a9604a <=( A234 and a9603a );
a9605a <=( a9604a and a9599a );
a9608a <=( (not A167) and A170 );
a9612a <=( (not A200) and (not A199) );
a9613a <=( A166 and a9612a );
a9614a <=( a9613a and a9608a );
a9617a <=( A233 and (not A202) );
a9621a <=( A300 and A299 );
a9622a <=( A234 and a9621a );
a9623a <=( a9622a and a9617a );
a9626a <=( (not A167) and A170 );
a9630a <=( (not A200) and (not A199) );
a9631a <=( A166 and a9630a );
a9632a <=( a9631a and a9626a );
a9635a <=( A233 and (not A202) );
a9639a <=( A300 and A298 );
a9640a <=( A234 and a9639a );
a9641a <=( a9640a and a9635a );
a9644a <=( (not A167) and A170 );
a9648a <=( (not A200) and (not A199) );
a9649a <=( A166 and a9648a );
a9650a <=( a9649a and a9644a );
a9653a <=( A233 and (not A202) );
a9657a <=( A267 and A265 );
a9658a <=( A234 and a9657a );
a9659a <=( a9658a and a9653a );
a9662a <=( (not A167) and A170 );
a9666a <=( (not A200) and (not A199) );
a9667a <=( A166 and a9666a );
a9668a <=( a9667a and a9662a );
a9671a <=( A233 and (not A202) );
a9675a <=( A267 and A266 );
a9676a <=( A234 and a9675a );
a9677a <=( a9676a and a9671a );
a9680a <=( (not A167) and A170 );
a9684a <=( (not A200) and (not A199) );
a9685a <=( A166 and a9684a );
a9686a <=( a9685a and a9680a );
a9689a <=( (not A232) and (not A202) );
a9693a <=( A301 and A236 );
a9694a <=( A233 and a9693a );
a9695a <=( a9694a and a9689a );
a9698a <=( (not A167) and A170 );
a9702a <=( (not A200) and (not A199) );
a9703a <=( A166 and a9702a );
a9704a <=( a9703a and a9698a );
a9707a <=( (not A232) and (not A202) );
a9711a <=( A268 and A236 );
a9712a <=( A233 and a9711a );
a9713a <=( a9712a and a9707a );
a9716a <=( (not A167) and A170 );
a9720a <=( (not A200) and (not A199) );
a9721a <=( A166 and a9720a );
a9722a <=( a9721a and a9716a );
a9725a <=( A232 and (not A202) );
a9729a <=( A301 and A236 );
a9730a <=( (not A233) and a9729a );
a9731a <=( a9730a and a9725a );
a9734a <=( (not A167) and A170 );
a9738a <=( (not A200) and (not A199) );
a9739a <=( A166 and a9738a );
a9740a <=( a9739a and a9734a );
a9743a <=( A232 and (not A202) );
a9747a <=( A268 and A236 );
a9748a <=( (not A233) and a9747a );
a9749a <=( a9748a and a9743a );
a9752a <=( (not A201) and A169 );
a9756a <=( (not A232) and (not A203) );
a9757a <=( (not A202) and a9756a );
a9758a <=( a9757a and a9752a );
a9761a <=( A236 and A233 );
a9765a <=( A302 and (not A299) );
a9766a <=( A298 and a9765a );
a9767a <=( a9766a and a9761a );
a9770a <=( (not A201) and A169 );
a9774a <=( (not A232) and (not A203) );
a9775a <=( (not A202) and a9774a );
a9776a <=( a9775a and a9770a );
a9779a <=( A236 and A233 );
a9783a <=( A302 and A299 );
a9784a <=( (not A298) and a9783a );
a9785a <=( a9784a and a9779a );
a9788a <=( (not A201) and A169 );
a9792a <=( (not A232) and (not A203) );
a9793a <=( (not A202) and a9792a );
a9794a <=( a9793a and a9788a );
a9797a <=( A236 and A233 );
a9801a <=( A269 and A266 );
a9802a <=( (not A265) and a9801a );
a9803a <=( a9802a and a9797a );
a9806a <=( (not A201) and A169 );
a9810a <=( (not A232) and (not A203) );
a9811a <=( (not A202) and a9810a );
a9812a <=( a9811a and a9806a );
a9815a <=( A236 and A233 );
a9819a <=( A269 and (not A266) );
a9820a <=( A265 and a9819a );
a9821a <=( a9820a and a9815a );
a9824a <=( (not A201) and A169 );
a9828a <=( A232 and (not A203) );
a9829a <=( (not A202) and a9828a );
a9830a <=( a9829a and a9824a );
a9833a <=( A236 and (not A233) );
a9837a <=( A302 and (not A299) );
a9838a <=( A298 and a9837a );
a9839a <=( a9838a and a9833a );
a9842a <=( (not A201) and A169 );
a9846a <=( A232 and (not A203) );
a9847a <=( (not A202) and a9846a );
a9848a <=( a9847a and a9842a );
a9851a <=( A236 and (not A233) );
a9855a <=( A302 and A299 );
a9856a <=( (not A298) and a9855a );
a9857a <=( a9856a and a9851a );
a9860a <=( (not A201) and A169 );
a9864a <=( A232 and (not A203) );
a9865a <=( (not A202) and a9864a );
a9866a <=( a9865a and a9860a );
a9869a <=( A236 and (not A233) );
a9873a <=( A269 and A266 );
a9874a <=( (not A265) and a9873a );
a9875a <=( a9874a and a9869a );
a9878a <=( (not A201) and A169 );
a9882a <=( A232 and (not A203) );
a9883a <=( (not A202) and a9882a );
a9884a <=( a9883a and a9878a );
a9887a <=( A236 and (not A233) );
a9891a <=( A269 and (not A266) );
a9892a <=( A265 and a9891a );
a9893a <=( a9892a and a9887a );
a9896a <=( A199 and A169 );
a9900a <=( (not A202) and (not A201) );
a9901a <=( A200 and a9900a );
a9902a <=( a9901a and a9896a );
a9905a <=( A234 and A232 );
a9909a <=( A302 and (not A299) );
a9910a <=( A298 and a9909a );
a9911a <=( a9910a and a9905a );
a9914a <=( A199 and A169 );
a9918a <=( (not A202) and (not A201) );
a9919a <=( A200 and a9918a );
a9920a <=( a9919a and a9914a );
a9923a <=( A234 and A232 );
a9927a <=( A302 and A299 );
a9928a <=( (not A298) and a9927a );
a9929a <=( a9928a and a9923a );
a9932a <=( A199 and A169 );
a9936a <=( (not A202) and (not A201) );
a9937a <=( A200 and a9936a );
a9938a <=( a9937a and a9932a );
a9941a <=( A234 and A232 );
a9945a <=( A269 and A266 );
a9946a <=( (not A265) and a9945a );
a9947a <=( a9946a and a9941a );
a9950a <=( A199 and A169 );
a9954a <=( (not A202) and (not A201) );
a9955a <=( A200 and a9954a );
a9956a <=( a9955a and a9950a );
a9959a <=( A234 and A232 );
a9963a <=( A269 and (not A266) );
a9964a <=( A265 and a9963a );
a9965a <=( a9964a and a9959a );
a9968a <=( A199 and A169 );
a9972a <=( (not A202) and (not A201) );
a9973a <=( A200 and a9972a );
a9974a <=( a9973a and a9968a );
a9977a <=( A234 and A233 );
a9981a <=( A302 and (not A299) );
a9982a <=( A298 and a9981a );
a9983a <=( a9982a and a9977a );
a9986a <=( A199 and A169 );
a9990a <=( (not A202) and (not A201) );
a9991a <=( A200 and a9990a );
a9992a <=( a9991a and a9986a );
a9995a <=( A234 and A233 );
a9999a <=( A302 and A299 );
a10000a <=( (not A298) and a9999a );
a10001a <=( a10000a and a9995a );
a10004a <=( A199 and A169 );
a10008a <=( (not A202) and (not A201) );
a10009a <=( A200 and a10008a );
a10010a <=( a10009a and a10004a );
a10013a <=( A234 and A233 );
a10017a <=( A269 and A266 );
a10018a <=( (not A265) and a10017a );
a10019a <=( a10018a and a10013a );
a10022a <=( A199 and A169 );
a10026a <=( (not A202) and (not A201) );
a10027a <=( A200 and a10026a );
a10028a <=( a10027a and a10022a );
a10031a <=( A234 and A233 );
a10035a <=( A269 and (not A266) );
a10036a <=( A265 and a10035a );
a10037a <=( a10036a and a10031a );
a10040a <=( A199 and A169 );
a10044a <=( (not A202) and (not A201) );
a10045a <=( A200 and a10044a );
a10046a <=( a10045a and a10040a );
a10049a <=( A233 and (not A232) );
a10053a <=( A300 and A299 );
a10054a <=( A236 and a10053a );
a10055a <=( a10054a and a10049a );
a10058a <=( A199 and A169 );
a10062a <=( (not A202) and (not A201) );
a10063a <=( A200 and a10062a );
a10064a <=( a10063a and a10058a );
a10067a <=( A233 and (not A232) );
a10071a <=( A300 and A298 );
a10072a <=( A236 and a10071a );
a10073a <=( a10072a and a10067a );
a10076a <=( A199 and A169 );
a10080a <=( (not A202) and (not A201) );
a10081a <=( A200 and a10080a );
a10082a <=( a10081a and a10076a );
a10085a <=( A233 and (not A232) );
a10089a <=( A267 and A265 );
a10090a <=( A236 and a10089a );
a10091a <=( a10090a and a10085a );
a10094a <=( A199 and A169 );
a10098a <=( (not A202) and (not A201) );
a10099a <=( A200 and a10098a );
a10100a <=( a10099a and a10094a );
a10103a <=( A233 and (not A232) );
a10107a <=( A267 and A266 );
a10108a <=( A236 and a10107a );
a10109a <=( a10108a and a10103a );
a10112a <=( A199 and A169 );
a10116a <=( (not A202) and (not A201) );
a10117a <=( A200 and a10116a );
a10118a <=( a10117a and a10112a );
a10121a <=( (not A233) and A232 );
a10125a <=( A300 and A299 );
a10126a <=( A236 and a10125a );
a10127a <=( a10126a and a10121a );
a10130a <=( A199 and A169 );
a10134a <=( (not A202) and (not A201) );
a10135a <=( A200 and a10134a );
a10136a <=( a10135a and a10130a );
a10139a <=( (not A233) and A232 );
a10143a <=( A300 and A298 );
a10144a <=( A236 and a10143a );
a10145a <=( a10144a and a10139a );
a10148a <=( A199 and A169 );
a10152a <=( (not A202) and (not A201) );
a10153a <=( A200 and a10152a );
a10154a <=( a10153a and a10148a );
a10157a <=( (not A233) and A232 );
a10161a <=( A267 and A265 );
a10162a <=( A236 and a10161a );
a10163a <=( a10162a and a10157a );
a10166a <=( A199 and A169 );
a10170a <=( (not A202) and (not A201) );
a10171a <=( A200 and a10170a );
a10172a <=( a10171a and a10166a );
a10175a <=( (not A233) and A232 );
a10179a <=( A267 and A266 );
a10180a <=( A236 and a10179a );
a10181a <=( a10180a and a10175a );
a10184a <=( (not A199) and A169 );
a10188a <=( (not A232) and (not A202) );
a10189a <=( (not A200) and a10188a );
a10190a <=( a10189a and a10184a );
a10193a <=( A236 and A233 );
a10197a <=( A302 and (not A299) );
a10198a <=( A298 and a10197a );
a10199a <=( a10198a and a10193a );
a10202a <=( (not A199) and A169 );
a10206a <=( (not A232) and (not A202) );
a10207a <=( (not A200) and a10206a );
a10208a <=( a10207a and a10202a );
a10211a <=( A236 and A233 );
a10215a <=( A302 and A299 );
a10216a <=( (not A298) and a10215a );
a10217a <=( a10216a and a10211a );
a10220a <=( (not A199) and A169 );
a10224a <=( (not A232) and (not A202) );
a10225a <=( (not A200) and a10224a );
a10226a <=( a10225a and a10220a );
a10229a <=( A236 and A233 );
a10233a <=( A269 and A266 );
a10234a <=( (not A265) and a10233a );
a10235a <=( a10234a and a10229a );
a10238a <=( (not A199) and A169 );
a10242a <=( (not A232) and (not A202) );
a10243a <=( (not A200) and a10242a );
a10244a <=( a10243a and a10238a );
a10247a <=( A236 and A233 );
a10251a <=( A269 and (not A266) );
a10252a <=( A265 and a10251a );
a10253a <=( a10252a and a10247a );
a10256a <=( (not A199) and A169 );
a10260a <=( A232 and (not A202) );
a10261a <=( (not A200) and a10260a );
a10262a <=( a10261a and a10256a );
a10265a <=( A236 and (not A233) );
a10269a <=( A302 and (not A299) );
a10270a <=( A298 and a10269a );
a10271a <=( a10270a and a10265a );
a10274a <=( (not A199) and A169 );
a10278a <=( A232 and (not A202) );
a10279a <=( (not A200) and a10278a );
a10280a <=( a10279a and a10274a );
a10283a <=( A236 and (not A233) );
a10287a <=( A302 and A299 );
a10288a <=( (not A298) and a10287a );
a10289a <=( a10288a and a10283a );
a10292a <=( (not A199) and A169 );
a10296a <=( A232 and (not A202) );
a10297a <=( (not A200) and a10296a );
a10298a <=( a10297a and a10292a );
a10301a <=( A236 and (not A233) );
a10305a <=( A269 and A266 );
a10306a <=( (not A265) and a10305a );
a10307a <=( a10306a and a10301a );
a10310a <=( (not A199) and A169 );
a10314a <=( A232 and (not A202) );
a10315a <=( (not A200) and a10314a );
a10316a <=( a10315a and a10310a );
a10319a <=( A236 and (not A233) );
a10323a <=( A269 and (not A266) );
a10324a <=( A265 and a10323a );
a10325a <=( a10324a and a10319a );
a10328a <=( A166 and A168 );
a10332a <=( (not A203) and (not A202) );
a10333a <=( (not A201) and a10332a );
a10334a <=( a10333a and a10328a );
a10338a <=( A236 and A233 );
a10339a <=( (not A232) and a10338a );
a10343a <=( A302 and (not A299) );
a10344a <=( A298 and a10343a );
a10345a <=( a10344a and a10339a );
a10348a <=( A166 and A168 );
a10352a <=( (not A203) and (not A202) );
a10353a <=( (not A201) and a10352a );
a10354a <=( a10353a and a10348a );
a10358a <=( A236 and A233 );
a10359a <=( (not A232) and a10358a );
a10363a <=( A302 and A299 );
a10364a <=( (not A298) and a10363a );
a10365a <=( a10364a and a10359a );
a10368a <=( A166 and A168 );
a10372a <=( (not A203) and (not A202) );
a10373a <=( (not A201) and a10372a );
a10374a <=( a10373a and a10368a );
a10378a <=( A236 and A233 );
a10379a <=( (not A232) and a10378a );
a10383a <=( A269 and A266 );
a10384a <=( (not A265) and a10383a );
a10385a <=( a10384a and a10379a );
a10388a <=( A166 and A168 );
a10392a <=( (not A203) and (not A202) );
a10393a <=( (not A201) and a10392a );
a10394a <=( a10393a and a10388a );
a10398a <=( A236 and A233 );
a10399a <=( (not A232) and a10398a );
a10403a <=( A269 and (not A266) );
a10404a <=( A265 and a10403a );
a10405a <=( a10404a and a10399a );
a10408a <=( A166 and A168 );
a10412a <=( (not A203) and (not A202) );
a10413a <=( (not A201) and a10412a );
a10414a <=( a10413a and a10408a );
a10418a <=( A236 and (not A233) );
a10419a <=( A232 and a10418a );
a10423a <=( A302 and (not A299) );
a10424a <=( A298 and a10423a );
a10425a <=( a10424a and a10419a );
a10428a <=( A166 and A168 );
a10432a <=( (not A203) and (not A202) );
a10433a <=( (not A201) and a10432a );
a10434a <=( a10433a and a10428a );
a10438a <=( A236 and (not A233) );
a10439a <=( A232 and a10438a );
a10443a <=( A302 and A299 );
a10444a <=( (not A298) and a10443a );
a10445a <=( a10444a and a10439a );
a10448a <=( A166 and A168 );
a10452a <=( (not A203) and (not A202) );
a10453a <=( (not A201) and a10452a );
a10454a <=( a10453a and a10448a );
a10458a <=( A236 and (not A233) );
a10459a <=( A232 and a10458a );
a10463a <=( A269 and A266 );
a10464a <=( (not A265) and a10463a );
a10465a <=( a10464a and a10459a );
a10468a <=( A166 and A168 );
a10472a <=( (not A203) and (not A202) );
a10473a <=( (not A201) and a10472a );
a10474a <=( a10473a and a10468a );
a10478a <=( A236 and (not A233) );
a10479a <=( A232 and a10478a );
a10483a <=( A269 and (not A266) );
a10484a <=( A265 and a10483a );
a10485a <=( a10484a and a10479a );
a10488a <=( A166 and A168 );
a10492a <=( (not A201) and A200 );
a10493a <=( A199 and a10492a );
a10494a <=( a10493a and a10488a );
a10498a <=( A234 and A232 );
a10499a <=( (not A202) and a10498a );
a10503a <=( A302 and (not A299) );
a10504a <=( A298 and a10503a );
a10505a <=( a10504a and a10499a );
a10508a <=( A166 and A168 );
a10512a <=( (not A201) and A200 );
a10513a <=( A199 and a10512a );
a10514a <=( a10513a and a10508a );
a10518a <=( A234 and A232 );
a10519a <=( (not A202) and a10518a );
a10523a <=( A302 and A299 );
a10524a <=( (not A298) and a10523a );
a10525a <=( a10524a and a10519a );
a10528a <=( A166 and A168 );
a10532a <=( (not A201) and A200 );
a10533a <=( A199 and a10532a );
a10534a <=( a10533a and a10528a );
a10538a <=( A234 and A232 );
a10539a <=( (not A202) and a10538a );
a10543a <=( A269 and A266 );
a10544a <=( (not A265) and a10543a );
a10545a <=( a10544a and a10539a );
a10548a <=( A166 and A168 );
a10552a <=( (not A201) and A200 );
a10553a <=( A199 and a10552a );
a10554a <=( a10553a and a10548a );
a10558a <=( A234 and A232 );
a10559a <=( (not A202) and a10558a );
a10563a <=( A269 and (not A266) );
a10564a <=( A265 and a10563a );
a10565a <=( a10564a and a10559a );
a10568a <=( A166 and A168 );
a10572a <=( (not A201) and A200 );
a10573a <=( A199 and a10572a );
a10574a <=( a10573a and a10568a );
a10578a <=( A234 and A233 );
a10579a <=( (not A202) and a10578a );
a10583a <=( A302 and (not A299) );
a10584a <=( A298 and a10583a );
a10585a <=( a10584a and a10579a );
a10588a <=( A166 and A168 );
a10592a <=( (not A201) and A200 );
a10593a <=( A199 and a10592a );
a10594a <=( a10593a and a10588a );
a10598a <=( A234 and A233 );
a10599a <=( (not A202) and a10598a );
a10603a <=( A302 and A299 );
a10604a <=( (not A298) and a10603a );
a10605a <=( a10604a and a10599a );
a10608a <=( A166 and A168 );
a10612a <=( (not A201) and A200 );
a10613a <=( A199 and a10612a );
a10614a <=( a10613a and a10608a );
a10618a <=( A234 and A233 );
a10619a <=( (not A202) and a10618a );
a10623a <=( A269 and A266 );
a10624a <=( (not A265) and a10623a );
a10625a <=( a10624a and a10619a );
a10628a <=( A166 and A168 );
a10632a <=( (not A201) and A200 );
a10633a <=( A199 and a10632a );
a10634a <=( a10633a and a10628a );
a10638a <=( A234 and A233 );
a10639a <=( (not A202) and a10638a );
a10643a <=( A269 and (not A266) );
a10644a <=( A265 and a10643a );
a10645a <=( a10644a and a10639a );
a10648a <=( A166 and A168 );
a10652a <=( (not A201) and A200 );
a10653a <=( A199 and a10652a );
a10654a <=( a10653a and a10648a );
a10658a <=( A233 and (not A232) );
a10659a <=( (not A202) and a10658a );
a10663a <=( A300 and A299 );
a10664a <=( A236 and a10663a );
a10665a <=( a10664a and a10659a );
a10668a <=( A166 and A168 );
a10672a <=( (not A201) and A200 );
a10673a <=( A199 and a10672a );
a10674a <=( a10673a and a10668a );
a10678a <=( A233 and (not A232) );
a10679a <=( (not A202) and a10678a );
a10683a <=( A300 and A298 );
a10684a <=( A236 and a10683a );
a10685a <=( a10684a and a10679a );
a10688a <=( A166 and A168 );
a10692a <=( (not A201) and A200 );
a10693a <=( A199 and a10692a );
a10694a <=( a10693a and a10688a );
a10698a <=( A233 and (not A232) );
a10699a <=( (not A202) and a10698a );
a10703a <=( A267 and A265 );
a10704a <=( A236 and a10703a );
a10705a <=( a10704a and a10699a );
a10708a <=( A166 and A168 );
a10712a <=( (not A201) and A200 );
a10713a <=( A199 and a10712a );
a10714a <=( a10713a and a10708a );
a10718a <=( A233 and (not A232) );
a10719a <=( (not A202) and a10718a );
a10723a <=( A267 and A266 );
a10724a <=( A236 and a10723a );
a10725a <=( a10724a and a10719a );
a10728a <=( A166 and A168 );
a10732a <=( (not A201) and A200 );
a10733a <=( A199 and a10732a );
a10734a <=( a10733a and a10728a );
a10738a <=( (not A233) and A232 );
a10739a <=( (not A202) and a10738a );
a10743a <=( A300 and A299 );
a10744a <=( A236 and a10743a );
a10745a <=( a10744a and a10739a );
a10748a <=( A166 and A168 );
a10752a <=( (not A201) and A200 );
a10753a <=( A199 and a10752a );
a10754a <=( a10753a and a10748a );
a10758a <=( (not A233) and A232 );
a10759a <=( (not A202) and a10758a );
a10763a <=( A300 and A298 );
a10764a <=( A236 and a10763a );
a10765a <=( a10764a and a10759a );
a10768a <=( A166 and A168 );
a10772a <=( (not A201) and A200 );
a10773a <=( A199 and a10772a );
a10774a <=( a10773a and a10768a );
a10778a <=( (not A233) and A232 );
a10779a <=( (not A202) and a10778a );
a10783a <=( A267 and A265 );
a10784a <=( A236 and a10783a );
a10785a <=( a10784a and a10779a );
a10788a <=( A166 and A168 );
a10792a <=( (not A201) and A200 );
a10793a <=( A199 and a10792a );
a10794a <=( a10793a and a10788a );
a10798a <=( (not A233) and A232 );
a10799a <=( (not A202) and a10798a );
a10803a <=( A267 and A266 );
a10804a <=( A236 and a10803a );
a10805a <=( a10804a and a10799a );
a10808a <=( A166 and A168 );
a10812a <=( (not A202) and (not A200) );
a10813a <=( (not A199) and a10812a );
a10814a <=( a10813a and a10808a );
a10818a <=( A236 and A233 );
a10819a <=( (not A232) and a10818a );
a10823a <=( A302 and (not A299) );
a10824a <=( A298 and a10823a );
a10825a <=( a10824a and a10819a );
a10828a <=( A166 and A168 );
a10832a <=( (not A202) and (not A200) );
a10833a <=( (not A199) and a10832a );
a10834a <=( a10833a and a10828a );
a10838a <=( A236 and A233 );
a10839a <=( (not A232) and a10838a );
a10843a <=( A302 and A299 );
a10844a <=( (not A298) and a10843a );
a10845a <=( a10844a and a10839a );
a10848a <=( A166 and A168 );
a10852a <=( (not A202) and (not A200) );
a10853a <=( (not A199) and a10852a );
a10854a <=( a10853a and a10848a );
a10858a <=( A236 and A233 );
a10859a <=( (not A232) and a10858a );
a10863a <=( A269 and A266 );
a10864a <=( (not A265) and a10863a );
a10865a <=( a10864a and a10859a );
a10868a <=( A166 and A168 );
a10872a <=( (not A202) and (not A200) );
a10873a <=( (not A199) and a10872a );
a10874a <=( a10873a and a10868a );
a10878a <=( A236 and A233 );
a10879a <=( (not A232) and a10878a );
a10883a <=( A269 and (not A266) );
a10884a <=( A265 and a10883a );
a10885a <=( a10884a and a10879a );
a10888a <=( A166 and A168 );
a10892a <=( (not A202) and (not A200) );
a10893a <=( (not A199) and a10892a );
a10894a <=( a10893a and a10888a );
a10898a <=( A236 and (not A233) );
a10899a <=( A232 and a10898a );
a10903a <=( A302 and (not A299) );
a10904a <=( A298 and a10903a );
a10905a <=( a10904a and a10899a );
a10908a <=( A166 and A168 );
a10912a <=( (not A202) and (not A200) );
a10913a <=( (not A199) and a10912a );
a10914a <=( a10913a and a10908a );
a10918a <=( A236 and (not A233) );
a10919a <=( A232 and a10918a );
a10923a <=( A302 and A299 );
a10924a <=( (not A298) and a10923a );
a10925a <=( a10924a and a10919a );
a10928a <=( A166 and A168 );
a10932a <=( (not A202) and (not A200) );
a10933a <=( (not A199) and a10932a );
a10934a <=( a10933a and a10928a );
a10938a <=( A236 and (not A233) );
a10939a <=( A232 and a10938a );
a10943a <=( A269 and A266 );
a10944a <=( (not A265) and a10943a );
a10945a <=( a10944a and a10939a );
a10948a <=( A166 and A168 );
a10952a <=( (not A202) and (not A200) );
a10953a <=( (not A199) and a10952a );
a10954a <=( a10953a and a10948a );
a10958a <=( A236 and (not A233) );
a10959a <=( A232 and a10958a );
a10963a <=( A269 and (not A266) );
a10964a <=( A265 and a10963a );
a10965a <=( a10964a and a10959a );
a10968a <=( A167 and A168 );
a10972a <=( (not A203) and (not A202) );
a10973a <=( (not A201) and a10972a );
a10974a <=( a10973a and a10968a );
a10978a <=( A236 and A233 );
a10979a <=( (not A232) and a10978a );
a10983a <=( A302 and (not A299) );
a10984a <=( A298 and a10983a );
a10985a <=( a10984a and a10979a );
a10988a <=( A167 and A168 );
a10992a <=( (not A203) and (not A202) );
a10993a <=( (not A201) and a10992a );
a10994a <=( a10993a and a10988a );
a10998a <=( A236 and A233 );
a10999a <=( (not A232) and a10998a );
a11003a <=( A302 and A299 );
a11004a <=( (not A298) and a11003a );
a11005a <=( a11004a and a10999a );
a11008a <=( A167 and A168 );
a11012a <=( (not A203) and (not A202) );
a11013a <=( (not A201) and a11012a );
a11014a <=( a11013a and a11008a );
a11018a <=( A236 and A233 );
a11019a <=( (not A232) and a11018a );
a11023a <=( A269 and A266 );
a11024a <=( (not A265) and a11023a );
a11025a <=( a11024a and a11019a );
a11028a <=( A167 and A168 );
a11032a <=( (not A203) and (not A202) );
a11033a <=( (not A201) and a11032a );
a11034a <=( a11033a and a11028a );
a11038a <=( A236 and A233 );
a11039a <=( (not A232) and a11038a );
a11043a <=( A269 and (not A266) );
a11044a <=( A265 and a11043a );
a11045a <=( a11044a and a11039a );
a11048a <=( A167 and A168 );
a11052a <=( (not A203) and (not A202) );
a11053a <=( (not A201) and a11052a );
a11054a <=( a11053a and a11048a );
a11058a <=( A236 and (not A233) );
a11059a <=( A232 and a11058a );
a11063a <=( A302 and (not A299) );
a11064a <=( A298 and a11063a );
a11065a <=( a11064a and a11059a );
a11068a <=( A167 and A168 );
a11072a <=( (not A203) and (not A202) );
a11073a <=( (not A201) and a11072a );
a11074a <=( a11073a and a11068a );
a11078a <=( A236 and (not A233) );
a11079a <=( A232 and a11078a );
a11083a <=( A302 and A299 );
a11084a <=( (not A298) and a11083a );
a11085a <=( a11084a and a11079a );
a11088a <=( A167 and A168 );
a11092a <=( (not A203) and (not A202) );
a11093a <=( (not A201) and a11092a );
a11094a <=( a11093a and a11088a );
a11098a <=( A236 and (not A233) );
a11099a <=( A232 and a11098a );
a11103a <=( A269 and A266 );
a11104a <=( (not A265) and a11103a );
a11105a <=( a11104a and a11099a );
a11108a <=( A167 and A168 );
a11112a <=( (not A203) and (not A202) );
a11113a <=( (not A201) and a11112a );
a11114a <=( a11113a and a11108a );
a11118a <=( A236 and (not A233) );
a11119a <=( A232 and a11118a );
a11123a <=( A269 and (not A266) );
a11124a <=( A265 and a11123a );
a11125a <=( a11124a and a11119a );
a11128a <=( A167 and A168 );
a11132a <=( (not A201) and A200 );
a11133a <=( A199 and a11132a );
a11134a <=( a11133a and a11128a );
a11138a <=( A234 and A232 );
a11139a <=( (not A202) and a11138a );
a11143a <=( A302 and (not A299) );
a11144a <=( A298 and a11143a );
a11145a <=( a11144a and a11139a );
a11148a <=( A167 and A168 );
a11152a <=( (not A201) and A200 );
a11153a <=( A199 and a11152a );
a11154a <=( a11153a and a11148a );
a11158a <=( A234 and A232 );
a11159a <=( (not A202) and a11158a );
a11163a <=( A302 and A299 );
a11164a <=( (not A298) and a11163a );
a11165a <=( a11164a and a11159a );
a11168a <=( A167 and A168 );
a11172a <=( (not A201) and A200 );
a11173a <=( A199 and a11172a );
a11174a <=( a11173a and a11168a );
a11178a <=( A234 and A232 );
a11179a <=( (not A202) and a11178a );
a11183a <=( A269 and A266 );
a11184a <=( (not A265) and a11183a );
a11185a <=( a11184a and a11179a );
a11188a <=( A167 and A168 );
a11192a <=( (not A201) and A200 );
a11193a <=( A199 and a11192a );
a11194a <=( a11193a and a11188a );
a11198a <=( A234 and A232 );
a11199a <=( (not A202) and a11198a );
a11203a <=( A269 and (not A266) );
a11204a <=( A265 and a11203a );
a11205a <=( a11204a and a11199a );
a11208a <=( A167 and A168 );
a11212a <=( (not A201) and A200 );
a11213a <=( A199 and a11212a );
a11214a <=( a11213a and a11208a );
a11218a <=( A234 and A233 );
a11219a <=( (not A202) and a11218a );
a11223a <=( A302 and (not A299) );
a11224a <=( A298 and a11223a );
a11225a <=( a11224a and a11219a );
a11228a <=( A167 and A168 );
a11232a <=( (not A201) and A200 );
a11233a <=( A199 and a11232a );
a11234a <=( a11233a and a11228a );
a11238a <=( A234 and A233 );
a11239a <=( (not A202) and a11238a );
a11243a <=( A302 and A299 );
a11244a <=( (not A298) and a11243a );
a11245a <=( a11244a and a11239a );
a11248a <=( A167 and A168 );
a11252a <=( (not A201) and A200 );
a11253a <=( A199 and a11252a );
a11254a <=( a11253a and a11248a );
a11258a <=( A234 and A233 );
a11259a <=( (not A202) and a11258a );
a11263a <=( A269 and A266 );
a11264a <=( (not A265) and a11263a );
a11265a <=( a11264a and a11259a );
a11268a <=( A167 and A168 );
a11272a <=( (not A201) and A200 );
a11273a <=( A199 and a11272a );
a11274a <=( a11273a and a11268a );
a11278a <=( A234 and A233 );
a11279a <=( (not A202) and a11278a );
a11283a <=( A269 and (not A266) );
a11284a <=( A265 and a11283a );
a11285a <=( a11284a and a11279a );
a11288a <=( A167 and A168 );
a11292a <=( (not A201) and A200 );
a11293a <=( A199 and a11292a );
a11294a <=( a11293a and a11288a );
a11298a <=( A233 and (not A232) );
a11299a <=( (not A202) and a11298a );
a11303a <=( A300 and A299 );
a11304a <=( A236 and a11303a );
a11305a <=( a11304a and a11299a );
a11308a <=( A167 and A168 );
a11312a <=( (not A201) and A200 );
a11313a <=( A199 and a11312a );
a11314a <=( a11313a and a11308a );
a11318a <=( A233 and (not A232) );
a11319a <=( (not A202) and a11318a );
a11323a <=( A300 and A298 );
a11324a <=( A236 and a11323a );
a11325a <=( a11324a and a11319a );
a11328a <=( A167 and A168 );
a11332a <=( (not A201) and A200 );
a11333a <=( A199 and a11332a );
a11334a <=( a11333a and a11328a );
a11338a <=( A233 and (not A232) );
a11339a <=( (not A202) and a11338a );
a11343a <=( A267 and A265 );
a11344a <=( A236 and a11343a );
a11345a <=( a11344a and a11339a );
a11348a <=( A167 and A168 );
a11352a <=( (not A201) and A200 );
a11353a <=( A199 and a11352a );
a11354a <=( a11353a and a11348a );
a11358a <=( A233 and (not A232) );
a11359a <=( (not A202) and a11358a );
a11363a <=( A267 and A266 );
a11364a <=( A236 and a11363a );
a11365a <=( a11364a and a11359a );
a11368a <=( A167 and A168 );
a11372a <=( (not A201) and A200 );
a11373a <=( A199 and a11372a );
a11374a <=( a11373a and a11368a );
a11378a <=( (not A233) and A232 );
a11379a <=( (not A202) and a11378a );
a11383a <=( A300 and A299 );
a11384a <=( A236 and a11383a );
a11385a <=( a11384a and a11379a );
a11388a <=( A167 and A168 );
a11392a <=( (not A201) and A200 );
a11393a <=( A199 and a11392a );
a11394a <=( a11393a and a11388a );
a11398a <=( (not A233) and A232 );
a11399a <=( (not A202) and a11398a );
a11403a <=( A300 and A298 );
a11404a <=( A236 and a11403a );
a11405a <=( a11404a and a11399a );
a11408a <=( A167 and A168 );
a11412a <=( (not A201) and A200 );
a11413a <=( A199 and a11412a );
a11414a <=( a11413a and a11408a );
a11418a <=( (not A233) and A232 );
a11419a <=( (not A202) and a11418a );
a11423a <=( A267 and A265 );
a11424a <=( A236 and a11423a );
a11425a <=( a11424a and a11419a );
a11428a <=( A167 and A168 );
a11432a <=( (not A201) and A200 );
a11433a <=( A199 and a11432a );
a11434a <=( a11433a and a11428a );
a11438a <=( (not A233) and A232 );
a11439a <=( (not A202) and a11438a );
a11443a <=( A267 and A266 );
a11444a <=( A236 and a11443a );
a11445a <=( a11444a and a11439a );
a11448a <=( A167 and A168 );
a11452a <=( (not A202) and (not A200) );
a11453a <=( (not A199) and a11452a );
a11454a <=( a11453a and a11448a );
a11458a <=( A236 and A233 );
a11459a <=( (not A232) and a11458a );
a11463a <=( A302 and (not A299) );
a11464a <=( A298 and a11463a );
a11465a <=( a11464a and a11459a );
a11468a <=( A167 and A168 );
a11472a <=( (not A202) and (not A200) );
a11473a <=( (not A199) and a11472a );
a11474a <=( a11473a and a11468a );
a11478a <=( A236 and A233 );
a11479a <=( (not A232) and a11478a );
a11483a <=( A302 and A299 );
a11484a <=( (not A298) and a11483a );
a11485a <=( a11484a and a11479a );
a11488a <=( A167 and A168 );
a11492a <=( (not A202) and (not A200) );
a11493a <=( (not A199) and a11492a );
a11494a <=( a11493a and a11488a );
a11498a <=( A236 and A233 );
a11499a <=( (not A232) and a11498a );
a11503a <=( A269 and A266 );
a11504a <=( (not A265) and a11503a );
a11505a <=( a11504a and a11499a );
a11508a <=( A167 and A168 );
a11512a <=( (not A202) and (not A200) );
a11513a <=( (not A199) and a11512a );
a11514a <=( a11513a and a11508a );
a11518a <=( A236 and A233 );
a11519a <=( (not A232) and a11518a );
a11523a <=( A269 and (not A266) );
a11524a <=( A265 and a11523a );
a11525a <=( a11524a and a11519a );
a11528a <=( A167 and A168 );
a11532a <=( (not A202) and (not A200) );
a11533a <=( (not A199) and a11532a );
a11534a <=( a11533a and a11528a );
a11538a <=( A236 and (not A233) );
a11539a <=( A232 and a11538a );
a11543a <=( A302 and (not A299) );
a11544a <=( A298 and a11543a );
a11545a <=( a11544a and a11539a );
a11548a <=( A167 and A168 );
a11552a <=( (not A202) and (not A200) );
a11553a <=( (not A199) and a11552a );
a11554a <=( a11553a and a11548a );
a11558a <=( A236 and (not A233) );
a11559a <=( A232 and a11558a );
a11563a <=( A302 and A299 );
a11564a <=( (not A298) and a11563a );
a11565a <=( a11564a and a11559a );
a11568a <=( A167 and A168 );
a11572a <=( (not A202) and (not A200) );
a11573a <=( (not A199) and a11572a );
a11574a <=( a11573a and a11568a );
a11578a <=( A236 and (not A233) );
a11579a <=( A232 and a11578a );
a11583a <=( A269 and A266 );
a11584a <=( (not A265) and a11583a );
a11585a <=( a11584a and a11579a );
a11588a <=( A167 and A168 );
a11592a <=( (not A202) and (not A200) );
a11593a <=( (not A199) and a11592a );
a11594a <=( a11593a and a11588a );
a11598a <=( A236 and (not A233) );
a11599a <=( A232 and a11598a );
a11603a <=( A269 and (not A266) );
a11604a <=( A265 and a11603a );
a11605a <=( a11604a and a11599a );
a11608a <=( A167 and A170 );
a11612a <=( (not A202) and (not A201) );
a11613a <=( (not A166) and a11612a );
a11614a <=( a11613a and a11608a );
a11618a <=( A234 and A232 );
a11619a <=( (not A203) and a11618a );
a11623a <=( A302 and (not A299) );
a11624a <=( A298 and a11623a );
a11625a <=( a11624a and a11619a );
a11628a <=( A167 and A170 );
a11632a <=( (not A202) and (not A201) );
a11633a <=( (not A166) and a11632a );
a11634a <=( a11633a and a11628a );
a11638a <=( A234 and A232 );
a11639a <=( (not A203) and a11638a );
a11643a <=( A302 and A299 );
a11644a <=( (not A298) and a11643a );
a11645a <=( a11644a and a11639a );
a11648a <=( A167 and A170 );
a11652a <=( (not A202) and (not A201) );
a11653a <=( (not A166) and a11652a );
a11654a <=( a11653a and a11648a );
a11658a <=( A234 and A232 );
a11659a <=( (not A203) and a11658a );
a11663a <=( A269 and A266 );
a11664a <=( (not A265) and a11663a );
a11665a <=( a11664a and a11659a );
a11668a <=( A167 and A170 );
a11672a <=( (not A202) and (not A201) );
a11673a <=( (not A166) and a11672a );
a11674a <=( a11673a and a11668a );
a11678a <=( A234 and A232 );
a11679a <=( (not A203) and a11678a );
a11683a <=( A269 and (not A266) );
a11684a <=( A265 and a11683a );
a11685a <=( a11684a and a11679a );
a11688a <=( A167 and A170 );
a11692a <=( (not A202) and (not A201) );
a11693a <=( (not A166) and a11692a );
a11694a <=( a11693a and a11688a );
a11698a <=( A234 and A233 );
a11699a <=( (not A203) and a11698a );
a11703a <=( A302 and (not A299) );
a11704a <=( A298 and a11703a );
a11705a <=( a11704a and a11699a );
a11708a <=( A167 and A170 );
a11712a <=( (not A202) and (not A201) );
a11713a <=( (not A166) and a11712a );
a11714a <=( a11713a and a11708a );
a11718a <=( A234 and A233 );
a11719a <=( (not A203) and a11718a );
a11723a <=( A302 and A299 );
a11724a <=( (not A298) and a11723a );
a11725a <=( a11724a and a11719a );
a11728a <=( A167 and A170 );
a11732a <=( (not A202) and (not A201) );
a11733a <=( (not A166) and a11732a );
a11734a <=( a11733a and a11728a );
a11738a <=( A234 and A233 );
a11739a <=( (not A203) and a11738a );
a11743a <=( A269 and A266 );
a11744a <=( (not A265) and a11743a );
a11745a <=( a11744a and a11739a );
a11748a <=( A167 and A170 );
a11752a <=( (not A202) and (not A201) );
a11753a <=( (not A166) and a11752a );
a11754a <=( a11753a and a11748a );
a11758a <=( A234 and A233 );
a11759a <=( (not A203) and a11758a );
a11763a <=( A269 and (not A266) );
a11764a <=( A265 and a11763a );
a11765a <=( a11764a and a11759a );
a11768a <=( A167 and A170 );
a11772a <=( (not A202) and (not A201) );
a11773a <=( (not A166) and a11772a );
a11774a <=( a11773a and a11768a );
a11778a <=( A233 and (not A232) );
a11779a <=( (not A203) and a11778a );
a11783a <=( A300 and A299 );
a11784a <=( A236 and a11783a );
a11785a <=( a11784a and a11779a );
a11788a <=( A167 and A170 );
a11792a <=( (not A202) and (not A201) );
a11793a <=( (not A166) and a11792a );
a11794a <=( a11793a and a11788a );
a11798a <=( A233 and (not A232) );
a11799a <=( (not A203) and a11798a );
a11803a <=( A300 and A298 );
a11804a <=( A236 and a11803a );
a11805a <=( a11804a and a11799a );
a11808a <=( A167 and A170 );
a11812a <=( (not A202) and (not A201) );
a11813a <=( (not A166) and a11812a );
a11814a <=( a11813a and a11808a );
a11818a <=( A233 and (not A232) );
a11819a <=( (not A203) and a11818a );
a11823a <=( A267 and A265 );
a11824a <=( A236 and a11823a );
a11825a <=( a11824a and a11819a );
a11828a <=( A167 and A170 );
a11832a <=( (not A202) and (not A201) );
a11833a <=( (not A166) and a11832a );
a11834a <=( a11833a and a11828a );
a11838a <=( A233 and (not A232) );
a11839a <=( (not A203) and a11838a );
a11843a <=( A267 and A266 );
a11844a <=( A236 and a11843a );
a11845a <=( a11844a and a11839a );
a11848a <=( A167 and A170 );
a11852a <=( (not A202) and (not A201) );
a11853a <=( (not A166) and a11852a );
a11854a <=( a11853a and a11848a );
a11858a <=( (not A233) and A232 );
a11859a <=( (not A203) and a11858a );
a11863a <=( A300 and A299 );
a11864a <=( A236 and a11863a );
a11865a <=( a11864a and a11859a );
a11868a <=( A167 and A170 );
a11872a <=( (not A202) and (not A201) );
a11873a <=( (not A166) and a11872a );
a11874a <=( a11873a and a11868a );
a11878a <=( (not A233) and A232 );
a11879a <=( (not A203) and a11878a );
a11883a <=( A300 and A298 );
a11884a <=( A236 and a11883a );
a11885a <=( a11884a and a11879a );
a11888a <=( A167 and A170 );
a11892a <=( (not A202) and (not A201) );
a11893a <=( (not A166) and a11892a );
a11894a <=( a11893a and a11888a );
a11898a <=( (not A233) and A232 );
a11899a <=( (not A203) and a11898a );
a11903a <=( A267 and A265 );
a11904a <=( A236 and a11903a );
a11905a <=( a11904a and a11899a );
a11908a <=( A167 and A170 );
a11912a <=( (not A202) and (not A201) );
a11913a <=( (not A166) and a11912a );
a11914a <=( a11913a and a11908a );
a11918a <=( (not A233) and A232 );
a11919a <=( (not A203) and a11918a );
a11923a <=( A267 and A266 );
a11924a <=( A236 and a11923a );
a11925a <=( a11924a and a11919a );
a11928a <=( A167 and A170 );
a11932a <=( A200 and A199 );
a11933a <=( (not A166) and a11932a );
a11934a <=( a11933a and a11928a );
a11938a <=( A235 and (not A202) );
a11939a <=( (not A201) and a11938a );
a11943a <=( A302 and (not A299) );
a11944a <=( A298 and a11943a );
a11945a <=( a11944a and a11939a );
a11948a <=( A167 and A170 );
a11952a <=( A200 and A199 );
a11953a <=( (not A166) and a11952a );
a11954a <=( a11953a and a11948a );
a11958a <=( A235 and (not A202) );
a11959a <=( (not A201) and a11958a );
a11963a <=( A302 and A299 );
a11964a <=( (not A298) and a11963a );
a11965a <=( a11964a and a11959a );
a11968a <=( A167 and A170 );
a11972a <=( A200 and A199 );
a11973a <=( (not A166) and a11972a );
a11974a <=( a11973a and a11968a );
a11978a <=( A235 and (not A202) );
a11979a <=( (not A201) and a11978a );
a11983a <=( A269 and A266 );
a11984a <=( (not A265) and a11983a );
a11985a <=( a11984a and a11979a );
a11988a <=( A167 and A170 );
a11992a <=( A200 and A199 );
a11993a <=( (not A166) and a11992a );
a11994a <=( a11993a and a11988a );
a11998a <=( A235 and (not A202) );
a11999a <=( (not A201) and a11998a );
a12003a <=( A269 and (not A266) );
a12004a <=( A265 and a12003a );
a12005a <=( a12004a and a11999a );
a12008a <=( A167 and A170 );
a12012a <=( A200 and A199 );
a12013a <=( (not A166) and a12012a );
a12014a <=( a12013a and a12008a );
a12018a <=( A232 and (not A202) );
a12019a <=( (not A201) and a12018a );
a12023a <=( A300 and A299 );
a12024a <=( A234 and a12023a );
a12025a <=( a12024a and a12019a );
a12028a <=( A167 and A170 );
a12032a <=( A200 and A199 );
a12033a <=( (not A166) and a12032a );
a12034a <=( a12033a and a12028a );
a12038a <=( A232 and (not A202) );
a12039a <=( (not A201) and a12038a );
a12043a <=( A300 and A298 );
a12044a <=( A234 and a12043a );
a12045a <=( a12044a and a12039a );
a12048a <=( A167 and A170 );
a12052a <=( A200 and A199 );
a12053a <=( (not A166) and a12052a );
a12054a <=( a12053a and a12048a );
a12058a <=( A232 and (not A202) );
a12059a <=( (not A201) and a12058a );
a12063a <=( A267 and A265 );
a12064a <=( A234 and a12063a );
a12065a <=( a12064a and a12059a );
a12068a <=( A167 and A170 );
a12072a <=( A200 and A199 );
a12073a <=( (not A166) and a12072a );
a12074a <=( a12073a and a12068a );
a12078a <=( A232 and (not A202) );
a12079a <=( (not A201) and a12078a );
a12083a <=( A267 and A266 );
a12084a <=( A234 and a12083a );
a12085a <=( a12084a and a12079a );
a12088a <=( A167 and A170 );
a12092a <=( A200 and A199 );
a12093a <=( (not A166) and a12092a );
a12094a <=( a12093a and a12088a );
a12098a <=( A233 and (not A202) );
a12099a <=( (not A201) and a12098a );
a12103a <=( A300 and A299 );
a12104a <=( A234 and a12103a );
a12105a <=( a12104a and a12099a );
a12108a <=( A167 and A170 );
a12112a <=( A200 and A199 );
a12113a <=( (not A166) and a12112a );
a12114a <=( a12113a and a12108a );
a12118a <=( A233 and (not A202) );
a12119a <=( (not A201) and a12118a );
a12123a <=( A300 and A298 );
a12124a <=( A234 and a12123a );
a12125a <=( a12124a and a12119a );
a12128a <=( A167 and A170 );
a12132a <=( A200 and A199 );
a12133a <=( (not A166) and a12132a );
a12134a <=( a12133a and a12128a );
a12138a <=( A233 and (not A202) );
a12139a <=( (not A201) and a12138a );
a12143a <=( A267 and A265 );
a12144a <=( A234 and a12143a );
a12145a <=( a12144a and a12139a );
a12148a <=( A167 and A170 );
a12152a <=( A200 and A199 );
a12153a <=( (not A166) and a12152a );
a12154a <=( a12153a and a12148a );
a12158a <=( A233 and (not A202) );
a12159a <=( (not A201) and a12158a );
a12163a <=( A267 and A266 );
a12164a <=( A234 and a12163a );
a12165a <=( a12164a and a12159a );
a12168a <=( A167 and A170 );
a12172a <=( A200 and A199 );
a12173a <=( (not A166) and a12172a );
a12174a <=( a12173a and a12168a );
a12178a <=( (not A232) and (not A202) );
a12179a <=( (not A201) and a12178a );
a12183a <=( A301 and A236 );
a12184a <=( A233 and a12183a );
a12185a <=( a12184a and a12179a );
a12188a <=( A167 and A170 );
a12192a <=( A200 and A199 );
a12193a <=( (not A166) and a12192a );
a12194a <=( a12193a and a12188a );
a12198a <=( (not A232) and (not A202) );
a12199a <=( (not A201) and a12198a );
a12203a <=( A268 and A236 );
a12204a <=( A233 and a12203a );
a12205a <=( a12204a and a12199a );
a12208a <=( A167 and A170 );
a12212a <=( A200 and A199 );
a12213a <=( (not A166) and a12212a );
a12214a <=( a12213a and a12208a );
a12218a <=( A232 and (not A202) );
a12219a <=( (not A201) and a12218a );
a12223a <=( A301 and A236 );
a12224a <=( (not A233) and a12223a );
a12225a <=( a12224a and a12219a );
a12228a <=( A167 and A170 );
a12232a <=( A200 and A199 );
a12233a <=( (not A166) and a12232a );
a12234a <=( a12233a and a12228a );
a12238a <=( A232 and (not A202) );
a12239a <=( (not A201) and a12238a );
a12243a <=( A268 and A236 );
a12244a <=( (not A233) and a12243a );
a12245a <=( a12244a and a12239a );
a12248a <=( A167 and A170 );
a12252a <=( (not A200) and (not A199) );
a12253a <=( (not A166) and a12252a );
a12254a <=( a12253a and a12248a );
a12258a <=( A234 and A232 );
a12259a <=( (not A202) and a12258a );
a12263a <=( A302 and (not A299) );
a12264a <=( A298 and a12263a );
a12265a <=( a12264a and a12259a );
a12268a <=( A167 and A170 );
a12272a <=( (not A200) and (not A199) );
a12273a <=( (not A166) and a12272a );
a12274a <=( a12273a and a12268a );
a12278a <=( A234 and A232 );
a12279a <=( (not A202) and a12278a );
a12283a <=( A302 and A299 );
a12284a <=( (not A298) and a12283a );
a12285a <=( a12284a and a12279a );
a12288a <=( A167 and A170 );
a12292a <=( (not A200) and (not A199) );
a12293a <=( (not A166) and a12292a );
a12294a <=( a12293a and a12288a );
a12298a <=( A234 and A232 );
a12299a <=( (not A202) and a12298a );
a12303a <=( A269 and A266 );
a12304a <=( (not A265) and a12303a );
a12305a <=( a12304a and a12299a );
a12308a <=( A167 and A170 );
a12312a <=( (not A200) and (not A199) );
a12313a <=( (not A166) and a12312a );
a12314a <=( a12313a and a12308a );
a12318a <=( A234 and A232 );
a12319a <=( (not A202) and a12318a );
a12323a <=( A269 and (not A266) );
a12324a <=( A265 and a12323a );
a12325a <=( a12324a and a12319a );
a12328a <=( A167 and A170 );
a12332a <=( (not A200) and (not A199) );
a12333a <=( (not A166) and a12332a );
a12334a <=( a12333a and a12328a );
a12338a <=( A234 and A233 );
a12339a <=( (not A202) and a12338a );
a12343a <=( A302 and (not A299) );
a12344a <=( A298 and a12343a );
a12345a <=( a12344a and a12339a );
a12348a <=( A167 and A170 );
a12352a <=( (not A200) and (not A199) );
a12353a <=( (not A166) and a12352a );
a12354a <=( a12353a and a12348a );
a12358a <=( A234 and A233 );
a12359a <=( (not A202) and a12358a );
a12363a <=( A302 and A299 );
a12364a <=( (not A298) and a12363a );
a12365a <=( a12364a and a12359a );
a12368a <=( A167 and A170 );
a12372a <=( (not A200) and (not A199) );
a12373a <=( (not A166) and a12372a );
a12374a <=( a12373a and a12368a );
a12378a <=( A234 and A233 );
a12379a <=( (not A202) and a12378a );
a12383a <=( A269 and A266 );
a12384a <=( (not A265) and a12383a );
a12385a <=( a12384a and a12379a );
a12388a <=( A167 and A170 );
a12392a <=( (not A200) and (not A199) );
a12393a <=( (not A166) and a12392a );
a12394a <=( a12393a and a12388a );
a12398a <=( A234 and A233 );
a12399a <=( (not A202) and a12398a );
a12403a <=( A269 and (not A266) );
a12404a <=( A265 and a12403a );
a12405a <=( a12404a and a12399a );
a12408a <=( A167 and A170 );
a12412a <=( (not A200) and (not A199) );
a12413a <=( (not A166) and a12412a );
a12414a <=( a12413a and a12408a );
a12418a <=( A233 and (not A232) );
a12419a <=( (not A202) and a12418a );
a12423a <=( A300 and A299 );
a12424a <=( A236 and a12423a );
a12425a <=( a12424a and a12419a );
a12428a <=( A167 and A170 );
a12432a <=( (not A200) and (not A199) );
a12433a <=( (not A166) and a12432a );
a12434a <=( a12433a and a12428a );
a12438a <=( A233 and (not A232) );
a12439a <=( (not A202) and a12438a );
a12443a <=( A300 and A298 );
a12444a <=( A236 and a12443a );
a12445a <=( a12444a and a12439a );
a12448a <=( A167 and A170 );
a12452a <=( (not A200) and (not A199) );
a12453a <=( (not A166) and a12452a );
a12454a <=( a12453a and a12448a );
a12458a <=( A233 and (not A232) );
a12459a <=( (not A202) and a12458a );
a12463a <=( A267 and A265 );
a12464a <=( A236 and a12463a );
a12465a <=( a12464a and a12459a );
a12468a <=( A167 and A170 );
a12472a <=( (not A200) and (not A199) );
a12473a <=( (not A166) and a12472a );
a12474a <=( a12473a and a12468a );
a12478a <=( A233 and (not A232) );
a12479a <=( (not A202) and a12478a );
a12483a <=( A267 and A266 );
a12484a <=( A236 and a12483a );
a12485a <=( a12484a and a12479a );
a12488a <=( A167 and A170 );
a12492a <=( (not A200) and (not A199) );
a12493a <=( (not A166) and a12492a );
a12494a <=( a12493a and a12488a );
a12498a <=( (not A233) and A232 );
a12499a <=( (not A202) and a12498a );
a12503a <=( A300 and A299 );
a12504a <=( A236 and a12503a );
a12505a <=( a12504a and a12499a );
a12508a <=( A167 and A170 );
a12512a <=( (not A200) and (not A199) );
a12513a <=( (not A166) and a12512a );
a12514a <=( a12513a and a12508a );
a12518a <=( (not A233) and A232 );
a12519a <=( (not A202) and a12518a );
a12523a <=( A300 and A298 );
a12524a <=( A236 and a12523a );
a12525a <=( a12524a and a12519a );
a12528a <=( A167 and A170 );
a12532a <=( (not A200) and (not A199) );
a12533a <=( (not A166) and a12532a );
a12534a <=( a12533a and a12528a );
a12538a <=( (not A233) and A232 );
a12539a <=( (not A202) and a12538a );
a12543a <=( A267 and A265 );
a12544a <=( A236 and a12543a );
a12545a <=( a12544a and a12539a );
a12548a <=( A167 and A170 );
a12552a <=( (not A200) and (not A199) );
a12553a <=( (not A166) and a12552a );
a12554a <=( a12553a and a12548a );
a12558a <=( (not A233) and A232 );
a12559a <=( (not A202) and a12558a );
a12563a <=( A267 and A266 );
a12564a <=( A236 and a12563a );
a12565a <=( a12564a and a12559a );
a12568a <=( (not A167) and A170 );
a12572a <=( (not A202) and (not A201) );
a12573a <=( A166 and a12572a );
a12574a <=( a12573a and a12568a );
a12578a <=( A234 and A232 );
a12579a <=( (not A203) and a12578a );
a12583a <=( A302 and (not A299) );
a12584a <=( A298 and a12583a );
a12585a <=( a12584a and a12579a );
a12588a <=( (not A167) and A170 );
a12592a <=( (not A202) and (not A201) );
a12593a <=( A166 and a12592a );
a12594a <=( a12593a and a12588a );
a12598a <=( A234 and A232 );
a12599a <=( (not A203) and a12598a );
a12603a <=( A302 and A299 );
a12604a <=( (not A298) and a12603a );
a12605a <=( a12604a and a12599a );
a12608a <=( (not A167) and A170 );
a12612a <=( (not A202) and (not A201) );
a12613a <=( A166 and a12612a );
a12614a <=( a12613a and a12608a );
a12618a <=( A234 and A232 );
a12619a <=( (not A203) and a12618a );
a12623a <=( A269 and A266 );
a12624a <=( (not A265) and a12623a );
a12625a <=( a12624a and a12619a );
a12628a <=( (not A167) and A170 );
a12632a <=( (not A202) and (not A201) );
a12633a <=( A166 and a12632a );
a12634a <=( a12633a and a12628a );
a12638a <=( A234 and A232 );
a12639a <=( (not A203) and a12638a );
a12643a <=( A269 and (not A266) );
a12644a <=( A265 and a12643a );
a12645a <=( a12644a and a12639a );
a12648a <=( (not A167) and A170 );
a12652a <=( (not A202) and (not A201) );
a12653a <=( A166 and a12652a );
a12654a <=( a12653a and a12648a );
a12658a <=( A234 and A233 );
a12659a <=( (not A203) and a12658a );
a12663a <=( A302 and (not A299) );
a12664a <=( A298 and a12663a );
a12665a <=( a12664a and a12659a );
a12668a <=( (not A167) and A170 );
a12672a <=( (not A202) and (not A201) );
a12673a <=( A166 and a12672a );
a12674a <=( a12673a and a12668a );
a12678a <=( A234 and A233 );
a12679a <=( (not A203) and a12678a );
a12683a <=( A302 and A299 );
a12684a <=( (not A298) and a12683a );
a12685a <=( a12684a and a12679a );
a12688a <=( (not A167) and A170 );
a12692a <=( (not A202) and (not A201) );
a12693a <=( A166 and a12692a );
a12694a <=( a12693a and a12688a );
a12698a <=( A234 and A233 );
a12699a <=( (not A203) and a12698a );
a12703a <=( A269 and A266 );
a12704a <=( (not A265) and a12703a );
a12705a <=( a12704a and a12699a );
a12708a <=( (not A167) and A170 );
a12712a <=( (not A202) and (not A201) );
a12713a <=( A166 and a12712a );
a12714a <=( a12713a and a12708a );
a12718a <=( A234 and A233 );
a12719a <=( (not A203) and a12718a );
a12723a <=( A269 and (not A266) );
a12724a <=( A265 and a12723a );
a12725a <=( a12724a and a12719a );
a12728a <=( (not A167) and A170 );
a12732a <=( (not A202) and (not A201) );
a12733a <=( A166 and a12732a );
a12734a <=( a12733a and a12728a );
a12738a <=( A233 and (not A232) );
a12739a <=( (not A203) and a12738a );
a12743a <=( A300 and A299 );
a12744a <=( A236 and a12743a );
a12745a <=( a12744a and a12739a );
a12748a <=( (not A167) and A170 );
a12752a <=( (not A202) and (not A201) );
a12753a <=( A166 and a12752a );
a12754a <=( a12753a and a12748a );
a12758a <=( A233 and (not A232) );
a12759a <=( (not A203) and a12758a );
a12763a <=( A300 and A298 );
a12764a <=( A236 and a12763a );
a12765a <=( a12764a and a12759a );
a12768a <=( (not A167) and A170 );
a12772a <=( (not A202) and (not A201) );
a12773a <=( A166 and a12772a );
a12774a <=( a12773a and a12768a );
a12778a <=( A233 and (not A232) );
a12779a <=( (not A203) and a12778a );
a12783a <=( A267 and A265 );
a12784a <=( A236 and a12783a );
a12785a <=( a12784a and a12779a );
a12788a <=( (not A167) and A170 );
a12792a <=( (not A202) and (not A201) );
a12793a <=( A166 and a12792a );
a12794a <=( a12793a and a12788a );
a12798a <=( A233 and (not A232) );
a12799a <=( (not A203) and a12798a );
a12803a <=( A267 and A266 );
a12804a <=( A236 and a12803a );
a12805a <=( a12804a and a12799a );
a12808a <=( (not A167) and A170 );
a12812a <=( (not A202) and (not A201) );
a12813a <=( A166 and a12812a );
a12814a <=( a12813a and a12808a );
a12818a <=( (not A233) and A232 );
a12819a <=( (not A203) and a12818a );
a12823a <=( A300 and A299 );
a12824a <=( A236 and a12823a );
a12825a <=( a12824a and a12819a );
a12828a <=( (not A167) and A170 );
a12832a <=( (not A202) and (not A201) );
a12833a <=( A166 and a12832a );
a12834a <=( a12833a and a12828a );
a12838a <=( (not A233) and A232 );
a12839a <=( (not A203) and a12838a );
a12843a <=( A300 and A298 );
a12844a <=( A236 and a12843a );
a12845a <=( a12844a and a12839a );
a12848a <=( (not A167) and A170 );
a12852a <=( (not A202) and (not A201) );
a12853a <=( A166 and a12852a );
a12854a <=( a12853a and a12848a );
a12858a <=( (not A233) and A232 );
a12859a <=( (not A203) and a12858a );
a12863a <=( A267 and A265 );
a12864a <=( A236 and a12863a );
a12865a <=( a12864a and a12859a );
a12868a <=( (not A167) and A170 );
a12872a <=( (not A202) and (not A201) );
a12873a <=( A166 and a12872a );
a12874a <=( a12873a and a12868a );
a12878a <=( (not A233) and A232 );
a12879a <=( (not A203) and a12878a );
a12883a <=( A267 and A266 );
a12884a <=( A236 and a12883a );
a12885a <=( a12884a and a12879a );
a12888a <=( (not A167) and A170 );
a12892a <=( A200 and A199 );
a12893a <=( A166 and a12892a );
a12894a <=( a12893a and a12888a );
a12898a <=( A235 and (not A202) );
a12899a <=( (not A201) and a12898a );
a12903a <=( A302 and (not A299) );
a12904a <=( A298 and a12903a );
a12905a <=( a12904a and a12899a );
a12908a <=( (not A167) and A170 );
a12912a <=( A200 and A199 );
a12913a <=( A166 and a12912a );
a12914a <=( a12913a and a12908a );
a12918a <=( A235 and (not A202) );
a12919a <=( (not A201) and a12918a );
a12923a <=( A302 and A299 );
a12924a <=( (not A298) and a12923a );
a12925a <=( a12924a and a12919a );
a12928a <=( (not A167) and A170 );
a12932a <=( A200 and A199 );
a12933a <=( A166 and a12932a );
a12934a <=( a12933a and a12928a );
a12938a <=( A235 and (not A202) );
a12939a <=( (not A201) and a12938a );
a12943a <=( A269 and A266 );
a12944a <=( (not A265) and a12943a );
a12945a <=( a12944a and a12939a );
a12948a <=( (not A167) and A170 );
a12952a <=( A200 and A199 );
a12953a <=( A166 and a12952a );
a12954a <=( a12953a and a12948a );
a12958a <=( A235 and (not A202) );
a12959a <=( (not A201) and a12958a );
a12963a <=( A269 and (not A266) );
a12964a <=( A265 and a12963a );
a12965a <=( a12964a and a12959a );
a12968a <=( (not A167) and A170 );
a12972a <=( A200 and A199 );
a12973a <=( A166 and a12972a );
a12974a <=( a12973a and a12968a );
a12978a <=( A232 and (not A202) );
a12979a <=( (not A201) and a12978a );
a12983a <=( A300 and A299 );
a12984a <=( A234 and a12983a );
a12985a <=( a12984a and a12979a );
a12988a <=( (not A167) and A170 );
a12992a <=( A200 and A199 );
a12993a <=( A166 and a12992a );
a12994a <=( a12993a and a12988a );
a12998a <=( A232 and (not A202) );
a12999a <=( (not A201) and a12998a );
a13003a <=( A300 and A298 );
a13004a <=( A234 and a13003a );
a13005a <=( a13004a and a12999a );
a13008a <=( (not A167) and A170 );
a13012a <=( A200 and A199 );
a13013a <=( A166 and a13012a );
a13014a <=( a13013a and a13008a );
a13018a <=( A232 and (not A202) );
a13019a <=( (not A201) and a13018a );
a13023a <=( A267 and A265 );
a13024a <=( A234 and a13023a );
a13025a <=( a13024a and a13019a );
a13028a <=( (not A167) and A170 );
a13032a <=( A200 and A199 );
a13033a <=( A166 and a13032a );
a13034a <=( a13033a and a13028a );
a13038a <=( A232 and (not A202) );
a13039a <=( (not A201) and a13038a );
a13043a <=( A267 and A266 );
a13044a <=( A234 and a13043a );
a13045a <=( a13044a and a13039a );
a13048a <=( (not A167) and A170 );
a13052a <=( A200 and A199 );
a13053a <=( A166 and a13052a );
a13054a <=( a13053a and a13048a );
a13058a <=( A233 and (not A202) );
a13059a <=( (not A201) and a13058a );
a13063a <=( A300 and A299 );
a13064a <=( A234 and a13063a );
a13065a <=( a13064a and a13059a );
a13068a <=( (not A167) and A170 );
a13072a <=( A200 and A199 );
a13073a <=( A166 and a13072a );
a13074a <=( a13073a and a13068a );
a13078a <=( A233 and (not A202) );
a13079a <=( (not A201) and a13078a );
a13083a <=( A300 and A298 );
a13084a <=( A234 and a13083a );
a13085a <=( a13084a and a13079a );
a13088a <=( (not A167) and A170 );
a13092a <=( A200 and A199 );
a13093a <=( A166 and a13092a );
a13094a <=( a13093a and a13088a );
a13098a <=( A233 and (not A202) );
a13099a <=( (not A201) and a13098a );
a13103a <=( A267 and A265 );
a13104a <=( A234 and a13103a );
a13105a <=( a13104a and a13099a );
a13108a <=( (not A167) and A170 );
a13112a <=( A200 and A199 );
a13113a <=( A166 and a13112a );
a13114a <=( a13113a and a13108a );
a13118a <=( A233 and (not A202) );
a13119a <=( (not A201) and a13118a );
a13123a <=( A267 and A266 );
a13124a <=( A234 and a13123a );
a13125a <=( a13124a and a13119a );
a13128a <=( (not A167) and A170 );
a13132a <=( A200 and A199 );
a13133a <=( A166 and a13132a );
a13134a <=( a13133a and a13128a );
a13138a <=( (not A232) and (not A202) );
a13139a <=( (not A201) and a13138a );
a13143a <=( A301 and A236 );
a13144a <=( A233 and a13143a );
a13145a <=( a13144a and a13139a );
a13148a <=( (not A167) and A170 );
a13152a <=( A200 and A199 );
a13153a <=( A166 and a13152a );
a13154a <=( a13153a and a13148a );
a13158a <=( (not A232) and (not A202) );
a13159a <=( (not A201) and a13158a );
a13163a <=( A268 and A236 );
a13164a <=( A233 and a13163a );
a13165a <=( a13164a and a13159a );
a13168a <=( (not A167) and A170 );
a13172a <=( A200 and A199 );
a13173a <=( A166 and a13172a );
a13174a <=( a13173a and a13168a );
a13178a <=( A232 and (not A202) );
a13179a <=( (not A201) and a13178a );
a13183a <=( A301 and A236 );
a13184a <=( (not A233) and a13183a );
a13185a <=( a13184a and a13179a );
a13188a <=( (not A167) and A170 );
a13192a <=( A200 and A199 );
a13193a <=( A166 and a13192a );
a13194a <=( a13193a and a13188a );
a13198a <=( A232 and (not A202) );
a13199a <=( (not A201) and a13198a );
a13203a <=( A268 and A236 );
a13204a <=( (not A233) and a13203a );
a13205a <=( a13204a and a13199a );
a13208a <=( (not A167) and A170 );
a13212a <=( (not A200) and (not A199) );
a13213a <=( A166 and a13212a );
a13214a <=( a13213a and a13208a );
a13218a <=( A234 and A232 );
a13219a <=( (not A202) and a13218a );
a13223a <=( A302 and (not A299) );
a13224a <=( A298 and a13223a );
a13225a <=( a13224a and a13219a );
a13228a <=( (not A167) and A170 );
a13232a <=( (not A200) and (not A199) );
a13233a <=( A166 and a13232a );
a13234a <=( a13233a and a13228a );
a13238a <=( A234 and A232 );
a13239a <=( (not A202) and a13238a );
a13243a <=( A302 and A299 );
a13244a <=( (not A298) and a13243a );
a13245a <=( a13244a and a13239a );
a13248a <=( (not A167) and A170 );
a13252a <=( (not A200) and (not A199) );
a13253a <=( A166 and a13252a );
a13254a <=( a13253a and a13248a );
a13258a <=( A234 and A232 );
a13259a <=( (not A202) and a13258a );
a13263a <=( A269 and A266 );
a13264a <=( (not A265) and a13263a );
a13265a <=( a13264a and a13259a );
a13268a <=( (not A167) and A170 );
a13272a <=( (not A200) and (not A199) );
a13273a <=( A166 and a13272a );
a13274a <=( a13273a and a13268a );
a13278a <=( A234 and A232 );
a13279a <=( (not A202) and a13278a );
a13283a <=( A269 and (not A266) );
a13284a <=( A265 and a13283a );
a13285a <=( a13284a and a13279a );
a13288a <=( (not A167) and A170 );
a13292a <=( (not A200) and (not A199) );
a13293a <=( A166 and a13292a );
a13294a <=( a13293a and a13288a );
a13298a <=( A234 and A233 );
a13299a <=( (not A202) and a13298a );
a13303a <=( A302 and (not A299) );
a13304a <=( A298 and a13303a );
a13305a <=( a13304a and a13299a );
a13308a <=( (not A167) and A170 );
a13312a <=( (not A200) and (not A199) );
a13313a <=( A166 and a13312a );
a13314a <=( a13313a and a13308a );
a13318a <=( A234 and A233 );
a13319a <=( (not A202) and a13318a );
a13323a <=( A302 and A299 );
a13324a <=( (not A298) and a13323a );
a13325a <=( a13324a and a13319a );
a13328a <=( (not A167) and A170 );
a13332a <=( (not A200) and (not A199) );
a13333a <=( A166 and a13332a );
a13334a <=( a13333a and a13328a );
a13338a <=( A234 and A233 );
a13339a <=( (not A202) and a13338a );
a13343a <=( A269 and A266 );
a13344a <=( (not A265) and a13343a );
a13345a <=( a13344a and a13339a );
a13348a <=( (not A167) and A170 );
a13352a <=( (not A200) and (not A199) );
a13353a <=( A166 and a13352a );
a13354a <=( a13353a and a13348a );
a13358a <=( A234 and A233 );
a13359a <=( (not A202) and a13358a );
a13363a <=( A269 and (not A266) );
a13364a <=( A265 and a13363a );
a13365a <=( a13364a and a13359a );
a13368a <=( (not A167) and A170 );
a13372a <=( (not A200) and (not A199) );
a13373a <=( A166 and a13372a );
a13374a <=( a13373a and a13368a );
a13378a <=( A233 and (not A232) );
a13379a <=( (not A202) and a13378a );
a13383a <=( A300 and A299 );
a13384a <=( A236 and a13383a );
a13385a <=( a13384a and a13379a );
a13388a <=( (not A167) and A170 );
a13392a <=( (not A200) and (not A199) );
a13393a <=( A166 and a13392a );
a13394a <=( a13393a and a13388a );
a13398a <=( A233 and (not A232) );
a13399a <=( (not A202) and a13398a );
a13403a <=( A300 and A298 );
a13404a <=( A236 and a13403a );
a13405a <=( a13404a and a13399a );
a13408a <=( (not A167) and A170 );
a13412a <=( (not A200) and (not A199) );
a13413a <=( A166 and a13412a );
a13414a <=( a13413a and a13408a );
a13418a <=( A233 and (not A232) );
a13419a <=( (not A202) and a13418a );
a13423a <=( A267 and A265 );
a13424a <=( A236 and a13423a );
a13425a <=( a13424a and a13419a );
a13428a <=( (not A167) and A170 );
a13432a <=( (not A200) and (not A199) );
a13433a <=( A166 and a13432a );
a13434a <=( a13433a and a13428a );
a13438a <=( A233 and (not A232) );
a13439a <=( (not A202) and a13438a );
a13443a <=( A267 and A266 );
a13444a <=( A236 and a13443a );
a13445a <=( a13444a and a13439a );
a13448a <=( (not A167) and A170 );
a13452a <=( (not A200) and (not A199) );
a13453a <=( A166 and a13452a );
a13454a <=( a13453a and a13448a );
a13458a <=( (not A233) and A232 );
a13459a <=( (not A202) and a13458a );
a13463a <=( A300 and A299 );
a13464a <=( A236 and a13463a );
a13465a <=( a13464a and a13459a );
a13468a <=( (not A167) and A170 );
a13472a <=( (not A200) and (not A199) );
a13473a <=( A166 and a13472a );
a13474a <=( a13473a and a13468a );
a13478a <=( (not A233) and A232 );
a13479a <=( (not A202) and a13478a );
a13483a <=( A300 and A298 );
a13484a <=( A236 and a13483a );
a13485a <=( a13484a and a13479a );
a13488a <=( (not A167) and A170 );
a13492a <=( (not A200) and (not A199) );
a13493a <=( A166 and a13492a );
a13494a <=( a13493a and a13488a );
a13498a <=( (not A233) and A232 );
a13499a <=( (not A202) and a13498a );
a13503a <=( A267 and A265 );
a13504a <=( A236 and a13503a );
a13505a <=( a13504a and a13499a );
a13508a <=( (not A167) and A170 );
a13512a <=( (not A200) and (not A199) );
a13513a <=( A166 and a13512a );
a13514a <=( a13513a and a13508a );
a13518a <=( (not A233) and A232 );
a13519a <=( (not A202) and a13518a );
a13523a <=( A267 and A266 );
a13524a <=( A236 and a13523a );
a13525a <=( a13524a and a13519a );
a13528a <=( A199 and A169 );
a13532a <=( (not A202) and (not A201) );
a13533a <=( A200 and a13532a );
a13534a <=( a13533a and a13528a );
a13538a <=( A236 and A233 );
a13539a <=( (not A232) and a13538a );
a13543a <=( A302 and (not A299) );
a13544a <=( A298 and a13543a );
a13545a <=( a13544a and a13539a );
a13548a <=( A199 and A169 );
a13552a <=( (not A202) and (not A201) );
a13553a <=( A200 and a13552a );
a13554a <=( a13553a and a13548a );
a13558a <=( A236 and A233 );
a13559a <=( (not A232) and a13558a );
a13563a <=( A302 and A299 );
a13564a <=( (not A298) and a13563a );
a13565a <=( a13564a and a13559a );
a13568a <=( A199 and A169 );
a13572a <=( (not A202) and (not A201) );
a13573a <=( A200 and a13572a );
a13574a <=( a13573a and a13568a );
a13578a <=( A236 and A233 );
a13579a <=( (not A232) and a13578a );
a13583a <=( A269 and A266 );
a13584a <=( (not A265) and a13583a );
a13585a <=( a13584a and a13579a );
a13588a <=( A199 and A169 );
a13592a <=( (not A202) and (not A201) );
a13593a <=( A200 and a13592a );
a13594a <=( a13593a and a13588a );
a13598a <=( A236 and A233 );
a13599a <=( (not A232) and a13598a );
a13603a <=( A269 and (not A266) );
a13604a <=( A265 and a13603a );
a13605a <=( a13604a and a13599a );
a13608a <=( A199 and A169 );
a13612a <=( (not A202) and (not A201) );
a13613a <=( A200 and a13612a );
a13614a <=( a13613a and a13608a );
a13618a <=( A236 and (not A233) );
a13619a <=( A232 and a13618a );
a13623a <=( A302 and (not A299) );
a13624a <=( A298 and a13623a );
a13625a <=( a13624a and a13619a );
a13628a <=( A199 and A169 );
a13632a <=( (not A202) and (not A201) );
a13633a <=( A200 and a13632a );
a13634a <=( a13633a and a13628a );
a13638a <=( A236 and (not A233) );
a13639a <=( A232 and a13638a );
a13643a <=( A302 and A299 );
a13644a <=( (not A298) and a13643a );
a13645a <=( a13644a and a13639a );
a13648a <=( A199 and A169 );
a13652a <=( (not A202) and (not A201) );
a13653a <=( A200 and a13652a );
a13654a <=( a13653a and a13648a );
a13658a <=( A236 and (not A233) );
a13659a <=( A232 and a13658a );
a13663a <=( A269 and A266 );
a13664a <=( (not A265) and a13663a );
a13665a <=( a13664a and a13659a );
a13668a <=( A199 and A169 );
a13672a <=( (not A202) and (not A201) );
a13673a <=( A200 and a13672a );
a13674a <=( a13673a and a13668a );
a13678a <=( A236 and (not A233) );
a13679a <=( A232 and a13678a );
a13683a <=( A269 and (not A266) );
a13684a <=( A265 and a13683a );
a13685a <=( a13684a and a13679a );
a13689a <=( A199 and A166 );
a13690a <=( A168 and a13689a );
a13694a <=( (not A202) and (not A201) );
a13695a <=( A200 and a13694a );
a13696a <=( a13695a and a13690a );
a13700a <=( A236 and A233 );
a13701a <=( (not A232) and a13700a );
a13705a <=( A302 and (not A299) );
a13706a <=( A298 and a13705a );
a13707a <=( a13706a and a13701a );
a13711a <=( A199 and A166 );
a13712a <=( A168 and a13711a );
a13716a <=( (not A202) and (not A201) );
a13717a <=( A200 and a13716a );
a13718a <=( a13717a and a13712a );
a13722a <=( A236 and A233 );
a13723a <=( (not A232) and a13722a );
a13727a <=( A302 and A299 );
a13728a <=( (not A298) and a13727a );
a13729a <=( a13728a and a13723a );
a13733a <=( A199 and A166 );
a13734a <=( A168 and a13733a );
a13738a <=( (not A202) and (not A201) );
a13739a <=( A200 and a13738a );
a13740a <=( a13739a and a13734a );
a13744a <=( A236 and A233 );
a13745a <=( (not A232) and a13744a );
a13749a <=( A269 and A266 );
a13750a <=( (not A265) and a13749a );
a13751a <=( a13750a and a13745a );
a13755a <=( A199 and A166 );
a13756a <=( A168 and a13755a );
a13760a <=( (not A202) and (not A201) );
a13761a <=( A200 and a13760a );
a13762a <=( a13761a and a13756a );
a13766a <=( A236 and A233 );
a13767a <=( (not A232) and a13766a );
a13771a <=( A269 and (not A266) );
a13772a <=( A265 and a13771a );
a13773a <=( a13772a and a13767a );
a13777a <=( A199 and A166 );
a13778a <=( A168 and a13777a );
a13782a <=( (not A202) and (not A201) );
a13783a <=( A200 and a13782a );
a13784a <=( a13783a and a13778a );
a13788a <=( A236 and (not A233) );
a13789a <=( A232 and a13788a );
a13793a <=( A302 and (not A299) );
a13794a <=( A298 and a13793a );
a13795a <=( a13794a and a13789a );
a13799a <=( A199 and A166 );
a13800a <=( A168 and a13799a );
a13804a <=( (not A202) and (not A201) );
a13805a <=( A200 and a13804a );
a13806a <=( a13805a and a13800a );
a13810a <=( A236 and (not A233) );
a13811a <=( A232 and a13810a );
a13815a <=( A302 and A299 );
a13816a <=( (not A298) and a13815a );
a13817a <=( a13816a and a13811a );
a13821a <=( A199 and A166 );
a13822a <=( A168 and a13821a );
a13826a <=( (not A202) and (not A201) );
a13827a <=( A200 and a13826a );
a13828a <=( a13827a and a13822a );
a13832a <=( A236 and (not A233) );
a13833a <=( A232 and a13832a );
a13837a <=( A269 and A266 );
a13838a <=( (not A265) and a13837a );
a13839a <=( a13838a and a13833a );
a13843a <=( A199 and A166 );
a13844a <=( A168 and a13843a );
a13848a <=( (not A202) and (not A201) );
a13849a <=( A200 and a13848a );
a13850a <=( a13849a and a13844a );
a13854a <=( A236 and (not A233) );
a13855a <=( A232 and a13854a );
a13859a <=( A269 and (not A266) );
a13860a <=( A265 and a13859a );
a13861a <=( a13860a and a13855a );
a13865a <=( A199 and A167 );
a13866a <=( A168 and a13865a );
a13870a <=( (not A202) and (not A201) );
a13871a <=( A200 and a13870a );
a13872a <=( a13871a and a13866a );
a13876a <=( A236 and A233 );
a13877a <=( (not A232) and a13876a );
a13881a <=( A302 and (not A299) );
a13882a <=( A298 and a13881a );
a13883a <=( a13882a and a13877a );
a13887a <=( A199 and A167 );
a13888a <=( A168 and a13887a );
a13892a <=( (not A202) and (not A201) );
a13893a <=( A200 and a13892a );
a13894a <=( a13893a and a13888a );
a13898a <=( A236 and A233 );
a13899a <=( (not A232) and a13898a );
a13903a <=( A302 and A299 );
a13904a <=( (not A298) and a13903a );
a13905a <=( a13904a and a13899a );
a13909a <=( A199 and A167 );
a13910a <=( A168 and a13909a );
a13914a <=( (not A202) and (not A201) );
a13915a <=( A200 and a13914a );
a13916a <=( a13915a and a13910a );
a13920a <=( A236 and A233 );
a13921a <=( (not A232) and a13920a );
a13925a <=( A269 and A266 );
a13926a <=( (not A265) and a13925a );
a13927a <=( a13926a and a13921a );
a13931a <=( A199 and A167 );
a13932a <=( A168 and a13931a );
a13936a <=( (not A202) and (not A201) );
a13937a <=( A200 and a13936a );
a13938a <=( a13937a and a13932a );
a13942a <=( A236 and A233 );
a13943a <=( (not A232) and a13942a );
a13947a <=( A269 and (not A266) );
a13948a <=( A265 and a13947a );
a13949a <=( a13948a and a13943a );
a13953a <=( A199 and A167 );
a13954a <=( A168 and a13953a );
a13958a <=( (not A202) and (not A201) );
a13959a <=( A200 and a13958a );
a13960a <=( a13959a and a13954a );
a13964a <=( A236 and (not A233) );
a13965a <=( A232 and a13964a );
a13969a <=( A302 and (not A299) );
a13970a <=( A298 and a13969a );
a13971a <=( a13970a and a13965a );
a13975a <=( A199 and A167 );
a13976a <=( A168 and a13975a );
a13980a <=( (not A202) and (not A201) );
a13981a <=( A200 and a13980a );
a13982a <=( a13981a and a13976a );
a13986a <=( A236 and (not A233) );
a13987a <=( A232 and a13986a );
a13991a <=( A302 and A299 );
a13992a <=( (not A298) and a13991a );
a13993a <=( a13992a and a13987a );
a13997a <=( A199 and A167 );
a13998a <=( A168 and a13997a );
a14002a <=( (not A202) and (not A201) );
a14003a <=( A200 and a14002a );
a14004a <=( a14003a and a13998a );
a14008a <=( A236 and (not A233) );
a14009a <=( A232 and a14008a );
a14013a <=( A269 and A266 );
a14014a <=( (not A265) and a14013a );
a14015a <=( a14014a and a14009a );
a14019a <=( A199 and A167 );
a14020a <=( A168 and a14019a );
a14024a <=( (not A202) and (not A201) );
a14025a <=( A200 and a14024a );
a14026a <=( a14025a and a14020a );
a14030a <=( A236 and (not A233) );
a14031a <=( A232 and a14030a );
a14035a <=( A269 and (not A266) );
a14036a <=( A265 and a14035a );
a14037a <=( a14036a and a14031a );
a14041a <=( (not A166) and A167 );
a14042a <=( A170 and a14041a );
a14046a <=( (not A203) and (not A202) );
a14047a <=( (not A201) and a14046a );
a14048a <=( a14047a and a14042a );
a14052a <=( A236 and A233 );
a14053a <=( (not A232) and a14052a );
a14057a <=( A302 and (not A299) );
a14058a <=( A298 and a14057a );
a14059a <=( a14058a and a14053a );
a14063a <=( (not A166) and A167 );
a14064a <=( A170 and a14063a );
a14068a <=( (not A203) and (not A202) );
a14069a <=( (not A201) and a14068a );
a14070a <=( a14069a and a14064a );
a14074a <=( A236 and A233 );
a14075a <=( (not A232) and a14074a );
a14079a <=( A302 and A299 );
a14080a <=( (not A298) and a14079a );
a14081a <=( a14080a and a14075a );
a14085a <=( (not A166) and A167 );
a14086a <=( A170 and a14085a );
a14090a <=( (not A203) and (not A202) );
a14091a <=( (not A201) and a14090a );
a14092a <=( a14091a and a14086a );
a14096a <=( A236 and A233 );
a14097a <=( (not A232) and a14096a );
a14101a <=( A269 and A266 );
a14102a <=( (not A265) and a14101a );
a14103a <=( a14102a and a14097a );
a14107a <=( (not A166) and A167 );
a14108a <=( A170 and a14107a );
a14112a <=( (not A203) and (not A202) );
a14113a <=( (not A201) and a14112a );
a14114a <=( a14113a and a14108a );
a14118a <=( A236 and A233 );
a14119a <=( (not A232) and a14118a );
a14123a <=( A269 and (not A266) );
a14124a <=( A265 and a14123a );
a14125a <=( a14124a and a14119a );
a14129a <=( (not A166) and A167 );
a14130a <=( A170 and a14129a );
a14134a <=( (not A203) and (not A202) );
a14135a <=( (not A201) and a14134a );
a14136a <=( a14135a and a14130a );
a14140a <=( A236 and (not A233) );
a14141a <=( A232 and a14140a );
a14145a <=( A302 and (not A299) );
a14146a <=( A298 and a14145a );
a14147a <=( a14146a and a14141a );
a14151a <=( (not A166) and A167 );
a14152a <=( A170 and a14151a );
a14156a <=( (not A203) and (not A202) );
a14157a <=( (not A201) and a14156a );
a14158a <=( a14157a and a14152a );
a14162a <=( A236 and (not A233) );
a14163a <=( A232 and a14162a );
a14167a <=( A302 and A299 );
a14168a <=( (not A298) and a14167a );
a14169a <=( a14168a and a14163a );
a14173a <=( (not A166) and A167 );
a14174a <=( A170 and a14173a );
a14178a <=( (not A203) and (not A202) );
a14179a <=( (not A201) and a14178a );
a14180a <=( a14179a and a14174a );
a14184a <=( A236 and (not A233) );
a14185a <=( A232 and a14184a );
a14189a <=( A269 and A266 );
a14190a <=( (not A265) and a14189a );
a14191a <=( a14190a and a14185a );
a14195a <=( (not A166) and A167 );
a14196a <=( A170 and a14195a );
a14200a <=( (not A203) and (not A202) );
a14201a <=( (not A201) and a14200a );
a14202a <=( a14201a and a14196a );
a14206a <=( A236 and (not A233) );
a14207a <=( A232 and a14206a );
a14211a <=( A269 and (not A266) );
a14212a <=( A265 and a14211a );
a14213a <=( a14212a and a14207a );
a14217a <=( (not A166) and A167 );
a14218a <=( A170 and a14217a );
a14222a <=( (not A201) and A200 );
a14223a <=( A199 and a14222a );
a14224a <=( a14223a and a14218a );
a14228a <=( A234 and A232 );
a14229a <=( (not A202) and a14228a );
a14233a <=( A302 and (not A299) );
a14234a <=( A298 and a14233a );
a14235a <=( a14234a and a14229a );
a14239a <=( (not A166) and A167 );
a14240a <=( A170 and a14239a );
a14244a <=( (not A201) and A200 );
a14245a <=( A199 and a14244a );
a14246a <=( a14245a and a14240a );
a14250a <=( A234 and A232 );
a14251a <=( (not A202) and a14250a );
a14255a <=( A302 and A299 );
a14256a <=( (not A298) and a14255a );
a14257a <=( a14256a and a14251a );
a14261a <=( (not A166) and A167 );
a14262a <=( A170 and a14261a );
a14266a <=( (not A201) and A200 );
a14267a <=( A199 and a14266a );
a14268a <=( a14267a and a14262a );
a14272a <=( A234 and A232 );
a14273a <=( (not A202) and a14272a );
a14277a <=( A269 and A266 );
a14278a <=( (not A265) and a14277a );
a14279a <=( a14278a and a14273a );
a14283a <=( (not A166) and A167 );
a14284a <=( A170 and a14283a );
a14288a <=( (not A201) and A200 );
a14289a <=( A199 and a14288a );
a14290a <=( a14289a and a14284a );
a14294a <=( A234 and A232 );
a14295a <=( (not A202) and a14294a );
a14299a <=( A269 and (not A266) );
a14300a <=( A265 and a14299a );
a14301a <=( a14300a and a14295a );
a14305a <=( (not A166) and A167 );
a14306a <=( A170 and a14305a );
a14310a <=( (not A201) and A200 );
a14311a <=( A199 and a14310a );
a14312a <=( a14311a and a14306a );
a14316a <=( A234 and A233 );
a14317a <=( (not A202) and a14316a );
a14321a <=( A302 and (not A299) );
a14322a <=( A298 and a14321a );
a14323a <=( a14322a and a14317a );
a14327a <=( (not A166) and A167 );
a14328a <=( A170 and a14327a );
a14332a <=( (not A201) and A200 );
a14333a <=( A199 and a14332a );
a14334a <=( a14333a and a14328a );
a14338a <=( A234 and A233 );
a14339a <=( (not A202) and a14338a );
a14343a <=( A302 and A299 );
a14344a <=( (not A298) and a14343a );
a14345a <=( a14344a and a14339a );
a14349a <=( (not A166) and A167 );
a14350a <=( A170 and a14349a );
a14354a <=( (not A201) and A200 );
a14355a <=( A199 and a14354a );
a14356a <=( a14355a and a14350a );
a14360a <=( A234 and A233 );
a14361a <=( (not A202) and a14360a );
a14365a <=( A269 and A266 );
a14366a <=( (not A265) and a14365a );
a14367a <=( a14366a and a14361a );
a14371a <=( (not A166) and A167 );
a14372a <=( A170 and a14371a );
a14376a <=( (not A201) and A200 );
a14377a <=( A199 and a14376a );
a14378a <=( a14377a and a14372a );
a14382a <=( A234 and A233 );
a14383a <=( (not A202) and a14382a );
a14387a <=( A269 and (not A266) );
a14388a <=( A265 and a14387a );
a14389a <=( a14388a and a14383a );
a14393a <=( (not A166) and A167 );
a14394a <=( A170 and a14393a );
a14398a <=( (not A201) and A200 );
a14399a <=( A199 and a14398a );
a14400a <=( a14399a and a14394a );
a14404a <=( A233 and (not A232) );
a14405a <=( (not A202) and a14404a );
a14409a <=( A300 and A299 );
a14410a <=( A236 and a14409a );
a14411a <=( a14410a and a14405a );
a14415a <=( (not A166) and A167 );
a14416a <=( A170 and a14415a );
a14420a <=( (not A201) and A200 );
a14421a <=( A199 and a14420a );
a14422a <=( a14421a and a14416a );
a14426a <=( A233 and (not A232) );
a14427a <=( (not A202) and a14426a );
a14431a <=( A300 and A298 );
a14432a <=( A236 and a14431a );
a14433a <=( a14432a and a14427a );
a14437a <=( (not A166) and A167 );
a14438a <=( A170 and a14437a );
a14442a <=( (not A201) and A200 );
a14443a <=( A199 and a14442a );
a14444a <=( a14443a and a14438a );
a14448a <=( A233 and (not A232) );
a14449a <=( (not A202) and a14448a );
a14453a <=( A267 and A265 );
a14454a <=( A236 and a14453a );
a14455a <=( a14454a and a14449a );
a14459a <=( (not A166) and A167 );
a14460a <=( A170 and a14459a );
a14464a <=( (not A201) and A200 );
a14465a <=( A199 and a14464a );
a14466a <=( a14465a and a14460a );
a14470a <=( A233 and (not A232) );
a14471a <=( (not A202) and a14470a );
a14475a <=( A267 and A266 );
a14476a <=( A236 and a14475a );
a14477a <=( a14476a and a14471a );
a14481a <=( (not A166) and A167 );
a14482a <=( A170 and a14481a );
a14486a <=( (not A201) and A200 );
a14487a <=( A199 and a14486a );
a14488a <=( a14487a and a14482a );
a14492a <=( (not A233) and A232 );
a14493a <=( (not A202) and a14492a );
a14497a <=( A300 and A299 );
a14498a <=( A236 and a14497a );
a14499a <=( a14498a and a14493a );
a14503a <=( (not A166) and A167 );
a14504a <=( A170 and a14503a );
a14508a <=( (not A201) and A200 );
a14509a <=( A199 and a14508a );
a14510a <=( a14509a and a14504a );
a14514a <=( (not A233) and A232 );
a14515a <=( (not A202) and a14514a );
a14519a <=( A300 and A298 );
a14520a <=( A236 and a14519a );
a14521a <=( a14520a and a14515a );
a14525a <=( (not A166) and A167 );
a14526a <=( A170 and a14525a );
a14530a <=( (not A201) and A200 );
a14531a <=( A199 and a14530a );
a14532a <=( a14531a and a14526a );
a14536a <=( (not A233) and A232 );
a14537a <=( (not A202) and a14536a );
a14541a <=( A267 and A265 );
a14542a <=( A236 and a14541a );
a14543a <=( a14542a and a14537a );
a14547a <=( (not A166) and A167 );
a14548a <=( A170 and a14547a );
a14552a <=( (not A201) and A200 );
a14553a <=( A199 and a14552a );
a14554a <=( a14553a and a14548a );
a14558a <=( (not A233) and A232 );
a14559a <=( (not A202) and a14558a );
a14563a <=( A267 and A266 );
a14564a <=( A236 and a14563a );
a14565a <=( a14564a and a14559a );
a14569a <=( (not A166) and A167 );
a14570a <=( A170 and a14569a );
a14574a <=( (not A202) and (not A200) );
a14575a <=( (not A199) and a14574a );
a14576a <=( a14575a and a14570a );
a14580a <=( A236 and A233 );
a14581a <=( (not A232) and a14580a );
a14585a <=( A302 and (not A299) );
a14586a <=( A298 and a14585a );
a14587a <=( a14586a and a14581a );
a14591a <=( (not A166) and A167 );
a14592a <=( A170 and a14591a );
a14596a <=( (not A202) and (not A200) );
a14597a <=( (not A199) and a14596a );
a14598a <=( a14597a and a14592a );
a14602a <=( A236 and A233 );
a14603a <=( (not A232) and a14602a );
a14607a <=( A302 and A299 );
a14608a <=( (not A298) and a14607a );
a14609a <=( a14608a and a14603a );
a14613a <=( (not A166) and A167 );
a14614a <=( A170 and a14613a );
a14618a <=( (not A202) and (not A200) );
a14619a <=( (not A199) and a14618a );
a14620a <=( a14619a and a14614a );
a14624a <=( A236 and A233 );
a14625a <=( (not A232) and a14624a );
a14629a <=( A269 and A266 );
a14630a <=( (not A265) and a14629a );
a14631a <=( a14630a and a14625a );
a14635a <=( (not A166) and A167 );
a14636a <=( A170 and a14635a );
a14640a <=( (not A202) and (not A200) );
a14641a <=( (not A199) and a14640a );
a14642a <=( a14641a and a14636a );
a14646a <=( A236 and A233 );
a14647a <=( (not A232) and a14646a );
a14651a <=( A269 and (not A266) );
a14652a <=( A265 and a14651a );
a14653a <=( a14652a and a14647a );
a14657a <=( (not A166) and A167 );
a14658a <=( A170 and a14657a );
a14662a <=( (not A202) and (not A200) );
a14663a <=( (not A199) and a14662a );
a14664a <=( a14663a and a14658a );
a14668a <=( A236 and (not A233) );
a14669a <=( A232 and a14668a );
a14673a <=( A302 and (not A299) );
a14674a <=( A298 and a14673a );
a14675a <=( a14674a and a14669a );
a14679a <=( (not A166) and A167 );
a14680a <=( A170 and a14679a );
a14684a <=( (not A202) and (not A200) );
a14685a <=( (not A199) and a14684a );
a14686a <=( a14685a and a14680a );
a14690a <=( A236 and (not A233) );
a14691a <=( A232 and a14690a );
a14695a <=( A302 and A299 );
a14696a <=( (not A298) and a14695a );
a14697a <=( a14696a and a14691a );
a14701a <=( (not A166) and A167 );
a14702a <=( A170 and a14701a );
a14706a <=( (not A202) and (not A200) );
a14707a <=( (not A199) and a14706a );
a14708a <=( a14707a and a14702a );
a14712a <=( A236 and (not A233) );
a14713a <=( A232 and a14712a );
a14717a <=( A269 and A266 );
a14718a <=( (not A265) and a14717a );
a14719a <=( a14718a and a14713a );
a14723a <=( (not A166) and A167 );
a14724a <=( A170 and a14723a );
a14728a <=( (not A202) and (not A200) );
a14729a <=( (not A199) and a14728a );
a14730a <=( a14729a and a14724a );
a14734a <=( A236 and (not A233) );
a14735a <=( A232 and a14734a );
a14739a <=( A269 and (not A266) );
a14740a <=( A265 and a14739a );
a14741a <=( a14740a and a14735a );
a14745a <=( A166 and (not A167) );
a14746a <=( A170 and a14745a );
a14750a <=( (not A203) and (not A202) );
a14751a <=( (not A201) and a14750a );
a14752a <=( a14751a and a14746a );
a14756a <=( A236 and A233 );
a14757a <=( (not A232) and a14756a );
a14761a <=( A302 and (not A299) );
a14762a <=( A298 and a14761a );
a14763a <=( a14762a and a14757a );
a14767a <=( A166 and (not A167) );
a14768a <=( A170 and a14767a );
a14772a <=( (not A203) and (not A202) );
a14773a <=( (not A201) and a14772a );
a14774a <=( a14773a and a14768a );
a14778a <=( A236 and A233 );
a14779a <=( (not A232) and a14778a );
a14783a <=( A302 and A299 );
a14784a <=( (not A298) and a14783a );
a14785a <=( a14784a and a14779a );
a14789a <=( A166 and (not A167) );
a14790a <=( A170 and a14789a );
a14794a <=( (not A203) and (not A202) );
a14795a <=( (not A201) and a14794a );
a14796a <=( a14795a and a14790a );
a14800a <=( A236 and A233 );
a14801a <=( (not A232) and a14800a );
a14805a <=( A269 and A266 );
a14806a <=( (not A265) and a14805a );
a14807a <=( a14806a and a14801a );
a14811a <=( A166 and (not A167) );
a14812a <=( A170 and a14811a );
a14816a <=( (not A203) and (not A202) );
a14817a <=( (not A201) and a14816a );
a14818a <=( a14817a and a14812a );
a14822a <=( A236 and A233 );
a14823a <=( (not A232) and a14822a );
a14827a <=( A269 and (not A266) );
a14828a <=( A265 and a14827a );
a14829a <=( a14828a and a14823a );
a14833a <=( A166 and (not A167) );
a14834a <=( A170 and a14833a );
a14838a <=( (not A203) and (not A202) );
a14839a <=( (not A201) and a14838a );
a14840a <=( a14839a and a14834a );
a14844a <=( A236 and (not A233) );
a14845a <=( A232 and a14844a );
a14849a <=( A302 and (not A299) );
a14850a <=( A298 and a14849a );
a14851a <=( a14850a and a14845a );
a14855a <=( A166 and (not A167) );
a14856a <=( A170 and a14855a );
a14860a <=( (not A203) and (not A202) );
a14861a <=( (not A201) and a14860a );
a14862a <=( a14861a and a14856a );
a14866a <=( A236 and (not A233) );
a14867a <=( A232 and a14866a );
a14871a <=( A302 and A299 );
a14872a <=( (not A298) and a14871a );
a14873a <=( a14872a and a14867a );
a14877a <=( A166 and (not A167) );
a14878a <=( A170 and a14877a );
a14882a <=( (not A203) and (not A202) );
a14883a <=( (not A201) and a14882a );
a14884a <=( a14883a and a14878a );
a14888a <=( A236 and (not A233) );
a14889a <=( A232 and a14888a );
a14893a <=( A269 and A266 );
a14894a <=( (not A265) and a14893a );
a14895a <=( a14894a and a14889a );
a14899a <=( A166 and (not A167) );
a14900a <=( A170 and a14899a );
a14904a <=( (not A203) and (not A202) );
a14905a <=( (not A201) and a14904a );
a14906a <=( a14905a and a14900a );
a14910a <=( A236 and (not A233) );
a14911a <=( A232 and a14910a );
a14915a <=( A269 and (not A266) );
a14916a <=( A265 and a14915a );
a14917a <=( a14916a and a14911a );
a14921a <=( A166 and (not A167) );
a14922a <=( A170 and a14921a );
a14926a <=( (not A201) and A200 );
a14927a <=( A199 and a14926a );
a14928a <=( a14927a and a14922a );
a14932a <=( A234 and A232 );
a14933a <=( (not A202) and a14932a );
a14937a <=( A302 and (not A299) );
a14938a <=( A298 and a14937a );
a14939a <=( a14938a and a14933a );
a14943a <=( A166 and (not A167) );
a14944a <=( A170 and a14943a );
a14948a <=( (not A201) and A200 );
a14949a <=( A199 and a14948a );
a14950a <=( a14949a and a14944a );
a14954a <=( A234 and A232 );
a14955a <=( (not A202) and a14954a );
a14959a <=( A302 and A299 );
a14960a <=( (not A298) and a14959a );
a14961a <=( a14960a and a14955a );
a14965a <=( A166 and (not A167) );
a14966a <=( A170 and a14965a );
a14970a <=( (not A201) and A200 );
a14971a <=( A199 and a14970a );
a14972a <=( a14971a and a14966a );
a14976a <=( A234 and A232 );
a14977a <=( (not A202) and a14976a );
a14981a <=( A269 and A266 );
a14982a <=( (not A265) and a14981a );
a14983a <=( a14982a and a14977a );
a14987a <=( A166 and (not A167) );
a14988a <=( A170 and a14987a );
a14992a <=( (not A201) and A200 );
a14993a <=( A199 and a14992a );
a14994a <=( a14993a and a14988a );
a14998a <=( A234 and A232 );
a14999a <=( (not A202) and a14998a );
a15003a <=( A269 and (not A266) );
a15004a <=( A265 and a15003a );
a15005a <=( a15004a and a14999a );
a15009a <=( A166 and (not A167) );
a15010a <=( A170 and a15009a );
a15014a <=( (not A201) and A200 );
a15015a <=( A199 and a15014a );
a15016a <=( a15015a and a15010a );
a15020a <=( A234 and A233 );
a15021a <=( (not A202) and a15020a );
a15025a <=( A302 and (not A299) );
a15026a <=( A298 and a15025a );
a15027a <=( a15026a and a15021a );
a15031a <=( A166 and (not A167) );
a15032a <=( A170 and a15031a );
a15036a <=( (not A201) and A200 );
a15037a <=( A199 and a15036a );
a15038a <=( a15037a and a15032a );
a15042a <=( A234 and A233 );
a15043a <=( (not A202) and a15042a );
a15047a <=( A302 and A299 );
a15048a <=( (not A298) and a15047a );
a15049a <=( a15048a and a15043a );
a15053a <=( A166 and (not A167) );
a15054a <=( A170 and a15053a );
a15058a <=( (not A201) and A200 );
a15059a <=( A199 and a15058a );
a15060a <=( a15059a and a15054a );
a15064a <=( A234 and A233 );
a15065a <=( (not A202) and a15064a );
a15069a <=( A269 and A266 );
a15070a <=( (not A265) and a15069a );
a15071a <=( a15070a and a15065a );
a15075a <=( A166 and (not A167) );
a15076a <=( A170 and a15075a );
a15080a <=( (not A201) and A200 );
a15081a <=( A199 and a15080a );
a15082a <=( a15081a and a15076a );
a15086a <=( A234 and A233 );
a15087a <=( (not A202) and a15086a );
a15091a <=( A269 and (not A266) );
a15092a <=( A265 and a15091a );
a15093a <=( a15092a and a15087a );
a15097a <=( A166 and (not A167) );
a15098a <=( A170 and a15097a );
a15102a <=( (not A201) and A200 );
a15103a <=( A199 and a15102a );
a15104a <=( a15103a and a15098a );
a15108a <=( A233 and (not A232) );
a15109a <=( (not A202) and a15108a );
a15113a <=( A300 and A299 );
a15114a <=( A236 and a15113a );
a15115a <=( a15114a and a15109a );
a15119a <=( A166 and (not A167) );
a15120a <=( A170 and a15119a );
a15124a <=( (not A201) and A200 );
a15125a <=( A199 and a15124a );
a15126a <=( a15125a and a15120a );
a15130a <=( A233 and (not A232) );
a15131a <=( (not A202) and a15130a );
a15135a <=( A300 and A298 );
a15136a <=( A236 and a15135a );
a15137a <=( a15136a and a15131a );
a15141a <=( A166 and (not A167) );
a15142a <=( A170 and a15141a );
a15146a <=( (not A201) and A200 );
a15147a <=( A199 and a15146a );
a15148a <=( a15147a and a15142a );
a15152a <=( A233 and (not A232) );
a15153a <=( (not A202) and a15152a );
a15157a <=( A267 and A265 );
a15158a <=( A236 and a15157a );
a15159a <=( a15158a and a15153a );
a15163a <=( A166 and (not A167) );
a15164a <=( A170 and a15163a );
a15168a <=( (not A201) and A200 );
a15169a <=( A199 and a15168a );
a15170a <=( a15169a and a15164a );
a15174a <=( A233 and (not A232) );
a15175a <=( (not A202) and a15174a );
a15179a <=( A267 and A266 );
a15180a <=( A236 and a15179a );
a15181a <=( a15180a and a15175a );
a15185a <=( A166 and (not A167) );
a15186a <=( A170 and a15185a );
a15190a <=( (not A201) and A200 );
a15191a <=( A199 and a15190a );
a15192a <=( a15191a and a15186a );
a15196a <=( (not A233) and A232 );
a15197a <=( (not A202) and a15196a );
a15201a <=( A300 and A299 );
a15202a <=( A236 and a15201a );
a15203a <=( a15202a and a15197a );
a15207a <=( A166 and (not A167) );
a15208a <=( A170 and a15207a );
a15212a <=( (not A201) and A200 );
a15213a <=( A199 and a15212a );
a15214a <=( a15213a and a15208a );
a15218a <=( (not A233) and A232 );
a15219a <=( (not A202) and a15218a );
a15223a <=( A300 and A298 );
a15224a <=( A236 and a15223a );
a15225a <=( a15224a and a15219a );
a15229a <=( A166 and (not A167) );
a15230a <=( A170 and a15229a );
a15234a <=( (not A201) and A200 );
a15235a <=( A199 and a15234a );
a15236a <=( a15235a and a15230a );
a15240a <=( (not A233) and A232 );
a15241a <=( (not A202) and a15240a );
a15245a <=( A267 and A265 );
a15246a <=( A236 and a15245a );
a15247a <=( a15246a and a15241a );
a15251a <=( A166 and (not A167) );
a15252a <=( A170 and a15251a );
a15256a <=( (not A201) and A200 );
a15257a <=( A199 and a15256a );
a15258a <=( a15257a and a15252a );
a15262a <=( (not A233) and A232 );
a15263a <=( (not A202) and a15262a );
a15267a <=( A267 and A266 );
a15268a <=( A236 and a15267a );
a15269a <=( a15268a and a15263a );
a15273a <=( A166 and (not A167) );
a15274a <=( A170 and a15273a );
a15278a <=( (not A202) and (not A200) );
a15279a <=( (not A199) and a15278a );
a15280a <=( a15279a and a15274a );
a15284a <=( A236 and A233 );
a15285a <=( (not A232) and a15284a );
a15289a <=( A302 and (not A299) );
a15290a <=( A298 and a15289a );
a15291a <=( a15290a and a15285a );
a15295a <=( A166 and (not A167) );
a15296a <=( A170 and a15295a );
a15300a <=( (not A202) and (not A200) );
a15301a <=( (not A199) and a15300a );
a15302a <=( a15301a and a15296a );
a15306a <=( A236 and A233 );
a15307a <=( (not A232) and a15306a );
a15311a <=( A302 and A299 );
a15312a <=( (not A298) and a15311a );
a15313a <=( a15312a and a15307a );
a15317a <=( A166 and (not A167) );
a15318a <=( A170 and a15317a );
a15322a <=( (not A202) and (not A200) );
a15323a <=( (not A199) and a15322a );
a15324a <=( a15323a and a15318a );
a15328a <=( A236 and A233 );
a15329a <=( (not A232) and a15328a );
a15333a <=( A269 and A266 );
a15334a <=( (not A265) and a15333a );
a15335a <=( a15334a and a15329a );
a15339a <=( A166 and (not A167) );
a15340a <=( A170 and a15339a );
a15344a <=( (not A202) and (not A200) );
a15345a <=( (not A199) and a15344a );
a15346a <=( a15345a and a15340a );
a15350a <=( A236 and A233 );
a15351a <=( (not A232) and a15350a );
a15355a <=( A269 and (not A266) );
a15356a <=( A265 and a15355a );
a15357a <=( a15356a and a15351a );
a15361a <=( A166 and (not A167) );
a15362a <=( A170 and a15361a );
a15366a <=( (not A202) and (not A200) );
a15367a <=( (not A199) and a15366a );
a15368a <=( a15367a and a15362a );
a15372a <=( A236 and (not A233) );
a15373a <=( A232 and a15372a );
a15377a <=( A302 and (not A299) );
a15378a <=( A298 and a15377a );
a15379a <=( a15378a and a15373a );
a15383a <=( A166 and (not A167) );
a15384a <=( A170 and a15383a );
a15388a <=( (not A202) and (not A200) );
a15389a <=( (not A199) and a15388a );
a15390a <=( a15389a and a15384a );
a15394a <=( A236 and (not A233) );
a15395a <=( A232 and a15394a );
a15399a <=( A302 and A299 );
a15400a <=( (not A298) and a15399a );
a15401a <=( a15400a and a15395a );
a15405a <=( A166 and (not A167) );
a15406a <=( A170 and a15405a );
a15410a <=( (not A202) and (not A200) );
a15411a <=( (not A199) and a15410a );
a15412a <=( a15411a and a15406a );
a15416a <=( A236 and (not A233) );
a15417a <=( A232 and a15416a );
a15421a <=( A269 and A266 );
a15422a <=( (not A265) and a15421a );
a15423a <=( a15422a and a15417a );
a15427a <=( A166 and (not A167) );
a15428a <=( A170 and a15427a );
a15432a <=( (not A202) and (not A200) );
a15433a <=( (not A199) and a15432a );
a15434a <=( a15433a and a15428a );
a15438a <=( A236 and (not A233) );
a15439a <=( A232 and a15438a );
a15443a <=( A269 and (not A266) );
a15444a <=( A265 and a15443a );
a15445a <=( a15444a and a15439a );
a15449a <=( (not A166) and A167 );
a15450a <=( A170 and a15449a );
a15454a <=( (not A201) and A200 );
a15455a <=( A199 and a15454a );
a15456a <=( a15455a and a15450a );
a15460a <=( A233 and (not A232) );
a15461a <=( (not A202) and a15460a );
a15464a <=( A298 and A236 );
a15467a <=( A302 and (not A299) );
a15468a <=( a15467a and a15464a );
a15469a <=( a15468a and a15461a );
a15473a <=( (not A166) and A167 );
a15474a <=( A170 and a15473a );
a15478a <=( (not A201) and A200 );
a15479a <=( A199 and a15478a );
a15480a <=( a15479a and a15474a );
a15484a <=( A233 and (not A232) );
a15485a <=( (not A202) and a15484a );
a15488a <=( (not A298) and A236 );
a15491a <=( A302 and A299 );
a15492a <=( a15491a and a15488a );
a15493a <=( a15492a and a15485a );
a15497a <=( (not A166) and A167 );
a15498a <=( A170 and a15497a );
a15502a <=( (not A201) and A200 );
a15503a <=( A199 and a15502a );
a15504a <=( a15503a and a15498a );
a15508a <=( A233 and (not A232) );
a15509a <=( (not A202) and a15508a );
a15512a <=( (not A265) and A236 );
a15515a <=( A269 and A266 );
a15516a <=( a15515a and a15512a );
a15517a <=( a15516a and a15509a );
a15521a <=( (not A166) and A167 );
a15522a <=( A170 and a15521a );
a15526a <=( (not A201) and A200 );
a15527a <=( A199 and a15526a );
a15528a <=( a15527a and a15522a );
a15532a <=( A233 and (not A232) );
a15533a <=( (not A202) and a15532a );
a15536a <=( A265 and A236 );
a15539a <=( A269 and (not A266) );
a15540a <=( a15539a and a15536a );
a15541a <=( a15540a and a15533a );
a15545a <=( (not A166) and A167 );
a15546a <=( A170 and a15545a );
a15550a <=( (not A201) and A200 );
a15551a <=( A199 and a15550a );
a15552a <=( a15551a and a15546a );
a15556a <=( (not A233) and A232 );
a15557a <=( (not A202) and a15556a );
a15560a <=( A298 and A236 );
a15563a <=( A302 and (not A299) );
a15564a <=( a15563a and a15560a );
a15565a <=( a15564a and a15557a );
a15569a <=( (not A166) and A167 );
a15570a <=( A170 and a15569a );
a15574a <=( (not A201) and A200 );
a15575a <=( A199 and a15574a );
a15576a <=( a15575a and a15570a );
a15580a <=( (not A233) and A232 );
a15581a <=( (not A202) and a15580a );
a15584a <=( (not A298) and A236 );
a15587a <=( A302 and A299 );
a15588a <=( a15587a and a15584a );
a15589a <=( a15588a and a15581a );
a15593a <=( (not A166) and A167 );
a15594a <=( A170 and a15593a );
a15598a <=( (not A201) and A200 );
a15599a <=( A199 and a15598a );
a15600a <=( a15599a and a15594a );
a15604a <=( (not A233) and A232 );
a15605a <=( (not A202) and a15604a );
a15608a <=( (not A265) and A236 );
a15611a <=( A269 and A266 );
a15612a <=( a15611a and a15608a );
a15613a <=( a15612a and a15605a );
a15617a <=( (not A166) and A167 );
a15618a <=( A170 and a15617a );
a15622a <=( (not A201) and A200 );
a15623a <=( A199 and a15622a );
a15624a <=( a15623a and a15618a );
a15628a <=( (not A233) and A232 );
a15629a <=( (not A202) and a15628a );
a15632a <=( A265 and A236 );
a15635a <=( A269 and (not A266) );
a15636a <=( a15635a and a15632a );
a15637a <=( a15636a and a15629a );
a15641a <=( A166 and (not A167) );
a15642a <=( A170 and a15641a );
a15646a <=( (not A201) and A200 );
a15647a <=( A199 and a15646a );
a15648a <=( a15647a and a15642a );
a15652a <=( A233 and (not A232) );
a15653a <=( (not A202) and a15652a );
a15656a <=( A298 and A236 );
a15659a <=( A302 and (not A299) );
a15660a <=( a15659a and a15656a );
a15661a <=( a15660a and a15653a );
a15665a <=( A166 and (not A167) );
a15666a <=( A170 and a15665a );
a15670a <=( (not A201) and A200 );
a15671a <=( A199 and a15670a );
a15672a <=( a15671a and a15666a );
a15676a <=( A233 and (not A232) );
a15677a <=( (not A202) and a15676a );
a15680a <=( (not A298) and A236 );
a15683a <=( A302 and A299 );
a15684a <=( a15683a and a15680a );
a15685a <=( a15684a and a15677a );
a15689a <=( A166 and (not A167) );
a15690a <=( A170 and a15689a );
a15694a <=( (not A201) and A200 );
a15695a <=( A199 and a15694a );
a15696a <=( a15695a and a15690a );
a15700a <=( A233 and (not A232) );
a15701a <=( (not A202) and a15700a );
a15704a <=( (not A265) and A236 );
a15707a <=( A269 and A266 );
a15708a <=( a15707a and a15704a );
a15709a <=( a15708a and a15701a );
a15713a <=( A166 and (not A167) );
a15714a <=( A170 and a15713a );
a15718a <=( (not A201) and A200 );
a15719a <=( A199 and a15718a );
a15720a <=( a15719a and a15714a );
a15724a <=( A233 and (not A232) );
a15725a <=( (not A202) and a15724a );
a15728a <=( A265 and A236 );
a15731a <=( A269 and (not A266) );
a15732a <=( a15731a and a15728a );
a15733a <=( a15732a and a15725a );
a15737a <=( A166 and (not A167) );
a15738a <=( A170 and a15737a );
a15742a <=( (not A201) and A200 );
a15743a <=( A199 and a15742a );
a15744a <=( a15743a and a15738a );
a15748a <=( (not A233) and A232 );
a15749a <=( (not A202) and a15748a );
a15752a <=( A298 and A236 );
a15755a <=( A302 and (not A299) );
a15756a <=( a15755a and a15752a );
a15757a <=( a15756a and a15749a );
a15761a <=( A166 and (not A167) );
a15762a <=( A170 and a15761a );
a15766a <=( (not A201) and A200 );
a15767a <=( A199 and a15766a );
a15768a <=( a15767a and a15762a );
a15772a <=( (not A233) and A232 );
a15773a <=( (not A202) and a15772a );
a15776a <=( (not A298) and A236 );
a15779a <=( A302 and A299 );
a15780a <=( a15779a and a15776a );
a15781a <=( a15780a and a15773a );
a15785a <=( A166 and (not A167) );
a15786a <=( A170 and a15785a );
a15790a <=( (not A201) and A200 );
a15791a <=( A199 and a15790a );
a15792a <=( a15791a and a15786a );
a15796a <=( (not A233) and A232 );
a15797a <=( (not A202) and a15796a );
a15800a <=( (not A265) and A236 );
a15803a <=( A269 and A266 );
a15804a <=( a15803a and a15800a );
a15805a <=( a15804a and a15797a );
a15809a <=( A166 and (not A167) );
a15810a <=( A170 and a15809a );
a15814a <=( (not A201) and A200 );
a15815a <=( A199 and a15814a );
a15816a <=( a15815a and a15810a );
a15820a <=( (not A233) and A232 );
a15821a <=( (not A202) and a15820a );
a15824a <=( A265 and A236 );
a15827a <=( A269 and (not A266) );
a15828a <=( a15827a and a15824a );
a15829a <=( a15828a and a15821a );
end x25_12x_behav;
| gpl-3.0 | c406e1d715995b1f4aa9ce8bc501e951 | 0.620197 | 2.105923 | false | false | false | false |
mkotormus/G3_OrchestraConductorDemo | src/ov7670_marker_tracker_use/ov7670_marker_tracker_use.srcs/sources_1/ipshared/xilinx.com/microblaze_v9_3/7b6e2d75/hdl/vhdl/microblaze_types_pkg_body.vhd | 1 | 24,030 | `protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2014"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
dNChxB/JzkYo3u3RQEv2mprOSD5rPwq7SVEwasyeiPDNSbmayDFEWq+klKlZOicL3WQuxswYfk0G
KqlLMdQq5g==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
ZM6lVOCS1DRhDX/HAdK4ZpxOK25isAo50OITlm6Hq+9plD1+6iLypmdpX8tmsIpZXNK3lG7zzbcN
jj2y7mWa7BOzE/9v/aAZD92GKrcuQCJMhNANJzcJV0D7bUqoiNrG6ajLpOaqNn9a2LclTaKEknCZ
dop4rY5kaivNHwplC2k=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2014_03", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
RrbzbRKs+f/j9wPoTY8gE8+gtEKPQDe/9+DTQlboJlS0MCWnxVzXUSg66zXkP6gQ3SLBf1gDJPnX
bM/MgXQfLq4+oOTCHAUB6Ron5rweXzedmLosFHH8bawf8rn5TnYm+F4t/uE4Pe6K8T9MY+W9bQEE
MqpQKJp1EyPfue3kPc7padtMEwrbGAnsL4LKbO2uECV1WqzDB62Fxtc77MYzE4Xi/nYVSWzFWcCn
V5+Ze3HeOnarT5eZMsZGy6QKSPmQ9wKOZ8PLhmjEJE1x2oFZ2sx8BHyDvRp6X0a1YfyaUu9gJz+y
ZlcU8ckSsmkqCf+h+trUmJifA9HpO0gqhabMVw==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
RajeJdLdHfhazj1D31XMTek3Er1meC/wrLBoPYGHSsPAhcWwR7IlYYoj1ql/z1gU5aUIeXujppmt
9X1HiJUVVIq4YSLCrUlnpfTCYyN4ZyBOGEw7bMKh6B6X5V/qHoADLwRaG0dwkIDMvEZGx2qHnG0E
A4hi8Rs7hkHlKnTmCJY=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
qygT/zeTh9G3vvMCPGWn5C1kFMtUj2i/j8KMiSudGmiNYR9XjtHfUtgUoxIZOM9WnVOn/KblTm3C
7f849zCGEdr8rlX6qZRoMukK+efBiQMHqmOT4FVGmYKK9cjkA2/f6rHprXkTWrq1dvTTJt5T6vYC
RTWk70BLnuO0BjzSFWUhTRJcavhbZWlnzoVdB9TuGzSoXSHRB59qjvxSe+zmMYzb3swIDC9I7Qbi
enK6+y7Ecm61SL+MED6XMklM/oVQ8mSCpy9HYF+qskbZGV3Vs2QFLjB5MMvY5nM+YNhOTM6UwcbJ
dIJXz88VkBNVufPClhpHjCI6L8bOq9mFxYStEQ==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 16048)
`protect data_block
9/PPSEXxOtNzP531rPQnoqhx/jd0rIfBooVkOQM/fM/p6TFuIH1xOHMGdJ7ZWHO2cYXzDqzuRvPX
cUkudxPaummfDYgINXyyF20mIvEkKO3xtwFlPqdd1Q2SCTTUTe9PZ/caaeE77vuGXbxe0xr/LHcX
T1IonFnkGTxW+N1MMLCqlK9SSS/IyDeq2EHEZBWLf9Dh97+bYb37LopNVf+Srq8ON+WhCFLz2U9+
EJ68ojSeJbR1r7+D2hb3kB/T36q+OXkV+yplYSMseQUhV9POao7YO9/SrIxQ1NGEM8B2MJZ6qXEi
fmIFTYC/Ls0lfs6n/kpkiOv69cE/WWpvH8trFF2K6gFAwGELfb7X+c2YTMreZK5bX/RHtZkmiqzp
CIMwklC/v5hgYdlEsLugd4IhjTE+XdssUWNyWNYD+47QiY/JL8HAL1KsaSLYsFGHwwZI9Z0rlEok
5eXmv4gEjk/3c+pgm/GDdLqR57/9LZbCZY8glR7Y8OUf4JyWS1lJg4HDIjsgqHTTdIR0PJF16emd
cKQd5mTy1f8Xs64e/ETcKjaIFYN17wjGIB6bHOEOGmo0V1+FtOqGAsOhUUhDhsFREAIejHIf7vh/
Qe30NS2Z2OE4r4eUckkeNNmXnfxlDBKfMFJyy7QKJxTZ+hRAHiypva3VrYozSQlZbDE7KAaaR9M6
3rCKlXVhuioOswhE4h/JBZfsaPga7rxfXOuuwmpEbq2nmFJ4EojfygkSIthsFs76Av4OIIJsbjO3
kGzHS2EPjc7Pr8qJqZQA13ZZFLVjgJqzKf8ivE+ZrAtaokTQWm+bpkrxEVUdL4WCdg4cpUs/tp+W
PzgmTHmiPWCFutsfM9wQc8C57uH4JtV1rmcfKmsHt3zdQdG0ZFH5oEk2X8HdfjE0sd8sCVpfQxtS
7OaemvUkg1Lthx8NIYLUoY+6eXkAqo7jwhq+rjy0FHKwhFOyyUbxb+VCv2TZ6rkPy6+8Gg8oFiei
NcaPKC0+C+qRrnMbDYd7CxVKBGwoA+oMocb/yCEormWShNHs7mQQtCHKft9mj55gFAiSE01lHs/g
VZLeEae2BPVPWjZMnBiSpX+/8FrXZh29toM+kQ0m+rMdM+LXrm5+hjhnBOaPCisJqVoheiJMyxHB
XJ8Ppy4axmK/2fnwybV6pj51JD9nlHbCL5Gbu6DVGuC16ur5Hb/DA28ownew2VO32cqpvGpIXLeB
NDPHaUsX+OVWS1dc8yzTwb78tThVJ4rykiKaxPuA2StVcLwZkARgz8pAU6/wE9XIhaA3UvJtCF7S
7+bIvojUlgUOS1XzsP6N0/Zr+o6szyabyMobMN6R6uXZLAP7KGlqZJGxj2/uz4/qdswTsLUiLl7s
P3bc1O9fZE/wRRCr7CE7VXuqTthH/h8bJVtrmoTkHJX7BlKK1M9VqiPhW4XkqBDCp0NUWBSVHKr7
xewAT7l2Lbb5fLKl9OaKnSS7iTHM4Gf/N/IAMd/O8w/m/i2ruEJcVsJKLesaoo9ElIrrVFZ3P5EL
Hrj9QgcdgIvyBJsRNRXlmLItzcXcmzoE4l1IIZtDtPKdT3d2JZa2swV9VeAmFZ9HOIRgFY4P1F/k
sVnSVA8byKKRcJ6C5AcMIxH+k/7LnnF+Bn8BrATi2CovKYBZYhNMAUKeCEyw8y42tCXmoK7KYmrg
muM8ZZ9C0iZ13vk1S9An/UDzGZDVrRRIo2SZdSyzRETRiUIFufQ8FEBg+dkcNqkrCVGb5+fO0HnU
16eMzuUUy0lnCCWMFGCv1mh8bW541puLlpiDiWSbL7F2EYAJPkZz0h9kw5SconX3CeBbGaQaTvMy
gR9lw/nEsCgthkcmO9VB7qjgvcHcC/cF4iM752dpaGxurzqQsNYft0D/7bwCszODshctxQpfiXka
9JlJ8/1J0uN0+eKWBTD/2ya7zOgAwiHdA/TKW/Fofq4+Jnhbv2x6hx44bZnB/OScjbRiu62is4JV
K/ek81fhAJ0L/OvNa+joQJY0sy72NJXR6g3nnKrzRCPSG2QEf08pS+H4LY3YF+STRJia+bJsJfti
8uakuypAX7rTwiEiAbz6hyqNl4MYHtlt6rOZJ6VE6FJXW1s/XQBAKXaR3p2kU+IpCp8abLwwsSsb
f8vfvxXFhl8onEq7GvFjpQoK0jQmxg+xhzrlzqPqBFzhlIzAtHsQbEyt56R7NFdH0NXR3UPgAGfk
MJ0IugTHxiBuJ52AsXTmjH8Py+BNYYVS2XSF7+wxuXObK4grephaU9oIygWDT8XzhgQENh6yn0hj
FBzbaazrtuU4I5tocHPYXISmfAEnHXaOL898bqzQWtw2fmOXEg5NJKL6xM/ZsQvgO2aWpR+W2LM4
j7qIudOKZxvP5j9vPEb47NhEgefT5iCBxKauhqhB2W2Relm2O/l5q+9vInEfhvmU5yTcY9eBaW7q
vD0mr2riujymBWjmFuKq7WY3IN66Q2A9dX1UenA7H3uqMZrUw9O6W49kxc7lA7VVLs6NzSxqSF42
8N9p7TW1dYiA3cTs4jvQvsv91TQE/z46fapBs3RwHOaFwCAmUKUgaxQZEK7vktXaE7SKr2K9xmkg
mrMszfuKMi5XVS860RXVPBVMIoDmO8mqMxNqts978FAxGFt3VeHaRy6eQztscfadXxgYU2AyzL02
n4rUwBB+oyKTqy0PbXvbATcM7u7N8wTwvj5dsnowEL4ABGmvlR0HsVedF3wnnh6xDvK3wBfIzliI
D1NYdLnWM1YeQu6OmfIDXxcThRqBCmFBzfQ7JJ8RfnVUMvZwffnjhgYVceesVYCJ+/V1qf04mMdn
ky2Hn5SgM2XUIxJDNeZCj0sWFV8yBDPXOMhBhXXvtK2TafyVLf+o03K4MN5PgIlye42VFcPSaJFX
fnB6C6YnvAdW5tRDKTKNnuobaNeWIkAf8QvbCzRPfABIvW95HPIUaiNy+ce7w0ZSgTdKGduITkG6
lcPwJfoDK3Sj+7tng2Q/t3nlChwv/eQdZBcUDVVPdNoOBpDnJDYu95dmHDW5k3/vzg75ReGUs4eJ
uzVyRvHucqNs+z4CDiDz/BiT359uz+cWndCR5BN0Hg09odLvjDfeeQQ4yfg7Yl7CgCQgNOmTQcpM
zwKButuy5KgT4hw6R4SPk0EVMwUIihx4STC2UTquCy8U+fcWQ8dVZQs7E705xGO8UUJQBpukubKD
ORqnY4vWuiErFl+OuHxl29C5Wz2tpvbAXq5cc61AsfN8QBhsh+2IxxiCGjzJGKLU8MDr8snFKa0v
pI6XJWrg/th8ebUndrzFXU4oHtKhIwSuxH9FLBRHoqssEgcIeZiQvPv5HRuv+hn2jAcskhoDWP24
vaLjvZE2nQz7lZsFMPKvaaQpGcxOXXkK07smuRuXDAG+ccnMcry3rD0nw4sdJbYItgBp0syRkwI3
gh/e2OKXnI9aqLo00ZLlFslHR/31wn+n1lnOCwxmA+csKHvcAMs8CjlEcWNNEBgaYJD8rp5GiT0h
2t1gT1rx7hJ/zlE2afQ8sl0cNF8i+D9JoIrKTe4Mp0lLKb0/0DCZ5k04l5G0p4dL6Wr3qzej0Glw
aJlfUBFrdkUYPsBPZfPvnICvCdyl4AxIlbfZhoBWFFe3wm+tEuiz1scrgPcM4VirAa6jIRmnpZYh
0+yK665Z968/LzJ1raCn8s+36vTvscH7NbOyvW1dBnhtLVI/Jf+bdSGG80N5XrbGIpJOqy6pL4r8
QJX9yqwnGiSzVgvLWTbJ/eLfiXWiZp7ohbozw/ms7jCtIckQcyDAktCw8psUz3VUdwlYh9Ip+J99
l4hwzEsiClguQ/7kQg2WvO+3cGhWq44uz+ahv8Rk+R7Z+WmqCHzVkrioT4hHU2t3Ry2/MqL030cZ
3h98u8fgTBgIviV23FVXyHNDptoMtwHMSZW3cclQdi+kKGZCYIkmAT4a8y/c/Tm9LuFpgO5P9at9
RRRMA2HgsBWx/rYr+R/GjlXETxHEoLHw5WXZdXo/MwmLFv6NiQXHMkANmA8nRvB9qLuhLr5P0Cdl
AMg+vrtGyHvrBEQiqyYCHIyLKVy3Uuyptk/vmubbb+3DZbj0ybIyVYt4h9G9MinEPTJb1Qlu+K9p
+461AHOI2DJsgwhlC0Js6ctMMrWYF/wyatrS6gZuus+0YXmm9T830aN7IAA8lgmWMXjGH40cOy2b
E1v9ls3jjjd4U3FfV3lNZENjUxLF4i67UBMdJhjK/y9OC4mEbS1jOWpDs+G5G4s0boZR8Af1kS0O
C0+vD/46j43sv2p3IPReU0ZQwt3nX55Sj5UPPZ/bhbEUSba6syb7eHNzTUJsHHrmilT1jAGeKyWc
7ozE0egs7wO2OVK41D0RLfHCSIGZ51KJcJ0N2Pcd44ZEFYduTx7vNbuTJKy3KzQLv7JJAiArSPo4
vHrOSjbd+pfC8p3qBeKwfeJMrpY67l2DjrL7w2zkjhqT91sxd3BuDGgUDcq9Q5612QRQCjOHQc7Z
pTyLS1Yis+v64WiyLFr0MXoa+HBZ6HyLZ8i9Low+0uCj/LTNb0L7CzxrItDQIKzvjMaLKJGa2NlS
UYuqCI39Dzibf2/bLx7sKmGnm53hHooJZIOVv3/SAzhjd0u+XYHVhMRH3RT2wa/1QfJg+e1kT1sJ
co27wo3hdZh/H0bPqlz6EbYmhefPKckRIqbGC9UA7VXmz5p+VWcWmuUPr5Q97Lyv3Yzm4E1UJUG2
AsmM9H/KM890r0aol3Cyz7wN77jZOvebbHQoEkHKkTIE/MmHmDGE7cPFlQI5pXYK6R2C4xNzhXpy
fN/DsF+1gCMJupSAT2oVhaDDJeiozIfPKAWdWT90RcqVNI5N/FRSqdcbUxhD8kW11yNSAU23pIhO
8mdVZ95x/MUW2S24VVDIIV78XR1mnZwpVeUbx1Di7GUCZf4FW5tXXlalTB2X+sj32xmpv1WBVqaa
i9JFkZ6gBn4UQQyo+wG14V9ru1W/2HJ5Mv+JZO6KUcclN7fULymfTxOFKyrf+hy+oMEzKZ6lxFlp
im4TUnCMS6DpZNjvITJrz9t+vJG3kKb9SGaHJk6H/75M38L94QfzkeMlf/UyiVPa4QhXTuxLjKqw
Lo06zL7BdpNZ/GHuG/iSQjx/wanpc0AU3HFvF8k07drHWf5Q+E3g4Z1mvqPzfEY4afiA/+sijqXN
PU3Q/KziZoKkMILRlsaqSD557M26p6yJUJ/vHXAbjZFCkDObewSQsP/bF09SQCM8W5lFM6o7IZhZ
fmx+s1cwzFwlS5Zq5WQJQTE8vlpW8g3z6CuYAIhl+VQOQjIe5nqJzcpJlmyBp00Ksj/GFWSlYK+p
5/C8yO8r8L1O64no/F8bSvueFNqcOiyUj8jmYQxmsPf3SkChcbJK6U3Y5TlVmb0Vd6SbxOCCviwk
xVj27j/Lsx5URd1g3UMlLXPTSWbyTuak/UM3QL5UclY6s1N/RqBwj/Hp4FkvJGR9JUO7hOoG0Z7/
UvBWsiTsWnrJjTBjwVD5gGLQbzQ9i5GA2BeVKBsvqh7Qblc+ZAaj9vezzvBYPkHbzaBESyhT4nUL
VYgYB0u8x+y/GgziMrk80BX7dajy6lzMbzV5Do3Z/6LVyU14UMKflay0Mu+xdMChtvNfxx2djGz+
OPg2PwGS2+jQdCDpN371bGkm8n7T0SKz5YUFlYzD3b5/bDwK/qQOALKdscWWrY1O23Cm+el7aPoe
QdeIFNFGOxaLJ9qgbX/GioMetWFLjqmi5Kco6Z7tg+EBGOmrzPUMUxxEv8XzFq23fzAfpzs6r55E
xDzSzEiTEaSRnfYHEgHfyE1/DS7P8r8Xy2+5WfhrzhhPACi9PAoDRctP9iRRafGP4MnRjS3ee0zw
wO4zwMp6DwcesL2q22JO/OuSGZ3kCNLChtJ57S8QT8GHcQMtB2ujGYFlYdilhTPm7HtjABWaSX3d
I/BYg1htuDaUPTGk3zJsHlRDPqXIvtxwC0NAXnP4u+b8gGfgF/aWm+Dzk/ekxAB+9UkNHlu41QmJ
+tj4YRSMPYM7h3A6sgti4oth0jREhvsIBtwi2yqU1vApGa353CcQzT3RvBvM4Dx1mWbuW3mLSIEw
FyQkseR45Ne12pzCZ9q1cJrlJZQCBaiksDXnojIp0gbVqFlH3yec3MAgYklYfdARHZA/DMMxdM6L
UF6uPB7Q6T54mW6nXmrhb/44eUWGc6odYxSDLuIhnXBEFIMsSRDZKqjdGdYtdlMoX6/NmOY+RwI9
LS4iNuN+VG0QhBTcqL3Wa0xhYk5n8FrdNW1CgTuQzZ4zGkyKVdlohvN5PA0kzlCUjGYFEn1Gud2r
/dWggk96vjl0TGYV76WELhLUxQ2YjimhMriK6G+UAwfXpgE6jOvAjqSvjOT0rT64hwLUDHtTmVEq
SNjQIC22uFOd0jbRMi5ScJtJ8lA+rrjovtvVxxGje3/d1bJFx5hARTM4JzJrn1rzxE6VBnzn6REd
xawerH1gkeuShg+UiePuDU0LKsOiHAbedNVTUHSlWbmhtV2AVJ7POSqaXgDPCyKGpkYvOxIOkE1w
lQuEn3rP14shdy5FPMIjo84VKFVfyVJvPV771Lzn1kRg3zm0q4XlvXpvSO1aeAJ5VrhSWygLhDa9
SpTby69xXus3XQufnYwEDtyEp8rMeqyEvTD52XWw1B4s1oHwl6wucPNNZ1vFxafrve8SLdW77s5X
EV3az3oMZHjHaTtTNASoseO+A9kCkxnQHV3k8GmJGDZ/K8+u8FBCc9pEdctee0dwgx5X+0slLCwO
n5d8ATzM1fUpZ1fFHjOSFdhcSDmc4ff9upY06NCQhift3MmW8t/vTJq7eIeajcH9LAlpcpnOm3MU
2aHuFInW1nVgWNub0AbAoZfW1qCMY/7dJNO1a8PVpdagPecQ5aL/VreqTXk8hcZ2KMfV0o7el5Vu
TyuJ6RC4YXVK51uqfUxNpfiE8y9yQt3wNYGq9qJVBzW6o7J9qIZWnzbqGZ4gq5z0XpnCAVWdWXnQ
EbQjOY9bIEIMdyFv3TSDYoMXQZx3adnv/EQzLyvdji2Xu0TCV8wqRhskvrzVUKXFPU/fl/FZF/52
7KrE3hDw366iKo3TfBYpOT1yiXiOLmH/y+tEFyGd7qL8pBMp/O6MDDR+dCk/M5LcCvS09DcQbt+k
SaGvVDkbXc/KPj1QGTpWJEZFHlVdGBpK6icz15L/gkrpsO8m0xxplPmCq4sZCZuo4lXavm+nwLDN
r17C/KWOJ1Pi7RQcJrjxE0arP8PfO72XWT+VmIeD8teMn05OzLWFJGoKIz6tO2QevjHpwwrzzDoY
oAaLiePKhlh60sWBIfEuceZ5Gke+FWg+eVUXjDzI9PTz1bHJ7X98ByxC1jAIw7rtoWqqgnY3aenD
ZByIyv2nM6Zce9G/5C8JZKIN/+xEPEjR3f790+qzRBlw1e8RH1MJPsW33CPaB2kVhPJKOoYHxzaQ
VCPjBR5EyVfQjUydYor6Be4WF1tOybg2ufdtvKvlvKWVH4dbqm2KIrN7MqNGcNvg+aXD0b1o2+X6
M3HR5DS7WqatRXWnoff1kZh6dhD/A5d+eQX449Wgx8RTiAPilj9zw3uFTMPcAHkd3Y9SXla3iPT4
HvrROmhoWZvuhG2bHqgptKN9Hau0LggwIrWxPcCWzxT8TzZmXsmlduGx1FZGNQkQIScjRTwiA5n8
3YkgyaP2olELqo7JGThZ+qPOFSC5Mp9R9716exTrumbsOh1Wdyyzcjb9RzCW/2MOKmzyObZLNhs6
KhwmC2GeZNiM3c6KteJMJg0qLEcTgFmrcqBKaU/X2K7xZObmqSCAxR+YF5oQut2Hq+EbvHgIj4U5
j0J8N/BM9qSasvuvIJZNPfbPKwJ4QPn6QXGxzVgJmdbkUtk2ZRQ2HE/N0zrpjmWnHgZokNKpPHxV
Hss5wVCNPUppMHGDpP34TWvE3dFcoLVoj2+HQdlNk7WAGZZHv6v8YWsBwsN6ElsgGFx+moVy9k/n
87BgzUQniir9Amsrp4X1QbPtQ9pU4Da2rpAr1zFCoX2d4YJwpDLCdTmdDBR59XGauZEI6DKVIMoI
J5Ii/IAC9dxvO1jkGsni6d1DKnhi2Mx+MxtGdsmXAT3DUL8VXBk6MnUgSw8I9YtnFfUlrGJ5K8Xb
uqerijegwfWkT3jdofkJy5NHZPFB5wpbjgeU+T24674CXqBWfWHYhu7h7yS06+cLExissZwlFhaf
FkbRsMf/YfNhqEufiD4n6yAR8FF0fr7bFlqISh0kxnbpljCaL7vOPeNAdXiL5tAqN2Yi1r57GCpb
XXrhJSSMXXCgl8cyCBwh/FGDuHvnSln1qyzDPEVgmGHXFiabIna+TrrS2g3Shjc3nQbUscKMTcKX
HPoiFsFtUGh5tYVCQ1/w6czTnBPiwa/LgLvBpBJp6HGmjtC4dFb9AiscbVvB0np22ESjSFp3KYEi
PArFErFDS8Oa96SYPqroeZw+jNQpH8pxkSIrfFGP0xbba5DeImAlZrjcNrAVV5eu2FgjBaQ7tzWB
Jh0lQkfQawm31WwkHoBFupwdu0h9w2wGYmtov3nQkiMYfcp9TEZZyGO3H7mC0Z9OXX8zmUC7/ZhM
1FZrOWkn/Sl+cF0r280kM71qqJVMDfdC7qACzST0bm+UyFWwHXKoxbZDIJQr2x3ExZWcL5W4NoJX
XhZCr0Abg7JTNN8p5ZxsNjdAugDPaHZlj9D0gPTF1usmL1ubfoxU6vYRbfKZlYXive1Qll6IkBwO
3tryxTUkVWG7yJHtOhYxaTISeEDAZcr07Ow3JrIX0+agoOjuPIrIBd/xSm+gkHQ0ewtIuEGAoRXY
GvKqxFILyyezaa4MkGxII50Qr3wdSoH6eu4yvsCAxTYtdR5SDGRRafiwalgkr5yl+QRx1fNKWYXq
gSPKGLEVPz0vxSbgP5QAdSqKGA2quW5fjuZZwepN/9YxAuYt37XJECoIGR6JUomNJF8wiiEY+d33
bLDa+odTIhYv1GSeopXHr49aDLDmk6CaqJIAt6+lQXIPUE6Jgeeh7kVSILfBCB0lF9CfGumm19hF
eWFg3wbs9mK70w0zH35JPHpUkr0ddY9mZvD9mnI2yhv5/FN10dVu/rpWFWA4cPyGcr8UYLx4XYIS
fCYaJzPk8GgZWTuRW5WBAImjpna/Oq/fRCce+EJ6ynPUzq//2vMvNvV3DWu5Wbs9M9mfqPB+xJPR
ZoZsjtWvrtiWlvlml41XK+4fkcgSNxJzgFawMFRs7CPfSG9D56FDBeg1eolXoEtPZO05oySAKMPn
Gk7/Sae9EX0bh7sZPhIu2BL3CtLtol0bKpHo3Xn8R2oJvG1/xrd24r3pbHX8ZX/hBT2m6BhPgpDS
//xPOwQF5fPXffC9ORZHjCHe+NKD11v2eIjiFp5ajMkJyqExBz5F3wb8ZfGLp8AncXrhefdjXGZb
VCOQxLQ3ymJMgBe9mddzDXJfwwGIjup5bfIVVqjxvQ7oRm6eUpbumF+Gia3axnZzgNwNODjjqSB0
LGNB++Byj0tcvIVyMToG550J3vfMzTi/E1rqj16gcHrizswMlVVmiKbqd12WcPDDmi+2rMPjOHWh
GHzuZYjHkGcVX+YVnsouyM0u3I1nwaObdGfhgV/TGhHgeaICP1IiHcP0DS5wTFlX5PFg0dHKXoCW
CuhA/5rDB9E52rkGBnXVoVDMiktaTL4Yeq9fiURDeEWh1NScuKSJ29mwpFtk/lK5Ny6FFsmGdL8I
e+STmpA9Z9hAjoX9YNODL2MHOWGl0B6pRcW2/wnCCq225q4PSjkqULD39uU57R5whNbTbnKTpKZX
9V3eiztYtIv4B/MK8h6hObLbZDYezHPdeXtSoj/uWs4IYTQkGxqSIKk22qn509iLwiGrZ8xj6Ddz
IB3nALMm6ix7RCC2SScKS8SJF7Ord0eFpJMIuZ2C8dHHpWzFpcjQm2L+OtSHfKiDA721mk0QYAM6
9yJVoAURK/Zzrp4c582pgwVvtpAsEyztSZBgJZWfYWChwRkdGzFGey8Yp2koSW4QAFSnLqiEl5nq
cwDOQOQ3vXb4UOEqjkmb5oV5skD9JiZQUXkNpCjMk3zZYotjnAne48+H7SY9lLDKp7/K9hrD9u6P
C7s16xGvuQWoepE1vKEE4VaO2nv3/99RzA/+6i9JoTmlw1byC7chEl/4GEMvqBaKuU/DDnh+g8TF
mE+mez3OOrZsqNbKWdvI8xCS63mt1UjW/x7IdYVwwkxZ8i07LsInnDSvPKwiwHG5DQ8UiVMe1sdl
T2uxDAp6saTPO79dIdqKmfhRGfjDEBk7YXASE8qywrVydkFGFwMuQBpzbVc/8aTm85ID+riUFFFu
WfI1b1lEEw9bv6pp4ZtRtH4rJCUVf8LWLy0/c09DLnjLaNoakj2qVsT6wQdYzvfQZpZFXgJ+/0QE
RgWsiLNB2oTDGAIpwk3XPtS4uaJwmsNV+9zBui9yphiN+STp5yHf71yIykul3WvT6qQiRSPEg6hu
l0v/xgR1Xs+YXc0XrWxiRP5f6M0f13VjB4zoCHznMq+tRy6LxacrZGey4+UYNRGwxKTqJLNffQOx
Xxh6dTnNojoL/69Ftu7ex/G+rwDel6+OYW3ckmuE4kBj5P+jtTwpO/sMMgstt0e1gWIsKzNBtITp
YlDmFvwTaNGWmGwiPO/uE9jLduvhnWnM5+wcOnkEDuHSDMdjdt8FmbrQCvwnVepdAbJUB+qCLqxN
n5InmuaOEge63QW3j313np9rCssFSM+PAJIzJ5VgkUm1E4arNVTF3ZSq4kQJo0sBM0X9Zlsy/jVx
bBmutn96jzFAp2ZJk3zpjuP9gG9nN26UehqwZVgzW3U3vgG83md+dc4LvPh55z/jyO3lhfxrfeFL
f6NhI0p63lwMVU7icQZp2o25yLQByVQF1N/tIyhTm9QqPBB+SgaKB6AylXhNonYqkZSsnXu+Hrqy
nUdtRvsET7ZuzDZbtW+IgE6ej5rDb9W7DEDvifG1/WFZL1vXxUyz9OVgbBLR1CU2FNC/AscfGMCZ
aYE67MNdFClerDzlhSJK6qtoX2Aqu9BIgTxWa8nY5N488FYQdETJ092Ibzgib8G/LldBA1TcPaYZ
OQ/DOZ+6ko8QKeecCWSHUMHcSV/02zNGvNqWo6ZRVyE6uyONwNLoKEkrcC3Ar1NWiK3OPZBFaERx
5US0yXS52TVkpmIf7Uy6pU0ZdoKBz8KPP+lqa/kc7R1rGbTdytJA+chCYBi8zeHOfIFcfuHwOFQm
Iv0qRsEf9Pwc/Ntf6oqlM+9qSvOTcqjVyx5iAQrGcTEe+pGLXRvSSK8WUbAMad6MaSFtaEOXhTZ9
tUnTdPgh0VVMQpup2WgDfzgriwzn2JL7rFHU3g1bcOeB0uj1W3rsAI7fm3u7uffkJ9Kjv5lh+0P7
WV7oSjlQedOuJ86NsokJ7uGhdnHKC7dyB5ZulHbYR093CfyhEaMaQm1ZQiDo/aGqmMDT2cUXNqYp
MM8pJ2kblFEJTZcu9laWBmJKTe8f4pvSnsZrUxVk+3wZfa4JTUYAx3hyT2sBbBdSUaPOt6t3gnBZ
Q4nTt7z0aM+051fUgiBhZJnT57v6Mph6q3aNbokA+z/4U8SMbxUAra4jW7CpeZP/Eg+3+n3zJGrm
mm9VKLCAEQZPf1l8KcDOG45ZP1HYXFUaK0Fgbo9VAqntUi5p380e6JohVA00GVwDThCB0SibWa6m
0dov2fgsQShXcECeMb7S60bP8YiQV5P3j0STmdea1IlL6BTu6fuTGMnl6JgfymA3QJLZxUATSbZV
n9ZmT0YEALFRwEQXf6RpW2lxlgdenz64sUeBR0t9Lq/yWtk8qUDaeDS0+DRWDDlek5MbmroN4Lc3
4Ff5HoGsd3cgDk8I9/r869whCMZ4VPEzfgOQ3sH4fryS7uXZklPEkV3sPIWxDuOEJR9mNmcVWyqF
OIaVUJy4q0Su0kfXCrMUpld/DK1IgCAU9oXz/Cud3aVz7xq3E73dKlKnrPBDfxxf5Uyk7ubESn0B
ewuz78K399ALYNkGZDskR9GOyANZ9KeQeTVA5kye0FSrGBIjWWUyI5KUepdeg3oHqZBx5MmtOG8w
7qhTX4jOY2QG3vDMrd0t25s3HXEcrK4cW1v0NFk6+XPybA1jtUICHsHLnJqaGt6sFNniZC2GwPDI
8Q991/+cXn1fhhC6sjtDMVrxjMNFNpWNRm7AZyeSgzyaSQPLE0iYAePmUymSX4oeuH6C6tV5VzYq
ZmYPgrJ+8nwgMg9WLb69EfT0QbdofnVD4KaHFNXcK6KvHZ8pmM+rxirHRraIJAxARyPorCBNwP5M
S9/Roh8++WJdS5Zx0Ti7nArJMROiXr4w303HOn2J/PSH/Gb+1HMHBFETT6xqBQmFOeTU+J+3TN3c
jS+7Aefqr7U/Sp6oQrph3U7EwceEZ7qUFk1AeL4d27JoATWoFZ2O5SPj/wd11lzAv5FqjN29xL7W
FYz+L8e7QJYGafAfBil272G74EpHlawdLqokl+oaDyPYm8FYexSFN8NKm9ycMRkUP8Cb/p7iThBY
42+bNX11kQxA09ZsiwqELJuK5cuHebhnQN+lM+Hsryp6zZfAVk8vIPgDx5+JlfxFztTMkxvSzD2i
VFKKHIc+/cNa+TlcC70k6oOEZh7460WzNTyxASJJz1Gbba8ls57ETsk+e+WjpuWeSBgtYLGZ4T60
wcUzapoB/OGzSCn1KrCh9Md+lxwqxW+OnG0oEeilQBuO8VfxOnJSLnjezrDLqWmS3cKPLdf/Xg2R
2VgBPljQ3bVMkN6M5oUsp1U4+RAxLd7OpZViELaWxfrvEiPJ2TItnIw2GW8zTabO6TrxdT4iEYVY
1i2KsGuLjv0VUdsVPwIMHcRf1rhrR7EzYL5E2CINdX0FKtUdNc5pIZL71/ruGBlAx1a258/pLIRk
OcSM6LXxlqieWbKfsP3saZNkvbDH7d5OR6DJ0PfUkbaPPWNR555lDzfxCTSWDPu/nLUEUDh5jIJ5
5JNwTwqFhQa1k1VrtLoBiSxLaTHYjreGuK86JME5GgHsiR3HgRhoXmCBARcvZPWmbap0jfqvuwZD
2WqxGO8ZmUiJOob0VTZgieJnp3h6ce8TIvL6ToyXnatSwUgaGHe1pLaFkxWt88r50CdMnZrWlGWh
nByiVC9svCwiNaRgW6Jlqh78M4NksF8zCbxfGoSqlJqedtbpbMgy9YiJix8c9ZthCtsiX/y3L/XU
CDAcIRyz2BLCLSt7+0G+x5PwzVtnCy2TXkKUG4yuJGJaK5vLXt2xb1Qu4Xnw5N+GKvLP4D22Vbnj
5/s3NkvBfLuMdYQ7ktXOHDuyRWd3RkYMBfJGk1Eh/O2313MAcDObObvbtlUFxQUlILssIdejR0a+
yMxA1trKeyyqsx+hOprFgdfdCsgV4nYfhQbBfCjGT2TzLgl6iOtUeaYhJF4xRAhVWdSxkn1I4xqQ
5c0AYGK4Laj/T5flQojseCpngJvYyxGUJg0Rdsr9S998SUN2V21UNoE1lmsqsjxdGfcGgGsU7h4G
mwO7Tol7K6+FS/CmLausa4cuiqrymf/HNCdrvr4q04TSJArCqoH29XF78ErEq3R7AC/XFLuG1EZG
Mt6fVK8l+J+uS8+NAJJ29mLSzDSFPm14xFSS6YFCcR/LTHjBEE7cISuOKiDzHCIQUsXTCO6PC/uK
WfdwGC5C3jHzRi63lq+XLJdwDvHhn4qF9wO10JwfPsF+BH9/3dhT4LEeZI7hGx2ieUcySedAhJKt
asP+zbOEeuEo3bDzE7aaPHV6HfOImd/c/XiitPjiYhFyFZsFbq9M7ZkGHvsimGaCMJ8lW5gsZ7uP
XBYmx/S9Fqxg2psUZg9OvjgIuNVrl3uU2IYxX781i9IoeKJfGYpESrGepenfA8momU7OzjHUe2Av
nU3PDenlD3b1RAuTrCTPWJHpAYqNn6YrVeh5slhxmFVQTUlQxYH+hoVYiYmRZ0PT4F5Tv/sQl+nf
NIXvC6DGrleVnbV7q0uo8slrdV2kFF8gQGq+JKb7N8SDDXmvNJwPu22ADCX6XImpbiUmpFha3y6G
qZt+BYjB0k3h/y3HJutw9oomB6BOgqYgcZM/2hrSHyQ6+/1SAIAFJskIv1KeoJqojZR7K/vdm4c7
bBYQCKkLfNb9eoLJ2jB5/DnER1VJ7s0F8rLQwGNOCyFajmFKqpzm7av7I76sqcP9vW/ZxFwi34wo
CMR6fAWZ7FYCUHOsczWs+Dq8st8Z9yB8OYSExMc20KZTmXKIVzd3OVslQ4heXjypRKy5M5BXi5Rs
r/mB6QpPhO9HJLVZTg1kJ7a8yux5+pkCPGUD0E4Xoson02dYBsYGBnBOrF7u+1REuyJFElc2n4+k
gJWV1rBzlFA70aCM5v6i4WPE09NppcC55PzRHCbF1aeCJ7+WOmy5CgJEifZU0ExYWKzLVRxD3jfc
qIW/Baor4R13UGNSFIfSjRZ7GEmtU5VcJpSzbqhYd2nRZTvgDJMBkSvE7M55t5sjOXQUIG8+qeTx
ZOsDSShCo/7TaNam4SxhWC3QyPfMCKt/4htM9xS3LIXlyqykyuJtTDNkUYC0GSAz2uK2OPIggrbg
0Zf9//8Y6M8UPHfl2MuXRFuPgg7tf8xOZKQuFwfe+41NxbIzLs8GaOfdF3g6HhV4Rn2gmnh51iE0
ayg9TjfPzQxSQhBwzQa3mH1HdLwAQgkPE3YF2+TjNSdPNm9QFlFxu2UyzzhZThhxHNhsGCgp/3yJ
y8MChgUcbo4Sk6pbEC2i0eDk8vkKcmXSV14F5e0UqUkYTIoVlAwqLl5h3DcMOV8sUGxmZUG6o7CG
B1HoZx4nsoYpTSN99hglDnVm0WaeaZx+EPV30LlM5wvLVUCt1DLN+mRlmGcwa23hEQ1C8Pejw04Z
XMT4mPouKcsasEegYQLANAoUECRo8gw5whJw0tgWeABBfcNH7LCvATGpjmEhE4qwhtoHQ1KCti9J
arSLEwBgmidl8d/naKvXfVxHXrxvQPz6jHhdFm9Eu1jUMN4yONPL3yrjFssMnfwRD2rs/a0HgCYl
8HYmej3jUpfqDTJhcJjwd8UsIxvIoBE0Mhdhu0t92zxnThsggfWSYG+pY/ZU6wHtuonMd3MBKHZP
CsiBHWFR4+XnzJUSDt8Fl+B5835lD9jm5FqckoPY5ImZA1fZzrsJ3iWMu133Dr17z6XjHcBVoHcK
FQcG90vUUI68uf1zKKwtJC548XkBakl/8Qy61swSPtWP5rSEvcoT8UXWyyFkBw5K/CXymJLgMfp9
049jbpuRo9gj8GOu04u7MzW2uUmrJDCdVfyf3p+6HWLK9gqsX2oO1B/lc8i/55HUxPgmXrpWpPYC
w2UfY422Sl6Iy+Dyl6ULvfHpAQekTNAcj3sasehESGQld075Y5BtEVAUOs6Y0KPCnO1Dp5mIAleW
D5m3Xg4Y8tsaVQU0WErOP9G2R7LgTSGv6flfqOw8SnTXUNWhoz8HrFf57yRjDm+V8AG2OCm6tOIn
sIYmtUnQ3py38UhoiSfxcDm8R0DhYqYm8nACZTpgvsClNd/BgHfMlhhj1d84mx+LrNsoSDRj4Lkw
P+hE7Q7DhPpG3bl82izRfGYBur9AoLBwa6vYDvC5MwqVKC3DXYmx91wBVnn4MyTdJo0bBBD12/I9
MuZSkiTRePRFjHH9FZUFIBdUPctC8Pc2RPP9rYeHvxK4SeeS8JTs/XXNL0sYXtvRUFykTc5MonEn
ZwCchfQ23GLb3kz44MT8vWyLU1FLlUl5hSovS1D0pjIw4BLNj2UwkHk12wPBDJuHZ8j/6l4yVKqm
0/leOazljcdGeJYzho8RZnLH9q+0iNlegt94CWsqRie1ds4kzn9BdbOdmRtOynXpTjmk4DCo6cMU
h+VcIB6ivrFLO6nHV1Mm+HYKFJ4nb5LzkdUvJhdnTaOW3HKJfvfBP5Omc6RuuBnwyAurW61Op+3v
bcwSUOWMuZXjwhcpwnGecQKgWr/PkZRrwzyH5i4lUDD/78+il3znO5MGfgm2XxYnciItvE6JjPZY
X4H10rNm9KUH6SoOoDQWuAk2pmrbUqrRM8CJZcWNrPKNX5JOcRqtmaawdQSblCyC7b5kY8orNFlv
QaOIyoMCReFkB7kzj0wOlFl0f7vlPjRNcGmL+ZFSBWdjESCNJjvOKDa4bcTHuA71lGUnMj6kz7gy
io+WWlujtqQE26W0OYzorxoHKJuIjbGXL1Qt2jXMjv2IaLVsl4l2RuEJNzGMT5z8pDX7YVHyLcpw
t1LbOgmPaeMBDhf1BKffzhKeppCCqo+jSM8EEN3oDgYk1FFlA5dyGXOHBsH2+4I8V89kD1x9tCPP
otEWclSCIgEaI8v3sgYeEmicSdoScIsFp6Ty4rtdg9/EFep0HQ3HeBCmraKASH/N9zYCdjHyDCc6
q6h6rrBxCjqsEeqqSNUSnRGSakliiOqSgBVNViGkwU2Wnr+4cv9ltDWa+Li9Q74ORqoOEmhqsLfC
ZnzPB7zp9FkNRDElkriqALta+Oe1rj+m1HTXZTu2Ig326OfhqF6rsl9PWLWTTZr5Otpw7VPR08VT
dVLB/S7TosUPGqNh53s2KE0RX9iLfGX2hVn1s3UM8hcpYO0M8kDZdpBfLZHOpJwWe/E5lVkKv3mO
MnYi1aCymgoznPKSlqVmM2F9sH6/3qfkiwgpKfCofd+/0GZEPzGPyBwIRfneLsuSMC35I4us70MY
FlJrj6cR2VHWRzkttM6wmTP9FC8wwjOM+ZXNHAf8rHyiI/e1l8vekPBssjdAexthTrbOwj1FL/+C
nEg82I1Wn+bB3MFgv1Vj2EET3cEIcWmip3NpllWaOnQYzNWBFNMdG5sn6PKmTjncnSzHwArNF+uO
Btg6TovCvN+In4TJNdi3+7wuF4ZxOeE7s+ZpVl8bePtNeeTmkvWrh+6wM8qUc01p2xAH2REWPgaW
FJ4wWerqCIdvG6PhErUAvwtazMFemh5XueUSvjw3XZaScnrh040CmqDiP9PRollyVF1uCqkcPM09
UCrwQHeaauC91wTjNVvVa1hjCyn5u+iRGd/DvyQW0hLXdRlTS4s7MRWqpm8FT3S7XGn3efAA9u4X
4+5PUgd2x9o1zLXUc+ySE3zRyV4A6jXUnjg2hgYSlLIE2m17kcQuDC4nPlRSfeA+O2Xn91XqJQVr
FXPPEscuR0hCZVD1MVshpBu8TIXCfTZPJ56e9lw0O0RhD4+mX0f1NUI8NW3FQ+hoAHN90cD0YZIF
IHQc5OLiAZNmBI5YM9kpLXKQ0VO+CU3MLXK9BfFU8w08wcS1PfSh5eXhExmL5BRTPaFosPvcSDc1
ntuHmSSq++wYfrPvMy3v3WVTnCUe0HsC3MuxSoz2DTPAt16YyHNII8rn6pU3bwFkmA1vkIsKBOLV
q8CJvzKZhzHAuFBGguH9h3ffBZXvREOnbEbtGIppaTxzrPsiKf9Gs6qqy+fkITiuZqvXdPgzGpTW
mDHB+QMmtIHgrjQ61kES9hy9hpJoJ1fvFwOl+E/tAJ4mMWuWzmjZHo55jdGgXpcfxjm7zrwjUXnC
t6DkD3u6k8apcRy1kYvUm0KB8xcEY2pq6Ykqxh5oTjG6PEjVTf2irdHPTRqASet7r4/FzIklyRFL
QMj6VbBkfyxXp5+q+AKCd0g0KDdbaLeepuBhbZ/xFpPfCTX2cX0y4FdfunIN2dmUj6ia8WHwNDrR
PyrcVu+F2jo3NHqt/ql+vfNzVE4kb+/RVZ1mvxS+O9Kr30MCsKAoJTx/ej73N/28wrRIPJutnhXr
BFrvoIhfiiYOFwCiEx+rMbyy+y5gAg2k3N1XZ8O229pi1BGMRA01DxjLe0m779I2bac0h5pYAbc7
U1kI53dy9IrbAnV8lrUs1I4IJzTy+xCKm+OT1GzL7ioqdKJKl3znawlyM4SeXB0GJA1jqzt1MKNV
MMpfv+wvRZjhWB2hSbwIvuVukhuUfvzBxFgwh5kWstu1Il1fjsenSbqv14lz6AouPwkQw5AE6PRo
EiDZMpM1ujX9Up1CiWH1l7SvanwFicOD8tkb1aVpEQEJw5zM23Ahavi4go29twJQdG/zTD+sidkV
keFvsJyC4KZTEJbG0fLtEU65DsjSE6aFb0isuP2qDXZKSz8ZKPhrVYNEK0cB2Alc9ITQg1j/f+7W
e/9MNkcsAFZmzZEuJs4aGtkmHhZcq3xuJoQJg45k5MwOPSg9lWktPtTBBi3GwV+dQpRK7dNjMQKn
Muh53uEoLidpfauBrUHnkFWcGVPzWyA4MMoq6BX62DiXNyGa3zeEu4mCB2SeSlwedV7//zQp+mfZ
/lqdk/4MkHX77gkiyklbNy96BPzqjp0sRN8/fmFikZjs2uIfBkWYoD9mKQPhLJJIudpSBOWYpizi
1rAou96ja/6zfa6KwWN0dy7n7c11PNNc3dqGNBX3Ih88cJObfDS1KgPOne3gdin0kZvxPY2V2sqt
eDKTlxKZJGAYtJyF8WycbsO1hKvX3APZwNaCZP+yauXsVjRgzxrxXlFSuRyQhN6cXwaCqqfRk8th
ck6IjHLgpOltVlqd1majlGyEVseEDogi0hk63hIGXdp3iasRW7HPSC+3gqp8hjGM9lc4kR0JkxqK
GvbLdHZrOFhJW6XzT8BlktO52zXyleqO2E4exewjJFLZZHa8fXaoZagKZMU4chyJ6WNYUFBOAY82
x8kJ0bb9ONio+rTITmFKzzBXOBtUoTelqRKK4nDpThp/Kl8YVC1I3vvSCCUUDAJ1ZcBBdl3EdUSM
zb0w5LvcFW5S9hKmmPJUHrEjzoiLKK8d52UUhGKzY5MfrUfP9DXTBT6cVuPkgd3VLvTjokmVQK5X
phsOOiWtAjWXx6JWs6RniLmh2S+zelvLiSX/I3TXPNETTh9Uxua5Z0kQn+e5d3KByk9QDLG7elPA
6fd4J4DiJ4hlEkWmB3aWkV8FxTxfZjj/O8CKIqdQo+WCnRtSSTAaQ7qKAekb4KmwR/dLtYQlCYrL
souvdAga1GXr0BRdMmZHz/5QczPPFEgSy7psL7lXcqTlDQ2Xcj/u77N6gWhU1rwwAPceuo5Dkk0L
vwCbKx44fWN1OWxRGku1kR6j6e+zIWpLxHqmjvaEdtgaNMcxAEzwF9wRyX9saM1RCZkyEFupEWnH
Oa3HwKszYT2MnBbDBVnWG2/rSTfn0VwjHhxXXvOkSxG36SS+3zrDBfvEegJBrE6jVVbnk5scx9bu
L1lM1ey4voGXtMRWts4MqVMusoRZxrgqgfdqMcikcgW2R2rxxw8yDIeUrYxsDmNILxPRa1m4BeXw
anu8AuYqt0RPpL2jwGADLjawKDwySk5lytZtB8YCfyZDr/63TWmayiF1aHaBIU9deyFJ0Kx7ymwF
1yjUOpJiWi8t3yVoEDpWxtdoJhOzR9pVZbX1qZwvVwuONYSz/I4xB95DCCnzO71A5UBmgyzOcZzg
XiO2M+7IJJ6+3KVe+z54lsPGDH9+BhAk61cOSmZT9pRQH2UEb3Fb/COPh+britTksALcVg48C0y7
zThrh82BjvbZNZ+L2wwTeSH5e2YuSGVZqJMgPrXuJ39wG+QaTCeZ7qnt1xBWMM1Ao5uziafEA6bb
qu5QLoFUob/obYTFmeFVRA45I8uckf6PvWn5f1dd1Pls0+LfwaUEXuv6KcV3CRE/XB+QNiPqFNCg
kvWM215L4FWzxhsMqgPn9B9IEZYqu5fBjKPLvB7+7DnrS+Bz/2/k7SYQyocGGfEYn8DDRPO4veq2
cpqi7L/gQ40cIZUig+074FS+PoWVAWIsb6KSQaTmpk7tKbfPWukxA33msOmRaXTbyMrAShooTWf8
QwRODMp0g09dCJYeVljS4YD+Gkkyuk69g9bg37YWziQ139JRHQXFhowQGo+kg91a3/cM4MfwUZwc
QljGwSyEv5ZXOq2ELkh+Ci+7hzhqN90p6mu55zmClZEg2RFulaimAZLVTRjpng3ZJMevh+Tv9AhZ
DHrFX/iAd1f7zFI6E2zl08D8xtPZL7DiLvnwfNjBI1Q9giHX6++L+kJ1PCDmygMq2VqaomriOL8B
a6h2rAcG+VMdK5HtRkuV2h9APC+ZOmMWLe37SzdTJnTurA8cyInK5LN+s4TLgjL72k9VRaxsqktg
VibX1h2Hg2IBv2D1bnh6KaG1ciMw9F/U+ht40n+SsG+f9g83rWbvrHaaCrqZ7WMZi3dIvOxOsaHB
aW7fGdNrPOMD7iIOMSORKq8gAnNofsXC/Vo5gVPzlq79TLUYoujW18QQ8feBcikJH4Kb0oo35XGB
q2lhDZe1K7HsGcKML2B0SXFxJkW3PIsr0bUj71QTbXI8t/N85/UHbni/gwSwjlnaN7ZMMtWcTSaG
OJdWG9YUo1dJS/FjlZ40R+SKklbfJ2HopiWRJJuos0Nc09327xBR6f5L3XA68IjbgM8d/zSz+zFM
nTEllsaxw4l8JYRFxbtG7Pt3vv8dMuqiUAT79I+/9lB3fSlhgISrKZwKHWlMwPN0E5e5Qca+KnFc
fJ0eSmvKZmhbxnUTiUL9yViSv5tVg3hyIp5JWYsTA/6+TTwJ/py/n1bgN8lSwVpOPbGMvPq/wVt0
2KAGknX9526gZRhgww93dNyb8fB8Qvx9HswN9vfY0BFb1teyYzmpcH+VlxrpJcQqIu+eBW7yjPo3
pOME8zcnyprC30LFJr7lZsC3SWhr2mY3L7XZaAhO7v1D81mzGTehFZ+N4mt9t12V2TKRKuXxl39E
lz1JRVpstt51RNGM1CUrWsImNGm1HieqUNTrzZ6dlL4fT7A3HYh6Ju+bFWUv+gSQPb2a2eqQUbRA
TFC8ZEYH67Dq0PqhjHRhXRgeZxnawIrFw84NQ5AYwIBpdlEl2FUL/CPEDsEoBvvlD5QZe3zNDa8T
9CrJnV86eo4wvbKhnjD/1Z1jmhDA6auDD0FHJKWi/jECOm7RBh3mjjJeSjHKuCvoEWa056yTrJi2
FRmPbmRvGfmrHfkocPi8zNHqMKgfM7zvD5UQ5CtwiHj0674vd5UDCvIJ5Bdr2h+nNmgCKnwsxZW8
cXAluEo84/ee+RmpLAGHPp8Al7gTcqcj1YOIZE6BLR03cNUHy/0L1gBs2lbbTyhKWtYlP/AolD0Y
s+k0KHAHP1+BMrlARBtV51feeqOYeK+R64Z7vGT9njGmgoqV8593PZSh2yeUoAI39T5P7JkiK738
WPeu/mBNcjc2iPEDzet9hYh0RR6atpg/mrGeCMdUf9lCQGeb+PkDqEk+eQRPV49EZlFCwtRvDYcy
kI5T+ClR2Ln7XUx2sBuUpD7ueUJOkIiBgzZ48p7EXnOJV34gQi0bmh50vBVJ9/2XYoErgq9U9wu0
cwt9e8qL7jVTxrtAuqCioYbqcc2uzKiyk1/ZrCJrbg==
`protect end_protected
| apache-2.0 | d071ef596331c16db06a149e29a96e27 | 0.942572 | 1.838843 | false | false | false | false |
jc38x/X38-02FO16 | benchmarks/LEKO_LEKU/leku/LEKU-CD'/25_7.vhd | 1 | 230,987 | Library IEEE;
use IEEE.std_logic_1164.all;
entity x25_7x is
Port (
A302,A301,A300,A299,A298,A269,A268,A267,A266,A265,A236,A235,A234,A233,A232,A203,A202,A201,A200,A199,A166,A167,A168,A169,A170: in std_logic;
A108: buffer std_logic
);
end x25_7x;
architecture x25_7x_behav of x25_7x is
signal a1a,a2a,a3a,a4a,a5a,a6a,a7a,a8a,a9a,a10a,a11a,a12a,a13a,a14a,a15a,a16a,a17a,a18a,a19a,a20a,a21a,a22a,a23a,a24a,a25a,a26a,a27a,a28a,a29a,a30a,a31a,a32a,a33a,a34a,a35a,a36a,a37a,a38a,a39a,a40a,a41a,a42a,a43a,a44a,a45a,a46a,a47a,a48a,a49a,a50a,a51a,a52a,a53a,a54a,a55a,a56a,a57a,a58a,a59a,a60a,a61a,a62a,a63a,a64a,a65a,a66a,a67a,a68a,a69a,a70a,a71a,a72a,a73a,a74a,a75a,a76a,a77a,a78a,a79a,a80a,a81a,a82a,a83a,a84a,a85a,a86a,a87a,a88a,a89a,a90a,a91a,a92a,a93a,a94a,a95a,a96a,a97a,a98a,a99a,a100a,a101a,a102a,a103a,a104a,a105a,a106a,a107a,a108a,a109a,a110a,a111a,a112a,a113a,a114a,a115a,a116a,a117a,a118a,a119a,a120a,a121a,a122a,a123a,a124a,a125a,a126a,a127a,a128a,a129a,a130a,a131a,a132a,a133a,a134a,a135a,a136a,a137a,a138a,a139a,a140a,a141a,a142a,a143a,a144a,a145a,a146a,a147a,a148a,a149a,a150a,a151a,a152a,a153a,a154a,a155a,a156a,a157a,a158a,a159a,a160a,a161a,a162a,a163a,a164a,a165a,a166a,a167a,a168a,a169a,a170a,a171a,a172a,a173a,a174a,a175a,a176a,a177a,a178a,a179a,a180a,a181a,a182a,a183a,a184a,a185a,a186a,a187a,a188a,a189a,a190a,a191a,a192a,a193a,a194a,a195a,a196a,a197a,a198a,a199a,a200a,a201a,a202a,a203a,a204a,a205a,a206a,a207a,a208a,a209a,a210a,a211a,a212a,a213a,a214a,a215a,a216a,a217a,a218a,a219a,a220a,a221a,a222a,a223a,a224a,a225a,a226a,a227a,a228a,a229a,a230a,a231a,a232a,a233a,a234a,a235a,a236a,a237a,a238a,a239a,a240a,a241a,a242a,a243a,a244a,a245a,a246a,a247a,a248a,a249a,a250a,a251a,a252a,a253a,a254a,a255a,a256a,a257a,a258a,a259a,a260a,a261a,a262a,a263a,a264a,a265a,a266a,a267a,a268a,a269a,a270a,a271a,a272a,a273a,a274a,a275a,a276a,a277a,a278a,a279a,a280a,a281a,a282a,a283a,a284a,a285a,a286a,a287a,a288a,a289a,a290a,a291a,a292a,a293a,a294a,a295a,a296a,a297a,a298a,a299a,a300a,a301a,a302a,a303a,a304a,a305a,a306a,a307a,a308a,a309a,a310a,a311a,a312a,a313a,a314a,a315a,a316a,a317a,a318a,a319a,a320a,a321a,a322a,a323a,a324a,a325a,a326a,a327a,a328a,a329a,a330a,a331a,a332a,a333a,a334a,a335a,a336a,a337a,a338a,a339a,a340a,a341a,a342a,a343a,a344a,a345a,a346a,a347a,a348a,a349a,a350a,a351a,a352a,a353a,a354a,a355a,a356a,a357a,a358a,a359a,a360a,a361a,a362a,a363a,a364a,a365a,a366a,a367a,a368a,a369a,a370a,a371a,a372a,a373a,a374a,a375a,a376a,a377a,a378a,a379a,a380a,a381a,a382a,a383a,a384a,a385a,a386a,a387a,a388a,a389a,a390a,a391a,a392a,a393a,a394a,a395a,a396a,a397a,a398a,a399a,a400a,a401a,a402a,a403a,a404a,a405a,a406a,a407a,a408a,a409a,a410a,a411a,a412a,a413a,a414a,a415a,a416a,a417a,a418a,a419a,a420a,a421a,a422a,a423a,a424a,a425a,a426a,a427a,a428a,a429a,a430a,a431a,a432a,a433a,a434a,a435a,a436a,a437a,a438a,a439a,a440a,a441a,a442a,a443a,a444a,a445a,a446a,a447a,a448a,a449a,a450a,a451a,a452a,a453a,a454a,a455a,a456a,a460a,a461a,a464a,a467a,a468a,a469a,a473a,a474a,a477a,a480a,a481a,a482a,a483a,a487a,a488a,a491a,a494a,a495a,a496a,a500a,a501a,a504a,a507a,a508a,a509a,a510a,a511a,a515a,a516a,a519a,a522a,a523a,a524a,a528a,a529a,a532a,a535a,a536a,a537a,a538a,a542a,a543a,a546a,a549a,a550a,a551a,a554a,a557a,a558a,a561a,a564a,a565a,a566a,a567a,a568a,a569a,a573a,a574a,a577a,a580a,a581a,a582a,a586a,a587a,a590a,a593a,a594a,a595a,a596a,a600a,a601a,a604a,a607a,a608a,a609a,a613a,a614a,a617a,a620a,a621a,a622a,a623a,a624a,a628a,a629a,a632a,a635a,a636a,a637a,a641a,a642a,a645a,a648a,a649a,a650a,a651a,a655a,a656a,a659a,a662a,a663a,a664a,a667a,a670a,a671a,a674a,a677a,a678a,a679a,a680a,a681a,a682a,a683a,a687a,a688a,a691a,a694a,a695a,a696a,a700a,a701a,a704a,a707a,a708a,a709a,a710a,a714a,a715a,a718a,a721a,a722a,a723a,a727a,a728a,a731a,a734a,a735a,a736a,a737a,a738a,a742a,a743a,a746a,a749a,a750a,a751a,a755a,a756a,a759a,a762a,a763a,a764a,a765a,a769a,a770a,a773a,a776a,a777a,a778a,a781a,a784a,a785a,a788a,a791a,a792a,a793a,a794a,a795a,a796a,a800a,a801a,a804a,a807a,a808a,a809a,a813a,a814a,a817a,a820a,a821a,a822a,a823a,a827a,a828a,a831a,a834a,a835a,a836a,a840a,a841a,a844a,a847a,a848a,a849a,a850a,a851a,a855a,a856a,a859a,a862a,a863a,a864a,a868a,a869a,a872a,a875a,a876a,a877a,a878a,a882a,a883a,a886a,a889a,a890a,a891a,a894a,a897a,a898a,a901a,a904a,a905a,a906a,a907a,a908a,a909a,a910a,a911a,a915a,a916a,a919a,a922a,a923a,a924a,a928a,a929a,a932a,a935a,a936a,a937a,a938a,a942a,a943a,a946a,a949a,a950a,a951a,a955a,a956a,a959a,a962a,a963a,a964a,a965a,a966a,a970a,a971a,a974a,a977a,a978a,a979a,a983a,a984a,a987a,a990a,a991a,a992a,a993a,a997a,a998a,a1001a,a1004a,a1005a,a1006a,a1009a,a1012a,a1013a,a1016a,a1019a,a1020a,a1021a,a1022a,a1023a,a1024a,a1028a,a1029a,a1032a,a1035a,a1036a,a1037a,a1041a,a1042a,a1045a,a1048a,a1049a,a1050a,a1051a,a1055a,a1056a,a1059a,a1062a,a1063a,a1064a,a1068a,a1069a,a1072a,a1075a,a1076a,a1077a,a1078a,a1079a,a1083a,a1084a,a1087a,a1090a,a1091a,a1092a,a1096a,a1097a,a1100a,a1103a,a1104a,a1105a,a1106a,a1110a,a1111a,a1114a,a1117a,a1118a,a1119a,a1122a,a1125a,a1126a,a1129a,a1132a,a1133a,a1134a,a1135a,a1136a,a1137a,a1138a,a1142a,a1143a,a1146a,a1149a,a1150a,a1151a,a1155a,a1156a,a1159a,a1162a,a1163a,a1164a,a1165a,a1169a,a1170a,a1173a,a1176a,a1177a,a1178a,a1182a,a1183a,a1186a,a1189a,a1190a,a1191a,a1192a,a1193a,a1197a,a1198a,a1201a,a1204a,a1205a,a1206a,a1210a,a1211a,a1214a,a1217a,a1218a,a1219a,a1220a,a1224a,a1225a,a1228a,a1231a,a1232a,a1233a,a1236a,a1239a,a1240a,a1243a,a1246a,a1247a,a1248a,a1249a,a1250a,a1251a,a1255a,a1256a,a1259a,a1262a,a1263a,a1264a,a1268a,a1269a,a1272a,a1275a,a1276a,a1277a,a1278a,a1282a,a1283a,a1286a,a1289a,a1290a,a1291a,a1295a,a1296a,a1299a,a1302a,a1303a,a1304a,a1305a,a1306a,a1310a,a1311a,a1314a,a1317a,a1318a,a1319a,a1323a,a1324a,a1327a,a1330a,a1331a,a1332a,a1333a,a1337a,a1338a,a1341a,a1344a,a1345a,a1346a,a1349a,a1352a,a1353a,a1356a,a1359a,a1360a,a1361a,a1362a,a1363a,a1364a,a1365a,a1366a,a1369a,a1373a,a1374a,a1377a,a1381a,a1382a,a1386a,a1387a,a1391a,a1392a,a1396a,a1397a,a1401a,a1402a,a1406a,a1407a,a1411a,a1412a,a1416a,a1417a,a1421a,a1422a,a1426a,a1427a,a1431a,a1432a,a1436a,a1437a,a1441a,a1442a,a1446a,a1447a,a1450a,a1453a,a1454a,a1458a,a1459a,a1462a,a1465a,a1466a,a1470a,a1471a,a1474a,a1477a,a1478a,a1482a,a1483a,a1486a,a1489a,a1490a,a1493a,a1496a,a1497a,a1500a,a1503a,a1504a,a1507a,a1510a,a1511a,a1514a,a1517a,a1518a,a1521a,a1524a,a1525a,a1528a,a1531a,a1532a,a1535a,a1538a,a1539a,a1542a,a1545a,a1546a,a1549a,a1552a,a1553a,a1556a,a1559a,a1560a,a1563a,a1566a,a1567a,a1570a,a1573a,a1574a,a1577a,a1580a,a1581a,a1584a,a1587a,a1588a,a1591a,a1594a,a1595a,a1598a,a1601a,a1602a,a1605a,a1608a,a1609a,a1612a,a1615a,a1616a,a1619a,a1622a,a1623a,a1626a,a1629a,a1630a,a1633a,a1636a,a1637a,a1640a,a1643a,a1644a,a1647a,a1650a,a1651a,a1654a,a1657a,a1658a,a1661a,a1664a,a1665a,a1668a,a1671a,a1672a,a1675a,a1678a,a1679a,a1682a,a1685a,a1686a,a1689a,a1692a,a1693a,a1696a,a1699a,a1700a,a1703a,a1706a,a1707a,a1710a,a1713a,a1714a,a1717a,a1720a,a1721a,a1724a,a1727a,a1728a,a1731a,a1734a,a1735a,a1738a,a1741a,a1742a,a1745a,a1748a,a1749a,a1752a,a1755a,a1756a,a1759a,a1762a,a1763a,a1766a,a1769a,a1770a,a1773a,a1776a,a1777a,a1780a,a1783a,a1784a,a1787a,a1790a,a1791a,a1794a,a1797a,a1798a,a1801a,a1804a,a1805a,a1808a,a1811a,a1812a,a1815a,a1818a,a1819a,a1822a,a1825a,a1826a,a1829a,a1832a,a1833a,a1836a,a1840a,a1841a,a1842a,a1845a,a1848a,a1849a,a1852a,a1856a,a1857a,a1858a,a1861a,a1864a,a1865a,a1868a,a1872a,a1873a,a1874a,a1877a,a1880a,a1881a,a1884a,a1888a,a1889a,a1890a,a1893a,a1897a,a1898a,a1899a,a1902a,a1906a,a1907a,a1908a,a1911a,a1915a,a1916a,a1917a,a1920a,a1924a,a1925a,a1926a,a1929a,a1933a,a1934a,a1935a,a1938a,a1942a,a1943a,a1944a,a1947a,a1951a,a1952a,a1953a,a1956a,a1960a,a1961a,a1962a,a1965a,a1969a,a1970a,a1971a,a1974a,a1978a,a1979a,a1980a,a1983a,a1987a,a1988a,a1989a,a1992a,a1996a,a1997a,a1998a,a2001a,a2005a,a2006a,a2007a,a2010a,a2014a,a2015a,a2016a,a2019a,a2023a,a2024a,a2025a,a2028a,a2032a,a2033a,a2034a,a2037a,a2041a,a2042a,a2043a,a2046a,a2050a,a2051a,a2052a,a2055a,a2059a,a2060a,a2061a,a2064a,a2068a,a2069a,a2070a,a2073a,a2077a,a2078a,a2079a,a2082a,a2086a,a2087a,a2088a,a2091a,a2095a,a2096a,a2097a,a2100a,a2104a,a2105a,a2106a,a2109a,a2113a,a2114a,a2115a,a2118a,a2122a,a2123a,a2124a,a2127a,a2131a,a2132a,a2133a,a2136a,a2140a,a2141a,a2142a,a2145a,a2149a,a2150a,a2151a,a2154a,a2158a,a2159a,a2160a,a2163a,a2167a,a2168a,a2169a,a2172a,a2176a,a2177a,a2178a,a2181a,a2185a,a2186a,a2187a,a2190a,a2194a,a2195a,a2196a,a2199a,a2203a,a2204a,a2205a,a2208a,a2212a,a2213a,a2214a,a2217a,a2221a,a2222a,a2223a,a2226a,a2230a,a2231a,a2232a,a2235a,a2239a,a2240a,a2241a,a2244a,a2248a,a2249a,a2250a,a2253a,a2257a,a2258a,a2259a,a2262a,a2266a,a2267a,a2268a,a2271a,a2275a,a2276a,a2277a,a2280a,a2284a,a2285a,a2286a,a2289a,a2293a,a2294a,a2295a,a2298a,a2302a,a2303a,a2304a,a2307a,a2311a,a2312a,a2313a,a2316a,a2320a,a2321a,a2322a,a2325a,a2329a,a2330a,a2331a,a2334a,a2338a,a2339a,a2340a,a2343a,a2347a,a2348a,a2349a,a2352a,a2356a,a2357a,a2358a,a2361a,a2365a,a2366a,a2367a,a2370a,a2374a,a2375a,a2376a,a2379a,a2383a,a2384a,a2385a,a2388a,a2392a,a2393a,a2394a,a2397a,a2401a,a2402a,a2403a,a2406a,a2410a,a2411a,a2412a,a2415a,a2419a,a2420a,a2421a,a2424a,a2428a,a2429a,a2430a,a2433a,a2437a,a2438a,a2439a,a2442a,a2446a,a2447a,a2448a,a2451a,a2455a,a2456a,a2457a,a2460a,a2464a,a2465a,a2466a,a2469a,a2473a,a2474a,a2475a,a2478a,a2482a,a2483a,a2484a,a2487a,a2491a,a2492a,a2493a,a2496a,a2500a,a2501a,a2502a,a2505a,a2509a,a2510a,a2511a,a2514a,a2518a,a2519a,a2520a,a2523a,a2527a,a2528a,a2529a,a2532a,a2536a,a2537a,a2538a,a2541a,a2545a,a2546a,a2547a,a2550a,a2554a,a2555a,a2556a,a2559a,a2563a,a2564a,a2565a,a2568a,a2572a,a2573a,a2574a,a2577a,a2581a,a2582a,a2583a,a2586a,a2590a,a2591a,a2592a,a2595a,a2599a,a2600a,a2601a,a2604a,a2608a,a2609a,a2610a,a2613a,a2617a,a2618a,a2619a,a2622a,a2626a,a2627a,a2628a,a2631a,a2635a,a2636a,a2637a,a2640a,a2644a,a2645a,a2646a,a2649a,a2653a,a2654a,a2655a,a2658a,a2662a,a2663a,a2664a,a2667a,a2671a,a2672a,a2673a,a2676a,a2680a,a2681a,a2682a,a2685a,a2689a,a2690a,a2691a,a2694a,a2698a,a2699a,a2700a,a2703a,a2707a,a2708a,a2709a,a2712a,a2716a,a2717a,a2718a,a2721a,a2725a,a2726a,a2727a,a2730a,a2734a,a2735a,a2736a,a2739a,a2743a,a2744a,a2745a,a2748a,a2752a,a2753a,a2754a,a2757a,a2761a,a2762a,a2763a,a2766a,a2770a,a2771a,a2772a,a2775a,a2779a,a2780a,a2781a,a2784a,a2788a,a2789a,a2790a,a2793a,a2797a,a2798a,a2799a,a2802a,a2806a,a2807a,a2808a,a2811a,a2815a,a2816a,a2817a,a2820a,a2824a,a2825a,a2826a,a2829a,a2833a,a2834a,a2835a,a2838a,a2842a,a2843a,a2844a,a2847a,a2851a,a2852a,a2853a,a2856a,a2860a,a2861a,a2862a,a2865a,a2869a,a2870a,a2871a,a2874a,a2878a,a2879a,a2880a,a2883a,a2887a,a2888a,a2889a,a2892a,a2896a,a2897a,a2898a,a2901a,a2905a,a2906a,a2907a,a2910a,a2914a,a2915a,a2916a,a2919a,a2923a,a2924a,a2925a,a2928a,a2932a,a2933a,a2934a,a2937a,a2941a,a2942a,a2943a,a2946a,a2950a,a2951a,a2952a,a2955a,a2959a,a2960a,a2961a,a2964a,a2968a,a2969a,a2970a,a2973a,a2977a,a2978a,a2979a,a2982a,a2986a,a2987a,a2988a,a2991a,a2995a,a2996a,a2997a,a3000a,a3004a,a3005a,a3006a,a3009a,a3013a,a3014a,a3015a,a3018a,a3022a,a3023a,a3024a,a3027a,a3031a,a3032a,a3033a,a3036a,a3040a,a3041a,a3042a,a3045a,a3049a,a3050a,a3051a,a3054a,a3058a,a3059a,a3060a,a3063a,a3067a,a3068a,a3069a,a3072a,a3076a,a3077a,a3078a,a3081a,a3085a,a3086a,a3087a,a3090a,a3094a,a3095a,a3096a,a3099a,a3103a,a3104a,a3105a,a3108a,a3112a,a3113a,a3114a,a3117a,a3121a,a3122a,a3123a,a3126a,a3130a,a3131a,a3132a,a3135a,a3139a,a3140a,a3141a,a3144a,a3148a,a3149a,a3150a,a3153a,a3157a,a3158a,a3159a,a3162a,a3166a,a3167a,a3168a,a3171a,a3175a,a3176a,a3177a,a3180a,a3184a,a3185a,a3186a,a3189a,a3193a,a3194a,a3195a,a3199a,a3200a,a3204a,a3205a,a3206a,a3209a,a3213a,a3214a,a3215a,a3219a,a3220a,a3224a,a3225a,a3226a,a3229a,a3233a,a3234a,a3235a,a3239a,a3240a,a3244a,a3245a,a3246a,a3249a,a3253a,a3254a,a3255a,a3259a,a3260a,a3264a,a3265a,a3266a,a3269a,a3273a,a3274a,a3275a,a3279a,a3280a,a3284a,a3285a,a3286a,a3289a,a3293a,a3294a,a3295a,a3299a,a3300a,a3304a,a3305a,a3306a,a3309a,a3313a,a3314a,a3315a,a3319a,a3320a,a3324a,a3325a,a3326a,a3329a,a3333a,a3334a,a3335a,a3339a,a3340a,a3344a,a3345a,a3346a,a3349a,a3353a,a3354a,a3355a,a3359a,a3360a,a3364a,a3365a,a3366a,a3369a,a3373a,a3374a,a3375a,a3379a,a3380a,a3384a,a3385a,a3386a,a3389a,a3393a,a3394a,a3395a,a3399a,a3400a,a3404a,a3405a,a3406a,a3409a,a3413a,a3414a,a3415a,a3419a,a3420a,a3424a,a3425a,a3426a,a3429a,a3433a,a3434a,a3435a,a3439a,a3440a,a3444a,a3445a,a3446a,a3449a,a3453a,a3454a,a3455a,a3459a,a3460a,a3464a,a3465a,a3466a,a3469a,a3473a,a3474a,a3475a,a3479a,a3480a,a3484a,a3485a,a3486a,a3489a,a3493a,a3494a,a3495a,a3499a,a3500a,a3504a,a3505a,a3506a,a3509a,a3513a,a3514a,a3515a,a3519a,a3520a,a3524a,a3525a,a3526a,a3529a,a3533a,a3534a,a3535a,a3539a,a3540a,a3544a,a3545a,a3546a,a3549a,a3553a,a3554a,a3555a,a3559a,a3560a,a3564a,a3565a,a3566a,a3569a,a3573a,a3574a,a3575a,a3579a,a3580a,a3584a,a3585a,a3586a,a3589a,a3593a,a3594a,a3595a,a3599a,a3600a,a3604a,a3605a,a3606a,a3609a,a3613a,a3614a,a3615a,a3619a,a3620a,a3624a,a3625a,a3626a,a3629a,a3633a,a3634a,a3635a,a3639a,a3640a,a3644a,a3645a,a3646a,a3649a,a3653a,a3654a,a3655a,a3659a,a3660a,a3664a,a3665a,a3666a,a3670a,a3671a,a3675a,a3676a,a3677a,a3681a,a3682a,a3686a,a3687a,a3688a,a3692a,a3693a,a3697a,a3698a,a3699a,a3703a,a3704a,a3708a,a3709a,a3710a,a3714a,a3715a,a3719a,a3720a,a3721a,a3725a,a3726a,a3730a,a3731a,a3732a,a3736a,a3737a,a3741a,a3742a,a3743a,a3747a,a3748a,a3752a,a3753a,a3754a,a3758a,a3759a,a3763a,a3764a,a3765a,a3769a,a3770a,a3774a,a3775a,a3776a,a3780a,a3781a,a3785a,a3786a,a3787a,a3791a,a3792a,a3796a,a3797a,a3798a,a3802a,a3803a,a3807a,a3808a,a3809a,a3813a,a3814a,a3818a,a3819a,a3820a,a3824a,a3825a,a3829a,a3830a,a3831a,a3835a,a3836a,a3840a,a3841a,a3842a,a3846a,a3847a,a3851a,a3852a,a3853a,a3857a,a3858a,a3862a,a3863a,a3864a,a3868a,a3869a,a3873a,a3874a,a3875a,a3879a,a3880a,a3884a,a3885a,a3886a,a3890a,a3891a,a3895a,a3896a,a3897a,a3901a,a3902a,a3906a,a3907a,a3908a,a3912a,a3913a,a3917a,a3918a,a3919a,a3923a,a3924a,a3928a,a3929a,a3930a,a3934a,a3935a,a3939a,a3940a,a3941a,a3945a,a3946a,a3950a,a3951a,a3952a,a3956a,a3957a,a3961a,a3962a,a3963a,a3967a,a3968a,a3972a,a3973a,a3974a,a3978a,a3979a,a3983a,a3984a,a3985a,a3989a,a3990a,a3994a,a3995a,a3996a,a4000a,a4001a,a4005a,a4006a,a4007a,a4011a,a4012a,a4016a,a4017a,a4018a,a4022a,a4023a,a4027a,a4028a,a4029a,a4033a,a4034a,a4038a,a4039a,a4040a,a4044a,a4045a,a4049a,a4050a,a4051a,a4055a,a4056a,a4060a,a4061a,a4062a,a4066a,a4067a,a4071a,a4072a,a4073a,a4077a,a4078a,a4082a,a4083a,a4084a,a4088a,a4089a,a4093a,a4094a,a4095a,a4099a,a4100a,a4104a,a4105a,a4106a,a4110a,a4111a,a4115a,a4116a,a4117a,a4121a,a4122a,a4126a,a4127a,a4128a,a4132a,a4133a,a4137a,a4138a,a4139a,a4143a,a4144a,a4148a,a4149a,a4150a,a4154a,a4155a,a4159a,a4160a,a4161a,a4165a,a4166a,a4170a,a4171a,a4172a,a4176a,a4177a,a4181a,a4182a,a4183a,a4187a,a4188a,a4192a,a4193a,a4194a,a4198a,a4199a,a4203a,a4204a,a4205a,a4209a,a4210a,a4214a,a4215a,a4216a,a4220a,a4221a,a4225a,a4226a,a4227a,a4231a,a4232a,a4236a,a4237a,a4238a,a4242a,a4243a,a4247a,a4248a,a4249a,a4253a,a4254a,a4258a,a4259a,a4260a,a4264a,a4265a,a4269a,a4270a,a4271a,a4275a,a4276a,a4280a,a4281a,a4282a,a4286a,a4287a,a4291a,a4292a,a4293a,a4297a,a4298a,a4302a,a4303a,a4304a,a4308a,a4309a,a4313a,a4314a,a4315a,a4319a,a4320a,a4324a,a4325a,a4326a,a4330a,a4331a,a4335a,a4336a,a4337a,a4341a,a4342a,a4346a,a4347a,a4348a,a4352a,a4353a,a4357a,a4358a,a4359a,a4363a,a4364a,a4368a,a4369a,a4370a,a4374a,a4375a,a4379a,a4380a,a4381a,a4385a,a4386a,a4390a,a4391a,a4392a,a4396a,a4397a,a4401a,a4402a,a4403a,a4407a,a4408a,a4412a,a4413a,a4414a,a4418a,a4419a,a4423a,a4424a,a4425a,a4429a,a4430a,a4434a,a4435a,a4436a,a4440a,a4441a,a4445a,a4446a,a4447a,a4451a,a4452a,a4456a,a4457a,a4458a,a4462a,a4463a,a4467a,a4468a,a4469a,a4473a,a4474a,a4478a,a4479a,a4480a,a4484a,a4485a,a4489a,a4490a,a4491a,a4495a,a4496a,a4500a,a4501a,a4502a,a4506a,a4507a,a4511a,a4512a,a4513a,a4517a,a4518a,a4522a,a4523a,a4524a,a4528a,a4529a,a4533a,a4534a,a4535a,a4539a,a4540a,a4544a,a4545a,a4546a,a4550a,a4551a,a4555a,a4556a,a4557a,a4561a,a4562a,a4566a,a4567a,a4568a,a4572a,a4573a,a4577a,a4578a,a4579a,a4583a,a4584a,a4588a,a4589a,a4590a,a4594a,a4595a,a4599a,a4600a,a4601a,a4605a,a4606a,a4610a,a4611a,a4612a,a4616a,a4617a,a4621a,a4622a,a4623a,a4627a,a4628a,a4632a,a4633a,a4634a,a4638a,a4639a,a4643a,a4644a,a4645a,a4649a,a4650a,a4654a,a4655a,a4656a,a4660a,a4661a,a4665a,a4666a,a4667a,a4671a,a4672a,a4676a,a4677a,a4678a,a4682a,a4683a,a4687a,a4688a,a4689a,a4693a,a4694a,a4698a,a4699a,a4700a,a4704a,a4705a,a4709a,a4710a,a4711a,a4715a,a4716a,a4720a,a4721a,a4722a,a4726a,a4727a,a4731a,a4732a,a4733a,a4737a,a4738a,a4742a,a4743a,a4744a,a4748a,a4749a,a4753a,a4754a,a4755a,a4759a,a4760a,a4764a,a4765a,a4766a,a4770a,a4771a,a4775a,a4776a,a4777a,a4781a,a4782a,a4786a,a4787a,a4788a,a4792a,a4793a,a4797a,a4798a,a4799a,a4803a,a4804a,a4808a,a4809a,a4810a,a4814a,a4815a,a4819a,a4820a,a4821a,a4825a,a4826a,a4830a,a4831a,a4832a,a4836a,a4837a,a4841a,a4842a,a4843a,a4847a,a4848a,a4852a,a4853a,a4854a,a4858a,a4859a,a4863a,a4864a,a4865a,a4869a,a4870a,a4874a,a4875a,a4876a,a4880a,a4881a,a4885a,a4886a,a4887a,a4891a,a4892a,a4896a,a4897a,a4898a,a4902a,a4903a,a4907a,a4908a,a4909a,a4913a,a4914a,a4918a,a4919a,a4920a,a4924a,a4925a,a4929a,a4930a,a4931a,a4935a,a4936a,a4940a,a4941a,a4942a,a4946a,a4947a,a4951a,a4952a,a4953a,a4957a,a4958a,a4962a,a4963a,a4964a,a4968a,a4969a,a4973a,a4974a,a4975a,a4979a,a4980a,a4984a,a4985a,a4986a,a4990a,a4991a,a4995a,a4996a,a4997a,a5001a,a5002a,a5006a,a5007a,a5008a,a5012a,a5013a,a5017a,a5018a,a5019a,a5023a,a5024a,a5028a,a5029a,a5030a,a5034a,a5035a,a5039a,a5040a,a5041a,a5045a,a5046a,a5050a,a5051a,a5052a,a5056a,a5057a,a5061a,a5062a,a5063a,a5067a,a5068a,a5072a,a5073a,a5074a,a5078a,a5079a,a5083a,a5084a,a5085a,a5089a,a5090a,a5094a,a5095a,a5096a,a5100a,a5101a,a5105a,a5106a,a5107a,a5111a,a5112a,a5116a,a5117a,a5118a,a5122a,a5123a,a5127a,a5128a,a5129a,a5133a,a5134a,a5138a,a5139a,a5140a,a5144a,a5145a,a5149a,a5150a,a5151a,a5155a,a5156a,a5160a,a5161a,a5162a,a5166a,a5167a,a5171a,a5172a,a5173a,a5177a,a5178a,a5182a,a5183a,a5184a,a5188a,a5189a,a5193a,a5194a,a5195a,a5199a,a5200a,a5204a,a5205a,a5206a,a5210a,a5211a,a5215a,a5216a,a5217a,a5221a,a5222a,a5226a,a5227a,a5228a,a5232a,a5233a,a5237a,a5238a,a5239a,a5243a,a5244a,a5248a,a5249a,a5250a,a5254a,a5255a,a5259a,a5260a,a5261a,a5265a,a5266a,a5270a,a5271a,a5272a,a5276a,a5277a,a5281a,a5282a,a5283a,a5287a,a5288a,a5292a,a5293a,a5294a,a5298a,a5299a,a5303a,a5304a,a5305a,a5309a,a5310a,a5314a,a5315a,a5316a,a5320a,a5321a,a5325a,a5326a,a5327a,a5331a,a5332a,a5336a,a5337a,a5338a,a5342a,a5343a,a5347a,a5348a,a5349a,a5353a,a5354a,a5358a,a5359a,a5360a,a5364a,a5365a,a5369a,a5370a,a5371a,a5375a,a5376a,a5380a,a5381a,a5382a,a5386a,a5387a,a5391a,a5392a,a5393a,a5397a,a5398a,a5402a,a5403a,a5404a,a5408a,a5409a,a5413a,a5414a,a5415a,a5419a,a5420a,a5424a,a5425a,a5426a,a5430a,a5431a,a5435a,a5436a,a5437a,a5441a,a5442a,a5446a,a5447a,a5448a,a5452a,a5453a,a5457a,a5458a,a5459a,a5463a,a5464a,a5468a,a5469a,a5470a,a5474a,a5475a,a5479a,a5480a,a5481a,a5485a,a5486a,a5490a,a5491a,a5492a,a5496a,a5497a,a5501a,a5502a,a5503a,a5507a,a5508a,a5512a,a5513a,a5514a,a5518a,a5519a,a5523a,a5524a,a5525a,a5529a,a5530a,a5534a,a5535a,a5536a,a5540a,a5541a,a5545a,a5546a,a5547a,a5551a,a5552a,a5556a,a5557a,a5558a,a5562a,a5563a,a5567a,a5568a,a5569a,a5573a,a5574a,a5578a,a5579a,a5580a,a5584a,a5585a,a5589a,a5590a,a5591a,a5595a,a5596a,a5600a,a5601a,a5602a,a5606a,a5607a,a5611a,a5612a,a5613a,a5617a,a5618a,a5622a,a5623a,a5624a,a5628a,a5629a,a5633a,a5634a,a5635a,a5639a,a5640a,a5644a,a5645a,a5646a,a5650a,a5651a,a5655a,a5656a,a5657a,a5661a,a5662a,a5666a,a5667a,a5668a,a5672a,a5673a,a5677a,a5678a,a5679a,a5683a,a5684a,a5688a,a5689a,a5690a,a5694a,a5695a,a5699a,a5700a,a5701a,a5705a,a5706a,a5710a,a5711a,a5712a,a5716a,a5717a,a5721a,a5722a,a5723a,a5727a,a5728a,a5732a,a5733a,a5734a,a5738a,a5739a,a5743a,a5744a,a5745a,a5749a,a5750a,a5754a,a5755a,a5756a,a5760a,a5761a,a5765a,a5766a,a5767a,a5771a,a5772a,a5776a,a5777a,a5778a,a5782a,a5783a,a5787a,a5788a,a5789a,a5793a,a5794a,a5798a,a5799a,a5800a,a5804a,a5805a,a5809a,a5810a,a5811a,a5815a,a5816a,a5820a,a5821a,a5822a,a5826a,a5827a,a5831a,a5832a,a5833a,a5837a,a5838a,a5842a,a5843a,a5844a,a5848a,a5849a,a5853a,a5854a,a5855a,a5859a,a5860a,a5864a,a5865a,a5866a,a5870a,a5871a,a5875a,a5876a,a5877a,a5881a,a5882a,a5886a,a5887a,a5888a,a5892a,a5893a,a5897a,a5898a,a5899a,a5903a,a5904a,a5908a,a5909a,a5910a,a5914a,a5915a,a5919a,a5920a,a5921a,a5925a,a5926a,a5930a,a5931a,a5932a,a5936a,a5937a,a5941a,a5942a,a5943a,a5947a,a5948a,a5952a,a5953a,a5954a,a5958a,a5959a,a5963a,a5964a,a5965a,a5969a,a5970a,a5974a,a5975a,a5976a,a5980a,a5981a,a5985a,a5986a,a5987a,a5991a,a5992a,a5996a,a5997a,a5998a,a6002a,a6003a,a6007a,a6008a,a6009a,a6013a,a6014a,a6018a,a6019a,a6020a,a6024a,a6025a,a6029a,a6030a,a6031a,a6035a,a6036a,a6040a,a6041a,a6042a,a6046a,a6047a,a6051a,a6052a,a6053a,a6057a,a6058a,a6062a,a6063a,a6064a,a6068a,a6069a,a6073a,a6074a,a6075a,a6079a,a6080a,a6084a,a6085a,a6086a,a6090a,a6091a,a6095a,a6096a,a6097a,a6101a,a6102a,a6106a,a6107a,a6108a,a6112a,a6113a,a6117a,a6118a,a6119a,a6123a,a6124a,a6128a,a6129a,a6130a,a6134a,a6135a,a6139a,a6140a,a6141a,a6145a,a6146a,a6150a,a6151a,a6152a,a6156a,a6157a,a6161a,a6162a,a6163a,a6167a,a6168a,a6172a,a6173a,a6174a,a6178a,a6179a,a6183a,a6184a,a6185a,a6189a,a6190a,a6194a,a6195a,a6196a,a6200a,a6201a,a6205a,a6206a,a6207a,a6211a,a6212a,a6216a,a6217a,a6218a,a6222a,a6223a,a6227a,a6228a,a6229a,a6233a,a6234a,a6238a,a6239a,a6240a,a6244a,a6245a,a6249a,a6250a,a6251a,a6255a,a6256a,a6260a,a6261a,a6262a,a6266a,a6267a,a6271a,a6272a,a6273a,a6277a,a6278a,a6282a,a6283a,a6284a,a6288a,a6289a,a6293a,a6294a,a6295a,a6299a,a6300a,a6304a,a6305a,a6306a,a6310a,a6311a,a6315a,a6316a,a6317a,a6321a,a6322a,a6326a,a6327a,a6328a,a6332a,a6333a,a6337a,a6338a,a6339a,a6343a,a6344a,a6348a,a6349a,a6350a,a6354a,a6355a,a6359a,a6360a,a6361a,a6365a,a6366a,a6370a,a6371a,a6372a,a6376a,a6377a,a6381a,a6382a,a6383a,a6387a,a6388a,a6392a,a6393a,a6394a,a6398a,a6399a,a6403a,a6404a,a6405a,a6409a,a6410a,a6414a,a6415a,a6416a,a6420a,a6421a,a6425a,a6426a,a6427a,a6431a,a6432a,a6436a,a6437a,a6438a,a6442a,a6443a,a6447a,a6448a,a6449a,a6453a,a6454a,a6458a,a6459a,a6460a,a6464a,a6465a,a6469a,a6470a,a6471a,a6475a,a6476a,a6480a,a6481a,a6482a,a6486a,a6487a,a6491a,a6492a,a6493a,a6497a,a6498a,a6502a,a6503a,a6504a,a6508a,a6509a,a6513a,a6514a,a6515a,a6519a,a6520a,a6524a,a6525a,a6526a,a6530a,a6531a,a6535a,a6536a,a6537a,a6541a,a6542a,a6546a,a6547a,a6548a,a6552a,a6553a,a6557a,a6558a,a6559a,a6563a,a6564a,a6568a,a6569a,a6570a,a6574a,a6575a,a6579a,a6580a,a6581a,a6585a,a6586a,a6590a,a6591a,a6592a,a6596a,a6597a,a6601a,a6602a,a6603a,a6607a,a6608a,a6612a,a6613a,a6614a,a6618a,a6619a,a6623a,a6624a,a6625a,a6629a,a6630a,a6634a,a6635a,a6636a,a6640a,a6641a,a6645a,a6646a,a6647a,a6651a,a6652a,a6656a,a6657a,a6658a,a6662a,a6663a,a6667a,a6668a,a6669a,a6673a,a6674a,a6678a,a6679a,a6680a,a6684a,a6685a,a6689a,a6690a,a6691a,a6695a,a6696a,a6700a,a6701a,a6702a,a6706a,a6707a,a6711a,a6712a,a6713a,a6717a,a6718a,a6722a,a6723a,a6724a,a6728a,a6729a,a6733a,a6734a,a6735a,a6739a,a6740a,a6744a,a6745a,a6746a,a6750a,a6751a,a6755a,a6756a,a6757a,a6761a,a6762a,a6766a,a6767a,a6768a,a6772a,a6773a,a6777a,a6778a,a6779a,a6783a,a6784a,a6788a,a6789a,a6790a,a6794a,a6795a,a6799a,a6800a,a6801a,a6805a,a6806a,a6810a,a6811a,a6812a,a6816a,a6817a,a6821a,a6822a,a6823a,a6827a,a6828a,a6832a,a6833a,a6834a,a6838a,a6839a,a6843a,a6844a,a6845a,a6849a,a6850a,a6853a,a6856a,a6857a,a6858a,a6862a,a6863a,a6867a,a6868a,a6869a,a6873a,a6874a,a6877a,a6880a,a6881a,a6882a,a6886a,a6887a,a6891a,a6892a,a6893a,a6897a,a6898a,a6901a,a6904a,a6905a,a6906a,a6910a,a6911a,a6915a,a6916a,a6917a,a6921a,a6922a,a6925a,a6928a,a6929a,a6930a,a6934a,a6935a,a6939a,a6940a,a6941a,a6945a,a6946a,a6949a,a6952a,a6953a,a6954a,a6958a,a6959a,a6963a,a6964a,a6965a,a6969a,a6970a,a6973a,a6976a,a6977a,a6978a,a6982a,a6983a,a6987a,a6988a,a6989a,a6993a,a6994a,a6997a,a7000a,a7001a,a7002a,a7006a,a7007a,a7011a,a7012a,a7013a,a7017a,a7018a,a7021a,a7024a,a7025a,a7026a,a7030a,a7031a,a7035a,a7036a,a7037a,a7041a,a7042a,a7045a,a7048a,a7049a,a7050a,a7054a,a7055a,a7059a,a7060a,a7061a,a7065a,a7066a,a7069a,a7072a,a7073a,a7074a,a7078a,a7079a,a7083a,a7084a,a7085a,a7089a,a7090a,a7093a,a7096a,a7097a,a7098a,a7102a,a7103a,a7107a,a7108a,a7109a,a7113a,a7114a,a7117a,a7120a,a7121a,a7122a,a7126a,a7127a,a7131a,a7132a,a7133a,a7137a,a7138a,a7141a,a7144a,a7145a,a7146a,a7150a,a7151a,a7155a,a7156a,a7157a,a7161a,a7162a,a7165a,a7168a,a7169a,a7170a,a7174a,a7175a,a7179a,a7180a,a7181a,a7185a,a7186a,a7189a,a7192a,a7193a,a7194a,a7198a,a7199a,a7203a,a7204a,a7205a,a7209a,a7210a,a7213a,a7216a,a7217a,a7218a,a7222a,a7223a,a7227a,a7228a,a7229a,a7233a,a7234a,a7237a,a7240a,a7241a,a7242a,a7246a,a7247a,a7251a,a7252a,a7253a,a7257a,a7258a,a7261a,a7264a,a7265a,a7266a,a7270a,a7271a,a7275a,a7276a,a7277a,a7281a,a7282a,a7285a,a7288a,a7289a,a7290a,a7294a,a7295a,a7299a,a7300a,a7301a,a7305a,a7306a,a7309a,a7312a,a7313a,a7314a,a7318a,a7319a,a7323a,a7324a,a7325a,a7329a,a7330a,a7333a,a7336a,a7337a,a7338a,a7342a,a7343a,a7347a,a7348a,a7349a,a7353a,a7354a,a7357a,a7360a,a7361a,a7362a,a7366a,a7367a,a7371a,a7372a,a7373a,a7377a,a7378a,a7381a,a7384a,a7385a,a7386a,a7390a,a7391a,a7395a,a7396a,a7397a,a7401a,a7402a,a7405a,a7408a,a7409a,a7410a,a7414a,a7415a,a7419a,a7420a,a7421a,a7425a,a7426a,a7429a,a7432a,a7433a,a7434a,a7438a,a7439a,a7443a,a7444a,a7445a,a7449a,a7450a,a7453a,a7456a,a7457a,a7458a,a7462a,a7463a,a7467a,a7468a,a7469a,a7473a,a7474a,a7477a,a7480a,a7481a,a7482a,a7486a,a7487a,a7491a,a7492a,a7493a,a7497a,a7498a,a7501a,a7504a,a7505a,a7506a,a7510a,a7511a,a7515a,a7516a,a7517a,a7521a,a7522a,a7525a,a7528a,a7529a,a7530a,a7534a,a7535a,a7539a,a7540a,a7541a,a7545a,a7546a,a7549a,a7552a,a7553a,a7554a,a7558a,a7559a,a7563a,a7564a,a7565a,a7569a,a7570a,a7573a,a7576a,a7577a,a7578a,a7582a,a7583a,a7587a,a7588a,a7589a,a7593a,a7594a,a7597a,a7600a,a7601a,a7602a,a7606a,a7607a,a7611a,a7612a,a7613a,a7617a,a7618a,a7621a,a7624a,a7625a,a7626a,a7630a,a7631a,a7635a,a7636a,a7637a,a7641a,a7642a,a7645a,a7648a,a7649a,a7650a,a7654a,a7655a,a7659a,a7660a,a7661a,a7665a,a7666a,a7669a,a7672a,a7673a,a7674a,a7678a,a7679a,a7683a,a7684a,a7685a,a7689a,a7690a,a7693a,a7696a,a7697a,a7698a,a7702a,a7703a,a7707a,a7708a,a7709a,a7713a,a7714a,a7717a,a7720a,a7721a,a7722a,a7726a,a7727a,a7731a,a7732a,a7733a,a7737a,a7738a,a7741a,a7744a,a7745a,a7746a,a7750a,a7751a,a7755a,a7756a,a7757a,a7761a,a7762a,a7765a,a7768a,a7769a,a7770a,a7774a,a7775a,a7779a,a7780a,a7781a,a7785a,a7786a,a7789a,a7792a,a7793a,a7794a,a7798a,a7799a,a7803a,a7804a,a7805a,a7809a,a7810a,a7813a,a7816a,a7817a,a7818a,a7822a,a7823a,a7827a,a7828a,a7829a,a7833a,a7834a,a7837a,a7840a,a7841a,a7842a,a7846a,a7847a,a7851a,a7852a,a7853a,a7857a,a7858a,a7861a,a7864a,a7865a,a7866a,a7870a,a7871a,a7875a,a7876a,a7877a,a7881a,a7882a,a7885a,a7888a,a7889a,a7890a,a7894a,a7895a,a7899a,a7900a,a7901a,a7905a,a7906a,a7909a,a7912a,a7913a,a7914a,a7918a,a7919a,a7923a,a7924a,a7925a,a7929a,a7930a,a7933a,a7936a,a7937a,a7938a,a7942a,a7943a,a7947a,a7948a,a7949a,a7953a,a7954a,a7957a,a7960a,a7961a,a7962a,a7966a,a7967a,a7971a,a7972a,a7973a,a7977a,a7978a,a7981a,a7984a,a7985a,a7986a,a7990a,a7991a,a7994a,a7997a,a7998a,a7999a,a8003a,a8004a,a8007a,a8010a,a8011a,a8012a,a8016a,a8017a,a8020a,a8023a,a8024a,a8025a,a8029a,a8030a,a8033a,a8036a,a8037a,a8038a,a8042a,a8043a,a8046a,a8049a,a8050a,a8051a,a8055a,a8056a,a8059a,a8062a,a8063a,a8064a,a8068a,a8069a,a8072a,a8075a,a8076a,a8077a,a8081a,a8082a,a8085a,a8088a,a8089a,a8090a,a8094a,a8095a,a8098a,a8101a,a8102a,a8103a,a8107a,a8108a,a8111a,a8114a,a8115a,a8116a,a8120a,a8121a,a8124a,a8127a,a8128a,a8129a,a8133a,a8134a,a8137a,a8140a,a8141a,a8142a,a8146a,a8147a,a8150a,a8153a,a8154a,a8155a,a8159a,a8160a,a8163a,a8166a,a8167a,a8168a,a8172a,a8173a,a8176a,a8179a,a8180a,a8181a,a8185a,a8186a,a8189a,a8192a,a8193a,a8194a,a8198a,a8199a,a8202a,a8205a,a8206a,a8207a,a8211a,a8212a,a8215a,a8218a,a8219a,a8220a,a8224a,a8225a,a8228a,a8231a,a8232a,a8233a,a8237a,a8238a,a8241a,a8244a,a8245a,a8246a,a8250a,a8251a,a8254a,a8257a,a8258a,a8259a,a8263a,a8264a,a8267a,a8270a,a8271a,a8272a,a8276a,a8277a,a8280a,a8283a,a8284a,a8285a,a8289a,a8290a,a8293a,a8296a,a8297a,a8298a,a8302a,a8303a,a8306a,a8309a,a8310a,a8311a,a8315a,a8316a,a8319a,a8322a,a8323a,a8324a,a8328a,a8329a,a8332a,a8335a,a8336a,a8337a,a8341a,a8342a,a8345a,a8348a,a8349a,a8350a,a8354a,a8355a,a8358a,a8361a,a8362a,a8363a,a8367a,a8368a,a8371a,a8374a,a8375a,a8376a,a8380a,a8381a,a8384a,a8387a,a8388a,a8389a,a8393a,a8394a,a8397a,a8400a,a8401a,a8402a,a8406a,a8407a,a8410a,a8413a,a8414a,a8415a,a8419a,a8420a,a8423a,a8426a,a8427a,a8428a,a8432a,a8433a,a8436a,a8439a,a8440a,a8441a,a8445a,a8446a,a8449a,a8452a,a8453a,a8454a,a8458a,a8459a,a8462a,a8465a,a8466a,a8467a,a8471a,a8472a,a8475a,a8478a,a8479a,a8480a,a8484a,a8485a,a8488a,a8491a,a8492a,a8493a,a8497a,a8498a,a8501a,a8504a,a8505a,a8506a,a8510a,a8511a,a8514a,a8517a,a8518a,a8519a,a8523a,a8524a,a8527a,a8530a,a8531a,a8532a,a8536a,a8537a,a8540a,a8543a,a8544a,a8545a,a8549a,a8550a,a8553a,a8556a,a8557a,a8558a,a8562a,a8563a,a8566a,a8569a,a8570a,a8571a,a8575a,a8576a,a8579a,a8582a,a8583a,a8584a,a8588a,a8589a,a8592a,a8595a,a8596a,a8597a,a8601a,a8602a,a8605a,a8608a,a8609a,a8610a,a8614a,a8615a,a8618a,a8621a,a8622a,a8623a,a8627a,a8628a,a8631a,a8634a,a8635a,a8636a,a8640a,a8641a,a8644a,a8647a,a8648a,a8649a,a8653a,a8654a,a8657a,a8660a,a8661a,a8662a,a8666a,a8667a,a8670a,a8673a,a8674a,a8675a,a8679a,a8680a,a8683a,a8686a,a8687a,a8688a,a8692a,a8693a,a8696a,a8699a,a8700a,a8701a,a8705a,a8706a,a8709a,a8712a,a8713a,a8714a,a8718a,a8719a,a8722a,a8725a,a8726a,a8727a,a8731a,a8732a,a8735a,a8738a,a8739a,a8740a,a8744a,a8745a,a8748a,a8751a,a8752a,a8753a,a8757a,a8758a,a8761a,a8764a,a8765a,a8766a,a8770a,a8771a,a8774a,a8777a,a8778a,a8779a,a8783a,a8784a,a8787a,a8790a,a8791a,a8792a,a8796a,a8797a,a8800a,a8803a,a8804a,a8805a,a8809a,a8810a,a8813a,a8816a,a8817a,a8818a,a8822a,a8823a,a8826a,a8829a,a8830a,a8831a,a8835a,a8836a,a8839a,a8842a,a8843a,a8844a,a8848a,a8849a,a8852a,a8855a,a8856a,a8857a,a8861a,a8862a,a8865a,a8868a,a8869a,a8870a,a8874a,a8875a,a8878a,a8881a,a8882a,a8883a,a8887a,a8888a,a8891a,a8894a,a8895a,a8896a,a8900a,a8901a,a8904a,a8907a,a8908a,a8909a,a8913a,a8914a,a8917a,a8920a,a8921a,a8922a,a8926a,a8927a,a8930a,a8933a,a8934a,a8935a,a8939a,a8940a,a8943a,a8946a,a8947a,a8948a,a8952a,a8953a,a8956a,a8959a,a8960a,a8961a,a8965a,a8966a,a8969a,a8972a,a8973a,a8974a,a8978a,a8979a,a8982a,a8985a,a8986a,a8987a,a8991a,a8992a,a8995a,a8998a,a8999a,a9000a,a9004a,a9005a,a9008a,a9011a,a9012a,a9013a,a9017a,a9018a,a9021a,a9024a,a9025a,a9026a,a9030a,a9031a,a9034a,a9037a,a9038a,a9039a,a9043a,a9044a,a9047a,a9050a,a9051a,a9052a,a9056a,a9057a,a9060a,a9063a,a9064a,a9065a,a9069a,a9070a,a9073a,a9076a,a9077a,a9078a,a9082a,a9083a,a9086a,a9089a,a9090a,a9091a,a9095a,a9096a,a9099a,a9102a,a9103a,a9104a,a9108a,a9109a,a9112a,a9115a,a9116a,a9117a,a9121a,a9122a,a9125a,a9128a,a9129a,a9130a,a9134a,a9135a,a9138a,a9141a,a9142a,a9143a,a9147a,a9148a,a9151a,a9154a,a9155a,a9156a,a9160a,a9161a,a9164a,a9167a,a9168a,a9169a,a9173a,a9174a,a9177a,a9180a,a9181a,a9182a,a9186a,a9187a,a9190a,a9193a,a9194a,a9195a,a9199a,a9200a,a9203a,a9206a,a9207a,a9208a,a9212a,a9213a,a9216a,a9219a,a9220a,a9221a,a9225a,a9226a,a9229a,a9232a,a9233a,a9234a,a9238a,a9239a,a9242a,a9245a,a9246a,a9247a,a9251a,a9252a,a9255a,a9258a,a9259a,a9260a,a9264a,a9265a,a9268a,a9271a,a9272a,a9273a,a9277a,a9278a,a9281a,a9284a,a9285a,a9286a,a9290a,a9291a,a9294a,a9297a,a9298a,a9299a,a9303a,a9304a,a9307a,a9310a,a9311a,a9312a,a9316a,a9317a,a9320a,a9323a,a9324a,a9325a,a9329a,a9330a,a9333a,a9336a,a9337a,a9338a,a9342a,a9343a,a9346a,a9349a,a9350a,a9351a,a9355a,a9356a,a9359a,a9362a,a9363a,a9364a,a9368a,a9369a,a9372a,a9375a,a9376a,a9377a,a9381a,a9382a,a9385a,a9388a,a9389a,a9390a,a9394a,a9395a,a9398a,a9401a,a9402a,a9403a,a9407a,a9408a,a9411a,a9414a,a9415a,a9416a,a9420a,a9421a,a9424a,a9427a,a9428a,a9429a,a9433a,a9434a,a9437a,a9440a,a9441a,a9442a,a9446a,a9447a,a9450a,a9453a,a9454a,a9455a,a9459a,a9460a,a9463a,a9466a,a9467a,a9468a,a9472a,a9473a,a9476a,a9479a,a9480a,a9481a,a9485a,a9486a,a9489a,a9492a,a9493a,a9494a,a9498a,a9499a,a9502a,a9505a,a9506a,a9507a,a9511a,a9512a,a9515a,a9518a,a9519a,a9520a,a9524a,a9525a,a9528a,a9531a,a9532a,a9533a,a9537a,a9538a,a9541a,a9544a,a9545a,a9546a,a9550a,a9551a,a9554a,a9557a,a9558a,a9559a,a9563a,a9564a,a9567a,a9570a,a9571a,a9572a,a9576a,a9577a,a9580a,a9583a,a9584a,a9585a,a9589a,a9590a,a9593a,a9596a,a9597a,a9598a,a9602a,a9603a,a9606a,a9609a,a9610a,a9611a,a9615a,a9616a,a9619a,a9622a,a9623a,a9624a,a9628a,a9629a,a9632a,a9635a,a9636a,a9637a,a9641a,a9642a,a9645a,a9648a,a9649a,a9650a,a9654a,a9655a,a9658a,a9661a,a9662a,a9663a,a9667a,a9668a,a9671a,a9674a,a9675a,a9676a,a9680a,a9681a,a9684a,a9687a,a9688a,a9689a,a9693a,a9694a,a9697a,a9700a,a9701a,a9702a,a9706a,a9707a,a9710a,a9713a,a9714a,a9715a,a9719a,a9720a,a9723a,a9726a,a9727a,a9728a,a9732a,a9733a,a9736a,a9739a,a9740a,a9741a,a9745a,a9746a,a9749a,a9752a,a9753a,a9754a,a9758a,a9759a,a9762a,a9765a,a9766a,a9767a,a9771a,a9772a,a9775a,a9778a,a9779a,a9780a,a9784a,a9785a,a9788a,a9791a,a9792a,a9793a,a9797a,a9798a,a9801a,a9804a,a9805a,a9806a,a9810a,a9811a,a9814a,a9817a,a9818a,a9819a,a9823a,a9824a,a9827a,a9830a,a9831a,a9832a,a9836a,a9837a,a9840a,a9843a,a9844a,a9845a,a9849a,a9850a,a9853a,a9856a,a9857a,a9858a,a9862a,a9863a,a9866a,a9869a,a9870a,a9871a,a9875a,a9876a,a9879a,a9882a,a9883a,a9884a,a9888a,a9889a,a9892a,a9895a,a9896a,a9897a,a9901a,a9902a,a9905a,a9908a,a9909a,a9910a,a9914a,a9915a,a9918a,a9921a,a9922a,a9923a,a9927a,a9928a,a9931a,a9934a,a9935a,a9936a,a9940a,a9941a,a9944a,a9947a,a9948a,a9949a,a9953a,a9954a,a9957a,a9960a,a9961a,a9962a,a9966a,a9967a,a9970a,a9973a,a9974a,a9975a,a9979a,a9980a,a9983a,a9986a,a9987a,a9988a,a9992a,a9993a,a9996a,a9999a,a10000a,a10001a,a10005a,a10006a,a10009a,a10012a,a10013a,a10014a,a10018a,a10019a,a10022a,a10025a,a10026a,a10027a,a10031a,a10032a,a10035a,a10038a,a10039a,a10040a,a10044a,a10045a,a10048a,a10051a,a10052a,a10053a,a10057a,a10058a,a10061a,a10064a,a10065a,a10066a,a10070a,a10071a,a10074a,a10077a,a10078a,a10079a,a10083a,a10084a,a10087a,a10090a,a10091a,a10092a,a10096a,a10097a,a10100a,a10103a,a10104a,a10105a,a10109a,a10110a,a10113a,a10116a,a10117a,a10118a,a10122a,a10123a,a10126a,a10129a,a10130a,a10131a,a10135a,a10136a,a10139a,a10142a,a10143a,a10144a,a10148a,a10149a,a10152a,a10155a,a10156a,a10157a,a10161a,a10162a,a10165a,a10168a,a10169a,a10170a,a10174a,a10175a,a10178a,a10181a,a10182a,a10183a,a10187a,a10188a,a10191a,a10194a,a10195a,a10196a,a10200a,a10201a,a10204a,a10207a,a10208a,a10209a,a10213a,a10214a,a10217a,a10220a,a10221a,a10222a,a10226a,a10227a,a10230a,a10233a,a10234a,a10235a,a10239a,a10240a,a10243a,a10246a,a10247a,a10248a,a10252a,a10253a,a10256a,a10259a,a10260a,a10261a,a10265a,a10266a,a10269a,a10272a,a10273a,a10274a,a10278a,a10279a,a10282a,a10285a,a10286a,a10287a,a10291a,a10292a,a10295a,a10298a,a10299a,a10300a,a10304a,a10305a,a10308a,a10311a,a10312a,a10313a,a10317a,a10318a,a10321a,a10324a,a10325a,a10326a,a10330a,a10331a,a10334a,a10337a,a10338a,a10339a,a10343a,a10344a,a10347a,a10350a,a10351a,a10352a,a10356a,a10357a,a10360a,a10363a,a10364a,a10365a,a10369a,a10370a,a10373a,a10376a,a10377a,a10378a,a10382a,a10383a,a10386a,a10389a,a10390a,a10391a,a10395a,a10396a,a10399a,a10402a,a10403a,a10404a,a10408a,a10409a,a10412a,a10415a,a10416a,a10417a,a10421a,a10422a,a10425a,a10428a,a10429a,a10430a,a10434a,a10435a,a10438a,a10441a,a10442a,a10443a,a10447a,a10448a,a10451a,a10454a,a10455a,a10456a,a10460a,a10461a,a10464a,a10467a,a10468a,a10469a,a10473a,a10474a,a10477a,a10480a,a10481a,a10482a,a10486a,a10487a,a10490a,a10493a,a10494a,a10495a,a10498a,a10501a,a10502a,a10505a,a10508a,a10509a,a10510a,a10514a,a10515a,a10518a,a10521a,a10522a,a10523a,a10526a,a10529a,a10530a,a10533a,a10536a,a10537a,a10538a,a10542a,a10543a,a10546a,a10549a,a10550a,a10551a,a10554a,a10557a,a10558a,a10561a,a10564a,a10565a,a10566a,a10570a,a10571a,a10574a,a10577a,a10578a,a10579a,a10582a,a10585a,a10586a,a10589a,a10592a,a10593a,a10594a,a10598a,a10599a,a10602a,a10605a,a10606a,a10607a,a10610a,a10613a,a10614a,a10617a,a10620a,a10621a,a10622a,a10626a,a10627a,a10630a,a10633a,a10634a,a10635a,a10638a,a10641a,a10642a,a10645a,a10648a,a10649a,a10650a,a10654a,a10655a,a10658a,a10661a,a10662a,a10663a,a10666a,a10669a,a10670a,a10673a,a10676a,a10677a,a10678a,a10682a,a10683a,a10686a,a10689a,a10690a,a10691a,a10694a,a10697a,a10698a,a10701a,a10704a,a10705a,a10706a,a10710a,a10711a,a10714a,a10717a,a10718a,a10719a,a10722a,a10725a,a10726a,a10729a,a10732a,a10733a,a10734a,a10738a,a10739a,a10742a,a10745a,a10746a,a10747a,a10750a,a10753a,a10754a,a10757a,a10760a,a10761a,a10762a,a10766a,a10767a,a10770a,a10773a,a10774a,a10775a,a10778a,a10781a,a10782a,a10785a,a10788a,a10789a,a10790a,a10794a,a10795a,a10798a,a10801a,a10802a,a10803a,a10806a,a10809a,a10810a,a10813a,a10816a,a10817a,a10818a,a10822a,a10823a,a10826a,a10829a,a10830a,a10831a,a10834a,a10837a,a10838a,a10841a,a10844a,a10845a,a10846a,a10850a,a10851a,a10854a,a10857a,a10858a,a10859a,a10862a,a10865a,a10866a,a10869a,a10872a,a10873a,a10874a,a10878a,a10879a,a10882a,a10885a,a10886a,a10887a,a10890a,a10893a,a10894a,a10897a,a10900a,a10901a,a10902a,a10906a,a10907a,a10910a,a10913a,a10914a,a10915a,a10918a,a10921a,a10922a,a10925a,a10928a,a10929a,a10930a,a10934a,a10935a,a10938a,a10941a,a10942a,a10943a,a10946a,a10949a,a10950a,a10953a,a10956a,a10957a,a10958a,a10962a,a10963a,a10966a,a10969a,a10970a,a10971a,a10974a,a10977a,a10978a,a10981a,a10984a,a10985a,a10986a,a10990a,a10991a,a10994a,a10997a,a10998a,a10999a,a11002a,a11005a,a11006a,a11009a,a11012a,a11013a,a11014a,a11018a,a11019a,a11022a,a11025a,a11026a,a11027a,a11030a,a11033a,a11034a,a11037a,a11040a,a11041a,a11042a,a11046a,a11047a,a11050a,a11053a,a11054a,a11055a,a11058a,a11061a,a11062a,a11065a,a11068a,a11069a,a11070a,a11074a,a11075a,a11078a,a11081a,a11082a,a11083a,a11086a,a11089a,a11090a,a11093a,a11096a,a11097a,a11098a,a11102a,a11103a,a11106a,a11109a,a11110a,a11111a,a11114a,a11117a,a11118a,a11121a,a11124a,a11125a,a11126a,a11130a,a11131a,a11134a,a11137a,a11138a,a11139a,a11142a,a11145a,a11146a,a11149a,a11152a,a11153a,a11154a,a11158a,a11159a,a11162a,a11165a,a11166a,a11167a,a11170a,a11173a,a11174a,a11177a,a11180a,a11181a,a11182a,a11186a,a11187a,a11190a,a11193a,a11194a,a11195a,a11198a,a11201a,a11202a,a11205a,a11208a,a11209a,a11210a,a11214a,a11215a,a11218a,a11221a,a11222a,a11223a,a11226a,a11229a,a11230a,a11233a,a11236a,a11237a,a11238a,a11242a,a11243a,a11246a,a11249a,a11250a,a11251a,a11254a,a11257a,a11258a,a11261a,a11264a,a11265a,a11266a,a11270a,a11271a,a11274a,a11277a,a11278a,a11279a,a11282a,a11285a,a11286a,a11289a,a11292a,a11293a,a11294a,a11298a,a11299a,a11302a,a11305a,a11306a,a11307a,a11310a,a11313a,a11314a,a11317a,a11320a,a11321a,a11322a,a11326a,a11327a,a11330a,a11333a,a11334a,a11335a,a11338a,a11341a,a11342a,a11345a,a11348a,a11349a,a11350a,a11354a,a11355a,a11358a,a11361a,a11362a,a11363a,a11366a,a11369a,a11370a,a11373a,a11376a,a11377a,a11378a: std_logic;
begin
A108 <=( a1366a ) or ( a911a );
a1a <=( a11378a and a11363a );
a2a <=( a11350a and a11335a );
a3a <=( a11322a and a11307a );
a4a <=( a11294a and a11279a );
a5a <=( a11266a and a11251a );
a6a <=( a11238a and a11223a );
a7a <=( a11210a and a11195a );
a8a <=( a11182a and a11167a );
a9a <=( a11154a and a11139a );
a10a <=( a11126a and a11111a );
a11a <=( a11098a and a11083a );
a12a <=( a11070a and a11055a );
a13a <=( a11042a and a11027a );
a14a <=( a11014a and a10999a );
a15a <=( a10986a and a10971a );
a16a <=( a10958a and a10943a );
a17a <=( a10930a and a10915a );
a18a <=( a10902a and a10887a );
a19a <=( a10874a and a10859a );
a20a <=( a10846a and a10831a );
a21a <=( a10818a and a10803a );
a22a <=( a10790a and a10775a );
a23a <=( a10762a and a10747a );
a24a <=( a10734a and a10719a );
a25a <=( a10706a and a10691a );
a26a <=( a10678a and a10663a );
a27a <=( a10650a and a10635a );
a28a <=( a10622a and a10607a );
a29a <=( a10594a and a10579a );
a30a <=( a10566a and a10551a );
a31a <=( a10538a and a10523a );
a32a <=( a10510a and a10495a );
a33a <=( a10482a and a10469a );
a34a <=( a10456a and a10443a );
a35a <=( a10430a and a10417a );
a36a <=( a10404a and a10391a );
a37a <=( a10378a and a10365a );
a38a <=( a10352a and a10339a );
a39a <=( a10326a and a10313a );
a40a <=( a10300a and a10287a );
a41a <=( a10274a and a10261a );
a42a <=( a10248a and a10235a );
a43a <=( a10222a and a10209a );
a44a <=( a10196a and a10183a );
a45a <=( a10170a and a10157a );
a46a <=( a10144a and a10131a );
a47a <=( a10118a and a10105a );
a48a <=( a10092a and a10079a );
a49a <=( a10066a and a10053a );
a50a <=( a10040a and a10027a );
a51a <=( a10014a and a10001a );
a52a <=( a9988a and a9975a );
a53a <=( a9962a and a9949a );
a54a <=( a9936a and a9923a );
a55a <=( a9910a and a9897a );
a56a <=( a9884a and a9871a );
a57a <=( a9858a and a9845a );
a58a <=( a9832a and a9819a );
a59a <=( a9806a and a9793a );
a60a <=( a9780a and a9767a );
a61a <=( a9754a and a9741a );
a62a <=( a9728a and a9715a );
a63a <=( a9702a and a9689a );
a64a <=( a9676a and a9663a );
a65a <=( a9650a and a9637a );
a66a <=( a9624a and a9611a );
a67a <=( a9598a and a9585a );
a68a <=( a9572a and a9559a );
a69a <=( a9546a and a9533a );
a70a <=( a9520a and a9507a );
a71a <=( a9494a and a9481a );
a72a <=( a9468a and a9455a );
a73a <=( a9442a and a9429a );
a74a <=( a9416a and a9403a );
a75a <=( a9390a and a9377a );
a76a <=( a9364a and a9351a );
a77a <=( a9338a and a9325a );
a78a <=( a9312a and a9299a );
a79a <=( a9286a and a9273a );
a80a <=( a9260a and a9247a );
a81a <=( a9234a and a9221a );
a82a <=( a9208a and a9195a );
a83a <=( a9182a and a9169a );
a84a <=( a9156a and a9143a );
a85a <=( a9130a and a9117a );
a86a <=( a9104a and a9091a );
a87a <=( a9078a and a9065a );
a88a <=( a9052a and a9039a );
a89a <=( a9026a and a9013a );
a90a <=( a9000a and a8987a );
a91a <=( a8974a and a8961a );
a92a <=( a8948a and a8935a );
a93a <=( a8922a and a8909a );
a94a <=( a8896a and a8883a );
a95a <=( a8870a and a8857a );
a96a <=( a8844a and a8831a );
a97a <=( a8818a and a8805a );
a98a <=( a8792a and a8779a );
a99a <=( a8766a and a8753a );
a100a <=( a8740a and a8727a );
a101a <=( a8714a and a8701a );
a102a <=( a8688a and a8675a );
a103a <=( a8662a and a8649a );
a104a <=( a8636a and a8623a );
a105a <=( a8610a and a8597a );
a106a <=( a8584a and a8571a );
a107a <=( a8558a and a8545a );
a108a <=( a8532a and a8519a );
a109a <=( a8506a and a8493a );
a110a <=( a8480a and a8467a );
a111a <=( a8454a and a8441a );
a112a <=( a8428a and a8415a );
a113a <=( a8402a and a8389a );
a114a <=( a8376a and a8363a );
a115a <=( a8350a and a8337a );
a116a <=( a8324a and a8311a );
a117a <=( a8298a and a8285a );
a118a <=( a8272a and a8259a );
a119a <=( a8246a and a8233a );
a120a <=( a8220a and a8207a );
a121a <=( a8194a and a8181a );
a122a <=( a8168a and a8155a );
a123a <=( a8142a and a8129a );
a124a <=( a8116a and a8103a );
a125a <=( a8090a and a8077a );
a126a <=( a8064a and a8051a );
a127a <=( a8038a and a8025a );
a128a <=( a8012a and a7999a );
a129a <=( a7986a and a7973a );
a130a <=( a7962a and a7949a );
a131a <=( a7938a and a7925a );
a132a <=( a7914a and a7901a );
a133a <=( a7890a and a7877a );
a134a <=( a7866a and a7853a );
a135a <=( a7842a and a7829a );
a136a <=( a7818a and a7805a );
a137a <=( a7794a and a7781a );
a138a <=( a7770a and a7757a );
a139a <=( a7746a and a7733a );
a140a <=( a7722a and a7709a );
a141a <=( a7698a and a7685a );
a142a <=( a7674a and a7661a );
a143a <=( a7650a and a7637a );
a144a <=( a7626a and a7613a );
a145a <=( a7602a and a7589a );
a146a <=( a7578a and a7565a );
a147a <=( a7554a and a7541a );
a148a <=( a7530a and a7517a );
a149a <=( a7506a and a7493a );
a150a <=( a7482a and a7469a );
a151a <=( a7458a and a7445a );
a152a <=( a7434a and a7421a );
a153a <=( a7410a and a7397a );
a154a <=( a7386a and a7373a );
a155a <=( a7362a and a7349a );
a156a <=( a7338a and a7325a );
a157a <=( a7314a and a7301a );
a158a <=( a7290a and a7277a );
a159a <=( a7266a and a7253a );
a160a <=( a7242a and a7229a );
a161a <=( a7218a and a7205a );
a162a <=( a7194a and a7181a );
a163a <=( a7170a and a7157a );
a164a <=( a7146a and a7133a );
a165a <=( a7122a and a7109a );
a166a <=( a7098a and a7085a );
a167a <=( a7074a and a7061a );
a168a <=( a7050a and a7037a );
a169a <=( a7026a and a7013a );
a170a <=( a7002a and a6989a );
a171a <=( a6978a and a6965a );
a172a <=( a6954a and a6941a );
a173a <=( a6930a and a6917a );
a174a <=( a6906a and a6893a );
a175a <=( a6882a and a6869a );
a176a <=( a6858a and a6845a );
a177a <=( a6834a and a6823a );
a178a <=( a6812a and a6801a );
a179a <=( a6790a and a6779a );
a180a <=( a6768a and a6757a );
a181a <=( a6746a and a6735a );
a182a <=( a6724a and a6713a );
a183a <=( a6702a and a6691a );
a184a <=( a6680a and a6669a );
a185a <=( a6658a and a6647a );
a186a <=( a6636a and a6625a );
a187a <=( a6614a and a6603a );
a188a <=( a6592a and a6581a );
a189a <=( a6570a and a6559a );
a190a <=( a6548a and a6537a );
a191a <=( a6526a and a6515a );
a192a <=( a6504a and a6493a );
a193a <=( a6482a and a6471a );
a194a <=( a6460a and a6449a );
a195a <=( a6438a and a6427a );
a196a <=( a6416a and a6405a );
a197a <=( a6394a and a6383a );
a198a <=( a6372a and a6361a );
a199a <=( a6350a and a6339a );
a200a <=( a6328a and a6317a );
a201a <=( a6306a and a6295a );
a202a <=( a6284a and a6273a );
a203a <=( a6262a and a6251a );
a204a <=( a6240a and a6229a );
a205a <=( a6218a and a6207a );
a206a <=( a6196a and a6185a );
a207a <=( a6174a and a6163a );
a208a <=( a6152a and a6141a );
a209a <=( a6130a and a6119a );
a210a <=( a6108a and a6097a );
a211a <=( a6086a and a6075a );
a212a <=( a6064a and a6053a );
a213a <=( a6042a and a6031a );
a214a <=( a6020a and a6009a );
a215a <=( a5998a and a5987a );
a216a <=( a5976a and a5965a );
a217a <=( a5954a and a5943a );
a218a <=( a5932a and a5921a );
a219a <=( a5910a and a5899a );
a220a <=( a5888a and a5877a );
a221a <=( a5866a and a5855a );
a222a <=( a5844a and a5833a );
a223a <=( a5822a and a5811a );
a224a <=( a5800a and a5789a );
a225a <=( a5778a and a5767a );
a226a <=( a5756a and a5745a );
a227a <=( a5734a and a5723a );
a228a <=( a5712a and a5701a );
a229a <=( a5690a and a5679a );
a230a <=( a5668a and a5657a );
a231a <=( a5646a and a5635a );
a232a <=( a5624a and a5613a );
a233a <=( a5602a and a5591a );
a234a <=( a5580a and a5569a );
a235a <=( a5558a and a5547a );
a236a <=( a5536a and a5525a );
a237a <=( a5514a and a5503a );
a238a <=( a5492a and a5481a );
a239a <=( a5470a and a5459a );
a240a <=( a5448a and a5437a );
a241a <=( a5426a and a5415a );
a242a <=( a5404a and a5393a );
a243a <=( a5382a and a5371a );
a244a <=( a5360a and a5349a );
a245a <=( a5338a and a5327a );
a246a <=( a5316a and a5305a );
a247a <=( a5294a and a5283a );
a248a <=( a5272a and a5261a );
a249a <=( a5250a and a5239a );
a250a <=( a5228a and a5217a );
a251a <=( a5206a and a5195a );
a252a <=( a5184a and a5173a );
a253a <=( a5162a and a5151a );
a254a <=( a5140a and a5129a );
a255a <=( a5118a and a5107a );
a256a <=( a5096a and a5085a );
a257a <=( a5074a and a5063a );
a258a <=( a5052a and a5041a );
a259a <=( a5030a and a5019a );
a260a <=( a5008a and a4997a );
a261a <=( a4986a and a4975a );
a262a <=( a4964a and a4953a );
a263a <=( a4942a and a4931a );
a264a <=( a4920a and a4909a );
a265a <=( a4898a and a4887a );
a266a <=( a4876a and a4865a );
a267a <=( a4854a and a4843a );
a268a <=( a4832a and a4821a );
a269a <=( a4810a and a4799a );
a270a <=( a4788a and a4777a );
a271a <=( a4766a and a4755a );
a272a <=( a4744a and a4733a );
a273a <=( a4722a and a4711a );
a274a <=( a4700a and a4689a );
a275a <=( a4678a and a4667a );
a276a <=( a4656a and a4645a );
a277a <=( a4634a and a4623a );
a278a <=( a4612a and a4601a );
a279a <=( a4590a and a4579a );
a280a <=( a4568a and a4557a );
a281a <=( a4546a and a4535a );
a282a <=( a4524a and a4513a );
a283a <=( a4502a and a4491a );
a284a <=( a4480a and a4469a );
a285a <=( a4458a and a4447a );
a286a <=( a4436a and a4425a );
a287a <=( a4414a and a4403a );
a288a <=( a4392a and a4381a );
a289a <=( a4370a and a4359a );
a290a <=( a4348a and a4337a );
a291a <=( a4326a and a4315a );
a292a <=( a4304a and a4293a );
a293a <=( a4282a and a4271a );
a294a <=( a4260a and a4249a );
a295a <=( a4238a and a4227a );
a296a <=( a4216a and a4205a );
a297a <=( a4194a and a4183a );
a298a <=( a4172a and a4161a );
a299a <=( a4150a and a4139a );
a300a <=( a4128a and a4117a );
a301a <=( a4106a and a4095a );
a302a <=( a4084a and a4073a );
a303a <=( a4062a and a4051a );
a304a <=( a4040a and a4029a );
a305a <=( a4018a and a4007a );
a306a <=( a3996a and a3985a );
a307a <=( a3974a and a3963a );
a308a <=( a3952a and a3941a );
a309a <=( a3930a and a3919a );
a310a <=( a3908a and a3897a );
a311a <=( a3886a and a3875a );
a312a <=( a3864a and a3853a );
a313a <=( a3842a and a3831a );
a314a <=( a3820a and a3809a );
a315a <=( a3798a and a3787a );
a316a <=( a3776a and a3765a );
a317a <=( a3754a and a3743a );
a318a <=( a3732a and a3721a );
a319a <=( a3710a and a3699a );
a320a <=( a3688a and a3677a );
a321a <=( a3666a and a3655a );
a322a <=( a3646a and a3635a );
a323a <=( a3626a and a3615a );
a324a <=( a3606a and a3595a );
a325a <=( a3586a and a3575a );
a326a <=( a3566a and a3555a );
a327a <=( a3546a and a3535a );
a328a <=( a3526a and a3515a );
a329a <=( a3506a and a3495a );
a330a <=( a3486a and a3475a );
a331a <=( a3466a and a3455a );
a332a <=( a3446a and a3435a );
a333a <=( a3426a and a3415a );
a334a <=( a3406a and a3395a );
a335a <=( a3386a and a3375a );
a336a <=( a3366a and a3355a );
a337a <=( a3346a and a3335a );
a338a <=( a3326a and a3315a );
a339a <=( a3306a and a3295a );
a340a <=( a3286a and a3275a );
a341a <=( a3266a and a3255a );
a342a <=( a3246a and a3235a );
a343a <=( a3226a and a3215a );
a344a <=( a3206a and a3195a );
a345a <=( a3186a and a3177a );
a346a <=( a3168a and a3159a );
a347a <=( a3150a and a3141a );
a348a <=( a3132a and a3123a );
a349a <=( a3114a and a3105a );
a350a <=( a3096a and a3087a );
a351a <=( a3078a and a3069a );
a352a <=( a3060a and a3051a );
a353a <=( a3042a and a3033a );
a354a <=( a3024a and a3015a );
a355a <=( a3006a and a2997a );
a356a <=( a2988a and a2979a );
a357a <=( a2970a and a2961a );
a358a <=( a2952a and a2943a );
a359a <=( a2934a and a2925a );
a360a <=( a2916a and a2907a );
a361a <=( a2898a and a2889a );
a362a <=( a2880a and a2871a );
a363a <=( a2862a and a2853a );
a364a <=( a2844a and a2835a );
a365a <=( a2826a and a2817a );
a366a <=( a2808a and a2799a );
a367a <=( a2790a and a2781a );
a368a <=( a2772a and a2763a );
a369a <=( a2754a and a2745a );
a370a <=( a2736a and a2727a );
a371a <=( a2718a and a2709a );
a372a <=( a2700a and a2691a );
a373a <=( a2682a and a2673a );
a374a <=( a2664a and a2655a );
a375a <=( a2646a and a2637a );
a376a <=( a2628a and a2619a );
a377a <=( a2610a and a2601a );
a378a <=( a2592a and a2583a );
a379a <=( a2574a and a2565a );
a380a <=( a2556a and a2547a );
a381a <=( a2538a and a2529a );
a382a <=( a2520a and a2511a );
a383a <=( a2502a and a2493a );
a384a <=( a2484a and a2475a );
a385a <=( a2466a and a2457a );
a386a <=( a2448a and a2439a );
a387a <=( a2430a and a2421a );
a388a <=( a2412a and a2403a );
a389a <=( a2394a and a2385a );
a390a <=( a2376a and a2367a );
a391a <=( a2358a and a2349a );
a392a <=( a2340a and a2331a );
a393a <=( a2322a and a2313a );
a394a <=( a2304a and a2295a );
a395a <=( a2286a and a2277a );
a396a <=( a2268a and a2259a );
a397a <=( a2250a and a2241a );
a398a <=( a2232a and a2223a );
a399a <=( a2214a and a2205a );
a400a <=( a2196a and a2187a );
a401a <=( a2178a and a2169a );
a402a <=( a2160a and a2151a );
a403a <=( a2142a and a2133a );
a404a <=( a2124a and a2115a );
a405a <=( a2106a and a2097a );
a406a <=( a2088a and a2079a );
a407a <=( a2070a and a2061a );
a408a <=( a2052a and a2043a );
a409a <=( a2034a and a2025a );
a410a <=( a2016a and a2007a );
a411a <=( a1998a and a1989a );
a412a <=( a1980a and a1971a );
a413a <=( a1962a and a1953a );
a414a <=( a1944a and a1935a );
a415a <=( a1926a and a1917a );
a416a <=( a1908a and a1899a );
a417a <=( a1890a and a1881a );
a418a <=( a1874a and a1865a );
a419a <=( a1858a and a1849a );
a420a <=( a1842a and a1833a );
a421a <=( a1826a and a1819a );
a422a <=( a1812a and a1805a );
a423a <=( a1798a and a1791a );
a424a <=( a1784a and a1777a );
a425a <=( a1770a and a1763a );
a426a <=( a1756a and a1749a );
a427a <=( a1742a and a1735a );
a428a <=( a1728a and a1721a );
a429a <=( a1714a and a1707a );
a430a <=( a1700a and a1693a );
a431a <=( a1686a and a1679a );
a432a <=( a1672a and a1665a );
a433a <=( a1658a and a1651a );
a434a <=( a1644a and a1637a );
a435a <=( a1630a and a1623a );
a436a <=( a1616a and a1609a );
a437a <=( a1602a and a1595a );
a438a <=( a1588a and a1581a );
a439a <=( a1574a and a1567a );
a440a <=( a1560a and a1553a );
a441a <=( a1546a and a1539a );
a442a <=( a1532a and a1525a );
a443a <=( a1518a and a1511a );
a444a <=( a1504a and a1497a );
a445a <=( a1490a and a1483a );
a446a <=( a1478a and a1471a );
a447a <=( a1466a and a1459a );
a448a <=( a1454a and a1447a );
a449a <=( a1442a and a1437a );
a450a <=( a1432a and a1427a );
a451a <=( a1422a and a1417a );
a452a <=( a1412a and a1407a );
a453a <=( a1402a and a1397a );
a454a <=( a1392a and a1387a );
a455a <=( a1382a and a1377a );
a456a <=( a1374a and a1369a );
a460a <=( a454a ) or ( a455a );
a461a <=( a456a ) or ( a460a );
a464a <=( a452a ) or ( a453a );
a467a <=( a450a ) or ( a451a );
a468a <=( a467a ) or ( a464a );
a469a <=( a468a ) or ( a461a );
a473a <=( a447a ) or ( a448a );
a474a <=( a449a ) or ( a473a );
a477a <=( a445a ) or ( a446a );
a480a <=( a443a ) or ( a444a );
a481a <=( a480a ) or ( a477a );
a482a <=( a481a ) or ( a474a );
a483a <=( a482a ) or ( a469a );
a487a <=( a440a ) or ( a441a );
a488a <=( a442a ) or ( a487a );
a491a <=( a438a ) or ( a439a );
a494a <=( a436a ) or ( a437a );
a495a <=( a494a ) or ( a491a );
a496a <=( a495a ) or ( a488a );
a500a <=( a433a ) or ( a434a );
a501a <=( a435a ) or ( a500a );
a504a <=( a431a ) or ( a432a );
a507a <=( a429a ) or ( a430a );
a508a <=( a507a ) or ( a504a );
a509a <=( a508a ) or ( a501a );
a510a <=( a509a ) or ( a496a );
a511a <=( a510a ) or ( a483a );
a515a <=( a426a ) or ( a427a );
a516a <=( a428a ) or ( a515a );
a519a <=( a424a ) or ( a425a );
a522a <=( a422a ) or ( a423a );
a523a <=( a522a ) or ( a519a );
a524a <=( a523a ) or ( a516a );
a528a <=( a419a ) or ( a420a );
a529a <=( a421a ) or ( a528a );
a532a <=( a417a ) or ( a418a );
a535a <=( a415a ) or ( a416a );
a536a <=( a535a ) or ( a532a );
a537a <=( a536a ) or ( a529a );
a538a <=( a537a ) or ( a524a );
a542a <=( a412a ) or ( a413a );
a543a <=( a414a ) or ( a542a );
a546a <=( a410a ) or ( a411a );
a549a <=( a408a ) or ( a409a );
a550a <=( a549a ) or ( a546a );
a551a <=( a550a ) or ( a543a );
a554a <=( a406a ) or ( a407a );
a557a <=( a404a ) or ( a405a );
a558a <=( a557a ) or ( a554a );
a561a <=( a402a ) or ( a403a );
a564a <=( a400a ) or ( a401a );
a565a <=( a564a ) or ( a561a );
a566a <=( a565a ) or ( a558a );
a567a <=( a566a ) or ( a551a );
a568a <=( a567a ) or ( a538a );
a569a <=( a568a ) or ( a511a );
a573a <=( a397a ) or ( a398a );
a574a <=( a399a ) or ( a573a );
a577a <=( a395a ) or ( a396a );
a580a <=( a393a ) or ( a394a );
a581a <=( a580a ) or ( a577a );
a582a <=( a581a ) or ( a574a );
a586a <=( a390a ) or ( a391a );
a587a <=( a392a ) or ( a586a );
a590a <=( a388a ) or ( a389a );
a593a <=( a386a ) or ( a387a );
a594a <=( a593a ) or ( a590a );
a595a <=( a594a ) or ( a587a );
a596a <=( a595a ) or ( a582a );
a600a <=( a383a ) or ( a384a );
a601a <=( a385a ) or ( a600a );
a604a <=( a381a ) or ( a382a );
a607a <=( a379a ) or ( a380a );
a608a <=( a607a ) or ( a604a );
a609a <=( a608a ) or ( a601a );
a613a <=( a376a ) or ( a377a );
a614a <=( a378a ) or ( a613a );
a617a <=( a374a ) or ( a375a );
a620a <=( a372a ) or ( a373a );
a621a <=( a620a ) or ( a617a );
a622a <=( a621a ) or ( a614a );
a623a <=( a622a ) or ( a609a );
a624a <=( a623a ) or ( a596a );
a628a <=( a369a ) or ( a370a );
a629a <=( a371a ) or ( a628a );
a632a <=( a367a ) or ( a368a );
a635a <=( a365a ) or ( a366a );
a636a <=( a635a ) or ( a632a );
a637a <=( a636a ) or ( a629a );
a641a <=( a362a ) or ( a363a );
a642a <=( a364a ) or ( a641a );
a645a <=( a360a ) or ( a361a );
a648a <=( a358a ) or ( a359a );
a649a <=( a648a ) or ( a645a );
a650a <=( a649a ) or ( a642a );
a651a <=( a650a ) or ( a637a );
a655a <=( a355a ) or ( a356a );
a656a <=( a357a ) or ( a655a );
a659a <=( a353a ) or ( a354a );
a662a <=( a351a ) or ( a352a );
a663a <=( a662a ) or ( a659a );
a664a <=( a663a ) or ( a656a );
a667a <=( a349a ) or ( a350a );
a670a <=( a347a ) or ( a348a );
a671a <=( a670a ) or ( a667a );
a674a <=( a345a ) or ( a346a );
a677a <=( a343a ) or ( a344a );
a678a <=( a677a ) or ( a674a );
a679a <=( a678a ) or ( a671a );
a680a <=( a679a ) or ( a664a );
a681a <=( a680a ) or ( a651a );
a682a <=( a681a ) or ( a624a );
a683a <=( a682a ) or ( a569a );
a687a <=( a340a ) or ( a341a );
a688a <=( a342a ) or ( a687a );
a691a <=( a338a ) or ( a339a );
a694a <=( a336a ) or ( a337a );
a695a <=( a694a ) or ( a691a );
a696a <=( a695a ) or ( a688a );
a700a <=( a333a ) or ( a334a );
a701a <=( a335a ) or ( a700a );
a704a <=( a331a ) or ( a332a );
a707a <=( a329a ) or ( a330a );
a708a <=( a707a ) or ( a704a );
a709a <=( a708a ) or ( a701a );
a710a <=( a709a ) or ( a696a );
a714a <=( a326a ) or ( a327a );
a715a <=( a328a ) or ( a714a );
a718a <=( a324a ) or ( a325a );
a721a <=( a322a ) or ( a323a );
a722a <=( a721a ) or ( a718a );
a723a <=( a722a ) or ( a715a );
a727a <=( a319a ) or ( a320a );
a728a <=( a321a ) or ( a727a );
a731a <=( a317a ) or ( a318a );
a734a <=( a315a ) or ( a316a );
a735a <=( a734a ) or ( a731a );
a736a <=( a735a ) or ( a728a );
a737a <=( a736a ) or ( a723a );
a738a <=( a737a ) or ( a710a );
a742a <=( a312a ) or ( a313a );
a743a <=( a314a ) or ( a742a );
a746a <=( a310a ) or ( a311a );
a749a <=( a308a ) or ( a309a );
a750a <=( a749a ) or ( a746a );
a751a <=( a750a ) or ( a743a );
a755a <=( a305a ) or ( a306a );
a756a <=( a307a ) or ( a755a );
a759a <=( a303a ) or ( a304a );
a762a <=( a301a ) or ( a302a );
a763a <=( a762a ) or ( a759a );
a764a <=( a763a ) or ( a756a );
a765a <=( a764a ) or ( a751a );
a769a <=( a298a ) or ( a299a );
a770a <=( a300a ) or ( a769a );
a773a <=( a296a ) or ( a297a );
a776a <=( a294a ) or ( a295a );
a777a <=( a776a ) or ( a773a );
a778a <=( a777a ) or ( a770a );
a781a <=( a292a ) or ( a293a );
a784a <=( a290a ) or ( a291a );
a785a <=( a784a ) or ( a781a );
a788a <=( a288a ) or ( a289a );
a791a <=( a286a ) or ( a287a );
a792a <=( a791a ) or ( a788a );
a793a <=( a792a ) or ( a785a );
a794a <=( a793a ) or ( a778a );
a795a <=( a794a ) or ( a765a );
a796a <=( a795a ) or ( a738a );
a800a <=( a283a ) or ( a284a );
a801a <=( a285a ) or ( a800a );
a804a <=( a281a ) or ( a282a );
a807a <=( a279a ) or ( a280a );
a808a <=( a807a ) or ( a804a );
a809a <=( a808a ) or ( a801a );
a813a <=( a276a ) or ( a277a );
a814a <=( a278a ) or ( a813a );
a817a <=( a274a ) or ( a275a );
a820a <=( a272a ) or ( a273a );
a821a <=( a820a ) or ( a817a );
a822a <=( a821a ) or ( a814a );
a823a <=( a822a ) or ( a809a );
a827a <=( a269a ) or ( a270a );
a828a <=( a271a ) or ( a827a );
a831a <=( a267a ) or ( a268a );
a834a <=( a265a ) or ( a266a );
a835a <=( a834a ) or ( a831a );
a836a <=( a835a ) or ( a828a );
a840a <=( a262a ) or ( a263a );
a841a <=( a264a ) or ( a840a );
a844a <=( a260a ) or ( a261a );
a847a <=( a258a ) or ( a259a );
a848a <=( a847a ) or ( a844a );
a849a <=( a848a ) or ( a841a );
a850a <=( a849a ) or ( a836a );
a851a <=( a850a ) or ( a823a );
a855a <=( a255a ) or ( a256a );
a856a <=( a257a ) or ( a855a );
a859a <=( a253a ) or ( a254a );
a862a <=( a251a ) or ( a252a );
a863a <=( a862a ) or ( a859a );
a864a <=( a863a ) or ( a856a );
a868a <=( a248a ) or ( a249a );
a869a <=( a250a ) or ( a868a );
a872a <=( a246a ) or ( a247a );
a875a <=( a244a ) or ( a245a );
a876a <=( a875a ) or ( a872a );
a877a <=( a876a ) or ( a869a );
a878a <=( a877a ) or ( a864a );
a882a <=( a241a ) or ( a242a );
a883a <=( a243a ) or ( a882a );
a886a <=( a239a ) or ( a240a );
a889a <=( a237a ) or ( a238a );
a890a <=( a889a ) or ( a886a );
a891a <=( a890a ) or ( a883a );
a894a <=( a235a ) or ( a236a );
a897a <=( a233a ) or ( a234a );
a898a <=( a897a ) or ( a894a );
a901a <=( a231a ) or ( a232a );
a904a <=( a229a ) or ( a230a );
a905a <=( a904a ) or ( a901a );
a906a <=( a905a ) or ( a898a );
a907a <=( a906a ) or ( a891a );
a908a <=( a907a ) or ( a878a );
a909a <=( a908a ) or ( a851a );
a910a <=( a909a ) or ( a796a );
a911a <=( a910a ) or ( a683a );
a915a <=( a226a ) or ( a227a );
a916a <=( a228a ) or ( a915a );
a919a <=( a224a ) or ( a225a );
a922a <=( a222a ) or ( a223a );
a923a <=( a922a ) or ( a919a );
a924a <=( a923a ) or ( a916a );
a928a <=( a219a ) or ( a220a );
a929a <=( a221a ) or ( a928a );
a932a <=( a217a ) or ( a218a );
a935a <=( a215a ) or ( a216a );
a936a <=( a935a ) or ( a932a );
a937a <=( a936a ) or ( a929a );
a938a <=( a937a ) or ( a924a );
a942a <=( a212a ) or ( a213a );
a943a <=( a214a ) or ( a942a );
a946a <=( a210a ) or ( a211a );
a949a <=( a208a ) or ( a209a );
a950a <=( a949a ) or ( a946a );
a951a <=( a950a ) or ( a943a );
a955a <=( a205a ) or ( a206a );
a956a <=( a207a ) or ( a955a );
a959a <=( a203a ) or ( a204a );
a962a <=( a201a ) or ( a202a );
a963a <=( a962a ) or ( a959a );
a964a <=( a963a ) or ( a956a );
a965a <=( a964a ) or ( a951a );
a966a <=( a965a ) or ( a938a );
a970a <=( a198a ) or ( a199a );
a971a <=( a200a ) or ( a970a );
a974a <=( a196a ) or ( a197a );
a977a <=( a194a ) or ( a195a );
a978a <=( a977a ) or ( a974a );
a979a <=( a978a ) or ( a971a );
a983a <=( a191a ) or ( a192a );
a984a <=( a193a ) or ( a983a );
a987a <=( a189a ) or ( a190a );
a990a <=( a187a ) or ( a188a );
a991a <=( a990a ) or ( a987a );
a992a <=( a991a ) or ( a984a );
a993a <=( a992a ) or ( a979a );
a997a <=( a184a ) or ( a185a );
a998a <=( a186a ) or ( a997a );
a1001a <=( a182a ) or ( a183a );
a1004a <=( a180a ) or ( a181a );
a1005a <=( a1004a ) or ( a1001a );
a1006a <=( a1005a ) or ( a998a );
a1009a <=( a178a ) or ( a179a );
a1012a <=( a176a ) or ( a177a );
a1013a <=( a1012a ) or ( a1009a );
a1016a <=( a174a ) or ( a175a );
a1019a <=( a172a ) or ( a173a );
a1020a <=( a1019a ) or ( a1016a );
a1021a <=( a1020a ) or ( a1013a );
a1022a <=( a1021a ) or ( a1006a );
a1023a <=( a1022a ) or ( a993a );
a1024a <=( a1023a ) or ( a966a );
a1028a <=( a169a ) or ( a170a );
a1029a <=( a171a ) or ( a1028a );
a1032a <=( a167a ) or ( a168a );
a1035a <=( a165a ) or ( a166a );
a1036a <=( a1035a ) or ( a1032a );
a1037a <=( a1036a ) or ( a1029a );
a1041a <=( a162a ) or ( a163a );
a1042a <=( a164a ) or ( a1041a );
a1045a <=( a160a ) or ( a161a );
a1048a <=( a158a ) or ( a159a );
a1049a <=( a1048a ) or ( a1045a );
a1050a <=( a1049a ) or ( a1042a );
a1051a <=( a1050a ) or ( a1037a );
a1055a <=( a155a ) or ( a156a );
a1056a <=( a157a ) or ( a1055a );
a1059a <=( a153a ) or ( a154a );
a1062a <=( a151a ) or ( a152a );
a1063a <=( a1062a ) or ( a1059a );
a1064a <=( a1063a ) or ( a1056a );
a1068a <=( a148a ) or ( a149a );
a1069a <=( a150a ) or ( a1068a );
a1072a <=( a146a ) or ( a147a );
a1075a <=( a144a ) or ( a145a );
a1076a <=( a1075a ) or ( a1072a );
a1077a <=( a1076a ) or ( a1069a );
a1078a <=( a1077a ) or ( a1064a );
a1079a <=( a1078a ) or ( a1051a );
a1083a <=( a141a ) or ( a142a );
a1084a <=( a143a ) or ( a1083a );
a1087a <=( a139a ) or ( a140a );
a1090a <=( a137a ) or ( a138a );
a1091a <=( a1090a ) or ( a1087a );
a1092a <=( a1091a ) or ( a1084a );
a1096a <=( a134a ) or ( a135a );
a1097a <=( a136a ) or ( a1096a );
a1100a <=( a132a ) or ( a133a );
a1103a <=( a130a ) or ( a131a );
a1104a <=( a1103a ) or ( a1100a );
a1105a <=( a1104a ) or ( a1097a );
a1106a <=( a1105a ) or ( a1092a );
a1110a <=( a127a ) or ( a128a );
a1111a <=( a129a ) or ( a1110a );
a1114a <=( a125a ) or ( a126a );
a1117a <=( a123a ) or ( a124a );
a1118a <=( a1117a ) or ( a1114a );
a1119a <=( a1118a ) or ( a1111a );
a1122a <=( a121a ) or ( a122a );
a1125a <=( a119a ) or ( a120a );
a1126a <=( a1125a ) or ( a1122a );
a1129a <=( a117a ) or ( a118a );
a1132a <=( a115a ) or ( a116a );
a1133a <=( a1132a ) or ( a1129a );
a1134a <=( a1133a ) or ( a1126a );
a1135a <=( a1134a ) or ( a1119a );
a1136a <=( a1135a ) or ( a1106a );
a1137a <=( a1136a ) or ( a1079a );
a1138a <=( a1137a ) or ( a1024a );
a1142a <=( a112a ) or ( a113a );
a1143a <=( a114a ) or ( a1142a );
a1146a <=( a110a ) or ( a111a );
a1149a <=( a108a ) or ( a109a );
a1150a <=( a1149a ) or ( a1146a );
a1151a <=( a1150a ) or ( a1143a );
a1155a <=( a105a ) or ( a106a );
a1156a <=( a107a ) or ( a1155a );
a1159a <=( a103a ) or ( a104a );
a1162a <=( a101a ) or ( a102a );
a1163a <=( a1162a ) or ( a1159a );
a1164a <=( a1163a ) or ( a1156a );
a1165a <=( a1164a ) or ( a1151a );
a1169a <=( a98a ) or ( a99a );
a1170a <=( a100a ) or ( a1169a );
a1173a <=( a96a ) or ( a97a );
a1176a <=( a94a ) or ( a95a );
a1177a <=( a1176a ) or ( a1173a );
a1178a <=( a1177a ) or ( a1170a );
a1182a <=( a91a ) or ( a92a );
a1183a <=( a93a ) or ( a1182a );
a1186a <=( a89a ) or ( a90a );
a1189a <=( a87a ) or ( a88a );
a1190a <=( a1189a ) or ( a1186a );
a1191a <=( a1190a ) or ( a1183a );
a1192a <=( a1191a ) or ( a1178a );
a1193a <=( a1192a ) or ( a1165a );
a1197a <=( a84a ) or ( a85a );
a1198a <=( a86a ) or ( a1197a );
a1201a <=( a82a ) or ( a83a );
a1204a <=( a80a ) or ( a81a );
a1205a <=( a1204a ) or ( a1201a );
a1206a <=( a1205a ) or ( a1198a );
a1210a <=( a77a ) or ( a78a );
a1211a <=( a79a ) or ( a1210a );
a1214a <=( a75a ) or ( a76a );
a1217a <=( a73a ) or ( a74a );
a1218a <=( a1217a ) or ( a1214a );
a1219a <=( a1218a ) or ( a1211a );
a1220a <=( a1219a ) or ( a1206a );
a1224a <=( a70a ) or ( a71a );
a1225a <=( a72a ) or ( a1224a );
a1228a <=( a68a ) or ( a69a );
a1231a <=( a66a ) or ( a67a );
a1232a <=( a1231a ) or ( a1228a );
a1233a <=( a1232a ) or ( a1225a );
a1236a <=( a64a ) or ( a65a );
a1239a <=( a62a ) or ( a63a );
a1240a <=( a1239a ) or ( a1236a );
a1243a <=( a60a ) or ( a61a );
a1246a <=( a58a ) or ( a59a );
a1247a <=( a1246a ) or ( a1243a );
a1248a <=( a1247a ) or ( a1240a );
a1249a <=( a1248a ) or ( a1233a );
a1250a <=( a1249a ) or ( a1220a );
a1251a <=( a1250a ) or ( a1193a );
a1255a <=( a55a ) or ( a56a );
a1256a <=( a57a ) or ( a1255a );
a1259a <=( a53a ) or ( a54a );
a1262a <=( a51a ) or ( a52a );
a1263a <=( a1262a ) or ( a1259a );
a1264a <=( a1263a ) or ( a1256a );
a1268a <=( a48a ) or ( a49a );
a1269a <=( a50a ) or ( a1268a );
a1272a <=( a46a ) or ( a47a );
a1275a <=( a44a ) or ( a45a );
a1276a <=( a1275a ) or ( a1272a );
a1277a <=( a1276a ) or ( a1269a );
a1278a <=( a1277a ) or ( a1264a );
a1282a <=( a41a ) or ( a42a );
a1283a <=( a43a ) or ( a1282a );
a1286a <=( a39a ) or ( a40a );
a1289a <=( a37a ) or ( a38a );
a1290a <=( a1289a ) or ( a1286a );
a1291a <=( a1290a ) or ( a1283a );
a1295a <=( a34a ) or ( a35a );
a1296a <=( a36a ) or ( a1295a );
a1299a <=( a32a ) or ( a33a );
a1302a <=( a30a ) or ( a31a );
a1303a <=( a1302a ) or ( a1299a );
a1304a <=( a1303a ) or ( a1296a );
a1305a <=( a1304a ) or ( a1291a );
a1306a <=( a1305a ) or ( a1278a );
a1310a <=( a27a ) or ( a28a );
a1311a <=( a29a ) or ( a1310a );
a1314a <=( a25a ) or ( a26a );
a1317a <=( a23a ) or ( a24a );
a1318a <=( a1317a ) or ( a1314a );
a1319a <=( a1318a ) or ( a1311a );
a1323a <=( a20a ) or ( a21a );
a1324a <=( a22a ) or ( a1323a );
a1327a <=( a18a ) or ( a19a );
a1330a <=( a16a ) or ( a17a );
a1331a <=( a1330a ) or ( a1327a );
a1332a <=( a1331a ) or ( a1324a );
a1333a <=( a1332a ) or ( a1319a );
a1337a <=( a13a ) or ( a14a );
a1338a <=( a15a ) or ( a1337a );
a1341a <=( a11a ) or ( a12a );
a1344a <=( a9a ) or ( a10a );
a1345a <=( a1344a ) or ( a1341a );
a1346a <=( a1345a ) or ( a1338a );
a1349a <=( a7a ) or ( a8a );
a1352a <=( a5a ) or ( a6a );
a1353a <=( a1352a ) or ( a1349a );
a1356a <=( a3a ) or ( a4a );
a1359a <=( a1a ) or ( a2a );
a1360a <=( a1359a ) or ( a1356a );
a1361a <=( a1360a ) or ( a1353a );
a1362a <=( a1361a ) or ( a1346a );
a1363a <=( a1362a ) or ( a1333a );
a1364a <=( a1363a ) or ( a1306a );
a1365a <=( a1364a ) or ( a1251a );
a1366a <=( a1365a ) or ( a1138a );
a1369a <=( (not A167) and A170 );
a1373a <=( A200 and (not A199) );
a1374a <=( (not A166) and a1373a );
a1377a <=( (not A167) and (not A169) );
a1381a <=( A200 and (not A199) );
a1382a <=( (not A166) and a1381a );
a1386a <=( A167 and (not A168) );
a1387a <=( A170 and a1386a );
a1391a <=( A200 and (not A199) );
a1392a <=( A166 and a1391a );
a1396a <=( A167 and (not A168) );
a1397a <=( (not A170) and a1396a );
a1401a <=( A200 and (not A199) );
a1402a <=( (not A166) and a1401a );
a1406a <=( (not A167) and (not A168) );
a1407a <=( (not A170) and a1406a );
a1411a <=( A200 and (not A199) );
a1412a <=( A166 and a1411a );
a1416a <=( A167 and (not A168) );
a1417a <=( A169 and a1416a );
a1421a <=( A200 and (not A199) );
a1422a <=( (not A166) and a1421a );
a1426a <=( (not A167) and (not A168) );
a1427a <=( A169 and a1426a );
a1431a <=( A200 and (not A199) );
a1432a <=( A166 and a1431a );
a1436a <=( A167 and (not A168) );
a1437a <=( (not A169) and a1436a );
a1441a <=( A200 and (not A199) );
a1442a <=( A166 and a1441a );
a1446a <=( (not A166) and (not A167) );
a1447a <=( A170 and a1446a );
a1450a <=( (not A200) and A199 );
a1453a <=( A202 and A201 );
a1454a <=( a1453a and a1450a );
a1458a <=( (not A166) and (not A167) );
a1459a <=( A170 and a1458a );
a1462a <=( (not A200) and A199 );
a1465a <=( A203 and A201 );
a1466a <=( a1465a and a1462a );
a1470a <=( (not A166) and (not A167) );
a1471a <=( (not A169) and a1470a );
a1474a <=( (not A200) and A199 );
a1477a <=( A202 and A201 );
a1478a <=( a1477a and a1474a );
a1482a <=( (not A166) and (not A167) );
a1483a <=( (not A169) and a1482a );
a1486a <=( (not A200) and A199 );
a1489a <=( A203 and A201 );
a1490a <=( a1489a and a1486a );
a1493a <=( A166 and A168 );
a1496a <=( (not A201) and A199 );
a1497a <=( a1496a and a1493a );
a1500a <=( A233 and (not A232) );
a1503a <=( A299 and (not A298) );
a1504a <=( a1503a and a1500a );
a1507a <=( A166 and A168 );
a1510a <=( (not A201) and A199 );
a1511a <=( a1510a and a1507a );
a1514a <=( A233 and (not A232) );
a1517a <=( A266 and (not A265) );
a1518a <=( a1517a and a1514a );
a1521a <=( A166 and A168 );
a1524a <=( A200 and A199 );
a1525a <=( a1524a and a1521a );
a1528a <=( A233 and (not A232) );
a1531a <=( A299 and (not A298) );
a1532a <=( a1531a and a1528a );
a1535a <=( A166 and A168 );
a1538a <=( A200 and A199 );
a1539a <=( a1538a and a1535a );
a1542a <=( A233 and (not A232) );
a1545a <=( A266 and (not A265) );
a1546a <=( a1545a and a1542a );
a1549a <=( A166 and A168 );
a1552a <=( (not A200) and (not A199) );
a1553a <=( a1552a and a1549a );
a1556a <=( A233 and (not A232) );
a1559a <=( A299 and (not A298) );
a1560a <=( a1559a and a1556a );
a1563a <=( A166 and A168 );
a1566a <=( (not A200) and (not A199) );
a1567a <=( a1566a and a1563a );
a1570a <=( A233 and (not A232) );
a1573a <=( A266 and (not A265) );
a1574a <=( a1573a and a1570a );
a1577a <=( A167 and A168 );
a1580a <=( (not A201) and A199 );
a1581a <=( a1580a and a1577a );
a1584a <=( A233 and (not A232) );
a1587a <=( A299 and (not A298) );
a1588a <=( a1587a and a1584a );
a1591a <=( A167 and A168 );
a1594a <=( (not A201) and A199 );
a1595a <=( a1594a and a1591a );
a1598a <=( A233 and (not A232) );
a1601a <=( A266 and (not A265) );
a1602a <=( a1601a and a1598a );
a1605a <=( A167 and A168 );
a1608a <=( A200 and A199 );
a1609a <=( a1608a and a1605a );
a1612a <=( A233 and (not A232) );
a1615a <=( A299 and (not A298) );
a1616a <=( a1615a and a1612a );
a1619a <=( A167 and A168 );
a1622a <=( A200 and A199 );
a1623a <=( a1622a and a1619a );
a1626a <=( A233 and (not A232) );
a1629a <=( A266 and (not A265) );
a1630a <=( a1629a and a1626a );
a1633a <=( A167 and A168 );
a1636a <=( (not A200) and (not A199) );
a1637a <=( a1636a and a1633a );
a1640a <=( A233 and (not A232) );
a1643a <=( A299 and (not A298) );
a1644a <=( a1643a and a1640a );
a1647a <=( A167 and A168 );
a1650a <=( (not A200) and (not A199) );
a1651a <=( a1650a and a1647a );
a1654a <=( A233 and (not A232) );
a1657a <=( A266 and (not A265) );
a1658a <=( a1657a and a1654a );
a1661a <=( (not A168) and A170 );
a1664a <=( A166 and A167 );
a1665a <=( a1664a and a1661a );
a1668a <=( (not A200) and A199 );
a1671a <=( A202 and A201 );
a1672a <=( a1671a and a1668a );
a1675a <=( (not A168) and A170 );
a1678a <=( A166 and A167 );
a1679a <=( a1678a and a1675a );
a1682a <=( (not A200) and A199 );
a1685a <=( A203 and A201 );
a1686a <=( a1685a and a1682a );
a1689a <=( (not A168) and (not A170) );
a1692a <=( (not A166) and A167 );
a1693a <=( a1692a and a1689a );
a1696a <=( (not A200) and A199 );
a1699a <=( A202 and A201 );
a1700a <=( a1699a and a1696a );
a1703a <=( (not A168) and (not A170) );
a1706a <=( (not A166) and A167 );
a1707a <=( a1706a and a1703a );
a1710a <=( (not A200) and A199 );
a1713a <=( A203 and A201 );
a1714a <=( a1713a and a1710a );
a1717a <=( (not A168) and (not A170) );
a1720a <=( A166 and (not A167) );
a1721a <=( a1720a and a1717a );
a1724a <=( (not A200) and A199 );
a1727a <=( A202 and A201 );
a1728a <=( a1727a and a1724a );
a1731a <=( (not A168) and (not A170) );
a1734a <=( A166 and (not A167) );
a1735a <=( a1734a and a1731a );
a1738a <=( (not A200) and A199 );
a1741a <=( A203 and A201 );
a1742a <=( a1741a and a1738a );
a1745a <=( (not A168) and A169 );
a1748a <=( (not A166) and A167 );
a1749a <=( a1748a and a1745a );
a1752a <=( (not A200) and A199 );
a1755a <=( A202 and A201 );
a1756a <=( a1755a and a1752a );
a1759a <=( (not A168) and A169 );
a1762a <=( (not A166) and A167 );
a1763a <=( a1762a and a1759a );
a1766a <=( (not A200) and A199 );
a1769a <=( A203 and A201 );
a1770a <=( a1769a and a1766a );
a1773a <=( (not A168) and A169 );
a1776a <=( A166 and (not A167) );
a1777a <=( a1776a and a1773a );
a1780a <=( (not A200) and A199 );
a1783a <=( A202 and A201 );
a1784a <=( a1783a and a1780a );
a1787a <=( (not A168) and A169 );
a1790a <=( A166 and (not A167) );
a1791a <=( a1790a and a1787a );
a1794a <=( (not A200) and A199 );
a1797a <=( A203 and A201 );
a1798a <=( a1797a and a1794a );
a1801a <=( (not A168) and (not A169) );
a1804a <=( A166 and A167 );
a1805a <=( a1804a and a1801a );
a1808a <=( (not A200) and A199 );
a1811a <=( A202 and A201 );
a1812a <=( a1811a and a1808a );
a1815a <=( (not A168) and (not A169) );
a1818a <=( A166 and A167 );
a1819a <=( a1818a and a1815a );
a1822a <=( (not A200) and A199 );
a1825a <=( A203 and A201 );
a1826a <=( a1825a and a1822a );
a1829a <=( A166 and A168 );
a1832a <=( (not A202) and A199 );
a1833a <=( a1832a and a1829a );
a1836a <=( (not A232) and (not A203) );
a1840a <=( A299 and (not A298) );
a1841a <=( A233 and a1840a );
a1842a <=( a1841a and a1836a );
a1845a <=( A166 and A168 );
a1848a <=( (not A202) and A199 );
a1849a <=( a1848a and a1845a );
a1852a <=( (not A232) and (not A203) );
a1856a <=( A266 and (not A265) );
a1857a <=( A233 and a1856a );
a1858a <=( a1857a and a1852a );
a1861a <=( A167 and A168 );
a1864a <=( (not A202) and A199 );
a1865a <=( a1864a and a1861a );
a1868a <=( (not A232) and (not A203) );
a1872a <=( A299 and (not A298) );
a1873a <=( A233 and a1872a );
a1874a <=( a1873a and a1868a );
a1877a <=( A167 and A168 );
a1880a <=( (not A202) and A199 );
a1881a <=( a1880a and a1877a );
a1884a <=( (not A232) and (not A203) );
a1888a <=( A266 and (not A265) );
a1889a <=( A233 and a1888a );
a1890a <=( a1889a and a1884a );
a1893a <=( A166 and A168 );
a1897a <=( (not A232) and (not A201) );
a1898a <=( A199 and a1897a );
a1899a <=( a1898a and a1893a );
a1902a <=( A298 and A233 );
a1906a <=( A301 and A300 );
a1907a <=( (not A299) and a1906a );
a1908a <=( a1907a and a1902a );
a1911a <=( A166 and A168 );
a1915a <=( (not A232) and (not A201) );
a1916a <=( A199 and a1915a );
a1917a <=( a1916a and a1911a );
a1920a <=( A298 and A233 );
a1924a <=( A302 and A300 );
a1925a <=( (not A299) and a1924a );
a1926a <=( a1925a and a1920a );
a1929a <=( A166 and A168 );
a1933a <=( (not A232) and (not A201) );
a1934a <=( A199 and a1933a );
a1935a <=( a1934a and a1929a );
a1938a <=( A265 and A233 );
a1942a <=( A268 and A267 );
a1943a <=( (not A266) and a1942a );
a1944a <=( a1943a and a1938a );
a1947a <=( A166 and A168 );
a1951a <=( (not A232) and (not A201) );
a1952a <=( A199 and a1951a );
a1953a <=( a1952a and a1947a );
a1956a <=( A265 and A233 );
a1960a <=( A269 and A267 );
a1961a <=( (not A266) and a1960a );
a1962a <=( a1961a and a1956a );
a1965a <=( A166 and A168 );
a1969a <=( A232 and (not A201) );
a1970a <=( A199 and a1969a );
a1971a <=( a1970a and a1965a );
a1974a <=( A234 and (not A233) );
a1978a <=( A299 and (not A298) );
a1979a <=( A235 and a1978a );
a1980a <=( a1979a and a1974a );
a1983a <=( A166 and A168 );
a1987a <=( A232 and (not A201) );
a1988a <=( A199 and a1987a );
a1989a <=( a1988a and a1983a );
a1992a <=( A234 and (not A233) );
a1996a <=( A266 and (not A265) );
a1997a <=( A235 and a1996a );
a1998a <=( a1997a and a1992a );
a2001a <=( A166 and A168 );
a2005a <=( A232 and (not A201) );
a2006a <=( A199 and a2005a );
a2007a <=( a2006a and a2001a );
a2010a <=( A234 and (not A233) );
a2014a <=( A299 and (not A298) );
a2015a <=( A236 and a2014a );
a2016a <=( a2015a and a2010a );
a2019a <=( A166 and A168 );
a2023a <=( A232 and (not A201) );
a2024a <=( A199 and a2023a );
a2025a <=( a2024a and a2019a );
a2028a <=( A234 and (not A233) );
a2032a <=( A266 and (not A265) );
a2033a <=( A236 and a2032a );
a2034a <=( a2033a and a2028a );
a2037a <=( A166 and A168 );
a2041a <=( (not A232) and A200 );
a2042a <=( A199 and a2041a );
a2043a <=( a2042a and a2037a );
a2046a <=( A298 and A233 );
a2050a <=( A301 and A300 );
a2051a <=( (not A299) and a2050a );
a2052a <=( a2051a and a2046a );
a2055a <=( A166 and A168 );
a2059a <=( (not A232) and A200 );
a2060a <=( A199 and a2059a );
a2061a <=( a2060a and a2055a );
a2064a <=( A298 and A233 );
a2068a <=( A302 and A300 );
a2069a <=( (not A299) and a2068a );
a2070a <=( a2069a and a2064a );
a2073a <=( A166 and A168 );
a2077a <=( (not A232) and A200 );
a2078a <=( A199 and a2077a );
a2079a <=( a2078a and a2073a );
a2082a <=( A265 and A233 );
a2086a <=( A268 and A267 );
a2087a <=( (not A266) and a2086a );
a2088a <=( a2087a and a2082a );
a2091a <=( A166 and A168 );
a2095a <=( (not A232) and A200 );
a2096a <=( A199 and a2095a );
a2097a <=( a2096a and a2091a );
a2100a <=( A265 and A233 );
a2104a <=( A269 and A267 );
a2105a <=( (not A266) and a2104a );
a2106a <=( a2105a and a2100a );
a2109a <=( A166 and A168 );
a2113a <=( A232 and A200 );
a2114a <=( A199 and a2113a );
a2115a <=( a2114a and a2109a );
a2118a <=( A234 and (not A233) );
a2122a <=( A299 and (not A298) );
a2123a <=( A235 and a2122a );
a2124a <=( a2123a and a2118a );
a2127a <=( A166 and A168 );
a2131a <=( A232 and A200 );
a2132a <=( A199 and a2131a );
a2133a <=( a2132a and a2127a );
a2136a <=( A234 and (not A233) );
a2140a <=( A266 and (not A265) );
a2141a <=( A235 and a2140a );
a2142a <=( a2141a and a2136a );
a2145a <=( A166 and A168 );
a2149a <=( A232 and A200 );
a2150a <=( A199 and a2149a );
a2151a <=( a2150a and a2145a );
a2154a <=( A234 and (not A233) );
a2158a <=( A299 and (not A298) );
a2159a <=( A236 and a2158a );
a2160a <=( a2159a and a2154a );
a2163a <=( A166 and A168 );
a2167a <=( A232 and A200 );
a2168a <=( A199 and a2167a );
a2169a <=( a2168a and a2163a );
a2172a <=( A234 and (not A233) );
a2176a <=( A266 and (not A265) );
a2177a <=( A236 and a2176a );
a2178a <=( a2177a and a2172a );
a2181a <=( A166 and A168 );
a2185a <=( (not A232) and (not A200) );
a2186a <=( (not A199) and a2185a );
a2187a <=( a2186a and a2181a );
a2190a <=( A298 and A233 );
a2194a <=( A301 and A300 );
a2195a <=( (not A299) and a2194a );
a2196a <=( a2195a and a2190a );
a2199a <=( A166 and A168 );
a2203a <=( (not A232) and (not A200) );
a2204a <=( (not A199) and a2203a );
a2205a <=( a2204a and a2199a );
a2208a <=( A298 and A233 );
a2212a <=( A302 and A300 );
a2213a <=( (not A299) and a2212a );
a2214a <=( a2213a and a2208a );
a2217a <=( A166 and A168 );
a2221a <=( (not A232) and (not A200) );
a2222a <=( (not A199) and a2221a );
a2223a <=( a2222a and a2217a );
a2226a <=( A265 and A233 );
a2230a <=( A268 and A267 );
a2231a <=( (not A266) and a2230a );
a2232a <=( a2231a and a2226a );
a2235a <=( A166 and A168 );
a2239a <=( (not A232) and (not A200) );
a2240a <=( (not A199) and a2239a );
a2241a <=( a2240a and a2235a );
a2244a <=( A265 and A233 );
a2248a <=( A269 and A267 );
a2249a <=( (not A266) and a2248a );
a2250a <=( a2249a and a2244a );
a2253a <=( A166 and A168 );
a2257a <=( A232 and (not A200) );
a2258a <=( (not A199) and a2257a );
a2259a <=( a2258a and a2253a );
a2262a <=( A234 and (not A233) );
a2266a <=( A299 and (not A298) );
a2267a <=( A235 and a2266a );
a2268a <=( a2267a and a2262a );
a2271a <=( A166 and A168 );
a2275a <=( A232 and (not A200) );
a2276a <=( (not A199) and a2275a );
a2277a <=( a2276a and a2271a );
a2280a <=( A234 and (not A233) );
a2284a <=( A266 and (not A265) );
a2285a <=( A235 and a2284a );
a2286a <=( a2285a and a2280a );
a2289a <=( A166 and A168 );
a2293a <=( A232 and (not A200) );
a2294a <=( (not A199) and a2293a );
a2295a <=( a2294a and a2289a );
a2298a <=( A234 and (not A233) );
a2302a <=( A299 and (not A298) );
a2303a <=( A236 and a2302a );
a2304a <=( a2303a and a2298a );
a2307a <=( A166 and A168 );
a2311a <=( A232 and (not A200) );
a2312a <=( (not A199) and a2311a );
a2313a <=( a2312a and a2307a );
a2316a <=( A234 and (not A233) );
a2320a <=( A266 and (not A265) );
a2321a <=( A236 and a2320a );
a2322a <=( a2321a and a2316a );
a2325a <=( A167 and A168 );
a2329a <=( (not A232) and (not A201) );
a2330a <=( A199 and a2329a );
a2331a <=( a2330a and a2325a );
a2334a <=( A298 and A233 );
a2338a <=( A301 and A300 );
a2339a <=( (not A299) and a2338a );
a2340a <=( a2339a and a2334a );
a2343a <=( A167 and A168 );
a2347a <=( (not A232) and (not A201) );
a2348a <=( A199 and a2347a );
a2349a <=( a2348a and a2343a );
a2352a <=( A298 and A233 );
a2356a <=( A302 and A300 );
a2357a <=( (not A299) and a2356a );
a2358a <=( a2357a and a2352a );
a2361a <=( A167 and A168 );
a2365a <=( (not A232) and (not A201) );
a2366a <=( A199 and a2365a );
a2367a <=( a2366a and a2361a );
a2370a <=( A265 and A233 );
a2374a <=( A268 and A267 );
a2375a <=( (not A266) and a2374a );
a2376a <=( a2375a and a2370a );
a2379a <=( A167 and A168 );
a2383a <=( (not A232) and (not A201) );
a2384a <=( A199 and a2383a );
a2385a <=( a2384a and a2379a );
a2388a <=( A265 and A233 );
a2392a <=( A269 and A267 );
a2393a <=( (not A266) and a2392a );
a2394a <=( a2393a and a2388a );
a2397a <=( A167 and A168 );
a2401a <=( A232 and (not A201) );
a2402a <=( A199 and a2401a );
a2403a <=( a2402a and a2397a );
a2406a <=( A234 and (not A233) );
a2410a <=( A299 and (not A298) );
a2411a <=( A235 and a2410a );
a2412a <=( a2411a and a2406a );
a2415a <=( A167 and A168 );
a2419a <=( A232 and (not A201) );
a2420a <=( A199 and a2419a );
a2421a <=( a2420a and a2415a );
a2424a <=( A234 and (not A233) );
a2428a <=( A266 and (not A265) );
a2429a <=( A235 and a2428a );
a2430a <=( a2429a and a2424a );
a2433a <=( A167 and A168 );
a2437a <=( A232 and (not A201) );
a2438a <=( A199 and a2437a );
a2439a <=( a2438a and a2433a );
a2442a <=( A234 and (not A233) );
a2446a <=( A299 and (not A298) );
a2447a <=( A236 and a2446a );
a2448a <=( a2447a and a2442a );
a2451a <=( A167 and A168 );
a2455a <=( A232 and (not A201) );
a2456a <=( A199 and a2455a );
a2457a <=( a2456a and a2451a );
a2460a <=( A234 and (not A233) );
a2464a <=( A266 and (not A265) );
a2465a <=( A236 and a2464a );
a2466a <=( a2465a and a2460a );
a2469a <=( A167 and A168 );
a2473a <=( (not A232) and A200 );
a2474a <=( A199 and a2473a );
a2475a <=( a2474a and a2469a );
a2478a <=( A298 and A233 );
a2482a <=( A301 and A300 );
a2483a <=( (not A299) and a2482a );
a2484a <=( a2483a and a2478a );
a2487a <=( A167 and A168 );
a2491a <=( (not A232) and A200 );
a2492a <=( A199 and a2491a );
a2493a <=( a2492a and a2487a );
a2496a <=( A298 and A233 );
a2500a <=( A302 and A300 );
a2501a <=( (not A299) and a2500a );
a2502a <=( a2501a and a2496a );
a2505a <=( A167 and A168 );
a2509a <=( (not A232) and A200 );
a2510a <=( A199 and a2509a );
a2511a <=( a2510a and a2505a );
a2514a <=( A265 and A233 );
a2518a <=( A268 and A267 );
a2519a <=( (not A266) and a2518a );
a2520a <=( a2519a and a2514a );
a2523a <=( A167 and A168 );
a2527a <=( (not A232) and A200 );
a2528a <=( A199 and a2527a );
a2529a <=( a2528a and a2523a );
a2532a <=( A265 and A233 );
a2536a <=( A269 and A267 );
a2537a <=( (not A266) and a2536a );
a2538a <=( a2537a and a2532a );
a2541a <=( A167 and A168 );
a2545a <=( A232 and A200 );
a2546a <=( A199 and a2545a );
a2547a <=( a2546a and a2541a );
a2550a <=( A234 and (not A233) );
a2554a <=( A299 and (not A298) );
a2555a <=( A235 and a2554a );
a2556a <=( a2555a and a2550a );
a2559a <=( A167 and A168 );
a2563a <=( A232 and A200 );
a2564a <=( A199 and a2563a );
a2565a <=( a2564a and a2559a );
a2568a <=( A234 and (not A233) );
a2572a <=( A266 and (not A265) );
a2573a <=( A235 and a2572a );
a2574a <=( a2573a and a2568a );
a2577a <=( A167 and A168 );
a2581a <=( A232 and A200 );
a2582a <=( A199 and a2581a );
a2583a <=( a2582a and a2577a );
a2586a <=( A234 and (not A233) );
a2590a <=( A299 and (not A298) );
a2591a <=( A236 and a2590a );
a2592a <=( a2591a and a2586a );
a2595a <=( A167 and A168 );
a2599a <=( A232 and A200 );
a2600a <=( A199 and a2599a );
a2601a <=( a2600a and a2595a );
a2604a <=( A234 and (not A233) );
a2608a <=( A266 and (not A265) );
a2609a <=( A236 and a2608a );
a2610a <=( a2609a and a2604a );
a2613a <=( A167 and A168 );
a2617a <=( (not A232) and (not A200) );
a2618a <=( (not A199) and a2617a );
a2619a <=( a2618a and a2613a );
a2622a <=( A298 and A233 );
a2626a <=( A301 and A300 );
a2627a <=( (not A299) and a2626a );
a2628a <=( a2627a and a2622a );
a2631a <=( A167 and A168 );
a2635a <=( (not A232) and (not A200) );
a2636a <=( (not A199) and a2635a );
a2637a <=( a2636a and a2631a );
a2640a <=( A298 and A233 );
a2644a <=( A302 and A300 );
a2645a <=( (not A299) and a2644a );
a2646a <=( a2645a and a2640a );
a2649a <=( A167 and A168 );
a2653a <=( (not A232) and (not A200) );
a2654a <=( (not A199) and a2653a );
a2655a <=( a2654a and a2649a );
a2658a <=( A265 and A233 );
a2662a <=( A268 and A267 );
a2663a <=( (not A266) and a2662a );
a2664a <=( a2663a and a2658a );
a2667a <=( A167 and A168 );
a2671a <=( (not A232) and (not A200) );
a2672a <=( (not A199) and a2671a );
a2673a <=( a2672a and a2667a );
a2676a <=( A265 and A233 );
a2680a <=( A269 and A267 );
a2681a <=( (not A266) and a2680a );
a2682a <=( a2681a and a2676a );
a2685a <=( A167 and A168 );
a2689a <=( A232 and (not A200) );
a2690a <=( (not A199) and a2689a );
a2691a <=( a2690a and a2685a );
a2694a <=( A234 and (not A233) );
a2698a <=( A299 and (not A298) );
a2699a <=( A235 and a2698a );
a2700a <=( a2699a and a2694a );
a2703a <=( A167 and A168 );
a2707a <=( A232 and (not A200) );
a2708a <=( (not A199) and a2707a );
a2709a <=( a2708a and a2703a );
a2712a <=( A234 and (not A233) );
a2716a <=( A266 and (not A265) );
a2717a <=( A235 and a2716a );
a2718a <=( a2717a and a2712a );
a2721a <=( A167 and A168 );
a2725a <=( A232 and (not A200) );
a2726a <=( (not A199) and a2725a );
a2727a <=( a2726a and a2721a );
a2730a <=( A234 and (not A233) );
a2734a <=( A299 and (not A298) );
a2735a <=( A236 and a2734a );
a2736a <=( a2735a and a2730a );
a2739a <=( A167 and A168 );
a2743a <=( A232 and (not A200) );
a2744a <=( (not A199) and a2743a );
a2745a <=( a2744a and a2739a );
a2748a <=( A234 and (not A233) );
a2752a <=( A266 and (not A265) );
a2753a <=( A236 and a2752a );
a2754a <=( a2753a and a2748a );
a2757a <=( A169 and (not A170) );
a2761a <=( A199 and A166 );
a2762a <=( A167 and a2761a );
a2763a <=( a2762a and a2757a );
a2766a <=( (not A232) and (not A201) );
a2770a <=( A299 and (not A298) );
a2771a <=( A233 and a2770a );
a2772a <=( a2771a and a2766a );
a2775a <=( A169 and (not A170) );
a2779a <=( A199 and A166 );
a2780a <=( A167 and a2779a );
a2781a <=( a2780a and a2775a );
a2784a <=( (not A232) and (not A201) );
a2788a <=( A266 and (not A265) );
a2789a <=( A233 and a2788a );
a2790a <=( a2789a and a2784a );
a2793a <=( A169 and (not A170) );
a2797a <=( A199 and A166 );
a2798a <=( A167 and a2797a );
a2799a <=( a2798a and a2793a );
a2802a <=( (not A232) and A200 );
a2806a <=( A299 and (not A298) );
a2807a <=( A233 and a2806a );
a2808a <=( a2807a and a2802a );
a2811a <=( A169 and (not A170) );
a2815a <=( A199 and A166 );
a2816a <=( A167 and a2815a );
a2817a <=( a2816a and a2811a );
a2820a <=( (not A232) and A200 );
a2824a <=( A266 and (not A265) );
a2825a <=( A233 and a2824a );
a2826a <=( a2825a and a2820a );
a2829a <=( A169 and (not A170) );
a2833a <=( (not A199) and A166 );
a2834a <=( A167 and a2833a );
a2835a <=( a2834a and a2829a );
a2838a <=( (not A232) and (not A200) );
a2842a <=( A299 and (not A298) );
a2843a <=( A233 and a2842a );
a2844a <=( a2843a and a2838a );
a2847a <=( A169 and (not A170) );
a2851a <=( (not A199) and A166 );
a2852a <=( A167 and a2851a );
a2853a <=( a2852a and a2847a );
a2856a <=( (not A232) and (not A200) );
a2860a <=( A266 and (not A265) );
a2861a <=( A233 and a2860a );
a2862a <=( a2861a and a2856a );
a2865a <=( A169 and (not A170) );
a2869a <=( A199 and (not A166) );
a2870a <=( (not A167) and a2869a );
a2871a <=( a2870a and a2865a );
a2874a <=( (not A232) and (not A201) );
a2878a <=( A299 and (not A298) );
a2879a <=( A233 and a2878a );
a2880a <=( a2879a and a2874a );
a2883a <=( A169 and (not A170) );
a2887a <=( A199 and (not A166) );
a2888a <=( (not A167) and a2887a );
a2889a <=( a2888a and a2883a );
a2892a <=( (not A232) and (not A201) );
a2896a <=( A266 and (not A265) );
a2897a <=( A233 and a2896a );
a2898a <=( a2897a and a2892a );
a2901a <=( A169 and (not A170) );
a2905a <=( A199 and (not A166) );
a2906a <=( (not A167) and a2905a );
a2907a <=( a2906a and a2901a );
a2910a <=( (not A232) and A200 );
a2914a <=( A299 and (not A298) );
a2915a <=( A233 and a2914a );
a2916a <=( a2915a and a2910a );
a2919a <=( A169 and (not A170) );
a2923a <=( A199 and (not A166) );
a2924a <=( (not A167) and a2923a );
a2925a <=( a2924a and a2919a );
a2928a <=( (not A232) and A200 );
a2932a <=( A266 and (not A265) );
a2933a <=( A233 and a2932a );
a2934a <=( a2933a and a2928a );
a2937a <=( A169 and (not A170) );
a2941a <=( (not A199) and (not A166) );
a2942a <=( (not A167) and a2941a );
a2943a <=( a2942a and a2937a );
a2946a <=( (not A232) and (not A200) );
a2950a <=( A299 and (not A298) );
a2951a <=( A233 and a2950a );
a2952a <=( a2951a and a2946a );
a2955a <=( A169 and (not A170) );
a2959a <=( (not A199) and (not A166) );
a2960a <=( (not A167) and a2959a );
a2961a <=( a2960a and a2955a );
a2964a <=( (not A232) and (not A200) );
a2968a <=( A266 and (not A265) );
a2969a <=( A233 and a2968a );
a2970a <=( a2969a and a2964a );
a2973a <=( (not A169) and A170 );
a2977a <=( A199 and (not A166) );
a2978a <=( A167 and a2977a );
a2979a <=( a2978a and a2973a );
a2982a <=( (not A232) and (not A201) );
a2986a <=( A299 and (not A298) );
a2987a <=( A233 and a2986a );
a2988a <=( a2987a and a2982a );
a2991a <=( (not A169) and A170 );
a2995a <=( A199 and (not A166) );
a2996a <=( A167 and a2995a );
a2997a <=( a2996a and a2991a );
a3000a <=( (not A232) and (not A201) );
a3004a <=( A266 and (not A265) );
a3005a <=( A233 and a3004a );
a3006a <=( a3005a and a3000a );
a3009a <=( (not A169) and A170 );
a3013a <=( A199 and (not A166) );
a3014a <=( A167 and a3013a );
a3015a <=( a3014a and a3009a );
a3018a <=( (not A232) and A200 );
a3022a <=( A299 and (not A298) );
a3023a <=( A233 and a3022a );
a3024a <=( a3023a and a3018a );
a3027a <=( (not A169) and A170 );
a3031a <=( A199 and (not A166) );
a3032a <=( A167 and a3031a );
a3033a <=( a3032a and a3027a );
a3036a <=( (not A232) and A200 );
a3040a <=( A266 and (not A265) );
a3041a <=( A233 and a3040a );
a3042a <=( a3041a and a3036a );
a3045a <=( (not A169) and A170 );
a3049a <=( (not A199) and (not A166) );
a3050a <=( A167 and a3049a );
a3051a <=( a3050a and a3045a );
a3054a <=( (not A232) and (not A200) );
a3058a <=( A299 and (not A298) );
a3059a <=( A233 and a3058a );
a3060a <=( a3059a and a3054a );
a3063a <=( (not A169) and A170 );
a3067a <=( (not A199) and (not A166) );
a3068a <=( A167 and a3067a );
a3069a <=( a3068a and a3063a );
a3072a <=( (not A232) and (not A200) );
a3076a <=( A266 and (not A265) );
a3077a <=( A233 and a3076a );
a3078a <=( a3077a and a3072a );
a3081a <=( (not A169) and A170 );
a3085a <=( A199 and A166 );
a3086a <=( (not A167) and a3085a );
a3087a <=( a3086a and a3081a );
a3090a <=( (not A232) and (not A201) );
a3094a <=( A299 and (not A298) );
a3095a <=( A233 and a3094a );
a3096a <=( a3095a and a3090a );
a3099a <=( (not A169) and A170 );
a3103a <=( A199 and A166 );
a3104a <=( (not A167) and a3103a );
a3105a <=( a3104a and a3099a );
a3108a <=( (not A232) and (not A201) );
a3112a <=( A266 and (not A265) );
a3113a <=( A233 and a3112a );
a3114a <=( a3113a and a3108a );
a3117a <=( (not A169) and A170 );
a3121a <=( A199 and A166 );
a3122a <=( (not A167) and a3121a );
a3123a <=( a3122a and a3117a );
a3126a <=( (not A232) and A200 );
a3130a <=( A299 and (not A298) );
a3131a <=( A233 and a3130a );
a3132a <=( a3131a and a3126a );
a3135a <=( (not A169) and A170 );
a3139a <=( A199 and A166 );
a3140a <=( (not A167) and a3139a );
a3141a <=( a3140a and a3135a );
a3144a <=( (not A232) and A200 );
a3148a <=( A266 and (not A265) );
a3149a <=( A233 and a3148a );
a3150a <=( a3149a and a3144a );
a3153a <=( (not A169) and A170 );
a3157a <=( (not A199) and A166 );
a3158a <=( (not A167) and a3157a );
a3159a <=( a3158a and a3153a );
a3162a <=( (not A232) and (not A200) );
a3166a <=( A299 and (not A298) );
a3167a <=( A233 and a3166a );
a3168a <=( a3167a and a3162a );
a3171a <=( (not A169) and A170 );
a3175a <=( (not A199) and A166 );
a3176a <=( (not A167) and a3175a );
a3177a <=( a3176a and a3171a );
a3180a <=( (not A232) and (not A200) );
a3184a <=( A266 and (not A265) );
a3185a <=( A233 and a3184a );
a3186a <=( a3185a and a3180a );
a3189a <=( A166 and A168 );
a3193a <=( (not A203) and (not A202) );
a3194a <=( A199 and a3193a );
a3195a <=( a3194a and a3189a );
a3199a <=( A298 and A233 );
a3200a <=( (not A232) and a3199a );
a3204a <=( A301 and A300 );
a3205a <=( (not A299) and a3204a );
a3206a <=( a3205a and a3200a );
a3209a <=( A166 and A168 );
a3213a <=( (not A203) and (not A202) );
a3214a <=( A199 and a3213a );
a3215a <=( a3214a and a3209a );
a3219a <=( A298 and A233 );
a3220a <=( (not A232) and a3219a );
a3224a <=( A302 and A300 );
a3225a <=( (not A299) and a3224a );
a3226a <=( a3225a and a3220a );
a3229a <=( A166 and A168 );
a3233a <=( (not A203) and (not A202) );
a3234a <=( A199 and a3233a );
a3235a <=( a3234a and a3229a );
a3239a <=( A265 and A233 );
a3240a <=( (not A232) and a3239a );
a3244a <=( A268 and A267 );
a3245a <=( (not A266) and a3244a );
a3246a <=( a3245a and a3240a );
a3249a <=( A166 and A168 );
a3253a <=( (not A203) and (not A202) );
a3254a <=( A199 and a3253a );
a3255a <=( a3254a and a3249a );
a3259a <=( A265 and A233 );
a3260a <=( (not A232) and a3259a );
a3264a <=( A269 and A267 );
a3265a <=( (not A266) and a3264a );
a3266a <=( a3265a and a3260a );
a3269a <=( A166 and A168 );
a3273a <=( (not A203) and (not A202) );
a3274a <=( A199 and a3273a );
a3275a <=( a3274a and a3269a );
a3279a <=( A234 and (not A233) );
a3280a <=( A232 and a3279a );
a3284a <=( A299 and (not A298) );
a3285a <=( A235 and a3284a );
a3286a <=( a3285a and a3280a );
a3289a <=( A166 and A168 );
a3293a <=( (not A203) and (not A202) );
a3294a <=( A199 and a3293a );
a3295a <=( a3294a and a3289a );
a3299a <=( A234 and (not A233) );
a3300a <=( A232 and a3299a );
a3304a <=( A266 and (not A265) );
a3305a <=( A235 and a3304a );
a3306a <=( a3305a and a3300a );
a3309a <=( A166 and A168 );
a3313a <=( (not A203) and (not A202) );
a3314a <=( A199 and a3313a );
a3315a <=( a3314a and a3309a );
a3319a <=( A234 and (not A233) );
a3320a <=( A232 and a3319a );
a3324a <=( A299 and (not A298) );
a3325a <=( A236 and a3324a );
a3326a <=( a3325a and a3320a );
a3329a <=( A166 and A168 );
a3333a <=( (not A203) and (not A202) );
a3334a <=( A199 and a3333a );
a3335a <=( a3334a and a3329a );
a3339a <=( A234 and (not A233) );
a3340a <=( A232 and a3339a );
a3344a <=( A266 and (not A265) );
a3345a <=( A236 and a3344a );
a3346a <=( a3345a and a3340a );
a3349a <=( A167 and A168 );
a3353a <=( (not A203) and (not A202) );
a3354a <=( A199 and a3353a );
a3355a <=( a3354a and a3349a );
a3359a <=( A298 and A233 );
a3360a <=( (not A232) and a3359a );
a3364a <=( A301 and A300 );
a3365a <=( (not A299) and a3364a );
a3366a <=( a3365a and a3360a );
a3369a <=( A167 and A168 );
a3373a <=( (not A203) and (not A202) );
a3374a <=( A199 and a3373a );
a3375a <=( a3374a and a3369a );
a3379a <=( A298 and A233 );
a3380a <=( (not A232) and a3379a );
a3384a <=( A302 and A300 );
a3385a <=( (not A299) and a3384a );
a3386a <=( a3385a and a3380a );
a3389a <=( A167 and A168 );
a3393a <=( (not A203) and (not A202) );
a3394a <=( A199 and a3393a );
a3395a <=( a3394a and a3389a );
a3399a <=( A265 and A233 );
a3400a <=( (not A232) and a3399a );
a3404a <=( A268 and A267 );
a3405a <=( (not A266) and a3404a );
a3406a <=( a3405a and a3400a );
a3409a <=( A167 and A168 );
a3413a <=( (not A203) and (not A202) );
a3414a <=( A199 and a3413a );
a3415a <=( a3414a and a3409a );
a3419a <=( A265 and A233 );
a3420a <=( (not A232) and a3419a );
a3424a <=( A269 and A267 );
a3425a <=( (not A266) and a3424a );
a3426a <=( a3425a and a3420a );
a3429a <=( A167 and A168 );
a3433a <=( (not A203) and (not A202) );
a3434a <=( A199 and a3433a );
a3435a <=( a3434a and a3429a );
a3439a <=( A234 and (not A233) );
a3440a <=( A232 and a3439a );
a3444a <=( A299 and (not A298) );
a3445a <=( A235 and a3444a );
a3446a <=( a3445a and a3440a );
a3449a <=( A167 and A168 );
a3453a <=( (not A203) and (not A202) );
a3454a <=( A199 and a3453a );
a3455a <=( a3454a and a3449a );
a3459a <=( A234 and (not A233) );
a3460a <=( A232 and a3459a );
a3464a <=( A266 and (not A265) );
a3465a <=( A235 and a3464a );
a3466a <=( a3465a and a3460a );
a3469a <=( A167 and A168 );
a3473a <=( (not A203) and (not A202) );
a3474a <=( A199 and a3473a );
a3475a <=( a3474a and a3469a );
a3479a <=( A234 and (not A233) );
a3480a <=( A232 and a3479a );
a3484a <=( A299 and (not A298) );
a3485a <=( A236 and a3484a );
a3486a <=( a3485a and a3480a );
a3489a <=( A167 and A168 );
a3493a <=( (not A203) and (not A202) );
a3494a <=( A199 and a3493a );
a3495a <=( a3494a and a3489a );
a3499a <=( A234 and (not A233) );
a3500a <=( A232 and a3499a );
a3504a <=( A266 and (not A265) );
a3505a <=( A236 and a3504a );
a3506a <=( a3505a and a3500a );
a3509a <=( A169 and (not A170) );
a3513a <=( A199 and A166 );
a3514a <=( A167 and a3513a );
a3515a <=( a3514a and a3509a );
a3519a <=( (not A232) and (not A203) );
a3520a <=( (not A202) and a3519a );
a3524a <=( A299 and (not A298) );
a3525a <=( A233 and a3524a );
a3526a <=( a3525a and a3520a );
a3529a <=( A169 and (not A170) );
a3533a <=( A199 and A166 );
a3534a <=( A167 and a3533a );
a3535a <=( a3534a and a3529a );
a3539a <=( (not A232) and (not A203) );
a3540a <=( (not A202) and a3539a );
a3544a <=( A266 and (not A265) );
a3545a <=( A233 and a3544a );
a3546a <=( a3545a and a3540a );
a3549a <=( A169 and (not A170) );
a3553a <=( A199 and (not A166) );
a3554a <=( (not A167) and a3553a );
a3555a <=( a3554a and a3549a );
a3559a <=( (not A232) and (not A203) );
a3560a <=( (not A202) and a3559a );
a3564a <=( A299 and (not A298) );
a3565a <=( A233 and a3564a );
a3566a <=( a3565a and a3560a );
a3569a <=( A169 and (not A170) );
a3573a <=( A199 and (not A166) );
a3574a <=( (not A167) and a3573a );
a3575a <=( a3574a and a3569a );
a3579a <=( (not A232) and (not A203) );
a3580a <=( (not A202) and a3579a );
a3584a <=( A266 and (not A265) );
a3585a <=( A233 and a3584a );
a3586a <=( a3585a and a3580a );
a3589a <=( (not A169) and A170 );
a3593a <=( A199 and (not A166) );
a3594a <=( A167 and a3593a );
a3595a <=( a3594a and a3589a );
a3599a <=( (not A232) and (not A203) );
a3600a <=( (not A202) and a3599a );
a3604a <=( A299 and (not A298) );
a3605a <=( A233 and a3604a );
a3606a <=( a3605a and a3600a );
a3609a <=( (not A169) and A170 );
a3613a <=( A199 and (not A166) );
a3614a <=( A167 and a3613a );
a3615a <=( a3614a and a3609a );
a3619a <=( (not A232) and (not A203) );
a3620a <=( (not A202) and a3619a );
a3624a <=( A266 and (not A265) );
a3625a <=( A233 and a3624a );
a3626a <=( a3625a and a3620a );
a3629a <=( (not A169) and A170 );
a3633a <=( A199 and A166 );
a3634a <=( (not A167) and a3633a );
a3635a <=( a3634a and a3629a );
a3639a <=( (not A232) and (not A203) );
a3640a <=( (not A202) and a3639a );
a3644a <=( A299 and (not A298) );
a3645a <=( A233 and a3644a );
a3646a <=( a3645a and a3640a );
a3649a <=( (not A169) and A170 );
a3653a <=( A199 and A166 );
a3654a <=( (not A167) and a3653a );
a3655a <=( a3654a and a3649a );
a3659a <=( (not A232) and (not A203) );
a3660a <=( (not A202) and a3659a );
a3664a <=( A266 and (not A265) );
a3665a <=( A233 and a3664a );
a3666a <=( a3665a and a3660a );
a3670a <=( A199 and A166 );
a3671a <=( A168 and a3670a );
a3675a <=( (not A233) and A232 );
a3676a <=( (not A201) and a3675a );
a3677a <=( a3676a and a3671a );
a3681a <=( A298 and A235 );
a3682a <=( A234 and a3681a );
a3686a <=( A301 and A300 );
a3687a <=( (not A299) and a3686a );
a3688a <=( a3687a and a3682a );
a3692a <=( A199 and A166 );
a3693a <=( A168 and a3692a );
a3697a <=( (not A233) and A232 );
a3698a <=( (not A201) and a3697a );
a3699a <=( a3698a and a3693a );
a3703a <=( A298 and A235 );
a3704a <=( A234 and a3703a );
a3708a <=( A302 and A300 );
a3709a <=( (not A299) and a3708a );
a3710a <=( a3709a and a3704a );
a3714a <=( A199 and A166 );
a3715a <=( A168 and a3714a );
a3719a <=( (not A233) and A232 );
a3720a <=( (not A201) and a3719a );
a3721a <=( a3720a and a3715a );
a3725a <=( A265 and A235 );
a3726a <=( A234 and a3725a );
a3730a <=( A268 and A267 );
a3731a <=( (not A266) and a3730a );
a3732a <=( a3731a and a3726a );
a3736a <=( A199 and A166 );
a3737a <=( A168 and a3736a );
a3741a <=( (not A233) and A232 );
a3742a <=( (not A201) and a3741a );
a3743a <=( a3742a and a3737a );
a3747a <=( A265 and A235 );
a3748a <=( A234 and a3747a );
a3752a <=( A269 and A267 );
a3753a <=( (not A266) and a3752a );
a3754a <=( a3753a and a3748a );
a3758a <=( A199 and A166 );
a3759a <=( A168 and a3758a );
a3763a <=( (not A233) and A232 );
a3764a <=( (not A201) and a3763a );
a3765a <=( a3764a and a3759a );
a3769a <=( A298 and A236 );
a3770a <=( A234 and a3769a );
a3774a <=( A301 and A300 );
a3775a <=( (not A299) and a3774a );
a3776a <=( a3775a and a3770a );
a3780a <=( A199 and A166 );
a3781a <=( A168 and a3780a );
a3785a <=( (not A233) and A232 );
a3786a <=( (not A201) and a3785a );
a3787a <=( a3786a and a3781a );
a3791a <=( A298 and A236 );
a3792a <=( A234 and a3791a );
a3796a <=( A302 and A300 );
a3797a <=( (not A299) and a3796a );
a3798a <=( a3797a and a3792a );
a3802a <=( A199 and A166 );
a3803a <=( A168 and a3802a );
a3807a <=( (not A233) and A232 );
a3808a <=( (not A201) and a3807a );
a3809a <=( a3808a and a3803a );
a3813a <=( A265 and A236 );
a3814a <=( A234 and a3813a );
a3818a <=( A268 and A267 );
a3819a <=( (not A266) and a3818a );
a3820a <=( a3819a and a3814a );
a3824a <=( A199 and A166 );
a3825a <=( A168 and a3824a );
a3829a <=( (not A233) and A232 );
a3830a <=( (not A201) and a3829a );
a3831a <=( a3830a and a3825a );
a3835a <=( A265 and A236 );
a3836a <=( A234 and a3835a );
a3840a <=( A269 and A267 );
a3841a <=( (not A266) and a3840a );
a3842a <=( a3841a and a3836a );
a3846a <=( A199 and A166 );
a3847a <=( A168 and a3846a );
a3851a <=( (not A233) and A232 );
a3852a <=( A200 and a3851a );
a3853a <=( a3852a and a3847a );
a3857a <=( A298 and A235 );
a3858a <=( A234 and a3857a );
a3862a <=( A301 and A300 );
a3863a <=( (not A299) and a3862a );
a3864a <=( a3863a and a3858a );
a3868a <=( A199 and A166 );
a3869a <=( A168 and a3868a );
a3873a <=( (not A233) and A232 );
a3874a <=( A200 and a3873a );
a3875a <=( a3874a and a3869a );
a3879a <=( A298 and A235 );
a3880a <=( A234 and a3879a );
a3884a <=( A302 and A300 );
a3885a <=( (not A299) and a3884a );
a3886a <=( a3885a and a3880a );
a3890a <=( A199 and A166 );
a3891a <=( A168 and a3890a );
a3895a <=( (not A233) and A232 );
a3896a <=( A200 and a3895a );
a3897a <=( a3896a and a3891a );
a3901a <=( A265 and A235 );
a3902a <=( A234 and a3901a );
a3906a <=( A268 and A267 );
a3907a <=( (not A266) and a3906a );
a3908a <=( a3907a and a3902a );
a3912a <=( A199 and A166 );
a3913a <=( A168 and a3912a );
a3917a <=( (not A233) and A232 );
a3918a <=( A200 and a3917a );
a3919a <=( a3918a and a3913a );
a3923a <=( A265 and A235 );
a3924a <=( A234 and a3923a );
a3928a <=( A269 and A267 );
a3929a <=( (not A266) and a3928a );
a3930a <=( a3929a and a3924a );
a3934a <=( A199 and A166 );
a3935a <=( A168 and a3934a );
a3939a <=( (not A233) and A232 );
a3940a <=( A200 and a3939a );
a3941a <=( a3940a and a3935a );
a3945a <=( A298 and A236 );
a3946a <=( A234 and a3945a );
a3950a <=( A301 and A300 );
a3951a <=( (not A299) and a3950a );
a3952a <=( a3951a and a3946a );
a3956a <=( A199 and A166 );
a3957a <=( A168 and a3956a );
a3961a <=( (not A233) and A232 );
a3962a <=( A200 and a3961a );
a3963a <=( a3962a and a3957a );
a3967a <=( A298 and A236 );
a3968a <=( A234 and a3967a );
a3972a <=( A302 and A300 );
a3973a <=( (not A299) and a3972a );
a3974a <=( a3973a and a3968a );
a3978a <=( A199 and A166 );
a3979a <=( A168 and a3978a );
a3983a <=( (not A233) and A232 );
a3984a <=( A200 and a3983a );
a3985a <=( a3984a and a3979a );
a3989a <=( A265 and A236 );
a3990a <=( A234 and a3989a );
a3994a <=( A268 and A267 );
a3995a <=( (not A266) and a3994a );
a3996a <=( a3995a and a3990a );
a4000a <=( A199 and A166 );
a4001a <=( A168 and a4000a );
a4005a <=( (not A233) and A232 );
a4006a <=( A200 and a4005a );
a4007a <=( a4006a and a4001a );
a4011a <=( A265 and A236 );
a4012a <=( A234 and a4011a );
a4016a <=( A269 and A267 );
a4017a <=( (not A266) and a4016a );
a4018a <=( a4017a and a4012a );
a4022a <=( (not A199) and A166 );
a4023a <=( A168 and a4022a );
a4027a <=( (not A233) and A232 );
a4028a <=( (not A200) and a4027a );
a4029a <=( a4028a and a4023a );
a4033a <=( A298 and A235 );
a4034a <=( A234 and a4033a );
a4038a <=( A301 and A300 );
a4039a <=( (not A299) and a4038a );
a4040a <=( a4039a and a4034a );
a4044a <=( (not A199) and A166 );
a4045a <=( A168 and a4044a );
a4049a <=( (not A233) and A232 );
a4050a <=( (not A200) and a4049a );
a4051a <=( a4050a and a4045a );
a4055a <=( A298 and A235 );
a4056a <=( A234 and a4055a );
a4060a <=( A302 and A300 );
a4061a <=( (not A299) and a4060a );
a4062a <=( a4061a and a4056a );
a4066a <=( (not A199) and A166 );
a4067a <=( A168 and a4066a );
a4071a <=( (not A233) and A232 );
a4072a <=( (not A200) and a4071a );
a4073a <=( a4072a and a4067a );
a4077a <=( A265 and A235 );
a4078a <=( A234 and a4077a );
a4082a <=( A268 and A267 );
a4083a <=( (not A266) and a4082a );
a4084a <=( a4083a and a4078a );
a4088a <=( (not A199) and A166 );
a4089a <=( A168 and a4088a );
a4093a <=( (not A233) and A232 );
a4094a <=( (not A200) and a4093a );
a4095a <=( a4094a and a4089a );
a4099a <=( A265 and A235 );
a4100a <=( A234 and a4099a );
a4104a <=( A269 and A267 );
a4105a <=( (not A266) and a4104a );
a4106a <=( a4105a and a4100a );
a4110a <=( (not A199) and A166 );
a4111a <=( A168 and a4110a );
a4115a <=( (not A233) and A232 );
a4116a <=( (not A200) and a4115a );
a4117a <=( a4116a and a4111a );
a4121a <=( A298 and A236 );
a4122a <=( A234 and a4121a );
a4126a <=( A301 and A300 );
a4127a <=( (not A299) and a4126a );
a4128a <=( a4127a and a4122a );
a4132a <=( (not A199) and A166 );
a4133a <=( A168 and a4132a );
a4137a <=( (not A233) and A232 );
a4138a <=( (not A200) and a4137a );
a4139a <=( a4138a and a4133a );
a4143a <=( A298 and A236 );
a4144a <=( A234 and a4143a );
a4148a <=( A302 and A300 );
a4149a <=( (not A299) and a4148a );
a4150a <=( a4149a and a4144a );
a4154a <=( (not A199) and A166 );
a4155a <=( A168 and a4154a );
a4159a <=( (not A233) and A232 );
a4160a <=( (not A200) and a4159a );
a4161a <=( a4160a and a4155a );
a4165a <=( A265 and A236 );
a4166a <=( A234 and a4165a );
a4170a <=( A268 and A267 );
a4171a <=( (not A266) and a4170a );
a4172a <=( a4171a and a4166a );
a4176a <=( (not A199) and A166 );
a4177a <=( A168 and a4176a );
a4181a <=( (not A233) and A232 );
a4182a <=( (not A200) and a4181a );
a4183a <=( a4182a and a4177a );
a4187a <=( A265 and A236 );
a4188a <=( A234 and a4187a );
a4192a <=( A269 and A267 );
a4193a <=( (not A266) and a4192a );
a4194a <=( a4193a and a4188a );
a4198a <=( A199 and A167 );
a4199a <=( A168 and a4198a );
a4203a <=( (not A233) and A232 );
a4204a <=( (not A201) and a4203a );
a4205a <=( a4204a and a4199a );
a4209a <=( A298 and A235 );
a4210a <=( A234 and a4209a );
a4214a <=( A301 and A300 );
a4215a <=( (not A299) and a4214a );
a4216a <=( a4215a and a4210a );
a4220a <=( A199 and A167 );
a4221a <=( A168 and a4220a );
a4225a <=( (not A233) and A232 );
a4226a <=( (not A201) and a4225a );
a4227a <=( a4226a and a4221a );
a4231a <=( A298 and A235 );
a4232a <=( A234 and a4231a );
a4236a <=( A302 and A300 );
a4237a <=( (not A299) and a4236a );
a4238a <=( a4237a and a4232a );
a4242a <=( A199 and A167 );
a4243a <=( A168 and a4242a );
a4247a <=( (not A233) and A232 );
a4248a <=( (not A201) and a4247a );
a4249a <=( a4248a and a4243a );
a4253a <=( A265 and A235 );
a4254a <=( A234 and a4253a );
a4258a <=( A268 and A267 );
a4259a <=( (not A266) and a4258a );
a4260a <=( a4259a and a4254a );
a4264a <=( A199 and A167 );
a4265a <=( A168 and a4264a );
a4269a <=( (not A233) and A232 );
a4270a <=( (not A201) and a4269a );
a4271a <=( a4270a and a4265a );
a4275a <=( A265 and A235 );
a4276a <=( A234 and a4275a );
a4280a <=( A269 and A267 );
a4281a <=( (not A266) and a4280a );
a4282a <=( a4281a and a4276a );
a4286a <=( A199 and A167 );
a4287a <=( A168 and a4286a );
a4291a <=( (not A233) and A232 );
a4292a <=( (not A201) and a4291a );
a4293a <=( a4292a and a4287a );
a4297a <=( A298 and A236 );
a4298a <=( A234 and a4297a );
a4302a <=( A301 and A300 );
a4303a <=( (not A299) and a4302a );
a4304a <=( a4303a and a4298a );
a4308a <=( A199 and A167 );
a4309a <=( A168 and a4308a );
a4313a <=( (not A233) and A232 );
a4314a <=( (not A201) and a4313a );
a4315a <=( a4314a and a4309a );
a4319a <=( A298 and A236 );
a4320a <=( A234 and a4319a );
a4324a <=( A302 and A300 );
a4325a <=( (not A299) and a4324a );
a4326a <=( a4325a and a4320a );
a4330a <=( A199 and A167 );
a4331a <=( A168 and a4330a );
a4335a <=( (not A233) and A232 );
a4336a <=( (not A201) and a4335a );
a4337a <=( a4336a and a4331a );
a4341a <=( A265 and A236 );
a4342a <=( A234 and a4341a );
a4346a <=( A268 and A267 );
a4347a <=( (not A266) and a4346a );
a4348a <=( a4347a and a4342a );
a4352a <=( A199 and A167 );
a4353a <=( A168 and a4352a );
a4357a <=( (not A233) and A232 );
a4358a <=( (not A201) and a4357a );
a4359a <=( a4358a and a4353a );
a4363a <=( A265 and A236 );
a4364a <=( A234 and a4363a );
a4368a <=( A269 and A267 );
a4369a <=( (not A266) and a4368a );
a4370a <=( a4369a and a4364a );
a4374a <=( A199 and A167 );
a4375a <=( A168 and a4374a );
a4379a <=( (not A233) and A232 );
a4380a <=( A200 and a4379a );
a4381a <=( a4380a and a4375a );
a4385a <=( A298 and A235 );
a4386a <=( A234 and a4385a );
a4390a <=( A301 and A300 );
a4391a <=( (not A299) and a4390a );
a4392a <=( a4391a and a4386a );
a4396a <=( A199 and A167 );
a4397a <=( A168 and a4396a );
a4401a <=( (not A233) and A232 );
a4402a <=( A200 and a4401a );
a4403a <=( a4402a and a4397a );
a4407a <=( A298 and A235 );
a4408a <=( A234 and a4407a );
a4412a <=( A302 and A300 );
a4413a <=( (not A299) and a4412a );
a4414a <=( a4413a and a4408a );
a4418a <=( A199 and A167 );
a4419a <=( A168 and a4418a );
a4423a <=( (not A233) and A232 );
a4424a <=( A200 and a4423a );
a4425a <=( a4424a and a4419a );
a4429a <=( A265 and A235 );
a4430a <=( A234 and a4429a );
a4434a <=( A268 and A267 );
a4435a <=( (not A266) and a4434a );
a4436a <=( a4435a and a4430a );
a4440a <=( A199 and A167 );
a4441a <=( A168 and a4440a );
a4445a <=( (not A233) and A232 );
a4446a <=( A200 and a4445a );
a4447a <=( a4446a and a4441a );
a4451a <=( A265 and A235 );
a4452a <=( A234 and a4451a );
a4456a <=( A269 and A267 );
a4457a <=( (not A266) and a4456a );
a4458a <=( a4457a and a4452a );
a4462a <=( A199 and A167 );
a4463a <=( A168 and a4462a );
a4467a <=( (not A233) and A232 );
a4468a <=( A200 and a4467a );
a4469a <=( a4468a and a4463a );
a4473a <=( A298 and A236 );
a4474a <=( A234 and a4473a );
a4478a <=( A301 and A300 );
a4479a <=( (not A299) and a4478a );
a4480a <=( a4479a and a4474a );
a4484a <=( A199 and A167 );
a4485a <=( A168 and a4484a );
a4489a <=( (not A233) and A232 );
a4490a <=( A200 and a4489a );
a4491a <=( a4490a and a4485a );
a4495a <=( A298 and A236 );
a4496a <=( A234 and a4495a );
a4500a <=( A302 and A300 );
a4501a <=( (not A299) and a4500a );
a4502a <=( a4501a and a4496a );
a4506a <=( A199 and A167 );
a4507a <=( A168 and a4506a );
a4511a <=( (not A233) and A232 );
a4512a <=( A200 and a4511a );
a4513a <=( a4512a and a4507a );
a4517a <=( A265 and A236 );
a4518a <=( A234 and a4517a );
a4522a <=( A268 and A267 );
a4523a <=( (not A266) and a4522a );
a4524a <=( a4523a and a4518a );
a4528a <=( A199 and A167 );
a4529a <=( A168 and a4528a );
a4533a <=( (not A233) and A232 );
a4534a <=( A200 and a4533a );
a4535a <=( a4534a and a4529a );
a4539a <=( A265 and A236 );
a4540a <=( A234 and a4539a );
a4544a <=( A269 and A267 );
a4545a <=( (not A266) and a4544a );
a4546a <=( a4545a and a4540a );
a4550a <=( (not A199) and A167 );
a4551a <=( A168 and a4550a );
a4555a <=( (not A233) and A232 );
a4556a <=( (not A200) and a4555a );
a4557a <=( a4556a and a4551a );
a4561a <=( A298 and A235 );
a4562a <=( A234 and a4561a );
a4566a <=( A301 and A300 );
a4567a <=( (not A299) and a4566a );
a4568a <=( a4567a and a4562a );
a4572a <=( (not A199) and A167 );
a4573a <=( A168 and a4572a );
a4577a <=( (not A233) and A232 );
a4578a <=( (not A200) and a4577a );
a4579a <=( a4578a and a4573a );
a4583a <=( A298 and A235 );
a4584a <=( A234 and a4583a );
a4588a <=( A302 and A300 );
a4589a <=( (not A299) and a4588a );
a4590a <=( a4589a and a4584a );
a4594a <=( (not A199) and A167 );
a4595a <=( A168 and a4594a );
a4599a <=( (not A233) and A232 );
a4600a <=( (not A200) and a4599a );
a4601a <=( a4600a and a4595a );
a4605a <=( A265 and A235 );
a4606a <=( A234 and a4605a );
a4610a <=( A268 and A267 );
a4611a <=( (not A266) and a4610a );
a4612a <=( a4611a and a4606a );
a4616a <=( (not A199) and A167 );
a4617a <=( A168 and a4616a );
a4621a <=( (not A233) and A232 );
a4622a <=( (not A200) and a4621a );
a4623a <=( a4622a and a4617a );
a4627a <=( A265 and A235 );
a4628a <=( A234 and a4627a );
a4632a <=( A269 and A267 );
a4633a <=( (not A266) and a4632a );
a4634a <=( a4633a and a4628a );
a4638a <=( (not A199) and A167 );
a4639a <=( A168 and a4638a );
a4643a <=( (not A233) and A232 );
a4644a <=( (not A200) and a4643a );
a4645a <=( a4644a and a4639a );
a4649a <=( A298 and A236 );
a4650a <=( A234 and a4649a );
a4654a <=( A301 and A300 );
a4655a <=( (not A299) and a4654a );
a4656a <=( a4655a and a4650a );
a4660a <=( (not A199) and A167 );
a4661a <=( A168 and a4660a );
a4665a <=( (not A233) and A232 );
a4666a <=( (not A200) and a4665a );
a4667a <=( a4666a and a4661a );
a4671a <=( A298 and A236 );
a4672a <=( A234 and a4671a );
a4676a <=( A302 and A300 );
a4677a <=( (not A299) and a4676a );
a4678a <=( a4677a and a4672a );
a4682a <=( (not A199) and A167 );
a4683a <=( A168 and a4682a );
a4687a <=( (not A233) and A232 );
a4688a <=( (not A200) and a4687a );
a4689a <=( a4688a and a4683a );
a4693a <=( A265 and A236 );
a4694a <=( A234 and a4693a );
a4698a <=( A268 and A267 );
a4699a <=( (not A266) and a4698a );
a4700a <=( a4699a and a4694a );
a4704a <=( (not A199) and A167 );
a4705a <=( A168 and a4704a );
a4709a <=( (not A233) and A232 );
a4710a <=( (not A200) and a4709a );
a4711a <=( a4710a and a4705a );
a4715a <=( A265 and A236 );
a4716a <=( A234 and a4715a );
a4720a <=( A269 and A267 );
a4721a <=( (not A266) and a4720a );
a4722a <=( a4721a and a4716a );
a4726a <=( A167 and A169 );
a4727a <=( (not A170) and a4726a );
a4731a <=( (not A201) and A199 );
a4732a <=( A166 and a4731a );
a4733a <=( a4732a and a4727a );
a4737a <=( A298 and A233 );
a4738a <=( (not A232) and a4737a );
a4742a <=( A301 and A300 );
a4743a <=( (not A299) and a4742a );
a4744a <=( a4743a and a4738a );
a4748a <=( A167 and A169 );
a4749a <=( (not A170) and a4748a );
a4753a <=( (not A201) and A199 );
a4754a <=( A166 and a4753a );
a4755a <=( a4754a and a4749a );
a4759a <=( A298 and A233 );
a4760a <=( (not A232) and a4759a );
a4764a <=( A302 and A300 );
a4765a <=( (not A299) and a4764a );
a4766a <=( a4765a and a4760a );
a4770a <=( A167 and A169 );
a4771a <=( (not A170) and a4770a );
a4775a <=( (not A201) and A199 );
a4776a <=( A166 and a4775a );
a4777a <=( a4776a and a4771a );
a4781a <=( A265 and A233 );
a4782a <=( (not A232) and a4781a );
a4786a <=( A268 and A267 );
a4787a <=( (not A266) and a4786a );
a4788a <=( a4787a and a4782a );
a4792a <=( A167 and A169 );
a4793a <=( (not A170) and a4792a );
a4797a <=( (not A201) and A199 );
a4798a <=( A166 and a4797a );
a4799a <=( a4798a and a4793a );
a4803a <=( A265 and A233 );
a4804a <=( (not A232) and a4803a );
a4808a <=( A269 and A267 );
a4809a <=( (not A266) and a4808a );
a4810a <=( a4809a and a4804a );
a4814a <=( A167 and A169 );
a4815a <=( (not A170) and a4814a );
a4819a <=( (not A201) and A199 );
a4820a <=( A166 and a4819a );
a4821a <=( a4820a and a4815a );
a4825a <=( A234 and (not A233) );
a4826a <=( A232 and a4825a );
a4830a <=( A299 and (not A298) );
a4831a <=( A235 and a4830a );
a4832a <=( a4831a and a4826a );
a4836a <=( A167 and A169 );
a4837a <=( (not A170) and a4836a );
a4841a <=( (not A201) and A199 );
a4842a <=( A166 and a4841a );
a4843a <=( a4842a and a4837a );
a4847a <=( A234 and (not A233) );
a4848a <=( A232 and a4847a );
a4852a <=( A266 and (not A265) );
a4853a <=( A235 and a4852a );
a4854a <=( a4853a and a4848a );
a4858a <=( A167 and A169 );
a4859a <=( (not A170) and a4858a );
a4863a <=( (not A201) and A199 );
a4864a <=( A166 and a4863a );
a4865a <=( a4864a and a4859a );
a4869a <=( A234 and (not A233) );
a4870a <=( A232 and a4869a );
a4874a <=( A299 and (not A298) );
a4875a <=( A236 and a4874a );
a4876a <=( a4875a and a4870a );
a4880a <=( A167 and A169 );
a4881a <=( (not A170) and a4880a );
a4885a <=( (not A201) and A199 );
a4886a <=( A166 and a4885a );
a4887a <=( a4886a and a4881a );
a4891a <=( A234 and (not A233) );
a4892a <=( A232 and a4891a );
a4896a <=( A266 and (not A265) );
a4897a <=( A236 and a4896a );
a4898a <=( a4897a and a4892a );
a4902a <=( A167 and A169 );
a4903a <=( (not A170) and a4902a );
a4907a <=( A200 and A199 );
a4908a <=( A166 and a4907a );
a4909a <=( a4908a and a4903a );
a4913a <=( A298 and A233 );
a4914a <=( (not A232) and a4913a );
a4918a <=( A301 and A300 );
a4919a <=( (not A299) and a4918a );
a4920a <=( a4919a and a4914a );
a4924a <=( A167 and A169 );
a4925a <=( (not A170) and a4924a );
a4929a <=( A200 and A199 );
a4930a <=( A166 and a4929a );
a4931a <=( a4930a and a4925a );
a4935a <=( A298 and A233 );
a4936a <=( (not A232) and a4935a );
a4940a <=( A302 and A300 );
a4941a <=( (not A299) and a4940a );
a4942a <=( a4941a and a4936a );
a4946a <=( A167 and A169 );
a4947a <=( (not A170) and a4946a );
a4951a <=( A200 and A199 );
a4952a <=( A166 and a4951a );
a4953a <=( a4952a and a4947a );
a4957a <=( A265 and A233 );
a4958a <=( (not A232) and a4957a );
a4962a <=( A268 and A267 );
a4963a <=( (not A266) and a4962a );
a4964a <=( a4963a and a4958a );
a4968a <=( A167 and A169 );
a4969a <=( (not A170) and a4968a );
a4973a <=( A200 and A199 );
a4974a <=( A166 and a4973a );
a4975a <=( a4974a and a4969a );
a4979a <=( A265 and A233 );
a4980a <=( (not A232) and a4979a );
a4984a <=( A269 and A267 );
a4985a <=( (not A266) and a4984a );
a4986a <=( a4985a and a4980a );
a4990a <=( A167 and A169 );
a4991a <=( (not A170) and a4990a );
a4995a <=( A200 and A199 );
a4996a <=( A166 and a4995a );
a4997a <=( a4996a and a4991a );
a5001a <=( A234 and (not A233) );
a5002a <=( A232 and a5001a );
a5006a <=( A299 and (not A298) );
a5007a <=( A235 and a5006a );
a5008a <=( a5007a and a5002a );
a5012a <=( A167 and A169 );
a5013a <=( (not A170) and a5012a );
a5017a <=( A200 and A199 );
a5018a <=( A166 and a5017a );
a5019a <=( a5018a and a5013a );
a5023a <=( A234 and (not A233) );
a5024a <=( A232 and a5023a );
a5028a <=( A266 and (not A265) );
a5029a <=( A235 and a5028a );
a5030a <=( a5029a and a5024a );
a5034a <=( A167 and A169 );
a5035a <=( (not A170) and a5034a );
a5039a <=( A200 and A199 );
a5040a <=( A166 and a5039a );
a5041a <=( a5040a and a5035a );
a5045a <=( A234 and (not A233) );
a5046a <=( A232 and a5045a );
a5050a <=( A299 and (not A298) );
a5051a <=( A236 and a5050a );
a5052a <=( a5051a and a5046a );
a5056a <=( A167 and A169 );
a5057a <=( (not A170) and a5056a );
a5061a <=( A200 and A199 );
a5062a <=( A166 and a5061a );
a5063a <=( a5062a and a5057a );
a5067a <=( A234 and (not A233) );
a5068a <=( A232 and a5067a );
a5072a <=( A266 and (not A265) );
a5073a <=( A236 and a5072a );
a5074a <=( a5073a and a5068a );
a5078a <=( A167 and A169 );
a5079a <=( (not A170) and a5078a );
a5083a <=( (not A200) and (not A199) );
a5084a <=( A166 and a5083a );
a5085a <=( a5084a and a5079a );
a5089a <=( A298 and A233 );
a5090a <=( (not A232) and a5089a );
a5094a <=( A301 and A300 );
a5095a <=( (not A299) and a5094a );
a5096a <=( a5095a and a5090a );
a5100a <=( A167 and A169 );
a5101a <=( (not A170) and a5100a );
a5105a <=( (not A200) and (not A199) );
a5106a <=( A166 and a5105a );
a5107a <=( a5106a and a5101a );
a5111a <=( A298 and A233 );
a5112a <=( (not A232) and a5111a );
a5116a <=( A302 and A300 );
a5117a <=( (not A299) and a5116a );
a5118a <=( a5117a and a5112a );
a5122a <=( A167 and A169 );
a5123a <=( (not A170) and a5122a );
a5127a <=( (not A200) and (not A199) );
a5128a <=( A166 and a5127a );
a5129a <=( a5128a and a5123a );
a5133a <=( A265 and A233 );
a5134a <=( (not A232) and a5133a );
a5138a <=( A268 and A267 );
a5139a <=( (not A266) and a5138a );
a5140a <=( a5139a and a5134a );
a5144a <=( A167 and A169 );
a5145a <=( (not A170) and a5144a );
a5149a <=( (not A200) and (not A199) );
a5150a <=( A166 and a5149a );
a5151a <=( a5150a and a5145a );
a5155a <=( A265 and A233 );
a5156a <=( (not A232) and a5155a );
a5160a <=( A269 and A267 );
a5161a <=( (not A266) and a5160a );
a5162a <=( a5161a and a5156a );
a5166a <=( A167 and A169 );
a5167a <=( (not A170) and a5166a );
a5171a <=( (not A200) and (not A199) );
a5172a <=( A166 and a5171a );
a5173a <=( a5172a and a5167a );
a5177a <=( A234 and (not A233) );
a5178a <=( A232 and a5177a );
a5182a <=( A299 and (not A298) );
a5183a <=( A235 and a5182a );
a5184a <=( a5183a and a5178a );
a5188a <=( A167 and A169 );
a5189a <=( (not A170) and a5188a );
a5193a <=( (not A200) and (not A199) );
a5194a <=( A166 and a5193a );
a5195a <=( a5194a and a5189a );
a5199a <=( A234 and (not A233) );
a5200a <=( A232 and a5199a );
a5204a <=( A266 and (not A265) );
a5205a <=( A235 and a5204a );
a5206a <=( a5205a and a5200a );
a5210a <=( A167 and A169 );
a5211a <=( (not A170) and a5210a );
a5215a <=( (not A200) and (not A199) );
a5216a <=( A166 and a5215a );
a5217a <=( a5216a and a5211a );
a5221a <=( A234 and (not A233) );
a5222a <=( A232 and a5221a );
a5226a <=( A299 and (not A298) );
a5227a <=( A236 and a5226a );
a5228a <=( a5227a and a5222a );
a5232a <=( A167 and A169 );
a5233a <=( (not A170) and a5232a );
a5237a <=( (not A200) and (not A199) );
a5238a <=( A166 and a5237a );
a5239a <=( a5238a and a5233a );
a5243a <=( A234 and (not A233) );
a5244a <=( A232 and a5243a );
a5248a <=( A266 and (not A265) );
a5249a <=( A236 and a5248a );
a5250a <=( a5249a and a5244a );
a5254a <=( (not A167) and A169 );
a5255a <=( (not A170) and a5254a );
a5259a <=( (not A201) and A199 );
a5260a <=( (not A166) and a5259a );
a5261a <=( a5260a and a5255a );
a5265a <=( A298 and A233 );
a5266a <=( (not A232) and a5265a );
a5270a <=( A301 and A300 );
a5271a <=( (not A299) and a5270a );
a5272a <=( a5271a and a5266a );
a5276a <=( (not A167) and A169 );
a5277a <=( (not A170) and a5276a );
a5281a <=( (not A201) and A199 );
a5282a <=( (not A166) and a5281a );
a5283a <=( a5282a and a5277a );
a5287a <=( A298 and A233 );
a5288a <=( (not A232) and a5287a );
a5292a <=( A302 and A300 );
a5293a <=( (not A299) and a5292a );
a5294a <=( a5293a and a5288a );
a5298a <=( (not A167) and A169 );
a5299a <=( (not A170) and a5298a );
a5303a <=( (not A201) and A199 );
a5304a <=( (not A166) and a5303a );
a5305a <=( a5304a and a5299a );
a5309a <=( A265 and A233 );
a5310a <=( (not A232) and a5309a );
a5314a <=( A268 and A267 );
a5315a <=( (not A266) and a5314a );
a5316a <=( a5315a and a5310a );
a5320a <=( (not A167) and A169 );
a5321a <=( (not A170) and a5320a );
a5325a <=( (not A201) and A199 );
a5326a <=( (not A166) and a5325a );
a5327a <=( a5326a and a5321a );
a5331a <=( A265 and A233 );
a5332a <=( (not A232) and a5331a );
a5336a <=( A269 and A267 );
a5337a <=( (not A266) and a5336a );
a5338a <=( a5337a and a5332a );
a5342a <=( (not A167) and A169 );
a5343a <=( (not A170) and a5342a );
a5347a <=( (not A201) and A199 );
a5348a <=( (not A166) and a5347a );
a5349a <=( a5348a and a5343a );
a5353a <=( A234 and (not A233) );
a5354a <=( A232 and a5353a );
a5358a <=( A299 and (not A298) );
a5359a <=( A235 and a5358a );
a5360a <=( a5359a and a5354a );
a5364a <=( (not A167) and A169 );
a5365a <=( (not A170) and a5364a );
a5369a <=( (not A201) and A199 );
a5370a <=( (not A166) and a5369a );
a5371a <=( a5370a and a5365a );
a5375a <=( A234 and (not A233) );
a5376a <=( A232 and a5375a );
a5380a <=( A266 and (not A265) );
a5381a <=( A235 and a5380a );
a5382a <=( a5381a and a5376a );
a5386a <=( (not A167) and A169 );
a5387a <=( (not A170) and a5386a );
a5391a <=( (not A201) and A199 );
a5392a <=( (not A166) and a5391a );
a5393a <=( a5392a and a5387a );
a5397a <=( A234 and (not A233) );
a5398a <=( A232 and a5397a );
a5402a <=( A299 and (not A298) );
a5403a <=( A236 and a5402a );
a5404a <=( a5403a and a5398a );
a5408a <=( (not A167) and A169 );
a5409a <=( (not A170) and a5408a );
a5413a <=( (not A201) and A199 );
a5414a <=( (not A166) and a5413a );
a5415a <=( a5414a and a5409a );
a5419a <=( A234 and (not A233) );
a5420a <=( A232 and a5419a );
a5424a <=( A266 and (not A265) );
a5425a <=( A236 and a5424a );
a5426a <=( a5425a and a5420a );
a5430a <=( (not A167) and A169 );
a5431a <=( (not A170) and a5430a );
a5435a <=( A200 and A199 );
a5436a <=( (not A166) and a5435a );
a5437a <=( a5436a and a5431a );
a5441a <=( A298 and A233 );
a5442a <=( (not A232) and a5441a );
a5446a <=( A301 and A300 );
a5447a <=( (not A299) and a5446a );
a5448a <=( a5447a and a5442a );
a5452a <=( (not A167) and A169 );
a5453a <=( (not A170) and a5452a );
a5457a <=( A200 and A199 );
a5458a <=( (not A166) and a5457a );
a5459a <=( a5458a and a5453a );
a5463a <=( A298 and A233 );
a5464a <=( (not A232) and a5463a );
a5468a <=( A302 and A300 );
a5469a <=( (not A299) and a5468a );
a5470a <=( a5469a and a5464a );
a5474a <=( (not A167) and A169 );
a5475a <=( (not A170) and a5474a );
a5479a <=( A200 and A199 );
a5480a <=( (not A166) and a5479a );
a5481a <=( a5480a and a5475a );
a5485a <=( A265 and A233 );
a5486a <=( (not A232) and a5485a );
a5490a <=( A268 and A267 );
a5491a <=( (not A266) and a5490a );
a5492a <=( a5491a and a5486a );
a5496a <=( (not A167) and A169 );
a5497a <=( (not A170) and a5496a );
a5501a <=( A200 and A199 );
a5502a <=( (not A166) and a5501a );
a5503a <=( a5502a and a5497a );
a5507a <=( A265 and A233 );
a5508a <=( (not A232) and a5507a );
a5512a <=( A269 and A267 );
a5513a <=( (not A266) and a5512a );
a5514a <=( a5513a and a5508a );
a5518a <=( (not A167) and A169 );
a5519a <=( (not A170) and a5518a );
a5523a <=( A200 and A199 );
a5524a <=( (not A166) and a5523a );
a5525a <=( a5524a and a5519a );
a5529a <=( A234 and (not A233) );
a5530a <=( A232 and a5529a );
a5534a <=( A299 and (not A298) );
a5535a <=( A235 and a5534a );
a5536a <=( a5535a and a5530a );
a5540a <=( (not A167) and A169 );
a5541a <=( (not A170) and a5540a );
a5545a <=( A200 and A199 );
a5546a <=( (not A166) and a5545a );
a5547a <=( a5546a and a5541a );
a5551a <=( A234 and (not A233) );
a5552a <=( A232 and a5551a );
a5556a <=( A266 and (not A265) );
a5557a <=( A235 and a5556a );
a5558a <=( a5557a and a5552a );
a5562a <=( (not A167) and A169 );
a5563a <=( (not A170) and a5562a );
a5567a <=( A200 and A199 );
a5568a <=( (not A166) and a5567a );
a5569a <=( a5568a and a5563a );
a5573a <=( A234 and (not A233) );
a5574a <=( A232 and a5573a );
a5578a <=( A299 and (not A298) );
a5579a <=( A236 and a5578a );
a5580a <=( a5579a and a5574a );
a5584a <=( (not A167) and A169 );
a5585a <=( (not A170) and a5584a );
a5589a <=( A200 and A199 );
a5590a <=( (not A166) and a5589a );
a5591a <=( a5590a and a5585a );
a5595a <=( A234 and (not A233) );
a5596a <=( A232 and a5595a );
a5600a <=( A266 and (not A265) );
a5601a <=( A236 and a5600a );
a5602a <=( a5601a and a5596a );
a5606a <=( (not A167) and A169 );
a5607a <=( (not A170) and a5606a );
a5611a <=( (not A200) and (not A199) );
a5612a <=( (not A166) and a5611a );
a5613a <=( a5612a and a5607a );
a5617a <=( A298 and A233 );
a5618a <=( (not A232) and a5617a );
a5622a <=( A301 and A300 );
a5623a <=( (not A299) and a5622a );
a5624a <=( a5623a and a5618a );
a5628a <=( (not A167) and A169 );
a5629a <=( (not A170) and a5628a );
a5633a <=( (not A200) and (not A199) );
a5634a <=( (not A166) and a5633a );
a5635a <=( a5634a and a5629a );
a5639a <=( A298 and A233 );
a5640a <=( (not A232) and a5639a );
a5644a <=( A302 and A300 );
a5645a <=( (not A299) and a5644a );
a5646a <=( a5645a and a5640a );
a5650a <=( (not A167) and A169 );
a5651a <=( (not A170) and a5650a );
a5655a <=( (not A200) and (not A199) );
a5656a <=( (not A166) and a5655a );
a5657a <=( a5656a and a5651a );
a5661a <=( A265 and A233 );
a5662a <=( (not A232) and a5661a );
a5666a <=( A268 and A267 );
a5667a <=( (not A266) and a5666a );
a5668a <=( a5667a and a5662a );
a5672a <=( (not A167) and A169 );
a5673a <=( (not A170) and a5672a );
a5677a <=( (not A200) and (not A199) );
a5678a <=( (not A166) and a5677a );
a5679a <=( a5678a and a5673a );
a5683a <=( A265 and A233 );
a5684a <=( (not A232) and a5683a );
a5688a <=( A269 and A267 );
a5689a <=( (not A266) and a5688a );
a5690a <=( a5689a and a5684a );
a5694a <=( (not A167) and A169 );
a5695a <=( (not A170) and a5694a );
a5699a <=( (not A200) and (not A199) );
a5700a <=( (not A166) and a5699a );
a5701a <=( a5700a and a5695a );
a5705a <=( A234 and (not A233) );
a5706a <=( A232 and a5705a );
a5710a <=( A299 and (not A298) );
a5711a <=( A235 and a5710a );
a5712a <=( a5711a and a5706a );
a5716a <=( (not A167) and A169 );
a5717a <=( (not A170) and a5716a );
a5721a <=( (not A200) and (not A199) );
a5722a <=( (not A166) and a5721a );
a5723a <=( a5722a and a5717a );
a5727a <=( A234 and (not A233) );
a5728a <=( A232 and a5727a );
a5732a <=( A266 and (not A265) );
a5733a <=( A235 and a5732a );
a5734a <=( a5733a and a5728a );
a5738a <=( (not A167) and A169 );
a5739a <=( (not A170) and a5738a );
a5743a <=( (not A200) and (not A199) );
a5744a <=( (not A166) and a5743a );
a5745a <=( a5744a and a5739a );
a5749a <=( A234 and (not A233) );
a5750a <=( A232 and a5749a );
a5754a <=( A299 and (not A298) );
a5755a <=( A236 and a5754a );
a5756a <=( a5755a and a5750a );
a5760a <=( (not A167) and A169 );
a5761a <=( (not A170) and a5760a );
a5765a <=( (not A200) and (not A199) );
a5766a <=( (not A166) and a5765a );
a5767a <=( a5766a and a5761a );
a5771a <=( A234 and (not A233) );
a5772a <=( A232 and a5771a );
a5776a <=( A266 and (not A265) );
a5777a <=( A236 and a5776a );
a5778a <=( a5777a and a5772a );
a5782a <=( A167 and (not A169) );
a5783a <=( A170 and a5782a );
a5787a <=( (not A201) and A199 );
a5788a <=( (not A166) and a5787a );
a5789a <=( a5788a and a5783a );
a5793a <=( A298 and A233 );
a5794a <=( (not A232) and a5793a );
a5798a <=( A301 and A300 );
a5799a <=( (not A299) and a5798a );
a5800a <=( a5799a and a5794a );
a5804a <=( A167 and (not A169) );
a5805a <=( A170 and a5804a );
a5809a <=( (not A201) and A199 );
a5810a <=( (not A166) and a5809a );
a5811a <=( a5810a and a5805a );
a5815a <=( A298 and A233 );
a5816a <=( (not A232) and a5815a );
a5820a <=( A302 and A300 );
a5821a <=( (not A299) and a5820a );
a5822a <=( a5821a and a5816a );
a5826a <=( A167 and (not A169) );
a5827a <=( A170 and a5826a );
a5831a <=( (not A201) and A199 );
a5832a <=( (not A166) and a5831a );
a5833a <=( a5832a and a5827a );
a5837a <=( A265 and A233 );
a5838a <=( (not A232) and a5837a );
a5842a <=( A268 and A267 );
a5843a <=( (not A266) and a5842a );
a5844a <=( a5843a and a5838a );
a5848a <=( A167 and (not A169) );
a5849a <=( A170 and a5848a );
a5853a <=( (not A201) and A199 );
a5854a <=( (not A166) and a5853a );
a5855a <=( a5854a and a5849a );
a5859a <=( A265 and A233 );
a5860a <=( (not A232) and a5859a );
a5864a <=( A269 and A267 );
a5865a <=( (not A266) and a5864a );
a5866a <=( a5865a and a5860a );
a5870a <=( A167 and (not A169) );
a5871a <=( A170 and a5870a );
a5875a <=( (not A201) and A199 );
a5876a <=( (not A166) and a5875a );
a5877a <=( a5876a and a5871a );
a5881a <=( A234 and (not A233) );
a5882a <=( A232 and a5881a );
a5886a <=( A299 and (not A298) );
a5887a <=( A235 and a5886a );
a5888a <=( a5887a and a5882a );
a5892a <=( A167 and (not A169) );
a5893a <=( A170 and a5892a );
a5897a <=( (not A201) and A199 );
a5898a <=( (not A166) and a5897a );
a5899a <=( a5898a and a5893a );
a5903a <=( A234 and (not A233) );
a5904a <=( A232 and a5903a );
a5908a <=( A266 and (not A265) );
a5909a <=( A235 and a5908a );
a5910a <=( a5909a and a5904a );
a5914a <=( A167 and (not A169) );
a5915a <=( A170 and a5914a );
a5919a <=( (not A201) and A199 );
a5920a <=( (not A166) and a5919a );
a5921a <=( a5920a and a5915a );
a5925a <=( A234 and (not A233) );
a5926a <=( A232 and a5925a );
a5930a <=( A299 and (not A298) );
a5931a <=( A236 and a5930a );
a5932a <=( a5931a and a5926a );
a5936a <=( A167 and (not A169) );
a5937a <=( A170 and a5936a );
a5941a <=( (not A201) and A199 );
a5942a <=( (not A166) and a5941a );
a5943a <=( a5942a and a5937a );
a5947a <=( A234 and (not A233) );
a5948a <=( A232 and a5947a );
a5952a <=( A266 and (not A265) );
a5953a <=( A236 and a5952a );
a5954a <=( a5953a and a5948a );
a5958a <=( A167 and (not A169) );
a5959a <=( A170 and a5958a );
a5963a <=( A200 and A199 );
a5964a <=( (not A166) and a5963a );
a5965a <=( a5964a and a5959a );
a5969a <=( A298 and A233 );
a5970a <=( (not A232) and a5969a );
a5974a <=( A301 and A300 );
a5975a <=( (not A299) and a5974a );
a5976a <=( a5975a and a5970a );
a5980a <=( A167 and (not A169) );
a5981a <=( A170 and a5980a );
a5985a <=( A200 and A199 );
a5986a <=( (not A166) and a5985a );
a5987a <=( a5986a and a5981a );
a5991a <=( A298 and A233 );
a5992a <=( (not A232) and a5991a );
a5996a <=( A302 and A300 );
a5997a <=( (not A299) and a5996a );
a5998a <=( a5997a and a5992a );
a6002a <=( A167 and (not A169) );
a6003a <=( A170 and a6002a );
a6007a <=( A200 and A199 );
a6008a <=( (not A166) and a6007a );
a6009a <=( a6008a and a6003a );
a6013a <=( A265 and A233 );
a6014a <=( (not A232) and a6013a );
a6018a <=( A268 and A267 );
a6019a <=( (not A266) and a6018a );
a6020a <=( a6019a and a6014a );
a6024a <=( A167 and (not A169) );
a6025a <=( A170 and a6024a );
a6029a <=( A200 and A199 );
a6030a <=( (not A166) and a6029a );
a6031a <=( a6030a and a6025a );
a6035a <=( A265 and A233 );
a6036a <=( (not A232) and a6035a );
a6040a <=( A269 and A267 );
a6041a <=( (not A266) and a6040a );
a6042a <=( a6041a and a6036a );
a6046a <=( A167 and (not A169) );
a6047a <=( A170 and a6046a );
a6051a <=( A200 and A199 );
a6052a <=( (not A166) and a6051a );
a6053a <=( a6052a and a6047a );
a6057a <=( A234 and (not A233) );
a6058a <=( A232 and a6057a );
a6062a <=( A299 and (not A298) );
a6063a <=( A235 and a6062a );
a6064a <=( a6063a and a6058a );
a6068a <=( A167 and (not A169) );
a6069a <=( A170 and a6068a );
a6073a <=( A200 and A199 );
a6074a <=( (not A166) and a6073a );
a6075a <=( a6074a and a6069a );
a6079a <=( A234 and (not A233) );
a6080a <=( A232 and a6079a );
a6084a <=( A266 and (not A265) );
a6085a <=( A235 and a6084a );
a6086a <=( a6085a and a6080a );
a6090a <=( A167 and (not A169) );
a6091a <=( A170 and a6090a );
a6095a <=( A200 and A199 );
a6096a <=( (not A166) and a6095a );
a6097a <=( a6096a and a6091a );
a6101a <=( A234 and (not A233) );
a6102a <=( A232 and a6101a );
a6106a <=( A299 and (not A298) );
a6107a <=( A236 and a6106a );
a6108a <=( a6107a and a6102a );
a6112a <=( A167 and (not A169) );
a6113a <=( A170 and a6112a );
a6117a <=( A200 and A199 );
a6118a <=( (not A166) and a6117a );
a6119a <=( a6118a and a6113a );
a6123a <=( A234 and (not A233) );
a6124a <=( A232 and a6123a );
a6128a <=( A266 and (not A265) );
a6129a <=( A236 and a6128a );
a6130a <=( a6129a and a6124a );
a6134a <=( A167 and (not A169) );
a6135a <=( A170 and a6134a );
a6139a <=( (not A200) and (not A199) );
a6140a <=( (not A166) and a6139a );
a6141a <=( a6140a and a6135a );
a6145a <=( A298 and A233 );
a6146a <=( (not A232) and a6145a );
a6150a <=( A301 and A300 );
a6151a <=( (not A299) and a6150a );
a6152a <=( a6151a and a6146a );
a6156a <=( A167 and (not A169) );
a6157a <=( A170 and a6156a );
a6161a <=( (not A200) and (not A199) );
a6162a <=( (not A166) and a6161a );
a6163a <=( a6162a and a6157a );
a6167a <=( A298 and A233 );
a6168a <=( (not A232) and a6167a );
a6172a <=( A302 and A300 );
a6173a <=( (not A299) and a6172a );
a6174a <=( a6173a and a6168a );
a6178a <=( A167 and (not A169) );
a6179a <=( A170 and a6178a );
a6183a <=( (not A200) and (not A199) );
a6184a <=( (not A166) and a6183a );
a6185a <=( a6184a and a6179a );
a6189a <=( A265 and A233 );
a6190a <=( (not A232) and a6189a );
a6194a <=( A268 and A267 );
a6195a <=( (not A266) and a6194a );
a6196a <=( a6195a and a6190a );
a6200a <=( A167 and (not A169) );
a6201a <=( A170 and a6200a );
a6205a <=( (not A200) and (not A199) );
a6206a <=( (not A166) and a6205a );
a6207a <=( a6206a and a6201a );
a6211a <=( A265 and A233 );
a6212a <=( (not A232) and a6211a );
a6216a <=( A269 and A267 );
a6217a <=( (not A266) and a6216a );
a6218a <=( a6217a and a6212a );
a6222a <=( A167 and (not A169) );
a6223a <=( A170 and a6222a );
a6227a <=( (not A200) and (not A199) );
a6228a <=( (not A166) and a6227a );
a6229a <=( a6228a and a6223a );
a6233a <=( A234 and (not A233) );
a6234a <=( A232 and a6233a );
a6238a <=( A299 and (not A298) );
a6239a <=( A235 and a6238a );
a6240a <=( a6239a and a6234a );
a6244a <=( A167 and (not A169) );
a6245a <=( A170 and a6244a );
a6249a <=( (not A200) and (not A199) );
a6250a <=( (not A166) and a6249a );
a6251a <=( a6250a and a6245a );
a6255a <=( A234 and (not A233) );
a6256a <=( A232 and a6255a );
a6260a <=( A266 and (not A265) );
a6261a <=( A235 and a6260a );
a6262a <=( a6261a and a6256a );
a6266a <=( A167 and (not A169) );
a6267a <=( A170 and a6266a );
a6271a <=( (not A200) and (not A199) );
a6272a <=( (not A166) and a6271a );
a6273a <=( a6272a and a6267a );
a6277a <=( A234 and (not A233) );
a6278a <=( A232 and a6277a );
a6282a <=( A299 and (not A298) );
a6283a <=( A236 and a6282a );
a6284a <=( a6283a and a6278a );
a6288a <=( A167 and (not A169) );
a6289a <=( A170 and a6288a );
a6293a <=( (not A200) and (not A199) );
a6294a <=( (not A166) and a6293a );
a6295a <=( a6294a and a6289a );
a6299a <=( A234 and (not A233) );
a6300a <=( A232 and a6299a );
a6304a <=( A266 and (not A265) );
a6305a <=( A236 and a6304a );
a6306a <=( a6305a and a6300a );
a6310a <=( (not A167) and (not A169) );
a6311a <=( A170 and a6310a );
a6315a <=( (not A201) and A199 );
a6316a <=( A166 and a6315a );
a6317a <=( a6316a and a6311a );
a6321a <=( A298 and A233 );
a6322a <=( (not A232) and a6321a );
a6326a <=( A301 and A300 );
a6327a <=( (not A299) and a6326a );
a6328a <=( a6327a and a6322a );
a6332a <=( (not A167) and (not A169) );
a6333a <=( A170 and a6332a );
a6337a <=( (not A201) and A199 );
a6338a <=( A166 and a6337a );
a6339a <=( a6338a and a6333a );
a6343a <=( A298 and A233 );
a6344a <=( (not A232) and a6343a );
a6348a <=( A302 and A300 );
a6349a <=( (not A299) and a6348a );
a6350a <=( a6349a and a6344a );
a6354a <=( (not A167) and (not A169) );
a6355a <=( A170 and a6354a );
a6359a <=( (not A201) and A199 );
a6360a <=( A166 and a6359a );
a6361a <=( a6360a and a6355a );
a6365a <=( A265 and A233 );
a6366a <=( (not A232) and a6365a );
a6370a <=( A268 and A267 );
a6371a <=( (not A266) and a6370a );
a6372a <=( a6371a and a6366a );
a6376a <=( (not A167) and (not A169) );
a6377a <=( A170 and a6376a );
a6381a <=( (not A201) and A199 );
a6382a <=( A166 and a6381a );
a6383a <=( a6382a and a6377a );
a6387a <=( A265 and A233 );
a6388a <=( (not A232) and a6387a );
a6392a <=( A269 and A267 );
a6393a <=( (not A266) and a6392a );
a6394a <=( a6393a and a6388a );
a6398a <=( (not A167) and (not A169) );
a6399a <=( A170 and a6398a );
a6403a <=( (not A201) and A199 );
a6404a <=( A166 and a6403a );
a6405a <=( a6404a and a6399a );
a6409a <=( A234 and (not A233) );
a6410a <=( A232 and a6409a );
a6414a <=( A299 and (not A298) );
a6415a <=( A235 and a6414a );
a6416a <=( a6415a and a6410a );
a6420a <=( (not A167) and (not A169) );
a6421a <=( A170 and a6420a );
a6425a <=( (not A201) and A199 );
a6426a <=( A166 and a6425a );
a6427a <=( a6426a and a6421a );
a6431a <=( A234 and (not A233) );
a6432a <=( A232 and a6431a );
a6436a <=( A266 and (not A265) );
a6437a <=( A235 and a6436a );
a6438a <=( a6437a and a6432a );
a6442a <=( (not A167) and (not A169) );
a6443a <=( A170 and a6442a );
a6447a <=( (not A201) and A199 );
a6448a <=( A166 and a6447a );
a6449a <=( a6448a and a6443a );
a6453a <=( A234 and (not A233) );
a6454a <=( A232 and a6453a );
a6458a <=( A299 and (not A298) );
a6459a <=( A236 and a6458a );
a6460a <=( a6459a and a6454a );
a6464a <=( (not A167) and (not A169) );
a6465a <=( A170 and a6464a );
a6469a <=( (not A201) and A199 );
a6470a <=( A166 and a6469a );
a6471a <=( a6470a and a6465a );
a6475a <=( A234 and (not A233) );
a6476a <=( A232 and a6475a );
a6480a <=( A266 and (not A265) );
a6481a <=( A236 and a6480a );
a6482a <=( a6481a and a6476a );
a6486a <=( (not A167) and (not A169) );
a6487a <=( A170 and a6486a );
a6491a <=( A200 and A199 );
a6492a <=( A166 and a6491a );
a6493a <=( a6492a and a6487a );
a6497a <=( A298 and A233 );
a6498a <=( (not A232) and a6497a );
a6502a <=( A301 and A300 );
a6503a <=( (not A299) and a6502a );
a6504a <=( a6503a and a6498a );
a6508a <=( (not A167) and (not A169) );
a6509a <=( A170 and a6508a );
a6513a <=( A200 and A199 );
a6514a <=( A166 and a6513a );
a6515a <=( a6514a and a6509a );
a6519a <=( A298 and A233 );
a6520a <=( (not A232) and a6519a );
a6524a <=( A302 and A300 );
a6525a <=( (not A299) and a6524a );
a6526a <=( a6525a and a6520a );
a6530a <=( (not A167) and (not A169) );
a6531a <=( A170 and a6530a );
a6535a <=( A200 and A199 );
a6536a <=( A166 and a6535a );
a6537a <=( a6536a and a6531a );
a6541a <=( A265 and A233 );
a6542a <=( (not A232) and a6541a );
a6546a <=( A268 and A267 );
a6547a <=( (not A266) and a6546a );
a6548a <=( a6547a and a6542a );
a6552a <=( (not A167) and (not A169) );
a6553a <=( A170 and a6552a );
a6557a <=( A200 and A199 );
a6558a <=( A166 and a6557a );
a6559a <=( a6558a and a6553a );
a6563a <=( A265 and A233 );
a6564a <=( (not A232) and a6563a );
a6568a <=( A269 and A267 );
a6569a <=( (not A266) and a6568a );
a6570a <=( a6569a and a6564a );
a6574a <=( (not A167) and (not A169) );
a6575a <=( A170 and a6574a );
a6579a <=( A200 and A199 );
a6580a <=( A166 and a6579a );
a6581a <=( a6580a and a6575a );
a6585a <=( A234 and (not A233) );
a6586a <=( A232 and a6585a );
a6590a <=( A299 and (not A298) );
a6591a <=( A235 and a6590a );
a6592a <=( a6591a and a6586a );
a6596a <=( (not A167) and (not A169) );
a6597a <=( A170 and a6596a );
a6601a <=( A200 and A199 );
a6602a <=( A166 and a6601a );
a6603a <=( a6602a and a6597a );
a6607a <=( A234 and (not A233) );
a6608a <=( A232 and a6607a );
a6612a <=( A266 and (not A265) );
a6613a <=( A235 and a6612a );
a6614a <=( a6613a and a6608a );
a6618a <=( (not A167) and (not A169) );
a6619a <=( A170 and a6618a );
a6623a <=( A200 and A199 );
a6624a <=( A166 and a6623a );
a6625a <=( a6624a and a6619a );
a6629a <=( A234 and (not A233) );
a6630a <=( A232 and a6629a );
a6634a <=( A299 and (not A298) );
a6635a <=( A236 and a6634a );
a6636a <=( a6635a and a6630a );
a6640a <=( (not A167) and (not A169) );
a6641a <=( A170 and a6640a );
a6645a <=( A200 and A199 );
a6646a <=( A166 and a6645a );
a6647a <=( a6646a and a6641a );
a6651a <=( A234 and (not A233) );
a6652a <=( A232 and a6651a );
a6656a <=( A266 and (not A265) );
a6657a <=( A236 and a6656a );
a6658a <=( a6657a and a6652a );
a6662a <=( (not A167) and (not A169) );
a6663a <=( A170 and a6662a );
a6667a <=( (not A200) and (not A199) );
a6668a <=( A166 and a6667a );
a6669a <=( a6668a and a6663a );
a6673a <=( A298 and A233 );
a6674a <=( (not A232) and a6673a );
a6678a <=( A301 and A300 );
a6679a <=( (not A299) and a6678a );
a6680a <=( a6679a and a6674a );
a6684a <=( (not A167) and (not A169) );
a6685a <=( A170 and a6684a );
a6689a <=( (not A200) and (not A199) );
a6690a <=( A166 and a6689a );
a6691a <=( a6690a and a6685a );
a6695a <=( A298 and A233 );
a6696a <=( (not A232) and a6695a );
a6700a <=( A302 and A300 );
a6701a <=( (not A299) and a6700a );
a6702a <=( a6701a and a6696a );
a6706a <=( (not A167) and (not A169) );
a6707a <=( A170 and a6706a );
a6711a <=( (not A200) and (not A199) );
a6712a <=( A166 and a6711a );
a6713a <=( a6712a and a6707a );
a6717a <=( A265 and A233 );
a6718a <=( (not A232) and a6717a );
a6722a <=( A268 and A267 );
a6723a <=( (not A266) and a6722a );
a6724a <=( a6723a and a6718a );
a6728a <=( (not A167) and (not A169) );
a6729a <=( A170 and a6728a );
a6733a <=( (not A200) and (not A199) );
a6734a <=( A166 and a6733a );
a6735a <=( a6734a and a6729a );
a6739a <=( A265 and A233 );
a6740a <=( (not A232) and a6739a );
a6744a <=( A269 and A267 );
a6745a <=( (not A266) and a6744a );
a6746a <=( a6745a and a6740a );
a6750a <=( (not A167) and (not A169) );
a6751a <=( A170 and a6750a );
a6755a <=( (not A200) and (not A199) );
a6756a <=( A166 and a6755a );
a6757a <=( a6756a and a6751a );
a6761a <=( A234 and (not A233) );
a6762a <=( A232 and a6761a );
a6766a <=( A299 and (not A298) );
a6767a <=( A235 and a6766a );
a6768a <=( a6767a and a6762a );
a6772a <=( (not A167) and (not A169) );
a6773a <=( A170 and a6772a );
a6777a <=( (not A200) and (not A199) );
a6778a <=( A166 and a6777a );
a6779a <=( a6778a and a6773a );
a6783a <=( A234 and (not A233) );
a6784a <=( A232 and a6783a );
a6788a <=( A266 and (not A265) );
a6789a <=( A235 and a6788a );
a6790a <=( a6789a and a6784a );
a6794a <=( (not A167) and (not A169) );
a6795a <=( A170 and a6794a );
a6799a <=( (not A200) and (not A199) );
a6800a <=( A166 and a6799a );
a6801a <=( a6800a and a6795a );
a6805a <=( A234 and (not A233) );
a6806a <=( A232 and a6805a );
a6810a <=( A299 and (not A298) );
a6811a <=( A236 and a6810a );
a6812a <=( a6811a and a6806a );
a6816a <=( (not A167) and (not A169) );
a6817a <=( A170 and a6816a );
a6821a <=( (not A200) and (not A199) );
a6822a <=( A166 and a6821a );
a6823a <=( a6822a and a6817a );
a6827a <=( A234 and (not A233) );
a6828a <=( A232 and a6827a );
a6832a <=( A266 and (not A265) );
a6833a <=( A236 and a6832a );
a6834a <=( a6833a and a6828a );
a6838a <=( A199 and A166 );
a6839a <=( A168 and a6838a );
a6843a <=( A232 and (not A203) );
a6844a <=( (not A202) and a6843a );
a6845a <=( a6844a and a6839a );
a6849a <=( A235 and A234 );
a6850a <=( (not A233) and a6849a );
a6853a <=( (not A299) and A298 );
a6856a <=( A301 and A300 );
a6857a <=( a6856a and a6853a );
a6858a <=( a6857a and a6850a );
a6862a <=( A199 and A166 );
a6863a <=( A168 and a6862a );
a6867a <=( A232 and (not A203) );
a6868a <=( (not A202) and a6867a );
a6869a <=( a6868a and a6863a );
a6873a <=( A235 and A234 );
a6874a <=( (not A233) and a6873a );
a6877a <=( (not A299) and A298 );
a6880a <=( A302 and A300 );
a6881a <=( a6880a and a6877a );
a6882a <=( a6881a and a6874a );
a6886a <=( A199 and A166 );
a6887a <=( A168 and a6886a );
a6891a <=( A232 and (not A203) );
a6892a <=( (not A202) and a6891a );
a6893a <=( a6892a and a6887a );
a6897a <=( A235 and A234 );
a6898a <=( (not A233) and a6897a );
a6901a <=( (not A266) and A265 );
a6904a <=( A268 and A267 );
a6905a <=( a6904a and a6901a );
a6906a <=( a6905a and a6898a );
a6910a <=( A199 and A166 );
a6911a <=( A168 and a6910a );
a6915a <=( A232 and (not A203) );
a6916a <=( (not A202) and a6915a );
a6917a <=( a6916a and a6911a );
a6921a <=( A235 and A234 );
a6922a <=( (not A233) and a6921a );
a6925a <=( (not A266) and A265 );
a6928a <=( A269 and A267 );
a6929a <=( a6928a and a6925a );
a6930a <=( a6929a and a6922a );
a6934a <=( A199 and A166 );
a6935a <=( A168 and a6934a );
a6939a <=( A232 and (not A203) );
a6940a <=( (not A202) and a6939a );
a6941a <=( a6940a and a6935a );
a6945a <=( A236 and A234 );
a6946a <=( (not A233) and a6945a );
a6949a <=( (not A299) and A298 );
a6952a <=( A301 and A300 );
a6953a <=( a6952a and a6949a );
a6954a <=( a6953a and a6946a );
a6958a <=( A199 and A166 );
a6959a <=( A168 and a6958a );
a6963a <=( A232 and (not A203) );
a6964a <=( (not A202) and a6963a );
a6965a <=( a6964a and a6959a );
a6969a <=( A236 and A234 );
a6970a <=( (not A233) and a6969a );
a6973a <=( (not A299) and A298 );
a6976a <=( A302 and A300 );
a6977a <=( a6976a and a6973a );
a6978a <=( a6977a and a6970a );
a6982a <=( A199 and A166 );
a6983a <=( A168 and a6982a );
a6987a <=( A232 and (not A203) );
a6988a <=( (not A202) and a6987a );
a6989a <=( a6988a and a6983a );
a6993a <=( A236 and A234 );
a6994a <=( (not A233) and a6993a );
a6997a <=( (not A266) and A265 );
a7000a <=( A268 and A267 );
a7001a <=( a7000a and a6997a );
a7002a <=( a7001a and a6994a );
a7006a <=( A199 and A166 );
a7007a <=( A168 and a7006a );
a7011a <=( A232 and (not A203) );
a7012a <=( (not A202) and a7011a );
a7013a <=( a7012a and a7007a );
a7017a <=( A236 and A234 );
a7018a <=( (not A233) and a7017a );
a7021a <=( (not A266) and A265 );
a7024a <=( A269 and A267 );
a7025a <=( a7024a and a7021a );
a7026a <=( a7025a and a7018a );
a7030a <=( A199 and A167 );
a7031a <=( A168 and a7030a );
a7035a <=( A232 and (not A203) );
a7036a <=( (not A202) and a7035a );
a7037a <=( a7036a and a7031a );
a7041a <=( A235 and A234 );
a7042a <=( (not A233) and a7041a );
a7045a <=( (not A299) and A298 );
a7048a <=( A301 and A300 );
a7049a <=( a7048a and a7045a );
a7050a <=( a7049a and a7042a );
a7054a <=( A199 and A167 );
a7055a <=( A168 and a7054a );
a7059a <=( A232 and (not A203) );
a7060a <=( (not A202) and a7059a );
a7061a <=( a7060a and a7055a );
a7065a <=( A235 and A234 );
a7066a <=( (not A233) and a7065a );
a7069a <=( (not A299) and A298 );
a7072a <=( A302 and A300 );
a7073a <=( a7072a and a7069a );
a7074a <=( a7073a and a7066a );
a7078a <=( A199 and A167 );
a7079a <=( A168 and a7078a );
a7083a <=( A232 and (not A203) );
a7084a <=( (not A202) and a7083a );
a7085a <=( a7084a and a7079a );
a7089a <=( A235 and A234 );
a7090a <=( (not A233) and a7089a );
a7093a <=( (not A266) and A265 );
a7096a <=( A268 and A267 );
a7097a <=( a7096a and a7093a );
a7098a <=( a7097a and a7090a );
a7102a <=( A199 and A167 );
a7103a <=( A168 and a7102a );
a7107a <=( A232 and (not A203) );
a7108a <=( (not A202) and a7107a );
a7109a <=( a7108a and a7103a );
a7113a <=( A235 and A234 );
a7114a <=( (not A233) and a7113a );
a7117a <=( (not A266) and A265 );
a7120a <=( A269 and A267 );
a7121a <=( a7120a and a7117a );
a7122a <=( a7121a and a7114a );
a7126a <=( A199 and A167 );
a7127a <=( A168 and a7126a );
a7131a <=( A232 and (not A203) );
a7132a <=( (not A202) and a7131a );
a7133a <=( a7132a and a7127a );
a7137a <=( A236 and A234 );
a7138a <=( (not A233) and a7137a );
a7141a <=( (not A299) and A298 );
a7144a <=( A301 and A300 );
a7145a <=( a7144a and a7141a );
a7146a <=( a7145a and a7138a );
a7150a <=( A199 and A167 );
a7151a <=( A168 and a7150a );
a7155a <=( A232 and (not A203) );
a7156a <=( (not A202) and a7155a );
a7157a <=( a7156a and a7151a );
a7161a <=( A236 and A234 );
a7162a <=( (not A233) and a7161a );
a7165a <=( (not A299) and A298 );
a7168a <=( A302 and A300 );
a7169a <=( a7168a and a7165a );
a7170a <=( a7169a and a7162a );
a7174a <=( A199 and A167 );
a7175a <=( A168 and a7174a );
a7179a <=( A232 and (not A203) );
a7180a <=( (not A202) and a7179a );
a7181a <=( a7180a and a7175a );
a7185a <=( A236 and A234 );
a7186a <=( (not A233) and a7185a );
a7189a <=( (not A266) and A265 );
a7192a <=( A268 and A267 );
a7193a <=( a7192a and a7189a );
a7194a <=( a7193a and a7186a );
a7198a <=( A199 and A167 );
a7199a <=( A168 and a7198a );
a7203a <=( A232 and (not A203) );
a7204a <=( (not A202) and a7203a );
a7205a <=( a7204a and a7199a );
a7209a <=( A236 and A234 );
a7210a <=( (not A233) and a7209a );
a7213a <=( (not A266) and A265 );
a7216a <=( A269 and A267 );
a7217a <=( a7216a and a7213a );
a7218a <=( a7217a and a7210a );
a7222a <=( A167 and A169 );
a7223a <=( (not A170) and a7222a );
a7227a <=( (not A202) and A199 );
a7228a <=( A166 and a7227a );
a7229a <=( a7228a and a7223a );
a7233a <=( A233 and (not A232) );
a7234a <=( (not A203) and a7233a );
a7237a <=( (not A299) and A298 );
a7240a <=( A301 and A300 );
a7241a <=( a7240a and a7237a );
a7242a <=( a7241a and a7234a );
a7246a <=( A167 and A169 );
a7247a <=( (not A170) and a7246a );
a7251a <=( (not A202) and A199 );
a7252a <=( A166 and a7251a );
a7253a <=( a7252a and a7247a );
a7257a <=( A233 and (not A232) );
a7258a <=( (not A203) and a7257a );
a7261a <=( (not A299) and A298 );
a7264a <=( A302 and A300 );
a7265a <=( a7264a and a7261a );
a7266a <=( a7265a and a7258a );
a7270a <=( A167 and A169 );
a7271a <=( (not A170) and a7270a );
a7275a <=( (not A202) and A199 );
a7276a <=( A166 and a7275a );
a7277a <=( a7276a and a7271a );
a7281a <=( A233 and (not A232) );
a7282a <=( (not A203) and a7281a );
a7285a <=( (not A266) and A265 );
a7288a <=( A268 and A267 );
a7289a <=( a7288a and a7285a );
a7290a <=( a7289a and a7282a );
a7294a <=( A167 and A169 );
a7295a <=( (not A170) and a7294a );
a7299a <=( (not A202) and A199 );
a7300a <=( A166 and a7299a );
a7301a <=( a7300a and a7295a );
a7305a <=( A233 and (not A232) );
a7306a <=( (not A203) and a7305a );
a7309a <=( (not A266) and A265 );
a7312a <=( A269 and A267 );
a7313a <=( a7312a and a7309a );
a7314a <=( a7313a and a7306a );
a7318a <=( A167 and A169 );
a7319a <=( (not A170) and a7318a );
a7323a <=( (not A202) and A199 );
a7324a <=( A166 and a7323a );
a7325a <=( a7324a and a7319a );
a7329a <=( (not A233) and A232 );
a7330a <=( (not A203) and a7329a );
a7333a <=( A235 and A234 );
a7336a <=( A299 and (not A298) );
a7337a <=( a7336a and a7333a );
a7338a <=( a7337a and a7330a );
a7342a <=( A167 and A169 );
a7343a <=( (not A170) and a7342a );
a7347a <=( (not A202) and A199 );
a7348a <=( A166 and a7347a );
a7349a <=( a7348a and a7343a );
a7353a <=( (not A233) and A232 );
a7354a <=( (not A203) and a7353a );
a7357a <=( A235 and A234 );
a7360a <=( A266 and (not A265) );
a7361a <=( a7360a and a7357a );
a7362a <=( a7361a and a7354a );
a7366a <=( A167 and A169 );
a7367a <=( (not A170) and a7366a );
a7371a <=( (not A202) and A199 );
a7372a <=( A166 and a7371a );
a7373a <=( a7372a and a7367a );
a7377a <=( (not A233) and A232 );
a7378a <=( (not A203) and a7377a );
a7381a <=( A236 and A234 );
a7384a <=( A299 and (not A298) );
a7385a <=( a7384a and a7381a );
a7386a <=( a7385a and a7378a );
a7390a <=( A167 and A169 );
a7391a <=( (not A170) and a7390a );
a7395a <=( (not A202) and A199 );
a7396a <=( A166 and a7395a );
a7397a <=( a7396a and a7391a );
a7401a <=( (not A233) and A232 );
a7402a <=( (not A203) and a7401a );
a7405a <=( A236 and A234 );
a7408a <=( A266 and (not A265) );
a7409a <=( a7408a and a7405a );
a7410a <=( a7409a and a7402a );
a7414a <=( (not A167) and A169 );
a7415a <=( (not A170) and a7414a );
a7419a <=( (not A202) and A199 );
a7420a <=( (not A166) and a7419a );
a7421a <=( a7420a and a7415a );
a7425a <=( A233 and (not A232) );
a7426a <=( (not A203) and a7425a );
a7429a <=( (not A299) and A298 );
a7432a <=( A301 and A300 );
a7433a <=( a7432a and a7429a );
a7434a <=( a7433a and a7426a );
a7438a <=( (not A167) and A169 );
a7439a <=( (not A170) and a7438a );
a7443a <=( (not A202) and A199 );
a7444a <=( (not A166) and a7443a );
a7445a <=( a7444a and a7439a );
a7449a <=( A233 and (not A232) );
a7450a <=( (not A203) and a7449a );
a7453a <=( (not A299) and A298 );
a7456a <=( A302 and A300 );
a7457a <=( a7456a and a7453a );
a7458a <=( a7457a and a7450a );
a7462a <=( (not A167) and A169 );
a7463a <=( (not A170) and a7462a );
a7467a <=( (not A202) and A199 );
a7468a <=( (not A166) and a7467a );
a7469a <=( a7468a and a7463a );
a7473a <=( A233 and (not A232) );
a7474a <=( (not A203) and a7473a );
a7477a <=( (not A266) and A265 );
a7480a <=( A268 and A267 );
a7481a <=( a7480a and a7477a );
a7482a <=( a7481a and a7474a );
a7486a <=( (not A167) and A169 );
a7487a <=( (not A170) and a7486a );
a7491a <=( (not A202) and A199 );
a7492a <=( (not A166) and a7491a );
a7493a <=( a7492a and a7487a );
a7497a <=( A233 and (not A232) );
a7498a <=( (not A203) and a7497a );
a7501a <=( (not A266) and A265 );
a7504a <=( A269 and A267 );
a7505a <=( a7504a and a7501a );
a7506a <=( a7505a and a7498a );
a7510a <=( (not A167) and A169 );
a7511a <=( (not A170) and a7510a );
a7515a <=( (not A202) and A199 );
a7516a <=( (not A166) and a7515a );
a7517a <=( a7516a and a7511a );
a7521a <=( (not A233) and A232 );
a7522a <=( (not A203) and a7521a );
a7525a <=( A235 and A234 );
a7528a <=( A299 and (not A298) );
a7529a <=( a7528a and a7525a );
a7530a <=( a7529a and a7522a );
a7534a <=( (not A167) and A169 );
a7535a <=( (not A170) and a7534a );
a7539a <=( (not A202) and A199 );
a7540a <=( (not A166) and a7539a );
a7541a <=( a7540a and a7535a );
a7545a <=( (not A233) and A232 );
a7546a <=( (not A203) and a7545a );
a7549a <=( A235 and A234 );
a7552a <=( A266 and (not A265) );
a7553a <=( a7552a and a7549a );
a7554a <=( a7553a and a7546a );
a7558a <=( (not A167) and A169 );
a7559a <=( (not A170) and a7558a );
a7563a <=( (not A202) and A199 );
a7564a <=( (not A166) and a7563a );
a7565a <=( a7564a and a7559a );
a7569a <=( (not A233) and A232 );
a7570a <=( (not A203) and a7569a );
a7573a <=( A236 and A234 );
a7576a <=( A299 and (not A298) );
a7577a <=( a7576a and a7573a );
a7578a <=( a7577a and a7570a );
a7582a <=( (not A167) and A169 );
a7583a <=( (not A170) and a7582a );
a7587a <=( (not A202) and A199 );
a7588a <=( (not A166) and a7587a );
a7589a <=( a7588a and a7583a );
a7593a <=( (not A233) and A232 );
a7594a <=( (not A203) and a7593a );
a7597a <=( A236 and A234 );
a7600a <=( A266 and (not A265) );
a7601a <=( a7600a and a7597a );
a7602a <=( a7601a and a7594a );
a7606a <=( A167 and (not A169) );
a7607a <=( A170 and a7606a );
a7611a <=( (not A202) and A199 );
a7612a <=( (not A166) and a7611a );
a7613a <=( a7612a and a7607a );
a7617a <=( A233 and (not A232) );
a7618a <=( (not A203) and a7617a );
a7621a <=( (not A299) and A298 );
a7624a <=( A301 and A300 );
a7625a <=( a7624a and a7621a );
a7626a <=( a7625a and a7618a );
a7630a <=( A167 and (not A169) );
a7631a <=( A170 and a7630a );
a7635a <=( (not A202) and A199 );
a7636a <=( (not A166) and a7635a );
a7637a <=( a7636a and a7631a );
a7641a <=( A233 and (not A232) );
a7642a <=( (not A203) and a7641a );
a7645a <=( (not A299) and A298 );
a7648a <=( A302 and A300 );
a7649a <=( a7648a and a7645a );
a7650a <=( a7649a and a7642a );
a7654a <=( A167 and (not A169) );
a7655a <=( A170 and a7654a );
a7659a <=( (not A202) and A199 );
a7660a <=( (not A166) and a7659a );
a7661a <=( a7660a and a7655a );
a7665a <=( A233 and (not A232) );
a7666a <=( (not A203) and a7665a );
a7669a <=( (not A266) and A265 );
a7672a <=( A268 and A267 );
a7673a <=( a7672a and a7669a );
a7674a <=( a7673a and a7666a );
a7678a <=( A167 and (not A169) );
a7679a <=( A170 and a7678a );
a7683a <=( (not A202) and A199 );
a7684a <=( (not A166) and a7683a );
a7685a <=( a7684a and a7679a );
a7689a <=( A233 and (not A232) );
a7690a <=( (not A203) and a7689a );
a7693a <=( (not A266) and A265 );
a7696a <=( A269 and A267 );
a7697a <=( a7696a and a7693a );
a7698a <=( a7697a and a7690a );
a7702a <=( A167 and (not A169) );
a7703a <=( A170 and a7702a );
a7707a <=( (not A202) and A199 );
a7708a <=( (not A166) and a7707a );
a7709a <=( a7708a and a7703a );
a7713a <=( (not A233) and A232 );
a7714a <=( (not A203) and a7713a );
a7717a <=( A235 and A234 );
a7720a <=( A299 and (not A298) );
a7721a <=( a7720a and a7717a );
a7722a <=( a7721a and a7714a );
a7726a <=( A167 and (not A169) );
a7727a <=( A170 and a7726a );
a7731a <=( (not A202) and A199 );
a7732a <=( (not A166) and a7731a );
a7733a <=( a7732a and a7727a );
a7737a <=( (not A233) and A232 );
a7738a <=( (not A203) and a7737a );
a7741a <=( A235 and A234 );
a7744a <=( A266 and (not A265) );
a7745a <=( a7744a and a7741a );
a7746a <=( a7745a and a7738a );
a7750a <=( A167 and (not A169) );
a7751a <=( A170 and a7750a );
a7755a <=( (not A202) and A199 );
a7756a <=( (not A166) and a7755a );
a7757a <=( a7756a and a7751a );
a7761a <=( (not A233) and A232 );
a7762a <=( (not A203) and a7761a );
a7765a <=( A236 and A234 );
a7768a <=( A299 and (not A298) );
a7769a <=( a7768a and a7765a );
a7770a <=( a7769a and a7762a );
a7774a <=( A167 and (not A169) );
a7775a <=( A170 and a7774a );
a7779a <=( (not A202) and A199 );
a7780a <=( (not A166) and a7779a );
a7781a <=( a7780a and a7775a );
a7785a <=( (not A233) and A232 );
a7786a <=( (not A203) and a7785a );
a7789a <=( A236 and A234 );
a7792a <=( A266 and (not A265) );
a7793a <=( a7792a and a7789a );
a7794a <=( a7793a and a7786a );
a7798a <=( (not A167) and (not A169) );
a7799a <=( A170 and a7798a );
a7803a <=( (not A202) and A199 );
a7804a <=( A166 and a7803a );
a7805a <=( a7804a and a7799a );
a7809a <=( A233 and (not A232) );
a7810a <=( (not A203) and a7809a );
a7813a <=( (not A299) and A298 );
a7816a <=( A301 and A300 );
a7817a <=( a7816a and a7813a );
a7818a <=( a7817a and a7810a );
a7822a <=( (not A167) and (not A169) );
a7823a <=( A170 and a7822a );
a7827a <=( (not A202) and A199 );
a7828a <=( A166 and a7827a );
a7829a <=( a7828a and a7823a );
a7833a <=( A233 and (not A232) );
a7834a <=( (not A203) and a7833a );
a7837a <=( (not A299) and A298 );
a7840a <=( A302 and A300 );
a7841a <=( a7840a and a7837a );
a7842a <=( a7841a and a7834a );
a7846a <=( (not A167) and (not A169) );
a7847a <=( A170 and a7846a );
a7851a <=( (not A202) and A199 );
a7852a <=( A166 and a7851a );
a7853a <=( a7852a and a7847a );
a7857a <=( A233 and (not A232) );
a7858a <=( (not A203) and a7857a );
a7861a <=( (not A266) and A265 );
a7864a <=( A268 and A267 );
a7865a <=( a7864a and a7861a );
a7866a <=( a7865a and a7858a );
a7870a <=( (not A167) and (not A169) );
a7871a <=( A170 and a7870a );
a7875a <=( (not A202) and A199 );
a7876a <=( A166 and a7875a );
a7877a <=( a7876a and a7871a );
a7881a <=( A233 and (not A232) );
a7882a <=( (not A203) and a7881a );
a7885a <=( (not A266) and A265 );
a7888a <=( A269 and A267 );
a7889a <=( a7888a and a7885a );
a7890a <=( a7889a and a7882a );
a7894a <=( (not A167) and (not A169) );
a7895a <=( A170 and a7894a );
a7899a <=( (not A202) and A199 );
a7900a <=( A166 and a7899a );
a7901a <=( a7900a and a7895a );
a7905a <=( (not A233) and A232 );
a7906a <=( (not A203) and a7905a );
a7909a <=( A235 and A234 );
a7912a <=( A299 and (not A298) );
a7913a <=( a7912a and a7909a );
a7914a <=( a7913a and a7906a );
a7918a <=( (not A167) and (not A169) );
a7919a <=( A170 and a7918a );
a7923a <=( (not A202) and A199 );
a7924a <=( A166 and a7923a );
a7925a <=( a7924a and a7919a );
a7929a <=( (not A233) and A232 );
a7930a <=( (not A203) and a7929a );
a7933a <=( A235 and A234 );
a7936a <=( A266 and (not A265) );
a7937a <=( a7936a and a7933a );
a7938a <=( a7937a and a7930a );
a7942a <=( (not A167) and (not A169) );
a7943a <=( A170 and a7942a );
a7947a <=( (not A202) and A199 );
a7948a <=( A166 and a7947a );
a7949a <=( a7948a and a7943a );
a7953a <=( (not A233) and A232 );
a7954a <=( (not A203) and a7953a );
a7957a <=( A236 and A234 );
a7960a <=( A299 and (not A298) );
a7961a <=( a7960a and a7957a );
a7962a <=( a7961a and a7954a );
a7966a <=( (not A167) and (not A169) );
a7967a <=( A170 and a7966a );
a7971a <=( (not A202) and A199 );
a7972a <=( A166 and a7971a );
a7973a <=( a7972a and a7967a );
a7977a <=( (not A233) and A232 );
a7978a <=( (not A203) and a7977a );
a7981a <=( A236 and A234 );
a7984a <=( A266 and (not A265) );
a7985a <=( a7984a and a7981a );
a7986a <=( a7985a and a7978a );
a7990a <=( A167 and A169 );
a7991a <=( (not A170) and a7990a );
a7994a <=( A199 and A166 );
a7997a <=( A232 and (not A201) );
a7998a <=( a7997a and a7994a );
a7999a <=( a7998a and a7991a );
a8003a <=( A235 and A234 );
a8004a <=( (not A233) and a8003a );
a8007a <=( (not A299) and A298 );
a8010a <=( A301 and A300 );
a8011a <=( a8010a and a8007a );
a8012a <=( a8011a and a8004a );
a8016a <=( A167 and A169 );
a8017a <=( (not A170) and a8016a );
a8020a <=( A199 and A166 );
a8023a <=( A232 and (not A201) );
a8024a <=( a8023a and a8020a );
a8025a <=( a8024a and a8017a );
a8029a <=( A235 and A234 );
a8030a <=( (not A233) and a8029a );
a8033a <=( (not A299) and A298 );
a8036a <=( A302 and A300 );
a8037a <=( a8036a and a8033a );
a8038a <=( a8037a and a8030a );
a8042a <=( A167 and A169 );
a8043a <=( (not A170) and a8042a );
a8046a <=( A199 and A166 );
a8049a <=( A232 and (not A201) );
a8050a <=( a8049a and a8046a );
a8051a <=( a8050a and a8043a );
a8055a <=( A235 and A234 );
a8056a <=( (not A233) and a8055a );
a8059a <=( (not A266) and A265 );
a8062a <=( A268 and A267 );
a8063a <=( a8062a and a8059a );
a8064a <=( a8063a and a8056a );
a8068a <=( A167 and A169 );
a8069a <=( (not A170) and a8068a );
a8072a <=( A199 and A166 );
a8075a <=( A232 and (not A201) );
a8076a <=( a8075a and a8072a );
a8077a <=( a8076a and a8069a );
a8081a <=( A235 and A234 );
a8082a <=( (not A233) and a8081a );
a8085a <=( (not A266) and A265 );
a8088a <=( A269 and A267 );
a8089a <=( a8088a and a8085a );
a8090a <=( a8089a and a8082a );
a8094a <=( A167 and A169 );
a8095a <=( (not A170) and a8094a );
a8098a <=( A199 and A166 );
a8101a <=( A232 and (not A201) );
a8102a <=( a8101a and a8098a );
a8103a <=( a8102a and a8095a );
a8107a <=( A236 and A234 );
a8108a <=( (not A233) and a8107a );
a8111a <=( (not A299) and A298 );
a8114a <=( A301 and A300 );
a8115a <=( a8114a and a8111a );
a8116a <=( a8115a and a8108a );
a8120a <=( A167 and A169 );
a8121a <=( (not A170) and a8120a );
a8124a <=( A199 and A166 );
a8127a <=( A232 and (not A201) );
a8128a <=( a8127a and a8124a );
a8129a <=( a8128a and a8121a );
a8133a <=( A236 and A234 );
a8134a <=( (not A233) and a8133a );
a8137a <=( (not A299) and A298 );
a8140a <=( A302 and A300 );
a8141a <=( a8140a and a8137a );
a8142a <=( a8141a and a8134a );
a8146a <=( A167 and A169 );
a8147a <=( (not A170) and a8146a );
a8150a <=( A199 and A166 );
a8153a <=( A232 and (not A201) );
a8154a <=( a8153a and a8150a );
a8155a <=( a8154a and a8147a );
a8159a <=( A236 and A234 );
a8160a <=( (not A233) and a8159a );
a8163a <=( (not A266) and A265 );
a8166a <=( A268 and A267 );
a8167a <=( a8166a and a8163a );
a8168a <=( a8167a and a8160a );
a8172a <=( A167 and A169 );
a8173a <=( (not A170) and a8172a );
a8176a <=( A199 and A166 );
a8179a <=( A232 and (not A201) );
a8180a <=( a8179a and a8176a );
a8181a <=( a8180a and a8173a );
a8185a <=( A236 and A234 );
a8186a <=( (not A233) and a8185a );
a8189a <=( (not A266) and A265 );
a8192a <=( A269 and A267 );
a8193a <=( a8192a and a8189a );
a8194a <=( a8193a and a8186a );
a8198a <=( A167 and A169 );
a8199a <=( (not A170) and a8198a );
a8202a <=( A199 and A166 );
a8205a <=( A232 and A200 );
a8206a <=( a8205a and a8202a );
a8207a <=( a8206a and a8199a );
a8211a <=( A235 and A234 );
a8212a <=( (not A233) and a8211a );
a8215a <=( (not A299) and A298 );
a8218a <=( A301 and A300 );
a8219a <=( a8218a and a8215a );
a8220a <=( a8219a and a8212a );
a8224a <=( A167 and A169 );
a8225a <=( (not A170) and a8224a );
a8228a <=( A199 and A166 );
a8231a <=( A232 and A200 );
a8232a <=( a8231a and a8228a );
a8233a <=( a8232a and a8225a );
a8237a <=( A235 and A234 );
a8238a <=( (not A233) and a8237a );
a8241a <=( (not A299) and A298 );
a8244a <=( A302 and A300 );
a8245a <=( a8244a and a8241a );
a8246a <=( a8245a and a8238a );
a8250a <=( A167 and A169 );
a8251a <=( (not A170) and a8250a );
a8254a <=( A199 and A166 );
a8257a <=( A232 and A200 );
a8258a <=( a8257a and a8254a );
a8259a <=( a8258a and a8251a );
a8263a <=( A235 and A234 );
a8264a <=( (not A233) and a8263a );
a8267a <=( (not A266) and A265 );
a8270a <=( A268 and A267 );
a8271a <=( a8270a and a8267a );
a8272a <=( a8271a and a8264a );
a8276a <=( A167 and A169 );
a8277a <=( (not A170) and a8276a );
a8280a <=( A199 and A166 );
a8283a <=( A232 and A200 );
a8284a <=( a8283a and a8280a );
a8285a <=( a8284a and a8277a );
a8289a <=( A235 and A234 );
a8290a <=( (not A233) and a8289a );
a8293a <=( (not A266) and A265 );
a8296a <=( A269 and A267 );
a8297a <=( a8296a and a8293a );
a8298a <=( a8297a and a8290a );
a8302a <=( A167 and A169 );
a8303a <=( (not A170) and a8302a );
a8306a <=( A199 and A166 );
a8309a <=( A232 and A200 );
a8310a <=( a8309a and a8306a );
a8311a <=( a8310a and a8303a );
a8315a <=( A236 and A234 );
a8316a <=( (not A233) and a8315a );
a8319a <=( (not A299) and A298 );
a8322a <=( A301 and A300 );
a8323a <=( a8322a and a8319a );
a8324a <=( a8323a and a8316a );
a8328a <=( A167 and A169 );
a8329a <=( (not A170) and a8328a );
a8332a <=( A199 and A166 );
a8335a <=( A232 and A200 );
a8336a <=( a8335a and a8332a );
a8337a <=( a8336a and a8329a );
a8341a <=( A236 and A234 );
a8342a <=( (not A233) and a8341a );
a8345a <=( (not A299) and A298 );
a8348a <=( A302 and A300 );
a8349a <=( a8348a and a8345a );
a8350a <=( a8349a and a8342a );
a8354a <=( A167 and A169 );
a8355a <=( (not A170) and a8354a );
a8358a <=( A199 and A166 );
a8361a <=( A232 and A200 );
a8362a <=( a8361a and a8358a );
a8363a <=( a8362a and a8355a );
a8367a <=( A236 and A234 );
a8368a <=( (not A233) and a8367a );
a8371a <=( (not A266) and A265 );
a8374a <=( A268 and A267 );
a8375a <=( a8374a and a8371a );
a8376a <=( a8375a and a8368a );
a8380a <=( A167 and A169 );
a8381a <=( (not A170) and a8380a );
a8384a <=( A199 and A166 );
a8387a <=( A232 and A200 );
a8388a <=( a8387a and a8384a );
a8389a <=( a8388a and a8381a );
a8393a <=( A236 and A234 );
a8394a <=( (not A233) and a8393a );
a8397a <=( (not A266) and A265 );
a8400a <=( A269 and A267 );
a8401a <=( a8400a and a8397a );
a8402a <=( a8401a and a8394a );
a8406a <=( A167 and A169 );
a8407a <=( (not A170) and a8406a );
a8410a <=( (not A199) and A166 );
a8413a <=( A232 and (not A200) );
a8414a <=( a8413a and a8410a );
a8415a <=( a8414a and a8407a );
a8419a <=( A235 and A234 );
a8420a <=( (not A233) and a8419a );
a8423a <=( (not A299) and A298 );
a8426a <=( A301 and A300 );
a8427a <=( a8426a and a8423a );
a8428a <=( a8427a and a8420a );
a8432a <=( A167 and A169 );
a8433a <=( (not A170) and a8432a );
a8436a <=( (not A199) and A166 );
a8439a <=( A232 and (not A200) );
a8440a <=( a8439a and a8436a );
a8441a <=( a8440a and a8433a );
a8445a <=( A235 and A234 );
a8446a <=( (not A233) and a8445a );
a8449a <=( (not A299) and A298 );
a8452a <=( A302 and A300 );
a8453a <=( a8452a and a8449a );
a8454a <=( a8453a and a8446a );
a8458a <=( A167 and A169 );
a8459a <=( (not A170) and a8458a );
a8462a <=( (not A199) and A166 );
a8465a <=( A232 and (not A200) );
a8466a <=( a8465a and a8462a );
a8467a <=( a8466a and a8459a );
a8471a <=( A235 and A234 );
a8472a <=( (not A233) and a8471a );
a8475a <=( (not A266) and A265 );
a8478a <=( A268 and A267 );
a8479a <=( a8478a and a8475a );
a8480a <=( a8479a and a8472a );
a8484a <=( A167 and A169 );
a8485a <=( (not A170) and a8484a );
a8488a <=( (not A199) and A166 );
a8491a <=( A232 and (not A200) );
a8492a <=( a8491a and a8488a );
a8493a <=( a8492a and a8485a );
a8497a <=( A235 and A234 );
a8498a <=( (not A233) and a8497a );
a8501a <=( (not A266) and A265 );
a8504a <=( A269 and A267 );
a8505a <=( a8504a and a8501a );
a8506a <=( a8505a and a8498a );
a8510a <=( A167 and A169 );
a8511a <=( (not A170) and a8510a );
a8514a <=( (not A199) and A166 );
a8517a <=( A232 and (not A200) );
a8518a <=( a8517a and a8514a );
a8519a <=( a8518a and a8511a );
a8523a <=( A236 and A234 );
a8524a <=( (not A233) and a8523a );
a8527a <=( (not A299) and A298 );
a8530a <=( A301 and A300 );
a8531a <=( a8530a and a8527a );
a8532a <=( a8531a and a8524a );
a8536a <=( A167 and A169 );
a8537a <=( (not A170) and a8536a );
a8540a <=( (not A199) and A166 );
a8543a <=( A232 and (not A200) );
a8544a <=( a8543a and a8540a );
a8545a <=( a8544a and a8537a );
a8549a <=( A236 and A234 );
a8550a <=( (not A233) and a8549a );
a8553a <=( (not A299) and A298 );
a8556a <=( A302 and A300 );
a8557a <=( a8556a and a8553a );
a8558a <=( a8557a and a8550a );
a8562a <=( A167 and A169 );
a8563a <=( (not A170) and a8562a );
a8566a <=( (not A199) and A166 );
a8569a <=( A232 and (not A200) );
a8570a <=( a8569a and a8566a );
a8571a <=( a8570a and a8563a );
a8575a <=( A236 and A234 );
a8576a <=( (not A233) and a8575a );
a8579a <=( (not A266) and A265 );
a8582a <=( A268 and A267 );
a8583a <=( a8582a and a8579a );
a8584a <=( a8583a and a8576a );
a8588a <=( A167 and A169 );
a8589a <=( (not A170) and a8588a );
a8592a <=( (not A199) and A166 );
a8595a <=( A232 and (not A200) );
a8596a <=( a8595a and a8592a );
a8597a <=( a8596a and a8589a );
a8601a <=( A236 and A234 );
a8602a <=( (not A233) and a8601a );
a8605a <=( (not A266) and A265 );
a8608a <=( A269 and A267 );
a8609a <=( a8608a and a8605a );
a8610a <=( a8609a and a8602a );
a8614a <=( (not A167) and A169 );
a8615a <=( (not A170) and a8614a );
a8618a <=( A199 and (not A166) );
a8621a <=( A232 and (not A201) );
a8622a <=( a8621a and a8618a );
a8623a <=( a8622a and a8615a );
a8627a <=( A235 and A234 );
a8628a <=( (not A233) and a8627a );
a8631a <=( (not A299) and A298 );
a8634a <=( A301 and A300 );
a8635a <=( a8634a and a8631a );
a8636a <=( a8635a and a8628a );
a8640a <=( (not A167) and A169 );
a8641a <=( (not A170) and a8640a );
a8644a <=( A199 and (not A166) );
a8647a <=( A232 and (not A201) );
a8648a <=( a8647a and a8644a );
a8649a <=( a8648a and a8641a );
a8653a <=( A235 and A234 );
a8654a <=( (not A233) and a8653a );
a8657a <=( (not A299) and A298 );
a8660a <=( A302 and A300 );
a8661a <=( a8660a and a8657a );
a8662a <=( a8661a and a8654a );
a8666a <=( (not A167) and A169 );
a8667a <=( (not A170) and a8666a );
a8670a <=( A199 and (not A166) );
a8673a <=( A232 and (not A201) );
a8674a <=( a8673a and a8670a );
a8675a <=( a8674a and a8667a );
a8679a <=( A235 and A234 );
a8680a <=( (not A233) and a8679a );
a8683a <=( (not A266) and A265 );
a8686a <=( A268 and A267 );
a8687a <=( a8686a and a8683a );
a8688a <=( a8687a and a8680a );
a8692a <=( (not A167) and A169 );
a8693a <=( (not A170) and a8692a );
a8696a <=( A199 and (not A166) );
a8699a <=( A232 and (not A201) );
a8700a <=( a8699a and a8696a );
a8701a <=( a8700a and a8693a );
a8705a <=( A235 and A234 );
a8706a <=( (not A233) and a8705a );
a8709a <=( (not A266) and A265 );
a8712a <=( A269 and A267 );
a8713a <=( a8712a and a8709a );
a8714a <=( a8713a and a8706a );
a8718a <=( (not A167) and A169 );
a8719a <=( (not A170) and a8718a );
a8722a <=( A199 and (not A166) );
a8725a <=( A232 and (not A201) );
a8726a <=( a8725a and a8722a );
a8727a <=( a8726a and a8719a );
a8731a <=( A236 and A234 );
a8732a <=( (not A233) and a8731a );
a8735a <=( (not A299) and A298 );
a8738a <=( A301 and A300 );
a8739a <=( a8738a and a8735a );
a8740a <=( a8739a and a8732a );
a8744a <=( (not A167) and A169 );
a8745a <=( (not A170) and a8744a );
a8748a <=( A199 and (not A166) );
a8751a <=( A232 and (not A201) );
a8752a <=( a8751a and a8748a );
a8753a <=( a8752a and a8745a );
a8757a <=( A236 and A234 );
a8758a <=( (not A233) and a8757a );
a8761a <=( (not A299) and A298 );
a8764a <=( A302 and A300 );
a8765a <=( a8764a and a8761a );
a8766a <=( a8765a and a8758a );
a8770a <=( (not A167) and A169 );
a8771a <=( (not A170) and a8770a );
a8774a <=( A199 and (not A166) );
a8777a <=( A232 and (not A201) );
a8778a <=( a8777a and a8774a );
a8779a <=( a8778a and a8771a );
a8783a <=( A236 and A234 );
a8784a <=( (not A233) and a8783a );
a8787a <=( (not A266) and A265 );
a8790a <=( A268 and A267 );
a8791a <=( a8790a and a8787a );
a8792a <=( a8791a and a8784a );
a8796a <=( (not A167) and A169 );
a8797a <=( (not A170) and a8796a );
a8800a <=( A199 and (not A166) );
a8803a <=( A232 and (not A201) );
a8804a <=( a8803a and a8800a );
a8805a <=( a8804a and a8797a );
a8809a <=( A236 and A234 );
a8810a <=( (not A233) and a8809a );
a8813a <=( (not A266) and A265 );
a8816a <=( A269 and A267 );
a8817a <=( a8816a and a8813a );
a8818a <=( a8817a and a8810a );
a8822a <=( (not A167) and A169 );
a8823a <=( (not A170) and a8822a );
a8826a <=( A199 and (not A166) );
a8829a <=( A232 and A200 );
a8830a <=( a8829a and a8826a );
a8831a <=( a8830a and a8823a );
a8835a <=( A235 and A234 );
a8836a <=( (not A233) and a8835a );
a8839a <=( (not A299) and A298 );
a8842a <=( A301 and A300 );
a8843a <=( a8842a and a8839a );
a8844a <=( a8843a and a8836a );
a8848a <=( (not A167) and A169 );
a8849a <=( (not A170) and a8848a );
a8852a <=( A199 and (not A166) );
a8855a <=( A232 and A200 );
a8856a <=( a8855a and a8852a );
a8857a <=( a8856a and a8849a );
a8861a <=( A235 and A234 );
a8862a <=( (not A233) and a8861a );
a8865a <=( (not A299) and A298 );
a8868a <=( A302 and A300 );
a8869a <=( a8868a and a8865a );
a8870a <=( a8869a and a8862a );
a8874a <=( (not A167) and A169 );
a8875a <=( (not A170) and a8874a );
a8878a <=( A199 and (not A166) );
a8881a <=( A232 and A200 );
a8882a <=( a8881a and a8878a );
a8883a <=( a8882a and a8875a );
a8887a <=( A235 and A234 );
a8888a <=( (not A233) and a8887a );
a8891a <=( (not A266) and A265 );
a8894a <=( A268 and A267 );
a8895a <=( a8894a and a8891a );
a8896a <=( a8895a and a8888a );
a8900a <=( (not A167) and A169 );
a8901a <=( (not A170) and a8900a );
a8904a <=( A199 and (not A166) );
a8907a <=( A232 and A200 );
a8908a <=( a8907a and a8904a );
a8909a <=( a8908a and a8901a );
a8913a <=( A235 and A234 );
a8914a <=( (not A233) and a8913a );
a8917a <=( (not A266) and A265 );
a8920a <=( A269 and A267 );
a8921a <=( a8920a and a8917a );
a8922a <=( a8921a and a8914a );
a8926a <=( (not A167) and A169 );
a8927a <=( (not A170) and a8926a );
a8930a <=( A199 and (not A166) );
a8933a <=( A232 and A200 );
a8934a <=( a8933a and a8930a );
a8935a <=( a8934a and a8927a );
a8939a <=( A236 and A234 );
a8940a <=( (not A233) and a8939a );
a8943a <=( (not A299) and A298 );
a8946a <=( A301 and A300 );
a8947a <=( a8946a and a8943a );
a8948a <=( a8947a and a8940a );
a8952a <=( (not A167) and A169 );
a8953a <=( (not A170) and a8952a );
a8956a <=( A199 and (not A166) );
a8959a <=( A232 and A200 );
a8960a <=( a8959a and a8956a );
a8961a <=( a8960a and a8953a );
a8965a <=( A236 and A234 );
a8966a <=( (not A233) and a8965a );
a8969a <=( (not A299) and A298 );
a8972a <=( A302 and A300 );
a8973a <=( a8972a and a8969a );
a8974a <=( a8973a and a8966a );
a8978a <=( (not A167) and A169 );
a8979a <=( (not A170) and a8978a );
a8982a <=( A199 and (not A166) );
a8985a <=( A232 and A200 );
a8986a <=( a8985a and a8982a );
a8987a <=( a8986a and a8979a );
a8991a <=( A236 and A234 );
a8992a <=( (not A233) and a8991a );
a8995a <=( (not A266) and A265 );
a8998a <=( A268 and A267 );
a8999a <=( a8998a and a8995a );
a9000a <=( a8999a and a8992a );
a9004a <=( (not A167) and A169 );
a9005a <=( (not A170) and a9004a );
a9008a <=( A199 and (not A166) );
a9011a <=( A232 and A200 );
a9012a <=( a9011a and a9008a );
a9013a <=( a9012a and a9005a );
a9017a <=( A236 and A234 );
a9018a <=( (not A233) and a9017a );
a9021a <=( (not A266) and A265 );
a9024a <=( A269 and A267 );
a9025a <=( a9024a and a9021a );
a9026a <=( a9025a and a9018a );
a9030a <=( (not A167) and A169 );
a9031a <=( (not A170) and a9030a );
a9034a <=( (not A199) and (not A166) );
a9037a <=( A232 and (not A200) );
a9038a <=( a9037a and a9034a );
a9039a <=( a9038a and a9031a );
a9043a <=( A235 and A234 );
a9044a <=( (not A233) and a9043a );
a9047a <=( (not A299) and A298 );
a9050a <=( A301 and A300 );
a9051a <=( a9050a and a9047a );
a9052a <=( a9051a and a9044a );
a9056a <=( (not A167) and A169 );
a9057a <=( (not A170) and a9056a );
a9060a <=( (not A199) and (not A166) );
a9063a <=( A232 and (not A200) );
a9064a <=( a9063a and a9060a );
a9065a <=( a9064a and a9057a );
a9069a <=( A235 and A234 );
a9070a <=( (not A233) and a9069a );
a9073a <=( (not A299) and A298 );
a9076a <=( A302 and A300 );
a9077a <=( a9076a and a9073a );
a9078a <=( a9077a and a9070a );
a9082a <=( (not A167) and A169 );
a9083a <=( (not A170) and a9082a );
a9086a <=( (not A199) and (not A166) );
a9089a <=( A232 and (not A200) );
a9090a <=( a9089a and a9086a );
a9091a <=( a9090a and a9083a );
a9095a <=( A235 and A234 );
a9096a <=( (not A233) and a9095a );
a9099a <=( (not A266) and A265 );
a9102a <=( A268 and A267 );
a9103a <=( a9102a and a9099a );
a9104a <=( a9103a and a9096a );
a9108a <=( (not A167) and A169 );
a9109a <=( (not A170) and a9108a );
a9112a <=( (not A199) and (not A166) );
a9115a <=( A232 and (not A200) );
a9116a <=( a9115a and a9112a );
a9117a <=( a9116a and a9109a );
a9121a <=( A235 and A234 );
a9122a <=( (not A233) and a9121a );
a9125a <=( (not A266) and A265 );
a9128a <=( A269 and A267 );
a9129a <=( a9128a and a9125a );
a9130a <=( a9129a and a9122a );
a9134a <=( (not A167) and A169 );
a9135a <=( (not A170) and a9134a );
a9138a <=( (not A199) and (not A166) );
a9141a <=( A232 and (not A200) );
a9142a <=( a9141a and a9138a );
a9143a <=( a9142a and a9135a );
a9147a <=( A236 and A234 );
a9148a <=( (not A233) and a9147a );
a9151a <=( (not A299) and A298 );
a9154a <=( A301 and A300 );
a9155a <=( a9154a and a9151a );
a9156a <=( a9155a and a9148a );
a9160a <=( (not A167) and A169 );
a9161a <=( (not A170) and a9160a );
a9164a <=( (not A199) and (not A166) );
a9167a <=( A232 and (not A200) );
a9168a <=( a9167a and a9164a );
a9169a <=( a9168a and a9161a );
a9173a <=( A236 and A234 );
a9174a <=( (not A233) and a9173a );
a9177a <=( (not A299) and A298 );
a9180a <=( A302 and A300 );
a9181a <=( a9180a and a9177a );
a9182a <=( a9181a and a9174a );
a9186a <=( (not A167) and A169 );
a9187a <=( (not A170) and a9186a );
a9190a <=( (not A199) and (not A166) );
a9193a <=( A232 and (not A200) );
a9194a <=( a9193a and a9190a );
a9195a <=( a9194a and a9187a );
a9199a <=( A236 and A234 );
a9200a <=( (not A233) and a9199a );
a9203a <=( (not A266) and A265 );
a9206a <=( A268 and A267 );
a9207a <=( a9206a and a9203a );
a9208a <=( a9207a and a9200a );
a9212a <=( (not A167) and A169 );
a9213a <=( (not A170) and a9212a );
a9216a <=( (not A199) and (not A166) );
a9219a <=( A232 and (not A200) );
a9220a <=( a9219a and a9216a );
a9221a <=( a9220a and a9213a );
a9225a <=( A236 and A234 );
a9226a <=( (not A233) and a9225a );
a9229a <=( (not A266) and A265 );
a9232a <=( A269 and A267 );
a9233a <=( a9232a and a9229a );
a9234a <=( a9233a and a9226a );
a9238a <=( A167 and (not A169) );
a9239a <=( A170 and a9238a );
a9242a <=( A199 and (not A166) );
a9245a <=( A232 and (not A201) );
a9246a <=( a9245a and a9242a );
a9247a <=( a9246a and a9239a );
a9251a <=( A235 and A234 );
a9252a <=( (not A233) and a9251a );
a9255a <=( (not A299) and A298 );
a9258a <=( A301 and A300 );
a9259a <=( a9258a and a9255a );
a9260a <=( a9259a and a9252a );
a9264a <=( A167 and (not A169) );
a9265a <=( A170 and a9264a );
a9268a <=( A199 and (not A166) );
a9271a <=( A232 and (not A201) );
a9272a <=( a9271a and a9268a );
a9273a <=( a9272a and a9265a );
a9277a <=( A235 and A234 );
a9278a <=( (not A233) and a9277a );
a9281a <=( (not A299) and A298 );
a9284a <=( A302 and A300 );
a9285a <=( a9284a and a9281a );
a9286a <=( a9285a and a9278a );
a9290a <=( A167 and (not A169) );
a9291a <=( A170 and a9290a );
a9294a <=( A199 and (not A166) );
a9297a <=( A232 and (not A201) );
a9298a <=( a9297a and a9294a );
a9299a <=( a9298a and a9291a );
a9303a <=( A235 and A234 );
a9304a <=( (not A233) and a9303a );
a9307a <=( (not A266) and A265 );
a9310a <=( A268 and A267 );
a9311a <=( a9310a and a9307a );
a9312a <=( a9311a and a9304a );
a9316a <=( A167 and (not A169) );
a9317a <=( A170 and a9316a );
a9320a <=( A199 and (not A166) );
a9323a <=( A232 and (not A201) );
a9324a <=( a9323a and a9320a );
a9325a <=( a9324a and a9317a );
a9329a <=( A235 and A234 );
a9330a <=( (not A233) and a9329a );
a9333a <=( (not A266) and A265 );
a9336a <=( A269 and A267 );
a9337a <=( a9336a and a9333a );
a9338a <=( a9337a and a9330a );
a9342a <=( A167 and (not A169) );
a9343a <=( A170 and a9342a );
a9346a <=( A199 and (not A166) );
a9349a <=( A232 and (not A201) );
a9350a <=( a9349a and a9346a );
a9351a <=( a9350a and a9343a );
a9355a <=( A236 and A234 );
a9356a <=( (not A233) and a9355a );
a9359a <=( (not A299) and A298 );
a9362a <=( A301 and A300 );
a9363a <=( a9362a and a9359a );
a9364a <=( a9363a and a9356a );
a9368a <=( A167 and (not A169) );
a9369a <=( A170 and a9368a );
a9372a <=( A199 and (not A166) );
a9375a <=( A232 and (not A201) );
a9376a <=( a9375a and a9372a );
a9377a <=( a9376a and a9369a );
a9381a <=( A236 and A234 );
a9382a <=( (not A233) and a9381a );
a9385a <=( (not A299) and A298 );
a9388a <=( A302 and A300 );
a9389a <=( a9388a and a9385a );
a9390a <=( a9389a and a9382a );
a9394a <=( A167 and (not A169) );
a9395a <=( A170 and a9394a );
a9398a <=( A199 and (not A166) );
a9401a <=( A232 and (not A201) );
a9402a <=( a9401a and a9398a );
a9403a <=( a9402a and a9395a );
a9407a <=( A236 and A234 );
a9408a <=( (not A233) and a9407a );
a9411a <=( (not A266) and A265 );
a9414a <=( A268 and A267 );
a9415a <=( a9414a and a9411a );
a9416a <=( a9415a and a9408a );
a9420a <=( A167 and (not A169) );
a9421a <=( A170 and a9420a );
a9424a <=( A199 and (not A166) );
a9427a <=( A232 and (not A201) );
a9428a <=( a9427a and a9424a );
a9429a <=( a9428a and a9421a );
a9433a <=( A236 and A234 );
a9434a <=( (not A233) and a9433a );
a9437a <=( (not A266) and A265 );
a9440a <=( A269 and A267 );
a9441a <=( a9440a and a9437a );
a9442a <=( a9441a and a9434a );
a9446a <=( A167 and (not A169) );
a9447a <=( A170 and a9446a );
a9450a <=( A199 and (not A166) );
a9453a <=( A232 and A200 );
a9454a <=( a9453a and a9450a );
a9455a <=( a9454a and a9447a );
a9459a <=( A235 and A234 );
a9460a <=( (not A233) and a9459a );
a9463a <=( (not A299) and A298 );
a9466a <=( A301 and A300 );
a9467a <=( a9466a and a9463a );
a9468a <=( a9467a and a9460a );
a9472a <=( A167 and (not A169) );
a9473a <=( A170 and a9472a );
a9476a <=( A199 and (not A166) );
a9479a <=( A232 and A200 );
a9480a <=( a9479a and a9476a );
a9481a <=( a9480a and a9473a );
a9485a <=( A235 and A234 );
a9486a <=( (not A233) and a9485a );
a9489a <=( (not A299) and A298 );
a9492a <=( A302 and A300 );
a9493a <=( a9492a and a9489a );
a9494a <=( a9493a and a9486a );
a9498a <=( A167 and (not A169) );
a9499a <=( A170 and a9498a );
a9502a <=( A199 and (not A166) );
a9505a <=( A232 and A200 );
a9506a <=( a9505a and a9502a );
a9507a <=( a9506a and a9499a );
a9511a <=( A235 and A234 );
a9512a <=( (not A233) and a9511a );
a9515a <=( (not A266) and A265 );
a9518a <=( A268 and A267 );
a9519a <=( a9518a and a9515a );
a9520a <=( a9519a and a9512a );
a9524a <=( A167 and (not A169) );
a9525a <=( A170 and a9524a );
a9528a <=( A199 and (not A166) );
a9531a <=( A232 and A200 );
a9532a <=( a9531a and a9528a );
a9533a <=( a9532a and a9525a );
a9537a <=( A235 and A234 );
a9538a <=( (not A233) and a9537a );
a9541a <=( (not A266) and A265 );
a9544a <=( A269 and A267 );
a9545a <=( a9544a and a9541a );
a9546a <=( a9545a and a9538a );
a9550a <=( A167 and (not A169) );
a9551a <=( A170 and a9550a );
a9554a <=( A199 and (not A166) );
a9557a <=( A232 and A200 );
a9558a <=( a9557a and a9554a );
a9559a <=( a9558a and a9551a );
a9563a <=( A236 and A234 );
a9564a <=( (not A233) and a9563a );
a9567a <=( (not A299) and A298 );
a9570a <=( A301 and A300 );
a9571a <=( a9570a and a9567a );
a9572a <=( a9571a and a9564a );
a9576a <=( A167 and (not A169) );
a9577a <=( A170 and a9576a );
a9580a <=( A199 and (not A166) );
a9583a <=( A232 and A200 );
a9584a <=( a9583a and a9580a );
a9585a <=( a9584a and a9577a );
a9589a <=( A236 and A234 );
a9590a <=( (not A233) and a9589a );
a9593a <=( (not A299) and A298 );
a9596a <=( A302 and A300 );
a9597a <=( a9596a and a9593a );
a9598a <=( a9597a and a9590a );
a9602a <=( A167 and (not A169) );
a9603a <=( A170 and a9602a );
a9606a <=( A199 and (not A166) );
a9609a <=( A232 and A200 );
a9610a <=( a9609a and a9606a );
a9611a <=( a9610a and a9603a );
a9615a <=( A236 and A234 );
a9616a <=( (not A233) and a9615a );
a9619a <=( (not A266) and A265 );
a9622a <=( A268 and A267 );
a9623a <=( a9622a and a9619a );
a9624a <=( a9623a and a9616a );
a9628a <=( A167 and (not A169) );
a9629a <=( A170 and a9628a );
a9632a <=( A199 and (not A166) );
a9635a <=( A232 and A200 );
a9636a <=( a9635a and a9632a );
a9637a <=( a9636a and a9629a );
a9641a <=( A236 and A234 );
a9642a <=( (not A233) and a9641a );
a9645a <=( (not A266) and A265 );
a9648a <=( A269 and A267 );
a9649a <=( a9648a and a9645a );
a9650a <=( a9649a and a9642a );
a9654a <=( A167 and (not A169) );
a9655a <=( A170 and a9654a );
a9658a <=( (not A199) and (not A166) );
a9661a <=( A232 and (not A200) );
a9662a <=( a9661a and a9658a );
a9663a <=( a9662a and a9655a );
a9667a <=( A235 and A234 );
a9668a <=( (not A233) and a9667a );
a9671a <=( (not A299) and A298 );
a9674a <=( A301 and A300 );
a9675a <=( a9674a and a9671a );
a9676a <=( a9675a and a9668a );
a9680a <=( A167 and (not A169) );
a9681a <=( A170 and a9680a );
a9684a <=( (not A199) and (not A166) );
a9687a <=( A232 and (not A200) );
a9688a <=( a9687a and a9684a );
a9689a <=( a9688a and a9681a );
a9693a <=( A235 and A234 );
a9694a <=( (not A233) and a9693a );
a9697a <=( (not A299) and A298 );
a9700a <=( A302 and A300 );
a9701a <=( a9700a and a9697a );
a9702a <=( a9701a and a9694a );
a9706a <=( A167 and (not A169) );
a9707a <=( A170 and a9706a );
a9710a <=( (not A199) and (not A166) );
a9713a <=( A232 and (not A200) );
a9714a <=( a9713a and a9710a );
a9715a <=( a9714a and a9707a );
a9719a <=( A235 and A234 );
a9720a <=( (not A233) and a9719a );
a9723a <=( (not A266) and A265 );
a9726a <=( A268 and A267 );
a9727a <=( a9726a and a9723a );
a9728a <=( a9727a and a9720a );
a9732a <=( A167 and (not A169) );
a9733a <=( A170 and a9732a );
a9736a <=( (not A199) and (not A166) );
a9739a <=( A232 and (not A200) );
a9740a <=( a9739a and a9736a );
a9741a <=( a9740a and a9733a );
a9745a <=( A235 and A234 );
a9746a <=( (not A233) and a9745a );
a9749a <=( (not A266) and A265 );
a9752a <=( A269 and A267 );
a9753a <=( a9752a and a9749a );
a9754a <=( a9753a and a9746a );
a9758a <=( A167 and (not A169) );
a9759a <=( A170 and a9758a );
a9762a <=( (not A199) and (not A166) );
a9765a <=( A232 and (not A200) );
a9766a <=( a9765a and a9762a );
a9767a <=( a9766a and a9759a );
a9771a <=( A236 and A234 );
a9772a <=( (not A233) and a9771a );
a9775a <=( (not A299) and A298 );
a9778a <=( A301 and A300 );
a9779a <=( a9778a and a9775a );
a9780a <=( a9779a and a9772a );
a9784a <=( A167 and (not A169) );
a9785a <=( A170 and a9784a );
a9788a <=( (not A199) and (not A166) );
a9791a <=( A232 and (not A200) );
a9792a <=( a9791a and a9788a );
a9793a <=( a9792a and a9785a );
a9797a <=( A236 and A234 );
a9798a <=( (not A233) and a9797a );
a9801a <=( (not A299) and A298 );
a9804a <=( A302 and A300 );
a9805a <=( a9804a and a9801a );
a9806a <=( a9805a and a9798a );
a9810a <=( A167 and (not A169) );
a9811a <=( A170 and a9810a );
a9814a <=( (not A199) and (not A166) );
a9817a <=( A232 and (not A200) );
a9818a <=( a9817a and a9814a );
a9819a <=( a9818a and a9811a );
a9823a <=( A236 and A234 );
a9824a <=( (not A233) and a9823a );
a9827a <=( (not A266) and A265 );
a9830a <=( A268 and A267 );
a9831a <=( a9830a and a9827a );
a9832a <=( a9831a and a9824a );
a9836a <=( A167 and (not A169) );
a9837a <=( A170 and a9836a );
a9840a <=( (not A199) and (not A166) );
a9843a <=( A232 and (not A200) );
a9844a <=( a9843a and a9840a );
a9845a <=( a9844a and a9837a );
a9849a <=( A236 and A234 );
a9850a <=( (not A233) and a9849a );
a9853a <=( (not A266) and A265 );
a9856a <=( A269 and A267 );
a9857a <=( a9856a and a9853a );
a9858a <=( a9857a and a9850a );
a9862a <=( (not A167) and (not A169) );
a9863a <=( A170 and a9862a );
a9866a <=( A199 and A166 );
a9869a <=( A232 and (not A201) );
a9870a <=( a9869a and a9866a );
a9871a <=( a9870a and a9863a );
a9875a <=( A235 and A234 );
a9876a <=( (not A233) and a9875a );
a9879a <=( (not A299) and A298 );
a9882a <=( A301 and A300 );
a9883a <=( a9882a and a9879a );
a9884a <=( a9883a and a9876a );
a9888a <=( (not A167) and (not A169) );
a9889a <=( A170 and a9888a );
a9892a <=( A199 and A166 );
a9895a <=( A232 and (not A201) );
a9896a <=( a9895a and a9892a );
a9897a <=( a9896a and a9889a );
a9901a <=( A235 and A234 );
a9902a <=( (not A233) and a9901a );
a9905a <=( (not A299) and A298 );
a9908a <=( A302 and A300 );
a9909a <=( a9908a and a9905a );
a9910a <=( a9909a and a9902a );
a9914a <=( (not A167) and (not A169) );
a9915a <=( A170 and a9914a );
a9918a <=( A199 and A166 );
a9921a <=( A232 and (not A201) );
a9922a <=( a9921a and a9918a );
a9923a <=( a9922a and a9915a );
a9927a <=( A235 and A234 );
a9928a <=( (not A233) and a9927a );
a9931a <=( (not A266) and A265 );
a9934a <=( A268 and A267 );
a9935a <=( a9934a and a9931a );
a9936a <=( a9935a and a9928a );
a9940a <=( (not A167) and (not A169) );
a9941a <=( A170 and a9940a );
a9944a <=( A199 and A166 );
a9947a <=( A232 and (not A201) );
a9948a <=( a9947a and a9944a );
a9949a <=( a9948a and a9941a );
a9953a <=( A235 and A234 );
a9954a <=( (not A233) and a9953a );
a9957a <=( (not A266) and A265 );
a9960a <=( A269 and A267 );
a9961a <=( a9960a and a9957a );
a9962a <=( a9961a and a9954a );
a9966a <=( (not A167) and (not A169) );
a9967a <=( A170 and a9966a );
a9970a <=( A199 and A166 );
a9973a <=( A232 and (not A201) );
a9974a <=( a9973a and a9970a );
a9975a <=( a9974a and a9967a );
a9979a <=( A236 and A234 );
a9980a <=( (not A233) and a9979a );
a9983a <=( (not A299) and A298 );
a9986a <=( A301 and A300 );
a9987a <=( a9986a and a9983a );
a9988a <=( a9987a and a9980a );
a9992a <=( (not A167) and (not A169) );
a9993a <=( A170 and a9992a );
a9996a <=( A199 and A166 );
a9999a <=( A232 and (not A201) );
a10000a <=( a9999a and a9996a );
a10001a <=( a10000a and a9993a );
a10005a <=( A236 and A234 );
a10006a <=( (not A233) and a10005a );
a10009a <=( (not A299) and A298 );
a10012a <=( A302 and A300 );
a10013a <=( a10012a and a10009a );
a10014a <=( a10013a and a10006a );
a10018a <=( (not A167) and (not A169) );
a10019a <=( A170 and a10018a );
a10022a <=( A199 and A166 );
a10025a <=( A232 and (not A201) );
a10026a <=( a10025a and a10022a );
a10027a <=( a10026a and a10019a );
a10031a <=( A236 and A234 );
a10032a <=( (not A233) and a10031a );
a10035a <=( (not A266) and A265 );
a10038a <=( A268 and A267 );
a10039a <=( a10038a and a10035a );
a10040a <=( a10039a and a10032a );
a10044a <=( (not A167) and (not A169) );
a10045a <=( A170 and a10044a );
a10048a <=( A199 and A166 );
a10051a <=( A232 and (not A201) );
a10052a <=( a10051a and a10048a );
a10053a <=( a10052a and a10045a );
a10057a <=( A236 and A234 );
a10058a <=( (not A233) and a10057a );
a10061a <=( (not A266) and A265 );
a10064a <=( A269 and A267 );
a10065a <=( a10064a and a10061a );
a10066a <=( a10065a and a10058a );
a10070a <=( (not A167) and (not A169) );
a10071a <=( A170 and a10070a );
a10074a <=( A199 and A166 );
a10077a <=( A232 and A200 );
a10078a <=( a10077a and a10074a );
a10079a <=( a10078a and a10071a );
a10083a <=( A235 and A234 );
a10084a <=( (not A233) and a10083a );
a10087a <=( (not A299) and A298 );
a10090a <=( A301 and A300 );
a10091a <=( a10090a and a10087a );
a10092a <=( a10091a and a10084a );
a10096a <=( (not A167) and (not A169) );
a10097a <=( A170 and a10096a );
a10100a <=( A199 and A166 );
a10103a <=( A232 and A200 );
a10104a <=( a10103a and a10100a );
a10105a <=( a10104a and a10097a );
a10109a <=( A235 and A234 );
a10110a <=( (not A233) and a10109a );
a10113a <=( (not A299) and A298 );
a10116a <=( A302 and A300 );
a10117a <=( a10116a and a10113a );
a10118a <=( a10117a and a10110a );
a10122a <=( (not A167) and (not A169) );
a10123a <=( A170 and a10122a );
a10126a <=( A199 and A166 );
a10129a <=( A232 and A200 );
a10130a <=( a10129a and a10126a );
a10131a <=( a10130a and a10123a );
a10135a <=( A235 and A234 );
a10136a <=( (not A233) and a10135a );
a10139a <=( (not A266) and A265 );
a10142a <=( A268 and A267 );
a10143a <=( a10142a and a10139a );
a10144a <=( a10143a and a10136a );
a10148a <=( (not A167) and (not A169) );
a10149a <=( A170 and a10148a );
a10152a <=( A199 and A166 );
a10155a <=( A232 and A200 );
a10156a <=( a10155a and a10152a );
a10157a <=( a10156a and a10149a );
a10161a <=( A235 and A234 );
a10162a <=( (not A233) and a10161a );
a10165a <=( (not A266) and A265 );
a10168a <=( A269 and A267 );
a10169a <=( a10168a and a10165a );
a10170a <=( a10169a and a10162a );
a10174a <=( (not A167) and (not A169) );
a10175a <=( A170 and a10174a );
a10178a <=( A199 and A166 );
a10181a <=( A232 and A200 );
a10182a <=( a10181a and a10178a );
a10183a <=( a10182a and a10175a );
a10187a <=( A236 and A234 );
a10188a <=( (not A233) and a10187a );
a10191a <=( (not A299) and A298 );
a10194a <=( A301 and A300 );
a10195a <=( a10194a and a10191a );
a10196a <=( a10195a and a10188a );
a10200a <=( (not A167) and (not A169) );
a10201a <=( A170 and a10200a );
a10204a <=( A199 and A166 );
a10207a <=( A232 and A200 );
a10208a <=( a10207a and a10204a );
a10209a <=( a10208a and a10201a );
a10213a <=( A236 and A234 );
a10214a <=( (not A233) and a10213a );
a10217a <=( (not A299) and A298 );
a10220a <=( A302 and A300 );
a10221a <=( a10220a and a10217a );
a10222a <=( a10221a and a10214a );
a10226a <=( (not A167) and (not A169) );
a10227a <=( A170 and a10226a );
a10230a <=( A199 and A166 );
a10233a <=( A232 and A200 );
a10234a <=( a10233a and a10230a );
a10235a <=( a10234a and a10227a );
a10239a <=( A236 and A234 );
a10240a <=( (not A233) and a10239a );
a10243a <=( (not A266) and A265 );
a10246a <=( A268 and A267 );
a10247a <=( a10246a and a10243a );
a10248a <=( a10247a and a10240a );
a10252a <=( (not A167) and (not A169) );
a10253a <=( A170 and a10252a );
a10256a <=( A199 and A166 );
a10259a <=( A232 and A200 );
a10260a <=( a10259a and a10256a );
a10261a <=( a10260a and a10253a );
a10265a <=( A236 and A234 );
a10266a <=( (not A233) and a10265a );
a10269a <=( (not A266) and A265 );
a10272a <=( A269 and A267 );
a10273a <=( a10272a and a10269a );
a10274a <=( a10273a and a10266a );
a10278a <=( (not A167) and (not A169) );
a10279a <=( A170 and a10278a );
a10282a <=( (not A199) and A166 );
a10285a <=( A232 and (not A200) );
a10286a <=( a10285a and a10282a );
a10287a <=( a10286a and a10279a );
a10291a <=( A235 and A234 );
a10292a <=( (not A233) and a10291a );
a10295a <=( (not A299) and A298 );
a10298a <=( A301 and A300 );
a10299a <=( a10298a and a10295a );
a10300a <=( a10299a and a10292a );
a10304a <=( (not A167) and (not A169) );
a10305a <=( A170 and a10304a );
a10308a <=( (not A199) and A166 );
a10311a <=( A232 and (not A200) );
a10312a <=( a10311a and a10308a );
a10313a <=( a10312a and a10305a );
a10317a <=( A235 and A234 );
a10318a <=( (not A233) and a10317a );
a10321a <=( (not A299) and A298 );
a10324a <=( A302 and A300 );
a10325a <=( a10324a and a10321a );
a10326a <=( a10325a and a10318a );
a10330a <=( (not A167) and (not A169) );
a10331a <=( A170 and a10330a );
a10334a <=( (not A199) and A166 );
a10337a <=( A232 and (not A200) );
a10338a <=( a10337a and a10334a );
a10339a <=( a10338a and a10331a );
a10343a <=( A235 and A234 );
a10344a <=( (not A233) and a10343a );
a10347a <=( (not A266) and A265 );
a10350a <=( A268 and A267 );
a10351a <=( a10350a and a10347a );
a10352a <=( a10351a and a10344a );
a10356a <=( (not A167) and (not A169) );
a10357a <=( A170 and a10356a );
a10360a <=( (not A199) and A166 );
a10363a <=( A232 and (not A200) );
a10364a <=( a10363a and a10360a );
a10365a <=( a10364a and a10357a );
a10369a <=( A235 and A234 );
a10370a <=( (not A233) and a10369a );
a10373a <=( (not A266) and A265 );
a10376a <=( A269 and A267 );
a10377a <=( a10376a and a10373a );
a10378a <=( a10377a and a10370a );
a10382a <=( (not A167) and (not A169) );
a10383a <=( A170 and a10382a );
a10386a <=( (not A199) and A166 );
a10389a <=( A232 and (not A200) );
a10390a <=( a10389a and a10386a );
a10391a <=( a10390a and a10383a );
a10395a <=( A236 and A234 );
a10396a <=( (not A233) and a10395a );
a10399a <=( (not A299) and A298 );
a10402a <=( A301 and A300 );
a10403a <=( a10402a and a10399a );
a10404a <=( a10403a and a10396a );
a10408a <=( (not A167) and (not A169) );
a10409a <=( A170 and a10408a );
a10412a <=( (not A199) and A166 );
a10415a <=( A232 and (not A200) );
a10416a <=( a10415a and a10412a );
a10417a <=( a10416a and a10409a );
a10421a <=( A236 and A234 );
a10422a <=( (not A233) and a10421a );
a10425a <=( (not A299) and A298 );
a10428a <=( A302 and A300 );
a10429a <=( a10428a and a10425a );
a10430a <=( a10429a and a10422a );
a10434a <=( (not A167) and (not A169) );
a10435a <=( A170 and a10434a );
a10438a <=( (not A199) and A166 );
a10441a <=( A232 and (not A200) );
a10442a <=( a10441a and a10438a );
a10443a <=( a10442a and a10435a );
a10447a <=( A236 and A234 );
a10448a <=( (not A233) and a10447a );
a10451a <=( (not A266) and A265 );
a10454a <=( A268 and A267 );
a10455a <=( a10454a and a10451a );
a10456a <=( a10455a and a10448a );
a10460a <=( (not A167) and (not A169) );
a10461a <=( A170 and a10460a );
a10464a <=( (not A199) and A166 );
a10467a <=( A232 and (not A200) );
a10468a <=( a10467a and a10464a );
a10469a <=( a10468a and a10461a );
a10473a <=( A236 and A234 );
a10474a <=( (not A233) and a10473a );
a10477a <=( (not A266) and A265 );
a10480a <=( A269 and A267 );
a10481a <=( a10480a and a10477a );
a10482a <=( a10481a and a10474a );
a10486a <=( A167 and A169 );
a10487a <=( (not A170) and a10486a );
a10490a <=( A199 and A166 );
a10493a <=( (not A203) and (not A202) );
a10494a <=( a10493a and a10490a );
a10495a <=( a10494a and a10487a );
a10498a <=( (not A233) and A232 );
a10501a <=( A235 and A234 );
a10502a <=( a10501a and a10498a );
a10505a <=( (not A299) and A298 );
a10508a <=( A301 and A300 );
a10509a <=( a10508a and a10505a );
a10510a <=( a10509a and a10502a );
a10514a <=( A167 and A169 );
a10515a <=( (not A170) and a10514a );
a10518a <=( A199 and A166 );
a10521a <=( (not A203) and (not A202) );
a10522a <=( a10521a and a10518a );
a10523a <=( a10522a and a10515a );
a10526a <=( (not A233) and A232 );
a10529a <=( A235 and A234 );
a10530a <=( a10529a and a10526a );
a10533a <=( (not A299) and A298 );
a10536a <=( A302 and A300 );
a10537a <=( a10536a and a10533a );
a10538a <=( a10537a and a10530a );
a10542a <=( A167 and A169 );
a10543a <=( (not A170) and a10542a );
a10546a <=( A199 and A166 );
a10549a <=( (not A203) and (not A202) );
a10550a <=( a10549a and a10546a );
a10551a <=( a10550a and a10543a );
a10554a <=( (not A233) and A232 );
a10557a <=( A235 and A234 );
a10558a <=( a10557a and a10554a );
a10561a <=( (not A266) and A265 );
a10564a <=( A268 and A267 );
a10565a <=( a10564a and a10561a );
a10566a <=( a10565a and a10558a );
a10570a <=( A167 and A169 );
a10571a <=( (not A170) and a10570a );
a10574a <=( A199 and A166 );
a10577a <=( (not A203) and (not A202) );
a10578a <=( a10577a and a10574a );
a10579a <=( a10578a and a10571a );
a10582a <=( (not A233) and A232 );
a10585a <=( A235 and A234 );
a10586a <=( a10585a and a10582a );
a10589a <=( (not A266) and A265 );
a10592a <=( A269 and A267 );
a10593a <=( a10592a and a10589a );
a10594a <=( a10593a and a10586a );
a10598a <=( A167 and A169 );
a10599a <=( (not A170) and a10598a );
a10602a <=( A199 and A166 );
a10605a <=( (not A203) and (not A202) );
a10606a <=( a10605a and a10602a );
a10607a <=( a10606a and a10599a );
a10610a <=( (not A233) and A232 );
a10613a <=( A236 and A234 );
a10614a <=( a10613a and a10610a );
a10617a <=( (not A299) and A298 );
a10620a <=( A301 and A300 );
a10621a <=( a10620a and a10617a );
a10622a <=( a10621a and a10614a );
a10626a <=( A167 and A169 );
a10627a <=( (not A170) and a10626a );
a10630a <=( A199 and A166 );
a10633a <=( (not A203) and (not A202) );
a10634a <=( a10633a and a10630a );
a10635a <=( a10634a and a10627a );
a10638a <=( (not A233) and A232 );
a10641a <=( A236 and A234 );
a10642a <=( a10641a and a10638a );
a10645a <=( (not A299) and A298 );
a10648a <=( A302 and A300 );
a10649a <=( a10648a and a10645a );
a10650a <=( a10649a and a10642a );
a10654a <=( A167 and A169 );
a10655a <=( (not A170) and a10654a );
a10658a <=( A199 and A166 );
a10661a <=( (not A203) and (not A202) );
a10662a <=( a10661a and a10658a );
a10663a <=( a10662a and a10655a );
a10666a <=( (not A233) and A232 );
a10669a <=( A236 and A234 );
a10670a <=( a10669a and a10666a );
a10673a <=( (not A266) and A265 );
a10676a <=( A268 and A267 );
a10677a <=( a10676a and a10673a );
a10678a <=( a10677a and a10670a );
a10682a <=( A167 and A169 );
a10683a <=( (not A170) and a10682a );
a10686a <=( A199 and A166 );
a10689a <=( (not A203) and (not A202) );
a10690a <=( a10689a and a10686a );
a10691a <=( a10690a and a10683a );
a10694a <=( (not A233) and A232 );
a10697a <=( A236 and A234 );
a10698a <=( a10697a and a10694a );
a10701a <=( (not A266) and A265 );
a10704a <=( A269 and A267 );
a10705a <=( a10704a and a10701a );
a10706a <=( a10705a and a10698a );
a10710a <=( (not A167) and A169 );
a10711a <=( (not A170) and a10710a );
a10714a <=( A199 and (not A166) );
a10717a <=( (not A203) and (not A202) );
a10718a <=( a10717a and a10714a );
a10719a <=( a10718a and a10711a );
a10722a <=( (not A233) and A232 );
a10725a <=( A235 and A234 );
a10726a <=( a10725a and a10722a );
a10729a <=( (not A299) and A298 );
a10732a <=( A301 and A300 );
a10733a <=( a10732a and a10729a );
a10734a <=( a10733a and a10726a );
a10738a <=( (not A167) and A169 );
a10739a <=( (not A170) and a10738a );
a10742a <=( A199 and (not A166) );
a10745a <=( (not A203) and (not A202) );
a10746a <=( a10745a and a10742a );
a10747a <=( a10746a and a10739a );
a10750a <=( (not A233) and A232 );
a10753a <=( A235 and A234 );
a10754a <=( a10753a and a10750a );
a10757a <=( (not A299) and A298 );
a10760a <=( A302 and A300 );
a10761a <=( a10760a and a10757a );
a10762a <=( a10761a and a10754a );
a10766a <=( (not A167) and A169 );
a10767a <=( (not A170) and a10766a );
a10770a <=( A199 and (not A166) );
a10773a <=( (not A203) and (not A202) );
a10774a <=( a10773a and a10770a );
a10775a <=( a10774a and a10767a );
a10778a <=( (not A233) and A232 );
a10781a <=( A235 and A234 );
a10782a <=( a10781a and a10778a );
a10785a <=( (not A266) and A265 );
a10788a <=( A268 and A267 );
a10789a <=( a10788a and a10785a );
a10790a <=( a10789a and a10782a );
a10794a <=( (not A167) and A169 );
a10795a <=( (not A170) and a10794a );
a10798a <=( A199 and (not A166) );
a10801a <=( (not A203) and (not A202) );
a10802a <=( a10801a and a10798a );
a10803a <=( a10802a and a10795a );
a10806a <=( (not A233) and A232 );
a10809a <=( A235 and A234 );
a10810a <=( a10809a and a10806a );
a10813a <=( (not A266) and A265 );
a10816a <=( A269 and A267 );
a10817a <=( a10816a and a10813a );
a10818a <=( a10817a and a10810a );
a10822a <=( (not A167) and A169 );
a10823a <=( (not A170) and a10822a );
a10826a <=( A199 and (not A166) );
a10829a <=( (not A203) and (not A202) );
a10830a <=( a10829a and a10826a );
a10831a <=( a10830a and a10823a );
a10834a <=( (not A233) and A232 );
a10837a <=( A236 and A234 );
a10838a <=( a10837a and a10834a );
a10841a <=( (not A299) and A298 );
a10844a <=( A301 and A300 );
a10845a <=( a10844a and a10841a );
a10846a <=( a10845a and a10838a );
a10850a <=( (not A167) and A169 );
a10851a <=( (not A170) and a10850a );
a10854a <=( A199 and (not A166) );
a10857a <=( (not A203) and (not A202) );
a10858a <=( a10857a and a10854a );
a10859a <=( a10858a and a10851a );
a10862a <=( (not A233) and A232 );
a10865a <=( A236 and A234 );
a10866a <=( a10865a and a10862a );
a10869a <=( (not A299) and A298 );
a10872a <=( A302 and A300 );
a10873a <=( a10872a and a10869a );
a10874a <=( a10873a and a10866a );
a10878a <=( (not A167) and A169 );
a10879a <=( (not A170) and a10878a );
a10882a <=( A199 and (not A166) );
a10885a <=( (not A203) and (not A202) );
a10886a <=( a10885a and a10882a );
a10887a <=( a10886a and a10879a );
a10890a <=( (not A233) and A232 );
a10893a <=( A236 and A234 );
a10894a <=( a10893a and a10890a );
a10897a <=( (not A266) and A265 );
a10900a <=( A268 and A267 );
a10901a <=( a10900a and a10897a );
a10902a <=( a10901a and a10894a );
a10906a <=( (not A167) and A169 );
a10907a <=( (not A170) and a10906a );
a10910a <=( A199 and (not A166) );
a10913a <=( (not A203) and (not A202) );
a10914a <=( a10913a and a10910a );
a10915a <=( a10914a and a10907a );
a10918a <=( (not A233) and A232 );
a10921a <=( A236 and A234 );
a10922a <=( a10921a and a10918a );
a10925a <=( (not A266) and A265 );
a10928a <=( A269 and A267 );
a10929a <=( a10928a and a10925a );
a10930a <=( a10929a and a10922a );
a10934a <=( A167 and (not A169) );
a10935a <=( A170 and a10934a );
a10938a <=( A199 and (not A166) );
a10941a <=( (not A203) and (not A202) );
a10942a <=( a10941a and a10938a );
a10943a <=( a10942a and a10935a );
a10946a <=( (not A233) and A232 );
a10949a <=( A235 and A234 );
a10950a <=( a10949a and a10946a );
a10953a <=( (not A299) and A298 );
a10956a <=( A301 and A300 );
a10957a <=( a10956a and a10953a );
a10958a <=( a10957a and a10950a );
a10962a <=( A167 and (not A169) );
a10963a <=( A170 and a10962a );
a10966a <=( A199 and (not A166) );
a10969a <=( (not A203) and (not A202) );
a10970a <=( a10969a and a10966a );
a10971a <=( a10970a and a10963a );
a10974a <=( (not A233) and A232 );
a10977a <=( A235 and A234 );
a10978a <=( a10977a and a10974a );
a10981a <=( (not A299) and A298 );
a10984a <=( A302 and A300 );
a10985a <=( a10984a and a10981a );
a10986a <=( a10985a and a10978a );
a10990a <=( A167 and (not A169) );
a10991a <=( A170 and a10990a );
a10994a <=( A199 and (not A166) );
a10997a <=( (not A203) and (not A202) );
a10998a <=( a10997a and a10994a );
a10999a <=( a10998a and a10991a );
a11002a <=( (not A233) and A232 );
a11005a <=( A235 and A234 );
a11006a <=( a11005a and a11002a );
a11009a <=( (not A266) and A265 );
a11012a <=( A268 and A267 );
a11013a <=( a11012a and a11009a );
a11014a <=( a11013a and a11006a );
a11018a <=( A167 and (not A169) );
a11019a <=( A170 and a11018a );
a11022a <=( A199 and (not A166) );
a11025a <=( (not A203) and (not A202) );
a11026a <=( a11025a and a11022a );
a11027a <=( a11026a and a11019a );
a11030a <=( (not A233) and A232 );
a11033a <=( A235 and A234 );
a11034a <=( a11033a and a11030a );
a11037a <=( (not A266) and A265 );
a11040a <=( A269 and A267 );
a11041a <=( a11040a and a11037a );
a11042a <=( a11041a and a11034a );
a11046a <=( A167 and (not A169) );
a11047a <=( A170 and a11046a );
a11050a <=( A199 and (not A166) );
a11053a <=( (not A203) and (not A202) );
a11054a <=( a11053a and a11050a );
a11055a <=( a11054a and a11047a );
a11058a <=( (not A233) and A232 );
a11061a <=( A236 and A234 );
a11062a <=( a11061a and a11058a );
a11065a <=( (not A299) and A298 );
a11068a <=( A301 and A300 );
a11069a <=( a11068a and a11065a );
a11070a <=( a11069a and a11062a );
a11074a <=( A167 and (not A169) );
a11075a <=( A170 and a11074a );
a11078a <=( A199 and (not A166) );
a11081a <=( (not A203) and (not A202) );
a11082a <=( a11081a and a11078a );
a11083a <=( a11082a and a11075a );
a11086a <=( (not A233) and A232 );
a11089a <=( A236 and A234 );
a11090a <=( a11089a and a11086a );
a11093a <=( (not A299) and A298 );
a11096a <=( A302 and A300 );
a11097a <=( a11096a and a11093a );
a11098a <=( a11097a and a11090a );
a11102a <=( A167 and (not A169) );
a11103a <=( A170 and a11102a );
a11106a <=( A199 and (not A166) );
a11109a <=( (not A203) and (not A202) );
a11110a <=( a11109a and a11106a );
a11111a <=( a11110a and a11103a );
a11114a <=( (not A233) and A232 );
a11117a <=( A236 and A234 );
a11118a <=( a11117a and a11114a );
a11121a <=( (not A266) and A265 );
a11124a <=( A268 and A267 );
a11125a <=( a11124a and a11121a );
a11126a <=( a11125a and a11118a );
a11130a <=( A167 and (not A169) );
a11131a <=( A170 and a11130a );
a11134a <=( A199 and (not A166) );
a11137a <=( (not A203) and (not A202) );
a11138a <=( a11137a and a11134a );
a11139a <=( a11138a and a11131a );
a11142a <=( (not A233) and A232 );
a11145a <=( A236 and A234 );
a11146a <=( a11145a and a11142a );
a11149a <=( (not A266) and A265 );
a11152a <=( A269 and A267 );
a11153a <=( a11152a and a11149a );
a11154a <=( a11153a and a11146a );
a11158a <=( (not A167) and (not A169) );
a11159a <=( A170 and a11158a );
a11162a <=( A199 and A166 );
a11165a <=( (not A203) and (not A202) );
a11166a <=( a11165a and a11162a );
a11167a <=( a11166a and a11159a );
a11170a <=( (not A233) and A232 );
a11173a <=( A235 and A234 );
a11174a <=( a11173a and a11170a );
a11177a <=( (not A299) and A298 );
a11180a <=( A301 and A300 );
a11181a <=( a11180a and a11177a );
a11182a <=( a11181a and a11174a );
a11186a <=( (not A167) and (not A169) );
a11187a <=( A170 and a11186a );
a11190a <=( A199 and A166 );
a11193a <=( (not A203) and (not A202) );
a11194a <=( a11193a and a11190a );
a11195a <=( a11194a and a11187a );
a11198a <=( (not A233) and A232 );
a11201a <=( A235 and A234 );
a11202a <=( a11201a and a11198a );
a11205a <=( (not A299) and A298 );
a11208a <=( A302 and A300 );
a11209a <=( a11208a and a11205a );
a11210a <=( a11209a and a11202a );
a11214a <=( (not A167) and (not A169) );
a11215a <=( A170 and a11214a );
a11218a <=( A199 and A166 );
a11221a <=( (not A203) and (not A202) );
a11222a <=( a11221a and a11218a );
a11223a <=( a11222a and a11215a );
a11226a <=( (not A233) and A232 );
a11229a <=( A235 and A234 );
a11230a <=( a11229a and a11226a );
a11233a <=( (not A266) and A265 );
a11236a <=( A268 and A267 );
a11237a <=( a11236a and a11233a );
a11238a <=( a11237a and a11230a );
a11242a <=( (not A167) and (not A169) );
a11243a <=( A170 and a11242a );
a11246a <=( A199 and A166 );
a11249a <=( (not A203) and (not A202) );
a11250a <=( a11249a and a11246a );
a11251a <=( a11250a and a11243a );
a11254a <=( (not A233) and A232 );
a11257a <=( A235 and A234 );
a11258a <=( a11257a and a11254a );
a11261a <=( (not A266) and A265 );
a11264a <=( A269 and A267 );
a11265a <=( a11264a and a11261a );
a11266a <=( a11265a and a11258a );
a11270a <=( (not A167) and (not A169) );
a11271a <=( A170 and a11270a );
a11274a <=( A199 and A166 );
a11277a <=( (not A203) and (not A202) );
a11278a <=( a11277a and a11274a );
a11279a <=( a11278a and a11271a );
a11282a <=( (not A233) and A232 );
a11285a <=( A236 and A234 );
a11286a <=( a11285a and a11282a );
a11289a <=( (not A299) and A298 );
a11292a <=( A301 and A300 );
a11293a <=( a11292a and a11289a );
a11294a <=( a11293a and a11286a );
a11298a <=( (not A167) and (not A169) );
a11299a <=( A170 and a11298a );
a11302a <=( A199 and A166 );
a11305a <=( (not A203) and (not A202) );
a11306a <=( a11305a and a11302a );
a11307a <=( a11306a and a11299a );
a11310a <=( (not A233) and A232 );
a11313a <=( A236 and A234 );
a11314a <=( a11313a and a11310a );
a11317a <=( (not A299) and A298 );
a11320a <=( A302 and A300 );
a11321a <=( a11320a and a11317a );
a11322a <=( a11321a and a11314a );
a11326a <=( (not A167) and (not A169) );
a11327a <=( A170 and a11326a );
a11330a <=( A199 and A166 );
a11333a <=( (not A203) and (not A202) );
a11334a <=( a11333a and a11330a );
a11335a <=( a11334a and a11327a );
a11338a <=( (not A233) and A232 );
a11341a <=( A236 and A234 );
a11342a <=( a11341a and a11338a );
a11345a <=( (not A266) and A265 );
a11348a <=( A268 and A267 );
a11349a <=( a11348a and a11345a );
a11350a <=( a11349a and a11342a );
a11354a <=( (not A167) and (not A169) );
a11355a <=( A170 and a11354a );
a11358a <=( A199 and A166 );
a11361a <=( (not A203) and (not A202) );
a11362a <=( a11361a and a11358a );
a11363a <=( a11362a and a11355a );
a11366a <=( (not A233) and A232 );
a11369a <=( A236 and A234 );
a11370a <=( a11369a and a11366a );
a11373a <=( (not A266) and A265 );
a11376a <=( A269 and A267 );
a11377a <=( a11376a and a11373a );
a11378a <=( a11377a and a11370a );
end x25_7x_behav;
| gpl-3.0 | f7303ff1b8435329d7a1b86b49205c1f | 0.614338 | 2.127736 | false | false | false | false |
witoldo7/puc-2 | PUC/PUC_34/demux1_4_1.vhd | 1 | 802 | library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity demux1_4 is
port (
we : in std_logic_vector(7 downto 0);
adr : in std_logic_vector(1 downto 0);
oe : in std_logic ;
Y0,Y1,Y2,Y3 : out std_logic_vector (7 downto 0)
);
end demux1_4;
architecture Behavioral of demux1_4 is
begin
process(oe,adr) is
begin
if oe = '1' then
if adr="00" then
Y0<=we; Y1<="11111111"; Y2<="11111111"; Y3<="11111111";
elsif adr="01" then
Y0<="11111111"; Y1<=we; Y2<="11111111"; Y3<="11111111";
elsif adr="10" then
Y0<="11111111"; Y1<="11111111"; Y2<=we; Y3<="11111111";
elsif adr="11" then
Y0<="11111111"; Y1<="11111111"; Y2<="11111111"; Y3<=we;
end if;
elsif oe='0' then
Y0<="11111111"; Y1<="11111111"; Y2<="11111111"; Y3<="11111111";
end if;
end process;
end Behavioral;
| gpl-3.0 | ca9739fec78719ca5144e6ed40ba4878 | 0.623441 | 2.5623 | false | false | false | false |
sils1297/HWPrak14 | task_4/project_1.srcs/sources_1/new/BRAM.vhd | 1 | 1,985 | -----------------------------------------------------------------------------------
-- File : Mips (Data) Memory
-- Author : Wolfgang Brandt / Fabian May
-- Company : Technical University Hamburg Harburg Institute of Computer Technology
-----------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
use std.textio.all;
entity BRAM is
generic(
MEM_ADDR_WIDTH : integer := 8;
MEM_DATA_WIDTH : integer := 32;
EDGE_TYPE : boolean := true; -- true = rising edge, false = falling edge
MEM_NAME : string := "ram.mem"
);
port (
Clock : in std_logic;
WriteEnable : in std_logic;
Address : in std_logic_vector (MEM_ADDR_WIDTH-1 downto 0);
WriteData : in std_logic_vector (MEM_DATA_WIDTH-1 downto 0);
ReadData : out std_logic_vector (MEM_DATA_WIDTH-1 downto 0)
);
end BRAM;
architecture behavior of BRAM is
type MemType is array (0 to 2**MEM_ADDR_WIDTH-1) of bit_vector (MEM_DATA_WIDTH-1 downto 0);
impure function InitRamFromFile (RamFileName : in string) return MemType is
file RamFile : text is in RamFileName;
variable RamFileLine : line;
variable RAM : MemType;
begin
for I in MemType'range loop
readline (RamFile, RamFileLine);
read (RamFileLine, RAM(I));
end loop;
return RAM;
end function;
signal Ram : MemType := InitRamFromFile(MEM_NAME);
begin
process (Clock)
begin
if EDGE_TYPE then
if rising_edge(Clock) then --todo
if (WriteEnable = '1') then
Ram(conv_integer(Address)) <= to_bitvector(WriteData);
end if;
ReadData <= to_stdlogicvector(Ram(conv_integer(Address)));
end if;
else
if falling_edge(Clock) then --todo
if (WriteEnable = '1') then
Ram(conv_integer(Address)) <= to_bitvector(WriteData);
end if;
ReadData <= to_stdlogicvector(Ram(conv_integer(Address)));
end if;
end if;
end process;
end behavior;
| agpl-3.0 | 028846fdf2a01275bc9febf2fe988fe9 | 0.620151 | 3.370119 | false | false | false | false |
jc38x/X38-02FO16 | benchmarks/VHDL_Generado_desde_C++/inputs-30bits_outputs31bits/5-EWF/metaheurísticas/ewf_ibea.vhd | 1 | 3,072 | -- IT Tijuana, NetList-FPGA-Optimizer 0.01 (printed on 2016-05-17.11:31:30)
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.all;
USE IEEE.NUMERIC_STD.all;
ENTITY ewf_ibea_entity IS
PORT (
reset, clk: IN std_logic;
input1, input2: IN unsigned(0 TO 30);
output1, output2, output3, output4, output5: OUT unsigned(0 TO 31));
END ewf_ibea_entity;
ARCHITECTURE ewf_ibea_description OF ewf_ibea_entity IS
SIGNAL current_state : unsigned(0 TO 7) := "00000000";
SHARED VARIABLE register1: unsigned(0 TO 31) := "00000000000000000000000000000000";
SHARED VARIABLE register2: unsigned(0 TO 31) := "00000000000000000000000000000000";
SHARED VARIABLE register3: unsigned(0 TO 31) := "00000000000000000000000000000000";
SHARED VARIABLE register4: unsigned(0 TO 31) := "00000000000000000000000000000000";
SHARED VARIABLE register5: unsigned(0 TO 31) := "00000000000000000000000000000000";
SHARED VARIABLE register6: unsigned(0 TO 31) := "00000000000000000000000000000000";
BEGIN
moore_machine: PROCESS(clk, reset)
BEGIN
IF reset = '0' THEN
current_state <= "00000000";
ELSIF clk = '1' AND clk'event THEN
IF current_state < 4 THEN
current_state <= current_state + 1;
END IF;
END IF;
END PROCESS moore_machine;
operations: PROCESS(current_state)
BEGIN
CASE current_state IS
WHEN "00000001" =>
register1 := input1 + 1;
WHEN "00000010" =>
register2 := register1 + 3;
WHEN "00000011" =>
register3 := register2 + 5;
register4 := input2 + 6;
WHEN "00000100" =>
register3 := register4 + register3;
WHEN "00000101" =>
register5 := register3 * 8;
WHEN "00000110" =>
register6 := register3 * 10;
register5 := register2 + register5;
WHEN "00000111" =>
register3 := register3 + register5;
register2 := register2 + register5;
WHEN "00001000" =>
register6 := register4 + register6;
register2 := register2 * 12;
WHEN "00001001" =>
register4 := register4 + register6;
output1 <= register6 + register3;
WHEN "00001010" =>
register3 := register4 * 15;
register2 := register1 + register2;
WHEN "00001011" =>
register1 := register1 + register2;
WHEN "00001100" =>
register1 := register1 * 17;
register4 := register5 + register2;
WHEN "00001101" =>
register1 := register1 + 19;
WHEN "00001110" =>
output2 <= register2 + register1;
register1 := register4 + 22;
WHEN "00001111" =>
register2 := register1 * 24;
WHEN "00010000" =>
register2 := register2 + 26;
WHEN "00010001" =>
output3 <= register1 + register2;
register1 := register3 + 29;
WHEN "00010010" =>
register2 := register6 + register1;
WHEN "00010011" =>
register2 := register2 + 31;
WHEN "00010100" =>
register3 := register2 * 33;
register4 := register1 + 35;
WHEN "00010101" =>
register3 := register3 + 37;
register4 := register4 * 39;
WHEN "00010110" =>
output4 <= register2 + register3;
output5 <= register1 + register4;
WHEN OTHERS =>
NULL;
END CASE;
END PROCESS operations;
END ewf_ibea_description; | gpl-3.0 | 840a58803e4a3c58c19ea5ebd800c1b5 | 0.666992 | 3.342764 | false | false | false | false |
jc38x/X38-02FO16 | benchmarks/LEKO_LEKU/leku/LEKU-CD'/25_9.vhd | 1 | 576,511 | Library IEEE;
use IEEE.std_logic_1164.all;
entity x25_9x is
Port (
A302,A301,A300,A299,A298,A269,A268,A267,A266,A265,A236,A235,A234,A233,A232,A203,A202,A201,A200,A199,A166,A167,A168,A169,A170: in std_logic;
A106: buffer std_logic
);
end x25_9x;
architecture x25_9x_behav of x25_9x is
signal a1a,a2a,a3a,a4a,a5a,a6a,a7a,a8a,a9a,a10a,a11a,a12a,a13a,a14a,a15a,a16a,a17a,a18a,a19a,a20a,a21a,a22a,a23a,a24a,a25a,a26a,a27a,a28a,a29a,a30a,a31a,a32a,a33a,a34a,a35a,a36a,a37a,a38a,a39a,a40a,a41a,a42a,a43a,a44a,a45a,a46a,a47a,a48a,a49a,a50a,a51a,a52a,a53a,a54a,a55a,a56a,a57a,a58a,a59a,a60a,a61a,a62a,a63a,a64a,a65a,a66a,a67a,a68a,a69a,a70a,a71a,a72a,a73a,a74a,a75a,a76a,a77a,a78a,a79a,a80a,a81a,a82a,a83a,a84a,a85a,a86a,a87a,a88a,a89a,a90a,a91a,a92a,a93a,a94a,a95a,a96a,a97a,a98a,a99a,a100a,a101a,a102a,a103a,a104a,a105a,a106a,a107a,a108a,a109a,a110a,a111a,a112a,a113a,a114a,a115a,a116a,a117a,a118a,a119a,a120a,a121a,a122a,a123a,a124a,a125a,a126a,a127a,a128a,a129a,a130a,a131a,a132a,a133a,a134a,a135a,a136a,a137a,a138a,a139a,a140a,a141a,a142a,a143a,a144a,a145a,a146a,a147a,a148a,a149a,a150a,a151a,a152a,a153a,a154a,a155a,a156a,a157a,a158a,a159a,a160a,a161a,a162a,a163a,a164a,a165a,a166a,a167a,a168a,a169a,a170a,a171a,a172a,a173a,a174a,a175a,a176a,a177a,a178a,a179a,a180a,a181a,a182a,a183a,a184a,a185a,a186a,a187a,a188a,a189a,a190a,a191a,a192a,a193a,a194a,a195a,a196a,a197a,a198a,a199a,a200a,a201a,a202a,a203a,a204a,a205a,a206a,a207a,a208a,a209a,a210a,a211a,a212a,a213a,a214a,a215a,a216a,a217a,a218a,a219a,a220a,a221a,a222a,a223a,a224a,a225a,a226a,a227a,a228a,a229a,a230a,a231a,a232a,a233a,a234a,a235a,a236a,a237a,a238a,a239a,a240a,a241a,a242a,a243a,a244a,a245a,a246a,a247a,a248a,a249a,a250a,a251a,a252a,a253a,a254a,a255a,a256a,a257a,a258a,a259a,a260a,a261a,a262a,a263a,a264a,a265a,a266a,a267a,a268a,a269a,a270a,a271a,a272a,a273a,a274a,a275a,a276a,a277a,a278a,a279a,a280a,a281a,a282a,a283a,a284a,a285a,a286a,a287a,a288a,a289a,a290a,a291a,a292a,a293a,a294a,a295a,a296a,a297a,a298a,a299a,a300a,a301a,a302a,a303a,a304a,a305a,a306a,a307a,a308a,a309a,a310a,a311a,a312a,a313a,a314a,a315a,a316a,a317a,a318a,a319a,a320a,a321a,a322a,a323a,a324a,a325a,a326a,a327a,a328a,a329a,a330a,a331a,a332a,a333a,a334a,a335a,a336a,a337a,a338a,a339a,a340a,a341a,a342a,a343a,a344a,a345a,a346a,a347a,a348a,a349a,a350a,a351a,a352a,a353a,a354a,a355a,a356a,a357a,a358a,a359a,a360a,a361a,a362a,a363a,a364a,a365a,a366a,a367a,a368a,a369a,a370a,a371a,a372a,a373a,a374a,a375a,a376a,a377a,a378a,a379a,a380a,a381a,a382a,a383a,a384a,a385a,a386a,a387a,a388a,a389a,a390a,a391a,a392a,a393a,a394a,a395a,a396a,a397a,a398a,a399a,a400a,a401a,a402a,a403a,a404a,a405a,a406a,a407a,a408a,a409a,a410a,a411a,a412a,a413a,a414a,a415a,a416a,a417a,a418a,a419a,a420a,a421a,a422a,a423a,a424a,a425a,a426a,a427a,a428a,a429a,a430a,a431a,a432a,a433a,a434a,a435a,a436a,a437a,a438a,a439a,a440a,a441a,a442a,a443a,a444a,a445a,a446a,a447a,a448a,a449a,a450a,a451a,a452a,a453a,a454a,a455a,a456a,a457a,a458a,a459a,a460a,a461a,a462a,a463a,a464a,a465a,a466a,a467a,a468a,a469a,a470a,a471a,a472a,a473a,a474a,a475a,a476a,a477a,a478a,a479a,a480a,a481a,a482a,a483a,a484a,a485a,a486a,a487a,a488a,a489a,a490a,a491a,a492a,a493a,a494a,a495a,a496a,a497a,a498a,a499a,a500a,a501a,a502a,a503a,a504a,a505a,a506a,a507a,a508a,a509a,a510a,a511a,a512a,a513a,a514a,a515a,a516a,a517a,a518a,a519a,a520a,a521a,a522a,a523a,a524a,a525a,a526a,a527a,a528a,a529a,a530a,a531a,a532a,a533a,a534a,a535a,a536a,a537a,a538a,a539a,a540a,a541a,a542a,a543a,a544a,a545a,a546a,a547a,a548a,a549a,a550a,a551a,a552a,a553a,a554a,a555a,a556a,a557a,a558a,a559a,a560a,a561a,a562a,a563a,a564a,a565a,a566a,a567a,a568a,a569a,a570a,a571a,a572a,a573a,a574a,a575a,a576a,a577a,a578a,a579a,a580a,a581a,a582a,a583a,a584a,a585a,a586a,a587a,a588a,a589a,a590a,a591a,a592a,a593a,a594a,a595a,a596a,a597a,a598a,a599a,a600a,a601a,a602a,a603a,a604a,a605a,a606a,a607a,a608a,a609a,a610a,a611a,a612a,a613a,a614a,a615a,a616a,a617a,a618a,a619a,a620a,a621a,a622a,a623a,a624a,a625a,a626a,a627a,a628a,a629a,a630a,a631a,a632a,a633a,a634a,a635a,a636a,a637a,a638a,a639a,a640a,a641a,a642a,a643a,a644a,a645a,a646a,a647a,a648a,a649a,a650a,a651a,a652a,a653a,a654a,a655a,a656a,a657a,a658a,a659a,a660a,a661a,a662a,a663a,a664a,a665a,a666a,a667a,a668a,a669a,a670a,a671a,a672a,a673a,a674a,a675a,a676a,a677a,a678a,a679a,a680a,a681a,a682a,a683a,a684a,a685a,a686a,a687a,a688a,a689a,a690a,a691a,a692a,a693a,a694a,a695a,a696a,a697a,a698a,a699a,a700a,a701a,a702a,a703a,a704a,a705a,a706a,a707a,a708a,a709a,a710a,a711a,a712a,a713a,a714a,a715a,a716a,a717a,a718a,a719a,a720a,a721a,a722a,a723a,a724a,a725a,a726a,a727a,a728a,a729a,a730a,a731a,a732a,a733a,a734a,a735a,a736a,a737a,a738a,a739a,a740a,a741a,a742a,a743a,a744a,a745a,a746a,a747a,a748a,a749a,a750a,a751a,a752a,a753a,a754a,a755a,a756a,a757a,a758a,a759a,a760a,a761a,a762a,a763a,a764a,a765a,a766a,a767a,a768a,a769a,a770a,a771a,a772a,a773a,a774a,a775a,a776a,a777a,a778a,a779a,a780a,a781a,a782a,a783a,a784a,a785a,a786a,a787a,a788a,a789a,a790a,a791a,a792a,a793a,a794a,a795a,a796a,a797a,a798a,a799a,a800a,a801a,a802a,a803a,a804a,a805a,a806a,a807a,a808a,a809a,a810a,a811a,a812a,a813a,a814a,a815a,a816a,a817a,a818a,a819a,a820a,a821a,a822a,a823a,a824a,a825a,a826a,a827a,a828a,a829a,a830a,a831a,a832a,a833a,a834a,a835a,a836a,a837a,a838a,a839a,a840a,a841a,a842a,a843a,a844a,a845a,a846a,a847a,a848a,a849a,a850a,a851a,a852a,a853a,a854a,a855a,a856a,a857a,a858a,a859a,a860a,a861a,a862a,a863a,a864a,a865a,a866a,a867a,a868a,a869a,a870a,a871a,a872a,a873a,a874a,a875a,a876a,a877a,a878a,a879a,a880a,a881a,a882a,a883a,a884a,a885a,a886a,a887a,a888a,a889a,a890a,a891a,a892a,a893a,a894a,a895a,a896a,a897a,a898a,a899a,a900a,a901a,a902a,a903a,a904a,a905a,a906a,a907a,a908a,a909a,a910a,a911a,a912a,a913a,a914a,a915a,a916a,a917a,a918a,a919a,a920a,a921a,a922a,a923a,a924a,a925a,a926a,a927a,a928a,a929a,a930a,a931a,a932a,a933a,a934a,a935a,a936a,a937a,a938a,a939a,a940a,a941a,a942a,a943a,a944a,a945a,a946a,a947a,a948a,a949a,a950a,a951a,a952a,a953a,a954a,a955a,a956a,a957a,a958a,a959a,a960a,a961a,a962a,a963a,a964a,a965a,a966a,a967a,a968a,a969a,a970a,a971a,a972a,a973a,a974a,a975a,a976a,a977a,a978a,a979a,a980a,a981a,a982a,a983a,a984a,a985a,a986a,a987a,a988a,a989a,a990a,a991a,a992a,a993a,a994a,a995a,a996a,a997a,a998a,a999a,a1000a,a1001a,a1002a,a1003a,a1004a,a1005a,a1006a,a1007a,a1008a,a1009a,a1010a,a1011a,a1012a,a1013a,a1014a,a1015a,a1016a,a1017a,a1018a,a1019a,a1020a,a1021a,a1022a,a1023a,a1024a,a1025a,a1026a,a1027a,a1028a,a1029a,a1030a,a1031a,a1032a,a1033a,a1034a,a1035a,a1036a,a1037a,a1038a,a1039a,a1040a,a1041a,a1042a,a1043a,a1044a,a1045a,a1046a,a1047a,a1048a,a1049a,a1050a,a1051a,a1052a,a1053a,a1054a,a1055a,a1056a,a1057a,a1058a,a1059a,a1060a,a1061a,a1062a,a1063a,a1064a,a1065a,a1066a,a1067a,a1068a,a1069a,a1070a,a1071a,a1072a,a1073a,a1074a,a1075a,a1076a,a1077a,a1078a,a1079a,a1080a,a1081a,a1082a,a1083a,a1084a,a1085a,a1086a,a1087a,a1088a,a1089a,a1090a,a1091a,a1092a,a1093a,a1094a,a1095a,a1096a,a1097a,a1098a,a1099a,a1100a,a1101a,a1102a,a1103a,a1104a,a1105a,a1106a,a1107a,a1108a,a1109a,a1110a,a1111a,a1112a,a1113a,a1114a,a1115a,a1116a,a1117a,a1118a,a1119a,a1122a,a1125a,a1126a,a1129a,a1132a,a1133a,a1134a,a1137a,a1140a,a1141a,a1144a,a1148a,a1149a,a1150a,a1151a,a1152a,a1155a,a1158a,a1159a,a1162a,a1165a,a1166a,a1167a,a1170a,a1173a,a1174a,a1177a,a1181a,a1182a,a1183a,a1184a,a1185a,a1186a,a1189a,a1192a,a1193a,a1196a,a1199a,a1200a,a1201a,a1204a,a1207a,a1208a,a1211a,a1215a,a1216a,a1217a,a1218a,a1219a,a1222a,a1225a,a1226a,a1229a,a1233a,a1234a,a1235a,a1236a,a1239a,a1242a,a1243a,a1246a,a1250a,a1251a,a1252a,a1253a,a1254a,a1255a,a1256a,a1259a,a1262a,a1263a,a1266a,a1269a,a1270a,a1271a,a1274a,a1277a,a1278a,a1281a,a1285a,a1286a,a1287a,a1288a,a1289a,a1292a,a1295a,a1296a,a1299a,a1303a,a1304a,a1305a,a1306a,a1309a,a1312a,a1313a,a1316a,a1320a,a1321a,a1322a,a1323a,a1324a,a1325a,a1328a,a1331a,a1332a,a1335a,a1338a,a1339a,a1340a,a1343a,a1346a,a1347a,a1350a,a1354a,a1355a,a1356a,a1357a,a1358a,a1361a,a1364a,a1365a,a1368a,a1372a,a1373a,a1374a,a1375a,a1378a,a1381a,a1382a,a1385a,a1389a,a1390a,a1391a,a1392a,a1393a,a1394a,a1395a,a1396a,a1399a,a1402a,a1403a,a1406a,a1409a,a1410a,a1411a,a1414a,a1417a,a1418a,a1421a,a1425a,a1426a,a1427a,a1428a,a1429a,a1432a,a1435a,a1436a,a1439a,a1443a,a1444a,a1445a,a1446a,a1449a,a1452a,a1453a,a1456a,a1460a,a1461a,a1462a,a1463a,a1464a,a1465a,a1468a,a1471a,a1472a,a1475a,a1478a,a1479a,a1480a,a1483a,a1486a,a1487a,a1490a,a1494a,a1495a,a1496a,a1497a,a1498a,a1501a,a1504a,a1505a,a1508a,a1512a,a1513a,a1514a,a1515a,a1518a,a1521a,a1522a,a1525a,a1529a,a1530a,a1531a,a1532a,a1533a,a1534a,a1535a,a1538a,a1541a,a1542a,a1545a,a1548a,a1549a,a1550a,a1553a,a1556a,a1557a,a1560a,a1564a,a1565a,a1566a,a1567a,a1568a,a1571a,a1574a,a1575a,a1578a,a1582a,a1583a,a1584a,a1585a,a1588a,a1591a,a1592a,a1595a,a1599a,a1600a,a1601a,a1602a,a1603a,a1604a,a1607a,a1610a,a1611a,a1614a,a1617a,a1618a,a1619a,a1622a,a1625a,a1626a,a1629a,a1633a,a1634a,a1635a,a1636a,a1637a,a1640a,a1643a,a1644a,a1647a,a1651a,a1652a,a1653a,a1654a,a1657a,a1660a,a1661a,a1664a,a1668a,a1669a,a1670a,a1671a,a1672a,a1673a,a1674a,a1675a,a1676a,a1679a,a1682a,a1683a,a1686a,a1689a,a1690a,a1691a,a1694a,a1697a,a1698a,a1701a,a1705a,a1706a,a1707a,a1708a,a1709a,a1712a,a1715a,a1716a,a1719a,a1723a,a1724a,a1725a,a1726a,a1729a,a1732a,a1733a,a1736a,a1740a,a1741a,a1742a,a1743a,a1744a,a1745a,a1748a,a1751a,a1752a,a1755a,a1758a,a1759a,a1760a,a1763a,a1766a,a1767a,a1770a,a1774a,a1775a,a1776a,a1777a,a1778a,a1781a,a1784a,a1785a,a1788a,a1792a,a1793a,a1794a,a1795a,a1798a,a1801a,a1802a,a1805a,a1809a,a1810a,a1811a,a1812a,a1813a,a1814a,a1815a,a1818a,a1821a,a1822a,a1825a,a1828a,a1829a,a1830a,a1833a,a1836a,a1837a,a1840a,a1844a,a1845a,a1846a,a1847a,a1848a,a1851a,a1854a,a1855a,a1858a,a1862a,a1863a,a1864a,a1865a,a1868a,a1871a,a1872a,a1875a,a1879a,a1880a,a1881a,a1882a,a1883a,a1884a,a1887a,a1890a,a1891a,a1894a,a1897a,a1898a,a1899a,a1902a,a1905a,a1906a,a1909a,a1913a,a1914a,a1915a,a1916a,a1917a,a1920a,a1923a,a1924a,a1927a,a1931a,a1932a,a1933a,a1934a,a1937a,a1940a,a1941a,a1944a,a1948a,a1949a,a1950a,a1951a,a1952a,a1953a,a1954a,a1955a,a1958a,a1961a,a1962a,a1965a,a1968a,a1969a,a1970a,a1973a,a1976a,a1977a,a1980a,a1984a,a1985a,a1986a,a1987a,a1988a,a1991a,a1994a,a1995a,a1998a,a2002a,a2003a,a2004a,a2005a,a2008a,a2011a,a2012a,a2015a,a2019a,a2020a,a2021a,a2022a,a2023a,a2024a,a2027a,a2030a,a2031a,a2034a,a2037a,a2038a,a2039a,a2042a,a2045a,a2046a,a2049a,a2053a,a2054a,a2055a,a2056a,a2057a,a2060a,a2063a,a2064a,a2067a,a2071a,a2072a,a2073a,a2074a,a2077a,a2080a,a2081a,a2084a,a2088a,a2089a,a2090a,a2091a,a2092a,a2093a,a2094a,a2097a,a2100a,a2101a,a2104a,a2107a,a2108a,a2109a,a2112a,a2115a,a2116a,a2119a,a2123a,a2124a,a2125a,a2126a,a2127a,a2130a,a2133a,a2134a,a2137a,a2141a,a2142a,a2143a,a2144a,a2147a,a2150a,a2151a,a2154a,a2158a,a2159a,a2160a,a2161a,a2162a,a2163a,a2166a,a2169a,a2170a,a2173a,a2176a,a2177a,a2178a,a2181a,a2184a,a2185a,a2188a,a2192a,a2193a,a2194a,a2195a,a2196a,a2199a,a2202a,a2203a,a2206a,a2210a,a2211a,a2212a,a2213a,a2216a,a2219a,a2220a,a2223a,a2227a,a2228a,a2229a,a2230a,a2231a,a2232a,a2233a,a2234a,a2235a,a2236a,a2239a,a2242a,a2243a,a2246a,a2249a,a2250a,a2251a,a2254a,a2257a,a2258a,a2261a,a2265a,a2266a,a2267a,a2268a,a2269a,a2272a,a2275a,a2276a,a2279a,a2283a,a2284a,a2285a,a2286a,a2289a,a2292a,a2293a,a2296a,a2300a,a2301a,a2302a,a2303a,a2304a,a2305a,a2308a,a2311a,a2312a,a2315a,a2318a,a2319a,a2320a,a2323a,a2326a,a2327a,a2330a,a2334a,a2335a,a2336a,a2337a,a2338a,a2341a,a2344a,a2345a,a2348a,a2352a,a2353a,a2354a,a2355a,a2358a,a2361a,a2362a,a2365a,a2369a,a2370a,a2371a,a2372a,a2373a,a2374a,a2375a,a2378a,a2381a,a2382a,a2385a,a2388a,a2389a,a2390a,a2393a,a2396a,a2397a,a2400a,a2404a,a2405a,a2406a,a2407a,a2408a,a2411a,a2414a,a2415a,a2418a,a2422a,a2423a,a2424a,a2425a,a2428a,a2431a,a2432a,a2435a,a2439a,a2440a,a2441a,a2442a,a2443a,a2444a,a2447a,a2450a,a2451a,a2454a,a2457a,a2458a,a2459a,a2462a,a2465a,a2466a,a2469a,a2473a,a2474a,a2475a,a2476a,a2477a,a2480a,a2483a,a2484a,a2487a,a2491a,a2492a,a2493a,a2494a,a2497a,a2500a,a2501a,a2504a,a2508a,a2509a,a2510a,a2511a,a2512a,a2513a,a2514a,a2515a,a2518a,a2521a,a2522a,a2525a,a2528a,a2529a,a2530a,a2533a,a2536a,a2537a,a2540a,a2544a,a2545a,a2546a,a2547a,a2548a,a2551a,a2554a,a2555a,a2558a,a2562a,a2563a,a2564a,a2565a,a2568a,a2571a,a2572a,a2575a,a2579a,a2580a,a2581a,a2582a,a2583a,a2584a,a2587a,a2590a,a2591a,a2594a,a2597a,a2598a,a2599a,a2602a,a2605a,a2606a,a2609a,a2613a,a2614a,a2615a,a2616a,a2617a,a2620a,a2623a,a2624a,a2627a,a2631a,a2632a,a2633a,a2634a,a2637a,a2640a,a2641a,a2644a,a2648a,a2649a,a2650a,a2651a,a2652a,a2653a,a2654a,a2657a,a2660a,a2661a,a2664a,a2667a,a2668a,a2669a,a2672a,a2675a,a2676a,a2679a,a2683a,a2684a,a2685a,a2686a,a2687a,a2690a,a2693a,a2694a,a2697a,a2701a,a2702a,a2703a,a2704a,a2707a,a2710a,a2711a,a2714a,a2718a,a2719a,a2720a,a2721a,a2722a,a2723a,a2726a,a2729a,a2730a,a2733a,a2736a,a2737a,a2738a,a2741a,a2744a,a2745a,a2748a,a2752a,a2753a,a2754a,a2755a,a2756a,a2759a,a2762a,a2763a,a2766a,a2770a,a2771a,a2772a,a2773a,a2776a,a2779a,a2780a,a2783a,a2787a,a2788a,a2789a,a2790a,a2791a,a2792a,a2793a,a2794a,a2795a,a2798a,a2801a,a2802a,a2805a,a2808a,a2809a,a2810a,a2813a,a2816a,a2817a,a2820a,a2824a,a2825a,a2826a,a2827a,a2828a,a2831a,a2834a,a2835a,a2838a,a2842a,a2843a,a2844a,a2845a,a2848a,a2851a,a2852a,a2855a,a2859a,a2860a,a2861a,a2862a,a2863a,a2864a,a2867a,a2870a,a2871a,a2874a,a2877a,a2878a,a2879a,a2882a,a2885a,a2886a,a2889a,a2893a,a2894a,a2895a,a2896a,a2897a,a2900a,a2903a,a2904a,a2907a,a2911a,a2912a,a2913a,a2914a,a2917a,a2920a,a2921a,a2924a,a2928a,a2929a,a2930a,a2931a,a2932a,a2933a,a2934a,a2937a,a2940a,a2941a,a2944a,a2947a,a2948a,a2949a,a2952a,a2955a,a2956a,a2959a,a2963a,a2964a,a2965a,a2966a,a2967a,a2970a,a2973a,a2974a,a2977a,a2981a,a2982a,a2983a,a2984a,a2987a,a2990a,a2991a,a2994a,a2998a,a2999a,a3000a,a3001a,a3002a,a3003a,a3006a,a3009a,a3010a,a3013a,a3016a,a3017a,a3018a,a3021a,a3024a,a3025a,a3028a,a3032a,a3033a,a3034a,a3035a,a3036a,a3039a,a3042a,a3043a,a3046a,a3050a,a3051a,a3052a,a3053a,a3056a,a3059a,a3060a,a3063a,a3067a,a3068a,a3069a,a3070a,a3071a,a3072a,a3073a,a3074a,a3077a,a3080a,a3081a,a3084a,a3087a,a3088a,a3089a,a3092a,a3095a,a3096a,a3099a,a3103a,a3104a,a3105a,a3106a,a3107a,a3110a,a3113a,a3114a,a3117a,a3121a,a3122a,a3123a,a3124a,a3127a,a3130a,a3131a,a3134a,a3138a,a3139a,a3140a,a3141a,a3142a,a3143a,a3146a,a3149a,a3150a,a3153a,a3156a,a3157a,a3158a,a3161a,a3164a,a3165a,a3168a,a3172a,a3173a,a3174a,a3175a,a3176a,a3179a,a3182a,a3183a,a3186a,a3190a,a3191a,a3192a,a3193a,a3196a,a3199a,a3200a,a3203a,a3207a,a3208a,a3209a,a3210a,a3211a,a3212a,a3213a,a3216a,a3219a,a3220a,a3223a,a3226a,a3227a,a3228a,a3231a,a3234a,a3235a,a3238a,a3242a,a3243a,a3244a,a3245a,a3246a,a3249a,a3252a,a3253a,a3256a,a3260a,a3261a,a3262a,a3263a,a3266a,a3269a,a3270a,a3273a,a3277a,a3278a,a3279a,a3280a,a3281a,a3282a,a3285a,a3288a,a3289a,a3292a,a3295a,a3296a,a3297a,a3300a,a3303a,a3304a,a3307a,a3311a,a3312a,a3313a,a3314a,a3315a,a3318a,a3321a,a3322a,a3325a,a3329a,a3330a,a3331a,a3332a,a3335a,a3338a,a3339a,a3342a,a3346a,a3347a,a3348a,a3349a,a3350a,a3351a,a3352a,a3353a,a3354a,a3355a,a3358a,a3361a,a3364a,a3367a,a3370a,a3373a,a3377a,a3378a,a3382a,a3383a,a3387a,a3388a,a3392a,a3393a,a3397a,a3398a,a3402a,a3403a,a3407a,a3408a,a3412a,a3413a,a3417a,a3418a,a3422a,a3423a,a3427a,a3428a,a3432a,a3433a,a3437a,a3438a,a3442a,a3443a,a3447a,a3448a,a3452a,a3453a,a3457a,a3458a,a3462a,a3463a,a3467a,a3468a,a3472a,a3473a,a3477a,a3478a,a3482a,a3483a,a3487a,a3488a,a3492a,a3493a,a3496a,a3499a,a3500a,a3503a,a3506a,a3507a,a3510a,a3513a,a3514a,a3517a,a3520a,a3521a,a3524a,a3527a,a3528a,a3531a,a3534a,a3535a,a3538a,a3541a,a3542a,a3545a,a3548a,a3549a,a3552a,a3555a,a3556a,a3559a,a3562a,a3563a,a3566a,a3569a,a3570a,a3573a,a3576a,a3577a,a3580a,a3583a,a3584a,a3587a,a3590a,a3591a,a3594a,a3597a,a3598a,a3601a,a3604a,a3605a,a3608a,a3611a,a3612a,a3615a,a3618a,a3619a,a3622a,a3625a,a3626a,a3629a,a3632a,a3633a,a3636a,a3639a,a3640a,a3643a,a3646a,a3647a,a3650a,a3653a,a3654a,a3657a,a3660a,a3661a,a3664a,a3667a,a3668a,a3671a,a3674a,a3675a,a3678a,a3681a,a3682a,a3685a,a3688a,a3689a,a3692a,a3695a,a3696a,a3699a,a3702a,a3703a,a3706a,a3709a,a3710a,a3713a,a3716a,a3717a,a3720a,a3723a,a3724a,a3727a,a3730a,a3731a,a3734a,a3737a,a3738a,a3741a,a3744a,a3745a,a3748a,a3751a,a3752a,a3755a,a3758a,a3759a,a3762a,a3765a,a3766a,a3769a,a3772a,a3773a,a3776a,a3779a,a3780a,a3783a,a3786a,a3787a,a3790a,a3793a,a3794a,a3797a,a3800a,a3801a,a3804a,a3807a,a3808a,a3811a,a3814a,a3815a,a3818a,a3821a,a3822a,a3825a,a3828a,a3829a,a3832a,a3835a,a3836a,a3839a,a3842a,a3843a,a3846a,a3849a,a3850a,a3853a,a3856a,a3857a,a3860a,a3863a,a3864a,a3867a,a3870a,a3871a,a3874a,a3877a,a3878a,a3881a,a3884a,a3885a,a3888a,a3891a,a3892a,a3895a,a3898a,a3899a,a3902a,a3905a,a3906a,a3909a,a3912a,a3913a,a3916a,a3919a,a3920a,a3923a,a3926a,a3927a,a3930a,a3933a,a3934a,a3937a,a3940a,a3941a,a3944a,a3947a,a3948a,a3951a,a3954a,a3955a,a3958a,a3961a,a3962a,a3965a,a3968a,a3969a,a3972a,a3975a,a3976a,a3979a,a3982a,a3983a,a3986a,a3989a,a3990a,a3993a,a3996a,a3997a,a4000a,a4003a,a4004a,a4007a,a4011a,a4012a,a4013a,a4016a,a4019a,a4020a,a4023a,a4027a,a4028a,a4029a,a4032a,a4035a,a4036a,a4039a,a4043a,a4044a,a4045a,a4048a,a4051a,a4052a,a4055a,a4059a,a4060a,a4061a,a4064a,a4067a,a4068a,a4071a,a4075a,a4076a,a4077a,a4080a,a4083a,a4084a,a4087a,a4091a,a4092a,a4093a,a4096a,a4099a,a4100a,a4103a,a4107a,a4108a,a4109a,a4112a,a4115a,a4116a,a4119a,a4123a,a4124a,a4125a,a4128a,a4131a,a4132a,a4135a,a4139a,a4140a,a4141a,a4144a,a4147a,a4148a,a4151a,a4155a,a4156a,a4157a,a4160a,a4163a,a4164a,a4167a,a4171a,a4172a,a4173a,a4176a,a4179a,a4180a,a4183a,a4187a,a4188a,a4189a,a4192a,a4195a,a4196a,a4199a,a4203a,a4204a,a4205a,a4208a,a4211a,a4212a,a4215a,a4219a,a4220a,a4221a,a4224a,a4227a,a4228a,a4231a,a4235a,a4236a,a4237a,a4240a,a4243a,a4244a,a4247a,a4251a,a4252a,a4253a,a4256a,a4259a,a4260a,a4263a,a4267a,a4268a,a4269a,a4272a,a4275a,a4276a,a4279a,a4283a,a4284a,a4285a,a4288a,a4291a,a4292a,a4295a,a4299a,a4300a,a4301a,a4304a,a4307a,a4308a,a4311a,a4315a,a4316a,a4317a,a4320a,a4323a,a4324a,a4327a,a4331a,a4332a,a4333a,a4336a,a4339a,a4340a,a4343a,a4347a,a4348a,a4349a,a4352a,a4355a,a4356a,a4359a,a4363a,a4364a,a4365a,a4368a,a4371a,a4372a,a4375a,a4379a,a4380a,a4381a,a4384a,a4387a,a4388a,a4391a,a4395a,a4396a,a4397a,a4400a,a4403a,a4404a,a4407a,a4411a,a4412a,a4413a,a4416a,a4419a,a4420a,a4423a,a4427a,a4428a,a4429a,a4432a,a4435a,a4436a,a4439a,a4443a,a4444a,a4445a,a4448a,a4451a,a4452a,a4455a,a4459a,a4460a,a4461a,a4464a,a4467a,a4468a,a4471a,a4475a,a4476a,a4477a,a4480a,a4483a,a4484a,a4487a,a4491a,a4492a,a4493a,a4496a,a4499a,a4500a,a4503a,a4507a,a4508a,a4509a,a4512a,a4515a,a4516a,a4519a,a4523a,a4524a,a4525a,a4528a,a4531a,a4532a,a4535a,a4539a,a4540a,a4541a,a4544a,a4547a,a4548a,a4551a,a4555a,a4556a,a4557a,a4560a,a4563a,a4564a,a4567a,a4571a,a4572a,a4573a,a4576a,a4579a,a4580a,a4583a,a4587a,a4588a,a4589a,a4592a,a4595a,a4596a,a4599a,a4603a,a4604a,a4605a,a4608a,a4611a,a4612a,a4615a,a4619a,a4620a,a4621a,a4624a,a4627a,a4628a,a4631a,a4635a,a4636a,a4637a,a4640a,a4643a,a4644a,a4647a,a4651a,a4652a,a4653a,a4656a,a4659a,a4660a,a4663a,a4667a,a4668a,a4669a,a4672a,a4675a,a4676a,a4679a,a4683a,a4684a,a4685a,a4688a,a4691a,a4692a,a4695a,a4699a,a4700a,a4701a,a4704a,a4707a,a4708a,a4711a,a4715a,a4716a,a4717a,a4720a,a4723a,a4724a,a4727a,a4731a,a4732a,a4733a,a4736a,a4739a,a4740a,a4743a,a4747a,a4748a,a4749a,a4752a,a4755a,a4756a,a4759a,a4763a,a4764a,a4765a,a4768a,a4771a,a4772a,a4775a,a4779a,a4780a,a4781a,a4784a,a4787a,a4788a,a4791a,a4795a,a4796a,a4797a,a4800a,a4803a,a4804a,a4807a,a4811a,a4812a,a4813a,a4816a,a4819a,a4820a,a4823a,a4827a,a4828a,a4829a,a4832a,a4835a,a4836a,a4839a,a4843a,a4844a,a4845a,a4848a,a4851a,a4852a,a4855a,a4859a,a4860a,a4861a,a4864a,a4867a,a4868a,a4871a,a4875a,a4876a,a4877a,a4880a,a4883a,a4884a,a4887a,a4891a,a4892a,a4893a,a4896a,a4899a,a4900a,a4903a,a4907a,a4908a,a4909a,a4912a,a4915a,a4916a,a4919a,a4923a,a4924a,a4925a,a4928a,a4931a,a4932a,a4935a,a4939a,a4940a,a4941a,a4944a,a4947a,a4948a,a4951a,a4955a,a4956a,a4957a,a4960a,a4963a,a4964a,a4967a,a4971a,a4972a,a4973a,a4976a,a4979a,a4980a,a4983a,a4987a,a4988a,a4989a,a4992a,a4996a,a4997a,a4998a,a5001a,a5005a,a5006a,a5007a,a5010a,a5014a,a5015a,a5016a,a5019a,a5023a,a5024a,a5025a,a5028a,a5032a,a5033a,a5034a,a5037a,a5041a,a5042a,a5043a,a5046a,a5050a,a5051a,a5052a,a5055a,a5059a,a5060a,a5061a,a5064a,a5068a,a5069a,a5070a,a5073a,a5077a,a5078a,a5079a,a5082a,a5086a,a5087a,a5088a,a5091a,a5095a,a5096a,a5097a,a5100a,a5104a,a5105a,a5106a,a5109a,a5113a,a5114a,a5115a,a5118a,a5122a,a5123a,a5124a,a5127a,a5131a,a5132a,a5133a,a5136a,a5140a,a5141a,a5142a,a5145a,a5149a,a5150a,a5151a,a5154a,a5158a,a5159a,a5160a,a5163a,a5167a,a5168a,a5169a,a5172a,a5176a,a5177a,a5178a,a5181a,a5185a,a5186a,a5187a,a5190a,a5194a,a5195a,a5196a,a5199a,a5203a,a5204a,a5205a,a5208a,a5212a,a5213a,a5214a,a5217a,a5221a,a5222a,a5223a,a5226a,a5230a,a5231a,a5232a,a5235a,a5239a,a5240a,a5241a,a5244a,a5248a,a5249a,a5250a,a5253a,a5257a,a5258a,a5259a,a5262a,a5266a,a5267a,a5268a,a5271a,a5275a,a5276a,a5277a,a5280a,a5284a,a5285a,a5286a,a5289a,a5293a,a5294a,a5295a,a5298a,a5302a,a5303a,a5304a,a5307a,a5311a,a5312a,a5313a,a5316a,a5320a,a5321a,a5322a,a5325a,a5329a,a5330a,a5331a,a5334a,a5338a,a5339a,a5340a,a5343a,a5347a,a5348a,a5349a,a5352a,a5356a,a5357a,a5358a,a5361a,a5365a,a5366a,a5367a,a5370a,a5374a,a5375a,a5376a,a5379a,a5383a,a5384a,a5385a,a5388a,a5392a,a5393a,a5394a,a5397a,a5401a,a5402a,a5403a,a5406a,a5410a,a5411a,a5412a,a5415a,a5419a,a5420a,a5421a,a5424a,a5428a,a5429a,a5430a,a5433a,a5437a,a5438a,a5439a,a5442a,a5446a,a5447a,a5448a,a5451a,a5455a,a5456a,a5457a,a5460a,a5464a,a5465a,a5466a,a5469a,a5473a,a5474a,a5475a,a5478a,a5482a,a5483a,a5484a,a5487a,a5491a,a5492a,a5493a,a5496a,a5500a,a5501a,a5502a,a5505a,a5509a,a5510a,a5511a,a5514a,a5518a,a5519a,a5520a,a5523a,a5527a,a5528a,a5529a,a5532a,a5536a,a5537a,a5538a,a5541a,a5545a,a5546a,a5547a,a5550a,a5554a,a5555a,a5556a,a5559a,a5563a,a5564a,a5565a,a5568a,a5572a,a5573a,a5574a,a5577a,a5581a,a5582a,a5583a,a5586a,a5590a,a5591a,a5592a,a5595a,a5599a,a5600a,a5601a,a5604a,a5608a,a5609a,a5610a,a5613a,a5617a,a5618a,a5619a,a5622a,a5626a,a5627a,a5628a,a5631a,a5635a,a5636a,a5637a,a5640a,a5644a,a5645a,a5646a,a5649a,a5653a,a5654a,a5655a,a5658a,a5662a,a5663a,a5664a,a5667a,a5671a,a5672a,a5673a,a5676a,a5680a,a5681a,a5682a,a5685a,a5689a,a5690a,a5691a,a5694a,a5698a,a5699a,a5700a,a5703a,a5707a,a5708a,a5709a,a5712a,a5716a,a5717a,a5718a,a5721a,a5725a,a5726a,a5727a,a5730a,a5734a,a5735a,a5736a,a5739a,a5743a,a5744a,a5745a,a5748a,a5752a,a5753a,a5754a,a5757a,a5761a,a5762a,a5763a,a5766a,a5770a,a5771a,a5772a,a5775a,a5779a,a5780a,a5781a,a5784a,a5788a,a5789a,a5790a,a5793a,a5797a,a5798a,a5799a,a5802a,a5806a,a5807a,a5808a,a5811a,a5815a,a5816a,a5817a,a5820a,a5824a,a5825a,a5826a,a5829a,a5833a,a5834a,a5835a,a5838a,a5842a,a5843a,a5844a,a5847a,a5851a,a5852a,a5853a,a5856a,a5860a,a5861a,a5862a,a5865a,a5869a,a5870a,a5871a,a5874a,a5878a,a5879a,a5880a,a5883a,a5887a,a5888a,a5889a,a5892a,a5896a,a5897a,a5898a,a5901a,a5905a,a5906a,a5907a,a5910a,a5914a,a5915a,a5916a,a5919a,a5923a,a5924a,a5925a,a5928a,a5932a,a5933a,a5934a,a5937a,a5941a,a5942a,a5943a,a5946a,a5950a,a5951a,a5952a,a5955a,a5959a,a5960a,a5961a,a5964a,a5968a,a5969a,a5970a,a5973a,a5977a,a5978a,a5979a,a5982a,a5986a,a5987a,a5988a,a5991a,a5995a,a5996a,a5997a,a6000a,a6004a,a6005a,a6006a,a6009a,a6013a,a6014a,a6015a,a6018a,a6022a,a6023a,a6024a,a6027a,a6031a,a6032a,a6033a,a6036a,a6040a,a6041a,a6042a,a6045a,a6049a,a6050a,a6051a,a6054a,a6058a,a6059a,a6060a,a6063a,a6067a,a6068a,a6069a,a6072a,a6076a,a6077a,a6078a,a6081a,a6085a,a6086a,a6087a,a6090a,a6094a,a6095a,a6096a,a6099a,a6103a,a6104a,a6105a,a6108a,a6112a,a6113a,a6114a,a6117a,a6121a,a6122a,a6123a,a6126a,a6130a,a6131a,a6132a,a6135a,a6139a,a6140a,a6141a,a6144a,a6148a,a6149a,a6150a,a6153a,a6157a,a6158a,a6159a,a6162a,a6166a,a6167a,a6168a,a6171a,a6175a,a6176a,a6177a,a6180a,a6184a,a6185a,a6186a,a6189a,a6193a,a6194a,a6195a,a6198a,a6202a,a6203a,a6204a,a6207a,a6211a,a6212a,a6213a,a6216a,a6220a,a6221a,a6222a,a6225a,a6229a,a6230a,a6231a,a6234a,a6238a,a6239a,a6240a,a6243a,a6247a,a6248a,a6249a,a6252a,a6256a,a6257a,a6258a,a6261a,a6265a,a6266a,a6267a,a6270a,a6274a,a6275a,a6276a,a6279a,a6283a,a6284a,a6285a,a6288a,a6292a,a6293a,a6294a,a6297a,a6301a,a6302a,a6303a,a6306a,a6310a,a6311a,a6312a,a6315a,a6319a,a6320a,a6321a,a6324a,a6328a,a6329a,a6330a,a6333a,a6337a,a6338a,a6339a,a6342a,a6346a,a6347a,a6348a,a6351a,a6355a,a6356a,a6357a,a6360a,a6364a,a6365a,a6366a,a6369a,a6373a,a6374a,a6375a,a6378a,a6382a,a6383a,a6384a,a6387a,a6391a,a6392a,a6393a,a6396a,a6400a,a6401a,a6402a,a6405a,a6409a,a6410a,a6411a,a6414a,a6418a,a6419a,a6420a,a6423a,a6427a,a6428a,a6429a,a6432a,a6436a,a6437a,a6438a,a6441a,a6445a,a6446a,a6447a,a6450a,a6454a,a6455a,a6456a,a6459a,a6463a,a6464a,a6465a,a6468a,a6472a,a6473a,a6474a,a6477a,a6481a,a6482a,a6483a,a6486a,a6490a,a6491a,a6492a,a6495a,a6499a,a6500a,a6501a,a6504a,a6508a,a6509a,a6510a,a6513a,a6517a,a6518a,a6519a,a6522a,a6526a,a6527a,a6528a,a6531a,a6535a,a6536a,a6537a,a6540a,a6544a,a6545a,a6546a,a6549a,a6553a,a6554a,a6555a,a6558a,a6562a,a6563a,a6564a,a6567a,a6571a,a6572a,a6573a,a6576a,a6580a,a6581a,a6582a,a6585a,a6589a,a6590a,a6591a,a6594a,a6598a,a6599a,a6600a,a6603a,a6607a,a6608a,a6609a,a6612a,a6616a,a6617a,a6618a,a6621a,a6625a,a6626a,a6627a,a6630a,a6634a,a6635a,a6636a,a6639a,a6643a,a6644a,a6645a,a6648a,a6652a,a6653a,a6654a,a6657a,a6661a,a6662a,a6663a,a6666a,a6670a,a6671a,a6672a,a6675a,a6679a,a6680a,a6681a,a6684a,a6688a,a6689a,a6690a,a6693a,a6697a,a6698a,a6699a,a6702a,a6706a,a6707a,a6708a,a6711a,a6715a,a6716a,a6717a,a6720a,a6724a,a6725a,a6726a,a6729a,a6733a,a6734a,a6735a,a6738a,a6742a,a6743a,a6744a,a6747a,a6751a,a6752a,a6753a,a6756a,a6760a,a6761a,a6762a,a6765a,a6769a,a6770a,a6771a,a6774a,a6778a,a6779a,a6780a,a6783a,a6787a,a6788a,a6789a,a6792a,a6796a,a6797a,a6798a,a6801a,a6805a,a6806a,a6807a,a6810a,a6814a,a6815a,a6816a,a6819a,a6823a,a6824a,a6825a,a6828a,a6832a,a6833a,a6834a,a6837a,a6841a,a6842a,a6843a,a6846a,a6850a,a6851a,a6852a,a6855a,a6859a,a6860a,a6861a,a6864a,a6868a,a6869a,a6870a,a6873a,a6877a,a6878a,a6879a,a6882a,a6886a,a6887a,a6888a,a6891a,a6895a,a6896a,a6897a,a6900a,a6904a,a6905a,a6906a,a6909a,a6913a,a6914a,a6915a,a6918a,a6922a,a6923a,a6924a,a6927a,a6931a,a6932a,a6933a,a6936a,a6940a,a6941a,a6942a,a6945a,a6949a,a6950a,a6951a,a6954a,a6958a,a6959a,a6960a,a6963a,a6967a,a6968a,a6969a,a6972a,a6976a,a6977a,a6978a,a6981a,a6985a,a6986a,a6987a,a6990a,a6994a,a6995a,a6996a,a6999a,a7003a,a7004a,a7005a,a7008a,a7012a,a7013a,a7014a,a7017a,a7021a,a7022a,a7023a,a7026a,a7030a,a7031a,a7032a,a7035a,a7039a,a7040a,a7041a,a7044a,a7048a,a7049a,a7050a,a7053a,a7057a,a7058a,a7059a,a7062a,a7066a,a7067a,a7068a,a7071a,a7075a,a7076a,a7077a,a7080a,a7084a,a7085a,a7086a,a7089a,a7093a,a7094a,a7095a,a7098a,a7102a,a7103a,a7104a,a7107a,a7111a,a7112a,a7113a,a7116a,a7120a,a7121a,a7122a,a7125a,a7129a,a7130a,a7131a,a7134a,a7138a,a7139a,a7140a,a7143a,a7147a,a7148a,a7149a,a7152a,a7156a,a7157a,a7158a,a7161a,a7165a,a7166a,a7167a,a7170a,a7174a,a7175a,a7176a,a7179a,a7183a,a7184a,a7185a,a7188a,a7192a,a7193a,a7194a,a7197a,a7201a,a7202a,a7203a,a7206a,a7210a,a7211a,a7212a,a7215a,a7219a,a7220a,a7221a,a7224a,a7228a,a7229a,a7230a,a7233a,a7237a,a7238a,a7239a,a7242a,a7246a,a7247a,a7248a,a7251a,a7255a,a7256a,a7257a,a7260a,a7264a,a7265a,a7266a,a7269a,a7273a,a7274a,a7275a,a7278a,a7282a,a7283a,a7284a,a7287a,a7291a,a7292a,a7293a,a7296a,a7300a,a7301a,a7302a,a7305a,a7309a,a7310a,a7311a,a7314a,a7318a,a7319a,a7320a,a7323a,a7327a,a7328a,a7329a,a7332a,a7336a,a7337a,a7338a,a7341a,a7345a,a7346a,a7347a,a7350a,a7354a,a7355a,a7356a,a7359a,a7363a,a7364a,a7365a,a7368a,a7372a,a7373a,a7374a,a7377a,a7381a,a7382a,a7383a,a7386a,a7390a,a7391a,a7392a,a7395a,a7399a,a7400a,a7401a,a7404a,a7408a,a7409a,a7410a,a7413a,a7417a,a7418a,a7419a,a7422a,a7426a,a7427a,a7428a,a7431a,a7435a,a7436a,a7437a,a7440a,a7444a,a7445a,a7446a,a7449a,a7453a,a7454a,a7455a,a7458a,a7462a,a7463a,a7464a,a7467a,a7471a,a7472a,a7473a,a7476a,a7480a,a7481a,a7482a,a7485a,a7489a,a7490a,a7491a,a7494a,a7498a,a7499a,a7500a,a7503a,a7507a,a7508a,a7509a,a7512a,a7516a,a7517a,a7518a,a7521a,a7525a,a7526a,a7527a,a7530a,a7534a,a7535a,a7536a,a7539a,a7543a,a7544a,a7545a,a7548a,a7552a,a7553a,a7554a,a7557a,a7561a,a7562a,a7563a,a7566a,a7570a,a7571a,a7572a,a7575a,a7579a,a7580a,a7581a,a7584a,a7588a,a7589a,a7590a,a7593a,a7597a,a7598a,a7599a,a7602a,a7606a,a7607a,a7608a,a7611a,a7615a,a7616a,a7617a,a7620a,a7624a,a7625a,a7626a,a7629a,a7633a,a7634a,a7635a,a7638a,a7642a,a7643a,a7644a,a7647a,a7651a,a7652a,a7653a,a7656a,a7660a,a7661a,a7662a,a7665a,a7669a,a7670a,a7671a,a7674a,a7678a,a7679a,a7680a,a7683a,a7687a,a7688a,a7689a,a7692a,a7696a,a7697a,a7698a,a7701a,a7705a,a7706a,a7707a,a7710a,a7714a,a7715a,a7716a,a7719a,a7723a,a7724a,a7725a,a7728a,a7732a,a7733a,a7734a,a7737a,a7741a,a7742a,a7743a,a7746a,a7750a,a7751a,a7752a,a7755a,a7759a,a7760a,a7761a,a7764a,a7768a,a7769a,a7770a,a7773a,a7777a,a7778a,a7779a,a7782a,a7786a,a7787a,a7788a,a7791a,a7795a,a7796a,a7797a,a7800a,a7804a,a7805a,a7806a,a7809a,a7813a,a7814a,a7815a,a7818a,a7822a,a7823a,a7824a,a7827a,a7831a,a7832a,a7833a,a7836a,a7840a,a7841a,a7842a,a7845a,a7849a,a7850a,a7851a,a7854a,a7858a,a7859a,a7860a,a7863a,a7867a,a7868a,a7869a,a7872a,a7876a,a7877a,a7878a,a7881a,a7885a,a7886a,a7887a,a7890a,a7894a,a7895a,a7896a,a7899a,a7903a,a7904a,a7905a,a7908a,a7912a,a7913a,a7914a,a7917a,a7921a,a7922a,a7923a,a7926a,a7930a,a7931a,a7932a,a7935a,a7939a,a7940a,a7941a,a7944a,a7948a,a7949a,a7950a,a7953a,a7957a,a7958a,a7959a,a7962a,a7966a,a7967a,a7968a,a7971a,a7975a,a7976a,a7977a,a7980a,a7984a,a7985a,a7986a,a7989a,a7993a,a7994a,a7995a,a7998a,a8002a,a8003a,a8004a,a8007a,a8011a,a8012a,a8013a,a8016a,a8020a,a8021a,a8022a,a8025a,a8029a,a8030a,a8031a,a8034a,a8038a,a8039a,a8040a,a8043a,a8047a,a8048a,a8049a,a8052a,a8056a,a8057a,a8058a,a8061a,a8065a,a8066a,a8067a,a8070a,a8074a,a8075a,a8076a,a8079a,a8083a,a8084a,a8085a,a8088a,a8092a,a8093a,a8094a,a8097a,a8101a,a8102a,a8103a,a8106a,a8110a,a8111a,a8112a,a8115a,a8119a,a8120a,a8121a,a8124a,a8128a,a8129a,a8130a,a8134a,a8135a,a8139a,a8140a,a8141a,a8144a,a8148a,a8149a,a8150a,a8154a,a8155a,a8159a,a8160a,a8161a,a8164a,a8168a,a8169a,a8170a,a8174a,a8175a,a8179a,a8180a,a8181a,a8184a,a8188a,a8189a,a8190a,a8194a,a8195a,a8199a,a8200a,a8201a,a8204a,a8208a,a8209a,a8210a,a8214a,a8215a,a8219a,a8220a,a8221a,a8224a,a8228a,a8229a,a8230a,a8234a,a8235a,a8239a,a8240a,a8241a,a8244a,a8248a,a8249a,a8250a,a8254a,a8255a,a8259a,a8260a,a8261a,a8264a,a8268a,a8269a,a8270a,a8274a,a8275a,a8279a,a8280a,a8281a,a8284a,a8288a,a8289a,a8290a,a8294a,a8295a,a8299a,a8300a,a8301a,a8304a,a8308a,a8309a,a8310a,a8314a,a8315a,a8319a,a8320a,a8321a,a8324a,a8328a,a8329a,a8330a,a8334a,a8335a,a8339a,a8340a,a8341a,a8344a,a8348a,a8349a,a8350a,a8354a,a8355a,a8359a,a8360a,a8361a,a8364a,a8368a,a8369a,a8370a,a8374a,a8375a,a8379a,a8380a,a8381a,a8384a,a8388a,a8389a,a8390a,a8394a,a8395a,a8399a,a8400a,a8401a,a8404a,a8408a,a8409a,a8410a,a8414a,a8415a,a8419a,a8420a,a8421a,a8424a,a8428a,a8429a,a8430a,a8434a,a8435a,a8439a,a8440a,a8441a,a8444a,a8448a,a8449a,a8450a,a8454a,a8455a,a8459a,a8460a,a8461a,a8464a,a8468a,a8469a,a8470a,a8474a,a8475a,a8479a,a8480a,a8481a,a8484a,a8488a,a8489a,a8490a,a8494a,a8495a,a8499a,a8500a,a8501a,a8504a,a8508a,a8509a,a8510a,a8514a,a8515a,a8519a,a8520a,a8521a,a8524a,a8528a,a8529a,a8530a,a8534a,a8535a,a8539a,a8540a,a8541a,a8544a,a8548a,a8549a,a8550a,a8554a,a8555a,a8559a,a8560a,a8561a,a8564a,a8568a,a8569a,a8570a,a8574a,a8575a,a8579a,a8580a,a8581a,a8584a,a8588a,a8589a,a8590a,a8594a,a8595a,a8599a,a8600a,a8601a,a8604a,a8608a,a8609a,a8610a,a8614a,a8615a,a8619a,a8620a,a8621a,a8624a,a8628a,a8629a,a8630a,a8634a,a8635a,a8639a,a8640a,a8641a,a8644a,a8648a,a8649a,a8650a,a8654a,a8655a,a8659a,a8660a,a8661a,a8664a,a8668a,a8669a,a8670a,a8674a,a8675a,a8679a,a8680a,a8681a,a8684a,a8688a,a8689a,a8690a,a8694a,a8695a,a8699a,a8700a,a8701a,a8704a,a8708a,a8709a,a8710a,a8714a,a8715a,a8719a,a8720a,a8721a,a8724a,a8728a,a8729a,a8730a,a8734a,a8735a,a8739a,a8740a,a8741a,a8744a,a8748a,a8749a,a8750a,a8754a,a8755a,a8759a,a8760a,a8761a,a8764a,a8768a,a8769a,a8770a,a8774a,a8775a,a8779a,a8780a,a8781a,a8784a,a8788a,a8789a,a8790a,a8794a,a8795a,a8799a,a8800a,a8801a,a8804a,a8808a,a8809a,a8810a,a8814a,a8815a,a8819a,a8820a,a8821a,a8824a,a8828a,a8829a,a8830a,a8834a,a8835a,a8839a,a8840a,a8841a,a8844a,a8848a,a8849a,a8850a,a8854a,a8855a,a8859a,a8860a,a8861a,a8864a,a8868a,a8869a,a8870a,a8874a,a8875a,a8879a,a8880a,a8881a,a8884a,a8888a,a8889a,a8890a,a8894a,a8895a,a8899a,a8900a,a8901a,a8904a,a8908a,a8909a,a8910a,a8914a,a8915a,a8919a,a8920a,a8921a,a8924a,a8928a,a8929a,a8930a,a8934a,a8935a,a8939a,a8940a,a8941a,a8944a,a8948a,a8949a,a8950a,a8954a,a8955a,a8959a,a8960a,a8961a,a8964a,a8968a,a8969a,a8970a,a8974a,a8975a,a8979a,a8980a,a8981a,a8984a,a8988a,a8989a,a8990a,a8994a,a8995a,a8999a,a9000a,a9001a,a9004a,a9008a,a9009a,a9010a,a9014a,a9015a,a9019a,a9020a,a9021a,a9024a,a9028a,a9029a,a9030a,a9034a,a9035a,a9039a,a9040a,a9041a,a9044a,a9048a,a9049a,a9050a,a9054a,a9055a,a9059a,a9060a,a9061a,a9064a,a9068a,a9069a,a9070a,a9074a,a9075a,a9079a,a9080a,a9081a,a9084a,a9088a,a9089a,a9090a,a9094a,a9095a,a9099a,a9100a,a9101a,a9104a,a9108a,a9109a,a9110a,a9114a,a9115a,a9119a,a9120a,a9121a,a9124a,a9128a,a9129a,a9130a,a9134a,a9135a,a9139a,a9140a,a9141a,a9144a,a9148a,a9149a,a9150a,a9154a,a9155a,a9159a,a9160a,a9161a,a9164a,a9168a,a9169a,a9170a,a9174a,a9175a,a9179a,a9180a,a9181a,a9184a,a9188a,a9189a,a9190a,a9194a,a9195a,a9199a,a9200a,a9201a,a9204a,a9208a,a9209a,a9210a,a9214a,a9215a,a9219a,a9220a,a9221a,a9224a,a9228a,a9229a,a9230a,a9234a,a9235a,a9239a,a9240a,a9241a,a9244a,a9248a,a9249a,a9250a,a9254a,a9255a,a9259a,a9260a,a9261a,a9264a,a9268a,a9269a,a9270a,a9274a,a9275a,a9279a,a9280a,a9281a,a9284a,a9288a,a9289a,a9290a,a9294a,a9295a,a9299a,a9300a,a9301a,a9304a,a9308a,a9309a,a9310a,a9314a,a9315a,a9319a,a9320a,a9321a,a9324a,a9328a,a9329a,a9330a,a9334a,a9335a,a9339a,a9340a,a9341a,a9344a,a9348a,a9349a,a9350a,a9354a,a9355a,a9359a,a9360a,a9361a,a9364a,a9368a,a9369a,a9370a,a9374a,a9375a,a9379a,a9380a,a9381a,a9384a,a9388a,a9389a,a9390a,a9394a,a9395a,a9399a,a9400a,a9401a,a9404a,a9408a,a9409a,a9410a,a9414a,a9415a,a9419a,a9420a,a9421a,a9424a,a9428a,a9429a,a9430a,a9434a,a9435a,a9439a,a9440a,a9441a,a9444a,a9448a,a9449a,a9450a,a9454a,a9455a,a9459a,a9460a,a9461a,a9464a,a9468a,a9469a,a9470a,a9474a,a9475a,a9479a,a9480a,a9481a,a9484a,a9488a,a9489a,a9490a,a9494a,a9495a,a9499a,a9500a,a9501a,a9504a,a9508a,a9509a,a9510a,a9514a,a9515a,a9519a,a9520a,a9521a,a9524a,a9528a,a9529a,a9530a,a9534a,a9535a,a9539a,a9540a,a9541a,a9544a,a9548a,a9549a,a9550a,a9554a,a9555a,a9559a,a9560a,a9561a,a9564a,a9568a,a9569a,a9570a,a9574a,a9575a,a9579a,a9580a,a9581a,a9584a,a9588a,a9589a,a9590a,a9594a,a9595a,a9599a,a9600a,a9601a,a9604a,a9608a,a9609a,a9610a,a9614a,a9615a,a9619a,a9620a,a9621a,a9624a,a9628a,a9629a,a9630a,a9634a,a9635a,a9639a,a9640a,a9641a,a9644a,a9648a,a9649a,a9650a,a9654a,a9655a,a9659a,a9660a,a9661a,a9664a,a9668a,a9669a,a9670a,a9674a,a9675a,a9679a,a9680a,a9681a,a9684a,a9688a,a9689a,a9690a,a9694a,a9695a,a9699a,a9700a,a9701a,a9704a,a9708a,a9709a,a9710a,a9714a,a9715a,a9719a,a9720a,a9721a,a9724a,a9728a,a9729a,a9730a,a9734a,a9735a,a9739a,a9740a,a9741a,a9744a,a9748a,a9749a,a9750a,a9754a,a9755a,a9759a,a9760a,a9761a,a9764a,a9768a,a9769a,a9770a,a9774a,a9775a,a9779a,a9780a,a9781a,a9784a,a9788a,a9789a,a9790a,a9794a,a9795a,a9799a,a9800a,a9801a,a9804a,a9808a,a9809a,a9810a,a9814a,a9815a,a9819a,a9820a,a9821a,a9824a,a9828a,a9829a,a9830a,a9834a,a9835a,a9839a,a9840a,a9841a,a9844a,a9848a,a9849a,a9850a,a9854a,a9855a,a9859a,a9860a,a9861a,a9864a,a9868a,a9869a,a9870a,a9874a,a9875a,a9879a,a9880a,a9881a,a9884a,a9888a,a9889a,a9890a,a9894a,a9895a,a9899a,a9900a,a9901a,a9904a,a9908a,a9909a,a9910a,a9914a,a9915a,a9919a,a9920a,a9921a,a9924a,a9928a,a9929a,a9930a,a9934a,a9935a,a9939a,a9940a,a9941a,a9944a,a9948a,a9949a,a9950a,a9954a,a9955a,a9959a,a9960a,a9961a,a9964a,a9968a,a9969a,a9970a,a9974a,a9975a,a9979a,a9980a,a9981a,a9984a,a9988a,a9989a,a9990a,a9994a,a9995a,a9999a,a10000a,a10001a,a10004a,a10008a,a10009a,a10010a,a10014a,a10015a,a10019a,a10020a,a10021a,a10024a,a10028a,a10029a,a10030a,a10034a,a10035a,a10039a,a10040a,a10041a,a10044a,a10048a,a10049a,a10050a,a10054a,a10055a,a10059a,a10060a,a10061a,a10064a,a10068a,a10069a,a10070a,a10074a,a10075a,a10079a,a10080a,a10081a,a10084a,a10088a,a10089a,a10090a,a10094a,a10095a,a10099a,a10100a,a10101a,a10104a,a10108a,a10109a,a10110a,a10114a,a10115a,a10119a,a10120a,a10121a,a10124a,a10128a,a10129a,a10130a,a10134a,a10135a,a10139a,a10140a,a10141a,a10144a,a10148a,a10149a,a10150a,a10154a,a10155a,a10159a,a10160a,a10161a,a10164a,a10168a,a10169a,a10170a,a10174a,a10175a,a10179a,a10180a,a10181a,a10184a,a10188a,a10189a,a10190a,a10194a,a10195a,a10199a,a10200a,a10201a,a10204a,a10208a,a10209a,a10210a,a10214a,a10215a,a10219a,a10220a,a10221a,a10224a,a10228a,a10229a,a10230a,a10234a,a10235a,a10239a,a10240a,a10241a,a10244a,a10248a,a10249a,a10250a,a10254a,a10255a,a10259a,a10260a,a10261a,a10264a,a10268a,a10269a,a10270a,a10274a,a10275a,a10279a,a10280a,a10281a,a10284a,a10288a,a10289a,a10290a,a10294a,a10295a,a10299a,a10300a,a10301a,a10304a,a10308a,a10309a,a10310a,a10314a,a10315a,a10319a,a10320a,a10321a,a10324a,a10328a,a10329a,a10330a,a10334a,a10335a,a10339a,a10340a,a10341a,a10344a,a10348a,a10349a,a10350a,a10354a,a10355a,a10359a,a10360a,a10361a,a10364a,a10368a,a10369a,a10370a,a10374a,a10375a,a10379a,a10380a,a10381a,a10384a,a10388a,a10389a,a10390a,a10394a,a10395a,a10399a,a10400a,a10401a,a10404a,a10408a,a10409a,a10410a,a10414a,a10415a,a10419a,a10420a,a10421a,a10424a,a10428a,a10429a,a10430a,a10434a,a10435a,a10439a,a10440a,a10441a,a10444a,a10448a,a10449a,a10450a,a10454a,a10455a,a10459a,a10460a,a10461a,a10464a,a10468a,a10469a,a10470a,a10474a,a10475a,a10479a,a10480a,a10481a,a10484a,a10488a,a10489a,a10490a,a10494a,a10495a,a10499a,a10500a,a10501a,a10504a,a10508a,a10509a,a10510a,a10514a,a10515a,a10519a,a10520a,a10521a,a10524a,a10528a,a10529a,a10530a,a10534a,a10535a,a10539a,a10540a,a10541a,a10544a,a10548a,a10549a,a10550a,a10554a,a10555a,a10559a,a10560a,a10561a,a10564a,a10568a,a10569a,a10570a,a10574a,a10575a,a10579a,a10580a,a10581a,a10584a,a10588a,a10589a,a10590a,a10594a,a10595a,a10599a,a10600a,a10601a,a10604a,a10608a,a10609a,a10610a,a10614a,a10615a,a10619a,a10620a,a10621a,a10624a,a10628a,a10629a,a10630a,a10634a,a10635a,a10639a,a10640a,a10641a,a10644a,a10648a,a10649a,a10650a,a10654a,a10655a,a10659a,a10660a,a10661a,a10664a,a10668a,a10669a,a10670a,a10674a,a10675a,a10679a,a10680a,a10681a,a10684a,a10688a,a10689a,a10690a,a10694a,a10695a,a10699a,a10700a,a10701a,a10704a,a10708a,a10709a,a10710a,a10714a,a10715a,a10719a,a10720a,a10721a,a10724a,a10728a,a10729a,a10730a,a10734a,a10735a,a10739a,a10740a,a10741a,a10744a,a10748a,a10749a,a10750a,a10754a,a10755a,a10759a,a10760a,a10761a,a10764a,a10768a,a10769a,a10770a,a10774a,a10775a,a10779a,a10780a,a10781a,a10784a,a10788a,a10789a,a10790a,a10794a,a10795a,a10799a,a10800a,a10801a,a10804a,a10808a,a10809a,a10810a,a10814a,a10815a,a10819a,a10820a,a10821a,a10824a,a10828a,a10829a,a10830a,a10834a,a10835a,a10839a,a10840a,a10841a,a10844a,a10848a,a10849a,a10850a,a10854a,a10855a,a10859a,a10860a,a10861a,a10864a,a10868a,a10869a,a10870a,a10874a,a10875a,a10879a,a10880a,a10881a,a10884a,a10888a,a10889a,a10890a,a10894a,a10895a,a10899a,a10900a,a10901a,a10904a,a10908a,a10909a,a10910a,a10914a,a10915a,a10919a,a10920a,a10921a,a10924a,a10928a,a10929a,a10930a,a10934a,a10935a,a10939a,a10940a,a10941a,a10944a,a10948a,a10949a,a10950a,a10954a,a10955a,a10959a,a10960a,a10961a,a10964a,a10968a,a10969a,a10970a,a10974a,a10975a,a10979a,a10980a,a10981a,a10984a,a10988a,a10989a,a10990a,a10994a,a10995a,a10999a,a11000a,a11001a,a11004a,a11008a,a11009a,a11010a,a11014a,a11015a,a11019a,a11020a,a11021a,a11024a,a11028a,a11029a,a11030a,a11034a,a11035a,a11039a,a11040a,a11041a,a11044a,a11048a,a11049a,a11050a,a11054a,a11055a,a11059a,a11060a,a11061a,a11064a,a11068a,a11069a,a11070a,a11074a,a11075a,a11079a,a11080a,a11081a,a11084a,a11088a,a11089a,a11090a,a11094a,a11095a,a11099a,a11100a,a11101a,a11104a,a11108a,a11109a,a11110a,a11114a,a11115a,a11119a,a11120a,a11121a,a11124a,a11128a,a11129a,a11130a,a11134a,a11135a,a11139a,a11140a,a11141a,a11144a,a11148a,a11149a,a11150a,a11154a,a11155a,a11159a,a11160a,a11161a,a11164a,a11168a,a11169a,a11170a,a11174a,a11175a,a11179a,a11180a,a11181a,a11184a,a11188a,a11189a,a11190a,a11194a,a11195a,a11199a,a11200a,a11201a,a11204a,a11208a,a11209a,a11210a,a11214a,a11215a,a11219a,a11220a,a11221a,a11224a,a11228a,a11229a,a11230a,a11234a,a11235a,a11239a,a11240a,a11241a,a11244a,a11248a,a11249a,a11250a,a11254a,a11255a,a11259a,a11260a,a11261a,a11264a,a11268a,a11269a,a11270a,a11274a,a11275a,a11279a,a11280a,a11281a,a11284a,a11288a,a11289a,a11290a,a11294a,a11295a,a11299a,a11300a,a11301a,a11304a,a11308a,a11309a,a11310a,a11314a,a11315a,a11319a,a11320a,a11321a,a11324a,a11328a,a11329a,a11330a,a11334a,a11335a,a11339a,a11340a,a11341a,a11344a,a11348a,a11349a,a11350a,a11354a,a11355a,a11359a,a11360a,a11361a,a11364a,a11368a,a11369a,a11370a,a11374a,a11375a,a11379a,a11380a,a11381a,a11384a,a11388a,a11389a,a11390a,a11394a,a11395a,a11399a,a11400a,a11401a,a11404a,a11408a,a11409a,a11410a,a11414a,a11415a,a11419a,a11420a,a11421a,a11424a,a11428a,a11429a,a11430a,a11434a,a11435a,a11439a,a11440a,a11441a,a11444a,a11448a,a11449a,a11450a,a11454a,a11455a,a11459a,a11460a,a11461a,a11464a,a11468a,a11469a,a11470a,a11474a,a11475a,a11479a,a11480a,a11481a,a11484a,a11488a,a11489a,a11490a,a11494a,a11495a,a11499a,a11500a,a11501a,a11504a,a11508a,a11509a,a11510a,a11514a,a11515a,a11519a,a11520a,a11521a,a11524a,a11528a,a11529a,a11530a,a11534a,a11535a,a11539a,a11540a,a11541a,a11544a,a11548a,a11549a,a11550a,a11554a,a11555a,a11559a,a11560a,a11561a,a11564a,a11568a,a11569a,a11570a,a11574a,a11575a,a11579a,a11580a,a11581a,a11584a,a11588a,a11589a,a11590a,a11594a,a11595a,a11599a,a11600a,a11601a,a11604a,a11608a,a11609a,a11610a,a11614a,a11615a,a11619a,a11620a,a11621a,a11624a,a11628a,a11629a,a11630a,a11634a,a11635a,a11639a,a11640a,a11641a,a11644a,a11648a,a11649a,a11650a,a11654a,a11655a,a11659a,a11660a,a11661a,a11664a,a11668a,a11669a,a11670a,a11674a,a11675a,a11679a,a11680a,a11681a,a11684a,a11688a,a11689a,a11690a,a11694a,a11695a,a11699a,a11700a,a11701a,a11704a,a11708a,a11709a,a11710a,a11714a,a11715a,a11719a,a11720a,a11721a,a11724a,a11728a,a11729a,a11730a,a11734a,a11735a,a11739a,a11740a,a11741a,a11744a,a11748a,a11749a,a11750a,a11754a,a11755a,a11759a,a11760a,a11761a,a11764a,a11768a,a11769a,a11770a,a11774a,a11775a,a11779a,a11780a,a11781a,a11784a,a11788a,a11789a,a11790a,a11794a,a11795a,a11799a,a11800a,a11801a,a11804a,a11808a,a11809a,a11810a,a11814a,a11815a,a11819a,a11820a,a11821a,a11824a,a11828a,a11829a,a11830a,a11834a,a11835a,a11839a,a11840a,a11841a,a11844a,a11848a,a11849a,a11850a,a11854a,a11855a,a11859a,a11860a,a11861a,a11864a,a11868a,a11869a,a11870a,a11874a,a11875a,a11879a,a11880a,a11881a,a11884a,a11888a,a11889a,a11890a,a11894a,a11895a,a11899a,a11900a,a11901a,a11904a,a11908a,a11909a,a11910a,a11914a,a11915a,a11919a,a11920a,a11921a,a11924a,a11928a,a11929a,a11930a,a11934a,a11935a,a11939a,a11940a,a11941a,a11944a,a11948a,a11949a,a11950a,a11954a,a11955a,a11959a,a11960a,a11961a,a11964a,a11968a,a11969a,a11970a,a11974a,a11975a,a11979a,a11980a,a11981a,a11984a,a11988a,a11989a,a11990a,a11994a,a11995a,a11999a,a12000a,a12001a,a12004a,a12008a,a12009a,a12010a,a12014a,a12015a,a12019a,a12020a,a12021a,a12024a,a12028a,a12029a,a12030a,a12034a,a12035a,a12039a,a12040a,a12041a,a12044a,a12048a,a12049a,a12050a,a12054a,a12055a,a12059a,a12060a,a12061a,a12064a,a12068a,a12069a,a12070a,a12074a,a12075a,a12079a,a12080a,a12081a,a12084a,a12088a,a12089a,a12090a,a12094a,a12095a,a12099a,a12100a,a12101a,a12104a,a12108a,a12109a,a12110a,a12114a,a12115a,a12119a,a12120a,a12121a,a12124a,a12128a,a12129a,a12130a,a12134a,a12135a,a12139a,a12140a,a12141a,a12144a,a12148a,a12149a,a12150a,a12154a,a12155a,a12159a,a12160a,a12161a,a12164a,a12168a,a12169a,a12170a,a12174a,a12175a,a12179a,a12180a,a12181a,a12184a,a12188a,a12189a,a12190a,a12194a,a12195a,a12199a,a12200a,a12201a,a12204a,a12208a,a12209a,a12210a,a12214a,a12215a,a12219a,a12220a,a12221a,a12225a,a12226a,a12230a,a12231a,a12232a,a12236a,a12237a,a12241a,a12242a,a12243a,a12247a,a12248a,a12252a,a12253a,a12254a,a12258a,a12259a,a12263a,a12264a,a12265a,a12269a,a12270a,a12274a,a12275a,a12276a,a12280a,a12281a,a12285a,a12286a,a12287a,a12291a,a12292a,a12296a,a12297a,a12298a,a12302a,a12303a,a12307a,a12308a,a12309a,a12313a,a12314a,a12318a,a12319a,a12320a,a12324a,a12325a,a12329a,a12330a,a12331a,a12335a,a12336a,a12340a,a12341a,a12342a,a12346a,a12347a,a12351a,a12352a,a12353a,a12357a,a12358a,a12362a,a12363a,a12364a,a12368a,a12369a,a12373a,a12374a,a12375a,a12379a,a12380a,a12384a,a12385a,a12386a,a12390a,a12391a,a12395a,a12396a,a12397a,a12401a,a12402a,a12406a,a12407a,a12408a,a12412a,a12413a,a12417a,a12418a,a12419a,a12423a,a12424a,a12428a,a12429a,a12430a,a12434a,a12435a,a12439a,a12440a,a12441a,a12445a,a12446a,a12450a,a12451a,a12452a,a12456a,a12457a,a12461a,a12462a,a12463a,a12467a,a12468a,a12472a,a12473a,a12474a,a12478a,a12479a,a12483a,a12484a,a12485a,a12489a,a12490a,a12494a,a12495a,a12496a,a12500a,a12501a,a12505a,a12506a,a12507a,a12511a,a12512a,a12516a,a12517a,a12518a,a12522a,a12523a,a12527a,a12528a,a12529a,a12533a,a12534a,a12538a,a12539a,a12540a,a12544a,a12545a,a12549a,a12550a,a12551a,a12555a,a12556a,a12560a,a12561a,a12562a,a12566a,a12567a,a12571a,a12572a,a12573a,a12577a,a12578a,a12582a,a12583a,a12584a,a12588a,a12589a,a12593a,a12594a,a12595a,a12599a,a12600a,a12604a,a12605a,a12606a,a12610a,a12611a,a12615a,a12616a,a12617a,a12621a,a12622a,a12626a,a12627a,a12628a,a12632a,a12633a,a12637a,a12638a,a12639a,a12643a,a12644a,a12648a,a12649a,a12650a,a12654a,a12655a,a12659a,a12660a,a12661a,a12665a,a12666a,a12670a,a12671a,a12672a,a12676a,a12677a,a12681a,a12682a,a12683a,a12687a,a12688a,a12692a,a12693a,a12694a,a12698a,a12699a,a12703a,a12704a,a12705a,a12709a,a12710a,a12714a,a12715a,a12716a,a12720a,a12721a,a12725a,a12726a,a12727a,a12731a,a12732a,a12736a,a12737a,a12738a,a12742a,a12743a,a12747a,a12748a,a12749a,a12753a,a12754a,a12758a,a12759a,a12760a,a12764a,a12765a,a12769a,a12770a,a12771a,a12775a,a12776a,a12780a,a12781a,a12782a,a12786a,a12787a,a12791a,a12792a,a12793a,a12797a,a12798a,a12802a,a12803a,a12804a,a12808a,a12809a,a12813a,a12814a,a12815a,a12819a,a12820a,a12824a,a12825a,a12826a,a12830a,a12831a,a12835a,a12836a,a12837a,a12841a,a12842a,a12846a,a12847a,a12848a,a12852a,a12853a,a12857a,a12858a,a12859a,a12863a,a12864a,a12868a,a12869a,a12870a,a12874a,a12875a,a12879a,a12880a,a12881a,a12885a,a12886a,a12890a,a12891a,a12892a,a12896a,a12897a,a12901a,a12902a,a12903a,a12907a,a12908a,a12912a,a12913a,a12914a,a12918a,a12919a,a12923a,a12924a,a12925a,a12929a,a12930a,a12934a,a12935a,a12936a,a12940a,a12941a,a12945a,a12946a,a12947a,a12951a,a12952a,a12956a,a12957a,a12958a,a12962a,a12963a,a12967a,a12968a,a12969a,a12973a,a12974a,a12978a,a12979a,a12980a,a12984a,a12985a,a12989a,a12990a,a12991a,a12995a,a12996a,a13000a,a13001a,a13002a,a13006a,a13007a,a13011a,a13012a,a13013a,a13017a,a13018a,a13022a,a13023a,a13024a,a13028a,a13029a,a13033a,a13034a,a13035a,a13039a,a13040a,a13044a,a13045a,a13046a,a13050a,a13051a,a13055a,a13056a,a13057a,a13061a,a13062a,a13066a,a13067a,a13068a,a13072a,a13073a,a13077a,a13078a,a13079a,a13083a,a13084a,a13088a,a13089a,a13090a,a13094a,a13095a,a13099a,a13100a,a13101a,a13105a,a13106a,a13110a,a13111a,a13112a,a13116a,a13117a,a13121a,a13122a,a13123a,a13127a,a13128a,a13132a,a13133a,a13134a,a13138a,a13139a,a13143a,a13144a,a13145a,a13149a,a13150a,a13154a,a13155a,a13156a,a13160a,a13161a,a13165a,a13166a,a13167a,a13171a,a13172a,a13176a,a13177a,a13178a,a13182a,a13183a,a13187a,a13188a,a13189a,a13193a,a13194a,a13198a,a13199a,a13200a,a13204a,a13205a,a13209a,a13210a,a13211a,a13215a,a13216a,a13220a,a13221a,a13222a,a13226a,a13227a,a13231a,a13232a,a13233a,a13237a,a13238a,a13242a,a13243a,a13244a,a13248a,a13249a,a13253a,a13254a,a13255a,a13259a,a13260a,a13264a,a13265a,a13266a,a13270a,a13271a,a13275a,a13276a,a13277a,a13281a,a13282a,a13286a,a13287a,a13288a,a13292a,a13293a,a13297a,a13298a,a13299a,a13303a,a13304a,a13308a,a13309a,a13310a,a13314a,a13315a,a13319a,a13320a,a13321a,a13325a,a13326a,a13330a,a13331a,a13332a,a13336a,a13337a,a13341a,a13342a,a13343a,a13347a,a13348a,a13352a,a13353a,a13354a,a13358a,a13359a,a13363a,a13364a,a13365a,a13369a,a13370a,a13374a,a13375a,a13376a,a13380a,a13381a,a13385a,a13386a,a13387a,a13391a,a13392a,a13396a,a13397a,a13398a,a13402a,a13403a,a13407a,a13408a,a13409a,a13413a,a13414a,a13418a,a13419a,a13420a,a13424a,a13425a,a13429a,a13430a,a13431a,a13435a,a13436a,a13440a,a13441a,a13442a,a13446a,a13447a,a13451a,a13452a,a13453a,a13457a,a13458a,a13462a,a13463a,a13464a,a13468a,a13469a,a13473a,a13474a,a13475a,a13479a,a13480a,a13484a,a13485a,a13486a,a13490a,a13491a,a13495a,a13496a,a13497a,a13501a,a13502a,a13506a,a13507a,a13508a,a13512a,a13513a,a13517a,a13518a,a13519a,a13523a,a13524a,a13528a,a13529a,a13530a,a13534a,a13535a,a13539a,a13540a,a13541a,a13545a,a13546a,a13550a,a13551a,a13552a,a13556a,a13557a,a13561a,a13562a,a13563a,a13567a,a13568a,a13572a,a13573a,a13574a,a13578a,a13579a,a13583a,a13584a,a13585a,a13589a,a13590a,a13594a,a13595a,a13596a,a13600a,a13601a,a13605a,a13606a,a13607a,a13611a,a13612a,a13616a,a13617a,a13618a,a13622a,a13623a,a13627a,a13628a,a13629a,a13633a,a13634a,a13638a,a13639a,a13640a,a13644a,a13645a,a13649a,a13650a,a13651a,a13655a,a13656a,a13660a,a13661a,a13662a,a13666a,a13667a,a13671a,a13672a,a13673a,a13677a,a13678a,a13682a,a13683a,a13684a,a13688a,a13689a,a13693a,a13694a,a13695a,a13699a,a13700a,a13704a,a13705a,a13706a,a13710a,a13711a,a13715a,a13716a,a13717a,a13721a,a13722a,a13726a,a13727a,a13728a,a13732a,a13733a,a13737a,a13738a,a13739a,a13743a,a13744a,a13748a,a13749a,a13750a,a13754a,a13755a,a13759a,a13760a,a13761a,a13765a,a13766a,a13770a,a13771a,a13772a,a13776a,a13777a,a13781a,a13782a,a13783a,a13787a,a13788a,a13792a,a13793a,a13794a,a13798a,a13799a,a13803a,a13804a,a13805a,a13809a,a13810a,a13814a,a13815a,a13816a,a13820a,a13821a,a13825a,a13826a,a13827a,a13831a,a13832a,a13836a,a13837a,a13838a,a13842a,a13843a,a13847a,a13848a,a13849a,a13853a,a13854a,a13858a,a13859a,a13860a,a13864a,a13865a,a13869a,a13870a,a13871a,a13875a,a13876a,a13880a,a13881a,a13882a,a13886a,a13887a,a13891a,a13892a,a13893a,a13897a,a13898a,a13902a,a13903a,a13904a,a13908a,a13909a,a13913a,a13914a,a13915a,a13919a,a13920a,a13924a,a13925a,a13926a,a13930a,a13931a,a13935a,a13936a,a13937a,a13941a,a13942a,a13946a,a13947a,a13948a,a13952a,a13953a,a13957a,a13958a,a13959a,a13963a,a13964a,a13968a,a13969a,a13970a,a13974a,a13975a,a13979a,a13980a,a13981a,a13985a,a13986a,a13990a,a13991a,a13992a,a13996a,a13997a,a14001a,a14002a,a14003a,a14007a,a14008a,a14012a,a14013a,a14014a,a14018a,a14019a,a14023a,a14024a,a14025a,a14029a,a14030a,a14034a,a14035a,a14036a,a14040a,a14041a,a14045a,a14046a,a14047a,a14051a,a14052a,a14056a,a14057a,a14058a,a14062a,a14063a,a14067a,a14068a,a14069a,a14073a,a14074a,a14078a,a14079a,a14080a,a14084a,a14085a,a14089a,a14090a,a14091a,a14095a,a14096a,a14100a,a14101a,a14102a,a14106a,a14107a,a14111a,a14112a,a14113a,a14117a,a14118a,a14122a,a14123a,a14124a,a14128a,a14129a,a14133a,a14134a,a14135a,a14139a,a14140a,a14144a,a14145a,a14146a,a14150a,a14151a,a14155a,a14156a,a14157a,a14161a,a14162a,a14166a,a14167a,a14168a,a14172a,a14173a,a14177a,a14178a,a14179a,a14183a,a14184a,a14188a,a14189a,a14190a,a14194a,a14195a,a14199a,a14200a,a14201a,a14205a,a14206a,a14210a,a14211a,a14212a,a14216a,a14217a,a14221a,a14222a,a14223a,a14227a,a14228a,a14232a,a14233a,a14234a,a14238a,a14239a,a14243a,a14244a,a14245a,a14249a,a14250a,a14254a,a14255a,a14256a,a14260a,a14261a,a14265a,a14266a,a14267a,a14271a,a14272a,a14276a,a14277a,a14278a,a14282a,a14283a,a14287a,a14288a,a14289a,a14293a,a14294a,a14298a,a14299a,a14300a,a14304a,a14305a,a14309a,a14310a,a14311a,a14315a,a14316a,a14320a,a14321a,a14322a,a14326a,a14327a,a14331a,a14332a,a14333a,a14337a,a14338a,a14342a,a14343a,a14344a,a14348a,a14349a,a14353a,a14354a,a14355a,a14359a,a14360a,a14364a,a14365a,a14366a,a14370a,a14371a,a14375a,a14376a,a14377a,a14381a,a14382a,a14386a,a14387a,a14388a,a14392a,a14393a,a14397a,a14398a,a14399a,a14403a,a14404a,a14408a,a14409a,a14410a,a14414a,a14415a,a14419a,a14420a,a14421a,a14425a,a14426a,a14430a,a14431a,a14432a,a14436a,a14437a,a14441a,a14442a,a14443a,a14447a,a14448a,a14452a,a14453a,a14454a,a14458a,a14459a,a14463a,a14464a,a14465a,a14469a,a14470a,a14474a,a14475a,a14476a,a14480a,a14481a,a14485a,a14486a,a14487a,a14491a,a14492a,a14496a,a14497a,a14498a,a14502a,a14503a,a14507a,a14508a,a14509a,a14513a,a14514a,a14518a,a14519a,a14520a,a14524a,a14525a,a14529a,a14530a,a14531a,a14535a,a14536a,a14540a,a14541a,a14542a,a14546a,a14547a,a14551a,a14552a,a14553a,a14557a,a14558a,a14562a,a14563a,a14564a,a14568a,a14569a,a14573a,a14574a,a14575a,a14579a,a14580a,a14584a,a14585a,a14586a,a14590a,a14591a,a14595a,a14596a,a14597a,a14601a,a14602a,a14606a,a14607a,a14608a,a14612a,a14613a,a14617a,a14618a,a14619a,a14623a,a14624a,a14628a,a14629a,a14630a,a14634a,a14635a,a14639a,a14640a,a14641a,a14645a,a14646a,a14650a,a14651a,a14652a,a14656a,a14657a,a14661a,a14662a,a14663a,a14667a,a14668a,a14672a,a14673a,a14674a,a14678a,a14679a,a14683a,a14684a,a14685a,a14689a,a14690a,a14694a,a14695a,a14696a,a14700a,a14701a,a14705a,a14706a,a14707a,a14711a,a14712a,a14716a,a14717a,a14718a,a14722a,a14723a,a14727a,a14728a,a14729a,a14733a,a14734a,a14738a,a14739a,a14740a,a14744a,a14745a,a14749a,a14750a,a14751a,a14755a,a14756a,a14760a,a14761a,a14762a,a14766a,a14767a,a14771a,a14772a,a14773a,a14777a,a14778a,a14782a,a14783a,a14784a,a14788a,a14789a,a14793a,a14794a,a14795a,a14799a,a14800a,a14804a,a14805a,a14806a,a14810a,a14811a,a14815a,a14816a,a14817a,a14821a,a14822a,a14826a,a14827a,a14828a,a14832a,a14833a,a14837a,a14838a,a14839a,a14843a,a14844a,a14848a,a14849a,a14850a,a14854a,a14855a,a14859a,a14860a,a14861a,a14865a,a14866a,a14870a,a14871a,a14872a,a14876a,a14877a,a14881a,a14882a,a14883a,a14887a,a14888a,a14892a,a14893a,a14894a,a14898a,a14899a,a14903a,a14904a,a14905a,a14909a,a14910a,a14914a,a14915a,a14916a,a14920a,a14921a,a14925a,a14926a,a14927a,a14931a,a14932a,a14936a,a14937a,a14938a,a14942a,a14943a,a14947a,a14948a,a14949a,a14953a,a14954a,a14958a,a14959a,a14960a,a14964a,a14965a,a14969a,a14970a,a14971a,a14975a,a14976a,a14980a,a14981a,a14982a,a14986a,a14987a,a14991a,a14992a,a14993a,a14997a,a14998a,a15002a,a15003a,a15004a,a15008a,a15009a,a15013a,a15014a,a15015a,a15019a,a15020a,a15024a,a15025a,a15026a,a15030a,a15031a,a15035a,a15036a,a15037a,a15041a,a15042a,a15046a,a15047a,a15048a,a15052a,a15053a,a15057a,a15058a,a15059a,a15063a,a15064a,a15068a,a15069a,a15070a,a15074a,a15075a,a15079a,a15080a,a15081a,a15085a,a15086a,a15090a,a15091a,a15092a,a15096a,a15097a,a15101a,a15102a,a15103a,a15107a,a15108a,a15112a,a15113a,a15114a,a15118a,a15119a,a15123a,a15124a,a15125a,a15129a,a15130a,a15134a,a15135a,a15136a,a15140a,a15141a,a15145a,a15146a,a15147a,a15151a,a15152a,a15156a,a15157a,a15158a,a15162a,a15163a,a15167a,a15168a,a15169a,a15173a,a15174a,a15178a,a15179a,a15180a,a15184a,a15185a,a15189a,a15190a,a15191a,a15195a,a15196a,a15200a,a15201a,a15202a,a15206a,a15207a,a15211a,a15212a,a15213a,a15217a,a15218a,a15222a,a15223a,a15224a,a15228a,a15229a,a15233a,a15234a,a15235a,a15239a,a15240a,a15244a,a15245a,a15246a,a15250a,a15251a,a15255a,a15256a,a15257a,a15261a,a15262a,a15266a,a15267a,a15268a,a15272a,a15273a,a15277a,a15278a,a15279a,a15283a,a15284a,a15288a,a15289a,a15290a,a15294a,a15295a,a15299a,a15300a,a15301a,a15305a,a15306a,a15310a,a15311a,a15312a,a15316a,a15317a,a15321a,a15322a,a15323a,a15327a,a15328a,a15332a,a15333a,a15334a,a15338a,a15339a,a15343a,a15344a,a15345a,a15349a,a15350a,a15354a,a15355a,a15356a,a15360a,a15361a,a15365a,a15366a,a15367a,a15371a,a15372a,a15376a,a15377a,a15378a,a15382a,a15383a,a15387a,a15388a,a15389a,a15393a,a15394a,a15398a,a15399a,a15400a,a15404a,a15405a,a15409a,a15410a,a15411a,a15415a,a15416a,a15420a,a15421a,a15422a,a15426a,a15427a,a15431a,a15432a,a15433a,a15437a,a15438a,a15442a,a15443a,a15444a,a15448a,a15449a,a15453a,a15454a,a15455a,a15459a,a15460a,a15464a,a15465a,a15466a,a15470a,a15471a,a15475a,a15476a,a15477a,a15481a,a15482a,a15486a,a15487a,a15488a,a15492a,a15493a,a15497a,a15498a,a15499a,a15503a,a15504a,a15508a,a15509a,a15510a,a15514a,a15515a,a15519a,a15520a,a15521a,a15525a,a15526a,a15530a,a15531a,a15532a,a15536a,a15537a,a15541a,a15542a,a15543a,a15547a,a15548a,a15552a,a15553a,a15554a,a15558a,a15559a,a15563a,a15564a,a15565a,a15569a,a15570a,a15574a,a15575a,a15576a,a15580a,a15581a,a15585a,a15586a,a15587a,a15591a,a15592a,a15596a,a15597a,a15598a,a15602a,a15603a,a15607a,a15608a,a15609a,a15613a,a15614a,a15618a,a15619a,a15620a,a15624a,a15625a,a15629a,a15630a,a15631a,a15635a,a15636a,a15640a,a15641a,a15642a,a15646a,a15647a,a15651a,a15652a,a15653a,a15657a,a15658a,a15662a,a15663a,a15664a,a15668a,a15669a,a15673a,a15674a,a15675a,a15679a,a15680a,a15684a,a15685a,a15686a,a15690a,a15691a,a15695a,a15696a,a15697a,a15701a,a15702a,a15706a,a15707a,a15708a,a15712a,a15713a,a15717a,a15718a,a15719a,a15723a,a15724a,a15728a,a15729a,a15730a,a15734a,a15735a,a15739a,a15740a,a15741a,a15745a,a15746a,a15750a,a15751a,a15752a,a15756a,a15757a,a15761a,a15762a,a15763a,a15767a,a15768a,a15772a,a15773a,a15774a,a15778a,a15779a,a15783a,a15784a,a15785a,a15789a,a15790a,a15794a,a15795a,a15796a,a15800a,a15801a,a15805a,a15806a,a15807a,a15811a,a15812a,a15816a,a15817a,a15818a,a15822a,a15823a,a15827a,a15828a,a15829a,a15833a,a15834a,a15838a,a15839a,a15840a,a15844a,a15845a,a15849a,a15850a,a15851a,a15855a,a15856a,a15860a,a15861a,a15862a,a15866a,a15867a,a15871a,a15872a,a15873a,a15877a,a15878a,a15882a,a15883a,a15884a,a15888a,a15889a,a15893a,a15894a,a15895a,a15899a,a15900a,a15904a,a15905a,a15906a,a15910a,a15911a,a15915a,a15916a,a15917a,a15921a,a15922a,a15926a,a15927a,a15928a,a15932a,a15933a,a15937a,a15938a,a15939a,a15943a,a15944a,a15948a,a15949a,a15950a,a15954a,a15955a,a15959a,a15960a,a15961a,a15965a,a15966a,a15970a,a15971a,a15972a,a15976a,a15977a,a15981a,a15982a,a15983a,a15987a,a15988a,a15992a,a15993a,a15994a,a15998a,a15999a,a16003a,a16004a,a16005a,a16009a,a16010a,a16014a,a16015a,a16016a,a16020a,a16021a,a16025a,a16026a,a16027a,a16031a,a16032a,a16036a,a16037a,a16038a,a16042a,a16043a,a16047a,a16048a,a16049a,a16053a,a16054a,a16058a,a16059a,a16060a,a16064a,a16065a,a16069a,a16070a,a16071a,a16075a,a16076a,a16080a,a16081a,a16082a,a16086a,a16087a,a16091a,a16092a,a16093a,a16097a,a16098a,a16102a,a16103a,a16104a,a16108a,a16109a,a16113a,a16114a,a16115a,a16119a,a16120a,a16124a,a16125a,a16126a,a16130a,a16131a,a16135a,a16136a,a16137a,a16141a,a16142a,a16146a,a16147a,a16148a,a16152a,a16153a,a16157a,a16158a,a16159a,a16163a,a16164a,a16168a,a16169a,a16170a,a16174a,a16175a,a16179a,a16180a,a16181a,a16185a,a16186a,a16190a,a16191a,a16192a,a16196a,a16197a,a16201a,a16202a,a16203a,a16207a,a16208a,a16212a,a16213a,a16214a,a16218a,a16219a,a16223a,a16224a,a16225a,a16229a,a16230a,a16234a,a16235a,a16236a,a16240a,a16241a,a16245a,a16246a,a16247a,a16251a,a16252a,a16256a,a16257a,a16258a,a16262a,a16263a,a16267a,a16268a,a16269a,a16273a,a16274a,a16278a,a16279a,a16280a,a16284a,a16285a,a16289a,a16290a,a16291a,a16295a,a16296a,a16300a,a16301a,a16302a,a16306a,a16307a,a16311a,a16312a,a16313a,a16317a,a16318a,a16322a,a16323a,a16324a,a16328a,a16329a,a16333a,a16334a,a16335a,a16339a,a16340a,a16344a,a16345a,a16346a,a16350a,a16351a,a16355a,a16356a,a16357a,a16361a,a16362a,a16366a,a16367a,a16368a,a16372a,a16373a,a16377a,a16378a,a16379a,a16383a,a16384a,a16388a,a16389a,a16390a,a16394a,a16395a,a16399a,a16400a,a16401a,a16405a,a16406a,a16410a,a16411a,a16412a,a16416a,a16417a,a16421a,a16422a,a16423a,a16427a,a16428a,a16432a,a16433a,a16434a,a16438a,a16439a,a16443a,a16444a,a16445a,a16449a,a16450a,a16454a,a16455a,a16456a,a16460a,a16461a,a16465a,a16466a,a16467a,a16471a,a16472a,a16476a,a16477a,a16478a,a16482a,a16483a,a16487a,a16488a,a16489a,a16493a,a16494a,a16498a,a16499a,a16500a,a16504a,a16505a,a16509a,a16510a,a16511a,a16515a,a16516a,a16520a,a16521a,a16522a,a16526a,a16527a,a16531a,a16532a,a16533a,a16537a,a16538a,a16542a,a16543a,a16544a,a16548a,a16549a,a16553a,a16554a,a16555a,a16559a,a16560a,a16564a,a16565a,a16566a,a16570a,a16571a,a16575a,a16576a,a16577a,a16581a,a16582a,a16586a,a16587a,a16588a,a16592a,a16593a,a16597a,a16598a,a16599a,a16603a,a16604a,a16608a,a16609a,a16610a,a16614a,a16615a,a16619a,a16620a,a16621a,a16625a,a16626a,a16630a,a16631a,a16632a,a16636a,a16637a,a16641a,a16642a,a16643a,a16647a,a16648a,a16652a,a16653a,a16654a,a16658a,a16659a,a16663a,a16664a,a16665a,a16669a,a16670a,a16674a,a16675a,a16676a,a16680a,a16681a,a16685a,a16686a,a16687a,a16691a,a16692a,a16696a,a16697a,a16698a,a16702a,a16703a,a16707a,a16708a,a16709a,a16713a,a16714a,a16718a,a16719a,a16720a,a16724a,a16725a,a16729a,a16730a,a16731a,a16735a,a16736a,a16740a,a16741a,a16742a,a16746a,a16747a,a16751a,a16752a,a16753a,a16757a,a16758a,a16762a,a16763a,a16764a,a16768a,a16769a,a16773a,a16774a,a16775a,a16779a,a16780a,a16784a,a16785a,a16786a,a16790a,a16791a,a16795a,a16796a,a16797a,a16801a,a16802a,a16806a,a16807a,a16808a,a16812a,a16813a,a16817a,a16818a,a16819a,a16823a,a16824a,a16828a,a16829a,a16830a,a16834a,a16835a,a16839a,a16840a,a16841a,a16845a,a16846a,a16850a,a16851a,a16852a,a16856a,a16857a,a16861a,a16862a,a16863a,a16867a,a16868a,a16872a,a16873a,a16874a,a16878a,a16879a,a16883a,a16884a,a16885a,a16889a,a16890a,a16894a,a16895a,a16896a,a16900a,a16901a,a16905a,a16906a,a16907a,a16911a,a16912a,a16916a,a16917a,a16918a,a16922a,a16923a,a16927a,a16928a,a16929a,a16933a,a16934a,a16938a,a16939a,a16940a,a16944a,a16945a,a16949a,a16950a,a16951a,a16955a,a16956a,a16960a,a16961a,a16962a,a16966a,a16967a,a16971a,a16972a,a16973a,a16977a,a16978a,a16982a,a16983a,a16984a,a16988a,a16989a,a16993a,a16994a,a16995a,a16999a,a17000a,a17004a,a17005a,a17006a,a17010a,a17011a,a17015a,a17016a,a17017a,a17021a,a17022a,a17026a,a17027a,a17028a,a17032a,a17033a,a17037a,a17038a,a17039a,a17043a,a17044a,a17048a,a17049a,a17050a,a17054a,a17055a,a17059a,a17060a,a17061a,a17065a,a17066a,a17070a,a17071a,a17072a,a17076a,a17077a,a17081a,a17082a,a17083a,a17087a,a17088a,a17092a,a17093a,a17094a,a17098a,a17099a,a17103a,a17104a,a17105a,a17109a,a17110a,a17114a,a17115a,a17116a,a17120a,a17121a,a17125a,a17126a,a17127a,a17131a,a17132a,a17136a,a17137a,a17138a,a17142a,a17143a,a17147a,a17148a,a17149a,a17153a,a17154a,a17158a,a17159a,a17160a,a17164a,a17165a,a17169a,a17170a,a17171a,a17175a,a17176a,a17180a,a17181a,a17182a,a17186a,a17187a,a17191a,a17192a,a17193a,a17197a,a17198a,a17202a,a17203a,a17204a,a17208a,a17209a,a17213a,a17214a,a17215a,a17219a,a17220a,a17224a,a17225a,a17226a,a17230a,a17231a,a17235a,a17236a,a17237a,a17241a,a17242a,a17246a,a17247a,a17248a,a17252a,a17253a,a17257a,a17258a,a17259a,a17263a,a17264a,a17268a,a17269a,a17270a,a17274a,a17275a,a17279a,a17280a,a17281a,a17285a,a17286a,a17290a,a17291a,a17292a,a17296a,a17297a,a17301a,a17302a,a17303a,a17307a,a17308a,a17312a,a17313a,a17314a,a17318a,a17319a,a17323a,a17324a,a17325a,a17329a,a17330a,a17334a,a17335a,a17336a,a17340a,a17341a,a17345a,a17346a,a17347a,a17351a,a17352a,a17356a,a17357a,a17358a,a17362a,a17363a,a17367a,a17368a,a17369a,a17373a,a17374a,a17378a,a17379a,a17380a,a17384a,a17385a,a17389a,a17390a,a17391a,a17395a,a17396a,a17400a,a17401a,a17402a,a17406a,a17407a,a17411a,a17412a,a17413a,a17417a,a17418a,a17422a,a17423a,a17424a,a17428a,a17429a,a17433a,a17434a,a17435a,a17439a,a17440a,a17444a,a17445a,a17446a,a17450a,a17451a,a17455a,a17456a,a17457a,a17461a,a17462a,a17466a,a17467a,a17468a,a17472a,a17473a,a17477a,a17478a,a17479a,a17483a,a17484a,a17488a,a17489a,a17490a,a17494a,a17495a,a17499a,a17500a,a17501a,a17505a,a17506a,a17510a,a17511a,a17512a,a17516a,a17517a,a17521a,a17522a,a17523a,a17527a,a17528a,a17532a,a17533a,a17534a,a17538a,a17539a,a17543a,a17544a,a17545a,a17549a,a17550a,a17554a,a17555a,a17556a,a17560a,a17561a,a17565a,a17566a,a17567a,a17571a,a17572a,a17576a,a17577a,a17578a,a17582a,a17583a,a17587a,a17588a,a17589a,a17593a,a17594a,a17598a,a17599a,a17600a,a17604a,a17605a,a17609a,a17610a,a17611a,a17615a,a17616a,a17620a,a17621a,a17622a,a17626a,a17627a,a17631a,a17632a,a17633a,a17637a,a17638a,a17642a,a17643a,a17644a,a17648a,a17649a,a17653a,a17654a,a17655a,a17659a,a17660a,a17664a,a17665a,a17666a,a17670a,a17671a,a17675a,a17676a,a17677a,a17681a,a17682a,a17686a,a17687a,a17688a,a17692a,a17693a,a17697a,a17698a,a17699a,a17703a,a17704a,a17708a,a17709a,a17710a,a17714a,a17715a,a17719a,a17720a,a17721a,a17725a,a17726a,a17730a,a17731a,a17732a,a17736a,a17737a,a17741a,a17742a,a17743a,a17747a,a17748a,a17752a,a17753a,a17754a,a17758a,a17759a,a17763a,a17764a,a17765a,a17769a,a17770a,a17774a,a17775a,a17776a,a17780a,a17781a,a17785a,a17786a,a17787a,a17791a,a17792a,a17796a,a17797a,a17798a,a17802a,a17803a,a17807a,a17808a,a17809a,a17813a,a17814a,a17818a,a17819a,a17820a,a17824a,a17825a,a17829a,a17830a,a17831a,a17835a,a17836a,a17840a,a17841a,a17842a,a17846a,a17847a,a17851a,a17852a,a17853a,a17857a,a17858a,a17862a,a17863a,a17864a,a17868a,a17869a,a17873a,a17874a,a17875a,a17879a,a17880a,a17884a,a17885a,a17886a,a17890a,a17891a,a17895a,a17896a,a17897a,a17901a,a17902a,a17906a,a17907a,a17908a,a17912a,a17913a,a17917a,a17918a,a17919a,a17923a,a17924a,a17928a,a17929a,a17930a,a17934a,a17935a,a17939a,a17940a,a17941a,a17945a,a17946a,a17950a,a17951a,a17952a,a17956a,a17957a,a17961a,a17962a,a17963a,a17967a,a17968a,a17972a,a17973a,a17974a,a17978a,a17979a,a17983a,a17984a,a17985a,a17989a,a17990a,a17994a,a17995a,a17996a,a18000a,a18001a,a18005a,a18006a,a18007a,a18011a,a18012a,a18016a,a18017a,a18018a,a18022a,a18023a,a18027a,a18028a,a18029a,a18033a,a18034a,a18038a,a18039a,a18040a,a18044a,a18045a,a18049a,a18050a,a18051a,a18055a,a18056a,a18060a,a18061a,a18062a,a18066a,a18067a,a18071a,a18072a,a18073a,a18077a,a18078a,a18082a,a18083a,a18084a,a18088a,a18089a,a18093a,a18094a,a18095a,a18099a,a18100a,a18104a,a18105a,a18106a,a18110a,a18111a,a18115a,a18116a,a18117a,a18121a,a18122a,a18126a,a18127a,a18128a,a18132a,a18133a,a18137a,a18138a,a18139a,a18143a,a18144a,a18148a,a18149a,a18150a,a18154a,a18155a,a18159a,a18160a,a18161a,a18165a,a18166a,a18170a,a18171a,a18172a,a18176a,a18177a,a18181a,a18182a,a18183a,a18187a,a18188a,a18192a,a18193a,a18194a,a18198a,a18199a,a18203a,a18204a,a18205a,a18209a,a18210a,a18214a,a18215a,a18216a,a18220a,a18221a,a18225a,a18226a,a18227a,a18231a,a18232a,a18236a,a18237a,a18238a,a18242a,a18243a,a18247a,a18248a,a18249a,a18253a,a18254a,a18258a,a18259a,a18260a,a18264a,a18265a,a18269a,a18270a,a18271a,a18275a,a18276a,a18280a,a18281a,a18282a,a18286a,a18287a,a18291a,a18292a,a18293a,a18297a,a18298a,a18302a,a18303a,a18304a,a18308a,a18309a,a18313a,a18314a,a18315a,a18319a,a18320a,a18324a,a18325a,a18326a,a18330a,a18331a,a18335a,a18336a,a18337a,a18341a,a18342a,a18346a,a18347a,a18348a,a18352a,a18353a,a18357a,a18358a,a18359a,a18363a,a18364a,a18368a,a18369a,a18370a,a18374a,a18375a,a18379a,a18380a,a18381a,a18385a,a18386a,a18390a,a18391a,a18392a,a18396a,a18397a,a18401a,a18402a,a18403a,a18407a,a18408a,a18412a,a18413a,a18414a,a18418a,a18419a,a18423a,a18424a,a18425a,a18429a,a18430a,a18434a,a18435a,a18436a,a18440a,a18441a,a18445a,a18446a,a18447a,a18451a,a18452a,a18456a,a18457a,a18458a,a18462a,a18463a,a18467a,a18468a,a18469a,a18473a,a18474a,a18478a,a18479a,a18480a,a18484a,a18485a,a18489a,a18490a,a18491a,a18495a,a18496a,a18500a,a18501a,a18502a,a18506a,a18507a,a18511a,a18512a,a18513a,a18517a,a18518a,a18522a,a18523a,a18524a,a18528a,a18529a,a18533a,a18534a,a18535a,a18539a,a18540a,a18544a,a18545a,a18546a,a18550a,a18551a,a18555a,a18556a,a18557a,a18561a,a18562a,a18566a,a18567a,a18568a,a18572a,a18573a,a18577a,a18578a,a18579a,a18583a,a18584a,a18588a,a18589a,a18590a,a18594a,a18595a,a18599a,a18600a,a18601a,a18605a,a18606a,a18610a,a18611a,a18612a,a18616a,a18617a,a18621a,a18622a,a18623a,a18627a,a18628a,a18632a,a18633a,a18634a,a18638a,a18639a,a18643a,a18644a,a18645a,a18649a,a18650a,a18654a,a18655a,a18656a,a18660a,a18661a,a18665a,a18666a,a18667a,a18671a,a18672a,a18676a,a18677a,a18678a,a18682a,a18683a,a18687a,a18688a,a18689a,a18693a,a18694a,a18698a,a18699a,a18700a,a18704a,a18705a,a18709a,a18710a,a18711a,a18715a,a18716a,a18720a,a18721a,a18722a,a18726a,a18727a,a18731a,a18732a,a18733a,a18737a,a18738a,a18742a,a18743a,a18744a,a18748a,a18749a,a18753a,a18754a,a18755a,a18759a,a18760a,a18764a,a18765a,a18766a,a18770a,a18771a,a18775a,a18776a,a18777a,a18781a,a18782a,a18786a,a18787a,a18788a,a18792a,a18793a,a18797a,a18798a,a18799a,a18803a,a18804a,a18808a,a18809a,a18810a,a18814a,a18815a,a18819a,a18820a,a18821a,a18825a,a18826a,a18830a,a18831a,a18832a,a18836a,a18837a,a18841a,a18842a,a18843a,a18847a,a18848a,a18852a,a18853a,a18854a,a18858a,a18859a,a18863a,a18864a,a18865a,a18869a,a18870a,a18874a,a18875a,a18876a,a18880a,a18881a,a18885a,a18886a,a18887a,a18891a,a18892a,a18896a,a18897a,a18898a,a18902a,a18903a,a18907a,a18908a,a18909a,a18913a,a18914a,a18918a,a18919a,a18920a,a18924a,a18925a,a18929a,a18930a,a18931a,a18935a,a18936a,a18940a,a18941a,a18942a,a18946a,a18947a,a18951a,a18952a,a18953a,a18957a,a18958a,a18962a,a18963a,a18964a,a18968a,a18969a,a18973a,a18974a,a18975a,a18979a,a18980a,a18984a,a18985a,a18986a,a18990a,a18991a,a18995a,a18996a,a18997a,a19001a,a19002a,a19006a,a19007a,a19008a,a19012a,a19013a,a19017a,a19018a,a19019a,a19023a,a19024a,a19028a,a19029a,a19030a,a19034a,a19035a,a19038a,a19041a,a19042a,a19043a,a19047a,a19048a,a19052a,a19053a,a19054a,a19058a,a19059a,a19062a,a19065a,a19066a,a19067a,a19071a,a19072a,a19076a,a19077a,a19078a,a19082a,a19083a,a19086a,a19089a,a19090a,a19091a,a19095a,a19096a,a19100a,a19101a,a19102a,a19106a,a19107a,a19110a,a19113a,a19114a,a19115a,a19119a,a19120a,a19124a,a19125a,a19126a,a19130a,a19131a,a19134a,a19137a,a19138a,a19139a,a19143a,a19144a,a19148a,a19149a,a19150a,a19154a,a19155a,a19158a,a19161a,a19162a,a19163a,a19167a,a19168a,a19172a,a19173a,a19174a,a19178a,a19179a,a19182a,a19185a,a19186a,a19187a,a19191a,a19192a,a19196a,a19197a,a19198a,a19202a,a19203a,a19206a,a19209a,a19210a,a19211a,a19215a,a19216a,a19220a,a19221a,a19222a,a19226a,a19227a,a19230a,a19233a,a19234a,a19235a,a19239a,a19240a,a19244a,a19245a,a19246a,a19250a,a19251a,a19254a,a19257a,a19258a,a19259a,a19263a,a19264a,a19268a,a19269a,a19270a,a19274a,a19275a,a19278a,a19281a,a19282a,a19283a,a19287a,a19288a,a19292a,a19293a,a19294a,a19298a,a19299a,a19302a,a19305a,a19306a,a19307a,a19311a,a19312a,a19316a,a19317a,a19318a,a19322a,a19323a,a19326a,a19329a,a19330a,a19331a,a19335a,a19336a,a19340a,a19341a,a19342a,a19346a,a19347a,a19350a,a19353a,a19354a,a19355a,a19359a,a19360a,a19364a,a19365a,a19366a,a19370a,a19371a,a19374a,a19377a,a19378a,a19379a,a19383a,a19384a,a19388a,a19389a,a19390a,a19394a,a19395a,a19398a,a19401a,a19402a,a19403a,a19407a,a19408a,a19412a,a19413a,a19414a,a19418a,a19419a,a19422a,a19425a,a19426a,a19427a,a19431a,a19432a,a19436a,a19437a,a19438a,a19442a,a19443a,a19446a,a19449a,a19450a,a19451a,a19455a,a19456a,a19460a,a19461a,a19462a,a19466a,a19467a,a19470a,a19473a,a19474a,a19475a,a19479a,a19480a,a19484a,a19485a,a19486a,a19490a,a19491a,a19494a,a19497a,a19498a,a19499a,a19503a,a19504a,a19508a,a19509a,a19510a,a19514a,a19515a,a19518a,a19521a,a19522a,a19523a,a19527a,a19528a,a19532a,a19533a,a19534a,a19538a,a19539a,a19542a,a19545a,a19546a,a19547a,a19551a,a19552a,a19556a,a19557a,a19558a,a19562a,a19563a,a19566a,a19569a,a19570a,a19571a,a19575a,a19576a,a19580a,a19581a,a19582a,a19586a,a19587a,a19590a,a19593a,a19594a,a19595a,a19599a,a19600a,a19604a,a19605a,a19606a,a19610a,a19611a,a19614a,a19617a,a19618a,a19619a,a19623a,a19624a,a19628a,a19629a,a19630a,a19634a,a19635a,a19638a,a19641a,a19642a,a19643a,a19647a,a19648a,a19652a,a19653a,a19654a,a19658a,a19659a,a19662a,a19665a,a19666a,a19667a,a19671a,a19672a,a19676a,a19677a,a19678a,a19682a,a19683a,a19686a,a19689a,a19690a,a19691a,a19695a,a19696a,a19700a,a19701a,a19702a,a19706a,a19707a,a19710a,a19713a,a19714a,a19715a,a19719a,a19720a,a19724a,a19725a,a19726a,a19730a,a19731a,a19734a,a19737a,a19738a,a19739a,a19743a,a19744a,a19748a,a19749a,a19750a,a19754a,a19755a,a19758a,a19761a,a19762a,a19763a,a19767a,a19768a,a19772a,a19773a,a19774a,a19778a,a19779a,a19782a,a19785a,a19786a,a19787a,a19791a,a19792a,a19796a,a19797a,a19798a,a19802a,a19803a,a19806a,a19809a,a19810a,a19811a,a19815a,a19816a,a19820a,a19821a,a19822a,a19826a,a19827a,a19830a,a19833a,a19834a,a19835a,a19839a,a19840a,a19844a,a19845a,a19846a,a19850a,a19851a,a19854a,a19857a,a19858a,a19859a,a19863a,a19864a,a19868a,a19869a,a19870a,a19874a,a19875a,a19878a,a19881a,a19882a,a19883a,a19887a,a19888a,a19892a,a19893a,a19894a,a19898a,a19899a,a19902a,a19905a,a19906a,a19907a,a19911a,a19912a,a19916a,a19917a,a19918a,a19922a,a19923a,a19926a,a19929a,a19930a,a19931a,a19935a,a19936a,a19940a,a19941a,a19942a,a19946a,a19947a,a19950a,a19953a,a19954a,a19955a,a19959a,a19960a,a19964a,a19965a,a19966a,a19970a,a19971a,a19974a,a19977a,a19978a,a19979a,a19983a,a19984a,a19988a,a19989a,a19990a,a19994a,a19995a,a19998a,a20001a,a20002a,a20003a,a20007a,a20008a,a20012a,a20013a,a20014a,a20018a,a20019a,a20022a,a20025a,a20026a,a20027a,a20031a,a20032a,a20036a,a20037a,a20038a,a20042a,a20043a,a20046a,a20049a,a20050a,a20051a,a20055a,a20056a,a20060a,a20061a,a20062a,a20066a,a20067a,a20070a,a20073a,a20074a,a20075a,a20079a,a20080a,a20084a,a20085a,a20086a,a20090a,a20091a,a20094a,a20097a,a20098a,a20099a,a20103a,a20104a,a20108a,a20109a,a20110a,a20114a,a20115a,a20118a,a20121a,a20122a,a20123a,a20127a,a20128a,a20132a,a20133a,a20134a,a20138a,a20139a,a20142a,a20145a,a20146a,a20147a,a20151a,a20152a,a20156a,a20157a,a20158a,a20162a,a20163a,a20166a,a20169a,a20170a,a20171a,a20175a,a20176a,a20180a,a20181a,a20182a,a20186a,a20187a,a20190a,a20193a,a20194a,a20195a,a20199a,a20200a,a20204a,a20205a,a20206a,a20210a,a20211a,a20214a,a20217a,a20218a,a20219a,a20223a,a20224a,a20228a,a20229a,a20230a,a20234a,a20235a,a20238a,a20241a,a20242a,a20243a,a20247a,a20248a,a20252a,a20253a,a20254a,a20258a,a20259a,a20262a,a20265a,a20266a,a20267a,a20271a,a20272a,a20276a,a20277a,a20278a,a20282a,a20283a,a20286a,a20289a,a20290a,a20291a,a20295a,a20296a,a20300a,a20301a,a20302a,a20306a,a20307a,a20310a,a20313a,a20314a,a20315a,a20319a,a20320a,a20324a,a20325a,a20326a,a20330a,a20331a,a20334a,a20337a,a20338a,a20339a,a20343a,a20344a,a20348a,a20349a,a20350a,a20354a,a20355a,a20358a,a20361a,a20362a,a20363a,a20367a,a20368a,a20372a,a20373a,a20374a,a20378a,a20379a,a20382a,a20385a,a20386a,a20387a,a20391a,a20392a,a20396a,a20397a,a20398a,a20402a,a20403a,a20406a,a20409a,a20410a,a20411a,a20415a,a20416a,a20420a,a20421a,a20422a,a20426a,a20427a,a20430a,a20433a,a20434a,a20435a,a20439a,a20440a,a20444a,a20445a,a20446a,a20450a,a20451a,a20454a,a20457a,a20458a,a20459a,a20463a,a20464a,a20468a,a20469a,a20470a,a20474a,a20475a,a20478a,a20481a,a20482a,a20483a,a20487a,a20488a,a20492a,a20493a,a20494a,a20498a,a20499a,a20502a,a20505a,a20506a,a20507a,a20511a,a20512a,a20516a,a20517a,a20518a,a20522a,a20523a,a20526a,a20529a,a20530a,a20531a,a20535a,a20536a,a20540a,a20541a,a20542a,a20546a,a20547a,a20550a,a20553a,a20554a,a20555a,a20559a,a20560a,a20564a,a20565a,a20566a,a20570a,a20571a,a20574a,a20577a,a20578a,a20579a,a20583a,a20584a,a20588a,a20589a,a20590a,a20594a,a20595a,a20598a,a20601a,a20602a,a20603a,a20607a,a20608a,a20612a,a20613a,a20614a,a20618a,a20619a,a20622a,a20625a,a20626a,a20627a,a20631a,a20632a,a20636a,a20637a,a20638a,a20642a,a20643a,a20646a,a20649a,a20650a,a20651a,a20655a,a20656a,a20660a,a20661a,a20662a,a20666a,a20667a,a20670a,a20673a,a20674a,a20675a,a20679a,a20680a,a20684a,a20685a,a20686a,a20690a,a20691a,a20694a,a20697a,a20698a,a20699a,a20703a,a20704a,a20708a,a20709a,a20710a,a20714a,a20715a,a20718a,a20721a,a20722a,a20723a,a20727a,a20728a,a20732a,a20733a,a20734a,a20738a,a20739a,a20742a,a20745a,a20746a,a20747a,a20751a,a20752a,a20756a,a20757a,a20758a,a20762a,a20763a,a20766a,a20769a,a20770a,a20771a,a20775a,a20776a,a20780a,a20781a,a20782a,a20786a,a20787a,a20790a,a20793a,a20794a,a20795a,a20799a,a20800a,a20804a,a20805a,a20806a,a20810a,a20811a,a20814a,a20817a,a20818a,a20819a,a20823a,a20824a,a20828a,a20829a,a20830a,a20834a,a20835a,a20838a,a20841a,a20842a,a20843a,a20847a,a20848a,a20852a,a20853a,a20854a,a20858a,a20859a,a20862a,a20865a,a20866a,a20867a,a20871a,a20872a,a20876a,a20877a,a20878a,a20882a,a20883a,a20886a,a20889a,a20890a,a20891a,a20895a,a20896a,a20900a,a20901a,a20902a,a20906a,a20907a,a20910a,a20913a,a20914a,a20915a,a20919a,a20920a,a20924a,a20925a,a20926a,a20930a,a20931a,a20934a,a20937a,a20938a,a20939a,a20943a,a20944a,a20948a,a20949a,a20950a,a20954a,a20955a,a20958a,a20961a,a20962a,a20963a,a20967a,a20968a,a20972a,a20973a,a20974a,a20978a,a20979a,a20982a,a20985a,a20986a,a20987a,a20991a,a20992a,a20996a,a20997a,a20998a,a21002a,a21003a,a21006a,a21009a,a21010a,a21011a,a21015a,a21016a,a21020a,a21021a,a21022a,a21026a,a21027a,a21030a,a21033a,a21034a,a21035a,a21039a,a21040a,a21044a,a21045a,a21046a,a21050a,a21051a,a21054a,a21057a,a21058a,a21059a,a21063a,a21064a,a21068a,a21069a,a21070a,a21074a,a21075a,a21078a,a21081a,a21082a,a21083a,a21087a,a21088a,a21092a,a21093a,a21094a,a21098a,a21099a,a21102a,a21105a,a21106a,a21107a,a21111a,a21112a,a21116a,a21117a,a21118a,a21122a,a21123a,a21126a,a21129a,a21130a,a21131a,a21135a,a21136a,a21140a,a21141a,a21142a,a21146a,a21147a,a21150a,a21153a,a21154a,a21155a,a21159a,a21160a,a21164a,a21165a,a21166a,a21170a,a21171a,a21174a,a21177a,a21178a,a21179a,a21183a,a21184a,a21188a,a21189a,a21190a,a21194a,a21195a,a21198a,a21201a,a21202a,a21203a,a21207a,a21208a,a21212a,a21213a,a21214a,a21218a,a21219a,a21222a,a21225a,a21226a,a21227a,a21231a,a21232a,a21236a,a21237a,a21238a,a21242a,a21243a,a21246a,a21249a,a21250a,a21251a,a21255a,a21256a,a21260a,a21261a,a21262a,a21266a,a21267a,a21270a,a21273a,a21274a,a21275a,a21279a,a21280a,a21284a,a21285a,a21286a,a21290a,a21291a,a21294a,a21297a,a21298a,a21299a,a21303a,a21304a,a21308a,a21309a,a21310a,a21314a,a21315a,a21318a,a21321a,a21322a,a21323a,a21327a,a21328a,a21332a,a21333a,a21334a,a21338a,a21339a,a21342a,a21345a,a21346a,a21347a,a21351a,a21352a,a21356a,a21357a,a21358a,a21362a,a21363a,a21366a,a21369a,a21370a,a21371a,a21375a,a21376a,a21380a,a21381a,a21382a,a21386a,a21387a,a21390a,a21393a,a21394a,a21395a,a21399a,a21400a,a21404a,a21405a,a21406a,a21410a,a21411a,a21414a,a21417a,a21418a,a21419a,a21423a,a21424a,a21428a,a21429a,a21430a,a21434a,a21435a,a21438a,a21441a,a21442a,a21443a,a21447a,a21448a,a21452a,a21453a,a21454a,a21458a,a21459a,a21462a,a21465a,a21466a,a21467a,a21471a,a21472a,a21476a,a21477a,a21478a,a21482a,a21483a,a21486a,a21489a,a21490a,a21491a,a21495a,a21496a,a21500a,a21501a,a21502a,a21506a,a21507a,a21510a,a21513a,a21514a,a21515a,a21519a,a21520a,a21524a,a21525a,a21526a,a21530a,a21531a,a21534a,a21537a,a21538a,a21539a,a21543a,a21544a,a21548a,a21549a,a21550a,a21554a,a21555a,a21558a,a21561a,a21562a,a21563a,a21567a,a21568a,a21572a,a21573a,a21574a,a21578a,a21579a,a21582a,a21585a,a21586a,a21587a,a21591a,a21592a,a21596a,a21597a,a21598a,a21602a,a21603a,a21606a,a21609a,a21610a,a21611a,a21615a,a21616a,a21620a,a21621a,a21622a,a21626a,a21627a,a21630a,a21633a,a21634a,a21635a,a21639a,a21640a,a21644a,a21645a,a21646a,a21650a,a21651a,a21654a,a21657a,a21658a,a21659a,a21663a,a21664a,a21668a,a21669a,a21670a,a21674a,a21675a,a21678a,a21681a,a21682a,a21683a,a21687a,a21688a,a21692a,a21693a,a21694a,a21698a,a21699a,a21702a,a21705a,a21706a,a21707a,a21711a,a21712a,a21716a,a21717a,a21718a,a21722a,a21723a,a21726a,a21729a,a21730a,a21731a,a21735a,a21736a,a21740a,a21741a,a21742a,a21746a,a21747a,a21750a,a21753a,a21754a,a21755a,a21759a,a21760a,a21764a,a21765a,a21766a,a21770a,a21771a,a21774a,a21777a,a21778a,a21779a,a21783a,a21784a,a21788a,a21789a,a21790a,a21794a,a21795a,a21798a,a21801a,a21802a,a21803a,a21807a,a21808a,a21812a,a21813a,a21814a,a21818a,a21819a,a21822a,a21825a,a21826a,a21827a,a21831a,a21832a,a21836a,a21837a,a21838a,a21842a,a21843a,a21846a,a21849a,a21850a,a21851a,a21855a,a21856a,a21860a,a21861a,a21862a,a21866a,a21867a,a21870a,a21873a,a21874a,a21875a,a21879a,a21880a,a21884a,a21885a,a21886a,a21890a,a21891a,a21894a,a21897a,a21898a,a21899a,a21903a,a21904a,a21908a,a21909a,a21910a,a21914a,a21915a,a21918a,a21921a,a21922a,a21923a,a21927a,a21928a,a21932a,a21933a,a21934a,a21938a,a21939a,a21942a,a21945a,a21946a,a21947a,a21951a,a21952a,a21956a,a21957a,a21958a,a21962a,a21963a,a21966a,a21969a,a21970a,a21971a,a21975a,a21976a,a21980a,a21981a,a21982a,a21986a,a21987a,a21990a,a21993a,a21994a,a21995a,a21999a,a22000a,a22004a,a22005a,a22006a,a22010a,a22011a,a22014a,a22017a,a22018a,a22019a,a22023a,a22024a,a22028a,a22029a,a22030a,a22034a,a22035a,a22038a,a22041a,a22042a,a22043a,a22047a,a22048a,a22052a,a22053a,a22054a,a22058a,a22059a,a22062a,a22065a,a22066a,a22067a,a22071a,a22072a,a22076a,a22077a,a22078a,a22082a,a22083a,a22086a,a22089a,a22090a,a22091a,a22095a,a22096a,a22100a,a22101a,a22102a,a22106a,a22107a,a22110a,a22113a,a22114a,a22115a,a22119a,a22120a,a22124a,a22125a,a22126a,a22130a,a22131a,a22134a,a22137a,a22138a,a22139a,a22143a,a22144a,a22148a,a22149a,a22150a,a22154a,a22155a,a22158a,a22161a,a22162a,a22163a,a22167a,a22168a,a22172a,a22173a,a22174a,a22178a,a22179a,a22182a,a22185a,a22186a,a22187a,a22191a,a22192a,a22196a,a22197a,a22198a,a22202a,a22203a,a22206a,a22209a,a22210a,a22211a,a22215a,a22216a,a22220a,a22221a,a22222a,a22226a,a22227a,a22230a,a22233a,a22234a,a22235a,a22239a,a22240a,a22244a,a22245a,a22246a,a22250a,a22251a,a22254a,a22257a,a22258a,a22259a,a22263a,a22264a,a22268a,a22269a,a22270a,a22274a,a22275a,a22278a,a22281a,a22282a,a22283a,a22287a,a22288a,a22292a,a22293a,a22294a,a22298a,a22299a,a22302a,a22305a,a22306a,a22307a,a22311a,a22312a,a22316a,a22317a,a22318a,a22322a,a22323a,a22326a,a22329a,a22330a,a22331a,a22335a,a22336a,a22340a,a22341a,a22342a,a22346a,a22347a,a22350a,a22353a,a22354a,a22355a,a22359a,a22360a,a22364a,a22365a,a22366a,a22370a,a22371a,a22374a,a22377a,a22378a,a22379a,a22383a,a22384a,a22388a,a22389a,a22390a,a22394a,a22395a,a22398a,a22401a,a22402a,a22403a,a22407a,a22408a,a22412a,a22413a,a22414a,a22418a,a22419a,a22422a,a22425a,a22426a,a22427a,a22431a,a22432a,a22436a,a22437a,a22438a,a22442a,a22443a,a22446a,a22449a,a22450a,a22451a,a22455a,a22456a,a22460a,a22461a,a22462a,a22466a,a22467a,a22470a,a22473a,a22474a,a22475a,a22479a,a22480a,a22484a,a22485a,a22486a,a22490a,a22491a,a22494a,a22497a,a22498a,a22499a,a22503a,a22504a,a22508a,a22509a,a22510a,a22514a,a22515a,a22518a,a22521a,a22522a,a22523a,a22527a,a22528a,a22532a,a22533a,a22534a,a22538a,a22539a,a22542a,a22545a,a22546a,a22547a,a22551a,a22552a,a22556a,a22557a,a22558a,a22562a,a22563a,a22566a,a22569a,a22570a,a22571a,a22575a,a22576a,a22580a,a22581a,a22582a,a22586a,a22587a,a22590a,a22593a,a22594a,a22595a,a22599a,a22600a,a22604a,a22605a,a22606a,a22610a,a22611a,a22614a,a22617a,a22618a,a22619a,a22623a,a22624a,a22628a,a22629a,a22630a,a22634a,a22635a,a22638a,a22641a,a22642a,a22643a,a22647a,a22648a,a22652a,a22653a,a22654a,a22658a,a22659a,a22662a,a22665a,a22666a,a22667a,a22671a,a22672a,a22676a,a22677a,a22678a,a22682a,a22683a,a22686a,a22689a,a22690a,a22691a,a22695a,a22696a,a22700a,a22701a,a22702a,a22706a,a22707a,a22710a,a22713a,a22714a,a22715a,a22719a,a22720a,a22724a,a22725a,a22726a,a22730a,a22731a,a22734a,a22737a,a22738a,a22739a,a22743a,a22744a,a22748a,a22749a,a22750a,a22754a,a22755a,a22758a,a22761a,a22762a,a22763a,a22767a,a22768a,a22772a,a22773a,a22774a,a22778a,a22779a,a22782a,a22785a,a22786a,a22787a,a22791a,a22792a,a22796a,a22797a,a22798a,a22802a,a22803a,a22806a,a22809a,a22810a,a22811a,a22815a,a22816a,a22820a,a22821a,a22822a,a22826a,a22827a,a22830a,a22833a,a22834a,a22835a,a22839a,a22840a,a22844a,a22845a,a22846a,a22850a,a22851a,a22854a,a22857a,a22858a,a22859a,a22863a,a22864a,a22868a,a22869a,a22870a,a22874a,a22875a,a22878a,a22881a,a22882a,a22883a,a22887a,a22888a,a22892a,a22893a,a22894a,a22898a,a22899a,a22902a,a22905a,a22906a,a22907a,a22911a,a22912a,a22916a,a22917a,a22918a,a22922a,a22923a,a22926a,a22929a,a22930a,a22931a,a22935a,a22936a,a22940a,a22941a,a22942a,a22946a,a22947a,a22950a,a22953a,a22954a,a22955a,a22959a,a22960a,a22964a,a22965a,a22966a,a22970a,a22971a,a22974a,a22977a,a22978a,a22979a,a22983a,a22984a,a22988a,a22989a,a22990a,a22994a,a22995a,a22998a,a23001a,a23002a,a23003a,a23007a,a23008a,a23012a,a23013a,a23014a,a23018a,a23019a,a23022a,a23025a,a23026a,a23027a,a23031a,a23032a,a23036a,a23037a,a23038a,a23042a,a23043a,a23046a,a23049a,a23050a,a23051a,a23055a,a23056a,a23060a,a23061a,a23062a,a23066a,a23067a,a23070a,a23073a,a23074a,a23075a,a23079a,a23080a,a23084a,a23085a,a23086a,a23090a,a23091a,a23094a,a23097a,a23098a,a23099a,a23103a,a23104a,a23108a,a23109a,a23110a,a23114a,a23115a,a23118a,a23121a,a23122a,a23123a,a23127a,a23128a,a23132a,a23133a,a23134a,a23138a,a23139a,a23142a,a23145a,a23146a,a23147a,a23151a,a23152a,a23156a,a23157a,a23158a,a23162a,a23163a,a23166a,a23169a,a23170a,a23171a,a23175a,a23176a,a23180a,a23181a,a23182a,a23186a,a23187a,a23190a,a23193a,a23194a,a23195a,a23199a,a23200a,a23204a,a23205a,a23206a,a23210a,a23211a,a23214a,a23217a,a23218a,a23219a,a23223a,a23224a,a23228a,a23229a,a23230a,a23234a,a23235a,a23238a,a23241a,a23242a,a23243a,a23247a,a23248a,a23251a,a23254a,a23255a,a23256a,a23260a,a23261a,a23264a,a23267a,a23268a,a23269a,a23273a,a23274a,a23277a,a23280a,a23281a,a23282a,a23286a,a23287a,a23290a,a23293a,a23294a,a23295a,a23299a,a23300a,a23303a,a23306a,a23307a,a23308a,a23312a,a23313a,a23316a,a23319a,a23320a,a23321a,a23325a,a23326a,a23329a,a23332a,a23333a,a23334a,a23338a,a23339a,a23342a,a23345a,a23346a,a23347a,a23351a,a23352a,a23355a,a23358a,a23359a,a23360a,a23364a,a23365a,a23368a,a23371a,a23372a,a23373a,a23377a,a23378a,a23381a,a23384a,a23385a,a23386a,a23390a,a23391a,a23394a,a23397a,a23398a,a23399a,a23403a,a23404a,a23407a,a23410a,a23411a,a23412a,a23416a,a23417a,a23420a,a23423a,a23424a,a23425a,a23429a,a23430a,a23433a,a23436a,a23437a,a23438a,a23442a,a23443a,a23446a,a23449a,a23450a,a23451a,a23455a,a23456a,a23459a,a23462a,a23463a,a23464a,a23468a,a23469a,a23472a,a23475a,a23476a,a23477a,a23481a,a23482a,a23485a,a23488a,a23489a,a23490a,a23494a,a23495a,a23498a,a23501a,a23502a,a23503a,a23507a,a23508a,a23511a,a23514a,a23515a,a23516a,a23520a,a23521a,a23524a,a23527a,a23528a,a23529a,a23533a,a23534a,a23537a,a23540a,a23541a,a23542a,a23546a,a23547a,a23550a,a23553a,a23554a,a23555a,a23559a,a23560a,a23563a,a23566a,a23567a,a23568a,a23572a,a23573a,a23576a,a23579a,a23580a,a23581a,a23585a,a23586a,a23589a,a23592a,a23593a,a23594a,a23598a,a23599a,a23602a,a23605a,a23606a,a23607a,a23611a,a23612a,a23615a,a23618a,a23619a,a23620a,a23624a,a23625a,a23628a,a23631a,a23632a,a23633a,a23637a,a23638a,a23641a,a23644a,a23645a,a23646a,a23650a,a23651a,a23654a,a23657a,a23658a,a23659a,a23663a,a23664a,a23667a,a23670a,a23671a,a23672a,a23676a,a23677a,a23680a,a23683a,a23684a,a23685a,a23689a,a23690a,a23693a,a23696a,a23697a,a23698a,a23702a,a23703a,a23706a,a23709a,a23710a,a23711a,a23715a,a23716a,a23719a,a23722a,a23723a,a23724a,a23728a,a23729a,a23732a,a23735a,a23736a,a23737a,a23741a,a23742a,a23745a,a23748a,a23749a,a23750a,a23754a,a23755a,a23758a,a23761a,a23762a,a23763a,a23767a,a23768a,a23771a,a23774a,a23775a,a23776a,a23780a,a23781a,a23784a,a23787a,a23788a,a23789a,a23793a,a23794a,a23797a,a23800a,a23801a,a23802a,a23806a,a23807a,a23810a,a23813a,a23814a,a23815a,a23819a,a23820a,a23823a,a23826a,a23827a,a23828a,a23832a,a23833a,a23836a,a23839a,a23840a,a23841a,a23845a,a23846a,a23849a,a23852a,a23853a,a23854a,a23858a,a23859a,a23862a,a23865a,a23866a,a23867a,a23871a,a23872a,a23875a,a23878a,a23879a,a23880a,a23884a,a23885a,a23888a,a23891a,a23892a,a23893a,a23897a,a23898a,a23901a,a23904a,a23905a,a23906a,a23910a,a23911a,a23914a,a23917a,a23918a,a23919a,a23923a,a23924a,a23927a,a23930a,a23931a,a23932a,a23936a,a23937a,a23940a,a23943a,a23944a,a23945a,a23949a,a23950a,a23953a,a23956a,a23957a,a23958a,a23962a,a23963a,a23966a,a23969a,a23970a,a23971a,a23975a,a23976a,a23979a,a23982a,a23983a,a23984a,a23988a,a23989a,a23992a,a23995a,a23996a,a23997a,a24001a,a24002a,a24005a,a24008a,a24009a,a24010a,a24014a,a24015a,a24018a,a24021a,a24022a,a24023a,a24027a,a24028a,a24031a,a24034a,a24035a,a24036a,a24040a,a24041a,a24044a,a24047a,a24048a,a24049a,a24053a,a24054a,a24057a,a24060a,a24061a,a24062a,a24066a,a24067a,a24070a,a24073a,a24074a,a24075a,a24079a,a24080a,a24083a,a24086a,a24087a,a24088a,a24092a,a24093a,a24096a,a24099a,a24100a,a24101a,a24105a,a24106a,a24109a,a24112a,a24113a,a24114a,a24118a,a24119a,a24122a,a24125a,a24126a,a24127a,a24131a,a24132a,a24135a,a24138a,a24139a,a24140a,a24144a,a24145a,a24148a,a24151a,a24152a,a24153a,a24157a,a24158a,a24161a,a24164a,a24165a,a24166a,a24170a,a24171a,a24174a,a24177a,a24178a,a24179a,a24183a,a24184a,a24187a,a24190a,a24191a,a24192a,a24196a,a24197a,a24200a,a24203a,a24204a,a24205a,a24209a,a24210a,a24213a,a24216a,a24217a,a24218a,a24222a,a24223a,a24226a,a24229a,a24230a,a24231a,a24235a,a24236a,a24239a,a24242a,a24243a,a24244a,a24248a,a24249a,a24252a,a24255a,a24256a,a24257a,a24261a,a24262a,a24265a,a24268a,a24269a,a24270a,a24274a,a24275a,a24278a,a24281a,a24282a,a24283a,a24287a,a24288a,a24291a,a24294a,a24295a,a24296a,a24300a,a24301a,a24304a,a24307a,a24308a,a24309a,a24313a,a24314a,a24317a,a24320a,a24321a,a24322a,a24326a,a24327a,a24330a,a24333a,a24334a,a24335a,a24339a,a24340a,a24343a,a24346a,a24347a,a24348a,a24352a,a24353a,a24356a,a24359a,a24360a,a24361a,a24365a,a24366a,a24369a,a24372a,a24373a,a24374a,a24378a,a24379a,a24382a,a24385a,a24386a,a24387a,a24391a,a24392a,a24395a,a24398a,a24399a,a24400a,a24404a,a24405a,a24408a,a24411a,a24412a,a24413a,a24417a,a24418a,a24421a,a24424a,a24425a,a24426a,a24430a,a24431a,a24434a,a24437a,a24438a,a24439a,a24443a,a24444a,a24447a,a24450a,a24451a,a24452a,a24456a,a24457a,a24460a,a24463a,a24464a,a24465a,a24469a,a24470a,a24473a,a24476a,a24477a,a24478a,a24482a,a24483a,a24486a,a24489a,a24490a,a24491a,a24495a,a24496a,a24499a,a24502a,a24503a,a24504a,a24508a,a24509a,a24512a,a24515a,a24516a,a24517a,a24521a,a24522a,a24525a,a24528a,a24529a,a24530a,a24534a,a24535a,a24538a,a24541a,a24542a,a24543a,a24547a,a24548a,a24551a,a24554a,a24555a,a24556a,a24560a,a24561a,a24564a,a24567a,a24568a,a24569a,a24573a,a24574a,a24577a,a24580a,a24581a,a24582a,a24586a,a24587a,a24590a,a24593a,a24594a,a24595a,a24599a,a24600a,a24603a,a24606a,a24607a,a24608a,a24612a,a24613a,a24616a,a24619a,a24620a,a24621a,a24625a,a24626a,a24629a,a24632a,a24633a,a24634a,a24638a,a24639a,a24642a,a24645a,a24646a,a24647a,a24651a,a24652a,a24655a,a24658a,a24659a,a24660a,a24664a,a24665a,a24668a,a24671a,a24672a,a24673a,a24677a,a24678a,a24681a,a24684a,a24685a,a24686a,a24690a,a24691a,a24694a,a24697a,a24698a,a24699a,a24703a,a24704a,a24707a,a24710a,a24711a,a24712a,a24716a,a24717a,a24720a,a24723a,a24724a,a24725a,a24729a,a24730a,a24733a,a24736a,a24737a,a24738a,a24742a,a24743a,a24746a,a24749a,a24750a,a24751a,a24755a,a24756a,a24759a,a24762a,a24763a,a24764a,a24768a,a24769a,a24772a,a24775a,a24776a,a24777a,a24781a,a24782a,a24785a,a24788a,a24789a,a24790a,a24794a,a24795a,a24798a,a24801a,a24802a,a24803a,a24807a,a24808a,a24811a,a24814a,a24815a,a24816a,a24820a,a24821a,a24824a,a24827a,a24828a,a24829a,a24833a,a24834a,a24837a,a24840a,a24841a,a24842a,a24846a,a24847a,a24850a,a24853a,a24854a,a24855a,a24859a,a24860a,a24863a,a24866a,a24867a,a24868a,a24872a,a24873a,a24876a,a24879a,a24880a,a24881a,a24885a,a24886a,a24889a,a24892a,a24893a,a24894a,a24898a,a24899a,a24902a,a24905a,a24906a,a24907a,a24911a,a24912a,a24915a,a24918a,a24919a,a24920a,a24924a,a24925a,a24928a,a24931a,a24932a,a24933a,a24937a,a24938a,a24941a,a24944a,a24945a,a24946a,a24950a,a24951a,a24954a,a24957a,a24958a,a24959a,a24963a,a24964a,a24967a,a24970a,a24971a,a24972a,a24976a,a24977a,a24980a,a24983a,a24984a,a24985a,a24989a,a24990a,a24993a,a24996a,a24997a,a24998a,a25002a,a25003a,a25006a,a25009a,a25010a,a25011a,a25015a,a25016a,a25019a,a25022a,a25023a,a25024a,a25028a,a25029a,a25032a,a25035a,a25036a,a25037a,a25041a,a25042a,a25045a,a25048a,a25049a,a25050a,a25054a,a25055a,a25058a,a25061a,a25062a,a25063a,a25067a,a25068a,a25071a,a25074a,a25075a,a25076a,a25080a,a25081a,a25084a,a25087a,a25088a,a25089a,a25093a,a25094a,a25097a,a25100a,a25101a,a25102a,a25106a,a25107a,a25110a,a25113a,a25114a,a25115a,a25119a,a25120a,a25123a,a25126a,a25127a,a25128a,a25132a,a25133a,a25136a,a25139a,a25140a,a25141a,a25145a,a25146a,a25149a,a25152a,a25153a,a25154a,a25158a,a25159a,a25162a,a25165a,a25166a,a25167a,a25171a,a25172a,a25175a,a25178a,a25179a,a25180a,a25184a,a25185a,a25188a,a25191a,a25192a,a25193a,a25197a,a25198a,a25201a,a25204a,a25205a,a25206a,a25210a,a25211a,a25214a,a25217a,a25218a,a25219a,a25223a,a25224a,a25227a,a25230a,a25231a,a25232a,a25236a,a25237a,a25240a,a25243a,a25244a,a25245a,a25249a,a25250a,a25253a,a25256a,a25257a,a25258a,a25262a,a25263a,a25266a,a25269a,a25270a,a25271a,a25275a,a25276a,a25279a,a25282a,a25283a,a25284a,a25288a,a25289a,a25292a,a25295a,a25296a,a25297a,a25301a,a25302a,a25305a,a25308a,a25309a,a25310a,a25314a,a25315a,a25318a,a25321a,a25322a,a25323a,a25327a,a25328a,a25331a,a25334a,a25335a,a25336a,a25340a,a25341a,a25344a,a25347a,a25348a,a25349a,a25353a,a25354a,a25357a,a25360a,a25361a,a25362a,a25366a,a25367a,a25370a,a25373a,a25374a,a25375a,a25379a,a25380a,a25383a,a25386a,a25387a,a25388a,a25392a,a25393a,a25396a,a25399a,a25400a,a25401a,a25405a,a25406a,a25409a,a25412a,a25413a,a25414a,a25418a,a25419a,a25422a,a25425a,a25426a,a25427a,a25431a,a25432a,a25435a,a25438a,a25439a,a25440a,a25444a,a25445a,a25448a,a25451a,a25452a,a25453a,a25457a,a25458a,a25461a,a25464a,a25465a,a25466a,a25470a,a25471a,a25474a,a25477a,a25478a,a25479a,a25483a,a25484a,a25487a,a25490a,a25491a,a25492a,a25496a,a25497a,a25500a,a25503a,a25504a,a25505a,a25509a,a25510a,a25513a,a25516a,a25517a,a25518a,a25522a,a25523a,a25526a,a25529a,a25530a,a25531a,a25535a,a25536a,a25539a,a25542a,a25543a,a25544a,a25548a,a25549a,a25552a,a25555a,a25556a,a25557a,a25561a,a25562a,a25565a,a25568a,a25569a,a25570a,a25574a,a25575a,a25578a,a25581a,a25582a,a25583a,a25587a,a25588a,a25591a,a25594a,a25595a,a25596a,a25600a,a25601a,a25604a,a25607a,a25608a,a25609a,a25613a,a25614a,a25617a,a25620a,a25621a,a25622a,a25626a,a25627a,a25630a,a25633a,a25634a,a25635a,a25639a,a25640a,a25643a,a25646a,a25647a,a25648a,a25652a,a25653a,a25656a,a25659a,a25660a,a25661a,a25665a,a25666a,a25669a,a25672a,a25673a,a25674a,a25678a,a25679a,a25682a,a25685a,a25686a,a25687a,a25691a,a25692a,a25695a,a25698a,a25699a,a25700a,a25704a,a25705a,a25708a,a25711a,a25712a,a25713a,a25717a,a25718a,a25721a,a25724a,a25725a,a25726a,a25730a,a25731a,a25734a,a25737a,a25738a,a25739a,a25743a,a25744a,a25747a,a25750a,a25751a,a25752a,a25756a,a25757a,a25760a,a25763a,a25764a,a25765a,a25769a,a25770a,a25773a,a25776a,a25777a,a25778a,a25782a,a25783a,a25786a,a25789a,a25790a,a25791a,a25795a,a25796a,a25799a,a25802a,a25803a,a25804a,a25808a,a25809a,a25812a,a25815a,a25816a,a25817a,a25821a,a25822a,a25825a,a25828a,a25829a,a25830a,a25834a,a25835a,a25838a,a25841a,a25842a,a25843a,a25847a,a25848a,a25851a,a25854a,a25855a,a25856a,a25860a,a25861a,a25864a,a25867a,a25868a,a25869a,a25873a,a25874a,a25877a,a25880a,a25881a,a25882a,a25886a,a25887a,a25890a,a25893a,a25894a,a25895a,a25899a,a25900a,a25903a,a25906a,a25907a,a25908a,a25912a,a25913a,a25916a,a25919a,a25920a,a25921a,a25925a,a25926a,a25929a,a25932a,a25933a,a25934a,a25938a,a25939a,a25942a,a25945a,a25946a,a25947a,a25951a,a25952a,a25955a,a25958a,a25959a,a25960a,a25964a,a25965a,a25968a,a25971a,a25972a,a25973a,a25977a,a25978a,a25981a,a25984a,a25985a,a25986a,a25990a,a25991a,a25994a,a25997a,a25998a,a25999a,a26003a,a26004a,a26007a,a26010a,a26011a,a26012a,a26016a,a26017a,a26020a,a26023a,a26024a,a26025a,a26029a,a26030a,a26033a,a26036a,a26037a,a26038a,a26042a,a26043a,a26046a,a26049a,a26050a,a26051a,a26055a,a26056a,a26059a,a26062a,a26063a,a26064a,a26068a,a26069a,a26072a,a26075a,a26076a,a26077a,a26081a,a26082a,a26085a,a26088a,a26089a,a26090a,a26094a,a26095a,a26098a,a26101a,a26102a,a26103a,a26107a,a26108a,a26111a,a26114a,a26115a,a26116a,a26120a,a26121a,a26124a,a26127a,a26128a,a26129a,a26133a,a26134a,a26137a,a26140a,a26141a,a26142a,a26146a,a26147a,a26150a,a26153a,a26154a,a26155a,a26159a,a26160a,a26163a,a26166a,a26167a,a26168a,a26172a,a26173a,a26176a,a26179a,a26180a,a26181a,a26185a,a26186a,a26189a,a26192a,a26193a,a26194a,a26198a,a26199a,a26202a,a26205a,a26206a,a26207a,a26211a,a26212a,a26215a,a26218a,a26219a,a26220a,a26223a,a26226a,a26227a,a26230a,a26233a,a26234a,a26235a,a26239a,a26240a,a26243a,a26246a,a26247a,a26248a,a26251a,a26254a,a26255a,a26258a,a26261a,a26262a,a26263a,a26267a,a26268a,a26271a,a26274a,a26275a,a26276a,a26279a,a26282a,a26283a,a26286a,a26289a,a26290a,a26291a,a26295a,a26296a,a26299a,a26302a,a26303a,a26304a,a26307a,a26310a,a26311a,a26314a,a26317a,a26318a,a26319a,a26323a,a26324a,a26327a,a26330a,a26331a,a26332a,a26335a,a26338a,a26339a,a26342a,a26345a,a26346a,a26347a,a26351a,a26352a,a26355a,a26358a,a26359a,a26360a,a26363a,a26366a,a26367a,a26370a,a26373a,a26374a,a26375a,a26379a,a26380a,a26383a,a26386a,a26387a,a26388a,a26391a,a26394a,a26395a,a26398a,a26401a,a26402a,a26403a,a26407a,a26408a,a26411a,a26414a,a26415a,a26416a,a26419a,a26422a,a26423a,a26426a,a26429a,a26430a,a26431a,a26435a,a26436a,a26439a,a26442a,a26443a,a26444a,a26447a,a26450a,a26451a,a26454a,a26457a,a26458a,a26459a,a26463a,a26464a,a26467a,a26470a,a26471a,a26472a,a26475a,a26478a,a26479a,a26482a,a26485a,a26486a,a26487a,a26491a,a26492a,a26495a,a26498a,a26499a,a26500a,a26503a,a26506a,a26507a,a26510a,a26513a,a26514a,a26515a,a26519a,a26520a,a26523a,a26526a,a26527a,a26528a,a26531a,a26534a,a26535a,a26538a,a26541a,a26542a,a26543a,a26547a,a26548a,a26551a,a26554a,a26555a,a26556a,a26559a,a26562a,a26563a,a26566a,a26569a,a26570a,a26571a,a26575a,a26576a,a26579a,a26582a,a26583a,a26584a,a26587a,a26590a,a26591a,a26594a,a26597a,a26598a,a26599a,a26603a,a26604a,a26607a,a26610a,a26611a,a26612a,a26615a,a26618a,a26619a,a26622a,a26625a,a26626a,a26627a,a26631a,a26632a,a26635a,a26638a,a26639a,a26640a,a26643a,a26646a,a26647a,a26650a,a26653a,a26654a,a26655a,a26659a,a26660a,a26663a,a26666a,a26667a,a26668a,a26671a,a26674a,a26675a,a26678a,a26681a,a26682a,a26683a,a26687a,a26688a,a26691a,a26694a,a26695a,a26696a,a26699a,a26702a,a26703a,a26706a,a26709a,a26710a,a26711a,a26715a,a26716a,a26719a,a26722a,a26723a,a26724a,a26727a,a26730a,a26731a,a26734a,a26737a,a26738a,a26739a,a26743a,a26744a,a26747a,a26750a,a26751a,a26752a,a26755a,a26758a,a26759a,a26762a,a26765a,a26766a,a26767a,a26771a,a26772a,a26775a,a26778a,a26779a,a26780a,a26783a,a26786a,a26787a,a26790a,a26793a,a26794a,a26795a,a26799a,a26800a,a26803a,a26806a,a26807a,a26808a,a26811a,a26814a,a26815a,a26818a,a26821a,a26822a,a26823a,a26827a,a26828a,a26831a,a26834a,a26835a,a26836a,a26839a,a26842a,a26843a,a26846a,a26849a,a26850a,a26851a,a26855a,a26856a,a26859a,a26862a,a26863a,a26864a,a26867a,a26870a,a26871a,a26874a,a26877a,a26878a,a26879a,a26883a,a26884a,a26887a,a26890a,a26891a,a26892a,a26895a,a26898a,a26899a,a26902a,a26905a,a26906a,a26907a,a26911a,a26912a,a26915a,a26918a,a26919a,a26920a,a26923a,a26926a,a26927a,a26930a,a26933a,a26934a,a26935a,a26939a,a26940a,a26943a,a26946a,a26947a,a26948a,a26951a,a26954a,a26955a,a26958a,a26961a,a26962a,a26963a,a26967a,a26968a,a26971a,a26974a,a26975a,a26976a,a26979a,a26982a,a26983a,a26986a,a26989a,a26990a,a26991a: std_logic;
begin
A106 <=( a3355a ) or ( a2236a );
a1a <=( a26991a and a26976a );
a2a <=( a26963a and a26948a );
a3a <=( a26935a and a26920a );
a4a <=( a26907a and a26892a );
a5a <=( a26879a and a26864a );
a6a <=( a26851a and a26836a );
a7a <=( a26823a and a26808a );
a8a <=( a26795a and a26780a );
a9a <=( a26767a and a26752a );
a10a <=( a26739a and a26724a );
a11a <=( a26711a and a26696a );
a12a <=( a26683a and a26668a );
a13a <=( a26655a and a26640a );
a14a <=( a26627a and a26612a );
a15a <=( a26599a and a26584a );
a16a <=( a26571a and a26556a );
a17a <=( a26543a and a26528a );
a18a <=( a26515a and a26500a );
a19a <=( a26487a and a26472a );
a20a <=( a26459a and a26444a );
a21a <=( a26431a and a26416a );
a22a <=( a26403a and a26388a );
a23a <=( a26375a and a26360a );
a24a <=( a26347a and a26332a );
a25a <=( a26319a and a26304a );
a26a <=( a26291a and a26276a );
a27a <=( a26263a and a26248a );
a28a <=( a26235a and a26220a );
a29a <=( a26207a and a26194a );
a30a <=( a26181a and a26168a );
a31a <=( a26155a and a26142a );
a32a <=( a26129a and a26116a );
a33a <=( a26103a and a26090a );
a34a <=( a26077a and a26064a );
a35a <=( a26051a and a26038a );
a36a <=( a26025a and a26012a );
a37a <=( a25999a and a25986a );
a38a <=( a25973a and a25960a );
a39a <=( a25947a and a25934a );
a40a <=( a25921a and a25908a );
a41a <=( a25895a and a25882a );
a42a <=( a25869a and a25856a );
a43a <=( a25843a and a25830a );
a44a <=( a25817a and a25804a );
a45a <=( a25791a and a25778a );
a46a <=( a25765a and a25752a );
a47a <=( a25739a and a25726a );
a48a <=( a25713a and a25700a );
a49a <=( a25687a and a25674a );
a50a <=( a25661a and a25648a );
a51a <=( a25635a and a25622a );
a52a <=( a25609a and a25596a );
a53a <=( a25583a and a25570a );
a54a <=( a25557a and a25544a );
a55a <=( a25531a and a25518a );
a56a <=( a25505a and a25492a );
a57a <=( a25479a and a25466a );
a58a <=( a25453a and a25440a );
a59a <=( a25427a and a25414a );
a60a <=( a25401a and a25388a );
a61a <=( a25375a and a25362a );
a62a <=( a25349a and a25336a );
a63a <=( a25323a and a25310a );
a64a <=( a25297a and a25284a );
a65a <=( a25271a and a25258a );
a66a <=( a25245a and a25232a );
a67a <=( a25219a and a25206a );
a68a <=( a25193a and a25180a );
a69a <=( a25167a and a25154a );
a70a <=( a25141a and a25128a );
a71a <=( a25115a and a25102a );
a72a <=( a25089a and a25076a );
a73a <=( a25063a and a25050a );
a74a <=( a25037a and a25024a );
a75a <=( a25011a and a24998a );
a76a <=( a24985a and a24972a );
a77a <=( a24959a and a24946a );
a78a <=( a24933a and a24920a );
a79a <=( a24907a and a24894a );
a80a <=( a24881a and a24868a );
a81a <=( a24855a and a24842a );
a82a <=( a24829a and a24816a );
a83a <=( a24803a and a24790a );
a84a <=( a24777a and a24764a );
a85a <=( a24751a and a24738a );
a86a <=( a24725a and a24712a );
a87a <=( a24699a and a24686a );
a88a <=( a24673a and a24660a );
a89a <=( a24647a and a24634a );
a90a <=( a24621a and a24608a );
a91a <=( a24595a and a24582a );
a92a <=( a24569a and a24556a );
a93a <=( a24543a and a24530a );
a94a <=( a24517a and a24504a );
a95a <=( a24491a and a24478a );
a96a <=( a24465a and a24452a );
a97a <=( a24439a and a24426a );
a98a <=( a24413a and a24400a );
a99a <=( a24387a and a24374a );
a100a <=( a24361a and a24348a );
a101a <=( a24335a and a24322a );
a102a <=( a24309a and a24296a );
a103a <=( a24283a and a24270a );
a104a <=( a24257a and a24244a );
a105a <=( a24231a and a24218a );
a106a <=( a24205a and a24192a );
a107a <=( a24179a and a24166a );
a108a <=( a24153a and a24140a );
a109a <=( a24127a and a24114a );
a110a <=( a24101a and a24088a );
a111a <=( a24075a and a24062a );
a112a <=( a24049a and a24036a );
a113a <=( a24023a and a24010a );
a114a <=( a23997a and a23984a );
a115a <=( a23971a and a23958a );
a116a <=( a23945a and a23932a );
a117a <=( a23919a and a23906a );
a118a <=( a23893a and a23880a );
a119a <=( a23867a and a23854a );
a120a <=( a23841a and a23828a );
a121a <=( a23815a and a23802a );
a122a <=( a23789a and a23776a );
a123a <=( a23763a and a23750a );
a124a <=( a23737a and a23724a );
a125a <=( a23711a and a23698a );
a126a <=( a23685a and a23672a );
a127a <=( a23659a and a23646a );
a128a <=( a23633a and a23620a );
a129a <=( a23607a and a23594a );
a130a <=( a23581a and a23568a );
a131a <=( a23555a and a23542a );
a132a <=( a23529a and a23516a );
a133a <=( a23503a and a23490a );
a134a <=( a23477a and a23464a );
a135a <=( a23451a and a23438a );
a136a <=( a23425a and a23412a );
a137a <=( a23399a and a23386a );
a138a <=( a23373a and a23360a );
a139a <=( a23347a and a23334a );
a140a <=( a23321a and a23308a );
a141a <=( a23295a and a23282a );
a142a <=( a23269a and a23256a );
a143a <=( a23243a and a23230a );
a144a <=( a23219a and a23206a );
a145a <=( a23195a and a23182a );
a146a <=( a23171a and a23158a );
a147a <=( a23147a and a23134a );
a148a <=( a23123a and a23110a );
a149a <=( a23099a and a23086a );
a150a <=( a23075a and a23062a );
a151a <=( a23051a and a23038a );
a152a <=( a23027a and a23014a );
a153a <=( a23003a and a22990a );
a154a <=( a22979a and a22966a );
a155a <=( a22955a and a22942a );
a156a <=( a22931a and a22918a );
a157a <=( a22907a and a22894a );
a158a <=( a22883a and a22870a );
a159a <=( a22859a and a22846a );
a160a <=( a22835a and a22822a );
a161a <=( a22811a and a22798a );
a162a <=( a22787a and a22774a );
a163a <=( a22763a and a22750a );
a164a <=( a22739a and a22726a );
a165a <=( a22715a and a22702a );
a166a <=( a22691a and a22678a );
a167a <=( a22667a and a22654a );
a168a <=( a22643a and a22630a );
a169a <=( a22619a and a22606a );
a170a <=( a22595a and a22582a );
a171a <=( a22571a and a22558a );
a172a <=( a22547a and a22534a );
a173a <=( a22523a and a22510a );
a174a <=( a22499a and a22486a );
a175a <=( a22475a and a22462a );
a176a <=( a22451a and a22438a );
a177a <=( a22427a and a22414a );
a178a <=( a22403a and a22390a );
a179a <=( a22379a and a22366a );
a180a <=( a22355a and a22342a );
a181a <=( a22331a and a22318a );
a182a <=( a22307a and a22294a );
a183a <=( a22283a and a22270a );
a184a <=( a22259a and a22246a );
a185a <=( a22235a and a22222a );
a186a <=( a22211a and a22198a );
a187a <=( a22187a and a22174a );
a188a <=( a22163a and a22150a );
a189a <=( a22139a and a22126a );
a190a <=( a22115a and a22102a );
a191a <=( a22091a and a22078a );
a192a <=( a22067a and a22054a );
a193a <=( a22043a and a22030a );
a194a <=( a22019a and a22006a );
a195a <=( a21995a and a21982a );
a196a <=( a21971a and a21958a );
a197a <=( a21947a and a21934a );
a198a <=( a21923a and a21910a );
a199a <=( a21899a and a21886a );
a200a <=( a21875a and a21862a );
a201a <=( a21851a and a21838a );
a202a <=( a21827a and a21814a );
a203a <=( a21803a and a21790a );
a204a <=( a21779a and a21766a );
a205a <=( a21755a and a21742a );
a206a <=( a21731a and a21718a );
a207a <=( a21707a and a21694a );
a208a <=( a21683a and a21670a );
a209a <=( a21659a and a21646a );
a210a <=( a21635a and a21622a );
a211a <=( a21611a and a21598a );
a212a <=( a21587a and a21574a );
a213a <=( a21563a and a21550a );
a214a <=( a21539a and a21526a );
a215a <=( a21515a and a21502a );
a216a <=( a21491a and a21478a );
a217a <=( a21467a and a21454a );
a218a <=( a21443a and a21430a );
a219a <=( a21419a and a21406a );
a220a <=( a21395a and a21382a );
a221a <=( a21371a and a21358a );
a222a <=( a21347a and a21334a );
a223a <=( a21323a and a21310a );
a224a <=( a21299a and a21286a );
a225a <=( a21275a and a21262a );
a226a <=( a21251a and a21238a );
a227a <=( a21227a and a21214a );
a228a <=( a21203a and a21190a );
a229a <=( a21179a and a21166a );
a230a <=( a21155a and a21142a );
a231a <=( a21131a and a21118a );
a232a <=( a21107a and a21094a );
a233a <=( a21083a and a21070a );
a234a <=( a21059a and a21046a );
a235a <=( a21035a and a21022a );
a236a <=( a21011a and a20998a );
a237a <=( a20987a and a20974a );
a238a <=( a20963a and a20950a );
a239a <=( a20939a and a20926a );
a240a <=( a20915a and a20902a );
a241a <=( a20891a and a20878a );
a242a <=( a20867a and a20854a );
a243a <=( a20843a and a20830a );
a244a <=( a20819a and a20806a );
a245a <=( a20795a and a20782a );
a246a <=( a20771a and a20758a );
a247a <=( a20747a and a20734a );
a248a <=( a20723a and a20710a );
a249a <=( a20699a and a20686a );
a250a <=( a20675a and a20662a );
a251a <=( a20651a and a20638a );
a252a <=( a20627a and a20614a );
a253a <=( a20603a and a20590a );
a254a <=( a20579a and a20566a );
a255a <=( a20555a and a20542a );
a256a <=( a20531a and a20518a );
a257a <=( a20507a and a20494a );
a258a <=( a20483a and a20470a );
a259a <=( a20459a and a20446a );
a260a <=( a20435a and a20422a );
a261a <=( a20411a and a20398a );
a262a <=( a20387a and a20374a );
a263a <=( a20363a and a20350a );
a264a <=( a20339a and a20326a );
a265a <=( a20315a and a20302a );
a266a <=( a20291a and a20278a );
a267a <=( a20267a and a20254a );
a268a <=( a20243a and a20230a );
a269a <=( a20219a and a20206a );
a270a <=( a20195a and a20182a );
a271a <=( a20171a and a20158a );
a272a <=( a20147a and a20134a );
a273a <=( a20123a and a20110a );
a274a <=( a20099a and a20086a );
a275a <=( a20075a and a20062a );
a276a <=( a20051a and a20038a );
a277a <=( a20027a and a20014a );
a278a <=( a20003a and a19990a );
a279a <=( a19979a and a19966a );
a280a <=( a19955a and a19942a );
a281a <=( a19931a and a19918a );
a282a <=( a19907a and a19894a );
a283a <=( a19883a and a19870a );
a284a <=( a19859a and a19846a );
a285a <=( a19835a and a19822a );
a286a <=( a19811a and a19798a );
a287a <=( a19787a and a19774a );
a288a <=( a19763a and a19750a );
a289a <=( a19739a and a19726a );
a290a <=( a19715a and a19702a );
a291a <=( a19691a and a19678a );
a292a <=( a19667a and a19654a );
a293a <=( a19643a and a19630a );
a294a <=( a19619a and a19606a );
a295a <=( a19595a and a19582a );
a296a <=( a19571a and a19558a );
a297a <=( a19547a and a19534a );
a298a <=( a19523a and a19510a );
a299a <=( a19499a and a19486a );
a300a <=( a19475a and a19462a );
a301a <=( a19451a and a19438a );
a302a <=( a19427a and a19414a );
a303a <=( a19403a and a19390a );
a304a <=( a19379a and a19366a );
a305a <=( a19355a and a19342a );
a306a <=( a19331a and a19318a );
a307a <=( a19307a and a19294a );
a308a <=( a19283a and a19270a );
a309a <=( a19259a and a19246a );
a310a <=( a19235a and a19222a );
a311a <=( a19211a and a19198a );
a312a <=( a19187a and a19174a );
a313a <=( a19163a and a19150a );
a314a <=( a19139a and a19126a );
a315a <=( a19115a and a19102a );
a316a <=( a19091a and a19078a );
a317a <=( a19067a and a19054a );
a318a <=( a19043a and a19030a );
a319a <=( a19019a and a19008a );
a320a <=( a18997a and a18986a );
a321a <=( a18975a and a18964a );
a322a <=( a18953a and a18942a );
a323a <=( a18931a and a18920a );
a324a <=( a18909a and a18898a );
a325a <=( a18887a and a18876a );
a326a <=( a18865a and a18854a );
a327a <=( a18843a and a18832a );
a328a <=( a18821a and a18810a );
a329a <=( a18799a and a18788a );
a330a <=( a18777a and a18766a );
a331a <=( a18755a and a18744a );
a332a <=( a18733a and a18722a );
a333a <=( a18711a and a18700a );
a334a <=( a18689a and a18678a );
a335a <=( a18667a and a18656a );
a336a <=( a18645a and a18634a );
a337a <=( a18623a and a18612a );
a338a <=( a18601a and a18590a );
a339a <=( a18579a and a18568a );
a340a <=( a18557a and a18546a );
a341a <=( a18535a and a18524a );
a342a <=( a18513a and a18502a );
a343a <=( a18491a and a18480a );
a344a <=( a18469a and a18458a );
a345a <=( a18447a and a18436a );
a346a <=( a18425a and a18414a );
a347a <=( a18403a and a18392a );
a348a <=( a18381a and a18370a );
a349a <=( a18359a and a18348a );
a350a <=( a18337a and a18326a );
a351a <=( a18315a and a18304a );
a352a <=( a18293a and a18282a );
a353a <=( a18271a and a18260a );
a354a <=( a18249a and a18238a );
a355a <=( a18227a and a18216a );
a356a <=( a18205a and a18194a );
a357a <=( a18183a and a18172a );
a358a <=( a18161a and a18150a );
a359a <=( a18139a and a18128a );
a360a <=( a18117a and a18106a );
a361a <=( a18095a and a18084a );
a362a <=( a18073a and a18062a );
a363a <=( a18051a and a18040a );
a364a <=( a18029a and a18018a );
a365a <=( a18007a and a17996a );
a366a <=( a17985a and a17974a );
a367a <=( a17963a and a17952a );
a368a <=( a17941a and a17930a );
a369a <=( a17919a and a17908a );
a370a <=( a17897a and a17886a );
a371a <=( a17875a and a17864a );
a372a <=( a17853a and a17842a );
a373a <=( a17831a and a17820a );
a374a <=( a17809a and a17798a );
a375a <=( a17787a and a17776a );
a376a <=( a17765a and a17754a );
a377a <=( a17743a and a17732a );
a378a <=( a17721a and a17710a );
a379a <=( a17699a and a17688a );
a380a <=( a17677a and a17666a );
a381a <=( a17655a and a17644a );
a382a <=( a17633a and a17622a );
a383a <=( a17611a and a17600a );
a384a <=( a17589a and a17578a );
a385a <=( a17567a and a17556a );
a386a <=( a17545a and a17534a );
a387a <=( a17523a and a17512a );
a388a <=( a17501a and a17490a );
a389a <=( a17479a and a17468a );
a390a <=( a17457a and a17446a );
a391a <=( a17435a and a17424a );
a392a <=( a17413a and a17402a );
a393a <=( a17391a and a17380a );
a394a <=( a17369a and a17358a );
a395a <=( a17347a and a17336a );
a396a <=( a17325a and a17314a );
a397a <=( a17303a and a17292a );
a398a <=( a17281a and a17270a );
a399a <=( a17259a and a17248a );
a400a <=( a17237a and a17226a );
a401a <=( a17215a and a17204a );
a402a <=( a17193a and a17182a );
a403a <=( a17171a and a17160a );
a404a <=( a17149a and a17138a );
a405a <=( a17127a and a17116a );
a406a <=( a17105a and a17094a );
a407a <=( a17083a and a17072a );
a408a <=( a17061a and a17050a );
a409a <=( a17039a and a17028a );
a410a <=( a17017a and a17006a );
a411a <=( a16995a and a16984a );
a412a <=( a16973a and a16962a );
a413a <=( a16951a and a16940a );
a414a <=( a16929a and a16918a );
a415a <=( a16907a and a16896a );
a416a <=( a16885a and a16874a );
a417a <=( a16863a and a16852a );
a418a <=( a16841a and a16830a );
a419a <=( a16819a and a16808a );
a420a <=( a16797a and a16786a );
a421a <=( a16775a and a16764a );
a422a <=( a16753a and a16742a );
a423a <=( a16731a and a16720a );
a424a <=( a16709a and a16698a );
a425a <=( a16687a and a16676a );
a426a <=( a16665a and a16654a );
a427a <=( a16643a and a16632a );
a428a <=( a16621a and a16610a );
a429a <=( a16599a and a16588a );
a430a <=( a16577a and a16566a );
a431a <=( a16555a and a16544a );
a432a <=( a16533a and a16522a );
a433a <=( a16511a and a16500a );
a434a <=( a16489a and a16478a );
a435a <=( a16467a and a16456a );
a436a <=( a16445a and a16434a );
a437a <=( a16423a and a16412a );
a438a <=( a16401a and a16390a );
a439a <=( a16379a and a16368a );
a440a <=( a16357a and a16346a );
a441a <=( a16335a and a16324a );
a442a <=( a16313a and a16302a );
a443a <=( a16291a and a16280a );
a444a <=( a16269a and a16258a );
a445a <=( a16247a and a16236a );
a446a <=( a16225a and a16214a );
a447a <=( a16203a and a16192a );
a448a <=( a16181a and a16170a );
a449a <=( a16159a and a16148a );
a450a <=( a16137a and a16126a );
a451a <=( a16115a and a16104a );
a452a <=( a16093a and a16082a );
a453a <=( a16071a and a16060a );
a454a <=( a16049a and a16038a );
a455a <=( a16027a and a16016a );
a456a <=( a16005a and a15994a );
a457a <=( a15983a and a15972a );
a458a <=( a15961a and a15950a );
a459a <=( a15939a and a15928a );
a460a <=( a15917a and a15906a );
a461a <=( a15895a and a15884a );
a462a <=( a15873a and a15862a );
a463a <=( a15851a and a15840a );
a464a <=( a15829a and a15818a );
a465a <=( a15807a and a15796a );
a466a <=( a15785a and a15774a );
a467a <=( a15763a and a15752a );
a468a <=( a15741a and a15730a );
a469a <=( a15719a and a15708a );
a470a <=( a15697a and a15686a );
a471a <=( a15675a and a15664a );
a472a <=( a15653a and a15642a );
a473a <=( a15631a and a15620a );
a474a <=( a15609a and a15598a );
a475a <=( a15587a and a15576a );
a476a <=( a15565a and a15554a );
a477a <=( a15543a and a15532a );
a478a <=( a15521a and a15510a );
a479a <=( a15499a and a15488a );
a480a <=( a15477a and a15466a );
a481a <=( a15455a and a15444a );
a482a <=( a15433a and a15422a );
a483a <=( a15411a and a15400a );
a484a <=( a15389a and a15378a );
a485a <=( a15367a and a15356a );
a486a <=( a15345a and a15334a );
a487a <=( a15323a and a15312a );
a488a <=( a15301a and a15290a );
a489a <=( a15279a and a15268a );
a490a <=( a15257a and a15246a );
a491a <=( a15235a and a15224a );
a492a <=( a15213a and a15202a );
a493a <=( a15191a and a15180a );
a494a <=( a15169a and a15158a );
a495a <=( a15147a and a15136a );
a496a <=( a15125a and a15114a );
a497a <=( a15103a and a15092a );
a498a <=( a15081a and a15070a );
a499a <=( a15059a and a15048a );
a500a <=( a15037a and a15026a );
a501a <=( a15015a and a15004a );
a502a <=( a14993a and a14982a );
a503a <=( a14971a and a14960a );
a504a <=( a14949a and a14938a );
a505a <=( a14927a and a14916a );
a506a <=( a14905a and a14894a );
a507a <=( a14883a and a14872a );
a508a <=( a14861a and a14850a );
a509a <=( a14839a and a14828a );
a510a <=( a14817a and a14806a );
a511a <=( a14795a and a14784a );
a512a <=( a14773a and a14762a );
a513a <=( a14751a and a14740a );
a514a <=( a14729a and a14718a );
a515a <=( a14707a and a14696a );
a516a <=( a14685a and a14674a );
a517a <=( a14663a and a14652a );
a518a <=( a14641a and a14630a );
a519a <=( a14619a and a14608a );
a520a <=( a14597a and a14586a );
a521a <=( a14575a and a14564a );
a522a <=( a14553a and a14542a );
a523a <=( a14531a and a14520a );
a524a <=( a14509a and a14498a );
a525a <=( a14487a and a14476a );
a526a <=( a14465a and a14454a );
a527a <=( a14443a and a14432a );
a528a <=( a14421a and a14410a );
a529a <=( a14399a and a14388a );
a530a <=( a14377a and a14366a );
a531a <=( a14355a and a14344a );
a532a <=( a14333a and a14322a );
a533a <=( a14311a and a14300a );
a534a <=( a14289a and a14278a );
a535a <=( a14267a and a14256a );
a536a <=( a14245a and a14234a );
a537a <=( a14223a and a14212a );
a538a <=( a14201a and a14190a );
a539a <=( a14179a and a14168a );
a540a <=( a14157a and a14146a );
a541a <=( a14135a and a14124a );
a542a <=( a14113a and a14102a );
a543a <=( a14091a and a14080a );
a544a <=( a14069a and a14058a );
a545a <=( a14047a and a14036a );
a546a <=( a14025a and a14014a );
a547a <=( a14003a and a13992a );
a548a <=( a13981a and a13970a );
a549a <=( a13959a and a13948a );
a550a <=( a13937a and a13926a );
a551a <=( a13915a and a13904a );
a552a <=( a13893a and a13882a );
a553a <=( a13871a and a13860a );
a554a <=( a13849a and a13838a );
a555a <=( a13827a and a13816a );
a556a <=( a13805a and a13794a );
a557a <=( a13783a and a13772a );
a558a <=( a13761a and a13750a );
a559a <=( a13739a and a13728a );
a560a <=( a13717a and a13706a );
a561a <=( a13695a and a13684a );
a562a <=( a13673a and a13662a );
a563a <=( a13651a and a13640a );
a564a <=( a13629a and a13618a );
a565a <=( a13607a and a13596a );
a566a <=( a13585a and a13574a );
a567a <=( a13563a and a13552a );
a568a <=( a13541a and a13530a );
a569a <=( a13519a and a13508a );
a570a <=( a13497a and a13486a );
a571a <=( a13475a and a13464a );
a572a <=( a13453a and a13442a );
a573a <=( a13431a and a13420a );
a574a <=( a13409a and a13398a );
a575a <=( a13387a and a13376a );
a576a <=( a13365a and a13354a );
a577a <=( a13343a and a13332a );
a578a <=( a13321a and a13310a );
a579a <=( a13299a and a13288a );
a580a <=( a13277a and a13266a );
a581a <=( a13255a and a13244a );
a582a <=( a13233a and a13222a );
a583a <=( a13211a and a13200a );
a584a <=( a13189a and a13178a );
a585a <=( a13167a and a13156a );
a586a <=( a13145a and a13134a );
a587a <=( a13123a and a13112a );
a588a <=( a13101a and a13090a );
a589a <=( a13079a and a13068a );
a590a <=( a13057a and a13046a );
a591a <=( a13035a and a13024a );
a592a <=( a13013a and a13002a );
a593a <=( a12991a and a12980a );
a594a <=( a12969a and a12958a );
a595a <=( a12947a and a12936a );
a596a <=( a12925a and a12914a );
a597a <=( a12903a and a12892a );
a598a <=( a12881a and a12870a );
a599a <=( a12859a and a12848a );
a600a <=( a12837a and a12826a );
a601a <=( a12815a and a12804a );
a602a <=( a12793a and a12782a );
a603a <=( a12771a and a12760a );
a604a <=( a12749a and a12738a );
a605a <=( a12727a and a12716a );
a606a <=( a12705a and a12694a );
a607a <=( a12683a and a12672a );
a608a <=( a12661a and a12650a );
a609a <=( a12639a and a12628a );
a610a <=( a12617a and a12606a );
a611a <=( a12595a and a12584a );
a612a <=( a12573a and a12562a );
a613a <=( a12551a and a12540a );
a614a <=( a12529a and a12518a );
a615a <=( a12507a and a12496a );
a616a <=( a12485a and a12474a );
a617a <=( a12463a and a12452a );
a618a <=( a12441a and a12430a );
a619a <=( a12419a and a12408a );
a620a <=( a12397a and a12386a );
a621a <=( a12375a and a12364a );
a622a <=( a12353a and a12342a );
a623a <=( a12331a and a12320a );
a624a <=( a12309a and a12298a );
a625a <=( a12287a and a12276a );
a626a <=( a12265a and a12254a );
a627a <=( a12243a and a12232a );
a628a <=( a12221a and a12210a );
a629a <=( a12201a and a12190a );
a630a <=( a12181a and a12170a );
a631a <=( a12161a and a12150a );
a632a <=( a12141a and a12130a );
a633a <=( a12121a and a12110a );
a634a <=( a12101a and a12090a );
a635a <=( a12081a and a12070a );
a636a <=( a12061a and a12050a );
a637a <=( a12041a and a12030a );
a638a <=( a12021a and a12010a );
a639a <=( a12001a and a11990a );
a640a <=( a11981a and a11970a );
a641a <=( a11961a and a11950a );
a642a <=( a11941a and a11930a );
a643a <=( a11921a and a11910a );
a644a <=( a11901a and a11890a );
a645a <=( a11881a and a11870a );
a646a <=( a11861a and a11850a );
a647a <=( a11841a and a11830a );
a648a <=( a11821a and a11810a );
a649a <=( a11801a and a11790a );
a650a <=( a11781a and a11770a );
a651a <=( a11761a and a11750a );
a652a <=( a11741a and a11730a );
a653a <=( a11721a and a11710a );
a654a <=( a11701a and a11690a );
a655a <=( a11681a and a11670a );
a656a <=( a11661a and a11650a );
a657a <=( a11641a and a11630a );
a658a <=( a11621a and a11610a );
a659a <=( a11601a and a11590a );
a660a <=( a11581a and a11570a );
a661a <=( a11561a and a11550a );
a662a <=( a11541a and a11530a );
a663a <=( a11521a and a11510a );
a664a <=( a11501a and a11490a );
a665a <=( a11481a and a11470a );
a666a <=( a11461a and a11450a );
a667a <=( a11441a and a11430a );
a668a <=( a11421a and a11410a );
a669a <=( a11401a and a11390a );
a670a <=( a11381a and a11370a );
a671a <=( a11361a and a11350a );
a672a <=( a11341a and a11330a );
a673a <=( a11321a and a11310a );
a674a <=( a11301a and a11290a );
a675a <=( a11281a and a11270a );
a676a <=( a11261a and a11250a );
a677a <=( a11241a and a11230a );
a678a <=( a11221a and a11210a );
a679a <=( a11201a and a11190a );
a680a <=( a11181a and a11170a );
a681a <=( a11161a and a11150a );
a682a <=( a11141a and a11130a );
a683a <=( a11121a and a11110a );
a684a <=( a11101a and a11090a );
a685a <=( a11081a and a11070a );
a686a <=( a11061a and a11050a );
a687a <=( a11041a and a11030a );
a688a <=( a11021a and a11010a );
a689a <=( a11001a and a10990a );
a690a <=( a10981a and a10970a );
a691a <=( a10961a and a10950a );
a692a <=( a10941a and a10930a );
a693a <=( a10921a and a10910a );
a694a <=( a10901a and a10890a );
a695a <=( a10881a and a10870a );
a696a <=( a10861a and a10850a );
a697a <=( a10841a and a10830a );
a698a <=( a10821a and a10810a );
a699a <=( a10801a and a10790a );
a700a <=( a10781a and a10770a );
a701a <=( a10761a and a10750a );
a702a <=( a10741a and a10730a );
a703a <=( a10721a and a10710a );
a704a <=( a10701a and a10690a );
a705a <=( a10681a and a10670a );
a706a <=( a10661a and a10650a );
a707a <=( a10641a and a10630a );
a708a <=( a10621a and a10610a );
a709a <=( a10601a and a10590a );
a710a <=( a10581a and a10570a );
a711a <=( a10561a and a10550a );
a712a <=( a10541a and a10530a );
a713a <=( a10521a and a10510a );
a714a <=( a10501a and a10490a );
a715a <=( a10481a and a10470a );
a716a <=( a10461a and a10450a );
a717a <=( a10441a and a10430a );
a718a <=( a10421a and a10410a );
a719a <=( a10401a and a10390a );
a720a <=( a10381a and a10370a );
a721a <=( a10361a and a10350a );
a722a <=( a10341a and a10330a );
a723a <=( a10321a and a10310a );
a724a <=( a10301a and a10290a );
a725a <=( a10281a and a10270a );
a726a <=( a10261a and a10250a );
a727a <=( a10241a and a10230a );
a728a <=( a10221a and a10210a );
a729a <=( a10201a and a10190a );
a730a <=( a10181a and a10170a );
a731a <=( a10161a and a10150a );
a732a <=( a10141a and a10130a );
a733a <=( a10121a and a10110a );
a734a <=( a10101a and a10090a );
a735a <=( a10081a and a10070a );
a736a <=( a10061a and a10050a );
a737a <=( a10041a and a10030a );
a738a <=( a10021a and a10010a );
a739a <=( a10001a and a9990a );
a740a <=( a9981a and a9970a );
a741a <=( a9961a and a9950a );
a742a <=( a9941a and a9930a );
a743a <=( a9921a and a9910a );
a744a <=( a9901a and a9890a );
a745a <=( a9881a and a9870a );
a746a <=( a9861a and a9850a );
a747a <=( a9841a and a9830a );
a748a <=( a9821a and a9810a );
a749a <=( a9801a and a9790a );
a750a <=( a9781a and a9770a );
a751a <=( a9761a and a9750a );
a752a <=( a9741a and a9730a );
a753a <=( a9721a and a9710a );
a754a <=( a9701a and a9690a );
a755a <=( a9681a and a9670a );
a756a <=( a9661a and a9650a );
a757a <=( a9641a and a9630a );
a758a <=( a9621a and a9610a );
a759a <=( a9601a and a9590a );
a760a <=( a9581a and a9570a );
a761a <=( a9561a and a9550a );
a762a <=( a9541a and a9530a );
a763a <=( a9521a and a9510a );
a764a <=( a9501a and a9490a );
a765a <=( a9481a and a9470a );
a766a <=( a9461a and a9450a );
a767a <=( a9441a and a9430a );
a768a <=( a9421a and a9410a );
a769a <=( a9401a and a9390a );
a770a <=( a9381a and a9370a );
a771a <=( a9361a and a9350a );
a772a <=( a9341a and a9330a );
a773a <=( a9321a and a9310a );
a774a <=( a9301a and a9290a );
a775a <=( a9281a and a9270a );
a776a <=( a9261a and a9250a );
a777a <=( a9241a and a9230a );
a778a <=( a9221a and a9210a );
a779a <=( a9201a and a9190a );
a780a <=( a9181a and a9170a );
a781a <=( a9161a and a9150a );
a782a <=( a9141a and a9130a );
a783a <=( a9121a and a9110a );
a784a <=( a9101a and a9090a );
a785a <=( a9081a and a9070a );
a786a <=( a9061a and a9050a );
a787a <=( a9041a and a9030a );
a788a <=( a9021a and a9010a );
a789a <=( a9001a and a8990a );
a790a <=( a8981a and a8970a );
a791a <=( a8961a and a8950a );
a792a <=( a8941a and a8930a );
a793a <=( a8921a and a8910a );
a794a <=( a8901a and a8890a );
a795a <=( a8881a and a8870a );
a796a <=( a8861a and a8850a );
a797a <=( a8841a and a8830a );
a798a <=( a8821a and a8810a );
a799a <=( a8801a and a8790a );
a800a <=( a8781a and a8770a );
a801a <=( a8761a and a8750a );
a802a <=( a8741a and a8730a );
a803a <=( a8721a and a8710a );
a804a <=( a8701a and a8690a );
a805a <=( a8681a and a8670a );
a806a <=( a8661a and a8650a );
a807a <=( a8641a and a8630a );
a808a <=( a8621a and a8610a );
a809a <=( a8601a and a8590a );
a810a <=( a8581a and a8570a );
a811a <=( a8561a and a8550a );
a812a <=( a8541a and a8530a );
a813a <=( a8521a and a8510a );
a814a <=( a8501a and a8490a );
a815a <=( a8481a and a8470a );
a816a <=( a8461a and a8450a );
a817a <=( a8441a and a8430a );
a818a <=( a8421a and a8410a );
a819a <=( a8401a and a8390a );
a820a <=( a8381a and a8370a );
a821a <=( a8361a and a8350a );
a822a <=( a8341a and a8330a );
a823a <=( a8321a and a8310a );
a824a <=( a8301a and a8290a );
a825a <=( a8281a and a8270a );
a826a <=( a8261a and a8250a );
a827a <=( a8241a and a8230a );
a828a <=( a8221a and a8210a );
a829a <=( a8201a and a8190a );
a830a <=( a8181a and a8170a );
a831a <=( a8161a and a8150a );
a832a <=( a8141a and a8130a );
a833a <=( a8121a and a8112a );
a834a <=( a8103a and a8094a );
a835a <=( a8085a and a8076a );
a836a <=( a8067a and a8058a );
a837a <=( a8049a and a8040a );
a838a <=( a8031a and a8022a );
a839a <=( a8013a and a8004a );
a840a <=( a7995a and a7986a );
a841a <=( a7977a and a7968a );
a842a <=( a7959a and a7950a );
a843a <=( a7941a and a7932a );
a844a <=( a7923a and a7914a );
a845a <=( a7905a and a7896a );
a846a <=( a7887a and a7878a );
a847a <=( a7869a and a7860a );
a848a <=( a7851a and a7842a );
a849a <=( a7833a and a7824a );
a850a <=( a7815a and a7806a );
a851a <=( a7797a and a7788a );
a852a <=( a7779a and a7770a );
a853a <=( a7761a and a7752a );
a854a <=( a7743a and a7734a );
a855a <=( a7725a and a7716a );
a856a <=( a7707a and a7698a );
a857a <=( a7689a and a7680a );
a858a <=( a7671a and a7662a );
a859a <=( a7653a and a7644a );
a860a <=( a7635a and a7626a );
a861a <=( a7617a and a7608a );
a862a <=( a7599a and a7590a );
a863a <=( a7581a and a7572a );
a864a <=( a7563a and a7554a );
a865a <=( a7545a and a7536a );
a866a <=( a7527a and a7518a );
a867a <=( a7509a and a7500a );
a868a <=( a7491a and a7482a );
a869a <=( a7473a and a7464a );
a870a <=( a7455a and a7446a );
a871a <=( a7437a and a7428a );
a872a <=( a7419a and a7410a );
a873a <=( a7401a and a7392a );
a874a <=( a7383a and a7374a );
a875a <=( a7365a and a7356a );
a876a <=( a7347a and a7338a );
a877a <=( a7329a and a7320a );
a878a <=( a7311a and a7302a );
a879a <=( a7293a and a7284a );
a880a <=( a7275a and a7266a );
a881a <=( a7257a and a7248a );
a882a <=( a7239a and a7230a );
a883a <=( a7221a and a7212a );
a884a <=( a7203a and a7194a );
a885a <=( a7185a and a7176a );
a886a <=( a7167a and a7158a );
a887a <=( a7149a and a7140a );
a888a <=( a7131a and a7122a );
a889a <=( a7113a and a7104a );
a890a <=( a7095a and a7086a );
a891a <=( a7077a and a7068a );
a892a <=( a7059a and a7050a );
a893a <=( a7041a and a7032a );
a894a <=( a7023a and a7014a );
a895a <=( a7005a and a6996a );
a896a <=( a6987a and a6978a );
a897a <=( a6969a and a6960a );
a898a <=( a6951a and a6942a );
a899a <=( a6933a and a6924a );
a900a <=( a6915a and a6906a );
a901a <=( a6897a and a6888a );
a902a <=( a6879a and a6870a );
a903a <=( a6861a and a6852a );
a904a <=( a6843a and a6834a );
a905a <=( a6825a and a6816a );
a906a <=( a6807a and a6798a );
a907a <=( a6789a and a6780a );
a908a <=( a6771a and a6762a );
a909a <=( a6753a and a6744a );
a910a <=( a6735a and a6726a );
a911a <=( a6717a and a6708a );
a912a <=( a6699a and a6690a );
a913a <=( a6681a and a6672a );
a914a <=( a6663a and a6654a );
a915a <=( a6645a and a6636a );
a916a <=( a6627a and a6618a );
a917a <=( a6609a and a6600a );
a918a <=( a6591a and a6582a );
a919a <=( a6573a and a6564a );
a920a <=( a6555a and a6546a );
a921a <=( a6537a and a6528a );
a922a <=( a6519a and a6510a );
a923a <=( a6501a and a6492a );
a924a <=( a6483a and a6474a );
a925a <=( a6465a and a6456a );
a926a <=( a6447a and a6438a );
a927a <=( a6429a and a6420a );
a928a <=( a6411a and a6402a );
a929a <=( a6393a and a6384a );
a930a <=( a6375a and a6366a );
a931a <=( a6357a and a6348a );
a932a <=( a6339a and a6330a );
a933a <=( a6321a and a6312a );
a934a <=( a6303a and a6294a );
a935a <=( a6285a and a6276a );
a936a <=( a6267a and a6258a );
a937a <=( a6249a and a6240a );
a938a <=( a6231a and a6222a );
a939a <=( a6213a and a6204a );
a940a <=( a6195a and a6186a );
a941a <=( a6177a and a6168a );
a942a <=( a6159a and a6150a );
a943a <=( a6141a and a6132a );
a944a <=( a6123a and a6114a );
a945a <=( a6105a and a6096a );
a946a <=( a6087a and a6078a );
a947a <=( a6069a and a6060a );
a948a <=( a6051a and a6042a );
a949a <=( a6033a and a6024a );
a950a <=( a6015a and a6006a );
a951a <=( a5997a and a5988a );
a952a <=( a5979a and a5970a );
a953a <=( a5961a and a5952a );
a954a <=( a5943a and a5934a );
a955a <=( a5925a and a5916a );
a956a <=( a5907a and a5898a );
a957a <=( a5889a and a5880a );
a958a <=( a5871a and a5862a );
a959a <=( a5853a and a5844a );
a960a <=( a5835a and a5826a );
a961a <=( a5817a and a5808a );
a962a <=( a5799a and a5790a );
a963a <=( a5781a and a5772a );
a964a <=( a5763a and a5754a );
a965a <=( a5745a and a5736a );
a966a <=( a5727a and a5718a );
a967a <=( a5709a and a5700a );
a968a <=( a5691a and a5682a );
a969a <=( a5673a and a5664a );
a970a <=( a5655a and a5646a );
a971a <=( a5637a and a5628a );
a972a <=( a5619a and a5610a );
a973a <=( a5601a and a5592a );
a974a <=( a5583a and a5574a );
a975a <=( a5565a and a5556a );
a976a <=( a5547a and a5538a );
a977a <=( a5529a and a5520a );
a978a <=( a5511a and a5502a );
a979a <=( a5493a and a5484a );
a980a <=( a5475a and a5466a );
a981a <=( a5457a and a5448a );
a982a <=( a5439a and a5430a );
a983a <=( a5421a and a5412a );
a984a <=( a5403a and a5394a );
a985a <=( a5385a and a5376a );
a986a <=( a5367a and a5358a );
a987a <=( a5349a and a5340a );
a988a <=( a5331a and a5322a );
a989a <=( a5313a and a5304a );
a990a <=( a5295a and a5286a );
a991a <=( a5277a and a5268a );
a992a <=( a5259a and a5250a );
a993a <=( a5241a and a5232a );
a994a <=( a5223a and a5214a );
a995a <=( a5205a and a5196a );
a996a <=( a5187a and a5178a );
a997a <=( a5169a and a5160a );
a998a <=( a5151a and a5142a );
a999a <=( a5133a and a5124a );
a1000a <=( a5115a and a5106a );
a1001a <=( a5097a and a5088a );
a1002a <=( a5079a and a5070a );
a1003a <=( a5061a and a5052a );
a1004a <=( a5043a and a5034a );
a1005a <=( a5025a and a5016a );
a1006a <=( a5007a and a4998a );
a1007a <=( a4989a and a4980a );
a1008a <=( a4973a and a4964a );
a1009a <=( a4957a and a4948a );
a1010a <=( a4941a and a4932a );
a1011a <=( a4925a and a4916a );
a1012a <=( a4909a and a4900a );
a1013a <=( a4893a and a4884a );
a1014a <=( a4877a and a4868a );
a1015a <=( a4861a and a4852a );
a1016a <=( a4845a and a4836a );
a1017a <=( a4829a and a4820a );
a1018a <=( a4813a and a4804a );
a1019a <=( a4797a and a4788a );
a1020a <=( a4781a and a4772a );
a1021a <=( a4765a and a4756a );
a1022a <=( a4749a and a4740a );
a1023a <=( a4733a and a4724a );
a1024a <=( a4717a and a4708a );
a1025a <=( a4701a and a4692a );
a1026a <=( a4685a and a4676a );
a1027a <=( a4669a and a4660a );
a1028a <=( a4653a and a4644a );
a1029a <=( a4637a and a4628a );
a1030a <=( a4621a and a4612a );
a1031a <=( a4605a and a4596a );
a1032a <=( a4589a and a4580a );
a1033a <=( a4573a and a4564a );
a1034a <=( a4557a and a4548a );
a1035a <=( a4541a and a4532a );
a1036a <=( a4525a and a4516a );
a1037a <=( a4509a and a4500a );
a1038a <=( a4493a and a4484a );
a1039a <=( a4477a and a4468a );
a1040a <=( a4461a and a4452a );
a1041a <=( a4445a and a4436a );
a1042a <=( a4429a and a4420a );
a1043a <=( a4413a and a4404a );
a1044a <=( a4397a and a4388a );
a1045a <=( a4381a and a4372a );
a1046a <=( a4365a and a4356a );
a1047a <=( a4349a and a4340a );
a1048a <=( a4333a and a4324a );
a1049a <=( a4317a and a4308a );
a1050a <=( a4301a and a4292a );
a1051a <=( a4285a and a4276a );
a1052a <=( a4269a and a4260a );
a1053a <=( a4253a and a4244a );
a1054a <=( a4237a and a4228a );
a1055a <=( a4221a and a4212a );
a1056a <=( a4205a and a4196a );
a1057a <=( a4189a and a4180a );
a1058a <=( a4173a and a4164a );
a1059a <=( a4157a and a4148a );
a1060a <=( a4141a and a4132a );
a1061a <=( a4125a and a4116a );
a1062a <=( a4109a and a4100a );
a1063a <=( a4093a and a4084a );
a1064a <=( a4077a and a4068a );
a1065a <=( a4061a and a4052a );
a1066a <=( a4045a and a4036a );
a1067a <=( a4029a and a4020a );
a1068a <=( a4013a and a4004a );
a1069a <=( a3997a and a3990a );
a1070a <=( a3983a and a3976a );
a1071a <=( a3969a and a3962a );
a1072a <=( a3955a and a3948a );
a1073a <=( a3941a and a3934a );
a1074a <=( a3927a and a3920a );
a1075a <=( a3913a and a3906a );
a1076a <=( a3899a and a3892a );
a1077a <=( a3885a and a3878a );
a1078a <=( a3871a and a3864a );
a1079a <=( a3857a and a3850a );
a1080a <=( a3843a and a3836a );
a1081a <=( a3829a and a3822a );
a1082a <=( a3815a and a3808a );
a1083a <=( a3801a and a3794a );
a1084a <=( a3787a and a3780a );
a1085a <=( a3773a and a3766a );
a1086a <=( a3759a and a3752a );
a1087a <=( a3745a and a3738a );
a1088a <=( a3731a and a3724a );
a1089a <=( a3717a and a3710a );
a1090a <=( a3703a and a3696a );
a1091a <=( a3689a and a3682a );
a1092a <=( a3675a and a3668a );
a1093a <=( a3661a and a3654a );
a1094a <=( a3647a and a3640a );
a1095a <=( a3633a and a3626a );
a1096a <=( a3619a and a3612a );
a1097a <=( a3605a and a3598a );
a1098a <=( a3591a and a3584a );
a1099a <=( a3577a and a3570a );
a1100a <=( a3563a and a3556a );
a1101a <=( a3549a and a3542a );
a1102a <=( a3535a and a3528a );
a1103a <=( a3521a and a3514a );
a1104a <=( a3507a and a3500a );
a1105a <=( a3493a and a3488a );
a1106a <=( a3483a and a3478a );
a1107a <=( a3473a and a3468a );
a1108a <=( a3463a and a3458a );
a1109a <=( a3453a and a3448a );
a1110a <=( a3443a and a3438a );
a1111a <=( a3433a and a3428a );
a1112a <=( a3423a and a3418a );
a1113a <=( a3413a and a3408a );
a1114a <=( a3403a and a3398a );
a1115a <=( a3393a and a3388a );
a1116a <=( a3383a and a3378a );
a1117a <=( a3373a and a3370a );
a1118a <=( a3367a and a3364a );
a1119a <=( a3361a and a3358a );
a1122a <=( a1118a ) or ( a1119a );
a1125a <=( a1116a ) or ( a1117a );
a1126a <=( a1125a ) or ( a1122a );
a1129a <=( a1114a ) or ( a1115a );
a1132a <=( a1112a ) or ( a1113a );
a1133a <=( a1132a ) or ( a1129a );
a1134a <=( a1133a ) or ( a1126a );
a1137a <=( a1110a ) or ( a1111a );
a1140a <=( a1108a ) or ( a1109a );
a1141a <=( a1140a ) or ( a1137a );
a1144a <=( a1106a ) or ( a1107a );
a1148a <=( a1103a ) or ( a1104a );
a1149a <=( a1105a ) or ( a1148a );
a1150a <=( a1149a ) or ( a1144a );
a1151a <=( a1150a ) or ( a1141a );
a1152a <=( a1151a ) or ( a1134a );
a1155a <=( a1101a ) or ( a1102a );
a1158a <=( a1099a ) or ( a1100a );
a1159a <=( a1158a ) or ( a1155a );
a1162a <=( a1097a ) or ( a1098a );
a1165a <=( a1095a ) or ( a1096a );
a1166a <=( a1165a ) or ( a1162a );
a1167a <=( a1166a ) or ( a1159a );
a1170a <=( a1093a ) or ( a1094a );
a1173a <=( a1091a ) or ( a1092a );
a1174a <=( a1173a ) or ( a1170a );
a1177a <=( a1089a ) or ( a1090a );
a1181a <=( a1086a ) or ( a1087a );
a1182a <=( a1088a ) or ( a1181a );
a1183a <=( a1182a ) or ( a1177a );
a1184a <=( a1183a ) or ( a1174a );
a1185a <=( a1184a ) or ( a1167a );
a1186a <=( a1185a ) or ( a1152a );
a1189a <=( a1084a ) or ( a1085a );
a1192a <=( a1082a ) or ( a1083a );
a1193a <=( a1192a ) or ( a1189a );
a1196a <=( a1080a ) or ( a1081a );
a1199a <=( a1078a ) or ( a1079a );
a1200a <=( a1199a ) or ( a1196a );
a1201a <=( a1200a ) or ( a1193a );
a1204a <=( a1076a ) or ( a1077a );
a1207a <=( a1074a ) or ( a1075a );
a1208a <=( a1207a ) or ( a1204a );
a1211a <=( a1072a ) or ( a1073a );
a1215a <=( a1069a ) or ( a1070a );
a1216a <=( a1071a ) or ( a1215a );
a1217a <=( a1216a ) or ( a1211a );
a1218a <=( a1217a ) or ( a1208a );
a1219a <=( a1218a ) or ( a1201a );
a1222a <=( a1067a ) or ( a1068a );
a1225a <=( a1065a ) or ( a1066a );
a1226a <=( a1225a ) or ( a1222a );
a1229a <=( a1063a ) or ( a1064a );
a1233a <=( a1060a ) or ( a1061a );
a1234a <=( a1062a ) or ( a1233a );
a1235a <=( a1234a ) or ( a1229a );
a1236a <=( a1235a ) or ( a1226a );
a1239a <=( a1058a ) or ( a1059a );
a1242a <=( a1056a ) or ( a1057a );
a1243a <=( a1242a ) or ( a1239a );
a1246a <=( a1054a ) or ( a1055a );
a1250a <=( a1051a ) or ( a1052a );
a1251a <=( a1053a ) or ( a1250a );
a1252a <=( a1251a ) or ( a1246a );
a1253a <=( a1252a ) or ( a1243a );
a1254a <=( a1253a ) or ( a1236a );
a1255a <=( a1254a ) or ( a1219a );
a1256a <=( a1255a ) or ( a1186a );
a1259a <=( a1049a ) or ( a1050a );
a1262a <=( a1047a ) or ( a1048a );
a1263a <=( a1262a ) or ( a1259a );
a1266a <=( a1045a ) or ( a1046a );
a1269a <=( a1043a ) or ( a1044a );
a1270a <=( a1269a ) or ( a1266a );
a1271a <=( a1270a ) or ( a1263a );
a1274a <=( a1041a ) or ( a1042a );
a1277a <=( a1039a ) or ( a1040a );
a1278a <=( a1277a ) or ( a1274a );
a1281a <=( a1037a ) or ( a1038a );
a1285a <=( a1034a ) or ( a1035a );
a1286a <=( a1036a ) or ( a1285a );
a1287a <=( a1286a ) or ( a1281a );
a1288a <=( a1287a ) or ( a1278a );
a1289a <=( a1288a ) or ( a1271a );
a1292a <=( a1032a ) or ( a1033a );
a1295a <=( a1030a ) or ( a1031a );
a1296a <=( a1295a ) or ( a1292a );
a1299a <=( a1028a ) or ( a1029a );
a1303a <=( a1025a ) or ( a1026a );
a1304a <=( a1027a ) or ( a1303a );
a1305a <=( a1304a ) or ( a1299a );
a1306a <=( a1305a ) or ( a1296a );
a1309a <=( a1023a ) or ( a1024a );
a1312a <=( a1021a ) or ( a1022a );
a1313a <=( a1312a ) or ( a1309a );
a1316a <=( a1019a ) or ( a1020a );
a1320a <=( a1016a ) or ( a1017a );
a1321a <=( a1018a ) or ( a1320a );
a1322a <=( a1321a ) or ( a1316a );
a1323a <=( a1322a ) or ( a1313a );
a1324a <=( a1323a ) or ( a1306a );
a1325a <=( a1324a ) or ( a1289a );
a1328a <=( a1014a ) or ( a1015a );
a1331a <=( a1012a ) or ( a1013a );
a1332a <=( a1331a ) or ( a1328a );
a1335a <=( a1010a ) or ( a1011a );
a1338a <=( a1008a ) or ( a1009a );
a1339a <=( a1338a ) or ( a1335a );
a1340a <=( a1339a ) or ( a1332a );
a1343a <=( a1006a ) or ( a1007a );
a1346a <=( a1004a ) or ( a1005a );
a1347a <=( a1346a ) or ( a1343a );
a1350a <=( a1002a ) or ( a1003a );
a1354a <=( a999a ) or ( a1000a );
a1355a <=( a1001a ) or ( a1354a );
a1356a <=( a1355a ) or ( a1350a );
a1357a <=( a1356a ) or ( a1347a );
a1358a <=( a1357a ) or ( a1340a );
a1361a <=( a997a ) or ( a998a );
a1364a <=( a995a ) or ( a996a );
a1365a <=( a1364a ) or ( a1361a );
a1368a <=( a993a ) or ( a994a );
a1372a <=( a990a ) or ( a991a );
a1373a <=( a992a ) or ( a1372a );
a1374a <=( a1373a ) or ( a1368a );
a1375a <=( a1374a ) or ( a1365a );
a1378a <=( a988a ) or ( a989a );
a1381a <=( a986a ) or ( a987a );
a1382a <=( a1381a ) or ( a1378a );
a1385a <=( a984a ) or ( a985a );
a1389a <=( a981a ) or ( a982a );
a1390a <=( a983a ) or ( a1389a );
a1391a <=( a1390a ) or ( a1385a );
a1392a <=( a1391a ) or ( a1382a );
a1393a <=( a1392a ) or ( a1375a );
a1394a <=( a1393a ) or ( a1358a );
a1395a <=( a1394a ) or ( a1325a );
a1396a <=( a1395a ) or ( a1256a );
a1399a <=( a979a ) or ( a980a );
a1402a <=( a977a ) or ( a978a );
a1403a <=( a1402a ) or ( a1399a );
a1406a <=( a975a ) or ( a976a );
a1409a <=( a973a ) or ( a974a );
a1410a <=( a1409a ) or ( a1406a );
a1411a <=( a1410a ) or ( a1403a );
a1414a <=( a971a ) or ( a972a );
a1417a <=( a969a ) or ( a970a );
a1418a <=( a1417a ) or ( a1414a );
a1421a <=( a967a ) or ( a968a );
a1425a <=( a964a ) or ( a965a );
a1426a <=( a966a ) or ( a1425a );
a1427a <=( a1426a ) or ( a1421a );
a1428a <=( a1427a ) or ( a1418a );
a1429a <=( a1428a ) or ( a1411a );
a1432a <=( a962a ) or ( a963a );
a1435a <=( a960a ) or ( a961a );
a1436a <=( a1435a ) or ( a1432a );
a1439a <=( a958a ) or ( a959a );
a1443a <=( a955a ) or ( a956a );
a1444a <=( a957a ) or ( a1443a );
a1445a <=( a1444a ) or ( a1439a );
a1446a <=( a1445a ) or ( a1436a );
a1449a <=( a953a ) or ( a954a );
a1452a <=( a951a ) or ( a952a );
a1453a <=( a1452a ) or ( a1449a );
a1456a <=( a949a ) or ( a950a );
a1460a <=( a946a ) or ( a947a );
a1461a <=( a948a ) or ( a1460a );
a1462a <=( a1461a ) or ( a1456a );
a1463a <=( a1462a ) or ( a1453a );
a1464a <=( a1463a ) or ( a1446a );
a1465a <=( a1464a ) or ( a1429a );
a1468a <=( a944a ) or ( a945a );
a1471a <=( a942a ) or ( a943a );
a1472a <=( a1471a ) or ( a1468a );
a1475a <=( a940a ) or ( a941a );
a1478a <=( a938a ) or ( a939a );
a1479a <=( a1478a ) or ( a1475a );
a1480a <=( a1479a ) or ( a1472a );
a1483a <=( a936a ) or ( a937a );
a1486a <=( a934a ) or ( a935a );
a1487a <=( a1486a ) or ( a1483a );
a1490a <=( a932a ) or ( a933a );
a1494a <=( a929a ) or ( a930a );
a1495a <=( a931a ) or ( a1494a );
a1496a <=( a1495a ) or ( a1490a );
a1497a <=( a1496a ) or ( a1487a );
a1498a <=( a1497a ) or ( a1480a );
a1501a <=( a927a ) or ( a928a );
a1504a <=( a925a ) or ( a926a );
a1505a <=( a1504a ) or ( a1501a );
a1508a <=( a923a ) or ( a924a );
a1512a <=( a920a ) or ( a921a );
a1513a <=( a922a ) or ( a1512a );
a1514a <=( a1513a ) or ( a1508a );
a1515a <=( a1514a ) or ( a1505a );
a1518a <=( a918a ) or ( a919a );
a1521a <=( a916a ) or ( a917a );
a1522a <=( a1521a ) or ( a1518a );
a1525a <=( a914a ) or ( a915a );
a1529a <=( a911a ) or ( a912a );
a1530a <=( a913a ) or ( a1529a );
a1531a <=( a1530a ) or ( a1525a );
a1532a <=( a1531a ) or ( a1522a );
a1533a <=( a1532a ) or ( a1515a );
a1534a <=( a1533a ) or ( a1498a );
a1535a <=( a1534a ) or ( a1465a );
a1538a <=( a909a ) or ( a910a );
a1541a <=( a907a ) or ( a908a );
a1542a <=( a1541a ) or ( a1538a );
a1545a <=( a905a ) or ( a906a );
a1548a <=( a903a ) or ( a904a );
a1549a <=( a1548a ) or ( a1545a );
a1550a <=( a1549a ) or ( a1542a );
a1553a <=( a901a ) or ( a902a );
a1556a <=( a899a ) or ( a900a );
a1557a <=( a1556a ) or ( a1553a );
a1560a <=( a897a ) or ( a898a );
a1564a <=( a894a ) or ( a895a );
a1565a <=( a896a ) or ( a1564a );
a1566a <=( a1565a ) or ( a1560a );
a1567a <=( a1566a ) or ( a1557a );
a1568a <=( a1567a ) or ( a1550a );
a1571a <=( a892a ) or ( a893a );
a1574a <=( a890a ) or ( a891a );
a1575a <=( a1574a ) or ( a1571a );
a1578a <=( a888a ) or ( a889a );
a1582a <=( a885a ) or ( a886a );
a1583a <=( a887a ) or ( a1582a );
a1584a <=( a1583a ) or ( a1578a );
a1585a <=( a1584a ) or ( a1575a );
a1588a <=( a883a ) or ( a884a );
a1591a <=( a881a ) or ( a882a );
a1592a <=( a1591a ) or ( a1588a );
a1595a <=( a879a ) or ( a880a );
a1599a <=( a876a ) or ( a877a );
a1600a <=( a878a ) or ( a1599a );
a1601a <=( a1600a ) or ( a1595a );
a1602a <=( a1601a ) or ( a1592a );
a1603a <=( a1602a ) or ( a1585a );
a1604a <=( a1603a ) or ( a1568a );
a1607a <=( a874a ) or ( a875a );
a1610a <=( a872a ) or ( a873a );
a1611a <=( a1610a ) or ( a1607a );
a1614a <=( a870a ) or ( a871a );
a1617a <=( a868a ) or ( a869a );
a1618a <=( a1617a ) or ( a1614a );
a1619a <=( a1618a ) or ( a1611a );
a1622a <=( a866a ) or ( a867a );
a1625a <=( a864a ) or ( a865a );
a1626a <=( a1625a ) or ( a1622a );
a1629a <=( a862a ) or ( a863a );
a1633a <=( a859a ) or ( a860a );
a1634a <=( a861a ) or ( a1633a );
a1635a <=( a1634a ) or ( a1629a );
a1636a <=( a1635a ) or ( a1626a );
a1637a <=( a1636a ) or ( a1619a );
a1640a <=( a857a ) or ( a858a );
a1643a <=( a855a ) or ( a856a );
a1644a <=( a1643a ) or ( a1640a );
a1647a <=( a853a ) or ( a854a );
a1651a <=( a850a ) or ( a851a );
a1652a <=( a852a ) or ( a1651a );
a1653a <=( a1652a ) or ( a1647a );
a1654a <=( a1653a ) or ( a1644a );
a1657a <=( a848a ) or ( a849a );
a1660a <=( a846a ) or ( a847a );
a1661a <=( a1660a ) or ( a1657a );
a1664a <=( a844a ) or ( a845a );
a1668a <=( a841a ) or ( a842a );
a1669a <=( a843a ) or ( a1668a );
a1670a <=( a1669a ) or ( a1664a );
a1671a <=( a1670a ) or ( a1661a );
a1672a <=( a1671a ) or ( a1654a );
a1673a <=( a1672a ) or ( a1637a );
a1674a <=( a1673a ) or ( a1604a );
a1675a <=( a1674a ) or ( a1535a );
a1676a <=( a1675a ) or ( a1396a );
a1679a <=( a839a ) or ( a840a );
a1682a <=( a837a ) or ( a838a );
a1683a <=( a1682a ) or ( a1679a );
a1686a <=( a835a ) or ( a836a );
a1689a <=( a833a ) or ( a834a );
a1690a <=( a1689a ) or ( a1686a );
a1691a <=( a1690a ) or ( a1683a );
a1694a <=( a831a ) or ( a832a );
a1697a <=( a829a ) or ( a830a );
a1698a <=( a1697a ) or ( a1694a );
a1701a <=( a827a ) or ( a828a );
a1705a <=( a824a ) or ( a825a );
a1706a <=( a826a ) or ( a1705a );
a1707a <=( a1706a ) or ( a1701a );
a1708a <=( a1707a ) or ( a1698a );
a1709a <=( a1708a ) or ( a1691a );
a1712a <=( a822a ) or ( a823a );
a1715a <=( a820a ) or ( a821a );
a1716a <=( a1715a ) or ( a1712a );
a1719a <=( a818a ) or ( a819a );
a1723a <=( a815a ) or ( a816a );
a1724a <=( a817a ) or ( a1723a );
a1725a <=( a1724a ) or ( a1719a );
a1726a <=( a1725a ) or ( a1716a );
a1729a <=( a813a ) or ( a814a );
a1732a <=( a811a ) or ( a812a );
a1733a <=( a1732a ) or ( a1729a );
a1736a <=( a809a ) or ( a810a );
a1740a <=( a806a ) or ( a807a );
a1741a <=( a808a ) or ( a1740a );
a1742a <=( a1741a ) or ( a1736a );
a1743a <=( a1742a ) or ( a1733a );
a1744a <=( a1743a ) or ( a1726a );
a1745a <=( a1744a ) or ( a1709a );
a1748a <=( a804a ) or ( a805a );
a1751a <=( a802a ) or ( a803a );
a1752a <=( a1751a ) or ( a1748a );
a1755a <=( a800a ) or ( a801a );
a1758a <=( a798a ) or ( a799a );
a1759a <=( a1758a ) or ( a1755a );
a1760a <=( a1759a ) or ( a1752a );
a1763a <=( a796a ) or ( a797a );
a1766a <=( a794a ) or ( a795a );
a1767a <=( a1766a ) or ( a1763a );
a1770a <=( a792a ) or ( a793a );
a1774a <=( a789a ) or ( a790a );
a1775a <=( a791a ) or ( a1774a );
a1776a <=( a1775a ) or ( a1770a );
a1777a <=( a1776a ) or ( a1767a );
a1778a <=( a1777a ) or ( a1760a );
a1781a <=( a787a ) or ( a788a );
a1784a <=( a785a ) or ( a786a );
a1785a <=( a1784a ) or ( a1781a );
a1788a <=( a783a ) or ( a784a );
a1792a <=( a780a ) or ( a781a );
a1793a <=( a782a ) or ( a1792a );
a1794a <=( a1793a ) or ( a1788a );
a1795a <=( a1794a ) or ( a1785a );
a1798a <=( a778a ) or ( a779a );
a1801a <=( a776a ) or ( a777a );
a1802a <=( a1801a ) or ( a1798a );
a1805a <=( a774a ) or ( a775a );
a1809a <=( a771a ) or ( a772a );
a1810a <=( a773a ) or ( a1809a );
a1811a <=( a1810a ) or ( a1805a );
a1812a <=( a1811a ) or ( a1802a );
a1813a <=( a1812a ) or ( a1795a );
a1814a <=( a1813a ) or ( a1778a );
a1815a <=( a1814a ) or ( a1745a );
a1818a <=( a769a ) or ( a770a );
a1821a <=( a767a ) or ( a768a );
a1822a <=( a1821a ) or ( a1818a );
a1825a <=( a765a ) or ( a766a );
a1828a <=( a763a ) or ( a764a );
a1829a <=( a1828a ) or ( a1825a );
a1830a <=( a1829a ) or ( a1822a );
a1833a <=( a761a ) or ( a762a );
a1836a <=( a759a ) or ( a760a );
a1837a <=( a1836a ) or ( a1833a );
a1840a <=( a757a ) or ( a758a );
a1844a <=( a754a ) or ( a755a );
a1845a <=( a756a ) or ( a1844a );
a1846a <=( a1845a ) or ( a1840a );
a1847a <=( a1846a ) or ( a1837a );
a1848a <=( a1847a ) or ( a1830a );
a1851a <=( a752a ) or ( a753a );
a1854a <=( a750a ) or ( a751a );
a1855a <=( a1854a ) or ( a1851a );
a1858a <=( a748a ) or ( a749a );
a1862a <=( a745a ) or ( a746a );
a1863a <=( a747a ) or ( a1862a );
a1864a <=( a1863a ) or ( a1858a );
a1865a <=( a1864a ) or ( a1855a );
a1868a <=( a743a ) or ( a744a );
a1871a <=( a741a ) or ( a742a );
a1872a <=( a1871a ) or ( a1868a );
a1875a <=( a739a ) or ( a740a );
a1879a <=( a736a ) or ( a737a );
a1880a <=( a738a ) or ( a1879a );
a1881a <=( a1880a ) or ( a1875a );
a1882a <=( a1881a ) or ( a1872a );
a1883a <=( a1882a ) or ( a1865a );
a1884a <=( a1883a ) or ( a1848a );
a1887a <=( a734a ) or ( a735a );
a1890a <=( a732a ) or ( a733a );
a1891a <=( a1890a ) or ( a1887a );
a1894a <=( a730a ) or ( a731a );
a1897a <=( a728a ) or ( a729a );
a1898a <=( a1897a ) or ( a1894a );
a1899a <=( a1898a ) or ( a1891a );
a1902a <=( a726a ) or ( a727a );
a1905a <=( a724a ) or ( a725a );
a1906a <=( a1905a ) or ( a1902a );
a1909a <=( a722a ) or ( a723a );
a1913a <=( a719a ) or ( a720a );
a1914a <=( a721a ) or ( a1913a );
a1915a <=( a1914a ) or ( a1909a );
a1916a <=( a1915a ) or ( a1906a );
a1917a <=( a1916a ) or ( a1899a );
a1920a <=( a717a ) or ( a718a );
a1923a <=( a715a ) or ( a716a );
a1924a <=( a1923a ) or ( a1920a );
a1927a <=( a713a ) or ( a714a );
a1931a <=( a710a ) or ( a711a );
a1932a <=( a712a ) or ( a1931a );
a1933a <=( a1932a ) or ( a1927a );
a1934a <=( a1933a ) or ( a1924a );
a1937a <=( a708a ) or ( a709a );
a1940a <=( a706a ) or ( a707a );
a1941a <=( a1940a ) or ( a1937a );
a1944a <=( a704a ) or ( a705a );
a1948a <=( a701a ) or ( a702a );
a1949a <=( a703a ) or ( a1948a );
a1950a <=( a1949a ) or ( a1944a );
a1951a <=( a1950a ) or ( a1941a );
a1952a <=( a1951a ) or ( a1934a );
a1953a <=( a1952a ) or ( a1917a );
a1954a <=( a1953a ) or ( a1884a );
a1955a <=( a1954a ) or ( a1815a );
a1958a <=( a699a ) or ( a700a );
a1961a <=( a697a ) or ( a698a );
a1962a <=( a1961a ) or ( a1958a );
a1965a <=( a695a ) or ( a696a );
a1968a <=( a693a ) or ( a694a );
a1969a <=( a1968a ) or ( a1965a );
a1970a <=( a1969a ) or ( a1962a );
a1973a <=( a691a ) or ( a692a );
a1976a <=( a689a ) or ( a690a );
a1977a <=( a1976a ) or ( a1973a );
a1980a <=( a687a ) or ( a688a );
a1984a <=( a684a ) or ( a685a );
a1985a <=( a686a ) or ( a1984a );
a1986a <=( a1985a ) or ( a1980a );
a1987a <=( a1986a ) or ( a1977a );
a1988a <=( a1987a ) or ( a1970a );
a1991a <=( a682a ) or ( a683a );
a1994a <=( a680a ) or ( a681a );
a1995a <=( a1994a ) or ( a1991a );
a1998a <=( a678a ) or ( a679a );
a2002a <=( a675a ) or ( a676a );
a2003a <=( a677a ) or ( a2002a );
a2004a <=( a2003a ) or ( a1998a );
a2005a <=( a2004a ) or ( a1995a );
a2008a <=( a673a ) or ( a674a );
a2011a <=( a671a ) or ( a672a );
a2012a <=( a2011a ) or ( a2008a );
a2015a <=( a669a ) or ( a670a );
a2019a <=( a666a ) or ( a667a );
a2020a <=( a668a ) or ( a2019a );
a2021a <=( a2020a ) or ( a2015a );
a2022a <=( a2021a ) or ( a2012a );
a2023a <=( a2022a ) or ( a2005a );
a2024a <=( a2023a ) or ( a1988a );
a2027a <=( a664a ) or ( a665a );
a2030a <=( a662a ) or ( a663a );
a2031a <=( a2030a ) or ( a2027a );
a2034a <=( a660a ) or ( a661a );
a2037a <=( a658a ) or ( a659a );
a2038a <=( a2037a ) or ( a2034a );
a2039a <=( a2038a ) or ( a2031a );
a2042a <=( a656a ) or ( a657a );
a2045a <=( a654a ) or ( a655a );
a2046a <=( a2045a ) or ( a2042a );
a2049a <=( a652a ) or ( a653a );
a2053a <=( a649a ) or ( a650a );
a2054a <=( a651a ) or ( a2053a );
a2055a <=( a2054a ) or ( a2049a );
a2056a <=( a2055a ) or ( a2046a );
a2057a <=( a2056a ) or ( a2039a );
a2060a <=( a647a ) or ( a648a );
a2063a <=( a645a ) or ( a646a );
a2064a <=( a2063a ) or ( a2060a );
a2067a <=( a643a ) or ( a644a );
a2071a <=( a640a ) or ( a641a );
a2072a <=( a642a ) or ( a2071a );
a2073a <=( a2072a ) or ( a2067a );
a2074a <=( a2073a ) or ( a2064a );
a2077a <=( a638a ) or ( a639a );
a2080a <=( a636a ) or ( a637a );
a2081a <=( a2080a ) or ( a2077a );
a2084a <=( a634a ) or ( a635a );
a2088a <=( a631a ) or ( a632a );
a2089a <=( a633a ) or ( a2088a );
a2090a <=( a2089a ) or ( a2084a );
a2091a <=( a2090a ) or ( a2081a );
a2092a <=( a2091a ) or ( a2074a );
a2093a <=( a2092a ) or ( a2057a );
a2094a <=( a2093a ) or ( a2024a );
a2097a <=( a629a ) or ( a630a );
a2100a <=( a627a ) or ( a628a );
a2101a <=( a2100a ) or ( a2097a );
a2104a <=( a625a ) or ( a626a );
a2107a <=( a623a ) or ( a624a );
a2108a <=( a2107a ) or ( a2104a );
a2109a <=( a2108a ) or ( a2101a );
a2112a <=( a621a ) or ( a622a );
a2115a <=( a619a ) or ( a620a );
a2116a <=( a2115a ) or ( a2112a );
a2119a <=( a617a ) or ( a618a );
a2123a <=( a614a ) or ( a615a );
a2124a <=( a616a ) or ( a2123a );
a2125a <=( a2124a ) or ( a2119a );
a2126a <=( a2125a ) or ( a2116a );
a2127a <=( a2126a ) or ( a2109a );
a2130a <=( a612a ) or ( a613a );
a2133a <=( a610a ) or ( a611a );
a2134a <=( a2133a ) or ( a2130a );
a2137a <=( a608a ) or ( a609a );
a2141a <=( a605a ) or ( a606a );
a2142a <=( a607a ) or ( a2141a );
a2143a <=( a2142a ) or ( a2137a );
a2144a <=( a2143a ) or ( a2134a );
a2147a <=( a603a ) or ( a604a );
a2150a <=( a601a ) or ( a602a );
a2151a <=( a2150a ) or ( a2147a );
a2154a <=( a599a ) or ( a600a );
a2158a <=( a596a ) or ( a597a );
a2159a <=( a598a ) or ( a2158a );
a2160a <=( a2159a ) or ( a2154a );
a2161a <=( a2160a ) or ( a2151a );
a2162a <=( a2161a ) or ( a2144a );
a2163a <=( a2162a ) or ( a2127a );
a2166a <=( a594a ) or ( a595a );
a2169a <=( a592a ) or ( a593a );
a2170a <=( a2169a ) or ( a2166a );
a2173a <=( a590a ) or ( a591a );
a2176a <=( a588a ) or ( a589a );
a2177a <=( a2176a ) or ( a2173a );
a2178a <=( a2177a ) or ( a2170a );
a2181a <=( a586a ) or ( a587a );
a2184a <=( a584a ) or ( a585a );
a2185a <=( a2184a ) or ( a2181a );
a2188a <=( a582a ) or ( a583a );
a2192a <=( a579a ) or ( a580a );
a2193a <=( a581a ) or ( a2192a );
a2194a <=( a2193a ) or ( a2188a );
a2195a <=( a2194a ) or ( a2185a );
a2196a <=( a2195a ) or ( a2178a );
a2199a <=( a577a ) or ( a578a );
a2202a <=( a575a ) or ( a576a );
a2203a <=( a2202a ) or ( a2199a );
a2206a <=( a573a ) or ( a574a );
a2210a <=( a570a ) or ( a571a );
a2211a <=( a572a ) or ( a2210a );
a2212a <=( a2211a ) or ( a2206a );
a2213a <=( a2212a ) or ( a2203a );
a2216a <=( a568a ) or ( a569a );
a2219a <=( a566a ) or ( a567a );
a2220a <=( a2219a ) or ( a2216a );
a2223a <=( a564a ) or ( a565a );
a2227a <=( a561a ) or ( a562a );
a2228a <=( a563a ) or ( a2227a );
a2229a <=( a2228a ) or ( a2223a );
a2230a <=( a2229a ) or ( a2220a );
a2231a <=( a2230a ) or ( a2213a );
a2232a <=( a2231a ) or ( a2196a );
a2233a <=( a2232a ) or ( a2163a );
a2234a <=( a2233a ) or ( a2094a );
a2235a <=( a2234a ) or ( a1955a );
a2236a <=( a2235a ) or ( a1676a );
a2239a <=( a559a ) or ( a560a );
a2242a <=( a557a ) or ( a558a );
a2243a <=( a2242a ) or ( a2239a );
a2246a <=( a555a ) or ( a556a );
a2249a <=( a553a ) or ( a554a );
a2250a <=( a2249a ) or ( a2246a );
a2251a <=( a2250a ) or ( a2243a );
a2254a <=( a551a ) or ( a552a );
a2257a <=( a549a ) or ( a550a );
a2258a <=( a2257a ) or ( a2254a );
a2261a <=( a547a ) or ( a548a );
a2265a <=( a544a ) or ( a545a );
a2266a <=( a546a ) or ( a2265a );
a2267a <=( a2266a ) or ( a2261a );
a2268a <=( a2267a ) or ( a2258a );
a2269a <=( a2268a ) or ( a2251a );
a2272a <=( a542a ) or ( a543a );
a2275a <=( a540a ) or ( a541a );
a2276a <=( a2275a ) or ( a2272a );
a2279a <=( a538a ) or ( a539a );
a2283a <=( a535a ) or ( a536a );
a2284a <=( a537a ) or ( a2283a );
a2285a <=( a2284a ) or ( a2279a );
a2286a <=( a2285a ) or ( a2276a );
a2289a <=( a533a ) or ( a534a );
a2292a <=( a531a ) or ( a532a );
a2293a <=( a2292a ) or ( a2289a );
a2296a <=( a529a ) or ( a530a );
a2300a <=( a526a ) or ( a527a );
a2301a <=( a528a ) or ( a2300a );
a2302a <=( a2301a ) or ( a2296a );
a2303a <=( a2302a ) or ( a2293a );
a2304a <=( a2303a ) or ( a2286a );
a2305a <=( a2304a ) or ( a2269a );
a2308a <=( a524a ) or ( a525a );
a2311a <=( a522a ) or ( a523a );
a2312a <=( a2311a ) or ( a2308a );
a2315a <=( a520a ) or ( a521a );
a2318a <=( a518a ) or ( a519a );
a2319a <=( a2318a ) or ( a2315a );
a2320a <=( a2319a ) or ( a2312a );
a2323a <=( a516a ) or ( a517a );
a2326a <=( a514a ) or ( a515a );
a2327a <=( a2326a ) or ( a2323a );
a2330a <=( a512a ) or ( a513a );
a2334a <=( a509a ) or ( a510a );
a2335a <=( a511a ) or ( a2334a );
a2336a <=( a2335a ) or ( a2330a );
a2337a <=( a2336a ) or ( a2327a );
a2338a <=( a2337a ) or ( a2320a );
a2341a <=( a507a ) or ( a508a );
a2344a <=( a505a ) or ( a506a );
a2345a <=( a2344a ) or ( a2341a );
a2348a <=( a503a ) or ( a504a );
a2352a <=( a500a ) or ( a501a );
a2353a <=( a502a ) or ( a2352a );
a2354a <=( a2353a ) or ( a2348a );
a2355a <=( a2354a ) or ( a2345a );
a2358a <=( a498a ) or ( a499a );
a2361a <=( a496a ) or ( a497a );
a2362a <=( a2361a ) or ( a2358a );
a2365a <=( a494a ) or ( a495a );
a2369a <=( a491a ) or ( a492a );
a2370a <=( a493a ) or ( a2369a );
a2371a <=( a2370a ) or ( a2365a );
a2372a <=( a2371a ) or ( a2362a );
a2373a <=( a2372a ) or ( a2355a );
a2374a <=( a2373a ) or ( a2338a );
a2375a <=( a2374a ) or ( a2305a );
a2378a <=( a489a ) or ( a490a );
a2381a <=( a487a ) or ( a488a );
a2382a <=( a2381a ) or ( a2378a );
a2385a <=( a485a ) or ( a486a );
a2388a <=( a483a ) or ( a484a );
a2389a <=( a2388a ) or ( a2385a );
a2390a <=( a2389a ) or ( a2382a );
a2393a <=( a481a ) or ( a482a );
a2396a <=( a479a ) or ( a480a );
a2397a <=( a2396a ) or ( a2393a );
a2400a <=( a477a ) or ( a478a );
a2404a <=( a474a ) or ( a475a );
a2405a <=( a476a ) or ( a2404a );
a2406a <=( a2405a ) or ( a2400a );
a2407a <=( a2406a ) or ( a2397a );
a2408a <=( a2407a ) or ( a2390a );
a2411a <=( a472a ) or ( a473a );
a2414a <=( a470a ) or ( a471a );
a2415a <=( a2414a ) or ( a2411a );
a2418a <=( a468a ) or ( a469a );
a2422a <=( a465a ) or ( a466a );
a2423a <=( a467a ) or ( a2422a );
a2424a <=( a2423a ) or ( a2418a );
a2425a <=( a2424a ) or ( a2415a );
a2428a <=( a463a ) or ( a464a );
a2431a <=( a461a ) or ( a462a );
a2432a <=( a2431a ) or ( a2428a );
a2435a <=( a459a ) or ( a460a );
a2439a <=( a456a ) or ( a457a );
a2440a <=( a458a ) or ( a2439a );
a2441a <=( a2440a ) or ( a2435a );
a2442a <=( a2441a ) or ( a2432a );
a2443a <=( a2442a ) or ( a2425a );
a2444a <=( a2443a ) or ( a2408a );
a2447a <=( a454a ) or ( a455a );
a2450a <=( a452a ) or ( a453a );
a2451a <=( a2450a ) or ( a2447a );
a2454a <=( a450a ) or ( a451a );
a2457a <=( a448a ) or ( a449a );
a2458a <=( a2457a ) or ( a2454a );
a2459a <=( a2458a ) or ( a2451a );
a2462a <=( a446a ) or ( a447a );
a2465a <=( a444a ) or ( a445a );
a2466a <=( a2465a ) or ( a2462a );
a2469a <=( a442a ) or ( a443a );
a2473a <=( a439a ) or ( a440a );
a2474a <=( a441a ) or ( a2473a );
a2475a <=( a2474a ) or ( a2469a );
a2476a <=( a2475a ) or ( a2466a );
a2477a <=( a2476a ) or ( a2459a );
a2480a <=( a437a ) or ( a438a );
a2483a <=( a435a ) or ( a436a );
a2484a <=( a2483a ) or ( a2480a );
a2487a <=( a433a ) or ( a434a );
a2491a <=( a430a ) or ( a431a );
a2492a <=( a432a ) or ( a2491a );
a2493a <=( a2492a ) or ( a2487a );
a2494a <=( a2493a ) or ( a2484a );
a2497a <=( a428a ) or ( a429a );
a2500a <=( a426a ) or ( a427a );
a2501a <=( a2500a ) or ( a2497a );
a2504a <=( a424a ) or ( a425a );
a2508a <=( a421a ) or ( a422a );
a2509a <=( a423a ) or ( a2508a );
a2510a <=( a2509a ) or ( a2504a );
a2511a <=( a2510a ) or ( a2501a );
a2512a <=( a2511a ) or ( a2494a );
a2513a <=( a2512a ) or ( a2477a );
a2514a <=( a2513a ) or ( a2444a );
a2515a <=( a2514a ) or ( a2375a );
a2518a <=( a419a ) or ( a420a );
a2521a <=( a417a ) or ( a418a );
a2522a <=( a2521a ) or ( a2518a );
a2525a <=( a415a ) or ( a416a );
a2528a <=( a413a ) or ( a414a );
a2529a <=( a2528a ) or ( a2525a );
a2530a <=( a2529a ) or ( a2522a );
a2533a <=( a411a ) or ( a412a );
a2536a <=( a409a ) or ( a410a );
a2537a <=( a2536a ) or ( a2533a );
a2540a <=( a407a ) or ( a408a );
a2544a <=( a404a ) or ( a405a );
a2545a <=( a406a ) or ( a2544a );
a2546a <=( a2545a ) or ( a2540a );
a2547a <=( a2546a ) or ( a2537a );
a2548a <=( a2547a ) or ( a2530a );
a2551a <=( a402a ) or ( a403a );
a2554a <=( a400a ) or ( a401a );
a2555a <=( a2554a ) or ( a2551a );
a2558a <=( a398a ) or ( a399a );
a2562a <=( a395a ) or ( a396a );
a2563a <=( a397a ) or ( a2562a );
a2564a <=( a2563a ) or ( a2558a );
a2565a <=( a2564a ) or ( a2555a );
a2568a <=( a393a ) or ( a394a );
a2571a <=( a391a ) or ( a392a );
a2572a <=( a2571a ) or ( a2568a );
a2575a <=( a389a ) or ( a390a );
a2579a <=( a386a ) or ( a387a );
a2580a <=( a388a ) or ( a2579a );
a2581a <=( a2580a ) or ( a2575a );
a2582a <=( a2581a ) or ( a2572a );
a2583a <=( a2582a ) or ( a2565a );
a2584a <=( a2583a ) or ( a2548a );
a2587a <=( a384a ) or ( a385a );
a2590a <=( a382a ) or ( a383a );
a2591a <=( a2590a ) or ( a2587a );
a2594a <=( a380a ) or ( a381a );
a2597a <=( a378a ) or ( a379a );
a2598a <=( a2597a ) or ( a2594a );
a2599a <=( a2598a ) or ( a2591a );
a2602a <=( a376a ) or ( a377a );
a2605a <=( a374a ) or ( a375a );
a2606a <=( a2605a ) or ( a2602a );
a2609a <=( a372a ) or ( a373a );
a2613a <=( a369a ) or ( a370a );
a2614a <=( a371a ) or ( a2613a );
a2615a <=( a2614a ) or ( a2609a );
a2616a <=( a2615a ) or ( a2606a );
a2617a <=( a2616a ) or ( a2599a );
a2620a <=( a367a ) or ( a368a );
a2623a <=( a365a ) or ( a366a );
a2624a <=( a2623a ) or ( a2620a );
a2627a <=( a363a ) or ( a364a );
a2631a <=( a360a ) or ( a361a );
a2632a <=( a362a ) or ( a2631a );
a2633a <=( a2632a ) or ( a2627a );
a2634a <=( a2633a ) or ( a2624a );
a2637a <=( a358a ) or ( a359a );
a2640a <=( a356a ) or ( a357a );
a2641a <=( a2640a ) or ( a2637a );
a2644a <=( a354a ) or ( a355a );
a2648a <=( a351a ) or ( a352a );
a2649a <=( a353a ) or ( a2648a );
a2650a <=( a2649a ) or ( a2644a );
a2651a <=( a2650a ) or ( a2641a );
a2652a <=( a2651a ) or ( a2634a );
a2653a <=( a2652a ) or ( a2617a );
a2654a <=( a2653a ) or ( a2584a );
a2657a <=( a349a ) or ( a350a );
a2660a <=( a347a ) or ( a348a );
a2661a <=( a2660a ) or ( a2657a );
a2664a <=( a345a ) or ( a346a );
a2667a <=( a343a ) or ( a344a );
a2668a <=( a2667a ) or ( a2664a );
a2669a <=( a2668a ) or ( a2661a );
a2672a <=( a341a ) or ( a342a );
a2675a <=( a339a ) or ( a340a );
a2676a <=( a2675a ) or ( a2672a );
a2679a <=( a337a ) or ( a338a );
a2683a <=( a334a ) or ( a335a );
a2684a <=( a336a ) or ( a2683a );
a2685a <=( a2684a ) or ( a2679a );
a2686a <=( a2685a ) or ( a2676a );
a2687a <=( a2686a ) or ( a2669a );
a2690a <=( a332a ) or ( a333a );
a2693a <=( a330a ) or ( a331a );
a2694a <=( a2693a ) or ( a2690a );
a2697a <=( a328a ) or ( a329a );
a2701a <=( a325a ) or ( a326a );
a2702a <=( a327a ) or ( a2701a );
a2703a <=( a2702a ) or ( a2697a );
a2704a <=( a2703a ) or ( a2694a );
a2707a <=( a323a ) or ( a324a );
a2710a <=( a321a ) or ( a322a );
a2711a <=( a2710a ) or ( a2707a );
a2714a <=( a319a ) or ( a320a );
a2718a <=( a316a ) or ( a317a );
a2719a <=( a318a ) or ( a2718a );
a2720a <=( a2719a ) or ( a2714a );
a2721a <=( a2720a ) or ( a2711a );
a2722a <=( a2721a ) or ( a2704a );
a2723a <=( a2722a ) or ( a2687a );
a2726a <=( a314a ) or ( a315a );
a2729a <=( a312a ) or ( a313a );
a2730a <=( a2729a ) or ( a2726a );
a2733a <=( a310a ) or ( a311a );
a2736a <=( a308a ) or ( a309a );
a2737a <=( a2736a ) or ( a2733a );
a2738a <=( a2737a ) or ( a2730a );
a2741a <=( a306a ) or ( a307a );
a2744a <=( a304a ) or ( a305a );
a2745a <=( a2744a ) or ( a2741a );
a2748a <=( a302a ) or ( a303a );
a2752a <=( a299a ) or ( a300a );
a2753a <=( a301a ) or ( a2752a );
a2754a <=( a2753a ) or ( a2748a );
a2755a <=( a2754a ) or ( a2745a );
a2756a <=( a2755a ) or ( a2738a );
a2759a <=( a297a ) or ( a298a );
a2762a <=( a295a ) or ( a296a );
a2763a <=( a2762a ) or ( a2759a );
a2766a <=( a293a ) or ( a294a );
a2770a <=( a290a ) or ( a291a );
a2771a <=( a292a ) or ( a2770a );
a2772a <=( a2771a ) or ( a2766a );
a2773a <=( a2772a ) or ( a2763a );
a2776a <=( a288a ) or ( a289a );
a2779a <=( a286a ) or ( a287a );
a2780a <=( a2779a ) or ( a2776a );
a2783a <=( a284a ) or ( a285a );
a2787a <=( a281a ) or ( a282a );
a2788a <=( a283a ) or ( a2787a );
a2789a <=( a2788a ) or ( a2783a );
a2790a <=( a2789a ) or ( a2780a );
a2791a <=( a2790a ) or ( a2773a );
a2792a <=( a2791a ) or ( a2756a );
a2793a <=( a2792a ) or ( a2723a );
a2794a <=( a2793a ) or ( a2654a );
a2795a <=( a2794a ) or ( a2515a );
a2798a <=( a279a ) or ( a280a );
a2801a <=( a277a ) or ( a278a );
a2802a <=( a2801a ) or ( a2798a );
a2805a <=( a275a ) or ( a276a );
a2808a <=( a273a ) or ( a274a );
a2809a <=( a2808a ) or ( a2805a );
a2810a <=( a2809a ) or ( a2802a );
a2813a <=( a271a ) or ( a272a );
a2816a <=( a269a ) or ( a270a );
a2817a <=( a2816a ) or ( a2813a );
a2820a <=( a267a ) or ( a268a );
a2824a <=( a264a ) or ( a265a );
a2825a <=( a266a ) or ( a2824a );
a2826a <=( a2825a ) or ( a2820a );
a2827a <=( a2826a ) or ( a2817a );
a2828a <=( a2827a ) or ( a2810a );
a2831a <=( a262a ) or ( a263a );
a2834a <=( a260a ) or ( a261a );
a2835a <=( a2834a ) or ( a2831a );
a2838a <=( a258a ) or ( a259a );
a2842a <=( a255a ) or ( a256a );
a2843a <=( a257a ) or ( a2842a );
a2844a <=( a2843a ) or ( a2838a );
a2845a <=( a2844a ) or ( a2835a );
a2848a <=( a253a ) or ( a254a );
a2851a <=( a251a ) or ( a252a );
a2852a <=( a2851a ) or ( a2848a );
a2855a <=( a249a ) or ( a250a );
a2859a <=( a246a ) or ( a247a );
a2860a <=( a248a ) or ( a2859a );
a2861a <=( a2860a ) or ( a2855a );
a2862a <=( a2861a ) or ( a2852a );
a2863a <=( a2862a ) or ( a2845a );
a2864a <=( a2863a ) or ( a2828a );
a2867a <=( a244a ) or ( a245a );
a2870a <=( a242a ) or ( a243a );
a2871a <=( a2870a ) or ( a2867a );
a2874a <=( a240a ) or ( a241a );
a2877a <=( a238a ) or ( a239a );
a2878a <=( a2877a ) or ( a2874a );
a2879a <=( a2878a ) or ( a2871a );
a2882a <=( a236a ) or ( a237a );
a2885a <=( a234a ) or ( a235a );
a2886a <=( a2885a ) or ( a2882a );
a2889a <=( a232a ) or ( a233a );
a2893a <=( a229a ) or ( a230a );
a2894a <=( a231a ) or ( a2893a );
a2895a <=( a2894a ) or ( a2889a );
a2896a <=( a2895a ) or ( a2886a );
a2897a <=( a2896a ) or ( a2879a );
a2900a <=( a227a ) or ( a228a );
a2903a <=( a225a ) or ( a226a );
a2904a <=( a2903a ) or ( a2900a );
a2907a <=( a223a ) or ( a224a );
a2911a <=( a220a ) or ( a221a );
a2912a <=( a222a ) or ( a2911a );
a2913a <=( a2912a ) or ( a2907a );
a2914a <=( a2913a ) or ( a2904a );
a2917a <=( a218a ) or ( a219a );
a2920a <=( a216a ) or ( a217a );
a2921a <=( a2920a ) or ( a2917a );
a2924a <=( a214a ) or ( a215a );
a2928a <=( a211a ) or ( a212a );
a2929a <=( a213a ) or ( a2928a );
a2930a <=( a2929a ) or ( a2924a );
a2931a <=( a2930a ) or ( a2921a );
a2932a <=( a2931a ) or ( a2914a );
a2933a <=( a2932a ) or ( a2897a );
a2934a <=( a2933a ) or ( a2864a );
a2937a <=( a209a ) or ( a210a );
a2940a <=( a207a ) or ( a208a );
a2941a <=( a2940a ) or ( a2937a );
a2944a <=( a205a ) or ( a206a );
a2947a <=( a203a ) or ( a204a );
a2948a <=( a2947a ) or ( a2944a );
a2949a <=( a2948a ) or ( a2941a );
a2952a <=( a201a ) or ( a202a );
a2955a <=( a199a ) or ( a200a );
a2956a <=( a2955a ) or ( a2952a );
a2959a <=( a197a ) or ( a198a );
a2963a <=( a194a ) or ( a195a );
a2964a <=( a196a ) or ( a2963a );
a2965a <=( a2964a ) or ( a2959a );
a2966a <=( a2965a ) or ( a2956a );
a2967a <=( a2966a ) or ( a2949a );
a2970a <=( a192a ) or ( a193a );
a2973a <=( a190a ) or ( a191a );
a2974a <=( a2973a ) or ( a2970a );
a2977a <=( a188a ) or ( a189a );
a2981a <=( a185a ) or ( a186a );
a2982a <=( a187a ) or ( a2981a );
a2983a <=( a2982a ) or ( a2977a );
a2984a <=( a2983a ) or ( a2974a );
a2987a <=( a183a ) or ( a184a );
a2990a <=( a181a ) or ( a182a );
a2991a <=( a2990a ) or ( a2987a );
a2994a <=( a179a ) or ( a180a );
a2998a <=( a176a ) or ( a177a );
a2999a <=( a178a ) or ( a2998a );
a3000a <=( a2999a ) or ( a2994a );
a3001a <=( a3000a ) or ( a2991a );
a3002a <=( a3001a ) or ( a2984a );
a3003a <=( a3002a ) or ( a2967a );
a3006a <=( a174a ) or ( a175a );
a3009a <=( a172a ) or ( a173a );
a3010a <=( a3009a ) or ( a3006a );
a3013a <=( a170a ) or ( a171a );
a3016a <=( a168a ) or ( a169a );
a3017a <=( a3016a ) or ( a3013a );
a3018a <=( a3017a ) or ( a3010a );
a3021a <=( a166a ) or ( a167a );
a3024a <=( a164a ) or ( a165a );
a3025a <=( a3024a ) or ( a3021a );
a3028a <=( a162a ) or ( a163a );
a3032a <=( a159a ) or ( a160a );
a3033a <=( a161a ) or ( a3032a );
a3034a <=( a3033a ) or ( a3028a );
a3035a <=( a3034a ) or ( a3025a );
a3036a <=( a3035a ) or ( a3018a );
a3039a <=( a157a ) or ( a158a );
a3042a <=( a155a ) or ( a156a );
a3043a <=( a3042a ) or ( a3039a );
a3046a <=( a153a ) or ( a154a );
a3050a <=( a150a ) or ( a151a );
a3051a <=( a152a ) or ( a3050a );
a3052a <=( a3051a ) or ( a3046a );
a3053a <=( a3052a ) or ( a3043a );
a3056a <=( a148a ) or ( a149a );
a3059a <=( a146a ) or ( a147a );
a3060a <=( a3059a ) or ( a3056a );
a3063a <=( a144a ) or ( a145a );
a3067a <=( a141a ) or ( a142a );
a3068a <=( a143a ) or ( a3067a );
a3069a <=( a3068a ) or ( a3063a );
a3070a <=( a3069a ) or ( a3060a );
a3071a <=( a3070a ) or ( a3053a );
a3072a <=( a3071a ) or ( a3036a );
a3073a <=( a3072a ) or ( a3003a );
a3074a <=( a3073a ) or ( a2934a );
a3077a <=( a139a ) or ( a140a );
a3080a <=( a137a ) or ( a138a );
a3081a <=( a3080a ) or ( a3077a );
a3084a <=( a135a ) or ( a136a );
a3087a <=( a133a ) or ( a134a );
a3088a <=( a3087a ) or ( a3084a );
a3089a <=( a3088a ) or ( a3081a );
a3092a <=( a131a ) or ( a132a );
a3095a <=( a129a ) or ( a130a );
a3096a <=( a3095a ) or ( a3092a );
a3099a <=( a127a ) or ( a128a );
a3103a <=( a124a ) or ( a125a );
a3104a <=( a126a ) or ( a3103a );
a3105a <=( a3104a ) or ( a3099a );
a3106a <=( a3105a ) or ( a3096a );
a3107a <=( a3106a ) or ( a3089a );
a3110a <=( a122a ) or ( a123a );
a3113a <=( a120a ) or ( a121a );
a3114a <=( a3113a ) or ( a3110a );
a3117a <=( a118a ) or ( a119a );
a3121a <=( a115a ) or ( a116a );
a3122a <=( a117a ) or ( a3121a );
a3123a <=( a3122a ) or ( a3117a );
a3124a <=( a3123a ) or ( a3114a );
a3127a <=( a113a ) or ( a114a );
a3130a <=( a111a ) or ( a112a );
a3131a <=( a3130a ) or ( a3127a );
a3134a <=( a109a ) or ( a110a );
a3138a <=( a106a ) or ( a107a );
a3139a <=( a108a ) or ( a3138a );
a3140a <=( a3139a ) or ( a3134a );
a3141a <=( a3140a ) or ( a3131a );
a3142a <=( a3141a ) or ( a3124a );
a3143a <=( a3142a ) or ( a3107a );
a3146a <=( a104a ) or ( a105a );
a3149a <=( a102a ) or ( a103a );
a3150a <=( a3149a ) or ( a3146a );
a3153a <=( a100a ) or ( a101a );
a3156a <=( a98a ) or ( a99a );
a3157a <=( a3156a ) or ( a3153a );
a3158a <=( a3157a ) or ( a3150a );
a3161a <=( a96a ) or ( a97a );
a3164a <=( a94a ) or ( a95a );
a3165a <=( a3164a ) or ( a3161a );
a3168a <=( a92a ) or ( a93a );
a3172a <=( a89a ) or ( a90a );
a3173a <=( a91a ) or ( a3172a );
a3174a <=( a3173a ) or ( a3168a );
a3175a <=( a3174a ) or ( a3165a );
a3176a <=( a3175a ) or ( a3158a );
a3179a <=( a87a ) or ( a88a );
a3182a <=( a85a ) or ( a86a );
a3183a <=( a3182a ) or ( a3179a );
a3186a <=( a83a ) or ( a84a );
a3190a <=( a80a ) or ( a81a );
a3191a <=( a82a ) or ( a3190a );
a3192a <=( a3191a ) or ( a3186a );
a3193a <=( a3192a ) or ( a3183a );
a3196a <=( a78a ) or ( a79a );
a3199a <=( a76a ) or ( a77a );
a3200a <=( a3199a ) or ( a3196a );
a3203a <=( a74a ) or ( a75a );
a3207a <=( a71a ) or ( a72a );
a3208a <=( a73a ) or ( a3207a );
a3209a <=( a3208a ) or ( a3203a );
a3210a <=( a3209a ) or ( a3200a );
a3211a <=( a3210a ) or ( a3193a );
a3212a <=( a3211a ) or ( a3176a );
a3213a <=( a3212a ) or ( a3143a );
a3216a <=( a69a ) or ( a70a );
a3219a <=( a67a ) or ( a68a );
a3220a <=( a3219a ) or ( a3216a );
a3223a <=( a65a ) or ( a66a );
a3226a <=( a63a ) or ( a64a );
a3227a <=( a3226a ) or ( a3223a );
a3228a <=( a3227a ) or ( a3220a );
a3231a <=( a61a ) or ( a62a );
a3234a <=( a59a ) or ( a60a );
a3235a <=( a3234a ) or ( a3231a );
a3238a <=( a57a ) or ( a58a );
a3242a <=( a54a ) or ( a55a );
a3243a <=( a56a ) or ( a3242a );
a3244a <=( a3243a ) or ( a3238a );
a3245a <=( a3244a ) or ( a3235a );
a3246a <=( a3245a ) or ( a3228a );
a3249a <=( a52a ) or ( a53a );
a3252a <=( a50a ) or ( a51a );
a3253a <=( a3252a ) or ( a3249a );
a3256a <=( a48a ) or ( a49a );
a3260a <=( a45a ) or ( a46a );
a3261a <=( a47a ) or ( a3260a );
a3262a <=( a3261a ) or ( a3256a );
a3263a <=( a3262a ) or ( a3253a );
a3266a <=( a43a ) or ( a44a );
a3269a <=( a41a ) or ( a42a );
a3270a <=( a3269a ) or ( a3266a );
a3273a <=( a39a ) or ( a40a );
a3277a <=( a36a ) or ( a37a );
a3278a <=( a38a ) or ( a3277a );
a3279a <=( a3278a ) or ( a3273a );
a3280a <=( a3279a ) or ( a3270a );
a3281a <=( a3280a ) or ( a3263a );
a3282a <=( a3281a ) or ( a3246a );
a3285a <=( a34a ) or ( a35a );
a3288a <=( a32a ) or ( a33a );
a3289a <=( a3288a ) or ( a3285a );
a3292a <=( a30a ) or ( a31a );
a3295a <=( a28a ) or ( a29a );
a3296a <=( a3295a ) or ( a3292a );
a3297a <=( a3296a ) or ( a3289a );
a3300a <=( a26a ) or ( a27a );
a3303a <=( a24a ) or ( a25a );
a3304a <=( a3303a ) or ( a3300a );
a3307a <=( a22a ) or ( a23a );
a3311a <=( a19a ) or ( a20a );
a3312a <=( a21a ) or ( a3311a );
a3313a <=( a3312a ) or ( a3307a );
a3314a <=( a3313a ) or ( a3304a );
a3315a <=( a3314a ) or ( a3297a );
a3318a <=( a17a ) or ( a18a );
a3321a <=( a15a ) or ( a16a );
a3322a <=( a3321a ) or ( a3318a );
a3325a <=( a13a ) or ( a14a );
a3329a <=( a10a ) or ( a11a );
a3330a <=( a12a ) or ( a3329a );
a3331a <=( a3330a ) or ( a3325a );
a3332a <=( a3331a ) or ( a3322a );
a3335a <=( a8a ) or ( a9a );
a3338a <=( a6a ) or ( a7a );
a3339a <=( a3338a ) or ( a3335a );
a3342a <=( a4a ) or ( a5a );
a3346a <=( a1a ) or ( a2a );
a3347a <=( a3a ) or ( a3346a );
a3348a <=( a3347a ) or ( a3342a );
a3349a <=( a3348a ) or ( a3339a );
a3350a <=( a3349a ) or ( a3332a );
a3351a <=( a3350a ) or ( a3315a );
a3352a <=( a3351a ) or ( a3282a );
a3353a <=( a3352a ) or ( a3213a );
a3354a <=( a3353a ) or ( a3074a );
a3355a <=( a3354a ) or ( a2795a );
a3358a <=( A200 and (not A199) );
a3361a <=( A233 and (not A232) );
a3364a <=( A166 and A168 );
a3367a <=( A233 and (not A232) );
a3370a <=( A167 and A168 );
a3373a <=( A233 and (not A232) );
a3377a <=( A232 and A200 );
a3378a <=( (not A199) and a3377a );
a3382a <=( A235 and A234 );
a3383a <=( (not A233) and a3382a );
a3387a <=( A232 and A200 );
a3388a <=( (not A199) and a3387a );
a3392a <=( A236 and A234 );
a3393a <=( (not A233) and a3392a );
a3397a <=( A201 and (not A200) );
a3398a <=( A199 and a3397a );
a3402a <=( A233 and (not A232) );
a3403a <=( A202 and a3402a );
a3407a <=( A201 and (not A200) );
a3408a <=( A199 and a3407a );
a3412a <=( A233 and (not A232) );
a3413a <=( A203 and a3412a );
a3417a <=( A232 and A166 );
a3418a <=( A168 and a3417a );
a3422a <=( A235 and A234 );
a3423a <=( (not A233) and a3422a );
a3427a <=( A232 and A166 );
a3428a <=( A168 and a3427a );
a3432a <=( A236 and A234 );
a3433a <=( (not A233) and a3432a );
a3437a <=( A232 and A167 );
a3438a <=( A168 and a3437a );
a3442a <=( A235 and A234 );
a3443a <=( (not A233) and a3442a );
a3447a <=( A232 and A167 );
a3448a <=( A168 and a3447a );
a3452a <=( A236 and A234 );
a3453a <=( (not A233) and a3452a );
a3457a <=( A167 and A169 );
a3458a <=( (not A170) and a3457a );
a3462a <=( A233 and (not A232) );
a3463a <=( A166 and a3462a );
a3467a <=( (not A167) and A169 );
a3468a <=( (not A170) and a3467a );
a3472a <=( A233 and (not A232) );
a3473a <=( (not A166) and a3472a );
a3477a <=( A167 and (not A169) );
a3478a <=( A170 and a3477a );
a3482a <=( A233 and (not A232) );
a3483a <=( (not A166) and a3482a );
a3487a <=( (not A167) and (not A169) );
a3488a <=( A170 and a3487a );
a3492a <=( A233 and (not A232) );
a3493a <=( A166 and a3492a );
a3496a <=( (not A200) and A199 );
a3499a <=( A202 and A201 );
a3500a <=( a3499a and a3496a );
a3503a <=( (not A233) and A232 );
a3506a <=( A235 and A234 );
a3507a <=( a3506a and a3503a );
a3510a <=( (not A200) and A199 );
a3513a <=( A202 and A201 );
a3514a <=( a3513a and a3510a );
a3517a <=( (not A233) and A232 );
a3520a <=( A236 and A234 );
a3521a <=( a3520a and a3517a );
a3524a <=( (not A200) and A199 );
a3527a <=( A203 and A201 );
a3528a <=( a3527a and a3524a );
a3531a <=( (not A233) and A232 );
a3534a <=( A235 and A234 );
a3535a <=( a3534a and a3531a );
a3538a <=( (not A200) and A199 );
a3541a <=( A203 and A201 );
a3542a <=( a3541a and a3538a );
a3545a <=( (not A233) and A232 );
a3548a <=( A236 and A234 );
a3549a <=( a3548a and a3545a );
a3552a <=( A166 and A168 );
a3555a <=( A200 and A199 );
a3556a <=( a3555a and a3552a );
a3559a <=( A266 and A265 );
a3562a <=( A299 and (not A298) );
a3563a <=( a3562a and a3559a );
a3566a <=( A166 and A168 );
a3569a <=( A200 and A199 );
a3570a <=( a3569a and a3566a );
a3573a <=( (not A267) and (not A266) );
a3576a <=( A299 and (not A298) );
a3577a <=( a3576a and a3573a );
a3580a <=( A166 and A168 );
a3583a <=( A200 and A199 );
a3584a <=( a3583a and a3580a );
a3587a <=( (not A266) and (not A265) );
a3590a <=( A299 and (not A298) );
a3591a <=( a3590a and a3587a );
a3594a <=( A166 and A168 );
a3597a <=( A200 and (not A199) );
a3598a <=( a3597a and a3594a );
a3601a <=( A266 and (not A265) );
a3604a <=( (not A300) and A298 );
a3605a <=( a3604a and a3601a );
a3608a <=( A166 and A168 );
a3611a <=( A200 and (not A199) );
a3612a <=( a3611a and a3608a );
a3615a <=( A266 and (not A265) );
a3618a <=( A299 and A298 );
a3619a <=( a3618a and a3615a );
a3622a <=( A166 and A168 );
a3625a <=( A200 and (not A199) );
a3626a <=( a3625a and a3622a );
a3629a <=( A266 and (not A265) );
a3632a <=( (not A299) and (not A298) );
a3633a <=( a3632a and a3629a );
a3636a <=( A166 and A168 );
a3639a <=( (not A201) and (not A200) );
a3640a <=( a3639a and a3636a );
a3643a <=( A266 and A265 );
a3646a <=( A299 and (not A298) );
a3647a <=( a3646a and a3643a );
a3650a <=( A166 and A168 );
a3653a <=( (not A201) and (not A200) );
a3654a <=( a3653a and a3650a );
a3657a <=( (not A267) and (not A266) );
a3660a <=( A299 and (not A298) );
a3661a <=( a3660a and a3657a );
a3664a <=( A166 and A168 );
a3667a <=( (not A201) and (not A200) );
a3668a <=( a3667a and a3664a );
a3671a <=( (not A266) and (not A265) );
a3674a <=( A299 and (not A298) );
a3675a <=( a3674a and a3671a );
a3678a <=( A166 and A168 );
a3681a <=( (not A200) and (not A199) );
a3682a <=( a3681a and a3678a );
a3685a <=( A266 and A265 );
a3688a <=( A299 and (not A298) );
a3689a <=( a3688a and a3685a );
a3692a <=( A166 and A168 );
a3695a <=( (not A200) and (not A199) );
a3696a <=( a3695a and a3692a );
a3699a <=( (not A267) and (not A266) );
a3702a <=( A299 and (not A298) );
a3703a <=( a3702a and a3699a );
a3706a <=( A166 and A168 );
a3709a <=( (not A200) and (not A199) );
a3710a <=( a3709a and a3706a );
a3713a <=( (not A266) and (not A265) );
a3716a <=( A299 and (not A298) );
a3717a <=( a3716a and a3713a );
a3720a <=( A167 and A168 );
a3723a <=( A200 and A199 );
a3724a <=( a3723a and a3720a );
a3727a <=( A266 and A265 );
a3730a <=( A299 and (not A298) );
a3731a <=( a3730a and a3727a );
a3734a <=( A167 and A168 );
a3737a <=( A200 and A199 );
a3738a <=( a3737a and a3734a );
a3741a <=( (not A267) and (not A266) );
a3744a <=( A299 and (not A298) );
a3745a <=( a3744a and a3741a );
a3748a <=( A167 and A168 );
a3751a <=( A200 and A199 );
a3752a <=( a3751a and a3748a );
a3755a <=( (not A266) and (not A265) );
a3758a <=( A299 and (not A298) );
a3759a <=( a3758a and a3755a );
a3762a <=( A167 and A168 );
a3765a <=( A200 and (not A199) );
a3766a <=( a3765a and a3762a );
a3769a <=( A266 and (not A265) );
a3772a <=( (not A300) and A298 );
a3773a <=( a3772a and a3769a );
a3776a <=( A167 and A168 );
a3779a <=( A200 and (not A199) );
a3780a <=( a3779a and a3776a );
a3783a <=( A266 and (not A265) );
a3786a <=( A299 and A298 );
a3787a <=( a3786a and a3783a );
a3790a <=( A167 and A168 );
a3793a <=( A200 and (not A199) );
a3794a <=( a3793a and a3790a );
a3797a <=( A266 and (not A265) );
a3800a <=( (not A299) and (not A298) );
a3801a <=( a3800a and a3797a );
a3804a <=( A167 and A168 );
a3807a <=( (not A201) and (not A200) );
a3808a <=( a3807a and a3804a );
a3811a <=( A266 and A265 );
a3814a <=( A299 and (not A298) );
a3815a <=( a3814a and a3811a );
a3818a <=( A167 and A168 );
a3821a <=( (not A201) and (not A200) );
a3822a <=( a3821a and a3818a );
a3825a <=( (not A267) and (not A266) );
a3828a <=( A299 and (not A298) );
a3829a <=( a3828a and a3825a );
a3832a <=( A167 and A168 );
a3835a <=( (not A201) and (not A200) );
a3836a <=( a3835a and a3832a );
a3839a <=( (not A266) and (not A265) );
a3842a <=( A299 and (not A298) );
a3843a <=( a3842a and a3839a );
a3846a <=( A167 and A168 );
a3849a <=( (not A200) and (not A199) );
a3850a <=( a3849a and a3846a );
a3853a <=( A266 and A265 );
a3856a <=( A299 and (not A298) );
a3857a <=( a3856a and a3853a );
a3860a <=( A167 and A168 );
a3863a <=( (not A200) and (not A199) );
a3864a <=( a3863a and a3860a );
a3867a <=( (not A267) and (not A266) );
a3870a <=( A299 and (not A298) );
a3871a <=( a3870a and a3867a );
a3874a <=( A167 and A168 );
a3877a <=( (not A200) and (not A199) );
a3878a <=( a3877a and a3874a );
a3881a <=( (not A266) and (not A265) );
a3884a <=( A299 and (not A298) );
a3885a <=( a3884a and a3881a );
a3888a <=( A169 and (not A170) );
a3891a <=( A166 and A167 );
a3892a <=( a3891a and a3888a );
a3895a <=( (not A233) and A232 );
a3898a <=( A235 and A234 );
a3899a <=( a3898a and a3895a );
a3902a <=( A169 and (not A170) );
a3905a <=( A166 and A167 );
a3906a <=( a3905a and a3902a );
a3909a <=( (not A233) and A232 );
a3912a <=( A236 and A234 );
a3913a <=( a3912a and a3909a );
a3916a <=( A169 and (not A170) );
a3919a <=( (not A166) and (not A167) );
a3920a <=( a3919a and a3916a );
a3923a <=( (not A233) and A232 );
a3926a <=( A235 and A234 );
a3927a <=( a3926a and a3923a );
a3930a <=( A169 and (not A170) );
a3933a <=( (not A166) and (not A167) );
a3934a <=( a3933a and a3930a );
a3937a <=( (not A233) and A232 );
a3940a <=( A236 and A234 );
a3941a <=( a3940a and a3937a );
a3944a <=( (not A169) and A170 );
a3947a <=( (not A166) and A167 );
a3948a <=( a3947a and a3944a );
a3951a <=( (not A233) and A232 );
a3954a <=( A235 and A234 );
a3955a <=( a3954a and a3951a );
a3958a <=( (not A169) and A170 );
a3961a <=( (not A166) and A167 );
a3962a <=( a3961a and a3958a );
a3965a <=( (not A233) and A232 );
a3968a <=( A236 and A234 );
a3969a <=( a3968a and a3965a );
a3972a <=( (not A169) and A170 );
a3975a <=( A166 and (not A167) );
a3976a <=( a3975a and a3972a );
a3979a <=( (not A233) and A232 );
a3982a <=( A235 and A234 );
a3983a <=( a3982a and a3979a );
a3986a <=( (not A169) and A170 );
a3989a <=( A166 and (not A167) );
a3990a <=( a3989a and a3986a );
a3993a <=( (not A233) and A232 );
a3996a <=( A236 and A234 );
a3997a <=( a3996a and a3993a );
a4000a <=( A166 and A168 );
a4003a <=( A200 and A199 );
a4004a <=( a4003a and a4000a );
a4007a <=( (not A268) and (not A266) );
a4011a <=( A299 and (not A298) );
a4012a <=( (not A269) and a4011a );
a4013a <=( a4012a and a4007a );
a4016a <=( A166 and A168 );
a4019a <=( A200 and (not A199) );
a4020a <=( a4019a and a4016a );
a4023a <=( A266 and (not A265) );
a4027a <=( (not A302) and (not A301) );
a4028a <=( A298 and a4027a );
a4029a <=( a4028a and a4023a );
a4032a <=( A166 and A168 );
a4035a <=( (not A202) and (not A200) );
a4036a <=( a4035a and a4032a );
a4039a <=( A265 and (not A203) );
a4043a <=( A299 and (not A298) );
a4044a <=( A266 and a4043a );
a4045a <=( a4044a and a4039a );
a4048a <=( A166 and A168 );
a4051a <=( (not A202) and (not A200) );
a4052a <=( a4051a and a4048a );
a4055a <=( (not A266) and (not A203) );
a4059a <=( A299 and (not A298) );
a4060a <=( (not A267) and a4059a );
a4061a <=( a4060a and a4055a );
a4064a <=( A166 and A168 );
a4067a <=( (not A202) and (not A200) );
a4068a <=( a4067a and a4064a );
a4071a <=( (not A265) and (not A203) );
a4075a <=( A299 and (not A298) );
a4076a <=( (not A266) and a4075a );
a4077a <=( a4076a and a4071a );
a4080a <=( A166 and A168 );
a4083a <=( (not A201) and (not A200) );
a4084a <=( a4083a and a4080a );
a4087a <=( (not A268) and (not A266) );
a4091a <=( A299 and (not A298) );
a4092a <=( (not A269) and a4091a );
a4093a <=( a4092a and a4087a );
a4096a <=( A166 and A168 );
a4099a <=( (not A200) and (not A199) );
a4100a <=( a4099a and a4096a );
a4103a <=( (not A268) and (not A266) );
a4107a <=( A299 and (not A298) );
a4108a <=( (not A269) and a4107a );
a4109a <=( a4108a and a4103a );
a4112a <=( A167 and A168 );
a4115a <=( A200 and A199 );
a4116a <=( a4115a and a4112a );
a4119a <=( (not A268) and (not A266) );
a4123a <=( A299 and (not A298) );
a4124a <=( (not A269) and a4123a );
a4125a <=( a4124a and a4119a );
a4128a <=( A167 and A168 );
a4131a <=( A200 and (not A199) );
a4132a <=( a4131a and a4128a );
a4135a <=( A266 and (not A265) );
a4139a <=( (not A302) and (not A301) );
a4140a <=( A298 and a4139a );
a4141a <=( a4140a and a4135a );
a4144a <=( A167 and A168 );
a4147a <=( (not A202) and (not A200) );
a4148a <=( a4147a and a4144a );
a4151a <=( A265 and (not A203) );
a4155a <=( A299 and (not A298) );
a4156a <=( A266 and a4155a );
a4157a <=( a4156a and a4151a );
a4160a <=( A167 and A168 );
a4163a <=( (not A202) and (not A200) );
a4164a <=( a4163a and a4160a );
a4167a <=( (not A266) and (not A203) );
a4171a <=( A299 and (not A298) );
a4172a <=( (not A267) and a4171a );
a4173a <=( a4172a and a4167a );
a4176a <=( A167 and A168 );
a4179a <=( (not A202) and (not A200) );
a4180a <=( a4179a and a4176a );
a4183a <=( (not A265) and (not A203) );
a4187a <=( A299 and (not A298) );
a4188a <=( (not A266) and a4187a );
a4189a <=( a4188a and a4183a );
a4192a <=( A167 and A168 );
a4195a <=( (not A201) and (not A200) );
a4196a <=( a4195a and a4192a );
a4199a <=( (not A268) and (not A266) );
a4203a <=( A299 and (not A298) );
a4204a <=( (not A269) and a4203a );
a4205a <=( a4204a and a4199a );
a4208a <=( A167 and A168 );
a4211a <=( (not A200) and (not A199) );
a4212a <=( a4211a and a4208a );
a4215a <=( (not A268) and (not A266) );
a4219a <=( A299 and (not A298) );
a4220a <=( (not A269) and a4219a );
a4221a <=( a4220a and a4215a );
a4224a <=( (not A167) and A170 );
a4227a <=( A199 and (not A166) );
a4228a <=( a4227a and a4224a );
a4231a <=( (not A265) and A200 );
a4235a <=( (not A300) and A298 );
a4236a <=( A266 and a4235a );
a4237a <=( a4236a and a4231a );
a4240a <=( (not A167) and A170 );
a4243a <=( A199 and (not A166) );
a4244a <=( a4243a and a4240a );
a4247a <=( (not A265) and A200 );
a4251a <=( A299 and A298 );
a4252a <=( A266 and a4251a );
a4253a <=( a4252a and a4247a );
a4256a <=( (not A167) and A170 );
a4259a <=( A199 and (not A166) );
a4260a <=( a4259a and a4256a );
a4263a <=( (not A265) and A200 );
a4267a <=( (not A299) and (not A298) );
a4268a <=( A266 and a4267a );
a4269a <=( a4268a and a4263a );
a4272a <=( (not A167) and A170 );
a4275a <=( (not A199) and (not A166) );
a4276a <=( a4275a and a4272a );
a4279a <=( A265 and A200 );
a4283a <=( A299 and (not A298) );
a4284a <=( A266 and a4283a );
a4285a <=( a4284a and a4279a );
a4288a <=( (not A167) and A170 );
a4291a <=( (not A199) and (not A166) );
a4292a <=( a4291a and a4288a );
a4295a <=( (not A266) and A200 );
a4299a <=( A299 and (not A298) );
a4300a <=( (not A267) and a4299a );
a4301a <=( a4300a and a4295a );
a4304a <=( (not A167) and A170 );
a4307a <=( (not A199) and (not A166) );
a4308a <=( a4307a and a4304a );
a4311a <=( (not A265) and A200 );
a4315a <=( A299 and (not A298) );
a4316a <=( (not A266) and a4315a );
a4317a <=( a4316a and a4311a );
a4320a <=( (not A167) and A170 );
a4323a <=( (not A200) and (not A166) );
a4324a <=( a4323a and a4320a );
a4327a <=( (not A265) and (not A201) );
a4331a <=( (not A300) and A298 );
a4332a <=( A266 and a4331a );
a4333a <=( a4332a and a4327a );
a4336a <=( (not A167) and A170 );
a4339a <=( (not A200) and (not A166) );
a4340a <=( a4339a and a4336a );
a4343a <=( (not A265) and (not A201) );
a4347a <=( A299 and A298 );
a4348a <=( A266 and a4347a );
a4349a <=( a4348a and a4343a );
a4352a <=( (not A167) and A170 );
a4355a <=( (not A200) and (not A166) );
a4356a <=( a4355a and a4352a );
a4359a <=( (not A265) and (not A201) );
a4363a <=( (not A299) and (not A298) );
a4364a <=( A266 and a4363a );
a4365a <=( a4364a and a4359a );
a4368a <=( (not A167) and A170 );
a4371a <=( (not A199) and (not A166) );
a4372a <=( a4371a and a4368a );
a4375a <=( (not A265) and (not A200) );
a4379a <=( (not A300) and A298 );
a4380a <=( A266 and a4379a );
a4381a <=( a4380a and a4375a );
a4384a <=( (not A167) and A170 );
a4387a <=( (not A199) and (not A166) );
a4388a <=( a4387a and a4384a );
a4391a <=( (not A265) and (not A200) );
a4395a <=( A299 and A298 );
a4396a <=( A266 and a4395a );
a4397a <=( a4396a and a4391a );
a4400a <=( (not A167) and A170 );
a4403a <=( (not A199) and (not A166) );
a4404a <=( a4403a and a4400a );
a4407a <=( (not A265) and (not A200) );
a4411a <=( (not A299) and (not A298) );
a4412a <=( A266 and a4411a );
a4413a <=( a4412a and a4407a );
a4416a <=( A169 and A170 );
a4419a <=( A199 and (not A168) );
a4420a <=( a4419a and a4416a );
a4423a <=( (not A265) and A200 );
a4427a <=( (not A300) and A298 );
a4428a <=( A266 and a4427a );
a4429a <=( a4428a and a4423a );
a4432a <=( A169 and A170 );
a4435a <=( A199 and (not A168) );
a4436a <=( a4435a and a4432a );
a4439a <=( (not A265) and A200 );
a4443a <=( A299 and A298 );
a4444a <=( A266 and a4443a );
a4445a <=( a4444a and a4439a );
a4448a <=( A169 and A170 );
a4451a <=( A199 and (not A168) );
a4452a <=( a4451a and a4448a );
a4455a <=( (not A265) and A200 );
a4459a <=( (not A299) and (not A298) );
a4460a <=( A266 and a4459a );
a4461a <=( a4460a and a4455a );
a4464a <=( A169 and A170 );
a4467a <=( (not A199) and (not A168) );
a4468a <=( a4467a and a4464a );
a4471a <=( A265 and A200 );
a4475a <=( A299 and (not A298) );
a4476a <=( A266 and a4475a );
a4477a <=( a4476a and a4471a );
a4480a <=( A169 and A170 );
a4483a <=( (not A199) and (not A168) );
a4484a <=( a4483a and a4480a );
a4487a <=( (not A266) and A200 );
a4491a <=( A299 and (not A298) );
a4492a <=( (not A267) and a4491a );
a4493a <=( a4492a and a4487a );
a4496a <=( A169 and A170 );
a4499a <=( (not A199) and (not A168) );
a4500a <=( a4499a and a4496a );
a4503a <=( (not A265) and A200 );
a4507a <=( A299 and (not A298) );
a4508a <=( (not A266) and a4507a );
a4509a <=( a4508a and a4503a );
a4512a <=( A169 and A170 );
a4515a <=( (not A200) and (not A168) );
a4516a <=( a4515a and a4512a );
a4519a <=( (not A265) and (not A201) );
a4523a <=( (not A300) and A298 );
a4524a <=( A266 and a4523a );
a4525a <=( a4524a and a4519a );
a4528a <=( A169 and A170 );
a4531a <=( (not A200) and (not A168) );
a4532a <=( a4531a and a4528a );
a4535a <=( (not A265) and (not A201) );
a4539a <=( A299 and A298 );
a4540a <=( A266 and a4539a );
a4541a <=( a4540a and a4535a );
a4544a <=( A169 and A170 );
a4547a <=( (not A200) and (not A168) );
a4548a <=( a4547a and a4544a );
a4551a <=( (not A265) and (not A201) );
a4555a <=( (not A299) and (not A298) );
a4556a <=( A266 and a4555a );
a4557a <=( a4556a and a4551a );
a4560a <=( A169 and A170 );
a4563a <=( (not A199) and (not A168) );
a4564a <=( a4563a and a4560a );
a4567a <=( (not A265) and (not A200) );
a4571a <=( (not A300) and A298 );
a4572a <=( A266 and a4571a );
a4573a <=( a4572a and a4567a );
a4576a <=( A169 and A170 );
a4579a <=( (not A199) and (not A168) );
a4580a <=( a4579a and a4576a );
a4583a <=( (not A265) and (not A200) );
a4587a <=( A299 and A298 );
a4588a <=( A266 and a4587a );
a4589a <=( a4588a and a4583a );
a4592a <=( A169 and A170 );
a4595a <=( (not A199) and (not A168) );
a4596a <=( a4595a and a4592a );
a4599a <=( (not A265) and (not A200) );
a4603a <=( (not A299) and (not A298) );
a4604a <=( A266 and a4603a );
a4605a <=( a4604a and a4599a );
a4608a <=( (not A167) and (not A169) );
a4611a <=( A199 and (not A166) );
a4612a <=( a4611a and a4608a );
a4615a <=( (not A265) and A200 );
a4619a <=( (not A300) and A298 );
a4620a <=( A266 and a4619a );
a4621a <=( a4620a and a4615a );
a4624a <=( (not A167) and (not A169) );
a4627a <=( A199 and (not A166) );
a4628a <=( a4627a and a4624a );
a4631a <=( (not A265) and A200 );
a4635a <=( A299 and A298 );
a4636a <=( A266 and a4635a );
a4637a <=( a4636a and a4631a );
a4640a <=( (not A167) and (not A169) );
a4643a <=( A199 and (not A166) );
a4644a <=( a4643a and a4640a );
a4647a <=( (not A265) and A200 );
a4651a <=( (not A299) and (not A298) );
a4652a <=( A266 and a4651a );
a4653a <=( a4652a and a4647a );
a4656a <=( (not A167) and (not A169) );
a4659a <=( (not A199) and (not A166) );
a4660a <=( a4659a and a4656a );
a4663a <=( A265 and A200 );
a4667a <=( A299 and (not A298) );
a4668a <=( A266 and a4667a );
a4669a <=( a4668a and a4663a );
a4672a <=( (not A167) and (not A169) );
a4675a <=( (not A199) and (not A166) );
a4676a <=( a4675a and a4672a );
a4679a <=( (not A266) and A200 );
a4683a <=( A299 and (not A298) );
a4684a <=( (not A267) and a4683a );
a4685a <=( a4684a and a4679a );
a4688a <=( (not A167) and (not A169) );
a4691a <=( (not A199) and (not A166) );
a4692a <=( a4691a and a4688a );
a4695a <=( (not A265) and A200 );
a4699a <=( A299 and (not A298) );
a4700a <=( (not A266) and a4699a );
a4701a <=( a4700a and a4695a );
a4704a <=( (not A167) and (not A169) );
a4707a <=( (not A200) and (not A166) );
a4708a <=( a4707a and a4704a );
a4711a <=( (not A265) and (not A201) );
a4715a <=( (not A300) and A298 );
a4716a <=( A266 and a4715a );
a4717a <=( a4716a and a4711a );
a4720a <=( (not A167) and (not A169) );
a4723a <=( (not A200) and (not A166) );
a4724a <=( a4723a and a4720a );
a4727a <=( (not A265) and (not A201) );
a4731a <=( A299 and A298 );
a4732a <=( A266 and a4731a );
a4733a <=( a4732a and a4727a );
a4736a <=( (not A167) and (not A169) );
a4739a <=( (not A200) and (not A166) );
a4740a <=( a4739a and a4736a );
a4743a <=( (not A265) and (not A201) );
a4747a <=( (not A299) and (not A298) );
a4748a <=( A266 and a4747a );
a4749a <=( a4748a and a4743a );
a4752a <=( (not A167) and (not A169) );
a4755a <=( (not A199) and (not A166) );
a4756a <=( a4755a and a4752a );
a4759a <=( (not A265) and (not A200) );
a4763a <=( (not A300) and A298 );
a4764a <=( A266 and a4763a );
a4765a <=( a4764a and a4759a );
a4768a <=( (not A167) and (not A169) );
a4771a <=( (not A199) and (not A166) );
a4772a <=( a4771a and a4768a );
a4775a <=( (not A265) and (not A200) );
a4779a <=( A299 and A298 );
a4780a <=( A266 and a4779a );
a4781a <=( a4780a and a4775a );
a4784a <=( (not A167) and (not A169) );
a4787a <=( (not A199) and (not A166) );
a4788a <=( a4787a and a4784a );
a4791a <=( (not A265) and (not A200) );
a4795a <=( (not A299) and (not A298) );
a4796a <=( A266 and a4795a );
a4797a <=( a4796a and a4791a );
a4800a <=( (not A169) and (not A170) );
a4803a <=( A199 and (not A168) );
a4804a <=( a4803a and a4800a );
a4807a <=( (not A265) and A200 );
a4811a <=( (not A300) and A298 );
a4812a <=( A266 and a4811a );
a4813a <=( a4812a and a4807a );
a4816a <=( (not A169) and (not A170) );
a4819a <=( A199 and (not A168) );
a4820a <=( a4819a and a4816a );
a4823a <=( (not A265) and A200 );
a4827a <=( A299 and A298 );
a4828a <=( A266 and a4827a );
a4829a <=( a4828a and a4823a );
a4832a <=( (not A169) and (not A170) );
a4835a <=( A199 and (not A168) );
a4836a <=( a4835a and a4832a );
a4839a <=( (not A265) and A200 );
a4843a <=( (not A299) and (not A298) );
a4844a <=( A266 and a4843a );
a4845a <=( a4844a and a4839a );
a4848a <=( (not A169) and (not A170) );
a4851a <=( (not A199) and (not A168) );
a4852a <=( a4851a and a4848a );
a4855a <=( A265 and A200 );
a4859a <=( A299 and (not A298) );
a4860a <=( A266 and a4859a );
a4861a <=( a4860a and a4855a );
a4864a <=( (not A169) and (not A170) );
a4867a <=( (not A199) and (not A168) );
a4868a <=( a4867a and a4864a );
a4871a <=( (not A266) and A200 );
a4875a <=( A299 and (not A298) );
a4876a <=( (not A267) and a4875a );
a4877a <=( a4876a and a4871a );
a4880a <=( (not A169) and (not A170) );
a4883a <=( (not A199) and (not A168) );
a4884a <=( a4883a and a4880a );
a4887a <=( (not A265) and A200 );
a4891a <=( A299 and (not A298) );
a4892a <=( (not A266) and a4891a );
a4893a <=( a4892a and a4887a );
a4896a <=( (not A169) and (not A170) );
a4899a <=( (not A200) and (not A168) );
a4900a <=( a4899a and a4896a );
a4903a <=( (not A265) and (not A201) );
a4907a <=( (not A300) and A298 );
a4908a <=( A266 and a4907a );
a4909a <=( a4908a and a4903a );
a4912a <=( (not A169) and (not A170) );
a4915a <=( (not A200) and (not A168) );
a4916a <=( a4915a and a4912a );
a4919a <=( (not A265) and (not A201) );
a4923a <=( A299 and A298 );
a4924a <=( A266 and a4923a );
a4925a <=( a4924a and a4919a );
a4928a <=( (not A169) and (not A170) );
a4931a <=( (not A200) and (not A168) );
a4932a <=( a4931a and a4928a );
a4935a <=( (not A265) and (not A201) );
a4939a <=( (not A299) and (not A298) );
a4940a <=( A266 and a4939a );
a4941a <=( a4940a and a4935a );
a4944a <=( (not A169) and (not A170) );
a4947a <=( (not A199) and (not A168) );
a4948a <=( a4947a and a4944a );
a4951a <=( (not A265) and (not A200) );
a4955a <=( (not A300) and A298 );
a4956a <=( A266 and a4955a );
a4957a <=( a4956a and a4951a );
a4960a <=( (not A169) and (not A170) );
a4963a <=( (not A199) and (not A168) );
a4964a <=( a4963a and a4960a );
a4967a <=( (not A265) and (not A200) );
a4971a <=( A299 and A298 );
a4972a <=( A266 and a4971a );
a4973a <=( a4972a and a4967a );
a4976a <=( (not A169) and (not A170) );
a4979a <=( (not A199) and (not A168) );
a4980a <=( a4979a and a4976a );
a4983a <=( (not A265) and (not A200) );
a4987a <=( (not A299) and (not A298) );
a4988a <=( A266 and a4987a );
a4989a <=( a4988a and a4983a );
a4992a <=( A166 and A168 );
a4996a <=( A265 and A200 );
a4997a <=( A199 and a4996a );
a4998a <=( a4997a and a4992a );
a5001a <=( A298 and A266 );
a5005a <=( A301 and A300 );
a5006a <=( (not A299) and a5005a );
a5007a <=( a5006a and a5001a );
a5010a <=( A166 and A168 );
a5014a <=( A265 and A200 );
a5015a <=( A199 and a5014a );
a5016a <=( a5015a and a5010a );
a5019a <=( A298 and A266 );
a5023a <=( A302 and A300 );
a5024a <=( (not A299) and a5023a );
a5025a <=( a5024a and a5019a );
a5028a <=( A166 and A168 );
a5032a <=( (not A266) and A200 );
a5033a <=( A199 and a5032a );
a5034a <=( a5033a and a5028a );
a5037a <=( A298 and (not A267) );
a5041a <=( A301 and A300 );
a5042a <=( (not A299) and a5041a );
a5043a <=( a5042a and a5037a );
a5046a <=( A166 and A168 );
a5050a <=( (not A266) and A200 );
a5051a <=( A199 and a5050a );
a5052a <=( a5051a and a5046a );
a5055a <=( A298 and (not A267) );
a5059a <=( A302 and A300 );
a5060a <=( (not A299) and a5059a );
a5061a <=( a5060a and a5055a );
a5064a <=( A166 and A168 );
a5068a <=( (not A265) and A200 );
a5069a <=( A199 and a5068a );
a5070a <=( a5069a and a5064a );
a5073a <=( A298 and (not A266) );
a5077a <=( A301 and A300 );
a5078a <=( (not A299) and a5077a );
a5079a <=( a5078a and a5073a );
a5082a <=( A166 and A168 );
a5086a <=( (not A265) and A200 );
a5087a <=( A199 and a5086a );
a5088a <=( a5087a and a5082a );
a5091a <=( A298 and (not A266) );
a5095a <=( A302 and A300 );
a5096a <=( (not A299) and a5095a );
a5097a <=( a5096a and a5091a );
a5100a <=( A166 and A168 );
a5104a <=( A265 and A200 );
a5105a <=( (not A199) and a5104a );
a5106a <=( a5105a and a5100a );
a5109a <=( A267 and (not A266) );
a5113a <=( (not A300) and A298 );
a5114a <=( A268 and a5113a );
a5115a <=( a5114a and a5109a );
a5118a <=( A166 and A168 );
a5122a <=( A265 and A200 );
a5123a <=( (not A199) and a5122a );
a5124a <=( a5123a and a5118a );
a5127a <=( A267 and (not A266) );
a5131a <=( A299 and A298 );
a5132a <=( A268 and a5131a );
a5133a <=( a5132a and a5127a );
a5136a <=( A166 and A168 );
a5140a <=( A265 and A200 );
a5141a <=( (not A199) and a5140a );
a5142a <=( a5141a and a5136a );
a5145a <=( A267 and (not A266) );
a5149a <=( (not A299) and (not A298) );
a5150a <=( A268 and a5149a );
a5151a <=( a5150a and a5145a );
a5154a <=( A166 and A168 );
a5158a <=( A265 and A200 );
a5159a <=( (not A199) and a5158a );
a5160a <=( a5159a and a5154a );
a5163a <=( A267 and (not A266) );
a5167a <=( (not A300) and A298 );
a5168a <=( A269 and a5167a );
a5169a <=( a5168a and a5163a );
a5172a <=( A166 and A168 );
a5176a <=( A265 and A200 );
a5177a <=( (not A199) and a5176a );
a5178a <=( a5177a and a5172a );
a5181a <=( A267 and (not A266) );
a5185a <=( A299 and A298 );
a5186a <=( A269 and a5185a );
a5187a <=( a5186a and a5181a );
a5190a <=( A166 and A168 );
a5194a <=( A265 and A200 );
a5195a <=( (not A199) and a5194a );
a5196a <=( a5195a and a5190a );
a5199a <=( A267 and (not A266) );
a5203a <=( (not A299) and (not A298) );
a5204a <=( A269 and a5203a );
a5205a <=( a5204a and a5199a );
a5208a <=( A166 and A168 );
a5212a <=( (not A203) and (not A202) );
a5213a <=( (not A200) and a5212a );
a5214a <=( a5213a and a5208a );
a5217a <=( (not A268) and (not A266) );
a5221a <=( A299 and (not A298) );
a5222a <=( (not A269) and a5221a );
a5223a <=( a5222a and a5217a );
a5226a <=( A166 and A168 );
a5230a <=( A265 and (not A201) );
a5231a <=( (not A200) and a5230a );
a5232a <=( a5231a and a5226a );
a5235a <=( A298 and A266 );
a5239a <=( A301 and A300 );
a5240a <=( (not A299) and a5239a );
a5241a <=( a5240a and a5235a );
a5244a <=( A166 and A168 );
a5248a <=( A265 and (not A201) );
a5249a <=( (not A200) and a5248a );
a5250a <=( a5249a and a5244a );
a5253a <=( A298 and A266 );
a5257a <=( A302 and A300 );
a5258a <=( (not A299) and a5257a );
a5259a <=( a5258a and a5253a );
a5262a <=( A166 and A168 );
a5266a <=( (not A266) and (not A201) );
a5267a <=( (not A200) and a5266a );
a5268a <=( a5267a and a5262a );
a5271a <=( A298 and (not A267) );
a5275a <=( A301 and A300 );
a5276a <=( (not A299) and a5275a );
a5277a <=( a5276a and a5271a );
a5280a <=( A166 and A168 );
a5284a <=( (not A266) and (not A201) );
a5285a <=( (not A200) and a5284a );
a5286a <=( a5285a and a5280a );
a5289a <=( A298 and (not A267) );
a5293a <=( A302 and A300 );
a5294a <=( (not A299) and a5293a );
a5295a <=( a5294a and a5289a );
a5298a <=( A166 and A168 );
a5302a <=( (not A265) and (not A201) );
a5303a <=( (not A200) and a5302a );
a5304a <=( a5303a and a5298a );
a5307a <=( A298 and (not A266) );
a5311a <=( A301 and A300 );
a5312a <=( (not A299) and a5311a );
a5313a <=( a5312a and a5307a );
a5316a <=( A166 and A168 );
a5320a <=( (not A265) and (not A201) );
a5321a <=( (not A200) and a5320a );
a5322a <=( a5321a and a5316a );
a5325a <=( A298 and (not A266) );
a5329a <=( A302 and A300 );
a5330a <=( (not A299) and a5329a );
a5331a <=( a5330a and a5325a );
a5334a <=( A166 and A168 );
a5338a <=( A201 and (not A200) );
a5339a <=( A199 and a5338a );
a5340a <=( a5339a and a5334a );
a5343a <=( (not A265) and A202 );
a5347a <=( (not A300) and A298 );
a5348a <=( A266 and a5347a );
a5349a <=( a5348a and a5343a );
a5352a <=( A166 and A168 );
a5356a <=( A201 and (not A200) );
a5357a <=( A199 and a5356a );
a5358a <=( a5357a and a5352a );
a5361a <=( (not A265) and A202 );
a5365a <=( A299 and A298 );
a5366a <=( A266 and a5365a );
a5367a <=( a5366a and a5361a );
a5370a <=( A166 and A168 );
a5374a <=( A201 and (not A200) );
a5375a <=( A199 and a5374a );
a5376a <=( a5375a and a5370a );
a5379a <=( (not A265) and A202 );
a5383a <=( (not A299) and (not A298) );
a5384a <=( A266 and a5383a );
a5385a <=( a5384a and a5379a );
a5388a <=( A166 and A168 );
a5392a <=( A201 and (not A200) );
a5393a <=( A199 and a5392a );
a5394a <=( a5393a and a5388a );
a5397a <=( (not A265) and A203 );
a5401a <=( (not A300) and A298 );
a5402a <=( A266 and a5401a );
a5403a <=( a5402a and a5397a );
a5406a <=( A166 and A168 );
a5410a <=( A201 and (not A200) );
a5411a <=( A199 and a5410a );
a5412a <=( a5411a and a5406a );
a5415a <=( (not A265) and A203 );
a5419a <=( A299 and A298 );
a5420a <=( A266 and a5419a );
a5421a <=( a5420a and a5415a );
a5424a <=( A166 and A168 );
a5428a <=( A201 and (not A200) );
a5429a <=( A199 and a5428a );
a5430a <=( a5429a and a5424a );
a5433a <=( (not A265) and A203 );
a5437a <=( (not A299) and (not A298) );
a5438a <=( A266 and a5437a );
a5439a <=( a5438a and a5433a );
a5442a <=( A166 and A168 );
a5446a <=( A265 and (not A200) );
a5447a <=( (not A199) and a5446a );
a5448a <=( a5447a and a5442a );
a5451a <=( A298 and A266 );
a5455a <=( A301 and A300 );
a5456a <=( (not A299) and a5455a );
a5457a <=( a5456a and a5451a );
a5460a <=( A166 and A168 );
a5464a <=( A265 and (not A200) );
a5465a <=( (not A199) and a5464a );
a5466a <=( a5465a and a5460a );
a5469a <=( A298 and A266 );
a5473a <=( A302 and A300 );
a5474a <=( (not A299) and a5473a );
a5475a <=( a5474a and a5469a );
a5478a <=( A166 and A168 );
a5482a <=( (not A266) and (not A200) );
a5483a <=( (not A199) and a5482a );
a5484a <=( a5483a and a5478a );
a5487a <=( A298 and (not A267) );
a5491a <=( A301 and A300 );
a5492a <=( (not A299) and a5491a );
a5493a <=( a5492a and a5487a );
a5496a <=( A166 and A168 );
a5500a <=( (not A266) and (not A200) );
a5501a <=( (not A199) and a5500a );
a5502a <=( a5501a and a5496a );
a5505a <=( A298 and (not A267) );
a5509a <=( A302 and A300 );
a5510a <=( (not A299) and a5509a );
a5511a <=( a5510a and a5505a );
a5514a <=( A166 and A168 );
a5518a <=( (not A265) and (not A200) );
a5519a <=( (not A199) and a5518a );
a5520a <=( a5519a and a5514a );
a5523a <=( A298 and (not A266) );
a5527a <=( A301 and A300 );
a5528a <=( (not A299) and a5527a );
a5529a <=( a5528a and a5523a );
a5532a <=( A166 and A168 );
a5536a <=( (not A265) and (not A200) );
a5537a <=( (not A199) and a5536a );
a5538a <=( a5537a and a5532a );
a5541a <=( A298 and (not A266) );
a5545a <=( A302 and A300 );
a5546a <=( (not A299) and a5545a );
a5547a <=( a5546a and a5541a );
a5550a <=( A167 and A168 );
a5554a <=( A265 and A200 );
a5555a <=( A199 and a5554a );
a5556a <=( a5555a and a5550a );
a5559a <=( A298 and A266 );
a5563a <=( A301 and A300 );
a5564a <=( (not A299) and a5563a );
a5565a <=( a5564a and a5559a );
a5568a <=( A167 and A168 );
a5572a <=( A265 and A200 );
a5573a <=( A199 and a5572a );
a5574a <=( a5573a and a5568a );
a5577a <=( A298 and A266 );
a5581a <=( A302 and A300 );
a5582a <=( (not A299) and a5581a );
a5583a <=( a5582a and a5577a );
a5586a <=( A167 and A168 );
a5590a <=( (not A266) and A200 );
a5591a <=( A199 and a5590a );
a5592a <=( a5591a and a5586a );
a5595a <=( A298 and (not A267) );
a5599a <=( A301 and A300 );
a5600a <=( (not A299) and a5599a );
a5601a <=( a5600a and a5595a );
a5604a <=( A167 and A168 );
a5608a <=( (not A266) and A200 );
a5609a <=( A199 and a5608a );
a5610a <=( a5609a and a5604a );
a5613a <=( A298 and (not A267) );
a5617a <=( A302 and A300 );
a5618a <=( (not A299) and a5617a );
a5619a <=( a5618a and a5613a );
a5622a <=( A167 and A168 );
a5626a <=( (not A265) and A200 );
a5627a <=( A199 and a5626a );
a5628a <=( a5627a and a5622a );
a5631a <=( A298 and (not A266) );
a5635a <=( A301 and A300 );
a5636a <=( (not A299) and a5635a );
a5637a <=( a5636a and a5631a );
a5640a <=( A167 and A168 );
a5644a <=( (not A265) and A200 );
a5645a <=( A199 and a5644a );
a5646a <=( a5645a and a5640a );
a5649a <=( A298 and (not A266) );
a5653a <=( A302 and A300 );
a5654a <=( (not A299) and a5653a );
a5655a <=( a5654a and a5649a );
a5658a <=( A167 and A168 );
a5662a <=( A265 and A200 );
a5663a <=( (not A199) and a5662a );
a5664a <=( a5663a and a5658a );
a5667a <=( A267 and (not A266) );
a5671a <=( (not A300) and A298 );
a5672a <=( A268 and a5671a );
a5673a <=( a5672a and a5667a );
a5676a <=( A167 and A168 );
a5680a <=( A265 and A200 );
a5681a <=( (not A199) and a5680a );
a5682a <=( a5681a and a5676a );
a5685a <=( A267 and (not A266) );
a5689a <=( A299 and A298 );
a5690a <=( A268 and a5689a );
a5691a <=( a5690a and a5685a );
a5694a <=( A167 and A168 );
a5698a <=( A265 and A200 );
a5699a <=( (not A199) and a5698a );
a5700a <=( a5699a and a5694a );
a5703a <=( A267 and (not A266) );
a5707a <=( (not A299) and (not A298) );
a5708a <=( A268 and a5707a );
a5709a <=( a5708a and a5703a );
a5712a <=( A167 and A168 );
a5716a <=( A265 and A200 );
a5717a <=( (not A199) and a5716a );
a5718a <=( a5717a and a5712a );
a5721a <=( A267 and (not A266) );
a5725a <=( (not A300) and A298 );
a5726a <=( A269 and a5725a );
a5727a <=( a5726a and a5721a );
a5730a <=( A167 and A168 );
a5734a <=( A265 and A200 );
a5735a <=( (not A199) and a5734a );
a5736a <=( a5735a and a5730a );
a5739a <=( A267 and (not A266) );
a5743a <=( A299 and A298 );
a5744a <=( A269 and a5743a );
a5745a <=( a5744a and a5739a );
a5748a <=( A167 and A168 );
a5752a <=( A265 and A200 );
a5753a <=( (not A199) and a5752a );
a5754a <=( a5753a and a5748a );
a5757a <=( A267 and (not A266) );
a5761a <=( (not A299) and (not A298) );
a5762a <=( A269 and a5761a );
a5763a <=( a5762a and a5757a );
a5766a <=( A167 and A168 );
a5770a <=( (not A203) and (not A202) );
a5771a <=( (not A200) and a5770a );
a5772a <=( a5771a and a5766a );
a5775a <=( (not A268) and (not A266) );
a5779a <=( A299 and (not A298) );
a5780a <=( (not A269) and a5779a );
a5781a <=( a5780a and a5775a );
a5784a <=( A167 and A168 );
a5788a <=( A265 and (not A201) );
a5789a <=( (not A200) and a5788a );
a5790a <=( a5789a and a5784a );
a5793a <=( A298 and A266 );
a5797a <=( A301 and A300 );
a5798a <=( (not A299) and a5797a );
a5799a <=( a5798a and a5793a );
a5802a <=( A167 and A168 );
a5806a <=( A265 and (not A201) );
a5807a <=( (not A200) and a5806a );
a5808a <=( a5807a and a5802a );
a5811a <=( A298 and A266 );
a5815a <=( A302 and A300 );
a5816a <=( (not A299) and a5815a );
a5817a <=( a5816a and a5811a );
a5820a <=( A167 and A168 );
a5824a <=( (not A266) and (not A201) );
a5825a <=( (not A200) and a5824a );
a5826a <=( a5825a and a5820a );
a5829a <=( A298 and (not A267) );
a5833a <=( A301 and A300 );
a5834a <=( (not A299) and a5833a );
a5835a <=( a5834a and a5829a );
a5838a <=( A167 and A168 );
a5842a <=( (not A266) and (not A201) );
a5843a <=( (not A200) and a5842a );
a5844a <=( a5843a and a5838a );
a5847a <=( A298 and (not A267) );
a5851a <=( A302 and A300 );
a5852a <=( (not A299) and a5851a );
a5853a <=( a5852a and a5847a );
a5856a <=( A167 and A168 );
a5860a <=( (not A265) and (not A201) );
a5861a <=( (not A200) and a5860a );
a5862a <=( a5861a and a5856a );
a5865a <=( A298 and (not A266) );
a5869a <=( A301 and A300 );
a5870a <=( (not A299) and a5869a );
a5871a <=( a5870a and a5865a );
a5874a <=( A167 and A168 );
a5878a <=( (not A265) and (not A201) );
a5879a <=( (not A200) and a5878a );
a5880a <=( a5879a and a5874a );
a5883a <=( A298 and (not A266) );
a5887a <=( A302 and A300 );
a5888a <=( (not A299) and a5887a );
a5889a <=( a5888a and a5883a );
a5892a <=( A167 and A168 );
a5896a <=( A201 and (not A200) );
a5897a <=( A199 and a5896a );
a5898a <=( a5897a and a5892a );
a5901a <=( (not A265) and A202 );
a5905a <=( (not A300) and A298 );
a5906a <=( A266 and a5905a );
a5907a <=( a5906a and a5901a );
a5910a <=( A167 and A168 );
a5914a <=( A201 and (not A200) );
a5915a <=( A199 and a5914a );
a5916a <=( a5915a and a5910a );
a5919a <=( (not A265) and A202 );
a5923a <=( A299 and A298 );
a5924a <=( A266 and a5923a );
a5925a <=( a5924a and a5919a );
a5928a <=( A167 and A168 );
a5932a <=( A201 and (not A200) );
a5933a <=( A199 and a5932a );
a5934a <=( a5933a and a5928a );
a5937a <=( (not A265) and A202 );
a5941a <=( (not A299) and (not A298) );
a5942a <=( A266 and a5941a );
a5943a <=( a5942a and a5937a );
a5946a <=( A167 and A168 );
a5950a <=( A201 and (not A200) );
a5951a <=( A199 and a5950a );
a5952a <=( a5951a and a5946a );
a5955a <=( (not A265) and A203 );
a5959a <=( (not A300) and A298 );
a5960a <=( A266 and a5959a );
a5961a <=( a5960a and a5955a );
a5964a <=( A167 and A168 );
a5968a <=( A201 and (not A200) );
a5969a <=( A199 and a5968a );
a5970a <=( a5969a and a5964a );
a5973a <=( (not A265) and A203 );
a5977a <=( A299 and A298 );
a5978a <=( A266 and a5977a );
a5979a <=( a5978a and a5973a );
a5982a <=( A167 and A168 );
a5986a <=( A201 and (not A200) );
a5987a <=( A199 and a5986a );
a5988a <=( a5987a and a5982a );
a5991a <=( (not A265) and A203 );
a5995a <=( (not A299) and (not A298) );
a5996a <=( A266 and a5995a );
a5997a <=( a5996a and a5991a );
a6000a <=( A167 and A168 );
a6004a <=( A265 and (not A200) );
a6005a <=( (not A199) and a6004a );
a6006a <=( a6005a and a6000a );
a6009a <=( A298 and A266 );
a6013a <=( A301 and A300 );
a6014a <=( (not A299) and a6013a );
a6015a <=( a6014a and a6009a );
a6018a <=( A167 and A168 );
a6022a <=( A265 and (not A200) );
a6023a <=( (not A199) and a6022a );
a6024a <=( a6023a and a6018a );
a6027a <=( A298 and A266 );
a6031a <=( A302 and A300 );
a6032a <=( (not A299) and a6031a );
a6033a <=( a6032a and a6027a );
a6036a <=( A167 and A168 );
a6040a <=( (not A266) and (not A200) );
a6041a <=( (not A199) and a6040a );
a6042a <=( a6041a and a6036a );
a6045a <=( A298 and (not A267) );
a6049a <=( A301 and A300 );
a6050a <=( (not A299) and a6049a );
a6051a <=( a6050a and a6045a );
a6054a <=( A167 and A168 );
a6058a <=( (not A266) and (not A200) );
a6059a <=( (not A199) and a6058a );
a6060a <=( a6059a and a6054a );
a6063a <=( A298 and (not A267) );
a6067a <=( A302 and A300 );
a6068a <=( (not A299) and a6067a );
a6069a <=( a6068a and a6063a );
a6072a <=( A167 and A168 );
a6076a <=( (not A265) and (not A200) );
a6077a <=( (not A199) and a6076a );
a6078a <=( a6077a and a6072a );
a6081a <=( A298 and (not A266) );
a6085a <=( A301 and A300 );
a6086a <=( (not A299) and a6085a );
a6087a <=( a6086a and a6081a );
a6090a <=( A167 and A168 );
a6094a <=( (not A265) and (not A200) );
a6095a <=( (not A199) and a6094a );
a6096a <=( a6095a and a6090a );
a6099a <=( A298 and (not A266) );
a6103a <=( A302 and A300 );
a6104a <=( (not A299) and a6103a );
a6105a <=( a6104a and a6099a );
a6108a <=( (not A167) and A170 );
a6112a <=( A200 and A199 );
a6113a <=( (not A166) and a6112a );
a6114a <=( a6113a and a6108a );
a6117a <=( A266 and (not A265) );
a6121a <=( (not A302) and (not A301) );
a6122a <=( A298 and a6121a );
a6123a <=( a6122a and a6117a );
a6126a <=( (not A167) and A170 );
a6130a <=( A200 and (not A199) );
a6131a <=( (not A166) and a6130a );
a6132a <=( a6131a and a6126a );
a6135a <=( (not A268) and (not A266) );
a6139a <=( A299 and (not A298) );
a6140a <=( (not A269) and a6139a );
a6141a <=( a6140a and a6135a );
a6144a <=( (not A167) and A170 );
a6148a <=( (not A202) and (not A200) );
a6149a <=( (not A166) and a6148a );
a6150a <=( a6149a and a6144a );
a6153a <=( (not A265) and (not A203) );
a6157a <=( (not A300) and A298 );
a6158a <=( A266 and a6157a );
a6159a <=( a6158a and a6153a );
a6162a <=( (not A167) and A170 );
a6166a <=( (not A202) and (not A200) );
a6167a <=( (not A166) and a6166a );
a6168a <=( a6167a and a6162a );
a6171a <=( (not A265) and (not A203) );
a6175a <=( A299 and A298 );
a6176a <=( A266 and a6175a );
a6177a <=( a6176a and a6171a );
a6180a <=( (not A167) and A170 );
a6184a <=( (not A202) and (not A200) );
a6185a <=( (not A166) and a6184a );
a6186a <=( a6185a and a6180a );
a6189a <=( (not A265) and (not A203) );
a6193a <=( (not A299) and (not A298) );
a6194a <=( A266 and a6193a );
a6195a <=( a6194a and a6189a );
a6198a <=( (not A167) and A170 );
a6202a <=( (not A201) and (not A200) );
a6203a <=( (not A166) and a6202a );
a6204a <=( a6203a and a6198a );
a6207a <=( A266 and (not A265) );
a6211a <=( (not A302) and (not A301) );
a6212a <=( A298 and a6211a );
a6213a <=( a6212a and a6207a );
a6216a <=( (not A167) and A170 );
a6220a <=( (not A200) and (not A199) );
a6221a <=( (not A166) and a6220a );
a6222a <=( a6221a and a6216a );
a6225a <=( A266 and (not A265) );
a6229a <=( (not A302) and (not A301) );
a6230a <=( A298 and a6229a );
a6231a <=( a6230a and a6225a );
a6234a <=( (not A168) and A169 );
a6238a <=( A199 and (not A166) );
a6239a <=( A167 and a6238a );
a6240a <=( a6239a and a6234a );
a6243a <=( (not A265) and A200 );
a6247a <=( (not A300) and A298 );
a6248a <=( A266 and a6247a );
a6249a <=( a6248a and a6243a );
a6252a <=( (not A168) and A169 );
a6256a <=( A199 and (not A166) );
a6257a <=( A167 and a6256a );
a6258a <=( a6257a and a6252a );
a6261a <=( (not A265) and A200 );
a6265a <=( A299 and A298 );
a6266a <=( A266 and a6265a );
a6267a <=( a6266a and a6261a );
a6270a <=( (not A168) and A169 );
a6274a <=( A199 and (not A166) );
a6275a <=( A167 and a6274a );
a6276a <=( a6275a and a6270a );
a6279a <=( (not A265) and A200 );
a6283a <=( (not A299) and (not A298) );
a6284a <=( A266 and a6283a );
a6285a <=( a6284a and a6279a );
a6288a <=( (not A168) and A169 );
a6292a <=( (not A199) and (not A166) );
a6293a <=( A167 and a6292a );
a6294a <=( a6293a and a6288a );
a6297a <=( A265 and A200 );
a6301a <=( A299 and (not A298) );
a6302a <=( A266 and a6301a );
a6303a <=( a6302a and a6297a );
a6306a <=( (not A168) and A169 );
a6310a <=( (not A199) and (not A166) );
a6311a <=( A167 and a6310a );
a6312a <=( a6311a and a6306a );
a6315a <=( (not A266) and A200 );
a6319a <=( A299 and (not A298) );
a6320a <=( (not A267) and a6319a );
a6321a <=( a6320a and a6315a );
a6324a <=( (not A168) and A169 );
a6328a <=( (not A199) and (not A166) );
a6329a <=( A167 and a6328a );
a6330a <=( a6329a and a6324a );
a6333a <=( (not A265) and A200 );
a6337a <=( A299 and (not A298) );
a6338a <=( (not A266) and a6337a );
a6339a <=( a6338a and a6333a );
a6342a <=( (not A168) and A169 );
a6346a <=( (not A200) and (not A166) );
a6347a <=( A167 and a6346a );
a6348a <=( a6347a and a6342a );
a6351a <=( (not A265) and (not A201) );
a6355a <=( (not A300) and A298 );
a6356a <=( A266 and a6355a );
a6357a <=( a6356a and a6351a );
a6360a <=( (not A168) and A169 );
a6364a <=( (not A200) and (not A166) );
a6365a <=( A167 and a6364a );
a6366a <=( a6365a and a6360a );
a6369a <=( (not A265) and (not A201) );
a6373a <=( A299 and A298 );
a6374a <=( A266 and a6373a );
a6375a <=( a6374a and a6369a );
a6378a <=( (not A168) and A169 );
a6382a <=( (not A200) and (not A166) );
a6383a <=( A167 and a6382a );
a6384a <=( a6383a and a6378a );
a6387a <=( (not A265) and (not A201) );
a6391a <=( (not A299) and (not A298) );
a6392a <=( A266 and a6391a );
a6393a <=( a6392a and a6387a );
a6396a <=( (not A168) and A169 );
a6400a <=( (not A199) and (not A166) );
a6401a <=( A167 and a6400a );
a6402a <=( a6401a and a6396a );
a6405a <=( (not A265) and (not A200) );
a6409a <=( (not A300) and A298 );
a6410a <=( A266 and a6409a );
a6411a <=( a6410a and a6405a );
a6414a <=( (not A168) and A169 );
a6418a <=( (not A199) and (not A166) );
a6419a <=( A167 and a6418a );
a6420a <=( a6419a and a6414a );
a6423a <=( (not A265) and (not A200) );
a6427a <=( A299 and A298 );
a6428a <=( A266 and a6427a );
a6429a <=( a6428a and a6423a );
a6432a <=( (not A168) and A169 );
a6436a <=( (not A199) and (not A166) );
a6437a <=( A167 and a6436a );
a6438a <=( a6437a and a6432a );
a6441a <=( (not A265) and (not A200) );
a6445a <=( (not A299) and (not A298) );
a6446a <=( A266 and a6445a );
a6447a <=( a6446a and a6441a );
a6450a <=( (not A168) and A169 );
a6454a <=( A199 and A166 );
a6455a <=( (not A167) and a6454a );
a6456a <=( a6455a and a6450a );
a6459a <=( (not A265) and A200 );
a6463a <=( (not A300) and A298 );
a6464a <=( A266 and a6463a );
a6465a <=( a6464a and a6459a );
a6468a <=( (not A168) and A169 );
a6472a <=( A199 and A166 );
a6473a <=( (not A167) and a6472a );
a6474a <=( a6473a and a6468a );
a6477a <=( (not A265) and A200 );
a6481a <=( A299 and A298 );
a6482a <=( A266 and a6481a );
a6483a <=( a6482a and a6477a );
a6486a <=( (not A168) and A169 );
a6490a <=( A199 and A166 );
a6491a <=( (not A167) and a6490a );
a6492a <=( a6491a and a6486a );
a6495a <=( (not A265) and A200 );
a6499a <=( (not A299) and (not A298) );
a6500a <=( A266 and a6499a );
a6501a <=( a6500a and a6495a );
a6504a <=( (not A168) and A169 );
a6508a <=( (not A199) and A166 );
a6509a <=( (not A167) and a6508a );
a6510a <=( a6509a and a6504a );
a6513a <=( A265 and A200 );
a6517a <=( A299 and (not A298) );
a6518a <=( A266 and a6517a );
a6519a <=( a6518a and a6513a );
a6522a <=( (not A168) and A169 );
a6526a <=( (not A199) and A166 );
a6527a <=( (not A167) and a6526a );
a6528a <=( a6527a and a6522a );
a6531a <=( (not A266) and A200 );
a6535a <=( A299 and (not A298) );
a6536a <=( (not A267) and a6535a );
a6537a <=( a6536a and a6531a );
a6540a <=( (not A168) and A169 );
a6544a <=( (not A199) and A166 );
a6545a <=( (not A167) and a6544a );
a6546a <=( a6545a and a6540a );
a6549a <=( (not A265) and A200 );
a6553a <=( A299 and (not A298) );
a6554a <=( (not A266) and a6553a );
a6555a <=( a6554a and a6549a );
a6558a <=( (not A168) and A169 );
a6562a <=( (not A200) and A166 );
a6563a <=( (not A167) and a6562a );
a6564a <=( a6563a and a6558a );
a6567a <=( (not A265) and (not A201) );
a6571a <=( (not A300) and A298 );
a6572a <=( A266 and a6571a );
a6573a <=( a6572a and a6567a );
a6576a <=( (not A168) and A169 );
a6580a <=( (not A200) and A166 );
a6581a <=( (not A167) and a6580a );
a6582a <=( a6581a and a6576a );
a6585a <=( (not A265) and (not A201) );
a6589a <=( A299 and A298 );
a6590a <=( A266 and a6589a );
a6591a <=( a6590a and a6585a );
a6594a <=( (not A168) and A169 );
a6598a <=( (not A200) and A166 );
a6599a <=( (not A167) and a6598a );
a6600a <=( a6599a and a6594a );
a6603a <=( (not A265) and (not A201) );
a6607a <=( (not A299) and (not A298) );
a6608a <=( A266 and a6607a );
a6609a <=( a6608a and a6603a );
a6612a <=( (not A168) and A169 );
a6616a <=( (not A199) and A166 );
a6617a <=( (not A167) and a6616a );
a6618a <=( a6617a and a6612a );
a6621a <=( (not A265) and (not A200) );
a6625a <=( (not A300) and A298 );
a6626a <=( A266 and a6625a );
a6627a <=( a6626a and a6621a );
a6630a <=( (not A168) and A169 );
a6634a <=( (not A199) and A166 );
a6635a <=( (not A167) and a6634a );
a6636a <=( a6635a and a6630a );
a6639a <=( (not A265) and (not A200) );
a6643a <=( A299 and A298 );
a6644a <=( A266 and a6643a );
a6645a <=( a6644a and a6639a );
a6648a <=( (not A168) and A169 );
a6652a <=( (not A199) and A166 );
a6653a <=( (not A167) and a6652a );
a6654a <=( a6653a and a6648a );
a6657a <=( (not A265) and (not A200) );
a6661a <=( (not A299) and (not A298) );
a6662a <=( A266 and a6661a );
a6663a <=( a6662a and a6657a );
a6666a <=( A169 and A170 );
a6670a <=( A200 and A199 );
a6671a <=( (not A168) and a6670a );
a6672a <=( a6671a and a6666a );
a6675a <=( A266 and (not A265) );
a6679a <=( (not A302) and (not A301) );
a6680a <=( A298 and a6679a );
a6681a <=( a6680a and a6675a );
a6684a <=( A169 and A170 );
a6688a <=( A200 and (not A199) );
a6689a <=( (not A168) and a6688a );
a6690a <=( a6689a and a6684a );
a6693a <=( (not A268) and (not A266) );
a6697a <=( A299 and (not A298) );
a6698a <=( (not A269) and a6697a );
a6699a <=( a6698a and a6693a );
a6702a <=( A169 and A170 );
a6706a <=( (not A202) and (not A200) );
a6707a <=( (not A168) and a6706a );
a6708a <=( a6707a and a6702a );
a6711a <=( (not A265) and (not A203) );
a6715a <=( (not A300) and A298 );
a6716a <=( A266 and a6715a );
a6717a <=( a6716a and a6711a );
a6720a <=( A169 and A170 );
a6724a <=( (not A202) and (not A200) );
a6725a <=( (not A168) and a6724a );
a6726a <=( a6725a and a6720a );
a6729a <=( (not A265) and (not A203) );
a6733a <=( A299 and A298 );
a6734a <=( A266 and a6733a );
a6735a <=( a6734a and a6729a );
a6738a <=( A169 and A170 );
a6742a <=( (not A202) and (not A200) );
a6743a <=( (not A168) and a6742a );
a6744a <=( a6743a and a6738a );
a6747a <=( (not A265) and (not A203) );
a6751a <=( (not A299) and (not A298) );
a6752a <=( A266 and a6751a );
a6753a <=( a6752a and a6747a );
a6756a <=( A169 and A170 );
a6760a <=( (not A201) and (not A200) );
a6761a <=( (not A168) and a6760a );
a6762a <=( a6761a and a6756a );
a6765a <=( A266 and (not A265) );
a6769a <=( (not A302) and (not A301) );
a6770a <=( A298 and a6769a );
a6771a <=( a6770a and a6765a );
a6774a <=( A169 and A170 );
a6778a <=( (not A200) and (not A199) );
a6779a <=( (not A168) and a6778a );
a6780a <=( a6779a and a6774a );
a6783a <=( A266 and (not A265) );
a6787a <=( (not A302) and (not A301) );
a6788a <=( A298 and a6787a );
a6789a <=( a6788a and a6783a );
a6792a <=( A169 and (not A170) );
a6796a <=( A199 and A166 );
a6797a <=( A167 and a6796a );
a6798a <=( a6797a and a6792a );
a6801a <=( A265 and A200 );
a6805a <=( A299 and (not A298) );
a6806a <=( A266 and a6805a );
a6807a <=( a6806a and a6801a );
a6810a <=( A169 and (not A170) );
a6814a <=( A199 and A166 );
a6815a <=( A167 and a6814a );
a6816a <=( a6815a and a6810a );
a6819a <=( (not A266) and A200 );
a6823a <=( A299 and (not A298) );
a6824a <=( (not A267) and a6823a );
a6825a <=( a6824a and a6819a );
a6828a <=( A169 and (not A170) );
a6832a <=( A199 and A166 );
a6833a <=( A167 and a6832a );
a6834a <=( a6833a and a6828a );
a6837a <=( (not A265) and A200 );
a6841a <=( A299 and (not A298) );
a6842a <=( (not A266) and a6841a );
a6843a <=( a6842a and a6837a );
a6846a <=( A169 and (not A170) );
a6850a <=( (not A199) and A166 );
a6851a <=( A167 and a6850a );
a6852a <=( a6851a and a6846a );
a6855a <=( (not A265) and A200 );
a6859a <=( (not A300) and A298 );
a6860a <=( A266 and a6859a );
a6861a <=( a6860a and a6855a );
a6864a <=( A169 and (not A170) );
a6868a <=( (not A199) and A166 );
a6869a <=( A167 and a6868a );
a6870a <=( a6869a and a6864a );
a6873a <=( (not A265) and A200 );
a6877a <=( A299 and A298 );
a6878a <=( A266 and a6877a );
a6879a <=( a6878a and a6873a );
a6882a <=( A169 and (not A170) );
a6886a <=( (not A199) and A166 );
a6887a <=( A167 and a6886a );
a6888a <=( a6887a and a6882a );
a6891a <=( (not A265) and A200 );
a6895a <=( (not A299) and (not A298) );
a6896a <=( A266 and a6895a );
a6897a <=( a6896a and a6891a );
a6900a <=( A169 and (not A170) );
a6904a <=( (not A200) and A166 );
a6905a <=( A167 and a6904a );
a6906a <=( a6905a and a6900a );
a6909a <=( A265 and (not A201) );
a6913a <=( A299 and (not A298) );
a6914a <=( A266 and a6913a );
a6915a <=( a6914a and a6909a );
a6918a <=( A169 and (not A170) );
a6922a <=( (not A200) and A166 );
a6923a <=( A167 and a6922a );
a6924a <=( a6923a and a6918a );
a6927a <=( (not A266) and (not A201) );
a6931a <=( A299 and (not A298) );
a6932a <=( (not A267) and a6931a );
a6933a <=( a6932a and a6927a );
a6936a <=( A169 and (not A170) );
a6940a <=( (not A200) and A166 );
a6941a <=( A167 and a6940a );
a6942a <=( a6941a and a6936a );
a6945a <=( (not A265) and (not A201) );
a6949a <=( A299 and (not A298) );
a6950a <=( (not A266) and a6949a );
a6951a <=( a6950a and a6945a );
a6954a <=( A169 and (not A170) );
a6958a <=( (not A199) and A166 );
a6959a <=( A167 and a6958a );
a6960a <=( a6959a and a6954a );
a6963a <=( A265 and (not A200) );
a6967a <=( A299 and (not A298) );
a6968a <=( A266 and a6967a );
a6969a <=( a6968a and a6963a );
a6972a <=( A169 and (not A170) );
a6976a <=( (not A199) and A166 );
a6977a <=( A167 and a6976a );
a6978a <=( a6977a and a6972a );
a6981a <=( (not A266) and (not A200) );
a6985a <=( A299 and (not A298) );
a6986a <=( (not A267) and a6985a );
a6987a <=( a6986a and a6981a );
a6990a <=( A169 and (not A170) );
a6994a <=( (not A199) and A166 );
a6995a <=( A167 and a6994a );
a6996a <=( a6995a and a6990a );
a6999a <=( (not A265) and (not A200) );
a7003a <=( A299 and (not A298) );
a7004a <=( (not A266) and a7003a );
a7005a <=( a7004a and a6999a );
a7008a <=( A169 and (not A170) );
a7012a <=( A199 and (not A166) );
a7013a <=( (not A167) and a7012a );
a7014a <=( a7013a and a7008a );
a7017a <=( A265 and A200 );
a7021a <=( A299 and (not A298) );
a7022a <=( A266 and a7021a );
a7023a <=( a7022a and a7017a );
a7026a <=( A169 and (not A170) );
a7030a <=( A199 and (not A166) );
a7031a <=( (not A167) and a7030a );
a7032a <=( a7031a and a7026a );
a7035a <=( (not A266) and A200 );
a7039a <=( A299 and (not A298) );
a7040a <=( (not A267) and a7039a );
a7041a <=( a7040a and a7035a );
a7044a <=( A169 and (not A170) );
a7048a <=( A199 and (not A166) );
a7049a <=( (not A167) and a7048a );
a7050a <=( a7049a and a7044a );
a7053a <=( (not A265) and A200 );
a7057a <=( A299 and (not A298) );
a7058a <=( (not A266) and a7057a );
a7059a <=( a7058a and a7053a );
a7062a <=( A169 and (not A170) );
a7066a <=( (not A199) and (not A166) );
a7067a <=( (not A167) and a7066a );
a7068a <=( a7067a and a7062a );
a7071a <=( (not A265) and A200 );
a7075a <=( (not A300) and A298 );
a7076a <=( A266 and a7075a );
a7077a <=( a7076a and a7071a );
a7080a <=( A169 and (not A170) );
a7084a <=( (not A199) and (not A166) );
a7085a <=( (not A167) and a7084a );
a7086a <=( a7085a and a7080a );
a7089a <=( (not A265) and A200 );
a7093a <=( A299 and A298 );
a7094a <=( A266 and a7093a );
a7095a <=( a7094a and a7089a );
a7098a <=( A169 and (not A170) );
a7102a <=( (not A199) and (not A166) );
a7103a <=( (not A167) and a7102a );
a7104a <=( a7103a and a7098a );
a7107a <=( (not A265) and A200 );
a7111a <=( (not A299) and (not A298) );
a7112a <=( A266 and a7111a );
a7113a <=( a7112a and a7107a );
a7116a <=( A169 and (not A170) );
a7120a <=( (not A200) and (not A166) );
a7121a <=( (not A167) and a7120a );
a7122a <=( a7121a and a7116a );
a7125a <=( A265 and (not A201) );
a7129a <=( A299 and (not A298) );
a7130a <=( A266 and a7129a );
a7131a <=( a7130a and a7125a );
a7134a <=( A169 and (not A170) );
a7138a <=( (not A200) and (not A166) );
a7139a <=( (not A167) and a7138a );
a7140a <=( a7139a and a7134a );
a7143a <=( (not A266) and (not A201) );
a7147a <=( A299 and (not A298) );
a7148a <=( (not A267) and a7147a );
a7149a <=( a7148a and a7143a );
a7152a <=( A169 and (not A170) );
a7156a <=( (not A200) and (not A166) );
a7157a <=( (not A167) and a7156a );
a7158a <=( a7157a and a7152a );
a7161a <=( (not A265) and (not A201) );
a7165a <=( A299 and (not A298) );
a7166a <=( (not A266) and a7165a );
a7167a <=( a7166a and a7161a );
a7170a <=( A169 and (not A170) );
a7174a <=( (not A199) and (not A166) );
a7175a <=( (not A167) and a7174a );
a7176a <=( a7175a and a7170a );
a7179a <=( A265 and (not A200) );
a7183a <=( A299 and (not A298) );
a7184a <=( A266 and a7183a );
a7185a <=( a7184a and a7179a );
a7188a <=( A169 and (not A170) );
a7192a <=( (not A199) and (not A166) );
a7193a <=( (not A167) and a7192a );
a7194a <=( a7193a and a7188a );
a7197a <=( (not A266) and (not A200) );
a7201a <=( A299 and (not A298) );
a7202a <=( (not A267) and a7201a );
a7203a <=( a7202a and a7197a );
a7206a <=( A169 and (not A170) );
a7210a <=( (not A199) and (not A166) );
a7211a <=( (not A167) and a7210a );
a7212a <=( a7211a and a7206a );
a7215a <=( (not A265) and (not A200) );
a7219a <=( A299 and (not A298) );
a7220a <=( (not A266) and a7219a );
a7221a <=( a7220a and a7215a );
a7224a <=( (not A167) and (not A169) );
a7228a <=( A200 and A199 );
a7229a <=( (not A166) and a7228a );
a7230a <=( a7229a and a7224a );
a7233a <=( A266 and (not A265) );
a7237a <=( (not A302) and (not A301) );
a7238a <=( A298 and a7237a );
a7239a <=( a7238a and a7233a );
a7242a <=( (not A167) and (not A169) );
a7246a <=( A200 and (not A199) );
a7247a <=( (not A166) and a7246a );
a7248a <=( a7247a and a7242a );
a7251a <=( (not A268) and (not A266) );
a7255a <=( A299 and (not A298) );
a7256a <=( (not A269) and a7255a );
a7257a <=( a7256a and a7251a );
a7260a <=( (not A167) and (not A169) );
a7264a <=( (not A202) and (not A200) );
a7265a <=( (not A166) and a7264a );
a7266a <=( a7265a and a7260a );
a7269a <=( (not A265) and (not A203) );
a7273a <=( (not A300) and A298 );
a7274a <=( A266 and a7273a );
a7275a <=( a7274a and a7269a );
a7278a <=( (not A167) and (not A169) );
a7282a <=( (not A202) and (not A200) );
a7283a <=( (not A166) and a7282a );
a7284a <=( a7283a and a7278a );
a7287a <=( (not A265) and (not A203) );
a7291a <=( A299 and A298 );
a7292a <=( A266 and a7291a );
a7293a <=( a7292a and a7287a );
a7296a <=( (not A167) and (not A169) );
a7300a <=( (not A202) and (not A200) );
a7301a <=( (not A166) and a7300a );
a7302a <=( a7301a and a7296a );
a7305a <=( (not A265) and (not A203) );
a7309a <=( (not A299) and (not A298) );
a7310a <=( A266 and a7309a );
a7311a <=( a7310a and a7305a );
a7314a <=( (not A167) and (not A169) );
a7318a <=( (not A201) and (not A200) );
a7319a <=( (not A166) and a7318a );
a7320a <=( a7319a and a7314a );
a7323a <=( A266 and (not A265) );
a7327a <=( (not A302) and (not A301) );
a7328a <=( A298 and a7327a );
a7329a <=( a7328a and a7323a );
a7332a <=( (not A167) and (not A169) );
a7336a <=( (not A200) and (not A199) );
a7337a <=( (not A166) and a7336a );
a7338a <=( a7337a and a7332a );
a7341a <=( A266 and (not A265) );
a7345a <=( (not A302) and (not A301) );
a7346a <=( A298 and a7345a );
a7347a <=( a7346a and a7341a );
a7350a <=( (not A168) and (not A169) );
a7354a <=( A199 and A166 );
a7355a <=( A167 and a7354a );
a7356a <=( a7355a and a7350a );
a7359a <=( (not A265) and A200 );
a7363a <=( (not A300) and A298 );
a7364a <=( A266 and a7363a );
a7365a <=( a7364a and a7359a );
a7368a <=( (not A168) and (not A169) );
a7372a <=( A199 and A166 );
a7373a <=( A167 and a7372a );
a7374a <=( a7373a and a7368a );
a7377a <=( (not A265) and A200 );
a7381a <=( A299 and A298 );
a7382a <=( A266 and a7381a );
a7383a <=( a7382a and a7377a );
a7386a <=( (not A168) and (not A169) );
a7390a <=( A199 and A166 );
a7391a <=( A167 and a7390a );
a7392a <=( a7391a and a7386a );
a7395a <=( (not A265) and A200 );
a7399a <=( (not A299) and (not A298) );
a7400a <=( A266 and a7399a );
a7401a <=( a7400a and a7395a );
a7404a <=( (not A168) and (not A169) );
a7408a <=( (not A199) and A166 );
a7409a <=( A167 and a7408a );
a7410a <=( a7409a and a7404a );
a7413a <=( A265 and A200 );
a7417a <=( A299 and (not A298) );
a7418a <=( A266 and a7417a );
a7419a <=( a7418a and a7413a );
a7422a <=( (not A168) and (not A169) );
a7426a <=( (not A199) and A166 );
a7427a <=( A167 and a7426a );
a7428a <=( a7427a and a7422a );
a7431a <=( (not A266) and A200 );
a7435a <=( A299 and (not A298) );
a7436a <=( (not A267) and a7435a );
a7437a <=( a7436a and a7431a );
a7440a <=( (not A168) and (not A169) );
a7444a <=( (not A199) and A166 );
a7445a <=( A167 and a7444a );
a7446a <=( a7445a and a7440a );
a7449a <=( (not A265) and A200 );
a7453a <=( A299 and (not A298) );
a7454a <=( (not A266) and a7453a );
a7455a <=( a7454a and a7449a );
a7458a <=( (not A168) and (not A169) );
a7462a <=( (not A200) and A166 );
a7463a <=( A167 and a7462a );
a7464a <=( a7463a and a7458a );
a7467a <=( (not A265) and (not A201) );
a7471a <=( (not A300) and A298 );
a7472a <=( A266 and a7471a );
a7473a <=( a7472a and a7467a );
a7476a <=( (not A168) and (not A169) );
a7480a <=( (not A200) and A166 );
a7481a <=( A167 and a7480a );
a7482a <=( a7481a and a7476a );
a7485a <=( (not A265) and (not A201) );
a7489a <=( A299 and A298 );
a7490a <=( A266 and a7489a );
a7491a <=( a7490a and a7485a );
a7494a <=( (not A168) and (not A169) );
a7498a <=( (not A200) and A166 );
a7499a <=( A167 and a7498a );
a7500a <=( a7499a and a7494a );
a7503a <=( (not A265) and (not A201) );
a7507a <=( (not A299) and (not A298) );
a7508a <=( A266 and a7507a );
a7509a <=( a7508a and a7503a );
a7512a <=( (not A168) and (not A169) );
a7516a <=( (not A199) and A166 );
a7517a <=( A167 and a7516a );
a7518a <=( a7517a and a7512a );
a7521a <=( (not A265) and (not A200) );
a7525a <=( (not A300) and A298 );
a7526a <=( A266 and a7525a );
a7527a <=( a7526a and a7521a );
a7530a <=( (not A168) and (not A169) );
a7534a <=( (not A199) and A166 );
a7535a <=( A167 and a7534a );
a7536a <=( a7535a and a7530a );
a7539a <=( (not A265) and (not A200) );
a7543a <=( A299 and A298 );
a7544a <=( A266 and a7543a );
a7545a <=( a7544a and a7539a );
a7548a <=( (not A168) and (not A169) );
a7552a <=( (not A199) and A166 );
a7553a <=( A167 and a7552a );
a7554a <=( a7553a and a7548a );
a7557a <=( (not A265) and (not A200) );
a7561a <=( (not A299) and (not A298) );
a7562a <=( A266 and a7561a );
a7563a <=( a7562a and a7557a );
a7566a <=( (not A169) and A170 );
a7570a <=( A199 and (not A166) );
a7571a <=( A167 and a7570a );
a7572a <=( a7571a and a7566a );
a7575a <=( A265 and A200 );
a7579a <=( A299 and (not A298) );
a7580a <=( A266 and a7579a );
a7581a <=( a7580a and a7575a );
a7584a <=( (not A169) and A170 );
a7588a <=( A199 and (not A166) );
a7589a <=( A167 and a7588a );
a7590a <=( a7589a and a7584a );
a7593a <=( (not A266) and A200 );
a7597a <=( A299 and (not A298) );
a7598a <=( (not A267) and a7597a );
a7599a <=( a7598a and a7593a );
a7602a <=( (not A169) and A170 );
a7606a <=( A199 and (not A166) );
a7607a <=( A167 and a7606a );
a7608a <=( a7607a and a7602a );
a7611a <=( (not A265) and A200 );
a7615a <=( A299 and (not A298) );
a7616a <=( (not A266) and a7615a );
a7617a <=( a7616a and a7611a );
a7620a <=( (not A169) and A170 );
a7624a <=( (not A199) and (not A166) );
a7625a <=( A167 and a7624a );
a7626a <=( a7625a and a7620a );
a7629a <=( (not A265) and A200 );
a7633a <=( (not A300) and A298 );
a7634a <=( A266 and a7633a );
a7635a <=( a7634a and a7629a );
a7638a <=( (not A169) and A170 );
a7642a <=( (not A199) and (not A166) );
a7643a <=( A167 and a7642a );
a7644a <=( a7643a and a7638a );
a7647a <=( (not A265) and A200 );
a7651a <=( A299 and A298 );
a7652a <=( A266 and a7651a );
a7653a <=( a7652a and a7647a );
a7656a <=( (not A169) and A170 );
a7660a <=( (not A199) and (not A166) );
a7661a <=( A167 and a7660a );
a7662a <=( a7661a and a7656a );
a7665a <=( (not A265) and A200 );
a7669a <=( (not A299) and (not A298) );
a7670a <=( A266 and a7669a );
a7671a <=( a7670a and a7665a );
a7674a <=( (not A169) and A170 );
a7678a <=( (not A200) and (not A166) );
a7679a <=( A167 and a7678a );
a7680a <=( a7679a and a7674a );
a7683a <=( A265 and (not A201) );
a7687a <=( A299 and (not A298) );
a7688a <=( A266 and a7687a );
a7689a <=( a7688a and a7683a );
a7692a <=( (not A169) and A170 );
a7696a <=( (not A200) and (not A166) );
a7697a <=( A167 and a7696a );
a7698a <=( a7697a and a7692a );
a7701a <=( (not A266) and (not A201) );
a7705a <=( A299 and (not A298) );
a7706a <=( (not A267) and a7705a );
a7707a <=( a7706a and a7701a );
a7710a <=( (not A169) and A170 );
a7714a <=( (not A200) and (not A166) );
a7715a <=( A167 and a7714a );
a7716a <=( a7715a and a7710a );
a7719a <=( (not A265) and (not A201) );
a7723a <=( A299 and (not A298) );
a7724a <=( (not A266) and a7723a );
a7725a <=( a7724a and a7719a );
a7728a <=( (not A169) and A170 );
a7732a <=( (not A199) and (not A166) );
a7733a <=( A167 and a7732a );
a7734a <=( a7733a and a7728a );
a7737a <=( A265 and (not A200) );
a7741a <=( A299 and (not A298) );
a7742a <=( A266 and a7741a );
a7743a <=( a7742a and a7737a );
a7746a <=( (not A169) and A170 );
a7750a <=( (not A199) and (not A166) );
a7751a <=( A167 and a7750a );
a7752a <=( a7751a and a7746a );
a7755a <=( (not A266) and (not A200) );
a7759a <=( A299 and (not A298) );
a7760a <=( (not A267) and a7759a );
a7761a <=( a7760a and a7755a );
a7764a <=( (not A169) and A170 );
a7768a <=( (not A199) and (not A166) );
a7769a <=( A167 and a7768a );
a7770a <=( a7769a and a7764a );
a7773a <=( (not A265) and (not A200) );
a7777a <=( A299 and (not A298) );
a7778a <=( (not A266) and a7777a );
a7779a <=( a7778a and a7773a );
a7782a <=( (not A169) and A170 );
a7786a <=( A199 and A166 );
a7787a <=( (not A167) and a7786a );
a7788a <=( a7787a and a7782a );
a7791a <=( A265 and A200 );
a7795a <=( A299 and (not A298) );
a7796a <=( A266 and a7795a );
a7797a <=( a7796a and a7791a );
a7800a <=( (not A169) and A170 );
a7804a <=( A199 and A166 );
a7805a <=( (not A167) and a7804a );
a7806a <=( a7805a and a7800a );
a7809a <=( (not A266) and A200 );
a7813a <=( A299 and (not A298) );
a7814a <=( (not A267) and a7813a );
a7815a <=( a7814a and a7809a );
a7818a <=( (not A169) and A170 );
a7822a <=( A199 and A166 );
a7823a <=( (not A167) and a7822a );
a7824a <=( a7823a and a7818a );
a7827a <=( (not A265) and A200 );
a7831a <=( A299 and (not A298) );
a7832a <=( (not A266) and a7831a );
a7833a <=( a7832a and a7827a );
a7836a <=( (not A169) and A170 );
a7840a <=( (not A199) and A166 );
a7841a <=( (not A167) and a7840a );
a7842a <=( a7841a and a7836a );
a7845a <=( (not A265) and A200 );
a7849a <=( (not A300) and A298 );
a7850a <=( A266 and a7849a );
a7851a <=( a7850a and a7845a );
a7854a <=( (not A169) and A170 );
a7858a <=( (not A199) and A166 );
a7859a <=( (not A167) and a7858a );
a7860a <=( a7859a and a7854a );
a7863a <=( (not A265) and A200 );
a7867a <=( A299 and A298 );
a7868a <=( A266 and a7867a );
a7869a <=( a7868a and a7863a );
a7872a <=( (not A169) and A170 );
a7876a <=( (not A199) and A166 );
a7877a <=( (not A167) and a7876a );
a7878a <=( a7877a and a7872a );
a7881a <=( (not A265) and A200 );
a7885a <=( (not A299) and (not A298) );
a7886a <=( A266 and a7885a );
a7887a <=( a7886a and a7881a );
a7890a <=( (not A169) and A170 );
a7894a <=( (not A200) and A166 );
a7895a <=( (not A167) and a7894a );
a7896a <=( a7895a and a7890a );
a7899a <=( A265 and (not A201) );
a7903a <=( A299 and (not A298) );
a7904a <=( A266 and a7903a );
a7905a <=( a7904a and a7899a );
a7908a <=( (not A169) and A170 );
a7912a <=( (not A200) and A166 );
a7913a <=( (not A167) and a7912a );
a7914a <=( a7913a and a7908a );
a7917a <=( (not A266) and (not A201) );
a7921a <=( A299 and (not A298) );
a7922a <=( (not A267) and a7921a );
a7923a <=( a7922a and a7917a );
a7926a <=( (not A169) and A170 );
a7930a <=( (not A200) and A166 );
a7931a <=( (not A167) and a7930a );
a7932a <=( a7931a and a7926a );
a7935a <=( (not A265) and (not A201) );
a7939a <=( A299 and (not A298) );
a7940a <=( (not A266) and a7939a );
a7941a <=( a7940a and a7935a );
a7944a <=( (not A169) and A170 );
a7948a <=( (not A199) and A166 );
a7949a <=( (not A167) and a7948a );
a7950a <=( a7949a and a7944a );
a7953a <=( A265 and (not A200) );
a7957a <=( A299 and (not A298) );
a7958a <=( A266 and a7957a );
a7959a <=( a7958a and a7953a );
a7962a <=( (not A169) and A170 );
a7966a <=( (not A199) and A166 );
a7967a <=( (not A167) and a7966a );
a7968a <=( a7967a and a7962a );
a7971a <=( (not A266) and (not A200) );
a7975a <=( A299 and (not A298) );
a7976a <=( (not A267) and a7975a );
a7977a <=( a7976a and a7971a );
a7980a <=( (not A169) and A170 );
a7984a <=( (not A199) and A166 );
a7985a <=( (not A167) and a7984a );
a7986a <=( a7985a and a7980a );
a7989a <=( (not A265) and (not A200) );
a7993a <=( A299 and (not A298) );
a7994a <=( (not A266) and a7993a );
a7995a <=( a7994a and a7989a );
a7998a <=( (not A169) and (not A170) );
a8002a <=( A200 and A199 );
a8003a <=( (not A168) and a8002a );
a8004a <=( a8003a and a7998a );
a8007a <=( A266 and (not A265) );
a8011a <=( (not A302) and (not A301) );
a8012a <=( A298 and a8011a );
a8013a <=( a8012a and a8007a );
a8016a <=( (not A169) and (not A170) );
a8020a <=( A200 and (not A199) );
a8021a <=( (not A168) and a8020a );
a8022a <=( a8021a and a8016a );
a8025a <=( (not A268) and (not A266) );
a8029a <=( A299 and (not A298) );
a8030a <=( (not A269) and a8029a );
a8031a <=( a8030a and a8025a );
a8034a <=( (not A169) and (not A170) );
a8038a <=( (not A202) and (not A200) );
a8039a <=( (not A168) and a8038a );
a8040a <=( a8039a and a8034a );
a8043a <=( (not A265) and (not A203) );
a8047a <=( (not A300) and A298 );
a8048a <=( A266 and a8047a );
a8049a <=( a8048a and a8043a );
a8052a <=( (not A169) and (not A170) );
a8056a <=( (not A202) and (not A200) );
a8057a <=( (not A168) and a8056a );
a8058a <=( a8057a and a8052a );
a8061a <=( (not A265) and (not A203) );
a8065a <=( A299 and A298 );
a8066a <=( A266 and a8065a );
a8067a <=( a8066a and a8061a );
a8070a <=( (not A169) and (not A170) );
a8074a <=( (not A202) and (not A200) );
a8075a <=( (not A168) and a8074a );
a8076a <=( a8075a and a8070a );
a8079a <=( (not A265) and (not A203) );
a8083a <=( (not A299) and (not A298) );
a8084a <=( A266 and a8083a );
a8085a <=( a8084a and a8079a );
a8088a <=( (not A169) and (not A170) );
a8092a <=( (not A201) and (not A200) );
a8093a <=( (not A168) and a8092a );
a8094a <=( a8093a and a8088a );
a8097a <=( A266 and (not A265) );
a8101a <=( (not A302) and (not A301) );
a8102a <=( A298 and a8101a );
a8103a <=( a8102a and a8097a );
a8106a <=( (not A169) and (not A170) );
a8110a <=( (not A200) and (not A199) );
a8111a <=( (not A168) and a8110a );
a8112a <=( a8111a and a8106a );
a8115a <=( A266 and (not A265) );
a8119a <=( (not A302) and (not A301) );
a8120a <=( A298 and a8119a );
a8121a <=( a8120a and a8115a );
a8124a <=( A166 and A168 );
a8128a <=( (not A266) and A200 );
a8129a <=( A199 and a8128a );
a8130a <=( a8129a and a8124a );
a8134a <=( A298 and (not A269) );
a8135a <=( (not A268) and a8134a );
a8139a <=( A301 and A300 );
a8140a <=( (not A299) and a8139a );
a8141a <=( a8140a and a8135a );
a8144a <=( A166 and A168 );
a8148a <=( (not A266) and A200 );
a8149a <=( A199 and a8148a );
a8150a <=( a8149a and a8144a );
a8154a <=( A298 and (not A269) );
a8155a <=( (not A268) and a8154a );
a8159a <=( A302 and A300 );
a8160a <=( (not A299) and a8159a );
a8161a <=( a8160a and a8155a );
a8164a <=( A166 and A168 );
a8168a <=( A265 and A200 );
a8169a <=( (not A199) and a8168a );
a8170a <=( a8169a and a8164a );
a8174a <=( A268 and A267 );
a8175a <=( (not A266) and a8174a );
a8179a <=( (not A302) and (not A301) );
a8180a <=( A298 and a8179a );
a8181a <=( a8180a and a8175a );
a8184a <=( A166 and A168 );
a8188a <=( A265 and A200 );
a8189a <=( (not A199) and a8188a );
a8190a <=( a8189a and a8184a );
a8194a <=( A269 and A267 );
a8195a <=( (not A266) and a8194a );
a8199a <=( (not A302) and (not A301) );
a8200a <=( A298 and a8199a );
a8201a <=( a8200a and a8195a );
a8204a <=( A166 and A168 );
a8208a <=( (not A203) and (not A202) );
a8209a <=( (not A200) and a8208a );
a8210a <=( a8209a and a8204a );
a8214a <=( A298 and A266 );
a8215a <=( A265 and a8214a );
a8219a <=( A301 and A300 );
a8220a <=( (not A299) and a8219a );
a8221a <=( a8220a and a8215a );
a8224a <=( A166 and A168 );
a8228a <=( (not A203) and (not A202) );
a8229a <=( (not A200) and a8228a );
a8230a <=( a8229a and a8224a );
a8234a <=( A298 and A266 );
a8235a <=( A265 and a8234a );
a8239a <=( A302 and A300 );
a8240a <=( (not A299) and a8239a );
a8241a <=( a8240a and a8235a );
a8244a <=( A166 and A168 );
a8248a <=( (not A203) and (not A202) );
a8249a <=( (not A200) and a8248a );
a8250a <=( a8249a and a8244a );
a8254a <=( A298 and (not A267) );
a8255a <=( (not A266) and a8254a );
a8259a <=( A301 and A300 );
a8260a <=( (not A299) and a8259a );
a8261a <=( a8260a and a8255a );
a8264a <=( A166 and A168 );
a8268a <=( (not A203) and (not A202) );
a8269a <=( (not A200) and a8268a );
a8270a <=( a8269a and a8264a );
a8274a <=( A298 and (not A267) );
a8275a <=( (not A266) and a8274a );
a8279a <=( A302 and A300 );
a8280a <=( (not A299) and a8279a );
a8281a <=( a8280a and a8275a );
a8284a <=( A166 and A168 );
a8288a <=( (not A203) and (not A202) );
a8289a <=( (not A200) and a8288a );
a8290a <=( a8289a and a8284a );
a8294a <=( A298 and (not A266) );
a8295a <=( (not A265) and a8294a );
a8299a <=( A301 and A300 );
a8300a <=( (not A299) and a8299a );
a8301a <=( a8300a and a8295a );
a8304a <=( A166 and A168 );
a8308a <=( (not A203) and (not A202) );
a8309a <=( (not A200) and a8308a );
a8310a <=( a8309a and a8304a );
a8314a <=( A298 and (not A266) );
a8315a <=( (not A265) and a8314a );
a8319a <=( A302 and A300 );
a8320a <=( (not A299) and a8319a );
a8321a <=( a8320a and a8315a );
a8324a <=( A166 and A168 );
a8328a <=( (not A266) and (not A201) );
a8329a <=( (not A200) and a8328a );
a8330a <=( a8329a and a8324a );
a8334a <=( A298 and (not A269) );
a8335a <=( (not A268) and a8334a );
a8339a <=( A301 and A300 );
a8340a <=( (not A299) and a8339a );
a8341a <=( a8340a and a8335a );
a8344a <=( A166 and A168 );
a8348a <=( (not A266) and (not A201) );
a8349a <=( (not A200) and a8348a );
a8350a <=( a8349a and a8344a );
a8354a <=( A298 and (not A269) );
a8355a <=( (not A268) and a8354a );
a8359a <=( A302 and A300 );
a8360a <=( (not A299) and a8359a );
a8361a <=( a8360a and a8355a );
a8364a <=( A166 and A168 );
a8368a <=( A201 and (not A200) );
a8369a <=( A199 and a8368a );
a8370a <=( a8369a and a8364a );
a8374a <=( A266 and (not A265) );
a8375a <=( A202 and a8374a );
a8379a <=( (not A302) and (not A301) );
a8380a <=( A298 and a8379a );
a8381a <=( a8380a and a8375a );
a8384a <=( A166 and A168 );
a8388a <=( A201 and (not A200) );
a8389a <=( A199 and a8388a );
a8390a <=( a8389a and a8384a );
a8394a <=( A266 and (not A265) );
a8395a <=( A203 and a8394a );
a8399a <=( (not A302) and (not A301) );
a8400a <=( A298 and a8399a );
a8401a <=( a8400a and a8395a );
a8404a <=( A166 and A168 );
a8408a <=( (not A266) and (not A200) );
a8409a <=( (not A199) and a8408a );
a8410a <=( a8409a and a8404a );
a8414a <=( A298 and (not A269) );
a8415a <=( (not A268) and a8414a );
a8419a <=( A301 and A300 );
a8420a <=( (not A299) and a8419a );
a8421a <=( a8420a and a8415a );
a8424a <=( A166 and A168 );
a8428a <=( (not A266) and (not A200) );
a8429a <=( (not A199) and a8428a );
a8430a <=( a8429a and a8424a );
a8434a <=( A298 and (not A269) );
a8435a <=( (not A268) and a8434a );
a8439a <=( A302 and A300 );
a8440a <=( (not A299) and a8439a );
a8441a <=( a8440a and a8435a );
a8444a <=( A167 and A168 );
a8448a <=( (not A266) and A200 );
a8449a <=( A199 and a8448a );
a8450a <=( a8449a and a8444a );
a8454a <=( A298 and (not A269) );
a8455a <=( (not A268) and a8454a );
a8459a <=( A301 and A300 );
a8460a <=( (not A299) and a8459a );
a8461a <=( a8460a and a8455a );
a8464a <=( A167 and A168 );
a8468a <=( (not A266) and A200 );
a8469a <=( A199 and a8468a );
a8470a <=( a8469a and a8464a );
a8474a <=( A298 and (not A269) );
a8475a <=( (not A268) and a8474a );
a8479a <=( A302 and A300 );
a8480a <=( (not A299) and a8479a );
a8481a <=( a8480a and a8475a );
a8484a <=( A167 and A168 );
a8488a <=( A265 and A200 );
a8489a <=( (not A199) and a8488a );
a8490a <=( a8489a and a8484a );
a8494a <=( A268 and A267 );
a8495a <=( (not A266) and a8494a );
a8499a <=( (not A302) and (not A301) );
a8500a <=( A298 and a8499a );
a8501a <=( a8500a and a8495a );
a8504a <=( A167 and A168 );
a8508a <=( A265 and A200 );
a8509a <=( (not A199) and a8508a );
a8510a <=( a8509a and a8504a );
a8514a <=( A269 and A267 );
a8515a <=( (not A266) and a8514a );
a8519a <=( (not A302) and (not A301) );
a8520a <=( A298 and a8519a );
a8521a <=( a8520a and a8515a );
a8524a <=( A167 and A168 );
a8528a <=( (not A203) and (not A202) );
a8529a <=( (not A200) and a8528a );
a8530a <=( a8529a and a8524a );
a8534a <=( A298 and A266 );
a8535a <=( A265 and a8534a );
a8539a <=( A301 and A300 );
a8540a <=( (not A299) and a8539a );
a8541a <=( a8540a and a8535a );
a8544a <=( A167 and A168 );
a8548a <=( (not A203) and (not A202) );
a8549a <=( (not A200) and a8548a );
a8550a <=( a8549a and a8544a );
a8554a <=( A298 and A266 );
a8555a <=( A265 and a8554a );
a8559a <=( A302 and A300 );
a8560a <=( (not A299) and a8559a );
a8561a <=( a8560a and a8555a );
a8564a <=( A167 and A168 );
a8568a <=( (not A203) and (not A202) );
a8569a <=( (not A200) and a8568a );
a8570a <=( a8569a and a8564a );
a8574a <=( A298 and (not A267) );
a8575a <=( (not A266) and a8574a );
a8579a <=( A301 and A300 );
a8580a <=( (not A299) and a8579a );
a8581a <=( a8580a and a8575a );
a8584a <=( A167 and A168 );
a8588a <=( (not A203) and (not A202) );
a8589a <=( (not A200) and a8588a );
a8590a <=( a8589a and a8584a );
a8594a <=( A298 and (not A267) );
a8595a <=( (not A266) and a8594a );
a8599a <=( A302 and A300 );
a8600a <=( (not A299) and a8599a );
a8601a <=( a8600a and a8595a );
a8604a <=( A167 and A168 );
a8608a <=( (not A203) and (not A202) );
a8609a <=( (not A200) and a8608a );
a8610a <=( a8609a and a8604a );
a8614a <=( A298 and (not A266) );
a8615a <=( (not A265) and a8614a );
a8619a <=( A301 and A300 );
a8620a <=( (not A299) and a8619a );
a8621a <=( a8620a and a8615a );
a8624a <=( A167 and A168 );
a8628a <=( (not A203) and (not A202) );
a8629a <=( (not A200) and a8628a );
a8630a <=( a8629a and a8624a );
a8634a <=( A298 and (not A266) );
a8635a <=( (not A265) and a8634a );
a8639a <=( A302 and A300 );
a8640a <=( (not A299) and a8639a );
a8641a <=( a8640a and a8635a );
a8644a <=( A167 and A168 );
a8648a <=( (not A266) and (not A201) );
a8649a <=( (not A200) and a8648a );
a8650a <=( a8649a and a8644a );
a8654a <=( A298 and (not A269) );
a8655a <=( (not A268) and a8654a );
a8659a <=( A301 and A300 );
a8660a <=( (not A299) and a8659a );
a8661a <=( a8660a and a8655a );
a8664a <=( A167 and A168 );
a8668a <=( (not A266) and (not A201) );
a8669a <=( (not A200) and a8668a );
a8670a <=( a8669a and a8664a );
a8674a <=( A298 and (not A269) );
a8675a <=( (not A268) and a8674a );
a8679a <=( A302 and A300 );
a8680a <=( (not A299) and a8679a );
a8681a <=( a8680a and a8675a );
a8684a <=( A167 and A168 );
a8688a <=( A201 and (not A200) );
a8689a <=( A199 and a8688a );
a8690a <=( a8689a and a8684a );
a8694a <=( A266 and (not A265) );
a8695a <=( A202 and a8694a );
a8699a <=( (not A302) and (not A301) );
a8700a <=( A298 and a8699a );
a8701a <=( a8700a and a8695a );
a8704a <=( A167 and A168 );
a8708a <=( A201 and (not A200) );
a8709a <=( A199 and a8708a );
a8710a <=( a8709a and a8704a );
a8714a <=( A266 and (not A265) );
a8715a <=( A203 and a8714a );
a8719a <=( (not A302) and (not A301) );
a8720a <=( A298 and a8719a );
a8721a <=( a8720a and a8715a );
a8724a <=( A167 and A168 );
a8728a <=( (not A266) and (not A200) );
a8729a <=( (not A199) and a8728a );
a8730a <=( a8729a and a8724a );
a8734a <=( A298 and (not A269) );
a8735a <=( (not A268) and a8734a );
a8739a <=( A301 and A300 );
a8740a <=( (not A299) and a8739a );
a8741a <=( a8740a and a8735a );
a8744a <=( A167 and A168 );
a8748a <=( (not A266) and (not A200) );
a8749a <=( (not A199) and a8748a );
a8750a <=( a8749a and a8744a );
a8754a <=( A298 and (not A269) );
a8755a <=( (not A268) and a8754a );
a8759a <=( A302 and A300 );
a8760a <=( (not A299) and a8759a );
a8761a <=( a8760a and a8755a );
a8764a <=( (not A167) and A170 );
a8768a <=( A200 and A199 );
a8769a <=( (not A166) and a8768a );
a8770a <=( a8769a and a8764a );
a8774a <=( A267 and (not A266) );
a8775a <=( A265 and a8774a );
a8779a <=( (not A300) and A298 );
a8780a <=( A268 and a8779a );
a8781a <=( a8780a and a8775a );
a8784a <=( (not A167) and A170 );
a8788a <=( A200 and A199 );
a8789a <=( (not A166) and a8788a );
a8790a <=( a8789a and a8784a );
a8794a <=( A267 and (not A266) );
a8795a <=( A265 and a8794a );
a8799a <=( A299 and A298 );
a8800a <=( A268 and a8799a );
a8801a <=( a8800a and a8795a );
a8804a <=( (not A167) and A170 );
a8808a <=( A200 and A199 );
a8809a <=( (not A166) and a8808a );
a8810a <=( a8809a and a8804a );
a8814a <=( A267 and (not A266) );
a8815a <=( A265 and a8814a );
a8819a <=( (not A299) and (not A298) );
a8820a <=( A268 and a8819a );
a8821a <=( a8820a and a8815a );
a8824a <=( (not A167) and A170 );
a8828a <=( A200 and A199 );
a8829a <=( (not A166) and a8828a );
a8830a <=( a8829a and a8824a );
a8834a <=( A267 and (not A266) );
a8835a <=( A265 and a8834a );
a8839a <=( (not A300) and A298 );
a8840a <=( A269 and a8839a );
a8841a <=( a8840a and a8835a );
a8844a <=( (not A167) and A170 );
a8848a <=( A200 and A199 );
a8849a <=( (not A166) and a8848a );
a8850a <=( a8849a and a8844a );
a8854a <=( A267 and (not A266) );
a8855a <=( A265 and a8854a );
a8859a <=( A299 and A298 );
a8860a <=( A269 and a8859a );
a8861a <=( a8860a and a8855a );
a8864a <=( (not A167) and A170 );
a8868a <=( A200 and A199 );
a8869a <=( (not A166) and a8868a );
a8870a <=( a8869a and a8864a );
a8874a <=( A267 and (not A266) );
a8875a <=( A265 and a8874a );
a8879a <=( (not A299) and (not A298) );
a8880a <=( A269 and a8879a );
a8881a <=( a8880a and a8875a );
a8884a <=( (not A167) and A170 );
a8888a <=( A200 and (not A199) );
a8889a <=( (not A166) and a8888a );
a8890a <=( a8889a and a8884a );
a8894a <=( A298 and A266 );
a8895a <=( A265 and a8894a );
a8899a <=( A301 and A300 );
a8900a <=( (not A299) and a8899a );
a8901a <=( a8900a and a8895a );
a8904a <=( (not A167) and A170 );
a8908a <=( A200 and (not A199) );
a8909a <=( (not A166) and a8908a );
a8910a <=( a8909a and a8904a );
a8914a <=( A298 and A266 );
a8915a <=( A265 and a8914a );
a8919a <=( A302 and A300 );
a8920a <=( (not A299) and a8919a );
a8921a <=( a8920a and a8915a );
a8924a <=( (not A167) and A170 );
a8928a <=( A200 and (not A199) );
a8929a <=( (not A166) and a8928a );
a8930a <=( a8929a and a8924a );
a8934a <=( A298 and (not A267) );
a8935a <=( (not A266) and a8934a );
a8939a <=( A301 and A300 );
a8940a <=( (not A299) and a8939a );
a8941a <=( a8940a and a8935a );
a8944a <=( (not A167) and A170 );
a8948a <=( A200 and (not A199) );
a8949a <=( (not A166) and a8948a );
a8950a <=( a8949a and a8944a );
a8954a <=( A298 and (not A267) );
a8955a <=( (not A266) and a8954a );
a8959a <=( A302 and A300 );
a8960a <=( (not A299) and a8959a );
a8961a <=( a8960a and a8955a );
a8964a <=( (not A167) and A170 );
a8968a <=( A200 and (not A199) );
a8969a <=( (not A166) and a8968a );
a8970a <=( a8969a and a8964a );
a8974a <=( A298 and (not A266) );
a8975a <=( (not A265) and a8974a );
a8979a <=( A301 and A300 );
a8980a <=( (not A299) and a8979a );
a8981a <=( a8980a and a8975a );
a8984a <=( (not A167) and A170 );
a8988a <=( A200 and (not A199) );
a8989a <=( (not A166) and a8988a );
a8990a <=( a8989a and a8984a );
a8994a <=( A298 and (not A266) );
a8995a <=( (not A265) and a8994a );
a8999a <=( A302 and A300 );
a9000a <=( (not A299) and a8999a );
a9001a <=( a9000a and a8995a );
a9004a <=( (not A167) and A170 );
a9008a <=( (not A202) and (not A200) );
a9009a <=( (not A166) and a9008a );
a9010a <=( a9009a and a9004a );
a9014a <=( A266 and (not A265) );
a9015a <=( (not A203) and a9014a );
a9019a <=( (not A302) and (not A301) );
a9020a <=( A298 and a9019a );
a9021a <=( a9020a and a9015a );
a9024a <=( (not A167) and A170 );
a9028a <=( (not A201) and (not A200) );
a9029a <=( (not A166) and a9028a );
a9030a <=( a9029a and a9024a );
a9034a <=( A267 and (not A266) );
a9035a <=( A265 and a9034a );
a9039a <=( (not A300) and A298 );
a9040a <=( A268 and a9039a );
a9041a <=( a9040a and a9035a );
a9044a <=( (not A167) and A170 );
a9048a <=( (not A201) and (not A200) );
a9049a <=( (not A166) and a9048a );
a9050a <=( a9049a and a9044a );
a9054a <=( A267 and (not A266) );
a9055a <=( A265 and a9054a );
a9059a <=( A299 and A298 );
a9060a <=( A268 and a9059a );
a9061a <=( a9060a and a9055a );
a9064a <=( (not A167) and A170 );
a9068a <=( (not A201) and (not A200) );
a9069a <=( (not A166) and a9068a );
a9070a <=( a9069a and a9064a );
a9074a <=( A267 and (not A266) );
a9075a <=( A265 and a9074a );
a9079a <=( (not A299) and (not A298) );
a9080a <=( A268 and a9079a );
a9081a <=( a9080a and a9075a );
a9084a <=( (not A167) and A170 );
a9088a <=( (not A201) and (not A200) );
a9089a <=( (not A166) and a9088a );
a9090a <=( a9089a and a9084a );
a9094a <=( A267 and (not A266) );
a9095a <=( A265 and a9094a );
a9099a <=( (not A300) and A298 );
a9100a <=( A269 and a9099a );
a9101a <=( a9100a and a9095a );
a9104a <=( (not A167) and A170 );
a9108a <=( (not A201) and (not A200) );
a9109a <=( (not A166) and a9108a );
a9110a <=( a9109a and a9104a );
a9114a <=( A267 and (not A266) );
a9115a <=( A265 and a9114a );
a9119a <=( A299 and A298 );
a9120a <=( A269 and a9119a );
a9121a <=( a9120a and a9115a );
a9124a <=( (not A167) and A170 );
a9128a <=( (not A201) and (not A200) );
a9129a <=( (not A166) and a9128a );
a9130a <=( a9129a and a9124a );
a9134a <=( A267 and (not A266) );
a9135a <=( A265 and a9134a );
a9139a <=( (not A299) and (not A298) );
a9140a <=( A269 and a9139a );
a9141a <=( a9140a and a9135a );
a9144a <=( (not A167) and A170 );
a9148a <=( (not A200) and A199 );
a9149a <=( (not A166) and a9148a );
a9150a <=( a9149a and a9144a );
a9154a <=( A265 and A202 );
a9155a <=( A201 and a9154a );
a9159a <=( A299 and (not A298) );
a9160a <=( A266 and a9159a );
a9161a <=( a9160a and a9155a );
a9164a <=( (not A167) and A170 );
a9168a <=( (not A200) and A199 );
a9169a <=( (not A166) and a9168a );
a9170a <=( a9169a and a9164a );
a9174a <=( (not A266) and A202 );
a9175a <=( A201 and a9174a );
a9179a <=( A299 and (not A298) );
a9180a <=( (not A267) and a9179a );
a9181a <=( a9180a and a9175a );
a9184a <=( (not A167) and A170 );
a9188a <=( (not A200) and A199 );
a9189a <=( (not A166) and a9188a );
a9190a <=( a9189a and a9184a );
a9194a <=( (not A265) and A202 );
a9195a <=( A201 and a9194a );
a9199a <=( A299 and (not A298) );
a9200a <=( (not A266) and a9199a );
a9201a <=( a9200a and a9195a );
a9204a <=( (not A167) and A170 );
a9208a <=( (not A200) and A199 );
a9209a <=( (not A166) and a9208a );
a9210a <=( a9209a and a9204a );
a9214a <=( A265 and A203 );
a9215a <=( A201 and a9214a );
a9219a <=( A299 and (not A298) );
a9220a <=( A266 and a9219a );
a9221a <=( a9220a and a9215a );
a9224a <=( (not A167) and A170 );
a9228a <=( (not A200) and A199 );
a9229a <=( (not A166) and a9228a );
a9230a <=( a9229a and a9224a );
a9234a <=( (not A266) and A203 );
a9235a <=( A201 and a9234a );
a9239a <=( A299 and (not A298) );
a9240a <=( (not A267) and a9239a );
a9241a <=( a9240a and a9235a );
a9244a <=( (not A167) and A170 );
a9248a <=( (not A200) and A199 );
a9249a <=( (not A166) and a9248a );
a9250a <=( a9249a and a9244a );
a9254a <=( (not A265) and A203 );
a9255a <=( A201 and a9254a );
a9259a <=( A299 and (not A298) );
a9260a <=( (not A266) and a9259a );
a9261a <=( a9260a and a9255a );
a9264a <=( (not A167) and A170 );
a9268a <=( (not A200) and (not A199) );
a9269a <=( (not A166) and a9268a );
a9270a <=( a9269a and a9264a );
a9274a <=( A267 and (not A266) );
a9275a <=( A265 and a9274a );
a9279a <=( (not A300) and A298 );
a9280a <=( A268 and a9279a );
a9281a <=( a9280a and a9275a );
a9284a <=( (not A167) and A170 );
a9288a <=( (not A200) and (not A199) );
a9289a <=( (not A166) and a9288a );
a9290a <=( a9289a and a9284a );
a9294a <=( A267 and (not A266) );
a9295a <=( A265 and a9294a );
a9299a <=( A299 and A298 );
a9300a <=( A268 and a9299a );
a9301a <=( a9300a and a9295a );
a9304a <=( (not A167) and A170 );
a9308a <=( (not A200) and (not A199) );
a9309a <=( (not A166) and a9308a );
a9310a <=( a9309a and a9304a );
a9314a <=( A267 and (not A266) );
a9315a <=( A265 and a9314a );
a9319a <=( (not A299) and (not A298) );
a9320a <=( A268 and a9319a );
a9321a <=( a9320a and a9315a );
a9324a <=( (not A167) and A170 );
a9328a <=( (not A200) and (not A199) );
a9329a <=( (not A166) and a9328a );
a9330a <=( a9329a and a9324a );
a9334a <=( A267 and (not A266) );
a9335a <=( A265 and a9334a );
a9339a <=( (not A300) and A298 );
a9340a <=( A269 and a9339a );
a9341a <=( a9340a and a9335a );
a9344a <=( (not A167) and A170 );
a9348a <=( (not A200) and (not A199) );
a9349a <=( (not A166) and a9348a );
a9350a <=( a9349a and a9344a );
a9354a <=( A267 and (not A266) );
a9355a <=( A265 and a9354a );
a9359a <=( A299 and A298 );
a9360a <=( A269 and a9359a );
a9361a <=( a9360a and a9355a );
a9364a <=( (not A167) and A170 );
a9368a <=( (not A200) and (not A199) );
a9369a <=( (not A166) and a9368a );
a9370a <=( a9369a and a9364a );
a9374a <=( A267 and (not A266) );
a9375a <=( A265 and a9374a );
a9379a <=( (not A299) and (not A298) );
a9380a <=( A269 and a9379a );
a9381a <=( a9380a and a9375a );
a9384a <=( (not A168) and A169 );
a9388a <=( A199 and (not A166) );
a9389a <=( A167 and a9388a );
a9390a <=( a9389a and a9384a );
a9394a <=( A266 and (not A265) );
a9395a <=( A200 and a9394a );
a9399a <=( (not A302) and (not A301) );
a9400a <=( A298 and a9399a );
a9401a <=( a9400a and a9395a );
a9404a <=( (not A168) and A169 );
a9408a <=( (not A199) and (not A166) );
a9409a <=( A167 and a9408a );
a9410a <=( a9409a and a9404a );
a9414a <=( (not A268) and (not A266) );
a9415a <=( A200 and a9414a );
a9419a <=( A299 and (not A298) );
a9420a <=( (not A269) and a9419a );
a9421a <=( a9420a and a9415a );
a9424a <=( (not A168) and A169 );
a9428a <=( (not A200) and (not A166) );
a9429a <=( A167 and a9428a );
a9430a <=( a9429a and a9424a );
a9434a <=( (not A265) and (not A203) );
a9435a <=( (not A202) and a9434a );
a9439a <=( (not A300) and A298 );
a9440a <=( A266 and a9439a );
a9441a <=( a9440a and a9435a );
a9444a <=( (not A168) and A169 );
a9448a <=( (not A200) and (not A166) );
a9449a <=( A167 and a9448a );
a9450a <=( a9449a and a9444a );
a9454a <=( (not A265) and (not A203) );
a9455a <=( (not A202) and a9454a );
a9459a <=( A299 and A298 );
a9460a <=( A266 and a9459a );
a9461a <=( a9460a and a9455a );
a9464a <=( (not A168) and A169 );
a9468a <=( (not A200) and (not A166) );
a9469a <=( A167 and a9468a );
a9470a <=( a9469a and a9464a );
a9474a <=( (not A265) and (not A203) );
a9475a <=( (not A202) and a9474a );
a9479a <=( (not A299) and (not A298) );
a9480a <=( A266 and a9479a );
a9481a <=( a9480a and a9475a );
a9484a <=( (not A168) and A169 );
a9488a <=( (not A200) and (not A166) );
a9489a <=( A167 and a9488a );
a9490a <=( a9489a and a9484a );
a9494a <=( A266 and (not A265) );
a9495a <=( (not A201) and a9494a );
a9499a <=( (not A302) and (not A301) );
a9500a <=( A298 and a9499a );
a9501a <=( a9500a and a9495a );
a9504a <=( (not A168) and A169 );
a9508a <=( (not A199) and (not A166) );
a9509a <=( A167 and a9508a );
a9510a <=( a9509a and a9504a );
a9514a <=( A266 and (not A265) );
a9515a <=( (not A200) and a9514a );
a9519a <=( (not A302) and (not A301) );
a9520a <=( A298 and a9519a );
a9521a <=( a9520a and a9515a );
a9524a <=( (not A168) and A169 );
a9528a <=( A199 and A166 );
a9529a <=( (not A167) and a9528a );
a9530a <=( a9529a and a9524a );
a9534a <=( A266 and (not A265) );
a9535a <=( A200 and a9534a );
a9539a <=( (not A302) and (not A301) );
a9540a <=( A298 and a9539a );
a9541a <=( a9540a and a9535a );
a9544a <=( (not A168) and A169 );
a9548a <=( (not A199) and A166 );
a9549a <=( (not A167) and a9548a );
a9550a <=( a9549a and a9544a );
a9554a <=( (not A268) and (not A266) );
a9555a <=( A200 and a9554a );
a9559a <=( A299 and (not A298) );
a9560a <=( (not A269) and a9559a );
a9561a <=( a9560a and a9555a );
a9564a <=( (not A168) and A169 );
a9568a <=( (not A200) and A166 );
a9569a <=( (not A167) and a9568a );
a9570a <=( a9569a and a9564a );
a9574a <=( (not A265) and (not A203) );
a9575a <=( (not A202) and a9574a );
a9579a <=( (not A300) and A298 );
a9580a <=( A266 and a9579a );
a9581a <=( a9580a and a9575a );
a9584a <=( (not A168) and A169 );
a9588a <=( (not A200) and A166 );
a9589a <=( (not A167) and a9588a );
a9590a <=( a9589a and a9584a );
a9594a <=( (not A265) and (not A203) );
a9595a <=( (not A202) and a9594a );
a9599a <=( A299 and A298 );
a9600a <=( A266 and a9599a );
a9601a <=( a9600a and a9595a );
a9604a <=( (not A168) and A169 );
a9608a <=( (not A200) and A166 );
a9609a <=( (not A167) and a9608a );
a9610a <=( a9609a and a9604a );
a9614a <=( (not A265) and (not A203) );
a9615a <=( (not A202) and a9614a );
a9619a <=( (not A299) and (not A298) );
a9620a <=( A266 and a9619a );
a9621a <=( a9620a and a9615a );
a9624a <=( (not A168) and A169 );
a9628a <=( (not A200) and A166 );
a9629a <=( (not A167) and a9628a );
a9630a <=( a9629a and a9624a );
a9634a <=( A266 and (not A265) );
a9635a <=( (not A201) and a9634a );
a9639a <=( (not A302) and (not A301) );
a9640a <=( A298 and a9639a );
a9641a <=( a9640a and a9635a );
a9644a <=( (not A168) and A169 );
a9648a <=( (not A199) and A166 );
a9649a <=( (not A167) and a9648a );
a9650a <=( a9649a and a9644a );
a9654a <=( A266 and (not A265) );
a9655a <=( (not A200) and a9654a );
a9659a <=( (not A302) and (not A301) );
a9660a <=( A298 and a9659a );
a9661a <=( a9660a and a9655a );
a9664a <=( A169 and A170 );
a9668a <=( A200 and A199 );
a9669a <=( (not A168) and a9668a );
a9670a <=( a9669a and a9664a );
a9674a <=( A267 and (not A266) );
a9675a <=( A265 and a9674a );
a9679a <=( (not A300) and A298 );
a9680a <=( A268 and a9679a );
a9681a <=( a9680a and a9675a );
a9684a <=( A169 and A170 );
a9688a <=( A200 and A199 );
a9689a <=( (not A168) and a9688a );
a9690a <=( a9689a and a9684a );
a9694a <=( A267 and (not A266) );
a9695a <=( A265 and a9694a );
a9699a <=( A299 and A298 );
a9700a <=( A268 and a9699a );
a9701a <=( a9700a and a9695a );
a9704a <=( A169 and A170 );
a9708a <=( A200 and A199 );
a9709a <=( (not A168) and a9708a );
a9710a <=( a9709a and a9704a );
a9714a <=( A267 and (not A266) );
a9715a <=( A265 and a9714a );
a9719a <=( (not A299) and (not A298) );
a9720a <=( A268 and a9719a );
a9721a <=( a9720a and a9715a );
a9724a <=( A169 and A170 );
a9728a <=( A200 and A199 );
a9729a <=( (not A168) and a9728a );
a9730a <=( a9729a and a9724a );
a9734a <=( A267 and (not A266) );
a9735a <=( A265 and a9734a );
a9739a <=( (not A300) and A298 );
a9740a <=( A269 and a9739a );
a9741a <=( a9740a and a9735a );
a9744a <=( A169 and A170 );
a9748a <=( A200 and A199 );
a9749a <=( (not A168) and a9748a );
a9750a <=( a9749a and a9744a );
a9754a <=( A267 and (not A266) );
a9755a <=( A265 and a9754a );
a9759a <=( A299 and A298 );
a9760a <=( A269 and a9759a );
a9761a <=( a9760a and a9755a );
a9764a <=( A169 and A170 );
a9768a <=( A200 and A199 );
a9769a <=( (not A168) and a9768a );
a9770a <=( a9769a and a9764a );
a9774a <=( A267 and (not A266) );
a9775a <=( A265 and a9774a );
a9779a <=( (not A299) and (not A298) );
a9780a <=( A269 and a9779a );
a9781a <=( a9780a and a9775a );
a9784a <=( A169 and A170 );
a9788a <=( A200 and (not A199) );
a9789a <=( (not A168) and a9788a );
a9790a <=( a9789a and a9784a );
a9794a <=( A298 and A266 );
a9795a <=( A265 and a9794a );
a9799a <=( A301 and A300 );
a9800a <=( (not A299) and a9799a );
a9801a <=( a9800a and a9795a );
a9804a <=( A169 and A170 );
a9808a <=( A200 and (not A199) );
a9809a <=( (not A168) and a9808a );
a9810a <=( a9809a and a9804a );
a9814a <=( A298 and A266 );
a9815a <=( A265 and a9814a );
a9819a <=( A302 and A300 );
a9820a <=( (not A299) and a9819a );
a9821a <=( a9820a and a9815a );
a9824a <=( A169 and A170 );
a9828a <=( A200 and (not A199) );
a9829a <=( (not A168) and a9828a );
a9830a <=( a9829a and a9824a );
a9834a <=( A298 and (not A267) );
a9835a <=( (not A266) and a9834a );
a9839a <=( A301 and A300 );
a9840a <=( (not A299) and a9839a );
a9841a <=( a9840a and a9835a );
a9844a <=( A169 and A170 );
a9848a <=( A200 and (not A199) );
a9849a <=( (not A168) and a9848a );
a9850a <=( a9849a and a9844a );
a9854a <=( A298 and (not A267) );
a9855a <=( (not A266) and a9854a );
a9859a <=( A302 and A300 );
a9860a <=( (not A299) and a9859a );
a9861a <=( a9860a and a9855a );
a9864a <=( A169 and A170 );
a9868a <=( A200 and (not A199) );
a9869a <=( (not A168) and a9868a );
a9870a <=( a9869a and a9864a );
a9874a <=( A298 and (not A266) );
a9875a <=( (not A265) and a9874a );
a9879a <=( A301 and A300 );
a9880a <=( (not A299) and a9879a );
a9881a <=( a9880a and a9875a );
a9884a <=( A169 and A170 );
a9888a <=( A200 and (not A199) );
a9889a <=( (not A168) and a9888a );
a9890a <=( a9889a and a9884a );
a9894a <=( A298 and (not A266) );
a9895a <=( (not A265) and a9894a );
a9899a <=( A302 and A300 );
a9900a <=( (not A299) and a9899a );
a9901a <=( a9900a and a9895a );
a9904a <=( A169 and A170 );
a9908a <=( (not A202) and (not A200) );
a9909a <=( (not A168) and a9908a );
a9910a <=( a9909a and a9904a );
a9914a <=( A266 and (not A265) );
a9915a <=( (not A203) and a9914a );
a9919a <=( (not A302) and (not A301) );
a9920a <=( A298 and a9919a );
a9921a <=( a9920a and a9915a );
a9924a <=( A169 and A170 );
a9928a <=( (not A201) and (not A200) );
a9929a <=( (not A168) and a9928a );
a9930a <=( a9929a and a9924a );
a9934a <=( A267 and (not A266) );
a9935a <=( A265 and a9934a );
a9939a <=( (not A300) and A298 );
a9940a <=( A268 and a9939a );
a9941a <=( a9940a and a9935a );
a9944a <=( A169 and A170 );
a9948a <=( (not A201) and (not A200) );
a9949a <=( (not A168) and a9948a );
a9950a <=( a9949a and a9944a );
a9954a <=( A267 and (not A266) );
a9955a <=( A265 and a9954a );
a9959a <=( A299 and A298 );
a9960a <=( A268 and a9959a );
a9961a <=( a9960a and a9955a );
a9964a <=( A169 and A170 );
a9968a <=( (not A201) and (not A200) );
a9969a <=( (not A168) and a9968a );
a9970a <=( a9969a and a9964a );
a9974a <=( A267 and (not A266) );
a9975a <=( A265 and a9974a );
a9979a <=( (not A299) and (not A298) );
a9980a <=( A268 and a9979a );
a9981a <=( a9980a and a9975a );
a9984a <=( A169 and A170 );
a9988a <=( (not A201) and (not A200) );
a9989a <=( (not A168) and a9988a );
a9990a <=( a9989a and a9984a );
a9994a <=( A267 and (not A266) );
a9995a <=( A265 and a9994a );
a9999a <=( (not A300) and A298 );
a10000a <=( A269 and a9999a );
a10001a <=( a10000a and a9995a );
a10004a <=( A169 and A170 );
a10008a <=( (not A201) and (not A200) );
a10009a <=( (not A168) and a10008a );
a10010a <=( a10009a and a10004a );
a10014a <=( A267 and (not A266) );
a10015a <=( A265 and a10014a );
a10019a <=( A299 and A298 );
a10020a <=( A269 and a10019a );
a10021a <=( a10020a and a10015a );
a10024a <=( A169 and A170 );
a10028a <=( (not A201) and (not A200) );
a10029a <=( (not A168) and a10028a );
a10030a <=( a10029a and a10024a );
a10034a <=( A267 and (not A266) );
a10035a <=( A265 and a10034a );
a10039a <=( (not A299) and (not A298) );
a10040a <=( A269 and a10039a );
a10041a <=( a10040a and a10035a );
a10044a <=( A169 and A170 );
a10048a <=( (not A200) and A199 );
a10049a <=( (not A168) and a10048a );
a10050a <=( a10049a and a10044a );
a10054a <=( A265 and A202 );
a10055a <=( A201 and a10054a );
a10059a <=( A299 and (not A298) );
a10060a <=( A266 and a10059a );
a10061a <=( a10060a and a10055a );
a10064a <=( A169 and A170 );
a10068a <=( (not A200) and A199 );
a10069a <=( (not A168) and a10068a );
a10070a <=( a10069a and a10064a );
a10074a <=( (not A266) and A202 );
a10075a <=( A201 and a10074a );
a10079a <=( A299 and (not A298) );
a10080a <=( (not A267) and a10079a );
a10081a <=( a10080a and a10075a );
a10084a <=( A169 and A170 );
a10088a <=( (not A200) and A199 );
a10089a <=( (not A168) and a10088a );
a10090a <=( a10089a and a10084a );
a10094a <=( (not A265) and A202 );
a10095a <=( A201 and a10094a );
a10099a <=( A299 and (not A298) );
a10100a <=( (not A266) and a10099a );
a10101a <=( a10100a and a10095a );
a10104a <=( A169 and A170 );
a10108a <=( (not A200) and A199 );
a10109a <=( (not A168) and a10108a );
a10110a <=( a10109a and a10104a );
a10114a <=( A265 and A203 );
a10115a <=( A201 and a10114a );
a10119a <=( A299 and (not A298) );
a10120a <=( A266 and a10119a );
a10121a <=( a10120a and a10115a );
a10124a <=( A169 and A170 );
a10128a <=( (not A200) and A199 );
a10129a <=( (not A168) and a10128a );
a10130a <=( a10129a and a10124a );
a10134a <=( (not A266) and A203 );
a10135a <=( A201 and a10134a );
a10139a <=( A299 and (not A298) );
a10140a <=( (not A267) and a10139a );
a10141a <=( a10140a and a10135a );
a10144a <=( A169 and A170 );
a10148a <=( (not A200) and A199 );
a10149a <=( (not A168) and a10148a );
a10150a <=( a10149a and a10144a );
a10154a <=( (not A265) and A203 );
a10155a <=( A201 and a10154a );
a10159a <=( A299 and (not A298) );
a10160a <=( (not A266) and a10159a );
a10161a <=( a10160a and a10155a );
a10164a <=( A169 and A170 );
a10168a <=( (not A200) and (not A199) );
a10169a <=( (not A168) and a10168a );
a10170a <=( a10169a and a10164a );
a10174a <=( A267 and (not A266) );
a10175a <=( A265 and a10174a );
a10179a <=( (not A300) and A298 );
a10180a <=( A268 and a10179a );
a10181a <=( a10180a and a10175a );
a10184a <=( A169 and A170 );
a10188a <=( (not A200) and (not A199) );
a10189a <=( (not A168) and a10188a );
a10190a <=( a10189a and a10184a );
a10194a <=( A267 and (not A266) );
a10195a <=( A265 and a10194a );
a10199a <=( A299 and A298 );
a10200a <=( A268 and a10199a );
a10201a <=( a10200a and a10195a );
a10204a <=( A169 and A170 );
a10208a <=( (not A200) and (not A199) );
a10209a <=( (not A168) and a10208a );
a10210a <=( a10209a and a10204a );
a10214a <=( A267 and (not A266) );
a10215a <=( A265 and a10214a );
a10219a <=( (not A299) and (not A298) );
a10220a <=( A268 and a10219a );
a10221a <=( a10220a and a10215a );
a10224a <=( A169 and A170 );
a10228a <=( (not A200) and (not A199) );
a10229a <=( (not A168) and a10228a );
a10230a <=( a10229a and a10224a );
a10234a <=( A267 and (not A266) );
a10235a <=( A265 and a10234a );
a10239a <=( (not A300) and A298 );
a10240a <=( A269 and a10239a );
a10241a <=( a10240a and a10235a );
a10244a <=( A169 and A170 );
a10248a <=( (not A200) and (not A199) );
a10249a <=( (not A168) and a10248a );
a10250a <=( a10249a and a10244a );
a10254a <=( A267 and (not A266) );
a10255a <=( A265 and a10254a );
a10259a <=( A299 and A298 );
a10260a <=( A269 and a10259a );
a10261a <=( a10260a and a10255a );
a10264a <=( A169 and A170 );
a10268a <=( (not A200) and (not A199) );
a10269a <=( (not A168) and a10268a );
a10270a <=( a10269a and a10264a );
a10274a <=( A267 and (not A266) );
a10275a <=( A265 and a10274a );
a10279a <=( (not A299) and (not A298) );
a10280a <=( A269 and a10279a );
a10281a <=( a10280a and a10275a );
a10284a <=( A169 and (not A170) );
a10288a <=( A199 and A166 );
a10289a <=( A167 and a10288a );
a10290a <=( a10289a and a10284a );
a10294a <=( (not A268) and (not A266) );
a10295a <=( A200 and a10294a );
a10299a <=( A299 and (not A298) );
a10300a <=( (not A269) and a10299a );
a10301a <=( a10300a and a10295a );
a10304a <=( A169 and (not A170) );
a10308a <=( (not A199) and A166 );
a10309a <=( A167 and a10308a );
a10310a <=( a10309a and a10304a );
a10314a <=( A266 and (not A265) );
a10315a <=( A200 and a10314a );
a10319a <=( (not A302) and (not A301) );
a10320a <=( A298 and a10319a );
a10321a <=( a10320a and a10315a );
a10324a <=( A169 and (not A170) );
a10328a <=( (not A200) and A166 );
a10329a <=( A167 and a10328a );
a10330a <=( a10329a and a10324a );
a10334a <=( A265 and (not A203) );
a10335a <=( (not A202) and a10334a );
a10339a <=( A299 and (not A298) );
a10340a <=( A266 and a10339a );
a10341a <=( a10340a and a10335a );
a10344a <=( A169 and (not A170) );
a10348a <=( (not A200) and A166 );
a10349a <=( A167 and a10348a );
a10350a <=( a10349a and a10344a );
a10354a <=( (not A266) and (not A203) );
a10355a <=( (not A202) and a10354a );
a10359a <=( A299 and (not A298) );
a10360a <=( (not A267) and a10359a );
a10361a <=( a10360a and a10355a );
a10364a <=( A169 and (not A170) );
a10368a <=( (not A200) and A166 );
a10369a <=( A167 and a10368a );
a10370a <=( a10369a and a10364a );
a10374a <=( (not A265) and (not A203) );
a10375a <=( (not A202) and a10374a );
a10379a <=( A299 and (not A298) );
a10380a <=( (not A266) and a10379a );
a10381a <=( a10380a and a10375a );
a10384a <=( A169 and (not A170) );
a10388a <=( (not A200) and A166 );
a10389a <=( A167 and a10388a );
a10390a <=( a10389a and a10384a );
a10394a <=( (not A268) and (not A266) );
a10395a <=( (not A201) and a10394a );
a10399a <=( A299 and (not A298) );
a10400a <=( (not A269) and a10399a );
a10401a <=( a10400a and a10395a );
a10404a <=( A169 and (not A170) );
a10408a <=( (not A199) and A166 );
a10409a <=( A167 and a10408a );
a10410a <=( a10409a and a10404a );
a10414a <=( (not A268) and (not A266) );
a10415a <=( (not A200) and a10414a );
a10419a <=( A299 and (not A298) );
a10420a <=( (not A269) and a10419a );
a10421a <=( a10420a and a10415a );
a10424a <=( A169 and (not A170) );
a10428a <=( A199 and (not A166) );
a10429a <=( (not A167) and a10428a );
a10430a <=( a10429a and a10424a );
a10434a <=( (not A268) and (not A266) );
a10435a <=( A200 and a10434a );
a10439a <=( A299 and (not A298) );
a10440a <=( (not A269) and a10439a );
a10441a <=( a10440a and a10435a );
a10444a <=( A169 and (not A170) );
a10448a <=( (not A199) and (not A166) );
a10449a <=( (not A167) and a10448a );
a10450a <=( a10449a and a10444a );
a10454a <=( A266 and (not A265) );
a10455a <=( A200 and a10454a );
a10459a <=( (not A302) and (not A301) );
a10460a <=( A298 and a10459a );
a10461a <=( a10460a and a10455a );
a10464a <=( A169 and (not A170) );
a10468a <=( (not A200) and (not A166) );
a10469a <=( (not A167) and a10468a );
a10470a <=( a10469a and a10464a );
a10474a <=( A265 and (not A203) );
a10475a <=( (not A202) and a10474a );
a10479a <=( A299 and (not A298) );
a10480a <=( A266 and a10479a );
a10481a <=( a10480a and a10475a );
a10484a <=( A169 and (not A170) );
a10488a <=( (not A200) and (not A166) );
a10489a <=( (not A167) and a10488a );
a10490a <=( a10489a and a10484a );
a10494a <=( (not A266) and (not A203) );
a10495a <=( (not A202) and a10494a );
a10499a <=( A299 and (not A298) );
a10500a <=( (not A267) and a10499a );
a10501a <=( a10500a and a10495a );
a10504a <=( A169 and (not A170) );
a10508a <=( (not A200) and (not A166) );
a10509a <=( (not A167) and a10508a );
a10510a <=( a10509a and a10504a );
a10514a <=( (not A265) and (not A203) );
a10515a <=( (not A202) and a10514a );
a10519a <=( A299 and (not A298) );
a10520a <=( (not A266) and a10519a );
a10521a <=( a10520a and a10515a );
a10524a <=( A169 and (not A170) );
a10528a <=( (not A200) and (not A166) );
a10529a <=( (not A167) and a10528a );
a10530a <=( a10529a and a10524a );
a10534a <=( (not A268) and (not A266) );
a10535a <=( (not A201) and a10534a );
a10539a <=( A299 and (not A298) );
a10540a <=( (not A269) and a10539a );
a10541a <=( a10540a and a10535a );
a10544a <=( A169 and (not A170) );
a10548a <=( (not A199) and (not A166) );
a10549a <=( (not A167) and a10548a );
a10550a <=( a10549a and a10544a );
a10554a <=( (not A268) and (not A266) );
a10555a <=( (not A200) and a10554a );
a10559a <=( A299 and (not A298) );
a10560a <=( (not A269) and a10559a );
a10561a <=( a10560a and a10555a );
a10564a <=( (not A167) and (not A169) );
a10568a <=( A200 and A199 );
a10569a <=( (not A166) and a10568a );
a10570a <=( a10569a and a10564a );
a10574a <=( A267 and (not A266) );
a10575a <=( A265 and a10574a );
a10579a <=( (not A300) and A298 );
a10580a <=( A268 and a10579a );
a10581a <=( a10580a and a10575a );
a10584a <=( (not A167) and (not A169) );
a10588a <=( A200 and A199 );
a10589a <=( (not A166) and a10588a );
a10590a <=( a10589a and a10584a );
a10594a <=( A267 and (not A266) );
a10595a <=( A265 and a10594a );
a10599a <=( A299 and A298 );
a10600a <=( A268 and a10599a );
a10601a <=( a10600a and a10595a );
a10604a <=( (not A167) and (not A169) );
a10608a <=( A200 and A199 );
a10609a <=( (not A166) and a10608a );
a10610a <=( a10609a and a10604a );
a10614a <=( A267 and (not A266) );
a10615a <=( A265 and a10614a );
a10619a <=( (not A299) and (not A298) );
a10620a <=( A268 and a10619a );
a10621a <=( a10620a and a10615a );
a10624a <=( (not A167) and (not A169) );
a10628a <=( A200 and A199 );
a10629a <=( (not A166) and a10628a );
a10630a <=( a10629a and a10624a );
a10634a <=( A267 and (not A266) );
a10635a <=( A265 and a10634a );
a10639a <=( (not A300) and A298 );
a10640a <=( A269 and a10639a );
a10641a <=( a10640a and a10635a );
a10644a <=( (not A167) and (not A169) );
a10648a <=( A200 and A199 );
a10649a <=( (not A166) and a10648a );
a10650a <=( a10649a and a10644a );
a10654a <=( A267 and (not A266) );
a10655a <=( A265 and a10654a );
a10659a <=( A299 and A298 );
a10660a <=( A269 and a10659a );
a10661a <=( a10660a and a10655a );
a10664a <=( (not A167) and (not A169) );
a10668a <=( A200 and A199 );
a10669a <=( (not A166) and a10668a );
a10670a <=( a10669a and a10664a );
a10674a <=( A267 and (not A266) );
a10675a <=( A265 and a10674a );
a10679a <=( (not A299) and (not A298) );
a10680a <=( A269 and a10679a );
a10681a <=( a10680a and a10675a );
a10684a <=( (not A167) and (not A169) );
a10688a <=( A200 and (not A199) );
a10689a <=( (not A166) and a10688a );
a10690a <=( a10689a and a10684a );
a10694a <=( A298 and A266 );
a10695a <=( A265 and a10694a );
a10699a <=( A301 and A300 );
a10700a <=( (not A299) and a10699a );
a10701a <=( a10700a and a10695a );
a10704a <=( (not A167) and (not A169) );
a10708a <=( A200 and (not A199) );
a10709a <=( (not A166) and a10708a );
a10710a <=( a10709a and a10704a );
a10714a <=( A298 and A266 );
a10715a <=( A265 and a10714a );
a10719a <=( A302 and A300 );
a10720a <=( (not A299) and a10719a );
a10721a <=( a10720a and a10715a );
a10724a <=( (not A167) and (not A169) );
a10728a <=( A200 and (not A199) );
a10729a <=( (not A166) and a10728a );
a10730a <=( a10729a and a10724a );
a10734a <=( A298 and (not A267) );
a10735a <=( (not A266) and a10734a );
a10739a <=( A301 and A300 );
a10740a <=( (not A299) and a10739a );
a10741a <=( a10740a and a10735a );
a10744a <=( (not A167) and (not A169) );
a10748a <=( A200 and (not A199) );
a10749a <=( (not A166) and a10748a );
a10750a <=( a10749a and a10744a );
a10754a <=( A298 and (not A267) );
a10755a <=( (not A266) and a10754a );
a10759a <=( A302 and A300 );
a10760a <=( (not A299) and a10759a );
a10761a <=( a10760a and a10755a );
a10764a <=( (not A167) and (not A169) );
a10768a <=( A200 and (not A199) );
a10769a <=( (not A166) and a10768a );
a10770a <=( a10769a and a10764a );
a10774a <=( A298 and (not A266) );
a10775a <=( (not A265) and a10774a );
a10779a <=( A301 and A300 );
a10780a <=( (not A299) and a10779a );
a10781a <=( a10780a and a10775a );
a10784a <=( (not A167) and (not A169) );
a10788a <=( A200 and (not A199) );
a10789a <=( (not A166) and a10788a );
a10790a <=( a10789a and a10784a );
a10794a <=( A298 and (not A266) );
a10795a <=( (not A265) and a10794a );
a10799a <=( A302 and A300 );
a10800a <=( (not A299) and a10799a );
a10801a <=( a10800a and a10795a );
a10804a <=( (not A167) and (not A169) );
a10808a <=( (not A202) and (not A200) );
a10809a <=( (not A166) and a10808a );
a10810a <=( a10809a and a10804a );
a10814a <=( A266 and (not A265) );
a10815a <=( (not A203) and a10814a );
a10819a <=( (not A302) and (not A301) );
a10820a <=( A298 and a10819a );
a10821a <=( a10820a and a10815a );
a10824a <=( (not A167) and (not A169) );
a10828a <=( (not A201) and (not A200) );
a10829a <=( (not A166) and a10828a );
a10830a <=( a10829a and a10824a );
a10834a <=( A267 and (not A266) );
a10835a <=( A265 and a10834a );
a10839a <=( (not A300) and A298 );
a10840a <=( A268 and a10839a );
a10841a <=( a10840a and a10835a );
a10844a <=( (not A167) and (not A169) );
a10848a <=( (not A201) and (not A200) );
a10849a <=( (not A166) and a10848a );
a10850a <=( a10849a and a10844a );
a10854a <=( A267 and (not A266) );
a10855a <=( A265 and a10854a );
a10859a <=( A299 and A298 );
a10860a <=( A268 and a10859a );
a10861a <=( a10860a and a10855a );
a10864a <=( (not A167) and (not A169) );
a10868a <=( (not A201) and (not A200) );
a10869a <=( (not A166) and a10868a );
a10870a <=( a10869a and a10864a );
a10874a <=( A267 and (not A266) );
a10875a <=( A265 and a10874a );
a10879a <=( (not A299) and (not A298) );
a10880a <=( A268 and a10879a );
a10881a <=( a10880a and a10875a );
a10884a <=( (not A167) and (not A169) );
a10888a <=( (not A201) and (not A200) );
a10889a <=( (not A166) and a10888a );
a10890a <=( a10889a and a10884a );
a10894a <=( A267 and (not A266) );
a10895a <=( A265 and a10894a );
a10899a <=( (not A300) and A298 );
a10900a <=( A269 and a10899a );
a10901a <=( a10900a and a10895a );
a10904a <=( (not A167) and (not A169) );
a10908a <=( (not A201) and (not A200) );
a10909a <=( (not A166) and a10908a );
a10910a <=( a10909a and a10904a );
a10914a <=( A267 and (not A266) );
a10915a <=( A265 and a10914a );
a10919a <=( A299 and A298 );
a10920a <=( A269 and a10919a );
a10921a <=( a10920a and a10915a );
a10924a <=( (not A167) and (not A169) );
a10928a <=( (not A201) and (not A200) );
a10929a <=( (not A166) and a10928a );
a10930a <=( a10929a and a10924a );
a10934a <=( A267 and (not A266) );
a10935a <=( A265 and a10934a );
a10939a <=( (not A299) and (not A298) );
a10940a <=( A269 and a10939a );
a10941a <=( a10940a and a10935a );
a10944a <=( (not A167) and (not A169) );
a10948a <=( (not A200) and A199 );
a10949a <=( (not A166) and a10948a );
a10950a <=( a10949a and a10944a );
a10954a <=( A265 and A202 );
a10955a <=( A201 and a10954a );
a10959a <=( A299 and (not A298) );
a10960a <=( A266 and a10959a );
a10961a <=( a10960a and a10955a );
a10964a <=( (not A167) and (not A169) );
a10968a <=( (not A200) and A199 );
a10969a <=( (not A166) and a10968a );
a10970a <=( a10969a and a10964a );
a10974a <=( (not A266) and A202 );
a10975a <=( A201 and a10974a );
a10979a <=( A299 and (not A298) );
a10980a <=( (not A267) and a10979a );
a10981a <=( a10980a and a10975a );
a10984a <=( (not A167) and (not A169) );
a10988a <=( (not A200) and A199 );
a10989a <=( (not A166) and a10988a );
a10990a <=( a10989a and a10984a );
a10994a <=( (not A265) and A202 );
a10995a <=( A201 and a10994a );
a10999a <=( A299 and (not A298) );
a11000a <=( (not A266) and a10999a );
a11001a <=( a11000a and a10995a );
a11004a <=( (not A167) and (not A169) );
a11008a <=( (not A200) and A199 );
a11009a <=( (not A166) and a11008a );
a11010a <=( a11009a and a11004a );
a11014a <=( A265 and A203 );
a11015a <=( A201 and a11014a );
a11019a <=( A299 and (not A298) );
a11020a <=( A266 and a11019a );
a11021a <=( a11020a and a11015a );
a11024a <=( (not A167) and (not A169) );
a11028a <=( (not A200) and A199 );
a11029a <=( (not A166) and a11028a );
a11030a <=( a11029a and a11024a );
a11034a <=( (not A266) and A203 );
a11035a <=( A201 and a11034a );
a11039a <=( A299 and (not A298) );
a11040a <=( (not A267) and a11039a );
a11041a <=( a11040a and a11035a );
a11044a <=( (not A167) and (not A169) );
a11048a <=( (not A200) and A199 );
a11049a <=( (not A166) and a11048a );
a11050a <=( a11049a and a11044a );
a11054a <=( (not A265) and A203 );
a11055a <=( A201 and a11054a );
a11059a <=( A299 and (not A298) );
a11060a <=( (not A266) and a11059a );
a11061a <=( a11060a and a11055a );
a11064a <=( (not A167) and (not A169) );
a11068a <=( (not A200) and (not A199) );
a11069a <=( (not A166) and a11068a );
a11070a <=( a11069a and a11064a );
a11074a <=( A267 and (not A266) );
a11075a <=( A265 and a11074a );
a11079a <=( (not A300) and A298 );
a11080a <=( A268 and a11079a );
a11081a <=( a11080a and a11075a );
a11084a <=( (not A167) and (not A169) );
a11088a <=( (not A200) and (not A199) );
a11089a <=( (not A166) and a11088a );
a11090a <=( a11089a and a11084a );
a11094a <=( A267 and (not A266) );
a11095a <=( A265 and a11094a );
a11099a <=( A299 and A298 );
a11100a <=( A268 and a11099a );
a11101a <=( a11100a and a11095a );
a11104a <=( (not A167) and (not A169) );
a11108a <=( (not A200) and (not A199) );
a11109a <=( (not A166) and a11108a );
a11110a <=( a11109a and a11104a );
a11114a <=( A267 and (not A266) );
a11115a <=( A265 and a11114a );
a11119a <=( (not A299) and (not A298) );
a11120a <=( A268 and a11119a );
a11121a <=( a11120a and a11115a );
a11124a <=( (not A167) and (not A169) );
a11128a <=( (not A200) and (not A199) );
a11129a <=( (not A166) and a11128a );
a11130a <=( a11129a and a11124a );
a11134a <=( A267 and (not A266) );
a11135a <=( A265 and a11134a );
a11139a <=( (not A300) and A298 );
a11140a <=( A269 and a11139a );
a11141a <=( a11140a and a11135a );
a11144a <=( (not A167) and (not A169) );
a11148a <=( (not A200) and (not A199) );
a11149a <=( (not A166) and a11148a );
a11150a <=( a11149a and a11144a );
a11154a <=( A267 and (not A266) );
a11155a <=( A265 and a11154a );
a11159a <=( A299 and A298 );
a11160a <=( A269 and a11159a );
a11161a <=( a11160a and a11155a );
a11164a <=( (not A167) and (not A169) );
a11168a <=( (not A200) and (not A199) );
a11169a <=( (not A166) and a11168a );
a11170a <=( a11169a and a11164a );
a11174a <=( A267 and (not A266) );
a11175a <=( A265 and a11174a );
a11179a <=( (not A299) and (not A298) );
a11180a <=( A269 and a11179a );
a11181a <=( a11180a and a11175a );
a11184a <=( (not A168) and (not A169) );
a11188a <=( A199 and A166 );
a11189a <=( A167 and a11188a );
a11190a <=( a11189a and a11184a );
a11194a <=( A266 and (not A265) );
a11195a <=( A200 and a11194a );
a11199a <=( (not A302) and (not A301) );
a11200a <=( A298 and a11199a );
a11201a <=( a11200a and a11195a );
a11204a <=( (not A168) and (not A169) );
a11208a <=( (not A199) and A166 );
a11209a <=( A167 and a11208a );
a11210a <=( a11209a and a11204a );
a11214a <=( (not A268) and (not A266) );
a11215a <=( A200 and a11214a );
a11219a <=( A299 and (not A298) );
a11220a <=( (not A269) and a11219a );
a11221a <=( a11220a and a11215a );
a11224a <=( (not A168) and (not A169) );
a11228a <=( (not A200) and A166 );
a11229a <=( A167 and a11228a );
a11230a <=( a11229a and a11224a );
a11234a <=( (not A265) and (not A203) );
a11235a <=( (not A202) and a11234a );
a11239a <=( (not A300) and A298 );
a11240a <=( A266 and a11239a );
a11241a <=( a11240a and a11235a );
a11244a <=( (not A168) and (not A169) );
a11248a <=( (not A200) and A166 );
a11249a <=( A167 and a11248a );
a11250a <=( a11249a and a11244a );
a11254a <=( (not A265) and (not A203) );
a11255a <=( (not A202) and a11254a );
a11259a <=( A299 and A298 );
a11260a <=( A266 and a11259a );
a11261a <=( a11260a and a11255a );
a11264a <=( (not A168) and (not A169) );
a11268a <=( (not A200) and A166 );
a11269a <=( A167 and a11268a );
a11270a <=( a11269a and a11264a );
a11274a <=( (not A265) and (not A203) );
a11275a <=( (not A202) and a11274a );
a11279a <=( (not A299) and (not A298) );
a11280a <=( A266 and a11279a );
a11281a <=( a11280a and a11275a );
a11284a <=( (not A168) and (not A169) );
a11288a <=( (not A200) and A166 );
a11289a <=( A167 and a11288a );
a11290a <=( a11289a and a11284a );
a11294a <=( A266 and (not A265) );
a11295a <=( (not A201) and a11294a );
a11299a <=( (not A302) and (not A301) );
a11300a <=( A298 and a11299a );
a11301a <=( a11300a and a11295a );
a11304a <=( (not A168) and (not A169) );
a11308a <=( (not A199) and A166 );
a11309a <=( A167 and a11308a );
a11310a <=( a11309a and a11304a );
a11314a <=( A266 and (not A265) );
a11315a <=( (not A200) and a11314a );
a11319a <=( (not A302) and (not A301) );
a11320a <=( A298 and a11319a );
a11321a <=( a11320a and a11315a );
a11324a <=( (not A169) and A170 );
a11328a <=( A199 and (not A166) );
a11329a <=( A167 and a11328a );
a11330a <=( a11329a and a11324a );
a11334a <=( (not A268) and (not A266) );
a11335a <=( A200 and a11334a );
a11339a <=( A299 and (not A298) );
a11340a <=( (not A269) and a11339a );
a11341a <=( a11340a and a11335a );
a11344a <=( (not A169) and A170 );
a11348a <=( (not A199) and (not A166) );
a11349a <=( A167 and a11348a );
a11350a <=( a11349a and a11344a );
a11354a <=( A266 and (not A265) );
a11355a <=( A200 and a11354a );
a11359a <=( (not A302) and (not A301) );
a11360a <=( A298 and a11359a );
a11361a <=( a11360a and a11355a );
a11364a <=( (not A169) and A170 );
a11368a <=( (not A200) and (not A166) );
a11369a <=( A167 and a11368a );
a11370a <=( a11369a and a11364a );
a11374a <=( A265 and (not A203) );
a11375a <=( (not A202) and a11374a );
a11379a <=( A299 and (not A298) );
a11380a <=( A266 and a11379a );
a11381a <=( a11380a and a11375a );
a11384a <=( (not A169) and A170 );
a11388a <=( (not A200) and (not A166) );
a11389a <=( A167 and a11388a );
a11390a <=( a11389a and a11384a );
a11394a <=( (not A266) and (not A203) );
a11395a <=( (not A202) and a11394a );
a11399a <=( A299 and (not A298) );
a11400a <=( (not A267) and a11399a );
a11401a <=( a11400a and a11395a );
a11404a <=( (not A169) and A170 );
a11408a <=( (not A200) and (not A166) );
a11409a <=( A167 and a11408a );
a11410a <=( a11409a and a11404a );
a11414a <=( (not A265) and (not A203) );
a11415a <=( (not A202) and a11414a );
a11419a <=( A299 and (not A298) );
a11420a <=( (not A266) and a11419a );
a11421a <=( a11420a and a11415a );
a11424a <=( (not A169) and A170 );
a11428a <=( (not A200) and (not A166) );
a11429a <=( A167 and a11428a );
a11430a <=( a11429a and a11424a );
a11434a <=( (not A268) and (not A266) );
a11435a <=( (not A201) and a11434a );
a11439a <=( A299 and (not A298) );
a11440a <=( (not A269) and a11439a );
a11441a <=( a11440a and a11435a );
a11444a <=( (not A169) and A170 );
a11448a <=( (not A199) and (not A166) );
a11449a <=( A167 and a11448a );
a11450a <=( a11449a and a11444a );
a11454a <=( (not A268) and (not A266) );
a11455a <=( (not A200) and a11454a );
a11459a <=( A299 and (not A298) );
a11460a <=( (not A269) and a11459a );
a11461a <=( a11460a and a11455a );
a11464a <=( (not A169) and A170 );
a11468a <=( A199 and A166 );
a11469a <=( (not A167) and a11468a );
a11470a <=( a11469a and a11464a );
a11474a <=( (not A268) and (not A266) );
a11475a <=( A200 and a11474a );
a11479a <=( A299 and (not A298) );
a11480a <=( (not A269) and a11479a );
a11481a <=( a11480a and a11475a );
a11484a <=( (not A169) and A170 );
a11488a <=( (not A199) and A166 );
a11489a <=( (not A167) and a11488a );
a11490a <=( a11489a and a11484a );
a11494a <=( A266 and (not A265) );
a11495a <=( A200 and a11494a );
a11499a <=( (not A302) and (not A301) );
a11500a <=( A298 and a11499a );
a11501a <=( a11500a and a11495a );
a11504a <=( (not A169) and A170 );
a11508a <=( (not A200) and A166 );
a11509a <=( (not A167) and a11508a );
a11510a <=( a11509a and a11504a );
a11514a <=( A265 and (not A203) );
a11515a <=( (not A202) and a11514a );
a11519a <=( A299 and (not A298) );
a11520a <=( A266 and a11519a );
a11521a <=( a11520a and a11515a );
a11524a <=( (not A169) and A170 );
a11528a <=( (not A200) and A166 );
a11529a <=( (not A167) and a11528a );
a11530a <=( a11529a and a11524a );
a11534a <=( (not A266) and (not A203) );
a11535a <=( (not A202) and a11534a );
a11539a <=( A299 and (not A298) );
a11540a <=( (not A267) and a11539a );
a11541a <=( a11540a and a11535a );
a11544a <=( (not A169) and A170 );
a11548a <=( (not A200) and A166 );
a11549a <=( (not A167) and a11548a );
a11550a <=( a11549a and a11544a );
a11554a <=( (not A265) and (not A203) );
a11555a <=( (not A202) and a11554a );
a11559a <=( A299 and (not A298) );
a11560a <=( (not A266) and a11559a );
a11561a <=( a11560a and a11555a );
a11564a <=( (not A169) and A170 );
a11568a <=( (not A200) and A166 );
a11569a <=( (not A167) and a11568a );
a11570a <=( a11569a and a11564a );
a11574a <=( (not A268) and (not A266) );
a11575a <=( (not A201) and a11574a );
a11579a <=( A299 and (not A298) );
a11580a <=( (not A269) and a11579a );
a11581a <=( a11580a and a11575a );
a11584a <=( (not A169) and A170 );
a11588a <=( (not A199) and A166 );
a11589a <=( (not A167) and a11588a );
a11590a <=( a11589a and a11584a );
a11594a <=( (not A268) and (not A266) );
a11595a <=( (not A200) and a11594a );
a11599a <=( A299 and (not A298) );
a11600a <=( (not A269) and a11599a );
a11601a <=( a11600a and a11595a );
a11604a <=( (not A169) and (not A170) );
a11608a <=( A200 and A199 );
a11609a <=( (not A168) and a11608a );
a11610a <=( a11609a and a11604a );
a11614a <=( A267 and (not A266) );
a11615a <=( A265 and a11614a );
a11619a <=( (not A300) and A298 );
a11620a <=( A268 and a11619a );
a11621a <=( a11620a and a11615a );
a11624a <=( (not A169) and (not A170) );
a11628a <=( A200 and A199 );
a11629a <=( (not A168) and a11628a );
a11630a <=( a11629a and a11624a );
a11634a <=( A267 and (not A266) );
a11635a <=( A265 and a11634a );
a11639a <=( A299 and A298 );
a11640a <=( A268 and a11639a );
a11641a <=( a11640a and a11635a );
a11644a <=( (not A169) and (not A170) );
a11648a <=( A200 and A199 );
a11649a <=( (not A168) and a11648a );
a11650a <=( a11649a and a11644a );
a11654a <=( A267 and (not A266) );
a11655a <=( A265 and a11654a );
a11659a <=( (not A299) and (not A298) );
a11660a <=( A268 and a11659a );
a11661a <=( a11660a and a11655a );
a11664a <=( (not A169) and (not A170) );
a11668a <=( A200 and A199 );
a11669a <=( (not A168) and a11668a );
a11670a <=( a11669a and a11664a );
a11674a <=( A267 and (not A266) );
a11675a <=( A265 and a11674a );
a11679a <=( (not A300) and A298 );
a11680a <=( A269 and a11679a );
a11681a <=( a11680a and a11675a );
a11684a <=( (not A169) and (not A170) );
a11688a <=( A200 and A199 );
a11689a <=( (not A168) and a11688a );
a11690a <=( a11689a and a11684a );
a11694a <=( A267 and (not A266) );
a11695a <=( A265 and a11694a );
a11699a <=( A299 and A298 );
a11700a <=( A269 and a11699a );
a11701a <=( a11700a and a11695a );
a11704a <=( (not A169) and (not A170) );
a11708a <=( A200 and A199 );
a11709a <=( (not A168) and a11708a );
a11710a <=( a11709a and a11704a );
a11714a <=( A267 and (not A266) );
a11715a <=( A265 and a11714a );
a11719a <=( (not A299) and (not A298) );
a11720a <=( A269 and a11719a );
a11721a <=( a11720a and a11715a );
a11724a <=( (not A169) and (not A170) );
a11728a <=( A200 and (not A199) );
a11729a <=( (not A168) and a11728a );
a11730a <=( a11729a and a11724a );
a11734a <=( A298 and A266 );
a11735a <=( A265 and a11734a );
a11739a <=( A301 and A300 );
a11740a <=( (not A299) and a11739a );
a11741a <=( a11740a and a11735a );
a11744a <=( (not A169) and (not A170) );
a11748a <=( A200 and (not A199) );
a11749a <=( (not A168) and a11748a );
a11750a <=( a11749a and a11744a );
a11754a <=( A298 and A266 );
a11755a <=( A265 and a11754a );
a11759a <=( A302 and A300 );
a11760a <=( (not A299) and a11759a );
a11761a <=( a11760a and a11755a );
a11764a <=( (not A169) and (not A170) );
a11768a <=( A200 and (not A199) );
a11769a <=( (not A168) and a11768a );
a11770a <=( a11769a and a11764a );
a11774a <=( A298 and (not A267) );
a11775a <=( (not A266) and a11774a );
a11779a <=( A301 and A300 );
a11780a <=( (not A299) and a11779a );
a11781a <=( a11780a and a11775a );
a11784a <=( (not A169) and (not A170) );
a11788a <=( A200 and (not A199) );
a11789a <=( (not A168) and a11788a );
a11790a <=( a11789a and a11784a );
a11794a <=( A298 and (not A267) );
a11795a <=( (not A266) and a11794a );
a11799a <=( A302 and A300 );
a11800a <=( (not A299) and a11799a );
a11801a <=( a11800a and a11795a );
a11804a <=( (not A169) and (not A170) );
a11808a <=( A200 and (not A199) );
a11809a <=( (not A168) and a11808a );
a11810a <=( a11809a and a11804a );
a11814a <=( A298 and (not A266) );
a11815a <=( (not A265) and a11814a );
a11819a <=( A301 and A300 );
a11820a <=( (not A299) and a11819a );
a11821a <=( a11820a and a11815a );
a11824a <=( (not A169) and (not A170) );
a11828a <=( A200 and (not A199) );
a11829a <=( (not A168) and a11828a );
a11830a <=( a11829a and a11824a );
a11834a <=( A298 and (not A266) );
a11835a <=( (not A265) and a11834a );
a11839a <=( A302 and A300 );
a11840a <=( (not A299) and a11839a );
a11841a <=( a11840a and a11835a );
a11844a <=( (not A169) and (not A170) );
a11848a <=( (not A202) and (not A200) );
a11849a <=( (not A168) and a11848a );
a11850a <=( a11849a and a11844a );
a11854a <=( A266 and (not A265) );
a11855a <=( (not A203) and a11854a );
a11859a <=( (not A302) and (not A301) );
a11860a <=( A298 and a11859a );
a11861a <=( a11860a and a11855a );
a11864a <=( (not A169) and (not A170) );
a11868a <=( (not A201) and (not A200) );
a11869a <=( (not A168) and a11868a );
a11870a <=( a11869a and a11864a );
a11874a <=( A267 and (not A266) );
a11875a <=( A265 and a11874a );
a11879a <=( (not A300) and A298 );
a11880a <=( A268 and a11879a );
a11881a <=( a11880a and a11875a );
a11884a <=( (not A169) and (not A170) );
a11888a <=( (not A201) and (not A200) );
a11889a <=( (not A168) and a11888a );
a11890a <=( a11889a and a11884a );
a11894a <=( A267 and (not A266) );
a11895a <=( A265 and a11894a );
a11899a <=( A299 and A298 );
a11900a <=( A268 and a11899a );
a11901a <=( a11900a and a11895a );
a11904a <=( (not A169) and (not A170) );
a11908a <=( (not A201) and (not A200) );
a11909a <=( (not A168) and a11908a );
a11910a <=( a11909a and a11904a );
a11914a <=( A267 and (not A266) );
a11915a <=( A265 and a11914a );
a11919a <=( (not A299) and (not A298) );
a11920a <=( A268 and a11919a );
a11921a <=( a11920a and a11915a );
a11924a <=( (not A169) and (not A170) );
a11928a <=( (not A201) and (not A200) );
a11929a <=( (not A168) and a11928a );
a11930a <=( a11929a and a11924a );
a11934a <=( A267 and (not A266) );
a11935a <=( A265 and a11934a );
a11939a <=( (not A300) and A298 );
a11940a <=( A269 and a11939a );
a11941a <=( a11940a and a11935a );
a11944a <=( (not A169) and (not A170) );
a11948a <=( (not A201) and (not A200) );
a11949a <=( (not A168) and a11948a );
a11950a <=( a11949a and a11944a );
a11954a <=( A267 and (not A266) );
a11955a <=( A265 and a11954a );
a11959a <=( A299 and A298 );
a11960a <=( A269 and a11959a );
a11961a <=( a11960a and a11955a );
a11964a <=( (not A169) and (not A170) );
a11968a <=( (not A201) and (not A200) );
a11969a <=( (not A168) and a11968a );
a11970a <=( a11969a and a11964a );
a11974a <=( A267 and (not A266) );
a11975a <=( A265 and a11974a );
a11979a <=( (not A299) and (not A298) );
a11980a <=( A269 and a11979a );
a11981a <=( a11980a and a11975a );
a11984a <=( (not A169) and (not A170) );
a11988a <=( (not A200) and A199 );
a11989a <=( (not A168) and a11988a );
a11990a <=( a11989a and a11984a );
a11994a <=( A265 and A202 );
a11995a <=( A201 and a11994a );
a11999a <=( A299 and (not A298) );
a12000a <=( A266 and a11999a );
a12001a <=( a12000a and a11995a );
a12004a <=( (not A169) and (not A170) );
a12008a <=( (not A200) and A199 );
a12009a <=( (not A168) and a12008a );
a12010a <=( a12009a and a12004a );
a12014a <=( (not A266) and A202 );
a12015a <=( A201 and a12014a );
a12019a <=( A299 and (not A298) );
a12020a <=( (not A267) and a12019a );
a12021a <=( a12020a and a12015a );
a12024a <=( (not A169) and (not A170) );
a12028a <=( (not A200) and A199 );
a12029a <=( (not A168) and a12028a );
a12030a <=( a12029a and a12024a );
a12034a <=( (not A265) and A202 );
a12035a <=( A201 and a12034a );
a12039a <=( A299 and (not A298) );
a12040a <=( (not A266) and a12039a );
a12041a <=( a12040a and a12035a );
a12044a <=( (not A169) and (not A170) );
a12048a <=( (not A200) and A199 );
a12049a <=( (not A168) and a12048a );
a12050a <=( a12049a and a12044a );
a12054a <=( A265 and A203 );
a12055a <=( A201 and a12054a );
a12059a <=( A299 and (not A298) );
a12060a <=( A266 and a12059a );
a12061a <=( a12060a and a12055a );
a12064a <=( (not A169) and (not A170) );
a12068a <=( (not A200) and A199 );
a12069a <=( (not A168) and a12068a );
a12070a <=( a12069a and a12064a );
a12074a <=( (not A266) and A203 );
a12075a <=( A201 and a12074a );
a12079a <=( A299 and (not A298) );
a12080a <=( (not A267) and a12079a );
a12081a <=( a12080a and a12075a );
a12084a <=( (not A169) and (not A170) );
a12088a <=( (not A200) and A199 );
a12089a <=( (not A168) and a12088a );
a12090a <=( a12089a and a12084a );
a12094a <=( (not A265) and A203 );
a12095a <=( A201 and a12094a );
a12099a <=( A299 and (not A298) );
a12100a <=( (not A266) and a12099a );
a12101a <=( a12100a and a12095a );
a12104a <=( (not A169) and (not A170) );
a12108a <=( (not A200) and (not A199) );
a12109a <=( (not A168) and a12108a );
a12110a <=( a12109a and a12104a );
a12114a <=( A267 and (not A266) );
a12115a <=( A265 and a12114a );
a12119a <=( (not A300) and A298 );
a12120a <=( A268 and a12119a );
a12121a <=( a12120a and a12115a );
a12124a <=( (not A169) and (not A170) );
a12128a <=( (not A200) and (not A199) );
a12129a <=( (not A168) and a12128a );
a12130a <=( a12129a and a12124a );
a12134a <=( A267 and (not A266) );
a12135a <=( A265 and a12134a );
a12139a <=( A299 and A298 );
a12140a <=( A268 and a12139a );
a12141a <=( a12140a and a12135a );
a12144a <=( (not A169) and (not A170) );
a12148a <=( (not A200) and (not A199) );
a12149a <=( (not A168) and a12148a );
a12150a <=( a12149a and a12144a );
a12154a <=( A267 and (not A266) );
a12155a <=( A265 and a12154a );
a12159a <=( (not A299) and (not A298) );
a12160a <=( A268 and a12159a );
a12161a <=( a12160a and a12155a );
a12164a <=( (not A169) and (not A170) );
a12168a <=( (not A200) and (not A199) );
a12169a <=( (not A168) and a12168a );
a12170a <=( a12169a and a12164a );
a12174a <=( A267 and (not A266) );
a12175a <=( A265 and a12174a );
a12179a <=( (not A300) and A298 );
a12180a <=( A269 and a12179a );
a12181a <=( a12180a and a12175a );
a12184a <=( (not A169) and (not A170) );
a12188a <=( (not A200) and (not A199) );
a12189a <=( (not A168) and a12188a );
a12190a <=( a12189a and a12184a );
a12194a <=( A267 and (not A266) );
a12195a <=( A265 and a12194a );
a12199a <=( A299 and A298 );
a12200a <=( A269 and a12199a );
a12201a <=( a12200a and a12195a );
a12204a <=( (not A169) and (not A170) );
a12208a <=( (not A200) and (not A199) );
a12209a <=( (not A168) and a12208a );
a12210a <=( a12209a and a12204a );
a12214a <=( A267 and (not A266) );
a12215a <=( A265 and a12214a );
a12219a <=( (not A299) and (not A298) );
a12220a <=( A269 and a12219a );
a12221a <=( a12220a and a12215a );
a12225a <=( (not A200) and A166 );
a12226a <=( A168 and a12225a );
a12230a <=( (not A266) and (not A203) );
a12231a <=( (not A202) and a12230a );
a12232a <=( a12231a and a12226a );
a12236a <=( A298 and (not A269) );
a12237a <=( (not A268) and a12236a );
a12241a <=( A301 and A300 );
a12242a <=( (not A299) and a12241a );
a12243a <=( a12242a and a12237a );
a12247a <=( (not A200) and A166 );
a12248a <=( A168 and a12247a );
a12252a <=( (not A266) and (not A203) );
a12253a <=( (not A202) and a12252a );
a12254a <=( a12253a and a12248a );
a12258a <=( A298 and (not A269) );
a12259a <=( (not A268) and a12258a );
a12263a <=( A302 and A300 );
a12264a <=( (not A299) and a12263a );
a12265a <=( a12264a and a12259a );
a12269a <=( A199 and A166 );
a12270a <=( A168 and a12269a );
a12274a <=( A202 and A201 );
a12275a <=( (not A200) and a12274a );
a12276a <=( a12275a and a12270a );
a12280a <=( A267 and (not A266) );
a12281a <=( A265 and a12280a );
a12285a <=( (not A300) and A298 );
a12286a <=( A268 and a12285a );
a12287a <=( a12286a and a12281a );
a12291a <=( A199 and A166 );
a12292a <=( A168 and a12291a );
a12296a <=( A202 and A201 );
a12297a <=( (not A200) and a12296a );
a12298a <=( a12297a and a12292a );
a12302a <=( A267 and (not A266) );
a12303a <=( A265 and a12302a );
a12307a <=( A299 and A298 );
a12308a <=( A268 and a12307a );
a12309a <=( a12308a and a12303a );
a12313a <=( A199 and A166 );
a12314a <=( A168 and a12313a );
a12318a <=( A202 and A201 );
a12319a <=( (not A200) and a12318a );
a12320a <=( a12319a and a12314a );
a12324a <=( A267 and (not A266) );
a12325a <=( A265 and a12324a );
a12329a <=( (not A299) and (not A298) );
a12330a <=( A268 and a12329a );
a12331a <=( a12330a and a12325a );
a12335a <=( A199 and A166 );
a12336a <=( A168 and a12335a );
a12340a <=( A202 and A201 );
a12341a <=( (not A200) and a12340a );
a12342a <=( a12341a and a12336a );
a12346a <=( A267 and (not A266) );
a12347a <=( A265 and a12346a );
a12351a <=( (not A300) and A298 );
a12352a <=( A269 and a12351a );
a12353a <=( a12352a and a12347a );
a12357a <=( A199 and A166 );
a12358a <=( A168 and a12357a );
a12362a <=( A202 and A201 );
a12363a <=( (not A200) and a12362a );
a12364a <=( a12363a and a12358a );
a12368a <=( A267 and (not A266) );
a12369a <=( A265 and a12368a );
a12373a <=( A299 and A298 );
a12374a <=( A269 and a12373a );
a12375a <=( a12374a and a12369a );
a12379a <=( A199 and A166 );
a12380a <=( A168 and a12379a );
a12384a <=( A202 and A201 );
a12385a <=( (not A200) and a12384a );
a12386a <=( a12385a and a12380a );
a12390a <=( A267 and (not A266) );
a12391a <=( A265 and a12390a );
a12395a <=( (not A299) and (not A298) );
a12396a <=( A269 and a12395a );
a12397a <=( a12396a and a12391a );
a12401a <=( A199 and A166 );
a12402a <=( A168 and a12401a );
a12406a <=( A203 and A201 );
a12407a <=( (not A200) and a12406a );
a12408a <=( a12407a and a12402a );
a12412a <=( A267 and (not A266) );
a12413a <=( A265 and a12412a );
a12417a <=( (not A300) and A298 );
a12418a <=( A268 and a12417a );
a12419a <=( a12418a and a12413a );
a12423a <=( A199 and A166 );
a12424a <=( A168 and a12423a );
a12428a <=( A203 and A201 );
a12429a <=( (not A200) and a12428a );
a12430a <=( a12429a and a12424a );
a12434a <=( A267 and (not A266) );
a12435a <=( A265 and a12434a );
a12439a <=( A299 and A298 );
a12440a <=( A268 and a12439a );
a12441a <=( a12440a and a12435a );
a12445a <=( A199 and A166 );
a12446a <=( A168 and a12445a );
a12450a <=( A203 and A201 );
a12451a <=( (not A200) and a12450a );
a12452a <=( a12451a and a12446a );
a12456a <=( A267 and (not A266) );
a12457a <=( A265 and a12456a );
a12461a <=( (not A299) and (not A298) );
a12462a <=( A268 and a12461a );
a12463a <=( a12462a and a12457a );
a12467a <=( A199 and A166 );
a12468a <=( A168 and a12467a );
a12472a <=( A203 and A201 );
a12473a <=( (not A200) and a12472a );
a12474a <=( a12473a and a12468a );
a12478a <=( A267 and (not A266) );
a12479a <=( A265 and a12478a );
a12483a <=( (not A300) and A298 );
a12484a <=( A269 and a12483a );
a12485a <=( a12484a and a12479a );
a12489a <=( A199 and A166 );
a12490a <=( A168 and a12489a );
a12494a <=( A203 and A201 );
a12495a <=( (not A200) and a12494a );
a12496a <=( a12495a and a12490a );
a12500a <=( A267 and (not A266) );
a12501a <=( A265 and a12500a );
a12505a <=( A299 and A298 );
a12506a <=( A269 and a12505a );
a12507a <=( a12506a and a12501a );
a12511a <=( A199 and A166 );
a12512a <=( A168 and a12511a );
a12516a <=( A203 and A201 );
a12517a <=( (not A200) and a12516a );
a12518a <=( a12517a and a12512a );
a12522a <=( A267 and (not A266) );
a12523a <=( A265 and a12522a );
a12527a <=( (not A299) and (not A298) );
a12528a <=( A269 and a12527a );
a12529a <=( a12528a and a12523a );
a12533a <=( (not A200) and A167 );
a12534a <=( A168 and a12533a );
a12538a <=( (not A266) and (not A203) );
a12539a <=( (not A202) and a12538a );
a12540a <=( a12539a and a12534a );
a12544a <=( A298 and (not A269) );
a12545a <=( (not A268) and a12544a );
a12549a <=( A301 and A300 );
a12550a <=( (not A299) and a12549a );
a12551a <=( a12550a and a12545a );
a12555a <=( (not A200) and A167 );
a12556a <=( A168 and a12555a );
a12560a <=( (not A266) and (not A203) );
a12561a <=( (not A202) and a12560a );
a12562a <=( a12561a and a12556a );
a12566a <=( A298 and (not A269) );
a12567a <=( (not A268) and a12566a );
a12571a <=( A302 and A300 );
a12572a <=( (not A299) and a12571a );
a12573a <=( a12572a and a12567a );
a12577a <=( A199 and A167 );
a12578a <=( A168 and a12577a );
a12582a <=( A202 and A201 );
a12583a <=( (not A200) and a12582a );
a12584a <=( a12583a and a12578a );
a12588a <=( A267 and (not A266) );
a12589a <=( A265 and a12588a );
a12593a <=( (not A300) and A298 );
a12594a <=( A268 and a12593a );
a12595a <=( a12594a and a12589a );
a12599a <=( A199 and A167 );
a12600a <=( A168 and a12599a );
a12604a <=( A202 and A201 );
a12605a <=( (not A200) and a12604a );
a12606a <=( a12605a and a12600a );
a12610a <=( A267 and (not A266) );
a12611a <=( A265 and a12610a );
a12615a <=( A299 and A298 );
a12616a <=( A268 and a12615a );
a12617a <=( a12616a and a12611a );
a12621a <=( A199 and A167 );
a12622a <=( A168 and a12621a );
a12626a <=( A202 and A201 );
a12627a <=( (not A200) and a12626a );
a12628a <=( a12627a and a12622a );
a12632a <=( A267 and (not A266) );
a12633a <=( A265 and a12632a );
a12637a <=( (not A299) and (not A298) );
a12638a <=( A268 and a12637a );
a12639a <=( a12638a and a12633a );
a12643a <=( A199 and A167 );
a12644a <=( A168 and a12643a );
a12648a <=( A202 and A201 );
a12649a <=( (not A200) and a12648a );
a12650a <=( a12649a and a12644a );
a12654a <=( A267 and (not A266) );
a12655a <=( A265 and a12654a );
a12659a <=( (not A300) and A298 );
a12660a <=( A269 and a12659a );
a12661a <=( a12660a and a12655a );
a12665a <=( A199 and A167 );
a12666a <=( A168 and a12665a );
a12670a <=( A202 and A201 );
a12671a <=( (not A200) and a12670a );
a12672a <=( a12671a and a12666a );
a12676a <=( A267 and (not A266) );
a12677a <=( A265 and a12676a );
a12681a <=( A299 and A298 );
a12682a <=( A269 and a12681a );
a12683a <=( a12682a and a12677a );
a12687a <=( A199 and A167 );
a12688a <=( A168 and a12687a );
a12692a <=( A202 and A201 );
a12693a <=( (not A200) and a12692a );
a12694a <=( a12693a and a12688a );
a12698a <=( A267 and (not A266) );
a12699a <=( A265 and a12698a );
a12703a <=( (not A299) and (not A298) );
a12704a <=( A269 and a12703a );
a12705a <=( a12704a and a12699a );
a12709a <=( A199 and A167 );
a12710a <=( A168 and a12709a );
a12714a <=( A203 and A201 );
a12715a <=( (not A200) and a12714a );
a12716a <=( a12715a and a12710a );
a12720a <=( A267 and (not A266) );
a12721a <=( A265 and a12720a );
a12725a <=( (not A300) and A298 );
a12726a <=( A268 and a12725a );
a12727a <=( a12726a and a12721a );
a12731a <=( A199 and A167 );
a12732a <=( A168 and a12731a );
a12736a <=( A203 and A201 );
a12737a <=( (not A200) and a12736a );
a12738a <=( a12737a and a12732a );
a12742a <=( A267 and (not A266) );
a12743a <=( A265 and a12742a );
a12747a <=( A299 and A298 );
a12748a <=( A268 and a12747a );
a12749a <=( a12748a and a12743a );
a12753a <=( A199 and A167 );
a12754a <=( A168 and a12753a );
a12758a <=( A203 and A201 );
a12759a <=( (not A200) and a12758a );
a12760a <=( a12759a and a12754a );
a12764a <=( A267 and (not A266) );
a12765a <=( A265 and a12764a );
a12769a <=( (not A299) and (not A298) );
a12770a <=( A268 and a12769a );
a12771a <=( a12770a and a12765a );
a12775a <=( A199 and A167 );
a12776a <=( A168 and a12775a );
a12780a <=( A203 and A201 );
a12781a <=( (not A200) and a12780a );
a12782a <=( a12781a and a12776a );
a12786a <=( A267 and (not A266) );
a12787a <=( A265 and a12786a );
a12791a <=( (not A300) and A298 );
a12792a <=( A269 and a12791a );
a12793a <=( a12792a and a12787a );
a12797a <=( A199 and A167 );
a12798a <=( A168 and a12797a );
a12802a <=( A203 and A201 );
a12803a <=( (not A200) and a12802a );
a12804a <=( a12803a and a12798a );
a12808a <=( A267 and (not A266) );
a12809a <=( A265 and a12808a );
a12813a <=( A299 and A298 );
a12814a <=( A269 and a12813a );
a12815a <=( a12814a and a12809a );
a12819a <=( A199 and A167 );
a12820a <=( A168 and a12819a );
a12824a <=( A203 and A201 );
a12825a <=( (not A200) and a12824a );
a12826a <=( a12825a and a12820a );
a12830a <=( A267 and (not A266) );
a12831a <=( A265 and a12830a );
a12835a <=( (not A299) and (not A298) );
a12836a <=( A269 and a12835a );
a12837a <=( a12836a and a12831a );
a12841a <=( (not A166) and (not A167) );
a12842a <=( A170 and a12841a );
a12846a <=( A265 and A200 );
a12847a <=( A199 and a12846a );
a12848a <=( a12847a and a12842a );
a12852a <=( A268 and A267 );
a12853a <=( (not A266) and a12852a );
a12857a <=( (not A302) and (not A301) );
a12858a <=( A298 and a12857a );
a12859a <=( a12858a and a12853a );
a12863a <=( (not A166) and (not A167) );
a12864a <=( A170 and a12863a );
a12868a <=( A265 and A200 );
a12869a <=( A199 and a12868a );
a12870a <=( a12869a and a12864a );
a12874a <=( A269 and A267 );
a12875a <=( (not A266) and a12874a );
a12879a <=( (not A302) and (not A301) );
a12880a <=( A298 and a12879a );
a12881a <=( a12880a and a12875a );
a12885a <=( (not A166) and (not A167) );
a12886a <=( A170 and a12885a );
a12890a <=( (not A266) and A200 );
a12891a <=( (not A199) and a12890a );
a12892a <=( a12891a and a12886a );
a12896a <=( A298 and (not A269) );
a12897a <=( (not A268) and a12896a );
a12901a <=( A301 and A300 );
a12902a <=( (not A299) and a12901a );
a12903a <=( a12902a and a12897a );
a12907a <=( (not A166) and (not A167) );
a12908a <=( A170 and a12907a );
a12912a <=( (not A266) and A200 );
a12913a <=( (not A199) and a12912a );
a12914a <=( a12913a and a12908a );
a12918a <=( A298 and (not A269) );
a12919a <=( (not A268) and a12918a );
a12923a <=( A302 and A300 );
a12924a <=( (not A299) and a12923a );
a12925a <=( a12924a and a12919a );
a12929a <=( (not A166) and (not A167) );
a12930a <=( A170 and a12929a );
a12934a <=( (not A203) and (not A202) );
a12935a <=( (not A200) and a12934a );
a12936a <=( a12935a and a12930a );
a12940a <=( A267 and (not A266) );
a12941a <=( A265 and a12940a );
a12945a <=( (not A300) and A298 );
a12946a <=( A268 and a12945a );
a12947a <=( a12946a and a12941a );
a12951a <=( (not A166) and (not A167) );
a12952a <=( A170 and a12951a );
a12956a <=( (not A203) and (not A202) );
a12957a <=( (not A200) and a12956a );
a12958a <=( a12957a and a12952a );
a12962a <=( A267 and (not A266) );
a12963a <=( A265 and a12962a );
a12967a <=( A299 and A298 );
a12968a <=( A268 and a12967a );
a12969a <=( a12968a and a12963a );
a12973a <=( (not A166) and (not A167) );
a12974a <=( A170 and a12973a );
a12978a <=( (not A203) and (not A202) );
a12979a <=( (not A200) and a12978a );
a12980a <=( a12979a and a12974a );
a12984a <=( A267 and (not A266) );
a12985a <=( A265 and a12984a );
a12989a <=( (not A299) and (not A298) );
a12990a <=( A268 and a12989a );
a12991a <=( a12990a and a12985a );
a12995a <=( (not A166) and (not A167) );
a12996a <=( A170 and a12995a );
a13000a <=( (not A203) and (not A202) );
a13001a <=( (not A200) and a13000a );
a13002a <=( a13001a and a12996a );
a13006a <=( A267 and (not A266) );
a13007a <=( A265 and a13006a );
a13011a <=( (not A300) and A298 );
a13012a <=( A269 and a13011a );
a13013a <=( a13012a and a13007a );
a13017a <=( (not A166) and (not A167) );
a13018a <=( A170 and a13017a );
a13022a <=( (not A203) and (not A202) );
a13023a <=( (not A200) and a13022a );
a13024a <=( a13023a and a13018a );
a13028a <=( A267 and (not A266) );
a13029a <=( A265 and a13028a );
a13033a <=( A299 and A298 );
a13034a <=( A269 and a13033a );
a13035a <=( a13034a and a13029a );
a13039a <=( (not A166) and (not A167) );
a13040a <=( A170 and a13039a );
a13044a <=( (not A203) and (not A202) );
a13045a <=( (not A200) and a13044a );
a13046a <=( a13045a and a13040a );
a13050a <=( A267 and (not A266) );
a13051a <=( A265 and a13050a );
a13055a <=( (not A299) and (not A298) );
a13056a <=( A269 and a13055a );
a13057a <=( a13056a and a13051a );
a13061a <=( (not A166) and (not A167) );
a13062a <=( A170 and a13061a );
a13066a <=( A265 and (not A201) );
a13067a <=( (not A200) and a13066a );
a13068a <=( a13067a and a13062a );
a13072a <=( A268 and A267 );
a13073a <=( (not A266) and a13072a );
a13077a <=( (not A302) and (not A301) );
a13078a <=( A298 and a13077a );
a13079a <=( a13078a and a13073a );
a13083a <=( (not A166) and (not A167) );
a13084a <=( A170 and a13083a );
a13088a <=( A265 and (not A201) );
a13089a <=( (not A200) and a13088a );
a13090a <=( a13089a and a13084a );
a13094a <=( A269 and A267 );
a13095a <=( (not A266) and a13094a );
a13099a <=( (not A302) and (not A301) );
a13100a <=( A298 and a13099a );
a13101a <=( a13100a and a13095a );
a13105a <=( (not A166) and (not A167) );
a13106a <=( A170 and a13105a );
a13110a <=( A201 and (not A200) );
a13111a <=( A199 and a13110a );
a13112a <=( a13111a and a13106a );
a13116a <=( (not A268) and (not A266) );
a13117a <=( A202 and a13116a );
a13121a <=( A299 and (not A298) );
a13122a <=( (not A269) and a13121a );
a13123a <=( a13122a and a13117a );
a13127a <=( (not A166) and (not A167) );
a13128a <=( A170 and a13127a );
a13132a <=( A201 and (not A200) );
a13133a <=( A199 and a13132a );
a13134a <=( a13133a and a13128a );
a13138a <=( (not A268) and (not A266) );
a13139a <=( A203 and a13138a );
a13143a <=( A299 and (not A298) );
a13144a <=( (not A269) and a13143a );
a13145a <=( a13144a and a13139a );
a13149a <=( (not A166) and (not A167) );
a13150a <=( A170 and a13149a );
a13154a <=( A265 and (not A200) );
a13155a <=( (not A199) and a13154a );
a13156a <=( a13155a and a13150a );
a13160a <=( A268 and A267 );
a13161a <=( (not A266) and a13160a );
a13165a <=( (not A302) and (not A301) );
a13166a <=( A298 and a13165a );
a13167a <=( a13166a and a13161a );
a13171a <=( (not A166) and (not A167) );
a13172a <=( A170 and a13171a );
a13176a <=( A265 and (not A200) );
a13177a <=( (not A199) and a13176a );
a13178a <=( a13177a and a13172a );
a13182a <=( A269 and A267 );
a13183a <=( (not A266) and a13182a );
a13187a <=( (not A302) and (not A301) );
a13188a <=( A298 and a13187a );
a13189a <=( a13188a and a13183a );
a13193a <=( A167 and (not A168) );
a13194a <=( A169 and a13193a );
a13198a <=( A200 and A199 );
a13199a <=( (not A166) and a13198a );
a13200a <=( a13199a and a13194a );
a13204a <=( A267 and (not A266) );
a13205a <=( A265 and a13204a );
a13209a <=( (not A300) and A298 );
a13210a <=( A268 and a13209a );
a13211a <=( a13210a and a13205a );
a13215a <=( A167 and (not A168) );
a13216a <=( A169 and a13215a );
a13220a <=( A200 and A199 );
a13221a <=( (not A166) and a13220a );
a13222a <=( a13221a and a13216a );
a13226a <=( A267 and (not A266) );
a13227a <=( A265 and a13226a );
a13231a <=( A299 and A298 );
a13232a <=( A268 and a13231a );
a13233a <=( a13232a and a13227a );
a13237a <=( A167 and (not A168) );
a13238a <=( A169 and a13237a );
a13242a <=( A200 and A199 );
a13243a <=( (not A166) and a13242a );
a13244a <=( a13243a and a13238a );
a13248a <=( A267 and (not A266) );
a13249a <=( A265 and a13248a );
a13253a <=( (not A299) and (not A298) );
a13254a <=( A268 and a13253a );
a13255a <=( a13254a and a13249a );
a13259a <=( A167 and (not A168) );
a13260a <=( A169 and a13259a );
a13264a <=( A200 and A199 );
a13265a <=( (not A166) and a13264a );
a13266a <=( a13265a and a13260a );
a13270a <=( A267 and (not A266) );
a13271a <=( A265 and a13270a );
a13275a <=( (not A300) and A298 );
a13276a <=( A269 and a13275a );
a13277a <=( a13276a and a13271a );
a13281a <=( A167 and (not A168) );
a13282a <=( A169 and a13281a );
a13286a <=( A200 and A199 );
a13287a <=( (not A166) and a13286a );
a13288a <=( a13287a and a13282a );
a13292a <=( A267 and (not A266) );
a13293a <=( A265 and a13292a );
a13297a <=( A299 and A298 );
a13298a <=( A269 and a13297a );
a13299a <=( a13298a and a13293a );
a13303a <=( A167 and (not A168) );
a13304a <=( A169 and a13303a );
a13308a <=( A200 and A199 );
a13309a <=( (not A166) and a13308a );
a13310a <=( a13309a and a13304a );
a13314a <=( A267 and (not A266) );
a13315a <=( A265 and a13314a );
a13319a <=( (not A299) and (not A298) );
a13320a <=( A269 and a13319a );
a13321a <=( a13320a and a13315a );
a13325a <=( A167 and (not A168) );
a13326a <=( A169 and a13325a );
a13330a <=( A200 and (not A199) );
a13331a <=( (not A166) and a13330a );
a13332a <=( a13331a and a13326a );
a13336a <=( A298 and A266 );
a13337a <=( A265 and a13336a );
a13341a <=( A301 and A300 );
a13342a <=( (not A299) and a13341a );
a13343a <=( a13342a and a13337a );
a13347a <=( A167 and (not A168) );
a13348a <=( A169 and a13347a );
a13352a <=( A200 and (not A199) );
a13353a <=( (not A166) and a13352a );
a13354a <=( a13353a and a13348a );
a13358a <=( A298 and A266 );
a13359a <=( A265 and a13358a );
a13363a <=( A302 and A300 );
a13364a <=( (not A299) and a13363a );
a13365a <=( a13364a and a13359a );
a13369a <=( A167 and (not A168) );
a13370a <=( A169 and a13369a );
a13374a <=( A200 and (not A199) );
a13375a <=( (not A166) and a13374a );
a13376a <=( a13375a and a13370a );
a13380a <=( A298 and (not A267) );
a13381a <=( (not A266) and a13380a );
a13385a <=( A301 and A300 );
a13386a <=( (not A299) and a13385a );
a13387a <=( a13386a and a13381a );
a13391a <=( A167 and (not A168) );
a13392a <=( A169 and a13391a );
a13396a <=( A200 and (not A199) );
a13397a <=( (not A166) and a13396a );
a13398a <=( a13397a and a13392a );
a13402a <=( A298 and (not A267) );
a13403a <=( (not A266) and a13402a );
a13407a <=( A302 and A300 );
a13408a <=( (not A299) and a13407a );
a13409a <=( a13408a and a13403a );
a13413a <=( A167 and (not A168) );
a13414a <=( A169 and a13413a );
a13418a <=( A200 and (not A199) );
a13419a <=( (not A166) and a13418a );
a13420a <=( a13419a and a13414a );
a13424a <=( A298 and (not A266) );
a13425a <=( (not A265) and a13424a );
a13429a <=( A301 and A300 );
a13430a <=( (not A299) and a13429a );
a13431a <=( a13430a and a13425a );
a13435a <=( A167 and (not A168) );
a13436a <=( A169 and a13435a );
a13440a <=( A200 and (not A199) );
a13441a <=( (not A166) and a13440a );
a13442a <=( a13441a and a13436a );
a13446a <=( A298 and (not A266) );
a13447a <=( (not A265) and a13446a );
a13451a <=( A302 and A300 );
a13452a <=( (not A299) and a13451a );
a13453a <=( a13452a and a13447a );
a13457a <=( A167 and (not A168) );
a13458a <=( A169 and a13457a );
a13462a <=( (not A202) and (not A200) );
a13463a <=( (not A166) and a13462a );
a13464a <=( a13463a and a13458a );
a13468a <=( A266 and (not A265) );
a13469a <=( (not A203) and a13468a );
a13473a <=( (not A302) and (not A301) );
a13474a <=( A298 and a13473a );
a13475a <=( a13474a and a13469a );
a13479a <=( A167 and (not A168) );
a13480a <=( A169 and a13479a );
a13484a <=( (not A201) and (not A200) );
a13485a <=( (not A166) and a13484a );
a13486a <=( a13485a and a13480a );
a13490a <=( A267 and (not A266) );
a13491a <=( A265 and a13490a );
a13495a <=( (not A300) and A298 );
a13496a <=( A268 and a13495a );
a13497a <=( a13496a and a13491a );
a13501a <=( A167 and (not A168) );
a13502a <=( A169 and a13501a );
a13506a <=( (not A201) and (not A200) );
a13507a <=( (not A166) and a13506a );
a13508a <=( a13507a and a13502a );
a13512a <=( A267 and (not A266) );
a13513a <=( A265 and a13512a );
a13517a <=( A299 and A298 );
a13518a <=( A268 and a13517a );
a13519a <=( a13518a and a13513a );
a13523a <=( A167 and (not A168) );
a13524a <=( A169 and a13523a );
a13528a <=( (not A201) and (not A200) );
a13529a <=( (not A166) and a13528a );
a13530a <=( a13529a and a13524a );
a13534a <=( A267 and (not A266) );
a13535a <=( A265 and a13534a );
a13539a <=( (not A299) and (not A298) );
a13540a <=( A268 and a13539a );
a13541a <=( a13540a and a13535a );
a13545a <=( A167 and (not A168) );
a13546a <=( A169 and a13545a );
a13550a <=( (not A201) and (not A200) );
a13551a <=( (not A166) and a13550a );
a13552a <=( a13551a and a13546a );
a13556a <=( A267 and (not A266) );
a13557a <=( A265 and a13556a );
a13561a <=( (not A300) and A298 );
a13562a <=( A269 and a13561a );
a13563a <=( a13562a and a13557a );
a13567a <=( A167 and (not A168) );
a13568a <=( A169 and a13567a );
a13572a <=( (not A201) and (not A200) );
a13573a <=( (not A166) and a13572a );
a13574a <=( a13573a and a13568a );
a13578a <=( A267 and (not A266) );
a13579a <=( A265 and a13578a );
a13583a <=( A299 and A298 );
a13584a <=( A269 and a13583a );
a13585a <=( a13584a and a13579a );
a13589a <=( A167 and (not A168) );
a13590a <=( A169 and a13589a );
a13594a <=( (not A201) and (not A200) );
a13595a <=( (not A166) and a13594a );
a13596a <=( a13595a and a13590a );
a13600a <=( A267 and (not A266) );
a13601a <=( A265 and a13600a );
a13605a <=( (not A299) and (not A298) );
a13606a <=( A269 and a13605a );
a13607a <=( a13606a and a13601a );
a13611a <=( A167 and (not A168) );
a13612a <=( A169 and a13611a );
a13616a <=( (not A200) and A199 );
a13617a <=( (not A166) and a13616a );
a13618a <=( a13617a and a13612a );
a13622a <=( A265 and A202 );
a13623a <=( A201 and a13622a );
a13627a <=( A299 and (not A298) );
a13628a <=( A266 and a13627a );
a13629a <=( a13628a and a13623a );
a13633a <=( A167 and (not A168) );
a13634a <=( A169 and a13633a );
a13638a <=( (not A200) and A199 );
a13639a <=( (not A166) and a13638a );
a13640a <=( a13639a and a13634a );
a13644a <=( (not A266) and A202 );
a13645a <=( A201 and a13644a );
a13649a <=( A299 and (not A298) );
a13650a <=( (not A267) and a13649a );
a13651a <=( a13650a and a13645a );
a13655a <=( A167 and (not A168) );
a13656a <=( A169 and a13655a );
a13660a <=( (not A200) and A199 );
a13661a <=( (not A166) and a13660a );
a13662a <=( a13661a and a13656a );
a13666a <=( (not A265) and A202 );
a13667a <=( A201 and a13666a );
a13671a <=( A299 and (not A298) );
a13672a <=( (not A266) and a13671a );
a13673a <=( a13672a and a13667a );
a13677a <=( A167 and (not A168) );
a13678a <=( A169 and a13677a );
a13682a <=( (not A200) and A199 );
a13683a <=( (not A166) and a13682a );
a13684a <=( a13683a and a13678a );
a13688a <=( A265 and A203 );
a13689a <=( A201 and a13688a );
a13693a <=( A299 and (not A298) );
a13694a <=( A266 and a13693a );
a13695a <=( a13694a and a13689a );
a13699a <=( A167 and (not A168) );
a13700a <=( A169 and a13699a );
a13704a <=( (not A200) and A199 );
a13705a <=( (not A166) and a13704a );
a13706a <=( a13705a and a13700a );
a13710a <=( (not A266) and A203 );
a13711a <=( A201 and a13710a );
a13715a <=( A299 and (not A298) );
a13716a <=( (not A267) and a13715a );
a13717a <=( a13716a and a13711a );
a13721a <=( A167 and (not A168) );
a13722a <=( A169 and a13721a );
a13726a <=( (not A200) and A199 );
a13727a <=( (not A166) and a13726a );
a13728a <=( a13727a and a13722a );
a13732a <=( (not A265) and A203 );
a13733a <=( A201 and a13732a );
a13737a <=( A299 and (not A298) );
a13738a <=( (not A266) and a13737a );
a13739a <=( a13738a and a13733a );
a13743a <=( A167 and (not A168) );
a13744a <=( A169 and a13743a );
a13748a <=( (not A200) and (not A199) );
a13749a <=( (not A166) and a13748a );
a13750a <=( a13749a and a13744a );
a13754a <=( A267 and (not A266) );
a13755a <=( A265 and a13754a );
a13759a <=( (not A300) and A298 );
a13760a <=( A268 and a13759a );
a13761a <=( a13760a and a13755a );
a13765a <=( A167 and (not A168) );
a13766a <=( A169 and a13765a );
a13770a <=( (not A200) and (not A199) );
a13771a <=( (not A166) and a13770a );
a13772a <=( a13771a and a13766a );
a13776a <=( A267 and (not A266) );
a13777a <=( A265 and a13776a );
a13781a <=( A299 and A298 );
a13782a <=( A268 and a13781a );
a13783a <=( a13782a and a13777a );
a13787a <=( A167 and (not A168) );
a13788a <=( A169 and a13787a );
a13792a <=( (not A200) and (not A199) );
a13793a <=( (not A166) and a13792a );
a13794a <=( a13793a and a13788a );
a13798a <=( A267 and (not A266) );
a13799a <=( A265 and a13798a );
a13803a <=( (not A299) and (not A298) );
a13804a <=( A268 and a13803a );
a13805a <=( a13804a and a13799a );
a13809a <=( A167 and (not A168) );
a13810a <=( A169 and a13809a );
a13814a <=( (not A200) and (not A199) );
a13815a <=( (not A166) and a13814a );
a13816a <=( a13815a and a13810a );
a13820a <=( A267 and (not A266) );
a13821a <=( A265 and a13820a );
a13825a <=( (not A300) and A298 );
a13826a <=( A269 and a13825a );
a13827a <=( a13826a and a13821a );
a13831a <=( A167 and (not A168) );
a13832a <=( A169 and a13831a );
a13836a <=( (not A200) and (not A199) );
a13837a <=( (not A166) and a13836a );
a13838a <=( a13837a and a13832a );
a13842a <=( A267 and (not A266) );
a13843a <=( A265 and a13842a );
a13847a <=( A299 and A298 );
a13848a <=( A269 and a13847a );
a13849a <=( a13848a and a13843a );
a13853a <=( A167 and (not A168) );
a13854a <=( A169 and a13853a );
a13858a <=( (not A200) and (not A199) );
a13859a <=( (not A166) and a13858a );
a13860a <=( a13859a and a13854a );
a13864a <=( A267 and (not A266) );
a13865a <=( A265 and a13864a );
a13869a <=( (not A299) and (not A298) );
a13870a <=( A269 and a13869a );
a13871a <=( a13870a and a13865a );
a13875a <=( (not A167) and (not A168) );
a13876a <=( A169 and a13875a );
a13880a <=( A200 and A199 );
a13881a <=( A166 and a13880a );
a13882a <=( a13881a and a13876a );
a13886a <=( A267 and (not A266) );
a13887a <=( A265 and a13886a );
a13891a <=( (not A300) and A298 );
a13892a <=( A268 and a13891a );
a13893a <=( a13892a and a13887a );
a13897a <=( (not A167) and (not A168) );
a13898a <=( A169 and a13897a );
a13902a <=( A200 and A199 );
a13903a <=( A166 and a13902a );
a13904a <=( a13903a and a13898a );
a13908a <=( A267 and (not A266) );
a13909a <=( A265 and a13908a );
a13913a <=( A299 and A298 );
a13914a <=( A268 and a13913a );
a13915a <=( a13914a and a13909a );
a13919a <=( (not A167) and (not A168) );
a13920a <=( A169 and a13919a );
a13924a <=( A200 and A199 );
a13925a <=( A166 and a13924a );
a13926a <=( a13925a and a13920a );
a13930a <=( A267 and (not A266) );
a13931a <=( A265 and a13930a );
a13935a <=( (not A299) and (not A298) );
a13936a <=( A268 and a13935a );
a13937a <=( a13936a and a13931a );
a13941a <=( (not A167) and (not A168) );
a13942a <=( A169 and a13941a );
a13946a <=( A200 and A199 );
a13947a <=( A166 and a13946a );
a13948a <=( a13947a and a13942a );
a13952a <=( A267 and (not A266) );
a13953a <=( A265 and a13952a );
a13957a <=( (not A300) and A298 );
a13958a <=( A269 and a13957a );
a13959a <=( a13958a and a13953a );
a13963a <=( (not A167) and (not A168) );
a13964a <=( A169 and a13963a );
a13968a <=( A200 and A199 );
a13969a <=( A166 and a13968a );
a13970a <=( a13969a and a13964a );
a13974a <=( A267 and (not A266) );
a13975a <=( A265 and a13974a );
a13979a <=( A299 and A298 );
a13980a <=( A269 and a13979a );
a13981a <=( a13980a and a13975a );
a13985a <=( (not A167) and (not A168) );
a13986a <=( A169 and a13985a );
a13990a <=( A200 and A199 );
a13991a <=( A166 and a13990a );
a13992a <=( a13991a and a13986a );
a13996a <=( A267 and (not A266) );
a13997a <=( A265 and a13996a );
a14001a <=( (not A299) and (not A298) );
a14002a <=( A269 and a14001a );
a14003a <=( a14002a and a13997a );
a14007a <=( (not A167) and (not A168) );
a14008a <=( A169 and a14007a );
a14012a <=( A200 and (not A199) );
a14013a <=( A166 and a14012a );
a14014a <=( a14013a and a14008a );
a14018a <=( A298 and A266 );
a14019a <=( A265 and a14018a );
a14023a <=( A301 and A300 );
a14024a <=( (not A299) and a14023a );
a14025a <=( a14024a and a14019a );
a14029a <=( (not A167) and (not A168) );
a14030a <=( A169 and a14029a );
a14034a <=( A200 and (not A199) );
a14035a <=( A166 and a14034a );
a14036a <=( a14035a and a14030a );
a14040a <=( A298 and A266 );
a14041a <=( A265 and a14040a );
a14045a <=( A302 and A300 );
a14046a <=( (not A299) and a14045a );
a14047a <=( a14046a and a14041a );
a14051a <=( (not A167) and (not A168) );
a14052a <=( A169 and a14051a );
a14056a <=( A200 and (not A199) );
a14057a <=( A166 and a14056a );
a14058a <=( a14057a and a14052a );
a14062a <=( A298 and (not A267) );
a14063a <=( (not A266) and a14062a );
a14067a <=( A301 and A300 );
a14068a <=( (not A299) and a14067a );
a14069a <=( a14068a and a14063a );
a14073a <=( (not A167) and (not A168) );
a14074a <=( A169 and a14073a );
a14078a <=( A200 and (not A199) );
a14079a <=( A166 and a14078a );
a14080a <=( a14079a and a14074a );
a14084a <=( A298 and (not A267) );
a14085a <=( (not A266) and a14084a );
a14089a <=( A302 and A300 );
a14090a <=( (not A299) and a14089a );
a14091a <=( a14090a and a14085a );
a14095a <=( (not A167) and (not A168) );
a14096a <=( A169 and a14095a );
a14100a <=( A200 and (not A199) );
a14101a <=( A166 and a14100a );
a14102a <=( a14101a and a14096a );
a14106a <=( A298 and (not A266) );
a14107a <=( (not A265) and a14106a );
a14111a <=( A301 and A300 );
a14112a <=( (not A299) and a14111a );
a14113a <=( a14112a and a14107a );
a14117a <=( (not A167) and (not A168) );
a14118a <=( A169 and a14117a );
a14122a <=( A200 and (not A199) );
a14123a <=( A166 and a14122a );
a14124a <=( a14123a and a14118a );
a14128a <=( A298 and (not A266) );
a14129a <=( (not A265) and a14128a );
a14133a <=( A302 and A300 );
a14134a <=( (not A299) and a14133a );
a14135a <=( a14134a and a14129a );
a14139a <=( (not A167) and (not A168) );
a14140a <=( A169 and a14139a );
a14144a <=( (not A202) and (not A200) );
a14145a <=( A166 and a14144a );
a14146a <=( a14145a and a14140a );
a14150a <=( A266 and (not A265) );
a14151a <=( (not A203) and a14150a );
a14155a <=( (not A302) and (not A301) );
a14156a <=( A298 and a14155a );
a14157a <=( a14156a and a14151a );
a14161a <=( (not A167) and (not A168) );
a14162a <=( A169 and a14161a );
a14166a <=( (not A201) and (not A200) );
a14167a <=( A166 and a14166a );
a14168a <=( a14167a and a14162a );
a14172a <=( A267 and (not A266) );
a14173a <=( A265 and a14172a );
a14177a <=( (not A300) and A298 );
a14178a <=( A268 and a14177a );
a14179a <=( a14178a and a14173a );
a14183a <=( (not A167) and (not A168) );
a14184a <=( A169 and a14183a );
a14188a <=( (not A201) and (not A200) );
a14189a <=( A166 and a14188a );
a14190a <=( a14189a and a14184a );
a14194a <=( A267 and (not A266) );
a14195a <=( A265 and a14194a );
a14199a <=( A299 and A298 );
a14200a <=( A268 and a14199a );
a14201a <=( a14200a and a14195a );
a14205a <=( (not A167) and (not A168) );
a14206a <=( A169 and a14205a );
a14210a <=( (not A201) and (not A200) );
a14211a <=( A166 and a14210a );
a14212a <=( a14211a and a14206a );
a14216a <=( A267 and (not A266) );
a14217a <=( A265 and a14216a );
a14221a <=( (not A299) and (not A298) );
a14222a <=( A268 and a14221a );
a14223a <=( a14222a and a14217a );
a14227a <=( (not A167) and (not A168) );
a14228a <=( A169 and a14227a );
a14232a <=( (not A201) and (not A200) );
a14233a <=( A166 and a14232a );
a14234a <=( a14233a and a14228a );
a14238a <=( A267 and (not A266) );
a14239a <=( A265 and a14238a );
a14243a <=( (not A300) and A298 );
a14244a <=( A269 and a14243a );
a14245a <=( a14244a and a14239a );
a14249a <=( (not A167) and (not A168) );
a14250a <=( A169 and a14249a );
a14254a <=( (not A201) and (not A200) );
a14255a <=( A166 and a14254a );
a14256a <=( a14255a and a14250a );
a14260a <=( A267 and (not A266) );
a14261a <=( A265 and a14260a );
a14265a <=( A299 and A298 );
a14266a <=( A269 and a14265a );
a14267a <=( a14266a and a14261a );
a14271a <=( (not A167) and (not A168) );
a14272a <=( A169 and a14271a );
a14276a <=( (not A201) and (not A200) );
a14277a <=( A166 and a14276a );
a14278a <=( a14277a and a14272a );
a14282a <=( A267 and (not A266) );
a14283a <=( A265 and a14282a );
a14287a <=( (not A299) and (not A298) );
a14288a <=( A269 and a14287a );
a14289a <=( a14288a and a14283a );
a14293a <=( (not A167) and (not A168) );
a14294a <=( A169 and a14293a );
a14298a <=( (not A200) and A199 );
a14299a <=( A166 and a14298a );
a14300a <=( a14299a and a14294a );
a14304a <=( A265 and A202 );
a14305a <=( A201 and a14304a );
a14309a <=( A299 and (not A298) );
a14310a <=( A266 and a14309a );
a14311a <=( a14310a and a14305a );
a14315a <=( (not A167) and (not A168) );
a14316a <=( A169 and a14315a );
a14320a <=( (not A200) and A199 );
a14321a <=( A166 and a14320a );
a14322a <=( a14321a and a14316a );
a14326a <=( (not A266) and A202 );
a14327a <=( A201 and a14326a );
a14331a <=( A299 and (not A298) );
a14332a <=( (not A267) and a14331a );
a14333a <=( a14332a and a14327a );
a14337a <=( (not A167) and (not A168) );
a14338a <=( A169 and a14337a );
a14342a <=( (not A200) and A199 );
a14343a <=( A166 and a14342a );
a14344a <=( a14343a and a14338a );
a14348a <=( (not A265) and A202 );
a14349a <=( A201 and a14348a );
a14353a <=( A299 and (not A298) );
a14354a <=( (not A266) and a14353a );
a14355a <=( a14354a and a14349a );
a14359a <=( (not A167) and (not A168) );
a14360a <=( A169 and a14359a );
a14364a <=( (not A200) and A199 );
a14365a <=( A166 and a14364a );
a14366a <=( a14365a and a14360a );
a14370a <=( A265 and A203 );
a14371a <=( A201 and a14370a );
a14375a <=( A299 and (not A298) );
a14376a <=( A266 and a14375a );
a14377a <=( a14376a and a14371a );
a14381a <=( (not A167) and (not A168) );
a14382a <=( A169 and a14381a );
a14386a <=( (not A200) and A199 );
a14387a <=( A166 and a14386a );
a14388a <=( a14387a and a14382a );
a14392a <=( (not A266) and A203 );
a14393a <=( A201 and a14392a );
a14397a <=( A299 and (not A298) );
a14398a <=( (not A267) and a14397a );
a14399a <=( a14398a and a14393a );
a14403a <=( (not A167) and (not A168) );
a14404a <=( A169 and a14403a );
a14408a <=( (not A200) and A199 );
a14409a <=( A166 and a14408a );
a14410a <=( a14409a and a14404a );
a14414a <=( (not A265) and A203 );
a14415a <=( A201 and a14414a );
a14419a <=( A299 and (not A298) );
a14420a <=( (not A266) and a14419a );
a14421a <=( a14420a and a14415a );
a14425a <=( (not A167) and (not A168) );
a14426a <=( A169 and a14425a );
a14430a <=( (not A200) and (not A199) );
a14431a <=( A166 and a14430a );
a14432a <=( a14431a and a14426a );
a14436a <=( A267 and (not A266) );
a14437a <=( A265 and a14436a );
a14441a <=( (not A300) and A298 );
a14442a <=( A268 and a14441a );
a14443a <=( a14442a and a14437a );
a14447a <=( (not A167) and (not A168) );
a14448a <=( A169 and a14447a );
a14452a <=( (not A200) and (not A199) );
a14453a <=( A166 and a14452a );
a14454a <=( a14453a and a14448a );
a14458a <=( A267 and (not A266) );
a14459a <=( A265 and a14458a );
a14463a <=( A299 and A298 );
a14464a <=( A268 and a14463a );
a14465a <=( a14464a and a14459a );
a14469a <=( (not A167) and (not A168) );
a14470a <=( A169 and a14469a );
a14474a <=( (not A200) and (not A199) );
a14475a <=( A166 and a14474a );
a14476a <=( a14475a and a14470a );
a14480a <=( A267 and (not A266) );
a14481a <=( A265 and a14480a );
a14485a <=( (not A299) and (not A298) );
a14486a <=( A268 and a14485a );
a14487a <=( a14486a and a14481a );
a14491a <=( (not A167) and (not A168) );
a14492a <=( A169 and a14491a );
a14496a <=( (not A200) and (not A199) );
a14497a <=( A166 and a14496a );
a14498a <=( a14497a and a14492a );
a14502a <=( A267 and (not A266) );
a14503a <=( A265 and a14502a );
a14507a <=( (not A300) and A298 );
a14508a <=( A269 and a14507a );
a14509a <=( a14508a and a14503a );
a14513a <=( (not A167) and (not A168) );
a14514a <=( A169 and a14513a );
a14518a <=( (not A200) and (not A199) );
a14519a <=( A166 and a14518a );
a14520a <=( a14519a and a14514a );
a14524a <=( A267 and (not A266) );
a14525a <=( A265 and a14524a );
a14529a <=( A299 and A298 );
a14530a <=( A269 and a14529a );
a14531a <=( a14530a and a14525a );
a14535a <=( (not A167) and (not A168) );
a14536a <=( A169 and a14535a );
a14540a <=( (not A200) and (not A199) );
a14541a <=( A166 and a14540a );
a14542a <=( a14541a and a14536a );
a14546a <=( A267 and (not A266) );
a14547a <=( A265 and a14546a );
a14551a <=( (not A299) and (not A298) );
a14552a <=( A269 and a14551a );
a14553a <=( a14552a and a14547a );
a14557a <=( (not A168) and A169 );
a14558a <=( A170 and a14557a );
a14562a <=( A265 and A200 );
a14563a <=( A199 and a14562a );
a14564a <=( a14563a and a14558a );
a14568a <=( A268 and A267 );
a14569a <=( (not A266) and a14568a );
a14573a <=( (not A302) and (not A301) );
a14574a <=( A298 and a14573a );
a14575a <=( a14574a and a14569a );
a14579a <=( (not A168) and A169 );
a14580a <=( A170 and a14579a );
a14584a <=( A265 and A200 );
a14585a <=( A199 and a14584a );
a14586a <=( a14585a and a14580a );
a14590a <=( A269 and A267 );
a14591a <=( (not A266) and a14590a );
a14595a <=( (not A302) and (not A301) );
a14596a <=( A298 and a14595a );
a14597a <=( a14596a and a14591a );
a14601a <=( (not A168) and A169 );
a14602a <=( A170 and a14601a );
a14606a <=( (not A266) and A200 );
a14607a <=( (not A199) and a14606a );
a14608a <=( a14607a and a14602a );
a14612a <=( A298 and (not A269) );
a14613a <=( (not A268) and a14612a );
a14617a <=( A301 and A300 );
a14618a <=( (not A299) and a14617a );
a14619a <=( a14618a and a14613a );
a14623a <=( (not A168) and A169 );
a14624a <=( A170 and a14623a );
a14628a <=( (not A266) and A200 );
a14629a <=( (not A199) and a14628a );
a14630a <=( a14629a and a14624a );
a14634a <=( A298 and (not A269) );
a14635a <=( (not A268) and a14634a );
a14639a <=( A302 and A300 );
a14640a <=( (not A299) and a14639a );
a14641a <=( a14640a and a14635a );
a14645a <=( (not A168) and A169 );
a14646a <=( A170 and a14645a );
a14650a <=( (not A203) and (not A202) );
a14651a <=( (not A200) and a14650a );
a14652a <=( a14651a and a14646a );
a14656a <=( A267 and (not A266) );
a14657a <=( A265 and a14656a );
a14661a <=( (not A300) and A298 );
a14662a <=( A268 and a14661a );
a14663a <=( a14662a and a14657a );
a14667a <=( (not A168) and A169 );
a14668a <=( A170 and a14667a );
a14672a <=( (not A203) and (not A202) );
a14673a <=( (not A200) and a14672a );
a14674a <=( a14673a and a14668a );
a14678a <=( A267 and (not A266) );
a14679a <=( A265 and a14678a );
a14683a <=( A299 and A298 );
a14684a <=( A268 and a14683a );
a14685a <=( a14684a and a14679a );
a14689a <=( (not A168) and A169 );
a14690a <=( A170 and a14689a );
a14694a <=( (not A203) and (not A202) );
a14695a <=( (not A200) and a14694a );
a14696a <=( a14695a and a14690a );
a14700a <=( A267 and (not A266) );
a14701a <=( A265 and a14700a );
a14705a <=( (not A299) and (not A298) );
a14706a <=( A268 and a14705a );
a14707a <=( a14706a and a14701a );
a14711a <=( (not A168) and A169 );
a14712a <=( A170 and a14711a );
a14716a <=( (not A203) and (not A202) );
a14717a <=( (not A200) and a14716a );
a14718a <=( a14717a and a14712a );
a14722a <=( A267 and (not A266) );
a14723a <=( A265 and a14722a );
a14727a <=( (not A300) and A298 );
a14728a <=( A269 and a14727a );
a14729a <=( a14728a and a14723a );
a14733a <=( (not A168) and A169 );
a14734a <=( A170 and a14733a );
a14738a <=( (not A203) and (not A202) );
a14739a <=( (not A200) and a14738a );
a14740a <=( a14739a and a14734a );
a14744a <=( A267 and (not A266) );
a14745a <=( A265 and a14744a );
a14749a <=( A299 and A298 );
a14750a <=( A269 and a14749a );
a14751a <=( a14750a and a14745a );
a14755a <=( (not A168) and A169 );
a14756a <=( A170 and a14755a );
a14760a <=( (not A203) and (not A202) );
a14761a <=( (not A200) and a14760a );
a14762a <=( a14761a and a14756a );
a14766a <=( A267 and (not A266) );
a14767a <=( A265 and a14766a );
a14771a <=( (not A299) and (not A298) );
a14772a <=( A269 and a14771a );
a14773a <=( a14772a and a14767a );
a14777a <=( (not A168) and A169 );
a14778a <=( A170 and a14777a );
a14782a <=( A265 and (not A201) );
a14783a <=( (not A200) and a14782a );
a14784a <=( a14783a and a14778a );
a14788a <=( A268 and A267 );
a14789a <=( (not A266) and a14788a );
a14793a <=( (not A302) and (not A301) );
a14794a <=( A298 and a14793a );
a14795a <=( a14794a and a14789a );
a14799a <=( (not A168) and A169 );
a14800a <=( A170 and a14799a );
a14804a <=( A265 and (not A201) );
a14805a <=( (not A200) and a14804a );
a14806a <=( a14805a and a14800a );
a14810a <=( A269 and A267 );
a14811a <=( (not A266) and a14810a );
a14815a <=( (not A302) and (not A301) );
a14816a <=( A298 and a14815a );
a14817a <=( a14816a and a14811a );
a14821a <=( (not A168) and A169 );
a14822a <=( A170 and a14821a );
a14826a <=( A201 and (not A200) );
a14827a <=( A199 and a14826a );
a14828a <=( a14827a and a14822a );
a14832a <=( (not A268) and (not A266) );
a14833a <=( A202 and a14832a );
a14837a <=( A299 and (not A298) );
a14838a <=( (not A269) and a14837a );
a14839a <=( a14838a and a14833a );
a14843a <=( (not A168) and A169 );
a14844a <=( A170 and a14843a );
a14848a <=( A201 and (not A200) );
a14849a <=( A199 and a14848a );
a14850a <=( a14849a and a14844a );
a14854a <=( (not A268) and (not A266) );
a14855a <=( A203 and a14854a );
a14859a <=( A299 and (not A298) );
a14860a <=( (not A269) and a14859a );
a14861a <=( a14860a and a14855a );
a14865a <=( (not A168) and A169 );
a14866a <=( A170 and a14865a );
a14870a <=( A265 and (not A200) );
a14871a <=( (not A199) and a14870a );
a14872a <=( a14871a and a14866a );
a14876a <=( A268 and A267 );
a14877a <=( (not A266) and a14876a );
a14881a <=( (not A302) and (not A301) );
a14882a <=( A298 and a14881a );
a14883a <=( a14882a and a14877a );
a14887a <=( (not A168) and A169 );
a14888a <=( A170 and a14887a );
a14892a <=( A265 and (not A200) );
a14893a <=( (not A199) and a14892a );
a14894a <=( a14893a and a14888a );
a14898a <=( A269 and A267 );
a14899a <=( (not A266) and a14898a );
a14903a <=( (not A302) and (not A301) );
a14904a <=( A298 and a14903a );
a14905a <=( a14904a and a14899a );
a14909a <=( A167 and A169 );
a14910a <=( (not A170) and a14909a );
a14914a <=( A200 and A199 );
a14915a <=( A166 and a14914a );
a14916a <=( a14915a and a14910a );
a14920a <=( A298 and A266 );
a14921a <=( A265 and a14920a );
a14925a <=( A301 and A300 );
a14926a <=( (not A299) and a14925a );
a14927a <=( a14926a and a14921a );
a14931a <=( A167 and A169 );
a14932a <=( (not A170) and a14931a );
a14936a <=( A200 and A199 );
a14937a <=( A166 and a14936a );
a14938a <=( a14937a and a14932a );
a14942a <=( A298 and A266 );
a14943a <=( A265 and a14942a );
a14947a <=( A302 and A300 );
a14948a <=( (not A299) and a14947a );
a14949a <=( a14948a and a14943a );
a14953a <=( A167 and A169 );
a14954a <=( (not A170) and a14953a );
a14958a <=( A200 and A199 );
a14959a <=( A166 and a14958a );
a14960a <=( a14959a and a14954a );
a14964a <=( A298 and (not A267) );
a14965a <=( (not A266) and a14964a );
a14969a <=( A301 and A300 );
a14970a <=( (not A299) and a14969a );
a14971a <=( a14970a and a14965a );
a14975a <=( A167 and A169 );
a14976a <=( (not A170) and a14975a );
a14980a <=( A200 and A199 );
a14981a <=( A166 and a14980a );
a14982a <=( a14981a and a14976a );
a14986a <=( A298 and (not A267) );
a14987a <=( (not A266) and a14986a );
a14991a <=( A302 and A300 );
a14992a <=( (not A299) and a14991a );
a14993a <=( a14992a and a14987a );
a14997a <=( A167 and A169 );
a14998a <=( (not A170) and a14997a );
a15002a <=( A200 and A199 );
a15003a <=( A166 and a15002a );
a15004a <=( a15003a and a14998a );
a15008a <=( A298 and (not A266) );
a15009a <=( (not A265) and a15008a );
a15013a <=( A301 and A300 );
a15014a <=( (not A299) and a15013a );
a15015a <=( a15014a and a15009a );
a15019a <=( A167 and A169 );
a15020a <=( (not A170) and a15019a );
a15024a <=( A200 and A199 );
a15025a <=( A166 and a15024a );
a15026a <=( a15025a and a15020a );
a15030a <=( A298 and (not A266) );
a15031a <=( (not A265) and a15030a );
a15035a <=( A302 and A300 );
a15036a <=( (not A299) and a15035a );
a15037a <=( a15036a and a15031a );
a15041a <=( A167 and A169 );
a15042a <=( (not A170) and a15041a );
a15046a <=( A200 and (not A199) );
a15047a <=( A166 and a15046a );
a15048a <=( a15047a and a15042a );
a15052a <=( A267 and (not A266) );
a15053a <=( A265 and a15052a );
a15057a <=( (not A300) and A298 );
a15058a <=( A268 and a15057a );
a15059a <=( a15058a and a15053a );
a15063a <=( A167 and A169 );
a15064a <=( (not A170) and a15063a );
a15068a <=( A200 and (not A199) );
a15069a <=( A166 and a15068a );
a15070a <=( a15069a and a15064a );
a15074a <=( A267 and (not A266) );
a15075a <=( A265 and a15074a );
a15079a <=( A299 and A298 );
a15080a <=( A268 and a15079a );
a15081a <=( a15080a and a15075a );
a15085a <=( A167 and A169 );
a15086a <=( (not A170) and a15085a );
a15090a <=( A200 and (not A199) );
a15091a <=( A166 and a15090a );
a15092a <=( a15091a and a15086a );
a15096a <=( A267 and (not A266) );
a15097a <=( A265 and a15096a );
a15101a <=( (not A299) and (not A298) );
a15102a <=( A268 and a15101a );
a15103a <=( a15102a and a15097a );
a15107a <=( A167 and A169 );
a15108a <=( (not A170) and a15107a );
a15112a <=( A200 and (not A199) );
a15113a <=( A166 and a15112a );
a15114a <=( a15113a and a15108a );
a15118a <=( A267 and (not A266) );
a15119a <=( A265 and a15118a );
a15123a <=( (not A300) and A298 );
a15124a <=( A269 and a15123a );
a15125a <=( a15124a and a15119a );
a15129a <=( A167 and A169 );
a15130a <=( (not A170) and a15129a );
a15134a <=( A200 and (not A199) );
a15135a <=( A166 and a15134a );
a15136a <=( a15135a and a15130a );
a15140a <=( A267 and (not A266) );
a15141a <=( A265 and a15140a );
a15145a <=( A299 and A298 );
a15146a <=( A269 and a15145a );
a15147a <=( a15146a and a15141a );
a15151a <=( A167 and A169 );
a15152a <=( (not A170) and a15151a );
a15156a <=( A200 and (not A199) );
a15157a <=( A166 and a15156a );
a15158a <=( a15157a and a15152a );
a15162a <=( A267 and (not A266) );
a15163a <=( A265 and a15162a );
a15167a <=( (not A299) and (not A298) );
a15168a <=( A269 and a15167a );
a15169a <=( a15168a and a15163a );
a15173a <=( A167 and A169 );
a15174a <=( (not A170) and a15173a );
a15178a <=( (not A202) and (not A200) );
a15179a <=( A166 and a15178a );
a15180a <=( a15179a and a15174a );
a15184a <=( (not A268) and (not A266) );
a15185a <=( (not A203) and a15184a );
a15189a <=( A299 and (not A298) );
a15190a <=( (not A269) and a15189a );
a15191a <=( a15190a and a15185a );
a15195a <=( A167 and A169 );
a15196a <=( (not A170) and a15195a );
a15200a <=( (not A201) and (not A200) );
a15201a <=( A166 and a15200a );
a15202a <=( a15201a and a15196a );
a15206a <=( A298 and A266 );
a15207a <=( A265 and a15206a );
a15211a <=( A301 and A300 );
a15212a <=( (not A299) and a15211a );
a15213a <=( a15212a and a15207a );
a15217a <=( A167 and A169 );
a15218a <=( (not A170) and a15217a );
a15222a <=( (not A201) and (not A200) );
a15223a <=( A166 and a15222a );
a15224a <=( a15223a and a15218a );
a15228a <=( A298 and A266 );
a15229a <=( A265 and a15228a );
a15233a <=( A302 and A300 );
a15234a <=( (not A299) and a15233a );
a15235a <=( a15234a and a15229a );
a15239a <=( A167 and A169 );
a15240a <=( (not A170) and a15239a );
a15244a <=( (not A201) and (not A200) );
a15245a <=( A166 and a15244a );
a15246a <=( a15245a and a15240a );
a15250a <=( A298 and (not A267) );
a15251a <=( (not A266) and a15250a );
a15255a <=( A301 and A300 );
a15256a <=( (not A299) and a15255a );
a15257a <=( a15256a and a15251a );
a15261a <=( A167 and A169 );
a15262a <=( (not A170) and a15261a );
a15266a <=( (not A201) and (not A200) );
a15267a <=( A166 and a15266a );
a15268a <=( a15267a and a15262a );
a15272a <=( A298 and (not A267) );
a15273a <=( (not A266) and a15272a );
a15277a <=( A302 and A300 );
a15278a <=( (not A299) and a15277a );
a15279a <=( a15278a and a15273a );
a15283a <=( A167 and A169 );
a15284a <=( (not A170) and a15283a );
a15288a <=( (not A201) and (not A200) );
a15289a <=( A166 and a15288a );
a15290a <=( a15289a and a15284a );
a15294a <=( A298 and (not A266) );
a15295a <=( (not A265) and a15294a );
a15299a <=( A301 and A300 );
a15300a <=( (not A299) and a15299a );
a15301a <=( a15300a and a15295a );
a15305a <=( A167 and A169 );
a15306a <=( (not A170) and a15305a );
a15310a <=( (not A201) and (not A200) );
a15311a <=( A166 and a15310a );
a15312a <=( a15311a and a15306a );
a15316a <=( A298 and (not A266) );
a15317a <=( (not A265) and a15316a );
a15321a <=( A302 and A300 );
a15322a <=( (not A299) and a15321a );
a15323a <=( a15322a and a15317a );
a15327a <=( A167 and A169 );
a15328a <=( (not A170) and a15327a );
a15332a <=( (not A200) and A199 );
a15333a <=( A166 and a15332a );
a15334a <=( a15333a and a15328a );
a15338a <=( (not A265) and A202 );
a15339a <=( A201 and a15338a );
a15343a <=( (not A300) and A298 );
a15344a <=( A266 and a15343a );
a15345a <=( a15344a and a15339a );
a15349a <=( A167 and A169 );
a15350a <=( (not A170) and a15349a );
a15354a <=( (not A200) and A199 );
a15355a <=( A166 and a15354a );
a15356a <=( a15355a and a15350a );
a15360a <=( (not A265) and A202 );
a15361a <=( A201 and a15360a );
a15365a <=( A299 and A298 );
a15366a <=( A266 and a15365a );
a15367a <=( a15366a and a15361a );
a15371a <=( A167 and A169 );
a15372a <=( (not A170) and a15371a );
a15376a <=( (not A200) and A199 );
a15377a <=( A166 and a15376a );
a15378a <=( a15377a and a15372a );
a15382a <=( (not A265) and A202 );
a15383a <=( A201 and a15382a );
a15387a <=( (not A299) and (not A298) );
a15388a <=( A266 and a15387a );
a15389a <=( a15388a and a15383a );
a15393a <=( A167 and A169 );
a15394a <=( (not A170) and a15393a );
a15398a <=( (not A200) and A199 );
a15399a <=( A166 and a15398a );
a15400a <=( a15399a and a15394a );
a15404a <=( (not A265) and A203 );
a15405a <=( A201 and a15404a );
a15409a <=( (not A300) and A298 );
a15410a <=( A266 and a15409a );
a15411a <=( a15410a and a15405a );
a15415a <=( A167 and A169 );
a15416a <=( (not A170) and a15415a );
a15420a <=( (not A200) and A199 );
a15421a <=( A166 and a15420a );
a15422a <=( a15421a and a15416a );
a15426a <=( (not A265) and A203 );
a15427a <=( A201 and a15426a );
a15431a <=( A299 and A298 );
a15432a <=( A266 and a15431a );
a15433a <=( a15432a and a15427a );
a15437a <=( A167 and A169 );
a15438a <=( (not A170) and a15437a );
a15442a <=( (not A200) and A199 );
a15443a <=( A166 and a15442a );
a15444a <=( a15443a and a15438a );
a15448a <=( (not A265) and A203 );
a15449a <=( A201 and a15448a );
a15453a <=( (not A299) and (not A298) );
a15454a <=( A266 and a15453a );
a15455a <=( a15454a and a15449a );
a15459a <=( A167 and A169 );
a15460a <=( (not A170) and a15459a );
a15464a <=( (not A200) and (not A199) );
a15465a <=( A166 and a15464a );
a15466a <=( a15465a and a15460a );
a15470a <=( A298 and A266 );
a15471a <=( A265 and a15470a );
a15475a <=( A301 and A300 );
a15476a <=( (not A299) and a15475a );
a15477a <=( a15476a and a15471a );
a15481a <=( A167 and A169 );
a15482a <=( (not A170) and a15481a );
a15486a <=( (not A200) and (not A199) );
a15487a <=( A166 and a15486a );
a15488a <=( a15487a and a15482a );
a15492a <=( A298 and A266 );
a15493a <=( A265 and a15492a );
a15497a <=( A302 and A300 );
a15498a <=( (not A299) and a15497a );
a15499a <=( a15498a and a15493a );
a15503a <=( A167 and A169 );
a15504a <=( (not A170) and a15503a );
a15508a <=( (not A200) and (not A199) );
a15509a <=( A166 and a15508a );
a15510a <=( a15509a and a15504a );
a15514a <=( A298 and (not A267) );
a15515a <=( (not A266) and a15514a );
a15519a <=( A301 and A300 );
a15520a <=( (not A299) and a15519a );
a15521a <=( a15520a and a15515a );
a15525a <=( A167 and A169 );
a15526a <=( (not A170) and a15525a );
a15530a <=( (not A200) and (not A199) );
a15531a <=( A166 and a15530a );
a15532a <=( a15531a and a15526a );
a15536a <=( A298 and (not A267) );
a15537a <=( (not A266) and a15536a );
a15541a <=( A302 and A300 );
a15542a <=( (not A299) and a15541a );
a15543a <=( a15542a and a15537a );
a15547a <=( A167 and A169 );
a15548a <=( (not A170) and a15547a );
a15552a <=( (not A200) and (not A199) );
a15553a <=( A166 and a15552a );
a15554a <=( a15553a and a15548a );
a15558a <=( A298 and (not A266) );
a15559a <=( (not A265) and a15558a );
a15563a <=( A301 and A300 );
a15564a <=( (not A299) and a15563a );
a15565a <=( a15564a and a15559a );
a15569a <=( A167 and A169 );
a15570a <=( (not A170) and a15569a );
a15574a <=( (not A200) and (not A199) );
a15575a <=( A166 and a15574a );
a15576a <=( a15575a and a15570a );
a15580a <=( A298 and (not A266) );
a15581a <=( (not A265) and a15580a );
a15585a <=( A302 and A300 );
a15586a <=( (not A299) and a15585a );
a15587a <=( a15586a and a15581a );
a15591a <=( (not A167) and A169 );
a15592a <=( (not A170) and a15591a );
a15596a <=( A200 and A199 );
a15597a <=( (not A166) and a15596a );
a15598a <=( a15597a and a15592a );
a15602a <=( A298 and A266 );
a15603a <=( A265 and a15602a );
a15607a <=( A301 and A300 );
a15608a <=( (not A299) and a15607a );
a15609a <=( a15608a and a15603a );
a15613a <=( (not A167) and A169 );
a15614a <=( (not A170) and a15613a );
a15618a <=( A200 and A199 );
a15619a <=( (not A166) and a15618a );
a15620a <=( a15619a and a15614a );
a15624a <=( A298 and A266 );
a15625a <=( A265 and a15624a );
a15629a <=( A302 and A300 );
a15630a <=( (not A299) and a15629a );
a15631a <=( a15630a and a15625a );
a15635a <=( (not A167) and A169 );
a15636a <=( (not A170) and a15635a );
a15640a <=( A200 and A199 );
a15641a <=( (not A166) and a15640a );
a15642a <=( a15641a and a15636a );
a15646a <=( A298 and (not A267) );
a15647a <=( (not A266) and a15646a );
a15651a <=( A301 and A300 );
a15652a <=( (not A299) and a15651a );
a15653a <=( a15652a and a15647a );
a15657a <=( (not A167) and A169 );
a15658a <=( (not A170) and a15657a );
a15662a <=( A200 and A199 );
a15663a <=( (not A166) and a15662a );
a15664a <=( a15663a and a15658a );
a15668a <=( A298 and (not A267) );
a15669a <=( (not A266) and a15668a );
a15673a <=( A302 and A300 );
a15674a <=( (not A299) and a15673a );
a15675a <=( a15674a and a15669a );
a15679a <=( (not A167) and A169 );
a15680a <=( (not A170) and a15679a );
a15684a <=( A200 and A199 );
a15685a <=( (not A166) and a15684a );
a15686a <=( a15685a and a15680a );
a15690a <=( A298 and (not A266) );
a15691a <=( (not A265) and a15690a );
a15695a <=( A301 and A300 );
a15696a <=( (not A299) and a15695a );
a15697a <=( a15696a and a15691a );
a15701a <=( (not A167) and A169 );
a15702a <=( (not A170) and a15701a );
a15706a <=( A200 and A199 );
a15707a <=( (not A166) and a15706a );
a15708a <=( a15707a and a15702a );
a15712a <=( A298 and (not A266) );
a15713a <=( (not A265) and a15712a );
a15717a <=( A302 and A300 );
a15718a <=( (not A299) and a15717a );
a15719a <=( a15718a and a15713a );
a15723a <=( (not A167) and A169 );
a15724a <=( (not A170) and a15723a );
a15728a <=( A200 and (not A199) );
a15729a <=( (not A166) and a15728a );
a15730a <=( a15729a and a15724a );
a15734a <=( A267 and (not A266) );
a15735a <=( A265 and a15734a );
a15739a <=( (not A300) and A298 );
a15740a <=( A268 and a15739a );
a15741a <=( a15740a and a15735a );
a15745a <=( (not A167) and A169 );
a15746a <=( (not A170) and a15745a );
a15750a <=( A200 and (not A199) );
a15751a <=( (not A166) and a15750a );
a15752a <=( a15751a and a15746a );
a15756a <=( A267 and (not A266) );
a15757a <=( A265 and a15756a );
a15761a <=( A299 and A298 );
a15762a <=( A268 and a15761a );
a15763a <=( a15762a and a15757a );
a15767a <=( (not A167) and A169 );
a15768a <=( (not A170) and a15767a );
a15772a <=( A200 and (not A199) );
a15773a <=( (not A166) and a15772a );
a15774a <=( a15773a and a15768a );
a15778a <=( A267 and (not A266) );
a15779a <=( A265 and a15778a );
a15783a <=( (not A299) and (not A298) );
a15784a <=( A268 and a15783a );
a15785a <=( a15784a and a15779a );
a15789a <=( (not A167) and A169 );
a15790a <=( (not A170) and a15789a );
a15794a <=( A200 and (not A199) );
a15795a <=( (not A166) and a15794a );
a15796a <=( a15795a and a15790a );
a15800a <=( A267 and (not A266) );
a15801a <=( A265 and a15800a );
a15805a <=( (not A300) and A298 );
a15806a <=( A269 and a15805a );
a15807a <=( a15806a and a15801a );
a15811a <=( (not A167) and A169 );
a15812a <=( (not A170) and a15811a );
a15816a <=( A200 and (not A199) );
a15817a <=( (not A166) and a15816a );
a15818a <=( a15817a and a15812a );
a15822a <=( A267 and (not A266) );
a15823a <=( A265 and a15822a );
a15827a <=( A299 and A298 );
a15828a <=( A269 and a15827a );
a15829a <=( a15828a and a15823a );
a15833a <=( (not A167) and A169 );
a15834a <=( (not A170) and a15833a );
a15838a <=( A200 and (not A199) );
a15839a <=( (not A166) and a15838a );
a15840a <=( a15839a and a15834a );
a15844a <=( A267 and (not A266) );
a15845a <=( A265 and a15844a );
a15849a <=( (not A299) and (not A298) );
a15850a <=( A269 and a15849a );
a15851a <=( a15850a and a15845a );
a15855a <=( (not A167) and A169 );
a15856a <=( (not A170) and a15855a );
a15860a <=( (not A202) and (not A200) );
a15861a <=( (not A166) and a15860a );
a15862a <=( a15861a and a15856a );
a15866a <=( (not A268) and (not A266) );
a15867a <=( (not A203) and a15866a );
a15871a <=( A299 and (not A298) );
a15872a <=( (not A269) and a15871a );
a15873a <=( a15872a and a15867a );
a15877a <=( (not A167) and A169 );
a15878a <=( (not A170) and a15877a );
a15882a <=( (not A201) and (not A200) );
a15883a <=( (not A166) and a15882a );
a15884a <=( a15883a and a15878a );
a15888a <=( A298 and A266 );
a15889a <=( A265 and a15888a );
a15893a <=( A301 and A300 );
a15894a <=( (not A299) and a15893a );
a15895a <=( a15894a and a15889a );
a15899a <=( (not A167) and A169 );
a15900a <=( (not A170) and a15899a );
a15904a <=( (not A201) and (not A200) );
a15905a <=( (not A166) and a15904a );
a15906a <=( a15905a and a15900a );
a15910a <=( A298 and A266 );
a15911a <=( A265 and a15910a );
a15915a <=( A302 and A300 );
a15916a <=( (not A299) and a15915a );
a15917a <=( a15916a and a15911a );
a15921a <=( (not A167) and A169 );
a15922a <=( (not A170) and a15921a );
a15926a <=( (not A201) and (not A200) );
a15927a <=( (not A166) and a15926a );
a15928a <=( a15927a and a15922a );
a15932a <=( A298 and (not A267) );
a15933a <=( (not A266) and a15932a );
a15937a <=( A301 and A300 );
a15938a <=( (not A299) and a15937a );
a15939a <=( a15938a and a15933a );
a15943a <=( (not A167) and A169 );
a15944a <=( (not A170) and a15943a );
a15948a <=( (not A201) and (not A200) );
a15949a <=( (not A166) and a15948a );
a15950a <=( a15949a and a15944a );
a15954a <=( A298 and (not A267) );
a15955a <=( (not A266) and a15954a );
a15959a <=( A302 and A300 );
a15960a <=( (not A299) and a15959a );
a15961a <=( a15960a and a15955a );
a15965a <=( (not A167) and A169 );
a15966a <=( (not A170) and a15965a );
a15970a <=( (not A201) and (not A200) );
a15971a <=( (not A166) and a15970a );
a15972a <=( a15971a and a15966a );
a15976a <=( A298 and (not A266) );
a15977a <=( (not A265) and a15976a );
a15981a <=( A301 and A300 );
a15982a <=( (not A299) and a15981a );
a15983a <=( a15982a and a15977a );
a15987a <=( (not A167) and A169 );
a15988a <=( (not A170) and a15987a );
a15992a <=( (not A201) and (not A200) );
a15993a <=( (not A166) and a15992a );
a15994a <=( a15993a and a15988a );
a15998a <=( A298 and (not A266) );
a15999a <=( (not A265) and a15998a );
a16003a <=( A302 and A300 );
a16004a <=( (not A299) and a16003a );
a16005a <=( a16004a and a15999a );
a16009a <=( (not A167) and A169 );
a16010a <=( (not A170) and a16009a );
a16014a <=( (not A200) and A199 );
a16015a <=( (not A166) and a16014a );
a16016a <=( a16015a and a16010a );
a16020a <=( (not A265) and A202 );
a16021a <=( A201 and a16020a );
a16025a <=( (not A300) and A298 );
a16026a <=( A266 and a16025a );
a16027a <=( a16026a and a16021a );
a16031a <=( (not A167) and A169 );
a16032a <=( (not A170) and a16031a );
a16036a <=( (not A200) and A199 );
a16037a <=( (not A166) and a16036a );
a16038a <=( a16037a and a16032a );
a16042a <=( (not A265) and A202 );
a16043a <=( A201 and a16042a );
a16047a <=( A299 and A298 );
a16048a <=( A266 and a16047a );
a16049a <=( a16048a and a16043a );
a16053a <=( (not A167) and A169 );
a16054a <=( (not A170) and a16053a );
a16058a <=( (not A200) and A199 );
a16059a <=( (not A166) and a16058a );
a16060a <=( a16059a and a16054a );
a16064a <=( (not A265) and A202 );
a16065a <=( A201 and a16064a );
a16069a <=( (not A299) and (not A298) );
a16070a <=( A266 and a16069a );
a16071a <=( a16070a and a16065a );
a16075a <=( (not A167) and A169 );
a16076a <=( (not A170) and a16075a );
a16080a <=( (not A200) and A199 );
a16081a <=( (not A166) and a16080a );
a16082a <=( a16081a and a16076a );
a16086a <=( (not A265) and A203 );
a16087a <=( A201 and a16086a );
a16091a <=( (not A300) and A298 );
a16092a <=( A266 and a16091a );
a16093a <=( a16092a and a16087a );
a16097a <=( (not A167) and A169 );
a16098a <=( (not A170) and a16097a );
a16102a <=( (not A200) and A199 );
a16103a <=( (not A166) and a16102a );
a16104a <=( a16103a and a16098a );
a16108a <=( (not A265) and A203 );
a16109a <=( A201 and a16108a );
a16113a <=( A299 and A298 );
a16114a <=( A266 and a16113a );
a16115a <=( a16114a and a16109a );
a16119a <=( (not A167) and A169 );
a16120a <=( (not A170) and a16119a );
a16124a <=( (not A200) and A199 );
a16125a <=( (not A166) and a16124a );
a16126a <=( a16125a and a16120a );
a16130a <=( (not A265) and A203 );
a16131a <=( A201 and a16130a );
a16135a <=( (not A299) and (not A298) );
a16136a <=( A266 and a16135a );
a16137a <=( a16136a and a16131a );
a16141a <=( (not A167) and A169 );
a16142a <=( (not A170) and a16141a );
a16146a <=( (not A200) and (not A199) );
a16147a <=( (not A166) and a16146a );
a16148a <=( a16147a and a16142a );
a16152a <=( A298 and A266 );
a16153a <=( A265 and a16152a );
a16157a <=( A301 and A300 );
a16158a <=( (not A299) and a16157a );
a16159a <=( a16158a and a16153a );
a16163a <=( (not A167) and A169 );
a16164a <=( (not A170) and a16163a );
a16168a <=( (not A200) and (not A199) );
a16169a <=( (not A166) and a16168a );
a16170a <=( a16169a and a16164a );
a16174a <=( A298 and A266 );
a16175a <=( A265 and a16174a );
a16179a <=( A302 and A300 );
a16180a <=( (not A299) and a16179a );
a16181a <=( a16180a and a16175a );
a16185a <=( (not A167) and A169 );
a16186a <=( (not A170) and a16185a );
a16190a <=( (not A200) and (not A199) );
a16191a <=( (not A166) and a16190a );
a16192a <=( a16191a and a16186a );
a16196a <=( A298 and (not A267) );
a16197a <=( (not A266) and a16196a );
a16201a <=( A301 and A300 );
a16202a <=( (not A299) and a16201a );
a16203a <=( a16202a and a16197a );
a16207a <=( (not A167) and A169 );
a16208a <=( (not A170) and a16207a );
a16212a <=( (not A200) and (not A199) );
a16213a <=( (not A166) and a16212a );
a16214a <=( a16213a and a16208a );
a16218a <=( A298 and (not A267) );
a16219a <=( (not A266) and a16218a );
a16223a <=( A302 and A300 );
a16224a <=( (not A299) and a16223a );
a16225a <=( a16224a and a16219a );
a16229a <=( (not A167) and A169 );
a16230a <=( (not A170) and a16229a );
a16234a <=( (not A200) and (not A199) );
a16235a <=( (not A166) and a16234a );
a16236a <=( a16235a and a16230a );
a16240a <=( A298 and (not A266) );
a16241a <=( (not A265) and a16240a );
a16245a <=( A301 and A300 );
a16246a <=( (not A299) and a16245a );
a16247a <=( a16246a and a16241a );
a16251a <=( (not A167) and A169 );
a16252a <=( (not A170) and a16251a );
a16256a <=( (not A200) and (not A199) );
a16257a <=( (not A166) and a16256a );
a16258a <=( a16257a and a16252a );
a16262a <=( A298 and (not A266) );
a16263a <=( (not A265) and a16262a );
a16267a <=( A302 and A300 );
a16268a <=( (not A299) and a16267a );
a16269a <=( a16268a and a16263a );
a16273a <=( (not A166) and (not A167) );
a16274a <=( (not A169) and a16273a );
a16278a <=( A265 and A200 );
a16279a <=( A199 and a16278a );
a16280a <=( a16279a and a16274a );
a16284a <=( A268 and A267 );
a16285a <=( (not A266) and a16284a );
a16289a <=( (not A302) and (not A301) );
a16290a <=( A298 and a16289a );
a16291a <=( a16290a and a16285a );
a16295a <=( (not A166) and (not A167) );
a16296a <=( (not A169) and a16295a );
a16300a <=( A265 and A200 );
a16301a <=( A199 and a16300a );
a16302a <=( a16301a and a16296a );
a16306a <=( A269 and A267 );
a16307a <=( (not A266) and a16306a );
a16311a <=( (not A302) and (not A301) );
a16312a <=( A298 and a16311a );
a16313a <=( a16312a and a16307a );
a16317a <=( (not A166) and (not A167) );
a16318a <=( (not A169) and a16317a );
a16322a <=( (not A266) and A200 );
a16323a <=( (not A199) and a16322a );
a16324a <=( a16323a and a16318a );
a16328a <=( A298 and (not A269) );
a16329a <=( (not A268) and a16328a );
a16333a <=( A301 and A300 );
a16334a <=( (not A299) and a16333a );
a16335a <=( a16334a and a16329a );
a16339a <=( (not A166) and (not A167) );
a16340a <=( (not A169) and a16339a );
a16344a <=( (not A266) and A200 );
a16345a <=( (not A199) and a16344a );
a16346a <=( a16345a and a16340a );
a16350a <=( A298 and (not A269) );
a16351a <=( (not A268) and a16350a );
a16355a <=( A302 and A300 );
a16356a <=( (not A299) and a16355a );
a16357a <=( a16356a and a16351a );
a16361a <=( (not A166) and (not A167) );
a16362a <=( (not A169) and a16361a );
a16366a <=( (not A203) and (not A202) );
a16367a <=( (not A200) and a16366a );
a16368a <=( a16367a and a16362a );
a16372a <=( A267 and (not A266) );
a16373a <=( A265 and a16372a );
a16377a <=( (not A300) and A298 );
a16378a <=( A268 and a16377a );
a16379a <=( a16378a and a16373a );
a16383a <=( (not A166) and (not A167) );
a16384a <=( (not A169) and a16383a );
a16388a <=( (not A203) and (not A202) );
a16389a <=( (not A200) and a16388a );
a16390a <=( a16389a and a16384a );
a16394a <=( A267 and (not A266) );
a16395a <=( A265 and a16394a );
a16399a <=( A299 and A298 );
a16400a <=( A268 and a16399a );
a16401a <=( a16400a and a16395a );
a16405a <=( (not A166) and (not A167) );
a16406a <=( (not A169) and a16405a );
a16410a <=( (not A203) and (not A202) );
a16411a <=( (not A200) and a16410a );
a16412a <=( a16411a and a16406a );
a16416a <=( A267 and (not A266) );
a16417a <=( A265 and a16416a );
a16421a <=( (not A299) and (not A298) );
a16422a <=( A268 and a16421a );
a16423a <=( a16422a and a16417a );
a16427a <=( (not A166) and (not A167) );
a16428a <=( (not A169) and a16427a );
a16432a <=( (not A203) and (not A202) );
a16433a <=( (not A200) and a16432a );
a16434a <=( a16433a and a16428a );
a16438a <=( A267 and (not A266) );
a16439a <=( A265 and a16438a );
a16443a <=( (not A300) and A298 );
a16444a <=( A269 and a16443a );
a16445a <=( a16444a and a16439a );
a16449a <=( (not A166) and (not A167) );
a16450a <=( (not A169) and a16449a );
a16454a <=( (not A203) and (not A202) );
a16455a <=( (not A200) and a16454a );
a16456a <=( a16455a and a16450a );
a16460a <=( A267 and (not A266) );
a16461a <=( A265 and a16460a );
a16465a <=( A299 and A298 );
a16466a <=( A269 and a16465a );
a16467a <=( a16466a and a16461a );
a16471a <=( (not A166) and (not A167) );
a16472a <=( (not A169) and a16471a );
a16476a <=( (not A203) and (not A202) );
a16477a <=( (not A200) and a16476a );
a16478a <=( a16477a and a16472a );
a16482a <=( A267 and (not A266) );
a16483a <=( A265 and a16482a );
a16487a <=( (not A299) and (not A298) );
a16488a <=( A269 and a16487a );
a16489a <=( a16488a and a16483a );
a16493a <=( (not A166) and (not A167) );
a16494a <=( (not A169) and a16493a );
a16498a <=( A265 and (not A201) );
a16499a <=( (not A200) and a16498a );
a16500a <=( a16499a and a16494a );
a16504a <=( A268 and A267 );
a16505a <=( (not A266) and a16504a );
a16509a <=( (not A302) and (not A301) );
a16510a <=( A298 and a16509a );
a16511a <=( a16510a and a16505a );
a16515a <=( (not A166) and (not A167) );
a16516a <=( (not A169) and a16515a );
a16520a <=( A265 and (not A201) );
a16521a <=( (not A200) and a16520a );
a16522a <=( a16521a and a16516a );
a16526a <=( A269 and A267 );
a16527a <=( (not A266) and a16526a );
a16531a <=( (not A302) and (not A301) );
a16532a <=( A298 and a16531a );
a16533a <=( a16532a and a16527a );
a16537a <=( (not A166) and (not A167) );
a16538a <=( (not A169) and a16537a );
a16542a <=( A201 and (not A200) );
a16543a <=( A199 and a16542a );
a16544a <=( a16543a and a16538a );
a16548a <=( (not A268) and (not A266) );
a16549a <=( A202 and a16548a );
a16553a <=( A299 and (not A298) );
a16554a <=( (not A269) and a16553a );
a16555a <=( a16554a and a16549a );
a16559a <=( (not A166) and (not A167) );
a16560a <=( (not A169) and a16559a );
a16564a <=( A201 and (not A200) );
a16565a <=( A199 and a16564a );
a16566a <=( a16565a and a16560a );
a16570a <=( (not A268) and (not A266) );
a16571a <=( A203 and a16570a );
a16575a <=( A299 and (not A298) );
a16576a <=( (not A269) and a16575a );
a16577a <=( a16576a and a16571a );
a16581a <=( (not A166) and (not A167) );
a16582a <=( (not A169) and a16581a );
a16586a <=( A265 and (not A200) );
a16587a <=( (not A199) and a16586a );
a16588a <=( a16587a and a16582a );
a16592a <=( A268 and A267 );
a16593a <=( (not A266) and a16592a );
a16597a <=( (not A302) and (not A301) );
a16598a <=( A298 and a16597a );
a16599a <=( a16598a and a16593a );
a16603a <=( (not A166) and (not A167) );
a16604a <=( (not A169) and a16603a );
a16608a <=( A265 and (not A200) );
a16609a <=( (not A199) and a16608a );
a16610a <=( a16609a and a16604a );
a16614a <=( A269 and A267 );
a16615a <=( (not A266) and a16614a );
a16619a <=( (not A302) and (not A301) );
a16620a <=( A298 and a16619a );
a16621a <=( a16620a and a16615a );
a16625a <=( A167 and (not A168) );
a16626a <=( (not A169) and a16625a );
a16630a <=( A200 and A199 );
a16631a <=( A166 and a16630a );
a16632a <=( a16631a and a16626a );
a16636a <=( A267 and (not A266) );
a16637a <=( A265 and a16636a );
a16641a <=( (not A300) and A298 );
a16642a <=( A268 and a16641a );
a16643a <=( a16642a and a16637a );
a16647a <=( A167 and (not A168) );
a16648a <=( (not A169) and a16647a );
a16652a <=( A200 and A199 );
a16653a <=( A166 and a16652a );
a16654a <=( a16653a and a16648a );
a16658a <=( A267 and (not A266) );
a16659a <=( A265 and a16658a );
a16663a <=( A299 and A298 );
a16664a <=( A268 and a16663a );
a16665a <=( a16664a and a16659a );
a16669a <=( A167 and (not A168) );
a16670a <=( (not A169) and a16669a );
a16674a <=( A200 and A199 );
a16675a <=( A166 and a16674a );
a16676a <=( a16675a and a16670a );
a16680a <=( A267 and (not A266) );
a16681a <=( A265 and a16680a );
a16685a <=( (not A299) and (not A298) );
a16686a <=( A268 and a16685a );
a16687a <=( a16686a and a16681a );
a16691a <=( A167 and (not A168) );
a16692a <=( (not A169) and a16691a );
a16696a <=( A200 and A199 );
a16697a <=( A166 and a16696a );
a16698a <=( a16697a and a16692a );
a16702a <=( A267 and (not A266) );
a16703a <=( A265 and a16702a );
a16707a <=( (not A300) and A298 );
a16708a <=( A269 and a16707a );
a16709a <=( a16708a and a16703a );
a16713a <=( A167 and (not A168) );
a16714a <=( (not A169) and a16713a );
a16718a <=( A200 and A199 );
a16719a <=( A166 and a16718a );
a16720a <=( a16719a and a16714a );
a16724a <=( A267 and (not A266) );
a16725a <=( A265 and a16724a );
a16729a <=( A299 and A298 );
a16730a <=( A269 and a16729a );
a16731a <=( a16730a and a16725a );
a16735a <=( A167 and (not A168) );
a16736a <=( (not A169) and a16735a );
a16740a <=( A200 and A199 );
a16741a <=( A166 and a16740a );
a16742a <=( a16741a and a16736a );
a16746a <=( A267 and (not A266) );
a16747a <=( A265 and a16746a );
a16751a <=( (not A299) and (not A298) );
a16752a <=( A269 and a16751a );
a16753a <=( a16752a and a16747a );
a16757a <=( A167 and (not A168) );
a16758a <=( (not A169) and a16757a );
a16762a <=( A200 and (not A199) );
a16763a <=( A166 and a16762a );
a16764a <=( a16763a and a16758a );
a16768a <=( A298 and A266 );
a16769a <=( A265 and a16768a );
a16773a <=( A301 and A300 );
a16774a <=( (not A299) and a16773a );
a16775a <=( a16774a and a16769a );
a16779a <=( A167 and (not A168) );
a16780a <=( (not A169) and a16779a );
a16784a <=( A200 and (not A199) );
a16785a <=( A166 and a16784a );
a16786a <=( a16785a and a16780a );
a16790a <=( A298 and A266 );
a16791a <=( A265 and a16790a );
a16795a <=( A302 and A300 );
a16796a <=( (not A299) and a16795a );
a16797a <=( a16796a and a16791a );
a16801a <=( A167 and (not A168) );
a16802a <=( (not A169) and a16801a );
a16806a <=( A200 and (not A199) );
a16807a <=( A166 and a16806a );
a16808a <=( a16807a and a16802a );
a16812a <=( A298 and (not A267) );
a16813a <=( (not A266) and a16812a );
a16817a <=( A301 and A300 );
a16818a <=( (not A299) and a16817a );
a16819a <=( a16818a and a16813a );
a16823a <=( A167 and (not A168) );
a16824a <=( (not A169) and a16823a );
a16828a <=( A200 and (not A199) );
a16829a <=( A166 and a16828a );
a16830a <=( a16829a and a16824a );
a16834a <=( A298 and (not A267) );
a16835a <=( (not A266) and a16834a );
a16839a <=( A302 and A300 );
a16840a <=( (not A299) and a16839a );
a16841a <=( a16840a and a16835a );
a16845a <=( A167 and (not A168) );
a16846a <=( (not A169) and a16845a );
a16850a <=( A200 and (not A199) );
a16851a <=( A166 and a16850a );
a16852a <=( a16851a and a16846a );
a16856a <=( A298 and (not A266) );
a16857a <=( (not A265) and a16856a );
a16861a <=( A301 and A300 );
a16862a <=( (not A299) and a16861a );
a16863a <=( a16862a and a16857a );
a16867a <=( A167 and (not A168) );
a16868a <=( (not A169) and a16867a );
a16872a <=( A200 and (not A199) );
a16873a <=( A166 and a16872a );
a16874a <=( a16873a and a16868a );
a16878a <=( A298 and (not A266) );
a16879a <=( (not A265) and a16878a );
a16883a <=( A302 and A300 );
a16884a <=( (not A299) and a16883a );
a16885a <=( a16884a and a16879a );
a16889a <=( A167 and (not A168) );
a16890a <=( (not A169) and a16889a );
a16894a <=( (not A202) and (not A200) );
a16895a <=( A166 and a16894a );
a16896a <=( a16895a and a16890a );
a16900a <=( A266 and (not A265) );
a16901a <=( (not A203) and a16900a );
a16905a <=( (not A302) and (not A301) );
a16906a <=( A298 and a16905a );
a16907a <=( a16906a and a16901a );
a16911a <=( A167 and (not A168) );
a16912a <=( (not A169) and a16911a );
a16916a <=( (not A201) and (not A200) );
a16917a <=( A166 and a16916a );
a16918a <=( a16917a and a16912a );
a16922a <=( A267 and (not A266) );
a16923a <=( A265 and a16922a );
a16927a <=( (not A300) and A298 );
a16928a <=( A268 and a16927a );
a16929a <=( a16928a and a16923a );
a16933a <=( A167 and (not A168) );
a16934a <=( (not A169) and a16933a );
a16938a <=( (not A201) and (not A200) );
a16939a <=( A166 and a16938a );
a16940a <=( a16939a and a16934a );
a16944a <=( A267 and (not A266) );
a16945a <=( A265 and a16944a );
a16949a <=( A299 and A298 );
a16950a <=( A268 and a16949a );
a16951a <=( a16950a and a16945a );
a16955a <=( A167 and (not A168) );
a16956a <=( (not A169) and a16955a );
a16960a <=( (not A201) and (not A200) );
a16961a <=( A166 and a16960a );
a16962a <=( a16961a and a16956a );
a16966a <=( A267 and (not A266) );
a16967a <=( A265 and a16966a );
a16971a <=( (not A299) and (not A298) );
a16972a <=( A268 and a16971a );
a16973a <=( a16972a and a16967a );
a16977a <=( A167 and (not A168) );
a16978a <=( (not A169) and a16977a );
a16982a <=( (not A201) and (not A200) );
a16983a <=( A166 and a16982a );
a16984a <=( a16983a and a16978a );
a16988a <=( A267 and (not A266) );
a16989a <=( A265 and a16988a );
a16993a <=( (not A300) and A298 );
a16994a <=( A269 and a16993a );
a16995a <=( a16994a and a16989a );
a16999a <=( A167 and (not A168) );
a17000a <=( (not A169) and a16999a );
a17004a <=( (not A201) and (not A200) );
a17005a <=( A166 and a17004a );
a17006a <=( a17005a and a17000a );
a17010a <=( A267 and (not A266) );
a17011a <=( A265 and a17010a );
a17015a <=( A299 and A298 );
a17016a <=( A269 and a17015a );
a17017a <=( a17016a and a17011a );
a17021a <=( A167 and (not A168) );
a17022a <=( (not A169) and a17021a );
a17026a <=( (not A201) and (not A200) );
a17027a <=( A166 and a17026a );
a17028a <=( a17027a and a17022a );
a17032a <=( A267 and (not A266) );
a17033a <=( A265 and a17032a );
a17037a <=( (not A299) and (not A298) );
a17038a <=( A269 and a17037a );
a17039a <=( a17038a and a17033a );
a17043a <=( A167 and (not A168) );
a17044a <=( (not A169) and a17043a );
a17048a <=( (not A200) and A199 );
a17049a <=( A166 and a17048a );
a17050a <=( a17049a and a17044a );
a17054a <=( A265 and A202 );
a17055a <=( A201 and a17054a );
a17059a <=( A299 and (not A298) );
a17060a <=( A266 and a17059a );
a17061a <=( a17060a and a17055a );
a17065a <=( A167 and (not A168) );
a17066a <=( (not A169) and a17065a );
a17070a <=( (not A200) and A199 );
a17071a <=( A166 and a17070a );
a17072a <=( a17071a and a17066a );
a17076a <=( (not A266) and A202 );
a17077a <=( A201 and a17076a );
a17081a <=( A299 and (not A298) );
a17082a <=( (not A267) and a17081a );
a17083a <=( a17082a and a17077a );
a17087a <=( A167 and (not A168) );
a17088a <=( (not A169) and a17087a );
a17092a <=( (not A200) and A199 );
a17093a <=( A166 and a17092a );
a17094a <=( a17093a and a17088a );
a17098a <=( (not A265) and A202 );
a17099a <=( A201 and a17098a );
a17103a <=( A299 and (not A298) );
a17104a <=( (not A266) and a17103a );
a17105a <=( a17104a and a17099a );
a17109a <=( A167 and (not A168) );
a17110a <=( (not A169) and a17109a );
a17114a <=( (not A200) and A199 );
a17115a <=( A166 and a17114a );
a17116a <=( a17115a and a17110a );
a17120a <=( A265 and A203 );
a17121a <=( A201 and a17120a );
a17125a <=( A299 and (not A298) );
a17126a <=( A266 and a17125a );
a17127a <=( a17126a and a17121a );
a17131a <=( A167 and (not A168) );
a17132a <=( (not A169) and a17131a );
a17136a <=( (not A200) and A199 );
a17137a <=( A166 and a17136a );
a17138a <=( a17137a and a17132a );
a17142a <=( (not A266) and A203 );
a17143a <=( A201 and a17142a );
a17147a <=( A299 and (not A298) );
a17148a <=( (not A267) and a17147a );
a17149a <=( a17148a and a17143a );
a17153a <=( A167 and (not A168) );
a17154a <=( (not A169) and a17153a );
a17158a <=( (not A200) and A199 );
a17159a <=( A166 and a17158a );
a17160a <=( a17159a and a17154a );
a17164a <=( (not A265) and A203 );
a17165a <=( A201 and a17164a );
a17169a <=( A299 and (not A298) );
a17170a <=( (not A266) and a17169a );
a17171a <=( a17170a and a17165a );
a17175a <=( A167 and (not A168) );
a17176a <=( (not A169) and a17175a );
a17180a <=( (not A200) and (not A199) );
a17181a <=( A166 and a17180a );
a17182a <=( a17181a and a17176a );
a17186a <=( A267 and (not A266) );
a17187a <=( A265 and a17186a );
a17191a <=( (not A300) and A298 );
a17192a <=( A268 and a17191a );
a17193a <=( a17192a and a17187a );
a17197a <=( A167 and (not A168) );
a17198a <=( (not A169) and a17197a );
a17202a <=( (not A200) and (not A199) );
a17203a <=( A166 and a17202a );
a17204a <=( a17203a and a17198a );
a17208a <=( A267 and (not A266) );
a17209a <=( A265 and a17208a );
a17213a <=( A299 and A298 );
a17214a <=( A268 and a17213a );
a17215a <=( a17214a and a17209a );
a17219a <=( A167 and (not A168) );
a17220a <=( (not A169) and a17219a );
a17224a <=( (not A200) and (not A199) );
a17225a <=( A166 and a17224a );
a17226a <=( a17225a and a17220a );
a17230a <=( A267 and (not A266) );
a17231a <=( A265 and a17230a );
a17235a <=( (not A299) and (not A298) );
a17236a <=( A268 and a17235a );
a17237a <=( a17236a and a17231a );
a17241a <=( A167 and (not A168) );
a17242a <=( (not A169) and a17241a );
a17246a <=( (not A200) and (not A199) );
a17247a <=( A166 and a17246a );
a17248a <=( a17247a and a17242a );
a17252a <=( A267 and (not A266) );
a17253a <=( A265 and a17252a );
a17257a <=( (not A300) and A298 );
a17258a <=( A269 and a17257a );
a17259a <=( a17258a and a17253a );
a17263a <=( A167 and (not A168) );
a17264a <=( (not A169) and a17263a );
a17268a <=( (not A200) and (not A199) );
a17269a <=( A166 and a17268a );
a17270a <=( a17269a and a17264a );
a17274a <=( A267 and (not A266) );
a17275a <=( A265 and a17274a );
a17279a <=( A299 and A298 );
a17280a <=( A269 and a17279a );
a17281a <=( a17280a and a17275a );
a17285a <=( A167 and (not A168) );
a17286a <=( (not A169) and a17285a );
a17290a <=( (not A200) and (not A199) );
a17291a <=( A166 and a17290a );
a17292a <=( a17291a and a17286a );
a17296a <=( A267 and (not A266) );
a17297a <=( A265 and a17296a );
a17301a <=( (not A299) and (not A298) );
a17302a <=( A269 and a17301a );
a17303a <=( a17302a and a17297a );
a17307a <=( A167 and (not A169) );
a17308a <=( A170 and a17307a );
a17312a <=( A200 and A199 );
a17313a <=( (not A166) and a17312a );
a17314a <=( a17313a and a17308a );
a17318a <=( A298 and A266 );
a17319a <=( A265 and a17318a );
a17323a <=( A301 and A300 );
a17324a <=( (not A299) and a17323a );
a17325a <=( a17324a and a17319a );
a17329a <=( A167 and (not A169) );
a17330a <=( A170 and a17329a );
a17334a <=( A200 and A199 );
a17335a <=( (not A166) and a17334a );
a17336a <=( a17335a and a17330a );
a17340a <=( A298 and A266 );
a17341a <=( A265 and a17340a );
a17345a <=( A302 and A300 );
a17346a <=( (not A299) and a17345a );
a17347a <=( a17346a and a17341a );
a17351a <=( A167 and (not A169) );
a17352a <=( A170 and a17351a );
a17356a <=( A200 and A199 );
a17357a <=( (not A166) and a17356a );
a17358a <=( a17357a and a17352a );
a17362a <=( A298 and (not A267) );
a17363a <=( (not A266) and a17362a );
a17367a <=( A301 and A300 );
a17368a <=( (not A299) and a17367a );
a17369a <=( a17368a and a17363a );
a17373a <=( A167 and (not A169) );
a17374a <=( A170 and a17373a );
a17378a <=( A200 and A199 );
a17379a <=( (not A166) and a17378a );
a17380a <=( a17379a and a17374a );
a17384a <=( A298 and (not A267) );
a17385a <=( (not A266) and a17384a );
a17389a <=( A302 and A300 );
a17390a <=( (not A299) and a17389a );
a17391a <=( a17390a and a17385a );
a17395a <=( A167 and (not A169) );
a17396a <=( A170 and a17395a );
a17400a <=( A200 and A199 );
a17401a <=( (not A166) and a17400a );
a17402a <=( a17401a and a17396a );
a17406a <=( A298 and (not A266) );
a17407a <=( (not A265) and a17406a );
a17411a <=( A301 and A300 );
a17412a <=( (not A299) and a17411a );
a17413a <=( a17412a and a17407a );
a17417a <=( A167 and (not A169) );
a17418a <=( A170 and a17417a );
a17422a <=( A200 and A199 );
a17423a <=( (not A166) and a17422a );
a17424a <=( a17423a and a17418a );
a17428a <=( A298 and (not A266) );
a17429a <=( (not A265) and a17428a );
a17433a <=( A302 and A300 );
a17434a <=( (not A299) and a17433a );
a17435a <=( a17434a and a17429a );
a17439a <=( A167 and (not A169) );
a17440a <=( A170 and a17439a );
a17444a <=( A200 and (not A199) );
a17445a <=( (not A166) and a17444a );
a17446a <=( a17445a and a17440a );
a17450a <=( A267 and (not A266) );
a17451a <=( A265 and a17450a );
a17455a <=( (not A300) and A298 );
a17456a <=( A268 and a17455a );
a17457a <=( a17456a and a17451a );
a17461a <=( A167 and (not A169) );
a17462a <=( A170 and a17461a );
a17466a <=( A200 and (not A199) );
a17467a <=( (not A166) and a17466a );
a17468a <=( a17467a and a17462a );
a17472a <=( A267 and (not A266) );
a17473a <=( A265 and a17472a );
a17477a <=( A299 and A298 );
a17478a <=( A268 and a17477a );
a17479a <=( a17478a and a17473a );
a17483a <=( A167 and (not A169) );
a17484a <=( A170 and a17483a );
a17488a <=( A200 and (not A199) );
a17489a <=( (not A166) and a17488a );
a17490a <=( a17489a and a17484a );
a17494a <=( A267 and (not A266) );
a17495a <=( A265 and a17494a );
a17499a <=( (not A299) and (not A298) );
a17500a <=( A268 and a17499a );
a17501a <=( a17500a and a17495a );
a17505a <=( A167 and (not A169) );
a17506a <=( A170 and a17505a );
a17510a <=( A200 and (not A199) );
a17511a <=( (not A166) and a17510a );
a17512a <=( a17511a and a17506a );
a17516a <=( A267 and (not A266) );
a17517a <=( A265 and a17516a );
a17521a <=( (not A300) and A298 );
a17522a <=( A269 and a17521a );
a17523a <=( a17522a and a17517a );
a17527a <=( A167 and (not A169) );
a17528a <=( A170 and a17527a );
a17532a <=( A200 and (not A199) );
a17533a <=( (not A166) and a17532a );
a17534a <=( a17533a and a17528a );
a17538a <=( A267 and (not A266) );
a17539a <=( A265 and a17538a );
a17543a <=( A299 and A298 );
a17544a <=( A269 and a17543a );
a17545a <=( a17544a and a17539a );
a17549a <=( A167 and (not A169) );
a17550a <=( A170 and a17549a );
a17554a <=( A200 and (not A199) );
a17555a <=( (not A166) and a17554a );
a17556a <=( a17555a and a17550a );
a17560a <=( A267 and (not A266) );
a17561a <=( A265 and a17560a );
a17565a <=( (not A299) and (not A298) );
a17566a <=( A269 and a17565a );
a17567a <=( a17566a and a17561a );
a17571a <=( A167 and (not A169) );
a17572a <=( A170 and a17571a );
a17576a <=( (not A202) and (not A200) );
a17577a <=( (not A166) and a17576a );
a17578a <=( a17577a and a17572a );
a17582a <=( (not A268) and (not A266) );
a17583a <=( (not A203) and a17582a );
a17587a <=( A299 and (not A298) );
a17588a <=( (not A269) and a17587a );
a17589a <=( a17588a and a17583a );
a17593a <=( A167 and (not A169) );
a17594a <=( A170 and a17593a );
a17598a <=( (not A201) and (not A200) );
a17599a <=( (not A166) and a17598a );
a17600a <=( a17599a and a17594a );
a17604a <=( A298 and A266 );
a17605a <=( A265 and a17604a );
a17609a <=( A301 and A300 );
a17610a <=( (not A299) and a17609a );
a17611a <=( a17610a and a17605a );
a17615a <=( A167 and (not A169) );
a17616a <=( A170 and a17615a );
a17620a <=( (not A201) and (not A200) );
a17621a <=( (not A166) and a17620a );
a17622a <=( a17621a and a17616a );
a17626a <=( A298 and A266 );
a17627a <=( A265 and a17626a );
a17631a <=( A302 and A300 );
a17632a <=( (not A299) and a17631a );
a17633a <=( a17632a and a17627a );
a17637a <=( A167 and (not A169) );
a17638a <=( A170 and a17637a );
a17642a <=( (not A201) and (not A200) );
a17643a <=( (not A166) and a17642a );
a17644a <=( a17643a and a17638a );
a17648a <=( A298 and (not A267) );
a17649a <=( (not A266) and a17648a );
a17653a <=( A301 and A300 );
a17654a <=( (not A299) and a17653a );
a17655a <=( a17654a and a17649a );
a17659a <=( A167 and (not A169) );
a17660a <=( A170 and a17659a );
a17664a <=( (not A201) and (not A200) );
a17665a <=( (not A166) and a17664a );
a17666a <=( a17665a and a17660a );
a17670a <=( A298 and (not A267) );
a17671a <=( (not A266) and a17670a );
a17675a <=( A302 and A300 );
a17676a <=( (not A299) and a17675a );
a17677a <=( a17676a and a17671a );
a17681a <=( A167 and (not A169) );
a17682a <=( A170 and a17681a );
a17686a <=( (not A201) and (not A200) );
a17687a <=( (not A166) and a17686a );
a17688a <=( a17687a and a17682a );
a17692a <=( A298 and (not A266) );
a17693a <=( (not A265) and a17692a );
a17697a <=( A301 and A300 );
a17698a <=( (not A299) and a17697a );
a17699a <=( a17698a and a17693a );
a17703a <=( A167 and (not A169) );
a17704a <=( A170 and a17703a );
a17708a <=( (not A201) and (not A200) );
a17709a <=( (not A166) and a17708a );
a17710a <=( a17709a and a17704a );
a17714a <=( A298 and (not A266) );
a17715a <=( (not A265) and a17714a );
a17719a <=( A302 and A300 );
a17720a <=( (not A299) and a17719a );
a17721a <=( a17720a and a17715a );
a17725a <=( A167 and (not A169) );
a17726a <=( A170 and a17725a );
a17730a <=( (not A200) and A199 );
a17731a <=( (not A166) and a17730a );
a17732a <=( a17731a and a17726a );
a17736a <=( (not A265) and A202 );
a17737a <=( A201 and a17736a );
a17741a <=( (not A300) and A298 );
a17742a <=( A266 and a17741a );
a17743a <=( a17742a and a17737a );
a17747a <=( A167 and (not A169) );
a17748a <=( A170 and a17747a );
a17752a <=( (not A200) and A199 );
a17753a <=( (not A166) and a17752a );
a17754a <=( a17753a and a17748a );
a17758a <=( (not A265) and A202 );
a17759a <=( A201 and a17758a );
a17763a <=( A299 and A298 );
a17764a <=( A266 and a17763a );
a17765a <=( a17764a and a17759a );
a17769a <=( A167 and (not A169) );
a17770a <=( A170 and a17769a );
a17774a <=( (not A200) and A199 );
a17775a <=( (not A166) and a17774a );
a17776a <=( a17775a and a17770a );
a17780a <=( (not A265) and A202 );
a17781a <=( A201 and a17780a );
a17785a <=( (not A299) and (not A298) );
a17786a <=( A266 and a17785a );
a17787a <=( a17786a and a17781a );
a17791a <=( A167 and (not A169) );
a17792a <=( A170 and a17791a );
a17796a <=( (not A200) and A199 );
a17797a <=( (not A166) and a17796a );
a17798a <=( a17797a and a17792a );
a17802a <=( (not A265) and A203 );
a17803a <=( A201 and a17802a );
a17807a <=( (not A300) and A298 );
a17808a <=( A266 and a17807a );
a17809a <=( a17808a and a17803a );
a17813a <=( A167 and (not A169) );
a17814a <=( A170 and a17813a );
a17818a <=( (not A200) and A199 );
a17819a <=( (not A166) and a17818a );
a17820a <=( a17819a and a17814a );
a17824a <=( (not A265) and A203 );
a17825a <=( A201 and a17824a );
a17829a <=( A299 and A298 );
a17830a <=( A266 and a17829a );
a17831a <=( a17830a and a17825a );
a17835a <=( A167 and (not A169) );
a17836a <=( A170 and a17835a );
a17840a <=( (not A200) and A199 );
a17841a <=( (not A166) and a17840a );
a17842a <=( a17841a and a17836a );
a17846a <=( (not A265) and A203 );
a17847a <=( A201 and a17846a );
a17851a <=( (not A299) and (not A298) );
a17852a <=( A266 and a17851a );
a17853a <=( a17852a and a17847a );
a17857a <=( A167 and (not A169) );
a17858a <=( A170 and a17857a );
a17862a <=( (not A200) and (not A199) );
a17863a <=( (not A166) and a17862a );
a17864a <=( a17863a and a17858a );
a17868a <=( A298 and A266 );
a17869a <=( A265 and a17868a );
a17873a <=( A301 and A300 );
a17874a <=( (not A299) and a17873a );
a17875a <=( a17874a and a17869a );
a17879a <=( A167 and (not A169) );
a17880a <=( A170 and a17879a );
a17884a <=( (not A200) and (not A199) );
a17885a <=( (not A166) and a17884a );
a17886a <=( a17885a and a17880a );
a17890a <=( A298 and A266 );
a17891a <=( A265 and a17890a );
a17895a <=( A302 and A300 );
a17896a <=( (not A299) and a17895a );
a17897a <=( a17896a and a17891a );
a17901a <=( A167 and (not A169) );
a17902a <=( A170 and a17901a );
a17906a <=( (not A200) and (not A199) );
a17907a <=( (not A166) and a17906a );
a17908a <=( a17907a and a17902a );
a17912a <=( A298 and (not A267) );
a17913a <=( (not A266) and a17912a );
a17917a <=( A301 and A300 );
a17918a <=( (not A299) and a17917a );
a17919a <=( a17918a and a17913a );
a17923a <=( A167 and (not A169) );
a17924a <=( A170 and a17923a );
a17928a <=( (not A200) and (not A199) );
a17929a <=( (not A166) and a17928a );
a17930a <=( a17929a and a17924a );
a17934a <=( A298 and (not A267) );
a17935a <=( (not A266) and a17934a );
a17939a <=( A302 and A300 );
a17940a <=( (not A299) and a17939a );
a17941a <=( a17940a and a17935a );
a17945a <=( A167 and (not A169) );
a17946a <=( A170 and a17945a );
a17950a <=( (not A200) and (not A199) );
a17951a <=( (not A166) and a17950a );
a17952a <=( a17951a and a17946a );
a17956a <=( A298 and (not A266) );
a17957a <=( (not A265) and a17956a );
a17961a <=( A301 and A300 );
a17962a <=( (not A299) and a17961a );
a17963a <=( a17962a and a17957a );
a17967a <=( A167 and (not A169) );
a17968a <=( A170 and a17967a );
a17972a <=( (not A200) and (not A199) );
a17973a <=( (not A166) and a17972a );
a17974a <=( a17973a and a17968a );
a17978a <=( A298 and (not A266) );
a17979a <=( (not A265) and a17978a );
a17983a <=( A302 and A300 );
a17984a <=( (not A299) and a17983a );
a17985a <=( a17984a and a17979a );
a17989a <=( (not A167) and (not A169) );
a17990a <=( A170 and a17989a );
a17994a <=( A200 and A199 );
a17995a <=( A166 and a17994a );
a17996a <=( a17995a and a17990a );
a18000a <=( A298 and A266 );
a18001a <=( A265 and a18000a );
a18005a <=( A301 and A300 );
a18006a <=( (not A299) and a18005a );
a18007a <=( a18006a and a18001a );
a18011a <=( (not A167) and (not A169) );
a18012a <=( A170 and a18011a );
a18016a <=( A200 and A199 );
a18017a <=( A166 and a18016a );
a18018a <=( a18017a and a18012a );
a18022a <=( A298 and A266 );
a18023a <=( A265 and a18022a );
a18027a <=( A302 and A300 );
a18028a <=( (not A299) and a18027a );
a18029a <=( a18028a and a18023a );
a18033a <=( (not A167) and (not A169) );
a18034a <=( A170 and a18033a );
a18038a <=( A200 and A199 );
a18039a <=( A166 and a18038a );
a18040a <=( a18039a and a18034a );
a18044a <=( A298 and (not A267) );
a18045a <=( (not A266) and a18044a );
a18049a <=( A301 and A300 );
a18050a <=( (not A299) and a18049a );
a18051a <=( a18050a and a18045a );
a18055a <=( (not A167) and (not A169) );
a18056a <=( A170 and a18055a );
a18060a <=( A200 and A199 );
a18061a <=( A166 and a18060a );
a18062a <=( a18061a and a18056a );
a18066a <=( A298 and (not A267) );
a18067a <=( (not A266) and a18066a );
a18071a <=( A302 and A300 );
a18072a <=( (not A299) and a18071a );
a18073a <=( a18072a and a18067a );
a18077a <=( (not A167) and (not A169) );
a18078a <=( A170 and a18077a );
a18082a <=( A200 and A199 );
a18083a <=( A166 and a18082a );
a18084a <=( a18083a and a18078a );
a18088a <=( A298 and (not A266) );
a18089a <=( (not A265) and a18088a );
a18093a <=( A301 and A300 );
a18094a <=( (not A299) and a18093a );
a18095a <=( a18094a and a18089a );
a18099a <=( (not A167) and (not A169) );
a18100a <=( A170 and a18099a );
a18104a <=( A200 and A199 );
a18105a <=( A166 and a18104a );
a18106a <=( a18105a and a18100a );
a18110a <=( A298 and (not A266) );
a18111a <=( (not A265) and a18110a );
a18115a <=( A302 and A300 );
a18116a <=( (not A299) and a18115a );
a18117a <=( a18116a and a18111a );
a18121a <=( (not A167) and (not A169) );
a18122a <=( A170 and a18121a );
a18126a <=( A200 and (not A199) );
a18127a <=( A166 and a18126a );
a18128a <=( a18127a and a18122a );
a18132a <=( A267 and (not A266) );
a18133a <=( A265 and a18132a );
a18137a <=( (not A300) and A298 );
a18138a <=( A268 and a18137a );
a18139a <=( a18138a and a18133a );
a18143a <=( (not A167) and (not A169) );
a18144a <=( A170 and a18143a );
a18148a <=( A200 and (not A199) );
a18149a <=( A166 and a18148a );
a18150a <=( a18149a and a18144a );
a18154a <=( A267 and (not A266) );
a18155a <=( A265 and a18154a );
a18159a <=( A299 and A298 );
a18160a <=( A268 and a18159a );
a18161a <=( a18160a and a18155a );
a18165a <=( (not A167) and (not A169) );
a18166a <=( A170 and a18165a );
a18170a <=( A200 and (not A199) );
a18171a <=( A166 and a18170a );
a18172a <=( a18171a and a18166a );
a18176a <=( A267 and (not A266) );
a18177a <=( A265 and a18176a );
a18181a <=( (not A299) and (not A298) );
a18182a <=( A268 and a18181a );
a18183a <=( a18182a and a18177a );
a18187a <=( (not A167) and (not A169) );
a18188a <=( A170 and a18187a );
a18192a <=( A200 and (not A199) );
a18193a <=( A166 and a18192a );
a18194a <=( a18193a and a18188a );
a18198a <=( A267 and (not A266) );
a18199a <=( A265 and a18198a );
a18203a <=( (not A300) and A298 );
a18204a <=( A269 and a18203a );
a18205a <=( a18204a and a18199a );
a18209a <=( (not A167) and (not A169) );
a18210a <=( A170 and a18209a );
a18214a <=( A200 and (not A199) );
a18215a <=( A166 and a18214a );
a18216a <=( a18215a and a18210a );
a18220a <=( A267 and (not A266) );
a18221a <=( A265 and a18220a );
a18225a <=( A299 and A298 );
a18226a <=( A269 and a18225a );
a18227a <=( a18226a and a18221a );
a18231a <=( (not A167) and (not A169) );
a18232a <=( A170 and a18231a );
a18236a <=( A200 and (not A199) );
a18237a <=( A166 and a18236a );
a18238a <=( a18237a and a18232a );
a18242a <=( A267 and (not A266) );
a18243a <=( A265 and a18242a );
a18247a <=( (not A299) and (not A298) );
a18248a <=( A269 and a18247a );
a18249a <=( a18248a and a18243a );
a18253a <=( (not A167) and (not A169) );
a18254a <=( A170 and a18253a );
a18258a <=( (not A202) and (not A200) );
a18259a <=( A166 and a18258a );
a18260a <=( a18259a and a18254a );
a18264a <=( (not A268) and (not A266) );
a18265a <=( (not A203) and a18264a );
a18269a <=( A299 and (not A298) );
a18270a <=( (not A269) and a18269a );
a18271a <=( a18270a and a18265a );
a18275a <=( (not A167) and (not A169) );
a18276a <=( A170 and a18275a );
a18280a <=( (not A201) and (not A200) );
a18281a <=( A166 and a18280a );
a18282a <=( a18281a and a18276a );
a18286a <=( A298 and A266 );
a18287a <=( A265 and a18286a );
a18291a <=( A301 and A300 );
a18292a <=( (not A299) and a18291a );
a18293a <=( a18292a and a18287a );
a18297a <=( (not A167) and (not A169) );
a18298a <=( A170 and a18297a );
a18302a <=( (not A201) and (not A200) );
a18303a <=( A166 and a18302a );
a18304a <=( a18303a and a18298a );
a18308a <=( A298 and A266 );
a18309a <=( A265 and a18308a );
a18313a <=( A302 and A300 );
a18314a <=( (not A299) and a18313a );
a18315a <=( a18314a and a18309a );
a18319a <=( (not A167) and (not A169) );
a18320a <=( A170 and a18319a );
a18324a <=( (not A201) and (not A200) );
a18325a <=( A166 and a18324a );
a18326a <=( a18325a and a18320a );
a18330a <=( A298 and (not A267) );
a18331a <=( (not A266) and a18330a );
a18335a <=( A301 and A300 );
a18336a <=( (not A299) and a18335a );
a18337a <=( a18336a and a18331a );
a18341a <=( (not A167) and (not A169) );
a18342a <=( A170 and a18341a );
a18346a <=( (not A201) and (not A200) );
a18347a <=( A166 and a18346a );
a18348a <=( a18347a and a18342a );
a18352a <=( A298 and (not A267) );
a18353a <=( (not A266) and a18352a );
a18357a <=( A302 and A300 );
a18358a <=( (not A299) and a18357a );
a18359a <=( a18358a and a18353a );
a18363a <=( (not A167) and (not A169) );
a18364a <=( A170 and a18363a );
a18368a <=( (not A201) and (not A200) );
a18369a <=( A166 and a18368a );
a18370a <=( a18369a and a18364a );
a18374a <=( A298 and (not A266) );
a18375a <=( (not A265) and a18374a );
a18379a <=( A301 and A300 );
a18380a <=( (not A299) and a18379a );
a18381a <=( a18380a and a18375a );
a18385a <=( (not A167) and (not A169) );
a18386a <=( A170 and a18385a );
a18390a <=( (not A201) and (not A200) );
a18391a <=( A166 and a18390a );
a18392a <=( a18391a and a18386a );
a18396a <=( A298 and (not A266) );
a18397a <=( (not A265) and a18396a );
a18401a <=( A302 and A300 );
a18402a <=( (not A299) and a18401a );
a18403a <=( a18402a and a18397a );
a18407a <=( (not A167) and (not A169) );
a18408a <=( A170 and a18407a );
a18412a <=( (not A200) and A199 );
a18413a <=( A166 and a18412a );
a18414a <=( a18413a and a18408a );
a18418a <=( (not A265) and A202 );
a18419a <=( A201 and a18418a );
a18423a <=( (not A300) and A298 );
a18424a <=( A266 and a18423a );
a18425a <=( a18424a and a18419a );
a18429a <=( (not A167) and (not A169) );
a18430a <=( A170 and a18429a );
a18434a <=( (not A200) and A199 );
a18435a <=( A166 and a18434a );
a18436a <=( a18435a and a18430a );
a18440a <=( (not A265) and A202 );
a18441a <=( A201 and a18440a );
a18445a <=( A299 and A298 );
a18446a <=( A266 and a18445a );
a18447a <=( a18446a and a18441a );
a18451a <=( (not A167) and (not A169) );
a18452a <=( A170 and a18451a );
a18456a <=( (not A200) and A199 );
a18457a <=( A166 and a18456a );
a18458a <=( a18457a and a18452a );
a18462a <=( (not A265) and A202 );
a18463a <=( A201 and a18462a );
a18467a <=( (not A299) and (not A298) );
a18468a <=( A266 and a18467a );
a18469a <=( a18468a and a18463a );
a18473a <=( (not A167) and (not A169) );
a18474a <=( A170 and a18473a );
a18478a <=( (not A200) and A199 );
a18479a <=( A166 and a18478a );
a18480a <=( a18479a and a18474a );
a18484a <=( (not A265) and A203 );
a18485a <=( A201 and a18484a );
a18489a <=( (not A300) and A298 );
a18490a <=( A266 and a18489a );
a18491a <=( a18490a and a18485a );
a18495a <=( (not A167) and (not A169) );
a18496a <=( A170 and a18495a );
a18500a <=( (not A200) and A199 );
a18501a <=( A166 and a18500a );
a18502a <=( a18501a and a18496a );
a18506a <=( (not A265) and A203 );
a18507a <=( A201 and a18506a );
a18511a <=( A299 and A298 );
a18512a <=( A266 and a18511a );
a18513a <=( a18512a and a18507a );
a18517a <=( (not A167) and (not A169) );
a18518a <=( A170 and a18517a );
a18522a <=( (not A200) and A199 );
a18523a <=( A166 and a18522a );
a18524a <=( a18523a and a18518a );
a18528a <=( (not A265) and A203 );
a18529a <=( A201 and a18528a );
a18533a <=( (not A299) and (not A298) );
a18534a <=( A266 and a18533a );
a18535a <=( a18534a and a18529a );
a18539a <=( (not A167) and (not A169) );
a18540a <=( A170 and a18539a );
a18544a <=( (not A200) and (not A199) );
a18545a <=( A166 and a18544a );
a18546a <=( a18545a and a18540a );
a18550a <=( A298 and A266 );
a18551a <=( A265 and a18550a );
a18555a <=( A301 and A300 );
a18556a <=( (not A299) and a18555a );
a18557a <=( a18556a and a18551a );
a18561a <=( (not A167) and (not A169) );
a18562a <=( A170 and a18561a );
a18566a <=( (not A200) and (not A199) );
a18567a <=( A166 and a18566a );
a18568a <=( a18567a and a18562a );
a18572a <=( A298 and A266 );
a18573a <=( A265 and a18572a );
a18577a <=( A302 and A300 );
a18578a <=( (not A299) and a18577a );
a18579a <=( a18578a and a18573a );
a18583a <=( (not A167) and (not A169) );
a18584a <=( A170 and a18583a );
a18588a <=( (not A200) and (not A199) );
a18589a <=( A166 and a18588a );
a18590a <=( a18589a and a18584a );
a18594a <=( A298 and (not A267) );
a18595a <=( (not A266) and a18594a );
a18599a <=( A301 and A300 );
a18600a <=( (not A299) and a18599a );
a18601a <=( a18600a and a18595a );
a18605a <=( (not A167) and (not A169) );
a18606a <=( A170 and a18605a );
a18610a <=( (not A200) and (not A199) );
a18611a <=( A166 and a18610a );
a18612a <=( a18611a and a18606a );
a18616a <=( A298 and (not A267) );
a18617a <=( (not A266) and a18616a );
a18621a <=( A302 and A300 );
a18622a <=( (not A299) and a18621a );
a18623a <=( a18622a and a18617a );
a18627a <=( (not A167) and (not A169) );
a18628a <=( A170 and a18627a );
a18632a <=( (not A200) and (not A199) );
a18633a <=( A166 and a18632a );
a18634a <=( a18633a and a18628a );
a18638a <=( A298 and (not A266) );
a18639a <=( (not A265) and a18638a );
a18643a <=( A301 and A300 );
a18644a <=( (not A299) and a18643a );
a18645a <=( a18644a and a18639a );
a18649a <=( (not A167) and (not A169) );
a18650a <=( A170 and a18649a );
a18654a <=( (not A200) and (not A199) );
a18655a <=( A166 and a18654a );
a18656a <=( a18655a and a18650a );
a18660a <=( A298 and (not A266) );
a18661a <=( (not A265) and a18660a );
a18665a <=( A302 and A300 );
a18666a <=( (not A299) and a18665a );
a18667a <=( a18666a and a18661a );
a18671a <=( (not A168) and (not A169) );
a18672a <=( (not A170) and a18671a );
a18676a <=( A265 and A200 );
a18677a <=( A199 and a18676a );
a18678a <=( a18677a and a18672a );
a18682a <=( A268 and A267 );
a18683a <=( (not A266) and a18682a );
a18687a <=( (not A302) and (not A301) );
a18688a <=( A298 and a18687a );
a18689a <=( a18688a and a18683a );
a18693a <=( (not A168) and (not A169) );
a18694a <=( (not A170) and a18693a );
a18698a <=( A265 and A200 );
a18699a <=( A199 and a18698a );
a18700a <=( a18699a and a18694a );
a18704a <=( A269 and A267 );
a18705a <=( (not A266) and a18704a );
a18709a <=( (not A302) and (not A301) );
a18710a <=( A298 and a18709a );
a18711a <=( a18710a and a18705a );
a18715a <=( (not A168) and (not A169) );
a18716a <=( (not A170) and a18715a );
a18720a <=( (not A266) and A200 );
a18721a <=( (not A199) and a18720a );
a18722a <=( a18721a and a18716a );
a18726a <=( A298 and (not A269) );
a18727a <=( (not A268) and a18726a );
a18731a <=( A301 and A300 );
a18732a <=( (not A299) and a18731a );
a18733a <=( a18732a and a18727a );
a18737a <=( (not A168) and (not A169) );
a18738a <=( (not A170) and a18737a );
a18742a <=( (not A266) and A200 );
a18743a <=( (not A199) and a18742a );
a18744a <=( a18743a and a18738a );
a18748a <=( A298 and (not A269) );
a18749a <=( (not A268) and a18748a );
a18753a <=( A302 and A300 );
a18754a <=( (not A299) and a18753a );
a18755a <=( a18754a and a18749a );
a18759a <=( (not A168) and (not A169) );
a18760a <=( (not A170) and a18759a );
a18764a <=( (not A203) and (not A202) );
a18765a <=( (not A200) and a18764a );
a18766a <=( a18765a and a18760a );
a18770a <=( A267 and (not A266) );
a18771a <=( A265 and a18770a );
a18775a <=( (not A300) and A298 );
a18776a <=( A268 and a18775a );
a18777a <=( a18776a and a18771a );
a18781a <=( (not A168) and (not A169) );
a18782a <=( (not A170) and a18781a );
a18786a <=( (not A203) and (not A202) );
a18787a <=( (not A200) and a18786a );
a18788a <=( a18787a and a18782a );
a18792a <=( A267 and (not A266) );
a18793a <=( A265 and a18792a );
a18797a <=( A299 and A298 );
a18798a <=( A268 and a18797a );
a18799a <=( a18798a and a18793a );
a18803a <=( (not A168) and (not A169) );
a18804a <=( (not A170) and a18803a );
a18808a <=( (not A203) and (not A202) );
a18809a <=( (not A200) and a18808a );
a18810a <=( a18809a and a18804a );
a18814a <=( A267 and (not A266) );
a18815a <=( A265 and a18814a );
a18819a <=( (not A299) and (not A298) );
a18820a <=( A268 and a18819a );
a18821a <=( a18820a and a18815a );
a18825a <=( (not A168) and (not A169) );
a18826a <=( (not A170) and a18825a );
a18830a <=( (not A203) and (not A202) );
a18831a <=( (not A200) and a18830a );
a18832a <=( a18831a and a18826a );
a18836a <=( A267 and (not A266) );
a18837a <=( A265 and a18836a );
a18841a <=( (not A300) and A298 );
a18842a <=( A269 and a18841a );
a18843a <=( a18842a and a18837a );
a18847a <=( (not A168) and (not A169) );
a18848a <=( (not A170) and a18847a );
a18852a <=( (not A203) and (not A202) );
a18853a <=( (not A200) and a18852a );
a18854a <=( a18853a and a18848a );
a18858a <=( A267 and (not A266) );
a18859a <=( A265 and a18858a );
a18863a <=( A299 and A298 );
a18864a <=( A269 and a18863a );
a18865a <=( a18864a and a18859a );
a18869a <=( (not A168) and (not A169) );
a18870a <=( (not A170) and a18869a );
a18874a <=( (not A203) and (not A202) );
a18875a <=( (not A200) and a18874a );
a18876a <=( a18875a and a18870a );
a18880a <=( A267 and (not A266) );
a18881a <=( A265 and a18880a );
a18885a <=( (not A299) and (not A298) );
a18886a <=( A269 and a18885a );
a18887a <=( a18886a and a18881a );
a18891a <=( (not A168) and (not A169) );
a18892a <=( (not A170) and a18891a );
a18896a <=( A265 and (not A201) );
a18897a <=( (not A200) and a18896a );
a18898a <=( a18897a and a18892a );
a18902a <=( A268 and A267 );
a18903a <=( (not A266) and a18902a );
a18907a <=( (not A302) and (not A301) );
a18908a <=( A298 and a18907a );
a18909a <=( a18908a and a18903a );
a18913a <=( (not A168) and (not A169) );
a18914a <=( (not A170) and a18913a );
a18918a <=( A265 and (not A201) );
a18919a <=( (not A200) and a18918a );
a18920a <=( a18919a and a18914a );
a18924a <=( A269 and A267 );
a18925a <=( (not A266) and a18924a );
a18929a <=( (not A302) and (not A301) );
a18930a <=( A298 and a18929a );
a18931a <=( a18930a and a18925a );
a18935a <=( (not A168) and (not A169) );
a18936a <=( (not A170) and a18935a );
a18940a <=( A201 and (not A200) );
a18941a <=( A199 and a18940a );
a18942a <=( a18941a and a18936a );
a18946a <=( (not A268) and (not A266) );
a18947a <=( A202 and a18946a );
a18951a <=( A299 and (not A298) );
a18952a <=( (not A269) and a18951a );
a18953a <=( a18952a and a18947a );
a18957a <=( (not A168) and (not A169) );
a18958a <=( (not A170) and a18957a );
a18962a <=( A201 and (not A200) );
a18963a <=( A199 and a18962a );
a18964a <=( a18963a and a18958a );
a18968a <=( (not A268) and (not A266) );
a18969a <=( A203 and a18968a );
a18973a <=( A299 and (not A298) );
a18974a <=( (not A269) and a18973a );
a18975a <=( a18974a and a18969a );
a18979a <=( (not A168) and (not A169) );
a18980a <=( (not A170) and a18979a );
a18984a <=( A265 and (not A200) );
a18985a <=( (not A199) and a18984a );
a18986a <=( a18985a and a18980a );
a18990a <=( A268 and A267 );
a18991a <=( (not A266) and a18990a );
a18995a <=( (not A302) and (not A301) );
a18996a <=( A298 and a18995a );
a18997a <=( a18996a and a18991a );
a19001a <=( (not A168) and (not A169) );
a19002a <=( (not A170) and a19001a );
a19006a <=( A265 and (not A200) );
a19007a <=( (not A199) and a19006a );
a19008a <=( a19007a and a19002a );
a19012a <=( A269 and A267 );
a19013a <=( (not A266) and a19012a );
a19017a <=( (not A302) and (not A301) );
a19018a <=( A298 and a19017a );
a19019a <=( a19018a and a19013a );
a19023a <=( A199 and A166 );
a19024a <=( A168 and a19023a );
a19028a <=( A202 and A201 );
a19029a <=( (not A200) and a19028a );
a19030a <=( a19029a and a19024a );
a19034a <=( A267 and (not A266) );
a19035a <=( A265 and a19034a );
a19038a <=( A298 and A268 );
a19041a <=( (not A302) and (not A301) );
a19042a <=( a19041a and a19038a );
a19043a <=( a19042a and a19035a );
a19047a <=( A199 and A166 );
a19048a <=( A168 and a19047a );
a19052a <=( A202 and A201 );
a19053a <=( (not A200) and a19052a );
a19054a <=( a19053a and a19048a );
a19058a <=( A267 and (not A266) );
a19059a <=( A265 and a19058a );
a19062a <=( A298 and A269 );
a19065a <=( (not A302) and (not A301) );
a19066a <=( a19065a and a19062a );
a19067a <=( a19066a and a19059a );
a19071a <=( A199 and A166 );
a19072a <=( A168 and a19071a );
a19076a <=( A203 and A201 );
a19077a <=( (not A200) and a19076a );
a19078a <=( a19077a and a19072a );
a19082a <=( A267 and (not A266) );
a19083a <=( A265 and a19082a );
a19086a <=( A298 and A268 );
a19089a <=( (not A302) and (not A301) );
a19090a <=( a19089a and a19086a );
a19091a <=( a19090a and a19083a );
a19095a <=( A199 and A166 );
a19096a <=( A168 and a19095a );
a19100a <=( A203 and A201 );
a19101a <=( (not A200) and a19100a );
a19102a <=( a19101a and a19096a );
a19106a <=( A267 and (not A266) );
a19107a <=( A265 and a19106a );
a19110a <=( A298 and A269 );
a19113a <=( (not A302) and (not A301) );
a19114a <=( a19113a and a19110a );
a19115a <=( a19114a and a19107a );
a19119a <=( A199 and A167 );
a19120a <=( A168 and a19119a );
a19124a <=( A202 and A201 );
a19125a <=( (not A200) and a19124a );
a19126a <=( a19125a and a19120a );
a19130a <=( A267 and (not A266) );
a19131a <=( A265 and a19130a );
a19134a <=( A298 and A268 );
a19137a <=( (not A302) and (not A301) );
a19138a <=( a19137a and a19134a );
a19139a <=( a19138a and a19131a );
a19143a <=( A199 and A167 );
a19144a <=( A168 and a19143a );
a19148a <=( A202 and A201 );
a19149a <=( (not A200) and a19148a );
a19150a <=( a19149a and a19144a );
a19154a <=( A267 and (not A266) );
a19155a <=( A265 and a19154a );
a19158a <=( A298 and A269 );
a19161a <=( (not A302) and (not A301) );
a19162a <=( a19161a and a19158a );
a19163a <=( a19162a and a19155a );
a19167a <=( A199 and A167 );
a19168a <=( A168 and a19167a );
a19172a <=( A203 and A201 );
a19173a <=( (not A200) and a19172a );
a19174a <=( a19173a and a19168a );
a19178a <=( A267 and (not A266) );
a19179a <=( A265 and a19178a );
a19182a <=( A298 and A268 );
a19185a <=( (not A302) and (not A301) );
a19186a <=( a19185a and a19182a );
a19187a <=( a19186a and a19179a );
a19191a <=( A199 and A167 );
a19192a <=( A168 and a19191a );
a19196a <=( A203 and A201 );
a19197a <=( (not A200) and a19196a );
a19198a <=( a19197a and a19192a );
a19202a <=( A267 and (not A266) );
a19203a <=( A265 and a19202a );
a19206a <=( A298 and A269 );
a19209a <=( (not A302) and (not A301) );
a19210a <=( a19209a and a19206a );
a19211a <=( a19210a and a19203a );
a19215a <=( (not A166) and (not A167) );
a19216a <=( A170 and a19215a );
a19220a <=( (not A203) and (not A202) );
a19221a <=( (not A200) and a19220a );
a19222a <=( a19221a and a19216a );
a19226a <=( A267 and (not A266) );
a19227a <=( A265 and a19226a );
a19230a <=( A298 and A268 );
a19233a <=( (not A302) and (not A301) );
a19234a <=( a19233a and a19230a );
a19235a <=( a19234a and a19227a );
a19239a <=( (not A166) and (not A167) );
a19240a <=( A170 and a19239a );
a19244a <=( (not A203) and (not A202) );
a19245a <=( (not A200) and a19244a );
a19246a <=( a19245a and a19240a );
a19250a <=( A267 and (not A266) );
a19251a <=( A265 and a19250a );
a19254a <=( A298 and A269 );
a19257a <=( (not A302) and (not A301) );
a19258a <=( a19257a and a19254a );
a19259a <=( a19258a and a19251a );
a19263a <=( (not A166) and (not A167) );
a19264a <=( A170 and a19263a );
a19268a <=( A201 and (not A200) );
a19269a <=( A199 and a19268a );
a19270a <=( a19269a and a19264a );
a19274a <=( A266 and A265 );
a19275a <=( A202 and a19274a );
a19278a <=( (not A299) and A298 );
a19281a <=( A301 and A300 );
a19282a <=( a19281a and a19278a );
a19283a <=( a19282a and a19275a );
a19287a <=( (not A166) and (not A167) );
a19288a <=( A170 and a19287a );
a19292a <=( A201 and (not A200) );
a19293a <=( A199 and a19292a );
a19294a <=( a19293a and a19288a );
a19298a <=( A266 and A265 );
a19299a <=( A202 and a19298a );
a19302a <=( (not A299) and A298 );
a19305a <=( A302 and A300 );
a19306a <=( a19305a and a19302a );
a19307a <=( a19306a and a19299a );
a19311a <=( (not A166) and (not A167) );
a19312a <=( A170 and a19311a );
a19316a <=( A201 and (not A200) );
a19317a <=( A199 and a19316a );
a19318a <=( a19317a and a19312a );
a19322a <=( (not A267) and (not A266) );
a19323a <=( A202 and a19322a );
a19326a <=( (not A299) and A298 );
a19329a <=( A301 and A300 );
a19330a <=( a19329a and a19326a );
a19331a <=( a19330a and a19323a );
a19335a <=( (not A166) and (not A167) );
a19336a <=( A170 and a19335a );
a19340a <=( A201 and (not A200) );
a19341a <=( A199 and a19340a );
a19342a <=( a19341a and a19336a );
a19346a <=( (not A267) and (not A266) );
a19347a <=( A202 and a19346a );
a19350a <=( (not A299) and A298 );
a19353a <=( A302 and A300 );
a19354a <=( a19353a and a19350a );
a19355a <=( a19354a and a19347a );
a19359a <=( (not A166) and (not A167) );
a19360a <=( A170 and a19359a );
a19364a <=( A201 and (not A200) );
a19365a <=( A199 and a19364a );
a19366a <=( a19365a and a19360a );
a19370a <=( (not A266) and (not A265) );
a19371a <=( A202 and a19370a );
a19374a <=( (not A299) and A298 );
a19377a <=( A301 and A300 );
a19378a <=( a19377a and a19374a );
a19379a <=( a19378a and a19371a );
a19383a <=( (not A166) and (not A167) );
a19384a <=( A170 and a19383a );
a19388a <=( A201 and (not A200) );
a19389a <=( A199 and a19388a );
a19390a <=( a19389a and a19384a );
a19394a <=( (not A266) and (not A265) );
a19395a <=( A202 and a19394a );
a19398a <=( (not A299) and A298 );
a19401a <=( A302 and A300 );
a19402a <=( a19401a and a19398a );
a19403a <=( a19402a and a19395a );
a19407a <=( (not A166) and (not A167) );
a19408a <=( A170 and a19407a );
a19412a <=( A201 and (not A200) );
a19413a <=( A199 and a19412a );
a19414a <=( a19413a and a19408a );
a19418a <=( A266 and A265 );
a19419a <=( A203 and a19418a );
a19422a <=( (not A299) and A298 );
a19425a <=( A301 and A300 );
a19426a <=( a19425a and a19422a );
a19427a <=( a19426a and a19419a );
a19431a <=( (not A166) and (not A167) );
a19432a <=( A170 and a19431a );
a19436a <=( A201 and (not A200) );
a19437a <=( A199 and a19436a );
a19438a <=( a19437a and a19432a );
a19442a <=( A266 and A265 );
a19443a <=( A203 and a19442a );
a19446a <=( (not A299) and A298 );
a19449a <=( A302 and A300 );
a19450a <=( a19449a and a19446a );
a19451a <=( a19450a and a19443a );
a19455a <=( (not A166) and (not A167) );
a19456a <=( A170 and a19455a );
a19460a <=( A201 and (not A200) );
a19461a <=( A199 and a19460a );
a19462a <=( a19461a and a19456a );
a19466a <=( (not A267) and (not A266) );
a19467a <=( A203 and a19466a );
a19470a <=( (not A299) and A298 );
a19473a <=( A301 and A300 );
a19474a <=( a19473a and a19470a );
a19475a <=( a19474a and a19467a );
a19479a <=( (not A166) and (not A167) );
a19480a <=( A170 and a19479a );
a19484a <=( A201 and (not A200) );
a19485a <=( A199 and a19484a );
a19486a <=( a19485a and a19480a );
a19490a <=( (not A267) and (not A266) );
a19491a <=( A203 and a19490a );
a19494a <=( (not A299) and A298 );
a19497a <=( A302 and A300 );
a19498a <=( a19497a and a19494a );
a19499a <=( a19498a and a19491a );
a19503a <=( (not A166) and (not A167) );
a19504a <=( A170 and a19503a );
a19508a <=( A201 and (not A200) );
a19509a <=( A199 and a19508a );
a19510a <=( a19509a and a19504a );
a19514a <=( (not A266) and (not A265) );
a19515a <=( A203 and a19514a );
a19518a <=( (not A299) and A298 );
a19521a <=( A301 and A300 );
a19522a <=( a19521a and a19518a );
a19523a <=( a19522a and a19515a );
a19527a <=( (not A166) and (not A167) );
a19528a <=( A170 and a19527a );
a19532a <=( A201 and (not A200) );
a19533a <=( A199 and a19532a );
a19534a <=( a19533a and a19528a );
a19538a <=( (not A266) and (not A265) );
a19539a <=( A203 and a19538a );
a19542a <=( (not A299) and A298 );
a19545a <=( A302 and A300 );
a19546a <=( a19545a and a19542a );
a19547a <=( a19546a and a19539a );
a19551a <=( A167 and (not A168) );
a19552a <=( A169 and a19551a );
a19556a <=( A200 and A199 );
a19557a <=( (not A166) and a19556a );
a19558a <=( a19557a and a19552a );
a19562a <=( A267 and (not A266) );
a19563a <=( A265 and a19562a );
a19566a <=( A298 and A268 );
a19569a <=( (not A302) and (not A301) );
a19570a <=( a19569a and a19566a );
a19571a <=( a19570a and a19563a );
a19575a <=( A167 and (not A168) );
a19576a <=( A169 and a19575a );
a19580a <=( A200 and A199 );
a19581a <=( (not A166) and a19580a );
a19582a <=( a19581a and a19576a );
a19586a <=( A267 and (not A266) );
a19587a <=( A265 and a19586a );
a19590a <=( A298 and A269 );
a19593a <=( (not A302) and (not A301) );
a19594a <=( a19593a and a19590a );
a19595a <=( a19594a and a19587a );
a19599a <=( A167 and (not A168) );
a19600a <=( A169 and a19599a );
a19604a <=( A200 and (not A199) );
a19605a <=( (not A166) and a19604a );
a19606a <=( a19605a and a19600a );
a19610a <=( (not A269) and (not A268) );
a19611a <=( (not A266) and a19610a );
a19614a <=( (not A299) and A298 );
a19617a <=( A301 and A300 );
a19618a <=( a19617a and a19614a );
a19619a <=( a19618a and a19611a );
a19623a <=( A167 and (not A168) );
a19624a <=( A169 and a19623a );
a19628a <=( A200 and (not A199) );
a19629a <=( (not A166) and a19628a );
a19630a <=( a19629a and a19624a );
a19634a <=( (not A269) and (not A268) );
a19635a <=( (not A266) and a19634a );
a19638a <=( (not A299) and A298 );
a19641a <=( A302 and A300 );
a19642a <=( a19641a and a19638a );
a19643a <=( a19642a and a19635a );
a19647a <=( A167 and (not A168) );
a19648a <=( A169 and a19647a );
a19652a <=( (not A202) and (not A200) );
a19653a <=( (not A166) and a19652a );
a19654a <=( a19653a and a19648a );
a19658a <=( (not A266) and A265 );
a19659a <=( (not A203) and a19658a );
a19662a <=( A268 and A267 );
a19665a <=( (not A300) and A298 );
a19666a <=( a19665a and a19662a );
a19667a <=( a19666a and a19659a );
a19671a <=( A167 and (not A168) );
a19672a <=( A169 and a19671a );
a19676a <=( (not A202) and (not A200) );
a19677a <=( (not A166) and a19676a );
a19678a <=( a19677a and a19672a );
a19682a <=( (not A266) and A265 );
a19683a <=( (not A203) and a19682a );
a19686a <=( A268 and A267 );
a19689a <=( A299 and A298 );
a19690a <=( a19689a and a19686a );
a19691a <=( a19690a and a19683a );
a19695a <=( A167 and (not A168) );
a19696a <=( A169 and a19695a );
a19700a <=( (not A202) and (not A200) );
a19701a <=( (not A166) and a19700a );
a19702a <=( a19701a and a19696a );
a19706a <=( (not A266) and A265 );
a19707a <=( (not A203) and a19706a );
a19710a <=( A268 and A267 );
a19713a <=( (not A299) and (not A298) );
a19714a <=( a19713a and a19710a );
a19715a <=( a19714a and a19707a );
a19719a <=( A167 and (not A168) );
a19720a <=( A169 and a19719a );
a19724a <=( (not A202) and (not A200) );
a19725a <=( (not A166) and a19724a );
a19726a <=( a19725a and a19720a );
a19730a <=( (not A266) and A265 );
a19731a <=( (not A203) and a19730a );
a19734a <=( A269 and A267 );
a19737a <=( (not A300) and A298 );
a19738a <=( a19737a and a19734a );
a19739a <=( a19738a and a19731a );
a19743a <=( A167 and (not A168) );
a19744a <=( A169 and a19743a );
a19748a <=( (not A202) and (not A200) );
a19749a <=( (not A166) and a19748a );
a19750a <=( a19749a and a19744a );
a19754a <=( (not A266) and A265 );
a19755a <=( (not A203) and a19754a );
a19758a <=( A269 and A267 );
a19761a <=( A299 and A298 );
a19762a <=( a19761a and a19758a );
a19763a <=( a19762a and a19755a );
a19767a <=( A167 and (not A168) );
a19768a <=( A169 and a19767a );
a19772a <=( (not A202) and (not A200) );
a19773a <=( (not A166) and a19772a );
a19774a <=( a19773a and a19768a );
a19778a <=( (not A266) and A265 );
a19779a <=( (not A203) and a19778a );
a19782a <=( A269 and A267 );
a19785a <=( (not A299) and (not A298) );
a19786a <=( a19785a and a19782a );
a19787a <=( a19786a and a19779a );
a19791a <=( A167 and (not A168) );
a19792a <=( A169 and a19791a );
a19796a <=( (not A201) and (not A200) );
a19797a <=( (not A166) and a19796a );
a19798a <=( a19797a and a19792a );
a19802a <=( A267 and (not A266) );
a19803a <=( A265 and a19802a );
a19806a <=( A298 and A268 );
a19809a <=( (not A302) and (not A301) );
a19810a <=( a19809a and a19806a );
a19811a <=( a19810a and a19803a );
a19815a <=( A167 and (not A168) );
a19816a <=( A169 and a19815a );
a19820a <=( (not A201) and (not A200) );
a19821a <=( (not A166) and a19820a );
a19822a <=( a19821a and a19816a );
a19826a <=( A267 and (not A266) );
a19827a <=( A265 and a19826a );
a19830a <=( A298 and A269 );
a19833a <=( (not A302) and (not A301) );
a19834a <=( a19833a and a19830a );
a19835a <=( a19834a and a19827a );
a19839a <=( A167 and (not A168) );
a19840a <=( A169 and a19839a );
a19844a <=( (not A200) and A199 );
a19845a <=( (not A166) and a19844a );
a19846a <=( a19845a and a19840a );
a19850a <=( (not A266) and A202 );
a19851a <=( A201 and a19850a );
a19854a <=( (not A269) and (not A268) );
a19857a <=( A299 and (not A298) );
a19858a <=( a19857a and a19854a );
a19859a <=( a19858a and a19851a );
a19863a <=( A167 and (not A168) );
a19864a <=( A169 and a19863a );
a19868a <=( (not A200) and A199 );
a19869a <=( (not A166) and a19868a );
a19870a <=( a19869a and a19864a );
a19874a <=( (not A266) and A203 );
a19875a <=( A201 and a19874a );
a19878a <=( (not A269) and (not A268) );
a19881a <=( A299 and (not A298) );
a19882a <=( a19881a and a19878a );
a19883a <=( a19882a and a19875a );
a19887a <=( A167 and (not A168) );
a19888a <=( A169 and a19887a );
a19892a <=( (not A200) and (not A199) );
a19893a <=( (not A166) and a19892a );
a19894a <=( a19893a and a19888a );
a19898a <=( A267 and (not A266) );
a19899a <=( A265 and a19898a );
a19902a <=( A298 and A268 );
a19905a <=( (not A302) and (not A301) );
a19906a <=( a19905a and a19902a );
a19907a <=( a19906a and a19899a );
a19911a <=( A167 and (not A168) );
a19912a <=( A169 and a19911a );
a19916a <=( (not A200) and (not A199) );
a19917a <=( (not A166) and a19916a );
a19918a <=( a19917a and a19912a );
a19922a <=( A267 and (not A266) );
a19923a <=( A265 and a19922a );
a19926a <=( A298 and A269 );
a19929a <=( (not A302) and (not A301) );
a19930a <=( a19929a and a19926a );
a19931a <=( a19930a and a19923a );
a19935a <=( (not A167) and (not A168) );
a19936a <=( A169 and a19935a );
a19940a <=( A200 and A199 );
a19941a <=( A166 and a19940a );
a19942a <=( a19941a and a19936a );
a19946a <=( A267 and (not A266) );
a19947a <=( A265 and a19946a );
a19950a <=( A298 and A268 );
a19953a <=( (not A302) and (not A301) );
a19954a <=( a19953a and a19950a );
a19955a <=( a19954a and a19947a );
a19959a <=( (not A167) and (not A168) );
a19960a <=( A169 and a19959a );
a19964a <=( A200 and A199 );
a19965a <=( A166 and a19964a );
a19966a <=( a19965a and a19960a );
a19970a <=( A267 and (not A266) );
a19971a <=( A265 and a19970a );
a19974a <=( A298 and A269 );
a19977a <=( (not A302) and (not A301) );
a19978a <=( a19977a and a19974a );
a19979a <=( a19978a and a19971a );
a19983a <=( (not A167) and (not A168) );
a19984a <=( A169 and a19983a );
a19988a <=( A200 and (not A199) );
a19989a <=( A166 and a19988a );
a19990a <=( a19989a and a19984a );
a19994a <=( (not A269) and (not A268) );
a19995a <=( (not A266) and a19994a );
a19998a <=( (not A299) and A298 );
a20001a <=( A301 and A300 );
a20002a <=( a20001a and a19998a );
a20003a <=( a20002a and a19995a );
a20007a <=( (not A167) and (not A168) );
a20008a <=( A169 and a20007a );
a20012a <=( A200 and (not A199) );
a20013a <=( A166 and a20012a );
a20014a <=( a20013a and a20008a );
a20018a <=( (not A269) and (not A268) );
a20019a <=( (not A266) and a20018a );
a20022a <=( (not A299) and A298 );
a20025a <=( A302 and A300 );
a20026a <=( a20025a and a20022a );
a20027a <=( a20026a and a20019a );
a20031a <=( (not A167) and (not A168) );
a20032a <=( A169 and a20031a );
a20036a <=( (not A202) and (not A200) );
a20037a <=( A166 and a20036a );
a20038a <=( a20037a and a20032a );
a20042a <=( (not A266) and A265 );
a20043a <=( (not A203) and a20042a );
a20046a <=( A268 and A267 );
a20049a <=( (not A300) and A298 );
a20050a <=( a20049a and a20046a );
a20051a <=( a20050a and a20043a );
a20055a <=( (not A167) and (not A168) );
a20056a <=( A169 and a20055a );
a20060a <=( (not A202) and (not A200) );
a20061a <=( A166 and a20060a );
a20062a <=( a20061a and a20056a );
a20066a <=( (not A266) and A265 );
a20067a <=( (not A203) and a20066a );
a20070a <=( A268 and A267 );
a20073a <=( A299 and A298 );
a20074a <=( a20073a and a20070a );
a20075a <=( a20074a and a20067a );
a20079a <=( (not A167) and (not A168) );
a20080a <=( A169 and a20079a );
a20084a <=( (not A202) and (not A200) );
a20085a <=( A166 and a20084a );
a20086a <=( a20085a and a20080a );
a20090a <=( (not A266) and A265 );
a20091a <=( (not A203) and a20090a );
a20094a <=( A268 and A267 );
a20097a <=( (not A299) and (not A298) );
a20098a <=( a20097a and a20094a );
a20099a <=( a20098a and a20091a );
a20103a <=( (not A167) and (not A168) );
a20104a <=( A169 and a20103a );
a20108a <=( (not A202) and (not A200) );
a20109a <=( A166 and a20108a );
a20110a <=( a20109a and a20104a );
a20114a <=( (not A266) and A265 );
a20115a <=( (not A203) and a20114a );
a20118a <=( A269 and A267 );
a20121a <=( (not A300) and A298 );
a20122a <=( a20121a and a20118a );
a20123a <=( a20122a and a20115a );
a20127a <=( (not A167) and (not A168) );
a20128a <=( A169 and a20127a );
a20132a <=( (not A202) and (not A200) );
a20133a <=( A166 and a20132a );
a20134a <=( a20133a and a20128a );
a20138a <=( (not A266) and A265 );
a20139a <=( (not A203) and a20138a );
a20142a <=( A269 and A267 );
a20145a <=( A299 and A298 );
a20146a <=( a20145a and a20142a );
a20147a <=( a20146a and a20139a );
a20151a <=( (not A167) and (not A168) );
a20152a <=( A169 and a20151a );
a20156a <=( (not A202) and (not A200) );
a20157a <=( A166 and a20156a );
a20158a <=( a20157a and a20152a );
a20162a <=( (not A266) and A265 );
a20163a <=( (not A203) and a20162a );
a20166a <=( A269 and A267 );
a20169a <=( (not A299) and (not A298) );
a20170a <=( a20169a and a20166a );
a20171a <=( a20170a and a20163a );
a20175a <=( (not A167) and (not A168) );
a20176a <=( A169 and a20175a );
a20180a <=( (not A201) and (not A200) );
a20181a <=( A166 and a20180a );
a20182a <=( a20181a and a20176a );
a20186a <=( A267 and (not A266) );
a20187a <=( A265 and a20186a );
a20190a <=( A298 and A268 );
a20193a <=( (not A302) and (not A301) );
a20194a <=( a20193a and a20190a );
a20195a <=( a20194a and a20187a );
a20199a <=( (not A167) and (not A168) );
a20200a <=( A169 and a20199a );
a20204a <=( (not A201) and (not A200) );
a20205a <=( A166 and a20204a );
a20206a <=( a20205a and a20200a );
a20210a <=( A267 and (not A266) );
a20211a <=( A265 and a20210a );
a20214a <=( A298 and A269 );
a20217a <=( (not A302) and (not A301) );
a20218a <=( a20217a and a20214a );
a20219a <=( a20218a and a20211a );
a20223a <=( (not A167) and (not A168) );
a20224a <=( A169 and a20223a );
a20228a <=( (not A200) and A199 );
a20229a <=( A166 and a20228a );
a20230a <=( a20229a and a20224a );
a20234a <=( (not A266) and A202 );
a20235a <=( A201 and a20234a );
a20238a <=( (not A269) and (not A268) );
a20241a <=( A299 and (not A298) );
a20242a <=( a20241a and a20238a );
a20243a <=( a20242a and a20235a );
a20247a <=( (not A167) and (not A168) );
a20248a <=( A169 and a20247a );
a20252a <=( (not A200) and A199 );
a20253a <=( A166 and a20252a );
a20254a <=( a20253a and a20248a );
a20258a <=( (not A266) and A203 );
a20259a <=( A201 and a20258a );
a20262a <=( (not A269) and (not A268) );
a20265a <=( A299 and (not A298) );
a20266a <=( a20265a and a20262a );
a20267a <=( a20266a and a20259a );
a20271a <=( (not A167) and (not A168) );
a20272a <=( A169 and a20271a );
a20276a <=( (not A200) and (not A199) );
a20277a <=( A166 and a20276a );
a20278a <=( a20277a and a20272a );
a20282a <=( A267 and (not A266) );
a20283a <=( A265 and a20282a );
a20286a <=( A298 and A268 );
a20289a <=( (not A302) and (not A301) );
a20290a <=( a20289a and a20286a );
a20291a <=( a20290a and a20283a );
a20295a <=( (not A167) and (not A168) );
a20296a <=( A169 and a20295a );
a20300a <=( (not A200) and (not A199) );
a20301a <=( A166 and a20300a );
a20302a <=( a20301a and a20296a );
a20306a <=( A267 and (not A266) );
a20307a <=( A265 and a20306a );
a20310a <=( A298 and A269 );
a20313a <=( (not A302) and (not A301) );
a20314a <=( a20313a and a20310a );
a20315a <=( a20314a and a20307a );
a20319a <=( (not A168) and A169 );
a20320a <=( A170 and a20319a );
a20324a <=( (not A203) and (not A202) );
a20325a <=( (not A200) and a20324a );
a20326a <=( a20325a and a20320a );
a20330a <=( A267 and (not A266) );
a20331a <=( A265 and a20330a );
a20334a <=( A298 and A268 );
a20337a <=( (not A302) and (not A301) );
a20338a <=( a20337a and a20334a );
a20339a <=( a20338a and a20331a );
a20343a <=( (not A168) and A169 );
a20344a <=( A170 and a20343a );
a20348a <=( (not A203) and (not A202) );
a20349a <=( (not A200) and a20348a );
a20350a <=( a20349a and a20344a );
a20354a <=( A267 and (not A266) );
a20355a <=( A265 and a20354a );
a20358a <=( A298 and A269 );
a20361a <=( (not A302) and (not A301) );
a20362a <=( a20361a and a20358a );
a20363a <=( a20362a and a20355a );
a20367a <=( (not A168) and A169 );
a20368a <=( A170 and a20367a );
a20372a <=( A201 and (not A200) );
a20373a <=( A199 and a20372a );
a20374a <=( a20373a and a20368a );
a20378a <=( A266 and A265 );
a20379a <=( A202 and a20378a );
a20382a <=( (not A299) and A298 );
a20385a <=( A301 and A300 );
a20386a <=( a20385a and a20382a );
a20387a <=( a20386a and a20379a );
a20391a <=( (not A168) and A169 );
a20392a <=( A170 and a20391a );
a20396a <=( A201 and (not A200) );
a20397a <=( A199 and a20396a );
a20398a <=( a20397a and a20392a );
a20402a <=( A266 and A265 );
a20403a <=( A202 and a20402a );
a20406a <=( (not A299) and A298 );
a20409a <=( A302 and A300 );
a20410a <=( a20409a and a20406a );
a20411a <=( a20410a and a20403a );
a20415a <=( (not A168) and A169 );
a20416a <=( A170 and a20415a );
a20420a <=( A201 and (not A200) );
a20421a <=( A199 and a20420a );
a20422a <=( a20421a and a20416a );
a20426a <=( (not A267) and (not A266) );
a20427a <=( A202 and a20426a );
a20430a <=( (not A299) and A298 );
a20433a <=( A301 and A300 );
a20434a <=( a20433a and a20430a );
a20435a <=( a20434a and a20427a );
a20439a <=( (not A168) and A169 );
a20440a <=( A170 and a20439a );
a20444a <=( A201 and (not A200) );
a20445a <=( A199 and a20444a );
a20446a <=( a20445a and a20440a );
a20450a <=( (not A267) and (not A266) );
a20451a <=( A202 and a20450a );
a20454a <=( (not A299) and A298 );
a20457a <=( A302 and A300 );
a20458a <=( a20457a and a20454a );
a20459a <=( a20458a and a20451a );
a20463a <=( (not A168) and A169 );
a20464a <=( A170 and a20463a );
a20468a <=( A201 and (not A200) );
a20469a <=( A199 and a20468a );
a20470a <=( a20469a and a20464a );
a20474a <=( (not A266) and (not A265) );
a20475a <=( A202 and a20474a );
a20478a <=( (not A299) and A298 );
a20481a <=( A301 and A300 );
a20482a <=( a20481a and a20478a );
a20483a <=( a20482a and a20475a );
a20487a <=( (not A168) and A169 );
a20488a <=( A170 and a20487a );
a20492a <=( A201 and (not A200) );
a20493a <=( A199 and a20492a );
a20494a <=( a20493a and a20488a );
a20498a <=( (not A266) and (not A265) );
a20499a <=( A202 and a20498a );
a20502a <=( (not A299) and A298 );
a20505a <=( A302 and A300 );
a20506a <=( a20505a and a20502a );
a20507a <=( a20506a and a20499a );
a20511a <=( (not A168) and A169 );
a20512a <=( A170 and a20511a );
a20516a <=( A201 and (not A200) );
a20517a <=( A199 and a20516a );
a20518a <=( a20517a and a20512a );
a20522a <=( A266 and A265 );
a20523a <=( A203 and a20522a );
a20526a <=( (not A299) and A298 );
a20529a <=( A301 and A300 );
a20530a <=( a20529a and a20526a );
a20531a <=( a20530a and a20523a );
a20535a <=( (not A168) and A169 );
a20536a <=( A170 and a20535a );
a20540a <=( A201 and (not A200) );
a20541a <=( A199 and a20540a );
a20542a <=( a20541a and a20536a );
a20546a <=( A266 and A265 );
a20547a <=( A203 and a20546a );
a20550a <=( (not A299) and A298 );
a20553a <=( A302 and A300 );
a20554a <=( a20553a and a20550a );
a20555a <=( a20554a and a20547a );
a20559a <=( (not A168) and A169 );
a20560a <=( A170 and a20559a );
a20564a <=( A201 and (not A200) );
a20565a <=( A199 and a20564a );
a20566a <=( a20565a and a20560a );
a20570a <=( (not A267) and (not A266) );
a20571a <=( A203 and a20570a );
a20574a <=( (not A299) and A298 );
a20577a <=( A301 and A300 );
a20578a <=( a20577a and a20574a );
a20579a <=( a20578a and a20571a );
a20583a <=( (not A168) and A169 );
a20584a <=( A170 and a20583a );
a20588a <=( A201 and (not A200) );
a20589a <=( A199 and a20588a );
a20590a <=( a20589a and a20584a );
a20594a <=( (not A267) and (not A266) );
a20595a <=( A203 and a20594a );
a20598a <=( (not A299) and A298 );
a20601a <=( A302 and A300 );
a20602a <=( a20601a and a20598a );
a20603a <=( a20602a and a20595a );
a20607a <=( (not A168) and A169 );
a20608a <=( A170 and a20607a );
a20612a <=( A201 and (not A200) );
a20613a <=( A199 and a20612a );
a20614a <=( a20613a and a20608a );
a20618a <=( (not A266) and (not A265) );
a20619a <=( A203 and a20618a );
a20622a <=( (not A299) and A298 );
a20625a <=( A301 and A300 );
a20626a <=( a20625a and a20622a );
a20627a <=( a20626a and a20619a );
a20631a <=( (not A168) and A169 );
a20632a <=( A170 and a20631a );
a20636a <=( A201 and (not A200) );
a20637a <=( A199 and a20636a );
a20638a <=( a20637a and a20632a );
a20642a <=( (not A266) and (not A265) );
a20643a <=( A203 and a20642a );
a20646a <=( (not A299) and A298 );
a20649a <=( A302 and A300 );
a20650a <=( a20649a and a20646a );
a20651a <=( a20650a and a20643a );
a20655a <=( A167 and A169 );
a20656a <=( (not A170) and a20655a );
a20660a <=( A200 and A199 );
a20661a <=( A166 and a20660a );
a20662a <=( a20661a and a20656a );
a20666a <=( (not A269) and (not A268) );
a20667a <=( (not A266) and a20666a );
a20670a <=( (not A299) and A298 );
a20673a <=( A301 and A300 );
a20674a <=( a20673a and a20670a );
a20675a <=( a20674a and a20667a );
a20679a <=( A167 and A169 );
a20680a <=( (not A170) and a20679a );
a20684a <=( A200 and A199 );
a20685a <=( A166 and a20684a );
a20686a <=( a20685a and a20680a );
a20690a <=( (not A269) and (not A268) );
a20691a <=( (not A266) and a20690a );
a20694a <=( (not A299) and A298 );
a20697a <=( A302 and A300 );
a20698a <=( a20697a and a20694a );
a20699a <=( a20698a and a20691a );
a20703a <=( A167 and A169 );
a20704a <=( (not A170) and a20703a );
a20708a <=( A200 and (not A199) );
a20709a <=( A166 and a20708a );
a20710a <=( a20709a and a20704a );
a20714a <=( A267 and (not A266) );
a20715a <=( A265 and a20714a );
a20718a <=( A298 and A268 );
a20721a <=( (not A302) and (not A301) );
a20722a <=( a20721a and a20718a );
a20723a <=( a20722a and a20715a );
a20727a <=( A167 and A169 );
a20728a <=( (not A170) and a20727a );
a20732a <=( A200 and (not A199) );
a20733a <=( A166 and a20732a );
a20734a <=( a20733a and a20728a );
a20738a <=( A267 and (not A266) );
a20739a <=( A265 and a20738a );
a20742a <=( A298 and A269 );
a20745a <=( (not A302) and (not A301) );
a20746a <=( a20745a and a20742a );
a20747a <=( a20746a and a20739a );
a20751a <=( A167 and A169 );
a20752a <=( (not A170) and a20751a );
a20756a <=( (not A202) and (not A200) );
a20757a <=( A166 and a20756a );
a20758a <=( a20757a and a20752a );
a20762a <=( A266 and A265 );
a20763a <=( (not A203) and a20762a );
a20766a <=( (not A299) and A298 );
a20769a <=( A301 and A300 );
a20770a <=( a20769a and a20766a );
a20771a <=( a20770a and a20763a );
a20775a <=( A167 and A169 );
a20776a <=( (not A170) and a20775a );
a20780a <=( (not A202) and (not A200) );
a20781a <=( A166 and a20780a );
a20782a <=( a20781a and a20776a );
a20786a <=( A266 and A265 );
a20787a <=( (not A203) and a20786a );
a20790a <=( (not A299) and A298 );
a20793a <=( A302 and A300 );
a20794a <=( a20793a and a20790a );
a20795a <=( a20794a and a20787a );
a20799a <=( A167 and A169 );
a20800a <=( (not A170) and a20799a );
a20804a <=( (not A202) and (not A200) );
a20805a <=( A166 and a20804a );
a20806a <=( a20805a and a20800a );
a20810a <=( (not A267) and (not A266) );
a20811a <=( (not A203) and a20810a );
a20814a <=( (not A299) and A298 );
a20817a <=( A301 and A300 );
a20818a <=( a20817a and a20814a );
a20819a <=( a20818a and a20811a );
a20823a <=( A167 and A169 );
a20824a <=( (not A170) and a20823a );
a20828a <=( (not A202) and (not A200) );
a20829a <=( A166 and a20828a );
a20830a <=( a20829a and a20824a );
a20834a <=( (not A267) and (not A266) );
a20835a <=( (not A203) and a20834a );
a20838a <=( (not A299) and A298 );
a20841a <=( A302 and A300 );
a20842a <=( a20841a and a20838a );
a20843a <=( a20842a and a20835a );
a20847a <=( A167 and A169 );
a20848a <=( (not A170) and a20847a );
a20852a <=( (not A202) and (not A200) );
a20853a <=( A166 and a20852a );
a20854a <=( a20853a and a20848a );
a20858a <=( (not A266) and (not A265) );
a20859a <=( (not A203) and a20858a );
a20862a <=( (not A299) and A298 );
a20865a <=( A301 and A300 );
a20866a <=( a20865a and a20862a );
a20867a <=( a20866a and a20859a );
a20871a <=( A167 and A169 );
a20872a <=( (not A170) and a20871a );
a20876a <=( (not A202) and (not A200) );
a20877a <=( A166 and a20876a );
a20878a <=( a20877a and a20872a );
a20882a <=( (not A266) and (not A265) );
a20883a <=( (not A203) and a20882a );
a20886a <=( (not A299) and A298 );
a20889a <=( A302 and A300 );
a20890a <=( a20889a and a20886a );
a20891a <=( a20890a and a20883a );
a20895a <=( A167 and A169 );
a20896a <=( (not A170) and a20895a );
a20900a <=( (not A201) and (not A200) );
a20901a <=( A166 and a20900a );
a20902a <=( a20901a and a20896a );
a20906a <=( (not A269) and (not A268) );
a20907a <=( (not A266) and a20906a );
a20910a <=( (not A299) and A298 );
a20913a <=( A301 and A300 );
a20914a <=( a20913a and a20910a );
a20915a <=( a20914a and a20907a );
a20919a <=( A167 and A169 );
a20920a <=( (not A170) and a20919a );
a20924a <=( (not A201) and (not A200) );
a20925a <=( A166 and a20924a );
a20926a <=( a20925a and a20920a );
a20930a <=( (not A269) and (not A268) );
a20931a <=( (not A266) and a20930a );
a20934a <=( (not A299) and A298 );
a20937a <=( A302 and A300 );
a20938a <=( a20937a and a20934a );
a20939a <=( a20938a and a20931a );
a20943a <=( A167 and A169 );
a20944a <=( (not A170) and a20943a );
a20948a <=( (not A200) and A199 );
a20949a <=( A166 and a20948a );
a20950a <=( a20949a and a20944a );
a20954a <=( (not A265) and A202 );
a20955a <=( A201 and a20954a );
a20958a <=( A298 and A266 );
a20961a <=( (not A302) and (not A301) );
a20962a <=( a20961a and a20958a );
a20963a <=( a20962a and a20955a );
a20967a <=( A167 and A169 );
a20968a <=( (not A170) and a20967a );
a20972a <=( (not A200) and A199 );
a20973a <=( A166 and a20972a );
a20974a <=( a20973a and a20968a );
a20978a <=( (not A265) and A203 );
a20979a <=( A201 and a20978a );
a20982a <=( A298 and A266 );
a20985a <=( (not A302) and (not A301) );
a20986a <=( a20985a and a20982a );
a20987a <=( a20986a and a20979a );
a20991a <=( A167 and A169 );
a20992a <=( (not A170) and a20991a );
a20996a <=( (not A200) and (not A199) );
a20997a <=( A166 and a20996a );
a20998a <=( a20997a and a20992a );
a21002a <=( (not A269) and (not A268) );
a21003a <=( (not A266) and a21002a );
a21006a <=( (not A299) and A298 );
a21009a <=( A301 and A300 );
a21010a <=( a21009a and a21006a );
a21011a <=( a21010a and a21003a );
a21015a <=( A167 and A169 );
a21016a <=( (not A170) and a21015a );
a21020a <=( (not A200) and (not A199) );
a21021a <=( A166 and a21020a );
a21022a <=( a21021a and a21016a );
a21026a <=( (not A269) and (not A268) );
a21027a <=( (not A266) and a21026a );
a21030a <=( (not A299) and A298 );
a21033a <=( A302 and A300 );
a21034a <=( a21033a and a21030a );
a21035a <=( a21034a and a21027a );
a21039a <=( (not A167) and A169 );
a21040a <=( (not A170) and a21039a );
a21044a <=( A200 and A199 );
a21045a <=( (not A166) and a21044a );
a21046a <=( a21045a and a21040a );
a21050a <=( (not A269) and (not A268) );
a21051a <=( (not A266) and a21050a );
a21054a <=( (not A299) and A298 );
a21057a <=( A301 and A300 );
a21058a <=( a21057a and a21054a );
a21059a <=( a21058a and a21051a );
a21063a <=( (not A167) and A169 );
a21064a <=( (not A170) and a21063a );
a21068a <=( A200 and A199 );
a21069a <=( (not A166) and a21068a );
a21070a <=( a21069a and a21064a );
a21074a <=( (not A269) and (not A268) );
a21075a <=( (not A266) and a21074a );
a21078a <=( (not A299) and A298 );
a21081a <=( A302 and A300 );
a21082a <=( a21081a and a21078a );
a21083a <=( a21082a and a21075a );
a21087a <=( (not A167) and A169 );
a21088a <=( (not A170) and a21087a );
a21092a <=( A200 and (not A199) );
a21093a <=( (not A166) and a21092a );
a21094a <=( a21093a and a21088a );
a21098a <=( A267 and (not A266) );
a21099a <=( A265 and a21098a );
a21102a <=( A298 and A268 );
a21105a <=( (not A302) and (not A301) );
a21106a <=( a21105a and a21102a );
a21107a <=( a21106a and a21099a );
a21111a <=( (not A167) and A169 );
a21112a <=( (not A170) and a21111a );
a21116a <=( A200 and (not A199) );
a21117a <=( (not A166) and a21116a );
a21118a <=( a21117a and a21112a );
a21122a <=( A267 and (not A266) );
a21123a <=( A265 and a21122a );
a21126a <=( A298 and A269 );
a21129a <=( (not A302) and (not A301) );
a21130a <=( a21129a and a21126a );
a21131a <=( a21130a and a21123a );
a21135a <=( (not A167) and A169 );
a21136a <=( (not A170) and a21135a );
a21140a <=( (not A202) and (not A200) );
a21141a <=( (not A166) and a21140a );
a21142a <=( a21141a and a21136a );
a21146a <=( A266 and A265 );
a21147a <=( (not A203) and a21146a );
a21150a <=( (not A299) and A298 );
a21153a <=( A301 and A300 );
a21154a <=( a21153a and a21150a );
a21155a <=( a21154a and a21147a );
a21159a <=( (not A167) and A169 );
a21160a <=( (not A170) and a21159a );
a21164a <=( (not A202) and (not A200) );
a21165a <=( (not A166) and a21164a );
a21166a <=( a21165a and a21160a );
a21170a <=( A266 and A265 );
a21171a <=( (not A203) and a21170a );
a21174a <=( (not A299) and A298 );
a21177a <=( A302 and A300 );
a21178a <=( a21177a and a21174a );
a21179a <=( a21178a and a21171a );
a21183a <=( (not A167) and A169 );
a21184a <=( (not A170) and a21183a );
a21188a <=( (not A202) and (not A200) );
a21189a <=( (not A166) and a21188a );
a21190a <=( a21189a and a21184a );
a21194a <=( (not A267) and (not A266) );
a21195a <=( (not A203) and a21194a );
a21198a <=( (not A299) and A298 );
a21201a <=( A301 and A300 );
a21202a <=( a21201a and a21198a );
a21203a <=( a21202a and a21195a );
a21207a <=( (not A167) and A169 );
a21208a <=( (not A170) and a21207a );
a21212a <=( (not A202) and (not A200) );
a21213a <=( (not A166) and a21212a );
a21214a <=( a21213a and a21208a );
a21218a <=( (not A267) and (not A266) );
a21219a <=( (not A203) and a21218a );
a21222a <=( (not A299) and A298 );
a21225a <=( A302 and A300 );
a21226a <=( a21225a and a21222a );
a21227a <=( a21226a and a21219a );
a21231a <=( (not A167) and A169 );
a21232a <=( (not A170) and a21231a );
a21236a <=( (not A202) and (not A200) );
a21237a <=( (not A166) and a21236a );
a21238a <=( a21237a and a21232a );
a21242a <=( (not A266) and (not A265) );
a21243a <=( (not A203) and a21242a );
a21246a <=( (not A299) and A298 );
a21249a <=( A301 and A300 );
a21250a <=( a21249a and a21246a );
a21251a <=( a21250a and a21243a );
a21255a <=( (not A167) and A169 );
a21256a <=( (not A170) and a21255a );
a21260a <=( (not A202) and (not A200) );
a21261a <=( (not A166) and a21260a );
a21262a <=( a21261a and a21256a );
a21266a <=( (not A266) and (not A265) );
a21267a <=( (not A203) and a21266a );
a21270a <=( (not A299) and A298 );
a21273a <=( A302 and A300 );
a21274a <=( a21273a and a21270a );
a21275a <=( a21274a and a21267a );
a21279a <=( (not A167) and A169 );
a21280a <=( (not A170) and a21279a );
a21284a <=( (not A201) and (not A200) );
a21285a <=( (not A166) and a21284a );
a21286a <=( a21285a and a21280a );
a21290a <=( (not A269) and (not A268) );
a21291a <=( (not A266) and a21290a );
a21294a <=( (not A299) and A298 );
a21297a <=( A301 and A300 );
a21298a <=( a21297a and a21294a );
a21299a <=( a21298a and a21291a );
a21303a <=( (not A167) and A169 );
a21304a <=( (not A170) and a21303a );
a21308a <=( (not A201) and (not A200) );
a21309a <=( (not A166) and a21308a );
a21310a <=( a21309a and a21304a );
a21314a <=( (not A269) and (not A268) );
a21315a <=( (not A266) and a21314a );
a21318a <=( (not A299) and A298 );
a21321a <=( A302 and A300 );
a21322a <=( a21321a and a21318a );
a21323a <=( a21322a and a21315a );
a21327a <=( (not A167) and A169 );
a21328a <=( (not A170) and a21327a );
a21332a <=( (not A200) and A199 );
a21333a <=( (not A166) and a21332a );
a21334a <=( a21333a and a21328a );
a21338a <=( (not A265) and A202 );
a21339a <=( A201 and a21338a );
a21342a <=( A298 and A266 );
a21345a <=( (not A302) and (not A301) );
a21346a <=( a21345a and a21342a );
a21347a <=( a21346a and a21339a );
a21351a <=( (not A167) and A169 );
a21352a <=( (not A170) and a21351a );
a21356a <=( (not A200) and A199 );
a21357a <=( (not A166) and a21356a );
a21358a <=( a21357a and a21352a );
a21362a <=( (not A265) and A203 );
a21363a <=( A201 and a21362a );
a21366a <=( A298 and A266 );
a21369a <=( (not A302) and (not A301) );
a21370a <=( a21369a and a21366a );
a21371a <=( a21370a and a21363a );
a21375a <=( (not A167) and A169 );
a21376a <=( (not A170) and a21375a );
a21380a <=( (not A200) and (not A199) );
a21381a <=( (not A166) and a21380a );
a21382a <=( a21381a and a21376a );
a21386a <=( (not A269) and (not A268) );
a21387a <=( (not A266) and a21386a );
a21390a <=( (not A299) and A298 );
a21393a <=( A301 and A300 );
a21394a <=( a21393a and a21390a );
a21395a <=( a21394a and a21387a );
a21399a <=( (not A167) and A169 );
a21400a <=( (not A170) and a21399a );
a21404a <=( (not A200) and (not A199) );
a21405a <=( (not A166) and a21404a );
a21406a <=( a21405a and a21400a );
a21410a <=( (not A269) and (not A268) );
a21411a <=( (not A266) and a21410a );
a21414a <=( (not A299) and A298 );
a21417a <=( A302 and A300 );
a21418a <=( a21417a and a21414a );
a21419a <=( a21418a and a21411a );
a21423a <=( (not A166) and (not A167) );
a21424a <=( (not A169) and a21423a );
a21428a <=( (not A203) and (not A202) );
a21429a <=( (not A200) and a21428a );
a21430a <=( a21429a and a21424a );
a21434a <=( A267 and (not A266) );
a21435a <=( A265 and a21434a );
a21438a <=( A298 and A268 );
a21441a <=( (not A302) and (not A301) );
a21442a <=( a21441a and a21438a );
a21443a <=( a21442a and a21435a );
a21447a <=( (not A166) and (not A167) );
a21448a <=( (not A169) and a21447a );
a21452a <=( (not A203) and (not A202) );
a21453a <=( (not A200) and a21452a );
a21454a <=( a21453a and a21448a );
a21458a <=( A267 and (not A266) );
a21459a <=( A265 and a21458a );
a21462a <=( A298 and A269 );
a21465a <=( (not A302) and (not A301) );
a21466a <=( a21465a and a21462a );
a21467a <=( a21466a and a21459a );
a21471a <=( (not A166) and (not A167) );
a21472a <=( (not A169) and a21471a );
a21476a <=( A201 and (not A200) );
a21477a <=( A199 and a21476a );
a21478a <=( a21477a and a21472a );
a21482a <=( A266 and A265 );
a21483a <=( A202 and a21482a );
a21486a <=( (not A299) and A298 );
a21489a <=( A301 and A300 );
a21490a <=( a21489a and a21486a );
a21491a <=( a21490a and a21483a );
a21495a <=( (not A166) and (not A167) );
a21496a <=( (not A169) and a21495a );
a21500a <=( A201 and (not A200) );
a21501a <=( A199 and a21500a );
a21502a <=( a21501a and a21496a );
a21506a <=( A266 and A265 );
a21507a <=( A202 and a21506a );
a21510a <=( (not A299) and A298 );
a21513a <=( A302 and A300 );
a21514a <=( a21513a and a21510a );
a21515a <=( a21514a and a21507a );
a21519a <=( (not A166) and (not A167) );
a21520a <=( (not A169) and a21519a );
a21524a <=( A201 and (not A200) );
a21525a <=( A199 and a21524a );
a21526a <=( a21525a and a21520a );
a21530a <=( (not A267) and (not A266) );
a21531a <=( A202 and a21530a );
a21534a <=( (not A299) and A298 );
a21537a <=( A301 and A300 );
a21538a <=( a21537a and a21534a );
a21539a <=( a21538a and a21531a );
a21543a <=( (not A166) and (not A167) );
a21544a <=( (not A169) and a21543a );
a21548a <=( A201 and (not A200) );
a21549a <=( A199 and a21548a );
a21550a <=( a21549a and a21544a );
a21554a <=( (not A267) and (not A266) );
a21555a <=( A202 and a21554a );
a21558a <=( (not A299) and A298 );
a21561a <=( A302 and A300 );
a21562a <=( a21561a and a21558a );
a21563a <=( a21562a and a21555a );
a21567a <=( (not A166) and (not A167) );
a21568a <=( (not A169) and a21567a );
a21572a <=( A201 and (not A200) );
a21573a <=( A199 and a21572a );
a21574a <=( a21573a and a21568a );
a21578a <=( (not A266) and (not A265) );
a21579a <=( A202 and a21578a );
a21582a <=( (not A299) and A298 );
a21585a <=( A301 and A300 );
a21586a <=( a21585a and a21582a );
a21587a <=( a21586a and a21579a );
a21591a <=( (not A166) and (not A167) );
a21592a <=( (not A169) and a21591a );
a21596a <=( A201 and (not A200) );
a21597a <=( A199 and a21596a );
a21598a <=( a21597a and a21592a );
a21602a <=( (not A266) and (not A265) );
a21603a <=( A202 and a21602a );
a21606a <=( (not A299) and A298 );
a21609a <=( A302 and A300 );
a21610a <=( a21609a and a21606a );
a21611a <=( a21610a and a21603a );
a21615a <=( (not A166) and (not A167) );
a21616a <=( (not A169) and a21615a );
a21620a <=( A201 and (not A200) );
a21621a <=( A199 and a21620a );
a21622a <=( a21621a and a21616a );
a21626a <=( A266 and A265 );
a21627a <=( A203 and a21626a );
a21630a <=( (not A299) and A298 );
a21633a <=( A301 and A300 );
a21634a <=( a21633a and a21630a );
a21635a <=( a21634a and a21627a );
a21639a <=( (not A166) and (not A167) );
a21640a <=( (not A169) and a21639a );
a21644a <=( A201 and (not A200) );
a21645a <=( A199 and a21644a );
a21646a <=( a21645a and a21640a );
a21650a <=( A266 and A265 );
a21651a <=( A203 and a21650a );
a21654a <=( (not A299) and A298 );
a21657a <=( A302 and A300 );
a21658a <=( a21657a and a21654a );
a21659a <=( a21658a and a21651a );
a21663a <=( (not A166) and (not A167) );
a21664a <=( (not A169) and a21663a );
a21668a <=( A201 and (not A200) );
a21669a <=( A199 and a21668a );
a21670a <=( a21669a and a21664a );
a21674a <=( (not A267) and (not A266) );
a21675a <=( A203 and a21674a );
a21678a <=( (not A299) and A298 );
a21681a <=( A301 and A300 );
a21682a <=( a21681a and a21678a );
a21683a <=( a21682a and a21675a );
a21687a <=( (not A166) and (not A167) );
a21688a <=( (not A169) and a21687a );
a21692a <=( A201 and (not A200) );
a21693a <=( A199 and a21692a );
a21694a <=( a21693a and a21688a );
a21698a <=( (not A267) and (not A266) );
a21699a <=( A203 and a21698a );
a21702a <=( (not A299) and A298 );
a21705a <=( A302 and A300 );
a21706a <=( a21705a and a21702a );
a21707a <=( a21706a and a21699a );
a21711a <=( (not A166) and (not A167) );
a21712a <=( (not A169) and a21711a );
a21716a <=( A201 and (not A200) );
a21717a <=( A199 and a21716a );
a21718a <=( a21717a and a21712a );
a21722a <=( (not A266) and (not A265) );
a21723a <=( A203 and a21722a );
a21726a <=( (not A299) and A298 );
a21729a <=( A301 and A300 );
a21730a <=( a21729a and a21726a );
a21731a <=( a21730a and a21723a );
a21735a <=( (not A166) and (not A167) );
a21736a <=( (not A169) and a21735a );
a21740a <=( A201 and (not A200) );
a21741a <=( A199 and a21740a );
a21742a <=( a21741a and a21736a );
a21746a <=( (not A266) and (not A265) );
a21747a <=( A203 and a21746a );
a21750a <=( (not A299) and A298 );
a21753a <=( A302 and A300 );
a21754a <=( a21753a and a21750a );
a21755a <=( a21754a and a21747a );
a21759a <=( A167 and (not A168) );
a21760a <=( (not A169) and a21759a );
a21764a <=( A200 and A199 );
a21765a <=( A166 and a21764a );
a21766a <=( a21765a and a21760a );
a21770a <=( A267 and (not A266) );
a21771a <=( A265 and a21770a );
a21774a <=( A298 and A268 );
a21777a <=( (not A302) and (not A301) );
a21778a <=( a21777a and a21774a );
a21779a <=( a21778a and a21771a );
a21783a <=( A167 and (not A168) );
a21784a <=( (not A169) and a21783a );
a21788a <=( A200 and A199 );
a21789a <=( A166 and a21788a );
a21790a <=( a21789a and a21784a );
a21794a <=( A267 and (not A266) );
a21795a <=( A265 and a21794a );
a21798a <=( A298 and A269 );
a21801a <=( (not A302) and (not A301) );
a21802a <=( a21801a and a21798a );
a21803a <=( a21802a and a21795a );
a21807a <=( A167 and (not A168) );
a21808a <=( (not A169) and a21807a );
a21812a <=( A200 and (not A199) );
a21813a <=( A166 and a21812a );
a21814a <=( a21813a and a21808a );
a21818a <=( (not A269) and (not A268) );
a21819a <=( (not A266) and a21818a );
a21822a <=( (not A299) and A298 );
a21825a <=( A301 and A300 );
a21826a <=( a21825a and a21822a );
a21827a <=( a21826a and a21819a );
a21831a <=( A167 and (not A168) );
a21832a <=( (not A169) and a21831a );
a21836a <=( A200 and (not A199) );
a21837a <=( A166 and a21836a );
a21838a <=( a21837a and a21832a );
a21842a <=( (not A269) and (not A268) );
a21843a <=( (not A266) and a21842a );
a21846a <=( (not A299) and A298 );
a21849a <=( A302 and A300 );
a21850a <=( a21849a and a21846a );
a21851a <=( a21850a and a21843a );
a21855a <=( A167 and (not A168) );
a21856a <=( (not A169) and a21855a );
a21860a <=( (not A202) and (not A200) );
a21861a <=( A166 and a21860a );
a21862a <=( a21861a and a21856a );
a21866a <=( (not A266) and A265 );
a21867a <=( (not A203) and a21866a );
a21870a <=( A268 and A267 );
a21873a <=( (not A300) and A298 );
a21874a <=( a21873a and a21870a );
a21875a <=( a21874a and a21867a );
a21879a <=( A167 and (not A168) );
a21880a <=( (not A169) and a21879a );
a21884a <=( (not A202) and (not A200) );
a21885a <=( A166 and a21884a );
a21886a <=( a21885a and a21880a );
a21890a <=( (not A266) and A265 );
a21891a <=( (not A203) and a21890a );
a21894a <=( A268 and A267 );
a21897a <=( A299 and A298 );
a21898a <=( a21897a and a21894a );
a21899a <=( a21898a and a21891a );
a21903a <=( A167 and (not A168) );
a21904a <=( (not A169) and a21903a );
a21908a <=( (not A202) and (not A200) );
a21909a <=( A166 and a21908a );
a21910a <=( a21909a and a21904a );
a21914a <=( (not A266) and A265 );
a21915a <=( (not A203) and a21914a );
a21918a <=( A268 and A267 );
a21921a <=( (not A299) and (not A298) );
a21922a <=( a21921a and a21918a );
a21923a <=( a21922a and a21915a );
a21927a <=( A167 and (not A168) );
a21928a <=( (not A169) and a21927a );
a21932a <=( (not A202) and (not A200) );
a21933a <=( A166 and a21932a );
a21934a <=( a21933a and a21928a );
a21938a <=( (not A266) and A265 );
a21939a <=( (not A203) and a21938a );
a21942a <=( A269 and A267 );
a21945a <=( (not A300) and A298 );
a21946a <=( a21945a and a21942a );
a21947a <=( a21946a and a21939a );
a21951a <=( A167 and (not A168) );
a21952a <=( (not A169) and a21951a );
a21956a <=( (not A202) and (not A200) );
a21957a <=( A166 and a21956a );
a21958a <=( a21957a and a21952a );
a21962a <=( (not A266) and A265 );
a21963a <=( (not A203) and a21962a );
a21966a <=( A269 and A267 );
a21969a <=( A299 and A298 );
a21970a <=( a21969a and a21966a );
a21971a <=( a21970a and a21963a );
a21975a <=( A167 and (not A168) );
a21976a <=( (not A169) and a21975a );
a21980a <=( (not A202) and (not A200) );
a21981a <=( A166 and a21980a );
a21982a <=( a21981a and a21976a );
a21986a <=( (not A266) and A265 );
a21987a <=( (not A203) and a21986a );
a21990a <=( A269 and A267 );
a21993a <=( (not A299) and (not A298) );
a21994a <=( a21993a and a21990a );
a21995a <=( a21994a and a21987a );
a21999a <=( A167 and (not A168) );
a22000a <=( (not A169) and a21999a );
a22004a <=( (not A201) and (not A200) );
a22005a <=( A166 and a22004a );
a22006a <=( a22005a and a22000a );
a22010a <=( A267 and (not A266) );
a22011a <=( A265 and a22010a );
a22014a <=( A298 and A268 );
a22017a <=( (not A302) and (not A301) );
a22018a <=( a22017a and a22014a );
a22019a <=( a22018a and a22011a );
a22023a <=( A167 and (not A168) );
a22024a <=( (not A169) and a22023a );
a22028a <=( (not A201) and (not A200) );
a22029a <=( A166 and a22028a );
a22030a <=( a22029a and a22024a );
a22034a <=( A267 and (not A266) );
a22035a <=( A265 and a22034a );
a22038a <=( A298 and A269 );
a22041a <=( (not A302) and (not A301) );
a22042a <=( a22041a and a22038a );
a22043a <=( a22042a and a22035a );
a22047a <=( A167 and (not A168) );
a22048a <=( (not A169) and a22047a );
a22052a <=( (not A200) and A199 );
a22053a <=( A166 and a22052a );
a22054a <=( a22053a and a22048a );
a22058a <=( (not A266) and A202 );
a22059a <=( A201 and a22058a );
a22062a <=( (not A269) and (not A268) );
a22065a <=( A299 and (not A298) );
a22066a <=( a22065a and a22062a );
a22067a <=( a22066a and a22059a );
a22071a <=( A167 and (not A168) );
a22072a <=( (not A169) and a22071a );
a22076a <=( (not A200) and A199 );
a22077a <=( A166 and a22076a );
a22078a <=( a22077a and a22072a );
a22082a <=( (not A266) and A203 );
a22083a <=( A201 and a22082a );
a22086a <=( (not A269) and (not A268) );
a22089a <=( A299 and (not A298) );
a22090a <=( a22089a and a22086a );
a22091a <=( a22090a and a22083a );
a22095a <=( A167 and (not A168) );
a22096a <=( (not A169) and a22095a );
a22100a <=( (not A200) and (not A199) );
a22101a <=( A166 and a22100a );
a22102a <=( a22101a and a22096a );
a22106a <=( A267 and (not A266) );
a22107a <=( A265 and a22106a );
a22110a <=( A298 and A268 );
a22113a <=( (not A302) and (not A301) );
a22114a <=( a22113a and a22110a );
a22115a <=( a22114a and a22107a );
a22119a <=( A167 and (not A168) );
a22120a <=( (not A169) and a22119a );
a22124a <=( (not A200) and (not A199) );
a22125a <=( A166 and a22124a );
a22126a <=( a22125a and a22120a );
a22130a <=( A267 and (not A266) );
a22131a <=( A265 and a22130a );
a22134a <=( A298 and A269 );
a22137a <=( (not A302) and (not A301) );
a22138a <=( a22137a and a22134a );
a22139a <=( a22138a and a22131a );
a22143a <=( A167 and (not A169) );
a22144a <=( A170 and a22143a );
a22148a <=( A200 and A199 );
a22149a <=( (not A166) and a22148a );
a22150a <=( a22149a and a22144a );
a22154a <=( (not A269) and (not A268) );
a22155a <=( (not A266) and a22154a );
a22158a <=( (not A299) and A298 );
a22161a <=( A301 and A300 );
a22162a <=( a22161a and a22158a );
a22163a <=( a22162a and a22155a );
a22167a <=( A167 and (not A169) );
a22168a <=( A170 and a22167a );
a22172a <=( A200 and A199 );
a22173a <=( (not A166) and a22172a );
a22174a <=( a22173a and a22168a );
a22178a <=( (not A269) and (not A268) );
a22179a <=( (not A266) and a22178a );
a22182a <=( (not A299) and A298 );
a22185a <=( A302 and A300 );
a22186a <=( a22185a and a22182a );
a22187a <=( a22186a and a22179a );
a22191a <=( A167 and (not A169) );
a22192a <=( A170 and a22191a );
a22196a <=( A200 and (not A199) );
a22197a <=( (not A166) and a22196a );
a22198a <=( a22197a and a22192a );
a22202a <=( A267 and (not A266) );
a22203a <=( A265 and a22202a );
a22206a <=( A298 and A268 );
a22209a <=( (not A302) and (not A301) );
a22210a <=( a22209a and a22206a );
a22211a <=( a22210a and a22203a );
a22215a <=( A167 and (not A169) );
a22216a <=( A170 and a22215a );
a22220a <=( A200 and (not A199) );
a22221a <=( (not A166) and a22220a );
a22222a <=( a22221a and a22216a );
a22226a <=( A267 and (not A266) );
a22227a <=( A265 and a22226a );
a22230a <=( A298 and A269 );
a22233a <=( (not A302) and (not A301) );
a22234a <=( a22233a and a22230a );
a22235a <=( a22234a and a22227a );
a22239a <=( A167 and (not A169) );
a22240a <=( A170 and a22239a );
a22244a <=( (not A202) and (not A200) );
a22245a <=( (not A166) and a22244a );
a22246a <=( a22245a and a22240a );
a22250a <=( A266 and A265 );
a22251a <=( (not A203) and a22250a );
a22254a <=( (not A299) and A298 );
a22257a <=( A301 and A300 );
a22258a <=( a22257a and a22254a );
a22259a <=( a22258a and a22251a );
a22263a <=( A167 and (not A169) );
a22264a <=( A170 and a22263a );
a22268a <=( (not A202) and (not A200) );
a22269a <=( (not A166) and a22268a );
a22270a <=( a22269a and a22264a );
a22274a <=( A266 and A265 );
a22275a <=( (not A203) and a22274a );
a22278a <=( (not A299) and A298 );
a22281a <=( A302 and A300 );
a22282a <=( a22281a and a22278a );
a22283a <=( a22282a and a22275a );
a22287a <=( A167 and (not A169) );
a22288a <=( A170 and a22287a );
a22292a <=( (not A202) and (not A200) );
a22293a <=( (not A166) and a22292a );
a22294a <=( a22293a and a22288a );
a22298a <=( (not A267) and (not A266) );
a22299a <=( (not A203) and a22298a );
a22302a <=( (not A299) and A298 );
a22305a <=( A301 and A300 );
a22306a <=( a22305a and a22302a );
a22307a <=( a22306a and a22299a );
a22311a <=( A167 and (not A169) );
a22312a <=( A170 and a22311a );
a22316a <=( (not A202) and (not A200) );
a22317a <=( (not A166) and a22316a );
a22318a <=( a22317a and a22312a );
a22322a <=( (not A267) and (not A266) );
a22323a <=( (not A203) and a22322a );
a22326a <=( (not A299) and A298 );
a22329a <=( A302 and A300 );
a22330a <=( a22329a and a22326a );
a22331a <=( a22330a and a22323a );
a22335a <=( A167 and (not A169) );
a22336a <=( A170 and a22335a );
a22340a <=( (not A202) and (not A200) );
a22341a <=( (not A166) and a22340a );
a22342a <=( a22341a and a22336a );
a22346a <=( (not A266) and (not A265) );
a22347a <=( (not A203) and a22346a );
a22350a <=( (not A299) and A298 );
a22353a <=( A301 and A300 );
a22354a <=( a22353a and a22350a );
a22355a <=( a22354a and a22347a );
a22359a <=( A167 and (not A169) );
a22360a <=( A170 and a22359a );
a22364a <=( (not A202) and (not A200) );
a22365a <=( (not A166) and a22364a );
a22366a <=( a22365a and a22360a );
a22370a <=( (not A266) and (not A265) );
a22371a <=( (not A203) and a22370a );
a22374a <=( (not A299) and A298 );
a22377a <=( A302 and A300 );
a22378a <=( a22377a and a22374a );
a22379a <=( a22378a and a22371a );
a22383a <=( A167 and (not A169) );
a22384a <=( A170 and a22383a );
a22388a <=( (not A201) and (not A200) );
a22389a <=( (not A166) and a22388a );
a22390a <=( a22389a and a22384a );
a22394a <=( (not A269) and (not A268) );
a22395a <=( (not A266) and a22394a );
a22398a <=( (not A299) and A298 );
a22401a <=( A301 and A300 );
a22402a <=( a22401a and a22398a );
a22403a <=( a22402a and a22395a );
a22407a <=( A167 and (not A169) );
a22408a <=( A170 and a22407a );
a22412a <=( (not A201) and (not A200) );
a22413a <=( (not A166) and a22412a );
a22414a <=( a22413a and a22408a );
a22418a <=( (not A269) and (not A268) );
a22419a <=( (not A266) and a22418a );
a22422a <=( (not A299) and A298 );
a22425a <=( A302 and A300 );
a22426a <=( a22425a and a22422a );
a22427a <=( a22426a and a22419a );
a22431a <=( A167 and (not A169) );
a22432a <=( A170 and a22431a );
a22436a <=( (not A200) and A199 );
a22437a <=( (not A166) and a22436a );
a22438a <=( a22437a and a22432a );
a22442a <=( (not A265) and A202 );
a22443a <=( A201 and a22442a );
a22446a <=( A298 and A266 );
a22449a <=( (not A302) and (not A301) );
a22450a <=( a22449a and a22446a );
a22451a <=( a22450a and a22443a );
a22455a <=( A167 and (not A169) );
a22456a <=( A170 and a22455a );
a22460a <=( (not A200) and A199 );
a22461a <=( (not A166) and a22460a );
a22462a <=( a22461a and a22456a );
a22466a <=( (not A265) and A203 );
a22467a <=( A201 and a22466a );
a22470a <=( A298 and A266 );
a22473a <=( (not A302) and (not A301) );
a22474a <=( a22473a and a22470a );
a22475a <=( a22474a and a22467a );
a22479a <=( A167 and (not A169) );
a22480a <=( A170 and a22479a );
a22484a <=( (not A200) and (not A199) );
a22485a <=( (not A166) and a22484a );
a22486a <=( a22485a and a22480a );
a22490a <=( (not A269) and (not A268) );
a22491a <=( (not A266) and a22490a );
a22494a <=( (not A299) and A298 );
a22497a <=( A301 and A300 );
a22498a <=( a22497a and a22494a );
a22499a <=( a22498a and a22491a );
a22503a <=( A167 and (not A169) );
a22504a <=( A170 and a22503a );
a22508a <=( (not A200) and (not A199) );
a22509a <=( (not A166) and a22508a );
a22510a <=( a22509a and a22504a );
a22514a <=( (not A269) and (not A268) );
a22515a <=( (not A266) and a22514a );
a22518a <=( (not A299) and A298 );
a22521a <=( A302 and A300 );
a22522a <=( a22521a and a22518a );
a22523a <=( a22522a and a22515a );
a22527a <=( (not A167) and (not A169) );
a22528a <=( A170 and a22527a );
a22532a <=( A200 and A199 );
a22533a <=( A166 and a22532a );
a22534a <=( a22533a and a22528a );
a22538a <=( (not A269) and (not A268) );
a22539a <=( (not A266) and a22538a );
a22542a <=( (not A299) and A298 );
a22545a <=( A301 and A300 );
a22546a <=( a22545a and a22542a );
a22547a <=( a22546a and a22539a );
a22551a <=( (not A167) and (not A169) );
a22552a <=( A170 and a22551a );
a22556a <=( A200 and A199 );
a22557a <=( A166 and a22556a );
a22558a <=( a22557a and a22552a );
a22562a <=( (not A269) and (not A268) );
a22563a <=( (not A266) and a22562a );
a22566a <=( (not A299) and A298 );
a22569a <=( A302 and A300 );
a22570a <=( a22569a and a22566a );
a22571a <=( a22570a and a22563a );
a22575a <=( (not A167) and (not A169) );
a22576a <=( A170 and a22575a );
a22580a <=( A200 and (not A199) );
a22581a <=( A166 and a22580a );
a22582a <=( a22581a and a22576a );
a22586a <=( A267 and (not A266) );
a22587a <=( A265 and a22586a );
a22590a <=( A298 and A268 );
a22593a <=( (not A302) and (not A301) );
a22594a <=( a22593a and a22590a );
a22595a <=( a22594a and a22587a );
a22599a <=( (not A167) and (not A169) );
a22600a <=( A170 and a22599a );
a22604a <=( A200 and (not A199) );
a22605a <=( A166 and a22604a );
a22606a <=( a22605a and a22600a );
a22610a <=( A267 and (not A266) );
a22611a <=( A265 and a22610a );
a22614a <=( A298 and A269 );
a22617a <=( (not A302) and (not A301) );
a22618a <=( a22617a and a22614a );
a22619a <=( a22618a and a22611a );
a22623a <=( (not A167) and (not A169) );
a22624a <=( A170 and a22623a );
a22628a <=( (not A202) and (not A200) );
a22629a <=( A166 and a22628a );
a22630a <=( a22629a and a22624a );
a22634a <=( A266 and A265 );
a22635a <=( (not A203) and a22634a );
a22638a <=( (not A299) and A298 );
a22641a <=( A301 and A300 );
a22642a <=( a22641a and a22638a );
a22643a <=( a22642a and a22635a );
a22647a <=( (not A167) and (not A169) );
a22648a <=( A170 and a22647a );
a22652a <=( (not A202) and (not A200) );
a22653a <=( A166 and a22652a );
a22654a <=( a22653a and a22648a );
a22658a <=( A266 and A265 );
a22659a <=( (not A203) and a22658a );
a22662a <=( (not A299) and A298 );
a22665a <=( A302 and A300 );
a22666a <=( a22665a and a22662a );
a22667a <=( a22666a and a22659a );
a22671a <=( (not A167) and (not A169) );
a22672a <=( A170 and a22671a );
a22676a <=( (not A202) and (not A200) );
a22677a <=( A166 and a22676a );
a22678a <=( a22677a and a22672a );
a22682a <=( (not A267) and (not A266) );
a22683a <=( (not A203) and a22682a );
a22686a <=( (not A299) and A298 );
a22689a <=( A301 and A300 );
a22690a <=( a22689a and a22686a );
a22691a <=( a22690a and a22683a );
a22695a <=( (not A167) and (not A169) );
a22696a <=( A170 and a22695a );
a22700a <=( (not A202) and (not A200) );
a22701a <=( A166 and a22700a );
a22702a <=( a22701a and a22696a );
a22706a <=( (not A267) and (not A266) );
a22707a <=( (not A203) and a22706a );
a22710a <=( (not A299) and A298 );
a22713a <=( A302 and A300 );
a22714a <=( a22713a and a22710a );
a22715a <=( a22714a and a22707a );
a22719a <=( (not A167) and (not A169) );
a22720a <=( A170 and a22719a );
a22724a <=( (not A202) and (not A200) );
a22725a <=( A166 and a22724a );
a22726a <=( a22725a and a22720a );
a22730a <=( (not A266) and (not A265) );
a22731a <=( (not A203) and a22730a );
a22734a <=( (not A299) and A298 );
a22737a <=( A301 and A300 );
a22738a <=( a22737a and a22734a );
a22739a <=( a22738a and a22731a );
a22743a <=( (not A167) and (not A169) );
a22744a <=( A170 and a22743a );
a22748a <=( (not A202) and (not A200) );
a22749a <=( A166 and a22748a );
a22750a <=( a22749a and a22744a );
a22754a <=( (not A266) and (not A265) );
a22755a <=( (not A203) and a22754a );
a22758a <=( (not A299) and A298 );
a22761a <=( A302 and A300 );
a22762a <=( a22761a and a22758a );
a22763a <=( a22762a and a22755a );
a22767a <=( (not A167) and (not A169) );
a22768a <=( A170 and a22767a );
a22772a <=( (not A201) and (not A200) );
a22773a <=( A166 and a22772a );
a22774a <=( a22773a and a22768a );
a22778a <=( (not A269) and (not A268) );
a22779a <=( (not A266) and a22778a );
a22782a <=( (not A299) and A298 );
a22785a <=( A301 and A300 );
a22786a <=( a22785a and a22782a );
a22787a <=( a22786a and a22779a );
a22791a <=( (not A167) and (not A169) );
a22792a <=( A170 and a22791a );
a22796a <=( (not A201) and (not A200) );
a22797a <=( A166 and a22796a );
a22798a <=( a22797a and a22792a );
a22802a <=( (not A269) and (not A268) );
a22803a <=( (not A266) and a22802a );
a22806a <=( (not A299) and A298 );
a22809a <=( A302 and A300 );
a22810a <=( a22809a and a22806a );
a22811a <=( a22810a and a22803a );
a22815a <=( (not A167) and (not A169) );
a22816a <=( A170 and a22815a );
a22820a <=( (not A200) and A199 );
a22821a <=( A166 and a22820a );
a22822a <=( a22821a and a22816a );
a22826a <=( (not A265) and A202 );
a22827a <=( A201 and a22826a );
a22830a <=( A298 and A266 );
a22833a <=( (not A302) and (not A301) );
a22834a <=( a22833a and a22830a );
a22835a <=( a22834a and a22827a );
a22839a <=( (not A167) and (not A169) );
a22840a <=( A170 and a22839a );
a22844a <=( (not A200) and A199 );
a22845a <=( A166 and a22844a );
a22846a <=( a22845a and a22840a );
a22850a <=( (not A265) and A203 );
a22851a <=( A201 and a22850a );
a22854a <=( A298 and A266 );
a22857a <=( (not A302) and (not A301) );
a22858a <=( a22857a and a22854a );
a22859a <=( a22858a and a22851a );
a22863a <=( (not A167) and (not A169) );
a22864a <=( A170 and a22863a );
a22868a <=( (not A200) and (not A199) );
a22869a <=( A166 and a22868a );
a22870a <=( a22869a and a22864a );
a22874a <=( (not A269) and (not A268) );
a22875a <=( (not A266) and a22874a );
a22878a <=( (not A299) and A298 );
a22881a <=( A301 and A300 );
a22882a <=( a22881a and a22878a );
a22883a <=( a22882a and a22875a );
a22887a <=( (not A167) and (not A169) );
a22888a <=( A170 and a22887a );
a22892a <=( (not A200) and (not A199) );
a22893a <=( A166 and a22892a );
a22894a <=( a22893a and a22888a );
a22898a <=( (not A269) and (not A268) );
a22899a <=( (not A266) and a22898a );
a22902a <=( (not A299) and A298 );
a22905a <=( A302 and A300 );
a22906a <=( a22905a and a22902a );
a22907a <=( a22906a and a22899a );
a22911a <=( (not A168) and (not A169) );
a22912a <=( (not A170) and a22911a );
a22916a <=( (not A203) and (not A202) );
a22917a <=( (not A200) and a22916a );
a22918a <=( a22917a and a22912a );
a22922a <=( A267 and (not A266) );
a22923a <=( A265 and a22922a );
a22926a <=( A298 and A268 );
a22929a <=( (not A302) and (not A301) );
a22930a <=( a22929a and a22926a );
a22931a <=( a22930a and a22923a );
a22935a <=( (not A168) and (not A169) );
a22936a <=( (not A170) and a22935a );
a22940a <=( (not A203) and (not A202) );
a22941a <=( (not A200) and a22940a );
a22942a <=( a22941a and a22936a );
a22946a <=( A267 and (not A266) );
a22947a <=( A265 and a22946a );
a22950a <=( A298 and A269 );
a22953a <=( (not A302) and (not A301) );
a22954a <=( a22953a and a22950a );
a22955a <=( a22954a and a22947a );
a22959a <=( (not A168) and (not A169) );
a22960a <=( (not A170) and a22959a );
a22964a <=( A201 and (not A200) );
a22965a <=( A199 and a22964a );
a22966a <=( a22965a and a22960a );
a22970a <=( A266 and A265 );
a22971a <=( A202 and a22970a );
a22974a <=( (not A299) and A298 );
a22977a <=( A301 and A300 );
a22978a <=( a22977a and a22974a );
a22979a <=( a22978a and a22971a );
a22983a <=( (not A168) and (not A169) );
a22984a <=( (not A170) and a22983a );
a22988a <=( A201 and (not A200) );
a22989a <=( A199 and a22988a );
a22990a <=( a22989a and a22984a );
a22994a <=( A266 and A265 );
a22995a <=( A202 and a22994a );
a22998a <=( (not A299) and A298 );
a23001a <=( A302 and A300 );
a23002a <=( a23001a and a22998a );
a23003a <=( a23002a and a22995a );
a23007a <=( (not A168) and (not A169) );
a23008a <=( (not A170) and a23007a );
a23012a <=( A201 and (not A200) );
a23013a <=( A199 and a23012a );
a23014a <=( a23013a and a23008a );
a23018a <=( (not A267) and (not A266) );
a23019a <=( A202 and a23018a );
a23022a <=( (not A299) and A298 );
a23025a <=( A301 and A300 );
a23026a <=( a23025a and a23022a );
a23027a <=( a23026a and a23019a );
a23031a <=( (not A168) and (not A169) );
a23032a <=( (not A170) and a23031a );
a23036a <=( A201 and (not A200) );
a23037a <=( A199 and a23036a );
a23038a <=( a23037a and a23032a );
a23042a <=( (not A267) and (not A266) );
a23043a <=( A202 and a23042a );
a23046a <=( (not A299) and A298 );
a23049a <=( A302 and A300 );
a23050a <=( a23049a and a23046a );
a23051a <=( a23050a and a23043a );
a23055a <=( (not A168) and (not A169) );
a23056a <=( (not A170) and a23055a );
a23060a <=( A201 and (not A200) );
a23061a <=( A199 and a23060a );
a23062a <=( a23061a and a23056a );
a23066a <=( (not A266) and (not A265) );
a23067a <=( A202 and a23066a );
a23070a <=( (not A299) and A298 );
a23073a <=( A301 and A300 );
a23074a <=( a23073a and a23070a );
a23075a <=( a23074a and a23067a );
a23079a <=( (not A168) and (not A169) );
a23080a <=( (not A170) and a23079a );
a23084a <=( A201 and (not A200) );
a23085a <=( A199 and a23084a );
a23086a <=( a23085a and a23080a );
a23090a <=( (not A266) and (not A265) );
a23091a <=( A202 and a23090a );
a23094a <=( (not A299) and A298 );
a23097a <=( A302 and A300 );
a23098a <=( a23097a and a23094a );
a23099a <=( a23098a and a23091a );
a23103a <=( (not A168) and (not A169) );
a23104a <=( (not A170) and a23103a );
a23108a <=( A201 and (not A200) );
a23109a <=( A199 and a23108a );
a23110a <=( a23109a and a23104a );
a23114a <=( A266 and A265 );
a23115a <=( A203 and a23114a );
a23118a <=( (not A299) and A298 );
a23121a <=( A301 and A300 );
a23122a <=( a23121a and a23118a );
a23123a <=( a23122a and a23115a );
a23127a <=( (not A168) and (not A169) );
a23128a <=( (not A170) and a23127a );
a23132a <=( A201 and (not A200) );
a23133a <=( A199 and a23132a );
a23134a <=( a23133a and a23128a );
a23138a <=( A266 and A265 );
a23139a <=( A203 and a23138a );
a23142a <=( (not A299) and A298 );
a23145a <=( A302 and A300 );
a23146a <=( a23145a and a23142a );
a23147a <=( a23146a and a23139a );
a23151a <=( (not A168) and (not A169) );
a23152a <=( (not A170) and a23151a );
a23156a <=( A201 and (not A200) );
a23157a <=( A199 and a23156a );
a23158a <=( a23157a and a23152a );
a23162a <=( (not A267) and (not A266) );
a23163a <=( A203 and a23162a );
a23166a <=( (not A299) and A298 );
a23169a <=( A301 and A300 );
a23170a <=( a23169a and a23166a );
a23171a <=( a23170a and a23163a );
a23175a <=( (not A168) and (not A169) );
a23176a <=( (not A170) and a23175a );
a23180a <=( A201 and (not A200) );
a23181a <=( A199 and a23180a );
a23182a <=( a23181a and a23176a );
a23186a <=( (not A267) and (not A266) );
a23187a <=( A203 and a23186a );
a23190a <=( (not A299) and A298 );
a23193a <=( A302 and A300 );
a23194a <=( a23193a and a23190a );
a23195a <=( a23194a and a23187a );
a23199a <=( (not A168) and (not A169) );
a23200a <=( (not A170) and a23199a );
a23204a <=( A201 and (not A200) );
a23205a <=( A199 and a23204a );
a23206a <=( a23205a and a23200a );
a23210a <=( (not A266) and (not A265) );
a23211a <=( A203 and a23210a );
a23214a <=( (not A299) and A298 );
a23217a <=( A301 and A300 );
a23218a <=( a23217a and a23214a );
a23219a <=( a23218a and a23211a );
a23223a <=( (not A168) and (not A169) );
a23224a <=( (not A170) and a23223a );
a23228a <=( A201 and (not A200) );
a23229a <=( A199 and a23228a );
a23230a <=( a23229a and a23224a );
a23234a <=( (not A266) and (not A265) );
a23235a <=( A203 and a23234a );
a23238a <=( (not A299) and A298 );
a23241a <=( A302 and A300 );
a23242a <=( a23241a and a23238a );
a23243a <=( a23242a and a23235a );
a23247a <=( (not A166) and (not A167) );
a23248a <=( A170 and a23247a );
a23251a <=( (not A200) and A199 );
a23254a <=( A202 and A201 );
a23255a <=( a23254a and a23251a );
a23256a <=( a23255a and a23248a );
a23260a <=( (not A269) and (not A268) );
a23261a <=( (not A266) and a23260a );
a23264a <=( (not A299) and A298 );
a23267a <=( A301 and A300 );
a23268a <=( a23267a and a23264a );
a23269a <=( a23268a and a23261a );
a23273a <=( (not A166) and (not A167) );
a23274a <=( A170 and a23273a );
a23277a <=( (not A200) and A199 );
a23280a <=( A202 and A201 );
a23281a <=( a23280a and a23277a );
a23282a <=( a23281a and a23274a );
a23286a <=( (not A269) and (not A268) );
a23287a <=( (not A266) and a23286a );
a23290a <=( (not A299) and A298 );
a23293a <=( A302 and A300 );
a23294a <=( a23293a and a23290a );
a23295a <=( a23294a and a23287a );
a23299a <=( (not A166) and (not A167) );
a23300a <=( A170 and a23299a );
a23303a <=( (not A200) and A199 );
a23306a <=( A203 and A201 );
a23307a <=( a23306a and a23303a );
a23308a <=( a23307a and a23300a );
a23312a <=( (not A269) and (not A268) );
a23313a <=( (not A266) and a23312a );
a23316a <=( (not A299) and A298 );
a23319a <=( A301 and A300 );
a23320a <=( a23319a and a23316a );
a23321a <=( a23320a and a23313a );
a23325a <=( (not A166) and (not A167) );
a23326a <=( A170 and a23325a );
a23329a <=( (not A200) and A199 );
a23332a <=( A203 and A201 );
a23333a <=( a23332a and a23329a );
a23334a <=( a23333a and a23326a );
a23338a <=( (not A269) and (not A268) );
a23339a <=( (not A266) and a23338a );
a23342a <=( (not A299) and A298 );
a23345a <=( A302 and A300 );
a23346a <=( a23345a and a23342a );
a23347a <=( a23346a and a23339a );
a23351a <=( A167 and (not A168) );
a23352a <=( A169 and a23351a );
a23355a <=( (not A200) and (not A166) );
a23358a <=( (not A203) and (not A202) );
a23359a <=( a23358a and a23355a );
a23360a <=( a23359a and a23352a );
a23364a <=( A267 and (not A266) );
a23365a <=( A265 and a23364a );
a23368a <=( A298 and A268 );
a23371a <=( (not A302) and (not A301) );
a23372a <=( a23371a and a23368a );
a23373a <=( a23372a and a23365a );
a23377a <=( A167 and (not A168) );
a23378a <=( A169 and a23377a );
a23381a <=( (not A200) and (not A166) );
a23384a <=( (not A203) and (not A202) );
a23385a <=( a23384a and a23381a );
a23386a <=( a23385a and a23378a );
a23390a <=( A267 and (not A266) );
a23391a <=( A265 and a23390a );
a23394a <=( A298 and A269 );
a23397a <=( (not A302) and (not A301) );
a23398a <=( a23397a and a23394a );
a23399a <=( a23398a and a23391a );
a23403a <=( A167 and (not A168) );
a23404a <=( A169 and a23403a );
a23407a <=( A199 and (not A166) );
a23410a <=( A201 and (not A200) );
a23411a <=( a23410a and a23407a );
a23412a <=( a23411a and a23404a );
a23416a <=( A266 and A265 );
a23417a <=( A202 and a23416a );
a23420a <=( (not A299) and A298 );
a23423a <=( A301 and A300 );
a23424a <=( a23423a and a23420a );
a23425a <=( a23424a and a23417a );
a23429a <=( A167 and (not A168) );
a23430a <=( A169 and a23429a );
a23433a <=( A199 and (not A166) );
a23436a <=( A201 and (not A200) );
a23437a <=( a23436a and a23433a );
a23438a <=( a23437a and a23430a );
a23442a <=( A266 and A265 );
a23443a <=( A202 and a23442a );
a23446a <=( (not A299) and A298 );
a23449a <=( A302 and A300 );
a23450a <=( a23449a and a23446a );
a23451a <=( a23450a and a23443a );
a23455a <=( A167 and (not A168) );
a23456a <=( A169 and a23455a );
a23459a <=( A199 and (not A166) );
a23462a <=( A201 and (not A200) );
a23463a <=( a23462a and a23459a );
a23464a <=( a23463a and a23456a );
a23468a <=( (not A267) and (not A266) );
a23469a <=( A202 and a23468a );
a23472a <=( (not A299) and A298 );
a23475a <=( A301 and A300 );
a23476a <=( a23475a and a23472a );
a23477a <=( a23476a and a23469a );
a23481a <=( A167 and (not A168) );
a23482a <=( A169 and a23481a );
a23485a <=( A199 and (not A166) );
a23488a <=( A201 and (not A200) );
a23489a <=( a23488a and a23485a );
a23490a <=( a23489a and a23482a );
a23494a <=( (not A267) and (not A266) );
a23495a <=( A202 and a23494a );
a23498a <=( (not A299) and A298 );
a23501a <=( A302 and A300 );
a23502a <=( a23501a and a23498a );
a23503a <=( a23502a and a23495a );
a23507a <=( A167 and (not A168) );
a23508a <=( A169 and a23507a );
a23511a <=( A199 and (not A166) );
a23514a <=( A201 and (not A200) );
a23515a <=( a23514a and a23511a );
a23516a <=( a23515a and a23508a );
a23520a <=( (not A266) and (not A265) );
a23521a <=( A202 and a23520a );
a23524a <=( (not A299) and A298 );
a23527a <=( A301 and A300 );
a23528a <=( a23527a and a23524a );
a23529a <=( a23528a and a23521a );
a23533a <=( A167 and (not A168) );
a23534a <=( A169 and a23533a );
a23537a <=( A199 and (not A166) );
a23540a <=( A201 and (not A200) );
a23541a <=( a23540a and a23537a );
a23542a <=( a23541a and a23534a );
a23546a <=( (not A266) and (not A265) );
a23547a <=( A202 and a23546a );
a23550a <=( (not A299) and A298 );
a23553a <=( A302 and A300 );
a23554a <=( a23553a and a23550a );
a23555a <=( a23554a and a23547a );
a23559a <=( A167 and (not A168) );
a23560a <=( A169 and a23559a );
a23563a <=( A199 and (not A166) );
a23566a <=( A201 and (not A200) );
a23567a <=( a23566a and a23563a );
a23568a <=( a23567a and a23560a );
a23572a <=( A266 and A265 );
a23573a <=( A203 and a23572a );
a23576a <=( (not A299) and A298 );
a23579a <=( A301 and A300 );
a23580a <=( a23579a and a23576a );
a23581a <=( a23580a and a23573a );
a23585a <=( A167 and (not A168) );
a23586a <=( A169 and a23585a );
a23589a <=( A199 and (not A166) );
a23592a <=( A201 and (not A200) );
a23593a <=( a23592a and a23589a );
a23594a <=( a23593a and a23586a );
a23598a <=( A266 and A265 );
a23599a <=( A203 and a23598a );
a23602a <=( (not A299) and A298 );
a23605a <=( A302 and A300 );
a23606a <=( a23605a and a23602a );
a23607a <=( a23606a and a23599a );
a23611a <=( A167 and (not A168) );
a23612a <=( A169 and a23611a );
a23615a <=( A199 and (not A166) );
a23618a <=( A201 and (not A200) );
a23619a <=( a23618a and a23615a );
a23620a <=( a23619a and a23612a );
a23624a <=( (not A267) and (not A266) );
a23625a <=( A203 and a23624a );
a23628a <=( (not A299) and A298 );
a23631a <=( A301 and A300 );
a23632a <=( a23631a and a23628a );
a23633a <=( a23632a and a23625a );
a23637a <=( A167 and (not A168) );
a23638a <=( A169 and a23637a );
a23641a <=( A199 and (not A166) );
a23644a <=( A201 and (not A200) );
a23645a <=( a23644a and a23641a );
a23646a <=( a23645a and a23638a );
a23650a <=( (not A267) and (not A266) );
a23651a <=( A203 and a23650a );
a23654a <=( (not A299) and A298 );
a23657a <=( A302 and A300 );
a23658a <=( a23657a and a23654a );
a23659a <=( a23658a and a23651a );
a23663a <=( A167 and (not A168) );
a23664a <=( A169 and a23663a );
a23667a <=( A199 and (not A166) );
a23670a <=( A201 and (not A200) );
a23671a <=( a23670a and a23667a );
a23672a <=( a23671a and a23664a );
a23676a <=( (not A266) and (not A265) );
a23677a <=( A203 and a23676a );
a23680a <=( (not A299) and A298 );
a23683a <=( A301 and A300 );
a23684a <=( a23683a and a23680a );
a23685a <=( a23684a and a23677a );
a23689a <=( A167 and (not A168) );
a23690a <=( A169 and a23689a );
a23693a <=( A199 and (not A166) );
a23696a <=( A201 and (not A200) );
a23697a <=( a23696a and a23693a );
a23698a <=( a23697a and a23690a );
a23702a <=( (not A266) and (not A265) );
a23703a <=( A203 and a23702a );
a23706a <=( (not A299) and A298 );
a23709a <=( A302 and A300 );
a23710a <=( a23709a and a23706a );
a23711a <=( a23710a and a23703a );
a23715a <=( (not A167) and (not A168) );
a23716a <=( A169 and a23715a );
a23719a <=( (not A200) and A166 );
a23722a <=( (not A203) and (not A202) );
a23723a <=( a23722a and a23719a );
a23724a <=( a23723a and a23716a );
a23728a <=( A267 and (not A266) );
a23729a <=( A265 and a23728a );
a23732a <=( A298 and A268 );
a23735a <=( (not A302) and (not A301) );
a23736a <=( a23735a and a23732a );
a23737a <=( a23736a and a23729a );
a23741a <=( (not A167) and (not A168) );
a23742a <=( A169 and a23741a );
a23745a <=( (not A200) and A166 );
a23748a <=( (not A203) and (not A202) );
a23749a <=( a23748a and a23745a );
a23750a <=( a23749a and a23742a );
a23754a <=( A267 and (not A266) );
a23755a <=( A265 and a23754a );
a23758a <=( A298 and A269 );
a23761a <=( (not A302) and (not A301) );
a23762a <=( a23761a and a23758a );
a23763a <=( a23762a and a23755a );
a23767a <=( (not A167) and (not A168) );
a23768a <=( A169 and a23767a );
a23771a <=( A199 and A166 );
a23774a <=( A201 and (not A200) );
a23775a <=( a23774a and a23771a );
a23776a <=( a23775a and a23768a );
a23780a <=( A266 and A265 );
a23781a <=( A202 and a23780a );
a23784a <=( (not A299) and A298 );
a23787a <=( A301 and A300 );
a23788a <=( a23787a and a23784a );
a23789a <=( a23788a and a23781a );
a23793a <=( (not A167) and (not A168) );
a23794a <=( A169 and a23793a );
a23797a <=( A199 and A166 );
a23800a <=( A201 and (not A200) );
a23801a <=( a23800a and a23797a );
a23802a <=( a23801a and a23794a );
a23806a <=( A266 and A265 );
a23807a <=( A202 and a23806a );
a23810a <=( (not A299) and A298 );
a23813a <=( A302 and A300 );
a23814a <=( a23813a and a23810a );
a23815a <=( a23814a and a23807a );
a23819a <=( (not A167) and (not A168) );
a23820a <=( A169 and a23819a );
a23823a <=( A199 and A166 );
a23826a <=( A201 and (not A200) );
a23827a <=( a23826a and a23823a );
a23828a <=( a23827a and a23820a );
a23832a <=( (not A267) and (not A266) );
a23833a <=( A202 and a23832a );
a23836a <=( (not A299) and A298 );
a23839a <=( A301 and A300 );
a23840a <=( a23839a and a23836a );
a23841a <=( a23840a and a23833a );
a23845a <=( (not A167) and (not A168) );
a23846a <=( A169 and a23845a );
a23849a <=( A199 and A166 );
a23852a <=( A201 and (not A200) );
a23853a <=( a23852a and a23849a );
a23854a <=( a23853a and a23846a );
a23858a <=( (not A267) and (not A266) );
a23859a <=( A202 and a23858a );
a23862a <=( (not A299) and A298 );
a23865a <=( A302 and A300 );
a23866a <=( a23865a and a23862a );
a23867a <=( a23866a and a23859a );
a23871a <=( (not A167) and (not A168) );
a23872a <=( A169 and a23871a );
a23875a <=( A199 and A166 );
a23878a <=( A201 and (not A200) );
a23879a <=( a23878a and a23875a );
a23880a <=( a23879a and a23872a );
a23884a <=( (not A266) and (not A265) );
a23885a <=( A202 and a23884a );
a23888a <=( (not A299) and A298 );
a23891a <=( A301 and A300 );
a23892a <=( a23891a and a23888a );
a23893a <=( a23892a and a23885a );
a23897a <=( (not A167) and (not A168) );
a23898a <=( A169 and a23897a );
a23901a <=( A199 and A166 );
a23904a <=( A201 and (not A200) );
a23905a <=( a23904a and a23901a );
a23906a <=( a23905a and a23898a );
a23910a <=( (not A266) and (not A265) );
a23911a <=( A202 and a23910a );
a23914a <=( (not A299) and A298 );
a23917a <=( A302 and A300 );
a23918a <=( a23917a and a23914a );
a23919a <=( a23918a and a23911a );
a23923a <=( (not A167) and (not A168) );
a23924a <=( A169 and a23923a );
a23927a <=( A199 and A166 );
a23930a <=( A201 and (not A200) );
a23931a <=( a23930a and a23927a );
a23932a <=( a23931a and a23924a );
a23936a <=( A266 and A265 );
a23937a <=( A203 and a23936a );
a23940a <=( (not A299) and A298 );
a23943a <=( A301 and A300 );
a23944a <=( a23943a and a23940a );
a23945a <=( a23944a and a23937a );
a23949a <=( (not A167) and (not A168) );
a23950a <=( A169 and a23949a );
a23953a <=( A199 and A166 );
a23956a <=( A201 and (not A200) );
a23957a <=( a23956a and a23953a );
a23958a <=( a23957a and a23950a );
a23962a <=( A266 and A265 );
a23963a <=( A203 and a23962a );
a23966a <=( (not A299) and A298 );
a23969a <=( A302 and A300 );
a23970a <=( a23969a and a23966a );
a23971a <=( a23970a and a23963a );
a23975a <=( (not A167) and (not A168) );
a23976a <=( A169 and a23975a );
a23979a <=( A199 and A166 );
a23982a <=( A201 and (not A200) );
a23983a <=( a23982a and a23979a );
a23984a <=( a23983a and a23976a );
a23988a <=( (not A267) and (not A266) );
a23989a <=( A203 and a23988a );
a23992a <=( (not A299) and A298 );
a23995a <=( A301 and A300 );
a23996a <=( a23995a and a23992a );
a23997a <=( a23996a and a23989a );
a24001a <=( (not A167) and (not A168) );
a24002a <=( A169 and a24001a );
a24005a <=( A199 and A166 );
a24008a <=( A201 and (not A200) );
a24009a <=( a24008a and a24005a );
a24010a <=( a24009a and a24002a );
a24014a <=( (not A267) and (not A266) );
a24015a <=( A203 and a24014a );
a24018a <=( (not A299) and A298 );
a24021a <=( A302 and A300 );
a24022a <=( a24021a and a24018a );
a24023a <=( a24022a and a24015a );
a24027a <=( (not A167) and (not A168) );
a24028a <=( A169 and a24027a );
a24031a <=( A199 and A166 );
a24034a <=( A201 and (not A200) );
a24035a <=( a24034a and a24031a );
a24036a <=( a24035a and a24028a );
a24040a <=( (not A266) and (not A265) );
a24041a <=( A203 and a24040a );
a24044a <=( (not A299) and A298 );
a24047a <=( A301 and A300 );
a24048a <=( a24047a and a24044a );
a24049a <=( a24048a and a24041a );
a24053a <=( (not A167) and (not A168) );
a24054a <=( A169 and a24053a );
a24057a <=( A199 and A166 );
a24060a <=( A201 and (not A200) );
a24061a <=( a24060a and a24057a );
a24062a <=( a24061a and a24054a );
a24066a <=( (not A266) and (not A265) );
a24067a <=( A203 and a24066a );
a24070a <=( (not A299) and A298 );
a24073a <=( A302 and A300 );
a24074a <=( a24073a and a24070a );
a24075a <=( a24074a and a24067a );
a24079a <=( (not A168) and A169 );
a24080a <=( A170 and a24079a );
a24083a <=( (not A200) and A199 );
a24086a <=( A202 and A201 );
a24087a <=( a24086a and a24083a );
a24088a <=( a24087a and a24080a );
a24092a <=( (not A269) and (not A268) );
a24093a <=( (not A266) and a24092a );
a24096a <=( (not A299) and A298 );
a24099a <=( A301 and A300 );
a24100a <=( a24099a and a24096a );
a24101a <=( a24100a and a24093a );
a24105a <=( (not A168) and A169 );
a24106a <=( A170 and a24105a );
a24109a <=( (not A200) and A199 );
a24112a <=( A202 and A201 );
a24113a <=( a24112a and a24109a );
a24114a <=( a24113a and a24106a );
a24118a <=( (not A269) and (not A268) );
a24119a <=( (not A266) and a24118a );
a24122a <=( (not A299) and A298 );
a24125a <=( A302 and A300 );
a24126a <=( a24125a and a24122a );
a24127a <=( a24126a and a24119a );
a24131a <=( (not A168) and A169 );
a24132a <=( A170 and a24131a );
a24135a <=( (not A200) and A199 );
a24138a <=( A203 and A201 );
a24139a <=( a24138a and a24135a );
a24140a <=( a24139a and a24132a );
a24144a <=( (not A269) and (not A268) );
a24145a <=( (not A266) and a24144a );
a24148a <=( (not A299) and A298 );
a24151a <=( A301 and A300 );
a24152a <=( a24151a and a24148a );
a24153a <=( a24152a and a24145a );
a24157a <=( (not A168) and A169 );
a24158a <=( A170 and a24157a );
a24161a <=( (not A200) and A199 );
a24164a <=( A203 and A201 );
a24165a <=( a24164a and a24161a );
a24166a <=( a24165a and a24158a );
a24170a <=( (not A269) and (not A268) );
a24171a <=( (not A266) and a24170a );
a24174a <=( (not A299) and A298 );
a24177a <=( A302 and A300 );
a24178a <=( a24177a and a24174a );
a24179a <=( a24178a and a24171a );
a24183a <=( A167 and A169 );
a24184a <=( (not A170) and a24183a );
a24187a <=( (not A200) and A166 );
a24190a <=( (not A203) and (not A202) );
a24191a <=( a24190a and a24187a );
a24192a <=( a24191a and a24184a );
a24196a <=( (not A269) and (not A268) );
a24197a <=( (not A266) and a24196a );
a24200a <=( (not A299) and A298 );
a24203a <=( A301 and A300 );
a24204a <=( a24203a and a24200a );
a24205a <=( a24204a and a24197a );
a24209a <=( A167 and A169 );
a24210a <=( (not A170) and a24209a );
a24213a <=( (not A200) and A166 );
a24216a <=( (not A203) and (not A202) );
a24217a <=( a24216a and a24213a );
a24218a <=( a24217a and a24210a );
a24222a <=( (not A269) and (not A268) );
a24223a <=( (not A266) and a24222a );
a24226a <=( (not A299) and A298 );
a24229a <=( A302 and A300 );
a24230a <=( a24229a and a24226a );
a24231a <=( a24230a and a24223a );
a24235a <=( A167 and A169 );
a24236a <=( (not A170) and a24235a );
a24239a <=( A199 and A166 );
a24242a <=( A201 and (not A200) );
a24243a <=( a24242a and a24239a );
a24244a <=( a24243a and a24236a );
a24248a <=( (not A266) and A265 );
a24249a <=( A202 and a24248a );
a24252a <=( A268 and A267 );
a24255a <=( (not A300) and A298 );
a24256a <=( a24255a and a24252a );
a24257a <=( a24256a and a24249a );
a24261a <=( A167 and A169 );
a24262a <=( (not A170) and a24261a );
a24265a <=( A199 and A166 );
a24268a <=( A201 and (not A200) );
a24269a <=( a24268a and a24265a );
a24270a <=( a24269a and a24262a );
a24274a <=( (not A266) and A265 );
a24275a <=( A202 and a24274a );
a24278a <=( A268 and A267 );
a24281a <=( A299 and A298 );
a24282a <=( a24281a and a24278a );
a24283a <=( a24282a and a24275a );
a24287a <=( A167 and A169 );
a24288a <=( (not A170) and a24287a );
a24291a <=( A199 and A166 );
a24294a <=( A201 and (not A200) );
a24295a <=( a24294a and a24291a );
a24296a <=( a24295a and a24288a );
a24300a <=( (not A266) and A265 );
a24301a <=( A202 and a24300a );
a24304a <=( A268 and A267 );
a24307a <=( (not A299) and (not A298) );
a24308a <=( a24307a and a24304a );
a24309a <=( a24308a and a24301a );
a24313a <=( A167 and A169 );
a24314a <=( (not A170) and a24313a );
a24317a <=( A199 and A166 );
a24320a <=( A201 and (not A200) );
a24321a <=( a24320a and a24317a );
a24322a <=( a24321a and a24314a );
a24326a <=( (not A266) and A265 );
a24327a <=( A202 and a24326a );
a24330a <=( A269 and A267 );
a24333a <=( (not A300) and A298 );
a24334a <=( a24333a and a24330a );
a24335a <=( a24334a and a24327a );
a24339a <=( A167 and A169 );
a24340a <=( (not A170) and a24339a );
a24343a <=( A199 and A166 );
a24346a <=( A201 and (not A200) );
a24347a <=( a24346a and a24343a );
a24348a <=( a24347a and a24340a );
a24352a <=( (not A266) and A265 );
a24353a <=( A202 and a24352a );
a24356a <=( A269 and A267 );
a24359a <=( A299 and A298 );
a24360a <=( a24359a and a24356a );
a24361a <=( a24360a and a24353a );
a24365a <=( A167 and A169 );
a24366a <=( (not A170) and a24365a );
a24369a <=( A199 and A166 );
a24372a <=( A201 and (not A200) );
a24373a <=( a24372a and a24369a );
a24374a <=( a24373a and a24366a );
a24378a <=( (not A266) and A265 );
a24379a <=( A202 and a24378a );
a24382a <=( A269 and A267 );
a24385a <=( (not A299) and (not A298) );
a24386a <=( a24385a and a24382a );
a24387a <=( a24386a and a24379a );
a24391a <=( A167 and A169 );
a24392a <=( (not A170) and a24391a );
a24395a <=( A199 and A166 );
a24398a <=( A201 and (not A200) );
a24399a <=( a24398a and a24395a );
a24400a <=( a24399a and a24392a );
a24404a <=( (not A266) and A265 );
a24405a <=( A203 and a24404a );
a24408a <=( A268 and A267 );
a24411a <=( (not A300) and A298 );
a24412a <=( a24411a and a24408a );
a24413a <=( a24412a and a24405a );
a24417a <=( A167 and A169 );
a24418a <=( (not A170) and a24417a );
a24421a <=( A199 and A166 );
a24424a <=( A201 and (not A200) );
a24425a <=( a24424a and a24421a );
a24426a <=( a24425a and a24418a );
a24430a <=( (not A266) and A265 );
a24431a <=( A203 and a24430a );
a24434a <=( A268 and A267 );
a24437a <=( A299 and A298 );
a24438a <=( a24437a and a24434a );
a24439a <=( a24438a and a24431a );
a24443a <=( A167 and A169 );
a24444a <=( (not A170) and a24443a );
a24447a <=( A199 and A166 );
a24450a <=( A201 and (not A200) );
a24451a <=( a24450a and a24447a );
a24452a <=( a24451a and a24444a );
a24456a <=( (not A266) and A265 );
a24457a <=( A203 and a24456a );
a24460a <=( A268 and A267 );
a24463a <=( (not A299) and (not A298) );
a24464a <=( a24463a and a24460a );
a24465a <=( a24464a and a24457a );
a24469a <=( A167 and A169 );
a24470a <=( (not A170) and a24469a );
a24473a <=( A199 and A166 );
a24476a <=( A201 and (not A200) );
a24477a <=( a24476a and a24473a );
a24478a <=( a24477a and a24470a );
a24482a <=( (not A266) and A265 );
a24483a <=( A203 and a24482a );
a24486a <=( A269 and A267 );
a24489a <=( (not A300) and A298 );
a24490a <=( a24489a and a24486a );
a24491a <=( a24490a and a24483a );
a24495a <=( A167 and A169 );
a24496a <=( (not A170) and a24495a );
a24499a <=( A199 and A166 );
a24502a <=( A201 and (not A200) );
a24503a <=( a24502a and a24499a );
a24504a <=( a24503a and a24496a );
a24508a <=( (not A266) and A265 );
a24509a <=( A203 and a24508a );
a24512a <=( A269 and A267 );
a24515a <=( A299 and A298 );
a24516a <=( a24515a and a24512a );
a24517a <=( a24516a and a24509a );
a24521a <=( A167 and A169 );
a24522a <=( (not A170) and a24521a );
a24525a <=( A199 and A166 );
a24528a <=( A201 and (not A200) );
a24529a <=( a24528a and a24525a );
a24530a <=( a24529a and a24522a );
a24534a <=( (not A266) and A265 );
a24535a <=( A203 and a24534a );
a24538a <=( A269 and A267 );
a24541a <=( (not A299) and (not A298) );
a24542a <=( a24541a and a24538a );
a24543a <=( a24542a and a24535a );
a24547a <=( (not A167) and A169 );
a24548a <=( (not A170) and a24547a );
a24551a <=( (not A200) and (not A166) );
a24554a <=( (not A203) and (not A202) );
a24555a <=( a24554a and a24551a );
a24556a <=( a24555a and a24548a );
a24560a <=( (not A269) and (not A268) );
a24561a <=( (not A266) and a24560a );
a24564a <=( (not A299) and A298 );
a24567a <=( A301 and A300 );
a24568a <=( a24567a and a24564a );
a24569a <=( a24568a and a24561a );
a24573a <=( (not A167) and A169 );
a24574a <=( (not A170) and a24573a );
a24577a <=( (not A200) and (not A166) );
a24580a <=( (not A203) and (not A202) );
a24581a <=( a24580a and a24577a );
a24582a <=( a24581a and a24574a );
a24586a <=( (not A269) and (not A268) );
a24587a <=( (not A266) and a24586a );
a24590a <=( (not A299) and A298 );
a24593a <=( A302 and A300 );
a24594a <=( a24593a and a24590a );
a24595a <=( a24594a and a24587a );
a24599a <=( (not A167) and A169 );
a24600a <=( (not A170) and a24599a );
a24603a <=( A199 and (not A166) );
a24606a <=( A201 and (not A200) );
a24607a <=( a24606a and a24603a );
a24608a <=( a24607a and a24600a );
a24612a <=( (not A266) and A265 );
a24613a <=( A202 and a24612a );
a24616a <=( A268 and A267 );
a24619a <=( (not A300) and A298 );
a24620a <=( a24619a and a24616a );
a24621a <=( a24620a and a24613a );
a24625a <=( (not A167) and A169 );
a24626a <=( (not A170) and a24625a );
a24629a <=( A199 and (not A166) );
a24632a <=( A201 and (not A200) );
a24633a <=( a24632a and a24629a );
a24634a <=( a24633a and a24626a );
a24638a <=( (not A266) and A265 );
a24639a <=( A202 and a24638a );
a24642a <=( A268 and A267 );
a24645a <=( A299 and A298 );
a24646a <=( a24645a and a24642a );
a24647a <=( a24646a and a24639a );
a24651a <=( (not A167) and A169 );
a24652a <=( (not A170) and a24651a );
a24655a <=( A199 and (not A166) );
a24658a <=( A201 and (not A200) );
a24659a <=( a24658a and a24655a );
a24660a <=( a24659a and a24652a );
a24664a <=( (not A266) and A265 );
a24665a <=( A202 and a24664a );
a24668a <=( A268 and A267 );
a24671a <=( (not A299) and (not A298) );
a24672a <=( a24671a and a24668a );
a24673a <=( a24672a and a24665a );
a24677a <=( (not A167) and A169 );
a24678a <=( (not A170) and a24677a );
a24681a <=( A199 and (not A166) );
a24684a <=( A201 and (not A200) );
a24685a <=( a24684a and a24681a );
a24686a <=( a24685a and a24678a );
a24690a <=( (not A266) and A265 );
a24691a <=( A202 and a24690a );
a24694a <=( A269 and A267 );
a24697a <=( (not A300) and A298 );
a24698a <=( a24697a and a24694a );
a24699a <=( a24698a and a24691a );
a24703a <=( (not A167) and A169 );
a24704a <=( (not A170) and a24703a );
a24707a <=( A199 and (not A166) );
a24710a <=( A201 and (not A200) );
a24711a <=( a24710a and a24707a );
a24712a <=( a24711a and a24704a );
a24716a <=( (not A266) and A265 );
a24717a <=( A202 and a24716a );
a24720a <=( A269 and A267 );
a24723a <=( A299 and A298 );
a24724a <=( a24723a and a24720a );
a24725a <=( a24724a and a24717a );
a24729a <=( (not A167) and A169 );
a24730a <=( (not A170) and a24729a );
a24733a <=( A199 and (not A166) );
a24736a <=( A201 and (not A200) );
a24737a <=( a24736a and a24733a );
a24738a <=( a24737a and a24730a );
a24742a <=( (not A266) and A265 );
a24743a <=( A202 and a24742a );
a24746a <=( A269 and A267 );
a24749a <=( (not A299) and (not A298) );
a24750a <=( a24749a and a24746a );
a24751a <=( a24750a and a24743a );
a24755a <=( (not A167) and A169 );
a24756a <=( (not A170) and a24755a );
a24759a <=( A199 and (not A166) );
a24762a <=( A201 and (not A200) );
a24763a <=( a24762a and a24759a );
a24764a <=( a24763a and a24756a );
a24768a <=( (not A266) and A265 );
a24769a <=( A203 and a24768a );
a24772a <=( A268 and A267 );
a24775a <=( (not A300) and A298 );
a24776a <=( a24775a and a24772a );
a24777a <=( a24776a and a24769a );
a24781a <=( (not A167) and A169 );
a24782a <=( (not A170) and a24781a );
a24785a <=( A199 and (not A166) );
a24788a <=( A201 and (not A200) );
a24789a <=( a24788a and a24785a );
a24790a <=( a24789a and a24782a );
a24794a <=( (not A266) and A265 );
a24795a <=( A203 and a24794a );
a24798a <=( A268 and A267 );
a24801a <=( A299 and A298 );
a24802a <=( a24801a and a24798a );
a24803a <=( a24802a and a24795a );
a24807a <=( (not A167) and A169 );
a24808a <=( (not A170) and a24807a );
a24811a <=( A199 and (not A166) );
a24814a <=( A201 and (not A200) );
a24815a <=( a24814a and a24811a );
a24816a <=( a24815a and a24808a );
a24820a <=( (not A266) and A265 );
a24821a <=( A203 and a24820a );
a24824a <=( A268 and A267 );
a24827a <=( (not A299) and (not A298) );
a24828a <=( a24827a and a24824a );
a24829a <=( a24828a and a24821a );
a24833a <=( (not A167) and A169 );
a24834a <=( (not A170) and a24833a );
a24837a <=( A199 and (not A166) );
a24840a <=( A201 and (not A200) );
a24841a <=( a24840a and a24837a );
a24842a <=( a24841a and a24834a );
a24846a <=( (not A266) and A265 );
a24847a <=( A203 and a24846a );
a24850a <=( A269 and A267 );
a24853a <=( (not A300) and A298 );
a24854a <=( a24853a and a24850a );
a24855a <=( a24854a and a24847a );
a24859a <=( (not A167) and A169 );
a24860a <=( (not A170) and a24859a );
a24863a <=( A199 and (not A166) );
a24866a <=( A201 and (not A200) );
a24867a <=( a24866a and a24863a );
a24868a <=( a24867a and a24860a );
a24872a <=( (not A266) and A265 );
a24873a <=( A203 and a24872a );
a24876a <=( A269 and A267 );
a24879a <=( A299 and A298 );
a24880a <=( a24879a and a24876a );
a24881a <=( a24880a and a24873a );
a24885a <=( (not A167) and A169 );
a24886a <=( (not A170) and a24885a );
a24889a <=( A199 and (not A166) );
a24892a <=( A201 and (not A200) );
a24893a <=( a24892a and a24889a );
a24894a <=( a24893a and a24886a );
a24898a <=( (not A266) and A265 );
a24899a <=( A203 and a24898a );
a24902a <=( A269 and A267 );
a24905a <=( (not A299) and (not A298) );
a24906a <=( a24905a and a24902a );
a24907a <=( a24906a and a24899a );
a24911a <=( (not A166) and (not A167) );
a24912a <=( (not A169) and a24911a );
a24915a <=( (not A200) and A199 );
a24918a <=( A202 and A201 );
a24919a <=( a24918a and a24915a );
a24920a <=( a24919a and a24912a );
a24924a <=( (not A269) and (not A268) );
a24925a <=( (not A266) and a24924a );
a24928a <=( (not A299) and A298 );
a24931a <=( A301 and A300 );
a24932a <=( a24931a and a24928a );
a24933a <=( a24932a and a24925a );
a24937a <=( (not A166) and (not A167) );
a24938a <=( (not A169) and a24937a );
a24941a <=( (not A200) and A199 );
a24944a <=( A202 and A201 );
a24945a <=( a24944a and a24941a );
a24946a <=( a24945a and a24938a );
a24950a <=( (not A269) and (not A268) );
a24951a <=( (not A266) and a24950a );
a24954a <=( (not A299) and A298 );
a24957a <=( A302 and A300 );
a24958a <=( a24957a and a24954a );
a24959a <=( a24958a and a24951a );
a24963a <=( (not A166) and (not A167) );
a24964a <=( (not A169) and a24963a );
a24967a <=( (not A200) and A199 );
a24970a <=( A203 and A201 );
a24971a <=( a24970a and a24967a );
a24972a <=( a24971a and a24964a );
a24976a <=( (not A269) and (not A268) );
a24977a <=( (not A266) and a24976a );
a24980a <=( (not A299) and A298 );
a24983a <=( A301 and A300 );
a24984a <=( a24983a and a24980a );
a24985a <=( a24984a and a24977a );
a24989a <=( (not A166) and (not A167) );
a24990a <=( (not A169) and a24989a );
a24993a <=( (not A200) and A199 );
a24996a <=( A203 and A201 );
a24997a <=( a24996a and a24993a );
a24998a <=( a24997a and a24990a );
a25002a <=( (not A269) and (not A268) );
a25003a <=( (not A266) and a25002a );
a25006a <=( (not A299) and A298 );
a25009a <=( A302 and A300 );
a25010a <=( a25009a and a25006a );
a25011a <=( a25010a and a25003a );
a25015a <=( A167 and (not A168) );
a25016a <=( (not A169) and a25015a );
a25019a <=( (not A200) and A166 );
a25022a <=( (not A203) and (not A202) );
a25023a <=( a25022a and a25019a );
a25024a <=( a25023a and a25016a );
a25028a <=( A267 and (not A266) );
a25029a <=( A265 and a25028a );
a25032a <=( A298 and A268 );
a25035a <=( (not A302) and (not A301) );
a25036a <=( a25035a and a25032a );
a25037a <=( a25036a and a25029a );
a25041a <=( A167 and (not A168) );
a25042a <=( (not A169) and a25041a );
a25045a <=( (not A200) and A166 );
a25048a <=( (not A203) and (not A202) );
a25049a <=( a25048a and a25045a );
a25050a <=( a25049a and a25042a );
a25054a <=( A267 and (not A266) );
a25055a <=( A265 and a25054a );
a25058a <=( A298 and A269 );
a25061a <=( (not A302) and (not A301) );
a25062a <=( a25061a and a25058a );
a25063a <=( a25062a and a25055a );
a25067a <=( A167 and (not A168) );
a25068a <=( (not A169) and a25067a );
a25071a <=( A199 and A166 );
a25074a <=( A201 and (not A200) );
a25075a <=( a25074a and a25071a );
a25076a <=( a25075a and a25068a );
a25080a <=( A266 and A265 );
a25081a <=( A202 and a25080a );
a25084a <=( (not A299) and A298 );
a25087a <=( A301 and A300 );
a25088a <=( a25087a and a25084a );
a25089a <=( a25088a and a25081a );
a25093a <=( A167 and (not A168) );
a25094a <=( (not A169) and a25093a );
a25097a <=( A199 and A166 );
a25100a <=( A201 and (not A200) );
a25101a <=( a25100a and a25097a );
a25102a <=( a25101a and a25094a );
a25106a <=( A266 and A265 );
a25107a <=( A202 and a25106a );
a25110a <=( (not A299) and A298 );
a25113a <=( A302 and A300 );
a25114a <=( a25113a and a25110a );
a25115a <=( a25114a and a25107a );
a25119a <=( A167 and (not A168) );
a25120a <=( (not A169) and a25119a );
a25123a <=( A199 and A166 );
a25126a <=( A201 and (not A200) );
a25127a <=( a25126a and a25123a );
a25128a <=( a25127a and a25120a );
a25132a <=( (not A267) and (not A266) );
a25133a <=( A202 and a25132a );
a25136a <=( (not A299) and A298 );
a25139a <=( A301 and A300 );
a25140a <=( a25139a and a25136a );
a25141a <=( a25140a and a25133a );
a25145a <=( A167 and (not A168) );
a25146a <=( (not A169) and a25145a );
a25149a <=( A199 and A166 );
a25152a <=( A201 and (not A200) );
a25153a <=( a25152a and a25149a );
a25154a <=( a25153a and a25146a );
a25158a <=( (not A267) and (not A266) );
a25159a <=( A202 and a25158a );
a25162a <=( (not A299) and A298 );
a25165a <=( A302 and A300 );
a25166a <=( a25165a and a25162a );
a25167a <=( a25166a and a25159a );
a25171a <=( A167 and (not A168) );
a25172a <=( (not A169) and a25171a );
a25175a <=( A199 and A166 );
a25178a <=( A201 and (not A200) );
a25179a <=( a25178a and a25175a );
a25180a <=( a25179a and a25172a );
a25184a <=( (not A266) and (not A265) );
a25185a <=( A202 and a25184a );
a25188a <=( (not A299) and A298 );
a25191a <=( A301 and A300 );
a25192a <=( a25191a and a25188a );
a25193a <=( a25192a and a25185a );
a25197a <=( A167 and (not A168) );
a25198a <=( (not A169) and a25197a );
a25201a <=( A199 and A166 );
a25204a <=( A201 and (not A200) );
a25205a <=( a25204a and a25201a );
a25206a <=( a25205a and a25198a );
a25210a <=( (not A266) and (not A265) );
a25211a <=( A202 and a25210a );
a25214a <=( (not A299) and A298 );
a25217a <=( A302 and A300 );
a25218a <=( a25217a and a25214a );
a25219a <=( a25218a and a25211a );
a25223a <=( A167 and (not A168) );
a25224a <=( (not A169) and a25223a );
a25227a <=( A199 and A166 );
a25230a <=( A201 and (not A200) );
a25231a <=( a25230a and a25227a );
a25232a <=( a25231a and a25224a );
a25236a <=( A266 and A265 );
a25237a <=( A203 and a25236a );
a25240a <=( (not A299) and A298 );
a25243a <=( A301 and A300 );
a25244a <=( a25243a and a25240a );
a25245a <=( a25244a and a25237a );
a25249a <=( A167 and (not A168) );
a25250a <=( (not A169) and a25249a );
a25253a <=( A199 and A166 );
a25256a <=( A201 and (not A200) );
a25257a <=( a25256a and a25253a );
a25258a <=( a25257a and a25250a );
a25262a <=( A266 and A265 );
a25263a <=( A203 and a25262a );
a25266a <=( (not A299) and A298 );
a25269a <=( A302 and A300 );
a25270a <=( a25269a and a25266a );
a25271a <=( a25270a and a25263a );
a25275a <=( A167 and (not A168) );
a25276a <=( (not A169) and a25275a );
a25279a <=( A199 and A166 );
a25282a <=( A201 and (not A200) );
a25283a <=( a25282a and a25279a );
a25284a <=( a25283a and a25276a );
a25288a <=( (not A267) and (not A266) );
a25289a <=( A203 and a25288a );
a25292a <=( (not A299) and A298 );
a25295a <=( A301 and A300 );
a25296a <=( a25295a and a25292a );
a25297a <=( a25296a and a25289a );
a25301a <=( A167 and (not A168) );
a25302a <=( (not A169) and a25301a );
a25305a <=( A199 and A166 );
a25308a <=( A201 and (not A200) );
a25309a <=( a25308a and a25305a );
a25310a <=( a25309a and a25302a );
a25314a <=( (not A267) and (not A266) );
a25315a <=( A203 and a25314a );
a25318a <=( (not A299) and A298 );
a25321a <=( A302 and A300 );
a25322a <=( a25321a and a25318a );
a25323a <=( a25322a and a25315a );
a25327a <=( A167 and (not A168) );
a25328a <=( (not A169) and a25327a );
a25331a <=( A199 and A166 );
a25334a <=( A201 and (not A200) );
a25335a <=( a25334a and a25331a );
a25336a <=( a25335a and a25328a );
a25340a <=( (not A266) and (not A265) );
a25341a <=( A203 and a25340a );
a25344a <=( (not A299) and A298 );
a25347a <=( A301 and A300 );
a25348a <=( a25347a and a25344a );
a25349a <=( a25348a and a25341a );
a25353a <=( A167 and (not A168) );
a25354a <=( (not A169) and a25353a );
a25357a <=( A199 and A166 );
a25360a <=( A201 and (not A200) );
a25361a <=( a25360a and a25357a );
a25362a <=( a25361a and a25354a );
a25366a <=( (not A266) and (not A265) );
a25367a <=( A203 and a25366a );
a25370a <=( (not A299) and A298 );
a25373a <=( A302 and A300 );
a25374a <=( a25373a and a25370a );
a25375a <=( a25374a and a25367a );
a25379a <=( A167 and (not A169) );
a25380a <=( A170 and a25379a );
a25383a <=( (not A200) and (not A166) );
a25386a <=( (not A203) and (not A202) );
a25387a <=( a25386a and a25383a );
a25388a <=( a25387a and a25380a );
a25392a <=( (not A269) and (not A268) );
a25393a <=( (not A266) and a25392a );
a25396a <=( (not A299) and A298 );
a25399a <=( A301 and A300 );
a25400a <=( a25399a and a25396a );
a25401a <=( a25400a and a25393a );
a25405a <=( A167 and (not A169) );
a25406a <=( A170 and a25405a );
a25409a <=( (not A200) and (not A166) );
a25412a <=( (not A203) and (not A202) );
a25413a <=( a25412a and a25409a );
a25414a <=( a25413a and a25406a );
a25418a <=( (not A269) and (not A268) );
a25419a <=( (not A266) and a25418a );
a25422a <=( (not A299) and A298 );
a25425a <=( A302 and A300 );
a25426a <=( a25425a and a25422a );
a25427a <=( a25426a and a25419a );
a25431a <=( A167 and (not A169) );
a25432a <=( A170 and a25431a );
a25435a <=( A199 and (not A166) );
a25438a <=( A201 and (not A200) );
a25439a <=( a25438a and a25435a );
a25440a <=( a25439a and a25432a );
a25444a <=( (not A266) and A265 );
a25445a <=( A202 and a25444a );
a25448a <=( A268 and A267 );
a25451a <=( (not A300) and A298 );
a25452a <=( a25451a and a25448a );
a25453a <=( a25452a and a25445a );
a25457a <=( A167 and (not A169) );
a25458a <=( A170 and a25457a );
a25461a <=( A199 and (not A166) );
a25464a <=( A201 and (not A200) );
a25465a <=( a25464a and a25461a );
a25466a <=( a25465a and a25458a );
a25470a <=( (not A266) and A265 );
a25471a <=( A202 and a25470a );
a25474a <=( A268 and A267 );
a25477a <=( A299 and A298 );
a25478a <=( a25477a and a25474a );
a25479a <=( a25478a and a25471a );
a25483a <=( A167 and (not A169) );
a25484a <=( A170 and a25483a );
a25487a <=( A199 and (not A166) );
a25490a <=( A201 and (not A200) );
a25491a <=( a25490a and a25487a );
a25492a <=( a25491a and a25484a );
a25496a <=( (not A266) and A265 );
a25497a <=( A202 and a25496a );
a25500a <=( A268 and A267 );
a25503a <=( (not A299) and (not A298) );
a25504a <=( a25503a and a25500a );
a25505a <=( a25504a and a25497a );
a25509a <=( A167 and (not A169) );
a25510a <=( A170 and a25509a );
a25513a <=( A199 and (not A166) );
a25516a <=( A201 and (not A200) );
a25517a <=( a25516a and a25513a );
a25518a <=( a25517a and a25510a );
a25522a <=( (not A266) and A265 );
a25523a <=( A202 and a25522a );
a25526a <=( A269 and A267 );
a25529a <=( (not A300) and A298 );
a25530a <=( a25529a and a25526a );
a25531a <=( a25530a and a25523a );
a25535a <=( A167 and (not A169) );
a25536a <=( A170 and a25535a );
a25539a <=( A199 and (not A166) );
a25542a <=( A201 and (not A200) );
a25543a <=( a25542a and a25539a );
a25544a <=( a25543a and a25536a );
a25548a <=( (not A266) and A265 );
a25549a <=( A202 and a25548a );
a25552a <=( A269 and A267 );
a25555a <=( A299 and A298 );
a25556a <=( a25555a and a25552a );
a25557a <=( a25556a and a25549a );
a25561a <=( A167 and (not A169) );
a25562a <=( A170 and a25561a );
a25565a <=( A199 and (not A166) );
a25568a <=( A201 and (not A200) );
a25569a <=( a25568a and a25565a );
a25570a <=( a25569a and a25562a );
a25574a <=( (not A266) and A265 );
a25575a <=( A202 and a25574a );
a25578a <=( A269 and A267 );
a25581a <=( (not A299) and (not A298) );
a25582a <=( a25581a and a25578a );
a25583a <=( a25582a and a25575a );
a25587a <=( A167 and (not A169) );
a25588a <=( A170 and a25587a );
a25591a <=( A199 and (not A166) );
a25594a <=( A201 and (not A200) );
a25595a <=( a25594a and a25591a );
a25596a <=( a25595a and a25588a );
a25600a <=( (not A266) and A265 );
a25601a <=( A203 and a25600a );
a25604a <=( A268 and A267 );
a25607a <=( (not A300) and A298 );
a25608a <=( a25607a and a25604a );
a25609a <=( a25608a and a25601a );
a25613a <=( A167 and (not A169) );
a25614a <=( A170 and a25613a );
a25617a <=( A199 and (not A166) );
a25620a <=( A201 and (not A200) );
a25621a <=( a25620a and a25617a );
a25622a <=( a25621a and a25614a );
a25626a <=( (not A266) and A265 );
a25627a <=( A203 and a25626a );
a25630a <=( A268 and A267 );
a25633a <=( A299 and A298 );
a25634a <=( a25633a and a25630a );
a25635a <=( a25634a and a25627a );
a25639a <=( A167 and (not A169) );
a25640a <=( A170 and a25639a );
a25643a <=( A199 and (not A166) );
a25646a <=( A201 and (not A200) );
a25647a <=( a25646a and a25643a );
a25648a <=( a25647a and a25640a );
a25652a <=( (not A266) and A265 );
a25653a <=( A203 and a25652a );
a25656a <=( A268 and A267 );
a25659a <=( (not A299) and (not A298) );
a25660a <=( a25659a and a25656a );
a25661a <=( a25660a and a25653a );
a25665a <=( A167 and (not A169) );
a25666a <=( A170 and a25665a );
a25669a <=( A199 and (not A166) );
a25672a <=( A201 and (not A200) );
a25673a <=( a25672a and a25669a );
a25674a <=( a25673a and a25666a );
a25678a <=( (not A266) and A265 );
a25679a <=( A203 and a25678a );
a25682a <=( A269 and A267 );
a25685a <=( (not A300) and A298 );
a25686a <=( a25685a and a25682a );
a25687a <=( a25686a and a25679a );
a25691a <=( A167 and (not A169) );
a25692a <=( A170 and a25691a );
a25695a <=( A199 and (not A166) );
a25698a <=( A201 and (not A200) );
a25699a <=( a25698a and a25695a );
a25700a <=( a25699a and a25692a );
a25704a <=( (not A266) and A265 );
a25705a <=( A203 and a25704a );
a25708a <=( A269 and A267 );
a25711a <=( A299 and A298 );
a25712a <=( a25711a and a25708a );
a25713a <=( a25712a and a25705a );
a25717a <=( A167 and (not A169) );
a25718a <=( A170 and a25717a );
a25721a <=( A199 and (not A166) );
a25724a <=( A201 and (not A200) );
a25725a <=( a25724a and a25721a );
a25726a <=( a25725a and a25718a );
a25730a <=( (not A266) and A265 );
a25731a <=( A203 and a25730a );
a25734a <=( A269 and A267 );
a25737a <=( (not A299) and (not A298) );
a25738a <=( a25737a and a25734a );
a25739a <=( a25738a and a25731a );
a25743a <=( (not A167) and (not A169) );
a25744a <=( A170 and a25743a );
a25747a <=( (not A200) and A166 );
a25750a <=( (not A203) and (not A202) );
a25751a <=( a25750a and a25747a );
a25752a <=( a25751a and a25744a );
a25756a <=( (not A269) and (not A268) );
a25757a <=( (not A266) and a25756a );
a25760a <=( (not A299) and A298 );
a25763a <=( A301 and A300 );
a25764a <=( a25763a and a25760a );
a25765a <=( a25764a and a25757a );
a25769a <=( (not A167) and (not A169) );
a25770a <=( A170 and a25769a );
a25773a <=( (not A200) and A166 );
a25776a <=( (not A203) and (not A202) );
a25777a <=( a25776a and a25773a );
a25778a <=( a25777a and a25770a );
a25782a <=( (not A269) and (not A268) );
a25783a <=( (not A266) and a25782a );
a25786a <=( (not A299) and A298 );
a25789a <=( A302 and A300 );
a25790a <=( a25789a and a25786a );
a25791a <=( a25790a and a25783a );
a25795a <=( (not A167) and (not A169) );
a25796a <=( A170 and a25795a );
a25799a <=( A199 and A166 );
a25802a <=( A201 and (not A200) );
a25803a <=( a25802a and a25799a );
a25804a <=( a25803a and a25796a );
a25808a <=( (not A266) and A265 );
a25809a <=( A202 and a25808a );
a25812a <=( A268 and A267 );
a25815a <=( (not A300) and A298 );
a25816a <=( a25815a and a25812a );
a25817a <=( a25816a and a25809a );
a25821a <=( (not A167) and (not A169) );
a25822a <=( A170 and a25821a );
a25825a <=( A199 and A166 );
a25828a <=( A201 and (not A200) );
a25829a <=( a25828a and a25825a );
a25830a <=( a25829a and a25822a );
a25834a <=( (not A266) and A265 );
a25835a <=( A202 and a25834a );
a25838a <=( A268 and A267 );
a25841a <=( A299 and A298 );
a25842a <=( a25841a and a25838a );
a25843a <=( a25842a and a25835a );
a25847a <=( (not A167) and (not A169) );
a25848a <=( A170 and a25847a );
a25851a <=( A199 and A166 );
a25854a <=( A201 and (not A200) );
a25855a <=( a25854a and a25851a );
a25856a <=( a25855a and a25848a );
a25860a <=( (not A266) and A265 );
a25861a <=( A202 and a25860a );
a25864a <=( A268 and A267 );
a25867a <=( (not A299) and (not A298) );
a25868a <=( a25867a and a25864a );
a25869a <=( a25868a and a25861a );
a25873a <=( (not A167) and (not A169) );
a25874a <=( A170 and a25873a );
a25877a <=( A199 and A166 );
a25880a <=( A201 and (not A200) );
a25881a <=( a25880a and a25877a );
a25882a <=( a25881a and a25874a );
a25886a <=( (not A266) and A265 );
a25887a <=( A202 and a25886a );
a25890a <=( A269 and A267 );
a25893a <=( (not A300) and A298 );
a25894a <=( a25893a and a25890a );
a25895a <=( a25894a and a25887a );
a25899a <=( (not A167) and (not A169) );
a25900a <=( A170 and a25899a );
a25903a <=( A199 and A166 );
a25906a <=( A201 and (not A200) );
a25907a <=( a25906a and a25903a );
a25908a <=( a25907a and a25900a );
a25912a <=( (not A266) and A265 );
a25913a <=( A202 and a25912a );
a25916a <=( A269 and A267 );
a25919a <=( A299 and A298 );
a25920a <=( a25919a and a25916a );
a25921a <=( a25920a and a25913a );
a25925a <=( (not A167) and (not A169) );
a25926a <=( A170 and a25925a );
a25929a <=( A199 and A166 );
a25932a <=( A201 and (not A200) );
a25933a <=( a25932a and a25929a );
a25934a <=( a25933a and a25926a );
a25938a <=( (not A266) and A265 );
a25939a <=( A202 and a25938a );
a25942a <=( A269 and A267 );
a25945a <=( (not A299) and (not A298) );
a25946a <=( a25945a and a25942a );
a25947a <=( a25946a and a25939a );
a25951a <=( (not A167) and (not A169) );
a25952a <=( A170 and a25951a );
a25955a <=( A199 and A166 );
a25958a <=( A201 and (not A200) );
a25959a <=( a25958a and a25955a );
a25960a <=( a25959a and a25952a );
a25964a <=( (not A266) and A265 );
a25965a <=( A203 and a25964a );
a25968a <=( A268 and A267 );
a25971a <=( (not A300) and A298 );
a25972a <=( a25971a and a25968a );
a25973a <=( a25972a and a25965a );
a25977a <=( (not A167) and (not A169) );
a25978a <=( A170 and a25977a );
a25981a <=( A199 and A166 );
a25984a <=( A201 and (not A200) );
a25985a <=( a25984a and a25981a );
a25986a <=( a25985a and a25978a );
a25990a <=( (not A266) and A265 );
a25991a <=( A203 and a25990a );
a25994a <=( A268 and A267 );
a25997a <=( A299 and A298 );
a25998a <=( a25997a and a25994a );
a25999a <=( a25998a and a25991a );
a26003a <=( (not A167) and (not A169) );
a26004a <=( A170 and a26003a );
a26007a <=( A199 and A166 );
a26010a <=( A201 and (not A200) );
a26011a <=( a26010a and a26007a );
a26012a <=( a26011a and a26004a );
a26016a <=( (not A266) and A265 );
a26017a <=( A203 and a26016a );
a26020a <=( A268 and A267 );
a26023a <=( (not A299) and (not A298) );
a26024a <=( a26023a and a26020a );
a26025a <=( a26024a and a26017a );
a26029a <=( (not A167) and (not A169) );
a26030a <=( A170 and a26029a );
a26033a <=( A199 and A166 );
a26036a <=( A201 and (not A200) );
a26037a <=( a26036a and a26033a );
a26038a <=( a26037a and a26030a );
a26042a <=( (not A266) and A265 );
a26043a <=( A203 and a26042a );
a26046a <=( A269 and A267 );
a26049a <=( (not A300) and A298 );
a26050a <=( a26049a and a26046a );
a26051a <=( a26050a and a26043a );
a26055a <=( (not A167) and (not A169) );
a26056a <=( A170 and a26055a );
a26059a <=( A199 and A166 );
a26062a <=( A201 and (not A200) );
a26063a <=( a26062a and a26059a );
a26064a <=( a26063a and a26056a );
a26068a <=( (not A266) and A265 );
a26069a <=( A203 and a26068a );
a26072a <=( A269 and A267 );
a26075a <=( A299 and A298 );
a26076a <=( a26075a and a26072a );
a26077a <=( a26076a and a26069a );
a26081a <=( (not A167) and (not A169) );
a26082a <=( A170 and a26081a );
a26085a <=( A199 and A166 );
a26088a <=( A201 and (not A200) );
a26089a <=( a26088a and a26085a );
a26090a <=( a26089a and a26082a );
a26094a <=( (not A266) and A265 );
a26095a <=( A203 and a26094a );
a26098a <=( A269 and A267 );
a26101a <=( (not A299) and (not A298) );
a26102a <=( a26101a and a26098a );
a26103a <=( a26102a and a26095a );
a26107a <=( (not A168) and (not A169) );
a26108a <=( (not A170) and a26107a );
a26111a <=( (not A200) and A199 );
a26114a <=( A202 and A201 );
a26115a <=( a26114a and a26111a );
a26116a <=( a26115a and a26108a );
a26120a <=( (not A269) and (not A268) );
a26121a <=( (not A266) and a26120a );
a26124a <=( (not A299) and A298 );
a26127a <=( A301 and A300 );
a26128a <=( a26127a and a26124a );
a26129a <=( a26128a and a26121a );
a26133a <=( (not A168) and (not A169) );
a26134a <=( (not A170) and a26133a );
a26137a <=( (not A200) and A199 );
a26140a <=( A202 and A201 );
a26141a <=( a26140a and a26137a );
a26142a <=( a26141a and a26134a );
a26146a <=( (not A269) and (not A268) );
a26147a <=( (not A266) and a26146a );
a26150a <=( (not A299) and A298 );
a26153a <=( A302 and A300 );
a26154a <=( a26153a and a26150a );
a26155a <=( a26154a and a26147a );
a26159a <=( (not A168) and (not A169) );
a26160a <=( (not A170) and a26159a );
a26163a <=( (not A200) and A199 );
a26166a <=( A203 and A201 );
a26167a <=( a26166a and a26163a );
a26168a <=( a26167a and a26160a );
a26172a <=( (not A269) and (not A268) );
a26173a <=( (not A266) and a26172a );
a26176a <=( (not A299) and A298 );
a26179a <=( A301 and A300 );
a26180a <=( a26179a and a26176a );
a26181a <=( a26180a and a26173a );
a26185a <=( (not A168) and (not A169) );
a26186a <=( (not A170) and a26185a );
a26189a <=( (not A200) and A199 );
a26192a <=( A203 and A201 );
a26193a <=( a26192a and a26189a );
a26194a <=( a26193a and a26186a );
a26198a <=( (not A269) and (not A268) );
a26199a <=( (not A266) and a26198a );
a26202a <=( (not A299) and A298 );
a26205a <=( A302 and A300 );
a26206a <=( a26205a and a26202a );
a26207a <=( a26206a and a26199a );
a26211a <=( A167 and (not A168) );
a26212a <=( A169 and a26211a );
a26215a <=( A199 and (not A166) );
a26218a <=( A201 and (not A200) );
a26219a <=( a26218a and a26215a );
a26220a <=( a26219a and a26212a );
a26223a <=( (not A266) and A202 );
a26226a <=( (not A269) and (not A268) );
a26227a <=( a26226a and a26223a );
a26230a <=( (not A299) and A298 );
a26233a <=( A301 and A300 );
a26234a <=( a26233a and a26230a );
a26235a <=( a26234a and a26227a );
a26239a <=( A167 and (not A168) );
a26240a <=( A169 and a26239a );
a26243a <=( A199 and (not A166) );
a26246a <=( A201 and (not A200) );
a26247a <=( a26246a and a26243a );
a26248a <=( a26247a and a26240a );
a26251a <=( (not A266) and A202 );
a26254a <=( (not A269) and (not A268) );
a26255a <=( a26254a and a26251a );
a26258a <=( (not A299) and A298 );
a26261a <=( A302 and A300 );
a26262a <=( a26261a and a26258a );
a26263a <=( a26262a and a26255a );
a26267a <=( A167 and (not A168) );
a26268a <=( A169 and a26267a );
a26271a <=( A199 and (not A166) );
a26274a <=( A201 and (not A200) );
a26275a <=( a26274a and a26271a );
a26276a <=( a26275a and a26268a );
a26279a <=( (not A266) and A203 );
a26282a <=( (not A269) and (not A268) );
a26283a <=( a26282a and a26279a );
a26286a <=( (not A299) and A298 );
a26289a <=( A301 and A300 );
a26290a <=( a26289a and a26286a );
a26291a <=( a26290a and a26283a );
a26295a <=( A167 and (not A168) );
a26296a <=( A169 and a26295a );
a26299a <=( A199 and (not A166) );
a26302a <=( A201 and (not A200) );
a26303a <=( a26302a and a26299a );
a26304a <=( a26303a and a26296a );
a26307a <=( (not A266) and A203 );
a26310a <=( (not A269) and (not A268) );
a26311a <=( a26310a and a26307a );
a26314a <=( (not A299) and A298 );
a26317a <=( A302 and A300 );
a26318a <=( a26317a and a26314a );
a26319a <=( a26318a and a26311a );
a26323a <=( (not A167) and (not A168) );
a26324a <=( A169 and a26323a );
a26327a <=( A199 and A166 );
a26330a <=( A201 and (not A200) );
a26331a <=( a26330a and a26327a );
a26332a <=( a26331a and a26324a );
a26335a <=( (not A266) and A202 );
a26338a <=( (not A269) and (not A268) );
a26339a <=( a26338a and a26335a );
a26342a <=( (not A299) and A298 );
a26345a <=( A301 and A300 );
a26346a <=( a26345a and a26342a );
a26347a <=( a26346a and a26339a );
a26351a <=( (not A167) and (not A168) );
a26352a <=( A169 and a26351a );
a26355a <=( A199 and A166 );
a26358a <=( A201 and (not A200) );
a26359a <=( a26358a and a26355a );
a26360a <=( a26359a and a26352a );
a26363a <=( (not A266) and A202 );
a26366a <=( (not A269) and (not A268) );
a26367a <=( a26366a and a26363a );
a26370a <=( (not A299) and A298 );
a26373a <=( A302 and A300 );
a26374a <=( a26373a and a26370a );
a26375a <=( a26374a and a26367a );
a26379a <=( (not A167) and (not A168) );
a26380a <=( A169 and a26379a );
a26383a <=( A199 and A166 );
a26386a <=( A201 and (not A200) );
a26387a <=( a26386a and a26383a );
a26388a <=( a26387a and a26380a );
a26391a <=( (not A266) and A203 );
a26394a <=( (not A269) and (not A268) );
a26395a <=( a26394a and a26391a );
a26398a <=( (not A299) and A298 );
a26401a <=( A301 and A300 );
a26402a <=( a26401a and a26398a );
a26403a <=( a26402a and a26395a );
a26407a <=( (not A167) and (not A168) );
a26408a <=( A169 and a26407a );
a26411a <=( A199 and A166 );
a26414a <=( A201 and (not A200) );
a26415a <=( a26414a and a26411a );
a26416a <=( a26415a and a26408a );
a26419a <=( (not A266) and A203 );
a26422a <=( (not A269) and (not A268) );
a26423a <=( a26422a and a26419a );
a26426a <=( (not A299) and A298 );
a26429a <=( A302 and A300 );
a26430a <=( a26429a and a26426a );
a26431a <=( a26430a and a26423a );
a26435a <=( A167 and A169 );
a26436a <=( (not A170) and a26435a );
a26439a <=( A199 and A166 );
a26442a <=( A201 and (not A200) );
a26443a <=( a26442a and a26439a );
a26444a <=( a26443a and a26436a );
a26447a <=( A265 and A202 );
a26450a <=( A267 and (not A266) );
a26451a <=( a26450a and a26447a );
a26454a <=( A298 and A268 );
a26457a <=( (not A302) and (not A301) );
a26458a <=( a26457a and a26454a );
a26459a <=( a26458a and a26451a );
a26463a <=( A167 and A169 );
a26464a <=( (not A170) and a26463a );
a26467a <=( A199 and A166 );
a26470a <=( A201 and (not A200) );
a26471a <=( a26470a and a26467a );
a26472a <=( a26471a and a26464a );
a26475a <=( A265 and A202 );
a26478a <=( A267 and (not A266) );
a26479a <=( a26478a and a26475a );
a26482a <=( A298 and A269 );
a26485a <=( (not A302) and (not A301) );
a26486a <=( a26485a and a26482a );
a26487a <=( a26486a and a26479a );
a26491a <=( A167 and A169 );
a26492a <=( (not A170) and a26491a );
a26495a <=( A199 and A166 );
a26498a <=( A201 and (not A200) );
a26499a <=( a26498a and a26495a );
a26500a <=( a26499a and a26492a );
a26503a <=( A265 and A203 );
a26506a <=( A267 and (not A266) );
a26507a <=( a26506a and a26503a );
a26510a <=( A298 and A268 );
a26513a <=( (not A302) and (not A301) );
a26514a <=( a26513a and a26510a );
a26515a <=( a26514a and a26507a );
a26519a <=( A167 and A169 );
a26520a <=( (not A170) and a26519a );
a26523a <=( A199 and A166 );
a26526a <=( A201 and (not A200) );
a26527a <=( a26526a and a26523a );
a26528a <=( a26527a and a26520a );
a26531a <=( A265 and A203 );
a26534a <=( A267 and (not A266) );
a26535a <=( a26534a and a26531a );
a26538a <=( A298 and A269 );
a26541a <=( (not A302) and (not A301) );
a26542a <=( a26541a and a26538a );
a26543a <=( a26542a and a26535a );
a26547a <=( (not A167) and A169 );
a26548a <=( (not A170) and a26547a );
a26551a <=( A199 and (not A166) );
a26554a <=( A201 and (not A200) );
a26555a <=( a26554a and a26551a );
a26556a <=( a26555a and a26548a );
a26559a <=( A265 and A202 );
a26562a <=( A267 and (not A266) );
a26563a <=( a26562a and a26559a );
a26566a <=( A298 and A268 );
a26569a <=( (not A302) and (not A301) );
a26570a <=( a26569a and a26566a );
a26571a <=( a26570a and a26563a );
a26575a <=( (not A167) and A169 );
a26576a <=( (not A170) and a26575a );
a26579a <=( A199 and (not A166) );
a26582a <=( A201 and (not A200) );
a26583a <=( a26582a and a26579a );
a26584a <=( a26583a and a26576a );
a26587a <=( A265 and A202 );
a26590a <=( A267 and (not A266) );
a26591a <=( a26590a and a26587a );
a26594a <=( A298 and A269 );
a26597a <=( (not A302) and (not A301) );
a26598a <=( a26597a and a26594a );
a26599a <=( a26598a and a26591a );
a26603a <=( (not A167) and A169 );
a26604a <=( (not A170) and a26603a );
a26607a <=( A199 and (not A166) );
a26610a <=( A201 and (not A200) );
a26611a <=( a26610a and a26607a );
a26612a <=( a26611a and a26604a );
a26615a <=( A265 and A203 );
a26618a <=( A267 and (not A266) );
a26619a <=( a26618a and a26615a );
a26622a <=( A298 and A268 );
a26625a <=( (not A302) and (not A301) );
a26626a <=( a26625a and a26622a );
a26627a <=( a26626a and a26619a );
a26631a <=( (not A167) and A169 );
a26632a <=( (not A170) and a26631a );
a26635a <=( A199 and (not A166) );
a26638a <=( A201 and (not A200) );
a26639a <=( a26638a and a26635a );
a26640a <=( a26639a and a26632a );
a26643a <=( A265 and A203 );
a26646a <=( A267 and (not A266) );
a26647a <=( a26646a and a26643a );
a26650a <=( A298 and A269 );
a26653a <=( (not A302) and (not A301) );
a26654a <=( a26653a and a26650a );
a26655a <=( a26654a and a26647a );
a26659a <=( A167 and (not A168) );
a26660a <=( (not A169) and a26659a );
a26663a <=( A199 and A166 );
a26666a <=( A201 and (not A200) );
a26667a <=( a26666a and a26663a );
a26668a <=( a26667a and a26660a );
a26671a <=( (not A266) and A202 );
a26674a <=( (not A269) and (not A268) );
a26675a <=( a26674a and a26671a );
a26678a <=( (not A299) and A298 );
a26681a <=( A301 and A300 );
a26682a <=( a26681a and a26678a );
a26683a <=( a26682a and a26675a );
a26687a <=( A167 and (not A168) );
a26688a <=( (not A169) and a26687a );
a26691a <=( A199 and A166 );
a26694a <=( A201 and (not A200) );
a26695a <=( a26694a and a26691a );
a26696a <=( a26695a and a26688a );
a26699a <=( (not A266) and A202 );
a26702a <=( (not A269) and (not A268) );
a26703a <=( a26702a and a26699a );
a26706a <=( (not A299) and A298 );
a26709a <=( A302 and A300 );
a26710a <=( a26709a and a26706a );
a26711a <=( a26710a and a26703a );
a26715a <=( A167 and (not A168) );
a26716a <=( (not A169) and a26715a );
a26719a <=( A199 and A166 );
a26722a <=( A201 and (not A200) );
a26723a <=( a26722a and a26719a );
a26724a <=( a26723a and a26716a );
a26727a <=( (not A266) and A203 );
a26730a <=( (not A269) and (not A268) );
a26731a <=( a26730a and a26727a );
a26734a <=( (not A299) and A298 );
a26737a <=( A301 and A300 );
a26738a <=( a26737a and a26734a );
a26739a <=( a26738a and a26731a );
a26743a <=( A167 and (not A168) );
a26744a <=( (not A169) and a26743a );
a26747a <=( A199 and A166 );
a26750a <=( A201 and (not A200) );
a26751a <=( a26750a and a26747a );
a26752a <=( a26751a and a26744a );
a26755a <=( (not A266) and A203 );
a26758a <=( (not A269) and (not A268) );
a26759a <=( a26758a and a26755a );
a26762a <=( (not A299) and A298 );
a26765a <=( A302 and A300 );
a26766a <=( a26765a and a26762a );
a26767a <=( a26766a and a26759a );
a26771a <=( A167 and (not A169) );
a26772a <=( A170 and a26771a );
a26775a <=( A199 and (not A166) );
a26778a <=( A201 and (not A200) );
a26779a <=( a26778a and a26775a );
a26780a <=( a26779a and a26772a );
a26783a <=( A265 and A202 );
a26786a <=( A267 and (not A266) );
a26787a <=( a26786a and a26783a );
a26790a <=( A298 and A268 );
a26793a <=( (not A302) and (not A301) );
a26794a <=( a26793a and a26790a );
a26795a <=( a26794a and a26787a );
a26799a <=( A167 and (not A169) );
a26800a <=( A170 and a26799a );
a26803a <=( A199 and (not A166) );
a26806a <=( A201 and (not A200) );
a26807a <=( a26806a and a26803a );
a26808a <=( a26807a and a26800a );
a26811a <=( A265 and A202 );
a26814a <=( A267 and (not A266) );
a26815a <=( a26814a and a26811a );
a26818a <=( A298 and A269 );
a26821a <=( (not A302) and (not A301) );
a26822a <=( a26821a and a26818a );
a26823a <=( a26822a and a26815a );
a26827a <=( A167 and (not A169) );
a26828a <=( A170 and a26827a );
a26831a <=( A199 and (not A166) );
a26834a <=( A201 and (not A200) );
a26835a <=( a26834a and a26831a );
a26836a <=( a26835a and a26828a );
a26839a <=( A265 and A203 );
a26842a <=( A267 and (not A266) );
a26843a <=( a26842a and a26839a );
a26846a <=( A298 and A268 );
a26849a <=( (not A302) and (not A301) );
a26850a <=( a26849a and a26846a );
a26851a <=( a26850a and a26843a );
a26855a <=( A167 and (not A169) );
a26856a <=( A170 and a26855a );
a26859a <=( A199 and (not A166) );
a26862a <=( A201 and (not A200) );
a26863a <=( a26862a and a26859a );
a26864a <=( a26863a and a26856a );
a26867a <=( A265 and A203 );
a26870a <=( A267 and (not A266) );
a26871a <=( a26870a and a26867a );
a26874a <=( A298 and A269 );
a26877a <=( (not A302) and (not A301) );
a26878a <=( a26877a and a26874a );
a26879a <=( a26878a and a26871a );
a26883a <=( (not A167) and (not A169) );
a26884a <=( A170 and a26883a );
a26887a <=( A199 and A166 );
a26890a <=( A201 and (not A200) );
a26891a <=( a26890a and a26887a );
a26892a <=( a26891a and a26884a );
a26895a <=( A265 and A202 );
a26898a <=( A267 and (not A266) );
a26899a <=( a26898a and a26895a );
a26902a <=( A298 and A268 );
a26905a <=( (not A302) and (not A301) );
a26906a <=( a26905a and a26902a );
a26907a <=( a26906a and a26899a );
a26911a <=( (not A167) and (not A169) );
a26912a <=( A170 and a26911a );
a26915a <=( A199 and A166 );
a26918a <=( A201 and (not A200) );
a26919a <=( a26918a and a26915a );
a26920a <=( a26919a and a26912a );
a26923a <=( A265 and A202 );
a26926a <=( A267 and (not A266) );
a26927a <=( a26926a and a26923a );
a26930a <=( A298 and A269 );
a26933a <=( (not A302) and (not A301) );
a26934a <=( a26933a and a26930a );
a26935a <=( a26934a and a26927a );
a26939a <=( (not A167) and (not A169) );
a26940a <=( A170 and a26939a );
a26943a <=( A199 and A166 );
a26946a <=( A201 and (not A200) );
a26947a <=( a26946a and a26943a );
a26948a <=( a26947a and a26940a );
a26951a <=( A265 and A203 );
a26954a <=( A267 and (not A266) );
a26955a <=( a26954a and a26951a );
a26958a <=( A298 and A268 );
a26961a <=( (not A302) and (not A301) );
a26962a <=( a26961a and a26958a );
a26963a <=( a26962a and a26955a );
a26967a <=( (not A167) and (not A169) );
a26968a <=( A170 and a26967a );
a26971a <=( A199 and A166 );
a26974a <=( A201 and (not A200) );
a26975a <=( a26974a and a26971a );
a26976a <=( a26975a and a26968a );
a26979a <=( A265 and A203 );
a26982a <=( A267 and (not A266) );
a26983a <=( a26982a and a26979a );
a26986a <=( A298 and A269 );
a26989a <=( (not A302) and (not A301) );
a26990a <=( a26989a and a26986a );
a26991a <=( a26990a and a26983a );
end x25_9x_behav;
| gpl-3.0 | 14e9a76090ab1e1f956d5308b25806dd | 0.626725 | 2.083697 | false | false | false | false |
jc38x/X38-02FO16 | benchmarks/VHDL_Generado_desde_C++/inputs-4bits_outputs5bits/1-HAL/metaheurísticas/hal_wsga.vhd | 1 | 1,612 | -- IT Tijuana, NetList-FPGA-Optimizer 0.01 (printed on 2016-05-12.09:06:03)
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.all;
USE IEEE.NUMERIC_STD.all;
ENTITY hal_wsga_entity IS
PORT (
reset, clk: IN std_logic;
input1, input2, input3, input4, input5: IN unsigned(0 TO 3);
output1, output2, output3: OUT unsigned(0 TO 4));
END hal_wsga_entity;
ARCHITECTURE hal_wsga_description OF hal_wsga_entity IS
SIGNAL current_state : unsigned(0 TO 7) := "00000000";
SHARED VARIABLE register1: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register2: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register3: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register4: unsigned(0 TO 4) := "00000";
BEGIN
moore_machine: PROCESS(clk, reset)
BEGIN
IF reset = '0' THEN
current_state <= "00000000";
ELSIF clk = '1' AND clk'event THEN
IF current_state < 4 THEN
current_state <= current_state + 1;
END IF;
END IF;
END PROCESS moore_machine;
operations: PROCESS(current_state)
BEGIN
CASE current_state IS
WHEN "00000001" =>
register1 := input1 * 1;
register2 := input2 * 2;
WHEN "00000010" =>
register1 := register1 * register2;
register2 := input3 * 3;
register3 := input4 + 4;
WHEN "00000011" =>
register2 := register2 * 6;
register1 := register1 - 8;
register4 := input5 * 9;
IF (register3 < 10) THEN
output1 <= register3;
ELSE
output1 <= "01010";
END IF;
WHEN "00000100" =>
output2 <= register4 + 11;
output3 <= register1 - register2;
WHEN OTHERS =>
NULL;
END CASE;
END PROCESS operations;
END hal_wsga_description; | gpl-3.0 | 9c83e24de84d50d3fb261d4e18f32d4a | 0.66067 | 2.996283 | false | false | false | false |
sandrosalvato94/System-Design-Project | src/polito/sdp2017/Tests/Extender.vhd | 1 | 513 | library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity Extender is
generic (N : integer := 8);
port (A : in std_logic_vector(N-1 downto 0);
Y : out std_logic_vector((2*N)-1 downto 0)
);
end Extender;
architecture Behavioral of Extender is
begin
process(A)
begin
if (A(N-1) = '0') then
Y(N-1 downto 0) <= A;
Y((2*N)-1 downto N) <= (others => '0');
else
Y(N-1 downto 0) <= A;
Y((2*N)-1 downto N) <= (others => '1');
end if;
end process;
end Behavioral;
| lgpl-3.0 | 47b14150622a3c074ab65a266e689428 | 0.557505 | 2.64433 | false | false | false | false |
rhexsel/xinu-cMIPS | vhdl/aux.vhd | 2 | 8,688 | -- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-- cMIPS, a VHDL model of the classical five stage MIPS pipeline.
-- Copyright (C) 2013 Roberto Andre Hexsel
--
-- This program is free software: you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation, version 3.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program. If not, see <http://www.gnu.org/licenses/>.
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-- +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-- 32-bit register, synchronous load active in '0'
-- +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
library IEEE;
use IEEE.std_logic_1164.all;
use work.p_WIRES.all;
entity register32 is
generic (INITIAL_VALUE: reg32 := x"00000000");
port(clk, rst, ld: in std_logic;
D: in reg32;
Q: out reg32);
end register32;
architecture functional of register32 is
begin
process(clk, rst)
variable state: reg32;
begin
if rst = '0' then
state := INITIAL_VALUE;
elsif rising_edge(clk) then
if ld = '0' then
state := D;
end if;
end if;
Q <= state;
end process;
end functional;
-- +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-- +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-- N-bit register, synchronous load active in '0', asynch reset
-- +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
library IEEE;
use IEEE.std_logic_1164.all;
use work.p_WIRES.all;
entity registerN is
generic (NUM_BITS: integer := 16;
INIT_VAL: std_logic_vector);
port(clk, rst, ld: in std_logic;
D: in std_logic_vector(NUM_BITS-1 downto 0);
Q: out std_logic_vector(NUM_BITS-1 downto 0));
end registerN;
architecture functional of registerN is
begin
process(clk, rst)
variable state: std_logic_vector(NUM_BITS-1 downto 0);
begin
if rst = '0' then
state := INIT_VAL;
elsif rising_edge(clk) then
if ld = '0' then
state := D;
end if;
end if;
Q <= state;
end process;
end functional;
-- +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-- +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-- 32-bit UP counter, {load,enable} synchronous, active in '0'
-- +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.p_WIRES.all;
entity counter32 is
generic (INITIAL_VALUE: reg32 := x"00000000");
port(clk, rst, ld, en: in std_logic;
D: in reg32;
Q: out reg32);
end counter32;
architecture functional of counter32 is
signal count: reg32;
begin
process(clk, rst)
begin
if rst = '0' then
count <= INITIAL_VALUE;
elsif rising_edge(clk) then
if ld = '0' then
count <= D;
elsif en = '0' then
count <= std_logic_vector(unsigned(count) + 1);
end if;
end if;
end process;
Q <= count;
end functional;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-- N-bit counter, synch load (=1), synch enable (=1), asynch reset (=0)
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
entity countNup is
generic (NUM_BITS: integer := 16);
port(clk, rst, ld, en: in std_logic;
D: in std_logic_vector((NUM_BITS - 1) downto 0);
Q: out std_logic_vector((NUM_BITS - 1) downto 0);
co: out std_logic);
end countNup;
architecture functional of countNup is
signal count: std_logic_vector(NUM_BITS downto 0);
begin
process(clk, rst)
constant ZERO : std_logic_vector(NUM_BITS downto 0) := (others => '0');
begin
if rst = '0' then
count <= ZERO;
elsif rising_edge(clk) then
if ld = '1' then
count <= '0' & D;
elsif en = '1' then
count <= std_logic_vector(unsigned(count) + 1);
end if;
end if;
end process;
Q <= count((NUM_BITS - 1) downto 0);
co <= count(NUM_BITS);
end functional;
--++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-- +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-- ring-counter, generates four-phase internal clock, on falling-edge
-- +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
library IEEE;
use IEEE.std_logic_1164.all;
use work.p_WIRES.all;
entity count4phases is
port(clk, rst : in std_logic;
p0,p1,p2,p3 : out std_logic);
-- attribute ASYNC_SET_RESET of rst : signal is true;
-- attribute CLOCK_SIGNAL of clk : signal is "yes";
end count4phases;
architecture functional of count4phases is
signal count: reg4 := b"1000";
begin
process(clk, rst)
begin
if rst = '0' then
count <= b"1000";
elsif falling_edge(clk) then
count <= count(2 downto 0) & count(3);
end if;
end process;
p0 <= count(0);
p1 <= count(1);
p2 <= count(2);
p3 <= count(3);
end functional;
-- +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-- +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-- D-type flip-flop with set and reset
-- +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
library IEEE; use IEEE.std_logic_1164.all;
entity FFD is
port(clk, rst, set : in std_logic;
D : in std_logic;
Q : out std_logic);
end FFD;
architecture functional of FFD is
begin
process(clk, rst, set)
variable state: std_logic;
begin
if rst = '0' then
state := '0';
elsif set = '0' then
state := '1';
elsif rising_edge(clk) then
state := D;
end if;
Q <= state;
end process;
end functional;
-- +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-- +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-- D-type flip-flop with reset
-- +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
library IEEE; use IEEE.std_logic_1164.all;
entity FFDsimple is
port(clk, rst : in std_logic;
D : in std_logic;
Q : out std_logic);
end FFDsimple;
architecture functional of FFDsimple is
begin
process(clk, rst)
variable state: std_logic;
begin
if rst = '0' then
state := '0';
elsif rising_edge(clk) then
state := D;
end if;
Q <= state;
end process;
end functional;
-- +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-- +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-- T-type flip-flop with reset (active 0)
-- +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
library IEEE; use IEEE.std_logic_1164.all;
entity FFT is
port(clk, rst : in std_logic;
T : in std_logic;
Q : out std_logic);
end FFT;
architecture functional of FFT is
begin
process(clk, rst)
variable state: std_logic;
begin
if rst = '0' then
state := '0';
elsif rising_edge(clk) then
state := T xor state;
end if;
Q <= state;
end process;
end functional;
-- +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-- +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
entity subtr32 IS
port(A, B : in std_logic_vector (31 downto 0);
C : out std_logic_vector (31 downto 0);
sgnd : in std_logic;
ovfl, lt : out std_logic);
end subtr32;
architecture functional of subtr32 is
signal extA,extB,extC,negB : std_logic_vector (32 downto 0);
begin
extA <= A(31) & A when sgnd = '1'
else '0' & A;
extB <= B(31) & B when sgnd = '1'
else '0' & B;
negB <= not(extB);
extC <= std_logic_vector( signed(extA) + signed(negB) + 1);
C <= extC(31 downto 0);
ovfl <= '1' when extC(32) /= extC(31) else '0';
lt <= not(extC(31)) when (extC(32) /= extC(31)) else extC(31);
end architecture functional;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
| gpl-3.0 | ff52f4f428f94e14f0586ad450cf247c | 0.473757 | 4.063611 | false | false | false | false |
jc38x/X38-02FO16 | benchmarks/VHDL_Generado_desde_C++/inputs-4bits_outputs5bits/3-ARF/asap-alap-random/arf_asap.vhd | 1 | 2,481 | -- IT Tijuana, NetList-FPGA-Optimizer 0.01 (printed on 2016-05-12.14:37:21)
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.all;
USE IEEE.NUMERIC_STD.all;
ENTITY arf_asap_entity IS
PORT (
reset, clk: IN std_logic;
input1, input2, input3, input4, input5, input6, input7, input8: IN unsigned(0 TO 3);
output1, output2: OUT unsigned(0 TO 4));
END arf_asap_entity;
ARCHITECTURE arf_asap_description OF arf_asap_entity IS
SIGNAL current_state : unsigned(0 TO 7) := "00000000";
SHARED VARIABLE register1: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register2: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register3: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register4: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register5: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register6: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register7: unsigned(0 TO 4) := "00000";
SHARED VARIABLE register8: unsigned(0 TO 4) := "00000";
BEGIN
moore_machine: PROCESS(clk, reset)
BEGIN
IF reset = '0' THEN
current_state <= "00000000";
ELSIF clk = '1' AND clk'event THEN
IF current_state < 4 THEN
current_state <= current_state + 1;
END IF;
END IF;
END PROCESS moore_machine;
operations: PROCESS(current_state)
BEGIN
CASE current_state IS
WHEN "00000001" =>
register1 := input1 * 1;
register2 := input2 * 2;
register3 := input3 * 3;
register4 := input4 * 4;
register5 := input5 * 5;
register6 := input6 * 6;
register7 := input7 * 7;
register8 := input8 * 8;
WHEN "00000010" =>
register1 := register4 + register1;
register2 := register2 + register8;
register3 := register6 + register3;
register4 := register7 + register5;
WHEN "00000011" =>
register1 := register1 + 10;
register3 := register3 + 12;
WHEN "00000100" =>
register5 := register1 * 14;
register1 := register1 * 16;
register6 := register3 * 18;
register3 := register3 * 20;
WHEN "00000101" =>
register5 := register6 + register5;
register1 := register3 + register1;
WHEN "00000110" =>
register3 := register5 * 22;
register5 := register5 * 24;
register6 := register1 * 26;
register1 := register1 * 28;
WHEN "00000111" =>
register3 := register3 + register6;
register1 := register5 + register1;
WHEN "00001000" =>
output1 <= register4 + register3;
output2 <= register2 + register1;
WHEN OTHERS =>
NULL;
END CASE;
END PROCESS operations;
END arf_asap_description; | gpl-3.0 | ec8ebbc09867268552a116486e0a2a66 | 0.659412 | 3.105131 | false | false | false | false |
mkotormus/G3_OrchestraConductorDemo | src/ov7670_marker_tracker_use/ov7670_marker_tracker_use.srcs/sources_1/ipshared/xilinx.com/proc_common_v4_0/bb615326/hdl/src/vhdl/srl_fifo.vhd | 15 | 11,841 | -------------------------------------------------------------------------------
-- $Id: srl_fifo.vhd,v 1.1.4.1 2010/09/14 22:35:47 dougt Exp $
-------------------------------------------------------------------------------
-- SRL_FIFO entity and architecture
-------------------------------------------------------------------------------
--
-- *************************************************************************
-- ** **
-- ** DISCLAIMER OF LIABILITY **
-- ** **
-- ** This text/file contains proprietary, confidential **
-- ** information of Xilinx, Inc., is distributed under **
-- ** license from Xilinx, Inc., and may be used, copied **
-- ** and/or disclosed only pursuant to the terms of a valid **
-- ** license agreement with Xilinx, Inc. Xilinx hereby **
-- ** grants you a license to use this text/file solely for **
-- ** design, simulation, implementation and creation of **
-- ** design files limited to Xilinx devices or technologies. **
-- ** Use with non-Xilinx devices or technologies is expressly **
-- ** prohibited and immediately terminates your license unless **
-- ** covered by a separate agreement. **
-- ** **
-- ** Xilinx is providing this design, code, or information **
-- ** "as-is" solely for use in developing programs and **
-- ** solutions for Xilinx devices, with no obligation on the **
-- ** part of Xilinx to provide support. By providing this design, **
-- ** code, or information as one possible implementation of **
-- ** this feature, application or standard, Xilinx is making no **
-- ** representation that this implementation is free from any **
-- ** claims of infringement. You are responsible for obtaining **
-- ** any rights you may require for your implementation. **
-- ** Xilinx expressly disclaims any warranty whatsoever with **
-- ** respect to the adequacy of the implementation, including **
-- ** but not limited to any warranties or representations that this **
-- ** implementation is free from claims of infringement, implied **
-- ** warranties of merchantability or fitness for a particular **
-- ** purpose. **
-- ** **
-- ** Xilinx products are not intended for use in life support **
-- ** appliances, devices, or systems. Use in such applications is **
-- ** expressly prohibited. **
-- ** **
-- ** Any modifications that are made to the Source Code are **
-- ** done at the users sole risk and will be unsupported. **
-- ** The Xilinx Support Hotline does not have access to source **
-- ** code and therefore cannot answer specific questions related **
-- ** to source HDL. The Xilinx Hotline support of original source **
-- ** code IP shall only address issues and questions related **
-- ** to the standard Netlist version of the core (and thus **
-- ** indirectly, the original core source). **
-- ** **
-- ** Copyright (c) 2001-2010 Xilinx, Inc. All rights reserved. **
-- ** **
-- ** This copyright and support notice must be retained as part **
-- ** of this text at all times. **
-- ** **
-- *************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: srl_fifo.vhd
--
-- Description:
--
-- VHDL-Standard: VHDL'93
-------------------------------------------------------------------------------
-- Structure:
-- srl_fifo.vhd
--
-------------------------------------------------------------------------------
-- Author: goran
-- Revision: $Revision: 1.1.4.1 $
-- Date: $Date: 2010/09/14 22:35:47 $
--
-- History:
-- goran 2001-05-11 First Version
-- KC 2001-06-20 Added Addr as an output port, for use as an occupancy
-- value
--
-- DCW 2002-03-12 Structural implementation of synchronous reset for
-- Data_Exists DFF (using FDR)
-- jam 2002-04-12 added C_XON generic for mixed vhdl/verilog sims
--
-- als 2002-04-18 added default for XON generic in SRL16E, FDRE, and FDR
-- component declarations
--
-- DET 1/17/2008 v4_0
-- ~~~~~~
-- - Incorporated new disclaimer header
-- ^^^^^^
--
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_com"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
library unisim;
use unisim.all;
entity SRL_FIFO is
generic (
C_DATA_BITS : natural := 8;
C_DEPTH : natural := 16;
C_XON : boolean := false
);
port (
Clk : in std_logic;
Reset : in std_logic;
FIFO_Write : in std_logic;
Data_In : in std_logic_vector(0 to C_DATA_BITS-1);
FIFO_Read : in std_logic;
Data_Out : out std_logic_vector(0 to C_DATA_BITS-1);
FIFO_Full : out std_logic;
Data_Exists : out std_logic;
Addr : out std_logic_vector(0 to 3) -- Added Addr as a port
);
end entity SRL_FIFO;
architecture IMP of SRL_FIFO is
component SRL16E is
-- pragma translate_off
generic (
INIT : bit_vector := X"0000"
);
-- pragma translate_on
port (
CE : in std_logic;
D : in std_logic;
Clk : in std_logic;
A0 : in std_logic;
A1 : in std_logic;
A2 : in std_logic;
A3 : in std_logic;
Q : out std_logic);
end component SRL16E;
component LUT4
generic(
INIT : bit_vector := X"0000"
);
port (
O : out std_logic;
I0 : in std_logic;
I1 : in std_logic;
I2 : in std_logic;
I3 : in std_logic);
end component;
component MULT_AND
port (
I0 : in std_logic;
I1 : in std_logic;
LO : out std_logic);
end component;
component MUXCY_L
port (
DI : in std_logic;
CI : in std_logic;
S : in std_logic;
LO : out std_logic);
end component;
component XORCY
port (
LI : in std_logic;
CI : in std_logic;
O : out std_logic);
end component;
component FDRE is
port (
Q : out std_logic;
C : in std_logic;
CE : in std_logic;
D : in std_logic;
R : in std_logic);
end component FDRE;
component FDR is
port (
Q : out std_logic;
C : in std_logic;
D : in std_logic;
R : in std_logic);
end component FDR;
signal addr_i : std_logic_vector(0 to 3);
signal buffer_Full : std_logic;
signal buffer_Empty : std_logic;
signal next_Data_Exists : std_logic;
signal data_Exists_I : std_logic;
signal valid_Write : std_logic;
signal hsum_A : std_logic_vector(0 to 3);
signal sum_A : std_logic_vector(0 to 3);
signal addr_cy : std_logic_vector(0 to 4);
begin -- architecture IMP
buffer_Full <= '1' when (addr_i = "1111") else '0';
FIFO_Full <= buffer_Full;
buffer_Empty <= '1' when (addr_i = "0000") else '0';
next_Data_Exists <= (data_Exists_I and not buffer_Empty) or
(buffer_Empty and FIFO_Write) or
(data_Exists_I and not FIFO_Read);
Data_Exists_DFF : FDR
port map (
Q => data_Exists_I, -- [out std_logic]
C => Clk, -- [in std_logic]
D => next_Data_Exists, -- [in std_logic]
R => Reset); -- [in std_logic]
Data_Exists <= data_Exists_I;
valid_Write <= FIFO_Write and (FIFO_Read or not buffer_Full);
addr_cy(0) <= valid_Write;
Addr_Counters : for I in 0 to 3 generate
hsum_A(I) <= (FIFO_Read xor addr_i(I)) and (FIFO_Write or not buffer_Empty);
MUXCY_L_I : MUXCY_L
port map (
DI => addr_i(I), -- [in std_logic]
CI => addr_cy(I), -- [in std_logic]
S => hsum_A(I), -- [in std_logic]
LO => addr_cy(I+1)); -- [out std_logic]
XORCY_I : XORCY
port map (
LI => hsum_A(I), -- [in std_logic]
CI => addr_cy(I), -- [in std_logic]
O => sum_A(I)); -- [out std_logic]
FDRE_I : FDRE
port map (
Q => addr_i(I), -- [out std_logic]
C => Clk, -- [in std_logic]
CE => data_Exists_I, -- [in std_logic]
D => sum_A(I), -- [in std_logic]
R => Reset); -- [in std_logic]
end generate Addr_Counters;
FIFO_RAM : for I in 0 to C_DATA_BITS-1 generate
SRL16E_I : SRL16E
-- pragma translate_off
generic map (
INIT => x"0000")
-- pragma translate_on
port map (
CE => valid_Write, -- [in std_logic]
D => Data_In(I), -- [in std_logic]
Clk => Clk, -- [in std_logic]
A0 => addr_i(0), -- [in std_logic]
A1 => addr_i(1), -- [in std_logic]
A2 => addr_i(2), -- [in std_logic]
A3 => addr_i(3), -- [in std_logic]
Q => Data_Out(I)); -- [out std_logic]
end generate FIFO_RAM;
-------------------------------------------------------------------------------
-- INT_ADDR_PROCESS
-------------------------------------------------------------------------------
-- This process assigns the internal address to the output port
-------------------------------------------------------------------------------
INT_ADDR_PROCESS:process (addr_i)
begin -- process
Addr <= addr_i;
end process;
end architecture IMP;
| apache-2.0 | f3533fd153e6ba1b7c21ebab367d22e7 | 0.43248 | 4.35972 | false | false | false | false |
mkotormus/G3_OrchestraConductorDemo | src/ov7670_marker_tracker_use/ov7670_marker_tracker_use.srcs/sources_1/ipshared/xilinx.com/fifo_generator_v12_0/924f3d25/hdl/ramfifo/memory.vhd | 5 | 114,225 | `protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2014"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
Ch9jB6bPy6KffkJSzr1VfMMETaEtgJJUKhSx5d3HoHZUA2srR6apVHHYwV9FAwpejQjVGsH5GfCf
D0xPNHQK3A==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
n3mIjCvvanIKVPl0SQoPFWXUAEVrLY7i2JQvYL2UNwU493BALA6tcSTs8YB8ghJKa7VJrXByj8pu
swoBmlOgI1VccAzF7IcQYGw62Fwtf0EbUg+kQ+QegYAYBtOUMBAMvNUWTVRsGDPJuLMZKKgTlSoQ
YyklVJ2hLF6uIgTJ7C8=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2014_03", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
H+7gVqZq66Cg9oDzE0RyFIJ/eNT6OeflAvkFT4v20qiry+Gw8quHQDuSh/QCeJsuYVvK30JrwPHK
e+QDzUSIPjLr9CsuSuKifzNZzJLm8elppD/UCZ0D1in9/bRB4Mb3wh1tBNQN4r1Y3CC0ZJG/jmHl
dv12l6m7KCCQgGBgdQXCYPo/1qRHg0bakGNbmRcYjpr1cVrXn8qw+3Dh/HjKHqcWeXyu8zzMxZ7U
w1uVM0S+HrBeZV96pxvBQzGzm8f8u0FIzAUkjoo/wpSSmlusRvf9xnyrgpdck+kMM97BBN5xhvGa
6vHtrFc3kOyk4pqKYiKvhrV+v+d76+Ula/IBGA==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
hc8zs9UarlZ5hATlg4MhVeBchT/DV1dIS0NF4yqD2QiphD08HMWhZBp8x3lFg+8s1z1Xwi5DOW0s
syjcbooWyA/eVrMzzc1DznTwpIXLejhCR4bKyfIWnBfOSxsA7/7k11h2apiw9eKaKpcOyIaE8t1f
0ao8Yqa/31w9IU6WDHo=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
AD5nada64DyjGv+zT1GzqzTaUxKcTnh2fmmdf1Cc9MNYWdveRG4vIIMXlpCxzZt5ZqPI7SPcebUg
2HYDqoL7oeWnwu9mjQLNB9TTCLIVeC/eO4vln7E8G3KrWhhT2OkPysk/dMGF1Y1GNrqfQoxIQ0M4
UlXIHvTuSn6tXX/ZFpbKXiLxjIrbWvz34TBQTi33eZ1o0343B42WTRFYSQUdG1zVQ9mQDD6gVeWH
rSW+eE/Ce+/t5oe/RXgFNLZ2iGgkmWrksz4MNhvBh/vYfTGdVwLlcxVkR4GIA+SDIvtGd+cdqgp1
XSXl+Q6ZDR7vBENFeqE7OoQmRqw8BJGKCf6Vpg==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 82816)
`protect data_block
c3Ga7FVO4TphgtKbT7yld3cfDRwhpnA5xQAxgWMcy7hAYsau8j0QHelg39CTRLQY4hKW+pSWl88N
San59tmT8zTZkNWonU1lXSskXEzuLwg5rhX708Cv2pTmFyjDGWMBaTiq4TThjVMx5351CLgylohJ
kUnqjx0tnjupBpjkhJM8Kk5axNiyZ5oLKp1ZWLSz3CqeiRBt+HrvO96S+un+OVXuPdDpwm+omoS/
eTBNuPjXHM5FZ1jplcdzY0iD8zmZrzRurrg2KD1D54LscKp3iJCLoeQpofvnVivniLe+qJcRV0th
UQo+Na6UfCzege4UQHP7lnUZXLnWqDDploqZRlvhXTiP4FaYHIk5zGOL7vgvLe6MfbswatJPcEsF
30t2JvBMsaYAGXrchmz3tMcp2PfFN2KnWehYdc4S6lMQ8V34KWhhFfHAXbwIM3MDUTZ9mg2NxaMC
W0kRRw4vH1wT2IrPR9mIQANsu5nnojLQoeuZTGVNnk7TWOhjMQKfzAp7Onj1xRT1Opw2i+4PdxLg
U+7eQ6ncLFSZt2jeehjdm85xp6Ug4eJL+dC17KdHpIDDigu7YKJpGtNbPYGRQMasLU3wLWjOoH/p
JldnDfMPeV/wNciFwOvdkyh1KZJBaTCzzvAbrWXiwwPRJQXiOIW16lJWEE7f7Mu6kcZ5Fd05tUXC
j0CliuT49rs3qn6aJaK1//+5ruRPSJNhXnQx3Nk445UfE1MbmpzwQdCBAPYsBEyFDhv1BTm60LWs
XGi8RG8AAu5ywEM65kY9KL0xBMhMMVpcLbdxy2tIIvkRPtY6X5JbPbNEwVy2vTQWxzgyo26u/+UN
HHigc3odVShytZEupbdQ0lCHxCSVK1hlJ5SRl285qEqpZeYlrvyv9VgMtHhFedHqmxHw00N/NETk
fDaZe6FW5xLR3uxtR+wHV5ZFeOpj6O8Zvp20NSbFpmpXxM8JLuMYhatP7zv0XtK6oNs8B/SenvqM
K4d3sKq0HwTuB2yA8fngk0uhZHSGs0KIFeGRJC4PL0zFD3h2c2tBl3YkkGwg8/1meennf1IdCsAO
CWM1tMvLzA2b+La3NafY1kg/3Q3MKAhxlrCtiGExs1bwQEf9rURgK2pArzGcWBHECuIrQOUsNvWO
Uu6wvLMOxQ4kUNF+01xBOhC+uyH60FdKq/6sstyert3McuxDgXPgiDm0K33OFShSrryTi5k4wVB+
eTLOG9ePqB8qVJsqymifdE/6D+iWJeoths9cRJYSRT/AkrPohJqGi6A6Gy3MfHt+61YrTF8TDpKU
U1ILi4DkQ7oxmvG9BU0lhtKtUQ2huwoANd73/Rq9a7VGD0C+yduQmrServri9sYTwD2ZkUR2C+d2
7zLIJ39Hibp/8tM0VuuQ3X7obaT435+ENR4BTd/TGp8CA7VCoGeUUiqsTIp8ky2k/G/3ndW0Uj3b
LcGs2wIiNtUo+uZTzVMpnlpz79OE2Gp2+k5MjPFVh5zOf6XjlOBbHloBxGKM5PxYel4qA5u+khjq
n9V0AH5M4XOqkmMcMLZ3st2JqlfiVkOGc/2sSh8nOROOBDlGd7BXr4kppOF41sWkH3podVmg1EBd
Peus5/VMIBRrJF64nwvmFq+i/TxWc9EAxAgzDkrZ/vaGVf9NYAhcREYlhVDuYc2rWrP1Zairgxxu
Io7iSLeBQiR1ojR2j9enyhLgDsC8bDXknLqR69o77QhIvjOCdBgFmhGfPNNsTRO8JzTiILjS/05j
3QXRl/dGj0180JtT9lnLdmNuWCIvhr4Gc+rSFAO4rLwllnIXxgNjDAGKq4lZ7LX4QvHcrqgUuJMl
PUEsNPONf5kh/OrmjrfzufXo9H05I35RPuewtZl42dRz26BtxgDdkeEhK+toocBoZAn6ymjV2cFP
EYd+4ABSCf5C4wLIDvKgj4EtQ8jLkHwUg8x6DdKPDsB9VLV3YAbpVbR/+XDquUo4nSj5+aTGSWkr
joAXskWrTPOy3Sgd6gAq9jGF6HPTHrS520KTWlzwsB+8uNYa7punuYxqbuxHDPJayswYZ1sTNkxo
tViWrh0ZoV4rAQIe/NNL/ntZhX7IsjbrISHLgznFXRajvLL7AOM+4AqFgfg1vX522OnVTw+mUzF1
DfcP3ZmiQHDn/I3qtS76okW2Tw5Y7vsEkhGuqTqk69fVkOZTASSfOjVKIOIqYWNysdWeVIgkLAoV
gJLatzQi+YfDhzA4UCl7qgtu1Y76qwtaiMNn1PbLEyFzTNW9WmJ5lLtKUNwB+WvaHvMXjHA5P0Rm
ub2YYHWmdtQ2v08WeMmkja07Q9ReXsaxXFNWqsaRdR4KAUTGTyHSo/qyRge8k6JgaFNPAnADTU1K
v7YRhzgVBBiixbLT5SDk6wXj9pndEWpawxd8kH2vekdpauzJuvmZQhNzfEiOMxzZ5/237ahZ4z9K
y2nYEHxhc9mI7Ujb4NofMmqPLJIgfg+QOrT6GryC50StXWU34PMv8vnjh2gsHxNsCN9fRoHEGKqU
dZEx2Zbib6xn9JvRlQ8kdpQMiUETAS8/cSHlEE2p/2F2CpE8PE4V1LnRUvDCW2dDCb/YALUKGyFN
ymMzODIQiaZNy6WF50njZXS3KSr35lqA16xQIfjM6h14FddGLKpg1d2lVCmytbN0GzfeIvSD4T+x
FG0zXsPsGYWNZIkUbuXIQRvbi9SY/Inu65zlJfT1uj29kH6SDGBhNECLpwiqw7iQfy4K21eDKUns
Saw+3xyLrNmCToIS5j/p4fT/KzkwXBvJ93Kwvpm9Y4X73fMcOhk5Uw0Mdo2LxacrYfPGBXxQ8hpp
NeuZDWGExiHUkkj09s2/mGoHZKYNK+379GxSavVZHYwlGTCk82lXhQLfg92e+e2TshFHngBzSNFa
x0YBftEgv9IgZkp9RT7B5lRi3w2wWnldxxuN7sg75Sf6wNglXRHRkX82Z0DA0HMHDQMJ6N0HFEoR
DJitzCQyMQAT8esPvZGJPm2Mbcw1Yej2v3Z8WOVIX+yBi8B4EAUYT/bMkxHp+iSNgHTWTYIeke0n
JhLbNRSSgi6ji1Awu6I7q6SgzKdhZrTGsRkIp4hSbzfTx+XOsxv1sb7G8VVihEBWaxUBn7N4mSmY
Z4OeAiMJfro2FY7Sf3KByC0LrYdvvne48lEC0olYUnJOOw8TUG4CTK7sfIDItCZwzlE8wGAPcSN0
8/5g0g4YY0Mt5FopOm3U8/mtqVsbzUXhxtSnigoBY5ORp5QvfQNIjxuZ8PnC+6PR5PS1u333/reV
eKvkc8MAlOY7SJ5ph8htXP2QNejWPCA34HvdXn3hJ8YBof9OcgdCnPpeRzW7BBeVxTLBJr4DxpJh
TeLRQ8T0h/k/hRx1uV/R+QwbCPOdKaSUj7IUkcxS1c+IXGI77fCCArhw2CID9nv6KIi3bLYMcT8g
a5zJ2iirgMHBprf3CbTdanC831CAVdilqzdun6F1nSCCIH3mCgVBvSJrzr5KRHptY3sjI9Tw7tPy
kp14mA9sMYHCjh/5VXK1xpaaOh83/u4+AnM+BhzqHCyV0BjQP03T07naa8oY+z5151jXwNzF2lX4
uWqPAfwON/p1BhIuTxbfZ+2k3PNDmP2ZZwgeMYEjKVuP/hYXrRWMZ7xOuFT5QvN2WVm5lc5Q0WiX
RAMNXcgreIjYLv+rsdlDH1eCbzLUid5rklvTifci8kFkDPr6hYGmQ2gXg+OeZpz6bLyVWVjFnEYQ
xGiDNvtkEjA6G9EaXb8/QMY8aMRoveVwHMgjAKaV4miPFGcbm+UBx5o4Sq22OqoqicWVNV3SPmlb
KzPeg9JnOZWLhfvNoen9DEabAjJ8VPf+mdjOo1Di3tReyKBI57mTFPJehMhEVHBnxzUxv7UPKGlX
j9VwOmaMY14qGNKU7FzU2YnUn7yXMNeyNtHg2s+kCcnRFSqHsjthTM38/Z7whr2vUwQEattxDJuL
y7YjfZeSU2t/CNNUwwv7jxbre/a986bfqPvggDk5ALw2vneVoKerVRsJKDA3qJOkO5/a1uKU1IrV
8WEPtrvbd16g0JrRygakFT7o6BvM5uG3cpZVPwKK0BrKRvb5F761SObl7zyIX6sBfJxoje+ZdYyP
8mDU2wumMA/s8wFvIBQhgKrz6Gxt0hPaziRZZZsb2NRM5bqs9mipuqh8vuQ0KqmFDVq+H7Kcx4nl
xotGTculdaDx08/Ptl5zi3qyyPg4PzoLRpV/dscUGO9oLFuVBElBw5sUE9MlpC4YrziYsF4tH8JZ
8mCECLvlw1MfEUT3txtMrPudXocqVpS+HRF+gOhVT+pSR3f8tCUUNa/O63ruwapV8p4GMVOBKdQF
rwVQ8yrrjtKSYmlMqIdJ/GFKbLJDkLPi06mNdOPi56ZgtFMxb9xN5NsU2+MsESQ61M1A+jpmpN8w
cvNpqYmdUhF1XcdTOgDG//J4Dk95+Zjo5luY9PDxQcb8jxPqw0UFnhyrYXDeoVtnBL3nVh2xFD8q
suxzE5wkaXZEroRYOnlXTk0An3hrRJJJmgC0bGv+w2KlQ/iWB152fWeMzElD50CeTLJI9Jhomxp0
rT2WfaPImr1GEJxmEva5qCWprSX3F1J2NjxaYRjDc6FZDnDQzMRHxschzfoSPTBoWtEZidogTwof
f6vx3rKbsY79/Lkr3ozIFWztpcVynEKZX4N1wza3B6TZ6TrlIe4+95fkIKVU44RfHMy+PUpOhuKa
gpPaD50IGIdY+4nmtxrQGZ/ANK9wv1vWps18njvEG3Mg/k7zQNJFYLhEOcI4KSrZYkZ+8uxZQrwO
EsEBi5deXRyx51aEKkI5zubc351xi5aD5EiJDR1HVu0LJ1H5/6Ixq1Qtmo9GPyRP3IULa950AROy
gy+kgY+esV6rxUvmlpProbjqAeqI68lwTgIUvhkBt0SL167AxKtaz9XbFaOKESGfSIfELy4k1lYO
RB1GqVd7ZFLkc60Vnx7rOJk6eJBMhC4HgAwy9qZ8vI+OmQ8MIfVQ+hUIKPezR6OqNUWI8JKJVrcz
HcWdTfwS3FEzkxs/yFxH7H0k5vf47kDUwzf5xGX2ggm+zePB9KrKeEYuiEoe7JX3L3IfhoJu4guk
FnJ5aEQmibXG/ajEo9t76zZakTyL0Mj5kf6W4nyNJDgiqhI/BKWAbFCT2caNsu4DC4KPWqCgu/7W
yLJR1xX6rqPEqBKwPFSByIPQDD8uT+e4XguWbPd016FLbjoSD9YFxsOiAEM1FFNAxIGXe97M/DMX
qLV933CAzF2z5azp2wpwF+lnJKkyHKMSozUwHjJ7pLinMYZwv0bMtXCbCjl6ztcMsZKLwSNit4xF
4g3ao0jHDOP8ZzuuuF9JfKaAoOx1uXiRVdVgrRda56L7n3+k6sCstDs2dXSF9ov8+3y8dJo7FrnR
MmtoBjG/6IwjgA3BSWRnpElrLEMtzZP/U58SFam7q2WEAv/0H4GxywCpl0Gv1h6KQKKg8awhFf4u
2u1mE7rjpV8TLUscrctI7Gsr3ts+QlR495yhwioS6XEawZLvAkBfb4pSDWrtxTewXwym1DXeGFmM
e3FpzjMKz/jTMQFKkUQJUBsAHds0A6MYSuq4+rkJSxFMFzcrnWgqS2Ktz7C75bl2kddV8yT5/mcc
bSzyENKfxUFWTfizmY5qgYrtColfmkp/w9TnJrRG0EOgMJclT2T3lqE3bW+m0ovRF2pWvqVscRhF
wPJc911BxY6W7xg4I34ytL6hws03dpRLsdjxPd3VKJJZOJ+XH5tZUZjf74dI6vO3XZDXfPh/AzT5
ieVfMFKtxVGZ5e+WLOTeioHSC0BvymSprqD9f1RHrenc2NZ/gNtZ/C2wzjK2nG907E4xiId1sz5X
Bn9lHGA/5rBpnVwMdijWUj4Z7bzjXIlR5If4RuG9nhy3QvS8lkEqxrpY8VqFdXZYEFgQyu+c4c2j
BM5OHJtNdSkYoyWlppxQGV+1N26DFn3ep0t83nJJmZtIv2VdHkiChkKvxkEDFzR7dsAF+loJyTHE
4B19JKaGiZ/7aEZoY6h11dxKDq/EBVSoHOeQUHn9KzDMJDHb40KMff3lgXEaWOCUQSUvrrj4P+Yi
4wv3ICIaEE9k+Dsg7iP7uv0zAYCEXncEyL096xvXkcajENtGFtsmHt3W0xRmVZhlFXimuYdG6oRP
Pthx83LJnDXYs+CoRORC7jsU8k8VmYevge99gA+QlzeBfpNbTX8aR8BzJ4X10i7RRDQhthhpIiJ6
/SMmbrKyCk1QibbpDEuys/5lqkUjhMT53DbZCtj8+g37WP2KYKFJhrr/ZRKZ3uM5oSoM/uZ01dFR
/g53Ruda5o6TppssRdvj7SgKE9fhn1SQDwV2MuMQFUl7oPV9cLKm0vHnmtx1TBIJm9r1oRKGCHhr
Iq3dyHZUR9JM8TwwLUK7BNdZCVpQDvkJp9SF5sAO8l7RDc9xIRxqIypLVGChbddj+OY097XjpOm/
05qt1ApuQTi3roHVlayTm6qIA5IQ2FyrePkDlNMCBB73AlbHNbPJ/IhFGUJxW/5fxmmq61xQiD3y
0QdCyYhW3x0u2AHvQz77VqC6oBUbD3EKI3qZh66/+sTDYp24qA1/mCF9rCaCEeumbR/svx3hus3b
4q1W3VS0Rg2JQuYokeWK2JPglGRw2GhBCUzZk3UGFo5V9Vbg5YP410C+l8ZlrrwXMgCcb97ckfCm
uUj3CXnCYc2qfnLV/Ak2xJwKyJ5P+NgK7OPFgDAtJtBP4iij33cwoXwVsEanxUNboq5RD8ngi3+H
QAfxJ1RV6ln3bj9ZvjCKDPtofGZ7r6bVvgamEKfXqAS1Vp/anQ0DkE1m2tD+JxSo/DCzrVfZVARV
2MnvjdzCYe0nYtU2mFvl5xPiDD6Bdm/b+CZBz8HPTC71OYpmqU1rfoRfVtU7azMdYi32QA/Z1ytc
W9s21sn3jrqlBBHc3BrN/3Eeq9JlPGGBN6HR2OwGVoNZf1EwSLY+MPR4c8akRZGvhI7kUiihOrH9
vg7ZRofrGLVMS1FA/hnRfrmTEQP//SH9liOvdqyDFsSB93rug3i/HdD0UAcfV/LdEv8puQ0oB9Tr
JBKK3zsW1UTm8qkHUgDXblLdqD1bsJz3u7Vg0hKZ/wphSq5PBpf9wlyWDkM4gI0buNv0zAFJgbM1
6w3vi6W8rHBpMScuqQ0xRqU2JvBRsp+JGqI2MPv4Gkc8361dNSxDBHvlE4QRURGLqYbQKpd3NJI9
jj0AtBvyocdyrKXqL+rCwlIwvHqgRezGskeeNwtOWQZHXXv9ui9Qhexcj/NLspDVSo0Udp8TSAFp
+3xhD0gIWhVkLc9JcTelZJ9P1j9qsbXA3fXGTx8DALfXd79tYubih31frVdk4bxs0deeIWC8EEQN
v2UwDPPtdvKUQqFpNo7xe80xRgK0qw5YOldFFzFGkf0IEe3qAI8LN5Q1MOxKylrll5hyTjN8LXg3
kkP9RZnNIpZ0Mcf15cyzPkKr7cO5oe/ny/HcZ+cBVsoyZ5XHTyINIc4QrGzBQD2jE746ND5L4V22
dNzcFkS/koSv515X2x8Yrx8iWiq9qw2SV7dAVCBiNg0FkKavVIfzEa1LnRZWdC2egD6oyqYLUwmF
V80uVw5NjdnWInWvu3H5gRGbiOtmm90QRFe5JLQ7XNEPTgqOM53NAd+5fc2yUGBLcDMH8PEpk1ti
8cDHB0hm2dhVJLrOsF9IzP/vKrYIrUZ4p4JmCf3vidRNLz9W0dqRp6L0Hfeii20J+bxNb3Emc6n8
EgBu5Xal4tG++cOt6HGuVhZ6W+VDvuMYZKTdUnEdX0Gwx3ScgqErsU70QKVEl40B38v3nvtDLaws
CKzYx0OyCvcbvPu2lqTLVmtWtxAyk+bEEZFF0ugSzpfz+OI3TzzGWg23vJHmVFXHXBZv+m1A31Bi
WLBwuaqneD4EQDyJ9z6D3MPw+PJX8Qt6EryqKo2XzScu6uVCpcr77BnbSCHqCHb29dU9Jo8ICLHX
GNFlq84OVxLZBbLVB+81/AekIeSYPGIVRBcG2wuI7U0vKHBWw1VBmjKwS8Pfi84MUyQVagktLWeM
Ge7zjttvvMBxDfkQ2QeH7YQYjaR2cCiCJ8h0u0ZGlIrxB8FRgObmayjZQUb+JK8W9MN6UBvRRb3F
+7Q5Seiv/lfBb+J5uGxPpGLJoGxTV/ia6q90+t9eUXew5PjsHgGz6o7y9au+K6+BeeNCHJWq39Sh
aQpaW4xit8WfUup1SPd9fvBHMqpKHVOvzTAdmmYT9krAHzFKPLlha/BjQTQ/+J8f96NH8j8KU1iy
oXs9MIzenzULaf3+EPeTRRMHUXhBJKFXbhUgBhcVOlNGWD5ebwgstSgDywzYPqui0KFguB010Dxq
SpvYfhWTGAVj20cahhz1v1rbWlHbzV3/NJpQPnUJf87B+8lKVAUW0LmQjODloMkODQI2lsa13qaF
/Bya57wU88f6OEaz2TPHU2Lx2m6uztG4H0VImqC7snPnI0pPnQBl05vuJsnIUWIpno0WkosHl49p
gH/micTFGWY4FVG5XfBe5ziSvTm5iPI9HcVoX0E8/HjggpGQzzDK6BeW/5V83sUnkQSAiinRRKcb
DvU+2AtE7oppvlQRcGq+HQJDZ2uMrXhGZSTTvL2MSetBXnNphGvRY2ce/mHcnAv1VBXEeKhIruR3
Hqgaza7NrCzM+8VsNoW7f+M5Pa+9mG+15evVHlbLMN9yqhf5peX3kKIMLNgjAaEs8wnLgPZp/iP/
DdKFlEiSRasCDOCB785m824i8g8lEfGuWqFXrlzHdBi+t7h4/o7FWT9q5vpkA/5h1T1acHwtv3gD
/Cx2Q0spi79D1e4vvqEdsZxY4FVapQ+x7w9tWcWwIflz5KO2xXNWqxfhSqmoh6BWx7ybPoVyKEpv
by862ZRRklZuY862T+BblEbLVnhfXugTBgMHIjyjv2I3zd6H5jKSkJ/scOL3vSoYKuWnemlS4cGf
eNmD1a7Yu+qADG3YdFL+f2lw0hzDs2unRjKUvMnWbY+f6OAtxjGVmtP7VLk7QGf9wmzvJ3WacKAI
pS5orfywL607O2Ukl4CqxPJRNZ/cjzBFW/lGxKPL5h/CKXsUnjKt5l8QgQtb5U6PUGP6g6vvxjlx
8TktJr6tWqjFe3QFHRGc7+OENqSzbxZ5jcQz7SyzRMHhLlX/+aDmmakNPIQE6io2m91VS6ygLGyo
SciQc+bc23zP+nb77RPOklVBecXCi1104xRGVvrKwBzFbK1trJTR7QpRhegIEIUjOYyXW+LwJyYb
m060GQ3W7dWoFndTAJII+boNuUXaqcgJ/NCmkaHgRSkVGb9ycX1jlVfswkycrTS4uof9CiJVkdKf
9eFvmWF2F9ds8CmLe0pW9tZ/Lj8LKBG8pECBqeRouie0b5kmj/E6URjaXWR0Wxvknzr9pMwwM7Dm
4Aszt1bB8lfRAeup+uJWDGldWJ6oOGH3Nt+gyVuPjKbgx540uAN0CIVVrovJ+gsY2YXDgUpSwEMN
+CuQpo9YAhlE+G6cSKleHMbCNQc7UC13ll3n2Td5MfsxWi2YgHsCh0P2fjEwOB6AG33LvOD0quST
4ZV2C7NHVjfzCrVAc1uOioOs02OtLOKBFITLAWHOzqlnB7zn7h4Nk6DvwpMisehts3cQRe7RlkGh
0XNF2HhKwiXiqMX0ZK8bJDvtDqxoxA4j5iB+pIApycGJyVONblaAMxztEXm7Croq4j/BBUTIiBBM
dOay40+lgD+SBACGrpH6s/TZGItic7rMCnl1eTViwhYJ+InOvVfipz5NgInIioP6DzX97GS2OdYi
N76391lXSgIOj+r7HlJRUpMwXup/VJ1SUp+g9feAHkxsHQUPjJ0O4ICaZ0HnA0BuTYTz9TTjwNRt
gLalp5GkLSFZXrQsjk74crGAt/L7UDiiKCa6bZut3vuoYCVkF9ssvcnn/DhU0QDSymSRYdOY8mRE
cnbrKatUf2BSaasswt/wj9bMARD/LPV8DI4SrRaAS2CundD+zI5GonK1LJhQZMj/0cURvmVkAxpX
/hfyLWxI4vFyDRuZ1zDFX3/AEnyQPK+F/e3lWUCGoxO0ayfPErQxZTReOQuWi6gdksfFnP3gvkBF
E0Hq+fyE/hVuZMqXx/zeBUGuBLN+X8mvF6vXuv3+gz2niOR+xI7RMEFk1J+i4JtKwF90Ro3fbJ9C
/w7V/xt3fwGsMVs5pFSbbmXBsp5LYZKi3BUCsk/7vOnMS/w6NWQeMOJpuuV7uUhvt08ODbQLCgCr
UYh0UmAhctbbw5q1TKuN4C5ZNWczunHmznp9emwC33rrLn8oCzlN4bUaMAAvYBkaD8H+1A0CV8mA
fhtCRytJ3/hnhpKnECBCg1bmo1NQSb6zo7owrKnr0YxYh8MfFmhtDWD1liJQoGgR1P5x/eTQihck
12yP2q8Hiuf8k/yTbMdfOHEgZdp0HudXRBKU2+YVaL/E5oVegmv2FgaelU9VsUekqVtgeB++wO8L
R7LA836T/Qlo9mXmoMGUeo/22BEsXF6355LOgMQKYIzltrSKFertF8fehV3cdKjp2kHqHwsUqGs9
au1OmFHHfqMHqv1ITw9v3l9RMCZDZdFnPtVcO9CAsOCxku80AKO+J3cJN4RkKEbU7QAKeE7pNqYg
H4gBkyBU4QsHgUESloIseUmNo33hdTuWlXFdeV4aaX83T4O9wvLMIwKag267MkKXQT6KYsDdPNGd
U1G19lM7568xXO8xltK/GXo3NIcR7oeWswq/vp8qcXpYJFEtTD2nndD7hVclPhcziLrQXhzU6hrp
CxAWlvXmxY43g4DzZ2sUqTg03C1dwj4ddR5E0lTiZOzEYUiQKLLItmvKWlu3QYUVqsLm/GMmWYEg
XcaHUXwozdcIGawxmI/Ttl4gNgMqFLUb1bA2f954ijWDdIHJqRdU78JtRGV9ssVN7u0hrPDhV/N+
3DKZvKWSonLY8RMReHwyjFdI9+jyz4zsZJ4ik4H5szgmtcMmHn7SdiRC6lxopbAflqe1PeM8Za+H
NitJNrsejpNUhVN7Xw3WAXRU10uhUGHyJVq4SfIYqFULNbXrPYmzZlW8Flz0Az+P0vZgrjKatHEj
2Kl9segwG+NrXopG0jt54/XFJQiHUqVDf/H1ei/La1aK7p4vp9b+4NYrpDqvuf5TkB7r87MdsoUz
daR/wBMFvd0DlfD74EpnFslm+npJ2+xMoJVT09SC2sNAmG+8J/hjSGxTloMR8I22Weti31jmxE7U
A8IbfDMdcay9LgOgyt513cI51vtZgrqYVREBLROdCasyiCMv3iOHHzx2u/GHDo1QBM8gOpA8pDpj
1CmbfzguRKN80HGx1ECz2gnBwauWlGx2KwtJIBa7yuaZZcF1WwUetv+x09DHWRbbzI9Tfm6Go90Q
AdhaIN9QvLzKcTyIgC/0Mr3otTcaayrCQntEb2kIesgX/H0rkegupk/r5xyXHQcM0npJgi9+78mS
s8DaKqVmlrgkHWHgf8m9JAlHAyrTvsqLvjnLy61ycoVUtVpoZaFVAxKNyjqCA0T4li3n9xLQFNjj
nqu+TeZmL/hDKWTjjSInE8ncmr/hLjwaTyuZjUTIZDD0eu9+PLoEPIee2EaBXllDW+Yw6TbIYP9f
Za7vc5fcyPd0la0hg/SKF7OvXQY6GGkM/no9RHlBeDE4pxgS1JfOcmorDkzgG3ouMbjh9i0IVh7b
snpeHarvmShEyUd/079l9pGOh4SzGKp+av63wibvG6u6uDGUVqNx94tnfs4r/alSxtQ6igXgdi0H
Dd6Jygx9Yc81LgMBedWwLHwhqZk+rXfZCvC5R+zqnGg36X8tuGoP3J685MA4EOkqlX9Uzgmhp/2O
W6AFjVuADCyvP5j/urdhdJ3pMrzlQAfJP3VkAW5/PgMHiskkO4c3I5J5h1qnmShc1IEd5uc/7yFt
kkqF88b5jVrJJjcN/7eYJJyaLn54FbX745ZDrwKP20V2nwcxiO4VoxC/7S6StxkKw6QGMcfiVjj8
V0vpYmor7h2aHuHlKyi48qtzB794ecHHEEMR9vaScIG3brWymtqgNbjY4N+lwJI08LRg5seKY4Yr
QtCiUOxxXT/ZUV0nk1yKO2dL/VphJeyEvD5XdQgyMNW6ze6vI/ckwYOQm3PZ+ALYdel52Ux82kL8
kb5WsQHq0qiTGe8xYKdGPsmpUnMPG1Sq8OS7MKsEA6cBAJy04O0DDJzZIp8CPiWLS6xuj/wACf1L
cuVhe+gjn48mFVSLeUWAPY6LbVoxusq/oF3hGdn/UNHE3ou6vPiPGgGW+kp8q3iTHL6U/Gt9Jt1r
I9lFzkQqDT34WTx0NAuQnu2wAvnKfGnk4Vyul0D/+4o1IQ8RhHiZ4uAcywBP9Wq+8DP+RvwoOOD5
lbUDrMpGcjcVZTtfKXLLfIRvw+RbYyweeL/TjEviuyAIJ42TFCBZAjvz2KjBmWc64iBA5U8V4M6X
vpJ9eUtW9yz5PUNyt3JgnhMBfmBjfDvx+8EGlau05/4ILGlsLeFOU2HV1W6sjsaVgnvIStgIKPgK
fVoN9vyg2Kfldx2gZRVEh/NdCUrOUYPdOngAk3EC5qT12iItnxI4MiyhGfc7AvbhbXLtVdti9Hxu
rk/CmQ9fC6CY9UPJwKKtMF2iLjPX4kZp5f78kQe9GaJlnIHaLiq6x/LMiNdiOCz9vMYEXhNwG61q
h0ulyjGqzS/eRfI8riRKy7h8z7jCZCdp2bh7/XSgzLX6p3nPGC+N+dLji3vZ60jB53UjaX55ZMEX
zyv7lwwhl7/GUR0YfDzv78H8v1DvFRRbzkj90IN/cubMSYptXg7M9eneAKsRBfzPpTdueyQfapVI
rkrosq1P4QchiIsEU4RYW4lrj05VsQOQT5qiQHJyx4wCbNq3G64zCxrHYmf73mfBSjbcz1JR/rvi
Af1yyPDjqcyAdt3M2Vu4Sne/cGW+kKoJSpaf3+V5y247O3fvBg/u3Ms7g7ZAa/3O3yHHv16DaBBY
98aGXP/f4u0kzgYE2TE4HAMEONpqASDhfxUMfmKbP/3hJdkxMU9cv5LBQwwOfm7xyu1wn1ieDroc
ib4GQz8h0EQkrlBviSN8RIwT3mG1x7/n/nwC0btrhAG0GU50ce9EMbQOxaX7X4DjikVjmwwIoHu9
R0SqOvkIvHxMdLKEQPu0ZlOA9gKcEtBS3YJ5GnIwgagwgg27Q9GKRqakkw//sTfQBGtbUP/h6ZUW
/tBRh38NP25hx4X+jWmiraksMGqUzxvDp8ThAQilM3ebCXWSWJcus3UK1Kf1yUpkLNPEJVemEEcE
GrKWNJU7jKyAbWtEvQaqrVa/ZrCjnIGvsCT1OIcO/8dkJodNXEAg8EYAzJp7PTUZoAZRxTv8CfIc
gjrLwwmsr/ZMmHZvm1XBIEKV4K0kGhm4zgqRWT7p9N6wWr8Cf42nRcZsAl8XqQ6YFtJeHG5gwz1g
JDEiTAxY0LUGMMDKCErLPHGGvZSnfgfxWB4ela/eUOLeecj6zIt/8uVFJT+wolSQXVK/4XkxA0WO
pzWGCnm/0F+00pVrZkQkkemQUKaApiFpN99jh/7BDYyOu4vl33wDsXPhR+RoLMrItYwIEnShbE08
0twzYnzIYGR/vQpS4BeKiYvknNOJdsHQ2dsi29RTea3NpvkjN8qiKebWnIdwIFcnStq1D8av8aA0
zQ7lSsyNUaSJ1VMAkLeCh5RWzXrF2Ies8LIaNshoEWOhU90SatXLmIKUlCdf7NXXuQh5HVSe1nX9
ajmSW5tTuT+mFQNUgI/wE+GO13LQc+2sxmvgJ+4J2AJVUUJ9tHQ+LpTgl6e8fjKly5KAHhmGZmmu
PJ4ik6lWOua6u9nFRTz5/CAJ/qqsWUF1BWlgG4ZgwduD0Jkv3lmHfbA8jz/iGapwBdtUFduQU1CC
GhXya1oigYquB593Q14VlLmAj+SfurEXrzspxkVUKCPV+SzKVZEIK7snSZBIi7CKwAH00WQIkFV5
YxWXgmNmKc2krW9z5FCj5zDfwpJVjXcAqYtmeCvapDui3gK8NW73qGuoavBxF9a+Hj85I5u+C7F3
8nQ7k7IbFI3IruZyCA1SkRGcR2aLqtzPZ1DUXyOT34oYWfe75o3HmY4Tn5bCCk7TLU9NnaFKqogS
pYml5m/iiwdANL5kK80wRFEdsBe+WWvNosRO9cbndQGO/z9yGv0Y4BzrA8hLgYVNDtzmZ6Xp4Rlh
knhMTkSiYuPUpnsYWX92ZSOK6bXAXKYaI5DMFcw72va5xWZbULiyuXh07IV+jgdyl2/HQFnRtnx8
99XJY0qCK5S9oxXI5bw/i1Ed6WiyTO0K+JOHt19RjyVH7KtxdabyhnNVUptqLnGfTdVZ7pYx9rtO
TTT0LMg3pV4MkKraF1RSj0J/CJmlBEadmFAP1o/z2Fv10Z3Fpu3KmOh6N6RfTRcNP1o7YaSs7YSG
gW11XN7YwyTpymYBiE2NMMqdRKBrU5SgH5BORtNCN6tkQCnpJr1I+YjIYsSm7TwceIDiW6rrWQKu
8yBHYBUNAT/M6/Vs467SKGUhszkOPCRZF0wjjJy3poartng/qZquXn8PMK3U8U2MmkDyuMD+5izG
dhVxTmZrW/D7mXcP/RdXzC9dLmQov1cH66uw7rXvkwZOkLpP0cIfKnP1/6adU1VU3V++brBBUfZR
cX3Kv17Ef5Z6NbMCVFl+4DTjvgAj+Qd+6mEl9TU1eOnxJKYAyexp2Uv0A5YI4XuJaSYqI50stBJW
DHktQKkuVmvUAfLxTgibEolqsGw5kyb3KC+qX/xd6QZ8938z/P271Ih6MTqZ7a9VhCE+Fw4DGMHa
1ChSlRZeyQOJuvdyQGmg3vdvgUBZMFhuyf9jVU/5uNbqojQyoUw3oKmaz6uuN8cV2CGNK1QW9Tua
ikpasDlyLKjdYZLzDyLrPuL8p+QL2OcQ5AzzmPmM/EKhobG1BorDsWTsTC1c2uvKAI/TEpuvO1Tv
o2fEGDm+rlfsYQKZMt4NYLbzzP657oKG0LBqx1/wvJlPyzGk95yVJbIJo3UoYN+s2C6r3HDbaTK8
apmJw0ChU0YanjnfXmQym7rwN+Qvbmquhk9nz2HksLkaGPISyHADn/jC8wW2rwufk2R+SzWtFDJE
n2FgjL23/c7skrGfiUJBNDipvd2okbTsXo4FVxpY/aYzMQziF2JICQDNnib8hJEnIQHwPFhrEZNK
uHAIkOrG/pWquORpgBQOSW94oz/c966iMky/TlwZ+bkoY6JiZFDA7wTH424RdPoxnkmZ8QvEhZqd
93mxceXsIqmqb/2x5o7DWJj0/YVz5x93LY+EfVNf3mi7GzXj7mUlugLpsafTh/NfBwu6xLM+Puso
Tes3RqnZ4umdHHC/ND6BQ00QA3lWEm0al2A+FX9oWSaLbrVNkLNzJWtm/WPhG/v+SmuwLf/jUzAd
LJxEKqiOcErnc1SQKunJFw9wnyCiKzdkl/hZUyIRWwkjsPCGEIwVBf4fSJ+JU3NljBIj7J0iwDeu
ceRGEx9O+tSx3MadoZ9lVRJJLrLwn9TECUq7EDz/r0SScRxAFUHjrcw7+wzEM9wUMk7JrR8VZXsP
65OYzMsIT25pkgduYQiboh4GqZF1AHjCxv1SCGyWjMaYKDiNEH+Rh7mN+7tQ2LXnGswj6077+/bZ
oj4Y9Xm0GDDAnL2YsG554uhWW6K+7prv9q9/zvD/PPOQW08SRVqYkGJIrhQp1unf+ldXMtXTs6sI
XKEKa9OnUWFSFGkxU3SGDVAflrlcVeNfQUolJ8w8pWx2FvaPy0+28IFAFOmwYchY4shOXdqzWHmF
pIZGRsoZk/6aHE1PUNA8n63Jc1ovUgI+XndGrUU2S55CN2Na9kyxwxrf1L/mT1tjrTmvZjSySejp
zRCnc2c+hl498OWs/mkdUUN7ef8BY9PE4J+4iSaCBmGIoz37cGbtfJy4OYEDrNaw+HyVdNBy7UHf
be2JCGuzoSrAVNBAVua3WPWdqvhPFJMeE+JIa7aUWRrNu6VjDdAcwPWTFzBTzh7bE79dHq6YDfYJ
+o/iOkdrEd6z3Qq1b67lsFhwAvAOEeAuMFVy4PTFFGedUEL6NjHjgdqHxxL+QAlgsuyogpa2T25P
CSfKU5mjBw9vByPLP5slUm95ZNnc0ztSEhipWRwOXRriYIAsjO+insfhfrESi7zYiwVNhsNzZH3A
Q9LNX49rzj1sCzUgJlil+HXc6ldqeFHwcxdaOIZEK7Q92Koz4eB9SsR4zlh5pouUH6Jeab1HB21D
DEZhGVIJzMYf60VEQgM2O8W3gpGZtaBiQMHH8vm+cHhlgJ+MCH7C+sp3LLz5o0hmuukL7J1/P/qS
cvy+JwSqijeWONmKYQTwcK0T7YtwhGa5jxhz8gi7cBl5asqsUuDsAM4GpChQ1t5pBfBKT8i7A5D9
xOK+LoAA9jWWXtHHFQuYU0M3ESBfc9zdMEQQwRbrL5kauwZ/XZmYReGiuFxqjCWSpzJGM8iLHfaF
DGlZBkG3TEly2FzUBqJ4sbje+6CrMWodJ/5KwSTGgLTjyeJ4XXpbXGNK47+ldjgXr5k9x5l0wZ4t
wSIYNN3sEc/mopnIy0z6+YOCWKUC7R/immpdr46DaapsThrRaM1yIWD66347WcoarVlxbbTYoWrc
wIMCqfzngSfYhzvAq33vkqbuY1M+ZvJNv2R+M5GpTRYwooVao2cuK1huNOPdsbQwu9YPZcUAjeFc
+TDFchgtvLJr61UXbPjp8sFg2dMlusz0Cdo8Lmt+ipjbxS8h1zbpKsp03upP/efS4QfDdlV8a9wG
7wEaz+YERIsLBiJEbwtvftx2eq6bWoXOqUryvHljeFSpY5p+pHwW8oz+fU3iIwQWJhnrdPfFLdI4
QiNLU02c49hOfJndvh46N2sysv1vRKS9UHI3Nh8Z9Z1uZ0O/yceGaO1sj1RMq8vf/OT2fEyj9OdR
6i80FgE8jCkUNrzR9W4ggS27A1OQ8bxpLb72TMnh+25LphkoB3UhbIp5C32Dt8hDrV+73Pfk1Vsw
lZdrwsgCcY11NqEQmQ5BYJ7P/ZFWuNKZb+HG4PDRXTuH0CNDUQ2+OB41mkRRR0zfGmOdLpSUH04S
wiqy3yhZSdZ8vz3w9RpaplGNa3P6tYr8pb6zGIQArclOqetZqW1zyS9E0v5LCXAR0Be8mta7zc9K
xRcx4bNy0miwOF/xCjZhqNl1JVXuQTlVfUijOfcB0nkbpgy3rzshG7reUDlWrLwwW65VCwbc2mTl
nOpoXffqf7v6l3gPAnZSYLnSl6p6no+uaXCyh5n8aX5Z/SXLmz6FsSt8EpMrKbiwvEK61hUNRlpe
R+S0mljcyj7zq82wsmAHCJb5n7oQgMTJsCUlXo4UMYDV+Auq7W2B2joulkdyOBowb8T97eYSBeCR
Trul6w+vBYn+oW0jcSvNJDI3322KCQP6QXP26wk1KXhjeGqLDFcqy7KkCAuFmI/Woa9ExG+L7ekg
Xq7v3PS6Cr1a8EJ4ZBUAwMJTYZMwkSfETjRujfl6kMwKmLGtTYEAi/MWTOj3xAAq++atqee/qXyB
UF3Klr4JlYNc7ORQDnivppuuQfmXpqi3aJ7yKuNdCItt3RI880q9rodO5pxD99j/2r1EH9VgDPWE
98QIIU7L24aIJJ0nqu0s1KZK5M0doTYW/CPd+TbcvkSNLvfV4aVeAawuMZ0z22kxE/YOH3kOcVb+
1gIenSZLqZ8cNacxIAvoEJz8NUYTjIs8NXZlFKXpO4blv6DSlCaSrhTzpp2qMvdeuPzgLVkq6KUr
v3r1r7/Z0RIABlqfDb/AwukLYGqw5iz8ELNH9F+AbhMhgkWu03QYvIGp5Ouqbs1ld7vQbfvAhQ7D
fzFRQkjprf2ryxtDcVchY/PqFfrSF5co0/a6imoHFOCtiXoZHDBWno0gCIuLxHk3WThMhNwYSHTG
ZlRKLve7BAe/LcnmSeTBTKx+wsLNazfLGHrH52icuyEv/gcQksYYxqkVOS//AL2eb1jumvvNEo9f
0oIRQfS37AQhBQXW2FVff81TCsd5OsUrkM8gEy+sL0MBxc3LIk7/aUgb4LqsRpZyDQKZQ1VxhwiM
7pJb9L9A6D2bdpvNzeMgINbI7tkBBNPbrG3ZXSkUsZHV7FaGXdHzwwnzsrTB5ZZcihY7v0mJGyMd
aWoC7icF8gZxAQ79TMRPc4EDVxP3/eHRaEHMIfmtdmZ3RG8CSzHsbunDqJV2Aec01ybnq4qf0C3f
7Vftjzc0SyawCNFmH7ctpKaqyyovGl3LQ3DEvp9o5L1hswLWrGLVVCE4eVYFKP2x/YUxvUSjUF9d
hSIUMaQ2ZysCo0ooNfNTvGIM910QV9RTIDENZoUvb22pDBd5DaYN6eTz1oll3OTHi+J/vvg7EFjp
q1kiiUREFKkaRB2Vq61wvkg52sBM2dgzhLR4fgv5neYbi7046LN0w75UAuDqyg4Q7/jtWqF9B/VY
CTOnWdrzeoG6r/MLjrD0aSP706aKTYTmDBfNDV7E2+4qWOj2839J5XnVL+E8yGulhzVe6Wp6X3kJ
Rn3aEDl6O+Cht+le3+xD7VL3TCeYdUhlhBezPZHp927QRleuNZ57StrwRMoBV6Wi51OlTKDa7X9v
L+k0UY7Q3R7+5mEKaVZKqUU+FieuXYrKG35IYCPVtZOLGvqAQBuc7u1eU9q07IzBi5pq5u83kGhl
UwwdgjmNqLNuxY5C8LNxRHjtEDuuczdxAlHb+fkBkJEe1B5xdTE3XWyENnfNdVngL72X76CfzIVv
vuZEuovPBNgtzdcMJDA1BrL0mANvByQB6/CKcx49hb58010BEoKoX1wIdk07sb1CaV+23H/3wSzy
lV4Qoz9XzkO/MeJpFSOQituO2QuHyvvPjXdanAvaQIsAkrQQXmsdnFkgS3G1bct1TtcfctpoIgKF
ht9Kj4BkLqY1Y1wRxRrz/Yu0WzUE0NaPlgL8LIoHoojC47KsFVVVH7zmwGVOFOhND36hOYdvu5eq
RiiFSHgMwKgM0bPBpkK738aPW2qPDcf6R/LBFgFdCq5H31ZuGcI9OWsQpD5xix+Ah7Q6HCSA5YBZ
5ZP9Xf0ovoW16pm72Ehpypm2L8TqGRdTZkoFAWEEhoCnSPulENTb1WXePiDjSXP/XB055x+5DSBL
n///kvWC1r9PeNrBgh3sqEoiOBek8zNOi3EJr5p7My8/00a8+OfQrQRW6jWOkn/fzyaACXOczdAt
fvsd5uTJdOZGa066/zIOt7piKgMI3cG9/A6t3q4y2DGQgMdCgjAlE3AAcxGdzvB91h2BJjjFIDz7
lKWS2cOWygvcnjVow924+3GFLyVj2WVm0XM+PLOM/+sc4DTxJ/uA0hEpzSz6JYr1jC2DrHIuRoKI
OCtBtCIYKFoTW5GyXrlLmKWGFsIRdhCIHc08yo+afP6irvYRU1AFlVDIsk5w2hR0hXLmh8HCS/cq
QIpQReB9sWJZzzrcNrLFV+VcCWWyz64s+b9QW5ZqCsPBrIM2JBdeQseHhK8z8s6WwYD5+YaeFGDi
lwOfH/OqgRkKOLAP27IHouSK+2V3j10tq5iWgQFE1JUsz2ZPZ/Rplm+NyVV4CYfi5I3WHse+Q9bg
xb+O6dU4MsrG3HFQ5NwMaGsmrxxd+q+du+4TtpDAmSIUt5OP1N4zyiC14Kbo2cWCLOzmq9i6IozU
Onha0t8CosqsgQMdNiwBnDHT/bi/knFCzV1KT3nYKlcESyUDj7y6JjKUEx9dfm68uxXkApj/I8Zf
PVIJjdSH+djeCpxx8u9g295BH64gn5LyO41A8RjC/xTMAvAjaYtCbaQVurz6jZo/artdLRREsar7
k+LFkxZWmnRRGOKkWZLe3m0F2WaoemkKRVmUXbiQoFmBf6vTJV5p7PaJjsNPJHRps4blnM5F3Nrr
gmwX1hTc7ym9s+Zwj7F02AO9jLsebEVwSdTyRCkjMKQKJ6qaN1avOKdXuvhjCHVAyi3L85pIZ/rt
93NHbxzXGq4g7QWl9QStbHJcrVqVDmHYAvaqM8wvNE5GjOScRQvSqa02RXrLrZTRMEsdBFvKfD9d
dVyjUBM9WmRx92tcjr8bLfzPTUu49tg/7XtEg4BsDhHD8NVYvXcwD6CIngHp6XBIGtM5wIGgzF4a
ePKscG/wIgLCJB3qnk2Vpf62eWJnvsKvu7otRXY+PTXuHq6+MfO5QNQF8I5sYy1j1I/oWxd7OlUw
3GWRDNZZ0ammiE7d3Xs2/dxiUh7Ibzx5miEe0wAxxNpnMC5ZTo1Q7gHF+2IVbxgqpen9YBQlMgW5
r07YsYNRukoFeGm3Nnz1WNN6IMipDX51nDNBDYDv9s8dLUfUzuTfqB65k8KO+GioPT7ZCn88orLs
2j6t1egbWCZLXzDb6bRmH6k0BzWjweCPnc8Zyi4HfV8bQAOBZymI5JvjudcRzW492EYitNWFP7x0
qtn1YghP2thA2tm0SlkRwT7Z0bLq9q/u8JgUNxudIl1516D2l08vF98O3WVkIuDt9kxepW1opYcD
C+pXDjmypLhAKLmL8wF9RBXpGSjza5yAAh9HNc+PmMUVRttYoVBEsUnN4lec5MsV9kH/FMUezlAf
coLc5RlVawfj8RNgien9hpmrSa60hE4hZXLfZWFB2IxV2aBU9DE584JI88Ze5scLqQnxHT0rrH+m
MJ16t0sbikITaL6vaKPxXSpZxT2kfQ5tlae9kt//s62KPXLGgCqBhhiMtEQ2na85cY08YxOgMkpb
DnMfN/nKqh07DNBqnxSnZYbt9hQCMZXH/ctq3UImnDlLUojEFdJqPC6/rBOaZhWsEjTe7xXSXC0+
zl1sigyjss7DRbIXbCA/V9i1i3i5QLBX+Y5dpkYzNQn5kKc9+hKPqXhwGwORlKW+qYrMAjJ5K18l
9w0owqBNU5xWpjAzRich4SjqUu3w+hs3EuOKSBgqjvqxrvRvhNCHprcZiJgXIUitj2OC1RS1HLm2
oFMpmyC5W5T0moCYykWUwA6qelOBRU4cGE4TJh0bBQGvBrcfB5wuDoS6JftlgByYmYDpOhtZDjkL
1md8A2u2RNuxn+k9CPjbuz7CVeDXzt550qMJbWK7gobXFV7zxHK95tl4h98VMot/aoXmFd913/sG
h0b6n2+oyJi3DRlPIzxRte6c6wT6IThvRStKzEwPaBRt+A6zyXdYIUU551RacPhVgAGzpdvWDfmB
FVvfO80gbrZ4MBjwRKo4pN4IwV2PhuN+KNorCvzRsTUTaDrmtd2/v39PGEFIZUTajHrTDFEeYKN1
DEz6npfwCOl+NUwdG8fudjV2qZfMo2owGlg0SenMOFrDglEvydm777PbZnd3U/sh9+/U0Gb7SerV
GV3Dw0bIAdMw50rVcK430SHo/nic1cW7VG3c5iv2gXhv0G+sl3Rg4AXkuba8Gfmya3nS0YTPDbGG
yUsJOXNnyDVJfg6T2Y+dZMEqe5kqUZK1Nud7DBdlvSz3RZfoaQDmCuEg1rwAo1gLta2VHEjsFVSD
DuaUTi9ECSwb7HXXk+y8Vtlv+U0OFkvNmf730YT2+9xwq3i/jg3FYPPvKkSLrE1I3ZzDjrPd8C1U
h2sXvojjZHLZrTCSR//7Abe34pztvZ95Yk2GCLy8scxbckOqeXn/jPzSbWFtYrO0KQm2EGGWIuxp
ZsGzHdEfCrna9u8HC8Xf5GFmf5oVeVfmw8suNfbgz+IEjT3U5Zy6mdf96a39Jz3m9nqBLkIK69Yr
cs1UNhCFWGFDtd4kUVjNl41lVqUXLQ+9pO+77wIHKSPTTcB6AYkhmtlTMwc5CMuvNenMTwawUpTY
ONIB9ssXXQs0Gx/4enE6Ttuqr5airy12OftUB9r3syFkrCwEmL4B4Wbr+VPwpdWPq9Ud+vPOxCnZ
yimrmaj3XwB7FLuFtEG3i1iITRFPn6udZIU+iI5HNYX227yUi7akL+LKopNYSW+f0kv2HyqF5dsk
15YtAeKca5gTsq625HKB5ViRp1XvKHFuIQ1FUz1/Ep9GM9jZi/fYzXt8h8b5itLacgPZ+58QsR67
aUsnxi7hgJTVskoRqEIs6HIfk292CzTKZYLAoQntTPHEl80LB/U/z9gFGXtDIsnqnf2Ke1obyXad
byBqBxe8G+OdNN4MIERtur2bRyyqh+X8GnmxRioLn98c91473hLd1gW7kkmdavtaqGRkq/Pt1sv5
VR3uyV7SQN5bc+V46vc//lbIDKcrnafy3sc92DwaKxmvglpYZdngofL7Gvp6U4Xz4FLEyqvPmDUC
uqD3Y/ucnxuMXg/196Hq1JiEu6DvdrwE8VDIMJ5xL5/XjsHyMZzZ0zUjfjVVlLXbmsPyGL/zO2rq
f8bXe4DqwRv1tSR6evQrUY0KNrNGNfpIEJtTnfSbCLfmUqbAl9ECGoFDpZuExXDzA18EomN2VQn6
3IY8Bpu6oTETjoCrxdWEwGnZfrY2kBtCcre0H1ErP3OBqRfiJaWNULcJ4oPgp3VItDO8pwzWTzxH
bAScdfg22ne4+ipptN7Uuxz3Q01lK+giiC9bwraE5ZiFfLU6GurPe8XP4rSatSADF7qne58X6ZOf
RVttTuaQ1s184uMQO/7M958z7Aa8Zr7zRjUe9jOr9VSXlQFWyFL7/W93MbxTu0vAZwabS5/DPH//
sit+ufsMs9q5vMfkSNQKYkpq7tln7/OFo2gmCR0us4Vq/D+t1nvJ443m5aQumYKnbMrqSwSwoI2l
OHyOrteb1kzroFIMyzRZrhXmiWIGH9frHZYbZjqp7P7EOzMXsKs6xX6HW6Ol0YNxNQM2lrVpfn9B
mAVPc055p1s9TXH/Dz/lcunX5f5W/yJXncVA2P869d7KVIeT/7R8gZLzKcbN6diXZCloSI3FWHJK
0vBFGsO4piYmL1yEaZImHyrOyW9U2o0FHlW5wKmLsl9SjctOKeFzhvEwSCKpsO/rnVBwQiIsWjI7
LiuhLO+Kbq51ENcTvZNifm/qRcklhc/kY7Fp6GbggyyYb38i0gr3np4ERx8ZkPyQuqIxgfhMQd2C
/Hi3Pku1vr13vmTLgztXjgoQRkZHEo5hcuRxmbPceJXSqtVGcaCg/mKw1x6CWwWsgTgf237phkGz
szFZcpDJ8qzlvwkuEThXXeZbclOu8pc7AvKW2vfZydglYZJVmaGtZVsC3H3eVfadJr1D7yBjbfZA
r5/7oeLdINi5jxdje7itDcvFY63dl6Qi4JzeCN7MACf+gMQkeT0Y5gJtaWANMqsQdNLA4jAdzKPI
/yD0t7KkgSQHAwt8ZwCARiyxYcMnaA3o8fJJo4YVVUA3Q6in0x2SkuHoY0btnCXUJZ8YgjlyMayL
5Ie33r7AMid6hznX8FVhS19jruKSO1j46B820fpoF1VMYJTQdjws6pyhygb/U1wakyjtx62SfaZU
5IhxxypxRilwHClgPqS+bO4HytHmTyXe8T1dJfRZAuh3eKkbWvSKAqRhso3dN1zgnmSkDgzNVcIb
PPRWcUksJ2HBoJ4YBzVxqqkG9SQ7o8Ce5qkG9qhtjYLbCJd8rmPQqjTBhe1qw2ef9j8wUWqqolCV
P+KCJpcBz3qIGMhQn0b98WbTDbss/0z0xaG11EOZUTkqCCnHfHu7SFUoqsVoiIGTxx3um7s+RKoX
LqOVUFrYslcJn21kFjRuzndwJkxIQ3Fp7kxnQv78GCQENZr7uTVc6iA+K6hIjo/9dc8p4ezbrNUb
VA7yMerVSSUIidDRfrlbb0/CKPgR7JRNCwSKeF4EOtQ1znELfamRSQFMK8xxcsPhf2wmYStxqPy3
tXWDAqe7nZ+FSCt6XUJt8SkIV4CdivJCkCV22ULXtsKffTvKeRSaClBSC0DmRrYWygIiYG8fpehb
glFteCA3vnXJQyjYnbv+whjhzUaQ3qkhBe1bmcyj9J0hDFANEOJpC9vx9xn0oc/sC2X9gNH3538N
xX1RigIpUek06Vlp2wjma3cnS41XiMgGGxsTxR4PTW29ac9vDp5aDOiHtlZCt6aq/L3YPMIWEdhW
/xgXXgK8BqykkTa8Bb2uydg+V2OIuBSLJ15uyMnAkHSZ13XyPq12Uha4EsDT//OOcmFBNSWGkd6c
MAK4wv7sI8HNiLA7YcmM6G7YZyVIgPK67kNX69fuRKDwe2jRZJO/7ke9j/N2gu+3oGPy63zN52y9
9fu+gAJhPqkXHoNqaWEvBulEB9xm39HBrJXNo8Dqv5FxfHvuvEpEIpaL/GIwLdVlfFkRybdH8cWw
hhlNRYYZcdbzhyxnWpVCk2YHsg68Zgzs9n2IoorNaVJaDBkc+nA5IZ1qDd4pl8D9/gOi1hJkQHPx
lNbOq2VedDd4zvfn3nVe4U5Q6fmsRmJG9WkWpiNYrNkn7Bq4NGJOvyt5FRm0LJmXfF24umyQXitf
qF2WOncj2wEwHSL5mVill322yew//pxY/m0xEnuNW4eT5WaymvwJR29iaMFu6n6M2VwdUetmHGsO
ZmmGLh8gm4Xxo1vn1oQHI8l6y/ah3A6P72Wtkg5Ho6ktwMiuqibcxQhAy+Nd9lniyhTK3joRusgA
SlvYPnvzif/5gXPTu4KE+KtMMYiJZ1pGqbPBJ4omaEjDsrVUMWP5D5LCvwwE8q+cd9T0pQ/zD9a2
+dKWn6FWZ46gLNe7KjrsbQaZAEPjHFxpkfsFZ880XJlxrEDzGvkTE2DXkkBQREFS1HVQV6OBl8bj
BS4TJc7H/I2t4wUW29OEzoZPvl7TAm4SoPDXtNjxsUUMzZO8Zny1p8SGVPpzIjPvNyqCNzDz9AtS
sWrWwbKIGvyW41Uh5T0Jf1McCccM6iO/3Dx/+ncxQf+EJQujxbajREYj9guzIXxtySbntBsgdMgD
qdUWH+3SfE91MO7t6huW/f4I28rKidS1i1uEFEI6RF7T/avoom89ORxirEdvTzRM0DlcIna49I6Y
5mkGPlxxZONdnRJ4EgBf6SrCskjQZudgu5aZTrTp55gpL2ZiKQpclKWfLci+BCOJG3jJ3pRaubGh
i3yrD0Pt0RgJCbq1T4ipSbTGLeJYYa10QudpbK0kJRnaUD7DXqIum3XiGgzRnuTHPNlmB1/NFc2r
Rm4lxqsFI/kbyl/iQoIcqjrNDAciSNlPFuEKwfljMFhaXyhY2QqhrE+/NtN7EbY0CtcZ/ZXqPPhF
TKV5+MDim+UbU7NIS/wuyWgaTswesB0HbtcDsSWWhEKOEj+zYhYxJLXHWj72Te98RPxH68SnQrUQ
VvE3LLQ4VJjY9E3rnzK6bn+TuP2mYj9QOhkGTBfZmmvXDPATHf5kWQX/PHSR1dC7v24Yi925ZGUJ
GprJ/cDbOlSLoPlBsB5GF9SzVmbtICd2iNsDXgMBeREXsTTlYfD0edbPlVVykaYaEzO032Pk0As3
/Z07PcgmLRAFTH38/dVNO8oBVDdCb6sBTdgdCNUiK74KBeughfaGgC4OC0Kxp2fKsQ78xYzlrrbx
Xdqw9H6l+Vq46R02Sd39ueP4BWrMU9jarC67WYQIevh10VA7HoS6XF7thAnfDKFBSwkK/+y7hXqd
gvq+jPfeiYRVlmh7yU52PcfYeeJWelOw2Ox+GDPgbYI569yPT8cWF3ncAN87rTyU+zSwZayLCNES
UMHHK+edu7FKwkMDJrLsppjQEwkp4yAOYGCf0TymhWQiRiJoYGV30RJFhhvh2G8DDnnn6DVL0wd1
D4JZAuk20wchgGcyh7hm7NLDhKEjsfTCJtwpnrKhRT447pmTEt4k++omTbIO8jflbHgRThJ+DidR
T3f689g6YwykAMbFhYxDY8iaJNB+VRY+EQwjxIHS5CXW/rWuDCP/peIyubVqOIk5SkARaJwd/Byl
XtgMmfifhbz5dm8qw0rbX5Cc4JGqPm2IMU2D1lAldAkD8TRdwru62xUWYqArAyHpI/560YWg10G0
WCwEyogA5DGIiTdqnqBgiE0adzXFkPrsgvOEmKh6POIfUq12Z6eW8wIYk4QH1TLDlvnbNwllyybJ
CoQe5AqgW1IYvEiaLU5HQ9v60ZgfvIu33LURvHL1xL3ws0Q/IFNMp4zqexXTB4lwYsWnlXEEyQCN
jxH7sehzZ9vDRIi609V0eEKUqwklYmInpiAn4KYk3tXEA+TCSvkCGooe8HkqMZSgF39dyfKFf/dk
pAvW2xrUWx5V5IN+Q0sTd+R/cV8nAcPncmyKjTcxaDd9L25rZfkNBCTTFfDAZ3HXoNDnVLlds51w
5UxeCE95ylrXj7ee8swkHNnrxm0axmWq5x6bK8XmXzHcAUbgrGpNogIzZN2hgSbNUQtUpxt7W3++
xCoQhtLF/pNUkAQ1OgxKd7vIez8wJQwuNnt1HK4UiQFsmNRdWWNDhh8Cmo+pnbIKhS1h92esQW5L
BUEIm26+Z/QX0DAtu/sdpMRK1yQzy6sjGXBK7FD/iknO1Ml3r+Zn2u292V7BnHO+xz6++G0TuLXe
y89lFQ44/puzka/PMJwGUM3CSVzaMfARqkV36rxJOt5WXwtyTI8+1hukF8CS8FmrvYcZQq7yp1RJ
kErFzBVwGlviMBHeMl3p7sc9QAQlY9TX1IPIVkgCRcmebCjGpKiFd6j9Bm1yHOOq3ucGxQ3nyNxl
io0LHNCxHHx3KXeyeuarlbJ0zaIOdsqlpFvrHgv/KqhSb+hwK6Mmq4j9x9v2XTYpYSWNL9qdbdcX
xl5TsHddWzCfOwmN6gBLjUQG4OUEe3Y693qbIRA1YUR1h8Go3N6EdA4b/an1cc3a125Bmx4RgMy9
pYftcRULMr569/eQuVaqnkUilgHdcVGFsCra9HUVf6LAYxrKzS2MXHDQI598yi2XeYNqpULw9BUk
zcr117XQIDv7WSlbvWVbzyeHspSA+3SUuFe8q9WTuUqhi6SFMaJ95ti7qd/HdSPNB2++bjf69OxH
6d6/Qptz63tnLgGJaq+XSzCihULjg/xUJiA8MZbAkjFGd1tezP0aax/KB7YI/EHDOOiimNSqLmqE
mYo/w1YQFcHHYjU0VOI9wAuOrBSCkxc5JiY6zutjx9sZN+KwtIHCBor+uJgglaxwkmWowuSTPKfJ
v23Vv/wf+mqtvxa1e0n7bmEWE/TOGJSSh7sV7jwlMClWoq6CFjvboy0iKQ0Z0IVE3TLEF1bCMTd8
OUGt4MizXHoRVtv2m+0yaghhmEbeY/VGTJcBDXKzXqHKf11r+5yq7t/BmxEOPqOg9Gpa0K+Xbyeg
95WMR0ZMnCNIc4+g9sb+tzWXIRXmZrT2VfqGitSdvm990oMdzCrbzEA9W8zasMhWPiFiyoE+FtGE
20UYPkDcyGJQ5ergG4f4YSAUabQ+9ScKMj8yyIrauDgRYWVwRfbOKMyU1UbmhevIsUDt5ux3POhy
IikgwSYBqUD4zTZOoXv/ssnOiBjLNkoNb/znDkiBxhvYYI7PKOcMUAj4aMN6I4KUU8OlOCzJT45q
0F+7QwiDaqjrqp4FFfRAWq4T9lb+FUChZD2LHGy6KFhY6E1pf0P9KaXdaF1+Sph4SJbjG8KCtEVa
OS2XgoE/zKV9LO1oMYMzdmpReQeIa7ZJGYHc75ziN9n5HvFuLPw17NgDPINw6pGMEsR3teaIOtb4
cXiKpjKOOnYiNiAvO5Kqx2g/lEXtlwCnr7VS7C+rxhES6M9/JGXRhAa+z3vh8AC+lEhE1razakpt
3J3sUXspU3BWjSza1zN01+sF1kY6lXjuEMrcw5Mg0zeEtT3bmlwV9vSb97QmZEtym3/9pOZVtX6H
xh4JgMwaS8i1rtM3fd7dl6zVvImv9SdqcJi4zld3gJ3iURRxrsABNFHH2DfUhf6n96+QcQi0RNDP
hq3HInad4bn/OOxxSpnepREKXlOF2EYTkcceItqGEPAZDGTxVSSuVVK8uo82HQqPOiOsd+HhZ8M+
aRqY2mcnv2Z5WGWcLgTReNSU6JB0rcJ/CP1iUxxBI/jGbZMCxn46oGzjJzg35wAO59/RCng58MyD
ShvGrMpOeDkBAWxZp8/r3B8q9IPLqtwNGWk15RL1/xaqcTJzTOhss5Tg4MJsQ2PfTlKcLIvq98IO
lQcYeBulcQgIy+UZBoaVQkMPQOoWn/f9z7v/WmtgVxfmYegELLNpkSGUZSIi4rIeNmZvkw971TBl
UDtNBx7BcEbB48iU9G+DVHFQSmFvklcIbaXfjUxoimHmZNxSPneRDY0zGDtPQuiF8xqqINUkEYS9
a7M0fEkjaZe8wks2pJj5w5sOXoq4GKvE0C6R/q3ttZqyLlCpFe5NPyTGYhO6ZgDTg1I76Da+YnZI
zmsescvU9TwhFGSs2N6UIHqWVShHB12vDm4xZpSzB1aM/yBx8w73EpCdcx0io6TNkuX17/fqzeIM
G3zz65jkJeRuNE+BdopfOjZ09g6TND8gDc36Cgdxwj3M+Q9A3macTRJ6NwBDPLovvO2a42aWmyv1
CzopMPoo2gJiyfDwFTjAmLvubARAGn4S+6bFxU0OWmxdZeTkpb6cyz3FpYN7LUp5QlJzwX73cmDM
yaF+tBjFfhV0RrDJS1srkRknNl9/gHz4RH3xwDD8flbmQ0eDxAOXmE0EtlB84n8eczJs7W438XG2
SRsQVg7It6+pfEI6RFaxyYIAzVvgBhBlmjPgze0YcYNqx4/FZBR2ndJir1lCsm9/Rh3QhqIUcKKh
5WR96rjN+xheimCmSLWGEaJWDkIRHz6XthZk/Uzk2C3k1YOmuzLGBX3cf1s0+LBBk8r5vZEfhwy3
t2t3Q8wehOKempyXeeBfZtaUtPc2jeTH5sOmZh0NIPBuNfBPvRAFQQMiTLGdASbMakI96bFFz7mN
1S3oXbATMhOnkYG70r0vHJRz++GGyOfwpIo88krRAsCm/XXQ5Q75+a8ES7s03ou6oAVNQLrNO7v/
0N2L+MS/ZqKHRK0mmDhZxccMddB3hkrhH5kFGzz4CApa4aJjkasYMD29aw2LWclYxFlTNk+VXs+L
b5GZ53XKU1U0NSHuJMur2oev/KYn++klCqcrifHWoLVyMfraE808BfEcqFDRBvB1lZfNf7kJVPrp
t7j95eTyoNo0SaUmJSCf6np+t5nmRYT8ZuJ23aUpeFfUtxwCezyUN1hsl2t+FMKbdT/G56KPAfdX
QyqHHGncOop41Rx5Szdigi1oC4We0Ld9fDvKXcxy6Af+rNWcZ/cfE9mt41XSv/hlEpoxbYI8D3yQ
+IgqnioVJ7vsa8JNNL9sMi0gLOY/MXNTmOVrMSiU6aAm+fY2RW2PJDBCkxMZA+uweGxSVSe00dCW
3+l4BAUl4mCNNF9XtoQwXAiBmt9zHdt3t6WlHKLuco3bwSAJ83nzKudCtlDyPFGw1dVDQMZWdkOg
GmvXGX8LbVwgwjBqSboa3y6p3+rDzW3NXrQ3EW1N/0buWhj8aoqBGGm+S9G0UnuPCsjyhLW80PgF
0P2MHULmgriUBJdI/pPjgYwE9cJKdyV5ICtQXzm40aY2hr9fU7p2sj/nvQipMVTXa/SKsF4HHuN2
9VXPE4/zorOoADguHuvoLrwMfa9ODMXUnLEHnM8a9VKz8f6J2nTOh6f3AEDg3UHRMsXGttHMRfEe
Q1tjnbqU3h2LExdav8ZWRGU5LPy9fvIgYGAPBo913mX9tPkUoLF7UNJ8mNrElKwsoCtGY+214ciY
n79n6IW5phI2wPV9NBboLgfvrooYjZB1coLtyKtJrGmjS0499mDOH0VZwpiibSiPUxW0boNgP+9R
LOIxLebGCGW+zuE4pBLlQzDy0R3Rw39bOjcRDDm/HtCK2w9ith3WPn86NlnVvSinsrZaNzflC7Zu
YFXK75qaIXzrfsGGas9/6O2VaoJhHbohDTFmtEUcEIqy5ZpNx4nQuquc5Ov348VsElWgcbV0rnAR
vsW7285I/Y07S1qlK2+ujlyOnGLzaVeRlzKxRWk8XVLkNyQJDxAQqHYwUj1W8ndmBqblb7fwQU41
/hr5UfztBwD9TPP7bZ3Gv7ZtPDdA26MKF40OhK2b6z5krbyHYhMITlKlPDU6kczYy+jiEoZDUd6I
2NqAOUs747MIaJa3/ROPFeipu+omESQe7k9MOCBeW2OIW6hYjrouGEB5+6c3n9z8oVdYmQFhUMIh
cLnbFcQ1XdrAdLXsuvQwET7FJqKGtL7o8BAc4uLP0mPlxAXf2Cl0u5EzDI549mwSw//VozAqMxG5
sTrU2T+E3dQ3Hligmvq3heGjJf0Didex9bsmc1G7g9bJobg2HpxPf5cD3hJUM3xFDROcvUYZNO+e
xuxSMLqdi3HX5gezt8QNumqCsbBWZXRBjmbnyH7XgGO7EZoekVfPX2CxooyCovXzPFnHRTLJWP7U
RFFTsaO+crHuyXZI0mdbcXYvpd2DzIFlWQVjFk11RWQQyRqT+svL/QmoFDkxAYkQp14WuJNsuQCT
g5ub/8e7PQ/OzE81f970DMznD+hjbUp81KTO8KRNU8Sd79ul996/PWkYj9FFOnTGEX80pIdo2Xvg
SDLPx09iiNzojjshEy2R5L6Y7c+DRX6MdzpxT5ADqZwANWFJRRkqFNQGZcqLsJH1wTpK79oSuGLV
v2zHZel3s7KaQHGh/pn+TFYn3IWrUYKNPTSKEgajAT7nM8R4k2FXYfQj8kfL1yVAyNeDKwgVQuhk
dopYHfYEh6//6dCndAjW/we+yCOuA9yE0pfO4vDun2djQ24P4Z5tz7A0QLA9g/g+/4mkQ+7g+3YQ
Ayvf60HdAOSJS/HiEpKUhU1prZvniob6PDZy5onZrSckoAny6sN5J7XG/Ps3eK/4RP0KqmW4kF/f
W/rswKRikjxaqXT7wkJEC9BUdcQFwQxa4AUXQnAn0EgY7WEUyMCOxwBr6mIs68xTCVlkDwPTCZDh
86VZ+sEG9MSe2EzmdpyNVkq2is5nVGcxId+U9PobefgzN3hM36Nldvz/lqlKMz4A483xLGSgW3RD
h+kCeV+W1bOSVHiKgkBhTnuAUyLvAE9wEaTUrN5zR31g8ReOHM7vYelevMUgipSBXS5uAyqEHRwT
gxCYaXuzfjQnH0LLsTvlowFBer/kWcOId7G0Dmgd7WaKozqWQGOD1OWvEewujCmyGFpCc2FjJzTV
Zptgzho3Q+YD8/4jyZY+0gIuE5S6l6YSit52rnOEjKJ2Wu7mmSy5wqRQ8jkhsAUiD6yChYXNP4Ga
gKeqtGa/dXclx1zIp8UQZgfD4U3mOu7k41yy8XZ0yXgrKIy9oX+6r7OeIpcQ+D/8E3qj4rBSY+Yd
sXha/VLx06Rskl7o5NARPrY/OtDiexSi4wHABlIpMqpBOPYljbwD96FYx1u9tGNP9nUIe+QzgG3O
p8FMXevuKQAkAOsFhiZPjJ68/alRVMHKYk86sOvN/Hoe3tKlprEnAUK1JA7O/CDJmlT0StgsNtGp
F10gZ1Jb+CIFKCrnUmbwSxZhBVu7Z1uaT4qdT+PKPMbGrVYBWjZSdvD+jWIExLlcMEx7GMBibQBf
WkAMIvXcp0JYV1d18vq/9cmf1nWxvCg8auuyZp0TKMoyglg3ucnCkomsDDCQ9L0MoPYjV+57Bm4a
I6AfummwCt/oKI4rthF4I6Y/MokL/lnzy4piB+yau5l8jzg4pz047HBlsK/MclkfTIraxsepsFG8
v7sH/a5T8bmrr887nO28AK8nN9EemERCQb3rPCZJezSoYUEAhpjGp4RYIv1uYAThOfGSgrQqSiGJ
zjd/7ednJkGMH0LNtDof78KwKXLsq9Y6MbOSNhMyGOuOKV+6rKuZ4c/OfgZeZWgU1H3+xHAlBQPt
Q8xErGigB1NHnAmKs0GuVsdnIp4guj0FhMbg7Le9+iC9CC+Aka5s+rxiwwwkUIHS50ngxDnS+WUl
9RRJ+07UvbGWzXQ6objOs8f6mAEG0aL0/DCabMkI1qSKcYGBZqT/WSy1AewGe6eSKIuRD0notkgy
NTGHl/Zjc77p30J7nOsN8VWQVNHIoHYG65Wrty4SPsiBt9rpP6UBNhDWTJ6X6B/T1VL0EyPhBiGK
/bXzHF2es+iqJfvdMLP5dzCQ+1F+rYQsmKe9ilxsW8Alie3PlQFHPsDSOb5jXYePSIQ+5nkRxksC
kNmPRqutB/nWaStAJVFLHV85Gz4/bzRI4CMlLLb7WH0/O0Mhs7YFZ7NsoNJKHWRWlaFrQtNsASYZ
+O58cWVLas1Bn3sniIbXlPb/dnKb0NlIpJwBlLohgI+ecjUb9vQ8/YejbZ9CPqW0bxOrdtZZZFyp
v5vFS35LSD/44wAx//ie/EFK456JEl4G01z8as+IIZYNRB9x3BZMG1HDtJIbZzd5qhkhTKG+asO5
sbh/g0Qz2/yVnMROvz1eqV0puh7byUjU/6V6BXNdBcfQPNRGbmUFejaw4IO5lSq4aJzLxMzLIt9g
XzPUoUYq+bma3kAytKcF/dbyGuLYwWZuz1Wlpm+3uctZbwPU60Ytt4vTr160cK0Sbqj4u3wNQQXR
ynwGC0nCLzBZOnRYquE6RK99tiL2UDtzcwaryDZv6Wvd5UDzm64uCY5offalqPZGBpfJH+rlhJD9
mhvnlp0qr6S82nWyhLLcu3pR3oljQhFOQEfgr2i5rkO2C/vn1+mvUVouwero/MlLE7A57G93mSqE
Q8HeArhgsv0j+4IN45cAWPt4TBejqdAC7pYSqa7BnIzI2BIJGz+vu/0SoaFhonM3dgEtBpXojl4H
W2d26xxYuPALbjcycsm4NPT6S9C39ewTGfR7yQKVIs601iA6ehRJlJ6ObPjFoOj9uO1Sz1BxMNrr
afSrRit9MPRNyVameeYrmBZ112I72mGdi8iaaPjPT8hDP0ZZtl5G1ESFCOYegatJxw0bPwLRoUGt
I/VcyQ+C7egaAIhQ+xv5DGK2SVbBkVvrCd5CpqB7tTPrY3v5q1LVhJAwVeO99U5IoBvydDbma9GB
REi8koDArUIyy9CUFLl06EFcO7Kuqwqw27rn2BUYpfRDZH/QPmdd7iz5Wt81W31CT3z0g2pdpvW8
rnCb7vwRXjuPsrIQLPTTPLasTF27aOtdtNJDYej8cZqVuX7FrhWUfMNq+McHuTxAbRIBtMs6FhEE
dQMRf0h020JaO35RgEDUtBZDG4+z2N8Cqql4oYXULPrP5NRgl1bKk2HhDRJFcyI6IFT7+bc/0kPP
9JBQfGsZXnq+lqNPLcMyyzL7ftb9T5oJmybszHmYl/E8TBvldB+D4lw/sjdFTviJg9PveL/houQc
PqZhIvsK28E/ykHZb71qgFbtGDQErIwEEjOtLoGQPQci32edxH1u292Nv2PJDsai/2lH4LEO1FC+
4Aq3zC1vw/EPd0XI8P+Ic6jG5j9AdG7ZMdoO5N8J3DL464nQUg2dYrDKrH7iNkrqkLf3BxPSAsf3
wKKVrlLkqwZsub1gpzDsjd/N26a6aOee3SrPF61jm64ukPQcoN+LCAQIgITtewvHrdomY49l5WbB
HHdgb9ZixuxK1vzOlhgwTXVZupFt6KwS+S1IHZ06FdGrMuSkm7oeEu6x63PIJGCWUoVoFpzBCec5
i+qL/OzsTqnATDztC0gXHqitEc6pKwWgPsHxA4llfLUCBlnOZsnoQmKayAfizuK317+ORLICwlVj
bZahd4OA4k1GZH/GDQrpe71k6T0nERDtW4oXYcfqXYlyTwUrRfAlf8od1rrA8VND9YH/UghiS8oq
E8kJzQsOnwGVEAjZp8ey4hS0wP+wroPtoa/xSHonPUg4OOViDVFzecKfv0w8FLZWlXgObpwBy1vI
iRkPV8V06diTDUmnRsK2u4HXfYJo2XelEdwM7+OQZzMw7NzSD1aN0/gGm7XMi16F2IgE5ZW2DqVr
yT9afYndR+igMmhP5dphOKDzqZwWz6al4a57zT3FYIaeNV5IfbcV38HFsvWsuZ+c9yP1LB2FyEHO
+KlUK4qY1RfLqr3iArnObBg29DOzMoAaw29BFdhO0mnpZsKCeFoS3gqNTGt8L83yY0fM9coMTR1E
dpjW2T3Ed2bscfx+l48oOWluC2TGyC7Jc3UWprWF68DJsiHEv6mjvS66/awtUnLcnBKMOXs9aaIj
d/VYD437D+Z/4N+OtU3BYx2bA5E8WENGXyeSkNHoDLs4+5bDkhwdkwvIWvtbyYqoRErJcKJY1WS2
26+cdGkOfSgWe8ZXlQkl4uDH7PZNpY68ECTK7NIIA3INKY1UTcMx95+syZ/gS+AG89IhSeRZX3GP
ABBoto+EqMol6JPH0ez8hZyhXsHNnLEzrUcf+UsiLLrOaqaJkDrlQVfV1gTHCAiTulEmxrNuKeDG
+3BnWCDhern91kY+zX5mZW/uaEXhzh8mUkZ1+2djrmj2Jdf7htKA8mPgtS072+Tn2oOV3rdsUuuk
M7c2CLqS1CkhvW3kJEDbyvc2tnnkKEr/h2bR28AM3axZmUb2g6xhguaRItTEzdkl5YpJ5dvo8Zcz
4/mnY0r0k9WtCPT0pwY0VU5eEINaGFZj86yBeQ98GzBpDfOpSmx1MOFV8pZzY4ywSiPZ79nChXoM
InMLfErm7YlwZRlpuyiXK6dbW6o5FaXhh24jXz9B1K2Kynvc0R3Y+JBn9OCzb88lxjYE3mP6Aktg
nPiZ9lDdcd+ra7+UbBfNzpQxceYj35is+BtPWgAhB94mSrzWAXd84EFuSdV5e1DCE0yt/kLntpzT
QEZ4XE55WsRkTsWfaNrjzGPvZf7q95JF68oHmw+IAPM5MVcpDzLH+Dy0NEwG9CkvYCPtbq0Lfxm/
kVGhktVRdre/p/+Qj3zPlYt54vBtkK7o9oEy3bJB3nTuekdUJ8PpfiDDTvo/fUIETHD/CU8NXAfB
16yFSaV8NwF1cK7Y7dR0TGBh8fCLdBGh5nCW6uqMY0vL5GDX0vfQBEwgEr0r38KM2Pz9OsGQUZpr
9nG6BGKI+YNLpCYjbIvboa4W+KhvNQusLAvjnZz26xH22um6Liyhnuho2MBtALS3ouikNhdUIjmK
vxRb1UY0Ru4P/pj66cJJ1HvDiMdZehfuw7Q9DnHGYSpvcfVJa/JbcjhKLqMIgR7X99PlzpQVeOCD
AXLskUHG+ZYAxr06o2PwruYl9Y4uFA4YgZEoWqi3l7KQZLF+f70KaYmWnDnTnSUvFTLbY98zqt7v
/PCkkmzjlPK4b1wphuzam63oNrsTE41Q/H6KyDZ42B5idPjh9Sn7CK9m0ZnZHqAWah70ZdgkwSJY
4bppQ1QP+PewKl/9ZfRpcHDMVBJKjzJ8tmkK3EpL8XyWP/wLtNjiMb7ZPTYCeuNYWJidhFrejFhV
z/AHeORRNxFzdBp/CUyNo+//c8W8q6HN+xfdSEv5JcFSlLY4F7haSWbQtN4sUluGuPhbkM5tsgJ8
WMOGrnhLW4IgW3S8A9ekuhGkwkSBIvfxEArVHgw7kdI4NpgRq50gPNxa1EfxJEtid/5faEMCFbnf
m2fc2YjrNSTckYffvWt+wo2XB1anLhJ63hSMSmdQbTHrHmNEAo4HOrv5qQt4fQXdMj0ZtqQmEJNW
FfXpHvPAyj3MH/2eFtDTydAJ4MDJRL8cSgBoIioLuV5gcA66lZL7S/UR2uw5xzz4CllqVufgTI8C
vI3bnLb5MaGLwQu5RCGiehpmzJJY5xXo2q7MTfftL094ASf/yjGyd/aO8Ocu3jmnCnBCpy9mSeDD
fc44Ty+IYp0XHc8JnDH6CzVmMMEb/cmZkuSJFsCYLqAuK5Dzwy+qazlNcO5n6hhhcoS6QdIhmOe6
m9pAL29dgvahASPpE32ZEsuJOBhUJIUbHSb2ykOpOtZ4GxauodTqohIrQVQXT7acNQYyakG8RhIo
voZ7ODYBl6gyhgO0rG7Ky7uQTk96JeweprMgi4GOvyZBSkeQMitBkmAor6/KCuQhULgWGbfO7xUg
li9PpNkboWGViFP/DWJsEGzeicyhM0Mdn9u39LtVmusbjogwxgGS/hwOeyDToneSBX2H2OK1jmlg
KrM81BMeeF+2YCxfOhZIcsLI+PcG97fLA5VVeyFSPG9V+JJOXyumwypOVk9ApGX4Mj3NfRL/QKHQ
dJnRG1yqllOcj8pkHOA3s9b5lZ/FZQV8JS3/67qxRvwB1IgqY58z4ibzEwEklMrh6TxlBSP1v5tg
YXPr1EmCde5Y0WXexPD0oVX9bAqd92cWDqfHtZCKi/DSTTZ3KpjMJhqy/anB6+koKWfj/4ks3bhH
xdyPjwbOIYSRB+BGul49eNMZZwUtkKz0N3OKwm3rqOhlCXm+AHnBplMCPjgK6dkZj2ZRvZnRis8E
VvxojXRPQyb8DbWTRL/prbLzkSwEUj6H20ZJM+AwAQ5pQ0vqZzuCRMze8T0+6i2eVl6HwU2CDC6w
51WOgKHjE9guHUqhvAdj5oFUn1R7RS+OPYPPLSV5INDtkny+i6j7MoQCBB22h9993VOdBVMqaDLI
iBblVqHg4mmJg9oc2aG96F1Pj1McHblX34N4Ia3Q08nzK3p0PZ+IXaWbPbynOBA6FuuzHLmpuDyD
C6MJLSqX3MKP4WiZm2B/L8d9G6Fkuq6CM9rH6zntpfD1vtBqL4pvPItZRr2kFm0jujeQAEnjqy4C
7QGR2RYN0WAZgmrxxPCOlcBJ64I+u9/5eoFVWN5X3U19wvv8c8SZU6YWugoluUKA/ADRsDcN4t+8
xZjyAOxVR5BQJJMrkl1Jm+10Y2ZAJMnLaVyZ4asJ31jxeWD/n31TxUnM52Rtp5sN+3ETW5kZL8RY
UpqIEhrvPMGj2scSghvl2s1n7B+amt/QOJ5sLwyCF0SNMauokKFUHEBh1iO1fi88Xf64wTOeJ7tl
T5G66pcU7UbqofrpZr0Ea2PuLr6RUN+CteWH4qcsgBDEV7zABDS75r7s0aV155pG1B3IbJBzG2VA
8EwfnqjfB/cx5G+QqtNqIdmxIhA9Svi5XoYOgC4NB8KmmzG9DeuwJ6egcMOcFoUBgM6AQ3xVWvsK
TnOKYDP9jBw1WjoxfDDHWQHyfH8QKVkk8FIxzMCalOURiOAcIyZEt1P0mWJdVDHw1k4y62Cm/uTv
1qMIzCKI464jHJl4UtI1rvNSECooget77prwEeRUvm17q+N71SxC9L9wFjD+ulU6vWUwGDEwfKbx
nXoMJhqQP7iDK0C8JYx1QOn2fZ0fbGQNM1tJPc4Q7Vyv2DDd9TfSgsKQyvgaV1WxKHqv+mW4YFHW
Te4AwvK7x+rnMnkWJKx7dQS78oVcoiD+y/Fc7pG2Qk8hyVtecz1lA21wycWu7sEQXrk7BJUhKmm0
uB/SvXZPPPUQrniyBOQxIcl6hrHQLvfw/ofvzW7JNUJlpzc8EJoh6JdO0REsPIn3HVfgAzCIdQD+
Gb7J1sKKGg8VUVO3TV4Ej+il0kl8YgCzZgNNujHCD66nAEVq4igj/n93xcRzjS+FtjH4plOAfUyg
lI7bqSW6Dx+7DS3tHGg7Co0VcANYG43uQIKqh0YTMQa2XD2Jj8tcDBl8BGw67q3HHH2thLXUveMb
SFmqvUqBLTagEYmXXX0RsIwUDY3bWR9XAuQntW9s3RlFpbiQjyErq3IgMprAvVH5g8kfqU5oaPix
kZH2MaAdeRCZMMO2Rcsbs6oOYZi9aFYDEI4Z4mGAElNhNBqCl6QbBUO0qXWK1rJ/GLGQO9pXgxt2
By1/EwKY9yH5rsTz0Bh7pjGIgQ5YI1Wk4G3yR67YgieptexQ8Y+iQ/ZMsRhgfS/Iq/2tSCG+VakK
LCgDEr3AfpMD6PDWDjUzmvSgy5aj9IqnDHQBzyDy+IuatVu/31P0p076SWInPxN4ODqgfm6VGJgx
W6n+UDwE3T0CjoGOqk+2Qxn2QJE7LEbefhyq1a777cxxuTxZ+0PspBYJ00O4nAUc61drIYTK5Z/6
5ebEWjQupll3IK2PtkHBG7WqKLaMtzJUKLmyb+j5e8C87H+OV5PLNM3Q1DB7J3pCMdFqSmL7pwJW
LknPEoq4lNRGjHv89VW7sA2aHSNsl9gMRIFOpmOlNdJpZh+MndDGOUEITEID4BILoYhZQ1Q4e1JK
5yyyXuzNu9JaRpcgDa3p3teb5UvEju4m0/cpEeIMFjx3uckz48OO0QkDjTJsPfbBtdIm7ZQEWl7p
SkCESgL2m8G3aYS5Bpmsv4aiGtF98dADpLkKfgcfobe2+r90DB0TEk/EB0sWGUjthcHZjP/IllsZ
ahMyxhTNAGMxnoJdIE3YVDjb6/GktrKMtveDv3lTPNy3+sdJRSbfza3AiKWME54XRjSin6cmAylY
h2P7+RVqXW0hYP9eMrVwZLzZN6bJHK8KwE4J5l23ZzCmdM0rmzlBgIZENXCyoIrIm5qVCAL0XAN9
dspd69AqpHyyViXgj+/T/0KWI84DjKJl190zJ1Z5p+rAt26I0kKJIGLadhNKquBGop+GX8WqPTBV
qS7SPiYw0OS1+u2mGFNhtfX5woLTcLWrcCkgORT8Vizr1pxKslNeogd4V/2RqIaF9eZWJd6UBQoi
uF1Kr/iVN6WJPseCm6jU0TjthFBLYIbLIRYiSBYj3KCehztT//zOLKj+Fxj+TQtxQEiXnaNzA+RD
nUHVovbod3Jhqb8nZXGIWrpU52MsxK/a27Hy7XCFZj72Z6B4gn1HySn226T5tWl1Ka2LgryDd08i
2dUe3Nw9LRaHxTwytQB7dZo1GMFoZ0qlLk2VSpxOX1znBrgObeJta3ciSkVIvwuj1SE57JAmvhrB
W+2/j/gMFDJBq6hhj2v+u/EulUNCCkN39G2fH3fkFw0+EXNkNXxxoS3O2f00REfk9fg75VmbWgvO
/vhUCc6CjC3OyNk5CvG1AtFlSOhOZ6er0+4DJ86JS0sJe/DVBOo1Eef97CuqCcXxnjNeAs2ovC4E
IwU+Q7GNtTZ+bt5QVK3pPMu+O/uWiC8laksZ/hE6aVA1jC9NTUFO3SB6GXUC86lr16CmNQxWXcaq
exxQDQ3X715kaT2MWBOTiLNGUXvFiIQoXh58XVfjFdSpRpY02SLc9RUF8xeptUlP5+kikFoyyNhl
EiPmntm2gh94wMEg/LspSL4V9lshC/dPhFqSvbKdr/TtoG8HRL59VcAPNF3g5k2LPUGJzcibtfih
GWPSToPhaXMHECjQI2iiv/sxjeCHaz1jYmO0K6drGVIXX4rVV9l54f6lCnai8+OTVuMQl6qQcy85
gkKRT6PKILxTRvKTqajggrG2Y6ypEJ2p0hIKDz17Xh9/4VWBmuT2UOh9l0pJcCi/BEmdGjpds6Fx
spEomQeSlLv3TODfXT8Rt0HF2Gcv6ntNIa9QMM40N3zzr8gjUQMYAt/6u3hu2cGpQvZSD1Yuq/2Y
cX68yBGi9UT/bXKqcqfXDKysTfAwH0Pd5QqYevcowqfjP4tQTVpE7ZIG5iy0hmku45JLm1rFS4WS
xs0CnQUDAXn/zoNYPD6NujIJ2uqlSb8dL32PDJcB4lJxVsLchDg9peoltdPuO3U3wdLT4GEy3/lO
aR290sZ3UO5rBaSiJCDpd7DDXpq4j+4z2DPxnwjN+8nfgYxik+YsMt4eMeMVdVxCkWVS3lbKBCc4
QK1g7ZSRypiePWqtDU4Q//A5rEWKcnHdo4mmijbg/I69DZGjE3I3fzbdE8ULA3hzM6xvKCspperP
102n6V7rkWv2SG2ODjcEckW+uSn+EK7tOu3+9owctg2zHSui7bVNFqJri9qSslLhpj6H53/xSuBu
gue640v4FOoHKvybOX/e5wwadfPmfFB1qWe57VTVkkGHBBDiqtIwqlQVOVvUPGVsKZsut2C6RPDb
YHdx0EPFphe9WpSOXnZ8rBA/LV2DU143w4q1rSgamfBGtyMn8V/Fyx6bf35kQGWelyn9E1ovjhy8
ptXxmXXeK5Q/Ht9rznvfPJHJbro/xGIubfUMRZPwRCX1+PM+Y3huyFXEVbaYvTH7ABlEHmvA6XGW
u4tGhW02bO2urIsPyehXFw/atcNKUS+bFjj2ljgDuqeruwXKTj6TMgWHq06Mprlhksm7/Ig2ut52
GRtEEbkJBVoVYUrhR7sFZX0Pwha9WCQ2xBoiBfsfOjwPiyJcAhtcUs5vgBg0wUIrm+P7sMQQOYiV
4yDWGQvoqjCGEQBhEojZI21/OBsQssohLVkDLsZHFGiAOacGpFJbUP4fpYLlG3xLF6f+O3oPkqfL
+NooU3m5f/razKXN9JFUFGsvBp4js66VfdnRgFikNdOZzBXSovbfNRVKjiqiku/XU4yvBJUoWoxU
4tQZj40vw2aH6b9UR7NThkLnWe/FWVw5PC0CalixZmk2I2el3vupWq62BddTYgXaYPRvA+nxiopt
moo/sxNG5isQDdV+prf/ESop+AKCbVJrojwrLv43KTIQB2piert4ppe4yfVfJURkysY4zInY5bBM
99W/YV1bg/iijykQYK7jtvDAWE8EQTJe/F7eaPmHdBscF4pCTOCfpq0sq3SJM/V+sYUKhLiq6GA+
b69U3w4/+IuU6nR5lXZBeYDLihVNN7ukL6QXjsZ7PqsHXnRPeqc9GAO50dfMdPNdEVfDjvfGhz+8
tyAqjGdVFKExEK0v9Wt7yHe0MGAWWb8mXZgmxbO/6VXURU11sAi8eK/qZejfZsh8buXykrpnu9IR
6We3i9mPeyFpnp94/YFNMe3mwFmAEulAA5psqtEXKcVUxjjY0GUtLEvpd/g51GXtOixFe9mvEw9D
sKaft1C0BWzSTukDUqgpCF/4FDi/CCEZ7ymeRRrRP8bsdft//4uXFhDMTWUo9Ka9fA4A92wyUeTh
zQCpxX+fpo3L1AZIhPzt77nNhYIPIAFyYIEjaAywakMPC6T2kue2sQa547QotUXhghNGMVTmBTj5
sdPi0Ll1iXUEkEwAhSUayKUusTj5XOzYzuGrFXvIo9leqaFUnMBizQtJ4hmup6k7JkiEH7Vt3U3b
YJEu8wXpyxKdmNGxOLpSQaGc6Ics7tP43KeOAEBWx0NbfDyrSy9ox1vZAQzEERCYenYvaCHzgyqh
DZl8J43cxLu15ku5fvLgCFkKHCdL1LqGSfr85boU8u+iUm5AvEv0kiRk3DILHC6oL9j7wsHWYDtP
qHIAQQFhVIwbz9WUV0vl8ToWkbhiFrA9GSgBX3I9g9qGACccs0FShW9p6t+s1RfDSeZvy1lSFvlW
FMooLcQHk+h2eOOsepoSIWs2hYomJv/Y9qs6wFCyqDtQyiBK2qNGD7timsMwGXaZLtFBhpuQDYva
fTMFzpZCXna37rQXK3YR4uRreR3hnhkmA21AlM9mG0mAkEXALBQXAssKk9/K2c9jLW4GoX7hY/W7
46RAPQN+XJLVFZYeNieCLcMj3CmQ02oM/wdINnZHHgmvrFHTfLW3jgIRGY8NGRruZXp+s65PcdRD
ykyOHfjL3swpno9E2NGX5KDvFH7Uk4nVH/pOzlTaqN/Echdl/GLDjy+oCTVr1w2Kk6m3AXG7d5+k
jB/Nf9mlgCMD0rpYHcWLTvsGViUYo/Cl5CTMRc5PtohHNfboklrV80qMF3CIQ7X7MaiuCV0kgEd4
rG/y6HiZIIOzjHY7z7yml4XMr1DAmWdvZz2iL+5fkFnmAQe11aNAGPTPZ1DKxKFWF+EeduG+qiTh
gwlwJc5wJS6ztQJ5lJwa8U1WhA3PTUBxjTtsvHSF1mFhaanN/7qJHQBzC0KVm3NieOHIUj9Ec4y4
LRLAcbMw6F9IwFKPplB1hKv7JBG0iGRcfpilvLkw/bVVMoaT7KOtMLN8dsBsXvsGzTziwUNlzV7i
3TGspJn4F7u4ovVn5990MpT/YnLmBS4FJE4I0hGYqB8ouZPVyXxHexmEEaKSZINYNOjWIAXOc49f
uitKNnIkiNMj9v78F2TOdEPdwna3D9nqMh5cq4IKm3AOcrTqmIJKW9tNoStXSkywEHVtq1Sq+WOK
xgqmhhtJFv63LoRACxUaGHbvQWc+H3A5XQfcxGtjmyiIZq1j6V5SN9mn+ADJ/PIBpHaZCpwGEvcL
tl/hsLzP9jYPRuW0FlRN7l5p/lR6LgViniRhxmq5Dw+e4hWb3zljIh+nP95pKO8+g9uZA3CHajlc
eCgJHbZhG9RfjiC90Dk2FZ7nVYtjU5kic1+CVg+C7SLK+JrXEFXQWp5KIgWDgzk+syKUvbHTa2yD
Mumh0+eIFT/q3LNYL7vuripEWD3WJT5baJOIgSGNFERXXxtwXMk57+qETGSDPR9H3Ev20Ym8F1iF
/jp7gvL/xv+R/zEumd0cZVSkviUafBE6hHikfAM5NhrGHIBs85a3gvZPRhDqSq3/RzU7z0KZK+mB
TWZscZXUPGf9xRVsfvbx5YB7mc3PMBGseQe+5BBD8J7So7gD4IwjIzV/DbuZfI6CHBHfklNymudC
T+7Z31UIMYbhLsDC7JQZjivPCLqCZ53Hthfrn+XaX5OOnIj3zOSIJ9JHvguFBd9pLE3UtoDZG+VE
KZRTSViiIshC0vrsI73bqK+KMkeV/3V6vSxAcQVmdNa6+6evjRgFJCbNY8f3kSCn8I8vW2kQxXOR
kM/RMIVyCnSNggyDNM8eJlZfKlKR4q2lLRLHEWMi/MBpsnLpeHG6omWi8FCSBKf8IKnA9ihffkNG
Mqdttx6qIUDbt3JVhV7EQYg7hBVHriYYcvY/nZT+etKvuOuVOe54z2mE5jDjTHwCd3TlyojPqyYQ
7M/5SFBOAkpjALftACpRsrjBMHLrBXHW15a9kCnN3I0cRmlbF4EU02dUIQCbLZZCNeoGAB27x4Qi
Zghs3Pkt7Uqb3uO0TWhXL/z2PwYVdzzB0xZ5FxD+aSVRT3MdS890JioIDeVumtctMn/GkdzUwZZ6
rJPEV1QgDcUhH3wTbnRBu0ej83WbNAzi5FiYTtIQan7EJACvuAQ7dZGZ6qhy6DLaMGZ179y/tqiL
GRLFjxx/YRa0f9dT5pQn5qQv5s3ufap03ZUbVShHzxnndsJZpJJao3o+yXYWg5vPBb0u2nR6CZWA
lZgYjcBWvn/OY9DSTK6nr4XAXNS/8U1WcFxW16JpqyOucImSFO1CLoTi01HjZv9/W8zY1wzYArXt
+CSWBeOtq91jEwBxUq1yUCSoDWpspsoKhFaWz6wIc2Jy9pFQz0Tm3AKtn7OUPt8vHYa9B6VEakcx
ZgnOXrTRDN8N3inTx6gk8CSuEbm+RodEt69avpzBcGVtiJ5wcN8fRvgSiaDXY/wxjwmEt6jVHzL+
VpGPgEvwiZtG22hALhyv9+uC8+fjw2J9bpdfYl5Gytvkx19diKohPBtAsmOnU0dHM5Lv3d6n1It2
WOMakACVHIeEsOltEj7lynoE1xXq4YMTbEeoXr/xzC/lU1VU/mSQuqBOssTbI53aug251bqzgLkB
zPrTKgAxlQ3KH1tWdkFoCWry/k0QdhhIDtcoRuxw8QyyLAhgeBPLAbYp0nD2Yj6BrxnJo1Xnh7+B
bjdjh+b+kylydmNOe7R1Vfh7fNcyuT88oBQa8kjdF4f8KL9Gva8dItDDgcdrRmzTkHl74Ai7/dVD
7aWqzgmiVfco9HFGuuURBkJhlQHRjQ1dLyAyVw6/S1IuMVYjgCBydMD7o2knzuk1j0rMpjqKnuSE
Un1wZ5HADBn6TxPtqF79olXvgZsPXXWHSuNSLYjOyWOT8MCNVEwX8Wzqr41z+FwCQTO/qZqX4fBr
syJrPAQPToLEXRi4h6yJMuAgO4wPEj5iESPRwvXNNUhBcsLJsk+5S4kh85gKaeHNoBqdHBoENpUx
PWRJ+Q+DMZcYN05sgGHPXAzrduFqka6m1y36xKgCcIh+YyFeyN6+Q4Pgyv5JwbGXayju2oNtozvr
PuJUC0eeR69FoexhJVQcEtYU47gDFt30+1U4b97dtZzeIPEn4hHtMoFJVKPi3fRj9BRMGGjjIjgq
AdKa4f0IlI+3A1tDyLmYtyisU11EMDs28zlGauZqadvZOQynz1sMWQDhjf0r5hFNGnRnQ8gaQCOD
SBMVZT6m4cTOQTTNXDVsCD4Tf5xuhsNE396Z8NlUBnAcctB72/7QBJ31A/41ltWdaqs/ZWcp2ayD
LU5zlJ306X/IyF2jyNyqcUpMPtHrE1I/1lIK9f6YLD7Eizv+lqWMKY9yXoaMEZHQsK+w3yTd9e19
2jkf1YxWoTqFvmkoUQTSYvpUXN+EOUWzP9PgU/k0Sxn4fqs61qDiA0ulZ9fxZbrJV+7ZX63yim7A
mzvXhtOvjn14gKAlBgdOfQtqAu4YWiu4pFDzvUh20nbEDsFxuSrYQdgII00+a+bjGTbPfe0zLzA1
u6Krog+8yDv1gLPh1wMzLufX5RLKUs9tRT6/yKOOWQT/mAiDvq/7lHo4zudrRy6b+WwBmwm6gHe7
qdnvo5IVJyYU3brOfZblUYC5KHKNKopbXCq+joJgggOcGYT09lAecxFNNU3YKSsJbdnMh8atuDkB
QIu7+1ZAJobRCPPh4Hcop0GrnWMFLP3HSzAbda3E/Z7SNNfY8ipseQkcWVG/z9XWSs4wHZ2bpda2
eMOHIroV6RiwNiGrXbtnyLppoJHtlksxlOx5vdJBAKbLrcsHCtB9mQu5gufpAEUArcgNUm6zQPzw
Cu9bDBHOVU3/RH8nJOQoSdlRrnE3tngRIH7ooLIIQEMUZMUrOVdvo12KTth9it+Y6cPtwupneqv2
Ixd6iRMc/l9qQGq/3uMX9JsudFpFJbEOjgUKgBidNG+owV3Lcj3B87xKUDoZUgL4/QwjCDkJX0yo
yvh6Nsm9nOOU92L2Q8XN6Hu+rWYDh+K7LWT/aH7HNt1/IOH9qd5H38nBTkLKl7KM0Q+SDYFkbHm2
L49jyDGLoBmqHIg1cTbpoef6Kh/M7kPsIeShiMY+s4f878DLBtqWD1OA1cZP8dP+o7BUCvVw99bu
cYxCM1YXm+NR2MTZppgAK3IvGkHakDUF9KaC0jt57T2H1PYFTAbJ9zoK09UJdgckPFUCzVE0bKJ+
FsBSnX2iP/gjnuBN7jM0DFaYMIN0BDLWeCCOnyJ6pmcqE/s/hX8jZE/Esh+xIey5NqcFjGHRkPdJ
xvZKVFjBFQTgaR8hLaa0OS2qA7tpu65zun0CKHF1Pse0G0L5ZWVmMqewSi7BASCkUBYufIgJq9u6
FMfOG2grpQ9PF8j3kyB8jsnYWGX+gwGSKarbGdrsjT1sp71nZUs9Zd7FB+z+d1CODzDX+/9bVvJ+
x2weCZaC/l81NilK/qi7dvmtg9DQ9zvBw5FZTemf7n6p7El8wfdtGu39Akiu33jreJJR/AWsTuxe
l+Qv7qJLDSZVNIShc9sHH1C3gEqCGgi6yxip0gpkMXMwG1cRVaFx5Ulk2DD89y6pKD/089nhFWUr
zGUReXS+9SxND1urJxGUWc4ncfNuKhXzi01DF9Do7pi3hFSCIZ6nbb0rYg6yy2pVHoeS83f6pdwK
L0JLxatzdTd6BrjReUIs9dKQP9ZCP4l5+4JujTBxbt7NMbrU3r2OlrNXZ0P3NMdht9x5j1QTTp+X
SrjgkqlI7lpv/xzAGNVJKb+85sa2mRWQRe6BhwxAEVEzapvj4vjithVhPoGuG7iymTz2DHnsS6ii
ftKD/TIEOifiA2ANQw0/FgdcLZBp8DupGT0EoICg+RI84B/+Z3RHLCcaMU87Y8YECpb3jSMMZFQq
FTvfUHKRrEB41ziImiHi/7+lK9Kxg53QeKhmzIAWxxgzibf0tYdVOK9D0wzuqotESPSc3KO/7U8a
int/3UTrr3zFA53lkQ4X/WIqwI2qJBbs0pnELohbQn+AiFh/d0HT1lGR8CCdkHueol9StjyCkPDA
ZSdewdgyOn13E8MowMMRWRGnlmrJ0NUTI0TPfnqwz531+O9AP+J3e9IVNfeAoyb09ghA9nZd8q+B
DWi167qPht3ovpR7ttOpwzw9j7jF8yXIINrGCPWeQ4Vw5tM9wVVjeQQ2gbIZ1GdGhBomsjxJdnIS
93zF7LkR+naiV/VLo3fqhAlPozPTllkVgckL3bQce8RFgq3S8UFdbSs390B8AfE/sDMBBv0Lfthe
w+oUsMF3KtBjAR7UGtzsdi26nFdNVetv2YB+ZGE4msWEhPGDA5YJggP2sM3xLNzg1Z3SNhPTHEXa
4/hYzt3rwF7Yeiqv61cOG5fnpZqQ2gnF7DTJczD7H/40AFZtqAdLTxTs+UHaVBynQw2r6yOTAYHr
TJ6cZc3iE8mMYllglc88XTF72A2NhQeQgbKaWQoJILkv/WRwCBWg9Tn2zg6CfYfQvNM4qb4Y3PcG
+/hTHFqm4kILOdq076l7D2kXPxlETjn3+DWxl+jVqS5Qv+4C2EzHsKh2pobqt/qBpI90y0qxiOAZ
tRonH17esB9OK4gs9MKZUq4piCzf9Pxa1RT27eCJ1iFWdEakoZeTZgys/GBrmevtMgVA55rpL6BS
IM09Mqd0aIz9vQ3MWBHnFoXxAbfnVQdpSa2a9Rrg/hRhF4AAiQhai0004BREtd0kZNDOTeARiAu8
mYzeFedKoWUhsWjK1I8ys+APraD+Tu71HwwSERRjtOQGvzK69nBkGilyu6Sin2Ek/8R2NqV/7s5i
+OBZcY6ubkt3xNIeKYVTEdi517HB5T8bHsb57ZaBUuzdTBV125HAiLGvXaVRD1lHrWiAbVU1INSp
JXq2IYtI6k2y8fzShmDhkesaFy8mCJ5Tfv8yaxlddhTTjGiFtpVeoTb8DDgjbhfhXISo/XwJW7JC
MYjqdq1torAh3jOuO1oYjh5kusjAsiDYKLjS08cEQyehD7TM3jrPkjyYiYBz69XmTwDO7CnQLEkf
Ldp0L+5ewQvSdBUvelEfLKpTxPut38vSKqoUK014ALuifANAy5a/pImNhMkWOFs2IKQBa2FdOXxL
cxnqaNRzwELj5xG/6jzLh0hu2r+SJfOGKBFOLXw6GCvqdQhFLutVL6feihGhmY+U63p8rIun7eOY
sWRe52hgMbtQCP7jRINRmDQiscg7u2HB1ZtNrrFSs+eZDMrlZrvK86cDalm8Dr++m/B8R4BZeYSf
ymU9drcu+9C3GFxyGGruejsbppMPEeOyzRQ+RZaOqVHwJAevhM7/OxX9EZXDLIvrbYZjsCaliFAh
F0I8nNE63b3XWxnnVwMCbqJqoavOvDiDy5r7eq1MAUECqdpCSUyoYf8gPVn03ErJFixG/le8VYJt
HBEtZk8asFQDMSm7s8QlUiMnO9fFkFQV5YYn212KuKLJGDv7Wx0Vxty7r9rV8+dpUNHfIRmbYIy5
jhqxK5RnN2XkXkcMpWt/T25Q3Pv7sZH1/gentpMAHiQtxFu7RBlTHx65Bc7akFb9ItAVPIpUdu8W
Vq71D7qvS65oleCtnVbEJ2OcsIgZ4DoUMnHo5Td9idU3yvz065H/4ry1h3QaYeXwbpYmIdK+7DVu
SHyE4jVDqqYYU+b2XYXQJDYEDL5ZALWkD7hWMGWu1j7k3rlWmpdBiLM5ogF35k4+aMwAZJDgBFix
BzS/uLNgrtEY5b5jYQ/uEJi2dD2z/i1z1KE4l8RzTDx6G0C/HegY2gQDLPRmpzvRPhJd+fT3qdkl
YL+dd+Cw3SWtjL00tExb0flcDkfI+hk3vpS4wSw722dkS0zgK2TL4IfASeeaNzdLrYrcSCKfN9Kp
Yp+Gkw3eZI3vIZ2FsRkAdpd6L5cPRrenrtjrO9jHlSMS5RZy1CjNf58AxJ3ufkG8K5WAbq8bGLVp
MWSip3X0oYm0cx76xRokVc2ihMVKV0jfHJip0+NW+pVIwwnHD9zFN5nDZ6X1LT1C0HcxTmv6UiGI
zRd/xxcrXOx0I2qW7P4Uaey55tADzLaIM/hVrhfA/T0sYH+p8X23fQFaBcwzxAwTvtFW/Fae9BNy
6ULRYbSxIZOTY1eCul4RYcR7eVh6ZbLyqwuJIEBXTlTeC/zMXFt4VGvJGVGjFty5esME2RlGWYgo
thdXbtFblcN1cf9lj6yzUnLM+rxNdd5GPD143B0YCdJAfYrSUbX/G5+wwpl9MtRgL1YLX1Sw0AHh
RCsmsd1SvcbHSFstCj/TijixXdLYQ1mUu0eMqQoLo3Tht5XTb7yoXlE9gbKNGteN3q6umHCLGyVo
MUOS1MJE4ThHC20O9lryajrwRMtHNqvvwZccOHnQ4DLArUNrmapb/GU/sv4YTbzbmbSzkEOCO+M7
yn8aJA5WxfgPITC0S5GpvJLLZECqGah/ZUBCuRUumv2zez+icKJvDLJrMGEVp4L8mq0BtZbxXoSd
M0F1qsyAaNE3VCeWYa9a2vK+jhGPG6OR6bU1MJrVDyv1BSnxxI2chjexaDTyPzvvSxF4VYttMFkz
/fq4R2j4j5o2k6hdovhss1lL3CArDr/gZb+mErLuKiC8MipjCSwNlnEU1vEVsB+SXo5114pclcuT
sBNo6nO/qrMnVCpbisx2QUxVjlNsMDnxoZm9Tb16p7lSr+IN/njsHpY5C+id5B/bcJ4Zfqv1xu0A
1IV1S1YKxiFd2k0DmYJ6VLbwvWV5doQIJ3KgF9vYrYFwwls9TJJ+YGycJOBrsKEGtIWhnxbGx/mn
ORy+B6Z+Br33LwwTViiTsT1dWGfIzhOMCXO9RySYkDd0ohUaF6TM4soXxqKfNBHxvEAlfD3M86EN
G/lJb142IKfIJh0fcDvs4T8K80U2hlP+nZMbLiIRADzBxw69oo1Bc5W0ve/J+ajO+wi60La264zG
lGH57bWi8sFW+4vp2yF6Vj3mEJSiQB4jilB+EsqtgtMWNfqgC/M9yBAZmrTUYRVxFc3sIj0M8Yw3
KFW8MM8+KsCjnBGBCewPtrPt8HhbPbKtYztXUYxOZHTLSMFilC3PvSrFLDT0tXSgE10dJEMssAgZ
a77rsc2sa7LdmXIqvIyUVESpxgz1577s02gaYc1XLGwM4u3UCn0SdyvoumOYgG6EgFbjLUo7lcEe
6bnfHxpv0WshVFqE864q1362ESNUZx8pqscmU9VDn5u3AkvgRq7LfTrHZ51OaWOBGONK9S5SbbJ8
XeLwH21RSpw/ttuurucUyPZmKQ0pNoBrpZEBbSywIk9SEZJtt0xR4UJsGmMWcd2R/woi8xSXlNBT
PDtq1AGoODrXGplbwdSryrMEclTwsNOqZzpaiq2vB0oR7UaICTbUpxEjegjP4aBXYgBB8lo2QXLm
yqCDg94e941uhnlZqXMs8orV4TJNkbu5pxSA2Sd36bR4+E6mWjuvBamMGtNY2KvGcf2VXpiurUGZ
/3UH02iOe/U2m1Z3FHQk6b0zihS0ZcV91Csqpo2OtZHw31PEHdpCBvRy9T9j4Jg0ZdDFOKxkYZaX
R/Thpwkf2X4NEtMyFXVyIMyMJQwgt7CV9EnAiK1+4q8PEjhKT1vqsGzHn3SZLZwX9rj7gL6X6QNX
l2n1X1KjDZiVIwZj5Cvuux9auvPq6RxGroiKFftwjVDRJYxdWqfuHrtvu+Rx562FgmT0GaIskNos
o6UYwNlO6tCr5EmzTURt2J6MpqEuQJfFgO9YnqrltZWYo+sPOW1jOGnFqvqPoX3XFABRQ6AVnws8
72yf0r78hNm+X3i0vNUUy1dVjHLI0qdwekhL3hMkQrIcsKQueXDD2H2O0JR8RfUE97rwCjJ5elFG
1xVdOw85LNKlpeL3qORZzkEucKyWx51W5YncI90MsGQF/22yT3HtqGLqrjdUbrXA46K3jR5umg05
IOTj7xc4SINwaABOP8gPJp4BkrybCvusf0oqBUFJkKnDURDldAhX4+rMu0qGYrzos2K4VfK1TdF/
X7s1rj8wHirpd36YV+qHyvzQLrNnNn+da/fXzm4Pbpw7eakkIsDWHufvfirw0OrgKBtVC47ybP5U
aANFwOHJh7Q6AfRzO0wbsvCEG3K7z2oC5/D+JtRMYRIX7nkOLj9T+VxqCx6hRPKT70Ycryot8Nsn
Q06sKcR2WkiseUgrEr1xCfzPXCN1O8TyowTB426XRKzqNpenA4M22seD+K7SZn9UaoG3fQ+uv5de
I1tWmt6UzVJVYxoWvuiqohH0Uvy9fxn2w6TJwWrMiIK/N298O9NBKuhJuqnpPaRBrmdOwZad06PL
ohVdh//10Cxn1KzUTmjv48E6vRl1ebgwoLKCiQw8YONY33eJB7mgDCpeVuZljaMK7mfulid8v+2y
+vzT0quVafiMWB7R/fII7wDAT+wEa1JFiL3jUnpRok9Bo4zRYbixQRTSMi5IOAUFGSE+AGHmUlG7
cpo09IMm4WG6GslckIAsYFgsYRSVE9fkhqWQG131oPyqIIAxpPPoip2bmV7pb7VQILM5g68n7R6J
TGuhZh0HUszrlS4MHlgATNlqjxoOXXSadQBgCvguCdMg7lldogalphesdKnKK74V9WTYJhS73HT8
LyF9h0n07V/1AcQva0F5oEDDKQtpsl8Ba9aj5TQ7+ow4lSgEGpYur+hOcHw4hurfiDsyJiUN4cvT
XtwH7as17DJ3KX3x/6Wop46Lx5RwwzwbVNA8A3Kx4jisrvK8g6xDsaFSRUb2yYp3+Ql5gLKZWSFW
xyxylFkSIvS08AKhZM2WUXIM11UpvkU+UHSjyA3Q8w1smQIflzcj4CjDYvF+4bEYaMBprSvETW2i
5eSWoTX5b7caG8DxBcnaiwt5C8N4IfpsbNdkYSacOu4uZyadNbHoAfh7kluSLbFpaX2lhDfRb8u7
VQrs6/C8ADtVQ/yWaHgBjJwhe4AFeUfBohXxXOlsWYx/NMZ91mAknrXdj+McoV180R3Ypgn76FDi
2LSelMsIEGRpgcNMndvempaQdfgdeu4NviZy0u5m1ail+yBe2tWGam7uBPWQsFHACXpPZ7vdtMzq
AY1g6UMwW/HJ1RixKKVTpPGf3SsOBlZxR6VSGcdzzd4AYx/WG1jnvHuwbhei/1TQ8rUe1w2Kh237
BbS0mTQ4M21wDEWJFCqxm+BTvB5U25lcbjEIiFarbs3d6UtGO17Q1KZ7MjjixgK0WvOnvz4dIjFn
fbOs8NtfcGEJUpyrRXBOJ14HeAqTQ8wwWsTlc+YfjqCilHsfhX4vxqWvP5EhE1Hup6Q8S514Io9u
qomVgudxdMSyio/sk3aLAH6dr8fDAszMSVJ8lLR2cUVWQCXdptUrgOgmOjZE05GN/ULLkx9SzS2H
iONdbCqbJ4W5+7KxUFVX2KqGZCv06WUE4/JPfhbPVU0iyTAKBavKpaFRBNmjOwfQHbXsEwPIO35w
S1rWVtysEdpEZ14jvjrO/eJKVN9DYeYbfswG10ERiLOA63Nu5EMgV2O2khrxR2ryWVaQykMRIoeR
4+f0+yhwfPlWLFxG62bnCBBYjHMOO/sxMG9RDYQgznRqAd2dY9FnU4sGGJLmEbNHxen6Sk6Pggve
9zhOFxa8LNNcgb47ejIZDcKpZRtoL5QMK8yxyxRdogFfTqQv3Mdx+McKr4bGW5bh+/ludhLws6Bb
yr9A8KJ4hCthPEP183MQ4vGooG0kZRaUvoeaEsFNLaaDmSAphUs8rzSf292OwIeYDQlNHSS/vOMi
5vrEEW+J3YGldD0iYCnBvq7V/qYyjcbDSl2d2wprMrHZSQAPZ/BntcaLiFhrYCnYVCsimuWZDRc0
O1xoOBucYAGlMtM8rM6ShsWJ4bejQKHskTOR/Re3ODiC9GpAonTGOQ7K1aqxyW4wyIojbWQHhD1B
ZKInRzPCYZIpK4rWaAukFS08FMCaLqGWHWzSQklyGRRuC8BKEzET/n91F54D71Lh9ujBDSol06J2
mwSJwJcJOpfejAxDZUqHdfX3Y31oLZv+rIKDxfn5qk7A/xJXTaMzyoXCeRlbFW7dHWbxSf7DrK+l
K+1EwAoyuOp09HpKiswB/H9Mj22sqoxeaTzV0qrmK/oKYJ5Z83i2miTj2JL6DB1ghIjMxb3AnGGO
gyNrlsWREN/5PQ2as3FOARcEDsPAMMdD/MJOVM5fyEZWcMSC5lwk2eN/Lw28NXZYR/erG9NM8bgx
PfVwiq6Y4vreixBs6PDDcfj3zmYfic7ampmgqWu8saEbnDHPSq8bWyF7MV1u1R6ijA/7y3mCFOkn
+OagoefhJHrVBkdUq6bXyjiPxdQ5f61JeUV3jCHmsOowfnVy2rrihiN8C5Da3hOauSpZCXsSbM+1
8Rn2ZL9toWuKGtFxPrZzzJGDZrKDh5pndi9zw/rbwtksyaEWfQ3URVBIIiWAlEdsZ4Hm2sfgbQx8
FcmiG4wv8qM72KVgVC3ZB+wO2jBHIAUB5mXrXXK2r3EAF65ZL+jbDHXd/r1oV0V2w61PothVIzmd
2HHJs4U/EoMcHBbNptrI0Rks9qNZZ2F6lDjskPbpqi97c4nw1F9PUjSSm36b9tQ6c+/w4byiY6BK
zndMmm6jDmvMO5oysEKNAr8xqEQhD1Y1zHdur4EZg7zIZjnkJBU6szX3VsINROSc787qBNaWPztk
0RlSY/pHviRJvDmLOQSTx+vHZYIpu8PPMWorOC5hh80hMKWMI/6ZCAxvcnWz4aIWDl4kJxfK9XtA
KsC58eKYt88Jlcq2Q3Y38MH9UaZOAMEvRbkXy8HMtfcC0K7C7y1tvHy2dbxeT+1L+WLkzCiJJENp
UN4FrAPoxHWJ8dgdcjS/4DKFT5W5OBG51qoCUuNAg2PLB5pn9xEgUYPKYI+wb0AbHgzHwCu5dJjH
NaR6pVbEyPku0BhVPedaHBlMr3bw57TAwtqOSXp9qilJz8HOEROanlcouGkIR7wJeW8h1ZDXy4HG
6cKcNfGWvBhZNMXYACDcIX5diOknCReheetDQzOeDQGKySLVXfHyxuyr2jlcLBZU6vqXNQknhiiN
UWCbS+y7ad6b1MO2JhWY/bxE8KeahjbxBMhJoFwWs51M85wMhNcwmoWbKNagp0SyjhFrr/AGLqmJ
TJedL25oMylFRpo+xh53GAEhnUCtoxysELwSbF8IuC/cHgCR1nFu8fCdBgdMdM6razeKEhk0e5wW
4OC3iJ+yjdmEQow83fF6vUlSvN39+l5erkXh/oG5WkS0lD8i0W6HT/klR9NVYH+ebpXA/rR1GoTH
C8AqZ2FwOkUuK1NxG41QYurb7sOgfRRuatlSoSuDa5YnLWj1wqXhBj2vzjrfdXP0Mr8KmsTsmVei
16CwV242cK3lJ4u9teevfZ/wo2fsyYoChoQE14lLwr7agDF4ckkTUT2VfJzlqeu+XeWasYCrFwJX
SyTcoRpTopVwOmiwJAJX7N5iQ3MM+CDoRtX7exeNVocmC7X/FTvrEqlcJRaW3dQaCEpgHGs5ND8e
zhtQbkJAXLQqoKxyjJT0+K2b4Wj1hVUm8OCJYd6hoFth01m/QH9/6kVeHqShv4sRErMTEFXgBtwP
lcXf5ff2CXEr4SysjJdqfw6GAhp+E5lhSv06+zfL+X/wJ5KpnErsiNdWphFKNXHcoCd7cNigbg4t
/gsLKg1qddlrsIX8lOlCljEB01mPBaEvNbswxjxWfDxETvnGesqSIj+Fppt2lZLWnyk0waPgMmc2
tjtheTlSWi17Wwo16AIXdNhKn/RiaT5sorXhpXXSIV8Q8rJ06KFU+ONceVBDgmoVzFYv4dRL5WZr
cs2PvQ1g6Qgie5WJdWH1cenDIzHTEQ0xoyjmePF7K3tX1kybMV/k5OpaFBlPMjJjlukqfDb4eN8B
ZsKUIyQdfGIbugfeANirlJ9ytCRF8YUZUokkl+g0qbgaob2LTM/c5smdnT/LbhCcr/mTGsyXBa9A
6wlLWYnoha4DpmbnF8cXKTfpubQ5m2ZoYzQ5VZ90TgaFz+15TdMJbUbgHBqdOjT2mMHmSbJ9BNJB
623YxEvWhpwMg+vVNgeT88gePc/hSe14oIHenMt9q6M1LqDP/hebXUMO94dJj46NKDEfkpz+h6ZT
kSAXYgJiAdlOZvEObyld+c01FZfHHzlETap++zM6CQ6336jnfyoqU+t0tuUtIs9abjVedxs3pHdn
cucap2raOwGuKypfyD60siGYLtUrMRo0NRC0qRGqUGWkBXkjHj1Twh6tkCjQbzsW3YJE9Y5wjhD4
eH2+GXPuiiKdCEirKyUgsDFnPhyfHculHT5H0KEB+M9WiybI+Mn+y4w8FdTdGoTtgUdy1UhIfM2R
Ycts1NTdsrPrs+XtVlGPrwBX6vKQhSZ0xz5jXRT0/CsrMx7ygSAVsJ8HP/2lTL4y2TAOa6qBw8wX
MS2WDytIK9MAXZ0Xh8G5Be4P9SvBSpgwhbREO9a0WXLoys9202yrGyJeuXiSu1/tPOG0dgpwuLxw
VIWUMCPTi4qEtKfuC7+e+lnQB7ezHSjCNBEmV8CvMHI6sd9/or0T2z7yV7H1PCSPRslpKsQgseuQ
hZbn0P5SwgVGBcSztwbta1csNkim61A5ZCfCVOtkz7Xoc94KlHJy2pqLfd5ss6L0HcRxSFjw0I2G
YzhhEtaZeb4ksDymC93ph63BjZMgol4uIht/h80Due9ZO42ruUOMr9dHXTa6PCfCBhVV91mL/hJ+
0qkS4EsBkCYHB2fWQvyQFlny/lcFVAh3eBj/RSczPD20R0s/ojDUqF5Nj7jEVEjSYSh6Ojv/qCNI
iZfL+JNpYNXp7dVKm7rdbYwKAX8Kl6E/SKVgePHZ0Nb9AJzA7ZAmfz4ZYqdQM1Na2BXgqDcO1ax0
cEm+0v8rzTDhzZpun+eJ/9VqiEYdqu0z/N9Z7A3K7wq1pHwDJnZ5kxobSq/TPgUwoAqX3MQNZhxL
AilUTMAvfL7Oz1tc9Y1qPN4hgQIQZ24dqQD4wB/m1Z8WBxEuj7lrJ1Y1PWMRAA6/ANY/kuoEqsHi
d4I/i7yV934FBaaqUdvqHdLw/WWq+DtwTmCDKraK2tbsTXRqEbXWzCn2moN28Eb1AsjRXM7mRQqN
z0AmfEnN9rWgiio6yRuv74CIBAoMBDS0NQGswqf/e4ctavUmBqjPldT9GFzbG5P3Adn03iZZ8Dnf
XVF5xu8teaepa9MucPbmrI2CcKU9cTJocJqgbV6Ifo9VYufrTqel3KvQYSIxaejU4tOUU/MZFolO
/wv/YO2CIDk0Cd9HK5Hqx8OJqNl3YkoQwW+ECOYAFjZRedn2OrBTJr5UXh2Wyoj0hEmPs58gWZUL
pm/GIRRGYWReEoJisbFXk9b51JCYFSZqHH467eomP72yDRlvgO0GXtQ6MkjKNFlVjHraWaQFUH29
XvOK4Z5DK+02lCpnda5SboMUxrGJVuOCKrbvWS1rh5ipcdqv9YMCD8YEnVGwvVJBJUFAtt4XdPDQ
I0xkwIoqysal6ATqVClScm01URzDzReaoEjzmA8FkPd2Zul+gD0ZSE6kzByESLM0UqCY6scqxJRt
pY72fDChtryBwo+L2tU5vVhKXYoun1fBGLDdDDmiYzhgTJHqX3tclvCPAFqPHpEpHS2yQFUkrMpc
YNFeavbEUKp/5xxCJ/A3h1RJNwHX5QKcFDw4PxcfgfF7hDpIwu6X/TKU75EzAKnCcdE2wpWl+zHR
Q0hw3q4LOwwshZYYh3OMO9lYbFWMJgqwv9Smaqtz+DHqqWCmIazPgFi/4PrO1ari+3141qpnRF0t
xiC+bm35n5tEmUVcJ1Xj+y0Bc5Z7u+1id9Xrq5RlWufX4dO3bb97jqD4BHqVct+2Cdpt9xYycfvV
YdVuuDxi31OkFYl7HRJz6klDJAEHxtuVYa+FvDKFlr7jzGCqC97u7Or0BD+I+B2KzNwWc/TP7mLW
9YWa1z9cJoQ/vXJfHms0JQnUSTsDsHJmBmfdMg+Gove5S5BZ1xBV7N+wYjjdTB/tfMnSz/zv7qIa
MNPmW064b2T9fpBofe5t4FxOQ1kFGfgvOQ2vMUFckmmP4Xhpz+dZUYEw1C2s01XOnOr9DVHXWKkZ
weaUnJas2qa3kfZ3mqGUozAQg6nF+RsfKqzO4oe6rQrygJQfvuFfqRPvuTpHrROLHIPwesln7WnC
dWvN01JWRYVqx+sVNzZmbjFrV7Fc5U7a/lQLgxQS/dHPzZySgFdYmCXTUZLRmr3NH0f5IfpE37MD
zcBTJv4CtEkRHqmYRkRLhiZOHV32h84D5KnTMOGsqTZMNXy9kt9jF/LvsgQrlvkjxKqnnJgFAfso
rjk3rA1+Eyri2s8o+Vom4vaJq8k3ITdUn1gkkJxXKYXPYqUulUJek/+mH3yhhLMDahqRc2dJ7Alt
fpfC691huN3VsK20PIlHqlk3Ps5xULo1yYrsT5+kF1rRqwvj8FGDA2rgX9Cie+S/7rOVQodKuLhl
7KWt98/d+uLXJwQIg062gPHB6j7juUIGe15uJawjWs7YYnuHaWSlF7utR6y8GoaRKRmFJKDacn+I
t6VyGVTRmXtbroAepfoy7seslKgiAI42KVCaGafJl8cSr42KFqmUknrTXgOHy0gNFjWBNjwZkN9v
i4AMTafuDb+cS1CCQHo52PkOn/RtcU6iz767aiarE8UN5963lq1+9dBevLxaFExIrSV2QnZFhzTi
gi+YPDAiVHahEsRkl9egxWOqSYx/5Qj7td/UCofXqRVfI1cWDQEej4FEDYr4L8peCyQuoLZ2Fbro
2x+qrYNE5KJ7k7XIQCEF9cYEY+UPmGomgTNZEFBrUyYTkplHXnMs4z8EyhiN29sC65MTz/qCObkm
y8NnOdHPwZYG/Tn2Bi/MQzt5jCwYDyI4wn2WdeVWXisq7KOpWlafvLugbs7dY9rpT+VRNO+7DiGM
6QviIVyR+hb8vztD2BvrvaQNrpg9oQRsMHk2CPcAwU6+yz47GP2/B9Du4Q74kcIK/AEqlmNRj7pm
/IhSTqIhT6SThINIplW5/FMpNRoy6wxS+nwzPZAjw/Izns4QEQDeInsSVInXgfHAWrivwKheJmFQ
Uab55oRis0M7TbcZSgTAOfiyDSCM+WeAhLudX6tR+rf0/bgl9GAC/1Hq1HSDLjnOoS/yZOk2G6yN
3FoWDXvXlF3m4Zw8xzYB9gAIgl0flcUAM23IM/Va8J9kwA7dLvF6XjJNP+SdLdPO27A9PCW8XmqM
RZgqUaHoE1DACWB0g8+7TUnYrUTJEvSe8FeWf7zQgDsoZJpsljy0fSwNmVFGy1NcuDKoRzeNosN8
bpnyQcumEnyULh3q4yr34TTytmUQP6ad8YzLh4zypi6iNXNQVfUls/6Fxl/Y7EInjBQWFdGd3v6+
2eLL9BkRq410OBjQy+5WZ8B/65+XqO2qMlc85hDQAJqiEhOON0Z3ZS1WpClgOu9o3IODgFrvjpHe
i0JcddJHLMBfPea4n0YzPO2f/uKCNqPrZ7TtI4DGNDW4WSpuVd3Rt+PQCJXaydqOwY7TQBA4hn1X
n/sBy3M8iKlPKVd5ri+wcG4PGYLeAKIlnv96eTkmWv1xuVUO95ISfX60lYZpjWfhYmo5wFhyEw/a
k5er0Gf0KijskI80hqTzqq35/AWTD1LA2N3KRxDbzwvwOAGjZ2yZ2ugFkC7i6zEfAe4c5r3+yrLk
//Hd9zsS58YeR23oHoihAGgAKd8Z1S8fXgufo+5vEmRdjRy0iunInaioWCOCHZPJRQYdTYG9AUoh
fwJHf072EmC+bxclOnt6L1WJRi1ZLLA1ILs8yqhgW4vAmDogtq6yc8DSQvoioKk9ELESSsFmP0Bq
ggn1GNtZIUZAbpRJXY1TkvPazyoCSW2yAgs9b0VZK88W+OnlRYAsmdyBkjd9c9TBDNLr0NJS4v1+
7VTc2002Tk4ElHfUTtpW2CggKYf1jxZdCjU84+FVnz6Yf+YmQMdDzSozTQ/hjqxdx8J9Egft2yPP
jTCPBUxEWTXsmWISN3rycTuH/pfbHVVu6XQjANdYRWVuj0wyc557rnU05sUrFU2TvwT5Ql9U6xG0
4luPGwnKKz9ZeqT6quFbZLoZZYI5JLI0s3YGwGpFHI0jM7FljdDMz1cptsvmNX3K45J3ogliyWZe
9XC7tu0T3N4vS2BoLGK2oO7G2vDB/IxHr71348X8FQe2MOH7pFxMWeQZGQszmC39dCpj3UeYabnm
F8rEO9+ZeraEbmkSTfJgdSl7AJlKQzqXqQyEM83lgYS1JwOUnrssFIhirxZzIHDKo7hzxPZJ6fsD
C8uuxO0EILDVEjlKaQ66Dj5JBcuf33Mu6uj6gmoXS5nUb3gnoUuoyRDddj2IJudnC0Q0kAl9qYr8
MzKvl1geulWTr9defyzgyFabkApTlRlHwYuLOD4VLHdaTn3871sWAGXBNnMMLTEzG2/fbaocjITi
l769kcqeL68bOyYz0j6JdFe5uob6ZkR8eUZZGDlPkY1sjjLeSpnDfB2oGg7QjRnbuWVQXkvgjCPu
hfHfuI3I8DkL2iXt0ddtNVnrWajSVcaR+2TwJKFPlNvvdXWIbhiLyK4qTMWbDMlj2l0ud2kH3QBO
wsQcXHcTGpZTfjvlfzTZbpMlGO0/FJ8qwSrX5teXbDL9Urc43XDusblCFxinWnq6DhoLf7sspYbd
LoTr4jreURXgv7lgqHfq3+2YB4uPi2RlASs1a3guk8cVG7xyIUlJJdH2GhK4EL+UeI7UNNHWHaMP
aWhPbE4UGcbWi3gU5GePDMf1AvwbrerzYwMzMA8jKVB1RvOiw1+NRmyCQvYln7Tx52GXc7QpMfiy
IfUInGD0dX13jX+WZaDpLbaWm91kJ20TSqfrOPQn9gxEPDA3ytoT8fb3cpCX+4mJKLpjZ+4vKYDM
aRfu98kKFCtGhONntUO9pjn5MFaychhXS6WUHDum2xOyni81lnkiu2RNgzWmM2dzZVv9LQMfapvF
dHTdNSdXZl4ouNLvNwUQQG1honBeTDUrjlLuYlLdAthdEAuzwrlPiJTZGMuxh/3ZB/1fAgp4wrWK
zEZ5jxDBdWgQdiab8ItZkIaxs9I4iGQa/ZYYEb/Zc5ioJL5pxZ81sOWKN/btKxKEy97vNSNBvnk/
vM75XhBcFhgA0Y7CeL4UhUzgU72SEtNvCtnMB0+QX2r5vxinLQEOlhj5QFKfO8u/ah7MJlbEQXCM
Jjyl69607xJP7SnsPLkHueTb9oNG7kzzrzSBHRAJo/NYimq7IOqkSSO42L+nXTrGgL6wjfEMpi3u
bZ9NPsGglnUXcY0RpTJippZ8Oy/I6EghnUryuC0zyS0zdGq6QpMat8ggkYZxSN5IV8DKlnN8G27T
EQ9ngE49zi/JiZsVOfsWeGm6NqihHl+6wmz+RKWdXH/crMsPcvp3Gs5M+T4HZh85sA+bwspjSUam
nLNh7/UyWjWsybEKhxqqdruhoirTWHo7uyUF1qRD6ZDOW/TFr6Q5YONDRjITt7ULnmGMx7JhBkXJ
+u/jwEFZ+Fjk6d7qW68BsXz4NlJo1t1rXBtnA+fy2PymraWz4u5HLfwr+deYFXgzjwhrp1LjjEmm
TUiW6DWl9yWwrZwKt/CZiIeGUkvZo/ku+OduluH7Q0aY9WJF/UgFTST01sL+8z7XyzL7uGJkCYwi
gjxwSMB7D4l+13nSNLaqmazwQt2Ivvbrr8nUV+X9N0hReQbF7IMc3EwPuPuGea6bAT8Lt8oHMtiV
VsPplXonaxbH7GL8Ouf7VpiZVXoiQ65g2zGqG0UG8wYBLqP/rw6Hl3AbWWinGkSNIocnoBOoROuo
mnfrFdLZ+rdRHEgFgzc6Y/Fh4X0P5zt12FS2Nq7rpP0C4kO4uaHzcYNKwMIkjIdZSZGNSJ2KyTrd
xBjyAllBbpdi7abDe/VZ6i/4fUirKjhCtdHgJNvaGMpnz8l1BeblicZ5MzMV0wT9zzVjjIPXzIPb
rrrZkGDk56AmJitE0704/cPGPMbds2ff4VBlHMzkOTAvkO7tiKELgQQpBWBTCXeIhWMYie6Q5qTt
Mkrrqq8XSIR0Ero95VKA5cd1gSwJo9u31pvCZeUlJD05ma/VcNYkK+yua/9xdgRGBk8md0rp5VXJ
3/iDJnind96Q8R+VcnWJFcjctBUWxrKVRQq30AxYg8S+r4ufzM3X2XpP6UwldPA4KScRYvit9ysi
B1Z/BveVWO8sSm0YfWroS6PC/dcQcMFIsRTxOnk0kezkFhhNcyL+zsjUbyH18JFba9MCiN4ynLBs
C4vWezj28vZXmeVJyUfoV7IGVh0JeseMks2FWTdy84BPFxegZMw2NKMdoqe4ylw76knDLFlwzJWP
rkje75DF7l9CjTd2HdA+amubIz/K0gEMzzxhx794rF7PrIj8Ip24/nxC16+7KI+p8oRZRj5KOOSN
B7Jd1K0I5899aGpxkeR99NNHFVvrUd0eXMyD+H1xUvjdlPSI6lWr+lUm6iNRzq5y4/vF2mzKC4wS
YC9ddGJDvSKiA4oJZY6oFhDAFhl4ZVFG4Om48m4nawSZv3bm7gcMTTt7xRpCoi3CxDmR0IOvSisG
bMz2bS7UzDiAEcF5jULTWBwSUigzzukJ5z4BDstpGqS+UXlQ8ewoGNPGi/elAE3xmzG4zVOVguKx
VCL1QVZ5ResxONgRqTEuzVrExsiy2O397xJbed4exiA9kJkyB/r9j0vLqEYjR5V7M3gykPDV1UP9
St9IaRNGcqrw5SdcCq6tA2vgp3dYZIPMjTgoXPdCA4q5ZmdNn28M2sXLdlTJHX2FGhweAnpF/NIA
64lUTMbSlk55GHa6wZ/7dcbTSWTIPn31BtZpcY28covOiXwF0o7XpicqSxhJbx20JzjXi2Bu/lQb
g1T0lpnzOw5ZZv2jWp+/ui1HNlQO7awejYujtzsOf9FPv5x+zmGn6LDPPLIzwL71ftB6iTcNfun1
eY1qt4TRRAOzsnqkyCLne05IRz5L7ufYOgOn71Pc2lJgb444Lgyk8Ka3GgmK2hTIGHX159bv5mdR
l4kPAQieswNw7HaiBW0ADLTbtYotS+Tv8cK34s+6lSq0udb+XLTbKmTGUEroN7sfNxcgnsArF/aS
GdlacE2GzzXaE74fctSgYnKL0NDDE7+kPkKAIyYYc0+vQ2GXHfpQ/iyVV3IndZ0qxz1Zd81Vq5kd
In890oGLNNJM2BV7tVOczErrCQXnJ8knadaqCAJCO0F3x/XwtLkkAd4LqJJsbg1FYSoRhp2hm3Bi
5KD1wvyiFEIi+aC77GO/l2UQE6nWT3u7NTz6unPjGG7zPrJdEVd0W62c70vRbspEixgi1LOHmY52
AUh0nd57koxanpzdtbtED6DCkYDLprRTwxjNvvQa5p1zw2kYy9VIVmdpoePbUaQ9XIcltvh5b3ws
2FZF9NP+QPz7lZnRq+dZnfEe57xkFNvN3tKIQHHFt/dmXZKUCS5UlDhv2/MlQt1fJqwwQo5tYlWN
Ovwbbhx2kBOaiQARTcp4vHiVfOLhNlgv6Dw80DpYd+EpvNOhu/yEvdDbgXRSS3k3PsInUeETrCd2
LLck+On4/wiI2QQbopKLGiuQmfcl0go25ZkE4i7qxPmwiW/C1lBSq3KtQXROFdsqIkBHXBEXZVQF
4o4+30Zq+gVDImd28e1djCbu7bMzepMJk2PSLysnrggEGJaQAVbzvjzgEEBphnZNKyQA+6ZHOMRJ
nItV06ILZiMz1p4f6AaARV8uPWRFrWhqQtCANx+Qtu0J/AZa4o5JDIRfiqFbl7LjvqFRtb0llt6Y
gjE5S67etikCTUvZEF5Z1L4xQC7h2KsFZD/FBJuGrmoOFToWMht1q5R5LJdJMGcfA7+inFllwgwP
DG7f6f+YgN71Qxlk+K+nR4BOdvbRthB5o+RVI32Oa6xqJfE9D7lweuCosMF2L/JDH2THX42l35jv
Vr0cHGyu3zpurBKvvYs2eQ+CN8PT5FFultw6CnbgRxWYosqcedf56Thf0RfatyI2wjDJLGu3XHUL
3Zxi3T4UUYS5z7TfaA0kYmuoapthRMggAB/fNs4XQ7x0TxiDHQCSqQTRmidOcY8B0hXR1xg7AW4y
U4w9i7l0mngu0bn2G2UFBXmJFZNcjIQgVrGiizlaOj0Uvwaz5hk4k9HH1A8cpBa+O+wnSuvcjqrE
ghIFiZslSAMJFQ8/E9VKI39vo+NQqbFvYkeZ9Zlf70iP7nXRuKY91pkiKTD3js5ZbUH8A7F0tnBL
lXo2lTpUJm9fEb1VsZn5e/d6HpllShx+lQfx9wn4AYUriz3yurUJ+rSBAqvdjS8BJyQOkveNWGcv
T+BFaFOoGD9rAakbChUe17XLNH4hxjhOu5XXn8olGBF8V7ugJVz62tCZ+4mYMXzfnboGjW+HAs2F
8DPtRbhly11PC6SdrxzGeMy43bcEhO7ihr0XgVwQuBsGmpwjdC1budFWd6M3Kug4D5sHczxmiFEF
mti0PwzVlhBsUQMLt5665IkQc4KJW7i9qsBzoreUtlPpzgtABOGqk8bz3v+3ZJyMH9TVGD0P7L5Q
W+dmsJXHTWqFNqZP8hDyCVAP9A6cl3dvE+4uL6agJwJHi37RrdmXPJGKIH2kW5b8RB+hOv93IUDa
bgYrN51Oyy8orjT0LaY3Z80kri6zCHFFQTMT9S5X13MA1PNS23zbbTBmwzI6kLfJNKvGPLVM+uiO
DXXP0UONACIg+yped4ToaujCgYgKk+pDgHXM9HoxW6XuWlZZW8tVD34C3C0BJ2EJhvmAijrLs1Ci
rF01TRmjwWjUoMsPN6L2yIBCOFhWr8JRv/sCXJsMcfxA1j+D4Ixg0RjuTP36fNi6DdghZnUyAqss
gSWoJtq3J8iu+u3fSAh7rapoOGu3lIfS7yNs5yjdUfKHHVXv2iIjYpgMrTupmR5mIFQdMa0MrtED
2Y0utL713N27cDUZwdMWCvLg49SPb6P0OadB8ffm0qtWgP3XnPScUoWITRPaE5QXTVwFwAw52G2k
38CwvqhzNVaLO4Yo6SilbPX7FmrhVurfVHS8sfO+o/tocI+QBtSBEkV2lF4x+45eAkvefwHKZXCp
0IDRZ/r0hxOf9S1hlhNrbvWzOi/YI5T+cIsyTC6eMK3NRbyZ1JICX5+jvJ+CaWvCILxIe61HBdE2
11EhnGzrHgQJVkImBtDu6qeHQS3fqp2PC1J4p7Og3jPJlOSxk1dVNyCEXIZ5Hm4M8FXNI71x0Luk
UjvISnpt9CVAhsjvbTUABcECByfK1DQ8RavB8KD2krCdPouEYE6Uc9Z4rwJevFR1L6cv7FgcxZIN
xU0NXIR2CyCc+WzI6+IuXwHobaa1DWhc6hQ5uXQEtuEv9xvTp9GkZ0+Z+M8BDdHmWIoSaWHcHhHO
VcINodWPQvxitrVG35d5vpye70B/INbMmYhA5DGKvifPjaJGfFodBOY4oBeqMTt/iHlEntuw7zHx
oFHoYycDv7f85dNCnIxC211v9TiLAqiT4DCzmU6/E5is+P+vCzq6f+oZrwO8iZyCrQtj5gud5rG5
FAAsmXr0EV7j0zu8l/7Iz6UTufi4UY8UGUYCXW5IuqbMCDsc/ybFy4x/HaS0vzm7mPJEzqpm4su5
7H2tb37paOeqnQp4B1y6ube4z4inxWw16vSG8FBPP4OVE3Iw1gGAZgg7zFWbX6Er8ymk+QwXd2BC
JTTR9E/9z3X2SVOStLMccAOSLXROJWa2qZ4aI3eSQHKvQf0XnL8hjGegCzi6KtWzPMjjdh3Zhyxf
dr1Ega1+S9JaIbuLKcUZOx8VBnprdMIC/P5mKMa+5zL7qJhF8gYI8Ht+hsi7CeogcyTPnChniXBZ
s5Fy5+Ro2hAwjVHkvZg75SVg4BSLmzzf70XXliTovF3Zs5Lf1tzDbsndsv9de9plDdzIn+CStVB7
Gax80LvURfeqNtByzw/qMnxCbiXdrsfhhOeeVpc9wm5v8ZWdQEsfQcdyNAY+aOgVoeTCNrh6ypKe
4ibTM1N7OCfa1ceadPXrCrTzwExf1Ta2lsjCiDa4VYgNn/MX8iNlTasOBPFzn244GQxKtgfswyoM
OPEZeLDiR/xJYXSeMSb0tW8bmL/B+OuPkooo0+HpUh/pOsKpJAfECY2PmHb2uQc8wVifT7z+Cpc1
6l3yQyJENa9N7hsv19ImqYvcnDY4VUYJtqKD46bEGRY5GRdtbIdaAA8oeORDT32kdwuT+/r4td/5
L6Oisa0ooCzfr24A2tursUGRbnKUiaPLxCGrW2+2OO0Ms29HD4vk2Z2gJDTk/XG+xg2s3ZxT4SKs
eTF1RyVcQutmwAaZRNa3wSDsuRBAqdoG4VbcB9STZGERfH24YmdF7IYQBZNgtxa2IzKh2yzybWWL
xSqceVdUFnPWQIM61wEYF6PVapBRJmHsl5ndE0V8+VKD83fOYzcuJf7QtKxLglXgJLF6eB5W8+jM
YE8bZ6VW2J6GxFm5SKHse+Ng9wZpxvy/2m8bvIwARJmoH6/cU37Yngqp5h1ub5zz8oeQSV88bVpw
/FbmwneNgQJr6+nM5MdMfYxeJ/oEtQTIdSiWK+jU3GVus4eD3x5veMCo5OOfpzy7B39/s/o+IVBw
QjYwGsajvKRsspsYYhVRymFFistxqCRyf9D+Dx2mKgw01VeeNtXtoaKSKeV+BRYuzFXyP9gVoLTR
ggJY5F53u5a7dGVsqVxKju0oPozAQkHsf3cR8gooOrnPE2f+NMEskn+sb8SGYPhV+9RG1bCY0nyd
RCMLTr7HJbvAZiapbbQBHfpeKxCNJH8qWAXgD0xz8e6wJZ960I5eP4WREGBh/lZFTwKfE0pFAeKM
/xNbBdaIRjm1F/qsSfKv5OKY2M8/KwjQ+tmR896s9+e5ARMEBtqAY7D7aeIKt8tiI5mRCJPuO/Ag
AhYHHmIcdf51+nLE2k6TBbSdkXWOwRdc4wvnxQm8T9LlnYx1EAxIRmcxvhSBNCD3/SE5T+yJBT6U
swXUjIskeMyoauxOK+Q8dv+J0L8208FqhUdzsK+hV509v9pwgwDZg9P8388Jtwn5QlHR+7Ta4asG
3IudU9uIw12De7RmmRNR3WlWC7FZPai/7vM8jRpdeDGk4KzwavqTqoHAfseVYG2w8Y2LXyrGTngJ
/uRKOtAwQPPOoCLWJPCILMibjNrTitT4rgR6egM6bQWVuyIBi0S3lbo7Vs1OY6BUxn47/5SzC9f7
TYC/2hmzBuYfkfyvC8Wd5yAIuB2nTmRZqkxfj7J1oENdjGlLJHkmD5XaEtQBBPVnSnpyAP8Q7rJY
lcEkBMYtr5Il8a7CB2TthCdJHpz2Xw0m9dAtujibs61iRlJq96LabPk86Y2CBOyvekyX8hyg3lPl
2htb0ZOs3SJQDrrqSyCjsc0TvPglSWU1zHrdUbAYoMWj/zoVb3sZW12SQKe8bjAi1w+nsaDA+FNR
k7J3veHFA0qvuhvKc2fviFeyAYF30p+TtCh9zzTPsUsPvPtwRYEPUlyb7iHdCnzod5m6xBAXazlm
Fa8/KTZ/xyemKPDEv8JSHBj5rDLfXViVhyu/jiTG55zDdBReth5lJOHMm0g7M9hYHxAWjhFnvFDm
v5+aDOFJzY/t6SIBs2kRD130dSamVcXqZEkX6BABs3n0a+W3aSrCT8+bZP/2Ml7XxETJNsRYZhxk
4xJ7vQ0XHqVPQlXCNkS6XnJ3EKF7Sybh6i4K7obqpzGb/L7n1eTgT6XxJN4RLas8si/fJ+CzkyMF
gV1EE79kG+DVkI9ENEC9mVqqoHWodaGR1fOOjpi7/0ZVdT5/QadH0wZ3oR/75K1JC/wDNQa1LBUG
YPismb5D41NeaKeipBEydbyrL2GS3WzqrajemAC1/+mWTduMt3OdYF0NhaRIyaZIXM4QD9agcgEk
A/ujmtet+UxbwxRGd7tZ/WGoyeqI/PCkk2qVrXkJEIFNPIpkRZEm6hw7nNtMsjnmbzRf52kUTk0E
70+TgAnepeTCgwM1B9rVkxebQnsO1XorkqLvlfhPOQiRjD4VMwOc55CtLcN/1Kg4vEiCe/Zcnry4
ATfGuOfpiS2otzo9v3rxjYZfBb5UYN86joho6GczqBXibvnOqakCRQvKRvbeqrQJCGZsthSeo+zd
PQVGgWd1gDEJPIM90Qy6E8DJ0EUVO9tzkcnVUeHxPHXerxQkGUYUoECqn0qM0HLgR28V1h7SF6e5
Gm/W8ZDQ1r+ixoSTUzyNI0YjWVQQuehyAFo8X+EbeZ3vKX4P85sJ5FbWXDgYX+kMOydwlaMQljzk
tvWWBLG90xfcvmZbYGeeoJOj8RlMDBNnn12jW3BtGCnijBXzb1SG3fqtn6Tn9da40lUhqQ54DyZo
9GtmIn1WWxsrZpoJAvXTJQL7l6AUiDafHOL9GlrMRl0+XOT/huL9XTP45M4fof2fvanh9TGYd3Zk
nK+wsPMWeuK+Z/S8aR92Xaf+Y+mVwic4ynz1hDSulxwzNk1iENolvaU849EKdiw0G20nej5WANnY
+oj1qzDjQUpQ8Fv+g/+Xjexog8jc8139jaUJy+AwiK/xvXb6kN00GBHy27emBokuM+OUfrPbuovy
65JcFXUFzFUT6T4miqyPs4JMhPoSDDqAh/J18z3X65lqHhuUtMDVrXcpFhOvx4g8d1XgqjNOjaoe
5lEQkUufg/zGrg9XDOnbQknYw79ea0RB47Ebl5m6RSUbA4lxv+zkPgGoXO4yZRTbQWMFY4u+mVbB
rIJnJy3ch3jee7WJrEN70lXXhM+h1Tm3Yowq0B/o3YcB6e776pXFQ4We73P20Rh+GK1WfzY9A++/
Limo+3sLLOWCzNvUb9wpG5KSdAEPx/Y5CxN9yzNKTJo+2vzKMu19kJqI2Qc/W2dEdMTKt6mGe41N
EppVORtuQgDuTOPiSEdt2wgRhZGa7XT3FBKsh61qoGPpGCRDUtgnH619EmGR6f0XBNOMOyjcI3bK
DEXyoXC5QIzPZtjICInBV7LF5ymMgvu8WYM0ZWv7u94mwju3lZssf5c1tm1UtDL4AEuod+GI2hey
JjxAWNjVW2/1J+ETxeARsFG52KmUjji0lopOX54b0mgDM8lk0xhWDb+JPxM3E1rv2TapOCkP3z8C
YLZYk9jiF+aptA+3UJkO94XKzRCr1hr7RyRrY91tmzLM9WxBP0zdjj8VsOc9jbdEvUl98hnMnGCx
yEEWUtGXs6NEhAFoD+6b7HihRB46dp19bqj0Q4o+lNQa8pBcw3FMABm3mPOm5o1Dapdr2BpsR1c5
UGyOyHxeOPZinsb3285Fhwe9i8cmEVkG80gILY0YifQwYa6SzxGR6dxQKe2yomV61ImLmpoV8GEa
Acy0wn4cFIX2G2rX6vOVBIYs+c11nCN3iEvtNtxyqm7pQNeRehsX3A41EpW0WmpmNb4al0wY1AXv
TQTEyvDB/8GVdWDMEbJ4oPA+xaOATlABMNNF7mq5U8gBkUFBeuYipIu59QeSs81b1AcVPnMMF4kU
1kH7fkWz8UP5YQ83+wa3BjpaqfXg5HOA1ek0rR++Acylih1M8xexry+8znqvc1gRQbrKzejuPsQ6
rtYPSVZHu3ticmbGiC7QCWh7QE3nUm0MVf1vJ9Jq21+e1wwiGdgaDNiPnjBO1/EAPJC0NWeLQQg3
Oh3a2dmR6cDrYUlCwSSvMtF28jteTH4eNEXo8bTurZesctbydAVhOsAqOxnGoGiLmW269iWatOrj
duf0noLimNd4h8+X1j5GUBKk9dEVvqpmDjmFY+L4SaYUVAdVw9niQWuyelGp+4HSmQywMiBvZ+uJ
JzySzIA2tl7Op8Z0IpocPUI90ttbK+tepJr8jxTKLYk2HmTzXAFNQKr7thKJM2v9LNgDJ0QAhpp2
M0CJavUowte4Zf8uzolUsvIxuCuVXs8sy85hFNBL7xR+ne3FVBTpbIfmUQxLJWZhnKqDDTVcvE0l
P0urL8GYxptFWF+h/HSPh5nfcnvs3oK0o362ICBTkM6A1a2TBhh9LbHd+ZmfjDcTTFDP+EClGMaR
iVkUonWHKqRWj1sBgTnfqbf+yT62w6qVL5yuB6aEZTNhFjOFrNan3yBmnGRCH658t4OSyUb0OlgF
oUCPmSHM6fHqDu1Ypx/JjDnni09CAqmfRGkqVpNwgzDL3xkPUspj3qPVjasoqDnDWVl/sa2yoIMP
xOHttMLko2mfgxfvzxgKfOAHWD5XAO69myVzRuyt2XvawGd9InPZVMDV+KobBx2IZrQGZhOTMkDh
Rba9xdftsUyEwWsqNXnqqKZSTXYMFtdh2Lo4T7eYFyJBYnxCwlFUI2ielNOeWSJBJbQrkPcXl81G
koShxEAQ9rMIrQfdYWDDQ5Pc1BKLrHNpCC7kbzwsK4fy5vuyiI/hCU5OBgbzaSDQHRtXx0HJtxm9
W1GQ2HEJ8r8J/ymjfCvGQNpQ6nlR8jahLY9FW62JCzlaJ2wA2oFfueJo9FX0ovGOY/9AzivXfwq5
8qCKCy5+ikwr+N2i4QGzO0iC8Yl+kupFN4y62eQPJtvoZfVX0JUuQujMcUv9QnFN+JWqStBXO7rA
9cbTjZ0J82aSbBa1cQ/oHELCoSDDrQxZn9/fDaaOvCbm2S1tJfHVsvjh3mhFgRMs5O9NW7/0ON4Q
x1+H+km8GTkdr2L4CqJnoqLbRNQMLT04fuW1jaHYhozJasUqxZk2hQxfusSXj42E+f7mxtCWTDfs
8EeCeIDrKkck4hGpu7v/fO1cReYkhNWqotHL5O6wLZOrmRCJSGNt67zRPU1/JQRg1f8f4/Mu8Ma7
6UlZX9jXFUBqOuL/SmiHonUwnjFDFD5nKuVhgPVsDX3OClwiaocnPVx467BPwI3rS7j77z3nY0ha
Bs14juYxWFeZp8CAtpAc7v01XJ1xQSaqeAjc6U9n7sMwUWcPuPj6/Mw7fzZ2wRaHu+u0XGHpsKed
6/VE5VqJNOKtG/etWi9rbVRljDwq+Zxg7lQRiUooeBEsux3agtslVtZxyNfX+CNUSvlXiE5I4J0J
COhW0X2vhLGGW4RbN0yh6RKr+s7dlA0mCHDn5KUeRvGMnyjlxIBchkO3eENHglbBvO5y0so6r7HI
nPxu29QliDrJ9jBVDgsWI+cEXiV670D/dzBZJsNylr5YrW37w8a7HEUPGJW4sxC3xDWHg1iJ9iZe
/z2B1qaYjjyjszwxGT25wg3cglYneOqLuI+PeO4ZApe6Xx3f46Xk/DfgaIx2LO6fpQfFBqZGbq/n
/Lv4kRHuJ+JQKBzXeEAK+BvU4Ery3DkETQmPYEAV1lNc6mx0quzSQ+LidHP3hlK2bQxnaiie9tkM
N77PT3tZesS+5yjU0ETqzoaiEjYNgCJ3wOl0WGu5+LFWZR3ctMofAeQTGKBqK2yZFj/L8wx69wSD
PFcDascezUIWPMjHpUWVZ8cUrlwdcrht4hFgpXI1jnlihcLZczmh/oVBUn5N8t8H9Wf+TS6ApaJs
3fKJida+OIFWm23e2VJ1hl20tOWCseX15t6xUeUYYxg/rAcpPRfe5ysmY9+EzrI5Asj29VqOHm8y
a6bLK69Kd0m4FEoeIhWjITG1b09Vpu0MCfbyEEbWLGD1hQpWp02xEpMUg+KPXJGv/nnV/ncJAmRu
Uvv3cGQxzdpFawQbQSFOvzInaq9/dOYpmDtis7t5QeKZkP3jx87bU8TG6C4LmolZDWKSvVhRTwFV
+OSMIb38SJjmwb4GhczD7mj/ydlUda0Ol5PLr90KmMBEPKFghMLYrK90xJg1Pr2VQqS0zNMKYnTF
VXUff6nFvkFQWXg9fGfXTxCD/bQ0WiJPh1gSVZK+4+B0eBVu5oTFp//M7xZiW+L1ikfRr4M1L+0b
Fb6kOj+lq9/Ol5BVaJwqtdM6dSH3h4REqvgiqhOlkI7kBL8/rHd6hSTpC/tzVeqhAKaKBAjQp9CA
A0tZ3WiKIS5TDb2U+apziLs7RdheUgNLmbk8WECMgCqup0N5QnmhVdaG7dJZ5SxTjskF9fEN7wvF
spItvzaVYq0BUSGhO4SdTL5jFOLI7q67C+DIhLncDDfNhUpkpbwr1f+dHt3zkaRv2PKrb7aVaHhF
3mgU0z3i0JIA8OW8HgnBU4gIbKrfGE3pu5W3n+aQb1Ma/XUoWu1L2rxnUILvnLq/kU4VxjXqUbEd
x7bcMqWpxlhLUZjpzGa5h5fiTKVHLQfGqpf55NMT+sJa91Xdqf7SSWOrm/qDCX7BsLZvQD4CMYUJ
LH7gaJiUlG6Oy0GihG6z0t/qdDbLkDsRSpZDWXnNFHnYcdahO/qmuZDmKUs6MnQZaoxgIyiqweTO
mVuRgBO1GuWW7u6VQfbtZi6kRnlMUPrMPvPo8YXSPf25njwJyFpIWuFsj+mPUBH6JfF7+pourFlx
4T1O79UUciMwW3G574yzhqpmS35S4GcelIhw/dfRtEsJDLCRz6G3wYgqQ94UNViqEENsGjD9bnow
rmL/B8z4ROnasyzVKCONcD5RwY7skKfNyXkHVUA1QMC0RAAhBJF4JYfAJzUeFFObxRXZm6U4o7OK
1JPbg+mk3J//BJRTgpNggvIhBOYCZfde3r9/N8aoqYFxawd4dN8CUMIDdZPSS4pG/ZknuWVhrDEQ
NwPMmIgzurOGavhiEyHhXWGhIZKoDhrxehFOpp6vHMQ4pv9yMOZlwOwuIaG+4HDSVM10IXK3lwZL
AoRIj0+tccgi6GygIQfeMgX82qrFZs/OLO6I7VIP4ZV0SO9+jhFse6EnRHTP4TjQyOWzKS2afNDB
mmOBF+I4Q506Y3GLK+mSMOqZSpbLqxRanFFu4+kFW4oeuZioMdublGqZtUzHhIypn2EjbdwyW5oi
4JpIsbqhNsUhtXOklVWltTlijUGd6jgZjnveNYZjXvQyCtgmnRufHx7dffAboomywHwWhM3ZYcLu
bPCTHNG1tOuN7G18LweG2pKpGUfl/9xOvVKyX5iXQ3yeFapnjsfz5HQhFd5nzcen+YaQI4qe2QhW
P1IgGadjnxIMDJocYG+REowQMmV9CbLw3trP5dyfD4XIfjPIaaKaVgsFkAlJTAhb2fB5AZ9m0lCn
Vg2g/fm1Ca6Hhrc/uWz9trBEVz3WZZguGdEjv+xni8w684gVUg+Lxh4uuPEJq8R2rqAzr3FFQtsd
Vrf2t4CGJ/TSaEzVdc2cIgJ6wkrdTqBmbXaes+Zp7bRSrn1yPh1CyC6W6eV/ilTbDZVw6WIV8vRT
s5W28SeN9PiLgeWoYyyfNYhP/uVPCTRsvgkDqII/qzrdYhaF81LJEVBcUdZ8PvTOthTf47zFigIM
Fab7MzJ7UGCFKQg6xS1uMG0GGTnnBFqBsRTNvP2m+sK9Y5VKMlOUsGuxjzqGS+eV1JNcMREsdrpx
Lrrkh3PYIyHs7UaF87m8rk1/GSGhbBS2Lx/ATDdOmaQVm8jalLQuio9PIWGHIiD0a+fWr1II1kxS
KKYseciy12GC6y6Y7Cl/wsWl0EglTYklJrCVS8IeTz0GQOmkR3mIxfScZT0fdEc9m5zWqQqSn3n5
ChgZEpwBOxUE9usENLw3XrdIy4xAT7q5GDgX4d3qTBNGD+npT3pt0J8d17KngQO/bHnTW7Bd6qjw
PiL5AXw9yQNCc7ipzc75/PLiP6WxvvdxJbsKa9R9TLeTtgUe0/WdDrL9+mvt+4w4RXWsIDRmm+CH
M/E/AdGZXYOjLD74sVXRj59DtlhUBq+FGaKG9vDSDfj2e3LSCStYTweWZeLzwbJh/W1P9jLm9cBu
MMLk7w8Nu6CZhP2Wa+CfR1SzdtN7mKaa04e9/rHyZzwrFcQsoDUWcnmrGDfJFNjE9Gdnl4/qcM8H
SSAyEd1pA0Iaenex8hvJq1gAiBTzCeLWkSBjBjDniRl2laaxL3+Tt0bAKwAjR24rKedk3OWCLjG2
zWyi4e4bkkYQuMYiCz0RVhzs0cn699VaomWNWY3tWzpjObEgAQoAdgYx8tfG4PVMB7kgQpr1vw9B
NzuZHAy+Q5mVAQRgfQN69pCqa/9ekW2LggwAkukP2rUxmU+Hn5jycqUtLAYH/n8c+noybXD2WCJb
Hs703QFW/T+Az8jvQn+Twwikm4XfnaWrco3vQvJ025sry8AkOc9ANddDYMdcpKlBOxBE+uxwur6U
rxjhzkZNqPLNQ7ftzwKCFPHs5BRueSzAkCw8BXQ2yioR6CSxvCC3TL68wLFJAfTP+3Q/CBFYVOLF
6OUwwlocr8HLPWVQmTYOBfRzGJ5PEMZnf8Se6qDS7uAQ9ZiGxxPA1MJHBLMaxMhKn1/IqdZinzrD
y9XB3H+yTk8ZapSwmimu+SPTDd44A4St9twlegR66n74sVLPnkIeiZpWSnvEWyeNUri+Sf4ItEZ9
lvahRAZq4tmPpNZWd1k3kzt2B9WxwTXrS/xDjAmDpfXaGYTZf+HlYOep6JhQevTT6W8XHe+vDXyb
psi4bUyH+lFSPgJLaOKxV7/xZ5jhpQH2U4VLivwBqWr4ujZ+s6tiQ3I8msN6fl6gM/OKKYiIFmqk
NGaNPLdr/1dBdFbztbTMUIppRXhRlyiFKGl60hu0KvYR0vjTdCGtbI8/2WEhlaYSWFqdldv0obGz
xjvzMN9qnnIXSJcMZ7ugd9u1h0Ei9fuM/53Pe61KgHayoJCGBml7B1G7ZlrJOFbjy1e02cq/k8CF
9vxDTJ4KMMYajCh6sjb+c0yP8VymJXyJtPaFruBkxHVCE4Uq0qdazVI4xHXcZ8Ze+0hJ7OMJKfeT
MZbLIqFFPHVd+vR4+A4kWLeYjFPBS2atOu+t6WToxepZ9/cElxkL6UcX5jHwCdbuWi9HyRSIOMsA
BdaeXmkSP+JhYIdsd/Tcf0Es6fQnqT+EB0FoSY0+5xAJjFdf1nvxpTZaqZsUriTLTzLTwfNjKgs1
Pn0no3pQqxp8NWVBPPFN+264bflVx63/Xo2wfT/RH8dhAMi5Bzic/3VdhBs28y3H9D//E9oGclYW
HKUL6mXz7lXJOr1r6bRdd95wBI9e+PRUesihmJKM64MfPv2HvDULs/tdbalR0Ou4ZjPxuR6pMDAo
4Z3KKxGmLikBgE3pWJOE0LZ/bD8IJoMBf9213MyfE2vm41AlAD+BJGrC6KHYF+kNmLT8Np18aHpc
SoIDB7dUVS0jwtHgVRk+1M8CJnYhKbT2p3TFw1l6WQlUIHzMu3slmOxL16IgKG93gp4/JDFwdMo4
s/v64yRg/MwmnJHa7ze7Y4mfWJez+VryAuetjP5BNuNGDzV35Xhq4u7eL8UpK8G1g1vDO3uFcMFy
m3DCpNLmBKdKkRffIDq9haQGv4i1Ogfd5A9RPDJjd9xhABaC9pS1orExPsODzYf6TqVTq7tmjs6w
I37GmY7Mn++HZJZGIj/2unxdhshzJmRXp97815T82A8eLQmrgbrkjN4j+vMYAiKAoNYU3/8tPt62
85I2HXEepfns1G29F+wIVGz3TOFqeN/WeGSKhlAYMOPpEhozk7rrT7lyVmZiSW7vY+iMGG7TEVXN
uh1mzxKk7YkHPxaaUmSGBQ9u1WbEDls88MNnC+JaN0y2Nx7Nhsf3QuHZF3sleiuonk3YlblfHw5X
DvjAoI3o5ECYoYSWb3hRNN5CG7xRf/QuH0wgdUeaGsrkXHD3hrdA58F6gC/BNb2Y3VoC+Z0eTlbN
ozEsd4zUhP0ZVHa+NXZrYs38roqPrVTwBnkKPPbMeqSN1PUsGAcrSzaaodg04Uwwp8YiTp5zlva3
Bn5MNKj80Jmna1hMrjyMyZcwauy/UiqzXQaRpsBD0kFUw/pVNIbLbbQdQ5NbL1MOEnUUhawb+sQ3
rXWUdegBVE1JkTM5f9EotLbgTEaJSJLm7pXXozuPuv6+gOal4vZUO5RY01L8FRRpY9vXshnyLes4
Lz37Ms//nnkVP9jQ0SMeAZS2aCkY4ZlE0Pt+MiFpBaxo5RD6Lvku2aBJQ1a6Ij9HxUGnEt2Z5klf
gJXIt14UXrnAKd8W+5QDkCeGflJbCzwEbwra8X6qaGK8zFL48OyVul/7mzCMVmuAmHxXrpv2H7JP
Litl4582Jsh0tlym0mMAEM+4r21n3ojODoV0augFVqNpoOByxkAQJ/gsca1TnPmP49OA+/AxK2se
pyuNzVjR89qPRakLeonZPnypnfHyGrNNNj0OvXm44uYKzpqMg1+ZzbQXTJX94BouOexjLlm99Fax
UfxEviy4Lcry2enIyvrUzp7zvw0CPa2GwhmonEwDbtKffb25DQVh6IEjl0js69MbkmKnkRq/Wnwf
KjeZ6w7tHSbbLKqtXfe6umvFBaC3PqC6TGSy7fXAT/5l2r6n90EOlMDNoGBlb07OxAmT0KQxGV+I
gY+ufRKyEOcQDiSWjgaouLatUs3uBt+SZZMePJFREtWR/5SLVLaci9hW7qd1b9p1fjBFM3TIpnKc
Zff8vNnx03JxFPB+ZYD6z9OpDihOHT3O0tw2f0jkodlrMZoxqcJzrfnXXjL5pDhMOJukFtqRaSHg
ee+SwTJOj3hWTQwqkeT0Q+uv8SetTPumNfRjdnajzlZDklxpxxFcKoEezIehq/sHvyGru6Jvvpxt
XtqbmiBY+eg5HN1iQJ+E9Y3z6mkFLoQDWZJmcjtQVVwyiB0pJY6U0uKSi9yd2v4oyHmzWZNLd65z
GpojzZODXaGeOZj6AGh8xij6ynfB8NMUS/Qto47kGmG+rEuPXEqmweMKG208HPPZlOg1qJn6/5xK
GAwiMR0t4v9+9c8/IXmy7SzfRqP9KZbnLDmkMOT3ScR3dbLnrdBlOq+32WknMwP+OIGC1FUmvd9B
ZaPq002DGCSVH/rJ3X1KP99WnplUmpeBzQIT/flikFfq8RSIN2NPh9+sBAkrGYU+bQC0xZcdQJZq
wmr+XTABp5ihO6B06jOw2Q7pZYl3KF/RQOfnoCgZqJ+2CRHK5twb44nYv/ZFRhjswZpSaHxE7VQi
9gMj/hkj8CwTwDGkH4XzEiSC04MJJ5XhEk2Rw8xkdEAqFeXKqcVFHWXNsdpNdGNWQqCq7rzhAbqR
pa/OLjdNmleuH3oxTOR4NzTKua1Z4cEYz2sy21BOds3CAnUrz/ZnDp7ObhQbxBUwGq9SoH7dPXTr
RIarQZ1TKJAApdd4sXm+WkEEss0Le+Uv8FSBNWRxptXY8fUpKmtehUZo7loKVZvj069MhA3zwfx8
G1OGi5qiKlmVAWKhVuvSsN3XK+ul4QszffwUr31CWy7XMdp1EuM5j9DS4GOtPk57xMBKRENEKFPB
5neqV5sZjoOojsZJ9fkg9tKw/necK0KxeOl8w8SbUUOy0CFS1KaPxmAkmv/bcOmzf+n1KtBUMn1D
ZBr9pZQaTcMpZYaI+gK3OL8+1jEU7aO5W319X5fcyCZH5RqDfeiD7SueyxoYISFurD7oBdHA7h0G
s/kgS9tOTnjaH6Cc2Xe6+JtdiORr5bw497ke6E8HEZfZUIXvh3vJx0LvEEane1lBGxhTD3ostiZC
iL9elsD2rCM8MXCooF2MpFxIkY7P/FtEgws3QmupCCRAIOCh+qUgmHcQRnHhJ3k65c1Ku/4FMTQk
xoRFxKcHI765R6nIuxUZaPKAspQKBl2hW7LuUVFxeMFzmdn6Aw6BYJIz4fMc/81IE7/5YMqKmzT6
MfkOjdIsKss7m8/KtcbySWQ7JsylcE5+aEfepeVpZM3wkWtgG/PdIFkaRZZ6Js55OtPdCznhkObY
XhQMymFaCsbuIt05dHv7CUAVxvVPivdMJGdvbLsN+I8L2Hha6xjfiahvAmULKjGt+1xjmCLnIr59
ykXxwO/6+GUnvZjDPb6yTUia5pq4MuQcqca8V/cB8K7DOQbmLhsAzmYkycTNe4pqssE4fKIGiGZX
OSEE3MIexY8xGrH1PTJ66iYYYs/R6Lhl9CGs9f57zTu2U04WwTyvWqhxMGP8UARuC0zoELRXBmtz
gbpyfwZZNfQcODJlKLBlJ+1lmyRMZLwpFXQ6s2VDoBjDEk2bHkikDkMFmytY1o0wuxBt3Mja8lg+
gWph5gILnQ63Ho+qvI4csrpdahG5wEcODPec5Lcchb9QlFWoGY69TkxOCwvs9TmV4gOhrfNz0NOZ
JVBBV9XfjKOPkzy5ojLMVkAfMpBB5tcdeahODWRRNpiJZwqAm4nWV0V9KVTH9rCWvGkcPk1F0/W5
1EwgMEMe06P294rBgvBO71B+blveWPmMKAcRR5A2wHdZju/1/d4oU4LvTWeRsUamZG9pjCnrbqad
32owHhxgW1sZ9l3pZIY0CDnt3osLWnoRbWNjcozuod+FhrL5Ol4So98GwDkCAXqPbxHWWXDxauGY
+4s0shZ2pr6/CMSvh2Mb05RLvDAvq9W7csQ579AS1ue/Hzkf46yf2MFZ8A0uVZsGPK0JOKiIMbPG
diDc9dPDLHk0bP9TiFUNdrIlUl07eZ4Eu+c+EZjJk6t89RrEu31EKHtaWwDz0CEGgAOJCtv9AMvi
6Xl0uvI19NuQEnGlRPgOcfc67j8t9Z9jGNTBV9VUEU4TArVWiTIUSSwW+xmiyaSAqapdnS9J3AKu
jI58KAJvI64h8vEF14qmr+w6juprmZPKxotTcJF0y6Y3A3l3W1EvtKWh9n0aIhQO2+jskztJNP1E
VDz5nMFr3wgP+CgWac1hP62PbZZTqH9XSHrqU8Ss96NsXkmtVth1wd9Bq28KHyICf+gKOcYx8PFf
ySsNOI00ZCLV8+ndrLhrcb8pliUt0oNdsakov6hbyx64EZpwCfJnmnSxsg37k4INL7OB+sBq4pM2
u538byqKTuBFdlpDGkjffLVgelQidTraZNvH0a7uqIEtdFBwXmKknqWgjOAQPIMxwWdplgye2IoR
bAiLZur0KdNYWfnPNPxJpUfQnEyzX9TsM+pQ+kQIhtAE0t1CukIHQL6U3Dks1VmaSq/Y1yiuz6KT
bgNTHiC+g6UIMUms647vKgntDhHhxxY0Hfh3uRsVjgRaUttxcclO5426po5Z4a1JnTzkSalUaVAb
lVUT/49iIdzVANvA6tgCBwjMDYOwo6iTfVH6Spy0668bgcsW/gZB4c0CVNZxuNxa6UkcRNzqzeht
G1BrOzx41vHDd+zmTrdaF0gUJkcgyKlr5Ftg/wtVPTiUWAnQE+/YF7UAyNt6Z93n5yhP8h98pvUU
8c5tuM8/+ZtyNxkAa3nNHUjJXgDnurAuBpU4rtxN7s8sutdTdBck+BezrBkITOGc+g1KXy2unITC
Ter3F40uAF3w2IK2iiGKZqlZzQwSOSfgPyJbd3RadzvYfE1/nLq+ouU7JjqzbBCbaJRl1aXWe1jt
dzn+bZiIcC8WKwIJabygp/iY1OyGaPQdR6LxzX5ABREVGa0MMVYOt4q6xXLhwTTJb5UmOg+Wzicr
/ZvwvUhixAdkROEbTrvy0sT8WceaJIK/fSBG+2CYLUJWqPGB7l114hWl9C5o2aCDs/du51LKqet7
L5vXY+w6s4FosDkU+5QW4taFxOY6ds5rIjh5MG0McsbpCsbI+d6tS2m9RMclt9v4W/a0LaLx/bPv
oJQsv4DIyP5kJPOcaC+MH24qfu04/taGkt0Lwc5EJ2VFN5ulWJha4Y4AsfE71U311e6BTSBHaXKx
rQ4vTC4Sq8Nwd4DPmFMb6S6d/UYtjAkko4KYMSQ9Yiw5FFeBqm80EOwr0eIOHIH4Ct0xFlqd7qFA
lvjSUIsc1l7hJqNiDWBIkcReweL3J3tjfXokuEK1D2zCYPa9A14CBWAFWMW8KnbDuEks0Muc0Ktv
XUdsfG438DfgelXkuE1NW6VDnO2vV7scUWiIlfsRmhJz++NGVFv83o7v/rISMbIxnbEXN20POteH
9oKoQPlliocyBo3s3bfMBBEz73TmVjszwFEHdkmLyJkQ8QbRz1Jrw8iHBc3Q7N5zzyXhkw0ZXucf
88eJFv/bd6bxq6YxDjc2pvPL4V6Av3kVVwAD7R8WaNWQhSGzoGdqwl+F6jj7XsXq8q2AAV5+Nzz+
krYcxlW0UTbJIcN4RxjZzJAw6YCNWf8GQDOPxj4p8TteZOO+qtLN6MwXogVTsKRZU3Hp+k5NRuzM
1Sj8pfncM1rRv2KDlFxOAWR+ZLNpl10alsUsebmq1UCv49flquQfmN9AUPsrXRrMahX8KFUvcbCN
7TD94/qak28+A2XcAnVdJgJOdy6iLSgPNIqgNtiXjM0yGO9v5N0lBBrWp1/FxpKVoaxdOFi6tx/A
axVZ5hIZyCz9o9r9oye/CSA835gkp1ohulNeJrOAFgoBqs2U9YVyQh8P/NHXhlRXWffK3HEN8+B3
+R15NRh/lc4lPSXhIDH9JfzvR42M0i/jf89ILxAkMy8lIGszRSoYVBqdbdS407ON3+m8ljEqEmkP
gokQ69ZW9YxEs6QEYIPM7i2fKNL7s/lKsoOEv4CQma8l5fpx+Lx1d4Z68gPKL2bNDI5gN4cPyhYR
U5aOA0KdrtL1FDHcZqF7KLApWIAef82o5wCi/IBKXiyeKCK6JQbkGUNtQbdyEq610jelGEMFld1m
SLWT9rz7JAMCZIS77GewK4OHuOk12sHEh5UxIYZXc22zEcaP3t88kwLnMLnd1Xwjnlzu8Z3/OqA+
6dE6Mhv1ptzXpJdikMXHaAFp4rzl3ZXV8a1dimwW596iTTq6x0Z+cw7wbSLefeIWbneL8lJC906n
+uG6Y2/bTZql8z/rFJ7wlg9jhze5QuvwgkGjigXqJp/9FWsKkzf46HTOqZlHK4GHeRFHiHcBbH4d
yodQp8CNoLm3c9pak75cTud/JmKRE10H576XPV69uu7jT+YWtXnZQulgrMvkQoAVPGHgxEjNzcun
r68fE5V7fpGa4xo1I/w72uFFiVHE6UxOhMbPiP9Wuqnaz1wnZSbZZBINGO6N9i6tQJm238RjANIE
Noe+mg/A9xrkkcj75h4KbahED9AptxDgyR6Zz3razXZrklvBTTxE7QDmx0Guqb9n/fmZAiRHtSwy
jOW8OQ3URff6t2MOOsgSLrHPAYRF8fZlkXNVWUk4/t3yo1zG35HSMd7SID2HpNyprpuKTR04bYsN
eiFpNTrGUdPOKxysHJblb8JNJEJkBUKdfiMCGCeOf/sbmyOdawXt3sIVC/1WqZIaPTrkmL5zrrjY
aRwTemx/lMFZjD2iH4ugnRtfIkWBVOr1K9t/mVSYZ4wsFDGMY6kOhYw+YC2DOl0YRW3XzHUmKhaY
lHJYBR4PeWWfMdzKYyMbjGvjBTi8qhzqYG3vRpNxUuHa6B9ALAR0EH676RvVws8mQMNG6g9GEprh
Xtse23XuNcCqzsu2o83dbJZP1b/QGsCsqvSLJ/eyBQIlRJvBhBSLI166q7hR/zcxCIj6+h/b/xgf
7wNZviQMLtOAbgkT/SfAFeTClmq9/eiI0Zpr3CoJ8C4AS8ZHKIvN4bnFnKaFtKShXyJ8sfgREeeW
OXZfD1QZaH1Nf0VgIrl9C+GEM+BrVW/kpznCsueGp9xW6vM+7QzUgzum96rGO6Pn0Rl9gfJce4dP
/4PGhfYbzuq7bZZdPfg7Uvj9nEkPMTe1//Rtwi9yw+B7mvtyFu0Ce/+2CPuGQF3mjxqNPBZRYyP7
mH6fC7jRAB6g6QwSNJMGyqr1nNeCRZYHPsVRkemwA/5Z7uVrCvdsqjRANFaH7H/k10GgBpCJtY7K
jYxCkBSFFcFZQmpDIDBImaSmaByREHw0+dkh4CFA7EbXtg4PD4fxPFraOUg91Dv8Q8o9O6KcOBjb
FaQxX7H3b2mdZPqqfzDcTr1JSedA/7gaWrZYM4T75CBU62c9kgTOj1UxSdNodI+qe09hlmR9SXgM
MWOCH+dKr2FTlyN1sUcY+3LXkxYUt32VyHjvPzNs5Fqc+KjleMwqnsbCGTuv02ScZtduXBhShh1v
e8fHCMNZ+JQbnXVGQj8bwNUTQr8b/u55UQexPgNnlwnsrLQ1ZaVQD/w5uQfsyGF0QIJB87XUEPNY
xIiNUo0CtZYcO+OWWIQF35vP/7k8oWVn0amoXitGkVufku6v97Pz0j21hmM5IIMNns8um0Pwkl1y
Sw9z/Ae6q/xOI+NoHglgwkY0Y+c3vahHUs1aKAtFcACUPiGbTE9jl+m7QVgzQJRzScuDFE35UyRk
mJoFcwgxomSBisBhdbCY9agUHqGrZfeqiJeFtpn51EgP9YlxtpyFLMsjwpq3MH2TZEpFiOVKpv7a
91f4RnblPwJag4jR0iJSYdvR+1Kz4KmTdLDPYiFvSAbgMsEsbZIp9eNil1WeJtMdEgqzmrTBLjAx
+yeikGvv/6G21MN1uHJnE4NSV7paU5Kj1ueNPVJ8fA6NS5itPSDADwDI5oMQtb+9kkqmjtSVMccq
bEXTCyguN3rKa6W07zkKXTAvSFy8cwWrtw4kOLZuOk+7F+e1zr/vPgDQmz9gP8pUb8CZJDo5rkMc
Q0Q7S0N0jiWTA7K1Vyi8QkrSuQB/n5z7TPPAGwMB1uz5VKP67kt8r4/bwYJAgDM2ZVnt0dLX71tm
dwqlymBi0LKwHmjpBSvreRipfFrH4UWvYs4X+tGv4WHHqwvKiKOPL8zSfwxf7G9CA2EonF5RTmNx
b3XGuUDNeM79mrqinX5EF2AZ/bgtV4P27b3bUI17/Gn/U++U41TTNxF4RKB/3ppl7rQIlZaNFNyC
4e7GanbptHuuFlmvUbQjTm7JBy88LJhIC0y6MvV0EkkPUC8Lqf7qJnDbJs2ClUF3y1BCeax7ciiM
WU01Yfsd+vojG1A8rOqNQa5qhqYEyHpceLXAtpXevwCwV6c4tX+jHvqHGTapsO8t5lJ/3JpLApxl
BJabNM2NT+PSiQIu9EtBBZB7jIymzdDGTO1uwYsB+cqMXJfK5GlwadG6v/VIJ/tAcIQEWtSB6jVi
x2zQI5DRQXHGYvRevUnmz2eIaCWzLSHkUBBGaC5R5r+a/MPyW+ybPMV5fJ/lZ8h7xsFSzFPh/JgR
IXe5Vb1JTlW/rewMrcMalvj2noV7i2d4nBoIlaJQ1gJjD1yfd/RezR3Kl/mLANNANug+mqmGYB4u
ke/npNA6NqR0C6sBShBCEk+9rEIzkGu4Cit1CBSd5oiAn5fUXuj5LnwxLtroGqO1BFSzOOvsmmJE
IMN2U5bF76t/6a6jd/83xIbi4oLd2UnVyMVNc8E199WT35GklwQZPGW5UZZN2osXDyj7He7Eli1C
w/YOYlhmztgCkqBwId/G9Yd4/Cet3ous2uGrBDNFD8KKNTRunJoGJRpNRlP25xp4/wIU9HdgAqtT
Qbf9LachBnovXdm+9NC+8rDn/d/1hxOwiUCUfZgK1knJp2pE86Cy2oFSGoWevfeUcQ6vhNFgCccp
4VGsynhRfH+NPZex8+VsE59/1SbuV6O9RS7tEqX5aoJqsywNP7DUZXFkzEotDKD8FE+1RuCALpji
/M5fNoy7b9ujmZW6XNcGncqLRwrD5P14z/+Aw+DB0qlAwwpJtvRpB20+K8I73gm0V2A1zzvELKzp
EwpPMCKGTRxPmTMVqtWiN0UWQWUn0enmagpwwSuIPMR5pTfSAUWiYJwOiqQ4SIE+4GPfPXmRsNls
lcwvzdLR/cq7DlWqXbRKhV2Gq0clphnhySLVHUQ5eKw7pgAC9AJvJg5S1wWn66W6g88m6LFcFS8M
/wm3wTXLkw6ISTmFFEf5BY/OlZf1Xx23KgSr++j2cQ2aVBKlvP4ToKU+CsB6llE8maNshy3g1roP
Ue9Fi2DW6NCfOa8bftNPRC1AH05tuwFGs5jCO0R8vkTPGRb+teGLGE31aksX4hXuzZ8oJJs/pE7j
90T6/yIcfN7AIrW2+C4apCqHpTEAEK4FctexIF5+dEnh5Ioj2Skc8ZakeHNgWwOod3VBEq2Uy4sj
KK0p+itBYU/9I3OHaYdrDb+gkp0Jts1iMZc+7yFN3eHUxTj+B5u42wIJT8ZQku4U1usdIfgJbEwU
qLq/N1TobVMYOYgZ0Wr/cDfJyIv8C6JgCPQR54X15i60c7QJV/f7y2XzXcIlYuRwvsgo+o4iyfU5
2/gu3SocVVR8rF+7fvjX1pntvnjn/Vco/HBLGXhpChY14ybP04rNoyvAWBVetOoqxHHJ0qAnkwtA
SwY5XEI6EnN9wTzdeny71XEyySknEW3fp8zBHFRKAd77CKT0gTt9k8NEFAnzO+QpYr8XCKMXU2ll
j0BcvHEEuo4TMdlwtzxdmz4RBGiVai3qcn/RD06UUkHUkKC2e/JuG9wJ+jRKglDK/0o/5hRrTjYg
fEQxoZ4zDeXu95dUCFJvXygGlk024geayu8UVani0Vt6yVU5JP0MWdLDLuD7HGqX+QxryGD7c5Dc
K1s+8cD8UHW4e973t4G+/vVPXBl5G7RdYWbrs9u2m9MaxGrtMWpc9vS5xvdfDMcuomW2738ncVLL
DqPydkZrD10/2SOZzhNBrL4wFfpkNNh+ofzl1WS/8b6RF8TfKFKzKmG9uRApYA7e0c3iJAJ9XfWq
ZcJRCZs1ZPQ7fnhzfNGzIn3cVyIT3+n8u5+xSzRd8eVH9iaDkijdDHF4s0gStQPC1hpk3ltxqMML
AUw8TJFp6ut0453TlGoWE7jwPrsw4u5LmPmpNzlaroknpUEBZHq6D2rDPgfcLoYHmyXyf7tJxH+2
xwxCnV/xMdbrbdJYpHsFEHpOvdAn9B1BZR2is0lqo25lQ7BHWcN/9eto39ykW843irwseKy00Xkr
h3CQkTr8Q6i8tqHwcjvd6JzKaGO0y0OQtjTreMEttmKBQpmQAU7V/wqqnbw3VpdpFqlTsJsRdtwB
gx0HoA1ZR3S6FOqZ1XpjMmQKX0IPfFxzhDC8sQdZ09Wzv53bPkdTtSJ+aWwVVbxnd62wbSgP4WAj
/GRImb5qjm3EovzzddDqyrifyfHXAkvSOBz0htrzJt9Lt0I8S+Ks+q6yMK6qm5t3mjqH+sLGkNqs
vI7xkE01aHSFn5QBhcBReBHG9efDe7PiyrNlK4SdDcfcyogzlwnqrwz4qb/RmHx5jm8SN3/L5dua
ASka7tWIAp4CQO49XMxuOkEnEJm0M+BxqchJco+ZZtMNnN6qn7YQds4ghFiLJggR+tVo8ouIeXGh
2k9sIuWoXf1U+3CyAin7AXRQX35wGWSsFlS+JFWz0u2FegBo28k5Ow0/pvO2fa12pQykWFMYRvum
Igz7ih+4kceKDoyXw9JoMwzs1s5cqE6nuQI0TkC1UIlSi6i3VdRrqxykfAxMuknejCOVXXgOXmOl
4gJzuueyC5c0ZNGOFOFwnV86Zpi+Wis6ABR8SH6T+ybXwIg/xRhElExpvvOik+U7tP3Abza7t9NX
ksQmhMqSdM/XlKmdEQ5U0gcvf5g/7gO5KgRurQcszINOWy44Ur5hF7A9/jEU2c8R3ZOLJ9ovrBy3
pPXW0rcjrUmT5sl91NQ4arvdlVaWWRrix3dZdjR7uiAUXAy831sqtMmh7dQQbW4LUkZdqzPZmbIi
raRyNHClSPHoaCylV5wWYaltkFgzc0SHpnaHGHL2enKv7S51Z8yyj6bTR3KadT0ruzmfaN2Z+JmR
mwY9ZlrEJETEsXGnzVWkcdDGqDX5HA7iSRCt+La7n/2ejyf7YLgHQLWUOR/ECFbPhZ/UkfFSK+Xc
ngnkshCyHHSwlmF86Y9WYUWmLel4kuM+tGqBqeEU1Ltgzq0Zq6MdC6jopORex6a5lBtR1GvnViVE
r5qRbIglnnxwiqzTeFxuoJmql3RpqjwyZgDm4CtJ2vbs6p5YJM9AKHGJMp7Loh7GQoSV99rNMw7c
cmkcnmu1G9BxH8r1d6zHjQ2H3HQDsfTLW7k3xm3HtynzIboEtM8BzI0OZKPijYNiFRuojHsGUcZF
+GlPKMRTO997vxW9XioFyk0N6gm3v0jI6T5dV6xqlW8iJvB4LFvMStPQhiqbFf4vG5JYvEzRjBiP
meUkqBaUs51kssukZEKbybxabcQckkwGJCA0vEcud6EmFqR73pv2fxPBZ32iIPECDxxyIypmkr1P
ge9veUgQ4nAxf/1sjaOCdUugJZkit7nmuQSKnK6Ikj+ROnIpVzPoeW898On8eDMB3PEaZywkD8jK
ylaL88cl2wa8QNs7ltNZoG4UmY1lcQR1ncxAMPjxED+qve7QQcEhZnA2HDGq+vwARk4AhWTArpvK
WRGR2AO3rzYQAr7bdRqveMRi1z/Zj3tk565i5rkANfbnYXdMX5o/sywYkiHJTl375KNYtwhgV+bT
PkcI5KX15S85Qtt7mAtAd5sisxMSOKRr11Ak0IRkBQAnR1v1mEYGniKU270abVPSiBfTwlsXAtQf
V91odhs7Yvg8GmMepKLm6mXh05iJGOpqr5PxW1SHk6luJLSz//mbodmcYb+ifXHsnny69ObdqO/S
BZdfibXUvM1pvyXjUwnj9xpsxsbFf9UgvxOEMuoQFvTLHiTUaySoTEGPUteNTGkn6Q8tDzPrJdkY
M4ZPIQ83rPbBXMhKrz7Bl5wabqpM3GK8afKs8XYlrLtyXa1ISkv96WjbYennJbMO5CtuJ8zFhcv8
fNeVxLaIuyz2Nw1dSARiixPG64Ng9tPv16kGhlLCCLkx67SwfGHSb6h9afZM8DLn6/rJD0vrlx9B
/heEFF7dZQsXhBgqejWg5K50CAJA2FZKP6OaXMwl5NKOqlGCYsItxaZMY4D3bBbg1WJIs4xoyrif
y+2yAjmCmU9QIwAJZIjbVXaXGyTOqklx/8Bw8B2PhqixZG8S8e0JUDQwPe5rCUC2mPN2PJAKAWI6
sZXd0REljUqwAqzcbdnPo3SdTaUzxs/zBFmWFGNoEaZUvMFDDswuOm5+pVleTKat2W0aAGx2e2ku
CpfU2yMRIh860jgPGAe9ucqQnPG/V0qxHeZ9vCGhwZrmUAaWYMz9x1Oi0oblAEjitavrBgn7JhaX
0ASexFS0VTD3lHN3SeTLC5erC9f7VfMD07VhCgJQRWiehZ0c+RYQw5lT+aAZk+KqmkMK9GNZoC4K
iQYeC27jfk7tGmX5XNH6zj2FFjWdfXNBpwOnGfFK0cw5V8zJH2saOb5UKlqWEyf/iyQj8qXraPdN
Z99HrkqBkNio/Hkku7dAxRpeqWu8k8oTB5NjvfobZ3FhmNu1yrVWDTYIw7DatMzRfOovD6B0F+SS
Qv71BSye4fCZ2li0one0YyA1Hj/R0M08NlOlQIqQCVN+Zhtc1JAK3DJ8+KgE6FfaRhfGgtxEthw/
vsRJBPxT/yHNE3QIXwMurtGKMrYQzfg7pd9i8v3XbcaF3npfUtaFtUucjD/rmL4lrjDVdv7cXW1x
JA+AVUtaYUr4SPgpfSF+I2ecEoI1vmOrZz73byIa0wwiqZ7i2rlkKSHdJjiiDHccI+KS+/oP/nAp
1X5CwGg6TERGsjUmx8leQ0Y/A8XNVkmS3KDkfBDr5FFHLOSeLNRsj2VjXKlDYbJov79eog/TMJTO
swb4z+kEBP6Rq8HlTadJlvB47IXRiQsC7Zl4yP38DvPX+hk0wTR4ShiwHBvTvOLCHhpUKpOK3U0e
dLuQckYNaiP3pmSJiM6Q9RHXHCLfV2G9Jl+TscJN9WPqkQs8x9b04+vRKwTQZj7VBNaLQCoVigOr
bV9zRebMHC+q56AdtnX/KaM1zVrJ6rm2cTlVAqX08IWQCZD1GraeC/AQ5qhGxiRBtK4zydO7AiU5
RJVCL3vF6dfv10d4PaXGJJ0zJzN/KWAHMtptuZ0KPBMt41RqJ0OitWTP66KhLkHNN/2+BEBRnAVt
19iRQjXdqxbqdOnjpknmug5RlSEcbgxHnD2jvLhocKGo18yUHllWGM8OUiqv/INszaRU/i/dEX1A
q/7N27GI9F+G7M5+i2G8M9iGcHrO9zlyfj52LgE16Yg45B6ArflQQNoM/OXTxt5UqOSl+SY4AQZ1
uOlqc8tCf74kY2fguNueAhyYfWjzIhq7kpfL9hB2Umu4iAm5g+zXJa3ug0lu+17d9P0RXbuRdE+0
DtzyS5A8G/hACcW/coA2I29K25Czd2AN3scMlUbK2LIhXxw6tJUzc0kAGn97kMB3DcCEmDXwdOUk
OpAntI80Qxm8Mxw4flTNgblx2ok8J2GtTOeH60BWbw7B+vmMOyKUktdNKCvxSsmcK07dknkZ0lWH
JESoJv5i3ekeT1Pgpigp5vgA0kNflNkja+C86qOeFtpeN8o7tslHfaddEkPFAgx0L8u7CPWnmcq0
ff4Jm7kdUfVjkbWsRwFjj+WtAsOVn6eZDVMwL05P8mpq9ZSxJd+JwqU+jtTonRL3Xs5zplAjrwKK
/MHpovx1Biq23r8EBkTB9j7PNE533WG1tnwONsC8JLP0zzI0XZ9fYR+hQ1U6Qp6wi7hF/NCG2sId
6oM3LGQgjCtPtkVrd8v+J3d364UV2RO7a29eUAxE2HomMT+Cb1ZPmwO+K832jPjBiu8gyP86pBWU
NwnNye+k5+G1QEiYVZFOradmWbXe4iGOhc1AQEzxs6ihuqAsyqal2FbvVjWFYutysokxnm+aX8XU
1K1hUC200jMGv8SnMfAcyx8R57i5ldh0p8L0VgWDN3fkl2RKkh/nFrksVj5eqzY8ZvaDWZfenvlJ
lB7mpxa3aUkZBpK3Ut8yH8Im7HOGtqmixZPT2jkNVucThHkooLLpWQDigbt5NeZRsojzHFmqz0Vl
oRlKXQniUzf611eOu5f3PGQQGp+2zh+eCuq2RQc+QXkQgtA712bDRvdVQo+sEaT8n6iOL1NJQLW+
c4KIXxtIRn4OHAXV7y8zlVMmCUMhs0mcQoL4BhzGbHegsBgumT3U++l++ALmRoO7NovOTWl89Ia6
YsykQVtRdCLwBZcsNUXE6kiAFBn5ohcOfEqa9MIInZELKkqnIXG6xQzgULSGijWZk9dFXEtnF/OU
70nSuTrWJVCy/839HAOKYYkezYwANK2yLYCbMM3UJz5Rng+uvfPhH2PdIgaPI36GN+sek7rBAizw
9F4+W7Ep0NwRRpFny3ikRilf7v2ViDfAwYPLK5gkLbBKHzTBIIQFmcvReLol+tO95MSzSsK4Knm/
gmweAC4cC0bfrAAZrnXnfj5+X4nGpjqrSE+s8pHCv2yNZPo68xN1RF5WU+BHSDBQSmJ3o2LYopGG
AprbOMRGjJs3awUGw9UPzSVBmM6QX1OXDs5GL1OTCmRDvXlOiQO53YDfj/qdOXbu2faGP1R+4Slw
TD9LOfmi9WY8xz2ocSncomTWrisFUi7gBgtr1jvFJeeZn411OlsMedkFiBP9wyS/2Ce37oiM6GLF
hVUrbv7RXo7yOVxE4rohhrj57si8GZLJ1GpoW6yr7ySse2NpDYkxo1B8B9QppW8vGxuLI7QknQe0
8M64bft5hjtsH7FeOwFcDFgFkBZxUR5Gq89e4wVHtUAbkm2BUTYxsuv/ouvfBcSWVsY1ADJjyfAw
CnSmwG4PiUuYTvMeByfZliTGxNMFEzg+9eEX3LMdaLowItC1zxCEF5/S5eKBsRMBB4q7Ivb///OV
6O2Kc+4MKM/Sk+B2s2C0DJ5nA0kQrb2OzsifEZ1FL2GYjCqLQPUtM7S4KtGFCO800uy5WKgmFLJe
jRSjqp3Rgaszx+GfWklJNw8UMLQPzKCxI2MolppYJN8obW656hlv2jn8sRVl8Gov+s3Zkdfclgtp
rNH9M+jmFURCRotEQ0fGPcTicI4kDKmWk9SZYvXnMDQaJp77TXFB/W04mO3HIQBIpwNkGb9YRNJ3
U9Elt06cRZ2pVuDLUR7N1P7n8LfXIg0uZ6YPVaXc3xmsbIWVoocVDzW5em+ZL8BKuY/FqHBdGBkT
hIaL30ykyM4cnvUQFk+n1+qH8djnPdE+Pnu3TdRmMlS7YXus2S8gum/KwYa6R2urTsiDb3Kl9UVi
W0WXHkQAdUa6o+oJnNv1wKAHynrY3wKpAyP89lz2X02NWsAHrMErUv0yzdokbyZcYNPSm5T0b1AJ
oRMUVxcNKYYxfAdJPrpxacaAatscbE2ebCTPDpz5fD4cTtlkdKHym4JJCyXV+Bsr4uKGrYfMvrTK
U3oWm55GT0bgOBhCB1w++Mc/lV7uuoXw/IiUEDU2W0oeMrOyZ54Fb1gmZ9D7YNmvnDj/W7r6hp55
1CIDu+eQ1wtoP3C2XaRknVucStMud1oVF77MeV7j9iFq/Oui01cYOyuSJ6RQvwPIr0vm0vwcUNH8
a9qmQQq3iAAoR2RgMrDveXbOgEPFyTDNnML4ETKAgOo6TMlZiq3e2p95IbE+VYfh9ULqloOVe30z
Bm+pZI8eyhIU1cdZKH3JPvYInmVg9UotlvoFcS50oQmiTlbUstEkGus4cglW8T7UvLXlv70EtoRq
crMQ+DBe5edi9UgFFXHnLzAtdgxi3mfg+ZNwanIj31HyXxWS6exWq7bGb4d5Ls1mpqJD0P4dj7SW
4oyZd+LxOYfrvluutidFY3VNvo7zWiwSwga6cfw0AiL2LmMbTakW2Sluh0hBeyUcyNbGwnsYkki9
RJ67uDV17AJjKzRNVkgHWM7zFymEOSI5LndW3C/DNXSzrNmYatLhUNFD2C/owsqcjH8/o2R5+oRp
3bsaGVpElehzJ0AAB+Hrn0TjsIcI3pi9HtwAu5VgduOt32PaFoLjf73YdVtdExAWqdbtZ/jCH2k1
g+lgF0k0NRlatS7+VxGL5qhT/k8NJ659QRZZYvuF6wUC7s+rIixEHHjro6CBEhB/g7YaaqCHzcGj
BFHC0i/jtZYhYrUvLz6/wykHmQaa69kwlAFP7b462u0cT3wB282XgGtCHmKgL3Go/x2h+gVXANBO
31Gku8wv7OnL2OPDHqjo75Yz4jzuKbxwla9V5PbxiKsyv7W15Sj4iqDMadsyQa9nPpOwY6GRl1HN
3ogM0hNWguY6d9Zx1jU2ZT1paoxivlwId0xyc/66g55KBB7sQruR2mxdLnxwJP67mdPl+AqkGS99
3qNk8y2k/srCtURv4neON/ilQvUAOmVcZpnm5ev0Xyp+U/0rSPYSuiZaHePcWH0j+c0W+fLCR9CN
zpl7dNE+g53uPVK/KA0ZMSP0c8du39F27/eBgQBMm3mYnfQGtPPl+KY/xlqqD0O7gqb7JIcl61fd
nog/lKSE5XUBYTza07atyttXB2e1sJKpTGqi7yuZzuTQbUVAfoKzTX2BDBPyPZkXCebgPmChCSEt
ZhKIuio0Gp/UjaMVK8ATXUceza8vk0VD5S4rG+dsjWpZbimlDXGxOohZH/hxce+yBP9BvItpBVvz
wSh9KDh6+UopB5DgVMa+QxkYF+PmwcwhXzPIm9+egI8WROKyXjQpvt01TUZYe1w1sYPSLfE/SA7j
djIe9gl4O1pCIVGddrkav7ZL5z+WQQy7yHWW60Gtcphw90i1T9YPuJ1A6jhYJx4U1mcJrEicC7HP
24SCBCprPTefTmSAd/5UoLrd9ify/taYR5Ok/+wcXhBMilc3gaD6ui2vHoQ0nXMFf4i5CchCpxjT
EVswtsHwbFRybC/x5UANb4zm2G6ahOm+43nhphE9RRr4gUV/lJTsIVHou8OFd9T5NKnTc9KQE4TR
3vPC785V8LGwZtTvrnfZS2tU0+cX03jBytmF8fg5PR+RFxERNpOZ808jyyNR7XkPVHKl1BtUGi32
ze3DhyEk0ZatGPXL2KZMSECe/WNMS8scRMJGtQaLO8gRNlsu4wKromnnGhRoLOwumi+2EN1L9kj0
0fgiLb3oLbX8HNBkIRFB9+koX4yzxe4JnMw0YRTgNNjiKUrCcbm/y5ETRTI9ZRuViVg2cko2U1I9
cJSY0UH3F0JLV95lzdffOeuTx6Khf3iAxdq8HzlIqqB+R3dGIZtXOiPtEyqxVPvo9dhgBaxmGiNr
VCyekFRzXHfpxe2+K2NNOjCMDOpdTNH1LcU5hvN6uDqyL2D2wuuVXvU/Osc/2ajqWnKqJAeK7MCE
FzMUf6F/WgeUGnEJd8Om9oyqn1qnEFjL8K69KLzRCiC2ulvqM6gQ9jBomrm66r6Gz+zFVhZ2cJtj
hCylr5fakKAU0gS9YmPTKWfrBELVdjY/zlwg2dvK1BP/Y8idhIXNuaGSRYm43r8Lr2ujmAM5f//W
UuWGxFuwUa8PIXHHQFCu7lA7BITj2BA6hZTh8oZfiGSsAZ8a3yiDpsVidtu+KQjRF7Au6NCuqLTC
U5cAC9FTwOqOFCsm2Ex6mThiEPpkL+BuMeyPm2jhCjiM7QzILuHX6A2inYT+VhwOnajCbOLTntM8
F719cqi1E8vnrfzV/FLQjUH1YAbeNljJppalYoDkbLam+zdSMJhk44OQ16Mi3YOVBMovDq9ar2jL
grj7PNYF8EQ97z7kuODWIrLodxMMGdap37O/R+xWDCwl9svze5gog9kTJFW033qNYubQVjEpHFTr
e9stXDg6GzUCwHM2yompWx66ihUd5XAEF/tSZ1ybHcx+rntKkmy+kc15InBAMYFpKJNanaNjr2DA
mO5feLrOZ3hOtVu+Ey8M+OMeRZ6rD0uxo53m9Mod+2nzxl4rjidJscrbgIzUUBLbBDnYg1ZvCJSm
lNmLWgIvlXV4PPC2f5dSLqM/rgjJ7/LyNSGxsOlcjD6cHsfb4KwHxz0U67ZBwbjUKMNbZHWtCZaV
fnpSDr/oo5x3hRWlWzNmvCDQ6juJdb2dLsqDGFHgaB/cF65DvcSINMMZymQTvSOj8AijGCnZDGjd
H4M0GG/cXC1PvJ50wlSv4cMEETXthYToDco/7wrPt6Ot8rneYiMgVvFdzVJp6aAoHrjuTN/347zT
Ah5Xbciu/gW9563ZmpcZeobxc/Mwhz86zuxaDKtOyhgyPT+QiJb0gJ3pEhTzSoJBPqcnP5Gv7aTG
AjQSYwol3lB6ADp5N5p0GKrMtDY/T97F5wul75Op9CTceEUG55GGwAcLnEfFrgXqKtBCyNraZG41
h8y6ARusdhqSdH7XG12ho4i1iF6Zy0Bxk+uUFXsvFKoyNWdDtCvvSVpEywt78T0ItRa9myIkV4bv
eNLiiDvG0QLnEwboMD9QYeQ8/QPYNoc4rWwMHYDizv2E7dX1PDiDbSa4etfdGR7raKUzxxTFlrJY
b8wb8OIFC8pM5grTXQIBHmIaUPI2j37NSt2BqHK5APRFgUjv+T5TSR3HJ2YXKWVI+B6sKLEcWRO0
HbD4Au7gTD/lq6EbricPuF4mduYXWpmgxZ4DUOxmSfE5ypqdhM4eJkuVJVJpMVatHWtf6Vcwrk+t
f2hJkaZ6UxgJW5otbxmWwIYx8qIGbn828ENDYYGTMMG4Tb5rPuOsQ0UI4e4pfrgQ90bttnB39tJg
aq7gB6D6FJ+v6ZvpW48PSRCQ53yxwjXg5T6ywKtqFcscLKazHu3Dz4QwkyfUCBdcNdfjivPzHj6F
Z21B0MJ5FUSV97fCQyGK/Xk9Z2EfK2+PRRw/uBBZICAw0pdZUqWvg7oeQdgJUWVqNd/xTgHo66KD
zjrsadctb6GTX5AsgJ3zPljqUDqeiaOZmbvL7oAeYDz1nz+yv1rrz/Tv7iKdCsNDFpBIrq316lEr
4PJm5kJ4iEOLOG7WxnatQFXeohApEUC2XtPaP9qeF2HOeq0lOarbA0shKmvbLucf/j8Ey8imLxvb
lQrkLapys+/BPSrpRu1Ke8v5BsXUePzU03lz7LzxyRZN9ft3CKKl/D8/8EoVPNscv6zIad9uU3jF
z80rYghJPv6Lb75XLhvnd/+zb/kbBzWXBW2UfecGVWgvzbk328rbDPPGzWDlPu/cu2J78Z8Om8Y6
wGSXpONDwnctg/IkB3ZLMVt5iJga5egFkrByiDQx/i4+y7rzrnO4QyLjp2cVzqaZ15B26knvwR66
uw9DAJlvSYH6Tk9W7TKgzdjdvWHnA0xzbwQGmLtyfIZV22Ruq6FYeUerKUZpVfJVS60ksbkg6MTF
uCZIThRRrfK9R7Lfask+nAjlWJerZMI+wLtrP/xu68KpUSSm1hcrxljLH2NRfC5gcSm1QmtOBode
F5tZDr2w0rq/9eva0pK/3s5OG1ex+J71tR/liknMYXu7RePKFW7qJs6eRr6JgIZHesfOYQhNtkbk
db2Y9rj2IPtDaE+RMhsA6QPY7ph9njPMVv0pzm/qOc/hKZhqEs2zs6vKhJul4/4rCFKOx5NU+B2d
pgB9VzcPUwasAG47J/lnz68zA1SoemwfTsbxHb5OUqCCIuP1RNn9wbEHSBUe46f3Yi5vQcXhBEDK
roXMMxz9OgJp9uHVTJwqL8p6QkJrfbcgej+cC+qNYbEISvrcojFroxPeWtzzo7fIPZYMlxT3csZx
2zaZ67FjO7OWxtN4flra5bFnhr4XXdozSvPHw5I/XnVIGCHgHaqGpLc/7+Cx4N0POt6+8tAa318t
CezTnEQDYrD8TubrfCDfNmMqxWNlLDcCwIPsuRj1wwtlbkiHrcyhlwMuE7rpGTss01SJZxDVIhOI
lzYC4ldlT//83weJYc1N6V1Iq3ypkQVRXKe7ORAgvgvV9skYiXQRzJEX1yJRiExcPRGaEY6TW5XH
Te+j2x2M0uNrYFAWlWSqJMu7UW5H2mKXxkKqhQVwP2ROWS0Vm27/2Z2JwwgLZEWCLLgHnDtSALmv
EaTLEtQPFiP1w0FHs2mVraBTneTYeFybu/Aw2tGdHUDj7xlDez89lksUUOat1Z+Xrot7KoHAL6R4
wGRmSxGDGXbNQc00vaJg03o6q5E02v9xu93QR/tM49fapjSQmsouqjo/7V3hUUG+lMpcY++W9rAX
Qfx2fRgUGuZBRdbsaTd72mI9hV7N551oN4Ro5zER+bBIsGPohZOQZ0hEMjVNx8lCmdWcNIBMzHo/
aWCzAq0FP4iffA05IS23KFT/cAmxxz714DUcHvc+I6ZYvg/sxXvC7fRGyhczqVpQyLHVq5pf1DW1
bpLZFHxwYGmdju0ptSY8ycNeUDQEhpy3N09+G0B9WW14suCuAYQ35ZZHVIdYIR+DU/9w82nCpHEc
4vxAk3DObdf/YkHSS8/xEcR8SBy/dmMZUWOpNjnngfmJzO5svrV3vYfcoaK8en0g326G6hbo1zW4
kwt5X2UyHmaYs+b08bVEy4B2SKBuzCDsdc/E6yhfiTvXJu2lyqhrNIe0R9oWlLRpjqqBxSp2+HDB
pifL4evwcxUskEU3fsfIwMi3iIKxv6ejIBxuVIcRy1po/i54gynOtCqpIzW3/Xaz2lz0vI06UhLc
7cxBEfkl14faD+WWCmO4epByn4fXnlNqxBIKafDWwH/kmSzVBYdMhP4NiV1LdB68qh9of5fxokUp
o0fiK/7QMV+eqkI85yv5pBX2UF4UZBxFWxZm9fOdrU9yvz+ihaqqbRExync589Xv3j0F3Z1eH4nU
ZOkMDhOMv8i1U+lhqeQ1x3StmD8MFcj4dTCkBd3Uu8VvHfIFSuonrX4/rNCILjS3jil6mr24GOae
KzLmOtx66YE4hsijic7z71NpseRtfVBiZ5xJTwv3HGrB1JSgIcSD3HkKv3YXgga5WJBDt5U6DjS9
MEBYQcrfgiQmJBuscxLfIJqEZ7HSCqnceeSMxdz9GR1rr3ozaQiR+g66Xt6+RI07ezLlaeQRljQH
KEl71Cdu2TBfpaWove61u+wa6UqtnM/n2X7SpRfynX8f4NnohCwKF0yXE4pea5oHM3Zu/7ySFGjy
kS82zfakK0HPRGKO3AZa0tdQK3krxFcbPY7aGsC6ryLIXx9nbWdAA6OfgnHdISn/uhV/Ja5qnDe7
adhCDgzjyHW8td/3Q1KDxvLKYgTxzN43mpK6V3tGfDTGJU8yOWHbJxTllju/uADHrnrZ72euWXrn
VbOe92KL42hqme6lJEdAnWCJg8diIaouk/bd51vuyfd5bS3rY8yGmFGM4TH1dQ31g/IP3Qw/5wQJ
OJMbGCIKPHn5xEcgTCBlxPC18O9L0fR8YbqIyFNyx6cuii8ScgcxCUxoqmLZlUeb31V9L97GFkcT
wdFQPpsKVe497twJKvGm0ELVN+kIy11bUFufKrKCLRdvW1F/6AZOHDQ4HU0VFXRqNK8b9SlCWFQM
itK/PNzOvONex4lxX2iyxglu01c2A5ZY1MwmWUDHoAC3Fk+gl0eDlRx327rpm/1u+qEVleJGFt9p
BIuEDqve52v3B9IXSU+9JdRXayEJ3wYLUXIGfrCNoNq/E3MNnwVAr18pfnLYr2mbLJ+1evIJEeUM
9jv6SwZcSBGMymgWkuOdrkBU9tidWrMmO5ks0lXAiGdGS/q0EolfBb8JKtRGC2kLA2H5MLTL1F64
Axi9ckWufwaAQObYoEE21TlQwCC9y8SIluzdz43KSLg4Uj7Ody+BfKNub2yuqTSAcAlMAbY2yv0z
UE+XUZgxO5df3i0eW18G/f+rxVB92/M5Yen1EG7nHZnOT5AlmeelMJWnEg0h1QaXJ4iNZBN3duEG
Pge3CHWPtbujI6jcgWLG7/8YhwJshh7ETK7Ia9rLku7vEl540HUMgixqXrJfI7H3z7g7X5H85Z9O
SZ+dLSuuuI7QYbAgpKRxRHdIBy4QeaECPOjbrPAJM7iGDzGcrDojKlpLBSbXxG36m55c3m+viq1t
8+bhN9fIj8Ct1Q6baklbyOzkZ4XwzWPUjqstjgTw/lE5UzPfwZKzX2HTXFjSv3WpMaG4xBe6rYgW
Ycc3YzAOgPkC3CbWTOsxQDqt0RHp34SKZEtRuFL9pi5yY5ZG16E+3swsyJmJp2/dFYtZl3Ogiyf/
kiNRjj6k+DuQ7yd1cx3YgGy+dePHojqkU1I2Ms5hoxoellXxPjpjnCl+LEFWbwnaMNRYH1//jzV6
WgRJuIAdUIvL13Hi96ssB9TBc/eyIRkLlohQlJJtbQkX19g3k2AbKvQQETNoGW9xol/3F2o/S9qk
am1+PIcRhZI3A//qUmEKQzjgfywHdpERv5ehMYJN4ljDJ2sak92WFz3bZUe3ok+/yYaInu9ZcUbw
2JHr536m3/jD2mizZO1gLuTQ4ewgcDqvFgARhrLylH0pZydF6mA1RImjziy5HLVW6sRbbxvtuks6
Cc1ivWfjjtYkJ4kEp7D4ZlCjq2aN3p+2LNIKqhPh8wXMqpqmi+lgQgvQwC6tSh6jNt1w3zopg5AV
8yQAuuF8BqLj9NcaXY8C2MuMo+b1xy1Lf6k32V6WdpUvPwfLLDjVdCTaHY1Sdite9SJHz4FKCe27
Tdg98/yNE/55RY9OO0aaCzlbXFy5PpoqI2qSh7pXOpMPVJMqzuQ4ToV+UVX4cJwAUgxfzu6CT7M8
UdZUJrMIHMzOnoQjaovg035/pi8FAqsJoNXzAnRT5wLniPSpHU6v0Fn+2BoAK3jR3Peyb7H8lI//
dgL8ahV/IpGeOu3FHrxudDOJWfH9F5UASZLgqu7pa4+pY1l4oRf9yqXl8LGAMxDd55gieoGw58hI
YZ9FuSgcJaEif5KNR949hJi2/OnrObC/aSV/6dAwm0Nuxa1GY5NpvYyV5jnnuuzIOZOBugdnwkdK
OiACzpkNzLM8bddW1Cm/zcUnKJDooSvO1K1J2QEWinjd/1LH13wAGmopeJI0aK/7hfwhuDR3+cN5
VxyowmKxHPBq6bs5WfJSog3EBIoOmF0tkHuml4ELNNDPjTSSWgxXUylKEgN8XnZjhUZBAgQdQgXV
OO5O7KHDsy3QZBhDzIcnBuMTT/+SvMAhZptuY5lDtCHwASeXuOZgMX7pqUt9UamqWRqtn3kTC2/Y
kj57sKHOg+PhqcXW0lF66HtZ6mHuagzm3G8JWom2xFNQhizu1lc4Wfw0VtXa8knQoOmqibVrvtY1
oQbPrD538T6wclDpF80Q5OzNndPFdXLblvazwKmWQsIsBzH0ahbGKBC/68ZDyYYcB3xi3GJSrW8/
nklnge3kZ9l8tIWSkQBQgEcO6gnz+1/A3KazOQirZDyXnlBTH3bszG9Cx7wek6KqNawlYhcSk+N9
FrKhsq0plTdB/mUGW6xB3fqkOdLX31NUtqvEtw88N6uhrzxFPTvrApb/9qg4bKJ7cKQnpMHeZgXq
TIbybKKGGQvt+rt1yOS+SncOr6Q5L69Org3oYxkRcG466dJiCH0kZYMsuvgh3OncLWRgqzTf2z3/
0s5XKk7mLc29Z0WCIZrY1QgQvJEF9tyvF3q6ZhO+xR/j3eBfNNAM4AKBEaYXAtSexW/KvbOpD4Xi
ZiBVJSCu/JLZDW0iE2s/7i47Mm/xJMlAARAO3tPO+l8nbImt0R581LmoFbAiTGSHDjsd3ZEVpnm1
7fOlTpTxUaNShrNcAMCds7sML0LZ2IC1ZfXf8aIbNBaMsqiT81k3gUn8vVrlStMh1CmMdpetWw6w
RKHJLsJiFdtB+pn/CrV11oA79IFDFO60IHtWtKthAYPTM4f68kOx5w7jmK36zhy92sPVVWDS6FWM
k+NU6Ykng+Du8myNnmRbqacL4RqmZXWVnqNZ1EM2ws7tk6LSONxINYoQwL9yXDCxC4klR3+IaI5W
DOSC2MGKhT0SOHnxzKJvdq+AHOzunI3S3Qyl5WmrQ803Lxyo0jRKY4VaNGC07GZh03OecibesBpP
ouzQ3tNKYpRZmJfyn6DbY79RrjTwAN2HpfWTkULarqFGdp4Tf9JgnqWA9CoP0Qx/gI+DUHdcr7Zp
RUmb+0W3CnKzXO/3YppqqlpeU4QF3e1Jl40NmqSpFwBdTA++uXYvM1PYWHpBAZoJ3ilhRVqJCj0r
3BQxQDATd5omcPxdhjXkmRzdy36MAAZVN/SeYj0OwVTzGSC+DEP+x0ORu5Hs+PsZTmRuDsgzMy1G
pdnd84TWrwEvOtvBXtcFkB/Xk3jeLMM+xwvho9xuw8OL/uzeWXAE+kwiLO4X7VbHj2x8C7TKlk+k
YXsc9Fb7trhUjOPA05cFjNMlda+at+GUpGNoJtk5LrM690V49RfcaeOsinlzve1AubF/oDqIL35H
+c9KO57m8LrhpVM1ZHXVEOQ9eCzEinp1ydyr17O6wSoE5OxL/5/4siQ/ztdMxLfLSxE68IZwUJ9S
DeiU+krYBtx/kNZ/E/AdQQfqFcAP00AOpKSXzX8uqypy9g5j7i3TTvG6klb2rih+Lg8Bz4OdlHWN
QIaY7s2fNa4mNmpypvUb5jATeqZ3wG4fxUvIp9EqK7HUc3CjVceQ4jdW8zdtbje7EB+D/qPoX+u+
Ta/4JyckIsMqQH69KEMlTxTiGLge0olfWqAvPvnTI1+yEodzqa5ngrCO7M461iX157JrqlUURnYw
UEYmbcZ3e6Xa5qHfKPG2272JroDms4DJA7kAxBh94adJAVKlJJ7RzBrBccV/gMq8+QacEOmU7AH2
s7JjMIN+WWhpUfdp4ecb7xH72r4RoF47RU0SAuEZ0wURrijB4cnbMDaqgwJDFsGHtkg4668Nwd5V
LOhoH1RzCpcdA2JcdTuisDdZZ0jBlctaWeSbXcSyRQ95zfnrb62EUZq0PMNdaFmkXGdf4HeKniXv
5y6vVk+LzPuX9FtbNVBLdB8CeTGrsc7/jKeixc6Ay3FOW9eBV2XTuM18x6r0EN7a4XyNWJF0H/N5
9Nz3NUtJ87gHSnE62L4rbiCw3atGdZjCEd7ld4GVg0ZE/ZpYkgbg5v6hKOK45jV1Uvno4L5EMhm3
hcdrfvAsTiCRMd/cVK/V48P0sYDXV6a+Ms/W9IXrljU37IDxTgvhJmhf9nXFs2Xve7VowzM1IM5U
fZc9he88+tS2jKxzcMj3qlmZRP3kdbQC7fy/Vk+V/6tS6L66QlEhjE8SKU7rS1Y775re26l5UeZ3
zx+nsgox5KcKE+M9el5wU2pn3TKR167QXXg6FeNrMAOzlYA3JBKZLOPwgVatk5ZPxLaWvm0CfvDi
r9YwEtjOvT+QV724bU4WpdIIOEgd+Yp2mPyZLeHuXi8LbYUVapcyshiUFiSPtnF9AHIqhT8obBoC
l7rS1Pvl2hCBnvI/IT4CgcX6Qf14bVeEXWnc0Yn/nCDeWxqYzQ9+eeCx5zl1uHkdmPJgDxZ4v3F2
Wa81XnnkLmHzDUxEGtNjakjR5uXlt7Ag2q+69NGQJM45X8Vy7fvLFR49VJ4rvb8Kgm+YbVAig3dJ
bqap5VVyMm+csGk0x+sKvTTlMJ6Ya2yhBQel9cZAbSJ5Zu9fjuYI/JTEX0phV1zcTZnEVa1LxTc4
tBtUV1AG6LoimlKp23oR+bz/VeSloV+BbFpO+rCIbS7Vrt+QBkoFfFPhupmACYrjCO1eU2UgayeV
glzY78z5L9+E1mhjyNfUmY95tfFipwjlOBYo3FBx9zZIoRd4RMB9t3nBg1r4u+udscDH++g560OZ
slxIo3KTyZeJSbx1aKypWMPQdX3Buiv3dUZsqqBSv7kcVMFVzAEf4+K6nIfKS1+Av2DvizqP0C3i
Dhe9VqFXG8CxuWwGXksbeXEDQXfF7aSO/V6WueC+d6lAkQ30fjNVoeHaP3GtgiIPjEJGVSlZaaK6
YAm+5ijzIvF3NCJeyfXJKM0G+0TP9jBDwc+oVJhAeTylYCXuLIeKwAXuM+t8VZNg48/HsaVdUJWb
WlE5PWTJa07fyI+apu/xCWjZ3S2PyFMo5FZa48mBdkWrZ4dR1TW5X3eupywaIyrLkyes8PJniy6K
VW+0t9PKhGE3knMzM8AUkzVUDiHz8MjZ25PVHbIkUCJMerwCYx0Gl9TfbimBQoEjbg8bDzgKiuti
iC0gDl5ZIUD80YXg1CT59n2p7qdybjUDHSnzwJiwcGPRTgivuDydbbKuNy1aIKXeCpUj1zKU53Z+
4DSrd97NXodi4pZthC/ZTZLj1Q5QvWx1L/sNdnCS3yDvIwVM03wSRjCcxqTdemegIBFxHwHRirhV
MQMsuGFFj+o8KEhy1ZGGUvsgWfVNXgn9uo9HigyVlAYpvzPT5+nXEvnfQ3dMqAYu4iKFmcest1wh
N77OF1WzJXvUzOTJovABCmU+/NdQ6UozWggtSnkdWoZny8f5o0Rc8qGl45qlmXg0a/Q0wOK8yWeL
JPNvVkwmT7kW5tKzlNwCDd2rP6KACxsv+56U96iluEFBCP9LdDIbLDi8SkYDQbvclxt/GqXuF5aI
ftQbJphdWXSkQnErkjnP6VOnhGCRk4P17r41yNx7Mtu1fpDhAT8vI9dYL/XE56fKJHF2d4o4suwV
XTKDx5uvSAZrNW2Rj1qqtlasH1mYcDlNjH27HPIksmaWfbzSGSCS9RvPw2BIgRd/iC+Xn84/wywk
pF/dwGOxkWBk3qw92aACb547X8An3UTIV7qTLMDiBekdCJgK6d20dPLB50pnOkPJAHZGhM6ck86L
eIasUEUJv+1kqqM36XUtYMw0I1ITDN3Qexse2M97W3MPcWw87fdSctA/DptJbXuO3ZI+lHT5kdF8
kGWl86BdqHpw643bh4Q4xjwzIDngtslabbviH2cDg1iFG+T8k5xxvg/Ul70YFK9aT+SO0MXWOeCl
qC+sG/foRnS0CeiiZLjO/QutrBH3FJOBIbFRpSZRIUFDcJ/VntpjoeSLZQiurd3VUdiLuzssD9Ez
D/W1lbN9O87UyHXklbcCUtUDAamJMEMBNg6+CJkVxT9zWruwxrZNVAi1mWxUkd9AittlPrYb69wK
KgLpuLsgLtLDIZL/w76fL+3I53XftvzwcCuCxBKzu1Q/Qrpv8KXuSkEkxXaGjOTeceIc1S1hQqKK
Jn1qZ4rGJgpNzfrhfWyFmuF/6kq5LFk/0N9atmvNOYUD6hpjCvoSvX5cGQduQlnNR9UtnJQg4/Ym
Ru2WhgpaoW6EpXFeQTpBaohJ0V29iREcy22OQhoUW+wP/CSkPXkrOwAOHhD9bGnSwa40vTv7d6P9
DpK/ihNyYzckgiXenyqMIoKUGhMGEJnO8pk/i/HXJrvJKrPrh6WtBBcCe/dfsb6T31Of5sIspnpA
DmAbbEmP+aCBhu2mtZdPXrfBC3Lw09LquHzIk83dwFBJS14Ra3GjqKmhDPXt/IbjmFeSEki+12Nv
Jk+r6igdk0S5D9t4OG+NbCDvDTfcfQS8njjFGaDkHsuKlEezGIkgSz14ggKr6tMWZcwbnTQ1MFfG
9sW7MHC0EmoBYnvO6+krGAFxwfjeSeCPN+fyuau1VFjQqYLT68jf6TSmxGQe8EKYh70chlJWNB50
xXRbkRGmIaRj5fakS5xArjHGuVg5AhP4d4ZgC9bwscbis1/ghtz9gzhE1QfvdQf/0x2y+770xksa
eUZtDY7IJy/Ny+K9slatmNLSEJgVlJv9K4jsLjgNirq0Q8nZ6/sDgXjzzLHqL2WtgPYsPSxsW+nx
6bnK9xlJ4+23f9A5gXcM7Gz56s4jc/Ko1p1gY6Zm0eSWcJXOHFb+JPCxw5Jh+rohoqsxpIkgg1L4
sXyNW9Gysj8up8FJGTnPJiC/I0Ry7Xi/Ae0g1dbtaQcKVLsf9W/N2bTwELqhxk2vBBbnB3Ec8v+E
yszU4R0F2kVQwdxALRMlLKbGkSewyyZ2YtlLyugEwhB+UaHj6gfDN0L1Jisl0OlozCD5MxBXtz4f
EyghDuH+/G/Quo/5JJlQxFz/ZMgpm/5Arv8INDkKfqnicNs485/TmY4TJ3gZIya79yEd5UoKRU5s
abuZbdvsFj8w+ofLO576R2y9QDJCBecajDrCWg4BnO7q/8FpKj8gomB3uEgOm/XOlN3FnrEhoXT4
s1877g4X6GG8XYZUuaMHNB3x0o4kMFhohwaA0Crt1s7CgGHHD8H1/8lW14//HOgGqEJjmHz9K6xw
89bS/GIegh/6um5zXk2ZVOO8rqd9UgkaJdc14uQ49XuEeg6APArJIUVJF/SJAHNvI2/x97r5ZPQj
pqratxX1Q+gUlsnJEZ3nEUPEfcpSKV6J9B0v7GUQh1JcQPuQB3g8qP/H7UI5Ivw097pSCD26Mmwk
SJ0U7bPA4Vn72nkIDtfcAVA2cF1Qmn20qTVZoO9t0xL+YlGfVdaJBX8ISwEJT986BTETS2jYOd32
8Sl5yYJvzWEMUdT3RGx8NuXOzrXJVbLQTnEk0cl7rwTxbPmbI5cpVv/aP50p5xgxWBCA4NXWP+W/
UxnrgGRdvC+xlLxjjz44cgWExEhxVHyv49OCfTjxpgKR3eD7sjZSkoyksWPp2Ysnx41iUcBFVojl
obDtXqj4xKwARBMmGXeRUYjfsgAowV1MoYqI8tr8WVdzn4P68yDBZUsI4E8ZumpTaHOn+D47i+W2
NPHnDui7Emk6zktmIE/LX0/XvuHLhWdFSCiMO62ftzVXJJbuX4ZBTEbhSvd5xmRlRwCMpRd1KFVT
QaR+esPVIbS40vC5Wwn3t/9mScG668sU0FlT0dazLhb4AlwAmj0qwfS8LqBu2XnaIwd0w6TXLxVh
22cI7iDwnPBG+0htmv4ZICTPdGvk9UyN6G0rnaV+wCbjjPx+t3qjpUt+cOs/9kfTdzuIv+4biWLX
2kgybKnGgGF1Ngtgl0KT1KMcb0YtnN13wriM0H7ZrGWzXwzWWqTwl3QntAEKnPKOjKt2rOYmSOtA
J9qGJXDmrZqRxaixUIJtTlihWOZ8msEsadJhBCR3uF1XC/6duTGodgeOdvTr6+UbDxYp3NMBCIBG
p0UIUJo9ItjQwaL97jz0K0iHLn++/UiU1bd7LYKzJPFICZ8uW3yesQ/CHoLzBeHQ9tp6M+yQbQg2
sQs0Kzb3mdSOXJX97Trtx0aIeXVGmDeH3HM9rqSJr0z9CrAMsZhn4H2/IkhQ7G732EnX/k8cGbld
Is0w/zINS/SXXpB9MDfEjBjS2EHkoObUGRMlCGAKhWLGp+A1z/gGiN4lf6Ap5NjIbLNFKEJle//6
APGOrL9tmVcCTa2fxtEBnyZC47SuHfcAfwHeGQf02rLZo4X4a+qBoCihmd9dGRist9cayjo3Vpv5
2q3aNMTYcGiRV5QkOx5klWhqwfGv9I10ggW+5vdyL3eIfyue48osTGa8oMlePJuaS36d9Ah/UITj
lJZuRUoWr0/boUw/H2BddR7JQ7yNDjGNhkqUJnQ4cIk1vfeSYn4rb35q230BoCYocQdBd6dW+JGi
9L9AHFhMwNGKhR/46DlpV21N1Yx4hnX+/0bJkHBhFqHd3W51qsHebqzuPYnM/Y4kQwO06ADmFC1S
a2wFzKePiEGy/BlvWH2n7qUQv6dR0nGmAkaspBI0++NXwCcS7gCZtnM6Uatq2z7D3L6F0Ypahkzz
WW/jH9neILQDOuAVmDQLW56jmPHC7XXlWYZUEtg0okR7DhcrrBBKORvmu1HEcKlTgqTFhaEthEmV
zSJDzpIoMJ4XJyX/eQMgboqLYJNA56GCKajbqR/EEQCLsY3leOI36+CmWcT3cWdBzXGL7JqzwIog
Zg3rC4k0xoGLRxB0W4g2D0xciHOhBbxsT70b3l6MFEa0v8YuUO9Jymi564Vt8siOysd80ls5CJ5U
ptGsh6P0VaK51Y5KH/AF3VBSFVzdEybLd3aHYI/0JJqMK2nki1Uc9Oko+ickhJpnx8wDhno2IVIW
1P40t/ibBNsVRNqsbegswySu1vgrZcbZYbS7GUzVMHb7aU4J5G/h05qSa71vLYVuoT+daORPFbl/
fc+1eAhujRcDRb//Lhr9orekXWBM8iDenClF76beG+J2Qxhf68yADADkPIzownoTMTxBp/Bnovvt
YeRIHdi4K21YQ6aBkzu7E6heCtKLXJw5pK0UgqRj8M1c/S0DflAV3o/n/AIjoJpITLn7KtUi4uWR
1sEquUqwqVtN4SP9yi9Chrc00TA7wAZev6Y6SGChezDI4NtX+37ZGhBq5FVgfLeduuoXkpfAcMS3
Yiy2qXtd6ZoQ0u2AsIArketfeIcMO3jdtBAOi8s76HpvBC6sAeTC/HzALBw2fsqzQooWFel2uXJV
OYb2JIzk7on7ezLVL4AqUzAo9EduKj4WmBkkYpaD2ppWEjXU1A1V8n3Rvkx2T/+mp0K8fluQtbjD
Zew/DySKS9BZmKGQCbFvD8vZuDP0D3G+lrdPlP9fushMtOG8XUVSTKMu/3ZVRkWq4DM09hrD3S9s
YAyyBBUJVPqsrC/5RvdJUaJVJJVfvIQu5Apj+xle4eGcFwh+RDB05cYkdmwb5jro9GKplFnugD6x
xNUa9HnzckPCbMGs+I/wITon2k82zoyNrG/5iE1kCnWVXjD6XrweT9sA/8uSQXZl4Vgc+9QKygbM
Q/9lg2P/Q+tRnLBQALNYkXjnx68khYWPaHVLSF+sZY2OjnHFiQunaOk9MDx6FRVoFSvSiCpSNb5r
qW6/eCXo97932aUa4KngGAWLZkjSFX3jjcYaPG5lIsqf0dRhTr44FVEmw9NKeX4MOhvcHfecre96
Saf4jvFnShZKUEfzpguc7ihhvQVTeMI40g1Oq/94Y+61h0wa21jzkhIyBbjgYC/ek9Ymb/nAKf3n
eAvCR55RtLSJ4hdK+kuILGFDYBV1bDLYawgfqLFrOdmzXMJNDbIyhPqDc9NIezum8vlo6cSL/66k
e9osFJ5lamEtMOEe3Y7oKh2PdcPQQfjLh/BBqiOWy+FAl6WOq610PxWlE/0o/L9aI5hg0I7p9DnM
VqDKRV+bHhd16dd76vP7QVpyX54TTuBgHVigi2mCwKSkm9bbvDf+q3QCOdeKIgvKaWp5Um8muHii
C6GjCePOn74utjSQpX4V9dg47tF4xUk45YB1Kc0mrqkQhlPIKmiGV8h4N3aCiryZrqqzxZVpwvqn
yhi4ue/xWLz9o3V/NHfNGmDlFlEjrE6MR63fBLLNk4W7KzfDYnXk4drrbS5Zo5OFpb3clwrqWjEh
f0GNFCbw91nYIkmjVXGMLFnvvq7CAHAzEZw+8wIyRgjv/rXejooQ5G6RopEtFfgHIWAcmGQt2T2E
CSFE1xL5zGmxu5vlnQsczx2zdP94vahE3cMM4xJeFxiStXdc/xdO6ztA1eyDjVpPRGUquHDf7DaH
79K88rHTrBafQbnNv3G29U4lT69ZrzCAfhAkP+yICdlEo5txqmwM+w7o83SAh0OuC1CR65gu8slv
sU2DEkmBUICT1+OriZgwc7+ag73ukVNxZ2Exl1OM0q/Tdsya2ngu5xSoM0RQKAl/YC6KMDxRC4wu
gkCiQaRvS9KFXU1AxD+qs3XRHBqwR3kf4UcDGyUq3Waqpj/9qVX18xv8ZpfZUqHggu+IsSjfA/TT
/Qkr089OUNGPgMHtxebo3mqt1hfUZD8PB7C4YMvSETLaZRWnZbi7X4oJ7a4S5UylVypu9niUJozx
n+B1+mn+pYzyW7krjmZJC7x4zd4fgtju0Bb3rZGhgdGsNCp2X+31lL5QGxGsRMLEiZDc9sXbYIQr
zJmifD3Y8zEapC3dpCpw/JcvfF+s+RhBbO675wL7D6Yq2RgsNyPdGO42dXp0hThdiUMhtR9n9/yM
H1Jns562bSL3+bdz4B0j04KdmCanCiZxRqQ8hpoG6LEut4oDZamZYjmhSvYUnZv4d0/WsMZILyzN
ww42+xh42jw89iHxyoG7/CQnHWv2ZWGDJmdFDZN/ncj+BarefNBRypmyF42IvmLSdjc3d0DmlUx9
gB6QLOKIOYsezmYApOThLBsTlpAt+jr44idR3VyrqZfJtWHPnLZN6YNQF0AkzTlQoyWot+vYqulD
MVbT7ceIxJIajDddB25hkKVMiIfT2KdGIfLoB2mD48lHNz95teK9ZnHAd3Z2u+pVn36drOyIazCV
Dp1jqTOqg9yYGGI8EGuqewGDeOSe3mKyMrt1zUPAYP/dECdx6SpvYMO27Pvq437kwKk4gHq94yyS
hZQ1YUmMQ1wDykB6ZEizfoKplbw36J3PX0pUEGZ+uieUN6KNFKTA1FXi0BOg3O7sgtXoCe6xhL3H
x/oSBQQ6TIs7JoMGLscMADwUjZ6K/WlFMbvQeuMxG/WNVrwWaSxYgm/k08QPpbNob96kLfwDLs2G
h5XrtKI08fdGZRUeyNHcurQWF/QZWdrQxJU187aa982aD0kfxIYsMnragURmPEL8WOf10SxKT/ae
uneHnhB4+Q2sk5nHyZVs9nlFoJeVo9iFD87dm+TCoZY1VL/FxnrvZaqZkFrqqmD+CvT7PKUxLJW8
zJHaDX/xheC6Z86ASdSt8HamqObDTwEQgVsrJYPUZ5vjemElncyXET95HDUt7iXr6qdX2V3CMuOc
NHYoy45pX1MeO/aVCkuZq+ZvBF9h0dK/LHwY0+lbyvY2bCiRGPo7gKqZE9l1gZe51Zn4nuAJqFAQ
tVLyem9IUT+3nFqeLuhwTy6fHa88WpJHSWP7UJzmRN5AH+ez3C9hjD8OzulgShx7Q0XnQFN6tW0+
NAZ8P2b9liD0cAl7dimpHBI4Vz+8CCcW4ZVWDQoy6Jg5xCFyhbGyVHZFI/cvXkoLeDESp69nwnDq
/MpKxHeXMyms3i35wqCWgrt0BF6tDLuYRCJYaujnvOt/5PXZSVUZmqafoNye4HePnMz69+xsNewx
cRZ/QeUJ6TBTDIgKfvBx0jy1G1ZUvSTytnpnSAIhgxfSYLfyYgsVuxh8Uc5R0m2alC6BYjrUImeD
HKitiFVeLM9wPtoOzt1D8NYdrou34UpRCQ5UlC6c9cvHQfcYxqXwqg6sP7DZl1v1wl0mtIjAKCka
dxIKfrTYOzao94I62pMHItYk0Brs5r9N3wpMcK6Bv6Iy7QvTHcwm+ShIGn1Wapq5mEndTA4hPAA9
cdXh1ogWzH3zMMBKb+Vn7HT4nSChL7JOTmBYcbsf14Kok3Z1UqWnzQ4U5/RQWCsiEMhQwrnTEk5l
zcP40eDCegxJGZfN8pf5lvksb3BvSmunh+3MSY6QCVMFId/rrCUqnushInmrLxR6tW/cuMLtpC2u
aInXElAMlMryeQyHS9FzhXMUJqB2YBxs3Uvq7bpJp0jjTx13fMwFCRthtoI5xYDXfrg1o6tDGHsI
uh3Ddme+Bz/mIAipFqLBVab4jrseOMZFKznRAFWIjKS7tjz2ndPpdg46zgDsYmCxHYrwjD29d1Tl
egP1aphGJ6DY61Fj2+sH6JkGz2QfLJJWY8xIplLP80t5ROfGaOMANfR4OSN/brBjza2ukBmu9aeQ
8xkIREpP/rJizu/iRx2aD/NZfPWYd4b/rr4eW+4c4DWlR6wkkCJ3V417e8urhI3B5gcOlzdbGrfo
+/ZKIz2VHF1cntzkJ3UfpHpLS6vTEFm2xvWXrH1enFHkJaaB8yepq7NlPS7WW+IAxkp22RNtWO1K
CerVPu0qYt4Vxr2jgGizlL1oI+PUelJdS0t1Mvzeb3ZkkEcu9WrEnJgRdXEcOmK4ZBxUdwiyxR2d
LPHzFRe4JUVTfldvuFXj3WyEhPM3b73XlRW7/8s45AvQy0EYPG3hulgzQwTosyMYXMx2RPEmFgnj
/KwEhZl8TT4tXQtPdRSQLQfq+H4AKR+imq1Q5/CWGn5U/xqkEAixbDWcgQ//nnIm8ydA82xQE0/O
CuhpUlM9oWY5Ft4XNniS7CvnOwjAfSlmuTx4zpmMPb1DQ4HV8XCyUrbi/kWTljZYGzGNroAmX61b
KEJm0VBVh9qmM8KvfddnvcDWKD+F7AbUhbiV1r3FY82+PZHOJGQejKZvc+Dg1Xe/QF4H7/psQNcD
NWf1+81xsEh1iunwWVWL1+aDv8cMr4d4O+uKqEEVl7HSU4d4O4M4CMh96Jtzju1B88yfZdTDsQil
YfxlGlwMUyb8Xbzj2FzDZrJ28ku/upo/ApXJHdFnXTM52fwW3E7iNqF4SqmmXKtJQs1IxjfK5yST
MsHlFJJn6t9IE4FOP0phH8r+BC3ZkXkTKr+4r07YzhfvnXb6nNmZU12v9Wz6gHLdDJ3NylJY6d5J
HtvIMpY21D/dlhse+SZUe7Yy6TvxIjdw00qqxZYDsQxkziC9g+aSThhhxU4GamL9CVJx9pqhGuoO
o2IpaCFTDBg6rh4UHPulg9vhMCQD8X0Q+17qpcz6KLxPDdkplFX0FfFGiJG3M57R816uumTLJXwm
/nIHd2BYlYnln8T4VAZK+wFQYsuxrbEByVvjsHpIy92s/dEwOb94n2dn88eGVSsyypVdRNMHlMEJ
2hdI7luZvZ2AyR1RlJ70nGefro4QrCRSBTZ8wxjSuhRZI/8wmbft5AxemcM/sNnGtbmNs1FROAkr
XLdAeK+mdVqrzuR2iETJOk5rN11y0rhN7cINBYrmGJHoDDt2qouFH2r0IdSuCB6j87KrAJj1oO3O
EqOUWsrqa8D5b9+lYZ9MA4O6WNT522cWc+W6LQ+xHHFptrndedly23i0m/vp1/51aeBY8mCZWMRW
Qfg6TsRiCy6PbMsKxp64cMNfky+71alIC30BcOLeQ7szSD9qJbK+GpbSHq7TZUfkd1schx6eLDGh
RnKCpWPQlYnL0R4N3NeIgNf9BEk+wqcnSbyzsWn2XiIQxGqQgdDOt+mf29gQY3F7up6wrIwROrVF
O0SuxpSlh7c6dTqfSZG1lyp//9VXQoSTB60jDSIxnBnSU36zvXFbI0Fhz04tUs/8czXg/jz8uq0J
vKnNTITXzlkZNSVffx1slvkRpqWcTkfSQNaWwBDHYrc5Pq3LZ6WX47OeZyKEm6giQK1AQ/VhhdO/
+C7kfsp9ZkJcRmFazHThwS/zm+hykNkYn2YBHwMGjsu/pu/0aUgdGTNTSqdRYpU5AsZ5nV9nknus
C5R+VE0yU1Y9V/mb/PuUwf1hLTEpDevrw9fycO+5AZXtZ46JFbN7jGghYu0NBtKU5nXbb6ud07u7
+knsDLS/1DzBXjJuBn18IWPkIk8q+lthmCZRtTbRz+htY7Mi1IqwGRkOuH6JvKyMDr2DNTpQmunf
4N5Pr7ZsEsw7eV/+g4Lrh8Cl6a3CrjKzEpZihWqgF6yknjDGh9zmviRiS8cEYQELMZ6Zp1v2z1h+
gy8df02bj8E4GgqnOGtgwwVoH3gbjDAmr1voq/1vKtsPnlEApmHhHE+y+Qp2yFApoMP7uMOSpKPI
unJF6ZfGLn/dzLzQg/b55jEFBHPvOey73RnyjKVClzp+h20ma43QJDhaLuxtzL4KG7zzmEvZ71db
vRQHD+s26VFiqQ+q5upK2T8eCQF6UWZDvMUu1ndS6D0hGtujHDpLLByFra0YQHZx7I4hWf0bdhuc
7KBBe2Tmxec+bQXcKptqOC48WSpe37X1vcdOaajTBzHOpY+Vux4wxbbvcFbeqtO3OvsX8j426P35
CbAVfoo66h05f/pd0b8c0nuP6x5Rf400YU1kQ27uYCN6WHt2ixWMEYM1gDj6TyMuz2Nl+QvHuXMn
aufR7B7cVlKwNSeSUd5FfdRmwhHXsIVaY16PZguAj0F2yd9NHDp4aFo9as5umlADI6HaQghiaIKP
8KNajg7AZ7g9RVVn+RBml6dJgUe/HFTtOpm6s1KbJLBvcggoNBK2qZzrWdf0K7kLWvgyoPe3h9a3
m1eYd3IAz5sxkJLrVYSoTYCBH4sUNdhIViHgLyBeDYY278P63XpbYpDU6tvibyf+sAH08hNj4b3b
S50oBlu7y7hgedwlwwE9holwNhuWxF6oTmC0zCrpw/+HAnq7Bd1/ApXYbLTmP9u9gjQ5GLY/Qpzo
sEfjInVmHWEO7j1RvjSm6WLopMMM71r4aKweFmC30q4Mpr7Ank/GQqbtF2b0JwXZfdLPDPMjBNzh
njRdJQgLd7CM4b81cc0l5zKWmfA6X6cDMEVwAy3HmaEl9eSLULf8DC0xV+sp+Viw7FhpKL+B5hXo
4xDfee2USMSd316jRhSceKOgqGwxZk6XFcZeDWwkeoIZk41fnyhlEDYWSt0xVPsE5H82dVAcSdgE
iPEvUJxJrC9PMSqSonihwNneOnpXOm8pTKrmLPslvyEySg42uFmKHfc53h7AnNTpz9juQ757qIHL
cssy9KKGpAgfECvKhoaey4UyxbRu53Ap82YDCIhjuY44x1RAX1PN8Gg3yA92MpNt4JO0VNm4Eur4
F8tknTMH+LPkTLs2JMB0O/0L3Up1VTxtopR6MISeeFNiyxHSKUbufY/vKjTzFLxQS14p4kh+YbmE
lBlHxmamgEHULnmT5BgAg/7xm7dO1THiaKbM2R1tWT/jpHbRQIIeKmes7lq0PSF+O2F8VB9pnE3o
g3UdqKVJ0qe2M8ACmW9JkS0OX4Hz7Iqhn/l2BMI83GmzotQZPl3YCWNHwfJvfratTAGzIjE2SwPs
Fm8FZE+KLmIimNIq/CjVxw1Au+ST1XGuFVCL48kQAY22lZwyyOjz3Bfhq3LAi1/Od2E9LmQ52Qim
vXlFUeUZPwFEqWhqGc/ssGZrJXK8E58za3W4XsG9Ejnl4YXKWywjvLYUpq7OeQrelgwm9X0zbMga
dn6Nm6IKlkxATr6nMsnavsxNKwxE+lJyNJ6yjFsDJneUumA782lcizq5TvXMR+JOFOS42H2Dqmz5
7sIbYyvH0Zi72K0LXoW0hqN0WUvOXdeM7hYTv7O9glzqbs0IeplVAJznJsV59L98GDV/awJb1gLG
iY3d6p15Ja8+Df/0F9jmLhzgX3bHHoPG87cXGjD7A1vojcyl+FmC0Op3L7UF5gAHn3QIhsBot41z
RrTIxwdGDs2mvba73KZRKlTzF8TFfy6QbcQvxc3z9Znzeqc70nB7Q16e6842theXLWCnVhFwyq9c
fGbxyY/RFZGl21a9MVnHos92a4BytA9UpbKveempX43rgLTL61sITuFLIUEZnsrt3IrB0HUEFkOB
DoXtq3uPN5TP6T8CxANqHcSnsRkEp3Aq5QD+6RL0r9saE0WrjuQYaTUwb2C+ovkfZdrJd9ax/iJu
RVsRibgq3H56KR2icKvjESiTvMbeTuWZOjmeb0QvnSo8QYpUM5ECG52zFOAn2gIk8pRXnRZdpWaa
dUB/waWmrbv4ebfB4/NLAsJ0TsjPA5D/iOmIVd/LW/mH+DKCVGUXfh1ZnwANwXXpbnNWkO/FHblX
EaJllHVuVmT1jeF+TIRGjayQNziHVgQHS/LdDaZGfYu3gp3miov6jfvIWLbJKsvKjxfPeeTEpxUx
GLzpxMQhYVvFG0uZwkLC7wz+7R0mXJ6nUCQGbDhQTbNPc9SgBd0ZEZ2NH6Sbcii8u6vjS76t2u9w
6/mSiCtfGy5UYGZbfCuFgy5hQdWK+jMTWWMk03BfRBbREKEc0fRiptMzElu19riWnsRmTGZUo8Mi
gNlW71HBOemvpul69n6VBvz1bQ+OXyu7JsyKfIMTQinKUo9EvH9jW0sr8NCwxTIdfGR8azwy1MQU
HkId2wFtMaZrdsDiBPdRcOcximCsD2Jbe5UeKZ3DWxwxg0ZZybOGFS/rtU1nRXcerpjzz5w9HkCF
yhrtq5lJMqAy661PGuh+C7dgvmwDNEqNi3w9W14Z+1qrwQd+XmiWuJDq6yAifQ5+IXtzw2QYGaE3
703EsHXERFNzLALIdAo2JbEOT2k6G4whM3WwMbe2Z0VA+MLv0rDX0Cz+/RXTHFTldwrqYpe6J7XO
oZ9goVqLWWO7rhQk15KoL1M5Jf9KLx1xB3tcKcSxlrgxEFCViYaMMiu9wX6oTY7qdtJJNYW8NfD1
d8ci6qDGWzyAWEHp5AWWarhf81X3LPYGZO72MW4ow+/Et0qwNJ9kZjU6jc3vLDjW9czV8vczy2RP
rWOi7UL5OjujS3DU1ULbibdlZvT65S2lJK+o/A5hmiqGSpbcpfmeE1olSJyRM0dgF4lrO9Haj5oQ
fo07VWm++2oQEcwloRq7SZhmUmMMLe2jUBWTATSLJQJdLR0FPwmXv/CO8fhTqkPjGmAMHQ==
`protect end_protected
| apache-2.0 | a888621bc95b7f6beed2236ee15a560c | 0.953198 | 1.808245 | false | false | false | false |
CyAScott/CIS4930.DatapathSynthesisTool | src/Synthesize/DataPath/Vhdl/c_multiplexer.vhd | 1 | 893 | library ieee;
use ieee.std_logic_1164.all;
library WORK;
use WORK.all;
entity c_multiplexer is
generic
(
width : integer := 4;
no_of_inputs : integer := 2;
select_size : integer := 1
);
port
(
input : in std_logic_vector(((width * no_of_inputs) - 1) downto 0);
mux_select : in std_logic_vector ((select_size - 1) downto 0);
output : out std_logic_vector ((width - 1) downto 0)
);
end c_multiplexer;
architecture behavior of c_multiplexer is
signal sel : integer := 0;
begin
process (mux_select)
variable val : integer := 0;
begin
if (mux_select(0) /= 'X') then
val := 0;
for i in select_size - 1 downto 0 loop
if mux_select(i) = '1' then
val := 2 ** i + val;
end if;
end loop;
sel <= val;
end if;
end process;
process (input, sel)
begin
output <= input(((sel + 1) * width - 1) downto (sel * width));
end process;
end behavior; | mit | 2dce5d24f3c4950a925f0eb9839e1642 | 0.619261 | 2.843949 | false | false | false | false |
sils1297/HWPrak14 | task_4/project_1.srcs/sources_1/new/CPU.vhd | 1 | 2,052 | library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;
entity CPU is
generic(
WIDTH : integer := 16;
ADDRESS_WIDTH : integer := 10
);
Port(
inM : in std_ulogic_vector(WIDTH - 1 downto 0);
instruction : in std_ulogic_vector(WIDTH - 1 downto 0);
reset : in std_ulogic;
outM : out std_ulogic_vector(WIDTH - 1 downto 0);
writeM : out std_ulogic;
addressM : out std_ulogic_vector(ADDRESS_WIDTH - 1 downto 0);
pc : out std_ulogic_vector(ADDRESS_WIDTH - 1 downto 0);
clock : in std_ulogic
);
end CPU;
architecture Behavioral of CPU is
signal ALU_out, comp, D, ins_val_mux_out, A_or_M : std_ulogic_vector(WIDTH - 1 downto 0);
begin
our_beloved_ALU : entity work.ALU(Behavioral)
generic map(
WIDTH => WIDTH
)
port map(
clock => clock,
register_D => D,
A_or_M => A_or_M,
c => instruction,
comp => comp
);
register_A : entity work.SimpleRegister(Behavioral)
generic map(
WIDTH => WIDTH
)
port map(
inval => ins_val_mux_out,
outval => addressM,
set => instruction(5),
clock => clock,
reset => '0'
);
register_D : entity work.SimpleRegister(Behavioral)
generic map(
WIDTH => WIDTH
)
port map(
inval => comp,
outval => D,
set => instruction(4),
clock => clock,
reset => '0'
);
instruction_value_MUX : entity work.Mux(Behavioral)
generic map(
WIDTH => WIDTH
)
port map(
val1 => instruction,
val2 => comp,
switch => instruction(WIDTH - 1),
outval => ins_val_mux_out
);
ALU_instruction_MUX : entity work.Mux(Behavioral)
generic map(
WIDTH => WIDTH
)
port map(
val1 => addressM,
val2 => inM,
switch => instruction(WIDTH - 4),
outval => A_or_M
);
register_PC : entity work.ProgramCounter
generic map(
WIDTH => WIDTH
)
port map(
inval => addressM,
comp => comp,
jump => instruction(2 downto 0),
reset => reset,
clock => clock,
outval => pc
);
end Behavioral;
| agpl-3.0 | 5243232ed8006fb8b0aba69b1820f7ad | 0.591618 | 2.902405 | false | false | false | false |
mkotormus/G3_OrchestraConductorDemo | src/ov7670_marker_tracker_use/ov7670_marker_tracker_use.srcs/sources_1/ipshared/xilinx.com/axi_master_burst_v2_0/1af76933/hdl/src/vhdl/axi_master_burst_wrdata_cntl.vhd | 1 | 78,793 | -------------------------------------------------------------------
-- (c) Copyright 1984 - 2012 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
-------------------------------------------------------------------
-- Filename: axi_master_burst_wrdata_cntl.vhd
--
-- Description:
-- This file implements the AXI Master Burst Write Data Controller module.
--
--
--
--
-- VHDL-Standard: VHDL'93
-------------------------------------------------------------------------------
-- Structure:
-- axi_master_burst_wrdata_cntl.vhd
--
-------------------------------------------------------------------------------
-- Revision History:
--
--
-- Author: DET
-- Revision: $Revision: 1.0 $
-- Date: $1/19/2011$
--
-- History:
-- DET 1/19/2011 Initial
-- ~~~~~~
-- - Adapted from AXI DataMover V2_00_a axi_datamover_wrdata_cntl.vhd
-- - Disabled the sig_end_stbs_match_err detection
-- ^^^^^^
--
-- DET 2/15/2011 Initial for EDk 13.2
-- ~~~~~~
-- -- Per CR593812
-- - Modifications to remove unused features to improve Code coverage.
-- Used "-- coverage off" and "-- coverage on" strings.
-- ^^^^^^
--
-- DET 2/22/2011 Initial
-- ~~~~~~
-- -- Per CR594443
-- - Change to allow for posted AXI Write Commands to complete before
--- stopping the pushes to the Write Status controller on a undrrun or
-- overrun condition.
-- ^^^^^^
-- ~~~~~~
-- SK 12/16/12 -- v2.0
-- 1. up reved to major version for 2013.1 Vivado release. No logic updates.
-- 2. Updated the version of AXI MASTER BURST to v2.0 in X.Y format
-- 3. updated the proc common version to proc_common_v4_0
-- 4. No Logic Updates
-- ^^^^^^
--
-------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
library axi_master_burst_v2_0;
use axi_master_burst_v2_0.axi_master_burst_fifo;
use axi_master_burst_v2_0.axi_master_burst_strb_gen;
-------------------------------------------------------------------------------
entity axi_master_burst_wrdata_cntl is
generic (
C_REALIGNER_INCLUDED : Integer range 0 to 1 := 0;
C_ENABLE_STORE_FORWARD : Integer range 0 to 1 := 0;
C_SF_BYTES_RCVD_WIDTH : Integer range 1 to 23 := 1;
C_SEL_ADDR_WIDTH : Integer range 1 to 8 := 5;
C_DATA_CNTL_FIFO_DEPTH : Integer range 1 to 32 := 4;
C_MMAP_DWIDTH : Integer range 32 to 256 := 32;
C_STREAM_DWIDTH : Integer range 8 to 256 := 32;
C_TAG_WIDTH : Integer range 1 to 8 := 4;
C_FAMILY : String := "virtex7"
);
port (
-- Clock input
primary_aclk : in std_logic;
-- Primary synchronization clock for the Master side
-- interface and internal logic. It is also used
-- for the User interface synchronization when
-- C_STSCMD_IS_ASYNC = 0.
-- Reset input
mmap_reset : in std_logic;
-- Reset used for the internal master logic
-- Soft Shutdown internal interface ---------------------------
rst2data_stop_request : in std_logic;
-- Active high soft stop request to modules
data2addr_stop_req : Out std_logic;
-- Active high signal requesting the Address Controller
-- to stop posting commands to the AXI Read Address Channel
data2rst_stop_cmplt : Out std_logic;
-- Active high indication that the Data Controller has completed
-- any pending transfers committed by the Address Controller
-- after a stop has been requested by the Reset module.
-- Store and Forward support signals for external User logic -------------
wr_xfer_cmplt : Out std_logic;
-- Active high indication that the Data Controller has completed
-- a single write data transfer on the AXI4 Write Data Channel.
-- This signal is escentially echos the assertion of wlast sent
-- to the AXI4.
s2mm_ld_nxt_len : out std_logic;
-- Active high pulse indicating a new xfer length has been queued
-- to the WDC Cmd FIFO
s2mm_wr_len : out std_logic_vector(7 downto 0);
-- Bus indicating the AXI LEN value associated with the xfer command
-- loaded into the WDC Command FIFO.
-- AXI Write Data Channel Skid buffer I/O -------------------------------
data2skid_saddr_lsb : out std_logic_vector(C_SEL_ADDR_WIDTH-1 downto 0);
-- Write DATA output to skid buffer
data2skid_wdata : Out std_logic_vector(C_STREAM_DWIDTH-1 downto 0);
-- Write DATA output to skid buffer
data2skid_wstrb : Out std_logic_vector((C_STREAM_DWIDTH/8)-1 downto 0);
-- Write DATA output to skid buffer
data2skid_wlast : Out std_logic;
-- Write LAST output to skid buffer
data2skid_wvalid : Out std_logic;
-- Write VALID output to skid buffer
skid2data_wready : In std_logic;
-- Write READY input from skid buffer
-- AXI Slave Stream In -----------------------------------
s2mm_strm_wvalid : In std_logic;
-- AXI Stream VALID input
s2mm_strm_wready : Out Std_logic;
-- AXI Stream READY Output
s2mm_strm_wdata : In std_logic_vector(C_STREAM_DWIDTH-1 downto 0);
-- AXI Stream data input
s2mm_strm_wstrb : In std_logic_vector((C_STREAM_DWIDTH/8)-1 downto 0);
-- AXI Stream STRB input
s2mm_strm_wlast : In std_logic;
-- AXI Stream LAST input
-- Stream input sideband signal from Store and Forward and/or DRE
s2mm_strm_eop : In std_logic;
-- Stream End of Packet marker input
s2mm_stbs_asserted : in std_logic_vector(7 downto 0);
-- Indicates the number of asserted WSTRB bits for the
-- associated input stream data beat
-- Realigner Underrun/overrun error flag used in non Store and Forward
-- Mode
realign2wdc_eop_error : In std_logic ;
-- asserted active high and will only clear with reset
-- Command Calculator Interface --------------------------
mstr2data_tag : In std_logic_vector(C_TAG_WIDTH-1 downto 0);
-- The next command tag
mstr2data_saddr_lsb : In std_logic_vector(C_SEL_ADDR_WIDTH-1 downto 0);
-- The next command start address LSbs to use for the write strb
-- demux (only used if Stream data width is less than the MMap Dwidth).
mstr2data_len : In std_logic_vector(7 downto 0);
-- The LEN value output to the Address Channel
mstr2data_strt_strb : In std_logic_vector((C_STREAM_DWIDTH/8)-1 downto 0);
-- The starting strobe value to use for the first stream data beat
mstr2data_last_strb : In std_logic_vector((C_STREAM_DWIDTH/8)-1 downto 0);
-- The endiing (LAST) strobe value to use for the last stream
-- data beat
mstr2data_drr : In std_logic;
-- The starting tranfer of a sequence of transfers
mstr2data_eof : In std_logic;
-- The endiing tranfer of a sequence of transfers
mstr2data_sequential : In std_logic;
-- The next sequential tranfer of a sequence of transfers
-- spawned from a single parent command
mstr2data_calc_error : In std_logic;
-- Indication if the next command in the calculation pipe
-- has a calculation error
mstr2data_cmd_cmplt : In std_logic;
-- The final child tranfer of a parent command fetched from
-- the Command FIFO (not necessarily an EOF command)
mstr2data_cmd_valid : In std_logic;
-- The next command valid indication to the Data Channel
-- Controller for the AXI MMap
data2mstr_cmd_ready : Out std_logic ;
-- Indication from the Data Channel Controller that the
-- command is being accepted on the AXI Address
-- Channel
-- Address Controller Interface --------------------------
addr2data_addr_posted : In std_logic ;
-- Indication from the Address Channel Controller to the
-- Data Controller that an address has been posted to the
-- AXI Address Channel
data2addr_data_rdy : out std_logic;
-- Indication that the Data Channel is ready to send the first
-- databeat of the next command on the write data channel.
-- This is used for the "wait for data" feature which keeps the
-- address controller from issuing a transfer request until the
-- corresponding data valid is asserted on the stream input. The
-- WDC will continue to assert the output until an assertion on
-- the addr2data_addr_posted is received.
-- Premature TLAST assertion error flag
data2all_tlast_error : Out std_logic;
-- When asserted, this indicates the data controller detected
-- a premature TLAST assertion on the incoming data stream.
-- Data Controller Halted Status
data2all_dcntlr_halted : Out std_logic;
-- When asserted, this indicates the data controller has satisfied
-- all pending transfers queued by the Address Controller and is halted.
-- Input Stream Skid Buffer Halt control
data2skid_halt : Out std_logic;
-- The data controller asserts this output for 1 primary clock period
-- The pulse commands the MM2S Stream skid buffer to tun off outputs
-- at the next tlast transmission.
-- Write Status Controller Interface --------------------------
data2wsc_tag : Out std_logic_vector(C_TAG_WIDTH-1 downto 0);
-- The command tag
data2wsc_calc_err : Out std_logic ;
-- Indication that the current command out from the Cntl FIFO
-- has a calculation error
data2wsc_last_err : Out std_logic ;
-- Indication that the current write transfer encountered a premature
-- TLAST assertion on the incoming Stream Channel
data2wsc_cmd_cmplt : Out std_logic ;
-- Indication by the Data Channel Controller that the
-- corresponding status is the last status for a command
-- pulled from the command FIFO
wsc2data_ready : in std_logic;
-- Input from the Write Status Module indicating that the
-- Status Reg/FIFO is ready to accept data
data2wsc_valid : Out std_logic;
-- Output to the Command/Status Module indicating that the
-- Data Controller has valid tag and err indicators to write
-- to the Status module
data2wsc_eop : Out std_logic;
-- Output to the Write Status Controller indicating that the
-- associated command status also corresponds to a End of Packet
-- marker for the input Stream. This is only used when Store and
-- Forward is enabled in the S2MM.
data2wsc_bytes_rcvd : Out std_logic_vector(C_SF_BYTES_RCVD_WIDTH-1 downto 0);
-- Output to the Write Status Controller indicating the actual
-- number of bytes received from the Stream input for the
-- corresponding command status. This is only used when Store and
-- Forward is enabled in the S2MM.
wsc2mstr_halt_pipe : In std_logic
-- Indication to Halt the Data and Address Command pipeline due
-- to the Status FIFO going full or an internal error being logged
);
end entity axi_master_burst_wrdata_cntl;
architecture implementation of axi_master_burst_wrdata_cntl is
attribute DowngradeIPIdentifiedWarnings: string;
attribute DowngradeIPIdentifiedWarnings of implementation : architecture is "yes";
-- Function declaration ----------------------------------------
-- coverage off
-------------------------------------------------------------------
-- Function
--
-- Function Name: funct_get_dbeat_residue_width
--
-- Function Description:
-- Calculates the number of Least significant bits of the BTT field
-- that are unused for the LEN calculation
--
-------------------------------------------------------------------
function funct_get_dbeat_residue_width (bytes_per_beat : integer) return integer is
Variable temp_dbeat_residue_width : Integer := 0; -- 8-bit stream
begin
case bytes_per_beat is
when 32 =>
temp_dbeat_residue_width := 5;
when 16 =>
temp_dbeat_residue_width := 4;
when 8 =>
temp_dbeat_residue_width := 3;
when 4 =>
temp_dbeat_residue_width := 2;
when 2 =>
temp_dbeat_residue_width := 1;
when others => -- assume 1-byte transfers
temp_dbeat_residue_width := 0;
end case;
Return (temp_dbeat_residue_width);
end function funct_get_dbeat_residue_width;
-- coverage on
-------------------------------------------------------------------
-- Function
--
-- Function Name: funct_set_cnt_width
--
-- Function Description:
-- Sets a count width based on a fifo depth. A depth of 4 or less
-- is a special case which requires a minimum count width of 3 bits.
--
-------------------------------------------------------------------
function funct_set_cnt_width (fifo_depth : integer) return integer is
Variable temp_cnt_width : Integer := 4;
begin
if (fifo_depth <= 4) then
temp_cnt_width := 3;
elsif (fifo_depth <= 8) then
temp_cnt_width := 4;
elsif (fifo_depth <= 16) then
temp_cnt_width := 5;
-- coverage off
elsif (fifo_depth <= 32) then
temp_cnt_width := 6;
else -- fifo depth <= 64
temp_cnt_width := 7;
-- coverage on
end if;
Return (temp_cnt_width);
end function funct_set_cnt_width;
-- Constant Declarations --------------------------------------------
Constant STRM_STRB_WIDTH : integer := C_STREAM_DWIDTH/8;
Constant LEN_OF_ZERO : std_logic_vector(7 downto 0) := (others => '0');
Constant USE_SYNC_FIFO : integer := 0;
Constant REG_FIFO_PRIM : integer := 0;
Constant BRAM_FIFO_PRIM : integer := 1;
Constant SRL_FIFO_PRIM : integer := 2;
Constant FIFO_PRIM_TYPE : integer := SRL_FIFO_PRIM;
Constant TAG_WIDTH : integer := C_TAG_WIDTH;
Constant SADDR_LSB_WIDTH : integer := C_SEL_ADDR_WIDTH;
Constant LEN_WIDTH : integer := 8;
Constant STRB_WIDTH : integer := C_STREAM_DWIDTH/8;
Constant DRR_WIDTH : integer := 1;
Constant EOF_WIDTH : integer := 1;
Constant CALC_ERR_WIDTH : integer := 1;
Constant CMD_CMPLT_WIDTH : integer := 1;
Constant SEQUENTIAL_WIDTH : integer := 1;
Constant DCTL_FIFO_WIDTH : Integer := TAG_WIDTH + -- Tag field
SADDR_LSB_WIDTH + -- LS Address field width
LEN_WIDTH + -- LEN field
STRB_WIDTH + -- Starting Strobe field
STRB_WIDTH + -- Ending Strobe field
DRR_WIDTH + -- DRE Re-alignment Request Flag Field
EOF_WIDTH + -- EOF flag field
SEQUENTIAL_WIDTH + -- Sequential command flag
CMD_CMPLT_WIDTH + -- Command Complete Flag
CALC_ERR_WIDTH; -- Calc error flag
Constant TAG_STRT_INDEX : integer := 0;
Constant SADDR_LSB_STRT_INDEX : integer := TAG_STRT_INDEX + TAG_WIDTH;
Constant LEN_STRT_INDEX : integer := SADDR_LSB_STRT_INDEX + SADDR_LSB_WIDTH;
Constant STRT_STRB_STRT_INDEX : integer := LEN_STRT_INDEX + LEN_WIDTH;
Constant LAST_STRB_STRT_INDEX : integer := STRT_STRB_STRT_INDEX + STRB_WIDTH;
Constant DRR_STRT_INDEX : integer := LAST_STRB_STRT_INDEX + STRB_WIDTH;
Constant EOF_STRT_INDEX : integer := DRR_STRT_INDEX + DRR_WIDTH;
Constant SEQUENTIAL_STRT_INDEX : integer := EOF_STRT_INDEX + EOF_WIDTH;
Constant CMD_CMPLT_STRT_INDEX : integer := SEQUENTIAL_STRT_INDEX+SEQUENTIAL_WIDTH;
Constant CALC_ERR_STRT_INDEX : integer := CMD_CMPLT_STRT_INDEX+CMD_CMPLT_WIDTH;
Constant ADDR_INCR_VALUE : integer := C_STREAM_DWIDTH/8;
--Constant ADDR_POSTED_CNTR_WIDTH : integer := 5; -- Allows for 32 address entry queue
Constant ADDR_POSTED_CNTR_WIDTH : integer := funct_set_cnt_width(C_DATA_CNTL_FIFO_DEPTH);
Constant ADDR_POSTED_ZERO : unsigned(ADDR_POSTED_CNTR_WIDTH-1 downto 0)
:= (others => '0');
Constant ADDR_POSTED_ONE : unsigned(ADDR_POSTED_CNTR_WIDTH-1 downto 0)
:= TO_UNSIGNED(1, ADDR_POSTED_CNTR_WIDTH);
Constant ADDR_POSTED_MAX : unsigned(ADDR_POSTED_CNTR_WIDTH-1 downto 0)
:= (others => '1');
-- Signal Declarations --------------------------------------------
signal sig_get_next_dqual : std_logic := '0';
signal sig_last_mmap_dbeat : std_logic := '0';
signal sig_last_mmap_dbeat_reg : std_logic := '0';
signal sig_mmap2data_ready : std_logic := '0';
signal sig_data2mmap_valid : std_logic := '0';
signal sig_data2mmap_last : std_logic := '0';
signal sig_data2mmap_data : std_logic_vector(C_STREAM_DWIDTH-1 downto 0) := (others => '0');
signal sig_ld_new_cmd : std_logic := '0';
signal sig_ld_new_cmd_reg : std_logic := '0';
signal sig_cmd_cmplt_reg : std_logic := '0';
signal sig_calc_error_reg : std_logic := '0';
signal sig_tag_reg : std_logic_vector(TAG_WIDTH-1 downto 0) := (others => '0');
signal sig_addr_lsb_reg : std_logic_vector(C_SEL_ADDR_WIDTH-1 downto 0) := (others => '0');
signal sig_strt_strb_reg : std_logic_vector(STRM_STRB_WIDTH-1 downto 0) := (others => '0');
signal sig_last_strb_reg : std_logic_vector(STRM_STRB_WIDTH-1 downto 0) := (others => '0');
signal sig_addr_posted : std_logic := '0';
signal sig_dqual_rdy : std_logic := '0';
signal sig_good_mmap_dbeat : std_logic := '0';
signal sig_first_dbeat : std_logic := '0';
signal sig_last_dbeat : std_logic := '0';
signal sig_single_dbeat : std_logic := '0';
signal sig_new_len_eq_0 : std_logic := '0';
signal sig_dbeat_cntr : unsigned(7 downto 0) := (others => '0');
Signal sig_dbeat_cntr_int : Integer range 0 to 255 := 0;
signal sig_dbeat_cntr_eq_0 : std_logic := '0';
signal sig_dbeat_cntr_eq_1 : std_logic := '0';
signal sig_wsc_ready : std_logic := '0';
signal sig_push_to_wsc : std_logic := '0';
signal sig_push_to_wsc_cmplt : std_logic := '0';
signal sig_set_push2wsc : std_logic := '0';
signal sig_data2wsc_tag : std_logic_vector(TAG_WIDTH-1 downto 0) := (others => '0');
signal sig_data2wsc_calc_err : std_logic := '0';
signal sig_data2wsc_last_err : std_logic := '0';
signal sig_data2wsc_cmd_cmplt : std_logic := '0';
signal sig_tlast_error : std_logic := '0';
signal sig_tlast_error_strbs : std_logic := '0';
signal sig_end_stbs_match_err : std_logic := '0';
signal sig_tlast_error_reg : std_logic := '0';
signal sig_cmd_is_eof : std_logic := '0';
signal sig_push_err2wsc : std_logic := '0';
signal sig_tlast_error_ovrrun : std_logic := '0';
signal sig_tlast_error_undrrun : std_logic := '0';
signal sig_next_tag_reg : std_logic_vector(TAG_WIDTH-1 downto 0) := (others => '0');
signal sig_next_strt_strb_reg : std_logic_vector(STRM_STRB_WIDTH-1 downto 0) := (others => '0');
signal sig_next_last_strb_reg : std_logic_vector(STRM_STRB_WIDTH-1 downto 0) := (others => '0');
signal sig_next_eof_reg : std_logic := '0';
signal sig_next_sequential_reg : std_logic := '0';
signal sig_next_cmd_cmplt_reg : std_logic := '0';
signal sig_next_calc_error_reg : std_logic := '0';
signal sig_pop_dqual_reg : std_logic := '0';
signal sig_push_dqual_reg : std_logic := '0';
signal sig_dqual_reg_empty : std_logic := '0';
signal sig_dqual_reg_full : std_logic := '0';
signal sig_addr_posted_cntr : unsigned(ADDR_POSTED_CNTR_WIDTH-1 downto 0) := (others => '0');
signal sig_addr_posted_cntr_eq_0 : std_logic := '0';
signal sig_addr_posted_cntr_max : std_logic := '0';
signal sig_decr_addr_posted_cntr : std_logic := '0';
signal sig_incr_addr_posted_cntr : std_logic := '0';
signal sig_addr_posted_cntr_eq_1 : std_logic := '0';
signal sig_apc_going2zero : std_logic := '0';
signal sig_aposted_cntr_ready : std_logic := '0';
signal sig_addr_chan_rdy : std_logic := '0';
Signal sig_no_posted_cmds : std_logic := '0';
signal sig_ls_addr_cntr : unsigned(C_SEL_ADDR_WIDTH-1 downto 0) := (others => '0');
signal sig_incr_ls_addr_cntr : std_logic := '0';
signal sig_addr_incr_unsgnd : unsigned(C_SEL_ADDR_WIDTH-1 downto 0) := (others => '0');
Signal sig_cmd_fifo_data_in : std_logic_vector(DCTL_FIFO_WIDTH-1 downto 0) := (others => '0');
Signal sig_cmd_fifo_data_out : std_logic_vector(DCTL_FIFO_WIDTH-1 downto 0) := (others => '0');
signal sig_fifo_next_tag : std_logic_vector(TAG_WIDTH-1 downto 0) := (others => '0');
signal sig_fifo_next_sadddr_lsb : std_logic_vector(C_SEL_ADDR_WIDTH-1 downto 0) := (others => '0');
signal sig_fifo_next_len : std_logic_vector(7 downto 0) := (others => '0');
signal sig_fifo_next_strt_strb : std_logic_vector(STRM_STRB_WIDTH-1 downto 0) := (others => '0');
signal sig_fifo_next_last_strb : std_logic_vector(STRM_STRB_WIDTH-1 downto 0) := (others => '0');
signal sig_fifo_next_drr : std_logic := '0';
signal sig_fifo_next_eof : std_logic := '0';
signal sig_fifo_next_cmd_cmplt : std_logic := '0';
signal sig_fifo_next_sequential : std_logic := '0';
signal sig_fifo_next_calc_error : std_logic := '0';
signal sig_cmd_fifo_empty : std_logic := '0';
signal sig_fifo_wr_cmd_valid : std_logic := '0';
signal sig_fifo_wr_cmd_ready : std_logic := '0';
signal sig_fifo_rd_cmd_valid : std_logic := '0';
signal sig_fifo_rd_cmd_ready : std_logic := '0';
signal sig_sequential_push : std_logic := '0';
signal sig_clr_dqual_reg : std_logic := '0';
signal sig_tlast_err_stop : std_logic := '0';
signal sig_halt_reg : std_logic := '0';
signal sig_halt_reg_dly1 : std_logic := '0';
signal sig_halt_reg_dly2 : std_logic := '0';
signal sig_halt_reg_dly3 : std_logic := '0';
signal sig_data2skid_halt : std_logic := '0';
signal sig_stop_wvalid : std_logic := '0';
signal sig_data2rst_stop_cmplt : std_logic := '0';
signal sig_s2mm_strm_wready : std_logic := '0';
signal sig_good_strm_dbeat : std_logic := '0';
signal sig_halt_strb : std_logic_vector(STRM_STRB_WIDTH-1 downto 0) := (others => '0');
signal sig_sfhalt_next_strt_strb : std_logic_vector(STRM_STRB_WIDTH-1 downto 0) := (others => '0');
signal sig_wfd_simult_clr_set : std_logic := '0';
signal sig_wr_xfer_cmplt : std_logic := '0';
signal sig_s2mm_ld_nxt_len : std_logic := '0';
signal sig_s2mm_wr_len : std_logic_vector(7 downto 0) := (others => '0');
signal sig_data2mstr_cmd_ready : std_logic := '0';
begin --(architecture implementation)
-- Command calculator handshake
data2mstr_cmd_ready <= sig_data2mstr_cmd_ready;
-- Write Data Channel Skid Buffer Port assignments
sig_mmap2data_ready <= skid2data_wready ;
data2skid_wvalid <= sig_data2mmap_valid ;
data2skid_wlast <= sig_data2mmap_last ;
data2skid_wdata <= sig_data2mmap_data ;
data2skid_saddr_lsb <= sig_addr_lsb_reg ;
-- AXI MM2S Stream Channel Port assignments
sig_data2mmap_data <= s2mm_strm_wdata ;
-- Premature TLAST assertion indication
data2all_tlast_error <= sig_tlast_error_reg ;
-- Stream Input Ready Handshake
s2mm_strm_wready <= sig_s2mm_strm_wready ;
sig_good_strm_dbeat <= s2mm_strm_wvalid and
sig_s2mm_strm_wready;
sig_data2mmap_last <= sig_dbeat_cntr_eq_0 and
sig_dqual_rdy;
-- Write Status Block interface signals
data2wsc_valid <= sig_push_to_wsc and
not(sig_tlast_err_stop) ; -- only allow 1 status write on TLAST errror
sig_wsc_ready <= wsc2data_ready ;
data2wsc_tag <= sig_data2wsc_tag ;
data2wsc_calc_err <= sig_data2wsc_calc_err ;
data2wsc_last_err <= sig_data2wsc_last_err ;
data2wsc_cmd_cmplt <= sig_data2wsc_cmd_cmplt ;
-- Address Channel Controller synchro pulse input
sig_addr_posted <= addr2data_addr_posted;
-- Request to halt the Address Channel Controller
data2addr_stop_req <= sig_halt_reg or
sig_tlast_error_reg;
-- Halted flag to the reset module
data2rst_stop_cmplt <= sig_data2rst_stop_cmplt;
-- Indicate the Write Data Controller is always ready
data2addr_data_rdy <= '1';
-- Write Transfer Completed Status output
wr_xfer_cmplt <= sig_wr_xfer_cmplt ;
-- New LEN value is being loaded
s2mm_ld_nxt_len <= sig_s2mm_ld_nxt_len;
-- The new LEN value
s2mm_wr_len <= sig_s2mm_wr_len;
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_WR_CMPLT_FLAG
--
-- Process Description:
-- Implements the status flag indicating that a write data
-- transfer has completed. This is an echo of a wlast assertion
-- and a qualified data beat on the AXI4 Write Data Channel.
--
-------------------------------------------------------------
IMP_WR_CMPLT_FLAG : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (mmap_reset = '1') then
sig_wr_xfer_cmplt <= '0';
else
sig_wr_xfer_cmplt <= sig_data2mmap_last and
sig_good_strm_dbeat;
end if;
end if;
end process IMP_WR_CMPLT_FLAG;
------------------------------------------------------------
-- If Generate
--
-- Label: GEN_OMIT_STORE_FORWARD
--
-- If Generate Description:
-- Omits any Store and Forward Support logic and includes
-- any error detection needed in Non Store and Forward mode.
--
------------------------------------------------------------
GEN_OMIT_STORE_FORWARD : if (C_ENABLE_STORE_FORWARD = 0) generate
begin
sig_sfhalt_next_strt_strb <= sig_fifo_next_strt_strb;
-- Just housekeep the output port signals
data2wsc_eop <= '0';
data2wsc_bytes_rcvd <= (others => '0');
-- WRSTRB logic ------------------------------
-- Generate the Write Strobes for the MMap Write Data Channel
-- for the non Store and Forward Case
data2skid_wstrb <= sig_strt_strb_reg
When (sig_first_dbeat = '1')
Else sig_last_strb_reg
When (sig_last_dbeat = '1')
Else (others => '1');
-- Generate the Stream Ready for the Stream input side
sig_s2mm_strm_wready <= sig_halt_reg or -- force tready if a halt requested
(sig_mmap2data_ready and
sig_addr_chan_rdy and -- This puts combinational logic in the stream WREADY path
sig_dqual_rdy and
not(sig_calc_error_reg) and
not(sig_tlast_error_reg)); -- Stop the stream channel at a overrun/underrun detection
-- MMap Write Data Channel Valid Handshaking
sig_data2mmap_valid <= (s2mm_strm_wvalid or
sig_tlast_error_reg or -- force valid if TLAST error
sig_halt_reg ) and -- force valid if halt requested
sig_addr_chan_rdy and -- xfers are commited on the address channel and
sig_dqual_rdy and -- there are commands in the command fifo
not(sig_calc_error_reg) and
not(sig_stop_wvalid); -- gate off wvalid immediately after a wlast for 1 clk
-- or when the soft shutdown has completed
------------------------------------------------------------
-- If Generate
--
-- Label: GEN_LOCAL_ERR_DETECT
--
-- If Generate Description:
-- Implements the local overrun and underrun detection when
-- the S2MM Realigner is not included.
--
--
------------------------------------------------------------
GEN_LOCAL_ERR_DETECT : if (C_REALIGNER_INCLUDED = 0) generate
begin
------- Input Stream TLAST assertion error -------------------------------
sig_tlast_error_ovrrun <= sig_cmd_is_eof and
sig_dbeat_cntr_eq_0 and
sig_good_mmap_dbeat and
not(s2mm_strm_wlast);
sig_tlast_error_undrrun <= s2mm_strm_wlast and
sig_good_mmap_dbeat and
(not(sig_dbeat_cntr_eq_0) or
not(sig_cmd_is_eof));
sig_end_stbs_match_err <= '0'; -- Disable this for aAXI Master burst
-- sig_end_stbs_match_err <= '1' -- Set flag if the calculated end strobe value
-- When ((s2mm_strm_wstrb /= sig_next_last_strb_reg) and -- does not match the received strobe value
-- (s2mm_strm_wlast = '1') and -- at TLAST assertion
-- (sig_good_mmap_dbeat = '1')) -- Qualified databeat
-- Else '0';
sig_tlast_error <= (sig_tlast_error_ovrrun or
sig_tlast_error_undrrun or
sig_end_stbs_match_err) and
not(sig_halt_reg); -- Suppress TLAST error when in soft shutdown
end generate GEN_LOCAL_ERR_DETECT;
------------------------------------------------------------
-- If Generate
--
-- Label: GEN_EXTERN_ERR_DETECT
--
-- If Generate Description:
-- Omits the local overrun and underrun detection and relies
-- on the S2MM Realigner for the detection.
--
------------------------------------------------------------
GEN_EXTERN_ERR_DETECT : if (C_REALIGNER_INCLUDED = 1) generate
begin
sig_tlast_error_undrrun <= '0'; -- not used here
sig_tlast_error_ovrrun <= '0'; -- not used here
sig_end_stbs_match_err <= '0'; -- not used here
sig_tlast_error <= realign2wdc_eop_error and -- External error detection asserted
not(sig_halt_reg); -- Suppress TLAST error when in soft shutdown
end generate GEN_EXTERN_ERR_DETECT;
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_TLAST_ERR_REG
--
-- Process Description:
-- Implements a sample and hold flop for the flag indicating
-- that the input Stream TLAST assertion was not at the expected
-- data beat relative to the commanded number of databeats
-- from the associated command from the SCC or PCC.
-------------------------------------------------------------
IMP_TLAST_ERR_REG : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (mmap_reset = '1') then
sig_tlast_error_reg <= '0';
elsif (sig_tlast_error = '1') then
sig_tlast_error_reg <= '1';
else
null; -- hold current state
end if;
end if;
end process IMP_TLAST_ERR_REG;
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_TLAST_ERROR_STOP
--
-- Process Description:
-- Implements the flop to generate a stop flag once the TLAST
-- error condition has been relayed to the Write Status
-- Controller. This stop flag is used to prevent any more
-- pushes to the Write Status Controller.
--
-- However, if transfer requests have already been posted to
-- the AXI bus, they must be allowed to complete before stopping.
-------------------------------------------------------------
IMP_TLAST_ERROR_STOP : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (mmap_reset = '1') then
sig_tlast_err_stop <= '0';
-- elsif (sig_tlast_error_reg = '1' and
-- sig_push_to_wsc_cmplt = '1') then
elsif (sig_tlast_error_reg = '1' and
sig_push_to_wsc_cmplt = '1' and
(sig_no_posted_cmds = '1' or
sig_apc_going2zero = '1')) then
sig_tlast_err_stop <= '1';
else
null; -- Hold State
end if;
end if;
end process IMP_TLAST_ERROR_STOP;
end generate GEN_OMIT_STORE_FORWARD;
-- coverage off
------------------------------------------------------------
-- If Generate
--
-- Label: GEN_STORE_FORWARD
--
-- If Generate Description:
-- Includes any Store and Forward Support logic. Primarily
-- this is a counter for the input stream bytes received. The
-- received byte count is relayed to the Write Status Controller
-- for each parent command completed.
-- When a packet completion is indicated via the EOP marker
-- assertion, the status to the Write Status Controller also
-- indicates the EOP condition.
-- Note that underrun and overrun detection/error flagging
-- is disabled in Store and Forward Mode.
--
------------------------------------------------------------
GEN_STORE_FORWARD : if (C_ENABLE_STORE_FORWARD = 1) generate
-- local constants
Constant BYTE_CNTR_WIDTH : integer := C_SF_BYTES_RCVD_WIDTH;
Constant NUM_ZEROS_WIDTH : integer := 8;
Constant BYTES_PER_DBEAT : integer := C_STREAM_DWIDTH/8;
Constant STRBGEN_ADDR_SLICE_WIDTH : integer :=
funct_get_dbeat_residue_width(BYTES_PER_DBEAT);
-- local signals
signal lsig_byte_cntr : unsigned(BYTE_CNTR_WIDTH-1 downto 0) := (others => '0');
signal lsig_byte_cntr_incr_value : unsigned(BYTE_CNTR_WIDTH-1 downto 0) := (others => '0');
signal lsig_ld_byte_cntr : std_logic := '0';
signal lsig_incr_byte_cntr : std_logic := '0';
signal lsig_clr_byte_cntr : std_logic := '0';
signal lsig_end_of_cmd_reg : std_logic := '0';
signal lsig_eop_s_h_reg : std_logic := '0';
signal lsig_eop_reg : std_logic := '0';
signal sig_strbgen_addr : std_logic_vector(STRBGEN_ADDR_SLICE_WIDTH-1 downto 0) := (others => '0');
signal sig_strbgen_bytes : std_logic_vector(STRBGEN_ADDR_SLICE_WIDTH downto 0) := (others => '0');
begin
-- Assign the outputs to the Write Status Controller
data2wsc_eop <= lsig_eop_reg and
not(sig_next_calc_error_reg);
data2wsc_bytes_rcvd <= STD_LOGIC_VECTOR(lsig_byte_cntr);
-- WRSTRB logic ------------------------------
sig_strbgen_bytes <= (others => '1'); -- set to the max value
sig_strbgen_addr <= STD_LOGIC_VECTOR(RESIZE(UNSIGNED(sig_fifo_next_sadddr_lsb),
STRBGEN_ADDR_SLICE_WIDTH)) ;
------------------------------------------------------------
-- Instance: I_STRT_STRB_GEN
--
-- Description:
-- Strobe generator used to generate the starting databeat
-- strobe value for soft shutdown case where the S2MM has to
-- flush out all of the transfers that have been committed
-- to the AXI Write address channel. Starting Strobes must
-- match the committed address offest for each transfer.
--
------------------------------------------------------------
I_STRT_STRB_GEN : entity axi_master_burst_v2_0.axi_master_burst_strb_gen
generic map (
C_ADDR_MODE => 0 , -- 0 = normal, 1 = Address only
C_STRB_WIDTH => BYTES_PER_DBEAT ,
C_OFFSET_WIDTH => STRBGEN_ADDR_SLICE_WIDTH ,
C_NUM_BYTES_WIDTH => STRBGEN_ADDR_SLICE_WIDTH+1
)
port map (
start_addr_offset => sig_strbgen_addr ,
num_valid_bytes => sig_strbgen_bytes ,
strb_out => sig_sfhalt_next_strt_strb
);
-- Generate the WSTRB to use during soft shutdown
sig_halt_strb <= sig_strt_strb_reg
When (sig_first_dbeat = '1' or
sig_single_dbeat = '1')
Else (others => '1');
-- Generate the Write Strobes for the MMap Write Data Channel
-- for the Store and Forward case. Strobes come from the Stream
-- input from the Store and forward module during normal operation.
-- However, during soft shutdown, those strobes become unpredictable
-- so generated strobes have to be used.
data2skid_wstrb <= sig_halt_strb
When (sig_halt_reg = '1')
Else s2mm_strm_wstrb;
-- Generate the Stream Ready for the Stream input side
sig_s2mm_strm_wready <= sig_halt_reg or -- force tready if a halt requested
(sig_mmap2data_ready and -- MMap is accepting the xfers
sig_addr_chan_rdy and -- xfers are commited on the address channel and
sig_dqual_rdy and -- there are commands in the command fifo
not(sig_calc_error_reg) and -- No internal error
not(sig_stop_wvalid)); -- Gate off stream ready immediately after a wlast for 1 clk
-- or when the soft shutdown has completed
-- MMap Write Data Channel Valid Handshaking
sig_data2mmap_valid <= (s2mm_strm_wvalid or -- Normal Stream input valid
sig_halt_reg ) and -- force valid if halt requested
sig_addr_chan_rdy and -- xfers are commited on the address channel and
sig_dqual_rdy and -- there are commands in the command fifo
not(sig_calc_error_reg) and -- No internal error
not(sig_stop_wvalid); -- Gate off wvalid immediately after a wlast for 1 clk
-- or when the soft shutdown has completed
-- TLAST Error housekeeping for Store and Forward Mode
-- There is no Underrun/overrun in Stroe and Forward mode
sig_tlast_error_ovrrun <= '0'; -- Not used with Store and Forward
sig_tlast_error_undrrun <= '0'; -- Not used with Store and Forward
sig_end_stbs_match_err <= '0'; -- Not used with Store and Forward
sig_tlast_error <= '0'; -- Not used with Store and Forward
sig_tlast_error_reg <= '0'; -- Not used with Store and Forward
sig_tlast_err_stop <= '0'; -- Not used with Store and Forward
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_EOP_REG_FLOP
--
-- Process Description:
-- Register the End of Packet marker.
--
-------------------------------------------------------------
IMP_EOP_REG_FLOP : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (mmap_reset = '1') then
lsig_end_of_cmd_reg <= '0';
lsig_eop_reg <= '0';
Elsif (sig_good_strm_dbeat = '1') Then
lsig_end_of_cmd_reg <= sig_next_cmd_cmplt_reg and
s2mm_strm_wlast;
lsig_eop_reg <= s2mm_strm_eop;
else
null; -- hold current state
end if;
end if;
end process IMP_EOP_REG_FLOP;
----- Byte Counter Logic -----------------------------------------------
-- The Byte counter reflects the actual byte count received on the
-- Stream input for each parent command loaded into the S2MM command
-- FIFO. Thus it counts input bytes until the command complete qualifier
-- is set and the TLAST input from the Stream input.
lsig_clr_byte_cntr <= lsig_end_of_cmd_reg and -- Clear if a new stream packet does not start
not(sig_good_strm_dbeat); -- immediately after the previous one finished.
lsig_ld_byte_cntr <= lsig_end_of_cmd_reg and -- Only load if a new stream packet starts
sig_good_strm_dbeat; -- immediately after the previous one finished.
lsig_incr_byte_cntr <= sig_good_strm_dbeat;
lsig_byte_cntr_incr_value <= RESIZE(UNSIGNED(s2mm_stbs_asserted),
BYTE_CNTR_WIDTH);
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_BYTE_CMTR
--
-- Process Description:
-- Keeps a running byte count per burst packet loaded into the
-- xfer FIFO. It is based on the strobes set on the incoming
-- Stream dbeat.
--
-------------------------------------------------------------
IMP_BYTE_CMTR : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (mmap_reset = '1' or
lsig_clr_byte_cntr = '1') then
lsig_byte_cntr <= (others => '0');
elsif (lsig_ld_byte_cntr = '1') then
lsig_byte_cntr <= lsig_byte_cntr_incr_value;
elsif (lsig_incr_byte_cntr = '1') then
lsig_byte_cntr <= lsig_byte_cntr + lsig_byte_cntr_incr_value;
else
null; -- hold current value
end if;
end if;
end process IMP_BYTE_CMTR;
end generate GEN_STORE_FORWARD;
-- coverage on
-- Internal logic ------------------------------
sig_good_mmap_dbeat <= sig_mmap2data_ready and
sig_data2mmap_valid;
sig_last_mmap_dbeat <= sig_good_mmap_dbeat and
sig_data2mmap_last;
sig_get_next_dqual <= sig_last_mmap_dbeat;
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: REG_LAST_DBEAT
--
-- Process Description:
-- This implements a FLOP that creates a pulse
-- indicating the LAST signal for an outgoing write data channel
-- has been sent. Note that it is possible to have back to
-- back LAST databeats.
--
-------------------------------------------------------------
REG_LAST_DBEAT : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (mmap_reset = '1') then
sig_last_mmap_dbeat_reg <= '0';
else
sig_last_mmap_dbeat_reg <= sig_last_mmap_dbeat;
end if;
end if;
end process REG_LAST_DBEAT;
----- Write Status Interface Stuff --------------------------
sig_push_to_wsc_cmplt <= sig_push_to_wsc and sig_wsc_ready;
sig_set_push2wsc <= (sig_good_mmap_dbeat and
sig_dbeat_cntr_eq_0) or
sig_push_err2wsc;
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_INTERR_PUSH_FLOP
--
-- Process Description:
-- Generate a 1 clock wide pulse when a calc error has propagated
-- from the Command Calculator. This pulse is used to force a
-- push of the error status to the Write Status Controller
-- without a AXI transfer completion.
--
-------------------------------------------------------------
IMP_INTERR_PUSH_FLOP : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (mmap_reset = '1' or
sig_push_err2wsc = '1') then
sig_push_err2wsc <= '0';
elsif (sig_ld_new_cmd_reg = '1' and
sig_calc_error_reg = '1') then
sig_push_err2wsc <= '1';
else
null; -- hold state
end if;
end if;
end process IMP_INTERR_PUSH_FLOP;
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_PUSH2WSC_FLOP
--
-- Process Description:
-- Implements a Sample and hold register for the outbound status
-- signals to the Write Status Controller (WSC). This register
-- has to support back to back transfer completions.
--
-------------------------------------------------------------
IMP_PUSH2WSC_FLOP : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (mmap_reset = '1' or
(sig_push_to_wsc_cmplt = '1' and
sig_set_push2wsc = '0')) then
sig_push_to_wsc <= '0';
sig_data2wsc_tag <= (others => '0');
sig_data2wsc_calc_err <= '0';
sig_data2wsc_last_err <= '0';
sig_data2wsc_cmd_cmplt <= '0';
elsif (sig_set_push2wsc = '1' and
sig_tlast_err_stop = '0') then
sig_push_to_wsc <= '1';
sig_data2wsc_tag <= sig_tag_reg ;
sig_data2wsc_calc_err <= sig_calc_error_reg ;
sig_data2wsc_last_err <= sig_tlast_error_reg or
sig_tlast_error ;
-- sig_data2wsc_cmd_cmplt <= sig_cmd_cmplt_reg or
-- sig_tlast_error_reg or
-- sig_tlast_error ;
sig_data2wsc_cmd_cmplt <= sig_cmd_cmplt_reg or
(sig_tlast_error_reg and
(sig_no_posted_cmds or
sig_apc_going2zero ));
else
null; -- hold current state
end if;
end if;
end process IMP_PUSH2WSC_FLOP;
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_LD_NEW_CMD_REG
--
-- Process Description:
-- Registers the flag indicating a new command has been
-- loaded. Needs to be a 1 clk wide pulse.
--
-------------------------------------------------------------
IMP_LD_NEW_CMD_REG : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (mmap_reset = '1' or
sig_ld_new_cmd_reg = '1') then
sig_ld_new_cmd_reg <= '0';
else
sig_ld_new_cmd_reg <= sig_ld_new_cmd;
end if;
end if;
end process IMP_LD_NEW_CMD_REG;
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_NXT_LEN_REG
--
-- Process Description:
-- Registers the load control and length value for a command
-- passed to the WDC input command interface. The registered
-- signals are used for the external Store and forward support
-- ports.
--
-------------------------------------------------------------
IMP_NXT_LEN_REG : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (mmap_reset = '1') then
sig_s2mm_ld_nxt_len <= '0';
sig_s2mm_wr_len <= (others => '0');
else
sig_s2mm_ld_nxt_len <= mstr2data_cmd_valid and
sig_data2mstr_cmd_ready;
sig_s2mm_wr_len <= mstr2data_len;
end if;
end if;
end process IMP_NXT_LEN_REG;
------------------------------------------------------------
-- If Generate
--
-- Label: GEN_NO_DATA_CNTL_FIFO
--
-- If Generate Description:
-- Omits the input data control FIFO if the requested FIFO
-- depth is 1. The Data Qualifier Register serves as a
-- 1 deep FIFO by itself.
--
------------------------------------------------------------
GEN_NO_DATA_CNTL_FIFO : if (C_DATA_CNTL_FIFO_DEPTH = 1) generate
begin
-- Command Calculator Handshake output
sig_data2mstr_cmd_ready <= sig_fifo_wr_cmd_ready ;
sig_fifo_rd_cmd_valid <= mstr2data_cmd_valid ;
sig_fifo_wr_cmd_ready <= sig_push_dqual_reg ;
sig_fifo_next_tag <= mstr2data_tag ;
sig_fifo_next_sadddr_lsb <= mstr2data_saddr_lsb ;
sig_fifo_next_len <= mstr2data_len ;
sig_fifo_next_strt_strb <= mstr2data_strt_strb ;
sig_fifo_next_last_strb <= mstr2data_last_strb ;
sig_fifo_next_drr <= mstr2data_drr ;
sig_fifo_next_eof <= mstr2data_eof ;
sig_fifo_next_sequential <= mstr2data_sequential ;
sig_fifo_next_cmd_cmplt <= mstr2data_cmd_cmplt ;
sig_fifo_next_calc_error <= mstr2data_calc_error ;
end generate GEN_NO_DATA_CNTL_FIFO;
------------------------------------------------------------
-- If Generate
--
-- Label: GEN_DATA_CNTL_FIFO
--
-- If Generate Description:
-- Includes the input data control FIFO if the requested
-- FIFO depth is more than 1.
--
------------------------------------------------------------
GEN_DATA_CNTL_FIFO : if (C_DATA_CNTL_FIFO_DEPTH > 1) generate
begin
-- Command Calculator Handshake output
sig_data2mstr_cmd_ready <= sig_fifo_wr_cmd_ready;
sig_fifo_wr_cmd_valid <= mstr2data_cmd_valid ;
-- pop the fifo when dqual reg is pushed
sig_fifo_rd_cmd_ready <= sig_push_dqual_reg;
-- Format the input fifo data word
sig_cmd_fifo_data_in <= mstr2data_calc_error &
mstr2data_cmd_cmplt &
mstr2data_sequential &
mstr2data_eof &
mstr2data_drr &
mstr2data_last_strb &
mstr2data_strt_strb &
mstr2data_len &
mstr2data_saddr_lsb &
mstr2data_tag ;
-- Rip the output fifo data word
sig_fifo_next_tag <= sig_cmd_fifo_data_out((TAG_STRT_INDEX+TAG_WIDTH)-1 downto
TAG_STRT_INDEX);
sig_fifo_next_sadddr_lsb <= sig_cmd_fifo_data_out((SADDR_LSB_STRT_INDEX+SADDR_LSB_WIDTH)-1 downto
SADDR_LSB_STRT_INDEX);
sig_fifo_next_len <= sig_cmd_fifo_data_out((LEN_STRT_INDEX+LEN_WIDTH)-1 downto
LEN_STRT_INDEX);
sig_fifo_next_strt_strb <= sig_cmd_fifo_data_out((STRT_STRB_STRT_INDEX+STRB_WIDTH)-1 downto
STRT_STRB_STRT_INDEX);
sig_fifo_next_last_strb <= sig_cmd_fifo_data_out((LAST_STRB_STRT_INDEX+STRB_WIDTH)-1 downto
LAST_STRB_STRT_INDEX);
sig_fifo_next_drr <= sig_cmd_fifo_data_out(DRR_STRT_INDEX);
sig_fifo_next_eof <= sig_cmd_fifo_data_out(EOF_STRT_INDEX);
sig_fifo_next_sequential <= sig_cmd_fifo_data_out(SEQUENTIAL_STRT_INDEX);
sig_fifo_next_cmd_cmplt <= sig_cmd_fifo_data_out(CMD_CMPLT_STRT_INDEX);
sig_fifo_next_calc_error <= sig_cmd_fifo_data_out(CALC_ERR_STRT_INDEX);
------------------------------------------------------------
-- Instance: I_DATA_CNTL_FIFO
--
-- Description:
-- Instance for the Command Qualifier FIFO
--
------------------------------------------------------------
I_DATA_CNTL_FIFO : entity axi_master_burst_v2_0.axi_master_burst_fifo
generic map (
C_DWIDTH => DCTL_FIFO_WIDTH ,
C_DEPTH => C_DATA_CNTL_FIFO_DEPTH ,
C_IS_ASYNC => USE_SYNC_FIFO ,
C_PRIM_TYPE => FIFO_PRIM_TYPE ,
C_FAMILY => C_FAMILY
)
port map (
-- Write Clock and reset
fifo_wr_reset => mmap_reset ,
fifo_wr_clk => primary_aclk ,
-- Write Side
fifo_wr_tvalid => sig_fifo_wr_cmd_valid ,
fifo_wr_tready => sig_fifo_wr_cmd_ready ,
fifo_wr_tdata => sig_cmd_fifo_data_in ,
fifo_wr_full => open ,
-- Read Clock and reset
fifo_async_rd_reset => mmap_reset ,
fifo_async_rd_clk => primary_aclk ,
-- Read Side
fifo_rd_tvalid => sig_fifo_rd_cmd_valid ,
fifo_rd_tready => sig_fifo_rd_cmd_ready ,
fifo_rd_tdata => sig_cmd_fifo_data_out ,
fifo_rd_empty => sig_cmd_fifo_empty
);
end generate GEN_DATA_CNTL_FIFO;
-- Data Qualifier Register ------------------------------------
sig_ld_new_cmd <= sig_push_dqual_reg ;
sig_dqual_rdy <= sig_dqual_reg_full ;
sig_strt_strb_reg <= sig_next_strt_strb_reg ;
sig_last_strb_reg <= sig_next_last_strb_reg ;
sig_tag_reg <= sig_next_tag_reg ;
sig_cmd_cmplt_reg <= sig_next_cmd_cmplt_reg ;
sig_calc_error_reg <= sig_next_calc_error_reg ;
sig_cmd_is_eof <= sig_next_eof_reg ;
-- new for no bubbles between child requests
sig_sequential_push <= sig_good_mmap_dbeat and -- MMap handshake qualified
sig_last_dbeat and -- last data beat of transfer
sig_next_sequential_reg;-- next queued command is sequential
-- to the current command
sig_push_dqual_reg <= (sig_sequential_push or
sig_dqual_reg_empty) and
sig_fifo_rd_cmd_valid and
sig_aposted_cntr_ready and
not(sig_calc_error_reg) and -- 13.1 addition => An error has not been propagated
not(wsc2mstr_halt_pipe); -- The Wr Status Controller is not
-- stalling the command execution pipe
sig_pop_dqual_reg <= not(sig_next_calc_error_reg) and
sig_get_next_dqual and
sig_dqual_reg_full ;
-- new for no bubbles between child requests
sig_clr_dqual_reg <= mmap_reset or
(sig_pop_dqual_reg and
not(sig_push_dqual_reg));
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_DQUAL_REG
--
-- Process Description:
-- This process implements a register for the Data
-- Control and qualifiers. It operates like a 1 deep Sync FIFO.
--
-------------------------------------------------------------
IMP_DQUAL_REG : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (sig_clr_dqual_reg = '1') then
sig_next_tag_reg <= (others => '0');
sig_next_strt_strb_reg <= (others => '0');
sig_next_last_strb_reg <= (others => '0');
sig_next_eof_reg <= '0' ;
sig_next_sequential_reg <= '0' ;
sig_next_cmd_cmplt_reg <= '0' ;
sig_next_calc_error_reg <= '0' ;
sig_dqual_reg_empty <= '1' ;
sig_dqual_reg_full <= '0' ;
elsif (sig_push_dqual_reg = '1') then
sig_next_tag_reg <= sig_fifo_next_tag ;
sig_next_strt_strb_reg <= sig_sfhalt_next_strt_strb ;
sig_next_last_strb_reg <= sig_fifo_next_last_strb ;
sig_next_eof_reg <= sig_fifo_next_eof ;
sig_next_sequential_reg <= sig_fifo_next_sequential ;
sig_next_cmd_cmplt_reg <= sig_fifo_next_cmd_cmplt ;
sig_next_calc_error_reg <= sig_fifo_next_calc_error ;
sig_dqual_reg_empty <= '0';
sig_dqual_reg_full <= '1';
else
null; -- don't change state
end if;
end if;
end process IMP_DQUAL_REG;
-- Address LS Cntr logic --------------------------
sig_addr_lsb_reg <= STD_LOGIC_VECTOR(sig_ls_addr_cntr);
sig_addr_incr_unsgnd <= TO_UNSIGNED(ADDR_INCR_VALUE, C_SEL_ADDR_WIDTH);
sig_incr_ls_addr_cntr <= sig_good_mmap_dbeat;
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: DO_ADDR_LSB_CNTR
--
-- Process Description:
-- Implements the LS Address Counter used for controlling
-- the Write STRB DeMux during Burst transfers
--
-------------------------------------------------------------
DO_ADDR_LSB_CNTR : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (mmap_reset = '1' or
(sig_pop_dqual_reg = '1'and
sig_push_dqual_reg = '0')) then -- Clear the Counter
sig_ls_addr_cntr <= (others => '0');
elsif (sig_push_dqual_reg = '1') then -- Load the Counter
sig_ls_addr_cntr <= unsigned(sig_fifo_next_sadddr_lsb);
elsif (sig_incr_ls_addr_cntr = '1') then -- Increment the Counter
sig_ls_addr_cntr <= sig_ls_addr_cntr + sig_addr_incr_unsgnd;
else
null; -- Hold Current value
end if;
end if;
end process DO_ADDR_LSB_CNTR;
-- Address Posted Counter Logic --------------------------------------
sig_addr_chan_rdy <= not(sig_addr_posted_cntr_eq_0 or
sig_apc_going2zero) ; -- Gates data channel xfer handshake
sig_aposted_cntr_ready <= not(sig_addr_posted_cntr_max) ; -- Gates new command fetching
sig_no_posted_cmds <= sig_addr_posted_cntr_eq_0 ; -- Used for flushing cmds that are posted
sig_incr_addr_posted_cntr <= sig_addr_posted ;
sig_decr_addr_posted_cntr <= sig_last_mmap_dbeat_reg ;
sig_addr_posted_cntr_eq_0 <= '1'
when (sig_addr_posted_cntr = ADDR_POSTED_ZERO)
Else '0';
sig_addr_posted_cntr_max <= '1'
when (sig_addr_posted_cntr = ADDR_POSTED_MAX)
Else '0';
sig_addr_posted_cntr_eq_1 <= '1'
when (sig_addr_posted_cntr = ADDR_POSTED_ONE)
Else '0';
sig_apc_going2zero <= sig_addr_posted_cntr_eq_1 and
sig_decr_addr_posted_cntr and
not(sig_incr_addr_posted_cntr);
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_ADDR_POSTED_FIFO_CNTR
--
-- Process Description:
-- This process implements a counter for the tracking
-- if an Address has been posted on the AXI address channel.
-- The Data Controller must wait for an address to be posted
-- before proceeding with the corresponding data transfer on
-- the Data Channel. The counter is also used to track flushing
-- operations where all transfers commited on the AXI Address
-- Channel have to be completed before a halt can occur.
-------------------------------------------------------------
IMP_ADDR_POSTED_FIFO_CNTR : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (mmap_reset = '1') then
sig_addr_posted_cntr <= ADDR_POSTED_ZERO;
elsif (sig_incr_addr_posted_cntr = '1' and
sig_decr_addr_posted_cntr = '0' and
sig_addr_posted_cntr_max = '0') then
sig_addr_posted_cntr <= sig_addr_posted_cntr + ADDR_POSTED_ONE ;
elsif (sig_incr_addr_posted_cntr = '0' and
sig_decr_addr_posted_cntr = '1' and
sig_addr_posted_cntr_eq_0 = '0') then
sig_addr_posted_cntr <= sig_addr_posted_cntr - ADDR_POSTED_ONE ;
else
null; -- don't change state
end if;
end if;
end process IMP_ADDR_POSTED_FIFO_CNTR;
------- First/Middle/Last Dbeat detimination -------------------
sig_new_len_eq_0 <= '1'
When (sig_fifo_next_len = LEN_OF_ZERO)
else '0';
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: DO_FIRST_MID_LAST
--
-- Process Description:
-- Implements the detection of the First/Mid/Last databeat of
-- a transfer.
--
-------------------------------------------------------------
DO_FIRST_MID_LAST : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (mmap_reset = '1') then
sig_first_dbeat <= '0';
sig_last_dbeat <= '0';
sig_single_dbeat <= '0';
elsif (sig_ld_new_cmd = '1') then
sig_first_dbeat <= not(sig_new_len_eq_0);
sig_last_dbeat <= sig_new_len_eq_0;
sig_single_dbeat <= sig_new_len_eq_0;
Elsif (sig_dbeat_cntr_eq_1 = '1' and
sig_good_mmap_dbeat = '1') Then
sig_first_dbeat <= '0';
sig_last_dbeat <= '1';
sig_single_dbeat <= '0';
Elsif (sig_dbeat_cntr_eq_0 = '0' and
sig_dbeat_cntr_eq_1 = '0' and
sig_good_mmap_dbeat = '1') Then
sig_first_dbeat <= '0';
sig_last_dbeat <= '0';
sig_single_dbeat <= '0';
else
null; -- hold current state
end if;
end if;
end process DO_FIRST_MID_LAST;
------- Data Controller Halted Indication -------------------------------
data2all_dcntlr_halted <= sig_no_posted_cmds or
sig_calc_error_reg;
------- Data Beat counter logic -------------------------------
sig_dbeat_cntr_int <= TO_INTEGER(sig_dbeat_cntr);
sig_dbeat_cntr_eq_0 <= '1'
when (sig_dbeat_cntr_int = 0)
Else '0';
sig_dbeat_cntr_eq_1 <= '1'
when (sig_dbeat_cntr_int = 1)
Else '0';
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: DO_DBEAT_CNTR
--
-- Process Description:
-- Implements the transfer data beat counter used to track
-- progress of the transfer.
--
-------------------------------------------------------------
DO_DBEAT_CNTR : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (mmap_reset = '1') then
sig_dbeat_cntr <= (others => '0');
elsif (sig_ld_new_cmd = '1') then
sig_dbeat_cntr <= unsigned(sig_fifo_next_len);
Elsif (sig_good_mmap_dbeat = '1' and
sig_dbeat_cntr_eq_0 = '0') Then
sig_dbeat_cntr <= sig_dbeat_cntr-1;
else
null; -- Hold current state
end if;
end if;
end process DO_DBEAT_CNTR;
------- Soft Shutdown Logic -------------------------------
-- Formulate the soft shutdown complete flag
sig_data2rst_stop_cmplt <= (sig_halt_reg_dly3 and -- Normal Mode shutdown
sig_no_posted_cmds and
not(sig_calc_error_reg)) or
(sig_halt_reg_dly3 and -- Shutdown after error trap
sig_calc_error_reg);
-- Generate a gate signal to deassert the WVALID output
-- for 1 clock cycle after a WLAST is issued. This only
-- occurs when in soft shutdown mode.
sig_stop_wvalid <= (sig_last_mmap_dbeat_reg and
sig_halt_reg) or
sig_data2rst_stop_cmplt;
-- Assign the output port skid buf control for the
-- input Stream skid buffer
data2skid_halt <= sig_data2skid_halt;
-- Create a 1 clock wide pulse to tell the input
-- stream skid buffer to shut down.
sig_data2skid_halt <= sig_halt_reg_dly2 and
not(sig_halt_reg_dly3);
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_HALT_REQ_REG
--
-- Process Description:
-- Implements the flop for capturing the Halt request from
-- the Reset module.
--
-------------------------------------------------------------
IMP_HALT_REQ_REG : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (mmap_reset = '1') then
sig_halt_reg <= '0';
-- coverage off
elsif (rst2data_stop_request = '1') then
sig_halt_reg <= '1';
-- coverage on
else
null; -- Hold current State
end if;
end if;
end process IMP_HALT_REQ_REG;
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_HALT_REQ_REG_DLY
--
-- Process Description:
-- Implements the flops for delaying the halt request by 3
-- clocks to allow the Address Controller to halt before the
-- Data Contoller can safely indicate it has exhausted all
-- transfers committed to the AXI Address Channel by the Address
-- Controller.
--
-------------------------------------------------------------
IMP_HALT_REQ_REG_DLY : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (mmap_reset = '1') then
sig_halt_reg_dly1 <= '0';
sig_halt_reg_dly2 <= '0';
sig_halt_reg_dly3 <= '0';
else
sig_halt_reg_dly1 <= sig_halt_reg;
sig_halt_reg_dly2 <= sig_halt_reg_dly1;
sig_halt_reg_dly3 <= sig_halt_reg_dly2;
end if;
end if;
end process IMP_HALT_REQ_REG_DLY;
end implementation;
| apache-2.0 | be154d05dddabbfe8851db4959caee99 | 0.471654 | 4.58392 | false | false | false | false |
rhexsel/xinu-cMIPS | vhdl/cache.vhd | 2 | 23,552 | -- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-- cMIPS, a VHDL model of the classical five stage MIPS pipeline.
-- Copyright (C) 2013 Roberto Andre Hexsel
--
-- This program is free software: you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation, version 3.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program. If not, see <http://www.gnu.org/licenses/>.
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-- data cache, byte-indexed, write-through, no write-allocate on wr-miss
-- TODO: critical-word first, store-buffer, write-buffer, associativity
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.p_wires.all;
use work.p_memory.all;
entity D_CACHE is
port (rst : in std_logic;
clk4x : in std_logic;
cpu_sel : in std_logic; -- active in '0'
cpu_rdy : out std_logic; -- active in '0'
cpu_wr : in std_logic; -- active in '0'
cpu_addr : in reg32;
cpu_data_inp : in reg32; -- data from CPU
cpu_data_out : out reg32; -- data to CPU
cpu_xfer : in reg4;
mem_sel : out std_logic; -- active in '0'
mem_rdy : in std_logic; -- active in '0'
mem_wr : out std_logic; -- active in '0'
mem_addr : out reg32;
mem_data_inp : in reg32; -- data from memory
mem_data_out : out reg32; -- data to memory
mem_xfer : out reg4;
ref_cnt : out integer;
rd_hit_cnt : out integer;
wr_hit_cnt : out integer;
flush_cnt : out integer); -- for write-back caches
constant DC_TAG_BITS : natural :=
DC_BTS_PER_WORD - (DC_INDEX_BITS + DC_WORD_SEL_BITS + DC_BYTE_SEL_BITS);
constant DC_TOP_TAG : natural := 31;
constant DC_BOT_TAG : natural := 32 - DC_TAG_BITS;
constant DC_TOP_INDEX : natural := 32 - (DC_TAG_BITS + 1);
constant DC_BOT_INDEX : natural := 32 - (DC_TAG_BITS + DC_INDEX_BITS);
constant DC_TOP_W_SEL : natural := 32 - (DC_TAG_BITS + DC_INDEX_BITS + 1);
constant DC_BOT_W_SEL : natural :=
32-(DC_TAG_BITS + DC_INDEX_BITS + DC_WORD_SEL_BITS);
constant DC_TOP_B_SEL : natural := DC_BYTE_SEL_BITS - 1;
constant DC_BOT_B_SEL : natural := 0;
end entity D_CACHE;
architecture behavioral of D_CACHE is
type dc_block is array (natural range 0 to (DC_WORDS_PER_BLOCK-1)) of reg32;
type dc_data is array (natural range 0 to (DC_NUM_BLOCKS-1)) of dc_block;
signal dc_data_matrix : dc_data;
type dc_tag is record
val : std_logic;
tag : std_logic_vector((DC_TAG_BITS-1) downto 0);
end record;
type dc_tags is array (natural range 0 to (DC_NUM_BLOCKS-1)) of dc_tag;
signal dc_tags_matrix : dc_tags;
signal miss,blk_filled,next_word,ref_mem : std_logic := '0';
type dc_state is (st_idle, st_check, st_hit, st_start, st_waiting, st_done);
attribute SYN_ENCODING of dc_state : type is "safe";
signal dc_current_st,dc_next_st :dc_state;
signal dc_current : integer;
signal dbg_index : std_logic_vector(DC_INDEX_BITS-1 downto 0);
signal dbg_wd_sel : std_logic_vector(DC_WORD_SEL_BITS-1 downto 0);
signal data_rdy : std_logic;
begin
U_bus_protocol: block
begin
U_st_reg: process(rst,clk4x)
begin
if rst = '0' then
dc_current_st <= st_idle;
elsif rising_edge(clk4x) then
dc_current_st <= dc_next_st;
end if;
end process U_st_reg;
dc_current <= dc_state'pos(dc_current_st); -- for debugging only
U_st_transitions: process(dc_current_st,cpu_sel,miss,mem_rdy,blk_filled)
begin
case dc_current_st is
when st_idle => -- 0
cpu_rdy <= '1';
mem_sel <= '1';
data_rdy <= '1';
ref_mem <= '0';
next_word <= '0';
if cpu_sel = '0' then
dc_next_st <= st_check;
else
dc_next_st <= st_idle;
end if;
when st_check => -- 1
cpu_rdy <= '0';
if cpu_wr = '1' and miss = '0' then
dc_next_st <= st_hit;
else
dc_next_st <= st_start; -- miss or write-through
end if;
when st_hit => -- 2
cpu_rdy <= '1';
if cpu_sel = '0' then -- IF or MEM stalled
dc_next_st <= st_hit;
else
dc_next_st <= st_idle;
end if;
when st_start => -- 3
cpu_rdy <= '0';
mem_sel <= '0';
data_rdy <= '1';
ref_mem <= '1';
next_word <= '0';
dc_next_st <= st_waiting;
when st_waiting => -- 4
data_rdy <= '0';
if mem_rdy = '0' then
dc_next_st <= st_waiting;
else
dc_next_st <= st_done;
end if;
when st_done => -- 5
mem_sel <= '1';
data_rdy <= '1';
ref_mem <= '0';
next_word <= '1';
if blk_filled = '1' then
dc_next_st <= st_hit;
else
dc_next_st <= st_start;
end if;
when others =>
assert false report "DATA_CACHE stateMachine broken" &
integer'image(dc_state'pos(dc_current_st)) severity failure;
end case;
end process U_st_transitions;
end block U_bus_protocol;
U_access: process
variable inp_tag : std_logic_vector(DC_TAG_BITS-1 downto 0);
variable inp_index : std_logic_vector(DC_INDEX_BITS-1 downto 0);
variable inp_w_sel : std_logic_vector(DC_WORD_SEL_BITS-1 downto 0);
variable inp_b_sel : std_logic_vector(DC_BYTE_SEL_BITS-1 downto 0);
variable i_index, i_w_sel : integer;
variable u_w_sel : signed(DC_WORD_SEL_BITS-1 downto 0);
variable s_w_sel : std_logic_vector(DC_WORD_SEL_BITS-1 downto 0);
variable tag : dc_tag;
variable blk : dc_block;
variable wd_sel : integer;
variable d_word : reg32;
variable i_ref_cnt, i_rd_hit_cnt, i_wr_hit_cnt, i_flush_cnt: integer := 0;
variable v_miss : std_logic := '0';
begin
if rst = '1' then -- not reset, normal operation
wait until cpu_sel = '0';
inp_tag := cpu_addr(DC_TOP_TAG downto DC_BOT_TAG);
inp_index := cpu_addr(DC_TOP_INDEX downto DC_BOT_INDEX);
inp_w_sel := cpu_addr(DC_TOP_W_SEL downto DC_BOT_W_SEL);
inp_b_sel := cpu_addr(DC_TOP_B_SEL downto DC_BOT_B_SEL);
i_index := to_integer(unsigned(inp_index));
i_w_sel := to_integer(unsigned(inp_w_sel));
tag := dc_tags_matrix(i_index);
i_ref_cnt := i_ref_cnt + 1;
-- assert false report "cache val=" & SL2STR(tag.val) &
-- " tag=" & SLV2STR(tag.tag) & " idx=" & integer'image(i_index) &
-- " wr=" & SL2STR(cpu_wr); -- DEBUG
if (tag.val = '1') and (tag.tag = inp_tag) then
v_miss := '0'; -- HIT: fetch word from block
miss <= '0';
else
v_miss := '1';
miss <= '1';
end if;
if cpu_wr = '1' then -- READ
if v_miss = '0' then -- READ-hit
blk := dc_data_matrix(i_index);
d_word := blk(i_w_sel);
dbg_index <= inp_index;
dbg_wd_sel <= inp_w_sel;
i_rd_hit_cnt := i_rd_hit_cnt + 1;
-- assert false report "cache val=" & SL2STR(tag.val) &
-- " idx=" & integer'image(i_index) &"["& integer'image(i_w_sel)&
-- "] wr=" & SL2STR(cpu_wr) &" "& SLV32HEX(d_word); -- DEBUG
else -- READ-miss; fill block from RAM
mem_wr <= '1';
mem_xfer <= b"1111";
blk_filled <= '0';
for i in 0 to DC_WORDS_PER_BLOCK-1 loop
-- cpu_data_out <= (others => 'X');
wd_sel := (i_w_sel + i) mod DC_WORDS_PER_BLOCK;
u_w_sel := to_signed(wd_sel, DC_WORD_SEL_BITS);
s_w_sel := std_logic_vector(signed(u_w_sel));
mem_addr <= inp_tag & inp_index & s_w_sel & inp_b_sel;
dbg_index <= inp_index;
dbg_wd_sel <= s_w_sel;
wait until rising_edge(data_rdy);
blk(wd_sel) := mem_data_inp;
end loop; -- i;
blk_filled <= '1';
tag.tag := inp_tag;
tag.val := '1';
dc_tags_matrix(i_index) <= tag;
dc_data_matrix(i_index) <= blk;
d_word := blk(i_w_sel);
-- assert false report "cache val=" & SL2STR(tag.val) &
-- " idx=" & integer'image(i_index) &"["& integer'image(i_w_sel)&
-- "] wr=" & SL2STR(cpu_wr) &" "& SLV32HEX(d_word); -- DEBUG
end if; -- READ-miss
cpu_data_out <= d_word; -- block filled, send to CPU
-- case cpu_xfer is -- partial word-write, handled by RAM
-- when b"1111" => -- LW
-- cpu_data <= d_word;
-- when b"1100" => -- LH top-half
-- cpu_data(31 downto 16) <= d_word(31 downto 16);
-- cpu_data(15 downto 0) <= (others => 'X');
-- when b"0011" => -- LH bottom-half
-- cpu_data(31 downto 16) <= (others => 'X');
-- cpu_data(15 downto 0) <= d_word(15 downto 0);
-- when b"0001" => -- LB top byte
-- cpu_data(31 downto 8) <= (others => 'X');
-- cpu_data(7 downto 0) <= d_word(7 downto 0);
-- when b"0010" => -- LB mid-top byte
-- cpu_data(31 downto 16) <= (others => 'X');
-- cpu_data(15 downto 8) <= d_word(15 downto 8);
-- cpu_data(7 downto 0) <= (others => 'X');
-- when b"0100" => -- LB mid-bot byte
-- cpu_data(31 downto 24) <= (others => 'X');
-- cpu_data(23 downto 16) <= d_word(23 downto 16);
-- cpu_data(15 downto 0) <= (others => 'X');
-- when b"1000" => -- LB bottom byte
-- cpu_data(31 downto 24) <= d_word(31 downto 24);
-- cpu_data(23 downto 0) <= (others => 'X');
-- when others => cpu_data <= (others => 'X');
-- end case;
mem_wr <= '1';
mem_xfer <= b"0000";
mem_data_out <= (others => 'X');
mem_addr <= (others => 'X');
wait until rising_edge(cpu_sel);
cpu_data_out <= (others => 'X');
else -- WRITE
if v_miss = '0' then -- WRITE-hit
blk := dc_data_matrix(i_index);
d_word := blk(i_w_sel); -- merge partial writes in-cache
case cpu_xfer is
when b"1111" => -- LW
d_word := cpu_data_inp;
when b"1100" => -- LH top-half
d_word(31 downto 16) := cpu_data_inp(15 downto 0);
when b"0011" => -- LH bottom-half
d_word(15 downto 0) := cpu_data_inp(15 downto 0);
when b"0001" => -- LB top byte
d_word(7 downto 0) := cpu_data_inp(7 downto 0);
when b"0010" => -- LB mid-top byte
d_word(15 downto 8) := cpu_data_inp(7 downto 0);
when b"0100" => -- LB mid-bot byte
d_word(23 downto 16) := cpu_data_inp(7 downto 0);
when b"1000" => -- LB bottom byte
d_word(31 downto 24) := cpu_data_inp(7 downto 0);
when others => d_word := (others => 'X');
end case;
blk(i_w_sel) := d_word;
dc_data_matrix(i_index) <= blk;
-- assert false report "wrHIT val=" & SL2STR(tag.val) &
-- " idx=" & integer'image(i_index) &"["& integer'image(i_w_sel)&
-- "] wr=" & SL2STR(cpu_wr) &" "& SLV32HEX(d_word); -- DEBUG
dbg_index <= inp_index;
dbg_wd_sel <= s_w_sel;
i_wr_hit_cnt := i_wr_hit_cnt + 1;
end if;
-- write through to memory
wd_sel := i_w_sel;
u_w_sel := to_signed(wd_sel, DC_WORD_SEL_BITS);
s_w_sel := std_logic_vector(signed(u_w_sel));
mem_addr <= inp_tag & inp_index & s_w_sel & inp_b_sel;
dbg_index <= inp_index;
dbg_wd_sel <= s_w_sel;
blk_filled <= '0';
mem_wr <= '0';
mem_xfer <= cpu_xfer;
mem_data_out <= cpu_data_inp;
-- assert false report "wrMEM val=" & SL2STR(tag.val) &
-- " idx=" & integer'image(i_index) &"["& integer'image(i_w_sel)&
-- "] wr=" & SL2STR(cpu_wr) &" "& SLV32HEX(cpu_data); -- DEBUG
wait until falling_edge(ref_mem);
blk_filled <= '1';
mem_wr <= '1';
mem_xfer <= b"0000";
mem_data_out <= (others => 'X');
mem_addr <= (others => 'X');
end if; -- READ/WRITE
else -- reset: initialize cache tags, all interfaces in tri-state
cpu_data_out <= (others => 'X');
mem_data_out <= (others => 'X');
mem_addr <= (others => 'X');
mem_xfer <= b"0000";
mem_wr <= '1';
miss <= '0';
blk_filled <= '0';
d_word := (others => 'X');
inp_tag := (others => 'X');
inp_index := (others => 'X');
inp_w_sel := (others => 'X');
tag.val := '0';
tag.tag := (others => 'X');
for i in dc_tags_matrix'range loop
dc_tags_matrix(i) <= tag;
end loop;
i_ref_cnt := 0;
i_rd_hit_cnt := 0;
i_wr_hit_cnt := 0;
i_flush_cnt := 0;
end if; -- reset
ref_cnt <= i_ref_cnt;
rd_hit_cnt <= i_rd_hit_cnt;
wr_hit_cnt <= i_wr_hit_cnt;
flush_cnt <= i_flush_cnt;
wait on rst, cpu_sel, cpu_wr, ref_mem, data_rdy, dc_current_st;
end process U_access; ---------------------------------------------------
end behavioral;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-- fake data cache -- pass along all signals unchanged
-- TODO:
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
architecture fake of D_CACHE is
begin
mem_sel <= cpu_sel;
cpu_rdy <= mem_rdy;
mem_wr <= cpu_wr;
mem_addr <= cpu_addr;
mem_xfer <= cpu_xfer;
mem_data_out <= cpu_data_inp when (cpu_sel = '0') and (cpu_wr = '0') else
(others => 'X');
cpu_data_out <= mem_data_inp when (cpu_sel = '0') and (cpu_wr = '1') else
(others => 'X');
ref_cnt <= 0;
rd_hit_cnt <= 0;
wr_hit_cnt <= 0;
flush_cnt <= 0;
end fake;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-- instruction cache, word-indexed
-- TODO: early restart, associativity
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.p_wires.all;
use work.p_memory.all;
entity I_CACHE is
port (rst : in std_logic;
clk4x : in std_logic;
ic_reset : out std_logic; -- active in '0'
cpu_sel : in std_logic; -- active in '0'
cpu_rdy : out std_logic; -- active in '0'
cpu_addr : in reg32;
cpu_data : out reg32;
mem_sel : out std_logic; -- active in '0'
mem_rdy : in std_logic; -- active in '0'
mem_addr : out reg32;
mem_data : in reg32;
ref_cnt : out integer;
hit_cnt : out integer);
constant IC_TAG_BITS : natural :=
IC_BTS_PER_WORD - (IC_INDEX_BITS + IC_WORD_SEL_BITS + IC_BYTE_SEL_BITS);
constant IC_TOP_TAG : natural := 31;
constant IC_BOT_TAG : natural := 32 - IC_TAG_BITS;
constant IC_TOP_INDEX : natural := 32 - (IC_TAG_BITS + 1);
constant IC_BOT_INDEX : natural := 32 - (IC_TAG_BITS + IC_INDEX_BITS);
constant IC_TOP_W_SEL : natural := 32 - (IC_TAG_BITS + IC_INDEX_BITS + 1);
constant IC_BOT_W_SEL : natural :=
32 - (IC_TAG_BITS + IC_INDEX_BITS + IC_WORD_SEL_BITS);
end entity I_CACHE;
architecture behavioral of I_CACHE is
type ic_block is array (natural range 0 to (IC_WORDS_PER_BLOCK-1)) of reg32;
type ic_data is array (natural range 0 to (IC_NUM_BLOCKS-1)) of ic_block;
signal ic_data_matrix : ic_data;
type ic_tag is record
val : std_logic;
tag : std_logic_vector((IC_TAG_BITS-1) downto 0);
end record;
type ic_tags is array (natural range 0 to (IC_NUM_BLOCKS-1)) of ic_tag;
signal ic_tags_matrix : ic_tags;
signal miss,blk_filled,next_word : std_logic := '0';
type ic_state is(st_idle, st_check, st_hit, st_start, st_waiting, st_done);
attribute SYN_ENCODING of ic_state : type is "safe";
signal ic_current_st,ic_next_st : ic_state;
signal ic_current : integer;
signal dbg_index : std_logic_vector(IC_INDEX_BITS-1 downto 0);
signal dbg_wd_sel : std_logic_vector(IC_WORD_SEL_BITS-1 downto 0);
begin
ic_reset <= '1';
U_st_reg: process(rst,clk4x)
begin
if rst = '0' then
ic_current_st <= st_idle;
elsif rising_edge(clk4x) then
ic_current_st <= ic_next_st;
end if;
end process U_st_reg;
ic_current <= ic_state'pos(ic_current_st); -- for debugging only
U_st_transitions: process(ic_current_st,cpu_sel,miss,mem_rdy,blk_filled)
begin
case ic_current_st is
when st_idle =>
cpu_rdy <= '1';
mem_sel <= '1';
next_word <= '0';
if cpu_sel = '0' then
ic_next_st <= st_check;
else
ic_next_st <= st_idle;
end if;
when st_check =>
cpu_rdy <= '1';
mem_sel <= '1';
if miss = '0' then
ic_next_st <= st_hit;
else
ic_next_st <= st_start;
end if;
when st_hit =>
cpu_rdy <= '1';
mem_sel <= '1';
if cpu_sel = '0' then -- IFetch or MEM stalled
ic_next_st <= st_hit;
else
ic_next_st <= st_idle;
end if;
when st_start =>
cpu_rdy <= '0';
mem_sel <= '0';
next_word <= '0';
ic_next_st <= st_waiting;
when st_waiting =>
cpu_rdy <= '0';
mem_sel <= '0';
if mem_rdy = '0' then
ic_next_st <= st_waiting;
else
ic_next_st <= st_done;
end if;
when st_done =>
cpu_rdy <= '0';
mem_sel <= '1';
next_word <= '1';
if blk_filled = '1' then
ic_next_st <= st_hit;
else
ic_next_st <= st_start;
end if;
when others =>
cpu_rdy <= 'X';
mem_sel <= 'X';
assert false report "I_CACHE stateMachine broken" &
integer'image(ic_state'pos(ic_current_st)) severity failure;
end case;
end process U_st_transitions;
U_access: process
variable inp_tag : std_logic_vector(IC_TAG_BITS-1 downto 0);
variable inp_index : std_logic_vector(IC_INDEX_BITS-1 downto 0);
variable inp_w_sel : std_logic_vector(IC_WORD_SEL_BITS-1 downto 0);
-- variable byte_sel : std_logic_vector(IC_BYTE_SEL_BITS-1 downto 0)
-- := (others => '0');
variable i_ref_cnt, i_hit_cnt: integer := 0;
variable i_index, i_w_sel : integer;
variable u_w_sel : signed(IC_WORD_SEL_BITS-1 downto 0);
variable s_w_sel : std_logic_vector(IC_WORD_SEL_BITS-1 downto 0);
variable tag : ic_tag;
variable blk : ic_block;
variable wd_sel : integer;
variable d_word : reg32;
begin
if rst = '1' then -- not reset, normal operation
wait until cpu_sel = '0';
inp_tag := cpu_addr(IC_TOP_TAG downto IC_BOT_TAG);
inp_index := cpu_addr(IC_TOP_INDEX downto IC_BOT_INDEX);
inp_w_sel := cpu_addr(IC_TOP_W_SEL downto IC_BOT_W_SEL);
dbg_index <= inp_index;
i_index := to_integer(unsigned(inp_index));
i_w_sel := to_integer(unsigned(inp_w_sel));
tag := ic_tags_matrix(i_index);
i_ref_cnt := i_ref_cnt + 1;
-- assert false report "cache val=" & SL2STR(tag.val) & " tag="
-- & SLV2STR(tag.tag) severity note; -- DEBUG
if (tag.val = '1') and (tag.tag = inp_tag) then
miss <= '0';
blk := ic_data_matrix(i_index);
d_word := blk(i_w_sel);
i_hit_cnt := i_hit_cnt + 1;
else
miss <= '1';
blk_filled <= '0';
for i in 0 to IC_WORDS_PER_BLOCK-1 loop
cpu_data <= (others => 'X');
wd_sel := (i_w_sel + i) mod IC_WORDS_PER_BLOCK;
u_w_sel := to_signed(wd_sel, IC_WORD_SEL_BITS);
s_w_sel := std_logic_vector(signed(u_w_sel));
mem_addr <= inp_tag & inp_index & s_w_sel & b"00"; -- byte_sel;
dbg_wd_sel <= s_w_sel;
wait until rising_edge(mem_rdy);
blk(wd_sel) := mem_data;
wait until rising_edge(next_word);
end loop; -- i;
blk_filled <= '1';
tag.tag := inp_tag;
tag.val := '1';
ic_tags_matrix(i_index) <= tag;
ic_data_matrix(i_index) <= blk;
d_word := blk(i_w_sel);
end if;
else -- reset: initialize cache tags, interface signals in tri-state
miss <= '0';
blk_filled <= '0';
d_word := (others => 'X');
inp_tag := (others => 'L');
inp_index := (others => 'L');
inp_w_sel := (others => 'L');
tag.val := '0';
tag.tag := (others => 'X');
for i in ic_tags_matrix'range loop
ic_tags_matrix(i) <= tag;
end loop;
i_ref_cnt := 0;
i_hit_cnt := 0;
end if; -- reset
cpu_data <= d_word;
ref_cnt <= i_ref_cnt;
hit_cnt <= i_hit_cnt;
wait on rst, cpu_sel, mem_rdy, next_word;
end process U_access; ---------------------------------------------------
end behavioral;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-- fake instruction cache -- pass along all signals unchanged
-- TODO:
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
architecture fake of I_CACHE is
begin
ic_reset <= '1';
mem_sel <= cpu_sel;
cpu_rdy <= mem_rdy;
mem_addr <= cpu_addr;
cpu_data <= mem_data;
ref_cnt <= 0;
hit_cnt <= 0;
end fake;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
| gpl-3.0 | 88976fc891e51044109903bb7ab9e65c | 0.476011 | 3.355942 | false | false | false | false |
mkotormus/G3_OrchestraConductorDemo | src/ov7670_marker_tracker_use/ov7670_marker_tracker_use.srcs/sources_1/ipshared/xilinx.com/fifo_generator_v12_0/924f3d25/hdl/common/output_blk.vhd | 5 | 27,142 | `protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2014"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
PGHFNiR3BP7XGoNdt+sZaTmGZWIHImrHr96onkZN6M2wSWG6MSzLnz3xTdAOzrEb6GdU/I3SQ1/j
1+lecrUFNA==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
MM5jU9TWbR6/PtrLhERYQFUfWh1JDYUP7wzhyRLgamuHE/Wi2r2uXHiNpYGCrSz45T74W41GsUgm
9j3mMtKtZA888jKVdsKre9IS7ln3Qjrse/HwU/HOuRjQCYTzBCThVnxR8/oeSAPnT9pJZpEHuD+A
zpyCvRauvZTEG5j+scE=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2014_03", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
Fi4nhbaxpRjqCDd0M+9OyfKserp7DStZWpnATpp9K5HcMKXXPcKQuvXtuOUfLNkJ6/72ODDZUv5s
NLXbc2oGGClaRwTUlPy/zDhhyGD0SdKZjg/1wKTIvwt9SYjLQTIlj2hFAI3n0xZcsDXA0pbuM/xl
XH7YQLcEUH3YH5qoLkmgkhPbmTXc2KPGjbYYIHaNZWuGZJU7o1uI+ek2P6xx8ctzEu3HsAo45nFC
pkPS5QOdITs6At2bp9c4hPHKgdIHxE03FP7exaI8HjOQVl+vQxzTTPGcmbRSjfgA6+Iqp4cM46I5
iHmVPY6nZXLj5z0oMk8+Q+8ka0admCYkTIFJLA==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
SMBn+Jq11bmR7KsSKMN/Ncfxt59glEf5XDov78erxANfLvk5rp8O4KeSybmVABHVHGwnaOCbjI9X
Go3+bpOcVcgtlajNGY9HSWVVqsxS48RWPpRm/0DlUcNwjcdHSHyMUaYgDVlc/hlppbOgHJaPrbNz
1tAeewMQfrB3dx/2BXQ=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
YXz4WZBI+ZuRrCi4Gfpmj9u007zhUaapkKLeEvEugtpisG9TvoG+IdugsLUxk3/cVor1HoPm/QO1
wluJVsz3KGJAXTtuWA/G3rEwGRbTLvAkwUR1D3GEekAYWWpx8qYGzYk9iVldd5qkpPJp+utczsVY
VXlhLuQvsaUI3g5IXrW9/nD7tPCJrFG222qhCnuZoBaGj6PQtJ1XoyHpkOLjiV/ewV6NJqNp4m6O
59u+GtK+7P5m6nnmbSdhQDFMZt2N46N8Heecoc552V+SNhU042QleG1xn8JYmm+tIO0ppZ3lWhM7
q37Xm623uEmvkgQvIBgd1+0N//XilBipT3JQvQ==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 18352)
`protect data_block
BGbGyJA49ilw/PQso0auWhuK+BEQ6+KJHHeHuBaC41ydAaPUKQNbIMfnJ+qEF/pLo4Q8BUglhRph
iujA+9DKW7EK572eomDh3XMKEylnuW0MMAkQoPAYZX3Zv0zj42gF9KdTMXU4VIZEmoPUDjyVeCNi
zSn8w7eQa9EquOfnr5V9xgZWgjd3ltIgVFnZWtQ8hiMma2GYtzQJId+4ZKHkpySmRDT9bgGB7ag0
BFEscy+2JImNu6jPAdJ7W++PHg+9ivApXnD4JHJFbmD6xoUJ1QkBS2hS/WTKRgLa58V/VlO46TMM
xEqUceaQyNXI5x+NGlVFZwbI1oEtGfxVmsIXusfvUPj2GRnEZ+Gk5Jo+ekyymNTKCCeic6lFzlBC
SibqDWs5f3jR0DTnHzvy/6WajFEkWBqDS+cbCrkSz04yzI6LNqzn/Uf3/v3BcYFutO9cd/D7sbWf
gxORqw7PLBmL1jdpoSHO2XCv0g96anqP0UROQfQYVzzuBldkxb/OnkjuSR8599JWoVWEn5Gw7SJu
KE2lB3Ng0yIYoPSwPAD2HZ7aacWtIFw9d+OZFCnu9SpR5f3G5oxSeOQ+3+GH4YHzcgeG9m/6pqDi
NZkbEJ2yU0JsJxZyjKo+V6NaTlo7/F+tjU8L3T+p+J1mEvMXoS+MNXcGCD+KzKqq7DHJO695trWJ
mdzgByumVT5xOxCsZ3y0w6FbcZ4CE7sJhvDnWzLhCc6QedXNlv8qI8rSMfCou/tllbbCP3qVKjXX
56kj7hUWPEoA9ulghkZZwS1rCkejhuvwQ5IKxYq2pU8csJKYdGhjgLwCLoPNG8QaKB/ElbXbg+lU
M1U/SjuentKsD18aqy073aJZZ6+lP48R65EO2BoHv2FKKm1kDi2gOa3zcg+2TmT8/83x2iFjuQGQ
TAGulKNj2JCbGqMUopXDPsRX7Oy7EJj2j+RadajTabJMQu5YdiGaPGbaL5NC1pl2bfGHdKyV6eLP
biLPO7gTBT3lB9MpJZzsc5qJFffQEZyvmvYvnL7dNCYKSr/MRI4e/owu2FhPRrNZ52BBO778NiXM
LI6QLK/Oxe/ZmkP5IBdrBLBmKRcia9kgekIGOhe2ZV8WUPE+RPXNCSiv5ueW0Z5OEsKzZkthx/7Q
dJn9WHXyo/ByyCCbA8+iGaDx1aDWuRRy/GTvk5/OGjc0prT0i/WlbnhWpkZhvxxfJiC6Df4LdpC1
OoNDzD5sVH3mQqogjvGZxz66US6yPqsi8h8jYapmusIJ1Vdv0e8M9hu06v0X2QOZz8TOPE0S2bas
OSZDqh4/nL7ybDQSc2sPSZXR4RcP35LLmxoNN4ZvXdlIuyjYtLis3pJz2xLq3Mfp5c5QEe+X1OXb
+ZN6B3ALQrzbuBJX2KKHB96aq6lKUuRnigYLg8eNniWHNeV7ihTilBRiLKFWwEMnISUiYYH/qRwh
ddp+yqEgx+gEToUFBLDAO5psyBbExiJTcpo+kYozhkFmntWMz5ktyugXS0/6xh91LUzMgTy5vn74
cSmE7UX3VDgXN3nRJqum3C8rSkYjGGnVQP14zId1vI5Ag7JFW6B8KLtSbqUq71uTZx312A1aUpU+
OmWanqdNde0/TomJ9riuJtD/FL5yoa6tAHFe3y/c8JNDJRDlSZussYcYGNUF75sK+Qd3y3tfQrMv
gzkAeLo7aJj+sHPp8HFAEJz4EaoxjemAin6/S+BVaOz/MEzttH8DO/j997P32BiiSElR6N1gekYO
x+Qp8YXTCb7XK1ao7QhV7V2Bn33uKwny1dPdQl55Dll3TwINybauLTbnyzmYO6Tl2X8TmGdLDo1M
1Nx4WCLr8v2bOLE1wRBqH+PPcHo8rS88Qh2Gtc/+ffF80Pg65z5nugQ+Aa44z+sjMcSiIbkrJi85
zrdlsEeA/IABVCrtli/ge+Gx21n5YIHBSaL4IV6gQL2+pCbjLoYFWILgSlfZAkO6uK2Dk/wUfdLT
8oOUwsJxjhZnRjK0y5Cgb/1sWWz8JGD+aQ+M0MAsEkKA9V5gBF/+IauNf7jrRkO+/HcEJrBDE3NS
avRzmItxX4P8lUYCVAV5Vg43WuNtPQRXgWzKM+7vycDTvFHsajF9B4PFoumOXhFYVMiccvxmqizd
GKI/ec8/37zyDYD7TfHq5JA0YSm2UGptlVEzuWgeJk+9SNdSJ6WWyYXc6Oh6r/oXO3POn8BE+bGY
BBm1gBJVUNHM/XYKni3y7+Au79QSIaO5Kh8l9Xlcm+v+BL7sam8uR3nsX35Oc2TvX50txfMsB3wV
IPlVHxLHMj4zQox9fs1G2CMXWdtWceVfup6+Q3vh/6/9fx7bSzpa8heUntsVzFPmffafy9nFEUQT
th46JP9qWiHaxYS/jjwP13GS7N2WsMVzHKifPV8IjbWB05aC26+Am0CaX03FwTFSMqLzIZjBYacS
Hk/JDEIQwH/ZQ4mqB+F3XUP0hyeap5Riu0og79bBUPYMvlP9euQjPvjq5HJmwDMYDg76AQOaqP2s
3UZohUCY68gbr0GsSRLOooCwzCnkoESzEZvgLMJBAsvPi/o2Ki3ZRKdt5dmwDrmFzrppmu8Tmf4d
NkOvPB+abWOMe0chi9A+R8KeiAU7x8jdLtmLxJHhpJcE5yWjn4mplQSPOSfh8TmAgd2jRdLj/23A
CahDd94F0XsHcyx/nqKY17bjRTYe27nujnM+j/EZ+2VBbT+cQz8qdBP/lr70XlGZHke/O8RxE2WW
kCaIxLmHMzXvZCc16NC91/i6h0t8xB0gp6SDfpO5vPrvcAb+Oj9jqaxyAzgR9i73ZHmqzur+WCvI
GFtP/6sF64so3e3CX7IQR8uAj8ZIQNfUvQncoXWyaKNz2YSxIo0DYQorrO9710gVQzgq0BInYEuN
qCh9QtOUZhh/DtuJLAOwY3FtKqqbVD8/hlgdzj/8jOKR4zm2Z+htrB3loLPntBH9gFqw4WFoKdL3
wQYI5LVR+3NxqO6Z68tpSbvdLm8ZkGQGlySijYT+zuimjZd8fgZmbKaQvrC33eTJqmonaROVEvAt
3rU/sK2I24mV+DncENj7sERA1jkMFzI9NidcgUohIfDXJOr2GnVQUN++TzULNUGATS8uIyiiOM1Q
6JtjXDLSXRPhEOCdeZlqm4t+4TnQO/HOvSUElyaPywSiHZ1qasScrPWAgd/4UudACF8notyzdrIN
zRlgQFeet+L7pgviqkMyrNT5rhxicCuzCSdtz1W8q0UXGfb6WyHOsOltgE8mqpk8LyTuhJXgJKX2
16LPI03SwAxb4YXfHCY4Eav0xGkZeqi40IhfeY5WZpoDurVKFI02qxUE/IPOih/dI5uYoY6QjwQT
n6TGxV7P0qMG2bDFwq/hNIO9MqkUaeGPjXe96rtGxtvJPkJzJIDRwTQviiotVTjdc7wVUKiXWtW8
gu0GZMNs6aTnb9m6hjCglC+tmD56D40j7Gg6wouRgdUdtjsV4thsC09a+TFwgZ9hKdHHcx6lknhD
kZsURXfjr2K8iQLKi+E9tiq9hj1004GRY/g+/DyuQ62DyLz2XVPNYqkHESJ0hOlQNAUlj7/xI88K
1T7/sanLTlXXd8szmRgCsKuQmVMMA24HJsotcBT+kdGTKWktpgpLVze8qU9uMqFbWL8qxpc1/3J9
l0/Ooo10QRQe+fg77nUThJvyrnwES1j75XqsWpJi3jF+9x0lG93pGTawLI/t4ztvrxqylfaRzFtj
Kw48idWDAbXsoSsvFb846kRFSU+PrF282taEafQRjdmEqr8bMJX7Vsd6WJvRA4jViTjdp6tl/fcQ
ESQ04oOOmxmq0vKl+JOjzz75NsgZ2ELm2DV8qECOlLW5ztNogFFqTi9zRorwqsyDRGHCLkbWbMJY
R+krP5jLWACgRphYdATeV3g/QIxChcA4t1deIJIg0Iqj+d6v/EZdcMeEjrZ9z8kyF16IGI1azmeM
gVO1Swja7XA0rbTs1/a3/C5Fw5ktPOhr7ZHad/MafajqW7TReYq/dG1eyEEhZ+PcP3McHqCpNK+r
P/W8MoCXolj+uZLGK19MBYPA/U3zbsMrd+qQ/VrNJMJnJ9Vf5N+C+37ZmdAYoFchWqlkn+8Hs5yk
PmARg6YRVr1m97JVaqYlgzqlVDEjlf9469gD4uKJSXlswPGWCEPczsp8sUuWox8OCydRzxI47iwL
qRYbvvwEIB0mjqANcO2AwY/gRZjIIbxbH7w0sFoxm7IBr27xKhJL/IglkhpMMud/O8eFc37Ezo4u
hAVcVgmdst35S3q9wj4F6kYfOg17gW89XIOxr/7WYjM/2O1kcV+cqmlB+vjeo9VKZEGFw/DeaHLd
/cZHP8TPdj2uZwTxDaYWw+SSverdUKE0gKr7xnsSGoj16opqICrUIbtGMJMavXfzvz/CgVvQ1Qce
Qx5T+4iWwcp+8S0Rx+aJS6tzKmo+kH5sD8ToGdFx5kOCSER8ZLtPTv6p9NeDFg4Y3WlOQxezA0xT
9FUukOqTi+CqxUr/BA0wX+bdIYjDvRXm4PQfU8j/o2o4s1YfhWBZfShmsISTZ1gyirBg79Yhs8Zg
Jw+GsMEvTmq/6d6DCrvAtJc80UfVtyfMPbAklOW/aAxl4qevCwIvEOcQ9uKAvm2r768kF6rjJODh
/MRyV1V/LVhzcQCSJR0jxi6nruPJ1shr59+bFxkZ4kcg8sOhoMMeRPKbdxnypHE6euypZagpLyjw
nDLrTEftIRsq2FBoU4iSOWZjjrhqWjMKL5K+8d2GmEviTVuXcSpPBPRVYKfUroY7R3O9A/pzMPvx
pSN4t06caoedU65ogSkMd2Y3sDDlGzFFah3c4MW7qRNIUtZZ4REXH/O0zg37lpAFm7PoXnAHGHPW
jkufmOq7XCCI/Mbp8X8CBirtY9F8e6yZLcAq/LQ13Bweo3zKjuQT+UG7Bf9NzH7BqOaNYtsCI0a3
3cUJEqsYZ6ITd5tP6hjtvlRiO74aHwP71ImpezwqWPyZUepTjYjTE14EtNJ+Z+ap0EdXMJtYnocL
oXSw6TM9sbmEMDGFqcEOrOj5Z5RwECAJnn/PCUXWidwzvJdTFwK7BG3gFUnMYSaDdNWs6o7PMknV
wS+t3kbgudvZ8ZC+DxJsAq4wvGG21PYHXrYFIjU5XlX3utE73snN4YONX1vYpog/RAoQBVlyT+Oz
wrMtCygr/sd9IgGJzUqdqiXhdwAHBRc/vJj1Eejqm1VRhkMHdKNxYMbnb8Y9BH1MBCc1AxQUj3lw
KxlBPFk3n/ACMnSThm9ia7jTP15MElx8PyLQwrx+BmNg3WRz9ExgZdb6uAhcaXv7cQNRkIxD2FyO
SS6kX71Fc+nS0odTRWrlOqEO8u9wS98vPZdfd4jr++8jfKUrxm0g99h0AXoTbmCk16dygF47F2zt
kwf5XsmHlYpebdSxZ2vEBIyGJ0kGYL8E93gGaRQQaF1qAWbnIH4JrjMIFpZrC9d3URQMK+K3wfYk
shwrZmdOM+bc7T4D3l+s/HheaP7rmuu/hA4HpSsNEu19/CSOkBk8y25Kbje6FuTSraKQKYaDHVSz
qtIT/ACPa1EiUBs4Yidv/KC9oiJUCg7+ToaiyCNkabRHc7BVm5eN2PRSnMdEsTlH438qTPlDnSkU
s9q3s73cCojDVrgtyGmPZYC2ZuvBm24+LBSCan3g9SRNUw9LxeCnJGMAC5PEQoc/0BFYU0513YTR
wU5paVIkZ4krFUoB8yiQAx3BsmwTOVqWSqBKCmuNSuPOrk+c2kyeBj6gQCfNK6TUi2MRjVjYxVr6
5k7huim3Gty/AC6hD9MSWF1SWLazSjiu2Atmnb3gRCH94r4sDUIna/708+pOtDy6EAK/G6NnpJ9s
gl6ph1D2qup1Sc1L9x118+GFBPbF2sL1IAvk/G+pimTbvIZ2XW9Wj8WTsXSYBA0aAsH2QXzVlmZx
pL62JJo46pPcMEblafkp+Bs+zzGLJyh+oq/uxE/esZKbkALOUpoO7OjeU18YTdXSRpyinOJRpNrD
M8tIHdoKpsh65CPqnRcV2y//b5Mai/B3ZEN64s5j2dkQMjDc5MtqbnYpJqY/p635Vv0+Rp58PAjX
uslRyP6ySp/w8wd5R6ZnaRhCsQiQ1PQHLubLBOArx4H1aM6YtHxJLcV1N4x4cq5m97a6DY26oJzO
0kHfa/q3t3a8EaefugmLn4tzvfltwhlFrxObI3M4LPm/Mrc0USor7h1d7gdI4BZLpIJafkVzrVXf
d3k2VGSvLVWoRF5QkbLt4Nnzq/ob/n/2kCNGMMoZ5Qewzt+RsH7CabyFgMVylRbKWw44XtS3P1nX
A9QGQIOJFRL5prnPS8PxmxLKV15XwsMi/IHbaPFMG7GlOY2lbicqgWQ5uu9kwkmiSK8M+M3ra0CT
sS0ZWnXzqmWvRLI2lug9Gm2muhV9LKt3wafo1OQyMjAOvgg4Qo34A3FLgsanH33sURsLBV6P9p6L
ISH8dVdZhJTeWzMhQ7GP4EChzuL3mybT5xgxHwZXV5lNgmALXZ8lS2sZS2QC9L7VTYGzrk4RSDkb
C8Uag/2jEIpTGrFvBMeAZd/di37712UgXFfuMuP+T5gHhCzre+dCkYJkhbuaxlN1TA7ZBdayAbzM
Rh6zVRua/jOCJsvaJMSkJvL5kWDeD1/4DyDfL67miOyutmUTaMYy81ury8NZbORYbYXWcas4LM7y
zmN6aiABIy1t35VDcNuI6Is4vmjWn5uQqr/ZoguPj5eaE1k6lC1EGKay4XSIwmURiYCP7vltlFSx
FBkhpG8Wgk746BbgQM/LaFwPKXqN6sWFNMpo5/z5KiGKdVQs5XJ+xWgRLNgti7ilX6xkmOvtSRMO
+qk1MnA65nBUAOol0LKb/qAafOQKP3WgyN4cxg/SdpPun3Fx0WhIJQO2TVrmETG7eo5NC7/03R8n
jcAw5FLcW3gGNPPodEE1N9IKByMsjun5CK47vcTcZtKxk9exUAZGWfLyXZ43H5T6CKVqLr351BEt
JE5vuf6ugii+OfVv8YFxkugxsQLGqmuPaihme5QIksBGONdi06oSKujoYsj0RN/psQu/DnK9pB9E
4dSIndX8gBURNFEteJaOz0t7cFes4deFXfFhDQXW3QGubf1fsu6ecuZlslwuwnFd4+uKaE0pZrBZ
psu/N2Kf9FWXDZZZeEorPjsicL7MgMUhpF23jGTZhj6DiPKdgZCEHjlz2agI/rgTHUA/QJgQwLzc
+4XfKBHG3xPaeK8vz048H74/1y108GNd7xh/HZFWAvgc/YLZ0Ko3LlOwhBXPhTBn/ktByMAI/sIc
xcUSyifmLxJD2xxR9dK0fpRPLbVISUC6vzwtjAUj+4eXhb2f3JsZNfrl1CI2RK0wuwn+7IjxV1ZJ
yWWH1SsqC18/AZsODdnBpdY7mpY/r7VKSOt+Pr9Y9No9Xpe+B8QnvdrlZaHaUIiBHwki1lJEdaG5
A7zSFEG7D/I3pvUENL61Q+FA623WlrhdfIhXA8r4UMWnb38+4cNV3aY9N498+8jBH9SEOZXZfWoH
uQesJ3BNgjJIg+rKCzvRMAr1MGOmJDT0Na4L3yzUx1aDn7lQ9uL6a1IgLHkeZbJdSnDgg9TqRuMj
zZ+aEYmki+ID0kDpZI1j6LMEdihnqDv6AEecPFJOldQmqgNtQVXhK7girTCidp1wAB8djQDtTIZ5
JBsBlGYGoYg+Xi6SWESMxkDeFVSbFw3oKYqyS17b/jzpJ0jX9fLINfSeoOnSmXdX9wFiuNLI71B6
0xFKb9we7OaJU6aK7NMcXQIVueKiLQKwPo3SL8J5NIEkGdZFDTorYT2rm6GacJyDp+NhjMR2WLUV
YX2HmyduVVl2+8uvrmo0D18o4hPAzmNax2wTrSLEbEwW6XS/SCQWRh0MQTE82/1aL770d4h8ogdB
UrXlQp2vmdQtFRxjt6EzKCOgAyiR+B+O9wReiQ7zYR+ZSOZkeT36tqWYj1pTmiEOUWdTVlSLURCW
oZc1wKkOFAooULIh56J/KVzq5ml0kUXi1bFk3NsBthaB00hMa7gOVZrcLLlTEMvdYyloYKiR1DJk
wroCzD1VvFW8Ofh/DIoB8cvxGyQXTrzlSdLAaEIdtsTa+3R4zSIL38+Vc5IGH6+/ISz+y8/wX2ak
nA4U+nYvHGLWyBgWP1kavTJkonPOB8S86kcKlC6lu1G9uL6/dclOpvmcA9Ksz+ZyQtGeW6BySZM2
5ZdIlXeS+ljdtu2aBwrB4LFGNj6wCG8Gg4+oj+hCIF+woj62Ek3HJQ3k683D/WoqiSuNuB1qHttw
o2eK91sqf0nkesa/7WDWK+YcOWY27exes0UXdzDa1wi+dBEnjPk2N9k+Xr+HBvcRKTg/06vfWYUT
zfGmpJfCqGzpiREnO54QCqMdXoYUeSFpKZPyUlm1UhsKwo6LQEN6/NlT7iQdoPoZcL35bFOLm8mX
iMe8S3AAAAm0+yDkO9AD9VMdxQ9Fr1s3ufOCvbH3Rh/8k56evHIMprqNapvSE8cN6xDXd/WdktqM
+ay3OmNKUxvT7kuZbXdenDfzX830QEqdklFJIjScG1xewEm/VjhXxI7cIKk7y00kfDndL311Hz+s
r+ZcPdWFUWzGO0x7g+EngioxJ7NzDbS55VE7KeTBvCn341+oZaN0npt2lpwxTpb8UeKEt5XO05hS
SlUBpp3LA7sETq4cev34MaqT3AtZnAeUkywySUJEuuv4JSsXAZ1CMDQ4emFn1lQDO9PvgpwUNMRn
soGLCioL5cgCzILLUVqECEZ+xOa3y4I5lxY4yU+t+HnrX5QoMwV6JJSMZIXC2ipMxvhBxYEecBsA
G0hZavHy0RgZGhk3ErTp2qgqQ8r4pDR/UlN5L1whoHA6+xTxSQm0mPwKO+Csp5hGLied0ZzWXoXw
OQK3fBMDPg07q1web0Uj0gEE5OSvdfCuA4/Fqj09bxSNZCoML4jBHoz5YMH94cwJfTUdXfhBV480
u24juguOL+c2XRPnF7thX71LT3xZtDF5CDzg5Ed0ngMZSz4NK31DtSmmlSRYYC5+vPEboVM23+1z
RgSK+lEQgUrM10WYFyDJCwBB3h43Vvw2Gtnd5T2Mh5HUcTfZuIepvY02vwvEfB28JjoDIpIRka+U
1BYKdy1thIcYYOVBy8XSUYJOGri/VB7n+WpBaspWUiX2Fbpq++f2VI8HIxhAvi+sMcDvNQnbOQMy
XEixL4bHvfdQuqOUw/0a7ISC4pob5RiZtnpFalIF/u/a2TtzPCi3l1pVBPYvMVqYdJfRcF/iy13C
nhi9JiMtxl8sfUBVhis3ieCTz1iagCQres5cUqJYB5immIeXZ01RFNA5sWyN3xeXFmbht86C91Ub
Z5NUyu3oXu9Qnanky5esbphXGO2RCZsRRHGiMxSZiDD8KOWu8vGC9Vj+h1BbMcDD9Axhs/44JjQI
yZERa1e5i471DZBthrrQIeqboIjArv2flsKalZ6TXG5LlZP4diGZscvKrzTvYoax/EWW22owS85b
Z2V3bbyyZ2A/GggMgmZuaYyGdF6NZ19H5R3KF7PFm+WbOvNI8XW6XuScBO8GkXtSpZE+c8T00nOd
PrNc8VAkUOlNWJs7VGCgYvbwbvVYNj2ErORm2Uk41qwk37QF+yH2VXmjOs1jnVOuA24j2mX3qeAH
lqE76jLANiAoiVl+CERP4Jq5yySO9GfiTkH9xsEuK8cVM6Y1I8tmvxKs6NHBu7GwtkajpIcVuhMh
DdkiJ4IucxiTykystEqYy8MxSViRGb1Y98IqXK1n1e9+GqRFe187Wli+DLzb12PH6cqfUo3hd3gj
BP+RfQCXy6+6NL0wtrEWR11f7IvkRO5Y+T6syN/1g1CObu8JDrzhiN6v6LinYYLMtyocF+wvdkwj
r1gPiXKUBNhrzWwHXDgYBZUe9ZRVtmt9zGnUCvo2/po/CzlzOTUlqeCkvsTg+zlL2XIVMXy9F272
yhwrLyErbFT8gb11BkQZP2ue8sHoA8Jie8oFjRaqnvCwemgRS1+z0cjRKVHTgIObS24zKh0Z+/km
MfX58EUBHPyQhOEWWcdkb0SDYWKO8ovr5t0sJ8P9ftl2uLkR/Zm3tvkLALvB0G/CK6R9u/Nx/V6g
z3d5GJRsq7WBAONbKi7ZLwRRvY5cVlODMI4s/OVp54VigJCCGoLrVKxWw7JXe8+JdgS0R9dciP74
0JCY774jb8IBP3+IbUGb/xysE5PjAFR7XE2kp0OZpMatPJ0VPnbtLZujB4H1n8dKMbrMw8FqC7oa
nEjuj7sLxzbKBRz5J1rVX3tulVjOL0bdYLtVldiVgmsAeIlr1dvf/4ycQVX8aJbMrcrpE4/1wqAd
dMt9lMvUiVn7PyiBxFUIfeN24MQLa3r71itNrRhEg3jPuqfkc1MDTSeZ2zVhdN2pSCSuykV3gasY
6fjXSv2Uz3EesMVWxOkxLzIDpvVVnQNmqpSfTJJ3pP1+qUcgmZtSqJq1Lj3voyLPJay82LwkHzJT
qQHBwUCTCqaZ4qXODvNVQwy9YgwtV5erJx9F6khG53RnBnlua3yfTf4W3w6aWnIJnMDStNrfRYhY
J4cYfpHIxmBC7yVnbZa3NJBID1op0DHVZz6VQWyFbcFAet3zwHbZB8ibwVCnvHyOedkkGpEtdM3J
1aj3DKTplRryxjmwIPVGx4EsRpJc1bu84Vszz0xTIq0GuEVNRltxipuuYYn9soQazhB398j3e/Zg
CW6plhCYzyypZ3ypa3/Zghm2hfFMrvU9DkXc3L6bbELmw8sn/jdkXFKHV5Bzjazc/Rt+z6YrOQy9
s7aq6athyY+y/Eh6Zbo+WL+4wZVVEIJmmfZyp4yED300+MEl5T+Sb6NrrQJxgzTx7KcB1UoqOjur
ZLMqFfDra3JGyna1MVkij1pkLBkzHbsrgQaAnOwCacLMmdY5bOPD8WCED3fss8iBoX+Cj5KRCcty
qZbu4qrT3w+ikhQyB2gGtyUMEQZyYzEBqo+l2/uHq7lWZqB9LBx4+Cr6h6g0JbazTO34FrPMOY2G
nvK3aCbqOtKbEdfDxhCJZoAhZbWITGq6nHKSV4Av11syOO762BlRiqANpDk8pk4U6VbxfRetO/D+
3D8M6Ld5VM2uF30gqN8hJRXw4AMSAnrnIh4P30xzGi9ZgdLKnLzQw5IIq9d5PnspvkkTVuLo8nen
A5uaBFz/0SobG4THR8jRQBv2tBPTciQGxTijbbbmTQAp7ILnk2sEQ+z1654rvpOGa9pJCzuDsNkF
NAo3EmdO14ZkYTKeUTWVrqC8u1uPMF2cmKqDkCLZUr11thH7B1khItkEucJiZbH2a0j2oU7UiAgP
iAg1wHO0cuQboWDjxeP4VD3HXNdEnHnRoumpgITkhgiPQgNbacAvYGNJv3nZjS/ttuNFPz4WvwWh
azNJVIbp1TlynXoHTjpojCiz9m53h0bQfzy+77i1VZeMypDidqJRIuXCcU5v50AM9QA/NAu7cty9
0WAStmCltdgSDaPrVYeuV6QswyutCjR5DKGVtCAs3LMs3jZ4BiHOLLvOfXvS/0zERlZY8oPYY/l7
sh8kjyemcvGWfM/aSsLh78KWfy1huf0uVNUdb+T3W8D8YKxwp9sR3RWuLqRsESve0tI7wwfHuIOF
bncBpRkmBHfcV9g3C+Ox+4wpI5KUXKJrRL+gXK4G7wC7eqhk8BbHD/nVH1wB+4qijgllanbpsD/r
ieMatfYyYl4XrpEYULybGQirTzePV04+gR8PRe+hLDGVP5op9KdKRXhKfE8bUl/Q8x+g8r1IN+vO
YtiGrIhKI92V4gJlUAI5Cr2oikyH3Xt6iqGN/ti1c8UvHEkPGvKZeDCfpxI4GYpFDRKeDh3uklhL
G81msgS9B/WhDdZz6i4Pe/JZcVyyFgmbXPBDkrIfbPt6Gep+LQHyR4z/XfxA4r3kdx2gSEVI8Lm0
YYWYuj+h6qRwytN3RlPzo2EeaA2WiUMMm/4vyO7SDbZkYHAfrWVDKCme2tEm8cxnYvJDwikQTRAu
9cqQqEflHXccZLU34BVUkXByMPFCM+MDCc4sqLc78yhnFEHdlTIv0afSIxZmIk/3A5gsGFasi1CL
cCFNo1wsvzObnswnO5mq5jkVFteGc3M2ywIpJjGMuu3Q3PMkuItsFHO3/vJ5IqGzS4E3hsOlKUfF
B+R0H08QMcN+YBAQkvK6MmkPcI+lR8bVzcOlq8C4LoW6nihi3UdogyYJ37p0/Et6M96U1zDUefiS
NZDcbrDax7Ul5aeklA1u7WaaBQBdhGB8f1pPIXAkl/1/TnV6U+KUC4LeM8+9C4VXTFNdoSOCX79r
nS8M59Tp6iHXFEXlPIqJO720q43a+xjvhQ59uWC/t0ncddlfn2D3h60BST1R/Mm3al+UKXV51hqI
Z/zsj21RW/Ahl3YqIecAyRkhc+rj+9JYZ7p6UQvTbjs0eUQGloCv9+NdiBeYsNv+GBVm9cRiUTxd
xj3lxwiWA2FJENlCjupGlwMITbgNV8cdQnOFHqfcZSDUvqgofL3s3BJNl86zFGM0HaCbkcatbzBv
IGtUcxmg7kLNyFpJ/cWpc4fytIpYVnZl8URT/9Gfj0hHZfvVj8OVHP9FLkFj2d2u6dtaK2BPwX3y
CiHEsNPQb2YdtKOJph2EaF2p9kxdsTamYUF9hC22xGP2nRV2Nr3mz06pvlgn+jryqE9UhVz9Fq6D
00j8HbIIzPMA9IJSE4vV3LUDqDtB1KCYEMAnjrtF0sV5yFS0XCfVy8beDfyoEHgt+ePU06MQq3g1
ruxqJi/1JDLDn+hSqo4lua792FSp3bzlDUVltaNKDqWlWDzAp4RittUQp9wc7fORxJQozEoSMmKZ
zxfnJ10bLO+hFwC1vXPUcZ2z6bgou6S2tQFKhYj8BubqbXe9qwzGan9Q+4g8lcMfYBYAaWXQEPaX
Xfi0iZmY9dUMdA6MKNin77r3zRZHx5aUbIHpi/zi9GaEe2vjf+WXSArRcrX7ugTHncm4QUy6HcFO
ROPuy7mXakzMJAzcNTogOxRNulShKKPqXVQnT2PA6uMvLF5VuJbQZVb5qLSypyE37+jcu3QawzMu
LOqcnWwhMwLPQt0sQYB+8G52S4mXVgb0wH5S9a6YRQ59F2KCmspA6hvQI9VhnUAdgNq9IQuZwRz2
gbH99wT+kjRxZzOMPxrLvd8qsxJ/MwuKnN4MMiW/gEjxWnoOC3H3ntS5K3+uxYvE88wKaL1nQPXO
B61+KecY7hjuVXx/u/jsnwTz/IOSLvR58mX3H85eK7TCRQdyvb/W+7f9x8uYbyyONpWzfqgbXDTZ
v253TkgJDEL4cCmEZcaFvOMMff0nZktT8MFzxJTOjYk3OHC0KzYMxJ0U8RxIMRWKyNrczY0k0UnX
iLkeU9MzPugYt4TfVzL3Sv3JKj6Zk2xSricwsxIGWhi4aJLzhWIcphRbf3JPFZbDFrOBRXR6uiyv
necPxWSOF2i0Ovi99S2Co2CeA6RPCay/BrMSrNit9x68sC31gj9gntjQCEpNsqgKf8bK+aRk++At
PyDBSC0HNYufgJL8TwL5na7yCcN5l+GxLSuV1n78tiPZIiQWTiJoRo+YeAxs33z0k1TiWCpSR984
o5Ya5kUl0WdL9Pex4OzepWmD6SpfY1IcddgY5f4tXR7JRQQO13XS6WSq4FL4YLzOP8yoF2exMG+E
/RFVORbxr8LtPZcl1LE8+n7tKU4aPwUcPp6RXajuQYKJdDFqwt2W1GYOKgEJ9Y705pOdoge1f3Z0
qd92VM3v9/HIJPCUgkASu5pACXqqt0aBUxltnVwe7zDn8hJ2A8KSMJXOBrVwT4WZQMPPl4xQFPJC
KHffhnoKvxthBedJHAWgtJC28DbZqPjNn5WcYICKyTZWMDgFqpNQ0WxzUP9T6WzJOnI1+1+wniV0
6xM9yslcyXXWk1SdjvKyjVKzSDnEvrTXdl8GKD88FAYFB5b2vgfBUpsNxkLJddE17NOioWMNEiY5
sCIrWqy+amyfSC2obbL6UePr1vDVz3Ofwq2NRnKLSMqd+hWbBCGOw534mGmi5b/TRivzuhybFdF1
RYoSFaOTGybfTw7L9JaCCa4Fet0B8iC7EoVWxK6HAeVcmO0XiIr1g02A7w13VJO7Q01igIWFMucA
PjaflyCkglWhVFxiiY8gwR9VUtHseeeBflpl9fbxccg5CzOM1g5d21m9XvUaW7xftt82HwXO9Tpa
5RRp/HpmIwgBG99L0DqElWz0MgzFt8TlPbDQ9tGHxNx/9OuK6G6DpzXYpoUfK4OYw9vniCkgmPq+
j8Dug5gtTxEJIBGD2ck1RUWY5UPwsAnzemurHxc8b5TmIxfQe1gV/v/qip8rqF5Yb0LNRPEu/rKY
T+G/+0bNABTPfehjt+bwI3Wdj09bTPQL8S8cyj+BSM41odlW8eO4NvMpk8gM3/KwAigQrdZsYtQ8
1oYBcUZJvAb9TdRf45FLKhtrI96zmOupxwMQveiHEZQa3Dm3/qIQaTeN7vo+DhpxP1CwYfY8d1B/
BsWjRRQ0PHIZgS2k0tiRLyGLYdAOErPYXsDeg+6VGRJGaZGMBOQ9vBH1ZOIlRXxAvQ6tkiYRHwpo
olvY/F1JN2aF+rWh/hyPF6gSooO571h16m8kgaX3wg8Az/wrZOCgRgh+4HOG+382orBymywzFo5D
QlBuVydizgY1EGviQu/zB+m0m0aTJ4d175tJiOCNVKIENfZFKTSqFzDZCmUwDBqnPt12kNVcYsRw
VWYZMvfAKJBzGkhVxCrM8J9hTSu9fjIb/9FT/ulCEYomtyr7pNrb/BZRnUDHiqIdWBtQdwpVyKw7
jvbRceiZPkqiH9dKLkXfjC1uL8F0/PJu1qjPRF0dIBMhmDTfFk9/UGCW72BAhysoiL2rxWT+c7sT
93KedXQ5Lcvt+2/MjqUGyUh/lM5NI0Iyo2sYzqznEB5jR7xdzFbe/4PHvRusENK28KAK6mGpPmvU
5AXngUjiuX8j/Zpr/5fMzi5r4iA9g+87pVzAS5krcZ/Hv8GfEFtjUmVsqdsrzW9u2xvCDKidqVq/
T01uBEIcfUB9/0oNaxOjD/fvMIeaQXQqyFuof6qBo7nEPGMDD1pxLAEHWu2BCTE6bLMilaVpmw0t
2kMueCq9WldIaCng+xRANwupuVXaXSNy7clC82WK0hOsRm4zBvK4EcD+HhZeNaOFjivDrT2ReNmD
6r9WmokjEFM6giEJjWyt0T6EckYPBcW69mVDrAgWffOuEaEZbpaanG5eIyerfe+6/Qh8blMDfmgs
J4YqXEWIhpZpwVp677V7hWBwlZiitDN4gDVM5DRiI2BvDoOz51iLhqitWC0tmy9d61lCaDI+zfJt
LPWsw96PsScZEyGtwWvyU7F3omObI7MWtvtckm+ENY9Otz1iupjwPW1bqwahRVkyRsa1+gu/dGEv
QsVlO8c2gqDqufH9FaROZnjbXub1rLKXGPIkB2LijtOBmCf+4cREUaUvdrGnqjlMiMovKQeijDWy
rZHJKqw7/+v2MeMSVeMe7sP1yrb37Z51ylRSM9vTLhYj0FRP5Q0AKFe3dEsE4/GEbVBMljkPUfXj
owMYW+5Rgx5P8lBDOKytKzW6Xt7A5noLbVwvcoPOAvNVb3xcxMLUSA/2NNun1wPI9fNyYke57won
VoqRRiz9MpVkYQMCa3LqbrFaKIgwCT7u1U2fBZiTQ2MezkrzPoNdGZKA24J9AEg3oFUc0avCCWIO
CmkvGr/oLucJ4q5Ef0N2PkroxBJ+8c+nMeV1lk6vIjAl3V/940L+2tFP8Ob6S/c3nLq1UwtDibPD
7MNrNAZx5j7gceEJYCpXxI9EFVBTaYunS1XrBaOQTO/k6yeMYB4Xjx8nHPwoVz0vRisdX5Y6uu67
GEXwr2NuBMjU1b46eQkVXgA1vmX1c4oBSswO9fA21aQnSwJ0asRDVKbSzR0RCcRyg5Tpz1ORjRo8
E6aDBHVtHTWTE6Z4QQlxbWBj/NlM29Ep/ccUebvOrSYuKFoaexkIVfWpCqgMWxlAn8V6CJPViVKQ
Qq78QjBCPacM8QvWHCw5jPV4pfrh2q1ghofINhMI6rQfzwf7/qo2dOh6FKJKG0Tfg4QnorvH5Ll5
0teBYv0011MKXE0tl1EAEI53qKpgeru0/Q2E0YzJcYj/r7fY8k5XjNiiOOhwqQ7h1Xqx5/vYRxo7
2HvKydL931v/avQmBc/PcFsD0gltIc/4DxRhC1PL3RUw7eTwob0W0ZXudp3y7Ca4Bc0fxLo+jofV
E9oUVWB1lXqSGW1fyDqhhxKHPd6lWlPdsINdtmIZpG6s0Xbhr6HwOVc8ruEZo1FckStKR2P62eY0
843b04bWSP2hN5bos4Xd9Th77Kd1tRpEkG6WeZg5UmnQatDun54iEGBgC8XJIX4AKZxr+bmuIY6X
axJWXiNxnMPdmhII5JV718Sc24L4zLsCpx9ryAmG1IAAyLI2hK1CLITa9ZqBTa2rIeNTfWK9m9Z6
fLGAAhYE/OmBvNc9t9K/rfkRUXtirve6vFlgTMcWd1mtOtSwZK4npQZenMuEWGmt0gRbPF1C5qHz
Wz10Y94UHf63g4NsMVO/PQnyK6OkccJaFYL+EVT+0X3b+O6vAbD+vcOZbaSQA37X7aGUGMB9jEdm
NEZgTXH2ldgfdDkd4DV4WFY+GGSRs2rxoWH6tDbyJiVYPCU3yR6BweuwsOzYh3nbNm2o0dtBnUzC
UwIUPOmhCszvjdDsPj6fHjM+WqTsq6aNqZrD60cjYpGVeLALBlopID8oOXFso5l0psw3rcIMpB5p
IhNxAokNyyCT1T34L4M/kbPdhMh39lfscsmuYSHJy4ajuHPZ7/M06VLuu2zueGq9F6RR9hDGcArR
Utr+7Ql+UviZNrfpyBD8RbpDisYMt7+qVo9IJvpuKKc+nIC7HlR1YxpuGRbAFoeiCKksYNNL/6tN
NBV5TDJWrU4U6Lhk3V+7GY+WFneljIvGFYRHXAuu/smTR3Xn4RRSrgpw0RQLO0ebCQLMAenHVzVl
VF7SVfd+utXwq990YEHxdzyBfsr8KYIW6uI0y0h0tpCc8Wl0P19sSQSEw4OymPr7d6Ma7J6Ia4IQ
6sMPQF08QeesdBKBv/HKA2rwXXFl6wdyWQqC64lqFXw1G4m6vO+0vo7IoKr9+nY+hRtKQMYSVH1l
+SS/hEwmlp335SSdGxz1BNGrL4TFuufGhVCWzUWY+Wef8sxM3GwlibpEsDsVmlpVxRnMmNdCqk3Z
WSpPomy4CaKWMxIF1Pg2zs2dBY6eEiiNySSnq2PrQ8p5iO6k0JyfXWJrGNGrWyqawwwCuTVDUSYV
2CVqx82IoGYrgEp7xqMx1db893z/xpRTMmTTzQdM0VHgByWTGtVB/oumGjJXngEwVNLrT43g8+Oq
coIQqzuVaQkS1KjcyS5o4FXN9KM0reyomRfyHDyvPixVsxveHBko/tAt9DF2KTZHsrrHRMhhzYPg
RWQUQdNyQ39hZ0buACgu/ZQWXGOiKuaPAQJwdIqIWntO6/d6NNBtezgqa6KGMSsXxj2LmTiGSovI
wkY4Ogh8P3I6jwb1UZpUxvP9PZqU81GxnlfaTCixPqkqNMKSUaMqPyKhyFqKFMufBv15X/CzHcpk
88ipu2fdeH1xhtnUG+i6SuRTRTqvHuFnwF37k8zYEa0Ngt0lT7yKXo7ICcBlR+mEY3/wpEv5aWX5
b3jNIAxMCOgFxw0WYwhjQsmOIV0MCjcHgptoLwCr4/mU/eBN6rGRntAMwqGcGNY0odNTFt9qSp3A
pQFvfNc2Qp7Ju00Zz1b6J+dtIKuj62SWU7f0NMHC/asXuyALGoefrmYPBuFykYkJFdSLncn0Ywfd
N+G3/vgldiNdZ2qG46On2p9m1lsLcyPmlokwbJ97XwBKQqZyUEXZtMCV6qGtY22iyZxoFUtIHVQy
ft07lWmfu6NkjlV+LJNmlCcPveppThc72QJh8L+VA3M5+1aRg3IUBXXZKUjn5owfHXV4cjVMzk6L
rqaWG/Oz10CfU+Ae+WjgkjVu+t9oAtuzyS8TNA0SPDUDqNYf/ghrnWKz6OtViKLl+6naHoH/mErR
crGLf7Y10Q7YHchcFHRMbPA3KJl6gu7xuRUMmXIG6H+bBvXTmpOJSN//jmkscBuHjtJlVQuv/hrp
cyLbefFUbpRkU+kfLAtD41bfQ1S8uFZRwl17rhLvJw9hOm7S0ooE6+JmUETqz8oC4+JDbuhOhvvo
7ihucO2hmkMdwbBmHQr6iZvyWDvlhVoVOGkuK8/mZ5Ace6BEYoqX/Pk9TsJdLtYG47YygsgrJ9Sl
24dUdKmEu/4ncIANPyiQL3xZR31cBhaoc/kD6uLuNYAJhky0yNLuN4PIZG5D49OG4T9IWZxNv1OT
Bkark/+pjQWZ6Cycn0Pfv/aLz1zX+o4yPO8Iaws71Wymb6jBSeErhNf/HufxPnZCqaBnZWva1iMW
xJMB94PNSGNAN8/5bx3FtMdCAQ5S66zw1fOEGai3Z0YPR2dETlui8faHgAqdEy2kY0yZgMLk+wyX
KOK7LQqDM9uTvnORDkF46a22cK5AoG4zTEIxi79Hw9qEcK4SkvqTtcVb3t5OU8cgJMgxAnALqGi3
0hp7b742pduKfiSmYs5qoTzeTWhKEctC3pz2mFw2nG9ielRZuL4yNa8dkgudrwSwKVBx4JF852w8
9vLw97Kw4m1Jzeu63lusbuRGNFg89Tk0WEuGVdUDlzUOMMUy/CS2mIF20bLxDc72YfeOpAFEEwmm
7FKIbeKnTQtHc1lOWgrBbnY1IpLZtvzF5mKSCU2TwKhHQKg8suN5E2RyreBfcTTXDWpMF41YakNb
5SjbcWldFHYR5Gt5slX8C7HWxJsyGp6Jrio+NXJk8/xLBcQuheb1k6WgUTXOpgeLtbBUf8DmWZg+
c3h5vHnWES5Z6OfhPVLKNcaC0oaMiMjQQgez+KTsFVUnLVKhW7d0bBEkvqfGOsU0tgh9jJGTF9N8
N69yzjy0voGGn8oH8JkUub2UmMKxXHqFi/5Dbn3/OxpbqL9p0pkYEpRUOJJjAyNzp9sccuvkXex2
18QnGqk554lZmvbAjbVGf+5L7SHE0kid8u4CVob0toJAIj+O/VWN8WBaWRNrKLSe15YtkGaPe5Xv
aQWAsZbAZHFP4DywTl2Cu/A1JeFFGszhSIVqMNgp7/66xRfP1UDMNWgIj6WfcnddEXZCN/o69AX0
xjFe/OFx/6n4QUYQuIF8LHtRMdCvEOycsbBh+AEIV45ywKnng76Lk4s0YzWOMSx/dl1NJO+2PSPw
LEW2pNhLX3FAXRN6rbyPrww2VAxyJNDWEJVwINpnQIv1wF7jVSvFdzgBBHPSgRTYJtBaxjMoMs1B
e8Ly2saVOXvSkpJlGSbJcoQWanLS4XV8TTCKs6HdGgvumFF74hrYrayQKgfbvypilQmm9/o/LLeh
5zXcPR9OPgcqrRpiB0kdBwZwR30tWugWODTKYaTvTj8AQxIFhwZh9qdVENokd3CoUfU/cZL0VTCr
SZOdbRvQicX1ZVsNFETcJWnh9k5c8LPbgTywgGvUMy7TrLmiLP4+KFHsiMVzeUvTtnXr9fwOmmOQ
yZeFCK6/F8FIrMNp1Y61pMZy0yIUE2Ahotnj2l1KP6JM8bvADp6yiqndTdaFdnnsUwAYvQJcOC5C
X9gXRXeHC9i22eeg0i4qBtOz82Fhs8Vndvvfiqkz26R9xx0gQ7j+PjT3w1i6kTeLo3eehK3IkEzZ
DcU/2sw9ht8xKKyMaXMxCC54YMWBFfRLkpOFvRrv6debowchzHyoNNqArT3Jl0qlduyD3dTdxTCk
Js+H2X2h0AajBoPcVjuyPCLOcA4kTWRMAfRhQmBqaJWvyvHF/lFSk7ndP1AHf+3xEYnPBmz13RnJ
EmbDCcAJm3hSvMTJr0GJvwxkx1n9hLgOCKZk9oYBl+ZW4eXPAOC2QSll874K6N12KY9/fK8WpDTe
86KRaxDRuaXHu8I0zn9PYDTG9JU1mHesT1kebFHNjLIv44jmP7w3Vu7nERILIocUWlSd9SgJt2wx
84uMCzVGrj5cQIS7c26FgDrmMN0zee8V1xPvmLORLdQ8s+GNned+NjzgT9jJnW0VVWjEJSs+9JI5
xuKuaVMP4jPySMjBiFMsnJzVs477/DfZqFZLxAzDB35NW44yOXNp0bVUv+XHBgoCtPn93TDUHQ8X
fiHQOa+kJ/D85YtYnTVSWGddLBtaAzIOhrO5RkEACL32CTe5oceOVBbsEPPWhtLdeeJoJZwLjVvn
lz55/f6WW9ibe9LtZOjRRSgb7eDKriegSYTMqdGws4c73RcPcwa3Kv0WSa8NZ3f0w6mHNBYNQ9ij
4edfnm5xJd+5pT/jMo/dEPs9wlCssB3qokhLuFV3ibYI0ejbSLYMapTIcMAQyncWVnndv1YlPBPC
LU7kBCb3K7GV0+OYIMGJASXCEXr4NeyZDz+q4woSD4J1SUuPSJ8iS655U9PbYLJOl9HwbAB5Ardx
6Ie6fvSoPzmDqOl1KpzPN4UWXqe+ajhwuYY2rfnBgEyak/QaNlknJR6B6IG6/p6YrnK26EUa1sUS
1v7BlkeTScpt6zFBZ1QS0fWTzJWEXVlbnkH5qzFZ8EjvuZbPAzwyZonu8ep98jtXb4LjAC7ogy2H
Aim8o/p3v1VAS69vgepfat5AzKmr1wQbtCmUS+FpHu61zjjY9nfrEKVI/nqTDb0/xtZ2PcIlvVEG
R6v1s4M+S12HwrW0YfWkqq0TbWL0ZBIxT1QNflXTdvCTMHkrEBzYsaPjAXoYUrFbjiSkLOhfBBvX
PrxV/qjMPhSACaZFFryXEFzEHSGyw6TgHy+SUwdzulz88Lf/uA26GAAgjc5K0j4IENTixQNNs03Y
rFJuQZX3BXTAjfMiH2iAozmYrXA8duHS+d/3XQGnIDKrdPAkohmglVfoyJnxRqUm+nznv3oQqJvR
KUcRsYTJAndOUswZ/O7wuTlFUKdJwx6Ed+KGjipnP4R+VAD3xOv/Wzbtd6FS75Gnoq380juV7q/g
Xipvk0b64uJvGcV2bH8F3wGZFU4OaHnLFct9DlTUu8rXuh3hPjWpStmwzcFsh1f9TtaIMKT1I6Up
Dhd1kFPyLPZ9EnGgm5qevJ3lQoFrGuM7rx1LR/2Ua7WHlRI8oOsAr9VdM3khP2UqINOpZAwhgpB9
P6VZiYBJazGw2IirQWqrd7Y0OVn+R6d6qI4VPZE/8FZ2lEvCI+SrIoBKH65v8/HYgDfeA33X9gru
r9oZsqvJRBEhOtg1izmLqDo4ZKnviZEViXfnzi3QKZHd5ssCpH6OwHPdhxCRwslmecp4CEzqgCDL
7TOm1aiGRYlWiSJaGp4rJf6xXT+7nBktGKDB9vYTHlXW0NXOUwlKzNsepHasHehSxTcTwvA9d7wu
et3gdhf3ngGNSGDDr/7DXTXvZ23tZQVLIJK6HoJ9ZMUobFJ9JoY1HVgbmYsK5CoSj6xKGb/oCyC9
63ja3hXjgGyxGUCwQYbHxL25JVp0m8puDkTdFP0LiuqerER3QY5HEZoJfCb7P+ehdmlm2YxgO/+p
Gio7OdiT1nalTj55RZQKAB+CgBZotCWwa+80DB/Tmv2YWlPmPd4AidVgaS5xIPRuJaa6t7rtTqoG
fsRQRT+l/EEQSaV80clGhxDDPIMVTSGXl83+1QSq4UYSN5a7ShO5+T2DFiXE9TYEY0B82s43Ysdg
gb2w8/Uy9CLnICTEemLuPw3DH3Rd+MuSeJgp1k9q6GtJfPdTg/LlywM/pPzutqB6x+CYcHcaVoA+
RjXNU4XEMJW7QnULj0Py0vZwW2A44AMqWv2WqGsbmTuwBdsYubJxuzBKORhxGTYahGgbMS9qMj1j
bLFVdsfObkhHQsit9ZLCoqCvYo4NxJCLV4yyrKJnGEQbBnJ7nt8D6be6NIH/IPQ160o0cmCzg8br
DhnFfduTaGOOLaB1hjBipHroemn1T+Qz6OhH9/D872z/mFTJNGgCI+SRmrBYelrDT/HGFAgDrA2q
D55tQ/LtKGCeFtq2cMXpZgzHSail6EtsxGEZRqUEiBT0kcAV6CbK6HaD0P2gYmiGRxtJuUK3+iIt
s35QF8Fjy+MCaWoK0a8H3Z2DI6uKBts8Ex0nj9xI6pWOdEpDxe/iP9ZVQLEYRKU0jHaKaeb6RSs0
ieRDuH9DpM15AZLXPxNLQ3vPt4RgX/RJShVruy2kgMujIla09chFpXrGI/ko6m3S8+YK03Tptj6y
cDKdPVMVndwJwypljOAUhsaq5R/fnkhEAXkg2JliJq9DbVZ1ouIvUAzsw9Rcy+kPuDW59PvOkRLR
lun7eTPRwHh8ujJqni1mU3yEpR0o8K1KMEVqdg8GICFe1y6Xzl8xLULPK2Q+H3/RmbhjeDmlW/dl
rOe/I5XUy/nHHycBbDBN6c/44TO0pPcTgP5/GG9YxK2IgPrOk+2RS4AL8z3JAk4obPolP4D6pb7l
JLdK5wG1kT7pvBXu6GL6barN6H1cPTkmnfSjwiinMuYq5XorMCnLBjhpnYUNWb6dEi4J0IfPC+3e
ysHyN/RiF2c5fo/ebPFF/MqwHzB5cDqBuv/Q8PYxgfgaY96gIj7yxUJUofQ3p0PKbKJpzHT5u5Dp
MUMtHNShfWv1molEOAc0AHQWwxK6vG/GfoOMg/1skDeLDXjYJRRqk+83e13sSZIq4jHtICG1vGG7
utJQkyUwo+/zHaFfJwrzuzAjxiDoPg1ZmiH6u6jfpp411Qdl8HOSWB9Nz3M4Ldu5bx/exXOEGfjF
79UK+Tk5E3GYwgUi/8A4TStxIUQufByk5NHFEwKIEwe6mc7V/BGAaLPN2Zvtw2qfPjzgi80DbPH8
S/GrQrFzyZA2nlRnE/RYhhOlA2K+3NtKzpu0GZ8pnZncW95ORm8pKHFBsge9IRKkvkRX0h7CChIO
tAfZrJmdlgDqZk5j9ofbZRFZlp0PxVose9HK994vni0wXbrQ5XPTFPWA2FUR8fMZfW6igTxgCR6b
OmQghTJx7/RjVoX7tPqFIkmNsnJc7yHyiQo/xLhBLZl3jjd3jvYVb5UgwVJVNvaqIg4g3FM7f2dw
vnwPCYekFG0K+ouq0Ldvq+SPGuB4M+IC1b7yVNuCcAPuQDOLcH9oc7P4wnbB0UiFYIiTL2TmzJos
06I4+170pAYSXkDJTC83KPn1Nb26Ixw1iV2AhIhQTPoGQvV7LJTy77ZB72l2X/41lGzB0kopbcQF
PjBMXhfLmq5zKObhraYKbbJLTX+MRpas1F1qK3Xz0RuqV6xIgeAu6sCqEUHWNQsJEqiGxNnMl61+
//w9GKLMwD0/BUNdWKDU5S2KL36iT3VJ6S1EBqoq8tClqPiFZam0FCY97ktSS/jUwIUcjuQ4q5yz
NErCjTVuC96TTZAQiVTqjtCgQPFykchk40Kyb8uGWIezjRgFpTvgeN4i9UMO0UDkk9gRAAjzXfm6
rb6v+fZ/suQXuYBn5wVI2uro+3ZJxy4aW5ioPu2rTdmiT6nTprJJPGXr1OsUU2Gmg9FOx8BKboXY
+sq703uNogW1EfeaGaEh6z3UR+/zIvp/m0qUxQRV7ZO4/f/6VMfEV7oeZJS7YR4vBzGMkCwceiLJ
0pCV++j52v7ofbjK3AVnjKUWpjOGil+NnW+v3RAujyBrNw6R7dGegwxtP7Qi6dMrrcOB9I14hURX
L7vCqHpHbJQVhY8+K+drEsq7Hn3BxE9tYpPMmLH8Iim9VMQ+D6HYCsdD1vkokcJBvfaCAKL39AIn
T/Jik4VuPpo6DB1NRz+v4gh20wohOMPUy2/2SSJWv9JDlAn+WXgiQv0qHm9A72EbDBGx+BOz3KdB
CKfDTLlnyGbudOOtrxOtLh6cv0A9bAtvZmV/h2EqtCUVDzSq0ZZHVWNTaqUW9eDyP4lImxV4Vflf
F3w/oj0dlhCnFx3FeVucTohxXAPqX0/FFVXPXUvpph35KAzD9fB6d6n6vSI6IzTbhqxDIgDsJHlx
QWgC9XPSctOO/u3tMnu3lwu/f6oP9g37wbLqosw02AFzyI0kLdYZTuYULCX9qgsc6BhQFVeoDT8q
8dwHnMrWCiwwQNr6qIyjmFaCu9rF0RxS1y4uZSBo8YK5kidaumsWtaxtEU+fKEf7vnNrhandoESX
Mkt3uKrhZEaRMXTA75QQyq4qwNatvrPYYw3KfffF8o5quny/yBsPKtumtDvYW4QUxz7mocf1l1uC
5EbHgroNgiSSJCGI33O3ggFH0VtpNOZAcbVZ7bovW+oEk4WU4R1DnETaVBOZMV//OXDEbFdTrBnU
1MAu+3YNG/stMY7brbBi/b/h/xd2AwO/QUfqagM6OCWgld20iUph5VXvgGjSOeY7CJVXbLXXAMs8
Ml7C0C8msEaUHzyJQjPhxH4TtudqfJDbc34udTeAXgn0W4mYDlqP6kBgltUN8N7u+97IbNLbfA==
`protect end_protected
| apache-2.0 | 9008e5cbed9c006044799358e1e240ac | 0.942451 | 1.829962 | false | false | false | false |
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