repo_name
stringlengths 6
79
| path
stringlengths 6
236
| copies
int64 1
472
| size
int64 137
1.04M
| content
stringlengths 137
1.04M
| license
stringclasses 15
values | hash
stringlengths 32
32
| alpha_frac
float64 0.25
0.96
| ratio
float64 1.51
17.5
| autogenerated
bool 1
class | config_or_test
bool 2
classes | has_no_keywords
bool 1
class | has_few_assignments
bool 1
class |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
sergeykhbr/riscv_vhdl | vhdl/rtl/riverlib/core/dbg_port.vhd | 1 | 11,006 | --!
--! Copyright 2019 Sergey Khabarov, [email protected]
--!
--! Licensed under the Apache License, Version 2.0 (the "License");
--! you may not use this file except in compliance with the License.
--! You may obtain a copy of the License at
--!
--! http://www.apache.org/licenses/LICENSE-2.0
--!
--! Unless required by applicable law or agreed to in writing, software
--! distributed under the License is distributed on an "AS IS" BASIS,
--! WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
--! See the License for the specific language governing permissions and
--! limitations under the License.
--!
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_misc.all; -- or_reduce()
library commonlib;
use commonlib.types_common.all;
--! RIVER CPU specific library.
library riverlib;
--! RIVER CPU configuration constants.
use riverlib.river_cfg.all;
entity DbgPort is generic (
async_reset : boolean
);
port (
i_clk : in std_logic; -- CPU clock
i_nrst : in std_logic; -- Reset. Active LOW.
-- "RIVER" Debug interface
i_dport_req_valid : in std_logic; -- Debug access from DSU is valid
i_dport_write : in std_logic; -- Write command flag
i_dport_addr : in std_logic_vector(CFG_DPORT_ADDR_BITS-1 downto 0); -- Debug Port address
i_dport_wdata : in std_logic_vector(RISCV_ARCH-1 downto 0);-- Write value
o_dport_req_ready : out std_logic; -- Ready to accept dbg request
i_dport_resp_ready : in std_logic; -- Read to accept response
o_dport_resp_valid : out std_logic; -- Response is valid
o_dport_rdata : out std_logic_vector(RISCV_ARCH-1 downto 0);-- Response value
-- CPU debugging signals:
o_csr_addr : out std_logic_vector(11 downto 0); -- Address of the sub-region register
o_reg_addr : out std_logic_vector(5 downto 0);
o_core_wdata : out std_logic_vector(RISCV_ARCH-1 downto 0);-- Write data
o_csr_ena : out std_logic; -- Region 0: Access to CSR bank is enabled.
o_csr_write : out std_logic; -- Region 0: CSR write enable
i_csr_valid : in std_logic;
i_csr_rdata : in std_logic_vector(RISCV_ARCH-1 downto 0); -- Region 0: CSR read value
o_ireg_ena : out std_logic; -- Region 1: Access to integer register bank is enabled
o_ireg_write : out std_logic; -- Region 1: Integer registers bank write pulse
i_ireg_rdata : in std_logic_vector(RISCV_ARCH-1 downto 0);-- Region 1: Integer register read value
i_pc : in std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0); -- Region 1: Instruction pointer
i_npc : in std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);-- Region 1: Next Instruction pointer
i_e_call : in std_logic; -- pseudo-instruction CALL
i_e_ret : in std_logic -- pseudo-instruction RET
);
end;
architecture arch_DbgPort of DbgPort is
constant zero64 : std_logic_vector(63 downto 0) := (others => '0');
constant one64 : std_logic_vector(63 downto 0) := X"0000000000000001";
constant idle : std_logic_vector(2 downto 0) := "000";
constant csr_region : std_logic_vector(2 downto 0) := "001";
constant reg_bank : std_logic_vector(2 downto 0) := "010";
constant reg_stktr_cnt : std_logic_vector(2 downto 0) := "011";
constant reg_stktr_buf_adr : std_logic_vector(2 downto 0) := "100";
constant reg_stktr_buf_dat : std_logic_vector(2 downto 0) := "101";
constant wait_to_accept : std_logic_vector(2 downto 0) := "110";
type RegistersType is record
dport_write : std_logic;
dport_addr : std_logic_vector(CFG_DPORT_ADDR_BITS-1 downto 0);
dport_wdata : std_logic_vector(RISCV_ARCH-1 downto 0);
dport_rdata : std_logic_vector(RISCV_ARCH-1 downto 0);
dstate : std_logic_vector(2 downto 0);
rdata : std_logic_vector(RISCV_ARCH-1 downto 0);
stack_trace_cnt : std_logic_vector(CFG_LOG2_STACK_TRACE_ADDR-1 downto 0); -- Stack trace buffer counter
end record;
constant R_RESET : RegistersType := (
'0', -- dport_write
(others => '0'), -- dport_addr
(others => '0'), -- dport_wdata
(others => '0'), -- dport_rdata
idle, -- dstate
(others => '0'), -- rdata
(others => '0') -- stack_trace_cnt
);
signal r, rin : RegistersType;
signal wb_stack_raddr : std_logic_vector(CFG_LOG2_STACK_TRACE_ADDR-1 downto 0);
signal wb_stack_rdata : std_logic_vector(2*CFG_CPU_ADDR_BITS-1 downto 0);
signal w_stack_we : std_logic;
signal wb_stack_waddr : std_logic_vector(CFG_LOG2_STACK_TRACE_ADDR-1 downto 0);
signal wb_stack_wdata : std_logic_vector(2*CFG_CPU_ADDR_BITS-1 downto 0);
component StackTraceBuffer is
generic (
abits : integer := 5;
dbits : integer := 64
);
port (
i_clk : in std_logic;
i_raddr : in std_logic_vector(abits-1 downto 0);
o_rdata : out std_logic_vector(dbits-1 downto 0);
i_we : in std_logic;
i_waddr : in std_logic_vector(abits-1 downto 0);
i_wdata : in std_logic_vector(dbits-1 downto 0)
);
end component;
begin
stacktr_ena : if CFG_LOG2_STACK_TRACE_ADDR /= 0 generate
stacktr0 : StackTraceBuffer generic map (
abits => CFG_LOG2_STACK_TRACE_ADDR,
dbits => 2*CFG_CPU_ADDR_BITS
) port map (
i_clk => i_clk,
i_raddr => wb_stack_raddr,
o_rdata => wb_stack_rdata,
i_we => w_stack_we,
i_waddr => wb_stack_waddr,
i_wdata => wb_stack_wdata
);
end generate;
comb : process(i_nrst, i_dport_req_valid, i_dport_write,
i_dport_addr, i_dport_wdata, i_dport_resp_ready,
i_csr_valid, i_csr_rdata, i_ireg_rdata, i_pc, i_npc,
i_e_call, i_e_ret, wb_stack_rdata, r)
variable v : RegistersType;
variable wb_o_csr_addr : std_logic_vector(11 downto 0);
variable wb_o_reg_addr : std_logic_vector(5 downto 0);
variable wb_o_core_wdata : std_logic_vector(RISCV_ARCH-1 downto 0);
variable wb_idx : integer range 0 to 4095;
variable w_o_csr_ena : std_logic;
variable w_o_csr_write : std_logic;
variable w_o_ireg_ena : std_logic;
variable w_o_ireg_write : std_logic;
variable v_req_ready : std_logic;
variable v_resp_valid : std_logic;
variable vrdata : std_logic_vector(63 downto 0);
begin
v := r;
wb_o_csr_addr := (others => '0');
wb_o_reg_addr := (others => '0');
wb_o_core_wdata := (others => '0');
wb_idx := conv_integer(i_dport_addr(11 downto 0));
w_o_csr_ena := '0';
w_o_csr_write := '0';
w_o_ireg_ena := '0';
w_o_ireg_write := '0';
wb_stack_raddr <= (others => '0');
w_stack_we <= '0';
wb_stack_waddr <= (others => '0');
wb_stack_wdata <= (others => '0');
v_req_ready := '0';
v_resp_valid := '0';
vrdata := r.dport_rdata;
if CFG_LOG2_STACK_TRACE_ADDR /= 0 then
if i_e_call = '1' and conv_integer(r.stack_trace_cnt) /= (STACK_TRACE_BUF_SIZE - 1) then
w_stack_we <= '1';
wb_stack_waddr <= r.stack_trace_cnt(CFG_LOG2_STACK_TRACE_ADDR-1 downto 0);
wb_stack_wdata <= i_npc & i_pc;
v.stack_trace_cnt := r.stack_trace_cnt + 1;
elsif i_e_ret = '1' and or_reduce(r.stack_trace_cnt) = '1' then
v.stack_trace_cnt := r.stack_trace_cnt - 1;
end if;
end if;
case r.dstate is
when idle =>
v_req_ready := '1';
vrdata := (others => '0');
if i_dport_req_valid = '1' then
v.dport_write := i_dport_write;
v.dport_addr := i_dport_addr;
v.dport_wdata := i_dport_wdata;
if conv_integer(i_dport_addr(CFG_DPORT_ADDR_BITS-1 downto 12)) = 0 then
v.dstate := csr_region;
elsif conv_integer(i_dport_addr(CFG_DPORT_ADDR_BITS-1 downto 12)) = 1 then
if wb_idx < 64 then
v.dstate := reg_bank;
elsif wb_idx = 64 then
v.dstate := reg_stktr_cnt;
elsif (wb_idx >= 128) and (wb_idx < (128 + 2 * STACK_TRACE_BUF_SIZE)) then
v.dstate := reg_stktr_buf_adr;
else
vrdata := (others => '0');
v.dstate := wait_to_accept;
end if;
else
v.dstate := wait_to_accept;
end if;
end if;
when csr_region =>
w_o_csr_ena := '1';
wb_o_csr_addr := r.dport_addr(11 downto 0);
if r.dport_write = '1' then
w_o_csr_write := '1';
wb_o_core_wdata := r.dport_wdata;
end if;
if i_csr_valid = '1' then
vrdata := i_csr_rdata;
v.dstate := wait_to_accept;
end if;
when reg_bank =>
w_o_ireg_ena := '1';
wb_o_reg_addr := r.dport_addr(5 downto 0);
vrdata := i_ireg_rdata;
if r.dport_write = '1' then
w_o_ireg_write := '1';
wb_o_core_wdata := r.dport_wdata;
end if;
v.dstate := wait_to_accept;
when reg_stktr_cnt =>
vrdata := (others => '0');
vrdata(CFG_LOG2_STACK_TRACE_ADDR-1 downto 0) := r.stack_trace_cnt;
if r.dport_write = '1' then
v.stack_trace_cnt := r.dport_wdata(CFG_LOG2_STACK_TRACE_ADDR-1 downto 0);
end if;
v.dstate := wait_to_accept;
when reg_stktr_buf_adr =>
wb_stack_raddr <= r.dport_addr(CFG_LOG2_STACK_TRACE_ADDR downto 1);
v.dstate := reg_stktr_buf_dat;
when reg_stktr_buf_dat =>
if r.dport_addr(0) = '0' then
vrdata(CFG_CPU_ADDR_BITS-1 downto 0) :=
wb_stack_rdata(CFG_CPU_ADDR_BITS-1 downto 0);
else
vrdata(CFG_CPU_ADDR_BITS-1 downto 0) :=
wb_stack_rdata(2*CFG_CPU_ADDR_BITS-1 downto CFG_CPU_ADDR_BITS);
end if;
v.dstate := wait_to_accept;
when wait_to_accept =>
v_resp_valid := '1';
if i_dport_resp_ready = '1' then
v.dstate := idle;
end if;
when others =>
end case;
v.dport_rdata := vrdata;
if not async_reset and i_nrst = '0' then
v := R_RESET;
end if;
rin <= v;
o_csr_addr <= wb_o_csr_addr;
o_reg_addr <= wb_o_reg_addr;
o_core_wdata <= wb_o_core_wdata;
o_csr_ena <= w_o_csr_ena;
o_csr_write <= w_o_csr_write;
o_ireg_ena <= w_o_ireg_ena;
o_ireg_write <= w_o_ireg_write;
o_dport_req_ready <= v_req_ready;
o_dport_resp_valid <= v_resp_valid;
o_dport_rdata <= r.dport_rdata;
end process;
-- registers:
regs : process(i_clk, i_nrst)
begin
if async_reset and i_nrst = '0' then
r <= R_RESET;
elsif rising_edge(i_clk) then
r <= rin;
end if;
end process;
end;
| apache-2.0 | e8c1ec50985180536d1ed4f151d43f9e | 0.570325 | 3.225674 | false | false | false | false |
Bjay1435/capstone | Geoff/Geoff.srcs/sources_1/bd/dma_loopback/ipshared/xilinx.com/axi_sg_v4_1/hdl/src/vhdl/axi_sg_wr_status_cntl.vhd | 1 | 57,339 | -- *************************************************************************
--
-- (c) Copyright 2010-2011 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
--
-- *************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: axi_sg_wr_status_cntl.vhd
--
-- Description:
-- This file implements the DataMover Master Write Status Controller.
--
--
--
--
-- VHDL-Standard: VHDL'93
-------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
library axi_sg_v4_1_3;
use axi_sg_v4_1_3.axi_sg_fifo;
-------------------------------------------------------------------------------
entity axi_sg_wr_status_cntl is
generic (
C_ENABLE_INDET_BTT : Integer range 0 to 1 := 0;
-- Specifies if the Indeterminate BTT Module is enabled
-- for use (outside of this module)
C_SF_BYTES_RCVD_WIDTH : Integer range 1 to 23 := 1;
-- Sets the width of the data2wsc_bytes_rcvd port used for
-- relaying the actual number of bytes received when Idet BTT is
-- enabled (C_ENABLE_INDET_BTT = 1)
C_STS_FIFO_DEPTH : Integer range 1 to 32 := 8;
-- Specifies the depth of the internal status queue fifo
C_STS_WIDTH : Integer range 8 to 32 := 8;
-- sets the width of the Status ports
C_TAG_WIDTH : Integer range 1 to 8 := 4;
-- Sets the width of the Tag field in the Status reply
C_FAMILY : String := "virtex7"
-- Specifies the target FPGA device family
);
port (
-- Clock and Reset inputs ------------------------------------------
--
primary_aclk : in std_logic; --
-- Primary synchronization clock for the Master side --
-- interface and internal logic. It is also used --
-- for the User interface synchronization when --
-- C_STSCMD_IS_ASYNC = 0. --
--
-- Reset input --
mmap_reset : in std_logic; --
-- Reset used for the internal master logic --
--------------------------------------------------------------------
-- Soft Shutdown Control interface --------------------------------
--
rst2wsc_stop_request : in std_logic; --
-- Active high soft stop request to modules --
--
wsc2rst_stop_cmplt : Out std_logic; --
-- Active high indication that the Write status Controller --
-- has completed any pending transfers committed by the --
-- Address Controller after a stop has been requested by --
-- the Reset module. --
--
addr2wsc_addr_posted : In std_logic ; --
-- Indication from the Address Channel Controller to the --
-- write Status Controller that an address has been posted --
-- to the AXI Address Channel --
--------------------------------------------------------------------
-- Write Response Channel Interface -------------------------------
--
s2mm_bresp : In std_logic_vector(1 downto 0); --
-- The Write response value --
--
s2mm_bvalid : In std_logic ; --
-- Indication from the Write Response Channel that a new --
-- write status input is valid --
--
s2mm_bready : out std_logic ; --
-- Indication to the Write Response Channel that the --
-- Status module is ready for a new status input --
--------------------------------------------------------------------
-- Command Calculator Interface -------------------------------------
--
calc2wsc_calc_error : in std_logic ; --
-- Indication from the Command Calculator that a calculation --
-- error has occured. --
---------------------------------------------------------------------
-- Address Controller Status ----------------------------------------
--
addr2wsc_calc_error : In std_logic ; --
-- Indication from the Address Channel Controller that it --
-- has encountered a calculation error from the command --
-- Calculator --
--
addr2wsc_fifo_empty : In std_logic ; --
-- Indication from the Address Controller FIFO that it --
-- is empty (no commands pending) --
---------------------------------------------------------------------
-- Data Controller Status ---------------------------------------------------------
--
data2wsc_tag : In std_logic_vector(C_TAG_WIDTH-1 downto 0); --
-- The command tag --
--
data2wsc_calc_error : In std_logic ; --
-- Indication from the Data Channel Controller FIFO that it --
-- has encountered a Calculation error in the command pipe --
--
data2wsc_last_error : In std_logic ; --
-- Indication from the Write Data Channel Controller that a --
-- premature TLAST assertion was encountered on the incoming --
-- Stream Channel --
--
data2wsc_cmd_cmplt : In std_logic ; --
-- Indication from the Data Channel Controller that the --
-- corresponding status is the final status for a parent --
-- command fetched from the command FIFO --
--
data2wsc_valid : In std_logic ; --
-- Indication from the Data Channel Controller FIFO that it --
-- has a new tag/error status to transfer --
--
wsc2data_ready : out std_logic ; --
-- Indication to the Data Channel Controller FIFO that the --
-- Status module is ready for a new tag/error status input --
--
--
data2wsc_eop : In std_logic; --
-- Input from the Write Data Controller indicating that the --
-- associated command status also corresponds to a End of Packet --
-- marker for the input Stream. This is only used when Store and --
-- Forward is enabled in the S2MM. --
--
data2wsc_bytes_rcvd : In std_logic_vector(C_SF_BYTES_RCVD_WIDTH-1 downto 0); --
-- Input from the Write Data Controller indicating the actual --
-- number of bytes received from the Stream input for the --
-- corresponding command status. This is only used when Store and --
-- Forward is enabled in the S2MM. --
------------------------------------------------------------------------------------
-- Command/Status Interface --------------------------------------------------------
--
wsc2stat_status : Out std_logic_vector(C_STS_WIDTH-1 downto 0); --
-- Read Status value collected during a Read Data transfer --
-- Output to the Command/Status Module --
--
stat2wsc_status_ready : In std_logic; --
-- Input from the Command/Status Module indicating that the --
-- Status Reg/FIFO is Full and cannot accept more staus writes --
--
wsc2stat_status_valid : Out std_logic ; --
-- Control Signal to Write the Status value to the Status --
-- Reg/FIFO --
------------------------------------------------------------------------------------
-- Address and Data Controller Pipe halt --------------------------------
--
wsc2mstr_halt_pipe : Out std_logic --
-- Indication to Halt the Data and Address Command pipeline due --
-- to the Status pipe getting full at some point --
-------------------------------------------------------------------------
);
end entity axi_sg_wr_status_cntl;
architecture implementation of axi_sg_wr_status_cntl is
attribute DowngradeIPIdentifiedWarnings: string;
attribute DowngradeIPIdentifiedWarnings of implementation : architecture is "yes";
-------------------------------------------------------------------
-- Function
--
-- Function Name: funct_set_cnt_width
--
-- Function Description:
-- Sets a count width based on a fifo depth. A depth of 4 or less
-- is a special case which requires a minimum count width of 3 bits.
--
-------------------------------------------------------------------
function funct_set_cnt_width (fifo_depth : integer) return integer is
Variable temp_cnt_width : Integer := 4;
begin
if (fifo_depth <= 4) then
temp_cnt_width := 3;
-- coverage off
elsif (fifo_depth <= 8) then
temp_cnt_width := 4;
elsif (fifo_depth <= 16) then
temp_cnt_width := 5;
elsif (fifo_depth <= 32) then
temp_cnt_width := 6;
else -- fifo depth <= 64
temp_cnt_width := 7;
-- coverage on
end if;
Return (temp_cnt_width);
end function funct_set_cnt_width;
-- Constant Declarations --------------------------------------------
Constant OKAY : std_logic_vector(1 downto 0) := "00";
Constant EXOKAY : std_logic_vector(1 downto 0) := "01";
Constant SLVERR : std_logic_vector(1 downto 0) := "10";
Constant DECERR : std_logic_vector(1 downto 0) := "11";
Constant STAT_RSVD : std_logic_vector(3 downto 0) := "0000";
Constant TAG_WIDTH : integer := C_TAG_WIDTH;
Constant STAT_REG_TAG_WIDTH : integer := 4;
Constant SYNC_FIFO_SELECT : integer := 0;
Constant SRL_FIFO_TYPE : integer := 2;
Constant DCNTL_SFIFO_DEPTH : integer := C_STS_FIFO_DEPTH;
Constant DCNTL_STATCNT_WIDTH : integer := funct_set_cnt_width(C_STS_FIFO_DEPTH);-- bits
Constant DCNTL_HALT_THRES : unsigned(DCNTL_STATCNT_WIDTH-1 downto 0) :=
TO_UNSIGNED(DCNTL_SFIFO_DEPTH-2,DCNTL_STATCNT_WIDTH);
Constant DCNTL_STATCNT_ZERO : unsigned(DCNTL_STATCNT_WIDTH-1 downto 0) := (others => '0');
Constant DCNTL_STATCNT_MAX : unsigned(DCNTL_STATCNT_WIDTH-1 downto 0) :=
TO_UNSIGNED(DCNTL_SFIFO_DEPTH,DCNTL_STATCNT_WIDTH);
Constant DCNTL_STATCNT_ONE : unsigned(DCNTL_STATCNT_WIDTH-1 downto 0) :=
TO_UNSIGNED(1, DCNTL_STATCNT_WIDTH);
Constant WRESP_WIDTH : integer := 2;
Constant WRESP_SFIFO_WIDTH : integer := WRESP_WIDTH;
Constant WRESP_SFIFO_DEPTH : integer := DCNTL_SFIFO_DEPTH;
Constant ADDR_POSTED_CNTR_WIDTH : integer := funct_set_cnt_width(C_STS_FIFO_DEPTH);-- bits
Constant ADDR_POSTED_ZERO : unsigned(ADDR_POSTED_CNTR_WIDTH-1 downto 0)
:= (others => '0');
Constant ADDR_POSTED_ONE : unsigned(ADDR_POSTED_CNTR_WIDTH-1 downto 0)
:= TO_UNSIGNED(1, ADDR_POSTED_CNTR_WIDTH);
Constant ADDR_POSTED_MAX : unsigned(ADDR_POSTED_CNTR_WIDTH-1 downto 0)
:= (others => '1');
-- Signal Declarations --------------------------------------------
signal sig_valid_status_rdy : std_logic := '0';
signal sig_decerr : std_logic := '0';
signal sig_slverr : std_logic := '0';
signal sig_coelsc_okay_reg : std_logic := '0';
signal sig_coelsc_interr_reg : std_logic := '0';
signal sig_coelsc_decerr_reg : std_logic := '0';
signal sig_coelsc_slverr_reg : std_logic := '0';
signal sig_coelsc_tag_reg : std_logic_vector(TAG_WIDTH-1 downto 0) := (others => '0');
signal sig_pop_coelsc_reg : std_logic := '0';
signal sig_push_coelsc_reg : std_logic := '0';
signal sig_coelsc_reg_empty : std_logic := '0';
signal sig_coelsc_reg_full : std_logic := '0';
signal sig_tag2status : std_logic_vector(TAG_WIDTH-1 downto 0) := (others => '0');
signal sig_data_tag_reg : std_logic_vector(TAG_WIDTH-1 downto 0) := (others => '0');
signal sig_data_err_reg : std_logic := '0';
signal sig_data_last_err_reg : std_logic := '0';
signal sig_data_cmd_cmplt_reg : std_logic := '0';
signal sig_bresp_reg : std_logic_vector(1 downto 0) := (others => '0');
signal sig_push_status : std_logic := '0';
Signal sig_status_push_ok : std_logic := '0';
signal sig_status_valid : std_logic := '0';
signal sig_wsc2data_ready : std_logic := '0';
signal sig_s2mm_bready : std_logic := '0';
signal sig_wresp_sfifo_in : std_logic_vector(WRESP_SFIFO_WIDTH-1 downto 0) := (others => '0');
signal sig_wresp_sfifo_out : std_logic_vector(WRESP_SFIFO_WIDTH-1 downto 0) := (others => '0');
signal sig_wresp_sfifo_wr_valid : std_logic := '0';
signal sig_wresp_sfifo_wr_ready : std_logic := '0';
signal sig_wresp_sfifo_wr_full : std_logic := '0';
signal sig_wresp_sfifo_rd_valid : std_logic := '0';
signal sig_wresp_sfifo_rd_ready : std_logic := '0';
signal sig_wresp_sfifo_rd_empty : std_logic := '0';
signal sig_halt_reg : std_logic := '0';
signal sig_halt_reg_dly1 : std_logic := '0';
signal sig_halt_reg_dly2 : std_logic := '0';
signal sig_halt_reg_dly3 : std_logic := '0';
signal sig_addr_posted_cntr : unsigned(ADDR_POSTED_CNTR_WIDTH-1 downto 0) := (others => '0');
signal sig_addr_posted_cntr_eq_0 : std_logic := '0';
signal sig_addr_posted_cntr_eq_1 : std_logic := '0';
signal sig_addr_posted_cntr_max : std_logic := '0';
signal sig_decr_addr_posted_cntr : std_logic := '0';
signal sig_incr_addr_posted_cntr : std_logic := '0';
signal sig_no_posted_cmds : std_logic := '0';
signal sig_addr_posted : std_logic := '0';
signal sig_all_cmds_done : std_logic := '0';
signal sig_wsc2stat_status : std_logic_vector(C_STS_WIDTH-1 downto 0) := (others => '0');
signal sig_dcntl_sfifo_wr_valid : std_logic := '0';
signal sig_dcntl_sfifo_wr_ready : std_logic := '0';
signal sig_dcntl_sfifo_wr_full : std_logic := '0';
signal sig_dcntl_sfifo_rd_valid : std_logic := '0';
signal sig_dcntl_sfifo_rd_ready : std_logic := '0';
signal sig_dcntl_sfifo_rd_empty : std_logic := '0';
signal sig_wdc_statcnt : unsigned(DCNTL_STATCNT_WIDTH-1 downto 0) := (others => '0');
signal sig_incr_statcnt : std_logic := '0';
signal sig_decr_statcnt : std_logic := '0';
signal sig_statcnt_eq_max : std_logic := '0';
signal sig_statcnt_eq_0 : std_logic := '0';
signal sig_statcnt_gt_eq_thres : std_logic := '0';
signal sig_wdc_status_going_full : std_logic := '0';
begin --(architecture implementation)
-- Assign the ready output to the AXI Write Response Channel
s2mm_bready <= sig_s2mm_bready or
sig_halt_reg; -- force bready if a Halt is requested
-- Assign the ready output to the Data Controller status interface
wsc2data_ready <= sig_wsc2data_ready;
-- Assign the status valid output control to the Status FIFO
wsc2stat_status_valid <= sig_status_valid ;
-- Formulate the status output value to the Status FIFO
wsc2stat_status <= sig_wsc2stat_status;
-- Formulate the status write request signal
sig_status_valid <= sig_push_status;
-- Indicate the desire to push a coelesced status word
-- to the Status FIFO
sig_push_status <= sig_coelsc_reg_full;
-- Detect that a push of a new status word is completing
sig_status_push_ok <= sig_status_valid and
stat2wsc_status_ready;
sig_pop_coelsc_reg <= sig_status_push_ok;
-- Signal a halt to the execution pipe if new status
-- is valid but the Status FIFO is not accepting it or
-- the WDC Status FIFO is going full
wsc2mstr_halt_pipe <= (sig_status_valid and
not(stat2wsc_status_ready)) or
sig_wdc_status_going_full;
-- Monitor the Status capture registers to detect a
-- qualified Status set and push to the coelescing register
-- when available to do so
sig_push_coelsc_reg <= sig_valid_status_rdy and
sig_coelsc_reg_empty;
-- pre CR616212 sig_valid_status_rdy <= (sig_wresp_sfifo_rd_valid and
-- pre CR616212 sig_dcntl_sfifo_rd_valid) or
-- pre CR616212 (sig_data_err_reg and
-- pre CR616212 sig_dcntl_sfifo_rd_valid);
sig_valid_status_rdy <= (sig_wresp_sfifo_rd_valid and
sig_dcntl_sfifo_rd_valid) or
(sig_data_err_reg and
sig_dcntl_sfifo_rd_valid) or -- or Added for CR616212
(sig_data_last_err_reg and -- Added for CR616212
sig_dcntl_sfifo_rd_valid); -- Added for CR616212
-- Decode the AXI MMap Read Respose
sig_decerr <= '1'
When sig_bresp_reg = DECERR
Else '0';
sig_slverr <= '1'
When sig_bresp_reg = SLVERR
Else '0';
------------------------------------------------------------
-- If Generate
--
-- Label: GEN_TAG_LE_STAT
--
-- If Generate Description:
-- Populates the TAG bits into the availble Status bits when
-- the TAG width is less than or equal to the available number
-- of bits in the Status word.
--
------------------------------------------------------------
GEN_TAG_LE_STAT : if (TAG_WIDTH <= STAT_REG_TAG_WIDTH) generate
-- local signals
signal lsig_temp_tag_small : std_logic_vector(STAT_REG_TAG_WIDTH-1 downto 0) := (others => '0');
begin
sig_tag2status <= lsig_temp_tag_small;
-------------------------------------------------------------
-- Combinational Process
--
-- Label: POPULATE_SMALL_TAG
--
-- Process Description:
--
--
-------------------------------------------------------------
POPULATE_SMALL_TAG : process (sig_coelsc_tag_reg)
begin
-- Set default value
lsig_temp_tag_small <= (others => '0');
-- Now overload actual TAG bits
lsig_temp_tag_small(TAG_WIDTH-1 downto 0) <= sig_coelsc_tag_reg;
end process POPULATE_SMALL_TAG;
end generate GEN_TAG_LE_STAT;
------------------------------------------------------------
-- If Generate
--
-- Label: GEN_TAG_GT_STAT
--
-- If Generate Description:
-- Populates the TAG bits into the availble Status bits when
-- the TAG width is greater than the available number of
-- bits in the Status word. The upper bits of the TAG are
-- clipped off (discarded).
--
------------------------------------------------------------
GEN_TAG_GT_STAT : if (TAG_WIDTH > STAT_REG_TAG_WIDTH) generate
-- local signals
signal lsig_temp_tag_big : std_logic_vector(STAT_REG_TAG_WIDTH-1 downto 0) := (others => '0');
begin
sig_tag2status <= lsig_temp_tag_big;
-------------------------------------------------------------
-- Combinational Process
--
-- Label: POPULATE_BIG_TAG
--
-- Process Description:
--
--
-------------------------------------------------------------
POPULATE_SMALL_TAG : process (sig_coelsc_tag_reg)
begin
-- Set default value
lsig_temp_tag_big <= (others => '0');
-- Now overload actual TAG bits
lsig_temp_tag_big <= sig_coelsc_tag_reg(STAT_REG_TAG_WIDTH-1 downto 0);
end process POPULATE_SMALL_TAG;
end generate GEN_TAG_GT_STAT;
-------------------------------------------------------------------------
-- Write Response Channel input FIFO and logic
-- BRESP is the only fifo data
sig_wresp_sfifo_in <= s2mm_bresp;
-- The fifo output is already in the right format
sig_bresp_reg <= sig_wresp_sfifo_out;
-- Write Side assignments
sig_wresp_sfifo_wr_valid <= s2mm_bvalid;
sig_s2mm_bready <= sig_wresp_sfifo_wr_ready;
-- read Side ready assignment
sig_wresp_sfifo_rd_ready <= sig_push_coelsc_reg;
------------------------------------------------------------
-- Instance: I_WRESP_STATUS_FIFO
--
-- Description:
-- Instance for the AXI Write Response FIFO
--
------------------------------------------------------------
I_WRESP_STATUS_FIFO : entity axi_sg_v4_1_3.axi_sg_fifo
generic map (
C_DWIDTH => WRESP_SFIFO_WIDTH ,
C_DEPTH => WRESP_SFIFO_DEPTH ,
C_IS_ASYNC => SYNC_FIFO_SELECT ,
C_PRIM_TYPE => SRL_FIFO_TYPE ,
C_FAMILY => C_FAMILY
)
port map (
-- Write Clock and reset
fifo_wr_reset => mmap_reset ,
fifo_wr_clk => primary_aclk ,
-- Write Side
fifo_wr_tvalid => sig_wresp_sfifo_wr_valid ,
fifo_wr_tready => sig_wresp_sfifo_wr_ready ,
fifo_wr_tdata => sig_wresp_sfifo_in ,
fifo_wr_full => sig_wresp_sfifo_wr_full ,
-- Read Clock and reset (not used in Sync mode)
fifo_async_rd_reset => mmap_reset ,
fifo_async_rd_clk => primary_aclk ,
-- Read Side
fifo_rd_tvalid => sig_wresp_sfifo_rd_valid ,
fifo_rd_tready => sig_wresp_sfifo_rd_ready ,
fifo_rd_tdata => sig_wresp_sfifo_out ,
fifo_rd_empty => sig_wresp_sfifo_rd_empty
);
-------- Write Data Controller Status FIFO Going Full Logic -------------
sig_incr_statcnt <= sig_dcntl_sfifo_wr_valid and
sig_dcntl_sfifo_wr_ready;
sig_decr_statcnt <= sig_dcntl_sfifo_rd_valid and
sig_dcntl_sfifo_rd_ready;
sig_statcnt_eq_max <= '1'
when (sig_wdc_statcnt = DCNTL_STATCNT_MAX)
Else '0';
sig_statcnt_eq_0 <= '1'
when (sig_wdc_statcnt = DCNTL_STATCNT_ZERO)
Else '0';
sig_statcnt_gt_eq_thres <= '1'
when (sig_wdc_statcnt >= DCNTL_HALT_THRES)
Else '0';
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_WDC_GOING_FULL_FLOP
--
-- Process Description:
-- Implements a flop for the WDC Status FIFO going full flag.
--
-------------------------------------------------------------
IMP_WDC_GOING_FULL_FLOP : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (mmap_reset = '1') then
sig_wdc_status_going_full <= '0';
else
sig_wdc_status_going_full <= sig_statcnt_gt_eq_thres;
end if;
end if;
end process IMP_WDC_GOING_FULL_FLOP;
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_DCNTL_FIFO_CNTR
--
-- Process Description:
-- Implements a simple counter keeping track of the number
-- of entries in the WDC Status FIFO. If the Status FIFO gets
-- too full, the S2MM Data Pipe has to be halted.
--
-------------------------------------------------------------
IMP_DCNTL_FIFO_CNTR : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (mmap_reset = '1') then
sig_wdc_statcnt <= (others => '0');
elsif (sig_incr_statcnt = '1' and
sig_decr_statcnt = '0' and
sig_statcnt_eq_max = '0') then
sig_wdc_statcnt <= sig_wdc_statcnt + DCNTL_STATCNT_ONE;
elsif (sig_incr_statcnt = '0' and
sig_decr_statcnt = '1' and
sig_statcnt_eq_0 = '0') then
sig_wdc_statcnt <= sig_wdc_statcnt - DCNTL_STATCNT_ONE;
else
null; -- Hold current count value
end if;
end if;
end process IMP_DCNTL_FIFO_CNTR;
------------------------------------------------------------
-- If Generate
--
-- Label: GEN_OMIT_INDET_BTT
--
-- If Generate Description:
-- Implements the logic needed when Indeterminate BTT is
-- not enabled in the S2MM function.
--
------------------------------------------------------------
GEN_OMIT_INDET_BTT : if (C_ENABLE_INDET_BTT = 0) generate
-- Local Constants
Constant DCNTL_SFIFO_WIDTH : integer := STAT_REG_TAG_WIDTH+3;
Constant DCNTL_SFIFO_CMD_CMPLT_INDEX : integer := 0;
Constant DCNTL_SFIFO_TLAST_ERR_INDEX : integer := 1;
Constant DCNTL_SFIFO_CALC_ERR_INDEX : integer := 2;
Constant DCNTL_SFIFO_TAG_INDEX : integer := DCNTL_SFIFO_CALC_ERR_INDEX+1;
-- local signals
signal sig_dcntl_sfifo_in : std_logic_vector(DCNTL_SFIFO_WIDTH-1 downto 0) := (others => '0');
signal sig_dcntl_sfifo_out : std_logic_vector(DCNTL_SFIFO_WIDTH-1 downto 0) := (others => '0');
begin
sig_wsc2stat_status <= sig_coelsc_okay_reg &
sig_coelsc_slverr_reg &
sig_coelsc_decerr_reg &
sig_coelsc_interr_reg &
sig_tag2status;
-----------------------------------------------------------------------------
-- Data Controller Status FIFO and Logic
-- Concatonate Input bits to build Dcntl fifo data word
sig_dcntl_sfifo_in <= data2wsc_tag & -- bit 3 to tag Width+2
data2wsc_calc_error & -- bit 2
data2wsc_last_error & -- bit 1
data2wsc_cmd_cmplt ; -- bit 0
-- Rip the DCntl fifo outputs back to constituant pieces
sig_data_tag_reg <= sig_dcntl_sfifo_out((DCNTL_SFIFO_TAG_INDEX+STAT_REG_TAG_WIDTH)-1 downto
DCNTL_SFIFO_TAG_INDEX);
sig_data_err_reg <= sig_dcntl_sfifo_out(DCNTL_SFIFO_CALC_ERR_INDEX) ;
sig_data_last_err_reg <= sig_dcntl_sfifo_out(DCNTL_SFIFO_TLAST_ERR_INDEX);
sig_data_cmd_cmplt_reg <= sig_dcntl_sfifo_out(DCNTL_SFIFO_CMD_CMPLT_INDEX);
-- Data Control Valid/Ready assignments
sig_dcntl_sfifo_wr_valid <= data2wsc_valid ;
sig_wsc2data_ready <= sig_dcntl_sfifo_wr_ready;
-- read side ready assignment
sig_dcntl_sfifo_rd_ready <= sig_push_coelsc_reg;
------------------------------------------------------------
-- Instance: I_DATA_CNTL_STATUS_FIFO
--
-- Description:
-- Instance for the Command Qualifier FIFO
--
------------------------------------------------------------
I_DATA_CNTL_STATUS_FIFO : entity axi_sg_v4_1_3.axi_sg_fifo
generic map (
C_DWIDTH => DCNTL_SFIFO_WIDTH ,
C_DEPTH => DCNTL_SFIFO_DEPTH ,
C_IS_ASYNC => SYNC_FIFO_SELECT ,
C_PRIM_TYPE => SRL_FIFO_TYPE ,
C_FAMILY => C_FAMILY
)
port map (
-- Write Clock and reset
fifo_wr_reset => mmap_reset ,
fifo_wr_clk => primary_aclk ,
-- Write Side
fifo_wr_tvalid => sig_dcntl_sfifo_wr_valid ,
fifo_wr_tready => sig_dcntl_sfifo_wr_ready ,
fifo_wr_tdata => sig_dcntl_sfifo_in ,
fifo_wr_full => sig_dcntl_sfifo_wr_full ,
-- Read Clock and reset (not used in Sync mode)
fifo_async_rd_reset => mmap_reset ,
fifo_async_rd_clk => primary_aclk ,
-- Read Side
fifo_rd_tvalid => sig_dcntl_sfifo_rd_valid ,
fifo_rd_tready => sig_dcntl_sfifo_rd_ready ,
fifo_rd_tdata => sig_dcntl_sfifo_out ,
fifo_rd_empty => sig_dcntl_sfifo_rd_empty
);
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: STATUS_COELESC_REG
--
-- Process Description:
-- Implement error status coelescing register.
-- Once a bit is set it will remain set until the overall
-- status is written to the Status FIFO.
-- Tag bits are just registered at each valid dbeat.
--
-------------------------------------------------------------
STATUS_COELESC_REG : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (mmap_reset = '1' or
sig_pop_coelsc_reg = '1') then
sig_coelsc_tag_reg <= (others => '0');
sig_coelsc_interr_reg <= '0';
sig_coelsc_decerr_reg <= '0';
sig_coelsc_slverr_reg <= '0';
sig_coelsc_okay_reg <= '1'; -- set back to default of "OKAY"
sig_coelsc_reg_full <= '0';
sig_coelsc_reg_empty <= '1';
Elsif (sig_push_coelsc_reg = '1') Then
sig_coelsc_tag_reg <= sig_data_tag_reg;
sig_coelsc_interr_reg <= sig_data_err_reg or
sig_data_last_err_reg or
sig_coelsc_interr_reg;
sig_coelsc_decerr_reg <= not(sig_data_err_reg) and
(sig_decerr or
sig_coelsc_decerr_reg);
sig_coelsc_slverr_reg <= not(sig_data_err_reg) and
(sig_slverr or
sig_coelsc_slverr_reg);
sig_coelsc_okay_reg <= not(sig_decerr or
sig_coelsc_decerr_reg or
sig_slverr or
sig_coelsc_slverr_reg or
sig_data_err_reg or
sig_data_last_err_reg or
sig_coelsc_interr_reg
);
sig_coelsc_reg_full <= sig_data_cmd_cmplt_reg;
sig_coelsc_reg_empty <= not(sig_data_cmd_cmplt_reg);
else
null; -- hold current state
end if;
end if;
end process STATUS_COELESC_REG;
end generate GEN_OMIT_INDET_BTT;
------------------------------------------------------------
-- If Generate
--
-- Label: GEN_ENABLE_INDET_BTT
--
-- If Generate Description:
-- Implements the logic needed when Indeterminate BTT is
-- enabled in the S2MM function. Primary difference is the
-- addition to the reported status of the End of Packet
-- marker (EOP) and the received byte count for the parent
-- command.
--
------------------------------------------------------------
GEN_ENABLE_INDET_BTT : if (C_ENABLE_INDET_BTT = 1) generate
-- Local Constants
Constant SF_DCNTL_SFIFO_WIDTH : integer := TAG_WIDTH +
C_SF_BYTES_RCVD_WIDTH + 3;
Constant SF_SFIFO_LS_TAG_INDEX : integer := 0;
Constant SF_SFIFO_MS_TAG_INDEX : integer := SF_SFIFO_LS_TAG_INDEX + (TAG_WIDTH-1);
Constant SF_SFIFO_CALC_ERR_INDEX : integer := SF_SFIFO_MS_TAG_INDEX+1;
Constant SF_SFIFO_CMD_CMPLT_INDEX : integer := SF_SFIFO_CALC_ERR_INDEX+1;
Constant SF_SFIFO_LS_BYTES_RCVD_INDEX : integer := SF_SFIFO_CMD_CMPLT_INDEX+1;
Constant SF_SFIFO_MS_BYTES_RCVD_INDEX : integer := SF_SFIFO_LS_BYTES_RCVD_INDEX+
(C_SF_BYTES_RCVD_WIDTH-1);
Constant SF_SFIFO_EOP_INDEX : integer := SF_SFIFO_MS_BYTES_RCVD_INDEX+1;
Constant BYTES_RCVD_FIELD_WIDTH : integer := 23;
-- local signals
signal sig_dcntl_sfifo_in : std_logic_vector(SF_DCNTL_SFIFO_WIDTH-1 downto 0) := (others => '0');
signal sig_dcntl_sfifo_out : std_logic_vector(SF_DCNTL_SFIFO_WIDTH-1 downto 0) := (others => '0');
signal sig_data_bytes_rcvd : std_logic_vector(C_SF_BYTES_RCVD_WIDTH-1 downto 0) := (others => '0');
signal sig_data_eop : std_logic := '0';
signal sig_coelsc_bytes_rcvd : std_logic_vector(C_SF_BYTES_RCVD_WIDTH-1 downto 0) := (others => '0');
signal sig_coelsc_eop : std_logic := '0';
signal sig_coelsc_bytes_rcvd_pad : std_logic_vector(BYTES_RCVD_FIELD_WIDTH-1 downto 0) := (others => '0');
begin
sig_wsc2stat_status <= sig_coelsc_eop &
sig_coelsc_bytes_rcvd_pad &
sig_coelsc_okay_reg &
sig_coelsc_slverr_reg &
sig_coelsc_decerr_reg &
sig_coelsc_interr_reg &
sig_tag2status;
-----------------------------------------------------------------------------
-- Data Controller Status FIFO and Logic
-- Concatonate Input bits to build Dcntl fifo input data word
sig_dcntl_sfifo_in <= data2wsc_eop & -- ms bit
data2wsc_bytes_rcvd & -- bit 7 to C_SF_BYTES_RCVD_WIDTH+7
data2wsc_cmd_cmplt & -- bit 6
data2wsc_calc_error & -- bit 4
data2wsc_tag; -- bits 0 to 3
-- Rip the DCntl fifo outputs back to constituant pieces
sig_data_eop <= sig_dcntl_sfifo_out(SF_SFIFO_EOP_INDEX);
sig_data_bytes_rcvd <= sig_dcntl_sfifo_out(SF_SFIFO_MS_BYTES_RCVD_INDEX downto
SF_SFIFO_LS_BYTES_RCVD_INDEX);
sig_data_cmd_cmplt_reg <= sig_dcntl_sfifo_out(SF_SFIFO_CMD_CMPLT_INDEX);
sig_data_err_reg <= sig_dcntl_sfifo_out(SF_SFIFO_CALC_ERR_INDEX);
sig_data_tag_reg <= sig_dcntl_sfifo_out(SF_SFIFO_MS_TAG_INDEX downto
SF_SFIFO_LS_TAG_INDEX) ;
-- Data Control Valid/Ready assignments
sig_dcntl_sfifo_wr_valid <= data2wsc_valid ;
sig_wsc2data_ready <= sig_dcntl_sfifo_wr_ready;
-- read side ready assignment
sig_dcntl_sfifo_rd_ready <= sig_push_coelsc_reg;
------------------------------------------------------------
-- Instance: I_SF_DATA_CNTL_STATUS_FIFO
--
-- Description:
-- Instance for the Command Qualifier FIFO when Store and
-- Forward is included.
--
------------------------------------------------------------
I_SF_DATA_CNTL_STATUS_FIFO : entity axi_sg_v4_1_3.axi_sg_fifo
generic map (
C_DWIDTH => SF_DCNTL_SFIFO_WIDTH ,
C_DEPTH => DCNTL_SFIFO_DEPTH ,
C_IS_ASYNC => SYNC_FIFO_SELECT ,
C_PRIM_TYPE => SRL_FIFO_TYPE ,
C_FAMILY => C_FAMILY
)
port map (
-- Write Clock and reset
fifo_wr_reset => mmap_reset ,
fifo_wr_clk => primary_aclk ,
-- Write Side
fifo_wr_tvalid => sig_dcntl_sfifo_wr_valid ,
fifo_wr_tready => sig_dcntl_sfifo_wr_ready ,
fifo_wr_tdata => sig_dcntl_sfifo_in ,
fifo_wr_full => sig_dcntl_sfifo_wr_full ,
-- Read Clock and reset (not used in Sync mode)
fifo_async_rd_reset => mmap_reset ,
fifo_async_rd_clk => primary_aclk ,
-- Read Side
fifo_rd_tvalid => sig_dcntl_sfifo_rd_valid ,
fifo_rd_tready => sig_dcntl_sfifo_rd_ready ,
fifo_rd_tdata => sig_dcntl_sfifo_out ,
fifo_rd_empty => sig_dcntl_sfifo_rd_empty
);
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: SF_STATUS_COELESC_REG
--
-- Process Description:
-- Implement error status coelescing register.
-- Once a bit is set it will remain set until the overall
-- status is written to the Status FIFO.
-- Tag bits are just registered at each valid dbeat.
--
-------------------------------------------------------------
SF_STATUS_COELESC_REG : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (mmap_reset = '1' or
sig_pop_coelsc_reg = '1') then
sig_coelsc_tag_reg <= (others => '0');
sig_coelsc_interr_reg <= '0';
sig_coelsc_decerr_reg <= '0';
sig_coelsc_slverr_reg <= '0';
sig_coelsc_okay_reg <= '1'; -- set back to default of "OKAY"
sig_coelsc_bytes_rcvd <= (others => '0');
sig_coelsc_eop <= '0';
sig_coelsc_reg_full <= '0';
sig_coelsc_reg_empty <= '1';
Elsif (sig_push_coelsc_reg = '1') Then
sig_coelsc_tag_reg <= sig_data_tag_reg;
sig_coelsc_interr_reg <= sig_data_err_reg or
sig_coelsc_interr_reg;
sig_coelsc_decerr_reg <= not(sig_data_err_reg) and
(sig_decerr or
sig_coelsc_decerr_reg);
sig_coelsc_slverr_reg <= not(sig_data_err_reg) and
(sig_slverr or
sig_coelsc_slverr_reg);
sig_coelsc_okay_reg <= not(sig_decerr or
sig_coelsc_decerr_reg or
sig_slverr or
sig_coelsc_slverr_reg or
sig_data_err_reg or
sig_coelsc_interr_reg
);
sig_coelsc_bytes_rcvd <= sig_data_bytes_rcvd;
sig_coelsc_eop <= sig_data_eop;
sig_coelsc_reg_full <= sig_data_cmd_cmplt_reg;
sig_coelsc_reg_empty <= not(sig_data_cmd_cmplt_reg);
else
null; -- hold current state
end if;
end if;
end process SF_STATUS_COELESC_REG;
------------------------------------------------------------
-- If Generate
--
-- Label: SF_GEN_PAD_BYTES_RCVD
--
-- If Generate Description:
-- Pad the bytes received value with zeros to fill in the
-- status field width.
--
--
------------------------------------------------------------
SF_GEN_PAD_BYTES_RCVD : if (C_SF_BYTES_RCVD_WIDTH < BYTES_RCVD_FIELD_WIDTH) generate
begin
sig_coelsc_bytes_rcvd_pad(BYTES_RCVD_FIELD_WIDTH-1 downto
C_SF_BYTES_RCVD_WIDTH) <= (others => '0');
sig_coelsc_bytes_rcvd_pad(C_SF_BYTES_RCVD_WIDTH-1 downto 0) <= sig_coelsc_bytes_rcvd;
end generate SF_GEN_PAD_BYTES_RCVD;
------------------------------------------------------------
-- If Generate
--
-- Label: SF_GEN_NO_PAD_BYTES_RCVD
--
-- If Generate Description:
-- No padding required for the bytes received value.
--
--
------------------------------------------------------------
SF_GEN_NO_PAD_BYTES_RCVD : if (C_SF_BYTES_RCVD_WIDTH = BYTES_RCVD_FIELD_WIDTH) generate
begin
sig_coelsc_bytes_rcvd_pad <= sig_coelsc_bytes_rcvd; -- no pad required
end generate SF_GEN_NO_PAD_BYTES_RCVD;
end generate GEN_ENABLE_INDET_BTT;
------- Soft Shutdown Logic -------------------------------
-- Address Posted Counter Logic ---------------------t-----------------
-- Supports soft shutdown by tracking when all commited Write
-- transfers to the AXI Bus have had corresponding Write Status
-- Reponses Received.
sig_addr_posted <= addr2wsc_addr_posted ;
sig_incr_addr_posted_cntr <= sig_addr_posted ;
sig_decr_addr_posted_cntr <= sig_s2mm_bready and
s2mm_bvalid ;
sig_addr_posted_cntr_eq_0 <= '1'
when (sig_addr_posted_cntr = ADDR_POSTED_ZERO)
Else '0';
sig_addr_posted_cntr_eq_1 <= '1'
when (sig_addr_posted_cntr = ADDR_POSTED_ONE)
Else '0';
sig_addr_posted_cntr_max <= '1'
when (sig_addr_posted_cntr = ADDR_POSTED_MAX)
Else '0';
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_ADDR_POSTED_FIFO_CNTR
--
-- Process Description:
-- This process implements a counter for the tracking
-- if an Address has been posted on the AXI address channel.
-- The counter is used to track flushing operations where all
-- transfers committed on the AXI Address Channel have to
-- be completed before a halt can occur.
-------------------------------------------------------------
IMP_ADDR_POSTED_FIFO_CNTR : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (mmap_reset = '1') then
sig_addr_posted_cntr <= ADDR_POSTED_ZERO;
elsif (sig_incr_addr_posted_cntr = '1' and
sig_decr_addr_posted_cntr = '0' and
sig_addr_posted_cntr_max = '0') then
sig_addr_posted_cntr <= sig_addr_posted_cntr + ADDR_POSTED_ONE ;
elsif (sig_incr_addr_posted_cntr = '0' and
sig_decr_addr_posted_cntr = '1' and
sig_addr_posted_cntr_eq_0 = '0') then
sig_addr_posted_cntr <= sig_addr_posted_cntr - ADDR_POSTED_ONE ;
else
null; -- don't change state
end if;
end if;
end process IMP_ADDR_POSTED_FIFO_CNTR;
wsc2rst_stop_cmplt <= sig_all_cmds_done;
sig_no_posted_cmds <= (sig_addr_posted_cntr_eq_0 and
not(addr2wsc_calc_error)) or
(sig_addr_posted_cntr_eq_1 and
addr2wsc_calc_error);
sig_all_cmds_done <= sig_no_posted_cmds and
sig_halt_reg_dly3;
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_HALT_REQ_REG
--
-- Process Description:
-- Implements the flop for capturing the Halt request from
-- the Reset module.
--
-------------------------------------------------------------
IMP_HALT_REQ_REG : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (mmap_reset = '1') then
sig_halt_reg <= '0';
elsif (rst2wsc_stop_request = '1') then
sig_halt_reg <= '1';
else
null; -- Hold current State
end if;
end if;
end process IMP_HALT_REQ_REG;
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_HALT_REQ_REG_DLY
--
-- Process Description:
-- Implements the flops for delaying the halt request by 3
-- clocks to allow the Address Controller to halt before the
-- Data Contoller can safely indicate it has exhausted all
-- transfers committed to the AXI Address Channel by the Address
-- Controller.
--
-------------------------------------------------------------
IMP_HALT_REQ_REG_DLY : process (primary_aclk)
begin
if (primary_aclk'event and primary_aclk = '1') then
if (mmap_reset = '1') then
sig_halt_reg_dly1 <= '0';
sig_halt_reg_dly2 <= '0';
sig_halt_reg_dly3 <= '0';
else
sig_halt_reg_dly1 <= sig_halt_reg;
sig_halt_reg_dly2 <= sig_halt_reg_dly1;
sig_halt_reg_dly3 <= sig_halt_reg_dly2;
end if;
end if;
end process IMP_HALT_REQ_REG_DLY;
end implementation;
| mit | 407eadf0da6c26b4fc328dbe0e245781 | 0.411988 | 5.089562 | false | false | false | false |
Bjay1435/capstone | Geoff/Geoff.srcs/sources_1/ip/blk_mem_gen_0_1/synth/blk_mem_gen_0.vhd | 1 | 14,517 | -- (c) Copyright 1995-2016 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
--
-- DO NOT MODIFY THIS FILE.
-- IP VLNV: xilinx.com:ip:blk_mem_gen:8.3
-- IP Revision: 3
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.numeric_std.ALL;
LIBRARY blk_mem_gen_v8_3_3;
USE blk_mem_gen_v8_3_3.blk_mem_gen_v8_3_3;
ENTITY blk_mem_gen_0 IS
PORT (
clka : IN STD_LOGIC;
ena : IN STD_LOGIC;
wea : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
addra : IN STD_LOGIC_VECTOR(18 DOWNTO 0);
dina : IN STD_LOGIC_VECTOR(12 DOWNTO 0);
douta : OUT STD_LOGIC_VECTOR(12 DOWNTO 0)
);
END blk_mem_gen_0;
ARCHITECTURE blk_mem_gen_0_arch OF blk_mem_gen_0 IS
ATTRIBUTE DowngradeIPIdentifiedWarnings : STRING;
ATTRIBUTE DowngradeIPIdentifiedWarnings OF blk_mem_gen_0_arch: ARCHITECTURE IS "yes";
COMPONENT blk_mem_gen_v8_3_3 IS
GENERIC (
C_FAMILY : STRING;
C_XDEVICEFAMILY : STRING;
C_ELABORATION_DIR : STRING;
C_INTERFACE_TYPE : INTEGER;
C_AXI_TYPE : INTEGER;
C_AXI_SLAVE_TYPE : INTEGER;
C_USE_BRAM_BLOCK : INTEGER;
C_ENABLE_32BIT_ADDRESS : INTEGER;
C_CTRL_ECC_ALGO : STRING;
C_HAS_AXI_ID : INTEGER;
C_AXI_ID_WIDTH : INTEGER;
C_MEM_TYPE : INTEGER;
C_BYTE_SIZE : INTEGER;
C_ALGORITHM : INTEGER;
C_PRIM_TYPE : INTEGER;
C_LOAD_INIT_FILE : INTEGER;
C_INIT_FILE_NAME : STRING;
C_INIT_FILE : STRING;
C_USE_DEFAULT_DATA : INTEGER;
C_DEFAULT_DATA : STRING;
C_HAS_RSTA : INTEGER;
C_RST_PRIORITY_A : STRING;
C_RSTRAM_A : INTEGER;
C_INITA_VAL : STRING;
C_HAS_ENA : INTEGER;
C_HAS_REGCEA : INTEGER;
C_USE_BYTE_WEA : INTEGER;
C_WEA_WIDTH : INTEGER;
C_WRITE_MODE_A : STRING;
C_WRITE_WIDTH_A : INTEGER;
C_READ_WIDTH_A : INTEGER;
C_WRITE_DEPTH_A : INTEGER;
C_READ_DEPTH_A : INTEGER;
C_ADDRA_WIDTH : INTEGER;
C_HAS_RSTB : INTEGER;
C_RST_PRIORITY_B : STRING;
C_RSTRAM_B : INTEGER;
C_INITB_VAL : STRING;
C_HAS_ENB : INTEGER;
C_HAS_REGCEB : INTEGER;
C_USE_BYTE_WEB : INTEGER;
C_WEB_WIDTH : INTEGER;
C_WRITE_MODE_B : STRING;
C_WRITE_WIDTH_B : INTEGER;
C_READ_WIDTH_B : INTEGER;
C_WRITE_DEPTH_B : INTEGER;
C_READ_DEPTH_B : INTEGER;
C_ADDRB_WIDTH : INTEGER;
C_HAS_MEM_OUTPUT_REGS_A : INTEGER;
C_HAS_MEM_OUTPUT_REGS_B : INTEGER;
C_HAS_MUX_OUTPUT_REGS_A : INTEGER;
C_HAS_MUX_OUTPUT_REGS_B : INTEGER;
C_MUX_PIPELINE_STAGES : INTEGER;
C_HAS_SOFTECC_INPUT_REGS_A : INTEGER;
C_HAS_SOFTECC_OUTPUT_REGS_B : INTEGER;
C_USE_SOFTECC : INTEGER;
C_USE_ECC : INTEGER;
C_EN_ECC_PIPE : INTEGER;
C_HAS_INJECTERR : INTEGER;
C_SIM_COLLISION_CHECK : STRING;
C_COMMON_CLK : INTEGER;
C_DISABLE_WARN_BHV_COLL : INTEGER;
C_EN_SLEEP_PIN : INTEGER;
C_USE_URAM : INTEGER;
C_EN_RDADDRA_CHG : INTEGER;
C_EN_RDADDRB_CHG : INTEGER;
C_EN_DEEPSLEEP_PIN : INTEGER;
C_EN_SHUTDOWN_PIN : INTEGER;
C_EN_SAFETY_CKT : INTEGER;
C_DISABLE_WARN_BHV_RANGE : INTEGER;
C_COUNT_36K_BRAM : STRING;
C_COUNT_18K_BRAM : STRING;
C_EST_POWER_SUMMARY : STRING
);
PORT (
clka : IN STD_LOGIC;
rsta : IN STD_LOGIC;
ena : IN STD_LOGIC;
regcea : IN STD_LOGIC;
wea : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
addra : IN STD_LOGIC_VECTOR(18 DOWNTO 0);
dina : IN STD_LOGIC_VECTOR(12 DOWNTO 0);
douta : OUT STD_LOGIC_VECTOR(12 DOWNTO 0);
clkb : IN STD_LOGIC;
rstb : IN STD_LOGIC;
enb : IN STD_LOGIC;
regceb : IN STD_LOGIC;
web : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
addrb : IN STD_LOGIC_VECTOR(18 DOWNTO 0);
dinb : IN STD_LOGIC_VECTOR(12 DOWNTO 0);
doutb : OUT STD_LOGIC_VECTOR(12 DOWNTO 0);
injectsbiterr : IN STD_LOGIC;
injectdbiterr : IN STD_LOGIC;
eccpipece : IN STD_LOGIC;
sbiterr : OUT STD_LOGIC;
dbiterr : OUT STD_LOGIC;
rdaddrecc : OUT STD_LOGIC_VECTOR(18 DOWNTO 0);
sleep : IN STD_LOGIC;
deepsleep : IN STD_LOGIC;
shutdown : IN STD_LOGIC;
rsta_busy : OUT STD_LOGIC;
rstb_busy : OUT STD_LOGIC;
s_aclk : IN STD_LOGIC;
s_aresetn : IN STD_LOGIC;
s_axi_awid : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_awaddr : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
s_axi_awlen : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
s_axi_awsize : IN STD_LOGIC_VECTOR(2 DOWNTO 0);
s_axi_awburst : IN STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_awvalid : IN STD_LOGIC;
s_axi_awready : OUT STD_LOGIC;
s_axi_wdata : IN STD_LOGIC_VECTOR(12 DOWNTO 0);
s_axi_wstrb : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
s_axi_wlast : IN STD_LOGIC;
s_axi_wvalid : IN STD_LOGIC;
s_axi_wready : OUT STD_LOGIC;
s_axi_bid : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_bresp : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_bvalid : OUT STD_LOGIC;
s_axi_bready : IN STD_LOGIC;
s_axi_arid : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_araddr : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
s_axi_arlen : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
s_axi_arsize : IN STD_LOGIC_VECTOR(2 DOWNTO 0);
s_axi_arburst : IN STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_arvalid : IN STD_LOGIC;
s_axi_arready : OUT STD_LOGIC;
s_axi_rid : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_rdata : OUT STD_LOGIC_VECTOR(12 DOWNTO 0);
s_axi_rresp : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_rlast : OUT STD_LOGIC;
s_axi_rvalid : OUT STD_LOGIC;
s_axi_rready : IN STD_LOGIC;
s_axi_injectsbiterr : IN STD_LOGIC;
s_axi_injectdbiterr : IN STD_LOGIC;
s_axi_sbiterr : OUT STD_LOGIC;
s_axi_dbiterr : OUT STD_LOGIC;
s_axi_rdaddrecc : OUT STD_LOGIC_VECTOR(18 DOWNTO 0)
);
END COMPONENT blk_mem_gen_v8_3_3;
ATTRIBUTE X_CORE_INFO : STRING;
ATTRIBUTE X_CORE_INFO OF blk_mem_gen_0_arch: ARCHITECTURE IS "blk_mem_gen_v8_3_3,Vivado 2016.2";
ATTRIBUTE CHECK_LICENSE_TYPE : STRING;
ATTRIBUTE CHECK_LICENSE_TYPE OF blk_mem_gen_0_arch : ARCHITECTURE IS "blk_mem_gen_0,blk_mem_gen_v8_3_3,{}";
ATTRIBUTE CORE_GENERATION_INFO : STRING;
ATTRIBUTE CORE_GENERATION_INFO OF blk_mem_gen_0_arch: ARCHITECTURE IS "blk_mem_gen_0,blk_mem_gen_v8_3_3,{x_ipProduct=Vivado 2016.2,x_ipVendor=xilinx.com,x_ipLibrary=ip,x_ipName=blk_mem_gen,x_ipVersion=8.3,x_ipCoreRevision=3,x_ipLanguage=VERILOG,x_ipSimLanguage=MIXED,C_FAMILY=zynq,C_XDEVICEFAMILY=zynq,C_ELABORATION_DIR=./,C_INTERFACE_TYPE=0,C_AXI_TYPE=1,C_AXI_SLAVE_TYPE=0,C_USE_BRAM_BLOCK=0,C_ENABLE_32BIT_ADDRESS=0,C_CTRL_ECC_ALGO=NONE,C_HAS_AXI_ID=0,C_AXI_ID_WIDTH=4,C_MEM_TYPE=0,C_BYTE_SIZE=9,C_ALGORITHM=1,C_PRIM_TYPE=1,C_LOAD_INIT_FILE=0,C_INIT_FILE_NAME=no_coe_fi" &
"le_loaded,C_INIT_FILE=blk_mem_gen_0.mem,C_USE_DEFAULT_DATA=0,C_DEFAULT_DATA=0,C_HAS_RSTA=0,C_RST_PRIORITY_A=CE,C_RSTRAM_A=0,C_INITA_VAL=0,C_HAS_ENA=1,C_HAS_REGCEA=0,C_USE_BYTE_WEA=0,C_WEA_WIDTH=1,C_WRITE_MODE_A=NO_CHANGE,C_WRITE_WIDTH_A=13,C_READ_WIDTH_A=13,C_WRITE_DEPTH_A=307200,C_READ_DEPTH_A=307200,C_ADDRA_WIDTH=19,C_HAS_RSTB=0,C_RST_PRIORITY_B=CE,C_RSTRAM_B=0,C_INITB_VAL=0,C_HAS_ENB=0,C_HAS_REGCEB=0,C_USE_BYTE_WEB=0,C_WEB_WIDTH=1,C_WRITE_MODE_B=WRITE_FIRST,C_WRITE_WIDTH_B=13,C_READ_WIDTH_B=1" &
"3,C_WRITE_DEPTH_B=307200,C_READ_DEPTH_B=307200,C_ADDRB_WIDTH=19,C_HAS_MEM_OUTPUT_REGS_A=0,C_HAS_MEM_OUTPUT_REGS_B=0,C_HAS_MUX_OUTPUT_REGS_A=0,C_HAS_MUX_OUTPUT_REGS_B=0,C_MUX_PIPELINE_STAGES=0,C_HAS_SOFTECC_INPUT_REGS_A=0,C_HAS_SOFTECC_OUTPUT_REGS_B=0,C_USE_SOFTECC=0,C_USE_ECC=0,C_EN_ECC_PIPE=0,C_HAS_INJECTERR=0,C_SIM_COLLISION_CHECK=ALL,C_COMMON_CLK=0,C_DISABLE_WARN_BHV_COLL=0,C_EN_SLEEP_PIN=0,C_USE_URAM=0,C_EN_RDADDRA_CHG=0,C_EN_RDADDRB_CHG=0,C_EN_DEEPSLEEP_PIN=0,C_EN_SHUTDOWN_PIN=0,C_EN_SAFETY" &
"_CKT=0,C_DISABLE_WARN_BHV_RANGE=0,C_COUNT_36K_BRAM=111,C_COUNT_18K_BRAM=3,C_EST_POWER_SUMMARY=Estimated Power for IP _ 10.073199 mW}";
ATTRIBUTE X_INTERFACE_INFO : STRING;
ATTRIBUTE X_INTERFACE_INFO OF clka: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA CLK";
ATTRIBUTE X_INTERFACE_INFO OF ena: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA EN";
ATTRIBUTE X_INTERFACE_INFO OF wea: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA WE";
ATTRIBUTE X_INTERFACE_INFO OF addra: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA ADDR";
ATTRIBUTE X_INTERFACE_INFO OF dina: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA DIN";
ATTRIBUTE X_INTERFACE_INFO OF douta: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA DOUT";
BEGIN
U0 : blk_mem_gen_v8_3_3
GENERIC MAP (
C_FAMILY => "zynq",
C_XDEVICEFAMILY => "zynq",
C_ELABORATION_DIR => "./",
C_INTERFACE_TYPE => 0,
C_AXI_TYPE => 1,
C_AXI_SLAVE_TYPE => 0,
C_USE_BRAM_BLOCK => 0,
C_ENABLE_32BIT_ADDRESS => 0,
C_CTRL_ECC_ALGO => "NONE",
C_HAS_AXI_ID => 0,
C_AXI_ID_WIDTH => 4,
C_MEM_TYPE => 0,
C_BYTE_SIZE => 9,
C_ALGORITHM => 1,
C_PRIM_TYPE => 1,
C_LOAD_INIT_FILE => 0,
C_INIT_FILE_NAME => "no_coe_file_loaded",
C_INIT_FILE => "blk_mem_gen_0.mem",
C_USE_DEFAULT_DATA => 0,
C_DEFAULT_DATA => "0",
C_HAS_RSTA => 0,
C_RST_PRIORITY_A => "CE",
C_RSTRAM_A => 0,
C_INITA_VAL => "0",
C_HAS_ENA => 1,
C_HAS_REGCEA => 0,
C_USE_BYTE_WEA => 0,
C_WEA_WIDTH => 1,
C_WRITE_MODE_A => "NO_CHANGE",
C_WRITE_WIDTH_A => 13,
C_READ_WIDTH_A => 13,
C_WRITE_DEPTH_A => 307200,
C_READ_DEPTH_A => 307200,
C_ADDRA_WIDTH => 19,
C_HAS_RSTB => 0,
C_RST_PRIORITY_B => "CE",
C_RSTRAM_B => 0,
C_INITB_VAL => "0",
C_HAS_ENB => 0,
C_HAS_REGCEB => 0,
C_USE_BYTE_WEB => 0,
C_WEB_WIDTH => 1,
C_WRITE_MODE_B => "WRITE_FIRST",
C_WRITE_WIDTH_B => 13,
C_READ_WIDTH_B => 13,
C_WRITE_DEPTH_B => 307200,
C_READ_DEPTH_B => 307200,
C_ADDRB_WIDTH => 19,
C_HAS_MEM_OUTPUT_REGS_A => 0,
C_HAS_MEM_OUTPUT_REGS_B => 0,
C_HAS_MUX_OUTPUT_REGS_A => 0,
C_HAS_MUX_OUTPUT_REGS_B => 0,
C_MUX_PIPELINE_STAGES => 0,
C_HAS_SOFTECC_INPUT_REGS_A => 0,
C_HAS_SOFTECC_OUTPUT_REGS_B => 0,
C_USE_SOFTECC => 0,
C_USE_ECC => 0,
C_EN_ECC_PIPE => 0,
C_HAS_INJECTERR => 0,
C_SIM_COLLISION_CHECK => "ALL",
C_COMMON_CLK => 0,
C_DISABLE_WARN_BHV_COLL => 0,
C_EN_SLEEP_PIN => 0,
C_USE_URAM => 0,
C_EN_RDADDRA_CHG => 0,
C_EN_RDADDRB_CHG => 0,
C_EN_DEEPSLEEP_PIN => 0,
C_EN_SHUTDOWN_PIN => 0,
C_EN_SAFETY_CKT => 0,
C_DISABLE_WARN_BHV_RANGE => 0,
C_COUNT_36K_BRAM => "111",
C_COUNT_18K_BRAM => "3",
C_EST_POWER_SUMMARY => "Estimated Power for IP : 10.073199 mW"
)
PORT MAP (
clka => clka,
rsta => '0',
ena => ena,
regcea => '0',
wea => wea,
addra => addra,
dina => dina,
douta => douta,
clkb => '0',
rstb => '0',
enb => '0',
regceb => '0',
web => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
addrb => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 19)),
dinb => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 13)),
injectsbiterr => '0',
injectdbiterr => '0',
eccpipece => '0',
sleep => '0',
deepsleep => '0',
shutdown => '0',
s_aclk => '0',
s_aresetn => '0',
s_axi_awid => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 4)),
s_axi_awaddr => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 32)),
s_axi_awlen => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 8)),
s_axi_awsize => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 3)),
s_axi_awburst => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 2)),
s_axi_awvalid => '0',
s_axi_wdata => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 13)),
s_axi_wstrb => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
s_axi_wlast => '0',
s_axi_wvalid => '0',
s_axi_bready => '0',
s_axi_arid => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 4)),
s_axi_araddr => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 32)),
s_axi_arlen => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 8)),
s_axi_arsize => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 3)),
s_axi_arburst => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 2)),
s_axi_arvalid => '0',
s_axi_rready => '0',
s_axi_injectsbiterr => '0',
s_axi_injectdbiterr => '0'
);
END blk_mem_gen_0_arch;
| mit | 4cdb43d3fb4832ad74ef5b8937cae040 | 0.626025 | 2.993813 | false | false | false | false |
szanni/aeshw | zybo-base/zybo_bsd/zybo_bsd.srcs/sources_1/bd/system/ip/system_auto_pc_5/blk_mem_gen_v8_1/blk_mem_gen_v8_1_synth_comp.vhd | 27 | 18,409 | `protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
cPZ8vU4rKWICMycnP8ASghxteX0KiiSQpWJpCIK7voNSpkWhaLkY+/QNXKrCWexA6C73eW4MlVqP
U/aYYyUL6A==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
LGoeeEeMUHkj3xBumwl7JSHXwdKJWR3APWiWCdcCy3wVC6g0GScQrp7fjvXp784YBiHqjtsyG69d
mOZ3fy7Gj87kc/h2xvc4Kp6GM/IiHJc0mbPVp01AJelfAExlIEaVGoQkcAXR2aVikeaMxuRKkb9m
THdehu5n5eHx4/tJQjQ=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2013_09", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
aia+xx8RLMhA3IF4tHoW0Vw6LtYVDVgU/c3FBWk9RJ/SaLw9lkXng6eXJGNs7uUJXmkzrbSEXjkp
9p7xWJMhovE7nwsp+7RydSgRQ0ttqPUbPZE1eqSc4iNU9Q/KQ7cPFMFwb6o48JfKidjAmSeXX5a7
n8A9TbJ98klc/V+a8Nj+tTPfVP1QI9dRmdzaW2w+actp2BkWAgSALKaGkzvCVGa/MpfN/fdLNjxo
VsiL86HW3arw5N+Ra4HD3GVUtLt9RoCCVRrMaYywuIwp2m+MgGVDwi2f2wZCZ3t03UamXKangjoy
PBei/XvAf3p1OvrOrKNUCVdwEg17DQWfBwZyYg==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
iSq3so3iXhp8LA8lrAo4ElVWkZ4sJhg+rWrioZWefLcgVs70gDbHsh3ghf5w2wiNXalSfMYzUoxO
skfS1+28WFbvBvygndpiSNMXeXmzWGrwBeHtNO1nR5azyndKvNsun44/B61XF3kTINCJNR54A+3f
0Ezm1jX/FmstQisPDpo=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
fHCdwSqtdLKfkpdCYo92uS5kFXmPpII38bIISEYuCqZyK6/BVCrCUL1HNVeJEgqGnb0uRqkye2CI
eX2LoUaDxy6iVejnRrRRAgNtgrlZcFVc3u1KxZQXk/12l8pxvVZj8jnWgIvX3TEsZsoZ6w/D41BC
6xhd1LtUfJeg6bsnb+yBYV5+H8NnHOqkZuFtJBsUzS1+4qFALyFqcNVJhhbdB0k2hn6z9cG6wZBI
hB8OJAFj6xON517ug+qP1OJf6uK1rHsG0pxYXoT6xch+UowAmLY8V/4+ShcI8rx6DLYpPvJVhEGV
fj/RQD4+HY8CEDIrJcGjF+Rpk986lOFjZ/hvRA==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 11888)
`protect data_block
GlakwJlDs9diDbpCl4KU0KkUfw9j1xywqgTmGuc57oCgkefePcKIVtdSuo+dbW9HN0RGmUn2O0tK
DXCic0eq1H9129c5Sd/8zybEyXhy3yjSApo3JtDydB58vm6jqhkCZCH7up/tcv8RkmQr84bw2qv/
wnyFi4bl2XlPNvjY9WsiQeyRQDAJj7DRMviucMhJXsv0KsJD8lIs81VtJU/aV5JTprK+sOWL0Uf4
u9B7zUA82NsPSdebdtk+Pt0xCTuzLbaUc2Z4TkxkF0M1IZ0jYKMIkkAgNbDBccZ06tPaOdKDgwsV
zDMw26pYAWQhRalHyrtP/drbMpyvWwS4V88Kf3DC4mC/VGLSCNem1egpxF378rn22U4oahRUggeI
CPwfas4gfgOiN2SfInipimsjTJ0v+2BjrPZi4O8y+P8vR8QR2DAEa/L3QvVxxxK6O5TVHofq1z9A
wiCOhbTyFAOhnhF7JFJe87B0sQNsYLCcxbxoOspfO/sqF7V0yqzE0AB+3wcPiqQbJ28fTYv3gBQY
Ymv+EavmvCH0DhlvNQo2SkFxAX/zOMEVIt6GxY+rYvSiR+FzrkoY+TWPDtz24rA36xi45wZYcTBN
jSmUlttVu9HKxGhYYJ/d/NDk+zBLqFDXjZOT4ojH7Dw+CtZ1Z8EDz2y5FjpdKpJ21SRbqVqtpImA
iMaONsa9m9bZUTTABNTEMP2V38DLaE2qIOd2j52JmfzbLcbnBrjWB2DNBcWL/uX2dzzqncViIIpd
qJy1ALUfvJPAY+42We8NKUHtQ52RwaVyZ2/Fb5mNIFrMgfxH4AcMcMCE1D8JEsou/4JkWnYFOGdl
DZ1nDjXkbt3TyYarl6M7fzRoTVnSY9hLyYhReNZhXuBFdxH8Diu0skv+aa04qgwUxNfKioFPx2Sr
bnTnUSGtEus8D0XnF/y4zRK7aLJczKjZHyF/ojluEY9p1KV11o33PZ5YSRs4Lyr2w9FZHW8eI13r
8J2f51y97zyk4iUnmim6mDqAXEc0z67bU923negcWO62tRs41JDALSExCM3B/0gEsi42SszZqwg6
VEJLNBZowz4ERkqSIIoEhkxjzKNvcaLNu8Vj4rbdVYP/EF8IZw1KQWHUzvVwRMjZHnUpOGC0vO7D
xqG4mOfzJv1L/y/fv2r6AtSWU5/Ajb7Ye6gcKqwzjYjOF3Vo6k9MR1oCMSPWrUoa0QYA+ljmVVZN
5yfemL5F+ldab18DdT2pxVOGmzQhcjKUpFqS0nHSfwyPhTANDQb24i6k5nVKZsvt+/EwEDxlXOgc
WUN2l8pVd7QLVOldjXullzaEEtLH1IpVKz1GxxYtQqUNkTw5aCzTsoxrFaT6ZYsbMYf9OOib9Daw
mXD5LQWmPtgKbzRqCe0D+pGpL4Zbqti+aKNS5zIh+HXMwtVJT151dcwp4yB6ybiuQFpu8xFawY4F
sI9NWlnSrQ8dmdcCSAWyU97RsVYOeyu4WidWrz6ZQGP2+BH9sfAbNMElVBBfr4psuM0tjS+in3Zq
NzO9uQ1/VNY4s/+7kJfxOOweemY5blAo7Wl3yIllsa6L+mgYzXNsKP2z5S0G0Gqn7kb5M4jeG/qR
IXXyxxJI2XLForULNGX+D3G0X433K55BJG1YPn5B60Wa+AX8YY9HHEBRHoSf7iKccnAh+1M/dB15
TcJEDZDlwQ8erGPYNYQRVKoFQsUT6wIKO6Qf/fYY/xHmhx3sE/IBksgMt6Y5OZQOuD22fxyDXPlU
0TUy4nFw0tquQfiUaolK+BwlyDfCMonkrZrpTyFMohAGEapWY9iv/vldNjo5MwrDnYvE7EFxrrJS
JeChn2MRdkUXawC/fV+RnYZTulR7PlsKwXAiWmvzXdx2cfKfIGgrxJ7tYAWTYsgTJpe0mdRhrTVs
2eRcKy8DAj/xyXrAcKzogZfmHR4GbobuwAv2BAZmao5jnfZvGJ5HtWm1BCqA79TSTQo/T3nfS1Id
DXoebnGOuseo5iL/gP/PmL7KVgL36n/ZArVNhb1kD6VvsANWe80gY0cwrGr0iggQsURVKfrtqL5Y
iDtrMk+zpFs7vX1FCy+rab5PGF0qV1rhVeB/JEZCX/hGAa+7vrpVgo24q70472N34JH/0oylnnCE
aPoOqScP00kn3Rapqadb7mcb+TGEbKX/+nx82v8JUN9X+5vIwpabJXLt5/hz4M+Mu/7fbj8ZJCx8
SMK3xfnc0weqcW6ygg6G8ZdawPwVP82ior1hzf6KFNHR1FEYTrzRcCJto7j9swRmqUMdfWh0UVq4
uRgLmNSpaV2ABzfKRe6YSn6LP/1JZ81x4cUtAXTq6mDGZH5vaXcPck95NGfgly/XiVcXZ5XNHNEw
3g0dSx2T6hmCilk2t9tJ9vK8EotJG8TlgVeUgQVn51SSDMfzM3gcLKKxHsKF3KpIuKA+0tz6j+0g
PucHXmj6p8jBHj1YpfdUogRxWgkEUCYNK2bMvgFp451AiAF+4wYryPjukyRSnsZzXjCBuAc9WEjE
SXruwwIRGENR4+2BVq7kBTTJm0yb1rYDPyJH23IXdUsgKFcYagAb6YxyEzzxQrNd+6x/TBLWvkfH
BtrPIHlPGQlXAtejMaXLt9FVXOuOMs3uiODtqNzN+HgKNXxa0HphHVVcNqOvOW9dLa+oqiy0lgXZ
8unT/vXYHm42vNhFZfmcOCXgW/ljn53nj9I1Q4EhT10y9ditC835o9ef8fJYqgioRxseJoQic7fd
rjo0n7WZAXH1dhTSwzW7nn5+R2I81+5rZTN39v8+KxxOsFTmkOZoi75/2yr/2reOHB0Rjfl9YHH9
dfie57jk2/uYqjT3q4uf9/hqgPj7WVSwt0Bn8Yw90yDo0/gT4R4j3INdHfrzj3F4STG13WrEtDZe
Xj8wRi/ZZSKdkDsCr/36orcCc6yM99GntDAKJrBc9k7Vgm2URMt1hreTzGsmA38IywKyqpY8Jz/g
8vedMqejhuc7W+cWnwEXSeok0vwYtrnMJH8zqgXT4lInV5RvmJVZy1+kWr2SfRd0AiVxrcycPrXS
q+m1PiDe5exDoa2BOi03qZYlqSjOX+4/penfXIZ17cBPIWMRmb8TodFTLI7+dILm0wKbgBeeOInK
Mayz0Hab7N6TDaqKPbdZeNM0/KcDdJOuZxUTLgf4jTPs3PlC3x+AJduKaB3O0UsxQ3OqrheJjqbe
EsVEAZfiNcTCworEsCK7IBo1ZKCEwu/cTSGL2Ejehngwo2wQQN+xc2/paJycKpDdtE8HZoy6rCuL
La95BP0OyN/8rCS5AW/wvSEYFNh3oUxi54lc1zaRH+ZC6nh+f1Y5hfs88+WssNyUm2FYOAqWhyp3
XXhQUx0plbDlxwCAwfoHSqHNZPZSpE35myvKZrnEH9MDHwhgQZXZJ0wa3hO7wNECOawjPM/GvuHs
RBBHJcqx5XA2Qu4TjAkZo+Yn3qAmmKTzFfywBzJBxhQmbiojHb/ZbVh2fJ/JP4MUwRbyz34mBJZF
mmadEM6qkr1Ga7d9lR7CfIsfpailxIrUEqEim2l2lRKGw+qG8fbOVW2H3tX/wGlfVpufenfDzF/p
X+56Bp3UkHIe94Tl7gc6ooXhlxLbnxz1sn/0PweivmwC11g5idTOeOqF4vmHdJHppgfW4n6GgFDe
5/8Rccc8wr3CxqEVNq25lN3aL9IyiUpPwVZGtmVSxXhomIq9LuIquLPaSTvrIXZW+yasavbjmyzb
ta12ptJJtuXTD7N0FoHXIb5XDvaPPR+KZatWBWj4ZoIX6qCm/wABSjIRHTVYzycFbpOEV6ZMGrfg
iaRYzGGXAJ2Ag0fEARz42gRYxRxb/l1v3fralViF96jpUSbZOy8k01Q9T5o6b1LiDHWl7mlP7HB/
7XXCoD9BaYf84EccqjPdDnJ5lqWPDlPpgFkNL7ipFDaTJxvAw0OAQX9UGf7PbSXmDrmCYhzSgOYr
neFtM3KLnGsUitwrADY+ODOchGp/2BkRYByH7rTCDsFiJsQw9c/av96JqvwVxA0Ff6/rGeUE1cgW
/Uip8l8EYs1sNHryA6XlmXP381/3mJPtjGG/tb0bPgx6kkWeqJ4EB/u1f+HFuZHoeLtJWrSUJJ4T
X5AFTzkbiatOKpNUxP1pta3H5aAwGtb6clr0CEHMyVgYbbGFkxoFi+mBk5nXNj5/+CRq6ek+rRnX
x2St386eOL/nFntF9RmY4K8kEnQR/rfHQkOCecyh7fi+OF/LeKHePCloG+udXFysMh91U+MYsaOv
XyN2bjtgsIDqGUQQt26mBMMtfSgocMS99vOkbWax058LL4V73612eyu02aXsWD8kz+9kTtzlYTuG
9+0FMB+jNfGHcOae2fNM/GM3Aq9Uky7UgNkyM7VPslQaRWld4zDlCHbWFVy+18p43aPvp6SKxiCD
TnoD8Lnanbq5xyXBMbSxraLFRIE2YhT8M2j5V+iD29TwlvyoA/fh5Rhqku28wSxJABhMAyuzvckX
w3AImgjk9wUIaWbP2LD34A00mOsKCXXr6bh4mbsZxHwFA8pqJ3kjbr9uBVe/MAmx2seqJhNkQGVi
CUXFFUnyDMDj5Xd/2p69VzI+gh3YSq4dJCPQtVOatorPb7kt+fY7fGf/q2BKb4uXSwvE2VyBM2KA
6Z9aP4CiHEQv74tXgvHVT0I2WQ9v5n8+WW2uaZbWrwpU7lU36FGMjkVw36+hH/iN6Z3rKvuynCmk
roEdOpx9vKnbxNmId47Yr9Hm0c/obx4EcpwFg2fR/c7mZLBU4exWTieZyUTZNgLnFyRVAiB0nDtN
gbyCAvLg9No1bF221VZ0poX5z1EoGCeHEY3ym/2iw4HtJqLryileFpL0ah/z0T+mRiDwNEfUWMzg
dC+7AMUaI97t3xe7HriPfWlOwRFmns6YHqQqB5MMJDuic6r0n5EDrlz71HATQyIK/rofb3/6hlEc
qqxsFBKBzHpWRStMEtnRvNvuk/RPGOQyspuAc2h+IdeVVW87JWWPCEL9feUqUirGT7uadz7GxBMA
w67TXr4tKEroWIDahn1KYPOkS/ZLeynuVxrP43lDakFOhQ3LlXklwWKUqZoqPIAstrKK3hNjG0gC
gVFYdEgRa3S2NJdbFbWul02ZEASEQQlYiI50NNCyjipj8IOsMhnDNbppkCUn9/w1Z7S6e+Eo6CNK
9yASUdMdlegeCn4zJ1iFZ9r239l9YopmeZoohbw6vIZBmTmWNBeEvbf26dTrPKGnrPNwbYAHGDpH
PNq7gvODfjnUeOl8hovrpvaqd7uxNZ10/v5DgcHPxyUSmV0hlPlJ1V8ePPSJsjiv7hLGmeTZTXDh
Ju8vPWaTrNjtVeeTyRu/HjKIAPcUAx6DWK/8mCbrHzgLPeY07ZbLMwRSuChBQcK6JBZahNqe3BQQ
giiakzVI1T6r1v8Yp2QjURO5HGUhvsSS3LU37rfqv3ly1B/S72sPGJLHthsAIjrGkCJ9jQhGwob6
fpZqRMn0Do743ZPa/QfE0KTZN1yeeDriWziUJoQiGGYBbTWA/7P3rXIZXuk2eU9+4WV/E+LhayFA
Yrt2L06nklSBCgMC/eMc0b2k03g7+7G+E9ARX7TTG/2av51KE1/fXbZYFlk6giLFAbNzFde3Xu0f
oLe0rxvaUGZ5UImXPSYBN0rxhR0IaNfnkI5kt4EA/EbTXqS1Z19b9UrbK4me0+YlN1ZJnk5deGMr
o6q/o+rN2As1o761zUOUFcRqmv9F9QnqUAW6hrKp7NSpj3nvsiY+c0evGgLPMkYV/z/DZQoBZHFc
S/OzpPJF69Q5hYPpOZ8ZaIoPDP9aNPCaziAxbbXOaiOupopt774p7AyfMKBck2TMoJfhsLrPRTy3
IYUlmWwY9P0JIJ35q57sWQf3hXs7nPO1ZFPivWnbs7p8VBhob2o+3F3g4O397EOWSrwLzCSyJp2l
NqoqjKeJNKgyptEExhbaq4eylGqPh5iqdBcNuZsiUx/SbOwb2yPBGMAYmg+g4338NR8BmAYssRSL
j5RfM67b8IhxHCt7+aOycd5kH/iOfKvirVdoA7Dw2uehxhKH9+6Kn9WeNf5n9WuITQF4Y4pWRwRN
BrWmnuzp5lsqO3vINLmoYa/NFX2Nn5J6YDun5aeWoUvwW3RdxOLBok6OSxVF+xUYZirI+GUSNBil
hXqQP+QTALT1Yq9TE7ayVUUR25hESwSAuVBPEWApVQDWF9lKkrW8QhoBXpJ5I00y601No3yQNxMb
U/BLwQC/cDZv4XBCOjtl1w75TAasaOeornm20A3yviWWa7YerMQjDr3efbz13C9UlItMGWIuMfGh
PmrrKjw6tidGTBCKfaGXUR/AV16/EI7C0TMiQwevjwUEOjfhwqbxTKu/lLVpwpI5C6M+XRCSwaHP
LHc/F0FA6HlSoz/iS2DkWsZhpw10fPwuNfUTmPVkxrq1civyikMWG4vOj1vyPCWrvdw/cCDPUvwm
tgbG792pyQBmX7AREd3F/vtEic9PbuxaZuOgJwYNxhFSg8LSRDqsVfwDNVpMbWTSzQcxCnHa6iG6
OlxW19xbfkGBSoUTCa3C1Jk5SjfljgylXsgM84qAUo80ef+UXnoHBypEkD2yzjnNuOJRw/BNR5VM
qofqsJLesqeo9PathkK20+P5K/9KMg8gcA9rO/8xxaWAUhIytP4ylN1SiOlf4sVsqEpxsVV9EMMT
vrRd01FRS1ZOGaGe0c9ylgZG5XK2+MQc+U97kVvutnXZkwwJPvkgggAwCmEGI/zygj0MhrP8BIu/
CyuYwi4+Hm3XVaQAuorXbmw7lBnc63stilet36Yn7OmKdyPuFv5Y6WBKB2SJoRbgUl1jCfF+1htA
So6yyR2k706Xp7DbNdPAc+ry/qfOPl0Fl/oNoey9qVod40ExgTSF3jav6zdqEX5xro0WwlAblhw3
j7VDqv8VRAZBnTuJNxJOWpGLQcXyWH3ATrMuaP+l6DA1JKii+fvYvXMxCdxGCNWqwi9XS70vsTNI
1qgAaIT6UtXGwx7M/l0Df8gMhCsBE2lMtK1w26TIHNnPd9CHmPsTztPG8oRILB/WmKpuDSpDJlyg
FDB4tjA/WN6Zyfnr7ptT2TP8wPgHq8mljuevoCtTJUV/nfCacUhEvbIb3D9vDpkcciutBB5hgbwH
gqcXYH6KCZP2NHYLTwd0HacBF4GcrhUpNHlD+AFJ0Io7JsVoRf02pBJcjbaAUTuLhuufhVkIwdPk
cGpX2PgaDyiAF+segYddpvn7VXwZccnQht50DKY4GF25+wCnkFTzuduPbsIREnr/qNrfERCuLG3O
1kWslT8qtsdxOI8zv1GJPFoN0v0AG3l8BR4QGgghzwpqp8PIb6PzvKfzsblGuvsCUmSYbAi/iyi0
IeonsCCeLFqj9hAzo4Y8jD5fSX8XwVOSvmGnDelg93srfUB1Zexf/sCf41p6D59CPVgURZ8Z9k5H
r9w0U97vyey6hieqyeule9zeMaBQ0NOOGo+8ehKSqSRrqmJq0B2Q+6s6kwhFkvZaspDg0EukA5ec
s9QtTZusO6rDBnwBpxcycZKSmukI9uPyeAWpfZ5FRomysdGNjyvxgsdLRXCK/WCU4xxhlWe/mkxw
pBl8ceWWoClMez1gJHddqiGoUVa4KxLQGW/aVWu5LdcEWssXjmFIaZTrY0TKZzuQ/kYnT/EAWhau
LVXCrcqyP5ArNPRaU1W+9PUysSWHj3+ahlHPLpl/6qFwRP+iwfGpozi8jcpFA0atkPDUAvBPiDLK
5O/AdpA29EBwNt3g9UgU9wZMjxWHCswKw9bnXCeLg1DCv2S+ZnhRlVnKOeeY7irUgaVBNGIgkv0M
wBsVy2Yaz68Eedu35tdAR9kOgyGk+I+yve/SAn6N5fWGQ6LpauCypaBzJHuAwaykvbNnmAHwToZb
rOLyb7R7bl8ygmWhTxrKHTGFYV1GDz8Hkp6xS9WzBfFCi0VNARhRdTHBtHpEF48ylmCXvxLFyaPt
6jJSnSwae3OBlCwUA6fCCEoDuMJxsUHzjfLz7wfmR3cvRZps0x7/ccVudjrWSjYYUJ0MfagcuIEY
3E9Ok/DqwXYAXzpP7k9UNQ9XxdNjQBjCIZm+eaqx/B/KBYIvYqoxpmpeammwAZ8w8Ng56J1vZDAw
zHMCFSclXlEkZ3VH4+ahy3HI6wEsI5DjU+XzMc3zXPt6GgZBmf4fxyao8ZbeqkubTtu2jkP5i4bu
h+jolP1962+3oap+B+TGOYn1Azn/gkzcCE49iR+XB6IDQdDfq9eiKDE57WyQwm10IMzQEAo20/u9
2qoe7DnGaPPlAeNtuxOtdxSc8U65YGxErhgZCMuoLQcXhYS+BmtVp/FtU2bfEm9siWP+tunq25lr
V8mK3pt7jy3RyCPMwEP+nsuZkxxWPhu9RKoszoQk0nz6arlqqXKUdaeY0lefgnW7iJhR2AjUgBBF
GGesHGD+c+HzkZFZ/zg6x9B+nCj2cKehu1xd3Wc/TfiEJH9gPTgk9OvPx2B4L0zpm5xpzAIUNYof
2/nMs3e0tbHqt4ucNeuZuzMfBwzAy0sKvrQshHgYE+Z0fDpHs7cUMmtGQK0oYFt1aHOJvxqPFEEx
oWFkrRC4kGaHyJLL8r47BF7CgUWBr0WbslNzQdLQ3i9T16mDSeWkP64TQd5hLtVM46lrOxNRgxwg
0OyUPLEQLvF4aWkqDtQeg+n32GSkEnnTFONt0lJTD7EHLH7R4tLBO9l+7vWT6UW0jL02HPAze4hn
33ceiOkeuxELJLArgr3H1Wid1l3EiuODaOXxGGIhgwkHggD6dp1Mnmvl5eURQQYIwIp/hvBiOkLk
zG7FMGZ8YZw3XhfsOoLnj931XkB0rh7VVHpUQRZzYH/YP1/sx6Cryy6nGWJpd42gW9PTY9+9EorF
2egzySWfe9WYMpHCANYrPi//2PkfGASI3guiWiE4I7KxwwNPPcemWEGL6wHb/zsAkc5hjIRfbpVo
xjQLMDSSmnmqwcXArxRCNncHH9EPI21jkZtevW/WcRob5d7jVr85uPzhSKsuuDw4RAaUiIEj6DIH
28XxrWkwWZjvMpk4WhSnieIXeoRByKBqQpmuREK5+hSkxW8WbG7FWPomrIp6akMlqGw8OakZ3z/i
lEnIHOPlYzx3LobZFH0XMxv9WBvNSz+zHaL/Fb6PpOhPXLxdjsuII9GZeIni3Q291omlu1baVRR5
HCs9MpAw7qEgcJ5U9za5tT1JPg+rBmKi92zzf1ThQzaf/a3nlJF12gqgWybwmgENq4w0uFEF2+jY
Hp5QtaImNoRi4fM69UZ6An7zNNPN+sjZl6mH41d/jTlRjIbzk7jzA5VtEHt5e7Dn/az17NpDYDI7
Qt4fEsBWIdjKJ+Cx93245ish5n2JwDzDRBpIGGZSQi9djO29Q2p8frqEShWMu3Zd5r9ajPgI03s4
EvhzWSOtIFKnFhLuXfXXFQSHQP78uIzMfalC7rODr+nR2ATokzZcoRPk+ttp6U3IO0gPcWngNIy3
78M3gbVKf9d5gdmFO6+s5mLfR4eQbJhCzmTg/kh8/QpD78kL8TdefYHI99Yxbn/Us2E2BbABJvZZ
NaA3W2bU+Bm0xmsL7Dq5bZWqarsOv10Bs5EKT0gkQbojwRXUsyXOMZdLYFpCRlTZNBvYo6s2rhFK
I7SgDuiGf3/IIti1QZDAFU8xoQyoPG6eGGdtlPLG9g8a4xVYVCKMOFEMvqUFtu+vk6VYnf9QKrJV
uPGr29ug/Q+AaBvX5NKOznElYxShLknLK+9cskcG6cAQOHN8wipDRJNReisA6fpykMFhssR/Xv7A
sJl1EMRJ3VvDh3Y3HMghKb8/mewZ1aHx2TvAAMzoQ8+bx/Xyq1+w1S3j+NQJtQCsApAXUZ1v7y8E
HKxsJ2dFs6doe7fLzbIHiI4BfsOjMklcpWsshSHT8AMLG+NP7UurN5xzSWUR1+U9dfWxsVePGckr
Ckg+0rN8oCl6PCNNJh5A+DABrY4zPlhHjTT+9oMqN7OdVJgscuW5v0jCg8A6cpKlGj2ze8r9vbRR
qqUuUhcJKJQGWvK9hQHurR50VeE7srh3yI1m6ik4aZWM2d2nqcuE3NnwUJHjPUMw9D7CuEfwV7RR
oBiJVTWewcZaGtQxRsZM57Y8r6TqFL+CateKdGhutYNjRts/h8gyVhnTTIdodgCraA7KFpf22MTM
PHHvxYLEfaqPeHp0Fj1I2D1uHIo2JpjCwCyB8NxqCYPNWIUiZyJREEKUIaEEq1WB/XQ0jtygl3np
bITCl6KMgDPUdgBnyMjrt5JMD538nFStAKeLY8fgLOBk7t2YP9cwAHB32q//5GEshYNXTFQ8rj1B
dezhP/S6GnsTNXCIb9c28umXi4KVH2mAR6wk6TmXMdlzTOGsKhNq2wnFMjvSW0LQN0AJUrPKPwIN
SUf1+SOaGtB9+BsGgOt779AkfvGaGejtZGZ8o9Jb81mebhWy6bczrvuxtodqdIltST4YPoYwr0fu
nO1WxHE6kI/sS3E8gDK1CMxKkWwBNs3tx1IdaM6mphWedlUNJqq276jMyfFx/4iVPRwqNi9zuLgD
d+1dKF97dQk2VWn8Gl11Cz5E7jh5Wk5HJVJrrpHaSH7c1RCqIIgcdfbRDUQo0JCImDzO3JqdbzVo
jah5ltJ/zBn8gIdfk7dnJatj/PXIQh49eaYNLI5kVqo0HIzdQEMKbVv8aLJBNRmPFqZDELTJ1AU+
B1CjXhLAYddHwr+MUvelrkz5ZpB8XYHc+UcZ30KIbXXjKsuhdu2zLW/oyskw6oldcCHdzMlH3J8c
6STA3qMl8jQ9cJj+MDtw1JYmlP7VVY3vSS6eWPvJVZFsDOfgJTTc3FwODBwQsK5RdCBbzcVOH81u
W59tW6YQGBp8o0HSwEb6x9t4j0PuUZRm/XMJxZt3OAd29HO3Js0a9GtmL4Urhwn0F/6UnhlL1HdB
nNecLkz2BTkr8urnUYdEi+jGRVAOUhoQ5lajRkmXTndu7OaD9NKPinjKXdhSPPXq8ejxsNFnb0HK
AdEQg5k0UuIdb34R05kcFfN4iRc3QkqY4n6kgaE6QA2VTBXtIRYSa7TFv4wVuxCpBRvzMMJQaegD
hFIFJ0nAE9a4AkEn+jGmIzQ+O14R+VRvxh7yv5luff8pxWjGUb3js054lFwEjzrxxB9JdvIKxxlV
Bx5liv/4Nwk6rPeZWWlbN/OhRFz0mKmf4KzVf7whfxnoYdSezgvUuToWqzYHlru/U4LukAHynATf
VyAwjDrMcN/dRcigTRHIxyBGcEMi19ABp0TlA9vViUmN6q0DnVpDhHVJezA/yvuWCw/oaYMa3fAu
6kLXx2T1P+aUkwq8bvxgUkF80OM78aWsWS5kGDOM98iDVwGYom5nhAReXc0mAierzawnKqM6DRrL
7tG+YqJ/znGFYt+W0WYNmW2BACp8U+K0aBwghx/NoSqvHwXTR4XmfFJoy6MKXyiZUaiJ9BNP2sUG
f3uep/pmJGWj+OYZIeW4VTQ1IPcYHIyZOrr6t9Q/oAiyxMSnQ3gtCoBZxRvBhTWEdOFT4nXNPpFb
zN6uMpRu6MFiRMvBMcKt6G2uk9RWVL3FGl8A1zkrSWPGJjJgIE+TjuuRzwrWYRpmzysn4bJmxkjS
g8/YDGkdNVbku4n9epsOdLxfPW5BJKI24iOJaWaLS+AS8DVa5XvaolPtdVC6pueS1JRw9MCU5Zh+
DOAYofLxL4Ym6z0b01vLSa33/cNivHKfdSFogf1Lmy8hFfzBfcGbaW4P8xyMuQ5QywaNAanuEuZZ
VXCl5z+bmK58NoQ7+7W22XCGAkvh4bNhHnp3StUp1ffzail3MXPyMz2AFkvtCTLS1SnQ5vQrG5J3
B/g4RxN21k2KkuX6SvCo8p3P8yjm9pVTIE8AUr76bGzcEcm2Rx4OyCB4A2eHofaEUkZ7peaWhiMz
LGC3GoDmB3aznZmKil23Cgq8ifxDmehw9cmjvCz0N3P52n+FORbxiVzIbwyJBbtkiSDndPUpxunH
WYlUz2wPNiBmcnw2Whwrw8O/KXgixOvZW6JkPgGw/1J7oGq9RUe9DE+LWutnfqWs7+P+PxJ1Ga31
NphRyKsUYdpCrMPaaiKW17GMEwGCNNYHPPsxs3WCYC3erB14+C4C8VAjgBCRCGidljc/RL7Ufajy
RJi4E5NOfr1L8BZaNNwOzSTjJDYDlxiOC4VWWdMIWc2KbQ0KkE9K+ouzWt7rcl6wkjg1G3xqMkus
9F6gtAVcR/3vN6FE8m/SYcPW1Zb1pE9NTNNVvBvLQHfg7weJ1vLckDk3TYy9Ma/lh1xynPlV1OCV
M/Eg4wivUSPRgFoICuPPL3c6yPC18VvbuHJLetQR7Q9Zzv5gqXaRe9NLHM1DtCrpPVnPydVMITGg
VqYMe6BDjTeZAt06HdkJ92OSZx7hoEytxvtG0RUT3mWz2b1zgpc9VzuDOo2iZ9eDn7IHkUJYs/FA
VeA5F1XhdXlXaAomkEwL5Z7nmNT7TPDFUxzqGDQvjpsquM1C7yNkSx1lCnylquUZMTyuWRApBwm+
YVH3fy4+1CMT2jxoMAJA548gCwSvZC3W9BNTocwyUurrWRvaBjmVIlVDAzCm7TtqMoxWgelEtLLn
j3lYZRSjF5x1X5/akJNerW/uzVcKhxR+d/XX0G/6VE35kK4BI/yjKVMQRx8YqTdyxZoeJm8tXInt
EhQDHXpgwzPBkxiCGdp/lWMMvNW6WW/XuLBfFXFPGUiiETRas0cPzRoezZGGcCnbM4qSfhCIDjl+
WpzIH2ZFgIEc1OzmKJxxokT0ogdh4XmfcFKObKtzhOF/i4AFTN9yQFRd/0W+MV5rOeLKMtS4vzDF
e3NY8SMhLF+OFeus9dcYziwFs2Ut49oRLzXZlMhS1HjnKnQQEXcMfiUxPwaMMWQlIPrGBKCeJjDG
gyR7pPzNBag7DK3yNv1c8XSTWICxjU86qLNjBquuh5W+XQzVAabp6C6gd1eoL6SMl/FRd6xoDya7
8a+Z8YlEevXYVyYs64FM7qDMURlhCfUTTbNBnKarlDfEwBmeORPfJhtmg0IvdGdUSCXapHosNe6J
o0CisD8YcSIzvx/KhJROxkILUC5jWFxFHpNYEZrqG4KZ0paa1ooooovULfTZcs/O33czfNiBpQ6g
NSc2uRVB4SCTDvdh4M2OqlI9t5pvceNflh0KoJMbQTYcy1d1D7TI5RgqqojTmjT+FMAOwOMjJVyw
wKLraOE/uh8qKMbLOv80ShGgZt3wcg0z9Bjaip758Vb3caaIamUN+Dcxu67CkUsboUfs5HphOGSt
D/+Ph+g0WianpmL2Xel6+ALEqj9TM14vcu/9l/GmTf+aCjKUo74WfYXV8h8CxJLkylmTcjucv1Sg
3ZUEjUfwUdPwBAZLd5BRH7miWLWDB5NkOjDvf37YEYShTkrZu+LBFBx1qlMt+yzikDUbXuPHM7JJ
oGt5l0ZsR69T32kX7m8UN8+gFZmg0n5J9iQmfxW69KrF8g3AEuRk020uRDFLCzLcRJMaqv//G0Eq
/oIVZkGl8i6uEnv0YGD80o+D9pCW4jmW0XvdjOF8UM2FPGldrIjsryHs3NVTc4l/TlNj+qu5D2tL
uj7c8FGbZWXNHBjrjq0aisuOVx0uVqKX8rZfS7hzXcCTlgGWHyyxI5JJ8CZcNtGHx5u04Lyx7kYy
yzALFbi9HwBcY3orlDE4Xw7TVgwt3WVws83UrS09BPnH1/pJCHwO0jja3ZiXhQN3X2fZoQ22C8d9
RdFIJaytk+GoZp2PBHIx14zkUkY70z50Y9vgCi3iImvpW+1WvVIXH7ech774121WxXGVBL5jLfdW
ausA1g0glJKOPeR0gz175ROSapvttTpaahexLxxsH5ZXyxhA8EvMjrRkIJ1YPWP4YeOAI4HipJzV
7mz7d77z/MZC89b2pbnKyJnOBt4rzPkbnziT1Z4MFHo+pScEjEiyZ/SWLDDoKbkdktJ9X2HmAmMr
CYw3QT7KIuWVyYV7mGdOZhH/kb+OF4lkE+Gn1UfA7jPL3L+JiKMVuQGpffM6LM6ywn2Zwbbehlh0
kBQjO8TGH5oMjT9OoC6KuIecJkT0TXgsIZjExEUhmj5s6YZx87XBuRPRWB76Px2NQbRPiz/hBVbl
B8k9oC+TM6ppG1t3LrKIow64yVZW0SSkmGuBTW4znw4BJXhRS2uAqn5mKEqFy6mc6ggM0RTKrEms
kvTkYM7AQMzj7Kqcqn/CrF0EL01T/uBFuSbV+IK25HCYzgByoHLV4rqswSuBn/qKKi9DiiKx3Rcb
1opFf7IY1bCQ+NR0dCJuR0AYtEKrmlI7PspsV4leYGEavRRNfjeklPIdd0OjQ7PVvU1b8+seAkXe
uqt46UrNzm7uAb+cLRqZRRHsK92zdUGxb9U3i4SlaJsFwqZcnLXire645AJzjQk5YOORvTA/rCjv
YiXJ3bTR7FPGNERDAoF1KDlazKII5YMuB/nyLvpB+gucyBDomVFLHWP27hmi9UirgbDn2uef8P1a
WgndZDNbsbDn8cLc4zyBWpV3hoLIScC5HRo/pM1kCfbEyCPImqskEuhicYygcuOtEHWwDPIOwiPC
MZZT9ALOEsZzrOiRQ7UREYI8+MzWx0V3O8neIY1qtc8r5s1hA6C6DLMrDolnII1V/vInufyhbyWq
2ohFTKgMzx3cUuo9ClEr0je4YtA2mDX2C9GwrpO1wLdNR725cQOFRPNYjztdHJmALlx34gEw67mh
JEf4eQ2NaNUFFs6Pfs6GLYw/90bumA5+UcKrOkBq24lYkz1FKJzds/YtdCYyq3Tp2SW5W5jUNPVq
7iDHchcs7Qrf8LHHWHVfv011wE2H4cazfR4RzxB4k81uJwFSLNyFnZU1OLik8/YBZthbVLbIMdym
krQj3STiMy3C2Fnz1wQNHRcFUfRlhSIw2QXGXqyIJD5/P+jckrT+Emk5sjW1rx0a89INBlVHg/Eo
u2DbMikdGu5JHO7s10cz/PvkFchpKQusY29laYrOnxSeebZysOrW4ajdM2IQykUqZMKhBC8NH/qU
3WKs0IMBXNMqBDn6KMlqJTODlgTfT1CTjaNyW3uKQaESbHMUFL5DRJ4vP4YSvHsrdT9hwVGODVFZ
SViCxKPSL7CW3WzG1tPMqlrqx6pu6mZhnaUrXDgiWaWmtbZocBMXqR4cidM/UqbEpYTXKKjVJS97
NPmjWx5iSsdXZUF1Cl+bCvK4ggy17FCkSDgqMUSgXh9HPhNq4OdbAOoKFxn1VFh723XorjP82F38
6VL7149Lx6Hdcf1w93a/nPyWNMnMQipZaNfqEqxZgNR8a06bHX9MenIcv/3azl+FKpmClUwDtxnO
jKzlTfwzcvXIPioFyymlVXzr+MnC0AUW1HCAUYeBg3ZBNsrTHZyd9VzR6+NBXRs0Cx2nzNZTKglm
2sWDvmSWYw9kgpKXiaNPGZEasr2DJ12GVl9Qu6ufX6kEt3I4IR6f8YSszaWTMTUY6EkhX5SOllKq
QKBPNHHKiZ7a8U9J6AZKjAb/+k6wYE9bHnLKM0XokmhCeLWkCKRpp6Yn4+pR6lL2atklg02PDGTZ
BmKn8TErAcPE/KVtXpicrcbVH6HoXIvlryc+ZrJ21S3qfi8oFEDSjY8hBmoNmvzRpvdxZlszJMXS
q2sFWhmt0JaAKH7v+4ngS973QbneI0i/T5ZWITbKYuNcGyG0ao2KJAwVn8FhFdFbOqWKLn7PaCzC
sWVa2He4TGjjspWzaJk37kEZR6rhxFfRawC9IXJCCn6gE/8Dv4AfV/T7l0Ncbfwmh0QLcTcDt6WU
wVM4EX3jZnwNVOK+HG3uZNQkbnx9ZSHDnmi09HN6TUY=
`protect end_protected
| bsd-2-clause | 777d267b2ea387aac8829e107ad4aeeb | 0.939432 | 1.862128 | false | false | false | false |
inmcm/Zynq_Custom_Core_Templates | example_core_lite_1.0/hdl/example_core_lite_v1_0.vhd | 1 | 7,062 | library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity example_core_lite_v1_0 is
generic (
-- Users to add parameters here
-- User parameters ends
-- Do not modify the parameters beyond this line
-- Parameters of Axi Slave Bus Interface S00_AXI
C_S00_AXI_DATA_WIDTH : integer := 32;
C_S00_AXI_ADDR_WIDTH : integer := 6
);
port (
-- Users to add ports here
-- External GPIO Inputs
GPIO_IN : in std_logic_vector(31 downto 0);
-- External GPIO Outputs
GPIO_OUT : out std_logic_vector(31 downto 0);
-- User ports ends
-- Do not modify the ports beyond this line
-- Ports of Axi Slave Bus Interface S00_AXI
s00_axi_aclk : in std_logic;
s00_axi_aresetn : in std_logic;
s00_axi_awaddr : in std_logic_vector(C_S00_AXI_ADDR_WIDTH-1 downto 0);
s00_axi_awprot : in std_logic_vector(2 downto 0);
s00_axi_awvalid : in std_logic;
s00_axi_awready : out std_logic;
s00_axi_wdata : in std_logic_vector(C_S00_AXI_DATA_WIDTH-1 downto 0);
s00_axi_wstrb : in std_logic_vector((C_S00_AXI_DATA_WIDTH/8)-1 downto 0);
s00_axi_wvalid : in std_logic;
s00_axi_wready : out std_logic;
s00_axi_bresp : out std_logic_vector(1 downto 0);
s00_axi_bvalid : out std_logic;
s00_axi_bready : in std_logic;
s00_axi_araddr : in std_logic_vector(C_S00_AXI_ADDR_WIDTH-1 downto 0);
s00_axi_arprot : in std_logic_vector(2 downto 0);
s00_axi_arvalid : in std_logic;
s00_axi_arready : out std_logic;
s00_axi_rdata : out std_logic_vector(C_S00_AXI_DATA_WIDTH-1 downto 0);
s00_axi_rresp : out std_logic_vector(1 downto 0);
s00_axi_rvalid : out std_logic;
s00_axi_rready : in std_logic
);
end example_core_lite_v1_0;
architecture arch_imp of example_core_lite_v1_0 is
-- component declaration
component example_core_lite_v1_0_S00_AXI is
generic (
C_S_AXI_DATA_WIDTH : integer := 32;
C_S_AXI_ADDR_WIDTH : integer := 6
);
port (
-- Output register from ARM (i.e. Send commands and Data)
SLV_REG00_OUT : out std_logic_vector(31 downto 0);
SLV_REG01_OUT : out std_logic_vector(31 downto 0);
SLV_REG02_OUT : out std_logic_vector(31 downto 0);
SLV_REG03_OUT : out std_logic_vector(31 downto 0);
-- Input register to ARM (i.e. Receive status and Data)
SLV_REG04_IN : in std_logic_vector(31 downto 0);
SLV_REG05_IN : in std_logic_vector(31 downto 0);
SLV_REG06_IN : in std_logic_vector(31 downto 0);
SLV_REG07_IN : in std_logic_vector(31 downto 0);
SLV_REG08_IN : in std_logic_vector(31 downto 0);
SLV_REG09_IN : in std_logic_vector(31 downto 0);
SLV_REG10_IN : in std_logic_vector(31 downto 0);
SLV_REG11_IN : in std_logic_vector(31 downto 0);
S_AXI_ACLK : in std_logic;
S_AXI_ARESETN : in std_logic;
S_AXI_AWADDR : in std_logic_vector(C_S_AXI_ADDR_WIDTH-1 downto 0);
S_AXI_AWPROT : in std_logic_vector(2 downto 0);
S_AXI_AWVALID : in std_logic;
S_AXI_AWREADY : out std_logic;
S_AXI_WDATA : in std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);
S_AXI_WSTRB : in std_logic_vector((C_S_AXI_DATA_WIDTH/8)-1 downto 0);
S_AXI_WVALID : in std_logic;
S_AXI_WREADY : out std_logic;
S_AXI_BRESP : out std_logic_vector(1 downto 0);
S_AXI_BVALID : out std_logic;
S_AXI_BREADY : in std_logic;
S_AXI_ARADDR : in std_logic_vector(C_S_AXI_ADDR_WIDTH-1 downto 0);
S_AXI_ARPROT : in std_logic_vector(2 downto 0);
S_AXI_ARVALID : in std_logic;
S_AXI_ARREADY : out std_logic;
S_AXI_RDATA : out std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);
S_AXI_RRESP : out std_logic_vector(1 downto 0);
S_AXI_RVALID : out std_logic;
S_AXI_RREADY : in std_logic
);
end component example_core_lite_v1_0_S00_AXI;
COMPONENT example_core
PORT(
SYS_CLK : IN std_logic;
RST : IN std_logic;
SELECT_IN : IN std_logic_vector(31 downto 0);
INT_A : IN std_logic_vector(31 downto 0);
INT_B : IN std_logic_vector(31 downto 0);
CNTR_OUT : OUT std_logic_vector(31 downto 0);
ADD_C : OUT std_logic_vector(31 downto 0);
MUL_C1 : OUT std_logic_vector(31 downto 0);
MUL_C2 : OUT std_logic_vector(31 downto 0);
REV_A : OUT std_logic_vector(31 downto 0);
INV_B : OUT std_logic_vector(31 downto 0);
SELECT_OUT : OUT std_logic_vector(31 downto 0)
);
END COMPONENT;
signal select_in_buf : std_logic_vector(31 downto 0);
signal int_a_buf : std_logic_vector(31 downto 0);
signal int_b_buf : std_logic_vector(31 downto 0);
signal cntr_out_buf : std_logic_vector(31 downto 0);
signal add_c_buf : std_logic_vector(31 downto 0);
signal mul_c1_buf : std_logic_vector(31 downto 0);
signal mul_c2_buf : std_logic_vector(31 downto 0);
signal rev_a_buf : std_logic_vector(31 downto 0);
signal inv_b_buf : std_logic_vector(31 downto 0);
signal select_out_buf : std_logic_vector(31 downto 0);
begin
-- Instantiation of Axi Bus Interface S00_AXI
example_core_lite_v1_0_S00_AXI_inst : example_core_lite_v1_0_S00_AXI
generic map (
C_S_AXI_DATA_WIDTH => C_S00_AXI_DATA_WIDTH,
C_S_AXI_ADDR_WIDTH => C_S00_AXI_ADDR_WIDTH
)
port map (
-- Output register from ARM (i.e. Send commands and Data)
SLV_REG00_OUT => GPIO_OUT,
SLV_REG01_OUT => select_in_buf,
SLV_REG02_OUT => int_a_buf,
SLV_REG03_OUT => int_b_buf,
-- Input register to ARM (i.e. Receive status and Data)
SLV_REG04_IN => GPIO_IN,
SLV_REG05_IN => cntr_out_buf,
SLV_REG06_IN => add_c_buf,
SLV_REG07_IN => mul_c1_buf,
SLV_REG08_IN => mul_c2_buf,
SLV_REG09_IN => rev_a_buf,
SLV_REG10_IN => inv_b_buf,
SLV_REG11_IN => select_out_buf,
S_AXI_ACLK => s00_axi_aclk,
S_AXI_ARESETN => s00_axi_aresetn,
S_AXI_AWADDR => s00_axi_awaddr,
S_AXI_AWPROT => s00_axi_awprot,
S_AXI_AWVALID => s00_axi_awvalid,
S_AXI_AWREADY => s00_axi_awready,
S_AXI_WDATA => s00_axi_wdata,
S_AXI_WSTRB => s00_axi_wstrb,
S_AXI_WVALID => s00_axi_wvalid,
S_AXI_WREADY => s00_axi_wready,
S_AXI_BRESP => s00_axi_bresp,
S_AXI_BVALID => s00_axi_bvalid,
S_AXI_BREADY => s00_axi_bready,
S_AXI_ARADDR => s00_axi_araddr,
S_AXI_ARPROT => s00_axi_arprot,
S_AXI_ARVALID => s00_axi_arvalid,
S_AXI_ARREADY => s00_axi_arready,
S_AXI_RDATA => s00_axi_rdata,
S_AXI_RRESP => s00_axi_rresp,
S_AXI_RVALID => s00_axi_rvalid,
S_AXI_RREADY => s00_axi_rready
);
-- Add user logic here
Inst_example_core: example_core PORT MAP(
SYS_CLK => s00_axi_aclk,
RST => s00_axi_aresetn,
SELECT_IN => select_in_buf,
INT_A => int_a_buf,
INT_B => int_b_buf,
CNTR_OUT => cntr_out_buf,
ADD_C => add_c_buf,
MUL_C1 => mul_c1_buf,
MUL_C2 => mul_c2_buf,
REV_A => rev_a_buf,
INV_B => inv_b_buf,
SELECT_OUT => select_out_buf
);
-- User logic ends
end arch_imp;
| mit | 7a0bec0ad24044aba790185aabcd4cb1 | 0.622487 | 2.703675 | false | false | false | false |
sergeykhbr/riscv_vhdl | vhdl/rtl/riverlib/cache/cache_top.vhd | 1 | 11,701 | --!
--! Copyright 2019 Sergey Khabarov, [email protected]
--!
--! Licensed under the Apache License, Version 2.0 (the "License");
--! you may not use this file except in compliance with the License.
--! You may obtain a copy of the License at
--!
--! http://www.apache.org/licenses/LICENSE-2.0
--!
--! Unless required by applicable law or agreed to in writing, software
--! distributed under the License is distributed on an "AS IS" BASIS,
--! WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
--! See the License for the specific language governing permissions and
--! limitations under the License.
--!
library ieee;
use ieee.std_logic_1164.all;
library commonlib;
use commonlib.types_common.all;
--! RIVER CPU specific library.
library riverlib;
--! RIVER CPU configuration constants.
use riverlib.river_cfg.all;
use riverlib.types_cache.all;
entity CacheTop is generic (
memtech : integer;
async_reset : boolean;
coherence_ena : boolean
);
port (
i_clk : in std_logic; -- CPU clock
i_nrst : in std_logic; -- Reset. Active LOW.
-- Control path:
i_req_ctrl_valid : in std_logic;
i_req_ctrl_addr : in std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
o_req_ctrl_ready : out std_logic;
o_resp_ctrl_valid : out std_logic;
o_resp_ctrl_addr : out std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
o_resp_ctrl_data : out std_logic_vector(31 downto 0);
o_resp_ctrl_load_fault : out std_logic;
o_resp_ctrl_executable : out std_logic;
i_resp_ctrl_ready : in std_logic;
-- Data path:
i_req_data_valid : in std_logic;
i_req_data_write : in std_logic;
i_req_data_addr : in std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
i_req_data_wdata : in std_logic_vector(63 downto 0);
i_req_data_wstrb : in std_logic_vector(7 downto 0);
o_req_data_ready : out std_logic;
o_resp_data_valid : out std_logic;
o_resp_data_addr : out std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
o_resp_data_data : out std_logic_vector(63 downto 0);
o_resp_data_store_fault_addr : out std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
o_resp_data_load_fault : out std_logic;
o_resp_data_store_fault : out std_logic;
o_resp_data_er_mpu_load : out std_logic;
o_resp_data_er_mpu_store : out std_logic;
i_resp_data_ready : in std_logic;
-- Memory interface:
i_req_mem_ready : in std_logic; -- AXI request was accepted
o_req_mem_path : out std_logic;
o_req_mem_valid : out std_logic;
o_req_mem_type : out std_logic_vector(REQ_MEM_TYPE_BITS-1 downto 0);
o_req_mem_addr : out std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
o_req_mem_strob : out std_logic_vector(L1CACHE_BYTES_PER_LINE-1 downto 0);
o_req_mem_data : out std_logic_vector(L1CACHE_LINE_BITS-1 downto 0); -- burst transaction length
i_resp_mem_valid : in std_logic;
i_resp_mem_path : in std_logic;
i_resp_mem_data : in std_logic_vector(L1CACHE_LINE_BITS-1 downto 0);
i_resp_mem_load_fault : in std_logic; -- Bus response with SLVERR or DECERR on read
i_resp_mem_store_fault : in std_logic; -- Bus response with SLVERR or DECERR on write
-- MPU interface:
i_mpu_region_we : in std_logic;
i_mpu_region_idx : in std_logic_vector(CFG_MPU_TBL_WIDTH-1 downto 0);
i_mpu_region_addr : in std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
i_mpu_region_mask : in std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
i_mpu_region_flags : in std_logic_vector(CFG_MPU_FL_TOTAL-1 downto 0);
-- D$ Snoop interface
i_req_snoop_valid : in std_logic;
i_req_snoop_type : in std_logic_vector(SNOOP_REQ_TYPE_BITS-1 downto 0);
o_req_snoop_ready : out std_logic;
i_req_snoop_addr : in std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
i_resp_snoop_ready : in std_logic;
o_resp_snoop_valid : out std_logic;
o_resp_snoop_data : out std_logic_vector(L1CACHE_LINE_BITS-1 downto 0);
o_resp_snoop_flags : out std_logic_vector(DTAG_FL_TOTAL-1 downto 0);
-- Debug signals:
i_flush_address : in std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0); -- clear ICache address from debug interface
i_flush_valid : in std_logic; -- address to clear icache is valid
i_data_flush_address : in std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0); -- clear D$ address
i_data_flush_valid : in std_logic; -- address to clear D$ is valid
o_data_flush_end : out std_logic
);
end;
architecture arch_CacheTop of CacheTop is
constant DATA_PATH : std_logic := '0';
constant CTRL_PATH : std_logic := '1';
constant CACHE_QUEUE_WIDTH : integer :=
CFG_CPU_ADDR_BITS -- addr
+ REQ_MEM_TYPE_BITS -- req_type
+ 1 -- 1=instruction; 0=data
;
type CacheOutputType is record
req_mem_valid : std_logic;
req_mem_type : std_logic_vector(REQ_MEM_TYPE_BITS-1 downto 0);
req_mem_addr : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
req_mem_strob : std_logic_vector(DCACHE_BYTES_PER_LINE-1 downto 0);
req_mem_wdata : std_logic_vector(DCACHE_LINE_BITS-1 downto 0);
mpu_addr : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
end record;
signal i : CacheOutputType;
signal d : CacheOutputType;
signal queue_we_i : std_logic;
signal queue_wdata_i : std_logic_vector(CACHE_QUEUE_WIDTH-1 downto 0);
signal queue_rdata_o : std_logic_vector(CACHE_QUEUE_WIDTH-1 downto 0);
signal queue_nempty_o : std_logic;
signal queue_full_o : std_logic;
-- Memory Control interface:
signal w_ctrl_resp_mem_data_valid : std_logic;
signal w_ctrl_resp_mem_load_fault : std_logic;
signal w_resp_ctrl_writable_unused : std_logic;
signal w_resp_ctrl_readable_unused : std_logic;
signal w_ctrl_req_ready : std_logic;
-- Memory Data interface:
signal w_data_resp_mem_data_valid : std_logic;
signal w_data_resp_mem_load_fault : std_logic;
signal w_data_req_ready : std_logic;
signal wb_mpu_iflags : std_logic_vector(CFG_MPU_FL_TOTAL-1 downto 0);
signal wb_mpu_dflags : std_logic_vector(CFG_MPU_FL_TOTAL-1 downto 0);
signal wb_ctrl_bus : std_logic_vector(CACHE_QUEUE_WIDTH-1 downto 0);
signal wb_data_bus : std_logic_vector(CACHE_QUEUE_WIDTH-1 downto 0);
begin
wb_ctrl_bus <= CTRL_PATH &
i.req_mem_type &
i.req_mem_addr;
wb_data_bus <= DATA_PATH &
d.req_mem_type &
d.req_mem_addr;
queue_wdata_i <= wb_data_bus when d.req_mem_valid = '1' else wb_ctrl_bus;
queue_we_i <= i.req_mem_valid or d.req_mem_valid;
w_data_req_ready <= '1';
w_ctrl_req_ready <= not d.req_mem_valid;
w_ctrl_resp_mem_data_valid <= i_resp_mem_valid when i_resp_mem_path = CTRL_PATH else '0';
w_data_resp_mem_data_valid <= '0' when i_resp_mem_path = CTRL_PATH else i_resp_mem_valid;
w_ctrl_resp_mem_load_fault <= i_resp_mem_load_fault when i_resp_mem_path = CTRL_PATH else '0';
w_data_resp_mem_load_fault <= '0' when i_resp_mem_path = CTRL_PATH else i_resp_mem_load_fault;
o_req_mem_valid <= queue_nempty_o;
o_req_mem_path <= queue_rdata_o(CFG_CPU_ADDR_BITS+REQ_MEM_TYPE_BITS);
o_req_mem_type <= queue_rdata_o(CFG_CPU_ADDR_BITS+REQ_MEM_TYPE_BITS-1 downto CFG_CPU_ADDR_BITS);
o_req_mem_addr <= queue_rdata_o(CFG_CPU_ADDR_BITS-1 downto 0);
o_req_mem_strob <= d.req_mem_strob;
o_req_mem_data <= d.req_mem_wdata;
queue0 : Queue generic map (
async_reset => async_reset,
szbits => 2,
dbits => CACHE_QUEUE_WIDTH
) port map (
i_clk => i_clk,
i_nrst => i_nrst,
i_re => i_req_mem_ready,
i_we => queue_we_i,
i_wdata => queue_wdata_i,
o_rdata => queue_rdata_o,
o_full => queue_full_o,
o_nempty => queue_nempty_o
);
i0 : icache_lru generic map (
memtech => memtech,
async_reset => async_reset
) port map (
i_clk => i_clk,
i_nrst => i_nrst,
i_req_valid => i_req_ctrl_valid,
i_req_addr => i_req_ctrl_addr,
o_req_ready => o_req_ctrl_ready,
o_resp_valid => o_resp_ctrl_valid,
o_resp_addr => o_resp_ctrl_addr,
o_resp_data => o_resp_ctrl_data,
o_resp_load_fault => o_resp_ctrl_load_fault,
o_resp_executable => o_resp_ctrl_executable,
o_resp_writable => w_resp_ctrl_writable_unused,
o_resp_readable => w_resp_ctrl_readable_unused,
i_resp_ready => i_resp_ctrl_ready,
i_req_mem_ready => w_ctrl_req_ready,
o_req_mem_valid => i.req_mem_valid,
o_req_mem_type => i.req_mem_type,
o_req_mem_addr => i.req_mem_addr,
o_req_mem_strob => i.req_mem_strob,
o_req_mem_data => i.req_mem_wdata,
i_mem_data_valid => w_ctrl_resp_mem_data_valid,
i_mem_data => i_resp_mem_data,
i_mem_load_fault => w_ctrl_resp_mem_load_fault,
o_mpu_addr => i.mpu_addr,
i_mpu_flags => wb_mpu_iflags,
i_flush_address => i_flush_address,
i_flush_valid => i_flush_valid
);
d0 : dcache_lru generic map (
memtech => memtech,
async_reset => async_reset,
coherence_ena => coherence_ena
) port map (
i_clk => i_clk,
i_nrst => i_nrst,
i_req_valid => i_req_data_valid,
i_req_write => i_req_data_write,
i_req_addr => i_req_data_addr,
i_req_wdata => i_req_data_wdata,
i_req_wstrb => i_req_data_wstrb,
o_req_ready => o_req_data_ready,
o_resp_valid => o_resp_data_valid,
o_resp_addr => o_resp_data_addr,
o_resp_data => o_resp_data_data,
o_resp_er_addr => o_resp_data_store_fault_addr,
o_resp_er_load_fault => o_resp_data_load_fault,
o_resp_er_store_fault => o_resp_data_store_fault,
o_resp_er_mpu_load => o_resp_data_er_mpu_load,
o_resp_er_mpu_store => o_resp_data_er_mpu_store,
i_resp_ready => i_resp_data_ready,
i_req_mem_ready => w_data_req_ready,
o_req_mem_valid => d.req_mem_valid,
o_req_mem_type => d.req_mem_type,
o_req_mem_addr => d.req_mem_addr,
o_req_mem_strob => d.req_mem_strob,
o_req_mem_data => d.req_mem_wdata,
i_mem_data_valid => w_data_resp_mem_data_valid,
i_mem_data => i_resp_mem_data,
i_mem_load_fault => w_data_resp_mem_load_fault,
i_mem_store_fault => i_resp_mem_store_fault,
o_mpu_addr => d.mpu_addr,
i_mpu_flags => wb_mpu_dflags,
i_req_snoop_valid => i_req_snoop_valid,
i_req_snoop_type => i_req_snoop_type,
o_req_snoop_ready => o_req_snoop_ready,
i_req_snoop_addr => i_req_snoop_addr,
i_resp_snoop_ready => i_resp_snoop_ready,
o_resp_snoop_valid => o_resp_snoop_valid,
o_resp_snoop_data => o_resp_snoop_data,
o_resp_snoop_flags => o_resp_snoop_flags,
i_flush_address => i_data_flush_address,
i_flush_valid => i_data_flush_valid,
o_flush_end => o_data_flush_end
);
mpu0 : mpu generic map (
async_reset => async_reset
) port map (
i_clk => i_clk,
i_nrst => i_nrst,
i_iaddr => i.mpu_addr,
i_daddr => d.mpu_addr,
i_region_we => i_mpu_region_we,
i_region_idx => i_mpu_region_idx,
i_region_addr => i_mpu_region_addr,
i_region_mask => i_mpu_region_mask,
i_region_flags => i_mpu_region_flags,
o_iflags => wb_mpu_iflags,
o_dflags => wb_mpu_dflags
);
end;
| apache-2.0 | 8b62dd2bc4581ea9921ef3ba6db6c22e | 0.610375 | 2.979628 | false | false | false | false |
szanni/aeshw | zybo-base/zybo_bsd/zybo_bsd.srcs/sources_1/bd/system/ip/system_auto_pc_5/blk_mem_gen_v8_1/blk_mem_axi_read_fsm.vhd | 27 | 83,900 | `protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
qYvaWTl2dVn1UYauUm5HneGLdmTNfKYL2CALcG7YBWzuKWoXlk0Id+l1oLffyjtPstUkcnB5XMcQ
6NZs7JK9Og==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
QYtaB7bKNbwxVddRWt78CWZ0keZknIQG6IQKSIZ5COH+hNdpgy+tCPVsEHq4IVZzTG1P1o7hP4Vk
F8E4xV3B+P4d4XumR2TMQt1O3p//18K5GFLVc+tXegTNm7nDlHWB2EseJW3Comce24tPY9JdBxY3
PqZ0pdNcJu1q3elLkyk=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2013_09", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
dcPEPRyvFmW4PpA4iDmUUiTH0W6w8Tp3x24VnlLzTcuDsG/S9IG3GcyE78eNrT/x0pAgwHhrMrSY
yZo9WE5CUIc2230lFJdjwqsu1GfylgdJvImjNnSRTPzlw78/vxcWd8GQIKrHyFhACpS0FlCWX80u
ir6wyey6yythPFMR7YL9alngEab5jqlcDLLq05xFb5xa60ZtUm6H8H/kSZM2WCTQ/2EYo9aRaoyP
YNJgznw4M4JlCmjNGCsEEMbnrUH5XC2MOkUpPSJ6HpAPhZTjHtmrQy0MjGpBzDrrGJZmxlIzL7x1
7fFFHCW51Ue16QvPlxZlJr0kCC3nTtDv9f7xsw==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
zhiiGh6iqBtYa8uvzkWpAts7vZ/x1/EV8yeLKnAXP52susoGuPOfmWMYojIG7BJlvNdJsqMcu4aO
YgpCERsfm5E2WNcFxUppU1uIOa+cnCBSZ6N5aebRGghJrQL1tUzWpRnQ2slMJ8Q+gRbsoc3N0qtc
A+A1dAH+z+hdTGoZBRY=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
lbE1QAVb48OwhlUCQuKav8khO5ghQAvoWa4EGI1wknY/PAoHSz/mN+mHHLZytFcumXquM7gAj5vW
FkPYXzAy7xSUZBC0WEUc0yo4Xa33jDRDxY7cxGlzHmyb1RsXl0duhVMcX5rDmM/+KiXLbAmtS7n6
pXv5Z5tj4x3AoNn90rxrYgdqN+pxQ1GZhPZPFZggV3JHWj2LJUr0U/7aGlgZSQCcdWV2V8ktlt4l
b9BA5BfHfgn1UuvjTl44uqXII+j7cWg72Zy7D/yYZ92M5Y7nPBoBrEiv0PrxnHLMrIv8+jN76TPm
TMiyhLNg8NAb1xNexvBsDmGJWQnxf5cukp8uDw==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 60368)
`protect data_block
wqoAFRrdoCJzrCulMCJlS1GTfc7fQQduWncZbpHiR8quwuyKzqG9FNX6dndgN7ZMs08IfDOvyk5m
VzRDlyxkKWkmjuh+HXce+FgpIGWGxxT8uEO1u1tFDcmivAIWzoSA27iHGY3ZVYlhsFJtAg3Mggd1
pVW3VeoOu7Mac80wsNAMzJrxE1ySuQwy6+Zw7trgR/SCvPxAfCn3Kbi3rlLh+9ADqdYqGfWY0K9o
759DqDYi0Up9pcCBm0y7JuXOxWc2OxzV7c7mk4Su+owzFpJfxrLhJZA1bZJtCHfb6wKmOb6Uh9VT
p80O0MBlpxmTh1q6gpHeg4oeqT4lMFTH4Y5t6JWqfCKYdPoh9VxrcBTOXU0xhxB9TMKlszJKSObu
6NHFi91ZiN/zAippfRdFJM8G1bMeHNtS3Pim++FPgRlYGmVNs4oBzOlfoHaHt9zm+q3Sv3DdgMC4
eFTXoRR1/q/fQBZGJEFOHRys3SFUOwEYb7WAqHcakRaCz83LA1nU24wtWfKaebMIj9451+/QYwCT
bkN0Z8kwPfaotUN/MtRi/lsk4nXPrVxPi5vmhNBSQS2IyrZVSWKIpWVrHPPJ0ZIfvU3yCeXgoXh2
jp2svfERp48jHDCb68dfJmhwwK7BoTOoLBU71Zg0t63kJd+OUZV3TVoU51txy8iH+lKCi4nIES3r
YCMCP7i0sBilGw+gk/yMnS21DdxFr/1GiBJwewpwxBux4OhgVpDEp0tXp/uLJrdWECt/XP/nf1oI
gjfGCmk9CBDqJ6h2EeffpFSzoTRKMZuBE45c22r1lMKsIvu+WUmKaut2vXzEtGYvjoNlTLnPManG
G8W22t/vZ6qKtIbGFX1I35r6Kt1zGYgYbnm0qkZnVikQgeOX84h5wwIV57xoAwTZyL3qV+X2XuKm
ZtXoPzDGdBpjHQqO0jdeyRCoiB9xV8kUMei8wzfVyooV81wfTE8+MQezku04y05AgiMyOhmiqYTN
mYMbbj8M7D4/geNMgAs/69rCgPo4hYJVjmQ2qhDkgstPUyD5xVrgmDn84fFe29LMWEhhtmekCAj6
N0GH2U4fxGqTA+DrVWvUG37NkdxoCFsnpHI4CBvhrz9tqOxBzv18q5cW9L0X2gQcSBtw1e39Ts0w
is+0vJS6mLh1NUReL+J1LFXRIEI7BIxzIYJLdockLD0/NAb3/W+uTPko2GcSLCEnda1Nn1nhrqh/
6q8sAA4brjN25B0SkbQjTouYZBDXd/XNhqg9awX1j79GYmp18xO3q6+8jpYE5kNd5xvtoBTw+5fG
AjLooWYs25K18SdxNGFIo/WP3lu60+eEcaSGa5Ob/IUn9ZxhMmnsqczaibR14UWJKh7+OhxSvQnx
LQFMuSQtFgBGKjCovUQxCNOkjQ4LS8nYG9kUubf7HADQ8ju1+nnvSIBEYe3vf/qQJvfD+pOOZrYP
VZnQgfccAwGFntbsKTJDkaRzlfVjT0N575PVP63NbsrmlQW83pOje1xhI6c2IxufSvJ46yHay7iC
9EKmdZIajm5/V5EKeYUmmrfgJ/M+dUlAEqmQlOsGxKjEvkOuafl4O8JjlrwNO3uCpoABWEIfC/ya
WWYowOhpvgokAyjdU56oQi+s2Bw/WBV/7THWHiWUYCQE97FBbsmjkPGSzA5fSBGSZDZCNk4rh2MX
gJPrMfkv2k7GydNeUEPGnHBNzcSTe+j/yaX48EEUaJislI8IJM26lsVE/DqFY3AXihGsdmZ/9g10
OG0+WsmG5x1OCi/QfJfWwg00tOZB38eKr034GN+oIqU2b5TsciK9kp+VILaCI3uxqxYH5UfEBRXS
kInbnvth3rY/6NOr4KB4tmZ9LHynh9RYqLL19FYTlFVzqq3hWucjJZyd3Dyo88OPuQOPKIJdBEeC
e1CvmFkb6yC2Yv9bjO/429LBSEnpBmMrHPTjxOq1SUQIDz32M5FpNKpkMymCBFo+72UmdRD3putR
VT0pFrRuUX/jxrmXIhrd6OTg1YTMusCRg6KKrFuslamRoK25jIr0HtFTZZf480oerb1Fgyr8hvdm
aViqnmqekCrpsUaO4siWxQr+/HTe1iQ3PeJJk0VYHkUXDFU1ac+ZFXRzCLB8Uf7GvbY3AzQX0J5r
QtqGXei+hTkYtNVaxk054nQkaeJxWQ1mHI1YF6E7XgvZ4oBrDJBRy2Uu4k5oxtXu3UaqGT11SEPk
meQafRKB2BrXNoxbRbAsPH6RZ3bIrsKbjMgwAslm4cEuU4fVBmrB3hkBioEjl8ULrGl4uFXadWrH
O1D81hxynns9tq6DOELMAzopS4w5ZuSES44i8A2/weJU40Q04Gh3uPCaOCAF9RP6/cy5A+hlKmqF
IaRNtohS0x+n84wrXCGZ/i3QNrs2yxpq/MstWdkXZUPlt/TlfkQ68TNyRSobUd6Ha8bQVbMEN7Rs
CTNPtErHv6HAVfP7s0HO4x53b5fvogC649q5T5FDfWuDLYSvRVP6finHx6l8ck2rbbJ/aD9E4ISZ
F3kcT2nX9i+d+VA1RkkfIt6RQGpvMpNHvA88sh2Z+v29edJBO302/Yr8uyx8xeMQLL1P1r4bsCPG
f0joPADdzrtHHvGarXrIqfpSu66hrEfYU/CoWyR5iyhXGSly2mDm4du3c36SQuStQhRJcQCYvhzV
EsTKIjJDJd8GnddxzU54Ijy7Ia1YBtrMYi6u66ozN+8rCGjEiutqO2QQ8nPVc/HBTivYe8+rT6Fp
1rSiXk0N+7VeoQV/IYZ6cc8O8F3NP5ASdDsTTNaaGzTRrXch8wpnG28aZdqeKRO6vOlYx8H3Tyqh
CoomDb+ncGnt0sw26S4En7YniKrhyjpT5R7ZJ5OYkYWkP5N6bXYbRTwLB37muJUWpt7oLpnCyFsD
BXnsz5JykYmP5VPVJn0+Cn7ClwNpO39b9gfFnlOUEUNVVUrq41DhqIldxRpC6SrYyWZte956CoJM
QIzx22qr8RZX//s3OD9NRPmeegWR40TqX9Cm0QT68KJi1ms2MS0MiNdNL0v2Jy9edm8THQHlReA4
PiHHFRgdmvLV5QpK5dhn0rJ9RhQw3EO6M9IXiNgJzOlT2J2COTiXW9Lu9QTG608x39anR9Rdwkdn
tLG/5+aOMLBGOpzGkC06MLzuepreLKVOk+ZDOVSwzgKSc1kn4VzoUFtQF2bFZHulF3fISffGs+lh
NgPXAJhJQc/hJp9mH6PCElRibh9dZrOSi1bkZNTfj08WMp+uYaXP6A1a0GxwPu72tKXYrwKOTYI9
M89MtD2VmQ6d+DhdUHauLL8b1YB+l7JXEIRkNo99/SUiHup0QM00uHBwdnfbeiN0fx2e6r+6SEE5
bBNYdi5BkMmlk7mukUU3Nie3s7gxklPr07aCN0Tzsxb3ejtdxHGpNh3kuT/fm9XDWe0yWM4jk8jc
ooE7BagMruq/pFKe05LEcTuR8M3gdtGWABcF2gdTj5jRBNipvtSxJdqajS3oCWAZnG1kHbv2DKrW
eU5yJ+dHltWDOHEDhO1KVUHBZS6yHXLggcBcAfTjMQ0fFEn8klsSYXiRb5PLNrGuci1QtnnPJD87
HShb5ygilp6ZaFu5AcAylohgIf80FbjOIBn3W6mWnf7gP/Y8WStAHamDIv4tc3KftknQio6ik2IA
ox1bLAnlQX7V3Yp/Y1OixywT19K7gKv9tt/bU/PgWVxkQBWssCcMAnqBjOz2lvZg4ySgjpGX/7Rm
h1nLpwsVZtKnRfzdZXwnfHTJQKbpoykkvnJFt5jX0hdqMCrfcqYOKy7IqgSqNcN1GolJUwmMMu3e
g0YAnX0J/pdv58m1GtiiBnXjWNlkkiws3+GlpvVMcd5hGqRf9MnHykiMDTS+BUmPsXOKWsKAjmRb
knRJoQEQYAsrv5quY4SLZ+NZLK05h5Iu+mge3lxZgd3PYCHU55m4kScXb0AAmww9p6H1gOts07tH
YlmqmeQhEEuhF8ELbF37ofSDpNurQT7CC4mgsI1S4fJFhiy4gbGrGI4AXF7/M19nY1DIfWdr4cSk
X25ZJ390BqrICRgWZYErNrmJbG4RS+YFYhMb/QnUg8YwcrcRgiRoMroihEclmpQs/VQjR/kfff3v
F/SROT5RB7RkQfUxKQDuxMnZwro7+hn981phatmcfxx2VgISkQo+aFObDVohPOX7NNf/Mf9eR54k
zVIFrIuA1xpAU4Kg9n1HMTnzPGy7SFbbQfBkbIuxmtWpbA/Z2Z92OdnZblB+WJxvoLVWycx1VdLA
IaVBKSK1up4u2Lq54zolAryg5xp5GCET0D0FQm6pPKfI7dw62anfDJ2k1oEAi38hazFFbsWDnI84
7sKMNB2wDcApN1DokON3IXgJOr9ofW4la/X/ES4LdLqdPFOyLrUYOcPBp074VdP5cAbbOFWHEVst
2JkfhWGG5V4s04DejikXkXpx7mJ0xFhlo874rnxqpszkfjbUx6GkCS+G9rAUm9t9eh40gFsjl8bp
mLfE3V+tRPMnkSv/0/UUd5etv8TNCyJkHVJwCZqXaNQz2hTibH3Ac0AKBHITc+MZRZfYLubIhUT9
7f3f60fOXlg3Xwk3yhIgCDsmr0d7uwPJAUeinLqREIZpS9ipHo/avgTaGB7wMe1tep1799qjXESO
Tq9w5UpP6oK0ThLVxuCzF6xZkbusToc5pzlV7j2iUzp6a5H58EhgDSP5ZrrYl/vInApOUud5Qubz
I3lzaL6VRpVxtwmi+Wp2PaKUidnTUF2fYr21J9jMmhmMKNuLfLX4SiJbdvOxuK6qQP+ruFfyrB5v
2gCZArcrZTrx0EM3tEQ1aYlo8rJ0WDBsIIeQTT4fH/y3xKLttZuZXJi7BZeUwONkPnyvNXR1mVCa
LKIcnw/7QjEdIoSgxoU1DcP103aHQBXK6CCWutToECkBMxR4E9TtRZg2jONIdw3x+KxzN7o/uaxx
3ynhoGBImZNHWyAwZ4fl7QjL1Zv0hhCHjM2AFKFUhYQXWUOHW/ziHf2C7DNkobW6NazEPTqYrk7f
rjGBd5v9ukXJzLSQ/V2TcFDteqMuQT4fTuOpUDXaQ5vFoihHl2tJAC6oAbIqKeep8Wl0XNOaDU5y
cq50hnnEfTyDHobrRocWS23ZARaaPu38z8ydVGDINKL6FUj4+3uxuZUyIQu3qL+yB3i9wBwX+phZ
icrm/gKPVDdRBn/5wrPKJnSEVflzJjSDHbexLuM5FDwnsWvyMsMl7ElVfNbkHq2uOUYfK4VS1M2O
/yRTXrmIrwFs2ZO6t60Izit7RwDuOuVeEWgnKICl7TI6dkiZkQmgyevqUMuTe8wt+4YyUAT+rNYQ
13vwmsRLIt/I6YHA//mMUAqm9WgfRQ063iTJmj3L+adcb3WeSL0VguJ5g8495nZg+1k6/GrHzSWS
Sn3LFcEv3n+zt24Ptx3vg1KyEJBxipTFV4EhQip1TAqEB0XDMkcMsbiH08jii3cqpsCEc1if6wnS
LMAS85rq8bHLHCcbrePB4dGraICTAOG18osybWCM6eNP4X7ZSYdUZ9h02lufixSN+acek5jHaNHa
2EBBRDY3nibLqwzVI6+mT/yFTLavJAZzIV7uaZglhhq3Rfwp+C9Bj13t1huMuZWRH+NvlnoaHhxr
ESZ/YNut1Sp8o0aEWPmeTLomIxEfBvMqyXBpzw4mKG774r/UeC9pRQGSFGYxHkzkwvo9X8sxA/9q
gzocsFNsIEFK+kQgoclqiEu0hYkgsJ7HRXMxT7n7xJIocVZMt7UrFIAagbuOuPVataAe4sP1KGI4
we6Wc81SK5AhHFIYvY91qm2rrXZPSCRRaDgcF8nX1d1mVh8PntY8+Nx88ClELizZthR8vfdfsZ+M
WQOzSgQkUbPyuuJPp8fb4U4vPpcKh4HOUYF8J13HCY097KYovwp4dpO22ROuWMJ6bq3RD8JmNE/j
yThIWslqt5Eqi3W75C6EVxHDtIITr30aIE8BoWjIFF/IwGUeqp352r0mvNfwYncICuD4v5+zrq/H
UTc5WVKZWlApmoVBGx+vlEFAKqZhqu6Ghj0XsG9Q8Hj9UpZWD/NAN+KpPRYduLz9q6KM2LCY2bpy
d2X8a5p1ZZBGJuP+GsNuQ7DZEzo2mun4I4DL/iT7hpetIV+2ziJK05GkqdlcOArP4QFZS0EdIUKZ
LYbidkcnmUrUDohJKP96G9InPS3nNBfJZNsrDX6A7fT38zs6iYCBhk4lfDT8V2kkdBrmRKkmPuDt
C7Tuch27nVgGulUFUCLTmowYuOEsLmQRGuoV1hPtsKx0UQ+1F8TIK4Hnyva5RCevGZIySz5DPabu
iYx4hQoKDp9itbYtePIpWmFxqfylugUgTLhjMOaIFihwSD4/r6P3SkR+ijsPlwTlmRGwCtH/B/Go
X2U3A+DaHVg6mRksPQuHokWKrpikkIJ+2ZrjwU4/O78JQcRZxu3gJjQRqCIqlazwJn4BJYGALE/j
uqy+9SslaYB3scXMB426EstM6YgYdswHWliZZIYZR8uYieRu0zMfJG8M9f6QgVOl/0po9BEq2mj7
Adk+XjgUk4afpkqJVNXiexnfd/P4DDZLuoE6YIaozbqLD2VXs4XaFHbHDogxdPtpj2niNouTMDyU
+J1fkdseItYi/aBU+eBV5oVe3k8onNEasShnIOEh5c88OwHz0oeHo9mHkOuZxkXCpglRV5YkjWI3
iXJentLaKZItGhu5njkH97vZDkRzSiCAHuop5eWFyd6au9T3voLsXG04PaEgJWxP2XkJ7yyY7Ftt
iIlFh4NNBuM48eFOY+yjN3MyJ1gqKPkgwSxPt8DfaaCXy43alBvjA1poIVv5jRTZ3trSEpPkl+DR
Jaf69y5PZUr4RmdmR71zUjDHe1xwFNTBK00PE52waoufjkLOKB67In2BUlu72O0tDt22YB0A3Rr2
sLpMkNc0lNnn4xSDc8EHoEf/yPpv1vj2/DRzohbsD1gUNZMmoijdF/3ZHhvT1CaARHNsf48Y9asp
WvnNocQuB0bl+cWPYQSl/kXiWblK7zCJqoKGt8ancynSZwl4KCNGwaFwFKnzlb/xmn+nn63Z4+aP
KuAGIDjVYiD66neIFQYWvdm+Xk0rcOLziiwE1HjfTP/Q0O/foOu19jxy5160vALjHzkA/Xsn0p/J
kNTZgp2w6YmAX8U+9mW3psvr8JsTn3EmWoJymMAeQe2/eH+Y/+fM28Djmz6J3KpS4NikbelcbA3f
QUtMdsHIYkXA7nN7pJtW3qRR7/5Sv0HWaBcHAFZ6XTBJteeqgNgqK0NanTy1cfThEl3qKkUt/Jz7
b9VE94V5zY549kJzJatvougUi8az72esksV0BaY/tNELCEU2hGzoMgVE4FZYiJKbI3h5sVmqcHEO
XyPMUj1Jo40PNv5s++qyGpGOy98rkijbh9yQwxklRCwzluZF2jZ2GBTexbqoNGhErwz9FJIIig2K
pkNLhyGOe9XOcMHsrnvHrHoYzdiJSfKwDfXSjcx4V3H/Mg/sv/+m9zM1szu/BNIdIGR4JSt0sNe1
vmBEEJwywYPEo0SRwselHWfstYSeTPphk7BgHpZADEkHrQVCs7IDrn+5Nwuym4kiMTPGf+BBZplY
QTZDgkgGNQRBdifWM1qVz+QjV8A6/C1hpul0fN28mkcjt+ImBtbhM95j17YU/vDaJM80410uqO0i
0oNDXdk24/UgZQYyg8nJg+ry8QblaKZw6phf8myi2vn0GKwrAKf1o/CtSDdz78RiMZee6+tHKuMe
URY37nqEj8V+Su/GXqBwJ8wVExWTMOw1C4fhiyWOFh7D6yh5+n85JW6TmyVzQdR7myqnxzORCpkQ
AmhlbxesPLvRJjwtEJF/ou1nghy8MxPdEzHNjLD0lD3ut8UKiwfYuySceRcZKLQDbNLBLjTUjIrN
HGxkn6S2e0Q+EwptfqxRfG3T8ODHxSh30YtIpvooJDsWYxSiDlT9vKA5izyQvHJeDW5M8WAEIFlP
ItYbXXGy6nzynsnoameEbmPuy/4IciXXTgQXLK80KOQrYb9u0d8xV7DoJS6HXdZzZQOk8um+9KM6
DRLtg2yC2j96ZbhKhun+ci31lyhuNg/ZLqYiW3XqzuhQK5UMoCPd+scBUqVpAGXaAKtJg5xo7Awg
tkJH+6JTkqfHJksmfU00ZHbU8Qxg+Y97CtY6EoWi5/9PQn8aC7Y2gh4AHNBlHhi+cU8Ko9gpllAb
98w99S+hIpxYAul2i/6b6+NFsl7j7KRTOQqrYxh/iWPFXSmST2M6uyq2yhX98d1CBUOg45tSMh49
Y99Y86/V2vp9U8HuAEXRkzUE8/V7jOn4ku26/5kzFYRgn5qsDt6YrA64wkNOmaKC1pcmjkraEi0g
BKwFG9Z6al+cktymFhpIo/z8krXrI+yL/eEbYET/u2mm9tKJT38QtLm1UtWlWK2tYA3evImGn2lx
Z2EFVZWO1x9y2FzWPlhgz+zzcGuhVh94IZvCODMK4OcBA9Lj8giD0U3cfcvWaEGXd87w/dCzkhHD
V+AtcdwZFbAxYqcxTOvRsCWZqL648/mgltuqPKDUjNrRLwJ/gfQ20mu3CEyapxrv2OeX2ljBjXmb
Grm5xCrBqkfV8UvxObNIx6eBuEYmUbPQbdbuF9RVOVVyxpFHPgHTXkVSKKsK0ixfT11TP3yinr6G
KwTdbEzp8KQDPkLgdGjusze7q0k58Wv/+/3DUjiTk5/RLsMBuFKmOEW/vFJwRYyPm0KivMjRyxj0
IJ1lp7eLVXoVxMnB9fkbohCz90zYsWQnjAqqSbihdfKmOAIkgoO+fQCzu610uCepO+RnxL0dYfii
174f5d/U9dsl9m+0RubDng15L99IsKb0gq7pd3RRlkkCdO6n9yf2qFsd01GX3jut+7rtfUfFck0f
ldAusbYrKQhomK6UZ36zrgdhaUHRjTVyb6RHcZ/xwL328UB3E8wp7ymHewm8Licc5Ihl9MSo3ha9
YLFg5qK8cLwNrwemAj7i6VOfrP7BbLuoiIOD6RFm2uasMCrrFWmnldTKXFP/2fefBHl3R+Ci86M+
Xj9imUB7apiLDqQmLutwmX66YwiED9J5SpGBUDnhhrII22DZ7JL3wW74pTDKe/tXBYfd0skdSUc6
AtfjXzA2Tc/DBk0O/7nW0SZo9F5bfUc4Z8Pj0Qhte65Hhkg7ByyK50TrKU4Ncj6uG3fcD1Hp1Nal
l+5hcaN5gsc3VQq6zm9DfRf/CriiZwfSqQiCQIbBTXqkcdR8BdS2MWFU64YQcPfhErWF6gTE32sX
0h0rRhKcDLYeu+Bk/5JNpxLCRyVa4MA4JU2veg/c2Va9m5j7v7SkklruEKc5gaiqow5T7AmMuX50
+xPxeTanh39//Bwst0A0GQOjoQN3iR8c1rKFk17hcsrj4JhqxkxgTezOJVq84mU7jVpyDJ4NdFy/
RBO/N7pQDySppfw0//U2S/4JYbCeNbh1f9nmhhizrMfItsQ6dmeAAd75Uk7UOOKRo42H4U1NITx9
jA/D8/3YzQt5dX/FihxTgXOgkRqMkhRdpSvIqVVHzK4EaJ2zZhcs3UydzyxjW3ZD6Cc1WCxilyGw
uVJOE28NTQ7euQzD/Kv+wjcJ9j4df8GEegevPNTHTMA8QHrI3R/0rQd9penQtYQzaakxbU4I0CO9
aDHVns8B9RrfdTlhhZQcPFqaLOm+iUtHa2xOEQjo6q3OjZazjCcP0KzNKmRjT/ojLtlqWae8ELjS
LaE6/omkyeQ5iNzGUP5y00NjThFFrDGTlXqAtHx0xKyqGHzEnuA7xkHvz3w8JhGOQhruq48IT5WY
r4hNmbCvp96+onlnyE0u+zUh1aNr1v8vyWRfcJAz46fIyzlWSfPEek8ZNNZGiEvlI6TJKWfzI8+p
SAMVqkQYPw9mMgl4jCpSJkXsNX+dRtjqLv8jK5z82IRPlc7rkNrfXB8MVZibIZWsAZIbX6RPqbb3
1ugFiGA69FY9rTanLK8EgvBMEyf/YNkuJ/Fa8aMiilL+bX0Nv9ffXrfcC00KYj7EbwWVFsVEXcxr
6PJr+Ra7ZAlFRxi3/5SWRyw2zzys82CQMbUlUSIJLF8DVYEkQYSlMdLxi6qZCy0yfUKQfrsemUYy
VvEIbzziV71yUxwZVfuK0K1hgVQ24xXFGmTcu+VE1SeG9GFy82HUw4u3qIKMj1Le6GvRaZcoH6VY
uuhwA69fRUg0sI/t04GRWVhSnV2EYMhsU7FCNSqYVsZn64ejdYWfCse6aQHe2kY5RC2WQHpnHJ8q
ABUe91bTRe/aQ1r+q7bywi2Uv/UryemfOpxCijrWsTlosODKmMxd0bVk+HKkm3g4KksfED6Xwnqm
nDlxR0mKGZjEPU4L+2L0ugQRuv+gGTvJBuuSHQrjnw6UXrXnxtmk2RO4E8HIibUg38Cb4xK7Vzzj
Oc/ZhwlgrJgjHTka/0T7UpYoym+oasEWSs3llmnf3fp/ikAMC5u5zap7H++VnDctut10dCbGvwxm
1pWeKPIidv/4+t4EKHnyb3Bl/pGP2HJMJQa5JswQyBAFg1AxDz4dH4BtDKwWI4CKlbdO9sxRdr0l
DiJ5c58zBpsrsv1pz9bx3A80WJqjLqXkIlY8x+SswCEuQM74+q0FYEl27xvFLeTtFukOyqV7WXtz
z40AzPPiG/bLUx7Hn1I6ScjoAiMNukelKyX0KJfkX8OUrNv8NIl7HVPMOareNRdbtx1TRX9ZFq71
mUnANbvtF78HYvMeb9lLwrlWHsm6bWLuOI6zaKu5ZnZaOVYzGdCjy2KyoqCOZ9XpnI+AJqBDENTb
dgiGaKfVQzE/eJf2g5eqmOUIrAlyko7KNlLILCy79SHd5dtU3GWcfLL9gk3jJml+8PegdL8rw3Ma
eNU+nndlbDU7VhxCgJVC3x/HUe/78/6BOFpzeDO25NAdQv9HnJbEwjZk3p1xqA7sdIjOl0bycr1+
Yn5zAWL7DtM6CFuql77V4PqbJ9GjqtOM/xY/SObVb9oQMK85gGEx2rBS/kFsk9xkqGtB5GFfGRYw
4D70j3ESyl4u99TeHUEkLq0R68UaT4/6pUb2ECdIbSlWSSIxjdMcKQTG4fqPMnCr8R8x6aVj/nYw
NarGZJ+Iskvc4zyq4/IQWeeL3XDsbIjofxc48jPyQfib+6XCCCLzQv65ndZGYtVCSGgdg2B6m4wg
rU257naDv9DspdZ/Pv+uySt6LMBnfXop7pKQj43vEc2UrxGpKMpMVsZst0FkRHSaXjlyecgCbKii
GxAAizMNXHKp3wawJuj+/6yXjifTDO1coEnRFGmd4utIDLrXg3IkTEe8QAYdj91R1MT3oSR1RuIy
TiEA2VEco30OJ1w1q4pDwSfVQ/Py8qTUb/f5uTa4syGQf+9damE0/fuMF/Q5VVkHQy6RzYN0NMkD
Rz39JoZ6iST9BuU5Ajb5MsdvecmVslpz0BKU7A9mxTVGbMDJACeaq5i8kM5psAWU9mc/0ahS559X
Bvt2xuOS9nTp6r5Z8qhyNVDIlYJkV42FtFXP6a029LGbc4uGoGiyIwfJhAuzE6iMlFDtYrCLgQuU
SwEmg1OK8AbKpgphlmdlk1IcALyfFDF+9xJee+ZMkeSuD+Mwyd/+3x2uREuGCAehJVaSMRT12bLz
qaNjpitYe5wVZ2KxHrjXuHvS7ihag+OLwDuDNIt1tvAQHkKojAcDpJD5Tfdqc8n77+rhA7DGCcxz
uUQBBGwP2OrSUZ4d9wgpV3l5TLA+9BCagYDNPcNHcEFLI6/bDP5Ur2X0PukPEwawooTNQvr51XLY
vYRL7QfCp4FCAT1oApObVsAYek7irIZEurB/ZvAu19JoWSSu0ovR1q4Wym7A3yw15KgFEkr9DiAl
8Y0TressPVbBPMVEsASP1znpN/SL6ttN52nH9QenG+v6/gLEbuVb4lZOTf05rY7eYKamVC2vnKNJ
ZMXFQLTtBc8u/F7J1B1FRMBnFbImmsrJmVD/018P8ALQFITFD5TnZfbU3YN+1LzbnK0qJrCU+sLO
zQhiHlgCstmVlkvBW5xHgp8Fyr0XWo+9uzc3y4c6Tc9J0mKtV8hZLp5PPlBM5PxTslNHBst3jRRg
QbxDcVJ4nbAcphc8oBURUOliD08JA+ABKNy9xY9nf9kzfaRt54ZDPCq4QR0i1N0TPz1xjbNT/QPQ
2/6/RwQDRseR3W912voqdHg9PwqXDia04np22sNjysosTdNvjk9SuHJRLSP0FOJ+7hvmnurWdJTb
qkGwCjGciE0qnKz0ArZqQI5uhC7R7FLk5gtAKvenhmvb7ECDzH82v0SdcRvuu8kDWsJI39JyUrAZ
Y+BNqfasxAHuIAqvKHOsFRfwtu8kklWrstXFMXKfRxq7IIqiMoL9nPctLG8/h+TblpwPayFwFthY
tscFGl7OlKu5NVU3jJssbEb/Z2rERRnIs4suHSZq3YAzhHpTOrh+a5H7xGRsa2VUh8b2Qg+aPTPB
qQ2WS/GsSCFbqnHps+kKSOmfXWwy8JyKd3+PchrEcAH1EpC6CBo1Eaa3qW+nhPXnTS73mcrx3rIC
8B5LD4Wg/9KthqQ8sEFWsFseqouqDObu3k6hpQjm719bdTEaVvfOd/UsMAPUWBnVM08/vRjgDTgn
Hmn4c0gs6s8V3mqvxYO+8beh44erxqWvBB6g1Z2DBi6VTu4riaw9DikI4z9KviNhOajkBX4FQxNi
p0Q2D2DFnOUVAPA0P679TuNqIqWjv9haEzJveHCJooTuIIAbhgTXHCgi3Cpwlu021rFoQHOYQfWZ
wop+GeVVOtBc+p95CaC2Bl6rYm2suTErT6RJYAuYr0rSZjMWR1DYaXwMYvdhLyM6K4mwz/ixGuIe
IdWv3V+BREMWe49dlp43S5fLz0nQUI/vj0CqT1PTo2Hu5s9yc+Ef3rfi4gyQhygbuc0CBl0KPZWg
9KQP77jFn8JXnfZ6ZJzjEOFN8ltZFKWDmkSJIRwzMav29Rvsncf+qW5JsuQYi4qWtSDZpKFaah2q
YEOW/+C9RV6s4TX2LT/afDPbxEL5Zn09grML+1nV8XCgQk7Xz7lUBdpYTQdXXKYfbrPE5NYBXt2V
t3gyfPlVbVnSaAqNPSgNKOnKa+yyjiuY/hz37OYLTs9PgEYo3a5l0jYpNuWFCXLAD4bwg/B42R3Q
wj98Cq2Kb/nDCu/DaAS+GPRgdnPecNGpzWx9uXGWUlyPJnm5BYig/6oUNwYGlreVcj/GxYo02mC+
z9vBqs6BPBHZ6CZhTpVN/yAiFT/ONgFrIwAVZWzHI2Vt0L9m2k7LJhQLfsDYbp2kytPEGQJGhtkV
iuar2avLk8Uu6M3VZMwQaSVaz8huYGixB+v7XZNFcWIgJdnbJGLZyHZmaV6A+L4RsXv2lL2MBj7b
2Okigyy5N20aqbA7cMbxr/YJ5YC1lspynnG4qYHwr5TF58MVwqKtXEnZBW2u3MBDmGgRfeYviAa5
2OBgWpq7w/V0IFQ5cXUhLR+kia031m2WIxk/Gld8tJ2abJnx9MRd1DOaeZIhsl6KOS8O3lnM8ZKS
h4p67sqYLw7DEUHqF7DqmUsIwyifrsHHwUaMR/DnATvGtWT2IoPZL1Ojml8K3uSEkeWF+qZL0NaJ
wA01rGwIqtQTzzRCO9Dqq2J1mNHf6HpxI9tLkOlpHWQNvaKA49APX0l+uy7UjIg2rsYUjXgD8eBo
942RGpghIaqBXaa8pnZHRrQgLZNru8Y9R609af+qFSWGtOXIrn6XD5sThpNOmF46MVqlwFI3X8Qq
yIJVPdF0I8P80iIABn9gE6Jp9Y5nqWxjuMtx4f+Tu+TbxTPRxgkI2lQcJvmN5KOfYsouNZcnVN0z
E6i/xLgsSkD8peiAG3RYsgetYCTmARNnDndvx09yj3df5eEK+5u6kFYRayYZZlSMApomRvnux8GH
OCGinr8xOIislV7fegNcdjE+DdlG81heapEgP5P/28SEMCOzUochfQ/j1G2ixENz7Xo/dH16YUWX
CxtbvvXd21zhMv3hQOJEC4qdmfSW3ui52WjFSvVD/61IIfgw21orcrEAxCItvSPJXx9HLjsqvgzB
8WZ+8+NrEfQwRXemxNlAdz6sS9vKqmoZYGG7G566b+B3o9m6286UuBqtOJeTrQjdS3CFi1toNbmd
f5n8jaOGFW5H+LLyFUXFb4Vs6usY0PVyrx0X7HAY5K+Or5clDRT30Hy6OldVOKKJ7fADEjQthjZR
Kb3gDiLcue33XU4L1i3c5LMjP8KskDo1syqFUxKSPUogE8aDkw2Dim7V1tceIYb8n05DD5RmuNNv
mqwPJXCEkJUsOs0s0m/6xE2B1+9WUmC6IRYnXMQuZa9ynYfJfKMxiWG/kAFRntj8vxwYs2gzaTf4
w3p6wbl37dOxrGW9BCoHeypwQWcgL/uPepntrS0vIyOE0kmjWX9sQDhIgqjNNGPhGmOGPIfNpECJ
p7dbUQQSuyTktifdtddxgR1Wawf63mXSgWqlnx2OzI0sluhXGr2+6NhBe6Sg7LWyEVvFHZAO6q3k
ctMdmNCo3PhJjjCedIL0vGYnxoZt/PRgmw34oBVaNgqsbZfelrqA52HFZyDGl+2TWHpT6nV/iShR
zLbrHtfCMDGIz3Y0JznoQB4PE1rn0upsznGvTc0hTKAMp23GbSSLNRe0a+Z4JYk3lVsyCLMeRCcg
30p7in86r+wpIzOu0BWq9h1kA6HhNRQPELnUFe+TM0BuRRGB/74bSxfSE8Y2vqeyHbnoSGrsr8B5
Oxbzdyz2oHVkY4ajveBn0DVpdq9KijpJA41ZNGLALM3yFUMQaKSeueFh6jW1JcBIgthUrDOTQZQt
MzipOVqmuf8bPIR4/xZpUYhPoOiQVxDtmCutVtX62M2yh2Mq6+35D/WWEoaAgcdeFsDbFQSLtL+0
7vxt7GC2kHhQBObv3m/QLeLNxx+5U9vZ30xgMzVsNPJvFviy595UeXELugY4wvT/YSGZpz5pxfoA
v+os6VfiUAuVOJ4t7Frb0iUBLWuF/wbCzGLEFHynQM/scFrkbn4W3s8ITRyaX0jYZ7QfhOVvhH2K
++Bf3moP6fqXn9Y1FVjmaKVMb/3InpSJUj4QEcsSofpD01MR0Fwj395jN4J2KajFTZFj+xSK/3YS
eBIxycZF/RxvhLpauVanYaK4BNJor8NEdZV3sfWzxUbj3P5mSNoo98+GTQlFc50oA04AnV74hj3I
3tTvtnxPN4Togl17W981f8j+dSXdKyx7mmdDoPcEvLcXdSfy1o5i9VrejmvovGOCE3fP8gWVtp3m
zCD9YM4KZbdRJfyP2pDwMk9mGkpFajY3Jef1s4sYewdp2WHtkVMDj4mgVrjNt4uGWAQ3JcN0aaBB
nPhNWeqMSlq6h20ch/SRxyLCQlE95I6U5XR7+yoKosaidCtTm4mFB8pE+jw0AyCoeJGnDpMXaqCo
WghMXgJoLvdu1/e98zGtUiiLatVcmiZiHZuBIyDsK5ZJty/zJZbvrJYy+msIUMIwF/MX43nqXaQW
cAz1hEfkdDLInb50Ua6i/ZqYCQ5aZGpJ3FfNT88MjdTuv4mSSzjtCEGKhIO8nMsPNvGlMf5xkybP
zdelT0KHWYlOfF7maizFVSq/O1SLAGx1IDFVldqv52pO755DKpT7xBsIdCtPw0voJvMXR7DIBB3b
72d+sdD3kVRbs77m7QZCPz1RUBFtVKzEVhz15R41a4LyCAgkgjc9F7RThRBZear4E/Ex2VXk8YEW
jRA3w9ardQAp8j/e6eszK01Rm6R7WmMrQw3r72gZS8yVml8CjHeuXD5LuNnjGGVgWBZjtMNzhZp+
4m42SKnmgsK4QD7CmN82H1/HdwjurN2Kaa9q7qfpedLAkSFrI6Ivdvbc8CD0c0waFstpIzMs8qDY
SUFlbPlKw1Ve9HhMTtAYGXnM6EY/uMY7MfJK6FuXXLKYoT77ydnc5Wr9qWa3FbAZ2g4tJ/NjM2st
mlqJVrYCrlmltm5ivD5UKy79cIR992H4XcRyX5DZFsCTU31ZlGub8ov4CH8gVKlynSimyg9j+vVm
dT/fmiB+8F3uBl37mKcetBji3MzI5cvGbhZqoNBE7upNm2OzyuMqvbY5yg6tNFtBbLFRqUOF2cQQ
nH06CnjNTU78F2fj1egkK70tQ4+lBu6iS+N/r0a14as3xdTV3skXxoa0c3Nv6SWuGCYu2N5PYwuU
w3FimMB5E2dYrP7jd4AjGL/mm2qE3VDXnFx0YTY0UWLM1DKwf8cX9wW+LPoQb21nHuwTs8WfOBw4
Kmaj44sBAxcW5BltVUoelLJIelBz/knrDfqm3wxadH+0OzETbBQ8wCe19iZvV+/krSSLOPzdmELl
jzLdLUVK01PeiYviIf6+w/uezBnjUtqz7eneKSqqBrNLf4hgvZNi6SPh6nnzQ409wauGt2MiPF5u
/gg1pC+as/G3srDGuf6rxME6lt7H6Mbr+FoQ5PQeqvFfHolKdvndJ6Fx6Wy/EvOR5adsZAgoFpKc
0q/bBS7TR46audTkDu6bZlOvoHm0hxWEIo1C4UtyEbNh82cZ+KTsy4AMahL1JxLrDS7Yr4gt1Iha
x23rDgcy1wSMkBuMNb97BNiESMRVNpQcCcuhBIg06QnwSNsV1nk5GFglcB95cQIY1m2w85f1jISx
RbfNZ7tr1xw8hHMJ+LDLPHBjab//bZGgdHeBfbQ6l3eKnIj+nuCSKyBSn3j0gMH7gDjOTrO3Hy0w
kVgxCLwwulR3rDmiygw6wePWm1lpctv6hO6K5X3TMaJVfURz1Y3ZRm8jMTy1q7sae67QwrMnbOMs
JrKjVXf8vONBR3ltgN6xRNXPbHVO0yayY8O6nkgHy17JZlzeXPnxCzV6QLB2AIj4Hc2rS9CDZFk5
OSuty+nbUaIWf2xS41O6Zfp70PITptE6H45H0eZjKW5BmHz1Y/ZKSDFAPch8BOh2tfLWPD77NXRe
bGfAA4yYA1lXtGJQcEkAFq5glaPAEuex/EL4UkNqbWP8s95pTLmPNNScxsWRBYqgiGDOUO4XF45W
jQvHT9nghzgOQipcCsKLWdZI7Wha2JtUg1uZnCJLVvV/l0HE5mGYMiE5NRoFd2hn++OU/3qhyqMU
c+A/VzIkLN1bpIoi+Di3TTBZkbvq9U742+ZpfWdHmJ9bn47XEFWojRpCwY9AzlX+xdgkAiyBcOa8
2u770lMPYK0Ajeo7jHyNdfOyH9jDCZk3qK89mZCWP8vktaNyX0zD/PN9PIRf39KxjR2rHLU7j4Et
2H+/RN5HqjkpZZp15LuErFtx4lFWM1PShSUprl1u9lcET6obxhwXK967wF+iikfP7Z0AakRpK3en
WZY9aBMb9hHL+D90LDCACU71IEzL7Fl5pdlUtaIA+7TaZWLoZzkeLCjqa871GYaJmefjLC6C2DBz
rVc/Am1SUq79s8DyxKRazyW86K1KhQSriTsmrjsoY+RmzElgdTs0135iF+H6qGNc2VqHiM85dsyf
fcWBrPHxS8zU2/TmElmfk9xx8RSduJlgYbcWyA419FleYIfeGl2hBMYl32FAzJlfU65yTcCAwqK7
wdA5LzplVF0gXasMNObIl/YFv0h5W0mP9H86hajL5EzakPozum8Qb4EpByYaT0o/PyRMogZWdMkv
nwJ8UFubybOJp6z3yeREkv25aUuEKuuQ3pAVSofFibs+Yb+Pc6vNM3LaNgohg3weKQioo5qVr+Pv
rAVO1Xbm1I6SQ8BQ2j9ZnH729VvdUdw0pl3BJrUyosgGO8+EHf3lQC02AQIBQ5/OD/p7dkAn6udr
PlrHv04bXttcoWHQoc8svQnkiCRVCyogebgyOHLzQtklW8GoCVH61StCBEzM0uxwIk+JOA9JBPkF
f6bbKeaTPokBlwuLGYEBRYkCqRr6qbBYZ4ZgJ4zkcD1NfyK3vwatlJU+aKUClmZ3Ieu+2hF9LPVZ
/zsVoOhahklobZ3QdF9sYgHH7g+XENPpbgrCyc951GjlZ6HNVtubEKLH0V9gzLtKJ/dffGyYGJq5
KnQTeWoFJeavpBY9OsjEORmOH6OgJ/B5psbwpBupA6b0/hfPHdfiOXpWfB492ckjtGS3nwh6vb4j
/sr/WaRj+o6x2EhOsIqSJbnufdh9d1a4H+3ltTP+5rUzNHQmJ6tbSUe8nkUBDeb3HCvmJfS0O8Pn
SjdwAax3HcTXOtWP/d2SvIrpqG248I1GGpnTAi8pPBF0mugs9r7InjY8Uj9EbcQloQZ1E/wHaehs
aZffTAkiaCprKPzwycVn1oiuzas2gkSbpCEg+eGXMMZg5g8gKqVglzCcF9Sfb0nkaEmr2yKlCKU3
l/Xd7QhlCykgKr47q6YHj+/OOXcfz0B0ayAuGgX8cuvuA8+0G0nCFolHBIDzY2sRNg7rFL4hcr4/
o33wSeNJS0rxW0o/4GujX/6ogSFSX3S5tdOKNftzvKnXeNlJDGbTkebVyS8xT0trilGzBA+Siy6E
OeDsZ7aSG/eMlKvkPKI6J5VTWo8LA/kEQE3zx+ELV6beaG8XjiYMifnVb+JOSXNfYfHlMRUHfexO
jAiO+yexLLND/fEBcKJiFEarV36v0ka86w4mEAPac7mTNTcNLvjh2NtFQ81m7TCzxLUdM+xuBCdy
gq21bI+cGNCz21Fq4qGrwQ62+iAVrnE9IZxXL/gd0bRyaranWwfKfzod/ADIkrtF8FHep/ZfjTA/
4CkUt8JDzzvSztUyLYeBXUfFOY+pVvLo1sGyaOB+GPTKLodyQOya47xKCz4q04SUtYRR9tro00Xd
PT+HPD+5BBMRd40T2AgZqueKiEP5J/dd/O8IqsKkqi7+Qkawvc0gfITZ2GieVKEIe9Io2Ve0lEMH
Llhfdmm+TrYXjENbIPTZhysB5rOYNYdjS9xlQXg9GV3k/uyy3sEb5rRBWaNOdWHzSznnA32net86
x1an46LYjyDeX5y4d0V7XeHE0Qb4OuKIxqWaJfdVIiqLsisLNmR46+jwcHwdYaOFTvTIdsqlWCsT
O7ZMlbC6OQ4z/eXx89HADSMYU70iC0EqcsT4i8YGTdAF3R8zXSnQOqqx4dKuBfc1G+jA+5EUmTq1
ovMKbXo7RrKfWW5/4gQ8O6K0GjuE7E5ka3kIbnQlUXAr0RtaC4cOcTjUvOoc5/MjU7nevrmjiUxt
T95MBAKvrlijJueGyMnRmdjZlv1xIwBuJfa+q9NU2R/RPlMEZ8hmBXxJVhPG1cXs5EmAbMGntahS
s0jT1bvmfvclDrnY5jGG4SPQrf/wXjFDGTvCJ+ep8sdRUcrwxZPSGaofysULX77/5MUfdCJO7wZF
DoErSpE0GV6g8jt2TS7QdWWDeAh/S/5V3L9VYWolzGbsZad2RfgEM/pqAPCo7/5picSWIlUVRdW8
tsfhTfMbIEay53eMFpSwiRzHpegQ/XU3FUynswMjrRoYwJ+NcTWsEez5lCHv55cfTaLlKOLx9cz3
yOyE76DYzBc0is7SiNtn3rwhMW9+UTz8oqv2fplFbHs0DgIt1nhS5QT6dLZmdelL5dVDuu23WqHL
a3vLgZ+J12rQCEyCExDcTKQGVzrVEENco+y7AplIDGkrU9iBe5UU22cqPhB94/9+LsnQ1Dk2ykZ/
0Eue2jmx1lcosGZtiKHVlowYvhd9PBIbYtxMfl2sw2anmJGj5p20BcMpPe6Royj/b5AMnP4YTtBp
aKkNgCVYXaceFAb4CgQ77qscp4JHXpgu+r84HM24RF6ut/Gmh4g5C0mbl8gUoUrVLZPQ9Wpfz4Va
sPwBnj4mGpEYsiPN2aAfFpzzK+QzC27ZOQ+EGHw4w/6u0TXLzuOXUbJGuHTzINVAzeaFUAgJNQQu
+4cFMn/2pLh65T4IaxMsmNGyVSNJAyKoAIdWkxWp20VhcZv7A9izdn56qD0nEH7ZGlgV2yRcccOj
bz8OpZpxo5Nh7RHmOrDkktuElEFDUsuRQ9tZahcGlyIwboqD1nGBiPlFXsG7MJK5pxQQ5Fxb+Yab
kB5P8mAKlzkZsmgFs5nZak6FvYIoXO3/h1nNz5MCWJGBDpbUM4qDUY2B5fJjkOL7XbjZcwpsJtdb
1j2pbahxPsYYm4sKewsF0VowyisIyqNXHiXAC8/03f67nFDn9BeW7NSe27xboSx5hn47ZmEeAoRs
yH97Odg3C4JLFWojveH5Ch8H3dXuzS59jIywqI2BkX29/uHMFIbNQlk51/39mXAW/rHTFCkK4Xx1
PWxw7BCkgqR6V4sIccKHX/o5x/P7xHbj2TxnvO+uD+q3DwvHDK8wHmz0hnAwScxFZwBuquJjSRri
ZqtwsM+9RzznD4jkgU7aO5nMJVL+xn9lXgpWaog6YILj4F39MbWBCPghHADf3Gh1MHyREAy756bt
HmB00wNMFI9xV4tJcivrkEsD8mIDMKSJiz6NGO1vp/ieL+AW8dAaHu0pBsMjvaGQZoOKem32EXsX
L6l3fOUKyCg+E80dnblB3r/mNP2MTtdg5Z4dNebVob9ouZge/x2t4QoNsiy4tnJ+VvMyS12amF15
MGRY6UsuilgKlH2JzJGBF74XY688isWfRKpM9UNQkIDk2IzWMpdtRjVUN9MqUmitM3XbpAhYdH1B
NRTc0l1cnDT4jo3yQyLfAHzWGUgOQUqEX+2AEriSp7m9U5ufcH0smyG/7JfTL3TDX3VN9ohrHVnF
dxyeDAEbAl2Nf6PUGE13hpCClRXRlfXMl0H5few0zuxrD0kn8eplxzyGDL2vucxB1bElndGcxdTP
ORRFRQpA+3qiiwRkiOPwxL2ZNxSmU0dMpEZwAsbXDZEGk7/ujd7a/NXS9tOkUt+Qn9wr/HZaUhNA
Miw6Jol8qsnLsqYDziAT7E/1/hV0gWaXQAr1sOTyMkJ58ZvFZMXz3GdOMIcD6104BfkRLGT6cI/t
VrP1zifxixy+jGMOD4i7ZpPD0y8GrqEPMaRskenrVJazAZxQiR3sei+VIiC5/IoapXtF/rKWlUpt
NtWc9Sb4PPkzWjbfWoJiN5XFGLnEcpOon2pXgcEV5eg2GbkVECXXhdPdfeuOgpx2dwzMbjXAf1Ti
EjENGCzbmpatWUfsOkMfs92Q0awSQSibr1Cle+bGzooFICAxMcprXVJueOVmYXcvPLDfvVmh+YWK
cqqJzsghR2UzdAogAN3P8GFK+a1Qxxv3ILrwRFZccSvEqiw7LjlHKxPnVUBXm5V8KloMNDQD7wix
grQTFIJer6yY6iFL8l+g8i1/QcA+G7zoSfENXgDDLy8mXrdBzZYDqnFD96qPr05UopYbUjdq2tAd
FWZwJhF9dg4U1gWGx2RRRwjHnPCcFVgsUjU6SzvgNpAlloTH1jbwn/Z/SElYlLZhTEIwII/O2brv
moiQfj23IAUZ1M88OLskdFS5NOFeKPNg0LOtk6cMc/PJMw0kNlDpDK0pae7SM1BPzFSIyI+lB/9T
O4/gVmyBXH1t6pdbvFwDQssL3B8v7iPHOMBD9g7i0Ry6nbhFGPI9xBMaGzcgqQwh4JEI9yLq+GXN
JJPwIIx8vhD9T2/yqRrGShdohN38YzieCU2OPdFjlVX0gl7g3r1kmargdi8GUrmM1P9GzIh5cTDH
09iEfASXPTKblY2ImiAx3cbbwTtviGQElubLEEvc0oDC1q1pAJM2Y0awfEwx3nyijfSzkDf8r+N8
B5hMRYOCJRyb4xZU1FGPDIJH8f5CkFI87odil5XA2wmlzUfzXcxjYTaUPiJmMCd4ccltSa4E65ER
p/ijNNDKaL3WNBvTFhuZj271W2q4ORublaClBcr72FpwjtfoSDRvCWbsa+OGlgtSaXmujxnhO3iP
lhf0m+3Y0IBKOLu1fnXcEt5LwfehABs9yIDiUZki6A/LTbO73MsScc95wbBvPs402VGdpcPqdjTR
yNA8OfCmTWOBppagJ6UV4CrjGM9UASU2P1nIHXzA1L/7uNtOp0Tnft7RS2DkLU3xx+E5ajFREaBR
klMLSSehh+Egw+5KOIhvwgHtH4PoSdUagkLckA9q1ddnx+MjEiNTuKL1pfX0s51T/YS+AVH1yqvV
G/jFn1l2vKAqhaBpItSb67gYFqFL1O1FiyZcFd9EuHzv7fQRctAVyI4kYoZ6TdNyYMbFttPfosuc
Ur6YFLlFf5r28nWUhDabRZoIxB8ofFJs4WRPgkLNj4s7WkA310nAwh9v4g/r9+KDjxHMyiGKSjA0
aXmZGO/W9yHRrWswwFHiyrQsE6oeYt/aN0T6axIGO5/FulfaZy31p/bV6ln2p/wfAo7kTNIkOjpH
u8KNzI5/xB/3dIVH0+GdeksuBChrOXgtkpJ42h6alyij7VYL3QLI0un54eGVUJwozywDwcgL4w8p
iJSfj3Y+6R+cUCrVvYrVRowoa15GicVcUkUNYqNAMiYHMFKc37ZixDwe6zkoSzkrPsjj3E9PN/tV
046GZfsknwK7zigyp5hNNnzcUe8BfuTupB4UjTH32BepnZHbjBM1Fv3DywEKNOvZ1nXShVnYdSHI
bNQoBPvdctZooa2Wg3F4O7ieF17eBkxoG/NICbBDPY7zHaCJlsquTVWpepuUQHkXYeKS8L4rYnhr
W4jFCnAMMg8xcr+NSTMIwDNYQ3Vks5rNwqP33odkjMd365hc18cZboj2KHo7Ux4hXrZ56vAdirQZ
ZiKQM7n0a+BXR4BfgPrGnJI3NEwimSZxtI7ce6rGCPX2gNEfXboG3t/26LW9q2N3heIWA4j+9U8E
ZUjXOox9Gp2I0EEFWT3mLgHXDYhAlwNSDH1FXkH5GcOYV0Qd0b5FmCiV69dXgQ6YrciyWu/i8IGO
yK/YHXiHZn8b2ijVxpIUTYoYi0uyqUKXChjb1gJuzEVr204czERGPp0bsJnAcQxOm60C4BYsx3iv
ifY33stuZ18o8lFfxQFihFnGx+8tiuRtHFpU9hvO0HWLPrWuf6Mz/yyXqj2SbgvncfLr79CbJ6t3
Tf91ch1IVYrI6EB6lYNg/zwog3r7/h9P9l3X9dAytAsU/SokEBFG7oODBfyhrGMVt9UsG6Lla9UV
y6Vq+L2xDEryxxYbk936pLzuZz1R3KikPxCejg5LJbfDvDrKD1VmYmLBl1TjWaF/y2OExMZktG77
ulYr8IhBiPRENspgm1N69yuBYzSbrPpmZraIYP+N/PAYWnG9q+B/Hc1Rl9Ryp9+zxwDjiZVOq5OJ
0abnxxBkxdAO8joCdMv1WfIx9M/dVAi50ps7tML8I/hdnfEe0uXKk3UOFaEU9Dsew5rI5OYn6Hje
Wa0m9WWCTfsQbCzXmNbxOrvvvjwZ2UInKQ6ZTCappaTu0uqN6CGR1fVwALCGzwMMEZZiNjqTnfIK
R+jKIp0BFmv2scB2CqnLjSZUe6D89p3V/fUKCdqZaqb2W2rdhxUyKAaQgBS5TH/pZyMALggjU9UJ
4M2TmxN33gqPaAuDxkrY9I8aSA322a/2DSILow3m6TzL2EED7XjiCu+hlVYLIOElaeErUHxqpJA0
yyfIL7K2mrxLW4mwZurrtXax94lASjvcCP6aj28b20SkPQUjXoLBwsKGKldRMmO5FOiSrwLvTuC+
SIBR8J87UFIv+kUnK1M6vzpw6x01rWJYYyVg0QHe49hpJ+3AhP4iBoWTtsoMvTxb8El4wxWXL3K7
QlzR9Vrv20g4uCZpk9w8Xy/LSpRhtuuLZJnARBnN9aKMNZUzJs0/juSlcutKYgc0OmBpO+TINvyZ
K8SNMellO9uhXgadmPutl1RS9YNRkL1fQHg7DStaXu6oquZybmXELzydYie76fa22MQvqtVj0AX6
EkK3gT9A7HHhU244tTtw3R/B6gU5QaL5Zy7U21APygDk2eKtZDx7JmBFdkDRhHptEsj7mPbG2ixN
sFMay/8s08yDn51Ef0fBhBBbk+ZssfzSz0Rg44NO6p2nylqd93q4mm3HNjb23q8uYt/sr1bzTiIb
WMtmi7BnYVtwrntbTIX3HpenEfyBf3PR6yI5jFit2DMXpgo2SuEkHepAhLDONdyCuilzbtZozOYN
kTEs5KyVCU2kyQ/bNsasYu61SujHrPJfhd9a6U/Wx/bijZraYkIuy1CG/FH9fMhvHXCR+NrbTho3
NwWNPBYNJsTxNkVbzGtA1ELOwettq/9xtN/7hCBSwggRsWbEgv1jQPmKIPvPRtncYrOeeo7kR4gm
pQhCZL2hZzvU+D55D6T/UQH9S5FD34CXffCSY+eO8t4CJakJmVRSwn+dQT2dGzty5LDdX+Uy8ImV
vj2yhHB0wAj8U1zTJKgH77mHZXy6uAyER1WTwDavGerbbA0XzjIK3q1YWLb6rPVWcr+/BBZ/CDlz
4Bo1j0qdGd2TD2/rqdQf846XM2KlpyM/BiJgPTbt1z302OhUiTraDvwyRZgCS15d9h4hvMdKdMJU
Eu9kggGPplZNz8Yv+QmZrYVYtSPx/pV7gFXYbgATXxnCn9mDWB3XmlTy5boXhSlwfeyeeWeAccVb
9zJLQHwjiv4CpkTa32LwQwU0AH12GyhjbmUdKTyqJYqN6tFue6sou8vsRqcelaAa9dbAYI1ePwhC
ub+FyTZzvlxxxK14NjL81D4d+ZxYOtTt6rfXsx+OK1msCvk/qIClJ69piHAO+sX5OY7HuagnGqEo
pcGckNP+TEFtKce8IspCfD51c0lPQSJNOBlbhwtXN5kdqiFgobRkjy/2rzoMwXcCJz45QQCiKZcQ
y2CgfX2AX/QBmB1o0DqJVHYiJrY9lbJGNZ/rKHzDKpvWQL+kbEPclVDCTwRH8VpFaH18qKvxaDas
FYjvCMZ2kWqjY+OJKvI1bazcecjW3y++f3TAECL46nG0QjKyCkjJXIuTbUSEwClcuyXmD7JyoL1D
/7/WxtBQ1vkXBriEiPnU2joaAO3q4AnsGuXiaizzqOUwSDUaVQdqshVYBHEjYNtU22fEs71OSzEf
xDHPy2X+nqIxEvDWrx2OwJ7x5xFPXEp1eiPkcJF93t9L9f1QHkO91iNdoFlwGaTJ8L5GTkQB9c5p
91Cf3eyCjHwvKq5OR7LrDBe2cTE5uYQc/NfXv6swpybZSMVAiLmlrYqOtptgpC+ArrgY65orHuNl
KmZgf8nCv/Xke3DmdD5F6kvnBvkTDK1vC+ICFwdofWS28xrZ1kQNjzJHzwHSr9tImVokIRDqrwlB
qJ1g1s0BlBhZ1EhuixEM6kuImNfmR/1MBqG9tstitTGg6eB7cuQiBwDkpcH43RYiSmGzbS7LBqo9
Mq0+YQE9SNrgWqv1RSqXQtxz+o295OnU5C8B5Aj33DkQp+jXbZ+hoWyH/Dzz2DcH+3kFtJs93TVW
ZSVGkE7vG5gs5yb+i1oE0EF6Ts5gTVjKZRA65FwtbElg4EF4iYkxX90O9KKIRFTY4etvEX+SyWLa
tUqPdDl2pSPFfzHMzKrVvc4GKAOTmZAgsW0ec9Ub/rTT5GJYFvlqDndm/Ow+Dj0aFcHwzZMV/x+a
65ccXq6yZeMaMh9uvE6XE5IT/VVu4i9PCnz3v9KyhwcauOEhmiQkw5yIV3kkpXxn9GSs7+WYuX+4
Oa1CtyGBYvLRzqUrYUdC9VpeIjUJxjbI4kdfk2shNeQy3p+u0P30V4GOMASksKBT1hCqv6r0+aNv
64kll52FDO2yFJMtJHicKw256PbLckqooSPZU1F+3wtmupBK/n8ZWQsPI5NcAiENdwQhUnroCQyP
ZaEQ9gyhJySbe7C3wZoM+WNiuXT8usaL/f+G/39qImF4K6b3z4Wa3chXn021uuzTxDeDtjw3JE/M
SMLENROMjkNvwCZ3w1rmkNGDUBDnV092Hh0QJ87xD3vpe1PWXIGmbIJzl5KxDvvpjsl98KDXoyj4
gGC1WgDUtFXJZ8uCq37PsKzfs0LopJcaH9qEj9sXZRfG2CDbzXAn27AjsrphFg4NPY5rMVbTpNId
p9a8XiZa4y+oXzFmsD56LwGdssEr3vqhkWi/0agqaoI5fiztibXizxYwh5eVxX3+5W3JkAd3O6x/
WEmLPk5QaY+MVYc78qQca8ZCkjaaEw7I7FemVE0tbUiBU/huYE10Ok489D+wMZx3e+fdsbs0S/DG
uvOF98rMy7mj6cFPX/yNddT9qM2lBmb+pUq/1hsbs7INHOU0hSechk0LDK/fHtThVId0CCRDMfEb
Od1Fb4jrxVdp2B6ryyouhnj9MHTKeLf9+OX35BpTpB62IM1axN8BVCagHuRXuRd14sm1ib17SjcS
lL4CbAJS89hD7di/aXDctxX1VhsO5bsFmzkp875lEHgccZea/nfUh3HJpB5FxY+WAe5Dxr1gE8WT
gh3t+Rz2+BTDSnaxjzw3vD01mMfGix7T3h441vNpUm3lfgcxgAmIH93JBS908kB7SQ79mbYDMKRY
FdM6DkXXJ8fyo8bv52/cO67bmMiHlUfjqdTP5VAIKn24NgkrCOUoiZp7tgJvFX+fI5fgSAeyP53i
SCIbjg+EoJlJF13RVNuSdL3axx42u7WUfcai65VV/n9kl8hT9mxClEhQhs9W3rf5mjxCIOqGhvJq
ktoFBbN88qUZzrOlk6XHC2QzN6GcCp/NVFpMIjs8zLKnWivLRwRs+OPzPKyM7lWrDCdjTQTmcbaB
MpMcSM9iQJKqzW8fEf8TFxK/sn6N3xgWUvsbXgZoF8wcQF9yN8tN1cHeSOdYn26EqOT440ARQ/tR
DQmYpc9i+kmmYjeXYp/qlvxD8JkuEcgG3Jzip3hTJfF6T37A/OQ8Wx3DdrFGTjBz3A0ylPlIQami
gutoCsxMdsXgRb8C/jkQ3hUjijcJMz1ZS4n98jx3ey94xZq6Uwdg60IZi6r20NtshF1e5p8pvr0N
ee4GMb0Uw1PKa4nmG5gj+Pjf32ze6v4XGAU0AyMXRwCEIddJni3qrP0j4BUAAOQyZLiQQb8gRUx7
lde1T0sUCGTZCqSEPRlqmNZgsG3/16frMUTlEvxwHtA1IRigkEN3o3Z5K552tY5vMyXkquX/rLAH
DKYRHaJ/KuJbWCLAjgqVP9LoLLCQOg3Ryg6RE1rnJs/YB8wtzSVME6kmvQcWQwhA1QyIwJVMs+Tc
1ZRBeBK3bcqEtLycRN36oG6IFceMVfzw78xjaek0Q7neLU0XskbSYm9jK2NMvz0V5yR8fGG946Sl
vZj5VbWQe/b959GxBJ505N1jIg3o2xWjCNJfRsLuioMZcUvHdes9qdZU0KQA5/E7jiTLD38ZxKQw
c4wy83CjynN95TzT0z1NeAUTRxw4fo72PDiIrV6ig/PvWeHJkeSy40wneLKCvYtw3PLjbWL1vz/z
GtSdaT5PDsMEKY9tHsUTsLMZtgeIhBdfZAwSfmj3csva0TyqPu1xu4zKXA98t2ZsO4Zli9OXlsKF
c0gpV8pMaxBr1XQsgO/UEyhSJbu7sL0a8ySJFId0oJHJvUDeYuaIXwDGD2pLVlc7YXZU3QW3ZZCJ
hALLjDReVo/hP29VZeyN4DpI9VJxuHxzE2bEFH3xJMe4icJkD72JywuB2YyJB/puvABgk4Fp7kwS
WGcfhifACNSPJABKcDyujoXK1rP7WlztF7GNWeKNLHHm5wXk/u1hntXBRP9W7Jt+WZmwFXQ6UVfz
EMQuZSfdiXleNddbV61N3CtxF8b14Z/XbzWYX6Tw9vpprWwzIo9PwubJXjrCBtg7xc6ISonhwV6q
UEUS1bFBJUMbDmG0sD/RJyex3U6OzhlyEyG3JOsyvJiC/5BWTzbVerTIR2+DBcbpulbm7iPROgi1
zOf/TPT3L4q928021+bN6CvTlFD0tJBPvuxzTSa3vrlt67GPfAQ8XJ2QUQl2hbP5r9GYMHmnf519
v1mrNusRhxaj8m5BMYwxQC7lKMJB39wFLWp+x66cPvuj3PjBetMyZHCcjsnVI+rvJD50qMjEtriV
20XKDzomrAV18F0A3VehRFYbunA6T7oSur+NtfpmkmOqy/X7w7klWA+y1G0YW8FYBRvGzv23UEE4
4GUxRUMvWX9UDp4IWEJYY1Jr8WPBHzgyewsNSeN44w6t0MRrdM135arzJjMQUrD58p6ghqwmMilA
gg0oQL7VPHGto2DtBIVmS1wHc4mTerDxX0jr1OOhcBqfFRG2VVrkP4UJMb2HxZHm0BWZG6Xa8oa6
OEETZQ7G6VmkGFPxmo/O2812AL5VW4vd/YCB0fboWOZvwvgHwTxfH7H+PPvUxmPN7VRc5mE6Cg5J
OrKvbcwPlmIic7qLLMEfDlLiRowBKX1li3DoefjGOJqiGVR5skUEQrkOVk5ZoZwOGTBiJkxaLf94
v4HH/t6b2PZohelh6Wgc6X1XxmSmWd4aow2qFBdpRA2u6ZgMIjvnvCZA1QuPxuFJ7KjgZUODm3jK
QpnltXZmH2bqdf7pBH8+/y5/Vn1uJSBV66B6uh9ythypZ2vi6DWo93ZFvvBQXutZLEjygjgt+I5f
YRRIbMxWd0MuIH1e3IteVf8qOJfZRxgqIXEoMgSR3mA6Iq9mPeSD71K/FcgyAUdVX/Mhca96KqqB
ckuzSESGygbm3T9e/+lwGNB/cskA7JMDGPe7OP4sA9pLJX3JL0eQeUZtoRnQznY2Q46MtKtGX4YB
pDBKica0XaKmzECJfQvdGusCCbCbwxyl+KtG3oakMdOUaKkTqn9vEB9WobEs+J8Rd2iIZ05dS1I5
E9eW1j2HF8fSbkjFxPactyml/b9wr+sHu/ZDwvt3AuZVGJ+c5ZAj2UPm3y6BSahr6y5a2q8lkQWB
Z6kdiTnhQYYV4ucpCLgvQrEN8mWsyoWyW9Hs7KL8tIzfMuGOmFdJqmRoRtPeRE+OrzTZojligjAX
93TgzRlpRkwK/4muu3XYIQ4FRKWxyGqu5Qu2HkRhqlQAjID2uI6HnJ737di7lmZc+MqHxFVpqkQv
hNmO2jmBRpH8X8Oq93IJpS4cVBeYcQpc0eTvhCrfafXQ2Jf761DeSXQV8W/4K2hIw0KRF+o7i8Kn
suC+ttRWmDtaiDcpyLCuSKgT4az7wERaAVyuv1MOjzoEiOxtj9ZhVywtWIqPfPH9BOi7+vP2n1qp
LRHuetocjdveavNAZVhNCSzIJOckIepKI8fqccBeKYKPtmMX+jBXQpwQrUFKFFDP3Sjq8knnNbPZ
erESN4NnFUVUG9FenmfoOdEXOKERm6bU6z6Ou8NM1pBDips1PaXSfU3mX8+Qg8CTxMZu4/1uzcCx
bk5VEPEnia46sWRrgrA1X9RYfSLmos1NbXCjOgqnc2uCAT+2YHcWox/U4sf7X+K6f3Kx/SnyWtIz
XI7+a+m5Im3iKJuKVi6SGkCNn6ic5qLyOJXPK8IN5lp9OZC5Wl69i0LX27vGT+WdbsquRpi4OMeL
RHRSrHXsNk6eXP1qBGFTvDTekow2WkAC9eZeqy1nCPFNRjsZZuuI7TWyJaZTD8e7EA6sVHEUUltN
K69knhGQsSZGtcKc014JTsqtpGPdnkfFT/OJVOQFczpysltibIk2rcx5Du2OZYI/RwdN2UI33JFj
p0gjzYrf5LvbZ7zALKpS54n0fCA75A4zuSJhFHiU96pj8UBIkUndT7MgqorkRoFpboUwxV7UReEQ
kkFCwds29Uc9B5CFSuRnA8/uW2cb0BFttBxpYWuxzUU3iG245Jx/VzE0lVPISs+lbngtbrLbWjaq
sXqAH+rQsNpeCPoTCUd2NWL4IeKnmy4KDrTbCeWReRLwvBBM5lnqzHm25NIg0yQNYInSZf2zxWIy
cauJf43FWxcQOqElYYIA7Fkch7UdhklkaVfwin5clM8GHhraQkZjLfw8KUguCa3RnR2o7fmNU+BN
SQUBgEPY6+gBA3pRQi3jFuk4zOMFW4IWi4nA0Osa+cdsdlm78KR+PDGV3FLX5QJ35zp/PJ7xXKfT
BpJjUgPc1he3Z86HTerwCTe4iytPyDjVVLjxQLtLKDZQ0YnUKng2rM36vK7D+h0t0ZQ27TQLD1zD
z+YKMfiGvKyXu47t/3ZwMWy9S8YjY+mfu7PbLimQJBk9PjBHgAdGPggsLv8wmi5o4uPRi9RknLey
kwzq2z4RA7jfNUZnc/RWL2kABsFDO3J9OKeJx9VGfqZTgtFu9GEdsVvAj7/M3uV1o1wDPUTkex+I
I123bbWYM6ShuAX2qYkoA8WpXZOnwcsqHaeJJZ2EYxo4Mtm1FhDUvdPdRQepK3zXmggoHlqZH/c8
uqrzf4oNWPz/TahZRbYSPPHPuc3r2Sow+7e2d4wgZsZUlPL0hXKrgJ9q6Y0i8VpUdpVwVdoWTuT7
NWkAzch0IilB/iQi/Qih/iy5hApHqe8NzqUOGnR17RyUWvG+aj0hFUB3kl1EmDEcPfO8jCCg2O7S
B2dZdl4YC5FlTOLWujabbP4f+x4CZB+jJBkGK2L2kos9roO8hDBpv9o1MLGeiSnOpfHcWJxmfESX
gObdvvYWmhVd0SvgPwE8dkBRX3ru1i93H+p8Kndz3fYAhr1bM0VzS7sOFkwYcTzEwQYxhVYR0EmQ
IpZTraBq4jgjzaobeMGqoJD0uWHIczvUuBEH+bDfMWRNXkH7o2ebOpCXlKs3ZsghOtIooefQxojp
UeANnql71qwRuAPNcl7CqDDS+d+5zgzSzLVDdjbl13UJRx0AU3Sea+YkVEmVXeKmuc6alit1nre7
IPc2/v0e/sxmlnmhYsyF8e7kWChljWtogGY+GBA8EgBquSkKER2E+SXQ3J1PVp0UzT+4Jt2hbxPn
YAyDxvOx2aOAJI0x2qvPue7ArWsHwfnpIP3+l1LQc8K4fCxlZTXa0n2HFY/FQ9z5aKlsWBMyGvtt
MOFz/KLy1FZZ3SML1rfcZOhqSJ0QNBpPY6z1QJKK9NnPdSPpJE/nCaRgksvejqSTbEHVNa4mI1ZJ
VonmL2eMBQqO4HgxcMqx64ocRWz1KaqZPS0tmnaPiYRSPezNA6GNt9uMvP3r9J05x/5pR+iq5cQO
LUZK9Qn/KB1UDpIr+eeP7Y6nQxVFTKjoo3LC34qGkRlzklMy+0AV1GDnNSeQg9gnDUuEJLkzCpQm
dlheOmx8Tro1vra45xmLWemi7kHrZbypKp+Gx9umr74jFvNRs77p1vFU7CUja5FSI4vDf/O3LsVr
IL9o7cJpVTE5H50JZesQDE0DaPEU12rzIi9mqBcnhsiioDY/Su9Q2/u3+62yNQyw6beddc1G8Jbm
1LGjbaj/qUCCICOjZoRedZNSURI6C0qMZhafGKXLoQv/x/8HEW+ojs5qW4vGqavAFFLBXXSz4G1X
3ptZNyYXmxqc1gObmOfJcumxMNWdat9jfuxlxRcrA7lSpdxV4mb5UZtP5MNjrm43nFONZbCAQx8c
kjYSu2bsxWF4Z91HWlOUKSAHfU0Im4gXdI9N2Ae0xhR6ZUWNDYnzEvKFkWFjrmdfptDIpInBICNj
zBlgKAPLELC2M6RZfmfWuzfEIK3oaEmhmNiMh1jwd0fPgFzMejP0kyCiMLze8I/uBMxUghOX6sQT
AyRFj0ckWfvE6XWIJ+AMgm5vtBTHjlUYQxtbyrESemIxgqDWSTK5Cn+h4Xe3xEQN/QE1Ay/a+oAn
a9S65riunW8vHHuU2wbOzr3VHTVJ3+zL2kLyKAHwZUtabO3TPb4YDlO++/4gXUMJjFqw6nH3Fxjp
tX3j9zRnaexuOy9Tx7CXVQsYBZ6JLudOLZw0lL9n3HpdudyhSBeh4EFZEhPwKy/sCdQC2QcE9iCo
qRWsIrEKfTclCjicruSyuDoVlSiJVMdfSmgtREvWQrwc1RpWyj6xTuFQbE92vGCF82Pi9YvWPUt2
N6mM2Vmnr+1wOiQwqHyw8RsQ5U5Wl9H7wkH2W2TJLQsWMy64rdjQk2/iMttW1akTZ0xF8Bn0Dzp7
UNewyr8cbvxAlSULGOAjsz3lUsDNjr1oAxQK3vT+JNqEyNa/k85BPt1gotk3fDm8WrGv31qtE1/y
LJXe8gI46nY3PmpVm5VEJApcmvwfqyjDx55qt9rwae09Vcq8G6r68BkztbGBVxMLNr4JJkjjAHc3
FrKL7M7KVcqOuV19lXIIiJbg8VJL14KEj+xeEpOW/mLL3BaIBT1c2pbpQtFSS0cXKzBuj1MUgcku
PTB5g4k3ndUUtIEHnvI3SQGxycfFb7yPg4a7U9ScPRrqUk82wQ19rHFY+T5TydaoxhHUhcX6I4Uf
QP7tZkLFrDa3rtSK4WvGtM5IkKdRNy8f8aTHJneLEcEgYrvJ9vSMNP6eIlLpYgMfofLLdl851p8Q
Rz438SIA85V9OYPD3BcTb0jW2SMzghMO9iNb/p8SGRfoaMDq3eHyXA1Z5WSjUC0wNh9fiP4IVnAd
c3+swWE6elcwXl+KxmBvz+wAURS0YWNnZCtkb5dSp+OERGcekGyYdgpNWnmipdD4cU68j+77xfeh
CoSKJoOnJjgQI5/P9Qliox7fbynk8VK8k4wf+MBgZIFWK5LFwHYvbeSyzoa5CaKW5aSPX1wCWV2x
znntQcgLB/NzjJn8MuqQS2be7h0j4jn5MVLnwaT135ed5LF158BrjGSPfq7iecEZKs7s58SNijKP
6jBWqbPJU/4vYwPLR+hM87RR7N5ZVzeAdzcsfZlzpBOV7PJKplfFCbbUKt2mHSPKsyFO4gqvZ1V+
5kRP2Y+AebdR+xJoWRGbaK5pJEct8rAUjswBx/3WXs/FygeJfzajwakPiAciAyXe/AKMo6Ih7J5Q
cX8/TV2WwyF2DrDGMrCwIAavAAvYo+dx9jYPB+qE5T8h/pGpocHxeppxbj350nHNYlER+bXTmVd0
w/IeNNyculF3PygB+jqA7LldySeRRQVZ1gbEjHr5g/vdiRtQJy+yL0bNpjn8GZRavtJer8Lf8zfU
bA/YEHALbYaKIxXYn+RcSg4MO3ZvSRsmoio8iHDTwhnJptSBKy07thOPdgYBpS49MzvWnoW5wPFh
JQoZUskZADQPZAU/2+yjBkOou+brZdsASH+TGwc2arFWAPDWV7kqTisIadSAUCVd2ivE7Jb3PJwQ
PHTbCLxu8+V7d3LHm+tXFP872I852RX6zd+tEYFr8HVhS11AS3/fm9Z9KqhlV+8Tbn9iV23QWeAG
Nj54dRsT80Y6E62wPIz45NvV/iJli51yU18weXmqq4V8GBR5P50o77El0rmejlw1s6rzz/X8c8//
FZdOP3ym1VNNKGQlhSMeXaDlsrF/1AsbtbjloScUI2P0yZFRzgXzBvRRLP9XyFT2jw8efIYHnvZU
fEK7tCT+jMyiooDCr1oTLQo76spM2XzKu+ld8CAhsdxkNnAf4PVsUXubk0PuhYzwMjrlXtGtZFWY
baymvH3h2Qd7z2Fj2GEmxy9XTid9m22XSTYpV3t+PkV6R/kq8GPy4S928ZIGpKDLkbe/R/NUDtKf
TflcGAxguwVoiYklLJ5sYxP+oUNGyjwDTUCvTbn3n+6kaI4jPzk6/KEPQhZFCTTGIawvsh5ki9bK
sS6PkXNvo0XNVwNAhGXN0DayII63HkKvtHw6FfWeabHELev1UW8hW+m8EBQX+H/98Hz+FueLaKHK
Uu/bCsv0PWzIf6aWzWKYhWdlrd/+bHdtPcA3+cOV7bZ9uoixeRaONBto782Mqjtbnkt32LGmXR8/
e1y+SBdW2XSobGNc+m3CUjkbH4n2+pRev+XsJo7LhUnkx5igqfUmygdN5J4jofqk394ebDRAQ+2g
u1ZZsrAvljVdE0X2+rlElU+VMQ8FmVsBjIw7xfa3UBIBrCJA1CT/DbGf4nmk9CXS9CLQlmxBdPB8
fOLKuBrnrDQr8KesykJe6kViXi/r8ifwBF/OP2NQqgqUFCpcxdn8r2A8HCUhmTTwSkvwnWy0zqIi
iUJUJQ16auiFd3HO3KlCbf3NE6S/lFL0iiVNe5mc6nzQ+EGWkmh21YP7jREOxMR1CXPHyadPwf5Z
f8pUFEK3u6d3qmZOSc4/bczPSN5iKoCnyQmc47uy0yRAGL/NUOefkTnv/rgi3fdDtkEWr5LesWu+
wC026TEDf46S2l/y2AjP8Itgf4/Y6bkGlcnaLKvBlJP01jZfq6Jx95+pcvAhDLrH8Bv/L5L7S+oQ
7P2bfuZGKF3o+roVtOuYcjKgnxQfHDKrv0/dZjpfbkMKKujpAPepinpG6m3nXXUcwFKmZ9Y/i9Ii
UJoj5STgc2nSMwEw5zp84kNU0UPOq4KhqcWBsE7T9KMA8N7vi3fq6oe0YcIBscM3IP+wjC0V9Y3o
12/Y4tmEkmnCHJSNFNCxF7p4ZoRYZeeQkJ7YZ24T957uexBtA8RZpfUxW9U5anHWAZvm3Tw6cHhP
8GWa+2Xur3rJewiVEwbYaZYh1nu8H6otfbJCMttn9Lr6aR6PVJ5kj9nflqpxIgmNNAN2toe2F7e3
Bnnqj6N7b54zETrTMDdx+nkpmneUJDhdX5q3y4lQrL6l/bD2JJ76Aqp96xVZmkaYRT/7yjJJvduK
ljN7tONEf5425OgYiVrCOdeAEMHgTrUkJMW1AxQo+y2bdijgkUUH2QNmkYquCgxKqO0Ickrv+Qdz
xYa+yqpk73lVReuoAXD6xIswr94opMKqrwNI3dGqSCw7WukfyrghMo9wa29Tlt5Q8Ue29ITBCKpk
Np3tgQUltMjOmcWvVHXt3p15/WQzGcqpioOEKSXz8/0+hvqxb9WhbRPGvtJfBd6PCS31xzWsVz6K
o48rbRaCe219ue9vQKNnPur2Ay47gM0KZEynsW2LT+F4n8+SUyu9WJZKjbZeClUBZYEPyKWIWOZv
RoPWo5B7LlDzx+JiVuX+fySesTThckcL/8+brY74OLObZZRxYUiXanGBH26OjLGS/m/kDtbCK8RZ
2TkkV3dpKTtQCoangT/FKbX+QgsCyMhuHZOA/e8XgTt0lF4jbhgqCXYbaMwo/bqA3jai0yKsEqHt
VV7lFDYKmu89owxkA4E6A45HybXVqxXFoeqg3ygvSXBejKxfGDw2Qk1Wdlw3tDD9CCW/Jhc2rWYX
fSzSLjro0PgmFg4uwqqA3DT884t1j5kKsNyq2cmhZD/s8c/RAcDs4U6Fxcd/WSoKKa0DxQ6VEash
yI56rhaxrK4jXQy1FZ9++wwqn0IU7RDGHPHsa/ydKLaEwNellKmvGyeLwZ9exCyuidgTW9Pv9Yx3
yT7ZPA3cKebNwoJRYmsQiIXawFYSeJqhKB2k5oLEtzAadFbUcyOlVxrFCLlq7lXWJTB4yubLirrd
cJu6iwlOVJqqNigAyMF7S7LiDw5k8KvDre431mvbxGs6NQ/b7MnGqfGVv0C5yX0Nk0jwcNIDVfAA
K9gtJisOqXlUD1RkrxDIY3/woyHV1pV8BySRbkB4n+P93LRbTQND5WgUtaH7zllB6YdKBG1pVu7f
CUPZsiOdcsZzU+5r7wj5DkMpmibx2qeSiDQbLv7lb5qTmFJSIoBn0EZlCmE5YMjB+XTEAmYb4Qe9
qjicJIoH1fd7SLc7IGc+zdFEcsPUcg67EU9Q5jsj/o35EAOdKq888dFA39aiNZkGgIqS6aEIEVQ5
U+OM+Fe84EIMcDQGB87j9t6qGwCuAIJj0B7JXMCW+dHBUI//wOGb8s95h4w0D7WoRm4FuAZI2rHR
qwMTzVST8l67EKfnaPQviFyqY/IEaOwHoF2PCgOmfCHCjCgn1jF58e+CdHCxl5MHIoThf5DIY4wD
on7OYBdzsiEYwy9Qw4vWC1/XTIvZJgNbnvhD0K/y9XrjQrtyZZ9CA28uq93cFlWTXRxr04a8RMZ2
YOBEtUnjg2wz/nBK2BwjRXzMryyE0gM+QiJ9/3z017DKoiFPSZ0ejeVtHOxxGtQk5XCgk8X/6Ppa
AEbdzSDSjlREll9qgYzbQLSMCZOWlL61siCbCBzGa+4zFQdeA1h1BCsd/a2XzJLTNnPHUMCeEVAn
plXFfGT9qDgIrKS0ErUyJUr9GCerUgd6HDWATOQITT628GOHUoWJ1dg9VIb/e7alCL5HrjCknLG6
jLzXs5uEzHQw/6I+DYvMIjCPlA438pwQkJyQncY3Hl9Hstmy0kvQbe336wYbW8jlU8f8JZYdUctG
mUbHfeuTea3+eKP3VvvckuwY6mWp8z3VTzg33WG4oZg4GW2lLwhkBDV1kTP1pdKd35bFEaIH7syi
4X30OKCFNWvE+pMKcJf5I3/xDRzbwLEMpsfArN2ZmfdUFYKNHonZvxZaac7aOBsnWNQM8SzaE2fr
FJjq2vxd81d0eGQ7YZIEEkN52FzFD3yxbz3kPMk9PhH1KSd0ZmvO1LlVLE/95npPmAY+1pL7eHPj
Cq7P5U/vKfbm2QtakdQfnMvJijbjW4+EQUoXZft1EwkWoR1R2ZJNxYu9JqDPBGC6Z4FRpkzz+K6h
1e0k0os6RAhI9KXL3Al8/TuspKm3eOnK1pHb1Wnt2EfTuHq8W6v9AMF2q5lZ80V807/SDDSyzTt0
DCVz4NDQKQJHOrUQq/4molQ8Jsg/0cB603MyJC9ZiAsY3jNrnixZlRDF3x5j4uJSdUqJIVXduCVA
JQcqykvE+yShgNWVl66Un3EumSKapW00EGefeA1reytWVzsLUSZiNF7qtLhDQut1Y43Uz5JbxXtI
HAY8GgHOTjLrEy+5NA7uuMCgO9SUuuyVLndY6sF8vIzgGGYF/T2hMYHP4xUG/AgiKQiP5ehEpQld
KKyj0UqJ/Rh3NuOiugQWkTnyuILjxyO/p06ejQyeLiPM6kdqKPQOymGKgfTT8gtxd3ghs3zI2USQ
18CK8NGaRxAyg3urjgeGtV8eQI8BFymBT/IEZsoQJ5lC0hYB9YVNC1hX/I86TbdUkiQKteqcxCDL
LedpFBn6/5YV5mJ3Cu7GEPCKShOqBlqzrrZ5mGlVUmOADsbnDDjoWrDZxbhwECMsROrioTkXWS6d
ohZTFo0x+hwLa9YnfBzeqVHujATZVndPf1qUvIX6zWR2mKetZ+IQ7rIma3SRp96/aRjVmX9LyWG4
IYVLHG5XRGqvKOwbiDv+7E6rviqv6mPa2AJsEnzJpWqWdha4FZ4HAw1C9yd5VlAD94A5pZUQR47g
usPqfzsEVTmj56uzljKX6gf/K2lkVQzeIpI0NHcCcLT+H7yK1KW/RIgDwybA4D0HL/yksDZVap+Z
6ZuqiKiYlxoIAXLbLnBuGymZ4uCB73fR56ODHx0iHTli8j5DkuE8hmgcj5UeS0OwSu9M510d5F4m
E47XXwAIu6flTdGzLNAvjbMqX7Ed+I4LPbHv+0OEUSQDXakVi7ZQXchVHE6tksdyfLn0oeUVd92X
BX9G+kjZ1qXPs3lpOo+KqByfu/c/9P9kzSQ0GHz2EQmCv3jlW1V9329fOcklTzrUrxk+pNIQpu0h
lJeu0QNlJuEA3b6O0HZaKJBRpfIowATK5eiQmnUBk9ypuFTsau4+TSAMWrTctCI2Km/7btaM5xV8
Xiri9oCKnaThoP+avwg3JVHlkk71YtTYDWxaRxzR7cZ5yXV9EYBPgbW+M5V/F8zYXKsIGXz78cUg
W7ZBew+1A6y3XTNf+Mv0dCkENtFZnMc4JAmzPV8R18JDEFoxy2CCEhUBU37/yoE2UgFrQ+jFfZpp
NR/MYHIgCGoiG8FRr5OuU18uqGkIjlbrqTxfRQWjSNRWg0cFPhXPQQ/meRkqEldvaDaLmhXT3tis
M55jNyXEIOuu09967bIkgj8gjqIeULWMxwvOwu92dgcFPOpvwp0W8mzjfvxS0D2BOqjjLTzcqkkp
/AWIMndE8vag30t6+N0Z0OjLVtewDC1P/cwuVcIllxzp64Z9IZpKgdkz38qQ3Jd5vZtOW65BBMGR
nQ8hcsf4A8YvGTPGpfzKOmVVEJQGCJ5DZnQW/awdYlgMBSVFFieTmSsSeD8qrmwP4DgdN4MWhOaa
3X0a7t1u1+9SNO8m/p58//Y3RNXX7vfq0mEWyZgsidMn20tcvzXkwkAMtQ9SafxetY73BKp++Ls8
6Q7QdGZNfQwX8iol9x8LVYBGiB5jc08j3Y055A+8d3CP/yd6kDGDH9I/MaHbTJupdtl6wnAe2+7O
j4LOjfVXzvs6CEef8aIzyavP9lUC8PlzuxP+Es05pFhf9/K65h5eRmQ3069gTHHsODvrAB6BLT7O
P6jUvpDIsY0+Fzu0SLxc4uMKDycIDDrsTEuOugmSZeRSA8CQ7TB7tnQZWoWl147kMq5qHCmOuPT+
/IDd2UpVAeqSTr8Pbndjre3yhy2kp01s/2RmQHRR6YELP9dfIKUultZ3DAcr7v5rVLsfjukQQfu7
+B2rCsMu+mPO8a+H4nStvEyVRn2zJMRgBa8UiVGemSRX2Ij/RPCzXYjD6UfxxrFK6ijftEEtds/Q
TfhD0+/d/F6mrSUKr2nwrjMKp2/Cyi03b2rrGZLlvG2vi3LzUQCTucAduux8oQU/EcniCIcM+0XF
Prwb02X2yyrDLA0AHd+F35NR30PYWrMN600I7G0DlXugoHRmlaVB1TZVU+b6oJtJUYR55TBQXvny
fyjZQgbI2+PFM0zYl/yyewdBPMIQyTKvq3ttHYKt6du4PtUuS9U7ddmbCErKoXCdWCgdH7mo07dG
k/1px4c7RqJYKQxKZJK/Vsg3E8xkoWmY7m9vcSU/5xEtg7T3zU0vyBSfWy+NM4ulXLyS4feP8sN5
Dn8Tr2F4LUe68319REFh+WGhnSUGpfTnIiWNQUaf5j+nG7UfvzK4kFKtK7+MIeGXw3sZszS9k+m0
Zq3ZYW1AGD3zLPubjstYeAIy0KHFmEaF2Sbrbl6nXY9xRbD1FK1wDWnRAYMdiOKyP+D3yJFC4tnv
RpzDKikiRJhm+KvH8S7beSqEcJGbhg6HKN7tcm9F7nYrFVdrXfLyRWeh117VEi722iO+Ms5L0Rrw
ueGfKQY3SHNkd8z+SEhDG5tl2s5kJyWw4px9DHf6mJgejiegbKxQVvKAyxLElncLCPYInLHV4k5c
G6GxGL/tFi9RzuPeIH1GyD+qarUBl72FXfe5YMhFAqT5lz1Labh1oWpfbMznza7uNVkIRNMvggKL
iigPDd0f/LBb84JWXX9mtImk4HsZRYRlOzO2yf2nPqvdB9eFVI586sNLoc51EhnNUh/up2Q5IE3K
bEYpBDA8tMNXw/GMwHxYdLaa7rQjU0aou0k1IyOmZgWoUcnHOkdYbx/k0IJYmm3dF24Nzsg0d8el
t8jST2t4UwakoJJG8r8UhrYRH1s74RT8Mm+dZHRRixnKtJxkjqPYEXH5GLnhOH5YH8Rr64Kdn0UA
UQipTsasjViErhWNWX3rYXo22j/mvi0BY+kJ43Zgs+syC8HESnbl2A6n4aJk6tqcWJWIGTpB3/JL
mcIdOy3SA9fcgWYfkYPtZCIVAwGY4N64PpQmWf7f1h/sCE7NCLxkARM9ju4qT40/4QuxxGHhVlSF
3BlINhYjaxjOyIhIKp7ZqaxiBKC7DDB7JAswhZjLG3aaYCUxcW4rrgdR+ZSVy5js5VLRnrxNBrfN
GnhJ/xQu+yysuk0KidM7ksX1ccuP6WryjZzGMkAUcYtJTHc8y3P2myGv/v8jotgAf1AQ9/3uCiAo
IQA1Q3yidw5mlOa+eXDSeTx0vjaJCTPLBJchLwsgdSAnWpDkCfsqtOL2vCMiNF1mW0w2gBAXS0KT
wYQwyDrCFFDHgiCSLk5PWDp3IImwcu5UJw9K1ENaHfIvY/b30OWBVmNMX5rFpNfQOoH91whP/ucE
KCB/0l7x9JK5qq/42hOeA8rrLdbpz9HxQ7pEIWuvYjOSzMc1zEMIN7h33K5xQrlU1bu5BPuBPPL1
GZBxrXyVLPwhb4efRVALo7ORPCGQsvLMebLrEBbcLSou4gS79llDf6pCPjnQAvR4QvlRf3+pfe5h
XGPpYp2FE/axW+2La7yIg9kN03mM4DwZH19hoRBuBP4/GRL6YCkFnd4Q13R1jiiOGxGZ2DtrKUA1
LwcIeiyy3H4CAwkj+79auqH0O7IriYzxja7xFc1JDlu9gS/Lr0Ja7ISPUMBXCm9J8oOi3ATxwg2z
iO/K1QbuEk/vQFDdr+EnuIB8NLspJ1KWpdU0Ej9u3bfrA1Njb6f3rX8mZsyaTMK4tYIIMpNgw63k
nJanqm+/QuUncASvWJ80ihpyIXWWv2ibGXzS9rhi42C2BNRSV6xv5iFCQtqDq3SwEP9leZmVxJbB
Ssv9vMxL1rfdI/DOeojDHW+fQ52sfciapZ1IaldChcPXMs3AJinH4XoDC2EQRX3wN6dj9K/J4mv0
fP0jn6Woz9n0qsxEOYlGa+fMeBFg4FwDVgplqncNm7dkNG9fAECvK4GqmvmgeT2nL4JtA5fx4dh0
WAfvNOlTixM9fVCxHmo01BX5K9NsgnSQoTt+K2DmxV6OtlzE4Mv6Adzlxm5qBWPm7MIEu9WAcrIC
r6QOz2ifhF6ZQryt6z0Toz9NYgKLubKV23h2JN8mHvoZqS9mTsSms4fcysxLy3JKdkF8H7usWn3D
dp1YQasSWeKzezG6FcJVBxvpnawXNTYC09xjNpNMOYgrMdSbMpNyCtFiGWwsXiG4Yd0RZifU3OyZ
cHyIjFjzP8A5BPU8gVilq9io8fimyOe5WDYz6wnz4vy4qJWuY/xiW3j+aLW5wSQoZcx3wpNITubJ
PfWCd5ATpCRYUG+vqIYMxRswY+zXABNC3dC/P5lq+J/GigeVj+o3AlOYU+rsIGbmsKlLTA/TR7z7
V3MzJUcvBHM2bhdhzvVp+WtZ/YLX1Td2r0U+3oaz1hYXSgSjYTFJITaUkroPflXIYt7xYtIGwk4I
Kd2RU+c1LYN2t0rJFc3zyothlEc4H/BMe3ZKdm7gZKfBhSsj2fgvoOuWFKS2oGABcgs0cCvYvoOT
/+VAxPSpSy423PtMd0/qXvkO0m0dPSUlKs+fvXuJbHfQM+ykvg5RVBpDyqDGgAKHdeQKa4mzAAJd
HNCqBB8vTCwR9ZhJkSebFn2/jQ1KTKEJTqOw7QAZwkJaRMAoCrYLeRMvfZQr/1kj28W2rf7uIwOf
uS9+9ZNbcsQ9T5je739TMadjqao+OWRuixMxufTf9ckz5VjM+WdTl4UV0sOH81IoIOwIUnV6aS6Z
GQ4jmIMgpwKhudbw8FKgriJMzcFmOv2LDz17AqLYj/NXupSgY5QmIXol+G39MCpcmPZgpGeYxaNg
d+vVwvsclcZTCUCeizAZGK2w2I47h5lWl2nAWF6g119bVkwBplFpxINLNZY0beY7MIqDwZHaec77
zrmGSgQnHXE/mhvV2CWELzc8zOUk4qEsRvunDIyThmeXd/KTXdUTbJKs68lcOlcukzsxfr5iYoZr
eBv9yCORnahd6YZi7pMovnKOPZoWf+U7PPF3sfXLMGSiR9xp8G4mD1mzxsLeB+S5H+heC8j7BjBx
CIf9C4l+stiXVyOFVfPmQmarbNBW8QzljqoJ2PR3iZRXYSv0PXz8BET49B8jWxtQlu6seCy89ZyP
ZB8qOonrkmN41V0UY/IFKSc0U0//qlcCUsX4jfG4eKbnF7evU7eDvyU2AwZEl2R+GBCA8XZHRY0i
eIlF5/EGIsUy+XdAW0RkI7nQqdKGBvSTebBx0thhe9YrfBfabdSeZUYYBcx6FObBGf9KPaHAgJ6o
ii8MXGVSu4xOg4n4sc8g9dRnUf+TOlhOrz3vdAgRg+5zSDGa6acV1RfZzA18DNZ7xYUe67fANk50
3F/RgkPQGSkp1P3KUQWGx7KzKR4QSQv6yUPYtf96FX0m5CKC19YNraaFFZ1M/pmyAIXuZpBzjNDV
YgSmKRYUCbUCDfVhbtjZQE3dVjNZgCRSSuE1Yrnz1tvkYf6zp/VhVVD7R41kAJbVjjnNCxVdEQTE
satICZWhe4bpi9oQAmz6AdoGSqpAFF66n7/DhUkR3bJ1tq8lNF5NgGSx+9dx7zb8CdEx2Dxrj5sQ
lTCD58MtviVSnF44ephVHYbsJt/ixP6THrcPb+SXHx66nsk8LY7TVWUanLRHa4BWZh93HwAyomzR
STLKIdMEPo9XcOuFnKOdEj9ibjsHSKyVvakhpWtoJGhVGnwpCgz7KihM81VxU1kGDbZCtwV0tjLL
7Ooc3xMNAo3hEB8F0UdWEi+NMQUconRe6yjl3cpfHxbk8X92tNO2+zSohQlKCxEqB6HH10VSuYAs
4YmQhkQZsGZFka6C/DYCTAWL0UX5C5hEHK8YTABYMizubvmqNisDqu4IXGI/mBilsgusHTzC4AaH
wVm04G8apf+Aq7Up9wqx/RBlcsJi1XicfWRsHKD6DPSvh1fzP5R2bYEkDQWR5opv/xB4fJVHYehY
1i9XoO0/ldrOUw+2OFnlVyE5NZFdw+9ooR4vjjwG2Jf2Io/HEoox3clDNyMpD2JYY27ZygVXMHmn
sVbgCbIIbnDKi9e6m1emLGhuHYyz6w58pmWu9+0PUybnOiys8NqP7doxjtyIlAaLcRoUm/0b0ln2
PmATm3yc1IOMImmpVltaDC8j0ka0fB01eBJayl4/Au7Ybd9GGyff94JMgqYYDPwxAeUjw3e/U64Q
96jSfx28zcBJL8Lw5h3g6AAx4fFanq8XZK0AapVPDhdwxnBHmvgxC4d7oByJ0Dm2qrYoaOX+SQlJ
VgxIhsCm4GOH1SZzbfMuDr4c4KimnLejk79TydJ9AISTDITFTS+wKu3GbRieuUMgg2bfxGbb8l0+
fHM6VDO+54dw8Kh0xfhpLDDpqkjSFmRt8ua4RyQsVeKQP2wmva3IR8Om5tvBRkCMdm/0Pw6eAjAf
0kHarEfIQaopYIYIk/gm1X8cWRTGleF9o7H1Il13u0p8/IetLokPjB0GeGZU6nThVwUMJHpvhc3f
ma2vIaebDmPJyJonTuvvw7xJVHoYb2GNnyv64M2Idy5irDcO0WIpdj5sdemZ+H6JicjmvbbqAV0/
XDpDx9Fi+o7LG+enaUYM+i4ec6jznnQPumWjv/tqrN+hvcQWxmir8ocbrjlZpo3PTTHYVQGzV0zU
zi8AcpejWaFAKZFco8LqS8Q1pc95jMR9YgE6ibZpUTh4LVrbtYwLeaixqR/Xy8IB7SxWxEud4ghR
bdo+aZrDJUDSvxyq7W9RUQFBWaJjED9JPv5J5q7qfHQ8xfTElonRXoaeFX3pVYe+ONM6SEmmQVOe
jofzsFvz3e/AKr7OmyHGfgwr9Kus+vcSAV8dj7VxwfZAyJXY/Pot73g2kPQJIrQ9RoGSp2uxAr/7
eOmpoSDbM1M8xcsD4S/7NKvv2bQ0IqcSLdRHb3BaZRaEllOQ7vu7uQ37I9Fo7j3/3pNt0LXFgneV
9Ko3MHEcUPgDecz+AqNNukwYQHh/7uybqpn4wbA2d8k9giwvk0GyNCQaUIzj7x8YvwfuYyCDWUgb
d2UeGweYJTfibT0KICB3V7Yb+tb7p+X4gqcxfouyiKEDLelb7Si9/RaI3qwaY62OZUW2x945wtF+
3AU/1uTMAtaxIhjJvRn3XYINsx9Lcu4OTt76NwRyRr6gKwLZZE/+wf3TWowTt9DAmwCTu+Sl8kDz
eWGnpYM6sFtPBxJRV4m9USCeHc045CNb+MNX6Y8WVplSrrxt1qn+hb7Iuo6frTWXWMhd/T7q0BjZ
jRi3Uho6CnT0QhYmuIN1nAfGChyJanKo+mX8Oypxi2oHgwcfq4X5Jyt3RcqK0dk20HU4RQvKdVxp
ml1s8esE7RTBSfH5wOwKb9dut08hui+DA69TBqORDzSXlyJgnYZ+vesmX9adLW4zSpZW1Wuk6hXs
uIWnXVGBxugvpEdwgoq4/dGdf3c58d2p2Qb5hdanFmlDGiGqBp2lQ3D/FsfHWuWYki7//qdm4P3P
ftRYk+Dtx1JJoXc+cYcyLynsahFbTGYYnbILc+zGDNnKjY8I4VsKlOG1sYR+cbcrAeLJvvmEYJZm
ON9BbRXY6VxvC5JCuzUa9u40DL4qczIWCVu5DqYYcEtva1tsRR6aD9yy6b3YwqCiOmoTxNQSu7kp
m3v2/gx70yxWLqPSr5/WJSovUaduvEnSxYZelK7ejn2HkeiiaicotmGh0WNYjY/23iuCIZ/Mc8Vv
ohM25lfXZ356HCLJTaNe0SYzt2pnJHwU/KFRfWgmX7BAjh44Hrn7k+VmCm2uHyW3qB3zUK+fJW0/
q/hSIVQIqVNgxaTCEFNggLNfAsa8gGmt3iDjkIgogOEkgqH+M8m/HyiT+1Je2oFEfEVU9b5yEeTy
YZ7tPKRCiI8jeNNrwYf7dPiRfWnu77jaUFA1EyBy98TUxHTvmBI+0s8S+jDW8WxeRi5Bia4YJEVl
D8oBNFYXe+k2Ka5DGNxdUYHvT+2JID/QQQ6Qv+AqWRvDwAqZMVzLKjH/TsQ3ipdoZviLlKZ4a02l
sYUEq0fzYF/vRhj6XmHmcA5Z27eXvp5J8QXq9r/n3HYfLA3jtr3n7HA7PcTURG6fTXFRMcgtViaF
mc2OXA+0oMrkWF7ep53uv0JCfGMAIL6dFUu9dKIxwD6PWTOMSM7LZnawNqN7UgvL44NI2RpnG4KM
T+JYX+MHpwCjZI8xD9X9QSuNiRKjUC/P90viACnuPManWWTUZjJFH6K6GEwQFGMot/9/0ihRWAb/
/vzaoPYPJrm/whNqpeyZKqqHsIwKlUziBZSjma1jEOMUlaVaZ7KViI9RRjDgO/Cme6FWK4FLLc83
KmC+fj4JGPsxU4HkrhDk2mj5QLse9kOJOWtiVMTUuqK6Unt8Y+qZaJ67XUb+rieSr0Xn02qANSIf
6Bc8YC9Amjb3HEotN9peADXFDZoysq8HsjV13jdNrIbwysAfcm05qER/ryCXeHESRdMNt3cvLf/F
Cj9QG/0wOGiXgbKaK+U1yEQYcoT7AXCdpNZC58DwZiPX2Govjxi1u6AqWewt+Moio2C0WWPPWHqm
xmxVw9TpX2cIo35Qg6cSw1HA12Fdf1yoBFudv6HZHGGMYocgEA3uT89TDM5h2/ekcQ3ce8agwB5s
QRqlRdrQfc9YJ2PJy6I0XwCo3bSXitLWRdSpf9Z30SsUY52Qoait551wRKUgE7epdDumkxXXuYWW
U+tiPjKwD5OyjuF1n6wQ4Y/2qzn7aiaHc9WaelgR/R0n9XPbfHzsLGxDc7zjSHI/6G7vWQziGToV
szwvaFN0YTffk8LpZUEg+HJe+f5c0buxSNJlhNjtmk7slAIreosOxaHCwVSpxcW/pTYlJCJ0XAGk
UOBauthQ8uCNQM09qvNCU7hfH74ufqcO9WDkLw1ncJc0U56xt2lcCfCaj0cI3PyuQwKPtU04p4Fl
lMfDxCAQEuyxC1a3EaLa2sE+pEkYSgOXpv25RUuujj4WXsjxcQesBVm1q6mpNW0N2aZ4naN60JC8
ltepst4ru2AMv17F9HJGkqLoafdFC5hvVlcIFQfWtCfnnwR2PhKR7fTIo8oO7ICjiQ8U8p8sIjfu
xWSsEE/736eRrCrTkxNIKrFUjPt9hVNngHtgYqDLAQOkae1beya8t22wvOzIvQR5CMle6DauLWFA
S/1PvUdlSHUjK2bwMt0r4hHre20ylNfFUTG6oNHuz9K55AP4VAR1e5IOr/Pdp3SBBbrOT6FIwMbr
OUqX3UuCgdg2AY5sl9c+0UaKDCWQ5p47jQ83Jrm4O89PlycvxJavbVYLtx19vLV1SNZK/UO6aJsc
G/yGYm6U/GugDiuWY9z5xmXfbNe+en/DlAXH0TZR1jmLUdtfiu7cmPNGm2M/uNba2dkhwriDA6o+
uWP/y592lR4rdOh/GCCKNjRGTmhCEwLjOciucaNxvbfZm/OvWGW0BMEZyLrHS67Kpf68wTFw7Bsm
YHjaxRtDdz53xg4vd0siBZxS57uJEQ5Y/xXbRtfTuQMjXCs3+tQjvZhwEgNBBSrpSHnSksTennWu
Z5qu5MNP87bWtXOA4RJCvb0bf45sLKskDgUhtd8MT0JRGRKesvfyW2ytH9vVmbB5u9iIrbjG9eml
uTcAjanzACwk+9flbEaWRdMwBpKqypjHWZrW1ntM0OoxGrF2ymFpkz6KzJtEwkVNzJTjVnnBrpcu
9zIB4Otfhzq61Jgs8d94bD7BW/HO031ItO5Kl/pta4eoHedlvBiHq3uu/LhL2t3SI+74Y1XpUIzf
7wKr47PZkRIXKIxbXmPnh5qyx+AA+EJ+au96/TJfoIUwvrYWY+K93Z/SYtKcv3oVWod9S4MdEoOz
M9kpdvLxFJVWh1DdPbSVCjw1mHrB083uZqTUpEJnjA0ACDXnuvGTiE3983pZjRRCL9rKfRUriHRO
RR+OFwKZzktOd5c5JO/7TnManvdrlNlawd+/nwZYRX4JH5z9Ju8NSelFMKliaOPl5IXIMS8+AwQs
dHDGnPQNUxSxbr94qThnJb3WZg3XiPodRzk5uK0ulUgibWKP7Kbo4y3c1ytHcu8smzH7WFa0wi2o
ZWxDczPWtxKwXSdCZV51CTNKXOLujFZnD7iAQ3q60ottunK50EPSQKXXEbur2UvajVWySB2QmQD3
c6VAyLmv8n18KFIIK3FA8U324KqnTjlXtyq8MsRJNV6g2yey394csI32zNHwQ+EDA2l900zusJkY
AZx15i52xVSfbGXiNMxWCADl0pKRjFga4HYzuF5ys7dgMbPW4sC6cNyEgG1Ff1afCQpViPUYNw6H
lWFTH+/Ob6NsQu/lbst3abTTLkdC9vX/cihlIQfEoat2drqEILFsR63lO8aeLv1P3UDXvDQS2876
673UxGAWHO4/at5E+YJmN9DSgxxhog/pPSDmkujPFPg8jv/5gFkhqaTP9KwYKsmQS3w2+5jllF5m
cwx+i/wIHvMcP9eNR7n+i8aiLLhNzbQq3CU4TW14SsKSkFgSzn3u0DKtMK9DMIuu+hfgopQG923F
cxWe42/DirUCamzQT7RNity4qVlDiM/9OMxBXoZX6Iuig3RXwwEx9ZacdZ4WGjX5LXB1SZi663dY
lH/dVJDk0r+VvCXHFyxx2PbNNk6JGYz1b/h4WFhlesxmxGSBb4Y7Tgo1Aw7NHgWTkA9t4FqCONe/
Ic1zumHsyoCDMzdyqaKASxyOH/tf8ZmY3H1p/ZH8xjux9LxJqdW+ACt/BeuNTW7DEM7GyGGb9DFq
pFBcOmaaxo8QagTxlvEOjTyvZV/AeD6utNIvnNGjxBwT1+mJSUAa2LztVFsMaoAR9IaKoBG6pCke
9xicdxqwdQ5HVWMu92yL77+Qd5hjcBrWDpn9POc7861L/I/1wVUp5uzn+jAV1QA1OKuD0b3pWPFO
GZf1DnvB4g3ZjMjF7lEE/Oae5hm4Aq6HLYSqWYjwr84i/mkWGYdSfQAmHMOucRNJyZUxawho5VHV
0HFxKB8y6oDinIvqo0oKcgvpXHvtjGqMBVvekoZKB+VuqBhE89IK2xARX3GyH7jQtuj/5v/+o2Ls
UQ/49vhqnl1Tto/rExiBR2eKZQX0MhYVi1dvXOY2qiDAvsSaUNQIgJw40sL8npgrPFbntp83NIlq
ivh7Qok7XZ31OBd9eyWhVkRdva7ZusfZ/TTkL3faiXwmHru5DGrWfRZY0JwiR0gyfsu38kHF9KLE
B+F3HstApEWYXII4ZMo8qXcEKT4teqLNzu40iVZypHBg9Eg5UqokSJCOm2qPY5BkpKviqesnJOX4
WCpO6WLLspP/BaJzx0z/NFyM//zR8tce2nLyz3+ElQzpODHhEn4KTG+da6r2CMbPXaYK6CyRA8Hp
r6IvckiNSVdMdNyKFJauxWeAzL4txVg3ss29mtiYJEzwE3NF9eS1bkeULV4AEEd5tiVLhD/wld/S
vay8x/nJ1/KLQNxUOLnioCFiD5gH3DjcTELab1ebOBZFbn7ZhdcbLlBFjwiWDI9ApYVXAfFGnOjF
hGGsdUnvcuhdyfYz8pCwdrVTAoIva0WViQGZtB5/cXSLmqpXNYE/hIJMKpKiyOJfRp6sgfVeikSJ
oBUd14ZpplJPFYOJiQfStDNO5VJN81bdT96NOxND3OlCsMXhm3wqhptLA/+jF1joZcP2kEHW/ekb
mpaZhXKVsl4n018Zh+BA8BuiWYKCcrQMyc2FVbSn7iIXlK3ABRcBF6uqhgJZCWNkC8X8cvTABEQC
R3wZkxd4/qCBmX6dHTb98l7NbNoaTOchD/3Tko8vl9jIM1nFBSDd7r1FMPxvZ1BMDWmICYJf3G8r
mr5nKdUBTNLAKejVQIrhEPQTtRLxhjd21kaBzSq8HKUA2UD41Bv76gRQ6Y9sOz3SDuHuxjZ4OFgX
/2MkgvIAn61uXBsZ+ltkw67u11O7HXxQ0nak0IfGzauVUWPlh7WA9DttYYDwalR1K7AjjgvrTt10
VlH4pCbIbyUNgzdO+jZMKEYjrusyJkVpC0FIX4ct8bAyLchiyAAHW7CUJmaUg/hpQRb4+uT5teoC
LLkMHd2kQ8EbJmbyftlVR9w468+OfU1cyAHdKv4zvkIYi1cqgFRETqzNPdJZ1N6PDwUqFXKs+pNx
QZYtYlYapIh05crY3R6ZPohaobFzSSDaS9jwqDZAsKzDshCJG15tFDHedTTgutm+iaFNl3Z8Um7T
mN4Z0kbN2OwSclX5wJDVkhOMCKnt367s0wP9+Opw8n9jYQ9B5BeoOnjUpNbI7VYHW1ZnJjeXwXmY
F27uRxtJ6PBH4ZYD9YwXmuSSjeE1UyRtKM09F0iUq5b6F2ISbjnn5bLtGl/WTLNYzAOcFg3BLnNS
a6ASEUjPen5BHGhEG7Y5gw+51rWhc4MGhWz07DOWQRY6TO3XS/8M7+Sd+vpPIKQUUgoDrz3rpOhD
9e3KMRP4H/v0tNXHEfi0PYIkuVwS6GVfVWNcdSg+fNSLLlNNPgtF7JGqTPfNv0ffGd/Fq1UeGRqi
x1LKHiS4fuXKkGp0ItgYSgM1WL+KrKltVcUu+KBAqDhFHH8BfaKizJtU6it+Bu312y6MOnqVbhyr
2V80iY/Ae+/wYiyDQEgHXMGnpfRdOn4rz/2GmC7DZnsGwWNpMrZKOE749UqSeemAMY7iHklyZ9Lx
3OGEu1DEkbXr1yv4kHnt8pAuB+Qs6cdPbrKT6iAhiKeEOzv4Wf41T78ey1i30pbGtYghKthZvHZc
+gdLF0FjszrSXGUPm2/vm7V/7Que7OlVhcRYqfsrLNG8usds8uhOxvGiPdgXQxeigm4n9zdszMhJ
/tYZNizYENQ4FpBEu6wRRRyXjmfvmVJrOkuW08d0eEcIXjbtAiPPssfSkn9zyhLEyEPZPW0zzVf8
NdsVmaCeapq9jTJ4j58xTCtf85lTHQglC/A29Zr4cSIPAhPP1KMBkwIyx6/TwqPEd8c+dU9rQ8EM
qO1Ke6vsg9xFRVgtQRTehVSG2di83BlnNkJJiAKHZ/l7M/wrofA/bmBn7FZxSjjwhpUMn+YcPfAs
hKZ9q8fuGgxuOQz0sJyEDVjvGiMvryi1K9ufl8heUbtI/DRQCzhgMScoBazqXA0yZkEzsciEOgW1
QUT/wF6/PApA7rAs5pVOFCKPbVRH45gpplHIeHkq2Im+lt0W437HbtuAV1CsaL7KG73O04Ip7Ici
iXZTuGV7oVF3VLueiHJsIiJ5bYKELRxsEunsjBKyj67PYiPluVTkplJfOCwA1RibjUlgRZCrlX7M
wlzvt+tp4fdgG2LGlIkTG+qVnuurZ7rJVHbBO2cnjfApkssSpf4V+css12Zcu/HuaqlHbvIVm80Y
7FuzK5FrD7BQLYYGNdKRombP1kpB+FAdiybK3IZgDZzW867mrR5u6Ww/NLtBYUwIo+y2przAViT6
FhqoBgarb4E4U14RFdCnkTU3fp6j6DUx5gyv/nWtVamABggEu2xSh8Hqc5AHl5JE8CqX8Mp/eRGO
Hh1AB+QatlGZu6cb3wRdin/prLyQKguK+U21uN8CAcYSjNS11K4XHc/lFpi/9QfJh+8dHsrRLirW
CjEj5LbaVu14ijPfx+Jd7XA5/9nY03eTp17af/zjWsoGB1MkhBdzl+DBOFchGUjrnU45LVrsCHRl
vu8YYVK3xe9uzsQN2M6aHi7T/IPNM20pDQvP1oQtDp0fa4FGGpw9KoYJK4K+a8w7EIehviDNCAUk
+8CX8tM0d2Oa44+ua8gRIQdDazL1snXMZ+KUfwCxuiHJdCka2FZCINtyjVIf6NwUQ75Wj7QiBd0Z
QfUSMwuvOvVuQ2fa+z2JK2eVT6TQ0ajCLWWqYTyf8e6XRzyJlIiq+Nj0J/B9vxg28Zuzt2wwd9LC
BSRtYOsiGj9ZcEF58cjrMGLR6IR3bSLu2n3sR0fEEw9OxqLcJMB1XeJoFOdU9yZcaSs9cQv5RQft
2n0DNuYYEmHl5hevG1LjDx9oa5YIezhlPNqEyGcDF5ENIe6gC1Ekp/qlgzKVmGbvZdHu7PuNdgR5
NyNutKqIyDemJfcZCp6lJXu+6We9Olka+jm7wYn/uAJN3bLRe2GGyhAcwhmxwLavupICcEcOeCDb
189R2KolUPuN4NtzNb3QMAqqjOLwxNUclqSHBFw0N6pqXLId81wh8Y5qPNs8YUu+pzDvZ21P075w
d6oOummNXMzkrnDUEcUjF7cw4J3rRXLXFdYwC+jGUnqG9HJPthtpRzMm1naTTbzWzzvqB8FDirmL
Cn6k/tKMXGzW7xNxBKefaD42xU4p5SOp17KbWa9EfWaIgF3P4G+pVMfbsf99YG14wYuwxwP1Bqj4
x0CRMjPyqqTqUYFBaZE7JgC9zrnBzsM3Su5AFkGN2cCBPoB8/HUt4YO8JH9V3vJs/YRQxi4rhbdV
owhrhghTrJBlDGjVP+NmIvcB7VxfxwS3GUl3vPDzsohmWMsxdq4/psfTVhJ7xLb9ZYAxVsncTTjT
imKrO7jM4xVB+FRwm3Rv9QA/3EIk5M92PD6xgLJ92fqQEhVZ/jyGHErZP1nTraDjQ9JEyHCO9ED6
ahGmcfAS/4WDqBZUIQEz8uAmqWeOQx1BLnmEq3ApVoMOJCR0a09igBovH0EPXkeMJTFjotetk0h4
WqIBIwtL2x64NdDFj1fvQGBd9ABnRqJddprPgdlOV8yFm2ZOepx2VC0T9nnXGJXR6N67UVRr+tEx
rGaAFxxrgQjgyLBs87vjH2XisYi8Lq+shhxsk2pLKkkH4z3iW/n7x1K11gJ38TuDyfqko8q1JVsX
nqErZ1MlKwPW/1TqCHOKl2LUBzyhGm514ntT7eehJfre2SWzu8+bldL1aThE4oVU9rESLyQCdjC1
M8Nq1nq8XHLNNu3nnWDt9Avhl1zuBOtqC7tcSWyMu2zp98cLXja6U6jgfv6H177GOLq3YV+JUaUI
VLvFMjyxClZn1sI5feiUUjhE2JMfQUI3mzb2+wDpd5LO+CbdoLE3U0D6BMfMSaUTt23uNWO16oht
eYeVFLvd7VsoIqAOLXddFMRKS13sq9ete5jVWSV85ngPGpyi9blzBkYxhhWIQJWhSVg1A1RAaflk
yp0azuc1XuBYis9Ekt1mimULUUSyNRZ+2biPS34HhY33TM0iipH8PgJqyjRR1iY4Icqy6u8T3L80
Qpom4EWy9orJX1cjix+FA5EAow0UvLuZaaGom72sGwzfmNj91z5C8WjOURZ3O1Z7QeuALdKyJ4X9
utJYtyqldnKkXPw+w33SQIPbXdEbagxVzcDFkb0UswTQz+eU0P38Eu0dWdwhyfk1spl6kICv5RhX
RWEEIg54mZW0/ssuCPMQ7oxztdnMbmI2c8H0Qn9S+912ELW7K9pZlSDz/VsFFGWrfNRVPY6d0WHm
MpB8EC5xEveR8dAPIUBt/MtEzdiwAUfWYkze6866j/ziDCmV/XMYKjbWMXCNWHk46h+zkIe2GP/o
zuXEGB+v11LjID+YtfFEf2x5GW3gmlu5y+oh2z8CNHJkAUjQzmNJQfFNZZZG3nXlbi3j1MNxCGP0
4H4ubkoGKkQRq7qHNBZaZJD7tYswrgYZ/KtbI4ldjE7ciNlOxMIr9cUP7JDb6DE4IpqMvqfxi08j
BW0Fy5SKMXbIbLiKYw1AMENMi+1+p0W709DAtwQkT0iOM9sh3wftiNQODFoLMp4meq66pmkrrAhW
VYu1u/UISraE84GNMatkUPgHDTdRa4rVEtVHghItY7PDtzQ8cPbYveGn63qkwKxPktSq8x3B3ha+
4QovDpLkscSz/M+WKbVtBkjD1yTA3/rnWBmrIS8y9Xh+HK1bRdyNGnbbZlY+ZTqo5zo1neybZ0G8
UT693xxZxkwVe990cUP8FcI7heh2P+ZMIn/Qf+fkMjdDIC010xk0paOfC0fDMDzaaumuc6UCHj7s
GjZcZatOjaF+UsWwe4NPeK0CetVfTeXC2fzwifIvnkKwzWlJpyp2Hinpwj9XvHndKZcpTpUpetZB
GWDIMSjkBhNBKpqUwqpdjaMFOjh8WqiDxCuFHIfaeHu+X4JXsv5cTwq+SMzUjQqJiHe/+PLznqVf
xQgUB3nSbziEIEWK/epJErr5AdowY2FPxHusHMSevBAasSWn/Hm514Qud3/DzFlEt/6/E2m5Yu1t
eZpit3L2Fyj1mzwEY0XPJSrKkJsK4c6UsVECLVq2zItBom4OZKfahEoswtD7YclbWnYmvRK9sSbG
KqyI1YDOMlUzcM0n7EZ0bZEflwzAFnytPh4Ewgtw8Sq6uZjOyUV0tAVhro+tY+o//amXxler9cO4
qpVxTVbQ8Wyjuewhwta8ehNykc+oUzB0VgddezAaAMegCQSvd1DFBKDlQefOqWoBbf3YRpunIPJr
6VtJbVZJ+PwaENJP5KtKUj4ej/N71Lp/ISt+y3cZiM9M5tRgPMWpcIOoXkAfq6h+9rC3rhOeyKbp
7jIfW6KGlvsMika+07vcfuiAvnw0O1kE1LF+QrHihexyFmYvhgZlIcv2l2e2HHX696Rw/msxBOtI
6ncRL2i2HYxXDFoMBltYZTUB+Z1NlNCVJHvHdLmwI98Hn2tc2LbjdAwHQ1I3T+VuAzxHNnMiKwLw
USLWMnVQfIMFWqNKGacQbUMgQsxZuwclJmFbF5EYK1H17Zmctl1Xs9WQk0WxrDf6iRPIBcyNRblm
+A7+v6cbVTH1qLnvYkkHthfsDXEEEpQ7tZcU1uLMpPIPcngnbWqXkSLAwDQHC+PioyWc8F5XvhYq
uJ4EP8eTXSCDyJTuoGOfTu72xJ694qgVMLjSoeVCaVAq/faD3ZiujnCpOE+b01AhMTz7wSObeB5y
M17/VMOsp8kb9IQtiZJ8wtmYoO9zuK7V9OrahHyoiL0WpU3ShK2+EHV94oh5AE3cqXBVQGr+3W49
DQ8pj+ZwzIcDzhLfgoY1oeSCmKMzYY2W6QD+ETvVLIN8TnvP5fdpcXDvmcCJR5SpNGIGPJgZ6jbE
hTG7fPwCcQmDSI6v/di4bV3Bg9goOldMPMavaMSxZa1kWroWNziCMiBmZ2nyC4AyFFhuQLRHh2D2
JKhlT+aI+BQVj3Cfr1WRV0eVhYPsuRM4e7BvpQ/tfbDCzbCsLdiRkKUPwtJfUZkMPFsRgPV4YBUn
MFYoBY3rMaIszwfp3NPnlJyLvEEzcMVO5eUThMUDO25NqXExrHeSbSaLpAKJ2NsKfQAJN5qBrbzX
Ij/3xIf1KWmNPHWV+4f24Crx2nVYQoqew0DBfFLfJ6Z6Vi9gF48aeJCI6eLYFQBSdBcI2I+bzEpY
U5buIj5+8f9lmiIzJ1cKKbz3uhGpaO2UM1K5sNtmfvDiRwU8CAdddmxm0X50Bi/6El0X210WbzW5
XxeExbwz9Dum88RbWdcr7YdfKNVNAXERFqiefHppOtlPUyQvWbxiMaaDU4+65Zyo9GJke221yjHY
miIqXZe1IqotimSY5Fok7JkLdrJU1VBn7IgnLGg00c9r8mUPXQN5AYYey8OJxd3flMDqBB14/TIA
zHlpqdRK8JeEzq5AIXLvtF5o4+yNrYBsiIwwtFd8D57t53FjO3FpOHE0yudE9Hn7b+EdkYX+ot07
o4JYoL2PGOKxA68d8unJTBQqCbybnb6Lls0Jf4DPDV13ryynJ2kzWyNMNQn8GjLcsdKdbE+ufBrn
k8aiwStrX9Bx6ARWfoPyEiul/J9vuBfQaunwgfgiNT7NTg4eebTNLG/ByM7OB/V3O8PuZ88FKpyw
xD/YgX4fD53BuRAIF/0dldaleF6o/HDdzLVALoMv8wzVAh08yCbTo/acUScIi8QubYzjecpPxapZ
0Q1UTPhFj9QhQYFAkE/oCDgILjhlICGOMRtxf0sCtZVRGt53H8EQuv4xC4G5Z/vuQdcCNLdrMkSh
jvK5LJAhISdlmWKYP+vaHKXCV0vC7ajXTr9foAtJDimaEA0zFkbY0vnMdqLmtpg4+9vt3xyrCV0P
eaWXoxGxZA7X+5fmpRCSmgBO6ajmzEz8CLykoza4+xDey1B0ZiwOT/SdwHomY3I9lO7Mi1h1JiQC
aIMJ5lr57JFb7hsAXzGvhj6WPfsVEMJQ38rW8+Ts3VbKtJQ7oLilwKN5/B+M8haqdhauQjaESb6D
CeroxsCYROXmKMxBxxWesiNmT/Fe9ISOjYavoZMk/pJaP39UU3H3y82SgvAgVL2fcDW2V2njIHuC
KrDsKk6pjbQ4luzgCjnMIskzmSrZmF72Fl9gq6qdg2sP19Eyv5yyr/26rlaZRR63XxeXxlrwMeQg
fCzGc+toZ/Khng/bnXJwaJGxaM6ge4Ye2IpeaizlstGnTztriTgy023OTudSxxye8AxNTKgKXxc9
otzMSQsAm5Ew/obzL4HE6ss8YbWA74hD+KMN7Dz4HgBxCUFHN4NNfiNY5thbyLH+da+98xdPl9NV
qAEUc4c8BLLZ2Un/rFi2WXu49h/HUsDGiZWvlQGaN+riY//IjubnViskENaYc2gQIZbFoP4Lo9fT
r86YnCOthG4/gylbaR63TvTB+958FfIsnc2hjHq+sMiMdYByBKM2TaAzuG86M1VaHSwM3+jRs1zm
w5Vn+XEoZjl6vwvjL/w8wZLSZNDvovCTIbVjBbOm7E1oj8CL190VyEHzH5ZoysZqlSIeD0keL0F8
Ku99atKbrLMMqWQ01s3UyciGXsWYmk6JgMdT1f1JV8WPofZXi+AtxjZ01jxIIlIsMRkMfdVn8/jK
4bAwam1a5HLKIZBB1QJKjOA4YlsTiYQWyWK6dye/B2+Hgukxc0qvRFU8+P4q1k1w5K2M1aljrzRF
EO1dv5X6/5U3h1HEntXIL7hLQcHZEAeR+nki1TC1NH5DDILu0oA/eQaziQEvN/y9q/xD8ordCQcj
XEw5RxV7c7rfYs9xLX07kUD9yp81GSulgfmSsIEq+GPv8BC5vwQUIHboWehsOMbwNYF9z9C8JFiv
+rg6vfIVb7uWOCUh/q6czWZetNcg4Jx7x+SvHKMYVDClQn8QPmWUVSjjLCMVem75sP22cwfxkrCV
BSuhmxAl9rJP5TyONBb/evgAZ+yPOTWploP4MEkjW9xJm5PGCGPiwPfuAcCnE0PlUO73gYCqK/hu
X7/zu546+77RreRiVm4dUgfQrsBuxxp7jZ5CeJXLhM1ANCK5Rfl+vdE7SXIBtpGm/PjEWue/M7xE
eRCHlDzySCDMNwTubrY3jUo7zgHOmfcHfuw0TbiX26XdpL9i4EKsuP1Y19NXdmSdnZffqnlcXCzi
owVDK3eXyRm90LFil3Wtba0fLHYM2OXw2i69CH+NFHlLDD3bOJA51th14t+mdvWMpAjFLCf8ZL/Z
3nOOHgL741qUDHL25Ra4k9epnD5u8mgQwy9z/zWTzUSoV36IrMiDlYKxnkjwPO3Np1fLq26gj6LQ
0PauRUA6ZJJftQ/My/z9zU58D9xzpbZI3i7qJqRBw9LG8ji6rVYw/Ryq5k/aGEiMIX/6/dYJhl9J
SIhb4Ug/NjrrbgfLqMxHsXrumt37kK1/U+KlMffNmHUtaHuhgroAk8ECam7j1zmVeobldRZ4OKBb
5zDWZgqwuYGfwCZgvhDcK2IY+/eTR6QOQ3W6A3ur4tZfNht2bPWqukUkM+Suj8Rdc7akP4e/qyFa
Hup+QN3TTTQYtIJaFsBvHpGnlvq4kLnu2gdx3JGFUVnojpFlI6l6KuaNOqFmabWjOtBYWVlG4taM
uQ1KOvcmScucZ6M9kWqD6N1/pgr/cF8xtT28zUijM2afloFcErc1SwRNrjeMEC0DUPO9eNP9698o
atnoisWYnBy67nW/0mCT+jpe9cu9FQbx3z4ys+dF36GMiNWBJjeb3IYWyLZgzWLLrVUJ4mkzjcUX
7NEFWIPlrkGYALpvgMEH+GXw/W1osWUdCtXZk6gWB1q5+E9YjqdIfv7gsC1bWI66cgnT38jBJ6Zj
xcxVpOPw7GtlhAWwjvSsbe0BCYWqalGkyR/TX/PkEuz2XhJwPq6Z+2ZVM+Oclk5jZMC01snNRUn+
SpeRTVo62mfoT8E+gVZPHikOc5t7hxVNPphxF8+9HEk3tLzmPfRu2tJKt+4KvzTdJh0Hj85HatS/
GUuPvLq1oLyy/mhJ46uf9o5Va5y4fD/gRrQrVF01ksYo3nZC8o6+8OTKWN/N5YKw6hWtXuN1DprZ
ViSVeCEvkzgutKUzscqpjPAr3V92iQLAyMUxHL3Ok6qC8xnU31rB1AJJs9VtrCIHDioBCIrW7GO5
VXkFeascT+zwvmYiIokhQkl4RxKAFiqlhjsSYb+KdNNn4nCy2egzTJWHqy/PhLRi5M4pCKvPAqk5
fHMx7vqKtp5jo8QxDimCYUzqYct4anxfZIHc8xAcrRuIMLAjebFZ6HDO16qSd4Y4cis0db4hgls9
gltheQo7TRrePuZZR4aAobYWnpOf74hGCRGklNWccMsXttPg0q4P943sQ0DnHvRcB0KiNJYodjS8
uaCOXrCIRePI8e/+eIL+In9PQ/tVqJ8SQpPA+fMc3bd2oX//od5jxImfxU9ckuSidZsyr+clRVKO
eoz5+aBx6ICOG9W4XsehOxxxQNzNJ5Wli+cug+eoZQXiaTd2JNYWBuvlcMX0HgolW/PdosEU/d1T
9Y1sWXj2u0PA8Zl67H2c5HBGSJCMkRbGHR2ySBEPlDbzJL+eAcbkgJ96JeCXqv+tThzXdreU7yGS
TE9+pJ8y6If5yn2yhwO2ZKK/PeTOQVwUUogQ/z0acfMoEv85RgC+ANtFC9838BoW0gPE5j6flmVv
ZAcCSNdn3TWcbBHOsY5kP+JvTpaU2NITQBp/3rqObVI+9hy7Brfsj74Lj4O8s6j89pgI0oOfjAmZ
umE1Qujyx0jkBDCXobmy57pTy0YmrwbXvJVgnO0Mey9VAWuGilol9C9Zsjw7UOv/Z5ENlnCHjPww
CRjlZPK+/fgicTRtQf4zW8fYTglGWCHI+xm2WjMAYn0ERLIRnkRPoYBITn5L3fG/anGnDcz/o/R5
sN/qOWNdhpMUrtwmytFce3l4LkZzbfKZOfmyoV5lC7CMxIj4wduwZWxk5h2qOiOXSLJlzcY6LYzO
eGSBsGdA85dsml14Mk2vjFS/wMtotBthClM0sO+I+uhgn8KiRxzpslLoBvy8gHnu92Xb45FfjNw3
51DLS7QsZXjB/itqNp1utX0Ni5tvEdXwh09UTMW2Bqg0RaPpPLQ7i9wYveAHNcqBzhVhNdKl5q0F
5FqKuHqX4jtUTPk9uaCKKGNdR93Hm0cA7z7FMfVhUFXwPiBZEmd6XAoXJULz78ambPyA/B6Yr7SM
tN7DV0NM+AveACGjVo4UxnR7rbKUr+8Bol8sB5Xsabea4+XKkRb3ZLEanESBG2HgVbzg3j4TRYu2
EfTK+I+BvnLcfTicxtWzVLYRri8N/BeKUnFxAdA038+4RdZQrCfoGREMHQisWHxtJ9IKiQu8ZEni
hyrGYswGbbi60gYyvVQn1yiFZxFrGgv1knFIIsoAuKu8UQHzi4OQEXTdly/eIZQiXmh8V/X9w0tR
HyGOLJlnY7YF7TKItqEkl96g8SH5wpfoWME7vwz+eYLcdrVUSNJdCWryXfm8YRTCL+aBh5TiKoWT
L87WOr7frz5x6A+BEv/CEyk0vlSwmuJV8mh6ijm2pDPHJ6zZ44694+MMosbwwCJ+0MRL9ORtpPfN
s4jHtgqN1LB6Z8bGJ7IeQbIkB4XjOtEGxXeJBggajuqJY1WW7C2G1o8628D4lMZFcCbut43k9RWK
fBmOPO4b1JrNlw8ihll9Rmgl4+Z+xAY7Xxfh26noErPvv/2Fkdml/SwUkRvhyYPf/uftrNqeKw5Z
6jiydiQSjT1ipcDOLE1xW5+DZn/k/FSq6ntom2BkkDN3CgxTYCq9stIXbSzvFl69kICyGyRF/vD1
lo7O9awTvyEtIfzupLCk1BM7TJISRnDA7g9I9Z40JfhBoqQSEKj5wVhIhc9jao1XSvwvo5X7NUoE
FRpKF4A3Jul2GJIlumP0NziXTLsnNh+5v7pMrcDbUshcR8F0YAaD1tJJ8zipVLR0HpM398tYK97i
leWZdR4ZrsEeBfUt3plBI2RKswdEgVb7+jJHZtA9IJHew8h67/CVT99uyqONqMcagLIF5peHeCoN
kYdOu4Kc6oPXIc+iJk5HYtaUCt8bFSM+sGYRyRvrinCQWY1ovmn4eVP0M3oFZCpt1I4A0pg1qnED
Y0wPuKnXmQ//tQa1APx4LeyMkgJT//8j9RokBGfLG5btZxmk81F+E6BkaDBBU782N+Z174q79sWP
TcEaiPZbzGVBd5r1ERjXOaU6lWu89l6FiVDF6OiHl04CtCR2rcGCoyDBNbKdZEbTNkhNzpv97En/
Yu+RIx1/5R0D1XGLPfV0Xd3ZfzbIDkAao+tEkvZSYLvk3+VFKDXRuX8rBYiUyg0ee1bmIJgs0Mkt
McovLEXtCqzrBU5SRF9m/Fd0cPM5zwmXVHh0PiNIMKqEKX0et+1QNLFU2aaxTJFk31WZ/FKx3kj6
ixcLHmN3Mvvv5+8zPqjoAQt8/F7s51sj7zYcfpt99dqEvwtjL7Ivr4DHJvPuvmDYUAv6QI5zfs37
IRgBTjW9Ui3mPMT1R6Mt+6YjhcKuB/93AN9MgnLocR0Fv7PlL1l3af8EhkSE+IPB8T4jwe70e8Sn
XiG9RUaGJtjo10j8+A3x/LTIulWZJ90rWX2LiO4BbFeYxh/1nxW29fqMT9zjKdPH7yhlrAMbM4va
+cHgA+F/UB61nZNjmcMODKIcU1m/xECitUCrka496wjU5+pC3lDN9grohMNDfGIem6sp189bojeF
VvrDG2iETa+TBC7rNTY0aErR+mwvsI0svXb7RqTExZncFBu+VOGBJ2q56muUkEQeRe7L5m16UM3s
TVTdQNvlGpt+cZzkD/P2chbzRP1Ew9sRgRxWDPJrALYOa6o3bZ2RGWiUFHz0jI9FTV2UDc6VEu7g
0RWMm68IuJ1QGmKo1/vdGWkEuMpbUmkFMDMPH35HT8eEzd8/JthMFB08McfzGxLXFRRq9Ic5m8Dv
bgL9XJZBO/kUJBJxm9faZOI7/A8e7iPmB+VMRYWpSzX1AvQQDzYRyniH0jI4x8MqIHnr3X7g2te5
B+5YVWUxYDra+3CxOMTjE2vTh3rwregnjtDPc7hzL9A7eY5llBamApE7XtlkkUJjHfwLKfs5SdQq
W8J/TMgBbqFGIOaLeCzokLf4+3AWZiJ0qRk7GyVxVoRGfOuXsHY0R8JBLKXmY0QjQtcsLLXPqUIG
lBRZQmchna9e9DUSfBYSRI6k7GnGURoGk4eym8uY7CDjkfo9DQFolZgU9Hjugxc8Xq5F9m+BFq83
1DhaBtMOiViq19lFqccvgeEsDRnAmvN/LyphtPGBMFbyqgSsr0w/BPDFcxUO1T8z7hEXfAqS4E8P
0KGOAmXHwsXGHOKnEmGn0eLkVIpOJ2Ay/UOueOfQwXrxhbynYQHiCHQkIT5YrSE3EsBgLq9xp50Z
GYW5zJ+HxoPa/PzqG+01ij4R9VWuHsORPOsMKeX/GWHsppqVcF+AL373G8Y2fTGLZqlObhv1kJBW
AUfK4xBTzb9F9ntio34FMeAKuriF4OMGMNcDepxoVsFZ3qP4jFhwBwi/iWqwGbFrgJilwYdvY5o5
k4cHH2Br9sGzqZYWu/2sR/vHTgyJ19Vi3Lc36uxZYCKBkE/6vHkimGUxZoPomq4UTjZYnckRnlu1
waAxUmpE0szVb+IWAXehculxVY4HhvFpAa7bPW3+s/lPOEZXEzVFRVGF58TEAXErdhFdejDAGfvq
JKZTn2b/KfMXSxW8lU1yHoXHzq0JnxiXSu5NcXMkEPVqpPjpUMb4nf1XINoBghqMGPOfuF0tr6Nd
ZNHdyDNPMs9RYedQMHZxJhXIUoyOit0eTzHEKW2FXBEF72ItjX8cggPVbb65s9iehP4q+4rj4KHn
8MjNQNiMj1TeRP24KJ14ofiTHbF7cwVCM3Aj7+Py/qWCS9eFUYYsPTSVRG8ikikg5tUv4137rvMa
CO2pdNs4Xsz1NguncDK7FB5HgRgEzQ6qPoTx+B+T6eeAuv8LuhfZIGWrXv5qeA8QXeIR3szTgs/F
NreRsQ4jJmjxfhXmylsSs47LZURwd48VzyaZBNr8y9GJ6fzz/NbqAWSKa8dWtg9vkE1M4suPKNIj
gdldVgomGKpfFcCE/cC8MPNlMha2pgm76N50b/xjgQo/s5tnNkvFTnd+7Ag6TjyIvwkpxK6trMz9
T7+HLeXX8WAKP13Ujh0EPuixnmJhziqdMePnw61j1X+gYyKYI8mJIF0dmijavlxrSAUN3yfjf6zx
o0+FbN1yfWnlQhO8DNoXpmxGp2lAUGEHnzDXZ5KcAVIYyT3qepta27I02IsAW+z+7GnNLQAq2660
LXu1Z+BpGDziEbn+6m29Crdyp03LTuvGlmiBWcyYZTXIwl65RCIT8JLoZ23VYyNSVtel1DiwxLz8
eXsYW99d3qyegPFf+f679SCLA4Fga6UMzcliaE2JB/CA5I19svC/NFsouyCzFqHAnIgpWfImfDzB
zbTo/Hn4nf+evZ+P09FxUhH+KAixo2TOv/AGsj/BcN/O8ZuYl+iA9iNSDSRX9hvXQnhDBEkoBVxT
QiLkrSJm3XLxnOSUffdHidrCqIKwWcfNePzVOa+Zxap41Z/+xzZbkCs+DPrW0d4rV8D49b8PYLgp
IKepfoyWwOiFz+MctBKK3pkv66LpX9FGnxDyL5JuQVMN4+qx4D8DzTz5NXEoFQQqefZZS9PMKS+L
4g7ojmop7thny/SIHrwTMW2u14whcY/csKwOvVy3ZTIofD3KA2NKX2x0rLDAu7DFFSZeKiejzfek
Wgr97qSdpXvT9ZI50g4DhvTFsLDy2QphWGDBTOsB4HkQnHRkVnqlecOWF/US5Wubb9NSqHX4PGCN
UYFc2t6r3lxOCyJSxw6+aV8WesEjrW0OOIoK32Ua1payPDIPbjYEvXBzLxFnvovT0lqmkM616BX9
m+u+1HzbDx11I0B20DvNMC+qKNQaeJvYj/89O2XyKJHwm9Mvs8YsXNFRGz0Uoc+o7F5pE8zJ4TyV
C9z7x+PjgnR7oEgNuXieZZtxNhLelXfTYAlCJQh9EjV5sn73wPXET32S2LBdNsemG5+teRaOvi9U
A7SyXFoL/Nbw54mNaPjxNOIiptvZSfyFOJIa4kVVILhRW5BtUg/9t1CRUB792q+hhsj6Chm3cD96
ziYO77c0buyS8PKUhzDjdyfx6CX75bgNIm/B0OpwcarfUWbISqM3NGVud5YZUlkm6cq6i3mBKYoS
Y2iQcIIXrUfmEbbKVeEdByiaMOKsST+vgDSGfZE59QXIwr5iuwA0d8Z3vCDOFwIsyLrNLxeLxXFN
syltARfux8g9izse7iw2Fh/lTRCepNPliG2m8/IPHHzL0DWWKgmcbL1n1cyoOD6a8O3fHFDqRi/4
5V16WwOJI3UykP21iojIwlzeC/neGt/8PBzJyNkq09CPkAGRVaz9Q1xPTjnAOGt7PaM9ca3236+O
WqZRYbhN6opdkzEQ+WIlW5R6Hph1Bj1TJaoWD+cBav3CJCxx+5KR4VC8lnbtO2AgP8SqewN9Z3Qn
Jjg3UN3Ny+MXaKIwN7yWY6S6um04xRMsy/5Z89vm9XzWtQ6fR3jfUIz7fNbhnJIoloPXDCcDhR3s
Fyt7YgciDk7lBvwRcpfvMYFYPKIvkgZTqx0wruZXe3zIFBx4HheoVVT/rFHcTbLT5mCBuksNRIAI
MlkmC8tYn7CWY+V2leVUo/PU/gLCZriDcXgUiNqMcmQEUMn/Xg/+hDt143EimdX42yjkV+yesU2N
oJ0NRm2cpcqXSxuprE08L2e9v8XE8EmSuy6gs86K91k31fwGtX1WlrfvfC4fdtbcYy+dOdqAn3dp
8qzF/MXLFYUe5M8W7TPM4I4dXGUe9CXy0FPKB+tL+zWlU6wZDf3VHw3H5jvt1sgWWYzvSTekcuyS
FEE0wY1WG9XCZSN0TNfCoSNSNhJga7LeITTzv9a932CB0K8Ra9PfytpjY95W9/9ISMdgXExRMwyc
XEc7cQIsKSh2BPNWbFI8wcc9A7s95iYOx5Ek3F7Hj+754HB3VMbUGRAl3fFz6gQUJRO8jaw8lOWu
2KFLgwbwUtwWpUc+q4bSejtmBgymiqkWV3Ueqqx+C7eGE/zTTIjqhRJxkxt1njnKldDPYUm9qybz
dXlDN927KumeQC63ldHTcFI9lZCpQGg3DHKn6jWWFrwlj5JQFjAMnSmK4f9ihvSty7eS6lbovWWa
mJgeQSjsNLG0s0BBBnjopgTqCc6kHPP0oRN/QdtSQvnYX8cMqRPeRr8psrvg1WhTWA1FTRqk5kVo
gA5KRFfshh8unSgt9fFLcY5fSgKWu27Wx9+tBAy9BbKIa0aPYn+BgBOGxfrxX95w90yssMIGrxFe
2Kui89U4Fa9DLRZBr1OXQByb6UrCM/+9q/iRewLO9Yc4KkQ3LOCUmGPOHg4QZ9sBu+L2gn//SBPk
kVON2B68S7slZ/77XJSNVaWzz02QXGa0AByCZE5w7pRJ8b/jSMkzm8tBc5EIr/Sr/FXbzP9yiu84
Dd30XAWuNKjiY45Jvz9QUVppdnJ2hUWVxkU4ITA5HT2CB52oPB1jwIQ2mFNvB36ehFUDdFkLjnRk
23WFQ/SaLeegRZ8mHCs3Qn4KI5vB2kOXzApFOoXpTNJlvY3MF/X/9LCiFA0FpXrXuisU1ChjU6gP
/nKlJYxv/1aaFWKPkIXTKJxnvqr0BJF+K7trIwtPdIZwbxaJfAwSGGvfAFlWMrdDkyTAIzjb6D0T
MA11IIdgauFLCP8BorY21ECmwCzpg1hFlo/OC/wwXBUeIqN206gE/UnSmvMnAEUSm5RCqedCc9A1
ZHymw+fFQhR6IfE1qjLYUw1WTaTG+M32v6BF4za7vEgFKyPdBwTA2ez0JrnODqesZiwDORS33DPP
YzaDJpxtUz9w2F/Pz/N+q/RdphYw6qdmDFuPKV23yD5vUYwfMqzFGQjK3cQn7Ji0jzkYCIpWzejR
IisBrps2nAsvSpKrLEK/82sL6nJtOAYFVv9sXVqqFf7KV2sultOW/gD6lpBWhzNprof3GHxyR5bo
TZ1yNv01ixYVZwTJas0mKsWtv9Hibi4+I29fa8jhQ61Rw8awy6rQKZOXhekTLJvzHyy3nzCiYUP3
f/8JmRKyFqlmg1VDjCswf09xIgV/d0YLDwfGsgye9+GV9JpVtfpayR1Mu0O6ye1HxIZQCWGbx9oA
zpnh0rltV2tBUT6O2KPz82PYhBbjrXF105gZVBjgPkXLE/uIhx1JDyGxEF1hiGFyJ+DSgD0NGJeF
rWaBbHJOvMVmLwtt02ZE8YWbogyPhBqaEKxj3By2pD9Y6jZvn8Gh/oy5M88UBh02gvsnSi/2eUXK
ag7ltQLPUY+amIqwZFW4aNdzNHZrwxcBwk5Z11Bukq+sl+i30eczqsPKhu6+qt2MdWZYhImujR46
GhlopfP2JOlQhcnpOtG6KFD5WR2cFJj8XmFx3OC6ml+GIVr9rkl6P2ltRlNlkAZR5aZkim5xi15b
Sa55+d0M1S8Asy/FlG4KSEH7XVhmB9sELZPBM+MMehv7jEU19A0iMDWKfmRVY10nWGgI9Ssgw7/p
P0ObYQu+UDtumCnFHBS6+l2h1skMzLM3s2HCIVQDadWpyqjN3+o/u57nlnFH7x22RWW1M7ObKD/0
IqaU9T17xH12IHB2R+Eo/KbBLJlgH8GI3fbtzNEy1FAS0D5jYcbZrjgFZO5tZq/jgNdMnChOmChj
JC3Jr2ZdfE6ABr1V9dBYt8bfCnWSuuHAy986kku38MJOOXAAKn8RKgRbZqfi7xdQYf7ss2KQFzKz
cAH94ROLpn2YwUL0kcC2Ew/jyzYiVAmPRRZx9dkdSG8IzG3w3tmBDiQwFf61j4jYFLHdGmqpFKa+
kWGZ5fq725YSqPBbm/SnSr8mtHViYErykG50B8/if6PsDP3/P0ucag2kqioQUPxAUcLyhSkELVZW
cc3Xd3/cmE4i2plqcNVXH74P1xCEhRBP2VBZ98eUyV1Tj/yP0u+DefPji0dMM0vJiD/HarNNrOel
e2DAj4x5hah/jF4Lok3aWMn4RakwrLVWAPbdxgYsOwLVHkqHSvqNM1a2ggC6QD8+IQvVZ0l5JiBY
oTyE0j7/IhwXVcPoOTaDdbLArFT0D5yes9/FncaN1IzTfTgNuT0oaEXB5nZlpxyLaoYg0MOcHNOM
q53i+93nhekMRDTONBl/Is1VgRPmAEa8xQfgDVH+7BzS5veeaQvpnm2owXTUXPKAUma1NMs6O/dP
YbGmr5HVXGf/uWxlOt8UiQ+BzReBWWq61E5Is/zLG48mfopm+j/HooYWS5gyUIlhn8Oq9vSrNII7
D6j7ISnnKyMtnSwfAO7Gr4F4lkhQKSwdh/ywZywOCi/4nptRYaW6UUikXAV1e8B4tts5tVdnvwBA
Iin/e2XIm8v/SeTN/24C+NeyZPW+BPnNvsPQ8fLmbwbwxrzDEWXdRh/xGizGZuoXJ4zMLZg6qNaA
TwwaLX369oYjWvcT95n4S/3Im8uWyDJUbK3MjJ7LE9BJMz140NqhEYrFdQ2cDLi7PakTIBqAGkI+
XYYnBxmX2Rkba4E8sgeVJS5lSQyqxVxsLl0c7kWkO+G5SYNgsQT2UFKpkOMYSkYg+/Urkn9u6LVN
6RG9P8lQqSJ8OPMZaBLmqUTTXAWzM5wR6vQAzklAJ6S4JVWKdX0HRQD7w5yCSV2I888IT1lUDoio
c2Lw2XdBhQEvrV4L0sN5CsbVJ6Bv4NwdRwXGAhcUPnqsMvl++Xw9n/0+JNmpJd5PsuvBugxC7a25
yLeLQ5I7AjeyagZT6wCgANyeBdXcuZtTCAfvcMfglAys8aHypoKwObMQjvb91XAv9H5+cM7LlbEO
6pb/wd+X6psfq5TmP9mFg9Z1nNNro2HCRqHmcGqMpTuI+GAwiTcNHVOT6JF7+rJrV2bF/nqfnmkk
e2rwc8IRr0tY8KVjnXPZEyU9N4g6TIPgVOg05PxzQ/Lk2yCjr8aUvFOXETrndQy1nhKfN5Ll+/Hr
WPLJ6mqsuXQNwH4GIJBWQAQuNXAa0HdKtF3CryrkkLDJ+Y9DA6WZBWoKJOIFv3mdXk+yzEO1R7zj
jQ76X9VHTokOicnSlqjPZuS7xjVnREXsCXZD6iLK8O4KM8SUVsDmJQR6I+qG1PCWk28vgwJSH77C
ZnDQfhpoPpkyLBPdunLP1H/R2CMAwzul2BXvlMdlenpnbF7G+2jGkxY1iqs3pPo8lNQ77G8tWaAA
th0UdxEiHmVtmJg6Xk7qMt96OG8pwSc+1u/vL8Ysz09zv6dixQz65BYq+iG3BlWRiu2AM53xGQND
2AwVUceYSAIHJsUW+nIzzUciv/MaOrp5Cmj7YTRmmJTK4Sa/yTrYFByyJXS77+Q53ZIK7MN6F4f5
4mzuDRQkmIPC/JgbFY51ur/vAuLXVDP0iisjVxb3wKShkcvGlsXwoDKgFM+oi5j69TS12oPu7aPX
jSodo1cLKF8Z/Jghx+R730PKMG0Eo7d77FqS4MvcNfrFh+H19joxeMlItFY5aGc57NAMfidqJ1BE
XpzTwk2m4sctHZunmy+3DpWwinDqSzIdIDjWscGWnOx2QblIPo3Q1gimgAOwYFhDxX5LSsF5c2R/
yDswnudPe1pbnOoeLdrHBGnF5YPACmUN3V/BA4AgD2a4iQuSCe3Dfi6BP2mfvSjgDAmJhjcJfLLU
4RlTKN0RG3GRaVyRiyZea/RoMXytZH/pGeaSGQysURI2foVdPJqGuzz321lYDOdmoppgT+dXBWCm
XCndF7/pFTlI31JvgvBIerdSXLwpqtWy4wc8BDoUwZ8Q8Z0qWhtfhEocmizLp+UCVc3TTz+YdnsY
20Ve7/Iz6Gkz3asMkhudUhb5+SuvR4telk3J3qO9nanwZayefr8nVU116/p1tapSYXYYpV468yat
w8ftomr0+aXlCmpaycuyVH8JTdcPt3J7Hs23PmHhVfrbq/Zo/31EOdpf8PRYvysMDsUQYEvokLvS
sFHagE8Ofc3JNCxMbxkbW2qHUTQ8cJrMtUVg6fY8aBvuzJY2d/gZtK5w3QjzfEw4SnESqqyX0zoD
f4W9jr5s5V742L1I9Hg4gxFH4mq8cieYX4WqDoALkkHPivdFN38Fa+IudT85MeXCHVqc7WTQySDE
wLXscTNMc4ObgQ8VA4FJsNtNZZk/yy5MgoPuzWbIzN3FHl1VsjNcsgqxtxlo5gSOFSR+UR2jcTHQ
+lpwk7VaDxRF1ZGwqEZHVvvPtiCPCIWezqc4hzQOcnUPbhW7cReLz+dOZNagrJs5GCzZnywbestJ
z0b75DJPEHDPbrSz00DxUqsxe0p14m4obkyrdp8GQ9oFYxlmz7L7rjmT2j6AKqwKRs4C0V+0K+NI
iRJ87kX3bx5tIMJC/NHyqL0vQNvYYX/k9q/PmPLCLPoi+Jz3IokTbH05UNTOkPtY/J0wH7J1Okzp
iCclYGKt3RuM1FAngBNWC7sip4H8c6IZzcnL1PLVmdufEfDgRf0D7B4csJdkoBzVkEocPLB9KIOV
gKaqY+LxxwR2272DTb5Ewfw4ghw+hJtj3gOksvScn9O0vFR93l15jMqFeQpdMn7g6FFWdoP5whHA
tR4V8bVb/2YaqeXb6tE66HDc9R1/uqH+PzKELu4gXLGox2t1DsRXvqfs9zgDCpWsmz8Ri2QEgydk
kcKTYc+yMROzrS40vgH0UuM3HjzKY8M8WQjJLQ492B8tr/cnUNPRNasCCRZmzGdm5erkqQ9JXjHL
twNXqdlXkpHMpEKwOBCImx3XSuOElgeC5XNmZtFjSDqPRXGbkyCQVqlQoU9kkCewmuNOeTzHQRlh
4to3g/m/ZtMvz4PPGkQUQn39zYLKdOVF8chHLLl/E4Tn5w1mDQ8EGqF51n9ieD/QfvVQc5y0vNJw
kcHaqTnfjouIVsApzdl2x8LMFmUNUNXh/C6UsAmDRvebeMho/6jDv2oXVD4NkjprHpGy4QlyF/2O
tZN8xtYCDFDuVDLLZuN2dBH4xlGmnlaCGbc9OH6NuBgUJHrjblMYah5/+a5dxKY5SbcY09dyqJ9d
pjP08NncQb9sfqNk6aqEQ+M1sqvQLtsu7vucrq8PI6SPFUb0F7hSWkkxyaGeS/4X60wLrot+ett/
HKZ4LnKWjzs4xtNqXDqVCObnO/QPtzFEMjGDmwc/+OH3FavnnXvmC/0QvHA5/vVjkH+TW9bpqgkP
+V7CUDmTorVxYMjDW6cLKfZscNL/aaVZ6eFxah/JdPV4UEibAq0iInsNYqsUG1Av8K+FlMTj2rT7
z+gGBLod+4SJFvQFK3adYFBn145V+DIDFhVMGnM65YK0f3CN/S/8ojNOp5fOT9Dny0oNvQSAVbeN
ujNdWCFBrKQAUH4ILLC5hSdeQfeo+8xiN3onSfUy9vZsfy+tT5MFnPTInSVk2lsjOlIzy8NUpkrv
0WlOxs438ZWHtQr61d+XcJFtYhMWWQ0lRVfNV3PChanU3HEueFRBOm1NteWd5vEsQuj9YMXvceen
gX6jwLRA1M/Krc7CVKYZnHWjGHcz2gqRfmEaMbw1Rtugzqy8JWo3mmYDYdqwQ2kTAoMe4jWa3YfL
TAo+/bYg4OlInQHy6UAYFGi1sP7GguakU8EtT1SWwwbz2bznXuEuyhoivxVhnI/HuQ+j5XQmRWw6
yQYQ5pcTEevRERtiODFKNyUzGkTjuL9IV4plfuG3tYjWnrx5TnZRXxpNR5WkakKWfdFNxgs19C/k
cGOOUiQfNPlDiMqSACtzCV92pDufHViuH0DQXGcd4hyM6eKcOkf2zlCuHfeSniy7h/m3zMYCg/rn
AaF+/7EY8mwzxZ4gGKaafRRC3/YSsAnVtio/aYKDClh5Em6wAcBdQfMb9ESTcCQaX9z2iF/dWfAN
h1qwfb//9GR2nEUsVcPFN64jdjnunzHakKjn3e79SkAK5UENnyywQzCdC4luGSgDheViLjSejp7V
v8Mzvequx7d7FvBgR0yjX9ocqnrRZokEIYTTQ5KvJ4hP0NnFp623tyyviHsJvRmJa+TTm/jYdVeP
YqPwzw4jfPnC+VoQ4js27/xWn/BYZB5zrU3NOqk+5Vt2AyyK+x+V+wt8pG7QXeHS9a5c9U5Wox5P
HVl+CsU7Gep0MelagGz9hJY9LXeIagKb5mn+SBCAuywiXOBHpXLAk+d2lI0jqbDgFg98N/XhWpke
fDTw9EqTXUI6S4eiEYSap62iyZd3n2OhQCxaKDDolZis6vBd8LDnTDHm/QDR7OtOIgxyEHOFlXRn
NaPAwaVduEqR4HoidoMEku7IR/EYSYuATusoublNfW15GDx93QgZER6etMVxZE8DIhDl+rXdoct4
jGpR79S9AZs5qbwj2sgGkXHPfGUikYAc5VA+BVVm01tmIo5i0W65Pvgk9Pfs3wHNwBhUiKjuUkYx
F2DDg9L/uBR2rdE+a+AS9smht7SVGZrKkiXYyFhC9FpqElacHX6+snshZ0/50Phij6wOiCUi8ibY
2lhUHwdgCZHjDe7TNWM8CCD0zATaPLccgmq3l2/WK/vKdxTldWQ+mj4Q7+99w2bXamTQv9fwKib6
BeTAiPa7HccibtIilloWH4u7BKEcdlMwttvkBVRtJrH31uzJkNRs8FdoAilpDwYPikpU48f358cR
DtrBZOGfjI8S5roO/NHU/Xlx7jVLXAi290ZgO2U4Qja53eE8aINyl6bQoT3U9/XpP6hX9wOX3beA
9fiwDaVkxLDklqKYFncIR5EdTkKOENRhaDb4gTS+H/mF44C/LXnkGq6+aXarRlPXmOl36sxH+5Z5
ZPUSkH1sB6MbcVzEkMDy/4BOEZRzlNo09MHRg47Oedq4yV/UE9EFsi4HQuLHroYzZwD/cdfRsG/W
hdgsR00JM7ZHs4Yz+K/uX1W6O2vlBKIuoXaIlcsutxivMzg98If38kzp72W+z+Xd16ELN+tHHkHX
OZ5r3Nhm9TpC4VlKtH3wpu0p2RWcSHuIjD+mx+k+PHRC9a69Ge13T2VQZgSTzkfe3I9hRpsBDC0n
gudiETQAFMB9fQDkMxUadpWQ4R7gShDCCz/wGlykbvveJ/vzYZ23b9SyUxo1kPqydVq0+PH7mzUe
pbSWbrokaetqxVBFe34Bou5WCCGKF+mgx+6EDSxHR4jcJdEV6PGMJf8aSvqiWUPNJbL8pjN/1gRJ
HfU8daQalCJgKsZ0+sFFrAcHVy963WIQqSd/YM7JES5UVbUOd+f3mSqPsA38X01tMS9LGFuknnq6
sivo4NTiSogF1m5APkU3q3EBODVFVa4Gh00dEqdy4SveTWhrMqc2CDafOkPSqipLQHXU4GlxcHuA
xRXSsza7xVYK2Hs5LRfstR6x+YGDtjkMPp230l46mZoMWU1NlUlfEWqT0/OY85Vh71+dUSaM0Gks
dtWXilph/AwpAvQMHDNG6e69M9xzIVWDK/B5A1kVv/uXTX+UvJGAp2xLzoJu9rBFyUnZKDxdSuEX
Ha8yjo8jPVBqsu7IItF23+OCSPhuSslOlUl+HpbvcZxNhKw74ahlfIBjOvNPQ46DP+RgjvcKmViH
jolZRM1IZWTdJjlpSGdXoLIRHfM8qLqaAyzMFIPeqUsqLa0Bo/QFpaXbXUgg3O8tAmNLSAoNWdg7
f/IXbNnO16+eGsq2E3CxhqhTSnLazl5QaV9sggvGmeg05785sto3RjD3CiHGF5k6JDB1Y1Bz+pNl
d4Q4gDqqG8tyi8PmVmQ1PihkBVg9XbrLFLIlCZI9MnapD7NXdWSgRYa/FpAo5BbdC84fsbsrDyrv
5BTw6wSdqeCIHtr81W5trFlFWDYSExopkINgzeBSc3hcU2gEEvdAb3jl3JnCVIc/ifnNwmUAI/zJ
xv+MDAEZTvFv5QySKXNsSyCG2rcWR+EbvjlC7lyHXi9Mj40Dag9My5SpJgKo84qgVPAo2UFYByCH
KYH1PE78NSqrmwFjWnbb83VRqHsBcSbGtX98KEOlcFT+5vc9FKXhTOATEhp0CgKYWyi6V06E600v
stRHLYtg+ZYzzm5JvY7KtRh+XmVEh2eCOjTDNn5Dr/0aG0ZdQSkldbkfcO7kSTxFi8Cp5F21vG4i
ZdaTKZHh9ovhzLBmPHWcuP4swE50ap/T9/Hjnwev7Yk5T1G9Oj7zHgUx2/IAl22BI7se6FrIzIcO
btvLsR9ZDFL6bNWR9e9qu3YDo4+HarElYn6QQl8BMNpWPQFj/UreW4Z6LTuknauRKNjgrqwPjnLB
NTlFDUSDW4HS/P430IFFntvTYW3HE+7t3o8D/QHu/lIggTJf9mwdOgmrOQhXxV0vbIPyHmBE+6vt
mahmLMg7Rvhd1svL1eJ3DfTSuMZ8LwaKzq9ezrH05BeX+lqRTHwMxFTUHj0tkPTIxAPUtm9pBvUN
Ib1n1Yq+KqpxKVZ6UOVHLUZEf4qXMyy4dYI2Ai8BfwgcndLRhD8U/zvVTzufAzKIpgzvUWu9wOuW
B9pFnv0KwCs8ROtf6FjNREgzndQOW4NAFMPWGk3s0Q+lDrwP9k/5hcbWvfUUPhih2YNK+W5G7GoQ
wCY4xPFHTdjhZJzDhgFqfq+Vke5tLAucY582HfquZUKHw51+x1QnGUUGXE6M2czYCP5zhCSUQhCo
CljZdJ4nWlcKb/VsMwcMOTWfgg6Nsu3LHNFmLgVF/i809EvALGY9jQnb+/6Bp7zCcLQt3o7FiNba
sP02Zd7nFWNOl2wyGUzpeWOhwtD/EkJE3gnnoI60iOIr/6zv+gfBvyWADEhLFXjZducaTyBmgclw
+W/fzZzAy6vwNykmrU9FnZt13CPRA6PDwCDrlu0H5URpg/IKojLtLkiqD8B1U3bkqe8OmJoCcfaO
+2zgVKDxiRnFTyuO/u4V/hcpv8Gp1Qfk+Sgpd3T/Ipp6X44YdoT+oZgHNWWtTJ+E/0O2c1FIWrgi
C9m/Fx2KolzdZk+DhijvojVGFoCENF3UBrO1a7TTVnPw7b5Ir8vk0tDjAnyWjXz2KyGt3GOk2SBw
XVbj4HtaKZMAkOAVerTf1oAJXEBZvWhvMd3ekM7nGNISbOj4MIVrXAuG7XNG6ZpIUhX/1Di3guk6
QrfF60v0Mm27Gl2xZza5vZ865hvwOVMODu18+/LGM/wog1g15Q/xz6YDnkoZITMOqnBdukbZmTcm
ZLqTvHPxLu9gKkM70pDg5N41i1FWloNLRA1Gernd/PA6o7WuHjOZHnsLLeuKHaGZaQYPRHHfgtY5
Swc8flv9ttEtGM5yiigENW33RM2Kl4nJjRKJ2zrd/WP+4iK7l+3fVrUBs/5V+CgJ7mcOpDid8pbs
jxDke7Rp8cWL/TmUWj77Y3Zigco85CAQp5TmXzjPoDoWyq52w7Fhqok9qIKzIlc2lXkUb5snAKBm
b5z+8CF4IzyrAvtHpE1fxiG2ClUN+PR/o4M/PLr2FPl6l5ykwiI0eBixQWBX9biSey+Lmv7HFawm
I5zZk5Xtdg49A3QRyhxZkSfb5VKnBtkgbpBXzHIhGDFoEO91E+z5B1Z3Q1nmrsyxwyUIf6iQrSek
uTYpc8hKYXKuo98cx2FaCcSxuBtzqK5SgXO+nVIx4D2MWCJNNdcm0KEr74zg8bp7OO6SaK31QAjs
N5mwLNcTjLcjdVOL71hg3Gzmy9wxQPZQ5Xb4VYId6G0f3KmBWxxYbn845rFw/10/m8FIfJj3Vu0F
lJFBTqvDQ7TakhdBzD5kDWXmCIYu4s9L+r/10r5fZbLVA954WksvGjomnnEPUzcsdsUPlc7JC95j
lj8FoN4ZoH7iHFI3yH2kMlJI73oIa0Va5LlgoRgNk8oH3TNl0AOi6kpaqLDuSMw3Rn+lfjH/IWUE
jrP5C/icZjD11zciCr0qxi2yKpYc6hn7H/bL0Z/MpvWlS75ShevHoTNfdmCcgU9y7huqc6543E40
W8JwM/1bii0xZ4+JUY3yczA2n06Sz59kJco1JcbFh0MRIU7c3WpMgUJvaPPgMfwQaCo4ri53Qrp6
wKmOEYOGMViYwyBbYaqgHOGtQ3Z+o0eMG3/iswvI+cNNFOn9W5H9uFdsVDeKo5NCZqV8yBJo512/
VFuo166UtQuoHn3pAUXHVqH8lnQaJWHkDG0GUVqpOLKMbbKknuheIS+oHGfslWElztK+2WKxj+aY
1wSdpPZoP7xCCXfg0TYi2bnThOotcDJ7HYtIjf/ArFzBfgNjTblmi1vK/OWzry378Ix7ZnPlSo50
ZrYfBfaDXO81WwIVne4nmgXNtQexhRUu4GnUR9zv9h8C6eYFP2xEwUyp/SWYBDIcII/6Onwv1RA6
V6rMSLfWBpy3jJn7bzTnc4jxPo6d+xUUuDV1IJ8c8ZV+/1v6M+PYhwZIK1h8djn5grVrQFm3q6Wt
MrfC0FarJ9BEtXQaO/VReWjqgwihnDOkf3y09rpJsQ6qqTcq+76mJgwUKiY0DD1/nmr8RtOAHnyZ
BD8Qi5rC6qLk0GkaNMZsRxxqylKc+F14HXNs6Km0bD7Mu7IsDRis9ThjcVaMRtDcdYu515M1Hfkk
UV3WJtom8rxk067Y+RuWYQ63BPR37t8T0+AWugxM0IeWM+HTqfUvN9SuhbYFKIpzRPWhB4O45ppa
W/P2oZus2BPgMp1kAQvMpNDRCEYmJwT8s7q2XOY9pyD+DJzGcx6c18BFM+ajXuuFFrcbRiGI7DVC
pUga5McZ1Igvz8T9xOv/TkjxxjUnFEoAMckXVBNuZxsXLDdOIGXgG07IzO6EaYrADcFf3gF222oj
pctvCANwmYhQYi8sHTDuUvZkg+LqbmwG0l/FlB3H6bCYLLGs8eJYv8l76ZoDv5iiLclNUeCDMc7r
bYXkmVWZ3xAzV5qalMgeUXydsIM2yA+ndHhF/8gPM3hoUD4H3sXCmVYG6MiHVlCkzTGHkWbbn6S0
yKWm19vCd6VUmTnclwrw/qDbYQS6+JrqBo+eazRxePBQ+sd9kfFEMYGopMpAtOBfFIC41gR9V0qy
m0HwL/Sv5N7QzXzaGFD7kgIqYvAThGR2jIzcksoczaGt/Aus9IVxcjXuLxo9/Vq6C8qA9mE58PNC
t6JisrOYkvC705i31eqvd2/QACBlYWXJ02zmeoyF3xWEpQiOHdglXZveep/NQFo2EEirJR6M8ckA
YkdXN1vukt3SPThc1dRKwMzZyomKB/9nzjQWP7W2quV2L4rOZ2qsdD8BFLU0LpOgvwFgZHJ7X+5v
Cd1cBKE8tkbEO1Op9hRY2FSBUhPeTwSgRcxjDiQSVQmv9USPgeWCmmBqqo1jMydgTkRdy+yMFbGc
jw00eZfc3/wRY8jDRwdPGLsFn3wrYyJySL7ZCoR462vaOXELRcozxuSXvw7mMfQWwEuq3o1A2dia
u/GmeWt3hlunH/OkUDmlZP6vMHZYonmU1LSPmSfN18BpxtBtbmeIxO1H3+0dNN4DBxc84HqeOuKk
hOxBlu+ajShFYQn3K8zGbESn1Nv/Kp7Bh6cxWdsxRUdMBHqDoprgnsv6Ky68hqn+Gf9ED0yawvmO
4mXAEWQEsR6Ank7IP++8N2E96nmYkVU0eO9OKxrvUcf+LlWajrbqMLawk1kLXPisn04rdTW2wKlt
lF+RXPGQLtRyj4YrmO/C2Y45XSoGWTyy1oeCA3cAY8IQeA6nSLNMA9+Nfob17N52dv4XZpRShQT4
TcESeLCtwdPyT7j5qnLvujKhfrNoWx27rJW7D83fwQ15FTlwSpa5jYq3+GEhiU9dG1AUSzVpnXpq
6gwhDrs+16LNPgH5dMoPf8lQDQXI49oip3s3jd81dVH/9mthEgq4/QGYCZ9+SrnAXsWTPSrfcSkw
IHVhjto4nu1yEV84QNsoVT7FI0DzhSpslGm4CQWe/09X+x+pppGmt/LCgvbsPkf5tVUphxg8P5ou
JOAPTC3+CGBrOIF064vcPttIjQ9Eacsnx5S8bBQgiM3htAA5l55z1OnvkUl7a4W4VwyhhxbfnuvC
C1fTopPX4bKdDxbNcyaevbh/HWyAfRpGogk+7TzocOUvKF/2p2RRLt3jo5S770F8pQfFq5hVI6Mf
Io34PfqQ4tOv9biHAUNrj3ZusOuBTa3MLhMNW5Wfmiy5KTmKdEVZjNMUnornWFeTmdrIjJdMuOKx
Ws7owaN5zszfPslkVHa5L0yoUTPdKm1KXQrUEkjiADo9FCNWzgV2IDwICA7KF9hhM0hn50nob17M
xCHc6WA7h/LRiUDLl5JRbZmwG0lBZbcjIHvpPN2PeuY6a2dTQfZ2Y3OywiM9LpYHzeEpfZVMuY4e
h835Nh0lgIQmWcjJOdwuqiB3YrpavUEYmSJbD7vZFaQpVg50Q9ZRUaHitKD4qQlIYCz/c8Znwo6f
GN2D117emvQ9N9vohAU6StY1ZwbkUTDtg3NHnCIyye0XWm+MHDwvjqDvRAg5HHhvbi0Eto7cBPky
AkDqSZ9le6gEwaPQVnakxHL8vkdfrNj11h3fDGu3uGO+WhtA0casLk6bhBIjyyGRo5kLMULyRyF6
sGUfHExFgNycJTmZEVMzpAQZ538L5J/DtSLwOHUKQKAyCWrNDb1Il0ZkN7ma7KmLHlPr73SZ+iIs
WZUehSEgv1XBQR6Uzx6oJ8MuTsvXV+0eM0zDSikQmk1d1JqQpEyjBeCUkZ3TJXMZ+/I1uAI2O7hj
nf6hzwtBD8sS+d3nzbmcI/Lac6ulRMtn3IoD02FGpgOMsRGhbbbrAf6/E3rpwZsOihG31a8INiMb
9wucyA9175qv3zN5g/rssZLC5wHrYJyWAvfJQPI5Sa8ErXNcVZSfovT62kW2ukPvQl/lAEW8uedz
2Zg4LPxAB96Nnz3Iy/RjnpkqYtue0kex3/auqX30VDlRvgBKDIBM1BLpGYcCeTjYfumRpiqnf/zA
8F+4jiWlcYY2mVqqlratlSP/rrJbHAZT3ptVyqsaxc5k4eWwxsP/0oRu1X3n/S/R6v+10U7P/pTu
aS2I8QPF1qXeT8husx2N/TH3zIC1sjJEb1gwAhiSuEmDdJYBb8ED/YCTv4YrMa1mqSuzpiJH4dg5
nZypckVIpIYcgpkc/oBoMj2zm69pyLZ8IK6cmORTovFvAr8+cesDDLoD6gmAOx+GMqlvof3V0D6y
aLF6oGU0fmBKRTsL6cR1MSf8rnjCJDySfpY89PblWiKS1NHPRWMvCpIE/816xdizmwBuoVFR22Ld
2YUTvQGbnlExMXtW3L0pPTVTsBQDDRXrklivkGzJ+swkfcxIDwZYMek55ut/u56yhCBHI/fHq3Kv
7McuFbNWAUG/F7uVwlL1n7Dh2pWNaqPi+dmHPDEm7irhsY9P63MFlLVYNERxBVKzvs883w/THKb7
CEjHZpTPhF23ARNl3Rr8ipvh67GravZjNgImyOllzEBI4UBgYCk3TwtitlA0ZHgDASXANdRgPxiW
GaGMybd2KlfeUp8aOy7QWcssS1jx00CgPrCxUNRBEihSrIQgZ9OqYl/HvTNzDGm/3I4BfcdI+1E0
DqeNIufOscQHygWr4R9kSPsxpMNNBIaRXy2gW6r705m5vwGTegGLuZ3+WVBYDJ3J/CAiaA0+mwtw
vHtcfdIkIsg9HSJPAhh9VD2gYvhjiUnHas09mJwJlLHR0OxOzcQzWIFBInce+NnydHp8sTA61pJt
lsmXxUFYMDP/2EwYdsGFwd1fhrN3JiFl2vuL49BcyhabzFM5QtPi6gy9Z3j1ZkR6KcrViKs4HSD/
ilGEjx2YvKOH2jWm6ky9cBEhXKEPHtJNEz5EHVCt9wq+frAvEUb3wLzish6hamuYGZMNRH12QMp1
MiugM+rnbwAXuj4patlgG6BjNSDp+JxW/LQZnnBjK15rKyTTd0bNp5j9QwCDmE3vdxGWuVLJvJWI
gAi36b+ZiBpwlQIqh8bMirlUU2JMMkUsaa6oQZua/O25NHS3IrYADf+CqvL6Pj0UTbhpLSPLHYTW
6lhiawUdb87wGZ5W83n8K2MgvttfFC+khAewr0BRaosF+hBilqLtTh3ZMSz5tf9knE31VSQ2fq1B
km9hJGPQ8V9Mx/IFpR0oLQa4HGJxuyLef1TJcA95EKFa0rsQw7AG4+M6+M5PFDOK2O5P3UvKOwTN
RGqryE9zfiSf1YM3QL72UqrM+ZJiVYagsD25tubJt22JAUlioCMextEd0F86N4eYaSg5K9v4+PEK
QUex0KyoqERdHqEpStCTgiVZ8EFyFHRCT9C4wKb1TM/ns7Yb2jJBkrsl+FGYOdFrFit/vGf0EQTU
gCeXE4ZFm5UDR4ZNX1s7GH7xTCz4k9R/bQPtGVcUarbWLdKs+3aFfeLmcKqvMR+UHcG1m25uidJv
hgHxMI0SeXy3JflOMDaH31QvjWTMiop3d21RYNmk/PyTsZP5IjkHyz+1xFzNk5msMbFrc4k6nLp9
+tULxpB440+Tjkn23FoUXNbP8Tsxz3t124Qoy+yJVhmNp7HTWY4pIsAXnPEU/g+emRy60M/yu5oC
L+K8+N005Tan+mShnNHtWWQh0bYm+/EwwQ0I/ZoIDvmtBQouSQ79KrfGZ162eEpUywSgeq7uU/D5
zQo7ai/IWl4Yu5quFVA7/5CmMKtLxKLlIh9MMIC2vFQuIzMM5GAgZWJdFlMenUBKwp8dey695tgC
kh6Emv3P1ewNVW7GX4tt2HjkZeTsyBy2pPFsPYk8w8LkzvHDokxC9SGOr9EGYa2jtDDdiO6k4lU2
UtZzDjh/p/FVAMpeG7kcGgf9LzFmtLEZesDhMHE/fheHPLQMXZayDKvgIMQ0YGNKhmq633BgxDap
V5wR83P+c8Qq3u3+eTGfXhg1zG3Jsb6t2zGWJ5ixC7exIOYVdFbvbSSNdi8GRKuRsl7YUsyHRjUe
iaEIo7AmHgb1bIaaAaijWce23Uxfth8CRAvsI+nVIa+WmSk1tTGCqBqjJjE2BuMnWViODotGYFqy
U0b3BxBA67bWFE1oUJTeKl/KBagqdxkF4YMdWKnfJknPpYrMbNa0E93sBPGsMEW6/tsEynuhOOwd
tVxF/C3KVVQGfw2jpW/E7CDnjAsoPDvRQG6CWht8/b0OVplQtyq5b6/0psu3ltUk4poPg7UFDGpL
YKLHouJ2xEppg7s8tYW9YT9tatOpdsosrjBdkbvpYiegSptr8IE33nVSJygXxZgvfxV4bH1p6RLY
szT85nAcsVHDt+bWZB8/0r62V2H9vqLEHOwNZC+uukGcEU5yDw7jtMGD2OSTY/09jSVwwXr1kDjB
Xh6nr3CncITv1/J3lEmr3Njw9YflC5rC0ow0cuVW5xZrsuOKJRlGynMQvMjjxCLIDKGo/P4bMFsQ
VRcEE2EYL0IoiirHADERcCuciQ1iSnVt8CjycjnpiOuNouNp6SRb3E89KdACFKc4sL1GDErF41mL
775p7i2CfqF/i2RGWs2cW9dTB//EhU6ZMdWmVhCPd7Fb7gydcN2OQIZTQuFoTb94jprmIMZ57jX+
BAkLXqLvkRLrdi+iDhIbQ5OusPFcr1pO1ISDuKW0XOpxmPfx+ycHGBQ4+d3eChYzjMWxnCAB1e7O
2mNfw+wOlCYP/TB8oCcW+Gdpkq+Llmr47vMEAEcYXybLFghz9l6rRnCvo9O9pkjc6PJXm5aBzSiT
uy5at1NMXbXxUCMdCEUS1yW0JyCIXa8lKfv89Oxj1LbT+OmwY49hzmVcvm+RjP8L/UDwdhc2kyA9
3RSaAIMkmQU4UwIZ5pn5dYoVtmyn7e8MsFtLEtL1LNNYjR3TukKs3jmT1vSCeIL6JZoFJZwM6D82
9Y4RwXMs4m6W5IKrMHjXHJVznCHcnwcVeU8SBwYxA6PZwIImD7hiLtzMmbes0VvraoV95oKiSPZO
nV6hPf2e2gJAJACG7hrfy6R6rFiqIBrCuQ7ZzpweuEaHbLnbhKROgFckKsR7bHauD9Ac5VAOB+KI
YZNX3wistksxwFiXGvybIK+rrGRGF7kvV8gN8AmEoAWR0MHQxp2J9j+aD9np6v3VeX1GizSOAFqM
A2ql83ovzUJf93CAtc9IsdWfsrVF09UhqTvx09whKS1wBmOi2Ykd6Bj8npvjsKAjLpYMDtSchjCo
+rdWVd6NAvvqpfSrV/RzFiE9Mo/a0/pbUeJOKyXEE23OkQzPZ10dJo8Dfmq7cQrTMBkxOa2t4LbA
1Gk3rsJCtQh1+qGsdqL57MWg5G9oqX5SyYEuTzDsHJZ4gYoVdJ9IXT+dhRPTzhwjFnkY5PFAbg3E
O66Tc+j4od8sBP6ugnRmJ8CJPeskJp25SmoO/H0Jdtp2gZ/lADX7Cl9TtTrkCNqZ9lf7y1+CU1LV
2dezHNJ4sYmINWbw7ollhbZrIYyrQPDzpd7ZVVYvucm53H4M4mk2Xd0K3Q1V6cAOqnOwHCUPFzc8
7zZO1tcxSD7e62cJkKkDuTmtzLdfmhz1NT9ec+YHbEawQ+8ziEvSeMlcJ5vKdjbA38P/QwHzZjJq
krL+2y+hQlMJ0CDoEi4EoQSc+UXHG0RN5tzM860jfIN1DBux4YSJj3vYBki4zVJj+7zFWdwu1voW
V/uoqQ8hC8OxUV9Kts9RmMawYCSvY3DkMakaRmsFfTt59OpJCemPfdTNWw+nxPySN1AKruNlYxnQ
7QaTTlPpbTRFIc3zks1jxDGWSQGaWOgoUtbxb7eWRS+XzxgylDTiX/tJFmDTkW3zyWU6CPRNeOBJ
4deFbla/RxhtgF943U9dmrDuJPPhQExAmPoZWvcOnbJy19XxmGHKk+T0iwHmrFLfoOkqg9S8Q7sE
ut1A1s64XHVGWySYuTwUL2YMY7zfTJSjZpYHQifZ3SfeO+6rmn2nLSIDhlDDgSBqW9SFx+kCCIZ4
SfaoHb7zRiW590u59bf5/xL/4HGcKeSJuCf5BQo4FCbJHjXZCHX/SOn+54uupy5NvNGKnH+8FZYk
OvzHfccV2yMFdMWx6lEAR7sELuJSWI94PzHEa1ugy/KcaOW0EqrL21wjS0Me2Qg6LaGWSct/CKZY
tpqQLgK0PEcV9eXq0hw2TVWxrfva+Xk36gTSCpf62mc5PijC1yf62fIeaBMAq9/aXL23HIitRq/n
y8bTaiNY9/t8jwfB4S7MQF4zv11qfZDqG8+PFgA9LR7rvnpZb4rG25s2gmTXP6GEuqzRy1Qlbif9
kqFds1/5Lia/wGvQw9kOgHCMmkNq7jcYdXa7HHcfdpCLU3n1+v0vlnU2jB5IS8/mPHGA4HfNB/8M
AaxRR9N/dyI+AyzFfowBPMwnXcLJdAlScWQjs3iyv7U4OUBQ3fNXwDWVMmOzXBXn3p0duJc2vpiP
Urw2EOnld+JeG3hfFBtITft0d6Q2T+fIF68k+Vy7/JC8LBRWyTL9Aqk7+nhKxHMWbQNLSPwXXDyO
kJr8GotsOsS4YvrKgqfa5JWvyYET4Qz0rw9/xN0RY5iqH7l3HJF7Zn6m3RzAd8TF/1LPw4MVBMvT
NdxitZO+ora2PsJhOt3vtC204oTgF4nqXzJV4xG+9idoppwE9Llsf+FXWJLpLnxKyJhljqBTFurm
8j01+NUP1a7jx+qGYZ//kgEwhvKQaegggUBwwtFovHy/YrRwRNil3lI/14oLAJt31v23zTjveLRH
FcqvqusB3E9cQIU5gYHgNC6fX/BJRvf+IHH5f9p4ZkG0IUXETXnGRl4SL3BVSfaWxETrSYsO12mW
QfpUmaXKwTCa/p5MtutF0szzfn33PkUyXMCauTr+YPFvSrB9xnwasaJGFl6FFMk+t+IEQoHXo50d
0OWlMlvRNoWiy9zkguKPFJ8eIb930zDRdgQ4jBx654rTQkvO38dkk/ud6Ik6FHihMc/RyB1KvA5j
rAmTe+VtsouyaHuRYn+98c2FG5Q+CL01aXHTjn8/DjwbFmyI9+CZbzHnBF+kXRZxuoFCuHiw+oTK
zRu+3YU4Q0B+6ly51NHoKUguflihAD58PXVVxf6sbA9N+t80Y8PcTy56zqV0tq1VMfkzc4ELKaL/
eFaYGQ7fl5LewPc+Xr5s/cxSajJYVe5AXJe55e5H+lyEchrg1W3JpOetJGOtcxaa4064NYjaH6eJ
E22LKMI=
`protect end_protected
| bsd-2-clause | 6205300ac0a078b0bc539db3ec9e2671 | 0.951776 | 1.81327 | false | false | false | false |
codepainters/vhdl-utils | top.vhd | 1 | 2,099 | ----------------------------------------------------------------------------------
-- This file is only used for some quick synthesis checks
----------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.ALL;
entity top is
port(clk : in std_logic;
strb : in std_logic;
rs : in std_logic;
ready : out std_logic;
db : in std_logic_vector(7 downto 0);
-- LCD interface
lcd_e : out STD_LOGIC;
lcd_rs : out STD_LOGIC;
lcd_rw : out STD_LOGIC;
sf_d : inout STD_LOGIC_VECTOR(11 downto 8);
-- StrataFlash chip enable
sf_ce0 : out STD_LOGIC);
end top;
architecture rtl of top is
component clock_prescaler is
generic (n : integer range 2 to 16;
exp : integer range 0 to 10);
port(clk : in std_logic;
q : out std_logic);
end component;
component hd44780_iface is
generic (time_base_period : integer);
port(
-- main clock
clk : in std_logic;
time_base : in std_logic;
-- control interface
db : in std_logic_vector(7 downto 0);
rs : in std_logic;
strb : in std_logic;
rdy : out std_logic;
-- outputs to LCD
lcd_e : out std_logic;
lcd_rs : out std_logic;
lcd_rw : out std_logic;
lcd_d : out std_logic_vector(7 downto 4));
end component;
signal time_base : std_logic;
begin
sf_ce0 <= '0';
prescaler : clock_prescaler
generic map(n => 3, exp => 3)
port map(clk => clk, q => time_base);
lcd : hd44780_iface
generic map (time_base_period => 100)
port map(clk => clk,
lcd_e => lcd_e,
lcd_rs => lcd_rs,
lcd_rw => lcd_rw,
lcd_d => sf_d,
db => db,
rs => rs,
strb => strb,
rdy => ready,
time_base => time_base
);
end rtl;
| bsd-2-clause | fcbeaa1d8e97867810e65a4ae05a5ac1 | 0.451167 | 3.975379 | false | false | false | false |
inmcm/Zynq_Custom_Core_Templates | example_core_lite_1.0/src/example_core.vhd | 1 | 3,476 | ----------------------------------------------------------------------------------
-- Engineer: Calvin McCoy
--
-- Create Date: 10:49:19 03/04/2016
-- Design Name: Zynq Example Core
-- Module Name: example_core - Behavioral
-- Project Name: Zynq Example Core Template
-- Target Devices: Zynq-7000
-- Tool versions: Vivado 2015.1
-- Description:
--
-- Dependencies:
--
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
--
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;
entity example_core is
Port ( SYS_CLK : in STD_LOGIC;
RST : in STD_LOGIC;
SELECT_IN : in STD_LOGIC_VECTOR (31 downto 0);
INT_A : in STD_LOGIC_VECTOR (31 downto 0);
INT_B : in STD_LOGIC_VECTOR (31 downto 0);
CNTR_OUT : out STD_LOGIC_VECTOR (31 downto 0);
ADD_C : out STD_LOGIC_VECTOR (31 downto 0);
MUL_C1 : out STD_LOGIC_VECTOR (31 downto 0);
MUL_C2 : out STD_LOGIC_VECTOR (31 downto 0);
REV_A : out STD_LOGIC_VECTOR (31 downto 0);
INV_B : out STD_LOGIC_VECTOR (31 downto 0);
SELECT_OUT : out STD_LOGIC_VECTOR (31 downto 0));
end example_core;
architecture Behavioral of example_core is
signal unsigned_a : unsigned(31 downto 0) := (others => '0');
signal unsigned_b : unsigned(31 downto 0) := (others => '0');
signal product : unsigned(63 downto 0) := (others => '0');
signal sum : unsigned(31 downto 0) := (others => '0');
signal free_run_cntr : unsigned(31 downto 0);
begin
------------------------
-- Sync Statements
------------------------
Sync_Process : process(SYS_CLK)
begin
if (SYS_CLK'event and SYS_CLK = '1') then
if (RST = '0') then
product <= (others => '0');
sum <= (others => '0');
free_run_cntr <= (others => '0');
else
product <= unsigned_a * unsigned_b;
sum <= unsigned_a + unsigned_b;
free_run_cntr <= free_run_cntr + 1;
end if;
end if;
end process;
------------------------
-- Async Statements
------------------------
-- Generate Bit Inversion of INT_B
INV_B <= NOT INT_B;
-- Bit Reverse of INT_A
reverse_bits : for i in 0 to 31 generate
REV_A(i) <= INT_A(31-i);
end generate;
-- Arbitary Output Selector
with SELECT_IN select
SELECT_OUT <= X"12345678" when X"00000000",
X"ABABABAB" when X"00000001",
X"80000001" when X"00000002",
X"9ABCDEF0" when X"00000003",
X"C3C3C3C3" when X"FFFFFFFF",
X"81818181" when X"00000022",
X"99999999" when X"99999999",
X"ABABABAB" when X"F0000000",
X"12488421" when X"0007E000",
X"FEEDABBA" when X"76543210",
X"A6AAE961" when X"3787A668",
X"FFFFFFFF" when others;
------------------------
-- Type Translation
------------------------
-- Output Conversion
MUL_C1 <= std_logic_vector(product(31 downto 0));
MUL_C2 <= std_logic_vector(product(63 downto 32));
ADD_C <= std_logic_vector(sum);
CNTR_OUT <= std_logic_vector(free_run_cntr);
-- Input Conversion
unsigned_a <= unsigned(INT_A);
unsigned_b <= unsigned(INT_B);
end Behavioral;
| mit | 47e53a2df5055c148ce148ca0f248e22 | 0.510069 | 3.75378 | false | false | false | false |
codepainters/vhdl-utils | hd44780_iface.vhd | 1 | 8,910 | ----------------------------------------------------------------------------------
-- Copyright (c) 2015, Przemyslaw Wegrzyn <[email protected]>
-- This file is distributed under the Modified BSD License.
--
-- This modules implements a basic interface to HD44780-based LCD display
-- in 4-bit data bus mode.
--
-- Note: this module only takes care of intializing the display and switching it
-- to 4-bit mode, and ensures proper timing. Any further display intialization
-- has to be done by the user.
----------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity hd44780_iface is
generic (
-- period of the time base pulses (in microseconds, unfortunately ISE
-- doesn't allow physical types here), 100us should give a good choice
time_base_period : integer);
port (
-- main clock
clk : in std_logic;
-- time_base is used to measure delays, it should go 1 for
-- one clk cycle every time_base_period
time_base : in std_logic;
-- control interface
db : in std_logic_vector(7 downto 0);
rs : in std_logic;
strb : in std_logic;
rdy : out std_logic;
-- outputs to LCD
lcd_e : out std_logic;
lcd_rs : out std_logic;
lcd_rw : out std_logic;
lcd_d : out std_logic_vector(7 downto 4));
end hd44780_iface;
architecture behavioral of hd44780_iface is
-- intial delay after power - 50ms
constant POWER_ON_DELAY : integer := 50_000 / time_base_period;
-- delay after each instruction in the init sequence. HD44780 requires 4.1ms
-- after first instruction, for simplicty use 5ms for each
constant INIT_DELAY : integer := 5_000 / time_base_period;
constant NIBBLE_DELAY : integer := 100 / time_base_period;
constant CMD_DELAY : integer := 2_000 / time_base_period;
-- main FSM (sequencer) states
type state_type is (power_on, init_write, init_wait, ready, d_write_nh, d_wait_nh, d_write_nl, d_wait_nl);
signal state : state_type := power_on;
-- initialization sequence
subtype init_op is std_logic_vector(3 downto 0);
type init_ops_array is array(0 to 3) of init_op;
constant init_ops : init_ops_array := (x"3", x"3", x"3", x"2");
signal init_ptr : integer range 0 to init_ops'high := 0;
-- request latch
signal r_data : std_logic_vector(7 downto 0);
signal r_rs : std_logic;
-- current nibble, 0 for high nibble
signal nibble : integer range 0 to 1 := 1;
-- writer FSM, starting in delay state allows for initial power-on delay
type wr_state_type is (wr_ready, wr_setup, wr_strobe, wr_wait);
signal wr_state : wr_state_type := wr_wait;
signal wr_start : std_logic := '0';
-- helper function to calculate number of bits needed for delay counter
function ceillog2 (constant n : natural) return natural is
begin
for m in 0 to 35 loop
if 2**m >= n then
return m;
end if;
end loop;
return 0;
end function;
constant wr_delay_bits : integer := ceillog2(POWER_ON_DELAY) + 1;
signal wr_delay : signed(wr_delay_bits - 2 downto 0);
signal wr_delay_cnt : signed(wr_delay_bits - 1 downto 0) := to_signed(POWER_ON_DELAY, wr_delay_bits);
signal wr_busy : std_logic;
begin
-- main controller FSM
sequencer : process(clk) is
begin
if(clk'event and clk = '1') then
case state is
when power_on =>
-- in this state we wait for the writer to become ready,
-- it executes the initial power on delay
if wr_state = wr_ready then
state <= init_write;
wr_delay <= to_signed(INIT_DELAY, wr_delay_bits - 1);
wr_start <= '1';
end if;
when init_write =>
-- wait until writer starts its job
if wr_state /= wr_ready then
state <= init_wait;
wr_start <= '0';
end if;
when init_wait =>
-- wait until writer is done
if wr_state = wr_ready then
if init_ptr = init_ops'high then
-- that was the last command, we are ready
state <= ready;
else
-- advance to the next instruction
init_ptr <= init_ptr + 1;
state <= init_write;
wr_delay <= to_signed(INIT_DELAY, wr_delay_bits - 1);
wr_start <= '1';
end if;
end if;
-- intialization done
when ready =>
-- note: we use main clock here, so we "catch" input asap
if strb = '1' then
-- latch input data
r_data <= db;
r_rs <= rs;
-- start with high nibble
state <= d_write_nh;
wr_start <= '1';
wr_delay <= to_signed(NIBBLE_DELAY, wr_delay_bits - 1);
end if;
when d_write_nh =>
if wr_state /= wr_ready then
state <= d_wait_nh;
wr_start <= '0';
end if;
when d_wait_nh =>
if wr_state = wr_ready then
state <= d_write_nl;
wr_start <= '1';
wr_delay <= to_signed(CMD_DELAY, wr_delay_bits - 1);
end if;
when d_write_nl =>
if wr_state /= wr_ready then
state <= d_wait_nl;
wr_start <= '0';
end if;
when d_wait_nl =>
if wr_state = wr_ready then
state <= ready;
end if;
end case;
end if;
end process;
-- output busy signal only goes low in 'ready' state
rdy <= '1' when state = ready else '0';
-- timer process waits for 1 on ws_start signal, then it preloads
-- wr_delay_cnt from wr_delay and starts couting down
timer : process(clk)
begin
-- note: this process only changes state on time_base pulses
if (clk'event and clk = '1' and time_base = '1') then
if wr_start = '1' then
wr_delay_cnt <= '0' & wr_delay;
else
if wr_delay_cnt(wr_delay_cnt'high) = '0' then
wr_delay_cnt <= wr_delay_cnt - 1;
end if;
end if;
end if;
end process;
-- this process is generating LCD E signal with proper timing
writer : process(clk)
begin
-- note: this process only changes state on time_base pulses
if (clk'event and clk = '1' and time_base = '1') then
case wr_state is
when wr_ready =>
-- wait for 1 on wr_start (which also triggers delay counter)
if wr_start = '1' then
wr_state <= wr_setup;
end if;
when wr_setup =>
-- this state introduces setup time of 1 time_base period
wr_state <= wr_strobe;
when wr_strobe =>
-- set E high for 1 time_base period
wr_state <= wr_wait;
when wr_wait =>
-- finally wait for the delay counter to wrap around and return to wr_ready
if wr_delay_cnt(wr_delay_cnt'high) = '1' then
wr_state <= wr_ready;
end if;
end case;
end if;
end process;
-- E signal gets high only when writer FSM in wr_strobe state
lcd_e <= '1' when wr_state = wr_strobe else '0';
-- LCD data can come from latched input byte or init commands table
lcd_d <= init_ops(init_ptr) when state = init_wait
else r_data(7 downto 4) when state = d_wait_nh
else r_data(3 downto 0) when state = d_wait_nl
else (others => 'X');
-- for init commands RS is 0, otherwise it comes from latched user input
lcd_rs <= '0' when state = init_wait
else r_rs when state = d_wait_nh or state = d_wait_nl
else 'X';
-- never read from the LCD controller
lcd_rw <= '0';
end behavioral;
| bsd-2-clause | ac598c3395122173e39b186b7ecacba4 | 0.494725 | 4.308511 | false | false | false | false |
szanni/aeshw | zybo-base/zybo_bsd/zybo_bsd.srcs/sources_1/bd/system/ip/system_auto_pc_5/blk_mem_gen_v8_1/blk_mem_gen_ecc_decoder.vhd | 27 | 24,873 | `protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
g2RN5TBir43ECxFrT/y2GRXX5NGDYpjq+n5gxNTYWsuzDCjF5YeYUisYseKLr1ryeyQynd8Epzt1
V06LipLPYg==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
eJKP4nowQhkS+sdlDJ3aF081jbTFWdzdlOBNNOlq8qkrol2Z2K32WIgnl06Lqx6yc1xJY0X0kmV8
eOkRE5vog2ePPioAy86OAcMONOPoHTqykW2qaaCPwvHqEP73jf7t4R18PaTf0PZeg4kzgW5BQXqF
THWJ0viu+pagUeVYQuI=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2013_09", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
MDIZ/fTOzwhXm05ObJ3zkVB2FpJAN9o34cB0jHfFprFQZmUeUQ3tZW60svZwBPLmTXGm6NjoSEnE
d1b16jr2OvP7e61sGc1GOIzSD5lAxq6KYGFDCFGlb2HKuXZP87xm86ePu57tT4ld2oGvDNavbknR
LLxhx9ZyBV7SuzGo3PKuxBA2tnF6vIEJkp4n2dqwXnKJw+xgySn5xCMvJuNm4ghYOfBAsNQGJ39j
9OlCVz84SN0I+ZhsnI7KhLpJBWOyFN5hfdsD0RVsTRLOBu1rLKX6200sXAdAwmaB9xg+3o0vilh4
pIPe6hkIVYlfHVKU7Znj0kURPqGkJtm2RI+CaA==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
RvD4A+WtjqxHYEUrji4gUWEBsLfMuiFWzgBi0pzOF5kWQsF7tHiiAC+dbiIZv5TBKh6/SeRqqj5f
up1ybf94wq9EXJ/d1afld/HRqNac4VRPTUzPBHt4z5dEncFPVDK4ucOaLAd/3B1aieNd9xn+mBS/
wR5gmSxp/s9f+zaVsS0=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
NS2iEv8S/DLjr8oIhLcaUy30De4W+2t5q2cf287k87h3kSCMEoBnjvcyRcG6CE1IFz2i6ewnJ0mb
4oesPU8Xde+4KmwGSKnw2OpNx1aFtJHy7C5xPLKHuYCmY+9zM9y9RMguGvxUNsPvXEO9G/4BQZtJ
xHf97YW4qiiYtbOsAO8R0m9UHVOYT94pj/6x0Itkq5yeU0YXuubMwNfZ5ZRnrVKNyxQ5Ilm1kGqH
N2bcD8eyFlVJydABBBV388JKwKrfOh5ZHUd8//7U9+6XMFYO4OGZzTYmAvyyO7iRRKEjPElnyW25
UoL5ziiALbB2biJ+eBPz4dgChqDQ9nB8HsYg8A==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 16672)
`protect data_block
P5M/4PHgCXWT4d5bQLyxafc9gPLXrc3don7LU1HGE8pT14607cJvKERJqXmRuw7Vu24p6Rikcq9u
GWX7pruE1bGxXU01kyIDlaQBCbgDyYm2PzZ2WcV3wJZBP2GqoNGGNnV9D8EoUe8nkfgNlnSFShtc
3gyImEfEmPx5WTUeprbCjuzexZHjL9ufilaP7sS564ZYueRr8CJEkkUenp0vPgr10Js6pUWUtqmv
dIhLyHLmwTEim0EIMvoUePfUfEe5QIDHQeFhIaYn6e4PLZqpxn+8TE5wRprrMb0/4UIt9Ughb91Y
EW2+F2Z6KVEbQWRpAub7VMwRNuyyQV0J65/pLA3A6rTE7Zgi7Rgmjdmml2+kv0ez3cYDsJawxcwu
4kbTfcolN2QPPPNOmEU1y8C3UFvGi1H9Pfw8g4O5YH7qS7KhFFRghD49E8fqSkVfiXnFq5ZNPCgJ
s83F4Cqdwflu8KU57Ccq2FsttPU6FWQyTL3b41ZPpeP4oNnRcomqAqIScuaZWr9xDbXzL1u8QEll
IWkICPFN5UsqfZh3UzZGS0VTeWQZJgW2WVS7cmgXSU9cGxtdK0iwmQHjC0zkwWHbtBNk7hwwIPtE
XTaVltnfe9twX4mAd3Ifbp3hgkEcWx1TRA1G+qggq83UQmsaUfPSoQMmB8OMZHOndrRAeM9Ux3WK
gJYC5lCKHthZgsPEyPEvSv1jUo9eVnzM4zx6KWxDfwQiURf0YsbJ9tp44FV+czYe961snK/mYnmW
R4ZFlquW4yfKcdlJMF7l4nOok9OTwk5KlSRs+e1gwm4WJO4vm4XqJjO3OruxP7IYhCr3ToZKi6/9
fyUgm5OLnZ9FZihAfDYedahvH6y7QmxrqM/oi7X5rH3K2eObEkWhUwfdovJRXpiS01RVy9cu3rup
9xvY4Y0C6/01SYeTB6XPcShVKj3FOTX6nPzQPQkhYlG2eNolyxk/mxOePULA7jk6ZW6Wqi+UCIby
IpEh1z1AuiN9Ig2zoN2TWgkocTA/fuisDeAllz11TjXw+U60Vmg6Z7fla1qrxokGcCr07zJiB/dx
rW6G5F62/FortVfdgE4uzGV8Z/vRczGf8+hj7CSil5rT9XvH28espi8U2JWcl876j6mtV9oeHX5k
h9ckaRU4Bvta3y4ZluzesxNMTiUL4bHOat2pgUz6rleaeWB38gV6qKbX5TlciG5FbLnd7Z2EhmBQ
KRSVDL7/Qo/kDWHP6muVBhZTvTx2iTr1adWEHxkyogMPVmMBDcDXjQfJc4Piru3t47NQs59cASDG
gROO9642IOIueo4Chayp4qPPNNYxC+4SyI/79YIKpVjHvwz6VGuYdGIRK8q+fCxkdpl+XzDlwBn8
fzZuslIFoBlMzRLif8ppiAUTbRK4feEoFabQGrkBHI2HI0ogfHrAmQDvLYKtC3iGvBw0DtkKbfQd
4HqmWtO7qqutSt22vw2OGHHE3A0W0xS9OHaLjAtMECIth2PDLruFYTkhQBoMXznoxsB+LLZUmROe
NrsrfRlgcbwQ62d6TUgp2CPM8gKxe3vZY+sl605rS/E2upbTAt+PZUNn6OeiwVKkMrd/QSZKCLWv
GvhDzdVCxAM1ec/SNRlvK116pK5VkXlkGw5PY/4ro4DqduLQEV6asUzB7H2Sp/jU0xKOO3Pvxkz0
ZUTVHfzUtARsJBKLaLCUWyQm/yYIWj1/gmqe3EXpwkuFUQuEsaNQdkq4/CKlOczcYnAyyPN5l7ON
ELF2CpCppXAK6KljY/WPXnem/QkE3PXwQIsL+isXw5vxMAMYWBurxiBXQHeW70f6FrpxCWgZjHWw
2fIjmauLrdEdqWNozepC1g2DBt+5UbekF+lv4KRuzf6IuGd1uB8ajy9So/S8eI2Ufd+UBOBx7J4f
BrjEkBARWVxbafl/pHM69jupClI5QalH8gogiy7XvPACrYTE7FVOY8RhmxQNUewO/cwhzGaR6aFW
wo/dks49DfBULTdLVW5snjvs7OSci7AH5qdh4zRRMHoa18n4ndVIuAKp43ybYWNxSo7Xxuqzby1B
3CDGGQeii9odDFtRhkI3g4aMaz09zjfPjzoBCU2Rr6Cwf5eUywIr+giUBbXb2z47cXsRmnmHJSTG
qQMMyZTqvpEV4SvBj4b8XV7yhM+UmkcAcokVgw+vJdq46knD/V+JwmIUVmkTqTZb+3dBeljZ8SkB
/KYCkFF/G4Jbz71zO2sdl1kmH1VlPEeOB0xUavI/kEbn6qFX9sGtSVdRPnbBd27VTSWbFxVr4Ol0
IK2z8hvPO42QgqugH97D29c7UH5uuH5bakCt3Kx5zUZhCbUmAGV6SDfu9abhzZdPB5xzeq80ZlVg
n3o58+NrQOerFimkjAwbOznp/0iFGYQwpB/5j/bABfZJ2D5hOcHvNA0WJgKmkcBWin+1CJt/x7kv
f0Rj2om44MXpn6QWssVsDLX5MvG4DWmdLoUQMFFs1MH5KY36WotcasWJWSdsYXoC/K9P5mDuSEkn
c7Rb0QUhrIuVLTy72gLn6oeM/5Dk3tnXuHrjc5dsbpV8NRmMqlwpt1vi8jL2ClCGYhPmCW0DGmzN
nPsmrXmoVRCJBI1wdK49J7vrvoQ6aBz4Kom9prFB2bkSATI034Tz73YZOZPtw/tgpfqneBs56cil
IniO9vdPdExXIyj+J6PafCF1QGh1aFU1f9vmXGFin18t780CrkePItPrq/VQb1zmHWSgaxcCCBWC
4Yjt/xtGUABkLpoKNqfDjO97y4+PtgpgvUYiroNfKhaQzkT8+tlFsbp2yn5LWbJsGgOToSW7FaZI
eEoHLrrR4DTtvHRGJq3NnkR+X2GAdKaj7eDFK8tA8D7iu0qErsIzJpi3u0fFRTWFKtFYagjLsxqm
w+AkavU4zxmUWUPoi7Lhb93JL2Rjz8AnKvVMNXR4hGd1SAWLL1Ge96k8Y1s/ZzPJ1rBWbB/2uGKx
F/ua9sK+7xm0zhZz7cTR6XtTdPv/d+zoZi14iQ9Rjz/U0nz2TDiZL21uZ3z/2ZgQ/zwzQU3CNFVj
AmTwq9bwv2Z2ouyhTqebBb22kdfJ0a06x6jkPTNUwifYuBFN93UcRVCpxZGNpFPqlufJsctPcxhS
IzqdHUNxFs+7Cn6p7ikqq/RbABIvMPUdATlF2KkupUVFtNgDurMB299y/bASiPJ7bDn1tIkRuIvs
O1bcp/v/JSVXEAXCQcJmMhhbYisTcLK4eS56/LLsV6l/WPVm7E3vktUz5BYB0C5q4cTHo8LnOcjK
sdA0CbYAmA/+hIXV3nYMZSO2cNiCVZNkhVS9dh4IDrSyiNVms2ASFrLKHkUkdDQ30MZBaY3ePKaW
wtBYLfAqxeLAm9SjsKwVVHwQXBa+e/mxLXJoTqWSO2RarayrU0y8SOEAxRZLdIuFYJRKDSGvxcQX
k6RJxfNZN4+MtQOB6DUAVyVRe6OlV90gQG0x8XNMe1ctq3ba3hzfGCazteMVBQtAxpyWZNar5Wwd
8Ga2tfzfzSaxFkIYiBobTnkYJuMPwSSoIjjSSnX2+FhlPnHvukxB7W6FZy0hLBsfcuqWTK+4eSKO
lPzcPoTV5X6XLUnsPS4D/P5XLKO+8oxEEA7QDWANcRmaTT+kQdKlP51cXuyRHwi0SrWmioit7dE6
SFHx5vv7YTRJHY7f+9dxhoudNY4WT3+Rl4VIO6dBF6JhnHJQPqMRIbTntnz6/fy7GQ6oDP1TsvY6
bFf9cr1/yOxCOXafhBnDvslKSl+1UQZopNGZ0QHOruICmCIQtpWVOU/Yn8CVPFadaOwcSKRq51hh
mPML9om3mKYcqFMVbrRT3AbzNsjrdnf3hj8sDnhYILlCveYnVU5VzWsZu6L49/Y4PCaQqluWTn2Y
e4oYJZtY2Sy+QQ32aKz7ZTnfU0GtYgVauZwz0el7PEdaw/dbPf+uxAeBZUKKNLGWvH0ULRhn5k2s
kt/i5/iu13GT23Pv+wNRI/OlgtA25KeCKsTe5xZRmbnvnf22zaHWOe5InJqD1nhsRia5wCWOaC1P
DVHC9wPE5QyOYZMO6jyYnJ8huAibT7jeACzsDGku284ciChHcCqZpHlVHJPVPxauN05n91Qi9+oP
/pTNX3Yd/pDwc4fcj9T6XnndmOMAEUB97u0rAFh+rNPuELE2cLM4GTSv9bC46+2i+RCR85vKz99o
6vURWeeVLNqnIeSvnuneu0wkNtSmqj580ciVF5MXxmke2SZwpMr6j316eJA34gPqDkLpPEKrCHdL
za2hzPA6Wjo69Ys1jd0YkVPfbbLaSXdxjyLTx9F5XjNduJBnCdDh32kDHV29bPICtvNlf7n3E3Dr
q7e29Bmz4bj6l7Rgha8N4goAKBEoI6Bu+H9yc6tEUexPCIE2MZS7Xil3XZzfGksztOoOE50iu+gJ
HOmblpxFVxNc/4EUmLwapE72Q1rq44WpkpXFS3XsHqWGYhf8aIbgq9M/yDOtfk2kpnxSLTFsSWBl
jGZ5d3fOyHXDF9gR/LKlPEGlWqI7COcwsxAi4OjoJje90OEgq1IndcSvb+ixafisjLVxduVWZ1V6
HLRSC7miUJ/684qLhIfc5UH6+RBDHqDcKEIEE2cpxlDBUl1ZTb2KK7hEADmyo1qZb9UwPjCqE1CP
LZ7TaYfKAR6dT+kt4ZZx8O65tjKKXtArbNdJgnzZX8Vu3IbQ0PAcMYSwgeBLkT2Tl7ErrI4HA+NA
PeKSTLMvGzyAsf5LfYFe8GY8SHelI47ekayEOc+tAoXG9vasCfHvehLJo46Vb6Ps/bWg5B6pSxZm
5a++tNMwR7XwWfxZ7JL75Xbt3znZVj8a4COou3iaq8PIcd900vHWAaDMRy5pg0CdnNZmvYlgFlar
Lh9P/nv70AdDP7fFWlccjq8mRBRJzfk+6amBw6b2DtkGteqdWd/9+3CfE4ugNA8m3SGFSVBTCM3X
6/SNXSxjSGZ7Y6zSWHaFQyLLKktPRVXQtiRbC5V8njIfND5gpBxtKsDZwg9WR4vF/m/+pUY9zWHD
UoAPQtMakRXU3obsqSJ4a01GzRgrxu8nQWb0EPRMoj8/f7JLD2XXOyusKzqQgQGA4Db9r55+1mLL
7jlsWr0GpL3qvMUWWNX/+O9r0Y6q6pZOAI8ad+0UGihUQ4G1Yef4QEQKB0QXTSl+Q8fJTOdXSDHr
tyUTD7e+6Qrj0cljfD+zOB9Eh6PzV4+z8t6BtT4+7Z3P16HhL1FqdrgCPsCTtNEUEVcTqK0M8rbC
+09EUnMuL55jXy3mroPrMFVadfkCDCmClJc8z/phmhZn6vzzuOaVL0ivtwH5k/BkVqVDozJiVc/4
xeIhaDM5NeYCWf8k9D0c6JxwHC8pLfbPoSA3t2Y6Y7P1k0eqJmdbSjwbua1lEVD/MoBwPr979T4K
0CDOAVmxk8LQ2X4S1GUIXPICvt3fGKFDrdBUq0BNyDooTYgksFbypO9q+mCPBzOJCoxtUFvI1PhH
tFaIEiTSwdzny7KQmk6Oh7TToJLGc2pc8LMItoMbPmc003HyLqzfN5KW/zmGpVAnRPIgTnwaxuN4
th3yqG2Qi7OfLlinhmWrUODgF/nw+MzLVQkinTyUIDJv/r6d7Z8Int8sb/DUJO/wMSSz7vtdoxrt
b0i3JdfoPiDhcaKRhT1KdvGWAf6EYgdu2OjaDwf//j6AtC56MtPQiopOHqkfunP++2t6e3ulKd/T
9/u6K/TXKgYhhMuKwmVxnfuaQVzyqpa5cEzbFaDtDgmSXODE0wy1Manm11EK/0+LGJIuo3JV0tn8
8CBEX2JAaRT4Xn19YwQ7GPqCaGnu0swVfZoka8obkfYNE5Jybhim+VtnFC3mlkMrczMb9OHhq1fZ
1h0ieAwajd3cxxNDFZNytULhdPQcisUNwqtmiPQ2xrw7Ao5cK9SqaggPyG2Oy4E8MMvI67actssk
nAVZe0NHHgZFW4sdo2H8gO1cJTipdT3hMlwx894zZha/kw8lFzqi2WzLhFoM2qiyPYTkC+1yv2x3
/jzM9kjdBtwcK1aGw6Mqq9luHgIRkw9X0uuCbXlvcVFdoD3+F92DXkAWbCzUMRtrzRpklsP5UFkQ
zVbBthO5kvHVFtp5OK4jbjteRmwWTMkfoX8Quk5LY92LTflg78QnGTvx1faNpG0ejs4AGWJaZS80
eNXCe9B8UyNtFVn4hx3zqqJ3VR0mvKxirqtg+8x6OWQldf0MjyyGfdj/pKDAxw+lBdVx4/66G1nJ
aKWIf28BzE+zkP+0v46WB8WsT0N/ZdiGyT0n4PpgkZa/hAdd+/+hgbGFPLHLxgE1912rthCU14eQ
uXwyESHjylfZd7OoB8QsrMGUJN4hh/HVoWKoiFQBnxZMOTcyEcdNFQe+a1nc9IyOSaf36EzIi/AX
GKrqmZ7+thxpfxnXUd3/s3lBuJy9mC3RhhCyawLL4v7gYg/IAmeYuWZrYPhSn48IAEf6ciWB5wcm
pek7xuWG2sYvtZyJu3l+RfdFhpZbjj08vIF2mqrJsA52pNuq+PfIjk9kcFozyCBO38hlG2RzqW5u
pQn3lVsfejbod9KJmqXzZDOtVoXseKcYYhCG5N1D0qs52Ajs341voWC93Nib9yknZ6XUjx9Ryzy2
gbvBv6aic3+Ke0wmFxBMGyymkNwNFLLo0A2vXw996BBd9KRJUgHgB+R8Gy3Ei7XPpjvHEMYQa378
173Z2Mi0xXcvOE+uFp2rVtw7Cw1qAyeOs1PnXKEsikcPv9ix9iIffrMg/E0BbtOjIl/JyVwoieLQ
dhDSe4AnLsU3Y0LYxjW+c51P00DlxzCe7wVAyvfljkWPs9XP4c4ejLoGR5QTWJJPHHigdfxQcn4W
UbuduyIMo3hhbVHut5xZPIEwv6GMZRYadNPfg+m+0chMDK/+AZLmQ2N8khOee9nnUJdY949nymsk
CA6AKRCB9LAQh5gbM7T9pGcQfbXp8hYn2+1j/DqDzu/8r2Ul0lb47JRhTX8/AsGXziSwEBXDxPbi
Dku0DEDNxGILJn/Ws/2vrl4xmaXOTSBcHVguuHbyQdx9J0D4F1V+GrjG+HfSB0c1mPvllR3dG46G
OiHvGoM3gpx+oW1Irtn50kurZAdaZeai6Pl1MhC0Qd0t22h0QhURqekFAa+oyShb+7W5Nep4mo+m
5jaleEa67622MjyFnaIOuw7WcnScrhfej7saUFr7lvyJ5pW6/o6tiJyPBM3cEqpFvjZaMwTa8+S3
iLJtbKqzf3qBIN0pkMX4UoNYzVGjec283kbyGZ6BgiFM9M9+NynSjV9zyzE67tsi9rTWD2PuBR40
j4dFrs+AHhsDjSQhRe2LvXcjCdh37GGy4jCIN7mP7DFAG5BYdN1EcgHp9IJMcXR8ebuOJ6icq+DZ
V8lCpHvJtWU6IpLfOu+gqV041L5QbiX8wCRVQ2pEezfgExChHmuN5kPwBbPYsHkI8QR56eotSfXN
MO1Z2FBqDDFTA3qQ9c3ZI7pPdBCYevM/d0s+A8Npc29pp6vopY/uMSPY/o2YfFZSf0D8FqrlssH4
/drcKmV/o3wmER1KnC7O0MuvKnq1tbijVPi8kItk1zKgjw5hMpbupdryk3zk1KRHL3X5jE0McOrp
kHTIX1rK0EFwc+l9hsjPAvFN3gteWuVxtTmvVRrlAXdJ3OYpte0rcK9BuATUxYtDsQ6HYzgMSEY5
ygqupJldAk7kDunNdat0mkRyXbp9hrTUMxgenDi4LSk3quVJca6WZI1WYdkB8l+s8akreI99zip8
jH89zvA5vgWGRHSz/ITAyBr4ej2gnKiFzNSxxOnbAfZyVJQ7p7Rwf+cOb+8Yto3DAW/fnbbidSWg
e178Eij+ppLIEgynJOMsdm24GY0p+XkOCLGQrCu+LVyiGRxMeEdwA+vWzUksb/jOVcjBuiLb+nGh
H4yehmue4/wzbXmpETxLN9UsGCsfLcNYVYbzUhsxl1wV8DaNOOs+zprr4PzSiHvRoELHKRAbee3L
sE46flC/Vp9Xofnk3N/r4IEJcMZsBdWfVhVpI+Y9nBMnzfdaLOWib3Rb1sXizOBqszivh4zh24gm
EYJ2phscTPMnmPld117ZspkMIrlm/W0U7xUuYfleHKrw+uGh7ca6KEP43J0CGLWJ6YWYH7Iu+ucM
gCQm1vyB+LdHR1XF5IUCgMLaqM+S/EVXT8/jk2BAgIVPlN9QI3uLEdX//8KjL72uqXWyF2nnL0uB
eelPTb4Ojm/va01fOjNKn7F3KAYe2rWAsYVOTuL89yr9h1FVBhGrtZxAO+D8cV/Mav4bWpwlO39a
ZsUSe+Zkt2ZCFe9glaY2oQeEEf/he2HNtNWUe2f4DvvBUDwvS04luf4Qmb6dQxLk5VGR76gUz/+4
AOV1PMtsv23Bc5Hrw0HiaepE59Qs2c/KPMztjBjCqJ26MAPH58cwA88PBwf+VpqzPHNwTjyU4qvf
NdkBvwOk6j7d6WcV0RGlOXrtf6S1P5AsCzPKZCUqODdfuWxEyPzf34gzAOdNuleMS14A2Q4EDWfk
qZ5kHD9ARQrhTsxQBJ4w5AcOqxOqatN8jD3PWaS37+9KTgpS209d592vLRWrbyIjlgZ9gTUPJwHD
liD9leEAHBGVt53VrN7bkEYVefGuwZFkGqYTc45VjknRo9Gn37g7uCtMp61HEhaKstLjTYNR0ds6
tLchQoIqD1IQlMINVwJzMPgpTmZxwVGGOeqnubs7q6blzAlOtHH/twZaC+Y1LFgL88O6haQ3oTTr
s960u+ZPJVAyq7/5hG0B58g1hrl8COcgJQVDJwcAALI+2+uF50WkYxY54THF3sLBE74fQISzAj2V
ZTeSSAnG5jSTiFUZd8ew4SWWXwKrm4Oh0IbdPLee+iqqBgisK8pTtS4pkwrk1W+4MyLPLP43dd11
16i9Ft9ksHq/CvkDiomstPMCxO2/pNNKAkOT3bxUflyypeSheZ+XJJhe2Hhc8/wqVbr5ImGhHF3Y
tmLPu+VT2mLBatqB2G4RACO66LkKKOO18Cn7j1p9lIJWgAgA7Bz78oFrZ4ctzht5bgi0n3nj8tHS
ePjTAh0USUM8IFkZ1i6/I5r/vXxSWC9XNCPsSdmpztSRmbmM1bBtDNorlG9sgkN0yPN0Hjv+F/n0
H1Z08nOhbiFX6ZpboLILYGIi764DkQcsnDhvKv1Zf2vBxwBX7d7oHQppaOVRCldhJBnKKK6Rv/Rb
qUyz01ssQIISjD10761B5Wxd5kCya2eoeKdWa629/exNg0YghJQDXg+2gbawIE+gBloYcHt+328p
NarC+s/3Kr37csWoRiRXsK4KeIr69AH2+FMM4UFu7IDGYWuCPDOjSWdZ0lWC+CGFdnttXt1IyrJ4
W5oY6wwkLDCASGjOEBOlN5ejs5tRNWF2pbItXHGGd1MWm8gBt5zwF719iVbx+CEIkLwwQ71BBJ+r
UBJXSHvp3U8X7f/YeC5T3linV5s+p34cLaXSg1EyUxLymSQUR7kPEBszkSqxajxMAPyb3AtpFPpI
oBoy+7En9aQ438Wk/32/huyMMnXKhIlinO1x09WjkHUXur9CECNMO4LE8WFWyl1OMGKkzaRx1S4t
MqDsGzHlssfAkxFP+1vGZETRhZGa8orZN3F+I/+MJ+BaoqADgpsOZzUEHZ+yFMHrIMH8JVs8sBlo
mGNAC2icgbl2WG3lb4k7LdS2GVj7DEOveH958O4WnMXIx0Ds1GCsrljfxl25r3//HzGuIK8JvDnx
zNUm9Kw1ZzdKIKR0+fqqRf7Lb1NuOYM0gWqfFnyv7GOjfMr1kcLkmqkll33u0QtdnXRCuX1BvfuB
Fmnk+LlpgqP76vLhfEH4ru3xvv3fXBczOlTwT44lj855ltEqAoY6nxU6SArvFT6ZkQ8vhT8zYGdG
uoljZHzwfv62VrjNiXuaa4Gm5yEswp58XFsGs/dYQ9xmmxHxp9s1MhzRFOy/asWehBX2jIRTHIPK
+IIkVpRBiqSS3fbTKGjRry6wL21mwDhOk8AnxEKsh7XZllUnElANwik6yd5HSoRWPTlyRCG8/Epu
FpUTOl6Diap6SPxwmWRusc4NJfctbfKGSc7g7IgG4dFZpgLI2OVcJ+2QY4tsJnvPABRApuqyzhI2
jym7OHfp4W+6Cu5vDm4h/Ja5piPy1aw2VvbAuPB+r62IU5StRDakJa/I4Zw2inlLi8C52zhosvJf
B9Tr3GqxHdRazaav+DOQm63gCxHaBXHI54Z1NJu3dUTSMJYo7z35MWYHoh9HssA1qISF/WvCkjfx
S/rY8NtQaSblG2ANtwXk5LFRzC+jFAc92ssxo/f3o3nQUFKnrubwCeuW0iQxfOihUHIbC0cIQ7KX
lELQb5LXGGAag5SCD+nYEWdNuuYQvPgftxJvRn0dCCFfyyYcrY5nskLB44Dc023SJChnI9KPe7g6
ITV0WNPkre3rIUq2kd9f7LiVH3qEeFptHzVGOYY5dYZEPI+lTn8m/KqUbX4w6AYTXFJPVsUPuFcb
oTFvmzNpre6cWvtEXAeq4y/B51c/kW3nxqoCuCqwyfEHnst3/Zn6lkcWRPeZy7Ny5Nwrw+RK48h2
GqW3gH+O/fMKkejMDSTLQrqLJaFpcyieIb3EiAXKSC8X2X5TzzxRxMFmGsey9I9ytCArN2WhavcP
3dWvxl9HchqDqJ2hlm2R4hras+f5WL9KlcR/GDaIMpWY4aFPvEmoXWHQI6Kfjd67f+QRvtSGPLVX
EP8ktD9mNX/gLVi7bavsIdg4WcJzKbmg/WXoYl22/m2ZN+o4T8XxOYSbggG82zYN2yX0UPi0MHjC
DBR0LXWN6jn86OjoV+ONrdWzpUVJnrkLevuQFtaky7+Z9OlLUUTL9kER0fB1pKXi/SHh1AObtvhj
py2+N9+v6KsO84KIn7D33arLaQ2AS4Hialy3GA3sRXMF2jzQmC7w1P86OqM+PFBRpaQT9shkWjGT
Hp3l7AhOTIOB+4ZfLkrRriC2tRROKJ4Q/gg94kKWoz46cDk3mrZY+KH29i/29JRKzIF6MDc7bERf
/EL93xmOQ1JtROsjfTfVVRQF9NzGxaZaP4YyBmH4yFU9fKDlQ/3d1AKExvKVArj2Ne8gv6Z/ID/I
X+sJ27x4/9rRNACUwFqDmQ+iy69/exch/7fK/f6f/qwtWzFKJu2+F2CpU43gubXX8eJ6zgKlGOSL
XqUd6oKFdDU04Xc0G9+207AdWhn717D5AgolRhrHfVg65cPsjJFaDk2uu4dlEYiAh2RAzGqxJGVi
UiXALi06zMPs/VhpR/IOAw4e2TkkggqoZKJSTtQ3/9eLFmUW6j55HgKNvokLhnnrWOKYx5eCLWSi
jaY02AR+0dHAPRFxcm0ffunjnTYKTN8sm7wOMzCYhoUjRaDMbxGAjQwKKn5O3N2G32AxW/yBFr9E
M7w0WaB/PKtsE4W4Y14DY8+IQEyGLR1EGEDguqxku2IK+jaAm/kX1O9KCpgcscFyr4fPok3UmTXg
yPlOzJ3EbGvF1WUYiDcmME9GF/BWcLsNYQqMqOW3DbWgSdC36YprGo+vmXjWvMK0LeePTzcfqbS7
CDL0G/KzJWuK2oxCBOIDuesYDaw5IVBc5Eg2JrIM3g2IFbhDL/5dW45oyG/W5UtzhC5lepzV9NwC
cj1FQDnU7Ot4MGWW1250RIAAiN/WV+ocLWH2t0TlCNQeuZlfBVp8tVmiUW9HR+FLlfITydP0BTz/
1Blz0KKEBL79Q6zDceYDejKhcKA2djVv/o6gXOarojyLJlE5ML7BR6QdW1Th83RktmIASqO9m04V
Ewwmd4cqXCjNoC9p4NRx+11u2ynl6Z8PbGJg1khEWmtJGRq29FEz5Bv9e1ucecf43tIBCKjxZUVp
wJNu6DQyinc4CXuhCVz9HTfwDmtbyW+olGPEyGp8cdwH5plm8KU2eNqVPdbzCiY9jnAsYLKo4PkA
ouKEKULK0rTzMx3Ud5E3ZyF6/zVomlb/cD/RJUZpmv2MPkpojJ64babzXkDZynDs1TSz3/QqXdz/
uL8cdybt2/KWtNbmpRRl0oOOS8xT+dzU/lieu6lCpCfbA11v73GNwNoll7Psp/6FY5rdBzQ0HUWy
CfoyhNjnvz5APcUX50RB9/pbOdWSKP7PDL9SoPGZcmeo8fDUaQbLYGL61nzohP+r42WT62NhT26C
pDh8LUQeWNy22tvsQn5x9ICdWbYZPPx/tTFFEllGmQDodmdybP2PPaS2XXO5omlyh/n0lljNXjpn
eiMISsIk0bBCqGCaioPX0WpKKnHlk9WkEXPe1gsXbp6tbKrX+AxZqCMGLa3dxMGDAV1f0EZ5zKlP
JrUzMkIkP0Ereu18lot4vjQOewO0zeRwbpRcdLH/yPG7pKGg2Mxku3R7jc4vSPZFZEwPYJgCe1Rh
T87Gb/a0Rp0pJ4RzXaSxgnVVhM6+Uy1PMYbZNxYlaZ2+0d60YEo6Z3jgN3yE+P2wM+pagfUBxuac
czUFKePbCz52/SS7RDg2KYYkilSDgaH2Ry4gFB26+tKE7IzvlCh+k8B8Or9C1lUyVoj32uyZzdC4
DLgkzRW6iapLUg0rgiZXYuRZZAMZeMoUXp8ODOlScOCRK6NEyt+m2kfGRchPGjHUej4IIFFQWuEz
8KF8ClSPulx6tNbPMdxICDLJuibcC0dxfzYuEHUYMaPk90am2LzLncwsHfI0v7gbCa3IjxNYsH+s
7RfqwL3IiO+Fh3Wxxn5z9j9o2tLtKqHrwULgmnLUl83eze8XsZVtez0BBSweufWiNKRBkfQ99NsU
6YhVL2eaDkfwLEFC28Rh5Wil3mFhhF6z3H/3iWaYH8puf91C9nNceXCDRg0Y6KNAxRGWaG70Rvfn
QXA/5UP2Wy0m6SoixnNVwEiLRBCCLapuPB4wJ73pjCXZA82gJsokCGneqW7qzcvtVOsraejIYVVS
2PsOCfzVl785TmN9ZBxQE6qH7QzI9HbUgU0DpyZyip2WQpi6aw8TVCv9fpp4D7tse5tz/w2/cAvg
/drAO9FT+g63lqTAbqryF5u/OkG/JW0U5819TDkdjOovGHVZ/m43cFJinAYGzIF5sFXSkky2CUif
VZ8aUbjLwNcZR29axUrXx936R1B0WXfZ0kKwaWbps9ksiCuDnGD9NR3mLZU5eHNBzI2qKvpRtnN1
9C7nXXC/8ovVw3BIXgCXH4f3TcR9LJlewpVyMlA7/vTpvRNprN1AelgAPMlsbzktgojFcek/supc
dksbY5+MjUEKLy/7UkuiVNxMcsXTZAeZ6fs6O5EChmiJGncUfrPehklWqkevjHFrdeM/ck7AukLr
quAkCIldW7NosjsJzAIF+tBBqygsSHClPmFKXU7zfqs1+/nWOowJEpobmvTMxHllIMGVS3HvtwVo
i3LbbV5NNXXwUC+/TOvbvXpVMbSmn4IFhhbtrh/1+OmLZmfH2WdBj9a9gs/oyk2MEmaW9Yg+S6ej
8+PiKT8AH6Kz2qTAGeXQiksQmvkQ9fa7MZThdIqgFv8ITcdxXJL0DkfOXQC7h4ylZ9X4GacYGWyc
3VObwPewZbjRbgjyP7TUqEvZo4CUtFO/IHG2UWXWnPIeccEUEs7twAB7QiWKQhPSolz7gmwzZJ+N
Qv/DajKPO5h/sdwaA0TVgokxEhkt4E7QwHKsltXl0UwUT+/4Vwp7EH91OFpARVh2jm8ioepkizeo
gW5RZUcHwE3Aya/iErZbOBIcqxa9Sfjd2I0rldJrSc1PwygrXgI2veScRrtlr8VLtDuzP4VDYoVn
gI4acnOPBdNcAlpt2Pm8OapkHZYtmSOLuGhiPkZdfjFZVZ0w6Bi5OBJybeO5cZlTeGhyyL1k4x8V
jc6nYeXh6YOxujwocpJCxIkKAqi/QXDew78QJdneb22sVg35dRsKhxv6FhmnFFecjUvWS9HL0aE0
9NnGaAKdOoJi3QXOTSIDUnDrI2z3cCJkwh5HeKFFi4HYE8EGB6KLt852j2MpX5ilkJZl9/BdtEiV
c/KITaNNekWykRzt1yLh7iSIGvHKOJndOp/GAjM4XNseqgcR6OeKgH8FX9YsLSSsQ78vPHxE50n7
LgX2wmh+rDqnyG5xRSHLVYlvoJTgiNu8xAu1d0E7wsYT6FpKOlafNo8YiL9Lh6dCRRBgwfuYiWnh
sROZqQFuQHAldtTyVr7wpC6DZMtML7OgrXQ3A7he+acUA765wGHMnQAFyqSmL7Ho4hGpMPcEAiZj
Fx7fw6tWy0tm3vVW8DnAKMCym/MAVspD6hRnP1LZaMRmeYIV7CrobDWREA7u5PehhWPg/yqXRFDg
HgB2M3miI83bqHLcrHiEvyEeZB8RPSiBIKVarT4rztBGfD5p0HolvFGMz+1YtROSeqwzlGoUnBeY
qB75Za1bOnSbt1HDH+nfaJLxNoN/yqNPknpz6fG9gAzYHsLYMRtK7MLl1oZ7Ge0bsFBJbk4DofpJ
l6YyQK4RtvbDFlNpO6s63ooGaQ37GfHXZDdfCho5QA5Gv4iIXwhVm3H2Y7rSxaV9D4Om9Ap6L0+m
L0w95Sv9kj+9IOBhqBc6zwQRocn/mxyk0r13jOJnocJ7hyU2igH7RxJ7lFZs4DSX5eUG9uFdj820
WxSO1r7Cwhf6eWxzEmkUbdHqF9AfM8/TlF3Lfe416h9ayLwm2vYLulEQxhpNQ0F6/wXf/EX6TgH7
6RFA3dxKpVrWgFbOJej/U95Sbj1pEety+a3pjNdW8jWKDQirZ8098tcpCBEupcDj9zh16qnfGukr
gQkoiVjxZjxnl5m0uk1ZcOpVWLe5+Hg2E5Ww0RdCgSHK3KWqr3ASfoblgC0ggxtp8qM2uGCWuD6F
OFRSEepsp9Q3DceD3s1NZqWL7jrsokD9iXUCDFN8lfPVqQeVlKTt1PUQWnX/aTFBT+QIoKRQRxzY
fE+hp6Cp2vCrd54XtguFcPDlJzDB7DSaxjw3rxv84LCTjR+cFLrfSg/4Y3DE9UGedp2mDJ4JDW9T
tdns8g7OTWIt6IFgRh4i/br7ma/jAHnRQTlj2LcRw/nOQLWHibv3mLYYJJCP41ddMJz0ZCWDLnj0
f63DiGOVyIetjWjNFkeWuN8FxDDtmtZIf3lKFn4qiYiL0nQJ9oavxBHuiLbyOU9iAK4IIsr2jstR
SDtzxk+qaHgi32q9l8Z+1lWCokPMC81wlD+dneDL/CRQ51xd6095JxPFJ53FldcGmLZ5uE2X1eF3
CRhhNbUHH1vVseGXNSNcKOikAK/I1PHhwVCG77/fzPpH0Ge6Xt/luMtvw0/bsi69rq3nnHbDaLWN
DTje8Q7ZL1bQ24pZG3q1d1wLzJP2tYQXCgOg1LprtMvutgD6b+G0FCAAw9B302210L2fjJ4u0Cvb
QrWzhFOr6e3AbqHL8eH1PMwYGcDbBkien5QRNB1pf3rdplikeqxBRetq75scMBeeuRgKH54LCxS0
A2Y/qaGJL38jv8Bs/6t6xCQCCV6N+pZt5947pMIyiM4zOwL7GZC1Kc1+/7itdgmRLrWvfqx4hJ2O
mzIkZts2M2fNnt2aJioErqcwHtJ5pg02OigMP68jVqyzs8IHm7jyI4iH7VxLG+JXr3mFkV8cH9LN
Vr/aii9TlWvvmK4yLAMZWe0ArPcvQsaqBeKb/XvXMOZuLTLGxBiM/dq9z2Jl5pjJUMz2nrEjvbk5
CrW3AGXmsvjZ1m024H69oqCHLoaNdZr34G5cRke7XRTz0gCOqW+IchbSy0vUSDTiM/g8tsSeNpfX
uIXfpEIjzlfWG3QpdL42r3IKyDR8LJw3hOQBUwOXCdQ5q7BvKil/TPgCoESnHrFTtEwKMKybDl4t
F5YJfmesUbbINWqFgZUzs1Avy0eFJ56ZOlpIRdNrO1lFOqZuGiJDu/JbUm9h0brS1encj2s6/dUk
HJo1F6i/cj1xH37KgiE3r2pfPBihM+jo1BQwC3f/wgSpikSlyAWXi0cGNig+mTjUgeeE/eTIMa+5
Qw7ZtUUSGjcfeyNfEj1+uc+qZAcfaMbYdYafpNNfeBNZa6CxVExDqS3bdQoMPfrh8k+VcdhC8xCD
CcuCz6x20a1apQVw1OSnF+HPNb7TKVL76gmkuTDcJxNP0X3f1OA+rBDrzlkLFIBIvTNhvL794WIt
dq7YHH4gGyQ7rNUlp5XueEvF2mKcIpkHtYW6r6rrwQArRAgthNQrQPhJ2h2MHiV2v7JjvqLwW7Ez
WNpmqodPz+/3iJji6S1zEziWYG4QUlb9xTC3ic3oZw4k6QXxqgsX1T3fzj2Y8o671HnaNqS4fK4F
U61ILb+3ARP4lJsrL3IUk4Dh8y5iE2TO9hCJkFYcgfjEIyKvZtZWsQ00EQrtKC1S+Eenuvan9SHv
hzmeOnOD+BASJwWXG+sa3MKa+AB5/uXAuXBRkDN/AamEg2674VV3yRx8tJaM/EGgq+tIqb2TIhDJ
4MgMJUe7geB6gMQopTBfKzJSmQ227ZDDJoQcOdZOGT6579PN4LZugdqObDMPELzI2D9CZp7F8cyx
3xLKeqmUWMuzSgtyAS/F/MaYrnEf5Fi9H+mngU14Y7w82179IAfmt0dp6aW9v8fzJ5fIX5DimUtx
m5Hi6ceUwOcTgbFUj9CdZfQnhAAMZzYT+GotTFjzEVMZ1AIUWUEZ5pR0sdp84b2pTGPAULNKD+cD
QWxkBDuyI1vXPjqLwCVheqXEXqE0IvcZM4TtGr1izAZUm4PQDbsw9ehGkaYeoHRMbwbBi1dNjed7
1RwD3vQCWgsEOoH47CjkjhHYnszOUYzCdF3O9WwwstJkTOw0klXzw1laMTprd9QYEL2GP+/UI9po
AvaU7z+XhcahYJRdN7Xxmq6J+v/U426iXEcmJ1VMOVPPPGE4u0cQg8Q5HX3pG7c9rejcrCkvV+FI
3lm4EW+4AcV4s2NVTeCY3l2l3giaP7XDZNm0iVPmUTEWPe88hdnBC1j8ZSh31IqDxGgAuE+w8BOw
0OcnlWGGUCh2K1QK/R/TfjlnWax9SsVlyG4/Y5BUsuuyDNKJgFoov43qbdFrqxjANM2g2tChsSwX
UYqxUIDMUK4bktZh2QeoCa7Nhm5psg8S6NqO1agkLk2BdJZ6lyzkrdM/sCLr2li3cG+o1W+YgytE
Q8wsWoQ0+aYaDTy4jn4KMWlEATXkef1HcEQ/G51WD1joqkFgg6QzQImDBmqXWkcLddBMNiJH7CxT
S26NW10fmL8F2uqAiLTHSlCmfFVHNfyix/sz+RIrBkux5MNAz7Wkrm59lrdMnhdmrBA4/WUuWba2
lmcswZfpMSx3K5f/UjGs2ftyBZSIHvqbZ7TXrlOIB23NKEX0M6eYwO+7EbSRKdBrlJngjK6fH/Ht
g3uH/oyRyW2jyBAw8wHPFCl4J1WTj4kvdIXA1C+nQtfIiL/Oilhj7GZPyuj2m0JB0LILPRVDGCnC
2TrihMqGw/nmjXGAIo1Qi0m7p08xcbV7Vjw+cYFeKnQX7DKUOY5xoBa9ronSUo3Ew1BOY8A+U3qE
PQXOTyNZyBh4QrktQ33ujpinDK+JxLCjNC+BH2VnesRYq8WLQYWl0/lzdJuEUKmMh4/Xr37IXyZS
UVh5N6vxU9gzX+to4CcoTPq0tk0v/3/6ks3z6S1XR/PVh5+3EDnTMjH9UX8pDQiXelpgIIWOrWE2
rTVxjscIg+ebwaJQPsje+tNAJYtCRRGTqpvXpX0I1YTilGNpWvnoAP1gwnrnDD+ghEyADtj6AzHC
W9STxDrr1HEwd9shhDgrj98VaEBnHEaQf/lT3XANqL12eJPdPk7175ENlNKuvTwiisuG/ie0bpLU
wtZOOghnZ5WyJjbNwH1b8BqwpwVjH6ZJCt45hAWW1HLlS3lNfleJIN5SX/skwy62iLxsnGZVhtxm
cT+cpymA6xPfEH0oGwSvE3sE9EH9V6SrDREWEI1e5qg2zKBuHTAGDZjIJ1rIsiXyfghbba7Eg6xK
d2JYyPRP5/Jj4cEizibMiHqaKRalOLRd3RMTy7E1FQHeb8h+1dfYx4u08pqcwP4vmXqQES13LAUG
oPlsnSN+w5MGaHoMCywYjgKJt124N34vOPShzUQHZNpbMnz5f6P0DN/lYYrL85QwEg4yoXsprhpV
DANTfQIV5MMc+Lf9/U+rEcV4TQ+TBpTbw71/xvLaaKkXoOYF7NUZUf2WVWjsEgkVH68FfVPtJCxd
8nzdGsdMl7aGTGU6MPtjZ+F2+/eC+qZEEDPeiovijKTvGPpyxejrpTF60uQ9MTfM4FSV84iQpYK6
o1SCKd+qsDqMyMS8Sx00fPNff5+kWJ/wgNycgc6ZCBQCihTDaqvjCDHrZsuHLehSza4H/2UmoIZl
9XFeIaI2wSVpKlm9Flt4395N7/INEPdQf936/wQgHWnkygHNDWR2/bGGS8WwvOnF3ed2L0D5VPu3
+yyerw9xjDbrLfRcMCb1aUY5r5Qo5A6ZqfFGlBzbnKVwYzv6UxQ9s7L52xOKu/0FkTWX3mEWbVBY
coQR4GMTr8p1GGCiCwb7tcpQ8BFZ9dPgshiUBjgE6+YxIrdFOSMSC3TSj6IVRS4ifssDoaSdAlfS
SV7PgF/P/JL0XBzXZf03tDYEYAC6E+7vrJVL/zhR3RCiARbWSRBhT2VOoQm5eEGzXY1PG7+NSZeL
oQn2VL8vrI4PFnqdd1HHw0z6mBBarqIgz0uarARrhY5Hy5iZF2UXwY6WdvrJMDBCPuClWI1jdqt3
/L+5CpmSJpuupz1NKbfjlnKHECJI2j2sZWKwCSG04J9SSg2x/+qmlFVe2R37yEwBdqppw4qNl23B
mkIcULrF4cpqCy2ovrPWFCYk0Jqenwc7pMYfg06sj+7j+YxlD5uf8uquribJDQiU3qBTmvScf3Fn
iX+xT3q1hIT7f+RVvsbSGtli8gYXyC6Ov0h1EDauSNcIEmtatDKgByk3qmPPwrYPA2pnad/L5DtE
+2yyJ6bLm5zs31mI23Bzn9FmqGkCBAQ/DUR75xeuNsWLE//44kNwIGEj+35qyTG1J1np/Wfht3pl
qY/1JNyphnLYoZrKpAOKs5+LMHTfLvNXiW6Sn5S/JnOso/i+21DBQJ7h3ntcKdmwHOTKDpUK6Cmc
mQmoNwBiT/ruXg5L9D3vZ2ppEr5FoN4wieJqURWhV5X5VPwhyh3vU6SyUX7Xh120GWJsThI8pr+u
V+V5NrzjrPykT5XF5RyYXPA8tYrgTJZw1iVt2+Dy/VHa96blpZzz8YJXB1B/UkG/nWIEBWMZgywV
YKuNASoRcMEAz9NZFtdX+FIrlpOVmrvlUsKbXLxNDQxy1HiXZUoasXYJswLF96UUEN573bLEXR/e
3/VGZSaxwOwvqHQenVT9b641eGcX0eKAuCpdawu/DlA10MI37IilEHUByRAHawmStlYl9MmGOvRz
XOUvXhk+MR3fpsl1ozvGIpDEAOklN4ERE1MwjQS47QiVmIjPGedHLezCJAJwieIjOKo67LfLNSBi
wNBG1jIf04JrJBiD/tBqC4O8O1fT9N15A4RmWg+oTqE7Y/+PoKrI3FYkgPhhhz4/8wvgdtUnHwFC
NMXq3d1cMc8msAIHBDNn1L9G/QabF6Pt0vCcMZUfTlTnpUf0TEWs6Asx4dRrgrESR3JAp/LRUqgO
4irf7Rj5oCmbp+MDHM3XZJLZvFzu/28ecApbsHAbyrTm9hoRnPQTchwTKXQIc4/LPtOLCEhaUkZp
UYDT0fmy7ewCA/zWtpFMrc7EvPzsSc3hSF7rAX52wz5gptz3b6/VxHdh/mMxixh1B+KEO1NLBsBA
2AiyQEvjUw2UL4SqU/B7FrOcg3IuXo8LbB0panmk4JE69WU4rTSZHjvHbv7yiV5zYOEDLGVVcjIf
/+zwHaZ4MBcTvbSztRhC3ryxjfnopY1W6NHHhRe6WZ5njgrEl95X5theWF7Fr0AtqCc/Hr1+zeTu
AKIy8ITYwtsxhwssLrWNn/OOwPYwAF/McTujkT6RdiWtFMsYGreWwh56TmR9hsNx2VJr85ShX8z/
+5F6UhY38zTtxNkOtKM7UjhfbId0OkSDKSjX06zowxihdJX0W4CZrypbuNRq/KVlbwKNq8Ej0YkE
PRUr5SAb0f60R3QLZ6lZoUkshU0fMMRR/J+0j7DDPf4m21Lw6XhteZYx2U50lecY5oKc48NtCDIa
BKclS1AILTxcIb5lJUBhXqkX3yjoKSHixDGxEUTCnbT2GY0xdFI1jSshdjSirripWvZZ+8IQb5Ak
7NBps+6wgMeAebi3raFsOnVuICiTIH8czTtEaoDvQfEeWTcyRZ3F7d0/NYBN8nMoaqUFxcHUoM5T
quj3daLoAh4R5vS+2xQd1OJAkqmxkgjpy++Xy28IKWCZ63i7OCroBHuejpTJ80lx+pBqz0q/AwSq
7WxMf9At96Lazs2Bva7Xbu4qtnEJELQniE6C6w17A9Wfn6awTuZ5UbqBxujZMzLA3PfKduA9XX9S
S8XC9vTxvF254WpmAtlzpIiIsqAPf4lWnpHMQDs0OcZbPR6xTTDpHAOuPIEtvRk9EdiSvkW4jssK
lOdFK/yJOe3znC+olnSczZzf9SYHeergmKNKKYDrv0aJUXRd4H6rAGKbJHaZH54Ht9XPZsC5zxMf
b9GNWV3eyqdB8E9GwRtmJIi2/MKoa7COTFJAJ+8fRo/ROAqmiIfULRWG3bRHXHQfjdINmPxEH/fF
RURc9baJ/jfqx8SweSQ2kBlQkb+WyBLnsgK0ZqKyZeYkifyuEaVx7LgwXXxYw7NckpiuPOBhBAe4
55Cxn53CkJRtWStJ2ooaSbcj6BgXla2ZE3eZYEcNW764KvW6qOnE2KzIng721k1WY5SpW7idYK8V
gOIG5zvpBoUX0w+1B+Jgc3jjJsWZLxb+CnlSO2J10XaQWc+VltE5Nojoa2kA0pQ0TLbyBZPkirM1
5UoDg1aNcZm4jlM6dXOlmZ3vXD+6ZriGqNPy4n0mKj8hMCDmSITvkb/GXI+UAcNnGNXSfjJEE8Gr
wyylqVJBIu34jBMo31iLEnyrCEWpGDjsvpX9VeK/D0FstoZfUF15JbreltNGQy/U3lZywMopcc5j
HO7av12jf2V06xKh1xn4lrJ7J7AJZGlAWtyA941FbpLMRg+5NR5IydggY5nyiQdVBfQNRM5u0uGW
5Lg/MH0YXqEjKDvlQtxn2pDbjl0grdhX5wCGotG3nyebGX/DicEd3YYCELGdbh9XoP7t6oX+b5iO
iHTKMNnN7qjTeSy8j+RekNJRSZIUdE2J3rXUpXQfXKlQpR2K2ZIx6AourW2K3NRI6XqXHYk7dIV3
JaLF2sCu8uYBwXXBJ6cGuXRSkBDNJOx4ipL1sHU1bOBex7ryNCC2P1LJ504M/NNNB3jS/7LRMyCZ
MOrmF16CTeJntvie+fzkfDrUrkU8jIlJqgn4vOttJUuL2cQ3Vn1FhcjYJUupVg6AWh+fl8aVDbzw
M63oCbA6kvy1np5funmwklW/UoQGLyU9+jCENq1Y8pcAGtAUQ945gySe8QG16tcux8WrUnqF3/0G
SO+k+8jT+VlYpIJEA2iakyztz0dkyBupHWrFThUbRDCmKeD20bNmB8bf5BxJr3FMVGcWWyeiNgz0
xX3jaUA7gSlB6lHGx0Nbmkf5StjhIQzc2lMd1e8++sa5JjGMsOIkVwh/RgGaHnSltK3YEgaG/mu9
z8eo7BsseUbHaM7QQiAsE13/octRPj4YWOKaTDfeDGh0Z3u+XrM4O5zFgjJTVz1VDkO5g/ydooqy
rZdlGaKVh7ppnareY5+Dj1J83PsYSDj6xZA7dk7x/YqI8Zxd7EVr8znsv+uzQEPgLZPTY7K+5dcI
eXMd50zuhcyqs49vn+kyeOJnmT+BonP4oJjddm4ERHvfgfKctGKIyqz1KeqdecEpkHnXqkg1smgE
CwmfJkMrc75yOisJslyox+NAWZyX5N/f0pxFIR9h7bZ2GlUy6Orme4hapz1dqK7KdoWda/CeoRvq
ttS85lIoq2Y7FQOzBVzghJnOud30oUaQ1dgi7xDMPETHNGvhcWsk7LmaLRRGufoNa4NHWVjGeMMr
lYxFUwXjjF5aK01ls2eGy0i68EjFNkt8Agoti/TI9gmpH44bHXb1TdInVO7ZuaiHyU/PKX8+wONt
yBNN/JFSsj0DtGvHKy2N/xq3cJmO2Qb9N1VnE6KboyDdcUIIo2XrVlfI3FMCOh1l00TxtwoW6aTm
08NaenNvtN/WUzttt3SLh/Jo00f1mI8NrTXLwQ==
`protect end_protected
| bsd-2-clause | 78db17f990f89366089c33be06fa2e71 | 0.94299 | 1.831186 | false | false | false | false |
AlessandroSpallina/CalcolatoriElettronici | VHDL/10-12-15/10-12-15_compito_turno2.vhd | 2 | 2,907 | -- Copyright (C) 2016 by Spallina Ind.
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity mezzanotte is
port (
din : in std_logic_vector(15 downto 0);
start, clk : in std_logic;
dout : out std_logic_vector(15 downto 0);
fine : out std_logic
);
end entity;
architecture beh of mezzanotte is
type stati is (idle, getOP, getA, getB, exe1, exe2, exe3);
signal st : stati;
signal A, B, REG : std_logic_vector(15 downto 0);
signal OP : std_logic_vector(1 downto 0);
signal enOP, enA, enB, enEXE1, enEXE2, enEXE3 : std_logic;
signal counter : integer range 2 downto 0;
function next_state (st : stati; start : std_logic; op : std_logic_vector(1 downto 0); counter : integer range 2 downto 0)
return stati is
variable nxt : stati;
begin
case st is
when idle =>
if start = '1' then
nxt := getOp;
else
nxt :=idle;
end if;
when getOP =>
nxt := getA;
when getA =>
if op = "01" then
nxt := exe3;
else
nxt := getB;
end if;
when getB =>
case op is
when "00" =>
nxt := exe1;
when "10" =>
nxt := exe3;
when others => -- "11"
nxt := exe2;
end case;
when exe1 =>
nxt := idle;
when exe2 =>
if counter < 1 then
nxt := exe2;
else
nxt := idle;
end if;
when exe3 =>
if counter < 2 then
nxt := exe3;
else
nxt := idle;
end if;
end case;
return nxt;
end next_state;
begin
-- CU
process (clk)
begin
if clk'event and clk = '0' then
st <= next_state(st, start, op, counter);
end if;
end process;
enOP <= '1' when st = getOP else '0';
enA <= '1' when st = getA else '0';
enB <= '1' when st = getB else '0';
enEXE1 <= '1' when st = exe1 else '0';
enEXE2 <= '1' when st = exe2 else '0';
enEXE3 <= '1' when st = exe3 else '0';
-- DATAPATH
process (clk)
variable tmp : std_logic_vector(15 downto 0);
begin
if enOP = '1' then
OP <= din(1 downto 0);
counter <= 0;
end if;
if enA = '1' then
A <= din;
end if;
if enB = '1' then
B <= din;
end if;
if enEXE1 = '1' then
REG <= A and B;
dout <= REG;
end if;
if enEXE2 = '1' then
if counter = 1 then
if A < B then
tmp := A;
else
tmp := B;
end if;
if tmp < REG then
REG <= tmp;
dout <= REG;
else
dout <= REG;
end if;
else
counter <= counter + 1;
end if;
end if;
if enEXE3 = '1' then
if counter = 2 then
if op = "01" then
tmp := A + REG;
REG <= tmp;
dout <= REG;
else -- OP "10"
REG <= A + B;
dout <= REG;
end if;
else
counter <= counter + 1;
end if;
end if;
if enEXE1 = '1' or (enEXE2 = '1' and counter = 1) or (enEXE3 = '1' and counter = 2) then
fine <= '1';
else
fine <= '0';
end if;
end process;
end architecture; | mit | cc332f0770c59db3c90eb09d395a59f3 | 0.5387 | 2.684211 | false | false | false | false |
sergeykhbr/riscv_vhdl | vhdl/rtl/misclib/axi4_otp.vhd | 1 | 9,319 | --!
--! Copyright 2019 Sergey Khabarov, [email protected]
--!
--! Licensed under the Apache License, Version 2.0 (the "License");
--! you may not use this file except in compliance with the License.
--! You may obtain a copy of the License at
--!
--! http://www.apache.org/licenses/LICENSE-2.0
--!
--! Unless required by applicable law or agreed to in writing, software
--! distributed under the License is distributed on an "AS IS" BASIS,
--! WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
--! See the License for the specific language governing permissions and
--! limitations under the License.
--!
library ieee;
use ieee.std_logic_1164.all;
library commonlib;
use commonlib.types_common.all;
--! AMBA system bus specific library.
library ambalib;
--! AXI4 configuration constants.
use ambalib.types_amba4.all;
library misclib;
use misclib.types_misc.all;
entity axi4_otp is
generic (
async_reset : boolean := false;
xaddr : integer := 0;
xmask : integer := 16#ffffe#
);
port (
clk : in std_logic;
nrst : in std_logic;
cfg : out axi4_slave_config_type;
i_axi : in axi4_slave_in_type;
o_axi : out axi4_slave_out_type;
o_otp_we : out std_ulogic;
o_otp_re : out std_ulogic;
o_otp_addr : out std_logic_vector(11 downto 0);
o_otp_wdata : out std_logic_vector(15 downto 0);
i_otp_rdata : in std_logic_vector(15 downto 0);
i_cfg_rsetup : in std_logic_vector(3 downto 0);
i_cfg_wadrsetup : in std_logic_vector(3 downto 0);
i_cfg_wactive : in std_logic_vector(31 downto 0);
i_cfg_whold : in std_logic_vector(3 downto 0);
o_busy : out std_logic
);
end;
architecture arch_axi4_otp of axi4_otp is
constant xconfig : axi4_slave_config_type := (
descrtype => PNP_CFG_TYPE_SLAVE,
descrsize => PNP_CFG_SLAVE_DESCR_BYTES,
irq_idx => conv_std_logic_vector(0, 8),
xaddr => conv_std_logic_vector(xaddr, CFG_SYSBUS_CFG_ADDR_BITS),
xmask => conv_std_logic_vector(xmask, CFG_SYSBUS_CFG_ADDR_BITS),
vid => VENDOR_GNSSSENSOR,
did => GNSSSENSOR_OTP_8KB
);
type state_type is (idle, rsetup, rhold, rlatch, wsetup_addr, wsetup_we, wactive, whold);
type registers is record
hword_cnt : integer range 0 to 4;
hold_cnt : integer;
state : state_type;
data_ready : std_logic;
otp_we : std_logic;
otp_re : std_logic;
otp_addr : std_logic_vector(11 downto 0);
otp_wdata : std_logic_vector(63 downto 0);
rdata : std_logic_vector(63 downto 0);
end record;
constant R_RESET : registers := (
0, 0, idle, -- hword_cnt, hold_cnt, state
'0', -- data_ready
'0', '0', -- otp_we, otp_re
(others => '0'), (others => '0'), -- otp_addr, otp_wdata
(others => '0') -- rdata
);
signal r, rin : registers;
signal wb_bus_raddr : global_addr_array_type;
signal w_bus_re : std_logic;
signal wb_bus_waddr : global_addr_array_type;
signal w_bus_we : std_logic;
signal wb_bus_wstrb : std_logic_vector(CFG_SYSBUS_DATA_BYTES-1 downto 0);
signal wb_bus_wdata : std_logic_vector(CFG_SYSBUS_DATA_BITS-1 downto 0);
signal w_busy : std_logic;
begin
axi0 : axi4_slave generic map (
async_reset => async_reset
) port map (
i_clk => clk,
i_nrst => nrst,
i_xcfg => xconfig,
i_xslvi => i_axi,
o_xslvo => o_axi,
i_ready => r.data_ready,
i_rdata => r.rdata,
o_re => w_bus_re,
o_r32 => open,
o_radr => wb_bus_raddr,
o_wadr => wb_bus_waddr,
o_we => w_bus_we,
o_wstrb => wb_bus_wstrb,
o_wdata => wb_bus_wdata
);
comblogic : process(nrst, i_otp_rdata, i_axi, r,
i_cfg_rsetup, i_cfg_wadrsetup, i_cfg_wactive, i_cfg_whold,
w_bus_re, wb_bus_raddr, wb_bus_waddr, w_bus_we,
wb_bus_wstrb, wb_bus_wdata)
variable v : registers;
variable rdata : std_logic_vector(CFG_SYSBUS_DATA_BITS-1 downto 0);
variable wstrb : std_logic_vector(CFG_SYSBUS_DATA_BYTES-1 downto 0);
variable tmp : std_logic_vector(31 downto 0);
variable v_busy : std_logic;
begin
v := r;
v.data_ready := '0';
v_busy := '0';
if r.state /= idle then
v_busy := '1';
end if;
case r.state is
when idle =>
v.otp_addr := (others => '0');
v.otp_wdata := (others => '0');
v.otp_we := '0';
v.otp_re := '0';
when rsetup =>
if r.hword_cnt /= 0 then
v.otp_wdata := (others => '1');
v.otp_we := '0';
v.otp_re := '1';
v.hword_cnt := r.hword_cnt - 1;
v.hold_cnt := conv_integer(i_cfg_rsetup); -- > 30 ns
v.state := rhold;
else
v.state := idle;
v.data_ready := '1';
end if;
when rhold =>
-- Must be more than 30 ns:
if r.hold_cnt /= 0 then
v.hold_cnt := r.hold_cnt - 1;
else
v.state := rlatch;
end if;
when rlatch =>
v.rdata := i_otp_rdata & r.rdata(63 downto 16);
v.otp_addr := r.otp_addr + 1;
v.state := rsetup;
v.otp_re := '0';
v.otp_wdata := (others => '0');
when wsetup_addr =>
if r.hword_cnt /= 0 then
v.otp_we := '0';
v.otp_re := '0';
v.hword_cnt := r.hword_cnt - 1;
v.hold_cnt := conv_integer(i_cfg_wadrsetup); -- > 20 ns
v.state := wsetup_we;
else
v.state := idle;
end if;
when wsetup_we =>
-- Must be more than 20 ns:
-- clk = 80 MHz, 1 period = 12.5 ns => 3*Tclk = 37.5 ns
-- warning: reading on next clock so (counter-1)
if r.hold_cnt /= 0 then
v.hold_cnt := r.hold_cnt - 1;
else
v.state := wactive;
v.otp_we := '1';
v.hold_cnt := conv_integer(i_cfg_wactive); -- > 50 ms && < 100 ms
end if;
when wactive =>
-- hold we 50ms
if r.hold_cnt /= 0 then
v.hold_cnt := r.hold_cnt - 1;
else
v.hold_cnt := conv_integer(i_cfg_whold); -- > 10 ns
v.state := whold;
v.otp_we := '0';
end if;
when whold =>
if r.hold_cnt /= 0 then
v.hold_cnt := r.hold_cnt - 1;
else
v.state := wsetup_addr;
v.otp_addr := r.otp_addr + 1;
v.otp_wdata := X"0000" & r.otp_wdata(63 downto 16);
end if;
when others =>
end case;
-- Read request
if w_bus_re = '1' then
if r.state = idle then
v.state := rsetup;
v.otp_addr := wb_bus_raddr(0)(12 downto 2) & '0';
v.hword_cnt := 4;
else
v.rdata := (others => '1');
v.data_ready := '1';
end if;
end if;
-- Write request
if w_bus_we = '1' then
wstrb := wb_bus_wstrb;
if r.state = idle then
v.state := wsetup_addr;
-- Only 4-bytes or 8-bytes access
if wstrb = X"03" then
v.otp_addr := wb_bus_waddr(0)(12 downto 2) & '0';
v.otp_wdata(15 downto 0) := wb_bus_wdata(15 downto 0);
v.otp_wdata(63 downto 16) := (others => '0');
v.hword_cnt := 1;
elsif wstrb = X"0C" then
v.otp_addr := wb_bus_waddr(0)(12 downto 2) & '1';
v.otp_wdata(15 downto 0) := wb_bus_wdata(31 downto 16);
v.otp_wdata(63 downto 16) := (others => '0');
v.hword_cnt := 1;
elsif wstrb = X"30" then
v.otp_addr := wb_bus_waddr(1)(12 downto 2) & '0';
v.otp_wdata(15 downto 0) := wb_bus_wdata(47 downto 32);
v.otp_wdata(63 downto 16) := (others => '0');
v.hword_cnt := 1;
elsif wstrb = X"C0" then
v.otp_addr := wb_bus_waddr(1)(12 downto 2) & '1';
v.otp_wdata(15 downto 0) := wb_bus_wdata(63 downto 48);
v.otp_wdata(63 downto 16) := (others => '0');
v.hword_cnt := 1;
elsif wstrb = X"F0" then
v.otp_addr := wb_bus_waddr(1)(12 downto 2) & '0';
v.otp_wdata := wb_bus_wdata(63 downto 32) & wb_bus_wdata(63 downto 32);
v.hword_cnt := 2;
elsif wstrb = X"0F" then
v.otp_addr := wb_bus_waddr(0)(12 downto 2) & '0';
v.otp_wdata := wb_bus_wdata(31 downto 0) & wb_bus_wdata(31 downto 0);
v.hword_cnt := 2;
elsif wstrb = X"FF" then
v.otp_addr := wb_bus_waddr(0)(12 downto 3) & "00";
v.otp_wdata := wb_bus_wdata;
v.hword_cnt := 4;
else
v.hword_cnt := 0;
end if;
end if;
end if;
if not async_reset and nrst = '0' then
v := R_RESET;
end if;
w_busy <= v_busy;
rin <= v;
end process;
cfg <= xconfig;
o_otp_we <= r.otp_we;
o_otp_re <= r.otp_re;
o_otp_addr <= r.otp_addr;
o_otp_wdata <= r.otp_wdata(15 downto 0);
o_busy <= w_busy;
-- registers:
regs : process(nrst, clk)
begin
if async_reset and nrst = '0' then
r <= R_RESET;
elsif rising_edge(clk) then
r <= rin;
end if;
end process;
end; | apache-2.0 | ea4b9454820ff381baf6c900238fea78 | 0.523339 | 3.178377 | false | false | false | false |
szanni/aeshw | zybo-base/zybo_bsd/zybo_bsd.srcs/sources_1/bd/system/ip/system_auto_pc_5/fifo_generator_v11_0/ramfifo/dmem.vhd | 19 | 12,333 | `protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
OJrNPv25gxVf6MOkMLDXm9qPvzcLiFn6cGPtPoJyX0DRSMUs1CiCHluul8VfoMGYUnRu9NzC2pDa
fD3Q+Cro6g==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
OO53+YxV1fz+fdQXiBafTL0TfU0s578DnGOkBDgcp0ZiS8qBHyL1R2PISafYfK37QZ2xP9F0gTav
+sG2DKzZYRShUhSDZBSgMOYpY7yZxYTXlswORtjPSorUAG9VDaJFPSJUqemfgu4AY+n/BsniNBx4
zqFaZSDmDQebEViRgn0=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2013_09", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
Qtwd1yFLlmEutFKAPe2eqNz2v7W0I1lWfaUYyRoJyXavTq0FDRoJFjh1vw8Id+dlXsCh4QCKBOe5
q6ztRPULauE2vnffEDrTLD6uStkKikAcWpHaB5kHv8W/IU3+JNz65HQM8j8hOwGUzUSaTQzI6Edd
Kua78SuOo2L/RNS2CApKLh4UlLjlkL69KZuDAj8Ds+wPTUwjY2h3tf4V0N6PH8lPAy9xJk9S3EgQ
ni8vjkjW6lK8he+zqjEtOf7IEGhelGexSOLg0dP3NDhMEcaxfcI7Zo8kOCl3C+GMy2w3TEyTZkQr
3WrfN9WllC++Z6rNtRNAqHVgNVA7hObPvyuA/w==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
Y5YBoFz+YhLFw0DE8aie27jXEk9zfvZg7zgS29dcVa80RbYJrtSDIAboa1ixJiDhfiME1gY5XfYR
MSxbx3I2ZAkTI/5DwNAjKseDEksXdqu1CBQcg+U5NxNg5wWuw+vr6DqkJMxvZoI9BhjAErRu+2EZ
DgyTp7XS17TjzQ/Lk3I=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
amEW+kSm8JLnUlmLoRCPt0pU7eCAirRawwzTZA3XEOaldjEiNg3FqPsvTGL5ScrzO4MhYsVv9max
1PQJ/lU1FLIUBgG3vy1UPm9QWkUIWp2rve3mDkSCfvDRku+GIP+/ziqovgiDyF46b73fS7Mrb40P
ha2QhSaORrSFucLp3v+D7rdh8lKmMq3YY+qxM1KZEpdfbausR1NP2yVxQP/t1g0w2pAjiWQM7wT5
6xmmRvYxl+7EuZQkxaCLozCO1ELg5LiuQuDVfKRWPdTIjtVbbBvnn/eTARAw8sh6+JXXfmhauCWF
cGkCTU9noi1D4Z3I/hvgJ8IXztgyejVNBMRBwQ==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 7392)
`protect data_block
7/CHN6N2UH1l6E6FCkyUkzICfhByXDc9azx99x+IRkP1jzvnuxkd4l7BZ7L3sZH8PRANNQ6xZilc
Vltcg3B8PJA25Tv4iO0HrQDrvVdLy37EhkuoH7lW7VBWZpVqjFnsAlSSexqKKxjpnPH7434xhKDA
/6ccROuxfa6rxh6i5XXa8TNQNIUNuxDq6lmj5U/Kk+CbspZYivGgt0Y8WFuWhYAPQgkcJU6ut66P
bGbag7OnRmB8HopIkw2YSire6SSsALZ1dqSTyP5ovMsoCdHYiN2Rslv9+sfFSxNjjlwQPn7jcOq8
QWtOt3pPVlmgFF+eHWuOOam8/OlTT1rbt7w+XvLiSr6u1EDZEXHDo6VQwn6opPZoeumlO/Usd5kd
OR1NuPkOeoBGWt1Ix3SSdNUfFn5/85DIL1qOFD9JO7aeOOS0odfcizK9jQdSHyZ4/2QkzlePT6GM
waEhX8YCgc6dIFVCqU1n6rBNqoe3S+Gk2R3jTHKCt7LbUqFxJ5j7+H3cq74V9GIYD9B0pCDGGQMs
thkHF4PgNUfXjhErhYct/2GG3sbSAyRE/lm8MJlPFBYy2WCUrq6o9Xt/vUz1gZUymYjdjX1AHKaB
yC3KGUbTPg38j6w2xy3ifpgC5UWP2PKrGLEX+3vuVySq415fXrXJiONR/SU2lWWNroa2r6if1Qdm
f2IC7UU2iAyUGfDVOOKww4ZuPAWSw4TuwUo/jHp70uH8Ut1vzY/rcpQ6DGer4QftQDwmfI5dyiY7
ZAj9rsOEYvPEFur23yFIKWL/p2cGpJfXi/dtru72fm7qoPs4IzmLwdxoc6Ux0+Xi7WQgSXI3thTW
6K5Sq0a7kEASLA+BUmlQW1rHV87hdqtpBc08NPgzckCMELtObFidPCfIajvbmI9D61czpwFUoj+8
TkZiBX2RsZeigI+HbEXtJLNg08Nim6lBrftJHrg1k9MutRu022mTMVog86clnIf/oRBnHnlbzJsm
qYw4S40aRgu/CfbazZjCAek91QHjH4FY47Js/o7cbBAlnrIPRZLLmqBP8lNRog9584xI6qQw69Sq
/PvoIoNGDzfxLgpPEO8upAFt50CjbpRMeYrLGKiB6QJ9UTRpzn+awHFaNAcIYiMYgnAgvRT+6BQ8
qbb2nqkKFq3q7dwRScXzAJ4o6ij44rzrbX3yol0bjq+nb3WJwRniz5Yx8B1GWdGNQdRQHQf1kuf/
qX9IzcLVLIkALqtovwgFrnF1UWaVM7C6zoyS+Y8OeXCQbyFM8kY1CESRwfM2PEMf1DzSr937YEbf
r7y/7PW8DFPzJqUfDFBKjNh/A8QB88jiw8D5Q/zt+hJre5PRpJUME+Mdulk/ZQvj9mcW+w8nI900
X2t4gbpmfFJNXyLntPnOekknG92uzQ11NccWz/4ky9weQLHvjh+X9iiLdXSdo08VfT2KP+u1Mmio
o/0EXUIGyH5H5T9DSsa+TBJVLEcwFQqi1cyiTkFzsGXEfd1J70m0edCHyq/FJpnXgQ9ro6Wpk0DP
6Urzcr2QjDRgu61M7UiQHf2th89RhZhQI3l2e5DkzZbklPDOOEUgQRUhDOUq75naGIh6dt4f7pxl
9lzn+Lh+G1Mx6AXI6DGqFXhpKOKq0f0xr7QFbz0iSoQzrJxSlKCJj9CJmCUUy1Vy4IBp9njwIddL
RX4AruYwpeKeDDRwr2EWj11+NJ9TWY7MfKkIiha9+D6bob2qQnhNTSahNj0oxDB9WUsdHKC37Pgf
HWv7QHIyS3LSAAgSGOHLELz9lpfQJT/dNExMWnCzCedKZS2kdPNQBqCSuQg11pe5oN001/dJxCOu
GQVQYT2CjWlserXRcPH/bdyg7Dm8bvpTo46pFNRQPOFp0M6xuZpTVCBdml1K/iwSQGW/4LTNc5BN
KLi9rBFDmFb1nTl7d4MGNiWmFGZ1PmJbHF07k675AAXyfDzUe5Sj40EW2hWDGzf37zu0PsjL7Jv1
AIXOnCc1dkOHP89Gdfy35Kp6LB+4k+rmt8sjGKUC0qgF8JFs/Rb4t2NdAGrKa7uFn7QK7RCXXtDC
1OoMzUXnAX7i3vLtCQZOb09lAKaDydeaJfvAOemiUDjgVVNluTcxxwKdqUD0CtcYWcmPdrgOHi24
Ufm+4x2vsWjBWnMHTIoBBCebRYg8SKUEYu2WVuxxCyqtg6u/xlvn7xcA1Jl45rDmr2ibOEpNyM8H
H1zQLMQTXaUfKJ6sWCy9tfV+anJ2YPuIgYdYjsdFBclrclSOMes59rSOnwjLX8rx1j2SlUr8DuJm
P+sImqduhMH8aTXRV8CRfyNC2HxWGOLM7Cxv9yiMal6fLTKDJ3m/e/zPL+OWbt8IOMQAoOA+bvYE
oZwHBdzd3eeWwVpTZxIC3OAe3d1+sbio+Bdv+bVL6g53tusqY6H1GEEaE/MQbSGZYHUGfwFEPPeI
BEhqAtBPoUUw9sC8832SRFxe9Y7jVKIQpnq/SQ4sXaCw0iMwf0QEBNhq2oKifN+efDmt3vdPTNU0
HVQ+tFPy3kruaS1XnVLUenUkUILSps/2xLXW6gP1mk9p0oodtNP4CCohGVJ2hIS8QKcqERlKDaNd
a4lQ2k4bdjHa+Z8049EHNT/vZp/W/PtfsBGSdg9a6E6ZKnvTiNMB/RRtpvYo3p7QH8O6ggRzwfdP
QwpvxoMME7GwylQ8MkirSy8E0qtmexuva9OMnbrpMbq+OnI3DiwBk4CFRgp4tobKWmGmvKKkNMMp
2p2ptBZPV60h12HCf9DhTvsNltWuXeG1T45d+XB3cwKyyN3nkGYSVmZc2G3obk/4q5N2kG9mJLwE
HytI2C5gJP9Rt/oxhqPTEze2J0V07Sn9clw3QKynuGZ5EV2V3EIZ92vAQAvMiuvY0/42CN59YDpi
EDN1FbCPTS//Tu46AhYIvM+5SZ6QGWAnqlHfq1FhYWifihYj3eBWIBVChwypBNeW55HCBN+MhDfu
5VK0rAm5NHCOiH6kRxAAbN0H3/ndng97UsqPlP8ef01xlMh4Q4o9Zb/W8/n/47UvRDt819cZaHVL
GaRxm/9BxJrvMVLsTZ0BTiRiWvoXNT4LKbFcNdYHT246nNTwyRow/leBhN2udaBvFufIQwTPxFQC
GWKox5YPcuBOqkQ/fXiEnW53z4dw6uGkd2SD5Zd07tNnuACibHEuOInX/4aGBH1vS0gIC3wMNEZO
m7Zg4+2GD5AQbD5RmvaJMMpl+p8HrwleWoNIRNNe/ss//4wbB9noO0n7WbKgKcUWovcEuZfjU10r
aJTqMy2nA8R3aqApwoc2jwqiWOB9DSvMeu8VQjrwx5/HduaE4nUuh4mq0x8l7l+SYX6jPC/WHmE+
xL/5OpPdNdN988DYGtbzY84+6QzT9R4U5PUT1lVL2lC65RHpFkI2wiFP5B4Z+XMIXNkd+VAxskEc
AQ1DDmqLNGQCTq3PjTZ17yKYpe6ApgtzzYoTnj+wX5SXuRyZUtJCDkAtkIMgAts3PLdFjXHttaTC
X4JrRHE+ljm57Yp1zJrg/0Orf9KmL5jTySYRodlJYyCm13kTM0F0bUVhE9QeXORh8/YA4NZRxMnG
1SLs5eJaf6FS8BvFgKfNbnWCjQD1PQVD3eDEo8sXLLe90boVDnqLaNlzkyT2klsc5Bl0bi4V+ag1
cwlvX/Yxb4edJe4fEvmhOeO6Dg/B11EPm9QENnowni0dWcWB2kq5GEnU8QnjUd8Ltn8Zocm1HhgO
WYzJrURr6gt3PrJrqXNBpHerf8A04MMWV3eA6mp4AzJg7J/Xe88Yng2SrTCzuTB3dt+zyAT2T8tN
G4tchM3aSTgEqR8DoLrUimql+XqHZoLbbQ9ZfRZ5wX/icrWHjfjsiUJv+bcM50QOPGEIuuzzu0Zc
rLD4fKaTOWnyENfZosfS/k7NFyoaI+gW2ZJcM3BRSGPidk30xc8zSF3X0vLb6xBxUiM9GWklZzcz
28PQytdAqh3G8lFDEfTiPDpIfBm5YUNr+3wta58tBJvq1tHd/w4ssONAG2/udlPVAxCwCqZkhL1P
4YPqsGCwHsj1EF1yH0RM5gtqN1gwjDc7mxDOPFFPv2hPHneHkTn/NDWUu51bElCtjYct8ZokE8Zo
B3DVMXhJwsmhyQX8Etk3CxgK2DXCE5dNc9rapR7JwCfT90a+u8e15kpkzdi9cV9a2h9j4MI43LFT
TCKeZ0ebCUr3891Af/jFTRF/UOCSBqUiehukRsAXlCyzKpVD35rCs2qY5K++5lMW17u6/pnAazFq
EYG9gvZa2m22T4+QsYP8zmVnSzLw1vFE+8JAxMnKePLMVyq4ii43pZ0R8xjNAhdCw90gg2LUrVbT
tfbY+PnuNpNvdsAGOyhE9qUWvSDkYQbTyBn5QoPYD2HkFRWsu+iCDjFG5hSpzGR1jwM4dCtj/DOv
nmRkHNaLQGH9qoP6xOi6uoZ9TG0XS8P2ACaMu3+Pgp904TdO5EaDphD7U01GlLbhU2X9N3h97fhj
5syrw9mjmsawzIxd9Lehlu8BS3jQcf9iP8nsbOqQYWdRC7YOejIcxjvVJMD/GPPiGFnO100Xk5Br
tms7rGq3ptY/TmV/VZHmEbZJ/3ZNImfSqX2TH9LvrnZ7um2nAvyXD/ZWisgjg/yH0EvOIBD+GKgp
6z+0Yyfb2LAZxPEbo2uBGMY38x1hPIgLDZIIXYq+Nd877CbalxjhV/mDHkoOk1w1ajL6egZ6v9BO
9HH05xlhrCAe8rdiIKwE599hp1OQg+VxXeBIK+ZY8fLGnB+45Ms3TW0f9/+oFWzCXpaEUsJvMiQd
sDN99S6puB75dnKQlvtStuk1sAIQYZRfDxWOqTc9OnkKPThQ/SnTh0OoEfsTeF++psa6UlKt+wwv
6og1R5PZRbvcwxgsHhDnB3zfwtzIyXqAX0HzbU3Kg6aM3lFVFE/65Q1E+15RFRfVTMfLjTiGorbK
ObBM2T38SNPefnCGu/Oqm3yW6pXnGgGLTfUkQl4ARyNHFk86XSepEaJzl+/9ed0vgsWnpNyLgAna
aC+QTV04nBkialQYYJ8k+cVMy3UtpTQqTF0ei0eOpjj28OFtzccwtcegUQsyzF/ZwIqk5gmNQgX9
ujG9X0b2YbTM8L5EIkk6xE92hpU37PAfm0LoMztPPOWhqlyzQURab+D3ZSigc5t2gIPqFdp7n6Dl
NnNgkuadBlWw7c6fGnX16XnEFuvepCWY7IYmMHNrpRT9Sf8POrav5UJV5LCEcK0hUC4lTGR4xvs+
RRXVSKL9yfWVpKI1UmY218EB+wbzvIVQZDr8gcAc/lCTKRmoFexhRtdGv3Dzd7+jYK4FtqOaQxAM
6aGmEe7jp7WPy2ktWyiBiPaFfhApc9WV1JdLZNfreMQp7ULUx4Vkm3Zn0AyjrbC3/3kjJyQxYKD8
OV5Nd8eTPyRlUyr+ccom8BshhKuvWLw9brJzuSe8fNO7fCyLcCi9A7crDIr+U3s3UyG0bl7VULiO
gz5VQ0rm2w58c/9KYRX0HXX8W6lh+efmwfWM34BxESMzoBUZDX/p+lsMCQrQS8Ur1JUMu4IeA2S6
xI4RjvPy5fToit8EjAVVsyUzQpQpoocOrL6AI/DSa7xlqzAyBOHUfnVouz7U7bLl1jhSXQvVb2te
N9BKFYtPHDfb65dLEGzyO2hQ5Ei+BQMgLiRJ+UmuEWwcFL5ibZRS+5UikU4zInRFk97Rg1CgVQau
qbMfWlfwro9z2Ua32F5GyiEaBLAVHUH7pINQlULTAo7ZN6R/SXRDe9vciTnX2KnG84nMzmBma2zH
xZZ91UBs51GmucIeGKJp6GO2TavSwVhtVrg08aCKidResxEwe3UgCjOs0ljjn4W6gbGSbz7QyQIN
g8z//RpnoBunhrS6FxqxdR+vET63hkOjf1oVxMCuBCdyCvt9UjvVMOK1ruQCkli8qKoZnNDrdcn2
CixhZR5v8emZH50wU9FLzlqeYDx5ODB8CqF2EPFuU5Lv7aZNOxBrGmyM0QiD6ePPc8ekIrCnV+kp
Q5EWm2Fl8yW7w/zqi0hTFymXBDv8HZ1PN5veVw6MKW7baakc0v261M11cZpPX96JoYz2rJo1dmfG
57kHFQEVv76Lep4m9JLXdufYrZVCiIuNUuDWMuO22/mAF2r9ZMte3oxqVjYiLewOfly5BEfGWEHC
jGQ7wXF2n0KNaZA6PRI9xlekJ4cT6tUpNW5vpn89Pmz4ZYxdrfJrwf+ngWjbBTQ2AiepFUbOPGlW
lOeTc9UjXJUx/jnwxBf7FrpwCNhzJDHDGHTVXMDKiJeQ8RXkeBd6+NyECsJ9WzCO2hmRGX7XkMxS
Zij7vCJN7SYp664cIc/vZaTjvYwMyBGHsACOSF9jEQddPHW96tsPEQHdJD+9WX/aYHl/UsrW4uyh
ODDUHf/rqmPLJCoQ/KE7s2F6pWUxSAfCTwja8nSaNtpO8LEY/15TlUCvMsa3aBBahp8aGGzpiZgX
SzZhCGw7wkepV3k+LCACdWY4wqMoMFEIw3Df1h5xs7QOQLcqkkLD9teOajrS9qoDuXtQ2+5uD48w
LCU2IeOBrCLiub43l5nj6BYXwP9J1ufR4RGJB8t6ce2AEPaRBkAOz1xOgj7ZyLy/JjWn7i2pyB5N
l3j39FUqMbrOA4V9ORrmw5AvGK2dyg0mxJHzwQ9a9AKjKd6uxk1Wlf3SmFisCzINe+m2qLMAlihG
+1acKmd5VmHttqdUv1Cz/JcleQfJvyynJNXFlCWbrgTIbFASiUCCdhPLmLXnmlX9lBEZ7yTunyec
w+H8RjfGSsSuJX8Eik94AGAy6crxvG5eUZKDwauw1jyRJpLfz6vzvxhkPQbkS99v4eCwpnn5gyUQ
x8FlwoWNfkQpLX7fbUYW4nVUsy2f89K4xK+btkHaIuhNwNMnErve5Sl6ytlV8+jbNqExDWwuvOGi
a62BlZ5nZ1ubWTihN4DSqJOAAyOYXLnd/1HSus/scFuRlq1rNGAt8GDU9rFKKrkJBSlmZ7EFp26g
+kQrdyhpwDDsfgXM9iI3RUeANOpNVQ2COxchAnYZdwtlkshI7RsWi8sHOsruK5mbtJ0ZHOIiKKYM
tqkEFmXF2eB/6FzSCSjsIeoS9j2yBzvYbFVk7mRq404y5oEvSqnLt4rxjJwNBO9gDtRLSf1uAQYS
Q2kMNqhbDWFs4XOtvBFwfJuQIDH7dOAr+n9xCqLw6fkyxnIy4bD2G1VkHaWClbuq19RjzMeN9/G6
l/lmHKscmqkmlYxCd+mnv9X/NZdvTzRJxPvfy1HrHg1A+CVUIpM5YrM+wEKHZj7zdXONyxoesyds
x6u15wIyRknObXT1adH8O4i/5PM2J2EpHOfa3bb4kk+ESPR7dsg0fLMDvpKrkz/sfajgSFZRogq7
StNGGioHjZcKgcvboMraVc4L0GZ38i65F/50/ETRMjSJatkHnnjBv/f6nsNPNMh1jWHd4wVy2MpZ
DHHzmuujpyREW9QCfR8z2e7vAdjloaQ9qDLNiGVVe9s5fWIyd2UpFYQSsiJYfsXKtj1mI0MdfNSd
YVGNvOKj5S2NecjaZtjQXIIWTopnmlLbwOuEx73+kyQxso4UGCxBHpbElxf/17tNThP3PDK/EOsr
2766VhJQJpUVj1pFeVOrvIwf2crEJBh0BCv108cESd/3zDMU4mqx+DIjXYDTXLf4gIWuMGchTNdB
SH2lINkPsFHIqQaeoa6uFAOx48BqPrakd4KAlhI08al54Y2WMMFlNSpf1o9iitRy1SYDVmObBV1E
vYRwbhXOnz1fKfyeONB1QeBOs13wUoMBKIzS3k8bxi/g5uDhXq4aHm6khlhsRdwpxH7nM04Yr4v0
UTvoZbfoPz/wkmZFDGD41NIbbtDh/2nHPPBCocxl3e4dORB7mznvwqezUHaHj1sOQr8ihIEnGI5R
Z7ebHqAhdt/nkM2+da7QYC7zz0bezEODRY4/oD+hy/+LFjJ0mZT5hX/ylcjGKUVoTr6uyeA1y9j/
ODLe64plzJzWWDkyirzPi60Oz5hDozPXfxAgicUnS17ub5YTMN1Aj0f+QdrPieNvk42YA4ouM0PV
b5BTzA+cYsgNvKvaMa1i2J6XPYROCci+Tv1kvfs9D5Up04vQrl4CyiDyuVc/q5O+DTLpLyeZqbWX
7Wp6Sqc/UudtTcekB/kWGmn6xhm5a/hT/0kL/9+2+kUlnXKwVLB9Fon0KR7D0C+cZg7Iz9kQtKpj
QOiXBE4QepAWqBMdTmjI9dE9bJP5wAkPuakE2aYXvOsBpjwL4lMbUUAkgyvL8Nu3vLgJvRLQOvoY
IL/mKv20+EBFuszHiXRT2b8mt/RnxkQvBQRJ3l6DDn4Z/ddlZNq4wTtRJp4Q+VCXqoj/atjVKFyv
Qf/cpIChxCtsLCSC3H+H2VmLstwMuq7AOlOzAQBmFEYybdBqA0AP+Gc/BfjWA5+qGf+Vdrhvtewp
zjK83+PI+usdin3xBiAXJiSCsleRbNxZvEH8PsfmW3+ORjijYWpVQDmoEX/OJT7izKMQ0nHMP2VN
Udnj1U/AldJHKD49ckDSYWf6eQVAp1La5xFmcLo+1sqLaQJ9VwKkJSH9NmVUXP5CpBFlMGjjc1UX
uBGKCqKhNDNL4gFL7HzVDmsToaJOZk3rs34CWsUGBZqw3m01BxgkhXSkBMLPVjiX3sUoP9GMquMX
Rm/DLfi12NcDdMXhqCM8577vKGwvE3JZkNcVAzf7FIlYnzsA8QxqUqfveN7fztBZNPIOl3YNWyLd
HXKaZTpdLusl5W2O2J0KmA4EFNZA0UYwHuf+Gt6h24kVhVcFTpULxWF72Os7JviqvZZpP2toO/9u
bB5Vn7qMbuCoEvTHitc2Dk4/p3AOu7HfQHYUTWouF7UEhsCPRoJjjUMPJ+jxGh5MvOUdcOYRVp6q
LF3zlN7S8K1qIlt6PSOBuDr4K/E1GXOyznRpCAtv5zIctYbtNT6r9OQcucjrZd9qIYt6q6Pu9Nf1
QTDdElKQGxwD4C6ifiqnBgveq6uKJWu4A6WwNe8o2RhzA9iIsoRqNlY96IXbc6ScAHRPo/1g/UTj
QoO4p67mAOQ6lFJMp3WKeYD2r9uR1PrpcrQnHMeKhsohFWIlJV4G66ibM2eyZgatqw5aWc2IkmAB
LJ3mgEWKpTaQDNCZTQ1ylXrWTZnMQkzzh0nv/rDTjqqQuMXLlWsRI2RIhQEzB6Y0C5EPUc8Qghqz
fgThbwHmRk3ht6QqkoBE9jFDTgt8qcwTcoj57Je0uRGxiczafOqqUSF8071yK2XUHJd1i7JIPiso
iEzTZOaTf2RhTYKwjHLu2D9LykDalStMFRAOEMAMQNXLBFwBPMz4Tue4KB8eKgaRbbQOKtic5ryy
Ga58VKWPhg6sr/PafSb+QmRag7enYe7CwFaOYJ8+BgNun0leGrbXpdWko6MS9FXxwJ5+E727QQBo
uHVsNoNV1kWwojmL0PhVX8IS8bJYmNdRS8+ZIP59SzUN2rrh828tR1Zws0FGt/dD07HEe8DKaFic
XoFebLyUwMFr0dk3m3kfAaQ73+RswXecCI7EjifYPpl80oA3DL5BehKkIeSNQcj5l92qkeaJFzS8
gbZ23ikMpQZmv8MMU3hdW6Y6lqP95ryBzJsnujsXBtbDTerMJb1AJjRs3UZu8gFv6TxzG0c9yD0t
tyOipdiyu9zUVdys+sUU8cmIW8MF6W3V/1XweARPHcxxU1wACGqkE6bhMti14Mte0GqXU+YrRr4a
rKtvLpAElW6CSppFRTw2hKXUm+3OQJN1RR11cVaRGxwQJ4gHGnwp9wKdQH6N3RhWMi8/797S465i
iCHl7cjRE+YowWsWAzR7JImS3s6MFo7xvPcGa2kLueiRvt5KRP1F
`protect end_protected
| bsd-2-clause | 28868b9ace5081d596abcb848e0cc86b | 0.931647 | 1.872609 | false | false | false | false |
sergeykhbr/riscv_vhdl | vhdl/rtl/riverlib/core/execute.vhd | 1 | 32,345 | --!
--! Copyright 2019 Sergey Khabarov, [email protected]
--!
--! Licensed under the Apache License, Version 2.0 (the "License");
--! you may not use this file except in compliance with the License.
--! You may obtain a copy of the License at
--!
--! http://www.apache.org/licenses/LICENSE-2.0
--!
--! Unless required by applicable law or agreed to in writing, software
--! distributed under the License is distributed on an "AS IS" BASIS,
--! WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
--! See the License for the specific language governing permissions and
--! limitations under the License.
--!
library ieee;
use ieee.std_logic_1164.all;
use IEEE.std_logic_arith.all; -- UNSIGNED function
use ieee.std_logic_misc.all; -- or_reduce()
library commonlib;
use commonlib.types_common.all;
--! RIVER CPU specific library.
library riverlib;
--! RIVER CPU configuration constants.
use riverlib.river_cfg.all;
entity InstrExecute is generic (
async_reset : boolean;
fpu_ena : boolean
);
port (
i_clk : in std_logic;
i_nrst : in std_logic; -- Reset active LOW
i_d_valid : in std_logic; -- Decoded instruction is valid
i_d_radr1 : in std_logic_vector(5 downto 0);
i_d_radr2 : in std_logic_vector(5 downto 0);
i_d_waddr : in std_logic_vector(5 downto 0);
i_d_imm : in std_logic_vector(RISCV_ARCH-1 downto 0);
i_d_pc : in std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0); -- Instruction pointer on decoded instruction
i_d_instr : in std_logic_vector(31 downto 0); -- Decoded instruction value
i_d_progbuf_ena : in std_logic; -- instruction from progbuf passed decoder
i_dbg_progbuf_ena : in std_logic; -- progbuf mode enabled
i_wb_waddr : in std_logic_vector(5 downto 0); -- Write back address
i_memop_store : in std_logic; -- Store to memory operation
i_memop_load : in std_logic; -- Load from memoru operation
i_memop_sign_ext : in std_logic; -- Load memory value with sign extending
i_memop_size : in std_logic_vector(1 downto 0); -- Memory transaction size
i_unsigned_op : in std_logic; -- Unsigned operands
i_rv32 : in std_logic; -- 32-bits instruction
i_compressed : in std_logic; -- C-extension (2-bytes length)
i_f64 : in std_logic; -- D-extension (FPU)
i_isa_type : in std_logic_vector(ISA_Total-1 downto 0); -- Type of the instruction's structure (ISA spec.)
i_ivec : in std_logic_vector(Instr_Total-1 downto 0); -- One pulse per supported instruction.
i_unsup_exception : in std_logic; -- Unsupported instruction exception
i_instr_load_fault : in std_logic; -- Instruction fetched from fault address
i_instr_executable : in std_logic; -- MPU flag
i_dport_npc_write : in std_logic; -- Write npc value from debug port
i_dport_npc : in std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);-- Debug port npc value to write
i_rdata1 : in std_logic_vector(RISCV_ARCH-1 downto 0); -- Integer/FPU registers value 1
i_rhazard1 : in std_logic;
i_rdata2 : in std_logic_vector(RISCV_ARCH-1 downto 0); -- Integer/FPU registers value 2
i_rhazard2 : in std_logic;
i_wtag : in std_logic_vector(3 downto 0);
o_wena : out std_logic;
o_waddr : out std_logic_vector(5 downto 0); -- Address to store result of the instruction (0=do not store)
o_whazard : out std_logic;
o_wdata : out std_logic_vector(RISCV_ARCH-1 downto 0); -- Value to store
o_wtag : out std_logic_vector(3 downto 0);
o_d_ready : out std_logic; -- Hold pipeline while 'writeback' not done or multi-clock instruction.
o_csr_wena : out std_logic; -- Write new CSR value
i_csr_rdata : in std_logic_vector(RISCV_ARCH-1 downto 0); -- CSR current value
o_csr_wdata : out std_logic_vector(RISCV_ARCH-1 downto 0); -- CSR new value
i_mepc : in std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0); -- next instruction in a case of MRET
i_uepc : in std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0); --
i_trap_valid : in std_logic;
i_trap_pc : in std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
-- exceptions:
o_ex_npc : out std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
o_ex_instr_load_fault : out std_logic; -- Instruction fetched from fault address
o_ex_instr_not_executable : out std_logic; -- MPU prohibit this instruction
o_ex_illegal_instr : out std_logic;
o_ex_unalign_store : out std_logic;
o_ex_unalign_load : out std_logic;
o_ex_breakpoint : out std_logic;
o_ex_ecall : out std_logic;
o_ex_fpu_invalidop : out std_logic; -- FPU Exception: invalid operation
o_ex_fpu_divbyzero : out std_logic; -- FPU Exception: divide by zero
o_ex_fpu_overflow : out std_logic; -- FPU Exception: overflow
o_ex_fpu_underflow : out std_logic; -- FPU Exception: underflow
o_ex_fpu_inexact : out std_logic; -- FPU Exception: inexact
o_fpu_valid : out std_logic; -- FPU output is valid
o_memop_sign_ext : out std_logic; -- Load data with sign extending
o_memop_load : out std_logic; -- Load data instruction
o_memop_store : out std_logic; -- Store data instruction
o_memop_size : out std_logic_vector(1 downto 0); -- 0=1bytes; 1=2bytes; 2=4bytes; 3=8bytes
o_memop_addr : out std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);-- Memory access address
o_memop_wdata : out std_logic_vector(RISCV_ARCH-1 downto 0);
o_memop_waddr : out std_logic_vector(5 downto 0);
o_memop_wtag : out std_logic_vector(3 downto 0);
i_memop_ready : in std_logic;
o_trap_ready : out std_logic; -- Trap branch request was accepted
o_valid : out std_logic; -- Output is valid
o_pc : out std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0); -- Valid instruction pointer
o_npc : out std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0); -- Next instruction pointer. Next decoded pc must match to this value or will be ignored.
o_instr : out std_logic_vector(31 downto 0); -- Valid instruction value
i_flushd_end : in std_logic;
o_flushd : out std_logic;
o_flushi : out std_logic;
o_call : out std_logic; -- CALL pseudo instruction detected
o_ret : out std_logic; -- RET pseudoinstruction detected
o_mret : out std_logic; -- MRET instruction
o_uret : out std_logic; -- URET instruction
o_multi_ready : out std_logic
);
end;
architecture arch_InstrExecute of InstrExecute is
constant Multi_MUL : integer := 0;
constant Multi_DIV : integer := 1;
constant Multi_FPU : integer := 2;
constant Multi_Total : integer := 3;
constant zero64 : std_logic_vector(63 downto 0) := (others => '0');
type multi_arith_type is array (0 to Multi_Total-1)
of std_logic_vector(RISCV_ARCH-1 downto 0);
type RegistersType is record
pc : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
npc : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
instr : std_logic_vector(31 downto 0);
memop_waddr : std_logic_vector(5 downto 0);
memop_wtag : std_logic_vector(3 downto 0);
wval : std_logic_vector(RISCV_ARCH-1 downto 0);
memop_load : std_logic;
memop_store : std_logic;
memop_sign_ext : std_logic;
memop_size : std_logic_vector(1 downto 0);
memop_addr : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
memop_wdata : std_logic_vector(RISCV_ARCH-1 downto 0);
valid : std_logic;
call : std_logic;
ret : std_logic;
flushd : std_logic;
hold_fencei : std_logic;
progbuf_npc : std_logic_vector(31 downto 0);
end record;
constant R_RESET : RegistersType := (
(others => '0'), CFG_NMI_RESET_VECTOR, -- pc, npc
(others => '0'), (others => '0'), -- instr, memop_waddr
(others => '0'), (others => '0'), -- memop_wtag, wval
'0', '0', '0', "00", (others => '0'), -- memop_load, memop_store, memop_sign_ext, memop_size, memop_addr
(others => '0'), -- memop_wdata
'0', -- valid
'0', '0', -- call, ret
'0', '0', -- flushd, hold_fencei
(others => '0') -- progbuf_ena
);
signal r, rin : RegistersType;
signal wb_arith_res : multi_arith_type;
signal w_arith_ena : std_logic_vector(Multi_Total-1 downto 0);
signal w_arith_valid : std_logic_vector(Multi_Total-1 downto 0);
signal w_arith_busy : std_logic_vector(Multi_Total-1 downto 0);
signal w_arith_residual_high: std_logic;
signal w_mul_hsu: std_logic;
signal w_multi_ena : std_logic;
signal wb_rdata1 : std_logic_vector(RISCV_ARCH-1 downto 0);
signal wb_rdata2 : std_logic_vector(RISCV_ARCH-1 downto 0);
signal wb_shifter_a1 : std_logic_vector(RISCV_ARCH-1 downto 0); -- Shifters operand 1
signal wb_shifter_a2 : std_logic_vector(5 downto 0); -- Shifters operand 2
signal wb_sll : std_logic_vector(RISCV_ARCH-1 downto 0);
signal wb_sllw : std_logic_vector(RISCV_ARCH-1 downto 0);
signal wb_srl : std_logic_vector(RISCV_ARCH-1 downto 0);
signal wb_srlw : std_logic_vector(RISCV_ARCH-1 downto 0);
signal wb_sra : std_logic_vector(RISCV_ARCH-1 downto 0);
signal wb_sraw : std_logic_vector(RISCV_ARCH-1 downto 0);
component IntMul is generic (
async_reset : boolean
);
port (
i_clk : in std_logic;
i_nrst : in std_logic;
i_ena : in std_logic;
i_unsigned : in std_logic;
i_hsu : in std_logic;
i_high : in std_logic;
i_rv32 : in std_logic;
i_a1 : in std_logic_vector(RISCV_ARCH-1 downto 0);
i_a2 : in std_logic_vector(RISCV_ARCH-1 downto 0);
o_res : out std_logic_vector(RISCV_ARCH-1 downto 0);
o_valid : out std_logic;
o_busy : out std_logic
);
end component;
component IntDiv is generic (
async_reset : boolean
);
port (
i_clk : in std_logic;
i_nrst : in std_logic;
i_ena : in std_logic;
i_unsigned : in std_logic;
i_rv32 : in std_logic;
i_residual : in std_logic;
i_a1 : in std_logic_vector(RISCV_ARCH-1 downto 0);
i_a2 : in std_logic_vector(RISCV_ARCH-1 downto 0);
o_res : out std_logic_vector(RISCV_ARCH-1 downto 0);
o_valid : out std_logic;
o_busy : out std_logic
);
end component;
component Shifter is port (
i_a1 : in std_logic_vector(RISCV_ARCH-1 downto 0);
i_a2 : in std_logic_vector(5 downto 0);
o_sll : out std_logic_vector(RISCV_ARCH-1 downto 0);
o_sllw : out std_logic_vector(RISCV_ARCH-1 downto 0);
o_srl : out std_logic_vector(RISCV_ARCH-1 downto 0);
o_sra : out std_logic_vector(RISCV_ARCH-1 downto 0);
o_srlw : out std_logic_vector(RISCV_ARCH-1 downto 0);
o_sraw : out std_logic_vector(RISCV_ARCH-1 downto 0)
);
end component;
component FpuTop is
generic (
async_reset : boolean
);
port (
i_nrst : in std_logic;
i_clk : in std_logic;
i_ena : in std_logic;
i_ivec : in std_logic_vector(Instr_FPU_Total-1 downto 0);
i_a : in std_logic_vector(63 downto 0);
i_b : in std_logic_vector(63 downto 0);
o_res : out std_logic_vector(63 downto 0);
o_ex_invalidop : out std_logic; -- Exception: invalid operation
o_ex_divbyzero : out std_logic; -- Exception: divide by zero
o_ex_overflow : out std_logic; -- Exception: overflow
o_ex_underflow : out std_logic; -- Exception: underflow
o_ex_inexact : out std_logic; -- Exception: inexact
o_valid : out std_logic;
o_busy : out std_logic
);
end component;
begin
mul0 : IntMul generic map (
async_reset => async_reset
) port map (
i_clk => i_clk,
i_nrst => i_nrst,
i_ena => w_arith_ena(Multi_MUL),
i_unsigned => i_unsigned_op,
i_hsu => w_mul_hsu,
i_high => w_arith_residual_high,
i_rv32 => i_rv32,
i_a1 => wb_rdata1,
i_a2 => wb_rdata2,
o_res => wb_arith_res(Multi_MUL),
o_valid => w_arith_valid(Multi_MUL),
o_busy => w_arith_busy(Multi_MUL));
div0 : IntDiv generic map (
async_reset => async_reset
) port map (
i_clk => i_clk,
i_nrst => i_nrst,
i_ena => w_arith_ena(Multi_DIV),
i_unsigned => i_unsigned_op,
i_residual => w_arith_residual_high,
i_rv32 => i_rv32,
i_a1 => wb_rdata1,
i_a2 => wb_rdata2,
o_res => wb_arith_res(Multi_DIV),
o_valid => w_arith_valid(Multi_DIV),
o_busy => w_arith_busy(Multi_DIV));
sh0 : Shifter port map (
i_a1 => wb_shifter_a1,
i_a2 => wb_shifter_a2,
o_sll => wb_sll,
o_sllw => wb_sllw,
o_srl => wb_srl,
o_sra => wb_sra,
o_srlw => wb_srlw,
o_sraw => wb_sraw);
fpuena : if fpu_ena generate
fpu0 : FpuTop generic map (
async_reset => async_reset
) port map (
i_clk => i_clk,
i_nrst => i_nrst,
i_ena => w_arith_ena(Multi_FPU),
i_ivec => i_ivec(Instr_FSUB_D downto Instr_FADD_D),
i_a => wb_rdata1,
i_b => wb_rdata2,
o_res => wb_arith_res(Multi_FPU),
o_ex_invalidop => o_ex_fpu_invalidop,
o_ex_divbyzero => o_ex_fpu_divbyzero,
o_ex_overflow => o_ex_fpu_overflow,
o_ex_underflow => o_ex_fpu_underflow,
o_ex_inexact => o_ex_fpu_inexact,
o_valid => w_arith_valid(Multi_FPU),
o_busy => w_arith_busy(Multi_FPU)
);
end generate;
fpudis : if not fpu_ena generate
wb_arith_res(Multi_FPU) <= (others => '0');
w_arith_valid(Multi_FPU) <= '0';
w_arith_busy(Multi_FPU) <= '0';
o_fpu_valid <= '0';
o_ex_fpu_invalidop <= '0';
o_ex_fpu_divbyzero <= '0';
o_ex_fpu_overflow <= '0';
o_ex_fpu_underflow <= '0';
o_ex_fpu_inexact <= '0';
end generate;
comb : process(i_nrst, i_d_valid, i_d_radr1, i_d_radr2, i_d_waddr, i_d_imm,
i_d_pc, i_d_instr, i_d_progbuf_ena, i_dbg_progbuf_ena, i_wb_waddr,
i_memop_load, i_memop_store, i_memop_sign_ext,
i_memop_size, i_unsigned_op, i_rv32, i_compressed, i_f64, i_isa_type, i_ivec,
i_unsup_exception, i_instr_load_fault, i_instr_executable,
i_dport_npc_write, i_dport_npc,
i_rdata1, i_rhazard1, i_rdata2, i_rhazard2, i_wtag, i_csr_rdata,
i_mepc, i_uepc,
i_trap_valid, i_trap_pc, i_memop_ready, i_flushd_end,
wb_arith_res, w_arith_valid, w_arith_busy,
wb_sll, wb_sllw, wb_srl, wb_srlw, wb_sra, wb_sraw, r)
variable v : RegistersType;
variable w_exception_store : std_logic;
variable w_exception_load : std_logic;
variable v_multi_ena : std_logic;
variable w_multi_ready : std_logic;
variable w_multi_busy : std_logic;
variable w_next_ready : std_logic;
variable w_hold_multi : std_logic;
variable w_hold_hazard : std_logic;
variable w_hold_memop : std_logic;
variable v_fence : std_logic;
variable v_fencei : std_logic;
variable v_mret : std_logic;
variable v_uret : std_logic;
variable v_csr_wena : std_logic;
variable vb_csr_wdata : std_logic_vector(RISCV_ARCH-1 downto 0);
variable vb_res : std_logic_vector(RISCV_ARCH-1 downto 0);
variable vb_prog_npc : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
variable vb_npc_incr : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
variable vb_npc : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
variable vb_off : std_logic_vector(RISCV_ARCH-1 downto 0);
variable vb_sum64 : std_logic_vector(RISCV_ARCH-1 downto 0);
variable vb_sum32 : std_logic_vector(RISCV_ARCH-1 downto 0);
variable vb_sub64 : std_logic_vector(RISCV_ARCH-1 downto 0);
variable vb_sub32 : std_logic_vector(RISCV_ARCH-1 downto 0);
variable vb_and64 : std_logic_vector(RISCV_ARCH-1 downto 0);
variable vb_or64 : std_logic_vector(RISCV_ARCH-1 downto 0);
variable vb_xor64 : std_logic_vector(RISCV_ARCH-1 downto 0);
variable vb_memop_addr : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
variable wv : std_logic_vector(Instr_Total-1 downto 0);
variable opcode_len : integer;
variable v_call : std_logic;
variable v_ret : std_logic;
variable v_pc_branch : std_logic;
variable v_less : std_logic;
variable v_gr_equal : std_logic;
variable vb_i_rdata1 : std_logic_vector(RISCV_ARCH-1 downto 0);
variable vb_i_rdata2 : std_logic_vector(RISCV_ARCH-1 downto 0);
variable vb_rdata1 : std_logic_vector(RISCV_ARCH-1 downto 0);
variable vb_rdata2 : std_logic_vector(RISCV_ARCH-1 downto 0);
variable vb_rfdata1 : std_logic_vector(RISCV_ARCH-1 downto 0);
variable vb_rfdata2 : std_logic_vector(RISCV_ARCH-1 downto 0);
variable v_o_valid : std_logic;
variable vb_o_wdata : std_logic_vector(RISCV_ARCH-1 downto 0);
variable v_hold_exec : std_logic;
variable int_radr1 : integer;
variable int_radr2 : integer;
variable int_waddr : integer;
variable v_next_mul_ready : std_logic;
variable v_next_div_ready : std_logic;
variable v_next_fpu_ready : std_logic;
variable v_wena : std_logic;
variable v_whazard : std_logic;
variable vb_waddr : std_logic_vector(5 downto 0);
variable v_next_normal : std_logic;
variable v_next_progbuf : std_logic;
begin
v := r;
v_csr_wena := '0';
vb_csr_wdata := (others => '0');
vb_res := (others => '0');
vb_off := (others => '0');
vb_memop_addr := (others => '0');
wv := i_ivec;
v_call := '0';
v_ret := '0';
v.valid := '0';
v.call := '0';
v.ret := '0';
vb_rdata1 := (others => '0');
vb_rdata2 := (others => '0');
int_radr1 := conv_integer(i_d_radr1);
int_radr2 := conv_integer(i_d_radr2);
int_waddr := conv_integer(i_d_waddr);
vb_i_rdata1 := i_rdata1;
vb_i_rdata2 := i_rdata2;
if i_isa_type(ISA_R_type) = '1' then
vb_rdata1 := vb_i_rdata1;
vb_rdata2 := vb_i_rdata2;
elsif i_isa_type(ISA_I_type) = '1' then
vb_rdata1 := vb_i_rdata1;
vb_rdata2 := i_d_imm;
elsif i_isa_type(ISA_SB_type) = '1' then
vb_rdata1 := vb_i_rdata1;
vb_rdata2 := vb_i_rdata2;
vb_off := i_d_imm;
elsif i_isa_type(ISA_UJ_type) = '1' then
vb_rdata1(CFG_CPU_ADDR_BITS-1 downto 0) := i_d_pc;
vb_off := i_d_imm;
elsif i_isa_type(ISA_U_type) = '1' then
vb_rdata1(CFG_CPU_ADDR_BITS-1 downto 0) := i_d_pc;
vb_rdata2 := i_d_imm;
elsif i_isa_type(ISA_S_type) = '1' then
vb_rdata1 := vb_i_rdata1;
vb_rdata2 := vb_i_rdata2;
vb_off := i_d_imm;
end if;
w_multi_busy := w_arith_busy(Multi_MUL) or w_arith_busy(Multi_DIV)
or w_arith_busy(Multi_FPU);
w_multi_ready := w_arith_valid(Multi_MUL) or w_arith_valid(Multi_DIV)
or w_arith_valid(Multi_FPU);
-- Hold signals:
-- 1. hazard
-- 2. memaccess not ready to accept next memop operation (or flush request)
-- 3. multi instruction
-- 4. Flushing $D on fence.i instruction
--
w_hold_hazard := i_rhazard1 or i_rhazard2;
w_hold_memop := (i_memop_load or i_memop_store or
wv(Instr_FENCE) or wv(Instr_FENCE_I))
and not i_memop_ready;
w_hold_multi := w_multi_busy or w_multi_ready;
v_hold_exec := w_hold_hazard or w_hold_memop or w_hold_multi
or r.hold_fencei;
v_next_normal := '0';
if i_d_pc = r.npc and i_dbg_progbuf_ena = '0'
and i_d_progbuf_ena = '0' then
v_next_normal := '1';
end if;
v_next_progbuf := '0';
if i_d_pc = r.progbuf_npc and i_dbg_progbuf_ena = '1'
and i_d_progbuf_ena = '1' then
v_next_progbuf := '1';
end if;
w_next_ready := '0';
if i_d_valid = '1' and (v_next_normal or v_next_progbuf) = '1'
and v_hold_exec = '0' then
w_next_ready := '1';
end if;
v_fence := wv(Instr_FENCE) and w_next_ready;
v_fencei := wv(Instr_FENCE_I) and w_next_ready;
v_mret := wv(Instr_MRET) and w_next_ready;
v_uret := wv(Instr_URET) and w_next_ready;
v_next_mul_ready := (wv(Instr_MUL) or wv(Instr_MULW)
or wv(Instr_MULH) or wv(Instr_MULHSU)
or wv(Instr_MULHU)) and w_next_ready;
v_next_div_ready := (wv(Instr_DIV) or wv(Instr_DIVU)
or wv(Instr_DIVW) or wv(Instr_DIVUW)
or wv(Instr_REM) or wv(Instr_REMU)
or wv(Instr_REMW) or wv(Instr_REMUW)) and w_next_ready;
v_next_fpu_ready := '0';
if fpu_ena then
if i_f64 = '1' and (wv(Instr_FSD) or wv(Instr_FLD)) = '0' then
v_next_fpu_ready := w_next_ready;
end if;
end if;
w_arith_residual_high <= (wv(Instr_REM) or wv(Instr_REMU)
or wv(Instr_REMW) or wv(Instr_REMUW)
or wv(Instr_MULH) or wv(Instr_MULHSU) or wv(Instr_MULHU));
w_mul_hsu <= wv(Instr_MULHSU);
v_multi_ena := v_next_mul_ready or v_next_div_ready or v_next_fpu_ready;
w_arith_ena(Multi_MUL) <= v_next_mul_ready;
w_arith_ena(Multi_DIV) <= v_next_div_ready;
w_arith_ena(Multi_FPU) <= v_next_fpu_ready;
if i_memop_load = '1' then
vb_memop_addr :=
vb_rdata1(CFG_CPU_ADDR_BITS-1 downto 0) + vb_rdata2(CFG_CPU_ADDR_BITS-1 downto 0);
elsif i_memop_store = '1' then
vb_memop_addr :=
vb_rdata1(CFG_CPU_ADDR_BITS-1 downto 0) + vb_off(CFG_CPU_ADDR_BITS-1 downto 0);
elsif (wv(Instr_FENCE) or wv(Instr_FENCE_I)) = '1' then
vb_memop_addr := (others => '1');
elsif wv(Instr_EBREAK) = '1' then
vb_memop_addr := i_d_pc;
end if;
w_exception_store := '0';
w_exception_load := '0';
if (wv(Instr_LD) = '1' and vb_memop_addr(2 downto 0) /= "000")
or ((wv(Instr_LW) or wv(Instr_LWU)) = '1' and vb_memop_addr(1 downto 0) /= "00")
or ((wv(Instr_LH) or wv(Instr_LHU)) = '1' and vb_memop_addr(0) = '1') then
w_exception_load := '1';
end if;
if (wv(Instr_SD) = '1' and vb_memop_addr(2 downto 0) /= "000")
or (wv(Instr_SW) = '1' and vb_memop_addr(1 downto 0) /= "00")
or (wv(Instr_SH) = '1' and vb_memop_addr(0) = '1') then
w_exception_store := '1';
end if;
-- parallel ALU:
vb_sum64 := vb_rdata1 + vb_rdata2;
vb_sum32(31 downto 0) := vb_rdata1(31 downto 0) + vb_rdata2(31 downto 0);
vb_sum32(63 downto 32) := (others => vb_sum32(31));
vb_sub64 := vb_rdata1 - vb_rdata2;
vb_sub32(31 downto 0) := vb_rdata1(31 downto 0) - vb_rdata2(31 downto 0);
vb_sub32(63 downto 32) := (others => vb_sub32(31));
vb_and64 := vb_rdata1 and vb_rdata2;
vb_or64 := vb_rdata1 or vb_rdata2;
vb_xor64 := vb_rdata1 xor vb_rdata2;
wb_shifter_a1 <= vb_rdata1;
wb_shifter_a2 <= vb_rdata2(5 downto 0);
v_less := '0';
v_gr_equal := '0';
if UNSIGNED(vb_rdata1) < UNSIGNED(vb_rdata2) then
v_less := '1';
end if;
if UNSIGNED(vb_rdata1) >= UNSIGNED(vb_rdata2) then
v_gr_equal := '1';
end if;
-- Relative Branch on some condition:
v_pc_branch := '0';
if ((wv(Instr_BEQ) = '1' and (vb_sub64 = zero64))
or (wv(Instr_BGE) = '1' and (vb_sub64(63) = '0'))
or (wv(Instr_BGEU) = '1' and (v_gr_equal = '1'))
or (wv(Instr_BLT) = '1' and (vb_sub64(63) = '1'))
or (wv(Instr_BLTU) = '1' and (v_less = '1'))
or (wv(Instr_BNE) = '1' and (vb_sub64 /= zero64))) then
v_pc_branch := '1';
end if;
opcode_len := 4;
if i_compressed = '1' then
opcode_len := 2;
end if;
vb_npc_incr := i_d_pc + opcode_len;
if v_pc_branch = '1' then
vb_prog_npc := i_d_pc + vb_off(CFG_CPU_ADDR_BITS-1 downto 0);
elsif wv(Instr_JAL) = '1' then
vb_prog_npc := vb_rdata1(CFG_CPU_ADDR_BITS-1 downto 0) + vb_off(CFG_CPU_ADDR_BITS-1 downto 0);
elsif wv(Instr_JALR) = '1' then
vb_prog_npc := vb_rdata1(CFG_CPU_ADDR_BITS-1 downto 0) + vb_rdata2(CFG_CPU_ADDR_BITS-1 downto 0);
vb_prog_npc(0) := '0';
elsif wv(Instr_MRET) = '1' then
vb_prog_npc := i_mepc;
elsif wv(Instr_URET) = '1' then
vb_prog_npc := i_uepc;
else
vb_prog_npc := vb_npc_incr;
end if;
if i_trap_valid = '1' then
vb_npc := i_trap_pc;
else
vb_npc := vb_prog_npc;
end if;
-- ALU block selector:
if w_arith_valid(Multi_MUL) = '1' then
vb_res := wb_arith_res(Multi_MUL);
elsif w_arith_valid(Multi_DIV) = '1' then
vb_res := wb_arith_res(Multi_DIV);
elsif w_arith_valid(Multi_FPU) = '1' then
vb_res := wb_arith_res(Multi_FPU);
elsif i_memop_load = '1' then
vb_res := (others => '0');
elsif i_memop_store = '1' then
vb_res := vb_rdata2;
elsif wv(Instr_JAL) = '1' then
vb_res(CFG_CPU_ADDR_BITS-1 downto 0) := vb_npc_incr;
if int_waddr = Reg_ra then
v_call := '1';
end if;
elsif wv(Instr_JALR) = '1' then
vb_res(CFG_CPU_ADDR_BITS-1 downto 0) := vb_npc_incr;
if int_waddr = Reg_ra then
v_call := '1';
elsif or_reduce(vb_rdata2) = '0' and int_radr1 = Reg_ra then
v_ret := '1';
end if;
elsif (wv(Instr_ADD) or wv(Instr_ADDI) or wv(Instr_AUIPC)) = '1' then
vb_res := vb_sum64;
elsif (wv(Instr_ADDW) or wv(Instr_ADDIW)) = '1' then
vb_res := vb_sum32;
elsif wv(Instr_SUB) = '1' then
vb_res := vb_sub64;
elsif wv(Instr_SUBW) = '1' then
vb_res := vb_sub32;
elsif (wv(Instr_SLL) or wv(Instr_SLLI)) = '1' then
vb_res := wb_sll;
elsif (wv(Instr_SLLW) or wv(Instr_SLLIW)) = '1' then
vb_res := wb_sllw;
elsif (wv(Instr_SRL) or wv(Instr_SRLI)) = '1' then
vb_res := wb_srl;
elsif (wv(Instr_SRLW) or wv(Instr_SRLIW)) = '1' then
vb_res := wb_srlw;
elsif (wv(Instr_SRA) or wv(Instr_SRAI)) = '1' then
vb_res := wb_sra;
elsif (wv(Instr_SRAW) or wv(Instr_SRAW) or wv(Instr_SRAIW)) = '1' then
vb_res := wb_sraw;
elsif (wv(Instr_AND) or wv(Instr_ANDI)) = '1' then
vb_res := vb_and64;
elsif (wv(Instr_OR) or wv(Instr_ORI)) = '1' then
vb_res := vb_or64;
elsif (wv(Instr_XOR) or wv(Instr_XORI)) = '1' then
vb_res := vb_xor64;
elsif (wv(Instr_SLT) or wv(Instr_SLTI)) = '1' then
vb_res(RISCV_ARCH-1 downto 1) := (others => '0');
vb_res(0) := vb_sub64(63);
elsif (wv(Instr_SLTU) or wv(Instr_SLTIU)) = '1' then
vb_res(63 downto 1) := (others => '0');
vb_res(0) := v_less;
elsif wv(Instr_LUI) = '1' then
vb_res := vb_rdata2;
elsif wv(Instr_CSRRC) = '1' then
vb_res := i_csr_rdata;
v_csr_wena := '1';
vb_csr_wdata := i_csr_rdata and (not vb_rdata1);
elsif wv(Instr_CSRRCI) = '1' then
vb_res := i_csr_rdata;
v_csr_wena := '1';
vb_csr_wdata(RISCV_ARCH-1 downto 5) := i_csr_rdata(RISCV_ARCH-1 downto 5);
vb_csr_wdata(4 downto 0) := i_csr_rdata(4 downto 0) and not i_d_radr1(4 downto 0); -- zero-extending 5 to 64-bits
elsif wv(Instr_CSRRS) = '1' then
vb_res := i_csr_rdata;
v_csr_wena := '1';
vb_csr_wdata := i_csr_rdata or vb_rdata1;
elsif wv(Instr_CSRRSI) = '1' then
vb_res := i_csr_rdata;
v_csr_wena := '1';
vb_csr_wdata(RISCV_ARCH-1 downto 5) := i_csr_rdata(RISCV_ARCH-1 downto 5);
vb_csr_wdata(4 downto 0) := i_csr_rdata(4 downto 0) or i_d_radr1(4 downto 0); -- zero-extending 5 to 64-bits
elsif wv(Instr_CSRRW) = '1' then
vb_res := i_csr_rdata;
v_csr_wena := '1';
vb_csr_wdata := vb_rdata1;
elsif wv(Instr_CSRRWI) = '1' then
vb_res := i_csr_rdata;
v_csr_wena := '1';
vb_csr_wdata(RISCV_ARCH-1 downto 5) := (others => '0');
vb_csr_wdata(4 downto 0) := i_d_radr1(4 downto 0); -- zero-extending 5 to 64-bits
end if;
-- Latch ready result
v_wena := '0';
v_whazard := '0';
vb_waddr := i_d_waddr;
vb_o_wdata := vb_res;
if w_next_ready = '1' then
v.valid := '1';
if i_dbg_progbuf_ena = '0' then
v.pc := i_d_pc;
v.npc := vb_npc;
else
v.progbuf_npc := vb_npc_incr;
end if;
v.instr := i_d_instr;
v.memop_load := i_memop_load;
v.memop_sign_ext := i_memop_sign_ext;
v.memop_store := i_memop_store;
v.memop_size := i_memop_size;
v.memop_addr := vb_memop_addr;
v.memop_wdata := vb_res;
v.memop_waddr := i_d_waddr;
v.memop_wtag := i_wtag + 1;
v_whazard := i_memop_load;
v_wena := or_reduce(i_d_waddr) and not v_multi_ena;
v.wval := vb_res;
v.call := v_call;
v.ret := v_ret;
v.flushd := v_fencei or v_fence;
v.hold_fencei := v_fencei;
end if;
if i_dbg_progbuf_ena = '0' then
v.progbuf_npc := (others => '0');
end if;
if i_flushd_end = '1' then
v.hold_fencei := '0';
end if;
if w_multi_ready = '1' then
v_wena := or_reduce(r.memop_waddr);
vb_waddr := r.memop_waddr;
end if;
v_o_valid := (r.valid and not w_multi_busy) or w_multi_ready;
if i_dport_npc_write = '1' then
v.npc := i_dport_npc;
end if;
if not async_reset and i_nrst = '0' then
v := R_RESET;
end if;
wb_rdata1 <= vb_rdata1;
wb_rdata2 <= vb_rdata2;
w_multi_ena <= v_multi_ena;
o_trap_ready <= w_next_ready;
o_ex_instr_load_fault <= i_instr_load_fault and w_next_ready;
o_ex_instr_not_executable <= not i_instr_executable and w_next_ready;
o_ex_illegal_instr <= i_unsup_exception and w_next_ready;
o_ex_unalign_store <= w_exception_store and w_next_ready;
o_ex_unalign_load <= w_exception_load and w_next_ready;
o_ex_breakpoint <= wv(Instr_EBREAK) and w_next_ready;
o_ex_ecall <= wv(Instr_ECALL) and w_next_ready;
o_wena <= v_wena;
o_whazard <= v_whazard;
o_waddr <= vb_waddr;
o_wdata <= vb_o_wdata;
o_wtag <= i_wtag;
o_d_ready <= not v_hold_exec;
o_csr_wena <= v_csr_wena and w_next_ready;
o_csr_wdata <= vb_csr_wdata;
o_ex_npc <= vb_prog_npc;
o_memop_sign_ext <= r.memop_sign_ext;
o_memop_load <= r.memop_load;
o_memop_store <= r.memop_store;
o_memop_size <= r.memop_size;
o_memop_addr <= r.memop_addr;
o_memop_wdata <= r.memop_wdata;
o_memop_waddr <= r.memop_waddr;
o_memop_wtag <= r.memop_wtag;
o_valid <= v_o_valid;
o_pc <= r.pc;
o_npc <= r.npc;
o_instr <= r.instr;
o_flushd <= r.flushd; -- must be post in memory queue to avoid too early flushing
o_flushi <= v_fencei or v_fence;
o_call <= r.call;
o_ret <= r.ret;
o_mret <= v_mret;
o_uret <= v_uret;
o_fpu_valid <= w_arith_valid(Multi_FPU);
-- Tracer only:
o_multi_ready <= w_multi_ready;
rin <= v;
end process;
-- registers:
regs : process(i_clk, i_nrst)
begin
if async_reset and i_nrst = '0' then
r <= R_RESET;
elsif rising_edge(i_clk) then
r <= rin;
end if;
end process;
end;
| apache-2.0 | 85acd09d3732e07fa07400e8ef40280c | 0.567197 | 3.031681 | false | false | false | false |
qeedquan/fpga | de2-115/nios_lights/lights/lights_inst.vhd | 1 | 717 | component lights is
port (
clk_clk : in std_logic := 'X'; -- clk
reset_reset_n : in std_logic := 'X'; -- reset_n
switches_export : in std_logic_vector(7 downto 0) := (others => 'X'); -- export
leds_export : out std_logic_vector(7 downto 0) -- export
);
end component lights;
u0 : component lights
port map (
clk_clk => CONNECTED_TO_clk_clk, -- clk.clk
reset_reset_n => CONNECTED_TO_reset_reset_n, -- reset.reset_n
switches_export => CONNECTED_TO_switches_export, -- switches.export
leds_export => CONNECTED_TO_leds_export -- leds.export
);
| mit | d6f2c34fef59aa870a9b5c7071692183 | 0.516039 | 3.398104 | false | false | false | false |
sergeykhbr/riscv_vhdl | vhdl/rtl/techmap/mem/srambytes_tech.vhd | 1 | 3,951 | ----------------------------------------------------------------------------
--! @file
--! @copyright Copyright 2015 GNSS Sensor Ltd. All right reserved.
--! @author Sergey Khabarov
--! @brief Internal SRAM implementation with the byte access.
------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
library commonlib;
use commonlib.types_common.all;
library techmap;
use techmap.gencomp.all;
use techmap.types_mem.all;
--! AMBA system bus specific library.
library ambalib;
--! AXI4 configuration constants.
use ambalib.types_amba4.all;
entity srambytes_tech is
generic (
memtech : integer := 0;
abits : integer := 16;
init_file : string := ""
);
port (
clk : in std_logic;
raddr : in global_addr_array_type;
rdata : out std_logic_vector(CFG_SYSBUS_DATA_BITS-1 downto 0);
waddr : in global_addr_array_type;
we : in std_logic;
wstrb : in std_logic_vector(CFG_SYSBUS_DATA_BYTES-1 downto 0);
wdata : in std_logic_vector(CFG_SYSBUS_DATA_BITS-1 downto 0)
);
end;
architecture rtl of srambytes_tech is
--! reduced name of configuration constant:
constant dw : integer := CFG_SYSBUS_ADDR_OFFSET;
type local_addr_type is array (0 to CFG_SYSBUS_DATA_BYTES-1) of
std_logic_vector(abits-dw-1 downto 0);
signal address : local_addr_type;
signal wr_ena : std_logic_vector(CFG_SYSBUS_DATA_BYTES-1 downto 0);
--! @brief Declaration of the one-byte SRAM element.
--! @details This component is used for the FPGA implementation.
component sram8_inferred is
generic (
abits : integer := 12;
byte_idx : integer := 0
);
port (
clk : in std_ulogic;
address : in std_logic_vector(abits-1 downto 0);
rdata : out std_logic_vector(7 downto 0);
we : in std_logic;
wdata : in std_logic_vector(7 downto 0)
);
end component;
--! @brief Declaration of the one-byte SRAM element with init function.
--! @details This component is used for the RTL simulation.
component sram8_inferred_init is
generic (
abits : integer := 12;
byte_idx : integer := 0;
init_file : string
);
port (
clk : in std_ulogic;
address : in std_logic_vector(abits-1 downto 0);
rdata : out std_logic_vector(7 downto 0);
we : in std_logic;
wdata : in std_logic_vector(7 downto 0)
);
end component;
begin
--! Instantiate component for RTL simulation
rtlsim0 : if memtech = inferred generate
rx : for n in 0 to CFG_SYSBUS_DATA_BYTES-1 generate
wr_ena(n) <= we and wstrb(n);
address(n) <= waddr(n / CFG_ALIGN_BYTES)(abits-1 downto dw) when we = '1'
else raddr(n / CFG_ALIGN_BYTES)(abits-1 downto dw);
x0 : sram8_inferred_init generic map
(
abits => abits-dw,
byte_idx => n,
init_file => init_file
) port map (
clk,
address => address(n),
rdata => rdata(8*(n+1)-1 downto 8*n),
we => wr_ena(n),
wdata => wdata(8*(n+1)-1 downto 8*n)
);
end generate; -- cycle
end generate; -- tech=inferred
--! Instantiate component for FPGA (checked with Xilinx)
fpgasim0 : if memtech /= inferred and is_fpga(memtech) /= 0 generate
rx : for n in 0 to CFG_SYSBUS_DATA_BYTES-1 generate
wr_ena(n) <= we and wstrb(n);
address(n) <= waddr(n / CFG_ALIGN_BYTES)(abits-1 downto dw) when we = '1'
else raddr(n / CFG_ALIGN_BYTES)(abits-1 downto dw);
x0 : sram8_inferred generic map
(
abits => abits-dw,
byte_idx => n
) port map (
clk,
address => address(n),
rdata => rdata(8*(n+1)-1 downto 8*n),
we => wr_ena(n),
wdata => wdata(8*(n+1)-1 downto 8*n)
);
end generate; -- cycle
end generate; -- tech=inferred
end;
| apache-2.0 | 46e726ca98a5110b5c40a94c4aad336a | 0.579094 | 3.598361 | false | false | false | false |
Bjay1435/capstone | Geoff/Geoff.srcs/sources_1/bd/dma_loopback/ipshared/xilinx.com/axi_dma_v7_1/hdl/src/vhdl/axi_dma_s2mm.vhd | 1 | 17,062 | -- (c) Copyright 2012 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use ieee.std_logic_misc.all;
library unisim;
use unisim.vcomponents.all;
library axi_dma_v7_1_10;
use axi_dma_v7_1_10.axi_dma_pkg.all;
library lib_fifo_v1_0_5;
use lib_fifo_v1_0_5.async_fifo_fg;
entity axi_dma_s2mm is
generic (
C_FAMILY : string := "virtex7"
);
port (
clk_in : in std_logic;
sg_clk : in std_logic;
resetn : in std_logic;
reset_sg : in std_logic;
s2mm_tvalid : in std_logic;
s2mm_tlast : in std_logic;
s2mm_tdest : in std_logic_vector (4 downto 0);
s2mm_tuser : in std_logic_vector (3 downto 0);
s2mm_tid : in std_logic_vector (4 downto 0);
s2mm_tready : in std_logic;
desc_available : in std_logic;
-- s2mm_eof : in std_logic;
s2mm_eof_det : in std_logic_vector (1 downto 0);
ch2_update_active : in std_logic;
tdest_out : out std_logic_vector (6 downto 0); -- to select desc
same_tdest : out std_logic; -- to select desc
-- to DM
s2mm_desc_info : out std_logic_vector (13 downto 0);
-- updt_cmpt : out std_logic;
s2mm_tvalid_out : out std_logic;
s2mm_tlast_out : out std_logic;
s2mm_tready_out : out std_logic;
s2mm_tdest_out : out std_logic_vector (4 downto 0)
);
end entity axi_dma_s2mm;
architecture implementation of axi_dma_s2mm is
attribute DowngradeIPIdentifiedWarnings: string;
attribute DowngradeIPIdentifiedWarnings of implementation : architecture is "yes";
signal first_data : std_logic;
signal first_stream : std_logic;
signal first_stream_del : std_logic;
signal last_received : std_logic;
signal first_received : std_logic;
signal first_received1 : std_logic;
signal open_window : std_logic;
signal tdest_out_int : std_logic_vector (6 downto 0);
signal fifo_wr : std_logic;
signal last_update_over_int : std_logic;
signal last_update_over_int1 : std_logic;
signal last_update_over : std_logic;
signal ch_updt_over_int : std_logic;
signal ch_updt_over_int_cdc_from : std_logic;
signal ch_updt_over_int_cdc_to : std_logic;
signal ch_updt_over_int_cdc_to1 : std_logic;
signal ch_updt_over_int_cdc_to2 : std_logic;
-- Prevent x-propagation on clock-domain crossing register
ATTRIBUTE async_reg : STRING;
--ATTRIBUTE async_reg OF ch_updt_over_int_cdc_to : SIGNAL IS "true";
--ATTRIBUTE async_reg OF ch_updt_over_int_cdc_to1 : SIGNAL IS "true";
signal fifo_rd : std_logic;
signal first_read : std_logic;
signal first_rd_en : std_logic;
signal fifo_rd_int : std_logic;
signal first_read_int : std_logic;
signal fifo_empty : std_logic;
signal fifo_full : std_logic;
signal s2mm_desc_info_int : std_logic_vector (13 downto 0);
signal updt_cmpt : std_logic;
signal tdest_capture : std_logic_vector (4 downto 0);
signal noread : std_logic;
signal same_tdest_b2b : std_logic;
signal fifo_reset : std_logic;
begin
process (sg_clk)
begin
if (sg_clk'event and sg_clk = '1') then
if (reset_sg = '0') then
ch_updt_over_int_cdc_from <= '0';
else --if (sg_clk'event and sg_clk = '1') then
ch_updt_over_int_cdc_from <= ch2_update_active;
end if;
end if;
end process;
process (clk_in)
begin
if (clk_in'event and clk_in = '1') then
if (resetn = '0') then
ch_updt_over_int_cdc_to <= '0';
ch_updt_over_int_cdc_to1 <= '0';
ch_updt_over_int_cdc_to2 <= '0';
else --if (clk_in'event and clk_in = '1') then
ch_updt_over_int_cdc_to <= ch_updt_over_int_cdc_from;
ch_updt_over_int_cdc_to1 <= ch_updt_over_int_cdc_to;
ch_updt_over_int_cdc_to2 <= ch_updt_over_int_cdc_to1;
end if;
end if;
end process;
updt_cmpt <= (not ch_updt_over_int_cdc_to1) and ch_updt_over_int_cdc_to2;
-- process (sg_clk)
-- begin
-- if (resetn = '0') then
-- ch_updt_over_int <= '0';
-- elsif (sg_clk'event and sg_clk = '1') then
-- ch_updt_over_int <= ch2_update_active;
-- end if;
-- end process;
-- updt_cmpt <= (not ch2_update_active) and ch_updt_over_int;
process (sg_clk)
begin
if (sg_clk'event and sg_clk = '1') then
if (reset_sg = '0') then
last_update_over_int <= '0';
last_update_over_int1 <= '0';
noread <= '0';
-- else --if (sg_clk'event and sg_clk = '1') then
last_update_over_int1 <= last_update_over_int;
elsif (s2mm_eof_det(1) = '1' and noread = '0') then
last_update_over_int <= '1';
noread <= '1';
elsif (s2mm_eof_det(0) = '1') then
noread <= '0';
last_update_over_int <= '0';
elsif (fifo_empty = '0') then -- (updt_cmpt = '1') then
last_update_over_int <= '0';
else
last_update_over_int <= last_update_over_int;
end if;
end if;
-- end if;
end process;
last_update_over <= (not last_update_over_int) and last_update_over_int1;
process (sg_clk)
begin
if (sg_clk'event and sg_clk = '1') then
if (reset_sg = '0') then
fifo_rd_int <= '0';
first_read <= '0';
-- else --if (sg_clk'event and sg_clk = '1') then
elsif (last_update_over_int = '1' and fifo_rd_int = '0') then
fifo_rd_int <= '1';
else
fifo_rd_int <= '0';
end if;
end if;
end process;
process (sg_clk)
begin
if (sg_clk'event and sg_clk = '1') then
if (reset_sg = '0') then
first_read_int <= '0';
else --if (sg_clk'event and sg_clk = '1') then
first_read_int <= first_read;
end if;
end if;
end process;
first_rd_en <= first_read and (not first_read_int);
fifo_rd <= last_update_over_int; --(fifo_rd_int or first_rd_en);
-- process (clk_in)
-- begin
-- if (resetn = '0') then
-- first_data <= '0';
-- first_stream_del <= '0';
-- elsif (clk_in'event and clk_in = '1') then
-- if (s2mm_tvalid = '1' and first_data = '0' and s2mm_tready = '1') then -- no tlast
-- first_data <= '1'; -- just after the system comes out of reset
-- end if;
-- first_stream_del <= first_stream;
-- end if;
-- end process;
first_stream <= (s2mm_tvalid and (not first_data)); -- pulse when first stream comes after reset
process (clk_in)
begin
if (clk_in'event and clk_in = '1') then
if (resetn = '0') then
first_received1 <= '0';
first_stream_del <= '0';
else --if (clk_in'event and clk_in = '1') then
first_received1 <= first_received; --'0';
first_stream_del <= first_stream;
end if;
end if;
end process;
process (clk_in)
begin
if (clk_in'event and clk_in = '1') then
if (resetn = '0') then
last_received <= '0';
first_received <= '0';
tdest_capture <= (others => '0');
first_data <= '0';
-- else --if (clk_in'event and clk_in = '1') then
elsif (s2mm_tvalid = '1' and first_data = '0' and s2mm_tready = '1') then -- first stream afetr reset
s2mm_desc_info_int <= s2mm_tuser & s2mm_tid & s2mm_tdest;
tdest_capture <= s2mm_tdest; -- latching tdest on first beat
first_data <= '1'; -- just after the system comes out of reset
elsif (s2mm_tlast = '1' and s2mm_tvalid = '1' and s2mm_tready = '1') then -- catch for last beat
last_received <= '1';
first_received <= '0';
s2mm_desc_info_int <= s2mm_desc_info_int;
elsif (last_received = '1' and s2mm_tvalid = '1' and s2mm_tready = '1') then -- catch for following first beat
last_received <= '0';
first_received <= '1';
tdest_capture <= s2mm_tdest; -- latching tdest on first beat
s2mm_desc_info_int <= s2mm_tuser & s2mm_tid & s2mm_tdest;
else
s2mm_desc_info_int <= s2mm_desc_info_int;
last_received <= last_received;
if (updt_cmpt = '1') then
first_received <= '0';
else
first_received <= first_received; -- hold the first received until update comes for previous tlast
end if;
end if;
end if;
end process;
fifo_wr <= first_stream_del or (first_received and not (first_received1)); -- writing the tdest,tuser,tid into FIFO
process (clk_in)
begin
if (clk_in'event and clk_in = '1') then
if (resetn = '0') then
tdest_out_int <= "0100000";
same_tdest_b2b <= '0';
-- else --if (clk_in'event and clk_in = '1') then
elsif (first_received = '1' or first_stream = '1') then
if (first_stream = '1') then -- when first stream is received, capture the tdest
tdest_out_int (6) <= not tdest_out_int (6); -- signifies a new stream has come
tdest_out_int (5 downto 0) <= '0' & s2mm_tdest;
same_tdest_b2b <= '0';
-- elsif (updt_cmpt = '1' or (first_received = '1' and first_received1 = '0')) then -- when subsequent streams are received, pass the latched value of tdest
-- elsif (first_received = '1' and first_received1 = '0') then -- when subsequent streams are received, pass the latched value of tdest
-- Following change made to allow b2b same channel pkt
elsif ((first_received = '1' and first_received1 = '0') and (tdest_out_int (4 downto 0) /= tdest_capture)) then -- when subsequent streams are received, pass the latched value of tdest
tdest_out_int (6) <= not tdest_out_int (6);
tdest_out_int (5 downto 0) <= '0' & tdest_capture; --s2mm_tdest;
elsif (first_received = '1' and first_received1 = '0') then
same_tdest_b2b <= not (same_tdest_b2b);
end if;
else
tdest_out_int <= tdest_out_int;
end if;
end if;
end process;
tdest_out <= tdest_out_int;
same_tdest <= same_tdest_b2b;
process (clk_in)
begin
if (clk_in'event and clk_in = '1') then
if (resetn = '0') then
open_window <= '0';
-- else --if (clk_in'event and clk_in = '1') then
elsif (desc_available = '1') then
open_window <= '1';
elsif (s2mm_tlast = '1') then
open_window <= '0';
else
open_window <= open_window;
end if;
end if;
end process;
process (clk_in)
begin
if (clk_in'event and clk_in = '1') then
if (resetn = '0') then
s2mm_tvalid_out <= '0';
s2mm_tready_out <= '0';
s2mm_tlast_out <= '0';
s2mm_tdest_out <= "00000";
-- else --if (clk_in'event and clk_in = '1') then
elsif (open_window = '1') then
s2mm_tvalid_out <= s2mm_tvalid;
s2mm_tready_out <= s2mm_tready;
s2mm_tlast_out <= s2mm_tlast;
s2mm_tdest_out <= s2mm_tdest;
else
s2mm_tready_out <= '0';
s2mm_tvalid_out <= '0';
s2mm_tlast_out <= '0';
s2mm_tdest_out <= "00000";
end if;
end if;
end process;
fifo_reset <= not (resetn);
-- s2mm_desc_info_int <= s2mm_tuser & s2mm_tid & s2mm_tdest;
-- Following FIFO is used to store the Tuser, Tid and xCache info
I_ASYNC_FIFOGEN_FIFO : entity lib_fifo_v1_0_5.async_fifo_fg
generic map (
-- C_ALLOW_2N_DEPTH => 1,
C_ALLOW_2N_DEPTH => 0,
C_FAMILY => C_FAMILY,
C_DATA_WIDTH => 14,
C_ENABLE_RLOCS => 0,
C_FIFO_DEPTH => 31,
C_HAS_ALMOST_EMPTY => 1,
C_EN_SAFETY_CKT => 1,
C_HAS_ALMOST_FULL => 1,
C_HAS_RD_ACK => 1,
C_HAS_RD_COUNT => 1,
C_HAS_RD_ERR => 0,
C_HAS_WR_ACK => 0,
C_HAS_WR_COUNT => 1,
C_HAS_WR_ERR => 0,
C_RD_ACK_LOW => 0,
C_RD_COUNT_WIDTH => 5,
C_RD_ERR_LOW => 0,
C_USE_BLOCKMEM => 0,
C_WR_ACK_LOW => 0,
C_WR_COUNT_WIDTH => 5,
C_WR_ERR_LOW => 0,
C_SYNCHRONIZER_STAGE => C_FIFO_MTBF,
C_USE_EMBEDDED_REG => 0 -- 0 ;
-- C_PRELOAD_REGS => 0, -- 0 ;
-- C_PRELOAD_LATENCY => 1 -- 1 ;
)
port Map (
Din => s2mm_desc_info_int,
Wr_en => fifo_wr,
Wr_clk => clk_in,
Rd_en => fifo_rd,
Rd_clk => sg_clk,
Ainit => fifo_reset,
Dout => s2mm_desc_info,
Full => fifo_Full,
Empty => fifo_empty,
Almost_full => open,
Almost_empty => open,
Wr_count => open,
Rd_count => open,
Rd_ack => open,
Rd_err => open, -- Not used by axi_dma
Wr_ack => open, -- Not used by axi_dma
Wr_err => open -- Not used by axi_dma
);
end implementation;
| mit | 711d4e5f0db8834d2d701e77e6bef3b2 | 0.515297 | 3.576939 | false | false | false | false |
sergeykhbr/riscv_vhdl | vhdl/rtl/misclib/axi4_gptimers.vhd | 1 | 8,456 | --!
--! Copyright 2019 Sergey Khabarov, [email protected]
--!
--! Licensed under the Apache License, Version 2.0 (the "License");
--! you may not use this file except in compliance with the License.
--! You may obtain a copy of the License at
--!
--! http://www.apache.org/licenses/LICENSE-2.0
--!
--! Unless required by applicable law or agreed to in writing, software
--! distributed under the License is distributed on an "AS IS" BASIS,
--! WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
--! See the License for the specific language governing permissions and
--! limitations under the License.
--!
library ieee;
use ieee.std_logic_1164.all;
library commonlib;
use commonlib.types_common.all;
--! AMBA system bus specific library.
library ambalib;
--! AXI4 configuration constants.
use ambalib.types_amba4.all;
library misclib;
use misclib.types_misc.all;
entity axi4_gptimers is
generic (
async_reset : boolean := false;
xaddr : integer := 0;
xmask : integer := 16#fffff#;
xirq : integer := 0;
tmr_total : integer := 2
);
port (
clk : in std_logic;
nrst : in std_logic;
cfg : out axi4_slave_config_type;
i_axi : in axi4_slave_in_type;
o_axi : out axi4_slave_out_type;
o_pwm : out std_logic_vector(tmr_total-1 downto 0);
o_irq : out std_logic
);
end;
architecture arch_axi4_gptimers of axi4_gptimers is
constant xconfig : axi4_slave_config_type := (
descrtype => PNP_CFG_TYPE_SLAVE,
descrsize => PNP_CFG_SLAVE_DESCR_BYTES,
irq_idx => conv_std_logic_vector(xirq, 8),
xaddr => conv_std_logic_vector(xaddr, CFG_SYSBUS_CFG_ADDR_BITS),
xmask => conv_std_logic_vector(xmask, CFG_SYSBUS_CFG_ADDR_BITS),
vid => VENDOR_GNSSSENSOR,
did => GNSSSENSOR_GPTIMERS
);
constant zero64 : std_logic_vector(63 downto 0) := (others => '0');
type timer_type is record
count_ena : std_logic;
irq_ena : std_logic;
pwm_ena : std_logic;
pwm_polarity : std_logic;
value : std_logic_vector(63 downto 0);
init_value : std_logic_vector(63 downto 0);
pwm_threshold : std_logic_vector(63 downto 0);
end record;
constant timer_type_reset : timer_type :=
('0', '0',
'0', '0',
(others => '0'),
(others => '0'),
(others => '0'));
type vector_timer_type is array (0 to tmr_total-1) of timer_type;
type registers is record
tmr : vector_timer_type;
highcnt : std_logic_vector(63 downto 0);
pending : std_logic_vector(tmr_total-1 downto 0);
pwm : std_logic_vector(tmr_total-1 downto 0);
raddr : global_addr_array_type;
end record;
constant R_RESET : registers := (
(others => timer_type_reset), (others => '0'), (others => '0'),
(others => '0'), ((others => '0'), (others => '0'))
);
signal r, rin : registers;
signal wb_dev_rdata : std_logic_vector(CFG_SYSBUS_DATA_BITS-1 downto 0);
signal wb_bus_raddr : global_addr_array_type;
signal w_bus_re : std_logic;
signal wb_bus_waddr : global_addr_array_type;
signal w_bus_we : std_logic;
signal wb_bus_wstrb : std_logic_vector(CFG_SYSBUS_DATA_BYTES-1 downto 0);
signal wb_bus_wdata : std_logic_vector(CFG_SYSBUS_DATA_BITS-1 downto 0);
begin
axi0 : axi4_slave generic map (
async_reset => async_reset
) port map (
i_clk => clk,
i_nrst => nrst,
i_xcfg => xconfig,
i_xslvi => i_axi,
o_xslvo => o_axi,
i_ready => '1',
i_rdata => wb_dev_rdata,
o_re => w_bus_re,
o_r32 => open,
o_radr => wb_bus_raddr,
o_wadr => wb_bus_waddr,
o_we => w_bus_we,
o_wstrb => wb_bus_wstrb,
o_wdata => wb_bus_wdata
);
comblogic : process(nrst, r, w_bus_re, wb_bus_raddr, wb_bus_waddr,
w_bus_we, wb_bus_wstrb, wb_bus_wdata)
variable v : registers;
variable raddr : integer;
variable waddr : integer;
variable vrdata : std_logic_vector(CFG_SYSBUS_DATA_BITS-1 downto 0);
variable tmp : std_logic_vector(31 downto 0);
variable irq_ena : std_logic;
begin
v := r;
v.raddr := wb_bus_raddr;
v.highcnt := r.highcnt + 1;
irq_ena := '0';
for n in 0 to tmr_total-1 loop
if r.tmr(n).count_ena = '1' then
if r.tmr(n).pwm_ena = '1' and r.tmr(n).value = r.tmr(n).pwm_threshold then
v.pwm(n) := not r.pwm(n);
end if;
if r.tmr(n).value = zero64 then
irq_ena := irq_ena or r.tmr(n).irq_ena;
v.pending(n) := r.tmr(n).irq_ena;
v.pwm(n) := r.tmr(n).pwm_polarity;
v.tmr(n).value := r.tmr(n).init_value;
else
v.tmr(n).value := r.tmr(n).value - 1;
end if;
else
v.tmr(n).value := r.tmr(n).init_value;
v.pwm(n) := r.tmr(n).pwm_polarity;
end if;
end loop;
for n in 0 to CFG_WORDS_ON_BUS-1 loop
tmp := (others => '0');
raddr := conv_integer(r.raddr(n)(11 downto 2));
case raddr is
when 0 =>
tmp := r.highcnt(31 downto 0);
when 1 =>
tmp := r.highcnt(63 downto 32);
when 2 =>
tmp(tmr_total-1 downto 0) := r.pending;
when 3 =>
tmp(tmr_total-1 downto 0) := r.pwm;
when others =>
for k in 0 to tmr_total-1 loop
if raddr = (16 + 8*k) then
tmp(0) := r.tmr(k).count_ena;
tmp(1) := r.tmr(k).irq_ena;
tmp(4) := r.tmr(k).pwm_ena;
tmp(5) := r.tmr(k).pwm_polarity;
elsif raddr = (16 + 8*k + 2) then
tmp := r.tmr(k).value(31 downto 0);
elsif raddr = (16 + 8*k + 3) then
tmp := r.tmr(k).value(63 downto 32);
elsif raddr = (16 + 8*k + 4) then
tmp := r.tmr(k).init_value(31 downto 0);
elsif raddr = (16 + 8*k + 5) then
tmp := r.tmr(k).init_value(63 downto 32);
elsif raddr = (16 + 8*k + 6) then
tmp := r.tmr(k).pwm_threshold(31 downto 0);
elsif raddr = (16 + 8*k + 7) then
tmp := r.tmr(k).pwm_threshold(63 downto 32);
end if;
end loop;
end case;
vrdata(8*CFG_ALIGN_BYTES*(n+1)-1 downto 8*CFG_ALIGN_BYTES*n) := tmp;
end loop;
if w_bus_we = '1' then
for n in 0 to CFG_WORDS_ON_BUS-1 loop
if conv_integer(wb_bus_wstrb(CFG_ALIGN_BYTES*(n+1)-1 downto CFG_ALIGN_BYTES*n)) /= 0 then
tmp := wb_bus_wdata(8*CFG_ALIGN_BYTES*(n+1)-1 downto 8*CFG_ALIGN_BYTES*n);
waddr := conv_integer(wb_bus_waddr(n)(11 downto 2));
case waddr is
when 2 =>
v.pending := tmp(tmr_total-1 downto 0);
when others =>
for k in 0 to tmr_total-1 loop
if waddr = (16 + 8*k) then
v.tmr(k).count_ena := tmp(0);
v.tmr(k).irq_ena := tmp(1);
v.tmr(k).pwm_ena := tmp(4);
v.tmr(k).pwm_polarity := tmp(5);
elsif waddr = (16 + 8*k + 2) then
v.tmr(k).value(31 downto 0) := tmp;
elsif waddr = (16 + 8*k + 3) then
v.tmr(k).value(63 downto 32) := tmp;
elsif waddr = (16 + 8*k + 4) then
v.tmr(k).init_value(31 downto 0) := tmp;
elsif waddr = (16 + 8*k + 5) then
v.tmr(k).init_value(63 downto 32) := tmp;
elsif waddr = (16 + 8*k + 6) then
v.tmr(k).pwm_threshold(31 downto 0) := tmp;
elsif waddr = (16 + 8*k + 7) then
v.tmr(k).pwm_threshold(63 downto 32) := tmp;
end if;
end loop;
end case;
end if;
end loop;
end if;
if not async_reset and nrst = '0' then
v := R_RESET;
end if;
rin <= v;
o_irq <= irq_ena;
o_pwm <= r.pwm;
wb_dev_rdata <= vrdata;
end process;
cfg <= xconfig;
-- registers:
regs : process(clk, nrst)
begin
if async_reset and nrst = '0' then
r <= R_RESET;
elsif rising_edge(clk) then
r <= rin;
end if;
end process;
end;
| apache-2.0 | 330f4c1d0c969ebea3d3c513a9a553d1 | 0.523415 | 3.319984 | false | false | false | false |
szanni/aeshw | zybo-base/zybo_bsd/zybo_bsd.srcs/sources_1/bd/system/ip/system_auto_pc_5/blk_mem_gen_v8_1/blk_mem_gen_v8_1_defaults.vhd | 27 | 32,589 | `protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
WrSZEf64fUAl1kVl9HWWVm9JOgHMmzn0fv0uusEaRSoZ0YHKAX+sj6D4gL2WXWrV9+rdMofvPwNs
9A6zs8psHA==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
R/iTmfCVAo0uuZTRynJ9b5Z2gujQ7+Xxv1u+96JME6mwR6F6/MPV4ayotodCx+xcD+9l4Ktib8Ml
C05jFwQ5vFi+09RjQvyvxQAR5CtE87QE5Bg2A3Gt5QmE+m7ZfJiQZgi5YQHL3kAHS0jfaofTkZIU
6VFVSW/fcrod0Swq7VE=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2013_09", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
RAfB7dvLyt2uCWNWspMeHiLYPG4TlOk+8Dptz+NhWH6nMzYrNkf7IWIjXk3hEVf7lwT/X64pynoh
QoCCtl9AW1iC77VMTIu5MgFRizuZMUfXZ0crSPULV2aGonx9nQ5JKx8TiRv5BTWxeAsuh1lT/5p6
2v08ZCt1Nwa8GPmEeFnTZsTB1B0jFzZQMa3GGdV0nEcSjDo4bLIkw9sMEBW2OdUuvE5yIHF6Z7++
/wzulmNKOqQpmeHrq3r1VKkMUHNzsDpLkGo5HMiTmEUJr/s3uq2EhCIq1agWSVbcEjS5uDaYcwdG
D4cRvgOxtT5sxpWA4fivRX7vvCyun+C2e4pYew==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
MsyF52v9pEo5RpJJtfhlgAJQ/9a172C6pJMP5S/aXQMuRuv2+JV5wCeynUZSXHj38Ger421EXuQd
EmO2OIKWiz2pShaEh/NwF+InGDF0QzD16vAgn24LAOYAOX1lcCquf4w2rs7e+0dn2PO/GYRn4rxl
E65F1qdRiZlUeVoRHdk=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
klspBE6zapxwDIEksFW+V3vEj3afpsQxyK1CWGpsw53FDriMhZB4hONIr9yRSN9nitmQ+6cnlGM3
S4Cxnkb334zdXXX5YoppEYaAdCcB5nDsYhSpn4PyPhd2ANmiSIXxEjiEJ9MDJlVIobzrtkNgFEWA
QkqC/Eky3QLBOqPuDJIgkf5UFynGEkI3eWzGSyuNAHTTYXfoLlYBh8nelaKS5vgYh7jpllyo5l6k
hn08k3sWZKuN1S8dwb88eFGM6hwg1UoX7pTnUY5yGPZZS0JEiN6WVWRmh72r5l3yyFZOFNcvByJJ
z349Odlh9AHKI6joGGP9sLtbKDrZfmu9y/SSsA==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 22384)
`protect data_block
5reB9rg6CsQz+W1jfHWR6t3i46ZMLyMILRT4HqeptAmKfzkBlH3syjcBotShktOxh9wFXknALZ82
SZZXPv8yBHlg6ybT29JvhgcRbz6htFljwCjseds8JQp+i8OYQTIqlwiSOshBRblJMG1KmLKa5EpH
sW2DXXy+eMwkyIQaeTEQwktUybsIyqp22QNWz/9144bWr+ujOiIQswAmC+hvWteYm9csRxOqqy9T
fRypvllkjvCuXsyKR1EcPNryuBEuoFXoJKRp+tI7Zq9XsBzuibScW9+C9M0A4A4AoZKfBP9/e6b8
jzH1BafuGP80GNxYNtU8pYmMdi8JnjeCI9gP8OPxT0o7ROilHTp5HJlI0UtfVWHjty2WjGjHqkcL
CVFyNo1fhz6JraLjnw9jpplFpJ/ZNn2iA9rpkP8GgwQOz3RXXwCUWXtUWjHyQEDKtKSWfBLzJESZ
52lPAJuVtrDqMSuCfzlowrb1QPqhqDo2HAlidDks3hpl3yAOx5XMtUNrSEXSHMvzwIpsnRzNJtbk
lv3qvgmyiJ4FdSS/c/N5lvTBxFKPWD/PqdyBvx0Hm37BbQWUkLt44EY8cnfEgtNamn7hIJ1d7mhP
G2oAiFGH4vnPpJjYIe/KinPWKmitHIAcjybvGjxv+0eGrVgLqkHnjoTg9X4T3V7L8vChJQCiHBgP
6tvO4DAkuon/AFJmPn8qWgDi5esCkVWM8mxcIpKdUl8QUFJCMpXSOmqu5tyQpo0tlF4AzQQw2gCM
7F+osyzeuxGK/5f9AfcARcwkRe6XYEHeuf8CsMmUjT6xt2xVcF6YZQZFt0hCRC2OB7JyvVbyl37t
P+nRiti3xnfKC/Jv3Wrkgwmq8Ag3YkvoGnuRxE3hJb7PR4utDAn3AHM8PMnb6LvyWuM4afJxbJwQ
85AbsPbHAd2fJV2SHeS+3gmPpisK+9Be/5jMjb+HTkdfUZWmvHwnf203S0841xMPvvGwMmNK+WXL
y03TGDFdddgF9rzVQlwJmjWG2nbYefQ77cRumgA5OgP7ORkJuxxbnGwATn9prme0MXGljKuj0wAv
qVPXlEicK1VApr8BCMWwHAoNjFWYu0Y4ixyEJ98psDS72/UqRa4BC4KDGVRApawG0rtOES6h2RUD
yqgZwHGNkx6v4sZCiL8258nv5EMHDK0ug5MY5NpHD/PHU82GQjYtQtHCNSRaiqnlRBtJ6Gp4i/L3
Ys8aUXXLXzdgZLky59kS/N1sUXay6uSwSlzh/uJM+nkhQB/SHXllHqXtxBaJRfRlHRN5fmlzIhTV
zOYMEZVAbVmT32KHXAHoS1/MYusQymVvDJuPQmTr8Tsu1u8Sy3d62/US/aqhA6SXLBFx0uvwcQ6U
u4Pp5lpNHNEc1tr7/aoHfiWHVRjYPGor/BErRmpCsZlQx+ZiEUWWdYfaqNKvy3KWZqtbGzu0xIx2
sv1+pvAEnk2YTs4kBBOHlcI65jGm3rpIZ2ahr4r9eHfdVCjAA9CJ/1XHHwGvJ1QuqFPGPpTY0nrT
9gwrVGsvIbSHub+fv2YG5pzOZjS/YApZRYRqsi0d9XDMKUAnQVZVTkIFtWOjsiyaL4imAINJQZ30
Pp4dmuXr8xNcE1OYtLjlDojlMYLSgTsjqX6yWWBuTz4j+3oPwTtTpK8w20izgqtaH5ZZaj4FYLk5
zS2fysj3m962YX43ZZa0wXc9+sWt62s4kTphTUU1kEKCQhLqW02KJHjUsihsgNq9r8XSi/slGkdh
aCQaD6pN4jVhFRrkrxEG0ILxej9e7ZO8GH/xkmS0chmROZzXf1a5DXVyZ3mZhzptZ9p8o9UP3RbK
EpxKmIC2XfNeMU6NwsgPldvTPHTZzZ9Rw92/D4NvVknTdcqRcZV/0KEFt165o00RnfkAuUXk017g
LZICMjuC+k8adXqLnWdMIJ3SLRqKDzTKbBVj1fOmlve1MWVRXqv3FAtSCqljK/g6MxHdxZzNN8jF
jjtVHeMGWmYL/w2S+3pqc36gQRK0lcAQbpqL6IkoOVGL9McJttbGqpQuM8VxCV8+XS9YGZqE54fM
prnztx9LND+Q/nq4DDun0w6jYVbdkBTk/5UBrz1EpBgpxlKWgG/FUWbdGP93iGWB9UcLxhJCN4TQ
kE3Y9QS3sWTSh1nPj6Gk2kXNBtwVQRq0nfkfqkbGIaOIIdAUTPgpLRe9nm1U6GfKx1LvMxJggDKA
8Z34te6TagsnY2c2pRLt4Wib/ce9zTG25vsKm/uuXNvkHeHN4lb49TWh8kwf4FdHO1oSDLv7KuW2
lDC3GVWnYwkkl/erYrXjscp7Ty/RItVSl8lvMsACG7abcAIhovghm8relGOhhXDWw07bm0QFIE5Q
R8VGT9ulO0MC8nTk1y4kih4yhDqnlec1QXXawqSgjid4LzrwObakteL+W5so2YOJVtZliaisMSoi
VDShXBW+X1V6BnpEotmA83zRqcXnxdAjSbpp8SnzN+Yw9s+TkLVMK8/8t6XUP1uIMYbnHsC/SAKO
Pt1VE5ky28n9I1eurKS3609WDCYk1mTvbjSgWfV+nDSBWZFAu+fmHAR7LiKZuri+hYMDwv3I7fEl
Uc2ef9KR4UHBsr1PUtv2IJ6s/FJYpk1ULvgpWvd45Y196r4THS3yYQgVRyZJgksm8nCoYf/VUnra
ROO/Flvjo5eoMmJEkR/kMCMTDWI2Ctz6R8waVPDeks34/0wmrrXIR3bE4xz0b2J3QoDr+FdYt0vl
4M3I9+4t1wtbXGWtwXnHHDB/DDy+G/S+M4T2gIH2uG++4rQyguPjYj7iUStzjAe70LiMOZ/X7FaI
cj9IXcRSixCYuE6cKWc5oJ30e2BwRLoLvEwtaupLttPj2/VSUazD1rVtoX/jUQjk8FMz079Up7Bz
nXGfg0Bypwp4wCpcj/zIpI8Ci44akGirl2ZmQuQNZJjpy8GXy1mvdeiVx4tzxuURmE1HNbKt8YY/
pjIVg9MdYEbJlrUDKnEP3nM/BLRiw9/FP9xWrN+tWsK1MBoLHut6IUW24UN0RyhYqW0MQEbIw06D
fntw6qG44CfNaa1V6uW3ovkRL7s7gb7BPlChM6X6g1dgx/CKkfKT5qKbbjYCiMWJhTwJiEti2bH+
2Bj2gl5VAExl5Is4KzZ+66U5xUq+JAlTdj0nBZQkdt2Bx+vPpPPczg8afWxSD9cIXfCuDIqZx95h
fOaxXfzDwA1bW7Y1YSu7oGX3dddm3Exqd9JMRpThyGFFynCLDmK0V4UNtitFoPTxQUuccjuUJP3c
F3C5eGLuExLvEbFaTWTyE/NFhVQESLzWhjgEibXb6is95C43Lj7x87P0ZIJ/1IJb+alBGVrd+ZCP
H5D7+ShAGMKn1ZiTZ35OFaWsBNdHkEUy/KzUdIyMGoczz2M3gYPcfoCOAf83jaxUwqH6zRJNcWPT
0+JVLwDq+99xZBsPcz0ht62p6QWGJNwaSsm4r7UrOAZjuy6ozvPHQcKx+Y0y9EMj4bUdcgiWgpsT
CQVWE8jcdh39LkQypakSorZqaskIkSCTwiG/lnxiOTQyyMuqAmE0h2pMaenrhmQkwkKI4L2BIWrS
sKENdKbmx6ShcrxeA3W3gnvXb8SzbuOo4aq7xYJcc2q67pifryj9OlG120o32DMZgBV1lTtNFjiD
dUaWXMzzAnMvtYjMXzrm9U6srzXWa8Gg/JaBlqqwkBXz7d1G+rfNSevxJyuxEMQLs4/HgY2RZFts
P2srP6yhuxgUdDe74/HY1gYMGxobDF2Nxzhv+fT+q7+kZ2lm+knrgsLvf8KUbH1hsY6zkuz2C7b7
2GvuOKxCHG4q6JvzjtUlBKUVyQnE28Rr5Bi7z/3U2b1hkxc/XedOxKAdUWod9d0dRa0mquf0uivm
pFEXEyY0tAmP3O66XbiDzZnKrV6eQCt5WI+6Sgz8hrkxQq8BSQ2JCf2N1CFsIRLskPW7wiRwH4Nn
GlwSPabrni2EdG7IoNparwff5XdgL5hCfCCZavdiH59m3R9VaS5CsbaYjhauE/geQRAqkAw8Gejc
qOO1gOWS/otDZsI50qYgur6L0W3C5E4dqRgjYOH8H3P1XD+jNslrt7u9ojB3NpBn1CpkMqGuECjO
aD68B4K1KJRYMeKZ67K43mC1vKI/4IF/o0Ld+PQ+FdukgA1kOigFkgSNLkoH8UO/5sdBb8l3Y+EK
6y08cpsstzXGBtcKmRIyeeJWIYSr3Y/bT8igb+IvrBquHcBeZ/zo7FjpyE5oWO0mYG6tH2OImlWl
2eQYjUzNQXaLG+lAgFj8ju97lMWJmnbnOfYTzQYFHQV0NCoTjxCEGlghOinHjvDP/bFnQh1O4CIW
9gZrJ2CXdRGJ9klyS5gUy1gSyJCL2TYDJLJFRA9BiKeHmLrOXkjkbk4s/lNoaOfRU5NDLfWnL1W3
9kCL7cvsOX7SBOe71u1nS16RLazNwW8775NP5/ZyVlV+eXJF00iXxAIcsPfUThJnbRiVI7McO9/g
Ao0GavgcTqoFsKM4cQCqF45NzMUd8sAwpn2uPfHLR2PXd7E6qDKp2Vu8isXRLWhRVWouRscAO/M+
Hiha38j10XOU4L0VfqbzzP4dUckPlFhqO76thV5Ws3+xQT/QSoWV+Iic4KIpzjm2qKjWgvJUEg3F
NMjXfXxtI/7D6N5M++p/rllKxqhbMzmJrw1pPlro8MV1WTfDQSZMZYYXb+JbZcgPF3KSLMEjmHkq
ArC6extA/JfGsGREgePfDElZcv2BM8mAxNEO6nadTjDmmbHTurD/0+AuPqx0d6pLiNwgTXp9zFGT
sZ2/W3qihL11bqPUc/vzc2yIFWvx5BFRNh38uT/mZ47a8EUwmx7zbyFLlp0pxqgR1iwMMnvJUOOa
t7g3F16gEpoyAGxzg/lc9sTqZk/dmw49RRxKUVrnZVZxdXaEqFHfyVVPgr+hEcyPT+zUyBKVsEs0
8C1kMIXvlwafQSuX1O3YzN0hfLaAkc3+XopgZ3FAhd8p9W7O81Wzvr3Kf1drjKTqXTQ6AfBXfqi2
NIOdO71tSrXCguqKrwiCxMvAnDfJvLzWZv76rPAyP7rb51WcWNwXUl+cN6rTblMJMvHLNBYIZIbg
lgPXLPppZwy3SeT/fux97VMYozg1sdCiAXa9JvgcL87ZQao7spUztDHRMVRCrpvaA4uWVxJEVfBJ
2tJ3NGuuodEOS7894r7WjqzStJzZG9tBk3MUe2B3EIjAOC6SxMHRnhU0SgQ9guNS1mycCAkYbozQ
x0nMvIfF3mWStil4yuLtFvVepdztp3+yUuwnxaLvy5/IUGOd/luyJnO9VjRZyyyPN0P7KRIp0Wri
pm4v+78NcVZHy7mzvJ+YVtVEmdAZlkTZIfGUIy2hkK5g22EbvZLe13vyqzo/kAPvUrNURF2OCu34
HpBmP9AImcHPRvweemNWODYSunDOo03tyqQ1YcSacm/1mGJ9RZ8ggedBunt9diLjCXCxbXGUuXTF
6aPBP4Layz29Y1ox9FBxKb+p3W+NkLvyM2LyWAP4WOhj0/rTOp2yzh9w9q9uZCLnxwoZg5QuBN8o
neD47wIfkFOwU3mD9xICdJR/vpPAZxvyNVmGFh0P7kwseAlsATAITW7fj7xvUq7RfN/gsIRDYOaU
9CX210FNkgWyyiQqB5PFYGYyp7rs1A2plumdTJd8LNpns/y/JhAzHNg8auYtTtFxz9pk0Gmw0Gt6
e5W+h5dfeUJzkSw9BMBeUds/J0uxZyWufQ6OGCzss3QlgtJ8JU4vdoAKpJS0Mmzkgz/abPQDMFFC
z6d7U8e7wb9jvEf7h2h3qVahR1QaDZQfqB2Sjl3M/ut5kwjtqhjTXmfh+H6BBz0qJLJtu+MX5PP4
hJnEy5uP+Qo3nXg1FMJYTmcDxxhpwfEHTVeoDdId/wvpq0bYAQXWKfInCYrlTA4Ix26IqGAsfFEr
cyLQyktxYArYhbL48mtRzMO9uQZshdk9IEKcEFFjSaGZgfqKBfHoJkHFhrOBfFJGaS0P7zXrQglY
xzYtXUhDwzr+rt39nnmnzBdZaPHL2zFxZJhl9sSIZ1Llvlnw/8uh8GZrTGKY6+bxncFv6PcvUcSN
YdWhcAkSGrGZNVKqFkj0d3UBfDXQLaMuuOnbMGvEVasZZWbgpDvmVdEtXMtG2yrY8lLO0GyT44Do
ENj4rZ7s2h1i+jGSiD6Cu5QG4KqtU+FEJ7Ej3MkM6gLUa1XhxlWAkxXLH+vCMKPS0MVqniqS9dwD
U+lRykNgC7HhhTXuhJI+c0aHuc/zSLmtI3uRSxZ8A2ORV6CqyxMcdRYc8rXUcuAJdjlpOBHYx7yC
kcpEN1EI/y9n5sF1TCuWoXc3IjBbgNzhF/6VnDXN1Oznt88dYZdX6SoCBxnj7ojjHAb8hkrDSitc
6i7OuM2cEGTGnHQeNv4t7FNbKjVlJQfWitRXueYZXy+HiK5MwHIPcYW0bxHJD58dCMDQeCDp3zt9
zudDXHF0J/jlKFb7rWT4qJwHCV2YVMd0bW3CnW+rriA0P2ztKcwiQA48VS/7Kiuudn3D/YQhBm7F
uN7JI1aoJh/dp/n8w47dK698tpBf1xOJwY7MshbgvgJ6naJnrFLyK8cJU911A3JPb/yuUZeRQDzJ
PpLmQY6g59Sym8YFXE5NdqQaTGK6aBC2TtJSM60zpgFKV5EQ4OCsoJ3+0fE7MT2ninlS49V2OA9f
+ZJq9DGYrM2mC/crihk7DJvck9k9qCXGswnB6YWvMSQe1zYE4d23utg3CnItZThkiVXE7vhIGGi/
pnu5BdcPKMePZT45jnGNeRh1BNVPQSuhVukjhjM0JMNrQ4GqOrupEKSCi/dFEQ17S7vg/M2w7rwX
eOxbZ1ujC7dpm2YcnsvvvfwqM6r8EJwL0ybtTNf1cCFtgLBy+45ijOoXEIv9iL5Qk1GmiU7mGC8H
MrgKRo+ODFy2LdKotSzGngyXaqayDfQ4jbQ9aUKhfId+dSZ0vAGbZjtkS6MXj1bq1nbxInuwZYu1
cXh4L5Ovgh+JcdCa+tJjHoCV032WaxKhnFt8+eCMD6fjY+GKRwHRgvj8yLQOpmrCmhlGPCmzsmmd
KHLmooRcMCaK72f5K1eCsuIXKd36apjrQm3SBnBpjlvoQpVcMz3nfgbMJ7Yi6GxWfn43i7FG2Z+I
T4/4woCzSUBeeQvJNrvdpBYUrZ4aAEel5+R8hEGTfWzaT6kS2fQ6NC2x/udE1dQ6DVabTrCS/hCe
/1pE3iFwhxXKCTmWbE6DuPKry8OOgskU1aX4bEss1oe4mSS3Rz6T5rnwHdzGqc8T5Ua5BoGIgG+F
zykfCHhcySOfqRQlpa+f3ht0KRYXXOSaLJ87m5JSY+Uhgn9YWe5kGkEAkUFZQfgs/DWb94x7fCiz
IxEcVzUyYmrck8CAe2ixYoM3W8jhYD8ZN2GUz4bhz+uMeSF6FEgSkVQSsTYk2W95z6vYIEcig4zl
cVIWemn1nv4Y0f6VaiZMI30L5uq8XjDrlDgvrxBFgA+fd96ltD+b8FhQ0HhsjOmTyb4qQLRPYXJg
bYKZ4cyADPKZl2EMKnzU4buFm3W9ag1GgA5A1c4UX1wg3CDsWQCzzI5opXZwc5OjJXYrj6JYh9Ut
owqsbCS8CXZYMwNjTjFKqAJxIW6fBlDdYm0Gt6ez4QYJca87hko3wfe+bz4vASA/O06Y7t33PpLY
SN4yO0rkpNmGnKN6bdQPv8Ty2qlURktR49RWGHMGhSzF+cDrhYNkHcMeJlIt3tqf4FLPYc4qJmGS
9YFlSrSN/phDcqVyhYlPLQrwVppydoHclTaR9WtmukaA+5LMs1Dv/LKMa8C/trLSgjooRHUWsBCd
ulhoDubisUTIvdpZPD+P9gyRpn1oyOTmUhWsjctixTombcPwS5VLFMMjTT/huJdG6nNpYn2L0zpw
YrSLkwQSVT7+o/+CU0rqlYp5W/fJ6kT+WcUSAG4YgIZFwM5WNaXOLRbpwe4Eb0LC7RFzFjfzHJrc
DnaeH9srM+6NJQFe8gjb/PbEiC97IBwt7F/GQ+9HQCd0d+ja6ZRW9icEopMtDzbvdtmYqtWFAU+t
Ik8wGDhrFeYr84KtTDmpJ9+yQHSv8W0g0eNFgcInhmDjlsMDQlBNIeM06PPApWHYfIAdw/zPFcg0
V2wCxNVE+jUeKO4aAHqATriQNDZstLuMpPfdku+5oXK1DpZQqvFrX7WFCxI/ihc7qvh3T6eMUZTJ
dkDYf2WrZ/pnKhrG7vzRa9TwGulAFG21bMnxK+fXAFewkofZw2Wrc/ZuFi0KOt+Wys5hEpFnLefa
Ew0APpm4fNr8ZHiLOcwYGlxPeNYb2PnAZpIQtTquUCgMC/wV56a6uRd+pi2BvTBvdretoLcyDaRm
CZVqzn2YGgx/gjIlVOryEFSMROGEeez/bzwBkMCjkQUvoq9SQ0PxNdm2GmdqNUq8pbidDmZt/3R6
AGqVv9Rq8v56wREviHlISePsiyewItlIC5suluI7RRKaQF56HzpWT+dY054DYw7Nfwz/zZglx9hA
2/iLArcouboAwYdWktNK2159ubFsHwb0r9QiTi8rw96YbIQabDkIiPXb/NaDOxa9eC6yvXPFpYL7
j3IPZKqNQo0aJcPh0dMQ8I8NNizqWMfdpbE+CH4T3agyF+T80505/SSiaqhXVdjkB9zKFlPrBRoD
Y9JTn2bFjGVabtAQ4p48gDLgZhDn5Vpc9VJOfwy0BB0X02jmxBlWTnjEqYjiHI1Zl4AzpIigNw+0
DUQoqFN4jqfLHaENQA0Jl1gtl757WcCECjOGBNYZeX4Je4nVTKxCjO7EOhLtkN6135mZhqTZgGbG
DsIJ0BFdSjQXiKAbJYtB3NAl86RWOQP0eY1QhrFGaGpGrjAGHQXmZ/Z1QVU9H1Vc1SzusxFvfy8V
QeFpCRo5BPozA798G2x8+m1AqxP12MTCJcVqRoFSBH/gie7dMp/TmEmWoA13ZOaqnzCOPr87++BB
AeJvbFWa2UCL6CuLZqqGhjRT4AJz+y/AiNa17QalIDvdXX58dscvaxfD9tJovKdB9GtaRPTghjAZ
DlQ7uqlAtc66K4ffcyEyY6J/sk6ibIn86kVEC4XfV9w3lZ0Mcl15ZbxLm8vCe6Ind6OzYAAia57z
xW4CFye+g+KQK8Ptn4hZ21gmUSbimwIhqPGE69ZChBo9dFBU+3kHMF7HEee9XWnKzSn3UivJzuyF
RdeucmPvrMFX6UEYHX1mCGVyY7rDRqOu2Lh35zCl2/83o5ACwggHZg5+z54KQpVHcGPPBCzgmyOg
4QaWv6ztkJMPcz0awkFuZ/8HoSv5sO3sjkqwmFSPXCJUxq2GZ3xcwniEAQS6qUqpV4NCiDMecCR3
8auMPbqwhPP1DLKqxyFDpMwD/bFpFs6kO/miD64gDfMSvb5nAwVACpt+efwEa0hKy6bk9pzwCd6i
ZkG6PfMzr8cjPgB36S1IcYxV58/HA14dBw6wVylu+WkLfLs+FcS5kUstl+jmIdi0CB19pqHLqY1f
YQUbVp9NlcZWy0BIaV8xkspl1RzmnyMGtSdFBXAIlwMrJxBkzr6KPKSKEdf4o7yOoHHnJOEGIweN
dmkgjzBYsiK+s5H9IwV7P0W/RWVAwl1OjTXrGzsL1yKtQFKvwH1uzFUh7zeZzpe4AZqrcGYI31sF
QKYUFThMh11RHOl4/3ghfZxzXuUFRCsmee2CgQ3Qi2ppLdQYwZSt1upv4zESfwFOJyHNG6BjG49I
IrRR5/Jl0tmRGGu3dHsEQnSnmdw7tazukDk0hEJV+DwlUJng6vtz3ni5WfLTiCo+H+Ch/86Ufhrr
lfGV1zqycg0i8pRnwQuzbl/U6HhJZ/Ewqv0wsAwm6ta7klPBVOdwmUa5ZYeqviiNWhTq4IFY3qrW
4VOmX9bwlhKS0mS6i+qiX/1cpeEIaLr4aBBtJ3P0Ou581h10wXFWnPMOQZ3ueg4ihb30H3h5tuSX
YBwwdFaxk1qxTuTztQ2q62N5WVaSEwDMVqGooiKLOgwB7GVz/F4y+zRVvLGgSMvUKvobQzjcGRo6
WO1MiaYYxKr9959sJ2ijpazf7XckBTX4D2lVy6MCb+rS086LZ7K8ghc1IJ3Hbm4ocZLnaHOYOChL
BRX+v0Bxb34/6qXwjOPNFFcSu7KYbOEdleu22dHrEoi/3sqbOfBdTDN34RhbU6EetXWOTJbl2cY6
p2PBlxLdp2PvyG0OVZCFuyaJDMgV7aSgQQtsUR4tgI4PNXTA5G6c90A0NrTZYYDG6QQVHvi9I8G0
eujz0fpJHy2HuWvDcY67PiPU2j4bmuSo52fjap1m1YfQhDU4fSbLyVqU738Bey7Q73tsLR6nxrHq
m2Pywy/1Qlakmp1jCxUstqfBojW8m2+60GihKizLU/AnPQThGfAkMQ6l3QDQbG3kozjspNc2m1q/
3oYg8gg5TiEDzKJUgtXBEPw9nzAOiyqL35J+aFMUBiuT4/dqXXU949rvNTSswYjplHzOD5kWQ1Ky
FiCLPUSvZ7Z9+luysoew+l2RuHLh8sxBXdRGL9IDTuAEUBclN131DpfsvJL3YS2f2DE3MNlYpSMg
MwNZJhmpgFGKqqgm09J6Gz8VTg253Vuk9FgcoF6DszRjwKtluIXovqYaK+fYybbtry/o3ETpKMIK
TdCvKKBJz18Yz8loYi/r+J5rdVoZBJ8GZpiDAbMN2sQzAV4Kffahe6o+0CG0dW6bcjnvcMU9Gxb6
v7akJgHAM8kY9sRFL/g+Ohzg2OGCpC4Qna6R13UzpQJd50WOns0qCOFzbG4QP22TQaUXi5J1Di8O
XjTXttgc/taUjtytPjOU/vntsBi846rqp+dVJzi902/RXwoBu5J/b8U3OXs9eKfbY4L905aPcvrG
1XdeqPxGeodxsXnkdvgxkg8XaxG9GWNld2wzg9pNGJQwvPkQTFl9zVcs8PplPhMGNWbK0fhSEGBX
pJkuuA6xeWjjzTP/GfCEwFNvkATdOJl3xE6Wpzvt+eCb8Sy5L5DW+IA6WEC5RyTjPfxLUPFt8et+
qZq2HTsU5FHVHGtQtkk5PC0RE4yPqPO0kkCO5RaCZTfmDhgCXyaq7ljQ9jsZp0vfVMI+DyPL5Lh8
Eu+uDnVRC/1bAbCDHbJvxNjF7kFEwsf6fq5R1HrNgp3nSsyYMzBAEcwMWnl+bnAOPawQwfb2aMfQ
UwFzQIoWqhdnUY6MZ3O3ZoPH2vIgZdIm/WkBc4PFwzobUDl785a5ZlPIsCQCbahCUKaXOSsSEKxO
sDMRnkHYv7K1edraDu4TlZH114w6kBbJYzSZZO4eFEN1VPUFJy9TZL3emTfuZTZTT4QsTTprGgux
J1ep84V72VDmzAFor9dHwZgG8nFUqKljCSPYyTaR0X2UrUmiYMo4UuWgNN3Z/dddf4N4kVrlTR/p
k2cias/iBPmO6WGglzlt10rEu5j8kYXrdl4PJVXVWEsx76RIWzM2mc/5dkiZB5ZK41ZD2XMXOLH1
l1UxcHV9aVcJ6wtd1+kl5P3Il1L5+RGSFj339ZaR4smVga+GiWZkuChSJMXLam30U5axVwvlDTiV
N0oENuGOcOz2St1gYJoO8/FpXn/DmCV5rFs/IeUgewQm/IEB+9l8re5TF4UUIo8T+KQMPXBMJhMr
0heG22BkdryK9zMrTn5PQ6aRnuM2ypwEupFtjKp4X+WyCxL3Su1TiXMEDOL4WCButPMMmaZS3JGe
w8rTOFbhbSRc+OoU3gSqm1qyu/6X2ZsGBkukWsefZukgJRPRCVgDLi99wlAgqGrZoqh3i+HbXmoe
KUh3qOUzENDgz6gFRT9iYKd0Rrrk/hGYKALwV1rtjWUCB8lBaRnUzSpk9R794MZbpfYCBNd2pq5H
y6ytKK23yCF1SpxXP0nYSbXjN3Mt0m5ii1I+iNGYsnBmaSoRxAn5z4MG+TXl4Y4gHl1+QXDnxDqs
fxB5i5Gj4Tc7WTbUkO94Dg+jc/O7dPt5oyVvPmBcnlS6NCDLEoHeYyuXpH1gC5i76tJzVt1KJuuB
4xZ956r0vr7C6MM5wnQNWaYWbAt5k21+zLvwE58hchP326th7RxheuEOxUT1GW26ToPFkh1Pcxxs
PDsAkk/w+azZQuxviifzNwbBx4eWLFgOVIZ0ankbonYfYe28zAENM9ima+dlnklp9rrOlWg/LRxg
ndJZx+DgKzQXw4Qpe04CkIY42+pJGFyxEcHdDV+JepAP6PhEbf1CJu7AC57bam8qPnY/UbGYbPin
8y2aOIXFHZ/4cJlCepZJW/5rHmo/CDi65OZRkXWAqoPSC+4Z2zIkyfrxb6wII3cTdxBulfN9ea4s
nLRtL01SjGy/BTLg5XUiL9djnx3PsJpCD8ES8B7FZef3eBfR/91TNa0tsA3debiHA2WCwFw31490
dF8PN3EL7gKk0LCzB51jO/SXOhQvpNcYJXOGtZ87QPDERFw/S5v8qRLOzMEXtkVyMUASTrOpheRU
/q2us/9POgV0HFXOrK66pIWolzd5kdkH0/3gEQJIF+0xoiDWlYLdR6ZVS5nBP6e2y/wgcfRdmXlR
Ipox1it8fVO3xnpHd5exrwww8neoCgqVR9x+8X1SDJs8JYLkncLqY1oJ4UIGPKLAQRrRGlLzbnR7
ViAZdD/E7DwKykEWxkIpkXejLSCFo+L3k4NMtb38/xSUyuICR7Baf5BrcOx2YjvVHHXkNwmWkY3/
v7sZN3Yn3zp+ZIBHKCIxcpS2N+nAyKq258gKF6lgjklncOxlCtHKZta7oU4AW0et+qyx2Ll0O3pJ
N6zCz3C4ingCb+wRxPaFmQpuZIAmiFTYzVLvYCIvKopcm/dVdoHWCGJjjYNy2Tp+b/QjdpDSaU8P
JWSKwWm2F7+BCEv9WHzF2FohMk3izr6YYHLA3dinOqdbHf/fDKT/LgxLOof7IBHdxuoMfraxic8A
BPjiI06woP0x1lghHULH7fbCbS3+Byv9tebJyUSqW5vIykGaBO5DnRp7SfqaAHJ/gNUNNgrLgelx
7qPRHh0k2nSDKgAi6V8/Mpvsvh18FNqlTchn/71uxn34C4pGm+OlfVo0QnnMXYpcbTnNJK8cWBRS
+X/6oKoGjExTuK9Hm1Uorzjs70rsPZ/4i92p3AW9bWIlXszbTGBowFRgxzKU9qUJ21Ne7NEynkZi
qUO4qTVDLopTjCFNe2g/iSYKa0p8m0UzgqKhrVbH3oJWT8Qh0DMrtPNK1oLw3NgIDkriGUof3WDT
aHVRT5roCgTEzoZFW3xImMoEzN0QMwFpY3YrODiGCH5nAO09E0EE8/OsMuE5vreB5sbdqaPyoVXb
4TJ0bg3zLej25ZDRmtP3RiJzFzbVwq/umRHLDYichFTBLDUl4QnYaNptkQCj9s0XSuN5/7tebvzm
eGmuU9tAvZAtNNtrVRCgfcSZPH3dYZMlgy+O9ipZXVQPdFLL45+kq+bZUOfYUZI7M+7GUR7mJzhf
KNTnF24Ng/mjj1RB2J7gpbvcOnlHADGGux73p0ealMGMiD9f3+obZ76gbW/xsYSJEvtxz8q+FyZs
uLmcbwRpC5RUXDigvOkCgFhZKq/dPIMMjAwoe3ec3Kfuib2dU6jFnG50wugiT9CP5FkmWiQIk34F
W6SGogeFdJE8+KKT6h+kKVifiFmHEkzlFWQzZrRQnAsi7MmLmM80XU38lJzfZ+it9OSEbk8iuTwN
UW+daYpeOKg+3Cg6boABQErM08ntWeSwOyiy5XYUfF+Sc2243vz84vGyQmmJD9EPqefpKSJucZT0
UelipY/9zxkDot7Bfi2p9imzdjGMuwy8abUlXtPmw8tRGKwURTZrles6aCEJJWCBOqkCchVMUOmO
2DQoJwecSTvHQGFrwvHSfBPurZJVvxQR4bPE27ty9H5sTuLSfBVuIjzYPVXdqnHCgly4ilxm2XXa
8qDjSCbycI7Q1hJBJtpocnwWX2EKSzsmk3Dih8wdGP0Wy9ChG1xKZMvdiZEz/T2lRLwmj/PsTD7a
HkxXalj1+3h/7CIF4WsA4ePg3NgzpP9fjM0pWRo85D4QgxvcNfR9QLTGVplZqR1bYxyYWvgRO9Cn
miQsoGJ/EvLJSaG2YuVw1cCvYH456PI8KeNHQlw4gzkCVbGSvEExhHfNFgOADs6hCGmNUtgkMYkK
qU5ianxgci67kEnc8hv4zgAkz6EiE2D0qA+R2jOb51TPC3U2ejnMYcLwI1mmeMx0T4+SzuLX+Ll0
HWGwxAUI/hg26NtkcSnPOfmCMINvX5h6aRYlSnfoMaoaErzxWMWvbTHmHc312E9UhnRP9wtyUL50
GK1DtwKSK5kP97NmRjBAL0jvb0ZQ8Mann/5n3crqDltFP1vinNyj9I7KiwGwITVWuLs9t1n0JpVd
7rhhRfY7iW1SJ/TCBOOdHAomF0gY7ZOocotifmErwAdeCMyUbgaY0mVmD+egqiHpNudEpfdrn5Og
G2497wRG+gi0GxZOQssL+Q0PBrRbIvEERj7JmpLckQUFhAVIkWOra6Rb7WIK14UiVncMh7m3B9Tk
LZ2IUxmHLLlz2QeD/+8MikDx4goIrzHUs4uyWnSOUiqJwNZXgl9yz86xQTmvaMM8vSLIqXHpb+qO
Capvtp3Mhof1txBR+JSgLJcsX5ade6rNqT6OsZ3FG27+q/64xM9JFmD0hWysshqHnlOhKcVtEh9g
uoCeb4iclDbB4wRETx5P4IL+8R5Qgy45oQRtjS1SIRuQVub6D52Z+uBviIaFxn4j9LPhdOHuimIM
PY+M891qSI7VsQZ92xzrCT4V6D0ZlYjOthgbkNbAvK7ycaB0N9tr8YCLPD5Sop1Oh34y0biYZVeD
Tb4L4TzFEfgfxAzS2BCJqQz2MoNyn+tG9B3AvBBd7eiblfl4SN55aCInNXNXLqHr2622OF8WnT2K
ZwxRzHNkAXfwC1SrB9t+jhwTQ3ZyJtZL9fkzPIlDoCfzjOBT1/INZPVWNg/RDqAQ69TH4ty5di/r
zWLSyZy2xvlvv8ua1HwbPnEF1rSp9a36XZy3iMSxx6Zm0RkBk6mzYrAtbaWaNFfcYh3rIJfAPSrC
g7gQ0MVDosCqaq4BI+tLet2awAazSjAvHGibNi0MIry3IXVPcdiGg7jejTjLHTl/YBEmtHTVek/3
QoOm2upXJFWCsDP/qIARBbN2qY8Zi10sKDaMGKY5tXPU+LsI97gGaWV5gMUIHpn2/1hXhhz+6LD0
NS1QHaSC59ZKxvm3ijValdyyK0tHCaUzegjgEHuD/lsbiG41GaUOiecWbuaJXYqkAP4NUTAxR1pL
09ii6MdVBUk3ZJ2uN39x3WAaPyKDgt/rFHP4W6yLVEiBuzw+CO01t3uBJzVBi54R++VbWeyGgrxc
Y1kuGWPBIKsmduR1cbYpPF94m3YXo7E5hGcpSVB4mA6lZ/TXbXD5l9ragVSShUko2zevq35dwcuN
sUkhwIEA6h/AGNQoDlHa9Mm0OjDftmvNFJxg8wF5t6h5ZD0WYz3xik8o6B0MFNKdSecmVCR5g9qq
LjYN5EtY5ycTmqLsYRiki0gM1ikR7CpbTDw2EpoJB8RPBtxJJftbtzq0XxAZZ3bBpb69dVdSdwKC
Xy8LUw4wxPusV8KulBG7il1vTC/UGoKWj3S9MPAG/QBuEln82GBvF3ChQ4envULHzsIEk8BOIWDg
uisXuxWZo5dQnvlLWykkB6hJ1g/Bvhs1mt5xsQ+8oxJ9grY1YH2dq81q68HngVpDRVjylwBx81On
E1Zr2IJQMSDo/uEghqM1l3H/EWPukhcAm7baHChzCxKp+nqhUtjoLYr9o6/XeiIJu3P+w6jplEwN
dhgGXu9vlFhqHCb05SgSEiaQJCrXxtf1snw4FJil02OZlBcjF6alkv0Tv5JkQ3yMMZJVvcRtyS4h
jm5a/EH0y1LyS+4jstpEsK9LvlmLxu4HUZ1v1p9HZNczrRUHLQZhZ2dSt7GFSA5nBdOxGOA5oFSH
YyxMvbZyWzacKCp4ZsFOhL/Y19jpzz4g9cF3C4dop2XOU0KIY+ia7Ma8NpshowsIkn277n8He0yy
xZf9eKnDDEFrXWMnv1SdAKGbXSPEMJXccfB4jV9wzh109nr/PJKh4zz5K7+rVKcDOY8obLNhDT/H
I/Thx1iz4LpCJXfRcW3fLI4Ew5goOvptSFPeTrw88xGaWBx16zRWm4EoQ+Tutvac1Rw61ayVflrS
Xaha7yWg3KcvkIvEISnNwuyU5mVJyXZjASuMHk37q1pzQfQ9+7Y8PgzDHP1U6ZcyFiuy5aYT4Idg
TE2YzlyeV0z93XCcodtMh7kTjgLddPtoGWAkhjoYzjphP4w4tKVmCuVX/mpoz1qug/MY/DCuYBmj
RI77rd9d/Pjz5tkHYTJs4TUZOFX52FVobX1as4kAT/nNzZtW6SeWNt7A1HQTqA67J6UHplgT9h77
bpQjJMM0zbLe49G9Vnjf5xJ5CQ2KPyTPl6LyndKFO2fUKXiYxPCTSESOUMBzFybRTLOgKYAzog87
oESj7x6C6lheW2fIfy2n+AVFFfTDeiSky05SAJDZKF1lWQAVfNOcPZIGBGOQWNp0Ym7nPz4MnW2m
11ySvYZ4C3H8pAsRLH5vN7SCLMvg1hz2dPh86D82GbNPSyaTK8watzADvmV1RbHG5OCOmJP4WDaB
WwbNhjvL0A4gJ5mC8Qwt1chAZ7hLX0uDU6nd8O+OANqRBCrmYI6ya4uHQRjcIXaPmfdo5mnn7TfR
ez490eZP7yDXkl8LMJlXM8jJ4RYOC/qyLM4u5XwViSR549pdxnd76S0fp8xzdBvCy6E2bEIweVSo
PpTOZ8+zFwK/Zs0moQbyJMKx+ExN/NIT0fUUo4L+AbmgJKQ/kUddNSplKqCmwG6ko8oimJAzPKvn
wq3dDTgrGhaPMiLHoIM5HhH6xbhjm95PzRgtGnNumz7PZxmjU/oS6l7XDFn1qkyFHjGMxIlyI9xY
//JT3TGg85IV8U8QItJDcxkzFdIM+kY/8RVHUn/xQQgYy/KxWKi33nsT2qdqop6LTYRkUqXt+dN8
/+bVZHJCg6Rm2Mbrc2lmIKDJHBSgYmFjkOjvcp1QLttma77n1PqP7tqIom2jUX9a7U+HwHCrbQP8
LnVN4s/b5Tp5/CPRyZSXWN01HnHceK67ZwSNavlfZ4qSQuunBPfcWIRLpy/j7x2gRexrgvfTkjvT
d6xzaJctSfelqh/r7JsTGacKEvgSylQ9h3Szc22FzopOok0+VQQ9xjPKRamdgWK4/YtjhxVoly8D
/Pgkjv2hx4dNea82KHobLN4T/Bwr/aroMvPLQB2AluuVlqfMcfzRZEA8hI1FN9epr+zkmJht841i
ui+xCJ1mXzmdpAOmP+2PwPL9m6ww+TtfEoZ4l2avoNU+sWpy4l9uWHJmbY3wJTiKgMCUN+ZRb5Lb
Xn9qnM+XGoeXP0ZVnSq/QO1nb5IR5qQl0FViUs2iFtruzjXawyHqYRvyVYUm6q29YS1CNv51e8D+
l4mnvedDxDrCCKIPeaJJzdop7dVLXMbfsZrcmTiZSZOfBPI0viRuhaUcnn53Hom4Ea/HU3lZANmd
vJCgCG//sYFK6ml4d5yb4cZogflKv22FHAH2d3ACkm+dR6aufTGGag6rJmxiT3dNRpX6abwEBTa1
ddQMg7VGfCsMfDknkLu4c9kJ0AtYTg7xnyezcqdRelvAHLjAJ/GnGURUWMmvvr2AN8JOKPoQIViD
YKHdwAc6Vf0tNl06zRkBBd6gdUfMiFj25sdYP13qu6WL5BBa3PYx+UKlTfcXe7iAzWK18CeLdVwE
k3WsHWWMt4mF2kyJdaSd9hcLLpB4YFtVg/nk5ECUNxcbhORw1Q99Say/wrhdI1UvdXTRv7o++Av9
hTrnPEpcOdz7ayLRU6iC9cU9sxCOGoD7JE6Euc26tA/TrUwzaZGAxB6+aUvShGc8udT8zwKN/t63
3OAWsYDNPlBfSVEcBfFJIltGGJvQhBw/nbGA7UsfyNdDDPvTPBoVq2JUZ8IuPQ+l2quILBqVxlEP
8XWiizmjINw9VEJSNyDEPuu3QluXPKUh+2YPa1DA9hHLyLEBaJpf7o4C/16vUa0BEfN5jv15saqn
qRjhar4l4VwgUoW+tykJ1r7PiMXBCDQaUAMHmd/L90j21L+FiNk88mryU9Ub13SgyTrgpQGOZwO3
PLT8WIjuU3PHFHNmSg3nH8JzZ6isoGIF85PoaFiwxv6NZoS+Ozje7C9a/J5exd/6bb/kxNxaaAAr
mIXy6XjVMi0Ive2SVMcKa3sJuWfgZtP777UB0TlHP40yQiU1npEwzuVVTgkOyy+ElpsqxM9WFODT
IJIQgC+uIGJlhhYfVDm09k5HkL2ZNX2irP2Nb9jgrJCooOg6ccriGmaBVpmo58JxwzEhvjeT4jp9
RnuYhp0ygUNfY5YB2jOM0IeAoCl8BwvgrUocUWTGxdb0unoibvvKBgpvmYPF/vvj7cZCIdYPb34Z
rBNWk9SPdH3lVKOTOX7LBSjWzIipsFw0RnJxJSoG64ThZ5c0R9ygpR17I5rqLLLQ7ViKAjOkeIM6
CJbEYqrNzumDllFLm7uupioz5qeChtT8XmMT6HH+f13VpkG6zD5aMlcWVJ/1J0zjQeEI7KGxUZu7
cv/e/lMlMf66ANhnsR2SW2NLNp7ErQp84LvQhc+NOQd+EBLewiZUwBMF+o+l6Jy2l+ov4VC2t0ce
/uq5dETK+U3ZB7OjdX+BGoar/aSHyJAVfSBzH+cyZgfNYKnBg+hPX9jAgDpbm2HFrJJfgi1gFqDs
jVt6JK2b9cbePdAgDv4xK8APOQuIVV7Pxwj1bmdHVhB/WgDCTTr0wO0+N8PqwuRRWDZYajVVWTi2
CbTgcVa9rf8j+AvmWxtqslTQ2t279PHRCEpkjYZG9g3BC9dCfRu7b7L3DmBjKT26JczrNU21CatH
1BS13/2tC0/dYep8twhdvJSL0ItY6Mew6DM37NGIXWVzVVh0qdEBGqjrS6brrUA/q+qJWAfgDeNB
c77TjwCCYkmwVPVepxar2wAdh5PEzmkO6/oi5Zl4SSYUfovw1HYU24tDEqN3WD3q1y8rBbB+G3li
m0jSMW6TZO4bv5F29Tuh/ch3W9GgNfdSEGdM93bM+fcKskTnQSkONX6zmRt0zgIj4MDMPU//4cUK
pYE8BJNzGswbCxqy5CICRZKuL//9WDIBbKHpMgrKzCDm5kd7c8YQhdUqfmEIqel5BOrgzAcShGWP
zfr4/lByqQEeN6YULYOwV/vo4ZXL4sSzzNcpxpdwi64/V2PsPqdcE+6CyvdU+fexdL5WXLogWh0e
eattgYP2NQGTKVJPnlpJyqk48TC1QO1unb6dNSDfKPS2P1aS2G6i4yxOsKUpXAJ+pMtqePkvZgqj
1EeeJPHcm4bB1YIDGalIRGD04K4Qjdn7ShpHLYSrfFFeo6FvCw7+eBK43qCoUbN5duHiv1tfOGxy
zbEFGYv5YLrJNYWpzvrvrVb7+dJGkSzlJixE5ls7EZQuffis3v8mDL5heUsevxWzbtlpyroXE7hz
dX12hPLG67Nwe0fkorNEnWe4Pr+XrHSZotuTW/aMO4qLv3xjGkhck9KUqP0AymGtavUq1kgWTjQQ
p+Y5nG5zmO3vHGnpJtH0Es9Tc8e8eZsxI2HVFg/6CD2xXNkRgL7Ytu2+Uh7uaLm83L+vmvPyNNkJ
tpYuYM6CKDG1yvYCvEWrM7vp8w9J2d6fMoFeB+AJAZfcdDRtRurvAnPQ1XCOnP2YVJKtqvn6qv12
5ACbL8pXNwCHwpUK/JtS576x7fNRAsauuzLr5xu4EB911KuXgvxq3HLTnNO+LZIeVDJKHyljBrrk
FmcJBZ6iiIDE/+yPmVtgYM7ER7Cn+gZMvSCGJHwtI1gX79FCltDkG+HaFiVLHz5ejuGnRQUGc2v4
mNDcf9OC+i5oZBLx178BF8btfJ5rDteT88K1ayqZKF5aM+fda87zo53k+DdFFe6jFQr1RFxxUoc6
8vzlIgrCJBxONB9U7IVqaEU9DJk4HCpF5y7lJzRS+1yUxBePQY9s2+h9jQp9TDqYrC4DiHNstB39
CXLsPIGbKsNA0zYcWslExe/O/5p/OLcR0zum8FlvgppIrKyL3dMU0nn9dvTSh7onA+pYG2JNRRqU
B2sUrUfS5sXk6AdeWPuC/pRZ2IHJdeJyk+jSbwMNC2meY///eH7nNPlCq6vrunuXwDvIE39qxuxP
zw/pODb0gdMWo5Was3OuN12PhdudYa0kZ9jPZlm80meyGtHLEb96ZblOpTOkpHzJeRF3AgMro6kn
HSguoAPDWK4ktXOiRsOTPO5d+n92JYSKpQjpff6HKw0PftzV60FBW7GYzJv1H66765zgbuMNclr/
f/V6RJ1hu2XN2XyBnMYoowzr1fQuJHFrz65uqr0rfptFGu+7o5hMl2Wcavbwd1Xkv9UhGXBa5cHR
izQ9YUxlRYZd+GtLZwVrqEu5rAtKb4vheneyrr/jRHH/0VJ7XzX+P9tuVi0W6a6TTf9BrPodfHbW
JC/eQpd7m6jVwbEc3nSZh4cRJh/xGmdw87cyPAJgxzRV7tGdDeSg3PHPtj1KHjBbgjJNqUpcKYXa
GQOKZ1CxUaD3LYldzyagnvxSHz69s53RflWMxd0devzOcFOB1UKANGuQeWgdzhYSZSIbSZXiObMk
lgzom1HX5uSZ/q11kG3K6zkVWuym476wlI3UKzo9pQoSIddLB18w6q1t6MIWff95bjbxlhHeo+Jv
liypfrOKgQrbwzxi+zV0noqB27ncbKmixc/BgODSvgFZxPPZBB9/RHU51oZ6frbOCgloIJeV1R/L
Jk+b739KCnuxZZCAsmM1JmoxdPUtQr01uOYD5V7tid6k8bW0PTSO7ocE9LyrDDHey8ZYwkpBj6Aq
ltbBJBR1YRfHyO4EbsDWNZwoev9C4/KlYGOGb91ju6PgIuNGDLTWj154Vqefx7Z+GQ3sYl8NlyMH
4RNmQ/VCeeeIPsAciljEnX00BhkzjGcqJni1kxZEr0Bfm3//c9nCqJ4t2Xn1rRxA/8NAVVQVlfzs
ORnFsgGQ/t8qv58NWncmnQA/NMU+olBTIdZgzSrvirnASmZwByvNwCn4lv7/tqIHgVc9W5qhZzrq
5eY2ckMajVki59ih4mP9wJWjqDkSBfrdiX04P0Ln1mpt1SJzXeBCTrrjs55E47stxkAYEyHmAXLj
jDPgkmxji+bvQDZpC9wfNf3vGzLUhBUbsYKCvNm0VJIYHB46BTPjaAaXrhPa4abjec9EQAvRR06s
/jYC7JVM9N21I0D7TKbeDbbmGS496acNg0rjOtags5DCGYHXo3qoRGoRqAggyRGYwq62UVZf9m2M
JjRtBwJem2qBoYhAM8YF/brUPdLNoPtTSlU1hMZI58nC4c/w8+3wjNXWpdfzVGNYKHThSuaVftP2
j+4Fdi3Tbkb0OCcxnn9RbYTaUifLXB5vIvUFlivluNTOeZPifLPEi3SI325WF0/KrT4OM+CzxOSc
MfF861I703lpZE7c/lIeZM+aXMcpNSC7bnpovvClYcAFghUbvn22IRA8sJ5R3hL/v5N+cyBd7xz3
mBpRgb0LSDM+wvrNx1MUlLHTMr7L/QT3SanboOJ1CHTNA7qYLn7HhoEC5w3XfgUlmyQxwkc4OkOI
wMTzuAwyIkno0U2SM7UBgRlRqFDPJS2Iau502EgwzwIDnzAYKY6K+mck7he9DH/eVHRU9IDL1PxV
mGhlTUQ80/qRi7Bh4Y2QkxwQEbcLUv/hfLoH6GtS7u4/4P/dFozncWE/OvERpjWn+dAQynE3NqGu
zk7L9iaAEY23qti5m+QdiUHkvF7OWNLWIQg9d8Zy0QBxSygIkLyauFI0WyzAk8jrHkmcTTG1QDxU
iK+q7YxkCZqnNg6dfaNpqpvM2gt1k6t9cvaES1+D5qArj4pEuQfjPsWzJWFhaTlWiCU3LHY1xxgX
fUldJFcapNneMtkDllFkzIeOFtbH+BCEfpRrDZlsQqyiJ2ilFJpaY3JWytAj0wU0Ku6mAIdVllBW
kiNssDKrE6cbWPrlTb8emeFIVHd+EGV1GrI3eCf6QnHlkE7uH2V7vpHcuJqTdnwgxbkqGXB2ZzuR
aOYUI7p2tyDIGs09/bu0eeNJjTwqD8Nor+4+z3bf+10jkp9IhlKTUJ0athYoaH7m7o0wRxzmxRtX
PBno+czNuUkKx/bamsQyXw2dkum22HfnGe7MB6fyon83feiCsN3BBKxDkSdVk1014E63ASglLQ0t
iRVhMC2vmDdTRPWNTKptcEU4+QZWAhwWoWyfaPT94lOhU15TvsXeXuc7UUnMgQWpJdNDXLxA1LVC
FSo8RbKO/cKUj2rtLCbx9xj9Goa5gf2Y/qFePlORD5UUGFC/bG6Rk1QSdB6FP5w8BhgTrAKSYiWc
1i4bh06uj2CqZerkSOaZl5jrukOan1xOO0zaDUfv6316ZnlfYSkgWvKkx4omgcUBJoE/D55Hl+DD
kCzMdNhvk9xjIzRe7xhqhFsPy1wyi30Yy2HboniHjv7mTmd7JWzSf0PpFUnmMjeXRLLM2Pt9IiNA
RJ3mezzFqM1YuT35FId/LCjiEMTwwNNHWdz7CxTFvx/+CsJ5evdD8CpIKV/UbzIvWsZrwM39SFN9
poFVUxQybztJL9XjtxrwaJjnECmbq8fuVluuOt7y1phe2BAJ8x3dn28ruQ2L35Az/OrrkuKqHe4Y
bLCNZefl1o1E104ut2+6ev7/UXQXoLyErrizqS+GKVBaahAW8qiTbmXIInlfue6qoeoqf+c4yib1
nqe1JxezVN8SyrhVvApEMpvyJaWQq8B+6wMMM83nBDp8dkruJKLyK67AhEUogsi7w+m6h7QLceF7
Kcy32gH6+xIK57OmhQgPNlxvyeKsP0Yv6UpnS2PNJ2+hD/a6HldVhbngpznxH07cKVsv/EykYODU
NRqDrG5A3F3zSVQOVEWws26v+lZ8UdU6UflYsj2eNQwx/fYFsNa4onuJyYl1VuRv+BDS9YUQ9Abh
m0Mkyj1RcZBSie/8hVJZB0T89CuqnTXWwjQaETmFsgC7ZJq6qlLcT5wBG6JGjdZ7ru7BG9GjGCYg
fP1ljFXWPusnSSK9upcwmG4bVWQgKsh1uuw/nKMw5yO2cF9ei0hWcUih23WGQ0Ynxw/PXMPTHjjW
bUQZryMZvwbGy2iE4bi9YH5hvDzApU9TgO2OE05SNWkZvoaRhpfXizLIMSQIT9ffKs+cVAyi/qVO
F3u48hNs+4xhqqcrLyp/NhAIQlg2HZS4YNUw/dLoDpX7xTwtxDwu/87BEN/Bd+HWP/XBsbUiIA8N
oOY9uoCLjdmVOMFrvKQaBuXrJ9Ub4cf1SQjjLxVvx3Wbu2f2ofU40jAAhO7pfD3RPSKNdZJ7KjhF
bCWGLwkdihSD+645CELUhxyXmoLdpZ+tMwctW767kcBZUE0sACz+Z8p2Pnkz1iU5gx6V0kFH/Z3H
wcCBAqTSAr59uGkB6TZy8uzjq3/pEV0M3Rs5SDC99boVBGhNY0YggICdRmtTEYPs8KZl3mWWPCCI
IaiDPwYZADs6/fdpUaYUcaDNXf3tF6w2drgxADQPop+/0PafAa8+2KPUAJLGkzVjlw1F0bMWFanK
Wo5oa9rzlg/UVc7U/iL5PeoRgMpP3Efm5zvrYfh9x5MKQkAKPX8CiCrC4YZrQkYzbdrdl/oqCY6K
uQD5kUa3BpthBXwge0RCeqpn6I8lYu0owJgTfMmwynJRXlcpxKVmu3QV6dlJDsUnAW+uhoLMGXUY
NuOSYredbPmn8DbGzH/24kTeYsW+SlHwVYAuiXaqVjPph7elIx7+Ngfm/kTCAmqj+L3PdYQeRoxc
KVFLhZG7VcxYCFdJGBuu5c31rTxKum37vo2O/zCMV2lxzmsycliVnXffm1xeE7n5DgZCfWfT46JF
VZQ0OqkyTkzZoKCbHVCOdgsSuunjBa1EcETUTCgFrtlLuv6vkEtUomdZ1Qrwl8J08nifSRKnt3ZJ
C9wJPqD3S2EXb2XHLdvayEWKQCmMN9ZVjjU0S9eKYhg8u0xH57TxYRW4EPhShW9pBAwl+FkhCPai
ln3eNHNYXLv7fnJrKM8OGq8zqyDTELZJmqpyfNZjxlisPJX1B3THiABgfsCmdhHnG9OXk97ch8/t
kfeMFCWUi8KXm/2v628JGvVOpUCDOr6AbdnrVEuQFY/+pppgb4m0zWZ5ndzHf4+Aayer35d/BFGb
v52GofyAGeBrSJ6HUfdy36ItMmvRaVCoro4YYSYm7JZHFUIWKWVJRZJ8XVjzI0Vp+bldo6CzxF8V
7dv5u0SIwmsxjdS0j4Zl9Rlh4xfgrkYuqMeup2AlcTqB04akjr1gxmXXVUHw/j3dRzUNSC46essw
5PJTVG59GIAdvc7dflwvfapW+Hd2Yk/fASpflSMEjcZLCphmD0q3QsQPEjf6CSUv5ti6AA9xlY8q
reIDmgn1L5npzv1gn+qJmgIhievOqzKoA/Uk1sB9vlJAlF4zwMc1qyyTJZUBnOj3d1xiizkcPXos
7pUMf8NzTYEXyzDICVftiT8YmenOUnG1XDngR8Y1zFRwbPQ2v6SbS7WI17PiA2D+skB4Fo+Y3XXG
1e8Jd7ldGp+PYvPQuYYD9jq5macu4qy2BSkPYznG2vK4c5SdMtcDSSv0Pn+q3D5mCzSi9lST+MJ4
rsnNUbrBXbidD+7zd7pWq+bK8uVLT2+b55GuSv9MULdrMJypc/gQsSuNChd+uRbkRPPZ4RUkXeV5
SWP4aKOYZ6dYnwSwGZT2gDWFrAPgIzHiuG/exyIRNqM5olby/seUYYX5Zl3V2dc4zKKpy8kco6nr
4xC/ADzc6lS8b/pWs0ZDRt90eEtaA0Dtf61mTxVP+XmIgW5lRFJO8TLvzfjUDsCZK61N8Z8nfhS/
HsLXS1JxNZRHgct4lQiD38Ka1pOroCkQpq0emyuHcBzdVJt/CY894vLSaGE3LE3HVetSpyvIM59Y
7YsevxfELHE9rN6aDlM2s0UYBHJtoY7wO/sQRU/g2I7oVPRynhUUAGxS3gFciDyPxrXLmvJzGwnb
SthtPUIpLCHCwPVWdP7lRXZ2IwIRFitTKxbkwiZL+OFxNQaFRVgb0GA4oKUnQjK8HY9Zdcj1WZf9
tGhTSzMb/bsbdCIw8m1JuEGtEZHsOZhCr+Hg6a12mCIiw0gJirV7xeJYa4W49yB3kr382mQK30kN
voNwElt/FdfGRUvTWWfyxd2EXSWCoTVfz00NlTrPJFrd23oIqCqNphMMZD/YE8yrBc0+Ge3MNK4j
dIG3oNwCeciuUHFTIoqbLsnr8maubkx8we+vbup9DaXltijlwVBb0yP3R4P3gjONutdYxFiDBgaa
OKNp4Q/spiRCLaZEJuThOceSoushKD3gUX5qRqJ//lDuHeOIia3UufrpygGjnHrMIzRq0GS3CEfO
TEvbcJLvUveHwq01F67Zqa1EZICBABR7JC22tlMrlm3IRb0hmsMZar3w5aA24aZ+3AKPMqlVDCMx
gCyHzQLmils6Udc8rqq1TYPOuYviAf1zAE0NRWwa4ygXJn6LghXbdRJirIIDp7nRfO9byBjUQ6eZ
ZPjKwEr2Jh2jN7tD/jWJbm9jOj7uvRKXeTKVWFoev7xaZk2cpcsxrZ4kHCHIbcugEX1Z3dpHQo7e
G1dp6OR1+yCE9UzI/uhqvsvK3e6HytGaeLRsUF8ujhw6dIQqWFPDlQ8vGDAzr2lh7NkfvOqozBJS
8ar28QE7XZ+/XsOliiFR/DeneIGGpbfdOxLpajRHOXUARXo5oM8LK5/nFOsB9kpwat01X+rKSL0d
cUV8MKTWvKa/N+RwC3abuAXzcGWuJvL/+CQAGRMtfvcF/PFMepZzDDh0Ib7NruwdJy/pomFJxiJg
WNp7cON6t8btlmCUJxuYLdMzTe1PYoLXaNl/fa693vMqIfluwtGVR2ErkKk8e6XfHjAm3z7HUybb
NXUJd2VydgjZjO8JyghMLnrDO6oTmf3+93Nc/v2xaaeO46DYDUPHNbB2iejifuTzmWGcWJB5TayY
texHkOtCQQt8HsWPc3loKHbHQ5YDdjrUYGKs8Q/+HA5aoqmq8TwSsE+KQ1HXKITqTJBQaf3O5Kej
d5KxSU/ZiI4+P30IkX7AX2uugPR+4mW6G7/Lm2ya0fi65SuXPURLwEceIRTvo894/iO+6zzQTEEJ
7M958pK/T7rwGeEjTG4GnnB++kYI5IEnXyIsB9vSWfHCt9aDYn2xC8F+Rb0BDl+72ZdVOEqHORr1
gZGqEooseQJD9V04ErYhvlg386ApIaGcGvaIx69laWLTHoIPS5JLCqIS4YimiKZJbexLt+xPXCcG
0GLLMpmeH0ONraC4nlVyMBZSdAKXoVHPcJAIrc2euS8RCEe6MCXgIqoNtFTDw+mySOTMjz10tkKn
71PolkcSRseTBBB9srQ0nw1O+4cmPEQNZ+ZvMBct+IvFwQ3+XFdsm3TLnAeAZM+PmHRvXdehZsqN
MHJkte9K8CiTF7+Qr//LNOg7k4wW3z1TtmLVDVJBISHGMDGX+nh56gL/yHF1cxdYCMYPLE+w2fdp
+z8jrkCXo56B+x6z3UQPXz8lk8JqTQGZh2ubom+Fh15cBui9XDL8GTipDXumVZWumkrxGwMTfmru
I63YDGSDwdgq1BD3P3V9WiF5wc1jEdqyQk0p3FQ8+ZNK1QlGdcSfojUU8x9RWfaIVncX/IJKMc7f
NcCTa1618l8DYZnx1bAGiY/2A8FIXDULdT6JCtTT0yNMThZks5ymws4ClJYdekVDgkSgggNlwDXr
nPNBN3EodBTWAU8hrGPqhGxPDEnBC0YZLOpdkfTZ+jlqnIjpxlyD7GtSCT9pMx8Ycg1/4TGCB2e3
YpzIFmhcvV8QuMzvkrx4WvbzdJFYHexuVoHnJ6FTcjLq/mfTtNLGN9j1uvE5AQdzoMJrUpjuDmtE
CBnKlarPccldWAkUa672U5P83Mo9fmX7H+kH2i0TNG1kjErQmDnIj8RpuNRtHQSjdqCTSeZRUaxm
zQT6q878R/7nbpJzCMaLG6iwIuyQSLApuLnUqX9DB4UB8htmluTUvsHcuixIfO6mx4iVTIEe1gnl
DYli15kv+Qdvsm1QBHv8u7zK+rmNAesqVG2SOMQruozPHkqeUyMRxaNazpEI6Qf5rTtRA+0bvKXM
8JdalsIeSzNwm0vRXGMyNbdr9koShsgSZnQvgaXki6PM/tjHdBRilFXCisjzwSJPS4TbsN7rXRe3
0uLOBvcScn2nV/9mPb+i7BbFPdUfka7zGXp5CLOsKzCv3NO5n0l3SmYWlnIrwwomHgvECD+2yarN
YPREWkH7kVvKFkMQnn2mFMxe1Z/03t0pwz9dEK37htuParBap8nf4JunqEBIIP+cyN8mgREzHGUx
tw/nhirfgNgON1Cc/QAVnxt4AOgVJLDlmJnG96d4fITald210PczJobEyDkCWPKUkoZs3nscqHPO
OV6Ms9L7QoSmTrYhSugYl0qGpaU91aBzCQxiD2zk1AdXtnwQemlQFCYtktmx5iQhaeMmPPuMPskb
qbslKksBiKGQI98AMYusUzb+hy9dxV7xw70GqMa9oGEFJWbOmJY4IYsV6PVq7VO5Sw6BB+ZZsnnN
xAtwbgP34btIbISQ3Nf+QFS3PFBR6EvzTKdD9ZiuJuOd3pOxwck/6YWZ/rkV0QF//TfgBqXPThZf
y1K1AfxfXKc+d9WILUv9uN/xxd33cGFPtUAIZyU7EqI29SMKXvsOl8tTRlz/nVK+MK+S8LY968dC
3CmdNiR6FPkijSR+Hgh6I+gB7iaKqs1Vg+M8UDMNSfm0tuvMNUq3yKV4NeWgfgUnZOy2C4SgDfi3
NitkkZzRq65wbwo/kO59Pj95RrnXKzWUUPdKyQw5nnnOoahNXDV0zSikd2TNtmJ89LpozQz3smbf
cxf+5PmTAXqueuNMPryeo2W+4TeGITS0eviL83K4i49I/UWg23Snzf3BsgmiBzYQUun0WKOWXyJE
eBsPv5zddBwRbwZOUEYBk2xLX0ZKihC1cY7KAwHDeMt6bEoe0ynz8wY80EEEeGacQ1gp/9knn8vx
Hxcoox6YqyJCSV1WiVxJCmAhEg7qBpbOQDEeaMH0q0WprP+lRo86Tcvho8avwENUSa3oTvcQqD3u
z2+FSErduDaCfw2USV2HkUfyRVxIJtIaTNWJpW0Rgq3z+dpJ5o5VaDMFaeepvdxmzUCRnrLHCw9x
JEAosmVj/hrXSKrtiaKr13SR0O5Vxj4YGLy6ARnMsdBkzGucKJLABrb86f0ehitSdiK+iWYnT1wz
pYV7Br8baqbsEV8N3UU3C60RfIfjjgi7Cu/jTh7dcnvRXtcNtp4AKw8/eByB7mnhttqgzGtGahtZ
c2LCVVCZoQC0YlhL2Jn2q9kCpjjO7HMMMRXcq0qbtfFKo6XbaXQ3blMaaq7XkHREGEY9haKEg2ss
VkSZ9iQXgecnl3R5+HLqPdYFpAlWWbDQyzvIZA/8N6NSSpYLhiVF1uBxCPf2w+IWwUOvPZJ1Qtju
RFQqo3YbLLEH+kDkV9Q4PaJLyZ7tSPXrwTClng2nFNF4NYwkWqEfIgE+4ixYBjofqwzaw4SQk7P8
t6xA/kCPkIeg2/0kt3A0/tbOckxzABCkx/hWD2Nq8DqKcT0jIwuT+i9k6UUPym34RFgezge3rSRe
YrLZZ4aEt3DhJuQ22fM+OGv+t1LIREr4EuqgdkGiklajqwAr2NOZIUAWc2NiQ6BMzEMoCDCvVopL
5Oao5Nsm7fpDzX0jc7m2TM8CD06xdotarJ7/LiZdjqPQegc4648fbe7umBGQQXNK+Fk4968oO22H
K9yEecz3gJw9AMPzjY6NYnyki9g4/XYjVsBrjAl0H3qbWTKqRkxtTp0+VEg2Hn+asKd0zFUA+p82
inHRMyVzmPeLYaL5vGrbqZMjSvtVm2l1qGPAoOa3lih0cdkojiAQi/1qbtawQyuO8ADt436NaHJi
sQfHj5Wky2en/bKSdgnRO3rIdwC1QTG5EspheF4k7XDnoqKixvePerpT+anWZRbQanjMld55ZY0d
iuH7MM1YOUfuhklTBrcxIpyUBr28BH2YMo9A+ZESvqR5Q0ZWRaAGOtNEM/uPBpcKiSnVfQsnDOad
/PJTQdkrf7eV2dJYgHVgSQyoGKZgFglda/oPriZqjBrbXiA2iauisYNULpdR7cmCPeq9y04baBdG
ytzpDx/ZvcT+xfPTQZe4EioQL87S66iB4uT2oMagnZeYABF0OlITzdG61RjxFXTu33GDH7LsC3gB
R+4ot5dbc4Yab5O/yfyerdiXZPC1xiVTjYMX4BO9EcJRjswI3FBxiehFNuRMTvKW+j6UK81GOCV4
jkSDbGPf2eYIeZ0IMqEPA6g5IBuL1/ClHx1egdaiStWM7VFxETk1YuuX8uVbZPyZKvJhVkckQAyL
lE6JvkWNeLXyqRuBsYfZ0zaCo0vEPHx+v8nIWfc95r/gJMwB/8rMu336BPKQZuIsA50pipJ818rP
HAFgk9vLz7ZusMlu2HbZ1X97bH6D/blKxtLY1QYtWDkfthBmZNUBRavv90NFiepPozBTsLcHfOYz
CIND2JgO5/8Nk6i5n27g8HOG8hcJtIr5lisqGjiupVh1o4E/0PXJ7McYNltqv2+vHm5LIYkXcKYr
XpWJQBsYtTLP3hRH3U8Mt2S/pcxYf6Ew9pMqzFVavTxpvKFpm0lyXW31eLtM35JHShxrwfoMtJFU
HGFqQOhsShdY+m78YPAKT4AaIbyQPdpq7GwG5PXWL8mdCXiNE8d8Iw==
`protect end_protected
| bsd-2-clause | 7908037ca12b3e18493f78f226893a11 | 0.947221 | 1.843061 | false | false | false | false |
Bjay1435/capstone | Geoff/Geoff.srcs/sources_1/bd/dma_loopback/ipshared/xilinx.com/axi_sg_v4_1/hdl/src/vhdl/axi_sg_ftch_cmdsts_if.vhd | 1 | 13,184 | -- *************************************************************************
--
-- (c) Copyright 2010-2011 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
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-- otherwise provided in a valid license issued to you by
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-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
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-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
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-- *************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: axi_sg_ftch_cmdsts_if.vhd
-- Description: This entity is the descriptor fetch command and status inteface
-- for the Scatter Gather Engine AXI DataMover.
--
-- VHDL-Standard: VHDL'93
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use ieee.std_logic_misc.all;
library unisim;
use unisim.vcomponents.all;
library axi_sg_v4_1_3;
use axi_sg_v4_1_3.axi_sg_pkg.all;
-------------------------------------------------------------------------------
entity axi_sg_ftch_cmdsts_if is
generic (
C_M_AXI_SG_ADDR_WIDTH : integer range 32 to 64 := 32
-- Master AXI Memory Map Address Width for Scatter Gather R/W Port
);
port (
-----------------------------------------------------------------------
-- AXI Scatter Gather Interface
-----------------------------------------------------------------------
m_axi_sg_aclk : in std_logic ; --
m_axi_sg_aresetn : in std_logic ; --
--
-- Fetch command write interface from fetch sm --
ftch_cmnd_wr : in std_logic ; --
ftch_cmnd_data : in std_logic_vector --
((C_M_AXI_SG_ADDR_WIDTH+CMD_BASE_WIDTH)-1 downto 0); --
--
-- User Command Interface Ports (AXI Stream) --
s_axis_ftch_cmd_tvalid : out std_logic ; --
s_axis_ftch_cmd_tready : in std_logic ; --
s_axis_ftch_cmd_tdata : out std_logic_vector --
((C_M_AXI_SG_ADDR_WIDTH+CMD_BASE_WIDTH)-1 downto 0); --
--
-- Read response for detecting slverr, decerr early --
m_axi_sg_rresp : in std_logic_vector(1 downto 0) ; --
m_axi_sg_rvalid : in std_logic ; --
--
-- User Status Interface Ports (AXI Stream) --
m_axis_ftch_sts_tvalid : in std_logic ; --
m_axis_ftch_sts_tready : out std_logic ; --
m_axis_ftch_sts_tdata : in std_logic_vector(7 downto 0) ; --
m_axis_ftch_sts_tkeep : in std_logic_vector(0 downto 0) ; --
--
-- Scatter Gather Fetch Status --
mm2s_err : in std_logic ; --
ftch_done : out std_logic ; --
ftch_error : out std_logic ; --
ftch_interr : out std_logic ; --
ftch_slverr : out std_logic ; --
ftch_decerr : out std_logic ; --
ftch_error_early : out std_logic --
);
end axi_sg_ftch_cmdsts_if;
-------------------------------------------------------------------------------
-- Architecture
-------------------------------------------------------------------------------
architecture implementation of axi_sg_ftch_cmdsts_if is
attribute DowngradeIPIdentifiedWarnings: string;
attribute DowngradeIPIdentifiedWarnings of implementation : architecture is "yes";
-------------------------------------------------------------------------------
-- Functions
-------------------------------------------------------------------------------
-- No Functions Declared
-------------------------------------------------------------------------------
-- Constants Declarations
-------------------------------------------------------------------------------
-- No Constants Declared
-------------------------------------------------------------------------------
-- Signal / Type Declarations
-------------------------------------------------------------------------------
signal ftch_slverr_i : std_logic := '0';
signal ftch_decerr_i : std_logic := '0';
signal ftch_interr_i : std_logic := '0';
signal mm2s_error : std_logic := '0';
signal sg_rresp : std_logic_vector(1 downto 0) := (others => '0');
signal sg_rvalid : std_logic := '0';
-------------------------------------------------------------------------------
-- Begin architecture logic
-------------------------------------------------------------------------------
begin
ftch_slverr <= ftch_slverr_i;
ftch_decerr <= ftch_decerr_i;
ftch_interr <= ftch_interr_i;
-------------------------------------------------------------------------------
-- DataMover Command Interface
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- When command by fetch sm, drive descriptor fetch command to data mover.
-- Hold until data mover indicates ready.
-------------------------------------------------------------------------------
GEN_DATAMOVER_CMND : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
s_axis_ftch_cmd_tvalid <= '0';
-- s_axis_ftch_cmd_tdata <= (others => '0');
elsif(ftch_cmnd_wr = '1')then
s_axis_ftch_cmd_tvalid <= '1';
-- s_axis_ftch_cmd_tdata <= ftch_cmnd_data;
elsif(s_axis_ftch_cmd_tready = '1')then
s_axis_ftch_cmd_tvalid <= '0';
-- s_axis_ftch_cmd_tdata <= (others => '0');
end if;
end if;
end process GEN_DATAMOVER_CMND;
s_axis_ftch_cmd_tdata <= ftch_cmnd_data;
-------------------------------------------------------------------------------
-- DataMover Status Interface
-------------------------------------------------------------------------------
-- Drive ready low during reset to indicate not ready
REG_STS_READY : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
m_axis_ftch_sts_tready <= '0';
else
m_axis_ftch_sts_tready <= '1';
end if;
end if;
end process REG_STS_READY;
-------------------------------------------------------------------------------
-- Log status bits out of data mover.
-------------------------------------------------------------------------------
DATAMOVER_STS : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
ftch_done <= '0';
ftch_slverr_i <= '0';
ftch_decerr_i <= '0';
ftch_interr_i <= '0';
-- Status valid, therefore capture status
elsif(m_axis_ftch_sts_tvalid = '1')then
ftch_done <= m_axis_ftch_sts_tdata(DATAMOVER_STS_CMDDONE_BIT);
ftch_slverr_i <= m_axis_ftch_sts_tdata(DATAMOVER_STS_SLVERR_BIT);
ftch_decerr_i <= m_axis_ftch_sts_tdata(DATAMOVER_STS_DECERR_BIT);
ftch_interr_i <= m_axis_ftch_sts_tdata(DATAMOVER_STS_INTERR_BIT);
-- Only assert when valid
else
ftch_done <= '0';
ftch_slverr_i <= '0';
ftch_decerr_i <= '0';
ftch_interr_i <= '0';
end if;
end if;
end process DATAMOVER_STS;
-------------------------------------------------------------------------------
-- Early SlvErr and DecErr detections
-- Early detection primarily required for non-queue mode because fetched desc
-- is immediatle fed to DMA controller. Status from SG Datamover arrives
-- too late to stop the insuing transfer on fetch error
-------------------------------------------------------------------------------
REG_MM_RD_SIGNALS : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
sg_rresp <= (others => '0');
sg_rvalid <= '0';
else
sg_rresp <= m_axi_sg_rresp;
sg_rvalid <= m_axi_sg_rvalid;
end if;
end if;
end process REG_MM_RD_SIGNALS;
REG_ERLY_FTCH_ERROR : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
ftch_error_early <= '0';
elsif(sg_rvalid = '1' and (sg_rresp = SLVERR_RESP
or sg_rresp = DECERR_RESP))then
ftch_error_early <= '1';
end if;
end if;
end process REG_ERLY_FTCH_ERROR;
-------------------------------------------------------------------------------
-- Register global error from data mover.
-------------------------------------------------------------------------------
mm2s_error <= ftch_slverr_i or ftch_decerr_i or ftch_interr_i;
-- Log errors into a global error output
FETCH_ERROR_PROCESS : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
ftch_error <= '0';
elsif(mm2s_error = '1')then
ftch_error <= '1';
end if;
end if;
end process FETCH_ERROR_PROCESS;
end implementation;
| mit | c32cd9660ef65034820e44af8b352e4b | 0.420055 | 4.954528 | false | false | false | false |
inmcm/Zynq_Custom_Core_Templates | example_core_lite_1.0/hdl/example_core_lite_v1_0_S00_AXI.vhd | 1 | 20,214 | library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity example_core_lite_v1_0_S00_AXI is
generic (
-- Users to add parameters here
-- User parameters ends
-- Do not modify the parameters beyond this line
-- Width of S_AXI data bus
C_S_AXI_DATA_WIDTH : integer := 32;
-- Width of S_AXI address bus
C_S_AXI_ADDR_WIDTH : integer := 6
);
port (
-- Users to add ports here
-- Output register from ARM (i.e. Send commands and Data)
SLV_REG00_OUT : out std_logic_vector(31 downto 0);
SLV_REG01_OUT : out std_logic_vector(31 downto 0);
SLV_REG02_OUT : out std_logic_vector(31 downto 0);
SLV_REG03_OUT : out std_logic_vector(31 downto 0);
-- Input register to ARM (i.e. Receive status and Data)
SLV_REG04_IN : in std_logic_vector(31 downto 0);
SLV_REG05_IN : in std_logic_vector(31 downto 0);
SLV_REG06_IN : in std_logic_vector(31 downto 0);
SLV_REG07_IN : in std_logic_vector(31 downto 0);
SLV_REG08_IN : in std_logic_vector(31 downto 0);
SLV_REG09_IN : in std_logic_vector(31 downto 0);
SLV_REG10_IN : in std_logic_vector(31 downto 0);
SLV_REG11_IN : in std_logic_vector(31 downto 0);
-- User ports ends
-- Do not modify the ports beyond this line
-- Global Clock Signal
S_AXI_ACLK : in std_logic;
-- Global Reset Signal. This Signal is Active LOW
S_AXI_ARESETN : in std_logic;
-- Write address (issued by master, acceped by Slave)
S_AXI_AWADDR : in std_logic_vector(C_S_AXI_ADDR_WIDTH-1 downto 0);
-- Write channel Protection type. This signal indicates the
-- privilege and security level of the transaction, and whether
-- the transaction is a data access or an instruction access.
S_AXI_AWPROT : in std_logic_vector(2 downto 0);
-- Write address valid. This signal indicates that the master signaling
-- valid write address and control information.
S_AXI_AWVALID : in std_logic;
-- Write address ready. This signal indicates that the slave is ready
-- to accept an address and associated control signals.
S_AXI_AWREADY : out std_logic;
-- Write data (issued by master, acceped by Slave)
S_AXI_WDATA : in std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);
-- Write strobes. This signal indicates which byte lanes hold
-- valid data. There is one write strobe bit for each eight
-- bits of the write data bus.
S_AXI_WSTRB : in std_logic_vector((C_S_AXI_DATA_WIDTH/8)-1 downto 0);
-- Write valid. This signal indicates that valid write
-- data and strobes are available.
S_AXI_WVALID : in std_logic;
-- Write ready. This signal indicates that the slave
-- can accept the write data.
S_AXI_WREADY : out std_logic;
-- Write response. This signal indicates the status
-- of the write transaction.
S_AXI_BRESP : out std_logic_vector(1 downto 0);
-- Write response valid. This signal indicates that the channel
-- is signaling a valid write response.
S_AXI_BVALID : out std_logic;
-- Response ready. This signal indicates that the master
-- can accept a write response.
S_AXI_BREADY : in std_logic;
-- Read address (issued by master, acceped by Slave)
S_AXI_ARADDR : in std_logic_vector(C_S_AXI_ADDR_WIDTH-1 downto 0);
-- Protection type. This signal indicates the privilege
-- and security level of the transaction, and whether the
-- transaction is a data access or an instruction access.
S_AXI_ARPROT : in std_logic_vector(2 downto 0);
-- Read address valid. This signal indicates that the channel
-- is signaling valid read address and control information.
S_AXI_ARVALID : in std_logic;
-- Read address ready. This signal indicates that the slave is
-- ready to accept an address and associated control signals.
S_AXI_ARREADY : out std_logic;
-- Read data (issued by slave)
S_AXI_RDATA : out std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);
-- Read response. This signal indicates the status of the
-- read transfer.
S_AXI_RRESP : out std_logic_vector(1 downto 0);
-- Read valid. This signal indicates that the channel is
-- signaling the required read data.
S_AXI_RVALID : out std_logic;
-- Read ready. This signal indicates that the master can
-- accept the read data and response information.
S_AXI_RREADY : in std_logic
);
end example_core_lite_v1_0_S00_AXI;
architecture arch_imp of example_core_lite_v1_0_S00_AXI is
-- AXI4LITE signals
signal axi_awaddr : std_logic_vector(C_S_AXI_ADDR_WIDTH-1 downto 0);
signal axi_awready : std_logic;
signal axi_wready : std_logic;
signal axi_bresp : std_logic_vector(1 downto 0);
signal axi_bvalid : std_logic;
signal axi_araddr : std_logic_vector(C_S_AXI_ADDR_WIDTH-1 downto 0);
signal axi_arready : std_logic;
signal axi_rdata : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);
signal axi_rresp : std_logic_vector(1 downto 0);
signal axi_rvalid : std_logic;
-- Example-specific design signals
-- local parameter for addressing 32 bit / 64 bit C_S_AXI_DATA_WIDTH
-- ADDR_LSB is used for addressing 32/64 bit registers/memories
-- ADDR_LSB = 2 for 32 bits (n downto 2)
-- ADDR_LSB = 3 for 64 bits (n downto 3)
constant ADDR_LSB : integer := (C_S_AXI_DATA_WIDTH/32)+ 1;
constant OPT_MEM_ADDR_BITS : integer := 3;
------------------------------------------------
---- Signals for user logic register space example
--------------------------------------------------
---- Number of Slave Registers 12
signal slv_reg0 :std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);
signal slv_reg1 :std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);
signal slv_reg2 :std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);
signal slv_reg3 :std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);
signal slv_reg4 :std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);
signal slv_reg5 :std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);
signal slv_reg6 :std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);
signal slv_reg7 :std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);
signal slv_reg8 :std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);
signal slv_reg9 :std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);
signal slv_reg10 :std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);
signal slv_reg11 :std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);
signal slv_reg_rden : std_logic;
signal slv_reg_wren : std_logic;
signal reg_data_out :std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);
signal byte_index : integer;
begin
-- I/O Connections assignments
S_AXI_AWREADY <= axi_awready;
S_AXI_WREADY <= axi_wready;
S_AXI_BRESP <= axi_bresp;
S_AXI_BVALID <= axi_bvalid;
S_AXI_ARREADY <= axi_arready;
S_AXI_RDATA <= axi_rdata;
S_AXI_RRESP <= axi_rresp;
S_AXI_RVALID <= axi_rvalid;
-- Implement axi_awready generation
-- axi_awready is asserted for one S_AXI_ACLK clock cycle when both
-- S_AXI_AWVALID and S_AXI_WVALID are asserted. axi_awready is
-- de-asserted when reset is low.
process (S_AXI_ACLK)
begin
if rising_edge(S_AXI_ACLK) then
if S_AXI_ARESETN = '0' then
axi_awready <= '0';
else
if (axi_awready = '0' and S_AXI_AWVALID = '1' and S_AXI_WVALID = '1') then
-- slave is ready to accept write address when
-- there is a valid write address and write data
-- on the write address and data bus. This design
-- expects no outstanding transactions.
axi_awready <= '1';
else
axi_awready <= '0';
end if;
end if;
end if;
end process;
-- Implement axi_awaddr latching
-- This process is used to latch the address when both
-- S_AXI_AWVALID and S_AXI_WVALID are valid.
process (S_AXI_ACLK)
begin
if rising_edge(S_AXI_ACLK) then
if S_AXI_ARESETN = '0' then
axi_awaddr <= (others => '0');
else
if (axi_awready = '0' and S_AXI_AWVALID = '1' and S_AXI_WVALID = '1') then
-- Write Address latching
axi_awaddr <= S_AXI_AWADDR;
end if;
end if;
end if;
end process;
-- Implement axi_wready generation
-- axi_wready is asserted for one S_AXI_ACLK clock cycle when both
-- S_AXI_AWVALID and S_AXI_WVALID are asserted. axi_wready is
-- de-asserted when reset is low.
process (S_AXI_ACLK)
begin
if rising_edge(S_AXI_ACLK) then
if S_AXI_ARESETN = '0' then
axi_wready <= '0';
else
if (axi_wready = '0' and S_AXI_WVALID = '1' and S_AXI_AWVALID = '1') then
-- slave is ready to accept write data when
-- there is a valid write address and write data
-- on the write address and data bus. This design
-- expects no outstanding transactions.
axi_wready <= '1';
else
axi_wready <= '0';
end if;
end if;
end if;
end process;
-- Implement memory mapped register select and write logic generation
-- The write data is accepted and written to memory mapped registers when
-- axi_awready, S_AXI_WVALID, axi_wready and S_AXI_WVALID are asserted. Write strobes are used to
-- select byte enables of slave registers while writing.
-- These registers are cleared when reset (active low) is applied.
-- Slave register write enable is asserted when valid address and data are available
-- and the slave is ready to accept the write address and write data.
slv_reg_wren <= axi_wready and S_AXI_WVALID and axi_awready and S_AXI_AWVALID ;
process (S_AXI_ACLK)
variable loc_addr :std_logic_vector(OPT_MEM_ADDR_BITS downto 0);
begin
if rising_edge(S_AXI_ACLK) then
if S_AXI_ARESETN = '0' then
slv_reg0 <= (others => '0');
slv_reg1 <= (others => '0');
slv_reg2 <= (others => '0');
slv_reg3 <= (others => '0');
slv_reg4 <= (others => '0');
slv_reg5 <= (others => '0');
slv_reg6 <= (others => '0');
slv_reg7 <= (others => '0');
slv_reg8 <= (others => '0');
slv_reg9 <= (others => '0');
else
loc_addr := axi_awaddr(ADDR_LSB + OPT_MEM_ADDR_BITS downto ADDR_LSB);
if (slv_reg_wren = '1') then
case loc_addr is
when b"0000" =>
for byte_index in 0 to (C_S_AXI_DATA_WIDTH/8-1) loop
if ( S_AXI_WSTRB(byte_index) = '1' ) then
-- Respective byte enables are asserted as per write strobes
-- slave registor 0
slv_reg0(byte_index*8+7 downto byte_index*8) <= S_AXI_WDATA(byte_index*8+7 downto byte_index*8);
end if;
end loop;
when b"0001" =>
for byte_index in 0 to (C_S_AXI_DATA_WIDTH/8-1) loop
if ( S_AXI_WSTRB(byte_index) = '1' ) then
-- Respective byte enables are asserted as per write strobes
-- slave registor 1
slv_reg1(byte_index*8+7 downto byte_index*8) <= S_AXI_WDATA(byte_index*8+7 downto byte_index*8);
end if;
end loop;
when b"0010" =>
for byte_index in 0 to (C_S_AXI_DATA_WIDTH/8-1) loop
if ( S_AXI_WSTRB(byte_index) = '1' ) then
-- Respective byte enables are asserted as per write strobes
-- slave registor 2
slv_reg2(byte_index*8+7 downto byte_index*8) <= S_AXI_WDATA(byte_index*8+7 downto byte_index*8);
end if;
end loop;
when b"0011" =>
for byte_index in 0 to (C_S_AXI_DATA_WIDTH/8-1) loop
if ( S_AXI_WSTRB(byte_index) = '1' ) then
-- Respective byte enables are asserted as per write strobes
-- slave registor 3
slv_reg3(byte_index*8+7 downto byte_index*8) <= S_AXI_WDATA(byte_index*8+7 downto byte_index*8);
end if;
end loop;
when b"0100" =>
for byte_index in 0 to (C_S_AXI_DATA_WIDTH/8-1) loop
if ( S_AXI_WSTRB(byte_index) = '1' ) then
-- Respective byte enables are asserted as per write strobes
-- slave registor 4
slv_reg4(byte_index*8+7 downto byte_index*8) <= S_AXI_WDATA(byte_index*8+7 downto byte_index*8);
end if;
end loop;
when b"0101" =>
for byte_index in 0 to (C_S_AXI_DATA_WIDTH/8-1) loop
if ( S_AXI_WSTRB(byte_index) = '1' ) then
-- Respective byte enables are asserted as per write strobes
-- slave registor 5
slv_reg5(byte_index*8+7 downto byte_index*8) <= S_AXI_WDATA(byte_index*8+7 downto byte_index*8);
end if;
end loop;
when b"0110" =>
for byte_index in 0 to (C_S_AXI_DATA_WIDTH/8-1) loop
if ( S_AXI_WSTRB(byte_index) = '1' ) then
-- Respective byte enables are asserted as per write strobes
-- slave registor 6
slv_reg6(byte_index*8+7 downto byte_index*8) <= S_AXI_WDATA(byte_index*8+7 downto byte_index*8);
end if;
end loop;
when b"0111" =>
for byte_index in 0 to (C_S_AXI_DATA_WIDTH/8-1) loop
if ( S_AXI_WSTRB(byte_index) = '1' ) then
-- Respective byte enables are asserted as per write strobes
-- slave registor 7
slv_reg7(byte_index*8+7 downto byte_index*8) <= S_AXI_WDATA(byte_index*8+7 downto byte_index*8);
end if;
end loop;
when b"1000" =>
for byte_index in 0 to (C_S_AXI_DATA_WIDTH/8-1) loop
if ( S_AXI_WSTRB(byte_index) = '1' ) then
-- Respective byte enables are asserted as per write strobes
-- slave registor 8
slv_reg8(byte_index*8+7 downto byte_index*8) <= S_AXI_WDATA(byte_index*8+7 downto byte_index*8);
end if;
end loop;
when b"1001" =>
for byte_index in 0 to (C_S_AXI_DATA_WIDTH/8-1) loop
if ( S_AXI_WSTRB(byte_index) = '1' ) then
-- Respective byte enables are asserted as per write strobes
-- slave registor 9
slv_reg9(byte_index*8+7 downto byte_index*8) <= S_AXI_WDATA(byte_index*8+7 downto byte_index*8);
end if;
end loop;
when others =>
slv_reg0 <= slv_reg0;
slv_reg1 <= slv_reg1;
slv_reg2 <= slv_reg2;
slv_reg3 <= slv_reg3;
slv_reg4 <= slv_reg4;
slv_reg5 <= slv_reg5;
slv_reg6 <= slv_reg6;
slv_reg7 <= slv_reg7;
slv_reg8 <= slv_reg8;
slv_reg9 <= slv_reg9;
end case;
end if;
end if;
end if;
end process;
-- Implement write response logic generation
-- The write response and response valid signals are asserted by the slave
-- when axi_wready, S_AXI_WVALID, axi_wready and S_AXI_WVALID are asserted.
-- This marks the acceptance of address and indicates the status of
-- write transaction.
process (S_AXI_ACLK)
begin
if rising_edge(S_AXI_ACLK) then
if S_AXI_ARESETN = '0' then
axi_bvalid <= '0';
axi_bresp <= "00"; --need to work more on the responses
else
if (axi_awready = '1' and S_AXI_AWVALID = '1' and axi_wready = '1' and S_AXI_WVALID = '1' and axi_bvalid = '0' ) then
axi_bvalid <= '1';
axi_bresp <= "00";
elsif (S_AXI_BREADY = '1' and axi_bvalid = '1') then --check if bready is asserted while bvalid is high)
axi_bvalid <= '0'; -- (there is a possibility that bready is always asserted high)
end if;
end if;
end if;
end process;
-- Implement axi_arready generation
-- axi_arready is asserted for one S_AXI_ACLK clock cycle when
-- S_AXI_ARVALID is asserted. axi_awready is
-- de-asserted when reset (active low) is asserted.
-- The read address is also latched when S_AXI_ARVALID is
-- asserted. axi_araddr is reset to zero on reset assertion.
process (S_AXI_ACLK)
begin
if rising_edge(S_AXI_ACLK) then
if S_AXI_ARESETN = '0' then
axi_arready <= '0';
axi_araddr <= (others => '1');
else
if (axi_arready = '0' and S_AXI_ARVALID = '1') then
-- indicates that the slave has acceped the valid read address
axi_arready <= '1';
-- Read Address latching
axi_araddr <= S_AXI_ARADDR;
else
axi_arready <= '0';
end if;
end if;
end if;
end process;
-- Implement axi_arvalid generation
-- axi_rvalid is asserted for one S_AXI_ACLK clock cycle when both
-- S_AXI_ARVALID and axi_arready are asserted. The slave registers
-- data are available on the axi_rdata bus at this instance. The
-- assertion of axi_rvalid marks the validity of read data on the
-- bus and axi_rresp indicates the status of read transaction.axi_rvalid
-- is deasserted on reset (active low). axi_rresp and axi_rdata are
-- cleared to zero on reset (active low).
process (S_AXI_ACLK)
begin
if rising_edge(S_AXI_ACLK) then
if S_AXI_ARESETN = '0' then
axi_rvalid <= '0';
axi_rresp <= "00";
else
if (axi_arready = '1' and S_AXI_ARVALID = '1' and axi_rvalid = '0') then
-- Valid read data is available at the read data bus
axi_rvalid <= '1';
axi_rresp <= "00"; -- 'OKAY' response
elsif (axi_rvalid = '1' and S_AXI_RREADY = '1') then
-- Read data is accepted by the master
axi_rvalid <= '0';
end if;
end if;
end if;
end process;
-- Implement memory mapped register select and read logic generation
-- Slave register read enable is asserted when valid address is available
-- and the slave is ready to accept the read address.
slv_reg_rden <= axi_arready and S_AXI_ARVALID and (not axi_rvalid) ;
process (slv_reg0, slv_reg1, slv_reg2, slv_reg3, slv_reg4, slv_reg5, slv_reg6, slv_reg7, slv_reg8, slv_reg9, axi_araddr, S_AXI_ARESETN, slv_reg_rden)
variable loc_addr :std_logic_vector(OPT_MEM_ADDR_BITS downto 0);
begin
-- Address decoding for reading registers
loc_addr := axi_araddr(ADDR_LSB + OPT_MEM_ADDR_BITS downto ADDR_LSB);
case loc_addr is
when b"0000" =>
reg_data_out <= slv_reg0;
when b"0001" =>
reg_data_out <= slv_reg1;
when b"0010" =>
reg_data_out <= slv_reg2;
when b"0011" =>
reg_data_out <= slv_reg3;
when b"0100" =>
reg_data_out <= SLV_REG04_IN;
when b"0101" =>
reg_data_out <= SLV_REG05_IN;
when b"0110" =>
reg_data_out <= SLV_REG06_IN;
when b"0111" =>
reg_data_out <= SLV_REG07_IN;
when b"1000" =>
reg_data_out <= SLV_REG08_IN;
when b"1001" =>
reg_data_out <= SLV_REG09_IN;
when b"1010" =>
reg_data_out <= SLV_REG10_IN;
when b"1011" =>
reg_data_out <= SLV_REG11_IN;
when others =>
reg_data_out <= (others => '0');
end case;
end process;
-- Output register or memory read data
process( S_AXI_ACLK ) is
begin
if (rising_edge (S_AXI_ACLK)) then
if ( S_AXI_ARESETN = '0' ) then
axi_rdata <= (others => '0');
else
if (slv_reg_rden = '1') then
-- When there is a valid read address (S_AXI_ARVALID) with
-- acceptance of read address by the slave (axi_arready),
-- output the read dada
-- Read address mux
axi_rdata <= reg_data_out; -- register read data
end if;
end if;
end if;
end process;
-- Add user logic here
SLV_REG00_OUT <= slv_reg0;
SLV_REG01_OUT <= slv_reg1;
SLV_REG02_OUT <= slv_reg2;
SLV_REG03_OUT <= slv_reg3;
-- User logic ends
end arch_imp;
| mit | 2318bb6b3b984fbfab6de20aa4dde740 | 0.593945 | 3.414527 | false | false | false | false |
szanni/aeshw | zybo-base/zybo_bsd/zybo_bsd.srcs/sources_1/bd/system/ip/system_auto_pc_5/fifo_generator_v11_0/builtin/fifo_generator_v11_0_builtin.vhd | 19 | 49,663 | `protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
MxpeY9fwU4EddFSpExWohS5o9i8UPinR6kQv/f7rVpVjW9v1XPHFNv5NQBBqnxbGk/3GroOhKYHi
zeZXd9sb8Q==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
genV68U/jEyVif/FXdfTRcDdNLXMaB4JkzDnEPHISJLebDAxHBqab4xQb3vzSMzS4EZxJxM3czS7
l6/Pa+/lUNH4iHFgH3/d34ImoXy9UrVsNWI4O1k56f8CO5JZkX0ENM2JUr2+jZNnrmepHCpz3pyr
N2xknPLUPWomWT5p45Y=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2013_09", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
4dyOi6X0ND7jxJKLfQYpMzBQUnXRUvqhIlWd2qdz2OgGY9VUivCAp2239OkMu2rIWSpkdV3gd8Tn
4E+XnpveIi4nHAn1AdqR2yW6qJRqYI/CpvcG8E7ZhuUiWSAPiQ/jcxRmeyzLFdVhgEV4hed5vk+9
Qi0C1DUHqDNPvc06f+xZUSTzBSqXkxyUqGIa+j3ZmCrjq04hmRDILUEkjqmR0K0TOLNdsLd81gAl
LqIfeuzK3hLcVWnnJG54RzS/q6bahPN8UaYhtJREcAC9BD1S+QEdDXRxFczj2T1LQBL5rSryR8bI
LV6YqNl+85SCCMZmZV8Io9S7fDVIrhzNm4Kcmw==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
PIdLn+S6alHzFt/ir7zZvMPdMeYQTL6BrWSuIGxsOazGugSdn7m2jtyII74LXXAGUQ0h11spxnUf
W/HpoHHxg6pfmAZclwmfvLsFiVi0w0hNMmIWoR8TGPdAC93Y5+aRfoAJNuDfUDfLzdBM4O7G2ZFx
YGYpvBcNhzcFFuSCCK4=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
KkGw0OOEdMUjhZKEmICwPPGTbEeQxk+K4HH0ah7Z5cm5dbbyDDJyn1CdBy6WY7ZD/SXDbXp0Ibi6
BH7Y9BzUsE3rhTUVWQo0OMHXc+hE0CnmrdIq6Yy3Wkf73IKl+pu+66Qo9W7SdJGNPpreGME4X4AM
zBwAv9xByRwGoY45EIIGTaE7VL15piKgLihjK8Y2Ee8q921qHsI62b9osdj+stH9M0nIgGIwpsIA
DiUOa8Naw0kRMS8QCXDqKr1fJ0jPj3cnclvP9Taz8J5tp8Sf8I6bs8irg+MGD1MgQIfeKkimA5VH
MerNz8gbn3+/Vz2X2+nKanM3LebAMLyCO8EBfA==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 35024)
`protect data_block
CjDiOg1OOWaCAImu7V6e17mSTdTG2VshsQC9TgLVgEdt6LRfbWLFj7pjliLiaI75jL0DarVVZgIB
YBxEiViEXJlBW0IDp+HN4/r03Ji75adj6JPgX/zTVva61hh2R45tKi+4cQj4r2XZGM6xGu8u02BO
7JM1KptVa0q6XfKxOCC/GxzgVmjiw7cJ36bA6JopQxHWJu8OYGv84q09mD3akYnNi5S8Wbp6zMAt
Fvpvaz+d8Rgc2qy70/QeE4cM3Jn/H6O2e5WbExJNTitRy53P2ux9mweTwPS/iui87euYB4mUJizQ
fAnUOoARGGl+FhwvQpZRvegPkiOWzWibLQrU3a9dBDHMUUU+wlUjtWs/UUGRoppRSc+j5BGfHJoZ
6/Ai/2YSXvVXYocBD/mIuZChqg/cutPhK7QniSuMh7QYsxKPmyoLYGzps6wXbL0jPflW3EXnqHcL
6NahK/uZmHZXv1GV6zWmXJVxnOSogHECehFF8pFHCdQfmIv2+oPOYNDJ16OI1xOO28KLkyC1RA16
FGq/fX3qUyP4pNmB3NB8JoY8HU+a5YlLMp7ezOzVYAe2b+h9MQqTRSymbFX/6wMzXJcgdDP79r+S
gMHkKaBrSSOHwDLDRWtwtMAt12FRq+Wz0AYPwgDclNLgHl10TgD+YRY0ygb6tkv7GBodGwuwnrIv
wtS+iXpgfqThuu7vq62DyAIRt5P7fhng8kq+GX4KFAg0hpJHW2bF3E7kZfGFpnZOjHLnScBtZhR2
NQtIeVlNK0IR5WvSzLisVu0tDFN4r+UdCKkWufiyxIK9gJltkaLvadDOKmp5fzBbiQMO8MmPHep9
+J5hQg/NXPApofjVCl2rGvKjEWq+6vs2SksdQJGzn6vFwdnnjj1iSnwMmsPiJdCRPGdKabemHE+u
2lXOJSccA0UHWqgZW+5IAjKBpdRPEAeaZt/QW55KrQ2Zaspfap1E5tCl1byiL2MiUDLSoIoudTnq
po+TjHy38Cbz2eZgpcpI0YBPPbQ8ZSztLoi6sXwf1314L25lHn5v7/xpubVkufX2SmlXTnuRzl5O
Ws2Q3SbhbaiVdpmS8jH2TJnyeKafusuV04azcDoTzmeNRvWHW9lj9CqY1uYGXdqc1K5NrmlSn8eA
sJgRqoyuoMWOw3N/Ey9Ec3knGhF5WNestL/DuBGbiQD59Ar/4kn7fZLpuTjUinwRtiQSA94LlaIU
W/kFS0Db3sNDCX+s0XiT2snOR6bHCS1K2vJn4q47/nTzzeLLCsFc3mtfAl6/AgGbtn6ZeEhQ9kve
HzReJGiat5ld1OQpGrSOQ/V8FGaE/44jtCjZsgWkYnFPwNQYGOwclAF2XNbxXJbBGcuNfJNMBYjb
2saWlCNJPra/Q/vOI3yf2wpiYIPmUeAXQYfHbZTbgf0M7rDeHeG8QGwjtnHlfMzoYrr+xnx1MW6+
5vi0ohns6fP8SZeFyboBmOfR1Dn83YRks4FLCDjDlXHYw3umsH3DSe8484EPHTRAPqvfFKglyaxQ
pg5kji86h8HoQp22VlxJg2XB4U8c/waByP0t+/S0rjuSz1OE+jWGm1s9uRDKdrPkqpLz2jMTdCsR
h1Y5yPl1jTy2HSMAonPv3PAZAHVLcrvvK2RtzV46yLci+tv2SRsHdo7NBERiUbe/7KnwgcENHUAH
3TWwTvt1VuXOWDEsyHcMXvGRebaEuhJ3gnJLKdzc+ADop3JwB3ZearpNI9mh/et3G5lW1zh7fEXY
54zzhTI4kWJfnM4cK5am49ZmSTnj/Otn6XBYvgz0QVGD20dJv/pWgKU7XUoM5QgSHWh0p/PfvHUX
NHk+z0KyX9wAIALM13iVk+PIwxvOMalNt96dR8j5VkqY9uQG6ZL2uYF7oEXnMnXYUTd/UB5kSx48
vPcT7+MARl4pnPwJ3aFy/qQARFPCvHccqdr+ofYqkLf/Y71LC3PRoWgU1wwXGn+FYtm2wIniAADG
3qiZaw2iIMivZQHu4ldi9X/N05HeheqJucKjVF6XStklJtk74lVfxwieZLD0ZzkrRMXVYujjDahA
i4GaDGKHD6u4Jgc3GFjOeSXNhU9A1G1W301SEIXfmgs3+L1nbPDdEOtVqTpvuaYGhE89WS89Bn+u
wpR9Tk8PjzpfYurw3wut5QIDSxDH3yQKLONuhXyWschwKwrxAFyuS5qrD411bOdNdlsbHHNiD/Fw
6zxLUprJ8wMvO4kreJGLkdMUGdzrNECdmPVapfAugwFzKDFDdZ7b8+WwOlAwKZO2zeyY1GMAdqoM
aePhD0zK8IfWyzLJHFo9SxfW1fmayfYoAgmTAt8jwV6uF8P5HZ33B0XNDjU3GL+mNvFJ3XG6UWj2
zL3V71tx1lz+xGToeW7aOC6AiTTCxOmb83axS7KlmcMFZ8a8D3yheRYoPPfqej5QHGggdxt63V++
/3aofWpAAmf/ACTyPCavW6UJpTPFCNkY+YkJuwWEpdDZdey1wkYWAkrdH2zPI5cx+OVuv+araI6n
a1txZN6OEA28mvnxUbFc+ojCNMa90hwZ7cbCFY5H0heI0TkG06BN1b34AMHFIB1JnIahyDW+t4RM
KluNsPy1oDaYkJiZpf7UjfnZ85dWcY8IbF9NywxsrE9ZJEciq32AGmmLLCVRVwd2WTEofKasyxqU
IbzFeBjIaeH2pGTWx7Xdne6fXhMXcPwG2WcwDC7S/j7cytASYWDCyY7h24iCw+Bth9f0o9OsTrSj
pqeck7zDNgMPNn8shMuChZzOSbbgYY1U3XyEgInBMIoboVqthmCqwWp68kbFN1Rqdu8VsmoXrJS9
kCFDms/MWpg+T7vEleAWIty4YJQmIBCGLMrtfOsEiLcGvKKL/+ofJcrm/qZyciHZgFpl+yMCwJn/
uSnHV5cuBDDBNeB8FO/4I9pjEfLHDUWgIDlScBls+9sU+c459uQJhr0TGOtiDIs67+xvT41PrcEj
CSwJspprPaOj2Vx8I2NjYXuVrerx/XnztZRouoOzcbhc1JQjUudUhBYFu2dNy38Rks5w3/V6xSEt
2eouDEMtgGR9tmk+nEC5vmIm/rymCnSby0+WmB63CgMOJxfK1P0s9uuPRU1xYWDMC3YkL3uoPtAf
ulxei19uZ4DsAaX2THkonT9VKOiKF8TQqWPKudKMvJFCYQF72JVSM2SheW36LLra6BwaZ9DKwHKJ
9QGbgKlJnkc28JehPCy7+xAtoGxWBbiJOzsG0kNwYJ9c904Txg/C2KpJu/1/IJvWvZyWrfc0MSKb
S+yuK65msGQOo/kZrBA3LiR3DmqlJqGvUPZaTA3NusHX22IgCZyAQ7ncwNf49/xFz0nCYXiQKIPQ
F5xy1lkbFQmrOE2VsjhtbfypCIe18RlY3alv6la0hcFN47h2wW3pQEz/HCYVQa0dwoZE6stkMQkN
HYWBBwJfY32K3y4VnIaj/5My2dYvqflDG+k5+MIo/vK5eK1r55OuMVPrdSf3vTQhz/q6ynZn1cLE
ZTTWykcudtDAYYifFJL0zZYo0Iv0U0moAWD4fKd+Z1Z+XwoJFYYnPrwb65nC/NikCObDJuCuTSTh
/L39PzFEXNBcg5Z9joqD6i+qgDOmsKy4qLmc6q73CgOjne928FlWXeJleZHd0TaW9cetZjNjVKPJ
g9N5rWIjguuHN2T0AEarK78opjVfPNqivcOuAlUDKzEzxVc3wN7r6tkhmRvi1oLg/mVVz4mvpjgM
H/8AWHE0FMtXShPpIrB87cxrD7Ov/umK0FEJ2SpbEcXwKsvApu3XrvRdlIzRvgN7Q4tIW1+UfXU6
XXX2xXOXX2nMhmIUXIgMYdiAXSoig2jwUnyNqwv4HRo1fbT7DfSLlQ6du7GCsuWIvTlj1gHulg9g
WVUJTZFqm9tp97qKzsvYDC6da8stu/RIJ1p+ODH/WWBM7phkIQ9UlOv4/NlsQne40YLRYzxhDh3f
pvLcGRpBxeqi3omXs+rf9Lbv9UnJ7WZrDkHhN5YlCdAd89L4kEkj1rBw8DVuTwXqcR8kqMlR0cnT
VT84kMq1nRqdH7eRvoxbcAK5LX5vV1mPCfqY+G2Y29Qp8wUB6071Ke2kZn+8N4vFjiD/AbWRidzk
KCnPCBsBw0AuflXwcZ0t1Y+Xw3wRUi6ym3gyoXpihVyceeCEvr5HVfzjGLfCg18oJ6Co6gwXKUhy
87ZO5u+fvalkCTKko0QaREFpIFn/vHZ6zPgU9eyvOQNJEjz65xPbN5PCn4CsxHWBEqKxkDDkh2+S
FqNZYCmLwJNiZ3X5F+WZ5RfNU0V9t9QnJQtgmudRqLkx7BEsoL89g9xSZd/lcuaS3fd7qpoQVopt
6tDVnHtQErVmjz0CWPm1IduJ5AR5QPGg4Yl15TStSKkZgGs/v3SFQCP0FNQh620Fp7oCd0lIxd3Q
vjWF0a8Kpa6VJulI5zz4Twb2Srl0n+6stvZ4X1xGbRhEW7arTBbVbVZelsXECGFWf6VODAjLieag
P0Ys84DReKVWVpgrnUasG5jpPc2PntUMTtULLI/pq4yjgXpfzQ36u4CT6iBIcNGRjyuLcQLu4Szn
uQGuG/K35tMociCbsgzGUrN5uw7S9hjvYCMXPfhgNSXByJjKmIq4UXJu/PuHdxhM8TXoE7dkgSSC
ZUejYvy//bc86fn+u1DeX68hzxzj8E+zvXAaqZOyIqi2sdcIhTBRfble5KnMB2A9xeApCYZXQuQZ
YlJpE8AUk9kmGLlZhwcNX7I3dgxp7UYgPMOVJliJ2wQ+3V2A9zm+criT+X8pU4IWZTT6IIZHfkpb
dnh9lAHNz7lwV+/wqLNu0yPpD6lvgJz6CfTh1wjndV0IW/LQ6zcqXvIXHc0wZxrI/vDHoRfIBolu
cMwe/R8p+fr2IriqpoJAUVC5lLEz9LoGCXIu+5A5C6mabWfoJLWGea5nynpzY6qVmYhw8ug4cB4n
nFSS35gI1dNY5BVGvpd/8Vl1J+iX7MxB0pL0xyb9s+5Xs8uNzhPxJjs4jq+F15Zzm+PL7/krJKgW
SGwQ+u08yedL/Mkp/ovTXgN+qad9YqXe+LQPvfX5SFZuJ/V4L4of8ImrIZeS1cplq5vvC2hVpNd/
Zlgc6cj6sAPy4mK/W4pY82Qc+hjtBT4TkgpgBxjRZ8FuuovV9mN4AErs26fyZcyvuIm/L/PNPM2n
hb9sC2FfGB+Hq17PzMHldXWZZsoEuwx86Jek9K08NCqO9GHq3NTxRvwOiz18b4FnhhGFNVzItAD8
IPPJz643Qv+LKbTpK78hB2LJEJsoEeAWgJ4W+2sWUOwee6x/+bI0jZLH4/MzK8Y6UvIx0OZ6YeTx
f+BsBABZrduceyvhFWc9jr33XWlcMgXJpOelJw56PHKinM1cwMnwagC3HwgMdCZXsNHo4aoFFiVm
fT+slQP8Y0HQcOxj80nahSFwnIuU2rI8ijHbJIwdD41EaNnQAQS0EUYbmvMLaX3bie5Y5s/XWzWu
dLlLZ3e8yngG88BplZgPhM48QZ562r1qGrMfARpc2tYHe+XkioMMsZttqfnjmOz0ZQdsPT/lPF8M
/MQQoq6rx40kzcWHRVs9WAMrp5FQze3A2mkni3iVktGYfrcUGmItUXPQ1EkfplFBjsrNGzcmoVz0
zpwFiyLVl2tQ41GAT5E5g3F7J2geCPVrhqI4SBhb9FW/3qETuzCPtRVvJ7KCO3LzzR4i9zTPgxa5
OjkH5PBrOtCFYfSn8rig2sQCHvkwYEZYa0WgpOHN1H9r4kMmdOGIgQd7kfAYT8AkwPl+tZFJbTlK
b2M8ZbFGOqE5fgED1U1kxkL9x0sfJEc49B44cE1dQkKEiFFlad4nRsCorEstdeVsEywhkXeFWRDc
o6fRQzCxt/H1xuXO58AoB1TbzfaP5mmedP7eq400bI9dTuXEwoFUAh8gy7iBJOP72gyUPoo9xySL
k9ehDOUo4RhyqrpurYYUWFJofe3T826Pol9+q4mwdl47Bxzry2cd2lvIAN0/S76RI9Ddo3pWhsov
Hrtvmwedsm1C+CoGGVEo0r6/5PHf+7HpUqHWCfzeVm8/KPvc/cx4mZMs2SgeOaIq5rMC8sNT2ZGP
T78OgUubDxGhQWi3i/8N4yRxaXDU2eUXEsZ8PtufN3AZuv5ZegTauluoLNJsrFpl46stzCakFkwA
Ak/b5IDZkkL/tmfsswTUpVRAS14SUiRZcTsndwchfjWkvPAIdJsPFjIv3cVRWIMi0HO4xmqzQikD
4qXUOS8VjZCaGtXBMP1KTLg/o86PtCmlTplaraWCaUzLxYZN7iO6JKtLgB3HsQZ8Z/+vOc7SJGe8
F81QKvgETBykcBGaASHgfJ5I0PZVpQmn3PTFCu4+ntAgp+IeM2cYOxtVYtQHnoIT0OKz2n2Syq2Z
CusS2UYLNeF9VbhnXcMcGLf3SAQ7oASFg/YCFy7jff6temCyLeJHyWGmWu5GV/YPruzcXpgin5fa
SVfl8kp+TYhSTxAJyEE9OpskbvUNlFPBJhoKj9ef9Zi1PQM6hgWRj+/DCjq0GxK2uQbMmCaoVj1E
pmAsD5GUsEUV67bl0aKxB8IiT69VAdDpF0x7IY3mre8U0qmo0Y4cLUmATVM4DkISJGcDAg9zkkGt
Vwr1n5uGDblr65VrxftUBxi9YtGSnzfEnnEBd6wPAuUz1z8hK0mruFlPjCf5BLcJrNfUB3TW8HNk
3cK6iav3CdeLLmbhZ6IWQ0imWNkmVwo+XDKT61DQGMUg9rXNLzCcsX1hkA8WbYjTc5hHht+BwAAK
oHsxbdGG1lxc7xTi5kOsjRTWBf97T9gGbPYN8HLq/9YF7m72CLlUA9dSp4xrQTm4L/lbdpglmAZT
wn2G/x4Y89FKlTGhBLZyQu0Lwd8xWAV+Ez5htylBslV++eBomLJ3lsxc3ZtDCIclOFlWaMc+z/Qw
Gt1OZj6URC/bB/pscNYmuhSvZYoFKgB1fbS9W6NVzQ3UaSiUsjbQIVIrwFWAYfDu3LoeVJtDTFB8
CfXvU0sBEJht2nLaXfh2ks5WcFdUVSFfIrTDeyLYXCGOattQDjsSf/wAVn2WM081F9nof6YgCsxY
NTCs1mTM7DIrOHAigIbkF4DZQOXRms8qsQ29VbJizGiTrsS4tdKFGGZ7HDMgaakXGmSQMiCCc6lI
fGc+Gq0wbeOUBd5LM4vk0WfutEi8xJ96YtkqWxI+gfA6vHpfEpAhJdGoTIVrklYrsbzm0HtHBuMa
QW/7wGA78RewSUBhjm5PPnRFffQzNlJ6IlyGrSVJY8FXphMi8rU3YT3TZ30+ODKUFKnckVjVs12I
W25wrZ4kBPEqkmGuR56PAwSVYQQ2ltQ0YJYkcsXUSNVg6tsGo8yEAgp2hgpS0QSGpW56BFGFiae2
KV8Nmprgmi2Hp6Ax0U+1KihuGF4fdGPS3LYuWyy1udeTEwkCuemhhgWp8XMW6Snj8LNYFJZfEySL
IgLXMRkhG5xFSLV3a7zkRrRMb3JHAzuIXbkJRNk/N3pQeBd8si3Diyd8/NIdZxruk9pGU+1ljKc5
G1OgQmukyDB1kPlhHew9FQjLvoFhVeHVraJJXO8UMlzVnLk5h73gfDGx6iN/xu8mJiWYt0+eWPW2
4hYaL1ltlVllEgQozbx5MhEQHWiMTAjrXmURkMXDIpTPpoT+vY8rikqztUnmCfdXuThDxDa36kWe
vAvgwaOUU6X0Ts5R0EeKVJA/7FwtrLWIIh3xNfgGy2A0g58DZOsHAGAWAFkUhNJ75drgy5Llb7Ko
lbZwBeyUGmfEFtFzBeLNQl6kyDt2A/Vf1mFJQQy40+SIFfnbzdpLFlN2wfqSpOwwjHI3sXz08K6k
j/4XkUdhFO7qTtAkwacTAM3lvgTZzZtf9nPAA/ZyQKeKkGomG+H58ZSOraP2J6VAmZnKI1MP9v0l
9HzyfA6O9tmQelsZg63np50w9WBJgj66W+DOXYIaQXNHb8PyMWwdWfJJd0lucl8ZKt05kj6DPngL
QHUbjYMOFNYVXStKq6dBEVIo8QIIT35BhQJ1muG6S9EtZn/rFE5IfisGL5+nkx9aHWm2seIRSpUc
Qe10RU/0wp4bzoB7/JwqqsPvwzyldlf22Vkwl/zirio96rWXx2+v7enqHYiGkG5gYXyHbZpoZKFM
R6mocV0DLRDfSTLgt+Uo/uCsGSL4idy2VUKYxvMEPVmB8ALcs3Ff2nlN6i3eEFepf5LKySXeb+k0
HWKcb3Qu64TuPNtvVfM/RYnxuWwwVQBejKxmE3FLXXCMOHeBJuwN3Qlrkm3LSBsau25dw/h5gXaF
X6+1dZalO7WTI91aBFWbqKaWP8CyhpxtuD/3yL1iNisfE2NRmynSJAvlgX5248dRb4YIm9m3blrc
idxhikA2TzKtuDwyztKxM6BSgNPYJo3rHxB6dgioh4aML8LISkRc2EBDXUS2odjF//tIescC63gg
ZUkP38XhoE5Qy9nOj2R5eL9crk2OHKPTshtNWQDcs5dA4FQbtm9+nYmO+R4A9z3gF041FY4DQhaq
5CbcryQv9Ulmkaif2j9U3gfnUbV1of+j5Wljg/k8+9Hv9/GbUYxhB+qaKiJI5ISRDyVKI82KffXu
v6LIoU3vFCl7JQ/1DEUf5KZ5oRgoP30tImrLy93FDv1kjbwCUyYaBOZ2+ol9EWdlCcjcqUa0tKHz
8H+iSufvgqDLD48vjUEuvKbZn4eYpzPzwzk9jv8i0ACIVjcE+0b75Jss7cVLW+u+sDSbLV0lS7MX
roKiH0WcWGO7qUSQTxNxpzKlY9A5Knph0nk6u06QABp4+Mnrw/OSRvAT5xOy7EuFJwpYdW+mGXBn
BWH04JZH7no08TmSPtJVDyNc/wZvceLpUTIB2zy1ODzIJLUK2LrZAEs/szW/nGAQ+SJbMnK9Ldua
KGh1m6EdGvKsIFh/5sfjCQrFI7bNJHeHBbJysw+tYk1ZZjEb74M5KBa9EEFyoDJ7ZFrbPBD/EHHX
SCHQqVevSapPbyPeDXw3PryWkdtAwGfgzk6TPbx4Y6YG1/+Ij93PYPF78aZ0Fnis3p+xw38WBS/o
usgdqrNtjZEbY0aRgTTSewDkUm6TQnjKdNdqLzAZ3mSidooIc2JqKTBig82feZJRKROJwk5fdl40
iC9Cor3nsVSrCCXRR28hWQJbDhPeSoGp/MeNZNyxLfWj1CQObEZ4mrVgG9l7Zfm8csVz7vq65FZ/
HGb8C/8X50hWwWyjNZBtyVllzxmnTiwX/vkHVQs78FSCk7AxCy0mDG8K+Pk0XkqR0fBKdGiTNWHP
wNl13Rclogu8vvaqoQbwtw38ABBRRDpdHG9qSBU8GFSEJOB3lMCdEHOWekS3yVPohdziS4Rrcny9
Iv5xA4iCM8X5CBQZEKuZKc88O/jjvEv6dHPS9NDTcarI7+Lb/Y11zpr/yp/D5OXbKIlH9PBYGPho
CEIoQjIvA4iS/zf+NGL8iwuq1Ouupca2t/udKbcFJz1A17thJyhSagvz18ehOgUOL7c7zykrfmlm
lArcnFxxYOEQSsvqmDKpLX8vJuLlO76OHv+73hA9uOi2hFJOS7TEGKmeI1m65VaWd4OgZqWShQGU
h/frKAcZNM992TF6P5gb7Nz+I5lKWgSh/L2j/7ZaGdu3kLJDNAUKGEDZxq3I8M++VE8U+5WgiLYS
qN80QgvdGQqQp+DjWATLbQntYuQHjZl/YlnVgqJ/j//lXGcNfSnktiUT/1rr/Goi6oNmQF1JnsKz
BrTTN9z4zSqFgdzWyoP+aI1cNGGj68GVJ2poGbWlh/8d4o7Omz8pA8QdXtJqKc9MvyoGBVd4O9nD
7AYArmf0uxWJtUXzJsS+v0KoZbnQdIgFa6xKpXjf7wPQkRZtKkxaJReyUBw8oORFdizY6gcOQpBu
MBiWNZ1h+SiRJp2F+yFNfniy6mW87C6WC0fp6DksOp1FV2DFQ54mEG/3XYeqHjFje+ebllv61W+1
WvsenUy6MjvFTfo5aVFSqgtGjGFT5+CNSfZ4BkpftHAJzw5+U4m01hTgg0/IkfI6LMWRPyRGgUt8
abWyG5EtkyvMmndntOvyIWdTt7oHzw7fZthdlDaJpa+sJ7VweemwqdijiEHvaPEW7UrqLjdhPHtt
yUjLQQa4PoNPHag0+I+lom2ZXoAPM8pE1Ga91+73pKe1noVCBl8f9waUWC0VIUFAoLjnetdbi02y
tMY55IOjw8nwz3iJabmSZShowyYdr8dO8ScC01pfo3Irhe+aVq191JFe5aGtEZNVDFkiR2pDqvyg
LOsMgvq7zGHrCMduXtQ8oSfi5tWuwDRwDJwZQK9pHYuLRBJXAiEyVCbQsnVOCvFfBSJ6GyXcrCWv
x4OucljoU1y7Rj2v5dSRerrvTjb9OPG1SA/v1CCjezTKBDeGBFCGOOKXskvru5r2a2kgoJKfXt4S
Fj5bzyqykmLbFJfJitL1Z/176quLpnGqpG9Sr2lfDV7K5sO5VVjsuxDbnMEfcE90SlxTpUEC33Gb
fRhIpqvq5WXpBuLj12ed5cODDnWlAa46ZCgDSk/MI4Izci1rvlsxCLpGuJ3PgsucGfkZjHYHS8Zb
NsLD13gE6FKRVHlcUXvIvt93F+QGvN4gmNbWS34ybmAlBJemPmwi8S3zgwFFD4ZALFV51K7rsF+H
xw4NoYKrNSixgvmGe+SSet4ewEBzz2M3b3R8MgJWpQB8q0GNn/En/CJv1WTQ/WoAxwTmZX6E2Nzg
87S3IE6BkzPb6yMj/Pu0rsBZX8Xz8j9ebY12ZT5l3fFZpi8iton7r+3yAM+Io3bicwfwZpQH12su
35XD25ZNfMBqrdjTD/ld+qgSrd1yPGQ6QNY4w5JlY2GkRU2k4eENQFJ+hNCvDKBSNFSn5lkXTx1t
oK4x8Yoa4oKrWFvfRuqwX5SEijdwzu0T4GFGGlavsvaGWakI5kqpjnDq1C2OW8q8SzKpsyXyu4z0
uSAmekrg8+UmPMNBY35RagfBcyfhEvOdoNikryT3waP14ykHTHk0R4QKTx2GxnUQbEkMnnE85m//
1akqHkSqWultmPSQfLKjVrWK0l5rZSsWLR+w/Dboai262ouE9oUj+Frx2XlTYt0kzN9ebVxKp5AW
S8qgV57tmSxq/5cmbaIEA2yvPx+0hfnNhbbdSEV8OxTQedQwXslmctV0SAya+qTyeIiYbqbzl5rE
MnHOKzhMBR7Xtuw7MTX/3N8ywzcOpelt/hxHw1/BQ+V+KpWIVF68iAxcUoay7hfYQtwNzNCSiebl
q3JH97sUBRJPa0IFobg7pWb74+mjrq36e9wQI1e7e+ky6bWMpl1mFU0fAWi4pvL4F20UVEtGePca
Ek1pd8Yv7SKTC8XSCTmEWQ3A43Md8kYq+GDcwc24fl7dMS8N5FqNm5g/YrhRHxkudPi0UN3fWg95
geyxj9+bALJIN80mMe/ngmhZagbrnfl6x8SK2VsCmYbPyD9ZKL+oJjooEPQklcNlyriUQknkdgtR
Ro8JfWmvJvXTVsU0JckyR4148ZnwGw1H7Nfry9LfGkyTkkVVWAYQt3ECch3fvuGLCRpJgBX1CArT
AQ5QdvzG0Z0ARFIURTyHS+WW2iCU6A4t8dg2KGrsjMroCn/XcsMj+FekVe2/XArVbxAJLhEDtWSH
ZwUh6X3IKOlA9IO898cWIxjDcQuiXH0vphA1f4htmS+8738FCFi74I0wo3FefEV9eu4JuOivJIrG
JjNYw/8lNP+/vCMygjdXWRmRlwqjC3/zlaN2B0ub9wLel/E38t2+4tohWkF/ZQFdE3ieynLZCcnV
SP3Wd09HnvRT1/oD7KKMmO6InTgtz2hQt680z3NRQUbaxwhu4X8mFt9d0pdwA59IyAoITp1fcPBE
5z35vpANWb9igg2lxYEm14/ztv0YNz563h8nrxd4IoibRFLEgFaVe/4Vn4xY5KameB3Op6w7gZ/K
r1yRdzVIyDdynq9g0rBuTUhoKfArFkjNtBAh08/mDo1My2rz0a9vj2TkEIKkaOcLjMMYX1MhtmoD
zCP4Lz1AOW7NEdFVpU0sMbzFza+SZh6IEcIMU3aoQ+483bMyg0kVeyHIfIMYdMdzIBeXv8b01A+3
OieJFG8rdlO9tfHQcPmZEzT9Z8znPHNxE5Ws7+NptMvwVNuM9RfXO4uH65HZgNb6x1hk5ruOQVyU
/8I6j+td+/Bg4DkzdTvCM3YAj94h2tR0zPs9pDnJoEZO/KUpzNB9UhS5y5+zaNPh+TQ00PvYfQvv
E4Vmud/IwiNv7rcpW3F1jMPt4vY+9usAYhGrQUK3lDmrPc1rDtW8IBiXKzSOunCqq00IBYh/Mbqc
+6jLcV1nAdg/wI0wNXvPCppHbkD0erBJVRm5C6xAZmfJs9N14XPcx5B6Js8EKK86ZUA7XipO7nJe
yyMzdIWZxHuFTQNmeILh/hHNEBrVWvMNzOcpBW0pB1+5jTh8MIusBLuCad2rIOyUMpo4A5kucUKo
jbcwgJ3S9mv2yJWrTjczhuPvnrS5LV81KgRJtcwxBgn8rgn+NCKmQ+zMkKloAByFTD4vvjvohdf2
s83H4SVCDCckp14v1fTVdpLKfi5ZlbuGcF82LFg386EnvmxykmIwPagrMobTYGj7bq2xlqIcOjHB
zfYUcEJ1LgLOV0R47kQgqos6Om1jkjzNXcvn/XNz3OlAQ8liEvqDGtTFX8QdgoiiN8Y7WgH5z7LT
2t4ichgkKtbWxEPfDAQzKpfqgla5uBGDppHcT7vHu9YBzoEuBJvmURjRkNkOU7oDGHCrTB3THd5I
mj839LRIhnU3UmmoQz1QoC0AGBjHgEOu70PaauVi2VhPYzsFNWBsW4D11eROfTTd6DdJcfksCqcl
PYMDzRgoUsSFpF51TpB7IyuJY9QXvlLQwP773bydl7fLSc53VvJcM2uTgKT9n8G4g3DP+fHr5IPf
sVxDxhUvn9/4EANAxGeV6fbEWL9rHJz8KHC+nhoyhjMJT6yNbOEXyJlYfyFFceleU2GvmSIvxZDM
50qqAWQTU5lv0+7RlfwU7kwr8N4hg0AxW2P1c87aj59h4gJeMVFYtJAhWQCwyXXPotwqz2aIskfo
kmGOcjcdw9pK4TRFSi7tuBcBRKlpbJ42yzZrq9wJhcv4ccVx+qnVbQ+tIjzAhkWoduqPfSo8GqgC
bdnD7WiRM1iOrMJXRjw1IcgrudfK+g3fYzWcsloJt7A4z4ZjEr9vWRuGg904HQWq8+fk5VF3Yqj/
foRmUTQWN3FWaWq+4BS/nvA03pEsH076618d6YgsSMfChcBZN9ilAOtx9N5VQpSQk7ifYnbyFNtL
ELjj4TiHysKLYw2O3k+zuip6EdASrzNUEwyvxnupl/BohuQdP3vxGQoP66lCSEjltFAhqpgapa4n
QQbr35qMejabrFIVyqsTR905W/dz3qy7d2ONgdY3wrZAWS+baBK5NJyKk7BmikNIziorBti4t9wb
MtUdc9/10HgAsU4VgepJ83zYryIwpsjWSOtTjbe+sCXDzHqLRDa8aZschHzPKbN/OX9euxJD/LVY
1uJCRGzqMY4rEVA0HCQ1qo+MOMVXj1QrU6fqiOyA3eokZTXqgqcaVc1mbKkZP+hnj+dMGmTfupqv
c+tDTlrrcOXdFWyG3HT6LrHdeRQJtMKKuomqkuqAIw8qDnAXF8lqJrf8Tmu4zWfMgZxdzzBKQY2C
mBgejgp5gjjcjkhUPBKM6TvNNBvZdMBjlZ3vwZNHgL1zDQxbOcwmRqeehOBeBSlYzoSdB2t5lpDe
s6FJGsmKgwQ6MV2cr27xWT68vNVaLmizZPSPIn6tF4LircTOB31fZV09dl2tQb/QEKjVZiW8wpZg
z7ymNxKv8XxJhoz/5LvNvsRWbYandlLUyt6byC80QwjHFX1ZKYsqhscmzPvcu+SP5XmJ1O3ylRSA
qmZcRs0O0mtdW24jST3+CZ/4lqlltGtUhSgNICjwdzwBw9lr3hn8vKlCPQf9F30TggYOnXNwZt6M
YBPtNVFHLqeURye7tHVnI4GPGLVP65bbp/KKMpfAA7nLN3buPm6TsXy5w7KeHm1VMRjWX69VSnmR
cyv4wXpxfji5MuO7GfLSNu0MYqBV0vznEfa4+WPJJ4ZpV4EF6lA/1+TiZ9cfkjRnd54Zhkit82rJ
ue48sDyhrhP47DFcV9RCz/O3yUQsD5EwagUdDKCj/ROsGIpVL5eSgTyV53ZLhz2jzrjOfR1I/bRQ
TwdMvbAYN67quhcPvpw2hSCTVfHqPTVb8pjbcfTBwwJlgeTS2M/MxFKwbnybXubUuOX9BRWtdqJt
WHF6YqV+BHwMChdNI9oWCdXmO2ojvp7RPzPHe76L6iyqcZhBgYVEW+EQnDmUCKXjHUcxtjiYg0O9
6W4+ky60Yg9yHa4vC9rqw1c+16xl0M9SKiFPFJEMIk74dyRKorJWaSSQZEnp8ihGSF1eCLR6jGoP
k+HrqndtRrH9ror+rFnxRYtyU5/ip+0FHYaR5OvE+K0h6ls5uI3i+vr2ky5C1/KfEFEThodp9P1u
uaW2RS7JsRAcC6aAy1GJv275JpB/mGd1oPxzC++qR7Bqq01oqEI+JHwJi5IrTxQ+RcSRnchcZ6pC
9O1IzTRrpVI7r08+oYC2IAq+Xv4g3xC4TRxnq4qXNjeYey3shVDmGZTOk75ZtwhBkOQVHU3VBFrN
Cg22TWKn0Ku4y92djjpb0NT8Vcn8mMQ7Q0rVjxoTjI2mVl8vei1MRbSyr4pbt/cy0Dpd9OECMGkB
Mwieg/8JUvshvSlkGawpYCqENPid/5i7ULu0TX/kTEXaorHjB/him2kw2WfHcjv+mUmPGkzZfm9W
IMf6b+AceEROiA3mYG4oU/Q1IT9bm2/xxJywNYztHN9KSO4YrYE/18yxSaKAnaIgDVOKEgB1tLr4
TtPCNsCbeRv8vxTA2CnCqeDRXrHTayfpcXXsSPXAQgIBVUDmVe2IdeTrgo6GacjGVLCYsp+qejbo
BkZQ+QQZLnxF5UmxXMyUVsa51Dkke+gtV3XLfVsxgMHzoMTqbjjKLwnx2hlPK1doM3hY4uIdR+o5
asGWqqoasuYW1cS0hlxJ8++pTb91LCSlHAMxCS8FkThfgPPjAq1hmxgK8WnAAjzysUWAZNYh5FBG
9SvzyqpqQL1N9Kfx7dUPppbX8pVIfmsq+mfIh1iIEh8raHQTWgOHKqfyvnk7j3cOpiEjUScHxmmf
zsp21R0kJ4UoFyKNbb8oEHGI3BaB3U2F0ZBcFlOLTibDtRfDtys4LoihBBzTMDP1M1ue1YAJsoXM
oz2fEFjUODP/S+arQIDErekcdO1stovs7qeKx8Q5XqdvIGEQy14mcivyk7tzSlc5NIZ0pam9RHWi
jVe8s2OKEKpo8Amk3f81OmnTuGmE23K/PClXmPOJoNpSNWwQaxYtVQPCWDbwDhJxVcSjGUP2rUDL
9DlU8NPjLXuWFKph/IgRJroJO5D4xJeLbuBiguMdBGcG8z0SwQxFcRMmZYtkbJ2+b1iYZRS7f+W6
1Kd5wDgqUivAiB7WRxa7TNBpvdb2HRbpN85KiGBW1La74nGkkTJi6mOrPiL7eafEbBT+KFSJFBd6
wBJWihG7x51yQinuo5Zq+KFc7GO/btwHQOzDN6lW1kYFp/pNkU1syy+rk8kFZ3x/PaiwqQ1LxcQU
lB16sXxJDy7S6aS3QvBR73dIlBP5G008TBmKGw33lFvwPJAK5LAFSfEiP3dkfAGz3XSlFBNDzHIl
qxDRkfPMkmfrps8e56sHA5WFEYOo876NalWt5wzWvtTuTn0iQ1b+cvVNHd83oT/ejirlXa0w3a0k
gNzZ+ZAGrQMtWAiqjuWHS42qLUGMHgdy6aaIZDQ1mx1YNSLQOmGOF2y3DObHKPCvbeVQOuTk5IwP
DEamuegAW8irvHPHga8Qb2vY5NecxmELDkSTxgXvVRsQRk/99PpA4uZ1shqbLbozSNZWRk3PACrO
Ti3NK2ybC6nihgcHHFae0sKaw4CXdB7EJyUFX/1cv8ejCUA5JXCbb2QZz0D6oe4NPF5z4U3onEYX
DFs3afWFhrki4ATzd4cS/Ea+c9ggsapOs2nSSYoKxbVyPkh8zrNZCJuYSpBpaJyosEje9g5E+OgY
UETRwO+YI7xWkyDWrf7YuD98IGX2EDr/s6exrjwWjA5RTfmGoamO26pOcoeSnVxTiSVVBH50VwaY
xUrtv8lLd+RbZSXh7QY79yVqCXzbv3qabA4KWkFpzMRjE0+6u1L3b2UrazVZ7Z4JXQq1fgFb/wHO
KybK+HwRvbZ+n1mCKJwkKyddllVzsuuHaup/KB0CumQt0H5ph5rvnT7ml9HD41Ehk/jkC6ztgl+W
8X8O2HTJ0udQ3MQdz1KLhrKSAZ6OLXZLj3BzTCYH41/ZybtZqrxdop01NRZZUiZfLFaM9gV2Cfv/
iufq0Cl0TI0gwj1CHzHH49V+o6nS6nW22rh+BkbTk6qEuoQ0FxoCxa+w96z5PfGMPphaR6Yh82HP
q2nBOX6JA0ad+e74i9AjjuJe+xpN/S+3MsojSRNKPb799FppcW/KDcpydHaBvciO+1RWxqL4zJZN
gAlG01bb9XznCca4emjnH/mz6ye4MeABYX4WCurjkGPleR2WcAwvXcDQWhj9fMeym0Tr44uaJKQ1
0pmuXtP1lAkt7qVoo/Oxoo1nShCJufURqMMzJ+BbcbyyRnEboksg38U3uYACFX7IZID5J7aVtRq3
t/mViXuCQCNisc1BpVaXdtH2c+EOcbC+9PEO7lGH+S0PpJB7m9O6kNXsuXOJWjoVS9p4BWUY7SBy
WYoxJT1S10mmm7l6JfOkJvNs6YAD+12L+lRjj/DgmTJpQeGyh9KVf5nO9vPqAwLAbuzxh8NufazM
HkEkGSLJzDsrsWzQCPLOQEd38Gak1cs0sQwWfiGU3H9rX9ehI5QcxbXr8NXZsJDNzqkB1RMcj07b
N8bsCuwSeY99Nre8S+4mXGWQx40GX7qEgjRRsUj7LXlof34MUTLpnAQofIfYJJKzOXadQ5JGMLyo
0nPq2ZEt/uEf2smqYQLm7NkKOGpJYhlYlfXA8hlyITXEDSGFNJudmBaPoQx2Lvc06fMojMccDSgQ
h2k35OtN0+VGqzxs7TrcfNvwBhF5p0DqYOz0p0Nbfm3LlkuRCMV4hETGeCaeBYmF8GCIui88+70n
N4Y4RGNnoKMEnUmJLx3Dojhhvcge8afdg3zUn9UAVpVfi1CdPbUNNMIoA4J1aTYy7DrxaHS0BREy
FD3QdHxHc9nl2ULhIvnPRpa18tkzGd3xd7UxEOxDoSrvmaCzuIVuaY3eJnuKnTNuZsFmGWzRwP9h
as/F3UvtnE9p1n3FOHka1y9qWgdAAJAzZ8vQo0SwFa5TB1potj3Fv0XEqfk8Dhaec7wmm0LgGJwd
UB/9HH9IblER6hE/ROx0TI+WJJXR7vEGkh0+0vLmkO+/mb53N34PYAVTbeCJZwOYcjl6uMCibS3p
NJHYmMvt1H+5yL41cuFitI0d0qp7SdAVPhTPNTlTqm6Gp1C9iGBb5TVtMvJn5+uAecvbTz7uF+/4
jeoozYieGLUKGR3ArFHAM6iQsov2R+A8x+oBhG4A9dce7rU0v5xzAndoEzP5bIaTM+QT7jIP01z0
GJIkXEzuc8fYCcWQAOvN1SdpDTdUw/KvS7OIlASaYohQMfREh+w6aNdvZ+zA0xMWYVNFWX3OMNOc
R4TV7PISyddNwX1pIB/wT72yeho9dgIZdzJDof2YUEQzYh0tJkgOTD7bb7ZbPrazxIeRjwnAPe58
+EFSdR38NcaPl2rAqMZHyd3VDPG6sNabFk+NQc4I8GSRIpn+KgYLSstAIrn/nUQho0ksIry6rJaq
F46vNGMZQ4ew4SBQAi7SDMgxWptEF0SRBSLJPWP0eiNbiPzmJ4W6G5JdlKIaWPCvkTpayX75YRtw
V7LOLLiaGRS1yeb+UPMijCbouREDsGJpg/JSGStEb3Zzo7Rt6GmFYSKqVYMnL3nRio9NwExbN4nB
NCEWd8DKTYCN2XoJNzdgSEnm6JuFwWNJjefBdpP3IP8ffcem3aZt4NV3m0SQVYpyeiyM/8stuXeX
O/Mewb2P4KMhkfeavyY7FiaPUdKtewiSWCwBn0Ud5/5iJfs3C0bOhS0IcPrmiq5KWeJs+5379HpP
qYugfuS76m0EzZnTLYrlV5Sgogqmc8CSqaDozU8SxbxUKabPDJvIP5gGYFz2nPIMqOGPGKJBgQ8G
gwG7IAlYyxHGJJ271EXNL9qVhewtNETlegZ19EJ2TUhgDMHqWyZJMGRQECgSFbl4NGC1FyZy8Gc+
Mkmrb2fAucH1n4ii0adfIWVm87sYfmHgiTCrhSAcDiJxQx+YxqNjrjTKSrgnxSp0OnO6A5PB2U5M
7mdH7nToe9F/3uc3Hl2D0C3V5b2uyzOdK1VIH2N541BjEunIXI0oQcAZF3I5oaAn7b4kqwnqdDBL
4kPVhbcbPZZQO/W8buWPVNOCxo1Xpd9CwluP0tZrF128qk4iMAsLqx6Z4iQ+bTZgpu3bAFmiNgyl
pR/zUumi2QyjO6tfJlgpT+3J0y07qnBbmNi8rhiJqVQhA4WvBhHygUK3/3omRKgBtEBQB3acX6qw
0Mx6NZVuh7/E/AGL9wWAc6eLH48UET9kLhvAv2tMNsA4KiF9aP08V/yDJ9vqMrs0i/ROqUJTMLim
oV6euJU9HS85Du7we+YeBqOO0+GzBAKOmdfjDa/r94FvknA+UDw8THWIJP/HzqkJjIxAm22LEPLU
MJ1s2PUMdjtr+6QGun8M96nS2NRRJ7npvp06bQ9tR/wKcvibniFi9JLjt2tldDQTwp8Jfm8BD4G4
xapzWeotYHZUVGcaedeHXO80BTHqEei2ix6xVMN5Oc+rYb/AdsNrFQ3sDLOU4eXxxqirfC6uYV0i
t2pObRkqmY/kGu9Bp4OKaDEzC/uPClm/OYbfPanwZ/x9ITaDrgObGmjas7HQ9sUbXqXoxViVyxgo
dBSGSAbgW7KgOO2n/bBrlEFwW+uXZrEzpZsSNvIgD2ibc47usL4hoUoaiXb7VKRExKxh9zhDFP3k
e37nCpTKdaM4EYS8sPXbXfCToTXBEnOA0LcoS0F9ZaJRsAZTyKDhJPu7VM91qznQr3GtgYqppc7K
o36u77CIMBKC2wVyAiQ4fI85QByUJo8aYdkRxL7Q8J+sV2O2EP80MT5PGNMPt9Kj2RbyblXc53Sp
vteHVdMrxy6IJp+pXJlbEmt7vYZE6WldIR0bMrNU/W9sYpByZliGPUV3WSMG9z9D9HTyIXvCR3C0
M1rwx/+vlEJoqr6SH60ztkK5tHOlYYDfVQj655NKvAXN/d+Woh5WiDpn4aUHBkKxi1QpNvOF8+2u
Bve9jpmsK8HZtinJYb88rypusP685sFGUXw2qdtni33X/UlfkckgnP+c+Y6T0MYWAZa3byW8rmt0
vorC+YlqYvQp6kEJcncSA/oplnewDqmDivdqi/mYErPGyHrR1i9d/yFfTdZmtixnxHLZ0xqLNLzJ
QY+oCA7k8YzmvkcJTxWyCx+uvq15TzSWe6m8CdO+QT+wLfzyOtX2aKveO5d/ZuaqD7S62OhCJ2D7
KoEl9zp0UuN0G4SNqtVSz593qLldMuVLk+nLek+sNWsAeG/ZaTjgckCkhi1tCrU2Kvdaq4sapTDG
rfbZSgB/XvlMUCFwKx5V0XLvtzNP7+xSMbBvVew3fwN2Y791zrZIDFO1e/Xbn4Dg3qq51Ki6gHTi
6Ovz1KAEw/5cnbR2q4o9fGmPSt995ZGcgNt1fqlIJyeDnUxXOF1GogNvW6/SIwrYzW0/2kZ5U4UC
oCGt223xTFDq3ndFDzuV/GgIrWaPYfG+ebRstPZfET5huXJWTsDmc4vrXAW1ZKe4RS+sBRBX03qI
2wqMj53msa9DlIbLYFrLkySddxjY18NH/V7DvjUcJmsTJUnBTUp4jlxdsnSlTfuke1N70hOPDTnY
AzRHmiMSXTuwmzrEGSsZaWFxWjqbJ13T/sjaZ/kFuTB3+RYEtV9QEJKTIYD/FE4xP556x2uF4Ojs
HhNUkOeyu/Gx9OySqC1M+Xeqo1WxTecb0siZz9BODOV1q2pfa22909vheKB2uQTEB0wNoBY0Igcb
RkC7wrInfysiaMw+PpkmBHSRAPyAjzDIjHF6+GC4Qnjz2h/a659s16fgryLDy37s2XW7EgA+DSAv
z4Mq6jbPYHb82xldE6BMBvhVmpcfKK/+RGV0ABCb8Zax9QCMw/5i/HDKb7xVqc+TWnvkKzwLqkdu
icGJ/Zqgy//DnEoReV/xelax2ylK/zo8LAD7t4AqLqEMypY9tb9LnH1OMWqbHAmrGwXDZ079ck+B
Z8I4bxotXVvQ8hOtqoNeUsykKMcnq9dhyiFBRKQs1RBX9TuNGECpu7me0w2OnsttvXDrMaPSw1oc
/iFNPJOd0VvFiUYyfL6fcI1oWgxSrXaNhK0crZuWvqPSvJeHzzmqEuJDoY87A/xFoB51cJETxAi4
Tzec35++mEWXUGmGX2DFnxmJE+c4Agb0Ir9Y3qFte7s6RqZ1BNi7IMgQYC+/5EJD+V9NWqfm0Z49
F6tTfvIuGFykB2K8w7NhwQyUKmyaJ9VJfgyol2OPHivYB4IcuReuA0GifK8NOlLW9I95+1BAMKL/
quhbftDhPrjJOr7V7JfoCK2CcueW5NM+oDjLNGkvIBwamDELNOXrVfm1b69URb5y1qAi/mMNhMuc
8FErIFndGWu9I2h0XWe3zN/vGzhsw6YfQQYlV7BXlfIUMEqxduK3A1Ei+/rJAUQ/huNpc59GXBs3
NYkG5osRhktiZLRb8m2a8S5eVClg/5oKa9CVYoOGxnSR+zbHc3DetMSpyzcVFDQ0SsDVJxrbxJYP
N8Zn/hn3dV+5+skp8vQKb0NLo98LqHbReiIVaQw7jHJ1pJfVwX6vKXn00t7Hr0OZu3Tcpy2k22TF
0F2bwg9HDEU9hHp6VrkSpi0WVtzi6t/mlXjmIee6Z3wXNfftFrEYXvDnkPQNKd7n5hDlquCe0/az
MmiFyWMRXeKkVHvctxcAeY7Mm9iOWSorP70Id/90KPUzLgXuZYievHQgvVYoEBFVFyhKXsXKF8EE
SMqniLTnXofW2wEqzD/Ab8GaxDyGkqGyznm2YHkCoEMiUG23DPcTi+vO+GfxjM1tIFAPMWaE3jyk
7TOwHenaHX5PJr5yzA+kUsF9kByFeixWBeBA9Z68eIrZgG02E19/RR84mDU5iZGgeAdmcPqKZwPw
h9BrnV/MbSGWhd23ehcDj/vyuGi8Ri0gVkkSG+ohOTCMb8vU3pMvbt9IvjAK978Jo4Aa0xTUwHi9
vjMK43QbnMKWraLu/dWb1fUMlS3M+qjb1ssgCZfvizWQWVxsQpeloKB0+GVR3uEy8xL/0GiR7ZRv
s0EuZwB8Kp7fgLPeXH2qrLd4sPrmp5g2/Y03dmKrVfZlGsvvCwJZmP2ue7+yYvMzgPTg7/63OeCu
ivhzUMItWZTKfd1tSaEuyZ9eNuspPPh9Tv9yYZFubO2GcYvc1uZbV8O2hnU8GYSCyWxUFrS2d94I
xiB0XFpVxwmbJwwwpvE0dero23/5YTlco/da3FY/MwwSerFop4qpxMDxYuJHdhwTMhp5zPFfGSWi
DZYWn+oKrlOzw3mQZVBlL1v8CjxVzu6mUG93Pq1yRMiunm0qslOF1qFdvewbQYqDyvKZD6U7evvY
dal7phE4Nadzvc0HWfbJN/SbIsfPo62q066kIyqZDScg9Va4PB7byZSu+mnvuRU1E54MgaDD8Xcq
8yPnLpRhH8KnXxAEr5ZUiLo5nfPOUJHyPpFnu7dRyWk+q+upcdpZkO/jxL7o5tvlts/WW/ws5CH4
n0XHJzW8sKbCuneJsfqFIterkRt8eresfU4nUTdpNPO9YxpunUzKGnikSO7IWhAblBONWspq3O3f
DYXmbisUuJ2XViL8ofuLZ/jM8NMU0gQYwyfA0qF2uM7lRBaRISaLU5hhNARZjD6+XQiGIX3FJimZ
S4DeSsHgyWhxJPHmC5eOJQuLH4w3CBHbzmnl4HN1HAl2zM2qW0oYYx5hcHlxzPu3A00CSA8XpGtg
C/vpf+7W5yyDzkhQ96SdYbaApvHZvlorduoKQS5HqBJjtb6BwpmiHcmVEa0jkR2E/aAP2fsixwaM
gt5doYR7Onohl5wwXtIxdn5d/mgqQavfWRwV1tKZth2t1kQrrEbdaeBsRa4ZmC9n5oMpgFCaePkd
7N57mqCVap5Y9zWPQFxB3eRaxH/FXY5bYmdpebC0IQ11V/YJ7PNjM31kRQz+Gu0lvwtXeu8a3IkU
U5hDTZK0jZq55VJeZRA1/tFbpRT4jPLGyrO438XVKoJzrTNeUlTtZiu6udiHif2q2OLKPmNdADca
EJrnShl32Q1x22kfmMquZaaGWOHRFYiS39rDy3eoEEfpP72L4ayCUnowH2yu7UXs+U7gbF3WC55k
Hw2MVXum06XMxwp646xFWaLRAMmEaVGTkGP/TPpmdxcyui5f3kLcP+hNqaxKrvfiuXkbS1MhY2MN
DUG5f/KSD1IJ8RGV0xXXDMvzkn+2DnvaElldgRmzN0S37TIjEPM0MVmfFGAn/ueFkO23tWWSj6E8
OWYibKpU0XawFDpS8a8y9lUbboSiNebrULS1d248qqr1aISW9lLRS2fM+as16aMXujaWB51TgXZj
bFoRbVr1hNLCaAI0LpswZkdqlRAEe0N7qqPPhAaEIYyT/wwX5HC4tSslJpSu+G1v4HITqRRfsfW/
GYX66K06Hxzmaib6VMF3JTXWKWvhIu4Y9tEcO1BamqQDi892jS4i57TkvVJXEnFsvnOi1GbSIeEX
SVkeRXJPq4ueBOpAmJzRH4YKxT84P4e0VPorM/O34SqDXBS8vyrtTXiGppb3DsCMlJ4sgnMWQuBC
zoqHa5UQ9HXQxYuV+iSvZHdslm0td6MEuBihlR9ecEH+ee5NXgZCgg6A8JeMM7I0y4cj5+FxW/U8
pP2aX/FvECHDf9tMtNOnOwQeGUVSMXkgg9xTwrUkM7IRHa7J0Css0qxYWSlP3LQdNyqmOXgkJhFp
Q9CiB/kf7a0LaYUTzRjD8tJ2cW1aMcdsWaOy3Q2wJemJzU29L57AiHtCP9ZpmoCwSMhQ+G7Qkywv
m+oq/I7sQVss5e9/eHewBKEYN/YHgMkvlpifcdNlbfTfjNGxeP8/TwLvEE8NwK4UcjYgo95v4WRQ
H2Wg0nmF3DVyDcOuvymTwrYBIewAG1MNwbeU92YWma2WlfCJ47NnkiGl7VNNdQXCCJj6TeOYK3Dj
uV/bRAJ08iUWgVm39clcoc15PIJy0hhVvjoAw2+6QqbWKT9OQDyrcpj58pbKvDuNaWojgHdL7vlD
EAwAstEtKnwe0GEmnqfyJi7TghR/EQgkq9COvbMshIc4Irii9mT5Bl33sl6g/PxbzZvqZUKTuU3V
VdHur/JA707Ae9/1hrexeb1G0UPKxNapvwhZKox1qyfnaXLEEQfTWGxXQjhKg+dZIPKmDuQOMDRh
FYS6/CIBOKUdFm/8YzoPmYAZHAodev6yvpndPz9i5hpLU4Hw1g/P06iv3ttr3nCA+YudejE66ZCp
jaDHdHD2GLHvN2Bov9/qngrnN+ZSMS/fsq+TgBUAATPL/VPGs+n/43V0+m4lcGt8dNfvrnG1L16f
XtGrdz43/NHOzzvRl/1rf9vRt4Ma+bTPPwqVpsbYVmlwWnfvV5HLlHenebi9Bf0UhjAkvcSWxiW9
oRSer0xSIWly356r6ONuCgk4fY0+seqmYP0Lz4pj5OyusO80Qd9UOXIFpyQN/N9VOGT75n9WUf25
QKITiDmx6xQpZ3y+i3YdvWgBfxAFf/6WSNFKHMtDraGEqk/b+vuozyVW5++A4AV5dtR0h89Y5hNM
/+ZC/nXMbHnGs8pHmtAluJPyKtIVHls8giL9DBTYUKBkp4RtDD9GXpXItOqmxzYEQxXNkE6BnBI7
7b8rduaFh1orI0kkEOnBWhd89tS9BwW2n5X4uGHCgf7uXVQrwmz6t4cUovhtECmAVe16MpOYvRBM
4tnZAq807S4ZHZDyKN53ZVL2ICi9Fu62LcgiNvSSfaJ20zbLHACBrVe8J9YmeSi2kKvoz7hCAY/F
nkGr+tdrx+TVijxFTeNhPU1eYZAu5cKHN+Z+f9gz+XZycOqSqqVr1ykJT3YOQYu2AxShgNT9UHZY
bpZE2OOuXOIlxElggZpgz4DKmySJOOIbZMlG+sAuBwVedaMtVAzrEA/EJUJ/6YZanHD/Ab2n4k+Y
i2Pfjq21IR2dD+7/qpZWh27ft2V/xs7jfYmKBVbradzILIBs9RYkX5x5tOMxN8gqqpPEbiwUKWNq
OFsrjQQjQyxki4s92oS/7JNP/G9FfQuPKZxa6qskujckZm7OHGYXPVmXRaZUAQMZePEqf7BNpyIO
WeJefd3tKLiGAVleFdTO83TOOC+XGWhM21h8u6AtErchtonsrnpuiVuiuQzy8EW2nO+xH656LMhJ
ogg1BQxt0ZymVNEupMPQuVjKgBJdUB1B8hMXqRG+egmZyPTWH44bEsXa4AnoIXxhKSWYHF6Klbgh
8cjC6F72KrD3qS7/qRN3OcnjnB0UgQ19MHYoilEKGx7Zp5fc3XAWtyRATu4oXPZoXH/GiLZNDKdS
fzCdJAV4PHWIzR16r8w8HisChP718blzvDtOB6iooNoNaVI9N8zRESnHAQwE2edabSmhxBQrF7UH
whPEKsZY+ijRU/6A3pZpxGNDgaSBJJDvWO4V/sYeNmaZs5sDqr82h2lY3nIURYGR9FXhyw9rEBke
LwWvnETfwNnbVnTKx0XcMA1W6yiuuxOXqf3zrWkN3uJpzeK4pDguF+KwEjMMvtZRqgPOQvO7k84G
uBBPFd9cYImZQMoC5erdPJ7fux2iTi7N59FZw/wi2+sSLJNqtNTKp7zyUblOotWRZXKfcHOZm/kp
gGPy+7bhzQs71xHIRKtM0N5/pCNAGXaiHmXeThQg2hDJdorLtDuc5WK0deT4y646p4eemvDVOFgO
aiHr9Jlq+H9F6DvKXyExsuxNxIv1jr0L5EsibcvbHjvahzKavg/MUQvAgnjBFSQMIVpykuLdWKmS
46NSrQchUc5Js3CrKLdyaN9Axvj7HwSFqnCfRRxycH5/2UPMl3SLMsYLFaF21//t4PwiljsFsM9M
p7X07JG2/98Yo/uIJEriJMTvJizaG1AjVJOeJAZnigg5yZaOgrrJu+g/ccnCExqB0LG/NmkFipBH
/b1V3xWGu7gskKPpk/Mfpox+XIDsG4/S7Jl/TZBLEjknTRuhffn3DAOlwSLKpP8exEGpoFS6hsW6
I+RcCi2/eGvBU/W/izIQenPWIYuVTgPVu7gI3TrdJbLVfWZqy3sKqvwdy1q/oAukhybZSt+FpIbM
XZ6ylO6UOj1RtpNr8sOeB0x38nMrN3L93z8ZowOjJu+T3rzXevyl7Xxyahzr/VxWEaVxUH8Na7io
nDNB2+qbGZTzYkWg8n7F4/mifnYE5WMytv7K0sHRN3rUgz2tGd4+eGXI3GuZoGS+mmCLLCs3xor8
HvPxwk4SZ150aYn9fEGoNVulQ2sdiMuLlMgJyIWG4iEUdp9X1Y2EdIohu7m5zYEIMQGQf9mcuGi1
k3sez1UoNdqa5/kNuNliPo2in/9lJfygAgm/juIO7jPUt8oD7ocrCa8mlDT8QDVcHwGrv3PSA5Vb
SbWWLxeHS8SxMVyhlbkNrjidhS1qU2BTPVDObC5FnxWCXeWZiRZ/PITOXHbFMPNQum4s+FVIAHh4
jkfykaCcROS/jJscSkeYepNOqPHbL4QYGEH+6apGbSrUGgx2ExZ1ZAmyfy2sh5r7BG3A4eaI+JsD
A8z6ZAoOh6NqhSvaboEAFp7mzrIOFzCTmewiJUYQuxvR7suu1c7veoJ4/eM8vk5iAwDIuYa3mq3z
vplPYsSvZd53ugdpKbLD1tKu19YKMRFj17KFVs9/lYUhEvKSFAwVzii5IFwMxq5TH1E4NisxtF9p
1w6ncZQDXtFJnN+6fDAe6gJ8ojs5T9CAw9UFXkiMptTFoZEw0Hh9jfq/bzv9tRN6V9Uv1O2vS3JX
RTVTBgeVooozuRMFuJG7t4CJtvQnAc6BqJ7IoCNjSbznB/PoNlSgXv3NYgnWTxV4Bed12KUpM/tO
2YTUNfL4xwySFd0hd7DLnbRkXtBMQV4Qlkkj8JdtFRcEnXoGojVCtP3bvtc0Fg4I3ZfT3qlOmOzL
3mm2Tms7Imjb1qHZQXvXd33h1RCz5Cwdlbp95e/wGu1Zx2+Mk4lTxlbRipextjKIrqyDRZZH5LwV
Pd/m5ZB++NGwj7kjoB+mAfICqWWSb1D3lEZTIb1FBqrr3uYSq+nWIvDaygJuEQFO5f4E++8nLW7d
f3Sssw/Q8VEqeFa7NrwVhRyzfSxMEWPAhsY5qNnxyizKS9ecd/WE+8iQMZfWdqnoerEgQ47UNJZq
KNldTAVG/5Yyi5Hwme8GDejv/hX5I5DrVmT5NzM4c8TvNjTcDU8PiizHOruHg3JQzw6VxmCiukuf
GNWKlTByKRVU0TDyuilImVLRFd1A3ztsvGQgtsLo+Rf8BJYoIWEfKjcfk3z/R6Aw9qU9s+c1RSCf
zDyWkI1BGmo9NVmNWSEbYpn47cTVJHSDfw7Fk0ppQV6ICI1LjQtDc04LPVGiRr0DBRmDL0ZIH8W2
2c4s1882g22DIJcXwalnnBQmtGIXpz8L1RD8n8zV8CZ4tq/1bDFLhRB/4bWGeY3tU9pGdlzjx+rB
4TitiIguIpBfylqgMGOzfQO/u1EHyL/ynYmoxREj/9MQ8RxnbWoQRpHhLZw6k2vcqV5qGEVC1uPp
w00M+1vaMOPA0TkwGpz+HIsyNj2OI6Gcx09ORpt/Yuxhy1ZfGr6FzZvSIuUKAuXeL+cG5OCfFKea
hryYqqLnfpNP8xX3IUIgEKDctt2kkilNpVhgEzWQb1xfBUBAx/Xa/sbEw4bQSILq6R6A9ffMsC1S
C2DkKDtT2GVQ3ArGhSBZSST2Uy39ljZeuS7/fN6vhxLYt6P+Pi4i3rGEndGIbZkD2rG0j5ll5Lsi
sIDETLpCzmoof0bWUi/KNS8MrgLCAHP0zNYPrdmPd/P/n1Mof/xAki7FTYO7Wn+L8e0uLnHGZhkm
Qm7SGBPHh8XvE1cRebkfhNNvec7uxGdcvp72UJG/WODiRYbu8HjHN8BZlgisWmNF0nqc4JmW3OKJ
K3l/Zk9XJAGNifXiZ6ne2AbE8odK82S5MspKRJWGWyFO5yIP5ZJrUt2x0F1RBExXfrU5sNoVC7Hv
cwcBcvFagMIuacC5cQHx/IJX08dfJcJ6pB6CBvjLBL/7RZ1CCzHUg2tbgIclLmNJlfWldwgJJ7Q0
FaCByWC3YZygXFzFXj8JThUH/WY6xM/fqtCtZ4i2mKo/Bzu5/wQTHDQhaYbaLVmVDRKzJwb2uUi8
2kBTpqGZg3QKHRZbxaRI7pzdhQEaU3SWYR1RgAJuac5tNRBWAOoB3tlEfDKlNvIacoYlh746mFBL
boHdfSjFJckm3K0XcA5DEMWEhgR6aLdwmDMPcq/xoN6Mg+x9qEyUEeTpSZikdmOnsNZGOS2I0Jnq
lG7xMgmC0MmdIY1gBNatsGwyqDtFaLbWRNw1r3eCXeBeWitBKDhw1m+jlXNDYQQH+gnppkMij+qI
1qvzRcaU7+syZFlmaetF6YUWjyXkRxrlFb7MH9tfRVCH8CaJNKA6a4WrxA5SLm1PuVKYrbj0Kup7
mwvaFnqw/CShfysZ7kuy4ALKtSETTdf43ob4onBDwht0LCypdh9FfG0wibSJTHgHiS0lv9+P3Xth
DDfkfUCD5RSyMde5F9qtDqwHPbABdwM2tT85C3aYbt6ODjzXOmtTfHol8T7XHk7MYrmmAIMut+2X
Fy4WW1ex8S6+kkK4miczdw2jQG+yIQ5ybXjIxYz2LgR/ttI10+x+kQaRVd0xmE0AmAijzcmV6LNj
1BnK01tB0cN0H03xUOrpHhCSILBROl+hWMhA4mQvTvRb/1qYdmb/rpgqsWjWuNbTTsy1C0gKp/Xw
DulEb4lwq/kjAGu7IR8G8eaJwVwfVqnfbkXYDVJXvXHyS37tSokzp1rAmq4s34+W8K/Hqj9clMZi
dFYuhVFGQzCHJ2wIcaJuKQZiNCO3n5b34KcXGstKN04XJyBBX2DemFj89F4JPX4mbjY+lwUlQY0k
AmTf626PUzPBCzyzOoQlqpWNqLqy7fwVIaslwmdQUtWt00GzyVQICdIAHkLArrs6ka6kHaTQBj7g
KDxsA7o4VnK8Mvn2JWst8llx6OtjK3TRLy9cHdbfxmSlaZXH22MSbTVyL2pjNuY+ER5cPxPAVLQa
16VjGBW9IghWVn8OcHl4A6Ue8GoLeYh5huPOrGFnF/w18G50ZHviq0/GFE7OoLI+QDDbjjVwcRSo
S2LDSjrXs/5pZ0BYTeS2j2Wm4kCumnjyhXcSJqoxFCs9PHehl38Lu/J/UfcPLdtb+O0nBjgVtYFI
fnkdpO2+gQgNcrR6ob2cebS8WEJbdf7vY7gJjmLsahToRgRGK+CR8MSepmemEKB9OaQHpLiTyycm
oxli1NQsxdH1SPDIc4sKyfgizGhvlPMDqejYnDLJ8Pqg39AXAn4+AMGmdQikNTSdeW9bVWldmMKA
JoF53dNO66Fw/dSg37XlkyPu8YyviFZbMkcRqf9nfT1w3/skSf/YHK1ADeTYe84Lw54bd+TNPb71
Pd17Zdj1XvsZqbW3JIpuFduPuCEYmJhd7WIpai1G6UlghpMJAJS1uuvTz7TcnhdsgBWtla5i9p9R
g/PYgBmftyBWeOaNp3045CdHDPJ4KozIk1jIka2+tcqLq3pdUECn2iLiKgORq3XdDlftL4h/bgUy
zsvtspTV+9nS2quTm9EK/mW733ii824WHI+RoyR2D6PJAY1jIMLOpwwtVL/R95bZFeUa9LQAZBvK
STGer20n/01ULugPn+RUY/mNyxOBrfgI7ZOxdMzJ7gYIOoYKFN3AWw7EQ1G62YLJVqjoWNXXBRIn
O7jtikZ3BY/0H0OgBv48TmwLKIoAWkSuC0yawLQOoBM+8jCXRgyI/Blw91UvuuJSQ00AyWVmi0K0
fe7SSlitb3JwzKHp9wy4q8Qd/sCdIq/ex8vD1fPcx40/GVI6u042ZdFGogfMDxI7kC+hP/fBp69J
FUslxU9Hn4yUvbG7Qg/MZ/jckCmlU9Oc6whHzuVE5NFm8PbLZtExIuIYbdPTLwA6odr8deUbqieT
rOWp7xXwBYHcdaN7vxj+m9B8Q4j6qYXDkblWhpf8Q+d6g9n/Pwds9PAJP2/f5kqRx9SZAP3c1WjJ
PZVa3nxRuOQ3CIQOufUPn2ULUrD/olTNy9610Y9DCtLLi98KOZu8H4+AVSC0W0wRtywK8pWMTOE7
fCdVkvQDIa2B3pUUt3k/BYLS+0+u1cID8xZnkunWpdidHdV9wmhBQIH0teDPz4vvsxhcFA80sHHY
chMnzRuHMLODejfERQrnhVtAWyrCRjjDrz9MoWFtqTIoDk6x3+fS3H6U8uDllkL+dyGut7z3qb/9
rB+kfLfpmmcZ1/QZ3VAU81jGCUNb1uLmJpUDFbM/tTU11ARqsd7cfBvO6l/u1EtO+E7wlpHmRW5L
gi0Ri1m5vpSM/t6TR93URqHelCFZnER3pLNSl0QaWpjRieCwG2wlN9N5Mh7ElqW0aIOpS3Yb47/d
ZcAMYmBmAC55MBKxcUvo77qr7BLzRGs9JegY3fYE2meSSFKbSpbJrOS+Qh9GaQU0R1Zdsyy2NJ8E
ELTc79YEAgZC6Xn3HbK/GIzJ0bmz1fjX1ZMoZur8U78H4PiPgWKIPIbbV7aaPwgcMHkJwchYWMNs
QW8ij0FBvgRfvUMePp/XyPalcWuZUH90UQQtXe7zW7aq3YWIXZKnGVfSa5fY1C2jDBtWg78iOmJC
P72eIzgSV8uDksuGKScgNd+BJ+qoko2iI+5Hnt5x33+HqtMwegHSLJ6Dhq9CHT1hv1t4Cxjj0UAO
qXtxHHCHon5fEb6zxoMN+XY7j7/Je1Vv4MK4N0T7LDMQ1mcUIu2guoOJ0nn5k1tqWiob5uQyVcE5
f3q0LLy0mXTmivos51B/8DNH1ArzB4QmmU/7BvuA1QoDBohg919DrXjF49bOJSxGVujfIj+sHhEr
g7nsB99u38Hg4MHQRGhqcCQZIHtW7z9siWtT8bAQZP2ALVUmJgma0FlDUXYW6Vrzuwk0rhJI2sLH
VvG3+eIG+iWrGY/tKuWDOxV9QaNOCHNxKl4LDZtbKpertwh6fET1tTiFe1nz3cu3Puv80HvUuY7y
Ep3Ssz5biuBHbaw3WfFZputPkXr7OZX6xZsBYmfQJfZYCj0EjGyD9lqXXwf1SGoOcVw/Tsj1D8E1
/tfhCQYhEovr4Roz7vh3LPyjAst2RZsdOU87VAdiAuFv0i6UkWH62TP7O6gpqYnZKFvvZer9EiXW
dDfElxdUo2rzKgsb1wXWUaeYPUshljxBwV/Abioyj7VKVFvQ/wOZNctxT4Zudvv5+J2VMMMkl0L7
aP93MAiCds58a4hbZPDnACw9sB1bkaxAIeLak7OgAnKAAbdZZB3K2B8zoB0o2UU1h5U50b07+twF
70+wjIdzRpNZ7HGxRaAm/lMqM4YmU/V3xJd7wrK2YtOHgJyN5BfayKCgfd6b0h8YaD6vNb38wpY3
UMX7h86CVXpIUN/tNJNRs5d0qR0upbMPTh+tZbFDYWlkz8dPYPQibStAsuMcbJBWBDnmlSoiybRA
G4P5864QDqfSRbqtp9AAE6xl+zOL7ZDvcnQ7JnHOkf96pKiTgXf07WFEpy/JnXL0Q6Or16eNZl4G
22Ro4zxVwvpS0eyklCZHXr3B9GwkISWzARsgEFfDb1OXsBYru9epj7RguvT95H3D45LUo5aiGbeM
5qlXg1foGwWsrGWjm24AR/iH4Q6HrS4RMvdVWiT+1Zh1pAL1mQDYdLmuDItB8EzppR+baAiS+v6K
yJViaVWechn2y5DI13ispKfeakB3h2CG2vbw2bvKbqHTddJvzQ75cJTI3rWMkEk33tI3KtkOH09V
FAfAyHoMw4kFgJpbqE+ii325AZQfmRjCFezHc2owj9P2Wx2QxgVlyhFStjCSTaariIytvmfm8tu+
2hTX/aoRKUEJOMfYfLGY/yjK55N4rTGs2hvFPLJn5+7pol8nReTykNQQ2hYZMne0tfl9LLQp8Xtl
xL108YhQ6TmlmUA8LwYKMU5F0VZYb6OuYLunhifk6j+su6E4W35WL/grTn60yF+FQVhsyVq16Y/6
RWJxyyJ6G0tVCMhPUH6cCbB/B9PEkABLAyaSu0CcaHM92LrqcZ9octYgmH4/n/jG9gWXI8Z04/AF
IN8PajvX9ATEhRROhwLWf5DAOBvtzyUyvNSQXhasTgcQVfOY0a5IdZw5+l5AY9XppHc0QBMHBYqa
+hOzMjEWGrNBdoLKBLn9Vrc9n2MndHZVJ8bGrXhfNyhLKIRDIwtmk6IBnagdtRs2j5BcGfOQT/L6
dlcW4AogdB9GoO+Cj0Qv/HR63lWGeCfExAVcQCEzRlKIIP7drPBvkmQhSCq2+SZTE+FRQlncwq/7
2RKFm9Ydr1VqqyZqnciLxAaS0cN6RVsEdsm3lkDLzfUC1DHiGYExSC3s0hy07PEK5guKVTPEg0qO
6F3JuElqWwOCKdXXJPr5646vTIVpzAo3FFg2YnEC8UWKU5IKyUSo8L043sTw00MFbY8WR3uzSqwH
HiD7kTHYsQ4AYb/mB6PthTF0MzhO7N1lx+pv0dadBY9UCs+pH5nvN/rPBu4TLqZ60eTlzJrx49LA
WxBFyFqV8RskwkYDmZbfVOEQ51HuKxu2gJ9/w6KnTPnOZJKzOS+Dx1zU8w+HtWjoFAXfH0g4gL5P
CHHpkskxNcIzUzv2tQDvbW7ZBHt2kDqxzgA9kexwIw82tyn4fVE6xxeGuzlmm3Da+vptxJx4hA7p
yLGNUtzQKBmczsZC0CNWqPXmYkBIx2PUvalO0fvsTMfyn1A7LJGGuVA5o4StkiyTOK/yGdWKlkew
sgySKNmJ5j7CTNwIwGnbdXXNDv2KigqFSQN7hzxDJSy4uJ4CRaXPtatNiIEXzMT1ICpR0FL5fRSp
NaAE2GGXXDTQkiQOzpe2g618iOqGTdK9d+hOcvDd/38dlMhQsxxO33xp0uHSn6i3aGKhA72fp84c
nW8PgFQeeEWYr3PCn7D4b8AO5fGClZnoL9d7oSZDNKDLnn9qzG8uot8Cp9QkBpQBu4yrgNOWsSLT
1f2kiay6qMtHkjMgIpy6BiQReTdyh3qjXTRysP/Ri3cmQqMfGbsgF2nJWwfWUW3wI5+VFAUCJlc8
zRFbMoa20y544QzEdpoISJG3ZL/avGQCZIGw8BFWo0Vmq7xIU2ByYsq+fTFwz8o5DR/tve1w/TmM
ucCxF89FQ1rZTCPkQ7fdIGqVxZ7uxU3wNtAad/sewCHmKbiARUtrcWyc7ZFYs1bYV42qpxcu8hIS
ev9fkMK4VOJqUWb2hBQOHCgnuS0bKKL9pkGTI61QiUlEMXKJnFdPFT+HptvjoHQV7rhE+pFqFZRo
pN9Dd7TD81t4xH1ejzACvo93xe5is5yoGirae7K8Pbey4qNb8dkD05ovHGzeeYgTGIzEBe67NI2f
jxcM1wj7ToGIUn5mbbnFh7S9kZQ0KUtKlym39Zhk7yuj/Xbr+rRDx66sDiRsocnH7i4A0BonCmwJ
5phKu4UbYGwHgsjXqfEsfB4Y6jeQjyV/HHVmZss03+7ZCWqzr2DR5Dat2sGwLjj6r50vhgUvpOgw
XDhgobDz0VzqZXcc3bDblCa96e0771PDYdosVQgpvU010WTvt2+7r+wpiOuO2/f63PSDzk9AQW1r
C5jRyxm4JS6DtPOJD09du1UYUwF++aO2ppssWYinQh3FDgU0wDxXK7zmIO2gXxLyGSlJkW9Ys1mW
yTGcfjzLk40PFP9V9gJYcKTtc9hNOIgYK6n9PEZSnbSasGbUMKgxUHmiB4xDkLpfuP0+JFiYsDqH
KbkJNhJigg+RAemGNDtfN6rdAi00hbXUITmH+6BdwKej7sQLNKHSv+wdd/77uayRFHx/NF6Rc1Rj
deOi6KmlZGcSR3T35Ky5hS/j8gtZAUx/daoljp0Zs/LJw0sxG4rCAGarVayhLXrx5Qyyodn/U+gW
efSQHvIHAM5l6O/ztmiWukU09pgiyPAxfa1aQmYsvtMPCs8PBgzE+Y5iw9EWwONYU+JhTtp4Uv8Y
ApMjqLv7SV8hG6fzjCoWXXBfAbf/SpLeb6vAFF3LVexlbMIp3tn56cLR8n6Qm5PNDEmfBdC7mPC+
YAqm4W5QuqfSz8dUqpE1xjszKZum0cgrDh8l3OrjNjjM1Eg3R2Bo3MF5L7A/u8R7/qxjpV5jZ4L2
XQCtAZmzJtvkoSRBrMUDQYveqrGUF3Rn8bSEOfvcpMm2ppkYG+Q3R57z4S/oiYm1ORt9gvOXWlRb
eS62BmATA9MKA8LHfz0sqK+7MpDw0zenSpudDDRuz4JyamTHlpbKDHuN7XETlqRh3hKHdgqu0Yl/
hQrSNak6dJOph3+r+f3b/CxyleATORqh0ORLNnnILZaigo6Oaezi9T0/l51ns0M/CoR6rm2IWVRs
oML1gqFaek68grAhpNixjKui9XNyDhSSCL/+TpPZhaHgMrB+l18CftPiOg36hcW3dmPYe96F7wP1
JiFFBQ3M1pCMSx/p0kmPRsT/ZgkE+HciE5nZaB2yYa1F9B4LvMTOPFkdXV3x2hjj9Pe9Z6K+UWqm
kMV1WYhbyUVHDye25w+4bNGs3yNxfcxBDvNLAvVeShUEEV/PzoYglNzhcvHqj3LLl0vrqTpxi3kP
PZ9Yad8fNqCINheOqY4Nxexvtvspy+pbI1q9D/YKOPrHep9Wst2DugdGoWGxs0K46HUgHomzVuSN
ZC4lKoR7rFiLu1yQWc0J9WY5zrwEcqK3vCB0MbEZbGtpCU4hJMTCrTUwFqeY1L5z1RUy+34lLAQK
xZWacCM+SiNkfD6DsiZ+h1oBEKsjv6AgjuIRBYOU7eMwiPExWXGz2xvGEyLsDC4aienSHLw7azdL
+/hkB8/BRs1h9VupOZKNFANWIaf5JR3jWWSpwcBX002LRrghXxBdomDCo0qVSyaPcPbBga6ELFpv
ABV38BQCKyofJoRouBnVXo6JIvoHWGSnLBxyUR8Y91CPSPuT4PAx2B8qlpysNsJvqPcwMXbp98GW
izHhrb8fxj5Ao2ur6Zp3XILrD2TwoesXQZcRE9eCsbuhNKoB0XeNCra5h3aRgSmjJZOQnxyHaJQT
NWglJW+0bhKOw79XRA0l9BnJr4tD8EZtYXW/WAf9356UQ1gWbnFtCfGTndhog1zzwmtnPWq7QwTK
gGWV/u9A4tQyBE0pyQs1FEWPp2zbIhArBhtWqbAYCWfaRYkVjC7RnSx7JQdknbUAO4q6gFhsRlp8
27otBaCaI+ZY7l0uw5eKbm0YB8uPX79cdNAdAszVQpKVNRHSBW3P8eKI78t5gDQYYqZrMylvmhUj
JlpNnx2DoXwVWIZD9Fc+U0WvFpaRjf/pIGmUvA2cXN5gLRfySjGD2VTxN8pq1xV/4q6cDkCr19y2
8A/NXv7ChsEuX/+HlN99T/C57QK6Nln9X1ZThalAZfk5l7/F8tXsEeOhWd/O5WiRXJlSPZ7fAw9A
5yBpFYFHjxvah/ybrDykcKinUITUu9Y9q7cGol6/FaIEmVA6bUAARfyxCxFbQko9P0I5oesrIxQX
BCGCmQN89JZApScAE0tfEog1bFld4SUJ5bhDG1D6GL0PKQJbJO1eRXFdaPiFjdZqh03L1/gaYf9/
XQHvstLQePDh5bU7GbBOsnT6MoCzj0amTFUxHfGdC78wYigW6d7ulYawI1c7/kttiHvffz+sqXwV
zGqFZN9yGbTgZGDSsw8ReT2/8lKPmwDP8Z/BETcAf4z5MCp/EO4lyKziybPlk9Y1+bucZrfrxWYY
2enF5nPPs+YY136muv6OP990prAPJFb0ETFy/2E1PTMPz7fhJaYhtrSBmw/ZeKHMabee7gqLVcXj
IkVj1Y2G4mOBFz9RSrOH0iCS3hahCpWBgkUth5xc14QDcgi7CRsZSRhvE9aruqkDU4fnIh6l63Qn
VDBVtX0VehbesIT9cvyeu0djsCAH55gCCWpu1DodbKxLi279ZsGGrvw3qX6PJPl82vReJam2w+ng
8WrQNUInUDehKn68J7FPAmSaQ8IixK1379p0ppy8OnPbqJ3yrGzURNEB8NEHsEvN1vuILlw2pvxZ
b5rGdD8tuUkfoD6RUhU5txWvMycmIqGaRhfTf2UQimYV6bfzEETbxk7zY2wGgpd9Z03tH/mPVgu6
4ArV83A/o232ZsBFjslkVKmxYvPnBVQEBg4uxtoSC3OwWuYnofS0JRZYPLXCoeaQEWykK57C1pbT
5q3WvR8p0UD+yagfusZc4MZApQbNwGfapOUogwvzAhrLLIlVzoZ1j5ikU9cx1jTmfc7i8uY0jpB1
SfUQy9gVPeCTybSsE/I+baaaQJWC3Ib9rfkeJ4o9b/DYxXOchIWzlPhEN6BsklT1c6OKL8fGH7iE
OwnPIdhgVdqirNq+IHxzUcn7bwR+fqr5OalpQaOknhv4kGoVf7M6AHz79u7EiQcfjuEwQPEs2YOj
K6A+g5L+FO1JQxqTicUusa7+6BWRAfPrSDyM/ocBSp+NNBKM3iMlqCKJqrULd2HZkmFlYpQcKqrg
bvzIHVpDRmj+NL4hFpVNojU1qu8Bq6X5U7WesnPmr3njyZZIKdJgBj0BqArO543ycxrO8qVfTYOP
zPa6lMZmozSc5St8loJmiUiN1lszhxgoffjyILMXNlgice5y4tGMVu06fIvO78rj5v7oYQEanBVd
7zsvCHjKwBMETaj+q5KrSEvOPCYYBrHc0hQCubrg+PRBHsbISuyURFri+AgS2HqWqmVoNYGb3+w9
fBUz+rafKNP04W7w18ppp1OToLIRAg6NjAsZ2l4mKBFPXz0SjxhCJ1vDAPRGNQI6NbKyN4m5967g
+WDiak5hPL74x7adNStl4hfsk6pwZBraNZJmxhz/nArIHOgQ0UrpihvflT2v5zXGmMPSyfNAbTYP
roKC73CQW3CfrMa0UDAXBeaadA4RJOYhRES8GnDey0QZZynEB6eUnG00DYLj9GpTkL8QBDscwVBd
Hptt8Q27ytHpw4DTGMP8PdPcjB3nUrIR7gcQYZnJB8Yzet0LHNP83ZMuE6W5SPzGuXTef82K3nAM
LNq2EG0D/1EVhXvI3PoGHzZ74sBFU2cPbSdDE9Alul2naNBN76fa83rh9yKy2Msp5JYn3oN5mS0I
wYfgvaIxdxLNJqkngPTEm0s0niU/jhplNq92VAbaQLqka6gT6igA2N51dedhm9xZb3YboWsES5c+
FXNnR6twpOSyIZTku/TOIGEtRNingBFRnyRchryAQLeVwwpajbrs9CfFKTnxa0wOyrV5lpDk6sNk
0Nmu69vvSY0wiPMqhTpEYxlUqbee5zxGEODOkpRlW8ZmubEiTrKV61onppdijdRxEU4bnvmjVjEm
yTThpNHsj/ECB+5cKDyFo43NYn8Dw055EwQk15jQQqULdkdDN3R3KRWDtdXLWpx2419fVtETpsia
KW/uMNgnIdENLDZyMf4RCEYgvq2JCEoV+xaAGn3HwD1SfX7ls8GP+1sKp6LQGPlJhXgffLnD6nPV
di9T9GavagIWU1VC3HIYZsF6DwrgXnLHq23dnf3FudUzps4Ro78H+0PIW3pYSBt5Nv9eN3f0tWMQ
u0gr4afenlt1U7kw7KNFJhtQhLXwh/6IaHcMEhaUCDmX4rHmARMxjqhpMIlxUzhqA+0kOiel7yv6
T8gxVIHZrwdgnAOX7C0ukx0OJ0X9VMuIjJq7KU5iWI4lXEkK4se0wE5NUHdtjdoaRlLCRUAdsjX6
9vNPYjKpuZpX+Yi6FSdC4DQZhMslSRI013mxlkW1tSrMk2ry8MWPgX1EZcWBTnhUkD1eqWRYxDEA
1Ugc81W+u/SmWTLL5DwFN5gU4GaVmODUCij+BWneunDnKvW35aGfy7Z1dihT1OrmP+5odsdNKbrR
4QNMvtHt7L+QKYAza/jMxtoXaCyU/hEDe2fzXx98PTmj5+3GhMpfKq0llU7sGPgD6q/DTtg5p8Se
b8pynOpIsubX/F7K1M/PNMwR6R41N5afX3oCPYoPbsl1wyr8LPNitn41WnXFFy1H0/oly7ewZv3C
jgWrGCqQ/xRTWG3dFodvuYFNk2WCmbVMuP3KMotPRQFkk2iyBIUCv97BpQ6YbfXowucvyEaiyblM
Gu27yNeTvjGSxn5J9gfA8ROLabOuCIsY4ET5rPFBjdQdddH+byC3jlPrO1bNnr2fkZa7RicXeAUZ
8XXQ71KmiV530OY4TGbXw92vEoCbHHXKXSL06CHQyKnuC5odl6FOnweQH3ma6CjbsAwfU/aww8sP
iqSFaBkRznDYkjB9lZB/IXQjF+oetRHRXhGf4W7HgLheRU1YxtvYnJwxCnDwYO7L4tfFYYzVuece
4XJvO3qh3QmxEoIcn+elRMkGMLlM648nRtf/l3q6tBZHYPkcF6l9DzmteLEZWCchokLnWFFECBBb
adiZi72L7lOPWmQICPuqLsr7HJJ0IOHxjsrzwgHup56vpAwN3nI9FVjbRDaE/mx8rKdscSj0akvv
GNutQS9rBTXu+nLyx90TrXpCcyqqYzgV0TUt9G5zLy3do59DTTWhVe0Lx4cG6sV/odQsuNtztOio
1x1IS0XWS718PSxKJ3MpgUD9SBXRIQ4K5+Q/ITNy6o3eG7MtHCaVtSABwwqPtiwerLQzGBCHb954
rSc0lRKcJFvzwlPayv+opRVTjOOMaMyjW5oTvA1d5+nbbJG6SAVa1LnHNIvKOnT8QJkO/BuSRqEp
0wcJT1yDpO+oUCiicEHlYS6hCgW/6QYy0dnbZsbDwISrL7g2l3UfOLg/2oGPtmlbKR2QQjkGzM3F
n0zkfooW7DkvgzLwrxmhz/i4Sl/uV7aYlQY9u45HPKWl8Yb87KbBmWq/Eae3O7/iQc3HoIkjlIzW
7Ut6yjrUZvt4WBxHfFkTfywPr/dscUH5Y45qulkMYBm+nbs7W6O9e/Lk/HOkG1vqjY4aL08sNLpd
Gwyh21h/e+bo1W2SZ8RST5R9ubhwuWAh8xF+fd70g+InaA6t8AZ916Zm5akHKTmxOIZuRyBVWpjw
Rkh+7QrPixNFl6c1Aj3mr7/TyDRwbbV+LEw6OG5EZ13NPwKeztqPCP8y7bCx1oxC2CxjU9u1QIWy
RWJP0OGVd9qmcOhR++AlhOlHcwQxtE8wrmd0UB4hpBhpm6koTMeH5UhaxAZAF2rchk7Q4xssdkFL
tpCgxJJo4GjN2GQld2uq7XZShf5X9lN5O6s1/myoqf7bYeH+5fq3+VCiMsv13uU1WFwJAfM78/O7
j1SBi/wxc/oStbdO/fedvCfyaxKG9FDuU34GYMladfdY/XBzpQ80KoEy9sehebJtT3ZRv5WOnY5U
3bfGZe6A+Sdx4H9ZvaeerUJkWaSpAMWLQjNSBtx0SV868Ko7/cCM7RsbE4qc1a3Ano7pokoNe+Zd
J9bswS2iWHpFwVvYViiY2fCd/0Zc1CwMQV/jXUEq16GwjsMP8H3YZzKDSNpWl7B9zYKXHRKLW5Ry
6VubZfh6TubOyKXKPVCNAlSx8+ggUCM8I5p0EL4kJ4Ks9iPDJPk1bV5SfA8dK37Y8OU6LMJ9ABtl
6K7qgJ/ybv1d6M7D/NEw0lrAhA14zZE+jlMw8ei3iRpHOLKWosjhsMS/RKBnCzc44O3FiJWjmCmt
DD/F+sszBhgeBd5MkPf7cx8TylF7uMRPRBmbwHbxeJ42ZiQjzFgoMSRDfSq/xELnEbJ1dMK1xfQD
0HfPcx8ml42f4rqWPSY8uPDMU9S1c+Teezz7Dy5/1aSMkKysLqdq6vLDYlHjKZLa/+zb6I71E3Lb
SYIhiGaUpyjPVBALl3tRehfBbcArsqB8Nr+F/8ujqVDBNeIBruY9inruWjqyopytvak6S85jUVfE
3M0gmR8QU++6Iyv5p+Grtsz+4YUt/22g4EYwTV1eMeWtzrUmdPbOlmOGPuFeB37TlE5p8EpjYg9l
Iaj0Xa+Ib5Rz+O2ogGq5eo5ngm322s9csAbVzy35jyBGTAuGk0cmfbe15cVl3FmH9DfU8bubL3hJ
YULepDFDAn++66otsXY51tZn1Je9iMutYvAxa+/JcI3t22QDEO5k5FNiwAZ3DwdnxHfBYzIEg57L
+/aIARaRjkX2gt7p2MfhDEXlfr7MEHeBD18UHZyqBP9m1ctaUtR0MtiuPwmjQxH7Wph++FLM5coj
8PUjEysBSWtlfvt/JYqayQnnXW3BTTMT1CMghm5mVoF1UnFCehy8T7URwDYeJjD4uh0Oqwr5Ikdx
aBxDbtTHbukgc64ryrQB7HDmNiCrn6ZIiHpQYuiEzJ0gVKgxeeqTYLd7PefylRnLlK4dsGKpOzmS
QIm0Ai5QindolBY4jnvJR5J7UqPC5OpqrzIAlOPGbkWYM0QIXXSTMbDmlwmQSLbQkZ/LANXEnSMd
8q42fkJIoF/RqjU/jUgufVfV6OzJldjELKnFwpswl2kYbB3on+1yg5ajiCrcxtdWLWclT0RP6/Ju
FhiTsOVoLAd9/21dATAiCWNChryMZsPuM8W0/wFhFJpAuatLUA3KxOzolMRR2vFfeVJvcqMJKntO
IEGhONOqH5vLsUCVeJMFW0rVgTEwhUOc5gBFKMByXPB1eHq+1ML88XFkMy1XzJERHn6oXezs46eT
aeqlD6tD1C1otZu8pdXd89rZ80gBZfKC5vPWuQJ6EBs35uS8KjQMYW2WuYlTRC0Ri6eycx06KYLT
j3zp3YNS1odBH01ti0d9PCkxybnTpNvnPpU+FbnIDQoIKjBSD05o+vW/2Mpq7vePoLrbwqGl/gqX
kjnTxNzNaTBzBoK8HkSb6J+23Pgt3hVnBnq+CapsZXBTMgyEsEs6qmHicKgjX7OiYjsEz63nQ3/X
XJ7bJWOpvjAAGqXSGN75GZTfRmXiZOZUjLRikBlwGPtADTseT26YrebY3/uAfxU62QIIQGKiyE8x
1cJFwNPt8YcPHe/xYke4oIJz7yDvQW1lyvjhBG9eDTGiE3wzfRN9V33K2jUTYE0iJSG0Spr5iAxp
GJIT0Yc5zcLW+EoXowAM8TGk7keOyBdHLGKEzv63BNQXJbY1ND7pED+Vs8/AT16Rh/lpxDE29iEl
pA1BLMrHn5A6pa+roo7IKYmqTQ4dp+/jSLUabjuaIm/QQ856+filAK1urvHe6AULSuzZKPFeWoQL
hnaoDLjQPtFTagwo6A/B4K0j6mRcyABLWpWJIr+NluPGnSi7w+iE63CaQyPfpaGBQIplu04+pNat
IJTvn73VLWPQc1yRBV+pNe7OhebdI7QP3CCittwyHcF/v2prDAEe5zHqnwSLOzTTTpAbqQyaVnm9
XRuDsu0oSoQjk4pTrH7Ei4uxytMzlZPnGORM0Ua/WG8kIpTEHB7z3rFbsyM+Z8PXp10smSSFQXFz
J/egt7EJghZfqoLjIXxge7Su5txVWYkdQlH50/PdQaSHJS43Zam2Q1L0TXiG7LFm3ORY8ZihDtA6
e/qa/rdEsQwqP4tF1z9ltSQLvSYr52q/PpmdqNcQGQopGdd/thrtZwhd3O3OA5ELTa68RI1ZJjxI
dkSHb68CXYwe508+C+LSiekejErYotkX9awPePLpbXr4CWqeW0aEJdfsbphTaw5x9Qi2sFjgx+la
Rsb5uyp/2AkiWO1bgkyy9LB6UFyiMsbMKYuk4zTPhkQwuBz0bLv3wbDhs+cPOb7sRWp1r3553aUP
s9oTxxs+ULtRimH3qsWBpqTcmzFGT+m1AFSD0jznASsE5xYSt60bQg9eRcFa9s8Xab9GwNv+bcuY
vMZsvUHSKGN9SZlJl2YNl+L5xz2IVxI5s1WRlkXNffIdoZ4I+GtVaM0juPyCR4ZDbXmONdiy70rG
gi3GjS7q8AzFkl6YOwsAVlpjrZB4CHWC8gKIij+MysAUAWc1P1ILgbEmq99EQJIDs3iCtKipCXB9
TtWllFyLxK2QjT/TpuDt0tJVIID9/yiIuBg6qXOLloHSlEpR2e0tbc5eARLikf149HI8/cvztXWd
75DrhKqqV5vh/TiDQ+8vGsNuvZdaGu5vEl8xPfWgKOcedb0dFvr+KyTtDRbySVBs044LcfAHC6GR
14tH7yG+EcJNGjoIoH+Y0aOc4i+jILchj5S++fuEiU/liFGdCC1DA3Gz8KsXa8KVeqg9+H6WtHSu
yrql8ROM1o1cHP5fBN+02nnbU76YzdzXXo6bl86yHxeklrd4Dh4YDrv9nL1c/1PPnTwPvjGlTaWt
utKCNSsibGM1l7Z5CHTHkmu8KU9Vi6cPwx2LVD9q0mblqENtEM2KBprh4ktF307T9z03S9BZf2vN
Jm6KhvLgAOsvdCpyUaCOvc/pPuNa3n8Yx5/vzqtPDzxe2ewWPsfxAOnQkd61XNup8kSddhO/M1f+
S5okqRybxI/1T4cE+cIJI/lMNXVc/txs2y9Jkl03fQf4UoRHi7/Yu3jzFB3zpeCv3kNcV+3QMDOG
clEWkNCzj9F4Fyh9/nASFoO9BKJZZJFalR8YjZ+E3WCGDHo/j83eUO0fZTimDSfC8cEaOKkLqjbn
nUGfHsZL7hH41CriXmTK6WsHy73aOvjfqUBcvZb7H/otCe/XKBlBFiXDNyG7Li8nAFtVYXnzPBS5
Zgn5xLbori+OMhz9aM60twVYVkBPAPoFl0mVVPaVjg3wGnA+mfweAF16B5f1BdEb7Z/MpYvm5UGZ
g1kV8pEyXgmq8siu34bUisPGsL9jzNtlLs5yfzCzgcVk24IdIb3bG51D8HEMZkwS1+9YZJKfRgLv
7Y2KfcRDoP8ANngLDZmA2Bu09+rHaZGilg4cNqcXIWr7eM3MbgUJoT/2OypgrznFVT2Lh6HKEUbV
S+s4vxqBLQGPuXbvBDQCmUKPyuA+FajRVYTAGUVMCwIdJZNXGfqc1TuOV3k7QVZ42wZ435mvIwH5
lw80lLQ4kjG/goUcZzjjuTD4sEqXTwkNbbTG5wK3iaErqIiOeWNuFn2Bp7RLGP6KQYaSmdvv/LsK
x8xB6kga9OQ3osXrykXyWj0rpXwV7tv9v41RVwGLk1rrgzMs+hv4l1ugRkt/8QlyFEgPZzigetkX
hPC70rIBTW3R1Rlv3RXh7lKN8AmN8o9GEiLPKtwVB/8XvSrYHWhEDf+VEa1/5hxopMVX5xVh/p3R
Im7bwX/nzk7RkKb/qz+0eld00S8d0Yk7CSBQ+hr9RYWEF2FUeReyyhnNCT9Dx0byDv4gZYge6502
+Y5A6XQfNTb4osahuUhtWV81LuAuYkX5AmS+31Os6Q0w45NIrl8KKYKqI3CFnhYNuHTgCpMpNLkS
J3FMz49unOkRNQhkFCStGUJZps1V8/7RjGln7m3dfzKNx0sZDUy/w+2lepO9p0B1aLFIEH/dCb5l
qjGEeil/n5Kl8mnqAoCO9XXhjuvCX4CLEai5iscM+nZn6zMAc2y0oe+P6UOiuPrfYy9GApfhLd1X
Qqn6/tvscG/xni+4riAszDrT9bYZ3MB8SA05LmvawmEV9HEVM+Ojrv341SW8Juz0dFgXUec0SQKE
z4hPsi7yJ3zsFfsO45fQwbf66muAg7X3T66x4KACxCErhJkXjgTEZqF63y8bdDlmwG9rEesPZnp6
sBG58SJinHHVg6OdV92lTq0FJqSOXP/baV6I6XkPCpXadhUPmrTUJTbIoYfPK/ykVzCx0INhKeF1
Knv010zzJqVKbPiHvnK5YWF35vFsiJ6IdJKfVzvXQ/lQRN341B2esJF6hWpsAIEMVXN9/bU2Nx1y
LVfe5KxgQt7XG3RsN4XSq1XRJSFpLNP/XecNo37nr+ILWfolkOJkmdDebqHwZ6RzjoqBjOp5OB4/
iEpkw+oTt1kXyNlkeO2FQoYB8KDkpcpVk6uNH+OcH3qk/77sd6GYPkXy4ke7JQooeQPxBgtcP/kI
0leWmHziOKldnPbU/Qup2BwwN5N3q/x5TBBXNI2Ym67+CJNjaG2OOuO9QL616Sby1wWHLB2rQVPJ
L3RJkrh08W5/h4505yv/B5tPDvajlx5ociVXGB5sFkb8xbMZWUnXfRtlzA6y08T2fCDXZ2ibgVlK
YI1PHm67/aeSSvidwVVVPbjnXPhWUpxZ8Clhr5jDip4GxMxKIQsMBT5dxfiHnWz00NWI6B+Rn7fL
lyX5Kcv3jIhJsR3bQxY0dKYlEyCS161AkFc3hxuKl3GF3+CITnL9sRvOl1xhx7Zr31qEP6lMijJd
dxyIjN4pQlu/08ff4kQpiIhqaYby03+E4RpRZEOhy80opku4rBx9RNziOh8YLIcmGbMLIpY2SRc4
H27mQPLQ1dXOpdUACoB6Z7OwrrAymS0oJ2aA0M+RhqvJ4Jcdo7NvYpx4JLCn0GSnBu2KEksx4KNt
NY9RPx46PXf8xZ2hP5IFg00QrWuN4zs11j/RO2pUIy3TkSI2ltvivZ8k6LDCX/9yz3MRRSVs2jac
pz8gcwJ2b4WFaX0KrgBCMy6IoMyLC4xj4SYESpDFKtVi5O5zvim/Lb3txQBdBvcP7+GZQDNhBLWQ
afoPd65/JvaTbWc5b+NuncPW0odYYQpkHoNh9yan91FZXTy25QlQHS1coW0giDaJnqZNBtT6Dk0e
XygdiJkzr6j8dJZSWksJxdC9espNzHgOirt8nQJooGYpQraMw3RA1W0FDcATs8DoG5/JkUEryw8e
Lr1HEdYtT948iDCErrqcs0G6C9ex02D/Wk4F6BNvnrFHwGdnFxsID7NtK0y8T53bzokZRz8oGxlX
kGB528Wh6YTaUQRY+H0IMVnPz0Lw4i3CCUO/z4h3aM2e/Oeq3NmifoPcYRWBEqnrTJBLdOfJQnBw
wwiGG8NCLtXaAJuMPklVMrB5ESkZ21u4pveuuhrEKUW9T/Yz+IrSVAQVVuu8zx6c4N3Gk3Dw2rMr
39H4ztx/k3yhHslCPFl95bhsaOllGbBfZwEYXIaQ52dhXwU2WOvMKQSATPFkdOkVhgrDIfjVn7av
9+nFhZYZyHDjVYooPqRV8yk5V6rFkr+Ept7s3U5e40zSnbqL3w9HW9QKQfb2BWY5DFOOULJQaMDN
S9fZioopAzxDh2/BoaMd0Mz9rCWCt3KtRs3vArXN09LLUo1Y7oKfuRfq79vQJlNQy8qm8VTNfioe
zwqUxRdNXjTHnS3BfkzhWnudi8Dyvwi/gfKX21vUYWyDb2dWebN3IfjaH2LIyIFziPd5CjO5VSZc
sc9lpbN48pW5s49lWGvtKwV9f7JlVIkLs55YHsLXCArwz3Kev56raoh7zP2yyVrHBM8oa3VDrRrR
ZDrASvV+tB0g7yYy2r5IxrvJiFs/gGUVKXYqRapBuzRv7rEsIrqMNT8TqSwAnCHQttOr12e/6t0G
xC/9BXDivFKRxKUchCkUACD2ZpnNx3KN9oRON7kX8SxbKDxY1U3cWiRU66dRqAtMSe9zvo6HhPkd
vfDMQqZPLCsI6KspJY1GNT+sb75x4JsCeqSrmR1f+AcsRGYlCBGu2nB6I7VU1YtSDNZfTH1ej9Ao
MbjosOTDoD+5uOhU/eNDu8kEeC91vZue6WG7FCd+l3dwcIUDnML/9AEAIRgoUhRyXweqia5Bl8cN
PpyQ7w41AhUfIb6GR9U+WhIym1WvJu3fm0i4mSLLQzlgS6XkgTrXJmBz75jVJk6XsibWSlKRaOdR
lyG7oaQ5EpbWe+T5bFbOFYZkDct0y+zZfRxK+4WlT7fbBBAlaFUxbLx6pmK2EyrtqvVmMzuP4bZH
U2CkWC+gjAPrvMbqPjjQ5362EbvBnzt+EbjDkOcKCAkdqrT0fHuHntWUaIjJSJAE36ZHxk/XFQDd
YZpSy32i55bBn8xFrXFPuvC8KkI5wGdISXMbDcKSbeH+6fGz03h7E8E75yoiYdIm2l9/6wxMwvJq
90mUmKDjSI8F/n3t5GAWPhSsixjXiJfspsSZ11/vV/kohEVR26U11ZCuvVOhb4xtWqebbeeIFI3Z
17LGgQtX2KiHprsKOItUSEVf4YK7qhqs7ajt9FImF9wC3qoj0d6+bllvnqTQZLZul78CmcOH8f83
D2E54N8JYB8PazBob9uEepbVePrWYeO1UqpgfKSTyi81hVFOSf4jx6B3Va113UveoVHzidPZQYXl
bAr5FpJhGxSYgwVfK1D9JoybVLGYYyWxzH3UuwIE0g43VgdbRTKMw/kflK/1VPZv56vTbzWn0sYb
jfiPdIJGBnMmNEWHNCe1uGRY8yOXpgUIxwuRqNHFa3DAL4Ev59whFCroNZs+Q2RY9+maCMRQQXh4
abLSp3bYU80dr71Md6pBeMYEHd23MUM+BpqkYp1gV62/oYJzL6bRL0B5Z8aVHDr1aptde8nHjTei
yDPz0mnkCgsqOnBi/7TW9wJ9vp4KS3SlMeZ0GpOLGFVVF42wbKORoRA5AjiT0RV7HxWV0DzpWYXL
xbFqbKdGLst0kJ+grzXEw5+VZiPPnOHF73ZoBgQLBpYPnRuvAWOWKqg9bdPePA6fDIm9q3znY82c
dvhJRh3XSkGYKXdrcTXu6noFCAposWjZ2X1csPNPGurcky7jR1RbuPxwpIdaYfsNAHsEyrfU/ysX
mwMmYADJ0dIk2JNvVUHTF9ucfwpq2bOJ/G1NWawM4uVT1LUS1VDHCHiur76eXNc/6SdvUPUEIkv0
0Qm6QRpASMs6yiCuSacUO+aXCoOnMLMDp486X1lG1Yphp9qqAIplTy8loV81bC5RspvXC6XvblZV
mtorUM9igW9TdvxAQSM6vdT0+2rq5oR8MiiDCzkxw+rLOT7AiC9s91pfmKAxDXdnfaL4Ql+w2GbH
YysYCC5rIUF07HCKXbnjN2vKKln1JGAu8mtD+Dp2BvJ4WGv5PSfWKLvg35tYejw9D2Cfo2FxVpks
IM29EFQJe+wOQwnFxxsZnr15i8nHMaWANkxo+0zBu7bIvzM1JKKtYVDXJCb5WG1loBYqhGSIdSaV
17icSI7PlfP3snK7XTVU/8jSVcBzgTz0Rg+gm9rpT2Y3C5bW3bJxyoaPoFDdZwBzrhkNXY1eRtEY
rnXLz/O/WNQMMyWlDAmBqyAYQXYLfQzO0eIxAfuOqfLPMG9fGWjR/0C0BxFU1qX36UDT3Aywor/7
Vt6gwhNzrEyS9jSi4Gsulrufm4VGj5cFX2KHqVSuD5Cg4LyFiFvzIxAXJxAr1zXKvm+rJH4rz+V/
fGi5y7D0rFJvABUO/IdTIge9tjFPwfKpqKFZqJ1OG8bgUs6W9f0dBHt7h2Sc/LIQz5LXEXP0dIWa
3tFmcb54X/Tc2C6dnPkbTBPkl1s5K9X+txu8vkGLLqNsve7Yphh6bBwoDzwReBp+Fa+WJ0YAIxHv
u6zT+8P6fowDjD1Td9c0TgrDYkf0gqyD0N4=
`protect end_protected
| bsd-2-clause | 618058fcaa8b7c569774517a4f98aa71 | 0.950426 | 1.819291 | false | false | false | false |
Bjay1435/capstone | Geoff/Geoff.srcs/sources_1/bd/dma_loopback/ipshared/xilinx.com/axi_dma_v7_1/hdl/src/vhdl/axi_dma_mm2s_sts_mngr.vhd | 1 | 11,938 | -- (c) Copyright 2012 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
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-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
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-- performance, such as life-support or safety devices or
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-- applications related to the deployment of airbags, or any
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-- (individually and collectively, "Critical
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-- Applications, subject only to applicable laws and
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--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
------------------------------------------------------------
-------------------------------------------------------------------------------
-- Filename: axi_dma_mm2s_sts_mngr.vhd
-- Description: This entity mangages 'halt' and 'idle' status for the MM2S
-- channel
--
-- VHDL-Standard: VHDL'93
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use ieee.std_logic_misc.all;
library unisim;
use unisim.vcomponents.all;
library lib_cdc_v1_0_2;
library axi_dma_v7_1_10;
use axi_dma_v7_1_10.axi_dma_pkg.all;
-------------------------------------------------------------------------------
entity axi_dma_mm2s_sts_mngr is
generic (
C_PRMRY_IS_ACLK_ASYNC : integer range 0 to 1 := 0
-- Primary MM2S/S2MM sync/async mode
-- 0 = synchronous mode - all clocks are synchronous
-- 1 = asynchronous mode - Any one of the 4 clock inputs is not
-- synchronous to the other
);
port (
-- system signals
m_axi_sg_aclk : in std_logic ; --
m_axi_sg_aresetn : in std_logic ; --
--
-- dma control and sg engine status signals --
mm2s_run_stop : in std_logic ; --
--
mm2s_ftch_idle : in std_logic ; --
mm2s_updt_idle : in std_logic ; --
mm2s_cmnd_idle : in std_logic ; --
mm2s_sts_idle : in std_logic ; --
--
-- stop and halt control/status --
mm2s_stop : in std_logic ; --
mm2s_halt_cmplt : in std_logic ; --
--
-- system state and control --
mm2s_all_idle : out std_logic ; --
mm2s_halted_clr : out std_logic ; --
mm2s_halted_set : out std_logic ; --
mm2s_idle_set : out std_logic ; --
mm2s_idle_clr : out std_logic --
);
end axi_dma_mm2s_sts_mngr;
-------------------------------------------------------------------------------
-- Architecture
-------------------------------------------------------------------------------
architecture implementation of axi_dma_mm2s_sts_mngr is
attribute DowngradeIPIdentifiedWarnings: string;
attribute DowngradeIPIdentifiedWarnings of implementation : architecture is "yes";
ATTRIBUTE async_reg : STRING;
-------------------------------------------------------------------------------
-- Functions
-------------------------------------------------------------------------------
-- No Functions Declared
-------------------------------------------------------------------------------
-- Constants Declarations
-------------------------------------------------------------------------------
-- No Constants Declared
-------------------------------------------------------------------------------
-- Signal / Type Declarations
-------------------------------------------------------------------------------
signal all_is_idle : std_logic := '0';
signal all_is_idle_d1 : std_logic := '0';
signal all_is_idle_re : std_logic := '0';
signal all_is_idle_fe : std_logic := '0';
signal mm2s_datamover_idle : std_logic := '0';
signal mm2s_halt_cmpt_d1_cdc_tig : std_logic := '0';
signal mm2s_halt_cmpt_cdc_d2 : std_logic := '0';
--ATTRIBUTE async_reg OF mm2s_halt_cmpt_d1_cdc_tig : SIGNAL IS "true";
--ATTRIBUTE async_reg OF mm2s_halt_cmpt_cdc_d2 : SIGNAL IS "true";
signal mm2s_halt_cmpt_d2 : std_logic := '0';
-------------------------------------------------------------------------------
-- Begin architecture logic
-------------------------------------------------------------------------------
begin
-- Everything is idle when everything is idle
all_is_idle <= mm2s_ftch_idle
and mm2s_updt_idle
and mm2s_cmnd_idle
and mm2s_sts_idle;
-- Pass out for soft reset use
mm2s_all_idle <= all_is_idle;
-------------------------------------------------------------------------------
-- For data mover halting look at halt complete to determine when halt
-- is done and datamover has completly halted. If datamover not being
-- halted then can ignore flag thus simply flag as idle.
-------------------------------------------------------------------------------
GEN_FOR_ASYNC : if C_PRMRY_IS_ACLK_ASYNC = 1 generate
begin
-- Double register to secondary clock domain. This is sufficient
-- because halt_cmplt will remain asserted until detected in
-- reset module in secondary clock domain.
AWVLD_CDC_TO : entity lib_cdc_v1_0_2.cdc_sync
generic map (
C_CDC_TYPE => 1,
C_RESET_STATE => 0,
C_SINGLE_BIT => 1,
C_VECTOR_WIDTH => 32,
C_MTBF_STAGES => MTBF_STAGES
)
port map (
prmry_aclk => '0',
prmry_resetn => '0',
prmry_in => mm2s_halt_cmplt,
prmry_vect_in => (others => '0'),
scndry_aclk => m_axi_sg_aclk,
scndry_resetn => '0',
scndry_out => mm2s_halt_cmpt_cdc_d2,
scndry_vect_out => open
);
-- REG_TO_SECONDARY : process(m_axi_sg_aclk)
-- begin
-- if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
-- -- if(m_axi_sg_aresetn = '0')then
-- -- mm2s_halt_cmpt_d1_cdc_tig <= '0';
-- -- mm2s_halt_cmpt_d2 <= '0';
-- -- else
-- mm2s_halt_cmpt_d1_cdc_tig <= mm2s_halt_cmplt;
-- mm2s_halt_cmpt_cdc_d2 <= mm2s_halt_cmpt_d1_cdc_tig;
-- -- end if;
-- end if;
-- end process REG_TO_SECONDARY;
mm2s_halt_cmpt_d2 <= mm2s_halt_cmpt_cdc_d2;
end generate GEN_FOR_ASYNC;
GEN_FOR_SYNC : if C_PRMRY_IS_ACLK_ASYNC = 0 generate
begin
-- No clock crossing required therefore simple pass through
mm2s_halt_cmpt_d2 <= mm2s_halt_cmplt;
end generate GEN_FOR_SYNC;
mm2s_datamover_idle <= '1' when (mm2s_stop = '1' and mm2s_halt_cmpt_d2 = '1')
or (mm2s_stop = '0')
else '0';
-------------------------------------------------------------------------------
-- Set halt bit if run/stop cleared and all processes are idle
-------------------------------------------------------------------------------
HALT_PROCESS : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
mm2s_halted_set <= '0';
-- DMACR.Run/Stop is cleared, all processes are idle, datamover halt cmplted
elsif(mm2s_run_stop = '0' and all_is_idle = '1' and mm2s_datamover_idle = '1')then
mm2s_halted_set <= '1';
else
mm2s_halted_set <= '0';
end if;
end if;
end process HALT_PROCESS;
-------------------------------------------------------------------------------
-- Clear halt bit if run/stop is set and SG engine begins to fetch descriptors
-------------------------------------------------------------------------------
NOT_HALTED_PROCESS : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
mm2s_halted_clr <= '0';
elsif(mm2s_run_stop = '1')then
mm2s_halted_clr <= '1';
else
mm2s_halted_clr <= '0';
end if;
end if;
end process NOT_HALTED_PROCESS;
-------------------------------------------------------------------------------
-- Register ALL is Idle to create rising and falling edges on idle flag
-------------------------------------------------------------------------------
IDLE_REG_PROCESS : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
all_is_idle_d1 <= '0';
else
all_is_idle_d1 <= all_is_idle;
end if;
end if;
end process IDLE_REG_PROCESS;
all_is_idle_re <= all_is_idle and not all_is_idle_d1;
all_is_idle_fe <= not all_is_idle and all_is_idle_d1;
-- Set or Clear IDLE bit in DMASR
mm2s_idle_set <= all_is_idle_re and mm2s_run_stop;
mm2s_idle_clr <= all_is_idle_fe;
end implementation;
| mit | 78fbd8f0dcc206f083b401a1c0577cd2 | 0.454766 | 4.421481 | false | false | false | false |
sergeykhbr/riscv_vhdl | vhdl/rtl/techmap/mem/rom_inferred.vhd | 1 | 2,457 | --!
--! Copyright 2019 Sergey Khabarov, [email protected]
--!
--! Licensed under the Apache License, Version 2.0 (the "License");
--! you may not use this file except in compliance with the License.
--! You may obtain a copy of the License at
--!
--! http://www.apache.org/licenses/LICENSE-2.0
--!
--! Unless required by applicable law or agreed to in writing, software
--! distributed under the License is distributed on an "AS IS" BASIS,
--! WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
--! See the License for the specific language governing permissions and
--! limitations under the License.
--!
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.ALL;
use IEEE.STD_LOGIC_TEXTIO.ALL;
use std.textio.all;
library commonlib;
use commonlib.types_common.all;
--! AMBA system bus specific library.
library ambalib;
--! AXI4 configuration constants.
use ambalib.types_amba4.all;
entity Rom_inferred is
generic (
abits : integer;
hex_filename : string
);
port (
clk : in std_ulogic;
address : in global_addr_array_type;
data : out std_logic_vector(CFG_SYSBUS_DATA_BITS-1 downto 0)
);
end;
architecture rtl of Rom_inferred is
constant ROM_LENGTH : integer := 2**(abits - log2(CFG_SYSBUS_DATA_BYTES));
type rom_block is array (0 to ROM_LENGTH-1) of std_logic_vector(31 downto 0);
type rom_type is array (0 to CFG_WORDS_ON_BUS-1) of rom_block;
type local_addr_arr is array (0 to CFG_WORDS_ON_BUS-1) of integer;
impure function init_rom(file_name : in string) return rom_type is
file rom_file : text open read_mode is file_name;
variable rom_line : line;
variable temp_bv : std_logic_vector(CFG_SYSBUS_DATA_BITS-1 downto 0);
variable temp_mem : rom_type;
begin
for i in 0 to (ROM_LENGTH-1) loop
readline(rom_file, rom_line);
hread(rom_line, temp_bv);
for n in 0 to (CFG_WORDS_ON_BUS-1) loop
temp_mem(n)(i) := temp_bv((n+1)*32-1 downto 32*n);
end loop;
end loop;
return temp_mem;
end function;
constant rom : rom_type := init_rom(hex_filename);
begin
reg : process (clk)
variable t_adr : local_addr_arr;
begin
if rising_edge(clk) then
for n in 0 to CFG_WORDS_ON_BUS-1 loop
t_adr(n) := conv_integer(address(n)(abits-1 downto log2(CFG_SYSBUS_DATA_BYTES)));
data(32*(n+1)-1 downto 32*n) <= rom(n)(t_adr(n));
end loop;
end if;
end process;
end;
| apache-2.0 | 6d9f8e39c48d3b4eb266004c48e05623 | 0.672772 | 3.289157 | false | false | false | false |
Bjay1435/capstone | Geoff/Geoff.srcs/sources_1/bd/dma_loopback/ipshared/xilinx.com/axi_dma_v7_1/hdl/src/vhdl/axi_dma.vhd | 1 | 126,901 | -- (c) Copyright 2012 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
------------------------------------------------------------
-------------------------------------------------------------------------------
-- Filename: axi_dma.vhd
-- Description: This entity is the top level entity for the AXI DMA core.
--
-- VHDL-Standard: VHDL'93
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use ieee.std_logic_misc.all;
library unisim;
use unisim.vcomponents.all;
library axi_dma_v7_1_10;
use axi_dma_v7_1_10.axi_dma_pkg.all;
library axi_sg_v4_1_3;
use axi_sg_v4_1_3.all;
library axi_datamover_v5_1_11;
use axi_datamover_v5_1_11.all;
library lib_pkg_v1_0_2;
use lib_pkg_v1_0_2.lib_pkg.max2;
-------------------------------------------------------------------------------
entity axi_dma is
generic(
C_S_AXI_LITE_ADDR_WIDTH : integer range 2 to 32 := 10;
-- Address width of the AXI Lite Interface
C_S_AXI_LITE_DATA_WIDTH : integer range 32 to 32 := 32;
-- Data width of the AXI Lite Interface
C_DLYTMR_RESOLUTION : integer range 1 to 100000 := 125;
-- Interrupt Delay Timer resolution in usec
C_PRMRY_IS_ACLK_ASYNC : integer range 0 to 1 := 0;
-- Primary MM2S/S2MM sync/async mode
-- 0 = synchronous mode - all clocks are synchronous
-- 1 = asynchronous mode - Any one of the 4 clock inputs is not
-- synchronous to the other
-----------------------------------------------------------------------
-- Scatter Gather Parameters
-----------------------------------------------------------------------
C_INCLUDE_SG : integer range 0 to 1 := 1;
-- Include or Exclude the Scatter Gather Engine
-- 0 = Exclude SG Engine - Enables Simple DMA Mode
-- 1 = Include SG Engine - Enables Scatter Gather Mode
-- C_SG_INCLUDE_DESC_QUEUE : integer range 0 to 1 := 0;
-- Include or Exclude Scatter Gather Descriptor Queuing
-- 0 = Exclude SG Descriptor Queuing
-- 1 = Include SG Descriptor Queuing
C_SG_INCLUDE_STSCNTRL_STRM : integer range 0 to 1 := 1;
-- Include or Exclude AXI Status and AXI Control Streams
-- 0 = Exclude Status and Control Streams
-- 1 = Include Status and Control Streams
C_SG_USE_STSAPP_LENGTH : integer range 0 to 1 := 1;
-- Enable or Disable use of Status Stream Rx Length. Only valid
-- if C_SG_INCLUDE_STSCNTRL_STRM = 1
-- 0 = Don't use Rx Length
-- 1 = Use Rx Length
C_SG_LENGTH_WIDTH : integer range 8 to 23 := 14;
-- Descriptor Buffer Length, Transferred Bytes, and Status Stream
-- Rx Length Width. Indicates the least significant valid bits of
-- descriptor buffer length, transferred bytes, or Rx Length value
-- in the status word coincident with tlast.
C_M_AXI_SG_ADDR_WIDTH : integer range 32 to 64 := 32;
-- Master AXI Memory Map Address Width for Scatter Gather R/W Port
C_M_AXI_SG_DATA_WIDTH : integer range 32 to 32 := 32;
-- Master AXI Memory Map Data Width for Scatter Gather R/W Port
C_M_AXIS_MM2S_CNTRL_TDATA_WIDTH : integer range 32 to 32 := 32;
-- Master AXI Control Stream Data Width
C_S_AXIS_S2MM_STS_TDATA_WIDTH : integer range 32 to 32 := 32;
-- Slave AXI Status Stream Data Width
-----------------------------------------------------------------------
-- Memory Map to Stream (MM2S) Parameters
-----------------------------------------------------------------------
C_INCLUDE_MM2S : integer range 0 to 1 := 1;
-- Include or exclude MM2S primary data path
-- 0 = Exclude MM2S primary data path
-- 1 = Include MM2S primary data path
C_INCLUDE_MM2S_SF : integer range 0 to 1 := 1;
-- This parameter specifies the inclusion/omission of the
-- MM2S (Read) Store and Forward function
-- 0 = Omit MM2S Store and Forward
-- 1 = Include MM2S Store and Forward
C_INCLUDE_MM2S_DRE : integer range 0 to 1 := 0;
-- Include or exclude MM2S data realignment engine (DRE)
-- 0 = Exclude MM2S DRE
-- 1 = Include MM2S DRE
C_MM2S_BURST_SIZE : integer range 2 to 256 := 16;
-- Maximum burst size per burst request on MM2S Read Port
C_M_AXI_MM2S_ADDR_WIDTH : integer range 32 to 64 := 32;
-- Master AXI Memory Map Address Width for MM2S Read Port
C_M_AXI_MM2S_DATA_WIDTH : integer range 32 to 1024 := 32;
-- Master AXI Memory Map Data Width for MM2S Read Port
C_M_AXIS_MM2S_TDATA_WIDTH : integer range 8 to 1024 := 32;
-- Master AXI Stream Data Width for MM2S Channel
-----------------------------------------------------------------------
-- Stream to Memory Map (S2MM) Parameters
-----------------------------------------------------------------------
C_INCLUDE_S2MM : integer range 0 to 1 := 1;
-- Include or exclude S2MM primary data path
-- 0 = Exclude S2MM primary data path
-- 1 = Include S2MM primary data path
C_INCLUDE_S2MM_SF : integer range 0 to 1 := 1;
-- This parameter specifies the inclusion/omission of the
-- S2MM (Write) Store and Forward function
-- 0 = Omit S2MM Store and Forward
-- 1 = Include S2MM Store and Forward
C_INCLUDE_S2MM_DRE : integer range 0 to 1 := 0;
-- Include or exclude S2MM data realignment engine (DRE)
-- 0 = Exclude S2MM DRE
-- 1 = Include S2MM DRE
C_S2MM_BURST_SIZE : integer range 2 to 256 := 16;
-- Maximum burst size per burst request on S2MM Write Port
C_M_AXI_S2MM_ADDR_WIDTH : integer range 32 to 64 := 32;
-- Master AXI Memory Map Address Width for S2MM Write Port
C_M_AXI_S2MM_DATA_WIDTH : integer range 32 to 1024 := 32;
-- Master AXI Memory Map Data Width for MM2SS2MMWrite Port
C_S_AXIS_S2MM_TDATA_WIDTH : integer range 8 to 1024 := 32;
-- Slave AXI Stream Data Width for S2MM Channel
C_ENABLE_MULTI_CHANNEL : integer range 0 to 1 := 0;
-- Enable CACHE support, primarily for MCDMA
C_NUM_S2MM_CHANNELS : integer range 1 to 16 := 1;
-- Number of S2MM channels, primarily for MCDMA
C_NUM_MM2S_CHANNELS : integer range 1 to 16 := 1;
-- Number of MM2S channels, primarily for MCDMA
C_FAMILY : string := "virtex7";
C_MICRO_DMA : integer range 0 to 1 := 0;
-- Target FPGA Device Family
C_INSTANCE : string := "axi_dma"
);
port (
s_axi_lite_aclk : in std_logic := '0' ; --
m_axi_sg_aclk : in std_logic := '0' ; --
m_axi_mm2s_aclk : in std_logic := '0' ; --
m_axi_s2mm_aclk : in std_logic := '0' ; --
-----------------------------------------------------------------------
-- Primary Clock CDMA
-----------------------------------------------------------------------
axi_resetn : in std_logic := '0' ; --
--
----------------------------------------------------------------------- --
-- AXI Lite Control Interface --
----------------------------------------------------------------------- --
-- AXI Lite Write Address Channel --
s_axi_lite_awvalid : in std_logic := '0' ; --
s_axi_lite_awready : out std_logic ; --
-- s_axi_lite_awaddr : in std_logic_vector --
-- (C_S_AXI_LITE_ADDR_WIDTH-1 downto 0) := (others => '0'); --
s_axi_lite_awaddr : in std_logic_vector --
(9 downto 0) := (others => '0'); --
--
-- AXI Lite Write Data Channel --
s_axi_lite_wvalid : in std_logic := '0' ; --
s_axi_lite_wready : out std_logic ; --
s_axi_lite_wdata : in std_logic_vector --
(C_S_AXI_LITE_DATA_WIDTH-1 downto 0) := (others => '0'); --
--
-- AXI Lite Write Response Channel --
s_axi_lite_bresp : out std_logic_vector(1 downto 0) ; --
s_axi_lite_bvalid : out std_logic ; --
s_axi_lite_bready : in std_logic := '0' ; --
--
-- AXI Lite Read Address Channel --
s_axi_lite_arvalid : in std_logic := '0' ; --
s_axi_lite_arready : out std_logic ; --
-- s_axi_lite_araddr : in std_logic_vector --
-- (C_S_AXI_LITE_ADDR_WIDTH-1 downto 0) := (others => '0'); --
s_axi_lite_araddr : in std_logic_vector --
(9 downto 0) := (others => '0'); --
s_axi_lite_rvalid : out std_logic ; --
s_axi_lite_rready : in std_logic := '0' ; --
s_axi_lite_rdata : out std_logic_vector --
(C_S_AXI_LITE_DATA_WIDTH-1 downto 0); --
s_axi_lite_rresp : out std_logic_vector(1 downto 0) ; --
--
----------------------------------------------------------------------- --
-- AXI Scatter Gather Interface --
----------------------------------------------------------------------- --
-- Scatter Gather Write Address Channel --
m_axi_sg_awaddr : out std_logic_vector --
(C_M_AXI_SG_ADDR_WIDTH-1 downto 0) ; --
m_axi_sg_awlen : out std_logic_vector(7 downto 0) ; --
m_axi_sg_awsize : out std_logic_vector(2 downto 0) ; --
m_axi_sg_awburst : out std_logic_vector(1 downto 0) ; --
m_axi_sg_awprot : out std_logic_vector(2 downto 0) ; --
m_axi_sg_awcache : out std_logic_vector(3 downto 0) ; --
m_axi_sg_awuser : out std_logic_vector(3 downto 0) ; --
m_axi_sg_awvalid : out std_logic ; --
m_axi_sg_awready : in std_logic := '0' ; --
--
-- Scatter Gather Write Data Channel --
m_axi_sg_wdata : out std_logic_vector --
(C_M_AXI_SG_DATA_WIDTH-1 downto 0) ; --
m_axi_sg_wstrb : out std_logic_vector --
((C_M_AXI_SG_DATA_WIDTH/8)-1 downto 0); --
m_axi_sg_wlast : out std_logic ; --
m_axi_sg_wvalid : out std_logic ; --
m_axi_sg_wready : in std_logic := '0' ; --
--
-- Scatter Gather Write Response Channel --
m_axi_sg_bresp : in std_logic_vector(1 downto 0) := "00" ; --
m_axi_sg_bvalid : in std_logic := '0' ; --
m_axi_sg_bready : out std_logic ; --
--
-- Scatter Gather Read Address Channel --
m_axi_sg_araddr : out std_logic_vector --
(C_M_AXI_SG_ADDR_WIDTH-1 downto 0) ; --
m_axi_sg_arlen : out std_logic_vector(7 downto 0) ; --
m_axi_sg_arsize : out std_logic_vector(2 downto 0) ; --
m_axi_sg_arburst : out std_logic_vector(1 downto 0) ; --
m_axi_sg_arprot : out std_logic_vector(2 downto 0) ; --
m_axi_sg_arcache : out std_logic_vector(3 downto 0) ; --
m_axi_sg_aruser : out std_logic_vector(3 downto 0) ; --
m_axi_sg_arvalid : out std_logic ; --
m_axi_sg_arready : in std_logic := '0' ; --
--
-- Memory Map to Stream Scatter Gather Read Data Channel --
m_axi_sg_rdata : in std_logic_vector --
(C_M_AXI_SG_DATA_WIDTH-1 downto 0) := (others => '0'); --
m_axi_sg_rresp : in std_logic_vector(1 downto 0) := "00"; --
m_axi_sg_rlast : in std_logic := '0'; --
m_axi_sg_rvalid : in std_logic := '0'; --
m_axi_sg_rready : out std_logic ; --
--
--
----------------------------------------------------------------------- --
-- AXI MM2S Channel --
----------------------------------------------------------------------- --
-- Memory Map To Stream Read Address Channel --
m_axi_mm2s_araddr : out std_logic_vector --
(C_M_AXI_MM2S_ADDR_WIDTH-1 downto 0); --
m_axi_mm2s_arlen : out std_logic_vector(7 downto 0) ; --
m_axi_mm2s_arsize : out std_logic_vector(2 downto 0) ; --
m_axi_mm2s_arburst : out std_logic_vector(1 downto 0) ; --
m_axi_mm2s_arprot : out std_logic_vector(2 downto 0) ; --
m_axi_mm2s_arcache : out std_logic_vector(3 downto 0) ; --
m_axi_mm2s_aruser : out std_logic_vector(3 downto 0) ; --
m_axi_mm2s_arvalid : out std_logic ; --
m_axi_mm2s_arready : in std_logic := '0'; --
--
-- Memory Map to Stream Read Data Channel --
m_axi_mm2s_rdata : in std_logic_vector --
(C_M_AXI_MM2S_DATA_WIDTH-1 downto 0) := (others => '0'); --
m_axi_mm2s_rresp : in std_logic_vector(1 downto 0) := "00"; --
m_axi_mm2s_rlast : in std_logic := '0'; --
m_axi_mm2s_rvalid : in std_logic := '0'; --
m_axi_mm2s_rready : out std_logic ; --
--
-- Memory Map to Stream Stream Interface --
mm2s_prmry_reset_out_n : out std_logic ; -- CR573702
m_axis_mm2s_tdata : out std_logic_vector --
(C_M_AXIS_MM2S_TDATA_WIDTH-1 downto 0); --
m_axis_mm2s_tkeep : out std_logic_vector --
((C_M_AXIS_MM2S_TDATA_WIDTH/8)-1 downto 0); --
m_axis_mm2s_tvalid : out std_logic ; --
m_axis_mm2s_tready : in std_logic := '0'; --
m_axis_mm2s_tlast : out std_logic ; --
m_axis_mm2s_tuser : out std_logic_vector (3 downto 0) ; --
m_axis_mm2s_tid : out std_logic_vector (4 downto 0) ; --
m_axis_mm2s_tdest : out std_logic_vector (4 downto 0) ; --
--
-- Memory Map to Stream Control Stream Interface --
mm2s_cntrl_reset_out_n : out std_logic ; -- CR573702
m_axis_mm2s_cntrl_tdata : out std_logic_vector --
(C_M_AXIS_MM2S_CNTRL_TDATA_WIDTH-1 downto 0); --
m_axis_mm2s_cntrl_tkeep : out std_logic_vector --
((C_M_AXIS_MM2S_CNTRL_TDATA_WIDTH/8)-1 downto 0); --
m_axis_mm2s_cntrl_tvalid : out std_logic ; --
m_axis_mm2s_cntrl_tready : in std_logic := '0'; --
m_axis_mm2s_cntrl_tlast : out std_logic ; --
--
--
----------------------------------------------------------------------- --
-- AXI S2MM Channel --
----------------------------------------------------------------------- --
-- Stream to Memory Map Write Address Channel --
m_axi_s2mm_awaddr : out std_logic_vector --
(C_M_AXI_S2MM_ADDR_WIDTH-1 downto 0); --
m_axi_s2mm_awlen : out std_logic_vector(7 downto 0) ; --
m_axi_s2mm_awsize : out std_logic_vector(2 downto 0) ; --
m_axi_s2mm_awburst : out std_logic_vector(1 downto 0) ; --
m_axi_s2mm_awprot : out std_logic_vector(2 downto 0) ; --
m_axi_s2mm_awcache : out std_logic_vector(3 downto 0) ; --
m_axi_s2mm_awuser : out std_logic_vector(3 downto 0) ; --
m_axi_s2mm_awvalid : out std_logic ; --
m_axi_s2mm_awready : in std_logic := '0'; --
--
-- Stream to Memory Map Write Data Channel --
m_axi_s2mm_wdata : out std_logic_vector --
(C_M_AXI_S2MM_DATA_WIDTH-1 downto 0); --
m_axi_s2mm_wstrb : out std_logic_vector --
((C_M_AXI_S2MM_DATA_WIDTH/8)-1 downto 0); --
m_axi_s2mm_wlast : out std_logic ; --
m_axi_s2mm_wvalid : out std_logic ; --
m_axi_s2mm_wready : in std_logic := '0'; --
--
-- Stream to Memory Map Write Response Channel --
m_axi_s2mm_bresp : in std_logic_vector(1 downto 0) := "00"; --
m_axi_s2mm_bvalid : in std_logic := '0'; --
m_axi_s2mm_bready : out std_logic ; --
--
-- Stream to Memory Map Steam Interface --
s2mm_prmry_reset_out_n : out std_logic ; -- CR573702
s_axis_s2mm_tdata : in std_logic_vector --
(C_S_AXIS_S2MM_TDATA_WIDTH-1 downto 0) := (others => '0'); --
s_axis_s2mm_tkeep : in std_logic_vector --
((C_S_AXIS_S2MM_TDATA_WIDTH/8)-1 downto 0) := (others => '1'); --
s_axis_s2mm_tvalid : in std_logic := '0'; --
s_axis_s2mm_tready : out std_logic ; --
s_axis_s2mm_tlast : in std_logic := '0'; --
s_axis_s2mm_tuser : in std_logic_vector (3 downto 0) := "0000" ; --
s_axis_s2mm_tid : in std_logic_vector (4 downto 0) := "00000" ; --
s_axis_s2mm_tdest : in std_logic_vector (4 downto 0) := "00000" ; --
--
-- Stream to Memory Map Status Steam Interface --
s2mm_sts_reset_out_n : out std_logic ; -- CR573702
s_axis_s2mm_sts_tdata : in std_logic_vector --
(C_S_AXIS_S2MM_STS_TDATA_WIDTH-1 downto 0) := (others => '0'); --
s_axis_s2mm_sts_tkeep : in std_logic_vector --
((C_S_AXIS_S2MM_STS_TDATA_WIDTH/8)-1 downto 0) := (others => '1'); --
s_axis_s2mm_sts_tvalid : in std_logic := '0'; --
s_axis_s2mm_sts_tready : out std_logic ; --
s_axis_s2mm_sts_tlast : in std_logic := '0'; --
--
-- MM2S and S2MM Channel Interrupts --
mm2s_introut : out std_logic ; --
s2mm_introut : out std_logic ; --
axi_dma_tstvec : out std_logic_vector(31 downto 0) --
-----------------------------------------------------------------------
-- Test Support for Xilinx internal use
-----------------------------------------------------------------------
);
end axi_dma;
-------------------------------------------------------------------------------
-- Architecture
-------------------------------------------------------------------------------
architecture implementation of axi_dma is
attribute DowngradeIPIdentifiedWarnings: string;
attribute DowngradeIPIdentifiedWarnings of implementation : architecture is "yes";
-- The FREQ are needed only for ASYNC mode, for SYNC mode these are irrelevant
-- For Async, mm2s or s2mm >= sg >= lite
constant C_S_AXI_LITE_ACLK_FREQ_HZ : integer := 100000000;
-- AXI Lite clock frequency in hertz
constant C_M_AXI_MM2S_ACLK_FREQ_HZ : integer := 100000000;
-- AXI MM2S clock frequency in hertz
constant C_M_AXI_S2MM_ACLK_FREQ_HZ : integer := 100000000;
-- AXI S2MM clock frequency in hertz
constant C_M_AXI_SG_ACLK_FREQ_HZ : integer := 100000000;
-- Scatter Gather clock frequency in hertz
-------------------------------------------------------------------------------
-- Functions
-------------------------------------------------------------------------------
-- Functions
-------------------------------------------------------------------
-- Function
--
-- Function Name: funct_get_max
--
-- Function Description:
-- Returns the greater of two integers.
--
-------------------------------------------------------------------
function funct_get_string (value_in_1 : integer)
return string is
Variable max_value : string (1 to 5) := "00000";
begin
If (value_in_1 = 1) Then
-- coverage off
max_value := "11100";
-- coverage on
else
max_value := "11111";
End if;
Return (max_value);
end function funct_get_string;
function width_calc (value_in : integer)
return integer is
variable addr_value : integer := 32;
begin
if (value_in > 32) then
addr_value := 64;
else
addr_value := 32;
end if;
return(addr_value);
end function width_calc;
-- -------------------------------------------------------------------
--
--
--
-- -------------------------------------------------------------------
-- -- Function
-- --
-- -- Function Name: funct_rnd2pwr_of_2
-- --
-- -- Function Description:
-- -- Rounds the input value up to the nearest power of 2 between
-- -- 128 and 8192.
-- --
-- -------------------------------------------------------------------
-- function funct_rnd2pwr_of_2 (input_value : integer) return integer is
--
-- Variable temp_pwr2 : Integer := 128;
--
-- begin
--
-- if (input_value <= 128) then
--
-- temp_pwr2 := 128;
--
-- elsif (input_value <= 256) then
--
-- temp_pwr2 := 256;
--
-- elsif (input_value <= 512) then
--
-- temp_pwr2 := 512;
--
-- elsif (input_value <= 1024) then
--
-- temp_pwr2 := 1024;
--
-- elsif (input_value <= 2048) then
--
-- temp_pwr2 := 2048;
--
-- elsif (input_value <= 4096) then
--
-- temp_pwr2 := 4096;
--
-- else
--
-- temp_pwr2 := 8192;
--
-- end if;
--
--
-- Return (temp_pwr2);
--
-- end function funct_rnd2pwr_of_2;
-- -------------------------------------------------------------------
--
--
--
--
--
-------------------------------------------------------------------------------
-- Constants Declarations
-------------------------------------------------------------------------------
Constant SOFT_RST_TIME_CLKS : integer := 8;
-- Specifies the time of the soft reset assertion in
-- m_axi_aclk clock periods.
constant skid_enable : string := (funct_get_string(0));
-- Calculates the minimum needed depth of the CDMA Store and Forward FIFO
-- Constant PIPEDEPTH_BURST_LEN_PROD : integer :=
-- (funct_get_max(4, 4)+2)
-- * C_M_AXI_MAX_BURST_LEN;
--
-- -- Assigns the depth of the CDMA Store and Forward FIFO to the nearest
-- -- power of 2
-- Constant SF_FIFO_DEPTH : integer range 128 to 8192 :=
-- funct_rnd2pwr_of_2(PIPEDEPTH_BURST_LEN_PROD);
-- No Functions Declared
-------------------------------------------------------------------------------
-- Constants Declarations
-------------------------------------------------------------------------------
-- Scatter Gather Engine Configuration
-- Number of Fetch Descriptors to Queue
constant ADDR_WIDTH : integer := width_calc (C_M_AXI_SG_ADDR_WIDTH);
constant MCDMA : integer := (1 - C_ENABLE_MULTI_CHANNEL);
constant DESC_QUEUE : integer := (1*MCDMA);
constant STSCNTRL_ENABLE : integer := (C_SG_INCLUDE_STSCNTRL_STRM*MCDMA);
constant APPLENGTH_ENABLE : integer := (C_SG_USE_STSAPP_LENGTH*MCDMA);
constant C_SG_LENGTH_WIDTH_INT : integer := (C_SG_LENGTH_WIDTH*MCDMA + 23*C_ENABLE_MULTI_CHANNEL);
-- Comment the foll 2 line to disable queuing for McDMA and uncomment the 3rd and 4th lines
--constant SG_FTCH_DESC2QUEUE : integer := ((DESC_QUEUE * 4)*MCDMA + (2*C_ENABLE_MULTI_CHANNEL)) * C_SG_INCLUDE_DESC_QUEUE;
-- Number of Update Descriptors to Queue
--constant SG_UPDT_DESC2QUEUE : integer := ((DESC_QUEUE * 4)*MCDMA + (2*C_ENABLE_MULTI_CHANNEL)) * C_SG_INCLUDE_DESC_QUEUE;
constant SG_FTCH_DESC2QUEUE : integer := ((DESC_QUEUE * 4)*MCDMA + (2*C_ENABLE_MULTI_CHANNEL)) * DESC_QUEUE;
-- Number of Update Descriptors to Queue
constant SG_UPDT_DESC2QUEUE : integer := ((DESC_QUEUE * 4)*MCDMA + (2*C_ENABLE_MULTI_CHANNEL)) * DESC_QUEUE;
-- Number of fetch words per descriptor for channel 1 (MM2S)
constant SG_CH1_WORDS_TO_FETCH : integer := 8 + (5 * STSCNTRL_ENABLE);
-- Number of fetch words per descriptor for channel 2 (S2MM)
constant SG_CH2_WORDS_TO_FETCH : integer := 8; -- Only need to fetch 1st 8wrds for s2mm
-- Number of update words per descriptor for channel 1 (MM2S)
constant SG_CH1_WORDS_TO_UPDATE : integer := 1; -- Only status needs update for mm2s
-- Number of update words per descriptor for channel 2 (S2MM)
constant SG_CH2_WORDS_TO_UPDATE : integer := 1 + (5 * STSCNTRL_ENABLE);
-- First word offset (referenced to descriptor beginning) to update for channel 1 (MM2S)
constant SG_CH1_FIRST_UPDATE_WORD : integer := 7; -- status word in descriptor
-- First word offset (referenced to descriptor beginning) to update for channel 2 (MM2S)
constant SG_CH2_FIRST_UPDATE_WORD : integer := 7; -- status word in descriptor
-- Enable stale descriptor check for channel 1
constant SG_CH1_ENBL_STALE_ERROR : integer := 1;
-- Enable stale descriptor check for channel 2
constant SG_CH2_ENBL_STALE_ERROR : integer := 1;
-- Width of descriptor fetch bus
constant M_AXIS_SG_TDATA_WIDTH : integer := 32;
-- Width of descriptor update pointer bus
constant S_AXIS_UPDPTR_TDATA_WIDTH : integer := 32;
-- Width of descriptor update status bus
constant S_AXIS_UPDSTS_TDATA_WIDTH : integer := 33; -- IOC (1 bit) & DescStatus (32 bits)
-- Include SG Descriptor Updates
constant INCLUDE_DESC_UPDATE : integer := 1;
-- Include SG Interrupt Logic
constant INCLUDE_INTRPT : integer := 1;
-- Include SG Delay Interrupt
constant INCLUDE_DLYTMR : integer := 1;
-- Primary DataMover Configuration
-- DataMover Command / Status FIFO Depth
-- Note :Set maximum to the number of update descriptors to queue, to prevent lock up do to
-- update data fifo full before
--constant DM_CMDSTS_FIFO_DEPTH : integer := 1*C_ENABLE_MULTI_CHANNEL + (max2(1,SG_UPDT_DESC2QUEUE))*MCDMA;
constant DM_CMDSTS_FIFO_DEPTH : integer := max2(1,SG_UPDT_DESC2QUEUE);
constant DM_CMDSTS_FIFO_DEPTH_1 : integer := ((1-C_PRMRY_IS_ACLK_ASYNC)+C_PRMRY_IS_ACLK_ASYNC*DM_CMDSTS_FIFO_DEPTH);
-- DataMover Include Status FIFO
constant DM_INCLUDE_STS_FIFO : integer := 1;
-- Enable indeterminate BTT on datamover when stscntrl stream not included or
-- when use status app rx length is not enable or when in Simple DMA mode.
constant DM_SUPPORT_INDET_BTT : integer := 1 - (STSCNTRL_ENABLE
* APPLENGTH_ENABLE
* C_INCLUDE_SG) - C_MICRO_DMA;
-- Indterminate BTT Mode additional status vector width
constant INDETBTT_ADDED_STS_WIDTH : integer := 24;
-- Base status vector width
constant BASE_STATUS_WIDTH : integer := 8;
-- DataMover status width - is based on mode of operation
constant DM_STATUS_WIDTH : integer := BASE_STATUS_WIDTH
+ (DM_SUPPORT_INDET_BTT * INDETBTT_ADDED_STS_WIDTH);
-- DataMover outstanding address request fifo depth
constant DM_ADDR_PIPE_DEPTH : integer := 4;
-- AXI DataMover Full mode value
constant AXI_FULL_MODE : integer := 1;
-- AXI DataMover mode for MM2S Channel (0 if channel not included)
constant MM2S_AXI_FULL_MODE : integer := (C_INCLUDE_MM2S) * AXI_FULL_MODE + C_MICRO_DMA*C_INCLUDE_MM2S;
-- AXI DataMover mode for S2MM Channel (0 if channel not included)
constant S2MM_AXI_FULL_MODE : integer := (C_INCLUDE_S2MM) * AXI_FULL_MODE + C_MICRO_DMA*C_INCLUDE_S2MM;
-- Minimum value required for length width based on burst size and stream dwidth
-- If user sets c_sg_length_width too small based on setting of burst size and
-- dwidth then this will reset the width to a larger mimimum requirement.
constant DM_BTT_LENGTH_WIDTH : integer := max2((required_btt_width(C_M_AXIS_MM2S_TDATA_WIDTH,
C_MM2S_BURST_SIZE,
C_SG_LENGTH_WIDTH_INT)*C_INCLUDE_MM2S),
(required_btt_width(C_S_AXIS_S2MM_TDATA_WIDTH,
C_S2MM_BURST_SIZE,
C_SG_LENGTH_WIDTH_INT)*C_INCLUDE_S2MM));
-- Enable store and forward on datamover if data widths are mismatched (allows upsizers
-- to be instantiated) or when enabled by user.
constant DM_MM2S_INCLUDE_SF : integer := enable_snf(C_INCLUDE_MM2S_SF,
C_M_AXI_MM2S_DATA_WIDTH,
C_M_AXIS_MM2S_TDATA_WIDTH);
-- Enable store and forward on datamover if data widths are mismatched (allows upsizers
-- to be instantiated) or when enabled by user.
constant DM_S2MM_INCLUDE_SF : integer := enable_snf(C_INCLUDE_S2MM_SF,
C_M_AXI_S2MM_DATA_WIDTH,
C_S_AXIS_S2MM_TDATA_WIDTH);
-- Always allow datamover address requests
constant ALWAYS_ALLOW : std_logic := '1';
-- Return correct freq_hz parameter depending on if sg engine is included
constant M_AXI_SG_ACLK_FREQ_HZ :integer := hertz_prmtr_select(C_INCLUDE_SG,
C_S_AXI_LITE_ACLK_FREQ_HZ,
C_M_AXI_SG_ACLK_FREQ_HZ);
-- Scatter / Gather is always configure for synchronous operation for AXI DMA
constant SG_IS_SYNCHRONOUS : integer := 0;
constant CMD_WIDTH : integer := ((8*C_ENABLE_MULTI_CHANNEL)+ ADDR_WIDTH+ CMD_BASE_WIDTH) ;
-------------------------------------------------------------------------------
-- Signal / Type Declarations
-------------------------------------------------------------------------------
signal axi_lite_aclk : std_logic := '1';
signal axi_sg_aclk : std_logic := '1';
signal m_axi_sg_aresetn : std_logic := '1'; -- SG Reset on sg aclk domain (Soft/Hard)
signal dm_m_axi_sg_aresetn : std_logic := '1'; -- SG Reset on sg aclk domain (Soft/Hard) (Raw)
signal m_axi_mm2s_aresetn : std_logic := '1'; -- MM2S Channel Reset on s2mm aclk domain (Soft/Hard)(Raw)
signal m_axi_s2mm_aresetn : std_logic := '1'; -- S2MM Channel Reset on s2mm aclk domain (Soft/Hard)(Raw)
signal mm2s_scndry_resetn : std_logic := '1'; -- MM2S Channel Reset on sg aclk domain (Soft/Hard)
signal s2mm_scndry_resetn : std_logic := '1'; -- S2MM Channel Reset on sg aclk domain (Soft/Hard)
signal mm2s_prmry_resetn : std_logic := '1'; -- MM2S Channel Reset on s2mm aclk domain (Soft/Hard)
signal s2mm_prmry_resetn : std_logic := '1'; -- S2MM Channel Reset on s2mm aclk domain (Soft/Hard)
signal axi_lite_reset_n : std_logic := '1'; -- AXI Lite Interface Reset (Hard Only)
signal m_axi_sg_hrdresetn : std_logic := '1'; -- AXI Lite Interface Reset on SG clock domain (Hard Only)
signal dm_mm2s_scndry_resetn : std_logic := '1'; -- MM2S Channel Reset on sg domain (Soft/Hard)(Raw)
signal dm_s2mm_scndry_resetn : std_logic := '1'; -- S2MM Channel Reset on sg domain (Soft/Hard)(Raw)
-- Register Module Signals
signal mm2s_halted_clr : std_logic := '0';
signal mm2s_halted_set : std_logic := '0';
signal mm2s_idle_set : std_logic := '0';
signal mm2s_idle_clr : std_logic := '0';
signal mm2s_dma_interr_set : std_logic := '0';
signal mm2s_dma_slverr_set : std_logic := '0';
signal mm2s_dma_decerr_set : std_logic := '0';
signal mm2s_ioc_irq_set : std_logic := '0';
signal mm2s_dly_irq_set : std_logic := '0';
signal mm2s_irqdelay_status : std_logic_vector(7 downto 0) := (others => '0');
signal mm2s_irqthresh_status : std_logic_vector(7 downto 0) := (others => '0');
signal mm2s_new_curdesc_wren : std_logic := '0';
signal mm2s_new_curdesc : std_logic_vector(ADDR_WIDTH-1 downto 0) := (others => '0');
signal mm2s_tailpntr_updated : std_logic := '0';
signal mm2s_dmacr : std_logic_vector(C_S_AXI_LITE_DATA_WIDTH-1 downto 0) := (others => '0');
signal mm2s_dmasr : std_logic_vector(C_S_AXI_LITE_DATA_WIDTH-1 downto 0) := (others => '0');
signal mm2s_curdesc : std_logic_vector(ADDR_WIDTH-1 downto 0) := (others => '0');
signal mm2s_taildesc : std_logic_vector(ADDR_WIDTH-1 downto 0) := (others => '0');
signal mm2s_sa : std_logic_vector(ADDR_WIDTH-1 downto 0) := (others => '0'); --(C_M_AXI_MM2S_ADDR_WIDTH-1 downto 0) := (others => '0');
signal mm2s_length : std_logic_vector(C_SG_LENGTH_WIDTH_INT-1 downto 0) := (others => '0');
signal mm2s_length_wren : std_logic := '0';
signal mm2s_smpl_interr_set : std_logic := '0';
signal mm2s_smpl_slverr_set : std_logic := '0';
signal mm2s_smpl_decerr_set : std_logic := '0';
signal mm2s_smpl_done : std_logic := '0';
signal mm2s_packet_sof : std_logic := '0';
signal mm2s_packet_eof : std_logic := '0';
signal mm2s_all_idle : std_logic := '0';
signal mm2s_error : std_logic := '0';
signal mm2s_dlyirq_dsble : std_logic := '0'; -- CR605888
signal s2mm_halted_clr : std_logic := '0';
signal s2mm_halted_set : std_logic := '0';
signal s2mm_idle_set : std_logic := '0';
signal s2mm_idle_clr : std_logic := '0';
signal s2mm_dma_interr_set : std_logic := '0';
signal s2mm_dma_slverr_set : std_logic := '0';
signal s2mm_dma_decerr_set : std_logic := '0';
signal s2mm_ioc_irq_set : std_logic := '0';
signal s2mm_dly_irq_set : std_logic := '0';
signal s2mm_irqdelay_status : std_logic_vector(7 downto 0) := (others => '0');
signal s2mm_irqthresh_status : std_logic_vector(7 downto 0) := (others => '0');
signal s2mm_new_curdesc_wren : std_logic := '0';
signal s2mm_new_curdesc : std_logic_vector(ADDR_WIDTH-1 downto 0) := (others => '0');
signal s2mm_tailpntr_updated : std_logic := '0';
signal s2mm_dmacr : std_logic_vector(C_S_AXI_LITE_DATA_WIDTH-1 downto 0) := (others => '0');
signal s2mm_dmasr : std_logic_vector(C_S_AXI_LITE_DATA_WIDTH-1 downto 0) := (others => '0');
signal s2mm_curdesc : std_logic_vector(ADDR_WIDTH-1 downto 0) := (others => '0');
signal s2mm_taildesc : std_logic_vector(ADDR_WIDTH-1 downto 0) := (others => '0');
signal s2mm_da : std_logic_vector(ADDR_WIDTH-1 downto 0) := (others => '0'); --(C_M_AXI_S2MM_ADDR_WIDTH-1 downto 0) := (others => '0');
signal s2mm_length : std_logic_vector(C_SG_LENGTH_WIDTH_INT-1 downto 0) := (others => '0');
signal s2mm_length_wren : std_logic := '0';
signal s2mm_bytes_rcvd : std_logic_vector(C_SG_LENGTH_WIDTH_INT-1 downto 0) := (others => '0');
signal s2mm_bytes_rcvd_wren : std_logic := '0';
signal s2mm_smpl_interr_set : std_logic := '0';
signal s2mm_smpl_slverr_set : std_logic := '0';
signal s2mm_smpl_decerr_set : std_logic := '0';
signal s2mm_smpl_done : std_logic := '0';
signal s2mm_packet_sof : std_logic := '0';
signal s2mm_packet_eof : std_logic := '0';
signal s2mm_all_idle : std_logic := '0';
signal s2mm_error : std_logic := '0';
signal s2mm_dlyirq_dsble : std_logic := '0'; -- CR605888
signal mm2s_stop : std_logic := '0';
signal s2mm_stop : std_logic := '0';
signal ftch_error : std_logic := '0';
signal ftch_error_addr : std_logic_vector(ADDR_WIDTH-1 downto 0) := (others => '0');
signal updt_error : std_logic := '0';
signal updt_error_addr : std_logic_vector(ADDR_WIDTH-1 downto 0) := (others => '0');
--*********************************
-- MM2S Signals
--*********************************
-- MM2S DMA Controller Signals
signal mm2s_desc_flush : std_logic := '0';
signal mm2s_ftch_idle : std_logic := '0';
signal mm2s_updt_idle : std_logic := '0';
signal mm2s_updt_ioc_irq_set : std_logic := '0';
signal mm2s_irqthresh_wren : std_logic := '0';
signal mm2s_irqdelay_wren : std_logic := '0';
signal mm2s_irqthresh_rstdsbl : std_logic := '0'; -- CR572013
-- SG MM2S Descriptor Fetch AXI Stream IN
signal m_axis_mm2s_ftch_tdata_new : std_logic_vector(96+31*0+(0+2)*(ADDR_WIDTH-32) downto 0) := (others => '0');
signal m_axis_mm2s_ftch_tdata_mcdma_new : std_logic_vector(63 downto 0) := (others => '0');
signal m_axis_mm2s_ftch_tvalid_new : std_logic := '0';
signal m_axis_mm2s_ftch_tdata : std_logic_vector(M_AXIS_SG_TDATA_WIDTH-1 downto 0) := (others => '0');
signal m_axis_mm2s_ftch_tvalid : std_logic := '0';
signal m_axis_mm2s_ftch_tready : std_logic := '0';
signal m_axis_mm2s_ftch_tlast : std_logic := '0';
-- SG MM2S Descriptor Update AXI Stream Out
signal s_axis_mm2s_updtptr_tdata : std_logic_vector(ADDR_WIDTH-1 downto 0) := (others => '0');
signal s_axis_mm2s_updtptr_tvalid : std_logic := '0';
signal s_axis_mm2s_updtptr_tready : std_logic := '0';
signal s_axis_mm2s_updtptr_tlast : std_logic := '0';
signal s_axis_mm2s_updtsts_tdata : std_logic_vector(S_AXIS_UPDSTS_TDATA_WIDTH-1 downto 0) := (others => '0');
signal s_axis_mm2s_updtsts_tvalid : std_logic := '0';
signal s_axis_mm2s_updtsts_tready : std_logic := '0';
signal s_axis_mm2s_updtsts_tlast : std_logic := '0';
-- DataMover MM2S Command Stream Signals
signal s_axis_mm2s_cmd_tvalid_split : std_logic := '0';
signal s_axis_mm2s_cmd_tready_split : std_logic := '0';
signal s_axis_mm2s_cmd_tdata_split : std_logic_vector
((ADDR_WIDTH-32+2*32+CMD_BASE_WIDTH+46)-1 downto 0) := (others => '0');
signal s_axis_s2mm_cmd_tvalid_split : std_logic := '0';
signal s_axis_s2mm_cmd_tready_split : std_logic := '0';
signal s_axis_s2mm_cmd_tdata_split : std_logic_vector
((ADDR_WIDTH-32+2*32+CMD_BASE_WIDTH+46)-1 downto 0) := (others => '0');
signal s_axis_mm2s_cmd_tvalid : std_logic := '0';
signal s_axis_mm2s_cmd_tready : std_logic := '0';
signal s_axis_mm2s_cmd_tdata : std_logic_vector
((ADDR_WIDTH+CMD_BASE_WIDTH+(8*C_ENABLE_MULTI_CHANNEL))-1 downto 0) := (others => '0');
-- DataMover MM2S Status Stream Signals
signal m_axis_mm2s_sts_tvalid : std_logic := '0';
signal m_axis_mm2s_sts_tvalid_int : std_logic := '0';
signal m_axis_mm2s_sts_tready : std_logic := '0';
signal m_axis_mm2s_sts_tdata : std_logic_vector(7 downto 0) := (others => '0');
signal m_axis_mm2s_sts_tdata_int : std_logic_vector(7 downto 0) := (others => '0');
signal m_axis_mm2s_sts_tkeep : std_logic_vector(0 downto 0) := (others => '0');
signal mm2s_err : std_logic := '0';
signal mm2s_halt : std_logic := '0';
signal mm2s_halt_cmplt : std_logic := '0';
-- S2MM DMA Controller Signals
signal s2mm_desc_flush : std_logic := '0';
signal s2mm_ftch_idle : std_logic := '0';
signal s2mm_updt_idle : std_logic := '0';
signal s2mm_updt_ioc_irq_set : std_logic := '0';
signal s2mm_irqthresh_wren : std_logic := '0';
signal s2mm_irqdelay_wren : std_logic := '0';
signal s2mm_irqthresh_rstdsbl : std_logic := '0'; -- CR572013
-- SG S2MM Descriptor Fetch AXI Stream IN
signal m_axis_s2mm_ftch_tdata_new : std_logic_vector(96+31*0+(0+2)*(ADDR_WIDTH-32) downto 0) := (others => '0');
signal m_axis_s2mm_ftch_tdata_mcdma_new : std_logic_vector(63 downto 0) := (others => '0');
signal m_axis_s2mm_ftch_tdata_mcdma_nxt : std_logic_vector(ADDR_WIDTH-1 downto 0) := (others => '0');
signal m_axis_s2mm_ftch_tvalid_new : std_logic := '0';
signal m_axis_ftch2_desc_available, m_axis_ftch1_desc_available : std_logic;
signal m_axis_s2mm_ftch_tdata : std_logic_vector(M_AXIS_SG_TDATA_WIDTH-1 downto 0) := (others => '0');
signal m_axis_s2mm_ftch_tvalid : std_logic := '0';
signal m_axis_s2mm_ftch_tready : std_logic := '0';
signal m_axis_s2mm_ftch_tlast : std_logic := '0';
signal mm2s_axis_info : std_logic_vector(13 downto 0) := (others => '0');
-- SG S2MM Descriptor Update AXI Stream Out
signal s_axis_s2mm_updtptr_tdata : std_logic_vector(ADDR_WIDTH-1 downto 0) := (others => '0');
signal s_axis_s2mm_updtptr_tvalid : std_logic := '0';
signal s_axis_s2mm_updtptr_tready : std_logic := '0';
signal s_axis_s2mm_updtptr_tlast : std_logic := '0';
signal s_axis_s2mm_updtsts_tdata : std_logic_vector(S_AXIS_UPDSTS_TDATA_WIDTH-1 downto 0) := (others => '0');
signal s_axis_s2mm_updtsts_tvalid : std_logic := '0';
signal s_axis_s2mm_updtsts_tready : std_logic := '0';
signal s_axis_s2mm_updtsts_tlast : std_logic := '0';
-- DataMover S2MM Command Stream Signals
signal s_axis_s2mm_cmd_tvalid : std_logic := '0';
signal s_axis_s2mm_cmd_tready : std_logic := '0';
signal s_axis_s2mm_cmd_tdata : std_logic_vector
((ADDR_WIDTH+CMD_BASE_WIDTH+(8*C_ENABLE_MULTI_CHANNEL))-1 downto 0) := (others => '0');
-- DataMover S2MM Status Stream Signals
signal m_axis_s2mm_sts_tvalid : std_logic := '0';
signal m_axis_s2mm_sts_tvalid_int : std_logic := '0';
signal m_axis_s2mm_sts_tready : std_logic := '0';
signal m_axis_s2mm_sts_tdata : std_logic_vector(DM_STATUS_WIDTH - 1 downto 0) := (others => '0');
signal m_axis_s2mm_sts_tdata_int : std_logic_vector(DM_STATUS_WIDTH - 1 downto 0) := (others => '0');
signal m_axis_s2mm_sts_tkeep : std_logic_vector((DM_STATUS_WIDTH/8)-1 downto 0) := (others => '0');
signal s2mm_err : std_logic := '0';
signal s2mm_halt : std_logic := '0';
signal s2mm_halt_cmplt : std_logic := '0';
-- Error Status Control
signal mm2s_ftch_interr_set : std_logic := '0';
signal mm2s_ftch_slverr_set : std_logic := '0';
signal mm2s_ftch_decerr_set : std_logic := '0';
signal mm2s_updt_interr_set : std_logic := '0';
signal mm2s_updt_slverr_set : std_logic := '0';
signal mm2s_updt_decerr_set : std_logic := '0';
signal mm2s_ftch_err_early : std_logic := '0';
signal mm2s_ftch_stale_desc : std_logic := '0';
signal s2mm_updt_interr_set : std_logic := '0';
signal s2mm_updt_slverr_set : std_logic := '0';
signal s2mm_updt_decerr_set : std_logic := '0';
signal s2mm_ftch_interr_set : std_logic := '0';
signal s2mm_ftch_slverr_set : std_logic := '0';
signal s2mm_ftch_decerr_set : std_logic := '0';
signal s2mm_ftch_err_early : std_logic := '0';
signal s2mm_ftch_stale_desc : std_logic := '0';
signal soft_reset_clr : std_logic := '0';
signal soft_reset : std_logic := '0';
signal s_axis_s2mm_tready_i : std_logic := '0';
signal s_axis_s2mm_tready_int : std_logic := '0';
signal m_axis_mm2s_tlast_i : std_logic := '0';
signal m_axis_mm2s_tlast_i_user : std_logic := '0';
signal m_axis_mm2s_tvalid_i : std_logic := '0';
signal sg_ctl : std_logic_vector (7 downto 0);
signal s_axis_s2mm_tvalid_int : std_logic;
signal s_axis_s2mm_tlast_int : std_logic;
signal tdest_out_int : std_logic_vector (6 downto 0);
signal same_tdest : std_logic;
signal s2mm_eof_s2mm : std_logic;
signal ch2_update_active : std_logic;
signal s2mm_desc_info_in : std_logic_vector (13 downto 0);
signal m_axis_mm2s_tlast_i_mcdma : std_logic;
signal s2mm_run_stop_del : std_logic;
signal s2mm_desc_flush_del : std_logic;
signal s2mm_tvalid_latch : std_logic;
signal s2mm_tvalid_latch_del : std_logic;
signal clock_splt : std_logic;
signal clock_splt_s2mm : std_logic;
signal updt_cmpt : std_logic;
signal cmpt_updt : std_logic_vector (1 downto 0);
signal reset1, reset2 : std_logic;
signal mm2s_cntrl_strm_stop : std_logic;
signal bd_eq : std_logic;
signal m_axi_sg_awaddr_internal : std_logic_vector (ADDR_WIDTH-1 downto 0) ;
signal m_axi_sg_araddr_internal : std_logic_vector (ADDR_WIDTH-1 downto 0) ;
signal m_axi_mm2s_araddr_internal : std_logic_vector (ADDR_WIDTH-1 downto 0) ;
signal m_axi_s2mm_awaddr_internal : std_logic_vector (ADDR_WIDTH-1 downto 0) ;
-------------------------------------------------------------------------------
-- Begin architecture logic
-------------------------------------------------------------------------------
begin
m_axi_mm2s_araddr <= m_axi_mm2s_araddr_internal (C_M_AXI_SG_ADDR_WIDTH-1 downto 0);
m_axi_s2mm_awaddr <= m_axi_s2mm_awaddr_internal (C_M_AXI_SG_ADDR_WIDTH-1 downto 0);
-- AXI DMA Test Vector (For Xilinx Internal Use Only)
axi_dma_tstvec(31 downto 6) <= (others => '0');
axi_dma_tstvec(5) <= s2mm_updt_ioc_irq_set;
axi_dma_tstvec(4) <= mm2s_updt_ioc_irq_set;
axi_dma_tstvec(3) <= s2mm_packet_eof;
axi_dma_tstvec(2) <= s2mm_packet_sof;
axi_dma_tstvec(1) <= mm2s_packet_eof;
axi_dma_tstvec(0) <= mm2s_packet_sof;
-- Primary MM2S Stream outputs (used internally to gen eof and sof for
-- interrupt coalescing
m_axis_mm2s_tlast <= m_axis_mm2s_tlast_i;
m_axis_mm2s_tvalid <= m_axis_mm2s_tvalid_i;
-- Primary S2MM Stream output (used internally to gen eof and sof for
-- interrupt coalescing
s_axis_s2mm_tready <= s_axis_s2mm_tready_i;
GEN_INCLUDE_SG : if C_INCLUDE_SG = 1 generate
axi_lite_aclk <= s_axi_lite_aclk;
axi_sg_aclk <= m_axi_sg_aclk;
end generate GEN_INCLUDE_SG;
GEN_EXCLUDE_SG : if C_INCLUDE_SG = 0 generate
axi_lite_aclk <= s_axi_lite_aclk;
axi_sg_aclk <= s_axi_lite_aclk;
end generate GEN_EXCLUDE_SG;
-------------------------------------------------------------------------------
-- AXI DMA Reset Module
-------------------------------------------------------------------------------
I_RST_MODULE : entity axi_dma_v7_1_10.axi_dma_rst_module
generic map(
C_INCLUDE_MM2S => C_INCLUDE_MM2S ,
C_INCLUDE_S2MM => C_INCLUDE_S2MM ,
C_PRMRY_IS_ACLK_ASYNC => C_PRMRY_IS_ACLK_ASYNC ,
C_M_AXI_MM2S_ACLK_FREQ_HZ => C_M_AXI_MM2S_ACLK_FREQ_HZ ,
C_M_AXI_S2MM_ACLK_FREQ_HZ => C_M_AXI_S2MM_ACLK_FREQ_HZ ,
C_M_AXI_SG_ACLK_FREQ_HZ => M_AXI_SG_ACLK_FREQ_HZ ,
C_SG_INCLUDE_STSCNTRL_STRM => STSCNTRL_ENABLE ,
C_INCLUDE_SG => C_INCLUDE_SG
)
port map(
-- Clock Sources
s_axi_lite_aclk => axi_lite_aclk ,
m_axi_sg_aclk => axi_sg_aclk ,
m_axi_mm2s_aclk => m_axi_mm2s_aclk ,
m_axi_s2mm_aclk => m_axi_s2mm_aclk ,
-----------------------------------------------------------------------
-- Hard Reset
-----------------------------------------------------------------------
axi_resetn => axi_resetn ,
-----------------------------------------------------------------------
-- Soft Reset
-----------------------------------------------------------------------
soft_reset => soft_reset ,
soft_reset_clr => soft_reset_clr ,
mm2s_stop => mm2s_stop ,
mm2s_all_idle => mm2s_all_idle ,
mm2s_halt => mm2s_halt ,
mm2s_halt_cmplt => mm2s_halt_cmplt ,
s2mm_stop => s2mm_stop ,
s2mm_all_idle => s2mm_all_idle ,
s2mm_halt => s2mm_halt ,
s2mm_halt_cmplt => s2mm_halt_cmplt ,
-----------------------------------------------------------------------
-- MM2S Distributed Reset Out (m_axi_mm2s_aclk)
-----------------------------------------------------------------------
dm_mm2s_prmry_resetn => m_axi_mm2s_aresetn , -- AXI DataMover Primary Reset (Raw)
dm_mm2s_scndry_resetn => dm_mm2s_scndry_resetn , -- AXI DataMover Secondary Reset (Raw)
mm2s_prmry_reset_out_n => mm2s_prmry_reset_out_n , -- AXI Stream Primary Reset Outputs
mm2s_cntrl_reset_out_n => mm2s_cntrl_reset_out_n , -- AXI Stream Control Reset Outputs
mm2s_scndry_resetn => mm2s_scndry_resetn , -- AXI Secondary Reset
mm2s_prmry_resetn => mm2s_prmry_resetn , -- AXI Primary Reset
-----------------------------------------------------------------------
-- S2MM Distributed Reset Out (m_axi_s2mm_aclk)
-----------------------------------------------------------------------
dm_s2mm_prmry_resetn => m_axi_s2mm_aresetn , -- AXI DataMover Primary Reset (Raw)
dm_s2mm_scndry_resetn => dm_s2mm_scndry_resetn , -- AXI DataMover Secondary Reset (Raw)
s2mm_prmry_reset_out_n => s2mm_prmry_reset_out_n , -- AXI Stream Primary Reset Outputs
s2mm_sts_reset_out_n => s2mm_sts_reset_out_n , -- AXI Stream Control Reset Outputs
s2mm_scndry_resetn => s2mm_scndry_resetn , -- AXI Secondary Reset
s2mm_prmry_resetn => s2mm_prmry_resetn , -- AXI Primary Reset
-----------------------------------------------------------------------
-- Scatter Gather Distributed Reset Out (m_axi_sg_aclk)
-----------------------------------------------------------------------
m_axi_sg_aresetn => m_axi_sg_aresetn , -- AXI Scatter Gather Reset Out
dm_m_axi_sg_aresetn => dm_m_axi_sg_aresetn , -- AXI Scatter Gather Datamover Reset Out
-----------------------------------------------------------------------
-- Hard Reset Out (s_axi_lite_aclk)
-----------------------------------------------------------------------
m_axi_sg_hrdresetn => m_axi_sg_hrdresetn , -- AXI Lite Ingerface (sg aclk) (Hard Only)
s_axi_lite_resetn => axi_lite_reset_n -- AXI Lite Interface reset (Hard Only)
);
-------------------------------------------------------------------------------
-- AXI DMA Register Module
-------------------------------------------------------------------------------
I_AXI_DMA_REG_MODULE : entity axi_dma_v7_1_10.axi_dma_reg_module
generic map(
C_INCLUDE_MM2S => C_INCLUDE_MM2S ,
C_INCLUDE_S2MM => C_INCLUDE_S2MM ,
C_INCLUDE_SG => C_INCLUDE_SG ,
C_SG_LENGTH_WIDTH => C_SG_LENGTH_WIDTH_INT ,
C_AXI_LITE_IS_ASYNC => C_PRMRY_IS_ACLK_ASYNC ,
C_S_AXI_LITE_ADDR_WIDTH => C_S_AXI_LITE_ADDR_WIDTH ,
C_S_AXI_LITE_DATA_WIDTH => C_S_AXI_LITE_DATA_WIDTH ,
C_M_AXI_SG_ADDR_WIDTH => ADDR_WIDTH ,
C_M_AXI_MM2S_ADDR_WIDTH => ADDR_WIDTH ,
C_NUM_S2MM_CHANNELS => C_NUM_S2MM_CHANNELS ,
C_M_AXI_S2MM_ADDR_WIDTH => ADDR_WIDTH ,
C_MICRO_DMA => C_MICRO_DMA ,
C_ENABLE_MULTI_CHANNEL => C_ENABLE_MULTI_CHANNEL
)
port map(
-----------------------------------------------------------------------
-- AXI Lite Control Interface
-----------------------------------------------------------------------
s_axi_lite_aclk => axi_lite_aclk ,
axi_lite_reset_n => axi_lite_reset_n ,
m_axi_sg_aclk => axi_sg_aclk ,
m_axi_sg_aresetn => m_axi_sg_aresetn ,
m_axi_sg_hrdresetn => m_axi_sg_hrdresetn ,
-- AXI Lite Write Address Channel
s_axi_lite_awvalid => s_axi_lite_awvalid ,
s_axi_lite_awready => s_axi_lite_awready ,
s_axi_lite_awaddr => s_axi_lite_awaddr ,
-- AXI Lite Write Data Channel
s_axi_lite_wvalid => s_axi_lite_wvalid ,
s_axi_lite_wready => s_axi_lite_wready ,
s_axi_lite_wdata => s_axi_lite_wdata ,
-- AXI Lite Write Response Channel
s_axi_lite_bresp => s_axi_lite_bresp ,
s_axi_lite_bvalid => s_axi_lite_bvalid ,
s_axi_lite_bready => s_axi_lite_bready ,
-- AXI Lite Read Address Channel
s_axi_lite_arvalid => s_axi_lite_arvalid ,
s_axi_lite_arready => s_axi_lite_arready ,
s_axi_lite_araddr => s_axi_lite_araddr ,
s_axi_lite_rvalid => s_axi_lite_rvalid ,
s_axi_lite_rready => s_axi_lite_rready ,
s_axi_lite_rdata => s_axi_lite_rdata ,
s_axi_lite_rresp => s_axi_lite_rresp ,
-- MM2S DMASR Status
mm2s_stop => mm2s_stop ,
mm2s_halted_clr => mm2s_halted_clr ,
mm2s_halted_set => mm2s_halted_set ,
mm2s_idle_set => mm2s_idle_set ,
mm2s_idle_clr => mm2s_idle_clr ,
mm2s_dma_interr_set => mm2s_dma_interr_set ,
mm2s_dma_slverr_set => mm2s_dma_slverr_set ,
mm2s_dma_decerr_set => mm2s_dma_decerr_set ,
mm2s_ioc_irq_set => mm2s_ioc_irq_set ,
mm2s_dly_irq_set => mm2s_dly_irq_set ,
mm2s_irqthresh_wren => mm2s_irqthresh_wren ,
mm2s_irqdelay_wren => mm2s_irqdelay_wren ,
mm2s_irqthresh_rstdsbl => mm2s_irqthresh_rstdsbl , -- CR572013
mm2s_irqdelay_status => mm2s_irqdelay_status ,
mm2s_irqthresh_status => mm2s_irqthresh_status ,
mm2s_dlyirq_dsble => mm2s_dlyirq_dsble , -- CR605888
mm2s_ftch_interr_set => mm2s_ftch_interr_set ,
mm2s_ftch_slverr_set => mm2s_ftch_slverr_set ,
mm2s_ftch_decerr_set => mm2s_ftch_decerr_set ,
mm2s_updt_interr_set => mm2s_updt_interr_set ,
mm2s_updt_slverr_set => mm2s_updt_slverr_set ,
mm2s_updt_decerr_set => mm2s_updt_decerr_set ,
-- MM2S CURDESC Update
mm2s_new_curdesc_wren => mm2s_new_curdesc_wren ,
mm2s_new_curdesc => mm2s_new_curdesc ,
-- MM2S TAILDESC Update
mm2s_tailpntr_updated => mm2s_tailpntr_updated ,
-- MM2S Registers
mm2s_dmacr => mm2s_dmacr ,
mm2s_dmasr => mm2s_dmasr ,
mm2s_curdesc => mm2s_curdesc ,
mm2s_taildesc => mm2s_taildesc ,
mm2s_sa => mm2s_sa ,
mm2s_length => mm2s_length ,
mm2s_length_wren => mm2s_length_wren ,
s2mm_sof => s2mm_packet_sof ,
s2mm_eof => s2mm_packet_eof ,
-- S2MM DMASR Status
s2mm_stop => s2mm_stop ,
s2mm_halted_clr => s2mm_halted_clr ,
s2mm_halted_set => s2mm_halted_set ,
s2mm_idle_set => s2mm_idle_set ,
s2mm_idle_clr => s2mm_idle_clr ,
s2mm_dma_interr_set => s2mm_dma_interr_set ,
s2mm_dma_slverr_set => s2mm_dma_slverr_set ,
s2mm_dma_decerr_set => s2mm_dma_decerr_set ,
s2mm_ioc_irq_set => s2mm_ioc_irq_set ,
s2mm_dly_irq_set => s2mm_dly_irq_set ,
s2mm_irqthresh_wren => s2mm_irqthresh_wren ,
s2mm_irqdelay_wren => s2mm_irqdelay_wren ,
s2mm_irqthresh_rstdsbl => s2mm_irqthresh_rstdsbl , -- CR572013
s2mm_irqdelay_status => s2mm_irqdelay_status ,
s2mm_irqthresh_status => s2mm_irqthresh_status ,
s2mm_dlyirq_dsble => s2mm_dlyirq_dsble , -- CR605888
s2mm_ftch_interr_set => s2mm_ftch_interr_set ,
s2mm_ftch_slverr_set => s2mm_ftch_slverr_set ,
s2mm_ftch_decerr_set => s2mm_ftch_decerr_set ,
s2mm_updt_interr_set => s2mm_updt_interr_set ,
s2mm_updt_slverr_set => s2mm_updt_slverr_set ,
s2mm_updt_decerr_set => s2mm_updt_decerr_set ,
-- MM2S CURDESC Update
s2mm_new_curdesc_wren => s2mm_new_curdesc_wren ,
s2mm_new_curdesc => s2mm_new_curdesc ,
s2mm_tvalid => s_axis_s2mm_tvalid ,
s2mm_tvalid_latch => s2mm_tvalid_latch ,
s2mm_tvalid_latch_del => s2mm_tvalid_latch_del ,
-- MM2S TAILDESC Update
s2mm_tailpntr_updated => s2mm_tailpntr_updated ,
-- S2MM Registers
s2mm_dmacr => s2mm_dmacr ,
s2mm_dmasr => s2mm_dmasr ,
s2mm_curdesc => s2mm_curdesc ,
s2mm_taildesc => s2mm_taildesc ,
s2mm_da => s2mm_da ,
s2mm_length => s2mm_length ,
s2mm_length_wren => s2mm_length_wren ,
s2mm_bytes_rcvd => s2mm_bytes_rcvd ,
s2mm_bytes_rcvd_wren => s2mm_bytes_rcvd_wren ,
tdest_in => tdest_out_int, --s_axis_s2mm_tdest ,
same_tdest_in => same_tdest,
sg_ctl => sg_ctl ,
-- Soft reset and clear
soft_reset => soft_reset ,
soft_reset_clr => soft_reset_clr ,
-- Fetch/Update error addresses
ftch_error_addr => ftch_error_addr ,
updt_error_addr => updt_error_addr ,
-- DMA Interrupt Outputs
mm2s_introut => mm2s_introut ,
s2mm_introut => s2mm_introut ,
bd_eq => bd_eq
);
-------------------------------------------------------------------------------
-- Scatter Gather Mode (C_INCLUDE_SG = 1)
-------------------------------------------------------------------------------
GEN_SG_ENGINE : if C_INCLUDE_SG = 1 generate
begin
-- reset1 <= dm_m_axi_sg_aresetn and s2mm_tvalid_latch;
-- reset2 <= m_axi_sg_aresetn and s2mm_tvalid_latch;
s2mm_run_stop_del <= s2mm_tvalid_latch_del and s2mm_dmacr(DMACR_RS_BIT);
-- s2mm_run_stop_del <= (not (updt_cmpt)) and s2mm_dmacr(DMACR_RS_BIT);
s2mm_desc_flush_del <= s2mm_desc_flush or (not s2mm_tvalid_latch);
-- Scatter Gather Engine
I_SG_ENGINE : entity axi_sg_v4_1_3.axi_sg
generic map(
C_M_AXI_SG_ADDR_WIDTH => ADDR_WIDTH ,
C_M_AXI_SG_DATA_WIDTH => C_M_AXI_SG_DATA_WIDTH ,
C_M_AXIS_SG_TDATA_WIDTH => M_AXIS_SG_TDATA_WIDTH ,
C_S_AXIS_UPDPTR_TDATA_WIDTH => S_AXIS_UPDPTR_TDATA_WIDTH ,
C_S_AXIS_UPDSTS_TDATA_WIDTH => S_AXIS_UPDSTS_TDATA_WIDTH ,
C_SG_FTCH_DESC2QUEUE => SG_FTCH_DESC2QUEUE ,
C_SG_UPDT_DESC2QUEUE => SG_UPDT_DESC2QUEUE ,
C_SG_CH1_WORDS_TO_FETCH => SG_CH1_WORDS_TO_FETCH ,
C_SG_CH1_WORDS_TO_UPDATE => SG_CH1_WORDS_TO_UPDATE ,
C_SG_CH1_FIRST_UPDATE_WORD => SG_CH1_FIRST_UPDATE_WORD ,
C_SG_CH1_ENBL_STALE_ERROR => SG_CH1_ENBL_STALE_ERROR ,
C_SG_CH2_WORDS_TO_FETCH => SG_CH2_WORDS_TO_FETCH ,
C_SG_CH2_WORDS_TO_UPDATE => SG_CH2_WORDS_TO_UPDATE ,
C_SG_CH2_FIRST_UPDATE_WORD => SG_CH2_FIRST_UPDATE_WORD ,
C_SG_CH2_ENBL_STALE_ERROR => SG_CH2_ENBL_STALE_ERROR ,
C_AXIS_IS_ASYNC => SG_IS_SYNCHRONOUS ,
C_ASYNC => C_PRMRY_IS_ACLK_ASYNC ,
C_INCLUDE_CH1 => C_INCLUDE_MM2S ,
C_INCLUDE_CH2 => C_INCLUDE_S2MM ,
C_INCLUDE_DESC_UPDATE => INCLUDE_DESC_UPDATE ,
C_INCLUDE_INTRPT => INCLUDE_INTRPT ,
C_INCLUDE_DLYTMR => INCLUDE_DLYTMR ,
C_DLYTMR_RESOLUTION => C_DLYTMR_RESOLUTION ,
C_ENABLE_MULTI_CHANNEL => C_ENABLE_MULTI_CHANNEL ,
C_ENABLE_EXTRA_FIELD => STSCNTRL_ENABLE ,
C_NUM_S2MM_CHANNELS => C_NUM_S2MM_CHANNELS ,
C_NUM_MM2S_CHANNELS => C_NUM_MM2S_CHANNELS ,
C_ACTUAL_ADDR => C_M_AXI_SG_ADDR_WIDTH ,
C_FAMILY => C_FAMILY
)
port map(
-----------------------------------------------------------------------
-- AXI Scatter Gather Interface
-----------------------------------------------------------------------
m_axi_sg_aclk => axi_sg_aclk ,
m_axi_mm2s_aclk => m_axi_mm2s_aclk ,
m_axi_sg_aresetn => m_axi_sg_aresetn ,
dm_resetn => dm_m_axi_sg_aresetn ,
p_reset_n => mm2s_prmry_resetn ,
-- Scatter Gather Write Address Channel
m_axi_sg_awaddr => m_axi_sg_awaddr_internal ,
m_axi_sg_awlen => m_axi_sg_awlen ,
m_axi_sg_awsize => m_axi_sg_awsize ,
m_axi_sg_awburst => m_axi_sg_awburst ,
m_axi_sg_awprot => m_axi_sg_awprot ,
m_axi_sg_awcache => m_axi_sg_awcache ,
m_axi_sg_awuser => m_axi_sg_awuser ,
m_axi_sg_awvalid => m_axi_sg_awvalid ,
m_axi_sg_awready => m_axi_sg_awready ,
-- Scatter Gather Write Data Channel
m_axi_sg_wdata => m_axi_sg_wdata ,
m_axi_sg_wstrb => m_axi_sg_wstrb ,
m_axi_sg_wlast => m_axi_sg_wlast ,
m_axi_sg_wvalid => m_axi_sg_wvalid ,
m_axi_sg_wready => m_axi_sg_wready ,
-- Scatter Gather Write Response Channel
m_axi_sg_bresp => m_axi_sg_bresp ,
m_axi_sg_bvalid => m_axi_sg_bvalid ,
m_axi_sg_bready => m_axi_sg_bready ,
-- Scatter Gather Read Address Channel
m_axi_sg_araddr => m_axi_sg_araddr_internal ,
m_axi_sg_arlen => m_axi_sg_arlen ,
m_axi_sg_arsize => m_axi_sg_arsize ,
m_axi_sg_arburst => m_axi_sg_arburst ,
m_axi_sg_arprot => m_axi_sg_arprot ,
m_axi_sg_arcache => m_axi_sg_arcache ,
m_axi_sg_aruser => m_axi_sg_aruser ,
m_axi_sg_arvalid => m_axi_sg_arvalid ,
m_axi_sg_arready => m_axi_sg_arready ,
-- Memory Map to Stream Scatter Gather Read Data Channel
m_axi_sg_rdata => m_axi_sg_rdata ,
m_axi_sg_rresp => m_axi_sg_rresp ,
m_axi_sg_rlast => m_axi_sg_rlast ,
m_axi_sg_rvalid => m_axi_sg_rvalid ,
m_axi_sg_rready => m_axi_sg_rready ,
sg_ctl => sg_ctl ,
-- Channel 1 Control and Status
ch1_run_stop => mm2s_dmacr(DMACR_RS_BIT) ,
ch1_cyclic => mm2s_dmacr(CYCLIC_BIT) ,
ch1_desc_flush => mm2s_desc_flush ,
ch1_cntrl_strm_stop => mm2s_cntrl_strm_stop ,
ch1_ftch_idle => mm2s_ftch_idle ,
ch1_ftch_interr_set => mm2s_ftch_interr_set ,
ch1_ftch_slverr_set => mm2s_ftch_slverr_set ,
ch1_ftch_decerr_set => mm2s_ftch_decerr_set ,
ch1_ftch_err_early => mm2s_ftch_err_early ,
ch1_ftch_stale_desc => mm2s_ftch_stale_desc ,
ch1_updt_idle => mm2s_updt_idle ,
ch1_updt_ioc_irq_set => mm2s_updt_ioc_irq_set ,
ch1_updt_interr_set => mm2s_updt_interr_set ,
ch1_updt_slverr_set => mm2s_updt_slverr_set ,
ch1_updt_decerr_set => mm2s_updt_decerr_set ,
ch1_dma_interr_set => mm2s_dma_interr_set ,
ch1_dma_slverr_set => mm2s_dma_slverr_set ,
ch1_dma_decerr_set => mm2s_dma_decerr_set ,
ch1_tailpntr_enabled => mm2s_dmacr(DMACR_TAILPEN_BIT) ,
ch1_taildesc_wren => mm2s_tailpntr_updated ,
ch1_taildesc => mm2s_taildesc ,
ch1_curdesc => mm2s_curdesc ,
-- Channel 1 Interrupt Coalescing Signals
--ch1_dlyirq_dsble => mm2s_dmasr(DMASR_DLYIRQ_BIT) , -- CR605888
ch1_dlyirq_dsble => mm2s_dlyirq_dsble , -- CR605888
ch1_irqthresh_rstdsbl => mm2s_irqthresh_rstdsbl , -- CR572013
ch1_irqdelay_wren => mm2s_irqdelay_wren ,
ch1_irqdelay => mm2s_dmacr(DMACR_IRQDELAY_MSB_BIT
downto DMACR_IRQDELAY_LSB_BIT),
ch1_irqthresh_wren => mm2s_irqthresh_wren ,
ch1_irqthresh => mm2s_dmacr(DMACR_IRQTHRESH_MSB_BIT
downto DMACR_IRQTHRESH_LSB_BIT),
ch1_packet_sof => mm2s_packet_sof ,
ch1_packet_eof => mm2s_packet_eof ,
ch1_ioc_irq_set => mm2s_ioc_irq_set ,
ch1_dly_irq_set => mm2s_dly_irq_set ,
ch1_irqdelay_status => mm2s_irqdelay_status ,
ch1_irqthresh_status => mm2s_irqthresh_status ,
-- Channel 1 AXI Fetch Stream Out
m_axis_ch1_ftch_aclk => axi_sg_aclk ,
m_axis_ch1_ftch_tdata => m_axis_mm2s_ftch_tdata ,
m_axis_ch1_ftch_tvalid => m_axis_mm2s_ftch_tvalid ,
m_axis_ch1_ftch_tready => m_axis_mm2s_ftch_tready ,
m_axis_ch1_ftch_tlast => m_axis_mm2s_ftch_tlast ,
m_axis_ch1_ftch_tdata_new => m_axis_mm2s_ftch_tdata_new ,
m_axis_ch1_ftch_tdata_mcdma_new => m_axis_mm2s_ftch_tdata_mcdma_new ,
m_axis_ch1_ftch_tvalid_new => m_axis_mm2s_ftch_tvalid_new ,
m_axis_ftch1_desc_available => m_axis_ftch1_desc_available,
-- Channel 1 AXI Update Stream In
s_axis_ch1_updt_aclk => axi_sg_aclk ,
s_axis_ch1_updtptr_tdata => s_axis_mm2s_updtptr_tdata ,
s_axis_ch1_updtptr_tvalid => s_axis_mm2s_updtptr_tvalid ,
s_axis_ch1_updtptr_tready => s_axis_mm2s_updtptr_tready ,
s_axis_ch1_updtptr_tlast => s_axis_mm2s_updtptr_tlast ,
s_axis_ch1_updtsts_tdata => s_axis_mm2s_updtsts_tdata ,
s_axis_ch1_updtsts_tvalid => s_axis_mm2s_updtsts_tvalid ,
s_axis_ch1_updtsts_tready => s_axis_mm2s_updtsts_tready ,
s_axis_ch1_updtsts_tlast => s_axis_mm2s_updtsts_tlast ,
-- Channel 2 Control and Status
ch2_run_stop => s2mm_run_stop_del , --s2mm_dmacr(DMACR_RS_BIT) ,
ch2_cyclic => s2mm_dmacr(CYCLIC_BIT) ,
ch2_desc_flush => s2mm_desc_flush_del, --s2mm_desc_flush ,
ch2_ftch_idle => s2mm_ftch_idle ,
ch2_ftch_interr_set => s2mm_ftch_interr_set ,
ch2_ftch_slverr_set => s2mm_ftch_slverr_set ,
ch2_ftch_decerr_set => s2mm_ftch_decerr_set ,
ch2_ftch_err_early => s2mm_ftch_err_early ,
ch2_ftch_stale_desc => s2mm_ftch_stale_desc ,
ch2_updt_idle => s2mm_updt_idle ,
ch2_updt_ioc_irq_set => s2mm_updt_ioc_irq_set , -- For TestVector
ch2_updt_interr_set => s2mm_updt_interr_set ,
ch2_updt_slverr_set => s2mm_updt_slverr_set ,
ch2_updt_decerr_set => s2mm_updt_decerr_set ,
ch2_dma_interr_set => s2mm_dma_interr_set ,
ch2_dma_slverr_set => s2mm_dma_slverr_set ,
ch2_dma_decerr_set => s2mm_dma_decerr_set ,
ch2_tailpntr_enabled => s2mm_dmacr(DMACR_TAILPEN_BIT) ,
ch2_taildesc_wren => s2mm_tailpntr_updated ,
ch2_taildesc => s2mm_taildesc ,
ch2_curdesc => s2mm_curdesc ,
-- Channel 2 Interrupt Coalescing Signals
--ch2_dlyirq_dsble => s2mm_dmasr(DMASR_DLYIRQ_BIT) , -- CR605888
ch2_dlyirq_dsble => s2mm_dlyirq_dsble , -- CR605888
ch2_irqthresh_rstdsbl => s2mm_irqthresh_rstdsbl , -- CR572013
ch2_irqdelay_wren => s2mm_irqdelay_wren ,
ch2_irqdelay => s2mm_dmacr(DMACR_IRQDELAY_MSB_BIT
downto DMACR_IRQDELAY_LSB_BIT),
ch2_irqthresh_wren => s2mm_irqthresh_wren ,
ch2_irqthresh => s2mm_dmacr(DMACR_IRQTHRESH_MSB_BIT
downto DMACR_IRQTHRESH_LSB_BIT),
ch2_packet_sof => s2mm_packet_sof ,
ch2_packet_eof => s2mm_packet_eof ,
ch2_ioc_irq_set => s2mm_ioc_irq_set ,
ch2_dly_irq_set => s2mm_dly_irq_set ,
ch2_irqdelay_status => s2mm_irqdelay_status ,
ch2_irqthresh_status => s2mm_irqthresh_status ,
ch2_update_active => ch2_update_active ,
-- Channel 2 AXI Fetch Stream Out
m_axis_ch2_ftch_aclk => axi_sg_aclk ,
m_axis_ch2_ftch_tdata => m_axis_s2mm_ftch_tdata ,
m_axis_ch2_ftch_tvalid => m_axis_s2mm_ftch_tvalid ,
m_axis_ch2_ftch_tready => m_axis_s2mm_ftch_tready ,
m_axis_ch2_ftch_tlast => m_axis_s2mm_ftch_tlast ,
m_axis_ch2_ftch_tdata_new => m_axis_s2mm_ftch_tdata_new ,
m_axis_ch2_ftch_tdata_mcdma_new => m_axis_s2mm_ftch_tdata_mcdma_new ,
m_axis_ch2_ftch_tdata_mcdma_nxt => m_axis_s2mm_ftch_tdata_mcdma_nxt ,
m_axis_ch2_ftch_tvalid_new => m_axis_s2mm_ftch_tvalid_new ,
m_axis_ftch2_desc_available => m_axis_ftch2_desc_available,
-- Channel 2 AXI Update Stream In
s_axis_ch2_updt_aclk => axi_sg_aclk ,
s_axis_ch2_updtptr_tdata => s_axis_s2mm_updtptr_tdata ,
s_axis_ch2_updtptr_tvalid => s_axis_s2mm_updtptr_tvalid ,
s_axis_ch2_updtptr_tready => s_axis_s2mm_updtptr_tready ,
s_axis_ch2_updtptr_tlast => s_axis_s2mm_updtptr_tlast ,
s_axis_ch2_updtsts_tdata => s_axis_s2mm_updtsts_tdata ,
s_axis_ch2_updtsts_tvalid => s_axis_s2mm_updtsts_tvalid ,
s_axis_ch2_updtsts_tready => s_axis_s2mm_updtsts_tready ,
s_axis_ch2_updtsts_tlast => s_axis_s2mm_updtsts_tlast ,
-- Error addresses
ftch_error => ftch_error ,
ftch_error_addr => ftch_error_addr ,
updt_error => updt_error ,
updt_error_addr => updt_error_addr ,
m_axis_mm2s_cntrl_tdata => m_axis_mm2s_cntrl_tdata ,
m_axis_mm2s_cntrl_tkeep => m_axis_mm2s_cntrl_tkeep ,
m_axis_mm2s_cntrl_tvalid => m_axis_mm2s_cntrl_tvalid ,
m_axis_mm2s_cntrl_tready => m_axis_mm2s_cntrl_tready ,
m_axis_mm2s_cntrl_tlast => m_axis_mm2s_cntrl_tlast ,
bd_eq => bd_eq
);
m_axi_sg_awaddr <= m_axi_sg_awaddr_internal (C_M_AXI_SG_ADDR_WIDTH-1 downto 0);
m_axi_sg_araddr <= m_axi_sg_araddr_internal (C_M_AXI_SG_ADDR_WIDTH-1 downto 0);
end generate GEN_SG_ENGINE;
-------------------------------------------------------------------------------
-- Exclude Scatter Gather Engine (Simple DMA Mode Enabled)
-------------------------------------------------------------------------------
GEN_NO_SG_ENGINE : if C_INCLUDE_SG = 0 generate
begin
-- Scatter Gather AXI Master Interface Tie-Off
m_axi_sg_awaddr <= (others => '0');
m_axi_sg_awlen <= (others => '0');
m_axi_sg_awsize <= (others => '0');
m_axi_sg_awburst <= (others => '0');
m_axi_sg_awprot <= (others => '0');
m_axi_sg_awcache <= (others => '0');
m_axi_sg_awvalid <= '0';
m_axi_sg_wdata <= (others => '0');
m_axi_sg_wstrb <= (others => '0');
m_axi_sg_wlast <= '0';
m_axi_sg_wvalid <= '0';
m_axi_sg_bready <= '0';
m_axi_sg_araddr <= (others => '0');
m_axi_sg_arlen <= (others => '0');
m_axi_sg_arsize <= (others => '0');
m_axi_sg_arburst <= (others => '0');
m_axi_sg_arcache <= (others => '0');
m_axi_sg_arprot <= (others => '0');
m_axi_sg_arvalid <= '0';
m_axi_sg_rready <= '0';
m_axis_mm2s_cntrl_tdata <= (others => '0');
m_axis_mm2s_cntrl_tkeep <= (others => '0');
m_axis_mm2s_cntrl_tvalid <= '0';
m_axis_mm2s_cntrl_tlast <= '0';
-- MM2S Signal Remapping/Tie Off for Simple DMA Mode
m_axis_mm2s_ftch_tdata <= (others => '0');
m_axis_mm2s_ftch_tvalid <= '0';
m_axis_mm2s_ftch_tlast <= '0';
s_axis_mm2s_updtptr_tready <= '0';
s_axis_mm2s_updtsts_tready <= '0';
mm2s_ftch_idle <= '1';
mm2s_updt_idle <= '1';
mm2s_ftch_interr_set <= '0';
mm2s_ftch_slverr_set <= '0';
mm2s_ftch_decerr_set <= '0';
mm2s_ftch_err_early <= '0';
mm2s_ftch_stale_desc <= '0';
mm2s_updt_interr_set <= '0';
mm2s_updt_slverr_set <= '0';
mm2s_updt_decerr_set <= '0';
mm2s_updt_ioc_irq_set <= mm2s_smpl_done; -- For TestVector
mm2s_dma_interr_set <= mm2s_smpl_interr_set; -- To DMASR
mm2s_dma_slverr_set <= mm2s_smpl_slverr_set; -- To DMASR
mm2s_dma_decerr_set <= mm2s_smpl_decerr_set; -- To DMASR
-- S2MM Signal Remapping/Tie Off for Simple DMA Mode
m_axis_s2mm_ftch_tdata <= (others => '0');
m_axis_s2mm_ftch_tvalid <= '0';
m_axis_s2mm_ftch_tlast <= '0';
s_axis_s2mm_updtptr_tready <= '0';
s_axis_s2mm_updtsts_tready <= '0';
s2mm_ftch_idle <= '1';
s2mm_updt_idle <= '1';
s2mm_ftch_interr_set <= '0';
s2mm_ftch_slverr_set <= '0';
s2mm_ftch_decerr_set <= '0';
s2mm_ftch_err_early <= '0';
s2mm_ftch_stale_desc <= '0';
s2mm_updt_interr_set <= '0';
s2mm_updt_slverr_set <= '0';
s2mm_updt_decerr_set <= '0';
s2mm_updt_ioc_irq_set <= s2mm_smpl_done; -- For TestVector
s2mm_dma_interr_set <= s2mm_smpl_interr_set; -- To DMASR
s2mm_dma_slverr_set <= s2mm_smpl_slverr_set; -- To DMASR
s2mm_dma_decerr_set <= s2mm_smpl_decerr_set; -- To DMASR
ftch_error <= '0';
ftch_error_addr <= (others => '0');
updt_error <= '0';
updt_error_addr <= (others=> '0');
-- CR595462 - Removed interrupt coalescing logic for Simple DMA mode and replaced
-- with interrupt complete.
mm2s_ioc_irq_set <= mm2s_smpl_done;
mm2s_dly_irq_set <= '0';
mm2s_irqdelay_status <= (others => '0');
mm2s_irqthresh_status <= (others => '0');
s2mm_ioc_irq_set <= s2mm_smpl_done;
s2mm_dly_irq_set <= '0';
s2mm_irqdelay_status <= (others => '0');
s2mm_irqthresh_status <= (others => '0');
end generate GEN_NO_SG_ENGINE;
INCLUDE_MM2S_SOF_EOF_GENERATOR : if C_INCLUDE_MM2S = 1 generate
begin
-------------------------------------------------------------------------------
-- MM2S DMA Controller
-------------------------------------------------------------------------------
I_MM2S_DMA_MNGR : entity axi_dma_v7_1_10.axi_dma_mm2s_mngr
generic map(
C_PRMRY_IS_ACLK_ASYNC => C_PRMRY_IS_ACLK_ASYNC ,
C_PRMY_CMDFIFO_DEPTH => DM_CMDSTS_FIFO_DEPTH ,
C_INCLUDE_SG => C_INCLUDE_SG ,
C_SG_INCLUDE_STSCNTRL_STRM => STSCNTRL_ENABLE ,
C_SG_INCLUDE_DESC_QUEUE => DESC_QUEUE ,
C_SG_LENGTH_WIDTH => C_SG_LENGTH_WIDTH_INT ,
C_M_AXI_SG_ADDR_WIDTH => ADDR_WIDTH ,
C_M_AXIS_SG_TDATA_WIDTH => M_AXIS_SG_TDATA_WIDTH ,
C_S_AXIS_UPDPTR_TDATA_WIDTH => S_AXIS_UPDPTR_TDATA_WIDTH ,
C_S_AXIS_UPDSTS_TDATA_WIDTH => S_AXIS_UPDSTS_TDATA_WIDTH ,
C_M_AXIS_MM2S_CNTRL_TDATA_WIDTH => C_M_AXIS_MM2S_CNTRL_TDATA_WIDTH ,
C_INCLUDE_MM2S => C_INCLUDE_MM2S ,
C_M_AXI_MM2S_ADDR_WIDTH => ADDR_WIDTH, --C_M_AXI_MM2S_ADDR_WIDTH ,
C_ENABLE_MULTI_CHANNEL => C_ENABLE_MULTI_CHANNEL ,
C_MICRO_DMA => C_MICRO_DMA ,
C_FAMILY => C_FAMILY
)
port map(
-- Secondary Clock and Reset
m_axi_sg_aclk => axi_sg_aclk ,
m_axi_sg_aresetn => mm2s_scndry_resetn ,
-- Primary Clock and Reset
axi_prmry_aclk => m_axi_mm2s_aclk ,
p_reset_n => mm2s_prmry_resetn ,
soft_reset => soft_reset ,
-- MM2S Control and Status
mm2s_run_stop => mm2s_dmacr(DMACR_RS_BIT) ,
mm2s_keyhole => mm2s_dmacr(DMACR_KH_BIT) ,
mm2s_halted => mm2s_dmasr(DMASR_HALTED_BIT) ,
mm2s_ftch_idle => mm2s_ftch_idle ,
mm2s_updt_idle => mm2s_updt_idle ,
mm2s_halt => mm2s_halt ,
mm2s_halt_cmplt => mm2s_halt_cmplt ,
mm2s_halted_clr => mm2s_halted_clr ,
mm2s_halted_set => mm2s_halted_set ,
mm2s_idle_set => mm2s_idle_set ,
mm2s_idle_clr => mm2s_idle_clr ,
mm2s_stop => mm2s_stop ,
mm2s_ftch_err_early => mm2s_ftch_err_early ,
mm2s_ftch_stale_desc => mm2s_ftch_stale_desc ,
mm2s_desc_flush => mm2s_desc_flush ,
cntrl_strm_stop => mm2s_cntrl_strm_stop ,
mm2s_tailpntr_enble => mm2s_dmacr(DMACR_TAILPEN_BIT) ,
mm2s_all_idle => mm2s_all_idle ,
mm2s_error => mm2s_error ,
s2mm_error => s2mm_error ,
-- Simple DMA Mode Signals
mm2s_sa => mm2s_sa ,
mm2s_length => mm2s_length ,
mm2s_length_wren => mm2s_length_wren ,
mm2s_smple_done => mm2s_smpl_done ,
mm2s_interr_set => mm2s_smpl_interr_set ,
mm2s_slverr_set => mm2s_smpl_slverr_set ,
mm2s_decerr_set => mm2s_smpl_decerr_set ,
m_axis_mm2s_aclk => m_axi_mm2s_aclk,
mm2s_strm_tlast => m_axis_mm2s_tlast_i_user,
mm2s_strm_tready => m_axis_mm2s_tready,
mm2s_axis_info => mm2s_axis_info,
-- SG MM2S Descriptor Fetch AXI Stream In
m_axis_mm2s_ftch_tdata => m_axis_mm2s_ftch_tdata ,
m_axis_mm2s_ftch_tvalid => m_axis_mm2s_ftch_tvalid ,
m_axis_mm2s_ftch_tready => m_axis_mm2s_ftch_tready ,
m_axis_mm2s_ftch_tlast => m_axis_mm2s_ftch_tlast ,
m_axis_mm2s_ftch_tdata_new => m_axis_mm2s_ftch_tdata_new ,
m_axis_mm2s_ftch_tdata_mcdma_new => m_axis_mm2s_ftch_tdata_mcdma_new ,
m_axis_mm2s_ftch_tvalid_new => m_axis_mm2s_ftch_tvalid_new ,
m_axis_ftch1_desc_available => m_axis_ftch1_desc_available,
-- SG MM2S Descriptor Update AXI Stream Out
s_axis_mm2s_updtptr_tdata => s_axis_mm2s_updtptr_tdata ,
s_axis_mm2s_updtptr_tvalid => s_axis_mm2s_updtptr_tvalid ,
s_axis_mm2s_updtptr_tready => s_axis_mm2s_updtptr_tready ,
s_axis_mm2s_updtptr_tlast => s_axis_mm2s_updtptr_tlast ,
s_axis_mm2s_updtsts_tdata => s_axis_mm2s_updtsts_tdata ,
s_axis_mm2s_updtsts_tvalid => s_axis_mm2s_updtsts_tvalid ,
s_axis_mm2s_updtsts_tready => s_axis_mm2s_updtsts_tready ,
s_axis_mm2s_updtsts_tlast => s_axis_mm2s_updtsts_tlast ,
-- Currently Being Processed Descriptor
mm2s_new_curdesc => mm2s_new_curdesc ,
mm2s_new_curdesc_wren => mm2s_new_curdesc_wren ,
-- User Command Interface Ports (AXI Stream)
s_axis_mm2s_cmd_tvalid => s_axis_mm2s_cmd_tvalid_split ,
s_axis_mm2s_cmd_tready => s_axis_mm2s_cmd_tready_split ,
s_axis_mm2s_cmd_tdata => s_axis_mm2s_cmd_tdata_split ,
-- User Status Interface Ports (AXI Stream)
m_axis_mm2s_sts_tvalid => m_axis_mm2s_sts_tvalid ,
m_axis_mm2s_sts_tready => m_axis_mm2s_sts_tready ,
m_axis_mm2s_sts_tdata => m_axis_mm2s_sts_tdata ,
m_axis_mm2s_sts_tkeep => m_axis_mm2s_sts_tkeep ,
mm2s_err => mm2s_err ,
updt_error => updt_error ,
ftch_error => ftch_error ,
-- Memory Map to Stream Control Stream Interface
m_axis_mm2s_cntrl_tdata => open, --m_axis_mm2s_cntrl_tdata ,
m_axis_mm2s_cntrl_tkeep => open, --m_axis_mm2s_cntrl_tkeep ,
m_axis_mm2s_cntrl_tvalid => open, --m_axis_mm2s_cntrl_tvalid ,
m_axis_mm2s_cntrl_tready => '0', --m_axis_mm2s_cntrl_tready ,
m_axis_mm2s_cntrl_tlast => open --m_axis_mm2s_cntrl_tlast
);
m_axis_mm2s_tuser <= mm2s_axis_info (13 downto 10);
m_axis_mm2s_tid <= mm2s_axis_info (9 downto 5); --
m_axis_mm2s_tdest <= mm2s_axis_info (4 downto 0) ; --
-- If MM2S channel included then include sof/eof generator
-------------------------------------------------------------------------------
-- MM2S SOF / EOF generation for interrupt coalescing
-------------------------------------------------------------------------------
I_MM2S_SOFEOF_GEN : entity axi_dma_v7_1_10.axi_dma_sofeof_gen
generic map(
C_PRMRY_IS_ACLK_ASYNC => C_PRMRY_IS_ACLK_ASYNC
)
port map(
axi_prmry_aclk => m_axi_mm2s_aclk ,
p_reset_n => mm2s_prmry_resetn ,
m_axi_sg_aclk => axi_sg_aclk ,
m_axi_sg_aresetn => mm2s_scndry_resetn ,
axis_tready => m_axis_mm2s_tready ,
axis_tvalid => m_axis_mm2s_tvalid_i ,
axis_tlast => m_axis_mm2s_tlast_i ,
packet_sof => mm2s_packet_sof ,
packet_eof => mm2s_packet_eof
);
end generate INCLUDE_MM2S_SOF_EOF_GENERATOR;
-- If MM2S channel not included then exclude sof/eof generator
EXCLUDE_MM2S_SOF_EOF_GENERATOR : if C_INCLUDE_MM2S = 0 generate
begin
mm2s_packet_sof <= '0';
mm2s_packet_eof <= '0';
end generate EXCLUDE_MM2S_SOF_EOF_GENERATOR;
INCLUDE_S2MM_SOF_EOF_GENERATOR : if C_INCLUDE_S2MM = 1 generate
begin
-------------------------------------------------------------------------------
-- S2MM DMA Controller
-------------------------------------------------------------------------------
I_S2MM_DMA_MNGR : entity axi_dma_v7_1_10.axi_dma_s2mm_mngr
generic map(
C_PRMRY_IS_ACLK_ASYNC => C_PRMRY_IS_ACLK_ASYNC ,
C_PRMY_CMDFIFO_DEPTH => DM_CMDSTS_FIFO_DEPTH ,
C_DM_STATUS_WIDTH => DM_STATUS_WIDTH ,
C_INCLUDE_SG => C_INCLUDE_SG ,
C_SG_INCLUDE_STSCNTRL_STRM => STSCNTRL_ENABLE ,
C_SG_INCLUDE_DESC_QUEUE => DESC_QUEUE ,
C_SG_USE_STSAPP_LENGTH => APPLENGTH_ENABLE ,
C_SG_LENGTH_WIDTH => C_SG_LENGTH_WIDTH_INT ,
C_M_AXI_SG_ADDR_WIDTH => ADDR_WIDTH ,
C_M_AXIS_SG_TDATA_WIDTH => M_AXIS_SG_TDATA_WIDTH ,
C_S_AXIS_UPDPTR_TDATA_WIDTH => S_AXIS_UPDPTR_TDATA_WIDTH ,
C_S_AXIS_UPDSTS_TDATA_WIDTH => S_AXIS_UPDSTS_TDATA_WIDTH ,
C_S_AXIS_S2MM_STS_TDATA_WIDTH => C_S_AXIS_S2MM_STS_TDATA_WIDTH ,
C_INCLUDE_S2MM => C_INCLUDE_S2MM ,
C_M_AXI_S2MM_ADDR_WIDTH => ADDR_WIDTH ,
C_NUM_S2MM_CHANNELS => C_NUM_S2MM_CHANNELS ,
C_ENABLE_MULTI_CHANNEL => C_ENABLE_MULTI_CHANNEL ,
C_MICRO_DMA => C_MICRO_DMA ,
C_FAMILY => C_FAMILY
)
port map(
-- Secondary Clock and Reset
m_axi_sg_aclk => axi_sg_aclk ,
m_axi_sg_aresetn => s2mm_scndry_resetn ,
-- Primary Clock and Reset
axi_prmry_aclk => m_axi_s2mm_aclk ,
p_reset_n => s2mm_prmry_resetn ,
soft_reset => soft_reset ,
-- S2MM Control and Status
s2mm_run_stop => s2mm_dmacr(DMACR_RS_BIT) ,
s2mm_keyhole => s2mm_dmacr(DMACR_KH_BIT) ,
s2mm_halted => s2mm_dmasr(DMASR_HALTED_BIT) ,
s2mm_packet_eof_out => s2mm_eof_s2mm ,
s2mm_ftch_idle => s2mm_ftch_idle ,
s2mm_updt_idle => s2mm_updt_idle ,
s2mm_halted_clr => s2mm_halted_clr ,
s2mm_halted_set => s2mm_halted_set ,
s2mm_idle_set => s2mm_idle_set ,
s2mm_idle_clr => s2mm_idle_clr ,
s2mm_stop => s2mm_stop ,
s2mm_ftch_err_early => s2mm_ftch_err_early ,
s2mm_ftch_stale_desc => s2mm_ftch_stale_desc ,
s2mm_desc_flush => s2mm_desc_flush ,
s2mm_tailpntr_enble => s2mm_dmacr(DMACR_TAILPEN_BIT) ,
s2mm_all_idle => s2mm_all_idle ,
s2mm_halt => s2mm_halt ,
s2mm_halt_cmplt => s2mm_halt_cmplt ,
s2mm_error => s2mm_error ,
mm2s_error => mm2s_error ,
s2mm_desc_info_in => s2mm_desc_info_in ,
-- Simple DMA Mode Signals
s2mm_da => s2mm_da ,
s2mm_length => s2mm_length ,
s2mm_length_wren => s2mm_length_wren ,
s2mm_smple_done => s2mm_smpl_done ,
s2mm_interr_set => s2mm_smpl_interr_set ,
s2mm_slverr_set => s2mm_smpl_slverr_set ,
s2mm_decerr_set => s2mm_smpl_decerr_set ,
s2mm_bytes_rcvd => s2mm_bytes_rcvd ,
s2mm_bytes_rcvd_wren => s2mm_bytes_rcvd_wren ,
-- SG S2MM Descriptor Fetch AXI Stream In
m_axis_s2mm_ftch_tdata => m_axis_s2mm_ftch_tdata ,
m_axis_s2mm_ftch_tvalid => m_axis_s2mm_ftch_tvalid ,
m_axis_s2mm_ftch_tready => m_axis_s2mm_ftch_tready ,
m_axis_s2mm_ftch_tlast => m_axis_s2mm_ftch_tlast ,
m_axis_s2mm_ftch_tdata_new => m_axis_s2mm_ftch_tdata_new ,
m_axis_s2mm_ftch_tdata_mcdma_new => m_axis_s2mm_ftch_tdata_mcdma_new ,
m_axis_s2mm_ftch_tdata_mcdma_nxt => m_axis_s2mm_ftch_tdata_mcdma_nxt ,
m_axis_s2mm_ftch_tvalid_new => m_axis_s2mm_ftch_tvalid_new ,
m_axis_ftch2_desc_available => m_axis_ftch2_desc_available,
-- SG S2MM Descriptor Update AXI Stream Out
s_axis_s2mm_updtptr_tdata => s_axis_s2mm_updtptr_tdata ,
s_axis_s2mm_updtptr_tvalid => s_axis_s2mm_updtptr_tvalid ,
s_axis_s2mm_updtptr_tready => s_axis_s2mm_updtptr_tready ,
s_axis_s2mm_updtptr_tlast => s_axis_s2mm_updtptr_tlast ,
s_axis_s2mm_updtsts_tdata => s_axis_s2mm_updtsts_tdata ,
s_axis_s2mm_updtsts_tvalid => s_axis_s2mm_updtsts_tvalid ,
s_axis_s2mm_updtsts_tready => s_axis_s2mm_updtsts_tready ,
s_axis_s2mm_updtsts_tlast => s_axis_s2mm_updtsts_tlast ,
-- Currently Being Processed Descriptor
s2mm_new_curdesc => s2mm_new_curdesc ,
s2mm_new_curdesc_wren => s2mm_new_curdesc_wren ,
-- User Command Interface Ports (AXI Stream)
-- s_axis_s2mm_cmd_tvalid => s_axis_s2mm_cmd_tvalid_split ,
-- s_axis_s2mm_cmd_tready => s_axis_s2mm_cmd_tready_split ,
-- s_axis_s2mm_cmd_tdata => s_axis_s2mm_cmd_tdata_split ,
s_axis_s2mm_cmd_tvalid => s_axis_s2mm_cmd_tvalid_split ,
s_axis_s2mm_cmd_tready => s_axis_s2mm_cmd_tready_split ,
s_axis_s2mm_cmd_tdata => s_axis_s2mm_cmd_tdata_split ,
-- User Status Interface Ports (AXI Stream)
m_axis_s2mm_sts_tvalid => m_axis_s2mm_sts_tvalid ,
m_axis_s2mm_sts_tready => m_axis_s2mm_sts_tready ,
m_axis_s2mm_sts_tdata => m_axis_s2mm_sts_tdata ,
m_axis_s2mm_sts_tkeep => m_axis_s2mm_sts_tkeep ,
s2mm_err => s2mm_err ,
updt_error => updt_error ,
ftch_error => ftch_error ,
-- Stream to Memory Map Status Stream Interface
s_axis_s2mm_sts_tdata => s_axis_s2mm_sts_tdata ,
s_axis_s2mm_sts_tkeep => s_axis_s2mm_sts_tkeep ,
s_axis_s2mm_sts_tvalid => s_axis_s2mm_sts_tvalid ,
s_axis_s2mm_sts_tready => s_axis_s2mm_sts_tready ,
s_axis_s2mm_sts_tlast => s_axis_s2mm_sts_tlast
);
-- If S2MM channel included then include sof/eof generator
-------------------------------------------------------------------------------
-- S2MM SOF / EOF generation for interrupt coalescing
-------------------------------------------------------------------------------
I_S2MM_SOFEOF_GEN : entity axi_dma_v7_1_10.axi_dma_sofeof_gen
generic map(
C_PRMRY_IS_ACLK_ASYNC => C_PRMRY_IS_ACLK_ASYNC
)
port map(
axi_prmry_aclk => m_axi_s2mm_aclk ,
p_reset_n => s2mm_prmry_resetn ,
m_axi_sg_aclk => axi_sg_aclk ,
m_axi_sg_aresetn => s2mm_scndry_resetn ,
axis_tready => s_axis_s2mm_tready_i ,
axis_tvalid => s_axis_s2mm_tvalid ,
axis_tlast => s_axis_s2mm_tlast ,
packet_sof => s2mm_packet_sof ,
packet_eof => s2mm_packet_eof
);
end generate INCLUDE_S2MM_SOF_EOF_GENERATOR;
-- If S2MM channel not included then exclude sof/eof generator
EXCLUDE_S2MM_SOF_EOF_GENERATOR : if C_INCLUDE_S2MM = 0 generate
begin
s2mm_packet_sof <= '0';
s2mm_packet_eof <= '0';
end generate EXCLUDE_S2MM_SOF_EOF_GENERATOR;
INCLUDE_S2MM_GATE : if (C_ENABLE_MULTI_CHANNEL = 1 and C_INCLUDE_S2MM = 1) generate
begin
cmpt_updt <= m_axis_s2mm_sts_tvalid & s2mm_eof_s2mm;
I_S2MM_GATE_GEN : entity axi_dma_v7_1_10.axi_dma_s2mm
generic map (
C_FAMILY => C_FAMILY
)
port map (
clk_in => m_axi_s2mm_aclk,
sg_clk => axi_sg_aclk,
resetn => s2mm_prmry_resetn,
reset_sg => m_axi_sg_aresetn,
s2mm_tvalid => s_axis_s2mm_tvalid,
s2mm_tready => s_axis_s2mm_tready_i,
s2mm_tlast => s_axis_s2mm_tlast,
s2mm_tdest => s_axis_s2mm_tdest,
s2mm_tuser => s_axis_s2mm_tuser,
s2mm_tid => s_axis_s2mm_tid,
desc_available => s_axis_s2mm_cmd_tvalid_split,
-- s2mm_eof => s2mm_eof_s2mm,
s2mm_eof_det => cmpt_updt, --m_axis_s2mm_sts_tvalid, --s2mm_eof_s2mm,
ch2_update_active => ch2_update_active,
tdest_out => tdest_out_int,
same_tdest => same_tdest,
-- to DM
-- updt_cmpt => updt_cmpt,
s2mm_desc_info => s2mm_desc_info_in,
s2mm_tvalid_out => open, --s_axis_s2mm_tvalid_int,
s2mm_tready_out => open, --s_axis_s2mm_tready_i,
s2mm_tlast_out => open, --s_axis_s2mm_tlast_int,
s2mm_tdest_out => open
);
end generate INCLUDE_S2MM_GATE;
INCLUDE_S2MM_NOGATE : if (C_ENABLE_MULTI_CHANNEL = 0 and C_INCLUDE_S2MM = 1) generate
begin
updt_cmpt <= '0';
tdest_out_int <= (others => '0');
same_tdest <= '0';
s_axis_s2mm_tvalid_int <= s_axis_s2mm_tvalid;
s_axis_s2mm_tlast_int <= s_axis_s2mm_tlast;
end generate INCLUDE_S2MM_NOGATE;
MM2S_SPLIT : if (C_ENABLE_MULTI_CHANNEL = 1 and C_INCLUDE_MM2S = 1) generate
begin
CLOCKS : if (C_PRMRY_IS_ACLK_ASYNC = 1) generate
begin
clock_splt <= axi_sg_aclk;
end generate CLOCKS;
CLOCKS_SYNC : if (C_PRMRY_IS_ACLK_ASYNC = 0) generate
begin
clock_splt <= m_axi_mm2s_aclk;
end generate CLOCKS_SYNC;
I_COMMAND_MM2S_SPLITTER : entity axi_dma_v7_1_10.axi_dma_cmd_split
generic map (
C_ADDR_WIDTH => ADDR_WIDTH,
C_INCLUDE_S2MM => 0,
C_DM_STATUS_WIDTH => 8
)
port map (
clock => clock_splt, --axi_sg_aclk,
sgresetn => m_axi_sg_aresetn,
clock_sec => m_axi_mm2s_aclk, --axi_sg_aclk,
aresetn => m_axi_mm2s_aresetn,
-- MM2S command coming from MM2S_MNGR
s_axis_cmd_tvalid => s_axis_mm2s_cmd_tvalid_split,
s_axis_cmd_tready => s_axis_mm2s_cmd_tready_split,
s_axis_cmd_tdata => s_axis_mm2s_cmd_tdata_split,
-- MM2S split command to DM
s_axis_cmd_tvalid_s => s_axis_mm2s_cmd_tvalid,
s_axis_cmd_tready_s => s_axis_mm2s_cmd_tready,
s_axis_cmd_tdata_s => s_axis_mm2s_cmd_tdata,
tvalid_from_datamover => m_axis_mm2s_sts_tvalid_int,
status_in => m_axis_mm2s_sts_tdata_int,
tvalid_unsplit => m_axis_mm2s_sts_tvalid,
status_out => m_axis_mm2s_sts_tdata,
tlast_stream_data => m_axis_mm2s_tlast_i_mcdma,
tready_stream_data => m_axis_mm2s_tready,
tlast_unsplit => m_axis_mm2s_tlast_i,
tlast_unsplit_user => m_axis_mm2s_tlast_i_user
);
end generate MM2S_SPLIT;
MM2S_SPLIT_NOMCDMA : if (C_ENABLE_MULTI_CHANNEL = 0 and C_INCLUDE_MM2S = 1) generate
begin
s_axis_mm2s_cmd_tvalid <= s_axis_mm2s_cmd_tvalid_split;
s_axis_mm2s_cmd_tready_split <= s_axis_mm2s_cmd_tready;
s_axis_mm2s_cmd_tdata <= s_axis_mm2s_cmd_tdata_split ((ADDR_WIDTH+CMD_BASE_WIDTH)-1 downto 0);
m_axis_mm2s_sts_tvalid <= m_axis_mm2s_sts_tvalid_int;
m_axis_mm2s_sts_tdata <= m_axis_mm2s_sts_tdata_int;
m_axis_mm2s_tlast_i <= m_axis_mm2s_tlast_i_mcdma;
m_axis_mm2s_tlast_i_user <= '0';
end generate MM2S_SPLIT_NOMCDMA;
S2MM_SPLIT : if (C_ENABLE_MULTI_CHANNEL = 1 and C_INCLUDE_S2MM = 1) generate
begin
CLOCKS_S2MM : if (C_PRMRY_IS_ACLK_ASYNC = 1) generate
begin
clock_splt_s2mm <= axi_sg_aclk;
end generate CLOCKS_S2MM;
CLOCKS_SYNC_S2MM : if (C_PRMRY_IS_ACLK_ASYNC = 0) generate
begin
clock_splt_s2mm <= m_axi_s2mm_aclk;
end generate CLOCKS_SYNC_S2MM;
I_COMMAND_S2MM_SPLITTER : entity axi_dma_v7_1_10.axi_dma_cmd_split
generic map (
C_ADDR_WIDTH => ADDR_WIDTH,
C_INCLUDE_S2MM => C_INCLUDE_S2MM,
C_DM_STATUS_WIDTH => DM_STATUS_WIDTH
)
port map (
clock => clock_splt_s2mm,
sgresetn => m_axi_sg_aresetn,
clock_sec => m_axi_s2mm_aclk, --axi_sg_aclk, --m_axi_s2mm_aclk,
aresetn => m_axi_s2mm_aresetn,
-- S2MM command coming from S2MM_MNGR
s_axis_cmd_tvalid => s_axis_s2mm_cmd_tvalid_split,
s_axis_cmd_tready => s_axis_s2mm_cmd_tready_split,
s_axis_cmd_tdata => s_axis_s2mm_cmd_tdata_split,
-- S2MM split command to DM
s_axis_cmd_tvalid_s => s_axis_s2mm_cmd_tvalid,
s_axis_cmd_tready_s => s_axis_s2mm_cmd_tready,
s_axis_cmd_tdata_s => s_axis_s2mm_cmd_tdata,
tvalid_from_datamover => m_axis_s2mm_sts_tvalid_int,
status_in => m_axis_s2mm_sts_tdata_int,
tvalid_unsplit => m_axis_s2mm_sts_tvalid,
status_out => m_axis_s2mm_sts_tdata,
tlast_stream_data => '0',
tready_stream_data => '0',
tlast_unsplit => open,
tlast_unsplit_user => open
);
end generate S2MM_SPLIT;
S2MM_SPLIT_NOMCDMA : if (C_ENABLE_MULTI_CHANNEL = 0 and C_INCLUDE_S2MM = 1) generate
begin
s_axis_s2mm_cmd_tvalid <= s_axis_s2mm_cmd_tvalid_split;
s_axis_s2mm_cmd_tready_split <= s_axis_s2mm_cmd_tready;
s_axis_s2mm_cmd_tdata <= s_axis_s2mm_cmd_tdata_split ((ADDR_WIDTH+CMD_BASE_WIDTH)-1 downto 0);
m_axis_s2mm_sts_tvalid <= m_axis_s2mm_sts_tvalid_int;
m_axis_s2mm_sts_tdata <= m_axis_s2mm_sts_tdata_int;
end generate S2MM_SPLIT_NOMCDMA;
-------------------------------------------------------------------------------
-- Primary MM2S and S2MM DataMover
-------------------------------------------------------------------------------
I_PRMRY_DATAMOVER : entity axi_datamover_v5_1_11.axi_datamover
generic map(
C_INCLUDE_MM2S => MM2S_AXI_FULL_MODE,
C_M_AXI_MM2S_ADDR_WIDTH => ADDR_WIDTH,
C_M_AXI_MM2S_DATA_WIDTH => C_M_AXI_MM2S_DATA_WIDTH,
C_M_AXIS_MM2S_TDATA_WIDTH => C_M_AXIS_MM2S_TDATA_WIDTH,
C_INCLUDE_MM2S_STSFIFO => DM_INCLUDE_STS_FIFO,
C_MM2S_STSCMD_FIFO_DEPTH => DM_CMDSTS_FIFO_DEPTH_1,
C_MM2S_STSCMD_IS_ASYNC => C_PRMRY_IS_ACLK_ASYNC,
C_INCLUDE_MM2S_DRE => C_INCLUDE_MM2S_DRE,
C_MM2S_BURST_SIZE => C_MM2S_BURST_SIZE,
C_MM2S_BTT_USED => DM_BTT_LENGTH_WIDTH,
C_MM2S_ADDR_PIPE_DEPTH => DM_ADDR_PIPE_DEPTH,
C_MM2S_INCLUDE_SF => DM_MM2S_INCLUDE_SF,
C_ENABLE_CACHE_USER => C_ENABLE_MULTI_CHANNEL,
C_ENABLE_SKID_BUF => skid_enable, --"11111",
C_MICRO_DMA => C_MICRO_DMA,
C_CMD_WIDTH => CMD_WIDTH,
C_INCLUDE_S2MM => S2MM_AXI_FULL_MODE,
C_M_AXI_S2MM_ADDR_WIDTH => ADDR_WIDTH,
C_M_AXI_S2MM_DATA_WIDTH => C_M_AXI_S2MM_DATA_WIDTH,
C_S_AXIS_S2MM_TDATA_WIDTH => C_S_AXIS_S2MM_TDATA_WIDTH,
C_INCLUDE_S2MM_STSFIFO => DM_INCLUDE_STS_FIFO,
C_S2MM_STSCMD_FIFO_DEPTH => DM_CMDSTS_FIFO_DEPTH_1,
C_S2MM_STSCMD_IS_ASYNC => C_PRMRY_IS_ACLK_ASYNC,
C_INCLUDE_S2MM_DRE => C_INCLUDE_S2MM_DRE,
C_S2MM_BURST_SIZE => C_S2MM_BURST_SIZE,
C_S2MM_BTT_USED => DM_BTT_LENGTH_WIDTH,
C_S2MM_SUPPORT_INDET_BTT => DM_SUPPORT_INDET_BTT,
C_S2MM_ADDR_PIPE_DEPTH => DM_ADDR_PIPE_DEPTH,
C_S2MM_INCLUDE_SF => DM_S2MM_INCLUDE_SF,
C_FAMILY => C_FAMILY
)
port map(
-- MM2S Primary Clock / Reset input
m_axi_mm2s_aclk => m_axi_mm2s_aclk ,
m_axi_mm2s_aresetn => m_axi_mm2s_aresetn ,
mm2s_halt => mm2s_halt ,
mm2s_halt_cmplt => mm2s_halt_cmplt ,
mm2s_err => mm2s_err ,
mm2s_allow_addr_req => ALWAYS_ALLOW ,
mm2s_addr_req_posted => open ,
mm2s_rd_xfer_cmplt => open ,
-- Memory Map to Stream Command FIFO and Status FIFO I/O --------------
m_axis_mm2s_cmdsts_aclk => axi_sg_aclk ,
m_axis_mm2s_cmdsts_aresetn => dm_mm2s_scndry_resetn ,
-- User Command Interface Ports (AXI Stream)
s_axis_mm2s_cmd_tvalid => s_axis_mm2s_cmd_tvalid ,
s_axis_mm2s_cmd_tready => s_axis_mm2s_cmd_tready ,
s_axis_mm2s_cmd_tdata => s_axis_mm2s_cmd_tdata
(((8*C_ENABLE_MULTI_CHANNEL)+
ADDR_WIDTH+
CMD_BASE_WIDTH)-1 downto 0) ,
-- User Status Interface Ports (AXI Stream)
m_axis_mm2s_sts_tvalid => m_axis_mm2s_sts_tvalid_int ,
m_axis_mm2s_sts_tready => m_axis_mm2s_sts_tready ,
m_axis_mm2s_sts_tdata => m_axis_mm2s_sts_tdata_int ,
m_axis_mm2s_sts_tkeep => m_axis_mm2s_sts_tkeep ,
m_axis_mm2s_sts_tlast => open ,
-- MM2S AXI Address Channel I/O --------------------------------------
m_axi_mm2s_arid => open ,
m_axi_mm2s_araddr => m_axi_mm2s_araddr_internal ,
m_axi_mm2s_arlen => m_axi_mm2s_arlen ,
m_axi_mm2s_arsize => m_axi_mm2s_arsize ,
m_axi_mm2s_arburst => m_axi_mm2s_arburst ,
m_axi_mm2s_arprot => m_axi_mm2s_arprot ,
m_axi_mm2s_arcache => m_axi_mm2s_arcache ,
m_axi_mm2s_aruser => m_axi_mm2s_aruser ,
m_axi_mm2s_arvalid => m_axi_mm2s_arvalid ,
m_axi_mm2s_arready => m_axi_mm2s_arready ,
-- MM2S AXI MMap Read Data Channel I/O -------------------------------
m_axi_mm2s_rdata => m_axi_mm2s_rdata ,
m_axi_mm2s_rresp => m_axi_mm2s_rresp ,
m_axi_mm2s_rlast => m_axi_mm2s_rlast ,
m_axi_mm2s_rvalid => m_axi_mm2s_rvalid ,
m_axi_mm2s_rready => m_axi_mm2s_rready ,
-- MM2S AXI Master Stream Channel I/O --------------------------------
m_axis_mm2s_tdata => m_axis_mm2s_tdata ,
m_axis_mm2s_tkeep => m_axis_mm2s_tkeep ,
m_axis_mm2s_tlast => m_axis_mm2s_tlast_i_mcdma ,
m_axis_mm2s_tvalid => m_axis_mm2s_tvalid_i ,
m_axis_mm2s_tready => m_axis_mm2s_tready ,
-- Testing Support I/O
mm2s_dbg_sel => (others => '0') ,
mm2s_dbg_data => open ,
-- S2MM Primary Clock/Reset input
m_axi_s2mm_aclk => m_axi_s2mm_aclk ,
m_axi_s2mm_aresetn => m_axi_s2mm_aresetn ,
s2mm_halt => s2mm_halt ,
s2mm_halt_cmplt => s2mm_halt_cmplt ,
s2mm_err => s2mm_err ,
s2mm_allow_addr_req => ALWAYS_ALLOW ,
s2mm_addr_req_posted => open ,
s2mm_wr_xfer_cmplt => open ,
s2mm_ld_nxt_len => open ,
s2mm_wr_len => open ,
-- Stream to Memory Map Command FIFO and Status FIFO I/O --------------
m_axis_s2mm_cmdsts_awclk => axi_sg_aclk ,
m_axis_s2mm_cmdsts_aresetn => dm_s2mm_scndry_resetn ,
-- User Command Interface Ports (AXI Stream)
s_axis_s2mm_cmd_tvalid => s_axis_s2mm_cmd_tvalid ,
s_axis_s2mm_cmd_tready => s_axis_s2mm_cmd_tready ,
s_axis_s2mm_cmd_tdata => s_axis_s2mm_cmd_tdata (
((8*C_ENABLE_MULTI_CHANNEL)+
ADDR_WIDTH+
CMD_BASE_WIDTH)-1 downto 0) ,
-- User Status Interface Ports (AXI Stream)
m_axis_s2mm_sts_tvalid => m_axis_s2mm_sts_tvalid_int ,
m_axis_s2mm_sts_tready => m_axis_s2mm_sts_tready ,
m_axis_s2mm_sts_tdata => m_axis_s2mm_sts_tdata_int ,
m_axis_s2mm_sts_tkeep => m_axis_s2mm_sts_tkeep ,
m_axis_s2mm_sts_tlast => open ,
-- S2MM AXI Address Channel I/O --------------------------------------
m_axi_s2mm_awid => open ,
m_axi_s2mm_awaddr => m_axi_s2mm_awaddr_internal ,
m_axi_s2mm_awlen => m_axi_s2mm_awlen ,
m_axi_s2mm_awsize => m_axi_s2mm_awsize ,
m_axi_s2mm_awburst => m_axi_s2mm_awburst ,
m_axi_s2mm_awprot => m_axi_s2mm_awprot ,
m_axi_s2mm_awcache => m_axi_s2mm_awcache ,
m_axi_s2mm_awuser => m_axi_s2mm_awuser ,
m_axi_s2mm_awvalid => m_axi_s2mm_awvalid ,
m_axi_s2mm_awready => m_axi_s2mm_awready ,
-- S2MM AXI MMap Write Data Channel I/O ------------------------------
m_axi_s2mm_wdata => m_axi_s2mm_wdata ,
m_axi_s2mm_wstrb => m_axi_s2mm_wstrb ,
m_axi_s2mm_wlast => m_axi_s2mm_wlast ,
m_axi_s2mm_wvalid => m_axi_s2mm_wvalid ,
m_axi_s2mm_wready => m_axi_s2mm_wready ,
-- S2MM AXI MMap Write response Channel I/O --------------------------
m_axi_s2mm_bresp => m_axi_s2mm_bresp ,
m_axi_s2mm_bvalid => m_axi_s2mm_bvalid ,
m_axi_s2mm_bready => m_axi_s2mm_bready ,
-- S2MM AXI Slave Stream Channel I/O ---------------------------------
s_axis_s2mm_tdata => s_axis_s2mm_tdata ,
s_axis_s2mm_tkeep => s_axis_s2mm_tkeep ,
s_axis_s2mm_tlast => s_axis_s2mm_tlast ,
s_axis_s2mm_tvalid => s_axis_s2mm_tvalid ,
s_axis_s2mm_tready => s_axis_s2mm_tready_i ,
-- Testing Support I/O
s2mm_dbg_sel => (others => '0') ,
s2mm_dbg_data => open
);
end implementation;
| mit | c5abac7e91d8a767deda8c2d176cd8b9 | 0.438554 | 3.785491 | false | false | false | false |
szanni/aeshw | zybo-base/zybo_bsd/zybo_bsd.srcs/sources_1/bd/system/ip/system_auto_pc_5/blk_mem_gen_v8_1/blk_mem_gen_generic_cstr.vhd | 27 | 120,556 | `protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
n6SxQ4cZpYT/ILbURpz0n7m3/CtPg7Srwf+5G6B92ASMc93ahDGfXsRmbxfQ4itjqNp4bImRWGHp
TxDOCQa4ZQ==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
T+03ThTlMB5LbidY7dBVWlYp0mNjkvlbypoxh4ls7n36ZTLkklcCR9ZkGKPsYI13rJYYLwxb8HQ9
lAxKeG9QmQNzwwKufgYFwBDRimvj8pMxUUa5UvV+Um8vyzZZSQmIWtsYrZE6EEbBovwAJw8AOtaR
U6gMXGczY3zuLvGCvAw=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2013_09", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
xyeO5Evu10M+3X2Afou0ntsX5ZB/pwkUmxi6MkSVEZEp/q8vhRIBXtucD3zi9CwKskciGYDIN3V0
Echz03lkOALKA28V6TwxpTDjOCcWnPUs+SbNU9hrNos5LOcUeyT/Umkuwxvon+y1+GmmTNBs/HsN
LDp012R0drMTXSZtr1fQtCR1xHLj1REwEGmrPANPbJm5g9t7g3uQ7e+eNRUcylifmDkL5SHkZMiP
o5a6WQY9gEml+rOEV7XkaZKFEUQnZO3nxTVqbYgCz7Fr3B2jvSfBBfXQPG0AKW9Iz7aUGng8TS33
LFSc4gt02mCKBH1NOkwuxP/U3rpVs0fnK6xENA==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
UaJ6dwyNV7zPNxnKVFOwTBNM7GBgDixNLEFTEeGL4zxIus/wUjUkJRcBksOgUQrjesNLi9rSamfz
a+6oBrRU3NMz/a6LqvgLX0FtqLiIT69wj/tO+121sBluFxMRAbLYxwtNx0oswICZG6ot3kY7wUo8
MIP1BRyvBE7h7gUe8AY=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
iLkN9pn78C1qipOzfdJflxHJTY8JBXpf4rPYSCaQgqf5yt0IOulURCvwg0EGtXIXYL5OVuC8GGss
Cxal0AVlk6DQJUg5tnhgoani3XqnRusVYV7ivY3j4fNdUj8iyFUm29wArxnau/1wGXLQIbXlD+l5
Ze35HAoJRWjnvYyl2fMDrjYG0QtBEQHUh7moVIQ+kI8DwofjU8zFsu1KHGJsBje+80Fr1j2xEByY
nscMu+13hzF1cQaS+Ce+aroaWDuHJWx1kJ8/T+29qUQ8IgrJDtRVEWayMxcA9x6qrZ8JHoIeOcCa
xCl16mCCnpbqxuPBt6lvzV/n1cAzp3w9LmCffw==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 87504)
`protect data_block
xwxzimzqYTar745FKF6VJIz9DNdnlJQOaZfLh3xOEPda32ecTwbf1r13oO+Q6QsvgYJJddfoOnfl
7joV9r02bc8IAjd3lymumxXv7NpwFNrp2Y/PGj/tvRxosQJIZzWp9AH0K7/Rrk9wMOuopLygJ2Nl
ecF23UapiYNlrMZC/YB58gd1BvZyzZFB8oAr2YdIDkGvUixh+LwQHn7Y/MsB9ZiPEVbZZWrrY/G/
4wGzSaWcOBdjaH3tLvg7W9YbKmwBy/DOt5T3rVCqsxighEOCs2e5jg+n2F/kAyPbe9umCFiTmBEj
lyfRXXvJ50LvyLH4igeVTQSXBBRGewhVWqrps2q2uwSfzBg1cBUEAeVxKqXI6MVpOIQrtetNWZWd
sNjTMI9e4bb/n9+WoL+qTg0jc2JHYwxA7Ko7vqWakgz4yGTvBdijf2Bluc9aqHnEgSIDx51vpOcs
1SL7lay5jhAgl2+OVilb/XV6QUJm0AfmuVbLyuSd+rRNyhMCduIREt/jtWU/cKs4wVaDevj7jSiO
q6X2Rgkc3tuyBSWU49Yr6RAz+kmVBQnKSwL5d2YOHa/VOBr5P5MB4cYQTzspovwlZgafVVVxdiws
B0B4kquFATz1bVjKy3z0UHEIf79jaU5skmuE/3w7lsn55Kc52vbyCzy3jn/2eGKfoCvS/D+Qd4vE
Wjtbr9sVlE8cNGqqS28DnuNkFUvu9hX6+z8/spuOJQJeImyF6mYP4j8tcO2sJFtdMBsNfSgaJoiV
z+UqWXdHIJm0HyWYsr2oqWDHGCAE3zAMbqjL+SZRZe1Snc0vcXvAPagL8kHEnDxISrjdQE7bYQG9
qYc7nKpHz3Io/y7bN2XXsuZcYhbSXvKaM8i5/CoEsaODaXAa9EnJhiHKLUNl6yI5aEeto2M4D2xX
/nA8l4YOQRepAFfqAMQ8Z6kNs6bKIb9JIxEfy4Ixxo1aIZqM4wIrdUMoHZsTM5GQW/YIIKyw9tN/
zRBh/WKBA4W/xtEcmNjTuGgIEnhaGyf/Mu2iJV4RoUYfgjH5pMTSAwuIe+y9Ozmlv9Pee9C+4ra6
FU7J/YZxnz5bN52XWpZb+2icsDHPG2rzj/qxJ4HVY21j1jGbKXfz17Mh4Mp+hbHmm5QhAKU0iboR
YihMVd2zJO8i0yINqVkR1/fS7/RGq309MKEUfCtd5LHxkeOTWJD4/00FnL37AroBayQoZO3mYZcV
Z3fkTHlV4gtpFfGnqF1gxSbovzP3blpiy+GtwHfwTpMl5nPQ4sQwBxO+o92lmtHnFm+HCJqJShy8
8PKKCmC1mfwjL/lMbHk1xTrm+vV3ukhpxOX7MB4AXulkk1BeftmJs0Mf9BFH4ohPjrHCstS6CKMN
J1qhHpxnRFfGVo5NgcsVo73ZPRoCNXGBUJ0qCe0gUpjUV1uJnHWfnHytcqI06jIxGx1VSwjgTdjo
7qeE9P0E9PQcScgt1/MN+t4PI7tPlsmehFNEYGFqzx0oqz4wmRw8m6mYWf4H1pZl+wmMcqRoy5HO
5/bV8kEd//+2Ru5x/wuPeQ+/X8tu2VJwZqvUrXTZZ0dSSAJQV3B3+DaJiw95reOJ9qVoYSDM0Iq9
mtpB7x9s7riURLU8F2H9e+eCfONbrfLPgzbgOKmAXm2v7VR/IBIuvW2egx2D1GSLOwYFAFhwwzDk
DkUm4QclHY7VHckx4iQbyW43nY2msbMjD3/wVooVK7YhIoHvUPtwREAlmAPnNDnAJP+wtipzz7AZ
0jzO6SynKs3clhj0FOmFPjSNUGP47IAV7y6h9C5XBgkMfe76QudOUX+0l7pLWeo2lyltbFmcNRAw
dcgeEUYy3+f5iLAtAZE/57h4keRRzupu8Y705m8Zi/60SfLSoEai6KwaxWRcMenKZyrnDp721PY4
euA9wT2ASLMk0dJoBGJQAxPEqCsZiLRAmzUNfDehZYF7s+ko/4WpBEN5RDuN9vf6OjDYeR5hrhyX
1CKSCgYZh3Me9kSN7sX0W7KZ9VBSA8eRhlYC6E4bU2UbKXNnhdLcXA9lgA+LgZawO3e9Cqmk67Pi
kaBPNTHPhZtyIrz6dTXBzYBFm3BM6zXoethhiboda46FKF2t5z9jwQSjn3b8H7CROHzOU01+YKm5
mGuVkRVvB+BOxGok+/GGZwcE3fgCuwtKn5F8oEE9s5OnOOipAb/mGSkEoMUMKh4q9XRFlNTb7xe0
NP0GY1WJQ+8/TMejnr376Aa1s4e5yUQBWq04mF23+p5D13s8t7lmK/7O2EsPU5VtZVr5KKvTiB3M
UGYpzEhE1fWW7ptbKvRYxhPXqN5e9cHOR5dDfgqvKCgehhGvJz5uHdVlOr1A2qwFtdmty30By7qN
1DSlUUEN2AvnCyqnFuzUIq9Pwk2AQUK8A+KMeWcgqvAcOiuo5OQPNHdIH0MoI6Q7QMOr9k5WS7XP
Wizz9qH281scQXPp05ZXUN+ysdkmfRB3D8v2y4t8LLa9GAIAt+VJIk8UTfRppMrjC/YZ4lQU5msD
uCEArEmLiyM9cerS0r+r5hOwyqZinzqjwfeDJSNcfXibJBQMSeZcm5nUinmak3fz69tgc37Gyb/B
VEcr3Bd0fD4HlrEF/9YPWR94Y40BHiHCr6vGZ6qHQQWKeW/tLDYbyPAbPsVRAOnASdAJtAlHB+9W
PUe4fSWjxf2h392EWT/c+z29WG8SdA9Doo5QnOAUrF0GD07DV2e0JjJ7HH8XyUoh6CRXHF41HCeX
u0VMbBWiWmcvGBC1r2cEmv1NE37ydF90Ofqk4XDHTYZ9R6VGg+Uc5mPAI3e3+162dm94QUI1518t
Xg6VyXvVpYJ1f6Ci5EX9ZXJd1g/kNzrBeRqcOfJlyaLf9/qGjQofla35AMVymyj6hO4i4Cdw3zJ5
BAKazZKH4NWcHlRxwzWPoHN9tcgbCKJ7tLBaavhra8Q5bk9C/dQzxxXd44Uv2gQCwD1kWoTCSsxA
la2ue8t8Sovz+ml7QFJvBrum6XNkqHzittagLJnTex92iq9sAStVoUvKc1an+56N5SnaGO4SKc1i
pysleeqSMOoAvftkrQOBngqPKkTAx1/8rnvmT3PUnT90LU3nOfTKLxIRCUJJDphqAw6F8OzaawX2
pFOx1xGf7vGae0dh/NGFKE2DNOLNZv3nL97x980tTGh3lq776pJiCQWWBY5IAGe07tE0HuR66ebX
wWwVblvY5ufvq8TQASTxqWFDGLsSJuTFJPQot2fpoercvlmYqSMq77VWijyPIqMCmDivGtcoTDNp
eTihoOFeTsG621sdgqt3P2I9f0J86bzoLER/V9IzEONHpZF7Wm/EZ7zk7eXS8zLViWs2ZGzb6y+V
I3bikIJMVZqxVZAnfGTfBW+CCElclWvBwZNcoloNonEBcR2D8hTtY8MOcc8ygbcStWobfusp9l51
EQjEm3uVWkNb4+Ca3t7bj6yaYj3QpLi5/EoxGj96d3voG+Y3d0QkO6+dx7pbdwQoR0Dah5auFKMM
UUgHfWPu8y3tQpC1kig7Pfp1H17MlJ4e4ntuqBeFM7jkREhSIJLe9WAQ9OsMTNQJ5WdZ5ZAh+DAZ
722n7eH7LQB+OuwZdNh9lvcCryJllmMSxi2/phWvFj2y3Jn+tnGrgshLN9/3BEgWls6hYAfE/CzF
p6l+ySAh9IhouC3aufDNydWsy89ECJbz+duX/R26Ns1hAu3IudMLRmcMMpOmckJ2rv/TmovnKMmc
Zy0BE6SvdylJDVzq5E2P+cKM30wUNiQDvpBOmedjy3A8uVG0LFDh7bpeCu+0FUn96ZwFgm/xNfSk
YSryhkCAzrAzzPEda2D6pWbvUYYsAJzzo+U/qj49AsiqosihIMKVIFyXaUtgWL1+BUwxzNJnpMNQ
4u0kBR4FrVKsbsMV0D8nBrXMAm/gI3IfNYynx0JQdapI9H0g1AC4H3eHestYcJKvOm9uXkDYNM34
MBqjOoXX24fbHEyFKBTIdbdl9OvpT80HpIjMm71+BNKqKu572rWLXNwfCMj/B6Mch4lIKj6yF+BU
H5XP+sCV0B6R6WQT0/YdhE13wUEqaCcVugI8Yjln6SAbRxb+5Mhv3t7tKnQPKi5m4LHlrK1bJZZ/
HWI5K14UAUi/QmD8ZYFVmDS7J5DRNqv5HyDW1bHw12xRzE1h0WSodzrgUsJ9PeT2ILypPWYUpC4l
GYioOieEWAaKBcrSzUgLplFgBVwoxf5oIMa11BtYORTRon2oJdfb5H3/ANrr5tOmv/a4XRxbK2tJ
Qp5Ocg0i8NIROAxUXxZujeFQOSvyJsLokK100qeSeZN1zK15HpFZLekr8TTNMYLqJenGcoh4Eosx
DrgWLFof0wl1tZ60/Y+Un98AYtq3qZZGQWk7cF07AqGK864JqpEQcDvW7JxqdOZ+xbNpVhsW5LjF
FxeZ/nOEAmqxkHSn94ZMceIaRTiPnrurqubK8IJ5P41xCx88J6n34+3wV8WLlSNbtjClsICfl80j
MnC3tKUvNM9iKk93/7s4dABaKMvs4EPLtJMxxLOYlx39Bj/j0oBVdSnL4gzgEEti+dM+ckWfguNX
y29yFLHWZnm+eysw0jIHMKzkMLBnEgn+M2QfMVi11SE+CNoGfnLw8eRdxruMAk33ikEoqlos77kX
NjhKfGyjNVUj02/+Fz8QNc8Sx8q4/h5EYlJJhrzYeI6dz3eC7QE9+96czZ9Jq1y24JVClRmFkWAY
3UurLjsE7vBKE9bbB+A6CBYYiAPHSAmDbMR/Jpg5XaoFzgHLSRvTzcGKe3V0h+5isieKMcX5/k8u
FHBWit4/h6V/u+4Jjco9evUTU6C2P9IxS//YOzBSlI2LdR4omYIuB9qikSaOoLrtA7DqFEmCDPyx
ZukHtAE/r3YdLzhfueZZELxR/IMJBWDs/qIiJjkS5dWyiCmC94D9VN7KHrTLJzKk0VI3DWybRqJI
VcPgCTZR88FS9yKuSs1fLZ2R6R+lCtLWFJ4DyT8PTAMqd4YEc8IsP2HPUjD4rVIOL8GyqlNw1EvT
LJt5n1OPRDvZteG2sDWIZGmBz2FRdcc+77oItZr/9MpkV1308Ggq1lr07G13m/y7dvYbf+o0Jowd
Mkf3WhQZ080CMW8ATT890Nzz+v1oew5xWV91egfRX/b6JyWphJU8xOTKOQ83RRBrp1eybf/9WbMB
+3e0w38o4XaIN2aqmMKhPvNVzSRQbcy2qDaoVoYc7U8gbrm6ED1RhUic0+UryDN+dbYlJStCcHCX
Eqjm97oXAx/FRR/SeQQ4mYFZvtjc+d/IzH3JaQZQ4ZzMYzSC3vGpjjXGIWsOpKlNT/l8Rx6sePRm
PW8VJic5vB1JnF2zKUS6HbcAUN4RtJNXbSgUStT72UeMxObrG7zhcNLMcs4oIypycW1OYmFPzEia
87VjAHBL1kYteTGzZAzZfVu8MqaiT6G0S3rIdEn7mXQbK0W0NIgGUg+ZjchD0AmiKcHFXVnSMlB8
zKdwJj3JladB1IUGdS49OcE00X5aX5Xafndto3AbVYQz0L0Lc4gnlQQXR9bNlULmtFKitK4l8Aoz
auyoMx3EQhKf9YHLSa/o4MLsjsK1rWtcAjX7T+INoma4oT/Dsx55rwXEyfqdanzCJ23pPaYM4m5/
MdIAu9DtijYDqTXLCA/bIuXOR9ZQlruMzQ54u798V7NEoXS057yf/Wj2e/67ll9rzR5NgC4J0ODV
myVfOCmI7mAYiqztpTp+LKqJk45Usp/np/8ZrtsL9fqNHvHO2kKqt85lbDZmGddw58eA+7RtmjFu
CZS2TbnT/i0s2BHVZ0Lj+NwSI6PQP1VZLudx7ztcrPSR+eqOLIbB+3Ahug9zHfPL4M0vQcN4tlZi
/Nu3xhOHLXBqwqNt0SefDvCw4K6on+GY72ZLOLTGjHMea5DHh0cBKBxY2oXjg5TdHfCgNQo4P7m0
w1L0upMhJrUuFMuE0yGl9QEBTTpHFx5+hbBsmzbotkpJjJ7yTirhNCEyWBKZeV9q7yXkeXlsJtlg
NJCM46YLOsAAuspb4gqN+oDBEfdCqEFufdG5IuPLk0oAeGgq9FQu9flIvk1JcXLK9cfL3TR+/lIv
dbYAhj2jt5OAqrTbaOYxJtDB0NZVoyI0Ddgbg+Y7WH8IbNYo0W24eBr55JlApWlpCPe9UgKF/5Z3
BIw5iQxN7VKl361wvUUSdHTmQfUZJGZfmJmZcx9+vmN4Huxd/If9PEu4/PUOgpAVgcjOGW/JH6mb
rEnm6Fne3dZSq1wVdWUy6csfcgoWYq2Um+uEfi8UBhg3pe1UWAP+ml1OM8HRuRtCq4WFzPj1iDxM
d96GHyvv6ZrfFVac+XVZsfl/9mUw+ohyXvBGkvsfxQsslX34J6NSNrp/cfnMbenqQj4bZHqdSka+
EJGP6pk2s8ObSUiomm2fQQMVTcItvToVHB27kWdzQlRJehGtFE1qyEoEW1fgmbkEYq1dCFwNFIkT
KCyRwVI1LvobjIoZkP6cP3Od4SB821fxlphcwbfayHgMj2Cg7BYQUsgHquec3JHpf49miX+rIqxf
EJYLqJ9pZTsMCRBuf3u8TvXlsbfF9jAOEEEiHrNRn71Dg1Fv4TP0E6pJM00Og6pRz+3kZdy6Bl0W
I7GboT/xbhbmNaUpqfIXTifQHN1WvQluJaHheIrXCX16UPkadodiP8gpzjwRH8OEDYc9wkvdFa2V
alVdxvvJ8c6pDMRQNc3r4uBJkdyhY7dqK6zpVx1EX8Cz+HfFfjMKo/w2JMtg9xV8hcFH7bLpQN4t
YGTIgt4Jisf7uvP/89kSCeXBt/6DksaNq1WMvz1ycsF6QziLYvtoq9eKXCZp2tx/ZBQV23bbO9Zz
NFEc9qJAMcqDE91ZTj4XmqHbxRy1Kzg2kaXwcYMPNaK4gSmR6gYdh9yscYDetAfqvzRZfTjBNrUD
Bjnu/MezGYpjBxVRLMK3On7n4UkQF4m+Rbiua24gXfDWIBVUj/EsheV3umNq30rh2PPTliTEBWA3
UVoQ8GLMRJZdBgthCebc8S5pXvP7MHXTnAFe+FeocBh2dl2llV/9P102tmcRqvpYgKmIdmBW4w4o
bRMcceyPG5pyffN1AFJ1bi5ly4ojYiXVQjTvd7EblFcSJ28pM3BY3bO4KpNvIcLQ/UMiQUO49/ks
0crZgyi/QIBd1e8JrwJ7tZL6jA38MEGf5ZPgekfg2MoGZuRY8BbMJTdoGmv+rWiqkXdb24z/AzC9
CpX/J8/ydQqTG3vi/oaS4ycDkZL2fq0hPnF8M3n+hg3J3z3affUVEVPdyIksPiqyEnHgsxhKuBIh
cvHG4RCyKSc/lQU6Ka/viU5GIUgSoWpiXzDvGJrdQPa7CBZ1KeHnek5q0Phxfa3Vn2qk1ZFF2eXA
YtW9nvJIcfvpgnzPQUsvvPlZmHJfxDM0IwZ6aDVz8MFnK6U6asTsZsb2yG/xZBosp6tTxsZ3FXUu
yI4seeFgDEwJQePbUWEf73mAf0GStj7VTYB0bFfxJltHxh43658pCA71HrVBdWH825CMMXSvVhBE
yi6NanZNhUKoQ1saRdqL8JAGh4FwWMCs7wyxazs3gtW8BAMyqhzCfwNPR6517HqRty3Gq6MIHNpq
C9A6VrwRkqqQXE8Q64WIdT5vwrJJr+GRIYJ0L6T8IQPLJPXHkShhK9SuEMBx56LjHzscEclINmfw
suC9Q5s5PU0B4RiM5zbxfdMjguD+d8WjNZk3/ya1Hi3DEevSKSR8relFrPOyv1qiUyT14rANbCsj
brh+7yz9ZqTduPd7/TaFmdvdjMfAuIP1Pd7uUS+TntUQeq4dOe9MGz5UcKKHb998p5ZZ4iy6dZRH
zUb5PBXeCmNznwkSI8ZhjKX5VkgVcsIBSYTd0VY6bAhHotAuVr0VVMW05xw2cyPzqL0iVgDDUO2S
tX5hH2FyiFb7oWgYgecK+B136sLS/no/jD8HC6LgfYzAd6yhs2SmrZy2C+rGIFG/mrMiQxX0FFE8
tr1rHuI1snBPFdcE9Z/VVgUpA6EOpNi54fxlCcpR94+2cLvRHKgZdQP1xjNrtxKDxFF7+4CTXm6J
gLX1y5gGDJUH/5R5k5dMka7q8KcYcbVNiVV+w5apwmFlYk7VAsp+oe6qIrU2caTN0MLGodlyxYLd
Fb0HdFuCNIme8DCJ2L6vDX1Gjkekr6+DJ74Ymsx6k05yiWIKhsl1YGS3PqR6z/1OTD9u+IyMZBIP
nXOD67KCtEZVHE6zrg0ZY6Hgw1RfAgUQDtZ3CG6zHpyv+Gur0TTIhwlx2RZZblY0Y0leapRZ7Aa7
UmwEAdMi5O9OaWXNWx2gHs2kBHAmGu6U0wt/WHMxt5ggr4FTdnSCcFWy2bSxFOj9l+kg/Rk6yq8w
b08TjMy6I43dmtUo7/gwpI166/sXLBD1gYl6cldiS18RNxol9eQaxzpuWp680X+vm3r2/Yqv/MUq
m3qEJrd0JegaRAoRk2tAlpCgR3I6pC8216LVSd90IlNn1dxiTIJHvepjLliTzlZuaPALdfXDRlH0
3cp7oh9lM0MiEO8CZfnRXHjyVJ/uvBv4jCbZSm6V5A8sJDH3P/SBau0ea0nFypmEsaqeyiIYxZMA
xCzFzQ1viZsxPzxo9nt9HDc7Sad3YdOqp3B8yMZTiBe6UX4LCa6axnR2OdFPOl7QL/x57OloH+Xj
Evl0h456IHU7LoYRrPbN1Pya9Um9NPUIr/9TjEqpf/KNHa2PeIBd/a87/sV74/D4Rg+uCM6pAllA
lr4lTIsBnUxlUurvpdwE9I3rNaYMLZFdfFhWTfl7Pv3G5pzb+IBjlhUq7G36E3sq7Vi4pPvWFBaM
wXlfCGk2qj/f/BqBFJXWrbPJwKhCye+Sb9iCuL9xyduQ/RuMjoXRQEzN8knzVAUTuJyOGQgXhuUA
rKGhSdaIs5J1FelZ2c78bWCvF3YqAtltrLFWsdWofaxk67XdDyh6pfxxQLZpMkteDIHzIfDsIwhT
fIyzYOTUAc1lZ+OJfXlR+KXGWjWmbBylwMlaRoXjHl4MW2XcLZZ9Pl2Juk5kcNgljMysE/W9G7vM
e8EUp3DirDgoToOXdKGN2ydlGaoW5Ry9KIY+oIPlxjBV+WpRapscNKwCmCOPYp3LI9d8J0t0RCGN
iDwoYMfYfB/+PNQZ0SVFieGfvQPfVIOpFMzEGkeOPgXYKmCeToA3YoMUs3Q1IIUOd7oUn+JdckKV
geh/sasPgtqcOg7IzUNBF0MHFLviBmzTO8Ykbzrvhbi4wTwqwkvvJELt0J9pZpQsHyE+az+shbko
OsxVy+5LBTZulRD+31H5O/MtjMe4Y9CwVsmh0Wu/3rZ/mfdiHKQN3l6in7TBgJFP13CwbI0p685A
I2QQOhJdYp06VZa3XXoQug7vJ3Fv5Izru14HbwSv9DOXmJCXjOI/d5D8IWC8ror4EkhzMTaAnlxw
1cXDFbgHr3D//UTsirtnDvNRxbNh4J/59OgBxrdnx1PmlDgjlNcUQbZb3SYLbZPEdkXe6YoSEa+o
qo5iIXwoJhfHOoHBp+5p0B2FEQjIyJWHZ2yXamYMXpgXZ/s1EM3RUrptfhMan/iZEkDFh2ck9qGl
wawiAHfaX79XJDH1DozEs8eZmth0htWr/HHxMrpKs5Vw1vmWa/xenKV0Wyd6RhYYY+J4PtlIwXYN
QwS4wqzyRzXlZqWFW49MCx5kX9afpUMPeRpNqh8qbC6XDlrcvzazk0HnjJdIae/LtI1e6XZSykfy
Jz3BmJnsHYuEe/vfnThvxiKzv5IL30Q+Ih+sKalFF/kanCllyqlM4NYotE74q0MvLu6Y6UEAkih3
F2AF+n8x/edcl4JWT5KZPOZ9oGLwpFqv7gJFdjR/N2ttgTos0q0zSR+1f7rzycnR+YYLbvJ75sqd
tOPnF0SRx4Ompafn1pWsSAP8+HC8zaUqtwS1z9bi0xXWjPSPdFhCT7N+5+eAXfOJ2P4YOMu7J08A
E1HgRgThklSSH1PG8p1c5Q7nmSZs93iX6r/iQO4IJGwJOcRj8ORjBpAaQoE7LHiIuIBiWgcSUSsF
tokqKZVGb/DTUbBtaTyDww6YkAVHm5KYCoIid/73tii7myfZPwUPLUdEW/RYJpQ77Tp1dI8oq/pI
PpJBQ+uidHhbHRBG+rwAADGactnaLkMrAfHQ6608jFc1xDWIQOeag1NrOuENUbXuq4XHAMYKCb+o
9VctrqtCK57tHncB5pTFWCD/LDXy3cLl+TjB9OxLeu30Pjnfdku9BSbVI1+hJEK21K9Vwirryw+g
4bhiRP1w+T56Ey1srplW295T4T7fV34fSuqFcq5yNAavuuT6R/C5lmrM0VxNkA6okxyEUlOzlDKD
yNY3S9D7LjkoPJYymG5J7F0KgCKMTLohWWysyhTNEvi5AGgPmVkxP+f2bjLl9kWZELFg2PEihbiH
AD3QScdXvzqOSgnXIgWfYDg4nhwpSyW4o03owX1/xVau2IzszBNrmOQxtwaHoCRjpCaIhFOu4k3O
DjApsOfLOY52P2zQQpo7DuFNi6JcXCJKNFNcEb8qedw7fUlhSzmyMKv8YS5gDI2dyoaEnZZES5ps
sef72LOTMDw4E+f3Qx1Uzo2xHmR/ws/FkhF/P8GDAL0q+/VLt7JQnJ2qE7J3gDFwcN/AsE5llF++
dvxN4HqYdnjHx1ruW/HyWF50S5hN4niDt4u1k6Qs0+p4RuguQcb/+jf31CAlK42GrqSdN+/JDE6+
HdbQmvx6yJ9xpra3TNpRqsBTttWyQDqctOlUxD2jVsRhnwW0AVdUizNla+EoL6BrJBWKuLQnjy5r
bjngl2sp9Xbtd3H2sq/RpzuOSIfRytXPH8bxQXlsxjswzXX/EAbaNq0dRxlzJwHMDK8KdRRvcUo5
gYA6zXc+w+cZKpQSe5Qmmjx75M2E/YZKDIoH12XE8AaTSoo0lsudu0mULB3mNH8CAnB52pNorXp1
rppNF7FxO6OsEOmrqbTa/m7fuQFBHM1LIBA/vI96cQso58haJ/kx64cmfBmM9VM1bgUXQxdQ8t5O
JFi/rNRz6YLk2uNULPiFxyPMMECTlRIKRQcuCb3HYEvW7QRVyTUD87mR+QaQaD40xrxNLNhoRiMM
GHL07hJlzahpgdinupe6dtPomgp4KXxVvjqa80DT1ScojhfYhpB6fL73wIyV6WkCfq5l/hVFFEjr
9or8vdW3hxcCtnRG96bXZ8VbEbcXOZ4SgKkXDP28HZD8tTpl0PrJbT2VoFtrI4pdAf6EqIh1wX2J
5VR1DXLTbg8nIhVEyYVcHdjmX5hptUDPEMRhMUxlBtCw+Dun5IXHk78DtwvWXX4lT+7hYq4AJo07
iZ6+KTJMIEgYaThPKnvR5Ly3WSK4F6pZ6doU3A+l446f+CuavjKLUnoWFz6lQoCZoHcXgzlTvsoI
DptSmCbU3i2sfQrGlHD4R/d/JeOk3ogWEz1gBfesEymLgSeehofhIQV6ZJTpoRZeAXnGcTX5bmlr
GPrrpsYYQttH8aGHZ3ZNw8uGsvrEwEC8/wSbFA5zyMKcu82FgZcT3GFXZgFe7JS8TVUKcZXS6sGi
bo7dIiNJEQasxNIUzs/fk8kA2cfDvmM5g+NmWFZJ00+9A42ElS7bSdEZxzaAHlD4KapUhcLTYSQ0
nt8bkf3HB6Pq6zT2O5XfszvFWR4WLd2/eAtA/H1CJqBZlq30NyB2MyeaNH2jxv/BwtRMZZe5HNps
rVVV5/zfIm9LxhwLCkfgwu+YDz3oPp39EDBXa2YsHNKfeRxE/6tTY+Op89kshQjmFW1jct6GpYW0
g9cCYNT61w4pZ72oCquQ880sde6TkOH7zDSEWY72LRpKoXzqsKMgfBtpSbNki3UXyzitaLPY3r+M
Uj5UOoCMFqvphMkryCd0TrmfKCX+OlhfFGe0BE/aeNC+QWX60CA8krIVdGnfpbwzHB3AuZpiZnob
9pGnu1i7ESxAi1t9jQz3etVF9MZnsx+/lLsVDI9GJ3iXvJuf6Ei7RYrcNmT9CeVrc7nLMl5c4m0h
NaQg+/FpX8q8IynPXbMmXDwUwA3cNUf5SAlI5BksmvbixAU1iEWkD09wAOf9E9sHz6FUz1obCnTe
5j7J9dcg6RuLJ4DRwKch+Y+qqTtBS06lxZLXkQgIF15/jrbaU1YfS95EjPWiVs/vHd/tR603xD9A
XkvYAoSioI8B6mwdAr3Xq11oZexj8yrFBINiVlqwxdFPcuMl0cKE+6REUgiefrC7xFsocQXzKgZg
OsXNk5yJMEcqaBQFJmh/HJmkB7ME2s02/+ouHAEC33SG9iRP/TlzxrFoG6S+aXpgpEOQ0L5Fn4qB
LBMXTERs9zzLLvIOYegXNP0FrUXp3XDbt1rjlVFre3VmKVSS3UJV0tjk5UOfVfEHPl+jrLpAi+er
xjzyn2o93dJ9RYoHh+y3LoU/93dvZXBjw1Wy0ObdYmU5DyPbuUWnVaJ3sfvjCYkSeok8Pt/TPidE
NLX9dAWUvhaeHmlNlMcVGwChP+z8Mwq+MFhTJ2Nhnpe9nKPMNkov9whxoKeR5IkxG1g7c2IxntGL
qZfjteDW6vKKotyE2EVKhGeHnF/FW8857AWgfF+rR04RM/YKq6nKyOiNiiA6N7jffTJFrhbImGmv
zPw/9+oVoQdBTEJoiJBAUpdVBXGRWoQ+wIjJqIde1ASF9SjGrjGagOITaFoFhEqm9Ey2J6KuveFT
qUHXtFDLt1oBZVOjIk1vE9zlJhQLR5mYzAdsVoC5wrvujwCJq8Swpv3rR1tx7Yrx3l6NsywN2Qzw
jihNPr0mb+COzQT4Vvipj339uzxxMgeGCI/n6Ui2JHFrujipoNGDg3emh7g14140rIOJzcJ9WVKL
vUx4TFb1Y87K2CVcJVm9G8okDA2AWYens3un869U2X1Xr6d6pFBOpV3CXkGrCOwHTyzVHml9ra/P
NrMuCkyH9FVd5RpPmZaiEk5N0QNC498ujo3pCMaAsPkSK0GLqA2vGPb4M93uth6FkkcnYFRnzl68
DNWITMlBm2WydTRuwFVObBpv2xp30AOcqYPsy/ciauhotXiqSrfnUpIuBBrTFBotjx3DyhzfvbHB
xPich1GwPQ8nZKrlNLvu5D9rl+b8K32k2fAUR+mrFVVB2EZ7vRTW9pEUXnrFLei7ewu0I7LqIL1N
AB9OvXhgMy9JpLIpXs/eLOCzG0+HxPgsmZG6oRknszzIa4EA9SZ2iSQSjalyrOLAHjB6XXPe+MQQ
KL/2HklZEs7TeP/rmzPqUWGg7a4r+SwkmUKgtXmcMbCrnzKznWDVGPHD1fS64W4mGrll29mgEywo
Uhn/Q55UYTvcXDjJS2/MRAZMlWf4Zfnm+MsY1/rRSCc4Rfc4k11apaWkvPpXsogsIkvh1nky4ybE
mOSaMy6dO+57bSM3EEjMyxCUjUgQ+a/2kyuogja+iKmEdf7m7W6IxGaqesoPVsirENXcHIoDCamq
A6ETl080mccAbYOX7RyHVtezF9d2CM6t0pzF/Wawbihdn1qvELFC66INCCtgTn3wS9MuDaPVwLSJ
dTkP5TF2/ossVFJIQCUP288bbsVwvJju2eq+kTw3YVjKOb4vw4EhuMURruqtsCnX0SmQztJ9qJOx
vFAbF5Ik16ezDvzt4bsIhWn4UhLcPRNImW8TTdxLwEcmxCO7tfDxdSGJGhVRpmajtBsDxDj7zmcc
OosWgUfSLLyywtf/KNIjcNoDOXpRTfA00KN061g1AS+Ab/NlRchI6rht0BW6olaFDNxIqUP5fkwT
xQXg42/5j9iJb3QaVd/nyqU/RsYEQAl5yM2y4R5IeAwkUYoMgUF05j/58+SnAlORCYdWQy4HEQhB
Swl41b56/lV6Pj7KlCZhHgylJ/i1/1GWAqpOtaPzS7+0ecf9s8YghyUqtI5kHFLVQlBCKOPH6TAU
x2N2PZdfzwUjEWIjFOr4zoaWYfJ/rfxUE2eL4N41ztGLQJIWS2oIZUXhLqo+BM9clTaOkSLT13sg
cXY6kkmZ2nZ44SGVohKLNo5qGHHnEEjexrxnTuGYSFAtaa6ME24yvQ1gbrba9xcwJwlPtywySVzZ
UoIeCXwrvDjku66YdSyUehDaY08L76vWKYpCb4BDK7LI8MTtflFJqmwDckoCK6wNu0zt+qWxanb4
gV9fI/IW5kZYw2LHdX6Vpl8MVVCHRBOu9b8IHcSh1svaa5JvEcQasTk/4oa5bFYIemiemdTNdD09
ngVWlW1s3B8kczeve0//0+oFYaAf87gaLI8FAPSl/7Cj+0ihMpDEW/nrsPqIVeOxF3TFklqo/2hQ
6EX4/d8DZTSgMzdboDb5x2A4ILFhtQMuiA07eYfiXRXxU9MnlW1PeSRKzoiN5BEUiNWEnGR9kbei
xi5OZ0IZsHtUjoF0HAjrcHDaGQ3Lai19qq2x6/YtznkIDauLV6stxT0ZTv6ouGD2G3ndjDSQaMx2
BodxjbY5b4d+wdFtTm3OCXp0JvR2SGqQ4DGFuHomVRZLJD1ybnakf1qfVnicBZnPU/858qY4+ANg
E8KBWLGdyr2hbp7doOX8CZsg5Y8XwtAEBoFvDzaeXq/v2Tn64I8384GHq7j4dS8wue1316RYMkdK
3LMSDfp+zhMSd556x748stOJOvEkwweEJc6B0e4eqypLUp2NJBrx4B/bOthdUk170yKJd5paQOjY
e7555YMoDBt4/9YotQYpv9kDa+NGZ7g2u+iokYV8wI8zw8RE8lF2CZB/Q5fXH2O87sd6wuxHyuof
YXjQVtPtADIKoAc1Cw7ZdIfHkUw7gt60VWgvLOnKjn+inEaofN71LdemK1j2+zmdpOzmA21aK9yg
Jgm8RtoLEcfdr2xJ0WXFFJP6mmB9ooyh/vuYMcSKM93eX+bRS7bjVBi3RCT6EjLTJQFBXBD73oFF
F21KZR72FvDNJpyOFN4+rdNm9NjakwowoMDhRjRrzQJjtmHl7Y3XtgQYHj1JJgNX3NocVVk1iLvu
zNwQzbV5TgDc3e5QbMu5vuY7f2rrXZq0fl3UiRQQgQvkTBJ/XkGQW4C1fSrWnxcvGfnFe+kiVvj8
hiCYr6Lyc7I0Qb5bP1F2d7hNiS15BojJzNctw0+awPE+GpM2KhasT4JSfE/1fXa/zg7rsfKk22KV
mVRegHkqx1URoI9MtZvvQUn8+Nia8uR0PnbsV8PdPHPDgNmxqD1z10Y1Z3huWPahkvQe5fGcWIH+
nXPI69mvTWyufXRGWWmKpUrlVN5R3UVS7WAT4cdVacBSlgsIPzMAI2IliHTvRuFLvFmI1bvnE/EM
lRzt1RQCIzep4uuHiNtMPAaJd6F57iZOkVxNWGKUF45XsHGWdnd8vhnhZxbfJZPXTisvSeNs9u+a
VNUsg03Nvoq0TII2g5cDdl2GD3smegVONVB6g2B+q58XSkDn5j/SLhIfit66Vl3JZ1dzeh2nH69A
0qBb1LQNr2wtaMdHBzkySGAwMgyu5u3jN/SrMql88uZySSUFdlYHl01U0JHmqhazuzo2ZUElDiMz
XNQXLQiUuVwLUn+Kj1GdwbWQwb/y/EzF+sWepNUPOfw0FaRTxiCfuy1e0+HIny8/rPPnTsKL/Z2o
byGZ33hVyvWLTdPfwKYWceoqae/hsVjVSOxmS++uaZ5a8aTvXFMWNkccfMclTbFtsNCXiOlMEVKh
9ObW4tx5G7M1+IQZn7tMDDWL6W1Ycimt5BCbIce5MoOkT26yp5JCg2GGscYpLWd74rcprqU6oKNa
ljmoG7RpjNmxojSIShmeQDG51qzPStDyKzfpguVr3Ra9J5nNZuxS5xCn9ufPsgkzKCfU0FFDwT6X
HamKxDzbRDsrE33PhLFcKEAEKL2hAmvkCOayl5L4KzK9U79jf5PmIWNolhHw6JsYzo4GGRswz/49
Z5mAgtNA08SSpd0g385c7HusR+ycSEL6KZCkSr+UjFVqPxYRE62Wvi+lzYy2LX+KwuYpVnUaGvK3
9LNyDNx3RRiCQkWSBF2iB9CACmIQAuM9lNj8ahwl6SqdCMWqQNvSjc3jYOCPdDEA7fFrz7Q5UAUq
q3UVEyIjA4iBfHc7AnuGWjjuAJlywg41MOAzS4jmGvt6qV9OswMAzRLwVIhjd3fsTFulfKiLk5Le
HqjNTra447y+34V4+3amXn5eDfkmqOTnAk+thJATK3LnlvHMaTr9UOYKG1u9IoQ7WJOfELcjA8vL
rKhiQ47jczopRJRAiSn1LZyAFk27eDAkOp3GUBLHCsi48I5LecGHZlelK03jviHwAGXMcbaGPFaM
dy4jcfoRaefm0QSLotwAcynDgCZLkLz/t1SFlrdN3qhE744y1ERIHwnI+4z26Ag6Aj+nP7WVCeKy
0NutkAkRhmCc1Q/KvNjJx3fCvKicrUj9i8ABU+wik2kc6mELsAb2t1PU2cLo4SqmVF9+Ss/xNs5+
lwSx15izZWKRr/WSHoX+4ShS9VWIY4Rd9Wwsc9B9B5DFBPVk49LSdc2hoVnZv4nHhKpQ0Osj+QNZ
nO5p5ShpfwDjordUtd387u/um1VShS0z4lxhciYbv1wGKTZA4BjBhVoF06h52qXH5ZXZG9XrriE1
Ndzf2P0MNpUnyTu425CMzJj1BNW44sYHn7zrsuFB1AsbE55P7WDO263iTDSmMdvW9jQWWoePJc2/
J4Y7YWyy/7lwmuogTPJLbNcigz8RDP6degiTq6q0HPNuciLFh7wX2eVlOVJOMbGvEO4IZzW0EheS
/zS5DrXiim1tEw6HLDNyueOhS9pAB8dPvInAv0RBTKIRG/9dvddAXow3GAb/vEO6r3OotE01L+hE
hsOO7E+IrN4osMWgMO1rbuU5Ji5jIv3Kb97FvX8zxGN63c4zFE3oel2nUjFHTyKr1BIx4nTiNYQw
pyrJBitGu9zBWI4Y62y8eAU5Dt3xsL1FrUWGUoWx98ZH1yoDFrflcNQ8FUuFmckLuocY7BdJZPnO
VfMfmqT6aZiFdDeRjaYZuE9AincYnjfysRUqY4FXVsRuCRQlv+I0FwcZK0MQJzyRuRy77/9i0wlo
BV+YqeS8iW5+VGKE8bdG05B8oFTn+wVhvZkud4qiCCGFMMPTjDc03ayeMuo7/7bFHYbzd22xxNpU
5MXNWKRH0VzeM9R4ef1TzHpXSvoya/yvW9VINdaImt6jjRyLflH9VCWPDFTpRj2LqJulIM4h6ik1
XohPC+iztstFtYGYlz83g/uDQ68KpbqxgfTlXb5EE/QZK9YTzrc23squjqzm5HcjW4vT2lhXIxCr
/ohb07PRhF3z7WYAb8C/2EkQJmfppikZT4yiHkHNeFzGCvtkBTAiuSmlV7Dwj6skOYgMyb0Xs/pr
DBu5rVlPSb4Es3Fg2g62FFht+al3u3mhfOb68zEUgBHLYtJfDkQ/aH5vJy4r5nDMIMv41leWO8/k
jic7dVQy2ARbz2o1vqGcjoBnzxUMUDpEf1XO1nLBLw2D4JNick4XiiZw3B1hV1Aa5FQNjR5K1cVV
1oJPSE72/fRpn1M6J4m7KR2lQWwztOlsJZzgJtZZIVgxLNJFYKCLO64S17y25k4CsmsJCWu641it
zXkpk1EFUHDN7wr5Iwus8HPnLsU/bFTakkYmT3fom5gjBCdOXUnnO9+qd6vmbU7CAr5QeDo/KpJ+
IqzQCsMevXTijVm40b/ysRYHGzN6Dya3UdXQg7jEqh5SBHXJJEd7ov2yTvkdU65TIv7XCv78cdOo
iJWiS03noWORq4ZtB93OtxMix9liDidireLyiUk5xudUW4cOo6wMcylBY4iE5IoTFCjkXv6el8/D
5hj+uPzCD4pochEeTkxW5DqmxL4T7xVgpsMfLUjfEkh1Mh6VHmlFS/fakQ5cFzzrVZNCXAitn1bf
P631yymSsQVYNTOkmS2OChJXxFdkJAMqxaPFdrYhQyix8R9oMie637TpJEMW+/zMSzn1GJYZI9+3
dTqkM3MNirtU/1/2ruUVB/ASpRG2xSNJTJ/6CfbyefEH33AQ4aN9VIfFMZJjzHyU9C+heGVGoe8U
EnrxXvOIYp7blbcdwTEC97NaD0+FTY9YpsjmCap5Yuda0UX+yPu7KMJ6Kr0HVSGC92Umh0YoY+Tl
CYm2HqArzdbxpk4UZ4Bu9CzpzbytabNnO9xCPIrOhWRtWOa+VE7Zyq3vl3R6BB1z/sZVJ99yeHhx
FmGJ0xzVkmPU5xNXdgTE0XSn9zmdO6zgKo1qlixKpcbw+b3E9YPhshb96bf+hU5J5mkCjlfc/Pkk
S0MHexxPp+YqAwjLa5NhwMCNJNV8LijxenIX2UM7eHo/yY/4CSw+zAW6hUl54HjpqwiM19YUBMLz
qUf8TzcSqLRZyACgkMQAq9AprA0EceYRXnVIEG9SXP/kyQPGHsIl1Mfl5CyuU//5KGinUB1RrCfX
vwQMlVo6tZF5os5HU4kWvMzBiEu9mUnEKBMX1g3rO6AYXG59BrsduoxtJKVh07M5n4FWWSZbA4Gf
btWtjHCVN/lXpBv1rEEBlqyeNDYkeXYFZyQz3nBhb3wx0v5XgI2SyAmA/sctY4fSFcHI6R0qsYIk
UzjP8ptnC/IQ1uonYoNbPIF0HTC183EvSKlQL5y3sxXfq/7jF8awEYBTudeGSUU8Yp15mBz2v4o4
vwA00+V2oQQeUcp2CWw0vikZr2gX4JG5WsEBETag6xL+SCUFWXABMmuNPJ+6UoDAX1TiQJIsVH3v
e/Pbsee6iWaB9KdbqJCSs1weQkHvZvsmlnu6vGFGifvwlK0Yn0aDbOBAKlp2DS39HL3PgZ7Qa22O
MDu7yqi9eJyq5wquOQGorZnnEo2Uy4rPHgpGWIaDzPOem9Pp8gJM5UZNqVb+2Emdavi/8L0WeowE
AU0IaboMl9/BcNIj0Efqv68aNZSYXcWG9C/d2VEShsfcMy8Jt2mtV0QULibQTbsvn3YexzCkXiRu
4tP+AxPK9Mjoj0ss9JTICmWIxbfiFw5a8YU2Iutwh3PdUfGdBxsNgQ2RMlANX0CIlG7GDECIpGLk
jl5fbAE85h5piRP+4oDuKTbJjMNe9x3ucNqX0ZlKl0gClMazckM9X8Dy1vM/oci3wxWDMH0BJYLs
WRCMhQdjxv+5z368ue/Dji75KjbVPr2BrU5HdS4hGt0dSyp+vaL4JYNkfcuXym6b+RZr1oQNOEF2
TnA6t5UphXzmwrHeQztIX0NaTbArjCpjGV8L4bFZRzyf7DvREez1/LWX6/fcMF6MgPRl46YccvkA
x2qwQ52jqKfRNss48GkcUpCdwTwI1b71U4yH7BAKTPDjwdZ77mfUAhX7myBBGn2ZEkeEdpUlcROS
Bp7yukxLJci3fdoF/zPOm6XVp3JXfSHCOrVEGpUFrgZPzLiiUmjt6UAj4YyjvJgkuRiatgL5mXyc
7Xw4oViOAoL2vobVtLVnGSA2ByKjP9pN/hlN158OIH+5iowazmZh9P20hEBXLRmm/Jx5w7JWiHSi
fG+txGx4l/kj7oN9HOF83M9R0WdBiPGkuTILCwFsimfeBOG/vOZ8ouzXbT1ekqJ+87PC7/yvOqP4
u1YVBEQ4oMq3fI4ldruWIW8PjEjN5O+K+IeuRH/QxP/Y+oPrrCXbVftrDmlNnAisF6Bsw3td32fR
9FUd4+Ob94fInuHKXyWw639h+/XXujg5Ep+zlMOEmv+qwHf5iaHRsR5SPM+xYN829BK43udxlMc1
OfSZKyIJyLaW8oeG2TN6/hxDD+vxRGwCIT2V6t6EKUzqDGxbplE0QzgWRYpDnVl3VjiQRtpW0zlo
urWy2XQrK/0OjFxY6O6cnQUwmPLUPwR6+zSEYzILXThOo0m+54ds4BF0BOFGXJGD9VEjOQR4wtMe
DH47IMNOMK1emeqLZ1Zr7da/GxHh9SIreNeowOme5GnRN1XEAU+U4lYlqzYYFvJfZ/cvCLf8onwd
/OJqkVtRBV3lIXxV04c+2p6gopC+gkDvsIBJA/0jlpvts1FDZYuF+ECLP5AglpocwSsDPuUWmmmQ
Mb1SgNhWnSjzsNIhB1kwFGA3niRSkoI5MR2Tedd1C6B0SoZ89klRRJiteJnfoD8iPeTh6rbvB65x
Ibk0jxHSMtdgC7nq0O/xqoZfNR/ylHUCNzl2H88wOKwp/Trpgpk2NtYUexMsIhLFMLy7s13KGYdU
MKbT8E7vI384htClFDeeegOBvtEswNOy47E+xmrkp1u0v0i5mP2NOZrSBIUCRrN0TlAAO7cmcBsp
Tu1XT/kHT+cPwYkEJwhpzUelhyiq65o/tDZPtxaBP9R9KJZk/h1aR39zyOaQXIAvA6ex9LOZDO3v
S7+nYj/yecGtbSLpBeSP50uMtApwfdgfL18OT9W/YugK7goLGt8eE/2OdC93BhdQ36VWIHXOrulZ
a/y5o9jWwCHWfLeCszPCU2ggilqtOkATTHJCBzdQXXTrK/jWQhwYRLY1JwntA5bxI5gBvPueUcjj
lDdWW45xOgtRPk4X3A1/mNwm7ihzE/cDgVRUY6s/sfSjKtJCkO52Y3JRxjwOU0Uyn+DpX3kp4BNV
zhEQ5klK3Y0Qg6uFoCevkTWywIwt84G7qTxQLkTgQAkFFdPZO2a3s402ccvv8GLb51hW4KvY6KDv
piZhWENe8aCs8hZy/j1Vslg2wdz/V+spRoeazj/NxM23CEU3jy8mktFlAUQpyga9zj5LZ9G4Liy6
jf+JiSV/QmwMcWYcXHorKMSyP7oiuF8l4JsuEnkWHPqXIlk1O9QqkkEkAo2UT9kw8Sz34az9j9cC
0LEGbY/T+TswRa7CWpZ166WPVAflgSgYnjZHCsbV2EPaGyiVMeWbWZXg4BrebTelQhsxJRHCBS5b
S0hHCZDRIFUPFgjG/OSTohnKTi/MOcwVkWdKq/dgTJYEn2rmkX+EkeOGLiKMtMrrxgTTdBBMVfgG
1dJSkeJbV53i5xr+tCBMSi13tpCKe5nI+u1o/8T8u+klS/l7UrwqWipYqgr+l09N5GNgyElJQVBF
n6XoPnQezvqff4I9lkwEmFlHT+alLJ1AMOvdBmUfwTgvVn3XySBpVpJIAiEMpcgQMSkiWn7NU9t4
caOvz1bLGsjG/IhLRNO9SalB8YZmAO7ZckVX/QzHVIdRe6A5PTJC47cj8PAfkA9XbTMLfMoeDo9v
W2JA9f2zGDXDTMXeY0xUwl3LM9ULGPg5HJfUNx0Toisoi6azn9VjG+ld5RUyolYfdJusJifKrWQf
peDoSYXnXPn/Cqy4Aa9mjHlpm09vWs4DF1XcpzH0dLzhs58zWYS7OQsvhs7pqaUvuMabyuRREUIO
7cIFKvGwSxHS5VHBW3px8cYBmDVJbz6gpR4JW5iPyoFSNs7XZbHRHmlNVldoR9tMSZqvtVcUFnd5
kuv2bpLS5Ejevm08Vt/SKRMfnyBCRgPvVWcSnE/oKNHcppYF66r6vXsm0yviRrAYUPaNy+ot7Zlr
J+cPz3NLb34EFGYSo+Go+XJ6qbZkbrE5+UqIHTLW7s/Tbn1HNHqQip1URG+7jsU2QUr+yqLvaiTE
f8kV3lzC3pIjEk8W91l0qyKxF2mWnMPO5yNoUKqiZvVY+QuFffBtRQl6Lyzq9PMz+csnAsFY8mvW
DX+08A4VuqY0fGH9TfNSdT6qqFYAUwSS6vPcZk2kkJrlNtUyS47VblEcgA4kxqnPmP83wvU5bnN8
jJhx+DVtSEvUMsmkxoeY63T6SUswyPzidbs8GXkhBuHCU5IYFNcHZXpSVZKbUTaGm8F4JNbzaHzk
oJxx6ZeTlpmR2BcDEgkdZY1h3q4OHKcKIaMf/wSFK7h8Zt5lb3OY/nca+0RSlvFi+X3qsY3tSh5G
ZFnKCftbTF6LDl7OdDP4xXAM8Mtp1qnaDAGTuTxoEShlTBSx94Sg4jwDHbnYJNLzgJ65LcijGe7o
8JpBPwibbSOfpDjJKBFldgKhlVRjfut1cxXrg5zJ6peE9HuqLerUx5Jw2Efhb2LomUEYVKwBCYHm
xX8aJjo7pBm5udYXR9gEzZjjtuY0LDMlbrDIhrcxSSrsIudYz/qhg6mYFgc1qrpVm+ghDx1/73Aj
ozt+RqFJ+D/A9oxwrphX9W46tlRNAkFrcgy/775CrjQOq0xgSCFND/Qg9OQXER+y5zVfyLj2CkXv
6TukqkQRvNQh2FCXLTbPZevgkoeYKeXeMljNt8vAjnWAyHpZ3BAiFeRgocFLZvYdETtiTS7ItCik
tzbOK0ht5b/ap9yTcfq79GTg2jRiYXEXELO9a+M6h4zsFAOzTuGtbWPpyfZxh2P8taio2ggK4TGD
8vgrfyis76EYsv8+g/Oz/P7dYEz1SIrsgSUajpzhramokKCHLe4MElpG8qASXudWLE/IxFSYNkau
oSnBbE0LccbGNpJrANgSYurY8sDwwz13Gh3TT89if6OaFCgS/m908K9lFS+Fkgt9nxNOaPhGlIRB
HS7dEQEOweWlpYt3QlGCtOCBvBNuEtq+Rma1SH+xx5Nu4x1necgGkwrWfKQfepAiFHlgv99puwqn
Cgcpz2ffaicaZ/l0cmUhNdyGYysiMTHq/LV68JRMWP7YZfwkENYZwNSkL32jnPc5nu97CiP4Ymq/
JvTIlTFn58UTYGtCjPY7ZpWm5fxSv94a/pBUnuHqmGNlih4RZM53q+quKVmy6xomOcTVOna2QmA+
yQ5ak6K5zK1IC69trMxaqXaB4X6itWVMZPOFpwepDTgs8fUqY5p3WZbMI5ePkEydrua4dzK7WQkD
vKmEDLIddSewp2Q9aP7jZVAKsi7wQqvguQK/L6cPYoTjx67vSHiwojjHWz/nbvhWazxSLSgKdpMQ
xLKH6Q+piyqPITu7LPh4agTE+NtjZZ8jiYLD50BzjxW6HBpqRBLUL28e+uwP43TR8BKGjNv12UCc
TB08E0f4KBntO+UjJmkbsRyetJXcB+q5FyCh0+5h07q/VsSKasE1kGtpaSLxqcr3BjE/yC6C7HD4
NlIfxiE+FS1qNQxLg+DhmCklE3JU/RXR4U9KXuHwXJ4MuK/5ureVbQLAJkL9lY9+sh1PG7F9+FtN
RQZbs/0mi2KYhnesphSS7NsLhMRRqnipkALWByx8gaKyfNjfago+eR0kkS9CbcZ0p1TfGkGZT0DN
U6DBoigw2XsIdTbgZP9AdzsSzCQH0yN9zkV6j9FlHq8C34QB0ZdAYIGuTOeX1lUaYxytbcnY6yh9
wlqxQaW9iheZJBX/HG3EQei1RidH4/ztscFdScDPZMAWVSa4ozGNP13/hfjsb8FByZDuf9OR+0Hb
Dzb29y4gJ/i/MSaLJZ17pBrGV54jBMd3beZjd+mhgJC1GtOagtlbAl2sncNirCyknCuYuJ7/4N0o
NNS2kFdugUYhLThjubaaKqVeMpXOjf8vkNomEpprfGbdXS7p/Vf9wHeipaSG14rAzuntATVaH4AW
vlXYrkGV+dzlPd7hZ6JXW2Vl1ayL2aHrXMkdThc+M5tkOt3ZI6Ra7cKESCEDcWP+VpWSvlzZxQPW
BbGgu6xzXqfL+GwXuh70leLqIl5jKoqwmAIh15yjRREFBWTUcnrXCmXT24hguxqU2PZ3x0d5kgb+
XFGnrywph4f61Y3qrMq3oLtwlBUqnWDEZK2Z8gbJ+5pNA7Vd9uetDS1ot2B9N+x4b9IyFriZjEN+
GTcY1BxoYGDxwYTx3vwizfPbzrtUjJm9yzCbibPlcilCxeI77Zb/jdym+RlP3q8tr+uDqokbzv5V
LR0uoFIz0vsrjGb+9Vj3iolYA4yiUZzxBzKFSRq8kKxL3Cjwhup5fRpUz86nvwMFOsXDjkZhKXcc
A8C5aD7LLABWpXQLVELWoERcKVGsCK++uDRUIjddjNHcouHbFW1dHixYv4zAXjVyTKKOfEEaEHyG
wiqwdJ7RUBEEiMi5h2dK6D8U2vCcE9LcuBWiHw1DHmx0aMZxYBG7UlCMmc0eLneSudS2X7qdhye/
7dQMKk4FInl4jW8x7Kl8rWY4ge8gaGTVGYOGmP0HR8HV6exc1ypxAn1BG/8oxCkA/akDWg9zoftz
ZPLNvMUByhwDd5rllSiQ0d+tUnfwny+kB8xZrq4MxY73cg3C5/AAgg1E9suzjfXL3XK2HNJg6D1X
nxot98IWpGnc8nX0ipc7CA2B26Ppy0Gx0HyRYbVPauB9K+yOPYpWDVJc49/oM1l1hxaPT8IvNNG6
gXORg+4hZhl+di/f0pDGdyXEFzCqBb/E9i06nAyg0bsx4id+qh8kh5h2b32fD15rDXodB8138TK+
vl7fzHK/hNjfiUDOww1EMdMfKAPqv/Yd8mBcLJLBZ+uVWpv8la5d9tsEa+LpQ5jsGDhdYfgvaED5
OELDbSeTfINJQp/7Sg0jaz5GkaOxj2HwHj/pAUJNk0ntiF/CjWXZh+/WYQKqJ3AaBDpsusVGkjA7
ojZuqLappJ2O37du7JAvkaKWdupHLGVOq7FHR00RvqOEwGV1bFXcfts7zSjrJitBUyIdWQSwTzd0
tum8F0G9c2KkRVYVG+1CEyNIdLEFqnlHVdjZHPqCZP/I5161Wkb8BdR8d+lkoZeOI5d2cM/RwX61
G27adFLSS0Tjs1CsmF53OxZ/3UHXvuUr5xqW/8dZ7nqZbeynCZYqzvNNC1NUAYQlElA9qGzafzfM
Sw4ij2ANOg7uijlixRT7gHebVelmWlTojKl1yTx1WRa1vqz6q097Eh8cIVWAdo0qRiVdkccT/LDa
8bxRlB/gTkmJ1oHN/MlwFjwK4dbJDBrNiWIhmIuo9yoTdVL/Dkd9fJpuFBDj8D4xWlGfPHUu6/Rv
Xm2AMDHhZiDyQHEqo2fxvt8+Sbg8jb3zmQZUVbx6/rxZh0Y/vVVK5faMriXt+Byxq6A2JQkJINsy
ivPVdEXUo9RLpW+nmVhNNUAX7GPq2XOkTmoVmhf8OJ13QfK2Sja0iLj7/ecu/+1p6585X2PIZgU7
FPoEw3xurJqsXCSIuwKY7hfPM0i6sq2EzFcUXO5WxyEGxw27WRpUlp1oX3/4xtDq+syCSogFM3EC
OsH9NtwYohvVQagdUDnoW30IUZUPzLG/0FARSPlMhB0FsM9zJsAzCnUtqbty6qr0S7l4gOm83FPc
sGrTkYy6CVXCOtQw4qacXNx0k4QQ9o5+ZY7/NUh/8p4qX+8jE3bhrylQ9qw5VYdIr5MbKsBSPIks
HSO5bZ3IYUmQnx/9vCiqUwfMti7qCSOdTOJR1pelHEeN8zKnfOin0bIW7Za+j/z6ZEVuDVeEOL4Y
fwqNwOfysJkqhXPFmaDMhMj0Ptw5DCfJ6z8j9xDdKqRx9Ye2TtCy8UG5Sdy0Msrf5uZLZ9wQO8bR
3hdm/wQ0caAINd3jBGPStETwF+S9ET/W8H3kFfcMBtbfiw0xAnAYF9bNoNOIF+AqKyfMlgITPmm/
rm3zkVvwdg2UGJUK5uVPYX0lumXWWPfD0FW3xnMK7lgwCd91Et1gTsOy/HDauJZeco9QRE4IqmG1
aBVVLraHX2j+gUzptXa++JWkQyUzokjnUYcx6cON005cPsx8QHI8qA/6iouH6odECLfcFqHngh8F
hGwyahVqn96jYiQyA8m6zvyvv7BSh5fYWxhbHUpsGmgV+MQjmyTLNdqOtJC0KcQeZkSJZ7e01p3I
9wkXvwbx7GFFo28UoaA1My8339PH0ZVj0wQYUdrTWT92hvxahwDuefMoFFrRR3+BPq7f7htdbHCw
/l1HlMMUDkA8DQCyBo/WJYQDUCT3Nl6xcLBPfJw7BqmGkKyVrsSkPJuHCqBb+4lj0zjGf1s8ck8N
aNCd2EV6ub7Xxyu1bu/88VSJ+SAJyGEi/N47s4yjBc2C+mgdvxhVMAdFkLEWFrjYxR0lwTk+kjmH
aeSmA9x3Mg2ejWXZkDEZtJWitsqZAmWY/o5kdY5vqwCvuJOz2IddWORxJW0cVUe1sfYKkZRiDflR
2OKVnyRMQc2bB8JpgE5dfE763q4w+jcmRU4BnVepVC5jx8eA5nhoyxapBiCW1crtlppvCfxG2X0b
0sSr+p61eN2smBztz9M9MK4vUAxgQpJBuZhoLIlnckm7rPn96ymRfzpRYjHXlzNfigh/J2yEytnd
vPGQSrBBjdFYMLAJLTwnLzidmME0RjHj9tf2hycyf8Xw9z/pe807J3b36Sh81EjngeK8SXtgYRT7
dPBSepSl5O4rqwvCHRniLJ563msSNQ2nGBzdc06g6bMxQijq89wOsKfq//NDgII+UH4+lm4nyukY
5OpkIa/M3unZTnJmPFRulkLDxUY6OMKpGRYM9ZA58QRQ8CsSOkFetxcmxw3a3hPW87pkl6Eh5UPh
a80Zpl3Rbs7dSt6KYPmoJ5Ad6H/wPb4dlgF23KfnKUOyz/W/CXj4LdnhK8ov/kRtya7dQJWno3Ff
1DIMKatx24htM+8R96lbeWLAIXxcfxov+jTZ2oNor9AYNPpZAzm+bWInp1v43c8uRI38XKMwxz8v
0EwdZBB8jIIE4Be0mrIOzozY+H5c8sBHmck/Muahz8KEsHi5VldYhrbg5Ej+r/RBj6oIwp+YTrTj
eOkxJcKg3XfrQ1VUajBXmzf0ZY5zwkcObWR+4z5eF+sZCGBimCm9Nr4nXeh9nE06N+i1JKwQeeXW
GvJhrQ9F6ktD4hHkqr4wJJ8MJifgh6bvc5Yw7+bE+06LfcoH2kxMMORnrColCRrXTNlQbypfvuEd
JQaiQHglJ85bGokHLUYOUrqK4ZLAQkCY+JEZG7QuLOhHKd6D0TAPuQSY2/2Rgy9WmQuFFt85YPuE
dPEAcgqh04QGu+kwaQm2D42I3xkuIKqRFQJAs78DIaxiCruoLXFMJkk5skploj1DlXQ6UcZmef0B
Gz9Zk2u9wC4xxYLL22mkavTbfFAW1wrHjYzn9NGnhUWoKO1kmQgxZeo6dncD9Ps0Yr/qkWM7IZSR
CQlsB9GzqEXRiuOvKEMJbRVRz+L1/7InIHe7sQljZL8ojSjW3c2Nl86ZCVyc0f01LO4aYuBPbR9F
SLc3eRrUDtZBBOFDmYa2lPmj3YvlqpuvP6gJVCeeQNunbzxDch0iq1ARKf0aTETuHdp34NTLhYXG
1q+TQv9tUZyr42O8dgBWqhd+tQsIjGEUvcsrfOAsmtyDH6RfUdIGBmWb717gTK7ZbZXTrZ+GWimN
JqPDzvDKBPcQNPRjyt1GyH1ramXPKBNQ+QJCk/Zg1HZ0Ron3AormqQLl5CjAWV90+20lofyAwj3v
++66ZGYLI83wWkWTnfAD731sPQwMpIKtflUxDEkC5Woncch2cUEBICkWsr4M20Ecsf5TvjDBDDuG
VCaeM8X445yNg7Dtx+Yqs+2IusZxnL99IHqm/fSD16MauYlDoFA2GI+sCrsKgW4h9mllJ10Ilwy+
sCIpOoXXdTWyn9aNEoQbhGCe0Fd5zXXjVJBdxQXYNVZE4QjmDVu/rb8uVShNbqpm6RMJYzOxg+/G
/rJJHetbXd12DkDk1FYkyk8cPUYStt36Z5GaBuQJHUimovafuGqvliMDnrCKekKE0oPcrxPh4IRE
SPSB8U9bpCoX4J7dz6FhcTvDJdMQeiwWx13SUxByj4lsomv3jF8viqL6amibzns3KX3eHxH1Fq1f
dCa+VB9lJDKnZFGuDkblcGFuE+xLIjjIg0/5DQbiAAahfpHItVfOgDTyRYp7TWQtcdVixR1HQb6a
AOb49n/1UofM8LSvFQldpV59U9gaVgYvCk8tYq2htQ3BMYiFteeOR5hRXQ8X/jC8ZkbgIqk7/FY3
I/c31Wl4wlVtHFVWrVhraiTGJ+rAGQGfa6vqxvyH5qJlPzHQtu7MgOBQuuXqpXyAZo5Asi6tcbEl
tlj2NOEoBITkBnw+sEvAO7GsrJ6ccCjowTQFWf7pwsMklsV3ZBr9FE6Cl8VkZWYup3r5qlCTSQou
qop7uDHrdudGrvstsHfEcuD0oKhcc3RxG4CJCjhQI9mTQ530zUSJ2hPSnRz6zgEE4BEFY1ua3yAG
DmWCmza1MOSQ+fkdWL/QyoE91jvPiYMM3bEWztK58eF6YjDBG/yOHWVL+T3DbX3wzecw6mEeec+t
J1u4doWicIeDAKWj/azCg8EDdwSXsEqnp384/eSTt1NlFnsihZ3MXVgjXIHadQpaQ0i9y57EzcZv
ecL+VKb5bthuzouR7D77qRc8IuDNWQBuW4gqtML97TZOq7+RnMOVD4oHNRBiWNRBKtYxRgkx44Hd
xXTHi/OrsrImNyZPVy+YLIVWvUgdf/t/C5ikYiO1kesq5aaPiTi0roHb4x/ifJQRuI8JjN6+zkRb
Y85Ot6hvAoIqvUJtK3NkgjQmvn61oZWdDxhvcPa1vX+UWsEUj+GWD1asmmKTmWe2l6rIa7qT4Smd
eh+75cGTkv8vfV0GFg6tKXF8/JT9qmevWuasFMIxMYFYxwMTLvvDP+QWxy7oqlLz5CiCFdvmSuUo
0pQ/+ZztJAYR7Drpd5ubg3rvMUaJd0mefqeWDXpQdjMzzZ3hVTIBjGNI9NA9fhEeHDkHGY6TlF5N
yAQjydKmHczg9YBD3v4mPqSDJKOKnM+juU8KH6hDH+55+J8YIYgO4VjA5sfhUQp0JkV4pPJQdtNR
gRuzV9hCvK7TGgJR3GHWDv2KB07GPv2VVvysSDOZIiBLmGkiRgTgLtLFU8OZp4NoW8nDTCtPHhrK
OCOAP+rF2ppUW3o2mlZkogkGYW7vWWkcZVs+Aicn9FfoE3hQdex5DlSxOEpYLWanOU0qSHU9LqKD
ZTTMc8TELuDsfvT5IWa9L9VYcg3+9EhkmXYt7gX3Rq0jtt951oZ/ceJPcHbNPCwdD4BQgTxAIoUO
Q4nAAo/6bYKCwZ+cP5ql3F7DdpVrI20RiQKwgkyJeJeKI7Oth8LgdmBYpuM4OZJc1c1sPOzDSmoi
tn99YyN8L5IrRivX3q+Fwcp3uo9xKa+nIK/qADxLF1WkexdzuYgUGTvfueqYDWui9NhpHm9TTrMW
yGBCGUMJR6NDbyf2Dv56IOAGC5vtneG+FdO7YrTgtF/ZRHpBiWUi8zEJoLvZHuf0ew4blInU9S5L
RpuLek8VLXYfUTkL3GOzIRr+MzPXyTbAIpihiIjCfRSQp1EJJQo9CCQZwNX8AnwE9NuCy8m03TaL
CbcJ4MlT/v3BlpjRdnuvQelginaZD06HtJHh/J4nGRnwmXVm5yqJGaMkFPaELyiQ0+/1X73cp/4f
UTcIEXPithmNGUdIK8AWQa9jsJhSeOm7/7qZdSjWclAlK/A7DYdxmrP5GMYIAHcFzyjpkA7riEhU
YZTL6Y8zlkg9/izACdfsS+tKfW75PtwbaRlSDOtnz/H8pIyCN8WBVNONlAo7i0U/pfR8fls8kS7E
buwxDlZlaP5uBOjMzYj5B1EUhYo2aP67sD7v/26rXSgg83rUQlI5lMKUCKRB74BzgbTrjAzHGjo6
AbzrCpjOVyULJROTJoRC0GBjxFsR6pFpJES8ATM0wO4puLasg4ds5S1uUlWIJ9ZEV5QEwc/+D8fb
Ss1C5Z2Tw+B9cjWz2CG+6iVmXm8af0zeYLH3TkeMrmDFRePaJgDYR1byT30ILGLExPH/yTsaSHwO
sU7fdqx+c1LGgeTvjByaIvLwhT6tRdEhNzABSiTZk1DEQrADx/JYt0paVsp9W4VjcjQhJWDtRqze
2KRY4RoB0bY/75szxTx2PDuH5zZZ24I6rddKEVACu9l16SGF6/Nxh4EPbXYzARmuoYIhvBPUL40a
5XvSJ+8Nhx6OBgOaq0FNTpKKz7GM9n881wkzfWExf1SwXfIfT7havnT8Fa/oY9Ae5iixder85uVS
ihlHYXjtmJvuD0jKJfk+eG4Z6ptHnzhx8SWpbyJfgIf9ZMp8YdAp33rhjPk6fKU5pLKE5gV3D9pn
DtMR01O8siVTCrR5be1bH8GZUzmYAXE5Vf8bF84ytFOkPqaqb23VZGBtbfVZf3yxY5ZNHrc8hccB
p6cpyk3RdFXX+BuBi9+fuGQjTvyEO5lhRR5yRxo4ngXgA8IeV+YqIeqa/IQHM1WG0BXOSTEWIgTp
6NGbM7HXu+FZ0c6f7nv1OIZCoBUDr+bxer1aPtU3B3yGdCENpVM+wCSWOJ9S1Is+rWtPukCem0vD
715/2THPhN/cV0cNeMCf9LqVXGT9/uSn5WgQHRcbchIx8e+sU3lfk4DDR9UtDRbUypbKf01giLyi
uhfhlzN1Os0VkTTf2OIIyOPfK2HXeUaBWM4jq+y0IH5g6MEhg9r8YqcHRgHaEIdORx2xjgo6DaUo
ObQXfrBdXRNouXzK8zV/aHNtJMfC9KEzw/p17jGFBa7R+SgLu1OM8kswG+JlI6D2AF4G+XMp0HL0
dKi6xjsOtYGdMeMDGq38og6R5Qn9dz/eHEbItPgLijCQ02rIJ+Z/sYH4774DA7q+SCIUmrJPDckP
baiqecaeeahq+TPz6oxgypZjo+3v0fsGXDIPiizA2fe3RRfU8p627hcdvnC7CwtafHTjfSj1Svpu
l2Wq1zYKp2lEnV3D/X5BsxHIw4X+l1wZk6R38mh+Z19l1g8YBew1fg4WBViIt0nPHYJ1o/WlsFtx
OtRL/VTB4jAIsazeDRvtD78KAsAgzZQ+G8FBvsPQMCH0n6B1q0z21KBQXneXMp3AySjFqq1OmG7Y
rETM4/crhwo9g2TE1T2Te6cCJFom7D/k38susswPnSTA5RFCV+6FbGFkhvdG2JRdUtvKA+CsVTYl
zn9RhWq7omXlSkty4O7ICRrWkner+Ho1hbQQEyBtar/w2VyapZ8ce6OsEomQf6SXIf2mdJFlXSdm
kmRu4MFzfNdmdjAApV8s/c3gstnzWfLnKgBeYdgIvj6ogbHsDJMdwBOV+y2npPTFdMO5ibD3JiyF
2G5zZoIp5zwZYGvjjjC7//wCm+JFMY080FCbj2YICUXWTCnWuaXHWDGRaom69GzvsaMVPI2ZR4Eb
BOjye0lw8JVG+cogqZrD0W3ikTlkEJW1Uw5HR4dIk/sx91Vvc/6c39sOiJALt1/aQarvBTkgNyJA
2XUmJ4H/SIKkrMpywyBwWnlfzbDPeDTWPYljM0RG8vjYXLTmQctO7XJjwGne2XZX+CGV6KioEGdE
4AokcT5gVvZQlzk8aQN7iTvS7wqZ8zJrjMILC/5UZ7/GB8v/K2IatJdSY/J7vYJ7tT2/IiwakCt9
c8kQzWr4mYtmxOAFEySd6jm+d9NA9gcMeXpAgK+sTunRwChFu9WgeAQw87zK29C08Wmxs53paIcB
5iGN6S7Lq3Ynh2rFZwge7uTCWbTt7UOCrzA2V6CoyH13yERfSFj21R63bHld1/CEYe4AiRpxQYkW
LlZvaVyUzVUOMMdI0Qj+XWC9c+ezm1N+Qid/Uh6tgvJviNv4Siupsu6xMNurn7yAdOv4WZIjNrmt
OEGEipMbdgF2fKnfAcAr4bA8veER+wunhVLQC4pMvqhSKgPtju1mVg7ankwqZkFpTs+8utsSqjM3
NOKD+flov34fr992YdeUuSu85S3dzySz8vVI0/Kgy7nYAaHLbNvxlFyqyM4LXDM0/MB+rWPj67zS
DfGv8/kk2eSYbWr1BtCn4a4u7/XKWrNYmV1ijYz4zP10qWKCQRVMDUN0uWW3XfLvABdzIINIPRuP
ysAntbhMyPy6pBawticOZT8LRXctxllvk+u6FRCt8zO/9QH0r2w0ZO0hID94zc8ylur4sCPsTvmc
3pxVzaOcoMWUD1h+A78Xbafxjf5oBpXbj88wjn18pwMa219y1kwvLWB7x5Dmubf4QDY6RKA6Nydf
yCf0eCrv61kQigUYx0E1hFmKrKLKtcROsD6/TiD9D9ILtioPmqVvhI6W9J/KPhz/JyEbbl6oclwn
6nsKWKc1KBZFJD+7oGnxQLrd4xRhV6QXRoWw6Wbi+xJ4b7cUkZE0+P5jm8SPbF0KMuTGAOANz0pM
d66a7mMKc8BKm7XlkoRkRKYePG5jRNBxmXId9weXQsK9qyHgo9gD+SKaJLk/7uD7nR49Yfba9xrI
4WO/dyFMHNNGKQvRyv5H5KYHhlcosMWXGwM6/BzUif4PwPIEy2Bvq9QccjQwAUrHqtVvYetb3vZb
o2BvBzkpzWCIaNm/d0BF8S9wDVALl67NBXinMrTpuNpDoJg5KqaEyQ66F2uO71IlOujWsnPuxNcv
M0FzjAY4ZfNN7BcoftIi3VMVc8AMNZs7+h/pu99nEotjKNVNg1GK6MTW4Oqh6JqNuCf4jOS3tg4k
xpG/zCxGsJWH/AJWaK/vJc66zsohCqSH6NaR5o56LPe5ISL3ia5N2eW3gnpGmwiqdRrDvmPsy0l6
cBwFBMfhePU2EoyD+Tl6hnXabqiOp6T78V3lwNvdxWti+4F7CoRyICQ6B3DEwwita1Y7N4Ej+mm5
hvcqLuH9EtefQDVXEx0WXoGGzSaEKOSf6S/zehOWENLaaexw4rCntqWbmfndB1EUulibKY86ERmn
4jYx8CbxkAXecpFJSaqLva1k0NlqUTZ1vpmX4vydHQeCaFJVADDxFvx1Cnxvv8iGnPoy4Ao8QTlo
tV0O83d3+/O8G8mWVr/dG0aekaLmx1GsvRKfVnNAUTZUqiO7CwzmMIODcNqE4Y8hRfmD7s5d9t+E
aGXBnF1mTTxFg9q6G1Zn06OBhTpVBTU6e78Fj+ACdRkWL5ErCuOIxRA7cgXLALxATdIWCngK3h4d
ENUJxTr8TKHQJ6DNG0Zb7U02s0fxh9xUczgm2kr1OLf+aN2IoYrjFFysMTDwwHpCXYEGLVwYBBZB
WgzMa7g9EaUdGN0iwxEkOmvL6/hFsOBIBJNnNUL40294mcD+Yu6qYv4+YGh4U1YLe27lyJZLPIt2
oFYZcZiwG0BIQ7tNjvV1OsxzKkKFYkSeLgGFKz2oUUnpKKZ8xG4lTluxQHdihgPKvRPYoWFm9kfi
B+p70FEwqQzelXOGD4uAKGWZBGWI5r5ZxhaD8jH/JO4sXQyYwxVd6JejuCl7/TV5DJ7irnVIZNAw
ePK4RddKYUf+pQLeFhHBmKtAxOrTpuVf5gsG5I+M7mk3nVwH7SX4CPTY5JkjNc5RJhtAmidS3suU
hKxhVlEwCA7M3YfO0hSI8GI3Oq0Di8JxiPI9CkLLBJ/TCqnLQm0TRbgklLJCIpGYb7dY2N2iajM4
+PdnnWgtk/0kmZu/OMRl6Bef9JtzZi0kQ1dxZmxl/e5YBZ5pwYZAEJTIvPXCudfgHK9+oltw5cUQ
c9+CJrIO6wu16fEH8kghMKQy38zBTfg0leb2RTUInqFdn3G4sYTh9B0bM+MRPVZoECDbtYBmfxqQ
XjR5ILQKc2z18ezFW5ya21vGA2sdh17K87iMRkzvHzHDVJcTishf/m1ps794ISN1aF0cnULGkBQw
2KMzRKxyAjvkHlRNfHg7u1lFIgNyCM/ejqVWfU+wcU+gguNS4dDBvrZVXfTo8fYn9pQ+tXIO5f4L
9oIDlKXtKTgiOFSaxmtyQl8o7RUBs8jFBTbrV8ZYm4hFlbjp7v85YffDjX58tAhHsSVB3hUzvMvw
roef8ZKlwdg7li6vuTj/5tSH1RIxaYv/0tyFDJEox4j6qJclXsUxJVkVGFVRDlrO/Rm5aEhQcuoQ
gxNNz8EFL4WxW0T9Gpicj0dBQGChQOQnM9ss/zbPjrP5R+efaaKxl7s4kqOyXq/HqWfkOQCiet1u
pOrHtoLEjEDyGnXTTFFy/vIjslVmbvnawQ1DogfWj6tEGLtdnFWgHufMIjuqH6DHNkeT8ZyBvzUx
QGTWj3xPbPucfqcvoZvE05zyTNKIZyqdVb3SBspD65l0MXfGQx2+Ku+CalLlBCMmxAb9yi41j3K9
Nq5yMmaN+apuUpAH9ayIhqIQsAGb2u+yTzaf2fN5rdtLzWaJUWkkY5Icg/ZSgPPed4rbjVwzLTYD
CH11Hh1bxTbNo49zOaLtm2crcV10vddYjlCJXsISS+RBQX2jIpXjl/zWSoK5AsiXXFRdJb5YUdRQ
MHFlI84EabX3ayKMu06TjoJ+pw22isHlzh5n050z0BJAtRqcjn3Hs3Us4XasizgajthLDQzr0b8p
CIt0HvioUTNoY16flSZ28+KUegC0tW3XO1vNB18QPJ6Wh/FwPzw0pfgkr9TmuHo4VLziHi+cfpqG
ETn68sGuBKuo5J4YZc42+TsMufSIYQeKfoUXPawe3hSLV2HiQr2drORzPdfQ1myxuF0NQdkcD6ha
LdUmkxoFRfH0ehPE6q4gTvPDt2zKJVr5JwKZtq87kF5n1NfGOaS5OmWi0ocolRDQGGdXxXv5zo5z
xbsqnC8U+I3gQjgqtPrLNit9I1SD6RuvRQGdQUlbShW9VvQVCuciXAJpROtPEG7TkHYV01tZqQma
iTYnCrkc1yXTwJwYeyjVbD/daTb6v9RGGPTYngpkZdZy0xxGdVwSeriRzXGxt4YuQSIXIxJs2muW
80fRn5/9h7eHWLDYFsZDxvGFIz1UOT4jjK6qjYzPyGy4noii3KsFilPw5Ph/DXc6PhtiO8f1uPEn
ZayUSBWD2ayhcskL3Ulcca2NuGVzSv3pyFKAPND3G0GoqrNKmRfL+spLlBR5GkZ6apFJnPUK9c5n
4LSqaPjmfm6rwrDfqnpujsJ2ANvzX0QyFI+mimp0x8IiUGaLEYGZ9l5KbIcoRd7LJE/IBp1Y4Knp
+EriXJ70WnhCc+FgzobiRMdhM7y9jjDv+WfnGGffdCA0VRdmb+abYxpXHn1umrBbtq4iIM2L5/wf
p+Is71hRuI1Csfx6rzXGldvCPTkuQgglHR59jGFV8hkVwnHnDgrzJPvvOzYywoxiP9zGbbFa8EjH
kuAFYCwJKaY/ttFeKT+iYZOMcliH4SlpTCKwsIRltjLWgjMHir8qvrAoaQMg+wacXQVodTUZdZr/
JrRTpUPB9YBNNKMFGlvD9Cbj55U/m9ISpGK+ezZeuusF+bDRMdLi+fZV+ZlpRrgoG9Ez/lbD77UX
ioI7cA1mdojDuCvX/WYow3g4+LArIyafxLLjG40lrSQ2h4WUagJ6qUJ4uNoZDcbOQ3uMR9U1U3Sz
NzLhyt9W8CPUMzuSsM4UnlDgrBh/qoP0vBEUsDSSPVm8LVP27dg85lfC2NdbmUZPEI5leEjoNjph
tgIXzMIab7BpPyjlC89ippAwoWA6WeElYBwbjwLNwO+0T9bVkr6Vh05pakQ/wxeHjST6rEaTK72J
1Re3eKj8VSi8ZRFBc/0QMAFfG8tdDvVnztmT+v1ZAbFREJ5bYyuyvxOJ6hhub67wflRehpAJP4u9
tv+fEPcBEdYeehRgyxxT4QZoh/35iFx6kDDgCrhE1fXPQcSQix5ECHxE2hH9QTjoKtSLKH/9ZV+C
ZrbxfSj25d7ONvX84dBeXGl8vdPooC2h9xLP+10RomyxmbkCepFfiejNJBjGub1s15Aj/S7uubNV
H7TJtRvsp8WMm3lwHZHqYQJNQdfQHYQFEg/zwjZBAg2yyzIjGAtXIZqjQtTcQRYCBP+uu4KKNu0c
Zt/nwSIdwkpwIpnbmpDdMWc9glmZeXN+Fx+PejzZW9hVdmmnCiO+BNcNL5xMb/1ACCtQorti8Vxi
7nUQ+xlqYolkuP3ofKlbWc9SJHtLlFRpllwr42icXim++9eEVsmowcoIKMV7kezyIVO1DlcyrQen
1+8Hl3GVg1nMMX7PbkaHdr5hgFNOg7C3nvGRtLFKbIspJfC2n/5SjjlUumU4u7B0N/KjMKKHcRlE
AkbS38LF4/gj2RagUHru0BcdrDuzc64VDltCAb5OBMnAd6WUb6AGEDv8q4UBIpMlP9ENapoiOEnY
ys1gYngb/IIY9STyOEVAvY/b/zxcWptl5vRsMI0tznyz4BqM0LRIQx2IAS3v9mbe2IL6hugLCXhE
1MsyyRobrVTe0pn7lv3ORludhBrEvYtIDmYYok0McnTtdPJYlYo1B8kDOaItzPZF3Ov59+LiemOt
DZLfHEh9vnzgwvNFELd5tiIwLkn8QVe0LYTtqh6+lE5j+JZMbSfRxaskyBafv7DgTECYU9OVU/xY
Veth8TjzlT+Gv4gzyOENbtzKPM+NjWqiDvo3iE+jxgv1lxhJ65EJwtyaL5sxt3KCl+m2OE04UhC7
CyNpQTDdPzJRGc1ynCUcRkDFzZS8ZeALfdO09Nrqn1Bd3u/e07QBghLkGBQUQHjVbhAogngahlHh
oGRfRth7FenbHaczZHji8RimcLQAYL/DRZAQl6t3RLM3K7/DEcqWUbbzTUFidXqot+2/lBULyiji
T11mNaNSqybT72OQGD/NYv/WWxoxy6sPu2MlEL9bgXTkjwzgx57AzrDUFBHyPYWHRFPc5Psk5LL3
mPbbi1kZru37Zh5h+iT5qS46ftHm46eBgp5oJ6VVEq6Ux1ZbAqveqjEbS1+8fvhgqAxxLSwCri9J
W40Yz22ScaLzWYqFZyS9YAxj/Zs9L2kO4JQhwoWwxd7JbN2NFcOqJ9RZUOx4fgx8z49XmwIoSO1e
DlODqelmUCdHs3sE1g0GcRH1ic/WFMW1Ho8bPCUKI3W31lQlOnPrt1STu47PNnpttK3pFBKBqO0g
oAiq3CTx86X5VCIjKmElmUjnfVHkaDPh2xoGREi6PxSTNuMrvTR+dIslcIzZZTLomgt0J1i5cEKk
Tq8B8eH45Yb937494OLrZIU0cj+5LPsGR3vz+dGDPmZlWT89OQbbrWNHUn/y7Ljc1OqgeyP3Pk8q
/QXVLdhHfm8mmQrDc7adjXOmhGbMC3YiNpPmUVuwh7npL0XabaU5lf3oJ6U1IiW4AMlmOyt71PXl
8KH4V/CCE75grKSF5J6ODSwGDCLsI9gb2Po6zGAW4Prd0gh9pRVmJH5z1wo9gZbuL64hsy+r8DQv
COP4iBVKkwvbL1VJdjIy4nCewjym5erEMQlSVBxTdaMQtfNc1CIz1koovrCFyd8dDBBArizPDPOS
QjST10mwHRq4Kp4gkgn/zRT8ZzVaLVH8VDQFtg8gJ43mIkt6j3yS9ssub3viBzowBocRkSebY4EO
NC/xr/qZgOY29wgXnAlAKmJ/P8y3EhVDbwZIlQMIoDLSRA0cxFZzFk4tV8XWC2hlcQ1ccjLFKFNV
ovP/DoqghksfWTcf+C/l9VP1RxwEDknTbp8KFPRiQyKH4uIG2MZ5FXPCDVWFDMVjncbBROVECj2d
DV3n2Z9xJe9vcmFaKzG3+OiqYtE7I+1uFjc+7BCCo9WYUHqZoUpyd4wnOFf4CTlFlpD5wU5IXbNa
OaHnwFYNx41NtHZS+8m7VwDPvjlywMmo0oycJXEfDi9LSUQK9wTeJt7a5QmsBkG+ExR2yH0lQPMC
S8+QOGUsiy6RLZW2b3DyuL0TRpqOFo6D+DSfHxUqZqJZqvrLSx65C0Osh4nxEp/G4SXdOSJ/bOaN
VGZCXKQEziCnkIGrdJJXGk+C7DGreee/y4Opu8PD2S5wU5Ge70FSf8nfVKXHfDVVdwDcrdZ8ItW7
y9JNzayCTsK0h4IDEGQeJmQOvbvWqUkx53gH96pCxMS133WvWODyjWrGMy+n5kWp6D/lFk9/3CEB
bPRWKBLyYWuVO7Q6KNz1lpGHLYjKqa1E815rh86AiLvNYXudXbsoDxQzftSFCM5HhUYoD//c2h2C
betKuTHMy3g9HB2HSCSqnYg8n19l2a7OXzQ/gaQgf4zCmAcKx28QuPlA+5vv5YL0/pFtnaO1Cmvy
aKJdiQIKa77BbN384YkS6X3lqFCLhj8ibY5wxKs3H0PyuJ89SyDqqjMEi/7A1rvD4dzUJpC+vTVj
oUHIRW+OTKDpTRPboXzHQyXuTraXUrSL8vsgAcVOvgRnLB0QhqgGvaY7FA5x2Z8rSI9BkamOWdyY
IOXqyJTw9hTNn/fU5Byi0HUiKh5huWhRLowIDhQiV/4rDQlWyOUJLAfx0k91OfwI8q5Fb8BHxo51
T9c1eJ41a97ls12DuwZNu10N0Zov/EOry8FtS9X4aId1UEXr7xBDESXUT+lBCQtzlGJFU5L5O9eu
Toe8XZsCO+B6SqmSb7v1OOycZTvsaxoXeK8IcOukorOU+cqicGWsKzIVoE7yOnjGLLqNuBq2w/eg
nfqlbiMOufN1GdVpVgCqeAO1VAfzpPQzuHlxlD5hbtuv3nDi78lMy6yZZLZuzp4w8hMMbPD1TY/o
SGVfynFSLSSIINZyehOxzBD+/yPOBlFZQcjC3FGgVE8FCvJj9iY1hI2xTmwj36/qGTYaYcXd2gH1
D1BLxOMpvwGLJYbAocZrUoxxj45JbCeUzwwKUCXkR6Ys2WM+V6D5LZwiVzjhuGsxksmLrMySI/ne
iRDENOo0EdyvIz067dmLVda/lwbUyVLpHR7nj80d96chhDfXAwZiUHD/tSacjTaFoAFa3fWjzY3f
+HdV9SS+mngI5SwDeFLggX/Qj5CzmNTeds9Y3TTKkQ6KiZ/4uYa7lSwcCnkaHyJoww9Rmx3E6qDL
V3g+Nl9oYZiSd9Reokt7xibmXGg3Cd7+cFV4OASNm9KbP3t7XTC7osMZTyzBSWQjjRI2NvOfuo63
a6Q5VSX3MLql41nX617ZrAqBmrO0etQSAmeDu0u2CpM7yNcH34PrEkyg6P9sMMTA9sDQJVkEygfJ
ZJAFDmfg3hWsPGlxZMYnPpsiG+fjC8bn3P/4wJqSkwllMvng8rupiVJCkf1PpfLMUDn2MBEDNWc7
PVEE3eBNEDenhyx6+gFYawi2vlNYnmkdhq6YfXCbuZ3WvQhuEvrDr6xTjP1yVdeJmRFzsCEJEbYd
u9bMf3F5EEGRnMXq7qWCg2T2/TOAcb1QfNc+N50I5Y3P42iFBn5W9mnrxtWlNeMIgglCulScXppp
gbmrFWtCaLY5ZaPxcjRWlDbhQG4287gyaQZBciyZuVXo3Pg0HnVnmxvkhc27TLAJIcfxH2zATYJb
28Moq0sRlzwBTp7eDM7wHqw8E8nZZOp0yc3up/AA0/D+1KmfPvIv0byRvpMKpoZfcFLSxVriQNws
S+bYIUYXAWgVvpz4JE6JybmierGDUWSIUY2LJtusTLQEU3v+U4/NnyUfq/5OE7UYW2eMDIKc8mlL
jWXLtjErAJgrrfV61FndQfQn7/eFoOCRibCBB5Su4zzXdJp+iYhkEY/Si9Oaq+Z8DwXifDSHxgx+
SbuGab003WXCR3hK7myU59UTLYABDTUTrEPVqMGesEpoaBtQquq6klZhb/rX/HKJm94WHB2QPaqJ
TGIsJJtNn+BFO9r/vfx/J3PUf8U34KMTvecUYgiHXRDy0F3FwywcKdyhdS9cyIxiL17MuyL/K7RK
KrM98EAxkGj5JHy3/4Db6d2yDRortC4iMZKX52uX0+WkXfci+O+JrFvbIwmRrH/rLiYObrdsZrM3
bFeR5h0FBN2/N3ECUMCRajgeoTrrZUGPG/TTmvM65OEED1h3tNxPAPRVluxJVlPfQ18NQPl+Fxb0
PsNrrDP3VCG/PtH6RHfcMIf60YsAKAWPtljepKSWqrBxEnUWv85jVJEHw9OaHTaH+ffc1UeL6rBJ
JdG/PUzB6EcnGPmdZRAugf6bwGgfSzEBGTTAIOFLFs4E2d9Ens66CvThnIb5LhevvMfBTHWCYEyU
BMd1uoj9+bzzNYespFdgzg1MyohIZLtSbMu6RR3Bk/u3pTdaFUOw04NSiBn2+GBEH67lAP3zburS
RytSW+uyJYRYV3AE7ZHqXzf6aQ4xNbijRDcNU2tNcuDZaTM+jgRn/wK8xnF1bspwC40+3Wjuc2Cg
BKXv6UTJBfOMsUkBBLtYuwFvQG1zTN7Vg0U0zCsFKgebr5mmueI4k5FgizOWLtt4/dr1hbFEMcWj
vq7kFTmiUcuvTy9Yd4NHHD0SEsST1fP9fob7HMpVt9/wrxkgDmwgVZ7ToPB7aiHJpMlEwJUNPGz4
pqQfAUTDqfl2rfMUdv9kvKB1SdnJL4efjRWsli8OBhPOjQBDFNYpSitsjw68hjtS/E044rOEOBOw
suXbyESTSLhszeHePlvEjHBu0poAtxgUWkZ2kyHxB+CHkYdaAHsbI3gsfXHAfzcqJNgpKBAlfA5V
eOK1L/2X5YmkF8MF0RUCNl4zwPTXyGfzqPPGb3/KhzdewD7yFDOtgC4GqBflDS8D7f3dGOYsIN6e
iJCgcgqi+4MX69XU4pj93ipYovhVH2WP1mlN/uxe3OwOjCKg5ogj9gWtIYjpZ1Dk9A+iwlp7rcKT
vxysRFOfh1Fjt7LL46RgHlPqY1IrkhFWHl3fsDd+Sl4l7tsSx1Atsv+yidWkYaidpiaFYBMTv4Zo
0GK8TTiNJWWHmdTkhqeI2naAVeyg3l/vy8QmkhdpWhlisWMZ9nPr+PuMSauZvMum+BhTA5WccpBe
NLsHZ0fqbeJbss4PVQtGRMTDUWUV4cvzETnt6nWXuYEwXibwwVsSGT2g5MRTQ9alVcVUpdcBzE1w
WNzhV7lN/y3vP4sYgZa+e0lyQfb2+tPY22NeGxyq6obUst8y9Wef/syTmCC02SRxLmLgTWjD/tNN
PJSyH04Fp7zBxjKuLLv00bAhBkMd6IjPAitNV9NbejHNvio6xi1DpIF4kLAUoZVGKzGuYwrUhmUl
z4F61/8t3s9rkSdbnM8HiFw5/IHX2E/kRLrZ5rUbqiEw5EOI+s0xidj343Uy78EVUVkeOEEmcJ99
0jQMwUnxmcdzOunOaUd3PwyIjx67Ri1wCjzNPjQoQGI9EtQ1GKypm2WkvmdTn6G8RS5Wnx4G6Px1
x1f0zePZJ9fO9LXraFjB1uVpCOq+4V01C9nB3siihXx607GyVHadbJ0yH1C9Hzra8oyK+oywfxEM
Wkp+FGPIxRJhdjMsVpQYYM64SgUlUEUYrhdss0fe4sHCBhy9auLXDrwiBatNa4F8ohYQ/EIvyACa
mgqugafPfcDKGANlaZjEWAIZCSkgvm24g/TJCBw54veJmUdUNfkrPQqYdvwa6p4RLyKc4R7LVo74
kMzno2g6FDGdfbXIZcogo6kygT174sXFZgj6UnPVzaY38vItcBfgcSKclsColu/Yz/KmuKHx0gi1
hcrIsCcBGfta5l/yoB/ED6DMjCwZitJTwiV/MzD1/T5snWOOyKmt1hMEHk9TRElSReiMkA0o0jFB
Ihysguhj2MrjjepNkgRM76ufF7hbgasJmbY9Hx3rrAjpn5k55498JVycHJiepjeBCV5g6DzS4WLh
OJ+HXpamWS+uY+SZxmfzziM2KLhDg7NQkJXkb5CfsStVR3iA4SeyuhdEBz8c7I6sEoTja8OfssLg
tkpdpQPODLhUVOOiKXslxwkSN2nO3vdyrwQaRSHAVrg4VazIBOme8e2hVK5ISwMYCj3v9KfefzKr
pg+tArV9WuUt4GTLGWVCqguSS7X3bWIL1aNSW3mp2GCmNoC5iFJPJK1H5g5sglDm+yeNqxgDJK57
g3cHxj7NXO2MkI8loUZFOC9ZycCyygFxv0PEg7O0eopOC9DBbkoD9e9rTLCA6wgPdmzGqXflSw3Y
3elm4Tf+I/AECguqXZVHkz7wJ4Po0rCm9S4oyqPvQWAxxCWsa5UFkKZxIfnngXwHi82XzmqvluQf
MKhtxcGD9ltmBEBbL2QZ2iHFSXeS61EXnocqj12BCVxgcX0cX8sOj+TZwPqQuKTGoEkSshZmMeRC
VcKfpOKGirnH3uoHDEcYE8UqCDNCrW2VJGSwKqJAFFlNLYrg5EFPYdDmMzUuQXDyQt+eJsR2j2VE
ycxgr1M9+g1qUmk1on279gziOjBsIk3v2gbQvSpHf4+Nnqx99M9j78b19vznc/GnGMg0imzpwJLr
q5thboIS8s3NmNpQ5y0TbwJKIl04tPQwYTwhxsSjChq5JsHaHpbu/F+ixGeArzZZYVjD/EezYZQ8
983lUKFRhRSmXh1mtdChWJjmYRs94LQo6VlZmL6PQAY7EiZEqxJm4x8ANu3y4qoL6O2ZI+nziUD+
k+sdr9p4plTCaaY1SpeJYa139VgwLw/s1ENi547/gLothJ+0NVqDU6FBgYkydv3Gzd2qZnxT9EDl
kwAKkaoeTeewWATDddae+rTgATCEy1gGoGEF9GQCbbb84aSaoRR6ppnwSQwuIenMB0ubZf4+6D3l
7mWJEgo8BOI+j4hkyGxxD+f2VJTV6J9UyypE3vGbqHmj6gr8UYiromxCfEOoJqj9cvDTA7nuTBVm
AH2J/nkNXzgNBO7hEF+/4E20JYyD+Gp1vYWofJdOLOoA4qfTS2Qtd8Np4ZU3C2I4EN5KR77y5a1J
Kj3u0vbEgrLSQOlZyb/hyX7qC3t51giMgD0qc2XTM3hz0uWMDf1phuW07wwAYNc0ZzuaB30ibRM5
ojRgsFCAKlPSHTr1BGLUUNmrHDqpJYXmq+jhOFcXWWJo99iPozc/JmcVFjzRMg2nKK9CQZ4Itvhj
35TDq2bLgnOcKfflTl5E7iblybZc8Ni3nr74CVctWwJDcrK1+hTWucAGKGGJDhegcXiFlLdbFWJ8
bfWgTyjilic2n7xnbmkryKLbUhRxEo1ZAbCIA2RquanPt/BisnVLxoye2+CrHbeeVc8V1/NT7nNZ
wzbMvVuOuJGcU/My3pITUoYzF8Ro0FcXC4y+t2s3/0THcqRUlUAtu+sjTdmsUMKXs+w9xRT7sxol
Sjx14VJvziVklS13gTRN4TyjXBVlg4N6h4X6hCOCOo/R0cCSfu5PqoLm4iHTFA5+JxUupCdKQp4q
/thImqKYBCZ2QBUhqBXMEiicnEu5OJF5EiDRh5Gju6V25O1lqNmKpAPI9iTwDwZfm5ChaVG33in4
NuwWlpp+oXxmp8Ll5QcLEcdcdD8yiD6Lr/6SQTB3CoYWIQ8e+VhO/V4WR0AmbD+w1uI/21+C7/yu
hribS2gqUPEI3kcwe4fvlqbsBcfdify1XI2srQwbfBxIpFI7ElWaIoLWWykQu7pvJ3YSB3euOegU
gFRCLvaMHQZPhwpOV+25DWPmr5xyZsYuAhPd3PQv4EIo3a8m6T1g4DSlpw17DK/c2Utjj+WCrnwR
wSxpDIFiVP/aCRvxxSfUBECHnYYXXUNzFzxBQjRmKHPuG2oUhe1HAfZ0CW5xR6W/7HI9LQ38VR4+
XihG5b9/GhI2wDJwE5RfmrsnF+iAVESsnV/FHNo4cwf24mUCjG02elk7PYvfTx/Ls3kJcMJUrf1Q
FavQx7iNa5Ihv+tAfOWKl5rCFI5PtPYAKImMMeDhF77FZlHz4/mg2lXI80j8zHOGYGXHdNoZgPqp
Fkg1gAJec/45oCfm5n5vx5n0YYQskvT1V/xiECdY63IGUT70pjjdE7YcX1GhbJqDVJ5hl7oT3zvb
bsvb51f22UpUGUlVycxow4lQdvQZThxz839PnrBi8SYyduXqAOW11K9AU9JvrHydu31v/kpDIy5p
g3b5J+fkzkp7MDDWx/VKtlLYji3Xy8VppvHJuNvAnC1dQ6o+s5+2TR1BjQrdTk/0b8c3xhh5Y/gt
uyGHj2RAcMcv9bhu43dh6zJCxeu0hljD82PUkG9tEO04xaG5nEy37gLgjWH/qv2wWERF4HyHCAS8
QLkADfc6i7jPpf8tTptd1uN8/iXi8P+c8PXlSvL9aUhP5SMdfURqjQRhRVHmAxUY3g4s/wZQ6Kx6
KJ/nFHk/eEb/Ds+rOY7Qp+rIBe//qpUrM8F3pyX4rFl7qr3tWvrfpKJrRoFRYTDCJBqAZtyFStLn
tPGcdS9Gg1oCzMrKatVeiI5Log6LSmeVvKHAYRy3yT/Cs7CFLek+RoZYQdGfKM0gnQW/dkaHeYs8
a1SYmgem3GfZlk+fYootM7N5TKwdGjPS1iubeBjhs/KK7DEWMCg871KNP6M7MPqp90+8b1f0I3Rl
d8sBgmgEbyTwRZiggZ2zouBlNTiMvxSn6/pNsOdPOv8Ff3B2mg1MpYKh01+wNpWEWdG+eF+Gj22F
oEWxX5mbjtkfPMr69YO4ia4vtMUNvQ7YEWaLplTNfovdnfF1zwjqNJlSo2cyV1jagKiWdgkswWgc
ZKd0DYgIgl6/ZNe5UrvP7udQrWAgMMMmGim2IqK4nFgP0tBVx7fTli+MFHtnpbmMUzbY8qUjDc7s
icxqJWvgVumUHXVzs7dUZiNCzdeGO0QIwXOyPOV8zJ2L9uT/t2t5nGZZoSTk9d/ID/Ysd+wPf2YX
FQwh3dWSQ1aQOvRR4A6Y2tv4C2JL04RAKjMKynW1GrXJCxHvSor1/5fGyoJEVdw5P8w3QISXyIAI
ZQZrdWcGYgF9ZV4y3hZSRidCv11Xx+oERhyafowv+HvmTh8vtypdXadkI7UPvoKZKXhDJCOQ3tjP
oZwhC0lmeIBPOblWs2aCTWyI5keTra60ZsVib12Qgy4iyG7kXOp0/31r2WfgM/6QGKvcryn8j+4n
9jWT4pMTJK4Ljubl31BNye/AyubQBBObHda0eLn9dKx2TlcfAkVZKbCq/QCenKYXkb0l5EDiZWhM
TPJ4D1ZtLuoFGO7ep5JfcNNKnhOs4Gp8qC3VeRCNdO6T1Nw5UCPam7yRfMsX4lSWDKeBhV3/dYEV
ktFIQWpN8N6DnclZf80rcCkdNA9JCdGrDwHxCCikicBt8tgrOEtmBL5ma298vuEyMoe7IvA7u83d
YmrLtL4A+L7Di0gcb5YPxDkkvqs/5ZzD+Rxv5t2I4KpE8axj472qYWoblEj0xensQpwI+WLmHj5x
g0YimICLaeoVFcsgMeQ1yPcaCXZFBxngH8+DctNIbTWX+zSZK3WrKK4MQOFQ+G0/S4afYX9P704d
ABohju1Ll/LUv7SVRavynu66ZlfKohcbSa3uF9S8gyjWrhufVWRgIgkMyBv8nOv0zGyW0xgs8WpR
z+xlvX2phQvR8wYBsVxWzQi5GbADivs3rMT7xWxfb6XFyLVLjLzRycWrMnE3g2is2/IVdN30ssBF
o3+sLgvrxZuCV4NUjO79Yxq+4quiZYJTmVO4V9D9/cmqcYpqdtwkdmN9nzCx/hWXjt4RXw0ffd5r
hOlkqzS6EK6wqIgwSnShuJEymyerkepYvi9HchdrCgLdDqHbHZ2Vi4QOxfK6umXXtLvdPNrjTAS2
halsyzMwXOsgy1PiB87ngia1T3/LjnYzGcDS5jyFill6ZqFSwhsq8lgxYfnsWuL5RnjgSvuDDDQE
IMXAwye8olzF77K1GdqPDqhlJd/lL94GhLGdoJY5hcgbf6xj61HsrFkiihmCWfVfNTxUVIFDthWl
wrjuH9RvDOlipnw6zEk9Pg/rd/8qN/Vru691IfWBTPCaNC7ZycJadpzseCCU770/+o/YM+Nwsc+B
DA6pNNiE335+NqJ0dXOXUfM35txwN0oQuePDsHwud7cNkylzE/4kMSaxG1PFCGrGtErT8uBveFJp
Foh7L485YtySpcgeNAdqV7P9rX0QhUH204lyFW7b3MCUIDvIIu73/WvpuaGG7yaswgQxqlYURREt
FVeVcF05bP/AuN7Sei29Spfu9p+izCjQMoMjnsGol1vxbAY/W5GiqPEnHcaHCsgjoyHh57jfW01+
PFIBmBzdPs4j2q3fUbVVuKZg8S27F4lGcIowoir4Zv71gByvRV7li0KgxeAPU5bgtNDz1+t04Y75
5N9f4zgwxsZyth+SCCXOzCSvjO0qEpBdanoyBwv6aEOFiu6bYqNvBJFr04yKUGRmRqHaUBEBr6/C
KBnsWWyjEF3TnOdWdx+86RBvBZ9L/xJX1qgnaFAZ6JSSbcVdl1wBiFrTeQ90toQPmapRQaq4kmHR
aQPCFdDqY0qdWF8ZFQ9cFLg/fAcNEwq2u46tZFE1THTNXcR8sVHYmR3IOYmF6CRotPIA4m/xFbJ3
PDoVA6q2032TInUOcbTgpgeEayfXqeLHqsM60zx3X7atTLROjbeDnSmqfnrumcQgP1gK/9ZGdSWY
DAfDi/c/Z+If9ajVMAmcEKsC3H7aODFkgjhV5CpgwmVWElk2hHVC7okvSyYTLGBc2O2fScMxszax
yKsK9k0b7PLz98jIDgR/lwn0hhULKQekQqh5fnO5kH2FEq5eKTg187Dd7i6XYGYDXDTS2rZ5kCKx
2lTrSqhJRo/WOMnCbpVDf7x+XDBXeXTE6olA8oPwni3QpdKEpj0IOr+dwJwr/73/ZI+3F17TCnwb
lCwNjiHeYkKwopbUB3e38jQo5q6btn3qzOoJVpgazDiHBXZptiaQCdJJvTFnXf1Ggyp6p9P7FXgV
idFMG2ecZQI1PQ/sZE7xjw8i2PVObW1Np1jaCIgot6d5yDYGT3ja1beUtf1xNX8AELspjBSQM7Bi
n/xRnGW3zfctrEMKdAkRKJuUehLpv0bJSdNnFItUUAeSOaPvVuYhXWGtxg5dG0N1ATTnCswfe5b0
BPMQFcZfcH2tVybH8y5xQrx2p3Hdx8CpzovCwvBhGbrpPk4yJ8BIU9DJ2xU8nt+RufVfQ43LXIzf
IyPnFW5L0hiXeSpocgLVyKT+fGnzbaAywzcrD48qLsrSVJCxdr6bhc2UzFW20k4NjpIIWmQePHXQ
RioN3dE9WsPvzgMaYjb8btR2HCKJgMzJUiDdrDbD5EalkY8OnmnKphQHPzz+rMoDmVPmso529+6S
r6CFxtE6FthJBdN8/iEi+l2B0UtPwotBwPxV8F92H8mSgz0Z//T+UdHB8y7Z5vnLPcSOPS7Btmz5
l+l1zM265Dhs+P91QnuwDK1tyohag+gJ4MiX+zXe48K1QMSt9ct34REq/cL5lPdnXWWwZ4GPpCwt
uY7x0yxEW4/ggNc+Szgntp54VGTW2kmkLzFzqsmyK6vK0i4inDYnbN+3KOYmL9DsyFPyVc7CRbMx
SxFjFD8ZvptwYJYrFKQNxiGwae0Wh2S6bEe6TO7I/ZW6cU7M4buL7ntU+XajMdihN3sPEMMEi28I
hFhzjsbzOwnRZdYdZ1ldMpkd6/FEeKZiQWHFKHVwQJ3i0f7tJjAXJ8VjYOKkvmu+l20UZCGQ+ma+
d8W2vTfVMbbNi+bPobS/jUWhvXnQa7jnExZNvlnI6V1a4I4RZslX3Xe0AVvXmsRiTFtVZrGmomed
3yEnSG9I9mhBZrUFYY0kkfpycInGr33PI5OFAllUWuvl2oSqQqUrRAmkJIot3gIlx7vlfb3xppa4
2mWs9nBdpBd2xvvqI6/GX18iMaF1alFk08oc2HKF5PCAV/pYvsP/cboT/apRkrArGrsWAnjBubUO
INuf+yvwjLZ6xSlEoqjnth5VJ0QosCzb8z4uSO/gescYPWFNPUPyGAHK1nw7RFYZNR9AFBJ/Cvj0
/Se4fGGwV/KITQIJ22NhK/WTmf6Me7cPFY3cMzdYv9fH2o+IaojH8I6QhPUyFPZknRHmJncyX+hW
vn8uizW0cC0w4D4eMsdgSBgJFcmMf0L94OFO/OguthFCGe/Hn3suW9Qb/a1LkHlPH3X6YT2lBUKZ
lkMj79TNpCBoWO9ulzKa0UmHJNktycuOVndkGQ2Z/tim7SstyiClf7vVyFvtEqNXr1cdfY4Pxerc
3oDIji4nJq3z8Z7uFp+F3xvyz2eVRncHiB2RMLh29nxwSV5iOBlve/dvZjjoViqBwj8B9Zn3yznq
nSN+OWtMaT5Ycz1sfuMGYuSVCqwj0wrctkv08ooBTWHH4eLob2IRC9kygReRxc3uiLExpIdbsGcF
L0jWe4KADuXEmyY8hIUNUFeCQZNlkPDIDa2WD9NLcH609wvy1ed0XHE66sF7wn32YLA5LNjgzJvt
XViAv6gyXbSnSdxCU5t9QvxNVr4RZBOGnKtOx6EnTYvbM5CjmsdRho/r9Q4Uvxl/fx2Mn0kHd3+P
GnsasvF2eTImWozhMwHjvi/Z3rgMHejJMqi6C40lUuHY5ogfIB6OinLCDGXsRPHOCmnlXckIrQO2
P0gwmb0SRy+7WCj4P5SmyezI8bqlgMpaAvPfg1xXkjIDIdJTDTs/kA2lvkE8In7X9dY0j3gv+mSt
QDXYVWAbCdH65N+c29S/AgZtuAnpjUl2hq5J63a7/4oUXBkTPxlj/AmbjReVMFNk7GqG7V7oqMSo
VAkSae/aWab409pXFN1am+kOshhBOBkZH0xe8FkLpQjbdxSwBGduSdngaYZsIVg8mdutaeX/l17E
P/gv4Xj7C3Z391A5jhLFyF6GedA+eAfDmPcq6uolM1jDKnOyA1y3il3bRSQ+mBdOFCN3sJ4ZFaPL
A2iMEK5CUs98ATg+jMGE/eAj7cQ256YG/cIcPMnPkis3tJLlsR9dkQBlKNK9Mrjifqu/5hV1sBFx
bjMaE6hBybQmyCMQGnQc4xQEx8rlJiMKLRzP2VnqKvHVMoRIwkgHJdqvpqDYTA/Wb7fGrbJyS/V8
oeu9zqL3/2muupd3jYCT/5SSEQSs9jEjgMm2JI2E0wT5JPVkOOErtwDDRkX+TZxwcxk9OSu6rzfj
2gUW3hoT/xq7O7tZzzBCeT2W24EcA8w+dhqYIiDxdwM7KJnocqpOrDXbgG4f35Y2dburFzEkOr7l
a92wPup8j4YrTrfEMAbmDnlXAfDJ6wOk5lJKbTkwHZB4plztvlqBxR9y3zYAQD7a/ikFH66z0Hhl
Yq8pzEYxW9I7F1A1fbOARMKS5pLBDv3OL6bBjQOHGqiBIJiZEyKsXvukNGBbCR0PtTCpzNvNOIpn
q9Kr/LCKeCA6f3rzj2hR0Z7rZ5JJ8VfCc05RJ4nk16W2meXu4c4W+69syGBon5Ri+mdXxuj0lclE
D4s4dSrfZczhVoNVhqb9ur88kwp2HwRPW/zLAct14H7Ql6rQC200D9tdH63hrv9/JCQYZLO7MY6y
qWQfRnQCxOjdKOqsLXZTksOg4ZExroN3ASpI83D2rqhOyJsnwdtmTk7fO1xhtPK2ogzlAWK9DPd4
vNT5kTbEK81zzrqnhgPXkfHgldAz7P3BnVMeZOLIARqtOpvCxgl7BbNwlshnrD9Y3HC/a8PUD9aO
nDucdaU0efUDl5weJSN+YhhKB6onizMlw7ePoykJDiZtEodLOemABjp02wctgNu5IV7qg/VpRU4+
8rl27oLLW0ZnyJP0LFEtxVtIHhci0JhTnazol5J56rsgt9PucrErsiSfOV6W1FOYpsMTzzkeTnD7
+3KGgxNZIwBwF5QBH4OYVSdy9aXTSYm9chW2vBxy+WvSDDV4L8+3KxJ/KhadycYBsz5m0zjd4VCz
UJL9ahOWF+I2dCHHRgzQ23m4stx+sfbixTDU7mSWteXciqlcSOe+/FO5Jz9ymxP5LIg7MosuEWV9
Opz4piky+lr42PJttbiSo9meEYO+0Q62Z+u4DSHUW3/cFCbxBMmgCFP/XKvS7yhu7hDqFMEIzrK5
1b2HXMFv1gu65MmawKwgwG/1be+Qy43R5WRDrxK7NQdEHY2QUN3W3qpsZFBJR5c5C+/yR7VaZxEi
limi4Z3n9gxYhQyYyzLinayXYCDK7qvT+bb7hCbgsKKoKSoOwQ4+SN0jMTMhgKx03pEW3h3Usu+x
0w0TTwRacvVtVTySE1S5fTpBeTbuoJITBPsmycHpT46VHDHnhUXJwZkiYIfEzx5FaqOf4IGQbzxD
5qGxxTv6w0Tmd5XsXhjWa8YKWv8X/V1ub8zpc9KrcP290Sv567UyXoZ/ndW8dSbN0AfjVhfOEFz6
aNcoiifLtBYrqnxZnA238rl2ygerSlBEvR0Lb7Np9Ltn7vmezeorJf3ai93QH1uEJWGBpFt+1e2n
eUFPaRPdb097BTo/BccdURY2kFXHPbA/WJ2XV+Vu0DCbUFzIs1JoBosVux+T/CWIr+GdxG8kA/zi
NUAviFOIZutkrkuUMhc1tr/6/eMvWGsaJvWzmRNTOuapaXFQLAEsPBUPXWWTtJvS2g49JeYR9Rmx
sSTY9HvgrUYUrDLPMslfmpTN2LzDpEMCSYVauT4MQo05TCzH/OtVDR5O6AINgCjstJF5tnvGVoR/
ViCMHj5JjK3HE1Ag9eY95p4+Cq3QaQsADupysBT8z2x8/dDDHGbqrNtom1T5KbjT8QYEHqbLLcJd
IZQMfrfa6yNZCNQIZKMG2TiMRZx2S3WR8VfFlhHMtlFZkJM8XYB39ns191jzo9lt9414rLBORDDx
Jpz361yO4O9y8Wi9vY3ge33ofGLqI0aZKmm6Pmp/kWu7Gz2G5p7Zb5v2wJ91eKE4J9+95b6BDARA
6hOXh+gJnqrjA+RXnBwwMDCYO6BN7CR2MjBkBA08dJ8n7Hvdi6uOShsCubn+6m4PPGB2J675jkuy
Plbe++bXdXrbGS9yvig2x62W/DA8dMzmayi2qWTrLWDj3ClXUQsWeXVVaIDCVRFZ1CLEBpfNSd8L
TSStuGQNL0rYMvLERE1cv2O6IHcS9ZjUvDgP5Zdw+vDQGX0PvWQCSHQnjfyOe9rdWhBeYBkbhN40
cyyfCXitR4nBuhM+uMaJpJu1tun4LLFX8XnRt7yyqcQGwJ26kJzI05JjP0RtN/sRpxon1qg/7N1u
xC+MrwvCHJvCIq25TkYoo8zU3DkzKxGS6mt06zWZ4nvr3MAXyrHFZMowoS1sEXrC+QlhTTiW1dio
wDz6j3Ydg41AfmSMz3ggMACxgAUu0SEdd7oTRF0PVzXQ/JpM5TpOlMJh9AIkbylgztOoYA1TIEGa
323dwXVwnIKY0D7PWS7U1iCxJV5VKVDiiyCr035IrQZQn8XDcBTjvrPoOJeL1VhnyJt5h4oKViqs
9d6X9YNjr9feY7eeAD6FKmV1oI1OpVWE4+pgB82YSGvkHJTVdixKNraJEjh6SRr/kNv+4BH4KlDW
3TTdXRNXJM3zGfSId5BICUTqO9JH0bcUkhnkqjgTrX7gv/LjN1LX4zCiSoPHABMPcO5okv5IPBLZ
Mybb7kd1OpKrfcU6PvyoXGNy1s5HgU3sfYxWLxVqAjyHYlaeguA2jOuW0DK5ul7nNEjgeL4o211q
149k9yuwlyx7Bwffk0YYeoaPuSH7aEL7QQmO4EHUAzqxcE7j8EFZmn3Rw49m3LDZxF4aC9DGjx2a
0O4h9r0g5RpBGxoirzhEshF732SkvllffDPaSDfHLNbX1+lFe49rVLKe/Ac0OabatLBIqL8rCu08
iN/Hhjga/7C7AWxcFjhvGKXMGhxi2VUjMtLoo3WurYW+XsXp5yziwfidMyUiirhEzaMhFRySOb0Q
Ggcf7yL8RTeh2RV790ygab5GdqmKNgNuF8lWMaR7dq7/vq/JJ4XQ1F+dlFxB9WHpwPD+lJgP5gjk
VT9aZssLB1e07jvS/Vnaps5tUSKBvz2qd8XsQ6Ey/oc/FWuaBuejGBLaPzRfG0NDhpUsT6ZttjsI
AAtj1hE1+WSqwDjQHweF62cBNTk4APPAv5JFZYkBEIVsTBumksHc906+EW3N7mctspokmXL3cro7
aY1aMXeoRJRQcF1MbrlT7w2MLLrR19AmccbKoyvTtNBSx7LzPARrXtMXxJKyqa+BXhhTBWmy2gCH
w0dVlgvcWrZaPIelNBidyjgKn4F6GOe+WsYgdltW+eNmYuLGRJioj1fTZEZqRqCSU24v9gUEsVNR
ZFGN8d8JI4ukn97YnrVIOHjQZ4lnGlKpmWcyJhtABRXWQqDfy127ZOvmxXKZvLaGnDjVUh+MMwem
Db43JseKIj6/t2Y/yTUsAp1PvaoggsK/Av2aVNDPEPQO1/pta5JO/dVkEM2cE/DGoZLDlEJ7Z9ef
RrTVZwSl80yC9YiSKxJqhg2Uo+xQI9V9vRvdh1eImndv4pff8Vr3BbVk0y7QdeGpuS646m9anANR
+bmEOJX38JzCu7BrT1YGRsJEBmgBD0rFviU5eDw5FN9UJh7JfUER2eRctsbXdIOzXNkmPM05CUsv
q6nM0Jhk1i+VrzziQ9r6jxcn/z5azaECPRp55zqTU1mJP3vfg/yTNO3lnCKSqCl9cbaJgHqks6Mt
7TkxTQEsHAmP4oqUhZz7rFiH+G5RJh+MIQLIG5CjeM1SOvwlzpbkiCNpZdLtAD3qQECX+78AKFHP
JqdyCfVp2OLSpYZdgX7F+Rel02oKjFS11Tl/iuDyUWOXi6me9J/Cp6FcCezqX2irdogm+DDXx3hW
CDWkDUPo2fAYJzxxI0/fQLoKOdmNY1jl26oIHCMPfInnefTzgbn3QKdulcJtgX3FAiEs6oA+zZ7f
If9yj3ze8vw+XySZwi+5zvfVFHHgT0D9Vo8Y94sfC98sW2ss/571FDJfP/KJwYjELUoMf03iPyyv
6Wse7BeRuRqKNXaAO08DZVeYMSzz1XycSN5BdOewePLy49sLTrHE7cB4cjkDNUhQny99g+NCicQU
nTbgeJqhyI6CtPyJVe9sMj6oEC351k2+TNNNNT0lX39ngIlhs9YIAejCii6itYLAzFMLqO2cAnv9
CUByaj8gOngknQhzJh3Xni2VNs6h9J5KTWkSQRuiGx6yxWLRJD3Vx965TjXjJycZEcf5VPmisbuN
Gs9oYxAfbZPnkpggo9/pbJN+jl8DA+uDrL27cktvSFRah+/0d0oDMKd1NSxSb2mRpIpu7Dnf1KvP
1Pxgwc6SuwoFLqR9FMgNgQNA6xIrC52TqcrD2wIZAdYhFOuvzcAFNsN6Xi0zGkOGCgrMDQAD4j0z
YsWDNDZo/FHnRkiQvdLZZU+0tpcmtlfnnkgsV49gCfUy8wPEDiNQqKM2yltBYOgCrNdFt8KHjFOz
Hdq5lJNqxCtesiQGEfzoO/gCRSuI402zmFjxQyHb04k5LElaYhA+ewtpEZiBqU7COJMCwnOeH4A+
IMTrooxUBjZ14XOq+QhaDEPN5PGRDj6pKp4JisuBN7hQv0mk/qAa30GHCxwfGbBdriNeXqh4+hCR
xq/EszJmWtZgD0Gv7BHZpgTp9IVRjxKkvXrcijTVfAfIelAXRbel/Emq3+O4At4ihcX6Fkc++g+X
Wfx9yYZ59zKUlKoIhzvEb2vOTSvIgm3+OPTwMS40PscBjdNrRid6GFEBexhuwnNS0MjNSLmCG1O3
VhjVLL7iVS9OAmaWLtrnDbyZJcwEDpjerVl+szRPSFqng32Djb9XmL9ktLQigcs9val2c83dLGz7
9Q5HVbC6vus9kEzEPJwdlQdXvTye3GIlGeibbER/akt9fZkPKCXyGt2xKrqHLIC3BUqSY/DpEeY4
Z1cbXBVocjmv8j4HR0n2cHKocTy510PaQvXNIesTA4eRtKmwUsT+i6QreAucw61F8/7b3G9zcWGO
28p55vk3YJipTY1ANsn7seUi9vxJ5zLdcQaxaetEkn6YLvqhC93zPB651iHlfRMO1G4jk5qAQ2z5
8gQeiqsink032Xgn+zQjJYBZWiEEP1U9Z7s1EJ5Ab7EG9lEpF95AfH3SPWuFgbYff9e/OhTU8QKB
nZGPU6xfkIPvx0hmGrGJ+CYDXs6vO/ygMZkta20sVe4fopNsLMAIsU7on2MvTyeHTKhMdDAnkvlX
XbvAabGQhSQlRimvF83+ngazAhsSxA3DKZ5Mc+rZ0Z1YxyIgnHVtG2nsE1lqWAkWrxKBltjPi+48
1luKldfV0J/dAO+jOijfkRAkMhs46vh0d5/IIi9KFAUlYSfER1BpktBxA4E7ipOWJSyhx/dA0+9S
AsvCq/ex9pAlJ11h7UevwNUPcj89/5ZJkPpRnLVRarYkmwqgCRAoktoa4BcuwSvq7kYEweu/Hm9P
jm9jjvriWVvs/4FlEBtBwKz9cPRplL56hRj6AO9B7CoJ5OFzaoXemokC06wvEwzy9QVx2S3SuYFk
4Krib1+QSS98IbLJquuPME0fmF/Xa904QpUgRJ3nRWPXNMxcIKluTQScJkrlC1i0TynMu9IdbQoO
9BbdN163n9flLmhFxJjHAdgIAjsaFAtRCIPFsMVq8KPTtz4zJkBr9ZlAgcNWNjlufoy8Q48SCNJv
P17lRhaRtZUfaol3S/FzqazwYQBd5mKjVxUvEySEzl86x7wymGkaSLUgUkFeQWzEswUaJbePKqaP
12FZkmvey7H/2FLqPuJ+vupyQGVcJvy/dbW3XhMJg9Lg+/sbNTytCdWsZJmp/5VgvceJ4d+lRMay
iLSHb6ukLJvsMy4tjn+ta+ftVBMFkYm3d3feVnHYDl4oCGt1E6tw49xsNgFxPO4ZW8gwI3FaN0AC
9iGgi+dntiX0iJVnGcFYHiR9G85NuNoolNp3BDGEhaTKi24ZuhD2Fgs6WOgsrbiKxtQx50Beh44J
uWtUq/dyL4wWNdYKebQ4ky04eUNkMqZnIRd3C/vP0YoGVcMO9h2bV7e8jPieSoI6nKClUkuzkiEQ
TEbg1IBd8Z7yvhEHp/zP/BZLxjC8zWoYXlK14dzj93lMoXSzsiHQJLsaPtqG7BgqWCzRzRNjIffh
9Kd+lIr3mu8YTGQ/767jrvfqo5VjGelGAQmibSKFtaRiFN1PfIS7luSb+chwuyrztqPGYP559OjQ
J48bEJFJ12dAglS86L7pNbuUX45J0VYBsQTNDDOD1JhUBLPQMqIDt62JI2kQi/IxB4MKxc0DjYQa
bEklZIG4WTQC23CTrIRF0bRc0cA0PYEG3Qv4IsAWAESKStBn/QozR4s5vAUm200ss84GwFD7p9EN
SEAYmOxQ+v6lieQ6s+FNoT2R70rwXue0a+1YqqPYL0dsfcKw8298vJ2KuVE4hx3OBDFGKDDU3P0p
jBOv8R5uPYaD5L2WcjiUUe8OoWtW4dWXcSmqAoqWCp5eyhygzwLTRNlihnW3DhMSDmY+5h4XNMJ3
dU+MKwLDnOGbEF7IyUglT9nsY1CeBeN8yVQNSyBl4I+oGQXKwJ2G4Ukv8YY4nZM6H7Jha1p+dgnW
Q7oHSCxRZV9z2cnwr1vqSkptftiDcOhQk36URvmdDE96LMa0hUAxkYKk3SR2khehip68KNM1/hA7
MGXHLdQhD7vk/Jmwv7LcoyfqTUXrBvr4cKtIvOvIoNuHDTxn3lgIBNbppLueWi3uYYFsLs6BEsDC
lInqatYpfhnJ3/D0vNdkQCw+GfzTxAQ2SmPi45O6sEN/BJzWRUm1Tz8icBsW/OlNkFaS3TdFV5Uh
K+L3sC6o5T2eELQpV3RIr5rtVUeWY3D4Vps+kIkkD24XYg32VkNeXvHDHSo6MjxjD6qbSMV/xV8D
GrcNiyy8jNdqeAg36QRiKoRCF8Btt9/F/rofdduIw1JDfYMCxGxgJXlt7ME+5UnyGjRaAJWCvgGZ
w6yFkxLtiMV2mRFAP3UqCK3VMqoBlKHxI6TkNi+psBVqISpWtTlYqgn+PK5K7fB41WbUMFX48lit
XpCm2JPbJxDI5BZuzC6+8KQUBQExsd+HHbZHzf2tQdZ+DAW1hU6/2K/UTkuiV/xsQuqW2F27Y37r
lz6GEa/BgdWnQD5ECF1J0LGJK/NwoJBg+Fdw8aGZG8gPODsFiCGVDDA6bp5jsTLQ3IOYLcg3PtL1
QFjaaPHGjtApTNgHZxRMBuUFfwkHEXywNfPpNEZOPv4xoZiRWuo6G/qrr0+H9GuXWkr9rZ+coNiF
adzbQ6oFthK+IpCAhBZqQvhkFk/xAdMSNm3RMHCOWXPz3Pi5L6nCJL9rLkFJfWtB4BMvM0U2acz3
SIZjjztZ1rIB1V2LCZJzfqZXX5qp+CuPPTYZLi6xsfQsolAjYTwNUJVrwXoE89cn32lotgFtP8oc
DE3tMEMebMNg7dCrE2RCjRm2R0Dwbk1QFx3KE+l2YcML00TdVH9Z/60zTonYAAH6m/4hau9uHyVp
NKviyLyHBoRgQm/3CQfwgRUt8ljPmOrX6kOpfeB9aKQTqa06rHPW4xUi3jywrgXHt9V2LLKt51cA
yaNoY+WTs9/DjUcWsYrfdDeZPJ4MmfO0GEwfg4Azlo1BeelOj7MqSEeomwY6YKNb6cowd2PGVCNY
94T04v6wDZo4aKwcG3vEMqY4XYGOtGLUa7XrS2/tDCh+F6TbJ9R+M5WdFcNF91bRch5n3sI0AtOc
4KrkAHhn8RwVn8h61gL6IZL+8VGEKhT5HeMFuOP4iKWV3DvRCz4wi+ws+CEC/CkoY3UcmC3pGq3S
sDlSX4uLLnmeY3bFqc9eULjCbMqHUZGSiBdz+fLI5ekrNgRvkCAOWkR6XXz+9l5/PMU8aiPoVcty
XZ/8VnsE6U5PuZML9LCDVpW9i99pHhnxVngerK4VqrF5nnItLd6edcrIRwxhElB2aKEtkfYJiUth
09zVbBM6BeTaV1tSaKaRRQD1YLeQAwW2DAR2JgER5UxCP2slzV/hHNqK4o2tCeku0QL9wHxsbAjj
esUr0qP/Umdip3XicIPc+yyckt1IttzrcOZG1xeBkRGtjwWLDiUyM7nRluKgSLX8SGWQmXQmLW0x
e8l+pQeyarpv7ql515r8h1YYH272obkChW/mTR9ZIs9nVcnnopPrF/RNnrWAE30fOezHtDUECO/8
aMOiQH7rLmHAAVN9m9zblVa6fV5QCbdgIGAgQecsDwGSv5q+6hOsRo0ccqPSy9CWv7fvd7rJpZaV
49PPMXayiS8b0IQzf5YUgP5oM9H12lbRn1rGkYYpLLY0aU7XV3c4LVmdFZPv7x7uBRes5pOH45+t
m/sdVmWyPsBsbd/oZLlVsRmBgzi3SZ9G6RS9iJpPCd6Vmu2kd/YzP+Vz8fLXTVhaUWmho8hzXSMt
W+HxYfsdG8GEtl/f4OwRmHV5WQFpLeZmtpUfhs98rGIQZ95ow/pJ9vFBO4+tdIXIEWfYtWYv7yGN
YGBd61R7z3NUFX25VwAT479MpFZ/nd6lGrPBV+hjD8r1dJUbIbWpn78kn76QiRIE55fO884rtJhN
46ta4b4WbcBIqgYt1Ddz3Pjd0nt7m9tSctjPmECYO5gfrjZrHy70/CohOa9R5li2X7xLmOsgCJEN
WhKghBjA2i+/RaOsWDgxCOQkL1VrUA3T20C78Akkw3GGRGbrDvBDfn5j0OX1rJbYOMwweQws6nm5
Z/uFM9L7wr/bH7Q10UM94Ska25nzwfYjVzydyCG2uJNQINPQgSrcCLEe5PdWUVgwNJFGFQnzC2B5
xzUp7ohJAFoovB7fWE3+deu9XzAvBVAzMMLNNx+W5KnOJAJb9YB18olq81jkmbshpbFPcidyeWbe
96bN4e3mdh9aL12Y7SN0jboj0/gttJUB7S6CYC7ZNhuEuurzS+OacRPp7JUr4P3mNSfsycGvBOKJ
TXYzgO9WLK5w/ROULKyLGKycOy85Xj/A6aed/oQI+5Mifwj5FBE2zCoYczboHngQu8X3Lnus4xZi
zGG9bC77GbVIpX6Qky5sqvF0r5jNz3eoFAudWKDbq1Olc08z2r/06hTH9Qco70xarFsnYgRdYdDq
PkitYx6zFmStExTAtzzASSJHPkMtu37Z2/u/CAzM6+mmCjuq9FvO8GEUSSd+C1udhmgeXSC3oBVM
fYK/Q+HvOlmsPCx3vgzLTMrcc9r0CzQFfUj1+QxMEmPDiSV/bB/0w/biNWugIFBlkWs/RWT2gEYE
LxkF7+n+Uf2kdvqPpvSKXKjRt2396V7h0sU/37R4UnZNXoxaiNy8wr0cYZgTMeRhf6vCqsHAhxRZ
rZULoC7GBII/Usgtbe3ylHLAfwJEPysIeCCAklIDrymrLJs6Cw+Vskn1reGhuLkXtCRIW8dj6yw1
UlrWXXV/psWglVlAu5/DwzNz6k3RQeRKNrniH2MVvhJCYV0VdK6wv/LqytHrjohB58lbhkqLJh/p
fJJ/i65Qs3KnXLmYYe+7EgR1u8sE2A4VEnpjq0azUQAqafD0Xb5+4FzIW7kfRaDobXiokVz3swni
Ep1ggkxD4k8zbaIa0jY3xDeR6wkK0GA5HurUBJXc4wZ8XfimOjYPVmZB73Q7lMrrl9Y99U+6vA85
cVvpxl/hMh07Q9yK6DENfheiW7cEUzx9TM/iklslpKQuFV2zm5j4uy7Tq42w4U3pN5f2XWmgpNvo
bxEFsNxv7asY4oyZYdvkexsP7e1wIPYi2M1JitwnE9NEuF6CJ2FTZEpxRWgC44TurahZQy4+reYs
VmpiCuMeohdKFpcR8KBmNc6BHnfZjWAPvR9PtUx7qdp0iF0sT1Ojn7UbN5nz6qzZnlAOnmh/foAn
xq0v2hSJOlj1AUC5y/csZKsfWueVDgZaVgB0gDyFpfKl7NrxbC/vAUNPUL36HZLjA32BE4bOYdRf
KyJRctyJuS5dgIOuH4n/ddkcXGnb4aSOmZcXn+EDNBf5DJanwbNJpYSaWYvufphwEuytt1b4rBqd
4xmOaTGH1kTpfky0eNut+MjMzPyD2FUvmivApc4Ldz09R3lrO/1zuSXa9/C2t9/w8Wvu0K+8kA25
bj2pzLlaJCNUJ7ucsSJDgxqkPtVO/8g9VrozWbvaitMlpcqRGsUJWsFtl1M6TN+hmPRPMYIJNRGg
h4YC0KePwZ9dCN9aDVQXH3b5jSL7VKwo0f7Cdt0dqOnNFu8IIXqsELFAvAMQrDSlzufrYjc9uYgl
HDjRMBIPKHh+CixAasBlYWjMJS/a4Ncgb/ePN9U2ZdjdaGVzFrePshjGMRfkFdMMUeOJv/EgH+DY
uiMdmhd2XzJ/M0N4mnokPNj5LLieexj4yvTlAUrKGTPWin3s7uRnkr0Fg4V4WJLk2zScC+jB9yc7
tr54W2kb3j2Nuxf5otY2knAFzevV14ZaMGsWmT9uz5+kUtNg5jLjJqm1KWu67sl0Kqx/jnjP6syD
QEL6CR8rjWVei30i23YMMxMPVv1OVyCkrBnwDmK+JjwQB4tHmMyhWTKAK1JoLO8/I9F9SJMAO1W/
frHnPJz9Tmc7cVuMmQSFoLlfpXqB3VgBNzMWj3Utw3ej/Lv/UaRs9gmP/NihB/xMGbkoHR2aSbfB
6iHKVGW6H1GV9u5KcTb1fDkm6ad6PVO4syQflK+7JgBThWAG5JhSZz9De57fA5J5A4Xk9EkowbN8
f8V0S5aR30EURthM7JwG7d4Ym6n4y6nWbrdDcaTBnvdRD/imd5BksLTUNKmFvuyjeu/xRJe5ic4C
II4dSAJ+R1zVCnQyD7E3Klnrx9GoCLDptK5YwdRbON6Dm/en6L3DBCBeEbk3WuNE2Lw5uZa+BSad
2UWe4cPjZmhmEv6T5g12PIJWNvdZgr6ozcBcmXcn4O+ukWxllQxKp+fSpLHd2LVLYkjfqJDWUgxi
PrefCyhOWSecsKpROhLwa42ROwSe4/raUQH6m2r0o7aNs36fE2vbm/50qR5DY1bEm506KfCRPn+5
3uTfYeMBH9mK5luFqcKvK5mMKvv3XcMU+vQEP+IBfbvWpF/o9Nbpmim1iItX2Ix2Uo9/aq2vNqEw
nWnfoVXiAEU6aUntcOYzYOUYe2KfGKHNABxV0jBijbS5tg1i3CybyCgkqO60/V83PEEwGuz0Tk7g
FpzkfGHNCLDEvwDlhbGazXijw5m3yx0GMKdAkmkzSKfPaI/Q1RIeF1Rbhocxqwi0jz2Ljf3zW3oP
eKR+NWVCHAIRZ0EjBt3oK9NKNRBJIFTsPsyTZrCxsq69WM/RpjGU5SlmSGMYLNqk+MD54cG486a1
UVBgyLSDdm9s8+Kplrs1KSxv+jTk2ebw2hLhUYpknFiyO5lHxzFnC6k9LtK1UzLpLGD75cQh9SGS
m8cXxfdDnxuLemE/OWqHLtWtl6QbKOHtvg9YKd0izSh91Wcf82ZI18jQsAQ30BtsKp+BTJyJlfUL
m41v4n8wQ3x9w5YKyg0KliAmAPjODKdnDFh6qHlm2oJiA+xLDPkC8/wI51eWwbN9LwWjSLvpwiun
El9oAJTtDw7pADvGu6HEHnuMcgRQNSdl/pIosSvB2oN2Eg7vvMCVDmN1zYh9goh9epZ1NaGjajCN
Vl/uf5B7VMYdYKAzfGKUAzOuKycQdKrtaKkT06aZLDQZ/abVdr6ud6GRvItPfceYsORHkw20J1HI
bNJgepOJ2ntAwf4Ltk97GELjEwEo/YotueLUI3bd91dAkWXpI0yzFNQfr3vYKmMrHkh58HitlGKS
fWIVaH1eKGfddiYyR8eCXaUiv1CGueC2nz1JgQUdQZZPup0+l870vR7P9n5NqmA7Sj6tGO4pT4aI
zuhwGMp5VueXJXreq/Ic8coT6fSsFiUx4I1kxgyMxqMr3Da6WE4KQ97oyPIntbTYH8jXrmYAk4LN
A+EjsUQka5w0rZyoJS9GQslLvdhUBscYSFBplggf/ZqC33LNWEE8ZSAs9JBHiLvsfr5ZcZ30QxjV
JI3V6++3awtHwXW1pPlbsvhwV434HjnE50tq9lUSEcaF56ttJmOHeelAcJIhFy1jO79z4Jb5jISH
nn+tqFSFgthVv+KetgtxstMMX6M3ql6Lsb5Sa4CN9mRlpRTI2qzx54NtpSAxg1v0waHwPLaw8WZV
4kikchUa8fSV8tPG5ig+c/qPR2w0NbKFSdO14aLQSRKmf7XH91Pf5hJGTczKcz4v67RwGpnP32Xp
55oLt10sTc6J7MpwLZJFEx0S3G6X8hVw4BH0D8aDkKn+IZ08+2kZ2kVZIBd2VIE+RfY14T4LXREX
13K76GDq3lo7Ke3THhNByzqMTn7XnOTLycjBaW6y+5nrOhRHZYrYwHNDAy1Eu+Oyej+LeQyhW/Vd
OSijoUpV0oKfj38anfWgGPTetWklxyZVwkUPB5JfeKxKmKXXNw2V5TRxBbw7kvylcleq5O5CTbbV
qkFvfv3CYkG3ZCJAu3TfyzZ9azJvjDeSzLhycYm532lWk7UVcsAxjgApHZl90snE+4ED1zvRMWqZ
/IEUJJgB3nv8lmnLIGiXEddyNa3LfVrBmx1nCsR+J9N1xNFzztnoE2UMF1o2wG52kZb8mtD2uCdr
LpX7CCOEJqjvsFBlxf6XScvpPMw+4LYcMCn7UwKbonW4hiwxDWQ0rrIlilS19WXSxU3enLnz6zpV
puXclOXlb+gdIVmIyX1I52SEQvpZLeRfASfTJFpvotmDXbC0eIYXfS4lZcufImRwJJ+4hCq2+qUL
3bavOIPUt3+hHJ5wqaudOFS9s93Uy6TfpYtQ6HXAy3meIBCEOPRDfssZnqcidwdVVtFGMgoHVXgj
keZ6bCLr6cCKrte0gDtOZ2lxTWlTUtxIapjSQp3TWr2szjFj12n5i9S7WZWSmFvzjCYVZbGzwiOp
em3YBQxB+UdTse8+SY/ZlH+wnm1WwkzmDPdi7Z/lzNT1Zwg9pBj4e4BqScU6ZCs44M1Pyo8Uiwia
WFD7jpH1KpaIfA+2IRgiLlbcasVvVOUtjN2aqswY2pO++Ort0QRmyhpCn9Lt/43PsY3rBzyqbxVh
AJ+X3a1yas9IchmXCEGfbcTa6Askhhdfx91u+q47fG4nr2OwFStMZoAnKgD1Mq06gV0ud8rzx0Nh
NEQEhIJHh6NW1ChwzDLr2i5TEh94MNVTRwlBK8+ivM1lxoRrehvxQ8FCs2Gv0956NODQ67g6/5sR
DMq6aKhMfqN4IizVXvjpHvvgDXSJzYxVmBp5I4jcg+EGZ4TjJAatgnt2cW+GKxnOyLk9gfVqhNjA
3CkjxFIyZE6FpG6uYj1i/lAUMomL+93rAPSFTNwWcp27nTc6Y//HrqFweyIx25IbAJgEFd2W2yLM
OkEbph+K+QqDCjBJ5oauMALUkRAORovPbJ618FAlZhoIOCMStyjhaiYDi8C9fZsESuHJ4ZVNDtTg
ck2Iy/ghzwb6cWVve3TMtrKqMbxwbeXz/bwWvwI8jW4hG94K3NA00P/Q3VfHqy/Ku8HcQxzBexrl
ZaIAa/swuwh+SukzlnfihiiGu5gwosyY815fOkrwYfEk9knWme7HWcCAzJVNP6Ifb6mLii7WeeN1
Td/8KQe67hIeO7XDVWJgIlgS5mQoF6g3RTPqESdEE3A9kefW2c6W5y6nw54Dv/PZjZMcrnhBxxyf
osiWwQx4q/+59FBgu0Pz809iZ/s5trZBJV+bXTRQ0us1zZMq3axOqtdd0PyiQZmL5ThVq1WMnnma
+jtw29EDk9skuvNXG/ih/A97LiaycRh4VzuaAacjdUno0kT2qQNZj/OAE+o9vufne13xuFkWumZn
AN9/wOe8B+NlG4PJWJ6YGviAvk3S3TRKzT3SD6v+sBs+Ve4jd83/7oYmVEGAKquOPPgj8H2ig8Qu
9+V+6ypL5FkwzJOKemj2rH5Ch6/MeRhA6VT7otVHX1eUCRTCUzkOPv6Re2xoQgpwsXoOR43CqHwO
qV0oYK7edV9CjV+y0VZOovkSYBgatEQff28I+3jEyTujqUIDubgrL1s/HNPPp5JNbrHedYyGjj2P
EE7mvNYy579vHGlJOOZwwDnZUY7aRfVwuKA5FcegMH7q+B7j+nxXPv8jn5zoA+ga4u+RWz43UyaG
/Jtgp2+UsVty2aJ7qjGUpJ0Gf3IdJmuzciQs6OQGSsB7zzGBdNHhdmZTuM5GGAehakJX+jpt2Kns
BVlOyAFVSW9cBNlRfrfgpc5sKwWH/4JekQ1Wh7fgUepMaCd+IfB2Rsd59WdbJ3odt18ORsP9cqAr
gAG1d5ZUoTbKzP416pGldyc+HcOkXznUzeLW5E3VeoFmwDQPPKGJSrNkVO7j5F7mY5G7pC4kIT8H
8csdMMGQOHYtZAjtGVRhmBcCe811+Btg3nuTu/YH4XMOGO0808pDmvnj425L+Gox1/M8INKo5vf9
07lzPid3/5D541y3kK+Ca80oewrccGGnz5c8xmyiPzgZJ4vNgDUtbX1XEpqqTs9o0/K3T4WlifIv
PEnm7PXZuuoyWyeFdgi7SLEcISzFtrJBRmZJQ8husHBYlc3jfCiihKtsiktyPTT6n50xPlUB8KLn
c2hOuF3eHbGnB6S6mvZ5BkivND7BnQniwUUknosN1Rl0+9bUpKUGRhIZVP2RlOYBqUTIL4dKrj/o
pN2v0Mj55G3adJHGYhKLfAXZGs+WoHlcY2ZynPdZiCSLXbv8oIV2vMpOKc1AC79PryqPMRe6oQwU
oeouN+llNYmRxkvyZC9Uud9bjMa6j0pOWBvhebcX93YGvLtIp4o86TonfiKFY1RTJQkUGACOn1N0
AAEe5vCZPpIbi55OlhN7Lu0mBORf30xz9fvUSRd+QAwRWBF9BphConu5vxTQQFcJv3nQ3VqWN36e
kC4YSNzEKuj1uYuKfBC1UuP6SQppx/g6DqDBwN78zmFWs//p3oVAhL4N6oWvcL7QrS2FUgQ2fJZ9
QLWsjtqz0e1Nv7fjgTC3XKsvRkRDQfjERGw3ChgM+asozjuC+WX1uBm9h//dQ+zgFDKyzdeoN+WO
klbNyrEYUa/AigdMANgS0w432bDUNf1I7/dT/lCjF8GkkMgNTwt4fV+rJDrDllFdzOmgz/fmIkWU
YGqCvPXNhjiCMuEJY0Y5GjRe0iwAKyBD+YZtVuCgjTQRCQa5bvozUcUrWrc0GbgEJM9mt4GN0wRp
KeWbPE5TkVaJDPudzWWLysNeG98mWIk8fqxlkukk4ztEoTIa4yRh2FWq2fynynZ5MrDJcgnax3wx
+m0ZH52s+mfkiF7cdr4fc5lMszXs8D6MPCYSPXmKewfIUWohHjjIn2F5ex3SHFCRohShGckMQoya
9moitxLaUOrH6caxQRIy3NLNoeZLKrj7RDQqq6UhpCFNURXgt2kgerGsfQgYzN/2oo0++iiEH3Yn
mazb5gDJDxP6ySuZFRVA95kV0dDY+8eDeK1hxGuE4Eh2HaRMv1aM0X9rQKrxmNVyj6AaeM/eu36r
CapQXoj0hlBTisDzk4S54IQRWKz7xYKBmu/0/vm8rC/wf10A/hqKgODo3ddySEvdycZf9ZlEKv+E
ZHFB27RtHpXEiz9T3hcXRxYVFXl9iJgKjugGREuvN2FpoaEflTBRebyDIwWT97/WD2U2iPbQrgwP
pf33rAz892in5h44kEvS7A/prRuWzfRURBOEM44OxPgqcFeX4CxBDTgL+NEb9bXDAzNOYCl6MGI0
no594Gijm/62TTGwYPvyd66aTD0+dEUDiv/154TvktjJex5XJ3QXNcsC7POnr5wRBrdvOnMoDs0P
Zx3OF8qRpz07rsBoVSjsSVOrv0xtU9Kwd77r5uRWDygpLb9eOq/KeoZJjBQmPCYNbpX3GsfKE7Gw
wZsgJtihZh/ZpvXSFu08rGXkC0+oYaVmHv45HrSAH4ZI6j6zsbMKhWOb91E68v7QwYx/lyWaR7Ao
mcSEF7cGV1Yf4FTxDHEqJhv4kFZONDZ4mogwU2RVx6BScIeFBQsIU7IIcTrjHM6IS+8LYjWmQQMv
g8cqtCM6DMkg2JoNPf/wiX+a7BFiBs7sHOibEZhBbtqFH5juHTOq5nLkftDAFh0XEZXhlbFlg/Gd
HXB7td3LV9xg3yUY3NGPPafAZyrzN3k2y8PrxP70I5IgCKNU1/xYyURTIvgxTrHqddJi21RtRPJj
rOs5vCiKs8Ne8MpZP5oaKhd+HxNU8dp/KdmvATmlkWTKE85ryQAUv3qzTHBn26tUou/jpMtFHjyq
53suSM5ieTWf9oPMd6DLoOn9V8+IkcaFgNaJrjLs0z7aniV7Da3/BZ60Oo0LJ2EBvcTX257SQpHJ
dViUlDKV0quZP+5s/1zeGejGbzzDGTJz4giFsnflPcYlAAfPly/1z1D9L3bLzrM+x7U3IHMkV6H6
HmDPyG+1/0M7qq/f78DYyxkqKFqUFp2KtIWhtl6gZXKIAOtGfJQVs2uPg3FFMyT6Z+GhkOPLrZ3+
hcp60w47XvSs83Onxgr3N+d5bD8XTVT7ry3z2QM8gkOsWFK2pfZLEqAtlDyS5k76bESji1yYNsbF
mGsUsJLniRkl3s3KsYNVjZBVXd2Q9BaqM74KThnSC+ehj+S8NlLPIn4quDxYaPaLEPT6NwmXkYYZ
0V3YTc1GaZZ+2vXbmehN4Pi4Eqz8qgzi6n4Rk6ryLjEibuTxEDKoqMNc8IbN83UgzH+Wj4VxicwP
S+XGbsQKvN5RBP6AGlyDOvHrzQmMuqQLPErp0mVZ7T5gvOyBQrWdBGz2xRrVDdII0L8Jg7kvBLTf
0N4CkTFrojmGjKcXm57VKU1+/6Nk0gZ1v9U8ZRb3qRLAN3VDHfwofGDDbecXYMNRY/WXXbdpOLL8
lAXqNHDNw8/4iWEleQebg5Y7+onAAyBHPl8CF+33L+x6DetGB45HAzmeg8rvIn7dfzT/wbl9AMup
ywcJl7h6PX49NLsbcKeWAxKhogtPu+z43INzW57tUIPwlFGZOK9AtAwL8O1l3i5d/mUSpDSe2ACI
SYrHDsEBZqcNVcEKIuFHEV7Ftimr0VX+uz0Y7V9PXWKUT/pNJIV8bcm/cx1M/ojbvszdFA975Hes
XbIFI0fMUCqJbGKW/1SDKElnjF7guI40fx0dYmR1ZYmTeiP2puvQ8kn2VTD9u72KvklFG5u+ZDyB
JIL8Uyg1tD3F6ELPdOQhCeSr36h2gsIipobRas7b9/W6tvRmIlcZmUZK7TWxUSeSCDv9vRArbeKf
82AEWqNdIOBk6rwU0FazG9/sOfGXcajdPxbVOMotI1AtZSrZ9CI71JQvFWpTmRba0VzASWGSoUDJ
HiO1LQ1VJRvw9TgP5Ib585VG7ma/X56gC2+7+v/08MdDZY+ek2URvxD2liSUJvPCfMDDvt8/HZ+f
bhT3eSWkYo9AQuHHLY6KC58hYJfgg6yp/Rvs2mX6KSk5e4/mDGWAb2nj/x/9FfF094ZhQPi1xe9Y
UrwxUs64gl0gnBheIpOUkGNSCLb8q4j8GyGnu9FQNbtb/iact0sLglj3pwUq6AZxs76RAjrXF5C8
czLjzwyxdfb0pRaF791wYh1P7K9sQUialgxqCB720gruANmp82/LvXrRc1tq8crYvvdrepB6lqkK
p3SipP6rkN6+esNRc6K3oV7fOdYGyhXzr6iAv3HVROwoUsO9drObZyZnYuMKK4YzlsXmBO1kJviq
TG5goc69CJnCF/z8zzu2xyQG1+Q960MumTTeNAV1Ir+xqVGtrj+NIV+SJOQtLV9V4UF93eRNWTYc
rwqXiJb4trIv1T55dZJKgr2tkqsgawyAfEXHsVDThZ50nhKQ5/xqNCd/mQMjxZGIvC2RnhQtRrtt
zNpM3/Kya7+OtuyraJh7cXWlET66WqXfIsLAdi6Hun7i6CaJdph8kInt7dZjo3uB0DgfG/KQZKKM
/qaO84yomIX4v58EP/UpXxduc07LF3VS3gJiAOCVUQhQtVITOuGjJqd6V2DsbkgxHV+nIOm8D5yc
2B+/TFxwxhdl0Rc0SczZkWs1sNr1Bwj998FVnZxHz6GAzbW5VUaf2+OCJyBPaM3crsRNsHUSIIjI
x4S3GojU/PbI8P2Bpxl/mxPxt+Ua1/TgQfFCWvfThbfxjhFU18nIEJ6Wry+pbKWHp5KJfR5+gvAH
yKjV/kTSrcddMzSN2P3kQkQ0Wxl1kE7AOJLVDkjE08hmnYoGjWH71noxee/NcqbcQ0mhdwT3uHdl
GFH4dU0AtvIxZcu7SL/EMSNZ8euXrSY2Lp2vZ35Eqbc/caUo+D/NmeLnL8s+vQpK1yU1DKMWutG2
ibvFH8a7a54yEodPL5KefaBUu23SKOcc6X3FwYRpnV4SA2rCDB4xChnLUU6iaAjKM629COXspkBH
SZ9CxZgH6m4jEA+c/4ieaGjiOqgyViKCjf07ryw161isDbI+f7WUGapjtg+ObgQXp7g9OdKn3LgJ
EUdyYpkZ+5ZGqohewyogNvboHxWt5HtWWTc6Aqk9wI4IvhPZQ4Rc74QtupaAiC52uCNAOTgDwsYg
CUq4FQ+8gjrxA0e+LIwa217jV0nMkfu/KGPvV8xKMHwLsC8vu0qjGXviLD1P1MSdAJLdV37/0CxE
fqbK/1YIMVG5pn9zhmmVzocCQ8f38O3Vni9p8+ITCGmXiZakVOj1M6FgOHq/H5yX8Hy/aa2aEcG5
gxT2rVPeMBPPHoVPCs6qBRUFll70J22GMoRO5KOXdNSH5NWylXdxVj16n9o3ZjMgx/VDQsWSIODq
ILrwsx6WKnQbF0bv5HYLfZ1sMrrHwfcKbVBNAfljtHzG3fnYEqxtch0ZA/r0rBdMAkYwyqEj9Rkk
h71upFzbDSBMysejPt8D8KRffqZwvJYXhSAQEcwmI0ihvjcRCn+VjAu3CBB2zwghwWqLRICxO2hl
+1+B/B0v52kF58E+GPM6xqs94byP2qdVJs8rryaiiTMpIHs43zg4UOPLWx3vYG0LkbF9irtolTws
SobIMQAK6maAtHnmDPoISolkiSNDNmUYbv3pmsBO5hPfeytE8+EL3nPMViWk+aTqstwFkXfAF5H1
boGzoEXvb7AyacMG+omyOBg1H+mYWPu+ba8umXxD1PDPJQjwWEhL7kAibluaxLy3frYSDt12AoUk
WtgZTucdjuIhiOny7fcgdpt94SgvhZPrEA5WEj53TNYLxnPPEu5ELa/o34SLXmD98LyEkcrDqvKx
TAEiGrFd67yO+VB/sraczNpuv+B64FcPRtKQba1I+GE2kVHy95hPGIfN20NzZm+B3AZI//fRe9Z9
BV9Rue3Qii/pp0qR4+SLBosRDhgaSAQYg+/K96F1P59FKG6OimrJc6NJaEhsQg0k9zT4YPoFI04q
5adTCGDz3Y/fF/YBkCZXxx9N0pd11zqADTy9b0FS50wOa7rW3K86JyLE9IMCKK1KAvNa5eGcdAWj
a3+CSx/B3lTV3Ao5eeBkZaq00gbQsiM0NYkH44EbFZ5YZmh4YgfzNhjpT/V8uOg/agreLL1ZPkGU
Z+ZXx15qqaBOWAmcLygNbZCPZF7SyRG7UMh2mK7NFIQJoeY31do4p1rFH/uKzCXHZkm0DOVI2VBo
P0ioBHgz/JW/ENHeeU11vZgXlpyeumR9uwl1OFNx7ugW2LG4Hvm3okFR+N+ovSLwQcXcGpGvAs6o
IFlYDtr17SGtTVzkrJpviXcNNDNAVu3tzaaHs3OLdER+iI3+JZbMqlC7kTyqRAYxhV0CjPuaGJXg
Au1vRJQTZRmNziaRJ2XDnNWcC1F29J3b3LiNVSVwXtuYyHu11kanxASV+g/llC0n/mRqI/hZrv5c
x173DOIv4cY+ZLEFnOUlRzL3Dhji8Re3IOkGfjGq1Ikmk9kK7asB/cMa8rekL/AAYuDazdIDl6x9
VJ0ayUv74U2koz9B8DbGX26+7pLslsLurArVgYJicxvC6oH79P3qDHZ3usgkvSfbGMgFwpzZ55E/
CE4e/BO8bYrNcV3hjVASIVStrnO9tj1BV/qerttzzMQNbweBtwa9CnqCHmuyuhQa5+DGdG4naDVV
CF+3v1Dtomc3SjY/HZYYvi+ceG7xF8kSmKCi0dKXENASFmv3OmTmsDo4XkaXNJllNUBse9LuhxkR
vq7xppxiucIHExrryyiltWwB//MZWpCMklcnMHdZvPo8AFsdkcPtecJm/1fSPmnHAhyZ9ibZKChr
jA56mzwJ/vpYrx0DNs5DLI4TKlk774Rq+TEBPpMmsIrAkIQLJtsNkO3ctO8B/LT651RVdOaigBaB
1axZenJan2dO3FKQCKvSbBAfMgwYyGHNDkrFYUQAivy2GDp1O5KQZdmxviUJIssfulylMeGpEoZW
23UDd1yxFS3RZu+45cXZJEktYntDRJVyOTiuI62hHRfypWMS/zSI3lKskf7tHOKpKWeJ/tXZAY0O
s90/FkYj8Qe41BCIpr19tVU6Q5HyWLOKB00vGu9KPMxX98FwM0eGhCmLt3UoNjfGDUIjMaZNnTrL
LHrDPyzQ4hgS1ln5JlczGuIQfJ8J/cM7E4aLAa9OlSPmfdRnxz5fpNPvFbfIw269uo00lpHlJUSu
kl9FgJDeesWI+rKM/dc6um0uZm8ho9FjJTMhjWvBEHnBA1n/cj/MFBSDDPGnFIJlvs4RiA6sBB3m
0c1X44F0ee8/XRhVe1aD/fGmRpyww2AgriF30Qq/a6O1QhqTW4S8zyh9aBGsB0u0HXtqcQcljiia
9ga0iBzj/c+tDmCRVy10iCJG35WaiffNurTbjee2HDjOK4uebZ2qECK5k91Blha10I/8rJ4G0xsz
mEI+Ti21Sr52su2DmKxWDzhJ8hQjnnBUDBqI1Wjgp85EbnLw1JIjOtDlayhSKu8mzpaRY+6MWjO+
kNVmihH4wxyFfMpkRI6wqiJSKJ5JtPdIE+MCzMIphO3DXGo6TGIxmtsEO4gp8os/dDhZDyW5TK92
rDRcpVyCxyRStSLuXIXmom6BLr5sOxD+EcehqnlTq+lb3gsw3TS2p09LBTZ0jWwWFSR5xUB8ARvH
8fBhJqLH9TP77Tthxx02dYSswseKBpkIMhx1Gy0QjOEdzRlND/tPmI5OAvI/b03VONvo9RxWCSVL
JXIFC/vi74s1V/0kP5CN4urTIlQUtbQp0zeOMzSXVt9I1XV2un4xB86mHkG07cqcON5Pd/89GCMa
CZ42hoM2mZaqud7mVAhoqMPmre1bZO3YoWakwrO6BWF+SH1vN+6cT9xoO3R5ATPC1dvFBnvMJbvm
Su2J4Z48gfYddLSu3xyddzOJciSngdSh+xrXLeGuLNpIU3ktxXwQG2bxM6nUcEGPqwj/KnsVlgwb
CNzyAmKtVw+saCOSBJx0YyH4tZNsst23A6QLnTGa2+AjK7fJ1kLOnzk10H2vm5/mNhqRqtqn2Gf6
ETGlX+xjIozBwfjTpQr2rbOppThVXRHIxDVRi6jjFt06oVJDcz+jTd8xkStiGZqoxPXA+dADFi/N
xC5ngV/Qq9k1Ajmpq/WtdFMS+AckZGh7wLHRHFj5oJ8HZu5sgTr6oWyIpPCcxkL4f6LYto8wLCT2
1qRTNN1JUUNPs5ikvP+FCHofOx1bW1Vf8sbr5w+hbd+mJJzwDijlzQtSPf5NUbwcGQu/y0CWDuRq
KFUZtlguyR1vl4hRareZfi4ppRke9q5FFZs775YRu9GjI60pFsliraFXkOVjv/WMy7YA5jOy1G+I
tgUSbyqaTaqAnZYXWiCTS7LT0DuzvtBb5aix1ZBQ3eUH2+go/LIGlGrRJUa34IELsw3GFASdbDeH
ap+2rXyhGA5IbKfiQRbVBKKubMruFTP6YUeAT+tLWBLnJqY1bytVGh6Zkm8koxXsyhwHW4mgvuIZ
0r0QIdj7ZbokUOlqmnG518NhLssgVBPlfxmw/jDIgooG+1XpglHu7OXvj/ko/dVNxd0WpcBV8zbd
6Hujzz3xKfhkCpgm5FLl+1tthVAID/WMHtwNdE4zbK2jHWhiTaEu1x1HGW2Mhkhk9T5+3wqExoVI
hdFa7RdRh6ImK5nxjoW6csnnotSqBbW8T5HoKl+zQzZ5oUZaZZ6LXlPef9U7PCbz+yTLzHwQH2aY
/QY0zW4WZo9duSmlYc1l/PVZMHs1PKe4UPwl3DZ4aRWHtXWjfHAJhWpEOy3O+KA3jWnYuCpbvAdb
37wmzqQ6jzZ8HX5uK4fKRdm4MnGl8H2w5Qxjo8XNFJZXCb7rWE/y/fYVwQ5ML8YldebTSqPy7Iyh
fBP9QLrgyBEq4hFWHjqwdUV+OP/xBPYMcc/9HoTy3J1+ixbrFppEmvm/tkXLywEOMewYNANqerHG
X7xzCXHVBLrqXC0o2hZIJ7f78OqsHp59Jvo3rlgTMXiDB8p+nmVW2dxebp9HkSBTQx05vUYN73GV
ZvRFwPHS5CbeDk2i4PpcicykpbTwi1C8RZmbdaaIGLdFPomwBkB2LYE01dfSJm/Ios3WSYVjxUzh
EXf/FkHMwbPA93EB6oqIEdTI7xMQSlENLug7m3MivITGYBeR+UAg/g6Ag4V4c3yy9y4VAabDrs9n
5MHlllkviYsbzsC+ZdxgPfZN+xFD5dDiryLc3wZ2R32W6QeZbFM4Fxg7iL8f3hNECpzRJCW8X/lV
lh3sba2Mo2vMnuiPTcxAtK1lqwv4KFm5NE0q0f2BvYTFqQDz1SDNfGptvHeamKD9tW8ITj6RDU/i
OJU080iHEl8anFjoqPKJzE15Ra+Cpq1X2EQJwaPLTltN+KPMwiGVhZ+dBC8NNxqiqctfUBSwEU4a
OF6JmOA1LJYPTsSG4tG11WLaOxyEIgxRgIANvOlJyRXVwFb3YfVOgf6DaeKfbKcjbVmVkU+6Zzcq
1+J2q95bD6zRlwJOvENRf+gOk9aZxmJOitAEYzutwxHiAwcSP8kfFkXPjS6/eN8trEH2sbuvArZt
JnbUR6fjeSPioIrzwRrfB+oJ5qYKd9nfzphhxdR7jnXdUBJ3kzjivoUyARfi9QDTPCf7zw8lqyWo
PUDmvmHjZogAdveLd22YMLTEYBxSQZKezABySDOzVArX0wwIQo37GgqyCA/YfBBfK9HK8rh2R4h0
h2LprKa0QtRliKzLPbOrOgshtRHXk7htexYrrwcp3HKFyg+NCpOXS017sWjD8q/oQQBS9oCZgKbg
1o7n+yjRNeATWEA3kbZ3taxceGxrjoOAvD7Mh+u6Oyk38CK14C3TjP7ndporNWiLMXSEI59LHczA
PX9ZlJDmPeDNexqRWSE1+J/JvgUK955U78tQTT4unvXkmnrb3x7DhC2qlUIhYtgHl2vmD1uQs+18
Fc3ZxUFViOpLz/wqLhOhmwEUZQXRjsaxjiEiaPWnOfr6UMpqXNxWrhcLhn16l5mi5ZTkty8kNsue
6eRrrx6/7djwF7d58svWS0MbF0eVehS9i1pmWrzA0qJYgwmNUSH8i5935sU0k4kGz/kekhTg2oQm
MZP1YyhxMU6CHTpvE4KPwPBTH7Z//DsHFnvc6Dj0FFf5xWmAR97fA5OpM+MgJv/G3CVvxvXuv8Sx
CWDdEyHc2kTg2RWdxMs5bgTzgYvVT5jIJE4gC4su/cqSychxEXY7JFyK5BUsP+AOlsPYtv53Q0LS
mRdgSKv7Dyxps0FlNSG8gE8JXsxoS90Lef2FU1xN6yE1aSeA0NpAWAbYGlUdaHHo8+A+Pxro1VEm
UzuxaDOFCZsbtjMGUcSgvfZ+kRFc34uZ7xWwIc8nmnz7OCsLaQVKGRiyyBbMERUYq36KXLpJmly7
JCQv5lDW9TmT/CuO2vTzwfGis+kgg63VadclWhWSTR222IiSyT0PQXk6aZ8R0XmBfJh81/Fr6gUE
+2wLpzdixvFTeidnR70mdPvAi9N9OP5Zt6nuDqQ8CIqSskBgokt78RvYTlj3AbLZgV0eAnndV6sE
yroGvitzqj3OWg3f8AZtJtcgHYxxYAWrzJKtJe7+WLwRKxDcij0kUnmN6P7kAQ5assR9ImxAdDtG
vm3BCBT54sl82acUu2gcD5tZx0dpf/D/+cYCI2bQ5jJOdWwlEaXVML7Ghu7V4XyvGwkMg50u7+rz
epsgwE8Dv2Emt0Xdj9W6TSrT+8Vwz50mzDb9IC5uTaS6atTtudR3/jsS1j2xhYSrxKZCcHEj/vdC
AERr9s+g1sFY/3ekvpMz3IAhwavNEBpDUzSR/DMVue7aaf2wyVEZlUJqt1+HV1swIOrq/FCHX4q9
RBUkrFO6eBawZmCxhtJrtyPndidpoFasuDpnQ3Xrtt2AxB7LJC5tbaoJ7u/QMmHfGk409cMdJcGl
KMgiP13FsWlUY2RnoFCAWGMQICMpLKwgPk9ndkhY3wBtNORXNLqucI690Z10YThtZH8HaROPmVpf
TT7zj5dHc7sCgsCappPgZDb12FXeEyJ0wer5tE1qzbJqtgyZaYD8dLCdZ9BrxrmcmMVuFPhyxooY
7Kj8HFzzxQs2iNuagmsVwSUgaMr7nQJT3z7zfbfYRWFDLiNlk/ki12qXd0lZutCPX3Mt+ABuHz6r
yRbUZeySEQ1lAsgD0cIK7ce0uVHncoeb2XZ/tDcKptSqODepaGpYinTCwETPvrazm3bQAxURGg69
liEal65xJDo35GAqZNRR5/zerBH1+eGy3HHNkMHpE2WRMt/RLlPI4aR8mp/W02jOKEW3HH92IRAU
m+f2kecgUZo6gM0VwFe2TMl80t7MgMiFfaxyD4x4lRdjw88/xIGiMZm7ePAJpkjIJOh+7n1GuxjS
Nl8+LbeNjMaUSnB4dl8dmGxjCKwKmspBs7f63/rrS2tFQC8lsCn4HVrmS9RFXGp/os4HebMaD3xy
HGL5W4/PTN9gFIGGVxHL1MS9QBwItKhWKe40U267+bwGl3o+ikQefvJGOjjQtLsv9YgeDp+movx5
5HddZs45DdwhzpRVdorrTS473c2lSKMwmG/v/e6OLjrLYlb4f4rrPMZtiCTfn/OyxECuc5vkL2nr
YGPjV51VHRS2yIHtg3V6B6oTE6YRqEhgCKxTOMUF1h/aRFgfSyA53zm4eiZ6AKzDTXxa8X+O94eV
egLxVAhT5Hz6pooen1NJq1TD9U7bRG04xWWSQJvsu+z/RWJt0+9pmGQc3s2b9oNnmmLbYYX4ULNI
oCQyi21pxoAALm5Tnuk5aNAsDMEe0hBjGU7BwYFkB6zgl2UfIQzG4iJCu44H8x8gxBm0wGhSSD+m
HkL3Cua7EcL/5voQNEmMvJ58K0CzrJr44B040tt6OHZ2ctr7yoVMXGo8LuJr+r27YV6P5+QMwBX6
jtKdJtap9ItyzGFQ8vqcxkTEI13MfHs1OUSXhbRytWKXxMWCUxshC3fINIW99CG/0Nq89x4qWZIW
3RAXyein91V80YZ0yebVbnLHyQKEzSGwd2Y7iiF5CcayvuSFOt+98CFVBheCWAPAlcZoNbAw2FAH
+w4BA59j9CR/RgI0wySCgt0nu+5jxxbqvbhCyJIlA62KohAkEOvsF1DgwGcMsmrEasaIYuWoT2J1
PRb+a6cZxExxD8E3nXnlUcHHUJq5qewMixKmm7qxMET9kWTywkxxjAkVHdTndsz1q8dkNaDmuDaA
HntUnGK6o1ABx/kE/+7O38PDGawDNCOQ4k0tGdGtdzvPn25zZ2vQIhU/Ix+kFoXYaezVZqjvnC77
0r3ei56xgkJwtkDyALimaKVIHOdlSNCuVG1tIsczrcHY1aSEee/As4XbrOGfy+QS463Bl3Jp848s
x/+UJCe+7KX+mztc/hGB607V6MlThp1mhwMbRp7zbEDVyBV2UDQaxadoS3z95g3GinMAPQo0DcF5
fR3LdLKOLIyI/fPMnMf7HmdMnjp9gI0iE58KEu7uaEGYodzJWe90sbcW45W97BmRO5KLHCtUKGQs
bOrcPKOzbJ00BX6st/Dzvub8Btgha8o/N07HGnvJmZqqHKa2RC1+w7vwhpV9F6eN0+xUC1mupp0s
NLn28Ng1mMzCiLQO7Fb9YJWQbyIx9O1JDqJddPNZeeVQWMFspGqeouhbeeSmHASfvugLHIoz18g4
i5PdRVqVc3BSDy719sTRMlFkSah86LjcP2jalAE7GJG9Qr9R5c2g9HKVGx2uRQic1UUmL2a+6ua4
xDLxg7IAWtXTFAOtMVlHQawp5Jaqyr4z3MhUg8qA42Yw3wLyPZieI1c9JPt/CwwrcLFH1xqE2JiD
lLLtKWu47H67YPQH2WkZDOayDWJWpOnYr4nUGgFhceTWESLfo+SnY+NaYvarebAYi4b3oNHDzlvF
NvmeopdfCWcl3vqKYJjYFj2TMM8UqA1Dla3EhT6LjZfgZ65u39cek2/GhFz/0TL2wIFaDvLajR5T
PPnf+shXKZBl1Tj1Y7HqZ+00ZPXAdsaA5WO88Z4xUGzvnug74iIVs6t9VVfTveY7EzgZVw7kITWz
tSMaVrQ7eJGI+zyrYQz114ATc74zMVSugtS0OZ55ZXDMUBfS+kC22eeM7XTHr4oulU+upjTupUXu
BDNZid6hCyBpx/n4UX0dEAHYvYOJKe5B9b+oTUilLlvzQZ31DZdM/Yvellf+MQH0DUl2RNVL1jAA
YZEvJBz6NiN6NuAVbTPfrblwY66q1u/HQyVn92SS4yHLZtB28qPaoC/aHJw9VCclFEmwdIiH14vF
j13kgmmCZYIjmM2pxJ+g/5zHrWsI9R1eVMvMeLKbEFG+IssT/hFTCxIgNiDAJj1JC6KKHDaS5K3s
Cxt0Rf8le9WePQIz+PZ1Un/n5igmPXL6EA3sQtjQvlumj6jTQNvEex7q/pYaL8QkfpIU1ZVxlD9O
Mw88YpoL0/35VNpO7+sXg0Nlilds58j486sXF9QZ4psCmqbgETM+94LsbnQ95mHn/86A/Qw92vor
OYj+YGU/BdykhxrhG+7Po5W4zj+61VxDKDD6k5Lk9gRvE47JHseTLwxoqtKkJ7KITeSkIrEs9T85
yPtFr+vgHT4ri+4BxOaxC+gq44C631GAqQRFfBpyy+t2rb/CEOGVidUgS4d2v0Xy5xu9jcGOAWm5
zdJHUFYit4vzCAQQ4ZQnTfbYey61JpZFeeWAy9hwAUSJhTiC6u81cUWIgcWTsLU7V5n4lBT8uzyj
wvd6w7cYwOPnfNHmDJIEMfazCfCp/sWxUxf5/NZEkQgxnDw46a7ZwUvjcLRt4AZ/hrMlXlPSa24v
FOnBQH9IeeB8r775WzgqMWL1rG05PnDG3n743j5vex4wn8fUGAyNhE21fEq2G9vKtucmKJRO3yBq
TCkwlzHJz7cOjhhoV4n4XV8KFlguP8Rr52+sKpXQSdJZcgxnpwkvmwWWuTyWxQLoHKghxtZwK1Lr
6njzX07/DZAk6zXl13+ywLK6EgPsjPKwZtiDjxqShHhEzFVywM7MCXz0sLdeGFipAiYim2oMIrc8
KIr3mIrgnRibmexW97bZW5Cp3FgVQIsG/UO/hwPEweMIJiKnawQD8BXvK3S13aMRETG2ajlEBHn4
7/fV30mAaU+4miGf/kQSik0rOCEPs4b3wo+RiulQfwPp3ScxSB9aS06T59ayXZi3GMY+QSpaO9sp
tuu9RLUhG1dxuKHw5hQYsXXHLrXypfFhHgbAIjdOebyeRE2UAmHlpO6b5hBcxwluKeLVz2abDBIX
UeD5B/Fb0uyA8OPqQUujUvUQSSLWbl2y+pgMRyYhB2/Mm4zNL09vA1aUYzHKgba9YG2HxBRiSTTg
swXb74dGsMDesirX5hlKGNCVkA2YV0DM5NwkKxrdDnAPOxBhMeZZ337oh8+ZmxzBFmLSqmTsqIzr
wSUllzi/QQJNW0a8ZrIqPXZEUrvB1XXU+QPr/wiRF58zLWo3zJYhKDkpJmYOtvGdZ0kzX5pdBI3X
yb4vmx5H+idKi3zCs6x+hH1ezWalmLNrB+raJrd8Kd8yYlJKzD/C3EQwyzwWFnTx/5oo/1xQ2/Bk
ss5mdWn+4l2qiGve+OriZ++EzSuZvi+C6a231qlUmbCR/Zv5Jh6fvRNlR6GTtkg1BDGU02sqzbS6
KUlc9enYYDue4ImhHGWM9Mr1tjP6xKrSmVQhcCMwtsBXsNQdHv62UxaGbCkGyr5RkoK6NslNzunx
FBgK2rMDallSoetJ3y3si+XT1atCH2zgDlT3Wr2mtDgyr2OuS4BViKOxXvXEW6UUlXYlS9QqN8Qb
Oxq3HcJ13bvzrFPogsX4ZL/97W+kRNWdhRR+JdNfaPpdyK6xkeWo3WCnJEXmZcDtnChdMYI40ZAA
U0eF0mZcG/+Rw7z+ZPW5FoW+W/tv0OKPThGU8AgxTM47vDplPNPIw7fuyKrHCMUw+M0V1AeeuT3A
QNeJkcl+bRhP+x/ivxpdSjg2TkNj7SLlsiozGrslQyAYW0fScp0YHLF9AxL6T5zDnjhPX9fgt60l
ighN9wAm80CbCUF4Gjqkl/zyOm4GvH4ZhmtSTCt3uFe6PQDe0mu5qXJgs9jpEJKNLqehp57QdJRh
pZ9DHPbfEA9YzF44FgXtppIy8tAAmpGfVFV5V3hmEt6kzqiIjC33u/paf/IRXOiWuJ0pQooKwYPo
Msr5GKFGzKljHw17DjrjzyiWzvwIvzfMQhHGDdo4++AoFCS6xFIS3yL7qLsrxkjTSOJ0otCI8Vol
UsUVFTUlZH1J9NjTsixHLSdDuvkFsdN0r1lVY9ZgZz7PcvO5fPwWJabTK1E9toaou9pI4NRfMCZ9
7o2jB7at7Sw9dB6I/IX5Ex/mzWuVHnVWxeRcRuVvFNzYzd9fA2AFsmWRipMMAJe86osygynDiXR5
zBXpcr7KuksMzzCgVPTIwGateqz8KqsalSZrk7dc38ZHmGCJeZpnj/ZZxSs+JZAf4Gu3YLCBeWZv
rrdiqOTW6EFZR/qcOVjsh5g+GooQus0CYmW2liddYKbCpIoFR3TX7fpbBEkl+BeCDj5Im5uowOU+
+fJhYbtLO+vl97NO+XAIxHPMO/nr3GMRbZ3psMp55znQm/P25H+EIQDQLUm6hQtc4w4tGb0cw1N/
h30dDRnfa9gojWm9K58+qST78VjwwZoV3efQTGKE3puKECW5ZjTaQBrowqN5wB8K0+wVi7L6nQxG
vrqqC61Bme0PFIPeq9ScirSWw3h+qTgcFNsKDIznao6JNht7qCZfS8mGZpguI4Ltq9nTZDs9wUk3
WqwWWLxrZqOm8sHKuZFTabnk3hqKz4VGxfWP54QmU/i8+6Qm4reZuxCRMLRBjEqH6Vw4x6vW+6Ob
0ZvfAyIxXufjxBKn7+02jyhTjmjYaIrsyXqV0bEuYxUzrYuqlLB6XBFw+8YbklU1o+9PHCtQer/u
u9b84WofVzMrGFTszgvFqQCP+YQW/IYaP1+vKcQYj421ZXXJWBGIC6XfbQmgDQLMKddSvXujyDcI
PYL9RBtyCwW+C9o/lgpeHvXBaCHJ+D3FIIAS14ZOSOcflg73M00SeZ/KJxaP7g7H7Dfzbntl1H4f
uXM50lgeegjmN5NhiiAA0sn961qBVoqX1b64UuiwFflEaZIYlmVIP6zZH+HJ+PV3MuxFXwQi0oPm
m0to78/K82JRswYx8UzNkKfm3rK9gnsglgMsk8gEZjoPB7Aku0823X5u1ZHkHxllHvJnfi9XxMwh
o4g4n4rCt4cVauJiR41wuSU3iJ8BEZY4uYT2d4dSZyds4OZPB7PD+3Wxb/2y8EOyMTU+jQig0LPV
Prtb7EKrtyvvOOEKNDsoBva1nxdBMfB3b42nOWbazG0sapmekJBk3okrj0dfIXH74v5+DxK899Zx
gY4hm17/LsMnmJzJwtw4U0fVAPc+EtQMDuwDQmRWuv3VknfMZZ5B0eOWnf98RT10/ElFR6v4WZOi
k8X6pFJB0cU5HNI9eVxTqm7Ls/VejhF02qLE2RnBvdGaeFjy2Bjfd9OIycuv2+aKe97a0CxaRoUe
VUn3fNM6VrILWctNFH05Vy2hiohMzjqr8UWZ2aOAiBMTaU9K7HpueWOaDFW230fmfEWg64O8vx8c
EKAbMZWU60BmP2xFxfltyfXVc7QRGVA3ZFmaa+0sSKZM1cIzrT6go2avNNXOJrBjC/G8D5FeqFF9
m9oz3er3CuuSj6ZOHUr4ZOfxj62Nw8rw4LgIhJnupY9ZFqbUtPgAIi7IjgH81IyW4895U0zYmPzr
0vTdcG00K20yOUk9wyfJmErwdrwtq2aGK5fXxAUVwASUQ2jJlH4iZS4UICHIH+2zQRujgInOj1+k
XY1IUU5V8eJZMtoPRGeczbAbsv9/RH830/8d6yKoyNWWJAqERe9aST0ImKuRPyxJcIQ8sv4EW47E
kGPkdEtCY41pOcAXj46XA4PFTE08P7CIUHtkbHYW5SYlljxfdVbBQyxTMpkA3E2ozxMf1vOlkqPU
awGExwcH/RoRv/a6alVds2JUiimbMdEZRTQMvrk6Pis8RSaJcXk8MAWuiR7T8MrqfKzGx6cEBd9d
mg5a/IJBj6MYFXor1SpKbUo+f7C2mWy1iHso1dIjs5LRWcl+ZLgyuPRAcTSSAHTCXWcqjsQ7KQ4l
RMKkFionlXg8yz10HErGxO4H145ZVEyBgdze3+R26hHJgOyt5QhuaPL75BdtI4oEjmLEdCRrESJE
227XTzKdqdcFwl16/yXNcrPWlFAiRGrCdMz05xPb6GcX152lIrVnnevD3AvYT3Y0YmbmVLqHGMd1
xUfBgulTPKgBmduIAlyp3AvCoE1PDUbbWchbBBymUhl3+banEnAwvC9Of3UA6IYjOSYyV6t4VFhU
2/z9S7fcFj+25W0Wu6QA7gVWlysiIJzB0ZJPThu8AOLcHgN7PndrOyO6oxKP+4QLPgDjNUiv6VTT
nlU9sQuO9VDv1otfF3/0JnK8OZstFyOwm4Ixuboon4+ebnQg3DRq1ssuDEVN0bBGTBzkkOOnMygd
eg86ehNxorm8Elc2zAcvUHTfdWtco5oDogYFYpKW5UDiBh17Sagp9HKigx4Uu4ZswaBaOjPRi8Mm
z+qs7ggxZqMNC4yqb4BqTGKyJmJCd4NwkAzvbc/KjnfJ3cO/fkl6QgXl9chtqXuShdBzzEJQi1Xr
Y2s7xmg422khsTSx0Nkmk3qsCgAdyz5Uu07ePMzKfd64DNGtgRDYlWcbads0Wd9l7Yra3q2Q1TIa
VBQOvjd8IaKDngMoUd7Dhzglr+GQp0pRSfEetAWIZ77+fj2UBwPinucC2JXgRWmS7MoNuNFXVrtE
aNKA20h1UXLLfkoYHJZxu+Wo8MQOgigPHwuJcaqmGuVnRykMQbkRVeY4m9vO5FYuMF5x7T0YM16R
+QPBGRtCspG/kXrwWIRgY1qN+H4tuilVtuBRRzJTyobB/QJw0gweNeDEI/66Vr3qaPVBTM1gUQ78
z9uusL1eD7jwXT7pF/TiDuoZSyDpIOrXdRTfco5OaR1EJbtCIReNk61DCt+UwPu/EI/qWDjpmryC
56wjnBJKTYK+KD11oXs7pBo5G3CimrNCoi6xWvg2t/basVfsuqLuqfZQ2vIjzr25TPCDIc30MTZR
sddExtT8NiOtCCFCxpw+jNGEAha2btrS8HRUGGS0Uzb0A98YtxykTuuOhrgNJ2FP7JUbWdZErqmd
YQhfHnCd4eyI/j44bz+62SAofHKedZ/Wtykc5uz142qVk1qgKK1iRjnwuIcGebzYotVnLOrw1aGG
sSZR0iZ11NDhV//wDxK86s4GaJE7iaGGwzcfq2+p4M7fZmqAqaRUWWr/AaQPJMq4ejhrWCZyOzqg
72dnQdCu4FQIx43y4/u5YMIgoLDV929WZYkv1kTHpNkgVFsQ7m/MEOkqLhFoDLp9PAL9NMXUxa91
Cua7HO728tVndHbS2KAqMBccbQQeQpUDjL0BKXvBQ/tfNlzjCxrdm0IqS5DC9OBL0bR9dckElwmg
cZNIZZd+79rzK6HYt9XwxCyFlNLqQNaBb4x756f2DXME2Gc9XE5ua+xS8uZXod7QFtqHOhojXeSR
wkg+UcfcNBCVSg66gwnNx7RmMeI7acwlm3TrHRcuVy2oCQV3AoTMiphaC4PldVoHTWcxiFVDmOfk
bW21+L7jdGw6tT7dZCgmgBC0AIFOhmVcNm8E1ihDWk0/0qQcFlVomTaFR3gclItAWJmzblthOWNZ
SFfCIdb/VUA9BXw8muBAWoIfSLbUtdeSpV7RSyDBK8QR4mpUEXd6Od9WkWhFfd4lubeE3WQIyghj
1nGNM3rEMNs9NWpCEdebAWspSLiGzk5yDRk9jqLpEyzvM5dzbLp3t3SN2v8fE+yOxy5obsDAkVSx
a5SBU1KXEjFALI7wawsU/BthENn6LO9mWBh0dVmywqVcsWzKAGumL5es1/Q6dAhgbBX8xgZVpQKM
zX1a3WvKzMAhsoIAX79+xRoiL3DkbEObxCBxv5yhrynor59qUMU9/mRnw/HDPFqeyTeZq3TT93xc
TXKLHlr9m96HsFfbE073NNqOutzxNr/I43fIq3wb5afp8cvUcZhLUsIqvNvCySfLppmRy08GsL3p
YJSBb0SeX/5nk47IWpPNyGFz/dpCRtsYtrsG/SecopyaWGJgsb/jirtJ56+zfTeHpkSi+0JY1aOX
0rvRGXD0IMf7Rew085Q7kXHIL5YacFTpl0c+3BK8+v4rFn3VH7YPk9crQHhFrgSsxfcZzuclaVSG
XFinsmzfwzg2i19ayQZjovyOiwGteARsDlSqobGhdQfske6xo127fufOrRLzlV3qOvdE071g8zFT
naqnEeP1V5Lyw6EC1GpRUuYXOuL00huL7P5OHh3vydZ7OLR/Unah1qhKkJdnwAiWda3Mbuxzm3pU
G0W9Vj4eFox/4RVzDeqctbwj9eofe4TgAnYKtR/iKEO/Asd4kRZjjZ2xfWSxm3towplvWfGdD2FB
hGMz6NmRsHUFTvK/aK5YZH60aN2epeuVtacvJRN5cgFh27oORxyRQDyKoxqQheXzM6xRRZNq8ASs
ASQPc1hzFeRrhNp63iZ90yAq4hVAHFzMNpxwIW+vtBL/Kpy4dvVMJ48eUVpSHhZWJc2qkCadCHnY
FcGtFWEWVG/7THyt/xbuiNGJGDhBDZMsn+mbBKxLAjcWSDwtC7J3FnxH6lqWUBH00VE+WYqCMxLY
nbfqGlaDo308WtcOcbnlCGhNPhm4PAVDfn+sq60gfDR03iIbqV4r/eeQRfjKWZk9uVWq79adkrEh
6r7yFS23hQnslbLUGXtoHbeRxFsqYGdJlabcVBgrFLdWrNFX4TZ2XnVgwZDarchwD77m1v0Cg0up
YJ1bqPOK0wsN0EWCPAr3mXfpuYI7/i6ptKApeCEydkWqZ3Y1/OlX1VJ8Ug2cIa+HtpMN//YN1tEg
E25j27PWS+kYRVLFm3GvmKfbWWK8BOiIIu9KTqzlP0a9ks37xkli2KStq6L0Rg3PIMMVJPJ9ktFf
4jC0k7Hs7RD998scHy+KibNCrkESuy8weK5ptPbvSq9nJDYcnV6w28tcn07/7rUj8KAqxbwgf+K2
jCM+qFK+G0/fkvZ6KyXf+Jo0f3vlvrjxqbWJeob5UOfU8o+6JUKt/17MYJiHQ/RxZbGeWH94fDx6
cGTBDHpjZpls3VM6uXcQ5n86Hy1Xu8Y4Brk6/pnEg/6vlIbCMGByywvTJ43Op2RxWzIGuc8bxndN
7rbgcigiXc1775hAc/zPF0TxWPcWBHC9PwxYszydajww7Z6QTEcmRT1kae4Kdj1V8mnGc2sBkt4w
DC8QSyOoqUAKDwqJjMvQY5MWTGOQY6nQE9tzpvfzSmZhWr94xrW9DRFYLo145fLoXO1SzNABWb/2
k4OOyF/aGyrCgxbd7Qss/sVYQ8f6hrJ0tEbh4/oVtlfldkv/8/KCrDrbmW0GugG5zXVsDj50VCLd
p4o48eczWneSamtg2ISxNC18lGxmNDWkIAGpasDZfD44+SDLVETUgfFF3SQNjDdpYz0BuX1qPTm0
1tN1d8go61/KJ9siY7BnIcuGynlpmkBA4cn0BXeCJnCdMGu8t65Ooi3925PfiPrKbhB96sRf+TZW
NJv4S1A2jnEq9kOvDoxDr2V3mdPjClFuO8Y+lBbCll54pQ4oV6Ponfe+cytxleXr22M1sBvgbehm
JyzVuf7bbnR1XeZIq8kQotvnVs60jrm5YB6HtrJD0GBN1r4/b51KTiT+Ne+e2K+zA8DpHgN9nUWg
cevUMRNh92rWC6iwvIoQrZd0he+T+/7EPH2iDk96uZQibmyK7OI4Qk159uHRwq173SvEiQu0AFFa
AgIMTsnAacbeOgW6PINIhyApk0mAClFv1T5nngKAZ/VDn34WgajSjwmry41q2AFDapi47+b7fYdK
OKmU9LNGYD4WT7oAeHUdirPL3e+dE+mEfDSZhbrRTUITs4qPsD7axmys3XEdoFLkwiY3BZmP8geU
/FP+e2oh3T2U2QHua69IghHlM6THiOo5bf+0r2MFJ+OzNA+MQlqhRGbYLxRsJ0OokDZxnFDXHkKS
95waJL5I/pMhwdWNSk+8cPowqXBEaIykHFSYW7C7gUrV+Tpivo4adi1pLy0x927IH3TFCdSzt59u
soiORBqDX9Ohu5vhZOL02vYwh8cXo13WK0vb5Mq46omS5cX8+yWGNLi+QeWKBljuydhU36YblOVa
m+/ANJb4xo5focYEm6DhE4JQmW7WhnvMqFzu/uFQYiuGepO87GfEoB5RRJgol6vUIs2oxScFbmFs
UQkHoHnSo9QU7ExW2g0xgQiOHVFfPadKtAKEWNCHV7hVuvgQ7fN/L3bz/9jPdg+kqhWhoMdCRrS+
CkAxz9Mp8IMdtNUHMxQpyYIP/EBCNsB5RM/tshpTQyaaag8Ze/Lq13cPKnk2F3+Lz6iM798ls6UM
tIFNPAQufTZyi49WWK/yemyj4G+/2pVFz23h0t7xzWv4ec8cLJlXXefhKeeI1RcgherQZx3scnfU
wu4lgPXMg8jiTZdHrNsi3bR82X7U5SJ5rbwdTevYmEzPYOE+BquCax+DPCojpklElVORmQj/dK4t
MceT9g3002ByXfhtM+LFJ8LrEykBT5rXs88zu1SthJF2hXgFu/a3cGIsR5nvJpv7jn5Ol/DIjk14
JWMPcKjPD8P0M1BmSLBrHDlRlWzu/ZLAtQh6lF8wSjPLVoer2RVDL3e/j9hA0QxabNNqsCIur0uN
aHWu8544+43Auwcer0lt8e6RTbP2TgkRp20CWrGnrP9IVMFox2n4T6STRl0QIy/9+Zchjw23/BPn
p2O/0rMj6zZC4y90vQtTZeaxNrgU2Z3XvSc36DJfr8stSNcXXb/cT35W9zmWU/3utNUdey/EIcW/
yahc4Me6tqO6nsesjU1omkm+FuGL5ueJJBi8AK/8MZt+XLAlJD5eQh1rXtEqvsLRCix/jtxbmRUI
yP9pB78HqATjr7AhJOfYA1ojj1UFPaJe8Sv8LYIo+6s9bUyOiOROmKzmdRO4fSGzlsb2W4Mxo99K
mElAoWf0MbB9/PAvnVvgNd5fAabcbcnPl++p55xvKitSz6DHnk82TkFnWm3MRooiBBws9LSNyzUZ
Bj7Vp65YU4VtlMaYs8bunkJWLxnj+HzXqCwukV1j30Chu3zgmRX/bZg4G7Prwl+//T1O9pDv0E8V
+2y4VS5aa+faZfoS2VCcAe+FYeqCLLk8Lzw3Dji9awwKItMLIcf48VZeHXdFeVDIBXily0ZSI9dN
HCAganpVWGnuMKs3pWfMxX1IVvRydwOl6Ef/yiEInbT93wZG4oE9XmmKqHb5fd/uJ3PTPXYpVtac
osDGAbhK9i/cQuqbob0N+SLw2Qft+WGWF+4MRupzFA2Xba3bjU0dd9sn6O+kYg70fxFyH/42sZTp
dkUdDO/rBKDAYprkE6B9eXnRvnFUL6hwui4TkaESbUP2Jn2mufIExn8WdZJNCXQb+OmwzKlYMZ21
vsthbvnCgNH4YYELvtcFkwxZQPpkGhjxeByI5JcZEvgjYMN54aUHoZlNO5WBwn8dtZ8S//t0VhVe
Jj1JQJBp9PppaZYOygAglM+Flv4I2UKKTR/d8118mZjKCQoVcVoKjoc5OvfIix9lJl92BlDq7n5m
cpCMa4G2sY8y7QlQIAI/hL1gsVCPYc+P0AMjXLNSvNHg7zGgtiMQ4xd1TKM2utSYNOkmNSX0zX+P
Y933DGL7DeX2XaqEFzDu1M1Y1oeh7YtjSKN0TGGuSMTt5rNADNT0yHYWvsDQnh/s/Lj+gRx6RmWG
DX+nMeQCpgVhWOk7J9HnpaEfdY+eNMISzw2kTMW7ppYS+4HMDVT1KT0n511ZhwFkRf9xlSLpBt4+
4aAwlnoK/lbBH+eTSs8JyuwwtUlyYxT1F8nqiQiLSKzwtExGxubWVsvgV0nl0gGyjn1+W4tV683T
90YA01J2Kuf8h5s1aOJlCww+60vHE27w4K2UvS9okO5wpCP5SIgtgzXaNKz3jxHaOk72I2etUeZm
TVl9LJZz4r3gDkWFDeINP1KHi7yEk5ar4aoERrEbF8Iye6dTOXeEvWBMah/BozEqC90Tn01ynSvg
iphci+QjId9HpGZ0wuSjrfLAiGhNuVNxqHZwQMOF4IvGhkVauu+V8SpkIK2VN5/07ClexUW37WqH
WKb11qXs5n88QH0mBcZqgPzoblH6f6fMaJtjajZDc7h8772RLRfynOrL2pX2njgBPP1wYd/u8za+
JZ2Tzbb00Omxsumm/eC4/NiNCE7lxo1iQKvXelNwqUB2OiWTmf96CI4xFORz6ph6Gt8frRP26nE5
MdmRH/MycfSbdDhOe1sVsSWrAr0FT6IhDXKDaOMGrnvnvcrrXA4yHWTcBzlbM/EnJ+KYNRHxrvUh
wqfUqRsh/uD/h/LXOpIA3fWFg6uwVHf+rl/25530+uettM+DgvmEO/ACqKJt9sYXPG/Isst/vW0e
fsGgQYVf7azR1YLeOb3ynsgarQHbT2hREGkgCQuKumIz9GeXLH7HDTF22GcTFtT7bq9VMzgsHZaa
3WZlrdnjNQVCjrUmkxtIrerJ2W0fwGcQ00C2R2Ga+6siqQ+BzaSGfQ3sH73ty4XBJOzsS3FwE/QZ
Vfgwp2jdqWSNZ8hAEQDgMqOFpuL7bO1rcM4CfGkLp9N9ZDSQxZyIWvCwUYZoGQZBqtf8vgzmcXWN
1vJ6zPbDDWSjL/F7gRAD79auZLM+YalfQ7oQEZZyd5AZUvWH0jjlLxOtvfgbIoObTZXpblSHJQtl
yaSK95EQht9HHrKgH2ANiZLx5FwVs+s8GTyNayJyTAquDiNly9uUliPSwhka3PzWnCmvLXQcDNGB
hWRZ/O6Scs6hm/dc+Z4bt8sFdVhEghymA6Ga9uqn7GBf8d1bsPtfWK+DhGP5R7KRGRGzZgFxJhSB
0Qg6/APq4Jn46rL4SqPOb7foGIBS5MvVCUwPKT/4c0welsxAG1gfNizdQ0Kl9TXd9xyDTQMqG49M
p7djz9e7Pl9Y9nrKisfIiFKJITS7RXCKK+ariHd6mS7KDTuGTbCBeRMJPhJa6jl5PnFS4CNXjWrn
diEju3sDmagmCmlI0/vC/PsfiMyoXMU9Z3tZTVmUhDuApXqyLWHjZqO8v+PdZwppK5uZX/W2dgMq
cnOjdbcUigqZX7qYjFzJOKnu6uF+ylfvgrS2DGJ903fQun1smDIIAovmDdUxQ5uTdu1R1cxuSwde
INdhkcWmWeoU3z/os+gD2vjky8ncrLc+nEPHh6h0DO33hIKvnNE6MblnqI6jyUc+8gEvC/bGW2ua
Kay2eUaSDTUA5Vbjx+VZEWCsX8mGpUJzTCbHM8iU5vIdOMWNBBdFhjGSZ4vwRSKrUUsneRGMcstB
eLe+tTGDxgpS17H+kVgaR4jI3EmZKBMU0zc7wbIpCnqT6mbrrPx5hszS85W5RphMqYkcOqDPVA6F
G10gu+tSy+YDgvWXTE21/eZHv6qutl50bQldw0BrZ3GO0iBQHKRt07rCq46bRxVfkOodR9QrsE0P
NZ1XEKlHx+PV1UT1+dHOov9DEJ8gTPha4VbpdKnkqNQnFPnHMyNdomnj2WRGZCulqZ7pOdoKNkVl
tZOgpFOxm5IaMoEa1p6rsT/yfR3HxZnz+liQfew+0xZvqrhgXFp7OZ9tFsCEAqkv/5fynGC02KRN
FXbhZpOK5g+Uubq/pivD6HvZFchtZjYplYT6+qlrvHQ2IVwe301W4iHI22QTN46mAIgAC8/VQ83x
gNIDlpiYxwJdVF/MXaMTTgwRxjmchjZg0srbFlxJDckqcWI0STC+kNsyOkk8V4XS3pQ3y0bK1s2W
Oyp3g8A5j8hMf/JUY7qmmL9oSgp9YTFHxLbpcQmCTm99CxTlGLSGQ0+NHBXdtxMXKiiEy6O2hJqm
tJRcFdMFE9Ib0YuYLK0OrGa2YMQYqjkv0x36TWwb2SKfVmIny8ZbVcJRwpKe1OA4y/CrgL9b4uql
bHKjIVHlAVYSNyhpq70D60UOF7Wa5hYQSiQwJ3np6Xeuq2aiJpX953vgYZfdUqOJKRZPGVNE5QxC
7WD2FhXZcvNqIiJYc48ZxrGyNHJdO/kbjaJEu7eGwelE7JgAuboewrdVp0tyNTtyGVAO6HDNV+WO
iC+zDieNJxUhYSPF9SuyE9zeAGN49jWx3DWloYHO2+VOopxZhSkLZNi9RRxF9GmYOEul2I8UNb2h
U1TwW5WH4UOn35c3QAVLjLt7nIggph3zxeVNU/qQJZYJ5RtG2drU5W8BsOHUSX+2gS13PcpZMU5K
7FEhs+2/BrjVQRsUCdPgdu/7L6DIeEo5IYlET6McMdbYmKJ6MBUqo330TvDJieG1hIWf6Xky+oA9
/VcvlV1pwr4xpWgVoRb8X1Ko+Jx/BKkYRYML34tmTLzGKyvohiak5Wc8255ld1hf/PbwtfYddFx/
USs1K0uJMfK6ZKPXYYHCp6et7y/sRnlQWS8ndndyV4v8ikKYGesGKWcTFo6WKFOi89dkQ3hyY0S4
UOkgF0czAy/KtDOAqrRQdrdTUrP62kdNmQWvd+R9mIG3EFvvN2/6QEIn7FSxuu+kUmFmHRB50Jtm
MrKUVVM5Z0HOhm7kWj7tNdFFzvqe05qvboBZcQ6iGbQQqLrU/9zZ4pw892S4tDSPwAOihQYGCKqe
akhgVs0Y/84KpJvUlz6MNG9Q2CIg8hNVnQz4XLXdp9hOHtDKCZLMVPL7Ir8k4ZVBeY2DMFnEjBSI
CzUORaYHiK5fgHW6WTUUxbuOudPSMGosIdjZbVEtskr+o4jui3+ljNdeIdzk8HnzdApkLHCit7Lr
+jkICVdwd0iZfSIqAH29Oglavf0kAepT571arMeh8+yueMrRu0gS8qIvKDMFuSZ5ZFPogr6DZNzJ
U/CNVSz4sCvMF+w9a7AwZ+JAiE1D2ViH9OsZ0+NWxrr+vFHG76G/hKiZ+YQygzu4M2QYD0MwatrO
KxJGtIV2xaIsOqQp9FXA49ZVCzYk+HYXusW1RteaEKAIEhciJjkNqcxWNx/kZtareQXqUNMv/5nw
2JU7Vs+OedsB/m7oYtKJ5e1J4bHvdcxO29PO7iEUM84vZS/fhL3FPxf7nMJwaApGFK5Li9GWW5x7
z4riPh+EL59wS2+KW0In98Nt8O2avkHOWpfzBjGxedy3zXWx5y+ergkVIR4CY7CxfX451RY4Yv+v
DAh5wHyiM03+9FXgtWRYTwuNoiU6fdvR6E4cpKPcOntH3RcuNUH85lpq+gvva/F/BdAcJLnQ+ETn
WBPJKDcPfDkY4eFAxOBgQqTL1COe9A5CLMKY+aPwQvW6JF3iyZVZq3gXaOVmSUAFU4aCe5Nyxo/T
ozdoO4XdLBwjjZ+DLXmqn+uVbyefORXEmCLxGLMmMD51HkWlfCFj6n5kZP0dDymMIzFLwqfx/TRH
KZWtzPNRZ+z2x/A/GfSItrMaQG1hIHz+ubFw+EypbAhvyYffQorTDr0bL7uZZE6Af/eNl+BCYRfi
IeUP/PcYg1tsax65tUvcNnDRmENO5g5+R8MKNiuKi2VYaoJV6UoqZw6oquGpnNvGWb3QPJlgrdsc
UoS/Ok+sIpt62QA4KULeyIrT4/v/UVBFAHnKfKQyhK7yzprPsC0ZKqb/vOdkpaYZEwMYzkDrwEVS
/vf1uOV0adqzhrGqycIk3N7YDHeCEoBWfcGmUfi4RYFwM9pfMSc+46xeZrzXoiQt9pFNYOgT4t7w
v5pYSuhLGdnzPcbnILz19SDT8Kgv39IHTPPzNXM0lVVksXZT4fcNzX1tIG72P6iXRyb/D2U732Lq
rxAsuE1MgQuR9DYWBqO8z4PF+Ml5wjzGbcyi5JwLAClg+DILP8qI+5gC26SY2tV9enXYWPZzkShR
PtN1G5OgSjmy5MqArA1vXL4IqrzRW0q+/9VtBfc8ZCoLdBv8s1Bf4oOdGZbXzsgvef/IAf5UJTEe
ZMvqiZZyG12qvc8rqhJZSy0iCCBCgqKelSp6G3keWcTFxPhb6z4nc91dvX1l8HyjocmrZj4xWgru
UpZ7lEXCTXIVg5YRCjsS5bcJeSI9EzttZa8LhKu1o2x7nWTrk3xtwH1DXThtebbAcXT/rM20rdmh
jBqpskWZIaV4Vu1EfsPf2oAQ2L3j/rYEwQ7QQsE5DiY/NzXf5K0JVJv0OPLkRihD0mPA5Xege3i1
i44sb9uBT7RJxjpfMWg1+widoxthFRXr8rQejp+l/q6/M3WQZdBXKAq7tb14WPcxu7uZfSR5928q
h6+YEu+/2w3ZQr8nEzWiFGLcMu5YDNmDjvR/93HwW0095t7ytOAwZ3s2tQlkmrx/YXue+345ORDV
ZP9XCro+pvt52khn8ZfqVUIfioGGuuzhivhxjlgZQIHyim78olC2wX8ur6HB8nBTumC5hjpHaZk0
piwzdkv4XwgFqOKMYaz+B741wO2OZ3a8dLoFjj25tZL+B/eIkWjyhc4ysbLnr8lQDFw7donO4a++
TNgaFLIhTcLsilohhOSrBZ3dhi4GvnqC05Ce0PoWUnt6GD3MC1QG8uL9cEIS8lsv5O2LSGnxFynd
/sV38hkI4MQySFFr3kJhtXwygeLniQA2GkWZyECaVt5Py64kW/e9eQOVExhgy4mvHCJXRpIIcAoe
BsHkb75xZf5fX7bHrdDTg51MK+GWCIyyw71AFGjAdc78w7QjGXE0IYqlnPkyHzpOkNfxArSQmX3Q
RmdlJGsCXisqYlc3xvBDVr075dzVraJEuW1wm2RtD7BWwYYWh7SFUiWLyZ6ZokmVkpslFTB/AzeC
bNjklOWuJTUVeP520FDS47EobdOytTnfXPN7olfNX0CJu9H/deeW3uCfXhsyrKLp+LEfP07jRIZI
XgRgyFePcg6eJMaR2DTVrgVE5knjmXcSSy4mC43GFVu00Wh9SiOvnZ9tOmJriyPgfekA+obhbhzE
ytoxprIOmCkxQ0BgKm3voWgP4hUMZ5encIbBbyxSMzWLL/bZwdYIRwo6fXqIN1dOtnDcFSUnHluc
Tx9/hAkwBNaEKjoMJzizC3jhXURolQL1IvtZvrLYQLTCMz45snYCIeF8K1NGu+HNA81CAXAQad5k
XftswND5Bpk3WzIjF91QsfXrDKWVg6bMIjVr0lVUoYD/hk2NOl22D1mNS4NuUewxygDQbcYX/9nl
GdQPwQIGLKeYius5sDmpKKBjQ4cV2l5h/jgRtSqLf4xJn9MHjhaxiW2nKWa8vk/E9bfuyHR+RD4E
USi6NzAaB/lRM/0FLqVCJbpC0h6PKFGE+FktIqQBs730EvpwtEYahG16HFK1NO2a1jjDf8NYC8K8
dXDUHZt/RhANHxPcLafffuQY//m60PXDsXVSxqvjOJsLF6O3yx/f8LpjXeprgeQ+wYJCyTqTu7kF
RxpTgmq3Q1oF03Puu7yTo5u3rTwgYKNx5U2gI28aPu+nQHPhoG8dURNRlcVCtAShcyHIrVTq6RbA
l6vdsw8rRfNpJmL1t2FG5+dLm6hGE8cIe9izoToGE+gW/WVCVSVHlYIt3itv6j4soEAhrnraQUMu
Ws7mIvvAFURsX/eNxZ9eUx1zrUzrTgf5vb8MT1i/mY8qTDpxgad3zDf5FKKtve+pY0/jaVs6vL3s
J6UzoxKEg0uIXH/XOE3+7PQSJ755dRSDVxN4Ki3gdewpVn1gKjlGmhrMTGethD+LW5cgdehDRT80
NJ+sItdHqecDZfCwEAGt9/p50uJs1qqv9tyGT1DJSUATKHhKwMo1wx367CEfTLyuz+LBLaGsVsRq
RiBwpE66sI6MUmJY/wuzBMJ/QvdtiSqgzPvna/G8PNNQXV4Z6oZyP1cnmV4MIaWTXgmrq6D7fvkV
E8g4R8wIOfgNjdYqWZ9X7/BDPSmV4c7A4KFHZQRqeshnpE0ZrEwC4o7bYxxnKSHzqehqQD7v+PWz
2xrjFX0Ynyza90oz99xsH/WBI9uiotLZAQHIqGO1LJCotipc12bZf2qccoyD4pHIO3CR1a+/4T7l
+X1JvUF5LPArGFzkrdQ2ac6yOnMzJ7gRqtaYv7EeE04se26MC9Mgg8dp7c3TEcWDaSE75ZVkn8ER
P/K0H99WaiUdDSgCdVKQoGP7QZ0VotMyZiUOLbAo94J6xBiKF779yfOn6xfH1PPooTMTGc7jpO0i
6UeYHQTd+igEfw9j8MMEANIcO/aQm0QFnBZMJj6sqOUVFvyO3eWd16r8bbfqyA9KlXOOBNtttnic
pVeGw4A4lnE1wsPLTCj+H6MGcfVB99fgOoeXTjepDhapFi0Cynp4dYWGWXkNPxGXJNAUNkbZkkN2
qoVV+MD+tH00wZ1OEF5MhhBSKtOdm9EMBMALYpLUvnQLRvZ5YkX3yEjeXequYe1haaU+hjVVIkL8
jgwfZzeahyCI4R4N2kra9wns29BythR77Mz9WQPMpZe0DqqQw5g4d65Nnsne+uGzfsZqsvETy7oc
cslQLQ+zqVu9r85FRRkOP11nFR7wvZC9zKwhytweBXzEHgjybCkSeJXYa8jsl4FM/4IF2bekJBUZ
7Kf8uLlEgaPmmZak21iMabuHV4XsKOU9O2gFxb+ehJCOY4jsxmHOg/mvpUOiyXhTbMRsER1NslRK
BseT/egtS+iTMJV6OWQMb2rNqpAkm72GuUyq6bm8y/VNqMjxyY+w4MisLIIFpVfqKL3F9CemtF9u
6mSNNcZfhc2gWVdURHDUmB0/anVNQAbleiSIcr0Rcnjfq4Gpb9wggA23HTI3j2snxevhifuY60w6
uRLX1BUlLjz0sMHMpvRWJvhM7LpsvRt+SJCJRvRxqNwbDZ6JTKEkfrh0UAkKmSlwEUnI85C1VBEw
5rFNcMCAObwI3QNA/r1ncBXHq1DFojBzNDIdmJewKpfyNobOVxnnFV2IHT2GA1O6LrTe/QAeNkyM
jW6q38Ik3uGdFdICC7Ydo3rsZzRQl/+dcI3pQjomK9Xkfm6oWNhbXu1gF5doqFkE3qw4SylXp598
Z+ERPdYuqbjfOuGASyMsCP2l7Wb/SJFF49ChVIiMUyKPc8zRotcskQhmE/m+7dfhsx967+bzSuqm
30AxoD/gkqmN2nRJAkFg5Kye8hanuvi2QvTNm+Fkx2Zy99ZAlgAQ19dQjjwgfRj4/hejMqgBio1p
lZQrtS3sNhEqdO8W25yuGT4FI2ES9ew5zyD6G8CJIs7r8WCV8wE1Uz4qdX8Q1bIqaSsILXdFqdJc
nrD5K79TVHi9zfqyzJvS6DTcRb3995quFmf9To+Rb1A8kqdzct1h/5FG6V0BU58aYH8K2GTeJdBu
RzfweZnGb/Ra1ye79z/Bsc4Ktvaeq7zwfzBLiVZcqf9cWJcpcn87FwR/P//nCmjkmr5peA+GXIbJ
T+C9OZs/o8TJw6k1d+CNoLR83K8QRjIIg60PfWTQ2rO5oAYF+JTjaC6fRda7+5425g3lEcnMPFn1
wOkdz2z+fkJnxeWHhIyQh8IkcDaKOs6xbstzxEtr3z2ncBKUMyaYxXEyv1Fq8suwYzQKj04C7fkc
NFUg6fz7/rmJvjeieeuRpDh1OXJuVahBen0pTyKfJp6TILOW2dod01OOtTIO6BMy5KPZiCeC2TCx
QOf0ggcGwJLJZVA8DP2NsgfJfXO+jdKnNBaQGtAwuGAVHc1j5DMgRWehz/Gaj3yC3Bow2CLUgYud
YC9dyFLkBx7nUDJDoQi/+sujX7o6JQoEQH8lNpYeFuoKRqWJiSEP5OZ6l6bFhx8i+okXTe8G8o8I
tho2/bUMGTbqT19YVSdhj/IXjBEksJO85pxTzyhUJhnHOKyDPVbm3r6METD266FEhf5GNNrxxMFX
8Sekoe96hoS51waY9InWQtTVjy4pjVjecGHo6EOfNmHvZuViFBTN/mH4DVWC3prPnWbqdXkPm1qS
2tmEAZxj9bha4aVfy6xMDw77KA+CATT49Elh5Ds6DnaQYuyT/Qwghm8jQDQQez/QVptPkHCkdTKl
wXzRtQBNgBizpn3e5GC32BvydSqIyBc6Qp6nDtA0QtCWOw7JhRimklSOzWV1HjZ0qzv3uFaRs2sp
A0T6LTP4YGeiUG3eUuJyI27yn1KSGV7WsdgHzFBUMDsed3TvG0z2uxdyd8HgTyyXANvV9qwBGC2W
HcSbaqlxyqUI0JefgJioQM2vTo2AjBwSGoHgl+2rUHluTJ99XiF3AnEfoUaAtvUpo90OWPJ+Ql28
CzWvmz8IvWp9BheMIZwcTfndVN8QFIvsb14k4/mP/U9qv/AAXeQji890BuPUUNZqLE3OsoH8Lug0
6hS4SSFKNuBYRidz7bvYUk1a0qt8tNCJ1oTWWgsc+D6TkftzGaAFTDQp2SsFTmqIJbRy2/q5Opkx
Mr1Kp4U9D1hpo/uCvU166FwnxEZAkPI7J2w4nuuDSDrJrG5XsNR4rqJXQQAwKpQEYA1Nfp6iWrb0
jRnyANUHsKLhVmwzKInzspeEfdOIE2RvpBHBObJYc5lMIuULRt0kYNA3zqJMOTDjHFYldZYbot0E
Eo4mnq44my7Gph6C6qyw2ndu59+xrhB5ydxaHykFFy1BdP0SBlOew29HVTvEgg+MwCvw1uSGJSop
IQ+BIK0ndnZWjrAuuX/+8BywcLATfeo4wVbz1pzCxor3DvL8X5Ku7r7wG+m/iOw8w991rKI9+uI5
izuBYvLA/146J+w3ctPaHWcY4zUr1oJgH3CjB/HlQP3nXcHCVRLeh5fW//2EWYUFQbzQUCBsuiuH
FieNlOZfnNiEdxcoJXXWFOdC4fGBWaiR039ZmP5Q7Qmk3naD9jMNjWNtAhmSCVPTYSUKQnngxbta
uN9NPaCRajx0NrmoUb97tqhZh7AybQy0QjTki/7pOmKgpZHP9JCVbzdfTCvAJwRhBxUqEsfH1HJZ
20mWrkk+0iwL4fbjAiook9nFx8eWbIjdzTy1v8B+iu1PG/yxqQAwh0+Kpfsv1iN/bunTwWo5rQBx
p68EmgT1ZmMMCDNC7LJTN2Ot6ghOYmpzz2/nkK8xHf9LEZcCcxreJSu2++XhAebXT4EuOBWXHykx
pf9X5bTkmjc2M/zb3yB6GrUi1sLNAe91doYR537sY7G47AwdA4kVwJBNwa/3/G3mEHP/yaxmxmG6
UvuJvLbow63HD88NVKKseB7ESghF4wCH8FFXUqOnePm5oog+x8DJ3UkMU96N5oaYmYCOO8XqXzx/
a1ofUSJHuDjFKaUmLbexqIWBsvsOzjksJLYED0oKxTRXn2cC1IurMMRxAUKpg+kYsFT69+XQfeG+
yZ9noPdnu4OiMGS5RFd14OUqy3HjC3gj2/6fC9prs+QxDvQl+Hz38GCsirI8k/Kq1/ZpQDif7jVv
fullc3A2KP49P5b+LDiqj5ZLTWUJ+l2BhNsBj3xPrcLpzRZ+ddUTtk2Zi9KI3vTpJJkyHSxcr8er
sEwZ2KwQ3s790F/txk4NdQCGs7XvWJToWl8oI4f1/RaMnMcNB7uy2XqMxrpU8gcAd68VzAOW7HII
WCKtGh7BRwtSyH70pLCylnvCvd/TllIoUH2xhgEt8ITMNJNHMktBfzo/DeMSsa/hpLS/7IKx1d7T
jXHfstlwx0DkviSBEhI327rEBgPfPl/LOuXpvmu5VGb8d3+TLh1tCEFlzveIUl4GUeUHI5Xf1aTw
asWcpO/EB1UX5olGWVwIWGj4srN24RY09ifY3cO9uSsG2vCh3WCnoi+VCEsj84LsMh1KBRw4RpgH
8CwRBeezVhFLwfFraJYbUAHkTqIKGPggTFEDS4Nw4a0jkOnwa2nn02ungm7R59vDp4wS2QxSa/os
8/fZKrblHGElV5efERABn7/HnBxqMzAiwjay2L75SF16rGkDj7Xr/KtuIBjEoKI8kPk3rViP7lSg
RlI791NH1WWqrJ9KCUWp0afQWC05LqB2qJmmd6WsJ2p8oBwL897w6/hLzrqOOBDgL/NapI3gc6lL
Dw2QIxKGMyZu3WH5FXlwp6TcSGum53iSI7Y1Q9BZznZ01hutrhbBg40MP180rUaYtC9jMlj8DgF6
7sa9fXGIg1p9U0nexgYmf754v5CzDluQTexAUuTt+euCDcAjzRHMyJhqxRVlwrmv68/sJJZN+ktZ
cALR1aKCsAiL2QSSaGRBalIuTqOaYRkq+jqFiLGNwKmoh6K9trpYnApmbI6zqVN40x/m9yuBVPG9
ERdsmF0lrG0Fqh5DzcuBYfPUeZT0yQayKwbCpPlTCohSTlE1ypGMkCYG65S4GMbzA4ZBDNT0zC0x
1ihslxcqb+LPbDGLz9fJsUAtnlkB0rGgIYuk6nqyAni2eDLFmPnhJGZtrxMIeaEMo/PpkbfcHziA
ppSFpF1IM+LXzzOVR2+gL0gr81sYFGfX0s0RVvalkirgpHVoAmwyKHDcXBo1PWb9LzG+GihqgM8+
OhRH21E0CxDpwZOl8QXSSoLd5saWVUwYkpCtOUuR787w6TC5/Dqk8SAKBrDRBZhPGsO1kRbNsXGg
2aL7e0LTE1ZxLcT5PWLmstWCiXjLfitbwO9WLbWeyCKG/4e+kGL8w1drFydd2S2F8leoWDHh4dE0
vgkpx2nSCoSyeYOJp6NaOfH18F2NYokvtCgdqY9Xlg/7GNPMwUJzn2ntjwH7pD0DKB8z4u7frEM5
iV1SKXy14ln5EpAPE66GYKHecgGyzIc+2ziaRm5lexfQHBrWQxGUPkWGJ9o0XlTMFOdudbKnbWsY
M/Q9OguTHD+zROSPpLSw2jOTV60hp/voOgz4/lSaxPIzWaStJtKtI12y/JCaHwI6iThYbIv9SAXb
7oozGVh0ntyUqNW2P3kD7t81ASxY1O+m8mGpvv+fKwJaAOLO1m/MuVS0D/6bD8P7lyK4aHkixe4A
1PSRQn0mPazNZCaV7+UAc39TBgALE72kZG/7pNDQAYBLgQTUNS637cME8mxgDiJ6CKp/OjujZEQC
xBf5C8Jvuymk7shvQ6aTRN7wkDKt+GHIyTYWD386koyhCdc0EVWXxkMLG0Ua0SPMbWiewpcwA4k8
j7dYs+zpPcV5b+OW8Zjv6oCQBJybd5R6xjspNTrMSPe53hDIjSZm6ki0Z42434JQC6rDWmO+eJFF
RjHQASU2MedhbEJf4x9NY18FPGmv/ZnsxUR3+eY1n1ULnGPSueGTVP2PN3XUGovW2e/IcFom0wWL
HAqaGCgoGhTxSzY2v492m2a4I4hfd5N285fNAmorei19ml7HE006pbSfrwaQTBmtAM9whM2DelDb
X1eBJWrxbUjY1hX+zVJW/J0AcFizVty+uV8fGgBhW+TK4DaV4YFUIda559QJP54WT4l0qFVzIJ95
jSLMeIiGZNHeJ9m6H0U7bQQHiv5zBybt1g55XhKEFwfHEIxkY9noJwmIG1vOWxLDYjVhTiY0Q6w0
lDgZbpYJClAg80RTf9BSAxV4gpsgFASL0vC2gaHMc0T0agopxAxn/5Gvc7JtGS2zJRSFTbEH20LR
0+o6olhexdPu4MdUf7CCvDJ5Nre3L5XRHVv3hXPzrfuH3AHAgpYMa/tAP5ktToxV/6Ao8a4q8CG4
MOKE+9AWTwti8CUsJETii97MwjprpOiJa+lf9oav728GzbH4s2fK5fa8C3aFjPwPj9qUFFqqPdEr
XFTKF3ewVWjaLlPAhWZzzo4IzZ0g4WG2DVO0fYUSGqYeTsyjxC5CU10gryy/1hCdwsjvC+T+41mr
ATIRhNP1Ux+O7OcfSRY67BRSi5ldEbE31P2Jzm0mokt6MIaQAjG24Moz5OBiFw2RT4MQtAuBg8Ey
MM91VKkzBZBWFXGEmKtzi85brBXtFQkjXCRi69ZIdKOWlVBuPtXW7D4fACr6/DMug9XS1bdkQbew
O3GGiXKMEaOcR/Btm3RKapoCJXBKHltc26MaBpQG9rfC6AOri0VgYkqcVyrmARDKzjFa2hCao9r/
Z8FLD3TWFakQ+HdXomppAwUxrvymASy1ZOht/KbcywzBvawC33V7EciFQmSmIJNUvdXZs6SHyLbd
b//2GC1BNBnUpWnCeSM4b9kxETQmCvBns/EkDl6pO57a+oFsRsL/FLuOMUIf7BVdDJmdXbX25JpZ
t3x5QiTQdCGByH5r9URfltyf+4EJECghhX4J5WQYZzHjkSBJiWcovFmdrh9RBw73ApxT3+6ooSfJ
kHtfqUv4ba4nvk7Otl2jcK0UNzbYPjJMSmLViiFL1etZDxSYtnWrVVPlAqf52tXhM2yE5+1sAkuN
jw5HUndrNqE8pi68m0FlSU1DAYdn7gK3fVTyycohGwJu4vXqL0pM5IZU4qbZEcuuZUoiOAWtCPim
xY7p7kXPzLpSzA0rgmCToKLqfcsVYUqNe/rPp2/pZobqJ8iuejLp3erC9jfdSmzLbPIVqSKXD0XA
eLQQaCParFR987jvYPfXCaHzVfIzSqXBzhdwrPgyr3y6WGNYiv0O++/tTVblMEjbLEEH+axmT7jC
iaO5elGbbQccOT3g6Ksm0R0nfCutfp0OHAnxMV1rhABqCk8HY/GDEjZUGtzRNMHUEr8K8GYIC0Cv
3Rxn4FZ5Q95KAxSBnkTVxcnlRfS1OVrjSo706wotdchPsTeckUBuKz1leVi8C7Q+eZ4wXDHTNeky
538LuvArnminFLx8Y2lA2oIpG2aLrbSw81txrgP0bim4dFbVWm8GCm/GqL7yyiaUTqQ0zjDfkU5M
ZGUJgMN64AsuNxBa4cguPogWzbdrfB1gEyuRJQpk2TLg2IiOXn7rVtPoa0JNyDLO3RsO09V2/JIB
f8Y2C/pORdf3bwEvwOucXpfbBOk00TBRYdofgMjHap/j/q9UmA37zML0+CIarYVuqjxCbbYRp1et
iahKDXLnSNJUz7Aa76SHN6lI/CaagxQZGIwv8vP2V0y5y9Z07DVPVQD+NdksPf8h8zSpqrwv3Wi+
wxcDMf2tLnSYSXx8rzLmjsNEfSxBsrFjzL+xD75zVIPwHWwQv1giSAsrQEq31O4VynRnNI1VqNPy
pcchgfnYtuZlLdDDTV+40Tq2hDDAVfacxZOE3xLA9z58uXT2/7CVVTwo+eteuSpl7bCtVToMChly
MpzOC/W81nmsphwLwWFCSQn7Id00d4Wh3wLlHY/is/NXl4YnfY7nCZ2kz+fe8iw8ngdiR1Bj5Gwu
EranxULemEYkFltmK6eL4T5jwJxBnPJ2ElRQ+6MBsmQilp9OvPSqK6tbMbLoBduNE/n9UrzG/6BJ
Ks28Y2KSiqJ/fhV9r8FTDGz6et8que/uLi+IswMQLJ5KG2GvlZ4xNZD3AHlcoe13GdQO4Cq8Vqyj
i9RADMSVJh4rCwhwkmdUvwZI//aOZrn1zWahEn+b0PiXCbKi6k72IZKLuvnsK4eSrQ9hTblCirj7
3X2JD//nLXTOU1MZouZwdpGMmRsgUiSq7k6U6Uh5MHQPucerTSoIF0xn6ss4j3hcpmNlYRHg6AXm
BQCfhdKc2PIGkti80ytSGCoThfaVgDZuj2ii6rPgVigip4vcC/DIpnsciFIDiGxUejgEbFcwz9W0
XXUHHM4ul/8G129AhSCKI4yiZubVq7sAb2FcWQ8DD9lxZYsUnIQcZ13V23TDP+jcazMZYvZ0se6Q
yx6z3/NGJsYiyeLtj9PzLSPZe+iH6ac4MYyL7EAt0YZXzeNuCgwSfbxYKKpWfhWkTk0Tf1PD04ZO
O4iLxu3APwjel0oqIO2vEnf8U4IlY7xfIxUk+QXAQ+kVxscn9q0lQ4A0uIC1++SlT3TdggnqQQcy
C3XoaHdeQqS3lhDQewTYtelzK0wee+Jo3SYMPzwZi7x/R6wjhWPktosQtabGMBfE3LjbKOQbAQno
8hWhFFkStBK7m/xr7JMs94K9hi2f7GKVEBhTF77GhwMjQSLgN9fy7NjBpMq8bDEOAWb1AOaBRT7f
N0HGFPUffS7wfnmdgIh9foHGKavVu2b3FRi/97CUnfkk6pdXdwoL5SrH59c9jmBihOGQAis+Vx/8
0rtI0rjdlNbciEnV8PcuaAZgEVU6fiBhUlnWf17qptDb8nr9V8f9ejroZ2HThlnnkfWZwjL0hT8s
vY0atf3fKMWx/jxptwuRBSgY2SOyaZMyFvN86fYqyrBzS8xa3KIE25s7+SWdRLgOeeYUslSxkWkC
Wjjtbuw/Jx+/H4pgaaH3xoDCci02Dg3Ji4cz/roukJegBEctjSWU1QD0vRa8Rr/wQH8cJu0Mc1KC
OX7rIFXa/ISuarvUtjVRIrfY7M3llpN9UX5V6Fpoyj1bCd2ieuAuI4OIuBrCJInNTRdQlPS1UetS
aYX6Ia221Hlk8UVJOutYN5p1Lo+XKawDBfA2ILSY4fnDjwCyt1X2+6b2piYRLdQKu4c4OVCowXLP
ynbDxYhFgmOlevbt+qBSzJcVNGUdIzPt+N1LjakSDvEAHF+D4WIPEVcaKZSSx78ffjKyH+FmHIum
D52ERrjbhGMDS/qMDAW2bBS7OaX7z9CZkKgte4ymWMhx1FTvxIJ1vjsrE+LYQrp3j4LVfPb+HvvB
Uzeg78fFTM1Z3j55hGR9UJa1c+vc9sbSoZqeOvqcDMtpWBUTIvy3KWxSK/9r/AtkW1FKxZa9rTEX
G02BasbGdI9bXTr9dFA4Q35D6B4yj80bddfFdNJk2aQtIyDwq0wpfRPXyKl5iFLcRrBKaDmLde8z
RzHmdF5/9BHIfzPS2vLr2O6+SWUUfslvIkNA3tTBoI4OOuiMa4GTOuMzAm6ZhEQV9+YEgkHW9m3V
wDySyDxDURBW/MLE0kLV5IEIfnH/OpYOn5vDjea2G999XkrGVdDCP13PGMc+G7H9GZbYeXOcntz5
6Ik2zhjyfuB0XWwvJcI1Lu2/eXGyvF8SVeMTdx4UPYLOynhjn5sSj6PeuSP5CWYlDgDutWdmJVO6
ZoDFVvgtkStQRVolmDdq+5aI1w+1P2sq0ejeVZ4RjBEFtkSlJJUBfF1cRFDqybN7WPhH7TGYX2I3
kc3JFGLxRBfTlhCURJRW8ZsiY8UwMuwrLE/XztIuPS181zWe2CsdGMjX8OiAzWhYuISni0OZJmIs
ZjzOBVjrElFwg8zH3w+dMNO4xz2rSwINwdjH1SFrkXQpmFL9ohmfCpgAjbucuUIeCTGSl9zr5D51
Le0YsLyXxi9sHF2mew6PFALEME3owgc7HQ1IzJgQO8GRb0k0MPXtcgT19ATTkXTVSMzK+Wq4n7Uy
z9j4EE2rNfI61B7Cch1g4shvuku8Pc9IP/rp5PpsH8yeSKnyEQqw7Vk0Wq+0/ZKsIqrZcXHWHKgQ
j8vW5q7Vow6g/HO/0D3EOdKk3V2LIX3W2TNHRf4AnvIH3xDr3FPEy5mKebOd1z26S3Kt498v7R+k
nxH5KQ1CvZZG8u/FJ4fELc4XycM7l2tog2NFj7hGO3yitwWsfuW8SYIoc+4ipEUSn9GaxuupjMHt
qSPQrYr+bkf7D3Yty8s8wA/JujIj270arWol56TuYDLsvwPMJgfQ/7xsAG8DX4sZQ4Dgcorur6W7
1w58ifE/+no0D05dPgR7yCfEUgq6esaS2a82ywoUKNV1jc2mHwSwnntXCjOovMUogyBdPfrrJOnw
VIpGm7ULsAipRhwqzBKOrE0KdX76mUK5Q3HxkxdCt7WQmgG6fEota9eHo/WhSswSBGhcJ6DbU1Aq
a/b23h6dhe9c47R76gKQCC6jIRfEpjM5QE1hV1K+oErVbBYGBt7T/VJ0CO7rgz8/Aj/zklUdm1yu
EsYRgiuVlRZdFRNEDya3TlUp4FdoIf6vT+vcZUnGIRVXwZZsCx88pRXzawvEvSrsfwjbkcH4CwhA
xKeSXt03C2wRR4x2q0RV2df0iUb+PWNO11oVHn5fn+SpLxfIWOQeWmwqEMI96KzC8qPOOXwmwWC4
jV+UnxfJtrEqR4HZB+WRqa3m/tFW4tjhDfgyS9X9RSgBMoaAz9YAeciRomQIly5jmX+Ko+xwYwLU
k6XHVFh/1jBhTr8xIOVJ50jafvkyt0pEJUb19DZMy8N5T8f1krMby3WUEFQQ9aYrhNbHdpSr/qtv
wPO4K5eFCfVS9ovS0dpeeno9+O4kTooHXeyFEc3IR5i/DVo4X86ye+nrKRkWYXXyB3VSFJUo5v8g
bihS9lZDV/BN7eZZDTKGkosA8Zip7Mb/9twAxrhA8Qla3Bwn2zSz71ECQzFivAp8NvkZQr2SusPt
cNBMITBHTtQamjJ053zpAm8KwQZnckEFNGkx6U1WGS8lv6Owp3sG4U3HSgJEubUj1zPctsfbWZAS
SjCVpd3Psbji+nd45LnZY7AjclcnF/jVlA8b0le6qwZnRsUYEiHIjj+ORhK2XOWTgThcrC9yLRLD
mmcoQf1sgFc1/G9I/wYMxRRZfft5S/B+uCy+8C2FuEX14rAl5XRH6OM6q63mv/noX9iyi7bjfRUm
kkODbgTdtA7/df4iK9jyRePPKu50RaIW7jlR7qQM5Ho4kOIpvr/zSh0DzAvVb4noFVLiChBcC3ES
ikryue4u3ALGq8GSwIDiMmZdaAs38yF5VDa2TcFcraHI1TbS7ehFpjkprRYgyzj9ZJUwajkFEn3z
Zu3+qP54itcUjXvwg8UIy6DcrjimQkXTp31pHRRC8+AcHABUWo7GgP2O6XLXm3ZKdsM+ArFbwQCS
2qRYuvjdEF9hxSrXpPu70omKTWro4cPzG4To+QjK4dTHnxAz45ASmFkyJ7kAfNwGBRGK8ltef3fU
dhJitmfsXxnT1yfCZeJcOWfgP/z/dy5lu9N8fqB545qB8N5d97Fg1xmPPMittq48TS75Mu+ieBxZ
nJt6QXzBo48S0n4w1494dDjxs+nY5Spl+0wPjTvxBrJc7a6tkGE4OrcLQ2iBKq16+fEzXxOfd6SP
zvzyGLmdYa9Qpwxct2nri2FWocKM1huDiGP4r8ZcbezKLpi9UW4mk9/tbRkh2juJ5dbFWyPJSoro
oLSVXTeJXCwq5X7cq7csYEuegKZz/U4NE6zuY8KRWPcNitKWaY9EgyDhMCX80X8OBzRnZQaK6tEj
h6kM5Nz9G6JTPAn/Bkb7q+nL/prJ3R3KA36cT66cj1rgkxuo8I6ZhrIrI/qdfrIe7cNyehVE+pnb
OI+6OvF8k1ZRNyAl4VI1S6Kvn1xYYbmaFc/qzd1md5XHiiImxmLjXfk9oQuPFoqHR/PqBef/knvs
akCqm2h1/6u4/0rajIq83kCumm9l44u+aFXFczF101CvnR+dzFiedmUZLZ7+14HnBRYXgHNIhrDC
qeTxatDfA1RGwHLFx0N1brYfLwk4jFbpqJaV+/fXNI7xVoxWr0orZu5HjXbOJYyZYN5B2xt9ukpl
BACBKZ+XojdI8ZQQ6qbgmPdB50TZm0ZZof9QmuHbbHHq2elgdytJq/UyKtZNzNZnu1diblgQV1N+
rzG6GebioRO86MQ4OL5ZpRbVglW9BKNSWBQHDM9NdhrMdaR8BMrOCIY0Xr1J38gi9QP6rVuTFKnb
/gG1w61A9KqyhHez45tTorp6DWAB+YE63mgri6NuyTb64H2Bw1NZxVxdPZPYWSSx0UIQEfK0/Htf
MY6PJ2arjBnMX3ieazqo0HGGC3mPqVtxqz4bYmxrU+3jebgD3wLNczeOl4z5+hb5c7Pmuht08tdU
Z5JglIoiT/mC6yOmCh5wmEmqox1ywyWEITZoBDDV9GKNkKFwAl8PumEazZe50BIwSgv+Ubaynyye
ooLeRxjMeEMpWD/5zZ3gB2ij9UUdYIyyumocRZO52bfVbVWfW69T01YoKUBv/rdeMmbsGOsZj1G9
3H4aOtLs8q9Joqfj+2kZWn73hehMoTPh+7FWYXtQN5XczXafEakVeANTSJJz+tdHOcK1zf/fnfT/
StisgzxOn8lMEBD+kTjYhtY3eScBko1Lbv3LQx0vXBFyLnvZla7XtmZNJnWXxiFi5HVRnbdH6JO3
F22aRCmFRWVni3G0gqOq6jS4i4Ndub1FRXifETat58nOjiD/48HhbFpqY+paNqpkocnhf5ucidNk
Rl+61qyDWB9/5fmQgbFsZZMGg9sDiiw/q1TO8LznqgAKyHcRi6Ikhpf76uoF6GWxTMi+S+i03O8E
rs844OBgO9/LCI3WfHzpN/8nXVnoTda6IphQDoWVflFr37+DGtPaUYrQY1jsS54dLQTxwjjO2nPd
y+qJlcTdy8g+FBxQvCBa2tWPTnYuY9eNS/kRwi5BuBlG+aWAcCitowaVWiWiafVGn/I2rFxUDa8Z
RkLR5F7yT/jaiXYPpmivB0Cn8rtdoKSHxP28lBh0oFLHJhKjF6rCiXF/i6Wkrg9yGdPxh/r6Jskh
p16I48+yCRuj0z8a9M4fYk6wClOVJXVnJNdOs50UCGao0WoNImr4f13arh2hTu47LDbtC82N4ois
3PEz+yuJMFVdfkd4btLFATIPEt6dovyBrMBTUwSaI/HKDdzKCoooH8lcZj7fk1xI9W6QKx/0GmS+
r/BbapidHIkEbsXv1t2yrdRGN5TS6fOHsTdEKD7ypGC6itckwF+wFX9rvE1G8aPKevrYWWYx1aJP
MVvSRJt6TgNMW3Trw9tC8HtEvlL8uVXLtealH2k2MBuzfTcftGp3qb4F0DbFuCNeln1m6+zTY0hB
j1GolX2A4BFgL61P9JScf4/9FmOEUILZQOSFnuuDstFuhOdf7cc+0ORVsIU8kO8tNcrk3N6fyjxX
eLYfEMIhg1KvvPO7Kg32pf5pvZsaPXvAeY5lUvpMq6Fz0zWA1a+ywQmJP3tfVs1QfO26k0aAodmb
vuj3a6bnY1F/LlAFfrN52qAqzn9GfvU1XPUa7fG5LVq2duOFRier8BoEY5GbX/kTsw3d7FD84A5m
tMXOC2aa5heJ376lEjJMjVYprvQOBwE+jq9h+3J3kURTWtM0rDHvuaKm2kUi5jz8FWuHvgTy447j
/kGdhw1eykoyJjA2RSKvu1FoMYWQwX1yVuGNCrSCbmfrv9BL5PTIvPKAtJKnLlgV4g2rt81GDOfx
csZtX78YilNTdsBQkctC5dBQWx8wVpSYfJ0RQaGSAcU63Tb/k6dioJ7+52lRWc1PrmK1Knc9lmLL
0V1iz8yGOUXscLdZn/3gQB9jCMeNtTjo++k/tFYWCJj97zCu43+ohrgCNH7SpZR/8HB/gUUiPRiY
kUviWpZ05NAz15Hs5D6OAvpOySOxETZ+frhjqIGUpTE/w5mNhpvOBVkk9ZtnXFUaA1PxLoPxZ1Nm
KyWjhyWw1Uf3tm5kXizpdHa/HrSHhkcC2BNpWRjLYMzuXciVguBDFgEIJsZU/HM5tQvQxs4hSePp
SzRLK9Fqf066xHSDiGWweGXNTGw4lK8387EBOnTPgBIuMT3+dk5K1lSnfkEQ1RN0TvH6uLEZDsfJ
VIjtvmxJi/1QISUr2Yy2W2syhfQRQItg9alfWB5plpZ/iY9znPrZvW3AwhWwIRLZ/rzFETA2z4S9
DXU1iSf/DoW1co2GIo6D28QRR3VSdw9L9a9ZfskAla2p2ApTU4lLNxN3DspZgMCo8WtGyJwetGhR
ODaPhhH8nvGWZro2Lz6oHqpcGRoiReZbgdwz0cdjN9f13czBSgmAli3BrMNp4bCW8/8uJW7i5Y87
tz+ngu0+AppirLavUT+FGzuk4bKEUDhA5D+lEz0VZBbWpcXs0R3GdrAhiT3OuBoUmnYdwCOnE8Lz
CsqtDxDZb0xsQIu36LkrAMUznRkq0LX4RfTbSDfv+1iROnNZEH5gyo6Fjn4o4rCWXpOoAy4+fQBK
sa86DGO1SsVLmZ5j49UWfR5FPJuS3WL4B566o5cufCv3tEDiQEuS9tlwJ4LGmvUqKMVBLr9UNEvu
cgZz54sy53IOxE3a8GzAkmzCDeFYjGS2QjfTi2QtOVrgp03nCsj6xRf8riPurfR7rw5cSDVqoLVh
GpvyNETZAYMmf5yqYnl3+3WHdi+cK23CkxwTAnPUE6FRMg5P1kZRrHLNVRd/m2fz/vQ6AUjx8tcM
+i7pb1GbYy0MUxsI+vcKdZcsqankvXb57jFIEKvemvwX+QS3l+S6GOW11DkyDy9Z/m27ChZBd0ng
nZQvLw5bukZmqBk/8DRa7bPz2vQh+sMGTxFbSuRgZD9+T8aVMAbCRMZYqrZOc1RAGFruaoe+VAb7
x+uHz2iFYOjC8ofznq4OPc1L+sZizAqRFfA9c347m9ARvJGSypefT6Eut6TZ1nX/FjaumsOx2dme
23ofT2tOpNWrIfIdDdWpcT0JIPIcTKVBxBqVTmLhpXE97AjdkqkGgIWM1mW/w2dqnyc29RFUYEhm
GXDPvRA0Gday1gBmEqRqbYgHX6sQo1TpZHfBMaBNl/eQIYuABStMvxJNlELRHZzbdgwmfYBh26fq
wUjIrWkg80qUy+MgZy0c89SagGgKqULTLhXvoIErKxmDviwXqfP0/+maB9zAOlbkGAa+dfMHPY/k
V0/cshMhfdWRz/qzKNfU0a2pJmQp/fwoCSr6kGRb3Vgiz4IHGr7N8telxZ/53A7v8e1p8ajXu8IL
S9fu19ej3S1DHuA6Uq5SGisXc2MrFMCVqCMDdUMfaelSKq8wpJHk/yfx7GACHwKKeU1Giu22+49Q
oEyEErvH4kqR0fygDe4Tiy4Mi3h/MrSbmJkdqoQ3/5WncLmo95iGWmJSleeBDjN49QIYrpT5H51E
IO+eI2H1wa6+byOlBDjR5t6St/Chcrd26LORU6F1bZaS03tb022Wc3/BQRoKsDGMywr6EeV9GK9r
usWsBtLs1R57Yoz77ESbDINHBk2rciw0Pah5Z+UXQG7oqX4fQbTwiU2o4QJWo30RJ9nU4O4vKxJV
so1esR3YTEvXJHrcPXQFOzpCfubZYolvzM1KY4/8qTl/sCtqxl0jk/XZLggTKhUE4zYbYBQYDZqI
Pq1BvhMNbX9jl77dknvpCJa/I6KzwbEtVHiQZvK8mw8KRYmyEiHFXoWXWV60ex+iNeb9ulN8nHDq
FePqDcA8AkSn90Yvih41wvtAQytTOqwxLFDqADtr/n/GBwl+XydkaVbkc958RgVk6tKCR5M1NxDg
4w3ikDE++mGCRxfhf64esNbM3rlO1VqnCUzxHxfWshtGx6Y+GHosVUmr6CPa9O/hQRFqDOkJ5+YZ
83pawbIXOMYZIamCu0w6g/V8Cm4mIX7N7VEmnelojW0LcxY5PJsgE77CIQspA5NxQkFQP04gXdAu
gozYGMFEZz7nStARa/j3cYBNRWyddRLovr1XYa9sZfjVE/GvYoW9AP7c31C0AXmQdIfNPptb9aig
m+AjAeyOzWXjltNo1L+kOIF5DcdfpjQugoiBVkLqdB3WxBrMij5uH8YdN99Apsi2yrgFBLC63Jwy
+CHSi2U6mc1o6JOpEyLd/vCRKv7B6uY8Kjwx03L0Na5lwBpFsOL3KsHK6QQMfCP+aO0AWDs71PSt
2L503LZfKgNfquRalAGGoSF8B7QXDv9zG//+SUehtdwpuFyjE0qT7h3mg3NPPjqyonCb7rZRgBAc
nFClew6SmkQQq6Ao7j6u/euq7WFeB0FCgk8ZTbtEKoGm0PaZfvMk11moGSQz+lv5z7DxhqkfT61+
634OAcmeiMdl0SkvVEdEjTI/NJLYv1k4d+g279EbfVxcZXa0NQriCQR0DFSd3zWQQzcdtjd0aJ83
fKuVIAz0kT9SMG1zZF28LEms31w8vVzL4YzIYim6A+Qzh3tdlsWtofVVyTh2CXHMOWXrIdhf0qrt
ah0bxkdLW1d4y28ktjLCGmc+phiTvsaILb5OJVVcrKkMalSLpzwrUWSqPZvrRy9hjhU1eYPiRNC9
J9JEfQJ+HD/klQHA8aXCyZNCMJTIoHBzr/yHHZMJpjQmtdLhUHyJyQcqUP4w7RkXs8M45K4KXdzL
Bxk7TrZ5gHXwu6Bss5K2DsvzAoZU9aEEyVLb/lHHgq8hQIdDdocLYBBXWBGD6/eT5gyyBXIAN2s0
uSvRDQHcgOPvbTt60aKiFx+RxQIPB2A0g4v4FtLpXGRIqsO8FeM85RDklafzqf1Jlaxm2qJYc8HO
+iL6govnIg5dFcMsHd0v/+/MPBMgwmmumCZPxcthQO9lUx3Ugl3IKnqZAYyoz7+Z5JO/EreMg5yi
/7HdKu9X3srBTH48K0k8t8jxeJdWtWBUgWA+eEIL5l8ylfLA7bca8fitDbxGgeB29YV1tNohajVL
tm7oqQAaBEXpeTaCZrkCIpocvS/QFgUbJkTdKLOeizPucUpqE6TJQ8O8W/f0GOmEhuD8x6CaopEQ
IGH69oJe6fyVYYCBbSx/ps8L1WZwq8L+IdzN5kSOLVg8ECkPaKg6w0C3bYrPtCDk8rzm2sPkZgGC
jKv7h406OEDl1dXIqE+B0b3h5Kmlch/O8jwg7JNbb7cRPxdYYuVnP3oVwHAfH/EjmR1MCmCtFtwt
KgbEUHdLjmTv3rSDsrjxf/KBvvMen6RBZ5pGLc+a6mFiuz2NxBZ6l5LM7BtCJlrKTtTazMMLZ6RZ
rAs/1AfN842hW4G6pCIlenmfpXkDetW8D2x0o2wKf0G2Sd5zBfLYbZIbnm9K407NpxlpmxzV15vV
d5j1qAZOb9G8aCLxzpixScLD79PX13w1STGg63Qn65E9pZl5SseUqVxf22eWwGM5vIy54Nd0kXTO
hrpwZUZrB5s3criWJq/Gf9GAvD1HPLeHDH40wC07ss7ApcccWtslr4vtTwmzC0CsDhJx6yw8yGAr
GTZf++5oy5tntn5Fgy0oCXfUkOdVDwZk6Y0XPQO0ieg70fQrDLXYG1y1gNQPuDcwvezFtLtcgy1+
M97bvFIogVRK6eGlnlJDq4vTULCEzBp7g9Sx99OOK03nw96DGdkH/E19h1EmJFSNL72lfNzOxJnh
pjChweoRHRAshz5hiix7Y2QdozdFPS3kQ3x9F1iB8OpRC7Dodluio2zhSPl5h848T6+Cdz5BuQ+F
wfGhpscK2mB4mz1B36vDW3djwKQc7zRBIZin24CWeaGJAiQhBH0AJOORgdLNp1nvG/SHDMEK35KZ
9Sa2jZuX85aB4+JWKhN9Ltpvd/59iEsPunRy/jXqtZI9AFA6u7ci6LEPN7jqJANDqSaxY1a5Mqbr
8UnfDSc+tefM0i6sEKobrQbIl4JWYmLpj8fR/LsZAaCto66Rf6ZlUAK3a1GQ32t2VxF+ERaQh/CT
zLkXhL4tlEatqVlVvLLUwufWsnf+qOIf9RdUiO8fgYYTdo61txZZc++PMbQq3IiYDSNotxVl0dtH
4OR4UYkRzy7+KOUqJEyDpLntdumdYkDVh33ghiCCm8zViuKe1UQ5juWB8CLQPVHJW+lX779/PNKU
dAJS3cSdzXd+rV1n/yqzBodW/1HY29EReyQrtfAFLzPsMqu9t1Zu3vemrwvxybw2I+J2RUr5mJZ/
UodZ3b9aTTl1c2w4JfuJcR5w5PTokbJvgY0mYVuGCd+I5Lk9rbvPtDI+9NjsA2VdsVCx/EZqucbe
VPyDtl0/sz/MIpE0PzCXeAZxmEF19oqpTE+fd50eUBbpkVv73Y9P5PBmGAsz6dKv3usjiqKlVZVH
gpZozEP/td2crDISQnCGO+Onjb3eat8oUQM42s9SMBaGCNZaKDk8L+/soQmijbo9m5U6VMa/e/TH
t8OYIacCpNz29GzJek0pTAFPBDV4es9Z0EUZovqeD/TsXgW6S1KEUGTqOEAYDQewrcjFW2gcwVYr
TAC8SYnLFLgbSziZV1sc9NEGCCirxemAkbPahgIhzLqjAxijlMDhI5TUkrQeTpORh2SYNuuJbvi3
TaF2d6Eb0fHX7XpVbzjesFhhYST5bhT2PeCOxgsmTpjXGTupHg3AIAGOSfGNWaTVK04U8lSvNrU1
6KKN8Y4ViSkhdj+su5g71r3UxvGy6oH0o0gQmiEYyWWJ0vQf+BktE/7150uwUTJd24QanZGjhAew
fFT4sNBL2guQZNGXMx/NFzU+sf5sBAg0sD+ygfJblYfU8it4LMoBLxS8/j/J8mbwbIYTvp885Wtw
D7fc1uul1ekxHdMyr0Pl4C+QpKuzqTZ1uxVV5bypKhAZUlKnzOIzGSVxOvhmr0GgzkPxXf1LCaA/
51NDNFQp8kb8D6CLNqYM9UR5cqVMlmpU9tDiqSjnEildGHwiVHxTlCrRF79neff3joPyJlp62e2h
VbVz0fuBgZ1CoQgKmeI3lExqU58Uu5CRqjlk9TRKjFl9sZWcSeUZ2uKrSyYZLb5q4eDbyXssidB0
rkx0IgugyXCZUVumGo77BhRkKWeVwAyFW/AavJOQY1CEF6DunHKSUbHcrt0Rg00l9eLMKMoK/Dit
a51r47zlJq0NJ7rv2+Aawbo0FSiT/XsdJEgwsGO4gM5JiUNYxe8rVMUTsVdtVEgloSrgfTLU/GDn
xJePvzH3CSt+sq4xfiAifm0mP1VKmb8ycpiJrwVV3paVi2P81/ceA95prpSlK/StwIchZj8ZA/M0
F1XOQf/8xOHsOAFXNFWncTFRCt6cx5ZN+34eUsfCYI3S84iUB9MWuJnVmWJNfKEB/fuP/P1dmpUj
tK9/pddk5/4comNSpnmM4HnewuNK9Pnf+mtOVtUA6t0p5gct1gSIJuexhUUm5Z38D+PV8iKbrsz/
L9ZZUo2Uf33QIVKktlU9/KdgxLVvAyWXFr2ryf/1VBqh0xgznmkAQ/Rq5zuTPpcJrtLfLNXFPO49
IWcZAulv4YFdkWWymiquC0ezaKzrMdlWv6mNWpZJ27aXpjK10Q/+T1kpCwbQsJhcx0rITsvhLCH0
+fgD5J/GTTgtrgGEjXdD2r+HhZxvP6bEjL85F5OYviHfi35QdJbSfCBu/EThGm3SPY1lzO3mQHuU
AkOd64eQdF3KkaWmfYooXuL93tzZXhV2N95l9BBx4cpJLhT/zsiIah5Gdogsd/TaSGA3Oy6OPmBn
J8yanHmaIkeN6ifqBeCgdvJA8hu/DUzQEUmDykd5QvaxXBj9yPeS451Bmus6802h1pXTVkSxINAJ
FdAfdb4ty/1q+OBHK7KnffZc+S3IJPhtUlVL44vry+z5zLI9gPygaSmkR1xsTrHMIPpk3VtCiJ3x
FPw/CbJRgliXZE8Cyqn/YRTXYC15oOqN5CQnSdQCHZjFjcpLuZMmZ3AXR9c0ltPpeGOG4r+ZVSzb
YUvc8EBLJ+iG1hFRm6l82t+ZjisLNBJuiiSoa19BPuH6FgINwqBjNhjtHXo0MAEICLa9uIMyTZq6
Uk3gQimCaOKqtNwcpsmfjsVKO2oCIXyfJrUnEkQTyyKkCLbuyiEsDtcABAfj1+OiDmMlBZluMepp
lsEqQJ+7cdnzv7CKRfgF2nPB9PULp2p6uTgx2QJGDjhPyxLhxIEIAsug7WCqDrJIafy2nWsBQDh+
HLwZy4oSompsQ08ZiQg0wd5sAB7/kOIhaS2pFZR0hs7Mkm/qLvXBOmDZxnAFBz+mryt5Dkxo7/Eq
VsTmODvEf4wsiLoY9tIClrQ53aakEfg5KKMabFSBYrczvWf5ZTNUhVdU5mQCVXHZrAn5wTr7+Zns
gU0NzleTMmxOpzsQej30G238AZIRaVuSZvN8LiFOAoS4qOlWoRCXvws/ETl9EKtxUSYtf15yPxg/
fqJxtzcu38bY+IruEUSqmpPYj7y7fPyBqCSkJs8QhZxwfrUq6MDp09UbVw0SqpaOg1UEw6bXnog1
/xSaD1fNz1S4zsbX2sTQe4lt0aqK5JTx/bb+GpR5Uc74QU8iEUI59DNiKf375cnZcKCuk9/a7AiA
x0o9AQEUlwEdtgbrcK8rgRoqi1GRIUbAwjl4qb/osHG3hAznpgfBNQxV6Ksa7u4eooVqwZGLnUBm
/TPqsutsiuIDbwHxAMfJBmDKr/w54YCaMcv3oTjgCvQ1W/nWPKrfpzZtPKUC6AIxoGmCHLOAXT0N
Dwp+XMd8l190LcrRdQMkvmDD5JL2LFX70bsNv2HyIT3UTtS7aJsy2xoZ/oJa8CyLkm1hzb2m4/dL
T9vAPbfEWtl4jsxRHVsis0/reH/zl4mkMN8zB7UGzme5Y+wJuQCrfteHOFghG1WmJ5iPGzD7UOuo
caYP4eoPgEey1Y+JZEcQQ6HYoYV0QlYPL0/uz8c7j9hEMGK0LueAuP8N4atu7XlImrVir+mtm8bp
7ZlN3hSHsi5Pb9NNAoL2suclyr6Z/W2k33moUPRmYi3L2Gh010ROOojeNdq3a4b09c9h13SNuMkI
dwe1XmhgSxgbEm4bV8+xr+8H3kqGIgxEG1gmH09A4JB4p5KMIFrxQVBFxWDTp0ugKzECnUOid5Pi
2AJhCKCOCmXYtEYiu9x/a20w6EdOI6a3PkmbxMdIuTDRXa+1zp8BYEFI5RBMFa8i/nCnYg5tcAR6
+wbCVo/duGmzWZhTyA55bCVtJsNIrzRxX8BX/6ONV7m0jpiIFYu3a6Beaay98mpdluS+NhLj2ceY
1BMcTXyANOhtZks06oamQWcbfRwuFnLiFS0mLaj0q0aZQtCaCTwWqlpX5naZQylPdboodmyLhNH7
YDO6uHBqx74+cpZ4lJFX71+jiWcXJaMmHMcweIn6UKFdM+fVT5DH+71WTsvqIo1kzmqt1HGftus/
XWYYr26chv+QbSQFYc69uUvuo2FLMRqbbwn9YSbrhx2FuIws9OiA22tKNhlUxy2EbVGE+PMJZpwd
hTKIGNhPkQuWMzKkhtUlxKmB8zQR5GVxinQMUIFuS7NQF0A7i/dxjmRdikzzX1Jr/FRdzSGMp74T
slgmIzVdnFCEBqJqQAaGPKT/Jm+hT//Y75BB9GZdlRTNCWX6KpTU7o08OhNTpZ9DVo9sc2EVQTni
bpkGvX3Wu/qBy09Qd6Apl4WmMouO90bQ5pv2k7XY0bLKhj18dd9hN6CgmEpL/Mj/U2A5fQ8bQ4Fe
57x64+yavwMr5nFvZLp44IUHHL+JVVA8WdGPpfo6dsms5Z0JSe5+QziRCkEJB/YNdQqq2vIq3jd1
Q/GvhZAFCQoVRJAUg0EBmc/BD42J2HLBVqWgvZv9hqstLpwSALzPDHFhq1JHfvQhh6EdvVqWPLai
A8AN3pK41dQszMX8m0FzJqmQWRamcSg5FN4RWAVTELKVzHya3tNUGKfOnSg5OZTh+yaQg2/sqT6f
2qBf3/bMEVlGEXQ1lCGR2IEz7pEqfkv4U4amS8+wKAw1JEkKQ9vNOiPhm5Mrm22jblgbz1BdQY2/
XatSpG4yteE5dBcD23aGhfsWc2yq0uf+w1aXCTo+hrHJDtNAcxQx/1Ob3jSfDanMWYCy2PbC8y3O
YtF9FMoHdqDO1T83k5dX7QmatYkGQVN2YPaemedBZ6YMYPODmL5UC08hd/+7o8y8L7r4DcgS9/gT
JLxyriXA/FlDayz+gianmbAhV5sWjsMIZWR9uFL2T6ZKPfVXI9My5B+TdLZRukZPD6+VnvQk1mrh
nmyqnW0sD0+MXjnHAyRsIjm+fmsvbeP8hPDAvLd434TANeXLxon+at92QytiyaNEG5xs0fAq74T/
6c6qDirZ+2tqJOMaieQiVSA49Bf3p1PrHPg7szGENcXKMEFP7vlhYRn08BvY31Wivjinxmqvzds7
1u9MLfL1w5JVNok0HS+GgwNEV5MIdfgvU+dNJG7DvRbZ4au5/wa8v/+sY8UTwPSH1kIEyFfMZ+4g
S5YcG5TBIMK3psGccXVapvSVfnwasuKtvI4pvkE7Gq/4vzBpTY8EFtPVkND4xMsxPKakguRTGJpJ
XmnX8r2z/1wn63S8viWW/VULPOHyN3UxIXQ+0B1Mu3bC7iJIBX2FGqURnChjnILIaYp92pQglDbj
3WIkm5eGr9+oF+fvo5wklNm7ubBVnfVNfABfoPYRfvCfnr8HsQ7wTKl7kPGIo2oc6e8NmvLO0UVH
5YjTbrAaBvCRAu+pVuc7ZEuxj4vXQukD5+D7H+cEzVW8kB/tfiYQ6kyY1mta+uIFDg0Trl7/861N
HRWRvMjZZ/0mQ/6tDczn4gk+UAH5S1TZiiTL7PThiI4cccFUWZE8C3sbfsBoiBhtXMQrmZfkIPrB
jFmyKqRxddTFNFS0ccmmZT41LKEGwJdqhS6cu+KQXnuPQXBxr6x0ZeazPTecEZZ87brHanpoScd/
HGToBtflXTECszCZS2JU7C/R3CyK5Hasu6N+98/tlpOWD3k9FkRgle9Pr4H2g9bzcu9ou/JCO2pK
n/k3TOMdF/o9X9g8o9Dp3TKzkMYa0vTdNuFqopoWMoUKd6ea6gn7aYWXFFEY4RrY2VKk+sIcy0Tr
zlH7DNDbafnSDu+P5oL0M3PXEJIEiEgS11Qmx1izlK2vb3nb61dwWC/HjOeH4Hah4R12AnKEuoAw
NdqZSTujV4VFuykoWDTqhCVbHttyJZGTbxCbsKcTHmqVNDinEHrusVa85yfBsNMhZo0ofuZZT6C4
5/fjr0yBkTc30gd3pfot2ZDMCv9B6pjrgWAWUwbhAbB0VyOf3+XhO30XBWYjM85Zr2zX7ng5I6yL
Vevg4pbSzXuXPrg/vDQNuSl9Rjh2BSUdFNR+wNJd81JhXPFunixLoq5M2bKAw8hxCwSm0/39LOAT
CbrCf7IKG7tUH2Ghk4gOgY5yomkDToWwXo2vblrCRCPFNhh+GnNF2SdU4iv0rc8FZdfPxoKii1UH
k5gzasfG+oTf6QPAOzdoPHrVfz0bweCleQ4Durz9xXaWzMLK7x7nA+aODYFSUMgdb/nFatUmW/Xt
Rg7YtX0xfxYd/ecEMM39gMrKcbbHO4f9rk39uYSMOZVj78xnKE62j91HoUz6h/MgRCQI1FT5czA+
b5hceKpjATeD9sjR8qmq3u/p3Fuubcj1IS/IP/YixnOUH0lRKbIKFDyxidzh1SrwnGeA8FpmChwB
87VcUlULJNEEqyVkc8N4kxybkt7HYdIlwU/IrrQqeistMjcMbCychp9UZiZPylfuuRBfJOAC6MR/
j/WesokvOMpBaqLcVwb9vbdSKOzfyUhfEXWzdWp6vjDoiMOTIspPTKVZp27J3XPgqfSiGjYXWqxG
WKiizjduVjQ/WMM1Axv9ieKSd2sAULbjmYVzUi1JuGtdn9PhZafCzACSxBboxJHYVPf19+dc3WLY
X7Dk3rOQ7nwqvp5uDzml6dtzB30JmdgRvGOWMR3xQilScmqmfVNcKIEzh7MnBuxiR7jMXqlXeB08
V3buuIzfNRHiF5cFy8n+w9rdAzx4RrDK4FlJeZsC2eq/kU9Qql94eQcb2R3JAq36ywpK1hRNrKBY
ES2ypgcDYCNXwU/G0i7JzA1sfamzGyLLm7ZIAvIqkrkvkDJkrAYZdrK4jLaJWcdTDg+9ajhEK5Xr
JJ/2dlMKa93GeK6g43Q1cEYJuc+KlUhmI6AKNXr4h0IBMx9h1NahJHNKBn/lGJ5xycH3kaMSOj+I
jvwZe9vh+JrhsBTLWktM8NHe0r5Vh16Y16/PNPIpp+BZfgdQJ+bigdpN3Foc5TA64XAemS51Fgpo
x27s3tkhykLQ7rbTm548OqX/H1sVMlewOUIbZOjRAnSHeWAkDKZh7Rm10RYKb7b3IhqFb7KD7pb4
Z6+aeTsciHPhsdt8pIHNY1Dx54Ztu2irH9W852EV500TdbTb8+i+JXlM1OIRooAE+eWbyksoxNJK
smZY8XP42qnVLVpQAk0921Lf0nFGRAn+Z44oCO6ciK/CD1kSoPINFvUwGLhiC/PgLXRvwSj5lR/m
O3DCi4edMAw5iMGHTSAK+QkIuHbwU2m9BmERAJjIA9ix2151iBOfKB4bAN2xKjaLwp3iQdDPI7Sq
D1mgNp/cOgtjlJTtXy1S3rtughBFmSW4Cgq0w9z43SBwc1p5rE8LBYPJgPUUr4hDM2MwwTqfMNRu
Vj01mBSGVpl96mTpNZzxZwgCgmkbaRrKweR/KvWH1ge0NYGG8XRrkyX0K3QfJS1NQXYHTrV5V/q8
kYp0UDrgW4xU4WmB1IbZnRymXSbbIxgahGBftwXlIA/SGNi6uCS+Qs81KKKzeGwiFIBzf1+riQ9B
h5j7DHLC5IyU46vVwObPD3vuh2zcwYlWj0ugh+Efm7FoPfVygl6hAHo5Dyj8+VBXNQMguPUGEuwi
Aa03vMPrK+U3i4iFKVNjUKffTwU+XT7hMAzIA3Nat2492Uzk4JWp0dw34vrktVRFOda69C+CLE5c
pko4hEI07gQMQn3qxGf0kvGlx+QpYhhblkaVUDfwVtZlzFh6YztAm3/XkKY19hePdoQD1s3MCK/z
vcRsp1DNXaPOlWk4ntm8A1IcWNbyHotB41QOB0eXZcD2JfLm3f6gcBLnO47svVNgoeWOdT6JlQOK
dab7/Ub7/Y6o3KZPxppc1tn9YkDGrxs5SO1T/wthZe/pfV4i+XuSU3raGDRDhLr3VxNPaRxgWvST
Gz0kLSqz6ZzqEuh0GSn2dzw3bOgh+l+w5xcl/AUYUFCJ6uZd3vUUyrZQVzJxSY9RO1qcnJix6Z0e
s71z28shuihWYfnWuCx3HxJ6aElzfWjTRs47aMEAhPy37jNkpuH2g7DWz7nxIVV4InvNG/rgTBPI
VgDEbdOmOe+LJcptYnczloDN98GKBO3yPN+EFHztfHKe+dpbUYkCSVsQXR/lWWJXxSEC6SzWEnFn
M/vvmGqB8xjhGafDp818pt86rUOg4EGiP5zyFXx2wYREWiK5vnU9SqfIjy30F6pyZGKueiy+qp+7
P9Uhn9rGzpl0M6vy0iIS0F8p0p4iGIonVD8Jb6LhytNgBFV6nScULYY0gR6qb2zK9udkaMmYz/Ad
jFrp9V8isGkEqno7eVdtAXRlNVjYsBxsYAMwWvXhDb/ayrBCTuubJ+ZKtmRrKkHeFtO16AFfWKGt
LTz+zQPCP0zCTgi5clDTKFGX+bJKuzJ7azMbzT45+Ri2Vq3zm1xnD4ict1G/cq9J4SiSxpOeCHhC
pfQQZ0c5udQSd6GrIx/O5AK2635aHkCk40EoyeDKWQFRmX2V+Kse7nH/UwPd7osjCd/LFGi0OZHg
G+3IKHU4Z6cMm/wdYg9ZcOSbNtie3eoIwAxRVathxO3wQnhKJpHurXiHQKx1iD4OD5/+kig9Do0A
PFAXlEkI/311LX6gLD7dxzQbQF7V3JRt0RFns8etWQxi5zf2A3PBgdE/ZUBcZ/U9SnKkjSzCTJUQ
pEbUoRAzX+s/yip2JJdpkdr3V0YEXHOIqefacR524vJp09JqbMabHVSKMGmXtJUw/tIo7bwRZs4U
DASR0UXaAE/k1bDe49p8XVnJGPE8AjYMigiiTL7GQJiqVnIksWC12hP5lH769j4Ug2Q2U5wUhrTR
TC21pgs3AE5uZcdVeVDC+toMn6HH/Nkaw9Ddwj3DbWfaIq3mpJoEyUy0JuQ7GTeXtyZ9/WagQR88
Rtuvmzz2Q39t/EdWeBWD2HQiSe3v5b/IxOqrzaeswGPjfHQeTDupVnrBs1KEUeQHSN6v8sO7/HfQ
aZKdU/0SwfmH1PTooAjfQV+PiV4kvV0CdQAB1BEOuGHsF0eP8c/fJW1FcLAiB8rAXcLPxrDdJu4D
OmZ4iZXmfXm1/E2C3OXx54P9OJp4cJnhGGHP+ynWXhgr/ThVU5+W+9otfVbGF32lLjy9s9bYc7K+
B1voZEdwkfJEWUkAT7ogq5HdupRLYrnqdjdCB+m1mvAHrnhjHLDinySrXDdXRklZfW+/mkmnd19/
jUDw4rTkT4q1HRsQkIwMwhDTBQZI8g5HqbXOz9VJWJn7SvO3hA5P2B7FDi+KH/2En69r1q3DJkzG
hxujgZaNuPxcsZwBGubMwoWoPncEplXE1CO74kV8YvuH0Q0ojS3JzP6H8iNhp9qSIrfPil0QTOZI
tqMu0Xh3BwMH3/EddRMt84J0wh9tUBCAoGtONXDIxikBPpf+C+biZ+NB0MX+oBzr94FVtAj+Guz+
R4L8/YlgEglM/6P/7wyLChiDDc1NAz+ESVhQEbxgbofKXdr5oiRgQhXhvCnb/IlNTGfBNN+ipqS/
uX+VuuFUo59/
`protect end_protected
| bsd-2-clause | dfca56c1a15c453d2a83432cd44983c9 | 0.952968 | 1.811347 | false | false | false | false |
AlessandroSpallina/CalcolatoriElettronici | VHDL/10-12-13/10-12-2013_compito.vhd | 2 | 2,938 | -- Copyright (C) 2016 by Spallina Ind.
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity sedici_bit is
port (
din : in std_logic_vector(15 downto 0);
start, clk : in std_logic;
res : out std_logic_vector(15 downto 0);
fine : out std_logic
);
end sedici_bit;
architecture beh of sedici_bit is
type stati is (idle, getOP, getD0, getD1, exe1, exe2, exe4);
signal st : stati;
signal OP : std_logic_vector(1 downto 0);
signal counter : integer range 3 downto 0;
signal D0, D1 : std_logic_vector(15 downto 0);
signal enOP, enD0, enD1, enEXE1, enEXE2, enexe4 : std_logic;
function next_state (st : stati; start : std_logic; op : std_logic_vector(1 downto 0); counter : integer range 3 downto 0)
return stati is
variable nxt : stati;
begin
case st is
when idle =>
if start = '1' then
nxt := getOP;
else nxt := idle;
end if;
when getOP =>
nxt := getD0;
when getD0 =>
if op = "00" then
nxt := exe1;
else
nxt := getD1;
end if;
when getD1 =>
case op is
when "01" =>
nxt := exe1;
when "10" =>
nxt := exe2;
when "11" =>
nxt := exe4;
when others =>
nxt := idle;
end case;
when exe1 =>
nxt := idle;
when exe2 =>
if counter = 1 then
nxt := idle;
else
nxt := exe2;
end if;
when exe4 =>
if counter = 3 then
nxt := idle;
else
nxt := exe4;
end if;
when others => nxt := idle;
end case;
return nxt;
end next_state;
begin
-- cu
process (clk)
begin
if clk'event and clk = '0' then
st <= next_state(st, start, op, counter);
end if;
end process;
enOP <= '1' when st = getOP else '0';
enD0 <= '1' when st = getD0 else '0';
enD1 <= '1' when st = getD1 else '0';
enEXE1 <= '1' when st = exe1 else '0';
enEXE2 <= '1' when st = exe2 else '0';
enEXE4 <= '1' when st = exe4 else '0';
-- datapath
process (clk)
begin
if clk'event and clk = '0' then
if enOP = '1' then
op <= din(1 downto 0);
counter <= 0;
end if;
if enD0 = '1' then
D0 <= din;
end if;
if enD1 = '1' then
D1 <= din;
end if;
if enEXE1 = '1' then
if op = "00" then -- NOT
res <= not D0;
else
res <= D0 or D1; -- OR
end if;
end if;
if enEXE2 = '1' then -- ADD
if counter = 1 then
res <= D0 + D1;
else counter <= counter + 1;
end if;
end if;
if enEXE4 = '1' then -- MAC
if counter = 3 then
res <= D0+(D1(15 downto 8)*D1(7 downto 0));
else counter <= counter + 1;
end if;
end if;
if enEXE1 = '1' or (enEXE2 = '1' and counter = 1) or (enEXE4 = '1' and counter = 3) then
fine <= '1';
else
fine <= '0';
end if;
end if;
end process;
end beh;
| mit | 44f7c49015c873d33ddfd0d87c651401 | 0.530633 | 2.72037 | false | false | false | false |
szanni/aeshw | zybo-base/zybo_bsd/zybo_bsd.srcs/sources_1/bd/system/ip/system_auto_pc_5/fifo_generator_v11_0/common/wr_pf_ss.vhd | 19 | 30,385 | `protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
VQBfeXA4hP5orKlsy+AFFAe2QBxKheQVMjP9iwMw/NM3O4tSdVMF5nSpUCi2zqd6Xl/0+S5YrDyH
MbW21sN7bw==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
NYnVtYYKs1fo/NxKyeagmW8datCnZRNIFQJ52Ut8vKAvoM6z9G59Louyi6BpOXJlK7hkOA0EyUcq
xnrhn5QTbG+/jjVXTRQq5boOLx13BVtwMvklEuJLJaUCJSI1mkPVMU1Tw6P0C7fzMTIVY1MXBSgF
huHBAAQ6j+Ca7SHEJMc=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2013_09", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
UdRiCUwOSibQJYHOoWlsqKR136XIPiU7//1vC9LO+s6bwL8gocVodj06NRrITDP0xKYK2ZTek7T4
6OlwV+xWr4k2Xf/sx0trTcVrHoE3bps3QkJHk441qMX8BKjF5fCXU+yOMX1xkQlvuWSD8+NvN82l
uzCDbBA0KjOv/IsJg1WHwqG44dahfC4qa2RHQtygQ4MsVR/PxcN8lnUdpguLi+YyGmh9q+fLgQBq
cNHly9YC9ZC1urY1hg8yqWcJm8AuonE47dIMtl55BTxzCygZ9uoRy68FfVsLU7NHg3O2kl94A2uq
uulT+/Y74MIANEyVFkVes/FR1hhgCPd7uNhwkQ==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
tQM9oFLCOLGigsR+dGte9FyrpKbOg0a2HEe24uc9a4zzPMiWT4Zq+VUMyysv3hVDjsM6Rhdx2y1P
MMtJydYUSv3+V7JQyYwaG874Tc20f583mvfsydp9rtOQQwZoTUUdaw84/pibQ9geh55pxtJYjyzk
ltK5Hf2dDqQ0W2qoU2o=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
D9jeI9qTFJwFpVSxwOhVsb671/UONJ+BqwlU4oe+K/dJiOTSOoWnMaaYQ9Sgy96AbPfvmkY1YYgF
jNHbjBYJx/eNgXJH2lhqUlU4xX7po7K9tZYQraj2oMsohZUwz/eLwj91c7VL5ZRmCXaHh3hDU0yM
tta+u+KG7UfDjSpBDQDdNd7gt/bWHfns3Zj0BeTNOQ2o2kTzIQxImWuXKku154pI5L0sF72lK31n
Ls7v+PzriYFrSA6JTTtqAnDF5uCY0O6Lpa8FB2AoeQSutIiakkT+T39fToTawon3SeQIsthaDWDT
WAem4lxQFA8q64KvDBTwguerI8Z6/8BM0gLy/A==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 20752)
`protect data_block
ESefWP1Hhey6UD0rsl57HsiaGjCGeGxJPKYJz+Jos3hfn5lsiRbEugIzDK2A2QJ/yntEV6EkXVNp
JAoFbykmZXS5iOLDCV9WuoxsE3kJBbcIzJIKR3+9YjZExVvDc4I2l/9KUrVHrvO5BotiKVPCnPHV
vFCFXIUar4snRkGGMQBikSC6EOqbMA4qWcuxfxAsjehCoA55Rvd0k/IpVa/5u+S1l6QRhNq+39jp
70BAcpJVfmKOFvj52zaKe1xkmayZTBpPBwaud9D6LTsoWGX5yQzS6cBM8dDhNqhBGtNn8bdt/tQM
25UvfDZr4PC6ygGmiewtFEHHZQ7Sk4pKDByYy2jMgNsbQybw0U6xu3/d7dIz4rcPulPPf+7vNGfz
GYM90T3b6viJMveTyQgEi7QpCmHpukiCgadlFPR2Car6j2cmQK/8Ybs/Bd61qEMKuIrQOcHiixKx
TMZHWKAyLcGcUGZMadqbSVt+f4D6m2oEil08JuHIjdUz/hawnztILxKEf0OD3qz19fpU5HoKSboC
UH4yKmGfpV1wIX4sRIALIZkRXE6UAYcSrxTXeDT4fUfSI11TJ3Mu/k/8N0rCDf7mHbf/MFMMXfYo
k0GNg5vehQqehs49TstE9H8KbS+xHk7VcrYis7VeWdHBEsQ8h8c02PDZkG/As0OIQ6eMnokzJ01w
4o7/7kydsrUiTNna/yfrzg+lUZoZBFql4Jlik2fmrlpSnKwzAUV+D9KgkYpgvN3kD1SD0qZVwzzo
v1JvW/qu7Y3Du6ZOaf+0qgx4NnbWfz8gXhZulGLYpZWuYbwXl6xRudRtBY371JXomY+cxLRD1xpM
EaN1W3VIkSye0xVzX8WaZkZdxB1RooiDBhqmDWNqZgTS3y70RjC0iyrRu/GnC8LHMrVGsrGsCaMh
W25ONrbEjlWroi2jnxyQ1b9OzXIcBbyC4GBB8S9mMtq88GneftKCKsaMIGU7bOUisBWQCF1ZrJRJ
u7d4yIalD6gmPuk7ZTj2mEtWqXTuGXF7URwjbA84Z2VjEJUZhvgZWQn+2Cdm8Pmz8TCE1Lx4y7YT
NQtYkzn6x11IJIhjnFK0vKQMHU4wHf1lXIgcnvCscYfMg0AB+iFx5weE6BV5qqWLLB2gdcrc0IHK
1VT2JGVeEseBjTK5uhj7VsskrJxaYyi1TjZ3OCTj/0xPRG5H6ARbv7yjRqzFDAMaNdUFW/G7IowY
sk5gJ8BCBrbm0Ryp30lb8JKxzJjLB9w7OydOZHyJPIb/a39DAPpePqlYnofglqyATEgU/Eai9nEJ
yZVJ8f5Wb1t/ziNjhhxn2zLkvDsEBl0fKVrd4j7zD+CNC6zSkt4Db9QbgSij+IkW6EJU7tpIU/OQ
fLfv7gF42ZjH/piXMeCAex64KtKWdKDAusHN+bdu3auYO9XrUO6UxZ4r7Spi9gAMnRJ9ZPdSu5ag
h70yDnU490Ctty0xx+QI0D91CBYRj4dgfSicsJ/yk2nr13rMrBxnTeAxayF5Uyoyv5IxZPL9e5IX
akWuoziREaCrNPWx2QAVMhBHFjH533UIA2LbWsnB2zn3lMMNbRHi9BlEaeFbXSZ/6GgfGXMvv80y
C80bUiYvXO5d/Xay9M2LmN/afLpxUoZawRe6SpOsVdcU/Xd6NjuJ+1cA9Hvv1jl1//s4U3jl1WoV
GU2hr/Uz77N5ATkpl7cFGdppXh/lEI4GpWUd6RBCpLc3Sg7952csve2h/7gLdqyqpZzcKlELQo3q
OtbzvSaZPSTjqiK6c09F0yWvd39MeXsVINtPjdueBgqJ6xxS9lC8A67MdNTC3PW9Rwicp9672g3r
Ru5HM1TlUShSMyWy1FcdmdzsTQh2yPEo+4ZBsSnJu3IPP0rVHgjx7gOkkllav4qZOU2Z5v4dhty6
1/STCHDTpeA+N4dMRd+0WXz3O3xwOWwFEb4e13OWd6vBro1IpY/lZFYFREHq34wAFloQ1ArzjTX5
FWUrZ/d/aQtGXkc/9pZRGo82AlOMSn8KT+VVXUkAeIW7cb7pSp36TMVtQW/WhyaoSP2/VflvHlOH
bJUHNm/B0k7oiPoZb8Df18bru5Dk6QQmuqMOqHXV7t3pbpE/MI4TCeHK9xhFa4XX3a7vzbWaz5Ep
DKYuS84euvYSfr+R4dou1O6XOK9VOvkTIETuMlWd5fzP3yGuSn4DOuhGJx3I3+scLBw/2JaVhehR
UzKv1oAX5+G3Rw1TgkLBrPeMI69m2CV1yqpscyuetX8e2iE4Q8SZMDHOfIjaRCb7PMvKPlpyR2Qw
/o+nw8BqYRBzEb7Ndu0t7AXMSnP8ELz+JDkBMwu33dacdm84RndWO9KZ8ltTsV5hXHvZrmOhPBGO
304/G+2Cm/8ujJXA3kXgyC7z43ZyZ6noB2asWEDtTUB7XAgSAK3PyGhRxfm1LsmjyQoJk8J8Z0X6
8hRmwyQeRRCxAiyVzQ7yyFArzupj8XAcLuDacec6XcmjwKDsX6GbQGK6XkRHmcD5QyYW1ICDhD35
VvBdxcsmzSHV5J78SC724NYF/KET5E1MfZQ6nIdLozylG6mYD3jHR9fRcqkSfXWGFpi8oBAvt+tv
1GJfQZkvhczrVmfDPEUzAuxh28k8rq+m/FLNwQfTTrD0lndQv1RtVG6FTMGTBIKCbRwjo3VDsthK
sFsgOGduqWmJ/mPgichlF62Zr85XOa5Hps45bkVXi88OZIjSwIwpTNLfDQeIF5DNCVGfBumoviDE
pG5wniCcQYQoYbfcw/wceejE7gVp1PnGR7Whdp1+e9euQ45E2w+E1kcK32h3f0FOt1FQE58Xb01M
AsSe0rHv7RumTnJiaYvABM5oPI/jPykYRUPtKLaRiX5W23xIcC3b8JciervR0x2hb0V7n6XTRuaw
lvLvquBMUnfeHGbENUWweERZ4N/QMqtPr8GwRPMcBZPeQMF3ZQ5RshCMsX2jE6YPenEnme7XmCoh
s6pXCiRmtZWlxVNqSx3tFMKg5JTP+Cg+rYbwqKIzvchZqRduwgIZk+JvDqjPiU71RS8nhHKA0mzG
YZghDZqV+fixkhazUmpUFmUMP5ND1pNPgrJcaOAQl69oXjdC1HhEkpS5oZcwD9pdb2Soop4oMCm4
9T0Px2CZUzD/LTm7DKsBbsDcpLha7xKYjOCoh7WZecW/bZPBL70/mxwP+vke8VatdfIQmXWVVIHV
vGJNKgswdsvEkvd9tWPURN6/XxTjAxxHd0fK4hYpSEd52Nya0+XaYsmkV7TGr49JDPo1vLL4Y3fH
J0yWWm2Z/OmCYmjNFaPTfyXa1ABzHtFEGnsGXhgFw7zOhH9NtHn4tnIzqtnWhuzLUUHYuMw788Y3
EONwoJewC2tzQ0MuK3ejmctRkdHGsC7zJeRgGRP9m53gxP7EEAnkIwVry93xXhAXOQJVCw0seypf
l2J3Z+wTFPUb8pWZ4EGBe08/THphJL5sWgDR9diGF3XJHD2NsipH74LaGfZnjn5yZWw8IHgwQQuu
RRFMRFj0U6OKv0chBXMTHwv/etavVmWeSxSbX8zOjrs/2c2Ur1a0utS+hJye1jfRI2G1gYE/XxmG
trmTGYokNN/2kqrtEcpHAvjSwTMYM36VuNQ8gSJ/SY04aNN8W7J5UlzcavjGk8pC99eOWZKc0p0Y
dhccGUlj0ViMJRJ9MwWIOEzLWKzEDARR3fbz/2S9OW87gjjgYXbediE172xL9TaboX5sc/OPU3tY
FiXkdbl0ycKzZ+Wgh5RGAWirIgMwSjeBn1X6FbA3YqU1/JyINOuwzA+RQPcB2lZP5mbwDSv1BNdq
1W43STEdLqPbs5McV/ECAgSsz3Dd0RHLUXpGFadTM8YMSF7vYByqlwNyczfBJRHfIuEz2Hub09Et
+hqkPIL3PJaSazNTQUEr2VfuAqss+HskQxSLTHz+E/ol3iqie8R4a1KhAUAg+a8GXPl0NbnXX/U1
sExA+ml2X0hkjWpYztiVNsRlsTAfw+HHYs5f2C49pTbn+Bdy/girrD8KFsUCFGiTxHh3mHVKHO8Y
eKkMtvZzrUR8cbbl42ejDzdLNddbDB1DvHMsAr8Awf7c75WhhsHepjYVG++ANFbJ/i+ZoyH9w++7
4utHSMFZYz56Db4jVOswCf5OesUb+qlg2vOPm9kr/QS0NHXxXsxo/XIvksQZtIiLZV7Or5KWHGxW
Q+NwIA+CM515/RzwNGjvhNbv+p7S+48x45YQk4mKadDiiT4pQ/2A8gXiRs3anJcAiAZ7IdptaXtt
lGLeMyzSiB+RNwLoe9EHkTvDihLjLTBpcdFvXbdm4Jo8gkUBPKWexuij2zA8xj9N3Nkdg7tSanXJ
tyFw1DqRldImPqlVVp27PaFeXOEu4wpsc5ZhmG7/rfUUq9zI+cTChL1WevH+qqr+moUPiGRmd5rY
xu8nIxuLypBdX+udRVhk95fa+8djmJteGes17BcMQUULxpSsi+AkuqCzZ5TlJSwgWHws0D4bZu5G
IYyB6QZ7XXevkrza6CxRuKfrOL0B9IJyz/O56j5gt+x1+lssYs56JXEUb8f8le4mXctFSFUGOCzi
t/IkOs+NBnVBAFVJR+nDzHo8iiJJOEoTjbv4T7g0qvhwbWahrrZYofRC7lw1UXLkdWgt5/3bgveu
9jLH1qeUii8doJY14xD0Tib+7Cr9/RJ8u8GaOSuiwa008Dz2gQy15ABx65GW672cGCA/1+ucOQny
MgLT80rH0DbkSxHKO2LB+fnmeCLmtNOHdb3wILxpTuaif+8CQimX4lq5uIymup5GjNCtVN3+EhGU
KL+BgponGfGIAweHHoyDGllZnqY3W7VuOtrXFEPD6jfM5CLzRbec12cofzJuS71C9DRFrr4VNxyr
YBkCgHGtpOW+V6wzJcxZ5TadFflUlTRyPjJWsL/nFRKiOAeZyU4dWFm2fwDq2uC46aZsUkv/+Ckl
MPg/mjkQxztAO7N+tsxgUZxsxscr7dK0Gm5s5GJdvk2AzMRlIL0aGo3Il7CTK/nAKtkRNMLuJwJZ
wmiKOKcmsNhnLwfROcF/c7MQ3GvIIMynoL0mzV+kUuIMq2VzaFbyB+ldy0K5DGqx9+pRMFHC55XW
A3rMox+RtHZqxgFwVMl+Rnq24HO1SrAPMjbFXUrk9ZUJFXVqszsXSqDjnC3ot/HUOkvSSMH2JcvT
ZX4+M573ykf/e0mG5vGyEqEAAg4ji4IBp1NaA3mwlX6hZO6X/k4F7oQGVAHeL/8NJbVczbjzUav9
u5BlwtGvwvYHIlN2SnTaUUJnddtN9yXAXdZbES0T/4cT1/x7r530luQSI7squkp6yvp5ryTnMXdj
Mc+WuWp3em2HLUOx4NTE5DaMqV0sDLC5LvhIFJuJUv6TMPvYeQAo/b+7z5pk4jwU+Y4dj7yRmW/T
FrMiRGSYc+Veff4NMgaF7Ncbz6hDD3WUOhkjBrAhYAp2ZPkDIRS9egVNX6tAtCNOpY6HA57hB13L
9TcnXDAWWC10gIa/JqFDt6AfNn257bS2+SFdomdWl+SS0VSWdWAW3ak+JojNK11kKGN3+jlS9AfI
IyY6z7awvvgYm61dnMbXSOuKWxQfzhbjxpNOAFk6DeCZ8EfzHZLcxsph5zVmChGE97jkew996/GX
ykdFp4RV+vtQofI1bnD6vdHgazZ6Zr7t7oPUCvyiIL/K5sUwLMxtxLgFPLqt9u3ExvmJqHCYqacW
6sLv/jVbzO0b1xQtXvLm+mC4DnIi7hQ8cZnrbX4y9FCHucnKunjgflUKWeUSSedT+M8VLXobBXcF
5K/d2bcpLzbBtiyn+qscmDm79hh1GQuewcVzEoclpwhMec1KNrxOvqeYfDInpLC9QXw9xm1R+crL
PB5xBk/w6RhcnyOzohJyFc+vPicKEKAj5HuHzFJVSaw5024St/3lcnJJ8Z+gi3mbR8MwCRmrwN0b
gGZQ3q3nL3Wu5mb7bHZy8faXw21S35r8nRduqxM2VWOaR5/IefozSvQh2rFYpVfb74dy8jsz1Fs/
SA7c06Uyef93ZNEKxTDdzZm0/vqO/s9784V6duLSAzeswdgUW/T7xgVT1dUeBgnQ7qmK2z6ErZ5H
2ru8M45XvVlkfKZvwXgb5Vzw00yDcaKKy6nr3vM37mvx334y1bXgYhLBKVF4CoaMpjboUxUrt+4+
eTqg0kDdRFvmp8kl8R4isz2MSC/038OoLg2rV5x8536BjEoxfXmtqjjlFT7Kf/Wk3bf40MXthisu
cpVaGds8al2xSuOhp4qXRw34KGVEHfZYoUOLW1OzEOmt7tojVKx7nRc9qbUcz7H32ixRqAlCBh7z
kNKJbn0RAjTNPgtNquQGA7zOlAtt0/Ig76ZYLue2QesP7j+J9ukKmIFtHpKHMxay9yhSp6uz3Yks
Lp1axg/pbI/OAvEQav3RtMfHut/feLvgOZG5krmFN13Laip97kDfUShZQj9o3tenmFle8FLQxJxO
xkXtF/Z9pDvamRIUHBsaYx4OuiKbsnA1/Tg3WU8Z9NZTKC/4tujvtoKHOyP3XY49Apj14qtTPpxR
Fjjn8jPbnMFVZwr1tHvM5Q56tGSt3xhfqgBQCm+miKejNzhIwVnnopY5I2/Fp7kC9YxOAfsVo2+C
vIxj3f9YqinZH4iVh5kksWLC8OgU+YpoOZJvc6unYSRDMrt2sm6mEzmTHAPPBMp5JD8xkb+QEqmC
zgVdlnZYHD1hfktPhlrEyx/NnJlDEhj+9z++e/UbSqw5HOLA5JPm5UnP/qIxxNNnxDVjBB3jI3/J
fAfsMMUGy4mG8JvFvTbeAdMMDedrFhiOBbyoN3qiFePJ390ByAT4ZVCpVh2MnqY4T8aQ4UM7NH1e
UscOWzH3u4Ky7uNtwVVGhD8UgfPSj2xux5B1DdT2I+skAU8+fdaF5A4yPpeP4dbdEZ6fXCuuPv4N
POOLTO2bJozWADMzMDhZoEYliC1hnZ0S7YtXscy0N05HD2yfg3XJf/mYvE4HK/UraowDNYxchK/S
S+5PhrdLprtGH5FPjShnd9pgvvmiFoav0/lpYz7BMpT4FyGqNWYJul8LoWaL3cvh/NCm9X26liao
EWuM1Qd6IiKLuRSBBtCji/H/VagIbUK3Yw2ZgyGi7XGc7nwo54qWbfUvg059YCap7Q6qvhOqMpi3
vDwNEgagcOIzGc4PjhZtMkfRt4QRCRdkmJZ3JF/CPbVNUuS0wJdjqPtN8Ik8C3+D9g4HnRRE6gMJ
SWOdLlZGwVEEpJrBhL/GhG1kqTFTJOGB339S9nSKbd1+J7baCywbHfypEqgS20LC/oWDUjv2pmvN
CfitDknUt3Rv4tpAJP3WJbP6l0iPxRyqS/tVkVS4Y0izR/oNCRq/k541kUmSe+nXDyjTyq6BJvSW
/Um9mL2SGCQFLW0KMVJ6tolhcewMPL4tWCohPxmYaFPfyfHQIYekzbCXtZEDODTe7+vnMn3nXtJG
ampqc11s38penFXgQp7Rn7UOdNOV0Tvf363DtV+zQEKiIMj4yXxCSQYdIWtGVRT6764ZKtwiUhg8
6Ca3yaSCLiNZhSgQepOCT0rrPUGZNvz1ipFSQJR7+LRAlA19JB4+f2n8OGu/RX+ISblsjpNcJwmp
geeKoZQtcHhBLuu30x1dYn9KV7dlYx9ndroeCIhpIaRKfGDTMi08A9TS6WKt83hwXlowPckpKAoV
gn6Ipx8gArhlAl7XdTDfbsqjGN2hBMtDHx5hye7t4IPzi7jGB2IXqL+6vcwm8retr9Jib/cJLPfO
VBrSBP/b6mRRt7000duYj5YOEJMy36n+m7Vt8G9Kmk3TdAmILvx+k8O8BOW5otZdGLcLK1uFny+D
ULp7p2DcE3bRtmLkSqVwErOLvr6cHzD6X8bw6EpfrnLUxk9QdRe/6YRBVX/4dXCPw0RIJa4hgpK5
Zy2UVhCRIZb2gHhLBZhfGtsIkNW1cELItU4pp2jePvn3/aZgQihRKgMxDqGVOZzp0Icj6qBra9Ud
7/GJv7kBZDg6c+d2oBU0XX51ar1DIZw1beZyu+t/qSMLI+lJf3l4rgB8RLR2R041VwgetHy/njun
tQv5MpSvUL5EUaKCL3/Da6bG0LVqDcjLZ1HQwqm8JvZqkTZtcaH7Iy0HY5MSxOst192vhYyglnZR
d4h0LFzNIpJ25qVONATcCYWE9XXI+yo5A9bCjs6BfbvxiOwYg8N+DNl7KOKvYxJZmJjeCDhYBVIa
/wAF7KSCJJs+BMKWpxnaFwO/Duf7E+EwxhDFyoTSUvdV1ik/XjZSgtteK55dBe5YbK0Qx1YBYwDZ
WBFmaGhGHbZv0jdgj8Bpdfh9b1YX48aDph05AR2+bC4Qqn5z2shPotnXXIU7koJN1HgcUarADyD8
HQxPP/42ggId/PbPrNYs5/zq9eoxExAJYIhhcjSLMl8jIlaPFlp3wFEPMdVNLUYP7gNj4Pn+Hur6
fT4qDm5wWjEGUFrOVHINfkFqdysjMioqNVwvgJ6S3kNp/kXt4eOzLpdcgRm7vhX1OlOypmZvtnJX
YquiEBiZhsQ2T5f1A3QL5t2dwath9DCZEApptq+KRxwh2uqEM81R/tvzy5BCHNajM8ywy9pJOl1d
WgsiI+axjbKBELsAxkXwpHrAoR//Tygj+cfB2eD5EcDi6aguriiJx4zBj8SsXxAvwN1gQE3AMRAV
EJeWG6RW/kTdFi7KuXMTRjohRS/snQkatAbcK+NFfeNUuWBWYKjA/Wz8aZ/UfyTvhCCgYEzhxaDP
r3zXFoVcSWydM3YmTGq8GDi6nVNKbngVbqm6BE5BgAbr298QjlupPUO5gDd0FY1VauDa8p07brVI
hxNgJ+WqoXTq5oBx2UhF0kvo0cJY/NKLs1zMaRmgcE9fGjbicFt+ElPwLeHgyDHbCHxL2Fo5IxYQ
T+Qe+1BTnBKoAs9WREHntIssaL/wXCbglLkIsfrlZ+mQbz0pyd7Xe5gyAERfvq6K2VsXHixJ9qNj
D/BbN40BYM6m3VPez67+76XriPJCL0tulU/2nsnHY5e0F4BMiU7cI73szmKv4dzUCiBpFzulNHA/
RFtNoTDhzQBdJDCSnKwAoCRmevzcOPHc8d0U/SEplwMEI19A89Xfr+9VhkEUlRV1YZ+kd0Z/VFFn
i2FeaGt4BRlvDrz7dxdVWwwXyeVse27vI+zzA9cBGgjm7uOn2lv7NTCBDyX2ui9wC8KUbDUYL2mn
ZkDzwOnjDLolFdp6g77VYbotSrNHfvtGlvdUFD4gPPmroNkcVOfxc1TKNUmUFm0lkA/5UjZkMAXp
C91zBBUemqqrf0Uuw1Yj2USv9nU9bJyW9fh9p7a1UP/VngySgX1tGvL3yLeLaJP06m5cnCds53P/
zeqszfs2dhJyZ+XBxZGFsM3kPyV7+5H8UoxD9GTgxleQG+VHPNKgv/VKHhPplAJjb3CpVznX3Y/T
zxN+zVUZpSRJ1Pw/ciPxf+1lIMZ9fremrLgz/a8o3K12l0Vslz5Nd603N6LvYQPGGBdboOahYpD0
Xmrf6GzP4zbYbS/Gy8KuUP2mWF7PTR3F2M9+DAtdpYHGxk1VaZAaqdXTXhUwnqAAEQuVHMQ+42Db
D4+w8KNyK4iRSbiZIDRA/UCGcVKoQIjMc9eU5GKr7E08rwgB1iJYYOLOa5xbXPLmYqJVXvVwk2Ra
RVIk5RIU9Dtoj1tQ1i9w0vD1BDop0h+G9ruZskjOwRlndfJ54yJugSTl6kZYGKfOP+Zk0biCKAJ7
AR9PTqQczWjBI1rC4hbCuZbsctzWpfYRMQVqmexxOl6WF+8+7P8yJlV6YQWfXbiAo2F5jJs0F6W+
NVoUS+Ow4cHopJzG8Qux7b3hyZ2972/sQ6lSzOJ7VFpAEr5t9ZVZkt7IwMIta03/nkIVoUBxsQKC
rDyIiSGNOzatLiULke1aB+gy4xXEZdvM77dWu8B+RRMZWOUcBDjy9Q2Gns4L7RDYf1cDWwBOQMkj
Y+xjldXaDyVym9nCFe/ATQnT9dYaZONnfy4E+6xdVuVR4Y4ILRqMfqsQDyhM7KE84CQYlt2HbO77
gh/WDy/1f9M9dw51x0IdG89vcq5DyHp3UAe3QuO7OH2+0/qQAshSK569wmjVwwQTCbwmEjgZ4zSC
yPLnCLxKM7u5u5DkpjQGUYHjSg+UJfcu3EFdKDce+iEnTbbJxHMvCv0ykwHCAntFj72RAovt15d8
0WhGX5MKB8Y8bqFoNWIOV/ZLC3/crhSDfaslUHzrF6vAm0IbCuohQ6xfINt+Q5HWnzOpeeobEpZJ
nSGqwYO9Jg1G+iHZUmV0o1PwMdHL9k2DKd6uE2fXRkBPRymHEbCE7E34e7+BjC1sFK/RONvaK9lf
WnxyyGwkN4UXvGRvJOWYFXtQfD5tLXtxXEzEFhQK02fni3/9vfMhg/u+G80H2aRE5P5/DKs6e3Eh
72kOr9ZRnvOv6u1n4OVHNxd9OXhBECVLNeiCbH7YDEDeDcmAAK8DX5KLlWPxs53/Fx7WIicY/a5C
41jCQE9S/p7V9Yu2ju2K0HfE94X057x7FolwDnu42J00Suj/VxLpmlJFtywDTLAg6N48KAbigENn
pJ6z3vdEkXdQm4VxUVyfkSQJxdyh+RtVAo4ykFHGN5Sk/qVcH5EtzFJwSJxdT9TJAUnY8SKkZrRU
2wYgyFnUHtwUzGCW8eyCg8x2B604u5l3x1e8usviAaSkDNNC8Xizkk48gzuChTEdY7MVsF4hMUOj
QtbvRerBY3T8hp/2YcgpnRbPTgrCng3OfvnvbHRUBP5cxlnb9B7j0kXVJUiBMPa+XudaV7+krsY/
s7FIFNZKSpphSmFg2/YYn6DDgJYktphzboB2p/DiKcWwqEr+xbXb3syfWtrBvSZfWUkfJJwkMr0Q
wi4AYajuEE8kGjOp7etf/aE+shVBgjq1yIBHxPIOgMFNDFBCEJJCaGxku3IAExHRJS8qcWDWZhGo
e2rqrvkicI4jFLJyTg/nBFKnqLnhpTJ/IiEIJaOwMTUGDgRbD/q2BU2L547wZNddLgAHAuothwsE
bF9yLkZAOv4tU3vNeWxuFREjZ7R6islwQNIk8cXfZHUgVhIV05MyFmkD3xd7JXYvGjLAuBDcNJcf
0xjWnlDnJ0m+yKsyeNLHS2aHZhRguBcGc96yKyg88UORsyZmMIPDuX681ZY/lFTyzYrdhWEkfhSU
kzS71MILNrGn4z/ku/f6IGbrmNJZD+fnRP44Nij3jnJp1TcrSDvpdiJvJMAZq0bN2xD8KjHDFHsI
x0tTDE4PNhC5x5+Ie9G7EwB92PV8XK3PWf6DrIAs/+c1sJW5JaBjiGPD5LS5CkrDFY2aH2NaANQj
K7mfgLOkMciUZrOddejfIj2dEaRFZAhcoRXZb2Aho569uNstSRfflUEOIJ4aYmH8cwh0+CFQKRw/
D6w8ypj5OYPKIXDbJLADiNGMJiKau2Lrn5RtX9kGgC6+Izq/SPF5YCHD7+zlEUctD6B8r74yYMA7
Q7qaNUMfxAssHehS9bs+axa/gAqGt7ID6w7gCFmxkpzAdLUrXCK02+eFjqXoi81oW9t0mAzKZoUW
v5qvoddRLQTMSW8wcCJO0hPCxwkL4d5zokMJArJ1kud3L+qcFJz1EteAnOSV/WHVsHJ7NBhe9pN0
7yRt3hIjrgWLMEAzXxJUBCFymdfwlCx4gcyzwvhLK6J8h3R/QrJ2Fvw/3XvEzWvJrcfPheFfzEGY
Buef5qIwqbTR6FNIrBiCFpr+dntdQArbvAj7xg7No20hzK/dyoScCoqCOJHHriZMercTxCDHLsl7
mkYd+V8R3HA86KF/7kHxtV6MYb520mIMFRKqTJA0t6lCgYqYqruIx7rxcNFSq6GmHR4P7wUu19B4
LAZvZHWuYsjT3QHLRGrg/cjqKNhBs/ha/VgJoXjAYPJd3eX0dMZng5PdVrcJcKWzUkeD3N+36bpU
ojVHM7C/CEom/qwAQAqzIecJIlWUjuIQebngVudNsxA7ENXvjKTNlpvCEkgx5HWvkdvmwDQNI16t
1UgZfb7OsU8qfAMMRj/kXM0QPUKA2q06p73UVQBt75DK2OEYVljzHP7CP+p7Iz/jlrFVJc8g8Nc9
b8SAxMkBePLE1ObbDoVvsDEBI/Jni4TO/NLTtiJeKtV5l5PWOcbFn6JFrfEFrrhPGEG+CWQmHFbI
dHucq3BiqSPRI9qo7H9ypN8/SY5PLMphMoEYhikXOrBs6yJ/w6Rc3TabqNeaatfHddXbGsw4HxEd
P92uGE7WNl5MSl7EwDtpdan4JwUoWiAFVqtJa6FU+mRc2qLCg6ovqfJv0Fbh8vzR9Dx6NflsphCG
toQzensWORpO7ZBOl5EqMILu1ENPgQgFuBerYxxX0JGMLyqnb/WMueXc9+qQQv7sKNCAd9pjjvbi
7m84End5Y6f3PmFAL8KOk+rdMZgjm8excom5fx97WcEz14qPzQ8eDYTcvaTj2wQ/TLgCeBej8/N4
lyR4/vseQ+pBnB8//SWlKjC+RDmSOGpjAMCM5l96u+lKulNSiNeNPnkGdw6k9djk2OvtmIGuwhkj
6+V1IZCf63TVKeFS4uLmE78J1S8asbrg4k2GV5vswYFzwUrBa6p8CYffMAuliKBlB2J4+4rYOk3o
YEeZxM+1dwCeoZZMtfg9vmfNppghZErQY5minlLxStpOCQcVvSCN3nOHU9c+l4B/WMpzWl9Hdr96
+vXMTQyaz+b9eObndb4vrjU39tuahmz+7XWF0sSObkXsfSC0eyufPtF+smgRXNhYmlSPaYWni11S
84yE11EDnXkeTjz9b94VMXUse0fmRB2Gjeog4o5iGFw6Z/bazchXNzfz9+gf8w0E2F2o67S7y6Kq
fOTFuc6Qm2Mj0Hw4KHgEtw1y9Lc4Uuel6RFsorzxopMvRJfmHom9jYM/FXb6FxKrYWzqNu3hNUbK
E1jp0AYrbRJPJwCMs72gobm4GqdTjFDAjJYBu9tOrzUjEk2EI1PkPiPTWEvkGnqqr4ItxP+RMpsR
i20eKoruW9SM4mnxxzmru7nU5FOYA6OZpW4va1I3tUzsiO/jksNAZLB+8ApNQpPRYCybcv2sEEVz
+e47GIqiJFSrAXNbmJEJdfoZnGRMZEMVI/V0iJA5GJ/2K4KcmwLI+BhbW2EwR+6BNqG9TPu3UBW/
BwsXo243+T07ietktid6FGXVjNsOHwD09EoYACowkyqZzSe9UamXaLUw4wiQVNTvDLTclw+IIUEI
+eoL+jvvvmzLOdHZGrdmCesWItXtnH3b3Doj/KPOWiy9by49ky0QcHdnuP0v1oZh7W9AvX5fwHHx
zITCs838wabyII8NZYYUTRy+UfRc5ujVc0CKTdw7Ld+bYT43e4t8YOmEFrtxSgOplfFQIYCUiDBE
R5u7Hv5rNmGQh2DrUxToy2oKN5GtFRVfP5cPTrobFvUes22QR11xmOqcem3xKZYCxnwKJpAoQeRu
rNAPWuXwf+iAUPTnm5r6i9GNRjAusr0tBhmMUM2dUi74A1uS7EY9LyIIvRZQV71l/N4rmXzIRbFX
v5TugstRqyk1gtdnSyRd+P6o+DMaN0mfNeVgFdzYDZYczbdLa8L50wrLiNWgX06R8AIWMs5ksJRo
YG6aJ2N7CXN/jhSv6AeMXzVEcy11SDmMZqSVHkzqkEX2QgcAOj1uCe3J3VdEIv46P8VTB9ShtAN3
ElZjuOu93JOiwgtbGP8XYzXbDPESqCKG6+0ZHVeOk4MvMZbsP4NtoIDJaXlq6wDMun1LA8EoCIup
0zuA9Eh9Drn1cLDdJD4x/oF4g0vJfUZgiEiAZ3rCWuMW7uObKk1T78ZrmpczdaQ8n8PGnxFMCRms
F2RcXwfejyTU8O+nFnn2Jgg8CuwMj51TNBbGbsY//zVvLGcG/MfsFvUJJbU/Zr+ZUusYvVo2diRe
ozHaABttwxSceXveB2wKHZuuZ39d3+Pp9yEQT7KOGOzm1f3cgRKC87iAsgmdmk4HmqroZg1fPgEt
U4edusQD5bLmKbtmWgADEvY9xdgQo0vXz00bRJIwUCYtE3NoiS+vvYw4ePLDT/i2RXlyLWR3GxcJ
3TqHxwwJ34CJY8OsR81MD72TT0lGRzUWJaz8cwW9qPDtj/jbKwWy09W7sd847odEKGLBmD4mHOAB
yQrfe9zC9K05NzojRR4zKlPbrfNu5B/aU/5NTh1tk47dHJBSAhzhk8j3e57vW2YRc0PHZCPfA2sS
t52bxEukKdPzEQhQVOs2ejI1YLoz28WN/9T0+p0V4H6oxjxAGYu5UgxGivewaJ3SiviREhoTfEo1
oZLHg4ySb2i15GIufCZ9Rd5Z5iLYLpvafz+NAfLltYNJmhb/zIQ5tna/2QYBUclP8ABbmlhtZR0U
YXWOV0ubKdi6EPJ8/29WSiis4ioxg0p5rSUSf4SCvHxpnXy5r9+DfK5ujwsHprOQWYZyNhKAtP3l
HWetoL1LL76KMXp6U6wC7GRbqMeXc71cA8JydvDe5KVC2N2f+wnodgEnQGa0+bTt8U1g7BenHCRQ
bXsVfxh0YmZj13tVwXTwJj5samscyg1KGYHscNUlHSHkYdGYdMmi5Eox/KuaqyEWQOx36DoizBs7
NBFpjm3aKgZSLd7KyX5+IngVbLrsKU+2pSTsGXaUVjTptdIPKc1V7JjHKt9OIqrmKeRse/4gR8zV
dEzlSDFM7D3oNeMvO8OIaW9DcoZ0All1bh/KebncRTRIpj37egp/I7yh6MClV4P8EYbPlexuJii7
uaFTZLa/Ol2qmqbmmoDXk3DwixkmZ/OaG2Baz5Cx4wluP7DQ9pn3qSYomcKx8XjM9aBcU/RL9EyY
x1xiytguzPO0QBPekhUrTF5qZcLS/W+UPV0NNp63IZddjFY/zpS95hv2V0dmi0Nvcxlj7HW/qEkP
32acET/r8bTNVEqe+/cyxkkBd+CDAHcbz/jVhRi53SklrTw4xgCf+eJRMspMIZx72j2Q+O8HzgM3
RCeWO5B68DOz/gS6h6Hb9A4cqxWzgIfYQftsOIT4t0lVQ+vtRQPy5pmQqmAL/LWIQorAbnHgxqdH
FCP8MVtT1howZYgfO8Qr9hOCkCdfNXLovIgvZDjPRsvzuKdPLH/zYjfD2bz5bhk7ntnpVZuQTnSu
CC3SABWxjy1QWQJh/7T45/19ulegwvDm8vbhlf3TBdU+gdgJCRpDZ7BaSWjV9ScuHUntZ5BUVjmA
sl8YpXpbPvtHvLkh1jXtxexTZ1MlLuuRe/biKiMDrmV+PrbIu/0U1iat3kD2eLQvkIJPl5IUPpBk
rV2C6c9Q4v9xr73QRqLnaPHx+UviZfz41bBzPdzrVGwum5O6TANLH1k+QhHj8ThHXCTqnmHPMUB/
vV3avQGhjFZx53soYGOZpQGYS2ALOfWQ5NgJqrlj4ciuDIHaG0c3vyU0Yoq+MHdCb5W//R+FRe7W
BByPVx8vVld/JLCFpJUsSlldK1IeN5d+HTxCM/91aEibL+a0+H1vj65rY+RoD4IGZj1KK58jgbEt
KtgnJq/Rj8inxo/uv/3SLp7GK2R1twwPhW/Z4nKGIBmrPYhwjVB1TlL84AtcuOItRfHIxeJ7g0Rq
Tjg2OdiKFLtsSHvJkL8cH2R3bJJvoG7ZHSgTARFsBFYOu+5QqagEJxSrLNf4IvIC8hRY6alOLKNs
FUFW9udDAi6d09XaLebVwoZeylFey0T/PKk7/5Xa73FAKUwyBt5hgiPhDOHxC4GCSDkFETm/4ege
jks1xps5JOgan/RjyC8aqXRVMPJmAF8Q2bzOoJS5AdQs+5z1+0aQuwZAbQW9BqQqM8jaAVixqav0
KFBH3xyJ+wY1KfNenhxqAfKB4PNz31sWnyrMhc8K/5QJ1DQP6CejhF6vBNYSdGl+C5g7coVb0saF
3mTvQCvUHeQe6MHykSulzn7bk2YKKdkRxC2nM4dMXaEGxBuJhsreIo+U+g28/9/0PfY8VP16mj9m
TB+74PiK8UeT5XMBn06VChGsQ9FyTck/rF7N8XpH40L3n21/p9j5HCSwA9hXcZiJO+zB5J2yzuMW
cuuTtRlDLVVpaJMc3jguMFFWcNp9b5MVK7LTb24PMFzVdmDIPcpaf9wdCZ4cF76C7Y11kdsJ2ACt
60AkS1J2QWo3ILTkMMbVQPGVwvCsWSdTNi30e6FIfxqeAWuJK2U6x2yDKpeCVTIXFFZlf/ucO/1g
7cJbzA7j4+qmNs7wNPkbkXRCY/8UdtKXa+XExiOxeJM9caAuiubvyzx3o28EVE7U79FwUTlng3vL
3VWcE0QfSsGkejC+pzN9xv8RegxS8p297ndC6nDN2nWV7YCgRJngkfGMpCBblaA0LjukMwsqxPg0
e3u1aJXhLaJs21UrVvNyhZA34ZgulzGc7FXK/W8RH2VkHtH+AbYKUtsPtdVIxcGjRWMao9vvW7n0
Jdi8XLK3MCp6+VMi8CbnKqhfCRDbzaDFSNMZoAEtDppYKH1DFqMQABDBH7Mp8qmTlK/V8/y07mzD
8mqU79lJe2Tq8S5UkCMUjPsECXcujArKZrI15wIrKeNmJGl96/ewHyR1YeAxeIKNL0c4P7nqJApv
8NJ8LEQ/wbSU3W7G8UovXVuQrxvt2oG6aEoLig13R2W7Z/hscw+C09i9DiptLINcAR+SF2D71rYY
sSfcfO0geqPcSTp28M7A0jofilUNNZw+Mvg97Nj//YtZ/s4tmtW7HF6XZvwq7o1xH5GtUAbTI3r6
njCz+hhKeedhnq9UssWuwd9zhhuq03K3t7/oAc5dMFspgFlzKhrCKUjIjsiJrnnbkEwjHQzYjlZu
VFWOPLu9jiTwMSbtvnuRxQK1JbcRD9z5wR8Wg36+T9S0tEDFy6qecqQ3nHOCIJaVDksNTduniw1X
P/sY/U7ZxAeCweAlBmX5GSdueK3dFNOnsmTUHtZ0Ngx2xXorRBkqNfzHJNcd+mifI0V2KsvK6qEG
zCRldi1Lgz0Am6oVaufgIiCMQ5OvQcfZ5njIDqFIqEDN75AJsYQE+Ach9cKTz8ePagT+g3e0Bfgf
68wQwL1TJhlblFxwcmCxrRGXT4MBcktuRs4n6U5+fD5G3tlLftnW9U8Wzx75gvjxK0QFS8Rt99U7
6Lbzh6Mv4eK8dTxPR8NrmNfpmWsjVOczktle3BzRCpESfYYudwP+lwZMhw3bhw0qyf9+se1Bmz/F
J8pbAHRRPIeU+MpHb2DhBDBfhZ8MIIt+vbxTcQMNwVeDLLGhiacNbUFprXZrpw7599JDUiulljA7
kD1tIFXqhZCCKN5JDUeua21M2n1xZMRJe686cmW1DQmnuS4rYVmjG1T7UKwyuFeLO2jEUpTedeHQ
o1GMb6HLMwCA6eC94h5aykE1+nRanP4bXss5/x7z8c6MPi0YfHVW3Jj13TZOh+PeLPiRHx22q3qY
AWb7guHPSlAkaOjmWhdRo5TNnoqhelyx6SeJgP132tj8dGeBIsu3m7Wca8scigffgjdsrjfXWRxp
75iXA5HSrABR4vSo4Pt4skwUy9XdcVz5kPsNX4UIjbGr/IPBmWIfUiw2WKKX421NPfsY5YeHBvJK
/De0fsL4QwDoETRYGT72UsZUgKvxv24tepQwcvx4QXDDN3RE3hZvl6Sgb59spWFZIwNm3algAEwr
dOE/JsbheCbVft4GM0D1vmdhQ+NVDCnWd5ivHvfBtwxDU1Ev6V5YhpmFgEm16FLn7bVuvwGUaudY
eYBs67nxSH61qlcA9Ehl8CK0ruNeq63VES6LnkF2+fLV4iiFn4JXpoDK1rqRUUDtyM4vHMCWn2u8
doPqtWBZOkCwI0dBARR6vMjPb29Iz8/Dbjkq6Xq7rZ9IBTgdo7EaTbj2BlgKFF5tZRERC4wRtAyz
frHlQBvQkLWe4/p+YeyNO8qw9QCKhu3CQqYIxm/Ygk7YgSYjDTZK/3bbAUCt5cK2nrn9TZBjagCP
lKbXVkSlZpR32DAN/QOZ9dM5d9nCR9EUWLBQq55LeJNZuuPuPjbmZjYoT/dPWqZv1KgkajFkQd+t
SBz7UVsEaHAXD56XzFdOx276/ZRDqIgPLZb7ZWTDIcIgW4KVqAzrAj1adksymUeh4SfbNb+4c7ad
AwNcsxhRB/PHMSXYDjpp0N/Eqp8KV45OCATYL3OQoa8WQZpOg6OKXVKjb+dhBccxbxzejHazqIvZ
3EQBecSKcSxyVk0DuzV8/5udsv4z8I0WAScXVj2+trf0KP6lfclx6ioIKO3xN8raeQhW8c4Kh693
kEUFSRnhHuGbodsyu2CHkaeAsdN/ZdjxEqtaQDUVcznfSHWsvVV14HJsd/fuRLr9koYC0UtnHBwr
s4r8GUMIrvlwmNy/MacLfhw49eqe+NxlEqTsRVLT2cuQTuslQo6gEddbNJiUPj3vhVf+95qon9VC
vuiIvgyK0XXKGYKlvNbB39qkTZRNtyQadzsuI9Qjo54jGoKxmd5AXdaRMd3GGXwAjHsFHa5M2hdO
V//zj9V56Ur6VK06RRdyqtoOhua+3FJsYa/W/QrDJo7KwhckdGffhVTjj3ubHLo3N+VZjT0HWmqo
jap1TscJF0MInuKBcvedO/ayPeg2mLiP6Ol6EuQfzkOkNVdV6B2TS7Fm9gMnDBL33Fr6OeMFccUO
2/sqMcCrHznQOh4TsCLGeTsTM4jO5PxgItvNRLTDryATLy8ApJI71PkB/GcmR9kjI7vggAB89Jvk
EAmWVTdd2TIYd0i+k/FBsTEkLDydx2d4C7xBOk6e78YNJ/6d4MG/6UHpFqKo+/Sidixoyu8ilAvj
Nv4825P1Ok2wyc3Uo0up2d0VPvm4KYmjwuTg9RfmLPbb98hOTwm46qbTSBwaWPNxtXYk7xYMyGXU
NsqTPIFL3cMLbesKAHKd/qexHNNovcvibIRIg7nrX1isHOJTKw30Jq2P6dVjJFyuDzq2gbmT7FVK
+4GLH6XQB7K4lza9cbUNHBOaMInNgQF2q5UnOAH6Qp3TM1sOZCpuLfV4bF8PYDgzBDIAexkpFESl
sByZIwwvDw1HYb0tRibmy0qjKls0tEUPIp1Ea+0g77fSOqEZE3UGhNHvMdBn7DCBJYHAkRmnZ9F9
fvxVOWnrv3XanpUF1OKtud+3SDkXH1H/cl8CLZNiFq1Q73zghufzl1CResm9qvfGzhm1tLafIuZl
x1/NXp3HcF1UlavggIdEYwk5YOfubN1coaJxQV7VdK3VklFZ/MwoasKQR1r0UbROeV05vjDNMkLO
5h+na1JquWEvhaoDzFECEg7OZBX63WD9o8zlo8F2J4xLD+Qu4vsYoPuvjvXFrd39bTZ3r7UmZRv+
uf10skdoHWHq4w2uLZnfJsnw11prySdHt8f6fJMDFTWKKZJOEKtr2rtDYf8oxM6SToWE4sVb/9Se
j5f60vifYTEgAox6bhOGeOFaHzf6gluWOpFAjWF8/au5v0vZgah9SKI2AzB7PZczG6R6ZsNgV3Rk
7uay1CnbxYK2XA6VobMDWp3MZf7TrCuG4DaQnguyEDElCNWX8Utw5Ngg7sJ7NYziyNymjyZS5Q9y
V5DZHamd5qOu85amPbOEnS1boICIOyIJ7R2YuaeTkO163Zqlp1mmvuSrkJvI6R48IU+QpBmbltYY
KFOS3CmL+8wBAB6qy7qAppmIUBm1gjmnZ/CfcpeB7SNeiPrqbPX25RC57FKqBD1UF/+M+T2WqZ2Z
r390FM4lMM5WRjrc0K5Toay/DkwBMeL3amMqcw8G5YcbyCjmkasrseT10NGnDdzCwCRzSC36dHs4
R6cE8v88umV4woPJD3LZs2i9BlbvXWKemAM2WRKTImOAuNqGnAYE0dk0TXAXrwTT9+pqYr46EUNe
DLILHmeQiFWbxixHTKStEsunrOByflSOtPzFNY2Ugk6Lu8QgeUJCeB5LTgq0av2uP/27htXHlJCX
WoLUrcMvXK1Avz6i+HRzrR6RaChaHqLBWirp/jpDU9h5QihsM+k/KQwHX53/7Z2P7BsmeYTs7udI
DiQCQ+9HxaKWK86y5lOimuTsL1EDXSGrRNcK46LroEk+vY0wVcfYVaeT2QWAAd1pFqsL50+nKAvd
oHJScIayJXVJSDiISDfPHlJdEM4SxWzYwum37KyVp09rEcq2AcXUF2xhwM7tOYJZPWOuTujKS3Kp
WDNo6YWGSdvTENg26q1Dtunr/YT7ABoKenqsmKNQlEVdo0ELS/V8CLvMJRcXX67f6M23qTx9PYlH
1yecT2XIx9FtP7MYlz0dJWLTwt6uxDA+DMXR9LfMbO1zKmf6v235QKINBOCTVLhN3w46Lpr6IhA0
GCY3CH6nNJloZP7mabVGD2UFxVmmr6BYV55d9LvzkXjWmy3utmYO/dIauckV8IyPa3g7EBAJ1eLL
ZWuRCjUCVb9BMUbpb8N/T+PSdTvtv0ajXV8va5GsTsRPtCXRkqKx+c8H5I6bOXE5abHtTtYEo/pB
6BU0ngn1oWj/Bu4NC+0LkfMNLLqlU/do/2vXHifhrXH0fHhwibI2+wliFUJKVViHT7HecmeJCPwB
YUYN9p5ad4X9xdqAA4JLSa0ZzovR9SxcvHQtbx9kFuaTayUnfdMzrX8KjBJroTgUye6u44QyE7th
tfAsoMIutyK6zCEL+iylgb+Zpr0kYT8ER6JPeWb+CZy891Uz5GQi5ZDBgvTQ6bWlfirVthq2AplV
7ASglhUz5bgzDkrWWKYcxZCYv7Gq3Ft0JHNIlUcc7I8eadAa3SiAVsUkDem7VBVMula+ywockqrQ
ivaaUp7UoYoMJ0foVWweDXmF+ajzIm921k2dnNGCEXxXLqWdNYc3GKcaot/c8TPwDULDaiC1Vnsf
0i59YTUhsD+lRUhA1Ix/L+0+Jx7LAPcecHDCm5tTXDD7he9pWwMCm3DV1ST2FWHRBdyw1alZZr+s
e3YZVkMfQcQNE+WKuehj52aswfPQucrO3pTpvlWEp6kUI4qQdnQpGYIO5TxplvdLk3cQ2lf/LOIz
j8UVl7OKSOxWZj5sohWnVRIZHrgYQrRYU09LWZiCamnDuB8V3WwU8L0Oj4InF//6O1tBgjoOcXkN
xAHrRU2hc4pPsHAFExiKQLxNwsn6ogl08VWCPC/aB99/G9bJT9PkdPnk14AQNiy2UqvVpK7KP23k
y99kOU8LomnRF7TWEK+vuzx/kRNsrdLL8M3Bh5Qt8gfJR0CEno+x385zqbwLuALHbyLPPZlCST+U
vsiyJM/MDJ2ss04hMV+W3W2DvnlZTXO51p/0lEIylUsSZVduDEDdVn2UmN8aOVFJs28lQiKRMS+C
GYsfGV6SetE+p3qbExlOHsbwva6wTibOVO9wGpVY2PoIx8a8nu46j2ySnoY5k9nbE0kFLBYQAE2L
H0KP4s0cOy7ibhemElnNXVQIBYmIgT2/PA9W7WO+IgYJ1pEGCcQMQP54g8C2UajpzGSSUo3GCLGi
f7nX6PML7GUVOqlMDN9ZoYjVhIBBxsLtn43qAerpdIRY56f3w2wdiIVkAI+4IjXm2N87wWOHZksk
3bmoakfeGaaGDckV8T6WWaw4GOal5i5PUFnQO+2kwDlV3sVjg0Sz6lB6OZyUim5+eLoU638XPxrW
MLnRyWI0iG8++/x6o4zRLJR+d07/7E/VEz1zZONPAsFuqY5pRAhLhUfSLPHRS9LpIbtN1XuYFkWe
PYP+8gz7AdH/iZpv/n+YKsOejWKARoeBI6zKg/xLXF5ZVpOgBJqtlxCnS20Yhm1Yb11C16XmU2uf
CAxpmAPis17efhUhjRBREhWBvSshZREaWktNxn7FDR7MWmzdDhZ4HHLdXzxpFYCvFuQj4bhXvoZi
JVq8fovV3GjzCJlai52eoUMjGubsr0JqNHymNZ0d1trnHKKigVIhjuISIe9w4bh1n8Pt2krHy24q
p5C6a0/bVtXX8h2jEdajNlsIb2moyHnzX7rJwgTbDwxmGPeSTQsUpAbpDoWXzPmRCbw0S8+ln8a5
GO5cakcAVqVmBsZuQDHajG+Err+YaYo5CtTrf5GlZewYngNQBj3BLn0Gk/F5cmDcDaKDX0Sllx0B
RVZamJC2WIXQA+Ft4TWpbSQbtWFbm6CKP33UCmMYKuQbzEwaIj2r2GMuGK1ZoRuVSg0OLaBDnDO0
6++MpkjZVxk7HEkmt/iGsn8s8pzPpSqu+tS754BoHIPkaVyo4ROEyaK2pQuc/lwg7q0rXu0Hw5JK
5mq2Sg5c9tT7Y4ibLmFjDiFqN48GxXCawr/RRfwCw/uWxHggbjmCO3WA1fGve6Q3Fxc8nKLrTSld
O+UZZa3o1qgSWAb+Yr4RBsHC4qn/EHD+aKbfpUIvdC9bb3z8PnXFjynVL4qjXmwS40OkeEjl1T7b
W5vPqU7E7PLDJGZ+oZWr84fY3DVvcV7UF3Zok6r2j7aboQVIGfP6kvB9CbqmRJz1pBeRZBcoAEPK
XZcp9sHtvVOyam/SwjOlJcVZv6O132DHXRvlP/UUDleUveiSH6dnuJcZGw0SNXLhMwrzhqI2ln8u
cXks9KOL68VNUEn1e6bcrFx6mNjENWbRDkllbzQ0oDtZPw2CMg+Vu/Zc0COMlmork7NP3XjvB8O9
hIFiziaN0mgiQuJckQNVhxOeJc4wA+OyZqnI+dOl7HOoiNhhZmFboLLqRO+TVbimcOQIzWMhdDFR
zo/KL4E2i4R2limoeCmhiUCIgZeAgy97Hlfg45yzFcyP/f6R7HkN9VE1NYYYfJSn0B2WK+bLsHAB
mpDihI2BgKV7hzZZeGErCAGRk1HeUbisEMmlr5OagdJsRUNUaq+OdTHY1Rjcusl6zVT1sifOn5AD
7dtTcO53Ns3GiqKKKmAt4XZTIJ2qiMyxnf92UQ+qMzh7SRt2x3YtEmx15xvZo/+vfWUHAW/lJyoe
59eTeG2VhU7kEVQiWP0qPsb9MVgxTFrcfOpyA3vMfySg8iduO98EvH6WtmJ336Gw7QBPLAIGOrlA
FjvF8RTNRQx1HDuluzVa78Ju8wDA/ArOS0ihtfKTJbVwKvRMhI7PoYD9eM4CSDL1TvdlrY/ksYDR
U7ylNbrz9vm/RKnnTDPJEj+AYD1PtfMYjbK7+4xwUXnMAclWFjccvF0CEUXuTCRtXRsbIpWL0+a2
YkDEIF6G71PpwkFrN05PQqn1qf4uplqytEbcZ/P4QAWAneIjkpef7f5wjMKBR3DJ0ntYgtWuXh34
ASyglqvW/reHcztqKkUddqg0WHkHt0sjC1F8slQTXBLia6nL1B+984G+ZLK99z2vGMOyJFDamVb1
1YGbM+DxCTArEHrn8pAOoVd3ffrbvJh84NxIi+vnwBtbDitVpkUyZ9fbQkbglPVVFG8FJceOLaao
ys8RZhVfvfrEPV6IDpQTkXZbxeqdea+5egerNwkNv5kBI1OTpi3x+kuHioTUol6BD4ELDbWMZ9ji
IRtc+tjy70bvlNqpvRpM429KEzHHf6+uL/u0YNm5PumONPeKmeLPRzT1sB8Rlfsx312L+s1JcJQJ
1qEFJvJg0vRy8veKoqGsISgQYKc+iSVhj1Z097utxb8zAltX7+YM6e3arvSAAYYlPdQAcRhRTvSq
ntuApNa1T4QQogNLE3N7XoFK8rp9IW+bCm0rLCx7dutV33il7UFGyOrAbxYTr9kBUplp15MInWUr
Km5yhDvvurivkbZEF2WdwoIVOu7I34T6UlLR8g1/tdqayvAUjVDe3SJuE79uPUoS+PSyloqqp3dx
5S0kLIarcLPsSdlhYf7z14rvg/rJ8W9kHO0TsB/RcIAulj+E7BNQqun+EYGJEwSO6IcQJp7cj0AV
2mPoAglAgFwDRb291Om0lCSD8Si/80gDNl5sUbocROntmUjI9Nv1IbCfCoFq1/ORY8hJ61tXYSJM
y5X4jKszmqnoJI4yTtQMEST+qMME1SKo+2F1kFTGaZO9VmNUx3W6Xop7+350sJ+dyF42OTjlrkNI
XIAYgaseOfV6N6XqqYSvnc5iNlIB03a9p03BYVuBOo6YxcWOhn7CB5B89ZdSLYFFnV+0KXrsI0Js
bslDMGB0ukiXjDtaVosDak6c7B+I7gh7YRk2FgowKIVj2yR9F0ef7rESy3zVq0tXbsCqXfPAyOSx
NjweEFR/22irjzX9u1coSuCUTDaVRZ/kCl9E6ghsecvRTspDJP6pCOe8GjffmhyQk1GdxnWRsALJ
jXeNaPVymy8UaK9ixYiazGRheaoqpKDx8qMiMvVrDqc+5pwIakjU2yPyJNp+JKi+PJ+8Ut/jtamo
al7saCZRbtHYjzea7thCotcB7cHjX7QhEK23RzASSU1FgffY1If/n0YI9CZlhVv2oyHzmyiS2UDZ
3D+rl60YhObVueIAH+zP4IIyC2kixWLl6XcW6OSILsE5YzJl9u+tgwBu7uy5yIadL7a3jZDgpLRf
A1gerFP8unETRzLBS5071CNGIsicloFLKQ+/7O97o+9LGXS36fJXMuZpYsuZ/1f3+GYB11jQHpYg
bzcmSbvbem/U0PI6M+PysUNr3GbON/DzRTD7nT3ZPj/hiMiE7adzeMUpFtsRr2NuKcbGVgdy65rq
sYx1PNiJjpc+Ac65TOvqq6KGA2NgWmtJt9xuJbaqHb1P/mlIT8F3/x+LBjbzFpWJONRs+rL6bNVX
LIxmP2N7WhtRGoz3EaDC099CZ9QnQ0hxCxKgl5aSJOVf0TmOpzHWM/gU34D9FKTxTOTyATUuh/nn
QHxeWOUf45EO9+pAlsNJFTjH+RsfREri2vRRcMuwhXzZuGpH2sWtqxlF3m8MWlv8lOCRY5ln4Vgg
J7oED0478b147S3tLCmmigj5EnPr0CHp5RuUWmMSpa+hut6evixKQsMlnHyYJqr5oUqYbdbazYE8
I2lBJM410UpHIv3BtmRa74ocO5zbmzv3+YpT6qkG/Q8mJYqTulN6tpLX/94WnEHWFetgGUKvag22
nIl/DvNhnIP3TyqDdSNKIIgxGpAGtaV8Ii7SJYaLrebnLrPhuuGhuJIdYQv0lmoJoqqOq9Qe+4mj
s+loahm/2blb//Oa1NL1u7Zm4j+CkyrBy6AOwxzJ7ljaUjZGDE7kmvMOVm/bAcb4CLW4sXYoU4hm
4/DZXopaVE1VzHAF3ZeU3qxjEdT8o518DPjarv0f7GJRUhPoVY+v8EAkxrarYOH2/lI8j/scNtop
vPQ6KPyAQeaPMngEaa8C/5KS/Q2C6/b3CiAVPMu2tMmT6TwbbgsqzRpNX2DcWdBwKZscUiewN6Kc
8qwB/fAfpNsW2PsyfTt4GSVpdcbvwgi8oysTbQjGFcgf9kXvdoJ/ZtN4dv5q5XS/tCs3Nf8eBmTe
nJDa8Ozd6zxkNjA+vviPLs+yFKsgm/jsaF0CYefETbqOQ0VEkQDtsYu5o903v/lDmGmyFMh6jk5B
SJZ0RCMQnsH8AOdaiTqtGn2udF1QMmJbB9I9GhUhnbVrgg5apc8E7Kzl4l6qJfQfzMgHenVNQ8Jo
eiffQJLeLXSXYkrNy3dsl24m+uU8CszgqJbTo5STrx+TQVA7p2XvSxVIo+y8CAnCrYiumlpI1RX6
aPkOx5aXWVLwwfiK5AXfCsH7nDU7BBNhtHnWkXDSnO0rlQMteYMxOZd06rk01u0vRBB6AqA/x1eb
D53iTLP4fDqf/DPikEumh3dxdmdljqg6rZEH2rgcR7/zpMWuMXZZFivHuCfRfl7pD8oMo78/0aTF
J1iaXK74gswe+njGQvt3c6lmeN/39CmRVmzKWK6QbiNKt73n/NKOO11gd/opbKJIk2M1HcGnXhfP
E6LcAyFZNH18IIPtOJQVBGcGNpsO6nwYP30RTjMDz/BPk8CToh89O379Kzm7Ej6nZJtIxYvszD4Q
5JR5/zMB6iWbA5JegzKFoBfVrLKWAKrPwofZNtpBPPGdpUInc4QbGfM86z8z2MGdMfSjmOvXhS/Y
5WbjnKTd00y7N2vo8sheYMXuHdygSWP+8niQvH7jOL2/TrPg395cz6wwQbUJpAZneKYe06j/i+Fa
0lEzfkW9MXQY3AnacOL2yklyD/2X8Pum/bkatDkMSxwdCDcHb6aje/oShegRulFRWhELJb9dys24
OI/HuaEjwFqDqKyOm1AL0+xWT+vKA5sc5Jm4gAvT0S37YmBSs+ycOYaSxAKiv19cnvwKM+fg9Y+u
X2ZuBTmSBi57u+shG8RQ4ktbTYpTy7atoGZFriZ19vAp5gAO4PSBS7ByFH49jBMBzy2O6Pgqayh9
5+ygSc5w4IWhsiC/rVUhfhwzIKWVrKSBK/5PzvpPj6yl5jGLFfAMOaLUhCHpgaYuM90SFFwulOIO
mZQ35I49RqO+M/K8QRbJK1QitniWQKMSCjFIn6BOk6RrHzkiSntRByCsPYEQlXdzISU/k+CFFySQ
Ca+SsxRIsagHRa8CKmu/hCHP9z060b4eFnCXk1lq9W0gJUrCsBcAysW1lqqr2HSrWDjW7Jec43aj
cWCi6Lmh3yxzqxmGjHz1dq17jmywovajHIGoQ04kyg6i5qwWVYHoH8bElunlkfOg7SoMiXHo2qBt
YQKeyGdtHzioJeqm4ixsLM1XmB9ha0uoE5uulE/yrYVEK249gazsMdSb3UlhNNvDQOJcCAwUwCI/
ypVBqbO6k8P3cFhbfSw3VSFl2/ynA57dObgSN7ZUbXipg6P+h2KiO/eAgIA3LP2ZIV6QfEM3Y+np
kdSffcGNa28yWtI3CXXMUk6UAsJhtvY3y0XCc//8MOQF+So+nuOjpi0e45JaOnYdHtaR0X+JQ+X/
MtXBkvz9FsuH5o3JAAOO36sl6deS2/NpvkthKbzk/eayMapqHEYr8d6zr1XK+zLU2e2zs4eVQ+y8
FU1s2eRR/YM/BREK5J+pg73v5/EOdaylkvOudyJ0wIMOUbaJdHk+VCagSUqDqs8H8bYwoksqOm0W
ZnuiEtj+qyrcxSnEB3MthIB3Kkut/L4lvkIZs8rRTwNWG1IiDJutSkBR8yWpVS5iFpnRQrMcvK2j
0gVy7YJpURDz+nBtSJKwUvCNoxHrIjM9/unPYdDXutTCIUwsZU+zjdi2X4ghaN2N/qV22yNM2Z8l
5h8mErQZNLTTpw06q9k2RTCPvrCxqORhZDctAVlntcwbAstSIGZkE0gBu7pSYVW3/hNB7YnMmGcS
RkTSfP2uM3xTGd2U0VwDC+FPiaAUJRn85c/eKEYyqL/S8nrzleD4/c6+O74kT6g+KuNk3wwRdF2e
Vb+hoXK742mTi0Wn6u/ufG29W7tHd6g2Bk9QLwPWvD/tslKB74gx8eiTTYR+XknpFYiWe751/Fl+
hTqH0d/CMVgIg5f3p1hWotHP4gXXKWw1j8x+raJ1anEg9E0+euHrZKbajazEGImbQZDmEpbVhoUY
4mEslIKep6ov/v037qbJzaveMzfVxLgH9zcNDz0COzx1K0ME5eEu7t9T9/rEcmpmVdcmNgzzitbO
Ii2bMD2C8zRMRTjpOSoo4pwjlvVWOZePbHf1oICafs5TpdKNCtx+SUDnp3CYLN93qeMvQgkNuvcl
o06tAQ/qhhCVxV7XhfGKSIycW03LHCulCS8xltJ1eadt5VBeBZOgSokFi6IKb8Utmn98Nkzhycvz
YfhHQiMzRghUgwePVIVcr+D57e/hruM9JcmKDM2efx85n88vBFHCmSCscAuv2LDUQDNdmv52ThTZ
q1PX6Q==
`protect end_protected
| bsd-2-clause | f2a10776ba923713babc69e3fd02f125 | 0.943821 | 1.82976 | false | false | false | false |
sergeykhbr/riscv_vhdl | vhdl/rtl/work/tb/uart_sim.vhd | 1 | 4,871 | --!
--! Copyright 2018 Sergey Khabarov, [email protected]
--!
--! Licensed under the Apache License, Version 2.0 (the "License");
--! you may not use this file except in compliance with the License.
--! You may obtain a copy of the License at
--!
--! http://www.apache.org/licenses/LICENSE-2.0
--!
--! Unless required by applicable law or agreed to in writing, software
--! distributed under the License is distributed on an "AS IS" BASIS,
--! WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
--! See the License for the specific language governing permissions and
--! limitations under the License.
--!
library ieee;
use ieee.std_logic_1164.all;
library std;
use std.textio.all;
library commonlib;
use commonlib.types_common.all;
use commonlib.types_util.all;
entity uart_sim is
generic (
clock_rate : integer := 10;
binary_bytes_max : integer := 8;
use_binary : boolean := false
);
port (
rst : in std_logic;
clk : in std_logic;
wr_str : in std_logic;
instr : in string;
bin_data : in std_logic_vector(8*binary_bytes_max-1 downto 0);
bin_bytes_sz : in integer;
td : in std_logic;
rtsn : in std_logic;
rd : out std_logic;
ctsn : out std_logic;
busy : out std_logic
);
end;
architecture uart_sim_rtl of uart_sim is
constant STATE_idle : integer := 0;
constant STATE_startbit : integer := 1;
constant STATE_data : integer := 2;
constant STATE_parity : integer := 3;
constant STATE_stopbit : integer := 4;
type registers is record
txstate : integer range 0 to 4;
tx_data : std_logic_vector(10 downto 0);
txbitcnt : integer range 0 to 12;
clk_rate_cnt : integer;
msg_symb_cnt : integer range 0 to 256;
msg_len : integer;
msg : string(1 to 256);
msg_bin : std_logic_vector(8*binary_bytes_max-1 downto 0);
is_data : std_logic;
end record;
signal r, rin : registers;
begin
comblogic : process(rst, r, wr_str, instr)
variable v : registers;
variable symbol : std_logic_vector(7 downto 0);
variable RATE_EVENT : std_logic;
begin
v := r;
RATE_EVENT := '0';
if r.clk_rate_cnt = (clock_rate - 1) then
RATE_EVENT := '1';
end if;
if wr_str = '1' then
if use_binary = true then
v.msg_bin := bin_data;
v.msg_len := bin_bytes_sz;
else
v.msg := instr;
v.msg_len := strlen(instr);
end if;
v.is_data := '1';
end if;
case r.txstate is
when STATE_idle =>
v.txbitcnt := 0;
if r.is_data = '1' and RATE_EVENT = '1' then
v.txstate := STATE_startbit;
v.is_data := '0';
if use_binary = true then
symbol := r.msg_bin(8*binary_bytes_max-1 downto 8*binary_bytes_max-8);
v.msg_bin := r.msg_bin(8*(binary_bytes_max-1)-1 downto 0) & X"00";
else
symbol := SymbolToSVector(r.msg, r.msg_symb_cnt);
end if;
v.tx_data := "01" & symbol & '0'; -- [stopbit=1, ?parity? (skiped), data, start_bit=0]
elsif r.is_data = '1' then
-- do nothing
else
v.tx_data := (others => '1');
v.msg_symb_cnt := 0; -- symbols in string start from 1 to len.
v.clk_rate_cnt := 0;
end if;
when STATE_startbit =>
if RATE_EVENT = '1' then
v.txstate := STATE_data;
v.tx_data := '0' & r.tx_data(10 downto 1);
end if;
when STATE_data =>
if RATE_EVENT = '1' then
v.tx_data := '0' & r.tx_data(10 downto 1);
if r.txbitcnt = 8 then
v.txstate := STATE_stopbit;
end if;
end if;
when STATE_parity =>
v.tx_data := '0' & r.tx_data(10 downto 1);
when STATE_stopbit =>
if RATE_EVENT = '1' then
v.tx_data := (others => '1');
if (r.msg_symb_cnt + 1) = r.msg_len then
v.txstate := STATE_idle;
else
v.is_data := '1';
v.txstate := STATE_idle;
v.msg_symb_cnt := r.msg_symb_cnt + 1;
end if;
end if;
when others =>
end case;
if r.txstate /= STATE_idle and RATE_EVENT = '1' then
busy <= '1';
v.txbitcnt := r.txbitcnt + 1;
else
busy <= '0';
end if;
if RATE_EVENT = '1' then
v.clk_rate_cnt := 0;
else
v.clk_rate_cnt := r.clk_rate_cnt + 1;
end if;
-- Reset
if rst = '1' then
v.txstate := STATE_idle;
v.clk_rate_cnt := 0;
v.is_data := '0';
end if;
ctsn <= rst;
rd <= r.tx_data(0);
rin <= v;
end process;
procCheck : process (clk)
begin
if rising_edge(clk) then
r <= rin;
end if;
end process;
end;
| apache-2.0 | 99bfa5e36990481a7ed52a51254d4e18 | 0.542394 | 3.403913 | false | false | false | false |
sergeykhbr/riscv_vhdl | vhdl/rtl/riverlib/core/fetch.vhd | 1 | 5,881 | --!
--! Copyright 2019 Sergey Khabarov, [email protected]
--!
--! Licensed under the Apache License, Version 2.0 (the "License");
--! you may not use this file except in compliance with the License.
--! You may obtain a copy of the License at
--!
--! http://www.apache.org/licenses/LICENSE-2.0
--!
--! Unless required by applicable law or agreed to in writing, software
--! distributed under the License is distributed on an "AS IS" BASIS,
--! WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
--! See the License for the specific language governing permissions and
--! limitations under the License.
--!
library ieee;
use ieee.std_logic_1164.all;
library commonlib;
use commonlib.types_common.all;
--! RIVER CPU specific library.
library riverlib;
--! RIVER CPU configuration constants.
use riverlib.river_cfg.all;
entity InstrFetch is generic (
async_reset : boolean
);
port (
i_clk : in std_logic;
i_nrst : in std_logic;
i_pipeline_hold : in std_logic;
i_mem_req_ready : in std_logic;
o_mem_addr_valid : out std_logic;
o_mem_addr : out std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
i_mem_data_valid : in std_logic;
i_mem_data_addr : in std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
i_mem_data : in std_logic_vector(31 downto 0);
i_mem_load_fault : in std_logic;
i_mem_executable : in std_logic;
o_mem_resp_ready : out std_logic;
i_flush_pipeline : in std_logic; -- reset pipeline and cache
i_progbuf_ena : in std_logic; -- executing from prog buffer
i_progbuf_pc : in std_logic_vector(31 downto 0); -- progbuf counter
i_progbuf_data : in std_logic_vector(31 downto 0); -- progbuf instruction
i_predict_npc : in std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
o_mem_req_fire : out std_logic; -- used by branch predictor to form new npc value
o_instr_load_fault : out std_logic; -- fault instruction's address
o_instr_executable : out std_logic;
o_valid : out std_logic;
o_pc : out std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
o_instr : out std_logic_vector(31 downto 0);
o_hold : out std_logic -- Hold due no response from icache yet
);
end;
architecture arch_InstrFetch of InstrFetch is
type RegistersType is record
wait_resp : std_logic;
br_address : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
br_instr : std_logic_vector(31 downto 0);
resp_address : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
resp_data : std_logic_vector(31 downto 0);
resp_valid : std_logic;
instr_load_fault : std_logic;
instr_executable : std_logic;
end record;
constant R_RESET : RegistersType := (
'0',
(others => '1'), -- br_address
(others =>'0'), -- br_instr
(others =>'0'), (others =>'0'), '0',
'0', -- instr_load_fault
'0' -- instr_executable
);
signal r, rin : RegistersType;
begin
comb : process(i_nrst, i_pipeline_hold, i_mem_req_ready, i_mem_data_valid,
i_mem_data_addr, i_mem_data, i_mem_load_fault, i_mem_executable,
i_flush_pipeline, i_progbuf_ena, i_progbuf_pc, i_progbuf_data,
i_predict_npc, r)
variable v : RegistersType;
variable w_o_req_valid : std_logic;
variable w_o_req_fire : std_logic;
variable w_o_hold : std_logic;
variable wb_o_pc : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
variable wb_o_instr : std_logic_vector(31 downto 0);
variable w_o_valid : std_logic;
begin
v := r;
w_o_req_valid := not i_pipeline_hold
and not (r.wait_resp and not i_mem_data_valid)
and not i_progbuf_ena;
w_o_req_fire := i_mem_req_ready and w_o_req_valid;
w_o_hold := not (r.wait_resp and i_mem_data_valid)
and not i_progbuf_ena;
if w_o_req_fire = '1' then
v.wait_resp := '1';
elsif i_mem_data_valid = '1' and i_pipeline_hold = '0' then
v.wait_resp := '0';
end if;
if i_mem_data_valid = '1' and r.wait_resp = '1' and i_pipeline_hold = '0' then
v.resp_valid := '1';
v.resp_address := i_mem_data_addr;
v.resp_data := i_mem_data;
v.instr_load_fault := i_mem_load_fault;
v.instr_executable := i_mem_executable;
end if;
if i_flush_pipeline = '1' then
-- Clear pipeline stage
v.resp_address := (others => '1');
end if;
wb_o_pc := r.resp_address;
if i_progbuf_ena = '1' then
wb_o_instr := i_progbuf_data;
wb_o_pc := i_progbuf_pc;
else
wb_o_instr := r.resp_data;
wb_o_instr := r.resp_data;
end if;
w_o_valid := (r.resp_valid or i_progbuf_ena)
and not (i_pipeline_hold or w_o_hold);
-- Breakpoint skip logic that allows to continue execution
-- without actual breakpoint remove only once
if wb_o_pc = r.br_address then
wb_o_instr := r.br_instr;
if i_mem_data_valid = '1' and r.wait_resp = '1' and i_pipeline_hold = '0' then
v.br_address := (others => '1');
end if;
end if;
if not async_reset and i_nrst = '0' then
v := R_RESET;
end if;
o_mem_addr_valid <= w_o_req_valid;
o_mem_addr <= i_predict_npc;
o_mem_req_fire <= w_o_req_fire;
o_instr_load_fault <= r.instr_load_fault;
o_instr_executable <= r.instr_executable;
o_valid <= w_o_valid;
o_pc <= wb_o_pc;
o_instr <= wb_o_instr;
o_mem_resp_ready <= r.wait_resp and not i_pipeline_hold;
o_hold <= w_o_hold;
rin <= v;
end process;
-- registers:
regs : process(i_clk, i_nrst)
begin
if async_reset and i_nrst = '0' then
r <= R_RESET;
elsif rising_edge(i_clk) then
r <= rin;
end if;
end process;
end;
| apache-2.0 | f2ab4dde310c08dea6a1f361e5551064 | 0.601768 | 3.129856 | false | false | false | false |
Bjay1435/capstone | Geoff/Geoff.srcs/sources_1/bd/dma_loopback/ipshared/xilinx.com/axi_dma_v7_1/hdl/src/vhdl/axi_dma_lite_if.vhd | 1 | 61,582 | -------------------------------------------------------------------------------
-- axi_dma_lite_if
-------------------------------------------------------------------------------
--
-- *************************************************************************
--
-- (c) Copyright 2010, 2011 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
--
-- *************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: axi_dma_lite_if.vhd
-- Description: This entity is AXI Lite Interface Module for the AXI DMA
--
-- VHDL-Standard: VHDL'93
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use ieee.std_logic_misc.all;
library unisim;
use unisim.vcomponents.all;
library axi_dma_v7_1_10;
use axi_dma_v7_1_10.axi_dma_pkg.all;
library lib_pkg_v1_0_2;
library lib_cdc_v1_0_2;
use lib_pkg_v1_0_2.lib_pkg.clog2;
-------------------------------------------------------------------------------
entity axi_dma_lite_if is
generic(
C_NUM_CE : integer := 8 ;
C_AXI_LITE_IS_ASYNC : integer range 0 to 1 := 0 ;
C_S_AXI_LITE_ADDR_WIDTH : integer range 2 to 32 := 32 ;
C_S_AXI_LITE_DATA_WIDTH : integer range 32 to 32 := 32
);
port (
-- Async clock input
ip2axi_aclk : in std_logic ; --
ip2axi_aresetn : in std_logic ; --
-----------------------------------------------------------------------
-- AXI Lite Control Interface
-----------------------------------------------------------------------
s_axi_lite_aclk : in std_logic ; --
s_axi_lite_aresetn : in std_logic ; --
--
-- AXI Lite Write Address Channel --
s_axi_lite_awvalid : in std_logic ; --
s_axi_lite_awready : out std_logic ; --
s_axi_lite_awaddr : in std_logic_vector --
(C_S_AXI_LITE_ADDR_WIDTH-1 downto 0); --
--
-- AXI Lite Write Data Channel --
s_axi_lite_wvalid : in std_logic ; --
s_axi_lite_wready : out std_logic ; --
s_axi_lite_wdata : in std_logic_vector --
(C_S_AXI_LITE_DATA_WIDTH-1 downto 0); --
--
-- AXI Lite Write Response Channel --
s_axi_lite_bresp : out std_logic_vector(1 downto 0) ; --
s_axi_lite_bvalid : out std_logic ; --
s_axi_lite_bready : in std_logic ; --
--
-- AXI Lite Read Address Channel --
s_axi_lite_arvalid : in std_logic ; --
s_axi_lite_arready : out std_logic ; --
s_axi_lite_araddr : in std_logic_vector --
(C_S_AXI_LITE_ADDR_WIDTH-1 downto 0); --
s_axi_lite_rvalid : out std_logic ; --
s_axi_lite_rready : in std_logic ; --
s_axi_lite_rdata : out std_logic_vector --
(C_S_AXI_LITE_DATA_WIDTH-1 downto 0); --
s_axi_lite_rresp : out std_logic_vector(1 downto 0) ; --
--
-- User IP Interface --
axi2ip_wrce : out std_logic_vector --
(C_NUM_CE-1 downto 0) ; --
axi2ip_wrdata : out std_logic_vector --
(C_S_AXI_LITE_DATA_WIDTH-1 downto 0); --
--
axi2ip_rdce : out std_logic_vector --
(C_NUM_CE-1 downto 0) ; --
axi2ip_rdaddr : out std_logic_vector --
(C_S_AXI_LITE_ADDR_WIDTH-1 downto 0); --
ip2axi_rddata : in std_logic_vector --
(C_S_AXI_LITE_DATA_WIDTH-1 downto 0) --
);
end axi_dma_lite_if;
-------------------------------------------------------------------------------
-- Architecture
-------------------------------------------------------------------------------
architecture implementation of axi_dma_lite_if is
attribute DowngradeIPIdentifiedWarnings: string;
attribute DowngradeIPIdentifiedWarnings of implementation : architecture is "yes";
-------------------------------------------------------------------------------
-- Functions
-------------------------------------------------------------------------------
-- No Functions Declared
-------------------------------------------------------------------------------
-- Constants Declarations
-------------------------------------------------------------------------------
-- Register I/F Address offset
constant ADDR_OFFSET : integer := clog2(C_S_AXI_LITE_DATA_WIDTH/8);
-- Register I/F CE number
constant CE_ADDR_SIZE : integer := clog2(C_NUM_CE);
-------------------------------------------------------------------------------
-- Signal / Type Declarations
-------------------------------------------------------------------------------
-- AXI Lite slave interface signals
signal awvalid : std_logic := '0';
signal awaddr : std_logic_vector
(C_S_AXI_LITE_ADDR_WIDTH-1 downto 0) := (others => '0');
signal wvalid : std_logic := '0';
signal wdata : std_logic_vector
(C_S_AXI_LITE_DATA_WIDTH-1 downto 0) := (others => '0');
signal arvalid : std_logic := '0';
signal araddr : std_logic_vector
(C_S_AXI_LITE_ADDR_WIDTH-1 downto 0) := (others => '0');
signal awvalid_d1 : std_logic := '0';
signal awvalid_re : std_logic := '0';
signal awready_i : std_logic := '0';
signal wvalid_d1 : std_logic := '0';
signal wvalid_re : std_logic := '0';
signal wready_i : std_logic := '0';
signal bvalid_i : std_logic := '0';
signal wr_addr_cap : std_logic := '0';
signal wr_data_cap : std_logic := '0';
-- AXI to IP interface signals
signal axi2ip_wraddr_i : std_logic_vector
(C_S_AXI_LITE_ADDR_WIDTH-1 downto 0) := (others => '0');
signal axi2ip_wrdata_i : std_logic_vector
(C_S_AXI_LITE_DATA_WIDTH-1 downto 0) := (others => '0');
signal axi2ip_wren : std_logic := '0';
signal wrce : std_logic_vector(C_NUM_CE-1 downto 0);
signal rdce : std_logic_vector(C_NUM_CE-1 downto 0) := (others => '0');
signal arvalid_d1 : std_logic := '0';
signal arvalid_re : std_logic := '0';
signal arvalid_re_d1 : std_logic := '0';
signal arvalid_i : std_logic := '0';
signal arready_i : std_logic := '0';
signal rvalid : std_logic := '0';
signal axi2ip_rdaddr_i : std_logic_vector
(C_S_AXI_LITE_ADDR_WIDTH-1 downto 0) := (others => '0');
signal s_axi_lite_rvalid_i : std_logic := '0';
signal read_in_progress : std_logic := '0'; -- CR607165
signal rst_rvalid_re : std_logic := '0'; -- CR576999
signal rst_wvalid_re : std_logic := '0'; -- CR576999
signal rdy : std_logic := '0';
signal rdy1 : std_logic := '0';
signal wr_in_progress : std_logic := '0';
-------------------------------------------------------------------------------
-- Begin architecture logic
-------------------------------------------------------------------------------
begin
--*****************************************************************************
--** AXI LITE READ
--*****************************************************************************
s_axi_lite_wready <= wready_i;
s_axi_lite_awready <= awready_i;
s_axi_lite_arready <= arready_i;
s_axi_lite_bvalid <= bvalid_i;
-------------------------------------------------------------------------------
-- Register AXI Inputs
-------------------------------------------------------------------------------
REG_INPUTS : process(s_axi_lite_aclk)
begin
if(s_axi_lite_aclk'EVENT and s_axi_lite_aclk = '1')then
if(s_axi_lite_aresetn = '0')then
awvalid <= '0' ;
awaddr <= (others => '0') ;
wvalid <= '0' ;
wdata <= (others => '0') ;
arvalid <= '0' ;
araddr <= (others => '0') ;
else
awvalid <= s_axi_lite_awvalid ;
awaddr <= s_axi_lite_awaddr ;
wvalid <= s_axi_lite_wvalid ;
wdata <= s_axi_lite_wdata ;
arvalid <= s_axi_lite_arvalid ;
araddr <= s_axi_lite_araddr ;
end if;
end if;
end process REG_INPUTS;
-- s_axi_lite_aclk is synchronous to ip clock
GEN_SYNC_WRITE : if C_AXI_LITE_IS_ASYNC = 0 generate
begin
-------------------------------------------------------------------------------
-- Assert Write Adddress Ready Handshake
-- Capture rising edge of valid and register out as ready. This creates
-- a 3 clock cycle address phase but also registers all inputs and outputs.
-- Note : Single clock cycle address phase can be accomplished using
-- combinatorial logic.
-------------------------------------------------------------------------------
REG_AWVALID : process(s_axi_lite_aclk)
begin
if(s_axi_lite_aclk'EVENT and s_axi_lite_aclk = '1')then
if(s_axi_lite_aresetn = '0' or rst_wvalid_re = '1')then
awvalid_d1 <= '0';
-- awvalid_re <= '0'; -- CR605883
else
awvalid_d1 <= awvalid;
-- awvalid_re <= awvalid and not awvalid_d1; -- CR605883
end if;
end if;
end process REG_AWVALID;
awvalid_re <= awvalid and not awvalid_d1 and (not (wr_in_progress)); -- CR605883
-------------------------------------------------------------------------------
-- Capture assertion of awvalid to indicate that we have captured
-- a valid address
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Assert Write Data Ready Handshake
-- Capture rising edge of valid and register out as ready. This creates
-- a 3 clock cycle address phase but also registers all inputs and outputs.
-- Note : Single clock cycle address phase can be accomplished using
-- combinatorial logic.
-------------------------------------------------------------------------------
REG_WVALID : process(s_axi_lite_aclk)
begin
if(s_axi_lite_aclk'EVENT and s_axi_lite_aclk = '1')then
if(s_axi_lite_aresetn = '0' or rst_wvalid_re = '1')then
wvalid_d1 <= '0';
-- wvalid_re <= '0';
else
wvalid_d1 <= wvalid;
-- wvalid_re <= wvalid and not wvalid_d1; -- CR605883
end if;
end if;
end process REG_WVALID;
wvalid_re <= wvalid and not wvalid_d1; -- CR605883
WRITE_IN_PROGRESS : process(s_axi_lite_aclk)
begin
if(s_axi_lite_aclk'EVENT and s_axi_lite_aclk = '1')then
if(s_axi_lite_aresetn = '0' or rst_wvalid_re = '1')then
wr_in_progress <= '0';
elsif(awvalid_re = '1')then
wr_in_progress <= '1';
end if;
end if;
end process WRITE_IN_PROGRESS;
-- CR605883 (CDC) provide pure register output to synchronizers
--wvalid_re <= wvalid and not wvalid_d1 and not rst_wvalid_re;
-------------------------------------------------------------------------------
-- Capture assertion of wvalid to indicate that we have captured
-- valid data
-------------------------------------------------------------------------------
WRDATA_CAP_FLAG : process(s_axi_lite_aclk)
begin
if(s_axi_lite_aclk'EVENT and s_axi_lite_aclk = '1')then
if(s_axi_lite_aresetn = '0' or rdy = '1')then
wr_data_cap <= '0';
elsif(wvalid_re = '1')then
wr_data_cap <= '1';
end if;
end if;
end process WRDATA_CAP_FLAG;
REG_WREADY : process(s_axi_lite_aclk)
begin
if(s_axi_lite_aclk'EVENT and s_axi_lite_aclk = '1')then
if(s_axi_lite_aresetn = '0' or rdy = '1') then
rdy <= '0';
elsif (wr_data_cap = '1' and wr_addr_cap = '1') then
rdy <= '1';
end if;
wready_i <= rdy;
awready_i <= rdy;
rdy1 <= rdy;
end if;
end process REG_WREADY;
WRADDR_CAP_FLAG : process(s_axi_lite_aclk)
begin
if(s_axi_lite_aclk'EVENT and s_axi_lite_aclk = '1')then
if(s_axi_lite_aresetn = '0' or rdy = '1')then
wr_addr_cap <= '0';
elsif(awvalid_re = '1')then
wr_addr_cap <= '1';
end if;
end if;
end process WRADDR_CAP_FLAG;
-------------------------------------------------------------------------------
-- Capture Write Address
-------------------------------------------------------------------------------
REG_WRITE_ADDRESS : process(s_axi_lite_aclk)
begin
if(s_axi_lite_aclk'EVENT and s_axi_lite_aclk = '1')then
if(s_axi_lite_aresetn = '0')then
-- axi2ip_wraddr_i <= (others => '0');
-- Register address on valid
elsif(awvalid_re = '1')then
-- axi2ip_wraddr_i <= awaddr;
end if;
end if;
end process REG_WRITE_ADDRESS;
-------------------------------------------------------------------------------
-- Capture Write Data
-------------------------------------------------------------------------------
REG_WRITE_DATA : process(s_axi_lite_aclk)
begin
if(s_axi_lite_aclk'EVENT and s_axi_lite_aclk = '1')then
if(s_axi_lite_aresetn = '0')then
axi2ip_wrdata_i <= (others => '0');
-- Register address and assert ready
elsif(wvalid_re = '1')then
axi2ip_wrdata_i <= wdata;
end if;
end if;
end process REG_WRITE_DATA;
-------------------------------------------------------------------------------
-- Must have both a valid address and valid data before updating
-- a register. Note in AXI write address can come before or
-- after AXI write data.
-- axi2ip_wren <= '1' when wr_data_cap = '1' and wr_addr_cap = '1'
-- else '0';
axi2ip_wren <= rdy; -- or rdy1;
-------------------------------------------------------------------------------
-- Decode and assert proper chip enable per captured axi lite write address
-------------------------------------------------------------------------------
WRCE_GEN: for j in 0 to C_NUM_CE - 1 generate
constant BAR : std_logic_vector(CE_ADDR_SIZE-1 downto 0) :=
std_logic_vector(to_unsigned(j,CE_ADDR_SIZE));
begin
wrce(j) <= axi2ip_wren when s_axi_lite_awaddr
((CE_ADDR_SIZE + ADDR_OFFSET) - 1
downto ADDR_OFFSET)
= BAR(CE_ADDR_SIZE-1 downto 0)
else '0';
end generate WRCE_GEN;
-------------------------------------------------------------------------------
-- register write ce's and data out to axi dma register module
-------------------------------------------------------------------------------
REG_WR_OUT : process(s_axi_lite_aclk)
begin
if(s_axi_lite_aclk'EVENT and s_axi_lite_aclk = '1')then
if(s_axi_lite_aresetn = '0')then
axi2ip_wrce <= (others => '0');
-- axi2ip_wrdata <= (others => '0');
else
axi2ip_wrce <= wrce;
-- axi2ip_wrdata <= axi2ip_wrdata_i;
end if;
end if;
end process REG_WR_OUT;
axi2ip_wrdata <= s_axi_lite_wdata;
-------------------------------------------------------------------------------
-- Write Response
-------------------------------------------------------------------------------
s_axi_lite_bresp <= OKAY_RESP;
WRESP_PROCESS : process(s_axi_lite_aclk)
begin
if(s_axi_lite_aclk'EVENT and s_axi_lite_aclk = '1')then
if(s_axi_lite_aresetn = '0')then
bvalid_i <= '0';
rst_wvalid_re <= '0'; -- CR576999
-- If response issued and target indicates ready then
-- clear response
elsif(bvalid_i = '1' and s_axi_lite_bready = '1')then
bvalid_i <= '0';
rst_wvalid_re <= '0'; -- CR576999
-- Issue a resonse on write
elsif(rdy1 = '1')then
bvalid_i <= '1';
rst_wvalid_re <= '1'; -- CR576999
end if;
end if;
end process WRESP_PROCESS;
end generate GEN_SYNC_WRITE;
-- s_axi_lite_aclk is asynchronous to ip clock
GEN_ASYNC_WRITE : if C_AXI_LITE_IS_ASYNC = 1 generate
-- Data support
-----------------------------------------------------------------------------
-- ATTRIBUTE Declarations
-----------------------------------------------------------------------------
-- Prevent x-propagation on clock-domain crossing register
ATTRIBUTE async_reg : STRING;
Attribute KEEP : string; -- declaration
Attribute EQUIVALENT_REGISTER_REMOVAL : string; -- declaration
signal ip_wvalid_d1_cdc_to : std_logic := '0';
signal ip_wvalid_d2 : std_logic := '0';
signal ip_wvalid_re : std_logic := '0';
signal wr_wvalid_re_cdc_from : std_logic := '0';
signal wr_data_cdc_from : std_logic_vector -- CR605883
(C_S_AXI_LITE_DATA_WIDTH-1 downto 0) := (others => '0'); -- CR605883
signal wdata_d1_cdc_to : std_logic_vector
(C_S_AXI_LITE_DATA_WIDTH-1 downto 0) := (others => '0');
signal wdata_d2 : std_logic_vector
(C_S_AXI_LITE_DATA_WIDTH-1 downto 0) := (others => '0');
signal axi2ip_wrdata_cdc_tig : std_logic_vector
(C_S_AXI_LITE_DATA_WIDTH-1 downto 0) := (others => '0');
signal ip_data_cap : std_logic := '0';
-- Address support
signal ip_awvalid_d1_cdc_to : std_logic := '0';
signal ip_awvalid_d2 : std_logic := '0';
signal ip_awvalid_re : std_logic := '0';
signal wr_awvalid_re_cdc_from : std_logic := '0';
signal wr_addr_cdc_from : std_logic_vector -- CR605883
(C_S_AXI_LITE_ADDR_WIDTH-1 downto 0) := (others => '0'); -- CR605883
signal awaddr_d1_cdc_tig : std_logic_vector
(C_S_AXI_LITE_ADDR_WIDTH-1 downto 0) := (others => '0');
signal awaddr_d2 : std_logic_vector
(C_S_AXI_LITE_ADDR_WIDTH-1 downto 0) := (others => '0');
signal ip_addr_cap : std_logic := '0';
-- Bvalid support
signal lite_data_cap_d1 : std_logic := '0';
signal lite_data_cap_d2 : std_logic := '0';
signal lite_addr_cap_d1 : std_logic := '0';
signal lite_addr_cap_d2 : std_logic := '0';
signal lite_axi2ip_wren : std_logic := '0';
signal awvalid_cdc_from : std_logic := '0';
signal awvalid_cdc_to : std_logic := '0';
signal awvalid_to : std_logic := '0';
signal awvalid_to2 : std_logic := '0';
--ATTRIBUTE async_reg OF awvalid_cdc_to : SIGNAL IS "true";
--ATTRIBUTE async_reg OF awvalid_to : SIGNAL IS "true";
signal wvalid_cdc_from : std_logic := '0';
signal wvalid_cdc_to : std_logic := '0';
signal wvalid_to : std_logic := '0';
signal wvalid_to2 : std_logic := '0';
--ATTRIBUTE async_reg OF wvalid_cdc_to : SIGNAL IS "true";
--ATTRIBUTE async_reg OF wvalid_to : SIGNAL IS "true";
signal rdy_cdc_to : std_logic := '0';
signal rdy_cdc_from : std_logic := '0';
signal rdy_to : std_logic := '0';
signal rdy_to2 : std_logic := '0';
signal rdy_to2_cdc_from : std_logic := '0';
signal rdy_out : std_logic := '0';
--ATTRIBUTE async_reg OF rdy_cdc_to : SIGNAL IS "true";
--ATTRIBUTE async_reg OF rdy_to : SIGNAL IS "true";
Attribute KEEP of rdy_to2_cdc_from : signal is "TRUE";
Attribute EQUIVALENT_REGISTER_REMOVAL of rdy_to2_cdc_from : signal is "no";
signal rdy_back_cdc_to : std_logic := '0';
signal rdy_back_to : std_logic :='0';
--ATTRIBUTE async_reg OF rdy_back_cdc_to : SIGNAL IS "true";
--ATTRIBUTE async_reg OF rdy_back_to : SIGNAL IS "true";
signal rdy_back : std_logic := '0';
signal rdy_shut : std_logic := '0';
begin
REG_AWVALID : process(s_axi_lite_aclk)
begin
if(s_axi_lite_aclk'EVENT and s_axi_lite_aclk = '1')then
if(s_axi_lite_aresetn = '0' or rst_wvalid_re = '1')then
awvalid_d1 <= '0';
else
awvalid_d1 <= awvalid;
end if;
end if;
end process REG_AWVALID;
awvalid_re <= awvalid and not awvalid_d1 and (not (wr_in_progress)); -- CR605883
-------------------------------------------------------------------------------
-- Capture assertion of awvalid to indicate that we have captured
-- a valid address
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Assert Write Data Ready Handshake
-- Capture rising edge of valid and register out as ready. This creates
-- a 3 clock cycle address phase but also registers all inputs and outputs.
-- Note : Single clock cycle address phase can be accomplished using
-- combinatorial logic.
-------------------------------------------------------------------------------
REG_WVALID : process(s_axi_lite_aclk)
begin
if(s_axi_lite_aclk'EVENT and s_axi_lite_aclk = '1')then
if(s_axi_lite_aresetn = '0' or rst_wvalid_re = '1')then
wvalid_d1 <= '0';
else
wvalid_d1 <= wvalid;
end if;
end if;
end process REG_WVALID;
wvalid_re <= wvalid and not wvalid_d1; -- CR605883
--*************************************************************************
--** Write Address Support
--*************************************************************************
AWVLD_CDC_FROM : process(s_axi_lite_aclk)
begin
if(s_axi_lite_aclk'EVENT and s_axi_lite_aclk = '1')then
if(s_axi_lite_aresetn = '0' or rst_wvalid_re = '1')then
awvalid_cdc_from <= '0';
elsif(awvalid_re = '1')then
awvalid_cdc_from <= '1';
end if;
end if;
end process AWVLD_CDC_FROM;
AWVLD_CDC_TO : entity lib_cdc_v1_0_2.cdc_sync
generic map (
C_CDC_TYPE => 1,
C_RESET_STATE => 0,
C_SINGLE_BIT => 1,
C_VECTOR_WIDTH => 32,
C_MTBF_STAGES => MTBF_STAGES
)
port map (
prmry_aclk => s_axi_lite_aclk,
prmry_resetn => '0',
prmry_in => awvalid_cdc_from,
prmry_vect_in => (others => '0'),
scndry_aclk => ip2axi_aclk,
scndry_resetn => '0',
scndry_out => awvalid_to,
scndry_vect_out => open
);
-- AWVLD_CDC_TO : process(ip2axi_aclk)
-- begin
-- if(ip2axi_aclk'EVENT and ip2axi_aclk = '1')then
-- awvalid_cdc_to <= awvalid_cdc_from;
-- awvalid_to <= awvalid_cdc_to;
-- end if;
-- end process AWVLD_CDC_TO;
AWVLD_CDC_TO2 : process(ip2axi_aclk)
begin
if(ip2axi_aclk'EVENT and ip2axi_aclk = '1')then
if(ip2axi_aresetn = '0')then
awvalid_to2 <= '0';
else
awvalid_to2 <= awvalid_to;
end if;
end if;
end process AWVLD_CDC_TO2;
ip_awvalid_re <= awvalid_to and (not awvalid_to2);
WVLD_CDC_FROM : process(s_axi_lite_aclk)
begin
if(s_axi_lite_aclk'EVENT and s_axi_lite_aclk = '1')then
if(s_axi_lite_aresetn = '0' or rst_wvalid_re = '1')then
wvalid_cdc_from <= '0';
elsif(wvalid_re = '1')then
wvalid_cdc_from <= '1';
end if;
end if;
end process WVLD_CDC_FROM;
WVLD_CDC_TO : entity lib_cdc_v1_0_2.cdc_sync
generic map (
C_CDC_TYPE => 1,
C_RESET_STATE => 0,
C_SINGLE_BIT => 1,
C_VECTOR_WIDTH => 32,
C_MTBF_STAGES => MTBF_STAGES
)
port map (
prmry_aclk => s_axi_lite_aclk,
prmry_resetn => '0',
prmry_in => wvalid_cdc_from,
prmry_vect_in => (others => '0'),
scndry_aclk => ip2axi_aclk,
scndry_resetn => '0',
scndry_out => wvalid_to,
scndry_vect_out => open
);
-- WVLD_CDC_TO : process(ip2axi_aclk)
-- begin
-- if(ip2axi_aclk'EVENT and ip2axi_aclk = '1')then
-- wvalid_cdc_to <= wvalid_cdc_from;
-- wvalid_to <= wvalid_cdc_to;
-- end if;
-- end process WVLD_CDC_TO;
WVLD_CDC_TO2 : process(ip2axi_aclk)
begin
if(ip2axi_aclk'EVENT and ip2axi_aclk = '1')then
if(ip2axi_aresetn = '0')then
wvalid_to2 <= '0';
else
wvalid_to2 <= wvalid_to;
end if;
end if;
end process WVLD_CDC_TO2;
ip_wvalid_re <= wvalid_to and (not wvalid_to2);
REG_WADDR_TO_IPCLK : entity lib_cdc_v1_0_2.cdc_sync
generic map (
C_CDC_TYPE => 1,
C_RESET_STATE => 0,
C_SINGLE_BIT => 0,
C_VECTOR_WIDTH => C_S_AXI_LITE_ADDR_WIDTH,
C_MTBF_STAGES => 1
)
port map (
prmry_aclk => s_axi_lite_aclk,
prmry_resetn => '0',
prmry_in => '0',
prmry_vect_in => s_axi_lite_awaddr,
scndry_aclk => ip2axi_aclk,
scndry_resetn => '0',
scndry_out => open,
scndry_vect_out => awaddr_d1_cdc_tig
);
REG_WADDR_TO_IPCLK1 : entity lib_cdc_v1_0_2.cdc_sync
generic map (
C_CDC_TYPE => 1,
C_RESET_STATE => 0,
C_SINGLE_BIT => 0,
C_VECTOR_WIDTH => C_S_AXI_LITE_DATA_WIDTH,
C_MTBF_STAGES => 1
)
port map (
prmry_aclk => s_axi_lite_aclk,
prmry_resetn => '0',
prmry_in => '0',
prmry_vect_in => s_axi_lite_wdata,
scndry_aclk => ip2axi_aclk,
scndry_resetn => '0',
scndry_out => open,
scndry_vect_out => axi2ip_wrdata_cdc_tig
);
-- Double register address in
-- REG_WADDR_TO_IPCLK : process(ip2axi_aclk)
-- begin
-- if(ip2axi_aclk'EVENT and ip2axi_aclk = '1')then
-- if(ip2axi_aresetn = '0')then
-- awaddr_d1_cdc_tig <= (others => '0');
-- -- axi2ip_wraddr_i <= (others => '0');
-- axi2ip_wrdata_cdc_tig <= (others => '0');
-- else
-- awaddr_d1_cdc_tig <= s_axi_lite_awaddr;
-- axi2ip_wrdata_cdc_tig <= s_axi_lite_wdata;
-- -- axi2ip_wraddr_i <= awaddr_d1_cdc_tig; -- CR605883
-- end if;
-- end if;
-- end process REG_WADDR_TO_IPCLK;
-- Flag that address has been captured
REG_IP_ADDR_CAP : process(ip2axi_aclk)
begin
if(ip2axi_aclk'EVENT and ip2axi_aclk = '1')then
if(ip2axi_aresetn = '0' or rdy_shut = '1')then
ip_addr_cap <= '0';
elsif(ip_awvalid_re = '1')then
ip_addr_cap <= '1';
end if;
end if;
end process REG_IP_ADDR_CAP;
REG_WREADY : process(ip2axi_aclk)
begin
if(ip2axi_aclk'EVENT and ip2axi_aclk = '1')then
if(ip2axi_aresetn = '0' or rdy_shut = '1') then -- or rdy = '1') then
rdy <= '0';
elsif (ip_data_cap = '1' and ip_addr_cap = '1') then
rdy <= '1';
end if;
end if;
end process REG_WREADY;
REG3_WREADY : entity lib_cdc_v1_0_2.cdc_sync
generic map (
C_CDC_TYPE => 1,
C_RESET_STATE => 0,
C_SINGLE_BIT => 1,
C_VECTOR_WIDTH => 32,
C_MTBF_STAGES => MTBF_STAGES
)
port map (
prmry_aclk => s_axi_lite_aclk,
prmry_resetn => '0',
prmry_in => rdy_to2_cdc_from,
prmry_vect_in => (others => '0'),
scndry_aclk => ip2axi_aclk,
scndry_resetn => '0',
scndry_out => rdy_back_to,
scndry_vect_out => open
);
-- REG3_WREADY : process(ip2axi_aclk)
-- begin
-- if(ip2axi_aclk'EVENT and ip2axi_aclk = '1')then
-- rdy_back_cdc_to <= rdy_to2_cdc_from;
-- rdy_back_to <= rdy_back_cdc_to;
-- end if;
-- end process REG3_WREADY;
REG3_WREADY2 : process(ip2axi_aclk)
begin
if(ip2axi_aclk'EVENT and ip2axi_aclk = '1')then
if(ip2axi_aresetn = '0') then
rdy_back <= '0';
else
rdy_back <= rdy_back_to;
end if;
end if;
end process REG3_WREADY2;
rdy_shut <= rdy_back_to and (not rdy_back);
REG1_WREADY : process(ip2axi_aclk)
begin
if(ip2axi_aclk'EVENT and ip2axi_aclk = '1')then
if(ip2axi_aresetn = '0' or rdy_shut = '1') then
rdy_cdc_from <= '0';
elsif (rdy = '1') then
rdy_cdc_from <= '1';
end if;
end if;
end process REG1_WREADY;
REG2_WREADY : entity lib_cdc_v1_0_2.cdc_sync
generic map (
C_CDC_TYPE => 1,
C_RESET_STATE => 0,
C_SINGLE_BIT => 1,
C_VECTOR_WIDTH => 32,
C_MTBF_STAGES => MTBF_STAGES
)
port map (
prmry_aclk => ip2axi_aclk,
prmry_resetn => '0',
prmry_in => rdy_cdc_from,
prmry_vect_in => (others => '0'),
scndry_aclk => s_axi_lite_aclk,
scndry_resetn => '0',
scndry_out => rdy_to,
scndry_vect_out => open
);
-- REG2_WREADY : process(s_axi_lite_aclk)
-- begin
-- if(s_axi_lite_aclk'EVENT and s_axi_lite_aclk = '1')then
-- rdy_cdc_to <= rdy_cdc_from;
-- rdy_to <= rdy_cdc_to;
-- end if;
-- end process REG2_WREADY;
REG2_WREADY2 : process(s_axi_lite_aclk)
begin
if(s_axi_lite_aclk'EVENT and s_axi_lite_aclk = '1')then
if(s_axi_lite_aresetn = '0') then
rdy_to2 <= '0';
rdy_to2_cdc_from <= '0';
else
rdy_to2 <= rdy_to;
rdy_to2_cdc_from <= rdy_to;
end if;
end if;
end process REG2_WREADY2;
rdy_out <= not (rdy_to) and rdy_to2;
wready_i <= rdy_out;
awready_i <= rdy_out;
--*************************************************************************
--** Write Data Support
--*************************************************************************
-------------------------------------------------------------------------------
-- Capture write data
-------------------------------------------------------------------------------
-- WRDATA_S_H : process(s_axi_lite_aclk)
-- begin
-- if(s_axi_lite_aclk'EVENT and s_axi_lite_aclk = '1')then
-- if(s_axi_lite_aresetn = '0')then
-- wr_data_cdc_from <= (others => '0');
-- elsif(wvalid_re = '1')then
-- wr_data_cdc_from <= wdata;
-- end if;
-- end if;
-- end process WRDATA_S_H;
-- Flag that data has been captured
REG_IP_DATA_CAP : process(ip2axi_aclk)
begin
if(ip2axi_aclk'EVENT and ip2axi_aclk = '1')then
if(ip2axi_aresetn = '0' or rdy_shut = '1')then
ip_data_cap <= '0';
elsif(ip_wvalid_re = '1')then
ip_data_cap <= '1';
end if;
end if;
end process REG_IP_DATA_CAP;
-- Must have both a valid address and valid data before updating
-- a register. Note in AXI write address can come before or
-- after AXI write data.
axi2ip_wren <= rdy;
-- axi2ip_wren <= '1' when ip_data_cap = '1' and ip_addr_cap = '1'
-- else '0';
-------------------------------------------------------------------------------
-- Decode and assert proper chip enable per captured axi lite write address
-------------------------------------------------------------------------------
WRCE_GEN: for j in 0 to C_NUM_CE - 1 generate
constant BAR : std_logic_vector(CE_ADDR_SIZE-1 downto 0) :=
std_logic_vector(to_unsigned(j,CE_ADDR_SIZE));
begin
wrce(j) <= axi2ip_wren when awaddr_d1_cdc_tig
((CE_ADDR_SIZE + ADDR_OFFSET) - 1
downto ADDR_OFFSET)
= BAR(CE_ADDR_SIZE-1 downto 0)
else '0';
end generate WRCE_GEN;
-------------------------------------------------------------------------------
-- register write ce's and data out to axi dma register module
-------------------------------------------------------------------------------
REG_WR_OUT : process(ip2axi_aclk)
begin
if(ip2axi_aclk'EVENT and ip2axi_aclk = '1')then
if(ip2axi_aresetn = '0')then
axi2ip_wrce <= (others => '0');
else
axi2ip_wrce <= wrce;
end if;
end if;
end process REG_WR_OUT;
axi2ip_wrdata <= axi2ip_wrdata_cdc_tig; --s_axi_lite_wdata;
--*************************************************************************
--** Write Response Support
--*************************************************************************
-- Minimum of 2 IP clocks for addr and data capture, therefore delaying
-- Lite clock addr and data capture by 2 Lite clocks will guarenttee bvalid
-- responce occurs after write data acutally written.
-- REG_ALIGN_CAP : process(s_axi_lite_aclk)
-- begin
-- if(s_axi_lite_aclk'EVENT and s_axi_lite_aclk = '1')then
-- if(s_axi_lite_aresetn = '0')then
-- lite_data_cap_d1 <= '0';
-- lite_data_cap_d2 <= '0';
-- lite_addr_cap_d1 <= '0';
-- lite_addr_cap_d2 <= '0';
-- else
-- lite_data_cap_d1 <= rdy; --wr_data_cap;
-- lite_data_cap_d2 <= lite_data_cap_d1;
-- lite_addr_cap_d1 <= rdy; --wr_addr_cap;
-- lite_addr_cap_d2 <= lite_addr_cap_d1;
-- end if;
-- end if;
-- end process REG_ALIGN_CAP;
-- Pseudo write enable used simply to assert bvalid
-- lite_axi2ip_wren <= rdy; --'1' when wr_data_cap = '1' and wr_addr_cap = '1'
-- else '0';
WRESP_PROCESS : process(s_axi_lite_aclk)
begin
if(s_axi_lite_aclk'EVENT and s_axi_lite_aclk = '1')then
if(s_axi_lite_aresetn = '0')then
bvalid_i <= '0';
rst_wvalid_re <= '0'; -- CR576999
-- If response issued and target indicates ready then
-- clear response
elsif(bvalid_i = '1' and s_axi_lite_bready = '1')then
bvalid_i <= '0';
rst_wvalid_re <= '0'; -- CR576999
-- Issue a resonse on write
elsif(rdy_out = '1')then
-- elsif(lite_axi2ip_wren = '1')then
bvalid_i <= '1';
rst_wvalid_re <= '1'; -- CR576999
end if;
end if;
end process WRESP_PROCESS;
s_axi_lite_bresp <= OKAY_RESP;
end generate GEN_ASYNC_WRITE;
--*****************************************************************************
--** AXI LITE READ
--*****************************************************************************
-------------------------------------------------------------------------------
-- Assert Read Adddress Ready Handshake
-- Capture rising edge of valid and register out as ready. This creates
-- a 3 clock cycle address phase but also registers all inputs and outputs.
-- Note : Single clock cycle address phase can be accomplished using
-- combinatorial logic.
-------------------------------------------------------------------------------
REG_ARVALID : process(s_axi_lite_aclk)
begin
if(s_axi_lite_aclk'EVENT and s_axi_lite_aclk = '1')then
if(s_axi_lite_aresetn = '0' or rst_rvalid_re = '1')then
arvalid_d1 <= '0';
else
arvalid_d1 <= arvalid;
end if;
end if;
end process REG_ARVALID;
arvalid_re <= arvalid and not arvalid_d1
and not rst_rvalid_re and not read_in_progress; -- CR607165
-- register for proper alignment
REG_ARREADY : process(s_axi_lite_aclk)
begin
if(s_axi_lite_aclk'EVENT and s_axi_lite_aclk = '1')then
if(s_axi_lite_aresetn = '0')then
arready_i <= '0';
else
arready_i <= arvalid_re;
end if;
end if;
end process REG_ARREADY;
-- Always respond 'okay' axi lite read
s_axi_lite_rresp <= OKAY_RESP;
s_axi_lite_rvalid <= s_axi_lite_rvalid_i;
-- s_axi_lite_aclk is synchronous to ip clock
GEN_SYNC_READ : if C_AXI_LITE_IS_ASYNC = 0 generate
begin
read_in_progress <= '0'; --Not used for sync mode (CR607165)
-------------------------------------------------------------------------------
-- Capture Read Address
-------------------------------------------------------------------------------
REG_READ_ADDRESS : process(s_axi_lite_aclk)
begin
if(s_axi_lite_aclk'EVENT and s_axi_lite_aclk = '1')then
if(s_axi_lite_aresetn = '0')then
axi2ip_rdaddr_i <= (others => '0');
-- Register address on valid
elsif(arvalid_re = '1')then
axi2ip_rdaddr_i <= araddr;
end if;
end if;
end process REG_READ_ADDRESS;
-------------------------------------------------------------------------------
-- Generate RdCE based on address match to address bar
-------------------------------------------------------------------------------
RDCE_GEN: for j in 0 to C_NUM_CE - 1 generate
constant BAR : std_logic_vector(CE_ADDR_SIZE-1 downto 0) :=
std_logic_vector(to_unsigned(j,CE_ADDR_SIZE));
begin
rdce(j) <= arvalid_re_d1
when axi2ip_rdaddr_i((CE_ADDR_SIZE + ADDR_OFFSET) - 1
downto ADDR_OFFSET)
= BAR(CE_ADDR_SIZE-1 downto 0)
else '0';
end generate RDCE_GEN;
-------------------------------------------------------------------------------
-- Register out to IP
-------------------------------------------------------------------------------
REG_RDCNTRL_OUT : process(s_axi_lite_aclk)
begin
if(s_axi_lite_aclk'EVENT and s_axi_lite_aclk = '1')then
if(s_axi_lite_aresetn = '0')then
--axi2ip_rdce <= (others => '0');
axi2ip_rdaddr <= (others => '0');
else
--axi2ip_rdce <= rdce;
axi2ip_rdaddr <= axi2ip_rdaddr_i;
end if;
end if;
end process REG_RDCNTRL_OUT;
-- Sample and hold rdce value until rvalid assertion
REG_RDCE_OUT : process(s_axi_lite_aclk)
begin
if(s_axi_lite_aclk'EVENT and s_axi_lite_aclk = '1')then
if(s_axi_lite_aresetn = '0' or rst_rvalid_re = '1')then
axi2ip_rdce <= (others => '0');
elsif(arvalid_re_d1 = '1')then
axi2ip_rdce <= rdce;
end if;
end if;
end process REG_RDCE_OUT;
-- Register for proper alignment
REG_RVALID : process(s_axi_lite_aclk)
begin
if(s_axi_lite_aclk'EVENT and s_axi_lite_aclk = '1')then
if(s_axi_lite_aresetn = '0')then
arvalid_re_d1 <= '0';
rvalid <= '0';
else
arvalid_re_d1 <= arvalid_re;
rvalid <= arvalid_re_d1;
end if;
end if;
end process REG_RVALID;
-------------------------------------------------------------------------------
-- Drive read data and read data valid out on capture of valid address.
-------------------------------------------------------------------------------
REG_RD_OUT : process(s_axi_lite_aclk)
begin
if(s_axi_lite_aclk'EVENT and s_axi_lite_aclk = '1')then
if(s_axi_lite_aresetn = '0')then
s_axi_lite_rdata <= (others => '0');
s_axi_lite_rvalid_i <= '0';
rst_rvalid_re <= '0'; -- CR576999
-- If rvalid driving out to target and target indicates ready
-- then de-assert rvalid. (structure guarentees min 1 clock of rvalid)
elsif(s_axi_lite_rvalid_i = '1' and s_axi_lite_rready = '1')then
s_axi_lite_rdata <= (others => '0');
s_axi_lite_rvalid_i <= '0';
rst_rvalid_re <= '0'; -- CR576999
-- If read cycle then assert rvalid and rdata out to target
elsif(rvalid = '1')then
s_axi_lite_rdata <= ip2axi_rddata;
s_axi_lite_rvalid_i <= '1';
rst_rvalid_re <= '1'; -- CR576999
end if;
end if;
end process REG_RD_OUT;
end generate GEN_SYNC_READ;
-- s_axi_lite_aclk is asynchronous to ip clock
GEN_ASYNC_READ : if C_AXI_LITE_IS_ASYNC = 1 generate
ATTRIBUTE async_reg : STRING;
signal ip_arvalid_d1_cdc_tig : std_logic := '0';
signal ip_arvalid_d2 : std_logic := '0';
signal ip_arvalid_d3 : std_logic := '0';
signal ip_arvalid_re : std_logic := '0';
signal araddr_d1_cdc_tig : std_logic_vector(C_S_AXI_LITE_ADDR_WIDTH-1 downto 0) :=(others => '0');
signal araddr_d2 : std_logic_vector(C_S_AXI_LITE_ADDR_WIDTH-1 downto 0) :=(others => '0');
signal araddr_d3 : std_logic_vector(C_S_AXI_LITE_ADDR_WIDTH-1 downto 0) :=(others => '0');
signal lite_rdata_cdc_from : std_logic_vector(C_S_AXI_LITE_DATA_WIDTH-1 downto 0) :=(others => '0');
signal lite_rdata_d1_cdc_to : std_logic_vector(C_S_AXI_LITE_DATA_WIDTH-1 downto 0) :=(others => '0');
signal lite_rdata_d2 : std_logic_vector(C_S_AXI_LITE_DATA_WIDTH-1 downto 0) :=(others => '0');
--ATTRIBUTE async_reg OF ip_arvalid_d1_cdc_tig : SIGNAL IS "true";
--ATTRIBUTE async_reg OF ip_arvalid_d2 : SIGNAL IS "true";
--ATTRIBUTE async_reg OF araddr_d1_cdc_tig : SIGNAL IS "true";
--ATTRIBUTE async_reg OF araddr_d2 : SIGNAL IS "true";
--ATTRIBUTE async_reg OF lite_rdata_d1_cdc_to : SIGNAL IS "true";
--ATTRIBUTE async_reg OF lite_rdata_d2 : SIGNAL IS "true";
signal p_pulse_s_h : std_logic := '0';
signal p_pulse_s_h_clr : std_logic := '0';
signal s_pulse_d1 : std_logic := '0';
signal s_pulse_d2 : std_logic := '0';
signal s_pulse_d3 : std_logic := '0';
signal s_pulse_re : std_logic := '0';
signal p_pulse_re_d1 : std_logic := '0';
signal p_pulse_re_d2 : std_logic := '0';
signal p_pulse_re_d3 : std_logic := '0';
signal arready_d1 : std_logic := '0'; -- CR605883
signal arready_d2 : std_logic := '0'; -- CR605883
signal arready_d3 : std_logic := '0'; -- CR605883
signal arready_d4 : std_logic := '0'; -- CR605883
signal arready_d5 : std_logic := '0'; -- CR605883
signal arready_d6 : std_logic := '0'; -- CR605883
signal arready_d7 : std_logic := '0'; -- CR605883
signal arready_d8 : std_logic := '0'; -- CR605883
signal arready_d9 : std_logic := '0'; -- CR605883
signal arready_d10 : std_logic := '0'; -- CR605883
signal arready_d11 : std_logic := '0'; -- CR605883
signal arready_d12 : std_logic := '0'; -- CR605883
begin
-- CR607165
-- Flag to prevent overlapping reads
RD_PROGRESS : process(s_axi_lite_aclk)
begin
if(s_axi_lite_aclk'EVENT and s_axi_lite_aclk = '1')then
if(s_axi_lite_aresetn = '0' or rst_rvalid_re = '1')then
read_in_progress <= '0';
elsif(arvalid_re = '1')then
read_in_progress <= '1';
end if;
end if;
end process RD_PROGRESS;
-- Double register address in
REG_RADDR_TO_IPCLK : entity lib_cdc_v1_0_2.cdc_sync
generic map (
C_CDC_TYPE => 1,
C_RESET_STATE => 0,
C_SINGLE_BIT => 0,
C_VECTOR_WIDTH => C_S_AXI_LITE_ADDR_WIDTH,
C_MTBF_STAGES => MTBF_STAGES
)
port map (
prmry_aclk => s_axi_lite_aclk,
prmry_resetn => '0',
prmry_in => '0',
prmry_vect_in => s_axi_lite_araddr,
scndry_aclk => ip2axi_aclk,
scndry_resetn => '0',
scndry_out => open,
scndry_vect_out => araddr_d3
);
-- REG_RADDR_TO_IPCLK : process(ip2axi_aclk)
-- begin
-- if(ip2axi_aclk'EVENT and ip2axi_aclk = '1')then
-- if(ip2axi_aresetn = '0')then
-- araddr_d1_cdc_tig <= (others => '0');
-- araddr_d2 <= (others => '0');
-- araddr_d3 <= (others => '0');
-- else
-- araddr_d1_cdc_tig <= s_axi_lite_araddr;
-- araddr_d2 <= araddr_d1_cdc_tig;
-- araddr_d3 <= araddr_d2;
-- end if;
-- end if;
-- end process REG_RADDR_TO_IPCLK;
-- Latch and hold read address
REG_ARADDR_PROCESS : process(ip2axi_aclk)
begin
if(ip2axi_aclk'EVENT and ip2axi_aclk = '1')then
if(ip2axi_aresetn = '0')then
axi2ip_rdaddr_i <= (others => '0');
elsif(ip_arvalid_re = '1')then
axi2ip_rdaddr_i <= araddr_d3;
end if;
end if;
end process REG_ARADDR_PROCESS;
axi2ip_rdaddr <= axi2ip_rdaddr_i;
-- Register awready into IP clock domain. awready
-- is a 1 axi_lite clock delay of the rising edge of
-- arvalid. This provides a signal that asserts when
-- araddr is known to be stable.
REG_ARVALID_TO_IPCLK : entity lib_cdc_v1_0_2.cdc_sync
generic map (
C_CDC_TYPE => 1,
C_RESET_STATE => 0,
C_SINGLE_BIT => 1,
C_VECTOR_WIDTH => C_S_AXI_LITE_ADDR_WIDTH,
C_MTBF_STAGES => MTBF_STAGES
)
port map (
prmry_aclk => s_axi_lite_aclk,
prmry_resetn => '0',
prmry_in => arready_i,
prmry_vect_in => (others => '0'),
scndry_aclk => ip2axi_aclk,
scndry_resetn => '0',
scndry_out => ip_arvalid_d2,
scndry_vect_out => open
);
REG_ARVALID_TO_IPCLK1 : process(ip2axi_aclk)
begin
if(ip2axi_aclk'EVENT and ip2axi_aclk = '1')then
if(ip2axi_aresetn = '0')then
-- ip_arvalid_d1_cdc_tig <= '0';
-- ip_arvalid_d2 <= '0';
ip_arvalid_d3 <= '0';
else
-- ip_arvalid_d1_cdc_tig <= arready_i;
-- ip_arvalid_d2 <= ip_arvalid_d1_cdc_tig;
ip_arvalid_d3 <= ip_arvalid_d2;
end if;
end if;
end process REG_ARVALID_TO_IPCLK1;
ip_arvalid_re <= ip_arvalid_d2 and not ip_arvalid_d3;
-------------------------------------------------------------------------------
-- Generate Read CE's
-------------------------------------------------------------------------------
RDCE_GEN: for j in 0 to C_NUM_CE - 1 generate
constant BAR : std_logic_vector(CE_ADDR_SIZE-1 downto 0) :=
std_logic_vector(to_unsigned(j,CE_ADDR_SIZE));
begin
rdce(j) <= ip_arvalid_re
when araddr_d3((CE_ADDR_SIZE + ADDR_OFFSET) - 1
downto ADDR_OFFSET)
= BAR(CE_ADDR_SIZE-1 downto 0)
else '0';
end generate RDCE_GEN;
-------------------------------------------------------------------------------
-- Register RDCE and RD Data out to IP
-------------------------------------------------------------------------------
REG_RDCNTRL_OUT : process(ip2axi_aclk)
begin
if(ip2axi_aclk'EVENT and ip2axi_aclk = '1')then
if(ip2axi_aresetn = '0')then
axi2ip_rdce <= (others => '0');
elsif(ip_arvalid_re = '1')then
axi2ip_rdce <= rdce;
else
axi2ip_rdce <= (others => '0');
end if;
end if;
end process REG_RDCNTRL_OUT;
-- Generate sample and hold pulse to capture read data from IP
REG_RVALID : process(ip2axi_aclk)
begin
if(ip2axi_aclk'EVENT and ip2axi_aclk = '1')then
if(ip2axi_aresetn = '0')then
rvalid <= '0';
else
rvalid <= ip_arvalid_re;
end if;
end if;
end process REG_RVALID;
-------------------------------------------------------------------------------
-- Sample and hold read data from IP
-------------------------------------------------------------------------------
S_H_READ_DATA : process(ip2axi_aclk)
begin
if(ip2axi_aclk'EVENT and ip2axi_aclk = '1')then
if(ip2axi_aresetn = '0')then
lite_rdata_cdc_from <= (others => '0');
-- If read cycle then assert rvalid and rdata out to target
elsif(rvalid = '1')then
lite_rdata_cdc_from <= ip2axi_rddata;
end if;
end if;
end process S_H_READ_DATA;
-- Cross read data to axi_lite clock domain
REG_DATA2LITE_CLOCK : entity lib_cdc_v1_0_2.cdc_sync
generic map (
C_CDC_TYPE => 1,
C_RESET_STATE => 0,
C_SINGLE_BIT => 0,
C_VECTOR_WIDTH => 32,
C_MTBF_STAGES => MTBF_STAGES
)
port map (
prmry_aclk => ip2axi_aclk,
prmry_resetn => '0',
prmry_in => '0', --lite_rdata_cdc_from,
prmry_vect_in => lite_rdata_cdc_from,
scndry_aclk => s_axi_lite_aclk,
scndry_resetn => '0',
scndry_out => open, --lite_rdata_d2,
scndry_vect_out => lite_rdata_d2
);
-- REG_DATA2LITE_CLOCK : process(s_axi_lite_aclk)
-- begin
-- if(s_axi_lite_aclk'EVENT and s_axi_lite_aclk = '1')then
-- if(s_axi_lite_aresetn = '0')then
-- lite_rdata_d1_cdc_to <= (others => '0');
-- lite_rdata_d2 <= (others => '0');
-- else
-- lite_rdata_d1_cdc_to <= lite_rdata_cdc_from;
-- lite_rdata_d2 <= lite_rdata_d1_cdc_to;
-- end if;
-- end if;
-- end process REG_DATA2LITE_CLOCK;
-- CR605883 (CDC) modified to remove
-- Because axi_lite_aclk must be less than or equal to ip2axi_aclk
-- then read data will appear a maximum 6 clocks from assertion
-- of arready.
REG_ALIGN_RDATA_LATCH : process(s_axi_lite_aclk)
begin
if(s_axi_lite_aclk'EVENT and s_axi_lite_aclk = '1')then
if(s_axi_lite_aresetn = '0')then
arready_d1 <= '0';
arready_d2 <= '0';
arready_d3 <= '0';
arready_d4 <= '0';
arready_d5 <= '0';
arready_d6 <= '0';
arready_d7 <= '0';
arready_d8 <= '0';
arready_d9 <= '0';
arready_d10 <= '0';
arready_d11 <= '0';
arready_d12 <= '0';
else
arready_d1 <= arready_i;
arready_d2 <= arready_d1;
arready_d3 <= arready_d2;
arready_d4 <= arready_d3;
arready_d5 <= arready_d4;
arready_d6 <= arready_d5;
arready_d7 <= arready_d6;
arready_d8 <= arready_d7;
arready_d9 <= arready_d8;
arready_d10 <= arready_d9;
arready_d11 <= arready_d10;
arready_d12 <= arready_d11;
end if;
end if;
end process REG_ALIGN_RDATA_LATCH;
-------------------------------------------------------------------------------
-- Drive read data and read data valid out on capture of valid address.
-------------------------------------------------------------------------------
REG_RD_OUT : process(s_axi_lite_aclk)
begin
if(s_axi_lite_aclk'EVENT and s_axi_lite_aclk = '1')then
if(s_axi_lite_aresetn = '0')then
s_axi_lite_rdata <= (others => '0');
s_axi_lite_rvalid_i <= '0';
rst_rvalid_re <= '0'; -- CR576999
-- If rvalid driving out to target and target indicates ready
-- then de-assert rvalid. (structure guarentees min 1 clock of rvalid)
elsif(s_axi_lite_rvalid_i = '1' and s_axi_lite_rready = '1')then
s_axi_lite_rdata <= (others => '0');
s_axi_lite_rvalid_i <= '0';
rst_rvalid_re <= '0'; -- CR576999
-- If read cycle then assert rvalid and rdata out to target
-- CR605883
--elsif(s_pulse_re = '1')then
elsif(arready_d12 = '1')then
s_axi_lite_rdata <= lite_rdata_d2;
s_axi_lite_rvalid_i <= '1';
rst_rvalid_re <= '1'; -- CR576999
end if;
end if;
end process REG_RD_OUT;
end generate GEN_ASYNC_READ;
end implementation;
| mit | d297ebef4b0884a53195501fc9727337 | 0.426358 | 4.120851 | false | false | false | false |
Bjay1435/capstone | Geoff/Geoff.srcs/sources_1/bd/dma_loopback/ipshared/xilinx.com/axi_sg_v4_1/hdl/src/vhdl/axi_sg_intrpt.vhd | 1 | 28,217 | -- *************************************************************************
--
-- (c) Copyright 2010-2011 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
--
-- *************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: axi_sg_intrpt.vhd
-- Description: This entity handles interrupt coalescing
--
-- VHDL-Standard: VHDL'93
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use ieee.std_logic_misc.all;
library unisim;
use unisim.vcomponents.all;
library axi_sg_v4_1_3;
use axi_sg_v4_1_3.axi_sg_pkg.all;
library lib_pkg_v1_0_2;
use lib_pkg_v1_0_2.lib_pkg.clog2;
use lib_pkg_v1_0_2.lib_pkg.max2;
-------------------------------------------------------------------------------
entity axi_sg_intrpt is
generic(
C_INCLUDE_CH1 : integer range 0 to 1 := 1 ;
-- Include or exclude MM2S primary data path
-- 0 = Exclude MM2S primary data path
-- 1 = Include MM2S primary data path
C_INCLUDE_CH2 : integer range 0 to 1 := 1 ;
-- Include or exclude S2MM primary data path
-- 0 = Exclude S2MM primary data path
-- 1 = Include S2MM primary data path
C_INCLUDE_DLYTMR : integer range 0 to 1 := 1 ;
-- Include/Exclude interrupt delay timer
-- 0 = Exclude Delay timer
-- 1 = Include Delay timer
C_DLYTMR_RESOLUTION : integer range 1 to 100000 := 125
-- Interrupt Delay Timer resolution in usec
);
port (
-- Secondary Clock and Reset
m_axi_sg_aclk : in std_logic ; --
m_axi_sg_aresetn : in std_logic ; --
--
ch1_irqthresh_decr : in std_logic ;-- CR567661 --
ch1_irqthresh_rstdsbl : in std_logic ;-- CR572013 --
ch1_dlyirq_dsble : in std_logic ; --
ch1_irqdelay_wren : in std_logic ; --
ch1_irqdelay : in std_logic_vector(7 downto 0) ; --
ch1_irqthresh_wren : in std_logic ; --
ch1_irqthresh : in std_logic_vector(7 downto 0) ; --
ch1_packet_sof : in std_logic ; --
ch1_packet_eof : in std_logic ; --
ch1_ioc_irq_set : out std_logic ; --
ch1_dly_irq_set : out std_logic ; --
ch1_irqdelay_status : out std_logic_vector(7 downto 0) ; --
ch1_irqthresh_status : out std_logic_vector(7 downto 0) ; --
--
ch2_irqthresh_decr : in std_logic ;-- CR567661 --
ch2_irqthresh_rstdsbl : in std_logic ;-- CR572013 --
ch2_dlyirq_dsble : in std_logic ; --
ch2_irqdelay_wren : in std_logic ; --
ch2_irqdelay : in std_logic_vector(7 downto 0) ; --
ch2_irqthresh_wren : in std_logic ; --
ch2_irqthresh : in std_logic_vector(7 downto 0) ; --
ch2_packet_sof : in std_logic ; --
ch2_packet_eof : in std_logic ; --
ch2_ioc_irq_set : out std_logic ; --
ch2_dly_irq_set : out std_logic ; --
ch2_irqdelay_status : out std_logic_vector(7 downto 0) ; --
ch2_irqthresh_status : out std_logic_vector(7 downto 0) --
);
end axi_sg_intrpt;
-------------------------------------------------------------------------------
-- Architecture
-------------------------------------------------------------------------------
architecture implementation of axi_sg_intrpt is
attribute DowngradeIPIdentifiedWarnings: string;
attribute DowngradeIPIdentifiedWarnings of implementation : architecture is "yes";
-------------------------------------------------------------------------------
-- Functions
-------------------------------------------------------------------------------
-- No Functions Declared
-------------------------------------------------------------------------------
-- Constants Declarations
-------------------------------------------------------------------------------
-- Delay interrupt fast counter width
constant FAST_COUNT_WIDTH : integer := clog2(C_DLYTMR_RESOLUTION+1);
-- Delay interrupt fast counter terminal count
constant FAST_COUNT_TC : std_logic_vector(FAST_COUNT_WIDTH-1 downto 0)
:= std_logic_vector(to_unsigned(
(C_DLYTMR_RESOLUTION-1),FAST_COUNT_WIDTH));
-- Delay interrupt fast counter zero value
constant ZERO_FAST_COUNT : std_logic_vector(FAST_COUNT_WIDTH-1 downto 0)
:= (others => '0');
constant ZERO_VALUE : std_logic_vector(7 downto 0) := (others => '0');
-------------------------------------------------------------------------------
-- Signal / Type Declarations
-------------------------------------------------------------------------------
signal ch1_thresh_count : std_logic_vector(7 downto 0) := ONE_THRESHOLD;
signal ch1_dly_irq_set_i : std_logic := '0';
signal ch1_ioc_irq_set_i : std_logic := '0';
signal ch1_delay_count : std_logic_vector(7 downto 0) := (others => '0');
signal ch1_delay_cnt_en : std_logic := '0';
signal ch1_dly_fast_cnt : std_logic_vector(FAST_COUNT_WIDTH-1 downto 0) := (others => '0');
signal ch1_dly_fast_incr : std_logic := '0';
signal ch1_delay_zero : std_logic := '0';
signal ch1_delay_tc : std_logic := '0';
signal ch1_disable_delay : std_logic := '0';
signal ch2_thresh_count : std_logic_vector(7 downto 0) := ONE_THRESHOLD;
signal ch2_dly_irq_set_i : std_logic := '0';
signal ch2_ioc_irq_set_i : std_logic := '0';
signal ch2_delay_count : std_logic_vector(7 downto 0) := (others => '0');
signal ch2_delay_cnt_en : std_logic := '0';
signal ch2_dly_fast_cnt : std_logic_vector(FAST_COUNT_WIDTH-1 downto 0) := (others => '0');
signal ch2_dly_fast_incr : std_logic := '0';
signal ch2_delay_zero : std_logic := '0';
signal ch2_delay_tc : std_logic := '0';
signal ch2_disable_delay : std_logic := '0';
-------------------------------------------------------------------------------
-- Begin architecture logic
-------------------------------------------------------------------------------
begin
-- Transmit channel included therefore generate transmit interrupt logic
GEN_INCLUDE_MM2S : if C_INCLUDE_CH1 = 1 generate
begin
REG_THRESH_COUNT : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
ch1_thresh_count <= ONE_THRESHOLD;
ch1_ioc_irq_set_i <= '0';
-- New Threshold set by CPU OR delay interrupt event occured.
-- CR572013 - added ability to disable threshold count reset on delay timeout
-- elsif(ch1_irqthresh_wren = '1' or ch1_dly_irq_set_i = '1') then
elsif( (ch1_irqthresh_wren = '1')
or (ch1_dly_irq_set_i = '1' and ch1_irqthresh_rstdsbl = '0')) then
ch1_thresh_count <= ch1_irqthresh;
ch1_ioc_irq_set_i <= '0';
-- IOC event then...
elsif(ch1_irqthresh_decr = '1')then --CR567661
-- Threshold at zero, reload threshold and drive ioc
-- interrupt.
if(ch1_thresh_count = ONE_THRESHOLD)then
ch1_thresh_count <= ch1_irqthresh;
ch1_ioc_irq_set_i <= '1';
else
ch1_thresh_count <= std_logic_vector(unsigned(ch1_thresh_count(7 downto 0)) - 1);
ch1_ioc_irq_set_i <= '0';
end if;
else
ch1_thresh_count <= ch1_thresh_count;
ch1_ioc_irq_set_i <= '0';
end if;
end if;
end process REG_THRESH_COUNT;
-- Pass current threshold count out to DMASR
ch1_irqthresh_status <= ch1_thresh_count;
ch1_ioc_irq_set <= ch1_ioc_irq_set_i;
---------------------------------------------------------------------------
-- Generate Delay Interrupt Timers
---------------------------------------------------------------------------
GEN_CH1_DELAY_INTERRUPT : if C_INCLUDE_DLYTMR = 1 generate
begin
GEN_CH1_FAST_COUNTER : if C_DLYTMR_RESOLUTION /= 1 generate
begin
---------------------------------------------------------------------------
-- Delay interrupt high resolution timer
---------------------------------------------------------------------------
REG_DLY_FAST_CNT : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
-- CR565366 - need to reset on sof due to chanes for CR
-- if(m_axi_sg_aresetn = '0' or ch1_delay_cnt_en = '0' or ch1_disable_delay = '1')then
-- CR570398 - need to reset delay timer each time a new delay value is written.
-- if(m_axi_sg_aresetn = '0' or ch1_delay_cnt_en = '0' or ch1_disable_delay = '1' or ch1_packet_sof = '1')then
if(m_axi_sg_aresetn = '0' or ch1_delay_cnt_en = '0' or ch1_disable_delay = '1'
or ch1_packet_sof = '1' or ch1_irqdelay_wren = '1')then
ch1_dly_fast_cnt <= FAST_COUNT_TC;
ch1_dly_fast_incr <= '0';
elsif(ch1_dly_fast_cnt = ZERO_FAST_COUNT)then
ch1_dly_fast_cnt <= FAST_COUNT_TC;
ch1_dly_fast_incr <= '1';
else
ch1_dly_fast_cnt <= std_logic_vector(unsigned(ch1_dly_fast_cnt(FAST_COUNT_WIDTH-1 downto 0)) - 1);
ch1_dly_fast_incr <= '0';
end if;
end if;
end process REG_DLY_FAST_CNT;
end generate GEN_CH1_FAST_COUNTER;
GEN_CH1_NO_FAST_COUNTER : if C_DLYTMR_RESOLUTION = 1 generate
REG_DLY_FAST_CNT : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
-- CR565366 - need to reset on sof due to chanes for CR
-- if(m_axi_sg_aresetn = '0' or ch1_delay_cnt_en = '0' or ch1_disable_delay = '1')then
-- CR570398 - need to reset delay timer each time a new delay value is written.
-- if(m_axi_sg_aresetn = '0' or ch1_delay_cnt_en = '0' or ch1_disable_delay = '1' or ch1_packet_sof = '1')then
if(m_axi_sg_aresetn = '0' or ch1_delay_cnt_en = '0' or ch1_disable_delay = '1'
or ch1_packet_sof = '1' or ch1_irqdelay_wren = '1')then
ch1_dly_fast_incr <= '0';
else
ch1_dly_fast_incr <= '1';
end if;
end if;
end process REG_DLY_FAST_CNT;
end generate GEN_CH1_NO_FAST_COUNTER;
-- DMACR Delay value set to zero - disable delay interrupt
ch1_delay_zero <= '1' when ch1_irqdelay = ZERO_DELAY
else '0';
-- Delay Terminal Count reached (i.e. Delay count = DMACR delay value)
ch1_delay_tc <= '1' when ch1_delay_count = ch1_irqdelay
and ch1_delay_zero = '0'
and ch1_packet_sof = '0'
else '0';
-- 1 clock earlier delay counter disable to prevent count
-- increment on TC hit.
ch1_disable_delay <= '1' when ch1_delay_zero = '1'
or ch1_dlyirq_dsble = '1'
or ch1_dly_irq_set_i = '1'
else '0';
---------------------------------------------------------------------------
-- Delay interrupt low resolution timer
---------------------------------------------------------------------------
REG_DELAY_COUNT : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
-- CR565366 need to reset on SOF now due to CR change
-- if(m_axi_sg_aresetn = '0' or ch1_delay_cnt_en = '0' or ch1_disable_delay = '1')then
-- CR570398 - need to reset delay timer each time a new delay value is written.
-- if(m_axi_sg_aresetn = '0' or ch1_delay_cnt_en = '0' or ch1_disable_delay = '1' or ch1_packet_sof = '1')then
if(m_axi_sg_aresetn = '0' or ch1_delay_cnt_en = '0' or ch1_disable_delay = '1'
or ch1_packet_sof = '1' or ch1_irqdelay_wren = '1')then
ch1_delay_count <= (others => '0');
ch1_dly_irq_set_i <= '0';
elsif(ch1_dly_fast_incr = '1' and ch1_delay_tc = '1')then
ch1_delay_count <= (others => '0');
ch1_dly_irq_set_i <= '1';
elsif(ch1_dly_fast_incr = '1')then
ch1_delay_count <= std_logic_vector(unsigned(ch1_delay_count(7 downto 0)) + 1);
ch1_dly_irq_set_i <= '0';
else
ch1_delay_count <= ch1_delay_count;
ch1_dly_irq_set_i <= '0';
end if;
end if;
end process REG_DELAY_COUNT;
-- Pass current delay count to DMASR
ch1_irqdelay_status <= ch1_delay_count;
ch1_dly_irq_set <= ch1_dly_irq_set_i;
-- Enable control for delay counter
REG_DELAY_CNT_ENABLE : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0' or ch1_disable_delay = '1')then
ch1_delay_cnt_en <= '0';
-- CR565366 simulatenous sof/eof which occurs for small packets causes delay timer
-- to not enable
-- elsif(ch1_packet_sof = '1')then
-- stop counting if already counting and receive an sof and
-- not end of another packet
elsif(ch1_delay_cnt_en = '1' and ch1_packet_sof = '1'
and ch1_packet_eof = '0')then
ch1_delay_cnt_en <= '0';
elsif(ch1_packet_eof = '1')then
ch1_delay_cnt_en <= '1';
end if;
end if;
end process REG_DELAY_CNT_ENABLE;
end generate GEN_CH1_DELAY_INTERRUPT;
---------------------------------------------------------------------------
-- Delay interrupt NOT included
---------------------------------------------------------------------------
GEN_NO_CH1_DELAY_INTR : if C_INCLUDE_DLYTMR = 0 generate
begin
ch1_dly_irq_set <= '0';
ch1_dly_irq_set_i <= '0';
ch1_irqdelay_status <= (others => '0');
end generate GEN_NO_CH1_DELAY_INTR;
end generate GEN_INCLUDE_MM2S;
-- Receive channel included therefore generate receive interrupt logic
GEN_INCLUDE_S2MM : if C_INCLUDE_CH2 = 1 generate
begin
REG_THRESH_COUNT : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
ch2_thresh_count <= ONE_THRESHOLD;
ch2_ioc_irq_set_i <= '0';
-- New Threshold set by CPU OR delay interrupt event occured.
-- CR572013 - added ability to disable threshold count reset on delay timeout
-- elsif(ch2_irqthresh_wren = '1' or ch2_dly_irq_set_i = '1') then
elsif( (ch2_irqthresh_wren = '1')
or (ch2_dly_irq_set_i = '1' and ch2_irqthresh_rstdsbl = '0')) then
ch2_thresh_count <= ch2_irqthresh;
ch2_ioc_irq_set_i <= '0';
-- IOC event then...
elsif(ch2_irqthresh_decr = '1')then --CR567661
-- Threshold at zero, reload threshold and drive ioc
-- interrupt.
if(ch2_thresh_count = ONE_THRESHOLD)then
ch2_thresh_count <= ch2_irqthresh;
ch2_ioc_irq_set_i <= '1';
else
ch2_thresh_count <= std_logic_vector(unsigned(ch2_thresh_count(7 downto 0)) - 1);
ch2_ioc_irq_set_i <= '0';
end if;
else
ch2_thresh_count <= ch2_thresh_count;
ch2_ioc_irq_set_i <= '0';
end if;
end if;
end process REG_THRESH_COUNT;
-- Pass current threshold count out to DMASR
ch2_irqthresh_status <= ch2_thresh_count;
ch2_ioc_irq_set <= ch2_ioc_irq_set_i;
---------------------------------------------------------------------------
-- Generate Delay Interrupt Timers
---------------------------------------------------------------------------
GEN_CH2_DELAY_INTERRUPT : if C_INCLUDE_DLYTMR = 1 generate
begin
---------------------------------------------------------------------------
-- Delay interrupt high resolution timer
---------------------------------------------------------------------------
GEN_CH2_FAST_COUNTER : if C_DLYTMR_RESOLUTION /= 1 generate
begin
REG_DLY_FAST_CNT : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
-- CR565366 - need to reset on sof due to chanes for CR
-- if(m_axi_sg_aresetn = '0' or ch2_delay_cnt_en = '0' or ch2_disable_delay = '1')then
-- CR570398 - need to reset delay timer each time a new delay value is written.
-- if(m_axi_sg_aresetn = '0' or ch2_delay_cnt_en = '0' or ch2_disable_delay = '1' or ch2_packet_sof = '1')then
if(m_axi_sg_aresetn = '0' or ch2_delay_cnt_en = '0' or ch2_disable_delay = '1'
or ch2_packet_sof = '1' or ch2_irqdelay_wren = '1')then
ch2_dly_fast_cnt <= FAST_COUNT_TC;
ch2_dly_fast_incr <= '0';
elsif(ch2_dly_fast_cnt = ZERO_FAST_COUNT)then
ch2_dly_fast_cnt <= FAST_COUNT_TC;
ch2_dly_fast_incr <= '1';
else
ch2_dly_fast_cnt <= std_logic_vector(unsigned(ch2_dly_fast_cnt(FAST_COUNT_WIDTH-1 downto 0)) - 1);
ch2_dly_fast_incr <= '0';
end if;
end if;
end process REG_DLY_FAST_CNT;
end generate GEN_CH2_FAST_COUNTER;
GEN_CH2_NO_FAST_COUNTER : if C_DLYTMR_RESOLUTION = 1 generate
REG_DLY_FAST_CNT : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
-- CR565366 - need to reset on sof due to chanes for CR
-- if(m_axi_sg_aresetn = '0' or ch2_delay_cnt_en = '0' or ch2_disable_delay = '1')then
-- CR570398 - need to reset delay timer each time a new delay value is written.
-- if(m_axi_sg_aresetn = '0' or ch2_delay_cnt_en = '0' or ch2_disable_delay = '1' or ch2_packet_sof = '1')then
if(m_axi_sg_aresetn = '0' or ch2_delay_cnt_en = '0' or ch2_disable_delay = '1'
or ch2_packet_sof = '1' or ch2_irqdelay_wren = '1')then
ch2_dly_fast_incr <= '0';
else
ch2_dly_fast_incr <= '1';
end if;
end if;
end process REG_DLY_FAST_CNT;
end generate GEN_CH2_NO_FAST_COUNTER;
-- DMACR Delay value set to zero - disable delay interrupt
ch2_delay_zero <= '1' when ch2_irqdelay = ZERO_DELAY
else '0';
-- Delay Terminal Count reached (i.e. Delay count = DMACR delay value)
ch2_delay_tc <= '1' when ch2_delay_count = ch2_irqdelay
and ch2_delay_zero = '0'
and ch2_packet_sof = '0'
else '0';
-- 1 clock earlier delay counter disable to prevent count
-- increment on TC hit.
ch2_disable_delay <= '1' when ch2_delay_zero = '1'
or ch2_dlyirq_dsble = '1'
or ch2_dly_irq_set_i = '1'
else '0';
---------------------------------------------------------------------------
-- Delay interrupt low resolution timer
---------------------------------------------------------------------------
REG_DELAY_COUNT : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
-- CR565366 need to reset on SOF now due to CR change
-- if(m_axi_sg_aresetn = '0' or ch2_delay_cnt_en = '0' or ch2_disable_delay = '1')then
-- CR570398 - need to reset delay timer each time a new delay value is written.
-- if(m_axi_sg_aresetn = '0' or ch2_delay_cnt_en = '0' or ch2_disable_delay = '1' or ch2_packet_sof = '1')then
if(m_axi_sg_aresetn = '0' or ch2_delay_cnt_en = '0' or ch2_disable_delay = '1'
or ch2_packet_sof = '1' or ch2_irqdelay_wren = '1')then
ch2_delay_count <= (others => '0');
ch2_dly_irq_set_i <= '0';
elsif(ch2_dly_fast_incr = '1' and ch2_delay_tc = '1')then
ch2_delay_count <= (others => '0');
ch2_dly_irq_set_i <= '1';
elsif(ch2_dly_fast_incr = '1')then
ch2_delay_count <= std_logic_vector(unsigned(ch2_delay_count(7 downto 0)) + 1);
ch2_dly_irq_set_i <= '0';
else
ch2_delay_count <= ch2_delay_count;
ch2_dly_irq_set_i <= '0';
end if;
end if;
end process REG_DELAY_COUNT;
-- Pass current delay count to DMASR
ch2_irqdelay_status <= ch2_delay_count;
ch2_dly_irq_set <= ch2_dly_irq_set_i;
-- Enable control for delay counter
REG_DELAY_CNT_ENABLE : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0' or ch2_disable_delay = '1')then
ch2_delay_cnt_en <= '0';
-- CR565366 simulatenous sof/eof which occurs for small packets causes delay timer
-- to not enable
-- elsif(ch2_packet_sof = '1')then
-- stop counting if already counting and receive an sof and
-- not end of another packet
elsif(ch2_delay_cnt_en = '1' and ch2_packet_sof = '1'
and ch2_packet_eof = '0')then
ch2_delay_cnt_en <= '0';
elsif(ch2_packet_eof = '1')then
ch2_delay_cnt_en <= '1';
end if;
end if;
end process REG_DELAY_CNT_ENABLE;
end generate GEN_CH2_DELAY_INTERRUPT;
---------------------------------------------------------------------------
-- Delay interrupt NOT included
---------------------------------------------------------------------------
GEN_NO_CH2_DELAY_INTR : if C_INCLUDE_DLYTMR = 0 generate
begin
ch2_dly_irq_set <= '0';
ch2_dly_irq_set_i <= '0';
ch2_irqdelay_status <= (others => '0');
end generate GEN_NO_CH2_DELAY_INTR;
end generate GEN_INCLUDE_S2MM;
-- Transmit channel not included therefore associated outputs to zero
GEN_EXCLUDE_MM2S : if C_INCLUDE_CH1 = 0 generate
begin
ch1_ioc_irq_set <= '0';
ch1_dly_irq_set <= '0';
ch1_irqdelay_status <= (others => '0');
ch1_irqthresh_status <= (others => '0');
end generate GEN_EXCLUDE_MM2S;
-- Receive channel not included therefore associated outputs to zero
GEN_EXCLUDE_S2MM : if C_INCLUDE_CH2 = 0 generate
begin
ch2_ioc_irq_set <= '0';
ch2_dly_irq_set <= '0';
ch2_irqdelay_status <= (others => '0');
ch2_irqthresh_status <= (others => '0');
end generate GEN_EXCLUDE_S2MM;
end implementation;
| mit | 59ca28fe700a84d54881efc06de9b225 | 0.46557 | 4.041392 | false | false | false | false |
Bjay1435/capstone | Geoff/Geoff.srcs/sources_1/bd/dma_loopback/ipshared/xilinx.com/axi_dma_v7_1/hdl/src/vhdl/axi_dma_s2mm_cmdsts_if.vhd | 1 | 22,876 | -- (c) Copyright 2012 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
------------------------------------------------------------
-------------------------------------------------------------------------------
-- Filename: axi_dma_s2mm_cmdsts_if.vhd
-- Description: This entity is the descriptor fetch command and status inteface
-- for the Scatter Gather Engine AXI DataMover.
--
-- VHDL-Standard: VHDL'93
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use ieee.std_logic_misc.all;
library unisim;
use unisim.vcomponents.all;
library axi_dma_v7_1_10;
use axi_dma_v7_1_10.axi_dma_pkg.all;
-------------------------------------------------------------------------------
entity axi_dma_s2mm_cmdsts_if is
generic (
C_M_AXI_S2MM_ADDR_WIDTH : integer range 32 to 64 := 32;
-- Master AXI Memory Map Address Width for S2MM Write Port
C_DM_STATUS_WIDTH : integer range 8 to 32 := 8;
-- Width of DataMover status word
-- 8 for Determinate BTT Mode
-- 32 for Indterminate BTT Mode
C_INCLUDE_SG : integer range 0 to 1 := 1;
-- Include or Exclude the Scatter Gather Engine
-- 0 = Exclude SG Engine - Enables Simple DMA Mode
-- 1 = Include SG Engine - Enables Scatter Gather Mode
C_SG_INCLUDE_STSCNTRL_STRM : integer range 0 to 1 := 1;
-- Include or Exclude AXI Status and AXI Control Streams
-- 0 = Exclude Status and Control Streams
-- 1 = Include Status and Control Streams
C_SG_USE_STSAPP_LENGTH : integer range 0 to 1 := 1;
-- Enable or Disable use of Status Stream Rx Length. Only valid
-- if C_SG_INCLUDE_STSCNTRL_STRM = 1
-- 0 = Don't use Rx Length
-- 1 = Use Rx Length
C_SG_LENGTH_WIDTH : integer range 8 to 23 := 14;
-- Descriptor Buffer Length, Transferred Bytes, and Status Stream
-- Rx Length Width. Indicates the least significant valid bits of
-- descriptor buffer length, transferred bytes, or Rx Length value
-- in the status word coincident with tlast.
C_ENABLE_MULTI_CHANNEL : integer range 0 to 1 := 0;
C_MICRO_DMA : integer range 0 to 1 := 0;
C_ENABLE_QUEUE : integer range 0 to 1 := 1
);
port (
-----------------------------------------------------------------------
-- AXI Scatter Gather Interface
-----------------------------------------------------------------------
m_axi_sg_aclk : in std_logic ; --
m_axi_sg_aresetn : in std_logic ; --
--
-- Command write interface from mm2s sm --
s2mm_cmnd_wr : in std_logic ; --
s2mm_cmnd_data : in std_logic_vector --
((C_M_AXI_S2MM_ADDR_WIDTH-32+2*32+CMD_BASE_WIDTH+46)-1 downto 0); --
s2mm_cmnd_pending : out std_logic ; --
--
s2mm_packet_eof : out std_logic ; --
--
s2mm_sts_received_clr : in std_logic ; --
s2mm_sts_received : out std_logic ; --
s2mm_tailpntr_enble : in std_logic ; --
s2mm_desc_cmplt : in std_logic ; --
--
-- User Command Interface Ports (AXI Stream) --
s_axis_s2mm_cmd_tvalid : out std_logic ; --
s_axis_s2mm_cmd_tready : in std_logic ; --
s_axis_s2mm_cmd_tdata : out std_logic_vector --
((C_M_AXI_S2MM_ADDR_WIDTH-32+2*32+CMD_BASE_WIDTH+46)-1 downto 0); --
--
-- User Status Interface Ports (AXI Stream) --
m_axis_s2mm_sts_tvalid : in std_logic ; --
m_axis_s2mm_sts_tready : out std_logic ; --
m_axis_s2mm_sts_tdata : in std_logic_vector --
(C_DM_STATUS_WIDTH - 1 downto 0) ; --
m_axis_s2mm_sts_tkeep : in std_logic_vector((C_DM_STATUS_WIDTH/8)-1 downto 0); --
--
-- Scatter Gather Fetch Status --
s2mm_err : in std_logic ; --
s2mm_brcvd : out std_logic_vector --
(C_SG_LENGTH_WIDTH-1 downto 0) ; --
s2mm_done : out std_logic ; --
s2mm_error : out std_logic ; --
s2mm_interr : out std_logic ; --
s2mm_slverr : out std_logic ; --
s2mm_decerr : out std_logic ; --
s2mm_tag : out std_logic_vector(3 downto 0) --
);
end axi_dma_s2mm_cmdsts_if;
-------------------------------------------------------------------------------
-- Architecture
-------------------------------------------------------------------------------
architecture implementation of axi_dma_s2mm_cmdsts_if is
attribute DowngradeIPIdentifiedWarnings: string;
attribute DowngradeIPIdentifiedWarnings of implementation : architecture is "yes";
-------------------------------------------------------------------------------
-- Functions
-------------------------------------------------------------------------------
-- No Functions Declared
-------------------------------------------------------------------------------
-- Constants Declarations
-------------------------------------------------------------------------------
-- No Constants Declared
-------------------------------------------------------------------------------
-- Signal / Type Declarations
-------------------------------------------------------------------------------
signal sts_tready : std_logic := '0';
signal sts_received_i : std_logic := '0';
signal stale_desc : std_logic := '0';
signal log_status : std_logic := '0';
signal s2mm_slverr_i : std_logic := '0';
signal s2mm_decerr_i : std_logic := '0';
signal s2mm_interr_i : std_logic := '0';
signal s2mm_error_or : std_logic := '0';
signal s2mm_packet_eof_i : std_logic := '0';
signal smpl_dma_overflow : std_logic := '0';
-------------------------------------------------------------------------------
-- Begin architecture logic
-------------------------------------------------------------------------------
begin
s2mm_slverr <= s2mm_slverr_i;
s2mm_decerr <= s2mm_decerr_i;
s2mm_interr <= s2mm_interr_i or smpl_dma_overflow;
s2mm_packet_eof <= s2mm_packet_eof_i;
-- Stale descriptor if complete bit already set and in tail pointer mode.
stale_desc <= '1' when s2mm_desc_cmplt = '1' and s2mm_tailpntr_enble = '1'
else '0';
-------------------------------------------------------------------------------
-- DataMover Command Interface
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- When command by fetch sm, drive descriptor fetch command to data mover.
-- Hold until data mover indicates ready.
-------------------------------------------------------------------------------
GEN_HOLD_NO_DATA : if C_ENABLE_QUEUE = 1 generate
begin
GEN_DATAMOVER_CMND : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
s_axis_s2mm_cmd_tvalid <= '0';
-- s_axis_s2mm_cmd_tdata <= (others => '0');
s2mm_cmnd_pending <= '0';
-- new command and descriptor not flagged as stale
elsif(s2mm_cmnd_wr = '1' and stale_desc = '0')then
s_axis_s2mm_cmd_tvalid <= '1';
-- s_axis_s2mm_cmd_tdata <= s2mm_cmnd_data;
s2mm_cmnd_pending <= '1';
-- clear flag on datamover acceptance of command
elsif(s_axis_s2mm_cmd_tready = '1')then
s_axis_s2mm_cmd_tvalid <= '0';
-- s_axis_s2mm_cmd_tdata <= (others => '0');
s2mm_cmnd_pending <= '0';
end if;
end if;
end process GEN_DATAMOVER_CMND;
s_axis_s2mm_cmd_tdata <= s2mm_cmnd_data;
end generate GEN_HOLD_NO_DATA;
GEN_HOLD_DATA : if C_ENABLE_QUEUE = 0 generate
begin
GEN_DATAMOVER_CMND : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
s_axis_s2mm_cmd_tvalid <= '0';
s_axis_s2mm_cmd_tdata <= (others => '0');
s2mm_cmnd_pending <= '0';
-- new command and descriptor not flagged as stale
elsif(s2mm_cmnd_wr = '1' and stale_desc = '0')then
s_axis_s2mm_cmd_tvalid <= '1';
s_axis_s2mm_cmd_tdata <= s2mm_cmnd_data;
s2mm_cmnd_pending <= '1';
-- clear flag on datamover acceptance of command
elsif(s_axis_s2mm_cmd_tready = '1')then
s_axis_s2mm_cmd_tvalid <= '0';
s_axis_s2mm_cmd_tdata <= (others => '0');
s2mm_cmnd_pending <= '0';
end if;
end if;
end process GEN_DATAMOVER_CMND;
end generate GEN_HOLD_DATA;
-------------------------------------------------------------------------------
-- DataMover Status Interface
-------------------------------------------------------------------------------
-- Drive ready low during reset to indicate not ready
REG_STS_READY : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
sts_tready <= '0';
elsif(sts_tready = '1' and m_axis_s2mm_sts_tvalid = '1')then
sts_tready <= '0';
elsif(sts_received_i = '0') then
sts_tready <= '1';
end if;
end if;
end process REG_STS_READY;
-- Pass to DataMover
m_axis_s2mm_sts_tready <= sts_tready;
log_status <= '1' when m_axis_s2mm_sts_tvalid = '1' and sts_received_i = '0'
else '0';
-- Status stream is included, and using the rxlength from the status stream and in Scatter Gather Mode
DETERMINATE_BTT_MODE : if (C_SG_INCLUDE_STSCNTRL_STRM = 1 and C_SG_USE_STSAPP_LENGTH = 1
and C_INCLUDE_SG = 1) or (C_MICRO_DMA = 1) generate
begin
-- Bytes received not available in determinate byte mode
s2mm_brcvd <= (others => '0');
-- Simple DMA overflow not used in Scatter Gather Mode
smpl_dma_overflow <= '0';
-------------------------------------------------------------------------------
-- Log status bits out of data mover.
-------------------------------------------------------------------------------
DATAMOVER_STS : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
s2mm_done <= '0';
s2mm_slverr_i <= '0';
s2mm_decerr_i <= '0';
s2mm_interr_i <= '0';
s2mm_tag <= (others => '0');
-- Status valid, therefore capture status
elsif(m_axis_s2mm_sts_tvalid = '1' and sts_received_i = '0')then
s2mm_done <= m_axis_s2mm_sts_tdata(DATAMOVER_STS_CMDDONE_BIT);
s2mm_slverr_i <= m_axis_s2mm_sts_tdata(DATAMOVER_STS_SLVERR_BIT);
s2mm_decerr_i <= m_axis_s2mm_sts_tdata(DATAMOVER_STS_DECERR_BIT);
s2mm_interr_i <= m_axis_s2mm_sts_tdata(DATAMOVER_STS_INTERR_BIT);
s2mm_tag <= m_axis_s2mm_sts_tdata(DATAMOVER_STS_TAGMSB_BIT downto DATAMOVER_STS_TAGLSB_BIT);
-- Only assert when valid
else
s2mm_done <= '0';
s2mm_slverr_i <= '0';
s2mm_decerr_i <= '0';
s2mm_interr_i <= '0';
s2mm_tag <= (others => '0');
end if;
end if;
end process DATAMOVER_STS;
-- End Of Frame (EOF = 1) detected on status received. Used
-- for interrupt delay timer
REG_RX_EOF : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
s2mm_packet_eof_i <= '0';
elsif(log_status = '1')then
s2mm_packet_eof_i <= m_axis_s2mm_sts_tdata(DATAMOVER_STS_TAGEOF_BIT)
or m_axis_s2mm_sts_tdata(DATAMOVER_STS_INTERR_BIT);
else
s2mm_packet_eof_i <= '0';
end if;
end if;
end process REG_RX_EOF;
end generate DETERMINATE_BTT_MODE;
-- No Status Stream or not using rxlength from status stream or in Simple DMA Mode
INDETERMINATE_BTT_MODE : if (C_SG_INCLUDE_STSCNTRL_STRM = 0 or C_SG_USE_STSAPP_LENGTH = 0
or C_INCLUDE_SG = 0) and (C_MICRO_DMA = 0) generate
-- Bytes received MSB index bit
constant BRCVD_MSB_BIT : integer := (C_DM_STATUS_WIDTH - 2) - (BUFFER_LENGTH_WIDTH - C_SG_LENGTH_WIDTH);
-- Bytes received LSB index bit
constant BRCVD_LSB_BIT : integer := (C_DM_STATUS_WIDTH - 2) - (BUFFER_LENGTH_WIDTH - 1);
begin
-------------------------------------------------------------------------------
-- Log status bits out of data mover.
-------------------------------------------------------------------------------
DATAMOVER_STS : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
s2mm_brcvd <= (others => '0');
s2mm_done <= '0';
s2mm_slverr_i <= '0';
s2mm_decerr_i <= '0';
s2mm_interr_i <= '0';
s2mm_tag <= (others => '0');
-- Status valid, therefore capture status
elsif(m_axis_s2mm_sts_tvalid = '1' and sts_received_i = '0')then
s2mm_brcvd <= m_axis_s2mm_sts_tdata(BRCVD_MSB_BIT downto BRCVD_LSB_BIT);
s2mm_done <= m_axis_s2mm_sts_tdata(DATAMOVER_STS_CMDDONE_BIT);
s2mm_slverr_i <= m_axis_s2mm_sts_tdata(DATAMOVER_STS_SLVERR_BIT);
s2mm_decerr_i <= m_axis_s2mm_sts_tdata(DATAMOVER_STS_DECERR_BIT);
s2mm_interr_i <= m_axis_s2mm_sts_tdata(DATAMOVER_STS_INTERR_BIT);
s2mm_tag <= m_axis_s2mm_sts_tdata(DATAMOVER_STS_TAGMSB_BIT downto DATAMOVER_STS_TAGLSB_BIT);
-- Only assert when valid
else
s2mm_brcvd <= (others => '0');
s2mm_done <= '0';
s2mm_slverr_i <= '0';
s2mm_decerr_i <= '0';
s2mm_interr_i <= '0';
s2mm_tag <= (others => '0');
end if;
end if;
end process DATAMOVER_STS;
-- End Of Frame (EOF = 1) detected on statis received. Used
-- for interrupt delay timer
REG_RX_EOF : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
s2mm_packet_eof_i <= '0';
elsif(log_status = '1')then
s2mm_packet_eof_i <= m_axis_s2mm_sts_tdata(DATAMOVER_STS_TLAST_BIT)
or m_axis_s2mm_sts_tdata(DATAMOVER_STS_INTERR_BIT);
else
s2mm_packet_eof_i <= '0';
end if;
end if;
end process REG_RX_EOF;
-- If in Simple DMA mode then generate overflow flag
GEN_OVERFLOW_SMPL_DMA : if C_INCLUDE_SG = 0 generate
REG_OVERFLOW : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
smpl_dma_overflow <= '0';
-- If status received and TLAST bit is NOT set then packet is bigger than
-- BTT value commanded which is an invalid command
elsif(log_status = '1' and m_axis_s2mm_sts_tdata(DATAMOVER_STS_TLAST_BIT) = '0')then
smpl_dma_overflow <= '1';
end if;
end if;
end process REG_OVERFLOW;
end generate GEN_OVERFLOW_SMPL_DMA;
-- If in Scatter Gather Mode then do NOT generate simple dma mode overflow flag
GEN_NO_OVERFLOW_SMPL_DMA : if C_INCLUDE_SG = 1 generate
begin
smpl_dma_overflow <= '0';
end generate GEN_NO_OVERFLOW_SMPL_DMA;
end generate INDETERMINATE_BTT_MODE;
-- Flag when status is received. Used to hold status until sg if
-- can use status. This only has meaning when SG Engine Queues are turned
-- on
STS_RCVD_FLAG : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0' or s2mm_sts_received_clr = '1')then
sts_received_i <= '0';
-- Status valid, therefore capture status
elsif(m_axis_s2mm_sts_tvalid = '1' and sts_received_i = '0')then
sts_received_i <= '1';
end if;
end if;
end process STS_RCVD_FLAG;
s2mm_sts_received <= sts_received_i;
-------------------------------------------------------------------------------
-- Register global error from data mover.
-------------------------------------------------------------------------------
s2mm_error_or <= s2mm_slverr_i or s2mm_decerr_i or s2mm_interr_i or smpl_dma_overflow;
-- Log errors into a global error output
S2MM_ERROR_PROCESS : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
s2mm_error <= '0';
-- If Datamover issues error on the transfer or if a stale descriptor is
-- detected when in tailpointer mode then issue an error
elsif((s2mm_error_or = '1')
or (stale_desc = '1' and s2mm_cmnd_wr='1'))then
s2mm_error <= '1';
end if;
end if;
end process S2MM_ERROR_PROCESS;
end implementation;
| mit | 02e13a80fe2e75690227baa829bbc758 | 0.452002 | 4.290323 | false | false | false | false |
szanni/aeshw | zybo-base/lib/Digilent/hdmi_tx_1.0/hdl/TMDSEncoder.vhd | 1 | 6,902 | --------------------------------------------------------------------------------
--
-- File:
-- TMDSEncoder.vhd
--
-- Module:
-- TMDSEncoder
--
-- Author:
-- Elod Gyorgy
--
-- Date:
-- 10/28/2010
--
-- Description:
-- This module encodes 8 bit data and 2 control signals into 10 bit TMDS symbols
--
-- Copyright notice:
-- Copyright (C) 2014 Digilent Inc.
--
-- License:
-- This program is free software; distributed under the terms of
-- BSD 3-clause license ("Revised BSD License", "New BSD License", or "Modified BSD License")
--
-- Redistribution and use in source and binary forms, with or without modification,
-- are permitted provided that the following conditions are met:
--
-- 1. Redistributions of source code must retain the above copyright notice, this
-- list of conditions and the following disclaimer.
-- 2. Redistributions in binary form must reproduce the above copyright notice,
-- this list of conditions and the following disclaimer in the documentation
-- and/or other materials provided with the distribution.
-- 3. Neither the name(s) of the above-listed copyright holder(s) nor the names
-- of its contributors may be used to endorse or promote products derived
-- from this software without specific prior written permission.
--
-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-- ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-- WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
-- IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
-- INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-- BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-- DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-- LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
-- OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
-- OF THE POSSIBILITY OF SUCH DAMAGE.
--
--------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_SIGNED.ALL;
-- Uncomment the following library declaration if instantiating
-- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;
entity TMDSEncoder is
Port ( D_I : in STD_LOGIC_VECTOR (7 downto 0);
C0_I : in STD_LOGIC;
C1_I : in STD_LOGIC;
DE_I : in STD_LOGIC;
CLK_I: in STD_LOGIC;
RST_I: in STD_LOGIC;
D_O : out STD_LOGIC_VECTOR (9 downto 0));
end TMDSEncoder;
architecture Behavioral of TMDSEncoder is
signal d_d : std_logic_vector(7 downto 0);
signal q_m, q_m_xor, q_m_xnor, q_m_d: std_logic_vector(8 downto 0);
signal control_token, q_out, q_out_d: std_logic_vector(9 downto 0);
signal n1_d, n1_q_m, n0_q_m, int_n1_q_m : std_logic_vector(4 downto 0); --range 0-8 + sign
signal dc_bias, cnt_t_1, cnt_t : std_logic_vector(4 downto 0) := "00000"; --range -8 - +8 + sign
signal c0_d, c1_d, de_d, c0_dd, c1_dd, de_dd : std_logic;
signal cond_not_balanced, cond_balanced : std_logic;
begin
----------------------------------------------------------------------------------
-- DVI 1.0 Specs Figure 3-5
-- Pipeline stage 1, minimise transitions
----------------------------------------------------------------------------------
process(CLK_I)
begin
if Rising_Edge(CLK_I) then
de_d <= DE_I;
n1_d <= CONV_STD_LOGIC_VECTOR(0, n1_d'Length) + D_I(0) + D_I(1) + D_I(2) + D_I(3) + D_I(4) + D_I(5) + D_I(6) + D_I(7);
d_d <= D_I; --insert data into the pipeline;
c0_d <= C0_I; --insert control into the pipeline;
c1_d <= C1_I;
end if;
end process;
----------------------------------------------------------------------------------
-- Choose one of the two encoding options based on n1_d
----------------------------------------------------------------------------------
q_m_xor(0) <= d_d(0);
encode1: for i in 1 to 7 generate
q_m_xor(i) <= q_m_xor(i-1) xor d_d(i);
end generate;
q_m_xor(8) <= '1';
q_m_xnor(0) <= d_d(0);
encode2: for i in 1 to 7 generate
q_m_xnor(i) <= q_m_xnor(i-1) xnor d_d(i);
end generate;
q_m_xnor(8) <= '0';
q_m <= q_m_xnor when n1_d > 4 or (n1_d = 4 and d_d(0) = '0') else
q_m_xor;
----------------------------------------------------------------------------------
-- Pipeline stage 2, balance DC
----------------------------------------------------------------------------------
int_n1_q_m <= CONV_STD_LOGIC_VECTOR(0, n1_q_m'Length) + q_m(0) + q_m(1) + q_m(2) + q_m(3) + q_m(4) + q_m(5) + q_m(6) + q_m(7);
process(CLK_I)
begin
if Rising_Edge(CLK_I) then
n1_q_m <= int_n1_q_m;
n0_q_m <= CONV_STD_LOGIC_VECTOR(8, n0_q_m'Length) - int_n1_q_m;
q_m_d <= q_m;
c0_dd <= c0_d; --insert control into the pipeline;
c1_dd <= c1_d;
de_dd <= de_d;
end if;
end process;
cond_balanced <= '1' when cnt_t_1 = 0 or n1_q_m = n0_q_m else -- DC balanced output
'0';
cond_not_balanced <= '1' when (cnt_t_1 > 0 and n1_q_m > n0_q_m) or -- too many 1's
(cnt_t_1 < 0 and n0_q_m > n1_q_m) else -- too many 0's
'0';
control_token <= "1101010100" when c1_dd = '0' and c0_dd = '0' else
"0010101011" when c1_dd = '0' and c0_dd = '1' else
"0101010100" when c1_dd = '1' and c0_dd = '0' else
"1010101011";
q_out <= control_token when de_dd = '0' else --control period
not q_m_d(8) & q_m_d(8) & not q_m_d(7 downto 0) when cond_balanced = '1' and q_m_d(8) = '0' else
not q_m_d(8) & q_m_d(8) & q_m_d(7 downto 0) when cond_balanced = '1' and q_m_d(8) = '1' else
'1' & q_m_d(8) & not q_m_d(7 downto 0) when cond_not_balanced = '1' else
'0' & q_m_d(8) & q_m_d(7 downto 0); --DC balanced
dc_bias <= n0_q_m - n1_q_m;
cnt_t <= CONV_STD_LOGIC_VECTOR(0, cnt_t'Length) when de_dd = '0' else --control period
cnt_t_1 + dc_bias when cond_balanced = '1' and q_m_d(8) = '0' else
cnt_t_1 - dc_bias when cond_balanced = '1' and q_m_d(8) = '1' else
cnt_t_1 + EXT(q_m(8) & '0', cnt_t'Length) + dc_bias when cond_not_balanced = '1' else
cnt_t_1 - EXT(not q_m(8) & '0', cnt_t'Length) - dc_bias;
----------------------------------------------------------------------------------
-- Pipeline stage 3, registered output
----------------------------------------------------------------------------------
process(CLK_I)
begin
if Rising_Edge(CLK_I) then
cnt_t_1 <= cnt_t;
q_out_d <= q_out;
end if;
end process;
D_O <= q_out_d;
end Behavioral;
| bsd-2-clause | b84ce7d195d63d06e7b67379d054a326 | 0.538105 | 3.040529 | false | false | false | false |
sergeykhbr/riscv_vhdl | vhdl/rtl/prj/sim/dcache_lru_tb.vhd | 1 | 9,633 | --!
--! Copyright 2019 Sergey Khabarov, [email protected]
--!
--! Licensed under the Apache License, Version 2.0 (the "License");
--! you may not use this file except in compliance with the License.
--! You may obtain a copy of the License at
--!
--! http://www.apache.org/licenses/LICENSE-2.0
--!
--! Unless required by applicable law or agreed to in writing, software
--! distributed under the License is distributed on an "AS IS" BASIS,
--! WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
--! See the License for the specific language governing permissions and
--! limitations under the License.
--!
library ieee;
use ieee.std_logic_1164.all;
library std;
use std.textio.all;
library commonlib;
use commonlib.types_common.all;
use commonlib.types_util.all;
library riverlib;
use riverlib.river_cfg.all;
use riverlib.types_cache.all;
entity dcache_lru_tb is
end dcache_lru_tb;
architecture behavior of dcache_lru_tb is
-- input/output signals:
signal i_nrst : std_logic := '0';
signal i_clk : std_logic := '0';
signal i_req_valid : std_logic;
signal i_req_write : std_logic;
signal i_req_addr : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
signal i_req_wdata : std_logic_vector(64-1 downto 0);
signal i_req_wstrb : std_logic_vector(8-1 downto 0);
signal o_req_ready : std_logic;
signal o_resp_valid : std_logic;
signal o_resp_addr : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
signal o_resp_data : std_logic_vector(64-1 downto 0);
signal o_resp_er_addr : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
signal o_resp_er_load_fault : std_logic;
signal o_resp_er_store_fault : std_logic;
signal o_resp_er_mpu_load : std_logic;
signal o_resp_er_mpu_store : std_logic;
signal i_resp_ready : std_logic;
signal i_req_mem_ready : std_logic;
signal o_req_mem_valid : std_logic;
signal o_req_mem_type : std_logic_vector(REQ_MEM_TYPE_BITS-1 downto 0);
signal o_req_mem_addr : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
signal o_req_mem_strob : std_logic_vector(L1CACHE_BYTES_PER_LINE-1 downto 0);
signal o_req_mem_data : std_logic_vector(L1CACHE_LINE_BITS-1 downto 0);
signal i_mem_data_valid : std_logic;
signal i_mem_data : std_logic_vector(L1CACHE_LINE_BITS-1 downto 0);
signal i_mem_load_fault : std_logic;
signal i_mem_store_fault : std_logic;
signal o_mpu_addr : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
signal i_mpu_flags : std_logic_vector(CFG_MPU_FL_TOTAL-1 downto 0);
signal i_flush_address : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
signal i_flush_valid : std_logic;
type bus_state_type is (Idle, Read, ReadLast);
type BusRegisterType is record
state : bus_state_type;
mpu_addr : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
burst_addr : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
end record;
signal r, rin : BusRegisterType;
signal clk_cnt : integer := 0;
constant START_POINT : integer := 10 + 1 + (2**10);
constant START_POINT2 : integer := START_POINT + 500;
begin
i_clk <= not i_clk after 12.5 ns;
comb_fecth : process (i_clk, clk_cnt)
variable v_req_valid : std_logic;
variable v_req_write : std_logic;
variable vb_req_addr : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
variable vb_req_wdata : std_logic_vector(64-1 downto 0);
variable vb_req_wstrb : std_logic_vector(8-1 downto 0);
variable vb_mpu_flags : std_logic_vector(CFG_MPU_FL_TOTAL-1 downto 0);
variable v_flush_valid : std_logic;
variable vb_flush_address : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
begin
v_req_valid := '0';
v_req_write := '0';
vb_req_addr := (others => '0');
vb_req_wdata := (others => '0');
vb_req_wstrb := (others => '0');
i_resp_ready <= '1';
vb_mpu_flags := (others => '1');
v_flush_valid := '0';
vb_flush_address := (others => '0');
if r.mpu_addr(31) = '1' then
vb_mpu_flags(CFG_MPU_FL_CACHABLE) := '0';
end if;
case (clk_cnt) is
when START_POINT =>
-- Load line[0], way[0]
v_req_valid := '1';
vb_req_addr(31 downto 0) := X"00000008";
when START_POINT + 10 =>
-- Load line[0], way[1]
v_req_valid := '1';
vb_req_addr(31 downto 0) := X"00010008";
when START_POINT + 25 =>
-- Load line[0], way[2]
v_req_valid := '1';
vb_req_addr(31 downto 0) := X"00011008";
when START_POINT + 40 =>
-- Load line[0], way[3]
v_req_valid := '1';
vb_req_addr(31 downto 0) := X"00012008";
when START_POINT + 55 =>
-- Remove line[0], way[0] (as an older used)
-- Load line[0], way[0] with a new data
-- way[1] becomes and older
v_req_valid := '1';
vb_req_addr(31 downto 0) := X"00013008";
when START_POINT2 =>
-- Cached Write to loaded cache line without bus access
-- Modify line[0], way[3]
-- LRU should move way[3] on top (way[1] is still an older)
v_req_valid := '1';
v_req_write := '1';
vb_req_addr(31 downto 0) := X"00012008";
vb_req_wdata := conv_std_logic_vector(16#0000CC00#, 64);
vb_req_wstrb := conv_std_logic_vector(16#02#, 8);
when START_POINT2 + 10 =>
-- Uncached write directly on bus
v_req_valid := '1';
v_req_write := '1';
vb_req_addr(31 downto 0) := X"80012008";
vb_req_wdata := X"00000000_0000CCBB";
vb_req_wstrb := conv_std_logic_vector(16#0F#, 8);
when START_POINT2 + 20 =>
-- Uncached read directly on bus
v_req_valid := '1';
v_req_write := '0';
vb_req_addr(31 downto 0) := X"80012010";
when START_POINT2 + 30 =>
-- Cached Write to notloaded cache line without displacement:
-- - load line
-- - modify line
-- - store to cache
--
v_req_valid := '1';
v_req_write := '1';
vb_req_addr(31 downto 0) := X"00000028";
vb_req_wdata := X"00000000_BBAA0000";
vb_req_wstrb := conv_std_logic_vector(16#0C#, 8);
when others =>
end case;
i_req_valid <= v_req_valid;
i_req_write <= v_req_write;
i_req_addr <= vb_req_addr;
i_req_wdata <= vb_req_wdata;
i_req_wstrb <= vb_req_wstrb;
i_mpu_flags <= vb_mpu_flags;
i_flush_valid <= v_flush_valid;
i_flush_address <= vb_flush_address;
end process;
comb_bus : process (i_nrst, r,
o_req_mem_valid, o_req_mem_type,
o_req_mem_addr, o_req_mem_strob, o_req_mem_data,
o_mpu_addr)
variable v : BusRegisterType;
begin
v := r;
i_req_mem_ready <= '0';
i_mem_data_valid <= '0';
i_mem_data <= (others => '0');
i_mem_load_fault <= '0';
i_mem_store_fault <= '0';
case r.state is
when Idle =>
i_req_mem_ready <= '1';
if o_req_mem_valid = '1' then
v.state := ReadLast;
v.burst_addr := o_req_mem_addr;
end if;
when Read =>
i_mem_data_valid <= '1';
i_mem_data <= X"2000000010000000" + r.burst_addr;
v.burst_addr := r.burst_addr + 8;
v.state := ReadLast;
when ReadLast =>
i_req_mem_ready <= '1';
i_mem_data_valid <= '1';
i_mem_data <= X"2000000010000000" + r.burst_addr;
if o_req_mem_valid = '1' then
v.state := ReadLast;
v.burst_addr := o_req_mem_addr;
else
v.state := Idle;
end if;
when others =>
end case;
v.mpu_addr := o_mpu_addr;
if i_nrst = '0' then
v.state := Idle;
v.mpu_addr := (others => '0');
v.burst_addr := (others => '0');
end if;
rin <= v;
end process;
procSignal : process (i_clk, clk_cnt)
begin
if rising_edge(i_clk) then
if clk_cnt = 10 then
i_nrst <= '1';
end if;
end if;
end process procSignal;
tt : dcache_lru generic map (
memtech => 0,
async_reset => false,
coherence_ena => false
) port map (
i_clk => i_clk,
i_nrst => i_nrst,
i_req_valid => i_req_valid,
i_req_write => i_req_write,
i_req_addr => i_req_addr,
i_req_wdata => i_req_wdata,
i_req_wstrb => i_req_wstrb,
o_req_ready => o_req_ready,
o_resp_valid => o_resp_valid,
o_resp_addr => o_resp_addr,
o_resp_data => o_resp_data,
o_resp_er_addr => o_resp_er_addr,
o_resp_er_load_fault => o_resp_er_load_fault,
o_resp_er_store_fault => o_resp_er_store_fault,
o_resp_er_mpu_load => o_resp_er_mpu_load,
o_resp_er_mpu_store => o_resp_er_mpu_store,
i_resp_ready => i_resp_ready,
i_req_mem_ready => i_req_mem_ready,
o_req_mem_valid => o_req_mem_valid,
o_req_mem_type => o_req_mem_type,
o_req_mem_addr => o_req_mem_addr,
o_req_mem_strob => o_req_mem_strob,
o_req_mem_data => o_req_mem_data,
i_mem_data_valid => i_mem_data_valid,
i_mem_data => i_mem_data,
i_mem_load_fault => i_mem_load_fault,
i_mem_store_fault => i_mem_store_fault,
o_mpu_addr => o_mpu_addr,
i_mpu_flags => i_mpu_flags,
-- D$ Snoop interface
i_req_snoop_valid => '0',
i_req_snoop_type => "00",
o_req_snoop_ready => open,
i_req_snoop_addr => (others => '0'),
i_resp_snoop_ready => '1',
o_resp_snoop_valid => open,
o_resp_snoop_data => open,
o_resp_snoop_flags => open,
i_flush_address => i_flush_address,
i_flush_valid => i_flush_valid
);
procCheck : process (i_nrst, i_clk)
begin
if rising_edge(i_clk) then
clk_cnt <= clk_cnt + 1;
r <= rin;
end if;
end process procCheck;
end;
| apache-2.0 | 618ad005775d53ea87cd716f03030300 | 0.589432 | 2.964 | false | false | false | false |
szanni/aeshw | zybo-base/zybo_bsd/zybo_bsd.srcs/sources_1/bd/system/ip/system_auto_pc_5/fifo_generator_v11_0/ramfifo/wr_dc_fwft_ext_as.vhd | 19 | 13,630 | `protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
pabZO1I/O5UlEfYaQEPwd4l9eUai0bqYoMxFZDUmBPXyS95K3GW98Ld97MzJKAXXnSlf1PewGW2v
0RIeWd32HQ==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
MnYS98CLv6GUlLtXXj0MDq/aXJWBamrEeFXZFkhzX7OjMU68I3JzEc2/1UN3CHInfTII6cQBis+f
MSPPkhHYfjWA/UnlZNCfIbUjCA7v4zzzEDOXLdUwHhey61M2PDbtjo4F0M+PSYsHQUE61FCJYZr6
+aBOwyo0CpKkCUVEbxg=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2013_09", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
qncW/Cwz6DQ02ZtEcvyp5WdAA4sItotGPpP0REUtLyqefQhCtJmFILcg4T0iyRUg7VuYEwIANO5+
QvHNNc39qIJv9lOesalgHBZQgvNRJnIdYWaRfS0GyacwI/2JQRwAkuAQstvDCp4RTc3l8lwP6/ls
9Kgq/wnF0FIDD2zIsqBFYPVau5gOg+E2Yv8daLhsLbgUNkGI+w4/OZjRbQGSUjwZLuzAjcC7dEzW
IiD8iCe2E3P5aTpTA2tXeuvseQy8KOwVCxJQuur+f/bmnE2QrPi5PPQMRcOyc4ok7k5U/64SCKlJ
oITfL/xIL/xwZa26tMPcLgkkx7p0G3RLvL/tVw==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
Dnf6vaqe/V3pNaiPDsCpL4mEkUhuRTF8jsptuAsYR5QlsF0hNdnCfK2+aKM5H69faCvd5mpbM0GP
Pqz+qhNmOYPHdckgaTUGR5o/7QyV8YKLvzwfyDMqTu2isTv6FP6Q6welH2CNBnmC1/h5T7i+fy/Q
rlaoXYJxfrB3B6n9clU=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
IMf8iBP4Q72XIQn7cHjsTbT2wNsnwrpqWy35OTpGthg9IgmIl2PQf4/c9imtaZPdkPVpIBywT+vW
p0seCgJeCim8uHSlCA4Yuvzi7NiJqnEZtjEX9xSzaDj4EflUudOJTsvuYMqv/3kxvUgkIK0AS+U7
CWRV3RwJIjyzXaV3SkeD5i2xf0d/bezTocOrvt7wO8hz1n7ziicW5bgdFMZpO18+84bLDi0MzKYQ
Ad5OLz8QJgoCqRTe+B2lLXuByvKd2+XBYArz50J0pDfy4RubYe7FYpZdW50ze6dgBWVP0HOw0tLX
Pt7eQrmsKxnIhjnIQBRBht+Bb5QLkHSbaJnGbg==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 8352)
`protect data_block
3Txl86gxySTjspY1bX6mjaEtHzHyJ6PEwV30HseHtq4UpP2jRFV0RDcUeckeAq3gEZ5Qu030LNT9
bbOM++HUbE1I8N7rcDRyyG1/zAJa57yK2mi3blq8tQKZ32YObDq6jHS9U2gM3rYjhBhVr2aKK7qQ
c8X7nouwkJNW94GkZ7OhWlUV608zX7vk9Ytc1anxwA7VNM5uWs0oTqvG08wzxEO/Wp7eKojoSXwO
3Xhea7t/apLpI0orOHVPwHMzsjaxq56UlxouX+wqfNeT7gOjE86Icz9Kv6qJveIr35SBEOvmKTEu
XXSNT6K9tm6q88SyQn3Fynw4R45InLxk96cdtyVOQFxzvDOOUUpt48giFXLbSh2J5eWLkh7wKkBY
NwQFlaCkJdKCsT643SDourT31zKF+Ez8++L0sOmdPaVStcet+0/LOBpXifaCvmNLeKxnE44uDown
kBMOgjRQlDv9IFqs6Wo034TMX/2IlRfFbca54S7HNhd4DqEOj/dLkdbi3hQqvKlUQLxGd/aByX1b
hgEkVsmNNotqvCZpPQ9UsFsRcys6l++qYUPYLNf+xf+zP1lV2cgnRS4RT1iwGyboNFn3K77Tpsb7
9OpYXIW92RPDYHYOVluUlhGfDVUg0MYat/q2HEJQJrXI453QNfUDhUynqjNMtUc0dMa31quPvRVZ
hHf+2/bR4Q7cjHspoRtCLGojgvnSf247q4ctuo7nbrdhYUuAa4Bjj5ju4myg9nxVU5ukJQzguBJL
3sQ6JJNrie8SnHcaAMftHxFvfSWwly88oe57Wp/UEarxKXac3A5nc41pt8Mv9Xgpu9v9VOJTxxUh
0lyGcjzLUm2XesldVnJ/PnO7FAjtpxgucH+XMQf+g2wsb59I8+ybUbOrYNQOqWYSwYCOn++p4OTm
z6+e0PpDeW3xZTDe3cwHEBvM7k9KPgY+hpev11RMc+0TNT+raUGL3kNBmFiuUKDLoo9/RyEjagUr
0XsfKNMC2ZuGcJCLV4GR9MBQAHlIYRgt8pMqwpUU0tmvh50d1NgrWHgYQL1vhVQUjl2fL8jrCp0B
+68ca7YQ1jwOO06mDdlvVYQjZYG/4HCGLQDVssbaag2EjF7zECcmS20NvYP6RjiCxeFLTts4nWNX
QI9Rm6NxhHHcmzOEqLUcCSEhySlQwHac/hU0wa46OGSKe0mrmjph7yshq6QOx92ErIUyvhcBeJZo
CYY1tCy8lK7N1pab+wcy1j3BbgC4h+YmgjRF6QzhsIcO0Gm9AWLAMvRIrWOPp/V66F7b53uZGfZg
hBu915yc5M5CCeRHSBRqwlOTQ8b+GpsV2+8NdhIVSdXpGCVYKQExROd9Zd2r2RFpyx4WC8C9uISU
ICBHRlp14RuEKS1tE3agqqBEQL8G83cM487JmgJrWO8alKV+Q5R/Y8cvNDq7FRMhEiPSO1OEMab0
xFA+efs/Tcf+HHo0OesKsFCjVlqwwpgbNSNTgtlDcfxD/icoQHkm8ZiY89TmjfvR0b0cnzwpHcDj
RMaiCRYxWD1x6Iy8HAcn9ETbZjNvz/AykS/6e5fMYkeHvaSs0iTZgt6FMmApO8MaDCaUZJEzLv0U
z5mb4bxB2IUUrSSt79+9IGbvbS7SphLSQpuyhmnr4JnQmDNj7qbKUz1unir19crnVKkDO6zxigd/
lR8zPfNWeXOCuLklXc3IcDDhBD+ysKGtw2idvIUOTMC0Wa4g2d1zmnUwx/0x0HNEwmXy5XyZpQpe
MqREqJVr/i8Oed0hI1JR2OE/D9xvGQmy67OWwqOQtB58ZoJP8JmdoWCJKsQhk9569I+XRRmtvLCC
d7m3tMoqYsWVMFY16sa1q0QO8R7PijrjPovnzqr48ZYLKmswIDxTakNM2zHM4zbqta7faU1m1++I
nKYMlqUtnps/uGB8XKS5fnRFmB2KPBoCh3xddVUq2bbcUnb3pSgykrT+6T0Cy+V9trIv2IJ0c7l3
NaV+KvRYH0dgbBFOT5DsqIj0jiaAiwSrTgUsdI/LQ3cKu9M2/ExRpY3onDoKZc2dAD3GGb69SXAr
w7p9Q18HYjcJHWpaItgzAqnpDNOsS8ZuVMmHOKqCAjG/8Krvw+TQI/+VL6o0RdDz23z6HmqTItKc
1lRdvoub1qnfL3uVJ4X9TsXy8cpZ6h0FbILRMnFsk5Vaf93/svpVrMIzYjt2Hpf62IKO5lipMuhh
KPKesXaVK+Mwu/rkP45ABgmsuu4nNKVY2VnFSymuk2zHpmeeLL0v5PGSAq+qfBEAeH3EcIU0DUjF
f/DZY0t+qDbjr8kuA9krOgPacrVu8+C08lCQKNB8H4zDq3aJkXYG2WmPI7/NCl6RpCTTp2ftZmHz
uAg74PMVp7v+9dLBbb78ogz44Ue4t7HGbnLbVvygeth05fSmOhFEQLID3JaITPTsljDVOebzOEuB
r/7Z54pRWs4eOGVJ6BTWU+2iR68Mp3+I0SipaTCSLWjdOaQxegyCEXlLXS2pP9fovqy6ohwKp4r8
SbQ+fQEXJR2Nf9iy+UBtxjz6TMTym7rgS/O9I89iDLJGFuP3z0VNGVQklauC3+Yp4gcMd0xnupu3
w27OKqWBGciRpZM6Fgrsy0mBGWFfxkKu86nJyiwgxtCocvKy5jpk7yiTaHgWOA7BrgEBHk5Nz5FL
NHVIuZN7j1eFV4JAQzvPN9dsohwgB+k6T+bz8fxTf+e8RFUnDL43dOjicvnkIvfEQzwM0+JkeNvQ
ta5xGpqaH1JD0qyIkJvzScWkIVGrzWzMMvxN+DtabQBIeE2j5DTmfMky0f63cNgmFWP6/SP8aELt
kt38bI3RslECUinVEQnYbU2DhgBl2Bp2E7uq/YG8V1sM+J132SjhghxqJ6T1iaGzRtJrzV8uZJUI
QV78YPB8Sw2WfIKPXHMOo8Wcuiq7hWP2gnMzlEhTruTfy43iOBynsEQiXlpz5MtA7mEni8hCK/ju
wEgP4JhZ2tuIpn3vt//Hes8u0qpLAT4bL03JKYgTMtYLwgU/cKQ7mMqCQ6JazkTKGN1vdrb1P6FI
jm7sXfEx1FtTOtiyoXtAyMhUgg+nYckjfJRB+Upgs+B8ajgnnZ4zZWZg9nXh4NOTgJqwSZoz3mYj
0YEoTAZoU5V/kM8lWYqbfC7ss3tgwGjQhmamh1yG2IBAFfbbm+1eaGzWKhnMkIe/ThTInM2B1954
qhG2i2RrFeFBjYacocDQaSbMgsDSx3bO0wRodxUv6ITBJWBtUXQ84psaazwKrD/48/Wk9SiEOiD1
bHUKJFcMGiEDXRQo6c2MPJQ6+AASb+mkg4r+ZMnCpAgNGWBSRtJ3JaJz3fpIua/0GcoKl2yUtmou
QnC/LB3DfIirdC5fp4Ar2PTLUq41yjWqn49wmeFrni0Fyh6cBfPplgLIt5GduGYDHqCMzXsq7jMB
J4K0ObKnDEOvNDZE0aYW1ePxQNtm2WgNAE5G1Bb4zoziBHf8WCtWuwOZD72tS7ZLwU0SRI/H1rgO
NqpZtEe8PbhFF3Mu945oZP/D65wwWYbxbCefnwh7a9hurvKB+YX4xWg7Bd+gnzSBzDNtoULsaGaC
Vl5fRhumkx+BwqRdeIvZbEBGKEAuT9fwLuBWbqk9HBZDRGqcse0evcpEJwwj3bvVq9LzXkuUYR1z
Rj+rkr1VIOBvD406n/kA7zybInjl+abePxrvEczIc+9nNyt4olcCdlOPbnfijOTwpQ8D26mPfsYD
i9O3VvkG9+NJIYW+QgS2AKJXFvHQptmkEqXIaW5nI1pxbps2GKYt7UeBwd3OGuNFPUwtXN28qSnG
EkOYzBRsWNCHT6Er1YEX4gIcUpwGuzYkItG+yZY6/dH49QZnIuVWqiFNU6F/5rfoOf81SF+rcgn4
OJPqnzNuGtn0dwUAWA17Bc6BzZ407CNs/QiW5tcgtLCQ0OQSvgN4gNMgvig9LHofpmNnlTQAvYYe
BVMg4B3jAZj23PTEw7AVpjHMYUWAHgiPZG4vsf+KQIkXE2LwvfDjNzHLr2iLhAHJXd0IiqeTGiaz
IlFj8ULdg+8d8cqV9NCVt2TdAsPgvBFn5tejC2z6o6lQx7u5LDB6LxPxb9b6Zin6lexVCtUzMvMC
0M9fb0Y1ZfMukFBjX5eV4TAtVULwlFjyiwbQ86oEjKcSLpynhYc0F7ITr9iGQjCT1gMB6gkU+r1A
lCJapEUql8wzY3VFG5X7mMFuNMnvwzIKZ+jAtrIgNE4JdpAIYTcFEkxq8akjQVVUDedUUJb8ltag
RUw79Gm+0c5hgnSPw8xrqk1M73/tMFsPDOCESMOCY62RTQvEJ3xns96vKjn1c12j9qkYq5Rv/4fC
s3wFId2akJGz81EuJW8OGSOkFdLYmhVLgXPJXM5DAWhKKcOBO1RTfb+2KF5sP16/tXkQ9StRq4VX
c+UD/PMrTDZM4G6HgrYZ/9dGhLTHxganTLx62+QqSuwA99tMdCd0GbQneOfqNHb8C123G3zS7fMj
swXKIyhroWPHZdxxm2Osyv3wAxCg8T8XirESRway9GoO+UFL477kJLZ+HmiJsXQTEelxX7WK8ze/
22UYNqX/fzMT2M824ohaQFAtjXa+mwiOm6ydU3dCehJ+W3m+D6l4bVwPwbv4xGA2wBb/aiIGuqVN
o8NK9XsDyh2RFFihGZrvJyoxBbzQH3hvISJlrfKmknMk9vQ/hBNtdWOkLTZ9WZR/pgD+eVzF6ot2
rbuarAjEDrlldyE5l8wZ1JOz3wU4S+cD6jx00DiL3FA62+fMbxmTmAZgHudnMBVHWMHx65pookQ1
PH/eetNoWd3uMDXzMzNF/eHW3LXRwmpckxQgn5C6HlfMlIBwL3tTRgY7M5iZhuvORqToXY/7rdTK
laP4Yffx9Go9q3T31S09Rn3SD1Bq9R7bd/7LqrdYezN7jyNSinl1SRoCRVbjD+5zIG0psVectW66
C6xBHdEHgSjehXEaSak2uWDskIo3YkZUpvAF7KGnm9bUP+zer9dfwk0EQAzxap6tIZ/q8ZFO+aEa
cU/zpQnghtgefYQTdEbF5hc1GtdPi9V03glTxYGdLJZd9h+ITNvKfwEJZ+T4ERkL8RVu0tL7Q5Tn
C+GGjYe5vSj0n3o4M6Q9OEYowOKC68LP39oVGI09gHYGwHQLNKoEe9Xxsu6k5+HvEp7xqQRgTkMr
KYQ1YwAyYyjezGrGnATKvcRCl8Qv6ob0wgmr3n1DSenWBBkptfiMEueDrvBzCvLooImQiLTrIZpv
BzATxNSFTzXmAfuP28U17N3EXCWA3AkWGS5IcY9blseoPjgVF8mAIukuDd5IWMehpWny50JTfJXq
PXVLsOk6aN9TmZCbQdfKJLKUq2wf6IfhH/6LZ4kzWKjp7cjIVVzBBU5YFoJTc9Xcn2cWcxdMxUDo
+atD56hnbO8Yv1qD5j1IyZQR26x1VUYCT8surMUyOeMYDf0QOmFXW8vFXM4iFJch0TQJVc+wNTQ5
r/JXQBwjLloIKh+zjBGML90YyHEi8lBIegcHQjcfdVAiSguffRzvi1GyY0tJ9+uuSPvR8MsmySw+
qJax9eOrGGMrkaMutrm4coh+90PGwrVBw7C9CJ20slujK4fzED1n2GI7HIk5C/nwustjJ3aY9FId
5RgVZsF66MOXe8JWXJYePleTKcIMkc81dgw5GpAxgrcfxQEuq4MYXQq/HU09N/Ba+knDJmloMsrq
h2ruTb/P7ZZBeNDGQR3kNYVJCkMIe8EqhFfeDarNLviUZEmbnuNyWO17WJH2175txLa6XYHVPuXl
xZyalFZzMdEmW0ehRQZxGlteMC/ISZK8lV4jiKzTJzCv1LEZjYhjHYakr21eVgBYZimn2FxeGfUU
OJyqiweGOShLgragFNrgH1BcUeT7n/gaMJ7AvFXZfj/UjGyXnadgQE3W27OfFR+yKgDXIV+Ll7Sy
JqhpUFVILNRiN9EOsszyG1lDmWIqFIswPyYAcdL0vWfGRAGdlSZkfIxioF85gpNWrZcWLABc0YLo
EpwhTas0yCgDNkyb2pKsi+AEFp9GCF8uXDJjdhZ5oLAiNM521YbRRYRN3sTJ0trJrmSQZ/w1Ng4B
ukLHpJ++YqCKWMQSeqxPS1cd3FmFzrnuQZ2zgnbiXUjMBOf3EiHMKBTeRIfRNV6MPy8Dva8CPabX
Bpi5YTB/kK4wFn7oGntO4ju0zarDapC7dkQRHvD0FNNW0uWDxf4ZC2hdlImcLC8GwD4Jqx+Ww5vQ
iWb5a5qeHv8FbwX9avXhWV7W595r70shlOyX+cBLUevhdivgviVBYx6pp/PwrtpQZE41FymWtqTU
eTITzgOySas9n4ArQT8EvyuSsZh5ZoONr2mvGkOzFqKRNxwJfLP3JGB2JDtyXl2G6LyE3wj+bkjp
bFPmVN37bVtYGhSeB4rYxt4pHWAMexghGjZOhb9wideTxEmxMPUkUOTheSqUXw1411WoB1wxVM6Y
r1/9/pw6VWXqKUKls6bf+uZw7U9Ko2OUpSFVOKTweTJuBbDHi3SYWXIPUJrSJdyLg98+QJWyyY6C
BsU6vDcAWRqIXMuTxlc1Dn4rQnP4/lLSZ4TmDjBpf1rXBAOkVmFlr9RspUv94oqTwbZhCnpQsx/e
4MUd5Ot6CgxzbhYvp9bA7mL0HFMsq22B1V0u2Onn5VyUXdY5cmY3DRBJxQPx7yLC7X+eZMsBVQ+T
aoMXwhJx3dHjfWRgPW94w/wQuufuExuG4R2T+ShvvNxUye8SVGMPZR8z94j+Dg3LyUMMtKOdhTjM
ETq8q1gT+As23MYg0Qh+YOh6lt0kuieB3VPok5s4xBHxEC7W9665X+mRU9W3qyNTbaSt18iZDeE+
Y8479RRrRzSqcJ5nDgy/wXHej126J1eo7ecwew827Xh2VtEBqcqtAfrt2Kps79NUZaaBUDJYQruG
Qh6T2u8iAgDZ2+2PBdpCybxeDQH4uWBmYuZfcSGuHmei/WJAQjKERXXxv+LYvrji4eKGsTw+Suel
0R1R0VXI7ckRq/ZBf0Kqk0+xybdpNXnM8emHK2Hxl/mZ+7W9/0wVhT4uBTgu2xVLj983x0X6vIhK
FV4wa02Xei1qBoBY//pWaVBaxvKSPjWVCp8g7okVIe6+NeEIaN4oUBq+3byQvC/cdzPDCc49y11s
wHQNPeoyEv1qHjhmH/ikDVuqH9VNg0HMA4g6lsI8Vjr/SFthTo/uHR+U5Ex8egTO+BFOgiknLJJe
RxKcVxRiZh+DnGrTxgwzfYiz2T7I2dZaFYfR0qE2YZl+McZBQ7CBwjZV0QQyvu6RI7wC4qxrl53c
DZl5xTr7/uLEgrm+a5DFAybjtbdGICi9V7tiTbRj8FXZ7eIHPzaKU7EFrPm1BQvwljKum2ziKmvp
KZV4s4YGJ+YJ4j6tt+egQ0Q+gqA43/X7wYoS17Nw9zvN3/29u3q6fB6URMTwfpI89Ju5ZB4pAJIL
4OF7j9ZglPK85CpSMNZa/C7naaqQXPEpBmCkUQ7j5sdm8jYpoBgGr56wYEgJTb3t8ISfb/8ClDM3
OBVWQZoCrmYWZRTDTTQV5Q3oPVIQ2lomOiOtBj/tHmFeqAVaqVyYTWAPMh4wUXIMf77Gxiyzwe5l
lbfHOKa3MYrd9pScNjRrE6rCddnwJLtcuMdJGT/K1s+rdBRWrlSNYWB0OPjqRBHQHkJQ7Z43Z3a2
ug7trN9rkGAz1o3F4cjkQBjxFqynXGClk5W8x1LtPyfcPmvODgwjDN6NWQbospmYR5Tk+9BpmRZt
9eLGft5A5YMAPU/O+VLRfPlVbP3qh/UI3TCpFpimtuRLFTCz4JztU8ZhIPncgrV0gK935ZKTtGnW
BaMzGRyUSEKb0Zk78tlj5/srTcV5W2JedcjsdTEt0VmEaXIdJq7zuVZK4DHLddLUE9RFoZLKUVtj
PPDWg9LQO5/j0o/Flr2+x/dFzulAoPTxfaxI7MCUmWunbSmNcsKrkqU2y0GpSwR9oqIRCH9ZUNmR
Yx19latY90ZAJbIzGHcYO4zlSHsw5h8p1z9tAwRKdGl4iQgYxgJrbhUbvWxGWpvPmNLuNr7xXEIK
oDdgIXUJ3F/lcnCdoUn5R1aLfWWH+IG9bmNCyU4s8NFEXMf/DaJIrQF6X1cz2uY50Gu65RK37mGJ
q9t17ga2OiSnxtC1w/GmnPZ8+KjOVusjUElhRM4zgCOlnC9TSzQPyGrDFi21s5+to9mTB72+meBT
YxfkNIV8M3PPmX7JaoXOT1xetjQOUFrFOU6ilBIQLq+XxjFdKvReovv0w0Pvcm7ms8xBGceKni3C
38O9cbEwE4U5FOdS6c2ZNHRhnUWeDyBraD5sm2qKEegmr9l8BzNS77gOK9upF0e5IWgNn2U42+10
2H3Vl2umQdtMTq2omNElOe+qAWcy2HwnclRlaN+9UfFk0ianhL4kXCpOLSx5VzNddArXqaEXtwDf
eDFS96XliQwseFOEt/T2C+6kk0k4Dd8JRiruo64uVsVu81mWVGC+/W+dsCAJ6Wtap+NDV2tIDFjp
ePx6sQLMnN00Do7sHJVvrWr3LdfY/Cz85lPJRJIkLUuIeQsUy0hFDlz8evNBkB1cg5U87HkIdg0S
nK7904RqhwNIHGf3vaSpMxplcRbgiBkxHAmrHJfET1LVkoQMtIT3x2HcvE/7UYIOTv7HqbS/fAAk
pbwAC272qlLmd4NPDdnxiok9c0+r++9AHaFr8Xt2BOXteGzOowE9KsGOM93RCGrdEGuarlEiMUde
l/fMPzGCiOf3gQfO6P13REGpti9BPWTxjm1FyzTooueE+WTwuYsFAhadt6+3wuzOd1P2SF6usQIC
e6C4k4hKED8VPyDgQ6F38jBiZU6vtUJQeE+OoAGEaYqYL2rds3b5F9C2AkKSUAxrRN0mCAflGHe0
KLTV02j3HfzlnhA1x4uvJuWo+yEIWwbh0/3Paxosv/OwXzExR3zF9GVE6bS9VUES67V/VyyAsQ0o
+NaL9FIhqiWGRrMEM/ZY1kTPkhKKUy6yJygtCJAUIqOtAaJi7C9uuyw7kLPEQ8oelL75GV18BTVq
b7NIx3B394DduoIuD+0ricroH9ZaPIfu07FleYodHHHhdrAl1z50ozeAj1FHvM7tRlh4MAXt54zY
PBm5h3lZvnZ4NLBl5HLFZnNViflav4/4O+cpSd/41fJWJsFOwpXLA3x6tMkuOHsf9VRV+4alRJyC
54ERBeK+DuskKZP01Z5HJbnoh//TV7yj6y0+XwQ1byR/CDAWe+yrUUGs8jzrblu0h8ufY7/82rti
p32XiCu8rAA3/5UC78i9xbrkDjcuzedCdQc8An7QA/ahIy8U2+WbhVq4LNcfpXzpHLQw1eQe5Xkc
zF1NCnNT5wsawKqj2FW1hQYDLIAwF0kzMA6Txb73HiM8AxgOlfnyliy5bNXf/pRs0tmQ/84gJ5tN
+XZKTV41n1vKOmEvtxmpL2HPFwIsozX3AznukZBdSr7BgVdlOvcJCUXvRANX91AMUKWJY8VvAUWI
LBkjygf6MsJrWRD6qqmRUAhDwUv0udi6JfCKV1BozKJYtC0h3SyFoyYgdjtbPCpyQT91/ULlRTIA
8j5eA+Z768VYa+f08dUwZCblpvUbMhtmuBfLMmsdL0yFo/W4QjV50PeJgWZU7B67yghOAm1RE3lc
lPZgZebUuzRFZxNoKgLgVDEQAPqVt564c+AlR0SXDpPOD0H8hr4ThFjKeEJ3Nv77slRJ7uHZDg1O
nYCkmAPBKcAo6MHFsbGm8PnmJKPORkgGulEF9IApU5UgB9r5smUJFTWta6Y7Vbu9RlOoOk6tG6lJ
xSHxMgPHwqcvGGN7IJvo5sqHjr0ohdI/qXf69fBdz+e7QqDTntNk+oK+2PvqexNNOw/mrkxO/qhl
KDruTzmxO5CAuvq/xESrxxbPdaXOyzmTxHaaUADGU+8IrZ4o3NW9UUvfWReX3FdDI4YKcw8SAa6k
Uf45VPHnJ4MG74xA8sEAjw4KTB7sRIwta9+C5STfWIqmZQ4mfltIzAK2H22E+3GadM/OuNw27gn4
YBT7Vlw/RpnOeL28JD42giu1dc1atOqw9XK4+XBeUWpoW7CXGF2sYwhgc8zsMtw4pdSOgEiNyMnl
+dUdqVqefW1MkMKgwk4CQBnaSJSMITwsXIC2nD8FOzfFFkF0hXwFCZrfQaWQeoTI3UbE44myhYxB
rTxBWSCZy89yRzmolBMGyrBxV2X6IqfhXQsPUg/w/5+yYgmCyizQYU2WabGXq1cdXO3tdlIt+J9O
rxtuL/eaNPWTRcDSFNekLYXMHAua1E2VtBqO/2afq56GelSNoKHqnu2jBi41vn9weSNeKFOs2QDD
5mD3PzEuXmVFqy7P7ooPFV5X4oqnMs/0pCpmiWH/ySxTxkLKzNv/fF8RiOHeW0s+lXzG1884HXer
65bmvPMIO0QegDwJamA0u1VtwoDRT6F5X9wdcfr5oWeqm8ceNmY58JNu7Bqcu558i/poHsS54d+e
6Dn+n5pD6kM1GdZlp5YadjZUU2N4dcmGmERuQkhWNnMPxgKQe4I806zOcCGmXuOTtjBcQLQyFccC
81htxrlD8+TXIYv/3KLPTgO/g69qJIcpvZOV4R5ib6X9Y7AbQVqNPuWKcYFImHZUa/QsJIC0Q2tw
cxFZUG9PBI+MXb8uC37EJzmU6+gU8tLRZpc2h4UDfO3Oj44wf8hV9nWkfDu5HUd6jCunOAuTct0S
BuNObbRewq7zxrZXR2blx/OOB7KIYfCNxPEWLgh99LlVTJr10ZBL0exfksZc23Z4MqhlTCCuLXGd
Yf4lqEuEdAEmUHeRf7EyVuypytdGGsbu3F7O0Mme/W9zMpR5EDo9ULlA6tLoRYkJg2NQ7Jh9aVlB
kRD4Yo0DWA6Lbpddq4sZRPloZbZp8ZXS86QVjto4I9jMOqVsi24Pmx9pA5yM/J5z7b5Gtn657BcJ
L0BdShDJa7DJSGdPo1f/imrxbRPTT9LjQVDI3NV802VgkeNtOnDxHpqDVqIlWx1nqbMpONXRhcOh
1m1s69ftQYoserPWOP3DwK0+ua2qyS8pfSEWTAhgX/xFDD+zzfH7fnn7DGb63+l5pSghyILDTmzw
1sg8s1nxvdJiU0DhaBsPlrCqHG/feXA7UgC7OIuf
`protect end_protected
| bsd-2-clause | c3b3bd464f4220b30fe414834c5afe67 | 0.933015 | 1.871739 | false | false | false | false |
sergeykhbr/riscv_vhdl | vhdl/rtl/misclib/dcom_uart.vhd | 1 | 11,014 | ------------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2003 - 2008, Gaisler Research
-- Copyright (C) 2008 - 2014, Aeroflex Gaisler
-- Copyright (C) 2015 - 2018, Cobham Gaisler
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-----------------------------------------------------------------------------
-- Entity: dcom_uart
-- File: dcom_uart.vhd
-- Author: Jiri Gaisler - Gaisler Research
-- Description: Asynchronous UART with baud-rate detection.
------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
library commonlib;
use commonlib.types_common.all;
--! AMBA system bus specific library.
library ambalib;
--! AXI4 configuration constants.
use ambalib.types_amba4.all;
library misclib;
use misclib.types_misc.all;
--pragma translate_off
use std.textio.all;
--pragma translate_on
entity dcom_uart is
port (
rst : in std_ulogic;
clk : in std_ulogic;
i_cfg_frame : in std_logic;
i_cfg_ovf : in std_logic;
i_cfg_break : in std_logic;
i_cfg_tcnt : in std_logic_vector(1 downto 0);
i_cfg_rxen : in std_logic;
i_cfg_brate : in std_logic_vector(17 downto 0);
i_cfg_scaler : in std_logic_vector(17 downto 0);
o_cfg_scaler : out std_logic_vector(31 downto 0);
o_cfg_rxen : out std_logic;
o_cfg_txen : out std_logic;
o_cfg_flow : out std_logic;
i_com_read : in std_ulogic;
i_com_write : in std_ulogic;
i_com_data : in std_logic_vector(7 downto 0);
o_com_dready : out std_ulogic;
o_com_tsempty : out std_ulogic;
o_com_thempty : out std_ulogic;
o_com_lock : out std_ulogic;
o_com_enable : out std_ulogic;
o_com_data : out std_logic_vector(7 downto 0);
ui : in uart_in_type;
uo : out uart_out_type
);
end;
architecture rtl of dcom_uart is
type rxfsmtype is (idle, startbit, data, stopbit);
type txfsmtype is (idle, data);
type uartregs is record
rxen : std_ulogic; -- receiver enabled
dready : std_ulogic; -- data ready
rsempty : std_ulogic; -- receiver shift register empty (internal)
tsempty : std_ulogic; -- transmitter shift register empty
thempty : std_ulogic; -- transmitter hold register empty
break : std_ulogic; -- break detected
ovf : std_ulogic; -- receiver overflow
frame : std_ulogic; -- framing error
rhold : std_logic_vector(7 downto 0);
rshift : std_logic_vector(7 downto 0);
tshift : std_logic_vector(9 downto 0);
thold : std_logic_vector(7 downto 0);
txstate : txfsmtype;
txclk : std_logic_vector(2 downto 0); -- tx clock divider
txtick : std_ulogic; -- tx clock (internal)
rxstate : rxfsmtype;
rxclk : std_logic_vector(2 downto 0); -- rx clock divider
rxdb : std_logic_vector(1 downto 0); -- rx data filtering buffer
rxtick : std_ulogic; -- rx clock (internal)
tick : std_ulogic; -- rx clock (internal)
scaler : std_logic_vector(17 downto 0);
brate : std_logic_vector(17 downto 0);
tcnt : std_logic_vector(1 downto 0); -- autobaud counter
rxf : std_logic_vector(4 downto 0); -- rx data filtering buffer
fedge : std_ulogic; -- rx falling edge
end record;
constant RESET_ALL : boolean := false;
constant RES : uartregs := (
rxen => '0', dready => '0', rsempty => '1', tsempty => '1', thempty => '1',
break => '0', ovf => '0', frame => '0', rhold => (others => '0'),
rshift => (others => '0'), tshift => (others => '1'), thold => (others => '0'),
txstate => idle, txclk => (others => '0'), txtick => '0', rxstate => idle,
rxclk => (others => '0'), rxdb => (others => '0'), rxtick => '0', tick => '0',
scaler => "111111111111111011", brate => (others => '1'), tcnt => (others => '0'),
rxf => (others => '0'), fedge => '0');
signal r, rin : uartregs;
begin
uartop : process(rst, r, ui, i_cfg_frame, i_cfg_ovf, i_cfg_break,
i_cfg_tcnt, i_cfg_rxen, i_cfg_brate, i_cfg_scaler,
i_com_read, i_com_write, i_com_data )
variable scaler : std_logic_vector(17 downto 0);
variable rxclk, txclk : std_logic_vector(2 downto 0);
variable irxd : std_ulogic;
variable v : uartregs;
begin
v := r;
v.txtick := '0'; v.rxtick := '0'; v.tick := '0';
v.rxdb(1) := r.rxdb(0);
-- scaler
if r.tcnt = "11" then scaler := r.scaler - 1;
else scaler := r.scaler + 1; end if;
if r.tcnt /= "11" then
if (r.rxdb(1) and not r.rxdb(0)) = '1' then v.fedge := '1'; end if;
if (r.fedge) = '1' then
v.scaler := scaler;
if (v.scaler(17) and not r.scaler(16)) = '1' then
v.scaler := "111111111111111011";
v.fedge := '0'; v.tcnt := "00";
end if;
end if;
if (r.rxdb(1) and r.fedge and not r.rxdb(0)) = '1' then
if (r.brate(17 downto 4)> r.scaler(17 downto 4)) then
v.brate := r.scaler; v.tcnt := "00";
end if;
v.scaler := "111111111111111011";
if (r.brate(17 downto 4) = r.scaler(17 downto 4)) then
v.tcnt := r.tcnt + 1;
if r.tcnt = "10" then
v.brate := "0000" & r.scaler(17 downto 4);
v.scaler := v.brate; v.rxen := '1';
end if;
end if;
end if;
else
if (r.break and r.rxdb(1)) = '1' then
v.scaler := "111111111111111011";
v.brate := (others => '1'); v.tcnt := "00";
v.break := '0'; v.rxen := '0';
end if;
end if;
if r.rxen = '1' then
v.scaler := scaler;
v.tick := scaler(15) and not r.scaler(15);
if v.tick = '1' then v.scaler := r.brate; end if;
end if;
-- read/write registers
if i_com_read = '1' then v.dready := '0'; end if;
-- tx clock
txclk := r.txclk + 1;
if r.tick = '1' then
v.txclk := txclk; v.txtick := r.txclk(2) and not txclk(2);
end if;
-- rx clock
rxclk := r.rxclk + 1;
if r.tick = '1' then
v.rxclk := rxclk; v.rxtick := r.rxclk(2) and not rxclk(2);
end if;
-- filter rx data
v.rxf(1 downto 0) := r.rxf(0) & ui.rd; -- meta-stability filter
if ((r.tcnt /= "11") and (r.scaler(0 downto 0) = "1")) or
((r.tcnt = "11") and (r.tick = '1'))
then v.rxf(4 downto 2) := r.rxf(3 downto 1); end if;
v.rxdb(0) := (r.rxf(4) and r.rxf(3)) or (r.rxf(4) and r.rxf(2)) or
(r.rxf(3) and r.rxf(2));
irxd := r.rxdb(0);
-- transmitter operation
case r.txstate is
when idle => -- idle and stop bit state
if (r.txtick = '1') then v.tsempty := '1'; end if;
if (r.rxen and (not r.thempty) and r.txtick) = '1' then
v.tshift := '0' & r.thold & '0'; v.txstate := data;
v.thempty := '1';
v.tsempty := '0'; v.txclk := "00" & r.tick; v.txtick := '0';
end if;
when data => -- transmit data frame
if r.txtick = '1' then
v.tshift := '1' & r.tshift(9 downto 1);
if r.tshift(9 downto 1) = "111111110" then
v.tshift(0) := '1'; v.txstate := idle;
end if;
end if;
end case;
-- writing of tx data register must be done after tx fsm to get correct
-- operation of thempty flag
if i_com_write = '1' and r.thempty = '1' then
v.thold := i_com_data(7 downto 0); v.thempty := '0';
end if;
-- receiver operation
case r.rxstate is
when idle => -- wait for start bit
if ((not r.rsempty) and not r.dready) = '1' then
v.rhold := r.rshift; v.rsempty := '1'; v.dready := '1';
end if;
if (r.rxen and r.rxdb(1) and (not irxd)) = '1' then
v.rxstate := startbit; v.rshift := (others => '1'); v.rxclk := "100";
if v.rsempty = '0' then v.ovf := '1'; end if;
v.rsempty := '0'; v.rxtick := '0';
end if;
when startbit => -- check validity of start bit
if r.rxtick = '1' then
if irxd = '0' then
v.rshift := irxd & r.rshift(7 downto 1); v.rxstate := data;
else
v.rxstate := idle;
end if;
end if;
when data => -- receive data frame
if r.rxtick = '1' then
v.rshift := irxd & r.rshift(7 downto 1);
if r.rshift(0) = '0' then
v.rxstate := stopbit;
end if;
end if;
when stopbit => -- receive stop bit
if r.rxtick = '1' then
if irxd = '1' then
v.rsempty := '0';
if v.dready = '0' then
v.rhold := r.rshift; v.rsempty := '1'; v.dready := '1';
end if;
else
if r.rshift = "00000000" then
v.break := '1'; -- break
else
v.frame := '1'; -- framing error
end if;
v.rsempty := '1';
end if;
v.rxstate := idle;
end if;
when others =>
v.rxstate := idle;
end case;
-- reset operation
if not RESET_ALL and rst = '0' then
v.frame := i_cfg_frame;
v.rsempty := RES.rsempty;
v.ovf := i_cfg_ovf;
v.break := i_cfg_break; v.thempty := RES.thempty;
v.tsempty := RES.tsempty; v.dready := RES.dready; v.fedge := RES.fedge;
v.txstate := RES.txstate; v.rxstate := RES.rxstate; v.tshift(0) := RES.tshift(0);
v.scaler := i_cfg_scaler;
v.brate := i_cfg_brate;
v.rxen := i_cfg_rxen;
v.tcnt := i_cfg_tcnt;
v.txclk := RES.txclk; v.rxclk := RES.rxclk;
end if;
-- update registers
rin <= v;
-- drive outputs
uo.rts <= '1';
uo.td <= r.tshift(0);
o_cfg_scaler(31 downto 18) <= (others => '0');
o_cfg_scaler(17 downto 0) <= r.brate;
o_cfg_rxen <= r.tcnt(1) and r.tcnt(0);
o_cfg_txen <= '1';
o_cfg_flow <= '0';
o_com_dready <= r.dready;
o_com_tsempty <= r.tsempty;
o_com_thempty <= r.thempty;
o_com_lock <= r.tcnt(1) and r.tcnt(0);
o_com_enable <= r.rxen;
o_com_data <= r.rhold;
end process;
regs : process(clk)
begin
if rising_edge(clk) then
r <= rin;
if RESET_ALL and rst = '0' then
r <= RES;
-- Sync. registers not reset
r.rxf <= rin.rxf;
end if;
end if;
end process;
end;
| apache-2.0 | 5bcad472f1c5dd29e506824ab3d0740d | 0.540857 | 3.235605 | false | false | false | false |
codepainters/vhdl-utils | i2c_slave.vhd | 1 | 11,677 | ----------------------------------------------------------------------------------
-- Copyright (c) 2015, Przemyslaw Wegrzyn <[email protected]>
-- This file is distributed under the Modified BSD License.
--
-- This module implements a simple I2C bus slave interface.
----------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
entity i2c_slave is
generic (
-- address on the I2C bus
address: std_logic_vector(6 downto 0)
);
port (
-- should be ~10 times the I2C bitrate or more, all activity is performed
-- on the rising edge od this clock signal
clk : in std_logic;
-- I2C bidirectional pins (should be connected directly to FPGA pins,
-- allowing fot the synthesis tool to infer proper 3-state buffers)
scl : inout std_logic;
sda : inout std_logic;
-- user interface below. Note rd/wr naming is from the master perspective,
-- so wr_ is for master->slave writes, and rd_ is for slave->master reads.
-- The wr_data_valid goes high each time a new byte is received (available
-- on wr_data). It is held high until receiving side acknowledges by putting
-- wr_data_ack high for one clock cycle.
wr_data : out std_logic_vector (7 downto 0);
wr_data_valid : out std_logic;
wr_data_ack : in std_logic;
-- The rd_data_req goes high whenever there's a byte about to be transmitted
-- to the master. It stays high until user puts the data on rd_data and sets
-- rd_data_valid high for one clock cycle.
rd_data : in std_logic_vector (7 downto 0);
rd_data_req : out std_logic;
rd_data_valid : in std_logic
);
end i2c_slave;
architecture behavioral of i2c_slave is
signal scl_in : std_logic;
signal scl_pull : std_logic := '0';
signal sda_in : std_logic;
signal sda_pull : std_logic := '0';
-- deglitcher shift registers
signal scl_sreg : std_logic_vector(2 downto 0) := (others => '1');
signal sda_sreg : std_logic_vector(2 downto 0) := (others => '1');
-- reclocked and deglitched SCL/SDA inputs
signal scl_in_clean : std_logic := '1';
signal sda_in_clean : std_logic := '1';
-- previous states
signal scl_in_prev : std_logic;
signal sda_in_prev : std_logic;
-- helper signals - start/stop/edge conditions
signal start_condition : boolean;
signal stop_condition : boolean;
signal rising_clk_edge : boolean;
signal falling_clk_edge : boolean;
-- FSM states
type fsm_state_t is (s_idle, s_addr, s_addr_ack,
s_read_ws, s_read, s_read_ack,
s_write, s_write_ws, s_write_ack);
signal fsm_state : fsm_state_t := s_idle;
-- input shift register
signal rx_sreg : std_logic_vector(7 downto 0);
-- TODO: convert to SREG once we have FSM fully working
-- count of rx/tx bits
signal bit_counter : integer;
-- TODO: check if it is better to latch SDA on raising or falling SCL edge
begin
-- concurrent statements for the bidirectional pins
scl_in <= scl;
scl <= '0' when scl_pull = '1' else 'Z';
sda_in <= sda;
sda <= '0' when sda_pull = '1' else 'Z';
-- deglitching / reclocking (because I2C inputs are not aligned to CLK)
i2c_deglitch: process(clk) is
begin
if rising_edge(clk) then
-- shift SCL/SDA into MSB of the shift registers
scl_sreg <= to_X01(scl_in) & scl_sreg(scl_sreg'high downto 1);
sda_sreg <= to_X01(sda_in) & sda_sreg(sda_sreg'high downto 1);
if scl_sreg = (scl_sreg'range => '1') then
scl_in_clean <= '1';
elsif scl_sreg = (scl_sreg'range => '0') then
scl_in_clean <= '0';
end if;
if sda_sreg = (sda_sreg'range => '1') then
sda_in_clean <= '1';
elsif sda_sreg = (sda_sreg'range => '0') then
sda_in_clean <= '0';
end if;
scl_in_prev <= scl_in_clean;
sda_in_prev <= sda_in_clean;
end if;
end process;
-- start/stop conditions
start_condition <= scl_in_prev = '1' and scl_in_clean = '1' and
sda_in_prev = '1' and sda_in_clean = '0';
stop_condition <= scl_in_prev = '1' and scl_in_clean = '1' and
sda_in_prev = '0' and sda_in_clean = '1';
rising_clk_edge <= scl_in_prev = '0' and scl_in_clean = '1';
falling_clk_edge <= scl_in_prev = '1' and scl_in_clean = '0';
-- main I2C slave FSM
i2c_fsm: process(clk) is
begin
if rising_edge(clk) then
case fsm_state is
when s_idle =>
-- detect start condition
if start_condition then
rx_sreg <= (others => '0');
bit_counter <= 8;
fsm_state <= s_addr;
end if;
when s_addr =>
if stop_condition then
-- stop condition during the address phase - go back to idle
fsm_state <= s_idle;
elsif start_condition then
-- start condition means sync error, treat it as a (re)start
-- of a new transaction
rx_sreg <= (others => '0');
bit_counter <= 8;
fsm_state <= s_addr;
elsif rising_clk_edge then
-- shift in next bit on each rising SCL edge
rx_sreg <= rx_sreg(6 downto 0) & sda_in_clean;
bit_counter <= bit_counter - 1;
elsif falling_clk_edge then
-- note: it's a signal, so we "see" previous state
-- if all 8 bits are clocked in, is it addressed to us?
if bit_counter = 0 then
if rx_sreg(7 downto 1) = address then
fsm_state <= s_addr_ack;
else
fsm_state <= s_idle;
end if;
end if;
end if;
when s_addr_ack =>
-- note: sda_pull is set high in this state by concurrent statement
-- we only wait for the clock pulse
if falling_clk_edge then
if rx_sreg(0) = '1' then
fsm_state <= s_read_ws;
scl_pull <= '1';
rd_data_req <= '1';
else
fsm_state <= s_write;
bit_counter <= 8;
end if;
rx_sreg <= (0 => '1', others => '0');
end if;
-- read states
when s_read_ws =>
-- in this state we pull SCL down and wait for the user to provide
-- a byte to send, then we go to s_read. Note: because we pull SCL
-- down, start/stop conditions can't occur.
if rd_data_valid = '1' then
-- latch the data
rd_data_req <= '0';
rx_sreg <= rd_data;
fsm_state <= s_read;
scl_pull <= '0';
bit_counter <= 8;
end if;
when s_read =>
-- there's a byte to send to master,
if stop_condition then
fsm_state <= s_idle;
elsif start_condition then
-- start condition means sync error, treat it as a (re)start
-- of a new transaction
rx_sreg <= (others => '0');
bit_counter <= 8;
fsm_state <= s_addr;
elsif falling_clk_edge then
-- was it the last bit?
if bit_counter = 0 then
-- yes, go wait for master's ACK
fsm_state <= s_read_ack;
else
-- nope, continue
bit_counter <= bit_counter - 1;
rx_sreg <= rx_sreg(6 downto 0) & '0';
end if;
end if;
when s_read_ack =>
-- all bits shifted out, here we wait for falling edge to
-- check if master ACKs the byte
if stop_condition then
fsm_state <= s_idle;
elsif start_condition then
-- start condition means sync error, treat it as a (re)start
-- of a new transaction
rx_sreg <= (others => '0');
bit_counter <= 8;
fsm_state <= s_addr;
elsif falling_clk_edge then
if sda_in_clean = '1' then
-- byte acked, fetch the next one
fsm_state <= s_read_ws;
scl_pull <= '1';
rd_data_req <= '1';
else
-- shortcut - go idle before the stop condition
fsm_state <= s_idle;
end if;
end if;
-- write states
when s_write =>
-- TODO: star/stop conditions
if falling_clk_edge then
-- last bit ?
if bit_counter = 0 then
-- yes, push it out
fsm_state <= s_write_ws;
scl_pull <= '1';
wr_data_valid <= '1';
else
-- nope, continue
bit_counter <= bit_counter - 1;
rx_sreg <= rx_sreg(6 downto 0) & sda_in_clean;
end if;
end if;
when s_write_ws =>
-- waiting for user to pick the byte received
if wr_data_ack = '1' then
scl_pull <= '0';
wr_data_valid <= '0';
fsm_state <= s_write_ack;
end if;
when s_write_ack =>
-- this simple implementation always ACKs writes (SDA is always high here)
if falling_clk_edge then
-- once ACK'ed, wait for next byte (or stop condition)
fsm_state <= s_write;
end if;
end case;
end if;
end process;
-- SDA output is mux'ed based on fsm_state
sda_pull <= '1' when fsm_state = s_addr_ack
else not rx_sreg(7) when fsm_state = s_read
else '0';
end behavioral;
| bsd-2-clause | 58da6e471d1977e42158d0c425b297fd | 0.435471 | 4.631892 | false | false | false | false |
szanni/aeshw | zybo-base/zybo_bsd/zybo_bsd.srcs/sources_1/bd/system/ip/system_auto_pc_5/fifo_generator_v11_0/ramfifo/wr_dc_as.vhd | 19 | 10,866 | `protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
SQUyeNX8cyskpzvvW2T3ssUGj6xZX5vHX5fJU9Ms0M+rWpNjMO6za6Zgr1K2FMwHi+buwP0Gw29j
IKEYpdzZOw==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
hoBaDPgZL0nmY18FE8yzpnxIEfx7SKisNM4FVo3Ao91EGtVywU0Wb7yA1enrW6Xd+oLWYcrMdoDX
JTxy8JdlM3o+jyjU7UKGIkB+vX642Q6fBAuo3SZKPKM/RE7lQknQIOi2Y5V60nbw/AM6mvYDKdTS
wiPRLcQIZpvU4dn9GkQ=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2013_09", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
o9OFQKQt0GaB68TjFqZyGwbFj1TRgCs2FzlOtaWTgxoDRMFT9IEssmRwHo9pwJ5Tn3OigUlzbBbd
XTy7vthduMEKESguEgGeFDAlZPJdvm6/cpwtG3omF99Y9vBxA2K/3YI0+jDh2eyUvsHMcDbQ/C2p
zFKW1hcipARgm3A9Ys4mkgzXMVKYnvnQiSsmezjrXPsPy8jbFYPXFd6vFSGi/ZwrKMMLLNZt/Boe
k/Pl01HBEt/KNoY9VFx6N+e2ufES+vAz0H+DJSGPch6YdjmhkZUj2llujVX2dT6EzXeB2X9+1Sar
qYaNJFQdqXN7nDqoQMCiwqUZBJaHNrPJdzAMcw==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
gMFEdGC+ckR/NJmX/aszkYoB651qUCnYvXxq63Zrpc98jREIyboMJaogrhiyZ1kntx31alD51ug4
ZAed1vud+wZB4IN9oJ1STjbhb+Zj5u4I029j7Gy2lllPl+1O8Em+DnBFlaNak9VTW5oxld5AFJs/
EstFEKIMT8MSbegVIEQ=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
I2MWBDnGcReW7SMjRXdvt63Rjoo/gu+NQcstRp+eRPxV1cdY3BaChhCXefqNXs4HwrSwjy6eXoRH
K9pkdKW/MmeSQuCCGBXm3SZnri7VuXOoNwZoR7yYcuzRHYCe4OVzWrXYc7CJVdShI1TzYNVzTc69
N+748OjVGLm080Ri6+7tnRVNASpwPZfo8iBz5hClukZRieQCUQgdHIAZx2RjUyVQaoW7cJ/urtOZ
zr2GA2iDsweYcuo/xtEmVehzY9Jjyk+XsH/W+/8SFJEIN/wAiWoW84/gDLItkUU21xaixyhQCl/Y
sHoICo/iHc8aTOV1SPHo9yWYmV0UZ8KJqveuUA==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 6304)
`protect data_block
MhKO9nTBY4DQyLfiyh6Gmjp2yFuNmVcmfaXSQPzCk9lijjRXHQs6HlzgZ5BDg06NOGJvZ+mzzAVF
hgTkDElhVAu/C/rAZxbbZPt9AH5SojVLtRYwzC7VafKQXQAauH8ofBj6yVshazziBmKp/O7vA1Ic
a/mBjvvWX6KFrH5y9DGTrEFhQh9rlJDkYc1Xgz+R5zLhnlLNbQN73W/0F84w86qjTis/ju81YA7T
0sdCGBabX+B4Gsk8JPBw2k8VXKPJo/0PKK01TKvf1XHBg8ZT3yhGhckfcdyWkJC8s+0hKxIIL2Av
OgY0T0tZ3e8I4i1uc7XZSPksSvGvNrlErDmZhfcCT0jn4NBUhsoLNe1TZp4pcPdGC8GPL6YxGB1P
gwdck2SMqrDG0DBt8ElC9nwav4cA8kqz85Et82hNV7tT824yE5wdyZC6Ujx9LT+/qDVi5lx9sb1j
On8C0nMDoUEJj9WI6iBAE0iVkDxHpzoU0duZkNBPyp2MWreNuhScO8bJxutSlHLDGLSaFOkOB5mv
F8IaKuIN6BSVGa75eZ4F/Q4yMCsx+eAiv/AzDIfHuM6wo2/hTZElklnyaBd3urtjzeuYDFX5L5Vt
CvKZ14/rHt55lWEVIRjNJTylE3AMhgF7+d8vjg0B3RRG87/sRbr+nDipDq9qnBZUtU5DCmzlSMqY
m/Oj8lma9JfQr2wpnOz85J+pe+Fy1OzAOMnEI6KM0wF4V6kcwLG+0Q3nbkdxkZpcwFEjICiHC+jg
PBqGMMlAbJOkGAn/gUeFiO4ssLFc+XCfi4hJIJ6o09y4pWxcaPNO34BRRExcn6RJHhnxSEwM9gfn
HkRu/Ae3EtGJHZuLPyvuucxTD7Jt29OH5B4WETCBkxO+l2dY1Lu6EjZwNrtgKaX8jilcZUhg6FX/
BuMOiGJFqUhIhS+Tpfe81s+v7jH0S4zimmpIHLpH7K7KWRarU8vvrLN86nNEJKL0Ou9ISGlUEwKM
SknniXMv2xkPKPzopjUaNi4pLG1zGtXR4RmOlmlbWcEmlFDMMoi+sHaloE4ogwkRmhjyA7tvOzqj
bzAfHfDlqqyBaBTC/RrZYGKov5iG64MDMsinLZsOWooLo9DugvgmK92QgFNo/ZCVM0htqmbxN358
ox3p3USFjc1qmVIoHgr5BSD/BHq84cPE7Sr6AeoOi5tohVgUUNeqyZvynr8P39wj1NaNfRtkPrGp
fdlF23AyuB66F8cxwTOFipbpwFHxwl/82//fQZOCzobg/ByfshtZGeh6+44g5Ty2M1Ia22KJOh1D
U1yjZLNf3TBNABBMONof1Uvt3pKYeBIa9qYj9EdVPkITyNiUKKNryMGN7OH5McmYCVplVg4qWXuv
AVjVjPcYsMLW2udoqq2D8Au0GhE18n9QGK7kCpQREgSAhTjabKLHSAdS+wllSZA2asShZ9KcPI1Z
pwXoDkRc6Gdj/JK7q3awgf4EIh28wrlXBlKdxvWNRc6I/rbAIomJQ29XjeQWzr/rkH6D4t8oojsT
et+KyGTedu4XbMhye73zG5kt0eyB0HcuHWlesJL2xnvjm3dd9Xp6GH7xtc7xXY/x75ZEn/otYgCF
jU5OXU5ExXvgCqRv9tlNW8L85wurDNuDN0ysF/EOb8jqjz8fHVg2OYrhCJlIqB3/yTXRLk4CyLW+
0O7qsrh+bX+V2pdIxAWHKUqWYxrt/9pix18AhpKLhqA5vE6SbR/vYQ/crziG+8fAb4RFbGNyFCcR
q5F8XqWoXQxRTDRqIlS3MaG+U0WxoVwMi2cq/voVAv0oPceM78nO786aZ549WO73A9QFL9PQlZ99
BPdlIXd+HUYegCqsJDwEH0M9yN/cs6lwsWkzPFedBo+f4EcodW0nCVJLToPXFWwIXJhcYax8BGcG
/7wIym/TRKegUB8Y1dtYypuphAqKQDDNJleDygrImSmE46ByXfukbsrE8yY2eW9NJKwD6IxcBsPP
U0UXWKgJtnGiDzdjDGmDectxA1yPXYMCm30lgodM1btHig31OpG4VAj0ZSwwz6sCyRZuuE/248M1
oSbA7JvRnnh1jaNY7WVq4gJu4VagdFMb07veCfaehKKnnnRDDlFf02p8a1hRAQoGZ60mfNofEZK7
6WU3bfeX4bMOxQWdzaeRhgAYpo+UP9ZVSX+3dk3WYeZgtLKO1BxJbYrpDvjyulDJg5tKheHqpEye
IvS4SsWZ6uQjt3QT7jOtE4tTHV7LPlQNQ01hXkGRIFViBtM+4rdjpP9puVkHNfA+OGSg4DgrJXwg
a2zsRENeFJRqNP7a01/fUh1hJG6oDuvbMgbRBzndu+4YO/njLLOPV9DP8GmWeu4Xn1nJa0F6GmK5
1sO3ksfhjJayKJGT1kxCvvz2CRieD1zHg9FT0y2qQycAvAfe8zNREgIVsNafoe7iw+wil8FLXipj
G+F4pfhSzuB2V/DyweY619lOTrJJK+xK4jBM+LgfSl3cjhp5ZUpQM8i8AGxA9D0kAoLzHpnQj5pE
WpC29YeRywNAja2HkkxFv3iJ0Y1El+PQ2lT/MRI5z98IkIjJLr4AGQ1CwdGLBNjImsnP2LVtYnvm
1q6nV3rGS27ZiKQuIU0t621b5tMX3AQfgVuAuAZvVLDmNhLImLRPaCMeEG1jpW+KOGGFgIkqdwvw
Q3yY5jgvDlhrfvrqxfk7nDTwBR83WbucIJMVduYUh6EMtNeSXmaZ5mf+786XU2ztm9YmtFzJvY/9
57Q4G2kLLllH9qvsJln5LCEBHg63BwetlijIVjSbmu4Lx4agzwsD4VGIp3eK9zd4weglFUJfTFrB
7jryyD+0NW7l40lygI1OznpizZtR4/uDtZobh7lURc/CjEN0kKMuB4wuX5p4+4i5t1c10dC/9Bri
PxCMhHwlcWGVgwmrzSAkQkYq+fZgG/GT/XSUKU1n+n7KPBpfuEDQv6cJkhiypsZiOmSqNLu9G23N
d30INtUj2OjehBJpszKQMjdrmjx/XBt8YssSESmlIYoxpj4TTGts+pYdLiexuAGHdhdZfnC4AKJ2
1yTMagxyJj2rvC/G/cm6Dk/RQanKQiuXCyKzDKSFZxKIQz+//fJrRakQXBLBaSqSIQHnrbkIBww5
6Ggp/cHd2fgqgBJdFSYhwRyPwxgOmdfLdyVefvTmo5KhAQBawJ03ETLO1CxiY9vCFQXFS8JLeiv5
nZu9yrgq5gK6IsdyTHkrNd5RSP3Ii2lgPdjRbSkuR9CYPXI7LOb20YxLr+eypHB7KrxwVn/XEOUS
WDeR9KhCa2uaHinu7BHlNWAEEIluhPlDEqAT/fdMkFpdhl1nGVN1X8cYqKF2UJ7mAsZU6qDJXAeH
xbJL9poPrgrR7Z5sPLmT4MM8xrNNVjjP1gqZk5xG2aurXEshvDPL4Z68thWYVOwcXf1CzgT2tnjF
lnpsPEiHtGsNlo+NWYLSaWMxPcCGZKmU/EyPUq/0Fi1My7BOQLe6iOsrU758lA6YM29FTg4XvVDG
0sUXU0/2IdiDbO6sDLJmHeCZB/cUbGUZIS4GPbtSBC+kmKblhgbpwuhpoNnKUIK9WDFtMCIqPWoH
j6wzEVn7GC5CskhkGj0nhS4xQfK7KL9IB/8UOeDHSUtdXrc68zAuc4rbzrGoI+9w+a+wKjKmi+dw
ETe5ZElrSe7w69JtH0lcv4V7zEF5JFtwAjNzP6DlUQ4qS/Ibt5ouPTem9q7FJg4YNyDQm8GdkOWG
ikNUrSweMAJqEVeXqdJXMycSOifCaDEoRxtAFTCnQX6AEnbYTsnO+XnzMfaq2f+I/hMiHT+c7v1z
rJYEtC35PypLWBPkzhc8xUHFERbp6s7O7DJ2AdPrZR6dVRAXWtyaeoG7PdWL/EdPMlhirlBH/fLh
7VPlDmhY8qs1EhJ+eOiAuvqlQbbRJ0hKeaQqIm5K71+OoQLM4doNAgOyFnWDe5H2FtPfluk6hFYS
/ylYOvO8OaNfn8P1idBdU2qsy1sZN56DzKDqNPMuq2BhgkN+a8hkl9tAo7RQuMJqrhdePWoJ35Gp
KgfmekpQVekaJ5AZwMmnWbhX7+wSv+kaKT4Iihn7HVrXPIke1XLRs2VlzxqThntvqUJm64KLRBqO
1xLU1F2ycTuj3MqUe/FjFshxiFFEJYfyrgsjLovF1yxY5sK8ZSB56+JnKAKzjn+aOZNOZObBYUOD
ca+3b/n/ckZuvUYmAtwzMvjZuRzULdC01P8DQAB0oYgsA3C/QsZlwNxoJz/6vGcVxnduuVijI8Az
Kr+ZA0mV9gwDzbRE6rkWVkxY8Z32zXU+zfBk+g6UAsiDmdbVSAal2EC4wv2yZhf58y95QO92LBUj
9gmI3GjaoT7+yd3nzmPqSdq476vCLthO18OhzQURBDTk3ZvX3MLST+3KSZ69PBQ8ow/nIWWNeSVt
LV5hB8fQKQuWdCtoGDSZnf/2OH9f4Fuz0Fy632xAd0uuBBnGG0I/8ZOEXmMUxb+hSclBr1Jk+GSm
yNTTe3oZil1/Rdqc6YDYlKmQLVqN4+kRs0aR4jrAjxV9WPwppQn2zHO89GpbK8Sjq3YzaR4uXJo6
CBvrzC+9fqnGQV+DQgIULegBv/mi5GlEN1H8wZ1QIK7hwmd8bdVszqr31mGI4qvpJOc2mBRACeaJ
+Ogcd3tjqpfTDVkGtc6s7mr2k0xFXYHnUUdBWhDC1sbXu5zMleqyiFkFOwBsNanUln8HOflGjEtX
r7POyF42G0T77StbSR9b9MNcIgjGzIogzl4CBFEEhhvjkzmSj58c42ctnJNYBMY+Ah8PQAtV4A/g
2gXWCoUpVzuVO+gC9mXz5ZgUU8k1uDYFOsl6XdoUNng25eI5WJT/V17mA19Xj87gRAQWD1+haGGG
gGIvU77oBjW1m29iC1thwsMDTC4tot6HqiiGnchiJHyfpxMd8DSU+DvwH0Ni/nRD32CRKEeRyP5R
0IJDk8EJWcrDKfhiPG/3wlUhqx37jiogXlB8zMO1YwMKetwxtIPU0T9VAGfWDITPXE4b7XuQtp2p
iUBP4LAE/Fu/DzEtQbEVTlJg00fwcVYh2SCiPxfZDgoLex2Ez1694/yPNJzemzmf//bW2wsC3fVq
ocZolbPN8OloR5RBsdzIhgBP58tLlLQ2onMRJ+ZzpgBuiTC1S6EETFmQsrgo7Huzt653udK5rxnB
C5uNqiIY0qAl9dl4eFRMTZnD5azP4w/3YA/Dv0URBk/H6AitY2GdvY+qg24xtYKmJga9VMgTjFb+
BaF5lkWrm77OT/W/mlbdfPIwx/m9bqlhlUBmb1UqbInCzvXmC1UQ4OTsDmoU1g1YxDlgymGSqZT5
bGe8y/Cq0Vtf/4Nvgm/mzi2yf2TyB6vsppfPvF12exP0zPn2fSwk/y0YEaNlsXUDv1Y48cSTsdya
m9coTKS162fpWvUQ3QWOxx8b/z48736QUrUXWIkGAuDNqmuNuUx0ezZr8Vp3vAGH2eY85oM59URg
3EbVYk9N6/f6Jm6LLhkBNjWDHnt6qF6A7aP44L9vNioOHIE3/gV3CCyHEoFJTTO2TaG5wWctua1P
9i3IuEzAFO/x41yZRxSjOUXMdhTragGncfxW9tMJW+krLUBdP3U0zFrWq27XEYrVutrKTD9Of7Hc
Rs/UvdTlhuLjNUHIktVUWL1GJ2dS+awT81i30HGPr28fNsE/A02cojLaAEqhKgCA2VA9zzurNm3I
wQG32R8WXLQGYu6OrGkPSdp9ILiTjR7+GLmEG2qXClehdqbgUCFc6qz0NTUoH0n/0yc5Qm10kA2N
1+fkowKxowEQD6T/nFEK/IQNxlakh3K4QmKCTrwjkH06T4H8C6Y+F+RNiXqgWdiu9qx+LdmiMqVM
50CwWkNCRUaG6RSwM1PdRHidPGZgfgWRCoETZPFdsnyb0TO5A6vEa/qHrcIX1YrGo8aJkXCPx7YW
1lkemfsNkpc1Nfb1bfDw/O20cLeV94SncgRzMLJpLuGvMF2aGzBm2fHpUrAkahBkvOu2rSL07cze
URFFhO+0j4KQiSbqSd6bDdd/VxhCEZCOHFrmqu9rA8aA3IXpXiQflxV2s4+lf/4R9W2EtwIg7BKx
Z1onaael/I84hyOUg7jFT6Ic8FaoTazf7lDDpJUq0lkrHR8MtK2eIqawZXpjZXP4IRiRQWUIwU3o
ptsctoYQhAcijoneI0qLfot+Gq1btl77Dh6w0eiEyTxCTHxVSM/b5UFR2NvAIZkpA8auSlMGmZ8f
7yG5uiIL4WceQu03bld6GxHBGS/SWp8Tkzj6nGfBhEAQzbAw6Y6i2U9lejZfv0cDKnlgw/YLNIVP
DsRrdC3bkwbyAzuocS5zesB/L+tvMKu+yrl62lfPlzEJxvyQkl7D51XDTZL4uM1ZGj2Z7fdd4BbI
fz/rpnuA5m4zwjAeBnRaSShrwj6dLdLGFGUMXtLQmu3Z4C//L0nzj5wQ9qSx5qKqYIUYjgjiTnJb
2qZayywjbl6Ivknlnx40I2ZZMOFavWx0Kj3PzkBI3SfC7rz5tHDQ9WNJz3rZVNDDFIhQ458+H043
FaP56dFdq21O78JQch8VPr3A4bCKhdWIGQx/8QmsWfo7oP8lx05Uqn+r8HHfecUOgDk/4QLPLB/O
3/n2dqs+gvSgxMI1+/H09AtwEx/M3bV/AKPggKw87t9ItWmCc35GBNkXqbtaC8NiVFo0tQmG8ROZ
EkVZKIAWfUB/pZFPyrlffPQR8Uj2W6APtdAOa5iy+r+01YsnYxw66ccMsXqo6C6tCBzWdKFnj9fp
0HVwCPVTLoZY6m+UVw76+aQdZW0DfvfuP4DBbwGq6Eu4IQcHq8/NTztYQ4GvWrCuHrTbSWoUZQDI
yuqHRdm6sPUiEXgyQeln+PlMUQ0/yPjch1LhkWl63nDjQdQKY+0+vZI7CM+py7APMTRHDrQWiT6E
UeQ6WFmMGUxM6Frp7KDWfNUsClaOj/bZR0sRgpP8huDyqh8WjIwqR5JvapUfiVR9OmbBhIw3igT7
fLQGtoTkMxtApgR8jv4ovcblerzIBiL6ciDXCG5S8IhAVvu1vlq0QK2W473DjWbVGbR/g1JV+qRL
8NvWZ/0yuAzF6QMHGfYABQyyTRr4DYc7BqRuQAQR7L8k20NV3RKPIQAorBVySc0zIs8wxAscBoQU
5SgjnT0VpJVVfUxXvfQ/nrBLn7VW8/7vqx2w2v3jVlCZqd515lzoivPS/11kVMBvCDj1XeVWAQvY
V9fl1r06pbotWyS+NGMPPprihf10cYii6kWnpLqpMrf65zYyXd8n33lArPKuny3A92Ymz7NiN2dO
AAe/x3uc1tAqJUZ31zWNc2O75HBvwLOx3rIDLZJtQowM4gZlzFIK6alEbGqO30wG0eiKTemy6VLk
n477b4LX34STK2QFL9nxp80hMjsEWAVD4x04298Giq/E0q7ALgV6lln/FIgUsTNdtnFjcuAXi0H7
01j5qnIesoXY2z7GhhDvQZgNjcS1m01NF2LCuP0+uf4rjdo1JSNcNRzP7VGWVFJuSfQ8SwxQJA/7
VyJprwM0FdGbiF/BAeqCLq4j1zjZNLLPgc5jMsK1+Se6MfaC4+CtwlxxKMr+np2aTwKCSk3jrNAQ
PQGyGsXeti5p1P9iIZR6ST1E7cBWdQYxgaTVv9a34EAirAVMJa5XP4uOOUUqguAnI9rNrSkl1ysE
lCLtXAckkxrv2ixe2/koAqwNDz+LkvMyTNXK89xNpWug/7sFEZcoqkSJqLJZe9Z9M7HcWF9hjmxX
qp6gnU5gNNQW7la0YsaBm21Be7vUYAn63tXHuZj5aeSAkGsGo5qa7hACcmrNUR7q6yeTx5oA/SbG
6rQ3/HR577GmxMiHAoK5OR43u+aPNwFR3tU7yW6GCuCKqLGWMeguCXhjm2yhOa7B3fIxQ5qO1TKZ
QR1clor4+Tw7XB3t1/X2EioJhC0Ks8s3ki5kQ6JGulWAVeZLPXdxSlqj4rkMY2c3wlqCK6Z5V5Ub
Y5QI4Tqpq/P//+zWC8ivpWK3WkvHX0/6b98Za2oiMV28N0Fqy+Ae/TjJDWMOZiPynsSBFBu7htfD
twMAGWHWQRNiut8Ina9hPe4tJgPRIaYIsq42Opz/+IARkzluvKvb61ybf1sUuN89YHUp5X9Atnot
pg0OlAgBSIGTmauzjIgq1U+yC1LF90ZQyXSAyjoBjInbB7IXuTZ+eeo6Ru0OE/dOiaGVujK7Dqu1
kI2OeWZvysGikwXHZsv0Qs6wYAzf6SKIN03xuDe2MnlhiVxoRRz+gRAhytPemUJXTt+YA5AToPNI
kGI7rIJQknB/BLtloKV7RIVpU3fyn0P0mtR2cOGHngyWKB0D//hw2S09OYaJM8qeqon7Fsjm7iOK
5kL5aCDynCjIiALGJauPDCTwWZZnl/mUpsCJa9s8/NIm3A==
`protect end_protected
| bsd-2-clause | cc641dd5a9c840c576ab9651dbb9970f | 0.924995 | 1.893691 | false | false | false | false |
sergeykhbr/riscv_vhdl | vhdl/rtl/techmap/mem/romprn_inferred.vhd | 3 | 369,802 | ----------------------------------------------------------------------------
--! @file
--! @copyright Copyright 2015 GNSS Sensor Ltd. All right reserved.
--! @author Sergey Khabarov
--! @brief Galileo Reference E1 codes.
--! @details This file contains Galileo E1 codes. (total=32)
--! E1c - inav codes [0..total/2-1]
--! E1b - pilot codes [total/2..total-1]
------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
library commonlib;
use commonlib.types_common.all;
entity RomPrn_inferred is
port (
clk : in std_ulogic;
inAdr : in std_logic_vector(12 downto 0);
outData : out std_logic_vector(31 downto 0)
);
end;
architecture rtl of RomPrn_inferred is
signal romdata : std_logic_vector(31 downto 0);
signal addr : std_logic_vector(12 downto 0);
begin
outData <= romdata;
reg : process (clk) begin
if rising_edge(clk) then addr <= inAdr; end if;
end process;
comb : process (addr)
begin
case conv_integer(addr) is
when 16#0000# => romdata <= X"F5D71013";
when 16#0001# => romdata <= X"0573541B";
when 16#0002# => romdata <= X"9DBD4FD9";
when 16#0003# => romdata <= X"E9B20A0D";
when 16#0004# => romdata <= X"59D144C5";
when 16#0005# => romdata <= X"4BC79355";
when 16#0006# => romdata <= X"39D2E758";
when 16#0007# => romdata <= X"10FB51E4";
when 16#0008# => romdata <= X"94093A0A";
when 16#0009# => romdata <= X"19DD79C7";
when 16#000A# => romdata <= X"0C5A98E5";
when 16#000B# => romdata <= X"657AA578";
when 16#000C# => romdata <= X"097777E8";
when 16#000D# => romdata <= X"6BCC4651";
when 16#000E# => romdata <= X"CC72F2F9";
when 16#000F# => romdata <= X"74DC766E";
when 16#0010# => romdata <= X"07AEA3D0";
when 16#0011# => romdata <= X"B557EF42";
when 16#0012# => romdata <= X"FF57E6A5";
when 16#0013# => romdata <= X"8E805358";
when 16#0014# => romdata <= X"CE925766";
when 16#0015# => romdata <= X"9133B18F";
when 16#0016# => romdata <= X"80FDBDFB";
when 16#0017# => romdata <= X"38C5524C";
when 16#0018# => romdata <= X"7FB1DE07";
when 16#0019# => romdata <= X"98424829";
when 16#001A# => romdata <= X"90DF58F7";
when 16#001B# => romdata <= X"2321D920";
when 16#001C# => romdata <= X"1F8979EA";
when 16#001D# => romdata <= X"B159B267";
when 16#001E# => romdata <= X"9C9E95AA";
when 16#001F# => romdata <= X"6D53456C";
when 16#0020# => romdata <= X"0DF75C2B";
when 16#0021# => romdata <= X"4316D1E2";
when 16#0022# => romdata <= X"30921688";
when 16#0023# => romdata <= X"2854253A";
when 16#0024# => romdata <= X"1FA60CA2";
when 16#0025# => romdata <= X"C94ECE01";
when 16#0026# => romdata <= X"3E2A8C94";
when 16#0027# => romdata <= X"3341E7D9";
when 16#0028# => romdata <= X"E5A8464B";
when 16#0029# => romdata <= X"3AD407E0";
when 16#002A# => romdata <= X"AE465C3E";
when 16#002B# => romdata <= X"3DD1BE60";
when 16#002C# => romdata <= X"A8C3D50F";
when 16#002D# => romdata <= X"83153640";
when 16#002E# => romdata <= X"1E776BE0";
when 16#002F# => romdata <= X"2A6042FC";
when 16#0030# => romdata <= X"4A27AF65";
when 16#0031# => romdata <= X"3F0CFC4D";
when 16#0032# => romdata <= X"4D013F11";
when 16#0033# => romdata <= X"5310788D";
when 16#0034# => romdata <= X"68CAEAD3";
when 16#0035# => romdata <= X"ECCCC533";
when 16#0036# => romdata <= X"0587EB3C";
when 16#0037# => romdata <= X"22A1459F";
when 16#0038# => romdata <= X"C8E6FCCE";
when 16#0039# => romdata <= X"9CDE849A";
when 16#003A# => romdata <= X"5205E70C";
when 16#003B# => romdata <= X"6D66D125";
when 16#003C# => romdata <= X"814D698D";
when 16#003D# => romdata <= X"D0EEBFEA";
when 16#003E# => romdata <= X"E52CC65C";
when 16#003F# => romdata <= X"5C84EEDF";
when 16#0040# => romdata <= X"20737900";
when 16#0041# => romdata <= X"0E169D31";
when 16#0042# => romdata <= X"8426516A";
when 16#0043# => romdata <= X"C5D1C31F";
when 16#0044# => romdata <= X"2E18A65E";
when 16#0045# => romdata <= X"07AE6E33";
when 16#0046# => romdata <= X"FDD724B1";
when 16#0047# => romdata <= X"3098B3A4";
when 16#0048# => romdata <= X"44688389";
when 16#0049# => romdata <= X"EFBBB5EE";
when 16#004A# => romdata <= X"AB588742";
when 16#004B# => romdata <= X"BB083B67";
when 16#004C# => romdata <= X"9D42FB26";
when 16#004D# => romdata <= X"FF77919E";
when 16#004E# => romdata <= X"AB21DE03";
when 16#004F# => romdata <= X"89D99974";
when 16#0050# => romdata <= X"98F967AE";
when 16#0051# => romdata <= X"05AF0F4C";
when 16#0052# => romdata <= X"7E177416";
when 16#0053# => romdata <= X"E18C4D5E";
when 16#0054# => romdata <= X"6987ED35";
when 16#0055# => romdata <= X"90690AD1";
when 16#0056# => romdata <= X"27D872F1";
when 16#0057# => romdata <= X"4A8F4903";
when 16#0058# => romdata <= X"A1232973";
when 16#0059# => romdata <= X"2A9768F8";
when 16#005A# => romdata <= X"2F295BEE";
when 16#005B# => romdata <= X"39187929";
when 16#005C# => romdata <= X"3E3A97D5";
when 16#005D# => romdata <= X"1435A7F0";
when 16#005E# => romdata <= X"3ED7FBE2";
when 16#005F# => romdata <= X"75F102A8";
when 16#0060# => romdata <= X"3202DC3D";
when 16#0061# => romdata <= X"E94AF4C7";
when 16#0062# => romdata <= X"12E9D006";
when 16#0063# => romdata <= X"D182693E";
when 16#0064# => romdata <= X"9632933E";
when 16#0065# => romdata <= X"6EB77388";
when 16#0066# => romdata <= X"0CF147B9";
when 16#0067# => romdata <= X"22E74539";
when 16#0068# => romdata <= X"E4582F79";
when 16#0069# => romdata <= X"E39723B4";
when 16#006A# => romdata <= X"C80E42ED";
when 16#006B# => romdata <= X"CE4C08A8";
when 16#006C# => romdata <= X"D02221BA";
when 16#006D# => romdata <= X"E6D17734";
when 16#006E# => romdata <= X"817D5B53";
when 16#006F# => romdata <= X"1C0D3C1A";
when 16#0070# => romdata <= X"E723911F";
when 16#0071# => romdata <= X"3FFF6AAC";
when 16#0072# => romdata <= X"02E97FEA";
when 16#0073# => romdata <= X"69E376AF";
when 16#0074# => romdata <= X"4761E645";
when 16#0075# => romdata <= X"1CA61FDB";
when 16#0076# => romdata <= X"2F918764";
when 16#0077# => romdata <= X"2EFCD63A";
when 16#0078# => romdata <= X"09AAB680";
when 16#0079# => romdata <= X"770C1593";
when 16#007A# => romdata <= X"EEDD4FF4";
when 16#007B# => romdata <= X"293BFFD6";
when 16#007C# => romdata <= X"DD2C3367";
when 16#007D# => romdata <= X"E85B14A6";
when 16#007E# => romdata <= X"54C834B6";
when 16#007F# => romdata <= X"699421A0";
when 16#0080# => romdata <= X"96B856A6";
when 16#0081# => romdata <= X"29F581D1";
when 16#0082# => romdata <= X"344FEF59";
when 16#0083# => romdata <= X"7835FE60";
when 16#0084# => romdata <= X"434625D0";
when 16#0085# => romdata <= X"77ECF0D9";
when 16#0086# => romdata <= X"5FBE1155";
when 16#0087# => romdata <= X"EA043197";
when 16#0088# => romdata <= X"9E5AFF54";
when 16#0089# => romdata <= X"4AF591A3";
when 16#008A# => romdata <= X"32FDAEF9";
when 16#008B# => romdata <= X"8AB1EDD8";
when 16#008C# => romdata <= X"47A73F3A";
when 16#008D# => romdata <= X"F15AAEE7";
when 16#008E# => romdata <= X"E9A05C9D";
when 16#008F# => romdata <= X"82C59EC3";
when 16#0090# => romdata <= X"25EF4CF2";
when 16#0091# => romdata <= X"64B8ADF2";
when 16#0092# => romdata <= X"A8E8BA45";
when 16#0093# => romdata <= X"9354CB4B";
when 16#0094# => romdata <= X"415CC50B";
when 16#0095# => romdata <= X"F239ADBC";
when 16#0096# => romdata <= X"31B3A9C8";
when 16#0097# => romdata <= X"7B0843CF";
when 16#0098# => romdata <= X"3B9E6D64";
when 16#0099# => romdata <= X"6BA43F86";
when 16#009A# => romdata <= X"6276B053";
when 16#009B# => romdata <= X"826F3A23";
when 16#009C# => romdata <= X"34CC5E2E";
when 16#009D# => romdata <= X"FB9F8F19";
when 16#009E# => romdata <= X"5B382E75";
when 16#009F# => romdata <= X"EEA63F58";
when 16#00A0# => romdata <= X"A06B3F82";
when 16#00A1# => romdata <= X"A3B5C77C";
when 16#00A2# => romdata <= X"1800FD94";
when 16#00A3# => romdata <= X"98F803E5";
when 16#00A4# => romdata <= X"24435B32";
when 16#00A5# => romdata <= X"1210BB84";
when 16#00A6# => romdata <= X"690BED0B";
when 16#00A7# => romdata <= X"BBE16D36";
when 16#00A8# => romdata <= X"3B3A9065";
when 16#00A9# => romdata <= X"6A73720E";
when 16#00AA# => romdata <= X"27008852";
when 16#00AB# => romdata <= X"FB7DACC8";
when 16#00AC# => romdata <= X"284411B1";
when 16#00AD# => romdata <= X"77728D95";
when 16#00AE# => romdata <= X"27C56085";
when 16#00AF# => romdata <= X"9084A395";
when 16#00B0# => romdata <= X"A6F11A96";
when 16#00B1# => romdata <= X"AD9DB6B4";
when 16#00B2# => romdata <= X"3E00642B";
when 16#00B3# => romdata <= X"000ED12B";
when 16#00B4# => romdata <= X"FD967868";
when 16#00B5# => romdata <= X"EAB11085";
when 16#00B6# => romdata <= X"52CD4FC8";
when 16#00B7# => romdata <= X"9FBC408A";
when 16#00B8# => romdata <= X"CE7678C3";
when 16#00B9# => romdata <= X"81EC91DD";
when 16#00BA# => romdata <= X"00031912";
when 16#00BB# => romdata <= X"4EB5D5EF";
when 16#00BC# => romdata <= X"52C4CAC9";
when 16#00BD# => romdata <= X"AADEE2FA";
when 16#00BE# => romdata <= X"045C16CE";
when 16#00BF# => romdata <= X"492D7F43";
when 16#00C0# => romdata <= X"743CA779";
when 16#00C1# => romdata <= X"24C78696";
when 16#00C2# => romdata <= X"FCBF2F9F";
when 16#00C3# => romdata <= X"7F36D8E6";
when 16#00C4# => romdata <= X"23752200";
when 16#00C5# => romdata <= X"C6FCBBD7";
when 16#00C6# => romdata <= X"1ABBB687";
when 16#00C7# => romdata <= X"7F3C5D6E";
when 16#00C8# => romdata <= X"6740AB03";
when 16#00C9# => romdata <= X"89458A6B";
when 16#00CA# => romdata <= X"66440858";
when 16#00CB# => romdata <= X"B2D38324";
when 16#00CC# => romdata <= X"4E853646";
when 16#00CD# => romdata <= X"FE271421";
when 16#00CE# => romdata <= X"1DEA9E61";
when 16#00CF# => romdata <= X"96252815";
when 16#00D0# => romdata <= X"BB704A20";
when 16#00D1# => romdata <= X"BFE556AC";
when 16#00D2# => romdata <= X"474F8998";
when 16#00D3# => romdata <= X"944E0CAB";
when 16#00D4# => romdata <= X"BBE21A64";
when 16#00D5# => romdata <= X"00B87BFD";
when 16#00D6# => romdata <= X"CF937D12";
when 16#00D7# => romdata <= X"B2821D59";
when 16#00D8# => romdata <= X"298AF4AD";
when 16#00D9# => romdata <= X"378F0F42";
when 16#00DA# => romdata <= X"BD8C4169";
when 16#00DB# => romdata <= X"3B8D993C";
when 16#00DC# => romdata <= X"F37C8B47";
when 16#00DD# => romdata <= X"8F3BB5D3";
when 16#00DE# => romdata <= X"3AD2A9FA";
when 16#00DF# => romdata <= X"24AD7B8F";
when 16#00E0# => romdata <= X"A895FDBC";
when 16#00E1# => romdata <= X"04964192";
when 16#00E2# => romdata <= X"F7BA3FF7";
when 16#00E3# => romdata <= X"4E0E3A43";
when 16#00E4# => romdata <= X"5B5DFE04";
when 16#00E5# => romdata <= X"2E3115CA";
when 16#00E6# => romdata <= X"CF29624C";
when 16#00E7# => romdata <= X"0645E9C9";
when 16#00E8# => romdata <= X"17534A2E";
when 16#00E9# => romdata <= X"BC1F5665";
when 16#00EA# => romdata <= X"E4E1B1BC";
when 16#00EB# => romdata <= X"56208DBC";
when 16#00EC# => romdata <= X"D8A27CCB";
when 16#00ED# => romdata <= X"6474D5D0";
when 16#00EE# => romdata <= X"E20CA407";
when 16#00EF# => romdata <= X"2C960E5A";
when 16#00F0# => romdata <= X"CE41BDA3";
when 16#00F1# => romdata <= X"770DF3B6";
when 16#00F2# => romdata <= X"81F2B318";
when 16#00F3# => romdata <= X"F6F8E1CB";
when 16#00F4# => romdata <= X"17C28573";
when 16#00F5# => romdata <= X"50FB6009";
when 16#00F6# => romdata <= X"AED665E1";
when 16#00F7# => romdata <= X"3B2780D7";
when 16#00F8# => romdata <= X"9217F73F";
when 16#00F9# => romdata <= X"AC7A8A48";
when 16#00FA# => romdata <= X"048DB0FB";
when 16#00FB# => romdata <= X"8A8A5007";
when 16#00FC# => romdata <= X"CDDC9A7B";
when 16#00FD# => romdata <= X"2DA8257C";
when 16#00FE# => romdata <= X"99F1CB60";
when 16#00FF# => romdata <= X"5A182040";
when 16#0100# => romdata <= X"E57DE19A";
when 16#0101# => romdata <= X"3E4A8C12";
when 16#0102# => romdata <= X"2FCB1DD6";
when 16#0103# => romdata <= X"584B3D2D";
when 16#0104# => romdata <= X"AE364D80";
when 16#0105# => romdata <= X"0F9C5A9E";
when 16#0106# => romdata <= X"957B38F6";
when 16#0107# => romdata <= X"24CBD3AC";
when 16#0108# => romdata <= X"C58FA3ED";
when 16#0109# => romdata <= X"070B5E44";
when 16#010A# => romdata <= X"857CCB81";
when 16#010B# => romdata <= X"3FBC0BB8";
when 16#010C# => romdata <= X"3B5D157C";
when 16#010D# => romdata <= X"6C562422";
when 16#010E# => romdata <= X"E5963CC4";
when 16#010F# => romdata <= X"DD753C45";
when 16#0110# => romdata <= X"B0264F8E";
when 16#0111# => romdata <= X"136A0F17";
when 16#0112# => romdata <= X"74D77A54";
when 16#0113# => romdata <= X"3E44D51E";
when 16#0114# => romdata <= X"F8C6B940";
when 16#0115# => romdata <= X"8B6E3B5C";
when 16#0116# => romdata <= X"EE1347A9";
when 16#0117# => romdata <= X"4F13ECDC";
when 16#0118# => romdata <= X"94DC7649";
when 16#0119# => romdata <= X"76E5A50B";
when 16#011A# => romdata <= X"4CB0AE75";
when 16#011B# => romdata <= X"57553B47";
when 16#011C# => romdata <= X"EDFE03EC";
when 16#011D# => romdata <= X"2CD32EA8";
when 16#011E# => romdata <= X"D125A341";
when 16#011F# => romdata <= X"E1EDFC77";
when 16#0120# => romdata <= X"E75330D6";
when 16#0121# => romdata <= X"E7B23DC8";
when 16#0122# => romdata <= X"38EBCE7E";
when 16#0123# => romdata <= X"5567F5B8";
when 16#0124# => romdata <= X"C80C3D15";
when 16#0125# => romdata <= X"E7404B4E";
when 16#0126# => romdata <= X"10F0BEB0";
when 16#0127# => romdata <= X"C69626A8";
when 16#0128# => romdata <= X"14AF9133";
when 16#0129# => romdata <= X"4199864F";
when 16#012A# => romdata <= X"C77E0FF5";
when 16#012B# => romdata <= X"48DC2A6F";
when 16#012C# => romdata <= X"A6A71C3C";
when 16#012D# => romdata <= X"0561F2B0";
when 16#012E# => romdata <= X"85CC05E8";
when 16#012F# => romdata <= X"512E27B9";
when 16#0130# => romdata <= X"DBA60B93";
when 16#0131# => romdata <= X"D114B879";
when 16#0132# => romdata <= X"35776C8E";
when 16#0133# => romdata <= X"9A67905C";
when 16#0134# => romdata <= X"429D48BF";
when 16#0135# => romdata <= X"3AB1B0A5";
when 16#0136# => romdata <= X"6FAFBFD5";
when 16#0137# => romdata <= X"D9C8D8C8";
when 16#0138# => romdata <= X"A9E5918B";
when 16#0139# => romdata <= X"FF273CF5";
when 16#013A# => romdata <= X"E8664FF2";
when 16#013B# => romdata <= X"B90314BD";
when 16#013C# => romdata <= X"BFDAD5AB";
when 16#013D# => romdata <= X"8C22A0E4";
when 16#013E# => romdata <= X"5C104ECE";
when 16#013F# => romdata <= X"75EA43FE";
when 16#0140# => romdata <= X"9BDCE306";
when 16#0141# => romdata <= X"A5A28AE4";
when 16#0142# => romdata <= X"64628163";
when 16#0143# => romdata <= X"D249D805";
when 16#0144# => romdata <= X"6005F1A9";
when 16#0145# => romdata <= X"00951808";
when 16#0146# => romdata <= X"CC8620F8";
when 16#0147# => romdata <= X"17681534";
when 16#0148# => romdata <= X"36F74166";
when 16#0149# => romdata <= X"7A8E271D";
when 16#014A# => romdata <= X"D986C7A1";
when 16#014B# => romdata <= X"E5046FCC";
when 16#014C# => romdata <= X"74C7CEBB";
when 16#014D# => romdata <= X"F9A1296D";
when 16#014E# => romdata <= X"6CF0B2FF";
when 16#014F# => romdata <= X"85BE412D";
when 16#0150# => romdata <= X"87214BB3";
when 16#0151# => romdata <= X"68DFF462";
when 16#0152# => romdata <= X"AD649D73";
when 16#0153# => romdata <= X"24A11725";
when 16#0154# => romdata <= X"2311C664";
when 16#0155# => romdata <= X"D33E4DAF";
when 16#0156# => romdata <= X"BD830FBC";
when 16#0157# => romdata <= X"EB6EFBDD";
when 16#0158# => romdata <= X"7391D4BA";
when 16#0159# => romdata <= X"DA7A775F";
when 16#015A# => romdata <= X"D1949D98";
when 16#015B# => romdata <= X"1F619655";
when 16#015C# => romdata <= X"DB3C22BA";
when 16#015D# => romdata <= X"C34E5AE4";
when 16#015E# => romdata <= X"1222905C";
when 16#015F# => romdata <= X"0C7E80D6";
when 16#0160# => romdata <= X"EA28471E";
when 16#0161# => romdata <= X"C0468756";
when 16#0162# => romdata <= X"531C09A4";
when 16#0163# => romdata <= X"71EDBE20";
when 16#0164# => romdata <= X"0472E78F";
when 16#0165# => romdata <= X"1701FEE9";
when 16#0166# => romdata <= X"6E5769A9";
when 16#0167# => romdata <= X"893C0F11";
when 16#0168# => romdata <= X"E7906B06";
when 16#0169# => romdata <= X"4442E06E";
when 16#016A# => romdata <= X"21ED8B0D";
when 16#016B# => romdata <= X"70AF2886";
when 16#016C# => romdata <= X"90C532A2";
when 16#016D# => romdata <= X"D03B373E";
when 16#016E# => romdata <= X"1E0085F6";
when 16#016F# => romdata <= X"2F7AAA65";
when 16#0170# => romdata <= X"8B569C51";
when 16#0171# => romdata <= X"84E3DDC4";
when 16#0172# => romdata <= X"0ECAA88B";
when 16#0173# => romdata <= X"88711860";
when 16#0174# => romdata <= X"1691892F";
when 16#0175# => romdata <= X"9F55E2DE";
when 16#0176# => romdata <= X"79E49DFF";
when 16#0177# => romdata <= X"11D434C2";
when 16#0178# => romdata <= X"BA3AA644";
when 16#0179# => romdata <= X"7522A7C9";
when 16#017A# => romdata <= X"9DC215CA";
when 16#017B# => romdata <= X"D2ED0114";
when 16#017C# => romdata <= X"ED62CBDA";
when 16#017D# => romdata <= X"E9D315E4";
when 16#017E# => romdata <= X"8AE14D20";
when 16#017F# => romdata <= X"14B7F8E0";
when 16#0180# => romdata <= X"C0FC4C72";
when 16#0181# => romdata <= X"A12023BA";
when 16#0182# => romdata <= X"7093C867";
when 16#0183# => romdata <= X"75DF3D2F";
when 16#0184# => romdata <= X"42C7CEDE";
when 16#0185# => romdata <= X"61687634";
when 16#0186# => romdata <= X"0BE43013";
when 16#0187# => romdata <= X"61B9DC9D";
when 16#0188# => romdata <= X"FF4F1DEC";
when 16#0189# => romdata <= X"6A62E165";
when 16#018A# => romdata <= X"927BDE4F";
when 16#018B# => romdata <= X"809E969A";
when 16#018C# => romdata <= X"AD085437";
when 16#018D# => romdata <= X"496BB959";
when 16#018E# => romdata <= X"04719820";
when 16#018F# => romdata <= X"F4CA8ABB";
when 16#0190# => romdata <= X"A0B84C34";
when 16#0191# => romdata <= X"B06DD7E2";
when 16#0192# => romdata <= X"68BA10E3";
when 16#0193# => romdata <= X"86FA7DB9";
when 16#0194# => romdata <= X"FCFCDAF2";
when 16#0195# => romdata <= X"B6AFBA46";
when 16#0196# => romdata <= X"A8A29915";
when 16#0197# => romdata <= X"3B4E1158";
when 16#0198# => romdata <= X"2FBA7F28";
when 16#0199# => romdata <= X"F0A0F9DE";
when 16#019A# => romdata <= X"41830AB3";
when 16#019B# => romdata <= X"3335062C";
when 16#019C# => romdata <= X"57D81DC3";
when 16#019D# => romdata <= X"61EDFE49";
when 16#019E# => romdata <= X"1939100F";
when 16#019F# => romdata <= X"C827F362";
when 16#01A0# => romdata <= X"73760043";
when 16#01A1# => romdata <= X"D1C35B74";
when 16#01A2# => romdata <= X"E36C6C4D";
when 16#01A3# => romdata <= X"BE1D3078";
when 16#01A4# => romdata <= X"47D55AC0";
when 16#01A5# => romdata <= X"7D8B212C";
when 16#01A6# => romdata <= X"2DBA632A";
when 16#01A7# => romdata <= X"86AB15BD";
when 16#01A8# => romdata <= X"0FAFFA43";
when 16#01A9# => romdata <= X"070644C7";
when 16#01AA# => romdata <= X"E5062319";
when 16#01AB# => romdata <= X"5A3796AA";
when 16#01AC# => romdata <= X"8E8D6E4E";
when 16#01AD# => romdata <= X"964FA0E4";
when 16#01AE# => romdata <= X"488A500B";
when 16#01AF# => romdata <= X"9063FBBF";
when 16#01B0# => romdata <= X"B1204A0E";
when 16#01B1# => romdata <= X"33C6CF28";
when 16#01B2# => romdata <= X"79AC2BA7";
when 16#01B3# => romdata <= X"C86CAB57";
when 16#01B4# => romdata <= X"E3E8A497";
when 16#01B5# => romdata <= X"836194E6";
when 16#01B6# => romdata <= X"5C5C39B9";
when 16#01B7# => romdata <= X"50F1AFC3";
when 16#01B8# => romdata <= X"B58E850A";
when 16#01B9# => romdata <= X"5EC39F41";
when 16#01BA# => romdata <= X"90D55351";
when 16#01BB# => romdata <= X"D16529CD";
when 16#01BC# => romdata <= X"52B36DF4";
when 16#01BD# => romdata <= X"A2DC68EE";
when 16#01BE# => romdata <= X"202BB758";
when 16#01BF# => romdata <= X"CF19C54B";
when 16#01C0# => romdata <= X"0E1461D5";
when 16#01C1# => romdata <= X"47B5D06C";
when 16#01C2# => romdata <= X"2F9DC09C";
when 16#01C3# => romdata <= X"2B15458C";
when 16#01C4# => romdata <= X"3140860E";
when 16#01C5# => romdata <= X"4C6F3FE4";
when 16#01C6# => romdata <= X"F417FDFC";
when 16#01C7# => romdata <= X"EDE00F71";
when 16#01C8# => romdata <= X"212EE137";
when 16#01C9# => romdata <= X"E6669E56";
when 16#01CA# => romdata <= X"9A784547";
when 16#01CB# => romdata <= X"0CA564F8";
when 16#01CC# => romdata <= X"5CB47728";
when 16#01CD# => romdata <= X"08D65D2B";
when 16#01CE# => romdata <= X"48D409B7";
when 16#01CF# => romdata <= X"09BD7AC5";
when 16#01D0# => romdata <= X"F7E28AA8";
when 16#01D1# => romdata <= X"04CE9DAC";
when 16#01D2# => romdata <= X"3ABB5A5B";
when 16#01D3# => romdata <= X"768C6A18";
when 16#01D4# => romdata <= X"4B5A974E";
when 16#01D5# => romdata <= X"933F2C17";
when 16#01D6# => romdata <= X"72FF64AB";
when 16#01D7# => romdata <= X"26BA2D5A";
when 16#01D8# => romdata <= X"165744E3";
when 16#01D9# => romdata <= X"14EFB223";
when 16#01DA# => romdata <= X"8AC4858A";
when 16#01DB# => romdata <= X"8B82723D";
when 16#01DC# => romdata <= X"AE886547";
when 16#01DD# => romdata <= X"8EAA261F";
when 16#01DE# => romdata <= X"35DD4D98";
when 16#01DF# => romdata <= X"A9C07ACB";
when 16#01E0# => romdata <= X"0B822AFF";
when 16#01E1# => romdata <= X"1AD3E739";
when 16#01E2# => romdata <= X"CB214CE7";
when 16#01E3# => romdata <= X"37196FEF";
when 16#01E4# => romdata <= X"2DD0B0D4";
when 16#01E5# => romdata <= X"5BAC4239";
when 16#01E6# => romdata <= X"35670BCF";
when 16#01E7# => romdata <= X"71C2EC04";
when 16#01E8# => romdata <= X"CCB98943";
when 16#01E9# => romdata <= X"786173C3";
when 16#01EA# => romdata <= X"09E75A02";
when 16#01EB# => romdata <= X"BB78A788";
when 16#01EC# => romdata <= X"A5E6F8A8";
when 16#01ED# => romdata <= X"F407E57B";
when 16#01EE# => romdata <= X"8403841A";
when 16#01EF# => romdata <= X"9E1FCB3A";
when 16#01F0# => romdata <= X"7AB80D1F";
when 16#01F1# => romdata <= X"6529770E";
when 16#01F2# => romdata <= X"52C173E2";
when 16#01F3# => romdata <= X"C47EDED4";
when 16#01F4# => romdata <= X"400D5E66";
when 16#01F5# => romdata <= X"5E325ED8";
when 16#01F6# => romdata <= X"45C9E8D0";
when 16#01F7# => romdata <= X"E66FDA16";
when 16#01F8# => romdata <= X"B17D61ED";
when 16#01F9# => romdata <= X"BB336F22";
when 16#01FA# => romdata <= X"688C3F0F";
when 16#01FB# => romdata <= X"B040A55F";
when 16#01FC# => romdata <= X"33B65FA9";
when 16#01FD# => romdata <= X"F3D45F5B";
when 16#01FE# => romdata <= X"22C445CB";
when 16#01FF# => romdata <= X"F9DEB220";
when 16#0200# => romdata <= X"EA959635";
when 16#0201# => romdata <= X"7B343DFC";
when 16#0202# => romdata <= X"31D5875C";
when 16#0203# => romdata <= X"C0E94117";
when 16#0204# => romdata <= X"A3365147";
when 16#0205# => romdata <= X"2E476D38";
when 16#0206# => romdata <= X"92D8112E";
when 16#0207# => romdata <= X"B6CB6E01";
when 16#0208# => romdata <= X"51D409C5";
when 16#0209# => romdata <= X"A514DCDA";
when 16#020A# => romdata <= X"38A773C5";
when 16#020B# => romdata <= X"8F18B590";
when 16#020C# => romdata <= X"EF9017B6";
when 16#020D# => romdata <= X"EDF0192A";
when 16#020E# => romdata <= X"B7EB29DD";
when 16#020F# => romdata <= X"6E1E7E73";
when 16#0210# => romdata <= X"90C13E9B";
when 16#0211# => romdata <= X"10209D57";
when 16#0212# => romdata <= X"75F3B066";
when 16#0213# => romdata <= X"F7B2DBB7";
when 16#0214# => romdata <= X"307FB44F";
when 16#0215# => romdata <= X"726DD2F3";
when 16#0216# => romdata <= X"68A5FDBE";
when 16#0217# => romdata <= X"75BA7248";
when 16#0218# => romdata <= X"762E1EC7";
when 16#0219# => romdata <= X"E4589DF1";
when 16#021A# => romdata <= X"A353A16D";
when 16#021B# => romdata <= X"6B3CAC1C";
when 16#021C# => romdata <= X"9ACDB898";
when 16#021D# => romdata <= X"90ED2C4F";
when 16#021E# => romdata <= X"44AFEFC7";
when 16#021F# => romdata <= X"63DB51D1";
when 16#0220# => romdata <= X"02230C37";
when 16#0221# => romdata <= X"E1ED0943";
when 16#0222# => romdata <= X"CD6F4176";
when 16#0223# => romdata <= X"B2F5C191";
when 16#0224# => romdata <= X"19588911";
when 16#0225# => romdata <= X"ACF81A7A";
when 16#0226# => romdata <= X"29320AD5";
when 16#0227# => romdata <= X"79C1BFAE";
when 16#0228# => romdata <= X"D1A70DEE";
when 16#0229# => romdata <= X"1B870371";
when 16#022A# => romdata <= X"38ADE411";
when 16#022B# => romdata <= X"E0BB92F5";
when 16#022C# => romdata <= X"B3148DFA";
when 16#022D# => romdata <= X"11F2F84C";
when 16#022E# => romdata <= X"A6C01912";
when 16#022F# => romdata <= X"4B922837";
when 16#0230# => romdata <= X"503AA982";
when 16#0231# => romdata <= X"3A97E443";
when 16#0232# => romdata <= X"A66378D5";
when 16#0233# => romdata <= X"CB3130A7";
when 16#0234# => romdata <= X"EC9B0567";
when 16#0235# => romdata <= X"0E85D095";
when 16#0236# => romdata <= X"D5E6F603";
when 16#0237# => romdata <= X"092C632E";
when 16#0238# => romdata <= X"51FD9013";
when 16#0239# => romdata <= X"FE7FB9F0";
when 16#023A# => romdata <= X"8448FD09";
when 16#023B# => romdata <= X"F1219A47";
when 16#023C# => romdata <= X"44CDAF82";
when 16#023D# => romdata <= X"BF9C6003";
when 16#023E# => romdata <= X"9C8185C7";
when 16#023F# => romdata <= X"E9559FCE";
when 16#0240# => romdata <= X"301C6D3F";
when 16#0241# => romdata <= X"46A2E514";
when 16#0242# => romdata <= X"AAD44D38";
when 16#0243# => romdata <= X"89C8CB4E";
when 16#0244# => romdata <= X"D7439BF4";
when 16#0245# => romdata <= X"7019194F";
when 16#0246# => romdata <= X"26443637";
when 16#0247# => romdata <= X"70F8BBD0";
when 16#0248# => romdata <= X"AE92B6F5";
when 16#0249# => romdata <= X"F43CBBB5";
when 16#024A# => romdata <= X"03A88523";
when 16#024B# => romdata <= X"9DA63690";
when 16#024C# => romdata <= X"3D4C264B";
when 16#024D# => romdata <= X"3FF09AB7";
when 16#024E# => romdata <= X"7E3FDBA7";
when 16#024F# => romdata <= X"EFC63E07";
when 16#0250# => romdata <= X"92B6D518";
when 16#0251# => romdata <= X"3759E57D";
when 16#0252# => romdata <= X"8A694CDB";
when 16#0253# => romdata <= X"133B4A9E";
when 16#0254# => romdata <= X"301CEEEB";
when 16#0255# => romdata <= X"978050AD";
when 16#0256# => romdata <= X"9A9E4100";
when 16#0257# => romdata <= X"91AD29E3";
when 16#0258# => romdata <= X"89829E2F";
when 16#0259# => romdata <= X"24BE1E3B";
when 16#025A# => romdata <= X"24F4540C";
when 16#025B# => romdata <= X"4A6533EB";
when 16#025C# => romdata <= X"A72E8AD5";
when 16#025D# => romdata <= X"40BAAE43";
when 16#025E# => romdata <= X"A0CB82F9";
when 16#025F# => romdata <= X"71F3A51D";
when 16#0260# => romdata <= X"D77FE9E1";
when 16#0261# => romdata <= X"956E2EE7";
when 16#0262# => romdata <= X"553E050A";
when 16#0263# => romdata <= X"1D10B995";
when 16#0264# => romdata <= X"52DDD5B6";
when 16#0265# => romdata <= X"8F2E2859";
when 16#0266# => romdata <= X"712835BD";
when 16#0267# => romdata <= X"2AD6B088";
when 16#0268# => romdata <= X"81753B48";
when 16#0269# => romdata <= X"33FB0474";
when 16#026A# => romdata <= X"0E3364D2";
when 16#026B# => romdata <= X"CD4921B9";
when 16#026C# => romdata <= X"39393E7E";
when 16#026D# => romdata <= X"A91B854F";
when 16#026E# => romdata <= X"A1E5A8EE";
when 16#026F# => romdata <= X"79FF0A83";
when 16#0270# => romdata <= X"F111F784";
when 16#0271# => romdata <= X"35481D46";
when 16#0272# => romdata <= X"2E0E1CBC";
when 16#0273# => romdata <= X"0C921D19";
when 16#0274# => romdata <= X"0A435A1B";
when 16#0275# => romdata <= X"A755E4B7";
when 16#0276# => romdata <= X"021244FC";
when 16#0277# => romdata <= X"5E3F0630";
when 16#0278# => romdata <= X"F2A1F439";
when 16#0279# => romdata <= X"C02AE619";
when 16#027A# => romdata <= X"393E5624";
when 16#027B# => romdata <= X"834B05ED";
when 16#027C# => romdata <= X"7DEDE5F0";
when 16#027D# => romdata <= X"AFC7A408";
when 16#027E# => romdata <= X"99424E75";
when 16#027F# => romdata <= X"D4EE7920";
when 16#0280# => romdata <= X"90E92279";
when 16#0281# => romdata <= X"CD4F60D9";
when 16#0282# => romdata <= X"8F6E8FCB";
when 16#0283# => romdata <= X"3E9263DB";
when 16#0284# => romdata <= X"60FAB146";
when 16#0285# => romdata <= X"A835AAC2";
when 16#0286# => romdata <= X"E96B3BE3";
when 16#0287# => romdata <= X"FF071190";
when 16#0288# => romdata <= X"32DEE052";
when 16#0289# => romdata <= X"1C731117";
when 16#028A# => romdata <= X"E90C2943";
when 16#028B# => romdata <= X"B389DD6B";
when 16#028C# => romdata <= X"65C5E21C";
when 16#028D# => romdata <= X"34F86F5A";
when 16#028E# => romdata <= X"7ADE0407";
when 16#028F# => romdata <= X"2DFD1479";
when 16#0290# => romdata <= X"EA36528D";
when 16#0291# => romdata <= X"340736B0";
when 16#0292# => romdata <= X"FED4F620";
when 16#0293# => romdata <= X"7BE9F6CF";
when 16#0294# => romdata <= X"C971D5EA";
when 16#0295# => romdata <= X"11781AC2";
when 16#0296# => romdata <= X"DA25DBEE";
when 16#0297# => romdata <= X"B6B903EF";
when 16#0298# => romdata <= X"8BB0AC0C";
when 16#0299# => romdata <= X"D2E29F94";
when 16#029A# => romdata <= X"B8CB6787";
when 16#029B# => romdata <= X"4A7B7441";
when 16#029C# => romdata <= X"045758E0";
when 16#029D# => romdata <= X"9EA06118";
when 16#029E# => romdata <= X"1A50E0AB";
when 16#029F# => romdata <= X"7BCCF801";
when 16#02A0# => romdata <= X"554E0644";
when 16#02A1# => romdata <= X"780BC137";
when 16#02A2# => romdata <= X"436E3FB7";
when 16#02A3# => romdata <= X"784C1828";
when 16#02A4# => romdata <= X"56A790D6";
when 16#02A5# => romdata <= X"943BB53D";
when 16#02A6# => romdata <= X"B40D13D6";
when 16#02A7# => romdata <= X"A2F7B83A";
when 16#02A8# => romdata <= X"5C521073";
when 16#02A9# => romdata <= X"883B90FB";
when 16#02AA# => romdata <= X"8DB1C0F9";
when 16#02AB# => romdata <= X"54D13294";
when 16#02AC# => romdata <= X"3C09156A";
when 16#02AD# => romdata <= X"09984B82";
when 16#02AE# => romdata <= X"2079FB8F";
when 16#02AF# => romdata <= X"D09BC07C";
when 16#02B0# => romdata <= X"1D6336C7";
when 16#02B1# => romdata <= X"CEAE8CC3";
when 16#02B2# => romdata <= X"162760B9";
when 16#02B3# => romdata <= X"838CA6A3";
when 16#02B4# => romdata <= X"8FD0044F";
when 16#02B5# => romdata <= X"DF099E41";
when 16#02B6# => romdata <= X"6D57BF9F";
when 16#02B7# => romdata <= X"33A55104";
when 16#02B8# => romdata <= X"3F34EBF9";
when 16#02B9# => romdata <= X"BAA90901";
when 16#02BA# => romdata <= X"E62D2D98";
when 16#02BB# => romdata <= X"1065F977";
when 16#02BC# => romdata <= X"852072F6";
when 16#02BD# => romdata <= X"92535DDE";
when 16#02BE# => romdata <= X"24EE8946";
when 16#02BF# => romdata <= X"387B4E5B";
when 16#02C0# => romdata <= X"0FEFEBD7";
when 16#02C1# => romdata <= X"5552C1FC";
when 16#02C2# => romdata <= X"325A608A";
when 16#02C3# => romdata <= X"78079A9A";
when 16#02C4# => romdata <= X"C864F2F3";
when 16#02C5# => romdata <= X"0010A330";
when 16#02C6# => romdata <= X"4CB16A26";
when 16#02C7# => romdata <= X"AF98D9BF";
when 16#02C8# => romdata <= X"D3B8D128";
when 16#02C9# => romdata <= X"541190B2";
when 16#02CA# => romdata <= X"BBEE275A";
when 16#02CB# => romdata <= X"6F53B9BC";
when 16#02CC# => romdata <= X"51083069";
when 16#02CD# => romdata <= X"85ECBB98";
when 16#02CE# => romdata <= X"3B56E34F";
when 16#02CF# => romdata <= X"18B48A12";
when 16#02D0# => romdata <= X"AEAB8827";
when 16#02D1# => romdata <= X"1F4F780C";
when 16#02D2# => romdata <= X"FDFA83E0";
when 16#02D3# => romdata <= X"5E35C124";
when 16#02D4# => romdata <= X"64F43505";
when 16#02D5# => romdata <= X"97CCAE9B";
when 16#02D6# => romdata <= X"4498F5A5";
when 16#02D7# => romdata <= X"454DCC32";
when 16#02D8# => romdata <= X"18D33367";
when 16#02D9# => romdata <= X"63674934";
when 16#02DA# => romdata <= X"ADCBCB5E";
when 16#02DB# => romdata <= X"A52891EB";
when 16#02DC# => romdata <= X"240C3622";
when 16#02DD# => romdata <= X"48226DE6";
when 16#02DE# => romdata <= X"4899BE30";
when 16#02DF# => romdata <= X"735F6495";
when 16#02E0# => romdata <= X"E94AA61A";
when 16#02E1# => romdata <= X"BEF62B80";
when 16#02E2# => romdata <= X"3C57FDD0";
when 16#02E3# => romdata <= X"45B724ED";
when 16#02E4# => romdata <= X"1966B6E7";
when 16#02E5# => romdata <= X"DFDFCA5B";
when 16#02E6# => romdata <= X"36F7B0FA";
when 16#02E7# => romdata <= X"CEDAC62D";
when 16#02E8# => romdata <= X"E8E10B12";
when 16#02E9# => romdata <= X"DFC84B1A";
when 16#02EA# => romdata <= X"9CEB407B";
when 16#02EB# => romdata <= X"DE63CDB5";
when 16#02EC# => romdata <= X"208ABBE5";
when 16#02ED# => romdata <= X"E066AAF2";
when 16#02EE# => romdata <= X"62187E94";
when 16#02EF# => romdata <= X"502B1701";
when 16#02F0# => romdata <= X"B2CC8681";
when 16#02F1# => romdata <= X"CB616773";
when 16#02F2# => romdata <= X"DA2B7AF4";
when 16#02F3# => romdata <= X"9443CFF5";
when 16#02F4# => romdata <= X"28F45DD7";
when 16#02F5# => romdata <= X"F2595983";
when 16#02F6# => romdata <= X"6771908C";
when 16#02F7# => romdata <= X"2519171C";
when 16#02F8# => romdata <= X"AED2BCDC";
when 16#02F9# => romdata <= X"FCEA4630";
when 16#02FA# => romdata <= X"1E7D99A5";
when 16#02FB# => romdata <= X"AF719915";
when 16#02FC# => romdata <= X"5772E92B";
when 16#02FD# => romdata <= X"AD85F35E";
when 16#02FE# => romdata <= X"DB656F09";
when 16#02FF# => romdata <= X"99EE8280";
when 16#0300# => romdata <= X"A91F5701";
when 16#0301# => romdata <= X"02961D62";
when 16#0302# => romdata <= X"CA6CB551";
when 16#0303# => romdata <= X"44AFCCEA";
when 16#0304# => romdata <= X"F3910F33";
when 16#0305# => romdata <= X"36DCB029";
when 16#0306# => romdata <= X"CDCBA164";
when 16#0307# => romdata <= X"ADA72732";
when 16#0308# => romdata <= X"771B6ECD";
when 16#0309# => romdata <= X"1C58E49F";
when 16#030A# => romdata <= X"468A2BFD";
when 16#030B# => romdata <= X"23E1B996";
when 16#030C# => romdata <= X"DABABBAF";
when 16#030D# => romdata <= X"5AB3A4C7";
when 16#030E# => romdata <= X"4926187B";
when 16#030F# => romdata <= X"5833006F";
when 16#0310# => romdata <= X"8BEF7F9C";
when 16#0311# => romdata <= X"D0F05A2A";
when 16#0312# => romdata <= X"0B9BD907";
when 16#0313# => romdata <= X"3C4C3976";
when 16#0314# => romdata <= X"E8660CE7";
when 16#0315# => romdata <= X"BF81634C";
when 16#0316# => romdata <= X"F0B31C3D";
when 16#0317# => romdata <= X"DD806A6A";
when 16#0318# => romdata <= X"0C15BC55";
when 16#0319# => romdata <= X"2B83A867";
when 16#031A# => romdata <= X"89CC675A";
when 16#031B# => romdata <= X"6D137BE2";
when 16#031C# => romdata <= X"7BC86DF6";
when 16#031D# => romdata <= X"8FEC5D26";
when 16#031E# => romdata <= X"8119EB9E";
when 16#031F# => romdata <= X"965260FE";
when 16#0320# => romdata <= X"1F5C56AE";
when 16#0321# => romdata <= X"F60A8622";
when 16#0322# => romdata <= X"CDA8C42F";
when 16#0323# => romdata <= X"24CBA7F5";
when 16#0324# => romdata <= X"B07A7416";
when 16#0325# => romdata <= X"91727732";
when 16#0326# => romdata <= X"3314AFD3";
when 16#0327# => romdata <= X"ECD10F74";
when 16#0328# => romdata <= X"BEE7B22D";
when 16#0329# => romdata <= X"C760EFA7";
when 16#032A# => romdata <= X"F935FC99";
when 16#032B# => romdata <= X"63411353";
when 16#032C# => romdata <= X"782547FA";
when 16#032D# => romdata <= X"EED32E69";
when 16#032E# => romdata <= X"A4FB5756";
when 16#032F# => romdata <= X"C1A73CCD";
when 16#0330# => romdata <= X"FFEDE50F";
when 16#0331# => romdata <= X"4B2D9B5D";
when 16#0332# => romdata <= X"2ED5C59C";
when 16#0333# => romdata <= X"9A52D80C";
when 16#0334# => romdata <= X"D27B989B";
when 16#0335# => romdata <= X"8DAA14C5";
when 16#0336# => romdata <= X"69E763C0";
when 16#0337# => romdata <= X"8FD42358";
when 16#0338# => romdata <= X"CD064B2D";
when 16#0339# => romdata <= X"E0526607";
when 16#033A# => romdata <= X"C9536D75";
when 16#033B# => romdata <= X"E1617EC8";
when 16#033C# => romdata <= X"0615EF5E";
when 16#033D# => romdata <= X"E2314FAC";
when 16#033E# => romdata <= X"29907B61";
when 16#033F# => romdata <= X"B61F8696";
when 16#0340# => romdata <= X"CB80B14B";
when 16#0341# => romdata <= X"3A0148EE";
when 16#0342# => romdata <= X"BC825C91";
when 16#0343# => romdata <= X"150A08A2";
when 16#0344# => romdata <= X"3FC7B38B";
when 16#0345# => romdata <= X"5982AA02";
when 16#0346# => romdata <= X"A18BF6E9";
when 16#0347# => romdata <= X"1B3A1F2E";
when 16#0348# => romdata <= X"EF360F68";
when 16#0349# => romdata <= X"2A34AB36";
when 16#034A# => romdata <= X"CAFCAD55";
when 16#034B# => romdata <= X"6841073F";
when 16#034C# => romdata <= X"219910F7";
when 16#034D# => romdata <= X"BC2F07CE";
when 16#034E# => romdata <= X"45E98F77";
when 16#034F# => romdata <= X"F50475DF";
when 16#0350# => romdata <= X"9EDFE2DC";
when 16#0351# => romdata <= X"9E3D7280";
when 16#0352# => romdata <= X"193D61AB";
when 16#0353# => romdata <= X"5076A148";
when 16#0354# => romdata <= X"87E9D919";
when 16#0355# => romdata <= X"3C3B83C5";
when 16#0356# => romdata <= X"773BDECA";
when 16#0357# => romdata <= X"067CA1BC";
when 16#0358# => romdata <= X"3D4561C3";
when 16#0359# => romdata <= X"A8B4E300";
when 16#035A# => romdata <= X"72A6269B";
when 16#035B# => romdata <= X"529760CA";
when 16#035C# => romdata <= X"1B5FE9D3";
when 16#035D# => romdata <= X"DB2B5D12";
when 16#035E# => romdata <= X"02CE8B18";
when 16#035F# => romdata <= X"E9E2E80F";
when 16#0360# => romdata <= X"AFF47108";
when 16#0361# => romdata <= X"168D3C7E";
when 16#0362# => romdata <= X"B3C940B1";
when 16#0363# => romdata <= X"A35A1D1B";
when 16#0364# => romdata <= X"968A5A9D";
when 16#0365# => romdata <= X"C0686DD8";
when 16#0366# => romdata <= X"336E498C";
when 16#0367# => romdata <= X"240F2087";
when 16#0368# => romdata <= X"1600FF99";
when 16#0369# => romdata <= X"5B9E3316";
when 16#036A# => romdata <= X"9DCFCFCB";
when 16#036B# => romdata <= X"58E75C94";
when 16#036C# => romdata <= X"D82F843C";
when 16#036D# => romdata <= X"60A7118F";
when 16#036E# => romdata <= X"0D7B4006";
when 16#036F# => romdata <= X"4A8A4176";
when 16#0370# => romdata <= X"C5158E86";
when 16#0371# => romdata <= X"AF0BE4C1";
when 16#0372# => romdata <= X"D5D73D1C";
when 16#0373# => romdata <= X"051132A8";
when 16#0374# => romdata <= X"5CC06284";
when 16#0375# => romdata <= X"86AFD660";
when 16#0376# => romdata <= X"502A515D";
when 16#0377# => romdata <= X"6353B674";
when 16#0378# => romdata <= X"B1D4E617";
when 16#0379# => romdata <= X"50C13E8A";
when 16#037A# => romdata <= X"3AD48FE1";
when 16#037B# => romdata <= X"F89F201C";
when 16#037C# => romdata <= X"288A8F44";
when 16#037D# => romdata <= X"3867C2BA";
when 16#037E# => romdata <= X"C23C706E";
when 16#037F# => romdata <= X"E7A2D2C0";
when 16#0380# => romdata <= X"C6E00978";
when 16#0381# => romdata <= X"E3511645";
when 16#0382# => romdata <= X"32EEA256";
when 16#0383# => romdata <= X"ECBE0D4F";
when 16#0384# => romdata <= X"8FCE02A2";
when 16#0385# => romdata <= X"76BD1966";
when 16#0386# => romdata <= X"6DE93936";
when 16#0387# => romdata <= X"F7A242FC";
when 16#0388# => romdata <= X"4C7E8797";
when 16#0389# => romdata <= X"91314B04";
when 16#038A# => romdata <= X"3ABF1D5F";
when 16#038B# => romdata <= X"9B0036ED";
when 16#038C# => romdata <= X"22AA9202";
when 16#038D# => romdata <= X"8C800C4D";
when 16#038E# => romdata <= X"62BD6640";
when 16#038F# => romdata <= X"431170EA";
when 16#0390# => romdata <= X"77311865";
when 16#0391# => romdata <= X"074D670A";
when 16#0392# => romdata <= X"F2847AA4";
when 16#0393# => romdata <= X"7CB94584";
when 16#0394# => romdata <= X"A793FA82";
when 16#0395# => romdata <= X"F51574BD";
when 16#0396# => romdata <= X"7C62BF14";
when 16#0397# => romdata <= X"386F14A3";
when 16#0398# => romdata <= X"D7DBD129";
when 16#0399# => romdata <= X"FDE64EAD";
when 16#039A# => romdata <= X"67EB35D5";
when 16#039B# => romdata <= X"E13FF214";
when 16#039C# => romdata <= X"D7D163B7";
when 16#039D# => romdata <= X"70D4A77A";
when 16#039E# => romdata <= X"62D02D88";
when 16#039F# => romdata <= X"C0FCF3FA";
when 16#03A0# => romdata <= X"5EC306EB";
when 16#03A1# => romdata <= X"7F855391";
when 16#03A2# => romdata <= X"05FA2CE5";
when 16#03A3# => romdata <= X"F53D182E";
when 16#03A4# => romdata <= X"58FBBC1C";
when 16#03A5# => romdata <= X"57CFBCD2";
when 16#03A6# => romdata <= X"D2F7FC8A";
when 16#03A7# => romdata <= X"067D6FA0";
when 16#03A8# => romdata <= X"BC834DAB";
when 16#03A9# => romdata <= X"8F370B09";
when 16#03AA# => romdata <= X"71BF6D06";
when 16#03AB# => romdata <= X"8CD4D3A3";
when 16#03AC# => romdata <= X"2C11C659";
when 16#03AD# => romdata <= X"8DEBBAEA";
when 16#03AE# => romdata <= X"046528C5";
when 16#03AF# => romdata <= X"EF762828";
when 16#03B0# => romdata <= X"CC84D003";
when 16#03B1# => romdata <= X"847069FA";
when 16#03B2# => romdata <= X"18743A80";
when 16#03B3# => romdata <= X"9A004431";
when 16#03B4# => romdata <= X"E83924B8";
when 16#03B5# => romdata <= X"FDF0AC78";
when 16#03B6# => romdata <= X"699B905A";
when 16#03B7# => romdata <= X"CCFF82E8";
when 16#03B8# => romdata <= X"3FDAFEC8";
when 16#03B9# => romdata <= X"648DF640";
when 16#03BA# => romdata <= X"42FC9438";
when 16#03BB# => romdata <= X"B261B73F";
when 16#03BC# => romdata <= X"0541498A";
when 16#03BD# => romdata <= X"CAD67D70";
when 16#03BE# => romdata <= X"2AB631BE";
when 16#03BF# => romdata <= X"CEF8680D";
when 16#03C0# => romdata <= X"33CE8F4F";
when 16#03C1# => romdata <= X"0CE29B95";
when 16#03C2# => romdata <= X"132591A3";
when 16#03C3# => romdata <= X"50DD68B3";
when 16#03C4# => romdata <= X"6734B97D";
when 16#03C5# => romdata <= X"4B3E84A7";
when 16#03C6# => romdata <= X"6497F702";
when 16#03C7# => romdata <= X"312F2A83";
when 16#03C8# => romdata <= X"70DCF26A";
when 16#03C9# => romdata <= X"7C3C8EB9";
when 16#03CA# => romdata <= X"1DD8699C";
when 16#03CB# => romdata <= X"48F55175";
when 16#03CC# => romdata <= X"0712683E";
when 16#03CD# => romdata <= X"03970837";
when 16#03CE# => romdata <= X"14A6CAC3";
when 16#03CF# => romdata <= X"457C0FA7";
when 16#03D0# => romdata <= X"0BB3A036";
when 16#03D1# => romdata <= X"C6E0BEF2";
when 16#03D2# => romdata <= X"4E6B20BA";
when 16#03D3# => romdata <= X"5565B351";
when 16#03D4# => romdata <= X"C2EFD56B";
when 16#03D5# => romdata <= X"D9455FF7";
when 16#03D6# => romdata <= X"728BE07A";
when 16#03D7# => romdata <= X"097208E7";
when 16#03D8# => romdata <= X"3DE4CD0C";
when 16#03D9# => romdata <= X"B4E215B4";
when 16#03DA# => romdata <= X"64236512";
when 16#03DB# => romdata <= X"3CDEA419";
when 16#03DC# => romdata <= X"B28459D5";
when 16#03DD# => romdata <= X"0E864B76";
when 16#03DE# => romdata <= X"2554E7C1";
when 16#03DF# => romdata <= X"D7CAF73D";
when 16#03E0# => romdata <= X"A7D40EDE";
when 16#03E1# => romdata <= X"F5D824A2";
when 16#03E2# => romdata <= X"FE1A6CA4";
when 16#03E3# => romdata <= X"73B07370";
when 16#03E4# => romdata <= X"932A8A5D";
when 16#03E5# => romdata <= X"441DEE3C";
when 16#03E6# => romdata <= X"9A60DB68";
when 16#03E7# => romdata <= X"E27A9D3E";
when 16#03E8# => romdata <= X"9C8229B4";
when 16#03E9# => romdata <= X"4E5B434C";
when 16#03EA# => romdata <= X"6D18A8CA";
when 16#03EB# => romdata <= X"DB6D17BC";
when 16#03EC# => romdata <= X"4614DEBE";
when 16#03ED# => romdata <= X"AD670C73";
when 16#03EE# => romdata <= X"132CE2F9";
when 16#03EF# => romdata <= X"99C8716D";
when 16#03F0# => romdata <= X"1098C692";
when 16#03F1# => romdata <= X"77E8ECAC";
when 16#03F2# => romdata <= X"546EF800";
when 16#03F3# => romdata <= X"2E5182E2";
when 16#03F4# => romdata <= X"5F31A354";
when 16#03F5# => romdata <= X"DF112E97";
when 16#03F6# => romdata <= X"F8733DD2";
when 16#03F7# => romdata <= X"0893B430";
when 16#03F8# => romdata <= X"CD7130E6";
when 16#03F9# => romdata <= X"9ED4A0FE";
when 16#03FA# => romdata <= X"4D6C2E4F";
when 16#03FB# => romdata <= X"A479001E";
when 16#03FC# => romdata <= X"42EBC9F3";
when 16#03FD# => romdata <= X"6E5DFD3E";
when 16#03FE# => romdata <= X"0BE35A64";
when 16#03FF# => romdata <= X"B89745E0";
when 16#0400# => romdata <= X"821BBB3F";
when 16#0401# => romdata <= X"B91E5025";
when 16#0402# => romdata <= X"3A9E71AC";
when 16#0403# => romdata <= X"379ED57A";
when 16#0404# => romdata <= X"EF394C2C";
when 16#0405# => romdata <= X"C59587B2";
when 16#0406# => romdata <= X"D0337CE7";
when 16#0407# => romdata <= X"4002EEAD";
when 16#0408# => romdata <= X"17AB5D50";
when 16#0409# => romdata <= X"4BCA68BD";
when 16#040A# => romdata <= X"AE9061C3";
when 16#040B# => romdata <= X"DBAE2985";
when 16#040C# => romdata <= X"EBE292B9";
when 16#040D# => romdata <= X"BEC9D354";
when 16#040E# => romdata <= X"2015225F";
when 16#040F# => romdata <= X"44ED3C2C";
when 16#0410# => romdata <= X"3FFB036A";
when 16#0411# => romdata <= X"515BF33D";
when 16#0412# => romdata <= X"A1690F34";
when 16#0413# => romdata <= X"38FD225A";
when 16#0414# => romdata <= X"5034106C";
when 16#0415# => romdata <= X"5F4BCC43";
when 16#0416# => romdata <= X"301EEC22";
when 16#0417# => romdata <= X"45D73F63";
when 16#0418# => romdata <= X"038E2A7D";
when 16#0419# => romdata <= X"9B8CF95A";
when 16#041A# => romdata <= X"9FD813FF";
when 16#041B# => romdata <= X"A071FFDE";
when 16#041C# => romdata <= X"423E0CE7";
when 16#041D# => romdata <= X"37969578";
when 16#041E# => romdata <= X"BEB90976";
when 16#041F# => romdata <= X"4A8D6DAA";
when 16#0420# => romdata <= X"9E15A4FA";
when 16#0421# => romdata <= X"08678316";
when 16#0422# => romdata <= X"52C0F6E9";
when 16#0423# => romdata <= X"AAA39A63";
when 16#0424# => romdata <= X"F0AEEF62";
when 16#0425# => romdata <= X"A433476C";
when 16#0426# => romdata <= X"C7380460";
when 16#0427# => romdata <= X"ECFB8B7F";
when 16#0428# => romdata <= X"3B2FE8C4";
when 16#0429# => romdata <= X"C42A3EF1";
when 16#042A# => romdata <= X"CDB808FC";
when 16#042B# => romdata <= X"9747FB4F";
when 16#042C# => romdata <= X"044B3B47";
when 16#042D# => romdata <= X"A4EDFCC9";
when 16#042E# => romdata <= X"463ABB72";
when 16#042F# => romdata <= X"C55399B2";
when 16#0430# => romdata <= X"F79EE5FE";
when 16#0431# => romdata <= X"DA270D63";
when 16#0432# => romdata <= X"58B27F84";
when 16#0433# => romdata <= X"66969DE4";
when 16#0434# => romdata <= X"A5F2E6A5";
when 16#0435# => romdata <= X"F2C4CF08";
when 16#0436# => romdata <= X"13C09F46";
when 16#0437# => romdata <= X"8DC97FC0";
when 16#0438# => romdata <= X"E5DD057A";
when 16#0439# => romdata <= X"8A035576";
when 16#043A# => romdata <= X"7B698F8A";
when 16#043B# => romdata <= X"79BF0350";
when 16#043C# => romdata <= X"C4200413";
when 16#043D# => romdata <= X"A15E6591";
when 16#043E# => romdata <= X"DE70A1B5";
when 16#043F# => romdata <= X"02E19FF5";
when 16#0440# => romdata <= X"15C3DF36";
when 16#0441# => romdata <= X"935974A4";
when 16#0442# => romdata <= X"764895B9";
when 16#0443# => romdata <= X"E3CA2626";
when 16#0444# => romdata <= X"BD39B7AD";
when 16#0445# => romdata <= X"B780AAF7";
when 16#0446# => romdata <= X"E2E914E8";
when 16#0447# => romdata <= X"04CA9230";
when 16#0448# => romdata <= X"89A51F38";
when 16#0449# => romdata <= X"76649C73";
when 16#044A# => romdata <= X"CA3C2623";
when 16#044B# => romdata <= X"A8C95D11";
when 16#044C# => romdata <= X"EF4B3F94";
when 16#044D# => romdata <= X"1E9772EB";
when 16#044E# => romdata <= X"A1F47212";
when 16#044F# => romdata <= X"C666F03F";
when 16#0450# => romdata <= X"01509FF6";
when 16#0451# => romdata <= X"99F74EDE";
when 16#0452# => romdata <= X"27182B6E";
when 16#0453# => romdata <= X"98AF49D1";
when 16#0454# => romdata <= X"BAACB41A";
when 16#0455# => romdata <= X"328A8C34";
when 16#0456# => romdata <= X"D6E8AA35";
when 16#0457# => romdata <= X"53DA3962";
when 16#0458# => romdata <= X"B27B0414";
when 16#0459# => romdata <= X"95F26932";
when 16#045A# => romdata <= X"8B6BFB4A";
when 16#045B# => romdata <= X"385CBB11";
when 16#045C# => romdata <= X"8953F3F0";
when 16#045D# => romdata <= X"09920EC4";
when 16#045E# => romdata <= X"C8590003";
when 16#045F# => romdata <= X"290DD60A";
when 16#0460# => romdata <= X"C89177BB";
when 16#0461# => romdata <= X"8C4BF753";
when 16#0462# => romdata <= X"CE723AEC";
when 16#0463# => romdata <= X"A392B8D9";
when 16#0464# => romdata <= X"E5E9E411";
when 16#0465# => romdata <= X"3DD062F2";
when 16#0466# => romdata <= X"94A77B6E";
when 16#0467# => romdata <= X"A9A0477E";
when 16#0468# => romdata <= X"697C04C7";
when 16#0469# => romdata <= X"87CE78A9";
when 16#046A# => romdata <= X"2C704409";
when 16#046B# => romdata <= X"D37D37B6";
when 16#046C# => romdata <= X"B3921286";
when 16#046D# => romdata <= X"98D0D8D4";
when 16#046E# => romdata <= X"CA101EB3";
when 16#046F# => romdata <= X"8B92F467";
when 16#0470# => romdata <= X"F0D86EFD";
when 16#0471# => romdata <= X"8759A141";
when 16#0472# => romdata <= X"62CAB55F";
when 16#0473# => romdata <= X"8C457E82";
when 16#0474# => romdata <= X"392790A5";
when 16#0475# => romdata <= X"BDDC8DD2";
when 16#0476# => romdata <= X"663944F8";
when 16#0477# => romdata <= X"80C95EC0";
when 16#0478# => romdata <= X"2FE5363B";
when 16#0479# => romdata <= X"06462399";
when 16#047A# => romdata <= X"4EE5D439";
when 16#047B# => romdata <= X"6C0E44DE";
when 16#047C# => romdata <= X"2A3D2258";
when 16#047D# => romdata <= X"30BA6160";
when 16#047E# => romdata <= X"270BCD11";
when 16#047F# => romdata <= X"0A942B00";
when 16#0480# => romdata <= X"92A0DEAB";
when 16#0481# => romdata <= X"A9875D4A";
when 16#0482# => romdata <= X"FAF99A24";
when 16#0483# => romdata <= X"C1D5F10E";
when 16#0484# => romdata <= X"BBE6DEF9";
when 16#0485# => romdata <= X"CAE5B0C8";
when 16#0486# => romdata <= X"5B2A0417";
when 16#0487# => romdata <= X"C1CC5D1A";
when 16#0488# => romdata <= X"5F71CD8F";
when 16#0489# => romdata <= X"8A4B013C";
when 16#048A# => romdata <= X"3F012C0A";
when 16#048B# => romdata <= X"19EE4A23";
when 16#048C# => romdata <= X"106CAB86";
when 16#048D# => romdata <= X"62C5A2A9";
when 16#048E# => romdata <= X"3A971D0B";
when 16#048F# => romdata <= X"6E487FC0";
when 16#0490# => romdata <= X"5BAF5C35";
when 16#0491# => romdata <= X"5A9520C9";
when 16#0492# => romdata <= X"148584CF";
when 16#0493# => romdata <= X"ED3EDD0F";
when 16#0494# => romdata <= X"38696E16";
when 16#0495# => romdata <= X"1E64378C";
when 16#0496# => romdata <= X"831C586D";
when 16#0497# => romdata <= X"9178A0CE";
when 16#0498# => romdata <= X"289A67F3";
when 16#0499# => romdata <= X"3AE68C02";
when 16#049A# => romdata <= X"A3CD138F";
when 16#049B# => romdata <= X"A09DF1CA";
when 16#049C# => romdata <= X"D01EFADF";
when 16#049D# => romdata <= X"C8BF6F54";
when 16#049E# => romdata <= X"07B79B18";
when 16#049F# => romdata <= X"D09C8280";
when 16#04A0# => romdata <= X"4736752D";
when 16#04A1# => romdata <= X"08A1FE09";
when 16#04A2# => romdata <= X"EB35F544";
when 16#04A3# => romdata <= X"E9F797EA";
when 16#04A4# => romdata <= X"36DB493B";
when 16#04A5# => romdata <= X"A947AA82";
when 16#04A6# => romdata <= X"513EB161";
when 16#04A7# => romdata <= X"5A356B5A";
when 16#04A8# => romdata <= X"A4308B0B";
when 16#04A9# => romdata <= X"4183E070";
when 16#04AA# => romdata <= X"EB494D62";
when 16#04AB# => romdata <= X"8159D2D4";
when 16#04AC# => romdata <= X"BC3CB110";
when 16#04AD# => romdata <= X"AB0CCB2E";
when 16#04AE# => romdata <= X"9E73B5B7";
when 16#04AF# => romdata <= X"EB567187";
when 16#04B0# => romdata <= X"621E72D9";
when 16#04B1# => romdata <= X"9F1FB785";
when 16#04B2# => romdata <= X"65917B28";
when 16#04B3# => romdata <= X"464A5F29";
when 16#04B4# => romdata <= X"DD8D6F98";
when 16#04B5# => romdata <= X"B6ED7030";
when 16#04B6# => romdata <= X"40A44B0A";
when 16#04B7# => romdata <= X"CD97F150";
when 16#04B8# => romdata <= X"49E009E8";
when 16#04B9# => romdata <= X"533FDB0B";
when 16#04BA# => romdata <= X"6DB2F258";
when 16#04BB# => romdata <= X"2E6BBF81";
when 16#04BC# => romdata <= X"D7B0EADC";
when 16#04BD# => romdata <= X"8F402508";
when 16#04BE# => romdata <= X"F6B8531A";
when 16#04BF# => romdata <= X"D13FD1C5";
when 16#04C0# => romdata <= X"5978A8A7";
when 16#04C1# => romdata <= X"0DF4E053";
when 16#04C2# => romdata <= X"DD475132";
when 16#04C3# => romdata <= X"D348AE27";
when 16#04C4# => romdata <= X"581370EC";
when 16#04C5# => romdata <= X"14A3E0F9";
when 16#04C6# => romdata <= X"6E0D70DA";
when 16#04C7# => romdata <= X"4946DEEC";
when 16#04C8# => romdata <= X"07600114";
when 16#04C9# => romdata <= X"04FDC5B4";
when 16#04CA# => romdata <= X"36CA7419";
when 16#04CB# => romdata <= X"D05895F5";
when 16#04CC# => romdata <= X"E0EAEEBC";
when 16#04CD# => romdata <= X"88C74947";
when 16#04CE# => romdata <= X"733BE991";
when 16#04CF# => romdata <= X"9F18CE70";
when 16#04D0# => romdata <= X"2887A6C4";
when 16#04D1# => romdata <= X"DF7C1927";
when 16#04D2# => romdata <= X"9B82FB64";
when 16#04D3# => romdata <= X"6090822D";
when 16#04D4# => romdata <= X"A9CD9C76";
when 16#04D5# => romdata <= X"53F6B931";
when 16#04D6# => romdata <= X"A337A28F";
when 16#04D7# => romdata <= X"7A4A01DE";
when 16#04D8# => romdata <= X"0CC0744F";
when 16#04D9# => romdata <= X"22961045";
when 16#04DA# => romdata <= X"F8EF8D4B";
when 16#04DB# => romdata <= X"30B07E5E";
when 16#04DC# => romdata <= X"DF5FA944";
when 16#04DD# => romdata <= X"EDCFB984";
when 16#04DE# => romdata <= X"1A9088AE";
when 16#04DF# => romdata <= X"82444FCB";
when 16#04E0# => romdata <= X"6E90B0E9";
when 16#04E1# => romdata <= X"C567A80E";
when 16#04E2# => romdata <= X"8C42EC71";
when 16#04E3# => romdata <= X"3D78132F";
when 16#04E4# => romdata <= X"37AD1D25";
when 16#04E5# => romdata <= X"92C31C93";
when 16#04E6# => romdata <= X"D2EAEFF3";
when 16#04E7# => romdata <= X"8AD94E5C";
when 16#04E8# => romdata <= X"0D94F949";
when 16#04E9# => romdata <= X"F47B88B0";
when 16#04EA# => romdata <= X"3BC1EA4E";
when 16#04EB# => romdata <= X"5EC9C7D9";
when 16#04EC# => romdata <= X"DF19ED20";
when 16#04ED# => romdata <= X"8B8E44FF";
when 16#04EE# => romdata <= X"DEB0B625";
when 16#04EF# => romdata <= X"F633C7DB";
when 16#04F0# => romdata <= X"1C826AA9";
when 16#04F1# => romdata <= X"E1C1309E";
when 16#04F2# => romdata <= X"5B14A0DD";
when 16#04F3# => romdata <= X"DB79714D";
when 16#04F4# => romdata <= X"FDCB5222";
when 16#04F5# => romdata <= X"1CEAD7E8";
when 16#04F6# => romdata <= X"A140DF78";
when 16#04F7# => romdata <= X"06F12715";
when 16#04F8# => romdata <= X"6478AFBE";
when 16#04F9# => romdata <= X"E922B8EC";
when 16#04FA# => romdata <= X"F322D66B";
when 16#04FB# => romdata <= X"48BEC434";
when 16#04FC# => romdata <= X"299BBB36";
when 16#04FD# => romdata <= X"B3BD9030";
when 16#04FE# => romdata <= X"467B7F2E";
when 16#04FF# => romdata <= X"BBDF3580";
when 16#0500# => romdata <= X"AFA7FBAC";
when 16#0501# => romdata <= X"93326D0C";
when 16#0502# => romdata <= X"36A38883";
when 16#0503# => romdata <= X"1B99DF4D";
when 16#0504# => romdata <= X"527BCE7C";
when 16#0505# => romdata <= X"9070F7B4";
when 16#0506# => romdata <= X"6B5FFCDE";
when 16#0507# => romdata <= X"B0738480";
when 16#0508# => romdata <= X"1AE5F86A";
when 16#0509# => romdata <= X"89934DE2";
when 16#050A# => romdata <= X"3DFE2C1A";
when 16#050B# => romdata <= X"D117797D";
when 16#050C# => romdata <= X"4FA1BBA6";
when 16#050D# => romdata <= X"175823B4";
when 16#050E# => romdata <= X"1166DBE9";
when 16#050F# => romdata <= X"D126F17B";
when 16#0510# => romdata <= X"3761E2C3";
when 16#0511# => romdata <= X"52AB396A";
when 16#0512# => romdata <= X"5A9CCEA4";
when 16#0513# => romdata <= X"2A5E9EA1";
when 16#0514# => romdata <= X"BE3497C0";
when 16#0515# => romdata <= X"A5BA9121";
when 16#0516# => romdata <= X"DB97F641";
when 16#0517# => romdata <= X"59AAC78E";
when 16#0518# => romdata <= X"62D7DEFF";
when 16#0519# => romdata <= X"3BF4CF73";
when 16#051A# => romdata <= X"F8CFBE04";
when 16#051B# => romdata <= X"5C9D39E4";
when 16#051C# => romdata <= X"1D5D208D";
when 16#051D# => romdata <= X"CC4B47CA";
when 16#051E# => romdata <= X"27E900C3";
when 16#051F# => romdata <= X"CD8FD140";
when 16#0520# => romdata <= X"8DC5E0F5";
when 16#0521# => romdata <= X"114F2FE6";
when 16#0522# => romdata <= X"5817D37C";
when 16#0523# => romdata <= X"D1452C49";
when 16#0524# => romdata <= X"67ACAA21";
when 16#0525# => romdata <= X"19FB8D60";
when 16#0526# => romdata <= X"E5E2FD8A";
when 16#0527# => romdata <= X"820D0AAD";
when 16#0528# => romdata <= X"D88B94D4";
when 16#0529# => romdata <= X"0435C095";
when 16#052A# => romdata <= X"568AE639";
when 16#052B# => romdata <= X"4D3B97C8";
when 16#052C# => romdata <= X"35BA868A";
when 16#052D# => romdata <= X"83083316";
when 16#052E# => romdata <= X"C49C75D3";
when 16#052F# => romdata <= X"6EFDD851";
when 16#0530# => romdata <= X"65BE74A4";
when 16#0531# => romdata <= X"F2B2D212";
when 16#0532# => romdata <= X"95EBCE08";
when 16#0533# => romdata <= X"5D9C4A47";
when 16#0534# => romdata <= X"58FDD9CF";
when 16#0535# => romdata <= X"71B97FDF";
when 16#0536# => romdata <= X"34B7B63A";
when 16#0537# => romdata <= X"5E9691DB";
when 16#0538# => romdata <= X"DAB834D8";
when 16#0539# => romdata <= X"7D5B52CA";
when 16#053A# => romdata <= X"9A53032F";
when 16#053B# => romdata <= X"FE821398";
when 16#053C# => romdata <= X"616EA926";
when 16#053D# => romdata <= X"25C2DB63";
when 16#053E# => romdata <= X"3E379119";
when 16#053F# => romdata <= X"87083A3B";
when 16#0540# => romdata <= X"49A86FC5";
when 16#0541# => romdata <= X"62FB1264";
when 16#0542# => romdata <= X"A75643A5";
when 16#0543# => romdata <= X"FB6E9716";
when 16#0544# => romdata <= X"2E16ACCE";
when 16#0545# => romdata <= X"353227FE";
when 16#0546# => romdata <= X"61A859E0";
when 16#0547# => romdata <= X"94C2359B";
when 16#0548# => romdata <= X"C4645946";
when 16#0549# => romdata <= X"AD12AE5C";
when 16#054A# => romdata <= X"39C70F59";
when 16#054B# => romdata <= X"EA7B597A";
when 16#054C# => romdata <= X"9B3372C2";
when 16#054D# => romdata <= X"3AA57814";
when 16#054E# => romdata <= X"6781A611";
when 16#054F# => romdata <= X"63C92816";
when 16#0550# => romdata <= X"627DD9C4";
when 16#0551# => romdata <= X"BF178808";
when 16#0552# => romdata <= X"7821F9F5";
when 16#0553# => romdata <= X"D41B75A0";
when 16#0554# => romdata <= X"F251B06B";
when 16#0555# => romdata <= X"BD3E29AB";
when 16#0556# => romdata <= X"D41E72A1";
when 16#0557# => romdata <= X"D48323D2";
when 16#0558# => romdata <= X"4E2AD6F1";
when 16#0559# => romdata <= X"1C2D4967";
when 16#055A# => romdata <= X"8CC04FCF";
when 16#055B# => romdata <= X"6B0EFD33";
when 16#055C# => romdata <= X"BE6DDCD4";
when 16#055D# => romdata <= X"44F5CA02";
when 16#055E# => romdata <= X"FE158112";
when 16#055F# => romdata <= X"631F782C";
when 16#0560# => romdata <= X"A7B0C5F3";
when 16#0561# => romdata <= X"607ED807";
when 16#0562# => romdata <= X"495BF8E8";
when 16#0563# => romdata <= X"2C5EA51A";
when 16#0564# => romdata <= X"922FE28C";
when 16#0565# => romdata <= X"8168D984";
when 16#0566# => romdata <= X"4859E7A3";
when 16#0567# => romdata <= X"EE3038C5";
when 16#0568# => romdata <= X"D1D4BB4B";
when 16#0569# => romdata <= X"13406C34";
when 16#056A# => romdata <= X"0894DF46";
when 16#056B# => romdata <= X"40683673";
when 16#056C# => romdata <= X"9E31D010";
when 16#056D# => romdata <= X"82BC8448";
when 16#056E# => romdata <= X"9592DA0E";
when 16#056F# => romdata <= X"985630CE";
when 16#0570# => romdata <= X"C40702A3";
when 16#0571# => romdata <= X"6DDC301B";
when 16#0572# => romdata <= X"3AE1E810";
when 16#0573# => romdata <= X"1786FEDB";
when 16#0574# => romdata <= X"F752F9E1";
when 16#0575# => romdata <= X"75287C23";
when 16#0576# => romdata <= X"9C18FC25";
when 16#0577# => romdata <= X"795BCB47";
when 16#0578# => romdata <= X"9DEF59C5";
when 16#0579# => romdata <= X"8C373313";
when 16#057A# => romdata <= X"C02A1BC5";
when 16#057B# => romdata <= X"F16355E2";
when 16#057C# => romdata <= X"B50EFB58";
when 16#057D# => romdata <= X"85567086";
when 16#057E# => romdata <= X"8728B902";
when 16#057F# => romdata <= X"653ED800";
when 16#0580# => romdata <= X"943CAEB6";
when 16#0581# => romdata <= X"80AA3E63";
when 16#0582# => romdata <= X"0755DF32";
when 16#0583# => romdata <= X"F406F403";
when 16#0584# => romdata <= X"D7AF5E48";
when 16#0585# => romdata <= X"A710274D";
when 16#0586# => romdata <= X"3887A7AA";
when 16#0587# => romdata <= X"C8EA6744";
when 16#0588# => romdata <= X"B889F2E0";
when 16#0589# => romdata <= X"CD2033DE";
when 16#058A# => romdata <= X"C0B434A9";
when 16#058B# => romdata <= X"591254A0";
when 16#058C# => romdata <= X"AA68C5C9";
when 16#058D# => romdata <= X"BF11D357";
when 16#058E# => romdata <= X"65E86B43";
when 16#058F# => romdata <= X"7497D84E";
when 16#0590# => romdata <= X"5DCBBC0C";
when 16#0591# => romdata <= X"0C580CE9";
when 16#0592# => romdata <= X"BC50EC63";
when 16#0593# => romdata <= X"82AD74DB";
when 16#0594# => romdata <= X"02C2C233";
when 16#0595# => romdata <= X"B7BB0751";
when 16#0596# => romdata <= X"7D480562";
when 16#0597# => romdata <= X"26C505AB";
when 16#0598# => romdata <= X"F2DD244F";
when 16#0599# => romdata <= X"6BBAA233";
when 16#059A# => romdata <= X"13D57055";
when 16#059B# => romdata <= X"8B065E42";
when 16#059C# => romdata <= X"32776807";
when 16#059D# => romdata <= X"8EFDB53D";
when 16#059E# => romdata <= X"C465DA03";
when 16#059F# => romdata <= X"8E3B216D";
when 16#05A0# => romdata <= X"990EE951";
when 16#05A1# => romdata <= X"B3E13D3C";
when 16#05A2# => romdata <= X"1CD55999";
when 16#05A3# => romdata <= X"8F77BCDC";
when 16#05A4# => romdata <= X"D2B9522B";
when 16#05A5# => romdata <= X"6F1DC5E1";
when 16#05A6# => romdata <= X"2C912EAE";
when 16#05A7# => romdata <= X"F574AFD6";
when 16#05A8# => romdata <= X"9C251F9B";
when 16#05A9# => romdata <= X"2532501A";
when 16#05AA# => romdata <= X"B9F4B3B2";
when 16#05AB# => romdata <= X"223D0F89";
when 16#05AC# => romdata <= X"20BD562B";
when 16#05AD# => romdata <= X"0D358A14";
when 16#05AE# => romdata <= X"AB0D196D";
when 16#05AF# => romdata <= X"F6337D1C";
when 16#05B0# => romdata <= X"96CDB47A";
when 16#05B1# => romdata <= X"FEC6F81D";
when 16#05B2# => romdata <= X"ED4B5773";
when 16#05B3# => romdata <= X"864DA32F";
when 16#05B4# => romdata <= X"CCD06B9A";
when 16#05B5# => romdata <= X"C53C122B";
when 16#05B6# => romdata <= X"2C6327E6";
when 16#05B7# => romdata <= X"E5EFE227";
when 16#05B8# => romdata <= X"DE4893FF";
when 16#05B9# => romdata <= X"15BBB225";
when 16#05BA# => romdata <= X"7FAEA836";
when 16#05BB# => romdata <= X"E99676EE";
when 16#05BC# => romdata <= X"32BF6FC1";
when 16#05BD# => romdata <= X"4D4F56EA";
when 16#05BE# => romdata <= X"191B8A38";
when 16#05BF# => romdata <= X"70374A08";
when 16#05C0# => romdata <= X"67C49EB0";
when 16#05C1# => romdata <= X"015D1C6D";
when 16#05C2# => romdata <= X"07B87A36";
when 16#05C3# => romdata <= X"BFDD1DCE";
when 16#05C4# => romdata <= X"F20EA7B8";
when 16#05C5# => romdata <= X"0D997CBE";
when 16#05C6# => romdata <= X"2D83EB56";
when 16#05C7# => romdata <= X"30F2EE6F";
when 16#05C8# => romdata <= X"73B0D507";
when 16#05C9# => romdata <= X"00C89E4F";
when 16#05CA# => romdata <= X"32438F55";
when 16#05CB# => romdata <= X"41360683";
when 16#05CC# => romdata <= X"DF11DA6E";
when 16#05CD# => romdata <= X"7A3C1E7D";
when 16#05CE# => romdata <= X"B2A87800";
when 16#05CF# => romdata <= X"D9245BF0";
when 16#05D0# => romdata <= X"4278C990";
when 16#05D1# => romdata <= X"A8DC9CD8";
when 16#05D2# => romdata <= X"6DEF39CB";
when 16#05D3# => romdata <= X"C6D4BC00";
when 16#05D4# => romdata <= X"FF13BBE1";
when 16#05D5# => romdata <= X"32F9D866";
when 16#05D6# => romdata <= X"81A8913B";
when 16#05D7# => romdata <= X"E787CFC6";
when 16#05D8# => romdata <= X"9C353048";
when 16#05D9# => romdata <= X"24788716";
when 16#05DA# => romdata <= X"D52DC74C";
when 16#05DB# => romdata <= X"EA399E06";
when 16#05DC# => romdata <= X"DE624178";
when 16#05DD# => romdata <= X"0447C74D";
when 16#05DE# => romdata <= X"A8E94713";
when 16#05DF# => romdata <= X"4D8B2FAA";
when 16#05E0# => romdata <= X"9648D6D5";
when 16#05E1# => romdata <= X"F34C9D60";
when 16#05E2# => romdata <= X"AE5973B5";
when 16#05E3# => romdata <= X"BB018779";
when 16#05E4# => romdata <= X"6D589C8F";
when 16#05E5# => romdata <= X"DDD76756";
when 16#05E6# => romdata <= X"71F28C04";
when 16#05E7# => romdata <= X"AC1038D0";
when 16#05E8# => romdata <= X"92519806";
when 16#05E9# => romdata <= X"83CB712F";
when 16#05EA# => romdata <= X"694D7C5B";
when 16#05EB# => romdata <= X"0D5B1DE8";
when 16#05EC# => romdata <= X"6CD10EAC";
when 16#05ED# => romdata <= X"4EA04A55";
when 16#05EE# => romdata <= X"BA8803D7";
when 16#05EF# => romdata <= X"8249BEF5";
when 16#05F0# => romdata <= X"16D38067";
when 16#05F1# => romdata <= X"890105A2";
when 16#05F2# => romdata <= X"3212E728";
when 16#05F3# => romdata <= X"79FA267A";
when 16#05F4# => romdata <= X"8B4F0455";
when 16#05F5# => romdata <= X"A81F17CF";
when 16#05F6# => romdata <= X"D3E5DDC5";
when 16#05F7# => romdata <= X"5E5D4FE0";
when 16#05F8# => romdata <= X"0F83E186";
when 16#05F9# => romdata <= X"26C676DA";
when 16#05FA# => romdata <= X"F00E6AAF";
when 16#05FB# => romdata <= X"CC23D209";
when 16#05FC# => romdata <= X"DEE0B0FC";
when 16#05FD# => romdata <= X"6C2AE4DE";
when 16#05FE# => romdata <= X"161D1301";
when 16#05FF# => romdata <= X"7ADB5D80";
when 16#0600# => romdata <= X"E5E70E78";
when 16#0601# => romdata <= X"37D09441";
when 16#0602# => romdata <= X"6558C044";
when 16#0603# => romdata <= X"D758383E";
when 16#0604# => romdata <= X"DF5755C8";
when 16#0605# => romdata <= X"0921218A";
when 16#0606# => romdata <= X"BE76E51F";
when 16#0607# => romdata <= X"B93249E2";
when 16#0608# => romdata <= X"11A38FE6";
when 16#0609# => romdata <= X"D07A7DFD";
when 16#060A# => romdata <= X"2263E6E3";
when 16#060B# => romdata <= X"D8DA0F92";
when 16#060C# => romdata <= X"1A06A606";
when 16#060D# => romdata <= X"B804DE7A";
when 16#060E# => romdata <= X"C3FD097E";
when 16#060F# => romdata <= X"5F96EFCC";
when 16#0610# => romdata <= X"0F544D62";
when 16#0611# => romdata <= X"3FD6F43F";
when 16#0612# => romdata <= X"B88CEA7C";
when 16#0613# => romdata <= X"341E901C";
when 16#0614# => romdata <= X"D47A7E24";
when 16#0615# => romdata <= X"AB141E99";
when 16#0616# => romdata <= X"8FE41CA8";
when 16#0617# => romdata <= X"7CD6CE8C";
when 16#0618# => romdata <= X"1870D9AB";
when 16#0619# => romdata <= X"B6503BF7";
when 16#061A# => romdata <= X"E8B65908";
when 16#061B# => romdata <= X"4BAF2237";
when 16#061C# => romdata <= X"DFC94F35";
when 16#061D# => romdata <= X"C9884C7F";
when 16#061E# => romdata <= X"44B87120";
when 16#061F# => romdata <= X"BFCB2986";
when 16#0620# => romdata <= X"96E613C1";
when 16#0621# => romdata <= X"656AC489";
when 16#0622# => romdata <= X"9781A948";
when 16#0623# => romdata <= X"69EC603B";
when 16#0624# => romdata <= X"4D386653";
when 16#0625# => romdata <= X"37CA8593";
when 16#0626# => romdata <= X"AAC83AD8";
when 16#0627# => romdata <= X"BECE1030";
when 16#0628# => romdata <= X"2E4B4694";
when 16#0629# => romdata <= X"237E96CC";
when 16#062A# => romdata <= X"D3AD9CD5";
when 16#062B# => romdata <= X"F8EC039A";
when 16#062C# => romdata <= X"1D1A4210";
when 16#062D# => romdata <= X"71637140";
when 16#062E# => romdata <= X"4C5C3FF3";
when 16#062F# => romdata <= X"75CB3A33";
when 16#0630# => romdata <= X"559B1C1A";
when 16#0631# => romdata <= X"239F2E44";
when 16#0632# => romdata <= X"2C8EB033";
when 16#0633# => romdata <= X"501BB290";
when 16#0634# => romdata <= X"434BE734";
when 16#0635# => romdata <= X"89F71696";
when 16#0636# => romdata <= X"53939894";
when 16#0637# => romdata <= X"22CF4D57";
when 16#0638# => romdata <= X"E5B4F3C7";
when 16#0639# => romdata <= X"6AF3C5E8";
when 16#063A# => romdata <= X"999E6180";
when 16#063B# => romdata <= X"5134B9D7";
when 16#063C# => romdata <= X"C40BFB59";
when 16#063D# => romdata <= X"D0D0FD30";
when 16#063E# => romdata <= X"F98567E6";
when 16#063F# => romdata <= X"6D6148D6";
when 16#0640# => romdata <= X"AA64F74A";
when 16#0641# => romdata <= X"22C50AE4";
when 16#0642# => romdata <= X"9D6B1ECC";
when 16#0643# => romdata <= X"6BB5A002";
when 16#0644# => romdata <= X"ABF38FF2";
when 16#0645# => romdata <= X"E2436766";
when 16#0646# => romdata <= X"B86BDDE7";
when 16#0647# => romdata <= X"D95DD6E0";
when 16#0648# => romdata <= X"2AB0FF06";
when 16#0649# => romdata <= X"E7BC22CE";
when 16#064A# => romdata <= X"C98D55AA";
when 16#064B# => romdata <= X"2BC4D7B9";
when 16#064C# => romdata <= X"1C36B2FF";
when 16#064D# => romdata <= X"9F525A74";
when 16#064E# => romdata <= X"423498D5";
when 16#064F# => romdata <= X"48318509";
when 16#0650# => romdata <= X"320FCCBC";
when 16#0651# => romdata <= X"A582A6C2";
when 16#0652# => romdata <= X"996AF653";
when 16#0653# => romdata <= X"8422FF0D";
when 16#0654# => romdata <= X"F060C0BC";
when 16#0655# => romdata <= X"7356B085";
when 16#0656# => romdata <= X"0A139AC3";
when 16#0657# => romdata <= X"91433812";
when 16#0658# => romdata <= X"7B786F4B";
when 16#0659# => romdata <= X"C58CEB60";
when 16#065A# => romdata <= X"64DA8813";
when 16#065B# => romdata <= X"76A147DF";
when 16#065C# => romdata <= X"F53C6700";
when 16#065D# => romdata <= X"BD13316A";
when 16#065E# => romdata <= X"5874A75D";
when 16#065F# => romdata <= X"7B9713DF";
when 16#0660# => romdata <= X"54FBB393";
when 16#0661# => romdata <= X"BAFAAD7F";
when 16#0662# => romdata <= X"7B0710C0";
when 16#0663# => romdata <= X"49A0B6A8";
when 16#0664# => romdata <= X"B76A9956";
when 16#0665# => romdata <= X"BF6185BA";
when 16#0666# => romdata <= X"39D9C347";
when 16#0667# => romdata <= X"D179FBB9";
when 16#0668# => romdata <= X"7D4FED68";
when 16#0669# => romdata <= X"F47DB5AC";
when 16#066A# => romdata <= X"8E0D4012";
when 16#066B# => romdata <= X"2EA51C4A";
when 16#066C# => romdata <= X"1F88D231";
when 16#066D# => romdata <= X"53DF651A";
when 16#066E# => romdata <= X"180C2AD4";
when 16#066F# => romdata <= X"56ABD7F8";
when 16#0670# => romdata <= X"51B65B22";
when 16#0671# => romdata <= X"0A72BA48";
when 16#0672# => romdata <= X"FAD04363";
when 16#0673# => romdata <= X"32E4EE7E";
when 16#0674# => romdata <= X"DC554B7D";
when 16#0675# => romdata <= X"75481EE0";
when 16#0676# => romdata <= X"5C3D3453";
when 16#0677# => romdata <= X"D760E909";
when 16#0678# => romdata <= X"9DD27B32";
when 16#0679# => romdata <= X"4DD84C0C";
when 16#067A# => romdata <= X"0C4DEC4C";
when 16#067B# => romdata <= X"674D2528";
when 16#067C# => romdata <= X"4B16410F";
when 16#067D# => romdata <= X"959FBD09";
when 16#067E# => romdata <= X"D9DF09CE";
when 16#067F# => romdata <= X"875601E0";
when 16#0680# => romdata <= X"BFDBC82A";
when 16#0681# => romdata <= X"CB4FBCD5";
when 16#0682# => romdata <= X"A90C5967";
when 16#0683# => romdata <= X"EB2FED59";
when 16#0684# => romdata <= X"7A02607F";
when 16#0685# => romdata <= X"42600212";
when 16#0686# => romdata <= X"8AF4B389";
when 16#0687# => romdata <= X"42C85AF4";
when 16#0688# => romdata <= X"472B3CBF";
when 16#0689# => romdata <= X"3B183F24";
when 16#068A# => romdata <= X"0E049B25";
when 16#068B# => romdata <= X"1713740A";
when 16#068C# => romdata <= X"31117F10";
when 16#068D# => romdata <= X"8936631F";
when 16#068E# => romdata <= X"D0F11C5F";
when 16#068F# => romdata <= X"79325BD6";
when 16#0690# => romdata <= X"677A2C2B";
when 16#0691# => romdata <= X"242965AE";
when 16#0692# => romdata <= X"FC147D93";
when 16#0693# => romdata <= X"358730AA";
when 16#0694# => romdata <= X"78249120";
when 16#0695# => romdata <= X"9CBE6009";
when 16#0696# => romdata <= X"76F56030";
when 16#0697# => romdata <= X"753CC979";
when 16#0698# => romdata <= X"C240A196";
when 16#0699# => romdata <= X"647CD9EA";
when 16#069A# => romdata <= X"B1DD0380";
when 16#069B# => romdata <= X"E59BC790";
when 16#069C# => romdata <= X"5EF740C3";
when 16#069D# => romdata <= X"411AD9DD";
when 16#069E# => romdata <= X"72027D0D";
when 16#069F# => romdata <= X"3DD6DEB0";
when 16#06A0# => romdata <= X"F5F3C18F";
when 16#06A1# => romdata <= X"6D6F7BC5";
when 16#06A2# => romdata <= X"9B758E7E";
when 16#06A3# => romdata <= X"262937B4";
when 16#06A4# => romdata <= X"599B3856";
when 16#06A5# => romdata <= X"7C147ED2";
when 16#06A6# => romdata <= X"689BA2CF";
when 16#06A7# => romdata <= X"23736CAF";
when 16#06A8# => romdata <= X"55B69258";
when 16#06A9# => romdata <= X"27E2B70E";
when 16#06AA# => romdata <= X"47D3813C";
when 16#06AB# => romdata <= X"94C85298";
when 16#06AC# => romdata <= X"BD6B49C9";
when 16#06AD# => romdata <= X"7B5D0221";
when 16#06AE# => romdata <= X"BE9E3164";
when 16#06AF# => romdata <= X"B6FA3D95";
when 16#06B0# => romdata <= X"AECF53AF";
when 16#06B1# => romdata <= X"17096609";
when 16#06B2# => romdata <= X"0F19A69E";
when 16#06B3# => romdata <= X"75F188BD";
when 16#06B4# => romdata <= X"2556B4E8";
when 16#06B5# => romdata <= X"FA7DC4AC";
when 16#06B6# => romdata <= X"6C34F542";
when 16#06B7# => romdata <= X"97C06C2A";
when 16#06B8# => romdata <= X"96DD1C45";
when 16#06B9# => romdata <= X"B42E6175";
when 16#06BA# => romdata <= X"B5E87845";
when 16#06BB# => romdata <= X"68F7FEF0";
when 16#06BC# => romdata <= X"B6C124C5";
when 16#06BD# => romdata <= X"019CB577";
when 16#06BE# => romdata <= X"B374941E";
when 16#06BF# => romdata <= X"8515CCFC";
when 16#06C0# => romdata <= X"21F46D18";
when 16#06C1# => romdata <= X"8BDD2C22";
when 16#06C2# => romdata <= X"84C68887";
when 16#06C3# => romdata <= X"9A5BEC50";
when 16#06C4# => romdata <= X"CCB97FAE";
when 16#06C5# => romdata <= X"E1F75580";
when 16#06C6# => romdata <= X"577498D5";
when 16#06C7# => romdata <= X"09D3DE16";
when 16#06C8# => romdata <= X"1BE216C8";
when 16#06C9# => romdata <= X"73B29E17";
when 16#06CA# => romdata <= X"8CE17DCA";
when 16#06CB# => romdata <= X"CC5E9E22";
when 16#06CC# => romdata <= X"24D05ECC";
when 16#06CD# => romdata <= X"842FBEAB";
when 16#06CE# => romdata <= X"82A75AAA";
when 16#06CF# => romdata <= X"20769FD8";
when 16#06D0# => romdata <= X"1131CFB6";
when 16#06D1# => romdata <= X"9D5E3540";
when 16#06D2# => romdata <= X"9273CA10";
when 16#06D3# => romdata <= X"6FFB27F6";
when 16#06D4# => romdata <= X"3FF997CB";
when 16#06D5# => romdata <= X"500F161F";
when 16#06D6# => romdata <= X"6DD3A8BF";
when 16#06D7# => romdata <= X"A5719F00";
when 16#06D8# => romdata <= X"4EC17860";
when 16#06D9# => romdata <= X"152D3290";
when 16#06DA# => romdata <= X"951678A1";
when 16#06DB# => romdata <= X"31E4F3D3";
when 16#06DC# => romdata <= X"AB34CFFC";
when 16#06DD# => romdata <= X"AB2967ED";
when 16#06DE# => romdata <= X"9D8F1BB9";
when 16#06DF# => romdata <= X"87950306";
when 16#06E0# => romdata <= X"BD28751D";
when 16#06E1# => romdata <= X"2AEAB05F";
when 16#06E2# => romdata <= X"071B0857";
when 16#06E3# => romdata <= X"4EFCA01E";
when 16#06E4# => romdata <= X"5386E04F";
when 16#06E5# => romdata <= X"727BF413";
when 16#06E6# => romdata <= X"A8279E93";
when 16#06E7# => romdata <= X"92EFB64D";
when 16#06E8# => romdata <= X"9AEE0087";
when 16#06E9# => romdata <= X"7C76C81E";
when 16#06EA# => romdata <= X"BC861E2B";
when 16#06EB# => romdata <= X"484A2D35";
when 16#06EC# => romdata <= X"E592A131";
when 16#06ED# => romdata <= X"726CAE61";
when 16#06EE# => romdata <= X"BC010B95";
when 16#06EF# => romdata <= X"4721A82C";
when 16#06F0# => romdata <= X"968CC6F3";
when 16#06F1# => romdata <= X"84D9BBB9";
when 16#06F2# => romdata <= X"9B4E8784";
when 16#06F3# => romdata <= X"6D10B94E";
when 16#06F4# => romdata <= X"E31F6484";
when 16#06F5# => romdata <= X"6A5834DF";
when 16#06F6# => romdata <= X"73A67A26";
when 16#06F7# => romdata <= X"7B894B1C";
when 16#06F8# => romdata <= X"06242D75";
when 16#06F9# => romdata <= X"0F15F3E1";
when 16#06FA# => romdata <= X"E850A11C";
when 16#06FB# => romdata <= X"B2E2B161";
when 16#06FC# => romdata <= X"55008F91";
when 16#06FD# => romdata <= X"493AB3BC";
when 16#06FE# => romdata <= X"77CF9BE5";
when 16#06FF# => romdata <= X"6F9DB200";
when 16#0700# => romdata <= X"D64F3D1C";
when 16#0701# => romdata <= X"B54CDB91";
when 16#0702# => romdata <= X"43D9E701";
when 16#0703# => romdata <= X"BD313779";
when 16#0704# => romdata <= X"C09DA064";
when 16#0705# => romdata <= X"D9A85674";
when 16#0706# => romdata <= X"CCB53B0C";
when 16#0707# => romdata <= X"5B4446C1";
when 16#0708# => romdata <= X"22098961";
when 16#0709# => romdata <= X"D5EFFD6A";
when 16#070A# => romdata <= X"85537486";
when 16#070B# => romdata <= X"D5EB26B5";
when 16#070C# => romdata <= X"E18FFBFB";
when 16#070D# => romdata <= X"8E6EF16C";
when 16#070E# => romdata <= X"2DD2C02E";
when 16#070F# => romdata <= X"C7C07DB1";
when 16#0710# => romdata <= X"5CE33015";
when 16#0711# => romdata <= X"A636E225";
when 16#0712# => romdata <= X"F744C963";
when 16#0713# => romdata <= X"BF0653A8";
when 16#0714# => romdata <= X"9A48F1AF";
when 16#0715# => romdata <= X"04819E27";
when 16#0716# => romdata <= X"3A3AE1F5";
when 16#0717# => romdata <= X"538AD574";
when 16#0718# => romdata <= X"D553C5A0";
when 16#0719# => romdata <= X"DEF47B55";
when 16#071A# => romdata <= X"2957037B";
when 16#071B# => romdata <= X"CA921970";
when 16#071C# => romdata <= X"C76DDEF7";
when 16#071D# => romdata <= X"4BA083ED";
when 16#071E# => romdata <= X"55363760";
when 16#071F# => romdata <= X"A6780612";
when 16#0720# => romdata <= X"C075964B";
when 16#0721# => romdata <= X"083B4F67";
when 16#0722# => romdata <= X"4EA0012F";
when 16#0723# => romdata <= X"D1DF09F0";
when 16#0724# => romdata <= X"445CE75A";
when 16#0725# => romdata <= X"69885209";
when 16#0726# => romdata <= X"8206868A";
when 16#0727# => romdata <= X"D8241E3B";
when 16#0728# => romdata <= X"319FA8D2";
when 16#0729# => romdata <= X"D86DE6E7";
when 16#072A# => romdata <= X"631DF1AE";
when 16#072B# => romdata <= X"B571F967";
when 16#072C# => romdata <= X"6323E062";
when 16#072D# => romdata <= X"7307F6D8";
when 16#072E# => romdata <= X"F569536A";
when 16#072F# => romdata <= X"758DE5ED";
when 16#0730# => romdata <= X"AAEDF80F";
when 16#0731# => romdata <= X"4335E3AF";
when 16#0732# => romdata <= X"CAD07F70";
when 16#0733# => romdata <= X"AAD5CD08";
when 16#0734# => romdata <= X"CCA1E71B";
when 16#0735# => romdata <= X"84D4D979";
when 16#0736# => romdata <= X"31F924AC";
when 16#0737# => romdata <= X"0010C081";
when 16#0738# => romdata <= X"1972ACAA";
when 16#0739# => romdata <= X"414B89FF";
when 16#073A# => romdata <= X"F7917E65";
when 16#073B# => romdata <= X"3BB31E9C";
when 16#073C# => romdata <= X"DFC72595";
when 16#073D# => romdata <= X"066C662C";
when 16#073E# => romdata <= X"DB9BBC96";
when 16#073F# => romdata <= X"152D46BF";
when 16#0740# => romdata <= X"4E8C15A8";
when 16#0741# => romdata <= X"D34809C4";
when 16#0742# => romdata <= X"B9D79871";
when 16#0743# => romdata <= X"BDF0B63F";
when 16#0744# => romdata <= X"A294F2D6";
when 16#0745# => romdata <= X"67624F6E";
when 16#0746# => romdata <= X"0210CD40";
when 16#0747# => romdata <= X"C92F1C03";
when 16#0748# => romdata <= X"3C3D8BF0";
when 16#0749# => romdata <= X"89EF85C4";
when 16#074A# => romdata <= X"F571CA72";
when 16#074B# => romdata <= X"7C71B231";
when 16#074C# => romdata <= X"28A9B0FF";
when 16#074D# => romdata <= X"D70CEA93";
when 16#074E# => romdata <= X"C316FC4D";
when 16#074F# => romdata <= X"69D79B08";
when 16#0750# => romdata <= X"9107F292";
when 16#0751# => romdata <= X"E03425B2";
when 16#0752# => romdata <= X"552AF5AA";
when 16#0753# => romdata <= X"18FDB9AF";
when 16#0754# => romdata <= X"86EA1972";
when 16#0755# => romdata <= X"B66B1276";
when 16#0756# => romdata <= X"B0911943";
when 16#0757# => romdata <= X"7E4DFB8F";
when 16#0758# => romdata <= X"8E3972D9";
when 16#0759# => romdata <= X"1A93816E";
when 16#075A# => romdata <= X"BD7D8D71";
when 16#075B# => romdata <= X"5CB47EFA";
when 16#075C# => romdata <= X"742938B0";
when 16#075D# => romdata <= X"B49FA27A";
when 16#075E# => romdata <= X"291B0DEA";
when 16#075F# => romdata <= X"1DF0B8F8";
when 16#0760# => romdata <= X"78332103";
when 16#0761# => romdata <= X"F45A9993";
when 16#0762# => romdata <= X"6896181E";
when 16#0763# => romdata <= X"51FF65C6";
when 16#0764# => romdata <= X"995F57C2";
when 16#0765# => romdata <= X"C54B8002";
when 16#0766# => romdata <= X"DEFF54B0";
when 16#0767# => romdata <= X"EB3131EE";
when 16#0768# => romdata <= X"7D61030C";
when 16#0769# => romdata <= X"33B5502C";
when 16#076A# => romdata <= X"49CF398F";
when 16#076B# => romdata <= X"EC4B7615";
when 16#076C# => romdata <= X"D16FCEA3";
when 16#076D# => romdata <= X"E8EA12BF";
when 16#076E# => romdata <= X"B311D426";
when 16#076F# => romdata <= X"331A0660";
when 16#0770# => romdata <= X"6CA5A066";
when 16#0771# => romdata <= X"707C4AF8";
when 16#0772# => romdata <= X"D1048F1C";
when 16#0773# => romdata <= X"A6065FBE";
when 16#0774# => romdata <= X"506D06C6";
when 16#0775# => romdata <= X"C00D5D25";
when 16#0776# => romdata <= X"0E227265";
when 16#0777# => romdata <= X"551867A6";
when 16#0778# => romdata <= X"816F0515";
when 16#0779# => romdata <= X"5FCBDE24";
when 16#077A# => romdata <= X"D4AD115B";
when 16#077B# => romdata <= X"DA98AFE0";
when 16#077C# => romdata <= X"8B12A1F3";
when 16#077D# => romdata <= X"2E7C2ADA";
when 16#077E# => romdata <= X"801FFB78";
when 16#077F# => romdata <= X"BA057260";
when 16#0780# => romdata <= X"9D6AD988";
when 16#0781# => romdata <= X"9EA02FC9";
when 16#0782# => romdata <= X"A5894929";
when 16#0783# => romdata <= X"0975DB0F";
when 16#0784# => romdata <= X"512EB37C";
when 16#0785# => romdata <= X"8156CC9F";
when 16#0786# => romdata <= X"1242B9E4";
when 16#0787# => romdata <= X"5F22CC1D";
when 16#0788# => romdata <= X"6ED1CBCB";
when 16#0789# => romdata <= X"6CB24581";
when 16#078A# => romdata <= X"1CE72926";
when 16#078B# => romdata <= X"1641FDF7";
when 16#078C# => romdata <= X"A8F389BA";
when 16#078D# => romdata <= X"FD7311B8";
when 16#078E# => romdata <= X"BD689E02";
when 16#078F# => romdata <= X"409F6E8C";
when 16#0790# => romdata <= X"5202F466";
when 16#0791# => romdata <= X"349EA466";
when 16#0792# => romdata <= X"E5398B29";
when 16#0793# => romdata <= X"C8CB126D";
when 16#0794# => romdata <= X"9600D896";
when 16#0795# => romdata <= X"97A07A69";
when 16#0796# => romdata <= X"00FE8D95";
when 16#0797# => romdata <= X"951903DA";
when 16#0798# => romdata <= X"A3419839";
when 16#0799# => romdata <= X"C2D9E35E";
when 16#079A# => romdata <= X"9F4EABC0";
when 16#079B# => romdata <= X"4C9006EA";
when 16#079C# => romdata <= X"585F544C";
when 16#079D# => romdata <= X"7163A33D";
when 16#079E# => romdata <= X"7E78DE28";
when 16#079F# => romdata <= X"256B7B89";
when 16#07A0# => romdata <= X"78FE018C";
when 16#07A1# => romdata <= X"B529F7F7";
when 16#07A2# => romdata <= X"9BBF66DC";
when 16#07A3# => romdata <= X"4F0DECE8";
when 16#07A4# => romdata <= X"0AE3C2CD";
when 16#07A5# => romdata <= X"479D78C4";
when 16#07A6# => romdata <= X"480E4DE2";
when 16#07A7# => romdata <= X"F06C70E5";
when 16#07A8# => romdata <= X"FEBDFB4E";
when 16#07A9# => romdata <= X"CAEDC2E7";
when 16#07AA# => romdata <= X"BD891AD6";
when 16#07AB# => romdata <= X"C91A7C24";
when 16#07AC# => romdata <= X"46F1B13B";
when 16#07AD# => romdata <= X"340B7160";
when 16#07AE# => romdata <= X"782F6CC5";
when 16#07AF# => romdata <= X"B45F9787";
when 16#07B0# => romdata <= X"CF1B0985";
when 16#07B1# => romdata <= X"202DDF02";
when 16#07B2# => romdata <= X"EC552A6D";
when 16#07B3# => romdata <= X"C41325FD";
when 16#07B4# => romdata <= X"8D31A431";
when 16#07B5# => romdata <= X"6C13C56F";
when 16#07B6# => romdata <= X"7157134F";
when 16#07B7# => romdata <= X"66E1D103";
when 16#07B8# => romdata <= X"CC3AA7EB";
when 16#07B9# => romdata <= X"951C9209";
when 16#07BA# => romdata <= X"4EB4409E";
when 16#07BB# => romdata <= X"6E7BC494";
when 16#07BC# => romdata <= X"434FAD80";
when 16#07BD# => romdata <= X"999D46D8";
when 16#07BE# => romdata <= X"24A5A573";
when 16#07BF# => romdata <= X"90599052";
when 16#07C0# => romdata <= X"025F7DA4";
when 16#07C1# => romdata <= X"838F7D16";
when 16#07C2# => romdata <= X"A8DACDAF";
when 16#07C3# => romdata <= X"A06D1755";
when 16#07C4# => romdata <= X"46FADD1E";
when 16#07C5# => romdata <= X"3F797526";
when 16#07C6# => romdata <= X"5230F6C0";
when 16#07C7# => romdata <= X"1B9C1FB1";
when 16#07C8# => romdata <= X"B7AB1F2F";
when 16#07C9# => romdata <= X"DD43A577";
when 16#07CA# => romdata <= X"8E3C88FB";
when 16#07CB# => romdata <= X"EA70575C";
when 16#07CC# => romdata <= X"A26D94D2";
when 16#07CD# => romdata <= X"49670E4D";
when 16#07CE# => romdata <= X"9FF28EC6";
when 16#07CF# => romdata <= X"7D158297";
when 16#07D0# => romdata <= X"76D7BC67";
when 16#07D1# => romdata <= X"54D2A2BB";
when 16#07D2# => romdata <= X"01554E5F";
when 16#07D3# => romdata <= X"F0C3FAD8";
when 16#07D4# => romdata <= X"A1CB546E";
when 16#07D5# => romdata <= X"8AD5E531";
when 16#07D6# => romdata <= X"4103D086";
when 16#07D7# => romdata <= X"D14ABD30";
when 16#07D8# => romdata <= X"EA95DDC5";
when 16#07D9# => romdata <= X"91C13D96";
when 16#07DA# => romdata <= X"C1CC3F60";
when 16#07DB# => romdata <= X"FD18D216";
when 16#07DC# => romdata <= X"B67181B6";
when 16#07DD# => romdata <= X"324AC09A";
when 16#07DE# => romdata <= X"97C0C45E";
when 16#07DF# => romdata <= X"50EE8380";
when 16#07E0# => romdata <= X"ED42F6E0";
when 16#07E1# => romdata <= X"43063937";
when 16#07E2# => romdata <= X"3E7760C7";
when 16#07E3# => romdata <= X"08248EE7";
when 16#07E4# => romdata <= X"D74830E9";
when 16#07E5# => romdata <= X"59411487";
when 16#07E6# => romdata <= X"9748883F";
when 16#07E7# => romdata <= X"247D056B";
when 16#07E8# => romdata <= X"2BA94A0F";
when 16#07E9# => romdata <= X"C54CECF6";
when 16#07EA# => romdata <= X"F5C6AB4D";
when 16#07EB# => romdata <= X"CB7CFC8C";
when 16#07EC# => romdata <= X"224F40D8";
when 16#07ED# => romdata <= X"86427504";
when 16#07EE# => romdata <= X"233DDBED";
when 16#07EF# => romdata <= X"CE160DEF";
when 16#07F0# => romdata <= X"DFFD69EE";
when 16#07F1# => romdata <= X"2B75746D";
when 16#07F2# => romdata <= X"9CF71676";
when 16#07F3# => romdata <= X"DC453FD0";
when 16#07F4# => romdata <= X"1C315ACA";
when 16#07F5# => romdata <= X"96373ED3";
when 16#07F6# => romdata <= X"87B040BD";
when 16#07F7# => romdata <= X"EBA7FF3C";
when 16#07F8# => romdata <= X"E00D915F";
when 16#07F9# => romdata <= X"90AE6E17";
when 16#07FA# => romdata <= X"96971F80";
when 16#07FB# => romdata <= X"52160154";
when 16#07FC# => romdata <= X"E8986913";
when 16#07FD# => romdata <= X"AD7BA291";
when 16#07FE# => romdata <= X"188EC49A";
when 16#07FF# => romdata <= X"60BE27C0";
when 16#0800# => romdata <= X"B5184F7D";
when 16#0801# => romdata <= X"580935AC";
when 16#0802# => romdata <= X"FF18201C";
when 16#0803# => romdata <= X"E8B5D54C";
when 16#0804# => romdata <= X"D0A1CACF";
when 16#0805# => romdata <= X"102FBC8A";
when 16#0806# => romdata <= X"ADF391C4";
when 16#0807# => romdata <= X"CA5807BA";
when 16#0808# => romdata <= X"EEF4E5E4";
when 16#0809# => romdata <= X"7F7459E7";
when 16#080A# => romdata <= X"4485E48E";
when 16#080B# => romdata <= X"0C42D27C";
when 16#080C# => romdata <= X"ADE69707";
when 16#080D# => romdata <= X"14FD97C0";
when 16#080E# => romdata <= X"8F9592FD";
when 16#080F# => romdata <= X"D387C859";
when 16#0810# => romdata <= X"FC12C1CC";
when 16#0811# => romdata <= X"CFC3EBF5";
when 16#0812# => romdata <= X"10D66FBD";
when 16#0813# => romdata <= X"8C448C25";
when 16#0814# => romdata <= X"A322CC58";
when 16#0815# => romdata <= X"87F94A55";
when 16#0816# => romdata <= X"D48ECA36";
when 16#0817# => romdata <= X"2C690F24";
when 16#0818# => romdata <= X"833C3B03";
when 16#0819# => romdata <= X"2A047D12";
when 16#081A# => romdata <= X"BDA2ADC6";
when 16#081B# => romdata <= X"824A1F6E";
when 16#081C# => romdata <= X"A9320BED";
when 16#081D# => romdata <= X"27968E9C";
when 16#081E# => romdata <= X"FBDEC60D";
when 16#081F# => romdata <= X"041EF538";
when 16#0820# => romdata <= X"F1740C05";
when 16#0821# => romdata <= X"19003FAA";
when 16#0822# => romdata <= X"89CD4224";
when 16#0823# => romdata <= X"293167E0";
when 16#0824# => romdata <= X"5344998F";
when 16#0825# => romdata <= X"D396EEF6";
when 16#0826# => romdata <= X"18E8F547";
when 16#0827# => romdata <= X"990BC06A";
when 16#0828# => romdata <= X"8B76D0FD";
when 16#0829# => romdata <= X"6FAC1328";
when 16#082A# => romdata <= X"4601AB71";
when 16#082B# => romdata <= X"91CEB813";
when 16#082C# => romdata <= X"C46C45CE";
when 16#082D# => romdata <= X"7B3FC09E";
when 16#082E# => romdata <= X"DF08DAFE";
when 16#082F# => romdata <= X"136BFBDD";
when 16#0830# => romdata <= X"63E6CE7E";
when 16#0831# => romdata <= X"4BCBB16C";
when 16#0832# => romdata <= X"5DA68AC7";
when 16#0833# => romdata <= X"1A1298FD";
when 16#0834# => romdata <= X"27363349";
when 16#0835# => romdata <= X"A261C2F2";
when 16#0836# => romdata <= X"CA8CB799";
when 16#0837# => romdata <= X"E8604ADF";
when 16#0838# => romdata <= X"70092BDB";
when 16#0839# => romdata <= X"D6A04CB8";
when 16#083A# => romdata <= X"0568776A";
when 16#083B# => romdata <= X"537AD171";
when 16#083C# => romdata <= X"1891B251";
when 16#083D# => romdata <= X"C74E42FC";
when 16#083E# => romdata <= X"B095B23E";
when 16#083F# => romdata <= X"EF70F167";
when 16#0840# => romdata <= X"E8B4856B";
when 16#0841# => romdata <= X"B7F92E3A";
when 16#0842# => romdata <= X"43C79FF4";
when 16#0843# => romdata <= X"437262DD";
when 16#0844# => romdata <= X"70BAF9B1";
when 16#0845# => romdata <= X"6CBF5F10";
when 16#0846# => romdata <= X"D1AD7559";
when 16#0847# => romdata <= X"AB0F8CEE";
when 16#0848# => romdata <= X"1B9FAD05";
when 16#0849# => romdata <= X"8E84FCC3";
when 16#084A# => romdata <= X"42D9F0D9";
when 16#084B# => romdata <= X"FBE4207D";
when 16#084C# => romdata <= X"40E28141";
when 16#084D# => romdata <= X"6506242C";
when 16#084E# => romdata <= X"A1B8DAB2";
when 16#084F# => romdata <= X"8DE88D2D";
when 16#0850# => romdata <= X"00BA21AA";
when 16#0851# => romdata <= X"7FDDC259";
when 16#0852# => romdata <= X"40CB29F0";
when 16#0853# => romdata <= X"2811F8DC";
when 16#0854# => romdata <= X"6850A6A8";
when 16#0855# => romdata <= X"7D72CA9F";
when 16#0856# => romdata <= X"3476A736";
when 16#0857# => romdata <= X"49FB4A25";
when 16#0858# => romdata <= X"4B1204CC";
when 16#0859# => romdata <= X"1261E7D5";
when 16#085A# => romdata <= X"12BFE7B0";
when 16#085B# => romdata <= X"D0091AD5";
when 16#085C# => romdata <= X"CB0FBBB7";
when 16#085D# => romdata <= X"65FB5AFD";
when 16#085E# => romdata <= X"FAB0D701";
when 16#085F# => romdata <= X"941DA548";
when 16#0860# => romdata <= X"32FE8253";
when 16#0861# => romdata <= X"BC0CF619";
when 16#0862# => romdata <= X"24BCA2CA";
when 16#0863# => romdata <= X"231A196C";
when 16#0864# => romdata <= X"7C32A350";
when 16#0865# => romdata <= X"AC9A5FA2";
when 16#0866# => romdata <= X"884D8571";
when 16#0867# => romdata <= X"FEEEDB7D";
when 16#0868# => romdata <= X"29632E71";
when 16#0869# => romdata <= X"898BB62B";
when 16#086A# => romdata <= X"5E4E0104";
when 16#086B# => romdata <= X"F73AA6A9";
when 16#086C# => romdata <= X"C6B8CDA8";
when 16#086D# => romdata <= X"16872805";
when 16#086E# => romdata <= X"D75ECA64";
when 16#086F# => romdata <= X"F9616410";
when 16#0870# => romdata <= X"77B259C9";
when 16#0871# => romdata <= X"D39E2F3C";
when 16#0872# => romdata <= X"CD9FCFB1";
when 16#0873# => romdata <= X"E6B6E269";
when 16#0874# => romdata <= X"2EA34336";
when 16#0875# => romdata <= X"A967E587";
when 16#0876# => romdata <= X"F32E49B9";
when 16#0877# => romdata <= X"61B91311";
when 16#0878# => romdata <= X"198A204D";
when 16#0879# => romdata <= X"11874B4B";
when 16#087A# => romdata <= X"EBC6C04D";
when 16#087B# => romdata <= X"DB5B82D5";
when 16#087C# => romdata <= X"B741D3CE";
when 16#087D# => romdata <= X"DC03A56A";
when 16#087E# => romdata <= X"2017B3D2";
when 16#087F# => romdata <= X"C4FBBD40";
when 16#0880# => romdata <= X"CFDD6B78";
when 16#0881# => romdata <= X"AEB21CDC";
when 16#0882# => romdata <= X"D6AF8C34";
when 16#0883# => romdata <= X"9F6DF8FF";
when 16#0884# => romdata <= X"8B96BC82";
when 16#0885# => romdata <= X"46A672A1";
when 16#0886# => romdata <= X"6E45B5D0";
when 16#0887# => romdata <= X"AB7D9925";
when 16#0888# => romdata <= X"70EC45A5";
when 16#0889# => romdata <= X"34B77F20";
when 16#088A# => romdata <= X"4039FE20";
when 16#088B# => romdata <= X"0D4C5E7C";
when 16#088C# => romdata <= X"78FE2494";
when 16#088D# => romdata <= X"1F578097";
when 16#088E# => romdata <= X"B216177D";
when 16#088F# => romdata <= X"8AD4E184";
when 16#0890# => romdata <= X"4B2E52D8";
when 16#0891# => romdata <= X"43256D0B";
when 16#0892# => romdata <= X"E8504CF2";
when 16#0893# => romdata <= X"D5B639E2";
when 16#0894# => romdata <= X"CD501A6F";
when 16#0895# => romdata <= X"E39B8AA7";
when 16#0896# => romdata <= X"DB7DEA92";
when 16#0897# => romdata <= X"4B38692E";
when 16#0898# => romdata <= X"43195DB7";
when 16#0899# => romdata <= X"E5F25E25";
when 16#089A# => romdata <= X"152DF0FB";
when 16#089B# => romdata <= X"7E0D4EF6";
when 16#089C# => romdata <= X"3F99CD95";
when 16#089D# => romdata <= X"F699E165";
when 16#089E# => romdata <= X"76702B65";
when 16#089F# => romdata <= X"1C295836";
when 16#08A0# => romdata <= X"45070011";
when 16#08A1# => romdata <= X"B2A1F88C";
when 16#08A2# => romdata <= X"947BAE7C";
when 16#08A3# => romdata <= X"94D48EB0";
when 16#08A4# => romdata <= X"7A132DB3";
when 16#08A5# => romdata <= X"8D4FE2B7";
when 16#08A6# => romdata <= X"7EEAFB31";
when 16#08A7# => romdata <= X"AFB44271";
when 16#08A8# => romdata <= X"0BD0AE4E";
when 16#08A9# => romdata <= X"6102DA69";
when 16#08AA# => romdata <= X"A454517B";
when 16#08AB# => romdata <= X"6F148D97";
when 16#08AC# => romdata <= X"DBFBAC73";
when 16#08AD# => romdata <= X"05979B5D";
when 16#08AE# => romdata <= X"74D7D756";
when 16#08AF# => romdata <= X"8A0CA56C";
when 16#08B0# => romdata <= X"A89F23D8";
when 16#08B1# => romdata <= X"33026102";
when 16#08B2# => romdata <= X"5CC741F9";
when 16#08B3# => romdata <= X"D7A4BDB3";
when 16#08B4# => romdata <= X"56B544C6";
when 16#08B5# => romdata <= X"8C89CCC2";
when 16#08B6# => romdata <= X"C125F5C7";
when 16#08B7# => romdata <= X"1E18C4EA";
when 16#08B8# => romdata <= X"102343AE";
when 16#08B9# => romdata <= X"4A44F6FC";
when 16#08BA# => romdata <= X"695810E6";
when 16#08BB# => romdata <= X"F28C86BF";
when 16#08BC# => romdata <= X"53F4C8B8";
when 16#08BD# => romdata <= X"AAE46DF6";
when 16#08BE# => romdata <= X"006B1679";
when 16#08BF# => romdata <= X"EBEA7902";
when 16#08C0# => romdata <= X"66D4D02A";
when 16#08C1# => romdata <= X"2095074A";
when 16#08C2# => romdata <= X"DA634EE6";
when 16#08C3# => romdata <= X"0C707028";
when 16#08C4# => romdata <= X"5C316E1F";
when 16#08C5# => romdata <= X"191BC5A8";
when 16#08C6# => romdata <= X"8B80D673";
when 16#08C7# => romdata <= X"F144D65B";
when 16#08C8# => romdata <= X"870A65FC";
when 16#08C9# => romdata <= X"93D8B4BB";
when 16#08CA# => romdata <= X"29B80FD5";
when 16#08CB# => romdata <= X"8F9FE95F";
when 16#08CC# => romdata <= X"59948783";
when 16#08CD# => romdata <= X"08CAC539";
when 16#08CE# => romdata <= X"4781E4D5";
when 16#08CF# => romdata <= X"A3F5EA2A";
when 16#08D0# => romdata <= X"8ED834EE";
when 16#08D1# => romdata <= X"5BD31D20";
when 16#08D2# => romdata <= X"58C843F2";
when 16#08D3# => romdata <= X"2EB778C4";
when 16#08D4# => romdata <= X"C2514419";
when 16#08D5# => romdata <= X"3DAA65F9";
when 16#08D6# => romdata <= X"B57AEC4A";
when 16#08D7# => romdata <= X"344713E9";
when 16#08D8# => romdata <= X"EDF913F3";
when 16#08D9# => romdata <= X"CD29196B";
when 16#08DA# => romdata <= X"42E71BB1";
when 16#08DB# => romdata <= X"82AC3B1A";
when 16#08DC# => romdata <= X"60AFDBF1";
when 16#08DD# => romdata <= X"112A86A2";
when 16#08DE# => romdata <= X"0BFC1D28";
when 16#08DF# => romdata <= X"D3E0DBBA";
when 16#08E0# => romdata <= X"BF38E8F1";
when 16#08E1# => romdata <= X"2651C207";
when 16#08E2# => romdata <= X"C951654F";
when 16#08E3# => romdata <= X"E8C4CECB";
when 16#08E4# => romdata <= X"6C6F93EC";
when 16#08E5# => romdata <= X"46456DAF";
when 16#08E6# => romdata <= X"FD7320DE";
when 16#08E7# => romdata <= X"C8D08F2F";
when 16#08E8# => romdata <= X"712CEB4D";
when 16#08E9# => romdata <= X"82407D61";
when 16#08EA# => romdata <= X"CC47B333";
when 16#08EB# => romdata <= X"F69310C0";
when 16#08EC# => romdata <= X"6EE1FB5E";
when 16#08ED# => romdata <= X"D84F8394";
when 16#08EE# => romdata <= X"5F05D4A8";
when 16#08EF# => romdata <= X"7CF5A68D";
when 16#08F0# => romdata <= X"78B55368";
when 16#08F1# => romdata <= X"80DE3443";
when 16#08F2# => romdata <= X"E804040E";
when 16#08F3# => romdata <= X"599BC583";
when 16#08F4# => romdata <= X"7E22150C";
when 16#08F5# => romdata <= X"93CC1E5E";
when 16#08F6# => romdata <= X"711F9B88";
when 16#08F7# => romdata <= X"9C78C6FF";
when 16#08F8# => romdata <= X"882D8085";
when 16#08F9# => romdata <= X"7EF41ABC";
when 16#08FA# => romdata <= X"5F12E991";
when 16#08FB# => romdata <= X"05E6C894";
when 16#08FC# => romdata <= X"EC0B796E";
when 16#08FD# => romdata <= X"0A645780";
when 16#08FE# => romdata <= X"341CBD03";
when 16#08FF# => romdata <= X"9E8C6EE0";
when 16#0900# => romdata <= X"ABA759AE";
when 16#0901# => romdata <= X"16B9D877";
when 16#0902# => romdata <= X"8FAC203F";
when 16#0903# => romdata <= X"ADF48015";
when 16#0904# => romdata <= X"331D6499";
when 16#0905# => romdata <= X"B8CD74BD";
when 16#0906# => romdata <= X"71ABEBD3";
when 16#0907# => romdata <= X"E53ED906";
when 16#0908# => romdata <= X"25E3057E";
when 16#0909# => romdata <= X"A47BE587";
when 16#090A# => romdata <= X"600F308D";
when 16#090B# => romdata <= X"38743A68";
when 16#090C# => romdata <= X"6EF6FA18";
when 16#090D# => romdata <= X"9A4D86E4";
when 16#090E# => romdata <= X"A35EB798";
when 16#090F# => romdata <= X"FD230734";
when 16#0910# => romdata <= X"5FBD10FA";
when 16#0911# => romdata <= X"701265F6";
when 16#0912# => romdata <= X"41760336";
when 16#0913# => romdata <= X"5FCC4CE7";
when 16#0914# => romdata <= X"63592442";
when 16#0915# => romdata <= X"8167115B";
when 16#0916# => romdata <= X"A372294C";
when 16#0917# => romdata <= X"27A23CE6";
when 16#0918# => romdata <= X"C27C5066";
when 16#0919# => romdata <= X"03C5A661";
when 16#091A# => romdata <= X"8A2B3344";
when 16#091B# => romdata <= X"BAC50AB7";
when 16#091C# => romdata <= X"FDC29D36";
when 16#091D# => romdata <= X"BCBDFCE0";
when 16#091E# => romdata <= X"D48D088E";
when 16#091F# => romdata <= X"FD8EA1DE";
when 16#0920# => romdata <= X"492C5430";
when 16#0921# => romdata <= X"93C30AB7";
when 16#0922# => romdata <= X"694627C0";
when 16#0923# => romdata <= X"1B334CE3";
when 16#0924# => romdata <= X"368AEB4B";
when 16#0925# => romdata <= X"B3267EBB";
when 16#0926# => romdata <= X"1096450B";
when 16#0927# => romdata <= X"DFC25719";
when 16#0928# => romdata <= X"77D7EF78";
when 16#0929# => romdata <= X"D6E288FC";
when 16#092A# => romdata <= X"E0388A04";
when 16#092B# => romdata <= X"1838EC20";
when 16#092C# => romdata <= X"31248F5F";
when 16#092D# => romdata <= X"D659C701";
when 16#092E# => romdata <= X"80634A1D";
when 16#092F# => romdata <= X"C7196C8D";
when 16#0930# => romdata <= X"9111C75B";
when 16#0931# => romdata <= X"51C50F85";
when 16#0932# => romdata <= X"4CEC63DE";
when 16#0933# => romdata <= X"BF9FFE1A";
when 16#0934# => romdata <= X"B9406735";
when 16#0935# => romdata <= X"EC318727";
when 16#0936# => romdata <= X"6DE7CA2F";
when 16#0937# => romdata <= X"AD428702";
when 16#0938# => romdata <= X"7956C93B";
when 16#0939# => romdata <= X"8E84B7C0";
when 16#093A# => romdata <= X"C3A9C3F7";
when 16#093B# => romdata <= X"E82B3DB3";
when 16#093C# => romdata <= X"5EB6D2CE";
when 16#093D# => romdata <= X"BDFE0708";
when 16#093E# => romdata <= X"FEDD764C";
when 16#093F# => romdata <= X"839954F2";
when 16#0940# => romdata <= X"CC9044B6";
when 16#0941# => romdata <= X"52D0A01D";
when 16#0942# => romdata <= X"28BD6B9D";
when 16#0943# => romdata <= X"3DD9740C";
when 16#0944# => romdata <= X"AE39AA52";
when 16#0945# => romdata <= X"597FFC12";
when 16#0946# => romdata <= X"27FAD8B7";
when 16#0947# => romdata <= X"8EAFFC31";
when 16#0948# => romdata <= X"BE94A632";
when 16#0949# => romdata <= X"A1AA7A60";
when 16#094A# => romdata <= X"AA5A9E09";
when 16#094B# => romdata <= X"0DA2B62F";
when 16#094C# => romdata <= X"6DBDFDC5";
when 16#094D# => romdata <= X"0DF6EBE1";
when 16#094E# => romdata <= X"D9949619";
when 16#094F# => romdata <= X"FE9B2302";
when 16#0950# => romdata <= X"248D6C80";
when 16#0951# => romdata <= X"1DD2D6C0";
when 16#0952# => romdata <= X"1FF8206A";
when 16#0953# => romdata <= X"93C0AD22";
when 16#0954# => romdata <= X"C6990C4E";
when 16#0955# => romdata <= X"ECA7D4BD";
when 16#0956# => romdata <= X"F36C3246";
when 16#0957# => romdata <= X"A5D2D2B3";
when 16#0958# => romdata <= X"982C608E";
when 16#0959# => romdata <= X"6AD6BDD8";
when 16#095A# => romdata <= X"5C92682E";
when 16#095B# => romdata <= X"BDC9E411";
when 16#095C# => romdata <= X"7F8B7F84";
when 16#095D# => romdata <= X"1239C2A5";
when 16#095E# => romdata <= X"AD7977E1";
when 16#095F# => romdata <= X"1E4E9CA7";
when 16#0960# => romdata <= X"3A55859E";
when 16#0961# => romdata <= X"ADF7C9C2";
when 16#0962# => romdata <= X"F1B28A6B";
when 16#0963# => romdata <= X"4AC72020";
when 16#0964# => romdata <= X"19230063";
when 16#0965# => romdata <= X"331FC558";
when 16#0966# => romdata <= X"6756CEA1";
when 16#0967# => romdata <= X"F8478173";
when 16#0968# => romdata <= X"A0A4964D";
when 16#0969# => romdata <= X"00C1AC09";
when 16#096A# => romdata <= X"95901521";
when 16#096B# => romdata <= X"25A4D015";
when 16#096C# => romdata <= X"92C54DC2";
when 16#096D# => romdata <= X"555E1BA3";
when 16#096E# => romdata <= X"4C7AC039";
when 16#096F# => romdata <= X"394D1979";
when 16#0970# => romdata <= X"AEA2BF7B";
when 16#0971# => romdata <= X"2B2A8CB9";
when 16#0972# => romdata <= X"D62E8913";
when 16#0973# => romdata <= X"2CE9E3B3";
when 16#0974# => romdata <= X"25F023AC";
when 16#0975# => romdata <= X"6E8117CE";
when 16#0976# => romdata <= X"57AD4B27";
when 16#0977# => romdata <= X"1EFB0C17";
when 16#0978# => romdata <= X"2FBFF8FA";
when 16#0979# => romdata <= X"6A17A490";
when 16#097A# => romdata <= X"B67CA7B1";
when 16#097B# => romdata <= X"5F865A8A";
when 16#097C# => romdata <= X"EEF37651";
when 16#097D# => romdata <= X"A622390E";
when 16#097E# => romdata <= X"82AFD418";
when 16#097F# => romdata <= X"C7AFD480";
when 16#0980# => romdata <= X"CEA29601";
when 16#0981# => romdata <= X"B96AD3A8";
when 16#0982# => romdata <= X"31646922";
when 16#0983# => romdata <= X"000BBFF0";
when 16#0984# => romdata <= X"2C014A91";
when 16#0985# => romdata <= X"36D9A151";
when 16#0986# => romdata <= X"A0E61A51";
when 16#0987# => romdata <= X"F9FC2EC0";
when 16#0988# => romdata <= X"C3A8F4C8";
when 16#0989# => romdata <= X"3E64BDE5";
when 16#098A# => romdata <= X"69A33B4C";
when 16#098B# => romdata <= X"D653C134";
when 16#098C# => romdata <= X"5B7CBEA3";
when 16#098D# => romdata <= X"B3AC0411";
when 16#098E# => romdata <= X"B6145727";
when 16#098F# => romdata <= X"B1DBF606";
when 16#0990# => romdata <= X"6ABCE9DA";
when 16#0991# => romdata <= X"A8B0DE58";
when 16#0992# => romdata <= X"ADC2510C";
when 16#0993# => romdata <= X"02C2619A";
when 16#0994# => romdata <= X"542A139F";
when 16#0995# => romdata <= X"A3EF7A03";
when 16#0996# => romdata <= X"AD346734";
when 16#0997# => romdata <= X"5D9573C1";
when 16#0998# => romdata <= X"07A13E7F";
when 16#0999# => romdata <= X"CD43C0D5";
when 16#099A# => romdata <= X"1DB5EC1A";
when 16#099B# => romdata <= X"09D409DA";
when 16#099C# => romdata <= X"75462F9C";
when 16#099D# => romdata <= X"71F0C9E3";
when 16#099E# => romdata <= X"6C2742C2";
when 16#099F# => romdata <= X"79C910F0";
when 16#09A0# => romdata <= X"7CFC5CF7";
when 16#09A1# => romdata <= X"F98AD48D";
when 16#09A2# => romdata <= X"67232A2D";
when 16#09A3# => romdata <= X"F29A66B7";
when 16#09A4# => romdata <= X"82095573";
when 16#09A5# => romdata <= X"57A4BC91";
when 16#09A6# => romdata <= X"922D4195";
when 16#09A7# => romdata <= X"DA9533CD";
when 16#09A8# => romdata <= X"3501F388";
when 16#09A9# => romdata <= X"AF6EE2BB";
when 16#09AA# => romdata <= X"3AD08BC7";
when 16#09AB# => romdata <= X"D5301505";
when 16#09AC# => romdata <= X"9988F5B9";
when 16#09AD# => romdata <= X"BF7824D0";
when 16#09AE# => romdata <= X"66DCBDC6";
when 16#09AF# => romdata <= X"1CA588DC";
when 16#09B0# => romdata <= X"CF0EBDE4";
when 16#09B1# => romdata <= X"A96632DB";
when 16#09B2# => romdata <= X"A22CA0D7";
when 16#09B3# => romdata <= X"70C61A1D";
when 16#09B4# => romdata <= X"D66EDA88";
when 16#09B5# => romdata <= X"2D02C5FA";
when 16#09B6# => romdata <= X"284798E1";
when 16#09B7# => romdata <= X"2296E89C";
when 16#09B8# => romdata <= X"45906D31";
when 16#09B9# => romdata <= X"5EFDBA81";
when 16#09BA# => romdata <= X"6FD869DF";
when 16#09BB# => romdata <= X"869A65DD";
when 16#09BC# => romdata <= X"8BA4E0B1";
when 16#09BD# => romdata <= X"3C441EEB";
when 16#09BE# => romdata <= X"052EF3D0";
when 16#09BF# => romdata <= X"FD436E4A";
when 16#09C0# => romdata <= X"C68EFC74";
when 16#09C1# => romdata <= X"9E0CF4C7";
when 16#09C2# => romdata <= X"E15599D5";
when 16#09C3# => romdata <= X"514E136A";
when 16#09C4# => romdata <= X"BD134BA6";
when 16#09C5# => romdata <= X"38A02E9E";
when 16#09C6# => romdata <= X"C1FE66CC";
when 16#09C7# => romdata <= X"9ACBCE50";
when 16#09C8# => romdata <= X"82C87341";
when 16#09C9# => romdata <= X"96BADC21";
when 16#09CA# => romdata <= X"F4DA7621";
when 16#09CB# => romdata <= X"D9FA7253";
when 16#09CC# => romdata <= X"62C41112";
when 16#09CD# => romdata <= X"7836A26C";
when 16#09CE# => romdata <= X"B44CB385";
when 16#09CF# => romdata <= X"1D53C599";
when 16#09D0# => romdata <= X"B94A5E67";
when 16#09D1# => romdata <= X"862665D7";
when 16#09D2# => romdata <= X"092C43D9";
when 16#09D3# => romdata <= X"B4AD3FE2";
when 16#09D4# => romdata <= X"0B8AFACC";
when 16#09D5# => romdata <= X"EDE920F4";
when 16#09D6# => romdata <= X"40F3BF55";
when 16#09D7# => romdata <= X"52CFAFAD";
when 16#09D8# => romdata <= X"04A7D7E0";
when 16#09D9# => romdata <= X"A9CEA18D";
when 16#09DA# => romdata <= X"497282D4";
when 16#09DB# => romdata <= X"4778FB7D";
when 16#09DC# => romdata <= X"5072832C";
when 16#09DD# => romdata <= X"0B77C4C5";
when 16#09DE# => romdata <= X"1F4DCFD7";
when 16#09DF# => romdata <= X"AC07DC7A";
when 16#09E0# => romdata <= X"9863DB8A";
when 16#09E1# => romdata <= X"38F1C003";
when 16#09E2# => romdata <= X"CB852F61";
when 16#09E3# => romdata <= X"19BE801A";
when 16#09E4# => romdata <= X"D12B8BC7";
when 16#09E5# => romdata <= X"393B0064";
when 16#09E6# => romdata <= X"0F125C73";
when 16#09E7# => romdata <= X"4447DB2F";
when 16#09E8# => romdata <= X"D8B02F7F";
when 16#09E9# => romdata <= X"7FC7A23B";
when 16#09EA# => romdata <= X"84FB80F9";
when 16#09EB# => romdata <= X"CC08E3EF";
when 16#09EC# => romdata <= X"888634FF";
when 16#09ED# => romdata <= X"B6F51ECE";
when 16#09EE# => romdata <= X"E9B20A89";
when 16#09EF# => romdata <= X"941FBF2B";
when 16#09F0# => romdata <= X"49314DBD";
when 16#09F1# => romdata <= X"D67CB7A1";
when 16#09F2# => romdata <= X"B5BD8D62";
when 16#09F3# => romdata <= X"9FA327AF";
when 16#09F4# => romdata <= X"2CBB47B5";
when 16#09F5# => romdata <= X"419A0A8C";
when 16#09F6# => romdata <= X"B807D301";
when 16#09F7# => romdata <= X"52FA5606";
when 16#09F8# => romdata <= X"90DBAC49";
when 16#09F9# => romdata <= X"D6B043D5";
when 16#09FA# => romdata <= X"BC9D51E8";
when 16#09FB# => romdata <= X"2C3B1CF4";
when 16#09FC# => romdata <= X"ED69E997";
when 16#09FD# => romdata <= X"050C6519";
when 16#09FE# => romdata <= X"7F3D93E2";
when 16#09FF# => romdata <= X"1CBE91E0";
when 16#0A00# => romdata <= X"D358BFC8";
when 16#0A01# => romdata <= X"C6AD1DC9";
when 16#0A02# => romdata <= X"4E71D1F5";
when 16#0A03# => romdata <= X"D0558942";
when 16#0A04# => romdata <= X"4275875A";
when 16#0A05# => romdata <= X"F8CDA2AB";
when 16#0A06# => romdata <= X"CC6404D6";
when 16#0A07# => romdata <= X"FCB7A2E0";
when 16#0A08# => romdata <= X"A74C6802";
when 16#0A09# => romdata <= X"4827E026";
when 16#0A0A# => romdata <= X"21C10CD5";
when 16#0A0B# => romdata <= X"FB149FBA";
when 16#0A0C# => romdata <= X"373AE32D";
when 16#0A0D# => romdata <= X"FFF275CF";
when 16#0A0E# => romdata <= X"386C3D7A";
when 16#0A0F# => romdata <= X"04E3FE10";
when 16#0A10# => romdata <= X"B6F1A6F4";
when 16#0A11# => romdata <= X"782B4823";
when 16#0A12# => romdata <= X"242F2967";
when 16#0A13# => romdata <= X"2E847CCE";
when 16#0A14# => romdata <= X"760BA005";
when 16#0A15# => romdata <= X"D6852A34";
when 16#0A16# => romdata <= X"59E7576A";
when 16#0A17# => romdata <= X"254B10A9";
when 16#0A18# => romdata <= X"A78A9F81";
when 16#0A19# => romdata <= X"12BEA39B";
when 16#0A1A# => romdata <= X"A65898CF";
when 16#0A1B# => romdata <= X"ED1179D6";
when 16#0A1C# => romdata <= X"8211D98E";
when 16#0A1D# => romdata <= X"6950ED06";
when 16#0A1E# => romdata <= X"399E3943";
when 16#0A1F# => romdata <= X"3ACD898E";
when 16#0A20# => romdata <= X"2F6C87F5";
when 16#0A21# => romdata <= X"FB9D9951";
when 16#0A22# => romdata <= X"8EF36429";
when 16#0A23# => romdata <= X"D447B0EF";
when 16#0A24# => romdata <= X"0C5B7D83";
when 16#0A25# => romdata <= X"4ACFA388";
when 16#0A26# => romdata <= X"578BDF60";
when 16#0A27# => romdata <= X"D4B1FB5A";
when 16#0A28# => romdata <= X"0CEE7D1D";
when 16#0A29# => romdata <= X"613BB9B9";
when 16#0A2A# => romdata <= X"9E36DC96";
when 16#0A2B# => romdata <= X"36E70A54";
when 16#0A2C# => romdata <= X"3BA6BF0B";
when 16#0A2D# => romdata <= X"3A448DBD";
when 16#0A2E# => romdata <= X"F8046949";
when 16#0A2F# => romdata <= X"4239D4B7";
when 16#0A30# => romdata <= X"C4979D82";
when 16#0A31# => romdata <= X"E80C08EF";
when 16#0A32# => romdata <= X"36EA6756";
when 16#0A33# => romdata <= X"0C86665D";
when 16#0A34# => romdata <= X"458040CE";
when 16#0A35# => romdata <= X"31BA009B";
when 16#0A36# => romdata <= X"CDC30CCB";
when 16#0A37# => romdata <= X"AC50259E";
when 16#0A38# => romdata <= X"4485E570";
when 16#0A39# => romdata <= X"F190613C";
when 16#0A3A# => romdata <= X"B010563F";
when 16#0A3B# => romdata <= X"6BD24C2F";
when 16#0A3C# => romdata <= X"1CF73F6A";
when 16#0A3D# => romdata <= X"6844AB83";
when 16#0A3E# => romdata <= X"50D23BBC";
when 16#0A3F# => romdata <= X"3D1361E7";
when 16#0A40# => romdata <= X"3DCE94AF";
when 16#0A41# => romdata <= X"83697BB8";
when 16#0A42# => romdata <= X"17BA366C";
when 16#0A43# => romdata <= X"9855A754";
when 16#0A44# => romdata <= X"EFC2F007";
when 16#0A45# => romdata <= X"D99A9641";
when 16#0A46# => romdata <= X"25682E6F";
when 16#0A47# => romdata <= X"5CF7FBBF";
when 16#0A48# => romdata <= X"687D221B";
when 16#0A49# => romdata <= X"5A0FD844";
when 16#0A4A# => romdata <= X"477A2F87";
when 16#0A4B# => romdata <= X"D5370F44";
when 16#0A4C# => romdata <= X"69F76073";
when 16#0A4D# => romdata <= X"A93AEF78";
when 16#0A4E# => romdata <= X"12275FD4";
when 16#0A4F# => romdata <= X"F70B2040";
when 16#0A50# => romdata <= X"C12A83AD";
when 16#0A51# => romdata <= X"E5E5D862";
when 16#0A52# => romdata <= X"684D119D";
when 16#0A53# => romdata <= X"CA0F75AE";
when 16#0A54# => romdata <= X"2B56C794";
when 16#0A55# => romdata <= X"968A6856";
when 16#0A56# => romdata <= X"6291B731";
when 16#0A57# => romdata <= X"579A1055";
when 16#0A58# => romdata <= X"A84F083B";
when 16#0A59# => romdata <= X"3072B7BD";
when 16#0A5A# => romdata <= X"5AC9D520";
when 16#0A5B# => romdata <= X"F64F0829";
when 16#0A5C# => romdata <= X"B5928756";
when 16#0A5D# => romdata <= X"13BDD81C";
when 16#0A5E# => romdata <= X"11622B33";
when 16#0A5F# => romdata <= X"1289C985";
when 16#0A60# => romdata <= X"01B01EE1";
when 16#0A61# => romdata <= X"D813C0E9";
when 16#0A62# => romdata <= X"7CF36878";
when 16#0A63# => romdata <= X"260F80BF";
when 16#0A64# => romdata <= X"88071D25";
when 16#0A65# => romdata <= X"8B9DE02F";
when 16#0A66# => romdata <= X"3F90B4C1";
when 16#0A67# => romdata <= X"2BB56CBC";
when 16#0A68# => romdata <= X"731550B5";
when 16#0A69# => romdata <= X"EFDE6D97";
when 16#0A6A# => romdata <= X"A1283EEF";
when 16#0A6B# => romdata <= X"E61CD6E5";
when 16#0A6C# => romdata <= X"DF312D0F";
when 16#0A6D# => romdata <= X"0153A32D";
when 16#0A6E# => romdata <= X"D65B143E";
when 16#0A6F# => romdata <= X"C6A3F2B6";
when 16#0A70# => romdata <= X"4E2B8FFB";
when 16#0A71# => romdata <= X"47EAE46B";
when 16#0A72# => romdata <= X"D92A6EB9";
when 16#0A73# => romdata <= X"ACBDD11A";
when 16#0A74# => romdata <= X"2D730D02";
when 16#0A75# => romdata <= X"7A3EDEAD";
when 16#0A76# => romdata <= X"BA596519";
when 16#0A77# => romdata <= X"8FD59BBC";
when 16#0A78# => romdata <= X"8574B680";
when 16#0A79# => romdata <= X"B96AD485";
when 16#0A7A# => romdata <= X"86E5B176";
when 16#0A7B# => romdata <= X"25251BF4";
when 16#0A7C# => romdata <= X"374E28C6";
when 16#0A7D# => romdata <= X"AB956C68";
when 16#0A7E# => romdata <= X"18183FDC";
when 16#0A7F# => romdata <= X"119499E0";
when 16#0A80# => romdata <= X"FE694332";
when 16#0A81# => romdata <= X"33B6067B";
when 16#0A82# => romdata <= X"0EACF1F4";
when 16#0A83# => romdata <= X"7BD3AAD9";
when 16#0A84# => romdata <= X"783FA30F";
when 16#0A85# => romdata <= X"684110D1";
when 16#0A86# => romdata <= X"15245923";
when 16#0A87# => romdata <= X"3896479D";
when 16#0A88# => romdata <= X"08A976B8";
when 16#0A89# => romdata <= X"53E4B7B5";
when 16#0A8A# => romdata <= X"2A345112";
when 16#0A8B# => romdata <= X"39961048";
when 16#0A8C# => romdata <= X"B7C1B900";
when 16#0A8D# => romdata <= X"9095327C";
when 16#0A8E# => romdata <= X"86F2EA29";
when 16#0A8F# => romdata <= X"1FAC1734";
when 16#0A90# => romdata <= X"ED2596EF";
when 16#0A91# => romdata <= X"19D04528";
when 16#0A92# => romdata <= X"F3D8F2A3";
when 16#0A93# => romdata <= X"430A0C19";
when 16#0A94# => romdata <= X"DA6A70A3";
when 16#0A95# => romdata <= X"7DB6DC03";
when 16#0A96# => romdata <= X"4BA0053B";
when 16#0A97# => romdata <= X"57ACB9E7";
when 16#0A98# => romdata <= X"C00ED9BD";
when 16#0A99# => romdata <= X"6AC11339";
when 16#0A9A# => romdata <= X"EA169D9D";
when 16#0A9B# => romdata <= X"54E6739B";
when 16#0A9C# => romdata <= X"051AF40E";
when 16#0A9D# => romdata <= X"E79A1034";
when 16#0A9E# => romdata <= X"D6294261";
when 16#0A9F# => romdata <= X"E1AFFCD6";
when 16#0AA0# => romdata <= X"1B9CA501";
when 16#0AA1# => romdata <= X"6C56B2D1";
when 16#0AA2# => romdata <= X"172D9B2A";
when 16#0AA3# => romdata <= X"7283E4EE";
when 16#0AA4# => romdata <= X"0A06C814";
when 16#0AA5# => romdata <= X"9E5A2DAA";
when 16#0AA6# => romdata <= X"263A5D24";
when 16#0AA7# => romdata <= X"29C2B1FC";
when 16#0AA8# => romdata <= X"E75C4188";
when 16#0AA9# => romdata <= X"7DD02E05";
when 16#0AAA# => romdata <= X"6EF87246";
when 16#0AAB# => romdata <= X"45FEC6FE";
when 16#0AAC# => romdata <= X"7FC1EF18";
when 16#0AAD# => romdata <= X"0529B1E8";
when 16#0AAE# => romdata <= X"94773CF3";
when 16#0AAF# => romdata <= X"E2E1D938";
when 16#0AB0# => romdata <= X"EFE9CD82";
when 16#0AB1# => romdata <= X"4D914541";
when 16#0AB2# => romdata <= X"16797F5A";
when 16#0AB3# => romdata <= X"84746537";
when 16#0AB4# => romdata <= X"FED5F0EB";
when 16#0AB5# => romdata <= X"F0583C85";
when 16#0AB6# => romdata <= X"08EA0745";
when 16#0AB7# => romdata <= X"B4989954";
when 16#0AB8# => romdata <= X"EBC4F215";
when 16#0AB9# => romdata <= X"BE3D5156";
when 16#0ABA# => romdata <= X"87BCDD5D";
when 16#0ABB# => romdata <= X"FDAB9814";
when 16#0ABC# => romdata <= X"358B0703";
when 16#0ABD# => romdata <= X"8E0CB869";
when 16#0ABE# => romdata <= X"A8C34F91";
when 16#0ABF# => romdata <= X"6FC67773";
when 16#0AC0# => romdata <= X"191679C6";
when 16#0AC1# => romdata <= X"0A15A0A3";
when 16#0AC2# => romdata <= X"99E224D0";
when 16#0AC3# => romdata <= X"B0168439";
when 16#0AC4# => romdata <= X"386C0AEE";
when 16#0AC5# => romdata <= X"8F5EF771";
when 16#0AC6# => romdata <= X"85AC847A";
when 16#0AC7# => romdata <= X"66D934CB";
when 16#0AC8# => romdata <= X"0ED6A346";
when 16#0AC9# => romdata <= X"7C3B386B";
when 16#0ACA# => romdata <= X"A7F11587";
when 16#0ACB# => romdata <= X"7F36B49E";
when 16#0ACC# => romdata <= X"111DE49E";
when 16#0ACD# => romdata <= X"409468F3";
when 16#0ACE# => romdata <= X"43A98974";
when 16#0ACF# => romdata <= X"F4EF1EEE";
when 16#0AD0# => romdata <= X"DD282F73";
when 16#0AD1# => romdata <= X"013EC272";
when 16#0AD2# => romdata <= X"7518DB46";
when 16#0AD3# => romdata <= X"C6751A58";
when 16#0AD4# => romdata <= X"AE3E0D5F";
when 16#0AD5# => romdata <= X"9D2B966D";
when 16#0AD6# => romdata <= X"4465BC55";
when 16#0AD7# => romdata <= X"95BC31B2";
when 16#0AD8# => romdata <= X"712AE1E1";
when 16#0AD9# => romdata <= X"BF9915CC";
when 16#0ADA# => romdata <= X"0E02CA72";
when 16#0ADB# => romdata <= X"40EBB9A0";
when 16#0ADC# => romdata <= X"45F959E7";
when 16#0ADD# => romdata <= X"7DFCDADA";
when 16#0ADE# => romdata <= X"B6248D58";
when 16#0ADF# => romdata <= X"B47BBEF3";
when 16#0AE0# => romdata <= X"C775DEFD";
when 16#0AE1# => romdata <= X"629A2EED";
when 16#0AE2# => romdata <= X"15201A21";
when 16#0AE3# => romdata <= X"ADCA470B";
when 16#0AE4# => romdata <= X"1AD30849";
when 16#0AE5# => romdata <= X"24FABCDA";
when 16#0AE6# => romdata <= X"B6B12FA6";
when 16#0AE7# => romdata <= X"201E2A23";
when 16#0AE8# => romdata <= X"9AE8F1BC";
when 16#0AE9# => romdata <= X"D7CC39FE";
when 16#0AEA# => romdata <= X"C62587E5";
when 16#0AEB# => romdata <= X"8C84AAC1";
when 16#0AEC# => romdata <= X"5935D452";
when 16#0AED# => romdata <= X"61E3AFEB";
when 16#0AEE# => romdata <= X"60016AFA";
when 16#0AEF# => romdata <= X"0902DB98";
when 16#0AF0# => romdata <= X"DCFE5865";
when 16#0AF1# => romdata <= X"13FF70EF";
when 16#0AF2# => romdata <= X"4E3F4777";
when 16#0AF3# => romdata <= X"3635D475";
when 16#0AF4# => romdata <= X"754A158F";
when 16#0AF5# => romdata <= X"ACC9C470";
when 16#0AF6# => romdata <= X"921FB018";
when 16#0AF7# => romdata <= X"6BD6EEDE";
when 16#0AF8# => romdata <= X"FCBEE9C8";
when 16#0AF9# => romdata <= X"03118851";
when 16#0AFA# => romdata <= X"F82CACBF";
when 16#0AFB# => romdata <= X"8C0A544B";
when 16#0AFC# => romdata <= X"0562E2E2";
when 16#0AFD# => romdata <= X"7286CEA5";
when 16#0AFE# => romdata <= X"FBAF83AA";
when 16#0AFF# => romdata <= X"5C1F97A0";
when 16#0B00# => romdata <= X"C7386F9F";
when 16#0B01# => romdata <= X"F39FDDBF";
when 16#0B02# => romdata <= X"EB223AD8";
when 16#0B03# => romdata <= X"B856EA2E";
when 16#0B04# => romdata <= X"7F3AFEDE";
when 16#0B05# => romdata <= X"197A61F1";
when 16#0B06# => romdata <= X"83FF7DF2";
when 16#0B07# => romdata <= X"FD6DE208";
when 16#0B08# => romdata <= X"E71E6E10";
when 16#0B09# => romdata <= X"63FB3774";
when 16#0B0A# => romdata <= X"B6969135";
when 16#0B0B# => romdata <= X"24F7488E";
when 16#0B0C# => romdata <= X"FC2CA54E";
when 16#0B0D# => romdata <= X"8B653EF5";
when 16#0B0E# => romdata <= X"BCB7A8F4";
when 16#0B0F# => romdata <= X"994E312D";
when 16#0B10# => romdata <= X"CEE99A31";
when 16#0B11# => romdata <= X"6C2ABF3F";
when 16#0B12# => romdata <= X"DF85B8FA";
when 16#0B13# => romdata <= X"9BBD4366";
when 16#0B14# => romdata <= X"ABBD7B3D";
when 16#0B15# => romdata <= X"3D433C14";
when 16#0B16# => romdata <= X"710A95EB";
when 16#0B17# => romdata <= X"B3D0FCDA";
when 16#0B18# => romdata <= X"2D37A443";
when 16#0B19# => romdata <= X"D62A8361";
when 16#0B1A# => romdata <= X"DA78ACA7";
when 16#0B1B# => romdata <= X"81CEC045";
when 16#0B1C# => romdata <= X"42D01DE7";
when 16#0B1D# => romdata <= X"B6C6D14C";
when 16#0B1E# => romdata <= X"DD4EA709";
when 16#0B1F# => romdata <= X"264251D4";
when 16#0B20# => romdata <= X"6C42AAF4";
when 16#0B21# => romdata <= X"04094286";
when 16#0B22# => romdata <= X"DA5BFF8E";
when 16#0B23# => romdata <= X"81FA2F8C";
when 16#0B24# => romdata <= X"54B17282";
when 16#0B25# => romdata <= X"1054F4CE";
when 16#0B26# => romdata <= X"D82287F2";
when 16#0B27# => romdata <= X"9EA3D3AA";
when 16#0B28# => romdata <= X"798C9CF5";
when 16#0B29# => romdata <= X"C5A909B9";
when 16#0B2A# => romdata <= X"FBA641A8";
when 16#0B2B# => romdata <= X"D9E31024";
when 16#0B2C# => romdata <= X"8B0F9A13";
when 16#0B2D# => romdata <= X"75CE4DAA";
when 16#0B2E# => romdata <= X"98EB6228";
when 16#0B2F# => romdata <= X"6B4EF4DF";
when 16#0B30# => romdata <= X"C58B877A";
when 16#0B31# => romdata <= X"73D017B1";
when 16#0B32# => romdata <= X"7AFD7F1F";
when 16#0B33# => romdata <= X"58D3D2CA";
when 16#0B34# => romdata <= X"D3B7AF2F";
when 16#0B35# => romdata <= X"06699B08";
when 16#0B36# => romdata <= X"B88FB4EB";
when 16#0B37# => romdata <= X"70D25111";
when 16#0B38# => romdata <= X"90158BB4";
when 16#0B39# => romdata <= X"928ED173";
when 16#0B3A# => romdata <= X"5C944009";
when 16#0B3B# => romdata <= X"80144EF9";
when 16#0B3C# => romdata <= X"ED06E060";
when 16#0B3D# => romdata <= X"74E2F293";
when 16#0B3E# => romdata <= X"25C1AA31";
when 16#0B3F# => romdata <= X"6A46E8E6";
when 16#0B40# => romdata <= X"17B3CE91";
when 16#0B41# => romdata <= X"6CFCF05A";
when 16#0B42# => romdata <= X"389052DE";
when 16#0B43# => romdata <= X"12049834";
when 16#0B44# => romdata <= X"1EE26A27";
when 16#0B45# => romdata <= X"A3D757AA";
when 16#0B46# => romdata <= X"E763046B";
when 16#0B47# => romdata <= X"8CBC8413";
when 16#0B48# => romdata <= X"50292F06";
when 16#0B49# => romdata <= X"AFF97C97";
when 16#0B4A# => romdata <= X"07CE5561";
when 16#0B4B# => romdata <= X"F5C119E2";
when 16#0B4C# => romdata <= X"FF6C1370";
when 16#0B4D# => romdata <= X"94F62573";
when 16#0B4E# => romdata <= X"EB80DC13";
when 16#0B4F# => romdata <= X"862797C3";
when 16#0B50# => romdata <= X"319158DD";
when 16#0B51# => romdata <= X"D465FBC0";
when 16#0B52# => romdata <= X"33CAD81B";
when 16#0B53# => romdata <= X"FBBBB54D";
when 16#0B54# => romdata <= X"9467599D";
when 16#0B55# => romdata <= X"751B9980";
when 16#0B56# => romdata <= X"A9AE8BFC";
when 16#0B57# => romdata <= X"6715C5EA";
when 16#0B58# => romdata <= X"74859E6A";
when 16#0B59# => romdata <= X"10DB369D";
when 16#0B5A# => romdata <= X"5DF83A92";
when 16#0B5B# => romdata <= X"655A9A59";
when 16#0B5C# => romdata <= X"08228B33";
when 16#0B5D# => romdata <= X"B36F55DE";
when 16#0B5E# => romdata <= X"563005B8";
when 16#0B5F# => romdata <= X"86EB324C";
when 16#0B60# => romdata <= X"EC4160F0";
when 16#0B61# => romdata <= X"D18938E9";
when 16#0B62# => romdata <= X"FE41D392";
when 16#0B63# => romdata <= X"34C29E13";
when 16#0B64# => romdata <= X"B814DDCD";
when 16#0B65# => romdata <= X"13CA6450";
when 16#0B66# => romdata <= X"77480092";
when 16#0B67# => romdata <= X"4B084873";
when 16#0B68# => romdata <= X"5C5DE076";
when 16#0B69# => romdata <= X"F66EDC97";
when 16#0B6A# => romdata <= X"3FC83B13";
when 16#0B6B# => romdata <= X"938811CD";
when 16#0B6C# => romdata <= X"98873714";
when 16#0B6D# => romdata <= X"70AC5DD9";
when 16#0B6E# => romdata <= X"85481185";
when 16#0B6F# => romdata <= X"F1191EA8";
when 16#0B70# => romdata <= X"C1D3A7DC";
when 16#0B71# => romdata <= X"65E1E82E";
when 16#0B72# => romdata <= X"2318D0FF";
when 16#0B73# => romdata <= X"0C9AF65E";
when 16#0B74# => romdata <= X"A1515DDC";
when 16#0B75# => romdata <= X"536C5A8B";
when 16#0B76# => romdata <= X"D0AF4817";
when 16#0B77# => romdata <= X"89838DA5";
when 16#0B78# => romdata <= X"4A39BA56";
when 16#0B79# => romdata <= X"D014E122";
when 16#0B7A# => romdata <= X"42600AC7";
when 16#0B7B# => romdata <= X"8D28ADAC";
when 16#0B7C# => romdata <= X"3FFD3600";
when 16#0B7D# => romdata <= X"E8964458";
when 16#0B7E# => romdata <= X"68064D1D";
when 16#0B7F# => romdata <= X"2ACF22E0";
when 16#0B80# => romdata <= X"BF5202D3";
when 16#0B81# => romdata <= X"599D2DDA";
when 16#0B82# => romdata <= X"AE5F526B";
when 16#0B83# => romdata <= X"6B6AC469";
when 16#0B84# => romdata <= X"D4BA0D0B";
when 16#0B85# => romdata <= X"A5D79B1D";
when 16#0B86# => romdata <= X"B8917332";
when 16#0B87# => romdata <= X"0F0EB68F";
when 16#0B88# => romdata <= X"5D9DA495";
when 16#0B89# => romdata <= X"AA0981F8";
when 16#0B8A# => romdata <= X"022426F6";
when 16#0B8B# => romdata <= X"8519B548";
when 16#0B8C# => romdata <= X"B19B5F8C";
when 16#0B8D# => romdata <= X"F068A6CA";
when 16#0B8E# => romdata <= X"1442AF77";
when 16#0B8F# => romdata <= X"C83B7D86";
when 16#0B90# => romdata <= X"49DC281B";
when 16#0B91# => romdata <= X"F438F957";
when 16#0B92# => romdata <= X"6F7A719A";
when 16#0B93# => romdata <= X"902A860B";
when 16#0B94# => romdata <= X"9ECE9AE9";
when 16#0B95# => romdata <= X"C14B9885";
when 16#0B96# => romdata <= X"9B282010";
when 16#0B97# => romdata <= X"A5DC90DC";
when 16#0B98# => romdata <= X"E612AFEF";
when 16#0B99# => romdata <= X"D44E0E9E";
when 16#0B9A# => romdata <= X"7666A461";
when 16#0B9B# => romdata <= X"AE50C265";
when 16#0B9C# => romdata <= X"6BC03664";
when 16#0B9D# => romdata <= X"8B826CA9";
when 16#0B9E# => romdata <= X"C3C7C53B";
when 16#0B9F# => romdata <= X"30976335";
when 16#0BA0# => romdata <= X"B097C193";
when 16#0BA1# => romdata <= X"90716A41";
when 16#0BA2# => romdata <= X"FD437A20";
when 16#0BA3# => romdata <= X"98BCFA2B";
when 16#0BA4# => romdata <= X"2975F1EA";
when 16#0BA5# => romdata <= X"E5BDBB81";
when 16#0BA6# => romdata <= X"92024C20";
when 16#0BA7# => romdata <= X"136D2542";
when 16#0BA8# => romdata <= X"FD89FB8F";
when 16#0BA9# => romdata <= X"2F94C08F";
when 16#0BAA# => romdata <= X"76510927";
when 16#0BAB# => romdata <= X"9BC4E511";
when 16#0BAC# => romdata <= X"78749623";
when 16#0BAD# => romdata <= X"3F15F52D";
when 16#0BAE# => romdata <= X"7C3BC3E9";
when 16#0BAF# => romdata <= X"8A6DC39A";
when 16#0BB0# => romdata <= X"FA1818B9";
when 16#0BB1# => romdata <= X"533EDE72";
when 16#0BB2# => romdata <= X"FDAF021E";
when 16#0BB3# => romdata <= X"2C9B7D6C";
when 16#0BB4# => romdata <= X"74E49B84";
when 16#0BB5# => romdata <= X"9F372B1A";
when 16#0BB6# => romdata <= X"131F4C53";
when 16#0BB7# => romdata <= X"2DBE3B63";
when 16#0BB8# => romdata <= X"635E0E13";
when 16#0BB9# => romdata <= X"34C87DDB";
when 16#0BBA# => romdata <= X"6F3D7388";
when 16#0BBB# => romdata <= X"3D2B43E8";
when 16#0BBC# => romdata <= X"7CF19E40";
when 16#0BBD# => romdata <= X"D6B404E5";
when 16#0BBE# => romdata <= X"81E807E6";
when 16#0BBF# => romdata <= X"EC1A94F5";
when 16#0BC0# => romdata <= X"261C7F7E";
when 16#0BC1# => romdata <= X"FD4CF043";
when 16#0BC2# => romdata <= X"C90A1A7E";
when 16#0BC3# => romdata <= X"97465022";
when 16#0BC4# => romdata <= X"ABAA1DC2";
when 16#0BC5# => romdata <= X"1588FD28";
when 16#0BC6# => romdata <= X"5E7158FD";
when 16#0BC7# => romdata <= X"9B67EC5F";
when 16#0BC8# => romdata <= X"E7C9E840";
when 16#0BC9# => romdata <= X"29E961E0";
when 16#0BCA# => romdata <= X"45EB5227";
when 16#0BCB# => romdata <= X"E4726154";
when 16#0BCC# => romdata <= X"F4F057FA";
when 16#0BCD# => romdata <= X"337BB20D";
when 16#0BCE# => romdata <= X"DA25D116";
when 16#0BCF# => romdata <= X"32A7995B";
when 16#0BD0# => romdata <= X"81076408";
when 16#0BD1# => romdata <= X"4EBDE01A";
when 16#0BD2# => romdata <= X"F07372EA";
when 16#0BD3# => romdata <= X"82FBAFE0";
when 16#0BD4# => romdata <= X"434401FC";
when 16#0BD5# => romdata <= X"FE05CE8F";
when 16#0BD6# => romdata <= X"E3C20C01";
when 16#0BD7# => romdata <= X"ACF4E9B8";
when 16#0BD8# => romdata <= X"EAF4D50C";
when 16#0BD9# => romdata <= X"73D5C42A";
when 16#0BDA# => romdata <= X"95526CDC";
when 16#0BDB# => romdata <= X"8313DBCA";
when 16#0BDC# => romdata <= X"6ECEACB4";
when 16#0BDD# => romdata <= X"57D96735";
when 16#0BDE# => romdata <= X"65A1CC0A";
when 16#0BDF# => romdata <= X"AE23FD62";
when 16#0BE0# => romdata <= X"61A8943E";
when 16#0BE1# => romdata <= X"8FB84CCE";
when 16#0BE2# => romdata <= X"C676601A";
when 16#0BE3# => romdata <= X"4B302A9C";
when 16#0BE4# => romdata <= X"ACDEC899";
when 16#0BE5# => romdata <= X"8EDC847A";
when 16#0BE6# => romdata <= X"53B3CB0E";
when 16#0BE7# => romdata <= X"12C8B4A7";
when 16#0BE8# => romdata <= X"897D5680";
when 16#0BE9# => romdata <= X"CB14A3D1";
when 16#0BEA# => romdata <= X"1BDBF482";
when 16#0BEB# => romdata <= X"6C3938EB";
when 16#0BEC# => romdata <= X"EEFA0075";
when 16#0BED# => romdata <= X"B6494CC7";
when 16#0BEE# => romdata <= X"14D3C0DD";
when 16#0BEF# => romdata <= X"A2F5F783";
when 16#0BF0# => romdata <= X"CF23AD2D";
when 16#0BF1# => romdata <= X"2545C899";
when 16#0BF2# => romdata <= X"867C1115";
when 16#0BF3# => romdata <= X"BF4A4F55";
when 16#0BF4# => romdata <= X"9F63E680";
when 16#0BF5# => romdata <= X"98955550";
when 16#0BF6# => romdata <= X"BFA1EF77";
when 16#0BF7# => romdata <= X"71598EF8";
when 16#0BF8# => romdata <= X"6A08C0C6";
when 16#0BF9# => romdata <= X"34B29167";
when 16#0BFA# => romdata <= X"4BB77615";
when 16#0BFB# => romdata <= X"121BF083";
when 16#0BFC# => romdata <= X"8DA96D6E";
when 16#0BFD# => romdata <= X"7C53BFE6";
when 16#0BFE# => romdata <= X"A58A382F";
when 16#0BFF# => romdata <= X"D9721CC0";
when 16#0C00# => romdata <= X"BF8903A3";
when 16#0C01# => romdata <= X"918B3FDC";
when 16#0C02# => romdata <= X"06CAB4EF";
when 16#0C03# => romdata <= X"675F7BE3";
when 16#0C04# => romdata <= X"962CD7E3";
when 16#0C05# => romdata <= X"C6ED6433";
when 16#0C06# => romdata <= X"86EE533C";
when 16#0C07# => romdata <= X"3B24A3D9";
when 16#0C08# => romdata <= X"4D2EA2CF";
when 16#0C09# => romdata <= X"B83F0A34";
when 16#0C0A# => romdata <= X"6FF2875D";
when 16#0C0B# => romdata <= X"B07BA647";
when 16#0C0C# => romdata <= X"492D47A8";
when 16#0C0D# => romdata <= X"07E7FD97";
when 16#0C0E# => romdata <= X"17CF12BC";
when 16#0C0F# => romdata <= X"97B3C1BE";
when 16#0C10# => romdata <= X"1361E598";
when 16#0C11# => romdata <= X"850B39D5";
when 16#0C12# => romdata <= X"0CF7BE70";
when 16#0C13# => romdata <= X"0507863B";
when 16#0C14# => romdata <= X"C4BBF266";
when 16#0C15# => romdata <= X"20FAC11D";
when 16#0C16# => romdata <= X"97128049";
when 16#0C17# => romdata <= X"BD96C5E0";
when 16#0C18# => romdata <= X"9DC8FF3F";
when 16#0C19# => romdata <= X"62655D66";
when 16#0C1A# => romdata <= X"0FE66D31";
when 16#0C1B# => romdata <= X"AB0B0F6D";
when 16#0C1C# => romdata <= X"4F8420E3";
when 16#0C1D# => romdata <= X"D2E633C5";
when 16#0C1E# => romdata <= X"71D7FE2A";
when 16#0C1F# => romdata <= X"F1CB4E3B";
when 16#0C20# => romdata <= X"EE95E092";
when 16#0C21# => romdata <= X"B00EFD27";
when 16#0C22# => romdata <= X"96A3DEF3";
when 16#0C23# => romdata <= X"76F75B7E";
when 16#0C24# => romdata <= X"FCBB1413";
when 16#0C25# => romdata <= X"37D81AE5";
when 16#0C26# => romdata <= X"2939D879";
when 16#0C27# => romdata <= X"56C41B1E";
when 16#0C28# => romdata <= X"42C1CCA4";
when 16#0C29# => romdata <= X"317D31AB";
when 16#0C2A# => romdata <= X"4F53DC95";
when 16#0C2B# => romdata <= X"02A3DC77";
when 16#0C2C# => romdata <= X"4E05E1ED";
when 16#0C2D# => romdata <= X"5008CD93";
when 16#0C2E# => romdata <= X"1DDDB98D";
when 16#0C2F# => romdata <= X"FA69960A";
when 16#0C30# => romdata <= X"6ACD45B6";
when 16#0C31# => romdata <= X"0895C4FB";
when 16#0C32# => romdata <= X"A2BDAE8B";
when 16#0C33# => romdata <= X"C7DB8C82";
when 16#0C34# => romdata <= X"1697558B";
when 16#0C35# => romdata <= X"1E0A3111";
when 16#0C36# => romdata <= X"F1567384";
when 16#0C37# => romdata <= X"09FD180C";
when 16#0C38# => romdata <= X"5A4A33B2";
when 16#0C39# => romdata <= X"4C5EE499";
when 16#0C3A# => romdata <= X"1B84133C";
when 16#0C3B# => romdata <= X"E9AC0897";
when 16#0C3C# => romdata <= X"24D62DA9";
when 16#0C3D# => romdata <= X"D9827A2A";
when 16#0C3E# => romdata <= X"04FC1036";
when 16#0C3F# => romdata <= X"52F216A0";
when 16#0C40# => romdata <= X"895E78A9";
when 16#0C41# => romdata <= X"60862708";
when 16#0C42# => romdata <= X"14C2699F";
when 16#0C43# => romdata <= X"475CEFD6";
when 16#0C44# => romdata <= X"359428D8";
when 16#0C45# => romdata <= X"C505BBE8";
when 16#0C46# => romdata <= X"C1A96D27";
when 16#0C47# => romdata <= X"93802219";
when 16#0C48# => romdata <= X"144CA6B3";
when 16#0C49# => romdata <= X"EDB45592";
when 16#0C4A# => romdata <= X"9B39A3E9";
when 16#0C4B# => romdata <= X"F3AB74D6";
when 16#0C4C# => romdata <= X"85608CE3";
when 16#0C4D# => romdata <= X"F301FE38";
when 16#0C4E# => romdata <= X"202ADFEF";
when 16#0C4F# => romdata <= X"529CCFF4";
when 16#0C50# => romdata <= X"6AF36DC2";
when 16#0C51# => romdata <= X"4956A7CD";
when 16#0C52# => romdata <= X"07CEBA55";
when 16#0C53# => romdata <= X"AA4C89F7";
when 16#0C54# => romdata <= X"913A8A4B";
when 16#0C55# => romdata <= X"844FD8F1";
when 16#0C56# => romdata <= X"52C8A823";
when 16#0C57# => romdata <= X"CB9888E3";
when 16#0C58# => romdata <= X"BFEA97D7";
when 16#0C59# => romdata <= X"E4AAFA07";
when 16#0C5A# => romdata <= X"125DA4F5";
when 16#0C5B# => romdata <= X"1D974A5D";
when 16#0C5C# => romdata <= X"AFF0045B";
when 16#0C5D# => romdata <= X"CE5B8681";
when 16#0C5E# => romdata <= X"77A91BD9";
when 16#0C5F# => romdata <= X"32963451";
when 16#0C60# => romdata <= X"EE2673A8";
when 16#0C61# => romdata <= X"5AA8B7D4";
when 16#0C62# => romdata <= X"93BDF25B";
when 16#0C63# => romdata <= X"CC2F64AE";
when 16#0C64# => romdata <= X"C3150D8C";
when 16#0C65# => romdata <= X"40C835AB";
when 16#0C66# => romdata <= X"4F5D0B7F";
when 16#0C67# => romdata <= X"259DF099";
when 16#0C68# => romdata <= X"BD6FA9F5";
when 16#0C69# => romdata <= X"CB198B61";
when 16#0C6A# => romdata <= X"018B1448";
when 16#0C6B# => romdata <= X"035CCD34";
when 16#0C6C# => romdata <= X"E7E7A213";
when 16#0C6D# => romdata <= X"8F437490";
when 16#0C6E# => romdata <= X"026050BB";
when 16#0C6F# => romdata <= X"E3CE2D4C";
when 16#0C70# => romdata <= X"F4F4F095";
when 16#0C71# => romdata <= X"CB97548E";
when 16#0C72# => romdata <= X"5731A338";
when 16#0C73# => romdata <= X"CB390351";
when 16#0C74# => romdata <= X"9D6B13A0";
when 16#0C75# => romdata <= X"29727F04";
when 16#0C76# => romdata <= X"7A7D0090";
when 16#0C77# => romdata <= X"4A556C88";
when 16#0C78# => romdata <= X"37454103";
when 16#0C79# => romdata <= X"60FC878F";
when 16#0C7A# => romdata <= X"77707A71";
when 16#0C7B# => romdata <= X"6D549ACD";
when 16#0C7C# => romdata <= X"6A70A18F";
when 16#0C7D# => romdata <= X"9EE0AA8A";
when 16#0C7E# => romdata <= X"6EE20806";
when 16#0C7F# => romdata <= X"08E10AC0";
when 16#0C80# => romdata <= X"F58CDE0E";
when 16#0C81# => romdata <= X"FE2356F4";
when 16#0C82# => romdata <= X"29B0F2F9";
when 16#0C83# => romdata <= X"A7869A41";
when 16#0C84# => romdata <= X"42A61731";
when 16#0C85# => romdata <= X"88DD75B5";
when 16#0C86# => romdata <= X"70F1D1EC";
when 16#0C87# => romdata <= X"D282E4AF";
when 16#0C88# => romdata <= X"BAD11370";
when 16#0C89# => romdata <= X"C5B4CCF3";
when 16#0C8A# => romdata <= X"C98535D2";
when 16#0C8B# => romdata <= X"7D73C011";
when 16#0C8C# => romdata <= X"1F11A847";
when 16#0C8D# => romdata <= X"11F73244";
when 16#0C8E# => romdata <= X"1EAECAB6";
when 16#0C8F# => romdata <= X"84F2F0D7";
when 16#0C90# => romdata <= X"FD4FC407";
when 16#0C91# => romdata <= X"07495749";
when 16#0C92# => romdata <= X"22A906E8";
when 16#0C93# => romdata <= X"4B3350CD";
when 16#0C94# => romdata <= X"E5957DC3";
when 16#0C95# => romdata <= X"88FDA23B";
when 16#0C96# => romdata <= X"F45F0595";
when 16#0C97# => romdata <= X"1A393DA2";
when 16#0C98# => romdata <= X"53EAF691";
when 16#0C99# => romdata <= X"940897B5";
when 16#0C9A# => romdata <= X"7ACE655E";
when 16#0C9B# => romdata <= X"9630F098";
when 16#0C9C# => romdata <= X"56E76958";
when 16#0C9D# => romdata <= X"D6BF7B83";
when 16#0C9E# => romdata <= X"0E0CB818";
when 16#0C9F# => romdata <= X"2AE226F3";
when 16#0CA0# => romdata <= X"9D48036C";
when 16#0CA1# => romdata <= X"867BEFA7";
when 16#0CA2# => romdata <= X"E7ADBAD1";
when 16#0CA3# => romdata <= X"7C1AB452";
when 16#0CA4# => romdata <= X"97C757DA";
when 16#0CA5# => romdata <= X"4AFFBAE6";
when 16#0CA6# => romdata <= X"77B05677";
when 16#0CA7# => romdata <= X"D60DE1D9";
when 16#0CA8# => romdata <= X"75A4F3D7";
when 16#0CA9# => romdata <= X"EB3461B4";
when 16#0CAA# => romdata <= X"24B67B61";
when 16#0CAB# => romdata <= X"025AAC25";
when 16#0CAC# => romdata <= X"7A69FF72";
when 16#0CAD# => romdata <= X"0CB9DAC0";
when 16#0CAE# => romdata <= X"07C50C69";
when 16#0CAF# => romdata <= X"A7ACDBBC";
when 16#0CB0# => romdata <= X"E210BAD4";
when 16#0CB1# => romdata <= X"DC2E629A";
when 16#0CB2# => romdata <= X"039D98E7";
when 16#0CB3# => romdata <= X"EA037A5C";
when 16#0CB4# => romdata <= X"344B5CAE";
when 16#0CB5# => romdata <= X"DCDA035F";
when 16#0CB6# => romdata <= X"28677A41";
when 16#0CB7# => romdata <= X"D55A0E3E";
when 16#0CB8# => romdata <= X"6E480CCB";
when 16#0CB9# => romdata <= X"12B8F170";
when 16#0CBA# => romdata <= X"62A983F4";
when 16#0CBB# => romdata <= X"E651B4F7";
when 16#0CBC# => romdata <= X"CB217FD0";
when 16#0CBD# => romdata <= X"6BE46747";
when 16#0CBE# => romdata <= X"CD5418C0";
when 16#0CBF# => romdata <= X"C8191646";
when 16#0CC0# => romdata <= X"5A4F5660";
when 16#0CC1# => romdata <= X"152B3E47";
when 16#0CC2# => romdata <= X"81DA8040";
when 16#0CC3# => romdata <= X"D4246F9B";
when 16#0CC4# => romdata <= X"C47366BF";
when 16#0CC5# => romdata <= X"663CF9DA";
when 16#0CC6# => romdata <= X"3BB247D9";
when 16#0CC7# => romdata <= X"238873CC";
when 16#0CC8# => romdata <= X"DC6FC62D";
when 16#0CC9# => romdata <= X"1D8F669E";
when 16#0CCA# => romdata <= X"FBA42527";
when 16#0CCB# => romdata <= X"112FF407";
when 16#0CCC# => romdata <= X"2262F7E6";
when 16#0CCD# => romdata <= X"5AEAC328";
when 16#0CCE# => romdata <= X"871DDF47";
when 16#0CCF# => romdata <= X"588A0A0D";
when 16#0CD0# => romdata <= X"D13A4139";
when 16#0CD1# => romdata <= X"F4145822";
when 16#0CD2# => romdata <= X"A5917F62";
when 16#0CD3# => romdata <= X"4B881BFC";
when 16#0CD4# => romdata <= X"354F37B6";
when 16#0CD5# => romdata <= X"D59C5668";
when 16#0CD6# => romdata <= X"23F629A2";
when 16#0CD7# => romdata <= X"1C973324";
when 16#0CD8# => romdata <= X"F7167BC3";
when 16#0CD9# => romdata <= X"9FBD2C12";
when 16#0CDA# => romdata <= X"1D2A8493";
when 16#0CDB# => romdata <= X"08D13DA1";
when 16#0CDC# => romdata <= X"A28948EB";
when 16#0CDD# => romdata <= X"59F7DE97";
when 16#0CDE# => romdata <= X"E364223E";
when 16#0CDF# => romdata <= X"17A30119";
when 16#0CE0# => romdata <= X"BBC7F43E";
when 16#0CE1# => romdata <= X"21E7DC30";
when 16#0CE2# => romdata <= X"93F75050";
when 16#0CE3# => romdata <= X"55ADAB46";
when 16#0CE4# => romdata <= X"54194A77";
when 16#0CE5# => romdata <= X"C1CCB618";
when 16#0CE6# => romdata <= X"98840125";
when 16#0CE7# => romdata <= X"455A275A";
when 16#0CE8# => romdata <= X"8F071273";
when 16#0CE9# => romdata <= X"D8C13934";
when 16#0CEA# => romdata <= X"915D379C";
when 16#0CEB# => romdata <= X"C603657D";
when 16#0CEC# => romdata <= X"99CE4075";
when 16#0CED# => romdata <= X"C1F1DCAB";
when 16#0CEE# => romdata <= X"60B6BD62";
when 16#0CEF# => romdata <= X"ABA1A10B";
when 16#0CF0# => romdata <= X"5402A597";
when 16#0CF1# => romdata <= X"06798002";
when 16#0CF2# => romdata <= X"EF30ADED";
when 16#0CF3# => romdata <= X"2F354E38";
when 16#0CF4# => romdata <= X"CE0B5790";
when 16#0CF5# => romdata <= X"0FDAD31E";
when 16#0CF6# => romdata <= X"7F684E53";
when 16#0CF7# => romdata <= X"D097B431";
when 16#0CF8# => romdata <= X"3DB552EA";
when 16#0CF9# => romdata <= X"66F6D337";
when 16#0CFA# => romdata <= X"F2959447";
when 16#0CFB# => romdata <= X"0D3DC0BC";
when 16#0CFC# => romdata <= X"6CD36183";
when 16#0CFD# => romdata <= X"1251004D";
when 16#0CFE# => romdata <= X"D3C5357B";
when 16#0CFF# => romdata <= X"C0BECFE0";
when 16#0D00# => romdata <= X"D9086F7C";
when 16#0D01# => romdata <= X"272AA317";
when 16#0D02# => romdata <= X"C64C00AF";
when 16#0D03# => romdata <= X"43C924DB";
when 16#0D04# => romdata <= X"5DAC97F8";
when 16#0D05# => romdata <= X"EE3ED229";
when 16#0D06# => romdata <= X"6252FC47";
when 16#0D07# => romdata <= X"56FCE692";
when 16#0D08# => romdata <= X"8BB009D4";
when 16#0D09# => romdata <= X"488B9BAB";
when 16#0D0A# => romdata <= X"757411BB";
when 16#0D0B# => romdata <= X"A52BA6F6";
when 16#0D0C# => romdata <= X"1AF1181C";
when 16#0D0D# => romdata <= X"C7BBA942";
when 16#0D0E# => romdata <= X"57593FA1";
when 16#0D0F# => romdata <= X"BD26D52A";
when 16#0D10# => romdata <= X"D5014C3F";
when 16#0D11# => romdata <= X"1A1832FC";
when 16#0D12# => romdata <= X"4F7445C8";
when 16#0D13# => romdata <= X"BBB77C8F";
when 16#0D14# => romdata <= X"D31C88F0";
when 16#0D15# => romdata <= X"C5D4736D";
when 16#0D16# => romdata <= X"49DCDFBE";
when 16#0D17# => romdata <= X"EF2B8301";
when 16#0D18# => romdata <= X"E3118579";
when 16#0D19# => romdata <= X"3BFF87CF";
when 16#0D1A# => romdata <= X"D9E6F7E0";
when 16#0D1B# => romdata <= X"84D343AB";
when 16#0D1C# => romdata <= X"98BA3518";
when 16#0D1D# => romdata <= X"A87A5F91";
when 16#0D1E# => romdata <= X"5BC0D76B";
when 16#0D1F# => romdata <= X"01AF7DC1";
when 16#0D20# => romdata <= X"CE45F1C5";
when 16#0D21# => romdata <= X"280BD39D";
when 16#0D22# => romdata <= X"3E3D94D0";
when 16#0D23# => romdata <= X"A0286F8B";
when 16#0D24# => romdata <= X"D9FA9428";
when 16#0D25# => romdata <= X"49664E08";
when 16#0D26# => romdata <= X"F2BE0B93";
when 16#0D27# => romdata <= X"C6E3B890";
when 16#0D28# => romdata <= X"61193FAD";
when 16#0D29# => romdata <= X"A0FA9485";
when 16#0D2A# => romdata <= X"F62CA87F";
when 16#0D2B# => romdata <= X"3E68E204";
when 16#0D2C# => romdata <= X"186EF118";
when 16#0D2D# => romdata <= X"7642D651";
when 16#0D2E# => romdata <= X"162E4D8E";
when 16#0D2F# => romdata <= X"7DA049F4";
when 16#0D30# => romdata <= X"62362D8C";
when 16#0D31# => romdata <= X"94539CAA";
when 16#0D32# => romdata <= X"D09AE476";
when 16#0D33# => romdata <= X"8C96ED6C";
when 16#0D34# => romdata <= X"2CAB8025";
when 16#0D35# => romdata <= X"EBB6901C";
when 16#0D36# => romdata <= X"BB26865E";
when 16#0D37# => romdata <= X"1F19FA1B";
when 16#0D38# => romdata <= X"193D47EC";
when 16#0D39# => romdata <= X"E390B881";
when 16#0D3A# => romdata <= X"23357895";
when 16#0D3B# => romdata <= X"0175C85B";
when 16#0D3C# => romdata <= X"928582D5";
when 16#0D3D# => romdata <= X"B439EEF2";
when 16#0D3E# => romdata <= X"F56A8C7E";
when 16#0D3F# => romdata <= X"A09278E4";
when 16#0D40# => romdata <= X"77410512";
when 16#0D41# => romdata <= X"23AC1824";
when 16#0D42# => romdata <= X"56C4FA04";
when 16#0D43# => romdata <= X"D025BDB3";
when 16#0D44# => romdata <= X"3FA10C48";
when 16#0D45# => romdata <= X"C70EC91B";
when 16#0D46# => romdata <= X"C709E3CB";
when 16#0D47# => romdata <= X"0FA3E01D";
when 16#0D48# => romdata <= X"CE5FE5EC";
when 16#0D49# => romdata <= X"B9018130";
when 16#0D4A# => romdata <= X"A8DE5D05";
when 16#0D4B# => romdata <= X"83EDD68E";
when 16#0D4C# => romdata <= X"A2EF227A";
when 16#0D4D# => romdata <= X"612748B2";
when 16#0D4E# => romdata <= X"F785A30A";
when 16#0D4F# => romdata <= X"01014BD4";
when 16#0D50# => romdata <= X"79DEC625";
when 16#0D51# => romdata <= X"6C8AD884";
when 16#0D52# => romdata <= X"70F79DE0";
when 16#0D53# => romdata <= X"E1432CAE";
when 16#0D54# => romdata <= X"448DD704";
when 16#0D55# => romdata <= X"9E5B7D4D";
when 16#0D56# => romdata <= X"F3C978F6";
when 16#0D57# => romdata <= X"5E708CA3";
when 16#0D58# => romdata <= X"759AAB9D";
when 16#0D59# => romdata <= X"329C11FA";
when 16#0D5A# => romdata <= X"D71204E1";
when 16#0D5B# => romdata <= X"E92322E3";
when 16#0D5C# => romdata <= X"EA1BBDD9";
when 16#0D5D# => romdata <= X"D034E2A2";
when 16#0D5E# => romdata <= X"3ACAFA21";
when 16#0D5F# => romdata <= X"CF490AA5";
when 16#0D60# => romdata <= X"E2E41919";
when 16#0D61# => romdata <= X"7DBE9906";
when 16#0D62# => romdata <= X"67BCF277";
when 16#0D63# => romdata <= X"ED61B264";
when 16#0D64# => romdata <= X"632F6943";
when 16#0D65# => romdata <= X"92EF52F0";
when 16#0D66# => romdata <= X"A27C38E4";
when 16#0D67# => romdata <= X"78257AEC";
when 16#0D68# => romdata <= X"8D254293";
when 16#0D69# => romdata <= X"8BF0713E";
when 16#0D6A# => romdata <= X"BE60779C";
when 16#0D6B# => romdata <= X"95A0EEC8";
when 16#0D6C# => romdata <= X"F32A5202";
when 16#0D6D# => romdata <= X"A849CEE8";
when 16#0D6E# => romdata <= X"CE0F9970";
when 16#0D6F# => romdata <= X"2F595AEA";
when 16#0D70# => romdata <= X"839531D4";
when 16#0D71# => romdata <= X"CFB5F5A6";
when 16#0D72# => romdata <= X"166B06EB";
when 16#0D73# => romdata <= X"64387552";
when 16#0D74# => romdata <= X"A1F9BC6B";
when 16#0D75# => romdata <= X"B97B9B99";
when 16#0D76# => romdata <= X"D19C3D2E";
when 16#0D77# => romdata <= X"1E8E9B30";
when 16#0D78# => romdata <= X"5D525E74";
when 16#0D79# => romdata <= X"13496E40";
when 16#0D7A# => romdata <= X"FF50CF77";
when 16#0D7B# => romdata <= X"D4D4E2D4";
when 16#0D7C# => romdata <= X"1B1D5929";
when 16#0D7D# => romdata <= X"848FB2F1";
when 16#0D7E# => romdata <= X"FDDA5A39";
when 16#0D7F# => romdata <= X"DEA05460";
when 16#0D80# => romdata <= X"AE4E3B30";
when 16#0D81# => romdata <= X"560A50DA";
when 16#0D82# => romdata <= X"55AB3E59";
when 16#0D83# => romdata <= X"FFF51284";
when 16#0D84# => romdata <= X"4A2700D2";
when 16#0D85# => romdata <= X"D763D85D";
when 16#0D86# => romdata <= X"5C3FD8CF";
when 16#0D87# => romdata <= X"EFACD4D0";
when 16#0D88# => romdata <= X"23BD926D";
when 16#0D89# => romdata <= X"3EF2E55E";
when 16#0D8A# => romdata <= X"B1B3831F";
when 16#0D8B# => romdata <= X"2276EB07";
when 16#0D8C# => romdata <= X"E5C07B44";
when 16#0D8D# => romdata <= X"FD7D7933";
when 16#0D8E# => romdata <= X"3699BED0";
when 16#0D8F# => romdata <= X"804B6789";
when 16#0D90# => romdata <= X"15FE0F09";
when 16#0D91# => romdata <= X"2DA9A62F";
when 16#0D92# => romdata <= X"69CB020D";
when 16#0D93# => romdata <= X"A21932F9";
when 16#0D94# => romdata <= X"FDF9AF33";
when 16#0D95# => romdata <= X"2E1B400C";
when 16#0D96# => romdata <= X"6B7E7880";
when 16#0D97# => romdata <= X"508E840D";
when 16#0D98# => romdata <= X"62FBA07E";
when 16#0D99# => romdata <= X"827A23A2";
when 16#0D9A# => romdata <= X"575AE68E";
when 16#0D9B# => romdata <= X"15AC444A";
when 16#0D9C# => romdata <= X"1CE35DF3";
when 16#0D9D# => romdata <= X"C3F7CA49";
when 16#0D9E# => romdata <= X"DEF2966D";
when 16#0D9F# => romdata <= X"F3BA89C8";
when 16#0DA0# => romdata <= X"E90ED5E2";
when 16#0DA1# => romdata <= X"421A6407";
when 16#0DA2# => romdata <= X"F2EC51A3";
when 16#0DA3# => romdata <= X"E92A3608";
when 16#0DA4# => romdata <= X"FCBD6AD9";
when 16#0DA5# => romdata <= X"FF9E5C78";
when 16#0DA6# => romdata <= X"17E79A0C";
when 16#0DA7# => romdata <= X"09FE9014";
when 16#0DA8# => romdata <= X"F7AC2914";
when 16#0DA9# => romdata <= X"48263E43";
when 16#0DAA# => romdata <= X"46CBC4BA";
when 16#0DAB# => romdata <= X"A6EABFB5";
when 16#0DAC# => romdata <= X"9B4526B6";
when 16#0DAD# => romdata <= X"54070084";
when 16#0DAE# => romdata <= X"F52B864F";
when 16#0DAF# => romdata <= X"9769181D";
when 16#0DB0# => romdata <= X"C6EA91B5";
when 16#0DB1# => romdata <= X"76956397";
when 16#0DB2# => romdata <= X"CE55CCDD";
when 16#0DB3# => romdata <= X"BE41F94E";
when 16#0DB4# => romdata <= X"5DC366E7";
when 16#0DB5# => romdata <= X"75C86ADB";
when 16#0DB6# => romdata <= X"1C807B66";
when 16#0DB7# => romdata <= X"D08696A2";
when 16#0DB8# => romdata <= X"BEE45B90";
when 16#0DB9# => romdata <= X"E8736469";
when 16#0DBA# => romdata <= X"A371F059";
when 16#0DBB# => romdata <= X"29D9D9FD";
when 16#0DBC# => romdata <= X"34980DE0";
when 16#0DBD# => romdata <= X"8E00BDE2";
when 16#0DBE# => romdata <= X"CD0EAB6A";
when 16#0DBF# => romdata <= X"F2165D76";
when 16#0DC0# => romdata <= X"519F8F2D";
when 16#0DC1# => romdata <= X"894AC707";
when 16#0DC2# => romdata <= X"40D2372B";
when 16#0DC3# => romdata <= X"37407BDA";
when 16#0DC4# => romdata <= X"4D943EDF";
when 16#0DC5# => romdata <= X"1CBD35CC";
when 16#0DC6# => romdata <= X"E4D81340";
when 16#0DC7# => romdata <= X"CC97751C";
when 16#0DC8# => romdata <= X"568731C0";
when 16#0DC9# => romdata <= X"09DF6557";
when 16#0DCA# => romdata <= X"1F28B7F5";
when 16#0DCB# => romdata <= X"8106AE67";
when 16#0DCC# => romdata <= X"279E83C3";
when 16#0DCD# => romdata <= X"A0C130DE";
when 16#0DCE# => romdata <= X"0C5B6C99";
when 16#0DCF# => romdata <= X"11709954";
when 16#0DD0# => romdata <= X"8661D290";
when 16#0DD1# => romdata <= X"C4CAF3BC";
when 16#0DD2# => romdata <= X"60EF719E";
when 16#0DD3# => romdata <= X"2F7B210F";
when 16#0DD4# => romdata <= X"CD4381C3";
when 16#0DD5# => romdata <= X"3904AFDF";
when 16#0DD6# => romdata <= X"96DC3A65";
when 16#0DD7# => romdata <= X"57B42B6E";
when 16#0DD8# => romdata <= X"E895B4D6";
when 16#0DD9# => romdata <= X"04F5F898";
when 16#0DDA# => romdata <= X"5F454C51";
when 16#0DDB# => romdata <= X"E32B2C87";
when 16#0DDC# => romdata <= X"4E90926C";
when 16#0DDD# => romdata <= X"BC58D044";
when 16#0DDE# => romdata <= X"D483D6D2";
when 16#0DDF# => romdata <= X"A7C26C7A";
when 16#0DE0# => romdata <= X"C4D19053";
when 16#0DE1# => romdata <= X"1F79993D";
when 16#0DE2# => romdata <= X"07B2E830";
when 16#0DE3# => romdata <= X"FEB99BFD";
when 16#0DE4# => romdata <= X"B00AE8C0";
when 16#0DE5# => romdata <= X"08DB1B76";
when 16#0DE6# => romdata <= X"2F3F4A81";
when 16#0DE7# => romdata <= X"D41295FD";
when 16#0DE8# => romdata <= X"DA37F305";
when 16#0DE9# => romdata <= X"6B1110D4";
when 16#0DEA# => romdata <= X"F0CF385F";
when 16#0DEB# => romdata <= X"9FCC7E14";
when 16#0DEC# => romdata <= X"C34F6752";
when 16#0DED# => romdata <= X"A2FB17F5";
when 16#0DEE# => romdata <= X"CD3FC4AF";
when 16#0DEF# => romdata <= X"0D51E4A0";
when 16#0DF0# => romdata <= X"AF7D28DB";
when 16#0DF1# => romdata <= X"0D4D6511";
when 16#0DF2# => romdata <= X"56189209";
when 16#0DF3# => romdata <= X"480054F8";
when 16#0DF4# => romdata <= X"287266B1";
when 16#0DF5# => romdata <= X"CB26C9E8";
when 16#0DF6# => romdata <= X"CACAA0BE";
when 16#0DF7# => romdata <= X"5A69C696";
when 16#0DF8# => romdata <= X"300025D1";
when 16#0DF9# => romdata <= X"60F9DA29";
when 16#0DFA# => romdata <= X"F9EC7983";
when 16#0DFB# => romdata <= X"8941459B";
when 16#0DFC# => romdata <= X"7B8164AA";
when 16#0DFD# => romdata <= X"D95577A0";
when 16#0DFE# => romdata <= X"C532EC2E";
when 16#0DFF# => romdata <= X"DB352500";
when 16#0E00# => romdata <= X"9CF0CC00";
when 16#0E01# => romdata <= X"B5788DD7";
when 16#0E02# => romdata <= X"43A5F33D";
when 16#0E03# => romdata <= X"87E8FA57";
when 16#0E04# => romdata <= X"33B72EDB";
when 16#0E05# => romdata <= X"CD61AA4B";
when 16#0E06# => romdata <= X"8D0B8121";
when 16#0E07# => romdata <= X"3DB52E7E";
when 16#0E08# => romdata <= X"F17AE909";
when 16#0E09# => romdata <= X"34F5EC07";
when 16#0E0A# => romdata <= X"11ADD19E";
when 16#0E0B# => romdata <= X"881CC330";
when 16#0E0C# => romdata <= X"F696179C";
when 16#0E0D# => romdata <= X"1BA464FF";
when 16#0E0E# => romdata <= X"E6D7B04E";
when 16#0E0F# => romdata <= X"EC383A41";
when 16#0E10# => romdata <= X"06BE5892";
when 16#0E11# => romdata <= X"C5DD1BD7";
when 16#0E12# => romdata <= X"19AB3739";
when 16#0E13# => romdata <= X"A909A384";
when 16#0E14# => romdata <= X"FACA455E";
when 16#0E15# => romdata <= X"6AF96600";
when 16#0E16# => romdata <= X"AC6FF809";
when 16#0E17# => romdata <= X"788700DD";
when 16#0E18# => romdata <= X"2AB93DD2";
when 16#0E19# => romdata <= X"28483759";
when 16#0E1A# => romdata <= X"BD903EC0";
when 16#0E1B# => romdata <= X"02D4C127";
when 16#0E1C# => romdata <= X"8808B764";
when 16#0E1D# => romdata <= X"F018E3B7";
when 16#0E1E# => romdata <= X"40EFD821";
when 16#0E1F# => romdata <= X"A61F5BEA";
when 16#0E20# => romdata <= X"2948A653";
when 16#0E21# => romdata <= X"041FB31F";
when 16#0E22# => romdata <= X"6D5D0DE0";
when 16#0E23# => romdata <= X"A045DA36";
when 16#0E24# => romdata <= X"6E44112C";
when 16#0E25# => romdata <= X"820FD7FA";
when 16#0E26# => romdata <= X"966B2CCF";
when 16#0E27# => romdata <= X"D5A6816A";
when 16#0E28# => romdata <= X"F84DC0A3";
when 16#0E29# => romdata <= X"EEB8F9D2";
when 16#0E2A# => romdata <= X"F0A91258";
when 16#0E2B# => romdata <= X"6F91D50B";
when 16#0E2C# => romdata <= X"1AE3D930";
when 16#0E2D# => romdata <= X"A680A8FB";
when 16#0E2E# => romdata <= X"7435B687";
when 16#0E2F# => romdata <= X"5ED2E599";
when 16#0E30# => romdata <= X"B87598A7";
when 16#0E31# => romdata <= X"C2024529";
when 16#0E32# => romdata <= X"6C4965E2";
when 16#0E33# => romdata <= X"E0CF372B";
when 16#0E34# => romdata <= X"6ED1219B";
when 16#0E35# => romdata <= X"A68CB646";
when 16#0E36# => romdata <= X"D3E73D52";
when 16#0E37# => romdata <= X"665AAF2E";
when 16#0E38# => romdata <= X"3D1C4DE8";
when 16#0E39# => romdata <= X"D2645782";
when 16#0E3A# => romdata <= X"99B166FA";
when 16#0E3B# => romdata <= X"0E148281";
when 16#0E3C# => romdata <= X"C877FA9B";
when 16#0E3D# => romdata <= X"14818759";
when 16#0E3E# => romdata <= X"CBF7FF57";
when 16#0E3F# => romdata <= X"5307E80B";
when 16#0E40# => romdata <= X"73933599";
when 16#0E41# => romdata <= X"D94EAD2F";
when 16#0E42# => romdata <= X"B1C08A30";
when 16#0E43# => romdata <= X"006330BF";
when 16#0E44# => romdata <= X"0AC1F1C0";
when 16#0E45# => romdata <= X"A4EE6B07";
when 16#0E46# => romdata <= X"F9F3381A";
when 16#0E47# => romdata <= X"D7E2E469";
when 16#0E48# => romdata <= X"E8DA9C2D";
when 16#0E49# => romdata <= X"22CFC0A2";
when 16#0E4A# => romdata <= X"08B58924";
when 16#0E4B# => romdata <= X"D2F994AF";
when 16#0E4C# => romdata <= X"C0268EFE";
when 16#0E4D# => romdata <= X"206E0A9E";
when 16#0E4E# => romdata <= X"B79BB51C";
when 16#0E4F# => romdata <= X"A26FB490";
when 16#0E50# => romdata <= X"13B9A170";
when 16#0E51# => romdata <= X"17E0C08F";
when 16#0E52# => romdata <= X"9FFC6C31";
when 16#0E53# => romdata <= X"9BB1B5AE";
when 16#0E54# => romdata <= X"41771443";
when 16#0E55# => romdata <= X"BC670EEB";
when 16#0E56# => romdata <= X"91D7769F";
when 16#0E57# => romdata <= X"9890A9B8";
when 16#0E58# => romdata <= X"0F52CB01";
when 16#0E59# => romdata <= X"67EAAF85";
when 16#0E5A# => romdata <= X"0FAF2A52";
when 16#0E5B# => romdata <= X"B74ABB17";
when 16#0E5C# => romdata <= X"92E7CEFF";
when 16#0E5D# => romdata <= X"68C0D38B";
when 16#0E5E# => romdata <= X"01F244AC";
when 16#0E5F# => romdata <= X"0CC0EF07";
when 16#0E60# => romdata <= X"31E3BDDC";
when 16#0E61# => romdata <= X"DAB89DF3";
when 16#0E62# => romdata <= X"76973A7E";
when 16#0E63# => romdata <= X"D5D4264E";
when 16#0E64# => romdata <= X"E82C3346";
when 16#0E65# => romdata <= X"71FCD39E";
when 16#0E66# => romdata <= X"CD6E2CF8";
when 16#0E67# => romdata <= X"69493914";
when 16#0E68# => romdata <= X"F332767B";
when 16#0E69# => romdata <= X"BE461707";
when 16#0E6A# => romdata <= X"166A9164";
when 16#0E6B# => romdata <= X"776D29F5";
when 16#0E6C# => romdata <= X"EC9291F5";
when 16#0E6D# => romdata <= X"05AF2912";
when 16#0E6E# => romdata <= X"54D7319A";
when 16#0E6F# => romdata <= X"A594B5F3";
when 16#0E70# => romdata <= X"97D5BDF0";
when 16#0E71# => romdata <= X"0BB840C4";
when 16#0E72# => romdata <= X"DDCB425F";
when 16#0E73# => romdata <= X"4325ED8A";
when 16#0E74# => romdata <= X"B77E57BE";
when 16#0E75# => romdata <= X"CA3441B8";
when 16#0E76# => romdata <= X"94146166";
when 16#0E77# => romdata <= X"71692EA8";
when 16#0E78# => romdata <= X"8A89D269";
when 16#0E79# => romdata <= X"0A4B5FE9";
when 16#0E7A# => romdata <= X"58F990BD";
when 16#0E7B# => romdata <= X"84A3884A";
when 16#0E7C# => romdata <= X"60FADD5D";
when 16#0E7D# => romdata <= X"A57EDF01";
when 16#0E7E# => romdata <= X"865F8582";
when 16#0E7F# => romdata <= X"91954600";
when 16#0E80# => romdata <= X"B85B6E75";
when 16#0E81# => romdata <= X"4CC8F680";
when 16#0E82# => romdata <= X"5A8A19DA";
when 16#0E83# => romdata <= X"104418D9";
when 16#0E84# => romdata <= X"C134C8B0";
when 16#0E85# => romdata <= X"DBCFD5DA";
when 16#0E86# => romdata <= X"AF5A71BC";
when 16#0E87# => romdata <= X"047A73BE";
when 16#0E88# => romdata <= X"DBC192A4";
when 16#0E89# => romdata <= X"53674BC6";
when 16#0E8A# => romdata <= X"24959BB7";
when 16#0E8B# => romdata <= X"6E44C5B3";
when 16#0E8C# => romdata <= X"4244D473";
when 16#0E8D# => romdata <= X"6ED3F0F3";
when 16#0E8E# => romdata <= X"C9658FEC";
when 16#0E8F# => romdata <= X"0DA5437E";
when 16#0E90# => romdata <= X"01E12879";
when 16#0E91# => romdata <= X"5EDD7593";
when 16#0E92# => romdata <= X"D636CD73";
when 16#0E93# => romdata <= X"FC1780B3";
when 16#0E94# => romdata <= X"7A381502";
when 16#0E95# => romdata <= X"633CCF2E";
when 16#0E96# => romdata <= X"FDA0BBB4";
when 16#0E97# => romdata <= X"94C1D0FC";
when 16#0E98# => romdata <= X"7F602DF8";
when 16#0E99# => romdata <= X"C282F55E";
when 16#0E9A# => romdata <= X"3828E81A";
when 16#0E9B# => romdata <= X"92458EB1";
when 16#0E9C# => romdata <= X"6B748350";
when 16#0E9D# => romdata <= X"40D8A9C8";
when 16#0E9E# => romdata <= X"F2DDF180";
when 16#0E9F# => romdata <= X"A617B059";
when 16#0EA0# => romdata <= X"2344B437";
when 16#0EA1# => romdata <= X"3E1B526C";
when 16#0EA2# => romdata <= X"9706B843";
when 16#0EA3# => romdata <= X"B0CED4D2";
when 16#0EA4# => romdata <= X"5D7324C6";
when 16#0EA5# => romdata <= X"FDD0F331";
when 16#0EA6# => romdata <= X"33C00443";
when 16#0EA7# => romdata <= X"638E6249";
when 16#0EA8# => romdata <= X"061C56A1";
when 16#0EA9# => romdata <= X"16CEC782";
when 16#0EAA# => romdata <= X"2F4512AF";
when 16#0EAB# => romdata <= X"AEE52CE8";
when 16#0EAC# => romdata <= X"F94D8547";
when 16#0EAD# => romdata <= X"F72612EA";
when 16#0EAE# => romdata <= X"8C7D160C";
when 16#0EAF# => romdata <= X"65FA3BCC";
when 16#0EB0# => romdata <= X"92BE0149";
when 16#0EB1# => romdata <= X"3706EC4E";
when 16#0EB2# => romdata <= X"5F203F0B";
when 16#0EB3# => romdata <= X"F85C52F4";
when 16#0EB4# => romdata <= X"17BAF8AF";
when 16#0EB5# => romdata <= X"490E5013";
when 16#0EB6# => romdata <= X"3505685C";
when 16#0EB7# => romdata <= X"E63AC5B1";
when 16#0EB8# => romdata <= X"73E07D8D";
when 16#0EB9# => romdata <= X"ABB2D439";
when 16#0EBA# => romdata <= X"C6DC18B4";
when 16#0EBB# => romdata <= X"1B9CF37D";
when 16#0EBC# => romdata <= X"02C92AB5";
when 16#0EBD# => romdata <= X"C2F27EC8";
when 16#0EBE# => romdata <= X"3AB6B2DD";
when 16#0EBF# => romdata <= X"CB7ABCEA";
when 16#0EC0# => romdata <= X"30A95BBC";
when 16#0EC1# => romdata <= X"39E9FD0C";
when 16#0EC2# => romdata <= X"BB281188";
when 16#0EC3# => romdata <= X"23F7D034";
when 16#0EC4# => romdata <= X"2F1EB7B4";
when 16#0EC5# => romdata <= X"5FA6BB3A";
when 16#0EC6# => romdata <= X"50223D0D";
when 16#0EC7# => romdata <= X"7B14E975";
when 16#0EC8# => romdata <= X"E7658352";
when 16#0EC9# => romdata <= X"BC9288B4";
when 16#0ECA# => romdata <= X"8AF13469";
when 16#0ECB# => romdata <= X"55F4551F";
when 16#0ECC# => romdata <= X"2ECA47D4";
when 16#0ECD# => romdata <= X"23EFC63D";
when 16#0ECE# => romdata <= X"20681057";
when 16#0ECF# => romdata <= X"E5EF234D";
when 16#0ED0# => romdata <= X"061A5E6E";
when 16#0ED1# => romdata <= X"234ED01F";
when 16#0ED2# => romdata <= X"3DF223A0";
when 16#0ED3# => romdata <= X"E8B4DEDD";
when 16#0ED4# => romdata <= X"C552C7DC";
when 16#0ED5# => romdata <= X"3ECF663D";
when 16#0ED6# => romdata <= X"5011FC90";
when 16#0ED7# => romdata <= X"7EB4A7CF";
when 16#0ED8# => romdata <= X"746AB9E0";
when 16#0ED9# => romdata <= X"7C2929B7";
when 16#0EDA# => romdata <= X"427DFE9E";
when 16#0EDB# => romdata <= X"00B0A130";
when 16#0EDC# => romdata <= X"88819126";
when 16#0EDD# => romdata <= X"35A72EA9";
when 16#0EDE# => romdata <= X"9927F343";
when 16#0EDF# => romdata <= X"EBAD3243";
when 16#0EE0# => romdata <= X"6A9B8EB1";
when 16#0EE1# => romdata <= X"934AC29E";
when 16#0EE2# => romdata <= X"79BB80AB";
when 16#0EE3# => romdata <= X"3ED9F5CE";
when 16#0EE4# => romdata <= X"39D1E43C";
when 16#0EE5# => romdata <= X"25156465";
when 16#0EE6# => romdata <= X"4365DA43";
when 16#0EE7# => romdata <= X"FB8A0FBA";
when 16#0EE8# => romdata <= X"27F2328D";
when 16#0EE9# => romdata <= X"82445A1E";
when 16#0EEA# => romdata <= X"AAED67B9";
when 16#0EEB# => romdata <= X"2716147E";
when 16#0EEC# => romdata <= X"859064AC";
when 16#0EED# => romdata <= X"326A42DC";
when 16#0EEE# => romdata <= X"7880DE82";
when 16#0EEF# => romdata <= X"FA782AFF";
when 16#0EF0# => romdata <= X"F9C59FBD";
when 16#0EF1# => romdata <= X"CE088746";
when 16#0EF2# => romdata <= X"F8CEDBA2";
when 16#0EF3# => romdata <= X"88BC8C2C";
when 16#0EF4# => romdata <= X"4B458782";
when 16#0EF5# => romdata <= X"CC9BE63A";
when 16#0EF6# => romdata <= X"86168B67";
when 16#0EF7# => romdata <= X"1BE99A09";
when 16#0EF8# => romdata <= X"F2217B7B";
when 16#0EF9# => romdata <= X"B2A7BC88";
when 16#0EFA# => romdata <= X"651C1BCE";
when 16#0EFB# => romdata <= X"8A0B8931";
when 16#0EFC# => romdata <= X"6ABFE72B";
when 16#0EFD# => romdata <= X"22722273";
when 16#0EFE# => romdata <= X"AF570974";
when 16#0EFF# => romdata <= X"D8EDEE40";
when 16#0F00# => romdata <= X"DD40DD43";
when 16#0F01# => romdata <= X"8251E401";
when 16#0F02# => romdata <= X"FC926CC6";
when 16#0F03# => romdata <= X"96839341";
when 16#0F04# => romdata <= X"5D52D521";
when 16#0F05# => romdata <= X"A5BB34D4";
when 16#0F06# => romdata <= X"272D6BC7";
when 16#0F07# => romdata <= X"B5431062";
when 16#0F08# => romdata <= X"B35112CA";
when 16#0F09# => romdata <= X"709C0680";
when 16#0F0A# => romdata <= X"CBB18EEE";
when 16#0F0B# => romdata <= X"053AAD62";
when 16#0F0C# => romdata <= X"B2391C9E";
when 16#0F0D# => romdata <= X"9D580562";
when 16#0F0E# => romdata <= X"541A453E";
when 16#0F0F# => romdata <= X"D936CE8E";
when 16#0F10# => romdata <= X"88DFA61A";
when 16#0F11# => romdata <= X"88CA3BEE";
when 16#0F12# => romdata <= X"66CFFF80";
when 16#0F13# => romdata <= X"1785CCE8";
when 16#0F14# => romdata <= X"63ED9C36";
when 16#0F15# => romdata <= X"A04D2DC8";
when 16#0F16# => romdata <= X"742A81CA";
when 16#0F17# => romdata <= X"55127B44";
when 16#0F18# => romdata <= X"314AB4E6";
when 16#0F19# => romdata <= X"87ED921B";
when 16#0F1A# => romdata <= X"4881CB36";
when 16#0F1B# => romdata <= X"3AFB3CCE";
when 16#0F1C# => romdata <= X"7EB774E3";
when 16#0F1D# => romdata <= X"205D4591";
when 16#0F1E# => romdata <= X"939ED7D3";
when 16#0F1F# => romdata <= X"C0C508A3";
when 16#0F20# => romdata <= X"1786421F";
when 16#0F21# => romdata <= X"49669E12";
when 16#0F22# => romdata <= X"0F01D35D";
when 16#0F23# => romdata <= X"467B40F8";
when 16#0F24# => romdata <= X"5F2454F1";
when 16#0F25# => romdata <= X"3F591F3B";
when 16#0F26# => romdata <= X"83093742";
when 16#0F27# => romdata <= X"1B5C8A6C";
when 16#0F28# => romdata <= X"20EA8789";
when 16#0F29# => romdata <= X"71AEC941";
when 16#0F2A# => romdata <= X"FD99CEA9";
when 16#0F2B# => romdata <= X"2FEE00E5";
when 16#0F2C# => romdata <= X"DC226498";
when 16#0F2D# => romdata <= X"7DBC549E";
when 16#0F2E# => romdata <= X"FF3E4A26";
when 16#0F2F# => romdata <= X"AF0CAD74";
when 16#0F30# => romdata <= X"21C4256D";
when 16#0F31# => romdata <= X"107A3E89";
when 16#0F32# => romdata <= X"08F67450";
when 16#0F33# => romdata <= X"960E4E41";
when 16#0F34# => romdata <= X"FD7E2E84";
when 16#0F35# => romdata <= X"F754BAC8";
when 16#0F36# => romdata <= X"1C8F5F1D";
when 16#0F37# => romdata <= X"6F650DEB";
when 16#0F38# => romdata <= X"3E6EFF60";
when 16#0F39# => romdata <= X"59836643";
when 16#0F3A# => romdata <= X"209E3880";
when 16#0F3B# => romdata <= X"D7BDA701";
when 16#0F3C# => romdata <= X"869208D8";
when 16#0F3D# => romdata <= X"E4BC8D06";
when 16#0F3E# => romdata <= X"14066414";
when 16#0F3F# => romdata <= X"DB3F93D6";
when 16#0F40# => romdata <= X"EA187950";
when 16#0F41# => romdata <= X"285F55BB";
when 16#0F42# => romdata <= X"7A1B026E";
when 16#0F43# => romdata <= X"A4BFCAB4";
when 16#0F44# => romdata <= X"671B0770";
when 16#0F45# => romdata <= X"4828D5CB";
when 16#0F46# => romdata <= X"F9730EFC";
when 16#0F47# => romdata <= X"99E68E91";
when 16#0F48# => romdata <= X"F1FE9664";
when 16#0F49# => romdata <= X"DFA73297";
when 16#0F4A# => romdata <= X"F2D6BD94";
when 16#0F4B# => romdata <= X"97DE0498";
when 16#0F4C# => romdata <= X"2C9FF373";
when 16#0F4D# => romdata <= X"0BB6FC3E";
when 16#0F4E# => romdata <= X"A2053B3F";
when 16#0F4F# => romdata <= X"45DC7FB5";
when 16#0F50# => romdata <= X"87BA19B3";
when 16#0F51# => romdata <= X"C6B7E780";
when 16#0F52# => romdata <= X"EA5F25B4";
when 16#0F53# => romdata <= X"5BB72717";
when 16#0F54# => romdata <= X"4D4CD3B4";
when 16#0F55# => romdata <= X"01FE1906";
when 16#0F56# => romdata <= X"360BF0B1";
when 16#0F57# => romdata <= X"5DB13B62";
when 16#0F58# => romdata <= X"752F82EC";
when 16#0F59# => romdata <= X"62226AAB";
when 16#0F5A# => romdata <= X"C83C1C26";
when 16#0F5B# => romdata <= X"376F8366";
when 16#0F5C# => romdata <= X"BB849DDB";
when 16#0F5D# => romdata <= X"65958AD9";
when 16#0F5E# => romdata <= X"69B25654";
when 16#0F5F# => romdata <= X"DEF18415";
when 16#0F60# => romdata <= X"18993033";
when 16#0F61# => romdata <= X"AF47EABE";
when 16#0F62# => romdata <= X"E3CAAA93";
when 16#0F63# => romdata <= X"6F19E28A";
when 16#0F64# => romdata <= X"205F3CDD";
when 16#0F65# => romdata <= X"B5CAC649";
when 16#0F66# => romdata <= X"DB6A9048";
when 16#0F67# => romdata <= X"3ACB63A2";
when 16#0F68# => romdata <= X"4EA46D39";
when 16#0F69# => romdata <= X"7508EEB5";
when 16#0F6A# => romdata <= X"DA94E9C8";
when 16#0F6B# => romdata <= X"83EB0451";
when 16#0F6C# => romdata <= X"D036E28C";
when 16#0F6D# => romdata <= X"C303D52B";
when 16#0F6E# => romdata <= X"1BB31FFF";
when 16#0F6F# => romdata <= X"582605F3";
when 16#0F70# => romdata <= X"40D44950";
when 16#0F71# => romdata <= X"8959ED1F";
when 16#0F72# => romdata <= X"E2FF0BD2";
when 16#0F73# => romdata <= X"2FDF77F9";
when 16#0F74# => romdata <= X"680D6B56";
when 16#0F75# => romdata <= X"47D59E7E";
when 16#0F76# => romdata <= X"6A003AF0";
when 16#0F77# => romdata <= X"C6A95092";
when 16#0F78# => romdata <= X"F0DE43D1";
when 16#0F79# => romdata <= X"252EA6DE";
when 16#0F7A# => romdata <= X"00F288BC";
when 16#0F7B# => romdata <= X"CE3ED9CE";
when 16#0F7C# => romdata <= X"273DCB4F";
when 16#0F7D# => romdata <= X"3BA7E8D1";
when 16#0F7E# => romdata <= X"7353B8EC";
when 16#0F7F# => romdata <= X"A24F03A0";
when 16#0F80# => romdata <= X"FE38B1AC";
when 16#0F81# => romdata <= X"A366B4C1";
when 16#0F82# => romdata <= X"5F3FDD4D";
when 16#0F83# => romdata <= X"F0E0274F";
when 16#0F84# => romdata <= X"BEFDA004";
when 16#0F85# => romdata <= X"2BB203A4";
when 16#0F86# => romdata <= X"F6627ED9";
when 16#0F87# => romdata <= X"E29F4053";
when 16#0F88# => romdata <= X"79B2F2DD";
when 16#0F89# => romdata <= X"C0F3B02A";
when 16#0F8A# => romdata <= X"0CA70A94";
when 16#0F8B# => romdata <= X"99F3CE82";
when 16#0F8C# => romdata <= X"B87603FA";
when 16#0F8D# => romdata <= X"A347B705";
when 16#0F8E# => romdata <= X"2CB5D13D";
when 16#0F8F# => romdata <= X"9DE84C11";
when 16#0F90# => romdata <= X"4EF3B8F6";
when 16#0F91# => romdata <= X"2418FB1F";
when 16#0F92# => romdata <= X"3E374B99";
when 16#0F93# => romdata <= X"7127667F";
when 16#0F94# => romdata <= X"D6BCA2E2";
when 16#0F95# => romdata <= X"F9DBC04E";
when 16#0F96# => romdata <= X"CA9D908C";
when 16#0F97# => romdata <= X"D37C62F0";
when 16#0F98# => romdata <= X"8EEA6F44";
when 16#0F99# => romdata <= X"B3FDC149";
when 16#0F9A# => romdata <= X"465AA803";
when 16#0F9B# => romdata <= X"7D65A6C8";
when 16#0F9C# => romdata <= X"B9B8B3D5";
when 16#0F9D# => romdata <= X"E9A40578";
when 16#0F9E# => romdata <= X"E5EA3AE1";
when 16#0F9F# => romdata <= X"209BA49E";
when 16#0FA0# => romdata <= X"5E2AC615";
when 16#0FA1# => romdata <= X"C59A2D71";
when 16#0FA2# => romdata <= X"AC1605B9";
when 16#0FA3# => romdata <= X"8E39A5E6";
when 16#0FA4# => romdata <= X"6A890754";
when 16#0FA5# => romdata <= X"C7D1C07E";
when 16#0FA6# => romdata <= X"06DE7863";
when 16#0FA7# => romdata <= X"2587BADA";
when 16#0FA8# => romdata <= X"F7FAAB0A";
when 16#0FA9# => romdata <= X"529AB791";
when 16#0FAA# => romdata <= X"095DB0A7";
when 16#0FAB# => romdata <= X"08B691E9";
when 16#0FAC# => romdata <= X"D81F2CEA";
when 16#0FAD# => romdata <= X"8F07B054";
when 16#0FAE# => romdata <= X"95528B9F";
when 16#0FAF# => romdata <= X"D56F77A4";
when 16#0FB0# => romdata <= X"C8209DB9";
when 16#0FB1# => romdata <= X"72FAADD9";
when 16#0FB2# => romdata <= X"791BA59F";
when 16#0FB3# => romdata <= X"47C06F24";
when 16#0FB4# => romdata <= X"1F50C061";
when 16#0FB5# => romdata <= X"9FC04F84";
when 16#0FB6# => romdata <= X"56339E0A";
when 16#0FB7# => romdata <= X"F331310F";
when 16#0FB8# => romdata <= X"A4DCCBEA";
when 16#0FB9# => romdata <= X"0E5DC279";
when 16#0FBA# => romdata <= X"5CA6B3AD";
when 16#0FBB# => romdata <= X"D0174AE4";
when 16#0FBC# => romdata <= X"B30AC042";
when 16#0FBD# => romdata <= X"8320ACEA";
when 16#0FBE# => romdata <= X"FF68F73E";
when 16#0FBF# => romdata <= X"D11DC1BC";
when 16#0FC0# => romdata <= X"9F0237BD";
when 16#0FC1# => romdata <= X"C75F7F48";
when 16#0FC2# => romdata <= X"BE518EB3";
when 16#0FC3# => romdata <= X"305CF2BB";
when 16#0FC4# => romdata <= X"898B3297";
when 16#0FC5# => romdata <= X"16FC9ECF";
when 16#0FC6# => romdata <= X"7E99B510";
when 16#0FC7# => romdata <= X"B3309808";
when 16#0FC8# => romdata <= X"735FD0A7";
when 16#0FC9# => romdata <= X"7B15731C";
when 16#0FCA# => romdata <= X"233998F9";
when 16#0FCB# => romdata <= X"ECEF46E2";
when 16#0FCC# => romdata <= X"CAA6E6ED";
when 16#0FCD# => romdata <= X"C8D05B94";
when 16#0FCE# => romdata <= X"3ABD1702";
when 16#0FCF# => romdata <= X"7A80D636";
when 16#0FD0# => romdata <= X"E535038F";
when 16#0FD1# => romdata <= X"AE44D60A";
when 16#0FD2# => romdata <= X"AEC5406A";
when 16#0FD3# => romdata <= X"372D6247";
when 16#0FD4# => romdata <= X"9192FA84";
when 16#0FD5# => romdata <= X"D844520C";
when 16#0FD6# => romdata <= X"6774CC58";
when 16#0FD7# => romdata <= X"9FEE16A3";
when 16#0FD8# => romdata <= X"A5549495";
when 16#0FD9# => romdata <= X"D968AABA";
when 16#0FDA# => romdata <= X"ABFE4DB9";
when 16#0FDB# => romdata <= X"4F5AE0C5";
when 16#0FDC# => romdata <= X"4E603D6D";
when 16#0FDD# => romdata <= X"A5C30567";
when 16#0FDE# => romdata <= X"69A06489";
when 16#0FDF# => romdata <= X"0533EA8E";
when 16#0FE0# => romdata <= X"A1E5D1CD";
when 16#0FE1# => romdata <= X"410CC8DD";
when 16#0FE2# => romdata <= X"4B1D7E0F";
when 16#0FE3# => romdata <= X"5F787232";
when 16#0FE4# => romdata <= X"439AA4B3";
when 16#0FE5# => romdata <= X"911C5DC7";
when 16#0FE6# => romdata <= X"92ECB873";
when 16#0FE7# => romdata <= X"E8105A1A";
when 16#0FE8# => romdata <= X"A61C627B";
when 16#0FE9# => romdata <= X"E57E809C";
when 16#0FEA# => romdata <= X"6863073E";
when 16#0FEB# => romdata <= X"1E19AD8B";
when 16#0FEC# => romdata <= X"987DE97D";
when 16#0FED# => romdata <= X"88A817FB";
when 16#0FEE# => romdata <= X"43ADBB77";
when 16#0FEF# => romdata <= X"51E36D1F";
when 16#0FF0# => romdata <= X"0E7B70B3";
when 16#0FF1# => romdata <= X"759D6EA8";
when 16#0FF2# => romdata <= X"F2350D10";
when 16#0FF3# => romdata <= X"AF38C331";
when 16#0FF4# => romdata <= X"E22703B2";
when 16#0FF5# => romdata <= X"B5103C90";
when 16#0FF6# => romdata <= X"8E1D35A8";
when 16#0FF7# => romdata <= X"E814E45B";
when 16#0FF8# => romdata <= X"AE81DCA0";
when 16#0FF9# => romdata <= X"530FC352";
when 16#0FFA# => romdata <= X"5CD64054";
when 16#0FFB# => romdata <= X"8245C259";
when 16#0FFC# => romdata <= X"738E749E";
when 16#0FFD# => romdata <= X"195B0060";
when 16#0FFE# => romdata <= X"81A18C45";
when 16#0FFF# => romdata <= X"475F9060";
when 16#1000# => romdata <= X"B39340CA";
when 16#1001# => romdata <= X"1C817D81";
when 16#1002# => romdata <= X"EF4FAE4E";
when 16#1003# => romdata <= X"95BF3504";
when 16#1004# => romdata <= X"A7709089";
when 16#1005# => romdata <= X"FB48560E";
when 16#1006# => romdata <= X"9E3EF802";
when 16#1007# => romdata <= X"180E85EB";
when 16#1008# => romdata <= X"2194E059";
when 16#1009# => romdata <= X"02C6C4C5";
when 16#100A# => romdata <= X"2021FEB7";
when 16#100B# => romdata <= X"EC64FD41";
when 16#100C# => romdata <= X"6BCEBC8E";
when 16#100D# => romdata <= X"39D64A4B";
when 16#100E# => romdata <= X"5EE34529";
when 16#100F# => romdata <= X"1911AB82";
when 16#1010# => romdata <= X"04A888C2";
when 16#1011# => romdata <= X"5B1CD3D9";
when 16#1012# => romdata <= X"342A56C5";
when 16#1013# => romdata <= X"38636D3E";
when 16#1014# => romdata <= X"AB957037";
when 16#1015# => romdata <= X"D09E879A";
when 16#1016# => romdata <= X"E5F3A398";
when 16#1017# => romdata <= X"34FBB84A";
when 16#1018# => romdata <= X"3D8D5090";
when 16#1019# => romdata <= X"D7814246";
when 16#101A# => romdata <= X"B62E9CA6";
when 16#101B# => romdata <= X"8533D2EC";
when 16#101C# => romdata <= X"403B4FB9";
when 16#101D# => romdata <= X"488467FF";
when 16#101E# => romdata <= X"9758B0D1";
when 16#101F# => romdata <= X"5A8CEF89";
when 16#1020# => romdata <= X"187A1D58";
when 16#1021# => romdata <= X"97880040";
when 16#1022# => romdata <= X"B6C3C524";
when 16#1023# => romdata <= X"4E85A2AD";
when 16#1024# => romdata <= X"14BCF2F5";
when 16#1025# => romdata <= X"ABC44A7B";
when 16#1026# => romdata <= X"1D4A87E8";
when 16#1027# => romdata <= X"BDA05766";
when 16#1028# => romdata <= X"218773ED";
when 16#1029# => romdata <= X"4F70F8D1";
when 16#102A# => romdata <= X"D07CBB1E";
when 16#102B# => romdata <= X"8CA6298E";
when 16#102C# => romdata <= X"64EE6DC5";
when 16#102D# => romdata <= X"886D3749";
when 16#102E# => romdata <= X"5BA2EDB3";
when 16#102F# => romdata <= X"E0B0B68A";
when 16#1030# => romdata <= X"D9F30031";
when 16#1031# => romdata <= X"0B88898D";
when 16#1032# => romdata <= X"DEEFD484";
when 16#1033# => romdata <= X"538C31A9";
when 16#1034# => romdata <= X"BCAA76EC";
when 16#1035# => romdata <= X"AD0C1660";
when 16#1036# => romdata <= X"7D321890";
when 16#1037# => romdata <= X"58B0862E";
when 16#1038# => romdata <= X"E9D70CEA";
when 16#1039# => romdata <= X"9D304755";
when 16#103A# => romdata <= X"CE8037BA";
when 16#103B# => romdata <= X"4C46C257";
when 16#103C# => romdata <= X"3181748A";
when 16#103D# => romdata <= X"212E4B2B";
when 16#103E# => romdata <= X"DD04F9BC";
when 16#103F# => romdata <= X"24051827";
when 16#1040# => romdata <= X"3DC17CBA";
when 16#1041# => romdata <= X"FF21A03E";
when 16#1042# => romdata <= X"9120FA7D";
when 16#1043# => romdata <= X"CA18D56D";
when 16#1044# => romdata <= X"D1D9A7E5";
when 16#1045# => romdata <= X"10C90CF2";
when 16#1046# => romdata <= X"19104385";
when 16#1047# => romdata <= X"F531F2EF";
when 16#1048# => romdata <= X"AFD185EC";
when 16#1049# => romdata <= X"B6B911F9";
when 16#104A# => romdata <= X"B7809D98";
when 16#104B# => romdata <= X"D86F1551";
when 16#104C# => romdata <= X"6FFDDBE9";
when 16#104D# => romdata <= X"BD1CF866";
when 16#104E# => romdata <= X"2EB777C3";
when 16#104F# => romdata <= X"F94EA3F9";
when 16#1050# => romdata <= X"62D7B794";
when 16#1051# => romdata <= X"49FAAD39";
when 16#1052# => romdata <= X"935429E9";
when 16#1053# => romdata <= X"2CAE5637";
when 16#1054# => romdata <= X"E9BCF4E9";
when 16#1055# => romdata <= X"4D413D27";
when 16#1056# => romdata <= X"93495240";
when 16#1057# => romdata <= X"9AB536BE";
when 16#1058# => romdata <= X"4055AFBC";
when 16#1059# => romdata <= X"4330CD1E";
when 16#105A# => romdata <= X"4B5509EF";
when 16#105B# => romdata <= X"E5F8EFC9";
when 16#105C# => romdata <= X"ECBE9EF3";
when 16#105D# => romdata <= X"77DE7E37";
when 16#105E# => romdata <= X"C479BB9D";
when 16#105F# => romdata <= X"3EE7745E";
when 16#1060# => romdata <= X"4609B0A6";
when 16#1061# => romdata <= X"D2C5D92E";
when 16#1062# => romdata <= X"B3C9E227";
when 16#1063# => romdata <= X"8C1F2221";
when 16#1064# => romdata <= X"FF907596";
when 16#1065# => romdata <= X"AA5E096A";
when 16#1066# => romdata <= X"CF8990EB";
when 16#1067# => romdata <= X"A907E43A";
when 16#1068# => romdata <= X"D320F801";
when 16#1069# => romdata <= X"9CB6355A";
when 16#106A# => romdata <= X"2BA8670E";
when 16#106B# => romdata <= X"E5A4F463";
when 16#106C# => romdata <= X"E8E56F8F";
when 16#106D# => romdata <= X"1D3E7F49";
when 16#106E# => romdata <= X"22510FB6";
when 16#106F# => romdata <= X"68E32C4C";
when 16#1070# => romdata <= X"F23AD849";
when 16#1071# => romdata <= X"6399638B";
when 16#1072# => romdata <= X"095B4783";
when 16#1073# => romdata <= X"3E0CBB34";
when 16#1074# => romdata <= X"977EB3E4";
when 16#1075# => romdata <= X"242EAF87";
when 16#1076# => romdata <= X"0D86660D";
when 16#1077# => romdata <= X"6A73F83E";
when 16#1078# => romdata <= X"45D6E8A4";
when 16#1079# => romdata <= X"1EDCA381";
when 16#107A# => romdata <= X"50796495";
when 16#107B# => romdata <= X"44597C5C";
when 16#107C# => romdata <= X"43B6C93F";
when 16#107D# => romdata <= X"EBAD5700";
when 16#107E# => romdata <= X"D22EDAF4";
when 16#107F# => romdata <= X"31FD3400";
when 16#1080# => romdata <= X"A64F94BB";
when 16#1081# => romdata <= X"47BD4033";
when 16#1082# => romdata <= X"C76D4924";
when 16#1083# => romdata <= X"305907EC";
when 16#1084# => romdata <= X"1F618B43";
when 16#1085# => romdata <= X"C7535F3C";
when 16#1086# => romdata <= X"FC093E5A";
when 16#1087# => romdata <= X"F5DDD5C4";
when 16#1088# => romdata <= X"339F3BB6";
when 16#1089# => romdata <= X"D835B5C2";
when 16#108A# => romdata <= X"C2053CD3";
when 16#108B# => romdata <= X"D5693368";
when 16#108C# => romdata <= X"D4E1A7CA";
when 16#108D# => romdata <= X"C59425D1";
when 16#108E# => romdata <= X"FD96809C";
when 16#108F# => romdata <= X"67285CFD";
when 16#1090# => romdata <= X"3FC05B01";
when 16#1091# => romdata <= X"053CB077";
when 16#1092# => romdata <= X"3221D720";
when 16#1093# => romdata <= X"5778022F";
when 16#1094# => romdata <= X"487BF99D";
when 16#1095# => romdata <= X"1650566B";
when 16#1096# => romdata <= X"E287FD7A";
when 16#1097# => romdata <= X"E882AA8E";
when 16#1098# => romdata <= X"8F52E5D4";
when 16#1099# => romdata <= X"E3C0C2F9";
when 16#109A# => romdata <= X"71C9FF70";
when 16#109B# => romdata <= X"AA378691";
when 16#109C# => romdata <= X"EBD8ADE4";
when 16#109D# => romdata <= X"5CF21382";
when 16#109E# => romdata <= X"2D09FD05";
when 16#109F# => romdata <= X"243F9726";
when 16#10A0# => romdata <= X"F6C69893";
when 16#10A1# => romdata <= X"845E57C3";
when 16#10A2# => romdata <= X"7A7643E1";
when 16#10A3# => romdata <= X"6B770E26";
when 16#10A4# => romdata <= X"F431FF69";
when 16#10A5# => romdata <= X"D4372719";
when 16#10A6# => romdata <= X"05D270EB";
when 16#10A7# => romdata <= X"85D8D229";
when 16#10A8# => romdata <= X"D7D87662";
when 16#10A9# => romdata <= X"121F0BEE";
when 16#10AA# => romdata <= X"B1E895ED";
when 16#10AB# => romdata <= X"9589A9CF";
when 16#10AC# => romdata <= X"5833408A";
when 16#10AD# => romdata <= X"04197AC9";
when 16#10AE# => romdata <= X"025D8570";
when 16#10AF# => romdata <= X"AD9B75DB";
when 16#10B0# => romdata <= X"7E192EA0";
when 16#10B1# => romdata <= X"A0895049";
when 16#10B2# => romdata <= X"96E9DC65";
when 16#10B3# => romdata <= X"2975D836";
when 16#10B4# => romdata <= X"33619CFF";
when 16#10B5# => romdata <= X"80667D8B";
when 16#10B6# => romdata <= X"519536B3";
when 16#10B7# => romdata <= X"475248BA";
when 16#10B8# => romdata <= X"8213C8A4";
when 16#10B9# => romdata <= X"C66DE69B";
when 16#10BA# => romdata <= X"4B3774BF";
when 16#10BB# => romdata <= X"9142425C";
when 16#10BC# => romdata <= X"57F34A27";
when 16#10BD# => romdata <= X"B1E28811";
when 16#10BE# => romdata <= X"9E3FFCC6";
when 16#10BF# => romdata <= X"AF6A2108";
when 16#10C0# => romdata <= X"7F9394F0";
when 16#10C1# => romdata <= X"9DDFBD42";
when 16#10C2# => romdata <= X"F32D059B";
when 16#10C3# => romdata <= X"8CD4104A";
when 16#10C4# => romdata <= X"519BA640";
when 16#10C5# => romdata <= X"765D5CDE";
when 16#10C6# => romdata <= X"490E62F1";
when 16#10C7# => romdata <= X"0E695FBF";
when 16#10C8# => romdata <= X"D33CBC9D";
when 16#10C9# => romdata <= X"2208A532";
when 16#10CA# => romdata <= X"C8EC25DA";
when 16#10CB# => romdata <= X"28B8CC1B";
when 16#10CC# => romdata <= X"6850AB43";
when 16#10CD# => romdata <= X"D9B5C00B";
when 16#10CE# => romdata <= X"6E74B7A1";
when 16#10CF# => romdata <= X"48791AB0";
when 16#10D0# => romdata <= X"7B328D34";
when 16#10D1# => romdata <= X"7058C7E6";
when 16#10D2# => romdata <= X"233E18C5";
when 16#10D3# => romdata <= X"ED172C9F";
when 16#10D4# => romdata <= X"9E9ACF29";
when 16#10D5# => romdata <= X"D913E2A1";
when 16#10D6# => romdata <= X"614BFC08";
when 16#10D7# => romdata <= X"93D4967E";
when 16#10D8# => romdata <= X"D033B2B9";
when 16#10D9# => romdata <= X"AE6B51F9";
when 16#10DA# => romdata <= X"08F1CED5";
when 16#10DB# => romdata <= X"7C14FEEA";
when 16#10DC# => romdata <= X"85CD4D97";
when 16#10DD# => romdata <= X"11216BE7";
when 16#10DE# => romdata <= X"F79FA672";
when 16#10DF# => romdata <= X"1B7DCCA0";
when 16#10E0# => romdata <= X"33C80127";
when 16#10E1# => romdata <= X"AC6E5FCF";
when 16#10E2# => romdata <= X"58EB4005";
when 16#10E3# => romdata <= X"EC24CB48";
when 16#10E4# => romdata <= X"86D78735";
when 16#10E5# => romdata <= X"5362D5E7";
when 16#10E6# => romdata <= X"031B9B2A";
when 16#10E7# => romdata <= X"C2A86D73";
when 16#10E8# => romdata <= X"0AD73418";
when 16#10E9# => romdata <= X"1E723A81";
when 16#10EA# => romdata <= X"1FF510A4";
when 16#10EB# => romdata <= X"DF868001";
when 16#10EC# => romdata <= X"973FE832";
when 16#10ED# => romdata <= X"88D78E6F";
when 16#10EE# => romdata <= X"9B9441DA";
when 16#10EF# => romdata <= X"F5BE2974";
when 16#10F0# => romdata <= X"A2848FD9";
when 16#10F1# => romdata <= X"17C3BCD3";
when 16#10F2# => romdata <= X"46A43192";
when 16#10F3# => romdata <= X"2246EC85";
when 16#10F4# => romdata <= X"2E4AAD46";
when 16#10F5# => romdata <= X"7E60C15D";
when 16#10F6# => romdata <= X"61DD3BF4";
when 16#10F7# => romdata <= X"A207BB57";
when 16#10F8# => romdata <= X"DB45DCAD";
when 16#10F9# => romdata <= X"EFE3210B";
when 16#10FA# => romdata <= X"E74B9DAC";
when 16#10FB# => romdata <= X"C918A394";
when 16#10FC# => romdata <= X"469F2E2C";
when 16#10FD# => romdata <= X"95AD1E21";
when 16#10FE# => romdata <= X"1947948F";
when 16#10FF# => romdata <= X"E24F5E40";
when 16#1100# => romdata <= X"FD1F6976";
when 16#1101# => romdata <= X"002C39C8";
when 16#1102# => romdata <= X"7187C44E";
when 16#1103# => romdata <= X"3D224ED4";
when 16#1104# => romdata <= X"DF0B6775";
when 16#1105# => romdata <= X"0105944C";
when 16#1106# => romdata <= X"651A5E57";
when 16#1107# => romdata <= X"798F168A";
when 16#1108# => romdata <= X"136AC0FB";
when 16#1109# => romdata <= X"5979C4E8";
when 16#110A# => romdata <= X"47A82B20";
when 16#110B# => romdata <= X"A2E6C45D";
when 16#110C# => romdata <= X"B42EF2B9";
when 16#110D# => romdata <= X"30A80D32";
when 16#110E# => romdata <= X"57BCCC53";
when 16#110F# => romdata <= X"EDA966F5";
when 16#1110# => romdata <= X"DCD9AD47";
when 16#1111# => romdata <= X"CFB226EE";
when 16#1112# => romdata <= X"D9B62A87";
when 16#1113# => romdata <= X"4E9F6404";
when 16#1114# => romdata <= X"D4087798";
when 16#1115# => romdata <= X"A1005F41";
when 16#1116# => romdata <= X"31171D3A";
when 16#1117# => romdata <= X"47907A3C";
when 16#1118# => romdata <= X"D602B83D";
when 16#1119# => romdata <= X"ABE094D2";
when 16#111A# => romdata <= X"CB031867";
when 16#111B# => romdata <= X"DF4595F3";
when 16#111C# => romdata <= X"ED59FD8C";
when 16#111D# => romdata <= X"4D76EDEE";
when 16#111E# => romdata <= X"E59E422C";
when 16#111F# => romdata <= X"E5C7D0A5";
when 16#1120# => romdata <= X"F720BE94";
when 16#1121# => romdata <= X"FA24DF05";
when 16#1122# => romdata <= X"F758348E";
when 16#1123# => romdata <= X"ADD5EFE9";
when 16#1124# => romdata <= X"197C6BB2";
when 16#1125# => romdata <= X"292E2B14";
when 16#1126# => romdata <= X"DB8C6DB2";
when 16#1127# => romdata <= X"4AA94C5F";
when 16#1128# => romdata <= X"F0F5106D";
when 16#1129# => romdata <= X"2B566058";
when 16#112A# => romdata <= X"D32C58B6";
when 16#112B# => romdata <= X"3A150784";
when 16#112C# => romdata <= X"F7B02478";
when 16#112D# => romdata <= X"D9973DD4";
when 16#112E# => romdata <= X"CFD2E840";
when 16#112F# => romdata <= X"59AE0F4F";
when 16#1130# => romdata <= X"1320754B";
when 16#1131# => romdata <= X"7EE83F04";
when 16#1132# => romdata <= X"A51C67EF";
when 16#1133# => romdata <= X"FC2EB1C3";
when 16#1134# => romdata <= X"01C0C58D";
when 16#1135# => romdata <= X"BAEBE954";
when 16#1136# => romdata <= X"74E3484A";
when 16#1137# => romdata <= X"76500103";
when 16#1138# => romdata <= X"C14C40BB";
when 16#1139# => romdata <= X"0B7D3A04";
when 16#113A# => romdata <= X"D8BDABB6";
when 16#113B# => romdata <= X"05C1EF9F";
when 16#113C# => romdata <= X"D4A65649";
when 16#113D# => romdata <= X"34DEC50B";
when 16#113E# => romdata <= X"D5878243";
when 16#113F# => romdata <= X"AEE80F97";
when 16#1140# => romdata <= X"96EED70C";
when 16#1141# => romdata <= X"E1B1E8B5";
when 16#1142# => romdata <= X"5725DF76";
when 16#1143# => romdata <= X"472D12D4";
when 16#1144# => romdata <= X"A7A48798";
when 16#1145# => romdata <= X"9F42E670";
when 16#1146# => romdata <= X"5818B1F7";
when 16#1147# => romdata <= X"E149E971";
when 16#1148# => romdata <= X"53A7B05A";
when 16#1149# => romdata <= X"82FA3FBE";
when 16#114A# => romdata <= X"51763E61";
when 16#114B# => romdata <= X"171A4E12";
when 16#114C# => romdata <= X"931472E9";
when 16#114D# => romdata <= X"4CCBA74C";
when 16#114E# => romdata <= X"C09483DF";
when 16#114F# => romdata <= X"93623FC6";
when 16#1150# => romdata <= X"0945070F";
when 16#1151# => romdata <= X"DDF3A00B";
when 16#1152# => romdata <= X"56165042";
when 16#1153# => romdata <= X"7E4BD64D";
when 16#1154# => romdata <= X"675B1EB3";
when 16#1155# => romdata <= X"98B35EF0";
when 16#1156# => romdata <= X"57A66FD0";
when 16#1157# => romdata <= X"B48EDBAB";
when 16#1158# => romdata <= X"BDCD57C3";
when 16#1159# => romdata <= X"2ABAE46F";
when 16#115A# => romdata <= X"5CDD0CB1";
when 16#115B# => romdata <= X"FCF17765";
when 16#115C# => romdata <= X"258236F3";
when 16#115D# => romdata <= X"DE40BD5D";
when 16#115E# => romdata <= X"0A3C5C97";
when 16#115F# => romdata <= X"8D81DEB0";
when 16#1160# => romdata <= X"7367AB20";
when 16#1161# => romdata <= X"B2CAA983";
when 16#1162# => romdata <= X"4B957616";
when 16#1163# => romdata <= X"1C4F20FB";
when 16#1164# => romdata <= X"9C184A01";
when 16#1165# => romdata <= X"DC9021A4";
when 16#1166# => romdata <= X"E92B7133";
when 16#1167# => romdata <= X"3354E05B";
when 16#1168# => romdata <= X"BEA9015E";
when 16#1169# => romdata <= X"5AC4C663";
when 16#116A# => romdata <= X"12E8B79F";
when 16#116B# => romdata <= X"0B92279A";
when 16#116C# => romdata <= X"C7EF1936";
when 16#116D# => romdata <= X"BCC30802";
when 16#116E# => romdata <= X"B83DB3D1";
when 16#116F# => romdata <= X"13BEF644";
when 16#1170# => romdata <= X"52CAD7AC";
when 16#1171# => romdata <= X"F6674FDA";
when 16#1172# => romdata <= X"44023A66";
when 16#1173# => romdata <= X"1019841A";
when 16#1174# => romdata <= X"101BE80F";
when 16#1175# => romdata <= X"DA4E3210";
when 16#1176# => romdata <= X"AE774E43";
when 16#1177# => romdata <= X"3A9ABD97";
when 16#1178# => romdata <= X"F2755259";
when 16#1179# => romdata <= X"AECE21F7";
when 16#117A# => romdata <= X"A8C3B1A3";
when 16#117B# => romdata <= X"D471F874";
when 16#117C# => romdata <= X"D2EEC85B";
when 16#117D# => romdata <= X"9B21BC0C";
when 16#117E# => romdata <= X"2E2EC901";
when 16#117F# => romdata <= X"6F847C60";
when 16#1180# => romdata <= X"EE38BAF6";
when 16#1181# => romdata <= X"F61704B0";
when 16#1182# => romdata <= X"1509B521";
when 16#1183# => romdata <= X"0A0534E4";
when 16#1184# => romdata <= X"702F9319";
when 16#1185# => romdata <= X"0C392E74";
when 16#1186# => romdata <= X"9869B557";
when 16#1187# => romdata <= X"2BB7AC4D";
when 16#1188# => romdata <= X"7120E2BE";
when 16#1189# => romdata <= X"CD6618CD";
when 16#118A# => romdata <= X"376C4C1B";
when 16#118B# => romdata <= X"4965F7D9";
when 16#118C# => romdata <= X"D7340082";
when 16#118D# => romdata <= X"4E88A5C7";
when 16#118E# => romdata <= X"B5B66BA8";
when 16#118F# => romdata <= X"8C3E0065";
when 16#1190# => romdata <= X"F9628A9A";
when 16#1191# => romdata <= X"C6B91A18";
when 16#1192# => romdata <= X"82192FC5";
when 16#1193# => romdata <= X"53E31403";
when 16#1194# => romdata <= X"49934D20";
when 16#1195# => romdata <= X"698C9F29";
when 16#1196# => romdata <= X"1B537094";
when 16#1197# => romdata <= X"8AF6CC90";
when 16#1198# => romdata <= X"C837B9F3";
when 16#1199# => romdata <= X"607F13CA";
when 16#119A# => romdata <= X"FD492CEF";
when 16#119B# => romdata <= X"1723376E";
when 16#119C# => romdata <= X"6A5B813A";
when 16#119D# => romdata <= X"56301B88";
when 16#119E# => romdata <= X"A8799519";
when 16#119F# => romdata <= X"CB7646F3";
when 16#11A0# => romdata <= X"3F91C44C";
when 16#11A1# => romdata <= X"DBE7F768";
when 16#11A2# => romdata <= X"D7DD9B32";
when 16#11A3# => romdata <= X"3A5002D2";
when 16#11A4# => romdata <= X"F784C410";
when 16#11A5# => romdata <= X"1AF90D6E";
when 16#11A6# => romdata <= X"4C5ADE7D";
when 16#11A7# => romdata <= X"085C79E8";
when 16#11A8# => romdata <= X"27D43E10";
when 16#11A9# => romdata <= X"DF63AC70";
when 16#11AA# => romdata <= X"BCDF13DC";
when 16#11AB# => romdata <= X"E0471B48";
when 16#11AC# => romdata <= X"7C5ECB75";
when 16#11AD# => romdata <= X"2B9C3E20";
when 16#11AE# => romdata <= X"F75DBD24";
when 16#11AF# => romdata <= X"3790C913";
when 16#11B0# => romdata <= X"55ADFD71";
when 16#11B1# => romdata <= X"99081BFE";
when 16#11B2# => romdata <= X"A03D80E8";
when 16#11B3# => romdata <= X"2445EC28";
when 16#11B4# => romdata <= X"31FB5014";
when 16#11B5# => romdata <= X"B85EFC2A";
when 16#11B6# => romdata <= X"52748A8A";
when 16#11B7# => romdata <= X"BFAC1BA3";
when 16#11B8# => romdata <= X"904E178D";
when 16#11B9# => romdata <= X"FBAB26C1";
when 16#11BA# => romdata <= X"750228C9";
when 16#11BB# => romdata <= X"A031104F";
when 16#11BC# => romdata <= X"58BB3B91";
when 16#11BD# => romdata <= X"905EDB9E";
when 16#11BE# => romdata <= X"ADF7B0F6";
when 16#11BF# => romdata <= X"DF22ACEB";
when 16#11C0# => romdata <= X"0DE944E2";
when 16#11C1# => romdata <= X"77809D77";
when 16#11C2# => romdata <= X"507D18EA";
when 16#11C3# => romdata <= X"EDAA1767";
when 16#11C4# => romdata <= X"69739842";
when 16#11C5# => romdata <= X"1115D04A";
when 16#11C6# => romdata <= X"B2EBFC46";
when 16#11C7# => romdata <= X"6E99F0AA";
when 16#11C8# => romdata <= X"540482A4";
when 16#11C9# => romdata <= X"9C6AC8FF";
when 16#11CA# => romdata <= X"95E3F962";
when 16#11CB# => romdata <= X"734B03EF";
when 16#11CC# => romdata <= X"39873A93";
when 16#11CD# => romdata <= X"B70470B4";
when 16#11CE# => romdata <= X"6FFFDFDC";
when 16#11CF# => romdata <= X"15C89F8F";
when 16#11D0# => romdata <= X"E2F4637B";
when 16#11D1# => romdata <= X"59F9BF9C";
when 16#11D2# => romdata <= X"5752D9F8";
when 16#11D3# => romdata <= X"AE7EA75D";
when 16#11D4# => romdata <= X"1EAF1C22";
when 16#11D5# => romdata <= X"CA27E5D5";
when 16#11D6# => romdata <= X"C9499624";
when 16#11D7# => romdata <= X"105D61BE";
when 16#11D8# => romdata <= X"2A691F91";
when 16#11D9# => romdata <= X"94D27741";
when 16#11DA# => romdata <= X"4532A5E6";
when 16#11DB# => romdata <= X"C63875F7";
when 16#11DC# => romdata <= X"F20DD13C";
when 16#11DD# => romdata <= X"6EE73B0C";
when 16#11DE# => romdata <= X"3568392B";
when 16#11DF# => romdata <= X"14A50428";
when 16#11E0# => romdata <= X"43926472";
when 16#11E1# => romdata <= X"ABA343D2";
when 16#11E2# => romdata <= X"C4277921";
when 16#11E3# => romdata <= X"99B543BE";
when 16#11E4# => romdata <= X"1D43A178";
when 16#11E5# => romdata <= X"FAA7ECF5";
when 16#11E6# => romdata <= X"3B98AB75";
when 16#11E7# => romdata <= X"28D8E1B8";
when 16#11E8# => romdata <= X"B82C52D9";
when 16#11E9# => romdata <= X"73CA0427";
when 16#11EA# => romdata <= X"63650583";
when 16#11EB# => romdata <= X"7F94284E";
when 16#11EC# => romdata <= X"8D6B4F49";
when 16#11ED# => romdata <= X"6FC5A48B";
when 16#11EE# => romdata <= X"7958D468";
when 16#11EF# => romdata <= X"1DA00651";
when 16#11F0# => romdata <= X"B8A7BC56";
when 16#11F1# => romdata <= X"EC859C07";
when 16#11F2# => romdata <= X"1E4396A0";
when 16#11F3# => romdata <= X"5F33588B";
when 16#11F4# => romdata <= X"8087EFE9";
when 16#11F5# => romdata <= X"635E565E";
when 16#11F6# => romdata <= X"6B5A8A70";
when 16#11F7# => romdata <= X"DA70F50E";
when 16#11F8# => romdata <= X"CAD1A85E";
when 16#11F9# => romdata <= X"6E36FF07";
when 16#11FA# => romdata <= X"B4FB3B91";
when 16#11FB# => romdata <= X"19EDE0B6";
when 16#11FC# => romdata <= X"11CFA91D";
when 16#11FD# => romdata <= X"9D4C58C1";
when 16#11FE# => romdata <= X"F4815B07";
when 16#11FF# => romdata <= X"B9EB1DE0";
when 16#1200# => romdata <= X"CD37D0FB";
when 16#1201# => romdata <= X"0043D034";
when 16#1202# => romdata <= X"44A939E9";
when 16#1203# => romdata <= X"3676B9DA";
when 16#1204# => romdata <= X"F5F2D19A";
when 16#1205# => romdata <= X"2615E3D9";
when 16#1206# => romdata <= X"7D624E62";
when 16#1207# => romdata <= X"ACAC8098";
when 16#1208# => romdata <= X"099FDB9A";
when 16#1209# => romdata <= X"5A2F4B3A";
when 16#120A# => romdata <= X"CF20F75B";
when 16#120B# => romdata <= X"6807A5A3";
when 16#120C# => romdata <= X"F157C2C0";
when 16#120D# => romdata <= X"F479158F";
when 16#120E# => romdata <= X"4A10FB49";
when 16#120F# => romdata <= X"72855F3A";
when 16#1210# => romdata <= X"E2FDCBDE";
when 16#1211# => romdata <= X"EC00A4D4";
when 16#1212# => romdata <= X"70AADF5F";
when 16#1213# => romdata <= X"5E571818";
when 16#1214# => romdata <= X"AD6E872D";
when 16#1215# => romdata <= X"897E2DDC";
when 16#1216# => romdata <= X"40200696";
when 16#1217# => romdata <= X"5ADF1658";
when 16#1218# => romdata <= X"2B1E06B1";
when 16#1219# => romdata <= X"861BF7D0";
when 16#121A# => romdata <= X"C7E7BA49";
when 16#121B# => romdata <= X"1C79E862";
when 16#121C# => romdata <= X"24AF6B24";
when 16#121D# => romdata <= X"6317F725";
when 16#121E# => romdata <= X"FA74DD83";
when 16#121F# => romdata <= X"76D63D79";
when 16#1220# => romdata <= X"93FE2F2B";
when 16#1221# => romdata <= X"BBB2F1DA";
when 16#1222# => romdata <= X"9238C6F3";
when 16#1223# => romdata <= X"FFCAEC50";
when 16#1224# => romdata <= X"FF61E645";
when 16#1225# => romdata <= X"FADEB6E0";
when 16#1226# => romdata <= X"3F883892";
when 16#1227# => romdata <= X"C42CCCF9";
when 16#1228# => romdata <= X"04708B12";
when 16#1229# => romdata <= X"3C9271A6";
when 16#122A# => romdata <= X"70D4DCFC";
when 16#122B# => romdata <= X"D602951D";
when 16#122C# => romdata <= X"12F52139";
when 16#122D# => romdata <= X"37CA2C05";
when 16#122E# => romdata <= X"ADDE9EE3";
when 16#122F# => romdata <= X"908E99AA";
when 16#1230# => romdata <= X"E8DA3195";
when 16#1231# => romdata <= X"1C36D36D";
when 16#1232# => romdata <= X"671CD7BF";
when 16#1233# => romdata <= X"15DF60B7";
when 16#1234# => romdata <= X"07F00BF6";
when 16#1235# => romdata <= X"EBBE5476";
when 16#1236# => romdata <= X"926D0156";
when 16#1237# => romdata <= X"28A85758";
when 16#1238# => romdata <= X"BFF35C4A";
when 16#1239# => romdata <= X"C540F39E";
when 16#123A# => romdata <= X"761B2ED3";
when 16#123B# => romdata <= X"CA9116E8";
when 16#123C# => romdata <= X"680E28BC";
when 16#123D# => romdata <= X"387058E0";
when 16#123E# => romdata <= X"F69345CC";
when 16#123F# => romdata <= X"6AB3AD16";
when 16#1240# => romdata <= X"0E9F2BC4";
when 16#1241# => romdata <= X"D6047A19";
when 16#1242# => romdata <= X"34E15D3D";
when 16#1243# => romdata <= X"7A242A29";
when 16#1244# => romdata <= X"6333C092";
when 16#1245# => romdata <= X"96981BBF";
when 16#1246# => romdata <= X"3B8577E4";
when 16#1247# => romdata <= X"B8ED2A36";
when 16#1248# => romdata <= X"24866111";
when 16#1249# => romdata <= X"F6638F89";
when 16#124A# => romdata <= X"55431195";
when 16#124B# => romdata <= X"B60C5C08";
when 16#124C# => romdata <= X"9F9897DD";
when 16#124D# => romdata <= X"F0D34A3D";
when 16#124E# => romdata <= X"C627CE33";
when 16#124F# => romdata <= X"7AC8128C";
when 16#1250# => romdata <= X"28B63A39";
when 16#1251# => romdata <= X"4908E4C0";
when 16#1252# => romdata <= X"83BCC452";
when 16#1253# => romdata <= X"2DB8CE57";
when 16#1254# => romdata <= X"20C45EF7";
when 16#1255# => romdata <= X"6B271622";
when 16#1256# => romdata <= X"5E53405F";
when 16#1257# => romdata <= X"CAAAA72A";
when 16#1258# => romdata <= X"C1982265";
when 16#1259# => romdata <= X"75D52251";
when 16#125A# => romdata <= X"95F106C1";
when 16#125B# => romdata <= X"249E4B87";
when 16#125C# => romdata <= X"AC05287A";
when 16#125D# => romdata <= X"3ABE6C51";
when 16#125E# => romdata <= X"A2A41E07";
when 16#125F# => romdata <= X"F56ECDC4";
when 16#1260# => romdata <= X"6E989A85";
when 16#1261# => romdata <= X"68D35669";
when 16#1262# => romdata <= X"B525A6FF";
when 16#1263# => romdata <= X"CA90DC91";
when 16#1264# => romdata <= X"D3013967";
when 16#1265# => romdata <= X"F6A5F4C0";
when 16#1266# => romdata <= X"22FFCC17";
when 16#1267# => romdata <= X"751B68FB";
when 16#1268# => romdata <= X"0D8F16FC";
when 16#1269# => romdata <= X"9229851D";
when 16#126A# => romdata <= X"FDCC0608";
when 16#126B# => romdata <= X"38F923BD";
when 16#126C# => romdata <= X"44C1AD70";
when 16#126D# => romdata <= X"A993E8EB";
when 16#126E# => romdata <= X"AC1667DA";
when 16#126F# => romdata <= X"80F91B66";
when 16#1270# => romdata <= X"F8F5B375";
when 16#1271# => romdata <= X"D3527518";
when 16#1272# => romdata <= X"8E3C7702";
when 16#1273# => romdata <= X"C2312CEA";
when 16#1274# => romdata <= X"C5B20D67";
when 16#1275# => romdata <= X"BB344004";
when 16#1276# => romdata <= X"01BDF1DB";
when 16#1277# => romdata <= X"FE79DFA0";
when 16#1278# => romdata <= X"EB73F173";
when 16#1279# => romdata <= X"A0480721";
when 16#127A# => romdata <= X"5DA5CE8E";
when 16#127B# => romdata <= X"1D28F212";
when 16#127C# => romdata <= X"6424C3DB";
when 16#127D# => romdata <= X"44ADCD7A";
when 16#127E# => romdata <= X"961260FD";
when 16#127F# => romdata <= X"BCAB31E0";
when 16#1280# => romdata <= X"CAA02DD1";
when 16#1281# => romdata <= X"9DB9C721";
when 16#1282# => romdata <= X"EB35AB7D";
when 16#1283# => romdata <= X"64B8A387";
when 16#1284# => romdata <= X"79642724";
when 16#1285# => romdata <= X"2698A47D";
when 16#1286# => romdata <= X"832C3F1A";
when 16#1287# => romdata <= X"D4DDA0B5";
when 16#1288# => romdata <= X"926FFCE9";
when 16#1289# => romdata <= X"319EEEDA";
when 16#128A# => romdata <= X"1565ECB0";
when 16#128B# => romdata <= X"FA1EEDB4";
when 16#128C# => romdata <= X"24414120";
when 16#128D# => romdata <= X"AAE8CFD0";
when 16#128E# => romdata <= X"BE88D4D2";
when 16#128F# => romdata <= X"48899A0B";
when 16#1290# => romdata <= X"CE31F9BE";
when 16#1291# => romdata <= X"E7A4DC4D";
when 16#1292# => romdata <= X"B3C3B104";
when 16#1293# => romdata <= X"44FAD6AD";
when 16#1294# => romdata <= X"CCE28F0E";
when 16#1295# => romdata <= X"DF7B8085";
when 16#1296# => romdata <= X"36ACF5EB";
when 16#1297# => romdata <= X"05AADAE9";
when 16#1298# => romdata <= X"2693EE02";
when 16#1299# => romdata <= X"C9512B3E";
when 16#129A# => romdata <= X"EF000844";
when 16#129B# => romdata <= X"BA35E246";
when 16#129C# => romdata <= X"20A2E893";
when 16#129D# => romdata <= X"5354B843";
when 16#129E# => romdata <= X"2C07C8FD";
when 16#129F# => romdata <= X"615534BC";
when 16#12A0# => romdata <= X"FD0D8E3B";
when 16#12A1# => romdata <= X"572BF2CF";
when 16#12A2# => romdata <= X"06AD3439";
when 16#12A3# => romdata <= X"97590FE8";
when 16#12A4# => romdata <= X"B244A32B";
when 16#12A5# => romdata <= X"BE69125B";
when 16#12A6# => romdata <= X"5D7C5E51";
when 16#12A7# => romdata <= X"3A493724";
when 16#12A8# => romdata <= X"EEA8DA6C";
when 16#12A9# => romdata <= X"B0FFF3AC";
when 16#12AA# => romdata <= X"F1C5085A";
when 16#12AB# => romdata <= X"8120694C";
when 16#12AC# => romdata <= X"BC40FAE1";
when 16#12AD# => romdata <= X"A6326FD7";
when 16#12AE# => romdata <= X"1487CC3B";
when 16#12AF# => romdata <= X"E7C10A34";
when 16#12B0# => romdata <= X"315CDFFA";
when 16#12B1# => romdata <= X"8C618B68";
when 16#12B2# => romdata <= X"EA93D330";
when 16#12B3# => romdata <= X"945586B0";
when 16#12B4# => romdata <= X"80381F00";
when 16#12B5# => romdata <= X"76351B88";
when 16#12B6# => romdata <= X"8087F56B";
when 16#12B7# => romdata <= X"969E6D6A";
when 16#12B8# => romdata <= X"311AE03C";
when 16#12B9# => romdata <= X"C79FF686";
when 16#12BA# => romdata <= X"1E715C9D";
when 16#12BB# => romdata <= X"A9AEE751";
when 16#12BC# => romdata <= X"F1220661";
when 16#12BD# => romdata <= X"581C75DC";
when 16#12BE# => romdata <= X"EC0515A1";
when 16#12BF# => romdata <= X"C9259B9C";
when 16#12C0# => romdata <= X"F8E944CE";
when 16#12C1# => romdata <= X"C4B1754E";
when 16#12C2# => romdata <= X"5809E985";
when 16#12C3# => romdata <= X"D6F43FE4";
when 16#12C4# => romdata <= X"57108932";
when 16#12C5# => romdata <= X"42ADE0D3";
when 16#12C6# => romdata <= X"B84F1E19";
when 16#12C7# => romdata <= X"42B7A956";
when 16#12C8# => romdata <= X"48611595";
when 16#12C9# => romdata <= X"FED13F54";
when 16#12CA# => romdata <= X"6CA11DB8";
when 16#12CB# => romdata <= X"E5A55A3C";
when 16#12CC# => romdata <= X"3C78C379";
when 16#12CD# => romdata <= X"3C6689E1";
when 16#12CE# => romdata <= X"B3AFB5F6";
when 16#12CF# => romdata <= X"7526A480";
when 16#12D0# => romdata <= X"DF923A58";
when 16#12D1# => romdata <= X"6A779F94";
when 16#12D2# => romdata <= X"A09CF963";
when 16#12D3# => romdata <= X"594FF4B0";
when 16#12D4# => romdata <= X"A387876E";
when 16#12D5# => romdata <= X"BB3E8FAB";
when 16#12D6# => romdata <= X"888C97F6";
when 16#12D7# => romdata <= X"773E7F03";
when 16#12D8# => romdata <= X"17B038E4";
when 16#12D9# => romdata <= X"7DD7D109";
when 16#12DA# => romdata <= X"545BB072";
when 16#12DB# => romdata <= X"63B1AA84";
when 16#12DC# => romdata <= X"284B86E4";
when 16#12DD# => romdata <= X"7FFB9784";
when 16#12DE# => romdata <= X"A171D101";
when 16#12DF# => romdata <= X"E7B0A6D3";
when 16#12E0# => romdata <= X"8BCAE7E6";
when 16#12E1# => romdata <= X"3D827C99";
when 16#12E2# => romdata <= X"9BF55172";
when 16#12E3# => romdata <= X"8FFC642E";
when 16#12E4# => romdata <= X"E690B01D";
when 16#12E5# => romdata <= X"486CB6EB";
when 16#12E6# => romdata <= X"EEB9D5C8";
when 16#12E7# => romdata <= X"88112589";
when 16#12E8# => romdata <= X"EA5CBC9B";
when 16#12E9# => romdata <= X"DF49E675";
when 16#12EA# => romdata <= X"96522341";
when 16#12EB# => romdata <= X"6D6DA02D";
when 16#12EC# => romdata <= X"2333BFD4";
when 16#12ED# => romdata <= X"614706BF";
when 16#12EE# => romdata <= X"13373973";
when 16#12EF# => romdata <= X"207C849A";
when 16#12F0# => romdata <= X"0DE41EBA";
when 16#12F1# => romdata <= X"137FDF79";
when 16#12F2# => romdata <= X"A1EB25D7";
when 16#12F3# => romdata <= X"4E30CF60";
when 16#12F4# => romdata <= X"B577C278";
when 16#12F5# => romdata <= X"7DF04740";
when 16#12F6# => romdata <= X"BA8CADE3";
when 16#12F7# => romdata <= X"F9DA55D3";
when 16#12F8# => romdata <= X"F0084F02";
when 16#12F9# => romdata <= X"809E3754";
when 16#12FA# => romdata <= X"3239E0A7";
when 16#12FB# => romdata <= X"1E99751E";
when 16#12FC# => romdata <= X"EB21CB3B";
when 16#12FD# => romdata <= X"41488244";
when 16#12FE# => romdata <= X"193A4868";
when 16#12FF# => romdata <= X"CBA92760";
when 16#1300# => romdata <= X"FB227530";
when 16#1301# => romdata <= X"F82BD527";
when 16#1302# => romdata <= X"E648619E";
when 16#1303# => romdata <= X"532D7646";
when 16#1304# => romdata <= X"A5ABBD15";
when 16#1305# => romdata <= X"DB91A6E7";
when 16#1306# => romdata <= X"033DFECC";
when 16#1307# => romdata <= X"C65D095A";
when 16#1308# => romdata <= X"3D83AB77";
when 16#1309# => romdata <= X"EDD2F3FE";
when 16#130A# => romdata <= X"C52659CB";
when 16#130B# => romdata <= X"3AD1BEB0";
when 16#130C# => romdata <= X"09D7A1C9";
when 16#130D# => romdata <= X"BFB54429";
when 16#130E# => romdata <= X"1EC1C67B";
when 16#130F# => romdata <= X"75DD6DAB";
when 16#1310# => romdata <= X"06E70C32";
when 16#1311# => romdata <= X"C7149831";
when 16#1312# => romdata <= X"39DE4A41";
when 16#1313# => romdata <= X"EE07B4F3";
when 16#1314# => romdata <= X"C03BF566";
when 16#1315# => romdata <= X"558484F1";
when 16#1316# => romdata <= X"9A3BB674";
when 16#1317# => romdata <= X"B6795F0D";
when 16#1318# => romdata <= X"8537BC31";
when 16#1319# => romdata <= X"BC8D7A38";
when 16#131A# => romdata <= X"B2FF1B2E";
when 16#131B# => romdata <= X"C8B78539";
when 16#131C# => romdata <= X"B2251D0E";
when 16#131D# => romdata <= X"385DE484";
when 16#131E# => romdata <= X"B05A4114";
when 16#131F# => romdata <= X"77681A3A";
when 16#1320# => romdata <= X"E7527AC9";
when 16#1321# => romdata <= X"8BC2943A";
when 16#1322# => romdata <= X"F1CF7F09";
when 16#1323# => romdata <= X"ACF2DDE4";
when 16#1324# => romdata <= X"530AE896";
when 16#1325# => romdata <= X"BDE1266F";
when 16#1326# => romdata <= X"E916E833";
when 16#1327# => romdata <= X"A1C0CAA2";
when 16#1328# => romdata <= X"B2D2F598";
when 16#1329# => romdata <= X"5AD47B2D";
when 16#132A# => romdata <= X"0D1D3AFB";
when 16#132B# => romdata <= X"6E50D4B3";
when 16#132C# => romdata <= X"DA7DEEC4";
when 16#132D# => romdata <= X"385E6CA8";
when 16#132E# => romdata <= X"FE22760F";
when 16#132F# => romdata <= X"92807AC5";
when 16#1330# => romdata <= X"5556AAF7";
when 16#1331# => romdata <= X"973E8016";
when 16#1332# => romdata <= X"ADFD43A3";
when 16#1333# => romdata <= X"919088B7";
when 16#1334# => romdata <= X"68351B10";
when 16#1335# => romdata <= X"57498D2D";
when 16#1336# => romdata <= X"668D7C1E";
when 16#1337# => romdata <= X"8C634380";
when 16#1338# => romdata <= X"55FDF7D3";
when 16#1339# => romdata <= X"6C5E7DF0";
when 16#133A# => romdata <= X"2FCAFCBD";
when 16#133B# => romdata <= X"9291A214";
when 16#133C# => romdata <= X"9E7B429B";
when 16#133D# => romdata <= X"3202D329";
when 16#133E# => romdata <= X"E47CED51";
when 16#133F# => romdata <= X"EA577177";
when 16#1340# => romdata <= X"2E308C5B";
when 16#1341# => romdata <= X"EBA7B934";
when 16#1342# => romdata <= X"597540D8";
when 16#1343# => romdata <= X"3DBEC6C3";
when 16#1344# => romdata <= X"BC61A96E";
when 16#1345# => romdata <= X"A4CB2D75";
when 16#1346# => romdata <= X"30D9D760";
when 16#1347# => romdata <= X"AA940333";
when 16#1348# => romdata <= X"8CD95B82";
when 16#1349# => romdata <= X"9F17547C";
when 16#134A# => romdata <= X"5A90D161";
when 16#134B# => romdata <= X"F7B8CE00";
when 16#134C# => romdata <= X"37EBF403";
when 16#134D# => romdata <= X"C91C0D0C";
when 16#134E# => romdata <= X"70C589BA";
when 16#134F# => romdata <= X"87CAE8DF";
when 16#1350# => romdata <= X"26CF1428";
when 16#1351# => romdata <= X"1E235A68";
when 16#1352# => romdata <= X"6CCD10E2";
when 16#1353# => romdata <= X"D520A762";
when 16#1354# => romdata <= X"65C4C278";
when 16#1355# => romdata <= X"0EDFD070";
when 16#1356# => romdata <= X"5E89EFE3";
when 16#1357# => romdata <= X"C953FE76";
when 16#1358# => romdata <= X"0DE45A8C";
when 16#1359# => romdata <= X"F1F2D3F3";
when 16#135A# => romdata <= X"6DE3164D";
when 16#135B# => romdata <= X"5BC2CF32";
when 16#135C# => romdata <= X"204228AD";
when 16#135D# => romdata <= X"D7C182EC";
when 16#135E# => romdata <= X"55F1158A";
when 16#135F# => romdata <= X"FA9358BE";
when 16#1360# => romdata <= X"179C722A";
when 16#1361# => romdata <= X"DAF1D0BF";
when 16#1362# => romdata <= X"1306A0B5";
when 16#1363# => romdata <= X"6218857F";
when 16#1364# => romdata <= X"C5C21001";
when 16#1365# => romdata <= X"499F61E2";
when 16#1366# => romdata <= X"73442281";
when 16#1367# => romdata <= X"E585B3E6";
when 16#1368# => romdata <= X"DCE148AA";
when 16#1369# => romdata <= X"97B6622B";
when 16#136A# => romdata <= X"23BDAECF";
when 16#136B# => romdata <= X"983BF186";
when 16#136C# => romdata <= X"F1B34962";
when 16#136D# => romdata <= X"764758AC";
when 16#136E# => romdata <= X"3C20C840";
when 16#136F# => romdata <= X"36061D49";
when 16#1370# => romdata <= X"CA33B3C3";
when 16#1371# => romdata <= X"FCDF03F4";
when 16#1372# => romdata <= X"7F7E53B9";
when 16#1373# => romdata <= X"40DBB6E1";
when 16#1374# => romdata <= X"E4A26702";
when 16#1375# => romdata <= X"A118E525";
when 16#1376# => romdata <= X"A9A0EC22";
when 16#1377# => romdata <= X"9085C925";
when 16#1378# => romdata <= X"D133750E";
when 16#1379# => romdata <= X"D0B200CB";
when 16#137A# => romdata <= X"28A11328";
when 16#137B# => romdata <= X"9DE143D1";
when 16#137C# => romdata <= X"D5839D2A";
when 16#137D# => romdata <= X"F8B0525E";
when 16#137E# => romdata <= X"0027F34F";
when 16#137F# => romdata <= X"F32106A0";
when 16#1380# => romdata <= X"9E5DA18A";
when 16#1381# => romdata <= X"19514CCC";
when 16#1382# => romdata <= X"849E9697";
when 16#1383# => romdata <= X"AE4BD1B3";
when 16#1384# => romdata <= X"17BB3492";
when 16#1385# => romdata <= X"7D0461A9";
when 16#1386# => romdata <= X"6A7AF4A5";
when 16#1387# => romdata <= X"D6C13107";
when 16#1388# => romdata <= X"FFB9DE38";
when 16#1389# => romdata <= X"C5E8CB7C";
when 16#138A# => romdata <= X"5682827F";
when 16#138B# => romdata <= X"57D94ED2";
when 16#138C# => romdata <= X"E77D36F9";
when 16#138D# => romdata <= X"F1CB05E4";
when 16#138E# => romdata <= X"C2C62B1D";
when 16#138F# => romdata <= X"E254C7B1";
when 16#1390# => romdata <= X"CB236FC4";
when 16#1391# => romdata <= X"ED70BF8D";
when 16#1392# => romdata <= X"D1F43AC7";
when 16#1393# => romdata <= X"73C16A37";
when 16#1394# => romdata <= X"392B895F";
when 16#1395# => romdata <= X"8B157578";
when 16#1396# => romdata <= X"C477C85E";
when 16#1397# => romdata <= X"53FA7CA5";
when 16#1398# => romdata <= X"8BE70D91";
when 16#1399# => romdata <= X"87AF5F7A";
when 16#139A# => romdata <= X"18D5A1E5";
when 16#139B# => romdata <= X"642335E4";
when 16#139C# => romdata <= X"6C2F8F46";
when 16#139D# => romdata <= X"91AEEE6A";
when 16#139E# => romdata <= X"9692E21B";
when 16#139F# => romdata <= X"9668E2C0";
when 16#13A0# => romdata <= X"83D9F45C";
when 16#13A1# => romdata <= X"2DB3E991";
when 16#13A2# => romdata <= X"588BA87A";
when 16#13A3# => romdata <= X"0A238087";
when 16#13A4# => romdata <= X"32EE39E8";
when 16#13A5# => romdata <= X"B3C876BE";
when 16#13A6# => romdata <= X"79227C78";
when 16#13A7# => romdata <= X"2F07EE3F";
when 16#13A8# => romdata <= X"B3086AF9";
when 16#13A9# => romdata <= X"13D71D71";
when 16#13AA# => romdata <= X"910A0F56";
when 16#13AB# => romdata <= X"D62B5DE5";
when 16#13AC# => romdata <= X"E224F785";
when 16#13AD# => romdata <= X"6A42A4A1";
when 16#13AE# => romdata <= X"B2AFE380";
when 16#13AF# => romdata <= X"827BE86E";
when 16#13B0# => romdata <= X"381FCE48";
when 16#13B1# => romdata <= X"6FD08A91";
when 16#13B2# => romdata <= X"B22BD91D";
when 16#13B3# => romdata <= X"09615F41";
when 16#13B4# => romdata <= X"7E178C55";
when 16#13B5# => romdata <= X"93E41B09";
when 16#13B6# => romdata <= X"17E07513";
when 16#13B7# => romdata <= X"3960AD28";
when 16#13B8# => romdata <= X"B4DD4096";
when 16#13B9# => romdata <= X"D1E84BEF";
when 16#13BA# => romdata <= X"1363098D";
when 16#13BB# => romdata <= X"DE92C29C";
when 16#13BC# => romdata <= X"D508C40B";
when 16#13BD# => romdata <= X"A7E785F4";
when 16#13BE# => romdata <= X"6C1E0DC7";
when 16#13BF# => romdata <= X"2E729D39";
when 16#13C0# => romdata <= X"4911DA91";
when 16#13C1# => romdata <= X"9EA6F94D";
when 16#13C2# => romdata <= X"14567FFA";
when 16#13C3# => romdata <= X"DC61CEB8";
when 16#13C4# => romdata <= X"DCA2821B";
when 16#13C5# => romdata <= X"1CF04847";
when 16#13C6# => romdata <= X"7E2433E9";
when 16#13C7# => romdata <= X"DC718DE6";
when 16#13C8# => romdata <= X"18EDEEF3";
when 16#13C9# => romdata <= X"02CDCB5D";
when 16#13CA# => romdata <= X"E472656D";
when 16#13CB# => romdata <= X"6687DC41";
when 16#13CC# => romdata <= X"EA34C2BB";
when 16#13CD# => romdata <= X"4DF1CA08";
when 16#13CE# => romdata <= X"DCB933BE";
when 16#13CF# => romdata <= X"3EF4B419";
when 16#13D0# => romdata <= X"158BA0B6";
when 16#13D1# => romdata <= X"8AE82A64";
when 16#13D2# => romdata <= X"ADD58559";
when 16#13D3# => romdata <= X"214FD88A";
when 16#13D4# => romdata <= X"4CB34D99";
when 16#13D5# => romdata <= X"F6463106";
when 16#13D6# => romdata <= X"97DA982C";
when 16#13D7# => romdata <= X"2FD4EE06";
when 16#13D8# => romdata <= X"9DC1CB10";
when 16#13D9# => romdata <= X"2125C34A";
when 16#13DA# => romdata <= X"89AB20F1";
when 16#13DB# => romdata <= X"7B6EF648";
when 16#13DC# => romdata <= X"A8346273";
when 16#13DD# => romdata <= X"20410FF6";
when 16#13DE# => romdata <= X"881C7919";
when 16#13DF# => romdata <= X"AE4E71CB";
when 16#13E0# => romdata <= X"AE5F8200";
when 16#13E1# => romdata <= X"E523934D";
when 16#13E2# => romdata <= X"84BFA897";
when 16#13E3# => romdata <= X"C44B89B9";
when 16#13E4# => romdata <= X"BC6BC012";
when 16#13E5# => romdata <= X"9F7F97EE";
when 16#13E6# => romdata <= X"0EC049BA";
when 16#13E7# => romdata <= X"1AFD67D0";
when 16#13E8# => romdata <= X"0CD624A7";
when 16#13E9# => romdata <= X"5FF5A305";
when 16#13EA# => romdata <= X"14399BE4";
when 16#13EB# => romdata <= X"801CED05";
when 16#13EC# => romdata <= X"7B498B9D";
when 16#13ED# => romdata <= X"BBF0EB99";
when 16#13EE# => romdata <= X"44295D5B";
when 16#13EF# => romdata <= X"6AE968C4";
when 16#13F0# => romdata <= X"B8BBD2B9";
when 16#13F1# => romdata <= X"A9E17A30";
when 16#13F2# => romdata <= X"39C5FA35";
when 16#13F3# => romdata <= X"A0D30AA5";
when 16#13F4# => romdata <= X"4CA426C5";
when 16#13F5# => romdata <= X"8353943D";
when 16#13F6# => romdata <= X"DDD3FD18";
when 16#13F7# => romdata <= X"5895C0DA";
when 16#13F8# => romdata <= X"EE950455";
when 16#13F9# => romdata <= X"FC131F52";
when 16#13FA# => romdata <= X"0B46AE11";
when 16#13FB# => romdata <= X"8C7406D0";
when 16#13FC# => romdata <= X"A72BE612";
when 16#13FD# => romdata <= X"7C530773";
when 16#13FE# => romdata <= X"0AD441B6";
when 16#13FF# => romdata <= X"FC3D1E00";
when 16#1400# => romdata <= X"8589F839";
when 16#1401# => romdata <= X"6F5B1C54";
when 16#1402# => romdata <= X"CAF2B17D";
when 16#1403# => romdata <= X"4C152CEF";
when 16#1404# => romdata <= X"347E66EC";
when 16#1405# => romdata <= X"7903C878";
when 16#1406# => romdata <= X"F2823D4A";
when 16#1407# => romdata <= X"DB9E7CCF";
when 16#1408# => romdata <= X"AFEBB926";
when 16#1409# => romdata <= X"B7EEB4AE";
when 16#140A# => romdata <= X"1BECA339";
when 16#140B# => romdata <= X"A027CE8E";
when 16#140C# => romdata <= X"F9979575";
when 16#140D# => romdata <= X"32FA871F";
when 16#140E# => romdata <= X"356E0326";
when 16#140F# => romdata <= X"ECE0BCE3";
when 16#1410# => romdata <= X"399F8117";
when 16#1411# => romdata <= X"9BF78C5C";
when 16#1412# => romdata <= X"7D135018";
when 16#1413# => romdata <= X"ABC340C0";
when 16#1414# => romdata <= X"BE58D306";
when 16#1415# => romdata <= X"3DD7CDA4";
when 16#1416# => romdata <= X"C1918A01";
when 16#1417# => romdata <= X"87BACF83";
when 16#1418# => romdata <= X"0C8B6900";
when 16#1419# => romdata <= X"D43B62E0";
when 16#141A# => romdata <= X"4DF6E831";
when 16#141B# => romdata <= X"CFEFA13B";
when 16#141C# => romdata <= X"DB5E873A";
when 16#141D# => romdata <= X"527F2432";
when 16#141E# => romdata <= X"7C95DB4B";
when 16#141F# => romdata <= X"BDB65C81";
when 16#1420# => romdata <= X"A20F959F";
when 16#1421# => romdata <= X"828F5DAE";
when 16#1422# => romdata <= X"4DC13E5C";
when 16#1423# => romdata <= X"AC7417EE";
when 16#1424# => romdata <= X"089401FB";
when 16#1425# => romdata <= X"497ABE10";
when 16#1426# => romdata <= X"144E28EA";
when 16#1427# => romdata <= X"383E61D4";
when 16#1428# => romdata <= X"A9B63B61";
when 16#1429# => romdata <= X"8AA7CEA4";
when 16#142A# => romdata <= X"588B2911";
when 16#142B# => romdata <= X"EC581F50";
when 16#142C# => romdata <= X"6062B05E";
when 16#142D# => romdata <= X"7BEF723A";
when 16#142E# => romdata <= X"5A465C9F";
when 16#142F# => romdata <= X"BE70E313";
when 16#1430# => romdata <= X"753BDE31";
when 16#1431# => romdata <= X"02845A79";
when 16#1432# => romdata <= X"A206BF7D";
when 16#1433# => romdata <= X"996F49A2";
when 16#1434# => romdata <= X"1752D534";
when 16#1435# => romdata <= X"B73EE83B";
when 16#1436# => romdata <= X"48C1A225";
when 16#1437# => romdata <= X"F85F5103";
when 16#1438# => romdata <= X"DDB9B6B8";
when 16#1439# => romdata <= X"380F61AA";
when 16#143A# => romdata <= X"F26E5CA6";
when 16#143B# => romdata <= X"43EB62EA";
when 16#143C# => romdata <= X"F58AFEE0";
when 16#143D# => romdata <= X"D3494E4F";
when 16#143E# => romdata <= X"7A4F642A";
when 16#143F# => romdata <= X"3454F4F5";
when 16#1440# => romdata <= X"6A406A26";
when 16#1441# => romdata <= X"4148FF5D";
when 16#1442# => romdata <= X"AC9DF5F1";
when 16#1443# => romdata <= X"51C12E89";
when 16#1444# => romdata <= X"ED9D4FDC";
when 16#1445# => romdata <= X"C04EC5F0";
when 16#1446# => romdata <= X"022DF8CB";
when 16#1447# => romdata <= X"AF3CBC67";
when 16#1448# => romdata <= X"CED2853F";
when 16#1449# => romdata <= X"B4F8C589";
when 16#144A# => romdata <= X"4C96CD00";
when 16#144B# => romdata <= X"550950E7";
when 16#144C# => romdata <= X"EA2A26C8";
when 16#144D# => romdata <= X"0A72DF53";
when 16#144E# => romdata <= X"3270A0E2";
when 16#144F# => romdata <= X"3EDBAA4D";
when 16#1450# => romdata <= X"0BE935D6";
when 16#1451# => romdata <= X"2CC885E1";
when 16#1452# => romdata <= X"CCE653D6";
when 16#1453# => romdata <= X"6C51E49C";
when 16#1454# => romdata <= X"43952042";
when 16#1455# => romdata <= X"E1B2D043";
when 16#1456# => romdata <= X"BDA1CFFC";
when 16#1457# => romdata <= X"1E98A3F8";
when 16#1458# => romdata <= X"06EB587A";
when 16#1459# => romdata <= X"4EC9AE29";
when 16#145A# => romdata <= X"9BD838C6";
when 16#145B# => romdata <= X"8B9BBF7C";
when 16#145C# => romdata <= X"420C12B2";
when 16#145D# => romdata <= X"3AA2793F";
when 16#145E# => romdata <= X"A0248C93";
when 16#145F# => romdata <= X"2A91BCDD";
when 16#1460# => romdata <= X"641DCB38";
when 16#1461# => romdata <= X"F0B2D718";
when 16#1462# => romdata <= X"7D898692";
when 16#1463# => romdata <= X"8DF4602B";
when 16#1464# => romdata <= X"381BA13B";
when 16#1465# => romdata <= X"26329113";
when 16#1466# => romdata <= X"4628FC91";
when 16#1467# => romdata <= X"C8EDE925";
when 16#1468# => romdata <= X"94B39650";
when 16#1469# => romdata <= X"B877D9A9";
when 16#146A# => romdata <= X"1DAAA052";
when 16#146B# => romdata <= X"95457DFB";
when 16#146C# => romdata <= X"2C5D8207";
when 16#146D# => romdata <= X"BBCDFE16";
when 16#146E# => romdata <= X"AC5B9360";
when 16#146F# => romdata <= X"0E33BC97";
when 16#1470# => romdata <= X"0B38E188";
when 16#1471# => romdata <= X"08B1A732";
when 16#1472# => romdata <= X"88932035";
when 16#1473# => romdata <= X"2B524B10";
when 16#1474# => romdata <= X"9560136E";
when 16#1475# => romdata <= X"605D3278";
when 16#1476# => romdata <= X"4CA01F8B";
when 16#1477# => romdata <= X"11D077C8";
when 16#1478# => romdata <= X"1EAD6B7A";
when 16#1479# => romdata <= X"5741C82D";
when 16#147A# => romdata <= X"76CEEF76";
when 16#147B# => romdata <= X"4FD07E36";
when 16#147C# => romdata <= X"1D531B75";
when 16#147D# => romdata <= X"106AF157";
when 16#147E# => romdata <= X"2AD1375B";
when 16#147F# => romdata <= X"2BBAB680";
when 16#1480# => romdata <= X"A3E17A4C";
when 16#1481# => romdata <= X"AD2ABE76";
when 16#1482# => romdata <= X"E32D1850";
when 16#1483# => romdata <= X"1899F8D6";
when 16#1484# => romdata <= X"0D293BB1";
when 16#1485# => romdata <= X"AC3ADB64";
when 16#1486# => romdata <= X"F81148AF";
when 16#1487# => romdata <= X"56741790";
when 16#1488# => romdata <= X"F87F8B7A";
when 16#1489# => romdata <= X"2D9A6E76";
when 16#148A# => romdata <= X"45EA50B7";
when 16#148B# => romdata <= X"5514C394";
when 16#148C# => romdata <= X"508884CB";
when 16#148D# => romdata <= X"F9E320B2";
when 16#148E# => romdata <= X"4D41D824";
when 16#148F# => romdata <= X"6EB3C163";
when 16#1490# => romdata <= X"B9101240";
when 16#1491# => romdata <= X"776C312D";
when 16#1492# => romdata <= X"B63C3388";
when 16#1493# => romdata <= X"9E3C1218";
when 16#1494# => romdata <= X"43585047";
when 16#1495# => romdata <= X"1C454486";
when 16#1496# => romdata <= X"DF7FF4D2";
when 16#1497# => romdata <= X"DC0AAA14";
when 16#1498# => romdata <= X"980F394C";
when 16#1499# => romdata <= X"C8EB7B82";
when 16#149A# => romdata <= X"8A60C53A";
when 16#149B# => romdata <= X"2FEC3315";
when 16#149C# => romdata <= X"BEAEB300";
when 16#149D# => romdata <= X"45B3E650";
when 16#149E# => romdata <= X"06C6EBB2";
when 16#149F# => romdata <= X"3B47A8A0";
when 16#14A0# => romdata <= X"69EAD45E";
when 16#14A1# => romdata <= X"32E771B9";
when 16#14A2# => romdata <= X"C467B435";
when 16#14A3# => romdata <= X"9EBB681A";
when 16#14A4# => romdata <= X"B48C891A";
when 16#14A5# => romdata <= X"BB796544";
when 16#14A6# => romdata <= X"16917820";
when 16#14A7# => romdata <= X"3BCC4BC6";
when 16#14A8# => romdata <= X"B4A278DC";
when 16#14A9# => romdata <= X"EFACE5E9";
when 16#14AA# => romdata <= X"385C0593";
when 16#14AB# => romdata <= X"46A23DCC";
when 16#14AC# => romdata <= X"A001FC9E";
when 16#14AD# => romdata <= X"47CFEED4";
when 16#14AE# => romdata <= X"BCBDD947";
when 16#14AF# => romdata <= X"B12A3F7E";
when 16#14B0# => romdata <= X"5FF8B937";
when 16#14B1# => romdata <= X"2D9497EE";
when 16#14B2# => romdata <= X"1A508D8B";
when 16#14B3# => romdata <= X"D3392BF3";
when 16#14B4# => romdata <= X"CFAD58F0";
when 16#14B5# => romdata <= X"191B18F6";
when 16#14B6# => romdata <= X"A300FF9C";
when 16#14B7# => romdata <= X"B8D914FD";
when 16#14B8# => romdata <= X"F37B48BF";
when 16#14B9# => romdata <= X"24C2C5CA";
when 16#14BA# => romdata <= X"76ABDFCC";
when 16#14BB# => romdata <= X"F833D51D";
when 16#14BC# => romdata <= X"48FC90E0";
when 16#14BD# => romdata <= X"6E7B9729";
when 16#14BE# => romdata <= X"44BCBAD1";
when 16#14BF# => romdata <= X"69232A84";
when 16#14C0# => romdata <= X"29B6100B";
when 16#14C1# => romdata <= X"A562F7F3";
when 16#14C2# => romdata <= X"C55A625A";
when 16#14C3# => romdata <= X"1870A7C7";
when 16#14C4# => romdata <= X"D7BC9BD4";
when 16#14C5# => romdata <= X"C4783278";
when 16#14C6# => romdata <= X"CD95D07F";
when 16#14C7# => romdata <= X"89E8010E";
when 16#14C8# => romdata <= X"78876547";
when 16#14C9# => romdata <= X"F9AEC443";
when 16#14CA# => romdata <= X"22B0029A";
when 16#14CB# => romdata <= X"922B2922";
when 16#14CC# => romdata <= X"634ECCF2";
when 16#14CD# => romdata <= X"BBB47BF8";
when 16#14CE# => romdata <= X"7909C494";
when 16#14CF# => romdata <= X"049550F1";
when 16#14D0# => romdata <= X"E6D03BB5";
when 16#14D1# => romdata <= X"354DEA7E";
when 16#14D2# => romdata <= X"777F499D";
when 16#14D3# => romdata <= X"2D6239BF";
when 16#14D4# => romdata <= X"A5C1CFA5";
when 16#14D5# => romdata <= X"36F8CB16";
when 16#14D6# => romdata <= X"F4DB9EAD";
when 16#14D7# => romdata <= X"96F83A4A";
when 16#14D8# => romdata <= X"D34AE2C6";
when 16#14D9# => romdata <= X"893ECD69";
when 16#14DA# => romdata <= X"94C89E7F";
when 16#14DB# => romdata <= X"4FE426D9";
when 16#14DC# => romdata <= X"5A18F93B";
when 16#14DD# => romdata <= X"88CB3579";
when 16#14DE# => romdata <= X"96B8E5A3";
when 16#14DF# => romdata <= X"4C43533E";
when 16#14E0# => romdata <= X"DB1F28A8";
when 16#14E1# => romdata <= X"162FCBEF";
when 16#14E2# => romdata <= X"03704FCC";
when 16#14E3# => romdata <= X"CD80C328";
when 16#14E4# => romdata <= X"74F345D3";
when 16#14E5# => romdata <= X"4E81EE81";
when 16#14E6# => romdata <= X"3DF5CC9B";
when 16#14E7# => romdata <= X"9C299362";
when 16#14E8# => romdata <= X"F8443AAB";
when 16#14E9# => romdata <= X"E91BD0EA";
when 16#14EA# => romdata <= X"B9746E43";
when 16#14EB# => romdata <= X"1804B612";
when 16#14EC# => romdata <= X"9FD32916";
when 16#14ED# => romdata <= X"303A5703";
when 16#14EE# => romdata <= X"23FA121F";
when 16#14EF# => romdata <= X"7AEB2829";
when 16#14F0# => romdata <= X"F2A50A82";
when 16#14F1# => romdata <= X"CACCF6D2";
when 16#14F2# => romdata <= X"73FFBD7A";
when 16#14F3# => romdata <= X"C6FFC580";
when 16#14F4# => romdata <= X"7771D216";
when 16#14F5# => romdata <= X"F50742F7";
when 16#14F6# => romdata <= X"091946F9";
when 16#14F7# => romdata <= X"14601159";
when 16#14F8# => romdata <= X"89C87E8B";
when 16#14F9# => romdata <= X"BBC8402B";
when 16#14FA# => romdata <= X"4C8B95C1";
when 16#14FB# => romdata <= X"02CAB538";
when 16#14FC# => romdata <= X"43D581FA";
when 16#14FD# => romdata <= X"9F16C0EC";
when 16#14FE# => romdata <= X"CE8944E5";
when 16#14FF# => romdata <= X"FC4BF4C0";
when 16#1500# => romdata <= X"9D7B1CF0";
when 16#1501# => romdata <= X"029261D6";
when 16#1502# => romdata <= X"5AE1F021";
when 16#1503# => romdata <= X"DAFA81CF";
when 16#1504# => romdata <= X"1673C9E0";
when 16#1505# => romdata <= X"B47FF2C3";
when 16#1506# => romdata <= X"7D1B1AF4";
when 16#1507# => romdata <= X"6E7A91BC";
when 16#1508# => romdata <= X"5E529C8F";
when 16#1509# => romdata <= X"93EE3BC7";
when 16#150A# => romdata <= X"4E92B274";
when 16#150B# => romdata <= X"3AAB1EDE";
when 16#150C# => romdata <= X"16A6523B";
when 16#150D# => romdata <= X"5B8A591C";
when 16#150E# => romdata <= X"617C1FD0";
when 16#150F# => romdata <= X"150E63F3";
when 16#1510# => romdata <= X"B7EF0494";
when 16#1511# => romdata <= X"162437B0";
when 16#1512# => romdata <= X"FD555A83";
when 16#1513# => romdata <= X"A3BDB519";
when 16#1514# => romdata <= X"B3BB209E";
when 16#1515# => romdata <= X"F7924D6B";
when 16#1516# => romdata <= X"CDE5992B";
when 16#1517# => romdata <= X"A6248690";
when 16#1518# => romdata <= X"442E72CD";
when 16#1519# => romdata <= X"5EB64B4C";
when 16#151A# => romdata <= X"3D3F7DA3";
when 16#151B# => romdata <= X"39108A18";
when 16#151C# => romdata <= X"B61AD88A";
when 16#151D# => romdata <= X"BE87BB7C";
when 16#151E# => romdata <= X"85A3A352";
when 16#151F# => romdata <= X"D7B882FD";
when 16#1520# => romdata <= X"683B2637";
when 16#1521# => romdata <= X"A17A2D9C";
when 16#1522# => romdata <= X"B0B7F414";
when 16#1523# => romdata <= X"56DCFA66";
when 16#1524# => romdata <= X"D62913F1";
when 16#1525# => romdata <= X"45600BAA";
when 16#1526# => romdata <= X"EEE7EFA5";
when 16#1527# => romdata <= X"071C3C9E";
when 16#1528# => romdata <= X"6FDD0A67";
when 16#1529# => romdata <= X"79A73707";
when 16#152A# => romdata <= X"1FA69659";
when 16#152B# => romdata <= X"78CBC897";
when 16#152C# => romdata <= X"76386B10";
when 16#152D# => romdata <= X"8DD7216F";
when 16#152E# => romdata <= X"CE962FA8";
when 16#152F# => romdata <= X"7A26B29F";
when 16#1530# => romdata <= X"E0E73230";
when 16#1531# => romdata <= X"9C0124B0";
when 16#1532# => romdata <= X"C1E99E56";
when 16#1533# => romdata <= X"42E5EAE6";
when 16#1534# => romdata <= X"70005B07";
when 16#1535# => romdata <= X"8C097D16";
when 16#1536# => romdata <= X"C58B8923";
when 16#1537# => romdata <= X"633C18FD";
when 16#1538# => romdata <= X"B0E8FF8C";
when 16#1539# => romdata <= X"4610B789";
when 16#153A# => romdata <= X"387ACB5A";
when 16#153B# => romdata <= X"2DD0B6AE";
when 16#153C# => romdata <= X"7E0DF43A";
when 16#153D# => romdata <= X"6A9E8C3B";
when 16#153E# => romdata <= X"89C7E5D6";
when 16#153F# => romdata <= X"28D59759";
when 16#1540# => romdata <= X"C58D07E0";
when 16#1541# => romdata <= X"687812AE";
when 16#1542# => romdata <= X"DAEEDBC6";
when 16#1543# => romdata <= X"3B4FEE85";
when 16#1544# => romdata <= X"24D10E4B";
when 16#1545# => romdata <= X"46769695";
when 16#1546# => romdata <= X"7E6791C1";
when 16#1547# => romdata <= X"E94B13CA";
when 16#1548# => romdata <= X"DCD0ED60";
when 16#1549# => romdata <= X"752C2DB1";
when 16#154A# => romdata <= X"B65E035E";
when 16#154B# => romdata <= X"A72F89FC";
when 16#154C# => romdata <= X"679138D3";
when 16#154D# => romdata <= X"609FD2A3";
when 16#154E# => romdata <= X"0E4DD1A9";
when 16#154F# => romdata <= X"46418253";
when 16#1550# => romdata <= X"C67AA69B";
when 16#1551# => romdata <= X"07EBB95D";
when 16#1552# => romdata <= X"4973F562";
when 16#1553# => romdata <= X"CE377343";
when 16#1554# => romdata <= X"0007A6DB";
when 16#1555# => romdata <= X"77271D5F";
when 16#1556# => romdata <= X"2B342CC5";
when 16#1557# => romdata <= X"E76E1151";
when 16#1558# => romdata <= X"78F9C7B1";
when 16#1559# => romdata <= X"600554F5";
when 16#155A# => romdata <= X"C794961B";
when 16#155B# => romdata <= X"AE81A5E9";
when 16#155C# => romdata <= X"B621BA17";
when 16#155D# => romdata <= X"851008BE";
when 16#155E# => romdata <= X"D9B556E4";
when 16#155F# => romdata <= X"61A553FE";
when 16#1560# => romdata <= X"9BE00A40";
when 16#1561# => romdata <= X"891750E4";
when 16#1562# => romdata <= X"EA4B4752";
when 16#1563# => romdata <= X"16283B53";
when 16#1564# => romdata <= X"0CB8D479";
when 16#1565# => romdata <= X"DC70B026";
when 16#1566# => romdata <= X"E0788922";
when 16#1567# => romdata <= X"9F601755";
when 16#1568# => romdata <= X"2AB9E01E";
when 16#1569# => romdata <= X"DE6703FD";
when 16#156A# => romdata <= X"1E2D59AF";
when 16#156B# => romdata <= X"0B71E0F1";
when 16#156C# => romdata <= X"DC9A42AC";
when 16#156D# => romdata <= X"C5823324";
when 16#156E# => romdata <= X"BEFC52CA";
when 16#156F# => romdata <= X"0DCD25FE";
when 16#1570# => romdata <= X"8B10C999";
when 16#1571# => romdata <= X"152AA367";
when 16#1572# => romdata <= X"6A30602D";
when 16#1573# => romdata <= X"3506F787";
when 16#1574# => romdata <= X"51477033";
when 16#1575# => romdata <= X"DB7AB1A2";
when 16#1576# => romdata <= X"EDC21A6F";
when 16#1577# => romdata <= X"E51273B6";
when 16#1578# => romdata <= X"B2890088";
when 16#1579# => romdata <= X"703CEFE7";
when 16#157A# => romdata <= X"4F9EA898";
when 16#157B# => romdata <= X"81896E5B";
when 16#157C# => romdata <= X"E124B1FC";
when 16#157D# => romdata <= X"9430B92F";
when 16#157E# => romdata <= X"0C0568F5";
when 16#157F# => romdata <= X"A068A800";
when 16#1580# => romdata <= X"F23088E3";
when 16#1581# => romdata <= X"EAA0A6BA";
when 16#1582# => romdata <= X"04D0633A";
when 16#1583# => romdata <= X"AFE85203";
when 16#1584# => romdata <= X"E8B18292";
when 16#1585# => romdata <= X"23FA6B73";
when 16#1586# => romdata <= X"0F6DEE67";
when 16#1587# => romdata <= X"99B521F2";
when 16#1588# => romdata <= X"E8323B87";
when 16#1589# => romdata <= X"93D0F7F2";
when 16#158A# => romdata <= X"BB9305B3";
when 16#158B# => romdata <= X"EF4F5B4F";
when 16#158C# => romdata <= X"1CB82283";
when 16#158D# => romdata <= X"6E4D92C8";
when 16#158E# => romdata <= X"E4928A85";
when 16#158F# => romdata <= X"1BCE6883";
when 16#1590# => romdata <= X"29DECA6F";
when 16#1591# => romdata <= X"7285DCC8";
when 16#1592# => romdata <= X"5195E5BD";
when 16#1593# => romdata <= X"A3B503B8";
when 16#1594# => romdata <= X"AEE6F1CD";
when 16#1595# => romdata <= X"7FBB1584";
when 16#1596# => romdata <= X"44E7DE8B";
when 16#1597# => romdata <= X"F6A9A3CD";
when 16#1598# => romdata <= X"A3117877";
when 16#1599# => romdata <= X"55A827BC";
when 16#159A# => romdata <= X"AD3DA562";
when 16#159B# => romdata <= X"1908EA91";
when 16#159C# => romdata <= X"3C0316B9";
when 16#159D# => romdata <= X"B52BFB07";
when 16#159E# => romdata <= X"ADADEFF1";
when 16#159F# => romdata <= X"7D3766BB";
when 16#15A0# => romdata <= X"450DD713";
when 16#15A1# => romdata <= X"28A0353B";
when 16#15A2# => romdata <= X"09DC24DE";
when 16#15A3# => romdata <= X"93CF83A2";
when 16#15A4# => romdata <= X"E5F98BA9";
when 16#15A5# => romdata <= X"D612187B";
when 16#15A6# => romdata <= X"601157D6";
when 16#15A7# => romdata <= X"B140E675";
when 16#15A8# => romdata <= X"228B58C9";
when 16#15A9# => romdata <= X"398618C3";
when 16#15AA# => romdata <= X"BF0D11A2";
when 16#15AB# => romdata <= X"26E48936";
when 16#15AC# => romdata <= X"6102B9C3";
when 16#15AD# => romdata <= X"5A916653";
when 16#15AE# => romdata <= X"F0DB3671";
when 16#15AF# => romdata <= X"1ACBA5F3";
when 16#15B0# => romdata <= X"2B327F57";
when 16#15B1# => romdata <= X"89F3EF48";
when 16#15B2# => romdata <= X"A338E467";
when 16#15B3# => romdata <= X"6F4BC2C6";
when 16#15B4# => romdata <= X"A1308597";
when 16#15B5# => romdata <= X"171903D2";
when 16#15B6# => romdata <= X"AA299CE7";
when 16#15B7# => romdata <= X"E523C2AB";
when 16#15B8# => romdata <= X"E4B15AA4";
when 16#15B9# => romdata <= X"FC489541";
when 16#15BA# => romdata <= X"87E00975";
when 16#15BB# => romdata <= X"83EB0994";
when 16#15BC# => romdata <= X"19047244";
when 16#15BD# => romdata <= X"B4931326";
when 16#15BE# => romdata <= X"E5923B63";
when 16#15BF# => romdata <= X"13DE0842";
when 16#15C0# => romdata <= X"3DB00866";
when 16#15C1# => romdata <= X"374ABBF5";
when 16#15C2# => romdata <= X"C31A0054";
when 16#15C3# => romdata <= X"2CB97CDF";
when 16#15C4# => romdata <= X"B8F71046";
when 16#15C5# => romdata <= X"AA2A6DBF";
when 16#15C6# => romdata <= X"D7E1A71C";
when 16#15C7# => romdata <= X"068ED70E";
when 16#15C8# => romdata <= X"8D7C3268";
when 16#15C9# => romdata <= X"EA3E0EEF";
when 16#15CA# => romdata <= X"2262BD79";
when 16#15CB# => romdata <= X"91B6C59F";
when 16#15CC# => romdata <= X"F471F73A";
when 16#15CD# => romdata <= X"4E85F4FA";
when 16#15CE# => romdata <= X"015E164F";
when 16#15CF# => romdata <= X"9C15FE0A";
when 16#15D0# => romdata <= X"A5F4772B";
when 16#15D1# => romdata <= X"F2D62B26";
when 16#15D2# => romdata <= X"D3EAA25C";
when 16#15D3# => romdata <= X"E83EAEC5";
when 16#15D4# => romdata <= X"EB3577CA";
when 16#15D5# => romdata <= X"83A68168";
when 16#15D6# => romdata <= X"FB64C40A";
when 16#15D7# => romdata <= X"7A155905";
when 16#15D8# => romdata <= X"CBA6E641";
when 16#15D9# => romdata <= X"59E55EBC";
when 16#15DA# => romdata <= X"928D125E";
when 16#15DB# => romdata <= X"55165C63";
when 16#15DC# => romdata <= X"9F545B00";
when 16#15DD# => romdata <= X"71EE3CF1";
when 16#15DE# => romdata <= X"A3F58B49";
when 16#15DF# => romdata <= X"94BB4BF5";
when 16#15E0# => romdata <= X"0C2B24F2";
when 16#15E1# => romdata <= X"E06E4ADC";
when 16#15E2# => romdata <= X"90BC1C09";
when 16#15E3# => romdata <= X"54A257D8";
when 16#15E4# => romdata <= X"8444347A";
when 16#15E5# => romdata <= X"AECF136C";
when 16#15E6# => romdata <= X"15242633";
when 16#15E7# => romdata <= X"463DCF98";
when 16#15E8# => romdata <= X"4BB67366";
when 16#15E9# => romdata <= X"66E38F1A";
when 16#15EA# => romdata <= X"45150B1B";
when 16#15EB# => romdata <= X"7D1C31DE";
when 16#15EC# => romdata <= X"06EB9C2F";
when 16#15ED# => romdata <= X"4097E9D9";
when 16#15EE# => romdata <= X"B4D21EBC";
when 16#15EF# => romdata <= X"9F3A9180";
when 16#15F0# => romdata <= X"00DE2449";
when 16#15F1# => romdata <= X"DCB3F5FD";
when 16#15F2# => romdata <= X"DC3C773A";
when 16#15F3# => romdata <= X"645DF560";
when 16#15F4# => romdata <= X"F7E013E8";
when 16#15F5# => romdata <= X"47E2356D";
when 16#15F6# => romdata <= X"33EFF1E2";
when 16#15F7# => romdata <= X"15782638";
when 16#15F8# => romdata <= X"F58034B0";
when 16#15F9# => romdata <= X"9F4739F9";
when 16#15FA# => romdata <= X"8915BFB0";
when 16#15FB# => romdata <= X"B1DC1246";
when 16#15FC# => romdata <= X"81492F58";
when 16#15FD# => romdata <= X"021670D0";
when 16#15FE# => romdata <= X"3CBF5E8F";
when 16#15FF# => romdata <= X"962351E0";
when 16#1600# => romdata <= X"EB07F9ED";
when 16#1601# => romdata <= X"F03596AD";
when 16#1602# => romdata <= X"C2A3B7EB";
when 16#1603# => romdata <= X"6DB1CFC9";
when 16#1604# => romdata <= X"11E9A4C4";
when 16#1605# => romdata <= X"2336A573";
when 16#1606# => romdata <= X"09F7B6C3";
when 16#1607# => romdata <= X"389282E5";
when 16#1608# => romdata <= X"57D94BCC";
when 16#1609# => romdata <= X"71827D7C";
when 16#160A# => romdata <= X"5737B1C5";
when 16#160B# => romdata <= X"30D2A087";
when 16#160C# => romdata <= X"E3F50724";
when 16#160D# => romdata <= X"2F3DA5BD";
when 16#160E# => romdata <= X"1BBCA4DF";
when 16#160F# => romdata <= X"8B78BEEC";
when 16#1610# => romdata <= X"1DBF7EBB";
when 16#1611# => romdata <= X"2EA1CF1D";
when 16#1612# => romdata <= X"FA79E607";
when 16#1613# => romdata <= X"85BAFA23";
when 16#1614# => romdata <= X"658490C9";
when 16#1615# => romdata <= X"A64AC61C";
when 16#1616# => romdata <= X"45779DFA";
when 16#1617# => romdata <= X"FC6C55CB";
when 16#1618# => romdata <= X"5C9FE457";
when 16#1619# => romdata <= X"BF47E45A";
when 16#161A# => romdata <= X"3FEF092E";
when 16#161B# => romdata <= X"178ED449";
when 16#161C# => romdata <= X"5C0357B4";
when 16#161D# => romdata <= X"59E95AAC";
when 16#161E# => romdata <= X"82132FF1";
when 16#161F# => romdata <= X"C8044F4E";
when 16#1620# => romdata <= X"C84EB882";
when 16#1621# => romdata <= X"DC195D9C";
when 16#1622# => romdata <= X"E996B1CC";
when 16#1623# => romdata <= X"F523098E";
when 16#1624# => romdata <= X"9E1A57C3";
when 16#1625# => romdata <= X"7C2E2D0A";
when 16#1626# => romdata <= X"CB0EAA34";
when 16#1627# => romdata <= X"B0B56FE5";
when 16#1628# => romdata <= X"A0747130";
when 16#1629# => romdata <= X"B1E75AA9";
when 16#162A# => romdata <= X"23F6F94C";
when 16#162B# => romdata <= X"0D024A7F";
when 16#162C# => romdata <= X"CD22E7A4";
when 16#162D# => romdata <= X"ED8B2019";
when 16#162E# => romdata <= X"66C417AE";
when 16#162F# => romdata <= X"86442076";
when 16#1630# => romdata <= X"7AB3223B";
when 16#1631# => romdata <= X"FF56C64D";
when 16#1632# => romdata <= X"4F8F557D";
when 16#1633# => romdata <= X"D950F7C5";
when 16#1634# => romdata <= X"0D9A39AB";
when 16#1635# => romdata <= X"2C742CE6";
when 16#1636# => romdata <= X"86C8F92B";
when 16#1637# => romdata <= X"35711904";
when 16#1638# => romdata <= X"C600A9D4";
when 16#1639# => romdata <= X"D3DD83F3";
when 16#163A# => romdata <= X"DF1ED7DB";
when 16#163B# => romdata <= X"8042C76B";
when 16#163C# => romdata <= X"0B7D5D9B";
when 16#163D# => romdata <= X"CD6E0B55";
when 16#163E# => romdata <= X"24184BF9";
when 16#163F# => romdata <= X"9D8D0B4F";
when 16#1640# => romdata <= X"14967FA4";
when 16#1641# => romdata <= X"8A93A2F4";
when 16#1642# => romdata <= X"4E2275ED";
when 16#1643# => romdata <= X"7E59F399";
when 16#1644# => romdata <= X"1EFB0CBF";
when 16#1645# => romdata <= X"2E26AC1F";
when 16#1646# => romdata <= X"8D9A41AA";
when 16#1647# => romdata <= X"E4563179";
when 16#1648# => romdata <= X"254BA370";
when 16#1649# => romdata <= X"28867E68";
when 16#164A# => romdata <= X"C8179454";
when 16#164B# => romdata <= X"B8B71FAB";
when 16#164C# => romdata <= X"49DBD1F8";
when 16#164D# => romdata <= X"89104CFB";
when 16#164E# => romdata <= X"64C81211";
when 16#164F# => romdata <= X"51364BDB";
when 16#1650# => romdata <= X"64BAF854";
when 16#1651# => romdata <= X"B0DA22B8";
when 16#1652# => romdata <= X"620BD7EE";
when 16#1653# => romdata <= X"3D4302A8";
when 16#1654# => romdata <= X"8A115F8B";
when 16#1655# => romdata <= X"FBA649CA";
when 16#1656# => romdata <= X"A9EE7EF5";
when 16#1657# => romdata <= X"BC95CFAB";
when 16#1658# => romdata <= X"26503A9D";
when 16#1659# => romdata <= X"26033370";
when 16#165A# => romdata <= X"A4EF3CB8";
when 16#165B# => romdata <= X"A5D094C6";
when 16#165C# => romdata <= X"3305A833";
when 16#165D# => romdata <= X"387B4F83";
when 16#165E# => romdata <= X"71C6FE19";
when 16#165F# => romdata <= X"87514BB4";
when 16#1660# => romdata <= X"58C571E6";
when 16#1661# => romdata <= X"CB5DF5FC";
when 16#1662# => romdata <= X"90063165";
when 16#1663# => romdata <= X"2D3FA444";
when 16#1664# => romdata <= X"4F8F1F03";
when 16#1665# => romdata <= X"12204340";
when 16#1666# => romdata <= X"FDB2092F";
when 16#1667# => romdata <= X"709FDC51";
when 16#1668# => romdata <= X"D2680753";
when 16#1669# => romdata <= X"131ABC33";
when 16#166A# => romdata <= X"712B4F10";
when 16#166B# => romdata <= X"67EA1CC8";
when 16#166C# => romdata <= X"7C40B281";
when 16#166D# => romdata <= X"E69209ED";
when 16#166E# => romdata <= X"EC42C22A";
when 16#166F# => romdata <= X"88950E9C";
when 16#1670# => romdata <= X"1CE8130D";
when 16#1671# => romdata <= X"A9291897";
when 16#1672# => romdata <= X"BF2D8D1D";
when 16#1673# => romdata <= X"10691174";
when 16#1674# => romdata <= X"3E7A9DA3";
when 16#1675# => romdata <= X"6220FA90";
when 16#1676# => romdata <= X"A02A34EB";
when 16#1677# => romdata <= X"0B285432";
when 16#1678# => romdata <= X"17839374";
when 16#1679# => romdata <= X"EBE79F40";
when 16#167A# => romdata <= X"B3B61223";
when 16#167B# => romdata <= X"6C902E4C";
when 16#167C# => romdata <= X"D05CE2E1";
when 16#167D# => romdata <= X"C07F3DA1";
when 16#167E# => romdata <= X"0E2AEE8E";
when 16#167F# => romdata <= X"387494E0";
when 16#1680# => romdata <= X"E9D537A8";
when 16#1681# => romdata <= X"21DEDE52";
when 16#1682# => romdata <= X"6B441BA4";
when 16#1683# => romdata <= X"25278577";
when 16#1684# => romdata <= X"9B54DE76";
when 16#1685# => romdata <= X"F82747F8";
when 16#1686# => romdata <= X"607B8952";
when 16#1687# => romdata <= X"DF990F26";
when 16#1688# => romdata <= X"8C039CC7";
when 16#1689# => romdata <= X"92883B1C";
when 16#168A# => romdata <= X"76C297D8";
when 16#168B# => romdata <= X"1C6C0CF1";
when 16#168C# => romdata <= X"7DA8BA2C";
when 16#168D# => romdata <= X"71110B16";
when 16#168E# => romdata <= X"74172872";
when 16#168F# => romdata <= X"5839D33B";
when 16#1690# => romdata <= X"5942BC0A";
when 16#1691# => romdata <= X"5614A365";
when 16#1692# => romdata <= X"0675FDA5";
when 16#1693# => romdata <= X"D70F2915";
when 16#1694# => romdata <= X"4A429A42";
when 16#1695# => romdata <= X"819D6EDE";
when 16#1696# => romdata <= X"324C6459";
when 16#1697# => romdata <= X"6F93E84C";
when 16#1698# => romdata <= X"C9B2C9DA";
when 16#1699# => romdata <= X"3717AA6D";
when 16#169A# => romdata <= X"FFCD03B7";
when 16#169B# => romdata <= X"5AC96543";
when 16#169C# => romdata <= X"020A9F20";
when 16#169D# => romdata <= X"24620353";
when 16#169E# => romdata <= X"E1364E43";
when 16#169F# => romdata <= X"20FD4493";
when 16#16A0# => romdata <= X"3799FFF0";
when 16#16A1# => romdata <= X"83E73F5D";
when 16#16A2# => romdata <= X"20B83BF7";
when 16#16A3# => romdata <= X"7EC22479";
when 16#16A4# => romdata <= X"64ECE442";
when 16#16A5# => romdata <= X"C3213DE9";
when 16#16A6# => romdata <= X"9026F8FA";
when 16#16A7# => romdata <= X"F0E96302";
when 16#16A8# => romdata <= X"EC60067E";
when 16#16A9# => romdata <= X"A38C5CA0";
when 16#16AA# => romdata <= X"CD989475";
when 16#16AB# => romdata <= X"205FA388";
when 16#16AC# => romdata <= X"69E349FC";
when 16#16AD# => romdata <= X"7F79EB81";
when 16#16AE# => romdata <= X"F8457CA3";
when 16#16AF# => romdata <= X"D1A875A8";
when 16#16B0# => romdata <= X"D166C96E";
when 16#16B1# => romdata <= X"BAF1F39C";
when 16#16B2# => romdata <= X"88815E22";
when 16#16B3# => romdata <= X"58EA1A14";
when 16#16B4# => romdata <= X"943298DA";
when 16#16B5# => romdata <= X"39EB9B73";
when 16#16B6# => romdata <= X"8AAA4E00";
when 16#16B7# => romdata <= X"35F9567A";
when 16#16B8# => romdata <= X"0A9D5727";
when 16#16B9# => romdata <= X"85594496";
when 16#16BA# => romdata <= X"316D56EB";
when 16#16BB# => romdata <= X"3D39E1F3";
when 16#16BC# => romdata <= X"F243D4F1";
when 16#16BD# => romdata <= X"6111E194";
when 16#16BE# => romdata <= X"FC537A63";
when 16#16BF# => romdata <= X"5FAEB2FB";
when 16#16C0# => romdata <= X"4401CAA9";
when 16#16C1# => romdata <= X"EE0091CF";
when 16#16C2# => romdata <= X"3CB28B36";
when 16#16C3# => romdata <= X"6CB5446A";
when 16#16C4# => romdata <= X"6D3B10AB";
when 16#16C5# => romdata <= X"86B4B1A0";
when 16#16C6# => romdata <= X"714D107F";
when 16#16C7# => romdata <= X"CCBBD50E";
when 16#16C8# => romdata <= X"AE520D56";
when 16#16C9# => romdata <= X"A1161E03";
when 16#16CA# => romdata <= X"849192F5";
when 16#16CB# => romdata <= X"096346FB";
when 16#16CC# => romdata <= X"E5150B6D";
when 16#16CD# => romdata <= X"04025A56";
when 16#16CE# => romdata <= X"4A43A3D2";
when 16#16CF# => romdata <= X"2BD4B7E1";
when 16#16D0# => romdata <= X"0DD4061C";
when 16#16D1# => romdata <= X"E20FA2EC";
when 16#16D2# => romdata <= X"DD36F66B";
when 16#16D3# => romdata <= X"AAD7EA96";
when 16#16D4# => romdata <= X"CDBAA0F0";
when 16#16D5# => romdata <= X"63B81470";
when 16#16D6# => romdata <= X"7718F472";
when 16#16D7# => romdata <= X"78F8570F";
when 16#16D8# => romdata <= X"77F3B157";
when 16#16D9# => romdata <= X"99D0E354";
when 16#16DA# => romdata <= X"CCA50DAA";
when 16#16DB# => romdata <= X"38C31C74";
when 16#16DC# => romdata <= X"6B174822";
when 16#16DD# => romdata <= X"97D9C089";
when 16#16DE# => romdata <= X"FF379454";
when 16#16DF# => romdata <= X"FCCCB873";
when 16#16E0# => romdata <= X"0D89B146";
when 16#16E1# => romdata <= X"2AD95426";
when 16#16E2# => romdata <= X"370AC37D";
when 16#16E3# => romdata <= X"E50B775B";
when 16#16E4# => romdata <= X"952663B9";
when 16#16E5# => romdata <= X"7AFBC403";
when 16#16E6# => romdata <= X"F6F729BB";
when 16#16E7# => romdata <= X"9CC1D21D";
when 16#16E8# => romdata <= X"D89EE78A";
when 16#16E9# => romdata <= X"F09DF855";
when 16#16EA# => romdata <= X"8F7E68B3";
when 16#16EB# => romdata <= X"711A7D90";
when 16#16EC# => romdata <= X"75DD4754";
when 16#16ED# => romdata <= X"174802F5";
when 16#16EE# => romdata <= X"2CB9683F";
when 16#16EF# => romdata <= X"FE746471";
when 16#16F0# => romdata <= X"C7E543FF";
when 16#16F1# => romdata <= X"388D0243";
when 16#16F2# => romdata <= X"27D1866C";
when 16#16F3# => romdata <= X"C5CA6775";
when 16#16F4# => romdata <= X"C58A14D7";
when 16#16F5# => romdata <= X"0A3ECCD3";
when 16#16F6# => romdata <= X"EFAB52F9";
when 16#16F7# => romdata <= X"AE6CCE14";
when 16#16F8# => romdata <= X"6766A841";
when 16#16F9# => romdata <= X"9FB546E3";
when 16#16FA# => romdata <= X"9EB604F4";
when 16#16FB# => romdata <= X"3B15AB88";
when 16#16FC# => romdata <= X"C72741F8";
when 16#16FD# => romdata <= X"C7D0A7FE";
when 16#16FE# => romdata <= X"2F462D36";
when 16#16FF# => romdata <= X"0676D6E0";
when 16#1700# => romdata <= X"D79D9162";
when 16#1701# => romdata <= X"41BBE52B";
when 16#1702# => romdata <= X"61BE8210";
when 16#1703# => romdata <= X"A02543F7";
when 16#1704# => romdata <= X"5A47032E";
when 16#1705# => romdata <= X"9C0CC128";
when 16#1706# => romdata <= X"524A675E";
when 16#1707# => romdata <= X"94D8F79A";
when 16#1708# => romdata <= X"69B6842B";
when 16#1709# => romdata <= X"0C5CFF5C";
when 16#170A# => romdata <= X"1AC98D20";
when 16#170B# => romdata <= X"85299BDB";
when 16#170C# => romdata <= X"AEA67A41";
when 16#170D# => romdata <= X"C724CA36";
when 16#170E# => romdata <= X"B6275A80";
when 16#170F# => romdata <= X"D377DC3A";
when 16#1710# => romdata <= X"6EB4C8D0";
when 16#1711# => romdata <= X"B6B88241";
when 16#1712# => romdata <= X"334A9530";
when 16#1713# => romdata <= X"0B53FFB5";
when 16#1714# => romdata <= X"46163D28";
when 16#1715# => romdata <= X"89D7C85F";
when 16#1716# => romdata <= X"1D139792";
when 16#1717# => romdata <= X"4F126DA7";
when 16#1718# => romdata <= X"6085BEF1";
when 16#1719# => romdata <= X"31A65C7D";
when 16#171A# => romdata <= X"DF60DDF4";
when 16#171B# => romdata <= X"086BD33B";
when 16#171C# => romdata <= X"44D25025";
when 16#171D# => romdata <= X"D689FF41";
when 16#171E# => romdata <= X"E0C256EA";
when 16#171F# => romdata <= X"12F4353D";
when 16#1720# => romdata <= X"9E722EE3";
when 16#1721# => romdata <= X"7907AA8B";
when 16#1722# => romdata <= X"ED0A5A60";
when 16#1723# => romdata <= X"6333A031";
when 16#1724# => romdata <= X"AC6B9A16";
when 16#1725# => romdata <= X"61425091";
when 16#1726# => romdata <= X"6759B72F";
when 16#1727# => romdata <= X"E6C1828B";
when 16#1728# => romdata <= X"C6C1966C";
when 16#1729# => romdata <= X"9EBCD514";
when 16#172A# => romdata <= X"13A77F41";
when 16#172B# => romdata <= X"F808BCA2";
when 16#172C# => romdata <= X"534AC49D";
when 16#172D# => romdata <= X"B1D32D37";
when 16#172E# => romdata <= X"878DF5CC";
when 16#172F# => romdata <= X"0BEFCC09";
when 16#1730# => romdata <= X"9C56CAF5";
when 16#1731# => romdata <= X"0D8B92E7";
when 16#1732# => romdata <= X"CE616AA0";
when 16#1733# => romdata <= X"26EA1D81";
when 16#1734# => romdata <= X"DC7ABC17";
when 16#1735# => romdata <= X"C4705F9B";
when 16#1736# => romdata <= X"57A0F99F";
when 16#1737# => romdata <= X"A749F30F";
when 16#1738# => romdata <= X"93DFA982";
when 16#1739# => romdata <= X"A083EAE6";
when 16#173A# => romdata <= X"582C8461";
when 16#173B# => romdata <= X"A11ABA74";
when 16#173C# => romdata <= X"B11663ED";
when 16#173D# => romdata <= X"7D66EB4F";
when 16#173E# => romdata <= X"8DE14F09";
when 16#173F# => romdata <= X"0EB1CA6D";
when 16#1740# => romdata <= X"8D81CB6B";
when 16#1741# => romdata <= X"063A391F";
when 16#1742# => romdata <= X"D354DCEA";
when 16#1743# => romdata <= X"F7DB71C2";
when 16#1744# => romdata <= X"77D0E92B";
when 16#1745# => romdata <= X"4B463873";
when 16#1746# => romdata <= X"DCBEFFB6";
when 16#1747# => romdata <= X"98BDCA17";
when 16#1748# => romdata <= X"F80845EF";
when 16#1749# => romdata <= X"D5F0FF15";
when 16#174A# => romdata <= X"0ADDC9D7";
when 16#174B# => romdata <= X"797E21E4";
when 16#174C# => romdata <= X"279B54BD";
when 16#174D# => romdata <= X"D4B7C9D4";
when 16#174E# => romdata <= X"03D9FA61";
when 16#174F# => romdata <= X"01604B79";
when 16#1750# => romdata <= X"AC377780";
when 16#1751# => romdata <= X"A5461499";
when 16#1752# => romdata <= X"71408294";
when 16#1753# => romdata <= X"2313CF74";
when 16#1754# => romdata <= X"AD1147CD";
when 16#1755# => romdata <= X"10571A31";
when 16#1756# => romdata <= X"D82871B6";
when 16#1757# => romdata <= X"B3A055D5";
when 16#1758# => romdata <= X"0C6CDA4B";
when 16#1759# => romdata <= X"DDF3871F";
when 16#175A# => romdata <= X"41EFDAEB";
when 16#175B# => romdata <= X"E8ABB995";
when 16#175C# => romdata <= X"344DB636";
when 16#175D# => romdata <= X"6E35C6E5";
when 16#175E# => romdata <= X"06907AD7";
when 16#175F# => romdata <= X"FC76632F";
when 16#1760# => romdata <= X"99124A58";
when 16#1761# => romdata <= X"A32C8636";
when 16#1762# => romdata <= X"0FD6DDBF";
when 16#1763# => romdata <= X"50324D86";
when 16#1764# => romdata <= X"694518AC";
when 16#1765# => romdata <= X"44F1FA19";
when 16#1766# => romdata <= X"662C0EF0";
when 16#1767# => romdata <= X"C0860811";
when 16#1768# => romdata <= X"B5B976A9";
when 16#1769# => romdata <= X"6EC2A144";
when 16#176A# => romdata <= X"9E53A7E4";
when 16#176B# => romdata <= X"A07923E9";
when 16#176C# => romdata <= X"F85794F2";
when 16#176D# => romdata <= X"28E441D9";
when 16#176E# => romdata <= X"2903922E";
when 16#176F# => romdata <= X"5783F2FA";
when 16#1770# => romdata <= X"21C67725";
when 16#1771# => romdata <= X"1B6B8DB0";
when 16#1772# => romdata <= X"2AC2E242";
when 16#1773# => romdata <= X"C0C8652E";
when 16#1774# => romdata <= X"0C17C9E3";
when 16#1775# => romdata <= X"858E52DE";
when 16#1776# => romdata <= X"78DC712B";
when 16#1777# => romdata <= X"2DD5D2AF";
when 16#1778# => romdata <= X"9A42DB2E";
when 16#1779# => romdata <= X"2BEB3FB6";
when 16#177A# => romdata <= X"E0FFF13D";
when 16#177B# => romdata <= X"B9A1E02C";
when 16#177C# => romdata <= X"8F84FCEF";
when 16#177D# => romdata <= X"3F7C4D2D";
when 16#177E# => romdata <= X"DC09F2A2";
when 16#177F# => romdata <= X"813E8C20";
when 16#1780# => romdata <= X"F8E2DACD";
when 16#1781# => romdata <= X"D88277D4";
when 16#1782# => romdata <= X"82951555";
when 16#1783# => romdata <= X"C657B3E3";
when 16#1784# => romdata <= X"C5DB79E5";
when 16#1785# => romdata <= X"A43500F7";
when 16#1786# => romdata <= X"A2C8B30C";
when 16#1787# => romdata <= X"854DBE61";
when 16#1788# => romdata <= X"1FAC1087";
when 16#1789# => romdata <= X"FA03D439";
when 16#178A# => romdata <= X"AC4635D3";
when 16#178B# => romdata <= X"9211E234";
when 16#178C# => romdata <= X"B82A9124";
when 16#178D# => romdata <= X"8DEE5D4F";
when 16#178E# => romdata <= X"E67A02D5";
when 16#178F# => romdata <= X"AE25C676";
when 16#1790# => romdata <= X"E64C4843";
when 16#1791# => romdata <= X"E419EBB3";
when 16#1792# => romdata <= X"C4D81FB6";
when 16#1793# => romdata <= X"06B9CA08";
when 16#1794# => romdata <= X"36F8207C";
when 16#1795# => romdata <= X"D19D106C";
when 16#1796# => romdata <= X"0E287EFD";
when 16#1797# => romdata <= X"8F8DB5C1";
when 16#1798# => romdata <= X"A3A22886";
when 16#1799# => romdata <= X"C2765FED";
when 16#179A# => romdata <= X"26B51891";
when 16#179B# => romdata <= X"53657B7C";
when 16#179C# => romdata <= X"47D5590F";
when 16#179D# => romdata <= X"11C63400";
when 16#179E# => romdata <= X"67B80066";
when 16#179F# => romdata <= X"9B05A084";
when 16#17A0# => romdata <= X"9BCD2005";
when 16#17A1# => romdata <= X"DFEE6DF9";
when 16#17A2# => romdata <= X"5833C9E9";
when 16#17A3# => romdata <= X"4328D72F";
when 16#17A4# => romdata <= X"931D69CF";
when 16#17A5# => romdata <= X"BB2BDA81";
when 16#17A6# => romdata <= X"AC83DD66";
when 16#17A7# => romdata <= X"0B3B17D2";
when 16#17A8# => romdata <= X"BA402349";
when 16#17A9# => romdata <= X"1DED324F";
when 16#17AA# => romdata <= X"C4F22510";
when 16#17AB# => romdata <= X"ECA4A519";
when 16#17AC# => romdata <= X"4B1245F4";
when 16#17AD# => romdata <= X"F3FE334D";
when 16#17AE# => romdata <= X"A9C1E6BF";
when 16#17AF# => romdata <= X"83A3FB30";
when 16#17B0# => romdata <= X"897BE54C";
when 16#17B1# => romdata <= X"688D2A7C";
when 16#17B2# => romdata <= X"5845F425";
when 16#17B3# => romdata <= X"866F25DD";
when 16#17B4# => romdata <= X"0A9852BA";
when 16#17B5# => romdata <= X"6DAAF843";
when 16#17B6# => romdata <= X"7DD80BCC";
when 16#17B7# => romdata <= X"72B3E258";
when 16#17B8# => romdata <= X"A906DE07";
when 16#17B9# => romdata <= X"9A2D33EC";
when 16#17BA# => romdata <= X"5C5F6927";
when 16#17BB# => romdata <= X"503BA131";
when 16#17BC# => romdata <= X"58305DFF";
when 16#17BD# => romdata <= X"D3F86345";
when 16#17BE# => romdata <= X"52439415";
when 16#17BF# => romdata <= X"1AA557D6";
when 16#17C0# => romdata <= X"242060F2";
when 16#17C1# => romdata <= X"76BB6BB2";
when 16#17C2# => romdata <= X"5586F632";
when 16#17C3# => romdata <= X"942ACF5E";
when 16#17C4# => romdata <= X"0883CD3F";
when 16#17C5# => romdata <= X"8393688F";
when 16#17C6# => romdata <= X"360323A0";
when 16#17C7# => romdata <= X"00B82BD8";
when 16#17C8# => romdata <= X"9414E9C8";
when 16#17C9# => romdata <= X"07994B02";
when 16#17CA# => romdata <= X"34D730BC";
when 16#17CB# => romdata <= X"6D7CD0A2";
when 16#17CC# => romdata <= X"BF75D9F5";
when 16#17CD# => romdata <= X"10786E83";
when 16#17CE# => romdata <= X"EE98D4CA";
when 16#17CF# => romdata <= X"CF20EFF8";
when 16#17D0# => romdata <= X"6EE9C38B";
when 16#17D1# => romdata <= X"8D52455D";
when 16#17D2# => romdata <= X"8A694B68";
when 16#17D3# => romdata <= X"9F0D9A63";
when 16#17D4# => romdata <= X"2E7A6AC6";
when 16#17D5# => romdata <= X"675E190A";
when 16#17D6# => romdata <= X"12ADD716";
when 16#17D7# => romdata <= X"D2C63226";
when 16#17D8# => romdata <= X"57B878FA";
when 16#17D9# => romdata <= X"97267C1B";
when 16#17DA# => romdata <= X"A4631584";
when 16#17DB# => romdata <= X"356768EB";
when 16#17DC# => romdata <= X"BD1F13FD";
when 16#17DD# => romdata <= X"2F37EBDC";
when 16#17DE# => romdata <= X"D1DF96FB";
when 16#17DF# => romdata <= X"943942E8";
when 16#17E0# => romdata <= X"A5188666";
when 16#17E1# => romdata <= X"235B455B";
when 16#17E2# => romdata <= X"E2F770C9";
when 16#17E3# => romdata <= X"759A8F07";
when 16#17E4# => romdata <= X"0971CBA4";
when 16#17E5# => romdata <= X"9789744F";
when 16#17E6# => romdata <= X"D2F64DC4";
when 16#17E7# => romdata <= X"DC6E003B";
when 16#17E8# => romdata <= X"3F9BEC76";
when 16#17E9# => romdata <= X"17C7EEDF";
when 16#17EA# => romdata <= X"6BACA94D";
when 16#17EB# => romdata <= X"37440049";
when 16#17EC# => romdata <= X"9CA6813C";
when 16#17ED# => romdata <= X"90A03DFE";
when 16#17EE# => romdata <= X"2C537261";
when 16#17EF# => romdata <= X"DA93A1C0";
when 16#17F0# => romdata <= X"F6D8BA93";
when 16#17F1# => romdata <= X"D1EB5FB1";
when 16#17F2# => romdata <= X"7255DF28";
when 16#17F3# => romdata <= X"B7873758";
when 16#17F4# => romdata <= X"2FD675D0";
when 16#17F5# => romdata <= X"56A4C474";
when 16#17F6# => romdata <= X"A71CA8EF";
when 16#17F7# => romdata <= X"0D77BAEB";
when 16#17F8# => romdata <= X"E5637711";
when 16#17F9# => romdata <= X"AEA3FF2B";
when 16#17FA# => romdata <= X"01470044";
when 16#17FB# => romdata <= X"8C3D74E3";
when 16#17FC# => romdata <= X"DF264D77";
when 16#17FD# => romdata <= X"3360F45C";
when 16#17FE# => romdata <= X"CC334298";
when 16#17FF# => romdata <= X"7169C9A0";
when 16#1800# => romdata <= X"94741D7F";
when 16#1801# => romdata <= X"05B0CA50";
when 16#1802# => romdata <= X"908E6BC1";
when 16#1803# => romdata <= X"4801A28E";
when 16#1804# => romdata <= X"353551F0";
when 16#1805# => romdata <= X"1769451B";
when 16#1806# => romdata <= X"1482FAD0";
when 16#1807# => romdata <= X"043D5C72";
when 16#1808# => romdata <= X"331246D9";
when 16#1809# => romdata <= X"AC3344F0";
when 16#180A# => romdata <= X"FA2E28FD";
when 16#180B# => romdata <= X"00E86B38";
when 16#180C# => romdata <= X"F5E0452F";
when 16#180D# => romdata <= X"46CA111E";
when 16#180E# => romdata <= X"92D01B37";
when 16#180F# => romdata <= X"E966455D";
when 16#1810# => romdata <= X"F1374883";
when 16#1811# => romdata <= X"DB8B055C";
when 16#1812# => romdata <= X"4DF25B42";
when 16#1813# => romdata <= X"182280F8";
when 16#1814# => romdata <= X"6D0D825C";
when 16#1815# => romdata <= X"096018D2";
when 16#1816# => romdata <= X"949B4BFC";
when 16#1817# => romdata <= X"EB7BB2C8";
when 16#1818# => romdata <= X"A5BFA2C7";
when 16#1819# => romdata <= X"9E27F11A";
when 16#181A# => romdata <= X"7F9B43A5";
when 16#181B# => romdata <= X"0AF928D8";
when 16#181C# => romdata <= X"1FA95CEC";
when 16#181D# => romdata <= X"86A11422";
when 16#181E# => romdata <= X"2B997860";
when 16#181F# => romdata <= X"72311025";
when 16#1820# => romdata <= X"672AB04B";
when 16#1821# => romdata <= X"2593C5AF";
when 16#1822# => romdata <= X"50100B71";
when 16#1823# => romdata <= X"D052AE26";
when 16#1824# => romdata <= X"8FBA992B";
when 16#1825# => romdata <= X"F7868E58";
when 16#1826# => romdata <= X"EFCD07A2";
when 16#1827# => romdata <= X"4D211177";
when 16#1828# => romdata <= X"4A36115C";
when 16#1829# => romdata <= X"1C527B51";
when 16#182A# => romdata <= X"92EA9557";
when 16#182B# => romdata <= X"22EAE849";
when 16#182C# => romdata <= X"EF83817F";
when 16#182D# => romdata <= X"E8595C96";
when 16#182E# => romdata <= X"EA2D76FE";
when 16#182F# => romdata <= X"CF6476D8";
when 16#1830# => romdata <= X"9F65A262";
when 16#1831# => romdata <= X"D94B3F5E";
when 16#1832# => romdata <= X"89A5DE8B";
when 16#1833# => romdata <= X"1A7333EF";
when 16#1834# => romdata <= X"CDFDED17";
when 16#1835# => romdata <= X"FE1CCADE";
when 16#1836# => romdata <= X"BA0D1E7B";
when 16#1837# => romdata <= X"73E67491";
when 16#1838# => romdata <= X"B413A862";
when 16#1839# => romdata <= X"E34A308D";
when 16#183A# => romdata <= X"5C211787";
when 16#183B# => romdata <= X"E6ED8683";
when 16#183C# => romdata <= X"C6E1DDEB";
when 16#183D# => romdata <= X"8EE2D281";
when 16#183E# => romdata <= X"166C03E7";
when 16#183F# => romdata <= X"A72D7D7B";
when 16#1840# => romdata <= X"D8B878D0";
when 16#1841# => romdata <= X"7D2216C2";
when 16#1842# => romdata <= X"1B855CCD";
when 16#1843# => romdata <= X"A76B7B75";
when 16#1844# => romdata <= X"DD1B2CB8";
when 16#1845# => romdata <= X"76E59F91";
when 16#1846# => romdata <= X"F040D42B";
when 16#1847# => romdata <= X"97050043";
when 16#1848# => romdata <= X"499DCFFC";
when 16#1849# => romdata <= X"65AF803E";
when 16#184A# => romdata <= X"2F7455C9";
when 16#184B# => romdata <= X"669DD989";
when 16#184C# => romdata <= X"6FE1F622";
when 16#184D# => romdata <= X"27936DF9";
when 16#184E# => romdata <= X"05835A64";
when 16#184F# => romdata <= X"4D31130A";
when 16#1850# => romdata <= X"39479DE7";
when 16#1851# => romdata <= X"5B4DC436";
when 16#1852# => romdata <= X"1E41202D";
when 16#1853# => romdata <= X"51D50E0E";
when 16#1854# => romdata <= X"4B4B218A";
when 16#1855# => romdata <= X"F7F5CAF2";
when 16#1856# => romdata <= X"64DCD060";
when 16#1857# => romdata <= X"C296E777";
when 16#1858# => romdata <= X"DF1EED6A";
when 16#1859# => romdata <= X"E8147E9B";
when 16#185A# => romdata <= X"6CA73184";
when 16#185B# => romdata <= X"C345FBDD";
when 16#185C# => romdata <= X"89DE4A99";
when 16#185D# => romdata <= X"9C42AB46";
when 16#185E# => romdata <= X"81D9EA3B";
when 16#185F# => romdata <= X"86DD7503";
when 16#1860# => romdata <= X"1A33DCDC";
when 16#1861# => romdata <= X"807F8FB1";
when 16#1862# => romdata <= X"4EE0CE61";
when 16#1863# => romdata <= X"B16068AF";
when 16#1864# => romdata <= X"01CCE737";
when 16#1865# => romdata <= X"8C9D9659";
when 16#1866# => romdata <= X"43476AD2";
when 16#1867# => romdata <= X"1A469D8B";
when 16#1868# => romdata <= X"0CAE15BA";
when 16#1869# => romdata <= X"8FE04971";
when 16#186A# => romdata <= X"FE1EC61D";
when 16#186B# => romdata <= X"3AAD3386";
when 16#186C# => romdata <= X"DF71B33F";
when 16#186D# => romdata <= X"D0B4F324";
when 16#186E# => romdata <= X"F3DA518F";
when 16#186F# => romdata <= X"0CC03531";
when 16#1870# => romdata <= X"82B3D76C";
when 16#1871# => romdata <= X"F4EF5AB1";
when 16#1872# => romdata <= X"50FB9E74";
when 16#1873# => romdata <= X"C28234CB";
when 16#1874# => romdata <= X"3D907AC8";
when 16#1875# => romdata <= X"1CB6D3B9";
when 16#1876# => romdata <= X"9D510B48";
when 16#1877# => romdata <= X"1E1F0423";
when 16#1878# => romdata <= X"D6F4987F";
when 16#1879# => romdata <= X"5517ABBB";
when 16#187A# => romdata <= X"EEC07F46";
when 16#187B# => romdata <= X"AECEBA5F";
when 16#187C# => romdata <= X"15D91AEB";
when 16#187D# => romdata <= X"0FE91490";
when 16#187E# => romdata <= X"E91F739D";
when 16#187F# => romdata <= X"465225C0";
when 16#1880# => romdata <= X"839A0146";
when 16#1881# => romdata <= X"4B473A64";
when 16#1882# => romdata <= X"A3D1EA24";
when 16#1883# => romdata <= X"EB363EAA";
when 16#1884# => romdata <= X"A590F4BD";
when 16#1885# => romdata <= X"0E4492FE";
when 16#1886# => romdata <= X"C4E3D4DB";
when 16#1887# => romdata <= X"5883E487";
when 16#1888# => romdata <= X"3BBA1759";
when 16#1889# => romdata <= X"5FF48134";
when 16#188A# => romdata <= X"893F16F5";
when 16#188B# => romdata <= X"C4A43659";
when 16#188C# => romdata <= X"C46484A2";
when 16#188D# => romdata <= X"68C3303B";
when 16#188E# => romdata <= X"2DC345E8";
when 16#188F# => romdata <= X"C98FBBA6";
when 16#1890# => romdata <= X"D06946F9";
when 16#1891# => romdata <= X"97074AE1";
when 16#1892# => romdata <= X"5680EC94";
when 16#1893# => romdata <= X"23D64645";
when 16#1894# => romdata <= X"85D98804";
when 16#1895# => romdata <= X"B3541662";
when 16#1896# => romdata <= X"E183F654";
when 16#1897# => romdata <= X"0503BEC2";
when 16#1898# => romdata <= X"04749D58";
when 16#1899# => romdata <= X"E3DB9ECF";
when 16#189A# => romdata <= X"11C80CD3";
when 16#189B# => romdata <= X"A38F8D66";
when 16#189C# => romdata <= X"FFE6CC8A";
when 16#189D# => romdata <= X"003BDD35";
when 16#189E# => romdata <= X"F547E503";
when 16#189F# => romdata <= X"9DE9A21F";
when 16#18A0# => romdata <= X"70A8A07B";
when 16#18A1# => romdata <= X"2DD89B68";
when 16#18A2# => romdata <= X"E43B42C2";
when 16#18A3# => romdata <= X"E021A119";
when 16#18A4# => romdata <= X"09817C54";
when 16#18A5# => romdata <= X"3F839E68";
when 16#18A6# => romdata <= X"62268E38";
when 16#18A7# => romdata <= X"DCE712B4";
when 16#18A8# => romdata <= X"D49C39A5";
when 16#18A9# => romdata <= X"035F3D6B";
when 16#18AA# => romdata <= X"A19AE028";
when 16#18AB# => romdata <= X"AE70CCF5";
when 16#18AC# => romdata <= X"57720794";
when 16#18AD# => romdata <= X"FEF64429";
when 16#18AE# => romdata <= X"99E740CD";
when 16#18AF# => romdata <= X"6AFE6235";
when 16#18B0# => romdata <= X"F165515F";
when 16#18B1# => romdata <= X"DC24AB6F";
when 16#18B2# => romdata <= X"578DB254";
when 16#18B3# => romdata <= X"9C8065E0";
when 16#18B4# => romdata <= X"08577FCF";
when 16#18B5# => romdata <= X"8B8DD8A3";
when 16#18B6# => romdata <= X"BA679BAB";
when 16#18B7# => romdata <= X"BC9A747A";
when 16#18B8# => romdata <= X"4E2DABD9";
when 16#18B9# => romdata <= X"1501424E";
when 16#18BA# => romdata <= X"4191097E";
when 16#18BB# => romdata <= X"689A741E";
when 16#18BC# => romdata <= X"B6644A77";
when 16#18BD# => romdata <= X"1CABDBFE";
when 16#18BE# => romdata <= X"6B74ED3E";
when 16#18BF# => romdata <= X"D171DF8D";
when 16#18C0# => romdata <= X"E641C1D4";
when 16#18C1# => romdata <= X"2213B9D0";
when 16#18C2# => romdata <= X"F8CAD1E1";
when 16#18C3# => romdata <= X"1FF63670";
when 16#18C4# => romdata <= X"F5587F1F";
when 16#18C5# => romdata <= X"B7FF9227";
when 16#18C6# => romdata <= X"6AB48F31";
when 16#18C7# => romdata <= X"751E7A59";
when 16#18C8# => romdata <= X"1AF4F096";
when 16#18C9# => romdata <= X"6F390988";
when 16#18CA# => romdata <= X"3EE60156";
when 16#18CB# => romdata <= X"39671BDC";
when 16#18CC# => romdata <= X"3D137875";
when 16#18CD# => romdata <= X"0F66F5DD";
when 16#18CE# => romdata <= X"165912CF";
when 16#18CF# => romdata <= X"F1A54ED4";
when 16#18D0# => romdata <= X"63905404";
when 16#18D1# => romdata <= X"EB7D3412";
when 16#18D2# => romdata <= X"EE2B0F0D";
when 16#18D3# => romdata <= X"9E6B99EC";
when 16#18D4# => romdata <= X"81678ABC";
when 16#18D5# => romdata <= X"D1789BD8";
when 16#18D6# => romdata <= X"F1D72D3D";
when 16#18D7# => romdata <= X"F8754A16";
when 16#18D8# => romdata <= X"DC2106B8";
when 16#18D9# => romdata <= X"3B325807";
when 16#18DA# => romdata <= X"E27BCBD2";
when 16#18DB# => romdata <= X"2A25DAC3";
when 16#18DC# => romdata <= X"2F27EACA";
when 16#18DD# => romdata <= X"B6A4CB6C";
when 16#18DE# => romdata <= X"BA4CC90D";
when 16#18DF# => romdata <= X"5302BE5E";
when 16#18E0# => romdata <= X"9827B7AB";
when 16#18E1# => romdata <= X"48BB696B";
when 16#18E2# => romdata <= X"2902975C";
when 16#18E3# => romdata <= X"48B3A4BA";
when 16#18E4# => romdata <= X"4630B14E";
when 16#18E5# => romdata <= X"0FD8A050";
when 16#18E6# => romdata <= X"B0718C28";
when 16#18E7# => romdata <= X"29371BEC";
when 16#18E8# => romdata <= X"59738717";
when 16#18E9# => romdata <= X"2B0B3192";
when 16#18EA# => romdata <= X"EF958BD1";
when 16#18EB# => romdata <= X"F7977EF9";
when 16#18EC# => romdata <= X"A3A6C80D";
when 16#18ED# => romdata <= X"53BC9613";
when 16#18EE# => romdata <= X"15F97B71";
when 16#18EF# => romdata <= X"4253B973";
when 16#18F0# => romdata <= X"1A017BE2";
when 16#18F1# => romdata <= X"CA1D4302";
when 16#18F2# => romdata <= X"4F75E26B";
when 16#18F3# => romdata <= X"BE989C4D";
when 16#18F4# => romdata <= X"514D0153";
when 16#18F5# => romdata <= X"8956FE4B";
when 16#18F6# => romdata <= X"90BE17B3";
when 16#18F7# => romdata <= X"407B55BD";
when 16#18F8# => romdata <= X"08BA50FA";
when 16#18F9# => romdata <= X"807D0E44";
when 16#18FA# => romdata <= X"8B7CAC65";
when 16#18FB# => romdata <= X"EB3FF856";
when 16#18FC# => romdata <= X"772A933F";
when 16#18FD# => romdata <= X"0C5F3E6F";
when 16#18FE# => romdata <= X"41E05101";
when 16#18FF# => romdata <= X"5C6F9B80";
when 16#1900# => romdata <= X"BDA2B72F";
when 16#1901# => romdata <= X"0BB02652";
when 16#1902# => romdata <= X"69F19820";
when 16#1903# => romdata <= X"7FB061DA";
when 16#1904# => romdata <= X"29DE43E3";
when 16#1905# => romdata <= X"0847E7C0";
when 16#1906# => romdata <= X"62A581A7";
when 16#1907# => romdata <= X"EB53491E";
when 16#1908# => romdata <= X"A51B51ED";
when 16#1909# => romdata <= X"D36F991D";
when 16#190A# => romdata <= X"15AF89AB";
when 16#190B# => romdata <= X"53198537";
when 16#190C# => romdata <= X"988350FD";
when 16#190D# => romdata <= X"5FDF8E00";
when 16#190E# => romdata <= X"3019BE11";
when 16#190F# => romdata <= X"5840B9BA";
when 16#1910# => romdata <= X"55C238C3";
when 16#1911# => romdata <= X"CBC72C0E";
when 16#1912# => romdata <= X"24E25090";
when 16#1913# => romdata <= X"A3D6A59B";
when 16#1914# => romdata <= X"EA9FED0F";
when 16#1915# => romdata <= X"AC9EAD40";
when 16#1916# => romdata <= X"451A9564";
when 16#1917# => romdata <= X"9638FE0B";
when 16#1918# => romdata <= X"B0F8FFE6";
when 16#1919# => romdata <= X"1AF5B9A8";
when 16#191A# => romdata <= X"AB84BE84";
when 16#191B# => romdata <= X"C65EA1E1";
when 16#191C# => romdata <= X"2E9F6650";
when 16#191D# => romdata <= X"ADB59A82";
when 16#191E# => romdata <= X"4E608E80";
when 16#191F# => romdata <= X"D1FC3AC1";
when 16#1920# => romdata <= X"9F418169";
when 16#1921# => romdata <= X"B3879CC9";
when 16#1922# => romdata <= X"46165511";
when 16#1923# => romdata <= X"D5AA280A";
when 16#1924# => romdata <= X"E644AF36";
when 16#1925# => romdata <= X"0C42F7A3";
when 16#1926# => romdata <= X"EEDF27E3";
when 16#1927# => romdata <= X"68E46480";
when 16#1928# => romdata <= X"E3353E67";
when 16#1929# => romdata <= X"F536E02B";
when 16#192A# => romdata <= X"33505341";
when 16#192B# => romdata <= X"BAF39410";
when 16#192C# => romdata <= X"69567B72";
when 16#192D# => romdata <= X"3D7C125C";
when 16#192E# => romdata <= X"8F066F9A";
when 16#192F# => romdata <= X"6255436A";
when 16#1930# => romdata <= X"AFDCAA8C";
when 16#1931# => romdata <= X"554FDAFB";
when 16#1932# => romdata <= X"0A9AAD91";
when 16#1933# => romdata <= X"F1263DC6";
when 16#1934# => romdata <= X"2EF91A74";
when 16#1935# => romdata <= X"8FFB29F5";
when 16#1936# => romdata <= X"7E325D65";
when 16#1937# => romdata <= X"A38ECB4F";
when 16#1938# => romdata <= X"2851923D";
when 16#1939# => romdata <= X"C6E9B729";
when 16#193A# => romdata <= X"6064148A";
when 16#193B# => romdata <= X"9BA2D938";
when 16#193C# => romdata <= X"116266C5";
when 16#193D# => romdata <= X"97D9E1F1";
when 16#193E# => romdata <= X"1A46BE0E";
when 16#193F# => romdata <= X"F526225B";
when 16#1940# => romdata <= X"E750F0F3";
when 16#1941# => romdata <= X"E5B0AEB7";
when 16#1942# => romdata <= X"DC2140FA";
when 16#1943# => romdata <= X"3A48B723";
when 16#1944# => romdata <= X"8D0F5A87";
when 16#1945# => romdata <= X"2000782C";
when 16#1946# => romdata <= X"B6F77514";
when 16#1947# => romdata <= X"43EC6A1B";
when 16#1948# => romdata <= X"7FA1ED02";
when 16#1949# => romdata <= X"B9ABCD1C";
when 16#194A# => romdata <= X"1DE4FC85";
when 16#194B# => romdata <= X"E9B405C7";
when 16#194C# => romdata <= X"851913C6";
when 16#194D# => romdata <= X"0F85582B";
when 16#194E# => romdata <= X"1529276A";
when 16#194F# => romdata <= X"D475AE52";
when 16#1950# => romdata <= X"BD8115B6";
when 16#1951# => romdata <= X"E73A5350";
when 16#1952# => romdata <= X"6E7A0244";
when 16#1953# => romdata <= X"E1C29BCE";
when 16#1954# => romdata <= X"F4CF20CF";
when 16#1955# => romdata <= X"DF883392";
when 16#1956# => romdata <= X"BB3990BE";
when 16#1957# => romdata <= X"2A11B321";
when 16#1958# => romdata <= X"3B68EC4A";
when 16#1959# => romdata <= X"166C77D7";
when 16#195A# => romdata <= X"24CFAEBD";
when 16#195B# => romdata <= X"C34C45ED";
when 16#195C# => romdata <= X"09848A99";
when 16#195D# => romdata <= X"4BCE1FF6";
when 16#195E# => romdata <= X"A9BB80C7";
when 16#195F# => romdata <= X"F5CA8FD4";
when 16#1960# => romdata <= X"4D3FDF8D";
when 16#1961# => romdata <= X"EC8BA655";
when 16#1962# => romdata <= X"2C234EF8";
when 16#1963# => romdata <= X"DC52382D";
when 16#1964# => romdata <= X"52D2B01B";
when 16#1965# => romdata <= X"B23404FC";
when 16#1966# => romdata <= X"453725C7";
when 16#1967# => romdata <= X"C9269A78";
when 16#1968# => romdata <= X"5FE09C71";
when 16#1969# => romdata <= X"2D4ADE70";
when 16#196A# => romdata <= X"72B66295";
when 16#196B# => romdata <= X"CA0C6405";
when 16#196C# => romdata <= X"D9859E13";
when 16#196D# => romdata <= X"4FBBD373";
when 16#196E# => romdata <= X"7F2956DD";
when 16#196F# => romdata <= X"1D718A9F";
when 16#1970# => romdata <= X"8242CE95";
when 16#1971# => romdata <= X"BDB1E49F";
when 16#1972# => romdata <= X"265EBF19";
when 16#1973# => romdata <= X"976BC46E";
when 16#1974# => romdata <= X"29F7DE0E";
when 16#1975# => romdata <= X"E5C89A43";
when 16#1976# => romdata <= X"AF2E1075";
when 16#1977# => romdata <= X"88A46E1B";
when 16#1978# => romdata <= X"6762E6F8";
when 16#1979# => romdata <= X"E48B8FC4";
when 16#197A# => romdata <= X"F4FF93EC";
when 16#197B# => romdata <= X"60938B8E";
when 16#197C# => romdata <= X"5C371902";
when 16#197D# => romdata <= X"2C750C43";
when 16#197E# => romdata <= X"09FC62AD";
when 16#197F# => romdata <= X"A4E90280";
when 16#1980# => romdata <= X"D240216C";
when 16#1981# => romdata <= X"5C4A7074";
when 16#1982# => romdata <= X"2CAA03AE";
when 16#1983# => romdata <= X"910E8859";
when 16#1984# => romdata <= X"C92E5A90";
when 16#1985# => romdata <= X"A352CB8B";
when 16#1986# => romdata <= X"45847BAC";
when 16#1987# => romdata <= X"7793E1F7";
when 16#1988# => romdata <= X"5720D449";
when 16#1989# => romdata <= X"19E896AD";
when 16#198A# => romdata <= X"4581E1FD";
when 16#198B# => romdata <= X"83986FF2";
when 16#198C# => romdata <= X"35C9834B";
when 16#198D# => romdata <= X"EECAA155";
when 16#198E# => romdata <= X"6794BE49";
when 16#198F# => romdata <= X"033E79D4";
when 16#1990# => romdata <= X"CCDB4DC6";
when 16#1991# => romdata <= X"7C5200E8";
when 16#1992# => romdata <= X"B6A3EE89";
when 16#1993# => romdata <= X"1E700B34";
when 16#1994# => romdata <= X"8CBF092E";
when 16#1995# => romdata <= X"4D3FA5E6";
when 16#1996# => romdata <= X"48B620E3";
when 16#1997# => romdata <= X"4E491D7B";
when 16#1998# => romdata <= X"628A1FE7";
when 16#1999# => romdata <= X"E2C45586";
when 16#199A# => romdata <= X"B6577E50";
when 16#199B# => romdata <= X"788687F0";
when 16#199C# => romdata <= X"858C10F7";
when 16#199D# => romdata <= X"8F371B25";
when 16#199E# => romdata <= X"C712ED27";
when 16#199F# => romdata <= X"60C3D605";
when 16#19A0# => romdata <= X"D4ED4F05";
when 16#19A1# => romdata <= X"2E8B66FC";
when 16#19A2# => romdata <= X"308D3ADD";
when 16#19A3# => romdata <= X"4A9B86F0";
when 16#19A4# => romdata <= X"0CE4257E";
when 16#19A5# => romdata <= X"ED085EAE";
when 16#19A6# => romdata <= X"95FBB1E1";
when 16#19A7# => romdata <= X"13FCB42C";
when 16#19A8# => romdata <= X"E12BB607";
when 16#19A9# => romdata <= X"6178A209";
when 16#19AA# => romdata <= X"03C55DA5";
when 16#19AB# => romdata <= X"70EF8A25";
when 16#19AC# => romdata <= X"BA7AC8B7";
when 16#19AD# => romdata <= X"E134B8D4";
when 16#19AE# => romdata <= X"E35AB172";
when 16#19AF# => romdata <= X"CA33CC97";
when 16#19B0# => romdata <= X"294A5E7E";
when 16#19B1# => romdata <= X"579B9361";
when 16#19B2# => romdata <= X"B92B49B6";
when 16#19B3# => romdata <= X"3BB19827";
when 16#19B4# => romdata <= X"40015DFE";
when 16#19B5# => romdata <= X"C1688298";
when 16#19B6# => romdata <= X"9C917F50";
when 16#19B7# => romdata <= X"D5FDD916";
when 16#19B8# => romdata <= X"6FE1001F";
when 16#19B9# => romdata <= X"3282D3C5";
when 16#19BA# => romdata <= X"4A28AC7F";
when 16#19BB# => romdata <= X"D773CCC0";
when 16#19BC# => romdata <= X"634AF7CD";
when 16#19BD# => romdata <= X"F225F941";
when 16#19BE# => romdata <= X"07C169D2";
when 16#19BF# => romdata <= X"F2BB757E";
when 16#19C0# => romdata <= X"EB55933C";
when 16#19C1# => romdata <= X"CE0FF116";
when 16#19C2# => romdata <= X"D7FFBA99";
when 16#19C3# => romdata <= X"2F9A075A";
when 16#19C4# => romdata <= X"2439CCB3";
when 16#19C5# => romdata <= X"69D5B5DE";
when 16#19C6# => romdata <= X"460CADC9";
when 16#19C7# => romdata <= X"F8C81D98";
when 16#19C8# => romdata <= X"E71651AE";
when 16#19C9# => romdata <= X"BFC2A918";
when 16#19CA# => romdata <= X"C551082D";
when 16#19CB# => romdata <= X"85F75675";
when 16#19CC# => romdata <= X"CDC8CCA1";
when 16#19CD# => romdata <= X"D3E486CF";
when 16#19CE# => romdata <= X"FB3B025D";
when 16#19CF# => romdata <= X"27C8D67C";
when 16#19D0# => romdata <= X"451FDFCF";
when 16#19D1# => romdata <= X"59C3BFA1";
when 16#19D2# => romdata <= X"63EB7911";
when 16#19D3# => romdata <= X"52390E94";
when 16#19D4# => romdata <= X"88C604B9";
when 16#19D5# => romdata <= X"B8116C32";
when 16#19D6# => romdata <= X"9453A98F";
when 16#19D7# => romdata <= X"7A104527";
when 16#19D8# => romdata <= X"BC677411";
when 16#19D9# => romdata <= X"034CC496";
when 16#19DA# => romdata <= X"86108E56";
when 16#19DB# => romdata <= X"9B7595E1";
when 16#19DC# => romdata <= X"DDC85918";
when 16#19DD# => romdata <= X"D90BBCB3";
when 16#19DE# => romdata <= X"37855860";
when 16#19DF# => romdata <= X"D6E4718C";
when 16#19E0# => romdata <= X"0679DAB6";
when 16#19E1# => romdata <= X"982D23FC";
when 16#19E2# => romdata <= X"B6648E85";
when 16#19E3# => romdata <= X"61F44BCF";
when 16#19E4# => romdata <= X"9B052D8B";
when 16#19E5# => romdata <= X"58384523";
when 16#19E6# => romdata <= X"BC592C9B";
when 16#19E7# => romdata <= X"7F824B96";
when 16#19E8# => romdata <= X"AD1A39AE";
when 16#19E9# => romdata <= X"BD2232D6";
when 16#19EA# => romdata <= X"D34DC171";
when 16#19EB# => romdata <= X"E8FBF933";
when 16#19EC# => romdata <= X"900960F2";
when 16#19ED# => romdata <= X"07B55597";
when 16#19EE# => romdata <= X"759D23E1";
when 16#19EF# => romdata <= X"E7945075";
when 16#19F0# => romdata <= X"86114228";
when 16#19F1# => romdata <= X"A2FC100C";
when 16#19F2# => romdata <= X"C200D2B8";
when 16#19F3# => romdata <= X"62DF3F26";
when 16#19F4# => romdata <= X"E6D1C937";
when 16#19F5# => romdata <= X"0373FE16";
when 16#19F6# => romdata <= X"5C326D8C";
when 16#19F7# => romdata <= X"29FD2F0B";
when 16#19F8# => romdata <= X"3071AFD5";
when 16#19F9# => romdata <= X"215781BF";
when 16#19FA# => romdata <= X"B589F605";
when 16#19FB# => romdata <= X"263FF065";
when 16#19FC# => romdata <= X"B7A5CA3F";
when 16#19FD# => romdata <= X"6AA9DE3F";
when 16#19FE# => romdata <= X"D8BF5589";
when 16#19FF# => romdata <= X"BDE35260";
when 16#1A00# => romdata <= X"8E7752C5";
when 16#1A01# => romdata <= X"2805DD0A";
when 16#1A02# => romdata <= X"723D61F0";
when 16#1A03# => romdata <= X"BBE0122D";
when 16#1A04# => romdata <= X"F576A42B";
when 16#1A05# => romdata <= X"5AFDF9F1";
when 16#1A06# => romdata <= X"96A766C9";
when 16#1A07# => romdata <= X"B3BFE296";
when 16#1A08# => romdata <= X"DC16A892";
when 16#1A09# => romdata <= X"FAECEEDD";
when 16#1A0A# => romdata <= X"8256D2B1";
when 16#1A0B# => romdata <= X"AE6BFE54";
when 16#1A0C# => romdata <= X"37D4A269";
when 16#1A0D# => romdata <= X"1803043B";
when 16#1A0E# => romdata <= X"59862B30";
when 16#1A0F# => romdata <= X"D68E4FF9";
when 16#1A10# => romdata <= X"4A0700D7";
when 16#1A11# => romdata <= X"35CFE967";
when 16#1A12# => romdata <= X"299724DA";
when 16#1A13# => romdata <= X"9D680200";
when 16#1A14# => romdata <= X"C898EED1";
when 16#1A15# => romdata <= X"C785E7B8";
when 16#1A16# => romdata <= X"CEB14F1D";
when 16#1A17# => romdata <= X"CDC73FC6";
when 16#1A18# => romdata <= X"25F9678B";
when 16#1A19# => romdata <= X"40760358";
when 16#1A1A# => romdata <= X"7220C2FD";
when 16#1A1B# => romdata <= X"FE0A47E8";
when 16#1A1C# => romdata <= X"2ADF36C2";
when 16#1A1D# => romdata <= X"6F942797";
when 16#1A1E# => romdata <= X"D608BA6B";
when 16#1A1F# => romdata <= X"38A3AD1A";
when 16#1A20# => romdata <= X"967315E1";
when 16#1A21# => romdata <= X"F2D665B2";
when 16#1A22# => romdata <= X"7D51E350";
when 16#1A23# => romdata <= X"F075531A";
when 16#1A24# => romdata <= X"179DB2EE";
when 16#1A25# => romdata <= X"D55547EA";
when 16#1A26# => romdata <= X"61761CD2";
when 16#1A27# => romdata <= X"B3962FCB";
when 16#1A28# => romdata <= X"34727911";
when 16#1A29# => romdata <= X"7D1C7A75";
when 16#1A2A# => romdata <= X"74B49FFE";
when 16#1A2B# => romdata <= X"0991AF57";
when 16#1A2C# => romdata <= X"2A2B0C96";
when 16#1A2D# => romdata <= X"2A8A7980";
when 16#1A2E# => romdata <= X"0CFD524A";
when 16#1A2F# => romdata <= X"AF9E6401";
when 16#1A30# => romdata <= X"C4456960";
when 16#1A31# => romdata <= X"0F41F044";
when 16#1A32# => romdata <= X"22DB891D";
when 16#1A33# => romdata <= X"25B9F714";
when 16#1A34# => romdata <= X"713086BB";
when 16#1A35# => romdata <= X"FD0FB268";
when 16#1A36# => romdata <= X"E66A4FB1";
when 16#1A37# => romdata <= X"0C0ABEEB";
when 16#1A38# => romdata <= X"31D0FBFB";
when 16#1A39# => romdata <= X"A20B0E4F";
when 16#1A3A# => romdata <= X"FF404051";
when 16#1A3B# => romdata <= X"596FC6F6";
when 16#1A3C# => romdata <= X"C8093AD0";
when 16#1A3D# => romdata <= X"1807FA52";
when 16#1A3E# => romdata <= X"041CD330";
when 16#1A3F# => romdata <= X"07B205D1";
when 16#1A40# => romdata <= X"5D47AF73";
when 16#1A41# => romdata <= X"3966411A";
when 16#1A42# => romdata <= X"36F4C7B8";
when 16#1A43# => romdata <= X"46D0BE04";
when 16#1A44# => romdata <= X"9ADC21B8";
when 16#1A45# => romdata <= X"9EA4CE0F";
when 16#1A46# => romdata <= X"BA414C00";
when 16#1A47# => romdata <= X"5E66F36F";
when 16#1A48# => romdata <= X"ACF3C43B";
when 16#1A49# => romdata <= X"474D47DA";
when 16#1A4A# => romdata <= X"D78AC114";
when 16#1A4B# => romdata <= X"D0171C03";
when 16#1A4C# => romdata <= X"1DFBE4A1";
when 16#1A4D# => romdata <= X"5FE1A226";
when 16#1A4E# => romdata <= X"03CD79B6";
when 16#1A4F# => romdata <= X"BB448B67";
when 16#1A50# => romdata <= X"A4DEDC97";
when 16#1A51# => romdata <= X"262F7B86";
when 16#1A52# => romdata <= X"9C54F385";
when 16#1A53# => romdata <= X"F3682C74";
when 16#1A54# => romdata <= X"4ED5AD6C";
when 16#1A55# => romdata <= X"0B6E1679";
when 16#1A56# => romdata <= X"3920E6B4";
when 16#1A57# => romdata <= X"5A024010";
when 16#1A58# => romdata <= X"896D5FEC";
when 16#1A59# => romdata <= X"FA111CC9";
when 16#1A5A# => romdata <= X"F0C34E72";
when 16#1A5B# => romdata <= X"8B32F2C4";
when 16#1A5C# => romdata <= X"D45B8AA6";
when 16#1A5D# => romdata <= X"9B621AB9";
when 16#1A5E# => romdata <= X"AC3D9D79";
when 16#1A5F# => romdata <= X"B38BF205";
when 16#1A60# => romdata <= X"E8D0D19F";
when 16#1A61# => romdata <= X"AC44A76B";
when 16#1A62# => romdata <= X"9F564452";
when 16#1A63# => romdata <= X"6E06858F";
when 16#1A64# => romdata <= X"76B3EE2D";
when 16#1A65# => romdata <= X"74AEB197";
when 16#1A66# => romdata <= X"1D6B6E68";
when 16#1A67# => romdata <= X"B8377339";
when 16#1A68# => romdata <= X"9AC32203";
when 16#1A69# => romdata <= X"164564B1";
when 16#1A6A# => romdata <= X"02B26C37";
when 16#1A6B# => romdata <= X"0A9FEC67";
when 16#1A6C# => romdata <= X"3C285AE0";
when 16#1A6D# => romdata <= X"D1D3DF23";
when 16#1A6E# => romdata <= X"9D48B649";
when 16#1A6F# => romdata <= X"2B89846E";
when 16#1A70# => romdata <= X"BED4618A";
when 16#1A71# => romdata <= X"EC940DC6";
when 16#1A72# => romdata <= X"2AF4C3FF";
when 16#1A73# => romdata <= X"0D56FC9F";
when 16#1A74# => romdata <= X"BE23EE3B";
when 16#1A75# => romdata <= X"0A4890BA";
when 16#1A76# => romdata <= X"2665A88E";
when 16#1A77# => romdata <= X"9F40C4B6";
when 16#1A78# => romdata <= X"A770F963";
when 16#1A79# => romdata <= X"0234ED10";
when 16#1A7A# => romdata <= X"A3A7FF3C";
when 16#1A7B# => romdata <= X"5BCCBA83";
when 16#1A7C# => romdata <= X"6F3EDC8B";
when 16#1A7D# => romdata <= X"821AB18D";
when 16#1A7E# => romdata <= X"4B1D51D9";
when 16#1A7F# => romdata <= X"962C3280";
when 16#1A80# => romdata <= X"E682E9D8";
when 16#1A81# => romdata <= X"E92A7837";
when 16#1A82# => romdata <= X"823C9B77";
when 16#1A83# => romdata <= X"14D267F9";
when 16#1A84# => romdata <= X"CE290E9F";
when 16#1A85# => romdata <= X"A6CC0A84";
when 16#1A86# => romdata <= X"32D3F750";
when 16#1A87# => romdata <= X"7DAF6CF6";
when 16#1A88# => romdata <= X"81246AA4";
when 16#1A89# => romdata <= X"C2323C6B";
when 16#1A8A# => romdata <= X"53BCC6E5";
when 16#1A8B# => romdata <= X"3B31F497";
when 16#1A8C# => romdata <= X"42EE5F4E";
when 16#1A8D# => romdata <= X"6F79DC36";
when 16#1A8E# => romdata <= X"727E98B0";
when 16#1A8F# => romdata <= X"6D0300ED";
when 16#1A90# => romdata <= X"21F0CF5F";
when 16#1A91# => romdata <= X"2B51D830";
when 16#1A92# => romdata <= X"4A51D0B4";
when 16#1A93# => romdata <= X"98F4BFA3";
when 16#1A94# => romdata <= X"9C0049B8";
when 16#1A95# => romdata <= X"117DAD33";
when 16#1A96# => romdata <= X"4D4B2E37";
when 16#1A97# => romdata <= X"676EC42D";
when 16#1A98# => romdata <= X"FE0EED63";
when 16#1A99# => romdata <= X"B3726872";
when 16#1A9A# => romdata <= X"CCF9A102";
when 16#1A9B# => romdata <= X"23A8A456";
when 16#1A9C# => romdata <= X"3BE8AC26";
when 16#1A9D# => romdata <= X"6E069700";
when 16#1A9E# => romdata <= X"4921DCCE";
when 16#1A9F# => romdata <= X"EA5DD80C";
when 16#1AA0# => romdata <= X"62567FDE";
when 16#1AA1# => romdata <= X"BF2AFDF0";
when 16#1AA2# => romdata <= X"30192831";
when 16#1AA3# => romdata <= X"A6FD871F";
when 16#1AA4# => romdata <= X"63D5DADA";
when 16#1AA5# => romdata <= X"4B270AA9";
when 16#1AA6# => romdata <= X"EC0ACE47";
when 16#1AA7# => romdata <= X"E75BD190";
when 16#1AA8# => romdata <= X"18CB809B";
when 16#1AA9# => romdata <= X"548D4F2C";
when 16#1AAA# => romdata <= X"24831C38";
when 16#1AAB# => romdata <= X"4DD2B807";
when 16#1AAC# => romdata <= X"852F596B";
when 16#1AAD# => romdata <= X"D4FE32CA";
when 16#1AAE# => romdata <= X"B3A16899";
when 16#1AAF# => romdata <= X"D0B100E9";
when 16#1AB0# => romdata <= X"F96D06AA";
when 16#1AB1# => romdata <= X"CB8DA8D5";
when 16#1AB2# => romdata <= X"1DB0B0F6";
when 16#1AB3# => romdata <= X"00F3B614";
when 16#1AB4# => romdata <= X"461F5238";
when 16#1AB5# => romdata <= X"188B5EDA";
when 16#1AB6# => romdata <= X"68EA753B";
when 16#1AB7# => romdata <= X"6ACC5856";
when 16#1AB8# => romdata <= X"9E841BAF";
when 16#1AB9# => romdata <= X"92CEE04E";
when 16#1ABA# => romdata <= X"6E2626B1";
when 16#1ABB# => romdata <= X"FBD01B9B";
when 16#1ABC# => romdata <= X"67D1311B";
when 16#1ABD# => romdata <= X"1C3D6742";
when 16#1ABE# => romdata <= X"7298E2D1";
when 16#1ABF# => romdata <= X"93F0647E";
when 16#1AC0# => romdata <= X"A17D16FD";
when 16#1AC1# => romdata <= X"7FD6A40A";
when 16#1AC2# => romdata <= X"1BDBB320";
when 16#1AC3# => romdata <= X"A1F5FC64";
when 16#1AC4# => romdata <= X"B97759AF";
when 16#1AC5# => romdata <= X"4EA92AAE";
when 16#1AC6# => romdata <= X"B759B5DD";
when 16#1AC7# => romdata <= X"30A726E9";
when 16#1AC8# => romdata <= X"B8EAFA37";
when 16#1AC9# => romdata <= X"2FBD83CB";
when 16#1ACA# => romdata <= X"FF0000CA";
when 16#1ACB# => romdata <= X"75F219A9";
when 16#1ACC# => romdata <= X"5D6A3CDE";
when 16#1ACD# => romdata <= X"38B8DFA9";
when 16#1ACE# => romdata <= X"281609A2";
when 16#1ACF# => romdata <= X"0EE39B73";
when 16#1AD0# => romdata <= X"FEBDF6A1";
when 16#1AD1# => romdata <= X"55359476";
when 16#1AD2# => romdata <= X"D073E715";
when 16#1AD3# => romdata <= X"3BC918C1";
when 16#1AD4# => romdata <= X"191C9BAA";
when 16#1AD5# => romdata <= X"F0E0F161";
when 16#1AD6# => romdata <= X"384DAD8A";
when 16#1AD7# => romdata <= X"FC31A3FC";
when 16#1AD8# => romdata <= X"1E9EAFA4";
when 16#1AD9# => romdata <= X"95E22D18";
when 16#1ADA# => romdata <= X"C05194EB";
when 16#1ADB# => romdata <= X"85298AB0";
when 16#1ADC# => romdata <= X"F042E447";
when 16#1ADD# => romdata <= X"DD627904";
when 16#1ADE# => romdata <= X"B73E6E50";
when 16#1ADF# => romdata <= X"5712DF01";
when 16#1AE0# => romdata <= X"0531C88E";
when 16#1AE1# => romdata <= X"695F6510";
when 16#1AE2# => romdata <= X"C78B443C";
when 16#1AE3# => romdata <= X"731D7FDC";
when 16#1AE4# => romdata <= X"D62EB7C4";
when 16#1AE5# => romdata <= X"015AB5D5";
when 16#1AE6# => romdata <= X"30BD09CE";
when 16#1AE7# => romdata <= X"5229FA4D";
when 16#1AE8# => romdata <= X"C5642AF1";
when 16#1AE9# => romdata <= X"76C39D60";
when 16#1AEA# => romdata <= X"FE070DF6";
when 16#1AEB# => romdata <= X"35CC5435";
when 16#1AEC# => romdata <= X"136C7BB9";
when 16#1AED# => romdata <= X"C4DC83B0";
when 16#1AEE# => romdata <= X"D382B9BB";
when 16#1AEF# => romdata <= X"636A6C2B";
when 16#1AF0# => romdata <= X"38385429";
when 16#1AF1# => romdata <= X"04D53B86";
when 16#1AF2# => romdata <= X"2585FE6E";
when 16#1AF3# => romdata <= X"C8960A9A";
when 16#1AF4# => romdata <= X"77783D17";
when 16#1AF5# => romdata <= X"B2D90506";
when 16#1AF6# => romdata <= X"F5D60998";
when 16#1AF7# => romdata <= X"602AE543";
when 16#1AF8# => romdata <= X"0E86025C";
when 16#1AF9# => romdata <= X"8864883C";
when 16#1AFA# => romdata <= X"ECD7CE51";
when 16#1AFB# => romdata <= X"B49CC295";
when 16#1AFC# => romdata <= X"3A2A41D7";
when 16#1AFD# => romdata <= X"EF8027F1";
when 16#1AFE# => romdata <= X"A83815BB";
when 16#1AFF# => romdata <= X"EF6F6B20";
when 16#1B00# => romdata <= X"F6BD4204";
when 16#1B01# => romdata <= X"243CBA14";
when 16#1B02# => romdata <= X"DAA15A25";
when 16#1B03# => romdata <= X"6FBCD138";
when 16#1B04# => romdata <= X"B5D875E2";
when 16#1B05# => romdata <= X"8BCC0BA3";
when 16#1B06# => romdata <= X"6855E648";
when 16#1B07# => romdata <= X"434CD04F";
when 16#1B08# => romdata <= X"49935C3D";
when 16#1B09# => romdata <= X"074DD5BA";
when 16#1B0A# => romdata <= X"2EB82AB1";
when 16#1B0B# => romdata <= X"4E82C309";
when 16#1B0C# => romdata <= X"91A1159E";
when 16#1B0D# => romdata <= X"990D1D36";
when 16#1B0E# => romdata <= X"DAF79485";
when 16#1B0F# => romdata <= X"3A23C499";
when 16#1B10# => romdata <= X"AB6B3DC0";
when 16#1B11# => romdata <= X"2A89F014";
when 16#1B12# => romdata <= X"31037281";
when 16#1B13# => romdata <= X"3643F786";
when 16#1B14# => romdata <= X"BF19D3FA";
when 16#1B15# => romdata <= X"8C463EE5";
when 16#1B16# => romdata <= X"0D9FA871";
when 16#1B17# => romdata <= X"07E91C46";
when 16#1B18# => romdata <= X"1AD2E5DF";
when 16#1B19# => romdata <= X"2FC99630";
when 16#1B1A# => romdata <= X"D2005894";
when 16#1B1B# => romdata <= X"CB769812";
when 16#1B1C# => romdata <= X"3111FAFC";
when 16#1B1D# => romdata <= X"0C5BC9D1";
when 16#1B1E# => romdata <= X"E8E84FCC";
when 16#1B1F# => romdata <= X"A5179A6C";
when 16#1B20# => romdata <= X"9AFE3E36";
when 16#1B21# => romdata <= X"9222D668";
when 16#1B22# => romdata <= X"54F90D26";
when 16#1B23# => romdata <= X"68A57FDE";
when 16#1B24# => romdata <= X"E00C300A";
when 16#1B25# => romdata <= X"EA4E88F0";
when 16#1B26# => romdata <= X"3F05C4D7";
when 16#1B27# => romdata <= X"695B206D";
when 16#1B28# => romdata <= X"E9F7E1D4";
when 16#1B29# => romdata <= X"29E5E6B6";
when 16#1B2A# => romdata <= X"5DFE05D4";
when 16#1B2B# => romdata <= X"C861F4E7";
when 16#1B2C# => romdata <= X"844DDB90";
when 16#1B2D# => romdata <= X"62C0B6DB";
when 16#1B2E# => romdata <= X"46B27AD0";
when 16#1B2F# => romdata <= X"368992F5";
when 16#1B30# => romdata <= X"4A44829D";
when 16#1B31# => romdata <= X"D11A05AB";
when 16#1B32# => romdata <= X"97BA8AD8";
when 16#1B33# => romdata <= X"54E428B8";
when 16#1B34# => romdata <= X"7F20C4E5";
when 16#1B35# => romdata <= X"E4BB1FF3";
when 16#1B36# => romdata <= X"803809A8";
when 16#1B37# => romdata <= X"1F2E4C10";
when 16#1B38# => romdata <= X"95720067";
when 16#1B39# => romdata <= X"29A5E490";
when 16#1B3A# => romdata <= X"E0AA40BA";
when 16#1B3B# => romdata <= X"55F4391C";
when 16#1B3C# => romdata <= X"9FB758EF";
when 16#1B3D# => romdata <= X"A79B97E6";
when 16#1B3E# => romdata <= X"D413BCB0";
when 16#1B3F# => romdata <= X"2D33A00D";
when 16#1B40# => romdata <= X"A6705BFB";
when 16#1B41# => romdata <= X"ADED66CF";
when 16#1B42# => romdata <= X"C21291C4";
when 16#1B43# => romdata <= X"94B7C329";
when 16#1B44# => romdata <= X"3810012E";
when 16#1B45# => romdata <= X"CC61415E";
when 16#1B46# => romdata <= X"609DD97A";
when 16#1B47# => romdata <= X"AFFDEB79";
when 16#1B48# => romdata <= X"5DE36026";
when 16#1B49# => romdata <= X"B4602DD5";
when 16#1B4A# => romdata <= X"46A1AD93";
when 16#1B4B# => romdata <= X"7F1A6DEA";
when 16#1B4C# => romdata <= X"CD3393F5";
when 16#1B4D# => romdata <= X"530C48A7";
when 16#1B4E# => romdata <= X"974E2882";
when 16#1B4F# => romdata <= X"CB327AE6";
when 16#1B50# => romdata <= X"00C05A53";
when 16#1B51# => romdata <= X"5BDE5D15";
when 16#1B52# => romdata <= X"AC524859";
when 16#1B53# => romdata <= X"582EEE2D";
when 16#1B54# => romdata <= X"62194B73";
when 16#1B55# => romdata <= X"E0164335";
when 16#1B56# => romdata <= X"9E7B2625";
when 16#1B57# => romdata <= X"F3EB9FE7";
when 16#1B58# => romdata <= X"137514ED";
when 16#1B59# => romdata <= X"549A3196";
when 16#1B5A# => romdata <= X"FFCBC807";
when 16#1B5B# => romdata <= X"2B4F6C18";
when 16#1B5C# => romdata <= X"CC67AAFA";
when 16#1B5D# => romdata <= X"0ED6029A";
when 16#1B5E# => romdata <= X"805EF098";
when 16#1B5F# => romdata <= X"7E2F27A3";
when 16#1B60# => romdata <= X"260F849C";
when 16#1B61# => romdata <= X"68F3EF91";
when 16#1B62# => romdata <= X"DAA9E579";
when 16#1B63# => romdata <= X"AA16FDA6";
when 16#1B64# => romdata <= X"98CC18AE";
when 16#1B65# => romdata <= X"8706E28C";
when 16#1B66# => romdata <= X"6D84CB3F";
when 16#1B67# => romdata <= X"593273D7";
when 16#1B68# => romdata <= X"63C29699";
when 16#1B69# => romdata <= X"33D8EFA5";
when 16#1B6A# => romdata <= X"64E8C06C";
when 16#1B6B# => romdata <= X"427809E6";
when 16#1B6C# => romdata <= X"A5A6F76D";
when 16#1B6D# => romdata <= X"E7C8B07F";
when 16#1B6E# => romdata <= X"F4EDDF6C";
when 16#1B6F# => romdata <= X"F2B75950";
when 16#1B70# => romdata <= X"66DFB15F";
when 16#1B71# => romdata <= X"5C6F3839";
when 16#1B72# => romdata <= X"DEE642FC";
when 16#1B73# => romdata <= X"86BC1F3A";
when 16#1B74# => romdata <= X"ED7ED2E6";
when 16#1B75# => romdata <= X"5B665198";
when 16#1B76# => romdata <= X"AA034817";
when 16#1B77# => romdata <= X"DBBBE0FE";
when 16#1B78# => romdata <= X"30E662B2";
when 16#1B79# => romdata <= X"161276CB";
when 16#1B7A# => romdata <= X"D969FDA0";
when 16#1B7B# => romdata <= X"5AFD6D6A";
when 16#1B7C# => romdata <= X"570C1E3C";
when 16#1B7D# => romdata <= X"F7E32463";
when 16#1B7E# => romdata <= X"4441983F";
when 16#1B7F# => romdata <= X"257E2BA0";
when 16#1B80# => romdata <= X"A9366308";
when 16#1B81# => romdata <= X"475F2D8D";
when 16#1B82# => romdata <= X"0C2D451C";
when 16#1B83# => romdata <= X"4A65A01E";
when 16#1B84# => romdata <= X"E58A0AF1";
when 16#1B85# => romdata <= X"9B791D97";
when 16#1B86# => romdata <= X"382EC59A";
when 16#1B87# => romdata <= X"52616C74";
when 16#1B88# => romdata <= X"80B86EB1";
when 16#1B89# => romdata <= X"D0A83E93";
when 16#1B8A# => romdata <= X"224B0DF7";
when 16#1B8B# => romdata <= X"3DE1D7EE";
when 16#1B8C# => romdata <= X"6D51088F";
when 16#1B8D# => romdata <= X"3B20B793";
when 16#1B8E# => romdata <= X"7E6C0144";
when 16#1B8F# => romdata <= X"E0DACA63";
when 16#1B90# => romdata <= X"24F0C8E5";
when 16#1B91# => romdata <= X"F9D93A8C";
when 16#1B92# => romdata <= X"BA1045E5";
when 16#1B93# => romdata <= X"B509D7DF";
when 16#1B94# => romdata <= X"98619FDD";
when 16#1B95# => romdata <= X"FDD7892C";
when 16#1B96# => romdata <= X"3082D690";
when 16#1B97# => romdata <= X"08D9D3ED";
when 16#1B98# => romdata <= X"6C9C1367";
when 16#1B99# => romdata <= X"D9DB7C04";
when 16#1B9A# => romdata <= X"621D7CDD";
when 16#1B9B# => romdata <= X"8A5A2599";
when 16#1B9C# => romdata <= X"EE45B87A";
when 16#1B9D# => romdata <= X"82F8CE8D";
when 16#1B9E# => romdata <= X"60293E7A";
when 16#1B9F# => romdata <= X"71D11700";
when 16#1BA0# => romdata <= X"CA9AF117";
when 16#1BA1# => romdata <= X"D630C5D8";
when 16#1BA2# => romdata <= X"B876A9DC";
when 16#1BA3# => romdata <= X"E519BD65";
when 16#1BA4# => romdata <= X"3114448C";
when 16#1BA5# => romdata <= X"68B26581";
when 16#1BA6# => romdata <= X"3C608435";
when 16#1BA7# => romdata <= X"B96CD642";
when 16#1BA8# => romdata <= X"A420A15F";
when 16#1BA9# => romdata <= X"BAB46769";
when 16#1BAA# => romdata <= X"2931BCA7";
when 16#1BAB# => romdata <= X"4F1F9D23";
when 16#1BAC# => romdata <= X"F5BFDDC5";
when 16#1BAD# => romdata <= X"B8651139";
when 16#1BAE# => romdata <= X"B5A73F04";
when 16#1BAF# => romdata <= X"FEF3DA64";
when 16#1BB0# => romdata <= X"B7BD56E4";
when 16#1BB1# => romdata <= X"9235069E";
when 16#1BB2# => romdata <= X"E5E8A136";
when 16#1BB3# => romdata <= X"B921051F";
when 16#1BB4# => romdata <= X"1D1C7D59";
when 16#1BB5# => romdata <= X"93E6EEEE";
when 16#1BB6# => romdata <= X"A2D58583";
when 16#1BB7# => romdata <= X"152ADCD8";
when 16#1BB8# => romdata <= X"7AA89CF5";
when 16#1BB9# => romdata <= X"962BC834";
when 16#1BBA# => romdata <= X"1EF99CEB";
when 16#1BBB# => romdata <= X"3682A2D0";
when 16#1BBC# => romdata <= X"686602CE";
when 16#1BBD# => romdata <= X"140ABC2F";
when 16#1BBE# => romdata <= X"DF79A778";
when 16#1BBF# => romdata <= X"A9D75AFF";
when 16#1BC0# => romdata <= X"DBBA00C0";
when 16#1BC1# => romdata <= X"BD6A8A8A";
when 16#1BC2# => romdata <= X"FF9B5D1F";
when 16#1BC3# => romdata <= X"30C83735";
when 16#1BC4# => romdata <= X"72C81BD9";
when 16#1BC5# => romdata <= X"59489010";
when 16#1BC6# => romdata <= X"2F46B5A3";
when 16#1BC7# => romdata <= X"93ED126C";
when 16#1BC8# => romdata <= X"36AEF6A6";
when 16#1BC9# => romdata <= X"6E231A24";
when 16#1BCA# => romdata <= X"6FDFCBD3";
when 16#1BCB# => romdata <= X"DED198AB";
when 16#1BCC# => romdata <= X"C54CF357";
when 16#1BCD# => romdata <= X"ABC67AC8";
when 16#1BCE# => romdata <= X"3680C048";
when 16#1BCF# => romdata <= X"932D7C90";
when 16#1BD0# => romdata <= X"2AB7DB16";
when 16#1BD1# => romdata <= X"952B3C95";
when 16#1BD2# => romdata <= X"DF4E845B";
when 16#1BD3# => romdata <= X"46A362FF";
when 16#1BD4# => romdata <= X"E1A27CD1";
when 16#1BD5# => romdata <= X"388483FF";
when 16#1BD6# => romdata <= X"A41AA563";
when 16#1BD7# => romdata <= X"933371C0";
when 16#1BD8# => romdata <= X"180848F9";
when 16#1BD9# => romdata <= X"E3C03AFC";
when 16#1BDA# => romdata <= X"1F00D6AB";
when 16#1BDB# => romdata <= X"A29A9533";
when 16#1BDC# => romdata <= X"27A4E3D9";
when 16#1BDD# => romdata <= X"FAD4616C";
when 16#1BDE# => romdata <= X"8546C9AF";
when 16#1BDF# => romdata <= X"89FB4D08";
when 16#1BE0# => romdata <= X"D4256923";
when 16#1BE1# => romdata <= X"B736A8F6";
when 16#1BE2# => romdata <= X"8FEA5A09";
when 16#1BE3# => romdata <= X"7E0640C1";
when 16#1BE4# => romdata <= X"6E0F7F94";
when 16#1BE5# => romdata <= X"2E6A6F5C";
when 16#1BE6# => romdata <= X"BA76BB00";
when 16#1BE7# => romdata <= X"D81C606C";
when 16#1BE8# => romdata <= X"7FED9087";
when 16#1BE9# => romdata <= X"89A63F01";
when 16#1BEA# => romdata <= X"F9B5FC7B";
when 16#1BEB# => romdata <= X"7BE434E8";
when 16#1BEC# => romdata <= X"5A0A44B2";
when 16#1BED# => romdata <= X"070BE71A";
when 16#1BEE# => romdata <= X"B2BA0132";
when 16#1BEF# => romdata <= X"D9D7B32E";
when 16#1BF0# => romdata <= X"2D2FE229";
when 16#1BF1# => romdata <= X"619F8564";
when 16#1BF2# => romdata <= X"3E75B414";
when 16#1BF3# => romdata <= X"1D355386";
when 16#1BF4# => romdata <= X"D1A09F45";
when 16#1BF5# => romdata <= X"738455BC";
when 16#1BF6# => romdata <= X"21607086";
when 16#1BF7# => romdata <= X"C7BBCD4B";
when 16#1BF8# => romdata <= X"73F87DD8";
when 16#1BF9# => romdata <= X"3E905BCE";
when 16#1BFA# => romdata <= X"8FC6C5BF";
when 16#1BFB# => romdata <= X"1824E904";
when 16#1BFC# => romdata <= X"C4F5C265";
when 16#1BFD# => romdata <= X"18B2FEBF";
when 16#1BFE# => romdata <= X"8EB06B22";
when 16#1BFF# => romdata <= X"437270C0";
when 16#1C00# => romdata <= X"92D87BF3";
when 16#1C01# => romdata <= X"F54B0445";
when 16#1C02# => romdata <= X"C05E508E";
when 16#1C03# => romdata <= X"80F9CBC0";
when 16#1C04# => romdata <= X"502F0897";
when 16#1C05# => romdata <= X"D717CA23";
when 16#1C06# => romdata <= X"2004362F";
when 16#1C07# => romdata <= X"394A023B";
when 16#1C08# => romdata <= X"FBFE3322";
when 16#1C09# => romdata <= X"C1D331AF";
when 16#1C0A# => romdata <= X"C6454FC7";
when 16#1C0B# => romdata <= X"56FB4876";
when 16#1C0C# => romdata <= X"8693FD5C";
when 16#1C0D# => romdata <= X"46DDB40D";
when 16#1C0E# => romdata <= X"CBF14C72";
when 16#1C0F# => romdata <= X"6C24ED67";
when 16#1C10# => romdata <= X"D8F3EB61";
when 16#1C11# => romdata <= X"3BA80B0E";
when 16#1C12# => romdata <= X"39CF0747";
when 16#1C13# => romdata <= X"DF62D258";
when 16#1C14# => romdata <= X"613640D8";
when 16#1C15# => romdata <= X"81E085C3";
when 16#1C16# => romdata <= X"77DE1C3D";
when 16#1C17# => romdata <= X"149C8359";
when 16#1C18# => romdata <= X"407C2C6A";
when 16#1C19# => romdata <= X"BC0D2718";
when 16#1C1A# => romdata <= X"A2D42439";
when 16#1C1B# => romdata <= X"A8E7B38C";
when 16#1C1C# => romdata <= X"D7DCED72";
when 16#1C1D# => romdata <= X"AE750B2B";
when 16#1C1E# => romdata <= X"E88D0069";
when 16#1C1F# => romdata <= X"FBE94BD6";
when 16#1C20# => romdata <= X"9A9A4B4A";
when 16#1C21# => romdata <= X"D42FEC5E";
when 16#1C22# => romdata <= X"651A31F8";
when 16#1C23# => romdata <= X"6B90DC2F";
when 16#1C24# => romdata <= X"EBAA6FA6";
when 16#1C25# => romdata <= X"E5F6368B";
when 16#1C26# => romdata <= X"620C1750";
when 16#1C27# => romdata <= X"278DF393";
when 16#1C28# => romdata <= X"F7C5035D";
when 16#1C29# => romdata <= X"47897FC0";
when 16#1C2A# => romdata <= X"5FBC419A";
when 16#1C2B# => romdata <= X"61330135";
when 16#1C2C# => romdata <= X"F24365F1";
when 16#1C2D# => romdata <= X"3D653D77";
when 16#1C2E# => romdata <= X"CA2930DB";
when 16#1C2F# => romdata <= X"B05A3815";
when 16#1C30# => romdata <= X"FE83F75B";
when 16#1C31# => romdata <= X"B1BD8B2D";
when 16#1C32# => romdata <= X"E12A2FAA";
when 16#1C33# => romdata <= X"DCD1ED62";
when 16#1C34# => romdata <= X"329C55B8";
when 16#1C35# => romdata <= X"7FB32CC8";
when 16#1C36# => romdata <= X"F3B42D88";
when 16#1C37# => romdata <= X"8981B419";
when 16#1C38# => romdata <= X"2480D1F5";
when 16#1C39# => romdata <= X"7CEB0C55";
when 16#1C3A# => romdata <= X"897BDA6B";
when 16#1C3B# => romdata <= X"9C0ACE1E";
when 16#1C3C# => romdata <= X"7E4595E3";
when 16#1C3D# => romdata <= X"0C736830";
when 16#1C3E# => romdata <= X"62432084";
when 16#1C3F# => romdata <= X"44FCF457";
when 16#1C40# => romdata <= X"4C47B077";
when 16#1C41# => romdata <= X"25B25EC2";
when 16#1C42# => romdata <= X"E28F4C50";
when 16#1C43# => romdata <= X"B744B386";
when 16#1C44# => romdata <= X"0B361DDD";
when 16#1C45# => romdata <= X"D22D949A";
when 16#1C46# => romdata <= X"A94EBA4F";
when 16#1C47# => romdata <= X"97606FCA";
when 16#1C48# => romdata <= X"D91394B6";
when 16#1C49# => romdata <= X"FC0E634B";
when 16#1C4A# => romdata <= X"D15E099E";
when 16#1C4B# => romdata <= X"697403B2";
when 16#1C4C# => romdata <= X"AE84CDF5";
when 16#1C4D# => romdata <= X"DBDF36D9";
when 16#1C4E# => romdata <= X"1FB82C0B";
when 16#1C4F# => romdata <= X"C12B984F";
when 16#1C50# => romdata <= X"EE83CA9E";
when 16#1C51# => romdata <= X"97C194CA";
when 16#1C52# => romdata <= X"DF8382CE";
when 16#1C53# => romdata <= X"CAAF49EB";
when 16#1C54# => romdata <= X"3BD446F6";
when 16#1C55# => romdata <= X"60F94C18";
when 16#1C56# => romdata <= X"8C074CC3";
when 16#1C57# => romdata <= X"12E186BE";
when 16#1C58# => romdata <= X"E0F65855";
when 16#1C59# => romdata <= X"35B050C2";
when 16#1C5A# => romdata <= X"26659A94";
when 16#1C5B# => romdata <= X"B4C4974D";
when 16#1C5C# => romdata <= X"A32CDFF3";
when 16#1C5D# => romdata <= X"0DBEB4DE";
when 16#1C5E# => romdata <= X"A588C6F4";
when 16#1C5F# => romdata <= X"90F7432D";
when 16#1C60# => romdata <= X"A5FA2408";
when 16#1C61# => romdata <= X"BBC931EA";
when 16#1C62# => romdata <= X"F60EADD7";
when 16#1C63# => romdata <= X"B891A61C";
when 16#1C64# => romdata <= X"157147B8";
when 16#1C65# => romdata <= X"DDE7A45F";
when 16#1C66# => romdata <= X"909BD20D";
when 16#1C67# => romdata <= X"5B120097";
when 16#1C68# => romdata <= X"83DE4109";
when 16#1C69# => romdata <= X"40245FE4";
when 16#1C6A# => romdata <= X"E91ACCF7";
when 16#1C6B# => romdata <= X"2942E486";
when 16#1C6C# => romdata <= X"AE773CD6";
when 16#1C6D# => romdata <= X"65912173";
when 16#1C6E# => romdata <= X"EA29875A";
when 16#1C6F# => romdata <= X"1722F865";
when 16#1C70# => romdata <= X"8C414CD0";
when 16#1C71# => romdata <= X"8CBFDFE1";
when 16#1C72# => romdata <= X"DD356E16";
when 16#1C73# => romdata <= X"7A9D7B20";
when 16#1C74# => romdata <= X"BF744156";
when 16#1C75# => romdata <= X"2EE81643";
when 16#1C76# => romdata <= X"5A78BAE7";
when 16#1C77# => romdata <= X"E5A5EB4D";
when 16#1C78# => romdata <= X"A6AAAC36";
when 16#1C79# => romdata <= X"F594C93E";
when 16#1C7A# => romdata <= X"2851D76B";
when 16#1C7B# => romdata <= X"6A18B0B0";
when 16#1C7C# => romdata <= X"3B30CD38";
when 16#1C7D# => romdata <= X"B97E3810";
when 16#1C7E# => romdata <= X"9C494C55";
when 16#1C7F# => romdata <= X"7643D580";
when 16#1C80# => romdata <= X"BAA2716F";
when 16#1C81# => romdata <= X"115D72D2";
when 16#1C82# => romdata <= X"037841EF";
when 16#1C83# => romdata <= X"9138D198";
when 16#1C84# => romdata <= X"33C7C5FF";
when 16#1C85# => romdata <= X"40F058A9";
when 16#1C86# => romdata <= X"60826E69";
when 16#1C87# => romdata <= X"03155777";
when 16#1C88# => romdata <= X"10EFE64B";
when 16#1C89# => romdata <= X"B3769156";
when 16#1C8A# => romdata <= X"4B3B0B6C";
when 16#1C8B# => romdata <= X"577DA603";
when 16#1C8C# => romdata <= X"CC3ACDFE";
when 16#1C8D# => romdata <= X"1785541A";
when 16#1C8E# => romdata <= X"AD239047";
when 16#1C8F# => romdata <= X"58A5A13B";
when 16#1C90# => romdata <= X"DB018E71";
when 16#1C91# => romdata <= X"69D479A1";
when 16#1C92# => romdata <= X"FAA031CA";
when 16#1C93# => romdata <= X"72FA6D6A";
when 16#1C94# => romdata <= X"E9613D6B";
when 16#1C95# => romdata <= X"2F82AB07";
when 16#1C96# => romdata <= X"500B49DF";
when 16#1C97# => romdata <= X"535F86A7";
when 16#1C98# => romdata <= X"6350C140";
when 16#1C99# => romdata <= X"F9CD2529";
when 16#1C9A# => romdata <= X"5D6BC2F3";
when 16#1C9B# => romdata <= X"8C5D13C9";
when 16#1C9C# => romdata <= X"9540E236";
when 16#1C9D# => romdata <= X"3862F06D";
when 16#1C9E# => romdata <= X"DCC486D8";
when 16#1C9F# => romdata <= X"84999BCB";
when 16#1CA0# => romdata <= X"840BCCAF";
when 16#1CA1# => romdata <= X"2AB84F59";
when 16#1CA2# => romdata <= X"06B9AA0F";
when 16#1CA3# => romdata <= X"77D6432F";
when 16#1CA4# => romdata <= X"65315583";
when 16#1CA5# => romdata <= X"92641C52";
when 16#1CA6# => romdata <= X"FEAF9D8E";
when 16#1CA7# => romdata <= X"D86BF015";
when 16#1CA8# => romdata <= X"8134129F";
when 16#1CA9# => romdata <= X"34ECD076";
when 16#1CAA# => romdata <= X"8BC02ED4";
when 16#1CAB# => romdata <= X"42254515";
when 16#1CAC# => romdata <= X"A74999C6";
when 16#1CAD# => romdata <= X"B8052A1F";
when 16#1CAE# => romdata <= X"C797F572";
when 16#1CAF# => romdata <= X"0738C69D";
when 16#1CB0# => romdata <= X"D9B3FFAB";
when 16#1CB1# => romdata <= X"DDC8515C";
when 16#1CB2# => romdata <= X"D279B246";
when 16#1CB3# => romdata <= X"EA7C6775";
when 16#1CB4# => romdata <= X"4920038C";
when 16#1CB5# => romdata <= X"5A4C8D30";
when 16#1CB6# => romdata <= X"1119CEB9";
when 16#1CB7# => romdata <= X"5FAB2765";
when 16#1CB8# => romdata <= X"DE39DDA8";
when 16#1CB9# => romdata <= X"4180CEBA";
when 16#1CBA# => romdata <= X"AFBF4976";
when 16#1CBB# => romdata <= X"118A8373";
when 16#1CBC# => romdata <= X"FF6BBFC7";
when 16#1CBD# => romdata <= X"FEBC3CFE";
when 16#1CBE# => romdata <= X"AB1DA69D";
when 16#1CBF# => romdata <= X"D3DB9E42";
when 16#1CC0# => romdata <= X"8C594950";
when 16#1CC1# => romdata <= X"FD51F4D9";
when 16#1CC2# => romdata <= X"8A393BAB";
when 16#1CC3# => romdata <= X"96001461";
when 16#1CC4# => romdata <= X"F2765834";
when 16#1CC5# => romdata <= X"ED70C60B";
when 16#1CC6# => romdata <= X"C56406CF";
when 16#1CC7# => romdata <= X"CB3E784C";
when 16#1CC8# => romdata <= X"59B91C19";
when 16#1CC9# => romdata <= X"783E67CE";
when 16#1CCA# => romdata <= X"6C86713C";
when 16#1CCB# => romdata <= X"43DCDA95";
when 16#1CCC# => romdata <= X"12B2E717";
when 16#1CCD# => romdata <= X"3AFC2EF9";
when 16#1CCE# => romdata <= X"A172C9CF";
when 16#1CCF# => romdata <= X"DDD3000D";
when 16#1CD0# => romdata <= X"7A981440";
when 16#1CD1# => romdata <= X"AD994C39";
when 16#1CD2# => romdata <= X"DAE6FC0B";
when 16#1CD3# => romdata <= X"645BA0FD";
when 16#1CD4# => romdata <= X"49ECAA19";
when 16#1CD5# => romdata <= X"E572ED0F";
when 16#1CD6# => romdata <= X"AC748EC8";
when 16#1CD7# => romdata <= X"37A7D6F2";
when 16#1CD8# => romdata <= X"8A8D0044";
when 16#1CD9# => romdata <= X"02F71CA2";
when 16#1CDA# => romdata <= X"09BB9403";
when 16#1CDB# => romdata <= X"B21E2983";
when 16#1CDC# => romdata <= X"6C5FE897";
when 16#1CDD# => romdata <= X"268DE073";
when 16#1CDE# => romdata <= X"6E985F96";
when 16#1CDF# => romdata <= X"31DFDD1A";
when 16#1CE0# => romdata <= X"C59D5411";
when 16#1CE1# => romdata <= X"E684BE08";
when 16#1CE2# => romdata <= X"2F41108E";
when 16#1CE3# => romdata <= X"33D2B92B";
when 16#1CE4# => romdata <= X"2D45ED70";
when 16#1CE5# => romdata <= X"FA52EA2D";
when 16#1CE6# => romdata <= X"6DE121EB";
when 16#1CE7# => romdata <= X"9F9C886D";
when 16#1CE8# => romdata <= X"A479464A";
when 16#1CE9# => romdata <= X"9DFD9970";
when 16#1CEA# => romdata <= X"A406491E";
when 16#1CEB# => romdata <= X"334372D7";
when 16#1CEC# => romdata <= X"B7893609";
when 16#1CED# => romdata <= X"5A7459BF";
when 16#1CEE# => romdata <= X"AFF0E909";
when 16#1CEF# => romdata <= X"0C2C6B6D";
when 16#1CF0# => romdata <= X"62624A79";
when 16#1CF1# => romdata <= X"334F879A";
when 16#1CF2# => romdata <= X"5C92C685";
when 16#1CF3# => romdata <= X"B50F75F0";
when 16#1CF4# => romdata <= X"4BA664EC";
when 16#1CF5# => romdata <= X"95893FF4";
when 16#1CF6# => romdata <= X"0D62EEB2";
when 16#1CF7# => romdata <= X"4DCDD288";
when 16#1CF8# => romdata <= X"729D0C29";
when 16#1CF9# => romdata <= X"7DF5ABB8";
when 16#1CFA# => romdata <= X"3C77FC11";
when 16#1CFB# => romdata <= X"D0EA3EF1";
when 16#1CFC# => romdata <= X"8E3BC7C2";
when 16#1CFD# => romdata <= X"C065CAC5";
when 16#1CFE# => romdata <= X"1390C610";
when 16#1CFF# => romdata <= X"B591D240";
when 16#1D00# => romdata <= X"98CDFCBA";
when 16#1D01# => romdata <= X"D056240E";
when 16#1D02# => romdata <= X"180F347C";
when 16#1D03# => romdata <= X"00912F2D";
when 16#1D04# => romdata <= X"9ABEBCF5";
when 16#1D05# => romdata <= X"464D410B";
when 16#1D06# => romdata <= X"E6A50404";
when 16#1D07# => romdata <= X"B830F744";
when 16#1D08# => romdata <= X"D78F7D97";
when 16#1D09# => romdata <= X"180404FB";
when 16#1D0A# => romdata <= X"3BCCC228";
when 16#1D0B# => romdata <= X"8B799181";
when 16#1D0C# => romdata <= X"0B2562C4";
when 16#1D0D# => romdata <= X"D509200C";
when 16#1D0E# => romdata <= X"E1F9C4DF";
when 16#1D0F# => romdata <= X"6DCA4C60";
when 16#1D10# => romdata <= X"0D9ED49C";
when 16#1D11# => romdata <= X"9C145614";
when 16#1D12# => romdata <= X"1C7B7151";
when 16#1D13# => romdata <= X"3E728D41";
when 16#1D14# => romdata <= X"970ACDB6";
when 16#1D15# => romdata <= X"C15B4A4E";
when 16#1D16# => romdata <= X"327B9A87";
when 16#1D17# => romdata <= X"ADA73D1D";
when 16#1D18# => romdata <= X"46EB0A21";
when 16#1D19# => romdata <= X"F2F5481C";
when 16#1D1A# => romdata <= X"3B42931C";
when 16#1D1B# => romdata <= X"51B780FA";
when 16#1D1C# => romdata <= X"526C29B9";
when 16#1D1D# => romdata <= X"8E6B9C71";
when 16#1D1E# => romdata <= X"4B20049F";
when 16#1D1F# => romdata <= X"7A05252C";
when 16#1D20# => romdata <= X"BB84B8E3";
when 16#1D21# => romdata <= X"6026DB23";
when 16#1D22# => romdata <= X"79C9632A";
when 16#1D23# => romdata <= X"0843436E";
when 16#1D24# => romdata <= X"CB72D15E";
when 16#1D25# => romdata <= X"A2950ACD";
when 16#1D26# => romdata <= X"E18DBDC6";
when 16#1D27# => romdata <= X"DFB01BF0";
when 16#1D28# => romdata <= X"8F7E191E";
when 16#1D29# => romdata <= X"C885F11D";
when 16#1D2A# => romdata <= X"1D8B7BC9";
when 16#1D2B# => romdata <= X"6E9836B3";
when 16#1D2C# => romdata <= X"95108F68";
when 16#1D2D# => romdata <= X"54545082";
when 16#1D2E# => romdata <= X"A694D597";
when 16#1D2F# => romdata <= X"4CC36C8A";
when 16#1D30# => romdata <= X"65834918";
when 16#1D31# => romdata <= X"6C1BA892";
when 16#1D32# => romdata <= X"DAA85D3F";
when 16#1D33# => romdata <= X"156BFBE9";
when 16#1D34# => romdata <= X"4C73BCD8";
when 16#1D35# => romdata <= X"15E7652C";
when 16#1D36# => romdata <= X"38E178AA";
when 16#1D37# => romdata <= X"F02014F0";
when 16#1D38# => romdata <= X"E6F23A4E";
when 16#1D39# => romdata <= X"7EF689EB";
when 16#1D3A# => romdata <= X"F3ABDCCD";
when 16#1D3B# => romdata <= X"D40E2DEC";
when 16#1D3C# => romdata <= X"ED316F07";
when 16#1D3D# => romdata <= X"E2071692";
when 16#1D3E# => romdata <= X"7C8F7B20";
when 16#1D3F# => romdata <= X"3D51D957";
when 16#1D40# => romdata <= X"EE6EAB06";
when 16#1D41# => romdata <= X"2B99ACA0";
when 16#1D42# => romdata <= X"D28E0AB5";
when 16#1D43# => romdata <= X"0B516CD9";
when 16#1D44# => romdata <= X"2CBB9BA9";
when 16#1D45# => romdata <= X"0333E73D";
when 16#1D46# => romdata <= X"58DE0B4B";
when 16#1D47# => romdata <= X"633D81EC";
when 16#1D48# => romdata <= X"93D15EBC";
when 16#1D49# => romdata <= X"CC813EE6";
when 16#1D4A# => romdata <= X"3D63BD18";
when 16#1D4B# => romdata <= X"517F4FE8";
when 16#1D4C# => romdata <= X"5C374695";
when 16#1D4D# => romdata <= X"74B8122F";
when 16#1D4E# => romdata <= X"B9138812";
when 16#1D4F# => romdata <= X"3E1D5E80";
when 16#1D50# => romdata <= X"5166FB71";
when 16#1D51# => romdata <= X"57494F85";
when 16#1D52# => romdata <= X"59F90A4F";
when 16#1D53# => romdata <= X"A3DE9E71";
when 16#1D54# => romdata <= X"DA6FA7CC";
when 16#1D55# => romdata <= X"C6086E63";
when 16#1D56# => romdata <= X"8BDD4FD3";
when 16#1D57# => romdata <= X"E4487506";
when 16#1D58# => romdata <= X"ACCF84F1";
when 16#1D59# => romdata <= X"E1678D71";
when 16#1D5A# => romdata <= X"4B86FAAD";
when 16#1D5B# => romdata <= X"57A6B76E";
when 16#1D5C# => romdata <= X"085CFAC3";
when 16#1D5D# => romdata <= X"0DE469BE";
when 16#1D5E# => romdata <= X"32E2D203";
when 16#1D5F# => romdata <= X"C63B43F0";
when 16#1D60# => romdata <= X"73DD24F4";
when 16#1D61# => romdata <= X"A1E039B9";
when 16#1D62# => romdata <= X"41E7A97F";
when 16#1D63# => romdata <= X"8BB28B51";
when 16#1D64# => romdata <= X"62174552";
when 16#1D65# => romdata <= X"68B6EFBB";
when 16#1D66# => romdata <= X"0E1745C2";
when 16#1D67# => romdata <= X"3D6D12A8";
when 16#1D68# => romdata <= X"CD13E5D2";
when 16#1D69# => romdata <= X"42F562F5";
when 16#1D6A# => romdata <= X"6FE92496";
when 16#1D6B# => romdata <= X"342000A7";
when 16#1D6C# => romdata <= X"31BF3DB0";
when 16#1D6D# => romdata <= X"A7D31107";
when 16#1D6E# => romdata <= X"05DFD0D8";
when 16#1D6F# => romdata <= X"DEFB8566";
when 16#1D70# => romdata <= X"5B77347C";
when 16#1D71# => romdata <= X"EFC8629F";
when 16#1D72# => romdata <= X"3757304F";
when 16#1D73# => romdata <= X"6129DA98";
when 16#1D74# => romdata <= X"45F6509F";
when 16#1D75# => romdata <= X"E3D32DE9";
when 16#1D76# => romdata <= X"FA86EA4F";
when 16#1D77# => romdata <= X"A9BF86FF";
when 16#1D78# => romdata <= X"7CC8E726";
when 16#1D79# => romdata <= X"C0FA9F93";
when 16#1D7A# => romdata <= X"F889C467";
when 16#1D7B# => romdata <= X"642C5E94";
when 16#1D7C# => romdata <= X"4501BEF8";
when 16#1D7D# => romdata <= X"ED59793A";
when 16#1D7E# => romdata <= X"F8804A99";
when 16#1D7F# => romdata <= X"51B4B880";
when 16#1D80# => romdata <= X"906F6C5A";
when 16#1D81# => romdata <= X"1D3BD03A";
when 16#1D82# => romdata <= X"03802EEF";
when 16#1D83# => romdata <= X"5937E214";
when 16#1D84# => romdata <= X"E87B5E2F";
when 16#1D85# => romdata <= X"0182BA2C";
when 16#1D86# => romdata <= X"258F44B5";
when 16#1D87# => romdata <= X"16EC66EA";
when 16#1D88# => romdata <= X"CB705E06";
when 16#1D89# => romdata <= X"EA6DFDB5";
when 16#1D8A# => romdata <= X"6600B846";
when 16#1D8B# => romdata <= X"3A421DB0";
when 16#1D8C# => romdata <= X"3A514600";
when 16#1D8D# => romdata <= X"91D7FE88";
when 16#1D8E# => romdata <= X"9E6DAE32";
when 16#1D8F# => romdata <= X"EC19190E";
when 16#1D90# => romdata <= X"7211F08D";
when 16#1D91# => romdata <= X"37846CEE";
when 16#1D92# => romdata <= X"7364B6EC";
when 16#1D93# => romdata <= X"C07C1740";
when 16#1D94# => romdata <= X"CE990141";
when 16#1D95# => romdata <= X"C4DC4CB0";
when 16#1D96# => romdata <= X"AC9F25CA";
when 16#1D97# => romdata <= X"FCA6BC91";
when 16#1D98# => romdata <= X"11102EAB";
when 16#1D99# => romdata <= X"A250ADFD";
when 16#1D9A# => romdata <= X"505201FF";
when 16#1D9B# => romdata <= X"F638B31A";
when 16#1D9C# => romdata <= X"77CCE7A1";
when 16#1D9D# => romdata <= X"ECB273F9";
when 16#1D9E# => romdata <= X"C8ED84EC";
when 16#1D9F# => romdata <= X"2F403C11";
when 16#1DA0# => romdata <= X"91596A53";
when 16#1DA1# => romdata <= X"EAD82342";
when 16#1DA2# => romdata <= X"1EC47DC5";
when 16#1DA3# => romdata <= X"E78F3BD1";
when 16#1DA4# => romdata <= X"339532C9";
when 16#1DA5# => romdata <= X"7E4EAA02";
when 16#1DA6# => romdata <= X"4CCC906E";
when 16#1DA7# => romdata <= X"BFB870C1";
when 16#1DA8# => romdata <= X"467C3D84";
when 16#1DA9# => romdata <= X"5A178EB0";
when 16#1DAA# => romdata <= X"7C11BE8D";
when 16#1DAB# => romdata <= X"57E4EDEA";
when 16#1DAC# => romdata <= X"7ADEF162";
when 16#1DAD# => romdata <= X"923E9521";
when 16#1DAE# => romdata <= X"451B871D";
when 16#1DAF# => romdata <= X"F6E357DC";
when 16#1DB0# => romdata <= X"EEA7F620";
when 16#1DB1# => romdata <= X"22106F64";
when 16#1DB2# => romdata <= X"7DD8A230";
when 16#1DB3# => romdata <= X"74AC10AA";
when 16#1DB4# => romdata <= X"632C56DC";
when 16#1DB5# => romdata <= X"32B34A4A";
when 16#1DB6# => romdata <= X"184FACC6";
when 16#1DB7# => romdata <= X"4E5D1E8F";
when 16#1DB8# => romdata <= X"D6926966";
when 16#1DB9# => romdata <= X"0543EEA2";
when 16#1DBA# => romdata <= X"FD584117";
when 16#1DBB# => romdata <= X"A3EBCF62";
when 16#1DBC# => romdata <= X"68352F02";
when 16#1DBD# => romdata <= X"12ABCE7C";
when 16#1DBE# => romdata <= X"D28A93C9";
when 16#1DBF# => romdata <= X"AF76722F";
when 16#1DC0# => romdata <= X"B5A71FF9";
when 16#1DC1# => romdata <= X"E5AC4579";
when 16#1DC2# => romdata <= X"A2BA32B9";
when 16#1DC3# => romdata <= X"1818CDCB";
when 16#1DC4# => romdata <= X"62C77A6A";
when 16#1DC5# => romdata <= X"8EB1F4C3";
when 16#1DC6# => romdata <= X"4132EB46";
when 16#1DC7# => romdata <= X"3812B329";
when 16#1DC8# => romdata <= X"B6B22108";
when 16#1DC9# => romdata <= X"AC36E71F";
when 16#1DCA# => romdata <= X"38338AE3";
when 16#1DCB# => romdata <= X"A52C6327";
when 16#1DCC# => romdata <= X"96E45189";
when 16#1DCD# => romdata <= X"632B73FD";
when 16#1DCE# => romdata <= X"C0BD37A4";
when 16#1DCF# => romdata <= X"57204757";
when 16#1DD0# => romdata <= X"261B7CFC";
when 16#1DD1# => romdata <= X"01E06BC7";
when 16#1DD2# => romdata <= X"67A57A5F";
when 16#1DD3# => romdata <= X"A7CFE437";
when 16#1DD4# => romdata <= X"94F65398";
when 16#1DD5# => romdata <= X"A94B4EF0";
when 16#1DD6# => romdata <= X"9D6DC2A8";
when 16#1DD7# => romdata <= X"691BD0CB";
when 16#1DD8# => romdata <= X"018BBE7B";
when 16#1DD9# => romdata <= X"66E0C37B";
when 16#1DDA# => romdata <= X"AA472324";
when 16#1DDB# => romdata <= X"7AF3424B";
when 16#1DDC# => romdata <= X"DE22614A";
when 16#1DDD# => romdata <= X"9A581A79";
when 16#1DDE# => romdata <= X"82E8C232";
when 16#1DDF# => romdata <= X"3178BD2D";
when 16#1DE0# => romdata <= X"46E6912A";
when 16#1DE1# => romdata <= X"2FB2D253";
when 16#1DE2# => romdata <= X"1819A180";
when 16#1DE3# => romdata <= X"689D7F2C";
when 16#1DE4# => romdata <= X"9B5C5AFC";
when 16#1DE5# => romdata <= X"2DCF1C7F";
when 16#1DE6# => romdata <= X"AEB1927E";
when 16#1DE7# => romdata <= X"B79A72EB";
when 16#1DE8# => romdata <= X"1203BB0F";
when 16#1DE9# => romdata <= X"F17DAAF2";
when 16#1DEA# => romdata <= X"7D660221";
when 16#1DEB# => romdata <= X"95890BBD";
when 16#1DEC# => romdata <= X"DA786CF1";
when 16#1DED# => romdata <= X"C36ABFD9";
when 16#1DEE# => romdata <= X"6BC36FA1";
when 16#1DEF# => romdata <= X"D2A5A0CC";
when 16#1DF0# => romdata <= X"3D7EEE1A";
when 16#1DF1# => romdata <= X"1050CA84";
when 16#1DF2# => romdata <= X"0209903C";
when 16#1DF3# => romdata <= X"B9FF429C";
when 16#1DF4# => romdata <= X"7EE9DF9C";
when 16#1DF5# => romdata <= X"BC2BAB84";
when 16#1DF6# => romdata <= X"CF28FAEF";
when 16#1DF7# => romdata <= X"5BB45AE9";
when 16#1DF8# => romdata <= X"588970A2";
when 16#1DF9# => romdata <= X"8B6BD9AD";
when 16#1DFA# => romdata <= X"F8DF134C";
when 16#1DFB# => romdata <= X"1FAB0DE2";
when 16#1DFC# => romdata <= X"74B5C745";
when 16#1DFD# => romdata <= X"2C4836A5";
when 16#1DFE# => romdata <= X"73A26A0B";
when 16#1DFF# => romdata <= X"4C14B740";
when 16#1E00# => romdata <= X"C6D5046A";
when 16#1E01# => romdata <= X"5000ECDB";
when 16#1E02# => romdata <= X"54C872F2";
when 16#1E03# => romdata <= X"DC494F2D";
when 16#1E04# => romdata <= X"EB884300";
when 16#1E05# => romdata <= X"07C9BE8E";
when 16#1E06# => romdata <= X"C39FFB14";
when 16#1E07# => romdata <= X"8F00F786";
when 16#1E08# => romdata <= X"1D827758";
when 16#1E09# => romdata <= X"9AC839AA";
when 16#1E0A# => romdata <= X"D30AF7D7";
when 16#1E0B# => romdata <= X"A2E0F9EE";
when 16#1E0C# => romdata <= X"8217A39C";
when 16#1E0D# => romdata <= X"521311E9";
when 16#1E0E# => romdata <= X"BD59A71B";
when 16#1E0F# => romdata <= X"C6663A77";
when 16#1E10# => romdata <= X"38669D6D";
when 16#1E11# => romdata <= X"3BB28124";
when 16#1E12# => romdata <= X"A80ABDF9";
when 16#1E13# => romdata <= X"05DFE2C9";
when 16#1E14# => romdata <= X"539CCF0C";
when 16#1E15# => romdata <= X"8FA39EF8";
when 16#1E16# => romdata <= X"4E9633D6";
when 16#1E17# => romdata <= X"3BE0C32F";
when 16#1E18# => romdata <= X"3B2AA9FC";
when 16#1E19# => romdata <= X"DC18AC38";
when 16#1E1A# => romdata <= X"C3C00924";
when 16#1E1B# => romdata <= X"E9D54977";
when 16#1E1C# => romdata <= X"BDAE6141";
when 16#1E1D# => romdata <= X"0F997038";
when 16#1E1E# => romdata <= X"BE066DA6";
when 16#1E1F# => romdata <= X"C945D825";
when 16#1E20# => romdata <= X"8B7DD133";
when 16#1E21# => romdata <= X"EECBA836";
when 16#1E22# => romdata <= X"A7A6A290";
when 16#1E23# => romdata <= X"7C431C52";
when 16#1E24# => romdata <= X"2619D466";
when 16#1E25# => romdata <= X"430E6ACF";
when 16#1E26# => romdata <= X"15030F7F";
when 16#1E27# => romdata <= X"BA4F3D6B";
when 16#1E28# => romdata <= X"B545CAD8";
when 16#1E29# => romdata <= X"5678E818";
when 16#1E2A# => romdata <= X"98D2DE35";
when 16#1E2B# => romdata <= X"8CFF3951";
when 16#1E2C# => romdata <= X"C8184066";
when 16#1E2D# => romdata <= X"B18930DD";
when 16#1E2E# => romdata <= X"A8678908";
when 16#1E2F# => romdata <= X"71AF6F41";
when 16#1E30# => romdata <= X"33B492FC";
when 16#1E31# => romdata <= X"894DBE4A";
when 16#1E32# => romdata <= X"A5F1E44B";
when 16#1E33# => romdata <= X"D361C456";
when 16#1E34# => romdata <= X"0ABBCD31";
when 16#1E35# => romdata <= X"01B4AA4E";
when 16#1E36# => romdata <= X"065FD603";
when 16#1E37# => romdata <= X"08795DDA";
when 16#1E38# => romdata <= X"EBADBB60";
when 16#1E39# => romdata <= X"4A3D5877";
when 16#1E3A# => romdata <= X"6006CD07";
when 16#1E3B# => romdata <= X"4389AF49";
when 16#1E3C# => romdata <= X"A0EF0958";
when 16#1E3D# => romdata <= X"6410015C";
when 16#1E3E# => romdata <= X"7DE4FEFE";
when 16#1E3F# => romdata <= X"EBEA6262";
when 16#1E40# => romdata <= X"B23571B9";
when 16#1E41# => romdata <= X"3BEE15CD";
when 16#1E42# => romdata <= X"A2BBA60B";
when 16#1E43# => romdata <= X"6CC72A7D";
when 16#1E44# => romdata <= X"C9C80C81";
when 16#1E45# => romdata <= X"C9A25FE3";
when 16#1E46# => romdata <= X"D149C7A8";
when 16#1E47# => romdata <= X"BB2F704B";
when 16#1E48# => romdata <= X"E11177F9";
when 16#1E49# => romdata <= X"2E2CEF0B";
when 16#1E4A# => romdata <= X"BD12C076";
when 16#1E4B# => romdata <= X"6D691CCF";
when 16#1E4C# => romdata <= X"093D456A";
when 16#1E4D# => romdata <= X"FEA411A8";
when 16#1E4E# => romdata <= X"FE5F1C1A";
when 16#1E4F# => romdata <= X"44F31017";
when 16#1E50# => romdata <= X"760F0D0C";
when 16#1E51# => romdata <= X"C3B271FB";
when 16#1E52# => romdata <= X"15F56D9F";
when 16#1E53# => romdata <= X"51A594C3";
when 16#1E54# => romdata <= X"4FDFF8F8";
when 16#1E55# => romdata <= X"ADC91584";
when 16#1E56# => romdata <= X"ED8D7E1B";
when 16#1E57# => romdata <= X"6DAB27B2";
when 16#1E58# => romdata <= X"BE1BBDC4";
when 16#1E59# => romdata <= X"486FB1C8";
when 16#1E5A# => romdata <= X"22F23704";
when 16#1E5B# => romdata <= X"BB2EF4B5";
when 16#1E5C# => romdata <= X"21E02E42";
when 16#1E5D# => romdata <= X"FDCABF69";
when 16#1E5E# => romdata <= X"588B0B9D";
when 16#1E5F# => romdata <= X"92AAA731";
when 16#1E60# => romdata <= X"16D26E8E";
when 16#1E61# => romdata <= X"9E48DE94";
when 16#1E62# => romdata <= X"F6267414";
when 16#1E63# => romdata <= X"AC845467";
when 16#1E64# => romdata <= X"597B4C1F";
when 16#1E65# => romdata <= X"2A9A8E1E";
when 16#1E66# => romdata <= X"82C0A1C0";
when 16#1E67# => romdata <= X"5955022C";
when 16#1E68# => romdata <= X"DF873860";
when 16#1E69# => romdata <= X"98EAFC5B";
when 16#1E6A# => romdata <= X"F1A04071";
when 16#1E6B# => romdata <= X"6A89BE53";
when 16#1E6C# => romdata <= X"A36B1433";
when 16#1E6D# => romdata <= X"76927028";
when 16#1E6E# => romdata <= X"A561BBC0";
when 16#1E6F# => romdata <= X"7AFAF424";
when 16#1E70# => romdata <= X"94DF5BC0";
when 16#1E71# => romdata <= X"D95170D8";
when 16#1E72# => romdata <= X"53DCCCCB";
when 16#1E73# => romdata <= X"22FD36B7";
when 16#1E74# => romdata <= X"947712EB";
when 16#1E75# => romdata <= X"369077D0";
when 16#1E76# => romdata <= X"2BF85B0A";
when 16#1E77# => romdata <= X"4F57757E";
when 16#1E78# => romdata <= X"D80B247E";
when 16#1E79# => romdata <= X"521AC640";
when 16#1E7A# => romdata <= X"D1B1CE30";
when 16#1E7B# => romdata <= X"F93DEBBE";
when 16#1E7C# => romdata <= X"2389D364";
when 16#1E7D# => romdata <= X"A8B7971A";
when 16#1E7E# => romdata <= X"51AFA4F5";
when 16#1E7F# => romdata <= X"57A8E120";
when 16#1E80# => romdata <= X"FDCF36E6";
when 16#1E81# => romdata <= X"C842D2AB";
when 16#1E82# => romdata <= X"CCE9D878";
when 16#1E83# => romdata <= X"3D0D7A7E";
when 16#1E84# => romdata <= X"B74992EA";
when 16#1E85# => romdata <= X"CEEF6C61";
when 16#1E86# => romdata <= X"8AC7DED4";
when 16#1E87# => romdata <= X"E457B1A7";
when 16#1E88# => romdata <= X"08BE2C82";
when 16#1E89# => romdata <= X"B28A9563";
when 16#1E8A# => romdata <= X"F4A088FF";
when 16#1E8B# => romdata <= X"7DB146B1";
when 16#1E8C# => romdata <= X"6B47A900";
when 16#1E8D# => romdata <= X"DF49A4F3";
when 16#1E8E# => romdata <= X"FA8EDAAF";
when 16#1E8F# => romdata <= X"CA09F408";
when 16#1E90# => romdata <= X"B025D04E";
when 16#1E91# => romdata <= X"B673E105";
when 16#1E92# => romdata <= X"E0F55959";
when 16#1E93# => romdata <= X"B7951CF0";
when 16#1E94# => romdata <= X"E999CDF6";
when 16#1E95# => romdata <= X"8EA9B323";
when 16#1E96# => romdata <= X"33DBFE05";
when 16#1E97# => romdata <= X"16D27211";
when 16#1E98# => romdata <= X"1CBBD993";
when 16#1E99# => romdata <= X"3CA8AD8A";
when 16#1E9A# => romdata <= X"A6025E5F";
when 16#1E9B# => romdata <= X"9A062D83";
when 16#1E9C# => romdata <= X"05344CAF";
when 16#1E9D# => romdata <= X"C3CA391B";
when 16#1E9E# => romdata <= X"D8DEBDC5";
when 16#1E9F# => romdata <= X"8F7FDBC0";
when 16#1EA0# => romdata <= X"41B34990";
when 16#1EA1# => romdata <= X"0E397609";
when 16#1EA2# => romdata <= X"C71E4EA3";
when 16#1EA3# => romdata <= X"A9D8407C";
when 16#1EA4# => romdata <= X"63E8A6BB";
when 16#1EA5# => romdata <= X"EEAEFC92";
when 16#1EA6# => romdata <= X"E9C93914";
when 16#1EA7# => romdata <= X"7920E48E";
when 16#1EA8# => romdata <= X"35DAC6D1";
when 16#1EA9# => romdata <= X"23DA46E4";
when 16#1EAA# => romdata <= X"F0838FD7";
when 16#1EAB# => romdata <= X"32E43FE4";
when 16#1EAC# => romdata <= X"EEF6BD68";
when 16#1EAD# => romdata <= X"D5AF0C9B";
when 16#1EAE# => romdata <= X"A3A0CB28";
when 16#1EAF# => romdata <= X"233743B2";
when 16#1EB0# => romdata <= X"91D4E100";
when 16#1EB1# => romdata <= X"54F695DC";
when 16#1EB2# => romdata <= X"10A847E6";
when 16#1EB3# => romdata <= X"61F39C4C";
when 16#1EB4# => romdata <= X"133289B0";
when 16#1EB5# => romdata <= X"7ACA8B54";
when 16#1EB6# => romdata <= X"4EE3E2EC";
when 16#1EB7# => romdata <= X"288CB18C";
when 16#1EB8# => romdata <= X"40CD9A8E";
when 16#1EB9# => romdata <= X"48A93378";
when 16#1EBA# => romdata <= X"FD50E077";
when 16#1EBB# => romdata <= X"EFBC2199";
when 16#1EBC# => romdata <= X"6424B539";
when 16#1EBD# => romdata <= X"A397B3D2";
when 16#1EBE# => romdata <= X"A6C7DE58";
when 16#1EBF# => romdata <= X"112CF55E";
when 16#1EC0# => romdata <= X"82E8FF10";
when 16#1EC1# => romdata <= X"F75571A1";
when 16#1EC2# => romdata <= X"5DC248E6";
when 16#1EC3# => romdata <= X"B77CBB91";
when 16#1EC4# => romdata <= X"D8BF2D53";
when 16#1EC5# => romdata <= X"E5C4E9A8";
when 16#1EC6# => romdata <= X"5C7EB8FB";
when 16#1EC7# => romdata <= X"690F74BE";
when 16#1EC8# => romdata <= X"029CE1B5";
when 16#1EC9# => romdata <= X"69EFACFC";
when 16#1ECA# => romdata <= X"16872C50";
when 16#1ECB# => romdata <= X"08820FC6";
when 16#1ECC# => romdata <= X"A7D12AB4";
when 16#1ECD# => romdata <= X"3E08B4AF";
when 16#1ECE# => romdata <= X"F57DE6B4";
when 16#1ECF# => romdata <= X"3B613DF8";
when 16#1ED0# => romdata <= X"480ACA55";
when 16#1ED1# => romdata <= X"6E29D792";
when 16#1ED2# => romdata <= X"C6C81CB1";
when 16#1ED3# => romdata <= X"CB54A672";
when 16#1ED4# => romdata <= X"45C571A0";
when 16#1ED5# => romdata <= X"4965267B";
when 16#1ED6# => romdata <= X"A0F9CD3F";
when 16#1ED7# => romdata <= X"A0950B9A";
when 16#1ED8# => romdata <= X"5B393B4A";
when 16#1ED9# => romdata <= X"230A41E4";
when 16#1EDA# => romdata <= X"55267CD3";
when 16#1EDB# => romdata <= X"96F42285";
when 16#1EDC# => romdata <= X"F0E49C5A";
when 16#1EDD# => romdata <= X"FA0B53EC";
when 16#1EDE# => romdata <= X"7B60C1C3";
when 16#1EDF# => romdata <= X"17EDA3FA";
when 16#1EE0# => romdata <= X"E4B1713A";
when 16#1EE1# => romdata <= X"80D4EBAD";
when 16#1EE2# => romdata <= X"32FC685C";
when 16#1EE3# => romdata <= X"13649C48";
when 16#1EE4# => romdata <= X"06D6FD88";
when 16#1EE5# => romdata <= X"7A24A4F7";
when 16#1EE6# => romdata <= X"AE801405";
when 16#1EE7# => romdata <= X"EF28F058";
when 16#1EE8# => romdata <= X"B37112A6";
when 16#1EE9# => romdata <= X"80F9E9AD";
when 16#1EEA# => romdata <= X"0456314E";
when 16#1EEB# => romdata <= X"9F490393";
when 16#1EEC# => romdata <= X"CA257757";
when 16#1EED# => romdata <= X"97E4CCF9";
when 16#1EEE# => romdata <= X"184FF0C6";
when 16#1EEF# => romdata <= X"A237AFFA";
when 16#1EF0# => romdata <= X"8DE1B84C";
when 16#1EF1# => romdata <= X"420A6183";
when 16#1EF2# => romdata <= X"B1D49D6F";
when 16#1EF3# => romdata <= X"2AC1E673";
when 16#1EF4# => romdata <= X"E7FDE161";
when 16#1EF5# => romdata <= X"A8159DCE";
when 16#1EF6# => romdata <= X"B00D85F0";
when 16#1EF7# => romdata <= X"32EE76E3";
when 16#1EF8# => romdata <= X"931C459C";
when 16#1EF9# => romdata <= X"E935DFE4";
when 16#1EFA# => romdata <= X"AD6C6110";
when 16#1EFB# => romdata <= X"591EE584";
when 16#1EFC# => romdata <= X"96B82A16";
when 16#1EFD# => romdata <= X"630E8232";
when 16#1EFE# => romdata <= X"0B951088";
when 16#1EFF# => romdata <= X"0BE4E720";
when 16#1F00# => romdata <= X"94964FC9";
when 16#1F01# => romdata <= X"F66389FE";
when 16#1F02# => romdata <= X"3880283C";
when 16#1F03# => romdata <= X"4250E6E1";
when 16#1F04# => romdata <= X"9F195DFE";
when 16#1F05# => romdata <= X"BD2104FC";
when 16#1F06# => romdata <= X"0959E084";
when 16#1F07# => romdata <= X"308BC9CF";
when 16#1F08# => romdata <= X"DC6E5ED1";
when 16#1F09# => romdata <= X"C4B48B4E";
when 16#1F0A# => romdata <= X"CAEB4FDE";
when 16#1F0B# => romdata <= X"5F215FBE";
when 16#1F0C# => romdata <= X"D85A6CD4";
when 16#1F0D# => romdata <= X"D1C1466E";
when 16#1F0E# => romdata <= X"68A4CF21";
when 16#1F0F# => romdata <= X"AEF29F77";
when 16#1F10# => romdata <= X"933549A3";
when 16#1F11# => romdata <= X"A6FF7ACD";
when 16#1F12# => romdata <= X"8AB6E6C6";
when 16#1F13# => romdata <= X"89F1E8DF";
when 16#1F14# => romdata <= X"0AD8AB28";
when 16#1F15# => romdata <= X"9D5C3302";
when 16#1F16# => romdata <= X"3DF90B21";
when 16#1F17# => romdata <= X"A26320CE";
when 16#1F18# => romdata <= X"8C1CEB2C";
when 16#1F19# => romdata <= X"099FC1DB";
when 16#1F1A# => romdata <= X"58737665";
when 16#1F1B# => romdata <= X"855DCD20";
when 16#1F1C# => romdata <= X"D587E176";
when 16#1F1D# => romdata <= X"483E33EF";
when 16#1F1E# => romdata <= X"14C80AA4";
when 16#1F1F# => romdata <= X"760F751E";
when 16#1F20# => romdata <= X"E5B28460";
when 16#1F21# => romdata <= X"811E5110";
when 16#1F22# => romdata <= X"FEC3D689";
when 16#1F23# => romdata <= X"AE2A6E91";
when 16#1F24# => romdata <= X"D0A3F1E2";
when 16#1F25# => romdata <= X"2623E885";
when 16#1F26# => romdata <= X"71F4DAC8";
when 16#1F27# => romdata <= X"95AA428D";
when 16#1F28# => romdata <= X"42634EC1";
when 16#1F29# => romdata <= X"42E56D0D";
when 16#1F2A# => romdata <= X"57CE68D7";
when 16#1F2B# => romdata <= X"949BE13A";
when 16#1F2C# => romdata <= X"F234229E";
when 16#1F2D# => romdata <= X"546E9D66";
when 16#1F2E# => romdata <= X"D5C58E51";
when 16#1F2F# => romdata <= X"0BF3EAC7";
when 16#1F30# => romdata <= X"B73309BE";
when 16#1F31# => romdata <= X"16DCE6E2";
when 16#1F32# => romdata <= X"280AA802";
when 16#1F33# => romdata <= X"47D9EDED";
when 16#1F34# => romdata <= X"D20E0629";
when 16#1F35# => romdata <= X"5C9876B4";
when 16#1F36# => romdata <= X"12B786CF";
when 16#1F37# => romdata <= X"7E5F1073";
when 16#1F38# => romdata <= X"79215813";
when 16#1F39# => romdata <= X"1AFA002F";
when 16#1F3A# => romdata <= X"E7750A17";
when 16#1F3B# => romdata <= X"015A9C25";
when 16#1F3C# => romdata <= X"80646A9A";
when 16#1F3D# => romdata <= X"0D2A3F02";
when 16#1F3E# => romdata <= X"43AF1AB4";
when 16#1F3F# => romdata <= X"FEFB3D02";
when 16#1F40# => romdata <= X"8504553A";
when 16#1F41# => romdata <= X"F9C5C34D";
when 16#1F42# => romdata <= X"1A4A2FE3";
when 16#1F43# => romdata <= X"B8DD8BF8";
when 16#1F44# => romdata <= X"CEADA82A";
when 16#1F45# => romdata <= X"E63C319B";
when 16#1F46# => romdata <= X"D7981D97";
when 16#1F47# => romdata <= X"155AA2F1";
when 16#1F48# => romdata <= X"05D724A8";
when 16#1F49# => romdata <= X"C09310D5";
when 16#1F4A# => romdata <= X"C3168770";
when 16#1F4B# => romdata <= X"62152419";
when 16#1F4C# => romdata <= X"A006ABF5";
when 16#1F4D# => romdata <= X"6AADED74";
when 16#1F4E# => romdata <= X"DF0DF325";
when 16#1F4F# => romdata <= X"D666C31D";
when 16#1F50# => romdata <= X"F51F194C";
when 16#1F51# => romdata <= X"FEB331E7";
when 16#1F52# => romdata <= X"DAF00410";
when 16#1F53# => romdata <= X"372999D2";
when 16#1F54# => romdata <= X"D05B023B";
when 16#1F55# => romdata <= X"2C3067E6";
when 16#1F56# => romdata <= X"CE4A472F";
when 16#1F57# => romdata <= X"ED3B8BE1";
when 16#1F58# => romdata <= X"C15C24DF";
when 16#1F59# => romdata <= X"BF4956A5";
when 16#1F5A# => romdata <= X"B670FFCF";
when 16#1F5B# => romdata <= X"128E5A23";
when 16#1F5C# => romdata <= X"039764BE";
when 16#1F5D# => romdata <= X"39CBE556";
when 16#1F5E# => romdata <= X"36B83674";
when 16#1F5F# => romdata <= X"060B3CCF";
when 16#1F60# => romdata <= X"5EF9A7B7";
when 16#1F61# => romdata <= X"EAB0813A";
when 16#1F62# => romdata <= X"DEE82E27";
when 16#1F63# => romdata <= X"1C422FB7";
when 16#1F64# => romdata <= X"8A982000";
when 16#1F65# => romdata <= X"7753B1E6";
when 16#1F66# => romdata <= X"2BF4CCC0";
when 16#1F67# => romdata <= X"74F7796D";
when 16#1F68# => romdata <= X"5B2008FE";
when 16#1F69# => romdata <= X"6542DC0C";
when 16#1F6A# => romdata <= X"77ECA381";
when 16#1F6B# => romdata <= X"0120ABE9";
when 16#1F6C# => romdata <= X"F90BE593";
when 16#1F6D# => romdata <= X"4E8EAE36";
when 16#1F6E# => romdata <= X"5D02B3D2";
when 16#1F6F# => romdata <= X"DF4EA4A8";
when 16#1F70# => romdata <= X"27E03326";
when 16#1F71# => romdata <= X"3B113EEE";
when 16#1F72# => romdata <= X"5823DD39";
when 16#1F73# => romdata <= X"12FB31E3";
when 16#1F74# => romdata <= X"C4B46B27";
when 16#1F75# => romdata <= X"4D7115F3";
when 16#1F76# => romdata <= X"4CDA793D";
when 16#1F77# => romdata <= X"B6AD2CD8";
when 16#1F78# => romdata <= X"BCAF4B13";
when 16#1F79# => romdata <= X"B832AB60";
when 16#1F7A# => romdata <= X"5BE42B28";
when 16#1F7B# => romdata <= X"77EE2E66";
when 16#1F7C# => romdata <= X"B411668E";
when 16#1F7D# => romdata <= X"A29A7DBA";
when 16#1F7E# => romdata <= X"5BD969B9";
when 16#1F7F# => romdata <= X"F1526380";
when 16#1F80# => romdata <= X"9B8071D9";
when 16#1F81# => romdata <= X"6E7D361B";
when 16#1F82# => romdata <= X"2462CA93";
when 16#1F83# => romdata <= X"748DE4D3";
when 16#1F84# => romdata <= X"1746972D";
when 16#1F85# => romdata <= X"AE582AD4";
when 16#1F86# => romdata <= X"F70A188C";
when 16#1F87# => romdata <= X"B40C2E6E";
when 16#1F88# => romdata <= X"418288B6";
when 16#1F89# => romdata <= X"A713ED4B";
when 16#1F8A# => romdata <= X"647013B3";
when 16#1F8B# => romdata <= X"EC31C9EA";
when 16#1F8C# => romdata <= X"6217DE55";
when 16#1F8D# => romdata <= X"D016A197";
when 16#1F8E# => romdata <= X"7A0B2852";
when 16#1F8F# => romdata <= X"24129CDC";
when 16#1F90# => romdata <= X"59A9E54F";
when 16#1F91# => romdata <= X"3E509425";
when 16#1F92# => romdata <= X"8F11C0C9";
when 16#1F93# => romdata <= X"95F60785";
when 16#1F94# => romdata <= X"614E5607";
when 16#1F95# => romdata <= X"64312CD8";
when 16#1F96# => romdata <= X"6C6969B3";
when 16#1F97# => romdata <= X"274236EE";
when 16#1F98# => romdata <= X"602EFAE3";
when 16#1F99# => romdata <= X"92C015E4";
when 16#1F9A# => romdata <= X"C3972D6F";
when 16#1F9B# => romdata <= X"A2A47AB4";
when 16#1F9C# => romdata <= X"8D5C5F68";
when 16#1F9D# => romdata <= X"36AFA54F";
when 16#1F9E# => romdata <= X"28CCC03B";
when 16#1F9F# => romdata <= X"B4DAA0A1";
when 16#1FA0# => romdata <= X"DC0DCA3F";
when 16#1FA1# => romdata <= X"D3F2B15F";
when 16#1FA2# => romdata <= X"B2ADD907";
when 16#1FA3# => romdata <= X"D3BF7719";
when 16#1FA4# => romdata <= X"D1D9A828";
when 16#1FA5# => romdata <= X"4A47C30F";
when 16#1FA6# => romdata <= X"32712A8C";
when 16#1FA7# => romdata <= X"D440148B";
when 16#1FA8# => romdata <= X"8DFDB851";
when 16#1FA9# => romdata <= X"FFD25ECA";
when 16#1FAA# => romdata <= X"2864150B";
when 16#1FAB# => romdata <= X"832F8B5D";
when 16#1FAC# => romdata <= X"C3A7C701";
when 16#1FAD# => romdata <= X"371785A6";
when 16#1FAE# => romdata <= X"6285601E";
when 16#1FAF# => romdata <= X"96D285FF";
when 16#1FB0# => romdata <= X"88947804";
when 16#1FB1# => romdata <= X"AA4D8866";
when 16#1FB2# => romdata <= X"5B3E1576";
when 16#1FB3# => romdata <= X"0CDE327F";
when 16#1FB4# => romdata <= X"BD213930";
when 16#1FB5# => romdata <= X"42BAF62F";
when 16#1FB6# => romdata <= X"DCE6EC41";
when 16#1FB7# => romdata <= X"955E877E";
when 16#1FB8# => romdata <= X"CAC331D5";
when 16#1FB9# => romdata <= X"94ED4054";
when 16#1FBA# => romdata <= X"7AFED34D";
when 16#1FBB# => romdata <= X"410714CE";
when 16#1FBC# => romdata <= X"57FCB4F0";
when 16#1FBD# => romdata <= X"1C882651";
when 16#1FBE# => romdata <= X"9ACB85F4";
when 16#1FBF# => romdata <= X"47306C86";
when 16#1FC0# => romdata <= X"BD1BA818";
when 16#1FC1# => romdata <= X"9E0621DD";
when 16#1FC2# => romdata <= X"09451E8F";
when 16#1FC3# => romdata <= X"341AE47E";
when 16#1FC4# => romdata <= X"7FCF1FD2";
when 16#1FC5# => romdata <= X"DE2AF78E";
when 16#1FC6# => romdata <= X"0AFA27A4";
when 16#1FC7# => romdata <= X"B6DD51A0";
when 16#1FC8# => romdata <= X"710FC1FC";
when 16#1FC9# => romdata <= X"4A599823";
when 16#1FCA# => romdata <= X"4EDAA1D4";
when 16#1FCB# => romdata <= X"CF0786B7";
when 16#1FCC# => romdata <= X"79F637EE";
when 16#1FCD# => romdata <= X"1A720587";
when 16#1FCE# => romdata <= X"74C1B4BF";
when 16#1FCF# => romdata <= X"5E125DEB";
when 16#1FD0# => romdata <= X"B4230645";
when 16#1FD1# => romdata <= X"ECF87E3C";
when 16#1FD2# => romdata <= X"6FDC91E1";
when 16#1FD3# => romdata <= X"D14397FA";
when 16#1FD4# => romdata <= X"72686784";
when 16#1FD5# => romdata <= X"815D9654";
when 16#1FD6# => romdata <= X"839AE8FA";
when 16#1FD7# => romdata <= X"43864709";
when 16#1FD8# => romdata <= X"EE0F4A33";
when 16#1FD9# => romdata <= X"6E3C399C";
when 16#1FDA# => romdata <= X"A20B2E65";
when 16#1FDB# => romdata <= X"2E2AB177";
when 16#1FDC# => romdata <= X"19F9253F";
when 16#1FDD# => romdata <= X"772EB7A9";
when 16#1FDE# => romdata <= X"E8838FED";
when 16#1FDF# => romdata <= X"4EBCD0F8";
when 16#1FE0# => romdata <= X"CD977583";
when 16#1FE1# => romdata <= X"BDCEEBBD";
when 16#1FE2# => romdata <= X"925676F5";
when 16#1FE3# => romdata <= X"6AAB0C36";
when 16#1FE4# => romdata <= X"F3DD915F";
when 16#1FE5# => romdata <= X"6691A30D";
when 16#1FE6# => romdata <= X"60D52321";
when 16#1FE7# => romdata <= X"6FB233CB";
when 16#1FE8# => romdata <= X"BEDE7FDF";
when 16#1FE9# => romdata <= X"BA827450";
when 16#1FEA# => romdata <= X"E595AB51";
when 16#1FEB# => romdata <= X"237F9E77";
when 16#1FEC# => romdata <= X"058E40F8";
when 16#1FED# => romdata <= X"62D3A5A9";
when 16#1FEE# => romdata <= X"6E4AA3DA";
when 16#1FEF# => romdata <= X"74503812";
when 16#1FF0# => romdata <= X"EDEFA501";
when 16#1FF1# => romdata <= X"E526DB6B";
when 16#1FF2# => romdata <= X"4C642222";
when 16#1FF3# => romdata <= X"D7F33B06";
when 16#1FF4# => romdata <= X"D9CD0023";
when 16#1FF5# => romdata <= X"471DF573";
when 16#1FF6# => romdata <= X"0CF8E2BE";
when 16#1FF7# => romdata <= X"E834D108";
when 16#1FF8# => romdata <= X"A25729C1";
when 16#1FF9# => romdata <= X"C1484C20";
when 16#1FFA# => romdata <= X"7ECEB0E4";
when 16#1FFB# => romdata <= X"598965EA";
when 16#1FFC# => romdata <= X"B5216D4E";
when 16#1FFD# => romdata <= X"7C30577A";
when 16#1FFE# => romdata <= X"89FB8BEC";
when 16#1FFF# => romdata <= X"0B118F40";
when others => romdata <= (others => '0');
end case;
end process;
end;
| apache-2.0 | 3b91ce4b58a79d3998ff177410aa6511 | 0.577693 | 2.507523 | false | false | false | false |
mharndt/profibusmonitor | VHDL_Bausteine/TEST_CTRL_BIT_REGISTER/CTRL_BIT_REGISTER.vhd | 2 | 19,522 | -- CTRL_BIT_REGISTER
-- Einlesen der einzelnen Werte für bestimmte Bits, Berechung der Parität und Ausgabe als Byte
-- Projekt: PROFIBUS MONITOR
-- Ersteller: Martin Harndt
-- Erstellt: 08.01.2013
-- Bearbeiter: mharndt
-- Geaendert: 24.04.2013 (Erweiterungen für Testumgebung)
-- Umstellung auf: rising_edge(CLK) und falling_edge(CLK) und http://www.sigasi.com/content/clock-edge-detection
-- Optimierungen aus: http://www.lothar-miller.de/s9y/categories/37-FSM
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity CTRL_BIT_REGISTER is
Port (EN_BIT_i : in std_logic_vector (7 downto 0); --Eingangsvariable, Einschalten des Bitregisters i ##(8 downto 0) zum Testen auf (7 downto 0) verringert##
EN_BIT_8 : in std_logic; --Eingangsvariable, Einschalten des Bitregisters 8 ##NurZumTesten Eingang dauerhaft auf 1 (Vcc) setzen##
BIT_VALUE : in std_logic; -- Eingangsvariable, Wert des aktuellen Bits
BYTE_OUT : out std_logic_vector (7 downto 0); --Ausgangsvariable, Byte, 8bit, Vektor
PARITY_OK : out std_logic; --Ausgangsvariable, Parität i.O.
CLK : in std_logic; --Taktvariable
IN_NEXT_STATE: in std_logic; --1:Zustandsuebergang möglich
RESET : in std_logic; --1: Initialzustand annehmen
DISPL1_SV : out std_logic_vector (3 downto 0); --aktueller Zustand Zahl1, binärzahl
DISPL2_SV : out std_logic_vector (3 downto 0); --aktueller Zustand Zahl2, binärzahl
DISPL1_n_SV : out std_logic_vector (3 downto 0); --Folgezustand Zahl1, binärzahl
DISPL2_n_SV : out std_logic_vector (3 downto 0)); --Folgezustand Zahl2, binärzahl
end CTRL_BIT_REGISTER;
architecture Behavioral of CTRL_BIT_REGISTER is
type TYPE_STATE_BR_BIT0 is
(ST_BR_EN_BIT0_0, --Zustaende BIT_REGISTER BIT0
ST_BR_EN_BIT0_1);
type TYPE_STATE_BR_BIT1 is
(ST_BR_EN_BIT1_0, --Zustaende BIT_REGISTER BIT1
ST_BR_EN_BIT1_1);
type TYPE_STATE_BR_BIT2 is
(ST_BR_EN_BIT2_0, --Zustaende BIT_REGISTER BIT2
ST_BR_EN_BIT2_1);
type TYPE_STATE_BR_BIT3 is
(ST_BR_EN_BIT3_0, --Zustaende BIT_REGISTER BIT3
ST_BR_EN_BIT3_1);
type TYPE_STATE_BR_BIT4 is
(ST_BR_EN_BIT4_0, --Zustaende BIT_REGISTER BIT4
ST_BR_EN_BIT4_1);
type TYPE_STATE_BR_BIT5 is
(ST_BR_EN_BIT5_0, --Zustaende BIT_REGISTER BIT5
ST_BR_EN_BIT5_1);
type TYPE_STATE_BR_BIT6 is
(ST_BR_EN_BIT6_0, --Zustaende BIT_REGISTER BIT6
ST_BR_EN_BIT6_1);
type TYPE_STATE_BR_BIT7 is
(ST_BR_EN_BIT7_0, --Zustaende BIT_REGISTER BIT7
ST_BR_EN_BIT7_1);
type TYPE_STATE_BR_BIT8 is
(ST_BR_EN_BIT8_0, --Zustaende BIT_REGISTER BIT8
ST_BR_EN_BIT8_1);
signal SV_BR_BIT0 : TYPE_STATE_BR_BIT0 := ST_BR_EN_BIT0_0; --Zustandsvariable BIT_REGSITER BIT0
signal n_SV_BR_BIT0: TYPE_STATE_BR_BIT0 := ST_BR_EN_BIT0_0; --Zustandsvariable BIT_REGSITER BIT0, neuer Wert
signal SV_BR_BIT0_M: TYPE_STATE_BR_BIT0 := ST_BR_EN_BIT0_0; --Zustandsvariable BIT_REGSITER BIT0, Ausgang Master
signal SV_BR_BIT1 : TYPE_STATE_BR_BIT1 := ST_BR_EN_BIT1_0; --Zustandsvariable BIT_REGSITER BIT1
signal n_SV_BR_BIT1: TYPE_STATE_BR_BIT1 := ST_BR_EN_BIT1_0; --Zustandsvariable BIT_REGSITER BIT1, neuer Wert
signal SV_BR_BIT1_M: TYPE_STATE_BR_BIT1 := ST_BR_EN_BIT1_0; --Zustandsvariable BIT_REGSITER BIT1, Ausgang Master
signal SV_BR_BIT2 : TYPE_STATE_BR_BIT2 := ST_BR_EN_BIT2_0; --Zustandsvariable BIT_REGSITER BIT2
signal n_SV_BR_BIT2: TYPE_STATE_BR_BIT2 := ST_BR_EN_BIT2_0; --Zustandsvariable BIT_REGSITER BIT2, neuer Wert
signal SV_BR_BIT2_M: TYPE_STATE_BR_BIT2 := ST_BR_EN_BIT2_0; --Zustandsvariable BIT_REGSITER BIT2, Ausgang Master
signal SV_BR_BIT3 : TYPE_STATE_BR_BIT3 := ST_BR_EN_BIT3_0; --Zustandsvariable BIT_REGSITER BIT3
signal n_SV_BR_BIT3: TYPE_STATE_BR_BIT3 := ST_BR_EN_BIT3_0; --Zustandsvariable BIT_REGSITER BIT3, neuer Wert
signal SV_BR_BIT3_M: TYPE_STATE_BR_BIT3 := ST_BR_EN_BIT3_0; --Zustandsvariable BIT_REGSITER BIT3, Ausgang Master
signal SV_BR_BIT4 : TYPE_STATE_BR_BIT4 := ST_BR_EN_BIT4_0; --Zustandsvariable BIT_REGSITER BIT4
signal n_SV_BR_BIT4: TYPE_STATE_BR_BIT4 := ST_BR_EN_BIT4_0; --Zustandsvariable BIT_REGSITER BIT4, neuer Wert
signal SV_BR_BIT4_M: TYPE_STATE_BR_BIT4 := ST_BR_EN_BIT4_0; --Zustandsvariable BIT_REGSITER BIT4, Ausgang Master
signal SV_BR_BIT5 : TYPE_STATE_BR_BIT5 := ST_BR_EN_BIT5_0; --Zustandsvariable BIT_REGSITER BIT5
signal n_SV_BR_BIT5: TYPE_STATE_BR_BIT5 := ST_BR_EN_BIT5_0; --Zustandsvariable BIT_REGSITER BIT5, neuer Wert
signal SV_BR_BIT5_M: TYPE_STATE_BR_BIT5 := ST_BR_EN_BIT5_0; --Zustandsvariable BIT_REGSITER BIT5, Ausgang Master
signal SV_BR_BIT6 : TYPE_STATE_BR_BIT6 := ST_BR_EN_BIT6_0; --Zustandsvariable BIT_REGSITER BIT6
signal n_SV_BR_BIT6: TYPE_STATE_BR_BIT6 := ST_BR_EN_BIT6_0; --Zustandsvariable BIT_REGSITER BIT6, neuer Wert
signal SV_BR_BIT6_M: TYPE_STATE_BR_BIT6 := ST_BR_EN_BIT6_0; --Zustandsvariable BIT_REGSITER BIT6, Ausgang Master
signal SV_BR_BIT7 : TYPE_STATE_BR_BIT7 := ST_BR_EN_BIT7_0; --Zustandsvariable BIT_REGSITER BIT7
signal n_SV_BR_BIT7: TYPE_STATE_BR_BIT7 := ST_BR_EN_BIT7_0; --Zustandsvariable BIT_REGSITER BIT7, neuer Wert
signal SV_BR_BIT7_M: TYPE_STATE_BR_BIT7 := ST_BR_EN_BIT7_0; --Zustandsvariable BIT_REGSITER BIT7, Ausgang Master
signal SV_BR_BIT8 : TYPE_STATE_BR_BIT8 := ST_BR_EN_BIT8_0; --Zustandsvariable BIT_REGSITER BIT8
signal n_SV_BR_BIT8: TYPE_STATE_BR_BIT8 := ST_BR_EN_BIT8_0; --Zustandsvariable BIT_REGSITER BIT8, neuer Wert
signal SV_BR_BIT8_M: TYPE_STATE_BR_BIT8 := ST_BR_EN_BIT8_0; --Zustandsvariable BIT_REGSITER BIT8, Ausgang Master
signal BYTE_VEC : std_logic_vector (8 downto 0) := b"000000000"; -- Vektor, BIT_REGSITER, vor Auswertung der Checksume
signal STATE_SV : std_logic_vector (7 downto 0) := x"00"; -- aktueller Zustand in 8 Bit, binär
signal STATE_n_SV : std_logic_vector (7 downto 0) := x"00"; -- Folgezustand in 8 Bit, binär
--signal not_CLK : std_logic; --negierte Taktvariable
--signal TMP00 : std_logic; --temporärer Zwischenwert, Paritätsprüfung
--signal TMP01 : std_logic;
--signal TMP02 : std_logic;
--signal TMP03 : std_logic;
--signal TMP10 : std_logic;
--signal TMP11 : std_logic;
--signal TMP20 : std_logic;
begin
--NOT_CLK_PROC: process (CLK) --negieren Taktvariable
--begin
-- not_CLK <= not CLK;
--end process;
SREG_M_PROC: process (RESET, n_SV_BR_BIT0, n_SV_BR_BIT1, n_SV_BR_BIT2, n_SV_BR_BIT3, n_SV_BR_BIT4, n_SV_BR_BIT5, n_SV_BR_BIT6, n_SV_BR_BIT7, n_SV_BR_BIT8, CLK) --Master
begin
if (RESET ='1')
then SV_BR_BIT0_M <= ST_BR_EN_BIT0_0;
SV_BR_BIT1_M <= ST_BR_EN_BIT1_0;
SV_BR_BIT2_M <= ST_BR_EN_BIT2_0;
SV_BR_BIT3_M <= ST_BR_EN_BIT3_0;
SV_BR_BIT4_M <= ST_BR_EN_BIT4_0;
SV_BR_BIT5_M <= ST_BR_EN_BIT5_0;
SV_BR_BIT6_M <= ST_BR_EN_BIT6_0;
SV_BR_BIT7_M <= ST_BR_EN_BIT7_0;
SV_BR_BIT8_M <= ST_BR_EN_BIT8_0;
else
if rising_edge(CLK)
then
if (IN_NEXT_STATE = '1')
then SV_BR_BIT0_M <= n_SV_BR_BIT0;
SV_BR_BIT1_M <= n_SV_BR_BIT1;
SV_BR_BIT2_M <= n_SV_BR_BIT2;
SV_BR_BIT3_M <= n_SV_BR_BIT3;
SV_BR_BIT4_M <= n_SV_BR_BIT4;
SV_BR_BIT5_M <= n_SV_BR_BIT5;
SV_BR_BIT6_M <= n_SV_BR_BIT6;
SV_BR_BIT7_M <= n_SV_BR_BIT7;
SV_BR_BIT8_M <= n_SV_BR_BIT8;
else
SV_BR_BIT0_M <= SV_BR_BIT0_M;
SV_BR_BIT1_M <= SV_BR_BIT1_M;
SV_BR_BIT2_M <= SV_BR_BIT2_M;
SV_BR_BIT3_M <= SV_BR_BIT3_M;
SV_BR_BIT4_M <= SV_BR_BIT4_M;
SV_BR_BIT5_M <= SV_BR_BIT5_M;
SV_BR_BIT6_M <= SV_BR_BIT6_M;
SV_BR_BIT7_M <= SV_BR_BIT7_M;
SV_BR_BIT8_M <= SV_BR_BIT8_M;
end if;
end if;
end if;
end process;
SREG_S_PROC: process (RESET, SV_BR_BIT0_M, SV_BR_BIT1_M, SV_BR_BIT2_M, SV_BR_BIT3_M, SV_BR_BIT4_M, SV_BR_BIT5_M, SV_BR_BIT6_M, SV_BR_BIT7_M, SV_BR_BIT8_M, CLK) --Slave
begin
if (RESET = '1')
then SV_BR_BIT0 <= ST_BR_EN_BIT0_0;
SV_BR_BIT1 <= ST_BR_EN_BIT1_0;
SV_BR_BIT2 <= ST_BR_EN_BIT2_0;
SV_BR_BIT3 <= ST_BR_EN_BIT3_0;
SV_BR_BIT4 <= ST_BR_EN_BIT4_0;
SV_BR_BIT5 <= ST_BR_EN_BIT5_0;
SV_BR_BIT6 <= ST_BR_EN_BIT6_0;
SV_BR_BIT7 <= ST_BR_EN_BIT7_0;
SV_BR_BIT8 <= ST_BR_EN_BIT8_0;
else
if falling_edge(CLK)
then
SV_BR_BIT0 <= SV_BR_BIT0_M;
SV_BR_BIT1 <= SV_BR_BIT1_M;
SV_BR_BIT2 <= SV_BR_BIT2_M;
SV_BR_BIT3 <= SV_BR_BIT3_M;
SV_BR_BIT4 <= SV_BR_BIT4_M;
SV_BR_BIT5 <= SV_BR_BIT5_M;
SV_BR_BIT6 <= SV_BR_BIT6_M;
SV_BR_BIT7 <= SV_BR_BIT7_M;
SV_BR_BIT8 <= SV_BR_BIT8_M;
end if;
end if;
end process;
BIT_REGISTER_EN_BIT_0_PROC:process (SV_BR_BIT0, n_SV_BR_BIT0, BIT_VALUE, EN_BIT_i) --BIT_REGISTER Bit0
begin
case SV_BR_BIT0 is
when ST_BR_EN_BIT0_0 =>
BYTE_OUT(0)<='0';
BYTE_VEC(0)<='0';
if (EN_BIT_i(0) = '1')
then
if (BIT_VALUE = '1')--gehe zu ST_BR_EN_BIT0_1
then n_SV_BR_BIT0 <= ST_BR_EN_BIT0_1;
else n_SV_BR_BIT0 <= ST_BR_EN_BIT0_0;
end if;
else n_SV_BR_BIT0 <= ST_BR_EN_BIT0_0;
end if;
when ST_BR_EN_BIT0_1 =>
-- EN_BIT_0_S = 1 und BIT_VALUE = 1 dann setze BYTE_OUT(0) = 1
BYTE_OUT(0)<='1';
BYTE_VEC(0)<='1';
if (EN_BIT_i(0) = '1')
then
if (BIT_VALUE = '1')
then n_SV_BR_BIT0 <= ST_BR_EN_BIT0_1;
else n_SV_BR_BIT0 <= ST_BR_EN_BIT0_0;
end if;
else n_SV_BR_BIT0 <= ST_BR_EN_BIT0_1; -- BIT_VALUE = 0
end if;
when others =>
n_SV_BR_BIT0 <= ST_BR_EN_BIT0_0;
end case;
end process;
BIT_REGISTER_EN_BIT_1_PROC:process (SV_BR_BIT1, n_SV_BR_BIT1, BIT_VALUE, EN_BIT_i) --BIT_REGISTER Bit1
begin
case SV_BR_BIT1 is
when ST_BR_EN_BIT1_0 =>
BYTE_OUT(1)<='0';
BYTE_VEC(1)<='0';
if (EN_BIT_i(1) = '1')
then
if (BIT_VALUE = '1')--gehe zu ST_BR_BIT1_1
then n_SV_BR_BIT1 <= ST_BR_EN_BIT1_1;
else n_SV_BR_BIT1 <= ST_BR_EN_BIT1_0;
end if;
else n_SV_BR_BIT1 <= ST_BR_EN_BIT1_0;
end if;
when ST_BR_EN_BIT1_1 =>
-- EN_BIT_1_S = 1 und BIT_VALUE = 1 dann setze BYTE_OUT(1) = 1
BYTE_OUT(1)<='1';
BYTE_VEC(1)<='1';
if (EN_BIT_i(1) = '1')
then
if (BIT_VALUE = '1')
then n_SV_BR_BIT1 <= ST_BR_EN_BIT1_1;
else n_SV_BR_BIT1 <= ST_BR_EN_BIT1_0;
end if;
else n_SV_BR_BIT1 <= ST_BR_EN_BIT1_1; -- BIT_VALUE = 0
end if;
when others =>
n_SV_BR_BIT1 <= ST_BR_EN_BIT1_0;
end case;
end process;
BIT_REGISTER_EN_BIT_2_PROC:process (SV_BR_BIT2, n_SV_BR_BIT2, BIT_VALUE, EN_BIT_i) --BIT_REGISTER Bit1
begin
case SV_BR_BIT2 is
when ST_BR_EN_BIT2_0 =>
BYTE_OUT(2)<='0';
BYTE_VEC(2)<='0';
if (EN_BIT_i(2) = '1')
then
if (BIT_VALUE = '1')--gehe zu ST_BR_BIT2_1
then n_SV_BR_BIT2 <= ST_BR_EN_BIT2_1;
else n_SV_BR_BIT2 <= ST_BR_EN_BIT2_0;
end if;
else n_SV_BR_BIT2 <= ST_BR_EN_BIT2_0;
end if;
when ST_BR_EN_BIT2_1 =>
-- EN_BIT_2_S = 1 und BIT_VALUE = 1 dann setze BYTE_OUT(2) = 1
BYTE_OUT(2)<='1';
BYTE_VEC(2)<='1';
if (EN_BIT_i(2) = '1')
then
if (BIT_VALUE = '1')
then n_SV_BR_BIT2 <= ST_BR_EN_BIT2_1;
else n_SV_BR_BIT2 <= ST_BR_EN_BIT2_0;
end if;
else n_SV_BR_BIT2 <= ST_BR_EN_BIT2_1; -- BIT_VALUE = 0
end if;
when others =>
n_SV_BR_BIT2 <= ST_BR_EN_BIT2_0;
end case;
end process;
BIT_REGISTER_EN_BIT_3_PROC:process (SV_BR_BIT3, n_SV_BR_BIT3, BIT_VALUE, EN_BIT_i) --BIT_REGISTER Bit1
begin
case SV_BR_BIT3 is
when ST_BR_EN_BIT3_0 =>
BYTE_OUT(3)<='0';
BYTE_VEC(3)<='0';
if (EN_BIT_i(3) = '1')
then
if (BIT_VALUE = '1')--gehe zu ST_BR_BIT3_1
then n_SV_BR_BIT3 <= ST_BR_EN_BIT3_1;
else n_SV_BR_BIT3 <= ST_BR_EN_BIT3_0;
end if;
else n_SV_BR_BIT3 <= ST_BR_EN_BIT3_0;
end if;
when ST_BR_EN_BIT3_1 =>
-- EN_BIT_3_S = 1 und BIT_VALUE = 1 dann setze BYTE_OUT(3) = 1
BYTE_OUT(3)<='1';
BYTE_VEC(3)<='1';
if (EN_BIT_i(3) = '1')
then
if (BIT_VALUE = '1')
then n_SV_BR_BIT3 <= ST_BR_EN_BIT3_1;
else n_SV_BR_BIT3 <= ST_BR_EN_BIT3_0;
end if;
else n_SV_BR_BIT3 <= ST_BR_EN_BIT3_1; -- BIT_VALUE = 0
end if;
when others =>
n_SV_BR_BIT3 <= ST_BR_EN_BIT3_0;
end case;
end process;
BIT_REGISTER_EN_BIT_4_PROC:process (SV_BR_BIT4, n_SV_BR_BIT4, BIT_VALUE, EN_BIT_i) --BIT_REGISTER Bit1
begin
case SV_BR_BIT4 is
when ST_BR_EN_BIT4_0 =>
BYTE_OUT(4)<='0';
BYTE_VEC(4)<='0';
if (EN_BIT_i(4) = '1')
then
if (BIT_VALUE = '1')--gehe zu ST_BR_BIT4_1
then n_SV_BR_BIT4 <= ST_BR_EN_BIT4_1;
else n_SV_BR_BIT4 <= ST_BR_EN_BIT4_0;
end if;
else n_SV_BR_BIT4 <= ST_BR_EN_BIT4_0;
end if;
when ST_BR_EN_BIT4_1 =>
-- EN_BIT_4 = 1 und BIT_VALUE = 1 dann setze BYTE_OUT(4) = 1
BYTE_OUT(4)<='1';
BYTE_VEC(4)<='1';
if (EN_BIT_i(4) = '1')
then
if (BIT_VALUE = '1')
then n_SV_BR_BIT4 <= ST_BR_EN_BIT4_1;
else n_SV_BR_BIT4 <= ST_BR_EN_BIT4_0;
end if;
else n_SV_BR_BIT4 <= ST_BR_EN_BIT4_1; -- BIT_VALUE = 0
end if;
when others =>
n_SV_BR_BIT4 <= ST_BR_EN_BIT4_0;
end case;
end process;
BIT_REGISTER_EN_BIT_5_PROC:process (SV_BR_BIT5, n_SV_BR_BIT5, BIT_VALUE, EN_BIT_i) --BIT_REGISTER Bit1
begin
case SV_BR_BIT5 is
when ST_BR_EN_BIT5_0 =>
BYTE_OUT(5)<='0';
BYTE_VEC(5)<='0';
if (EN_BIT_i(5) = '1')
then
if (BIT_VALUE = '1')--gehe zu ST_BR_BIT5_1
then n_SV_BR_BIT5 <= ST_BR_EN_BIT5_1;
else n_SV_BR_BIT5 <= ST_BR_EN_BIT5_0;
end if;
else n_SV_BR_BIT5 <= ST_BR_EN_BIT5_0;
end if;
when ST_BR_EN_BIT5_1 =>
-- EN_BIT_5_S = 1 und BIT_VALUE = 1 dann setze BYTE_OUT(5) = 1
BYTE_OUT(5)<='1';
BYTE_VEC(5)<='1';
if (EN_BIT_i(5) = '1')
then
if (BIT_VALUE = '1')
then n_SV_BR_BIT5 <= ST_BR_EN_BIT5_1;
else n_SV_BR_BIT5 <= ST_BR_EN_BIT5_0;
end if;
else n_SV_BR_BIT5 <= ST_BR_EN_BIT5_1; -- BIT_VALUE = 0
end if;
when others =>
n_SV_BR_BIT5 <= ST_BR_EN_BIT5_0;
end case;
end process;
BIT_REGISTER_EN_BIT_6_PROC:process (SV_BR_BIT6, n_SV_BR_BIT6, BIT_VALUE, EN_BIT_i) --BIT_REGISTER Bit6
begin
case SV_BR_BIT6 is
when ST_BR_EN_BIT6_0 =>
BYTE_OUT(6)<='0';
BYTE_VEC(6)<='0';
if (EN_BIT_i(6) = '1')
then
if (BIT_VALUE = '1')--gehe zu ST_BR_BIT6_1
then n_SV_BR_BIT6 <= ST_BR_EN_BIT6_1;
else n_SV_BR_BIT6 <= ST_BR_EN_BIT6_0;
end if;
else n_SV_BR_BIT6 <= ST_BR_EN_BIT6_0;
end if;
when ST_BR_EN_BIT6_1 =>
-- EN_BIT_6 = 1 und BIT_VALUE = 1 dann setze BYTE_OUT(6) = 1
BYTE_OUT(6)<='1';
BYTE_VEC(6)<='1';
if (EN_BIT_i(6) = '1')
then
if (BIT_VALUE = '1')
then n_SV_BR_BIT6 <= ST_BR_EN_BIT6_1;
else n_SV_BR_BIT6 <= ST_BR_EN_BIT6_0;
end if;
else n_SV_BR_BIT6 <= ST_BR_EN_BIT6_1; -- BIT_VALUE = 0
end if;
when others =>
n_SV_BR_BIT6 <= ST_BR_EN_BIT6_0;
end case;
end process;
BIT_REGISTER_EN_BIT_7_PROC:process (SV_BR_BIT7, n_SV_BR_BIT7, BIT_VALUE, EN_BIT_i) --BIT_REGISTER Bit7
begin
case SV_BR_BIT7 is
when ST_BR_EN_BIT7_0 =>
BYTE_OUT(7)<='0';
BYTE_VEC(7)<='0';
if (EN_BIT_i(7) = '1')
then
if (BIT_VALUE = '1')--gehe zu ST_BR_BIT7_1
then n_SV_BR_BIT7 <= ST_BR_EN_BIT7_1;
else n_SV_BR_BIT7 <= ST_BR_EN_BIT7_0;
end if;
else n_SV_BR_BIT7 <= ST_BR_EN_BIT7_0;
end if;
when ST_BR_EN_BIT7_1 =>
-- EN_BIT_7_S = 1 und BIT_VALUE = 1 dann setze BYTE_OUT(7) = 1
BYTE_OUT(7)<='1';
BYTE_VEC(7)<='1';
if (EN_BIT_i(7) = '1')
then
if (BIT_VALUE = '1')
then n_SV_BR_BIT7 <= ST_BR_EN_BIT7_1;
else n_SV_BR_BIT7 <= ST_BR_EN_BIT7_0;
end if;
else n_SV_BR_BIT7 <= ST_BR_EN_BIT7_1; -- BIT_VALUE = 0
end if;
when others =>
n_SV_BR_BIT7 <= ST_BR_EN_BIT7_0;
end case;
end process;
BIT_REGISTER_EN_BIT_8_PROC:process (SV_BR_BIT8, n_SV_BR_BIT8, BIT_VALUE, EN_BIT_8) --BIT_REGISTER Bit8 ##Zum Testen EN_BIT_8 statt EN_BIT_i###
begin
case SV_BR_BIT8 is
when ST_BR_EN_BIT8_0 =>
BYTE_VEC(8)<='0';
if (EN_BIT_8 = '1') --##vor Test: if (EN_BIT_i(8) = '1')##
then
if (BIT_VALUE = '1')--gehe zu ST_BR_BIT8_1
then n_SV_BR_BIT8 <= ST_BR_EN_BIT8_1;
else n_SV_BR_BIT8 <= ST_BR_EN_BIT8_0;
end if;
else n_SV_BR_BIT8 <= ST_BR_EN_BIT8_0;
end if;
when ST_BR_EN_BIT8_1 =>
-- EN_BIT_8_S = 1 und BIT_VALUE = 1 dann setze BYTE_OUT(8) = 1
BYTE_VEC(8)<='1';
if (EN_BIT_8 = '1') --##vor Test: if (EN_BIT_i(8) = '1')##
then
if (BIT_VALUE = '1')
then n_SV_BR_BIT8 <= ST_BR_EN_BIT8_1;
else n_SV_BR_BIT8 <= ST_BR_EN_BIT8_0;
end if;
else n_SV_BR_BIT8 <= ST_BR_EN_BIT8_1; -- BIT_VALUE = 0
end if;
when others =>
n_SV_BR_BIT8 <= ST_BR_EN_BIT8_0;
end case;
end process;
PARITY_CHECK_PROC: process (BYTE_VEC) --Paritätsprüfung (Mit VARIABLEN := , STATT SIGNALEN <=)
variable TMP00, TMP01, TMP02, TMP03, TMP10, TMP11, TMP20 : std_logic;
begin
TMP00 := BYTE_VEC(0) xor BYTE_VEC(1);
TMP01 := BYTE_VEC(2) xor BYTE_VEC(3);
TMP02 := BYTE_VEC(4) xor BYTE_VEC(5);
TMP03 := BYTE_VEC(6) xor BYTE_VEC(7);
TMP10 := TMP00 xor TMP01;
TMP11 := TMP02 xor TMP03;
TMP20 := TMP10 xor TMP11;
if (TMP20 = BYTE_VEC(8))
then PARITY_OK <= '1'; -- Parität korrekt
else PARITY_OK <= '0'; -- Parität fehlerhaft
end if;
end process;
--##Folgeder Prozess eingefügt für Testumgebung und angepasst für die Zustandsanzeige von BIT0##
STATE_DISPL_PROC: process (SV_BR_BIT0, n_SV_BR_BIT0, STATE_SV, STATE_n_SV) -- Zustandsanzeige
begin
STATE_SV <= conv_std_logic_vector(TYPE_STATE_BR_BIT0'pos( SV_BR_BIT0),8); --Zustandsumwandlung in 8 Bit
STATE_n_SV <= conv_std_logic_vector(TYPE_STATE_BR_BIT0'pos(n_SV_BR_BIT0),8);
--für die Anzeige des Zustandes bei BIT1 muss die Nummerierung von BIT0 auf BIT1 geändert werden usw.
--aktueller Zustand
DISPL1_SV(0) <= STATE_SV(0); --Bit0
DISPL1_SV(1) <= STATE_SV(1); --Bit1
DISPL1_SV(2) <= STATE_SV(2); --Bit2
DISPL1_SV(3) <= STATE_SV(3); --Bit3
DISPL2_SV(0) <= STATE_SV(4); --usw.
DISPL2_SV(1) <= STATE_SV(5);
DISPL2_SV(2) <= STATE_SV(6);
DISPL2_SV(3) <= STATE_SV(7);
--Folgezustand anzeigen
DISPL1_n_SV(0) <= STATE_n_SV(0);
DISPL1_n_SV(1) <= STATE_n_SV(1);
DISPL1_n_SV(2) <= STATE_n_SV(2);
DISPL1_n_SV(3) <= STATE_n_SV(3);
DISPL2_n_SV(0) <= STATE_n_SV(4);
DISPL2_n_SV(1) <= STATE_n_SV(5);
DISPL2_n_SV(2) <= STATE_n_SV(6);
DISPL2_n_SV(3) <= STATE_n_SV(7);
end process;
--BYTE_OUT_PORC: process (BYTE_VEC) --BYTEausgabe
-- begin
-- BYTE_OUT(0) <= BYTE_VEC(0);
-- BYTE_OUT(1) <= BYTE_VEC(1);
-- BYTE_OUT(2) <= BYTE_VEC(2);
-- BYTE_OUT(3) <= BYTE_VEC(3);
-- BYTE_OUT(4) <= BYTE_VEC(4);
-- BYTE_OUT(5) <= BYTE_VEC(5);
-- BYTE_OUT(6) <= BYTE_VEC(6);
-- BYTE_OUT(7) <= BYTE_VEC(7);
--end process;
end Behavioral; | gpl-2.0 | d9ee48515d80ab80eebdc79b901c4061 | 0.580217 | 2.459 | false | false | false | false |
sergeykhbr/riscv_vhdl | vhdl/rtl/ambalib/axictrl_bus0.vhd | 1 | 9,099 | --!
--! Copyright 2019 Sergey Khabarov, [email protected]
--!
--! Licensed under the Apache License, Version 2.0 (the "License");
--! you may not use this file except in compliance with the License.
--! You may obtain a copy of the License at
--!
--! http://www.apache.org/licenses/LICENSE-2.0
--!
--! Unless required by applicable law or agreed to in writing, software
--! distributed under the License is distributed on an "AS IS" BASIS,
--! WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
--! See the License for the specific language governing permissions and
--! limitations under the License.
--!
library ieee;
use ieee.std_logic_1164.all;
library commonlib;
use commonlib.types_common.all;
library ambalib;
use ambalib.types_amba4.all;
use ambalib.types_bus0.all;
entity axictrl_bus0 is
generic (
async_reset : boolean
);
port (
i_clk : in std_logic;
i_nrst : in std_logic;
i_slvcfg : in bus0_xslv_cfg_vector;
i_slvo : in bus0_xslv_out_vector;
i_msto : in bus0_xmst_out_vector;
o_slvi : out bus0_xslv_in_vector;
o_msti : out bus0_xmst_in_vector;
o_bus_util_w : out std_logic_vector(CFG_BUS0_XMST_TOTAL-1 downto 0);
o_bus_util_r : out std_logic_vector(CFG_BUS0_XMST_TOTAL-1 downto 0)
);
end;
architecture arch_axictrl_bus0 of axictrl_bus0 is
type nasti_master_out_vector_miss is array (0 to CFG_BUS0_XMST_TOTAL)
of axi4_master_out_type;
type nasti_master_in_vector_miss is array (0 to CFG_BUS0_XMST_TOTAL)
of axi4_master_in_type;
type nasti_slave_out_vector_miss is array (0 to CFG_BUS0_XSLV_TOTAL)
of axi4_slave_out_type;
type nasti_slave_in_vector_miss is array (0 to CFG_BUS0_XSLV_TOTAL)
of axi4_slave_in_type;
type reg_type is record
r_midx : integer range 0 to CFG_BUS0_XMST_TOTAL;
r_sidx : integer range 0 to CFG_BUS0_XSLV_TOTAL;
w_midx : integer range 0 to CFG_BUS0_XMST_TOTAL;
w_sidx : integer range 0 to CFG_BUS0_XSLV_TOTAL;
b_midx : integer range 0 to CFG_BUS0_XMST_TOTAL;
b_sidx : integer range 0 to CFG_BUS0_XSLV_TOTAL;
end record;
constant R_RESET : reg_type := (
CFG_BUS0_XMST_TOTAL, CFG_BUS0_XSLV_TOTAL,
CFG_BUS0_XMST_TOTAL, CFG_BUS0_XSLV_TOTAL,
CFG_BUS0_XMST_TOTAL, CFG_BUS0_XSLV_TOTAL);
signal rin, r : reg_type;
signal defslv_i : axi4_slave_in_type;
signal defslv_o : axi4_slave_out_type;
begin
xdef0 : axi4_defslv generic map (
async_reset => async_reset
) port map (
i_clk => i_clk,
i_nrst => i_nrst,
i_xslvi => defslv_i,
o_xslvo => defslv_o
);
comblogic : process(i_nrst, i_slvcfg, i_msto, i_slvo, defslv_o, r)
variable v : reg_type;
variable ar_midx : integer range 0 to CFG_BUS0_XMST_TOTAL;
variable aw_midx : integer range 0 to CFG_BUS0_XMST_TOTAL;
variable ar_sidx : integer range 0 to CFG_BUS0_XSLV_TOTAL; -- +1 miss access
variable aw_sidx : integer range 0 to CFG_BUS0_XSLV_TOTAL; -- +1 miss access
variable vmsto : nasti_master_out_vector_miss;
variable vmsti : nasti_master_in_vector_miss;
variable vslvi : nasti_slave_in_vector_miss;
variable vslvo : nasti_slave_out_vector_miss;
variable aw_fire : std_logic;
variable ar_fire : std_logic;
variable w_fire : std_logic;
variable w_busy : std_logic;
variable r_fire : std_logic;
variable r_busy : std_logic;
variable b_fire : std_logic;
variable b_busy : std_logic;
-- Bus statistic signals
variable wb_bus_util_w : std_logic_vector(CFG_BUS0_XMST_TOTAL downto 0);
variable wb_bus_util_r : std_logic_vector(CFG_BUS0_XMST_TOTAL downto 0);
begin
v := r;
for m in 0 to CFG_BUS0_XMST_TOTAL-1 loop
vmsto(m) := i_msto(m);
vmsti(m) := axi4_master_in_none;
end loop;
vmsto(CFG_BUS0_XMST_TOTAL) := axi4_master_out_none;
vmsti(CFG_BUS0_XMST_TOTAL) := axi4_master_in_none;
for s in 0 to CFG_BUS0_XSLV_TOTAL-1 loop
vslvo(s) := i_slvo(s);
vslvi(s) := axi4_slave_in_none;
end loop;
vslvo(CFG_BUS0_XSLV_TOTAL) := defslv_o;
vslvi(CFG_BUS0_XSLV_TOTAL) := axi4_slave_in_none;
ar_midx := CFG_BUS0_XMST_TOTAL;
aw_midx := CFG_BUS0_XMST_TOTAL;
ar_sidx := CFG_BUS0_XSLV_TOTAL;
aw_sidx := CFG_BUS0_XSLV_TOTAL;
-- select master bus:
for m in 0 to CFG_BUS0_XMST_TOTAL-1 loop
if i_msto(m).ar_valid = '1' then
ar_midx := m;
end if;
if i_msto(m).aw_valid = '1' then
aw_midx := m;
end if;
end loop;
-- select slave interface
for s in 0 to CFG_BUS0_XSLV_TOTAL-1 loop
if i_slvcfg(s).xmask /= X"00000" and
(vmsto(ar_midx).ar_bits.addr(CFG_SYSBUS_ADDR_BITS-1 downto 12)
and i_slvcfg(s).xmask) = i_slvcfg(s).xaddr then
ar_sidx := s;
end if;
if i_slvcfg(s).xmask /= X"00000" and
(vmsto(aw_midx).aw_bits.addr(CFG_SYSBUS_ADDR_BITS-1 downto 12)
and i_slvcfg(s).xmask) = i_slvcfg(s).xaddr then
aw_sidx := s;
end if;
end loop;
-- Read Channel:
ar_fire := vmsto(ar_midx).ar_valid and vslvo(ar_sidx).ar_ready;
r_fire := vmsto(r.r_midx).r_ready and vslvo(r.r_sidx).r_valid and vslvo(r.r_sidx).r_last;
-- Write channel:
aw_fire := vmsto(aw_midx).aw_valid and vslvo(aw_sidx).aw_ready;
w_fire := vmsto(r.w_midx).w_valid and vmsto(r.w_midx).w_last and vslvo(r.w_sidx).w_ready;
-- Write confirm channel
b_fire := vmsto(r.b_midx).b_ready and vslvo(r.b_sidx).b_valid;
r_busy := '0';
if r.r_sidx /= CFG_BUS0_XSLV_TOTAL and r_fire = '0' then
r_busy := '1';
end if;
w_busy := '0';
if (r.w_sidx /= CFG_BUS0_XSLV_TOTAL and w_fire = '0')
or (r.b_sidx /= CFG_BUS0_XSLV_TOTAL and b_fire = '0') then
w_busy := '1';
end if;
b_busy := '0';
if (r.b_sidx /= CFG_BUS0_XSLV_TOTAL and b_fire = '0') then
b_busy := '1';
end if;
if ar_fire = '1' and r_busy = '0' then
v.r_sidx := ar_sidx;
v.r_midx := ar_midx;
elsif r_fire = '1' then
v.r_sidx := CFG_BUS0_XSLV_TOTAL;
v.r_midx := CFG_BUS0_XMST_TOTAL;
end if;
if aw_fire = '1' and w_busy = '0' then
v.w_sidx := aw_sidx;
v.w_midx := aw_midx;
elsif w_fire = '1' and b_busy = '0' then
v.w_sidx := CFG_BUS0_XSLV_TOTAL;
v.w_midx := CFG_BUS0_XMST_TOTAL;
end if;
if w_fire = '1' and b_busy = '0' then
v.b_sidx := r.w_sidx;
v.b_midx := r.w_midx;
elsif b_fire = '1' then
v.b_sidx := CFG_BUS0_XSLV_TOTAL;
v.b_midx := CFG_BUS0_XMST_TOTAL;
end if;
vmsti(ar_midx).ar_ready := vslvo(ar_sidx).ar_ready and not r_busy;
vslvi(ar_sidx).ar_valid := vmsto(ar_midx).ar_valid and not r_busy;
vslvi(ar_sidx).ar_bits := vmsto(ar_midx).ar_bits;
vslvi(ar_sidx).ar_id := vmsto(ar_midx).ar_id;
vslvi(ar_sidx).ar_user := vmsto(ar_midx).ar_user;
vmsti(r.r_midx).r_valid := vslvo(r.r_sidx).r_valid;
vmsti(r.r_midx).r_resp := vslvo(r.r_sidx).r_resp;
vmsti(r.r_midx).r_data := vslvo(r.r_sidx).r_data;
vmsti(r.r_midx).r_last := vslvo(r.r_sidx).r_last;
vmsti(r.r_midx).r_id := vslvo(r.r_sidx).r_id;
vmsti(r.r_midx).r_user := vslvo(r.r_sidx).r_user;
vslvi(r.r_sidx).r_ready := vmsto(r.r_midx).r_ready;
vmsti(aw_midx).aw_ready := vslvo(aw_sidx).aw_ready and not w_busy;
vslvi(aw_sidx).aw_valid := vmsto(aw_midx).aw_valid and not w_busy;
vslvi(aw_sidx).aw_bits := vmsto(aw_midx).aw_bits;
vslvi(aw_sidx).aw_id := vmsto(aw_midx).aw_id;
vslvi(aw_sidx).aw_user := vmsto(aw_midx).aw_user;
vmsti(r.w_midx).w_ready := vslvo(r.w_sidx).w_ready and not b_busy;
vslvi(r.w_sidx).w_valid := vmsto(r.w_midx).w_valid and not b_busy;
vslvi(r.w_sidx).w_data := vmsto(r.w_midx).w_data;
vslvi(r.w_sidx).w_last := vmsto(r.w_midx).w_last;
vslvi(r.w_sidx).w_strb := vmsto(r.w_midx).w_strb;
vslvi(r.w_sidx).w_user := vmsto(r.w_midx).w_user;
vmsti(r.b_midx).b_valid := vslvo(r.b_sidx).b_valid;
vmsti(r.b_midx).b_resp := vslvo(r.b_sidx).b_resp;
vmsti(r.b_midx).b_id := vslvo(r.b_sidx).b_id;
vmsti(r.b_midx).b_user := vslvo(r.b_sidx).b_user;
vslvi(r.b_sidx).b_ready := vmsto(r.b_midx).b_ready;
-- Statistic
wb_bus_util_w := (others => '0');
wb_bus_util_w(r.w_midx) := '1';
wb_bus_util_r := (others => '0');
wb_bus_util_r(r.r_midx) := '1';
if not async_reset and i_nrst = '0' then
v := R_RESET;
end if;
rin <= v;
for m in 0 to CFG_BUS0_XMST_TOTAL-1 loop
o_msti(m) <= vmsti(m);
end loop;
for s in 0 to CFG_BUS0_XSLV_TOTAL-1 loop
o_slvi(s) <= vslvi(s);
end loop;
defslv_i <= vslvi(CFG_BUS0_XSLV_TOTAL);
o_bus_util_w <= wb_bus_util_w(CFG_BUS0_XMST_TOTAL-1 downto 0);
o_bus_util_r <= wb_bus_util_r(CFG_BUS0_XMST_TOTAL-1 downto 0);
end process;
regs : process(i_clk, i_nrst)
begin
if async_reset and i_nrst = '0' then
r <= R_RESET;
elsif rising_edge(i_clk) then
r <= rin;
end if;
end process;
end;
| apache-2.0 | a0be655c572b815ff4d24eaa4706acb9 | 0.605012 | 2.602689 | false | false | false | false |
Bjay1435/capstone | Geoff/Geoff.srcs/sources_1/bd/dma_loopback/ipshared/xilinx.com/axi_sg_v4_1/hdl/src/vhdl/axi_sg_fifo.vhd | 1 | 24,380 |
-- *************************************************************************
--
-- (c) Copyright 2010-2011 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
--
-- *************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: axi_sg_fifo.vhd
-- Version: initial
-- Description:
-- This file is a wrapper file for the Synchronous FIFO used by the DataMover.
--
--
-- VHDL-Standard: VHDL'93
-------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_unsigned.all;
library lib_pkg_v1_0_2;
use lib_pkg_v1_0_2.lib_pkg.all;
use lib_pkg_v1_0_2.lib_pkg.clog2;
library lib_srl_fifo_v1_0_2;
use lib_srl_fifo_v1_0_2.srl_fifo_f;
library axi_sg_v4_1_3;
use axi_sg_v4_1_3.axi_sg_sfifo_autord;
use axi_sg_v4_1_3.axi_sg_afifo_autord;
-------------------------------------------------------------------------------
entity axi_sg_fifo is
generic (
C_DWIDTH : integer := 32 ;
-- Bit width of the FIFO
C_DEPTH : integer := 4 ;
-- Depth of the fifo in fifo width words
C_IS_ASYNC : Integer range 0 to 1 := 0 ;
-- 0 = Syncronous FIFO
-- 1 = Asynchronous (2 clock) FIFO
C_PRIM_TYPE : Integer range 0 to 2 := 2 ;
-- 0 = Register
-- 1 = Block Memory
-- 2 = SRL
C_FAMILY : String := "virtex7"
-- Specifies the Target FPGA device family
);
port (
-- Write Clock and reset -----------------
fifo_wr_reset : In std_logic; --
fifo_wr_clk : In std_logic; --
------------------------------------------
-- Write Side ------------------------------------------------------
fifo_wr_tvalid : In std_logic; --
fifo_wr_tready : Out std_logic; --
fifo_wr_tdata : In std_logic_vector(C_DWIDTH-1 downto 0); --
fifo_wr_full : Out std_logic; --
--------------------------------------------------------------------
-- Read Clock and reset -----------------------------------------------
fifo_async_rd_reset : In std_logic; -- only used if C_IS_ASYNC = 1 --
fifo_async_rd_clk : In std_logic; -- only used if C_IS_ASYNC = 1 --
-----------------------------------------------------------------------
-- Read Side --------------------------------------------------------
fifo_rd_tvalid : Out std_logic; --
fifo_rd_tready : In std_logic; --
fifo_rd_tdata : Out std_logic_vector(C_DWIDTH-1 downto 0); --
fifo_rd_empty : Out std_logic --
---------------------------------------------------------------------
);
end entity axi_sg_fifo;
-----------------------------------------------------------------------------
-- Architecture section
-----------------------------------------------------------------------------
architecture imp of axi_sg_fifo is
attribute DowngradeIPIdentifiedWarnings: string;
attribute DowngradeIPIdentifiedWarnings of imp : architecture is "yes";
-- function Declarations
-------------------------------------------------------------------
-- Function
--
-- Function Name: funct_get_prim_type
--
-- Function Description:
-- Sorts out the FIFO Primitive type selection based on fifo
-- depth and original primitive choice.
--
-------------------------------------------------------------------
-- coverage off
function funct_get_prim_type (depth : integer;
input_prim_type : integer) return integer is
Variable temp_prim_type : Integer := 0;
begin
If (depth > 64) Then
temp_prim_type := 1; -- use BRAM
Elsif (depth <= 64 and
input_prim_type = 0) Then
temp_prim_type := 0; -- use regiaters
else
temp_prim_type := 1; -- use BRAM
End if;
Return (temp_prim_type);
end function funct_get_prim_type;
-- coverage on
-- Signal declarations
Signal sig_init_reg : std_logic := '0';
Signal sig_init_reg2 : std_logic := '0';
Signal sig_init_done : std_logic := '0';
signal sig_inhibit_rdy_n : std_logic := '0';
-----------------------------------------------------------------------------
-- Begin architecture
-----------------------------------------------------------------------------
begin
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_INIT_REG
--
-- Process Description:
-- Registers the reset signal input.
--
-------------------------------------------------------------
IMP_INIT_REG : process (fifo_wr_clk)
begin
if (fifo_wr_clk'event and fifo_wr_clk = '1') then
if (fifo_wr_reset = '1') then
sig_init_reg <= '1';
sig_init_reg2 <= '1';
else
sig_init_reg <= '0';
sig_init_reg2 <= sig_init_reg;
end if;
end if;
end process IMP_INIT_REG;
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_INIT_DONE_REG
--
-- Process Description:
-- Create a 1 clock wide init done pulse.
--
-------------------------------------------------------------
IMP_INIT_DONE_REG : process (fifo_wr_clk)
begin
if (fifo_wr_clk'event and fifo_wr_clk = '1') then
if (fifo_wr_reset = '1' or
sig_init_done = '1') then
sig_init_done <= '0';
Elsif (sig_init_reg = '1' and
sig_init_reg2 = '1') Then
sig_init_done <= '1';
else
null; -- hold current state
end if;
end if;
end process IMP_INIT_DONE_REG;
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_RDY_INHIBIT_REG
--
-- Process Description:
-- Implements a ready inhibit flop.
--
-------------------------------------------------------------
IMP_RDY_INHIBIT_REG : process (fifo_wr_clk)
begin
if (fifo_wr_clk'event and fifo_wr_clk = '1') then
if (fifo_wr_reset = '1') then
sig_inhibit_rdy_n <= '0';
Elsif (sig_init_done = '1') Then
sig_inhibit_rdy_n <= '1';
else
null; -- hold current state
end if;
end if;
end process IMP_RDY_INHIBIT_REG;
------------------------------------------------------------
-- If Generate
--
-- Label: USE_SINGLE_REG
--
-- If Generate Description:
-- Implements a 1 deep register FIFO (synchronous mode only)
--
--
------------------------------------------------------------
USE_SINGLE_REG : if (C_IS_ASYNC = 0 and
C_DEPTH <= 1) generate
-- Local Constants
-- local signals
signal sig_data_in : std_logic_vector(C_DWIDTH-1 downto 0) := (others => '0');
signal sig_regfifo_dout_reg : std_logic_vector(C_DWIDTH-1 downto 0) := (others => '0');
signal sig_regfifo_full_reg : std_logic := '0';
signal sig_regfifo_empty_reg : std_logic := '0';
signal sig_push_regfifo : std_logic := '0';
signal sig_pop_regfifo : std_logic := '0';
begin
-- Internal signals
-- Write signals
fifo_wr_tready <= sig_regfifo_empty_reg;
fifo_wr_full <= sig_regfifo_full_reg ;
sig_push_regfifo <= fifo_wr_tvalid and
sig_regfifo_empty_reg;
sig_data_in <= fifo_wr_tdata ;
-- Read signals
fifo_rd_tdata <= sig_regfifo_dout_reg ;
fifo_rd_tvalid <= sig_regfifo_full_reg ;
fifo_rd_empty <= sig_regfifo_empty_reg;
sig_pop_regfifo <= sig_regfifo_full_reg and
fifo_rd_tready;
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_REG_FIFO
--
-- Process Description:
-- This process implements the data and full flag for the
-- register fifo.
--
-------------------------------------------------------------
IMP_REG_FIFO : process (fifo_wr_clk)
begin
if (fifo_wr_clk'event and fifo_wr_clk = '1') then
if (fifo_wr_reset = '1' or
sig_pop_regfifo = '1') then
sig_regfifo_full_reg <= '0';
elsif (sig_push_regfifo = '1') then
sig_regfifo_full_reg <= '1';
else
null; -- don't change state
end if;
end if;
end process IMP_REG_FIFO;
IMP_REG_FIFO1 : process (fifo_wr_clk)
begin
if (fifo_wr_clk'event and fifo_wr_clk = '1') then
if (fifo_wr_reset = '1') then
sig_regfifo_dout_reg <= (others => '0');
elsif (sig_push_regfifo = '1') then
sig_regfifo_dout_reg <= sig_data_in;
else
null; -- don't change state
end if;
end if;
end process IMP_REG_FIFO1;
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_REG_EMPTY_FLOP
--
-- Process Description:
-- This process implements the empty flag for the
-- register fifo.
--
-------------------------------------------------------------
IMP_REG_EMPTY_FLOP : process (fifo_wr_clk)
begin
if (fifo_wr_clk'event and fifo_wr_clk = '1') then
if (fifo_wr_reset = '1') then
sig_regfifo_empty_reg <= '0'; -- since this is used for the ready (invertd)
-- it can't be asserted during reset
elsif (sig_pop_regfifo = '1' or
sig_init_done = '1') then
sig_regfifo_empty_reg <= '1';
elsif (sig_push_regfifo = '1') then
sig_regfifo_empty_reg <= '0';
else
null; -- don't change state
end if;
end if;
end process IMP_REG_EMPTY_FLOP;
end generate USE_SINGLE_REG;
------------------------------------------------------------
-- If Generate
--
-- Label: USE_SRL_FIFO
--
-- If Generate Description:
-- Generates a fifo implementation usinf SRL based FIFOa
--
--
------------------------------------------------------------
USE_SRL_FIFO : if (C_IS_ASYNC = 0 and
C_DEPTH <= 64 and
C_DEPTH > 1 and
C_PRIM_TYPE = 2 ) generate
-- Local Constants
Constant LOGIC_LOW : std_logic := '0';
Constant NEED_ALMOST_EMPTY : Integer := 0;
Constant NEED_ALMOST_FULL : Integer := 0;
-- local signals
signal sig_wr_full : std_logic := '0';
signal sig_wr_fifo : std_logic := '0';
signal sig_wr_ready : std_logic := '0';
signal sig_rd_fifo : std_logic := '0';
signal sig_rd_empty : std_logic := '0';
signal sig_rd_valid : std_logic := '0';
signal sig_fifo_rd_data : std_logic_vector(C_DWIDTH-1 downto 0) := (others => '0');
signal sig_fifo_wr_data : std_logic_vector(C_DWIDTH-1 downto 0) := (others => '0');
begin
-- Write side signals
fifo_wr_tready <= sig_wr_ready;
fifo_wr_full <= sig_wr_full;
sig_wr_ready <= not(sig_wr_full) and
sig_inhibit_rdy_n;
sig_wr_fifo <= fifo_wr_tvalid and
sig_wr_ready;
sig_fifo_wr_data <= fifo_wr_tdata;
-- Read Side Signals
fifo_rd_tvalid <= sig_rd_valid;
sig_rd_valid <= not(sig_rd_empty);
fifo_rd_tdata <= sig_fifo_rd_data ;
fifo_rd_empty <= not(sig_rd_valid);
sig_rd_fifo <= sig_rd_valid and
fifo_rd_tready;
------------------------------------------------------------
-- Instance: I_SYNC_FIFO
--
-- Description:
-- Implement the synchronous FIFO using SRL FIFO elements
--
------------------------------------------------------------
I_SYNC_FIFO : entity lib_srl_fifo_v1_0_2.srl_fifo_f
generic map (
C_DWIDTH => C_DWIDTH ,
C_DEPTH => C_DEPTH ,
C_FAMILY => C_FAMILY
)
port map (
Clk => fifo_wr_clk ,
Reset => fifo_wr_reset ,
FIFO_Write => sig_wr_fifo ,
Data_In => sig_fifo_wr_data ,
FIFO_Read => sig_rd_fifo ,
Data_Out => sig_fifo_rd_data ,
FIFO_Empty => sig_rd_empty ,
FIFO_Full => sig_wr_full ,
Addr => open
);
end generate USE_SRL_FIFO;
------------------------------------------------------------
-- If Generate
--
-- Label: USE_SYNC_FIFO
--
-- If Generate Description:
-- Instantiates a synchronous FIFO design for use in the
-- synchronous operating mode.
--
------------------------------------------------------------
USE_SYNC_FIFO : if (C_IS_ASYNC = 0 and
(C_DEPTH > 64 or
(C_DEPTH > 1 and C_PRIM_TYPE < 2 ))) generate
-- Local Constants
Constant LOGIC_LOW : std_logic := '0';
Constant NEED_ALMOST_EMPTY : Integer := 0;
Constant NEED_ALMOST_FULL : Integer := 0;
Constant DATA_CNT_WIDTH : Integer := clog2(C_DEPTH)+1;
Constant PRIM_TYPE : Integer := funct_get_prim_type(C_DEPTH, C_PRIM_TYPE);
-- local signals
signal sig_wr_full : std_logic := '0';
signal sig_wr_fifo : std_logic := '0';
signal sig_wr_ready : std_logic := '0';
signal sig_rd_fifo : std_logic := '0';
signal sig_rd_valid : std_logic := '0';
signal sig_fifo_rd_data : std_logic_vector(C_DWIDTH-1 downto 0) := (others => '0');
signal sig_fifo_wr_data : std_logic_vector(C_DWIDTH-1 downto 0) := (others => '0');
begin
-- Write side signals
fifo_wr_tready <= sig_wr_ready;
fifo_wr_full <= sig_wr_full;
sig_wr_ready <= not(sig_wr_full) and
sig_inhibit_rdy_n;
sig_wr_fifo <= fifo_wr_tvalid and
sig_wr_ready;
sig_fifo_wr_data <= fifo_wr_tdata;
-- Read Side Signals
fifo_rd_tvalid <= sig_rd_valid;
fifo_rd_tdata <= sig_fifo_rd_data ;
fifo_rd_empty <= not(sig_rd_valid);
sig_rd_fifo <= sig_rd_valid and
fifo_rd_tready;
------------------------------------------------------------
-- Instance: I_SYNC_FIFO
--
-- Description:
-- Implement the synchronous FIFO
--
------------------------------------------------------------
I_SYNC_FIFO : entity axi_sg_v4_1_3.axi_sg_sfifo_autord
generic map (
C_DWIDTH => C_DWIDTH ,
C_DEPTH => C_DEPTH ,
C_DATA_CNT_WIDTH => DATA_CNT_WIDTH ,
C_NEED_ALMOST_EMPTY => NEED_ALMOST_EMPTY ,
C_NEED_ALMOST_FULL => NEED_ALMOST_FULL ,
C_USE_BLKMEM => PRIM_TYPE ,
C_FAMILY => C_FAMILY
)
port map (
-- Inputs
SFIFO_Sinit => fifo_wr_reset ,
SFIFO_Clk => fifo_wr_clk ,
SFIFO_Wr_en => sig_wr_fifo ,
SFIFO_Din => fifo_wr_tdata ,
SFIFO_Rd_en => sig_rd_fifo ,
SFIFO_Clr_Rd_Data_Valid => LOGIC_LOW ,
-- Outputs
SFIFO_DValid => sig_rd_valid ,
SFIFO_Dout => sig_fifo_rd_data ,
SFIFO_Full => sig_wr_full ,
SFIFO_Empty => open ,
SFIFO_Almost_full => open ,
SFIFO_Almost_empty => open ,
SFIFO_Rd_count => open ,
SFIFO_Rd_count_minus1 => open ,
SFIFO_Wr_count => open ,
SFIFO_Rd_ack => open
);
end generate USE_SYNC_FIFO;
------------------------------------------------------------
-- If Generate
--
-- Label: USE_ASYNC_FIFO
--
-- If Generate Description:
-- Instantiates an asynchronous FIFO design for use in the
-- asynchronous operating mode.
--
------------------------------------------------------------
USE_ASYNC_FIFO : if (C_IS_ASYNC = 1) generate
-- Local Constants
Constant LOGIC_LOW : std_logic := '0';
Constant CNT_WIDTH : Integer := clog2(C_DEPTH);
-- local signals
signal sig_async_wr_full : std_logic := '0';
signal sig_async_wr_fifo : std_logic := '0';
signal sig_async_wr_ready : std_logic := '0';
signal sig_async_rd_fifo : std_logic := '0';
signal sig_async_rd_valid : std_logic := '0';
signal sig_afifo_rd_data : std_logic_vector(C_DWIDTH-1 downto 0);
signal sig_afifo_wr_data : std_logic_vector(C_DWIDTH-1 downto 0);
signal sig_fifo_ainit : std_logic := '0';
Signal sig_init_reg : std_logic := '0';
begin
sig_fifo_ainit <= fifo_async_rd_reset or fifo_wr_reset;
-- Write side signals
fifo_wr_tready <= sig_async_wr_ready;
fifo_wr_full <= sig_async_wr_full;
sig_async_wr_ready <= not(sig_async_wr_full) and
sig_inhibit_rdy_n;
sig_async_wr_fifo <= fifo_wr_tvalid and
sig_async_wr_ready;
sig_afifo_wr_data <= fifo_wr_tdata;
-- Read Side Signals
fifo_rd_tvalid <= sig_async_rd_valid;
fifo_rd_tdata <= sig_afifo_rd_data ;
fifo_rd_empty <= not(sig_async_rd_valid);
sig_async_rd_fifo <= sig_async_rd_valid and
fifo_rd_tready;
------------------------------------------------------------
-- Instance: I_ASYNC_FIFO
--
-- Description:
-- Implement the asynchronous FIFO
--
------------------------------------------------------------
I_ASYNC_FIFO : entity axi_sg_v4_1_3.axi_sg_afifo_autord
generic map (
C_DWIDTH => C_DWIDTH ,
C_DEPTH => C_DEPTH ,
C_CNT_WIDTH => CNT_WIDTH ,
C_USE_BLKMEM => C_PRIM_TYPE ,
C_FAMILY => C_FAMILY
)
port map (
-- Inputs
AFIFO_Ainit => sig_fifo_ainit ,
AFIFO_Wr_clk => fifo_wr_clk ,
AFIFO_Wr_en => sig_async_wr_fifo ,
AFIFO_Din => sig_afifo_wr_data ,
AFIFO_Rd_clk => fifo_async_rd_clk ,
AFIFO_Rd_en => sig_async_rd_fifo ,
AFIFO_Clr_Rd_Data_Valid => LOGIC_LOW ,
-- Outputs
AFIFO_DValid => sig_async_rd_valid,
AFIFO_Dout => sig_afifo_rd_data ,
AFIFO_Full => sig_async_wr_full ,
AFIFO_Empty => open ,
AFIFO_Almost_full => open ,
AFIFO_Almost_empty => open ,
AFIFO_Wr_count => open ,
AFIFO_Rd_count => open ,
AFIFO_Corr_Rd_count => open ,
AFIFO_Corr_Rd_count_minus1 => open ,
AFIFO_Rd_ack => open
);
end generate USE_ASYNC_FIFO;
end imp;
| mit | 0cc219dac5b171453ce923241ae338fd | 0.420221 | 4.435146 | false | false | false | false |
szanni/aeshw | zybo-base/zybo_bsd/zybo_bsd.srcs/sources_1/bd/system/ip/system_auto_pc_5/blk_mem_gen_v8_1/blk_mem_gen_getinit_pkg.vhd | 27 | 54,741 | `protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
mwxNacl66MFUVIMc1Encct2aHZOcb2pREujQa4vWHOpoY4Ryx1q0qOlrkehqJnJB6VdIGpRZ75ar
fafQO/Fcyg==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
WTY81lfpic8wiNg2xUTFY/9pIQI3CKsiY3j1Z19a6adif1iCy2STS25TLTe/dZhZiWj1W1FKdbVN
mTJAkstRD1IiixRw4XPUhHS0kg8DebELiBmCxBLwbMicqplV5b6X9QbZ+d65v5AnURtcySKvK9fO
g9n8up28DiiTZN5JTCs=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2013_09", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
wSJmxWNG9Vaz0hV3ma6xxbW6Q/tt4VebLF5ALUnEWrb0oMwD9MOvKTVg9bgiL2D83XqOs88TpeXX
Ifg7m/wa0qnVENMQDpzrbdsY0X541kchr6nHO22IjxAZU0y34IzPOD4wlt/LkBIeRhuE2oOUmiUB
mj42HGuDYM+OLJ75MJFObfMegkawW+dQ5MXJZAvaZb3Gdq+Nc//x1D0rUYdDzCYkIE6Z7scW8Wik
/MJTbyzmOPOK9ZoDJMjaYzyR5QyLAdSzLEdKbGH7TxDHRl54Q3XCa50pfJuN0PstSuaixGzvKQtH
Tl8qJKpy3o7KeFGSzvILj3NDt+zm7na/fYnOyg==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
TWs0qYIcIilONYk/cz99Kwd1RIRPFnNZwYyu+ici+iMJ2JCkq8jieFKJjspKJpdZ8Nc8B4CnG4qj
aN9KKPyGY83yGWxxRkXLLk1fDABMFcSV/QWTMe6VkTZV7rSzb+eWC79VK61VEPbjbvhhwl9UlHat
EKGcZET/5AsZpsdS5rY=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
J9Mi5TzDBer7RNgnQmNNaMr/oObsCpVjypskaWXDXbsUL9Tz8WTWA1k8rjWfCv9Dmq2LFoNWohyz
5PixLjvzdMk+0EAtGJRSdyjvZnuW2bmu6ekaURxk6HvWMfHmukxtVO9c/su/PcWlhTBaWmQfDEOk
MXt2eXdYnsY9DHX2xUQnYdQty3UwLIiL21L3I3SO1yyv2PefA4p4KfovFGDUvBPco1deVqNYRLx4
GphEA4vKS+OANoIaExoVeJSpvDGH50O+wbHahIOE11SE2zucQ8cWichU4yUJXYALRvrOZArC8ClG
ouWj0ts+fBWmUc+Q65XK9XqQ174/nPdN3w6Fsg==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 38784)
`protect data_block
CcQoAoAVqT4wGTbjdDQ8ySjR7KaNBHGgc3b/LIZs2djx34cOynfZlKVSDxmksTONea/h7OIiy9iI
ZLl40njjDG8PxDqxdxcJL+lxJFKv2RFI/RJFkG0doR1QjTyFxAReHutJFVVY8i8X1fk31EhM+M/X
UhUaqTcilahDNEPgCSvML1mOoOHUNr8fuCae5KosbmsqBkqjjm2J3VKLUYBLW7Qv22Tsbawp/9uR
70fzDeYytfEjo42Ou3tu36Cw8ah7sbA3PrWw/Q2ctR5EIbUQLZGgU6A/Y3cFU7s6z6cagJFQcdeu
Qh+aBquXEbDJK2308DWqZeDxS+UAX0OQ5u9iBdV81s03KF4VJLG9wHNbeZGbg/CVFJnsk/Z8shVO
nQnLicWyyjOMgJpVF6ouXF+FK7lYv0ZQh+ZSQVRVJVDj8FztshevLwGfYXl2m76jrbfdNuXkIi+L
q1OcP3tbO4w5rK801rq8Qnb/+n7NvXs2HFaVVs6GgOJ9myYe0qKxSzDfIRWF0zJQfwk9yhfcwo5u
ckAPZvjJd3E5/vW99rK7R7+o/VjdF0wqFhzubXUwN1VnhGP1Cj5gC+ZQOqRgdZoLakG89tLXT7sc
yjw9xJjO61z5jrULmCn/JEvzVfRFhkME1+p2WUXIZ+7uFd/Eo+Ny+zVi/xfoYL+EbXpei9UtcTrg
LMIH6Wv5EQWdYWZhvOssLRmRaIRYs/V5b7N9Cy9Sbv040gTGkEXvTxGdoAyCYi3USyhUjgwLvqFf
Uqb9gNDIrQz57tJ4/m6zfCDr1Ihnu53AuihgvCoeU06R1pSCGZlCmTLeE3bZb5hj4NgXl5RbyOt6
O9bpDU/fjZ+v6pz2jEfniId6FrH445Zq2Y0BuVp6tTsWD8iZKaApy85DNS0wzdva1lLUNtsUfhKO
Iwc7YAKhX+ZK53R+CkQ+VKSCnlAhYcOtmaSuBhrNgQWNDCfzjKdw9Bh0ajUZc0Aji/ZvURThrpWx
A9EXa+kCHtAxtbfDxmV4z1+ZhvE36vMslITyDM+Cv4cTiUf78jgDb37WIrfUzk5/OsSvqF/+e+uo
cSXDKJF6FF/Iz5juJHsZE7J2gyZuDIFCdXKRXSTciBHZ9ePQ49IIkvnqHOWW6cmsmyXrbGTSR3An
pDLw+8PEmGrY67MMbcq09BkURpgRO1sZgugq+jmZG8iQuLJebQ7NfYN1/nJkCfdT3UqhI33RmjcH
axe66M298Yli0Mvlim/cL0kPFvIO1bHp0empdfHsWvcmZmg0/frsbM7iehayjYQihXhb4PRvSELt
OGY3yKxZYL36EocYNIy58mHJDvTlRswnrC5e+YpaCX2Na+KVzAhHXj6+l5XZ3q6RS+yUREGirQwh
CohPZehYJyyY3GzD9mp8Iqd7enf/0FgQO4KmsAcZr1c74Mo5O+Ejmp3zPZOst8MJkRgqRA+AnqNn
+gvLNAGRsUnebLMJbzsftt1XH9uzRMSSx9t7JG78FaqN8goKjMudzu1mI4NgusKJWo/Wn2bkAMez
ickt9nL2T1YheiQuoBxT4aYin6+dGuaqX2hxkRdp9wgmRXRXQWLP8Ht/azvcvt1QyyjRNtEXvTIZ
coiqN+mFjUoPsLPE/TJeYGQS9ZvAtdgqVhfUPwmHYD+o5ugAjfrM059lhsUt5MuMlrvn9teS0aC2
F4BsFbsrnTaf4Qpr1v47c5+dx2LSKqh+7sWYBrWj3W5Qcsmp/esNwE14IP+MVBoTm90X0RbbAzxS
t8woBkneMy85e/SAJ2akPpMBUiCToTARTbiBMXgqTNmPsSqwOEDp6A7HhCC3QdEONIikUECdyFDQ
pOR8FjnYISrbVSEnPUJlV6267BWytuqJAlVDEFy2lAs4Ig0foWcTuQL2vze0nLLvao4BWWAbGhbq
Td34DBF/RroGxm8EyGeUhgZ2LG/Wh5YKA2WSIyMR612boPOFg4NNTJB59zPNB4SRmbLrx5BnY+qr
71eRvfeLDaG9VU3uFZyxoANgsi1vu/GhPyx4UmGCSFqym/e5hfhw3S6IUDEjPZjGiDa55T5cWzMp
vXbfZsxs6nIr9hp2hx6oRmw0EK+879HVWUnhrbSArzEcuz+gO/f+ZQei44Xr3j15SQ/wKS2HWsj6
SUu9Tjk8+ZJ4PbJX4T/IAL+bgYsk0PcIFNzpLYiAAycn6Zulgh7BnoadiTNv5KUwyliyyLUgFqB7
VCMdt9lMaWP+BGmWUfwJbPZtegsMKlkWyQwLua24h6udLkp36WoUsFQFFtfBAj7QOPB0b020KlkY
Ez7/gWDXzAJR+6RjOzT6wd5I0xX7kryiUyTe4Y9Kjyh1Sz7LiKok3tmPdcbzEtynplquxgIlV5lW
EhTO0cSIVatNZSoLpT5noAXWfHjJZyasVmG0ShSGOH1rlRb4ffSHXazt1nx3jREqRx2S1DdGzxAP
ZBcvgPt/xTcnl4qbH54xCe9I5fJhKw56zEZcFKXcmLGvmq4w8crofkXX/LyJk82qhPnijJaI2r0B
LrYuyZFe/rfz6Rk/Vg+E4cHYCT6nr2roFdqsO6B99ekwm9lqdxjKatUKaCZ762bTaO5VwZuT82G1
saYxYtzOR/hdEb64QrSY/9S7Y+S9RtQBYJzEisMQDkfgzZAGzWy78T89b9auAyusMomZAupfYLEx
5uYCSgfAhJd6Wx4d475Mv4lyOxAMSqxSKtJKQUC9V1e9B3A9ZaIB+a/d0fgoNAFzyXpOkpQbhind
3kyECcIuIK3cF6J356T6S5XfR1PCthomfdAob/37lazs/csT9lhjaU1y3/L0CoL4gB+PZLGWKHGy
k3T//oD1qCVFYHGTYpZY/IQlt0Rm2z1sv4qSB3505cF1fjtrQAaCto5KBI6/5cjBzCGqdEk2yGO3
4+FuCS5y7jPRBSwViDCB/eYoxB292ZzD/OBZlDmzO61cGxgmyA2bnYBD7xDBShd3iMbPoPDvxnYA
yXDsV/KfzvvjMYZb6IsjiphkZv/BFcCQXD33EjbDYX0EbMeQLtMJa9biFzxcEcM7YiRe7BXFOT7K
3SGKSm+3oOCrJsr9+FTIiY1wqgUIM9f3dRCdcYjlPIyurNuXQ9fs+fJT32AtHbDu2+44R5T8n90E
RQl2UWZTLI1ylmcmePYiS2EoDom1aBDwz/e6CHK7yX9bOcWzBi21XaHaSFZ9wfWod4WLok7yqk3i
t0B9MxtNpeMQfrIH9DHJKzjN6yi7qrdju+FbJQAsvoyMyXgmHgzJUDF2NjVhyFEh/02UAl4n+Ab4
Z9FWFM3xtIELP9vrKMazms9J83J/M1XBqAsqz3z5u94zdCwXi5W7iJWzE8SH6uloLSHCjAtaZW0S
1V65ajckplM2YsW2i6BjNR5Z4FTVkzTRDvcgQYRI6ej/pJ1lYRAhHgrhB9Cn9wF9M+oosR9Dp1lM
lo5WtFLUvc9F/4aURliGtztT1ZetO4vZL5l3VK/TDrwMG1jhyMvfuq49c+/0vOWK73M/DUCr3+YD
VsEeRix8aGY+R1VvGtrIx/S1K0dP46xE3DWoaW4fVGwGda0blascyFoRrhpP7ZFdAuDqkHfSt8Oh
ggnL71t77mJMd2r0WwQSvnyjLMir2Pvf6u+8UkVe4JXfiyt+0gnj0Kz6J5tILMn9GI6qTQedXuYY
PFIWsPrtTHPHHzS1Uo1vuP3T6sYgI31TpUZfIS81ONfHxqTxE9Ks206s6e1DQ8WIngzcv5AOqg/F
WR/GDIvT3l0hMy3MGbZTiRrBfU5dcBvTwDyGWuykGgxX1L39SPEB/ovcirwsRK0Vlh+J7OiRTfrh
Nbo0Qazu/CraBIvv0KQPMLOrjx6tm7BJTLVeXHC6Pz2PvdN/f8S9qChlJ8kTczhY0/cyJN/GBxIx
0HmXnk9SyjZYv325hHWP+EdcMIWoQva8a+mNDr0y8jM8KW4V/4P1VQhyZQEbpE1YcE3y19nBpYCk
yKYy/q7/nwO8+SBqrT/F75NoL1SqIiKS03Wa4ZhkKzsP+Lj1uA2i+wYQO2HLiQn9hZp277zD3M2u
8SEop4vWspDIu5jsvoWejkodSA6DqW6YQpMXQ4Ch2BzQQeE8B5m5fHpugieE4dfWCQ5G0wvZN1lm
egzVrLn2CmqS1YxR6ZfrunjyF8wlRJhm0FSQTX3w2BBsMxVcZRLWHaRLE/GbtYbGcwrjMEGm55YN
0Umus8vulGM4h+Xsi7dOk0ajVfyM9YhIHz/RXDsZg9OeYjZL3kooRlAhJV4J3n/fnfxfP+Rlovz3
hWwbLpUB3lKKtZdZu2RrIy8toQQmc5+mtHqySQrje6FeNzMdXSpq3UkZXtlJCaRf4gwXFqC34kuL
fthtB+nx3+Kdh8gvN7RQXD6fdYy8nqBDwh+8O6KrPzrbZJ1stbf1Fp8gg7EqooyiVbhrMRV9q+JE
IRVbZdaRLgYDm/cG9/YmN2YzqgPvkgSYrfsPTJ3rsM23/gzKtTW+csk1rU7BosFNid9wjyUNL7mn
EfRp5xGHujTi1djp0gtvQFpy+kYYHLzGs6GAR2Yt5CB6Fvb3EnY8VxuN169j1y0Q0Roka7Cnz7Sa
iap/4VD5CDt58VeMaL6/2avNeQh6N+snrnJfFC4BKd03wANM6Ej+zxVMgRnzxBhIso399CceRilT
hppneXH81kpkgXL8OtWieFDpqYfRZk4B+vnWRtMydSHVM9Xbd6U5pITdoTpXDkF8V/qsaJnyKjeL
H0M9cE/S/Vs8cfPt3e6L6pANg2OCsITuaoQSShkPlltRtnXuRzLO1L3+Wl7dWWi1XBZIIEmG3ay0
RXbBxg/3ezsmO9cCWLpieurUH79sLuca+9bcm7/n6YaZhvGV86OvoJR1E0I/SkZUJiPj/Bp10M7R
v2s8GzaoD5VuiegdIiGLHVUW3Yv+WK0gNIHFkOQkmuieMLaU7xNLVI1m4fI+asYFJ5UuHE4bbzHK
3d2OnPhgwARKlSqF4Uw30Gfp+p/SfLi4MibLNucZu9uHOGTube8YIRujobwYenBIma1JxC46q770
S3Pr9qfj8xXDjNWsL/x4PdM37uNAe7EEOyK94rePoG4dmpXqSp/SRRbEi///kuQtwrnCnCz1Ffg4
uRfU25rjDOJ5yYoXjKoBHWC68QWmARjNhukKEAnQj10Xcy0mtTXjZLuOEbVSKLxyaz/fb6lBFKCk
AmxyuFpCtK9wHWeMqIydE9MzOzo3+A50o+PmGgd90NPB4o6zfvfQb1KZCq/ERuMmG9c/uSp3IxTA
GcXhVTGQzz7fbfHbgoy8vJScVN6FNRONNuxIDIDoEG1hkBZYHIKzP9+ETkLq9NXE6TvOyJmxtrCG
QRJnPpSU39aPGTwCjBE6o8nh9Nhr2rBeqJewU2V/GMu7u2k8URZv/I0q6CNFGavumpJMlTEHGb2l
j9e0unInYL5tC0cobxXe8Zuk3yeJW0JH8XslAlguF/O21oYbJtUS7EvaQk+1S/vx8/GtTEvp6a/m
zAJSgE3BX19XgRQ2pn9zKKOAYaj5N60ZCVpzKu3ulsFGbs50psCvvB0GxCPabt4c1S8Ogjz/QP//
9BlErvfCQStz7lyQX2JzwLYHpmF7zI0z1pgUCg9rM3yVHRkKdxnotTR+m/H4j6+CehpX3P24TtAY
8T7Z7LHYsF+mU5ce3f9lUL4vMWtLjQ7ensknSI/c/a85ILRyhCNlqYw3HijL8MXWDyEqs5Ka9lkx
apFgdWBqvtW5vcWvw61Lu7GnhSWN1EU3YnblAZNbTaRo8Xtcqhkeua0fMXxwo/2pkz03b6kiZ4yS
MFkgFj5xbaXgJYvi8DOM3d/dvozm+FMlo+ew3tEScoj6n3/vnv5T3bT7dxKmohWxuBDC0bOdacop
ZX638rZUhOLf+WUBGBw4yBHRC8eORpTG+sCsq9RCmS7vFmH+I2i1GhkZXpghlxdinFnCFBos2+El
2x0ZGygm58Bc2y9s9XGNf0QlW7GRVz5W+L3QC6FF2qmqKuHR0zmFrz+Bu2IREFh+8Wb5X15vpEBA
Xp9xkh/5aTBhQxiVNCJJD7KhLK4QdClM29ts4EVp8OnB1bmoo2CdSAsM1YM1mPPcSguVMBrfFQpO
odWwcOmF7sMhPeksxVZod75K9NZR9/QaTftqaqjHCPP7YoxHI/GEk2X9CK8SlHynWUWYv89ZNZNV
DKFFBIVn7mCgl7Ih+D8Gr4u2DjxwZgiyTW92Uyu/NRyHulNH7kz203v7jNpr3d3xkInwo8+FpdKn
QOQFeSDJkuDJV+ZDzgt9VMMTWRCj9yQO+EjRQPxAwdZnSZmNQw28zmj+B5h4qgIYPJbuTDGdlnkt
Yjv6uLSgAytLAX8i2nd2kRpc2Eu9egAnFgag5R96wcKguT4XWEqUlGZXBpCbpRMUi43RwKitL4JK
ktAG3QSjrA5ea22Ygqyy7aYoEw25LYc3z1Pr6+NZMcOkbnwsOJNtQDtwOEj3eHmFAMg/0BjcFVQh
kVmgNCBBK/ggn04pyYk6WHjc3+nc+YkAxZPmZuiHz5P89CGu953ikArA2OtQNGYkHTNMK+4HS85c
DWF/gCiCABgdB1N0E/dsCPDry0xROuzj23K0oACjGIBAeN9metcM8kyqikHZ6wHtpihc89UCXn8G
01x+b0wz107S11eN/hB5/wHuijRaSD3/SCr9Yx4SgT5YdHTT3+lTDkGOOl+QeaiFaAYCm5rZYTMi
aiHf4bcsl9xL/+BtxWWNGJ77zmJymTa5tlAnG0NbfVslpu7qdh/cEuFiipy07i51jeg0BIiP7ydl
fGfjQaj+cTLwpZ0OfbKqPxAoMMlMVRn7+IqptnQIitXhBpJk69KHBofMpPfB5fFrF172F7vGH4zA
bdZOWrJAr6S9qPoW810K1MEtXL5xtNGg/Em36fpWZ/f9ykws/0orMDnCpOdVXsihLWXqxso5eXtr
BLeDJex0yCrqISBTBSqcxavSveW9vMOFykbZDORgnGvU3UbZiSln/PwVPxgdm5Jv3QQpL/uzSSHd
ewhJuvvY9/KByb0bU+MkzljOJFJ9iQuzZvyPWHHfjmKqczysLPg3ZMn3d2sSGX6Ld3USI6khZuGM
OXLPRQHEyslurNSf0o2Zhc9YQ7oPvB2hSFlCdD+Aw0DINcJS2z8btBr0JhqQ2UlJoiriZEJMYzP5
PLk8gkS+IZmG02BS5Qerm+e2pGTU8nr2MqGO29ThYCjeyUyIkfI8yI9kzCsGcuRPXl4pDFXBuvvb
oegox8SM63x+Kxzhs3aCETA5sltx77JDCUFTuyFnDLGsKAASFQ+oaIiUJGFeCly9HSK8MSYRX5Of
pv1eWUUWai988qSXRTW6ZSUeKnaXKP+hq0+JIAKAxl7afFINpMUE6eayQOozcvQhYlhOit6DZkHA
//am/Tr12uXtkyPxduH8JvAue8OePfsgjPzf0o5N9GGJUGJDP/6Hc5MT/WyC5gFLKjQhxw56Npbz
YqO1jpDvzYjCLDLrRKI41llyVzO+zVzyoNxDcOdSjWcp8vIybHe/r/0ob/ZIxz42idbcN8HV7TT/
6Y3lWCe5FKH8+G9gQx5JcwFLh7TPqm6Y6Y2doacg8/1bBIVPOArxL1Nmle2YpkZpjWN37YN3usB6
GrmSn67nIiaEhZ2andBPbD+c6/NtOnh1xTcViaB6nTBMC513eAUVCpULbhmBJx/LDeeYXqusv9G0
2pzVXWqTKHf8gRKCAlS+FcdBipD1SPKB6XevIzqbDhvt58z9G0zteYhdjKDEk5fUCq2OJPWYmJdR
5ZmDuwO8IoVdRpiOLn8tdmJnXWeJNY9/PL3phFRU7pHhR8FdimPLX/u1IXLZbqkzicZr4/gxNeP/
jzihjUVkh8rdehm58kmmLWniuOJLOlFE0WPKWmaPw+9dj8c+iOXBrY1L1UddBWcgEQI9dl+88sTF
2dJW8YhaxyC7Wd3kHfdGTBclIdI1YVIuKl0glXd8grNH8c+Z8t4ooC3vWX7HPOhskje+jGBGJRE7
T8KoA4Tk7APWTBCUr4M5uQCMS+XnDbQr/KVKF8RMHr6qAyCxg32c1BFl2oYx4EmSyoCwf0EKApUO
9PupabTHHo8E+r2KhgWFtexm2gHejHL3+hgPCyGufPhvfnxnh65ZG+tJnYbdU5SR6bp6gioynsDu
TmprwAcJwjeghOO9lfLi/vU9XSir1w6jWdXUMZWa2Sk2HduYiWdAToP2ZM04KMxXp1wvsEz76YPr
jMeerRPqW5LkY9VcWnoSCFSyIKt3VtCOVckSli3+KaOHUmwXklK3AwxLIm6m80gT/ohfLfCDd2VB
PJcn3XoWabBU/IpSFI4JySKS04zbN2siJDN/No/wk+qelbgr7d+2RzHgzTK3ah+/WASEhRIn9bEI
66kcvMbawByjYWr2Fa+AXY9toGu8CpBm93dKh9p5vmWzRsFe522BnB28jR2Fx41UsNRKGU32pVe0
mJDWWDB0GbyvNi0Qg0BKr6EHXQ77IlGptEGqdUtkjB4uNVYIXH+6rkxE+jAxcT7eh5xxLyxQN9DS
afJVBN7cvBKPOTTIXNZjqXmlOouvL9+p5HsPIosP4Xhi4P3q97MNQ0cJcrfOtNgojVOhycdmIQbV
a9Oik7uMIaPgHWGpEnmYSmFHAXhhULDM7UXZOrhgeBPuqQ7zYF9h0OisHB4O7QLY7zNpNgf4ENPN
N3Wj3Haq+Dm5yLY1/DOYK8YO0d7BKtbKOSYq8HWZoh0TzaAplRHSG9vOvdkGUJebB6e20StSJOqC
xVUtdbPOkIo/okd0KTwuEV/KEuviIhR8QkyYQMQbHjnjpkClj7Rw5qDNYInJOoyqGkzQSGPVzWwU
h0JIF3bsUBMwjXnpGrC0ssJqfgdNo3TcZ6r26O0QRjtGqOuKaLxK+HcmGMY3PP1cN5ximhtOwRu1
sksC3uc1NgTzF+0Vh6+Y5G9S3MB6HoJZMRX1ZXgLj0wXUSDXYjvmcCpPF/9VblgzYw8w40YSVblf
OPzEFY9w0GkqfR6GFn64VXgzsJvdtzxu04ibFpr0XTK+s+fFnODqegJHYoQdeUQHnxPsPjG0ioM4
N9XmsDU+A4cV/KvLbS2ZNkz1O+s8/xUOuBLaqZgFpScHlaWLQUc2VwYXCuzBY0/tIKIEOvd3hY5H
3yAFI8/4uTMrwT0DT/cORQXCS9cObzsopsUm2ZXVTKaf1EbDaK7COFcA0RcKBmSivNnALYL1ZXT5
wRlEY6NjHIQv3wvVYsgPbYPHA6tspArb/sW+bcffGEV3GbhAZURzGLZ02k0pkiVnD28bpLJI1s3f
xwXmTqlIlv/9wHApr15EwQ8+LKUlJOv2DFT4MUY7x/bZdZxkf56wpWcY/pv6cNfATIGe5LUfPR8r
dgsFwjfv4tCQrh6O6X4b2KIoBVfTuxDCAVyTaOlzw+uoZ5keXvXGTwQO7tqmhWV8yAF5YfY4Tx3K
rrN/eu6N2xkb6bz5HE1BuAgBf+UYQtsHHRUj4+S7fnOViZUVrwHquXrIburaDHwf+IQZz+uQjC6m
j74gaFjU43SP30KPpLGefCsil6saZoEAZRIPrURh4ttl9febOEBPCaC6MMTlRkcTXABkcPgb9Eo6
RvbQNfs2usnafTur+OnlUR/2jG2zJ5RX31jS2jyHsknN5AOZAS4FURBYAdCUsk4AmcQt1ExKgY02
HE0b/OzFEfdIjFuL71+vWQTYE+vQqvBC8CbBcbNqKo6wl4cshPSnfJf4yYLs5VQiPyInuYNijs0w
wUktDx/bXClI0QwOa7RGGO2e+LnOCMNfm1NZz7/qEg7e604NYTOKQ2xoB5H2ZzuQE0CUB42uAfvR
8UgW3yIwOqy6cyCZToD4sHRo/XHhxWWWmKXll3Dfjx4al/Y6vtRlm5Qk6Cd1UZaqq34UA/Yo7ugJ
ODJM6Y1N3igU4R9bpbv6om2A8JeRg+73Cpl+99DAxSfRqC9F1Ga68xpntSESgttImn3qrY1UTffD
YGTergbQuRetbMPHkX1RXwQGrgydcXLSHgXPPbP3KlYPppcv31jqmplMJdMqUn9VhyTYsXlXEU5b
5SFqJszEz+cp9dXP+g5+8xWwPAjt/4ar65BGPNBgFd5wbHcaodY4COaGWP5zCCsI2z8XOzHwwkpy
B1VGHkS7Tiy7RNTNmujtXPZbOS4Opc8ZRyz3pXVFTJmdNIxnhhDgOSCp8PP8qXcubffSSE3TroPC
xPpnZQBvSFhQQW9MrG0WjQhjmcsvrpH/5w6zPP2cnjn16MRqSy3VlRnJNbbcrsleeqmS4b5RAGgp
uW0J2S3KW0hDnGEiOwESBLWnzY9IQm+x75kblceFLpyKY+s9NmMgiShSRcfhaRXZ6avKAo/I/ahb
WkyMiHiCOgt0+KtBhN3Lbvm5IRNLU3bd5Mt7PXa1BtGcQw9TdU0HW3NX4LBiEvS2nSdlSt8hK46s
+DyVBX3Pp1recyviwcEExwQXhmKXuG+IbE/wVF+i0HsLb+9uG5zYYmF9KKrhzCgo8VgTpubRBeCK
naGuXeudm4VoxfGN9FZNxkRSmJL887L7Qtd9MReN3976vrlG/1T4cNLbHJ4se7yi5k1WRU+aQgXe
QMt6emUGio9EMiVksSwd25qOnEo3q9gGqlXPV0wvuM66SRJIgDkY0JkLwjN4gjdSID6VvB/lz5wM
kX/gkpO3cfrV8O/oIPqLs8QSR6sBcEfYhlj2CPFRSnojEdINbL2yc+Tpcm9QQTrWns4vNQiC4PHN
kIbRWqdL/b9mHZnERFTRUpIZTsE1TfsIrB/Zwxp98In4CYd8L2s/UK/3q+fU66pzcqeMPLbzrY0z
vVeh6kPcKbr3eXYzOlBcJ2oHsEjGP7dk3uj4RVQNNEldcVxh/RTxyckv5UQ1lQyCPDphup41MmEP
ZjPBbKXzHzYm46lQBNmY+6dqBbz+FC+U7pmLPYPjUbEeHaBUmlwOcst9kxaX7ZiwGvlA3zND4yn3
U4hgMG5lPVevIAQv0bbfj1yTWxW07wlbUOERwS3SjOt2iFJbFl6n9bVTp90nURXyJUScBvL5bIPC
IXNV/8Jal/wIQ+BdjhwbtJBBXI60nKT9wb7ldaXwgoqO7XaY+n0puU+ZMG4kcnV1d8rLh1r/aJ/n
lK+t9JRKGNFD5MiI+vV34qG+pdRhS0BIni/31Ogb3x1oPFwSAwZN79EWbQ1/Tlfd0u2tPrdjR7c0
wJXjbgALXLlVjx2ZYrqWVg2H5VEcPC/mao1F5XJL2p1ohv0iy6mYGZQcviuV00qdbP/sr4QUzQjX
UR9rCUazUCGQZV3GjlQxEG0TKUXUqR4sJoF3P4xr6CbN5kaUUF24CHXXgV1UXJmsirwbRSQwNX0s
EYSF459600vUnWz2cfwdl66SLGMpgDcq+kIt000rgqEEk8iOfAiV5gqO/6uwbZgnUnhq5PZfdgj1
kAhqIKvhOReyKf+y79r65ozVc3ZzZ+b8H1ygxHfHFHFFQmtTKpIPAX+CXN7JCZe1DbB4TV/1h6Nt
3aLtLZmOB1HdmSISxR87cq91pyMlLD7xOJR4uBAlIc7T9NJyYCMEinD+KRtoUPQoJQnuaGydcl1y
QhCvUZBzRJJTo8oh7JzCkmke6q0ZeRmxWVJXt7yBBJdSpqLn6kJ4syDh/InYEugoA2QOmFnz7UHk
q5Nq5r4cQWnsJU2F4vwt9sIghLO6lceWq/jVK6To9SED8GkOX3+/GdWJUcag1z6TDqCD5JcWTfBE
IzzpE6IIWm2UYmtnTpYtdMmGjPzK4SDe78ns4a94cjT0uX1s12vAe15iCtSIuUYDgjzACvCBqrMh
FTw7Zyialf62GVZkyfZzpdDBEvpG8B2nJBwRAY2KOOIPppbntPAnT0YG2rX/Uxv8FzbZXEVuuq+X
ob4lsLgYxxc+2ot4YxpsKUF94+B3pSj8Cesiz2KJMn3wzX+0nJq6x+r/eWijMxA7zSEW1kmq/IlB
dGE9s25VowHbbszuA0e7IzhuUWd9QfagchuKBZc/2m9fdO4AE7FsdDZnat3tP+2oq1TyCxBh5CpP
tWbHJaLwJrp6suAcgl6TPNde+tABmgkkK0uVWLc/IUGe3JmAEx8qyGbGZaz0RDWRMoITAfhrv56w
ReoWy4FipsCp0Ntq4ThLrS01klUuecNvHwPRsO1ntheuqcBKZB53HK61owi23CuG8HrJ6nu6w8V+
GDAtnijBYXc8FDtQypd8/u/c2bAu7R5TDi2hpqRSuWbRcmI2u/5e/zLykc2dc8R9fFodJhJbTWBv
P4GCThbcISvINx0vIzhDMxjvARw25MU/OV4AmLKHzOfW1d2A95COs72f9hfFNJOeJuFQtohkPpGY
wzN1/kBeswNXHjRVkROrfIKUVkMZU4SmCRv1sLdqhTUROB+gqLRgDR6+JnpiQE5Bz9iDSLGUeG2m
m43eE+gWFRJA2raGdeO+Ip2zfuKH2q+EerKL8bX2RaGlGoZNzrWWss+10bzWFD2LkheNcoX/eWxL
SeTUBqJijZ7JcM8MXITZFRVqfdC0RhCH0drqH2CcPynMIVoxMudDGyVJkXah/9rq0Vrj0Tk+GlML
E1iuN8DWMnGVgCi78QQX610ZWnOYUrH8xuJfy/Bfp6CK01HkZoHExvmPbqdrBEOVwHNaVN9uDdpS
riRwnuoVJirsMY7wybxe5xyKW+SKBxHi6TzxTvvfoAkPpPET8PotxBSti4p5vVh5bdoUIyRUAs+k
SwH529yz1eNa176PsydZAeQXPemE5X92J30tTbWiMWvLojOS3/T6hFi3pawIaTjtFj2p3+NzchBE
No/S0JMgrOZZ8wony4d6tCXofEZgmAGo3izJ3Ek3N80Bug5BXKp8mzjtmdASm+xZ7IFOmStfj5fA
QVS7//4TcBTH+Mez3ZQgwZSluxOH3vaRwVX13IhVldROuTMGwJTVhgkkz3nGHWWPXMJZODhNbMHM
RseDpNCc3C6Gu3cMI4tX25LucrSKnMlr9qBnGt3X7GU7Z9pNPYjYobxjdvobzJVAnKPSOL+PazaU
AhwU87HgvNgP4yG1xN/sYhkGuqFhR4Zh3IYDJUfcLlHtGOeYV4WlulovmZyEAh0mXKHc+mx6dJ4a
kucBGSgPE2TilPSZvcu8Osqon5Hj+tovzPEwqFJzt0X/h+/NzlwQgAgcLlo9moakpWj8PADpGd7k
SIEROdMpOUmv9GUgwOSPqYcIKjHHgQjyNgway+R1tQrBNlxFSwta7Q6rw8sUmjV2vww+tAbyGjle
rsTxd0BK3nx0IHXw9pZQBBKgqQHj8Y81mRDxlfNdXEPwuZkqGN1VJK2UTbjq10ZjKaCFIMyhy1vL
MZbemNXo9HKVkhb5Crk1Gdm43vyf4j399TZBpdmup872a+/6r92k4TlEMCC7L7oyt8Rum/yaatRk
chUGbXKETqVsh5oEeUYGsBj+a2jRWl3G/zlpG+gIsu4u42vt6EUeKfK9uHf+bpIGexzCg55no74e
E7i0PxZCZRgLecU7/t/ccKHL9BDyO8kJKWCZIIGFlz+GJ2EkqHHFx3Qp1ZXFHsjvyxCO4tRUQJau
fhP0DHcmOrvQt7zd192FUpt2TXOSh2XIh8W3EIl+k+jgdFLn3Z6amiy4hiNiyVBpbw4WZkRQzuDh
tMKVPCr/pcUk37QoPkHf636Ng5lOKYYm4YssNYVOcDY/ZgnqK0NV5cGPvPBtpcl/LCb5GaWy4rnM
xBry2kT88Q6I8E4xPFdT+LUjvtWpSnAoJ5qovp7BW000JNIJK9TPU9iu8b6z7HF33ZRL/L7Ih9e9
kd1DbAkAvDWCNRmD1UC/ihtJB5p1w0J1EyHJs61dE5h2WQD6K7HLfUP5QrIqmmcH3MR8NQOYxh9h
+Lh5mdzAGbwFxu4DzcRp7XU6u8nUqg95gjFqJAHgs1bM9cUgfJp6Ah1m7ENhE668xvm8EumTt/R7
r0t4Yef1ri3zFtpyRf+EjylaeT5kp7//bAJXtAYYeQ3Z8bhb9uICgVGzUEc7XL4NmNyk6e/KTHqf
1DfOgcIlO0IGsglreXhdh3epaG3V5VMhms6fIHSY9Vxy0O6Ad6O5tTpGtcPe3ZgEICnL+HvWKJsz
3j8IvaZcYO7qHMZA7myxpLBlL4+vm5bMYFl86R8lVybLo87THC9f2pq3kIRVWONIM1jy0l//L/u/
DrtMEPfA1RIPiNI7wS+/9vQWynafJct+fECGpvsdePlMSjAHdkFBlJQu3QdeUUbbcOZm2265FdSW
Wrnm5wRsKi6hm8F6UH60/pcQ55KFKzZPQP7rfRDE13QfFiSNNcPm6046aKXsCQHNhjvdvsNtZJiJ
di87XM6neZT6NJd9hJyDqBzzNp/ENfrUFtkFUSXH0a0bnqvN5Yd+jVBj/nzXLz/LGSKw+Os+Xc9h
NlQnSK7cJPZA2TVF1+9PEbgWnkpTz0d5s6qZJnT/+qCEdeb3iTHuMpj9TcK3Ya9YUNkCoQL5bm4R
UgXl5VD86FtqRjQK72MmdTwKn6n7FlIHpo++FdHCO1Gtm0VKJ7WRbizN8cg/TUZ/TOhdBNDOS571
dSEOx6nym8hkhF0BTqdYBEySLLVd3/ET6H7cgiqgIhEBMZWeiuZcFEExiumjVV2conwLzmzpoh4h
lxgO0rS2AnThhNVZ32pnfzz62rnWK6pPj+x4H5ksZ0JdhhwvsyUQfv9iIapeTfaZ5xSRhnNskgAN
9ZxunKjxdj54fNoVW15VUN3E19yDxeMvolfcSG4eyz9RC/CxZCsMfDl9xUGdcwd6wFb2YIOhuB5Q
SHlrs/jN3l6pV48kMIoUB3MFbhz1AcWYcAr47rMdlRK/PiOuRJ5pnVC9VoZlSvRucbzeCLt+OytV
gGlmH6slnJZJDyd+mVSR8inpAA1XK+waNmeOG9fESKDy+wWxOlDxhymlrhBw9qhRlqTjSGsnt9I0
tnO7gVaemunMN8WrC53HgpaogNRr0vKoI9TX4KOQd2KprMUM9RRptznd42WTiankb0ehClcfjGUj
H9yU3x72YUV/4FAZsw+lyynkI2BiW06DUFvtDM6mGfGPmFZr6ordYznlHZv3cypTrBNkw94BecEw
xsj7FvKfOE0P8xBXyQAhpb2SkiCV7KKHoseeH0qEj4QP0voiutOFF1gF4f+k9NiVRLFuYGJBOYRI
WN8yZjUr9Vdgcf7xD7BukDFTSm25A0iwk5SOHzgY9F46G2trRZRPYG+SlVGB5MLz34exsKU9T7uA
dlBMWfrH9xr0kvsvKswFZCjxWUP7G0nN9DnRqBHVolSQq5ewovRYtGyBpKKXdJQmHgj3kQlPxf7G
2hbrYGKRAbre0l/WhhrIqRWPs1ceT3gBeQZd0bILhNn1PJxgw0rdmw9QspCCwu7Mw9tCznwdV+uY
4WLXthBgJsLzT/Jp5Xl7uN1PM1VhtSgnOPpCDtDtNk7ooTiLNMEkVQM7Dc4XImCbiPho9u7DlT8o
MNg0kvv4R7SGqJTtGQT7u6lXjE5/SQVV2lR1nz8rfTpW6I4xEWbZLlRHokw7A/vPLEz/euyIWDp0
ZezkcoOtOJOS55UIyGHEgy9xjM49ei+MM7sFamKMfS6yvP3LBeKGC6JMInj8vkRoDAk++44c8fS5
gMn6J0cS4JAQWL3joi3cml5E9G909AZFcIcjlCBPJnq1EkPnhpF/MbVLq2O7sfN9IRP48quD0hSk
5xR98MVFmRlXVUnTfZ5bU90t97imrGMT0LYNrKWOsyl3cRKUOJVQY51xiXUkRaUm+VIKYkSeQAP0
5BYpOmIIBDy+aCIXQJy7nJD9nc1leQRKbvkHSttoeTH6b6MwRDlPkylRwP4z6Rd3w1eNQboIhc4w
y8mE3xZL7EgtwxpsrjYGBCoMaylhMaFRSrwDbiOrmz2Ob5sGhdjIecTLUgkAWP6D8WJUeA7zkJtt
t5Ji9qoqHRmBET288+q2sQjLhd9T/umIcX1KWe5Qd8YHvQ46+w57eMwboE1a31oTeb8OZH0xaowD
VjaXOXl6ghZICTRzrcEf8GLo5U0Jj/LoDrEnDeK2/5e6B1rICA0yAfRTKW4xa8cNogOc9kciBqTi
2XMuE3tSkMCUBlhefhcQ15Pvi5f1DXA3XRnnQiVf9OmbwpsWXm4eitRB3A8cXobq9eK4V75kP0/Z
4VbQ/fII9/icT9d+IxLYDgRTWq3OBamE7Wkn7/o7RB+4SF0jf7s/5YPWGQYM2IKjBGaEe0d37vmk
/QaTSHK2LwuJzPUICBI39HhS8ImU2zlcKcDcw011a/w3tKnFUi5hjA/Yp80xBR2fEz9+EVD5zd3/
NW582FPkeZ/cmTSZ4vV6rSVGhlcBzjEv/OB2CwEYEeQBwS7glgNA2wkKS9iPy0Qw3G861UmpECt8
hucomqKAZDrQwlS6vshpz/uiMCCE7SKVP7d9FdUWOmlMLIuY4fuQnJbrVJXjM6A0ohdsRzh8k1wT
OxeeiZXkXJNYVz+i4HBJkubU4rSNDNiVyvcm7RsyejsnGllCrZ7sVRK6Ph1H4/Y6DeMfeWIO0PYQ
CUgfUEx72c+FRRhWR0DlDwmeLuscvcg/Wzr/WJmOqEELzvxz6lJ2Szoj3I+Bp4rHl7idVkXA1VAz
p4AJ6XCLWkluBjGVxid05K0KMhR5m2eOeNq4Jxx0eJjtQPVZcRv/6SCUH+dz9YF5b4lwQgetxcbQ
kDJeXBkOCKjoFEtzoJEk5s+4WMdiaNno9Z4oAh5KA0ICKHMkU+z4YAFBbXxKBDKSEFp4JP+GtgPQ
ugxLZ0Z1ltM37qnIqMt/mLbJ/gwA8Ml6h0Hoc98VKkFIp4xwco5/F1iWen8qaZuW5phFZnl2gaIj
8HT93ao53bZsFICNavczlAoFJqL9A1VKbLrwb5zThCyBbryAzf5jqYpBjKFv05aTxr/KTm34gBCY
L7XBOqaybhjzA7CDU7Npu4FPrg4nBT4paiOmryf9sUP/FoGdebrhayz4G5YRI5hXbTtEjsPUz6C/
Cf6dztBo1kxWR6z3Nnpj5b6ftQl6F/WbhMflE2jppVxkhfdZQ4RGkiWopY7u4WUuJToakge0mU+x
jdjsA8Af60djKAFBgKJXrnTlLqTFsydhHNM9Z72nonfuUlm5l94cm8f6kIzWerlilKNavp121xtG
rddEBslEgW7/nnfndSdfVlO8H2OxoQWALV3Xs++3GIxw3HZCvOU21RWnvgh1aiMQTtPoTBZDWnNZ
mKGFjbEro83i17N/oUKTGOe8Ygh8/YknaRIOjUJsBaU/SuTLu+xPKwvOutl/wJfpT0B30DmpF7y6
XFszvUvlCXO/MK1Pj0+1yy672U24Nrp2HZbEJTR1076CoxdswFlIdRZ++YZqT8PuqJE0AmesarKj
o1NwkbQ7fAuDfhEv4Wg88yUrIjIIMjQ/CW102oaBdqGEIcSRc4YqgbnNGpjB503KPpobw4jpwp/e
aSEMflez+obDJjO9h52acKGbjh8SxrJ9Uh0qWQQ3vDwZgEkhaU/7zfbJmKa66IEmdZMUUn0/sGEI
Ws6dXPMi8A4tpKDsVZres7W/5tSb5Awy/NGyZYU9T24nrpidfFUmygtM+hDCtM5oHAxsLFT+h+k0
0tFrJipoha8UDyWPQPVlzngnN2nAJW3Z3KDQr20xvoQOnx+gLdi7xKII9iWHoebkDNGB51j2sqmz
IsFI2k+JSR1++CSMUtV5DE02TFs0wGY9ShjFWQZBxU6SOtumd1XOGng8lVkdZSHAnJVWGk93Ql3G
tHwn/HLCySyx9Zfnj6C3BN8lp8HwZkFqyQwkszfV6iIdxa/jmnLSXBkVcmXv/hN9FigPct6eo1rm
2EP0rg9yFd5p7bQugahJPgNlcHNBN2nq7FjAaDUmNDfvsnyiTGmYOq3ptiEAsjdzcsiuSnnrTVJn
kMuiVLBtuZiRaPPc69YToLV00dveVZxHR36poS6K/0RuJL30T2VqPZhSH7QgzlsWI+wa5FlDc7dw
V4MeC553w/seeBFrM7k42CltzAt5vgWVDnUjynjCI8t45ut9CveShhgOPxWhDDJpdK0PUZAnKFPb
5kgj58LcooeS+XPg2reI+TNPRqLXQspNwyaiB0L8A4CELtgK0L71l6bSNAxsUgwvoFrcOUt+Z5gB
rfrp2YsUeCC5cdi8uooJ7J6Zhby/ONJIeq9JAM6RbbH483BYKdN9SWiwCBggdRevZLfMhp3XC8LA
qXCNdm/YoxfwbKTrYTH8V2PGiK6jxyhogxMU1lMw3rNvpWRiAMl8VtXC4lIbGD2gATqjT4Vuf3lv
TwuSZPGIOCCfb3kwY8xyFpYoBv3ttlqdCaEm8Qh48r3dTsG+Ub7F+oww6XkzSi5q3vOP/QAdte0S
Rsbd9REmupGclUNkVkF/vt+3npMfw5v+XSpq0vp0K9ditUNqhCSe/U1gg56O09Kn7f9zZGwfGOja
hq9nEk09Ka//6cLY64oVfUwi2Hnvdq3sA1xrU1C5nsCRwnK3/dgvMxCtQ9Z7yyOwGKD7VOCmFFR5
WHUWSCMWMGjQaoY1J4zPca/Xl09y8WK0CwGyTIEj1vVWl2rAeNvjwDslUg0Fval7gnCe5n2MjUXn
VD/CFXkih2HC/QiZQngLVxFuIq/oU/Kwa95oyuL8X12HrfDmn6KAF7zZ+taAaQi/00bLDBm4/sG2
NZPFom1HkQ8g8AGqRGSB3NZkP1usrLfd5fszrMI5NRJkHYNF77B5xqZEEF6bxT2+hIvC7BJeq6af
EbbIia9RVjRYB9c0JrURrZ/mgYLqF5x19ORPFVtMVSIzReVukrCppX2MFgJrccWeKTCkIzO4MWDG
faTpQfR9ToaTUBHJ4LjyXM8czQys9IZj7R7jVVtaB2e2gGy+KGSKOzlKT6t+P+f8cZt6ZASCSLcT
iBoHzyiiHI0vzmxGx4MJ+DXEV7a68240LfLhg6GKpvZtwEU5Z/m0xkOm02sEpigQT4SF6ViYfDmo
8lzWGUweQOUFJHVogN4D9LJf4KJclTV4gLAZL3HrUGEmLPZKrU+YUX1ohNOioNd+8QW+7HxoT2q1
bpMWg9vmoajnVQHivSqWxCdIANIUz1TVApXNgIpVvhITJOMAlzXeChQAqfRW2qgspEYpQc3Sr58U
GdLOitotny47bLaK4Ywtp5wICuIXc8zKKofsAUE6v8a3RjJlL/MvDk07V0+F8qA2/YNMLEtgG4pO
ODbiF6P5Dd0ftmIPrJEq5YwN6i/Y0VJKBmbRFHz9277VSxCrTXbdCp2I4HbXwGvVguFvA/waaFPb
NPqPo4LNU4Do0doCFxkoMkaGkVGTqaZXd038zXrrbhi/QTxXSHxW4yEAX1tjKjg7kI4Og8vTIqel
4Cncygz2eL93aq2AVruTjuVCMDNftLlnpxJ+2WEre7wK2dw90/8ZnPHxq7FQIcGoUOdK3VAXQYj7
vEQT6nSTk2kEdpP7QX4T8IRd+mNg8AS2dIcf+9ZzjcJy4oHohwP+0Fi4HsSGc6zBPdDUuc55IUJ2
Q63zABhXb2xa2aL4x+zVL4szA/yQg2gFTWoiRjlE6laxpjqIS5ttfXN1s4TRcChYeJgrjO2OanEv
jQBu7DSvUz3e7D1S1BH57DYEf4wPSqr36m5FJdtlaGX8D3ZbkpmCm7mDfm1QpD3dm/7gp+NJS+sA
NGxpGTT1ZwB0OEUDPu8LT0846G5XIgI+rxzfxs/k9bf0Jc5HFml4pFErduw41vCSWb+YlNiE6mIn
PgPjb07H9D9alIkbJzOwbhGVjOuvUN9DJ0txLBUT9WarK2SvvROk/nOnjCT/zm7oo7GM38fdGu7M
4K8efuDDMjNxdz2+obtO6/dYUaolPoLM+5uJuneQjUPL0kCsrjYN9aR4LpajMnA2A4IO/UDCwyUG
biER2iX2y+Dhpfd3Woi3lY1bdjcbNDDs2ldOaviNK0tn3f2/CVyP3J5DZEnmM/M40mnQ5+/XXTIm
3d336k2DwBZ1yNJdqxF73/rVie8hwSWNdl8axzDEULd/ORY6R+0WXEQzLaLNrsQawzBl6f4qwQMh
1hvEejBYiI2RhTbHcqsingdpgy6rSiFsDCQ6lGnPWqSis5bxumKfzL//7cLy3sThJLtd2KaYULLy
RQn9NUFhby87Sgmjvb1EMIans+dCNUCjXpj9JZT/+KpPkMgiE5vhWuQMaWf2KyNrVEKVjzmuw9cR
hSWosOuGVH0UGLerPWnTQaKZ1qMDwoyiD+wpORSfcgtQbqsy70TjKrFDUS14L805fpccW8X45cpY
D83aMZPrasV5R53gozLZMNuw9zYUeV0wBEmAyjaYXiklx/SGvpyA/RDmPk7ECY7DanRLFGFQDn2N
Udas1H3YbszCWIcbJWNYdXrlz9SY1rRpfy1GCtnFV9XpUJ2uTHdK4tcgB22bm4eg3bMGIWHid5bQ
phE8B2CVryjL31BiTze6bKUwYG9UyvQYd2xyVhu/1qYYtVEUPDaZvgzWyhCieXX86w9iNIX7F58u
s/X4aCMPfoM8nkQuTDO0wSd2I2LSemJspjcksJkuBgfyGCQ9+N14yguLCVuEUss2xSqHUUIo3zVc
t1ymeTo6OR7w8tz+9ainuEPPtxPPbINH0YdOJfwEypSj9quRpT0CyHaOo8RY/K5+gxzUYukB+rgd
QsAtadiesm52E/FRIeA5c9ien1SILUlwGK7osc2LCLfnduoY44RSXMrKUVEeFR+R5dgdp2vm8iAG
eCdgcTeIWwczi08Nk29Uji2EE0BI+yn7nUjuUPcTqwhCjoahvth2GPxRZAetB2sgEVmmCZSRemqr
3BRs62tsvs0RP1RbIlBjtgczh1e6Uo1ZzW0xCaixLZQwArTr9/fzh4vRGOqluiXdL2n4MUwIh0K3
mwqEmIoCUrUFrMkxbENLfo18Y4ve/aSLWMMQ9ZjWstCAvPVxE4SR1QSOIvxZvVEnSGzLeGICOTgj
8J5P1WcapLZIAuHTIWvzLy/QAacNh6EkBJUpjEDUIuc8sPQ7IFHQtexs6kWcQXw/epMjdcs/jsrh
TuOlB58uLII9cJT4voBu3CjcGMujdroedpYWalIQRnaNMn6dIUKoS3tAvW8ehVR0fjNyOIYbTqlM
+m2M6wiyfQSCrbTkc7+KbNnchJrav245zZRrspW5HFKRIR9/PFEsn86ChqtrvInz+SjWM3xjEhMR
arKFzJMsWPBXF+pIfU5oe/lC+iIk+CjCPFvvYIX4Fjoxg8WC0oef9uk/MQp7Rqdx7UVxoMFTd8OI
5TNSnvWe1tl5jtLddSwc3FB6MP+pA9A/1el77wXHxlvdlhccQBV4VwITlOid5PR18jB8xkMG08j5
n/MBBlbvIP8BQ737GIRy5+uRnDGen2dCxDu+zUbGcOOtM1P5OV+MhX/7MLk07qNjajxu8eG5iUDu
G+isibyl4GSiCqW8OlB+xb9YPWthOJ6hBtjcMDZ6HZTKHmzT/rwqMEqW9c5cbvbG2uGtE4mzNNo3
SDX4VPvk4G1kYsAEC3viotawjI9HbeK3Xb4FU8fECUrrFOCxlCnZAJSOOZpWDfdeKoBkloEQXW5k
y1cO1mMY3brQ3Xx87xcNicEN4+vPqKP9qEhBPvdbhyp2DecyjN8KlMvuG3zwAboL98+aPjxc767F
XZC5caxow90NkCERZghhOvBP4PrwqCSbl8LbikxJOVdb//98lSE1CrMi3IePNk4YMCoDxIFZS2+w
c/eVq4sEsRCgGHepvBCxrcnS+asQfW2ABXqKihjmeOMOf1enVYe80EDj3OYZFCy1unoS7iQFVgwx
FA1+L9INfspseLqPrwhQ9ERKMM+0I3MrAnUtVnHFmaKwepR4Zb9XMF9WjWEK295Pi9xPnL7z1TTp
RKxjI9Rq6UZ5w8icwnZYOU+LKikHTef5AcO0etLZ+Y8N2NjtKM4ULqzlOM9OZEdCSm7vpSKtXdO9
UnterZkUpD0jkdAJrWxDXrU4wbej8tGZq2vIKB0Oft2iTze2aDVihvCyjQW/5P3g5haTssepxaXI
1fyIjJ9+m44nKMBqOF7rWaeX5LVsdzkJZi4jePyRz4FH1rvx3mKRBitY4fWpJpS4mRMx0B9E6mwt
ytKvjCdKd43a2c0+3cfGYX+R2r+I+jVDPd1g+niR2RUl/OdG5G9s4bDvEYF2C0dQMsDLBRvl5Low
rml8a0+WsJEwQ1hwbvZRBpruMoean86c5riEGiufYmwSySKJ3VsEUm/TjBO9k2dB/1Zzt42f8IKc
fa9gE579UtvkDUhDeSGWSVMcKgq7IxFQiwP6MDZAQpD0/udDDrZeyqt4XgaGlhllUJgiM6AwbghX
qTuYXmIekTPlkZJBoDAXlJROHynBW/F1V6d9H6N0hJsE/Rn/Bl4L41/7aMbpVfTa7K9DRyRJFMLy
zfiQ9HWLNUGmk1e+xM/NdkrxWuEUwqQF3oC495b0d4WkImbF/l1PnbIKHnEhbKiSMNmVqGveYNc7
VGRt/S5ZuHdq+aF2km82ZgtDFetdjb+QFotbLrbty6I1iLYi2WdQcduAePafoUttfWoVUloUXm1f
LiRw6+sN8uvEqjJVxskgIF/yvZhOFnFdr2JmExUnGShylPvAmyqqf4wtxyxPsH1JfR1bUwYorFrr
ATZjXNemEwqVEU6bx7EqW/B59WZ142ooDdXWmut16j71iRQsQy86SpRxb+JQ3FCHNdES80mQ4A6L
XutH6OiSi2Jblrzytu5EiwsZQo+gcLz60vsjsMreKok1d+Qbz3ivua1HoMK/WAoh8aNofSfPc+U8
Wci2Tebc8LLphLLQnM36KPGXTEdfBdynJ3zIoUK0crdAMmemiYvKDUYkTYVlx1z3wGwwPHOoo+C4
5EbPrSKraQkqxo9c7qiC66LKW8WowtIOZrXB7s+LIjRuOaKfpLbarT+LsbDdPSQZ+D0ZH5r1SN66
xmJKOwE4tZ2x216A/KO7iNJYYqSgSRwWDwVXKAhUkWWoZx9WewE3uJtoj9d8Hpivd4INR5LF+wy3
Ojz4zRP/Q72Qj9b1/Yqi753E9GQlGzIf6YVEiTUbSdrERB0H8rhBnRx9w7jkSsNJVZzJuikp8u8B
lNg9RAmTBPeUHJZkHOLxKS813wWNRdkFiDSzGeKEKC8sIL1loisKQEm2JDBtXIa3uddfOmFzoF1I
kT2adD5e1pjrDJ8XuPpp2RQRc8Q3XARnOStvY1T9VnIqVYEyn3fNHiLwt6wdIgbv8kBgKF0/ez7u
YjshXqVYEwouOIHLH0iGeqWLpWfpLxN3QwU/Hv4GRDHFvkqmB1EI4jboDH7zcI2+Wbe9n/WdQjSR
XcTWBLdvsILWFve8+kKqaY9+zQiG2bWKZJom/lDUlZqjAM2lVEV7pwv0CrB7upYoxB3sgLnBqFk6
JpMbuGuu3uF/IpLZdGEIwMI/fWIaoZWyzoIxW0cxG1DnRsxqWFi5dH5GzKnyPadUMmP+OqUZg6E0
R+LZa9b2azjVCBq6VhR96xfjzv5K0yKFTuFwsRiaChosHW2lSITLM2lwY2AfkDrJJsCE4qO953Yy
DzkLNpwH0+ZjKkwB3jdjm52l5riwjfowwnN3yDoZM1ToaaTV/pWSP5tiWwEf0QbuBfZrK9kBu8zK
QSHx2L4doBARVuZfC0UOJwo+dyRYBPelpQojOMX7UxeCdAJn5iedjl+b1V7CZmtVfqSuRFOeQ8+X
/Pt1Id6+eRLchXoX2GBHeo8jSL7UuX1sCfs4Jozg76Q71SWDGUnjyXWgMBmLhTjYho+mO1CUhneG
w4dDTWfB2ebAIS0by9U2SUWyVbv4npIy/6IdbBa4uoGLuk2p7Rqp0VqrM88zSpBTHTu6ApA6VZd/
L5a8t+mXcT2f7hmYtXIMm+mbTxyHQxzCOET2VQsDlxwW0xy4fu65FToDz99MzIbHA4iUQ06V+MMY
QYan2r7EOp3H6G9zLJy269IKR4jjFHnfXH5mbXjX31GRxUgUgocG9tFrn/dTzE2nDctVbJ1In0Ul
ICxG+eVRdXF0ld6IyGDeGg0mbtiFDl0VR1obClXYrHBIoAoPAxxYdjpP3UiL9HyscdSYOTBfCj50
fNB1yImjfVVYYfwcsjBXZE0lAOwtbpFWFweXM8YKmgnqZ0z2tAKDyEHW0ovfrlHxur5N0Lg4nzmJ
RH/E+gxxDic/av57tY9fptr9+56yQgXxeh9Zf6+6x6rC/XAp97t4iINZSU06VT9KmRDzH2Oh5ehC
Yy7LwNI/6aPuXReu3PhsefCvEU9Jq4wQMWtpqeF/u61pHYh6N4zVvClXKRENSmnr0uU/0k2b5sFJ
Cot9C9IbgiLU3tD2B+PzJz6+A1bJV/5q8BYTHso3EV5sJ87DThF/0cFzEbvLQUji8FY/zOBGw/iC
PgQ31/KmV/L+FoH4fuXh+ciO7YG8NZUOOCuzLuiEBui1gtdQqKqtwyeAsnhPmBYv3M2LThcy2en4
yIdRWCNfRrbWI+NtpkWqKU13QNQvFbDuO1K8jCGriK66jFCmV3EyUZisnKH8cUA+ddWxJf68u2he
75kETKxb0a7L30WhNZRkp17BEmqJSxfHFd6cw9piirFeEmJEo0Xmx8web731NmwF0tXErO4g08ar
GTM32dsX92jmTECrCiP1zzQQ5Vxg2QelSvo2/IYYSSBxmhI1NLnsltVhcFEK6BKbq9Llbkq8pz94
hpGGUukCrTXLy4IdDsXOawo/e/eSjfE04qJHRujIZPcXMHtkYJf5z2KHcC5eSMVGQJRrDJPU8Pu0
GrvKu8b4r02xcY0jy+LlwNSeddxpqvwgb+sjbp1Q+OOMeiAjx5yXrGxj23CYxrObeaJa0dwAkfY/
Zn1xbdrYeh+aJBHMib010/bkmIAuhHSJQ88LRBE6FCkUb54nLfkydGmNDPA5Acg91zT8pjmiYVgV
HZpYlew2W1wgw57KC2VSK2mlLB9MRKVHmU/1Ny/bOFpTZvlQc1umYDIITJz2Udp2wNkn8ZPb6fFF
dTfdkw5NVxoy8d+zp9KQh/X4b6w8Q87E6iHZo3cAVPzvl6X+QORvuojkctQDgRTPEemcDl9ryNcz
HifCipoZOOBGKUAooKb3nTrl4HzQIIu1VlFkkU1rHIOzx6LR3o5F+u/S8uPQh83ky7CBpltkJk04
IkS3XoHwvTdiZnMbD0n24K7Nsyuvgmgk5A19aXiZ+bzkdptpbx4Ms1jqFkTnhS/vklDk+b4jq4PI
LvaVRgRNeWc5ukQiWMS+2k4CJcofER1jJb2VUr7L1ovFlbDlg4+jgMND0PH/n+Dou9BwTPGFhWrM
fayY9MYiD87FTzxAncXJ9YzRdd4BKLgX1hZiYutrOwK28yRAaV+tEExSMPuM7DJ7N6nnhA27gVA4
05kt2oocg7CMI4plLp6G2XqE1QJ/5Re2BSrYeld9wqSxt/oRYGXdD/Rn+mjaUqisBpgEFthYIHis
eqMY7junUAxAOjpSP+Ei0jPDzdp+fZ3iDPioYQN3k/4BaESgv7WPN+yM+7ciDW+Z4OGTD3VkiWJG
YO+cFtf0SOlqGzz7MTkFk2+1SMZqWpHoXY0dMWRy3B8Txq1GMnwjIt15FrNYOFNrbv1e4/8X+Eq7
MAFKkIw/uIJedYFEQo6m638dJAbIizG2BxYT0490vAXqafucYTAModTukLH63fMzWs51rhSQ7IZW
75QXSpt/EsE8LZN6JFW5xTpUHXmdOI6tr6emfKbL45cLSKEq8sxSOYxCdXcmEEFZqWq8XuchL8GE
UstcKG9Ry5Wn0zGW4fqJr4/OLiq0bM39d4c4vR2869+oEP8Q18VObqjy0YNvmbt5YaJOfSLzMYfj
PFfsPGY3q+CCddmCSODof4CRrwsgkPm8cOUnR13zCfzDFclCItyjR20++CXEj3SS/a1vPp051v/l
0MuuI6PgQDDP1D9bng6AB5PUKYmF3yMguM2tfg1KLmxd1yHrB2XyAcUidkWeXmcc0N0oLOUaVrQT
GqjRRgYEwfIFL1m+bN81r16XyH1118txKoRl1/kI9LizJqIyLu6pbjA0CcX5PtquAdqCksxGijBj
emxFQFuqWAMM6mN1eeyxe3TEFnKNpAzrOpLZCOhN3sOUhJMIGT/dWxLq4HL21iK/4k8uTFw45qqq
8kdZNfAcbx+ESa9qKYMJuRUvPpUhCPSgfRi38UmLh7Q5GcyIi+MdNccruCUWgOuDuVRKnjizw+ss
pNiED2q46fnt5vb7GB4XxzLI3m4kQVGxBVndQ1+WQp4D2N5kHuooLwzQQIGqI5r7FuxjHshlMe1S
sX3bSxGy8s81oFKfEUVf8Dp0g9vHQ3Jk1kR9U3rLyOhUVlCmqqAe60FelrAJ5WLHwAhLxWctItWB
bP84lEThpeRPa21iKqoFtETMEVwqbCO3o/vrFACG96STnJeRV1u611ZScl8WvRytS5m6jtGzcWU6
JoWug7UzNuTkw8DcxowJTZEQDwKmjVH9MBr9pPvqoD3Cguy+TyUK4PWGWU6Jg5T91enY0DR6G7ve
2X+86jo8o1h8Al3N3NyEI1sS5A6shi8+d0xzZeZ7SVkJPuWDh85vanxWlGR3g5Vsiw0CJHok4Ni/
EpcdZC8A5uoPmFPokHSTCRKPcLEO5hf1p44xEERO8vMxGRmb+I7LwU9mWRJNmdJub0GfPTvxYrlV
4BPR8jAFD8skw+/nUVJsX/Zu/crC5IcorEO8ITF7jP1nWCOm2WUo2OC4S7h/q2iujjwMstI9KhRE
akYdgkiQagpqiP+b7MxJYmZ25NZNz4fokl2oJZDlH+9dYnwcjRCSJVSf6M36Zw3jBM5NGUeuR/FY
1W84vTacNe5WLn8Zs61K8QRAZmdC1GK4UyTAGIvqxLXlHXO0TvKZbKyLamUnaw0YpQzSWbbSzeZK
th/w8vuPTgmZtsmvDRrSh7FXJhGgAoJx6oSmXFQVgHYRYUjp8OxjpQvSFCKSgomMb52F5XPOXRzd
Zx0r8KyFfMoHCuroMphgC3ivqaOecxtE8yBBYO4RpJHq5TuWW3eNvoUuMwTrAso8+7HcwARl6pi2
M8P1/kJL215PHIwCF9geqACjOB4zKYk1/rH/hRCQnQpbarlZxLLCw0RktjIc7SIkpZSF3Lx91fBI
SAKHWDCxYhjEOzMkjgM7cyjQi9NYQZF+HaoL8EaTI3Mpu9vrXJ+xuLbptviGHB23+ydSGrGJeo27
KE5FBRFTl08P6jaQQ9vV8X+70yOhDPsyTQyNiTuKRcVvW8lWGiaMLneOkElh4jWhEkCQHSLWE67M
7WDnY9hs/QXvg/1i6gixaDZYXEn/jIm3k/hhuL7L57ZZOLGE6E75KxM77KXA7aW29+sIWbuErdoD
9TwRUuEI6RjRiqozVyWbxNk23dnO5cFGJK6xjfZk9sx2ib3zT9+KVVhrk5QUjRUERpjasYIW7bcL
meCn01wgfSTnLpS6xWriXzoTLS3Pa8bkD7DGwx4hou5mu34cG+YtAIhJPCDGXakLLJreUdiXtDQn
Ew9GpsDoA1dYeD5WK4ced/IM9KcZwaQBSxsmjJm+2p38J9ihNHFTo33x+P63I0iImuJvRNfpoZam
5RsRH67oWANxIxX3KDZ6NhuwhSehW6VKEV0jD4tG33fzrjYNr6FdXeW0TWizD0sqjhu4g4b1LYZC
PV1Lkd3qf1FoTCKuw+ML+6ghVsgjuwPhGMy2cip6ithfKNsSo2bCwGwuBzd9cD6UGy9XeqWcI6Ao
eh3ud8czon1Qe7wYbcyt9SNPgSvrGWU5EP1+vwDCKOep56kAHQCyqJRWMDeCPOsMMBmWxs3ubMtz
x52aBw4ZGjz5lbeAwk9j1pdzwIgPLr20OPpPUvUCQNxxaoCLc4I9pVpyfsZpv65y5JO/XzaT2nhO
qHEWvfBpLpAhcZaz7MHiDgPDqSpWUZesx8hvPK7sZnDDq8XTLVVPpxIXA/1dTsE8YSEhH0558M4O
ubXMK8zf2bJRaQUs4JBk6awHU43X7Pppes//tezIePyFzz0ogcIcqfqW0olI7yrhXJCqJoGVPWuW
IQj+s+qndhwHaEqqnlcJMZavdqedf5HUP7UQbivOcwVuZyKRCCEMOGxnH0SJU53WczcMIa+Gzgkh
RQA1eYM18ts0hHM9dvxl8QeWP33CG7aZ2W13Hpxn2b95lL60KoyX0/ItXZeN/Act1vo3IaHvDcdR
Kl1rL1ZyHJnUB7IT3hZHy2NFDaj7zJ6+SaAze/BiR0XX0BGQnEfwfic2YmEE5sMm97RINT1iodm0
a/AeyqJdY3/9zsflMviJjkGyz0P4ig9o+wI+vQcQbGzRmqVNuaPU5pqMbIsb0dC/KoPQZNJURlqO
ExWSkgoiqVX8q5QldeY7AE/EK9cT0q96Xz7hG7gVTc4CQCU970WQmod5Kgn/4mp41mwPy7Yq2qFy
zgxIRVfUNiUHQ3gYT8Ig3K5MKrw2sPxDhmFCBQOr3tw2mi1w7BQNkl8AjxmKT8qOtaX8EEj22X+F
/3uFVrLCkWkEBUJirizqdhTteGsYvXl9ji7O0nb+4qOwRd9k/WKOh1MkyFeooov2OuE/tdNSqquy
99PAmJUiwhRulbWRgjjEsgMqGReRPOT5x7BD3Olxfjt4C4WVb2hMXaGiM6l+svLf5CEvKQ0KYElO
M2hoA85tnVz2ea8WVSJTTFS5K9MNzAHzSgpHjlC3wFbrNG1foQjkCwZcjTyH+/pqd5WCdw7VDJXQ
7+dsiRvxeD3cHpvawOrAss4/dyg76cgSsMzMBBE9d6kPthenSGc63wLlMBnEAEy0BatxM5m+wuZK
ddEu89hyg7qCJ9Pp5I5Adycxem5HsSqYLYLvKL9cAd0G+I60hdnbytND7Mq9OnomCCLfUgOY28s3
dCxLqm311SYFGx1JjaRZcVr0ZbPtSX4QiNbTtsG9khIXlL2oK/L6fSJQ2EQ/gUg9MQcFqgME1I16
BL8j+qVzzQu3P1GJRCo1KGFZg4MWxS6KprH6b63ZBRIGyur0jy6WG2nGOsfClB7y38KXspDEyxQp
6RccoAYI130Vwppzqdsm61rTu11vSImRp6L3XMRmfNIvi0vlX9WHgro6FsmfmBjx7K+f7UMHatQw
VYldabeNliBO+M0tiLColrn7aMyxnujSevvAMQEI91oyrerzfY5Ge8lca3HFGUVWwDTUZmSd2V9J
RxeG6FAE87f+hbGbNBQoZHiYV3tTH8UI+4Q8iIAcMaz4HZKw37rWXfkDQsYaS/hmt7TVj6Yzyz+l
Qur/4qa02OZ8Z7jr/kCP9bI+9iJqvrXIOW8l7nV49rQz+y5tfQ+wf07+qzJvH7SR98HPSmc/d0Co
Kk+lLLIVR6fLwwKUZZkR2ShxN+IGRF8VV40WGNRycKhZAvFP469sAEOBwSKFhf+xJ0GXg88frkK6
hr1CXaLG2e1Mxx97PRqbFYHIJeITjC8czQouZrRSImd30GeDl0pM+uwOwBmfCsz/DgCwsKyBfxiF
6+RNBZvQ07aATuraORdAUBwAq01Vyuv1uXfpCVkp8aSjeiP889cPCWcXT2oXbOwKtIxsuzw/u0W4
CH8PUbRxONcaGm/7AizEQ5joDE89HzR1rwP15DwWMUKXW/iuz5ZyXnQ61wYh1y/elJeOkZdt8Wck
dPHEOZIqKFZuN9ihW3EUNPzN53Tln5lulSDpBckQ+ApwTmsRbuqbudMGu941er0/Wit4hbiGgQ/X
EPiegWsK8v0suheUJz2QRzOYhgIiiNVemw/ICO0envQ4nvIVoCoBvxMvI3e5yt6Kh/+8OJuE6cHl
EpZNc1Qujx2mJVSGra89pVyxERP7ZmICnQujE2t6F8MQpkD1S3XzLXs8OHfanOCAJprXlOgRrFj7
/hI9jcsb9dPNsrbsHiaF7cpTezZXNvWy6+ZC7R16ry5CNv3vPkh2iB+Gy/AKNXE6Cthp0kp8v7pE
jvKKV58A4Z7t7rMmvVlMXrwRBArHADZ2iTIL+QwQY+EAAUAkYD/qqtDBfiYggE7Pin6iAcEBOWfw
8oyMlkrKjRlOg1RQlV/C5xBjjqV+n49OGzf9csZnZYaxm7q0YR3mZZCU+BP7uJ6Guqh+0iULYYOh
626G7ih6Y0nZ9/L5xZMUie6Gt5VH5rb4v6Qyz97FVBmDUZ5rjQpYUn3CcFTXp4YHKRVSg20Jw3hq
nLSx8WyKsBxQfbuckj7+rjLf712PbipWXi7maPumUht8KgC9QprF0ZxBkfLCzi+/CoiNFhCXdr9d
zFDW4GgxFB4zhLT0Lwqo5dPrwHugksQJ3U/gakRFvmW008feHPMVt85ZOPuQwQ+m6EgGz3Idptq5
hYluRkPiwrstspu2gE8BFl3SJMKwB5XExDwgo8xEo8ovZSZHtLqZAPnbSDPjdpgn8Tdu+wp5/fRo
YkOL1xaJRBM4jlxVby+an0gvkDQRfP/txuEjxsD5pM/ZHgk9+cd993c00/q2IkDAxgYhA8/qo/fe
wILsjSa9J21gTuCKGtEmvmOzOmjVFi8NYIrvgz2eHhSlPXRd2Oaq0FHyShBLKMxdYZ0vvbPn6CD9
jTFzDjV8lj0KxxjgLa+dVmVd1P0gcPEM312e2lSep4V0Z/tQ6qjCZMDbXX/lwl+K6ZUY6EQDV9K4
fdasz8+GkYNRvPh+8j9XG1kgYCIS8MoN7KwJtb5ojP6jWz/nCK85dNTeRWYcl4CuR/o3Dsyave9i
ki0VTNIVlNrKZS03RdGmsF0NrBzcRWPrsiGw1/SofSP4kbgBHBBxTfzm2ZHLy+IUSbozVTiRizrp
ihQBl64D6AC4yXIFuafA0sgAjraUodcSm+siMfkzngYO5RlBjfp7pxmUnPO/BwXbxG8plexJWsox
pwKuTkHpUazoEvUhGHnFgdJ1F1wlyDyXQG5Z/s9QXo6WvrqsDTWCDZ03QkJFJL6WiDmCHTjJAp7T
hWR1YYwuIQ2swOK2qfXE4a+lDE+yGlNXnfBcgRJ0BbTMQP9kIhQWQUfidDNg9bisO8phIC31Ab5O
SdPZnJx2uT/Wnh7GMB/9iHCqd1S8OThc5lax0fxcEypyRnr6yb3feNTJ6Kb67yaCRrqWBpMYJy9t
tvctZACqOCUuWrDfpySpnSIhlfrYju3GNlc+BDoky5VjfH+kUuvHZSngpQolwmvjyDHVeJNR2qCm
oX5Hq+eupvzUrJ2JMZFhVAxoPBtUrUwEoGSx8Dn/aFP2s3dc1kooH7tMSh3W7vgndvVNPipxLvlz
8elNyyqX/JlzbvWC0SDlQfMIck7nzWG3SKPidlNOSKrgumFwP3EcV4SbN4mUiZ0JzqaNgIVD417L
++N7jW1b1ZNbPojEaUDBGmEmZjxmPtkb1GtVdfErkMQ70rAkFSdb1w2SYNsKAd/u1rFz35gijyav
jgPDbRkYYT7gruNnFMq+z7Vc4BZC4duLDgp1Z+F066reUbW/pYqRZnbjfZ8Y/LMg4is4s0knM7Ud
Bs09KYwR79SmNYdE947KbmYksVP5ylQuq0QWOoaYOVPq0BpYl7pHj4OAwEdo6QxLK0gfJb+9tEQS
eZyQUxIQxahRWrB2Peaorn2q2G5wXmEmRCmnGdZbv2dWcLpG3aHRJJK7+IV2KlFUX2DCLD6biSd0
ydRS4w0g5HHrDva/QH4guv2QEMTJOji8uiDaXBKYp5nQuTJ0px/uzCgn0+EfC/hEbitil6BPLpWj
ICKNWMfaUHYug8eMhPTVL0nwzl6HyqAxQEeSpFpC2cM5rFiNgX1wWsbIFeHbH03XY2S5WfpMTaDk
/I9lKp5+ymyY2+OFnHzYI82LAYv0qeJ9YM8wtzfEjhraow47JoDmYPVKQgZ7UTz06tMN/vP0EVVI
p7FL5zX7iZ0krUCqwh54geV/98iQVJN3iT8g1PwZSNfP8yW/AKd9vkA5wZXAWP8jU/6itAZLAE/P
RHjIZygm3Ics7gRyJmov1Jv63BVf6fOFlhVOcCPjI0WjzcxM+JR1ENpigIF0DwLPWkrWc1msiJuS
nfTvJ7fJPT5RCuk79JnPWk/9RcD2GPYeq6VXQraDwkDMHJkhYQlViLB5UcytIn4VAKdeMaMAKVRn
tHEtYJ+NNipo4fPvB8G4HF9hqTh85AvweDweiE+lNZzDvfd5qukHVmRtA6C2SurkZvp4IGh7rN4p
eLdpCicQ/5I7qxDo5jloIco97ioXidcv4Z7UNaNR9+DlRRdCOlwHeQENtVkwcDGUp0Hq7kpI4hW/
9N9LiWHNOJeaXjiGp7Qibl69sA2eBR6+y6FBuRHcZKaP++Sa/XZW8R9zt3cHZa2dazovdKFLuI09
IMdlJBGtPRcqV4p+CmYnsGhxgT9ASX2BqXtbqxtDmYFIScBVyAPMKdCO+QUwYUxpTmVB7BERPpp/
1pwnm05CNqdvkQKqE8Tp4L0lOv+QDv/XohrRzb9i7KWXiINyNVAwBFlusmVDCtfoOgk8y2Ev/5QB
tkm4ogD5QjsgAkhrEiSsFrLGYQUbXG/BCLSFTDCLdZtaSdvY+twqDOmVmhOouXDVW7ziQP4XV0Er
ZtadTAu9xtbKz1FbnSbPg4uy2PozHu+/9di/uuykIFdVnq2mZ59H2+QUAItJ60RrTbnfjkTZ1Bvk
wA8to0mHVYP3t/rHfFXO3TS3zsMmx5QvyO17wYklfsR2iy4yQSEJe/G9LEIpm5SgiZfs4X9OPIwM
MvvoN6yQP9cs1N+SuvuWBQ3MSkcg8nbLLFp4wMLRfnuHoRveuNp4jUyLF5Ooa2XBm5hido3jdcA2
ZLKfBTx9GTjS/j8TQtvk/Z9x27XFkXCoVWxs2YoN8ASfGOdyL37AaSrERnt6DbpMkPnwwhqHA1vM
imwVnftzPY1/EShkBAD5LljrE2PSdGaKVTRyL6evWeFlsh+vU700VANj8PiyCZFuFCfvV4u/IWZ1
FDXcYkbQWIEa7vcpcAazDZDUchZ/sxxSRI2f0AmugUeXQ1m9hpoBZit6cVzGmG2OrbTc49D09S5V
EEdY2t/0QpyjmvbMr1j2bYd+FB8Ini8G9DxRBNbeTJA+MqdhQSIIwoOlx9KN19wC3WXRlIV60DzS
QJK1NFqIYsql/lB52Z/lK99AV8gYvKQNi7tx/8JoVe66gh5VDYQyC7U+qpYl0taCEh/kKj0wUNjB
WtV/6rcMpskWbUiHUIdHmlDDPmLTE5xo5c1/yf/JwbSCJbhdPRcTV/vt3IqwjkEI3AqFuCv5x/tj
A15hNIk0LvYgQLW67DiQVVZfITb4kETsMvZCYaxhSVX4WOXImUsPVTfxp0YMsFb/6C2PcSM6GrsU
fRnceG/XBz3efC6qPacUX3O96QyR2+Nr4+IR7IHM5JSd5Y9HYgBNL4ByVFu6QiJhpaiHaOnJooE4
AMt61Rg6sy1ibRyEY+HQ3m8SPoZ16ZfQAjQnAs4WmQJKZPt+g9FDBQ7G8UQ3gFanI1sn///OyDsC
MdoIE+IIWJXMzNaV4aMVkqnewAcng1x3GlkW2tIT5QNnW6/swoHHkoI88BT/RP7Vi94D4emz5iA4
vPMNvLXCqowX2HgJNeo90ki1FJlmkwXoeHMDwS/1z3BaaU7mlCo4AjrHqP0vyS7a/UtqtUpAb1sS
B0L5qAcrdri36S9LpXaRGZfYfM4/ZYDbs1OdPXHKWl6NQZtno90/+DMAsDN+53qMCkc0gBrRpEdJ
p0e/V783KHRZLrstpdzvFESqACZYHga2eausgYw2JkdAP+EUVLVMHbL5MnSkiIKqyRhO3VQ6stDQ
mJtdAIiOBVDasFJrhQhbgyqxxQ7R172ja14d5PIWyEfqnxUO/JSNYhCAFwnFMZzKfQ48DrNNlhC+
A6xKDZ7iI1w/OnnZbhNto1ZVyp5WmhFZsheMnlpvXmpfSL2Bru4Wy738CHZ85n7TxcHOlFO3CT2L
OBJuW2F7WkSTBFZ5hyhzC4saevksSfsCsVjkgSWvuBjaSZwOeN0Z77NYcI17uqJX3ZFMKFg5BUtV
eqLcjehyZSre0+21Oawap6X9mG2nSU0BHo5upFZKRpvYbAmhCTwb2Vqj01kJi7BucH4FS5rJXrra
NLPUWotg/Re9SlcsQwSwAj37uGclYOHr4/3D3l+DbciDpgqPqQV+cKUnF+wcFDA9nDZjU1CoF52b
nhIkz0TdTALh8C6cNVXTDdzZ2zdi8gCp55dvaMbGCcj3xDUbCrynwKVJt3sPRqRVILzzBecAZkKw
d/kdQcAkb8HQNXlSAkyr7ytfmr647YM1ctCxQvB5GBF9hFiaM1Hy7uVshOA7k8AkK2dpvABBYXKe
9X7VkjTb61NuMU8innxJGBM1aK2X/V8eW00/qyCYqFcydWiJGOAk51H1VtOyCR8qdSouga2B0X2I
DIWnqT+L6dBdmwNsDAG974TqqGxs76jBsqFGv2Mzi5XtXJnSSEqLKH/Lzd43r5SJ78tHAZMSUiOd
EfW0ORfRxdYs0PPtw4FZGqulZK1jEVza1iZDBUc+hhLO3jndB1Rz/3X4p1NBcmeBEokvmt8I4Au9
Yv8yvotVSov6pcYd2Cko/uKe+fgDzoLSFROP2954T7OaVzr8FxhLVwLIUrJSgu5cCzvYU0LMn8zT
KuqtnWE3xzRPjq4FGCBSdfuuiYJn36fordIgum8rnxf6yLaZd6k4cMaZGCj3glasTRyiHRr7e+mR
HF/AHDzkvJNNccXXPpN1PXaLsVaRfE7LM7ee8vcZVOmoaC33TJk4YCHAh74mf8rZ3DMuf3SlsnVp
A7lFGUYiqsSFdCZPsTx+Ii4Zqy4XzK78Z2vCx+64TghFmfyBY86DoYp6zHDbkd5tBoGkADhZJuKJ
r/+I4ugL+NrSCpPdEuiyAheW0/RyfSLqw7orghP3dZFclVTrz+yfzESNoTZ68BrdVabRqJDPdx6w
Z1rUCU+azHWTn9q1MrhgFKZCWa1YyZFgSK+Ij3IYJL0ziqLzVriowXH7AB0YyKnaks5LNDbrjuay
zFcvA0aXub2odgNIJcupXh043tyFN7a+BgTBsP6l5zyE6g/czIdiPl+im4slaG5cFmxG+5fD9yIk
tYdfGb+FW5emcrZvJHpPJgGk52toM4v4hs9fUHZ/MphFoSiAtQtuY32j6gBAbtp2bkQ6vaum5LQ7
HwqkKP9pV5j/gNwIgspCiUDVCkD586biEfTz2qJDUf7JmZIwofv2b7IDXmEjMGuzoQE3NPDemKjV
LL5fwgP6jJrqSeSoP1yOXM8hyWzkQpVtp6R83nWqJcnfcv7ZKNqO57VuG2gsVAlwKAeU5dzaIAOT
RT4FnqXTxJ2fzpq1lSVcrnez6kMBNH9esEzcVLnvjVUiqAKHqpG1VcbfSHG7Uh7/Vzt2tX7eSLq8
AVDRxCu+4hYpEJEPoN+whuCnoABzZArz8NyUVtKBZPxN4E7SLIzTX5kBDQCaucdAtsWRAma2TmvI
mj4b4vpAosmWjRWlq5uF0sfwh4oe7q5mrU89Schh8r+RKDwCWsGQJ/w7trjHctztwwWqrsXMACtL
N9WgaN3NmoSrAjwEFzppDBmuOUsyGAoCB9+rcx91cuilGMI5I5g0qfSTQt0uszZp0o711901T3hZ
d2+3IJMxIwQ3939IEnF1i8ol0trwlvdnCSYuMAOB/Ux92Eq6aE2u0hQHkz8iA9JdMa4/jpbcxF0F
+VmeU7Qhp56Gt2PunWAU09JIEOIi9NHjXu9We37sVwiRrt7mPKuCfcX4PR+PoLrGNqerblT+/RZy
otH6U4JOtp7mIg+lnP1cG7HTLWYZ6gEjRFWuh6GPrYHvPzfzK5RRFpP6SeUQj1agLGkPlZmYSdZX
B4sPsDIhofVUvfQqANgbBCjlfyXmHsob3TSQubVbLA4Q2Ioks8+q4KXYZcPsMFokRZnOzDFwPqSU
pqQjOOEnuG2mpehiMUdkkiNM7XJJgCL5zgt2mQos+OW3/ReHj4R3GhPzgcJhouKxfRx13ADAtY/A
awOIO0cZsN7RQCLv694HMs9GGwtWM2/c2KabP6WZWkN46M6IHYVWqBCSj+a0OW/9uAs5JyZq+ipw
kjbFTJzN/C0Dk514y9DvnJfY0I7iGWfJQavnsoFFncUQF2/TwxHIhPoJpY1iiy7EV+NnXWYPhXlo
i7cIuFtF20hDKQgzeRs4U46pd92JySMCQAis0aO2NbBnoj+h1KRzLXh37xhgmGWxSU1lvdG56nYt
oC16vNND+aWXHRZXlTYySw3LqCWkUFHhFNp8UlXit6B02inN7r2RtKNzeOrd4BwCbChtAin92+2Q
DAE275pWuxzKU18xbI/DsF30HFQ11WBZpTj7n8PCOOUFxYq3lf7xqPh5DacrG/F9d/AZLT09NytJ
tGVAPXBOx/Q6HUyHK92GlWqZX8/wrdIzfXfiPyRKVzndYJxKnqCmrYyTlWRpyWYQNibNBDU8owQK
VXFgKcA/LaUSSN+03dlVxoXxQX7cEJD4mOGLKRp+Gf3IeBSIFITfCDhB+k62aQmbE1VXDgiokS4+
Sczc2/n/OUANsvVU43UGU0jv8HUxDXxmXZHkv5Wz9Nd1DO5yBxMqPtwKZ/xjF6QuM3TfEHLlXGHr
qRPQkEH3lpxMhB+4lPnZwntYXvBq/+47FMlw03iYRFnshFDoMafPZqd9FQptSdZICVjISsbDXIQy
Axhor/YmcUVxIyL+coGSDQH+LRxmmP5p9mkr7uibqoHgycxlBwBz/ca7JOn3RYKdPqy07nuqXMw9
Gz3EyRxWeWOEwvZ4wclFXVZJ/XdzXbsCeobeZmIpeTkDhLkcrm2jlRDlI6grnwinfY4ryekCVr1n
akDbfz29YePCYrsC5A8KnjsMmrPrCiFnHsapXCO+fPX6vejRU7e5tMNbpxLiPWbxEAEGcn6gbm6S
H7mPfiKZ37Lk0u93slFs99ysmzbTle2U/rGXtT5D/ez6/MgaSnnpQsoNyi7njLKpnx0YP4Bp9BDz
6hEyC7HGZ3AYY2ZhA4SOTssKxcMsWe0XH90FZ39u+7nXba99DJn4YnauRUuQidDi5knYK2JLe1s6
/wkuPHNZevK6m+/vE5vyXFApZQnVLf7cSIDowcfty3WNid5qMJX0DdM9Txj7avShtDUKQtb95ImP
0ztJ0yCMnttR3cQPm3CxOzO87HrVQDiUZvahAPosDbIc32xCginY6Gj8/Df3DYhDDIDftJXWiyzc
MNotfMMsbnchACRL4EXOaMuoU5VY5x60srNXQWpcYriEq09t+KKBRaT+2Re8bFO4IHEgKNm317Dw
O/gAabBNTpHz/7W6RNQBrsx6u+GLAO5wWYU6F87i6ZfCFRkEnzQKFg4e08gO+GAJXyxWMaE1kU+I
0m8QpHQprxdxbxKxG1wKNiu2W2EVL1s3GPDo1zSEl+kEnT9ALwnfaLbaK3PKWMwrEupxkY87ybjL
yxvSYlpOjRI2DSYMM9Ls9Re63WxCBt6gv6+pOwt8RVQab46+QnZ2YD2LmJoYhszYkiglDxtoGWji
M1jp99D+4/vpaLJZnFDB2/e9droyfsutIgmAWNKok8bZE20rg1iTVrFxBCwyyYE3Z4iIHi5BYV+q
DNacq2coJzeF2X1x40nWycHoqeTg+Piar8Pm7UxnLLmIYyNx2XJrSRQHLHfVchOApUXk9+YYwESf
r+KOT9+p9ioG4Au7dEXNvueDMkXRttiyOYt+tC/z1lbJaBSc49KY0ojtJhC7hSFWw1h2/CE8pMeI
6cTV0706V1Ewq6nA5j34Fx4XD/lMOjbYRpeL6BBkAhCn4ucg4AQ/MkvOvL7NonlQK2OK7c25c+j1
Al5sOEG/8yCEJ9IwtVfq+8L5HaaTZW/DkMhwmYORqSe/S8/1H9v2FrKnMwVU9kcXUIYjZv+5Nk5g
zCp/X6G1raW5MdGL3r8K+7MNA5CG8dq0x44anA1fYj6XQT3kLrZmlNsC4Z/VgcQSrXspF1kgOAmB
iLlEcfKT53WZCN++Ck2wt5UklIJC8BDsRKbOcDO8BkcQ9v6AMGUXz0sm8Epxuc+YFAbTlJyTA8vF
jrfge49cnTmGwkIyEeTLbRG4XmElJvY5luy+ez3tQ62Yk9of7tqfnB30jENH49m/HYTCU03tGEFI
DkRLnRs1URu0bjkp2TFt8EldSCicMatLk3/EE76nKjFZAQK5yWC9V7w/iZPh1d1VnQXll6EksfzS
s39HwrbmY+6gonDUXU5LdcBrXT7kfkCKdl4Dw0VZsIKU5PXQSW07RUbJ19a0q2yoyxyqKm2y3nxn
8G/AFIBhhD5cPH/b+XsX7ZkdQyiQpsN5R1A0dwDsHkdExndd4Byuqi71pN3vk0u8MYT4ynTQGvmI
chTFBxX9q/q2byi1XNtsiIg4YYbhOmrpVCc29UD2V/JPRtk01PAZ6itunR6RUCzLw2kMSPM605X7
mLZqCMF+xI8zeFM89f0S78JROvwuZp/E5ZDZ8ofaJPeGuFipmHzKGcH3nLY+WLs3YZ0CvOUleJUO
mG8jJ6CCK/01MPft993yvd+/W/mMWPwlR2Tof8yHfa5PTO86gsk5doAoIxfkK4PXT8CLqyf7thjk
hSvtLi+s7zLjoD6qDzFYx2BzRj0dbkBfztYz8/fcqR+NEZiQ1wrpsSGE+ODX3gLb8H8w8wqsWf3+
bcI+NnCpj/SahE/x9zGzzdjq/JANHoGKKMs3XwOHSlhgWAQaMW2o3bYa71ZGLU6gE5MkxmxcwJhL
JBr8tFOCkRsMK+2hnymQRj+DPgxi9xzBYhBIq5zZmmw6KSvKFCh0EOYJ3njDo2WexmxFIuu/As7/
ECjk+M2LFDVEMkzjgK0UJQRHKS6gZ1SOnOBY1kxin1QEOYqk0eCcCcsoFfIIHhzcVpWCII/f+ktZ
qBh8Rwtk+tP6VkaT7v4Vy027qqPO0X0/2usMseVZqHhAn9YFhOdLir6iDPdJI0524ZaxorcjqHuf
9XNx3eB0bIvNPW6wEqnCThFLRGfV4rcUtfimwcyZL8t9ZDF1Bu6pjXuKDiDs/9hN4ROgJBFHgIK/
kRQDjPkIepI+AUS/ezQheqq5nYGGl0SrJAu3dfFUw22UVB2KTm1pGUsMCCm+/EsjF+ZMrPnIEm0j
y0cFFvHmS5zqBXiSXrw9U4RtE/NGKqO98xje0hS6q5lR/05QXIyLdfyhGxu/Qre7rCTXgGecRN+f
F1DQzOkLAtPV6u3EhQH3O66trQZ0h7cE+tadLGisXvJoY3ic9e2KTefWR9zmZ2KvH4QsnU6if3TP
7M1MTPmcxWuZzvMmPN06Rzjhmzhdb1kRD8GtRFCzGUFQAtQcKA3S7JSYubawg2MEcTPDKTP+pjfU
ph8YdnTvlCT/f9h37fWSc1LKiLUIvixYveFAqQKcrSGX4RaA3XSyP5lpGXfcarnHKrbl5dIkZr8D
SdGnviipYpIbzkO8XH4gb61a1xhG5T1kqNGuKXqNDJzJcUVPtnreih4ZVjswX1fT/J3DVBS1Nec/
hgGPhBzz/IWAWnMb/b81BTVGk6G+ycYh7DAxUm4ZQUFf4GUHfGtqkKqIyAr0opiCTSuo99yQ/Vpz
dnN/0rLwnRN3YwR4PfhuQ2oMQBDUhd5+F1VXxcsM8qZAucjd2G92vca7IrEXiqJB48d2/0f11a4H
7h8eCHXV1X2/ucG23R5Evfd/B83chgQ8w/GYTbhsYhidNr2Gex2yrwK8HEdSGOmsE0V97yTvvWPH
UBA8PZiOFCQqh2dDlV1mf0BcnC6kxrHoejW/b6wJd34lBUeJd8R90bMQyfHf8m4tLwkja95roVPx
Aj/msE6xB2hNXf9GCsi54C6SWhzdZpxzrxs6SCqlTqqMf0GIYZJ5/BM6PYSpnAxWy+iy1Go143v/
QC2OzlFXxOrYO8+wuBY7ZxKY8KO+/1ZiDbMWZWrs+LG9idUTwPnyLSP7rCkwjdmZyYQ+6zftVwzn
yCUibRvdDuMLOMXvYdwQV/NKv069u5qzzTMAUUTPt+oayKrEZ6g9vxPh8x/hhIYpa+CCaohVJZrT
xw52CmBCSymEHqMuN/9TwTrwxzyPCklKbOeKmDX8Kr0//35Su4PbOAtBFn5F4v1qwwIplBxv4Z+I
Ewkbk0oW0PobbSLJjHeadpVkUoFFJffXf8bn68cGqj4TV/VuGd73VxyDmynHX/A1ay7P2RbFuTtY
T9NN7sBojYqloYhhIlrjXeaLAY6BZq+EzXn3yJzkV2Vd7koGCGqx4I9XDS3x5v30VX/rPTvHm61E
V21ldQvTxwNCih9h9TmQBCmI9qrzxEBOjnAfvrpdYAsBplHTLUAUcn+mmjcw/TIFZYsjt926hGd5
0SMpbwHtMEZvCtYEI7vaHKztrQ0p9mjP4ZQa74eFG0seR8zXIeWYWGT5qxaNhmSK5zim2jmj+AsM
fiFWr4laaFHVnVTOAegPwS6fpAC9fO3NaBriPNy5fOBTOB63zIkwhzLh8nNGHbMMMiFrQ0VKw9nW
SOiPvVE5DrmIdiYb6fVfmL5M/vgKdrllAzc0jjYS2MhxzHT1R1VNPytN75EZAnsKnoFS1IV1nq7Q
BW6+AgxoyqTfFxZDUwdquvcRYCwWRlLMztfX0mxmSUysTVg95yTedvxRZpBIIl2Hi7nxqm2hd9Bh
z1uydgQRcY7iwpPYZATKlpQ1WjckU8K1SsAAq9Ji5pbGpOrBo5WEz/9sp1jkVXGni1OnSTlpj7Hm
kGF+bZ9bz9lKCtkVaik3Es3g7wsMmhDdTT8XLjOe590oDsTEH1OEbp6nlfMWjI2FNuapl2Wxk+sE
ufFM1TNcvZQkgxW/j7z3SxJG8dgXp3W2kUTqTBjo/Y1hyQhzWciAt7yypLh0BqzoNMMl00WC8Zm+
wOOFhP05RytpUGeJ+9kGNNKYLGyh/pFbrXyL+WpY2MW4OaQ0C60Q1W1j59FIATkBdAo2b5H4Al/2
MtQvvB1VbheghROL1ftNmmuUZesjqeQEaG+bqBC8YXfjbbx562amLDoQSOYhXY474uZVXgefAYXS
aYV1/lNvBDdNXgOxhDfC4yFjrcpa2BLV/tEVSmocbPnz/kchOWjUrwMPe30xNyfBlHcQHFnJRCAg
0axHeLYstY4LmIVFQE6/rzVw5pW0KSmGsWchdjOTt4+mLsLvRffAMed2pkmJ9/SY+UizHpfXgSmn
c0KXL5jOQzmpIfsKSF0sBH3TSM76dbRI5jCigRn8jDfm4zxokipRJG5EdRWTdbBJ9LyoIDllPYfl
jyZBMWHfvt5G7CMNEGhFoMvL5zADy8d2hfeAoKGz7lhdbngoSK5+liSUNs2lpTZPKf8Vg2JSNk27
55wAwOyVSyeU28XGdw5OCCCwzAw1bLKigP9VUNn013vfgQkISSAdWioP0htXm8gU+iyijM3PMgGm
H626XD/frMtOHXH4P+mQxYGhlkR/NeJr7B3WG7UGQiZfNGF4SkQYONb6oi4U/EUTwNmrOa1i6MfH
CbnHHIThBBWAZbGB9bgzxkhTIIOlAe5ILaoSsLEVJDylQcOLdmhmu3k9d6ub6aWNTvOHe27Na0oZ
T7bfgxHKSTo+qj1lpPfUe1tCeryJaFbatI8Ear3VtD3eR2T1VXx2nLoA7U8WJZQJrhE76eQ6cANx
Cc0FkyGoQ2nbg0LA08fY+Scp5P0eYMyHrLahpOx+yi/HPNGL++vGETYsyONn55jkKF4w45vatPA7
rzZvl1kiYCeFhbpCE5O2p1pquUnfQJN4Q2ny4mTC9uc95+xEPbTwYx6pAEcIL50YSrYHnxZyUKfG
W8oOCfEVZoYazYBf6QIa6IhwW4/IZ/vdFgnCMEaW5l/EXpxUrZzN4NMb8idIAm13KXfgM74dYXd4
cPD2TiB2r5zdUMKZOM7DF9u8yjQdqXzGocHd6vGmrmFX3OWuqow3MIHj7Vptjmk/PmMTvxUgEMag
NjsFJkKFi8e+FlYGsCqmRL7fwW328L6kcI8N5U2ynypvo0n1LCXHiZY1Wjqqn/ps9EG4yD3qEeQw
NO2uiDv1E4uRPR85kV9UPCB5C+R7wdXGxYo9IlgwhmUq7w277yumUVYGUlKlfcm1+jW2CGoMy9/B
sHn0o0kXswvRV5PmKLHbG8qTGlS0uJrFfWAptMf6Os3NF0+fvT6vgB791JOL4/qJvOyVfcy61Ux2
Nk25nT/8jRUNrG1aaHIWWG8g2zBzQrPBpy9MqEuelB9Nz8JyuVhiSbGkss69vFSNJxmts7LWEina
cbuLKlZa89wqJtt+Oh2RorS0Ipfn69Go57WJfmNs+0nU0L/b/WfIduMA2g5RLlPIoINNKIxM7150
OCo+QZmhVsDE8Ouv7cdGG5Esa/jApXQcOul/+RuikXxR5ZtVse+H+Tt/t1g4Vxc+QBMH3SMJMOwv
V/uaFIM2tcusmIhy5g+yqSpsucUnPZiE01Xj1VPxbGG4sVlZTokboZ4qOGH3fVrCv0QklKCxBeRz
Lkz6qyIaHLyRI4R2wT9zLRdtRNl2JdZAv1O9dgIIGSCxXNq9CinDAiqGnPszE34el+gh8yZcDDDK
/uBOp4jqKvutIBjS5uUj/8MuSlEmLtB1H8Dh2iGuy3Oyop+VI3ks8HvjusysvAxViOJwpjgMy2lD
amZE+57ynb49RIzqp4rfLvNi3+6v2HOxgDNRoLVHEHxsVReTH50isGI3lWQHS/joMFgm7UyfKAr3
puv9iWOfqZiutyMSGaptIdSrYBwEdkb708rZqlr3cSupnW4vAMXknh8oRK99Htj4OZ8SnSeuoYh6
xH/o6h8n+6I6UW8nHCTcv+ow+rwMHtF7bljvD6VooNPCiqGSdwratYPkzM5IYDpow0qApgswSTOr
VG2PXDkkwOuiRGZcJqTc9up02IlNox8SM3W2WAHG8bmDoVt+tb6KOGWFZGLl/XHrQpZ+8H3CxxYt
IkAHUX0YkC2106ChfsUOK9FZ08k2CKTOrZ2lpcwlUAzMICE3aBP7VNYXflcw3OQTK/X3wSw2vEnw
aOkDIWI7u0glbS/SJ7UBiJ/8FQklED3lsSvL4c1U595f2NmJb80M4bzK8w5iZmOmY0YT4bZZTfP5
o0llPZ0P5/epkURG+Cq+ckB3AgtmXnxDI4gYzWMALvHKXFXF6Zz7inwpj1h25In84wOOLBEM+Xj3
6MKEv8vuEqpfwO9jOpPoGiEkHbR3WC6W/GSBlrkc9qs4fEOjwjGfW8fkub08ybKEKckgG32gA5BU
iVlXNS25c2WfVzuq/T9yaW/y/sU+uU//Qvun8xlCmTiCEFYCm97tFWQLFx/RKYA8fQs6MRmuzAly
ePEIU8lfndp8aV7cy/8WR5QJUryRBC/PTpaca/cl8fIyfcJAfETowgLp+oR9TRvWVuFvjXLD43Dl
yQhxv/bG9/qYuShUr3gF2d6QHSV6dfzMtgiMirf04RqPdH8f+w8uap9wGu14GpNAlzxwOWTwJu3b
3Hz9Qc2QAqmUX4ynQyh4IloLUHZ7i2/Biu20v2uPZWAbd5u6kom0QUKBZsTzHN3Q9d6ZK+T3LlbH
pcLOFmlHQNcej+nwkfnhYgSJJMEAtEARmArJmaLNrG/1kXA7LE+tgWcWOz+o30FgMV4/SuJdXrGl
MJr26abXQhazEyMWItC/QuKdRUo6l4k1kfM0NAKdk2vtRswdhK84T+FIj0YkHNiYRh1FEQU83asl
RikGec5v0Qu7u20skHFjIEpb9PVzIMgrv9I0uurNrBBV+dlHtXQMgUs4ft3CNm+Xx5YGsoF6kB08
aU1Wqezr1GpTmpEiFhjiu8ydggaKaa95cXLFi3wGoIyA3UJT13kRQ9St5Qvw5kPcWXMWcI1mb5SR
hLeFQv1P94f0RsSpw1IJMd9M4ScYfxeZNhdWhZA3j6pOvz3OBCz4ffFKF+hxkMN7QADtD6b+8lPh
2Ip+TtutaPWX60nTJo1gqPsDF8loqyDneNwc9DM/EFbY7FpBpjlpkjS+wU0zRWT1a/z8jUjCUX60
DWwdjum8U0qQeVvY4V0MK0rFqKYuuGkHSa6gkOSuK0IDiN/7P6S0e9GEv5cSGHeqqmJOZNtckZQi
uQxhBLFVllCSwL6rWWaCutAM5xKv295YLDI8kkHH1+bAw8ZHWfmaO1/dfFJ7JamrJAuIDDBazdUt
B2m8yajNP8ufosnIzRxtvr53RQdf9/xWVZOBvp7VowRUDXqXI32pVYrmfN+vDEnxrEqEIqSDB2ch
jU1TKbwWu1rerL0Z+fUohU7pY+OVSMW6BNt6E8GnqHGObgSefyeOkYOIeDLWFfg3aznHv7/D/gWu
jfzWS2YJ2puvjsoaLLZQGAUFanpgz+CA85BAoK3GBaQzwFdaljA/4w24CtQWl2BI4SXdcx2dxlOd
FbDUAO7c9NthYTJWvwvLQql1an9bsPLSLWDECWxa7dw8U9nAHIARlx+zyVuUsMabs4cEGDqpu8+r
bhlSRbaluTi7bsMYl1n6WCP2GAyImw4JYIQXhBb43dTj/xVPpytarFwHE3MQTxHiwLjV6vUYeTCy
6MG/p493MpwTm6vp17exv5ygeSngcG+Cb6QzwKcnV+xqy+0BDgmarIh0qtvqWdEd+E5dQN7eQrfK
Nsa//tdg4Sb+3+GlfHRX2RQFL+6EMcZ4mAEhFwtxe2p1jN3qevJF36MHRpcrfSMSMCc7yZ6vZSeF
aedFbY6atWbpiWSt1wJLOgeAhR2t9Tjl5d4I3Tar3unU+hiFYblkRuVfTOrtVAsw6KOI/r6sdTZj
0bX0ry781ORj0VHuO3RXPZiggQaurcrLFc7JIANTZ/GhwbgAKhIrBtfDffGJ2MS+EACuXbYD1itK
REB7jglY0Bw95DTSy3ErgD+kgZYqllO3vSUyTdRuZCntuHuvToEAd0kx6fZ7UI5n3bc0ujkEap/h
Y3ldlVGChptzIq+F6rqVNX9xLbJSkvtcoi6SKR2lUbfJ8a835Q1EDkRG8W7RWpIXMbBUUmYs/5Om
pXeF4dlHaiXT8CpuRFkXMJzIwqBqBM4teGMhxrpn1Ch1JSD0vbAAqzr3kfWJgzBo7oBUly9Greh5
qD27VI3oHY/dCoq22TJZI4mNRVlFmL7vwIWM4NoNictGriFpv3001Pb5lUPO8ekQndiBgjCyW182
2MrDGyMWE7fI7ILt8tEsGIf+wrjqAKCsHJbdvVZrDimtdSBYIQYHZkgmsEmN/uvwe0jiXaqkGl+G
8WKqBz4Q4UVcAH4WXj9t8jAOS12UI/eQdobF0FAWhuKGjCGHkaRqMfn3+bQWLnT32SgOwuJ3cyoD
bHWMz37HaEhtQWLYSYez5LGHzVwN8y7a9qeW28oC2tHtEovj+e77xEg+l87fXxEoWqIGH+tcNX+S
L6Bte+OxZtUxTD/01s5zgBXzNFAvIFSYMKW3A5QZ1MhndjJkZGuRHWbY9u/lk4GqLzUyahbJov5e
8IeEO/VZXxpcPPX9rDVnM+bEyR6nCauTKLBvbTvy6FA550b5ay7sb/YpMCoghUKiYvuqqkdT2meg
WEl0w76q/T6+jyYcQb6+iJOUrQokWxCwHsHWbCjwT6Q+8QoUdBw4K7C87m/ml9VMhjEnxevUhf/4
iKqKsZR4JZfhkSY82Bo8vzl+APJlJ9GElbYDeipRYyy/ETOErUoEACGbVg8H+hu3ilal6G+LDtan
++Lz74Av3jpwhe8OE91Kng14Xb6TUA4I5fjNFD8u0qH6E6Hcp/+DfTjDMYoH5Q6d2251MY6haFV4
0BY+8COvDPZBKGTXY9sKiVjA58Nb8QtERywPwFneji/5YFlylXJ9D9l4KJ2TkItkqSj9hcxxGiPV
CmsieungvbeA9xtnM8j7YAy5o3JQhdy8xLeKvygqQ/053I5sgRyQi6O4pMdA0xEyWL+GYiPu9TD4
QeI9iHdEL2iA9RY3LJqpGHy4wWxU2QBnTEutyN44aclwxkUlQt6oOzuSoaXY01cN4KXIxlKnBVTm
NZLlNtVnljImXnoJBdT6T6Gs8MwLhfABcHqVWwvkwvvPauVCQkqBoMHs4WoOuzqh6R2yVjBXevED
aFF/0iK4kZhIAkQyachVx/OKNULdP8ANPSlaMODzpUt+MO9ZuHpXxI49eRAQMcnJiFHhtnSGxJSX
1KnUK2WMDmmsJrQFWPfsFdSKGYBu6rJllFDbLYfj2H5V0+u6GlCIgdAqNGhthp0T9h6mdTBGET+H
GEWDCQKPx2RNEuucMunrJvzOJsQw3ISTyq+x1YQhEYeXy8jKbDfBFbIfbXTMjoLjGcEYwJ+2fZUA
D2/6GcK+M2Du9Ua9M8Sd1fiXLV9Ujwb6aX6mgeym7Xt+9Z1SkdoKDctBDNpMhnA2ENI1YhF8mj9H
fCcJfMSjPpJpzRZbE98PD3D0jQCuZ+tQyUkP8fcZlGsZFI2DMT6Nu9vw7vdRUn1xeqFFswOdP5q3
7z2pmDfa3ZBLfp6Bwlv641IDrALKF+u3u+G7I8Xz2qmXiIRmzu8KA4b9BK7a3mQAvUWUepmMshQj
y2cqf5955ANHvOLitslE4JlWzlI+BFX9sn85fsqtVMLwosDArfWt8JuOf+OKA7HJby5ru+l29cgm
3FEJBZ+fbVOMPSqBS65PhKxKkqgMEu7raXsupP/arkAqPo6CykpLmw/0OMUuDim4hL89hnnpgWVN
vD15bu17LZu43bF8xlToOfWDk+FFIzaFvMGcy+nnK2x1sTwPAJrjoXJjh/dTqARTKdqLNlzVyHzI
bWTM1u2V/I0+WosIPGJv382Tiw4JGbAKaR0ojU+Jsw/PPoTAvsuWZX5nGpAZZceH5PFPXTS9jhxO
baMa/2OvmYiUi3CQUPh7E7bKCMx7ypq261+NSZiqZx4LRRZF5QtbGNlumuY/6gMk9v/qMjYGnqNe
KBU9klK3mzSYAvC8KDEktbkRAcK9m64ufRgA6radmTp4naG1xYemdBr3plubNF6cXjem1iLZBpfE
BamzGhTLQeAgwi4mUfWRPVADrG3sZF/IUk2yYXMZzx3lg7XJEzBw3yEYIbu0LBITWpR881kmjd5K
EBpxY9IkzKYmrAHFrnGVnW6nT84EJoENnWf1pMdEkQAYM8DAKDlv+gs4MACEH7PRQUIczDjxHT7M
4JjomIea1N8d5PB0UVW/bF4s6CFklRj1Tkww7bhUyztTYcdNh/zu6OV5PNE+x2M9KDj978amTIuc
QuGIo8AyzNpf0krfTRLHw3LODM+gg5jMt/dr6O72yliWYXip0zAgFhZreHxX3fvqqG0cSI1p0nUe
AJIpg8eXjw6a/chjZc9bpYnHJVr3KXHxiA6/x56zwu//7nitVuw1pHN/CQmlFnMzKJCAccmS1gER
pZNkt7xpytYGJkhHp40iKQ2SSNUl9qkZNFIeQmUJEhamD8ulL8ngRsuHSdUpiLr/NWQfTx47aCkU
ujuXPPFtLUNo4BziampKml/LIbh9fs3udJNFuT0Nmj4dj/0Rczj7F3C/boFvSDV7oKHxWVY9e7pM
fTYkFrHU7FcM7JOaa4mpPXX9Ny/zcIEahJkaorTh54VBv9tWhpA2MP0RvvfVNaE+V2Ji+5cD8NdE
k0D3GaF21II6U6cYUf3EJqpX8NuRNMrHVd8kb6L2KCataUOAgZztGegZSGCr91nfKBjNsrPH78++
yKnolxfu+csHGfLM60jNLpgGKRLEb8EZb7mJhqHWqZz0/FzhYbdG04h1H+7WJXDixC+0KVjpf2Zf
WuF6I49hg/2jwpsCDT19p813xP8AsRIKjJPZ8RZn6q+t0NpAY3KC46Lb0n3/YShD4PJIGT4WTBwR
aO2ht16nIzME9khNLPaNio2EGYWIDW85DOQ/LlrRJmpY8Um2M56TZMXnlOxnBEIDEsxjDbyeRRTU
nmkW3SmQg6FkQTxUX1koDzidXRW6/1VgNvL0kRIStQSroGw4Df8nr6sCZBYuasMzyZEIawSKVRov
kMplyFQT+pivHpbNrVLfPcuQ+X9yId4qjYEooW9BVE+T9WCacZ1IKW4xE0u5x5Wv/lkQ1+MwogL5
q+Y48UpHKT3stqapnnjBhQYoLbi08yLZtDDbJND4ahtvnZ1GYgBEhWzhp3PQF/RcGXA5UF/ugDI/
HlmTJ+RPN90q91vDy3lc9Nri8p4EN3afeIUlUNmDqy8qvUiInzvlM2/LRuxqQfvnCbsMwZ0ySaP/
10q5ap/NQsSgICTcnVmRSi3rJkqB71d32c+qLJ2JvXejYmqN2c3ymKs1FAKaW+uh+UszgwyaBaBq
QuWS7hGT/kncVmrkStK0gvbVw1T/4JGsAFlqARZsMfNl2dPn52Y6A6JEAsaj/4a90qD841z55yYh
gUNtiLb4D7f2o9TXs4GjSy5uk1W3j8okTi+tDcLHvBmf62eJTZOR0d463M7+N/nPES0mJqgpqkM8
0pICJq8QqiGaAlQqSsI/nWsPDEmrNVGx8X31n1e9Rp24KNfzlKjFeAgqrNa/Bz4wt+a4FjOlgJir
YtjNCUvosrqGBVWBgDM2rH962PxBrRsi3tSXDEcDt1j5jr6hqYYzl0X3UH5aHz8Om6+R3czkVpzq
2B0mrqwFXsWNh77qGpZKd7JArnbc8oe4U3JhluXqtyK9z6ib+2/YBm8VBEooZIVtzMqfUzcncQ/p
PZJXgqz1tKuq+fsgKFYq/MQY8e5DNc3wBaeszn19LkiY+IK0HuXVsjEiXzEBiYcXScdXN1QWR4s5
PmjXNNXZ8062L2b9Z0jCmztKpeFnCcP7DnBKpOTEQ5dOCiXz/psis2Hq5lULTYqvnUIAbeoOTPZl
GJ0Re7LGJJxUAkomzCdtses/V7o+DBEk8lsIwVKzYfxXwOmPHi5WPFMFGREAtvbswjATbpF21XmC
7tUyl+Ba85MyRgMiYxuzuYcY2TX3yGle2WdCNb6mpVS9Hf6fAA5aZeRcIV/ajKkkakHY/7PUCXjY
kNtZbACZnCNjx1uV6RT8sB06ebaIv+9j4B6xSQ3uhItFdP9itCuJlfez4JHIijlVNOSRb28u1927
M3/dWva2jiB8TsI+X50mClZf0hBTslzmrYzZUjEL3kFnL0cJvuKcnY6jO7BJx3HRAuGP4js/Ss0s
gISZv11+wPCai6OzXPTpPsrSDIjVfbHApnRJfOux/bnwavkSh6VpDUjEt2ZeQdpwPawRgexe5/tI
whVHMbUAoVpXIk4l0HX5EFmL9jE8xhHqZU3aW+gRcluGKe91OGQ/liLGlqMJN8YArjQfwz7CzfC0
N65cSsJpapI+ZF94chdKqEJVH8aLnVNYHd6HIjPXHGajruoUbHN3GrebBFqD84YZG/sNHQqHykYc
WbBugcg0Qn65/iuVSdQEEtPPisiEjpjIgMG4HdXZBr7Yl6WOFujNTBDS1LxoSTRShaD+fXthmCzD
vK0QsqsABC5JqYeu+IlNa4XhapUTQyg3oK+bmBmIKyiyYYwGu9+kosseXehVDgkEBhGnA86tNh3z
zCX7hXIDxP7Rkazxo05yhrJ1UOAMKI5rUFpbqdIWzM5M86E8ie36tnY0lPg7E0j9ghna+RnrZH83
vkeZnHnDORrNIFBBrXtiJjXnZUAYjcwGoxsHAP+RJ2BeZtKz09W/zguCq1tjHcQgcqAsmuWKXuo0
JrjJzNgUYQeaLP1aGCZZjZ02Bfp4bhL9jZs0bf+jFFJ+cge5KVNyF1onwyomn/j8wJbPGt8wmhA3
DDC82Mj6pqjAXDqhKzgRuBjhIf3AicpMDmzeXsZnpEqZ5sCQKereSHhCGhMeLGqpFyHFtdUalR5Q
TuuzeHppUSxYAqwL+pJj8f2+A3CjMmWgmzDsmU/silzm6+Rfi3saNg5VmADEqb7g6b+U3vmhANJl
5esc3YaKZmTO8XnCisZr67NG2wwo/FaLZRSybg6IXwWh5lWw9hRy7Zxr6br/fzUfu+W67Jeaz+Oc
Uq12XOIhnSTOR4KH2lOtL+5p/yhGcAm2+1IoitMyKZJQLqqJwvvIB3h2789XUwXuR4hhdmLAsAYK
rMTsLCHWlhb09ajp3kj/SkrpOy9keI+LjqHwa/SDsryyv4AgxEQ6ZC34+kGKfIoX8+Q1D4/mcX3I
yvFg5FtaA7UO7jKpoTLvwyFL7aFmg70x2kBGwQFi61vJ6uav8WO0twzxI9pEX1Qszet8Eh7ZOtyp
POljZM6PDIzybNUWE0UjPBKWDE7TRSuNVMlDUHwl0EC5ssnnF0CflpBtwxQIwXl57BstdIuSv4yQ
kSWKYA0SABFA9m7HqyqSNLL/9QaqkDFywZMzhW2hk0yh0bPHBUxpA6MAkHaRBIoAsJg0VYIN+jxU
2D76zcrM6+8WgG27OF2wvFB4mWwMBUoqmN0ynspyMKGiVspDo3BsnGdm+s5ykeZSf4mHcAkhRF0t
g4HAoLUXm1oKRh3E0LseGX/GjMA+zlkB/QjRMLmuxDSxzpkeOqfU5KX/Zi1cJ2qAo6m/KouQsPH0
MjSmkvUCyvYH50F8dGeyZaz8jEpAfnmTQt68razp+7ITPgLgMRS+Qmy9rZZKdeLCwL5khDZTmsJj
qb8fyHBborXI5W7DPAUIXaVvL8yKgER1E/9pbXTqmHp5R537+s80TCXI+kxjRaGcMplg2fso7z4D
12eS0uK8cuMTpBbh/7lJx9h2b3IbVAVro/e/r1F3A4rn0HDi1GgKgPJGlhgCvFh+2Bvp7lss591j
sdPHuGxBV1QSD+a3gswkRJwLjysqltmN7116Adrqjxfhi4GjGhhbdkCrsVTI5dpq3BkkpzwPDssU
cFCARMzcotQKuYs6vl+GGwiDdeTUi4amvAfXJW+/wXbQrCVtm2ak1t7+ouYwn46wXV17BmKOOZDT
OqDP2Oz4paSnYH6X8NQCNOtG85OuDR7bfX/+1DuUz96CIiLxiqLNYxF+tBwfLLhyCKu60brmNL2j
rYW2+MLda2Qo0wMCp97jgxA3lyV9rFDtWwjQ4sgwCUh3D0a9mjydS6XySPvUVDnVYrHmGXiv5Fon
27oNRu2WimY0E1sQ/eVLfl7ikowzSPJenPa9JepQLK/Z8UV8To7QeGxxTiOifJFC8obp74Pqm3H6
cB39q0mGXZ25m3g9YG3s06vs//pdFJsfolhZmSHRnIYhnCDnjeux4QhmUTEa5zq8unzlp0btU1Ho
NNgNYSL4KsX28CAaTHjOuz9/46yo5vXvI+/TqWU0SSSvkYcHzSBnTMbKCfy8x4zjlyk0yvCoPfai
q9+FXvxzbfNspUe1ILYo7a1zVdnEvZljEQyQCONRQM3gSfZ4QZxaYMyJOjcU7aWxIRtkTZuFYv/M
DwIw6SoZH04z5IweusvIuqAw4RJlt+2EP/UQg1ljUVzJUSfYl57Pi6dRxT6NGiHIUy9ZGrwN1X+V
/gqy9NavEQz3mUiDqVHxtzwmTVmqerBrQWRqYw52JgdVimb9Qeo6O2ThfbTjTZxEffLXZIrKvE2+
jwdlHX/12z5surAX0KrG9rPxCA+lYEtxj99W6sfWRts+JgcxM8rFFRPaO18u10RjTUr5l+2PBUIu
Xc9auNVOmV+3Bhq1jAuVJ0CVwKWxikAP/QO8T4yfScDVShi6BLrOAQGQ0fnRX4T21dw4LYcAu1Au
CinKEvkG7/igUhP/DfwPVYzfpVe/E730xQ4Lzw3Ex8rWtanJhT065HHlJfqJ2sAB+ErTdWFq7XG/
Qwd7iysU2T/XOiIl2awZFSJzIaaeY8OtPmADCPo1Kra2LkUq+TChyDPiN02DBrXSfCBso25X4F0A
jBIxePQnd2nIrIXggDhrNf0KM2SBczn+yfCxQn10x1/iPwGzwR5osDZnX7V7z+S+BrfDX8uqz+AY
G+PxjNvWc8INnmFVu785Ybk7zqOMz/8S
`protect end_protected
| bsd-2-clause | c578029d1b12e3909ea981159404cac9 | 0.949416 | 1.828235 | false | false | false | false |
Bjay1435/capstone | Geoff/Geoff.srcs/sources_1/bd/dma_loopback/ipshared/xilinx.com/axi_dma_v7_1/hdl/src/vhdl/axi_dma_s2mm_sts_strm.vhd | 1 | 38,436 | -- (c) Copyright 2012 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
------------------------------------------------------------
-------------------------------------------------------------------------------
-- Filename: axi_dma_s2mm_sts_strm.vhd.vhd
-- Description: This entity is the AXI Status Stream Interface
--
-- VHDL-Standard: VHDL'93
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use ieee.std_logic_misc.all;
library unisim;
use unisim.vcomponents.all;
library axi_dma_v7_1_10;
use axi_dma_v7_1_10.axi_dma_pkg.all;
library lib_srl_fifo_v1_0_2;
library lib_cdc_v1_0_2;
library lib_pkg_v1_0_2;
use lib_pkg_v1_0_2.lib_pkg.all;
-------------------------------------------------------------------------------
entity axi_dma_s2mm_sts_strm is
generic (
C_PRMRY_IS_ACLK_ASYNC : integer range 0 to 1 := 0;
-- Primary MM2S/S2MM sync/async mode
-- 0 = synchronous mode - all clocks are synchronous
-- 1 = asynchronous mode - Primary data path channels (MM2S and S2MM)
-- run asynchronous to AXI Lite, DMA Control,
-- and SG.
-----------------------------------------------------------------------
-- Scatter Gather Parameters
-----------------------------------------------------------------------
C_S_AXIS_S2MM_STS_TDATA_WIDTH : integer range 32 to 32 := 32;
-- Slave AXI Status Stream Data Width
C_SG_USE_STSAPP_LENGTH : integer range 0 to 1 := 1;
-- Enable or Disable use of Status Stream Rx Length. Only valid
-- if C_SG_INCLUDE_STSCNTRL_STRM = 1
-- 0 = Don't use Rx Length
-- 1 = Use Rx Length
C_SG_LENGTH_WIDTH : integer range 8 to 23 := 14;
-- Descriptor Buffer Length, Transferred Bytes, and Status Stream
-- Rx Length Width. Indicates the least significant valid bits of
-- descriptor buffer length, transferred bytes, or Rx Length value
-- in the status word coincident with tlast.
C_ENABLE_SKID : integer range 0 to 1 := 0;
C_FAMILY : string := "virtex5"
-- Target FPGA Device Family
);
port (
m_axi_sg_aclk : in std_logic ; --
m_axi_sg_aresetn : in std_logic ; --
--
axi_prmry_aclk : in std_logic ; --
p_reset_n : in std_logic ; --
--
s2mm_stop : in std_logic ; --
--
s2mm_rxlength_valid : out std_logic ; --
s2mm_rxlength_clr : in std_logic ; --
s2mm_rxlength : out std_logic_vector --
(C_SG_LENGTH_WIDTH - 1 downto 0) ; --
--
stsstrm_fifo_rden : in std_logic ; --
stsstrm_fifo_empty : out std_logic ; --
stsstrm_fifo_dout : out std_logic_vector --
(C_S_AXIS_S2MM_STS_TDATA_WIDTH downto 0); --
--
-- Stream to Memory Map Status Stream Interface --
s_axis_s2mm_sts_tdata : in std_logic_vector --
(C_S_AXIS_S2MM_STS_TDATA_WIDTH-1 downto 0); --
s_axis_s2mm_sts_tkeep : in std_logic_vector --
((C_S_AXIS_S2MM_STS_TDATA_WIDTH/8)-1 downto 0); --
s_axis_s2mm_sts_tvalid : in std_logic ; --
s_axis_s2mm_sts_tready : out std_logic ; --
s_axis_s2mm_sts_tlast : in std_logic --
);
end axi_dma_s2mm_sts_strm;
-------------------------------------------------------------------------------
-- Architecture
-------------------------------------------------------------------------------
architecture implementation of axi_dma_s2mm_sts_strm is
attribute DowngradeIPIdentifiedWarnings: string;
attribute DowngradeIPIdentifiedWarnings of implementation : architecture is "yes";
-------------------------------------------------------------------------------
-- Functions
-------------------------------------------------------------------------------
-- No Functions Declared
-------------------------------------------------------------------------------
-- Constants Declarations
-------------------------------------------------------------------------------
-- Status Stream FIFO Depth
constant STSSTRM_FIFO_DEPTH : integer := 16;
-- Status Stream FIFO Data Count Width (Unsused)
constant STSSTRM_FIFO_CNT_WIDTH : integer := clog2(STSSTRM_FIFO_DEPTH+1);
constant USE_LOGIC_FIFOS : integer := 0; -- Use Logic FIFOs
constant USE_BRAM_FIFOS : integer := 1; -- Use BRAM FIFOs
-------------------------------------------------------------------------------
-- Signal / Type Declarations
-------------------------------------------------------------------------------
signal fifo_full : std_logic := '0';
signal fifo_din : std_logic_vector(C_S_AXIS_S2MM_STS_TDATA_WIDTH downto 0) := (others => '0');
signal fifo_wren : std_logic := '0';
signal fifo_sinit : std_logic := '0';
signal rxlength_cdc_from : std_logic_vector(C_SG_LENGTH_WIDTH-1 downto 0) := (others => '0');
signal rxlength_valid_cdc_from : std_logic := '0';
signal rxlength_valid_trdy : std_logic := '0';
--signal sts_tvalid_re : std_logic := '0';-- CR565502
--signal sts_tvalid_d1 : std_logic := '0';-- CR565502
signal sts_tvalid : std_logic := '0';
signal sts_tready : std_logic := '0';
signal sts_tdata : std_logic_vector(C_S_AXIS_S2MM_STS_TDATA_WIDTH-1 downto 0) := (others => '0');
signal sts_tkeep : std_logic_vector((C_S_AXIS_S2MM_STS_TDATA_WIDTH/8)-1 downto 0) := (others => '0');
signal sts_tlast : std_logic := '0';
signal m_tvalid : std_logic := '0';
signal m_tready : std_logic := '0';
signal m_tdata : std_logic_vector(C_S_AXIS_S2MM_STS_TDATA_WIDTH-1 downto 0) := (others => '0');
signal m_tkeep : std_logic_vector((C_S_AXIS_S2MM_STS_TDATA_WIDTH/8)-1 downto 0) := (others => '0');
signal m_tlast : std_logic := '0';
signal tag_stripped : std_logic := '0';
signal mask_tag_write : std_logic := '0';
--signal mask_tag_hold : std_logic := '0';-- CR565502
signal skid_rst : std_logic := '0';
-------------------------------------------------------------------------------
-- Begin architecture logic
-------------------------------------------------------------------------------
begin
-- Primary Clock is synchronous to Secondary Clock therfore
-- instantiate a sync fifo.
GEN_SYNC_FIFO : if C_PRMRY_IS_ACLK_ASYNC = 0 generate
signal s2mm_stop_d1 : std_logic := '0';
signal s2mm_stop_re : std_logic := '0';
signal sts_rden : std_logic := '0';
signal follower_empty : std_logic := '0';
signal fifo_empty : std_logic := '0';
signal fifo_out : std_logic_vector (C_S_AXIS_S2MM_STS_TDATA_WIDTH downto 0) := (others => '0');
begin
-- Generate Synchronous FIFO
-- I_STSSTRM_FIFO : entity lib_srl_fifo_v1_0_2.sync_fifo_fg
-- generic map (
-- C_FAMILY => C_FAMILY ,
-- C_MEMORY_TYPE => USE_LOGIC_FIFOS,
-- C_WRITE_DATA_WIDTH => C_S_AXIS_S2MM_STS_TDATA_WIDTH + 1,
-- C_WRITE_DEPTH => STSSTRM_FIFO_DEPTH ,
-- C_READ_DATA_WIDTH => C_S_AXIS_S2MM_STS_TDATA_WIDTH + 1,
-- C_READ_DEPTH => STSSTRM_FIFO_DEPTH ,
-- C_PORTS_DIFFER => 0,
-- C_HAS_DCOUNT => 1, --req for proper fifo operation
-- C_DCOUNT_WIDTH => STSSTRM_FIFO_CNT_WIDTH,
-- C_HAS_ALMOST_FULL => 0,
-- C_HAS_RD_ACK => 0,
-- C_HAS_RD_ERR => 0,
-- C_HAS_WR_ACK => 0,
-- C_HAS_WR_ERR => 0,
-- C_RD_ACK_LOW => 0,
-- C_RD_ERR_LOW => 0,
-- C_WR_ACK_LOW => 0,
-- C_WR_ERR_LOW => 0,
-- C_PRELOAD_REGS => 1,-- 1 = first word fall through
-- C_PRELOAD_LATENCY => 0 -- 0 = first word fall through
-- -- C_USE_EMBEDDED_REG => 1 -- 0 ;
-- )
-- port map (
--
-- Clk => m_axi_sg_aclk ,
-- Sinit => fifo_sinit ,
-- Din => fifo_din ,
-- Wr_en => fifo_wren ,
-- Rd_en => stsstrm_fifo_rden ,
-- Dout => stsstrm_fifo_dout ,
-- Full => fifo_full ,
-- Empty => stsstrm_fifo_empty ,
-- Almost_full => open ,
-- Data_count => open ,
-- Rd_ack => open ,
-- Rd_err => open ,
-- Wr_ack => open ,
-- Wr_err => open
--
-- );
I_UPDT_STS_FIFO : entity lib_srl_fifo_v1_0_2.srl_fifo_f
generic map (
C_DWIDTH => C_S_AXIS_S2MM_STS_TDATA_WIDTH + 1,
C_DEPTH => 16 ,
C_FAMILY => C_FAMILY
)
port map (
Clk => m_axi_sg_aclk ,
Reset => fifo_sinit ,
FIFO_Write => fifo_wren ,
Data_In => fifo_din ,
FIFO_Read => sts_rden, --sts_queue_rden ,
Data_Out => fifo_out, --sts_queue_dout ,
FIFO_Empty => fifo_empty, --sts_queue_empty ,
FIFO_Full => fifo_full ,
Addr => open
);
sts_rden <= (not fifo_empty) and follower_empty;
stsstrm_fifo_empty <= follower_empty;
process (m_axi_sg_aclk)
begin
if (m_axi_sg_aclk'event and m_axi_sg_aclk = '1') then
if (fifo_sinit = '1' or stsstrm_fifo_rden = '1') then
follower_empty <= '1';
elsif (sts_rden = '1') then
follower_empty <= '0';
end if;
end if;
end process;
process (m_axi_sg_aclk)
begin
if (m_axi_sg_aclk'event and m_axi_sg_aclk = '1') then
if (fifo_sinit = '1') then
stsstrm_fifo_dout <= (others => '0');
elsif (sts_rden = '1') then
stsstrm_fifo_dout <= fifo_out;
end if;
end if;
end process;
fifo_sinit <= not m_axi_sg_aresetn;
fifo_din <= sts_tlast & sts_tdata;
fifo_wren <= sts_tvalid and not fifo_full and not rxlength_valid_cdc_from and not mask_tag_write;
sts_tready <= not fifo_sinit and not fifo_full and not rxlength_valid_cdc_from;
-- CR565502 - particular throttle condition caused masking of tag write to not occur
-- simplified logic will provide more robust handling of tag write mask
-- -- Create register delay of status tvalid in order to create a
-- -- rising edge pulse. note xx_re signal will hold at 1 if
-- -- fifo full on rising edge of tvalid.
-- REG_TVALID : process(axi_prmry_aclk)
-- begin
-- if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
-- if(m_axi_sg_aresetn = '0')then
-- sts_tvalid_d1 <= '0';
-- elsif(fifo_full = '0')then
-- sts_tvalid_d1 <= sts_tvalid;
-- end if;
-- end if;
-- end process REG_TVALID;
--
-- -- rising edge on tvalid used to gate off status tag from being
-- -- writen into fifo.
-- sts_tvalid_re <= sts_tvalid and not sts_tvalid_d1;
REG_TAG_STRIPPED : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
tag_stripped <= '0';
-- Reset on write of last word
elsif(fifo_wren = '1' and sts_tlast = '1')then
tag_stripped <= '0';
-- Set on beginning of new status stream
elsif(sts_tready = '1' and sts_tvalid = '1')then
tag_stripped <= '1';
end if;
end if;
end process REG_TAG_STRIPPED;
-- CR565502 - particular throttle condition caused masking of tag write to not occur
-- simplified logic will provide more robust handling of tag write mask
-- REG_MASK_TAG : process(m_axi_sg_aclk)
-- begin
-- if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
-- if(m_axi_sg_aresetn = '0')then
-- mask_tag_hold <= '0';
-- elsif((sts_tvalid_re = '1' and tag_stripped = '0')
-- or (fifo_wren = '1' and sts_tlast = '1'))then
-- mask_tag_hold <= '1';
-- elsif(tag_stripped = '1')then
-- mask_tag_hold <= '0';
-- end if;
-- end if;
-- end process;
--
-- -- Mask TAG if not already masked and rising edge of tvalid
-- mask_tag_write <= not tag_stripped and (sts_tvalid_re or mask_tag_hold);
mask_tag_write <= not tag_stripped and sts_tready and sts_tvalid;
-- Generate logic to capture receive length when Use Receive Length is
-- enabled
GEN_STS_APP_LENGTH : if C_SG_USE_STSAPP_LENGTH = 1 generate
begin
-- Register receive length on assertion of last and valid
-- Mark rxlength as valid for higher processes
REG_RXLENGTH : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0' or s2mm_rxlength_clr = '1')then
rxlength_cdc_from <= (others => '0');
rxlength_valid_cdc_from <= '0';
elsif(sts_tlast = '1' and sts_tvalid = '1' and sts_tready = '1')then
rxlength_cdc_from <= sts_tdata(C_SG_LENGTH_WIDTH-1 downto 0);
rxlength_valid_cdc_from <= '1';
end if;
end if;
end process REG_RXLENGTH;
s2mm_rxlength_valid <= rxlength_valid_cdc_from;
s2mm_rxlength <= rxlength_cdc_from;
end generate GEN_STS_APP_LENGTH;
-- Do NOT generate logic to capture receive length when option disabled
GEN_NO_STS_APP_LENGTH : if C_SG_USE_STSAPP_LENGTH = 0 generate
begin
s2mm_rxlength_valid <= '0';
s2mm_rxlength <= (others => '0');
end generate GEN_NO_STS_APP_LENGTH;
-- register stop to create re pulse
REG_STOP : process(axi_prmry_aclk)
begin
if(axi_prmry_aclk'EVENT and axi_prmry_aclk = '1')then
if(p_reset_n = '0')then
s2mm_stop_d1 <= '0';
else
s2mm_stop_d1 <= s2mm_stop;
end if;
end if;
end process REG_STOP;
s2mm_stop_re <= s2mm_stop and not s2mm_stop_d1;
skid_rst <= not m_axi_sg_aresetn;
ENABLE_SKID : if C_ENABLE_SKID = 1 generate
begin
---------------------------------------------------------------------------
-- Buffer AXI Signals
---------------------------------------------------------------------------
STS_SKID_BUF_I : entity axi_dma_v7_1_10.axi_dma_skid_buf
generic map(
C_WDATA_WIDTH => C_S_AXIS_S2MM_STS_TDATA_WIDTH
)
port map(
-- System Ports
ACLK => m_axi_sg_aclk ,
ARST => skid_rst ,
skid_stop => s2mm_stop_re ,
-- Slave Side (Stream Data Input)
S_VALID => s_axis_s2mm_sts_tvalid ,
S_READY => s_axis_s2mm_sts_tready ,
S_Data => s_axis_s2mm_sts_tdata ,
S_STRB => s_axis_s2mm_sts_tkeep ,
S_Last => s_axis_s2mm_sts_tlast ,
-- Master Side (Stream Data Output
M_VALID => sts_tvalid ,
M_READY => sts_tready ,
M_Data => sts_tdata ,
M_STRB => sts_tkeep ,
M_Last => sts_tlast
);
end generate ENABLE_SKID;
DISABLE_SKID : if C_ENABLE_SKID = 0 generate
begin
sts_tvalid <= s_axis_s2mm_sts_tvalid;
s_axis_s2mm_sts_tready <= sts_tready;
sts_tdata <= s_axis_s2mm_sts_tdata;
sts_tkeep <= s_axis_s2mm_sts_tkeep;
sts_tlast <= s_axis_s2mm_sts_tlast;
end generate DISABLE_SKID;
end generate GEN_SYNC_FIFO;
-- Primary Clock is asynchronous to Secondary Clock therfore
-- instantiate an async fifo.
GEN_ASYNC_FIFO : if C_PRMRY_IS_ACLK_ASYNC = 1 generate
ATTRIBUTE async_reg : STRING;
signal s2mm_stop_reg : std_logic := '0'; -- CR605883
signal p_s2mm_stop_d1_cdc_tig : std_logic := '0';
signal p_s2mm_stop_d2 : std_logic := '0';
signal p_s2mm_stop_d3 : std_logic := '0';
signal p_s2mm_stop_re : std_logic := '0';
--ATTRIBUTE async_reg OF p_s2mm_stop_d1_cdc_tig : SIGNAL IS "true";
--ATTRIBUTE async_reg OF p_s2mm_stop_d2 : SIGNAL IS "true";
begin
-- Generate Asynchronous FIFO
I_STSSTRM_FIFO : entity axi_dma_v7_1_10.axi_dma_afifo_autord
generic map(
C_DWIDTH => C_S_AXIS_S2MM_STS_TDATA_WIDTH + 1 ,
-- C_DEPTH => STSSTRM_FIFO_DEPTH ,
-- C_CNT_WIDTH => STSSTRM_FIFO_CNT_WIDTH ,
C_DEPTH => 15 ,
C_CNT_WIDTH => 4 ,
C_USE_BLKMEM => USE_LOGIC_FIFOS ,
C_FAMILY => C_FAMILY
)
port map(
-- Inputs
AFIFO_Ainit => fifo_sinit ,
AFIFO_Wr_clk => axi_prmry_aclk ,
AFIFO_Wr_en => fifo_wren ,
AFIFO_Din => fifo_din ,
AFIFO_Rd_clk => m_axi_sg_aclk ,
AFIFO_Rd_en => stsstrm_fifo_rden ,
AFIFO_Clr_Rd_Data_Valid => '0' ,
-- Outputs
AFIFO_DValid => open ,
AFIFO_Dout => stsstrm_fifo_dout ,
AFIFO_Full => fifo_full ,
AFIFO_Empty => stsstrm_fifo_empty ,
AFIFO_Almost_full => open ,
AFIFO_Almost_empty => open ,
AFIFO_Wr_count => open ,
AFIFO_Rd_count => open ,
AFIFO_Corr_Rd_count => open ,
AFIFO_Corr_Rd_count_minus1 => open ,
AFIFO_Rd_ack => open
);
fifo_sinit <= not p_reset_n;
fifo_din <= sts_tlast & sts_tdata;
fifo_wren <= sts_tvalid -- valid data
and not fifo_full -- fifo has room
and not rxlength_valid_trdy --rxlength_valid_cdc_from -- not holding a valid length
and not mask_tag_write; -- not masking off tag word
sts_tready <= not fifo_sinit and not fifo_full and not rxlength_valid_trdy; --rxlength_valid_cdc_from;
-- CR565502 - particular throttle condition caused masking of tag write to not occur
-- simplified logic will provide more robust handling of tag write mask
-- -- Create register delay of status tvalid in order to create a
-- -- rising edge pulse. note xx_re signal will hold at 1 if
-- -- fifo full on rising edge of tvalid.
-- REG_TVALID : process(axi_prmry_aclk)
-- begin
-- if(axi_prmry_aclk'EVENT and axi_prmry_aclk = '1')then
-- if(m_axi_sg_aresetn = '0')then
-- sts_tvalid_d1 <= '0';
-- elsif(fifo_full = '0')then
-- sts_tvalid_d1 <= sts_tvalid;
-- end if;
-- end if;
-- end process REG_TVALID;
-- -- rising edge on tvalid used to gate off status tag from being
-- -- writen into fifo.
-- sts_tvalid_re <= sts_tvalid and not sts_tvalid_d1;
REG_TAG_STRIPPED : process(axi_prmry_aclk)
begin
if(axi_prmry_aclk'EVENT and axi_prmry_aclk = '1')then
if(p_reset_n = '0')then
tag_stripped <= '0';
-- Reset on write of last word
elsif(fifo_wren = '1' and sts_tlast = '1')then
tag_stripped <= '0';
-- Set on beginning of new status stream
elsif(sts_tready = '1' and sts_tvalid = '1')then
tag_stripped <= '1';
end if;
end if;
end process REG_TAG_STRIPPED;
-- CR565502 - particular throttle condition caused masking of tag write to not occur
-- simplified logic will provide more robust handling of tag write mask
-- REG_MASK_TAG : process(axi_prmry_aclk)
-- begin
-- if(axi_prmry_aclk'EVENT and axi_prmry_aclk = '1')then
-- if(m_axi_sg_aresetn = '0')then
-- mask_tag_hold <= '0';
-- elsif(tag_stripped = '1')then
-- mask_tag_hold <= '0';
--
-- elsif(sts_tvalid_re = '1'
-- or (fifo_wren = '1' and sts_tlast = '1'))then
-- mask_tag_hold <= '1';
-- end if;
-- end if;
-- end process;
--
-- -- Mask TAG if not already masked and rising edge of tvalid
-- mask_tag_write <= not tag_stripped and (sts_tvalid_re or mask_tag_hold);
mask_tag_write <= not tag_stripped and sts_tready and sts_tvalid;
-- Generate logic to capture receive length when Use Receive Length is
-- enabled
GEN_STS_APP_LENGTH : if C_SG_USE_STSAPP_LENGTH = 1 generate
signal rxlength_clr_d1_cdc_tig : std_logic := '0';
signal rxlength_clr_d2 : std_logic := '0';
signal rxlength_d1_cdc_to : std_logic_vector(C_SG_LENGTH_WIDTH-1 downto 0) := (others => '0');
signal rxlength_d2 : std_logic_vector(C_SG_LENGTH_WIDTH-1 downto 0) := (others => '0');
signal rxlength_valid_d1_cdc_to : std_logic := '0';
signal rxlength_valid_d2_cdc_from : std_logic := '0';
signal rxlength_valid_d3 : std_logic := '0';
signal rxlength_valid_d4 : std_logic := '0';
signal rxlength_valid_d1_back_cdc_to, rxlength_valid_d2_back : std_logic := '0';
ATTRIBUTE async_reg : STRING;
--ATTRIBUTE async_reg OF rxlength_d1_cdc_to : SIGNAL IS "true";
--ATTRIBUTE async_reg OF rxlength_d2 : SIGNAL IS "true";
--ATTRIBUTE async_reg OF rxlength_valid_d1_cdc_to : SIGNAL IS "true";
--ATTRIBUTE async_reg OF rxlength_valid_d1_back_cdc_to : SIGNAL IS "true";
--ATTRIBUTE async_reg OF rxlength_valid_d2_back : SIGNAL IS "true";
begin
-- Double register from secondary clock domain to primary
S2P_CLK_CROSS : entity lib_cdc_v1_0_2.cdc_sync
generic map (
C_CDC_TYPE => 1,
C_RESET_STATE => 0,
C_SINGLE_BIT => 1,
C_VECTOR_WIDTH => 32,
C_MTBF_STAGES => MTBF_STAGES
)
port map (
prmry_aclk => '0',
prmry_resetn => '0',
prmry_in => s2mm_rxlength_clr,
prmry_vect_in => (others => '0'),
scndry_aclk => axi_prmry_aclk,
scndry_resetn => '0',
scndry_out => rxlength_clr_d2,
scndry_vect_out => open
);
-- S2P_CLK_CROSS : process(axi_prmry_aclk)
-- begin
-- if(axi_prmry_aclk'EVENT and axi_prmry_aclk = '1')then
-- if(p_reset_n = '0')then
-- rxlength_clr_d1_cdc_tig <= '0';
-- rxlength_clr_d2 <= '0';
-- else
-- rxlength_clr_d1_cdc_tig <= s2mm_rxlength_clr;
-- rxlength_clr_d2 <= rxlength_clr_d1_cdc_tig;
-- end if;
-- end if;
-- end process S2P_CLK_CROSS;
-- Register receive length on assertion of last and valid
-- Mark rxlength as valid for higher processes
TRDY_RXLENGTH : process(axi_prmry_aclk)
begin
if(axi_prmry_aclk'EVENT and axi_prmry_aclk = '1')then
if(p_reset_n = '0' or rxlength_clr_d2 = '1')then
rxlength_valid_trdy <= '0';
elsif(sts_tlast = '1' and sts_tvalid = '1' and sts_tready = '1')then
rxlength_valid_trdy <= '1';
end if;
end if;
end process TRDY_RXLENGTH;
REG_RXLENGTH : process(axi_prmry_aclk)
begin
if(axi_prmry_aclk'EVENT and axi_prmry_aclk = '1')then
if(p_reset_n = '0') then -- or rxlength_clr_d2 = '1')then
rxlength_cdc_from <= (others => '0');
rxlength_valid_cdc_from <= '0';
elsif(sts_tlast = '1' and sts_tvalid = '1' and sts_tready = '1')then
rxlength_cdc_from <= sts_tdata(C_SG_LENGTH_WIDTH-1 downto 0);
rxlength_valid_cdc_from <= '1';
elsif (rxlength_valid_d2_back = '1') then
rxlength_valid_cdc_from <= '0';
end if;
end if;
end process REG_RXLENGTH;
SYNC_RXLENGTH : entity lib_cdc_v1_0_2.cdc_sync
generic map (
C_CDC_TYPE => 1,
C_RESET_STATE => 0,
C_SINGLE_BIT => 1,
C_VECTOR_WIDTH => 32,
C_MTBF_STAGES => MTBF_STAGES
)
port map (
prmry_aclk => '0',
prmry_resetn => '0',
prmry_in => rxlength_valid_d2_cdc_from,
prmry_vect_in => (others => '0'),
scndry_aclk => axi_prmry_aclk,
scndry_resetn => '0',
scndry_out => rxlength_valid_d2_back,
scndry_vect_out => open
);
-- SYNC_RXLENGTH : process(axi_prmry_aclk)
-- begin
-- if(axi_prmry_aclk'EVENT and axi_prmry_aclk = '1')then
-- if(p_reset_n = '0') then -- or rxlength_clr_d2 = '1')then
--
-- rxlength_valid_d1_back_cdc_to <= '0';
-- rxlength_valid_d2_back <= '0';
-- else
-- rxlength_valid_d1_back_cdc_to <= rxlength_valid_d2_cdc_from;
-- rxlength_valid_d2_back <= rxlength_valid_d1_back_cdc_to;
--
-- end if;
-- end if;
-- end process SYNC_RXLENGTH;
-- Double register from primary clock domain to secondary
P2S_CLK_CROSS : entity lib_cdc_v1_0_2.cdc_sync
generic map (
C_CDC_TYPE => 1,
C_RESET_STATE => 0,
C_SINGLE_BIT => 1,
C_VECTOR_WIDTH => 32,
C_MTBF_STAGES => MTBF_STAGES
)
port map (
prmry_aclk => '0',
prmry_resetn => '0',
prmry_in => rxlength_valid_cdc_from,
prmry_vect_in => (others => '0'),
scndry_aclk => m_axi_sg_aclk,
scndry_resetn => '0',
scndry_out => rxlength_valid_d2_cdc_from,
scndry_vect_out => open
);
P2S_CLK_CROSS2 : entity lib_cdc_v1_0_2.cdc_sync
generic map (
C_CDC_TYPE => 1,
C_RESET_STATE => 0,
C_SINGLE_BIT => 0,
C_VECTOR_WIDTH => C_SG_LENGTH_WIDTH,
C_MTBF_STAGES => MTBF_STAGES
)
port map (
prmry_aclk => '0',
prmry_resetn => '0',
prmry_in => '0',
prmry_vect_in => rxlength_cdc_from,
scndry_aclk => m_axi_sg_aclk,
scndry_resetn => '0',
scndry_out => open,
scndry_vect_out => rxlength_d2
);
P2S_CLK_CROSS1 : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0') then -- or s2mm_rxlength_clr = '1') then
-- rxlength_d1_cdc_to <= (others => '0');
-- rxlength_d2 <= (others => '0');
-- rxlength_valid_d1_cdc_to <= '0';
-- rxlength_valid_d2_cdc_from <= '0';
rxlength_valid_d3 <= '0';
else
-- rxlength_d1_cdc_to <= rxlength_cdc_from;
-- rxlength_d2 <= rxlength_d1_cdc_to;
-- rxlength_valid_d1_cdc_to <= rxlength_valid_cdc_from;
-- rxlength_valid_d2_cdc_from <= rxlength_valid_d1_cdc_to;
rxlength_valid_d3 <= rxlength_valid_d2_cdc_from;
end if;
end if;
end process P2S_CLK_CROSS1;
process (m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0' or s2mm_rxlength_clr = '1')then
rxlength_valid_d4 <= '0';
elsif (rxlength_valid_d3 = '1' and rxlength_valid_d2_cdc_from = '0') then
rxlength_valid_d4 <= '1';
end if;
end if;
end process;
s2mm_rxlength <= rxlength_d2;
-- s2mm_rxlength_valid <= rxlength_valid_d2;
s2mm_rxlength_valid <= rxlength_valid_d4;
end generate GEN_STS_APP_LENGTH;
-- Do NOT generate logic to capture receive length when option disabled
GEN_NO_STS_APP_LENGTH : if C_SG_USE_STSAPP_LENGTH = 0 generate
s2mm_rxlength_valid <= '0';
s2mm_rxlength <= (others => '0');
end generate GEN_NO_STS_APP_LENGTH;
-- CR605883
-- Register stop to provide pure FF output for synchronizer
REG_STOP : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
s2mm_stop_reg <= '0';
else
s2mm_stop_reg <= s2mm_stop;
end if;
end if;
end process REG_STOP;
-- double register s2mm error into primary clock domain
REG_ERR2PRMRY : entity lib_cdc_v1_0_2.cdc_sync
generic map (
C_CDC_TYPE => 1,
C_RESET_STATE => 0,
C_SINGLE_BIT => 1,
C_VECTOR_WIDTH => 32,
C_MTBF_STAGES => MTBF_STAGES
)
port map (
prmry_aclk => '0',
prmry_resetn => '0',
prmry_in => s2mm_stop_reg,
prmry_vect_in => (others => '0'),
scndry_aclk => axi_prmry_aclk,
scndry_resetn => '0',
scndry_out => p_s2mm_stop_d2,
scndry_vect_out => open
);
REG_ERR2PRMRY1 : process(axi_prmry_aclk)
begin
if(axi_prmry_aclk'EVENT and axi_prmry_aclk = '1')then
if(p_reset_n = '0')then
-- p_s2mm_stop_d1_cdc_tig <= '0';
-- p_s2mm_stop_d2 <= '0';
p_s2mm_stop_d3 <= '0';
else
--p_s2mm_stop_d1_cdc_tig <= s2mm_stop; -- CR605883
-- p_s2mm_stop_d1_cdc_tig <= s2mm_stop_reg;
-- p_s2mm_stop_d2 <= p_s2mm_stop_d1_cdc_tig;
p_s2mm_stop_d3 <= p_s2mm_stop_d2;
end if;
end if;
end process REG_ERR2PRMRY1;
p_s2mm_stop_re <= p_s2mm_stop_d2 and not p_s2mm_stop_d3;
skid_rst <= not p_reset_n;
---------------------------------------------------------------------------
-- Buffer AXI Signals
---------------------------------------------------------------------------
STS_SKID_BUF_I : entity axi_dma_v7_1_10.axi_dma_skid_buf
generic map(
C_WDATA_WIDTH => C_S_AXIS_S2MM_STS_TDATA_WIDTH
)
port map(
-- System Ports
ACLK => axi_prmry_aclk ,
ARST => skid_rst ,
skid_stop => p_s2mm_stop_re ,
-- Slave Side (Stream Data Input)
S_VALID => s_axis_s2mm_sts_tvalid ,
S_READY => s_axis_s2mm_sts_tready ,
S_Data => s_axis_s2mm_sts_tdata ,
S_STRB => s_axis_s2mm_sts_tkeep ,
S_Last => s_axis_s2mm_sts_tlast ,
-- Master Side (Stream Data Output
M_VALID => sts_tvalid ,
M_READY => sts_tready ,
M_Data => sts_tdata ,
M_STRB => sts_tkeep ,
M_Last => sts_tlast
);
end generate GEN_ASYNC_FIFO;
end implementation;
| mit | 5fecdc6bdfa42fc83fa034592e6f9650 | 0.447003 | 3.998336 | false | false | false | false |
sergeykhbr/riscv_vhdl | vhdl/rtl/techmap/mem/syncram_2p_tech.vhd | 1 | 2,034 | -----------------------------------------------------------------------------
--! @file
--! @copyright Copyright 2015 GNSS Sensor Ltd. All right reserved.
--! @author Sergey Khabarov - [email protected]
--! @brief Technology specific dual-port RAM.
------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
library commonlib;
use commonlib.types_common.all;
library techmap;
use techmap.gencomp.all;
use techmap.types_mem.all;
entity syncram_2p_tech is
generic (
tech : integer := 0;
abits : integer := 6;
dbits : integer := 8;
sepclk : integer := 0;
wrfst : integer := 0;
testen : integer := 0;
words : integer := 0;
custombits : integer := 1
);
port (
rclk : in std_ulogic;
renable : in std_ulogic;
raddress : in std_logic_vector((abits -1) downto 0);
dataout : out std_logic_vector((dbits -1) downto 0);
wclk : in std_ulogic;
write : in std_ulogic;
waddress : in std_logic_vector((abits -1) downto 0);
datain : in std_logic_vector((dbits -1) downto 0)
);
end;
architecture rtl of syncram_2p_tech is
component syncram_2p_inferred is
generic (
abits : integer := 8;
dbits : integer := 32;
sepclk: integer := 0
);
port (
rclk : in std_ulogic;
wclk : in std_ulogic;
rdaddress: in std_logic_vector (abits -1 downto 0);
wraddress: in std_logic_vector (abits -1 downto 0);
data: in std_logic_vector (dbits -1 downto 0);
wren : in std_ulogic;
q: out std_logic_vector (dbits -1 downto 0)
);
end component;
begin
inf : if tech = inferred generate
x0 : syncram_2p_inferred generic map (abits, dbits, sepclk)
port map (rclk, wclk, raddress, waddress, datain, write, dataout);
end generate;
xilinx6 : if tech = virtex6 or tech = kintex7 generate
x0 : syncram_2p_inferred generic map (abits, dbits, sepclk)
port map (rclk, wclk, raddress, waddress, datain, write, dataout);
end generate;
end;
| apache-2.0 | dd067df7a44fd1f659370f72aec05296 | 0.592429 | 3.766667 | false | false | false | false |
mharndt/profibusmonitor | VHDL_Bausteine_old/abandoned_code/Rueckfallposition_19_12_2012/TEST2_SRAM_25MHZ_255_BYTE/SRAM_25MHZ_255_BYTE.vhd | 10 | 13,687 | -- SRAM_25MHZ_255_BYTE
-- beschreibt/liest den SRAM des Spartan 3
-- Ersteller: Martin Harndt
-- Erstellt: 30.11.2012
-- Bearbeiter: mharndt
-- Geaendert: 13.12.2012
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity SRAM_25MHZ_255_BYTE is
Port ( GO : in std_logic;
COUNT_ADR_OUT : out std_logic_vector(18 downto 0); --Ausgabe Adresse, 19 Byte
COUNT_DAT_INOUT : inout std_logic_vector(15 downto 0); --Ausgabe gespeicherte Daten, 16 Byte
DISPL_ADR : in std_logic; -- umschalten zwischen aktuellen Zustand und Adresse
DISPL_DAT : in std_logic; -- umschalten zwischen Folgeszustand und Daten
WE : out std_logic; -- Write Enable
OE : out std_logic; -- Output Enable
CE1 : out std_logic; -- Chip Enable
UB1 : out std_logic; -- Upper Byte Enable
LB1 : out std_logic; -- Lower Byte Enable
STOP : out std_logic; -- zum Anzeigen von STOP
PLUS : in std_logic; -- Adresszähler +1
MINUS : in std_logic; -- Adresszähler -1
CLK : in std_logic; --Taktvariable
CLK_IO : in std_logic; --Tanktvariable,
--Ein- und Ausgangsregister
IN_NEXT_STATE : in std_logic; --1:Zustandsuebergang möglich
RESET : in std_logic; --1: Initialzustand annehmen
DISPL1_SV : out std_logic_vector (3 downto 0); --aktueller Zustand Zahl1, binärzahl
DISPL2_SV : out std_logic_vector (3 downto 0); --aktueller Zustand Zahl2, binärzahl
DISPL1_n_SV : out std_logic_vector (3 downto 0); --Folgezustand Zahl1, binärzahl
DISPL2_n_SV : out std_logic_vector (3 downto 0)); --Folgezustand Zahl2, binärzahl
end SRAM_25MHZ_255_BYTE;
architecture Behavioral of SRAM_25MHZ_255_BYTE is
type TYPE_STATE is
(ST_RAM_00, --Zustaende
ST_RAM_01,
ST_RAM_02,
ST_RAM_03,
ST_RAM_04,
ST_RAM_05,
ST_RAM_06,
ST_RAM_07,
ST_RAM_08,
ST_RAM_09);
signal SV : TYPE_STATE; --Zustandsvariable
signal n_SV: TYPE_STATE; --Zustandsvariable, neuer Wert
signal SV_M: TYPE_STATE; --Zustandsvariable, Ausgang Master
signal not_CLK : std_logic; --negierte Taktvariable
signal not_CLK_IO: std_logic; --negierte Taktvariable
--Ein- und Ausgangsregister
signal GO_S : std_logic; --Eingangsvariable, --Zwischengespeichert im Eingangsregister
signal PLUS_S : std_logic; --Eingangsvariable, Zwischengespeichert im Eingangsregister
signal MINUS_S : std_logic; --Eingangsvariable, --Zwischengespeichert im Eingangsregister
signal COUNT_ADR : std_logic_vector(18 downto 0); --Adresszaehler, Vektor, 19 bit
signal n_COUNT_ADR : std_logic_vector(18 downto 0); --Adresszaehler, neuer Wert, Vektor, 19 bit
signal COUNT_ADR_M : std_logic_vector(18 downto 0); --Adresszaehler, Ausgang Master, Vektor, 19 bit
signal COUNT_DAT : std_logic_vector(15 downto 0); --Datenzaehler, Vektor, 15 bit
signal n_COUNT_DAT : std_logic_vector(15 downto 0); --Datenzaehler, neuer Wert, Vektor, 15 bit
signal COUNT_DAT_M : std_logic_vector(15 downto 0); --Datenzaehler, Ausgang Master, Vektor, 15 bit
signal DISPL_STATE_SV : std_logic_vector (7 downto 0); -- aktueller Zustand in 8 Bit, binär
signal DISPL_STATE_n_SV : std_logic_vector (7 downto 0); -- Folgezustand in 8 Bit, binär
signal COUNT_DAT_INPUT : std_logic_vector(15 downto 0); -- Dateninput
signal WRITE_M : std_logic; --Schreibanzeiger, Ausgang Master, (1=schreiben)
signal n_WRITE : std_logic; --Schreibanzeiger, neuer Wert
begin
NOT_CLK_PROC: process (CLK) --negieren Taktvariable
begin
not_CLK <= not CLK;
end process;
NOT_CLK_IO_PROC: process (CLK_IO) --negieren Taktvaraiable, Ein- und Ausgangsregister
begin
not_CLK_IO <= not CLK_IO;
end process;
IREG_PROC: process (GO, GO_S, not_CLK_IO, PLUS, PLUS_S, MINUS, MINUS_S) --Eingangsregister
begin
if (not_CLK_IO'event and not_CLK_IO = '1') --Eingangsregister
then GO_S <= GO;
PLUS_S <= PLUS;
MINUS_S <= MINUS;
end if;
end process;
SREG_M_PROC: process (RESET, n_SV, CLK) --Master
begin
if (RESET ='1')
then SV_M <= ST_RAM_00;
WRITE_M <= '0';
else
if (CLK'event and CLK = '1')
then
if (IN_NEXT_STATE = '1')
then SV_M <= n_SV;
COUNT_ADR_M <= n_COUNT_ADR;
COUNT_DAT_M <= n_COUNT_DAT;
WRITE_M <= n_WRITE;
else SV_M <= SV_M;
COUNT_ADR_M <= COUNT_ADR_M;
COUNT_DAT_M <= COUNT_DAT_M;
WRITE_M <= WRITE_M;
end if;
end if;
end if;
end process;
SREG_S_PROC: process (RESET, SV_M, not_CLK) --Slave
begin
if (RESET = '1')
then SV <= ST_RAM_00;
else
if (not_CLK'event and not_CLK = '1')
then SV <= SV_M;
COUNT_ADR <= COUNT_ADR_M;
COUNT_DAT <= COUNT_DAT_M;
end if;
end if;
end process;
IL_OL_PROC: process (GO_S, SV, COUNT_ADR, COUNT_DAT, PLUS_S, MINUS_S, COUNT_DAT_INPUT)
begin
--setze fuer alle Zustaende
n_WRITE <= '0'; --kein Schreiben
UB1 <= '0'; --Upper Byte Ein (0=Ein 1=Aus)
LB1 <= '0'; --Lower Byte Ein (0=Ein 1=Aus)
case SV is
when ST_RAM_00 =>
if (GO_S = '1')
then
-- RAM01
n_COUNT_ADR <= b"0000000000000000000"; -- Adress Zaehler Neustart
n_COUNT_DAT <= b"1111111111111111"; -- Daten Zaehler Neustart
WE <= '1'; --Aus (0=Ein 1=Aus) 0
OE <= '1'; --Aus (0=Ein 1=Aus)
CE1 <= '1'; --Aus (0=Ein 1=Aus)
STOP <= '0'; -- Aus(0=Aus 1=Ein)
n_SV <= ST_RAM_01; -- Zustandsuebgergang
else
--RAM00
n_COUNT_ADR <= b"0000000000000000000"; -- Adress Zaehler Neustart
n_COUNT_DAT <= b"1111111111111111"; -- Daten Zaehler Neustart
WE <= '1'; --Aus 0
OE <= '1'; --Aus
CE1 <= '0'; --Ein
STOP <= '0'; --Aus
n_SV <= ST_RAM_00; -- GO = '0'
end if;
when ST_RAM_01 =>
-- RAM02
n_COUNT_ADR <= COUNT_ADR; -- Wert bleibt gleich
n_COUNT_DAT <= COUNT_DAT; -- Wert bleibt gleich
WE <= '0'; --Ein
OE <= '1'; --Aus
CE1 <= '0'; --Ein
STOP <= '0'; --Aus
n_WRITE <= '1'; --schreiben
n_SV <= ST_RAM_02; -- Zustandsuebgergang
when ST_RAM_02 =>
if (COUNT_ADR = b"1111111111111111111")
then
-- RAM05
n_COUNT_ADR <= COUNT_ADR; -- Wert bleibt gleich
n_COUNT_DAT <= COUNT_DAT; -- Wert bleibt gleich
WE <= '1'; --Aus (0=Ein 1=Aus)
OE <= '1'; --Aus (0=Ein 1=Aus)
CE1 <= '0'; --Ein (0=Ein 1=Aus)
STOP <= '0'; -- Aus(0=Aus 1=Ein)
n_SV <= ST_RAM_03; -- COUNT_ADR < FF
else
--RAM03
n_COUNT_ADR <= COUNT_ADR+1; -- Adress Zaehler inkrementieren
n_COUNT_DAT <= COUNT_DAT-1; -- Daten Zaehler dekrementieren
WE <= '1'; --Aus
OE <= '1'; --Aus
CE1 <= '0'; --Ein
STOP <= '0'; --Aus
n_SV <= ST_RAM_04; -- COUNT_ADR = FF
end if;
when ST_RAM_03 =>
if (GO_S = '0')
then
-- RAM06
n_COUNT_ADR <= b"0000000000000000000"; -- Wert wird null
n_COUNT_DAT <= COUNT_DAT; -- Wert bleibt gleich
WE <= '1'; --Aus (0=Ein 1=Aus)
OE <= '1'; --Aus (0=Ein 1=Aus)
CE1 <= '0'; --Ein (0=Ein 1=Aus)
STOP <= '1'; -- Ein(0=Aus 1=Ein)
n_SV <= ST_RAM_05; -- GO_S ='0'
else
--RAM05
n_COUNT_ADR <= COUNT_ADR; -- Wert bleibt gleich
n_COUNT_DAT <= COUNT_DAT; -- Wert bleibt gleich
WE <= '1'; --Aus
OE <= '1'; --Aus
CE1 <= '0'; --Ein
STOP <= '0'; --Aus
n_SV <= ST_RAM_03; -- GO_S ='1'
end if;
when ST_RAM_04 =>
-- RAM04
n_COUNT_ADR <= COUNT_ADR; -- Wert bleibt gleich
n_COUNT_DAT <= COUNT_DAT; -- Wert bleibt gleich
WE <= '1'; --Aus (0=Ein 1=Aus)
OE <= '1'; --Aus (0=Ein 1=Aus)
CE1 <= '0'; --Ein (0=Ein 1=Aus)
STOP <= '0'; -- Aus(0=Aus 1=Ein)
n_SV <= ST_RAM_01; -- Zustandsübergang
when ST_RAM_05 =>
if (GO_S = '0')
then
-- RAM08
n_COUNT_ADR <= COUNT_ADR; -- Wert bleibt gleich
n_COUNT_DAT <= COUNT_DAT; -- Wert bleibt gleich
WE <= '1'; --Aus (0=Ein 1=Aus)
OE <= '0'; --Ein (0=Ein 1=Aus)
CE1 <= '0'; --Ein (0=Ein 1=Aus)
STOP <= '1'; -- Ein(0=Aus 1=Ein)
n_SV <= ST_RAM_06; -- GO_S ='0'
else
--RAM07
n_COUNT_ADR <= COUNT_ADR; -- Wert bleibt gleich
n_COUNT_DAT <= COUNT_DAT; -- Wert bleibt gleich
WE <= '1'; --Aus
OE <= '0'; --Ein
CE1 <= '0'; --Ein
STOP <= '1'; --Ein
n_SV <= ST_RAM_00; -- GO_S ='1'
end if;
when ST_RAM_06 =>
if (PLUS_S = '1')
then
-- RAM09
n_COUNT_ADR <= COUNT_ADR+1; -- Wert wird erhöht
n_COUNT_DAT <= COUNT_DAT_INPUT; --Daten einlesen
WE <= '1'; --Aus (0=Ein 1=Aus)
OE <= '0'; --Ein (0=Ein 1=Aus)
CE1 <= '0'; --Ein (0=Ein 1=Aus)
STOP <= '0'; -- Aus(0=Aus 1=Ein)
n_SV <= ST_RAM_07; -- PLUS_S ='1'
else
--RAM11
n_COUNT_ADR <= COUNT_ADR; -- Wert bleibt gleich
n_COUNT_DAT <= COUNT_DAT; -- Wert bleibt gleich
WE <= '1'; --Aus
OE <= '0'; --Ein
CE1 <= '0'; --Ein
STOP <= '1'; --Ein
n_SV <= ST_RAM_08; -- PLUS_S ='0'
end if;
when ST_RAM_07 =>
if (PLUS_S = '0')
then
-- RAM14
n_COUNT_ADR <= COUNT_ADR; -- Wert bleibt gleich
n_COUNT_DAT <= COUNT_DAT; -- Wert bleibt gleich
WE <= '1'; --Aus (0=Ein 1=Aus)
OE <= '0'; --Ein (0=Ein 1=Aus)
CE1 <= '0'; --Ein (0=Ein 1=Aus)
STOP <= '1'; -- Ein(0=Aus 1=Ein)
n_SV <= ST_RAM_05; -- PLUS_S ='0'
else
--RAM10
n_COUNT_ADR <= COUNT_ADR; -- Wert bleibt gleich
n_COUNT_DAT <= COUNT_DAT_INPUT; -- DATEN einlesen
WE <= '1'; --Aus
OE <= '0'; --Ein
CE1 <= '0'; --Ein
STOP <= '0'; --Aus
n_SV <= ST_RAM_07; -- PLUS_S ='1'
end if;
when ST_RAM_08 =>
if (MINUS_S = '1')
then
--RAM12
n_COUNT_ADR <= COUNT_ADR-1; -- Wert wird verringert
n_COUNT_DAT <= COUNT_DAT_INPUT; -- Daten einlesen
WE <= '1'; --Aus
OE <= '0'; --Ein
CE1 <= '0'; --Ein
STOP <= '0'; --Aus
n_SV <= ST_RAM_09; -- MINUS_S ='1'
else
-- RAM14
n_COUNT_ADR <= COUNT_ADR; -- Wert bleibt gleich
n_COUNT_DAT <= COUNT_DAT; -- Wert bleibt gleich
WE <= '1'; --Aus (0=Ein 1=Aus)
OE <= '0'; --Ein (0=Ein 1=Aus)
CE1 <= '0'; --Ein (0=Ein 1=Aus)
STOP <= '1'; -- Ein(0=Aus 1=Ein)
n_SV <= ST_RAM_05; -- PLUS_S ='0'
end if;
when ST_RAM_09 =>
if (MINUS_S = '0')
then
-- RAM14
n_COUNT_ADR <= COUNT_ADR; -- Wert bleibt gleich
n_COUNT_DAT <= COUNT_DAT; -- Wert bleibt gleich
WE <= '1'; --Aus (0=Ein 1=Aus)
OE <= '0'; --Ein (0=Ein 1=Aus)
CE1 <= '0'; --Ein (0=Ein 1=Aus)
STOP <= '1'; -- Ein(0=Aus 1=Ein)
n_SV <= ST_RAM_05; -- PLUS_S ='0'
else
--RAM13
n_COUNT_ADR <= COUNT_ADR; -- Wert bleibt gleich
n_COUNT_DAT <= COUNT_DAT_INPUT; -- Daten einlesen
WE <= '1'; --Aus
OE <= '0'; --Ein
CE1 <= '0'; --Ein
STOP <= '0'; --Aus
n_SV <= ST_RAM_09; -- MINUS_S ='1'
end if;
when others =>
-- RAM00
n_COUNT_ADR <= b"0000000000000000000"; -- Adress Zaehler Neustart
n_COUNT_DAT <= b"1111111111111111"; -- Daten Zaehler Neustart
WE <= '1'; --Aus
OE <= '1'; --Aus
CE1 <= '1'; --Aus
STOP <= '0'; --Aus
n_SV <= ST_RAM_00;
end case;
end process;
STATE_DISPL_PROC: process (SV, n_SV, DISPL_STATE_SV, DISPL_STATE_n_SV, DISPL_ADR, DISPL_DAT, COUNT_ADR, COUNT_DAT) -- Zustandsanzeige
begin
DISPL_STATE_SV <= conv_std_logic_vector(TYPE_STATE'pos( SV),8); --Zustandsumwandlung in 8 Bit
DISPL_STATE_n_SV <= conv_std_logic_vector(TYPE_STATE'pos(n_SV),8);
if (DISPL_ADR = '0')
then
-- Aktuellen Zustand anzeigen
DISPL1_SV(0) <= DISPL_STATE_SV(0); --Bit0
DISPL1_SV(1) <= DISPL_STATE_SV(1); --Bit1
DISPL1_SV(2) <= DISPL_STATE_SV(2); --Bit2
DISPL1_SV(3) <= DISPL_STATE_SV(3); --Bit3
DISPL2_SV(0) <= DISPL_STATE_SV(4); --usw.
DISPL2_SV(1) <= DISPL_STATE_SV(5);
DISPL2_SV(2) <= DISPL_STATE_SV(6);
DISPL2_SV(3) <= DISPL_STATE_SV(7);
else
-- Adresse anzeigen (erste 8 Bit)
DISPL1_SV(0) <= COUNT_ADR(0); --Bit0
DISPL1_SV(1) <= COUNT_ADR(1); --Bit1
DISPL1_SV(2) <= COUNT_ADR(2); --Bit2
DISPL1_SV(3) <= COUNT_ADR(3); --Bit3
DISPL2_SV(0) <= COUNT_ADR(4); --usw.
DISPL2_SV(1) <= COUNT_ADR(5);
DISPL2_SV(2) <= COUNT_ADR(6);
DISPL2_SV(3) <= COUNT_ADR(7);
end if;
if (DISPL_DAT = '0')
then
-- Folgezustand anzeigen
DISPL1_n_SV(0) <= DISPL_STATE_n_SV(0);
DISPL1_n_SV(1) <= DISPL_STATE_n_SV(1);
DISPL1_n_SV(2) <= DISPL_STATE_n_SV(2);
DISPL1_n_SV(3) <= DISPL_STATE_n_SV(3);
DISPL2_n_SV(0) <= DISPL_STATE_n_SV(4);
DISPL2_n_SV(1) <= DISPL_STATE_n_SV(5);
DISPL2_n_SV(2) <= DISPL_STATE_n_SV(6);
DISPL2_n_SV(3) <= DISPL_STATE_n_SV(7);
else
--Daten anzeigen (erste 8 Bit)
DISPL1_n_SV(0) <= COUNT_DAT(0);
DISPL1_n_SV(1) <= COUNT_DAT(1);
DISPL1_n_SV(2) <= COUNT_DAT(2);
DISPL1_n_SV(3) <= COUNT_DAT(3);
DISPL2_n_SV(0) <= COUNT_DAT(4);
DISPL2_n_SV(1) <= COUNT_DAT(5);
DISPL2_n_SV(2) <= COUNT_DAT(6);
DISPL2_n_SV(3) <= COUNT_DAT(7);
end if;
end process;
-- Adressen Output
COUNT_ADR_OUT <= n_COUNT_ADR;
-- Daten lesen
COUNT_DAT_INPUT <= COUNT_DAT_INOUT;
-- Daten schreiben
-- Tri-State Buffer control
COUNT_DAT_INOUT <= n_COUNT_DAT when WRITE_M = '1' else (others=>'Z'); --geht nicht in einem Prozess weil Fehler
end Behavioral;
| gpl-2.0 | 9a01be0cfb951bca6cfac1c221e870d9 | 0.548696 | 2.906562 | false | false | false | false |
szanni/aeshw | zybo-base/zybo_bsd/zybo_bsd.srcs/sources_1/bd/system/ip/system_auto_pc_5/fifo_generator_v11_0/ramfifo/bram_sync_reg.vhd | 19 | 7,904 | `protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
ISK+8BrzqbDVc2hIh4k9UuGvqsq6yFic71tfszsK7KRf52jFUoK33AosGVUYsGH1pmrUc2NUQcDQ
LseNrcojiQ==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
CxxZHetyKRTjg1ePIJzq+w/Yg+inN7g9nkhYUjpPSXav+SKIAQvdh174FZUi0SnoR2INo+rdZ3gz
yq46XymO3b/3npnRNCCU259giTvnOJxmkrtnjRyUpOg8jB2jnHg/f/BlL3OJUGGiFonBs+6rnNvW
4aiU6ycFpLQsNzqRlAw=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2013_09", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
HZ1Kttz7DNn3t428AVZ/hrbCqljpJfsdfcEo7T7pfqxl88ELioDFFp9rVcvvZiZMU++45qS8CpOD
SfwcEjOj8ndwnIsrDamIUHs+Qm4vUDDq8EtyiGhux+pwMtpg8rH6kCwLDCkdk848fWRbBOGctdAr
AiQz4Fie2ectzKGEhjERjquMNqkQkhNIuEu/CSTnyD7KnG+FK+llVBavN8lxjWeDvk+quMyk8Dbo
gA/SdzYI7TCZkNEFS/PvF3Z8fPBK4pBWz7TyfdHacMjMkaPd5zGsPBmQy77xwc4m/sfhM7ZX+YW6
VBTILiYtg7u194UVgu4fHE7f45jr0jTur9wbVw==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
2VX2NPBJC/FYSjnVp8ueqtxuxLgenRIKbrff8tdhuTb77js7o9S4OVH2n84fEyvr3hl3lrO9ekVq
VvQQOlQBg7Zv5/tFAeI5YFisgygYrqeX9dQcI485CaCpeN9nanYXhtHWROH+ZOYckBZHUhhjC82p
LnYwoausKSjsi+rXE64=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
HdQIwrCqCFDZv9OQZsva3DMtF+8TwiePvWLQndNAXK/1V46C6C4sVLdH6SK4FvPis45PZ52T91rx
x7mjaMnTgTVkK+VoFF3Ej7xzh/2PoR+YkiToyHCbvwHQXXvv3GAu3HyqWx9b4oOndnrx5Z1mco/s
lNgEY825qOfDqrTkPvvNBXThybVoOKs2SBHAdaQhQemuYVAjS7mEC/lA7vom+55/0dhIN44Q0vMz
6utkLeK9axPmrUz/LHNLm3BFQsfvacsQoIQe/Y7g5V8ehxANfnzft/Jgo74fJAU3odGS++0PsHF5
2T1joNptoFFljB/U6DScrAB2FxigoQal7I/OSA==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 4112)
`protect data_block
3u5JIWlY+sJCqsl5QYyfL8WimseQwuJN0rkH9NXcbsS7Rt71nSblODV6U80qYV7PQQBUgi7MIkr3
HhB80mVFXzhq03+IsvG1wT04pnRKUdjg8ie5ACc1KZyJzkBz1AoMYj8LIyYOfu5egdpx7hnlcrtc
oMVqdqAkXV7SfIyeRr+lT2ka1rchyxgy/De7WO04vRL9oeE9RcJ9dBv1wr0O3CTselhBxOW1zVMw
VAIAfDSqygylxQ3yBGTnNYvRqgjwbIDq9qrVv2Suz92kP9MPjiqJNh+Bl2oXJ4RpniHsbunWAgYk
u8htsKr/Y5G/lv1Dti4uvGyDQc6n4n4m6zawTfv6qfGRG+QxlxQbJYAjHfK8NQmU/rbLQnZOQzKx
nWuJgpAxqNY55zImfUi7u9EaW8P5tnNRTCHRpFTP7maxF/yrAvQ9F70ow37gmox0htVWAHNvXHEA
MaR2Qa66QB2HI8zVBb5PxU+gnQMRGAvN9l5KU5/Blpx59MEQhDT7O+YXLhbK2EzfR4lRqqfha1QW
AhaIUZst/wP34LyX4UhfHz06f2YKMiDb0gO4l4FGRFHc2GADzDMb6c4hqdK81qlPdx8J6poDvUB2
sC7kj8nETbbmIUIHZIi8aq5P3MYjn8IaaUJWzW5tkxv1m/3sbUvOlnOX8aN+xxzNhg5A67eCYnPl
QXxolZWPe5oGFtLq+lXvAMXiNqqctzS58o7H4V0i2CxOGeDyuxaniXbkq7ITVkVzRv40xeLoxXEU
9W+04qvabJokuAn4jkZhLuqcl4VXGxoZA52TdAAAmPn9jKW++X+8+vhY0RzxMu0Vr67adWElyoeS
KRvN2kQ27SUGB72x78ScS7iDnyQk6iNEqsEnPjetl099Gq1I7XGEYOeyaaoyo3swkIaZSG2VFjNh
iYxipNiUIMJLqMuSjWN54ivjYqNbQXBjQObCsWDXV3nh8KIZ++dSdunT2ynUhSR2UjzpZgwnoDcg
9xGkFkHZxXBPhSRijxySKmEfLJTcQEI631lQiuE6ryhIxxIrcfxTmB1gFvzp6e0HtbtibPkUREwm
p4nqAR+LylZ4RYG9n7rvvl91leVlYCFt4jv8W/39f4f13U9pv4ww0ujYFuTTWGyozDffyPyZZJ4i
2YSiZQQPlFauS32E+W/mY5uHRUrzoEp3vea4PWVF3vavBli3XK8QvUdqx3waVhazTXoW79aYkZmJ
VOFO2xf/VOho31aThJvRoc+weDzRNAcNskEhiNzdIkWV5GUYuYgrpmT+202q/26y7LOag7dBxvaq
UOAEEv/7HrUJYQABSp92SCGV5ypmDuQ9/qnewH30kFS6AMnOAFuQsgFO12yXxj94/5975rPM4/S5
GOr20z9K3SClkHgchek9Nwsv1VrdZQwxQJAwFuZm9MbxUjKjboRzK+UqVEwxm/h3lG39f8Q0gJx8
Uzhmnyrtgp5yINjNyia+Rl8CKySqKjczaaGFl3WFB4sadBVvm2mhWIbo+2bNMfsEKKwKxCEQv2mO
eczJmcYN+IYGoTj84AADRYxj2Fv06omM/YfF5Ru1NPBUjDDTPo94MYZ6EzEpdNNZeFWgpq5bL50Y
SLWDM/i0OvEZWcXTYIUflUnyWlkQr95fI+KRkybIqhUiS6HrFPF2vhYgmxCTx9Ukfu50aG3nvWwv
wPDPylrgtfdB+2WlN6WLPaOgyStG9I/q+Nsc/cPVnOUVvqLuPiWospfM7kiiJNvJdGPGXKzLvHZS
5Ae1hGcZ2/W6DS2l8ER1bgpxmNgIDXfuH6zNAJDkxi5mJ2GByJO7Aear+0SHaarpkNUZeQYQHXkN
SEQTgcJSpB4S4vQiSeE35/egZswX2cUnCFP6dklrrGVNstGoTv+9o8KB3Bq2cpR5x+iw2QSPqubP
le2gihRhXbs0nF8VMXcaO/kLFlvlwsJq4qJFJWe9CTMMT52Z9ZTi8+6KLfR5jFjV82NjiVK34710
mua1Mb1gHicmg/5FYXTTLOhuzcOw6PlWA7qVTzZHZSpvsOrqn4WAKzyhGEYWYYBeQVkAZWsZAL5H
mK4o654o0wEkP6dtAK0GIokI+LoMlP+yM3s/p7LqDJdneIWTQTds2aJcd4d42Tp7Euh7weSx+GZR
jOXicK7wjWiOHp+GiGXH5gsclzHXMQU2BZyAhi6RE69pHDVXibQX8PrZjUtubV9rvCwFipoUyB4Z
8cQEBQaMuqcW1hPs20qQthmYUYZd3Lxqdgfsrl0OlD8J95XV4hmbEW0A8HWjuSVFF/bVTLiqdiAk
++5FX4xCfmJZCK4NkBKgbYNrqdff90BjdYRbZ28261ILo0iPRQwhui4mSegRtLXHuQ1RZjr8jNJz
jj0Qbt8v+6JwFT2HjlHhhJFXUZJ8AKvVdbpVd+LdylJy3ZmET7N2RsshPtVsVGAPWFw0/TVatZvq
tXQRs5T5FPh9EgX72dRoz+tgehp1Um6mBzFRCF73lico0CsmoycJdbIJuXyUqsbu0tFoE5qQk50J
ZTh2BMKa3yeG1cTspvsdJhXtyXxRITt5EPfsJPcZwnc1x6bpO5TZo99nEiD/nCTxAI0iVVxeIElg
odovqadEW44FITeZUaJZKkOA4WeSDdmEal8+Dj6R0n99ThCatlUKecN5uB/GUGZVV8JZCwHXi4JV
iR0FyV4Qvm+G7B/t5z4quCCK4f1Cu+KqzBXtwup7njHPLlupZJMxFbXcmMVlOzVgWRbCZ57kGHHF
GXtFePBBaVf+SAQdo5Zda0QktuqWjk7jqlYNTQfRYVJgp5EkwnBWutkZu1ZhpQgDqkxg9tKBBwM1
F4t4Sy0ClnAWSZy/sCHSDIYNkUnVDz8dL5iuflP8UCEbrGbUCvGST4gj/997HPEAJ67r9oZqmOxr
BZK/pXWE8ZVTA3lOqaDOL+EtIv/ckgso9hl/MG6H2Xm1oeDQLiK5bDwyIpn27ALjlIOIZ3YSrF/T
b0WjPzGuW4SsFFLXZ3uz7iUQad5znJLswPYplDDZaqMsCrDhBtWvwXSuNP6gevYWrLDcpUF7Fptk
Bprgu/sRQ8vF76+HQxKTH0X4qt0i5WJcir2K2xpWZGthyb5wWQzAlMragRuvLzVyr8MzO5RaxBgq
uR9ndLhac1L3LTDZnipUS3kIDolGcfOc4PQwJAemisO3eQGb2AnDdcWHzv44g6qT//zBkVUICe27
6jStcv2rP8uum86E3k9DhaweiH0r1N9hXuIUoyjg/MP5rOY+dpK18zaWkxsW3bOTkZXuMk+Upf3D
taUWFFdC+6tESxmyv3KLcV6LeV4kK6WEwkhPHO85j4i/fWwuROZiwTdeYNwkLnHi2q5b4I91DYqt
nb3x9JYOwgwy5JTsIw41FJXp/NmELUP8QwDrC+ZPbkhsBPdMMlXWKTrSqjmEGd6tJmbZRntQE25P
FWEwGkwFDCPEcEeylDSKD/jI+EZrkQ2UWjLyXs4MN8NXLvj3PSax/9R7nhaSgxG5hsuxkUruNmdU
KdWXyc9emFHWXpj2D0Fe7Uy9HY/Tou31smCnuvjMmQ44TA53k7LC313Li86mJkXI5y4MDw/Lcc34
unut8zpab8NJiu9FFwEP77etqKEVPXIYU//Jh7cS5VQ7H4DRmXlzC8FZCMR6b/9l2PdsggFUTmvG
+Dv7fE7T7EZy6glQ/CElGd14J1yN+tctmRLKnLxC8c3Miy+FUs4n4amygDtReiwDhyYWggm8l4I5
lPAc1EoikvnZM347PDgY8T5pwwo5U2bgUAgNyV6NZgDxO+uLL9UYBx1c8eYaMqQOfn6KO8FBcbeS
w0xKLrUxVMhFOYWcdFb6BoAahkmfzLAICU+y9qee4F9/cpU22dDoYbtEP6VhIglD49VHfCHw09bH
y2h/pc7Dgk/pr++S9U+JuAZCg/Q4emMY89oMXJYibD30FEozab8kVzGNcepCRGtyPM3RiICj28Pi
t1oXHvhUHfxc0w3qfcNuVASzuJ1F5NjF7zBXiAXyct+GdImsR/1AT8rlWs9WknBoqwTSNQ5VNg2D
ExIxNpMBWXfd43gFYsK4vDWHwCmvEX6c0PJfrKtPGBOPOZa1dbFBvFodfe1piXjqCaXF0UzibwvL
gfN0Kd6Q/UbornA38jNFTNXx0jn3AasaNsz7Cgpo7LUm/QQLuNSn5g7VgW+taUod6cXjcDKVyJ7M
7v2ViBeLdP7vcN3d0tr0ol85TJHeUYQ3dSsRLm3drsPZ9hyA2fSYdppeFtbxNkY1H9bIBoITTBl2
pdsyMvrEr827vxei2kpX5gQYierhEK9IbO9xCJuZQZ+MZ6ER4WYkFwgV0e5Pol1bHhYOlknw5y7J
9YwPynZzq3FrtqIhcAewL0oDGqCxqcoDSVHrrjExVk1gdunsmiMKJZ2juaIIkjOAsxCY/fRt0otM
I0IMjE0uW7ChMX7dB7Jjtrom9hGp2+wsx5nY1gUbZgEQpRQQcZ3IvYeIUyuLzLEPMIT1bqFlBz58
LSa7j+jGbc0YQXfgzAnIVhEvpfY5mArmZ40G6unG/Lz28za/ZMO/i4G9WBErti+KIqtOjZidwA2/
vj9Fj0iicbHw9DDsvuVuu8bcwnyIcC9TTKkMTPUcRQ4vqDVWPHoR11yZqtUqx2zDLChgKAAcuvHP
e91yeTFTc+sjfa3Hdr6gE2LBWRVofbw+Z0V7OJldgsRtbriEXyGbsaIPW206JRgDipQ9aW5uXIvr
aoIJQ9dICOcVqFY/UgvTwQOu0uEhY5/J1nDHCkJYt/v7n8hQ+JjheyjM+RW474lFvyf3fqQzCcm1
q5XS5nXLLmcjMTXq1wkaMRPPEU/4C2nESHBTx6g+MfJ+LnZL+Zmi+Osy9TWBU3ZA8ysDF3eL+fNT
BLdb3HZTvOr4frAxwX7/xNbgkdm6Ts/0P5k5l5ZjPtOnAWkolOFX2T3qWrb7lgEedDhTaeQiHMRE
VpjtdjfUuAGDG9A+ryTX5MXKJIRSiSseCCvP8oHXAdrD16zwqBQP2MtB+nSjIvf3nOECyhx8M3Oi
HexFB6FbuVfGD2ijP+4v/Yij+4gGOE5wwpD5LJ1MNq2m72r1kpnrFodGB3XyOEFQL++XT34YyC61
cTM66S6JpscD2eHGzr+3hLffQ6+mXaMKIBgXh5q7tzIVr7u5fbeJ9z8QbXVxXh6dKsmsvH7gx0dZ
Q0ud8ZTKRH5IsS8NKlSEQYlRCeXbBMWz9FedtW3vo0BO46KXl3LO9CValYdFIl5RsVDu16iBG9OD
ab5/H8j8LOMd3iiJarXIRVxSZs5P9pxkhrbjmzX504meuCObafoNHoJYP9rT2Hj7zlVzXXP5fRqM
EJMhGgc00ommBmX3d4/iB/MCLpu38MkFieVMjQpE+3Pd7+GJ/0TDEAe47xXTWQv0F3iKe+NquSTZ
+ZTCmZXqn/Iz4EVz38kKAjet/kPqPS/Fj/atI6Bx2Mk/8h8CXOIlPx0Ho7P276GsCOwEBUHVdAEy
GPxAxnrSDPM=
`protect end_protected
| bsd-2-clause | 76f4b07b821075de1c63877cc4f64024 | 0.915992 | 1.939632 | false | false | false | false |
AlessandroSpallina/CalcolatoriElettronici | VHDL/04-03-14/04-03-14_compito.vhd | 2 | 2,926 | -- Copyright (C) 2016 by Spallina Ind.
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity gianni is
port (
op : in std_logic_vector(1 downto 0);
din : in std_logic_vector(31 downto 0);
nw, clk : in std_logic;
res : out std_logic_vector(31 downto 0);
ready : out std_logic
);
end gianni;
architecture beh of gianni is
type stati is (idle, getOPD0, getD1, exe1, exe2, exe5);
signal st : stati;
-- signal OP : std_logic_vector(1 downto 0); Non dichiaro nessun signal poichè l'ingresso nella porta dedicata è fisso
signal D0, D1 : std_logic_vector(31 downto 0);
signal enOPD0, enD1, enEXE1, enEXE2, enEXE5 : std_logic;
signal counter : integer range 4 downto 0;
function next_state (st : stati; nw : std_logic; op : std_logic_vector(1 downto 0); counter : integer range 4 downto 0) return stati is
variable nxt : stati;
begin
case st is
when idle =>
if nw = '1' then nxt := getOPD0;
else nxt := idle;
end if;
when getOPD0 =>
nxt := getD1;
when getD1 =>
case op is
when "00" =>
nxt := exe2;
when "01" | "10" =>
nxt := exe1;
when others =>
nxt := exe5;
end case;
when exe1 =>
nxt := idle;
when exe2 =>
if counter = 1 then nxt := idle;
else nxt := exe2;
end if;
when exe5 =>
if counter = 4 then nxt := idle;
else nxt := exe5;
end if;
end case;
return nxt;
end next_state;
begin
-- CU
process (clk) is
begin
if clk'event and clk = '0' then
st <= next_state (st, nw, op, counter);
end if;
end process;
enOPD0 <= '1' when st = getOPD0 else '0';
enD1 <= '1' when st = getD1 else '0';
enEXE1 <= '1' when st = exe1 else '0';
enEXE2 <= '1' when st = exe2 else '0';
enEXE5 <= '1' when st = exe5 else '0';
-- DATAPAH
process (clk) is
begin
if clk'event and clk = '0' then
if enOPD0 = '1' then
D0 <= din;
counter <= 0;
end if;
if enD1 = '1' then
D1 <= din;
end if;
if enEXE1 = '1' then
if op = "01" then -- OR code "01"
res <= D0 or D1;
else -- SLT code "10"
if D0<D1 then res <= "0000000000000000000000000000000"&'1';
else res <= "0000000000000000000000000000000"&'0';
end if;
end if;
end if;
if enEXE2 = '1' then -- ADD code "00"
if counter < 1 then counter <= counter + 1;
else res <= D0 + D1;
end if;
end if;
if enEXE5 = '1' then -- MUL code "11"
if counter < 4 then counter <= counter + 1;
else res <= D0(15 downto 0) * D1(15 downto 0);
end if;
end if;
if enEXE1 = '1' or (enEXE2 = '1' and counter=1) or (enEXE5 = '1' and counter=4) then
ready <= '1';
else ready <= '0';
end if;
end if;
end process;
end beh;
| mit | bf0bac6322ae28abc9165757f06373aa | 0.553657 | 2.813462 | false | false | false | false |
Bjay1435/capstone | Geoff/Geoff.srcs/sources_1/bd/dma_loopback/ipshared/xilinx.com/axi_sg_v4_1/hdl/src/vhdl/axi_sg_updt_cmdsts_if.vhd | 1 | 12,104 | -- *************************************************************************
--
-- (c) Copyright 2010-2011 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
--
-- *************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: axi_sg_updt_cmdsts_if.vhd
-- Description: This entity is the descriptor update command and status inteface
-- for the Scatter Gather Engine AXI DataMover.
--
-- VHDL-Standard: VHDL'93
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use ieee.std_logic_misc.all;
library unisim;
use unisim.vcomponents.all;
library axi_sg_v4_1_3;
use axi_sg_v4_1_3.axi_sg_pkg.all;
-------------------------------------------------------------------------------
entity axi_sg_updt_cmdsts_if is
generic (
C_M_AXI_SG_ADDR_WIDTH : integer range 32 to 64 := 32
-- Master AXI Memory Map Address Width for Scatter Gather R/W Port
);
port (
-----------------------------------------------------------------------
-- AXI Scatter Gather Interface
-----------------------------------------------------------------------
m_axi_sg_aclk : in std_logic ; --
m_axi_sg_aresetn : in std_logic ; --
--
-- Update command write interface from fetch sm --
updt_cmnd_wr : in std_logic ; --
updt_cmnd_data : in std_logic_vector --
((C_M_AXI_SG_ADDR_WIDTH+CMD_BASE_WIDTH)-1 downto 0); --
--
-- User Command Interface Ports (AXI Stream) --
s_axis_updt_cmd_tvalid : out std_logic ; --
s_axis_updt_cmd_tready : in std_logic ; --
s_axis_updt_cmd_tdata : out std_logic_vector --
((C_M_AXI_SG_ADDR_WIDTH+CMD_BASE_WIDTH)-1 downto 0); --
--
-- User Status Interface Ports (AXI Stream) --
m_axis_updt_sts_tvalid : in std_logic ; --
m_axis_updt_sts_tready : out std_logic ; --
m_axis_updt_sts_tdata : in std_logic_vector(7 downto 0) ; --
m_axis_updt_sts_tkeep : in std_logic_vector(0 downto 0) ; --
--
-- Scatter Gather Fetch Status --
s2mm_err : in std_logic ; --
updt_done : out std_logic ; --
updt_error : out std_logic ; --
updt_interr : out std_logic ; --
updt_slverr : out std_logic ; --
updt_decerr : out std_logic --
);
end axi_sg_updt_cmdsts_if;
-------------------------------------------------------------------------------
-- Architecture
-------------------------------------------------------------------------------
architecture implementation of axi_sg_updt_cmdsts_if is
attribute DowngradeIPIdentifiedWarnings: string;
attribute DowngradeIPIdentifiedWarnings of implementation : architecture is "yes";
-------------------------------------------------------------------------------
-- Functions
-------------------------------------------------------------------------------
-- No Functions Declared
-------------------------------------------------------------------------------
-- Constants Declarations
-------------------------------------------------------------------------------
-- No Constants Declared
-------------------------------------------------------------------------------
-- Signal / Type Declarations
-------------------------------------------------------------------------------
signal updt_slverr_i : std_logic := '0';
signal updt_decerr_i : std_logic := '0';
signal updt_interr_i : std_logic := '0';
signal s2mm_error : std_logic := '0';
-------------------------------------------------------------------------------
-- Begin architecture logic
-------------------------------------------------------------------------------
begin
updt_slverr <= updt_slverr_i;
updt_decerr <= updt_decerr_i;
updt_interr <= updt_interr_i;
-------------------------------------------------------------------------------
-- DataMover Command Interface
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- When command by fetch sm, drive descriptor update command to data mover.
-- Hold until data mover indicates ready.
-------------------------------------------------------------------------------
GEN_DATAMOVER_CMND : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
s_axis_updt_cmd_tvalid <= '0';
-- s_axis_updt_cmd_tdata <= (others => '0');
elsif(updt_cmnd_wr = '1')then
s_axis_updt_cmd_tvalid <= '1';
-- s_axis_updt_cmd_tdata <= updt_cmnd_data;
elsif(s_axis_updt_cmd_tready = '1')then
s_axis_updt_cmd_tvalid <= '0';
-- s_axis_updt_cmd_tdata <= (others => '0');
end if;
end if;
end process GEN_DATAMOVER_CMND;
s_axis_updt_cmd_tdata <= updt_cmnd_data;
-------------------------------------------------------------------------------
-- DataMover Status Interface
-------------------------------------------------------------------------------
-- Drive ready low during reset to indicate not ready
REG_STS_READY : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
m_axis_updt_sts_tready <= '0';
else
m_axis_updt_sts_tready <= '1';
end if;
end if;
end process REG_STS_READY;
-------------------------------------------------------------------------------
-- Log status bits out of data mover.
-------------------------------------------------------------------------------
DATAMOVER_STS : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
updt_slverr_i <= '0';
updt_decerr_i <= '0';
updt_interr_i <= '0';
-- Status valid, therefore capture status
elsif(m_axis_updt_sts_tvalid = '1')then
updt_slverr_i <= m_axis_updt_sts_tdata(DATAMOVER_STS_SLVERR_BIT);
updt_decerr_i <= m_axis_updt_sts_tdata(DATAMOVER_STS_DECERR_BIT);
updt_interr_i <= m_axis_updt_sts_tdata(DATAMOVER_STS_INTERR_BIT);
-- Only assert when valid
else
updt_slverr_i <= '0';
updt_decerr_i <= '0';
updt_interr_i <= '0';
end if;
end if;
end process DATAMOVER_STS;
-------------------------------------------------------------------------------
-- Transfer Done
-------------------------------------------------------------------------------
XFER_DONE : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
updt_done <= '0';
-- Status valid, therefore capture status
elsif(m_axis_updt_sts_tvalid = '1')then
updt_done <= m_axis_updt_sts_tdata(DATAMOVER_STS_CMDDONE_BIT)
or m_axis_updt_sts_tdata(DATAMOVER_STS_SLVERR_BIT)
or m_axis_updt_sts_tdata(DATAMOVER_STS_DECERR_BIT)
or m_axis_updt_sts_tdata(DATAMOVER_STS_INTERR_BIT);
-- Only assert when valid
else
updt_done <= '0';
end if;
end if;
end process XFER_DONE;
-------------------------------------------------------------------------------
-- Register global error from data mover.
-------------------------------------------------------------------------------
s2mm_error <= updt_slverr_i or updt_decerr_i or updt_interr_i;
-- Log errors into a global error output
UPDATE_ERROR_PROCESS : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
updt_error <= '0';
elsif(s2mm_error = '1')then
updt_error <= '1';
end if;
end if;
end process UPDATE_ERROR_PROCESS;
end implementation;
| mit | 1e85d4ce19417a5387ee5be664ee98e3 | 0.419944 | 5.032848 | false | false | false | false |
szanni/aeshw | zybo-base/zybo_bsd/zybo_bsd.srcs/sources_1/bd/system/ip/system_auto_pc_5/blk_mem_gen_v8_1/blk_mem_axi_write_wrapper.vhd | 27 | 66,283 | `protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
qm+ahCoXbtCT96FlU7osNjp8Kf3rDAFQ8vMBTpaKgTo3EvHN1CM/XiHNcIsmMQ17hbL+pWxo5SQe
TeNJ1GZN0w==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
KB+ek3mkpx3N+ihSLNljgKYzWfCbUQKXGho6dSjrHEWrzL9W93J5UQjcPdLkP/4r8XQ5AjiJVm8G
O0+WgdiO6dbDdWggVe0UZIQ5qp9jotaT15XQQVVkD2rcK5wquost1xsRm7MTsEsCbzkhqKPM6ASZ
mpW7GzuYQ2vDPmY/r9U=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2013_09", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
5IFnCgXf/KjXBNbWCJPfF+u/Xe3PWCvLt3/lqQEWvv6nS2jJ8qz3O+bSiUUxyt/rlAZZm5DvQ41j
Vn2wE7il4mdux1L3DFueP8Ob6UEbh6yobetr8hrEOpbRcnmnH7rXtvR+yuK3psDEpqbW7d8GyDcy
T6jGK5xIsUceYrUwudt7lxYx4bLnzP6q2c6uLhkxaoLJTWJGh28se0dzlAMX/BnMMfjK0HDKD6kp
1VwH2Gj4iT7DvyBkDmISaH7LPSlLhe+ZmQMkilflhi03bS9w9ABaqs6v4fufe3/pEUeBrvl3gRH/
oCU4QtUwSf8qfFsWdX+C6Nn7mzOb0WSGIH22+A==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
BAf2bWZTeSaPIqnT3j5aNO9C6t5/rcfC+/QtvmxOirWtcQ57aHowXlt817D+9PTxe4qEx5CjzmUg
9oMYSESB8IK4XXnHzrwWEKN1a7YOhI72J3KxmNssnP6jdEMx0znih/oPMXJaAdPPRUXzSczvXVqf
S7AhrmorMi/7B7tc1xI=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
dVk9aS2pcwcb0BrWR4Sm4FSW8QQWqHH7xHbqUaQTDLyPydXvHmrmxiDqUJWu8AAmbDSnHtBnMo/b
vhz6TIedlqcgp9o49Jh0CEli94frA6kGx65vbdl7q0c/R9+UB+XDf9B8tq4xwdSd4Twx0zVa9WGD
lmNliqJyvFk+OMbS2OJJyBNqK6eZPVzKMFkUG0UJu6TERfYV2nuxVMsugR94X7JoKx+W2jEprOdB
UQVXsqhudTLpaKEQiNqzDCaBK0P3FekkJJMtZNaV6veO7wX6Us6tTDs6pxGysSo4e6tLocXysaO7
1blW1S7foypb+e5LTkDXsQjIPmjtBTMz3Y2yyQ==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 47328)
`protect data_block
2XzMWRjd6RfwufMjKjigSHlgIdFM4Vad4PLylqBV59tvIPSIW/fl1hAdvGL3x6toi6GH7xbyH1+m
So6AAmHnm9qV6OBePCnSu/CAy0TCR3RwfC585SDu3eUn1fXs1MdcXcjnB497XYbo4F6njL8A5WzN
dUKBJGtNySmnz7/gSgfT1ifT/qmnQuwU6MN9xwX62ZEdWwwWwr1CVZkDFgKW7S0YOEeYeWJY+kaj
Ne2xR4qmaKUXVrbZa3hyya5KyNcjUXATnlcIVlayK1WggpVy1Wb0rLDlB6ensJ4pvlRMV3SqcSEe
3Z1MN6diSkknGSRcrwE8i+eQF0LdiTdnZhEk1uFIoYt4K7eC/ytOjHjP3VaWbNoSAFiQm7HBVG2E
Z4LpVE0i2HtjMPeVPeABPkwFhUhyvNyA1CZP8wDXD+j7oMXUrbYRdWjpH7B/uWKswO/ClC9BqZ5G
FtCVR2zZT6XmOxN6VeiZdtwwa0jzLgSmy6rXFqmeCCsKfA0nkyQPii6z9nT2Q0a99/brPUPSqACO
29ZUyR8x5oYzkP6fVe80TqgrzuujtfpefG5YRLXw3QrdRrsMi40LbHGi9KV1VUEHQQkoFHhNXRU6
q8jIpcCKtk48p0KrG3BYHAkSn51s0j9kcxxcQWyG/CQ3vGTceqQSle4d0afxQvKaN7tNys2bTQxk
tyc3fkYmiOHZZbDvMVKLQDxPbJKIpVVlM3JkxyVwRIYefLaV8BafunbzcVpiZc3U2tX1PvMwQdJ3
vhFVQ5ZVupVdK4SB5gyHOCnFTzv+JqBc1eG3kkeV7Kd70IQHmJ8Tlq95lVZG9SW4pSMw6jvFb7TP
SiLPcXsIjsse3pxcXC4Kt20oBsd5KURqLZwbwo2Kb7cO+kkUO+Y1c3cUClB/24u2ovMfjKQg48qt
nq5CpNNjvXjlwWB1Z7UaYcxqpi4oPJjkYnuSFBKyKJ1eKd38SzohLvROesNFdL5g9TjkR/SMlApu
VJ9YRzTdJ/XGssWH6/GawXBfHHVIv5yVwzKkbDzuiZtB4O+VszVhmuDa9ZOKtaf6cu/WeSnf6sGn
875xofixI3ZZdtCwqNpQ+65QEAJGXbjRtqPDQ0LNLUD1qBLDDA2MGS0tjMQDbkX9uELDTFrRaPYf
NYtwVWPCcHJbVDWgSylggYsJs2qa2a/82vYw1K9ICtJzAn2wm6wDcOGf0KilRIpshnTivSnHLnS/
7Hrdkv1a9NzPJ5ZupjUq1CxSM5U2GbUOlEqL1qXTaEshNHhAeILcn1T2GLbcglt6z2bf1qC1Ddr8
hixvfessb669pZ9+OUdLdOuDEr1HdG+4r+iiVAbfvi+7V4mSZef8UBhewj31f7RXBT9VpU1xuhfP
/Gj5wxrSmZXSz+0gk7GyfLR+pqnEZf1oQilAhqkib5oXW+ijzqdlOBVBeUTmLfa/80rXp21IM2O+
WGE0RL882TH8Lc91jAoJ3AQzIT2THWZOmOLIzish/38iq5iL8trG1XLsP6rc0RHePshhVneR4epg
+F7mYKTHLICjLgBZs81Gy0vr7nZp68xrGmRX7HdGL8oVCb41GAaKcEVgV7Hep2P521bQJLGiLI23
QWKdMBG20vz1T6iD+fa88SKpI4l55nGIYBqA27a0blQyZERbeqaZo6yStw2QB/mTnCW/+Z/DYeuB
dNXr4GUEmae2NC8gER4397MBn8YpVZGlDNExHb7hRFMHr0j7sSgOtyku/nqoBkqKmbsnC8TlM/pg
YkzBjJvwaCwCVT3FxaTj8CIE3bmTV9XoZRMgb/5XL/1BqtuvGFErLXDJQwT7iyiHq8IBGcJc6ljJ
ZVcy96JOMz0jJGzp+G8nStc04KItadWxXAjvxohSN05dJfY3ABagZ3eQJGR1mDBi8/uh8qs9ybnv
66paXr5ID/5j78mUUvLrHAAQpxowGfTev3TSuNFnJKJtY6iwxOxwI152l/DKILP2jO+LYUbkGt+G
ta2cQ6a7t7G9nfnonaymzpxyXX4Gbn5zBhdTOhFVMLmCD17nEAClxv8I1Xl6r+4XeklnFTKT3q48
qTAzWbqeXm/4grI3E/K5Jys6FlJTVHtNUJm4HDGsyAo4KPQmLj0Zy5sS0hLzJzzql0HsuR+nykOB
IUfWhATotE2gOUdE8Z3HoGSCUFDlJVxF4PV9Gcy88CIi1xsOnoFWadNspBn1i+XAVcFQ78Y7narf
Ickq5JufLX1id7yxsft+8OD+POPEj5RV0nzI42d4XzBtfNrJ8Sso4tlJlhKDXLoGnVFHNqNNXFhE
s+ghN7tjC/bhKTUwSJMDtHMdKBXv/7u/hDNQADmoW/RDQbnq3QxZjGmap/3ixoQrMHfzxVfSsfRn
0K4TYzdw7G4V5YpbO3TCB+ejZ4D8tCCGC7YV6aHr+RY1j4eLu6gL/vCj/x/5hdyzxVkONwBU4vYo
NCRlpwddffjlG3/f6AI2MLdfPEEqtseTRxFmJ8MtAoQUE9LLJc4LisX0qpHlZUwiU2Lq6hV6bON9
96PjIBI6LpkFT44GCVbp9CUusfS55ZBVFf7YSwu9w9ID40Uc0mNy+2V8O7dT/DYbLIvowO//bHvR
gVgb0N3bMYItJaCNJ1LsT1Xcd/oIy2xVnczSCP6Ue96dxmgbpV6RfllJNzqDwwU5fXip5vKE+dI2
J7tLCtkWDtC1jKJ6PuU54YJ1WljAmoSXBHjW6HOLyclYlUghBA/OkS3D6x2cbp4UfL94pLJNn3xX
oMTTjKwp6i1bGDfOhj0Ot+yGwW6SQJ+wi5wml0pROyS3L7tV436zwKMtblvjnS1jweO6NzOE/MWh
ec7U5XgnzJwMSCQoehUyiiP8eopOHeYn5IOviMcmYXMKlulrCYd84bEv1acIk6pUPnZyc5hwALBV
K1yMVKswNTcZOCerdK3q79aiPKgDMQ2k4coepWM9wtW0WwEq0XzCyLdv6uX/xBhBmdida1JmIMD9
uY5OQTFHjmEnIfAjmmfXdR6a35I5CuPJlcIv6FXeKl7Cd0DegWh+gKV+lLSmZ8pGZzPdtvqZrtf0
qUClwF5M30piOuBDogWJSrF0MrxWCM42UMUY+r2L5XiPjdS4dpVzTvolWDO4bgqZC5kL4t6qiuNR
Q4YhfCzdAjtUoTmc+u13LXbidnS8X2FIIA6hfE3JcAwGk34rjhqHUwYCeECJNHmcA7mg/eau7oWz
WddG2h2G/irE/R/nGRtc6ett84JAQKS8H1JVO6tr3hZORgG9Yf4i8hwWBjkaQ4jCc4KuXIuF+BeX
J6g5gh/FF1ZKkSs4nBlSMUCm7QlcuxecxmDvboj/yRmNNnJwnORdlr2RsNZx2D0EzA9QRj4A8tRl
rbXKTiXowSyvlbAc0sq8jCP2rtmL7wtxFgCpQlFPCWbvczYnfoSZliZhR1P0dM/OLgx2ez2m5viq
ogu2UBu9lWy8YO9/BCQQGGEzmyXMZI8joVkgnt+SQSO3PZasYJ96nd/NEf8m94VY/P4gPXK8A4ni
5/QpZu6fBnR+MeyE/EoRNos31ZTs6ohx+jU48Ius2tJm4LdhvxC6R9uLLtpm5ozzoFXLTcP25mJ/
ecdrkx1EexKvp8iVRNNHaO1zzS8saXqZaaiMLahXCGpPifhC51WjjUIORs9424I1FRnVPaN8otrE
coOT1wjgRY+IHsoCPfqzwTp2sn4t1VQdfQI/NCrYmwZ76LWQ/RB+6GFkIQ9rouX2vIVXqG6fTAd3
65tagFZ9LQfo474PBqOtIS06erKWLna7rRnFsHcDP3ZDqy9M9fETEGznPLE8ZUywGbebkC6tfVrv
uwPuCINjpUyYYmijtcnpPIQiJRc9GQHsEFhdLkKQR0dxSRBC7oT+lixGbg4ie1wdnizEVoHHeB68
zfi7jky7iPfUL5Fv+vqH3QB3Kjc5r9yrGlkfcDHGdJycAniiDrX/T9HMeVyR6sKtNewz/IOA6n72
bbCtOvZrrcsxHSkMQUkIx993Lr+P0fHZLqyYQaCob3S5SfA1FIynA8/Tllw2oGqT4zO4XD46cfAg
YGMVBhwVyqVnoj4e7ly9H99dvcyDCV0c82J2yvl955f3spPq0yWfgt2iibz574ocgPfyD714rr+E
EgDxCo9P4++eUtj+Yh1Dk7mCYq2OkOWtg0yjKP2PROlP97WFnbJs1gznV43ZycT+2m4apJCyENPD
cejkC4fpzZYSccTXiVpGnYKw3+WmS3u0hc5OYJsKSZc/gemJyQIJVM1Ok26CUVd56ZNxtfeSMgBT
TISWwa3pq//PgMJRXJyKUNjPVK64Nb8lUd73Bjgsj6711htlWOMdUu3NsaVFU5RwSAtFRcmzr9FJ
ufx94aDFNKrj9znPBicuGoyAyBU5YKgc4Og9KmwRHwtJjgckc+76TksH2GTCaNIW0hRCOq4o5Foo
FuyDhanCxbKb8fgNgl5b1zOP81gVV3ssbSrhQKb9cPJdmqRj65jt/scxmnZ/YVxTP3icvKzkWMwY
ynDG9VtH3tyJ6b8x95ACMn8ufcSp0k4zwJIWZab5l89wGisHiD3ssXDvfd7RAZdvn1qKPmw7bvRC
BjpBC2/9hkgj+T4DHHEQFNxaaOLWOA6/INV8RwFlHih6gvjf6pmyEBskHXkt7kmzRZivmIbMewBO
IdmS3fBde+AEpu5dgebYKP+646+qwtk9+PZ32vd6PRmEzRFLOtoL7lX9n0PNv9oBc+RviU5RyQs2
noaec+x60t4l5jnVamvEPvtJcU3x8Vfl1hcppSumjBSxC3Nq9NrOnc3lfilnHcKV3nAdiLPfUuQa
GMQlWw4HMJtHJFKYcX8/jqe1+1aiQrR4tywmlEzncgygyWoKSE1aSN3BsNKYeD2FE6iXMV79edxq
zbnUKErwmisoqlkWpHdVsjd8OmQ82qhq1BKakTCPfKVnbnhK3qCyZ/Dd5ei3lRRDIga8zad5VAfr
Kn3aPn6i021VxaJeRgkObuMiG362VuA3bAqS2+kYfJlOQRFSdmTTKjwrSi+ys3Lo2rMVPYLgywHo
Hu2wo+JV80iJZz1/M4zFzzGQx8oCTEvmrtYqsrC2eDoBGpuQYSV7PR7SjOnEXJsCqBN4ONy1jpSJ
JHM1cZwyKpPgIhAntJykMCnueq1PAp+YyFpOk6xDbMCHtIBfxGcBDAyLB+jbqmiC0nZPu2vObk1v
yblV1FW/4tScZktP0T9n+uBiloPzlgIYRS4d6ETWfuWDbpfjEQ5gmVH0qx386NFxA/tmTOMbcDU5
mjhPcitxJcG+CQgTR6Ogx0h0d0YRUYeuROKKDk76tcW4hQF912l+4BWGsJNFPe7TmyzgE/H5lpb5
oN1kRr5qI5/eRIYAr7GQrdpZTMa1xzjqLnbj/tWQ8wAZ7Kl7UxzdoW6w0BFlXYvUP5LhI6qedIFW
NMQf07pVi4StITQ4+YqPuBfuh7QZc6skrUh921+uu2Nh7EVxORY9BEXfPrJvSYCS7sJsvTt5r42J
lcikMZZaRzJbKm8NkipMyIa7F/C/cKJVbOGfOIhx9G3lfauGKbnUoe7mekwGGZwsMcXNbzRnupEY
eX7Ms8zWIF8Z4X0GCKf08mmwdleQjZnTLtEtKuOstLXMikCAjcvT37RBPocoE9lbQML5MXMrVlmz
ZGmmV7DLvTN0opnZhhosMt7s8RXrEAPup/Lt1UEEWjicDlvg1mxxZC82SHT7SRh+g3+LLHA/qU9V
6e8j9uUCOJfvf8s2flXgr9Prx/Ck4Bs7oqdeTfQ5csHhR9nYC2/q9x4O99D0cRh4MAbZqFSOM4W/
JWGJBFjlmOvWMFQw59dVkdXG5uavHfd8/JqJSsCjBzu/BA9hXbLneApUKuWGLEKi7qH1JKtAYJ+f
0VI+aN492iYT8FNruxHnajKCyPEcfKPxNR71GQlc6jvVe7fT6UYKCWBtF0exQyVCtgDDj7lYFGQq
DvWkU+d/tpNgOYPFPjyFeQka8i/IKSN2ST6s7RkDdXc4mzv4pPWrT6dGzhjcZBQoAr/PyiGZGiga
tfi3t672U0SSiHzKnuomAMhm6hm+01nwW5hX98BFFrZd4gc4J3Sn2quGtMexI3rKWPVr+1fJU2GH
VSKFy3jKtxEdJtj1DNyyxyQBrospTC5nl6rdisunMkKe3yBciM3AF4C90zg6HZ0VXEk1gKAlUrDW
UPPDSY12nhka3DdNLbevY9fT8dfVpsbkhNyoyjkwUYXtm7p7w/1xcEvTuBsgqBJJWZ8qBftWxEIM
5E4aMZZ1d1dis5b4YVopu6z2x3BbrUm14z2w53XTjVO/AtjYbkHOnS3+wVRhNLLLMaXZqN9OrBvp
XfOyIg3XBpw+HqYxUeqJGJ623yl2pIKilk/EaJKIsYr3lUbDx+dybxVT1eukUoniHxARVxsJlA3H
PL5K4ZEDlIuexsJF9uEyEcgIHAfwzESWo9Km2hLFzRO3FvxOUwwn430AcNIqxZWlsGalrXdTgOfo
4YzKRvTBlyTYys6b1GPc03RN2hsp28xK41h7DbDAkOMgpdISpYhexU0pvNa8FAboRF9GRnPIL058
1Rxx4iJykjTfsMsoIYsfjlspGQotbMteG7hc/qqkovTan5gRObG7uCpv6jLbps9hFvdZbyOj02IP
mebOjyNpzdfv2emBwpVYIjnTiGG1avCP9MhnerRS+OBxuSoU44OLhWX9HNbt2Kub0bKel0Utt3ro
iqmnD8py8syQyNG/RYl30kvub33/k2K/4TONiq7/fOhA0Si4VzH4dL4A6frHpbNE4ssVcpkywTtW
7mT8gUSsw0XkowznvkVmhc5TExEZ4Qqa/zdsNTDGWbj0fxE6T2ipLE6EJ4KYTikE2kLmenkJcLQA
ZN7wYZg6VdLSsSehwOc/QD3H/FT1L8WaH8hPg882UNXldbFT35qZTeARmGBsYusHr7/9BLpv+1wl
mKGI8+AITdS0ZE8rcvRJwDWWcUdf0ssj1dddlGhtAkM/2QaykS0vCuxn0X1aPcIiWhuJ/K9wGR8F
pgHuOb4IXqrvuNKppIp33YolquCGmC025mMJ4az9PWsexz6gWkRKZ23lwj4tj1FLbmHcjSANM9PA
7LK/r7BWnd9ZtL0nFFWlBI5AxXoUDIHWEgNdIuHMnyr3HhUNzYxKWD7wKuml90F5WjtZWMoYS24m
iB0jsqgEZGMo8Czt/up6XJlQ//bNYZCsWUEa+hgk4YbHMXGviVi/TSUIQ1v0XY3nPJ3rXUfY0t+D
W4XEXkH8mOIPAz7WypG4agAl0G/VoodLzNrvGHvlsT8IwFjRkXSOAS7dMUohK0Nv7cr1nhR7GUJ2
zhD8hO23MTbvQJnM86txJHGBGFVs0ryfFIA8bXA2pKp1SI8/9iPb3PsCuOd74wgY31yGU/K2x/IK
gPDz8EGJq5tCWnTNgV6IHBbrDpqW8xKTMtGPU0tqOeTkHCMyGF25ERzIlF7RcyqVVoFDtxYhsFX5
D1b/o7TNNIjNrN0OArhjGsSDzqTUGz9a19CWdOZbNQFxZKA4jEdmeDWshHAVoOAy+zJgyRwEXxHT
C90X9gATrRS7RewDxPlLx3N8+hTHdCav7CdSggwX46iPxXJ8s5XBbhnYQpVQmlQsoxRlPBZKWr6S
FtLp0tSMG/uQg3I80nLu4lyTPoyvCxE8ilBY7fkzpCEbTl3F8P2aHIBlF6Hx0pAd6gx4vG0IzXbV
6tc0H2vlMUfiQ95OJzWxWlubeMvG+ukKUVEf0/5WU+sl8eirfMJysAxAc5gwmwml6rs8VfgWHBjb
Gi2VGuRDuzfeNzO3XbrrGigIS6zEFS/RhYcrU6fKVNYoRViXpgn1QzXTAWwDSOeT6HUm3HVmNx0l
QIdvN04pXi+DP6ZtoejcftJ2vC+xABfAdZ6EhKHxxNsnbKi0f3fKBgcTr+4p2njdrWa140Y7hY0v
P5FE9o3Zf5gIHugrp9JV+YRiNlH0Ir4LrcWx8M5MJI/u6tBWeAgmZHA4hQoo3A+nv1WROpkw2lMw
9LLq5Eg/2OZwfWfzhWpbvBBm7ixf7Bfc5HmrbUG1jd9EP5FfyaZ2NBSVejwf9qMPzQPlJJ5B68i4
sIk9Bx1TMsA086Fqi9ulcH6fhKcJS/Xmcr9FW4VLv4rTi/HAXg8Y+ehXUFwIUlFzY4pM0sLrcBar
irUkz+0n5d6hNbwOgJcb2HLainlawXPx9Yf2QylrlknhPiEUHIcsmBF9UYePmq0rIlaX7KeGju4a
Y2qLfNOK8ouL4PXA1M4y+XxXeItJAD0PuqmjmXp+52RY5M83VeA+oD800pee2EWicgrwwcK9a9hs
0Sgzqnl1zAqTFD8/g9vIldCfToj4tbid51LGcR7tSp1zs1VgGKbMNMSWdcfJ2LTlS1JjNAGzCzk3
t96bLT3Q5WiN+pS4L5QDC6Irvijl+iDPypEtWCn1uwSYu+Ge219ZwoZlly6uMWcHFQOfZLehA2J/
chAbpTCdELu3NQYeMD/S0n8kSZQ/fb/dA2ye+kjjrzNHGtrJ+6q5RIMgA1o9YnJsdAP48GmyADZr
iIW4oU8mqaH5Tq//P79XtluH4AHvurRqgBsvU5aHKJRhmLtKdEUkDS1k9vaRKyB/w4w1xPoiQTNK
o6yfa0Q7m55ne6wo9Ew/Y1sXrKScoOkEBQhalXdtvbkihrHdcU0uWZT/VYIvx5eOIX1N5lIK/3bV
PPg3/JRbn9PfmBU4PiwRxZEodGtYmZ0hzysolcpV0wPu5vZsjewWPnK0HYi9qdQ+x99LS74YfJXn
QbwsWez3hYKWvpS7/xhx+oW5r61R4tzHgie3a4Xx7Y45EjRyrJnDIwLownGHADjvCSGitneP5h2W
+Ux9YfpLNWdrnf/vL6obV75Av+TjKJ+rm7Z25eEUKZjzT3rtOq8ZXonROepjwUa7QU1ZlKVEieXS
3C5nUv0y7tYOjcZkJn9zMDbLxF5tVcSzPppBcB+kHjB50iUccMBRgSobQf2jcR1afm7RHd44XDxT
iMNdE8ET4GiORi2XNUN1Cj7VMhKnLRk5W8cubQRQrwylTyzg9TY6WXWwuTmn8OCrJweIC4yoWNVb
MpHimQ194aIFabYwUGwNdkz/IU1sCF0YQct1cCEg8adq+G+Mlx5j3bMXtrPjHRu5+PrYOnfH+7eI
yCv79bHfIPDOeA4D2tapd95AG0dIZt3WL8Is4tOcDUHvBVzDjlmp9TJwyX1dYvATMYGCJm0z3sb8
wY0wubHafi/erXDO1Hg0aURmiJyt6CeVRXzIpqdA8+RlhU7ozOlqSsqQuxsKjPRhLd20xvzkGfX+
P36/zsRxwrWKrLfuQ0Pou/0hYijlyVa8fl5Cim8isAW3BIFExeMKy3LqPwDWzRsGZ9/Y7bB5QFHS
BOaossUYKiej7Q4jYI/rtsK1kVZlNwxcma6bUZ2xTXEzygIQjMwXgwrXUlos6to10p6p5l7G8B0B
gyoJn/QDyCl4suNshAS7gD4JaoRTX1TOu83kSX2wzo1zNXXGCyigYk+8jIlRrSUIi4J8+AXGIy+8
30e2xpRPV1wJ8WThMgHC+mARQTQQwGraW6stWhO/SiXwiuXQPKzudbUdSHfUcPd5Tc/Au6s3MwZ+
nk8yUL0xqfe3/sq2TLIpBDBFe5GaOnbhm8qSsRqX3Hbe1sYtYUE1K8sc1164p+uAihdg9Ux0IqVF
DvnJwyMS2m0aab2TEhrCqIm0CK/h2ZyfkZ/HQhNCulHaG+EPNKTYe5f1+zveDGjsOBvVEi32+ElQ
17T2OPCu/bGK8IjItCiBLnWmTawlXJYrtLjU6cGx2F88/G12BPobA2FONzTwjizo2wahuLvf1h5o
XSKFfGEH1kpDDWZgeKuNGS9BypVTEtZ+JywvAQBd6CFmtO/UCB+zj5p+OM0VAl6R0lNRmCw9cImJ
0hqpSLOXRocqmV9KrM01G5JsTqsJfIcYSWlY96wO7WBWCVVL8ML/9cA9V4x0Y3SaIV0/GjMOv41p
78ec/K1nPAKMs6YmM98dOSbc8BvRzmBdBLdtXsle5LU3gBvpSMty46iSUsMovLcwi4EDsZb1x+69
lHH7Jd494lSTuvYOxSxqRk/FQUHWUV2oZ80fvlO9M4keZtosFFAKIPD08g9443eIB3iQqcLj4d1M
6eM0nQPHtRU2szd7mi/GDF0kGCj/eZ1gTp3QQlWVLhxM3N6MR+x/GCqNHq+6RtG3JBfFG6YywxB0
YF29S58LSYHAlaApT429Vdkao72BpvlZ5DhW8mpoP0K6QB9zGtDD+5yd91hu4J44IgTpyZJ1xz1x
jQ8q2qC/5nFmMMhWe5tORNLg8LeisA/U5ZG0QKN4ZvGrW9SbZ3CIQvJyynyXut1qxfBRbhOG3kvQ
5jXN8xf1fJmaNWbLTx2pGOoHOfmUf4yu0T3Y7cpVIX83ARdozBRB04kEbOLGxKxZAeG6xdcEQHtu
giz4cV1lq+Ipex6U8JdoaCyOl45nTnIEvcGAViot00b+ySn9QU7wr0RKWGU4Lq2XL7Sn6dThPN+f
M2e7LmYjGzXppHCP9y+WAZh7YUGe9jmF/Uu4MUHju/+/rcQcr1yHNdEzmzor1+/jaLbToPFFwqol
xu1oEEFN4T+usfe73DDw+meOrNpWI2rUzYbwB37ueRDWX8viysLY31ScjEbDCHD+cweuMq4loetq
eOCRfbP4YpwOI6LU4j+Re5kheG5tIVKydtoewZ3YdaIYRW/99erIc/kv6s2w1su3gvwpweyD+2DH
CXCtxLuAse+WPrQqkGGyLVd15agIpjQv1PlaeCZtO1uNHDiJNKsBnFURhYtqqZPP8PElYFlv7SRZ
ixOF1ZMkHChDJIc7PU0/KB8CZRJByGJwnS6Ftbrxpv64QDzOJaX7Icg90yHYB7ddoZYE01NIQvRG
kxUr4ZOAhlBph59Jt9Sec8m19PRsZN8R1nufeFb2biqSxOjfeyQ4zLb88tRm98HFi71ga9tIoQol
f1KKITK+6K2B2I3NKGqdc1bSFmfo+GvZ3lLLgq3thmkanjtjk3qXcEbswQgArSuuTvPPh7cqKL6o
NlvwzHIQdt7rfA/TaHKC9+X7vPjbO16qsD+AzMdZKjLSZrs6ghXVc/MrNvP4xevFx/H3cTxmwnXs
92Mswrq1E5FOy/dZNuC8eUnS23P92rNurKHObbsUaed3sQpGFWYExSzI/UGp0usqxC2x6zYKm1d2
cfrQKBjk/c0dP5P6V/zWFBMK+exCrbY7/7gvJjeYnZ/WT2JkKY6BoUcbbXY1K8FPFv+lCmCX3t9u
eY1NjlNKIEAN85XP9TqUQMNdQNsW3Up2iHpZwLCwC2FrDBJl+36lJvOrxnnfTBMAHbIksLxZscLm
keD31Rbqo7ES2KU7+fxoRfSoUzlkvrVboGvOE/H87mniVlFZAVOL9fsSh+bF9wughxc47L+UQLxD
AegLBpO/MhFwmm/8UzPGbuuOUqsUVjg3+9V+O3G0v8ory81vxIlj5Ctdxpn5MPg0+lRT1vqsUNWY
FFSbrVYaqlZGdWAiWWTo8Wf3eA42DWDAR6MxA2GmEAoMUBxes9oztOacd5IZJW0x9C/oyFaLTHSI
seOwkKqkcHGPDd4bLEAAKIzIcaOkKn9DYZhkntG5kJoFG+05bP6sZzMYBfEyqrBmtY4dkz6gCFvX
CAXaPE9JBqHbcFibM4JsTQWYm7ldEc8ulUeEnFN1OW/iZtzmaZezuQLkjsE2axL0WZdVX3n9H8t9
Eizw8tLSVBGuWJDFKHgOfD2TdS1J0x3gFsNLt9ddUPU5i5hMRCICnk87NOUa0i6N63MYKfAIgMCQ
tCQYhixaM9zDYfNqtPd1mHTbmQbsX5lN0zmHSwPLhl8MZJbleawn7Bys5giyCpJbbVBAbx+Uxams
mHIv335XM7yhnW3Pxl1p//zAISIXoQ3HoWWmUz39bDZEllEY/Xo469l2/CK0wzB1BwBmbmxGZzG8
qqmLxb0y+GhpIwVVT88V04Ao3KXW00SeTHs4btqDBcFims7EDBKhlbAMzOtwGQTRvVG9UvQM+JuC
DY3s+k9LZ+56i93sveAjPy6m4E0jGOVo0KgQPmx+hXEr8YI9uAh1jHjfmHDpcuKB3Bgzcj+fJleQ
VOg8aRje4hkG5mxBeh4PUaoNZsrW/7kDus7sUKf12K/+gFi0bVAPuhgMX9yC1drE5GsOb6BFsrL0
V2rEOR9JESZQqi+UHER1bd5rHVOrCSHiu9nVrb4m3kRehyeI5gcU4DpoOQeDFniNdtoFQshaEoSP
eKG2RXlaUSRwtCyjJ19MigZPrIoEUHrT13i5iM02pm/wwFhRHQvxgQvVc54LIw2a3JAS3klXJjwO
DqPRpSp3UFTd5F7+uM7A/QpVvqjAtLlA8oTKmaeZEzYlfzC6FFT2I+QYjD1FR1eEsK+1HHRQ4JvX
/ipcrAUTo9wTpzX/KqWyR8GjvlukU2R1ef3uaqPZywR5c7HJ6O2AAA+8kXjSPcn89ZGTKWrBzpm1
t5a3R5TRssCBbDgiYbg8Qu1XjIQO7iwTH6tAnUM9eiX5UxXtVB+9C4HBFBwqfsunUbSC85fKdkjz
zFEbLcDK6sTWSqQDrj8OPLuJtko0LcgbPXBGamffi5dwrZz12qNyGVVNy49xbSS12ymJddqKHXQE
d2g5Hofhk9a3cAeLZUezO4GmRnhfH67tpK2KJkimsoDq4FAp4nJJaF9Tfzk5cFjpY2PQ1oJudh3O
/s9ChbbJ4wggh4lZf42lMjK75fxb9p2LM9CMBd1ge+DuzMPebLNtMu5Khd4YqooKRJWpOfzCUwCH
a6kJpmufE3WLrQVxYaV8ruTv1NrMZs00LHdkWRH5uR8ANIbqjieWXPpEf12ZSLKpz71y8sMSaWn5
bIUHjBS5iNu6YkWg3GJCFB3xbBrlOAjDfnd8mSukoJA6KNr7+Nuru94+IZP0hhldaAvzwvfcCEny
kw6oykRCqYtqQ7badxbzW726VKg12RuB2miCEmCVPRuwbu9ydsw/b12cTUhmSd4EwlhV+Jy4T84q
KLdCIuUAyixBwMCJo8kg48VqPWNWLKTFyWjMbK6KD8YShgB2f9Q3Z/qCvwjRgOddH96uonVZf0NP
nA3P7wt2fpurLNYD9koaqyOvliLhI/B+YGv6JwNX9/E5Toz54hh5+8gpulc21gkqoEsrNnRxjIga
nsW8JWGyXT/Z0sB5nrlI/6/L/dmBPX0Le9H/cyCXT3zFenjcW+XySB7I1g4sRQG4o3dhc8KwroLk
u6sbWWoa+MhVDh7rCcRMQ+YULfjbP/Zr+77nyptXXfBdK9MePjJ2S70vBA+4VyGl60k8qmHlhft2
JREOEZ0IUUmBwgnwTXG1W9Tvx6PKB/ru6blsTSK0Wc+NW1BZKHYeoZIc4+lt4tUwi6zG4yc2FCu+
AKJyES7gzK6TdsSahexJM5II7PS+s+Mcnj7Ispr5PlR2SfqoQ45laaAozsgnzh4t2VfboVvgQ+YN
U4X/ch+YKCkGlCZNQZHg7RgtLcjqegQD42F520Xgg6Z1D+M0WnAGaj4oQ4Wxg2VeJzko5M1pz/Ra
mND8x5Ftn40KKwGMs+RFgTEiyxMCeFxC31QlVZn+KvZZX5QZYalKRKEp3I5FDnqUV1fiqJ+Li+SV
nvsBAXgV4us6dlzI2sW3qnxAqyeO8AhDPowHdYrG0Qzzwxj3xsOIhkWFA9CP45OvL2TKLnjsIINU
5TU9rX+DfvRzdyHJ18Bx4Qk0D2STei/MP5wUKLUHZ1gShCAd316hZs53IjQC4vjdxl2StkzRpPsk
/BaYW32HdgXyUGWPpkWjvAwD16Dnzv6xN4cFfmxegy3+5NaTr8fSZIC/jyI66wk0cq/cjuqV2Hdz
8edvMxnKaolR4UYZIm+JaWZaveBxVLzmiBxRfOQkoamKrpGWFMtVSi9c3ThigwGBhA7EAiVd6XGn
DYLP3pP5hQ6CGctg2HNZXPCVAF+O8tuHHM4AvwBNbWptet6v0lnF6Fsyg5AxO9Z6NyvjbPDFtc3u
Yw84fSqxnBsXPYCQJ1ulpf3+ZsaPSN5qv7xr4pYE3bb0qfwYpAmqgHajLCtZbnolWoW4EcFbjTXk
q5a03eKTrrLtXD3q6wvRO2/8hNpjqFbRgFWirtx6d+gMpL1lPo2HB3P4pKuB8oBIUqMbC5XFf6xb
3ObOykDbrVKNJKt+VmZydH7Ebj25V3RZSpa7+J+N3n/0WbwFwvBxTjWkbTZkuWiuALw7glnBosHm
YsDQ1lxfTT8V01u1RPPsUtO5WedmkkIw1+so19RJoqNproPJ4r7sNTf3Pm70C3SCB6MEw6wAzLUx
YgLRHKqnafk5wYHXUyV7CY4c7kYNmUx2x3V77glfu3MnPdxdgFV8cRbG1zowe9SUdJoV6z1wFY4V
Gj2Nzxoa/B06txNV30LEDFEv7jPyhEuN6NmMi9+7ZmV4SV7A0K1B1Raz6fmRexItxN96swSgsFTP
h6H92L8aTxc7uEv7ubk0nvyLrJJakGPnl1VOahU/rdAWu23lXRgAcH532KYSZtNwDjurmyb//eqM
zzs10y0T90EknfMUsmqaOC9OV1x9ybt4vE/+J6qLYecsMumrPVcbJ3VI0pJM4MCxYrXbYktykiyT
h2E4w473SU/TEnwvgNa8KJpadu6dxzhIozbHZwRa2/OKIDTt2+vPg+/WjyUlwqjGAkBh5AMKgeG7
uOQ10foJDGlqPNQV8+NYQ9gx74//BsKY+WsqgQ7XNZ20TsRj+CFenCuLMIgGIR3haVLD/VK4XyNY
Po9TiOGZmJLEqplI078YD2kduNbcrEq8CxdxgApZfFB9IjavX+ej3hQ/af4VqPUkjhJC7S4BCmAy
qFCRRuMuVbn9L6Uki390MQhpbdqwHXcQJPRkzbAhWXqbrYN56Cta+LEqUeUtRY0JTJByy9ojTwFV
G+uTH2r7aYLotZJPEogkk08JsDD/9frW5WjSjXYOicuTaN0ozj09dvI6601jkLvgaUXipe458HM0
RyT1uuHIipfClFNln4z5f0qxHUsYIwAN4cFlj9sp6kqqocMWFDTf5fvj/nszn7C6vPXy6eSkXQAg
Fr6WaUWRQIUdeSuz8UUtgu+f5daIMfyn8GyyEL+W5xzjX+moCC1SjizZRg2zLozEdThS1GxUKBlR
S4bkdBhPrtkqp49fRO25imXEICri1w9mzR2e8ODene4wCC9sMuDBW0DdxGWC/xkeMmt3ZHQWh/Yh
i1vpXfIEWjmJ0R5G/r26lmD95e13GRrIMdXfKWuJ//nkZ2p+5EmZXP+YP1qfWzPjylpY8YQvkWuK
LTpmF2+T2lBV1451Dofz2xffXneKGt2HQ74oBnpOUumaLFi8745JLdj10k2TMDttikbGXrFmjNS1
1KrB8vgSBjzyqpNvT61aATpk+zIqntW1pwaTCFoGT8ejs64WW7hfin4LGfo4xGVBs74IEAi1g5DC
Bp+xOlYM+z0uvPA4eNyTouZ25SswJQ9lEntESrh8dagsKl/DCkdiD0S7gCUA2oFacIN0DC7AcgSO
N0h6Pwt1/1f7c+1FwM4yOsV49j0CatY+WYCsE87I9/guNlf519k1UDCfhogGkb8CHo88++cWTYno
lmPxg0bYN5r5YDCedS/95x9Fm4+KkTF7t7UVFD9PmKfCMcNLAB+qZ9wNuDG6aaeqMa859C9wTzHQ
ZzMvX0Rg0YzM/Gmu5MgtHjNPnVikp0VYV+k03MqvOGorRhcl4wcSbLemcP5FELZV2dtCVSNA63VV
OVSdtHO0uZ6X2FpsDUPzZSCrvLlCCw8mWTvwUnhvcQsvzAYq/hKwP5KNjE6UVkTIrgFYvxJk6ro+
9vanlVyJy8H9BqsBy66i9UD3oCJYM8l6bfMk5jnkU+bhMrBLti1IpJvFFPB2CEblw+hU3ekBcMIz
YfhATeyIstKZMMY1UWHmEMGdG3ns6Ks/iI9l+GL+VPBTSw+VYc5EKXoqNiGn/LQFZDitXKSkJYEY
qLF3vKlLnGCMy7GsaRtajvME94eAG5stexTLVBN0ePr15Su2chFZRsywZArGPvTZHv4ATnW39VjD
SM9L0toq3jYNzGV11xHeVke+mZYC/ef4r4WH7KKrHt+IMIeKkP1Od7O2G3nc2JfZ/ImaUNmA0tRM
kxKj9p7YoPqPpffwSgCiiGOZFc1meh5X+lFkJ9+fLcizuh3OWIeer3bLJgJpDOg8Sr1a5wZ/jkG8
X1I9Npu2+k3FwmsKgXyau1P2wy7K68huvTWLhlV1X3/0vxRuA8rxnUp2T+M5dCKkf7QnnSm87pAC
rG3r/s5fSH7UovMTRd6BjcTX5HxzRMaRt1/htPzEKKJzljbkIKyU+IvZi3UCZG6Ga9WSBd6QFnUT
z1FHcTWzYK1zRkdNzmdsKruj/Um2Q4WKyfCpOAD0IHfZAt5NMJ6gpxGFm1ExT2S1p97DAeJNq12q
dgs0pM17WUfrXzrXeUg0o0U/PQaveAeyXFpmVHO5HgMZgaeTPmbEndnyGeIzzjhzpj6vJgQmlTxT
baxtqtWBlbbEz/cr0wNPbldpmGfJOXemK6E0HvPHcOTamszDOaDwJCBZf8mi/f7KXK784gcLsLBs
ZwNEEsJpQPnGgt/aJpFN9havC3veKAeSIx/XD1B1SjzwxDopDClKoB4/z9gXS7mWm1isfP5U32ZI
soZdXVWcMPyl3ZHnmD24PjFSZWTFTLKAoS2UsgqXDGrTM9nWIkio50FYImjtwRqWo0v30iBXKQtJ
96m+Z5qadF+9mIRq9WXXkCPs5EpVPtvxMCB7qVhBOvvqYroF7InKYiFYNQbrn9kPqohbQLQwgvx/
jjCnOCjHo22delUZH3KS200n25ztjo2vynE0028NUNqmmFq7v5xHQXeW3O5dNmjx9jyTf/3KxGGt
boSelZZP388KM0YmHkzd1Xmw4m1+8Hcec6/O9+93s29rantyzOi0qHa8flyYjp6hHqu0XHYsbBod
BxTOybulLTh5qzGhrfk3gg8Ux+/IXHKr748S6mgSESD2tGgVU5QiyVbW4RuDC/FhZtcaICPAeP/l
muk7b118tIfOlvmy2FjBW5Nhz2Ksa//VBy3arsyNRD+e8Vp8juAtR3lM6f/A4H2jfMGXGRVbr04n
2Y3Zb3idyxt7HGCmtQRiTMSO3qRJdtQpvOtXUJ3aDWmmijzjHit1UFSbm4o48xBqdDdfj/F1Kr7x
pB/8GAktNyYmB26uo9zpkXUTgd5uKi9BA0DppI27XAqHlexPy06lA7O35XcajyP7/25E/87FjU2d
bxBC+cGHcJvnOcs+/eMV/VoPWWN2o8B3gXPJziYNnjQhzTi2kAFkGg84hKZZ7R2pGrGIy6mv/FuE
OGFLQX9xpHEXh+JIIxRoXrAHtT76nO6Hzm+tG0LDpcBscEbU4npLtPJK8EuuIG+aQUJlmyU1S0zm
Pv2eeo1ubjP7oRDStQlbvC9LMt0XQMbveXQVywj0gPcpurU0JSzHlP9VaTTOferUKtqUl1EwaNQU
YsBFLPhKPvDisQY4rMi9vcxbCRtI+QR3h/jgeZUNh2cMPJ8RNo9/q3DMwEjZxfb9LUKqqF4sS4oa
TAkaSqjRW7kPWtRz5gQblqi8H6HiS8HweKKNbhj0SQpJuZUGZXi6Y7R8k2V4uCXnyh2WdaYISWo6
oO+OD5IzMFOWKWGdIbkYwvUKlOO8EAyYSrqKWy8c5Nv6QlVtac+0H/4TC8JucMUyDclNxLssjYu+
TXKtmj4MN4GZQ3Iw/NWfuIqsWZRFXM5Mjiz8N4h8LZ6yQLzF3gI9Ao/s1G7TbdD0j+lVQVSCInf+
92OrCjHkhuXKEo4BnCf1/iww6ylUOqHz40dVFGTuj13vFou74EMn6j98VOhAoU8tKkOGYooTWwx/
73P4Ern9OHfsQT1lBvj4fqLasspJFJUIZOFWFqqf/G2SNayyHEgKMfC9TBOsEuEPJZePk++KvE8+
81N8CwBc6xfYlgl+lnBfondFV3PwtIhY2Tnc2XttEdb5q7XwsKNCuBRio0w4hgdnUk3Tog6G6a74
SdKCZqNwzp6uzUEo5c+vgXvUaTZzAysSlw3LCmzN1P0fWPmSXvry4ljEAtQyL9sRMIQeoYeOu20p
c8MUUowYTd9WcdPzlCg/F2FLdueeYCYnRvs3Ne/U0WubOshqsNITnVzqAijxHXlWNx1D/ihonVe5
ssmeCudmD0O4Hga09HDcmkefNSLYdpXxdqkfoIVgRU4CP1Rfzy0o1p3I6f35sDejAYv1KMoi0Deq
ruKhwpbSPhMP202nXkVi0PGz9q6lJU49SzLGTOiF7+hi36qwOyeP2NydgZqn/baF6GgoaFTsGuAJ
VFDtjfXw5jIUpGbAugRZoAY5ugnjgXbCENPB2xr4tDtMeUCd47UtwWWe0Skk0OjpLyUF+QLlOBaV
RObSFtoH9IIU4nnm89Wn64+8h/DHiMsiSFkifs+zUnIpEOV5LT4eaXVSQ45YOwRAqpsSYbNJ98EB
qxwsdjYZpDIZJiGRaE3hdwNWbPNaFU6mveOLwp6WMdfXRviWxU/ixJe9yczMOo1SwyJpPtASB3Xc
7b34jMAsAUC/5oguTS1JHbROd0ixry0Fz+QJcWquczIdGd+wlA6/epOhJTRpLdMO6W544GZL6w+y
oCxgM1y7h0V5LRjybkc/qFM9gs4fjj6fkOeFMVhsm2BRaa73/BJ6eCWbfFK6QjHHLZJPZYtAfM+c
g3E3HJPy2P5+sEW2ticBK3/gGYGCrn4IvOqx6TIVxr74dmP1WoNNFINkvOkM3SzeL+srwMYHy95k
hexrcKHbi405QT3GhqEjmuGkMYW4bImqO/LWQh+kY0Oy2kuSIK5TnEkVXa+Q9Q2SBfpo0myPgmoK
ULyEHcQVGayuVbB3MQ60nteEIwVYPmwuHBrtkNCQNpfEY2W6G876xljxh1v5c0AFtzIuyUz2EkO8
NF5wRWXDKEVLs1wyHmuJPDahJ2dWDNU1QwAnS6cMVD1RjytaVmnfkBpUlPjbGL4txEygvMTr1nrx
TnVEACzbVQWVx53LxXChb4kHCDbMt8DyIEM+Qw112UkPpyeOLw54MvXnrloIlpLwwm6EewOfK21X
xlUQj8Mbipq4Kr6SyrwdM0eZhx8ffkDQ/ocprnJ8AJ4SX8a5nhcCUVpJ0+WooOHzT0AxVp7wsOoM
rfGT43bmZNw1bP7fxMGj0nHjCW6lMw1JkNAh0c/oeCuzKUyHIKPC1BcKG1+hXNtVoc1rZQ7qdTj7
/uOjh1T+zGc3vRy/NhoxAUwvrUiZApd7JKts12+WLdpPuQe6fQ0xs6jZSq9T2D9T7gKpiN85LbjO
6JcHt+MMOTXcwW9y0k2yzFcoxfu9lN91Ucb7aytQkVYhAkPqZDWHq1nRtdZzq2gNblf2jhyKaj55
CttWHkgzairwe9hiZ2CBxI+SKN700qv/h8DlNNrJO0IawE9xubEEBQH3uFcsiNySJqAYH0enqpKH
MD62pd8DGVtx7EiLqUqq02ZiYFCFSXbBAELNjSDPfN23Uy+42Z7rPR4KM5hM8eP8cy2gF+dLUApp
OhtN2Qfw4x5w1dslpcFsaujn/LHilLD/BMfBI31VCscTbi7S6Qw0TguERWudrKBZR85kXeOgwAqW
wzQZ7bKDaUZtkm/aU7Da/nVsBrm/MBgNkDykUEInBiYSR68YGBiyuKN/2jZ7/lQ7Zv/n33Ce9vBh
Zj0+f24K/fdRZT4Y/JGyygKwt/Anzyj8io0/dqev6xs5Hjzrstwb6+8h+QcIT+mcGsMQPmIoVLg9
AmSjK/NCINWEC7+8YM8R0XAYEdmKNAci6uhIJp01+WJTiIH3BvZrI84ha7yjq6kbX04NA2YiAEIL
hHv1sUfOxe4KUdy+ICANX6S8+Fs4ij3ROMwqmoAfCSHLffV7oBeXUGNobgLFmaMyJma6gG1gkeCj
pNVAYm4i7A43pzhczgYPnqtyHeIN8NofUVhr28RJynUvV0hchxL1h2gx3nWrdvcPDrIiCxf67Z70
j1uhI6TnTOg3dXusgb+o1EwdrUsUqQosPqTWKPnj0PPZMrWgmPL2k6Ot3JJV7nX98XphQ39V3NjN
UTauZ64GaE7+fWlErdrSxRcVrXYB27Wk/jVrpjVuAVlnJvcrhOWjV8/cGxYTI2zsTFCuA4nwWTxv
XgxFHwYcAk5jrj07sl83Pio2My12wrOvd+j1dMe62PRrkK7GrHo676iBpW5gm+2s5FB20yDUj5PX
Hfqa+gzq4kE7CtXYk9o0KgzAo+1jhfwpekCIEFfMoq8YLQNm2AkE/Zjb6b4hKawGTr49S7tR5kRS
lfpFnZcdTuGs2r5b8R7JLoNaJt1fXVwETu9qcpPyCP2GdAuuQyYu5vcnXIni0vgV0EdjK3MOCtnC
vgjRsti2OgNuyRyeQgbuFG9dJa0aSMY4no6IE1Jn0Cz0yHHkRyRb0+3NYAWYGhuDeQ+96wfQbkUs
vZ/H0GA5V6tfdDtPZvJ1E6hn7GL2LSMlNigU8clhbeb4fc2z/UQddsOsgVXYDWGDSzFuqX8A3SHg
89HlWv0D1DXrqSZAbWqjSNf/3a6+o8FhRNCPQq/9tFVjhNVyiyOoQVWY3MAFg3aO9DSRxDdLNlbK
3dK5LuTa5lahBE0WtuCwkaHdrLdChGmbw63J6usIbBlrp6vxOYqU9059VZjmKPigQd+uGUF/q+5L
ZgjtG5sqBVk9beDQTJ6fAILNrxh8OY4w64ApMvKdZWg5oZMDMFkAMgLi2wYYo0vPpUBZP0IhWvQ/
CWcIgVTEhOIco6EKQtBKcJ7zCe6MvfEcCERmn9Jh/huQVNsXBe53rOwFGU9qBD64PYcnoZfuBzSk
nVbk/IyRk7Xe1sS+q009tiCJFrlelQ7b8cikBYuQGKHfy+VF6FgGffJF3JWxfPowfBoTqzoSL9tE
f7CxFb/16txmalNKhZjCflDaTEo5Y/jMzsL/D2zLDxubz4TmV3o35g4af4HQn7kqAI4krt1syPkT
tyP8Ovo+AIFakR1UzvdcfeUad0e0tpRPDoMbAoqqPQXsNAP+S4fmcAFdPEaVaJMsIWplv5DCqrw3
NnY9EElk7XFxsp3H9hESZYeHzlnt1Vt8TbQusWJ58YRhJKE7/YwdAALdrlr6L2ZMMV43Rti1iPNF
jRM3sgO1Gdr3Q7NX5jVaJXPUf2W0k7QQ1N8REeE6+h6hnBXBpq7Ch+Zybl5pYMeaSpEOq5GbPUnN
5A0EPa+a28KsgKgO8yWcPfQd6+Ps4mUSkMino6N7U1Ys25HE+UWYv82cV92PM54J5xM2j9dwOUy3
fpcwfLpF0vPHCcaL6/jvcztvx63oyAfoMvceaG4oWFNoNWORBe/VmpZKC0ZRz+7sYfTl3wAf3KE0
aeYymR7ljjyJzKy3Tj8lq0E/QQyW9zdKj2NFtcQrRQpId32M1eC8gkXMzUcvlGsssPSzbdXHtEKy
0xf3KBW88CpHk/y3VxqZzPvTWweEB3kWn52T9Ym0bb1xAPcMr+FIlGLg4+8/M+kgse5xqIi5GTHk
wm+G4+VJFI6Tp484JV1VpWCLHEffRtjF/4Wta5+KRv8IFgc0wGsvxmfuAr3/KgClEpSAJLJnXcUn
7oSJ0ogs3VcH7eSh+CoFwbFCXR8uO91nxFeVTOq33jb9vs622LCLan3qs3iYSP+pKljbvUqfqULr
2rrK5hq3QFR09M/IIcpL7zZJbFV8BFBpFtNrQ1imzc76RFg/ZdyUi7vTnL4+qIqv6ujL1crQkmwm
rPyY3RLdPR9gYQM89yPwbJ9sHZgDBsCRrndewiXhwcs1TvNdimV238ZCIiHPgfkhCdUecTg65IsX
ozOu+e//aPzreOcQa60bX/61B5c8gamh5jrpys68KFLYFpYOiDfFqQddMEBWGApdPASo8W7SLjah
4E08CuUP4h/p6KYVtf2wBnFywr5POBJDq7yC5SA268VvRcHjhmM3beNJDijzhG6g3ExB+EwYXDGA
q4w+z+awDDuPkEM7RH9VaK9TZa4NZkclWfXW6MkB9H+3HEKUua3OloqByjqAlKGze97nzTfjEPzd
m/DCIf6OfJqJScz6AC8tRTLR4hIVGoxJ1GrmB6g6tP1AhLwWOYqJmzrZy6DSxKh1wS7TqsPzdxz+
9NN4Qkxg/tHjtDatC+491RTvqT5oiDG2UPwZv3ufAAwtevXB+jZDIzPCWxQ6Hi96WOLki43Y34NR
SJZKV7rQYSfHqIbNbNfaOonszj1wqY65olnw09l8lAG0qEMIAYD/eSVc2abx7R8rG7/iDMxhV746
g8TXQQfG3T93kg/tORL4UcxoCB3j+uj2jhss2yNKhWz4dAF5IlVJu24Ay/w9tTbfeoWKaIyuLjEs
qS304mhvTJ3kowXqc5vvLVRXtJSwMhVp5NfxCefaZE6kOJj+RWDMIZfqtf1DKHLn5VoRorwyVuOR
L/qhVHdfjzA6nw3YOSqLdld6YOFKYTgu1FN4S7r9YuY8wrIrrtBAglZ2Kez4EwEHxcB0WU2czpmN
6QTT5B9i5pSrykKpySGtYAsHD9MjsWXGLjuKVjKUNbTfkKdom1eCiLJre1A0dr29/KTIQ1dOtbcb
wkmiTXam/C21CejuCHGRclyEcPbSJDnnR8V2pumXIQbOKRki6Ci+ZoAoQFPpWfy0JiDEh59+T5SN
kWsXrJGMJw/jRX2cZs/Wzvo1GA2rcXypnfh+dXdWsxQ+U7GQM447D3wBAi2cT9MY4BMlHbu0G5wU
upW7EGc64+nmh8qKV+3dmDn5GWLBYYb7I84OB6/szvLgiCcOqbzGIX+MIdXIjCILvsONhyp+vGLc
PPjmg3jHE7UobcuX+AMcmbT1bvOehyo8vSrPNxKaJ5ihvObzjSwPcGqWp9tJWsciE0O/mVcq5qG/
4hWmZv8DF/AZ7WI5JXkS+WztLck8H8sQNs2YFytavSKCND+XhqsXr7mLENGDGcLdZ3lEULSkXHJi
gEMOhvXvJEMKpb/tIMRaJoWqOf3b0qwn59KJ3cILcdUj75G/11bnIOP+XI/ZdT/E5u7Is4yNfvCq
K/rY15p9wTPJbK5VP2+EqqPvLiJ2ZP+IPGxP7XyA6e1fd0f6JJEaqlz2clxMsFBsUGKCwMrMhqpO
2NVM3KFntW6sUQVc7xwRhktLKNWNEzJ9ha/4dkbLDD/Oc6xwmIxoIwVBN+uPZy2IWCCal8gJlYQb
VT07gUTnQGkiJRCa692YM2Na5IIsU2XerOCqXWolWbCJI7f6Eb3qMOd3fPupdWsSU2dqu+5FCP9h
E7tI7LgN4KFPbinecaEkTOj9hOCu8aOpKZuGrxje8qsuB0/KvFgwT0HqDS+bxHDXViNgi9Ab+v0M
woUAomS3x8x1BO7ysp1aVAkeV/zLSmtF6U+kAqYou3rC2uBLZLORtoM569RjmyI4ZDZwtgv8F2WM
zldwCmjYfitj9MsX+rMSvm6vOAm3YI7VqLsoBgqi724EKraflUTBp/QAPKm99+ILlUsHmanvR+3+
nPHGCtjdxnQQsq1ugjHOu2PlfGx5HyeFypx3eW6ckQ9W4qo9GSEhWUzAnMHaq33rR5hNHRa85Cu1
L9MD66SpbB2e3LALoAGcJ46+rbjtRNSroyqKoSLCCZ4mG02r0KKqgBU8rw1fihJLFGeKipj+9UKH
V+X0PNQVRAxkeHf20pLWC42Ha0guyBOHq//50Bf2PF39/0C77IykXkjwJzKwGxasrKTBm3w9aHDn
p8Ayg1oMSvTTfsH88R2FZqt8ZzXH6QZ0f4gWUB74XtyfHViyjVsN+qxH0s9IwPxjVEHNBaSdtG3g
GXF7svlY+XomRiWzM318cyZkAG5nJL7tCWcdJvt3h3p9Styc0YZdtUzrZz65YIBjYlY2DIsQmsZL
wd6LwsypasyvjR7LNxFF8oEtdA6EydIKauWD57G8iYvuHub6PaYgBTT6sK3RQ3CRbcBlqvFpTQ3h
xKy49yI5DNvjLqbWSg/Lh9WtJBpRV3uChfECqDYjC0Iz9zeSpVplI9uobY6JgEFTzQ9MFjnMhfCu
jQ9sSw5IQJy8KzdOvL0AZqzMx0jPQkCQIclUtjpdrfDelnRpsSoGmRtMSGMotLZSYsoO7WYyosDO
7bVw/mOOE9I58/Xfuu++oB9efiCBUxWK1pS3UsZU/RPQbJfTZmduS+HGNYoT9JRoCKyG/DrBf3Ye
jext23gnSCYtUVUR6RTd6WZ3UktZHTeHK0a3oMCqWxbRwo3ovi1byH5TTvgT/ujpHuXjj/C2sCH3
p2FvAXigAVG+XMGefDMrAyaPc1PmpUx05tY3bKUI/1B1mPaydNgv/otrmElWMVcgRDGQknU/rrfU
BO3RfpjAKMEw8fKGaHUNU8HOPtfYWb9P/pbNOaYvWSHhK50sIFgM+LYqLcovxf/DLnGugXSSsUqT
fL3eBc/ftBXb55O4lswN6McLTduawg/LmdzdDspfO/ONtn+a8180jlmFx3orEQ0GcMBmyU5/eoeH
5QmyC0sV247kJfOUO3qTiacoMTOYwa6AJaEvHFwhv1+1ox3XCfXwSpjPzxClrLniDvsJaKr1kWdu
IpLvAV3SYToW5Op0uNZ7mMhSWj7o2nDJPwimnRJz6CIz4+U00caW5mHGmU+DutPzQ4FdqTy3mDul
WvhntFF5iFvJSYwvJ0zqvtCflxd/Lg2Hy46TG6eC5fQMio4vgXY2q0+sC7G81avCqU++LC4sxptw
SnYbS9FDz14XaHouS7EUKp/IdEpl0Pp3wonss7IEkl9uOc3UkE5ykA0fZ8lYsOs334gKYpplAmLQ
y0YBQ/7EpVwyTU6S+x+BAETweZF/eBJokZxTfQgvcj5YNWKgHrJxR+fe18a9nx3N7wirFa92bQlO
KJLAiB9eEzDaRiWYM7MB7qL7ngMk/K2CYvFmJJzNfc3DODp9ljCnkL69kh+HJhEYa9Kb3x1EHlCC
saxTlAzK6MMIrLu5ENfQ6YgYvDaHXEr7QD3aEwLw2VP4yXkaBpaH+ho5GySsbLSKK2p9OpLP9Fmn
uTOtCwRMU8yYiBcLBt1pek5ZYMuDl+wxOqx08t/uk+5COKXdP6YLUEgmwlkJgY/PM0PxF05D673J
HqgLlnDPAAt66i0iZgoTj+jpLn/JX+qks4T8vQbFBLGrMmHdAQWgwwid6E38RjN7EQNEIg+BSUI4
wRh0zrypMQsbxcFzEKCHiY6e+RDUaijAj8p1D6u8P3NtYpW6WwF6zyEsg5N58oCBGmg+4YxC0zzd
22HuNvFlnwlJobcnrjYJ8y6pcldLFNqNIVDHQvElU/kQkMQBOvG/+a32gCsx71WEvJSqWtykBBeu
HLudqZU0sSxydhgeP4tuHePR0XnsfeAej2lkIdadwkCD+KhCan75cqAg6r2pDN0du0Z0Xaz8iI9k
vvOhG+X8L9pCYkytEQbGkv/Ow8VB+Lmk269bQujGxbwb6D3QTZWR4vIOz55TOrxJQprqrGYA2Ml9
nRmd8BF4CAXbJ1tkjpAigdanz0eQQBSS4aVyaEfJXf9Ix4GUQVxE/b2ifsoJEtFyhjD/uAFQ92cp
n6pqM8EiGV34ULxM7+c/eXE7S+IWalk0AlWKG3+hXdEtAtWe0u6JDi5r+CNYit4mUwn99UuMFaMl
2Xl1ZzMbeVk/UnwrhU6QMxYBDo3Hg0s5+jngdxWp6Lt1nHUarGzWJ0nsEWXgTM5aoLYPr7ES9djb
A+yu9u2SLaXP3qkyUxYui9faojt1jDbzKn9jMs3i71g47c74mzS76292h4SuNy4RUcd3EhSsVTC+
jAJTbHV+3ykOiyFH0k+atrgDFzButQUZOoAtMqinQ1igRZNR2pVkLkXQMGCgsu69nzqy7goFZ80P
lyHU1v4e065UQHYEzcsvrHgjMLr3mYwjXcGrQSflrMUZt9h0roZJmhb7JPTTq3hw1/INiRIezXBh
xzfszaftaODjsGTTahXlxoaksm/1p9b1ENR33kGE2uRl0MX2IrE2PtGVIZOP5+cnG58v/u2XZCGi
SU79ieZwi54WAdpg7Cn6e48cRQAQYJ5aRtd2GwfN7v9rg8u+iPF6UH4lBg1jA+Jrt8ODj8nZRTYo
SCzVIK29udbC7Ze/J3xq0fhXzgyNky0rt95JUccYAYsvUl+u5ghyByQEjwF0cEKg3HUpBLXFBZ+3
v10znNtKMvaNgovbZ87Br0xAYqd3VDTFfHmXGDt8hAIz08VElYL6Ej+ifWNrRPLEW1q379hpe/EE
83kYhTSWfy6oPZNcBI+5ardupnotEYQWmyL4M3HmUb61EjA/H6LbrMyz4wLuRzSstvLkoLpvxPQs
3qAEdx0Aq24UBLuhcwpFGfNw6ukezigBlFrhPFD5h9ec9G8A91OLdZ9OlI8PErxlN3QnMYLp1GT+
Sktyvk85OcKLup1hEmz5db6Y63AbAS2JKLJ8EBmyfpULJ8JhcKbQXkClBy377AaOd8n14Kt2+6vX
0s4VXZiNcO48z02L1xnoX8jtO+TYb+66At9VqqxnGRF+R5sCBIKUJLb9nKPxDsvjyT9M/OcYC0Z9
Zbs+MoseJaDHlR6u7i8KesE2EJ9fhPiVK4ZWnDcTayBuesfvQMI7lkqVhfsjDDr+50sx2SlxP8E/
JzpXzSL8oZ4cuW6qq2sxa0DZLF0mUQ/TrGVnUV/3PPJkxpm/EAKqSCtAFuCev4doFZjh8OeHuq6V
NezUWAPmB1kkNUmBufSf7hE6IfulZ6CmiZfA2aIemglWCvpaF/xtQSxDAn48gLoshfPmN+G0ZK0l
tG7tVoj4qyfw6rO7HhpAZZnbYGj42FfvrcuX+JWCkQqjOC5GsRnSXVr3I68yAzWkyp+XmA1SYjpV
09+PRDVvGVwz4qAkhyvDxNqUv14dCOGksmbLyA8kOUPZlAr+dBOX9q3PAZTEfH+fdyntN+OPr+qw
C1cxDQ5hkUFsmBJWYnDK4m/GRrKlHSIgntqydhl80RhfGGBxTBQzo+rD1OcKZIwbpPJeHwTzT+6z
MYIqsJ/uaC8RTwvgSoeqBoZt/wci1AZzl/7qEnp+Ikj8ignnXcIElwgaDXWG+YcXv7Fr8/4F1Ncc
JZp6ZO+I3ReKWrcP0M4C/X+bTI4lT80NCilITar3nn2Y9dxBVh0hChA2zt3yFbI6NuCs3KVC5LbR
LpMNq3PVZNSN1xm6WlYZwhZUyAZGp/q66Yw48LRnEVJxHmmueVXyrqmJVD21PqH3PhTq5cBoZlwm
XGSHc2H22XVomuqcorLfPybQPi60YXPrK/Tf5kmO8t/ajrxvnB3UrYc4Z2FMBZfzgkKarq775DiR
OXBvLvcI5m5zc0U3uvaRHCszsqbDfTqINrJfd0HSM0iky4ukqZw+Yzk+SrWwEgzktRgb542rUbBA
pPsBpBlToqwSFEdAaaP55JauknSgCNWDX69YOlW0DYxfUZClYmaDy2qFljVCwK55ibKZVU1xs5GH
RNl7t9RtydzTyiBWnNg/+hjKqwxQ2hnPZ64v8Gpgg80xKl9POoqotsdWFAOx5x8zOCgl32EgosL7
YtRq0gAawtZma4JpBaSq2mtCnrWEJ9SgpSsU2zMvY+EkSzlFlju4jPvbc/1OqxSa+z1NFCPvgpU1
8d/18DhIG55N5qtvji4olU6PkeevoFoGTAaqKHxKh0P+NducxgLzB/RaFh8F/k6hJZGF4stLBKOT
Fn/xMQxkprUjViErQMDKta0QazJmBlgyhgibIbLLjywCs7GJPZ0kMYnB2XCTxAmKq62qPpMXaRWV
vbLvIMW+AtXreWXSTnW7V6Zjey5wlhXfFrC/ycnze+cICGulVO2gRbegKZzs8Y75WF9H2qunjOq8
BoD/Mh/W1vc95nycKadwmxWCjtMLKkiNr++ODkNMATmgfxIWqAB/i3q7yE2VtkOK6aD83Qz73sWU
YFeCJovBw5hecKQIVrMl3mQAyDA7s9kncw1tE9jiTnJ/c3vCmNgxvsv8pveRug/dhYQHCDkL2EEq
4bWuP27wfNtw/KBtkTMXiZo3BxBLuK/J0BVI7yJGb6vF39bmb8851mRXjGqZRoloRrr6neniwxbu
L8kYSJruss9LXAEVCTI6AwckcZc9PRPxqzXVHAFxbtkUtKWFa7FLyfJsO4hdBsHDvGWSOpmmdGAR
enESLKnXSJPiRg+n1SfIrXqfHFfNYeHCxqjr+yfXFQzW1mT7eQWnHAAuQZz7DKLB69bSHsIKsx5A
IuEtFIR7H4+phuEz6bXwrmDjubJEoSnHjMvPYqt2ZbC4De1VThTCc2Z8MnU9DbNY3bfsiM3tnYaG
1fSe4dMnapKq1da5nEH2Y6Y4/BIrtUQOhiJCgRkHJbF3aG+uNY/x3lBqglpsKK8d4IBGlRCD+PnA
4jhjaJ+HtYJ6e/00IZopUyI86nL764kg08rwlSZZEIO54lAM208DQg4d3BVPUJkwrc4PCZuWAj7d
/tCiGwgyYB9zvTviB029uTTMV7JcJCm7y5vHLnaSBvHXgI5OpXmDONlGtSXbljIRTfjqz+3JqsBu
z5nLQDkgGpVqU8qXJ8Lv/QLfe0MWuJsvTvzmEFyRPNBnbDb94VZn9vCy7WnLmjuVoyH0EL4g/lb7
LH4TQhhA2cyeRSH76SkTk4Smjd0079VnTN9QEJvp1G2kkiegq6gBe+B9kzz4xT6VfaiH+6vTHHSg
GH31aZchHAgXRnizOJh5jUsMFfxscplf6MEgDX66lyHZY2WUBXML1t3Ph2ukShvXeBMgRQnJ61MG
3nT4QRYoWPDuNlSE1tyxFKR7GSwA9kqQe97GFLfBWCUSKNjjIJkMmHMevmn5CYFluQpHl9FEcaAU
ZFywYWWaqjcHUeeLXrWKnzC6+1sxRLobzeN8jt85GB10A7CHw+MoAV/Ly/7cUCayiNdoCgC3dC8y
wIN1oG7G6wI9+1z7PV5IDjLMdXTx1vWTEH0wBqDllWIOpy1x7a6riI34rgNpQTf2zFhb5kp2oTwo
K0B6H0ejNyaqKMXGd4A1cP2yWik9MbAbDagzDnyDSC9zYlAC6sXH624clAH/myW/64paDoou/e5F
tnvnIxterdJhrEutFarfBNdIefh4wC8igig5ieUhFa0disKOspK3Oj2H1Fkap6WFLVC47wFmcmxn
jt9MG7mnnPj8BQgBhthRwXXXr7uKQJb5/NQ8nf9UV/Eztv4zuqqsU/KG/xDJzzRcEyFS0gdIeONc
kQRVregYLIZCv96bAFhf0oX9Ujd3IMDsCFbfKLj8owVnJ7ax9DFVLcIcU68ElPLv7JiiQjIgU3s0
7sJ9AoHc1RGHyGpvgA0xKAapehGhIE/NCxpCLVjWL4LuIMDb9n+mQVFKGrABOWR+JOaGulasdPvp
AFiM8TbgAejM2OWERpUEu+UrVbYJYySwBjRtaVhMQ3t5j2Qs5ueGq7ok6vsVb88rL4YwUPXJQYJ6
k5mCFLUk+AUQd+KBxSxoms+qvhe+svTlKjhuGagQ5G3maOUJDnBBYznROrA0/8yCQX1BfAXlJhLz
ozyexAA6RYQG7c7+VxzlosN7k7+udjnYB48alkEV3iJ0iTHpeJ7XrR0fhXk0NKliOweNi7fE476W
MB/raaZSHYGqvuKETAIhNr6u2iUClFIKwsl5lFZ/X2qmucinFQqNjptftnBCPH6Vwyz4P4hw3G7C
VyWz1SCAprtPvkCaVqYtY6HrBubdbpMFf3BkqQjYyncL0TisPwqP/2v9z6NHUp4vDqEHSkbA9uKa
n2ZdqBwFDsjRQMlwUprXtPmL+nSLVLDjN7l7O5/KiV4+FQcxOU9R5jvfiMzHzi9P//WstU9VizDq
EqN3Xz2hJITqV1OkSuKS/nHya9YCRk2GCOvZVOxCf+oLV/SLnzUJZEHrjKCAxu0JGbcAIC5Ixh+J
yAoGsURi6iphze4Us1FYn2nvSW4kd6ibElpo0untVHkvvrdXlQMb0aZSS4NWHUcpU9RxPdHSqGzd
GVkE5jnu6VhgtB2ejVXilrmbU7VgK1yQDrhIIBsG7YnfD8PqAv5dySbOMg0Rf35wyaHVm97+iI39
sZfOXIvv3EqwPqD4cZAvu83YZaVmkc0y926oEgjMhjcFyWZTK7ffoDEs0eEnVNbE6GKB6M2/AJs7
ePYtbvlBoPd38ZRaU2e+XiakYXXi5HywzO3O7ZG/VvzzDFcvdgYrt5wPLKvhJBuxEc5WV3dCVx8k
ER5CEyJweQztixQ5nsr0wP5Nm7p4oZOD4ckrHdmkKqwUdIF14Fxcy+++ZZi8OwvcCV6d7YfPDg9Q
B9Wei0IuZzSIhs9vPWIm3E/QXD5doMRSTBuHrSvlGjbzU5SCbCKAm7jPM++gpWeezWniID4wwHHq
DlgpL+pAWYQv3QzHkry6tDX8vQfGBES9bKeNoZ5gja2HgmBJfAeVPZBbuKqHlmW4tvMTKTcsDLjM
No3KsZw7aV1AxaRsJ71qfXPE1Pzv68uuvDGUuxqo5gIg0PbFs79T1aWbRM1nMLGK5twzyrqLuBSF
uQwxW64xvzaZJX+vJnB5d1DfFz9oAmtfs6njUeb7MbN5qidWX9PD+Sjx2l1J5vZ8FRiZLIl6jU6M
CCrTxHKdadUr6VcDXWdT7A/oq9uCamXR3oKn7QdC3cwt7nhMbxpHPTdDKXq/9YmUO/+h81cO63uP
axT9frQWqUygjfO228OhjTe7FEidlsgbGUokK6op145A7csoObvqm2t6fdUOR5lWwrkeDySHmslU
Zfucj/2rsC2v4vxw9R733ucNcjIbQT+6DyFXTJ8+sV/LAH3wTlJAoBt3eOBy/8h0uXFyVAMQpsZi
Wmc5ArBhpUC5WGCWavUSOmDDXRuEUywwTGAnz5PDzAcyjRo8PqE/SGgzfWyE+4+ErfBCzPWnEsZv
qd5Jdj+Nv+70HsRKH4aNLVJkttrf9aidUwa9wq8SOhQ4vEl8VGpO90fi0kKI/aL7eph64N3EeKth
cyZpv3EJ+E6naDe+mVHKj+aYB4iMBRbfm0/gSEj7nUkgjYfaIfbMcRCS2Ph/UG9Jq1K+AQmsVFWv
ah2oZvzceWP+J9tenday3M/LSH0auikzNd25Cb8Pep0U3wuuIUjzhTnnkn76Amlx5qeyC/0D81x/
vjfUL8d2QH3QR0DcDvFAvIT9NOtvnfvBXsAGoh9QpXI59gx+K83CRG7I0Cf2WNNNmibaYC64sVYN
rHPIz3J/6csm8/E6K4kJQiCKZsXW0hIgRQq3LXcxoLFvpdiW3XjkhK7S8M7hP1yEe/cGoZgXCrVa
3PRdcYmJoPQCLiX3DLl5n9zoP0+umKNQyY8nzG77xMkFohLDWwHw2O8wZQysVMALBTCTaVVFa4vI
j7nwenjJu3KVr7gHS5ga1wfKEz2srRyJqvCTWg0tAw9htKAEGSoL7uFTnuV7THxfG29t4pid1pq9
0qY7gQkItkhU/67sY5i5tDdGlN4pFtt+ztSx7+QjypDeEg3ZxmqLuyYS9IdnsYvLBexETjBVRZaQ
j0xg0HtpNmE4vl0U9V/Pmf33UE56qeAW/SxGPW2VRh+DnyWqQOdCcHf7xmehKuxgC7rR1zXYmO9d
Niuk+HuFowDLqCqT5s3SvuvxvlTvQlKimrz/vS2E+cRiaw7pvBa0PmsZKKhOCvAYwcf/vk+ICldm
EnuBvv9Zbze/nhCMNIhJY9RWRNYrSp2rxGO4FoXvNFrQgBvVaoLzZjxJWO0B4PVYsrpTnSl8SNpO
ZVRbRSGn30XFydeeUGbJ3zhQgVnChRJmo9xBKfh4kz65n7Rb7hxkxc7KC00/+vRNrvahOXKJsx6t
p26Na+R5iBRiQDizRfhqkPj6QLxrUlRg6f0s+EIyTzvj4e73eODedDxCn6xJf/2by+RpqbQk2tKT
ReYTHeBqx33ZxIZh2ryCngd1QRgxDyGhfybOIUKlY+TzfGG50Jp1pHgXbkjDPqy0OVzBc9wHmHjG
U6YizLudNDsdkC61630Pl7sWWPmYZVP97T6LB41201oTrSvy8/l4rw4D0L1BY0tePzyXc60WAuaB
xQdmWo2z3SHhLqa+6EGPMGkNLeKeGGAkg3/42TqAVfNIPndfd6n09cL0+xExnvQ5CRR5GNQWEtP/
J7EZMwU+ndr0pXfRtG/1th8WAkZsR5CDQvJG9z2xTN1IfTDU39puYrypQJd8G5BbI0eUJ0sFCGCc
QS098u9S2qENu5zoXq6NlXqJArnyHKEfbb/UXx4Ni9PTVzRoet7jaejtvtYhvZsHuhcPDuGEm2Cy
XJniSC58YxJ5KLKDLd+5lk06WkKnb6I9iUpHmC+FgHqZ5gegq2N6esuipVZgWHVLLbZT4Uba5z9f
mSQ9G5kcZU2JFpzgUhBTjyPspCE8riwMbLr2UEN8aRv0Lv+X3fy+2y4AGJnBw5Rk+HG/ypil2zog
3xTDab+xmZW1ishtIod7Rsv2TQP2KaOeNeUEPaNiJ64N7c6fVotNd3GKsM6Y0TRfD3egQaj3SUa9
SNTuJEqR1wln3j8rxdweeQ7r4ms8OMF9urrFnjrKYdaAD8oqSZ+28BMVTZvAAXxsc7q89iqmJO7S
BGarvqf6v15/z50EjuFlMcLbNaa16RDRwDiddfWgZSfqiTe+hATRo3A1gSQuCvqWoZ9emgf+mJHy
S+jXsxd3CUeRNZfx7XfUQA7SrelK2P/ie3+QguQzAPh0LA8Pg0UHfaD5br9K1qL7gIoGU3ps9ynv
25eh0fSkgpG/ze8J6BD6o/0ETm7O8QW9kybaSwMJILlSmiYsQPANyx7rf+0zIAQUtix7aHD330yh
Hmx8c5b413qpxvsEDj0CUEHwjCN2I5XWUT4snQYgatPBhLBJ88JVPWEiYnrDpcNCtllw6UzFpJvj
A5AqecCRmnunrUWi3ag5y0BQ5BAqYdqMvg0sEYoJGk5ACbzMhpGCSlk1tQmTOGRPuil9WLDlRseL
YxkBGyV1SE8MVPMmnQK3vWnDZ138bHq8Tm8N2GHFeOymR7fXSor/UUXKJiE9b1uWeNAD/9trUs4Z
7TVUEFf/rLli9I3dpjBz2j/SbSCtCO7DbyvYMst2dsSoSE+p61YZrhhvkrQTHr34VkPHq4ZLlVtq
wHKaogqZfoTb9x3W34nZoXodxS8azmiQWJeHXNFbOPjanoOLogSf7GvTYuByqAqFPvFRLUPb55HJ
Yv4CEvGDiHMArSOCcz6CaHHw/bhelrh5BbPTroGwqrR8MSq7rlghCZ15/aHwdW4Nts3i/88fDtNT
RZXKAiU1bMH+HrL3GTsTGEEKsS2w0Zgqsz2Pba5yWxsaXU8x/zmDQkAzs5Xm4wU9msfDkmOzTS+I
bla3dqiC+xImvlge3fY9vMwp7hJVpiYRHzTKkRap2qGYDhfR9iBZk6ImSvKuJsKOtX++ubtcugCO
XkAWs/OYScC53oS9rhEtzssW4rYnCllWtHgm0qM3h5xgsk/mnK5/E3I56ecgk7H6FSq3Ngmm/cSB
6ud/sNS7oHn382WEcsOF7QQ117XWdjfmCDTLSr9o+DuA/dvs9ehZekNt1+2kygHkOfAe0rZ1R/mT
eQSP9aA/Wr7/NMzbY01EaWqHqf2foxdEDvsRUYKRy7Gog5K0IXsm+cnHjdq5mUcd1V8gGgTrwLVt
tnAn8JJhofYIUDUqmsRDOVrF8KpxwM1Uyb5ytlFiJg9AdXHULuhndL3J0paepaV3oIZlW4vzeZmK
7OFyeyCk456VrPimSsh/YKOpkClq+O/yExpUiDiz+gDKwJH2EXCKQoVv2EM4exMMIpz8/EEULape
Qv7C1AdWAx/U6t+9kAbSzqbs2/T81sJ967D9Bav6vAtcLNPjSBvKVZ8qZ4Q1pUjiNpUZ9kQZnLxJ
FBrZ1FNQUC/m++eC+GCwP1B/+tNNQImid8vgJTdcRwxhiGI9PNncjzKmY/h3BGH033bR7MF2sS6+
ql7TFge6y9SH8tF/tiPLlp/w3rUyspCCMtQmYZDfApN5SJfrH6LyHyiIRSBcOzzAE3nS5/BCPFMi
oEj4eQOsdJxHCxNRKwKPhRhMZBjbV6kgm+upIgQe17RDRhwiwSETQpbdo6Dhf16Cb7W55Nsf0+1l
y2LPRVeMOVEZe/nq86gosAZu2/pezJDVwo/w2SIpYs+TmGeO/Kn6FIA5pd/do7YS6OGdxwjUS8J8
oq6oc3TeK+6XvUV9aM6Nk2kLQh6hFgi5Z8BAz2ccDjAecrfG99Lp1XqOPWQmXspeC1oQjTvrfKX1
SbDzthvf0ooRePyuN+LmdxDTvGf5pEhAoCD4CwDxxAJnM3dU+nFb5RYmrEGBFGFDXcB9uvQEsNLh
eAJu9dTDwoDGwyOTHGIJXSVLEyFC2fOE83RvphTcfq5LYcChEgu/JvZx7FAR57tFDpoM1xw+z0yO
Tw34WCfroQPxxmNgYw+9F1s+KrpeoeRYa+DidFR9azFMxzsM3AE5A7yvMOVC4Ce8p39rAp3yKk1c
y5lZHk4UMwU8cIKCLhenoHxl6vr3nIdvP4rfzcG37C06mT9x9uG35XcCu3PNQHwBsyOqMQUXwCwQ
HTRgsizSTbv6J3UVLm4/qawF0UGqcF3jDGGjsZZkJmEZasUMzyPl48XTEkih38A+e4wKwz0XkiOJ
SnVmws5LEKagXomzKeUNEc4MBF3E5k7VxtTKFLtJEiinBqP9hCrNS5jY1XDnRnPuvBKubryUZZEz
hRhLVbuNNePwzPX1jV1VNpygCtueSiN+LHokKBtpkI0xh6FDqRl65Y2f8X7F/m3ehSuOQGyusGLR
wmO5VgE6d7QNTwQnqSb0RzqWRCd7IAH9O3tATiFwGrKcs2FC0Yfh+qMgJ0bNn2/yquO0XUYEGao2
6g4AwKHNuSu7as1z+XKbUA7ELfg+V142z5Ox3Ab5wesCsA/IQZa/HFCpPhU5fGivuldZ7dY1539t
6Ze8EzaQWDIMomqzaizatfibNHqHH256wrBH33A+WkOP1ScgkhShOxeTMzowHT3kANT30C+ObzNp
GkgQPrENPdpD0K1KcDV+NdZR0soDb5NyZtEQ4xEu0YMKrw52o+nIUWo8vRIwmvVzQNPrKJk6v0JD
5jLz+u/YoPXJWaKrCVG5RX3eiwmJJkEaEhO0eNO/06envx85BITLHBpGB8qtfYsz8zbZK9mw3GLQ
wztKFNGJ//fO5ahqQqGXnY2yL0T2YP2H0dUl/EPKkYdZqfXXkORoep09XbLIb57K9/Bvw/lYkvgO
tMkNTY4J8aVm3tXVegapgXMtGXJzOFAY0d1V5FAOKk4CuMWhN2Vvdz1j84w5A7cUng4u0MKEkjwH
GSPaEI8O/FwmyCMA7Ec4xnLsQmpT6eiOC6qUOR7A71eSI25bxgWao/mjN1AVQ2Kc8snhq2C3fWyf
AJb+5gHP0lcoOICtKxIOxmcXScn/Pi/g4OKoog1Ci4wjprxNSJ4FIgIagv/evCLOtQ87COLqZ+yA
rn8HkBlA34UA/PFXC73ePFPN07oywDifI1ZEdcb+g6T+MDDJKGWMXBXAWPC44V8hi7yEPvnZ6zPM
1l4waS7EjSVFQKx2Ic7FzRR/ZQ8rht7G46YePK95cwR3P5ToccBHOEobIV8Rwh5qopIm7S+sv5zb
GZ5sj567ZCN7CQbgKND+Xz5yAp7iqM2dDzgOG7APP0vL7Y8AOH6bJlvcL2rRgmUBETSO/+GgyVks
GN/JIFgSivJlmTuMKqEQurq/iA1/iIQEAyHfh0/zbFhd/DDK6UemzQNtYI3xZ/LJGcnZf9soPDE4
hgB43O6BmXXJu+aNAni71FEgX/fT6lfwlR8nnLMndHnok5g9gDwTaftB9e1GMGt1UN+3ZFRh97rn
GvAWAe82+rbjr+veObIdD3wpQKhfjCbwix1aWK8VOPIlwbgIRCd5SLaWkogshFCXcCJ4rx7fOBKL
OE7J1IxsWet8lzNnItw45NfRJpoDuofw4hi0b4kUb4p1l5Aa97mkMQhCz+KEK8t5bCv88/V+u97c
x+AXLozg0cdNzc05KdH+sWkxUC20YYtd9eZL03QdqfMHbx461Tsy6cB4YceDONDH6ft3Ofjj+fte
dfkXUFLHqd4lDVNucy7w9I4HDf0/Ppyk/PYusRT9GUamC+L0lJ5LDqBhWngHX1oAWUC1xOjS/DZ2
fK73W9C1NE7FB3KBuTE9QKt17Edfi3ooItpUeeFcCdcXCN59Dw/vPNWo5ATZPcJiiz4r2SWvSJPC
PjlfrUwlI+1u6rgILT0NTM4aw4HRVVVvFiE33bZsVtB6jrGz4uZBGWrMF5B6P78+l9bGBQvdWc6i
lOgGvPiMLdrmj21h67EFylySJcNPIWZq4JIdC3yTiDvQgr1GGIglDf7JuY/xXTigiGThiBGR33o+
lAAqz58vpGQshfmKAB+puep+ElQeVGjib7KAO4DkEjldZz2KFOsJjBfwX1BCMJS7wIaDiA53qR76
zfrYVs9a6AauQll/NazuG2qOB2bHaPbNHyc0huEnF7qXr3OkhhcsYIUVH84dtXMeoqEH5pb6IBr6
G3ndGiHRrRxratZbvNOzrFjbBHU1GiYbA4e606TkXd6mereh/Jgb6DW/Zw/1iqwj4rVmk/iRhDwl
tZjlxZn0xDOQP2dH9/Qe0BgG+dK7UbcQ7xWSdj7rFkI0tQC3BUFaXg3ruAARy4Pm0/VxcVvIYbz5
BJnqSkoG5z53xciKG03angVhlwjuFUKpBKkUu9OZMf9sES6LFCXCWXv3qCVapidMzLt32pbGim5T
/KqpYbmNm8wJAiQM0SQO2RytAXGAPc5jviWqt318ySjeYM/5mql7PDz4Nzp4f6McN90za7hH3nmp
5Nv1nGp190ATW7QfTOIz14DmwvJWmmcfvI8mFLIvM8q/2xNsY579f3enmWtSc/eps7XbzVPIwupZ
yQOM6CvOwqwvJav8qaeAVnKnufuoA2CGES6GGKk4T6Do3MfuTQ45Vqz3atK/HCExoGPrpSTHP7hG
yETYLLSfhCZcz7EO9jQlUgszhhi0trHILXOe5NJ6WJAi2/bWu3qxqhRSfbj5nS1eqcHJnO0qfPg9
rPc6yyON4VoUtUojfm1Y3ik7ayRPdKmJhQSwTF1uE+luRXFeVLw/1HKHmlHTGq3ORD9Xscxc5DOD
MklDCEPqighFhr4FuSwq9qZeluOxuwM16lUBhOGjGfCi7hXpieb3zp1/zQMlox1geupQ+13XxCdp
inaWqSVhmVB6kGgOI/UZF/dP1xO65iK1nKXsREMyj4U26G4OinaSdUU/lY00SVvp6rNyxHtjmWA2
jyB/QNVMCQlH4RVgox+FEcAQu+IBCUnUmaGaUGktFIeJe3zuV82OP1MWgbfm40eDYPryhM/fC99q
XxbqUeZtsaLQzm6+MkxSzCRyGE5DX/r9UrevOTxeIAQ48NL97t6duMMLbV0L/XKQaWHyi3MPra+M
Eo1/McNsKIM7vsOb0J34cOGsHf+n5G0X9sTkFfbrXG/ygPbQGeedZApeZ+BR4Z7pm03qw9rCVJTd
iXfNq7MTfY5lco0RryujWW/3QMlI6i38jazR0LiCNmQqqAoverzLt2kCYLd/tMKiI7a8m3Is6CNW
1p08zdIdsCFKdpcebg3S55RrwAjUF+7yWI6k0VqqXBG866qo5iNpIdydwgnuBz/6QwcnkuhZg/6p
9lQVW1tKRGkDcu5ETb9aop7QHCXxTH2qmM+gB+mk65Ge9dMRTDd8EWcac5dEr5rhtTYNlfu/j+rq
FeHlUls6gGEN7Ecy7KVZHjiAabaZ2Lh78t+FuI5Z2B2+eWOdOIXU1schSfKodd90lvdqRhiF+c+c
j10OrVwcprwxRbCkGIIGEkyaAxANtSKGLLA4HnKglIi1VuPMufXQzgCDPqWIhtzFsAZx/K/45Aug
eBNX1Ci8YeMSvwT/5zPqrWwDzlpofKtS9wYy1G2rtwJSdm0+Y7KzlC49z+PcGwEkjehK5x7th/Rv
/iibUpyR2MF8bSthW1gkM8TXcElUB1aLeTnhklO11VIxqE7dfCiD6Cjfs8E1d65gD3HkTwdCtHHP
j8/dDUdcJuKd09dPFbBPzI0xhmz602HVdwISgDEhRniAJe0ItK+xHNdE8rWO6dL9Yc+D7dXYMEtJ
bh48KC1FRo4octXpTRxiP7VRUqwloyypvIh297qBExTWgv0WICPTYLimdWo1L5HBCT3KPKGoNRmM
lreSETh/Xglqy1ZbSWTaRvt6ysNt7gG6y5dgp6gme0Vm+ZPbfd7FlOLbCwcZhZ2L27mlmGP9anlT
zFPxUQDK+mlQAs0O1bYS+snNkDYqdWwZoGnZCQzsOLJIc4PEiSj405uqnJWq/lKzDktGb117MDmr
YqaQQzIrh8GerXDupeRsmDYTGD8J6kxO+NvP+JJyGp1gOe1XpnOwzWKAvx2GyfhWKVkzBFAkBIfI
zxo4ksczAZ5cJe93xdN6FXvl7vTZZfjp5+sragP+wSxj4yhdV/xKPSdpRczBmq3w5WIaFCWZEXw5
L26M4iEYNSFnMsii9YW2SyLDlESLgrXDJJt0DfkbuyPoa1Cevyn62lfCWLNZfPcrksa3zGfzRygW
cbpO6P7m6S3tCGt2eKW6iwPGm6Z7/BWc3ZrT7ejsi/L1u0Bes8Q7/C8myt2lYsI8mra6HVEe8SqB
FxvOB/dc0nFcoIwiAXw/R+whx5Ywg17S+TmtMqWEt8qDffIItp8iJY6/A5NKOtNvD0+aT/WObJ1I
6fbIccV3bH5qC81F/9PfJ1XR4elF/gdV6XAMMRuewGKtJuoI1lNNYmGLdgh4pJD8YRF+7EFtOw3e
qbviO/BQhMSJAT7LG2AvtprWAC4TcH1Xz2cXiqtFRFYGuAKb8O9QO7LRLEld32rTkTlaIR96RmCy
M06gNq4DFXeBS/tD3aQl5OHsnqimGgHMkaExayWC5OR977SuC43I+nos9W8g8RePKVuNIeNI8I4w
oAKkaau6NseRlUcYrvcZZee8pobvO6mPvpJWX31E4ef2V9LosyvsImI3sfvZAaxpte8gag5HsjBp
ZEEdfNDKdZonCX/KDAWw3j9mprzcr7ev1RVNaQjRhR0koDs75Re5SZ/K4GWjCKm2FM+0dwPWH/vW
M4ETT1rTt3RFlBJIh52lAcoTVBg7Q5j3VEKdQJalHf0hwA+vNCLPoRSIdWuUTtaQ0TLcEr85yPmx
Dje1YBrN88buqOR4Q5IQ+/KHkC2IZggxg57bwzNRzAGhEVlc4Uu5tL6e52Pgzo+Y4CsnwieTy9FW
eyrPA/K/jPa8+I9OH9MkS/bLfFrGj85fRAnTODNtse6qmgtJ6Axg8IhUGUCa57DZEKWi3eD9sbfg
N3b1HBWINnsRCqMAYk0YA5Z89g4T+mM6jnPR7ucGdHZCMBBtKuinknrCyiG9TIQ3gb9XspCy2x9B
xo9ofKohFRUNnTK6+PAGKTP02OnM7OrFLNPIjR3cFdLIgfk1lL62O9cmyFerZC65N5T7q4zQ6++K
T0I0BWueu9TWjCpbkfOamle1ADIls/VWwhyYoTpuAQ/NHfx9ipG0XNLtgp7JAsXxu1aG58xKeBBz
cvxMADkdvbH4PzB962zAl/5gSn5tpL+uROL0WTJ58ce4tUhksmT/GIXOEzHkpXZdmDUAMlkLP9w4
xX3Vkl1DbY/gPki2L8Xt/SynpyBd0brjNBlh59SbqruNxJb6/Ic4nHBuBsluY5/QmtpVZjSEDA5H
dVxsXG5TUZxKbGWFbn9PiX+sjQpr/ayQBmfwCkqDtvxYYC26f21dLcI5X3azSvrPOLt4gZF5mnyX
EpsOHBOGzAON98WnvH4HOnahMeprFLXZYENCmoVvWLfKJA2SiS4AGpV222DBELKHAuwtFf9B0FEr
ZbS8+/3cFALGMgmflJkdZiREOD/7bl0SU8D1OAfAUKPXTQ04gjS2rKW9+wM1RSPfjty0wjkfYSvC
TwHUgoNmVecvGMrj7CaneTxgNWthHFn1sj6nn4xSQmDQsIZ/eq2Cn/wAqD2H3FdFrR+i1CifWasJ
depPUIguc8EhV3ZADJt7fFWR6lXx1k61OkFOipEsqn/9+cgR6v6tzq9ypDqiQq1cy22hwlYmaXfx
AVPCT6jz2HS3/dK3/wJ9Bw27Rne1h4c4tbINO69Uz3thxYFvF4rMIbvRE2+ia3RqedELMTIEP6IT
WTYEersnRPFnyQQTR1d2dhpq7XGwetcAt2MtgIq8GGfbK4hATXzGi4JC9SMHKWjRkgwZ3Bu85hCT
SkXaMgdUZ8w04UxIio1TaJiOuHCPgWUJqDrHmzTW610WNffuWSNwN78DW3VPSBejCpRXVGJ1Q6PI
k2j8SmMjiBIn3WYqpGDotsaFiP9zVwtYnncP++g5kKmOtaWcBtH+oRmCyywVDBhNpq2ZdsdCuns2
9MWr2SUFVPh0fp91n08CCoTiogn2/FlCaj3CHXdf1aYELNh4FGbZNRekXoOukrzmiLVlZwurnr4k
D8TE33nPxH7oO9yl8EUPQ/gqk/FqVyZ8GwLjOhp2CsjbUeU8ukm60SseumdHhRj+V8t0OVeNVS1I
WWN2b+0Hag+0h4C5g3753bJ9x4IbDS0ktn9yCY87c9rXVOb47+HMoj9SM7jI+xhqs6oav/P4xqnG
feDhhD5tFtbwSvvv26Tn7d/Kk2++TJzP7Lrt+iT2EOQDMDSlcdzxMKRIhuuumGL5TbsCPts82Itr
p0pr274misvAmTsSC+8CYQplGwVBLWonq/HU5uO+ZTygj1pUBQKnNDiLsSNdAZE6zXG9n30a5Hxl
KD66UhBQCpmUOsg/dsot4TLAVwSqOdrEDZCluVun/RMflD288hayyVZ5m55zA+oVNjyujbtZFbC1
hv3CQ4OuJIFy2xbaCHhsbOUCNAi9PTrKPuWJewp2l6exTfZw02JixVIpfCTtlUf5/pGdqBBPtuGK
m42jdRLQq/IbqCcVTlbwDWV3eI48wniQxn6A18c/PeY4NGHX68SKcLW+bBpthHlGYqnBSf5V70Hq
uZ2aGtkKSvgKUrIWenoAWA1cA1LIVd+Mw03ba9OMDM1hobzUGoxWSEUMr4htFIqDamfM3X2AtXOg
bhXr8p337UTMbDzSoHAC+K0/vAyfpk/3uM1kHln+7ugyUzS7NI4586c1lCISrAEkztVR6ONPXrUY
Jf6BhmwAbMZg/i+4KBHJF3S0uOlw7cChFmjv0WnOgYeeGxs3FzKBJqUxucdXIs1Pc/t0g2gYgZQ3
6zPI+jmYvEHgQI02RLUXV5doPkgcl0K6R3VRZDMYASVg8NQn+49LpEkxMbrREcV8BorK8zAFhTu8
buLSSmSxWowOXTMicwmxZ1HyIYoDF8qbKNUJKusLWKWxd+pWXxfZF4gnCtfvEPUkaq+eL/DQlMho
cxIPY3S6lFMd+h/RvGX+ez7Utj3URygRo+Z4lzFtOMwNOX9gXaNWXkGgNmeOUH/tYnzXYF2KZJwt
QgJGCpdkZF4Sul3QeST3nWdf84yi/W5iOAKy2kmxjGnPCuSPTcnH/GndxavMXi7+pVAClGmNaUrr
AwSoCPWlqLDTNrw4mZQWNRGJQfL0OF+XSoS02Y0HYmLjjXF1unR5wUltcYujo/UaITDQNL/TxRRn
LIJSmnFHwTaYhen+u0CeD757mDswpcWGbhzQ0Agc7j9mb/H/XF47OHKy8h/GSQoi7IBb9O2Brh3Y
KT0Zjj+RZBmQEVJeD31QSTpI+5t4RLkzol/BV5i1WmwN35eq30gnAAYopkf5IzNv8q0+/DT5cPNh
w1TDtWbCnCCafLzJ4E3lh30UN8GdnXdrOOCMYfr0K9zfM9XuRLJyHnn7+bvo3ryb9KjvEc5yEn7z
ky0euphWPaFBqnc9rGYsIHC2SVbnfkh6EnFOquxQUmsePUHiojqH1QZmyvYYeCHaDFsP2iIlI0xl
AZQDyZzEPl4ABnOFWewo+o0WgjJ1e/b0QJf77gO4NOW6/MgojzTiAqEsX6VERfZQgYpp1yN363Yv
/cgyvNDJOy+xWPZA9m7L0GWTBg7YKa+9oeW6stjlWHWSxLsfbcfCtZJ2xae4rcZ9khpuy7vn15/b
xj8l2ZojDRFnlSxpw7v1hmfCbJ41EjsGxfV+B2W4NypIBsxmIiqo3g67DC2Hoe3c9UqZTxfcYTSY
CIoWDDAm8MfoX2NvyuTa6nD22brGNcdwUam1iZHbXBKmXFEHyplTxdpwm1DPikytKBrRKPZrAfQy
gP55ZJypiECxiadXtyUas+XfRj/5See9Cr5XleQwMcOVoSlt5AagGBkqxv+GbKnbCIEfmeFqHSaC
7nIAGpoqqSSgllFQsrM8LodvV5g9Y0u1godIfZF65MzDYayTIz0NcUP7EcVzad5hiZj8lGlfvPpX
JtgsyVuWgTwtrw1FvFeLfndL2Vvm/2xb0lz5+DKUop3qRM54WQG6Ny1dkCY8939sWBf/cbKXymF5
EEmfy9AqZEXYjld5zKbIF9z4vc8nfDnWGILgDxEOAEfSubCblrotojEqdPWfsas69MxXQlKhP8XW
qJmg25/FqiNepqQr9JYH6gcodAwv5tzcd0mZeO1Z/qEHXGOhmMy6NdC7/mqQWdNAU5GW4FKzIPjP
tpqkVduqREM2ga+fSUHYmqrBadYtRLRq+EBHAvw7+68vcLy43cc/vTpyRjUDf8r2uOr7LD/F1Tuk
T/nJ66RxZXevSSEVROnZ6wWMJGOomHl0BMISdNbJPcscdn+nU6WhE3yl2LJAQ6wPDVRf+0fRfgYo
ev1MVXnza7jUIxqZ/yWAz4taVAWRNqbFQRw9th4ZySKWhlPLOlkbA5Inss/I5Qogfc43HBA7D7Vc
uOQkHGPjuk95/CpPsl11YheUoh+VYHALU/JSCEeJSB+POcmYQY2yTw2asyXdaFywPWBrV9XxQdTR
1EXI+uuEc7HnGloBRjolQ5qE/il2idrT/2OHzzIa2H1t6XtQVswF9kFNmV5/FQrWfZjXAcPz4ECy
5p4ZK9FZp944nZ195zHH6MMayuUgJInoZXkihNuYbn+C6y2OH0E97OvDYhCxWZv8gyVFNLGOpicu
DrdPjWEH0TMfykwbLywW3Ej+viuNys2X4pXcKIAfup6hxpPLT9S3WNo0nH+MfaZmUSOjm0QG5Zn5
W/V+Ib1xxZ+0/ugrxk+meUT/UIkixZDFNwaJ09EU+Nhts8Lu88beHsdyYBhA2JvsH1dj3J5UP/xp
qWGr1x5WGtBdQTsHPiCiDIs4A/3ta6juSb1hAZGuEVuJ/4vpJwFXl7DPQz3/Yf5S0Ej4OurodYJi
g5Ilv5RzihjbPvmpDl7e2q70NYw9fPVx8nlHWoM7pJOAtqLAjYI+aZBj/wvGLflFU0e9XHs0IArB
WeO9dYteV3vo1UY92h9QXbCw7NQ+ywlPwxoyhqZodP12EnHvGAKNaLJa/jBXQtpjbNgpatkriYkM
Y0CWS9KtxHVh6TjQYxWmkPC7tjKoMUTDivj+6XBPtCiLw/4DPsTOESi/h9GOfXDqJ9sohYnUw384
3GNv+4Zu0zKlZpEJNjZtdEzNMpYulvoDUfh7PpuYOA7Lkm3bhYpSfX7XEQwOTj2IRHC/mKvLBFCB
VV3r6ZITwqervl/zDCiHHihfC1/9l9UOZ6k122cmVue08nA39M8H9Ydiw3Y24Ae1ztT4BcHTNnL0
Pfipf3mY9yeYNePcpTM6sQlgtO8biN0WH0AlmVZtFsTAmcVKUR0GeTcZUSq3T04t4Am5yxHDSf/3
J2Lqq/44tMrj/VpSeqNFKPIlIywb21nFDW1PlzbYpMB073ah1X+A3fuwAZs7BbKvCencyb6PB5jf
CFeibanuWR7UFBfDfJXhuPPiFMNzu2O6z+bHbJvctu4Vcqb9Lyf+aKq/67E8PheK73hWPS5R91VT
MVvY02b4mYJxkO/Q+bZe22PaEmlhm4XWOYvEI1hVCrOdd3CA5eOztfD3YjbLGqvjXpgHFCluaIDK
4KNdMpRjFbmm1vbiTchQ7XNadP7OPXK826efvajKmDf0pTY1KfJQual/rfEXaOC+tUchR/4HsHbs
Y4eI1HZ6VWPYET3HrrFyNoj7nXwsynWZzZsw7qHCEi1vx5bCJxSUAD9SVwZOGyvtCtIRNxx4o2Rx
bhLqhXMOPSKHsN5KjJPoPDuFyRp08IUwwG+X4RQYzco4GDU1Nk0EuJ7Fh3idQoSKZY0hU5MthWH8
ryt/gJS36q5JUlHU+xjyhnu4Uq0aEnA9A7m9vPJ5bT3Wk7H1HjrLeOhKK46nq4zxmJ+SiDGbHyY2
5jNf3zaPfahQKfBxpcZfDufPi+10pVt0On3KsuxO1Z7aE65f5GAHMVLKCE36hVsj2SOMEWTT6YsE
/oxn2FoIvshrDLovluSHdQioojiwlmEOKYfM+0+84lopfxJIn7zSBMh2wNh+z0mLghf4zWmgHJqC
QpdN8H67eL5mTZwzDY2vapsWreExcHeV2pA25B3eC8kiU232kMqlToXaZTLJNQFUZz0c4eZNUcBS
HiJTdR+JGL+5LD+7+ojr1sWXeWcEOUwFtYkTyzk6CV3Z2V8gDyeX4gb2kcZdXATDMpoQs5YYLjvO
ksDvcfz5Vd6IoIk7AkjCh4yxLzQa9vqjpPS6M6gFrS99E0hDqvr3Q4oqMpHsYVPuNbc8X7DaSZ+A
FJRRR44RHciqD7zl4SlIAIQI3AIM0zW5ubntMPIXKTfVQXRH9gbCn8a9gWPJXYf6ebn0eIFK2IUn
LicxVL/bxX+nyhwGLethA4zkO9ZQ5ULWg0/Lk9ZPFXUFYNQw3cycjHbHQ035aDbTaitFJkd4T/GV
k4bw0eokPD98MOoFZlDabCVR5TJftxvSvr4ymMw8TNcZI+pT/kRLUqIPHKujULhFfXYvLQjqpwqj
OMLhXGOuy31iVH2I+85ziz3Ch6cD8aDILjtHT6++hdBXQ7u8lEdnBN4/9tJMpX9Ek4PHt0laNkIq
uRIWh1B/ANheXaR8CZl3kLTaQcTpNW7UjpA553tjyCnOesPHTKnE0ex9ceLjhrT4KGvKJ4gu16Z+
puKKN8PmkYUsNOi2XweYvJ+GPEIrvs5Z+nU/RSd1uDUHLjkU1Zf6xAXygs3kZZOhHxdpU8QnxsZa
cbFC2QS2Fv0rm5fa0jjwLKOuaerL3CfbqgF4Md1w+C2Jfs1McKwYR+ZiFMxTANVUg8jXxmddNLim
BYFNlaxcinPTSB9BrEECtEiaTaQxVYvyghRU3yZL2YW/WGht3FtuXElSRe+GxIqzyo8cdQsyfrvV
XhWehsKnGozmPYsItPgQeVKIS0pSPbMAF2UkXqGJ/kdB5lojjsbm70hByXKZBiAb/59hN+lNHy9U
anOzYECpeSoCru/wgm/fHa1Pw+O9ppgdj2SDToMBtCg6rsZwQ8qPqiKjy771BU20oTOc7RtKmD34
/H8LG5yA9kkYxlBLyPhGT/15ykCN2o8V2+/FcMJt2L+/hvRC4Eqlc9EHzAdasBQfAo6f2b+c/dRy
objAwrLfIV6pEnQQwwBh8E9RU0jsWM7Rpb6gYpBdK08AxE+eYMt4+dCoNmojYUS9NyQcFiVSLEnx
81jr+iZM3H8S68R3DUQZuUAwyPZ/MXD263MrsbivytiGroCfHWDuxHsdJJjgqlJy4rT+XJikb9M2
d1y/GW+bmI5Hi42n61CaCaggTiJwUkfzdH3Hv+Pi/mlzc9PnD+G/gYZMb5zLF+hW/BJqNppiLlwx
bDS7LLlUzHiE0qtS/ySrj1T3HHqXlm9NiSYBZUpIEPtQhsa7SD1PowIm4dyQU7JRxI1n+Uo7AW6G
xepDI2u5WpXpYOl5GF+7UN0PBAtgPJyKSVGjCFoCBiBoXIBi0hk12FQ/+ogBmiv9an+x71Cbdsiw
hL5ZRM7QuSwgqAt+PfgxvxpB7vm9pZqt7Y24gxLgMgYkbNNbRJiefN9Lf9pX8Hgk2oC3mBX5Bb5Q
BfI26vuL1ZUaBPX2cOJp+M005pmX1wYNemUUz6Obz00WkACdQqBs8rDxKu0iO+0sUC27S4AsSn4R
znqoNRl+CCUALga2gYsix9KwFIMMm7ty7hhyrjCagjSSxOQEuOxf1pNOyWCMJjH+VwjRIaQbtzbi
kvg1Kmv6ZS34sniXFApk1EP0KvQENtqJktRw7/AooWLNs5ztgkTtde22oouAFMyDez5PTpktmQlj
5QjMM9rR2J4dY3iFzdUBf0nnZU7IEpqbTktbVKUjycgjvTqOqmBgEDBY3pMftkh6mmps9GdFKLk9
LMhxBZy5DyX2s1r2pQnqRgbNvRpkzemkf9OElVu3z/8e2D6NaurLLINZSLnoe4qv6+iX8ugJI802
Q3sXZOrK4g007vHXjqqvZE5CmCYC+Iof9F2Ue1XmmT3s1EOXfxhb3AqEt9O2rlx+l+npjIaw7Lv4
5fReyXTLyELebSQCuw9HyBRHk7a1b6ZK3Uldb0mq0rOHBGUbKyR9UP4c6hXKH1ed8jY+8vhcizLC
BobRhwteedTmE23Pi14uQZ1AF7jGOfOitGpDevC3bc2w7ZssecvXF6WCmdYsUV3HARuAkzKpUCN9
/RylNCKeJJv7y2tZRlhH3+xsWbIjV7hNNftQh4Siixf4e8R4GtArvOyH82IITMa1Vf1bqyBf2920
tf9RmTww1ra8+om/cb8zF3rK2xRnuV4FEuNNTYtV+4yOt3Y+CbdY3K5Wuv/Rr+Wl0tZbjsmC2U8T
Wqa96PolNn4lexUepz4toWOmt2tppNgWGMdwRdbKx08dwhWbpK99WrWFzQIyn4xgR0qPEqRdvzAL
s5NvfwMxQxxsJKFkHwVt7fO1OdK4t+g0+yaL07DmxhAWl/81aOTSm2J2pAbrX0TdBP1Jp8JgLuVT
EJP8WlDwvNBGqGEbeYrNOqXZB5WQwp5IQ1bvKqS9pDhSHTDtPxB91wi3mr6DMs+wWzIzx27LV5KM
4zi5evBugd2wjkiOwF/p8CKlCj19+XRndLh/KDCcMEQ+iqto/DsOGCL/kHJi2JIV2QjbdGuNWFoc
doWsPo7w5LJr44SgUy+Yx5vzYPYV81K9vCOSP8MRX0LYeQKmfI+P/cMCTl+ZFP5E6xCoQBLNJZC9
vhQQLAv8/rv5WVKjuZEDSAed/mPJnMV9JACEYSVp6VprBXQi884JPlRsG7p3WOBh8jAFtHIAQPfi
9F+nO4B/cGjUPs6kZwkPDzH92Y+R3FPvIRl1NJ2SLWqasDu1UUDkpr/Ai3AuPNUAkblR1mvoFYhb
miNdhrqCKlQaBxlgieSz9dewKhHIiIuh4PVkKfxeEgPNMzz99hqxWp5UyDLZgvn5u2MxYBNDhlZj
cprUIZx6x2gvw1Q6HCqbK3Dz7wBIwQ2c6xIBqGhgXc1cEFSRDQuv2Jz2GD3DEcaFIjg0Q5AYy3BG
uy/976Om148pPVPbuxHoVSWL82LyzV9ay6qOX/N8sM9IaeCIJJ4H5E2K1gOFu+yQmfswgwJmkZTc
RCWBK5l+QmML7Wm+SmcZZADePurxsJ+Rqw43+Xu2gQHpNuZNGA2AvhZ42wgXPLljhn8Tr8An05xI
rMxOx9x+wahInpKkCGaW2RcFpIqanhzjUXKCLw8h8IynOgReg3+utZvyzEneEK6/3TUUn8Jqr3UY
f8rBnHD+Wd+2bWklpU8Uuz4PLOeWLKaCV2hbu2bdOL95kghtrsxc0NX0uixMcYLVoFJhDr/aXI2k
bVdcyiN4JB0RFvJaK4yx7nyVpO//oJqWk3zcSGdoqQSpgWVcdPIgQYEboBDCCdpnN05v7hqDxjKJ
dOAMCpjdlTwZ4a9CTLwV/f+8o+cYhcsiae6prbVNuztBE9McAjybaxRMWcyADtl0SVQ4nEHRI6YY
YH3QgIjoJhL5Z/SXeiewr2lcWFjH4dRdTzB5aGe2LnZoLOiHJbPZAOrkBybkMT+t1ohRnsj6Ji1K
PJiLofQl0lucP+r24aSrhlY8Jc5y2xAAXFfuIJ6TA2gjcGhKppWYlhgxr7h+F5Dmakvwa1rsiP9E
gFODClEiLksM/Thk+w/vKb6kHnJUJpXZk/JnK68b9141pcJ1PoC74CEGpPTc9IaDCcAxIoNOx/Fk
umhvFnX7/5icKRPIGWj06y8P5S/gcDJlha1hJNKNTCGvrIzPYYC2wnJBLtBO9G351PtwP3OE7McH
3X8g7SqJKThjedmItmAs4fi3tGAO8fYsVz3mtsKTrmFqVsX63aTi13ENxgZIkGLv0LpWqIWrE1K7
EpJPvp/nYq6RMaWckzo+dnccFSqkZtDo/hRhuWS9KpYp5Xz/t35rpB6uqc9/CQJzDEff77D0ubLI
QbpgI/I/CvoGVD437u9Wd2NUV5iIfLPwYDLNPyXSg25SElZbGyi9lwPus8KWPbG1corpk4hElwn/
tlRnqIzkXC/1ffL3qibUr8C1ldm/IFf+GdCps+cg3P12IYNGikJwW3/xRVewwS6hs16zsW3pEQJC
ydn+hT2SRZqd6Yk1o16ExrXoPsZx/lZuUj3Nwk69busYds3y1cZ0BsP1wZ8bOFfk3+QB7ZOwMg5m
hykAx5Q+TsW75K2lsKtWKA8uZsD0PVTjSK/Z1lrEiJ/Nvy7p1GDqf5UUqVQNtQFUMR6n5KketvSB
3uBFtzWETM6EegEJnpC5p5ovPks1uOJKs2QUPYCN7J16UC3EneD5Ak/MHllWTSMSn945CCGCa3tE
H0JORvotyh6p3foZdBqAY8yTd9y9bcW81gf/WV0cc9fP6eKNEKX75YwXhOxS7iC7D93qzbT6Yc9p
WcUUYD3C6ASoKlQDrjehSbkZQ/iSHFgnQN0ObDul6T+h/4tIIR/K0tjnEZeSRY5xEKOLXOshyRUE
7bTOHWar7SS/vQ4ASvWzT94qU8rjKBqO7ppFo0ePh33+T0YVxHo3FcQGZYb+unNFDlsy4vByVKOl
B8CN6L5B5zhXOREV3blb/ZKzAchN2AqaMRpWTGhJXjz1s7OWudPSqWY6sjR2s18qDxuG8jw98MBy
oAhVzAAhQmMG9LczmYtXJ0O1NBrDkqCsQ0BGe5om4/CjCHaqK/93zAnkkkTwQNesVXSE26lcVSB7
ABRn+7YMyWUzZ2+ZXOXRlaeafBxz5oZxH/XwNv/WVZVR+mRZ6VrcWoOfaSAgIUuVEt5CpBiK3H0t
ZsPYqNr+nOLdQbsres5yvlaIM1mq8E3Kp7DXe9PFLc9rPbj9XTXQOBNDkzrgbjz7a9PJ87wKU2KN
CQRR+YoPejJhIQt3HuIWfovm5E+YKtM3Bh821lF0C5YgV0TbXAV61HvwpX/B3ckmEr/9QVMojTEF
1/lZxeOFTPVNpx695IiVgOcgEZ31UxkW4RTlIyfUSevSL+DP6u2FcoKx9GzOQ0Vr0PnLjznYWBD3
uBA+hI1n5mlj848BBEXoMUSeUOeWFSAukRB+7mnjFMt+BgGwTFTdw/eENB+EyXcTv1hEriqxxj+h
bYh6o+KxW6sNxRwMwc0/tAqooBjSFycv4y/fAuwj2MRyw+erhHu6yguNDI9RQ3iMvmY1mF4fHxfn
cfSMMctMNXJ8Jz4zUSzwEYStR/YiJzDmAIDzf//pb5yTwh7WYfRIhwjBXI+GIToCK8TykdjBWC2U
cbx/3bCi7i07LzidpUNwb4Tiq2QR04zjoJ8jK1S9PQjJaip2lTqMrd1d/ccs+IFtcOF/9ezExP2r
sg4bJYFJ71jkSouv1pHCECFSO6b07gWPMS+nOLWQipucG+hjC4lM+z/zeCNVmudk7gUzH8J1+hmv
hFxVTc4ZI7oNI0IlTeQ9mEoVorOTG8u+OYdjm4SWT56KENI/wsP0U+5Ir0gCO1mXl/iHGqPzP1Ct
6c4DZb2lS6KDOm3SiM7Y9qP/1k2/IzyaodVVNy13h+Z+zkfwHwdwtAAow/Uf1voQA8rH95Hlf8EL
/X1as9PWMrzET+U8JWMSRAaTpLAE1GNfIAUIKzHbPWUFDhwjNVB+LYFA364vhse9ycCfMHZA4HD7
3SiMTXLJDarKEuyFsA+uy0mCOj595eqbsqx7a0Dp2ZezNWmGO1IbAhd5hSzX5QtUeLB5dBfe5Agp
EhZ2aH4j6wABUuXiuuY6qIX9qH+yfsnN1bo8hLUSre9Y/YuB7Ojm21wuEt8ZjPechUumjzKfretC
26quc5of+GTISNn5nJSLJ+gK575atiIPgb4oCjiZm0dhjUWLYUKaaRigPpE1/WYNTuOAvSoG1Pi1
sMaeuTpyo4nWOlIXzYc/mRRlaS4T987u2lEzVYbgMXpZSN+o0/Z5bkZIt1QOYfnMaoEW+64olv/i
qAKjVOwVLtDTHKFrtBf8MOMd2hEYUM3tyzYNGGI5CvkY7LqxGjr1T/9otFvZ7jj3YGSMdK/I5Wab
XB2Hhzpf7OWidaG0FM+xW5gnyEnW6JEAmQ/0k/L93WdD2gmFcVJUSGYt6rqv3wcW+v71RL6uhg1+
JF9sDGob9B8Cs9Z+gMOm3898qKept6I/cbQgcnmuyx6cbhTK8E9moFFJJY6YIzsQbGTdEo+mXQ9I
2nHYT4P5rPMkGhKAvSGGX9mKxxUaLSwtV7iJyQrFkBf3BBnZuA2Wms7/o9hUCQaO6GnWL6P3FoG/
im2AxgMV5H95oHTBw9uT6B9htVsWvCN2Lhx/W+tUeo3cGHwgnxJ0DD+iDpvpMZ8MjCTE/c5KsM9y
8QHyLcUWT4CjMERzHUO5Jws6uPLq9JaZ+IKMs4XP2xiY43kdEyCQcIKtDsuy95kOxLzvZtDvmUVv
Hh0T3XDiWiridQxJrwSwl8twTVLmhSRUFBhqPplKvN0o/5uLueh0P/TuJZNRVIWvcyHcxdbLiWqi
50Cp1ZSgGtagOT5BAz7kqnjTFmdhIjRcPoCKZwza8ZN9IkiJnjZH9SwHS9YvDTvZXPg0CJNk20d6
g9fPJ7kKntFyyeJYxwZ4Eg17cmLE24UFoSVtymj3Xb8F96wFlJwtYVmKVAjoOuioknsMf70iKwTs
DR+8RUf9x6kRk+LndoGwOKCsP/ySkQBGwNpguNUlJ4hjoru411RNvr3DjOxhyvnYbHYNP7Vda0fX
vxO9qJdpSqaGhCCX8MuyDaXhT+C5Rx4sFOU/BXBMj/QMcwHJDz0okaaRhNo4cFFIPRBaCOMijFIV
8xNccZs71j4C4+euads48Wm/oRC8fXg4m1mRDRyQJgaRWg0UDD1ZAXpJ1ml/y1A30jBuMOLkbctZ
PvieVJMVV30pKpsMCF33fwhzc492G4S4uB3ArdcJ95p6WVaG1G4WwjGvOCfQ8Q7VhewVOAZh8RGk
sOyQw718FOfq7drkgQarYDZZtvLzLT/pZcUSeWnwOZixZBBHcKbGESaUoR5wjWQQRIfcW1aeimd9
Aj2Jz43Gh3CHuOcyMqNxt6Vydbux2cE102nMibaNoJVVXtieX3jk0hv2iKTpM/hS+TbDoKjvzWOg
C0lJIRYan3NV5zwwQHcsYCgYDQ8A1qsn3b9y+HOkTaYh26T0x9atInAPMs983pFjYeR9WYsL/ZAk
CQ2ItzlW5H4IIN69oJZu3jn58aqmmA8+aio3E3bk9v4zUQZqwRQqIvdXzAVKgn8BfEvNqTPtgere
HensQtK8D/ZD4VWQ07rGsGuFSF+QY/+CGaOjtJmuIQ4b4up6eRPaOrCkAUe7LX7DFj/5T3ZVVjoW
Hi9mltzFzm8GWmz2/Q31xexS0PmgEIP7IgX+meGoxBd7UFFJK7fjECZ4DnUOfh6K8AdTl4YJXk+1
VC7He3CmKayTReYUdC3rxs1rJrlqr0Rb5OjUmVZ7rqU+rhwJS0nFEgUI/Gd+ApQmmn+vMqXRul5l
qDiqFO4d393P/Qa/jpjP+8pxPmRnvJ7mDAMhmUdT/5j2iLjFfhYxc8T1yAEHbkpxS0t0jsSbuXyy
Cnx9Z32RxQSuxcB2fRAH185T5tUwe+kR2RkqlefoV3UMj1abemuRKogSWZ2hFWTa1pW+aCugnKyP
CHyogSl6eu8n20zFtwN5Iiw70Xtx4Og5bH2ND1yLy5XWoobcOsXfCtf2gCeQAE6AKbVanpTCV9Nx
3DPQkA4lsjluTHao4tnyZBOINjcYEdHEFrDzjZgIx+Ob5ECsWhVfHnQChCgIY+OasZOK9xeyz9oI
qnKTsnmlUzxcQNwZ1wTXAWKgEC53xnIPCV2dmZoEL3WTHtaxByjGl93bquDxTCXU0hsP3YVWYg/b
3DVERYOsjf47EAeDPJQqlD0ZxPAOxuqCxcByoK5gP79kbWeb4q7PAJSUDY2XUznRZfJz5uqZHCXl
zSinC9ICgCe8he2XTME3oCsbC18FK+pLnolzwq4LENUOM6Zjgmd2VuWNAUEcK4LfK/rJyAwOjPQ4
kojLP+LHZsKs+bAd6BjBtf7rT/21It6fM8j9dAiDhAmXqCnIuHa67buSOlQ7UJcy1lKMeonvtwhR
yIPkw7DQkXORpH2c5RNZWaLRU0sLT+1PIxwRBrSlXJbvcxfC/jVZPXRaZctZz2YmiAlCuoLcwCmk
i/62H9S2UxxumQr3HEC60vptdiJv5vVkgkkVWUvFD7pdxARymcd0u/hybrFNcFygAokUWm68NEqd
fePMAMMmR4xhU1180cpPkp/MoVeKXFqWyBJer/DlHh1TBAHq9FdBcvNSOGwPQtMN9+Ub9dwSY8J4
JTK0OoFoX1tf9zzWUyFuoO54pxzpdV5YeAdcGbPImc7d679hxUelBRIdY9Qa6q6/Ibwd8mqRba3p
KBV9eJPgL8kAkoPhJcB2EYsi0GojLdHBfHsTeRpbjOomyVwOdMAqpf2YwTxJGXgk2aTzCUr6DEDk
lUKQs9aq/2c3qttZxSh2pSko9HEwqMYmFS8ANKApRY8R1fGxQK2239Dq/HkGeLcOUoznZ376RImB
kJ1sQDndiYLUHhBlN8xbFLusKd6h9nUSWFckEq8iG+j/WiMDYBB9aFrC4mcDwZ1sUaQESx+tdmH4
1GwxvG+dkRIqfogIGkjwmlImMTS6/ceEUD+kSGriYNCTAyvqE5hoKnyL/l+tWo4/Xs8fn4dJ9++y
V1MQX3sV7t8IZBhupgZYKlpeaYU4cha1N54xl1SWlXPvquLvN239DRNg2izPIGiEDLIW7sC6a2Ti
9aljpchbeZJA1cz+g0hg1rLhRbFy7R0GoQq9aRPPLzsUz2q2ewJDFK5s2f00ffJ7Zsr3WPyrASXv
Nda79FBwvqXHnD+2pZ2gZwqS0VfrwLTnq0k6XJbnXuqp6oVNvOJ+oxX8JoWGs6iOCWZDDgBPEgWW
hNW7Ty+2RLhfZZgQjyslJlQgL9Jla9HPXMSi9a9qHtFFKnZRnwwdQN9ty8jtY4z6eT2XjoN1PacI
dMISGl9UEweh2VXRJmkC7rKN6D1kPzSK5K3oR6o9RVA+lXfcZZWBGGtQr5H0s6ypC8C6pevQx2UR
91g7IrcRnuFrOW/1EbejvrAL4yRXVPMwsL1j5ece6NhCgD8lE+tSsjbxQ9Yiz7ZTl5PYITh/mNTl
IQOA2/0NevM91jLP6uPS03/sHE6Ksr4993QYJ7qaUOjVASxy92/beuJS7AKYYJ8AtN1oI4LK6f0f
LX900E0QHvVfRMGUQDBdLm8QNMVJW/zW37O0cwwbZ1gvFp7A/5LLMJpoqkm2A7vuY6u9iqPgN6SS
5D/0/yncmZzTXCmkBlRBFD+hzjjiF33r7VB6m36BwxG5oF0CXtbVhoVYQkBZ4kueKlz41JI91SG3
RAYpRJExTXxvHTxj8ets8G081Ttk0G6HlSstEV1UjgWw7bFXEkxCLt4jsvYQ5Ih6Rhd3esLJK+DG
PRXz9gvKvl6LxO8Bwsx4qptaSlJoOY+vuXPNY5n4MjxJYFvHgq6Qe9v7KExTbRGQrn/59LJPYOLG
S560hk9iBA3PRfdCkiWOaeRgdYRl16q6lpIe6NkkkdGDsQVdzxUVp7XNUdvvYDgKPR8HnhnfUdno
nr2PmEq0es6woB2ZlhfrSXBpkqcpUQ2DT5Zb33FlymdwlxR6J0FVMwGU/MbN1noe/+jnrdu0QUZQ
G17qAA0bTAklcDOJl5cFrEcGY8nlb6y4eD8KrqjyDtAlLwkNqcdm/lIyXjO82f0iA9FwquE/ndc7
rLASAWbHuOVYTnRXuOrFqAQufYPXbBqbx42If2rBqdsNkxgYj9JiO98I0AXRFpFxpfv1arQth4Bz
i3f2A4ssHNFG17n/oYM+iEijXT0wFons91mlwQXFQRkHEl2vcn+wauWRRb6KvqD9lu5hkLyfFLju
vvk6dk/YxcCpJlItk1YgG7RKEcjfBJz19uGFFL1DYgR0YTZSy7Ik+ikmRo0wBbU5kKZ10iJ6+cob
alYFIz7R+kVWhjGcjc2J3jp9gSBdbddwzgwdfgkT02VYzBW4yfn6Stx4TzLqC8lsPoqu6afbJaPE
7Qw4bB7eYN2sn15qIUUZYaaglfzRPT4POQyqFY6XM4uSDWLEOt3yqSFK/nTlASXjqPjfBfiFLrfP
ll2A3lYq9WlP+ETVy1HU5eT6IcMyaIoah2g2+vxes0/tbTAfmpDqmYmTNX2dNYbc3YposYqaP7DA
Unp/7LejoicBw1UqZOWcXNUsTeogpdAa5R8jQ8Bomfii3h2uTdvWVT7lUsSCvRG31zQCyZfdLeHY
w2y8fCiTU8XhZRCnDvofXkMfjZtmk47asFKemgiktWa1Q+57sqWXUTUBcQSW+RGGC17f1CCpNsGt
C+x4gEMI1BiX6QjmmdODPrJxQXSefHDOjIg47WbN547N7QOiLpOhnt+3hO8GvKnip7oSb/GTunyV
XFR7HoxPhVOJbMsXRSuMOaoajJDz4RRj58FdHnAwggYU6pmm823u0BLRyJpi4YU0piEy9Iu3dhvB
ArGkzyvx0bMeCpW2RQGNjCd3O791AtXlnyChQVAO46TDEjzmT5QKMjEfsC+J8flfF6yWZJxhOrKS
qa/JfCGBmn0NEn6mz0w4pwB3YZZBYbE3DhWRyFj9koj7jplo8uE0wdNV31D/WjZ8aHvXBDSWKIr5
EkIqZ00CakB0RyD/nflXfnPQmSrjMidBRbB6fR69nfIcIiVrNYInBqUq9kAvQQrt3nVb+47MDItu
AccpVUsG2O676K6DTQN4awNh4K4BH1hyb0bHeeCeou9pYHmtOnlDVyV0rrYpekrdXitlf+MGEPJu
ZGALu0xTmt9A3gIC8BzgTc/qSpNgXzYi0vkBPxa/gOy9JBEfQkE1IIH2O1W5JngRKsR7mJVCZvMt
l22mMNWTjwYZnnhiI4MlL2APbokw/i3/p5lcHjGhoJK9Ux2Ic1f+difyv3nF16hLwFr2KjBcVzqh
al2YEHvd+a39Fz4G1+8Xbr26AZApjhlba/0WI4ptOV+O4fOH6cFdStu8UPEBR0lwLZ6MwIwY1npT
7trBJGqhQ59lZjBe75uqKkuAwOkxhMmnAVegBg+y3QcSJIYm0HyRdkyR2MPMjQmAxQi+6xvoIDXa
+loYpvu+izHgScyxrgnUrLzKTcOdToSh49T4+WNUEU6rbsal6twP0gtQUvEM6g1YMPAed+h0ENcX
uUNQFilKmfXmDR/U7PYQHlnzWJjKdSDbPNuWz0P5uH/nMC+BDgQoTEaVGyvVeNdEtroe0HEqKwVZ
37JVImmQEN+edxqNOo96Pyhva3n2LcuZlV/dBSwPvKIz/sFNQOMiAO3eKKbWpzoIntkt+mhjWQbP
VBOG8kseiL08+zgF/xfhvogCEY9wudiWXPMElmaEaKIQZ4TK4I87WPlLtXCZ7iOTe19wsaO0DWrP
nKc4w7T8R5UmMEN0baSQo/7xp0S9cOTAx51SgcCy3+jwRJBemlofrqeRfzqxkes0SBb4eEHcrxUL
3QBWCLRK1tSxdt6lKhX7qK3Sm/AreS3pmLD0tCSQl1JDrSJfBMWvGPOY3K9J/8gLgWJAgCC845/N
jf69HsbKkZl9KKUZ8V918iO5v/yRRci7fiH5RTbYC6nHuXGsrc79eSwxjqF7W2h9waaJ+S0GsH0g
/+9zjTd3Z9lsjViBBXSZvyt9vOdDOLLTgUV5ZeBwRi2Pki1RprqU+vmmWLXP+lqCq/FX2qj/LL51
rnZUzZAVRNxNhIBoQEZrLRf9Ru8vbNTn1hmR8RAZXw0una+ijOTHI/4mVo3W6OL3F/0JtiJG0dVi
3ZlVrNqZuAUn7XOCL8VjnWvXWNH6IQZktsxXR8Iqp1krnhQNrPefiKUiPz4ytFpPJKaSvHP8Yyia
sYj3zy/9LiYlGfZQCNl8oJatYHZA7H9AFzlz70emYubzMb8ww5C1/o+YQ4C5zXDg7DJXuuMNhJIZ
ZZwJzOs8mcYumJFhx2tWAsvWcDM5WMypx97g2FuKDMYVa7lD184VSBvAF9Ulw6SSidj8pcpzzqmx
w8TWbkDuErl+wsr1KMT2uoY0KgBhAyjHkWNBuzXNyuWjopLkgCTog/QFegiUMigjZXlxVaouSU4/
ezI/HYm+p1K0FsmQVPCJEnCMI19c6xjYPRhqJ2ptd+vqrEtadZDt+1j3aZrI82Npu5Rgo9dvWMzX
R3Sqem48BR7c8bwohAhQXZ5nmqOIEje70ET3T6Sg/De7EnMnprYIxyGsY/NvYfKkOTY7LC037aNx
O7gNyJ4FRklPuYTj4jBbJWmKCkPtGI8ar94u3qv2esBHZmU2RdDia9AOFmpmlnz5FhwKS6l6btq9
OTdayojuiDc9jH5NQUBkoYWb9XmOex2I4Bx62ZHOYqh+GdHL70qMPG506bGSDS4fpbTHnH/GOfjj
zveqUokfGhj2lm+reqxMcet+l4PttEgi26+vT0lNcsofH9f6YcUI5IWP+TNlhDTtDwn0bspFlVrh
XSyfafy9sYzsq3QnWjsv9a7fXyF1fop1wtFAhIlb1FWgpsYYDN1DD0FdISgScJFtqjYQCUVDCIg8
x+Vc2f+9zdnRY5wo2Cu0qphKdbltXTOYCkFpl3jyDjUcL9OiuJfN+myMLO1kBcM2L4++hJN6e5u2
9qYY52obRaIwV7xIEBRauvxQLelu4U70hr3H2uDWXh4uaLaWrO4GL45NxUxGTW00Mh4g3FK/NpNu
Nly3wVnvLKzZlISmuBiQsaznJDp9V57VX1txLo209MNQmmrgEzYoPu6WrUCRWspMdOfb1c0N0E2y
HAnitVbbGFIj0gwyN4wcPzcdsm+mG7ilIOK40hAiVY3kXQkOTZw95uTC8NPubRCTcBUW6wW+aY9W
bIPtHl3pIS87446tFWmZmEzXHYp1vAIOfDUhZpl4p6IHUGEGcXvRFq5/r+VoYfDKCCgEWdr/fgBo
XDsfzfh401cSh0tpWGqbc5qYOyyrzDU99P6SSAxPbUmO4Y1xGAvRVKD0WVDN1lMBPK/RfriXPo5j
8bVukRyXEdTlVugkPF0m/weUjFZ0UX1C5hlQPyTzR/09yh2tpIM9UQKkPNhohN7q4+p198kksv8R
P+u2YhUNvkeQ/FltCW8HU5uRAMJ1xAzT+WYcvl0tXT8G9XFVO4yqYVln3wx7lh21aDpChOjCaMxs
GTqF7p2d696u/oDZVs/8AZK/y0K3VjiPT2x2VXL5lswPu/ZjDZNuXv1wKH/qCnKe1HuMKWhcCBZY
4QpLbXFnbt0MwaXN1phDku/MTjaofXJfz7Llgzcd9XVCg5gIkoniQyeEEdDeyHUGnZsjqM/bGatv
X48NdjjXE2sufQl09Fszgg/IFvIlWNfUuiZxNtipyZcY0la0ZWtoj2BLoY00X2MmVD8XaqNyoBB6
O1f/8acmk3c9kr96QSkaMrxx6KO+srgwCIt/6NTiZd9WZ+o5JjpNrZ18CMBWP9PRdgJCD2YQaVLl
vBbVDvfx98kXa3310oXprXVQE5sSStV/mzs5xYx1Dfe/h/ihLGE5JWkJI58WSl5fGfh3oQm4tLj7
GQKHLxin1u0Pgdw3mYIbxqGdQCDV5i6gNZiwwNVEXheYpVpOEvqy5xZzlc9XtgE5HFbWSwWVSHgt
gH+b8i/pOwsr5rVKPxeDhyIf2liC5tZTSrYUpg84G+XdOpO1RFlhJ9Prb15sy+UOFfukYcyIMLUr
CopBvOmlKViJ5fZqbh+ObZA7ZMoK6zifPVh5DH9Wr5v5tVf2Fi4b0Sa92GdZUALy4VqOI+guNZyI
fPYZm8Pz/lBwvq8ghz6U6V05g8z/Mnjxr5G8xWg3jLgNXuQQMWv3XmZqYfY+1OOr4Xv2yRQnCw+Q
NpkxD7QUOfIWs3cE8ZMHVpHkdPkIqmWMkeVA8s7Wm+QkHLS3fA+IH3m+Zox+j6HzUz3TNW7k15Y2
Ejvuy01HnP3vpOeVJDphGdQLRJsPF1iweQ97ru6a61S9r0TxoTRdgoP8F5JJrr8FMmBT2A7mUs95
Y3XKNnMGjI0TzkxTA3zBDEPmxVncTi+stmGs7tSVjhR8Atunvo0vUQIGhvAAGRiS6Ho/Z0KfHL9k
0QUovKlG+iQ63/1dhRX1qbEv+Y6UFkxrMHXBgD6JWzL94q4kVvY4iz5vvVmlDmTREPOzTVumK5ag
Sg7gSJN+J3E32FZ3DbBjwoGsk+xfb32jGQrKxFaBuGz+FSnHDMsRvTT2HEpUin3ejUF25G6GieNo
WrMdvWU+ujrhCDgQO43zm2dBhUmSpK6ricOWiHZ6P/zdqTf4QoyAP1nT1pM8J5SnzPXaHg58Z8uX
OMKk5E1j+Hq3J7Sq9sjcSQqY18VXOF9S/IGYsT+3v/p89GRND3DSDceZUT/hEGby5W67ig99pN44
HsU7CLR8Ngs8BN/HgjNbQjCa+n7vyM1GqSaqcXfpZpGhmynRZ+R/Zk+oZLsH26COlJWGjloUiduS
bdx9lO9Qv9Xr43CrYntiMW02NPideGnZw9O1hi2BpztD8leur6aK2ISqJLsPHQZFEKy2Tx7HKq78
bSK2T3LRApt9o8oF+ZOUG6zaBdanXta08blpTPRt8j5Jzd2u5raRIem2LTeDOQsK8cL/Aomh+Hx0
7aPE9K1bfwcr7Vajs9hqdoslvWEatB7eUY2eG6FZaeLIaXSk+nZ5Cv+nfEvgLyUO4FEWdMfGZcTh
V8oQiXl/iFSPRoHKNDSmqhjWZA2JYUVyOnAfhNCwjzpexkDX7g3gynVaGwXNafY08tBUvyRD882Z
QHq48O6fB8bxRcyw1SZe/atVtXCCM58H9HOFqCxYuRnkOt92vB9kEZiX48eLW63jEqSGXO/qj72q
AMRN4pvXvryzwNvQ3SP8jzznRikOLZhkzqFjRs6zVNp9HXI5Y1OOq4j74n7YJu1VBMRXIPjMheDh
u/Pv1jrDFbkz58DN5YvD1DKJbxh+tuDrK7V4RXJgZIj5fUaEqWNpFtaZ5vDj14lONHhInkWEI2rp
sFugT9RZVY+pdbxTNHQwSVqrlSzTVY3mKvT390hNIGFNVwL/iSPPYyRZViFRlxabHzp0UDKnZTIB
sE7aYrX8NkNUTylDooN/OuTfmxYCb9FFkSCZzSxzM4hLcrhrwIRE15liW9sitL3FIYjOoEXOsMUP
bRnGD0b4s1IquG87f9Otyf42zOT58SxouO/KyTA8FMW6ummbOwu7+LNeYQa1xwnWEtoSc1+XfHCi
rh7iCGv+Xt81+UNkyLxnV/zTK7moo+zK7gCPXUz3KAGUExmtQ6XNV6M4AhdjT02ygzF3MSbivZKq
sEcN8hWr/skkLDbBSDF6saypgNi41W8uk2p3gCxcu2mt8mrW2Z9scrx7bDwBwGBU5dhP0S5sxhXb
6erUpOhGev9TIwJv17ooTi8mjSqnZn3ur89LVQuitE6Fjt96u00beVhGbtjlxBMfn7TVkqRJbjmz
9IUKEVlxuiwwMSr02EqWuFkoJx/S+54H7jFubcE6XzfsZQJ+G52jDQzx6e4mDpq0Op7af6mVnbDQ
6GK+s7BPbdKI/p4pKtnjI30l/aR8DqCWxJpz7ak03/rWLsRKX1a5YRFyGYrkbw/wRzWEVTAlQdxv
ot7LYMHqkSEwtGMNteH58HjogcnD3RZOMxteJj/SOkTsXXJeLKhQZ1u8QdKPn5f3SDheiCeIYsHT
n60GRsDg31KkwkG7YWiuL/2hm2kr9apv1IN0B4/p89OB3sguH8XpG33kJvUJHPkv8T4237crO8FI
KLOPZVGsZbYcvufNgmZgjnYCDsJgDgnOf25SWEDvJkrwEnMFBFXlusMLRz9PKRr3XCWTCuVKr2j9
Sh8IZu9WRdIoqB913h4pjYc4/5iGPyOPPmymBKPD0Evr/rWmbNv1JaPwtI30RBIJMeR0eSpYprIY
YAo8wbp3gKTQ4EAMOk4N339N2JzKtpxVT05jB/IggtyWC30cR66kVHFfHNeHpeE+DigIemoWTvCm
2snxFE/S872QSh45edzMxrSmvuCXE0HP3Dh4BRrunlkRb1TrqAPa8h8/wBG12NlzFakz4EILN7Qb
cosBIuKZfBLtcvoHTHF6KyaoN7gzQ1GbGYqOv5PwjAhIn1TCTXXROvJMxYRZyH1e2TPIeF/02Vc7
BcDzvbqCU/xrNXWO6xFkG4pTXaYoBBJIg8+fK+c8SRzhw/nffvtKQcE35srIQAYgqNtuG6Nnf71z
htMXRJNF0SMIkOwhYLh/oPdlEwv/o4oM+8GVIkwT+UlUE6lGQ9EHdV5W6lpW3cppLsKzlp0sttsD
hZSMaEJjHPnO1ahB+hJdqivDxYSzBKZIJurWMZuZZaJ4ewTK99k+AiTaforAuk7aD5qfQ7UZJv13
HFa6UrwwI7aESV5Pe2veeah49lnydHcumZgKaPUus37SW7yCDytsKwV4aY/WMhfVgVEzb3yniEfT
fEcynH6ilN+0iENFLW1Wl5nnBLudECcDcP2uqqNY+w2myF5zgOh2S4sdTzC+1BGZZig0p3MxOXeC
HSG1a53BdqnOPtq6bv7MP5uplj1hVqtwxsPG14oofBxb8n4wlrd/A7wRG+COwdcwxHsVtAlDu25h
HJ9RJ7gNj0Rf2GdzVk05jd7o2ttCla7Y+lpffRLUwGkx1uFJoSrRUGwR8Szh1Za46e+AieNXMMmt
5wR8gUd/l9DA1FEXt034tuOrgzms6q4aHINm7NmPbLEbQ1VaEDqoX8sT7DL0RNXI46urEvz/v8xd
9XN6SCIggaBfDt/OOClBdqto4AtZqYZYZGfXJ4nerMBa/249jHhqXTctQkB2v93c413Dx/S7p8GP
F18irL+917gbxV7wkdQDB/VvwC5Njez5kfdIf64GueQZbieAF2VuQPRydeCE5ePEOJlum5zgtG4I
1k2rtdpxOEdxTuzELmM56hOpr/h0+r1ESdUiZCwn3H0fMqCumSCysCOeGNX0hcSBPvu/361JAwg5
K8SZ5M8eUda5ZNSkLsnMz8Zl4WwTHZZpVK6RF5VFgM+UYLZ9jeRaaURC+Ll00vfDm4I1oumygk3S
tFxpRYBcIOYru12OBE+avgyCgzjvutaO79TwlfcK0T8v+HLSZW9FY3lYHiiVhp9+gaaXuwj1FGNb
EA7i1yNOK1r1+VC9viIyBEd+9Bqc/DHdZcTmveY21jr4OUuL9P3YNs+NUCME8/yv9kOAWOR+8n8w
sJa4TvcRYvRT///KgFGSq6pDAp8vpoqsGsXMDRZp43y5tFFnOdDMIXm9lvp5RnGp66dwMez0JkCD
s5PLFyXb+tVXulxkPspuJvnT/iiTeOXWtFndBHEyaziSfCNjJNvt5NV+ekAeGqE38uT69YUzI4lD
Ieu9mNsRmyphB/YMf0IlvDunpuVZU8PUF4FTKCEFU+NNX13eRJLkhdH4QI2iGrQTsDIGMQMOkaqo
yUuP+GKY7fyarlEAgfLLOQdaE5HSI+MmNn4xyVVgTRBe60MRLyxmgOuJtGxb73a0/ImZgBFaaPv8
smZXocGqdbNod3zCfX0QzDiv4cKMFx8DTlWhlFvkRGsMqond/BwbM0b2hsPh5xcdGJ76mK8btqqO
yHtsyQqbaX4D8MBX6zLPNif2Ci8p81Lx7WFX6Np2w0uFsc/5hv6k5WDnfVD0mqZyGAP6SNk0rUle
VbhXb5gi/WGfllYRKAhgzVlLPPJmrm3YC1Z6x0O0t716fBnsfAp6tXz4v6Sg6DzqKKjfZlFXhFpz
zWZCH2zP6Pa/zanqmj5aVYt+3+sWcBwkMachizUbLPf88W2U/rc6wcGHp5zMQTAKmGPTm0/gRipp
TwrPqwPBX5WRdMLIeaOWwzsNwB0kE+pOrasRGhMaCRNo3yDF0Sf+UC1rrB9iI6/mzu9EwPDFLSrA
exBjvYYPgbKGvLnlQPWBO8phZtI4CNEkMKDZHJ+Yf/xGiUlZepOcODKJFUqizwugtDu3M4g97t4v
90n4jvsP4VHPjttuYpKMq4bg+5KqR0cvtqv1HW3zMZhmfz4k7FFodviAqChQQSRvy+nG5vpwFdRM
FCnU8p9bm7ptyWhNL17MQy3Ctx64yGQdALUStVI1NxTS5E7xT9iedG9vrDcTGfn0POwp+42+605u
hqGlBmX6Sk9DFIvbx+aw7c4/UK+smQ2oTBio2XIyfhwHUDj0ZGfJWvxmmGsl4Y6p5Q5xF7thpdVp
E7Cz0c+0WG9/6bI+QaOgzKSHaKWESBhq1pfDrya1uMeFhPOqsDbZ3qzZ5bxxRnFY8RYkr9MUcIYv
HgNWN5Az9fQ2TMjGlTaErEBJNYbTyYV1G1c5vBjYqPiihHp+2jGH4zYX6KZsmm/8ayP9SneuWPNd
YOQQ4EFaXJnZC/6Gwe8uYG8IaceNpU9UN2LMvNdujtN5wNns2P+EWgLLaOILfZWUCKLb7R4Tl+D9
+k/LltWw4UyTyBBxFjS5+NPnLude694w3iZKy5Malbp73i9JDGMWZL7zRCFa21TgT7sq65AcQOFb
fJE24vB54cAcSwrr2n0ZDowPMdqEOdrOfLKCuIsOdeSGb6HLdGBv3bMEU2Nk8ffa9DAUiJNkdiHT
nVk1Ea1GFryBzVY/qtwVFNYmYCIYG4SjiBzNq9mM+C+KDpVsgzL9uV426DNByCrrWYpqgRNzUjNO
P4uykz+iJMU0ZGozyswB/3nHz7CHWIl0GyfsVr0YEsn00Uj0NFThrLm4ueVM+h0wrq3Na2V57gUt
bp0vbJYFLk8ouoxpE3tQSfSe90FWq9wHod/J7JltTTCTxg/Rnx85rv1E9oUadsZO1Ij9TXG7GavC
ImQY9Z94vxs3DFladmjK86CZ
`protect end_protected
| bsd-2-clause | 07deb8bf93d19b6c1b53e2f968aab4bf | 0.951164 | 1.814928 | false | false | false | false |
szanni/aeshw | zybo-base/zybo_bsd/zybo_bsd.srcs/sources_1/bd/system/ip/system_auto_pc_5/fifo_generator_v11_0/builtin/builtin_prim.vhd | 19 | 32,350 | `protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
ahdDAHzz440n+Z6SrLNKLMBChQ5FzHxmtmolGyaGzRzZ6AsdM11MYnHQlmkXolfzuQvsH0tiYFpA
bdhL84ynJQ==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
Qd5Te5HYUFbAOVCK7Nrwmf+xhp7iHLV1qESGeKRRemMuPlhm9gxKzGI5glBpEm+Bt6GS7xBHPesU
Rh2RxY+9Nst/QoTZG24XGDjT8gulIAFW/37G7vhPLNVOq1gP33zQ0iNDRVgAsbEBqL2aP8fzO3c4
Dl1oSNusYXsdFmxhv/4=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2013_09", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
0n9Q8CLs0GcRArqoXB7pbLNq/7iI54QAnaQ3YfVTrcoLuaPhMipi/u1YxvxCeQhStE/q36RmAWKU
vuVvb8WRD5dX8Gc/5jIRt4ORXRhrtme6cizBVjYhymzdNTAgbAuH8k+0No3YXlnw3iXuB/bUUXlS
9ThgyMn0i7erFTJ6h/eogbI8EG6TwEBPQ11D5xXxMjzz9Q1WQ4L1w3R2CAYnCrSSlQxqvapc2X6+
HzE5EzvdMpbru1PQrGeGwaFtvlT4dq9BRwJcYQeIth/77QtTOb09uuY2bIUtRjnczrx+97he8zc4
F2HQqnZwdLvPbSwwqlsUdlME2ell5wSO2A8Cdw==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
fXi1UCgHICyjHcoUzs2uXfr4QL3Zd6fFq0YYnh7DHj/Uz2hpTBP/xGkihvbT84E9/Kgj7lZnbxyU
NW3Mn3WgobnvsYj6dHFEG2LfnPYpGw5nhTQMawWoftBXy0o+AjB6W5RQ99l/hgORyzZ3gEP6q1mQ
SG+9quGTTiRQQEHy3Sg=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
GxP7neU6pelOGsRYeMpWhq9H64emJJW3ch5ZqO94Ja0S7m2rL3jKbNa/UebfsafxW/Jq07+9ZHQH
nakVk5fs+waKW7fPdCvasFZq3bHVoH2M3uf0FMGIXnsyGlgHQ4qCnawBWxPqrfn3SKY260XmNThN
PHkcyDSRI2OjZKzXzE7AHiKXBnUYqYuy5pZkIRpG5KuuXSL3l68wM2qwWAk4Dy7OFak+VRDwWWle
Ve26y55BBWyX0cVH+A1y9sHRRFBM6x678gQjaKYO8u10cSkLQEatg4BKcHaSLpXozsPkT0ktveBN
etZKKhExPa6BnJyzgqh9xypSTFtCXtbhEF1Eag==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 22208)
`protect data_block
laU1oLGw//64jzLyjldZPLjeWtClfS4R5eqHU6zZHNbzzdD+nO9zqlKwdxuJrxISfokx159Z/vf2
4aTs9VtbPAbdF02fe47/HcWbkUk2dvNUaLDb5jb2QTmakhTULEHv9cUCN0njI9KsnrkoWGl8wcQL
KmTq3JZ7AhG9jJEkdpngxaRne54cyzwshq1vmaa7159I++VIk/Tquj3nlc0umNJb9ZzYeg9ikt7Y
pHaCRIQef/X5K4+RSuv+feq4OLP9LX33aK/62pk3yUselllUbRf3F/rrcc4aMYpL+j3Kw6udvyFk
QxauO6DvqZXxd6AOr0W1XyYhre76a/pbLqjxrIqZdWqRv+H2q0QKGl+N6YRvnpkXYfMFnWuS93BR
iLokl5nflHnbck/SQIuJ8mRQTu2DU/4tFIhTvaZ3lM+lJers4LE8PTLRsIRWwRDwwmmzd0v/Emzu
qHy0fKmmt/qPItm5LHcS+W9I0IlzDxc0dDTuty37ht0oCz3YwayHMZE1wqnxMROTku5l/R13D+lM
JVn0o8b5EPgJas3ixSwjE3Jke4a84xJVbRsYoPCcx+xIYbmFNh0zit1F481hgLknpHeWehP2FN1t
iXKRLqyPeUvKS5v7TrbsY96xo5YPjppkhMAsf2rvc3o4uRAMHZLLRlFG1QtSvsbdMRajhVa9wZqu
U6XbxpFVXJmL5BRBiAXXYV7iYxKgFvEvOSR/+uLefglLXtVgmUFXK7f+UDVz95YVCPQA2F7Dkl32
AoxqyrNfSzYkWv4C71Mac2D/o2DTZnGGyEt3qpzmYHkN2AGx86Hv0jz6MrJWcfKsmpOqGi8wSZYk
8QsJPHMFozyJy5EOoZ1vToCJAIjopFEzYX/ilHkRfJB97bB+NhiM9OoJ/fasmz7yyyJg5PIGwmSH
Tphm6rLSO0O3BGC9jEQ7s71MRWofitb5PUeJU+ydHp9XpvTWlKDRi0wQSE4c8pTXc2Yl+IQjtdps
PQPukqhL8c4NTONrXIqITzq4gmfHOeCabZwogQEgFzTL/BVShi0swSCzifti1UbaGwT/7jrBChfr
pAcNliRewtDh0kgYnM8uiSY8E2SZJOAKcFy6fMuXGZxds+8HSFSIGtrFLQSq6QoF+zDIrPk3/+A4
u+MLU5WKmkA59s6zYi0M6yISq7xLzEI/Cbc2CekNoLzmdH8oMEcYhuAZ+1QczMoPUVslgNXqqYwa
OMbiPq4YMENGZKUXQKcvNzC+z5h1Y40fX4M4JABXzFASFds/E0UFfTTbZcQOlQWphx39UM9M7JBB
mshAVabHllw4LaEcO9xJMtnOtkAYYwM90FIwHGZ0QoGt5rnuKerAJtg/EMZALiNuXSs63DM2zPhq
n8m+dWPoodQFjfsk2gUl/HPvHTJh5Yd4AAHDmSZYRhrHJy9zr6lNCTmpG40QZ8MZl3TAOsvc9j8m
SoJfxIvslv+rB8t9borRBrODd3YJWYx+d2u1KiTLS3qX50Q4L+ZJcYRWw3a0H9DoMRaeO/l9wGRq
Tr6oF5ZRfLjSBWLDOX0JjO9UU0wUfdnjnE4rKe9pqQ9/fUNxMBKVxBp4udxIl/SwBEN7sXYbj6mE
bgNnsbRcDMkZzXEWiJLEBHJ4hrADff4n0JnvAzFKcHBuSK+MotJtEUhBwd4mw01y9V+flmatUGzU
KXBSGt4SN9aRxmsQmO3hfBgia4uBbkew4J8PwY/nAkaEtOnjMLd/287LjhBpJkVv9x0Q+j68P10h
bi8L4U1jSdT/5VOPtHgx58yJnXsCb8xze4aOwQ+Nz8ct2r5a/dlzTLE191gKOC0ACXNJA2lvgBmR
XioBV3LVDPTEIx1MF/+7VOyHQcocYNaCjVOAuyvBk8qo3jQSAIn7LvhVYXb+31RlzCJeZuw3cDhT
VjrW/2YpoEUGphZhMQMcgYooBD1l/9FyfVR004QkEMDdBtgn9GBiekkuAgqrhjYgPd3R8CwZocTo
9g9Yqs1MDiQWDXWiakDfINPzFEsX+FMIchmSnPKHt6aF0bo1vn4m1NR3UyBArFKnK8ModfimKPU5
r2PZup8HLlSK5EBKGDMb+pd7WPRlP/s6FusplgjM9EIMMqedSlE7OlPdOJA2zbPHqTFDHhSvtN7H
N6p4YyEkqoriNzuyp+5Gl+lgZfL/OCrAPZsVucuLdNtXCb/xntLIWkJMRc9wLcsl7sL8j6Szlis/
VX0A0Ci2kOHIeg/zoOpPe2so11eVAzsg9os1h1DItBV+gErb7BnKyBfjLk+No5b/HtBCGzJ3PIfD
2IR7+VegGXSW+iV0Tu9Y++epStrQc2fTX7Qp/dLcaXayPVznuTPIHmfmxZ0m1zaArwKXse07bCKw
Ijf0bzTpoeW5SGP8rCAuK2jhbzYxpmCqp0m32uPWz0LahGaYaEe0sibq9GgTPqor2MxrUp8p+sAG
oOnZf2vvaB2Kt1cnigPcOdhXCsDDehnZdcvKaVemoS9oSDnD099WtQPZ6NqoqsK+rqQkSB0gqPr+
ROB/Mn2XYKXx3d95ja/HbtRCNbmUdPctM8stt91fZGLttFz311Y4EyK2v89DtzhBe8xsIszD7Dv4
bF6vc7zIkAtOsDuRaWTBB1g+OiT1hE6IqhkBm1JIwtH+6KPjyYmWjW8MB62gmm9qkmOuqY1veIV4
hE54oPsNCNmKMa3bswpWHJvBh4YadzvHG37RAL4GYTk5wWwbCdyUOzpAkw4OMYBkNH24vYaHXKyD
7GtmWF6wtl5NNHZ1JnxLpdUMrjbN2pgvy0b34RPmx39j1euJQWhG+wbCnV4fRbeDzkvM8ZxIaJlS
mcZoipSxloq2naY8Pk1dD/WfddheHKQLo3X3iXUGqpljkgSji6B986Sw7ZtmsnoDfcvSbsrE2BAb
gVCjG2R3LTlJcZZp8zORa4YU18ztn50sHhp3pYbPGdfOt59yfDYwQsdaAHfFND60Z3rQHDtPrqO/
9DxGixg3BRlBKlnLeuYJs5JDqpetWfXrxmgdyHVKo7IF7evicHBXqqZlY5hyH7RBn3DjOeTjAH3O
y28fIIJ2TmrtVNzQyTRj17dSccbIBnrVlkWodPNsgwvux13MklFf5einwEBqziV1+QIBbAUuzUFn
Cf0pC2sg+CGkLapBRVHttw1RFArbepNPxaNulMLyOs4dT3BtUkDD1e5aBFo1vH1XnlH6Wc5lEulw
wjlUi/wKwLQK9vN1zuQGX3WxMFextFD2JrolL+iPCWpvFXPBoGTxcY52+HaJAwp68IdBfbLNn9dN
Nl20NNQxSVz+KqYWSVIodlBL8IPoljiBp6b+0yEw/zuKZcDL/fzJ4EDWJIr0nTijmGTY7NgTEmi3
4HhiV7wZ7wx2CkM+S19rCaG7DtAkSfTPfJt8szghD03YWEg2lC+8mkJTqnktnXq9tGjGxDjwwPC/
9D1ZgxnRkcTMf18fjMcwOkfalf2fTjAoEIvq4yNmxckixvPrziFul+aKeCUMW8XfrxTrPCG/RY7i
n0tGs/IAhsQHjRyc0JcEczh1D43ggkC550ch9sJzrggWhsnoXtcl6A9mkbaLuPh/nzDL/sVmLu9C
WqSUNtMBUZbJ4sXt5IZWA1Us8wU3b6hV9QvwuhArNhfLRrWoEKHmNjO+qC9foMX0mrmKyPIpCquC
oIK6VFjIrxyAlgsE+c7IFqtYBIXao1KzTs8DUQhbyoDfKDw9ummrsrKfZ+EQoA1ihCzVONo70AKn
F2uuaQf0rqFWpcdqWjuinDqyRDl9GjbRysguzPxvX0FD6UU5i+b26irAzvvJ+TCmNgvgXGH/tULE
EMeUsxCiZLZGeVAPG8FHVmLE/k72mLhqR0nWTO8Y71fOp/wx279v22y5ArNZARDytlJjyagq7Hj4
Xce5edmTLGMifn/3rNO1peW5dc1+gCTD3RLU3RM1i5uUTa2UOxCnTXk0qAcSw8Drq85pNvdtC+j0
W8QZnnehjhfPx/K6C1T8ELFfMjyRgmZ6bWHPE5/bW+M437+Ut2fbIjJz0TboxoDKzKtsJ/nHgOu9
hmXWr83nBMYjv1CshmARkpSRrot+Uy6zxIgSQn7YMpYYlUrf9Z3KPqq3uvTiHu5y4JcNccQ/MvDT
vtpJHRQrWF2ut2fC1jtdK+qJJglgIoNZZ+jKFEXSRSFWzJPT/5gysb/ilx8HRpVfgxNmB/qUp4eE
PDxemyqgMVa8ixlmmtYwBKwrOYKKTatwyOKIGLyZeEysV3xrkzUJtcpcbgq/j/rX1nCLX8fWcMx4
38gHLpREu3CUMgTcXarhRyrArVnrSRVGF+9Y4AkOTgpE08oW609dE/RQH4Mg0fBFSL8AcZiFAzbP
pKss6xtLdiuHNXGggSSkcKDI7PTDgjPtDEFM5C67hnz40x0jWH9MoahMd5bkyTYi3rtyvftCDG/C
i0N7Lc4dtIit2B9uQ69NRzy81FDEPyfdKVPQ0hc/PP75dTCMhosM5HbpGzsrDcxIBEQbQnHUu2sK
O3996fIlGwJ6Wl7AD4tPE5jpPgjzo4LMsixw6XOh+AhNdllW8gJMWVGjyvkTZUJAwDTubWVEhw8g
lFujaia9dl+UiRircA2OTNzvEpf05DbcsxgtWO5Q9jNJPSdfAp4h8v6Swoax1f+fFnO6FECAf/9v
tmqmOJhwWhPABIliCjCMNIkkxW74YVuruzdlbrqRB4jDLnbzjv3FrOcM06KaahlHVXFrTMF/YQDJ
DRt7egl8MMWQX9RVjW9EDBcS5uTEK1C7AJ1+Uw6gbf7Y3+U9mElEkp7/7YuIhtDURoMwefuAPHGT
RKv9eGfpM1+m4lLXEiI/oezRn9H57W+wEz6haTo6pQ/ArDGnkhEJooFyNcLnLS7bWSur1irt0ENK
H7K4TEXF6W2souWxr6y6Wh2a8MtDBPYHjH/RAPE4GTc/klIcj1q+JIjB7HoRrlkpJz3RcmnWT9dX
NRZTX8M5qE0xueATdYtntOtDin8wABVQFpzKai3Z1lylBq8Hnz+ihTJNPs95ps5h7tPYcFBJJ+jE
qJYeMJBxEsv+ZpkXvxIvX1PKlL88fMZ5p5qA4G8qYmyGrJD94Ffeb76R0yhI+RZUgc+eHQboqujU
EWsdrNkLzWgWdCxO1AFTi1NcLF44kOQ6T0dNotMs2ITBoHWexSP85tp1AtZpamn1bdsv9F9kjlAa
oF7JfxgFW2+nxR0NpXcbPQOV2zIj+hikOA0PZOY1ca16/CA6AcZ7ZUyi9JNlTtahegx6gV8e5Q4o
h3G8OaHU6g4eItOat0IF4hUrk7hztrrLEGenuLAc1oOn0+8k8tiUyKioIG3hRkAHyIL0KZHvV41Z
lMWlETEKpxjkmEAuA/T5tWCC7TTNfh2M/yDBmCwadNCkXz86YAtMh/9orBDBGnnYww4pKOWERZHY
P7NMX4gDKnr9+XlaLHmoqHuxFuyxWuJ5CiC/09AkvsavQ7QT8E8HsAMYNCemW4ioVBIXFkwNsnhM
yOCn3dVgymONovFCsj3iDlje3uGk7DkWDw1KSxqIF1J2PI2sbs17yGELvLxQFVoDTY3ye6+TX/0u
uyKa3lvkngsq+yTNXkQgL5yH3ERFYXqb9E5gtLwyUGzutlkJM9ZbFClG5snE2tEog0WBIwT50FHL
k7hg7L98GuZ0nFO5akMpfBq2rGmOjz/PZfYkvCSkAw5GZlJcde99II0Y1izE1WBJG6whb9bBSN9r
zSHhOXQdcrC7W/R+ShqBhkGky2kyQAaTK//iq9bTloasuulfP4RGy+Uv60X9axTWzxm82mmBXPRD
xAoWXa6mOBo7y29vwUDvN3vdE3DmnYabL7BGziWWuhR73VTqJkfBOqwFyg/8orK7RZ7DYrnpFOTw
jFPg2I3T/mHQJGH8qNU10O3tY5ho6xe7ONyLdbWWVcu3rgVhcaa5/AJuQjniAOLc35HPo4YzgOYf
aJtlls4AS1xfMIg6xo3vScpGvbA0nJ9Q4KCnM4dTsgOp7nVnKMApnw93iQ7inGss0pj5HrDFNw4J
4uD83lYdDNehg3TkwwwivjXscNgBskjzFeXnDNKl2t1Gh7sUDCkcgFhPTrP/SefmbPYvazQPmj8w
BJXoXN5aDvzP+9eTmWaUXOuNyEOeMUST5vOYgGGn7R3tbkWwxihhy/vKGlAe+rMa3VlLvlBnB6uW
OF6JqN20Q8ZytKrBvLw0grP9NQwYBgycJ0Mt0Kq37YaOJMo2R6LDlmzeN9l5S3Vui4snpw2+XVKS
/5WMJTA68E8ihDwkHPRSJchHt2QIaxPsBK4VNfoxB5Cwa8eyXf6PfdHVtrKM4FMyrTIc1Q2kRt+r
DldVyGnvYaT1ap3wXMtfXxDANFloS5WF26ZgGv+puYySM0EOZLt0oK4ouvSuz663MAFfxdGRucd1
OrISzOyMhaFNarEckwVPAJQdY2WUJVtrp62sUum2acLZYZusuLxyLpS6oJWdovueONuyNJQCp1FK
BdcfD/g5gHbz/YKJP/2SJMt5+5wxe8LFa8yi9s8cm+0bUH3JOC/HvZN9SZICTUIaYXEFsXeFpc9J
1FBrq+02g0Pa/jyBL8IU0Y0hBkW2vz/46VSjMdc3g6IJ4M6d1/lc4QrkwFUqZqlvDA0MhKuUgK0i
a9P+mjzKUnUYkzvt+GqyxpGZWMDc2RGNyoY2/1NL01fDJklGFvGNbCtcpIMMb1ZXWw7yAPHQId5c
p9b5W2gGKa9l6H1+moN4WBORTXnX6UqCyDqggd0jaAEuYLhpzquSjRV7PiN6OvlzP2rZ1G51Ie1s
g0vMA7s1z1cCoiJkCWvr5ZMih4G4l06kaeTyV5z8SLL/6z/Fb63tdSpDiom3D5Iki0MAfsmfW4HO
KAedow3i1/iYhpUQbGhr92BvjDTENAilI3BMakJT154vkh0kqMFnaszwFjmv8FZu3vFB+HLkVBoB
LuKD2rkDTYgh3lV+BlH4709Q0JBqc8/kq5INQVYs3+rAVHAxwh8JjK0E6S8Ku2lZmE+rxe5WO9RS
uUBn3+w20+H6EO5TIcHynDIyFZ/A3sv50ZdCM8eVaij8Ebq/MVD/ePZBjbYV/2/976m3qaqynMJW
/4tXdKbqXBQA1kYIQ3QI1qb1rHzx43VEmnl42D84mQ6yY9x6KZfxE4HExREZ1dplaHGr6Og2ngKj
wJnV8vsxQXXX0JVlzPFisAhcEb5SfYefHhnaGYtVeiDxoAreyiS0bV4Yw7gSSCZGGb7I74u1iz91
x9ZtiM55683e1+y5swD0k2lWnKbIGdTWGWICN19tucBXoBZXzKsKD/mlXQCqWc5GxT2wt5GIkNqx
81wBtkAPLc+L0ambV/Q4gj7QgnJ14zums0jAQKkSLmcgelAQ1YiAsncHwrDpJL7H3jGpuU29Jusl
JebF3dvzS7HYtMtiMRUrptBnLznRd0TyaeZvO456yMdTbE+aGIcDYZp/jrWaQYwMT3tRcrnNn64M
/qjiQ+7UyTrZ+Fb7H8z/Q99z//UcBtJzZ7W/4zDc/Lj0DVt5IziiuFQFC2fU7n0VkF/wjdyCmQxJ
hOMb/9xBTZG1cWWDecJK4OXoj4hgQ7beyRPbRm2Uff4546KNuBFix/0Iv9rt1ypnur2QZnicGfUe
ztvrzwYlT72V5rVmd4ZMECEdcb28b6VWI1uA/hCWvxuzsK5xqeD5211kf0GkXw6ohipbfy8tmF14
6E9keIpLJL3Z3wh+/nwCJzV7bXx4E909GKA5dFBZ+oQz78KBj3Q2xOmFoFmfG5C8aBqdHkM+iHTl
m6X9kq0i6xZ2zoLrv7hHNI8rdfyUfCzA9uO1cZRnolsMtWXLx3SEQ9qKzhidxlzOLpaD29qZoPpG
4jqIKmAl4Sk8LK80BP80pDGIz1epcLhMVtQv1dvf3Ls59BgDjOcnd0nnMx9RQ3qoyPOcmLhXX7dk
9BbH3uXwJLcBLO/j9c0H9GqnmEnbBDwzZam5HYqRO9ps4/FgwD04eHoMsZxFWikNuJWFElg2SIZ8
pDd6LZZzK4tWQUgltN4+6TV5aZyj0S28d7NdX8v5Ok99dhzN5rihGVaPUMMClZFbzki/6uL7/+5T
la6DQH9JNU+Eia90bLHcP8swgmCVvjfl7sHXOxtyDscTDCsGXBpkMrIuGPtHiKpYkdCR8PWv1k1x
lwp0XHfc++eD4a+yC+uKjFfVMKp1xEGOGZkBd+S7HGzEweDRPW3btpf/DrJQuz+IThGljjFZurkD
B71sk7uY1fRACwzQS0+HkAzggegVN6qV6GwM/TcNJ3bhRHutxeWJBoFzqzdRumtET5dfRmQ1f8pD
7e0aMJNEPe7T0PkiQxqu2Z75Y4wpV2umtDa7jl/eEQ/qeC/+uwveisKwIHg7F7KaW1QUfVb+nxbv
lL/iim4SppdwZiHJo6rgej127b38AfZknB6gON6hrdLy9NrxB4Hytq04ZbqZ1pXdQhTEmQUw6+aR
+YASzoY9FP9AkBELgtMkr6nIOLPvKeWyh2yWgJeAVYqP9gXawm1Dvi9WNzr6PL/Xq9leI31xn2EI
GFAErLttsOmjSQ4w+uDSzyOV4yWWl+LYDzAfUy/g7FZcZEBB3CXPMbJM9aivgRUjZWCA2DHx8ZVI
8FBducZaPST4t2LaisYnZbhX4i3Eip5yIWRWZgII0UzI2nK/DJvdgPnWS2PY9itkcSQJkfkNLfoI
a5Mlj43K//uCjQ4vU3vYL9upAO1EM5U1LHXfb/y1muu9TbEh0UR+JBTr1UQP5eDKgCbc0Uwy+3yA
k+WZBqDIL7Hx0eYRWmJbO/zO3rR7ZXOOcXlQJ8vGsJ/7hQoNrt7zFT2cenqJhplgqP2j2DrEV88H
2M/O7EnQgFYwFbMhRlivSYQhE38W9Y7qrSjhuKB1E+qzqUBmwZRp9KAgsdmgaoMxBb2U510nfaiz
spi0nt+UpTglGFQ1OiTeyr8/yG1tZihkq/RDT+3VSCO5PeTL/ypgjqS1uAnPa3D5Dsm1JD4B20II
I7Oafyb43werfUgq3pHUWLOLIJCCGbJCxrWeIQM4i3hl9ETXgl1VqhX999LhyQZuF4PAu0H345iL
7oR3ei8u6XjsFqLfVTPyoTDtZhV7x/E7yLU4lpI21zGbfWsMZexPcIs6t0fREHPROJLN/XCaNCLA
qEXoTOVTI60Kki2/EKmRj1fTlgKze26k/6AefM1cz2oUv+H867/WgHr8+ZxRA1vMg84uKm8xSzZz
2MdfjOWPnB55J21CS/6Vvt1JAig1RbEZCzz33QwHzbYZj+hjZL0IKb5E1npBjLyt5Mq/aiD5Gp2g
/MhHUWh2xdC+TXB9fuVOCGQyagO0PQq98KrtO4y+wgi2P66abN/wfUd+6ksBY2/KYbDpFlwFVZ6X
tefax2zaWoQmW1t4JB4IcXTYneySZU5tGK0uQt+cjy2jR9t7fl7nmvW7gCElmwDs29iIPaF9w6cr
sEoAri59ZzFv2Hr76hozfOdlcFdVrAPWrjy00re1e4yyd/y4RXhuq3QwVJNaNABsOfb74HUY23Dm
3MZjRRdrFFNJ2LZS60DwAwlbRCvdtOZpkJipM+/8BisXhGqun5AWD+WIgJ54tFw1EzCviC27yn1Z
v9M5E016XgNRIMQ32UKF5SYNo3PMdp0B0pilwP3fEKSRpqbT4VgYPXmqW6GZlBi0dmpZVhohrX1u
ykcvzwvadj7s+/Vgw6s9QdbNmX2X6vSr0a6dl+7FEcRrUsxqsx1902qo1mw3nsc3h6dirOFNsWmt
TsKABf0Qg/8aDqDa+Yy1Q0RK/oxgv/3nymDrgWb/H4va7i9ax7xkpeNbLnRIt8OEo92sk2NVGIY0
tV2r4IcV9srykl4NV7ZC1h099dxKbyww4dsY7QNoWWmdycAJDdE0fhNWGpoLSW97I7OFU88wRaZo
sgMjVF2brlfJBzqsJkHhCl7iMdRjCHTkZVUdDmzK4LMv9hG+rjB9p920rlTvURUp/m6o3QBfawnU
a4ZxJa+oVB+a1BjyToMqMY9pGn1PBn9Y1bx4YtjMjZ7F5ukGFg87rlBHSzMWMdP8xVJwXz3PdZjY
+yUGFa0U8mYwPNq/KYkJHm2ZXRocJl8D4W9I8/KGa9xjSOr/1CoRVn8J8UFMSrTGT3C40eDfo+Id
nysbQj2Kytniqwoooii4eSlONm21F2PQV+EjX9TxQoAnrhME+H93dV8YxXIyUKKKDT+pycCc2SZx
JIPpruvax99YMFMhdoZqpLy2Ovk0E0ulLiTs7dNprx6rUMc0vZfPPYrS+mem5p4Lg+j65Gi62AKU
HWoUdARkKwtA+ofisQ85+ng1K016G3FugFzl2qmbM4Us56zGq34D5EiclN5KVW4TGV52eoHxRsnE
5OWuZr3HfNoGKrKqXzaCv/PIVIdeWYF2NoU+Icrx5IujAJaTw1sJk40GX7kjPjUJUpFL10AINtY8
33KVjgEYOjhl8FBz2hlGdq5HxaOvLjAb4wRI5uiUBO3AtqL6iwiLAm5L8y/2Q4Dj/IGXsSFtlYj+
/UeJvB+Ng5n/W2XrAVzcjWPA2RG+ZYkBJPDCIIbVJaIsJXMTFV+aQ8nRMIBH6nyqazJp6cGRKcDa
kEb5KrOe5o9vHVDzp5rlyhE6Z7eg+wC1OCvHcwenOoNnA1EgFFCfjXrXb1uYmVX8zkRehXUqSQmr
Ht1dPa7a8jpUx7kfaOVI2EORWOAVIY+LIOJe/szN2Qyzho8yPKb9ez5sL4eTn9lvtB8G1tRPsLP3
lbKNfEWG186esSQgqqjDdFNbRMfVfrd5QvS1R8SbPOhJdzz3s6Sftcx97KRMmjDiqhbqsKZ/O/xE
VKuMWoHQWbt4F4Ac0MdNTWvyMexoCFeFWw+pqLYHRWdqok43WLWAqhBMq1jO0xglRGbBzvZGTjuy
U2fJ8grzgwf3WucQet5Z8PvlBzFBM/Y4dECpbiHrRPyW1s9i8o74/zVK6/7aZB/enMwLo7Akk4mk
weWMxtVw1i+vmwXnUtQAQyPECjQiPb3UTTfDYXGWZhJJdKm8hVAwRYkx6oR56pyveHGrPHg92jtp
MbZhnVPOphN5hEe2dXZlfFo9mk+1FCVIg4igw3A64Bmk4SLSpn3iz/5f4JQWEitlf0gblwR5ikYI
8f4d3uarbfjcT0uDOqsCVs6lHE0FH5KmTEB2PUFqh4MBBp0xA/LzJX9gS4qOaUVNfnHzSBQRKnZS
qU0PRkLaIGEhhGiGZ5o2qImIcZNPnfSaEbW5gGFC16bwSkQM1p6HMzMvUvb2Fs5boQtWxU9dpsbz
tb27HdJ1Z+FhjcMNGXLEYndk+cg+ab0I5oUnybcxkFBW3B+KfSVFz/Gh7i6yfNJxFXj3reTIXqlF
0thKwEhpygzYfwJbdArV+XMLVh6wxfTV3WMxm624rQqFjxaku4seD5VO5uB1lIjmrd3WfQ14bwe5
eYECV0L9HzP4J1o5iuM49K8sADWlHN86qD3OSu4eLkmcCozENEn0A30z1ydCZP2nQ2ENTQs3JrUm
DX+CVPFNG2djMVZTIJjlSuT9SZ2cdJNCMVAQrzTpPJUD92U1z3j/l9wzSsUDK7mFe+9nrkkP0CBo
G0zYcdF6SU/o5GdeG3GI9q1Fiz7qtO7inwm7jcrfVmeCC5/Fhlq+rKxFv3x/U/C21DPbiMKpqyVM
WaB0hj6SQvJUovDFOR5GEYSNIgq92hhXU7GlhbC4hpj3MfFWiowZ5x1MWn90kY61/WNL+bk8nD3n
wK3Rhe1lRK+P5EkKGfNY3SEUdxDBO1xXkyIgeo9cFbZihcdWmqTtTJEP4QJ7MIQAYviopAFVU2yL
K33JYGdUU8Y3PYYDewMorDRcup3jc9tRUAn1MMWwzy4tZtCsq+ZRrLJ9yDLXM4UdCyPiCEnRautq
H0nWBtvCF7DSWtofcR/asoImbuSRKWRnaeGu7eXME+zYdZJNxr+dQhgvSDRxr0uEiL5Mkz/6CH9Q
pKQkMAUwpOetE8cxLgZdflOcnnOHQZ998vO8/yBZRMvWof+RSFn6etsX26P1pOOg5RnNkrnMLo4/
oWqEeU9bwSMAP9uodccLifZrDmwPHrnZH88WQRB9Q1A6Xq0recDtb60jjcciOA5jXjy+Gm8njneZ
C5EiE4Dlf91FobGb3+mKFUvwNT+ec9wXmrOrNv9E4Td3y7uf9O78ycbVrlywcbDG1iBUsfeKHN1y
KW0W+/KXdS1oyRle27iZ+JsYOtk21cnZietP5v8vx37QJ2K9eropo301E7J5T/28LtaUpFcy+o6e
g43dl/wBtNuCtUPXXWDAvEJMf1PXpdM8U8OK59UdwEDsYN0RJMgTNPf0V4CYpOfzx5IvygScBWg2
h2AFh9q96qKF76hVEAnKd847I/kRrDCgQsWChzXf+CRmJWdU4W5d5wV3VmNVJw3huvu851xVSoX2
Ffn8hjDwmQIF69qBAK97px8hJfNviKKODCcbXAWT5CGTnKvoi1N1jvo0Ye7J3ZhCQGv9YqpULILP
Oc7A/Yz7zuJBcBlH/o70O6z+x/1VRO/F3JdOpWQoySBXcoAq15tWhSmBNJD0vuuorjwSB4KZ+Rly
WFiByVbherS/hrPN1SyEy6VabMjDcgTpruQELT4ecp/TJylK8IIYDVvUc5YeN/8MzNULGLoZVj6X
559kJhJbC63PfzEkb4t0KajuFTDM3failiBu5WfqC1NtVuyMnq9jUDelo0ZuqKPpr9O7id6h6/V3
v3EDWAWfcEqAGeaawsN9YVcyh0fXZfr3WOfS04C2vCx363FVkwirZ/psT8RXlC9jBcyaF+tBK3sn
6FtuAintQNd52nEXZda+EbpOMd2/oiIz3H1M3auePeKbR9E7vlF46ltCKS+HDYhf6FRqWfHi8dpT
VoYisOy1cOR58RP5XjSkLNrZcTveheKX+idCi/yIoVZxutGxwnZJI9+yUyaPTFYomPwgiIFX1xaW
pBsF36uFAU7sdWy306Tr9y30Qts95KOVDb780UDwHKVZJ16XyfjjAOkypUMO3AXpN/XZfntLEygJ
jLwxn9seOqq9wrzx6R8khuCa2fgKUEXl/uZiXMMIBHbdmFttZHnbVbWQTa2QhgRXXNiHtxf1ieQa
MXoyjhb/OUJHA4nCDbNltFjHSqyLqasz+rCUOogNlhuVa9wYN8UgQbecYCEhTWlBrhyqev1h8J2Z
enODDbpoaIb8amtvFiZHPu+40yG2S4O2z2xhe0JhqxzSKID0pAUhHBhSbsdW77lWSmmEsxFhRFT+
ZYdPKBWM15+x3qxr4LH4iAELKa3KzdFjIqlsHnCd6Z0n4YBH5RPqfFaD+7MdupzKGMhGERzaGUfD
oubVZNaOd0lQmO81ZtEXtvLtFgMxc2jgDbkJG62+FuHnE+uYCj26cLsJc3MFdmEO6uofIeQzbGKr
23mLWafVm4cqGLUWN1HQx7FSa6rvGEEE32v6cnOUSXm8nRiFJtgZ006Zg7Qy9pUvMCS7Z8wYr+lW
C5ZvWKj03cf0Re9hsGaaU/Jzo2GBuVGF6Taz3fGKW1+uzmQwQHHpbmOWWH4Q07IpTxLDEeVpI7PY
1+FMDYRZtvzQzXVncdw66pVnVRWCNxTADQrEr/LvfP2Obqq/yMjYqVzOaCxc+kBLIPyrB10T9zBE
Xzl4F9hGLwt4FlQOqvuBPWq8GYDUVB/LU8u6XTK9mvm+wIixs5KowJUkLNnpQ9kko21kZ1qJtNNf
W7wZP43oXLPikJdgWk/6yv2DHQfXwpD4QgmqKpePesiYmL6TIkSOtnfpIZ76vu1du4NpHO09QG7U
SNDXl8GxU/v0GKxAwFFpq8qYlDYjEIw8l9sjNYN+nhHOCsSoNN0Jdc9bwkEK/O4YKmJZD2CN/B4a
nuP+YYBnxo+8BnWdqA0UL243dnKEQBc0SgyciESt8Y3ehwPar7BxsDtijhVL2TwpZWTRGiaK5mun
KNuFNfmV4sD7h3fhxipSVq+gXIXXjT74ZdHWq3cHc7T8xv3KJTD2CmAPrzfYLBNPj95qMC4K/Qtq
OUV04cMJXrjcLCH563aiC1gC1IrzI1AMYe1YKhyja+lrFHum7w84CkWRXtDofhyYeXztU87Ey2dQ
mQTuwoWH90bGScVly1ikq3/SZTkhZFuEmdiy8ltIyNuCpOO2+42n6mj97qqfbi0ayjXa20T0Q/Kz
/tA4TF9TYaXPWlwEHHBmnJkqzsZLOZ08HL3xbGbQzOXOnLz6VXfN2tx0MJyi+F27F4r7CInaNFoB
JqrfYpy+Q4Qs+iR3dOOZIthp0D2IcbfRweMAWejIVoLRIeqXSL7C261jsTXxL/W4i1X+vnU3eDYs
HXB7CEoyBhjrL4NNyP5e2q5Z3R9bcThtOQzL9F5ZIprg8kg0zh0Wwxllb2HpalY/PIbZ5vARpUpH
sR0Rl26I9Y8juUoOwOF1WGiKK8FUKBy5j2qmeGd7z3P8/rhiEAb+YQIanH5OPWzoauVAU+j96rwD
qelanAhHzhmW3oIgn56Zf20hmznNJPKrYvWfTEgQ2q78r3fNHvRvQSYyLcV4/Tsohe5soPPMHZfs
gWjJnzBORvXgo2SrwlhkOQBt+tZXBJcuvgH1yuhJiOHDHs+qY993J7KkARZAENc34M1KtsBNDR0T
FYJuXtq48r50bat6ZwWtCKq8/PoFKkPhksCvm5hSyH2FssnyZ5uoUELISAPxfrDETiwuFXf9B+gp
bXOBolzcL0T3sQLhmWbKqS8Nsx7vNmyUaPeBb7ztdZL4n0DVwq90loQZKxnDgHDf2K0f+EfywEZn
3U9Vtp37yYoVWqyG/r/BFvvpS5tEWj8RsmMPfqF16S9EjWcfCZMQrif7YzYOHaG/h5VUAl4+OdG3
6OOSraNBV9hUbQNrn3Ab4kmjPHijOFP5C3hXPIMMmZqiIpIy/Uo3f4Pdccn/9YRiwGuiIVi/ZHjN
Ry9bSXk9iLDaTfDDkAo3jn/LUVD9hoFsYxjrVvyS3jtSnjQsv8s3guPtodtRfLM9Hsf+Xr3CHglK
PDeZd1AkEJH5Alyn4vFXWY1L63MjQwJ9L9bt/d8JPZVbxHRIQFLkmP4arCWPO6HbXGd0w7S2Sns5
BBKm6RBZSaHNuQiCMH3XcAONQxF7rN4qz1mZVuuCA//vswB6r/xWG8e/mYWT/CgHC03Cs8hFkjAA
+xPa0qazT0tkhNRb+w1BcXNK+/lQkUqkJN6Jq1yg9gKWlVV/wDFmYaRL0LCet0ysknK1CkWGKCxV
o7mFHKPkskFAOoYrOcimJtXZit8cpY5g5X20BPVuOV0g+jPX1Q7XEcHIOFDEWzKLftWzmW2b+T9u
W9l9XhAbBOaTpOqqKGbfoi4sFbR6vS4iVqZkDCUK17myZu7YGrQnQrvUZ6theTyIACorqr9cDego
375Wh5ev7/qMUE0t2UtF4osupYF7z/O8tX/g68lxK1r8cYXPHeqW9jwDMcrPwe+A19nYsZ5Cvt/m
qxaIomINnbOmjTE51YWiBas5TILReXmYBxwqOzwYcjuMLLqoMdEhFdiJczrt83ElEP/BXA9218TV
tAY7TMF3Zsu4xt/2cpAs8iSBKz4VAshRwnXIvkH5dbYNu5GYOJAe4kvN3S7/iTmYAQOZDIxS9ELy
Y+nC1kQsbteqPlg8gkpVtOLVEDS6ve3UsyXT25QUIejA8TPw/3ErZFy1Mw8Fo9hAC+DzvFXcLiEp
a4xDvhzyd9j8DRo+Jlwj2KgsxkQ08/3e6vzs7TcMbcWLbJ+tpdDfRt8MUdIZFGODl4ns7LRCBGYo
MdufPgBIofQf3V6Rjw0P+vYo01aeuP0JLJxoRIzqQBodtzqk+yAcIOQevhaOSYt/6h9C2NcGKLF8
KCy2pp/5FvZCoilMl7qJSTdjv0CMJRknKcWLhTDq88dd+NFVwswbtHxgOxhesouwgGFPOuXlCLnt
QzPktbkjiFZgfMzun9g4VzGYCfNxjaEQ/Xi8TDtpGB+brXvsb5ITroh+j3uGMSDTVkbjccTGrNJZ
qAnzLRhEYD7cCf3t+20how1fvbP61aORyEr/YQif3DLADXPn/qiQOBn5hWDKQ3mN9T6Xd1kmz1o/
hyyXKFQV5mXgIp4efpPXVXnoDqjeMYGzm7NTjiXWony7U5N4HG5Morutfs5CAsUt/wf5X+bal7wx
sEcCbpCAU5BoLr5x1+S+4FiOv8z+qzROPYTuvNQQMqI9ebWTaYKHyn/8O0XllPXmjPoI4Po2Zsw1
RR14JsI2HN4nmuHUg2tyxpy3m+0hXro6O8jlQw5yUi7IKMOzPaT5Xwu7ItTbS1mAOyHVP+B5AW2V
mNQE+2wQ4AiIGCGVZ+ywVrlnKkxvhGsUAvFJh0GkRnhjCnswV7nsqFTTftJNvR4/mUKjNzljVp+6
EOlfgmrh+4/qDjbk71Y20hmx7Lm5GgVbw3PgOGuP0eQHK4B0jgWtiano1Kin/iaupSaeymSwORtm
okBHLT7UNrXrM/bNwqVRZh1A3VMwFz5EeU3pjQEy+v0gDzj+btpwlglUl+1ZV8U0D6Y/fK2SGOrI
flj5ClcvfKr6jurD1EErL8Qbt2x3TCpsn7FyYaB2i5HndQ2tzuORfeFdTHgmtm/fxnNg9VBuDjDX
B7/sliKZMJw65ltAZUoHGAbjl3KCzqC/odX9al3VaktNXO0ZiFjZFgN2CZONkIbT62B5Xo7jjxOK
snSOrDRc+j+2F5wrMFq0EN1YcmPwCGtddtYOZiZP9OQ+6TjxyQtr8x6Jr7TtNDyVVyym1p1eadjf
05R5YNWHDBtc9LCaxGcpOFjtIbn9ZR75rnuoHMb7++f4NEzTNsp97CAHdmX+81C7IllrOGB6Nzfs
LCZqhhaGnFbSdwiccJrwOrKZnB4MfNlvDv9uqOgc77B6N3HDortcj/yO047bVhTo123hp72hXrid
GFQ5mh7NicIqUpKkt9aR4FAwscQ8rUxeMa4sAn/NiBTutX1TUQQTErkw9B0iqfnjPcE71E+XlGic
MtJcNwGxr21Xg9NVUGDhPIB9DPdFlWWDwSAtQmW6rKXIp9p+crp+4Y6aBC2sUioiKqjUXuPV8+EP
ynSmcf81nSIFEDg2hMmwpTY2ciLmd3bQqZhhSTnqjBxybXOWjz/6JgU6pHExbMZhQAa/Zr+Ii7Gs
om0WppevLK8GQzMkhXNT8NRIe8zgJpIgwGdSNmvAO6fsjcfGKj03t20ZszpeEBeLM8pO7SyaUjby
QgGPdxbe3fDtB4LoPbXV7exsi2aLG9vxg0uWryyQmvRSuyYCUc5Skzku2p/mNLOIjc78242TXDjo
x1EHxwaeM+HzIOJ/0huynlk4TTI9IKkmC4po6uizEI90Z5KxT9sCa73GJmJSwt/HA3BljpM3YUZM
hpWSvnG1z+6EaAIpgUuG4jw49QN914CzvTnpilF4MTBKzWk3aC7TRVUomccmxsxgneZvjUf1yV7w
btPXOlM0GRjDIUF7idQ+Pe2V+lfb5JR+fk78zd6urcx1GrKf+hknYfwu6i3toPQiMjUlOgr+q/Cl
gIylKivlO+2Nd1mxxgktE2BJxCQ7MYbeAolXNSsmFWhEUdse/JTK6TFlfTkQgzUnVmPMlltkcnI8
gfFmTCS4agO/Yjd/C88yfSg0nfci2efV/qFTA6DdQFon6qVfE4LSMzCBgoXPqq3k8bd+RbvosVtD
YkQPJtNy6lPXDFmBvzr0F2RaH3l+23HTWG3ZA8dKffe4XIN61a2VmCFxAT/XnNJEC+b0JfB8BFrF
u9i3Z0blVn7q9hHLUGYT/fe4iP8va9CBf4eqEIQNVUaKT1QQdrYt8tuwN3uONa/+xUlWoluh/xD7
JiKMLvHKWaA3O/0vPjcujOZ85qK+GXEnOz8qzpYm9EPvi0YQS5xqBiEpnr5OQ8gYjacWCLZepaSc
8qWIR5rn6e3NQYFb29PdycqnNPyU1/cO2bIDB3tEXnoJmhm20DBFvo+oPrmrRMOUyYx549ii0M6N
bm2eds8fZtrhbp/ZUCm/AtAqjqzu5B5vsIajGPUZCPWurUNliFQbAr3neEeiSubF1iUdU2/7B+u4
xy4mHogWGoHdjHDPK9iXIp4zMgRZeQolkMKzg/3302QoG6fpYZqyjN4sAxgeFpTdrvhmMcpvN3Ob
JHdbcMf0iQuUjqiLLw0Ob/0aBSMBttl2H5y3qJzPBM+DTf8WdZpMYHNIf6MTRZ68Cq51/2sRrVyk
eBOs7p58IAUAh+b+5NoLRTVbrkq6QOy1R2Wltb8kEvKgUk/7wWDTzTKTe7mo4huAWi36+ijZq3rz
KajOBQ9fndrdPSDYwWwidUxfWJUCFDS0i1PqHTHaAKJMTate3MEloa7mZp6zTcVojX8ypm24iskb
LN3yHC3VjyAA/06sdiqVic2rAluN8VtVE1gt463YHwZJhIVt1G1RA+mmtMgcQEd5wtyLJT8RAXvm
4hM1V1H/tbioCw8qFp5ed650ugY1uEir9ONf+919Bg449M/s9rfyvczxsKEZOSY6QOp9y8j0UHr7
kew88ToMvaTRvdBXLpqSQEKkC6HAum5V05uR6SLBCdlOLAN7q7kmq71COLI248mdNgA8TdEXG3Qr
acbwkNsTY0Zxwpwbj7r6TCSEdw5GjWHVkpkA1Lwct6tsW5ILOMunbKLobCqt7X/bsYF8IxtaKK13
aIzMHUotnkmdPUb/gy9TSUdJZqejyxfWL7blxJU1J9g9Zs3Ji4HfkN+yLGK2bBU+9Tm1XvvrLHi6
m/b+rReaOSVgz5VwO24Z5bzqJgyTnCzeQEh+Pci4i5+9+HT2//Sn5vXemAJGcpyqlZIGANnBvG8Q
aP+w8xGIikCM4lEkYeRDPhLEOlvPpueJSwh3bt4Dct2LXy6165w6KiNKLw91CLL+KkGzCvIrZsIg
G4lrv4R9FtDon0VVBe+B+LsbkPxikuQgleQokJr/uCTr6VaDnGZkd1QV6MZf57n75ck13BRbPNZu
5uoGDf2zKHqtlA8Yy1MTq9NPJmirnScr6I4J9F3A36GFM2/Hlf0oTiyBb6Vv5hnua4xE+pdns3mQ
7VJGAGRiC1aSD7Tx0G2AW2syZK7HW0FjuPzB5p4Qf3s0NKGW49XVDTuoBmgETctT7UD435JrFHxe
rvuKQR5MLqxz60dFsI7yGHmymh2qGskc98rbSkHqPXAAKl7xLFvcK/5oKsF7ds5QDw+CLIweH42A
QzLC0OHfs5TwDUGc/y5ZzW3eJ8DbEi8HEoq62weM2qHFgl+qmk/F77W4lj43tMtclRHd7TjTcIo+
edGyC6oZ9Wr8VU6Uw1qYXu5BBjX2la/nifYMKPT9W1EpyeyfdAJWZoTQJw0pZCQhcWFJfdENSq1b
fysvIVaiKRCJMbMBmYy03QCWf95T24u1ffn7Tm3Na496QaolIweMz+BE5509OeWv19Jjs09r2Y/F
xrLyCFKLHh6OFkRxCOUWTzKBoqMN9kvjo3dFhmqyKQLbw1ljkFLH1lbDQEH/hqynbIOcgSiUZbZ6
e+4cAS8lxWpueN9FD5s2HcpJn5LS9Lwm826YGj80NJE45dg1r1ebiaGd0xO/2HvjjoFbwsdTioLq
jQ5OznDmqSflUS/c43yP5km+ODXdX54jpH59Uqfr1vFNe/1m/IYHhN/NjTXeFKTfQu1VM4l23Vtl
cNyQwXg3xnOFIEI9AkmC0Ync7fnqYYGMtkzpdIy+dAl4B4GCnSuIlciIK/hHbc/UAJCYVxwrDVbp
FlX7CuUB6aFMzWTL8+sD4+i2OX0XrNJyfcbel3vwSggY6TrPy8UUa3kwJl5IEAKfZr/uwlhRu7xx
H7wgLIgDCM0tLSiKXmCYwhjBg8oLMhLe1EqO71DYXxDDw6J7WH4T3JHVj6UNlN0qZUA8VIXFGO0b
DOU8TfiLgQFNtKgiXfQUobXXwyD4nO8CdPCO6QW7E1qk573nX14vFVs+veBeKLh4WkYyfyiqwkKr
j54mktNrbkWPhzvrjyMD9eSn0OPJRsQIUusy1IcipF8r1RS1SZqVeCm/ddIyq537S2Hn1hSPMbgD
AX73g90/Uj4gkE4w35DmBuratGbnQd24bEa9HXBEy0N40YlGh/Sc6m7tGfp0Lrhv6aFQcIc5mABC
eGtRjNUiu3PM9PunPYzYTN4MB4xbuPtiXyxjxKUrb2KbCQ3GUMJDLZCx8vYUBZ+x9crzEk4UbEnr
BkFcOH4B97Td3S37wnb6YUdfv+6jjTu2Z4e2xDeLELhbZqDotojnjqDJSiJkP5EguhO+8f1rsjTm
0F+/ktEkshHW/pGgO4l1qLgT3uEAyPkhOCddIOBp44/PNHs5ZEWQL+tFeg9/yjxMFhgqglja6hbP
KHobirVu9rybDPpdOqID+jIVyNmBj++70QNIthq2X+/mhlUSo7lD1smYBfZys3Av3lJ1v8Muj2PE
c5XV/+hPAum0HcQFPBwIKPJ8x2sGMRqmVRVq/CIi7CCqehgmXtcDoC/JLs9I30x2+z5d711driXN
9NoMCEsFo8m/aCGK3NXFyDpi59li1MYsfPAmovZv0jrxdPHrpoIJucHc7+5eb/auGXceokjtHyve
a4uBkWlPO108h+8q68Yeovnxbc7DrFZc+S9qstqY1L8p4lArGtWe5pm5Ua7D7zctCx54dijsJ1Qa
rPheWJZKzKJxH08zr6T+kPy+gn2FgGA3zaajcGQh+Y54eRMVpnrHRX3OoVu7KYkdHfyWZRUPL/UO
CC9f6HmPkHUOazpBgykQUpx2Un+elHOVU0DNmC3x2564lVzxXE5FOs7awj34XxCbjpIIK+DSSoEA
f4VFMx2VceBtsSn+lohPYSPHMiq77OlKmkqccBiujMxQeipMWt5joQz1JnAFRRka2/lKadv76Zpe
4rnUCLhBfcK8tLtL4Bwl45zZZEIY1uabY7rfCkSu0gstbOgPYdnJk9mM5vgZbFXf1MwlW87D04U0
6YCEeeZ3PuhE6mSck6jm5DERYeWCO/Dkk0gP0VQWVfuuB3aPvAc9oCTvQaAKpQaihDkr6MbTwUX/
knd1uQgPi1ALIXo3pisR4Mk1EwumwEY0+PlnRapdq5V/MfCktLAL9eluavF/giU4qiT09gIjXurc
GxUgbdVHNN5OFu+43WiMa0l1LPuK+JzBkw6lJkKdrqPoZS54k9RUA8eUWBNd4dque0j9jKuznxgV
ZLNWU9S9zJHYD6p/YzTF+Oy2W5wDF+KR6Ob9uX8ZsUw4nB+Ah0Z0O2JIt58lM/3wPL3RfLe/ElQE
PnSMq+9Jo6GWyGNcWfJKheMGOPu+WpTithF02CeyefKg9tzJSjaQA6O4se6xltPV3XYXvhi5ytfx
M1RQ0kvIdC9m2x4Mzrwv9issYaVhjZhhT3fVUsX+liQy119oAXiHchJMSPKUZhkWNhPvK3lQbh5K
B1NDRXZ05dDsyg4Wm1hlIr9KR+DzEai2xkcKThT9sV/3evgCeiXnIJfkF0mHpj1GjvDecoMqZCYf
lXoWeH/mO7hDfmk1REha26DZQ/4IeSEwzWKNf4dxxzW+3lJM5o4CvFHu5hz1V7f6Y4ZPhdFIGFpv
W1hseX/ziBGLSTBpdOC7Syw0a7XggJrky6+1ZipMB79zTRFLpA3EFOP0cnIaAWOvcAiRSLW0stvS
IOyUtIZFTaBtiwmDI0X7kvV4WnyppgnJRUxee+A8TiqDi1c0EfCgtlrgZZBFvWSE2uWFDmqs04ex
Vzi61tfYJVzNtZmWLciZXxZyfJEpaKjcsdvpE+cZW+N4ix5DpggkAmnAgmzEiz7oXNWKe36gEQqt
7Pf8LOfSuAGNSGNsO7vGQjs8O1Asmoj+JMmktgvVJAC+QAQFSaecEtbXJ2/SAFTvANM6KmJyqVlY
qFMHH7wToLz9YrXSW/+BqlPW9aj1BBP0yV957HWoLhi6gVLBcL60wXkka7CnmLCn3hb97TCoo2mC
a5yvr9UrAihAOug/P3zvdcRgXiNgw/Idnyz+7UAayPPlkzQJeq066VNkmRJu52M3927jmRT42BjQ
3i6RynnnDOkQjKhnmiR93guSZhiHCLIrPAO+8yFPE4Gg6S3uerKJXqGmChzyvb5uZaMr7POO5g4H
BSH+hZfCkJ1vcNwE2h+7gu0X9didRpx2PUmZTRHiGtRLvei4Y6BJaJzc7ICjRkW5/KZFGURQ1qzS
RbDKsO0lysoDT8Vmax6YrSLu/TDqn9hGeHufh4psEOTgG5/6D3/Q0ZgvpSzeWwIEaEYcdhQHuvGI
HCK6iEJ4ZuOhcrh9KlQIhTMbvOIvQbzsE+v3zjimqbXjPewHEKnQHMGVHjZJ5t8sZmoTV779fmVh
78V9R+xpu1ABSxSPzfPxl30EZC4kuTAYa2XnAn3TA1Yx6Yyrcs2bhNTZChFlseodcvWVndcnBBBc
edrlos59UXBPkyAX5VozSRxHa6h2SlD4z93tRy1ek0oaWH4YvhsvklmHkU/fKEAtVTKe+PnyMdM6
iN1NuJ5qYbTtTvO11ZCcqOLnDZ+BbZTHda3YlDtsUN9DwXgo0dOkF63nGmd0RajHFcvzkofq+Wnq
lqzROAA8B1pX/cMMCC0gf5yoEPvG/Cbe8iB70cq/AAICpDPD8sw6ndPyBDtK3RpkFQI/XgL+NIhT
ool+rp2pyJXGuarezQwhOeUgAVwNqiygvhyDrhQ1IlWXA1eNNwl55HOBwqjowDUfoIPWqneq3Fwi
uUdDJ0ObAuQYOs8ERa4SvvZ3Z1KWjwPQ5dHwUkJAbXEvA7IwZ+BdSKI5leTmu8PNl6iBEzAcuT/z
5OmGWqL9nFw3urH5ndHvc0kObWfQl4OAJQ+S0qI16+tlRzX+Te3EMWgCRSiaWxihSIYRxqpxIt0c
KIXUdkcJNLeTDAN7hLnEJaX9CYcJMpUp3gCrat8W9dV9QBgnCCKLrNZ/8hBaUg/HXIzPMzDzCmyD
Fw7KSyVzvSzp/t+RQPbBZ9XzRi2zndtEDd+13Rxui0GuILie2AOAxACXzlctSmSKla1rK8InGUYN
zYq+4P67IfV6GAQCCZIBHxJOaIdOYkxYCTD2vA0TZyOqSnsjpRrpIH9TJwXMEJztxap4mj05a/E9
jFTx+8YNpRdwwf6yBeL1WzryTbEYL5PCn9ZqlHFP/9d5K7IrlxGMx8NmhXWICTfhRKLRh2yIRDER
6YdMyO3/l+cUe4nZzho+q9Rn6JJrnspnNlFAJfh6wgGWfJRxAfM5bsdoOQ6hUJ5x8biE/G8ZGc84
3y8G3XSNaQyGjt9/Ty6vwtVVbTi3DS9EJYVLf3+SBi66qiz2kv8w/uxSfh0fY31/idUPH46syiPD
oJqHEssWScg6eMbNjt0UurvpIivoicbfvh7Opny2duRpBzSPuOo+NEPozV7HX6bG7rDgVOY6eEg9
tSe3RRRhO9/ObnY+nXfQN6FKpw0r6QJFVfYtGZ/O34LAuO1oiAzzFMnyIl7TA3b/zn2sGrzRBabC
6j60Mg+BhySU9A/vSlld9EufPJJxshmLOl/agsR0owkFiNT9Zx91vzCkiAVc8m3e4IcE7omoROW6
+Ore2fFyhvCtE4SpU7gOWwga2fO7j5uPZlugqddy/uUYOlaNyIlYnAZeznFPAsFh/HOpOiDS7OrC
3bcMIxo9WeRkGLEz3K7rlY8f0Xj9/XUqbrJ2RwzJlyOrHmek9fgJ8Uwv4LxLmhZt0o5FE1/9l31Q
XbiW0CXyGkTtWztqOnhyG3d/M+18YtOXtWy+AdqujfqIVYJT/jLrxoP20e0miv2EoT5n+R9eRBTL
LGplJvgy/7NgeBKZSjA9e3TMzePr1yweOqPbsgf8U7CEszD0QVffUsSe0a6nfHZPow6m7GYJeLyD
1xmJzkhT4g/2tihUl5ewQtebcUxUwSSiQj1bHRvS3PcshsM25JQ0ZUBbi1avdPmCs+WDrITpMjH5
T8pm0Cakcyowm72Qeq+GDELrIr4xXO++tlWEfSkrnfsl/p07hqbQlCx6LKuQeeHEVAUoOsvf7bTj
aqrqwRwf/NP9dE3Ddn3xur6vLSaxbDWWcAJ72CqQhp3E67yMaMHm5SlCknuX8sZcNOBBvzlXw5K9
Ta89kIxVAIbxTnJ/kXzmFSCLp7hD/F5GBKGbGAsvDX7TiNMtG/NES7Hb3wHmhW2EIzOHrRnhFtjU
9QUczqV1JnfFVH3JhX81q/A07vqsDPD0c7+StdJmvz8h0iJSSZObCWg0u6Jk3ynwSUdMHRzYw7NA
EIAran7wRgeJ2BRJtEkyqnsaKmxlZlx1mCLQi0tQsrAI+LJZAYE7SPJzD5bIRGlzFA7wbB7m2FHw
620O/oGB8cFnl1umwnrmOPwgT32mdFeiRqvNzy8RkyWE0cvV4mcq++H81yIKOFCnEnzMV0QDCOw4
lgQCFxaZz/5jlHk3J0gr8YGgeuq3QfNI6LE99UtQFRYORaA67HPzK68ckkgfRiZMPRTiZq4yECm/
cH2r9WBn3IDu/N/FnptvRVZz0hcYjDGkNynpQScLNfzZN/u2ibot2kDu8pCTqDEBNZiEdmUxnhT8
x4lM3gHRxtfgvxLyFx+CTemab7M0Hq+ZC7Ors2nXD8BhtM7E59RWupyP2QArIosOWNwKVq3gF9BK
fs5HyT0iMtIzETGLBhyYPPzHH04TUR2J6CdZiqgJegNc8eirpGlonuY1up1qrV1VRuqJL0XUrN8t
YWF0iO7dMwLkhiZBGjr9hz6VrYql7ZcF7uimsZYAaRJUKQJR2F+UNoKXRg4R2sTpO7AiUJO/5KbW
/INjwk7LrTsLvdQf9UnfALrmTd7/hYEHGCKskGm8iYtc7Jr5i10LpEN9KXMRLHd37x/9oKS3Ok0U
wEjUbUTvJbvDC0p1PBbheyWkR0PoIWheI0hixZpHBrGKani1lc3TT+e/7HoL+dMGwubS9u4nK5yo
6zkEE4gfFuuk0BwIqHyIo5nQbrG+zL3OId+14LLcsUJ1L1VGwif7vp4jHs+h957AEe2ErEKci+za
FXuB4QRGb2f8Zix+YNciN3i9647Lcfn0WP2rWAy6ufO4q4n9pX5RjS+n+VxCTxM11Cq06dyAsaG+
WvE/smVmIU0GhAsthmWO1qdowidXigTcpA9mMYCidLLmp77OxdFbS3H1ImlIHfTq5Tw7Lrot+uR4
8sQTEW3lSlKfPRIOCj2fF1pVsbWadNgND71ajFCE0WUB5Cv4irogNKz8/Wuz2WeM1CFYaYpirEE6
1ZSt7IBW0F5nFpetw8sWTAJGpYRh9+Cnr3vgo81ELB4u+qo84JFp/r4FUNOeG99AuR3y9La+tykO
9TrXJ+kzEIUrlx2p5ieXJOnmU03wIf3MPoHmsyd24Q0O99mCz73I9z4AYYRvWDt13H1V2Pj+JXob
uiRx96pIeNHQW7BiFxTbTxqoZ7O1HHMLeHaHLb9X/TuCChbB+6W86HQZ0ja2kHzCXPnDHRcfDoMI
tXm/10MTLI+OCj20O9JsrV5TxuGM2f+Nho5WBhzigQCMA9M9Q5nZffCSH2h1XwpnAn6+GFL2x15u
J1x86Rg+J0Mbrg2gOMKA543zoEdcKNI8huWl2/TNuYpHVsdbqOL4oQSUcEPddJRTHhHK7ugGmF2N
YWDEFrcdRnqGC8s+kGOFdRSqyyqPqBC7pecp2IrcgG7rqGjbboTE5wESb/5D5tHFGLz7GwQCI7Lg
NMxa5nowFTDiEd/QA92sT1TRUz9l5d/NKAyHA5mMyBR2GLYwvAPptwTyEYnCO01LIKR8Lgcu2Na6
fJ8fTfWJ/EyilTD7cC+cbfKdnlbQC7pJkxH7X8LDNdqazPFyOSUgrmGQL5IGsrKDwsj/Dg8ORlJ5
auoEwByHVMxxWtcdfESA4tV7LQUEWKnSmtknZtawaiaVBoIn6lsZpAkGH/Fop1bxFg7F8zVBxfkR
LBt893KAv4fsHJTdGJYM1dE897JLghOoBMLljn0lz4NcQ7FjqXjpXnCxuT5Wdy93BcGqFnMDErRc
CcFr+oNb75LGnLpDBnoY25ZnHJ5lUo73Tw50Q/pd/SY2poRrgn5ar7mf1mkqjqul00+5VmGesB92
1WUPmi9ADkpXOteqBtlBkv6aqlWBxA08c04u+0lGCSWosM/N66TNp4+ww7GJZdWHDPJYiqQMtZ37
hTzS/fo2BIAu3ULOmciKmC+OOQdkEi21x/ep7CJMufr6nWfCZrEPg2JfwaTqT3Mb082qPTv9yyQP
SdHyftGkEXgv/shbTNsYaclf0cfW28NAv4WnK4xqEN7ApA665MOHm6K7uapB4QmI/CSMVbeODd35
ErkKzWO827njV/DbsCA58ZZkBD1at1U39B28jmYqZzA1iQwiVlGiY51jKaKZXtG/oNh/yn4UUYU1
LzUdGbHvmRzZUp1YCvQ/jyM56OnyEvzXccLnK5RQY5gYFIhiW/dUVC7LEXlBH2USyu/Cn+yYGxxo
zOD8rcTrMHvtuQGde6EeSP4N71RKm5Yh4RXyjLRNAgWV1PumE+w9JSUFwKTHD/E9Z1DqV5IB6lir
cdScQxptL0rTAAMRWIL6appxhBdT/HKbW/kdSfKX4QfZkoSaeplgvQBDz5mUzrdaSKZS0xpLdoPV
+9ZxBDXnMf3XJzH5gycrwuI5QbqB2EuMPyuFPdssZ23NKcnFW2he3AkDV/wIj2+mtbjXdqRnrUr2
Ih4QAmF5eqYQqXm5qQ19U5brxxqV7mYkZfVYwKSyu4xNewSpIYz5INJFdsGhU/XQf+xzjvs4Gor7
agDFiJs8yr4VKYCway5cnAkwegaPZIR42N1ZyzQ/HsPw5j4j06qt2MNHmu1YbJDGsN64JwXEZWal
73vH2REjsEEL9loSPQYmePhrC8O0IJFuuSnVNR3WWGxqgrRTeGcyZ4JyzWb7VfKxKSGaA420dkGY
SM8Q7boHkdEg/5ATn9VQpaTt2dD1PEfs+ERYSBwR57yDfXqsK+1V0mY7tiDt1jtjF0KOSo0ZzD80
hZoIjxzhNGE6aH2wtU23WMMaUksZFjOqwhaUhM7stdc/cBn7zoUEF2JjmD0xxyQOX2Es1EdOhW54
A+TArIFVsjZfbeQgXYAOTMY6k0V1nOBwR/XmOZQS2N11IiXUUVFzKdm18rmBANHFDd8ygA5Z2HpA
A91YLVnkM/DxzViOFzxt7gSeTvbW+XoYvQP8BOU1ZvPf/z0cQENBczJnprpvG7RcJaLypuUmCERW
U/l5qlSBF7LyhnRTI/Nbehk3WSyWWlFtlV1R+OM1FQAQyQRafeTzGaKLTTt7ZQg52bvGrqDU4ltF
IAC2Hst9/tMIGN4052DA8PfXb79TEAnaOjiZDZnBAu8QnP13/N3H+VJQR78dyPxiIdWr+SPdUs+e
eArVi9N8lxEcQTVg23bqCIGLJ9L5GJ8ZDk0d5uQ2vg1plrmsCltxtBXQHGmEPVnI8HvFDap3oH41
3nKmkzk8L6d9pgTm0h0I0pP3GsDr4CXvk83cXBfHONaYCYAqTUKvptmx9lwMPcctPj7oIU2c8cu7
3sZqUwriIBtxs+gzI8dZ7xxrCCwIylrGFGOYnJ8HgyhQNU7F9dqSVGQOaRayisDnZz/Scvec5Vue
NlKaJgyzYwbF1x/Iqs5KK4ZXSmmQjZnHE6tQ/yJ7avtSuxpob2m/jX0zSE3R0aWTnN+g6ak/Gz3b
jTd2rctoQeHCc5/A9o05fD/kimuLm6Tv3lkaFrfbGEZEcCeuswd2ygLr1tLsYHlLqtMxAo5r5waQ
a9aOwHqN7CDpzN40RFefdc3sCqkhzVYcb2YAHWPnc3BdMCJOE2a78aT/w2No4Y/ZYpZSD4GAAhSa
a+Ie14LfhlxfhliRgfJlZeT8GKKk+PSfrCZouUmEj9oAhAFsamghndqT4VfkG3NDpFE5qjoGmNVQ
2vFrzWEyHI+0iYJsJ+ZSFO4ka/ervYQknKA3PjfTfENa3NQHXwwMaodU2kcfsf+bVWz+Il/wCJb4
uxL/k9YKCdsfPNAGhVdYmMJV9RiqNdXgBHLI3SKLmmsXa0t0u1fXJRVg84m9ugPegnEoRgRbwA7K
egqhSAUNblzvWIjY/Y1Oj1XYGHP3coNinLZfBXt0VpshKiP0kiojJwH+1PQroZg4l/hocm2ffoiS
foGdj3P2tLdVxHMtdqpEiIvr94DheBnqewhOU5pL4kR0njdFMxygfBGArmNmItoLbyjHsQXl55kt
iXswyN9DtQ572J08JW6dc2SItORN8vBAVSgxlJ6qi7FQVL92JZP83IbPD++E1+yVuSHRNh09DyIV
vq+fVPzvDOWj47evxZWmOdD48PokEbuzG7NW1uT5TP31zz9E5gUzYnEYuuqZ1tyS8Po9ahgpHRXy
CM4j+C8xz2B6VdxVYdURnfBmbb8gN0TNWeNh52hUHVPvFYJKHtM7ZyHNRNbELuKNd1Lhy4rfddJD
7FtC0bJnnkHYwHXjPSobC8yQzPIUSW4cXIA5kZ7QN7FM0lRjBj8voyp0uG4SdqXwagwTVXE0etyY
DwxteqmvA8B0Zxo77r5VYmtzyto/P6GWCcafBnDAsuIUo5D+7kLUddkLkF2tdJZWFE8gXr5LgzCk
BQhY6AEsvq5zNaOjk6LTlYEAga84rOj2ZjfQIZkM5mu6ikZuKu+s1k5DhaM5WjPlrRtHDZ7dtgGP
NgWeTqv0l72eyBHsoNMY20IKS3OtYN5IOALQpSsrA+sZM+nrCj5jx9R5NEfmt5374JiSHiJTu6v2
SXRm4W4snEY97IVnFLbsrtz2+KxqNXQz3LrRWs2yEaiTvrJ3jBmytkzSl1wozw4gHPKUPxjg9KK6
u0BQxMpsnc/dy3V2uQD78pc0+C/NzHq9pnD8JaODVVc6LNTaoohHeEKiwmtS2VzYyyart02sDEJU
ZoB35M5ajk7nhX/RP1qsqkLYIuAiC5IuZQtDzU3DpkAdVpDhFGahl++KUh/OOOrhHAOFnwAfrbsk
Z7suXuW8tu8Lk5YTerTnN+wsRsiyhyv1nGRel2e2oNUgJR7P1q/CCSMoH5PaCzFIRL8cNP8p8UXP
mrSzlSX2FN08rtbPeiuNakz4hJhw5iddhVe0cOAjx58Zg7ZgobM1CN6ZiqePMjHqj50TIUHlwQLj
iGXi/LyesBa7ZRyu4Qyt4CZ8kslr7dqwMV/Su23ANrxHJEZWIpRUfQjDZOq+BluFAuxyKqwwOpKM
wupsJJvcxMwUW3ZxscqxU4tWCkDzKlyjK4NVDGhARvQYQyn/cCrpwz2yUL+dBE3WNDHkgMGZGOGj
mz4tOPOa8kgESvunARGlu6/DdN5kJ3CZQaGz1FjNModWyJ3GjoxvD4LOYDxnIB75Afoq9XPk/Jcj
uMf+cVxOgkAP/N+VxDHa/TGIYcQ3TIIdQHrioivsYz5SOzt/4tnIA5FWUm57Cc2Ho2lP6csm/IBx
AH/L8VlayW9JPwwBfCYgdWwCK2aFJ+0AnCNEZf0TLgDlkZxTjBAzAHEb1F5F4omcnvRckux1ms/5
v+W2yW6ihAo45KNVwrzJU3gFracvC178VMRgFsMn6ei4ynRZHrl3pgSEVLOnhPRENQcDafHImKJP
yTAeUjwiRo6sthew+nkGu5Vwk0vZ9hcOAqoRFW13wP/E5ZuH+446pAVxhXlCRxyhCBHBjuMXIRGX
+6o4Km/nVw5XQ6/cT5OIHWbAgxXoLjy4QTAKc8dMsNrB0us=
`protect end_protected
| bsd-2-clause | cfdb181c88f62481846d4b135502f434 | 0.946306 | 1.833381 | false | false | false | false |
sergeykhbr/riscv_vhdl | vhdl/rtl/techmap/pll/SysPLL_tech.vhd | 1 | 3,016 | -----------------------------------------------------------------------------
--! @file
--! @copyright Copyright 2015 GNSS Sensor Ltd. All right reserved.
--! @author Sergey Khabarov - [email protected]
--! @brief Implementation of the SysPLL_tech entity
--! @details This module file be included in all projects.
------------------------------------------------------------------------------
--! Standard library
library ieee;
use ieee.std_logic_1164.all;
--! "Virtual" components declarations library.
library techmap;
use techmap.gencomp.all;
--! @brief SysPLL_tech entity declaration ("Virtual" PLL).
--! @details This module instantiates the certain PLL implementation
--! depending generic technology argument.
entity SysPLL_tech is
generic (
tech : integer range 0 to NTECH := 0 --! PLL implementation selector
);
port
(
--! Reset value. Active high.
i_reset : in std_logic;
--! Input clock from the external oscillator (default 200 MHz)
i_clk_tcxo : in std_logic;
--! System Bus clock 100MHz/40MHz (Virtex6/Spartan6)
o_clk_bus : out std_logic;
--! PLL locked status.
o_locked : out std_logic
);
end SysPLL_tech;
--! SysPLL_tech architecture declaration.
architecture rtl of SysPLL_tech is
component SysPLL_inferred is
port (
CLK_IN : in std_logic;
CLK_OUT1 : out std_logic;
RESET : in std_logic;
LOCKED : out std_logic );
end component;
component SysPLL_v6 is
port (
CLK_IN : in std_logic;
CLK_OUT1 : out std_logic;
RESET : in std_logic;
LOCKED : out std_logic );
end component;
component SysPLL_k7 is
port (
CLK_IN : in std_logic;
CLK_OUT1 : out std_logic;
RESET : in std_logic;
LOCKED : out std_logic );
end component;
component SysPLL_zynq is
port
(
CLK_IN : in std_logic;
CLK_OUT1 : out std_logic;
RESET : in std_logic;
LOCKED : out std_logic
);
end component;
component SysPLL_micron180 is
port (
CLK_IN : in std_logic;
CLK_OUT1 : out std_logic;
RESET : in std_logic;
LOCKED : out std_logic );
end component;
begin
xv6 : if tech = virtex6 generate
pll0 : SysPLL_v6 port map (i_clk_tcxo, o_clk_bus, i_reset, o_locked);
end generate;
xv7 : if tech = kintex7 generate
pll0 : SysPLL_k7 port map (i_clk_tcxo, o_clk_bus, i_reset, o_locked);
end generate;
xz7 : if tech = zynq7000 generate
pll0 : SysPLL_zynq port map (i_clk_tcxo, o_clk_bus, i_reset, o_locked);
end generate;
inf : if tech = inferred generate
pll0 : SysPLL_inferred port map (i_clk_tcxo, o_clk_bus, i_reset, o_locked);
end generate;
m180 : if tech = mikron180 generate
pll0 : SysPLL_micron180 port map (i_clk_tcxo, o_clk_bus, i_reset, o_locked);
end generate;
end;
| apache-2.0 | 466d9ca1fa9802875738328683537681 | 0.572613 | 3.687042 | false | false | false | false |
Bjay1435/capstone | Geoff/Geoff.srcs/sources_1/bd/dma_loopback/ipshared/xilinx.com/axi_dma_v7_1/hdl/src/vhdl/axi_dma_afifo_autord.vhd | 1 | 17,966 | -- (c) Copyright 2012 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
------------------------------------------------------------
-- *************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: axi_dma_afifo_autord.vhd
-- Version: initial
-- Description:
-- This file contains the logic to generate a CoreGen call to create a
-- asynchronous FIFO as part of the synthesis process of XST. This eliminates
-- the need for multiple fixed netlists for various sizes and widths of FIFOs.
--
--
-- VHDL-Standard: VHDL'93
-------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_unsigned.all;
library lib_cdc_v1_0_2;
library lib_fifo_v1_0_5;
use lib_fifo_v1_0_5.async_fifo_fg;
library axi_dma_v7_1_10;
use axi_dma_v7_1_10.axi_dma_pkg.all;
-----------------------------------------------------------------------------
-- Entity section
-----------------------------------------------------------------------------
entity axi_dma_afifo_autord is
generic (
C_DWIDTH : integer := 32;
C_DEPTH : integer := 16;
C_CNT_WIDTH : Integer := 5;
C_USE_BLKMEM : Integer := 0 ;
C_USE_AUTORD : Integer := 1;
C_PRMRY_IS_ACLK_ASYNC : integer := 1;
C_FAMILY : String := "virtex7"
);
port (
-- Inputs
AFIFO_Ainit : In std_logic; --
AFIFO_Wr_clk : In std_logic; --
AFIFO_Wr_en : In std_logic; --
AFIFO_Din : In std_logic_vector(C_DWIDTH-1 downto 0); --
AFIFO_Rd_clk : In std_logic; --
AFIFO_Rd_en : In std_logic; --
AFIFO_Clr_Rd_Data_Valid : In std_logic; --
--
-- Outputs --
AFIFO_DValid : Out std_logic; --
AFIFO_Dout : Out std_logic_vector(C_DWIDTH-1 downto 0); --
AFIFO_Full : Out std_logic; --
AFIFO_Empty : Out std_logic; --
AFIFO_Almost_full : Out std_logic; --
AFIFO_Almost_empty : Out std_logic; --
AFIFO_Wr_count : Out std_logic_vector(C_CNT_WIDTH-1 downto 0); --
AFIFO_Rd_count : Out std_logic_vector(C_CNT_WIDTH-1 downto 0); --
AFIFO_Corr_Rd_count : Out std_logic_vector(C_CNT_WIDTH downto 0); --
AFIFO_Corr_Rd_count_minus1 : Out std_logic_vector(C_CNT_WIDTH downto 0); --
AFIFO_Rd_ack : Out std_logic --
);
end entity axi_dma_afifo_autord;
-----------------------------------------------------------------------------
-- Architecture section
-----------------------------------------------------------------------------
architecture imp of axi_dma_afifo_autord is
attribute DowngradeIPIdentifiedWarnings: string;
attribute DowngradeIPIdentifiedWarnings of imp : architecture is "yes";
-- Constant declarations
ATTRIBUTE async_reg : STRING;
-- Signal declarations
signal write_data_lil_end : std_logic_vector(C_DWIDTH-1 downto 0) := (others => '0');
signal read_data_lil_end : std_logic_vector(C_DWIDTH-1 downto 0) := (others => '0');
signal wr_count_lil_end : std_logic_vector(C_CNT_WIDTH-1 downto 0) := (others => '0');
signal rd_count_lil_end : std_logic_vector(C_CNT_WIDTH-1 downto 0) := (others => '0');
signal rd_count_int : integer range 0 to C_DEPTH+1 := 0;
signal rd_count_int_corr : integer range 0 to C_DEPTH+1 := 0;
signal rd_count_int_corr_minus1 : integer range 0 to C_DEPTH+1 := 0;
Signal corrected_empty : std_logic := '0';
Signal corrected_almost_empty : std_logic := '0';
Signal sig_afifo_empty : std_logic := '0';
Signal sig_afifo_almost_empty : std_logic := '0';
-- backend fifo read ack sample and hold
Signal sig_rddata_valid : std_logic := '0';
Signal hold_ff_q : std_logic := '0';
Signal ored_ack_ff_reset : std_logic := '0';
Signal autoread : std_logic := '0';
Signal sig_wrfifo_rdack : std_logic := '0';
Signal fifo_read_enable : std_logic := '0';
Signal first_write : std_logic := '0';
Signal first_read_cdc_tig : std_logic := '0';
Signal first_read1 : std_logic := '0';
Signal first_read2 : std_logic := '0';
signal AFIFO_Ainit_d1_cdc_tig : std_logic;
signal AFIFO_Ainit_d2 : std_logic;
--ATTRIBUTE async_reg OF AFIFO_Ainit_d1_cdc_tig : SIGNAL IS "true";
--ATTRIBUTE async_reg OF AFIFO_Ainit_d2 : SIGNAL IS "true";
--ATTRIBUTE async_reg OF first_read_cdc_tig : SIGNAL IS "true";
--ATTRIBUTE async_reg OF first_read1 : SIGNAL IS "true";
-- Component declarations
-----------------------------------------------------------------------------
-- Begin architecture
-----------------------------------------------------------------------------
begin
-- Bit ordering translations
write_data_lil_end <= AFIFO_Din; -- translate from Big Endian to little
-- endian.
AFIFO_Rd_ack <= sig_wrfifo_rdack;
AFIFO_Dout <= read_data_lil_end; -- translate from Little Endian to
-- Big endian.
AFIFO_Almost_empty <= corrected_almost_empty;
GEN_EMPTY : if (C_USE_AUTORD = 1) generate
begin
AFIFO_Empty <= corrected_empty;
end generate GEN_EMPTY;
GEN_EMPTY1 : if (C_USE_AUTORD = 0) generate
begin
AFIFO_Empty <= sig_afifo_empty;
end generate GEN_EMPTY1;
AFIFO_Wr_count <= wr_count_lil_end;
AFIFO_Rd_count <= rd_count_lil_end;
AFIFO_Corr_Rd_count <= CONV_STD_LOGIC_VECTOR(rd_count_int_corr,
C_CNT_WIDTH+1);
AFIFO_Corr_Rd_count_minus1 <= CONV_STD_LOGIC_VECTOR(rd_count_int_corr_minus1,
C_CNT_WIDTH+1);
AFIFO_DValid <= sig_rddata_valid; -- Output data valid indicator
fifo_read_enable <= AFIFO_Rd_en or autoread;
-------------------------------------------------------------------------------
-- Instantiate the CoreGen FIFO
--
-- NOTE:
-- This instance refers to a wrapper file that interm will use the
-- CoreGen FIFO Generator Async FIFO utility.
--
-------------------------------------------------------------------------------
I_ASYNC_FIFOGEN_FIFO : entity lib_fifo_v1_0_5.async_fifo_fg
generic map (
-- C_ALLOW_2N_DEPTH => 1,
C_ALLOW_2N_DEPTH => 0,
C_FAMILY => C_FAMILY,
C_DATA_WIDTH => C_DWIDTH,
C_ENABLE_RLOCS => 0,
C_FIFO_DEPTH => C_DEPTH,
C_HAS_ALMOST_EMPTY => 1,
C_HAS_ALMOST_FULL => 1,
C_HAS_RD_ACK => 1,
C_HAS_RD_COUNT => 1,
C_EN_SAFETY_CKT => 1,
C_HAS_RD_ERR => 0,
C_HAS_WR_ACK => 0,
C_HAS_WR_COUNT => 1,
C_HAS_WR_ERR => 0,
C_RD_ACK_LOW => 0,
C_RD_COUNT_WIDTH => C_CNT_WIDTH,
C_RD_ERR_LOW => 0,
C_USE_BLOCKMEM => C_USE_BLKMEM,
C_WR_ACK_LOW => 0,
C_WR_COUNT_WIDTH => C_CNT_WIDTH,
C_WR_ERR_LOW => 0,
C_SYNCHRONIZER_STAGE => C_FIFO_MTBF,
C_USE_EMBEDDED_REG => 0 -- 0 ;
-- C_PRELOAD_REGS => 0, -- 0 ;
-- C_PRELOAD_LATENCY => 1 -- 1 ;
)
port Map (
Din => write_data_lil_end,
Wr_en => AFIFO_Wr_en,
Wr_clk => AFIFO_Wr_clk,
Rd_en => fifo_read_enable,
Rd_clk => AFIFO_Rd_clk,
Ainit => AFIFO_Ainit,
Dout => read_data_lil_end,
Full => AFIFO_Full,
Empty => sig_afifo_empty,
Almost_full => AFIFO_Almost_full,
Almost_empty => sig_afifo_almost_empty,
Wr_count => wr_count_lil_end,
Rd_count => rd_count_lil_end,
Rd_ack => sig_wrfifo_rdack,
Rd_err => open, -- Not used by axi_dma
Wr_ack => open, -- Not used by axi_dma
Wr_err => open -- Not used by axi_dma
);
----------------------------------------------------------------------------
-- Read Ack assert & hold logic (needed because:
-- 1) The Async FIFO has to be read once to get valid
-- data to the read data port (data is discarded).
-- 2) The Read ack from the fifo is only asserted for 1 clock.
-- 3) A signal is needed that indicates valid data is at the read
-- port of the FIFO and has not yet been read. This signal needs
-- to be held until the next read operation occurs or a clear
-- signal is received.
ored_ack_ff_reset <= fifo_read_enable or
AFIFO_Ainit_d2 or
AFIFO_Clr_Rd_Data_Valid;
sig_rddata_valid <= hold_ff_q or
sig_wrfifo_rdack;
-------------------------------------------------------------
-- Synchronous Process with Sync Reset
--
-- Label: IMP_ACK_HOLD_FLOP
--
-- Process Description:
-- Flop for registering the hold flag
--
-------------------------------------------------------------
ASYNC_CDC_SYNC : if C_PRMRY_IS_ACLK_ASYNC = 1 generate
IMP_SYNC_FLOP : entity lib_cdc_v1_0_2.cdc_sync
generic map (
C_CDC_TYPE => 1,
C_RESET_STATE => 0,
C_SINGLE_BIT => 1,
C_VECTOR_WIDTH => 32,
C_MTBF_STAGES => MTBF_STAGES
)
port map (
prmry_aclk => '0',
prmry_resetn => '0',
prmry_in => AFIFO_Ainit,
prmry_vect_in => (others => '0'),
scndry_aclk => AFIFO_Rd_clk,
scndry_resetn => '0',
scndry_out => AFIFO_Ainit_d2,
scndry_vect_out => open
);
end generate ASYNC_CDC_SYNC;
SYNC_CDC_SYNC : if C_PRMRY_IS_ACLK_ASYNC = 0 generate
AFIFO_Ainit_d2 <= AFIFO_Ainit;
end generate SYNC_CDC_SYNC;
-- IMP_SYNC_FLOP : process (AFIFO_Rd_clk)
-- begin
-- if (AFIFO_Rd_clk'event and AFIFO_Rd_clk = '1') then
-- AFIFO_Ainit_d1_cdc_tig <= AFIFO_Ainit;
-- AFIFO_Ainit_d2 <= AFIFO_Ainit_d1_cdc_tig;
-- end if;
-- end process IMP_SYNC_FLOP;
IMP_ACK_HOLD_FLOP : process (AFIFO_Rd_clk)
begin
if (AFIFO_Rd_clk'event and AFIFO_Rd_clk = '1') then
if (ored_ack_ff_reset = '1') then
hold_ff_q <= '0';
else
hold_ff_q <= sig_rddata_valid;
end if;
end if;
end process IMP_ACK_HOLD_FLOP;
-- I_ACK_HOLD_FF : FDRE
-- port map(
-- Q => hold_ff_q,
-- C => AFIFO_Rd_clk,
-- CE => '1',
-- D => sig_rddata_valid,
-- R => ored_ack_ff_reset
-- );
-- generate auto-read enable. This keeps fresh data at the output
-- of the FIFO whenever it is available.
GEN_AUTORD1 : if C_USE_AUTORD = 1 generate
autoread <= '1' -- create a read strobe when the
when (sig_rddata_valid = '0' and -- output data is NOT valid
sig_afifo_empty = '0') -- and the FIFO is not empty
Else '0';
end generate GEN_AUTORD1;
GEN_AUTORD2 : if C_USE_AUTORD = 0 generate
process (AFIFO_Wr_clk)
begin
if (AFIFO_Wr_clk'event and AFIFO_Wr_clk = '1') then
if (AFIFO_Ainit = '0') then
first_write <= '0';
elsif (AFIFO_Wr_en = '1') then
first_write <= '1';
end if;
end if;
end process;
IMP_SYNC_FLOP1 : entity lib_cdc_v1_0_2.cdc_sync
generic map (
C_CDC_TYPE => 1,
C_RESET_STATE => 0,
C_SINGLE_BIT => 1,
C_VECTOR_WIDTH => 32,
C_MTBF_STAGES => MTBF_STAGES
)
port map (
prmry_aclk => '0',
prmry_resetn => '0',
prmry_in => first_write,
prmry_vect_in => (others => '0'),
scndry_aclk => AFIFO_Rd_clk,
scndry_resetn => '0',
scndry_out => first_read1,
scndry_vect_out => open
);
process (AFIFO_Rd_clk)
begin
if (AFIFO_Rd_clk'event and AFIFO_Rd_clk = '1') then
if (AFIFO_Ainit_d2 = '0') then
first_read2 <= '0';
elsif (sig_afifo_empty = '0') then
first_read2 <= first_read1;
end if;
end if;
end process;
autoread <= first_read1 xor first_read2;
end generate GEN_AUTORD2;
rd_count_int <= CONV_INTEGER(rd_count_lil_end);
-------------------------------------------------------------
-- Combinational Process
--
-- Label: CORRECT_RD_CNT
--
-- Process Description:
-- This process corrects the FIFO Read Count output for the
-- auto read function.
--
-------------------------------------------------------------
CORRECT_RD_CNT : process (sig_rddata_valid,
sig_afifo_empty,
sig_afifo_almost_empty,
rd_count_int)
begin
if (sig_rddata_valid = '0') then
rd_count_int_corr <= 0;
rd_count_int_corr_minus1 <= 0;
corrected_empty <= '1';
corrected_almost_empty <= '0';
elsif (sig_afifo_empty = '1') then -- rddata valid and fifo empty
rd_count_int_corr <= 1;
rd_count_int_corr_minus1 <= 0;
corrected_empty <= '0';
corrected_almost_empty <= '1';
Elsif (sig_afifo_almost_empty = '1') Then -- rddata valid and fifo almost empty
rd_count_int_corr <= 2;
rd_count_int_corr_minus1 <= 1;
corrected_empty <= '0';
corrected_almost_empty <= '0';
else -- rddata valid and modify rd count from FIFO
rd_count_int_corr <= rd_count_int+1;
rd_count_int_corr_minus1 <= rd_count_int;
corrected_empty <= '0';
corrected_almost_empty <= '0';
end if;
end process CORRECT_RD_CNT;
end imp;
| mit | 7cb8918a17217e918f741bd22cac6b72 | 0.475676 | 4.069309 | false | false | false | false |
szanni/aeshw | zybo-base/zybo_bsd/zybo_bsd.srcs/sources_1/bd/system/ip/system_auto_pc_5/fifo_generator_v11_0/common/wr_pf_as.vhd | 19 | 27,402 | `protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
e5HXux03McEJscFg80ZeuZznrIJptNO1SFQrz1pWkRP7P3QoqpS2mJZRj5k487CXMg1LSvaDqmT2
OL7PFCCTiQ==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
hgCd2yd1Ey3kW4Xi8EYui71ziVJlfu+yPA/iSZYYtw01d1xCQQbb29qdxk14t+CL2ulbT/AG/Tph
KVRTNfPiGK79TWiKACghNYtvZsEbOSiWp2tzfhZzsTJKt6Q/Tnk5KS0q9lShCg5S46ZxNmKbnoII
YTwtWH6VQAWKrWw0gQI=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2013_09", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
tPm67AAwZoJgqE6aGdH3UBgFSYY0hEjWFTT4t/9DwITm8ODgcytWQbTKxugKHOWkwgxnsfouuhwt
QO5L1ilTy6LqSek7CTlbPwPy4k6tJZltW8YhAKZe6X8IJvIcPyG5jVx+6vlxM+WibCk/roITcPkm
9mxr1ZYPG61/YergLsZha0lMNqW4wq3ID24jQg1utjPuifsU4f5hPPbAaCmkiuYhwkMNuj6VHmIU
m/hi3cIAvUetwb+LazrLlZHRjTpygeOmt1PlMgoOOBXow6h7AJvjUUWQmikWL+0eXLxGX1SKnX5+
Op5qf6RZYmh6jR7nN97PHzmxB7CCeLZXWlS7Bw==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
as6iakL3FcmLsNV7kgkV+92olQIBIL1+cbziWnl5Jjo3DH55nMZNZI73AcIS3DfwFYnxJCqB2SLa
SuhR2kAcUXkLjAVN6C44hN7PokTEYbZ0O/DrWDwmWxnool0q47JMJkAhu6l9w278iR2KPAv+EoYt
+JQKH1y1F/+RNrZ1eYU=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
BFKuZqEfqjecGcxpRGmpCDvmWO5m86XHlx1Avi4sYpYvtXIvQdg65YGdV1jpIV3rjwKZHTLGWY/h
WohbbV2nhc+5Ruu6dAeqtH04PeCXz8zphv8vhckLjpwnJT0GWHiaXAcncvq/6wuXR25ASAvhi3Ai
lvDf+vNs8eunn+yE9uSpqndZXDEQrdOREqbbPaHrHScG2A0wHmKCr+QTb2IHKcEfLgWtjt/VCXIv
5krerkdmS143EXlDVZB7mfDSlR6bwswWViVYnH2kDpeepoBCAgyzi+PoFfcxhkn8DGVtdsW89QDd
rLaMLCCjYMVnBfrYxBWw0Bz0mfZcivLyxd+wbg==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 18544)
`protect data_block
YipYQho3Y0zdOvNcJ1BUuYyd5pc0Rh/syRh+gLy6hm+lyA54M5wSQ2hPfD8TI9EKi9VNSHv+4JyP
tJjp0+P50R7zZOuQqstMvoegiySWsl+FuL5rMO0HmeaDdAlO869bnln4ebhY3LgErTtdz79H2Tjw
8Y+r0jP4ZeQfbBolBNj8K4avqBB6MJpeTgp6c53IZBHu70hP7EAzr9EL6SvxFTIoOzX3u0JAgtBu
7nxR7lavgwwo3EcpUzAj4mH3uoHpnLbLpREI8QpNoCrST0nHzoIeGv2oTeFFzS8gG853y1QLdrix
lf0j1pCZ2imma66UmxY7Hsi62ZtasofXZqumk0nhKeHtRugZScgbhWfKqk7Aqvrn7+7yba+mDY0h
8x5R9rAUnJh4He0UpHMPCDdTqv6QMDGzsQ0I1WBNhXVpVftUtptlNJSQHF/AsQI0dufguRoPw3mj
Ai/mkVlLS1T2OTFbyw6Lc+8h92jbacosHKGsC7wC4vnxmuNnBOaYTs8yO5IzxgPz28lcYBiBMADm
DJGqcrrXGhbt4opJQoo1JXSCYL/PMfPWqxcQt2XqxBvLiHTo/pi/lql9bhYQ6xuatBmkVWlrTdlR
BYGZCatUQc+uQqfJx+kRUTLB2dR+472N+ZrKxRYX4tGZyTU7jKXgk4FWyGsnlmNpF6ew+1Z3ko1R
ZuGl4+dPZrBoyABi1NUya1QT1uz7uDyCS8ijzKv185MPXjXOqrmTt/1sDmHPSpVI4G0YZugEPkGX
s+ku/uOBEAurExJOuWFW/J0AmR3gbnx48RTJt/K0p0wk/XcF2vUzhSbut/a6RcQ9Ex6nVTYcBGrE
FJ7op4v2ZUnKXv+D+Cx7HkjHcvpzO7VHPn93zFaBzdErm+2EFrG7KaFjLo8rC6EJEzFH+iudzjJF
pRk3WKOjYFPxXbkk3YT1OJIZWUKXGS7SVIKtjK8eY2e3Gc+uHCEs7x7yOGjAqXppk8sF9oYywMZA
D7VrQifsv6DQpnHT2cXEi9YMlo1XXtHOZXRwqvioW4M8F9lTWAwDjeetv8HV5XJX58XpN/Ls8u4d
dOxyce8aAAncZCceLCCfpTnGaEah2RllP/H+43vNi4OO7lVy/QFsCOPwcCpcAUdG8hc2C9m01XDu
1Kr0Qi2FqO1/mLavIYuk6nPCj7VfUqmg7K+cPcflRvL8JJqFUt4l46MShBHjbSt49d/RsmtJxHsQ
MPmBDpRRKwbnsu1YyGzu/Gxck24RFWcGYm0D3K/t495YQLrcPwOpzuAT3A3POKhw5q4fh4ov1XLT
04GQHHB8ZPrXHD2xbreo5FYp54V0QUzAgxnp6JPPNphxaiXlZwfc1tER/znJ6m7jMDyJBKHxieAA
i39OjmIQ1IxTysJjch7DoPUn2fghM8pfMcVc64u7eC6umqCkn83tk782L0wI1S+/55N0P1wBsaxl
yR1Sa8mbi4RM2zku/6iqSiZVCj96uER6Rv5JqE9xKevXGACOkV1ShHKJLFjHmuge/gNj3Ur8aGn/
4Kr30cfo2cnYTEPOJMCgBVqAVKzPRs/hPD7H+MrHDPw2n94bU9k2y4hmX0yP06HPZ6U4tAd45BCu
plrTbh5lWrxMxoPbSgclb9IVTath03jcwzlquPed3H0naZ5HaywBrl7uA5eZj0V7yiVGtR7gQY9O
WXNQR9+jZIo0nMzNXmKoPHFH8OA064xAanN5i+smasVuRINJziSU5c9y4QeAsFVivqD0yF6aZxOI
Y3pmTxfvCAznzK3lD8Xx0aDzYOLrk/1c075I2til4x4Vxfrcw17/5d74ifSRmlpOystpgl6HB31z
dNNSIUkInsYnhOFT0HL/74/T0okFIkO6RTz7W9eVIixTnn1hvCAd4GAU4xx9zKOYT5YDvIC+XPhD
4iLLiKmqwsm+ga+QqLOl0PdSKzz8NntBuB/64g0K6FgwAUm4v4b1IJSuIUwDluB7pfQnfwzod+f+
cywMMbKWIommxQEQg0wHHC4ZJGmXIHmaq5F0VG2XCiI/iok4H33QPQbsOIF9r4107RC/8AmjwSek
FstqPwcnlboDbXPBSGzq4oP0oiUdQesaWyT3GT91q8PBhnSr5NDbGmh7SM3/8MC9hDm7sN0oL/+5
JoytF91n/bs2NpEae7TT5qNkLi6P/XPzZ9tK9aNKXPhMjifEVQupsdgB5X/44rbwd1RZeKnLSeZ/
RY17yREpwDwFX+Cc+V9Mqlf5dZJ52dUSAtT6enchAR9Z6ylkfJt6lCgaB3synvNTaGsQxlVaYm5e
wpHYKWtBMOtL3jgirmgvEP8GleBIvcbMXuZaPaC7lOPBAuCfhscA3cwVKMJSwICP7CGyhZxgGFR6
dg12sBIq2xSs2ksndqV+Buemym4/2jACGk8vo08bbftvkDp4+S8FokbzNHtLdsEGCKDziwZzCjS0
BM1tcWXsXu6LSjRiX33jrriSGFq85OwL/2raCfw2Qzrpbcd08L8nnxt/JeeAZseHaSLPVSPjptH5
YCmuLNPhh3EQWEFN/Fir1IhpQILh3Y0lOTdpZIUQbv8oSaOiNY0j/SHJ45aA7l1Ws3Oog2gZwuoE
JKlOP62NQfFjBHQaeahI3X8iCognBz0bIqrpXkbzJzNF9J/a2WHVTa7QxBkkD8tVMK3wZxKFP1Lu
+F0nH931uEhLPRDhueE6Ii9tSfDz1VNLD7K2YqHKZwIzUfOdkg37QGIKIsrr/ICiv2iA3QcESnFV
P9DGTUhtWjNywJr9Z8elIAWAMBhV5Lp6PG9ludqO1FqWRD2VEfQT5nscDgCYsxWEGn0OoN2B1p5X
UWadDtZccblFFjrLSYhnIK5sErjILBrRfvW5b/aZw7JhPAZYzBgDRinclFi9sqo/eIV95BajtAU8
LsHxp2Rp5hGBZSgS1FyZcMllJ5NLKOeCkASK8NBTpXJW3vEjS4TGlaEcD7McM63khOIGUBbvcjFS
QdWG+gJNVRJDwh9To4T1SExO+K9jtz6KGJexE4TMGlQghxzOTqxyReVYq9DYrn3dA9rAt4i8Q/VO
wDqJ+AuU8QVQTUOm/p6zAAuRT5zErhxXC74NvBFEh29VKuaYCjp4at0r849HsHoZVGBc0CEzL5Ve
WROLmJ2i/9cdveg7YbZIehSGG65w0ffu9clBVsGTEPp4bNDN8HfvkPpxN5rl9Z2rHaA8TA6fVgk7
mZEzLfjw+IbmM9X2/qWk5wqjH4TTSzt8vG80CAKZmZlL4dDvGPEZNFELLqSxoLa/e+xFeA8SJxg/
vyc/Kq+fDm9Ehz83SaOFpm52Z++plU+hkMmhDESEVru+QGQHq06ILXgvikFjkBNgic9saD3Kn/Ib
ttFH6MVhzhlGBD1QG2TLcPdmPF0KvKP4oeH71nR1W+DiFhZye69ZbQtUeBYDD4YYb5bUYpgMGHd/
qptHs2z8cFRFHhvmt4znDt1ucSJ3BQnqV9S/ZyQSlIe1Uen4tIheZosSf1Wu8VzutkNsDv0Kwuhk
JdWIL/l5OGqzNYzEaVWXOb+TfSSJa++WpXP8LeIfN5JfTIrG6CHBvB5+Y25JsnJUnbFrDTOI+Xy2
ycp/6GsKuYCbVQeAuhytmVv9PWcqWmDhPmni5/A562hFHpn8+Z07h0gPF6IiKFrskQhyn4CJqjjX
Kjtb1k/ukrlSSmXRpRho0MM/A3vZW64EbZVgcynzZ9e5glxmX5HfhvkZmjc+1TImw5GXeevqhfRq
z+vXJ3vn/oOHJT+ioSxnChy4k0TBqjkyf8Cj2UGYoZvAeDPii2zAqrOF9cYxoq2B43et5Kirdz/w
WiBUya5OMfRR1FjtQcWX+OqTDFPTfl9dnfuvU9ZS6m/Limv3i6QGVnoWAzwZF2iT2ohf6zpAAgSl
x0req4Yaq0ScpfO6Up8fqONgMJSbwW/599RDXn7rbTxyxtWG8nvz1QJoV+Pcz8iWRDm8l6VJ0/5E
1phrQNhEe7UZ/Y9QFCldGcQ3nGXlO8pKOx1yjCKkcLgkIO6ArdvqXHSffljEvp/qpJ5F6l/QAo97
gHYfFCEJUwA1A+C2yaByPjocORNAVndoY8rAqa8700AFgq+PnQ2Jg2uGJ8dGIXe0SipF79CyAEty
DLHDDflfIwv00PLJ9b/+ERP6n2CE94ngO5Mm23NviwiU6PSFnQuhwtl603M2UFSW37outksK1wfp
CvjJYTw1f+t5llqv6hB7YclYqyLZlXjWw2Ac+dHwpKLjpoLSIGOmb0vUMbnBjsWLKrQfau0dip5S
qoOqIcn6CEZvFjQwBnwJD61GHe5wg4D+2y23pI82MesNw/9AITDd4kwt+ecU2ozSHduweu3C4i7s
RhiuAmgUtgcH/KRr9YKU8nAWrnj3+4sLkV9qLJPOx89vE29z5R7JTZ9zm3ECQkHOgd71CgUGGF3Q
FHvBbuT27PqeA+sRqReT9ZZ6Um7DBbZ8sLxqZ8G31ULNtYQMjsHI/ROh7eoaB2L0I5ao5BVVeN5/
Ag2vNSz/N+uW7iTst4KmC/32vGAP5T2aN56iP4URB0e+nmNc83C6oDfL3C6dt2v/Q4U+k4FMSPDx
SW422tlsmzQlayjN5AY8C0u2V7uWLcKoNGmDSyAAmiPnkcX/BS808aipnMq6lovQYruuqyRM4Wp8
5nBCkMYruEZnrV9SKVmxHyribcLm3EMIEiFqpHgFkXh9f2fPDeLxTD+x96XOD0DZbRIqxkksKmpq
aPaHG/CHcWyUqIrCAqJRDMTALdlM5VeU+MLuGfkNaI8uLU9wt1m2LWrZrYDiLp+eByEpKSKdY/nD
T9IVqmcXyrV5jQ62ebf2aWTDHdw/DAEu2JvwNDoc2K+j57FIN49lwZ4m5Oz35UYDIN++jdZ9EqSW
zJa/JNRbK4Zv6PESVe7u5jMOcrfyVBU7+OSLT2sRuBQkxgg/6wCdXnz0XA5xK7OQdRwmLTXz3sDk
+xhI1uybi8G2tI+StNsVH6BMwvBVfnCoOVO44ElB50VCS/jfTS/iNr8Jm7KK4oQNPF9Tcy0mTCXW
8IsnBWfOMNGPS2QO+YjnwN8DMLCeZ3wjdVBwL7e7elkDhBgbrjbqWckCd/BoLYMGeOvU7zpLqnPO
46fG4nmZBXZYh/l6h9oZxl2zX3qbxspRs9shbPd+ftS0oH0XoCCCLIzlwLRSU/Q3fcWgtSH3U1CS
CtYl1ee+W2Q/rXYlX9wc9A5Go9DjqVfuZNQgOZkRnbqWHsbA6diR4gOQVP5b0BlJWjuTCXu7Jw4F
6XZzykRuF6Rf8o7uDTQ4uqqZuRtO8zrDfRYAevZhaYlPu3PR1jFI71XIwigUeD5h88t5Zjbspx4y
A6Ow1E7S0/PBMVJ/r1a1OvdHvP5KTMktJ/bDcV9dWo+LwbOkXzsynSCq8kwf6zjtQHpDdqYoZwzE
9i5zGdlyKD4FXGNoDGv0dcxm89tK/1swQok8fi7LHF40o4YGq9xyY3YeqTM2bbkSJt444dEulrKM
x5ozW/OcIUrwrA6OgpBOUfxhIe6S2m1w42Ik72WJ6qrsbympIsDvE0jEpEUHMNBuiXITnK/OqnLl
ERUjK6+U5PaGdaqh0bjFmNZiX1cocH3X79LjecSIn13DbU5rqiAlZhJSloLwDVLZPIsvRvbZIXSn
ZXjYgbTrZLV8SVg4JvjGWlMAvK/YfmXW40JP3JHuBEyYbXu36jRRC7AhB1usF3HeCw0Rw+IqDs7u
jOSX9Y9pDJbcYiolRK+xDCRweRonRhLVEnZrFYN4coPY/1K3mnunq7V20R1W4vBshiZQKyKEDRqA
jnOvCxOQyRAnS9gBekEfsVCgeGBOzs3HT3sFNrj+UeTLWFhUS0bBxlyZ00LQvTcILczp+u7hpGHa
3VrdZ0orU4I+ZKCsnLFr3Vg4AH126akAOBGv+xll6za/PLn7mm3xyrBhVsnxI8KLtF+H1tO4n7A9
JgNzaR3D/CYOiaKUlMKRXH3uQTDnGImv4u4++9b/HTCKU1yWsrY9k7PjDZ49X0WSp/Hr+CDvMwOn
7SibYGnk6tQadL5QV5EiR5+jTRDH7Mc3peXhvN3vn2rBepuzIQ5NBagyDRuG+a+f3el9mDiuJpF5
uS9RBCBe0IXnOUsTEoI4e/s3j40/0qxjHtQ4kelRJfbQkmD/951U/5Q3SJfLkpP5hApV2FtPEB7e
rurY69DDdPL+rZn+AwP1dd/+XCLvNIlhgKB1eYuAuJx/VekvNsaJH0JK5zesa32NHadoSpbQWJAI
aHCLtpBIzYe2lIcGKTJcaw77E/+28wHS1RILm8HZDrcUdfIuAbm6Cs/v98xmOabJmaXH5aaSicJf
4smewmO08lGFa717H6U+DZg4hYskK5HJ/ynjnHbxjdb8NNwYrdrSxG5mgxhj+RjBhXq1vy2wM1iR
0mfM3+xU6demY4eEwLlJQoAx5L6ajpE7rePMD1wfaB+NmwQBBQnGMnHzXL16dtSR6QeYhik57DLP
c0A+DJU9JD0JahlI1yMbT+YHtIPM2f/zMsyhwS+p+PGndmkMlBHlovFTT7qhk3gMPgckHsZm7sxt
SgrntlAa1YBY/RuKOzxNFpSJkdra4ALTbbmuIYpQGrAYYWcUX9vQhbH9I64sjK1bT/24SXOslhSI
WnLlaQcS+/BlOAlG3+0eKiekfQP83benhoAXkvtt4u0ujfR/4mZyf70AMRrNJApmopnrnr+i6lQF
F9/RMDDheQRWhqSDNls52cY1sfogP+B3/issnBcKWVhhAT2aeRRz/spZm2DhTBWtNkynwLGmpGZH
bs3aAMOzYP1/vhUPPBL9osrq3jKOxAWegoiDySCY+NKocJPYiqW+/GtlUHeqxqe6wo2OTmsKn9eW
qYPzE1LbdjZ9JSXR4Y0K3OkrlLKo0NjoF4yHocYqxRAoLGB7UKj/cbfmVftPn4hrk0WrFaJWI50J
Lm39AC0eEhR2FQ2z/j2sz+xr2ng5Vv2IIpE+wwR3AQ7JJqOF2nUEjHl6f5a+agTPMiaAMMvYCWkr
kd6pYWZJW9wBUeo3nr8y4fo0H/BCL9d5VMdyAvLbsSmxxf6nZ8J7mfCptDr63UgalnhDk+CwUeR0
muyPAaO+YcRHYc+mKgORiX3QMIirUwXLaLxv3DM9bzMbGxUBQQVcpY3fRX5ydWW9q9rGG5+Um6zX
8mrX1WMohPEMRCHuXM9yHkwXqj1b7/LtyOX96mIBiVDer/A6GlTxaqhoOXQ+nGgHHnie+EoZ5Ecb
mIgO8XN7GfIglgM4E2MT36uux/niXiBordvYI17dlDfdxBvqlD9A0SXpVCLp4HFa4c4H1y1cwRpr
jdP0Rwgaxvf7CAW0HLKfDo9dPHhYrgMg9tVylo/VB8HbgulDdJVDgc3u1UMg1pKE+tBNXspfyFQd
jgexuVLrhR08HxG75rcCquMd34GQjHt3TY7JsAm0ag96njZywis5EjB8+dSjyundUSLYXN2mHq6E
/942tRLCef/2f+TPnhKec3mFk5ET8zbs1r8fxtXVx0ZPQxoePPeNjU9+eNNU/Z2ChW71W9bggZvk
KtS0J6zJm9EGTmFyrDMWpkiwNToxd2Kdt/+OoOSnA2S5yWqm+tIi674KCVl+BQ3ccnBZm7vhjZ29
HHLKB4fuJqxQrTZwRPr9pDg1+Zm7++Sg3t/RKctOedsNroYoA+BgCR+POYWZfP8q8xqeWKhINbYD
KAUmuguM1KWwEoQ49/5fbjKS0y+78/8k2kNoK1D2PPSNEQUcnlKgEwFVPcSl05OUwPK65xZ85ieT
WkhNbWeERbrbiIM8AYcVu+moIf4WmntGzSEcRRNeewFKwwYSit+ukAo9G3KYSb43G6e+EKsNZHE2
dJxUY+a7XHuuMeydeOc1XecjqgtL32HFxRjoqqwn3FZoad16084Tl38I4WS80R6o6wxeanprtMTh
2VC97EX72m0nIP7KPgFIYe1wC9vDZ+n/0oZ9fozNHEH+mvnzcVd/J4uuA4i2BSIl6F0uE4+NAtHN
yEV/ExKfz4kvQW24sM2GDpTNwOYdWr5kE+09vt/CRfn9XXT3Hxym712+m0nt3JGmg5iFtwlBXJy5
rWxx68la4QRb4vtOdBrmo9vp2+ehLFc1J5EyWUg5GP9TPE24cZfv210TcIubmf3ei6MOVLezdqCD
XoG90uIeX/uyAsvrryo2quIUIF0AbGr8Xil0yEFsZVJQAmealnY/WFrVUzt37dGG22ppBgJjZLAX
xCJMwOPQ1ZEI+oO+AJjmBatm6VaUfNXTrJb6l3oOtt+uMvxzuut1YMfCQ1CGPbw1zB48jzqFwubI
ijFwPjbFmOSfG6twuyNjKAAmb+F0J1BubspzyRtSXJPe9tQI/15rKL84g4EI049SVIX9a903S1e1
CyHZzk19CiNdU5yewP9ITvGSWlCRCSICqKIQxep78hPJluoTAOh79PDnafj+h+S5E7ch8Yi81S8k
mNyNPEWyix8FLZ5+0KL2xP6p7qIhNQEK7nvpsHhhWwakkJ4hWdkGDp601PR9yfiuI2ZootGmGAwV
pwivgNrjN6DuQghdNh2ME/zeWQ+VV4XCVrpa9JVsKPJlWviBCb6wONcO4z7AjCima0Kp0b333Iq8
OrWxqHTzrPl+14kKD4VG7nNyTb63zGyL2QOUijP9k4Gv8pHw7PkHNeS5KIf1oDjTK6vgMTJPatEs
GGvcxGJh8iAa+c3S5GMtAy2UJYfKL7m5XUUTv728ovLh/5L9twFx03VIJKYIRAWMKzqy9V11k5O/
waHMTwb/gIhwWHlfXh5G/QLhVwU8nkqlQUuPckPO6Garees7vzJKKV7KOZCwKtml/G9UYosKYnC0
EFYkoizaYVJ9yF1QYAjERDGuvTZ/aV/ZN7fOzbId6Xhap8HoxARa//2BvXzVIMsjTIbCO+HoU/gb
NoDU0LkAcnj3ONDODg239kZIWFig3kQ+XAH3YinwlkB4pshsYWxkwQinWbuw8qItT07ZtEIv1aKw
OKCeL+S+brh2iZcgi6BFgHhr8i6PZd75SWHiQZrad0GVMnNPPxWOPkrhqX8qRRwL4hUiawESCUNv
oEDOtS1118RupGmlrkX3gC2BdoSgKJfKKZlOjJ5jakU4gVeCgTBbvbdsXLpD28HDO9vc6BxdMFFK
gi4nmM595tTuGfFmhuiHPjqIwJJsyVGVotcBbbz9f0PgNMY2kDMYBBOhaP3/JXfIbnexYB1mEROe
FhqHViCTGEM2A2dss3PtLVhPj/YO0iuBf0Y8bvFoZYMLyZDr+ODLnOfegar6dfoy3I7WT7OIUDEs
spu+oVGb+hbgXHd45+GsNaD2zqI/BJeiNM6j2AnX27e+ckBHZDRpFCLOqThVNQzg97oF3n3AXM71
g5KjzjRUIhAHML+GuGwaZpbElbScV7CpgI6TFi60126MkPTE9nbfFvkA/eRMdIy7wE0SaHRnhV/b
nU+kt5hxJQY63WEYGNH6lRW4gdWRP7f76WmzbkZODc54T9uwhjNkzOAtPid3LIM+5hFkTkxZUwwD
bUWcHtB3N/y5i8QC1V7NBBMTQ640SamAdnlGODhLxAQ1DsfQ0abkpHKITVa6IgG6Ge/V3oCJ1KKt
epiCyt1WD7Lh1SQUVRFwW39iCy52Jp3CtJ6wWBp/R9+aepfl3zXkXaJ3MKmdHi34aCtAB+EPX+MO
/mTzg4yBDFrokwGrk7c4GRMDrPLWIWdZX9Hh+IOQnIB8aVP/5yl/NQSxpr+cO42/Uf6ybZY4hjer
f2j9JhvvTIGD+NjNf5q203zkrLEeWiNuu0ku8mmLE3cpo89M5UM/LncGwuJc3TLz7xynpkBX6Z9B
EUM7sOBbFKjwwNdp4vqeYcDxEzVUNXC593b3YzW50QuEpKkuy/cnMxSPHVSe04zq61NVTrvBYPYs
YYXHTU42zzpS2sfbYUYAQSIC56Y0KDj0zhkE1kMettVIQKfuuSOFNubwju2dIBDm9I3WItPibNGG
hDqiB33qmLLOpjMZzgcHQruZ6lja6Y04t+Un2YhmQiF0zInlCT+wcVSWADby1D5vfvLbEXdo0jYT
YxPrYZpNgATsqUh0vf2loxOBY73ZgM04Tz8WCQyj6kvWQ23JFatHb3mztE5WY/COIfjZzCM69Gt8
BiL1J5741DYKDGNmaOHlFxM701VHFKabHZbj3S2DgOBUwawxFTb4h8HwjcNOPzi861eRaGARB+l4
w82bxOgdroOpDrxi4h1obQl91d5YW4mig8Rc0Qoqg4ZJ8zjnWbiwrV1VX+gn+KezmbKSrFfr0m3z
JJSepO13ElK7SQybWbGkajnNfud7OL144mXlFtDnxFTb7iU6AUQBPMD3hgE2FrHmANw92+i7aiN7
sWb/N7uz+Oqah6RfzNfSitWcMuliNX0PQVW3wSYs45Dy0/osJOoFt9HvXFKfCe60UerkeREnWUZz
vCnLFQcnrL6wNJPqZFP7o5UE4vTBWwbhhRQV0W2BjnSTOZyFqE1gW6J4umb6MSeztJP/2YkbJ/11
2nUtuOLOSNlgYImZB+lKSaDEAlTHHmRly1MeXO/3DEGHmYL6lxs0Jek6tm+AmHjeaFGm632pmW3q
if1PNt1BM6AIom5lJjMk2MePyU5NKeSuQ9nbmTN/yzRZ17V4GSTt17MLIMU0UldUHNfdiwr5vsP/
Ye7Oc6uAwkeoMBZZ/9jbDOU93/vtLFii1n8mSkxW+iPRjih6ueoRra0NPv8Dm1U4nq8Nsq/iTkgm
zXuEdvHJMyX/2UUCNSSEh4sYksJKy7KhDb3F8fkC/p6gq4Qgo6oG8v/Gl3q4c1vW5B/Yn8ywyz1L
bLfItrsqSOm8sW23ndaYKcVALa9VGfjn1S0zY2/l7FViEwWeQBVAGgbNP/lsY1I7vTeEIleulNWu
6LFZ939XPgmq6ivVj8SCk55F3jNVCUv/tTklPSyrKWn7KRO4d7cXb907fWbLvbEFA0H7UON4TI5G
1h4aJU2+DYcOKPYQ2sgtYrz2FrD7h0uRnOKJirpozm9qwa3577/qYHN4e8QSNnrShGSK31jMp05J
unQ5s3won28pWtCsIOVPE5iyJN9fsP4zM/gjMa+WdOBKPBdbOVkssjop1e2doJZ8BBqAJgew2tkk
2vIxeS8P/oOLclWfwr9mReCehXqRRzlBitRyppevy/J0VPYGCGbFmaDJjJCqmvSFpp3OJpQr+lqy
bJZ2BizaoTRSOEKnEMvnSNQ9+YGdRuTKxj158ys8knAGmMhHaELddFlQvLXTiaCLiDNmIhPav16y
Hai+J0pLSMGEbgkmspYlZysRASoq1JVvg8vvYbbzIuQVALPRtYXjNVKlJ7zX+hLJXsvy0e8nsq3U
YAHLaYJlvQaaMzyOxtrfc+LWfvFlntwCVEa/Oz+O+zGWchh32d1RtTMrS+1/s3reMWfgqX3ejKsx
5swl+uyHn/3MkQWvk4W075gHIJ97DR9MJSK492eK3qegKUiCGDsEOGyWqGF3D/NefB0SSrRZ65UL
OrtRt8pB74+3bXbYPwi5mWs6GyYXp/nb0X2AJAsbKnq3VzeBFH49m66MWz+VMtA6e/GLp9lDLHVt
O4mTyjCQSOyD4JEbhRQwX1gP4zjmepvBa+ZNvW+GRWiY09pWYaXZuV4qBBm3YCyK/ghGc75BUA6A
3NppoRCVeB3aIS3scdBrmd9P35jrTf3rFS+p5hbGgiQqeim5hi2s5n7SI+cYMvi3uovO7sVFnBku
17FWI2VohmtAZ/WD0oRm0W++j5JdfS6kUEIQMPC1gkxb1WnN330avi+f1VLDdW7m0whI5PcuAYcj
GNaF3cZoOpoRWbg25dbmYEb7cIbTfoJhpFppZVmD30DoRchMbB9bXtqUqOarN1hjs32DUDyeNIqO
Mn7Nh+fOFd5o/EMFF5S+pny23o/DBtShehL1ceuE0CCLGrxEtg2imPr0qEHtJCgdOrmnPIsl8IEh
35ZtvY2Tph3WdWC8oTzJhkCWcb09fN5CKH5ZyahzoeUtFm+hhXp/+yciZGAUZwzydrPebx69bO5Q
AMbSCWH0u2Fai87FDU32ehgXOGd/gTt5s5kr1zawG1FEXnq4XYwnaOVSrpNurjd3Sonbf4VQLJ8D
uexXRrvcCkKTgAht3s8W7g9LFdGIkYAS84y4yGdvky6LdBlosuiSTmhV4MNgXtHHrjcGUKiaSvWC
2Wp10R41OUCdzKxjTrIrmWSuPmSCtxZAr9oddmNLv/FCDTObUyegJeuxS41tt104oua4kFTW/hL+
A01iFVnCKNIUNaYL9mNv49fa0l5j9F/p8nU3npFDUbdMNpMQSUkk2p7ZAosaDTsW+gu4JvUoPBFT
yRCR8vQeZyRj+STLodZFuDH5o/fLYV6g6WKOu7lsA51cdzEciZvd9Lb1bwJiWeKLoqh6JgMIJenK
rMGC8PDTlue2/2MNGUnAymVXQAORFsivMfkrF8iFMxvOpcw/KYQBFY3tei4jXUbeaRLwPscUDuH2
IwWd5mAV3wcID1cDTcAv1YSfea2FRbOu183DjKndB9kkVt6byGjMIVoo/X8ZZHc3Bh2Wm7UhTy1u
FUw5YFNoAZQmVhKo5ZZybpYayT4Em2CIOxQdDkb7I9p4gxuRUjZVRdXCHEsr+JU/qqj26cq+zozO
Ua0JsHkGSHXsM64SfuhxdaEwPEzURkrw4s7ZWnFvQ3b23wBb16nfXkrG8jP8iE7upQ+b6pxGlb+B
mNaVaFODkctr4rNLEs0FLfrNtxRaoth95rGzpM4hNwoX3/ZJEKBKLkIW0r5/Ijj+5b5IubGUPqjd
k1GGJm2+xpBVdR3bSsBKZ4DLAOKeMu2VKKmmP7ORZon4JI+L5Tn+GevJt+CKjSat2rus07SZbcc2
jqUGHgTAcO94Klc8uUCwMHHB6n2bj4UT/MaF3rhWNCExEp+qr3opgfpyM55I9ED7/i1GY0EYVPgJ
Ap9oVV3rwH+o2+yrOcWZfc6GMoq74aF8JslIULVM+2qf0DojoFJKW5SqLw5yoPTr0KUVuqABdGFx
Yspu1tIUcfFbJyrPA0RRzu1QLpuvI42psuWBJeFkA0GQHIVORFPWstxsTcalya8cdPdU3v+iltpl
v/SMP3H1Vl4YrgPZn3OhfmyZjF3v8N2HxNujIC/OsWOVeUfdSAPJH9x/U4MdpygcA5KmezYvKeRP
xB/giq5JBQg5H5Ujf76lM39+h2PeUb4iwtaS9UEeHBuM05PL9aPFhCKe4D1dHolZgEh6eSa7TRUA
4DoHLQ7olIsBirWz69ep5WkIVSONjIEPswmvovc2mn3NiYnkfU3Gkog5J6v5OvMWQNJFuGbXogGn
9HHiaLgh9hUbczpmozH/nKUbPVwDpw0NYtIb5ADETd/GSdx9QZ7O3P5OC5Pqirmsu4+sPKYqdod+
GbIZVOyC+HUl6WoGFA6itaX6brdi8kfvMs5uZLboDf5tM6b8qTq+zESQsrpKaEw7Nd7n5RQQpKDp
yE7Bg6RYXcygwmu6+4V5AaPLvwL7uODKb23D4tGXjFwpp9zaTz+89l+snEQbdFU3ohmw/yyz/EMu
5mRqE+mXyOQBSdAe9r0XlsCOgqc61AKfH9xk3WPhUaGBeG/OWg0AXtjsSdDXyNUw6TlMstvMfsjI
toVFU8MPbotZt3OeZDFvS6allPu3Nm2/VcCpo95lpf9loVBH+tWvzeiRTN2wASYI7/aUJb5DROli
gtEtTz2Lr674nCqQVV6GytTtsYXqtDoakYFEKbtRjtxUM0DpCaEYvaLOivvnqbFqfmW3eoHUuvjj
ci0+TV0fjtWJwYpq+gDoxj7YK1hYXQg5bfSLYbd8128+6gS5z5P4ZPCp9ht0dsXKZ8TA76qRuPhC
xrprLRJpaN5HCmUvvh9uriWmR5sKGDOmrBIk7EjjbxCbSlU6f3zBg93EhAMiOy+e7JrP8Ya9kB6i
GYtvafyFEuMAAZ68oYwxC5XTUm3G+yKqf3NMcasfdITk+wFDp0ZcwsekmyOn3b+V4kftznm/9YsV
oO1u0Pfxw83r2WWXY0HbBKUG8OWky0cpe8uEF42mfplugX+PkS8ecki8Cbj0fY+5OpAag9ztdK3H
9Iysutz6eNtUSSQ3TIMPPUf1EFpIfE4paPGwqmQPkC3G+b+cwGIFap6a+iNQQCE/I0zGvxnRZlx0
PcPafonOBy/7TnGHIZOoVGNO253BRJWIp1szJCpPLkSLRkKmx8VFHwG/5e7v7wWnVypYfxcTRPg8
Q828dUlzi7G+VmkvaE31YV+gqehUlf/15kYZVBwq7zxZL2BrwYKPw4wKrVunBD6p3ohL+jXgbxer
PjLE9iqADB7+eImMnxDtCluonDrjYniKpW1LxuIniZO3su2XoRY5pOvjX6C5QisH3aoR/8TJkdfM
fN3xgI3P8vLdAfwFYCQUnHfZTVyEqmL+kaRyUA3NrPMpGgpfqPtj7gYewn3Hv0ZhOyYz23/jcSFM
htS5iFfqIhyHVKw0UKl5KZM9IE4g3y3IVGjS0U9lKrDumFGDeAZ1wtADTsx9cz2OVDGDuoFEjUMe
cB+tEqHe3SAIOckGyfWrO1DWyrT646ucOyX7blIBh0pq9Z8ddeOKHCw7BbEaT19XYUSzl7Ofa2tz
yTdgLURytTh2IV7q/YfIL4htgouJ+wXIJNYS+6OT3dFIozUaI7R/3o8iHmokYtYR3tZ+M/TzVIcO
Wzdpnwlv8aGyMxtFOoe8Hch+EihjyyuwLrk5gUiiHWWXU8Ml4WQN2CVKTlBw52egmPjGl1e7hdio
FiLCFnBVYbwrdbCEZeIJpHkMVBqjtPhKVrl8GC/zPUpKbMxuS6a0v1qNJgqJnLcm1DG+A4rGFfGj
uJvIUvTyyHlfI+qPo6q2cxcm0U4+vI5adCGN/7N/rqwbbP/f1Ba9THvJSQugIGhh7oD3YkbE1/zt
6xVBu5Fv1+iu/aFl/VkMhYBPiKsgY7ItdBKQuslIP1Ks8aouc4yXd4HoxHn29mki3Lv6z5gBGtpO
QxFH6FPH85u53e1Ddgk/1iRUw8g8oEcerLWpdN0/X27ET0zzjNrDG8COonL3ODpIrAHTfZmYc2cC
Gv+7xCxsu5h+WCWl8UL+kyB3jP9GbJys3lnodpQbnEzHTVu2Ihpso7/2TEHuS/yYOnLahoywah9i
m06eBcHH7Ss8a4jXSIW+dwQgeEMdg0IJFoP+s+322GxuZ8Uv2hfXrs6f7GdalQdTHcGY/QuRH9GN
Pz6soelvpus6bbJjd/AEbTX7eKOS66DKvjYb4PS/i4TTWoPiStCgrzSjjxdJRsIJmIf2PMu5x5Jy
wjW6wZ1H43wiWGOwNy4RW+75l9cHl4qnlCmVj0K3ZPT6j/hQk2BT2b4rBVI4G4+Oyw/GGZL1O0AT
WC6NIciKZ16Y+bLmWypwuDn6QFIfL1p/S6zSMsbmvYMne4E8m5GSqH8OG1leBnuphCZGEGfd3+k/
MIslmo6iInF9Ib8kG2kBA69xBNNBqsyeiAmeGFiu1IeWJBcDutwilIHK7txjHwJTJLPD5IUFU9oc
qqDNP34YfvlP6Iwd7EifSF/3R41ri0AtDKFx376VY3Pdh++A9TCQntwBgQq4/iUptTNugakkSN2K
NTpMTS1q06w+6DjVVJy42CVlngYKXHxx5G5ECLQqA4dbyh2Zp/iG6mi+VPrPx8r7P/Sos7CoiP5b
ZI0Aywu6B5auRfvh0Ta3XmZpCae6dXSQfc+dqZ1f9AW0ms0sqNe8ZBq30ML0jEiOLgiXWyfATeLI
FV+z00O1LspHuttHYVtV/uudwBzhyA0wC+qifzMlUuTY/2eLBZGe1sATwQP+wF2mpCi+4x4MzHen
rKrBwc95W8qA/nARNC26giyGPn8KTaTAG41huudPo0q2b8GoWnNeGbnrcOaShY+/XQtz8vm6kMKN
MZu+8IQyVR3a7M95Mgi4VDtNRxpfFvEjUa5qoAy3Sk2fRsGI0ArGY/O1x7R/GjtlqlFuPX4QeWCd
rmwerj/1R+Htd5CyqIEQlJJMc0U+Wo9rJFlE4hx+ADFsb6iGkVY4eJFFu64Zt05FWnLF0EclikyI
3QG3AsG56sK0IvBpA5zbXacwqdeIoLyzGwV7AHc+07sr5H66t9lblKJXoiDRHOQ8bqj22TuknxbF
/zxPCOo4HM1kZuHL+4VNSWYVtZ0YOGMbUjXMYz44wU8iTO60F2ANO/Kf7AVaI2dMwvz9qG+HQHiu
jBkFctghK3hPSsLSNPANPA6RP4maOd7/w4jLiquxf/1LTJc32Uq1pROPdIIzPCxKzqnW4srLemUQ
crJs4wCoQ9ZfDGI2eeQLofGq82oIKyj/Q0QG26Ydo61r93U5+mz7LBXotrntJI4ExJpUl2LBaJSR
IgtnJnowbuBCH/u8jm21fR4VnLz5Ud2OAI5MG+eQcxTlLSOLrm1Wd56hbrsh5jiMD27PD1HHIGK0
elLwT5xo6uUP2keGctjEMIl+Fps+sxUppy4S5lstiq667L3Rg2RlB8yvtc/lPYDG2RKlAm9JKUKO
j+K1rdw9tjUbFZz+aOOq/T38Yh1J/2+3fo7Y62r0t5eQKBUSyIwRaIm1TsQn0TOlgxGcWzkVSACo
U0Fr7ak08sknSeixwwN3CU2W7CyIkcYfMwe8Gj0tsON5eHTcoAt8MyWwk2vVGEqQWgDtK+6jS9yq
vyaKR+4ud4HyFnW/TIiuSkqI0PiLmy+AtmjIu3wu6Snsksz0BZ5Ti2nDlv1GPzyI6L49e4iyjW40
lF57uQuTC4duaK9+8FdWFntk6DZHEwIHpa/uC3vFz4LVg2DkIYQmksQFeyWK62sBhrwBZ3PUosJW
FMPC3HQZ/12N/e+XXwbOjYXlCw6UdWZnAG2NgWw39atfIKuiu1WziNuzgAVZ+LLT8rm11+odC1Vu
1CFCwwHpHyT87Rznd5LQf5/G6CO1M8lRtG0YnMQmVWK0vj1ldtE+Z/UmuKMrhiJDfuIC5wzfP6Zr
RBmKLvfa1cX5PrIjKjKxXeWfiO3+WiWrL0h2IZSRI9ogoySUqHNEAE3iOKGL1P2uDarMDxmBS51V
YzaekgIo2LCr90n/OQzJSmN6FZgy0gz6od8u1YEwLL4hRZjUjneaaOp2mq0W187pYrhhU3gc3gpc
pH7wq7PLqtNAdanGLR6j3O4TEW7cOpTr06cM8Ls/Zj9pfvQodlr0OWrtPuC3H2oG7RAODs+g1aqN
4+BLfFd8g7bP1RMsxX73s1asyDS0jWVPAbF6bHEIDzgJGc1qOMBgUqQU92fDhl4Y5g1i/g89I5Yc
9QnmWPtlNsy2lImY3vfu+B72mnYZvUM9SgpAjIciAxw+iabSiR/uqaGmDqHdtfzEwwrR4g9pMYrZ
sQ58OtW12qyahXUes1fctAFBaWwePq71t1vv4PA7UoitcWxW0Cnd5BfUX4nzmjgVNSdj9LkPs1Bk
G8adsRTLfm7soYiRCVSRj6s0a4bumqWMKBT14dipNoTMQy/E1IT1FLNY9p/pwp/uft8JYR7RXgBQ
Mnq6OkZLQD1yo+tzY9J+BScRQRvxxSdBU/4BA6y0KbMaVAGIGD2MKso/zvgbao93TcjBtFz5sLGC
chgNLYqnKBLt8ZDmj+himWSzLCRcSO7nFS02jIZT165umqdiCnv4gAQGxvfeYdGUaFk350czqxjp
vVUaLC1yJ+XTfnsf28s5ENjtU14zZsMPzD8aaMlqKoOz4MOtqQxkBQWDjmt1tQlx1DQ0NT6jLc3a
EQQoZir/5Bdfj7W4SVEm1LxWumZWOSiuVRlLxo0g3ZyocAG2HBJbSBNq+7Jf5ODTMHCcjpMVulmd
2bd1Gs+CXuOEMrUCwRnZOOtqCR9UXJmkQqr2XgPyVsO5Zjw3f3z2DMxS0zzeWBL7Y5JC3lU3s9VZ
0S4ah+Kpn1ii9tZ5o1/deQN+svbL6VfRYZPq95+mIi+fu1giImiKR0gdCvKZm7zC20+1uJFBeCft
kAKGbLr7VqEgyyK5wV34HdaTOp6jnXbUa2tG3sIMRP4rtCv+X9UadZxSb6+ys+g5F6Q+SQ176RHs
MHNAWMYlm72aIzM97pEB3GZ6TQoHqNTcR+1LTLPwLK+pBPvjY8Hk355zpMrVA6bmal9vrxDs7B3y
U2e6C0ofqkgms60AGyJng9ydZ46kKCWybRdpQALdH/FUXnNC6dFRx3HZwQAy4JcrcboxMvGvxUZv
aqlCwL04z7N/xLg87eBtpWOiUQ6V5y36sVorObNCXx+GVtowpiFHCPAk2xGsUFlEv2YpFX7swD/u
SAH65YDgQNlF39nLAeBnzRvuvZwMOeUF8OPWTC6vMsn98j1u93NG9AG1UbRUipMf6+Ihw08tvq2N
94UUvk5MHzGzkOmSkH7qN1wF93tKZm0q3LGmChx9VMVHJtDg6dmzQ8ZzUsBHCFFudnqqz+gPpaNm
22qBDooDKvHVuJIPbmq2FWd9OQ5Ta/A0imX3+El58RdAPN8tEiZsgIz9FKVA4Yr0l5tvwNwBnk2k
2pAyhA2HJ/Pv5zJNgeXqHw2phYFr5nJRDwW64CW+YU1ZkL3ulWiIgnoybMOTPnZKAlYaWKrqv0Pp
H9IFKCDjBigdknflwEb4zeAm1HGUNlcR6bv3Qh11nO8oOE0EtVbBQXJ7yb3F+6fwSlErtTGbMGMz
VQSqgFBXL+XT2pZXwH5d/T1/KPfXji7TyNqJVcIf51hMgnjQMtc380KgMMeyVDEPsJnTtjNSrkjM
SmUvy/dBbgJFWpHUd21TYlCbO1aiiej93AG7xtYMc+b5yGmZ0gqAcZTIgLkU0U2om5BD2xRCtFwp
HfWdkxKGATPsS/y28pPAroViG8FCOq8+iatZGvDrbpdpMpLpDriF/ijP3z1EqF5DBnVQq4zgF55C
AzW+Mrs/tq5IaSBJC9PX5u5gWMLMbt+70+xixE/Db16NA5MWUIIVoJDwspdy2PmJqu6e5ki28v+d
hMD2KKXe4VWb5pNXtNcbuiIeqeXOgUR++GbtN7rO5nZsmb8o2yKPeGdrClnAjlJUbKMkDN0IGkgk
30LE7f3pAWipUA3BYTSg5RDUyFVc6wGAVorMZ3JD+HwMXujzKE6plhredEiG/UK+o/m7bV/LYRg0
/pqk1uMXUp5qDMGBeBrncBxvGx1fx+8jJ8iPIgkGOGNTybGR6aV4kXg12f65Csn8CaVn2ce1PtNl
hG4okFYSj1Qc1wTEPebmDV2YCab/VjuSKIg8WXYNsOpCp9iAkpD4tQJxU9LQnkkfcD7/QT0D/tkf
ASnX9AhsIQXFKorgpEmvKDfgGydBTFy1XFUVZyvKzAXboYVCeSVBe3LobsXEdJisART3zrJ/6d2f
nHdbER/jyiJcDsXPhChOipP6znzTOMtdz8RB1BdKeHW9w+66ODe2YOsZ+sBBX7VocBXIHXuSowx7
s2tyVMzy6jplvYyIgLXnax7UilUkZJu/rOhPRwKfaz7I0BGEExaSWW+mQRifrTUILb0nQPjR/t+v
BZ4zKKf5jAM7QFRxT/m9F4ZO+vKRX5luBWfOjzmeOAyud4tgT9OUZrJKC9egFdmpuzpSprXAF54m
qrQANwujikxf9aREYMN6W2PcSIOI0pKnp0CE6Rd3aOAws7GKa+nzYD7leQmJ5d+TYZLSKGzsTehx
aBOduxYz4CeXUcLP8Pb5G+dRP7Zf3K9Mbj5qwYOLBAN8gNEiEQeLs6vFa0H9RvthRA1r9btg/zTO
LR3SxjM0TO8MRR74R9zdqpgvqclr7fMC8iByO2jwLScKUoYrqdnVU0DMOk51sWr+rGXR5OC+deUP
hfjXo6jX6h8j66Ld5Fwr1UYIKfTX5/k2+zI8plXAklF9YkBIhJ+QPfT2GnU9L97W3M+vkfBjOXl4
L52Bnw4uChIFzagidjKyFE2vb4i3MyA9mVjT5LMmL3fRITfyH9EBw9kyrt4hTYeDzez79vNWmeiR
M4OSKQEe7jJTtrjXtX+mlLCWbAFw5xeXgYYL8IpaSTdvOMN0PwlID5SelMMM/8xi8R0hwIslh1SK
r6CP3f3CwpbVIQgE99MfXFkBfivoVfbWeZxfkcckw7H4lJfn0LxsJvq4UdYcd+DNdagO5qxX+BR7
qApSgDsRkLB84YAvfL6an3FfQUUC1FwX6x0kkBEV3gGj6XtEqqMT6KnRVyJxNVeU96d6BTaQOiAT
8bdai4FXDE6s6tcRIlcLh/sNaXO6iTaGi1Yhzka81Sq9ebor6VBkJUDnN8Xg03k7P3dNisCtOkQo
gOME2bSj4UOxk/e1ti6fXfxPzDCiCis25qIDpZ+Xl0jVt45i0eOrGLI0JSbF/z7ky9tUymqZzS3t
TXuSNPHNEvS25DRuNypCHj0B9dv7CFQIy6fiTff8tFk/xXQqRiHS3IELQF44pIGXiIuOar/howjq
K7ZdZdN7aUv+GsiL5izidEXVcza1aF32sNuW88KTMeDpxhDLaNcgSZhkz4Ms0ci7cvLEXrBi4GKk
BwfirJSkfa099qogTndYFWqaUt9GyskPMoiLvPexTx7FMSlTo0KKgrBMTbe7rVJMl0stZcAp0rLO
x4nQr9e6z/M+SPF+cvcARB6h0dfK58BTmMBsKIOiZdihFjKCCcWOAKTSsYiNK/egshISgRrqNTL7
LGIoEhBfEqttE7XC6kCf7/GKigzBEZou/LmbcwmmhFRRjqZUxSeHF5Zeamn3lM+0T4nun14IwzQY
VeM5qfVYHONQXumXilteDqLIYc9Ome3XakyB7oqAT8j5pksVndyqKBrdW0IF3FZxm/6+wpnJTDXH
ghzoQzMb1BP+DJXIwmgnErmc5SgeOZlIMGuHPYXHz/4XIwQFAYkVnJQymTZwna7LVDVsi1TlX3h4
TU1VCod0BkKCxVx53WBkPuh5i1rL43lcmVO7WIe7Dr3Wt87nnFyvy6ssdeUKgqfb0XcBd/tXRpD5
CaRTC6DtwsZs7EebtiNl+mHpUtKoesvuebTWQsiqYu8CY+3W3z6gSaukeETMCel7gTQA+TUAdDr4
gbHxdZul/OdXIRciJmKKtMJsuT+hykoNRa3jkjg8WZ/k6Cu+pdrfKsKEbXmP5+MOtrzJW9rY5LQa
tI5OzZHTBvXVxRjrT28Eb6If651aNwRkVxArCTkULfZUg2uuz+VlHE3hPmvgETeCmj3wOwIKqf97
viQ9i/00dsTOVaLS9WpsDN17LBB0M/hOURQT5p+d0EJWT8fT+rC5siwBlaqH52trhquKDDUy/UV/
xMsA8D22392j5O78P0B0FncTHMvVzYakAdBJkF1F+dE/I5r03Gu5y3mWK2xgb+9Vbpmun5Yz+Tpn
aoKceRFWWYBLuCF1CQP0CeD/kegAhxaKoEFGVBFt4VS1A2P9H2MzRE3wViqc6QRZWDOyxvc7m4bo
JphIV/1YE4ljhRqcDTeGEzb4rxcVmYvtC3rOld8jpcVsYxFUZ5srZHPo3w2vOUbWjLO3DPxUoCDp
lfs6mjJr2ZUTUFH5MT9Su2hzeCkukhFucBFh6vkibyE10MBSd3lJABS8C6YZ469IbJ3a4ngvUOC+
vIEj5G+C/xGM59+G8CT5q1GCKXvqSuuCvtFRwJWmFRZg03aoFDi+E3lIlQwS9VyDi69/Ha9Lb2AD
iygU0qipv+gpAAWFwLys/E+l/SP2upOsyt1hCeSgw3TM0hGIO2G/jF16Q0wpQTFc8nTU4mHW/6Ln
BqLlSDJuODUXE6zpaLxJeP4B8kNSyDovVRlaCgwQkov+kbJDIBBjL1JpI+aDKpjJA8yeFnKSVstS
cR196SbKmG8sb/1RzR7Z6VFKyC8Vf1DnUXC19tCKTFCYY03FpxxX7HPzqDzyQdvGwjOyTjoV5UrG
Q1OvZvIFsubkHQVX6AJ9LtBDbPi5SCft/xqb3hz4dZ6Ne6XVkv1EkPlui2iTuIkmEJHyF2rIuD7B
IVtd19xZ5iyXitkCju1iWCVCBsyFOjKsz79kYH4F0IA7uiyOqOxGDVYrAxXi7JnWPFN8b1+ofJSg
v5Hr5UH/V61aenxKbjdoBloUfKQXs09YI0njydkd4c1HVSVgVfGcKIr9RnG1IhtvButVbyLQ6ghg
hO/LDEV7unEGgYuX6ztcOFAVxUiJ4V+6rBtgng7UXpuA4hYAgt2PO3z+QnbYEzalPKvhxwQHbhHm
cYhA3PCscnUavhlQYkgW2h34zYjk4+ocLVmglCwSNTbxQu537HR3sUaXPJehTmVsyIHQzFbDcFnF
KLV8NsZcbUXdLt/mzVxLE1jVsWmLL1N9DBcJGoq5XCzF5brUTzdjFNwZVU9docsEHbDjkTHUZzlP
f44DqU869BUkpOoCaJIpj5/FVLeUI7aO0QkysUr9H3mMzREQxLkI+soWwwrNniFpLf3OzDuyFq5A
iBvuzt7Ts2d5wmVfEIZX6IQ0kWNGxd8OawJwCgoGxHniarRFzFpkh4Ij4+x8NzxRkfyd1bZZ6G2h
6E9LIlhJFXRKPvLFvkE1XaKAZW6L4OlbZY+dYc9wqpoOQfNVVfRLdwP3mMoPs8eU06Dl5K5gY7DP
+k2/NT7w9zx/+Fbh+KP2hehLfDfZU+6x2IEZ7MvJCGK2Y/K1Q0w8+z0IGcQkPVy8lkgbTfJwEFBP
HpI+QEug41RrXCAcGyXv2byd/lxgWSo6xz6UP/vWBKhpLAjo4qAYKTeTtXF/FRw0EFYc1Auo3qUb
62x8o67bYBUZzqWTWTT7Ku1knFuXJ88qVokwshaqZfI62KwnKoquDXtHCnr+SsymjiaEDrcaSFBR
ZcMoeTHnS1zDpdnbPPT+weXsD5bek9UDLjkHW5hrF/Mw11lM0bp0Ar52eA07Ob5SMTlOPbnL6T3f
JUayb0S08tpq7gG9q0gMRltUEbQaBpqlgKP8ALSjJ92GxYhTaio8RxRV0pCZZ2dbEnOhkigMTj/6
JNA9E6yS68ZMoAhDGZ/Fi4imfvuhaFGmGtoZNSgpERcmx22J5OLpa6Z2WTJFB1+/oVPV7kZjQYfc
S5NmRBY0s9pPguQADkqq0YBKBcg/LgYZMDoCat0g8NA6AAHmgy6SH6HX4oVMWpqFsCzlQz/LPq1W
SdStPJx7F7YwBtLG6Dk6bt2Mt/dUNpu58W2Qqbu/1vyG8B9HasRhELV7psh24b+ED6hLeeTrIcyh
ee9jjEdW8u0T4g9TzDtKOsIXejiL2lQp8FCJ7IpxZs5ocTnHAh0UopNhSSEwYh0m91t35NSXIecl
EgIibEXF5JOrISpHNtTRpztc74fX3edd9snJapnZE92hGOQos4K6jDwKnRZ2VxsLSSlCYcsL1rP/
tDQ1MAWgMuBHIpR4XBDNFtOHbn1PV21DuqSNVqCfEqW3oaAE5Xi+XtcBDxkIflwHGytq9LWyv0kb
ZSTSkaowbR2y3ipWBTXWeKP3iV+72C9FrwEq53NffwTxwjgXWkb6G02GTN/h6liLN/suv0Q7ywjs
wvV3xPeFShF/uxDLs0iw/zycqXpTT7SMOiwPWCfop/vnaTdL+ENBzDmEW0cmocdeSAR3IGkfn0gu
NYh+9XEMPqoOsINc3VpNXiqtTWarog3U64AaUo4Sw8Yb+Ks67OhQ0a1F6T62XFpN5g6O0oubsX3/
POA6PV2y2HTR2jeIvNXCxFG6/cDesff+1QJVJ9d7ELAP7cUJkagmTC/ND6Hmmpd17npY2XjsTMsR
+mu/WwR/fX/Q6hpiAX3NQDQ/D878jYL8tNVc7XXhqvWQZ/TRQe9U6eBFDuOyRgsL4ynCMBf5MAGx
V4ha7nZ1q5jQ72fkrN7/ezqf/Gyh2heAWxYBa9KOLDpXmGO4cWHMdUaJGMA91qiBddNUIHZ0aEix
cPUxGWWuoZNLo0/SCfyxupsWXglKPfCOvmsOXQS3a1SoL/G67ts3KaajiACYBWjDeyO/H3pl7Fv8
kYan697bHVbEsx1SIV9qXxTB7q2pJuJImRLPDDsajLKkx8kWERV6GPEc4qGPjX7f/t5QCB0/n0d3
iYJeOV88/ewKZdxP/g4dLfkmRK9pEIgMUo+oy+pu2yRP+IXekD1t4je5XBUrAQ9+kDfty2GGEAjc
TnSV+xuI7GptX021w8nw+KYEPz7UOJBESh9dVqLN5xBY6QVT8IItMnkTOclM/hyzCB3dija5fQzn
jaMwbL5GpCBhaVRH40psPDtTGADDdIXNrWk0yeLynEtOKTklqxNPHCRKQqlAmijwqNuoNnkm2lt3
vPAA72U/YnMRWG/Xnm1BN8HErE9U0OkaTb5dYVkTVScqVoA6SYff/K7KtSBt8zOgctbwTI89/UzH
sreJ6hz0onLUOHJnN+qlhwJdp+5twkUlHDE2xy8xXwTGhWgupOKvrCamKVk4TVe2IQ1R6nN+tskO
Z2J5o9ejZwY307KbK0H5nbDLux3j0lcKtshdLfGgTrswCXmBg6VxZELcNoLiAbQq76w2iDDOjg+Q
8WBp3haeMVHjZDSi0pMWmxE0tjnZnLBulajQ8ixMcYW79UsWE0bYwWAcV9ckaCNSYuH7XL6C+5YW
a1aB/kHIqz5FzwhDOt0m1NJfjiLseBTCw7VBOe9bpuIWc9ii0DAO9eINDY9j+Kkx/vydu8xkuHRP
dOxteWuyFOGOPRQWX6nLgHh/JQe9XW4sx3wx3J6j5HCd8558sFaGRWNMLs+Uz8chJLWujOz4nZJN
c+KnIxCGd2Zlqv8IGAJjyDHJXLV/uWdvwLXyCV5BD8g49MAKFrbLkpeN8s/zyV09QDdu+blfB9j4
TSBFoIwCTqx1dmlfoQ8QU1Xqnw==
`protect end_protected
| bsd-2-clause | 5ecd69caccbeb3738da9f53dafd0595f | 0.942887 | 1.831195 | false | false | false | false |
Bjay1435/capstone | Geoff/Geoff.srcs/sources_1/bd/dma_loopback/ipshared/xilinx.com/axi_dma_v7_1/hdl/src/vhdl/axi_dma_mm2s_sm.vhd | 1 | 28,282 | -- (c) Copyright 2012 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
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-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
------------------------------------------------------------
-------------------------------------------------------------------------------
-- Filename: axi_dma_mm2s_sm.vhd
-- Description: This entity contains the MM2S DMA Controller State Machine
--
-- VHDL-Standard: VHDL'93
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use ieee.std_logic_misc.all;
library unisim;
use unisim.vcomponents.all;
library axi_dma_v7_1_10;
use axi_dma_v7_1_10.axi_dma_pkg.all;
library lib_pkg_v1_0_2;
use lib_pkg_v1_0_2.lib_pkg.clog2;
-------------------------------------------------------------------------------
entity axi_dma_mm2s_sm is
generic (
C_M_AXI_MM2S_ADDR_WIDTH : integer range 32 to 64 := 32;
-- Master AXI Memory Map Address Width for MM2S Read Port
C_SG_LENGTH_WIDTH : integer range 8 to 23 := 14;
-- Width of Buffer Length, Transferred Bytes, and BTT fields
C_SG_INCLUDE_DESC_QUEUE : integer range 0 to 1 := 0;
-- Include or Exclude Scatter Gather Descriptor Queuing
-- 0 = Exclude SG Descriptor Queuing
-- 1 = Include SG Descriptor Queuing
C_PRMY_CMDFIFO_DEPTH : integer range 1 to 16 := 1;
-- Depth of DataMover command FIFO
C_ENABLE_MULTI_CHANNEL : integer range 0 to 1 := 0
);
port (
m_axi_sg_aclk : in std_logic ; --
m_axi_sg_aresetn : in std_logic ; --
--
-- Channel 1 Control and Status --
mm2s_run_stop : in std_logic ; --
mm2s_keyhole : in std_logic ;
mm2s_ftch_idle : in std_logic ; --
mm2s_stop : in std_logic ; --
mm2s_cmnd_idle : out std_logic ; --
mm2s_sts_idle : out std_logic ; --
mm2s_desc_flush : out std_logic ; --
--
-- MM2S Descriptor Fetch Request (from mm2s_sm) --
desc_available : in std_logic ; --
desc_fetch_req : out std_logic ; --
desc_fetch_done : in std_logic ; --
desc_update_done : in std_logic ; --
updt_pending : in std_logic ;
packet_in_progress : in std_logic ; --
--
-- DataMover Command --
mm2s_cmnd_wr : out std_logic ; --
mm2s_cmnd_data : out std_logic_vector --
((C_M_AXI_MM2S_ADDR_WIDTH-32+64+CMD_BASE_WIDTH+46)-1 downto 0); --
mm2s_cmnd_pending : in std_logic ; --
--
-- Descriptor Fields --
mm2s_cache_info : in std_logic_vector
(32-1 downto 0); --
mm2s_desc_baddress : in std_logic_vector --
(C_M_AXI_MM2S_ADDR_WIDTH-1 downto 0); --
mm2s_desc_blength : in std_logic_vector --
(BUFFER_LENGTH_WIDTH-1 downto 0) ; --
mm2s_desc_blength_v : in std_logic_vector --
(BUFFER_LENGTH_WIDTH-1 downto 0) ; --
mm2s_desc_blength_s : in std_logic_vector --
(BUFFER_LENGTH_WIDTH-1 downto 0) ; --
mm2s_desc_eof : in std_logic ; --
mm2s_desc_sof : in std_logic --
);
end axi_dma_mm2s_sm;
-------------------------------------------------------------------------------
-- Architecture
-------------------------------------------------------------------------------
architecture implementation of axi_dma_mm2s_sm is
attribute DowngradeIPIdentifiedWarnings: string;
attribute DowngradeIPIdentifiedWarnings of implementation : architecture is "yes";
-------------------------------------------------------------------------------
-- Functions
-------------------------------------------------------------------------------
-- No Functions Declared
-------------------------------------------------------------------------------
-- Constants Declarations
-------------------------------------------------------------------------------
-- DataMover Commmand TAG
constant MM2S_CMD_TAG : std_logic_vector(2 downto 0) := (others => '0');
-- DataMover Command Destination Stream Offset
constant MM2S_CMD_DSA : std_logic_vector(5 downto 0) := (others => '0');
-- DataMover Cmnd Reserved Bits
constant MM2S_CMD_RSVD : std_logic_vector(
DATAMOVER_CMD_RSVMSB_BOFST + C_M_AXI_MM2S_ADDR_WIDTH downto
DATAMOVER_CMD_RSVLSB_BOFST + C_M_AXI_MM2S_ADDR_WIDTH)
:= (others => '0');
-- Queued commands counter width
constant COUNTER_WIDTH : integer := clog2(C_PRMY_CMDFIFO_DEPTH+1);
-- Queued commands zero count
constant ZERO_COUNT : std_logic_vector(COUNTER_WIDTH - 1 downto 0)
:= (others => '0');
-------------------------------------------------------------------------------
-- Signal / Type Declarations
-------------------------------------------------------------------------------
type SG_MM2S_STATE_TYPE is (
IDLE,
FETCH_DESCRIPTOR,
-- EXECUTE_XFER,
WAIT_STATUS
);
signal mm2s_cs : SG_MM2S_STATE_TYPE;
signal mm2s_ns : SG_MM2S_STATE_TYPE;
-- State Machine Signals
signal desc_fetch_req_cmb : std_logic := '0';
signal write_cmnd_cmb : std_logic := '0';
signal mm2s_cmnd_wr_i : std_logic := '0';
signal cmnds_queued : std_logic_vector(COUNTER_WIDTH - 1 downto 0) := (others => '0');
signal cmnds_queued_shift : std_logic_vector(C_PRMY_CMDFIFO_DEPTH - 1 downto 0) := (others => '0');
signal count_incr : std_logic := '0';
signal count_decr : std_logic := '0';
signal mm2s_desc_flush_i : std_logic := '0';
signal queue_more : std_logic := '0';
signal burst_type : std_logic;
-------------------------------------------------------------------------------
-- Begin architecture logic
-------------------------------------------------------------------------------
begin
mm2s_cmnd_wr <= mm2s_cmnd_wr_i;
mm2s_desc_flush <= mm2s_desc_flush_i;
-- Flush any fetch descriptors if stopped due to errors or soft reset
-- or if not in middle of packet and run/stop clears
mm2s_desc_flush_i <= '1' when (mm2s_stop = '1')
or (packet_in_progress = '0'
and mm2s_run_stop = '0')
else '0';
burst_type <= '1' and (not mm2s_keyhole);
-- A 0 on mm2s_kyhole means increment type burst
-- 1 means fixed burst
-------------------------------------------------------------------------------
-- MM2S Transfer State Machine
-------------------------------------------------------------------------------
MM2S_MACHINE : process(mm2s_cs,
mm2s_run_stop,
packet_in_progress,
desc_available,
updt_pending,
-- desc_fetch_done,
desc_update_done,
mm2s_cmnd_pending,
mm2s_stop,
mm2s_desc_flush_i
-- queue_more
)
begin
-- Default signal assignment
desc_fetch_req_cmb <= '0';
write_cmnd_cmb <= '0';
mm2s_cmnd_idle <= '0';
mm2s_ns <= mm2s_cs;
case mm2s_cs is
-------------------------------------------------------------------
when IDLE =>
-- Running or Stopped but in middle of xfer and Descriptor
-- data available, No errors logged, and Room to queue more
-- commands, then fetch descriptor
-- if (updt_pending = '1') then
-- mm2s_ns <= IDLE;
if( (mm2s_run_stop = '1' or packet_in_progress = '1')
-- and desc_available = '1' and mm2s_stop = '0' and queue_more = '1' and updt_pending = '0') then
and desc_available = '1' and mm2s_stop = '0' and updt_pending = '0') then
if (C_SG_INCLUDE_DESC_QUEUE = 0) then
-- coverage off
mm2s_ns <= WAIT_STATUS;
write_cmnd_cmb <= '1';
-- coverage on
else
mm2s_ns <= FETCH_DESCRIPTOR;
desc_fetch_req_cmb <= '1';
end if;
else
mm2s_cmnd_idle <= '1';
write_cmnd_cmb <= '0';
end if;
-------------------------------------------------------------------
when FETCH_DESCRIPTOR =>
-- error detected or run/stop cleared
if(mm2s_desc_flush_i = '1' or mm2s_stop = '1')then
mm2s_ns <= IDLE;
-- descriptor fetch complete
-- elsif(desc_fetch_done = '1')then
-- desc_fetch_req_cmb <= '0';
-- mm2s_ns <= EXECUTE_XFER;
elsif(mm2s_cmnd_pending = '0')then
desc_fetch_req_cmb <= '0';
if (updt_pending = '0') then
if(C_SG_INCLUDE_DESC_QUEUE = 1)then
mm2s_ns <= IDLE;
-- coverage off
write_cmnd_cmb <= '1';
-- coverage on
else
mm2s_ns <= WAIT_STATUS;
end if;
end if;
else
mm2s_ns <= FETCH_DESCRIPTOR;
desc_fetch_req_cmb <= '0';
end if;
-------------------------------------------------------------------
-- when EXECUTE_XFER =>
-- -- error detected
-- if(mm2s_stop = '1')then
-- mm2s_ns <= IDLE;
-- -- Write another command if there is not one already pending
-- elsif(mm2s_cmnd_pending = '0')then
-- if (updt_pending = '0') then
-- write_cmnd_cmb <= '1';
-- end if;
-- if(C_SG_INCLUDE_DESC_QUEUE = 1)then
-- mm2s_ns <= IDLE;
-- else
-- mm2s_ns <= WAIT_STATUS;
-- end if;
-- else
-- mm2s_ns <= EXECUTE_XFER;
-- end if;
--
-------------------------------------------------------------------
-- coverage off
when WAIT_STATUS =>
-- wait until desc update complete or error occurs
if(desc_update_done = '1' or mm2s_stop = '1')then
mm2s_ns <= IDLE;
else
mm2s_ns <= WAIT_STATUS;
end if;
-- coverage on
-------------------------------------------------------------------
-- coverage off
when others =>
mm2s_ns <= IDLE;
-- coverage on
end case;
end process MM2S_MACHINE;
-------------------------------------------------------------------------------
-- register state machine states
-------------------------------------------------------------------------------
REGISTER_STATE : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
mm2s_cs <= IDLE;
else
mm2s_cs <= mm2s_ns;
end if;
end if;
end process REGISTER_STATE;
-------------------------------------------------------------------------------
-- register state machine signals
-------------------------------------------------------------------------------
--SM_SIG_REGISTER : process(m_axi_sg_aclk)
-- begin
-- if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
-- if(m_axi_sg_aresetn = '0')then
-- desc_fetch_req <= '0' ;
-- else
-- if (C_SG_INCLUDE_DESC_QUEUE = 0) then
-- desc_fetch_req <= '1'; --desc_fetch_req_cmb ;
-- else
-- desc_fetch_req <= desc_fetch_req_cmb ;
-- end if;
-- end if;
-- end if;
-- end process SM_SIG_REGISTER;
desc_fetch_req <= '1' when (C_SG_INCLUDE_DESC_QUEUE = 0) else
desc_fetch_req_cmb ;
-------------------------------------------------------------------------------
-- Build DataMover command
-------------------------------------------------------------------------------
-- If Bytes To Transfer (BTT) width less than 23, need to add pad
GEN_CMD_BTT_LESS_23 : if C_SG_LENGTH_WIDTH < 23 generate
constant PAD_VALUE : std_logic_vector(22 - C_SG_LENGTH_WIDTH downto 0)
:= (others => '0');
begin
-- When command by sm, drive command to mm2s_cmdsts_if
GEN_DATAMOVER_CMND : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
mm2s_cmnd_wr_i <= '0';
-- mm2s_cmnd_data <= (others => '0');
-- Fetch SM issued a command write
--
-- Note: change to mode where EOF generates IOC interrupt as
-- opposed to a IOC bit in the descriptor negated need for an
-- EOF and IOC tag. Given time, these two bits could be combined
-- into 1. Associated logic in SG engine would also need to be
-- modified as well as in mm2s_sg_if.
elsif(write_cmnd_cmb = '1')then
mm2s_cmnd_wr_i <= '1';
-- mm2s_cmnd_data <= mm2s_cache_info
-- & mm2s_desc_blength_v
-- & mm2s_desc_blength_s
-- & MM2S_CMD_RSVD
-- -- Command Tag
-- & '0'
-- & '0'
-- & mm2s_desc_eof -- Cat. EOF to CMD Tag
-- & mm2s_desc_eof -- Cat. IOC to CMD Tag
-- -- Command
-- & mm2s_desc_baddress
-- & mm2s_desc_sof
-- & mm2s_desc_eof
-- & MM2S_CMD_DSA
-- & burst_type -- key Hole operation'1' -- mm2s_desc_type IR#545697
-- & PAD_VALUE
-- & mm2s_desc_blength(C_SG_LENGTH_WIDTH-1 downto 0);
else
mm2s_cmnd_wr_i <= '0';
end if;
end if;
end process GEN_DATAMOVER_CMND;
mm2s_cmnd_data <= mm2s_cache_info
& mm2s_desc_blength_v
& mm2s_desc_blength_s
& MM2S_CMD_RSVD
-- Command Tag
& '0'
& '0'
& mm2s_desc_eof -- Cat. EOF to CMD Tag
& mm2s_desc_eof -- Cat. IOC to CMD Tag
-- Command
& mm2s_desc_baddress
& mm2s_desc_sof
& mm2s_desc_eof
& MM2S_CMD_DSA
& burst_type -- key Hole operation'1' -- mm2s_desc_type IR#545697
& PAD_VALUE
& mm2s_desc_blength(C_SG_LENGTH_WIDTH-1 downto 0);
end generate GEN_CMD_BTT_LESS_23;
-- If Bytes To Transfer (BTT) width equal 23, no required pad
GEN_CMD_BTT_EQL_23 : if C_SG_LENGTH_WIDTH = 23 generate
begin
-- When command by sm, drive command to mm2s_cmdsts_if
GEN_DATAMOVER_CMND : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
mm2s_cmnd_wr_i <= '0';
-- mm2s_cmnd_data <= (others => '0');
-- Fetch SM issued a command write
--
-- Note: change to mode where EOF generates IOC interrupt as
-- opposed to a IOC bit in the descriptor negated need for an
-- EOF and IOC tag. Given time, these two bits could be combined
-- into 1. Associated logic in SG engine would also need to be
-- modified as well as in mm2s_sg_if.
elsif(write_cmnd_cmb = '1')then
mm2s_cmnd_wr_i <= '1';
-- mm2s_cmnd_data <= mm2s_cache_info
-- & mm2s_desc_blength_v
-- & mm2s_desc_blength_s
-- & MM2S_CMD_RSVD
-- -- Command Tag
-- & '0'
-- & '0'
-- & mm2s_desc_eof -- Cat. EOF to CMD Tag
-- & mm2s_desc_eof -- Cat. IOC to CMD Tag (ioc changed to EOF)
-- -- Command
-- & mm2s_desc_baddress
-- & mm2s_desc_sof
-- & mm2s_desc_eof
-- & MM2S_CMD_DSA
-- & burst_type -- key Hole Operation'1' -- mm2s_desc_type IR#545697
-- & mm2s_desc_blength;
else
mm2s_cmnd_wr_i <= '0';
end if;
end if;
end process GEN_DATAMOVER_CMND;
mm2s_cmnd_data <= mm2s_cache_info
& mm2s_desc_blength_v
& mm2s_desc_blength_s
& MM2S_CMD_RSVD
-- Command Tag
& '0'
& '0'
& mm2s_desc_eof -- Cat. EOF to CMD Tag
& mm2s_desc_eof -- Cat. IOC to CMD Tag (ioc changed to EOF)
-- Command
& mm2s_desc_baddress
& mm2s_desc_sof
& mm2s_desc_eof
& MM2S_CMD_DSA
& burst_type -- key Hole Operation'1' -- mm2s_desc_type IR#545697
& mm2s_desc_blength;
end generate GEN_CMD_BTT_EQL_23;
-------------------------------------------------------------------------------
-- Counter for keepting track of pending commands/status in primary datamover
-- Use this to determine if primary datamover for mm2s is Idle.
-------------------------------------------------------------------------------
-- increment with each command written
count_incr <= '1' when mm2s_cmnd_wr_i = '1' and desc_update_done = '0'
else '0';
-- decrement with each status received
count_decr <= '1' when mm2s_cmnd_wr_i = '0' and desc_update_done = '1'
else '0';
-- count number of queued commands to keep track of what datamover is still
-- working on
--CMD2STS_COUNTER : process(m_axi_sg_aclk)
-- begin
-- if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
-- if(m_axi_sg_aresetn = '0' or mm2s_stop = '1')then
-- cmnds_queued <= (others => '0');
-- elsif(count_incr = '1')then
-- cmnds_queued <= std_logic_vector(unsigned(cmnds_queued(COUNTER_WIDTH - 1 downto 0)) + 1);
-- elsif(count_decr = '1')then
-- cmnds_queued <= std_logic_vector(unsigned(cmnds_queued(COUNTER_WIDTH - 1 downto 0)) - 1);
-- end if;
-- end if;
-- end process CMD2STS_COUNTER;
QUEUE_COUNT : if C_SG_INCLUDE_DESC_QUEUE = 1 generate
begin
CMD2STS_COUNTER1 : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0' or mm2s_stop = '1')then
cmnds_queued_shift <= (others => '0');
elsif(count_incr = '1')then
cmnds_queued_shift <= cmnds_queued_shift (2 downto 0) & '1';
elsif(count_decr = '1')then
cmnds_queued_shift <= '0' & cmnds_queued_shift (3 downto 1);
end if;
end if;
end process CMD2STS_COUNTER1;
end generate QUEUE_COUNT;
NOQUEUE_COUNT : if C_SG_INCLUDE_DESC_QUEUE = 0 generate
begin
-- coverage off
CMD2STS_COUNTER1 : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0' or mm2s_stop = '1')then
cmnds_queued_shift(0) <= '0';
elsif(count_incr = '1')then
cmnds_queued_shift (0) <= '1';
elsif(count_decr = '1')then
cmnds_queued_shift (0) <= '0';
end if;
end if;
end process CMD2STS_COUNTER1;
end generate NOQUEUE_COUNT;
-- coverage on
-- Indicate status is idle when no cmnd/sts queued
--mm2s_sts_idle <= '1' when cmnds_queued_shift = "0000"
-- else '0';
mm2s_sts_idle <= not cmnds_queued_shift (0);
-------------------------------------------------------------------------------
-- Queue only the amount of commands that can be queued on descriptor update
-- else lock up can occur. Note datamover command fifo depth is set to number
-- of descriptors to queue.
-------------------------------------------------------------------------------
--QUEUE_MORE_PROCESS : process(m_axi_sg_aclk)
-- begin
-- if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
-- if(m_axi_sg_aresetn = '0')then
-- queue_more <= '0';
-- elsif(cmnds_queued < std_logic_vector(to_unsigned(C_PRMY_CMDFIFO_DEPTH,COUNTER_WIDTH)))then
-- queue_more <= '1';
-- else
-- queue_more <= '0';
-- end if;
-- end if;
-- end process QUEUE_MORE_PROCESS;
QUEUE_MORE_PROCESS : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
queue_more <= '0';
-- elsif(cmnds_queued_shift(3) /= '1') then -- < std_logic_vector(to_unsigned(C_PRMY_CMDFIFO_DEPTH,COUNTER_WIDTH)))then
-- queue_more <= '1';
else
queue_more <= not (cmnds_queued_shift(C_PRMY_CMDFIFO_DEPTH-1));
end if;
end if;
end process QUEUE_MORE_PROCESS;
end implementation;
| mit | 9abbd038b80233620cdf7a3069fbda21 | 0.399653 | 4.60319 | false | false | false | false |
mharndt/profibusmonitor | VHDL_Bausteine_old/abandoned_code/TEST_CTRL_BYTE_CHECK/CTRL_BYTE_CHECK.vhd | 4 | 6,763 | -- CTRL_BYTE_CHECK
-- Bytes zählen und prüfen
-- Ersteller: Martin Harndt
-- Erstellt: 19.12.2012
-- Bearbeiter: mharndt
-- Geaendert: 19.12.2012
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity CTRL_BYTE_CHECK is
Port (BYTE_OK : out std_logic; --Ausgangsvariable, Byte vollständig
BYTE_NUM : out std_logic_vector (7 downto 0); --Ausgangswariable, Bytenummer
NEXT_BYTE : in std_logic; --Eingangsvariable, naechstes Byte
PARITY_OK : in std_logic; --Eingangsvariable, Parität in Ordnung
BYTE_CMPLT : in std_logic; --Eingangsvariable, Byte vollständig
DISPL_COUNT : in std_logic; --Eingangsvariable, Folgeszustand oder Bytezaehler anzeigen
CLK : in std_logic; --Taktvariable
CLK_IO : in std_logic; --Tanktvariable,
--Ein- und Ausgangsregister
IN_NEXT_STATE: in std_logic; --1:Zustandsuebergang möglich
RESET : in std_logic; --1: Initialzustand annehmen
DISPL1_SV : out std_logic_vector (3 downto 0); --aktueller Zustand Zahl1, binärzahl
DISPL2_SV : out std_logic_vector (3 downto 0); --aktueller Zustand Zahl2, binärzahl
DISPL1_n_SV : out std_logic_vector (3 downto 0); --Folgezustand Zahl1, binärzahl
DISPL2_n_SV : out std_logic_vector (3 downto 0)); --Folgezustand Zahl2, binärzahl
end CTRL_BYTE_CHECK;
architecture Behavioral of CTRL_BYTE_CHECK is
type TYPE_STATE is
(ST_BC_00, --Zustaende BYTE_CHECK
ST_BC_01,
ST_BC_02);
signal SV : TYPE_STATE; --Zustandsvariable
signal n_SV: TYPE_STATE; --Zustandsvariable, neuer Wert
signal SV_M: TYPE_STATE; --Zustandsvariable, Ausgang Master
signal BYTE_COUNT : std_logic_vector (7 downto 0); -- Vektor, Bytenummer, 8bit
signal n_BYTE_COUNT : std_logic_vector (7 downto 0); -- Vektor, Bytenummer, 8bit, neuer Wert
signal BYTE_COUNT_M : std_logic_vector (7 downto 0); -- Vektor, Bytenummer, 8bit, Ausgang Master
signal NEXT_BYTE_S : std_logic; --Eingangsvariable, zwischengespeichert im Eingangsregister
signal BYTE_CMPLT_S : std_logic; --Eingangsvariable, zwischengespeichert im Eingangsregister
signal PARITY_OK_S : std_logic; --Eingangsvariable, zwischengespeichert im Eingangsregister
signal LONG_STATE_SV : std_logic_vector (7 downto 0); -- aktueller Zustand in 8 Bit, binär
signal LONG_STATE_n_SV : std_logic_vector (7 downto 0); -- Folgezustand in 8 Bit, binär
signal not_CLK : std_logic; --negierte Taktvariable
signal not_CLK_IO: std_logic; --negierte Taktvariable
--Ein- und Ausgangsregister
begin
NOT_CLK_PROC: process (CLK) --negieren Taktvariable
begin
not_CLK <= not CLK;
end process;
NOT_CLK_IO_PROC: process (CLK_IO) --negieren Taktvaraible
--Ein- und Ausgangsregister
begin
not_CLK_IO <= not CLK_IO;
end process;
IREG_PROC: process (BYTE_CMPLT, not_CLK_IO) --Eingangsregister
begin
if (not_CLK_IO'event and not_CLK_IO = '1') --Eingangsregister
then NEXT_BYTE_S <= NEXT_BYTE;
BYTE_CMPLT_S <= BYTE_CMPLT;
PARITY_OK_S <= PARITY_OK;
end if;
end process;
SREG_M_PROC: process (RESET, n_SV, CLK) --Master
begin
if (RESET ='1')
then SV_M <= ST_BC_00;
else
if (CLK'event and CLK = '1')
then
if (IN_NEXT_STATE = '1')
then SV_M <= n_SV;
BYTE_COUNT_M <= n_BYTE_COUNT;
else SV_M <= SV_M;
BYTE_COUNT_M <= BYTE_COUNT_M;
end if;
end if;
end if;
end process;
SREG_S_PROC: process (RESET, SV_M, not_CLK) --Slave
begin
if (RESET = '1')
then SV <= ST_BC_00;
else
if (not_CLK'event and not_CLK = '1')
then SV <= SV_M;
BYTE_COUNT <= BYTE_COUNT_M;
end if;
end if;
end process;
BYTE_CHECK_PROC:process (NEXT_BYTE_S, BYTE_CMPLT_S, PARITY_OK_S, SV, BYTE_COUNT) --Bytes zählen und prüfen
begin
case SV is
when ST_BC_00 =>
if (NEXT_BYTE_S = '1')
then
-- BC01
BYTE_OK <= '0';
n_BYTE_COUNT <= BYTE_COUNT; --bleibt gleich
n_SV <= ST_BC_01; --Zustandsübergang
else
-- BC00
BYTE_OK <= '0';
n_BYTE_COUNT <= x"00"; --wird Null (hex)
n_SV <= ST_BC_00; --kein Zustandsübergang
end if;
when ST_BC_01 =>
if (BYTE_CMPLT_S = '1')
then
--BC02
BYTE_OK <= '0';
n_BYTE_COUNT <= BYTE_COUNT; --bleibt gleich
n_SV <= ST_BC_02; --Zustandsübergang
else
-- BC01
BYTE_OK <= '0';
n_BYTE_COUNT <= BYTE_COUNT; --bleibt gleich
n_SV <= ST_BC_01; --kein Zustandsübergang
end if;
when ST_BC_02 =>
if (PARITY_OK_S = '1')
then
--BC03
BYTE_OK <= '1';
n_BYTE_COUNT <= BYTE_COUNT+1; --wird erhoeht
n_SV <= ST_BC_00; --Zustandsübergang
else
-- BC00
BYTE_OK <= '0';
n_BYTE_COUNT <= x"00"; --wird Null (hex)
n_SV <= ST_BC_00; --Zustandsübergang
end if;
when others =>
-- BC00
BYTE_OK <= '0';
n_BYTE_COUNT <= x"00"; --wird Null (hex)
n_SV <= ST_BC_00; --Zustandsübergang
end case;
end process;
BYTE_NUM_PROC:process (BYTE_COUNT) --Ausgabe BYTE_NUM aus BYTE_COUNT
begin
BYTE_NUM <= BYTE_COUNT;
end process;
STATE_DISPL_PROC: process (SV, n_SV, DISPL_COUNT, LONG_STATE_SV, LONG_STATE_n_SV, BYTE_COUNT) -- Zustandsanzeige
begin
LONG_STATE_SV <= conv_std_logic_vector(TYPE_STATE'pos( SV),8); --Zustandsumwandlung in 8 Bit
LONG_STATE_n_SV <= conv_std_logic_vector(TYPE_STATE'pos(n_SV),8);
--anktuellen Zustand anzeigen
DISPL1_SV(0) <= LONG_STATE_SV(0); --Bit0
DISPL1_SV(1) <= LONG_STATE_SV(1); --Bit1
DISPL1_SV(2) <= LONG_STATE_SV(2); --Bit2
DISPL1_SV(3) <= LONG_STATE_SV(3); --Bit3
DISPL2_SV(0) <= LONG_STATE_SV(4); --usw.
DISPL2_SV(1) <= LONG_STATE_SV(5);
DISPL2_SV(2) <= LONG_STATE_SV(6);
DISPL2_SV(3) <= LONG_STATE_SV(7);
if (DISPL_COUNT ='0')
then --Folgezustand anzeigen
DISPL1_n_SV(0) <= LONG_STATE_n_SV(0);
DISPL1_n_SV(1) <= LONG_STATE_n_SV(1);
DISPL1_n_SV(2) <= LONG_STATE_n_SV(2);
DISPL1_n_SV(3) <= LONG_STATE_n_SV(3);
DISPL2_n_SV(0) <= LONG_STATE_n_SV(4);
DISPL2_n_SV(1) <= LONG_STATE_n_SV(5);
DISPL2_n_SV(2) <= LONG_STATE_n_SV(6);
DISPL2_n_SV(3) <= LONG_STATE_n_SV(7);
else --BYTEzaehler anzeigen
DISPL1_n_SV(0) <= BYTE_COUNT(0);
DISPL1_n_SV(1) <= BYTE_COUNT(1);
DISPL1_n_SV(2) <= BYTE_COUNT(2);
DISPL1_n_SV(3) <= BYTE_COUNT(3);
DISPL2_n_SV(0) <= BYTE_COUNT(4);
DISPL2_n_SV(1) <= BYTE_COUNT(5);
DISPL2_n_SV(2) <= BYTE_COUNT(6);
DISPL2_n_SV(3) <= BYTE_COUNT(7);
end if;
end process;
end Behavioral;
| gpl-2.0 | c417d99f6ee6ffc379196b2ad5b9dd9a | 0.605205 | 3.004442 | false | false | false | false |
sergeykhbr/riscv_vhdl | vhdl/rtl/ambalib/types_amba4.vhd | 1 | 32,203 | --!
--! Copyright 2020 Sergey Khabarov, [email protected]
--!
--! Licensed under the Apache License, Version 2.0 (the "License");
--! you may not use this file except in compliance with the License.
--! You may obtain a copy of the License at
--!
--! http://www.apache.org/licenses/LICENSE-2.0
--!
--! Unless required by applicable law or agreed to in writing, software
--! distributed under the License is distributed on an "AS IS" BASIS,
--! WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
--! See the License for the specific language governing permissions and
--! limitations under the License.
--!
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
library commonlib;
use commonlib.types_common.all;
package types_amba4 is
constant CFG_SYSBUS_ADDR_BITS : integer := 32;
constant CFG_LOG2_SYSBUS_DATA_BYTES : integer := 3;
constant CFG_SYSBUS_ID_BITS : integer := 5;
constant CFG_SYSBUS_USER_BITS : integer := 1;
constant CFG_SYSBUS_DATA_BYTES : integer := (2**CFG_LOG2_SYSBUS_DATA_BYTES);
constant CFG_SYSBUS_DATA_BITS : integer := 8*CFG_SYSBUS_DATA_BYTES;
--! Definition of number of bits in address bus per one data transaction.
constant CFG_SYSBUS_ADDR_OFFSET : integer := log2(CFG_SYSBUS_DATA_BYTES);
--! @brief Number of address bits used for device addressing.
--! @details Default is 12 bits = 4 KB of address space minimum per each
--! mapped device.
constant CFG_SYSBUS_CFG_ADDR_BITS : integer := CFG_SYSBUS_ADDR_BITS-12;
--! @brief Global alignment is set 32 bits.
constant CFG_ALIGN_BYTES : integer := 4;
--! @brief Number of parallel access to the atomic data.
constant CFG_WORDS_ON_BUS : integer := CFG_SYSBUS_DATA_BYTES/CFG_ALIGN_BYTES;
--! @}
--! @name AXI Response values
--! @brief AMBA 4.0 specified response types from a slave device.
--! @{
--! @brief Normal access success.
--! @details Indicates that a normal access has been
--! successful. Can also indicate an exclusive access has failed.
constant AXI_RESP_OKAY : std_logic_vector(1 downto 0) := "00";
--! @brief Exclusive access okay.
--! @details Indicates that either the read or write
--! portion of an exclusive access has been successful.
constant AXI_RESP_EXOKAY : std_logic_vector(1 downto 0) := "01";
--! @brief Slave error.
--! @details Used when the access has reached the slave successfully,
--! but the slave wishes to return an error condition to the originating
--! master.
constant AXI_RESP_SLVERR : std_logic_vector(1 downto 0) := "10";
--! @brief Decode error.
--! @details Generated, typically by an interconnect component,
--! to indicate that there is no slave at the transaction address.
constant AXI_RESP_DECERR : std_logic_vector(1 downto 0) := "11";
--! @}
--! @name AXI burst request type.
--! @brief AMBA 4.0 specified burst operation request types.
--! @{
--! @brief Fixed address burst operation.
--! @details The address is the same for every transfer in the burst
--! (FIFO type)
constant AXI_BURST_FIXED : std_logic_vector(1 downto 0) := "00";
--! @brief Burst operation with address increment.
--! @details The address for each transfer in the burst is an increment of
--! the address for the previous transfer. The increment value depends
--! on the size of the transfer.
constant AXI_BURST_INCR : std_logic_vector(1 downto 0) := "01";
--! @brief Burst operation with address increment and wrapping.
--! @details A wrapping burst is similar to an incrementing burst, except that
--! the address wraps around to a lower address if an upper address
--! limit is reached
constant AXI_BURST_WRAP : std_logic_vector(1 downto 0) := "10";
--! @}
--! @name Vendor IDs defintion.
--! @{
--! GNSS Sensor Ltd. vendor identificator.
constant VENDOR_GNSSSENSOR : std_logic_vector(15 downto 0) := X"00F1";
--! @}
--! @name Master Device IDs definition:
--! @{
--! Empty master slot device
constant MST_DID_EMPTY : std_logic_vector(15 downto 0) := X"7755";
--! RISC-V "Rocket-chip" core Cached TileLink master device.
constant RISCV_CACHED_TILELINK : std_logic_vector(15 downto 0) := X"0500";
--! RISC-V "Rocket-chip" core Uncached TileLink master device.
constant RISCV_UNCACHED_TILELINK : std_logic_vector(15 downto 0) := X"0501";
--! Ethernet MAC master device.
constant GAISLER_ETH_MAC_MASTER : std_logic_vector(15 downto 0) := X"0502";
--! Ethernet MAC master debug interface (EDCL).
constant GAISLER_ETH_EDCL_MASTER : std_logic_vector(15 downto 0) := X"0503";
--! "River" CPU Device workgroup.
constant RISCV_RIVER_WORKGROUP : std_logic_vector(15 downto 0) := X"0505";
--! DMI debug register access to bus through the SBA interface.
constant RISCV_RIVER_DMI : std_logic_vector(15 downto 0) := X"0506";
--! UART with DMA: Test Access Point (TAP)
constant GNSSSENSOR_UART_TAP : std_logic_vector(15 downto 0) := X"050A";
--! JTAG Test Access Point (TAP)
constant GNSSSENSOR_JTAG_TAP : std_logic_vector(15 downto 0) := X"050B";
--! @}
--! @name Slave Device IDs definition:
--! @{
--! Empty slave slot device
constant SLV_DID_EMPTY : std_logic_vector(15 downto 0) := X"5577";
--! GNSS Engine Stub device
constant GNSS_SUB_SYSTEM : std_logic_vector(15 downto 0) := X"0067";
--! GNSS Engine Stub device
constant GNSSSENSOR_ENGINE_STUB : std_logic_vector(15 downto 0) := X"0068";
--! Fast Search Engines Device ID provided by gnsslib
constant GNSSSENSOR_FSE_V2_GPS : std_logic_vector(15 downto 0) := X"0069";
--! Boot ROM Device ID
constant GNSSSENSOR_ROM : std_logic_vector(15 downto 0) := X"0071";
--! Internal SRAM block Device ID
constant GNSSSENSOR_SRAM : std_logic_vector(15 downto 0) := X"0073";
--! Configuration Registers Module Device ID provided by gnsslib
constant GNSSSENSOR_PNP : std_logic_vector(15 downto 0) := X"0074";
--! SD-card controller Device ID provided by gnsslib
constant GNSSSENSOR_SPI_FLASH : std_logic_vector(15 downto 0) := X"0075";
--! General purpose IOs Device ID provided by gnsslib
constant GNSSSENSOR_GPIO : std_logic_vector(15 downto 0) := X"0076";
--! RF front-end controller Device ID provided by gnsslib
constant GNSSSENSOR_RF_CONTROL : std_logic_vector(15 downto 0) := X"0077";
--! GNSS Engine Device ID provided by gnsslib
constant GNSSSENSOR_ENGINE : std_logic_vector(15 downto 0) := X"0078";
--! rs-232 UART Device ID
constant GNSSSENSOR_UART : std_logic_vector(15 downto 0) := X"007a";
--! Accelerometer Device ID provided by gnsslib
constant GNSSSENSOR_ACCELEROMETER : std_logic_vector(15 downto 0) := X"007b";
--! Gyroscope Device ID provided by gnsslib
constant GNSSSENSOR_GYROSCOPE : std_logic_vector(15 downto 0) := X"007c";
--! Interrupt controller
constant GNSSSENSOR_IRQCTRL : std_logic_vector(15 downto 0) := X"007d";
--! Ethernet MAC inherited from Gaisler greth module.
constant GNSSSENSOR_ETHMAC : std_logic_vector(15 downto 0) := X"007f";
--! Debug Support Unit device id.
constant GNSSSENSOR_DSU : std_logic_vector(15 downto 0) := X"0080";
--! GP Timers device id.
constant GNSSSENSOR_GPTIMERS : std_logic_vector(15 downto 0) := X"0081";
--! ADC samples recorder
constant GNSSSENSOR_ADC_RECORDER : std_logic_vector(15 downto 0) := X"0082";
-- OTP Memory 8KB bank
constant GNSSSENSOR_OTP_8KB : std_logic_vector(15 downto 0) := X"0083";
--! @}
--! @name Decoder of the transaction size.
--! @{
--! Burst length size decoder
constant XSIZE_TOTAL : integer := 8;
--! Definition of the AXI bytes converter.
type xsize_type is array (0 to XSIZE_TOTAL-1) of integer;
--! Decoder of the transaction bytes from AXI format to Bytes.
constant XSizeToBytes : xsize_type := (
0 => 1,
1 => 2,
2 => 4,
3 => 8,
4 => 16,
5 => 32,
6 => 64,
7 => 128
);
--! @}
--! @name Plug'n'Play descriptor constants.
--! @{
--! Undefined type of the descriptor (empty device).
constant PNP_CFG_TYPE_INVALID : std_logic_vector := "00";
--! AXI slave device standard descriptor.
constant PNP_CFG_TYPE_MASTER : std_logic_vector := "01";
--! AXI master device standard descriptor.
constant PNP_CFG_TYPE_SLAVE : std_logic_vector := "10";
--! @brief Size in bytes of the standard slave descriptor..
--! @details Firmware uses this value instead of sizeof(nasti_slave_config_type).
constant PNP_CFG_SLAVE_DESCR_BYTES : std_logic_vector(7 downto 0) := X"10";
--! @brief Size in bytes of the standard master descriptor.
--! @details Firmware uses this value instead of sizeof(nasti_master_config_type).
constant PNP_CFG_MASTER_DESCR_BYTES : std_logic_vector(7 downto 0) := X"08";
--! @}
--! @brief Plug-n-play descriptor structure for slave device.
--! @details Each slave device must generates this datatype output that
--! is connected directly to the 'pnp' slave module on system bus.
type axi4_slave_config_type is record
--! Descriptor size in bytes.
descrsize : std_logic_vector(7 downto 0);
--! Descriptor type.
descrtype : std_logic_vector(1 downto 0);
--! Descriptor size in bytes.
irq_idx : std_logic_vector(7 downto 0);
--! Base address value.
xaddr : std_logic_vector(CFG_SYSBUS_CFG_ADDR_BITS-1 downto 0);
--! Maskable bits of the base address.
xmask : std_logic_vector(CFG_SYSBUS_CFG_ADDR_BITS-1 downto 0);
--! Vendor ID.
vid : std_logic_vector(15 downto 0);
--! Device ID.
did : std_logic_vector(15 downto 0);
end record;
--! @brief Default slave config value.
--! @default This value corresponds to an empty device and often used
--! as assignment of outputs for the disabled device.
constant axi4_slave_config_none : axi4_slave_config_type := (
PNP_CFG_SLAVE_DESCR_BYTES, PNP_CFG_TYPE_SLAVE, (others => '0'),
(others => '0'), (others => '0'), VENDOR_GNSSSENSOR, SLV_DID_EMPTY);
--! @brief Plug-n-play descriptor structure for master device.
--! @details Each master device must generates this datatype output that
--! is connected directly to the 'pnp' slave module on system bus.
type axi4_master_config_type is record
--! Descriptor size in bytes.
descrsize : std_logic_vector(7 downto 0);
--! Descriptor type.
descrtype : std_logic_vector(1 downto 0);
--! Vendor ID.
vid : std_logic_vector(15 downto 0);
--! Device ID.
did : std_logic_vector(15 downto 0);
end record;
--! @brief Default master config value.
constant axi4_master_config_none : axi4_master_config_type := (
PNP_CFG_MASTER_DESCR_BYTES, PNP_CFG_TYPE_MASTER,
VENDOR_GNSSSENSOR, MST_DID_EMPTY);
constant ARCACHE_DEVICE_NON_BUFFERABLE : std_logic_vector(3 downto 0) := "0000";
constant ARCACHE_WRBACK_READ_ALLOCATE : std_logic_vector(3 downto 0) := "1111";
constant AWCACHE_DEVICE_NON_BUFFERABLE : std_logic_vector(3 downto 0) := "0000";
constant AWCACHE_WRBACK_WRITE_ALLOCATE : std_logic_vector(3 downto 0) := "1111";
-- see table C3-7 Permitted read address control signal combinations
--
-- read | cached | unique |
-- 0 | 0 | * | ReadNoSnoop
-- 0 | 1 | 0 | ReadShared
-- 0 | 1 | 1 | ReadMakeUnique
constant ARSNOOP_READ_NO_SNOOP : std_logic_vector(3 downto 0) := "0000";
constant ARSNOOP_READ_SHARED : std_logic_vector(3 downto 0) := "0001";
constant ARSNOOP_READ_MAKE_UNIQUE : std_logic_vector(3 downto 0) := "1100";
-- see table C3-8 Permitted read address control signal combinations
--
-- write | cached | unique |
-- 1 | 0 | * | WriteNoSnoop
-- 1 | 1 | 1 | WriteLineUnique
-- 1 | 1 | 0 | WriteBack
constant AWSNOOP_WRITE_NO_SNOOP : std_logic_vector(2 downto 0) := "000";
constant AWSNOOP_WRITE_LINE_UNIQUE : std_logic_vector(2 downto 0) := "001";
constant AWSNOOP_WRITE_BACK : std_logic_vector(2 downto 0) := "011";
-- see table C3-19
constant AC_SNOOP_READ_UNIQUE : std_logic_vector(3 downto 0) := "0111";
constant AC_SNOOP_MAKE_INVALID : std_logic_vector(3 downto 0) := "1101";
--! @brief AMBA AXI4 compliant data structure.
type axi4_metadata_type is record
--! @brief Read address.
--! @details The read address gives the address of the first transfer
--! in a read burst transaction.
addr : std_logic_vector(CFG_SYSBUS_ADDR_BITS-1 downto 0);
--! @brief Burst length.
--! @details This signal indicates the exact number of transfers in
--! a burst. This changes between AXI3 and AXI4. nastiXLenBits=8 so
--! this is an AXI4 implementation.
--! Burst_Length = len[7:0] + 1
len : std_logic_vector(7 downto 0);
--! @brief Burst size.
--! @details This signal indicates the size of each transfer
--! in the burst: 0=1 byte; ..., 6=64 bytes; 7=128 bytes;
size : std_logic_vector(2 downto 0);
--! @brief Read response.
--! @details This signal indicates the status of the read transfer.
--! The responses are:
--! 0b00 FIXED - In a fixed burst, the address is the same for every transfer
--! in the burst. Typically is used for FIFO.
--! 0b01 INCR - Incrementing. In an incrementing burst, the address for each
--! transfer in the burst is an increment of the address for the
--! previous transfer. The increment value depends on the size of
--! the transfer.
--! 0b10 WRAP - A wrapping burst is similar to an incrementing burst, except
--! that the address wraps around to a lower address if an upper address
--! limit is reached.
--! 0b11 resrved.
burst : std_logic_vector(1 downto 0);
--! @brief Lock type.
--! @details Not supported in AXI4.
lock : std_logic;
--! @brief Memory type.
--! @details See table for write and read transactions.
cache : std_logic_vector(3 downto 0);
--! @brief Protection type.
--! @details This signal indicates the privilege and security level
--! of the transaction, and whether the transaction is a data access
--! or an instruction access:
--! [0] : 0 = Unpriviledge access
--! 1 = Priviledge access
--! [1] : 0 = Secure access
--! 1 = Non-secure access
--! [2] : 0 = Data access
--! 1 = Instruction access
prot : std_logic_vector(2 downto 0);
--! @brief Quality of Service, QoS.
--! @details QoS identifier sent for each read transaction.
--! Implemented only in AXI4:
--! 0b0000 - default value. Indicates that the interface is
--! not participating in any QoS scheme.
qos : std_logic_vector(3 downto 0);
--! @brief Region identifier.
--! @details Permits a single physical interface on a slave to be used for
--! multiple logical interfaces. Implemented only in AXI4. This is
--! similar to the banks implementation in Leon3 without address
--! decoding.
region : std_logic_vector(3 downto 0);
end record;
--! @brief Empty metadata value.
constant META_NONE : axi4_metadata_type := (
(others =>'0'), X"00", "000", AXI_BURST_INCR, '0', X"0", "000", "0000", "0000"
);
--! @brief Master device output signals
type axi4_master_out_type is record
--! Write Address channel:
aw_valid : std_logic;
--! metadata of the read channel.
aw_bits : axi4_metadata_type;
--! Write address ID. Identification tag used for a trasaction ordering.
aw_id : std_logic_vector(CFG_SYSBUS_ID_BITS-1 downto 0);
--! Optional user defined signal in a write address channel.
aw_user : std_logic_vector(CFG_SYSBUS_USER_BITS-1 downto 0);
--! Write Data channel valid flag
w_valid : std_logic;
--! Write channel data value
w_data : std_logic_vector(CFG_SYSBUS_DATA_BITS-1 downto 0);
--! Write Data channel last address in a burst marker.
w_last : std_logic;
--! Write Data channel strob signals selecting certain bytes.
w_strb : std_logic_vector(CFG_SYSBUS_DATA_BYTES-1 downto 0);
--! Optional user defined signal in write channel.
w_user : std_logic_vector(CFG_SYSBUS_USER_BITS-1 downto 0);
--! Write Response channel accepted by master.
b_ready : std_logic;
--! Read Address Channel data valid.
ar_valid : std_logic;
--! Read Address channel metadata.
ar_bits : axi4_metadata_type;
--! Read address ID. Identification tag used for a trasaction ordering.
ar_id : std_logic_vector(CFG_SYSBUS_ID_BITS-1 downto 0);
--! Optional user defined signal in read address channel.
ar_user : std_logic_vector(CFG_SYSBUS_USER_BITS-1 downto 0);
--! Read Data channel:
r_ready : std_logic;
end record;
--! @brief Master device empty value.
--! @warning If the master is not connected to the vector then vector value
--! MUST BE initialized by this value.
constant axi4_master_out_none : axi4_master_out_type := (
'0', META_NONE, (others=>'0'), (others => '0'),
'0', (others=>'0'), '0', (others=>'0'), (others => '0'),
'0', '0', META_NONE, (others=>'0'), (others => '0'), '0');
--! @brief Master device input signals.
type axi4_master_in_type is record
--! Write Address channel.
aw_ready : std_logic;
--! Write Data channel.
w_ready : std_logic;
--! Write Response channel:
b_valid : std_logic;
b_resp : std_logic_vector(1 downto 0);
b_id : std_logic_vector(CFG_SYSBUS_ID_BITS-1 downto 0);
b_user : std_logic_vector(CFG_SYSBUS_USER_BITS-1 downto 0);
--! Read Address Channel
ar_ready : std_logic;
--! Read valid.
r_valid : std_logic;
--! @brief Read response.
--! @details This signal indicates the status of the read transfer.
--! The responses are:
--! 0b00 OKAY - Normal access success. Indicates that a normal access has
--! been successful. Can also indicate an exclusive access
--! has failed.
--! 0b01 EXOKAY - Exclusive access okay. Indicates that either the read or
--! write portion of an exclusive access has been successful.
--! 0b10 SLVERR - Slave error. Used when the access has reached the slave
--! successfully, but the slave wishes to return an error
--! condition to the originating master.
--! 0b11 DECERR - Decode error. Generated, typically by an interconnect
--! component, to indicate that there is no slave at the
--! transaction address.
r_resp : std_logic_vector(1 downto 0);
--! Read data
r_data : std_logic_vector(CFG_SYSBUS_DATA_BITS-1 downto 0);
--! @brief Read last.
--! @details This signal indicates the last transfer in a read burst.
r_last : std_logic;
--! @brief Read ID tag.
--! @details This signal is the identification tag for the read data
--! group of signals generated by the slave.
r_id : std_logic_vector(CFG_SYSBUS_ID_BITS-1 downto 0);
--! @brief User signal.
--! @details Optional User-defined signal in the read channel. Supported
--! only in AXI4.
r_user : std_logic_vector(CFG_SYSBUS_USER_BITS-1 downto 0);
end record;
constant axi4_master_in_none : axi4_master_in_type := (
'0', '0', '0', AXI_RESP_OKAY, (others=>'0'), (others => '0'),
'0', '0', AXI_RESP_OKAY, (others=>'0'), '0', (others=>'0'), (others => '0'));
--! @brief Slave device AMBA AXI input signals.
type axi4_slave_in_type is record
--! Write Address channel:
aw_valid : std_logic;
aw_bits : axi4_metadata_type;
aw_id : std_logic_vector(CFG_SYSBUS_ID_BITS-1 downto 0);
aw_user : std_logic_vector(CFG_SYSBUS_USER_BITS-1 downto 0);
--! Write Data channel:
w_valid : std_logic;
w_data : std_logic_vector(CFG_SYSBUS_DATA_BITS-1 downto 0);
w_last : std_logic;
w_strb : std_logic_vector(CFG_SYSBUS_DATA_BYTES-1 downto 0);
w_user : std_logic_vector(CFG_SYSBUS_USER_BITS-1 downto 0);
--! Write Response channel:
b_ready : std_logic;
--! Read Address Channel:
ar_valid : std_logic;
ar_bits : axi4_metadata_type;
ar_id : std_logic_vector(CFG_SYSBUS_ID_BITS-1 downto 0);
ar_user : std_logic_vector(CFG_SYSBUS_USER_BITS-1 downto 0);
--! Read Data channel:
r_ready : std_logic;
end record;
constant axi4_slave_in_none : axi4_slave_in_type := (
'0', META_NONE, (others=>'0'), (others => '0'), '0',
(others=>'0'), '0', (others=>'0'), (others => '0'), '0', '0', META_NONE,
(others=>'0'), (others => '0'), '0');
--! @brief Slave device AMBA AXI output signals.
type axi4_slave_out_type is record
--! Write Address channel:
aw_ready : std_logic;
--! Write Data channel:
w_ready : std_logic;
--! Write Response channel:
b_valid : std_logic;
b_resp : std_logic_vector(1 downto 0);
b_id : std_logic_vector(CFG_SYSBUS_ID_BITS-1 downto 0);
b_user : std_logic_vector(CFG_SYSBUS_USER_BITS-1 downto 0);
--! Read Address Channel
ar_ready : std_logic;
--! Read Data channel:
r_valid : std_logic;
--! @brief Read response.
--! @details This signal indicates the status of the read transfer.
--! The responses are:
--! 0b00 OKAY - Normal access success. Indicates that a normal access has
--! been successful. Can also indicate an exclusive access
--! has failed.
--! 0b01 EXOKAY - Exclusive access okay. Indicates that either the read or
--! write portion of an exclusive access has been successful.
--! 0b10 SLVERR - Slave error. Used when the access has reached the slave
--! successfully, but the slave wishes to return an error
--! condition to the originating master.
--! 0b11 DECERR - Decode error. Generated, typically by an interconnect
--! component, to indicate that there is no slave at the
--! transaction address.
r_resp : std_logic_vector(1 downto 0);
--! Read data
r_data : std_logic_vector(CFG_SYSBUS_DATA_BITS-1 downto 0);
--! Read last. This signal indicates the last transfer in a read burst.
r_last : std_logic;
--! @brief Read ID tag.
--! @details This signal is the identification tag for the read data
--! group of signals generated by the slave.
r_id : std_logic_vector(CFG_SYSBUS_ID_BITS-1 downto 0);
--! @brief User signal.
--! @details Optinal User-defined signal in the read channel. Supported
--! only in AXI4.
r_user : std_logic_vector(CFG_SYSBUS_USER_BITS-1 downto 0);
end record;
--! @brief Slave output signals connected to system bus.
--! @details If the slave is not connected to the vector then vector value
--! MUST BE initialized by this value.
constant axi4_slave_out_none : axi4_slave_out_type := (
'0', '0', '0', AXI_RESP_EXOKAY, (others=>'0'), (others => '0'),
'0', '0', AXI_RESP_EXOKAY, (others=>'1'),
'0', (others=>'0'), (others => '0'));
--! Array of addresses providing word aligned access.
type global_addr_array_type is array (0 to CFG_WORDS_ON_BUS-1)
of std_logic_vector(CFG_SYSBUS_ADDR_BITS-1 downto 0);
type dma_state_type is (
DMA_STATE_IDLE,
DMA_STATE_R_WAIT_RESP,
DMA_STATE_R_WAIT_NEXT,
DMA_STATE_W,
DMA_STATE_W_WAIT_REQ,
DMA_STATE_B
);
--! @brief Master device to DMA engine request signals
type dma_request_type is record
valid : std_logic; -- response is valid
ready : std_logic; -- ready to accept response
write : std_logic;
addr : std_logic_vector(CFG_SYSBUS_ADDR_BITS-1 downto 0);
bytes : std_logic_vector(10 downto 0);
size : std_logic_vector(2 downto 0); -- 010=4 bytes; 011=8 bytes
wdata : std_logic_vector(CFG_SYSBUS_DATA_BITS-1 downto 0);
end record;
--! @brief DMA engine to Master device response signals
type dma_response_type is record
ready : std_logic; -- ready to accespt request
valid : std_logic; -- response is valid
rdata : std_logic_vector(CFG_SYSBUS_DATA_BITS-1 downto 0);
end record;
--! DMA engine registers bank
type dma_bank_type is record
state : dma_state_type;
addr2 : std_logic; -- addr[2] bits to select low/high dword
len : integer range 0 to 255; -- burst (length-1)
op32 : std_logic;
wdata : std_logic_vector(CFG_SYSBUS_DATA_BITS-1 downto 0);
end record;
constant DMA_BANK_RESET : dma_bank_type := (DMA_STATE_IDLE, '0', 0, '0', (others => '0'));
--! Device's DMA engine template procedure with AXI interface.
--! @param [in] i_request Device to DMA engine request.
--! @param [out] o_response DMA Engine to Device response.
--! @param [in] i_bank Bank of registers implemented by master device.
--! @param [out] o_bank Updated value for the master bank of registers.
--! @param [in] i_msti AMBA to AXI master device signal.
--! @param [out] o_msto AXI master device signal to AMBA controller signals.
procedure procedureAxi4DMA(
i_request : in dma_request_type;
o_response : out dma_response_type;
i_bank : in dma_bank_type;
o_bank : out dma_bank_type;
i_msti : in axi4_master_in_type;
o_msto : out axi4_master_out_type
);
--! AXI4 slave interface.
--! @param [in] i_xcfg AXI Slave confguration descriptor defining memory base address.
--! @param [in] i_xslvi AXI4 slave input interface.
--! @param [out] o_xslvo AXI4 slave output interface.
--! @param [in] i_ready Memory device is ready to accept request.
--! @param [in] i_rdata Read data value
--! @param [out] o_re Read enable
--! @param [out] o_rswap Read high word32 from 64-bits bus
--! @param [out] o_radr Memory interface read address array.
--! @param [out] o_wadr Memory interface write address array.
--! @param [in] o_we Write enable
--! @param [out] o_wstrb Memory interface per byte write enable strobs.
--! @param [out] o_wdata Memory interface write data value.
component axi4_slave is
generic (
async_reset : boolean
);
port (
i_clk : in std_logic;
i_nrst : in std_logic;
i_xcfg : in axi4_slave_config_type;
i_xslvi : in axi4_slave_in_type;
o_xslvo : out axi4_slave_out_type;
i_ready : in std_logic;
i_rdata : in std_logic_vector(CFG_SYSBUS_DATA_BITS-1 downto 0);
o_re : out std_logic;
o_r32 : out std_logic;
o_radr : out global_addr_array_type;
o_wadr : out global_addr_array_type;
o_we : out std_logic;
o_wstrb : out std_logic_vector(CFG_SYSBUS_DATA_BYTES-1 downto 0);
o_wdata : out std_logic_vector(CFG_SYSBUS_DATA_BITS-1 downto 0)
);
end component;
component axi4_defslv is
generic (
async_reset : boolean
);
port (
i_clk : in std_logic;
i_nrst : in std_logic;
i_xslvi : in axi4_slave_in_type;
o_xslvo : out axi4_slave_out_type
);
end component;
end; -- package declaration
--! Implementation of the declared sub-programs (functions and
--! procedures).
package body types_amba4 is
--! Device's DMA engine template procedure with AXI interface.
--! @param [in] i_request Device to DMA engine request.
--! @param [out] o_response DMA Engine to Device response.
--! @param [in] i_bank Bank of registers implemented by master device.
--! @param [out] o_bank Updated value for the master bank of registers.
--! @param [in] i_msti AMBA to AXI master device signal.
--! @param [out] o_msto AXI master device signal to AMBA controller signals.
procedure procedureAxi4DMA(
i_request : in dma_request_type;
o_response : out dma_response_type;
i_bank : in dma_bank_type;
o_bank : out dma_bank_type;
i_msti : in axi4_master_in_type;
o_msto : out axi4_master_out_type
) is
variable tmp_len : integer;
begin
o_bank := i_bank;
o_msto := axi4_master_out_none;
o_msto.ar_user := (others => '0');
o_msto.ar_id := conv_std_logic_vector(0, CFG_SYSBUS_ID_BITS);
o_msto.ar_bits.size := (others => '0');
o_msto.ar_bits.burst := AXI_BURST_INCR;
o_msto.aw_user := (others => '0');
o_msto.aw_id := conv_std_logic_vector(0, CFG_SYSBUS_ID_BITS);
o_msto.aw_bits.size := (others => '0');
o_msto.aw_bits.burst := AXI_BURST_INCR;
o_response.ready := '0';
o_response.valid := '0';
o_response.rdata := (others => '0');
case i_bank.state is
when DMA_STATE_IDLE =>
o_msto.ar_valid := i_request.valid and not i_request.write;
o_msto.aw_valid := i_request.valid and i_request.write;
tmp_len := conv_integer(i_request.bytes(10 downto 2)) - 1;
if i_request.valid = '1' and i_request.write = '1' then
o_msto.aw_bits.addr := i_request.addr(CFG_SYSBUS_ADDR_BITS-1 downto 3) & "000";
o_bank.addr2 := i_request.addr(2);
o_bank.len := tmp_len;
o_msto.aw_bits.size := i_request.size; -- 4/8 bytes
o_msto.aw_bits.len := conv_std_logic_vector(tmp_len, 8);
o_bank.wdata := i_request.wdata;
if i_msti.aw_ready = '1' then
o_response.ready := '1';
o_bank.state := DMA_STATE_W;
end if;
elsif i_request.valid = '1' and i_request.write = '0' then
o_msto.ar_bits.addr := i_request.addr;
o_bank.addr2 := i_request.addr(2);
o_bank.len := tmp_len;
o_msto.ar_bits.size := i_request.size; -- 4/8 bytes
o_msto.ar_bits.len := conv_std_logic_vector(tmp_len, 8);
if i_msti.ar_ready = '1' then
o_response.ready := '1';
o_bank.state := DMA_STATE_R_WAIT_RESP;
end if;
end if;
if i_request.size = "010" then
o_bank.op32 := '1';
else
o_bank.op32 := '0';
end if;
when DMA_STATE_R_WAIT_RESP =>
o_msto.r_ready := i_request.ready;
o_response.valid := i_msti.r_valid;
if (i_request.ready and i_msti.r_valid) = '1' then
if i_bank.op32 = '1' and i_bank.addr2 = '1' then
o_response.rdata := i_msti.r_data(63 downto 32) & i_msti.r_data(31 downto 0);
else
o_response.rdata := i_msti.r_data;
end if;
if i_msti.r_last = '1' then
o_bank.state := DMA_STATE_IDLE;
else
if i_request.valid = '1' and i_request.write = '0' then
o_response.ready := '1';
else
o_bank.state := DMA_STATE_R_WAIT_NEXT;
end if;
end if;
end if;
when DMA_STATE_R_WAIT_NEXT =>
if i_request.valid = '1' and i_request.write = '0' then
o_response.ready := '1';
o_bank.state := DMA_STATE_R_WAIT_RESP;
end if;
when DMA_STATE_W =>
o_msto.w_valid := '1';
if i_bank.op32 = '1' then
case i_bank.addr2 is
when '0' => o_msto.w_strb := X"0f";
when '1' => o_msto.w_strb := X"f0";
when others =>
end case;
else
o_msto.w_strb := X"ff";
end if;
o_msto.w_data := i_bank.wdata;
if i_msti.w_ready = '1' then
if i_bank.len = 0 then
o_bank.state := DMA_STATE_B;
o_msto.w_last := '1';
elsif i_request.valid = '1' and i_request.write = '1' then
o_bank.len := i_bank.len - 1;
o_bank.wdata := i_request.wdata;
o_response.ready := '1';
-- Address will be incremented on slave side
--v.waddr2 := not r.waddr2;
else
o_bank.state := DMA_STATE_W_WAIT_REQ;
end if;
end if;
when DMA_STATE_W_WAIT_REQ =>
if i_request.valid = '1' and i_request.write = '1' then
o_bank.len := i_bank.len - 1;
o_bank.wdata := i_request.wdata;
o_response.ready := '1';
o_bank.state := DMA_STATE_W;
end if;
when DMA_STATE_B =>
o_msto.w_last := '0';
o_msto.b_ready := '1';
if i_msti.b_valid = '1' then
o_bank.state := DMA_STATE_IDLE;
end if;
when others =>
end case;
end; -- procedure
end; -- package body
| apache-2.0 | 24891d7938d419f3c0836d61dfb9c020 | 0.632488 | 3.475394 | false | false | false | false |
szanni/aeshw | zybo-base/aeshw_1.0/hdl/aeshw_v1_0_S_AXI.vhd | 1 | 20,340 | library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
use work.types.all;
entity aeshw_v1_0_S_AXI is
generic (
-- Users to add parameters here
-- User parameters ends
-- Do not modify the parameters beyond this line
-- Width of S_AXI data bus
C_S_AXI_DATA_WIDTH : integer := 32;
-- Width of S_AXI address bus
C_S_AXI_ADDR_WIDTH : integer := 6
);
port (
-- Users to add ports here
-- User ports ends
-- Do not modify the ports beyond this line
-- Global Clock Signal
S_AXI_ACLK : in std_logic;
-- Global Reset Signal. This Signal is Active LOW
S_AXI_ARESETN : in std_logic;
-- Write address (issued by master, acceped by Slave)
S_AXI_AWADDR : in std_logic_vector(C_S_AXI_ADDR_WIDTH-1 downto 0);
-- Write channel Protection type. This signal indicates the
-- privilege and security level of the transaction, and whether
-- the transaction is a data access or an instruction access.
S_AXI_AWPROT : in std_logic_vector(2 downto 0);
-- Write address valid. This signal indicates that the master signaling
-- valid write address and control information.
S_AXI_AWVALID : in std_logic;
-- Write address ready. This signal indicates that the slave is ready
-- to accept an address and associated control signals.
S_AXI_AWREADY : out std_logic;
-- Write data (issued by master, acceped by Slave)
S_AXI_WDATA : in std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);
-- Write strobes. This signal indicates which byte lanes hold
-- valid data. There is one write strobe bit for each eight
-- bits of the write data bus.
S_AXI_WSTRB : in std_logic_vector((C_S_AXI_DATA_WIDTH/8)-1 downto 0);
-- Write valid. This signal indicates that valid write
-- data and strobes are available.
S_AXI_WVALID : in std_logic;
-- Write ready. This signal indicates that the slave
-- can accept the write data.
S_AXI_WREADY : out std_logic;
-- Write response. This signal indicates the status
-- of the write transaction.
S_AXI_BRESP : out std_logic_vector(1 downto 0);
-- Write response valid. This signal indicates that the channel
-- is signaling a valid write response.
S_AXI_BVALID : out std_logic;
-- Response ready. This signal indicates that the master
-- can accept a write response.
S_AXI_BREADY : in std_logic;
-- Read address (issued by master, acceped by Slave)
S_AXI_ARADDR : in std_logic_vector(C_S_AXI_ADDR_WIDTH-1 downto 0);
-- Protection type. This signal indicates the privilege
-- and security level of the transaction, and whether the
-- transaction is a data access or an instruction access.
S_AXI_ARPROT : in std_logic_vector(2 downto 0);
-- Read address valid. This signal indicates that the channel
-- is signaling valid read address and control information.
S_AXI_ARVALID : in std_logic;
-- Read address ready. This signal indicates that the slave is
-- ready to accept an address and associated control signals.
S_AXI_ARREADY : out std_logic;
-- Read data (issued by slave)
S_AXI_RDATA : out std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);
-- Read response. This signal indicates the status of the
-- read transfer.
S_AXI_RRESP : out std_logic_vector(1 downto 0);
-- Read valid. This signal indicates that the channel is
-- signaling the required read data.
S_AXI_RVALID : out std_logic;
-- Read ready. This signal indicates that the master can
-- accept the read data and response information.
S_AXI_RREADY : in std_logic
);
subtype u32 is std_logic_vector(31 downto 0);
function swap_endian (din : u32) return u32 is
variable ret : u32;
begin
ret := din(7 downto 0) & din(15 downto 8) & din(23 downto 16) & din(31 downto 24);
return ret;
end swap_endian;
end aeshw_v1_0_S_AXI;
architecture arch_imp of aeshw_v1_0_S_AXI is
-- AXI4LITE signals
signal axi_awaddr : std_logic_vector(C_S_AXI_ADDR_WIDTH-1 downto 0);
signal axi_awready : std_logic;
signal axi_wready : std_logic;
signal axi_bresp : std_logic_vector(1 downto 0);
signal axi_bvalid : std_logic;
signal axi_araddr : std_logic_vector(C_S_AXI_ADDR_WIDTH-1 downto 0);
signal axi_arready : std_logic;
signal axi_rdata : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);
signal axi_rresp : std_logic_vector(1 downto 0);
signal axi_rvalid : std_logic;
-- Example-specific design signals
-- local parameter for addressing 32 bit / 64 bit C_S_AXI_DATA_WIDTH
-- ADDR_LSB is used for addressing 32/64 bit registers/memories
-- ADDR_LSB = 2 for 32 bits (n downto 2)
-- ADDR_LSB = 3 for 64 bits (n downto 3)
constant ADDR_LSB : integer := (C_S_AXI_DATA_WIDTH/32)+ 1;
constant OPT_MEM_ADDR_BITS : integer := 3;
------------------------------------------------
---- Signals for user logic register space example
--------------------------------------------------
---- Number of Slave Registers 10
signal slv_reg0 :std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);
signal slv_reg1 :std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);
signal slv_reg2 :std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);
signal slv_reg3 :std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);
signal slv_reg4 :std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);
signal slv_reg5 :std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);
signal slv_reg6 :std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);
signal slv_reg7 :std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);
signal slv_reg8 :std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);
signal slv_reg9 :std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);
signal slv_reg_rden : std_logic;
signal slv_reg_wren : std_logic;
signal reg_data_out :std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);
signal byte_index : integer;
signal din : state;
signal dout : state;
signal mode : aes_mode;
signal aes_start : std_logic;
signal aes_done : std_logic;
signal modein : std_logic_vector(1 downto 0);
begin
-- I/O Connections assignments
S_AXI_AWREADY <= axi_awready;
S_AXI_WREADY <= axi_wready;
S_AXI_BRESP <= axi_bresp;
S_AXI_BVALID <= axi_bvalid;
S_AXI_ARREADY <= axi_arready;
S_AXI_RDATA <= axi_rdata;
S_AXI_RRESP <= axi_rresp;
S_AXI_RVALID <= axi_rvalid;
-- Implement axi_awready generation
-- axi_awready is asserted for one S_AXI_ACLK clock cycle when both
-- S_AXI_AWVALID and S_AXI_WVALID are asserted. axi_awready is
-- de-asserted when reset is low.
process (S_AXI_ACLK)
begin
if rising_edge(S_AXI_ACLK) then
if S_AXI_ARESETN = '0' then
axi_awready <= '0';
else
if (axi_awready = '0' and S_AXI_AWVALID = '1' and S_AXI_WVALID = '1') then
-- slave is ready to accept write address when
-- there is a valid write address and write data
-- on the write address and data bus. This design
-- expects no outstanding transactions.
axi_awready <= '1';
else
axi_awready <= '0';
end if;
end if;
end if;
end process;
-- Implement axi_awaddr latching
-- This process is used to latch the address when both
-- S_AXI_AWVALID and S_AXI_WVALID are valid.
process (S_AXI_ACLK)
begin
if rising_edge(S_AXI_ACLK) then
if S_AXI_ARESETN = '0' then
axi_awaddr <= (others => '0');
else
if (axi_awready = '0' and S_AXI_AWVALID = '1' and S_AXI_WVALID = '1') then
-- Write Address latching
axi_awaddr <= S_AXI_AWADDR;
end if;
end if;
end if;
end process;
-- Implement axi_wready generation
-- axi_wready is asserted for one S_AXI_ACLK clock cycle when both
-- S_AXI_AWVALID and S_AXI_WVALID are asserted. axi_wready is
-- de-asserted when reset is low.
process (S_AXI_ACLK)
begin
if rising_edge(S_AXI_ACLK) then
if S_AXI_ARESETN = '0' then
axi_wready <= '0';
else
if (axi_wready = '0' and S_AXI_WVALID = '1' and S_AXI_AWVALID = '1') then
-- slave is ready to accept write data when
-- there is a valid write address and write data
-- on the write address and data bus. This design
-- expects no outstanding transactions.
axi_wready <= '1';
else
axi_wready <= '0';
end if;
end if;
end if;
end process;
-- Implement memory mapped register select and write logic generation
-- The write data is accepted and written to memory mapped registers when
-- axi_awready, S_AXI_WVALID, axi_wready and S_AXI_WVALID are asserted. Write strobes are used to
-- select byte enables of slave registers while writing.
-- These registers are cleared when reset (active low) is applied.
-- Slave register write enable is asserted when valid address and data are available
-- and the slave is ready to accept the write address and write data.
slv_reg_wren <= axi_wready and S_AXI_WVALID and axi_awready and S_AXI_AWVALID ;
process (S_AXI_ACLK)
variable loc_addr :std_logic_vector(OPT_MEM_ADDR_BITS downto 0);
begin
if rising_edge(S_AXI_ACLK) then
aes_start <= '0';
if S_AXI_ARESETN = '0' then
slv_reg0 <= (others => '0');
slv_reg1 <= (others => '0');
slv_reg2 <= (others => '0');
slv_reg3 <= (others => '0');
-- slv_reg4 <= (others => '0');
-- slv_reg5 <= (others => '0');
-- slv_reg6 <= (others => '0');
-- slv_reg7 <= (others => '0');
slv_reg8 <= (others => '0');
-- slv_reg9 <= (others => '0');
else
loc_addr := axi_awaddr(ADDR_LSB + OPT_MEM_ADDR_BITS downto ADDR_LSB);
if (slv_reg_wren = '1') then
case loc_addr is
when b"0000" =>
for byte_index in 0 to (C_S_AXI_DATA_WIDTH/8-1) loop
if ( S_AXI_WSTRB(byte_index) = '1' ) then
-- Respective byte enables are asserted as per write strobes
-- slave registor 0
slv_reg0(byte_index*8+7 downto byte_index*8) <= S_AXI_WDATA(byte_index*8+7 downto byte_index*8);
end if;
end loop;
when b"0001" =>
for byte_index in 0 to (C_S_AXI_DATA_WIDTH/8-1) loop
if ( S_AXI_WSTRB(byte_index) = '1' ) then
-- Respective byte enables are asserted as per write strobes
-- slave registor 1
slv_reg1(byte_index*8+7 downto byte_index*8) <= S_AXI_WDATA(byte_index*8+7 downto byte_index*8);
end if;
end loop;
when b"0010" =>
for byte_index in 0 to (C_S_AXI_DATA_WIDTH/8-1) loop
if ( S_AXI_WSTRB(byte_index) = '1' ) then
-- Respective byte enables are asserted as per write strobes
-- slave registor 2
slv_reg2(byte_index*8+7 downto byte_index*8) <= S_AXI_WDATA(byte_index*8+7 downto byte_index*8);
end if;
end loop;
when b"0011" =>
for byte_index in 0 to (C_S_AXI_DATA_WIDTH/8-1) loop
if ( S_AXI_WSTRB(byte_index) = '1' ) then
-- Respective byte enables are asserted as per write strobes
-- slave registor 3
slv_reg3(byte_index*8+7 downto byte_index*8) <= S_AXI_WDATA(byte_index*8+7 downto byte_index*8);
end if;
end loop;
-- when b"0100" =>
-- for byte_index in 0 to (C_S_AXI_DATA_WIDTH/8-1) loop
-- if ( S_AXI_WSTRB(byte_index) = '1' ) then
-- Respective byte enables are asserted as per write strobes
-- slave registor 4
-- slv_reg4(byte_index*8+7 downto byte_index*8) <= S_AXI_WDATA(byte_index*8+7 downto byte_index*8);
-- end if;
-- end loop;
-- when b"0101" =>
-- for byte_index in 0 to (C_S_AXI_DATA_WIDTH/8-1) loop
-- if ( S_AXI_WSTRB(byte_index) = '1' ) then
-- Respective byte enables are asserted as per write strobes
-- slave registor 5
-- slv_reg5(byte_index*8+7 downto byte_index*8) <= S_AXI_WDATA(byte_index*8+7 downto byte_index*8);
-- end if;
-- end loop;
-- when b"0110" =>
-- for byte_index in 0 to (C_S_AXI_DATA_WIDTH/8-1) loop
-- if ( S_AXI_WSTRB(byte_index) = '1' ) then
-- Respective byte enables are asserted as per write strobes
-- slave registor 6
-- slv_reg6(byte_index*8+7 downto byte_index*8) <= S_AXI_WDATA(byte_index*8+7 downto byte_index*8);
-- end if;
-- end loop;
-- when b"0111" =>
-- for byte_index in 0 to (C_S_AXI_DATA_WIDTH/8-1) loop
-- if ( S_AXI_WSTRB(byte_index) = '1' ) then
-- Respective byte enables are asserted as per write strobes
-- slave registor 7
-- slv_reg7(byte_index*8+7 downto byte_index*8) <= S_AXI_WDATA(byte_index*8+7 downto byte_index*8);
-- end if;
-- end loop;
when b"1000" =>
for byte_index in 0 to (C_S_AXI_DATA_WIDTH/8-1) loop
if ( S_AXI_WSTRB(byte_index) = '1' ) then
-- Respective byte enables are asserted as per write strobes
-- slave registor 8
slv_reg8(byte_index*8+7 downto byte_index*8) <= S_AXI_WDATA(byte_index*8+7 downto byte_index*8);
end if;
end loop;
aes_start <= '1';
-- when b"1001" =>
-- for byte_index in 0 to (C_S_AXI_DATA_WIDTH/8-1) loop
-- if ( S_AXI_WSTRB(byte_index) = '1' ) then
-- Respective byte enables are asserted as per write strobes
-- slave registor 9
-- slv_reg9(byte_index*8+7 downto byte_index*8) <= S_AXI_WDATA(byte_index*8+7 downto byte_index*8);
-- end if;
-- end loop;
when others =>
slv_reg0 <= slv_reg0;
slv_reg1 <= slv_reg1;
slv_reg2 <= slv_reg2;
slv_reg3 <= slv_reg3;
slv_reg4 <= slv_reg4;
slv_reg5 <= slv_reg5;
slv_reg6 <= slv_reg6;
slv_reg7 <= slv_reg7;
slv_reg8 <= slv_reg8;
slv_reg9 <= slv_reg9;
end case;
end if;
end if;
end if;
end process;
-- Implement write response logic generation
-- The write response and response valid signals are asserted by the slave
-- when axi_wready, S_AXI_WVALID, axi_wready and S_AXI_WVALID are asserted.
-- This marks the acceptance of address and indicates the status of
-- write transaction.
process (S_AXI_ACLK)
begin
if rising_edge(S_AXI_ACLK) then
if S_AXI_ARESETN = '0' then
axi_bvalid <= '0';
axi_bresp <= "00"; --need to work more on the responses
else
if (axi_awready = '1' and S_AXI_AWVALID = '1' and axi_wready = '1' and S_AXI_WVALID = '1' and axi_bvalid = '0' ) then
axi_bvalid <= '1';
axi_bresp <= "00";
elsif (S_AXI_BREADY = '1' and axi_bvalid = '1') then --check if bready is asserted while bvalid is high)
axi_bvalid <= '0'; -- (there is a possibility that bready is always asserted high)
end if;
end if;
end if;
end process;
-- Implement axi_arready generation
-- axi_arready is asserted for one S_AXI_ACLK clock cycle when
-- S_AXI_ARVALID is asserted. axi_awready is
-- de-asserted when reset (active low) is asserted.
-- The read address is also latched when S_AXI_ARVALID is
-- asserted. axi_araddr is reset to zero on reset assertion.
process (S_AXI_ACLK)
begin
if rising_edge(S_AXI_ACLK) then
if S_AXI_ARESETN = '0' then
axi_arready <= '0';
axi_araddr <= (others => '1');
else
if (axi_arready = '0' and S_AXI_ARVALID = '1') then
-- indicates that the slave has acceped the valid read address
axi_arready <= '1';
-- Read Address latching
axi_araddr <= S_AXI_ARADDR;
else
axi_arready <= '0';
end if;
end if;
end if;
end process;
-- Implement axi_arvalid generation
-- axi_rvalid is asserted for one S_AXI_ACLK clock cycle when both
-- S_AXI_ARVALID and axi_arready are asserted. The slave registers
-- data are available on the axi_rdata bus at this instance. The
-- assertion of axi_rvalid marks the validity of read data on the
-- bus and axi_rresp indicates the status of read transaction.axi_rvalid
-- is deasserted on reset (active low). axi_rresp and axi_rdata are
-- cleared to zero on reset (active low).
process (S_AXI_ACLK)
begin
if rising_edge(S_AXI_ACLK) then
if S_AXI_ARESETN = '0' then
axi_rvalid <= '0';
axi_rresp <= "00";
else
if (axi_arready = '1' and S_AXI_ARVALID = '1' and axi_rvalid = '0') then
-- Valid read data is available at the read data bus
axi_rvalid <= '1';
axi_rresp <= "00"; -- 'OKAY' response
elsif (axi_rvalid = '1' and S_AXI_RREADY = '1') then
-- Read data is accepted by the master
axi_rvalid <= '0';
end if;
end if;
end if;
end process;
-- Implement memory mapped register select and read logic generation
-- Slave register read enable is asserted when valid address is available
-- and the slave is ready to accept the read address.
slv_reg_rden <= axi_arready and S_AXI_ARVALID and (not axi_rvalid) ;
process (slv_reg0, slv_reg1, slv_reg2, slv_reg3, slv_reg4, slv_reg5, slv_reg6, slv_reg7, slv_reg8, slv_reg9, axi_araddr, S_AXI_ARESETN, slv_reg_rden)
variable loc_addr :std_logic_vector(OPT_MEM_ADDR_BITS downto 0);
begin
if S_AXI_ARESETN = '0' then
reg_data_out <= (others => '1');
else
-- Address decoding for reading registers
loc_addr := axi_araddr(ADDR_LSB + OPT_MEM_ADDR_BITS downto ADDR_LSB);
case loc_addr is
when b"0000" =>
reg_data_out <= slv_reg0;
when b"0001" =>
reg_data_out <= slv_reg1;
when b"0010" =>
reg_data_out <= slv_reg2;
when b"0011" =>
reg_data_out <= slv_reg3;
when b"0100" =>
reg_data_out <= slv_reg4;
when b"0101" =>
reg_data_out <= slv_reg5;
when b"0110" =>
reg_data_out <= slv_reg6;
when b"0111" =>
reg_data_out <= slv_reg7;
when b"1000" =>
reg_data_out <= slv_reg8;
when b"1001" =>
reg_data_out <= slv_reg9;
when others =>
reg_data_out <= (others => '0');
end case;
end if;
end process;
-- Output register or memory read data
process( S_AXI_ACLK ) is
begin
if (rising_edge (S_AXI_ACLK)) then
if ( S_AXI_ARESETN = '0' ) then
axi_rdata <= (others => '0');
else
if (slv_reg_rden = '1') then
-- When there is a valid read address (S_AXI_ARVALID) with
-- acceptance of read address by the slave (axi_arready),
-- output the read dada
-- Read address mux
axi_rdata <= reg_data_out; -- register read data
end if;
end if;
end if;
end process;
-- Add user logic here
process(modein) is
begin
case modein is
when "00" => mode <= ENCRYPT;
when "01" => mode <= DECRYPT;
when others => mode <= EXPAND_KEY;
end case;
end process;
din <= swap_endian(slv_reg0) & swap_endian(slv_reg1) & swap_endian(slv_reg2) & swap_endian(slv_reg3);
slv_reg4 <= swap_endian(dout(127 downto 96));
slv_reg5 <= swap_endian(dout(95 downto 64));
slv_reg6 <= swap_endian(dout(63 downto 32));
slv_reg7 <= swap_endian(dout(31 downto 0));
--aes_start <= slv_reg8(1 downto 0);
slv_reg9 <= "0000000000000000000000000000000" & aes_done;
modein <= slv_reg8(1 downto 0);
-- User logic ends
aes_module: entity work.aes_module port map (clk => S_AXI_ACLK,
reset => '0',
din => din,
dout => dout,
mode => mode,
aes_start => aes_start,
aes_done => aes_done
);
end arch_imp;
| bsd-2-clause | 6ea2021fb92934c2f99f19153cb3dac6 | 0.594789 | 3.368107 | false | false | false | false |
szanni/aeshw | zybo-base/zybo_bsd/zybo_bsd.srcs/sources_1/bd/system/ip/system_auto_pc_5/fifo_generator_v11_0/common/input_blk.vhd | 19 | 28,006 | `protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
DYkUg37UnVRJ+X5v5iFDmCWObMw/mUCrJuxa/Cr9wGl4FgcJi6OQesLI1M+aH7+emQJssoNWrh+N
iL9trwbpEg==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
Vb74X6mc2H0e6MLiEAhBKZ84QSTgHhg3aAfwLeb5H8AGScZ7UqNDKDmI5IhuJ/LPpdHQCtOent5+
I1p5tELHTH0LzN6BILTKGZBdaGJ2AKKoofyljqaR51srCF/ZJLUOrn1XUZMkdlutYXGikghh+zK5
6+/HFEYyz6zhpfFGpAE=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2013_09", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
DUY8u9eRLqeXCDG4E2/8OtDIacK06AysbSio1XfMMKnofNQFNkb8eAjngrn4u/YZ6G16ZNMG7YoY
jk2Rx2Q3M5GrNkHLNcW1r1FM93KBIPYna3s3UsOdPXI8u/gdrTwtTwv/xpFT5pO5KUummozg1ol2
CfVK4phP0ptL6RF00qSF6IA3NotRdVSf39i8Abyti2fNqAeVQtQbe8y1/1WV9RrHHqEjarv5sqIY
6GslwJ8wdJjPL0QS11gBEh6rDpndqUhWIIFTUrFMd1tEU2WzUCNSxtbBPYlWfpU8e4/l9e5xSsF6
weW3wzZvwjgR473vdWcupdpbpXFjQjfOA39+/w==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
p0GGQgjzPW+6PIUsMdZXTQnjW6BUopNyvt7ApHmGMwjrt0lKkYFdeq6NnHPNeKi9xrrloGAO2Tha
FhPoK1WSUQvFoRR4uKVUk0OywXYhciTgYL90XL5T7z6pvP+T2xdoDnAiUPoqzH/Ubhhi84EoGyo2
+zIDCCcTvvnznOBjfpk=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
m1/kaqW4ETEcDTOeEJMS5yQHRelnhe+7sXgpcKiP6lTf8NZHj87LtgfMx1Oh7TGMtL3OsgLwXKl5
B/MVSSTPV7z0P/OvFd/MWYJqIMAVI0yV4hJ8dwWC7KK/kawdL1h0Q4iS0dxjn9/392LJCmqkJJmj
TEThXH1uoH4tMKV7xRRg0/MNNOk8hPErcV0Sx7ZxMFsvJk/PuOEi0wzy6daa+A+gop4M475HPjAb
iPZ63o2focv37v9R+NETZc+LyDzZAZPFDxIiHCnZlRMpU+rYc4lLu+Wj7afASerzvuIcVvlJO0R8
MuDtSunchT2Nxfc8io8WUTVsWpkmP/zQb3BvSQ==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 18992)
`protect data_block
f6CNel5Ozi1i9FoWzlExxlWYh7DYb4prushNSEGldyJG5PWfK284mBM5CUuT41x9GbDluIQvbljl
zUiYaCIrSRcTn0XclVxiaJqneNv2300Sbq74Sg923NrsPq8iXDiSh2MPQhFzRCDeO+r9dWhzAIQL
wXEBNeLpO783XjXeXxb84EBA1ghldCnDCprBHVAcdpm5BNjFD4lNd0P7HpVzV3FQey85q6bNJXRg
xA9K4ZE/wYCZNdJxARPL/qUuxtFY2dH+jDmR9J/TqwVYXMo4MWbaB7WhwbjrbdbKqMa43lLr1+bn
arMwmTjKCSonIm9MiKsv+ONyJEfNQm1boDp3W3y5/9lFcwLXAkLhcoLO9Kv0/LpjclBGQYXokNSH
s/IjSe2wjdl50TIT/nzDq2/NJsuQk8d0Ar1yNJDgsxbsE1et6N5f84Ou8GIOrUYrR331nh50zqpH
aLaknAL1rcOKPqPgziCOqv/WqoKoAXYTeS8lrXlKvJpUY2FNXLkhTcicodCCAMeqJ0P9VHGuoPde
21d5/+/P887Keamrx6G6SXjL0cJRo+PpGzLmnGD5OC9qWtFIJYsy6xCitddyAd6B1hiPAvtTztzQ
gf1PxBdRA52+e1n0r/sCI+YC5xN6e03OZk0Dqi+YILeYbYGem4irA3HK2//V8d88wVbH+fLYgUvT
nP25OTITkT7chy3NRNLzMOHdALV237eLszKJ3m7nJkuLBPwS3qVP3MrQyds1cm9zVaq6YPW7m+k+
nt0H4OM58KGqFRNgml67XqIH9CUv1o94wpE7gwlJEtTZgFfQoZ0BwgLh8KV8Vp8W3okhW8gOeB0g
/DGNwxfTPyxAH5UimWmMkWx61drfekruB28q4xfyf0HBmkclDI3Bk6+hpKtbRS3qZQkV8frRAViV
3YdwjhZoZA8vUQReDYEe7kW/IGdT3D2XtgkTQJQAY701dDOKJBjUYaTChB4IErGymsUkfV+NuxpM
tCVKkHg9VLyXxGRfKijFhM6lkotfNXiecZsA5pkfnOFzEvFeUsNQSug/FRhA32ddNSvFkTnYxHae
JI6ssg3gblcZqN04MPncVYmbEUvc+Eu7ge6JboU6BFPreQLXlmXB3Yg/89It4Dz7+ZgN1qaCOGl6
t2c1vbDwDKQJRyBk6PnnQIXaEYBhqbUt6huOdWM5V+590A6+oPUDX39N3IDOn7xbhQt9GgHlSe+k
eKa9pzTAC/Z2bHJEYQUhNr050zfDT/OnZjkLr0n5AJ4evW1CNPF3fD8mSqgq+4SzU8ty4S2AjhAV
lJJ+WPYqNNqJka4Wtb+PbFSeynCq4FoLMDHCLDLV1oc3PXon8VAx/SPnykTw+CcT3sFaY/xR+zlQ
OC/SI36Xv2dMyIIT9tcfmTJin4WrzbiHVYLh1IblGpYD6bFkR5T5YfZJeL7kDthCU0in6aiFndBw
1vAiNIQbPmrrT6cc3w5ncPLJSMrdLzjuJCo0W35od/V7L9usaioAEn/2ZvXxKwt7ZbCLtFC7oDjJ
rZ1PChkFgcQ194L8495UUBtnwON1MTd7c1AgPPDplOeNvBEI6A4EBkGh4pp+1FXn90xb5FZPBpNH
5PWTgGGP7BS8Fhca+14EX5fxMZ763+vsNX6+wu8VB1MVFL7TCOrE1NH2Tl+YH2UXQMBqCsAxeYhV
w3KSqWlMqYc6kUMte47cior+N1lr9/0W1/UFIHsXk4oookxSNz16L/Ga1F7V7J+xDekCLhn6MDAD
L+3XAldWPrK1gRx0NIefBpxUoJavNA8lz3YOnpCUTgNXL0JAX7VRNwEKOOKaskpzyLry1zP9JFVU
uh34xY8n2bFpRjtSwJGESh5MwgjddKsPkrqQUfavvGtS6hy6YAGFZ/ljiyTXmp7Vsg92X77V7hqf
ieDlbNhj3TggKfghy4cm40qLUJPYGhQ9QrooCEfez6u+lUwTCRffaiEhtqF4CF0rQ7SC2dqKoyjO
6XfUON+3DViGvM6/LyXg0jEh0qFfhqimBZJQgRnWTRaTm68/qnw/rWjVK+AX0UwnMX0GJA86wC0j
WiFa3DKEoETtTNNtxcHEK8p9zuRMRUVqy6RnG/NsZS85z0kLgjcubhsnF6EB+Bl+b5pS7p1se7sW
M4IDEkMW+ixKrngFPjkZoRc/+5uOzdvGi0kywcgojbGOe8WCnhKvB0m8oIzCZd6zpYj/RfSru5kU
/zA9BE3wa/fAKJI/jR8/1VbTmDfJF/JD2yV//fjbU0beWYlPx8m3yGGdPS1xocNlq+giHyEDxa1f
XnRMg0YBdcXgCm9vguCJkTKUDRlb0TNb8dX50grgPVMdUt8Gh0cQJujXqN/XAVCjkMhVjOURwpJi
3SdsF5M3MSA5JHIy/mlcY/+38UFr83UXyGSxCKJidO2nZc5/iATmFY9nHc/0QLoKuqP7hbyKbxZ2
Pp+UgJ8vr0tpeRWgTzv8o6HZK3H3AttfLWq6g0Oqdmod+H7nuYbttqV+Ezv7/kW9D8FBJkxVwmm0
Jz0BHBRIf7P8XbhrsgNCFdCN2EycPC1DdfDAp9UqzDe+PCaGEy98tU4AUfCWeYUq8kc0HbxOTgkQ
PrHFpTFauoP6iXXSQ6VrijWzz7sX1ZmlHBFhjKBNtWPxPaCv9zuI0v5OhlgpjCWD69SNthfXtn7F
mzoTio/eBsWS4cnHWatU0BPPHkgPkCCGX4j3NZkflKqsCm1lQ7nw7i8k/+WKWbaC+F3SNYFy+Xcl
OQTptvfEyd0WYwvDkZIOS6/n1MrQZ5Bqq581bqUXzINZ4sfXVI8kxt4kHt78pQoNQBmDmJ+ZoLbO
ntoSphZOT7fEBaQEshq0SPhvchXFclskX9CgBM5qqYErzuMlILvfYkUA4zFrhhmjBqfL//xr+D8b
ctdAghC1sPnjsi3uoNDVVV1CQz+U89NWrtkB3xVJ0Mfik+HE2+3ZE5TCkOSsVH2vhwNPMmmomWLx
TTGmsd44d/hSsKAGkoOZgIBoIGBIklLpdVo/6XwdlbTAW8er3tK+HjTOfod4c7pXN59aPy+YZjo8
2unSC/RqNVgEkh3kDBk2rnsbTWQgX7S7+8OUK+Qb1WxbHYawCGn7i1jWq+Pad8UdExBCnLN4P9Q0
gYnoTH+MJ/UxDe99VplYPYC7gHvLE/OAAlEN/40Fm1domPwGv9Th1sr2Lqbb7nX223GXBjrwTOKP
q+vN9zdpN5N57HJcBEqtUZNXmCKXN3QrihD3X6iK8M5ID3ZUpZNIcz8lk56QvEvzJOBUR1kA7wLM
evOTaR2mzEcoDHCw2N9RX6MJLzZ0zUYgja3dVEMn2OlI6mzHtMJimKruyCUKyt1TOwz4ZEqpN3+n
wANmKRFoSDdku17puheuvAqXICka0Dpo+sQL7fW65x/993gHNs2OMlTy8+R2BI21jjWyqeWbRsVB
U/w9CnHqpoUxiPF0w1LieZgbcOuzWjHSYST5DXQVYBems1Jo3st9onnuR5GPEI4Urd0kEfyXqqay
mD8+1qqTB9LJaD1HnNJ+iEWZuxl7KiuRvx8fPAAuBqaD3NkVxHAllRjHrE1jF7kce6OGLNURSe4z
HaIJ+F8eOG6DXpcbCY+X+CZcHEHqSL70iLWs8W3g9xNDlINZaerXgy+oMO4D4OLMQSRLjEVRYDcM
sXjjYtQNV5AYaRTifU/fb89T+xvczX0RjTE3ynMDYmmZPlCyQr7z9+jd+25ayN8TCY3mcK2gaOfG
dEc4dVU8q5U4jtkJc92Khz7FkuolBbigNk//ocaFpJpby5Y2zq7BVCqbs9MP5Tj25uJbfpzl7ar7
c3lMZHs/71FeT2vtl6PaXNcFw23xcytGkJjTLh1Z8WUFgnlFL1zfnMkqvWvjs3vYRrgoPY1eLYWh
Q2YrCOqJLe/c1Ze3hzlip3iKn5d94lEFncCtcrUIlxrrOMNCDZM2Kf/JFn1bT6nZjsMIyG5UsD8c
qDtaWnkJqdFESAPKmjkF0n3blBvhySOlMYKJFOxGucACou55GCfZ2ypjOjvUoXIHjzFG9Q1rE1EK
ox8lCK8BXLg/+5CQqHftrJ+8R/zDnpVmq8jVxj7lVwPatNHu5Ql7/NJTUkxrc1rntn/nm6jf5XlP
Yil1DHL8c4dgvfp9udaGJCUXEtWSBn+mv4vxmLOZU6HDJo2roMK2p9OcTyaK6vjAyglN6dL5x1e8
56EyilUySvoKxG2JM1wTqmInK3xA0nBC7E/OwRVoVaDLc5q88EUN8sscKAA9kJRcjzVkiUfEE4PL
c4qlORJbWMFtVx6EnacGVmfuE1gpzhG5bpDEyG19HtU3b0/Ku0ASSiLS0Ib4HnlgsuQv6MDZl/IL
ew9DYDkWjrgA1q0H3jx3q7gZtIXSQKKDTjvskpK3aiufJUnr8fCxBwd6vu9S6jpk6l14PyCcrWc9
eQh9fkQ7ClSYNFjCEKOVUiKGC6QRqQXa6/s7pCjtKyV2oghoG6g3pKGESp+5Efi2NUOMu+8K+DHX
IyQTEwoJmv8S8a1jxmczA8Ss+l8aVoz+AF/3RBRteT1/Jz3OY6Duoj6TX4/U88AzDbgKjk79ozmS
og+DHZ7a3MKTLS0tUzLUqDWplplLqsZ2m6SBf2dNJ2DxH1ua3dUnhomAuccCnToojS914DkRBU6U
Y9LR378U/9YIMIS0mdVMMrxYGTJmBrX+4swkUCXImt0UCiZg/bzDDfWNHVxEy+GXbGWDTSCSCsaM
/wNayaneSZIS0lqQlqrGYMchrEXxMVUUqhDzJSuccWYdoRPUnhe8omJDD/iMnjnH83xPxXBR38r+
C9MgqfrOK0aOmNXhfJN3RUH6cnooyMGeMN1kegxl4YYdRiLt7UMsVHHwkTfbhfQuAQMrvGSzdDjY
Sh2IsbO9hMOPiNaqm0pOoKi73KThvcmX5WlVzMTNEjGmjRuDKhcocFr52+rKb20bCVAdsQaZ4gtW
4p7Nf+YUO9atXBCJ5FiSmD6tpyh7O9vHAFYhPA2rsglP2ZvL+0pRa3ZxAJpSMwCC29XEzGPkCojK
NeNK4TjetIeME/XmFrPn+pAkkgskcXTx6KvbG2+ANVPcgMuiv30FfAAb4e9egpfWfTkeNgYqS+0h
YZ2o1O2ugiauQITT9cykdeveN/wQ6AnV3kNH8vFErTtDBtKeEfx9Qmj6Nd6Ac/CF1kECr+5fssLN
wmFionx1Hhit2RLDW4gfZ+QqlcosdqMAaZP5h9MliLnSwMA+dCfbq0Ks4+K2yALoAxZsJx60cdw2
PMkAqDmXU2cT/PWZoPixn4zz4b/EBaI0gXnJs4gG2ldC7WAAumZYTPaeoyYFd3aJDu22y5Jm1pxi
1cRitvvsvsXFJk6mtyOl+ojFuJAJee8WLjhBFznLtemDSwDYR4zOeOiMON/EEQUQx5sqQMGC1rMb
CIi8DROyDRfXDXYXlNIkclz8IlbhF63WWkfsJPoL7vcwTw5tWji1xnlQZXdkN8NgmIgfSYKUjKtT
8BtmuS75bJzCANZP2g88PffcatT7N7H9YMmEPzfRpZz96jHziY7o8nXu12odNPFTTwshTTdD1Ilp
FwNXZXbryjgnpABqp7l9q8Enk1AUdNzhsZRY0j2I8dD8IcIWO1wIvBh70tXeIn3pBd8LxWAioosi
4vz6IquNKo93saNWVs4AHL+P8lcPz/MCWF77WhROnj0Hkwl6kefo/TfxPgCPulMGB9thJtOd/YsO
ExTibATaHC/gyz/m8Tp0Gbxyp25Xs3nh+X1Gf1NoK6DhqowrtzBUcOxleccbN0wqCEqUMDEmxIr6
1mB+2NlQPxn+SFD5E+DE7xBV80WCXggsU4cJTxMCEuuRe2wUaFn1H90xrUAv9f5iAP1FenUghkOl
jZOQVLT8BDykY1X+0p/2BbG8xOXAxuF+t82Ia1TdBcZO110TZyysKAN/KenYFMYD8P/fmEuLPC/n
tOVbJ+4cFd9q+awtohTSBLMsX3UHecP22ai8xazg/8r80FeO2Grfe3fb663Zjz8p8qCyCYvcVBxk
CrWUnRi9webWL6vASGxgA2an+Sf0S3JFQ0+Y5spmgDY3KLYeVYUozU8cX9RZVj1lXMgm2YaT1FF/
hpBIETc0cktPxLSXb7+yxdilZF48I3K4PzKOCtg9GH1EZzkVqdI4FimCReJHBFd/4BEjOS0VV3Kt
Q68yCD26X8ryhveP6CA2r60cjk/cE4zE99NWlhKhkOCa0u8CAFHAe5Ej4IqZ55PkLUmS0THz/ysi
hTOEr/7js5X4R5yNUvs4HflrnAM+hBSHsJ/CM6sl32bfkcqlOxMxaWYz8dpaYQucF/jQWMGJ7VBf
8oN5yL+nvdbvzEflcRjjde77Wg+vlFgTSbwuPt3McOWooWk0WrUyluKFZc1qqnhsAwS50UHLsvYX
r4odA+8eRLcfJXVwL6J5Z6qJQlXjl2wLXcIMbMNyYD2LsW3eJpVeeKcriJ/SFJobAl84gZKUtlYK
vJ8z9oWJaNs0YF2MzmsZXeYniFWcejOwMETBjJ2EIWMvjPJ4FPKduh6b+QxdV17pWiHFftcQymF3
/93bDLdlMqoHZccqco37k9LjcxexLNYbLB/Auk03P7oWqVv7G0vL85EKOstGULYC3e+xPCVSloEP
KFcLAN4AUuHOt3AdKHh7G1L8IxT0B/alD92BPOn5WaS7+A9QQ53QORAnID7e4p2eIt5iUhbznkjd
SUGwV/Lv/8sWPoeFZdQ4fiQ0yzL2oAb4rdK+WRH4cRSbFmZAqEdVvH6cGz7WXJN/SfxYd3I+Mlnn
fh/BZOV93kuSX2sYhCQVwv3/2RFQryvUflcOCxAOSYSXndD6KgLHplCseFryrJRxDADgy32yunRO
sWsNxkfFSU0+XwCDxVY/M1SEnRqTsltUC3ctK9jK6HU92i56908/XohbUVFSCy+DuD7VI1c8ryIG
v2fgiDyNiV1/JK41rGrlaFXAYZhA/ka1sAo/mKiLAhou0bZiFU2os6cv7MPqeqmm30hSHKBON5/R
rv7WY5IgqFFXvj3EokriPVV4F8c5sH9Yz+Khi8hnKSPvSumPviGghEz9kzRGAWsjoLlrXcqh4N58
L4v60KJqZq+84IN/4/V93yiCXtHmwolYOcd9AQDa4QWU4KFpKsBe6C2ItdEN1oKYr501NXapbdFu
VG1wKisIz2V/w62TI1A+Gj4x2JjCkcqSe2fkY4KhISdPC4+m2V0sHEqfq65SQkM8YZ34tc3hL7j2
VdQSQMiGPPEnQTC2ZuFRMdIxzGVtk7cbhZGYdWWajG53NesG6iXXWELwCvoQ+B42xIRgG2mdn/mv
tMfL3LGDMEAoM4BvwC1w7gJW6s8ZB2leQcYcBzCXR7V2J8p2gqSz8ovPNq48v/K1n1ZoaFttNzrk
ltBQb61+lSbMD/N27LS3mT2cAk8n1TiGf4GtzGgTKc2yF1R2ZeHoF93terruhNMucl6YY9k2k8cX
3aXHE8MKqB1LvrvfrD5ByB2dFkevisa0APo0VGnlikIG2u2kyza152Sn3pm9MxsAlogTRTVzW7+F
qPE+u8Kz4RV+zjOeVFKBdqXXH1LT4DtMGRMmQpZETL1CahEEe+ALX2yXwu77pkQGeHbAIV8fmg0u
7dTRCgefIjigS5n+fAQtkPny4FpByt9YO7yXZCiPl0PZaIJx98/6UVW+E1ezEzpj2kOs8aVSNTCy
1Ske7wmh6Za1Tf3IZNJSIrEUVha+KHAR1llt/2UM+yI1Azs1LgdIafpdAx55Ubga0vfZJ4pu7bYK
WFviHAEZaEHw0C25Kncl+YV6QsnB7exQ4cD8lmNOGm9clWHjw4pFQ9BZ0X4wImrOmVgYlyptV1fS
DRmN3wTn90J5j6UAE+Bux9NDw3hdF6eTm/MlwMqMk3rpWbwKPuTapowR29AU8vq/YpX35aAm6C+V
wJwxl6IdzNjLJzZiDZ+HUxV5dvddHzG0XdGEI9SBwGpVQlD7JhU4xOblI508UyKXy6msTuId+rbB
W6p3Idptia3NkujUYRRBg8q4iMh7wLC84mtFix12F9423xc+hpLDTKfQN4p1ToReBIp0e4RqzLi1
XwhNWfERLkINnaoqnELHoizmm/xKNou6vrdetIbPAiAYrYJ8DmZGsZ9H5DwqMEGcbT+1wJv+sDu6
vbyZWz1NXOTvuic6Y/8cWwO8RMS3nc45P5/it589NN4PyRhlLt3Sb6NvquTmn22Zt/1YLEKcUK/o
YcTTDc8VsEiK8MVrRrS9KitbgZhr1u3O5NLCzEPNjzRyvsWRuEFJQptDdoeF0Q9alOTVgLU2B0eF
+cZKFlZMybJJwfchCfNVhU/aSvmQY2p+Se+kIHEbVo2QJuqXYs4DGw1Cd7OKjKUFqpWb0T36sS3V
fYY7dooz8T8SuUqNTPe+Z0WLvVFr7SEp5yDeXLaQAyTuUX7TyUk75HXE30T6j1WtmSR2ZkDdD/ul
uBaLMVh8RpJpNgW6iQlMvovbYXf8Uv0XipjWOj/xY7Qbc+nJIq3iq1SDe0Mp9vtOGsjY3BPNQ8Bp
AzLRxhnnZcKujXOoL1JZNCP2fz+WhSYRzEp+Z+GXO/gpW+4irUd2oOFychv2ICxZdNFleuJmc8jR
Sgfj9B1T9zuNIWJc2bOzxcExz3XFmD9KhlN7pamePmKNxU5RZTYb4S77MtDQoIxznM1EbQc4Hati
Txg82wLZh3eZalYjG7nLVMr5Pkk1hh9fKi5o9zhJrbfLTjnU/w0kvPhYuSsZuIC76aDGNwpmBYpL
C4ouzbtNfg62htmEWIn3MO4cLgI42P/7zU/xan6h2FeH7zlmpHXEr8k/QQp/HuCd+5ZTkR4ilx1s
rHtSyGGqGf1pJszJHhkibi11SsBtLpypvd3BAEgwsR9IIv+BWcrvHB7ptL2H3TJEQ8hhLsKR1fZ3
tAmkUwdH5ihdqYPS/DZcr9vXGUz0n82TbM/USBVABxrfxZyb4sp/nbtGGNur2wVFVM0hIeD3GbPq
znj6gYMYkulhQrPZC+7jiWRKt63ERcL2MrZVz9gVjO69MXXq/INIEwsx3QXQCdsygcMp4rmvEiVq
TDA9qLCajFfElOThI2BC1T8tFL5T/tni6Y7Csh+relCW4O3vl2AUhQcT59/KC2V4XUpWEjqc8Jij
4q6i/dmwCCXuR5qDozJ+RjeHl9i95kzLsxhKJx4N0KEzVxtq7yQ4yLshdZPdWk7icKM2ady9yc4t
JlgJDNuWBctYAzN3SF5EiZfMrKvn2h8KOJoqnE6PDR3ZeeFR94OzGvznxlJiAVoBTQYI3bz8pKXa
bu+mh7ayiba4rOSY+ox97MQ5LqlmlSeG6v1BNjdsyQy4cga4G3nPAK4PnxVM9NE6mBv8wIykSI8z
wDOqLpnerHUOxcq3cSpnfhTg3kr/eJnuMMC7WUZzAh9i0Veto1p1Hr8/0o2OrmC689D4lzGbIX2w
MAQJZuwQyMmPpCi/l4+7ySe0EKFn9W7C8e+WYdYcECQOv9ZpzEOIUFk4N0HWYT88R8ajKs2mbduI
+A5b6o9Gf7o8MuJ+VWHqRGyQ7HQjQbY0NEzW7yiE0NDNkmMoY3LxzUVdjTqGANN+TBxtcFuZ/RfS
uRDHRsHsZkly+pAKxoDz87200427u72W4vCEQOrh/o9HDfUHK9LoreMf2fdcOYrohIN9wi007ws3
S9MS7GwWKgK7VKE1yTck7c++1CkkSfb39MiepgS7eAC2vOLVroCFo40vIOUOKOZBD7RxetYBn4Ui
AmGHs3POdVcfxPyoZfM8OvSsn/Yo4KVcGVUDPXjLd3aBC87JV8U4mc9DSuE5XHKFgvnYemuIMsNE
0sogsV+lYNhigkus1KsAVTnjDbWeXhaEE+fAXeByFpvOJ4dxtS/MCtALA8mx3GnvHYWD/hRsizKM
iI9eF9tibtVzu7/WOHxsz9wKfeoFn9hdukpR0UvvcbQGNZtUyhxc3IrfkFP9c1pAOzRNM/75vjWa
Qp1tD3TqRDVpyqnKZW1F5QMdJFPyvTWh1S58jDhONtgYPhEl3Fw3pJG7loYj1VG9Aq6yJQKA5XFE
cH/Ku8XbK7/M9tf/HdOo7GAiqS8hJHPL9sfYJgva7tKcpJrqjv6aQgiAopEevEe3OfBmoIdij4k0
NxCNDaLJyztnNuszqH9/b6JN7E1vqIuhqtg69JFa+fd6CYlRvyK8YTTrOq5wP8OcH2XkZ/hcqptF
dprwX0zLMUCaor2n+k/WNN5JOF42d2XCE7TsPj9FOHtWktiWE60cp7UHQKBRpRbKo7yx4xUeEhdm
cHJc8jxdoI2SVn7iEVSa8vAA9/zaikjcvlZjADwRiXaWjSwUtTVsn99/lxHW6Lp59Cu4auE3tGAN
LsG+byr3Ji82Yv5K4zGqVmLPExxdMfwxhMBgFq1MyWAHUKzNJrgX4tnsCMMzd7WQh6kxK/HHlXBL
GVQdxvZojqVGyJtFn1wH3Ps31q6l34PNw9IhMW/fVJp0kYwaazFWP9yf43+rFLGBHYn4ZhMDzMOX
S7JfKNp1o1pMB+BE260DyPiIsZNa+KlEaXuz4sMjxRcopikeAEnf4Qg2IYq8KkedoqirSniLUxR5
LkKVWrg0UUBHJjEYFKTjer6Vs/fXuuIjylnn6pbUScLWAfYMxy6HKCN+/U51Z+9YzDGYCkaI0eNj
T4Zwpwtsgsf4nIbdUEjHclpYdEv8F3n5AzTfbJ/UOevfpOWwomBIMnioXNVu7B3pIEb3PqrKcSkb
YGnScjRHK17yZ72cVs6yp6Bj9/IwwdYlD0wVyzZMO5PkBUdoa40KvmTdUEOmAPlplUyTyiYJA0aU
HRuMKKUHH+WmcCnGlXod/LOwA3WT/eVMl0twQ8z5efAEJXnJKE9e1mnoDwVfnq/pchZkOx+vyDRX
o4lR+6uNrKK5gms9oiXVko3R1EDZhkikKqNm0tAJU/PipAR5QqintvP8sKqCPeE/ES1oO/ih9dBc
zZyB6LVV7y296hRdRF/FPmogysbHT/qDlqGmvtB8ZhdUVZZuU5rBxnpbhikU9+7Pt04i+l9PppbV
nBZraryPthl+axiKh63iU5foJpXg0g6kp1JJsgm45ENYXWd0jo9G/Ql5ZbEzoBMH2X2p3wdrgAMd
z4FOUvRaKKf0mOL+XYdEbC/4OK8EURtCtRFmpimPjv5mfDL3RM5qp0EGS1gP885z8uS/0D8/qfEW
H9ci0NPVAlNYd9VICzrZT4poBpspBM5grfcrPyVABgdexU/IBvOOoSPuQ/gva4/C+t92iRFBmhCj
OmZz8mFLgWAZASuMLMYdRMMOewPeE/2bv32DOqltt4/7ES6mG7W3YZcn96ZF537tbKKST9HyoxoJ
VaTczcj5rZQylOa/QjOGWPyltC/VIz9AhYiF8uRlq1uO0rPo1saJrOTWAYopJgsF4jks3Sx4j+g+
dG6aZCHDEfVwfmka2R8iBDa3q2/iwjQ/ZGYgp0CqQqwYTPLe9zzgiaXApArgxgd+Xhllc2sqhNbh
6EOFZPVmkKDxtTf1HI8NsJevjuwcah9av5EhJNDdDCgmQyQIxrFwELpHUDnomatlsObgdmQxkjiR
0J4+yZENprhhysJNeP3kHDqW1fJJ1HuGkaKx6XbLaPD4rJ5PhyKxwjpgMrduzfp+q+Ss9zGj4O+1
XcFDaL6w2OrpR3AueN2/7VTUDR/srLe9R/Ozcmwu9t20W8bTIRH865CcYpFxlGSnjv+UVdSccbya
0N8qJcq3VTMcSV8Z+yFscYupq+lTrfYHyVMNlAhupSJFnYy1Wy7W3BhmPy6FzQdIGp2xldZHNpFQ
H0PeyXvtat0Pjqq+/6bUILlkrw1QjF6LZ/hgS7EET9iCjjTFLoWc1ZykBLcKNTt2cpe3y18mK3El
yRV5rxE6ayjOlJMnGAun59Z3PKFuOMtvJpSUZsms/d6g4uuDD2NhQRWs0ii+bXkgfCiTPz21KWJr
husofcIWmb1Na1nfmXY1nzT7M0mUK61CShn1BvOg9ZjTni+XQaSeYoWtMsY6GXLVxYMx2oh2616/
wIxb450bspyuWCTlBlnMQwROhlsVuJqYKXugZTfFXTrrnrP7X6ysMhCdIrjDXol6HWX1oXCz1chP
4JK1Dj4KSW3nmLfHa4uMKAEIfLkJJlbTFAhfkLeTYTMttEawOHrYnFmp/7Zu0KtA21XiJMZqnTtq
SuRQCrqNtV30m0C4J8Eej/sZEm/LG6RNU9ye3Jq42Xv1Ng8K70S0HPGZRmfEQqNZfpyzRgSu2eKj
KahduaAq37+E695quKf1Ai0SSaXba+zxE0IRIg5BxyewHw5v1L2Rnfv7hQbC3a/tObaQr1nYzFuU
2GnZaEIth/NbjeNr2vr9yOU1Wg+bmjsLBW5g5hfPOTz88zRY5BU/5wsQ5FQI+CtIEa/YBjHORIZp
LxLlFpQhWAaLlrxqT8agmfRfa8K48uN3ahca6bx6bN4g4D1h/3wE6dJ5Ihy2M4swCBl1mETiiFFO
OQOK52uFgsjOQ+JFdPIC2AhS43J5R7byzVcTNsfOqwqfAYlms6v0gg9Xaq9Jqgz5eRJibh14UTGm
QiEgkvsvpEezpWE4B+hlrQs1TWXEILlHtiO37cQ5KNKKQnm3lgQecGYv7ARj/fMbD1AlS303E53N
MYmb/0ecxjtSEtnnDCjo5oIAbBsXh/Cbm5BWael2+i9uw1XjK6uJg76Y2Z/Sv+Nvudd4QQQyJSP/
Tu0dLmPg6OaN2Lk3AjtKpHevGVsjS67ni4+usIhppD5GZ1D4q1Xz/UmANbTmPnwTlWV8JM2t0nKZ
4Dxt93zrrlZ4ssoPCSviMYadXYRJYFWtsB+Efe62wG9UL6/q2jTWp7sOZnvQwBti45n+A/tmRI5O
R2p0BfLzjzsffY818+zfbv0w2RigyRWOD2PnTb43CeHYgxWuBBVLwA1hKMCLnqr7+yrlC6heUEh5
48Qvp6Vt0h5hcKZLWqIgbI0Ih25c6y8f6KsQNBSl6shnY6sMxsaL0txOgQjg8ViGqce7pyfLz61a
oxzH4JV/ROzsdf0D6R3u/hYEv63BBzR2lyluLZilJD5iIJh7jOQtw1+cR2lLML8Yd3KWVBqTik6f
2FZQ7AV3mln+5gGZnV12xjhi+UjMnnv7dkS5//Sy9uOtbuj2pE0ZiPvqFfi2HBsdW8LWRvq6wyVf
5akVYh5O6+GiD87gSqsmT7NJdoyim81fqbdW/dzi9ZE2Jc1MjbgA1VdQXNmAJYTL9mX4yCL6p3Au
vk5Zzk33zsrWDwm7dyt2yHF1XfzDsCe8xye6PF0LMo5LnEX97VeGit+zlHe92FDe9Ckn/+07tVON
r7/kwLMBnOl0iG6r0CKImaIMIccxLRch61oHw9tSXleT283c71GsammMlGOsdhxR4MXQpp32R8lH
jda14Yr96TS62pQIjeGBsG5thRyTe2jqQ1ekeCef7ot+Q+JtsGhGu0zcqiR0wAdCiA7J+kqrSBdZ
A+29G5o2HILM3qumC8Y1h6/llPoWlJ8Q6v8PVgZ1WKxLHaEj2rkcMs6t3PrqORoiLTUJLwRMfN4A
wLK8Ge28sLCLv+pv/fHqwgOroElDNE5YajRZyOK8dNfyVVLTb7ZIwyXIj4KLWTiV3bLc4X5tBWq2
+t/MmYF0dn/n19UmEzV8pCmhQrYsrdJfG7Oj6QZdSA3VGLmkrWhHMRbJDwqC1uGT3MBqt+efJrIN
KF5AV4IYy/6PBofSu6ruOmBvp6I3RARNtVQKz7YKCV7+JDwyCSK/7t+j0rvyispGCFfYBKAcNXZn
07+5LZ+85+LZmsdcpcRCvU/+hI/x2UWhjvP+Z85TMJh4rJZP9uJu4ifmUpWfVcu6EgKlUvpqj4pk
r4gQfJq8cWWcHiPDK+h2/UQN9sYiJC4qtrN/MZ8zmZo0XwI7IOVmjiRlhf/UVeTbz2U5i7gOEm36
BHl1fAMHx9ZNyLAzb/w+M1ktdhygp43guthCc8ZFkY0d4wtaU0lA4RSd+rXD5ztyjzQI38esWAZW
52R93sKzEBpwGb41rQNfRMEBHxD8c1a/U+6Vs+7kWbOlsAunYWKNOhOXajaJhq/V38m2k2h6hS50
DHOHD9kUc4WfP8hK6mF5eZ5V+fYzJBXc8VRV4kEFlvZ0gjB3Hx9u4fsXJM/5TM8dJUGT3Zn3Bc+G
H+1Bfxy4A9gHY5OzAqVI55Iz5DOyzaACbjj8eFuAwpd4AbmWilRSTft2DkSuSMZvlT9OVm3erbhF
I7IDDqpvlFNM7M+l+8jEBcOSi8PMuPWBzTNlkyXlZnSUjH7MfHrsJk8K/Pqq0a3bVZw4qaLKR2aQ
di4OXizGhFkgGc0dqekiPA6ThOiuS+LShkb2+5IpwWnWOvMzdiO/V0cyHKqZIQ99Nw6aaNumbk0Q
UNCeB9SFAp5NJ9/hPYhYG0DpOFkO34ZNtVbPBl0e5b0c4OByy2zLNdbFnACSS1hNbOvlb8kyDEgd
yOM4p+P8Wd+RIi61KYSiaidBX7EJ2RVpH6SyFRGeAIIeb+qVWINGsZA9NM9fK+kZbd8u2W5D+V/K
3UH+IyRtloaGZaCpp8jK3WKm78XmgY7Vu0IkNGZaBzvNRRZxNk46vSKA029L4aGbDnMBBKLTzhDE
YtokPhxbVdBcOS/Y29m9VBFMAgwsUW/C3TKhxeiDuRfTEMpf04aR3QVAnikjlJF+MzE+vUciS2By
ylvDyBLoh9nzHAznNhYbodaiDchPAwR/zhZ0gX81r8l87i/469crhYsD6PsUpCmiUDFsIX4sOnyq
gpAxU7gr+Y+DvssUZyCSIC2AQG5evPHCUleQJx+fxjDXRxR24HYHoyQ9q2wEi71bKpoIV/CLyyit
+n+EvBsVZiZzsgSN6MBIrgntovxoaYFuXvXZK9RodnD4USVA9yQRsHA0h4Q0hV77f7sDQ+zuJclr
pOpZfzoXZQsQC37NknPzwmI/IRgv8iFso1QEKC8tQOOpb40epMPkm+uQRvq/L+vjQScDCjyZDWrC
gr+Il6CKVdiDhI7vRkv/Qo/un4RJeSi/yIARMKpv/sYOrBwuu/GSXWaZ6zFDTNxS3YMlvKCnHCra
SfxBP77Sq+nN2oO8YkK50PuUWVMWrwHhTsDP6EnDaaa9IhJ4hf01Bb5svId4gdlWxNr9E6HtSbXq
NjllsIRKRE4s8LTpYuJxxtptXjro29kc5gG1DjItoW0Rk0kTmEI0ovyNZxldyjnrJvXGSz6xaznC
2S0WXw+baF5uBBKKWFY4rjCWMxHlXenIrwnF1Xj8eVSdszydQi9DDBP+YNTRTW63avFKahtdYoCS
ScymkHmdfqSnQJtROlkLQ/mtkHqyxgdE4UmZPRqKcCMXagYKJ5nhepKaD2GjuQeYPt4LxnXnpQ35
ftxHt+DrdrQZvuvUHPZRnzNbhMBmMgRBY/innf8m+ZE6IceRtIe5yFMTApFhjcfjKNa912OCNLOo
GqJ3CYZimOC3M8zMOHaUGxkDverEzzmu1/ZLwq1FTXZuW2xGJprgM4sQhKNw0crtbSk3MJNCaW2/
l5q/55QR0QT6g4zcoy7gITWor4fUXFgBQYVLHpvlG/Z7fg2Wlfn3gypZc990uFlYZSJPJ17AQ0cv
MzQbtgiwW88yNw4y2gfqP64O/EPqwL8GvoLkVND+rMEqDgSGnZ6csdxyj0T9rIh0lgnJFr6efOoG
GYyITW3BJuNpZj28JlSZGdsyp7zCFDohHiC+lG+kWines/ll80Zf2pjUwIkhJbqTSDjK+L8oxX0D
Yw0/OBNXGDkb1913XxJUX4eRcNZGKGxvEWWCnsR8R5gXb65lkhXS/3btLFhgbZdiGmKNqvScD98M
LoVbVE6ZLR7thE3pR534AJpep3vmrwQgZNMrTj4770KVCPD0j9rm7Cbmgsxg64Dynmar5ox80a6/
6dXlJoB6iG3hqddnrO78ioBzK7MU5sSsd4Dyuc7D95Ls9XVMseCxRac+uKAmwfJjFZ3ktFARw/mP
822Vq6N+3rF9oXPNru4dXEicCt7QHinbE69MbMiJmWmDKDOVtuOSE+DLIKP9LPJPyKSbUvPuRLpL
U9s4QCPpAzX+Sl9ORVMJ8I2GccOPum6dX51rBAN+zY/9jOdHgESKq3nNFan61+RUfilC9vmDBN8K
iSuL9AQ8+qncoaO5LRdoEbY5MXTgCCOnwsMEXM5KGKHqlUSaL1lYfg2Y4uqPI6N1EF+gr9dkqNIP
0AgLZpLun5pBfx5HGoGaodjNsYmVUlcg138r6KKsbQTBg78PX8bb3PEeqaAVR8xLwQDQD3PbWh2w
Tmb9e567iKLzGyIcdAMmjXF8LKiN2LunTflELX/WlNp2VI1LfB0cmNj4Z1zqcRMMtvfLHFBbD0Jm
w8WrwEM07ncg4iBdWERogbHFZdo7Y10ZU0tVzBfVi6uEsau3XOlnN6rEYPrbwNvWl0Zk5/bkErOS
nwAwKOXBgFmWRDvVVHvrZ1fB3fN+JdNIkctIwX46i5ILkr9WiaKx63kvKftqnxZJEfMK47DfdPEK
3pY8FgARmvWOZUdjBv2VjrR91vRNVVYVY4PdoE9O+attAURsqHr7j17/QqWO+NKMkZJ2eNDTLh8n
LOEU2X+G2kSan9qhEqqrW++qYuJA47HXle1zdDlhChwy5GWRJH9MP6j5W6TpXKJ1glSRiRBBof1f
0nQMvDmwXI64km9KrQpPCDQZNbv/AJRhQ397FBnJXcyJ7Vx+XT6p5uMshhik+14LHECKAbZudoX6
sa3M+IyxZhXUQ6Hov5koACSTFFO4AnIQ5wDvQh8nKv1ngyDk/OL+8JXTBZ66XnMYPPzlZYWdlBI8
bJV90jlZ4IvGwoRUqKlxhODO0Q6JqFR2kuonFGt/gi9ervT+/AU/PWndJ5QPPQeVE13UD9xVenQs
lZ4PND7TVxFzNqKuCQ72QryXK+BZYLHGwHQ45maq+tA468lO3aEZ/bLcQwjtdVNgLqh6vwkHkUgR
OyLs+ntheu0x5C/U50Xo7jZyTr0T1Z8L1AYTm1jfA1OWY9kPnkh6NwIn+nlfL3+VJ5ZX4BtbTGH2
cU9KxgzzpjwDwlrbOlDZBsnbnariLJenECHqwuMXMl8qShx+zx7KRX9FWfaajhZVrHXttklttMl8
TX+3UIqU3UY5fvYRIZDHFgEM5xxjZ8ZmLq/dQF4/mebRJNYfgbFYl6HGTtT697ixT1/VdY9l99pA
mlA84zvsACuK16+7j1vMytw/v7YDxOj7z8c4jj29b7+Jah/+ZVO7ST4Q+K6xbIvemN9+4IvwM44V
/Isj3zAMhTQ9yvHPzHPTa3j8QbdYEZOr/Ixx4FcPIF7EoW2EGzU7t9SAUMTuu47FfDQQ85K/b1J3
1hrWgrL8XsuD3mz79rfzgpN+V9y+oMUBLVC1QlvFcOVrr5m9EQNIQNuRHVKTat3ZJur7nrVn3PiN
E43aA5GHeRWf7WPPDbBdod/p/DlJPIH+3LcrGOXkwAWgg0Qs+Sd/ZvcLFXyNTg4PMnqV34t6oj3W
V8ahNqqJuZzzCTxRrgynLiwRhdurS3ZbMV8YY6T0pe6ECUE3Stn6bdUrn/rRxhJL586GWi5RTn0L
Mz/ZValm53UeODwT8o/F7mLjb6FxbMBwF+VC5zRMTNU1+jL8dmZyxwS1mE71f6o7ys7NpW+jYpPc
IkVqGc/tc3of8byiCYWtRVE1qvig3g2lzseYqTiQ7hkqrr8ZignayxRkCyz00H7wxZzBCCqCfWYO
uvptldO1YHy2ObXDJzBuqegAoBmhkxIDfiZLddI81Afb9PW/J/ICAOtlDnQANuxUjxmA1mMCWkDt
AVhD//HCz4B5yixweuWwaQkTvglHXdTyBhqTabw07E2Ep1HajkY+u7yu8HbwjzID1PsZ3RIAhoBI
X8X1WBcyXL0SArKQY75MGCDuPQuRMJXCQVQsZKVy/sR+wnXyiIJub9BfXCT3shOuvxYzRFGVo5Sb
gBee3eP3iDgu8LQYnLaCr2mqhJKWjLhZD9Y0M8Xi0yuvHKZUSbBVxCQiJuKzZgg0iBtEkY+xa0e+
zU0I4qiOmZkdTS6qp9UFbPVSnnFYn/PW+ktDTqdUU+K6IlgHRWAfSKECNz/4NuZ7WJzZjiAMuDGy
Tf8Ivmg0nI8NL0/GSzBxaktf8iLOCJsuwNHeOBZnoMyrlehiFB5iAkeKWwSYoiXvE6mgGItZVq0s
GwLOki3BgvmWCSC/d0QYflntjjcLUkSHN8NfqFr6kKTeLjZlOo+QVNr5YVq/6nBq7eTv+ZZZH3Zs
Oj3RJ2VYncSIVnNNU6JoTrCxivKBbzuea2yGzm7nppau1+8BbpCaN8jww8g2B8N73iIVldjdbog1
2Cu6FDywjdjMeAi350DYRyWl8QR++YvFi9UdqWVdyhCMKADxw54P2IWc/jQrgro3dYoobBMLC3+J
f3lAzHDtDvkWv7v/5gYoZCQgJCDv/dg0C2L8htZ40hKQSGTinwWUFV7HWpfWaY/98sbNqxxfMGa6
jWhwMjdgWsF0Ox3jeg1azMwvV/ZCObJKH/krCGXMtxU734OYJRFZCDZ38CkJ9VrDI0iAiLLqy5Ea
lWUhYixZMG25m8ToGKG+mgK0MbDxs6bQxbtDZ5936jo+SH4RuPF3ZX1ks21fd0jJMRvhj76g39+j
3mVCIh6bBtxlsf4jP9pZHUP3LfxyP9SIekjDbqlvd5WQQK5J4OjpovzzXQ6G6NG3hdqTzxbvmqdQ
bNghSBzDi4sVU/Rc/S6bkRNiMoehBKfmd0rODhxnzWSayfgdnLKR+brbyL4mc5XQTKCi9uZkWz5J
mLaVTvY3fFFx1OECki/AbHRBXNrtG2WGoD44I0Dz5m7fXfTj/ufFbiR1YWX+NwBiIaPvsirdbAw6
AmCN/UaOB+olM0HfXQBNPG0kEnhS4tV6L4F8DSilZUYULLeUKNWmh4SRLj62a1TD//fd0H+cCSsT
vSpB8yXT4X1Wt4iH1itAk2jnO6PIw0pCKfBabfFzOQW+trrWvI98irWMTc7obd2CIaEfdtmTfXpA
8AevsAEnxrL945c8FK8QYvVPLTxgyjhwpGaTBRieCkI1ztZXmfDiyMuj3AlXdRb52A5l1W5BYpkz
M+iHDQB4sNFyyIfqDDQyLqEzJqvCIexJgEqCUiNWvPfmTy2g1Z7X+3O5de8jyTejjGJhfFsaTeXK
WUKocqF06n50C2oRo1XrBUG36Z59Oc4spQwgc3JABzfKQomjNOmRYR9+JAUKEHIUOBdXQQk8c9Ip
C8MYu/LfXArw70DAlKcIeP+ZBv5Q5HbTdal4bkLEFa/PTQyFslpN3+hqY6JCnES7vgtk+rHaNTiE
y9dwp/SXauK43ta+sBj4eUzHKATvzzIrjhQ0XPnp4+6ZOW20uFvOXblSVSbtZyqlq2XPA95keMD7
Axe81xDDG3FVL/cYu0zCfapO/tf0S01f/NOailAOTB/bvH3dHlSgMDv+UC3mpZMbj7Gl6ulxaXhU
fE+dY7Iepls0yXD+9dVgjFTJ8NqKo/GjvYU9ysjYNA6EBR1v/ZGbXnpuP+Z5Yi9/8+4ZK2xm4Fwi
F+EBltjnGi3HHrOreqqDwmzfAsKJpJvd8YZzi1+De8dXknQDt1jcp9/jE9LFeDDuHx69/YUijXQE
J/RqTiLOpoBohjXDYuxiLVMUbxIcfbfbNtkob311yIfzVdJdEoG8Xr+uAsYZAw3ApHP09WiQQbon
+m1jcIESItvTpMaW0Bxy9zIpH9+9Z7MDN9QWoD1gOgwIOZ4z3HfBcv9QFS8TgE27rfY8JVrPsAJE
cq84zuQQszQ77hVDqL7XuOHhFs0WepFqQcwvvLtQ6ITtTfVa5YjZfCl51k8cQnVNk5ikEiPSwVSR
Pdem4NpYyzB4+IcpnRw7g8UciF8zDvGdj9bx7FsSwxsLv8gvjXZaE00A8tKSo8xd6vq6o6Q7s0me
mkQAx0X/BBUZvSvGypyPvzFOvYl5yNheLtyVDemYptHeCWRew5IJt/lFV6rKW3kRAZHCXefR6Ywb
HQD/v5jkWrhc/5m1TBcaJQE8nlBfUQ2OZe/t895Qbbh/U67kd7HR2lVSig+GpCv8N/IHOp91423A
ZIpL5LQ5N8ky62uUkbxQzAGBTh/1in5AxT9kLaNgEg7u2BdSf0XIZEWwsR35I8nZlRRX3mOLTLlQ
BJEuTrMtoQ14pWqK8fNFVDfGEn8mJ6rf/c5eiu9OCmjeJQlonlnq9TF+LjpysTRCWPoaXJjR7sAY
VD6i9JJSrS0KF5LMdVgO4J8Ap9WoO17cezEE26uM4dP/xsJXWOos7by7FZImqrFXTxeHyPdgMMmh
GLwi/VEtD1TeHhwMC4cjQjUIPpFcdYGOdDoO9mgl5juEFktUkUBDVKp4Hbqib1eTOZxmtIjHeGRt
Tick7VxQw9ICqRQZjr/UCvaIafwDJv0XlnSyMJqr9vZe3PxVOMkGB4uQBySfoVASdyyVpwmf7WK1
kM/yp8Q17wXxBx9ct3twn7d4yhM2ugclCZh9JVxkIo4IgM+FfWmXaODYCpXqEdBwMe7kFFnXBnlC
eEEPe6SsNPebQJJQZCUeM61jtgLxfl9OIkCyyV4h8Sy9Jy2lom1p69d8LoKrpajUs0d4wPGvloTP
2Uo8wUo/PPDk17IOUImdoUJv/irSho7Rf66WsXAbQtU6aD60gru2CBSpvwXZN/f7pPf12KDiYXsw
+3LnEyShp4ngmTE2Yn0MPsv8tO3EpX0LAJr9oOS7uxHmXWNjbV0E7VqfAvm9sAgVeLVzLVXQklpb
v7HgBzmLcycwsK1aPXpszCTSM7rH2A4gX+s9KXR2kUtwmGMG/8ASyS9e0rSawHwJE31H4IeA9gaM
cCi8Hcl7XcfkATKm+Cshsx2OYd3Uz42JFnJGcPZiOiYhbKrOQRe6f6EJ/2bzSQ6TbnByci8ewROz
9e6N6JE1LO9fvI2MK2wtem+czLn2CefuCujRWuZt5H0fXhrNYGsLWS1/RyfZxI0McUDQ0DSCWp2f
O2FjNKJ5TkYZrNM2CAFjSKIpTFzzlU4HgXb+axoKRrr9YUSUNu5D/SCmEIB6REdZPQxluup6Oi83
F3VQPO+ufSQBB/sOWCMGKsOXTHhBeA2O/m7V2Mr7h45Eb/PHKCAVseek+opl9mz1wEpmnD9t7PeO
q35/FTkQvc9JWLndStZProCXtkl/YE4iapenypVw0uXWaLJt796sWnQctdvgQ/P0nV9lSrnJwIlB
d6cNMTst2imL1MUbStxknXtX5GWzmgOpg7w9XSucLzJEdOOHQN/FPVZ9kaMbyxOOq1czGh5xOoy6
GeyDD6I/KuNarqZFQxZvH/go1/dgrRFoO9k2m2Om930vOGc0xLgNqk9vahy//eBlUHBf+25gwz2s
pPqdy9Pg7GNo9P8NBijWeSdhrUm70Nau5na/BttDxJ29NAYU7mSUTC3KzFT7ZwFYn95SaUyUmrNt
O0sQ1Y6QLUjc3Ulqcpr4CLYFroIXsUmLK+Hxu54EU/IWtLlghEUoJhCHlP38Zgo3Sapq3PxfmPjz
zkRcY7mo9LIbPiPEvKqvlHn6drcm4kcwbHzH2fC7zWc53jDBQCLBi1eK0gSNAhptZmXm+dZlrmbG
ow4BSZPKTZ7TbrOJ+LGtcMmMI6zcYpiz6wfNHauamaVkFtyO4sahi74DVz7pQcrZ64qL/nzpq2CX
HG2PIzKkBT+tjFw1lsprKziaoTIlVA3T62xerSTjiXAZYAC37s+XrgJQhYBqMq4+tVLppCK8mqQ8
XT3HfdN8b6LuTvwwZnFT7gTOIo/YNtOtdLg7Uu8RcQOaYZgWygWlL6s+5rCyVnwdMRmB2oRG23Ly
ozBvGg1l4IHQjTupdIkUEDTYmeYjpQXz/ruObYDx7YV5Zggk/lv5j+KKKiZFz8U4ACFbI25UdI4L
LwWZiDdfdlzFsVSKBFJxLqOZ9sa/grXlQ43e8jeNTNP04nyB8DlQPrb+BW9MYN3CDGwF+qhr0f62
cKRLuIcZGIW1tRD7uqVHXlXfijNc5FK/IzUnwLxYhWVqpI4hbNREBQPoy261IEeuiqZ506Ep9mDg
E1W2jx+blfs2AtxYPedyNWcnQ6gSMSWn7W5HI6Ojjw6pBA5dSZuQPNZ15Wa+cKcxIcXjgnaJcM59
2VxMS/WJGmuFlyttZjJ9DAKiEp4qpjydZ5BfhvYq2O2VZyDewM1yTbQEjeRoDawqAeIncaVjQNqX
AE9cq08h7yJG0fLkNP8MSBZUYHMssKool8j8HagL25EfdotaJlEJ1jzQd3lrGVJMGi43U+zF0mk1
6fLMi0TKuNaOOT/JizxSnlTHvl91jnTFnc+lxZUaIVeZ077zoXIcGqABqgq81nZ96wHId6yASAMu
F3fEXO281L5+4yMtbgv+nSTsMv2s6XtDdyFzFfKBgRJ97SNZVISy1csRuGoMXVehfjqMmK0jt/nD
ZKHAEdXtK+hCPKJGRW1b1EP76cR55LE440/PGvKFf+HEvVQI2LKQEA5Stuqt8VQA00gYz6JN0BZX
uA0XPmGuM0UnfjbemJJim2EE0m53Cfmcm5CJWwqN9GAMKz6UCRVDIlhrjIhqlroH0HJqhwVsXzU2
F7jaPEs2GR4/3Ln+EQiHXyJJcIZ6Z+XVyBA6pNcp5YMOldSQwMaAogh9OmcdFWkEgTo9pGOoFcDS
pHN2efFpO40ApbmZTAQqzWgXBFzaiTfzVKotFqWdHb52NMzsRX3aFtMm49rDecs7/qcmzqEAGrka
sV9XuNTRFWR5UCF2aS+GGA2R2alrV35BGhQp2QRGuNv1tJ6t4qyMOfniYumAgIbwIcxx7x+ujWp4
uA4NSsoDm9lARY4ayBoq1vgy3kuMl3M1YNjZTX5aoJOFoM/u4FccIR5eEv4wjNvdkQXMssbjKFsn
TN716hPdDiA+kFSeUteFivUmmGgxxiakz91kHD3qDZoyA18u9qHP6P4HWoIXDfuXlCD94tTNHdQM
EsdJ6pJYvNYCihle2yMgh1XVELZRDL79GYS7VGOWjzhAdomSo9dn01PXICREF34JWcrLnte2LIyn
LGqEFtPyfJf2EzcF3SKJo1IJ4eYd0o0fHYkNUbnee2S1OxLqPm++P3Bm7Wuu4Utztv7NL2X+Pj+s
x+gNqIl0S9bYTtf8x7fJZkVLpd4+Ek2JkK0iKITIh4wkkkVgYbMGRHymWXuSwU0uj0FQf0nX3DYv
RsduTWZ8CKky9iAuNecvYiQYoAI7P5hMVHJTJtE8+fPegV3Cr8HRBW6HAbdFcSTu9MDcAKXBCJIX
49YAmjF9c/m1FEDx2sgaSAaKmf+1felQZSJymQVLgGuoSWUwepVifO2J8dAh2ogtonmb23CskwTW
+0LEXfuLTRHNXFkwzPbLvXv2oM8vK8NfyZ9ZMJolpD9gRLnGmj299CDdxfghQyleyYVU2I5FFmtF
MuQ3llgLqg+v+M2eSE67NiKV23n/mmriBC/aNHG7gwCXprizIaevukNouYkkDANq1A3sfVQ+CsF1
o/npcNrkTusJhMsMtO27fAU7FnPsBDGC9wZKmTXwZ/AwJC0QBMBPqbLF2aQm/WAAiYbm5v9JOhA/
WcXKeYrSg89eOUoZFYtxjOzXe5W6YglSzmpPHbiIrL+JGAwR7APF/RTKmhSepBua/Mzo1+lZhEXd
0+mjxSqxbUL/3KVSDmFsZHf49rbA2pzmIQnhwOHPbhNGebuCsDMUP1gx+w93LxFuO5WxIM7QXPjL
aQ/Iex9Z1F+wS8DzyHbeug2gE9WwZaEMySM7eHsosgQQF7kQt0L9txTnV2TOIzSXYC2EOsCWj9Tv
oYLc4GNA/kc/5T8Pq9wKv3giUGKZ6whpdxeuzCuNPnUW8KdETw8N8eXTwxeSlt9JsrJ2KrbnSBId
Q/v8UPeqTY4KSCDgPKMTAL4nv+i+DqiFDN1paFahct6IEf8vmvYhkub7IpjsYkXpCuSvC21zKRy/
HdixVcK9YwIsritp5V4I8Rp6fgAHyi4sGQOP321tBRxGmIWIoWLVJJNXQ03f8biYlzit84oWaHN7
m8//MXxpTs+nZ65gJVymaBWL9CN6qp0pdW08hTJ1aN+bImnTTnmBmKY/xXXo2+4aTw15KfLtWL0a
QlI3Yno5YeunAuVrRjn+WXJxZjIrqLSgbXBzZFEGF7Ym8SEBRipasz/Th/YmRbSSdxbVL15wkiaR
neHo3EQiBdo0hM+IJBL46uBMxd3QipQUbCzJ3FYZwFLx0big1lSJXJchmeyBhrz2pDx5xD85ZP//
Pb+mjz2tplRxIcysZdvSSV8AanBrGsiZxIXPm/G4v6AqNKaVID+GQW2+0tCvFwA+5uVvUm5fshys
y962D118DkJaEv3dqxjGIif+r5/m+2YuKxasjr7Q8ZcL/8ezhVfHF2v0xeIt8EB2qfjAUWLrKqpp
wgOQ/E3Fh83Of276dIEScnI55aCcwvyGwdSGdbdrpidRpEC3DML4nOF+l+vxHHp9O4pwQy6F4i8G
KCW1lD659jH5KoHwezrB0SNud9ExP0yZl3N/BNejmRMzW8pg6q8QxhgKU0jIHJc7pmm5742HTLN9
9qC+6S0makBqfx6Xa3uE9dazqooO4Szz6v7blPcvzA39ijUwRqVYQBrGyGb0r69JU8i2kdkGwbZ7
gEA8QJibLB2QQQVY9gTfSptkI2gYlgwWuhoeFR8y1YOACQpeXrJ0+3Z27FNpVYg1rRHS3W/daYAZ
BSFFk9lXv6Ve24JCsqzehla04C+aKLRvUq2vSSeV9swiPJhNN7lLfalj34Inz3rOp0WlUrRVUdff
CLMle8QKaDi+bDyxe5JugMavR/IL0BPbbkoNnPpQbtsTc0R+iw84hcEQOlaukA5HNz7I9d3pfwca
/bM4PP3jh/bfH1rLELM/SOczAXHqgdFUtK/rrkpr+qv+iSrRNrWMZPwVRBYsTYaaQQB6loFWnh7K
YbiHvfSUBKthfxtqZ0T+dTW8T3eolvFktxJXhs2jDS4JYkqFrIbbuUuPlOZJIbn5g4hHkQ9l7I2G
gM0BLR4mLXgjzEs2V2z2UK7b0OfDO68myuCl1e7mlbrWoK5JWyLuN/5wo9Ca9QNsZ1MYxBh7ANyQ
bS1kUKpEXOz5cEhqQDwh/hisS+p2cxdAw96sV/vmXFhWAJhuZ+6Ee5KDo8TBPY58dKWPEDxkvvI2
x/JqAFpDAtnE81iK3uewawcdAdGkMYlg3Ak41vFsbfprI6JwKfdUFvLE1LWg2mpUcdXlb6sETWth
fts4m91Bz4HuEW10sC8590IzJ+FFj6DVadE9Hm9NOyAYEUglhkpbC9nlcslt/UAD8rIkpdZ38r3k
cQXfmo+TjiYJBGo=
`protect end_protected
| bsd-2-clause | 5be9ca2b50cc5e619ebc900d0cfe73f4 | 0.943084 | 1.835015 | false | false | false | false |
sergeykhbr/riscv_vhdl | vhdl/rtl/prj/ml605_gnss/config_v6.vhd | 1 | 2,739 | --!
--! Copyright 2018 Sergey Khabarov, [email protected]
--!
--! Licensed under the Apache License, Version 2.0 (the "License");
--! you may not use this file except in compliance with the License.
--! You may obtain a copy of the License at
--!
--! http://www.apache.org/licenses/LICENSE-2.0
--!
--! Unless required by applicable law or agreed to in writing, software
--! distributed under the License is distributed on an "AS IS" BASIS,
--! WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
--! See the License for the specific language governing permissions and
--! limitations under the License.
--!
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
library techmap;
use techmap.gencomp.all;
package config_target is
-- Technology and synthesis options
constant CFG_FABTECH : integer := virtex6;
constant CFG_MEMTECH : integer := virtex6;
constant CFG_PADTECH : integer := virtex6;
constant CFG_JTAGTECH : integer := virtex6;
constant CFG_ASYNC_RESET : boolean := false;
constant CFG_TOPDIR : string := "../../../";
--! @brief Number of processors in a system
--! @details This value may be in a range 1 to CFG_TOTAL_CPU_MAX-1
constant CFG_CPU_NUM : integer := 1;
--! @brief HEX-image for the initialization of the Boot ROM.
--! @details This file is used by \e inferred ROM implementation.
constant CFG_SIM_BOOTROM_HEX : string :=
CFG_TOPDIR & "examples/boot/linuxbuild/bin/bootimage.hex";
-- CFG_TOPDIR & "examples/bootrom_tests/linuxbuild/bin/bootrom_tests.hex";
--! @brief HEX-image for the initialization of the FwImage ROM.
--! @details This file is used by \e inferred ROM implementation.
constant CFG_SIM_FWIMAGE_HEX : string :=
-- CFG_TOPDIR & "examples/zephyr/gcc711/zephyr.hex";
CFG_TOPDIR & "examples/gnss_fw/makefiles/bin/gnssfw.hex";
--! @brief Hardware SoC Identificator.
--!
--! @details Read Only unique platform identificator that could be
--! read by firmware from the Plug'n'Play support module.
constant CFG_HW_ID : std_logic_vector(31 downto 0) := X"20191125";
--! @brief Enabling Ethernet MAC interface.
--! @details By default MAC module enables support of the debug feature EDCL.
constant CFG_ETHERNET_ENABLE : boolean := true;
--! @brief Enable/Disable Debug Unit
constant CFG_DSU_ENABLE : boolean := true;
--! External Flash IC connected via SPI
constant CFG_EXT_FLASH_ENA : boolean := false;
--! GNSS sub-system
constant CFG_GNSS_SS_ENA : boolean := true;
--! OTP 8 KB memory bank
constant CFG_OTP8KB_ENA : boolean := false;
--! Coherent bridge with L2-cache
constant CFG_L2CACHE_ENA : boolean := false;
end;
| apache-2.0 | 1dbd95850b65a6a9ed9a9dc8d7e76ab1 | 0.686017 | 3.879603 | false | false | false | false |
sergeykhbr/riscv_vhdl | vhdl/rtl/riverlib/river_workgroup.vhd | 1 | 3,731 | --!
--! Copyright 2020 Sergey Khabarov, [email protected]
--!
--! Licensed under the Apache License, Version 2.0 (the "License");
--! you may not use this file except in compliance with the License.
--! You may obtain a copy of the License at
--!
--! http://www.apache.org/licenses/LICENSE-2.0
--!
--! Unless required by applicable law or agreed to in writing, software
--! distributed under the License is distributed on an "AS IS" BASIS,
--! WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
--! See the License for the specific language governing permissions and
--! limitations under the License.
--!
--! @brief Group of "River" CPUs with L2-cache.
------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
library commonlib;
use commonlib.types_common.all;
--! AMBA system bus specific library.
library ambalib;
--! AXI4 configuration constants.
use ambalib.types_amba4.all;
--! RIVER CPU specific library.
library riverlib;
--! RIVER CPU configuration constants.
use riverlib.river_cfg.all;
--! River top level with AMBA interface module declaration
use riverlib.types_river.all;
entity river_workgroup is
generic (
cpunum : integer;
memtech : integer;
async_reset : boolean;
fpu_ena : boolean;
coherence_ena : boolean;
tracer_ena : boolean
);
port (
i_nrst : in std_logic;
i_clk : in std_logic;
i_msti : in axi4_master_in_type;
o_msto : out axi4_master_out_type;
o_mstcfg : out axi4_master_config_type;
i_dport : in dport_in_vector;
o_dport : out dport_out_vector;
i_ext_irq : in std_logic_vector(CFG_TOTAL_CPU_MAX-1 downto 0)
);
end;
architecture arch_river_workgroup of river_workgroup is
constant xconfig : axi4_master_config_type := (
descrsize => PNP_CFG_MASTER_DESCR_BYTES,
descrtype => PNP_CFG_TYPE_MASTER,
vid => VENDOR_GNSSSENSOR,
did => RISCV_RIVER_WORKGROUP
);
signal corei : axi4_l1_in_vector;
signal coreo : axi4_l1_out_vector;
signal l2i : axi4_l2_in_type;
signal l2o : axi4_l2_out_type;
begin
o_mstcfg <= xconfig;
--! @brief RISC-V Processor core River.
cpuslotx : for n in 0 to CFG_TOTAL_CPU_MAX-1 generate
cpux : if n < cpunum generate
river0 : river_amba generic map (
memtech => memtech,
hartid => n,
async_reset => async_reset,
fpu_ena => fpu_ena,
coherence_ena => coherence_ena,
tracer_ena => tracer_ena
) port map (
i_nrst => i_nrst,
i_clk => i_clk,
i_msti => corei(n),
o_msto => coreo(n),
i_dport => i_dport(n),
o_dport => o_dport(n),
i_ext_irq => i_ext_irq(n)
);
end generate;
emptyx : if n >= cpunum generate
cpudummy0 : river_dummycpu port map (
o_msto => coreo(n),
o_dport => o_dport(n),
o_flush_l2 => open
);
end generate;
end generate;
l2_ena : if coherence_ena generate
-- TODO: see Wasserfall implementation
end generate;
l2_dis : if not coherence_ena generate
l2dummy0 : RiverL2Dummy generic map (
async_reset => async_reset
) port map (
i_clk => i_clk,
i_nrst => i_nrst,
i_l1o => coreo,
o_l1i => corei,
i_l2i => l2i,
o_l2o => l2o,
i_flush_valid => '0'
);
end generate;
l2serdes0 : river_l2serdes generic map (
async_reset => async_reset
) port map (
i_nrst => i_nrst,
i_clk => i_clk,
i_l2o => l2o,
o_l2i => l2i,
i_msti => i_msti,
o_msto => o_msto
);
end;
| apache-2.0 | cc8080d047f679d25a02849ba39262de | 0.589118 | 3.346188 | false | false | false | false |
Bjay1435/capstone | Geoff/Geoff.srcs/sources_1/bd/dma_loopback/ipshared/xilinx.com/axi_sg_v4_1/hdl/src/vhdl/axi_sg_updt_q_mngr.vhd | 1 | 39,579 | -- *************************************************************************
--
-- (c) Copyright 2010-2011 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
--
-- *************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: axi_sg_updt_q_mngr.vhd
-- Description: This entity is the descriptor update queue manager
--
-- VHDL-Standard: VHDL'93
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use ieee.std_logic_misc.all;
library axi_sg_v4_1_3;
use axi_sg_v4_1_3.axi_sg_pkg.all;
library lib_pkg_v1_0_2;
use lib_pkg_v1_0_2.lib_pkg.all;
-------------------------------------------------------------------------------
entity axi_sg_updt_q_mngr is
generic (
C_M_AXI_SG_ADDR_WIDTH : integer range 32 to 64 := 32;
-- Master AXI Memory Map Address Width for Scatter Gather R/W Port
C_M_AXI_SG_DATA_WIDTH : integer range 32 to 32 := 32;
-- Master AXI Memory Map Data Width for Scatter Gather R/W Port
C_S_AXIS_UPDPTR_TDATA_WIDTH : integer range 32 to 32 := 32;
-- 32 Update Status Bits
C_S_AXIS_UPDSTS_TDATA_WIDTH : integer range 33 to 33 := 33;
-- 1 IOC bit + 32 Update Status Bits
C_SG_UPDT_DESC2QUEUE : integer range 0 to 8 := 0;
-- Number of descriptors to fetch and queue for each channel.
-- A value of zero excludes the fetch queues.
C_SG_CH1_WORDS_TO_UPDATE : integer range 1 to 16 := 8;
-- Number of words to update
C_SG_CH2_WORDS_TO_UPDATE : integer range 1 to 16 := 8;
-- Number of words to update
C_INCLUDE_CH1 : integer range 0 to 1 := 1;
-- Include or Exclude channel 1 scatter gather engine
-- 0 = Exclude Channel 1 SG Engine
-- 1 = Include Channel 1 SG Engine
C_INCLUDE_CH2 : integer range 0 to 1 := 1;
-- Include or Exclude channel 2 scatter gather engine
-- 0 = Exclude Channel 2 SG Engine
-- 1 = Include Channel 2 SG Engine
C_AXIS_IS_ASYNC : integer range 0 to 1 := 0;
-- Channel 1 is async to sg_aclk
-- 0 = Synchronous to SG ACLK
-- 1 = Asynchronous to SG ACLK
C_FAMILY : string := "virtex7"
-- Device family used for proper BRAM selection
);
port (
-----------------------------------------------------------------------
-- AXI Scatter Gather Interface
-----------------------------------------------------------------------
m_axi_sg_aclk : in std_logic ; --
m_axi_sg_aresetn : in std_logic ; --
--
--***********************************-- --
--** Channel 1 Control **-- --
--***********************************-- --
ch1_updt_curdesc_wren : out std_logic ; --
ch1_updt_curdesc : out std_logic_vector --
(C_M_AXI_SG_ADDR_WIDTH-1 downto 0) ; --
ch1_updt_active : in std_logic ; --
ch1_updt_queue_empty : out std_logic ; --
ch1_updt_ioc : out std_logic ; --
ch1_updt_ioc_irq_set : in std_logic ; --
--
ch1_dma_interr : out std_logic ; --
ch1_dma_slverr : out std_logic ; --
ch1_dma_decerr : out std_logic ; --
ch1_dma_interr_set : in std_logic ; --
ch1_dma_slverr_set : in std_logic ; --
ch1_dma_decerr_set : in std_logic ; --
--
--***********************************-- --
--** Channel 2 Control **-- --
--***********************************-- --
ch2_updt_active : in std_logic ; --
-- ch2_updt_curdesc_wren : out std_logic ; --
-- ch2_updt_curdesc : out std_logic_vector --
-- (C_M_AXI_SG_ADDR_WIDTH-1 downto 0) ; --
ch2_updt_queue_empty : out std_logic ; --
ch2_updt_ioc : out std_logic ; --
ch2_updt_ioc_irq_set : in std_logic ; --
--
ch2_dma_interr : out std_logic ; --
ch2_dma_slverr : out std_logic ; --
ch2_dma_decerr : out std_logic ; --
ch2_dma_interr_set : in std_logic ; --
ch2_dma_slverr_set : in std_logic ; --
ch2_dma_decerr_set : in std_logic ; --
--
--***********************************-- --
--** Channel 1 Update Interface In **-- --
--***********************************-- --
s_axis_ch1_updt_aclk : in std_logic ; --
-- Update Pointer Stream --
s_axis_ch1_updtptr_tdata : in std_logic_vector --
(C_M_AXI_SG_ADDR_WIDTH-1 downto 0); --
s_axis_ch1_updtptr_tvalid : in std_logic ; --
s_axis_ch1_updtptr_tready : out std_logic ; --
s_axis_ch1_updtptr_tlast : in std_logic ; --
--
-- Update Status Stream --
s_axis_ch1_updtsts_tdata : in std_logic_vector --
(C_S_AXIS_UPDSTS_TDATA_WIDTH-1 downto 0); --
s_axis_ch1_updtsts_tvalid : in std_logic ; --
s_axis_ch1_updtsts_tready : out std_logic ; --
s_axis_ch1_updtsts_tlast : in std_logic ; --
--
--***********************************-- --
--** Channel 2 Update Interface In **-- --
--***********************************-- --
s_axis_ch2_updt_aclk : in std_logic ; --
-- Update Pointer Stream --
s_axis_ch2_updtptr_tdata : in std_logic_vector --
(C_M_AXI_SG_ADDR_WIDTH-1 downto 0); --
s_axis_ch2_updtptr_tvalid : in std_logic ; --
s_axis_ch2_updtptr_tready : out std_logic ; --
s_axis_ch2_updtptr_tlast : in std_logic ; --
--
-- Update Status Stream --
s_axis_ch2_updtsts_tdata : in std_logic_vector --
(C_S_AXIS_UPDSTS_TDATA_WIDTH-1 downto 0); --
s_axis_ch2_updtsts_tvalid : in std_logic ; --
s_axis_ch2_updtsts_tready : out std_logic ; --
s_axis_ch2_updtsts_tlast : in std_logic ; --
--
--***************************************-- --
--** Update Interface to AXI DataMover **-- --
--***************************************-- --
-- S2MM Stream Out To DataMover --
s_axis_s2mm_tdata : out std_logic_vector --
(C_M_AXI_SG_DATA_WIDTH-1 downto 0) ; --
s_axis_s2mm_tlast : out std_logic ; --
s_axis_s2mm_tvalid : out std_logic ; --
s_axis_s2mm_tready : in std_logic --
);
end axi_sg_updt_q_mngr;
-------------------------------------------------------------------------------
-- Architecture
-------------------------------------------------------------------------------
architecture implementation of axi_sg_updt_q_mngr is
attribute DowngradeIPIdentifiedWarnings: string;
attribute DowngradeIPIdentifiedWarnings of implementation : architecture is "yes";
-------------------------------------------------------------------------------
-- Functions
-------------------------------------------------------------------------------
-- No Functions Declared
-------------------------------------------------------------------------------
-- Constants Declarations
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Signal / Type Declarations
-------------------------------------------------------------------------------
signal m_axis_ch1_updt_tdata : std_logic_vector(C_M_AXI_SG_DATA_WIDTH-1 downto 0) := (others => '0');
signal m_axis_ch1_updt_tlast : std_logic := '0';
signal m_axis_ch1_updt_tvalid : std_logic := '0';
signal m_axis_ch1_updt_tready : std_logic := '0';
signal m_axis_ch2_updt_tdata : std_logic_vector(C_M_AXI_SG_DATA_WIDTH-1 downto 0) := (others => '0');
signal m_axis_ch2_updt_tlast : std_logic := '0';
signal m_axis_ch2_updt_tvalid : std_logic := '0';
signal m_axis_ch2_updt_tready : std_logic := '0';
-------------------------------------------------------------------------------
-- Begin architecture logic
-------------------------------------------------------------------------------
begin
--*****************************************************************************
--** CHANNEL 1 **
--*****************************************************************************
-------------------------------------------------------------------------------
-- If Channel 1 is enabled then instantiate descriptor update logic.
-------------------------------------------------------------------------------
-- If Descriptor Update queueing enabled then instantiate Queue Logic
GEN_QUEUE : if C_SG_UPDT_DESC2QUEUE /= 0 generate
begin
-------------------------------------------------------------------------------
I_UPDT_DESC_QUEUE : entity axi_sg_v4_1_3.axi_sg_updt_queue
generic map(
C_M_AXI_SG_ADDR_WIDTH => C_M_AXI_SG_ADDR_WIDTH ,
C_M_AXIS_UPDT_DATA_WIDTH => C_M_AXI_SG_DATA_WIDTH ,
C_S_AXIS_UPDPTR_TDATA_WIDTH => C_S_AXIS_UPDPTR_TDATA_WIDTH ,
C_S_AXIS_UPDSTS_TDATA_WIDTH => C_S_AXIS_UPDSTS_TDATA_WIDTH ,
C_SG_UPDT_DESC2QUEUE => C_SG_UPDT_DESC2QUEUE ,
C_SG_WORDS_TO_UPDATE => C_SG_CH1_WORDS_TO_UPDATE ,
C_SG2_WORDS_TO_UPDATE => C_SG_CH2_WORDS_TO_UPDATE ,
C_AXIS_IS_ASYNC => C_AXIS_IS_ASYNC ,
C_INCLUDE_MM2S => C_INCLUDE_CH1 ,
C_INCLUDE_S2MM => C_INCLUDE_CH2 ,
C_FAMILY => C_FAMILY
)
port map(
-----------------------------------------------------------------------
-- AXI Scatter Gather Interface
-----------------------------------------------------------------------
m_axi_sg_aclk => m_axi_sg_aclk ,
m_axi_sg_aresetn => m_axi_sg_aresetn ,
s_axis_updt_aclk => s_axis_ch1_updt_aclk ,
--********************************--
--** Control and Status **--
--********************************--
updt_curdesc_wren => ch1_updt_curdesc_wren ,
updt_curdesc => ch1_updt_curdesc ,
updt_active => ch1_updt_active ,
updt_queue_empty => ch1_updt_queue_empty ,
updt_ioc => ch1_updt_ioc ,
updt_ioc_irq_set => ch1_updt_ioc_irq_set ,
dma_interr => ch1_dma_interr ,
dma_slverr => ch1_dma_slverr ,
dma_decerr => ch1_dma_decerr ,
dma_interr_set => ch1_dma_interr_set ,
dma_slverr_set => ch1_dma_slverr_set ,
dma_decerr_set => ch1_dma_decerr_set ,
-- updt2_curdesc_wren => ch2_updt_curdesc_wren ,
-- updt2_curdesc => ch2_updt_curdesc ,
updt2_active => ch2_updt_active ,
updt2_queue_empty => ch2_updt_queue_empty ,
updt2_ioc => ch2_updt_ioc ,
updt2_ioc_irq_set => ch2_updt_ioc_irq_set ,
dma2_interr => ch2_dma_interr ,
dma2_slverr => ch2_dma_slverr ,
dma2_decerr => ch2_dma_decerr ,
dma2_interr_set => ch2_dma_interr_set ,
dma2_slverr_set => ch2_dma_slverr_set ,
dma2_decerr_set => ch2_dma_decerr_set ,
--********************************--
--** Update Interfaces In **--
--********************************--
-- Update Pointer Stream
s_axis_updtptr_tdata => s_axis_ch1_updtptr_tdata ,
s_axis_updtptr_tvalid => s_axis_ch1_updtptr_tvalid ,
s_axis_updtptr_tready => s_axis_ch1_updtptr_tready ,
s_axis_updtptr_tlast => s_axis_ch1_updtptr_tlast ,
-- Update Status Stream
s_axis_updtsts_tdata => s_axis_ch1_updtsts_tdata ,
s_axis_updtsts_tvalid => s_axis_ch1_updtsts_tvalid ,
s_axis_updtsts_tready => s_axis_ch1_updtsts_tready ,
s_axis_updtsts_tlast => s_axis_ch1_updtsts_tlast ,
-- Update Pointer Stream
s_axis2_updtptr_tdata => s_axis_ch2_updtptr_tdata ,
s_axis2_updtptr_tvalid => s_axis_ch2_updtptr_tvalid ,
s_axis2_updtptr_tready => s_axis_ch2_updtptr_tready ,
s_axis2_updtptr_tlast => s_axis_ch2_updtptr_tlast ,
-- Update Status Stream
s_axis2_updtsts_tdata => s_axis_ch2_updtsts_tdata ,
s_axis2_updtsts_tvalid => s_axis_ch2_updtsts_tvalid ,
s_axis2_updtsts_tready => s_axis_ch2_updtsts_tready ,
s_axis2_updtsts_tlast => s_axis_ch2_updtsts_tlast ,
--********************************--
--** Update Interfaces Out **--
--********************************--
-- S2MM Stream Out To DataMover
m_axis_updt_tdata => s_axis_s2mm_tdata, --m_axis_ch1_updt_tdata ,
m_axis_updt_tlast => s_axis_s2mm_tlast, --m_axis_ch1_updt_tlast ,
m_axis_updt_tvalid => s_axis_s2mm_tvalid, --m_axis_ch1_updt_tvalid ,
m_axis_updt_tready => s_axis_s2mm_tready --m_axis_ch1_updt_tready ,
-- m_axis2_updt_tdata => m_axis_ch2_updt_tdata ,
-- m_axis2_updt_tlast => m_axis_ch2_updt_tlast ,
-- m_axis2_updt_tvalid => m_axis_ch2_updt_tvalid ,
-- m_axis2_updt_tready => m_axis_ch2_updt_tready
);
end generate GEN_QUEUE;
--*****************************************************************************
--** CHANNEL 1 - NO DESCRIPTOR QUEUE **
--*****************************************************************************
-- No update queue enabled, therefore map internal stream logic
-- directly to channel port.
GEN_NO_QUEUE : if C_SG_UPDT_DESC2QUEUE = 0 generate
begin
I_NO_UPDT_DESC_QUEUE : entity axi_sg_v4_1_3.axi_sg_updt_noqueue
generic map(
C_M_AXI_SG_ADDR_WIDTH => C_M_AXI_SG_ADDR_WIDTH ,
C_M_AXIS_UPDT_DATA_WIDTH => C_M_AXI_SG_DATA_WIDTH ,
C_S_AXIS_UPDPTR_TDATA_WIDTH => C_S_AXIS_UPDPTR_TDATA_WIDTH ,
C_S_AXIS_UPDSTS_TDATA_WIDTH => C_S_AXIS_UPDSTS_TDATA_WIDTH
)
port map(
-----------------------------------------------------------------------
-- AXI Scatter Gather Interface
-----------------------------------------------------------------------
m_axi_sg_aclk => m_axi_sg_aclk ,
m_axi_sg_aresetn => m_axi_sg_aresetn ,
--********************************--
--** Control and Status **--
--********************************--
updt_curdesc_wren => ch1_updt_curdesc_wren ,
updt_curdesc => ch1_updt_curdesc ,
updt_active => ch1_updt_active ,
updt_queue_empty => ch1_updt_queue_empty ,
updt_ioc => ch1_updt_ioc ,
updt_ioc_irq_set => ch1_updt_ioc_irq_set ,
dma_interr => ch1_dma_interr ,
dma_slverr => ch1_dma_slverr ,
dma_decerr => ch1_dma_decerr ,
dma_interr_set => ch1_dma_interr_set ,
dma_slverr_set => ch1_dma_slverr_set ,
dma_decerr_set => ch1_dma_decerr_set ,
updt2_active => ch2_updt_active ,
updt2_queue_empty => ch2_updt_queue_empty ,
updt2_ioc => ch2_updt_ioc ,
updt2_ioc_irq_set => ch2_updt_ioc_irq_set ,
dma2_interr => ch2_dma_interr ,
dma2_slverr => ch2_dma_slverr ,
dma2_decerr => ch2_dma_decerr ,
dma2_interr_set => ch2_dma_interr_set ,
dma2_slverr_set => ch2_dma_slverr_set ,
dma2_decerr_set => ch2_dma_decerr_set ,
--********************************--
--** Update Interfaces In **--
--********************************--
-- Update Pointer Stream
s_axis_updtptr_tdata => s_axis_ch1_updtptr_tdata ,
s_axis_updtptr_tvalid => s_axis_ch1_updtptr_tvalid ,
s_axis_updtptr_tready => s_axis_ch1_updtptr_tready ,
s_axis_updtptr_tlast => s_axis_ch1_updtptr_tlast ,
-- Update Status Stream
s_axis_updtsts_tdata => s_axis_ch1_updtsts_tdata ,
s_axis_updtsts_tvalid => s_axis_ch1_updtsts_tvalid ,
s_axis_updtsts_tready => s_axis_ch1_updtsts_tready ,
s_axis_updtsts_tlast => s_axis_ch1_updtsts_tlast ,
-- Update Pointer Stream
s_axis2_updtptr_tdata => s_axis_ch2_updtptr_tdata ,
s_axis2_updtptr_tvalid => s_axis_ch2_updtptr_tvalid ,
s_axis2_updtptr_tready => s_axis_ch2_updtptr_tready ,
s_axis2_updtptr_tlast => s_axis_ch2_updtptr_tlast ,
-- Update Status Stream
s_axis2_updtsts_tdata => s_axis_ch2_updtsts_tdata ,
s_axis2_updtsts_tvalid => s_axis_ch2_updtsts_tvalid ,
s_axis2_updtsts_tready => s_axis_ch2_updtsts_tready ,
s_axis2_updtsts_tlast => s_axis_ch2_updtsts_tlast ,
--********************************--
--** Update Interfaces Out **--
--********************************--
-- S2MM Stream Out To DataMover
m_axis_updt_tdata => s_axis_s2mm_tdata, --m_axis_ch1_updt_tdata ,
m_axis_updt_tlast => s_axis_s2mm_tlast, --m_axis_ch1_updt_tlast ,
m_axis_updt_tvalid => s_axis_s2mm_tvalid, --m_axis_ch1_updt_tvalid ,
m_axis_updt_tready => s_axis_s2mm_tready --m_axis_ch1_updt_tready ,
-- m_axis_updt_tdata => m_axis_ch1_updt_tdata ,
-- m_axis_updt_tlast => m_axis_ch1_updt_tlast ,
-- m_axis_updt_tvalid => m_axis_ch1_updt_tvalid ,
-- m_axis_updt_tready => m_axis_ch1_updt_tready ,
-- S2MM Stream Out To DataMover
-- m_axis2_updt_tdata => m_axis_ch2_updt_tdata ,
-- m_axis2_updt_tlast => m_axis_ch2_updt_tlast ,
-- m_axis2_updt_tvalid => m_axis_ch2_updt_tvalid ,
-- m_axis2_updt_tready => m_axis_ch2_updt_tready
);
end generate GEN_NO_QUEUE;
-- Channel 1 NOT included therefore tie ch1 outputs off
--GEN_NO_CH1_UPDATE_Q_IF : if C_INCLUDE_CH1 = 0 generate
--begin
-- ch1_updt_curdesc_wren <= '0';
-- ch1_updt_curdesc <= (others => '0');
-- ch1_updt_queue_empty <= '1';
-- ch1_updt_ioc <= '0';
-- ch1_dma_interr <= '0';
-- ch1_dma_slverr <= '0';
-- ch1_dma_decerr <= '0';
-- m_axis_ch1_updt_tdata <= (others => '0');
-- m_axis_ch1_updt_tlast <= '0';
-- m_axis_ch1_updt_tvalid <= '0';
-- s_axis_ch1_updtptr_tready <= '0';
-- s_axis_ch1_updtsts_tready <= '0';
--end generate GEN_NO_CH1_UPDATE_Q_IF;
--*****************************************************************************
--** CHANNEL 2 **
--*****************************************************************************
-------------------------------------------------------------------------------
-- If Channel 2 is enabled then instantiate descriptor update logic.
-------------------------------------------------------------------------------
--GEN_CH2_UPDATE_Q_IF : if C_INCLUDE_CH2 = 1 generate
--
--begin
--
-- --*************************************************************************
-- --** CHANNEL 2 - DESCRIPTOR QUEUE **
-- --*************************************************************************
-- -- If Descriptor Update queueing enabled then instantiate Queue Logic
-- GEN_CH2_QUEUE : if C_SG_UPDT_DESC2QUEUE /= 0 generate
-- begin
-- ---------------------------------------------------------------------------
-- I_CH2_UPDT_DESC_QUEUE : entity axi_sg_v4_1_3.axi_sg_updt_queue
-- generic map(
-- C_M_AXI_SG_ADDR_WIDTH => C_M_AXI_SG_ADDR_WIDTH ,
-- C_M_AXIS_UPDT_DATA_WIDTH => C_M_AXI_SG_DATA_WIDTH ,
-- C_S_AXIS_UPDPTR_TDATA_WIDTH => C_S_AXIS_UPDPTR_TDATA_WIDTH ,
-- C_S_AXIS_UPDSTS_TDATA_WIDTH => C_S_AXIS_UPDSTS_TDATA_WIDTH ,
-- C_SG_UPDT_DESC2QUEUE => C_SG_UPDT_DESC2QUEUE ,
-- C_SG_WORDS_TO_UPDATE => C_SG_CH2_WORDS_TO_UPDATE ,
-- C_FAMILY => C_FAMILY
-- )
-- port map(
-- ---------------------------------------------------------------
-- -- AXI Scatter Gather Interface
-- ---------------------------------------------------------------
-- m_axi_sg_aclk => m_axi_sg_aclk ,
-- m_axi_sg_aresetn => m_axi_sg_aresetn ,
-- s_axis_updt_aclk => s_axis_ch2_updt_aclk ,
--
-- --********************************--
-- --** Control and Status **--
-- --********************************--
-- updt_curdesc_wren => ch2_updt_curdesc_wren ,
-- updt_curdesc => ch2_updt_curdesc ,
-- updt_active => ch2_updt_active ,
-- updt_queue_empty => ch2_updt_queue_empty ,
-- updt_ioc => ch2_updt_ioc ,
-- updt_ioc_irq_set => ch2_updt_ioc_irq_set ,
--
-- dma_interr => ch2_dma_interr ,
-- dma_slverr => ch2_dma_slverr ,
-- dma_decerr => ch2_dma_decerr ,
-- dma_interr_set => ch2_dma_interr_set ,
-- dma_slverr_set => ch2_dma_slverr_set ,
-- dma_decerr_set => ch2_dma_decerr_set ,
--
-- --********************************--
-- --** Update Interfaces In **--
-- --********************************--
-- -- Update Pointer Stream
-- s_axis_updtptr_tdata => s_axis_ch2_updtptr_tdata ,
-- s_axis_updtptr_tvalid => s_axis_ch2_updtptr_tvalid ,
-- s_axis_updtptr_tready => s_axis_ch2_updtptr_tready ,
-- s_axis_updtptr_tlast => s_axis_ch2_updtptr_tlast ,
--
-- -- Update Status Stream
-- s_axis_updtsts_tdata => s_axis_ch2_updtsts_tdata ,
-- s_axis_updtsts_tvalid => s_axis_ch2_updtsts_tvalid ,
-- s_axis_updtsts_tready => s_axis_ch2_updtsts_tready ,
-- s_axis_updtsts_tlast => s_axis_ch2_updtsts_tlast ,
--
-- --********************************--
-- --** Update Interfaces Out **--
-- --********************************--
-- -- S2MM Stream Out To DataMover
-- m_axis_updt_tdata => m_axis_ch2_updt_tdata ,
-- m_axis_updt_tlast => m_axis_ch2_updt_tlast ,
-- m_axis_updt_tvalid => m_axis_ch2_updt_tvalid ,
-- m_axis_updt_tready => m_axis_ch2_updt_tready
-- );
--
-- end generate GEN_CH2_QUEUE;
--
--
-- --*****************************************************************************
-- --** CHANNEL 2 - NO DESCRIPTOR QUEUE **
-- --*****************************************************************************
--
-- -- No update queue enabled, therefore map internal stream logic
-- -- directly to channel port.
-- GEN_CH2_NO_QUEUE : if C_SG_UPDT_DESC2QUEUE = 0 generate
-- I_NO_CH2_UPDT_DESC_QUEUE : entity axi_sg_v4_1_3.axi_sg_updt_noqueue
-- generic map(
-- C_M_AXI_SG_ADDR_WIDTH => C_M_AXI_SG_ADDR_WIDTH ,
-- C_M_AXIS_UPDT_DATA_WIDTH => C_M_AXI_SG_DATA_WIDTH ,
-- C_S_AXIS_UPDPTR_TDATA_WIDTH => C_S_AXIS_UPDPTR_TDATA_WIDTH ,
-- C_S_AXIS_UPDSTS_TDATA_WIDTH => C_S_AXIS_UPDSTS_TDATA_WIDTH
-- )
-- port map(
-- ---------------------------------------------------------------
-- -- AXI Scatter Gather Interface
-- ---------------------------------------------------------------
-- m_axi_sg_aclk => m_axi_sg_aclk ,
-- m_axi_sg_aresetn => m_axi_sg_aresetn ,
--
-- --********************************--
-- --** Control and Status **--
-- --********************************--
-- updt_curdesc_wren => ch2_updt_curdesc_wren ,
-- updt_curdesc => ch2_updt_curdesc ,
-- updt_active => ch2_updt_active ,
-- updt_queue_empty => ch2_updt_queue_empty ,
-- updt_ioc => ch2_updt_ioc ,
-- updt_ioc_irq_set => ch2_updt_ioc_irq_set ,
--
-- dma_interr => ch2_dma_interr ,
-- dma_slverr => ch2_dma_slverr ,
-- dma_decerr => ch2_dma_decerr ,
-- dma_interr_set => ch2_dma_interr_set ,
-- dma_slverr_set => ch2_dma_slverr_set ,
-- dma_decerr_set => ch2_dma_decerr_set ,
--
-- --********************************--
-- --** Update Interfaces In **--
-- --********************************--
-- -- Update Pointer Stream
-- s_axis_updtptr_tdata => s_axis_ch2_updtptr_tdata ,
-- s_axis_updtptr_tvalid => s_axis_ch2_updtptr_tvalid ,
-- s_axis_updtptr_tready => s_axis_ch2_updtptr_tready ,
-- s_axis_updtptr_tlast => s_axis_ch2_updtptr_tlast ,
--
-- -- Update Status Stream
-- s_axis_updtsts_tdata => s_axis_ch2_updtsts_tdata ,
-- s_axis_updtsts_tvalid => s_axis_ch2_updtsts_tvalid ,
-- s_axis_updtsts_tready => s_axis_ch2_updtsts_tready ,
-- s_axis_updtsts_tlast => s_axis_ch2_updtsts_tlast ,
--
-- --********************************--
-- --** Update Interfaces Out **--
-- --********************************--
-- -- S2MM Stream Out To DataMover
-- m_axis_updt_tdata => m_axis_ch2_updt_tdata ,
-- m_axis_updt_tlast => m_axis_ch2_updt_tlast ,
-- m_axis_updt_tvalid => m_axis_ch2_updt_tvalid ,
-- m_axis_updt_tready => m_axis_ch2_updt_tready
-- );
--
-- end generate GEN_CH2_NO_QUEUE;
--
--end generate GEN_CH2_UPDATE_Q_IF;
--
---- Channel 2 NOT included therefore tie ch2 outputs off
--GEN_NO_CH2_UPDATE_Q_IF : if C_INCLUDE_CH2 = 0 generate
--begin
-- ch2_updt_curdesc_wren <= '0';
-- ch2_updt_curdesc <= (others => '0');
-- ch2_updt_queue_empty <= '1';
--
-- ch2_updt_ioc <= '0';
-- ch2_dma_interr <= '0';
-- ch2_dma_slverr <= '0';
-- ch2_dma_decerr <= '0';
--
-- m_axis_ch2_updt_tdata <= (others => '0');
-- m_axis_ch2_updt_tlast <= '0';
-- m_axis_ch2_updt_tvalid <= '0';
--
-- s_axis_ch2_updtptr_tready <= '0';
-- s_axis_ch2_updtsts_tready <= '0';
--
--end generate GEN_NO_CH2_UPDATE_Q_IF;
-------------------------------------------------------------------------------
-- MUX For DataMover
-------------------------------------------------------------------------------
--TO_DATAMVR_MUX : process(ch1_updt_active,
-- ch2_updt_active,
-- m_axis_ch1_updt_tdata,
-- m_axis_ch1_updt_tlast,
-- m_axis_ch1_updt_tvalid,
-- m_axis_ch2_updt_tdata,
-- m_axis_ch2_updt_tlast,
-- m_axis_ch2_updt_tvalid)
-- begin
-- if(ch1_updt_active = '1')then
-- s_axis_s2mm_tdata <= m_axis_ch1_updt_tdata;
-- s_axis_s2mm_tlast <= m_axis_ch1_updt_tlast;
-- s_axis_s2mm_tvalid <= m_axis_ch1_updt_tvalid;
-- elsif(ch2_updt_active = '1')then
-- s_axis_s2mm_tdata <= m_axis_ch2_updt_tdata;
-- s_axis_s2mm_tlast <= m_axis_ch2_updt_tlast;
-- s_axis_s2mm_tvalid <= m_axis_ch2_updt_tvalid;
-- else
-- s_axis_s2mm_tdata <= (others => '0');
-- s_axis_s2mm_tlast <= '0';
-- s_axis_s2mm_tvalid <= '0';
-- end if;
-- end process TO_DATAMVR_MUX;
--
--m_axis_ch1_updt_tready <= s_axis_s2mm_tready;
--m_axis_ch2_updt_tready <= s_axis_s2mm_tready;
--
end implementation;
| mit | d46a358452b18a0b470d7a6796b4e1fc | 0.352055 | 4.661837 | false | false | false | false |
szanni/aeshw | aes-core/encryption_module.vhd | 1 | 2,157 | ----------------------------------------------------------------------------------
-- Company:
-- Engineer:
--
-- Create Date: 23:04:20 07/16/2014
-- Design Name:
-- Module Name: encryption_module - Behavioral
-- Project Name:
-- Target Devices:
-- Tool versions:
-- Description:
--
-- Dependencies:
--
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
--
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use work.types.all;
-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--use IEEE.NUMERIC_STD.ALL;
-- Uncomment the following library declaration if instantiating
-- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;
entity encryption_module is
port(
clk : in std_logic;
reset : in std_logic;
enc_start : in std_logic;
enc_end : out std_logic;
din : in state;
dout : out state;
addr_rkey : out std_logic_vector (3 downto 0);
rkey_in : in state
);
end encryption_module;
architecture Behavioral of encryption_module is
signal x_last_round : std_logic;
signal y_1_2, y_3_4 : std_logic_vector (1 downto 0);
signal addr_rkey_tmp : byte;
begin
control_unit : entity work.cipher_cu port map (clk => clk,
reset => reset,
x_start => enc_start,
x_comp => x_last_round,
y_1_2 => y_1_2,
y_3_4 => y_3_4,
y_end => enc_end
);
cipher_unit : entity work.cipher port map (clk => clk,
reset => reset,
y => y_1_2,
din => din,
rkey_in => rkey_in,
dout => dout
);
counter : entity work.counter port map (clk => clk,
reset => reset,
y => y_3_4,
d_out => addr_rkey_tmp,
x => x_last_round
);
addr_rkey <= addr_rkey_tmp(3 downto 0);
end Behavioral;
| bsd-2-clause | 65bdd07f19d3dfdc00d5cdbdbf8fd5ba | 0.49745 | 3.631313 | false | false | false | false |
szanni/aeshw | zybo-base/zybo_bsd/zybo_bsd.srcs/sources_1/bd/system/ip/system_auto_pc_5/fifo_generator_v11_0/common/output_blk.vhd | 19 | 27,142 | `protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
CZom0vHERP+sM9B2H0IfoDUsJRy9riNTVWFr3BZpkrcd8N+2GrPBLGYjWv5bwWNFs2qiaRKQWIBH
5SL3Ros2Jw==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
RCliXKg9Iz0QVLqI8b9GfxxBU1GhNUODWipyNqGvNd7T9Syer0VoYCIXvffp6DiDgM+PWpXEJgNC
ZPrITDndrkqwjZ0UurJqd8Mlj+O4jokuol/hbGtnMKDg7LMTP/mcm9YRpJxuqv5WE2ZWUtD1WAlU
7OzpzsPnbliZhM0CcXY=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2013_09", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
Kq4rQuO4iRu44woH6WSrRyNcsAgSUJbnevjDngvc9cypuoYRq4je1NTd7KtIptAfdlUTFMhOQTcF
fyvMO0ctzr5YXTPO+6ZCPBMymjnbHRykXwGANIGORUKHiAy8zVrLHGA2Tn1n2komEaNoM+u8Q25L
d17PGNi2LYc1A9ZX79yuNo063Qy3QX5dSU2poXOWXHho+u/vL1PlOKA9tvs+dS7HzKYxYNEywyjD
k9FyesJcGgO1rBPy+iEmTMF3cKMWOg5VxnjbUI6qOTjL5ZYgIsb5KR7Wy+RP+kUhXE6TZP6qsxFC
3QU0aGkYLyynNyIHyyLl9cVQHtYz+x8w0KmAqA==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
3w3EGD6E+efCt4Fs6HRylWTDMnbDGksrBmK2LrIuuDQNpphsT/R3PC062rFGmzFuJg/bLf5Iafea
N+aHJBb97H7ueY9YF/kPUqJvkNizbPUPQpBP/2fJ5zOg61lddHncYUooATB8NAF2hcSBgU35x68X
0+ZIEJC/w3FOSQwJ1Hc=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
sL/FJO3bDIPRCCsg2DyY6eC+YEqAvN4pdWi2+bTJiJBIOsoCbIwvgrvycADXfLHet65F7sNM/rTn
YIBRQ62HHXK4AhEPCYJ16a+GWujel0mLrgVipEjZe/PIBzOTjqR8RXDwI8IW2xOJhTKtdJhHoHnZ
fRLpK84QgF3/ft41vG+L+M5INzunmmeduLlvL3yJO7PaDzNzZxm4Yb6qxrxT22OrC7GODv7eJYeF
/B+o0KrZLuu0VxgdWTSijA2jO6/yo3BIW6TSbvbn1C7fQYmUfGWF6ssH9kJPORZ7fLwb67UH+6Wy
MDlUpxP5xevODOWeiaWV5Hs+S3v9MGrU5a5myA==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 18352)
`protect data_block
daCdu+MlZ339oArubH/rkV9rXYGdQxRioT+a00NWda0nqcR/+85wdgLdROAvbuX1fi1/EaJTUT7w
3yMez7+vnMgFJVwqeEqR5ca+HoRV9KzPSkYgnk6EGn//6EFkQ1Bej3FBGgAPZBPG0z0WLBop15/6
ayx80Me4+FEJuzwvQtVIkgu9MFONXHxzLqhZIqnSQcK3gFhcsukGGMSDCoDlkKf5e9PPUJVqeNcf
CQoJj4/jd34/8ZgD8SF37srLXYRGyfcl73GzZ0ckivByI3cFbBeYKRO8+CwYoNdB5umeA53vbtIs
fq7RpHeYT65bZM79CDqrXUlELe/Tt1+aGKqoniGZX98dX7pbWqy6lDDFR+jegrXVGQ661ucDUquV
JaY/BOscTTZhyxcg/o95WRuLnDx5sKYSwNGVRyjX2liLkd5wHLSZ04R32fJ+C7800V2MGhb22rNX
SlEYvNz7Jlhucr+IP1JYJFDK3JDYo6fW9898cgNniQoqWl/+hbvSRAB5G25SAN80aUOv32lR9tMa
LjfiAG6esdVTmjG17BKa7xdVCJwq2C0EyjSrw8g4C8qPzimuViyCfvfMBMe0aOYc7v6Q6zFBaFQZ
TkB+Vp6CHlKB/6lRXr0DN/SbO0WKyvaIsXRrDi3EpYjZ8DZOYtXRhdoVOD3JJgLf8RmcXrkyoA4n
2vQ8XI0fyN0kp0I7Qlm31UCO5oeaCOdqNlTtWRkqjygJDw476gXfBME9ditsf5CH0v4i09xwy20P
TEXmjg2MpfFywp/+SZ35j3vv/g9f9kFJnVd+pE5NAjxmUCo6LIw+69hJzaTRhhjwMn+yfezPMndI
lmazB9ix/DfN8zjQZli2qsZUMG/w1Lc7uz2wuaUSP23mpvEHSNPgtxgKuPzGyW2xSDUOgA7nJFdx
ORIv0/26kOOabsp+xJJb+ifLDe4mqYZbwVQ2MgIezNQmh1zakb3dr51i4hTCHDWynpEL/eA4bTrF
pEQjrUkkf9LzsbbHwj9m+s51cfFaFTd+ErWAqGgQdN3bK5qxbqajRr7iFXRmniHVAoOz9ck6kgjZ
Jtn4g5vFXQLuxqH4q0OWS4MpR4wohffTc0yhkSVPwXDFJBigDGlRDW+crmTXpN/6XdzNSQcilI64
9Z/U6ogO48bBQuaMhGgLMQR4fMpJTz4+ihqeBcg8Cxtli+hz0hUMhvWYgv1KT9kcXuC1X1nJAeNg
fJ63kkgHWcLPrEZsqJ8DAfbVhf7PGpdujcg8AH4TWtcvsmpk60dV5ia2fhgIZWp2y24hr/ybdRfe
ArCb+5NQNLFG7J75apv5o/AoIGfKUM3H+tLO73tEbrjfKkjl2vqHZTiKDPR/1IZmcLeqYGbJ9inh
CC1KxBJLB0Ce0x/A6HNxZj/5PI5nwPNLWsOSJ6luv4hX/Kxur93BD1RorkP8DzUoEOli/HXDjlbD
GN6QDsXCzO0rE1CAya84vHeLKZ0o8wopL2C1jOxyte6MozjMxB65czMyfT2Q/tUfDXmUaV+BZ4c7
YK6n/qTLBszNIXiDv3zplU+1/Rz8BwwoHVeELLGXmsUI0DjA4VlBRoQ5UZTypxk7wdRbRcI/QRE/
JqF+MhI0bgJuZnTb0vlJqBw6gLxWkc9sgQ8EjycoSjTJYd7ELlPm+mixtkXUZXtK7639EcSes+jm
lQdozMq3knWLbvYENLJlWHCI4Zqx0aQbRR0zN//tt/1QR2zBCrN9OrRwrp5+PSKhb8qeunDDO58S
ntHdCbRJiWZaeYZ87g1I0gaNzN8O3enIU64S0++cUsp7BeDU6GwvX7m/AIR/kPV2eHNadYUCPKhQ
lOd2FfcHFXuQrIyMj1I4z2qrCI+jbVOmxvW+yFmfpEvC5AA4DO/O0FWtFVqIEMaJspB2zvaUM+de
n2Yc6zH2IFBjnBQ20LR9fY4Q4+RhBGsh5rkgeH9jGroH+5hi3RtgYvjp2a7FPlpAwGhB0N3qZWlH
TGWOcaz/DFIj2g/yiOlaNp3qkZqKEML5xAEpkBOsb2DzRcdAp9VO77yy+a63gpb1BH9HUYbmyMoA
5kxo1g0xWn/FXmXHNl/DORaFQh76+70EpKtdNC0bDXQ9QfijFLxaoQfc9yRBZQmn6nbnMM5KY5ef
ONG6NRWZBG6rrQqQhO7HX4GULhnRDks4T7Dl0fUhTs/pOzik1oN1x4IVfx1fitK1yIy+zUSHfZkU
k6f21TgzeuVyQu7sJfOFIF0ErI6zwDlCYISUCOTfNaOSnlD3vWWk7pCKq++NgPhBxjLwVcMPslrS
pFZ+jzs16Bg4Aae24tq3+dv/j5H00WZgAoe8GA3OlmbchqXc0F0V0V/gk6Ri7JXpbzBkVjOidBlt
fEDPhfG+O+qVrZK+4AUxWQpUQ6zdbpPAN7LziT71dRSVdvVNu9Zi/7D5F58TknJ6HJS1kkCHARzx
YtKOhxRkY4mMU9HU7RTEGv86kgti1Y7ZU8MBsQe+5jikpni88SDQo5LytAEan1S2/PaAIx1mzo9K
guEPPMz8d9sDwZjtaD0QvLEgJGDlNbwwj31jAfCjqJPVNOirDf8TNFNUUStFVlBEykik3jdCBBXV
G8c4/8UW7DMLAnopQsuD9mcbESWwMrJmHuMfW8zTfC7WUYoMD1z+iHaADLbR8aqLo/TTMT/JU3cx
ml0eRvH3w27Cqa9g0gDPVLguyUY6S78mCLzLivfJqBw9MX2XLwd/b6CoMfSshKuJAs9CNxjcGCa+
gUpeJlMr8zQw8tlcWW7IrExFQf+5JN0X+0e1QdjYix0isHQ3hhjyel5O4WTGm8OipH4Ck21ir3QZ
1wCK35wHzZlMwQpdVT9jGhJZyw3mzW4oJ2tAEHI3Vurv7Ao8sA80dO/UlZ8CgEaemWrA8ia2AkCB
RhgRpPWtGFO7Ja758sZyJ9VMLs64ArBnTXlNT+FOdOTcnQZPKUK9dbTlK4848SMDDIT5WS974a2N
XsDGqc8lh7M5NYZAu0m32J0dwyxqGZ1lXyhdv0PqWquD5xwbn1l0LG0cTLFh8wXD08s/dIzwmHnY
/4jZaYE0D7VJDNiNcIT47IeLHqQ458CFiWkQuF5aELNAmyyNcAX944X+hRNk0oXvXZUTpLtSf1iz
Z0rvypTS2p4te2KijfoIjUyBYNkuyJGyXolenc+hZAksDOqDJpYqSmOP9XxRZed9pfA4+j9HtMQa
6Q77pNJcyYrSb9GUhBOjQUGx7CD3PtT1BzQr0lRgQIj8OZUKwZWIlAlxnHTByV8GfymuHIWg0Ms+
yFPfBuRHtiZ9H13HBfjGDz9rH5MmDWmpLWgJF5bYRjwq7O+r6C4gJH44A5MIzc6xmw8I+r+2svFW
bKLubaKlsCQZ5Nsmy+NmlPXtnNJ3DrPr3QjP/FduQ56ciAlredgKKP9RhohwRDizfFVq26YzZjFT
n5ZMmIoR1HqCLWP6lX/cUzf+xHftC3XGRjpug0GQpCp6QlnwwTkbPnYS7YcKAB3/mX9ViD3xcKHM
VwAAE6/7MIVq74L8aK9bXONDX78FEOm4jd4IRORqT38ya8emPgD3azXBiv0nu2z8f7xBgYox966K
In9RHZnQNXyB0FnWjmJTlkJTGOg5ejNBwloOXBjozpdbDQJi9FoaldgaQiWG2k90ZhnPV3vrIZNK
a0UXqYPF23ZOpS3iBGCwRCHbtfHeU1EyKVhIysV8KTj8I2n/VjLFUvq4yV6aw2wmtFEfE00bm58o
OYOgPHQ5GbwjP9pU3XSrIodlsmfvRgDKrxwTHWLVaNrWJ9Ziv9GwO9w7OGCLwJM8by2JQWO++Utw
7HsW94K0AFJcNNUhybQVR2mYYO58OkK/IxiqQbFrWRY4x5NCsU2GCOAFdrLSmZYuP7XOQM967mKr
ctRmKnC9xeQn4Ul7FQvf9AWLOnnwUsYepJHUut0vYtUf4rDTGLJYHxQSu5nJQvsPu9WZ9y8L0fZD
Qsm8WmTz8OTGEZX8WEOj8ltc+Pq5OZ9HJnH+Warr5qSJqVdQj6n2S4O+4fevl+l7pZTv18Qt2PUf
lENrvLfyRtrh7FJbHX2pILDwbKXV4x+mWjC1NnMbF/4j/qEU3r2bZgihCLnoY3sXZS8Nh583PrkJ
tVwclBfgEwQlgWcB941uJfWnZrFMGGZXOamE22nu687Mft27J5UFoV8us+NBABn1q/ibn0KnCily
kADfNIFitabjfXHo1EeBN7MSgMkujMxfJvOeShQPgPI4dkH/3XDfXUcoI3xB7g2bU92v3mtb1xsl
ZXUTRTc3xr509jLQZWSVGClvwiuyNjG2/3ylA1KhvSkgvbiwnplXDQHCdfpZzYkdTfso2fBgGhOq
SnErhaIc6LH0fqd7uZK6oo+hT6PofXbqtBIQ4IGH+TlvJIfEtl1e9nYKEVDZdFKlCy017WzJqdr8
0xZWdNhzKhHuFYo0zjBHzfC3RNUx5Q9pRU3vwqn+bsCP8eWPQJ4ZsseT+tC2HtYznDNAF6UjpLzW
R1oVANvpnzJamaTPc8Gk20guBFmyn7aTUvFhKpmR1lBtqjJemr5ZwB4hoWT+O9YOui0i5A5aWhxs
U4yOgesIh2kgQg9RQskqJbpb1CEwYgNOs5psCqBzfzHTesUHwwDdn0f6Qx9/p7GVFxIMN83iHYGO
8TGHRItqZzRDGb0pnIwnnGuEu+uPp423zdtKvnl4mTTMS9lNifuyP19Wtf3vvTkvj0dHhT8ZVi8l
2Qqcdszy8j3FZaz5HU8hkprEF1qkACIMJoOKHXzx2+mBbkf/oZ/j3t3RNlbyiYUcpe9y+/IpLnkv
yrVaaD0lBrKbQ4ebt3XDryMYgiAIOVcGRFQinn8fEPvF/KZX9odelNqYK781/xNiB58fkFyMO7fM
GTJtSiMk/ZtBg2cEd01tidjAAU/aVyHCQEco1vh4CRqOq7iDT76bd33M+QibBh/9i/++WcR5/JH9
ATHppKmGCuenAq+fPL3Jjceur8j480GUzbUGXlkVsN9GzWtM49u1oeC3tqguo2abE+ZAAWcXve8v
mwa13RmsrcV+C8r7cB7O8k4jt3KET+dafsXqqFqWX54xRWUVGWWm6xr0SHfYAO74zzijUWN/ILMm
A9sCZ+klJQ0zuhDbFPTZPYi+1xIjyBSlJFTS7wjhvBEnoYZzcqN2OnXtRcJK8I3XHvpt3UAqwN8U
mxKwJINQfNRKcyAWBMHwyztBhzAjzfJ+af4Q64NjKlBX+UPuDb++jWjPbYWfeCm3bV8FyPc0t9WZ
imTcHvDbGMsVIaBQdxTk4h9h1HiwrGUKnLB81v/UIoVf8RNmHEmSNKNskiMnMLnMeOGHg34ECGN8
H0VT0RFJnu9Nzyl9ZNPEj3EY18aNcRB5kE1rQIWGHbWMAyJOXdlyDbkJIN4sAkoMaqkisutMyhIG
JNkVvyQdLIg4UdXhrx7i977YMXxsxnBPyloUyjUFgzZ7AI8QqUqJLJwqWCAUBFLmGbUeoL84X2l3
62wYJ6UlmhIjXq6jQl0z8vCWRhEemcTckcg1+pIZ6oKQCvqNKuqVf2hR9kakAbUQjJJ1KVb+hVsi
p9QqeQIMKiVI6nDTRjxLnbrZprC+ti38ipIXV6ykWS22kVe9c0u2spV+lhPNjoYN9mznlCbKfMpu
Ww8W0xlIH0sfx4Tbr1gxBCy5EsDG7lMnMQ7qu6wkSkr7l73sn5j7zZENjtA8mqcB2DXd+XNTUk7f
pKO0Kr2PgZk1Ud3pMpPWmvxSzoLkcNky7mE1CSYTEQiFNTotcbKqi22aJRGQ2t/oGzdPx8wj5f+O
F6WuWnPr8yN4Gwi2NUVY5U/AZ7E7wt1gOuQs/gYoWjBIApMGyOJey8etH3cKpyenHKnS8XLIJHRz
pu0tobks6ZOtOhM5JTjHYlNzSMiVHOgNIFkHhIZoom67yEgH3gt9w8DQuyPTN3o67YR+13TJBhlH
rpVB7Ux/iDJBHlvY/eo1M6V43Uxp4M/2SonH9I/wCBoGP0q6t93j/PhPHrcG249Z+oIkD7QqHnWN
xnVEW5+H6U++lsndjBzOnMmTloHQYBB3qbqXJ/PaQU/0tfFwRknj8x2wIlSFtIKcT87o3kyFugBt
Kl5MY9vpJgH9+MyT6xQ+zbkvur9QpZR3JgerMNf7hG8j/EqtBqjoId6v8YxLkaORZWulrp5vDmNh
LZzCliRD5lf9BZXPqqXgX3BNQt2Be42GXzVAWbcVRPHLOeeTzoh9wvBy1MmF7erxQWqadJxXAogp
jdoceei+B6pDYHfW7A9TEAPSkM7iFDg9bJcCTbnrKysfZOIngwfETC7MDjX27q11IlaknFjfuv4x
fCP65nSKwmAxEnc+OvHDx4GAvyETD4DaXA0IGTPiOnnuH9mrBl2o4tRWo/nUR2HVf+4rvBOCYTuq
sTQ3RLkkkp+/evG68ldIRUuU+iPq5eildNdifoaVagwWoC7kZSnJY6gCxk2tUtx3pul1XTccGp1L
wgZFA2UfRlvLV4YbXsjrfcD2ajbxR2x4RKDx2vro65xTSnc6OZ9t2hvVJygjwI4pKJ41C0ixOFM5
oclAHR6H+jPwbY9Bf9EADOMXZdubdqpTcX7pkVCpxSS3mTWisb3Bzhz5J6k/01HVIO55PgY8wt98
ToQVFyXEjseTRQaiiti8tryoO2l6AaJ8287/ya78cLyx3Jm4gVn5B0FJDtU7hulP2qbJmgaqryrU
ze1ckvcFnAJ/nMzH2x80spC5XYTw9/K/1zjiavTDIltor+ybC4AgErRyNiKL8UzSHVGpebAnQeFz
3YQnyUcVPcROLRv7OPT5nKei0hZRyEm3Ebc73QsOUOQ+qsebGnfvQL6rVA65xA0dghKaUdrDYu0c
utip1jA5OZaadJcjk9A6G4Gif1wUEbkGxhoIG85OSOmeVvFf827t1AdeNxIl1B3jV0QUzam2OFXh
s4qFjbbeRqSHqHfCcaQg3aaeVQdf1cxdA8iMlaKtbwMF+L1uN2s6tpJ3to6NBVyrVHoVeCzDfWQ0
FLA12Svh41knId6MI5RRNEAxITzaC+OSUNnTVS72ZlckkRoWmWToCml+chm4JZpqYffnDLnNEWvb
hzXAQLvi/hZONOwSxp2iOgOgmFTmkHIYSk13Rh732GugIJiERcRayGow/p9bPaneTB7d6qXp10T8
lmIHOcfMUavenu8fY+bLgnFfwZdVF/7kJ63hNtLCEuQDXCYILTqjNRpCg0y6l8fsmXDdyZmBNZxe
g7Qcvpkzw5/zNneMXKijoVfe87Fj5VpqenimYYvVEjOH35YoUY+K41sVZ4DuyHkItTIyrYFz59AD
9eTsq/0gHiWh4p9CMz7zB61EcrzMEdEori9Kqublu3i1vmrwbKrHbiSDkpvyOM4aC/BaZxW33oxM
jeisywpPS5N39de/kSgysJ//+Ne3I9BNWgXsu4fVg8R1Rk/DGB31HdzjdQmW8RL+yBKPMrNivciI
SuK2h04IGLTVBvG4PJtRVOl86VsEG5b9rHFySbGybbCL4wNNcR3i9Y0aF6lXMTLlf+HzV1r+/app
4Spf+j7OZG2nOhsTet9mzKwqHcEwnEEVhWjoSviTZWwPoFLgR8e2Qz/0iyEL3839DOETVi8FIBFn
Rk3X2EiT5On4I6KjP+C8J1sCPOxjUCxk1uCGf11skyOmiki1g/ExnhCO+UX7e1U9zP6qBEekq51T
4z/TNBHqNw9Ex4fF2cYyXycaAdNpS52TuKP5DJ7rIU9Jq1orbmICGXWCY5dcmGq0tKhp46GuybMP
qSX62yFRAzVaPFMoOAV4Lt8Zg0xupebQJx1uTJVIta4ll+pLHb2BbZBdn1cw7HfisKGAQpdHzGKz
N/zO8bL7hlv8jOqtk1YAs0Mz6E9XWYmq1C9wf7/ydHbbqGw63L4v/Kl5tIu22tnc8AC22GwsOQyL
2Xept/qua+A8wTLyobr1Uw15IdEgZgMkalvnItW1EscEkRzHVaIVE4I8cplv2gTRhTyLj6Oo+IG1
y6nDkHinzpaTD+y0kyjRTGWQ/7QxgkHxLm95udD3FZsA+R8TxB5KzmPy9S/mFneFl2ba5aTM5VDl
aBrgJLbfXKkA17YtnxYO9W5tQA3XQ/DIvCOqCgwhZ5etyGelyzZFpFNWpr6BX2+goKA2YiyfvW8A
YOeLqwzpKCbUH+UVQi5zsKoIgOsFPcD3mk12iWD5c2tJCFEJGIwnbGBxsMe/o8DqT+rDsJx/kHeC
UKWItuz/l6KIbRu7lBLtJd12wz83z9jCPaj3BK6HAglLQW00JGOeP4S/bsOZm+66iCMhmKYDV0lA
+pwGsyi+1xHOenF5aCDnFu/AWohhUV7JU6XWY0Zb9RcC0rIN25MtpbIQagdZuz5uv9Ln4sblfy/r
0abPP4/iOk9g+6+CiTLlFZ4RuATmbMz9FcZp/7iimWTgz9+nED5b/me6KGhXISuzZIBT+yiWvZb9
75AmDAMT2MZW9Lyhsf1WqNsVIQVi3xpQydlkQEMXIbH/P6dTSdDmwW2X86hVjxGmqAvW9s7ItQIb
TaLnJ0nA5+Tt+ogGjlYck7zjfm+ztVo8gWM5qhyqJa8YpZCEaOnyXfyuEEWff9+IggAUeYaL4hXJ
wVvMrOk/ir4eg/okI/Z+eFLRCFYZ23/qJ+rGcFzU++HR8/6BzAmIrl3449fzbE+RubOE1YK6v7EB
l0oa3uXcGf0fIi5DKh4ZgYj0tN7K8Vq4dJBl/8X19DP7nVsSNX8istOmWDNbsOBQOBU2piVrOA+p
etCGca9e72okfw2SlROOfD1PJeH1tpRvJd43VAQC8d+Nu9Jol5MlF6UQSgMzOu8NV1fMEsct53xz
nZlI/pIXhn/OMF/xOb5bit6JUNV7a9Tv37BRnpBNSkZIa7Rzxh0RCr3EnakyVGfTIV7jlO7xIeXO
qHznoDtMoAeQOXRynFO8w6shbKcUJey0NZQLcFNSdXHKhW/wkFGs2Pfyqo0UINwrOievIBo8+PHE
6JyTaveyrd6RCnmaNAgsOpK5GK2f7/JfOGpP5+NWu/SP6KW0rS8cNQVtPaVcg9HE5iqEE0K4sGQs
Xpn2alkcEQNyS0+KBj3pHlNcBgM499WYU3Tvc1DUOYj2sSp5zd2S6wEJf+U5y8ZZZqpJbPsixlif
IXgbAM+2u4GuMMNbovCWhgq8mR/Xx87D7fAn9MCaUlVqPeg/ejLS4CGEcb/LSyF59aKrvjJENykE
PeUqZi6hZwunr4ka8gT5sPSqJC2vu5wPlEsbMLOpx+F8EsEW5F85hCoSd+CCMZhRaP2Hrcldwdtw
v+5E7oDstLMgmR5IWv8cTGKXdkmtnwj3z0y76+2CBeAgusoRDpNLgxBEN9D9clUNEDu7axs7Yc3W
rGQPWT7FHX97xuBARXN82PHiiAeMC3oNfJqCKKgeALrQs5uvZcqgwecLO1AdikvNKpfM/JrVG+GT
a+CFhvwVg1gWQz1aYDLPicE6q1aqTL0jj805sNx7qzfQRJU83CdbjWzVvcFnPiyJdeArLDb8xZMO
hSkpOoQj/YLIPOGeYl78ZcDRq7Tpvh7oHl0d0TNEzoGj7XHcOlo/p4o4Uj4SjiUhT4od5a5Bjmed
6N99SkIAhZJboHr24agQW5w8fOgHcCoWnsB28fJUGjfNzIkmA093H9AoNotYuwYcqOFzzPvewsBJ
oyXPU3TsmM2LNtraichP31oCq7By+hiaJD98WnJcNqlCMBK1LRnkrXsesGlJ3tnfs05ML2gue53x
5hL7k5YIj1caZC4AA6fDc7OwdbmdbpGyCRYkKe89QNNJI6xFoEvxb8haYUYzU7qg/MmmzNYYnFjy
vQBi0AwX5w6pMb+10ddfrCbDPNFTFYcRpGcUM+RoHQvHJLPJhqzhM7eaProK/LhOJrh+77xGsy/M
xPbCWlpDx6tsHIS1gI3ORCP7cCc4Mm8z74WGWycNepZxzP5t3XWl0BBC9oYNPC6gEAF+NbKJSz+L
Ud+XN+OOKtTKz9zqOUWAzdrBEObnp4FWPwBGx9W8bzg0AP5XpWR/Ci/HtsiguMK+MRskLzbGt0Ya
hKyfRDFRYZKL+U/jKlDYZ2tXeUDgG454jVf/WyF23liCaQUlaiGI/iTiFYSF7Qf0kzWQ+hC/mGgi
ZyYVIPwrd6rwzTndBtZDqhN8FbEZloiHlqFarx6qdTAIBFB50Grac1uZXN1qbdjbVZgELyTGYCrY
OMLusaddo8DoCupBGBU65qhqQGXM+LjJneh/74mncMDe57anTV4uhXdtyOxWO6y+mJPGhCKqtAqx
1xPVukG4p0/5kTF1UF2cUivkarqIepo+yz11lG8K25z8dwqpP14Bw1YG0EKzita65+zUJd7diiig
7mCKUvGN0SEMX8ntFrLv7bW/rF+QSFfbhNaJlIX9aQiKPamvL7Rrt7tK5Y391lBBJWNZqXCysuw9
odhlUYa3r4GlpYwVrGpZcWQH9wmH02HCrUctDH36tGWh/G+bWazxOXvmcb0HrXeNH+PdPscZhvJZ
sAZIPpuufrBAn4n5vRgAoPgHf0v/9c5A1w/ErCjWWe4RBd0VxPOS8flYQlEN4MXYbdpaGfzcD8gX
ui44kr1cUb2fklrpQaTB9w1OdPzyjdlRAYpqIv701vh6Yxil2WuywGbeLFtl0eKTHgfoz10PfrW0
KIzhY9ebeQ065CiMcQvll85i0dYQ2zHAcJCcyPcqZ9IwZLlNyYbMy6tT0VsgKp5WgaWPxcYZVzWW
J1hapWI+PLvLieQLJOpfwm/t478ejzyTl4yxpzxvm99kGgr7rizqJICGSrHe08E+w+6iOM+5DVVk
kohRT5EipFXxqQTf/yGCncEunX9IZ3MgWCiDS1kZi07lCT4XPP1AT7yNr0VGlHxjraR2zRw2BdVh
O0uqIxNiu5SicOYfaGQ1HN6kxjs5G3UfgHsMqr9J8ZbZFFtD4qWLB6aSx0LgRIBWxZqf5k6q3KyE
lq7L9wYV3TrmjP8vWd08KweS60iEpufjN/FixXZ2WX64/InMuysBMa1bG4ho1QlzfEB5rCOxYg8M
OyD6QWgHdsPULOo6H8h5686kYy6sBTl6lfPrgERtwqSew8xZpNgGjxo8Rpzpsnlz2Z+oZUf+M7aB
VxPLp5I19scQmcpfx0SpQUbY66HWQzWJE7yupoY1LGG4juMm1+jkWb16/9gRQWQzS6XY2wJctIj6
9jaISXwsOeuI9XEjjntx/ng5PxP+RRXV4/+DDUaHZEMOc1QzqwPuNbdnn8FfB47yEAeRW7KXvLcv
4iwObT7c6dT4uwG1W9Szm6fTJ6jlxnbmcgI7L/RNTgqWoNK2Z6xCpkXWBDcsKDjKvUiOl7yaCWF8
hXX7V/ntY9AjnpbekvskPTpvvFPnujkCLsyuBUK8ivJD15TtIpxcN56PE0wptBENhYg0X66iWuI1
EOWufD0fNmYmSeq438pRgTLvANq3KKaLxur5LGt5D1cDCV78q7JRygH1ePXL7MfHFm6bt/J2kG39
UuuCFo3Yo8jGbpbPqUctown9UuPXPfpMceiMjgY8fMXpDpfS1EZgRyrKvBSYCZcwoftOR7tP2gCC
UbhARwveOGqaMS4eVN3WPXP5o86Att2AUZxeTi9dsU/PHdwvgDw5Mw9XgNm1jJTsL3eABGgLQ/h8
m67I92keQ9W6JDQadT80Pacc4i+dUYE/zaI4TfLhSQIjjO09YVTuxrR2aGSL4aAw/IK9AHN9DG2y
+ASPcy/QHb96xDVmurZNZJJdEDWo0H1yp1NdsrYHEnDivoBEtIBtCzFbGqDYkZ1bAN85gM4gl+rN
A2p5U2VnAzlV5CsW13MadJMMn7SEO6gFfcbOy4nhcI8/qEcFJFtTnyoRftm6yGXr2q+cjuwtVP+X
wGz/tf56x+6VqzwQkFuZ2ufsbmdDWcMJ6no6GKx9mB+xXxSea3oig+HWSMRYeRIovBzGxNmwdkcZ
mBvP8eCkShAGIPSj0hpEXsuaxetrHE0/5Sj+1d0TTQSXzIdlGkEXx9miCoVn2aDvg5CqQZQeXLnG
J0gxqWsJgyw0obOW1psCuGM7UNG8fYxLV3pNFvubcUPqtGXwIiVArNW9yuqMZzHfbsLfomGOCp70
WZtk9kPvq2vTQlNhtPfxAZSgRwiilCnRlaN/wwOnHWFO7sn6gLmBkOz0xR2LWcEs7Nhla+Scqe3O
Sxn1aRlW0Z03BujMlVLZoM7V5UMTuFTNPIiyLt+jgkIhQk+CqfHtMDNN9L8nsQj/GRLeyofc0UDJ
jURYj3s+izOMJ3ZrV+YYFfZYOstH4SFoPLlBdUQAV5DWjYdJIm+B9fWsI3nHVmIYaGmwTXyHu6q+
nWEKe1xdx06PSLeEcyZscR8/4hdZNevSmnF16ARutJkZ0ncuvEL57QugtJqHy9xcHcJnRmmRsMiu
Y9tzNG/bePbZ8pDTyfDqAfs6/HD7RBdfvAbmD59FqqUw6i6L5XR8iIB5q/Ox+ZkV3sF2UB4eOcvK
bCh4dAK24rPEUyHFuWpmxHGbEzhIw/0cIM3TYU+/Ptka8cm1pSvEzuoMEJiOoynQiz65bNOuSlTC
U/fFHVMWhBnlAYBTH2AfBS1yj5S4xPw0vjPQGsyGnzDqW54qvRpCTMi4GkPqVm+YKD1EbPbtV36+
OMV3O19ql+4xDf+lRT3pdhlErIRv+Fpv7PmjwaT8wNWmnlXaYnAnifaMqMdj+Ta05Zju5eg+FwlL
tWyC5Hp0Cnm1ZfGJ0i7I/90ReNUahJc+lNmNsocls0dMmwMK9G3543YA2+D9KIV4LWrBrp8mQr/F
P8Ugz3QA/laNqZrVCpg8Ya4Ip9eOZOaJaRQdxQ0kbEWnLMyC4mXQh8qECNq1plU8559qx/v8eEjb
EkfBBKZL8au5ZNw0uN5dowrsowdD4cfUOWfx1hOEp9nYDD5Tv+FIXPlQgC+/rICrbXgDIG5A+3YZ
BQZ9hiBAvNSJHShfi5Nb6be+86M+kPowQYFol5/EcfXZEdkLXOUx/h/c0p04jb0uV+G84nyK4kdW
vQKI02v8tih/2Q17n818exkDNmZBYuN7nFzJurxofpbBq7P7xrfyNDMiig+P8aU7eD27FNOeQ1j9
uNMaUHCQhYdSBJknA23yrBFvDP0UTzAoibcdg6Os6JUSOYioE1M3Dhvm5nJqsfmGxBm5f+mWPfy8
cS1D+AaDWfoG7seqSIxAw5XlNnPgQHPWyrtikYiVhv2210RDSWMaiPQXMhbJjPkdJaM1HsbxDW2T
EDtx6kQmWlbcLIcRxhJlLHQe4d4j9e3/6UAYrofN97r9jXrOSGk30X5+KCLyNoJ/u+pC2I/6f7Ic
M4ZNp9bz1DEonCyGmoLTSu3xS+X+KaOcEbczjfPr92++Xh06cUlylSihn9z8gXIFMuzarGFAPp5t
SFs7x9v1NKkYdmaGxscmAVofO25F/mpYVvXXJzFqW688Ajdm52vqMTtqho6AjU7qKpDuEF7JdH7W
LnoBx/7yUU3GHIQsA+/FVIzeuiqd5Gi2m8KHj3aC4wSALcwZtevDPPDJnU9Ykoz9J/2iq2eIDtWD
e9CxW0cjZqmIaSZNL68KnMusoJp3TU+pslQocJKpeW593Lvnk0K4rFDjcJ59u8+kXhb3Qo3RoiGD
SOUUyZ/hiowyThbASeXu1e8B96v9LPEWl6IYNf+smrEEHOVEoZ7N1PadGi8IgTw2lpE5yiwmkP0x
vknsou3vDiO8hc780WCla1DJHIuUlz8fY7qbvDflYDvfg3/F1hyk1mR4Xlqf/b0/3CFp193R5UKc
wmHv1dc0AL/bDY/LkB5A0pQGzxQy724A+uu6Pm9PY/E1hOyapLHrle7ekYYpomWz/wEwa/pG3t3W
AXgb4vBjvtNZ6qzGWLXQynP4N6v1l3IfM6dFhCc9wYrWxsbpY5ZcksvNHtnW80hNOyfbui908emd
pu06QzPZbS1PBvc6qpdJ2ojZYky9xfsXwbWmK/M68O4V8bn573weMyG1YzhVdWe+zy8C0DsAtVux
L2sFq920FOxjlAFQKB+JtFUJ7MbOL6hNzR0ZGVqzRzlEh8ONzUa5AWoaaNwW+U5E68UfJcBcyVYS
gYCupscXImLf4SId0s3yWCH6+mlmgHST0jjCrz1qa5xOzHpBPpb4h+i0KU4vOVwoVlX37aC4Lk0Y
TWY8ushspzRy77D2xfViAL2gWUWyFEncGEPFNBz9Fn8KK6DGUvGWrNecv80PQXX6SW1LIN3mlkCQ
1SZe5ufnAl/4UF7lEti0hzO1I+pizMBSNiknhxWqbmiGJMfzpaiPpLghLLKLykkT/qY43+Pd1PxO
wM7zomKorcgfJ0/cZ+Y+1/+WmaqCKC4DDRcQbWo3f90c3xgGv0k0ex+qn8cwnXNEV5CxPiS/QDzt
a/cvJpiNpQd7bimkFnl6Y/ATYmVZBPo6g8ReH23oskJr0xQRErQz3GhsTS5+8JyRUUgS5uhbMnhx
AfJ+/Vx1dDqIe+SPdeoxmepAeenDNa9wDBW+nXmAMPO38HeVFYJIJB1e6OZFF/udmwvnPfiYoMSx
cCp1HEYxlbujP41aP07f/uqQet96Hvo+cNGerH5wVjfEUZ7JZgAcFp0SUqczrfueK9zdf7cYq3ze
QmwubKWAGc8Zr4+bh0VoDOAAY0dLy84GWd27iN5akwPC7rx9jdI8qlGs3kZ1vY8kYqfpB9NhzXf7
shysfYn7ZEPlz5ncwUxiF92cFrNKN5Y2kp7sD8Uqd2TUabyxwZDxsP4ky0zVVV2wLwhpQybLlkuf
xwVrVMm8eXhDh+5aO9Bq5fSJz+s+M2LgEjETXOa1Sc0vMNlUVCJwfJIlT0rwNRBYC09F5knyfCcb
9bYGsDqzBjm6ibgwv75eygfSxG2k0G6oFClMBmf2ASTd0i6FV4Pv9t8fUBZ94TsAMLWEfXNh6z3r
Udu8ft9HnYvG3ZcNNvX5F+jJFf3NCszXiRFCbp+X3pattZgTEqSV/DuuSF4iNg26towaHpGkZGGI
zM4gn4IV/hUP6H0aJzV2Jg/xw1y1uBTFFUgQ7nd5djquboN5fXo1j+8CPa30OiP91haa2FLLfGKv
eZb5uJFkRZgRvnPpWW2lzhRaz4AzCwcXQDJ04e0j7EXb8TE8kKM7D0PCOhFRhUvg+2vkdwr7/6Hr
hR9WwJXYGxhQvyl1xSLqy1jRqwrwelrGmM+Z1etCRg0xKkCaUnCW4H+uusteKdBBtLtclrX/oK43
hHsANWBOWnl8Jp1ukIAVgJtHVciucJgurqqaIJ77X8zrF2pAND9ToZxIRYltLxIXqUGeDUrulgYx
OhjSV/Etm8FoGYCsWRTyzyYVTperMFEUK63TzAvB+drMrTC2F2xFNDWSDTF8W5RNG0DP8fa65gaY
ZKrnj+6+K12qQI5ffSrmpYXQ15sz5jbxZlfSNtAz9PBQjKbDK4GawH3K+kldlmNFA0C727Q0fuvb
oTPJ6M9/krKfYbEB7//CgYhU3xItL76iRzWG+LAgQLYMrF0JbKfvR3qidEhVMXMYsMDEj40Mleua
9MPpF9bCliDtMX8J6jiGGqBiC5Q6JornwBGWxDZcgyHh/T+fbxgNK8Yo8kfgnmEI6wKVLyGf5pQ0
GhhE948yIJX6HJ2xFdYsRgEkRCpHgBTq6UqCWp1uJlitUONY7FpXIqcUoXnsfLILUs+003Zc19TH
KhhOYTH/spZZcqH9p7wqP5CCA4MSrYt7t97JQ5shL5zFhvtJpYgclJlJiUQeALZQz+YxWb2GYHaN
HwQtF1fez2GF+LV0FVQv0IYfxPZax5CMQ94wWvZNJOTPLNhNGLRbACa51j51cotPHmd7ckidfkse
MHW+nmTcZQIdjUGGPqsOuvGhh48v9Ahp1pBrfvYtF19RUEsFhHGLsNH3PbDOzmV6CpD/2S5rGSD5
804sBlMgxO+e++MuFwz9DZRWhJ86kAmJTeHrkdepVMQAokVDe0XbvRQD0rkJ7xFwoXM3BETtRHWD
Sf66DCB1DBL+aN1TCe9Mq9kQWh5PwAJAk1Zprno+yH5VtPRQlQ5PACBcQMSWiRosLWSESlfinz60
OGK74dc/MOtCZU457CEhQKuIqjxOMl7UKytrQwQbQymaqxoQYMZLTVLOXbNHQOKy1Nj9iWFIqWB4
bsqRkcCTW8DA6o1LUHzJ+27owFbgPqeCouxy01TKxFjnkVOJkt2e6oeOAWk43JkR6LlKEGVSgRzH
tWuHR1evPwaKauEUI4//wVIAzo4NaEM/RWPG9Gzp77VTrQxiuQUkS9SuYCb5twA0zoMoIRdtYzYR
ywqblpI4rD4olDfhF+D0jQI+WOnlFNvXnYAse/MBUltMdYg4vqndZEvxj9RCe1RvI+Md7oUhYrqA
V5H3IKMQOYux7o9RuIrh88+RZ0sfhZ5uoPoxF+h/AuRyW5uPUEJIJvKWxkOWsASa2R0g+RVookhd
VBqZHLmYXXA7DzWO+Hv41LALzFmIaoubKsb3wkM3JlI5ldDxHu7Rmvuuziv+7wrVnGZAyGayj96H
uYD4YqKsliHIDbxbfcy4OjCrJVxUAD12lIZ7535iJ1yqdVGhoZPX9N8Kt0Cxii8e4g3xsSCgraJK
oXyVdFmyB4CWcnTsQbYl+2LXSbZU6e7417qvwD7oZFQkZ+mfFo98KyerGORrWMpKptOXvjgTHswT
DHC9myPZrjk3ebFWHI9pHUloaLypjMuFHfv8JTWGW8RNLLR1DINGrmGUVdhMFWe/wuLWZI1fRLsi
6SorIBexTM07kh/ZU5fzF8z4+sh3nqonBaikk2ZCWjN/t6TGd8UUzn5CSrzHPIp2zr1mSVCF3CeO
nr0Mts2Cz9YgydWk9NTPw3K/5SRvhbYGKIv7VlkkT1h/pv+fRfYqdwiX+nHLszf0UJJnLwMaoCoI
OUPuzBRFBta1xOoCfKEGxfzSsua6Q3uTAbF0Wt9U8Gx+yFn0s1u2JZwdYadaDyQQkK5cDkaFzPTB
RlPX7xF/RB1vYS8JktdAsWz28XucS4W/uSAUwUadkzjuofRsEuFupM4g90W5yGsxF9CNwGEQGzfK
ERqS68+rVtuEChflLGFB40n7Eb0h54mx2XVwoNC2+3JRQxeb8PW6oNg1uGcC5VTAsHSC7JIXBiR1
w/ogELC50eCl9UFxSXcIoFw5o3p6NCl9/MzeZ9wv+varP0Tusa/dkW67MIc7pn/emuCLfNvg6RlS
ly4FqdeVoLKy7tK8Sy72Rpxvhf16sM1lSPfpLcWaYKBPvc5Tsp1hkwF4Ht/1LGnGEKjoUOGW12Rh
j9m4V+FIuZCwLN7jA7UwJqmtDXhdo3JE/nWTHgATwCMzXlAYMTPhdXyIDSuEolHDFeJyxaVaqFn/
jd0ini2EQM/t3hdtkrHzo4iuIvcQ6YaEUg8LApiWkLvQDCmCCtpKqII8IDsQ+IhtYPJhQ71c4X1t
aLNC4Z8ssY3XBpN0JTNs96qEDD3K8vJAc0AIz2sK5kSDdnGtJ1FpmaVFMY8uM5h5+AdFwBZuupPi
GnjDHGJC0cWZn740Yw37p3+S1piW2r5uCLjSqAVA6P+zqFPjA8pFBV87Mfk+jlT/Y4BXF4yXrvPf
tstKYTmmjFrm0APioCPlhZprcfdrGOwuAeHrHu3RVis20Xgti6zaFhG65RL2ArNDxtU3mVTuHc7X
qxonh3HRAGfx/d71gTBOu9znUCu+CmqVjdgyzbnHgtO4slT6ZCXyNJaP03NSSWkdg5OxFEbIoY0A
CTB/6IijY3jMSrXbKUXByi0K4LDNFL8iKKzmKCbiyE7paSP4KC9DggVolzXKeptjDxXYUg/K82aS
DbUJPRQdHDWZ+e+PytcJk4E6smKWokcTzUG//ZnisN2AEm5snaDYmTHTzGWbJNTcrncZXDLw5YQW
jshh7EoSZwv5IYTO2T2if7p8JOHcF8BN6SOZVJtN0e81YbqtvXKOcjOM+rAeiu3XqbX3Qw4sG0nt
ohW2djcSA9KPzIfyLAWDpI53sfNROVPrsBzbu98kjVseUHBnSp6gHuHYJfMH2xNupmRV/hS/Lcr2
0EJ1nBaoOAEgzPdRPxtBLYDjJll2X/qfrQjt+jmyauHOd+cNB4B9e3zINTGZYAvgKtfv8nfHxLeh
BydIgFaD79BK35Kv7HYByCzhunnt+W0U96BhGVDK+x3tcHJ9Vl0uj1EUNxcBJW2m5pS3NotEZEah
AoSCd7xakdDvXlL/7Vx59bQR7Mh4F2t9b4T0oHvCkKCeBOX9XE5A6eTyHw2eqj3qolDrKpwvhhTC
6LFsg7FozhAPZ4eYiLIPHoE5+bVPU/YpdujO2sgcWrL2NSSyWlg7/ZdKl1H/bPAUnFoT3AG31w9v
sM4gf6kE+WwMM8Dpjzq2YXkJl08DitQ/o8FzjQCOPjvhExF04e6xYY1e/C0+Xh5J95sy45ETMrCV
Dq2Lrxg5uritXmFe03pFdjxAUj/OoabM0QygtyBK5qhcsV+j6TUJQ98sYREMjSme1ru6bw9Z/6hK
vEQUmqtg9TeeI8d6d750mlZYsxQrtJhG3UfRb08mF+Y25Ae6Tl353QTRxUVrqjlk9GLaI9Zo8p1g
Qny9uu0e/5c2fHvVk1RbJtaqKoc/Yt2WYPgFgAB2zzHBkgz/tfcpQPd2EIO7ll/cBQq8/5jccjK4
SdMWBxXG5s3fXfEhHyNVz3SGt5g6pKqLervHLy2rl6pagYwSgDngZ3+zy8flhhcZyPDUi7P8cr+T
auON/H87GKi5mfuYHZMTDO8wGxtt+wqDZsc+CklXLhespp8zIYZWzwIjvzWsdkiaI+Zmvt0TNn3Y
+J28YD8DDLSnwWao8Gaqh9Wz0oH0Ghyn6ty9J82xBXc1JDWTNNowtCdhpnF4uu6/PGqoen4Snrl7
Sf6VW2MM0SuWVj1RunVyGlMOXW4L4/VOSp8BTJqH/tihZJlVhEEy1hPOnl1ex8eWPuOV0U9q7qJt
hKPTb1HiVTQ2Yo1I9PTb7HeUgcp3fS4z96qe3V9j63Kllkq08nKIxKiN2RjLMHN/u+NL0uLhk35O
oB8R/cVLXlEPjKzNfPRmTdXdjwpuSiiVR5R8IPI6v1YOzN24nXvqNXMQHoG7LRKI4RkbrMUvo65n
PNlTiJL76ID8hWlpyWqyHz1kx35vi+2tkO96byCQAe/Rse3a518jMeOCLKZj++pwW7y/PlZ95Wrp
YFt+8p+/bSlgJnPvHB6gLTPKVyeEbwc9PLlM7PqV21bg4mj8miSrPNLe5PC47MiVRbm+JfwinAVo
82Zz1ZyQnABi2GkwkLBsQKp+6RhWmGHHNL38vjPLChifX8qXWOv0JAk3Ht7imYJLffnBnYnrebLF
fNWRX5gqCaZjKZCblS/Mz6fps8TUaAgHG+Nq/lY3aEPCfrOyQ2REBXAnlNPuD0HEVpy05qk5HkJq
YP5gcWgI6uE5ty5/wlAVVt26R7CsZhrDvf+GJRta1vbUaXaU1+B1B/hVIAm9ia1OkjO0OLZwChZs
1wCyd11rsgW1DllipYz7HdieLhf1hlG127BriIEcTbcssN665v4zyiVHezuio6Yq0Kje4dxehtC3
5KBRiPaPO9ue3dPXNxSi5jxKkHd5bmPwRuAAV19KDbPXnNxyE4DuiPfJlELHA+UboY+8JXX1OrPd
DlS5sHqMVXblkluwhMdgOLLyumyLG4EJ5j8GZDcr3ohXyEyq1sVqI7tUUA3qot7qq0Eln4+y9FLp
89tzhKV/4+RtOUaXPuqg7TLdRbE9hHJq16myEZM4VI9BaqTBMq6ItYQDr6KCDE2bS6XTRq9Tl47U
G4qK2BAEK+r9SnH9DYkL6EbC5UXM/7veWoGL3zgtv8j5C8wXYKdOwIxPz0ia5TDn55CHW1DvUCTM
Q1TAleRwedOU8sbkyZRCNFsWZAFPncTxH3uweOXMj+SzeaezUI1tVXk7egZnHEfAyBeOZsr2E2KW
LDPHJC+DRTiSkAwlMt37ePByddLVQkEOkFMgQMUpF6fITPT22wNK2EdLxnp5R12f/43SeHKn5oTi
39Wc1cmErr/KW3mQEqYuykE2vrdQ+1+tjoiS2mKf28oMaKPRRWS0MgWtRZ8Y4ggerJnP89lXinn/
YzfYXN8lUsGVv38yhKOxXjU3qWnqhpLbIBdgOU8ZvDKYjho91fYtRjY4ib0tXi14YtNLT3zkcOGD
xu3V7UjBN+nZ4ZNlPzCU9FO8A25xoW8eBGVkYlZlFiJdCoKWPYMC/T2fodgmf7dT1VCAaJDQTFXZ
XTjl0HAEFpSzm8guelcsb2+pawb54ZhHO2+7Ytlb9zHQ9RwnOoG+3lMEH7Nr9nlIfsMQAjmttkG+
xqESdLMX3wtqHMMlzkpAgipOx3icJqkG2mmWXQ7Z40FC7mk50MU0qpr+i6pn3Ry3g4CPzJZPoDUA
kwL6QL4k4uPfmM2YZFJfFLKycpAEgqeoB7zPlCoLJqHR3wOpcLvMWmY4w8UfEKr5TOcfQTt1tTGv
QvzosYum61VC8ynxMORx10ZdKvlT5lpBF9+m7NLqEmjjHbxHcOigE0OiMxluvs5yK6g7u+2ibo++
uyZVOUGAizEviayv7YVFXk0HvQ2nAfB94a2whG9DzfXv44QvS7vWjVnyeWskPqF3vE9ATZP+M4oV
89vuCGAAIwgNEO/xuJNbSozJKR1m21BHlR1QkB5b9DO0ZKZKPGfy0Uo4P4L43e40bProbnjWUW1p
qhkHlwosB5xO6gfSskzcsqbd7LoUJDcr6xRviar/HTLdOhsP3c/aWHBTl0iAzhOcFImOQFIY5RkH
UHIdK5Uu+CmUPtsHdgLyRsX9fzbrkTRDKesoCUZIw5oPm0z2URUHmDwilmW69QU43O8keUWtulvP
aiW/QSRbXZctqyadfIfr32yqtFIuIaXFlBZgkiypgaEZKUyeCIOD+eQ26Od9U/0tMFkJHlcjB7Qv
pzE0WxwK+LzL6dNuRxDsaZVYVKVsSzm+0gadDBh3YY4/f0f348aI62qVetCEkwvYN8vh4ofcvcO3
hNKRhbxsfSpRGEmpdMG8M23PEu4aVFnaFHFml/+XHJPqS8bXmaRirrfSh1plZKX1gbqxL0tw6IwT
l6+W1TT8mPw2KADoqfb9EaK/bdR/xNW5eXydqMg/2zEpekC9rgPpOe2aTLt10GH8jIv9ARHJSJKB
qrk+gRBoDjEvMFQo/iPERXB7CbcqUckyb86QP/AO/cvJw2tFh6GMSG8ipSQVk25w5aeEQk92KCGi
Q/Nr0Exs5mR/Rfb15Gjqcb0MqUUjjWjP5+PHn1Jl05Ef+4d2ZOU8/Ff5vmX0wmTpKs3TFV8xH+hV
5g293fB/wMZGRAknwTF46s426qKXWEgCmp1GFnMXWQNYhuG3LzP83tmaaMj225M+loV05UrqufBD
TFfD1XZQGYorhzEH9fOPMy09Idp5UWuiK+9k3DC6CL8A4hMP29+JGLT14YZUk09owCLgbj3aigql
ivGn6abFIUAXFBm32aDynZ5LioJ3SWugSE1MnmmykTRtBaAAJ0sItF4lnCi2s7vffvROolXjXeXC
2W9/5C+LkPWmuZpt/MIW0c/pbOmqwy1BICUrVbdGR/FANK814bcoKFN8+Xd1J0ZqtX2PVofPyOs3
rSdwNeN099Dbs9otX9CdAcw7G/gOoIWr0AGvpzbqaNqEdlpSi7+yNhdUI9SbuxFFWuXa56nM5+Z7
NBdTOlCOH+5j4l3tXHgWwxrFgBXegZQ4/kpmG7yCu7P2iRQjTv2phTBBLMy/KcCFsXGt3Kl4oim+
un6w3FFYsWK6l5yL6R1X5WtcGHNoBw1pplvcTjWfQ6VuxmqcXIF5Vz0EhOatrBaT1sLbnoWyb4N4
fR1DY+YLVtxZUIEGM0+XKdEhOCY5R5BEtHWbeKP4V5QH0xJ9jth8kDocvFiFb4kSluCXiaVHc4CN
O5JtTZfzUy1EVDBToT9Rja+XE9vQUBsNKxBM5AAZdxMKcYmipClORrRdQOPvdTpZf7E3WGVKE6NY
lD2qOWl36uTM4K88rClm7iKlQs67yyJS+EFLYl2sF3+YeIaDmBt86vwcNxAXqy/+uTwcXYr3Wvay
15RZiWsDhZVv6KKLYrUgxejA3KjNv/I20b+xI4IXVcTfoPtqPztXvrP/4Ya3jbaQGcsq2mNDYe8F
sgEeK+tD5/FlbZIpdVBxTPDEHiIyuRjWPDi+j8Yfq0UCawP+wszWkWjRcb/2Q6cM2sHyA7XM6NJs
JuefwGH41qagkHjcutW+xRMldYdCRhHb6L4XZ4q3tin+AYmVM/NrGdA+q7pGZs8OVxaOvDodyQxP
jyxF/tbGfuNYteBhJ7MMtCQOSKY1pxS0/mDQBjqlXYrtZwq04yTPs5FrskQf7JnpjVAaFXQo/lY6
DoG3Fw6KcPOohkslnLQT0Jx/8ZOoO6Tr/CmbZ1ZlyTSaleK8erqE57f+OZaFtevpkjmoUvHuAq5+
d+K8q3SohP/AzDXSyslu2WoP5Is5taLe8WeRJh81nEyF7nUA+dsAg5W+8yEsp2q+K7mHllkmm1f8
Apo/CqKLIkC6lgKNc2RdVIOqNPCHx4t8nb2f3Y2sfjxShgRM+L7z2ZkkEzHyogOFZmJdU6YZTvdL
QN8iW0nDdPVDF+1ETypKt1FRTI6lds95TCjvbnvFnSDzGQomipva9UoCJzTPwiQJFnGW5nN/NviP
7L04q0hF2gNHkEccZZIqB0SXc56yy/3/56QSOQBAIui+F1G3dQ24N3lQfsq9GL3McCFtlvQyFVkE
259ZTzLT5MjJgoUviXZNWBULMU8mijWU48CBSzcVutrEbnNKGHJ2s9TKpDvMO1yneLjFs50qRDD3
98AD+FQRnCLDV25f4O7I+EAb+ZaJRK6udx/wqoVsjsMEyRnXj6k0n2GI8LvWzpu8ClUK1brNa8FS
RmrbEAZZc3hwelFHbgufuCHkZlxAAQMTRqstL/lKZpKOI+dp+vwwpzs7hCXkF8Gnyt0SgX/wSzkd
k+Pzt+bMpiKsimvSd5nm1DK+sFT9zoZklrSWuHYhLJy7ro2vdfLI1PewvB7N6D7LBw3owm1Ck28z
5rB9pmGQR+uWFgGPC/qyHtfQ0NRgjLnXNjaRFjKq8mRO3Glm8YL6814mfoyJVAl6JhYNOkM5oq/R
NJ3+Az2sSEizkTaWoEVn1BhpjZnFqDdw8zmqS86aXXiYXWmAtpLwXSYdAc/gS7JlPU1RqfXcg9bK
btKAEWQKPackOBnO/HZvGslQL11g6DrCWcwR7erS6EeOhzYjUhP6efjRC+l3J5L/PMtK5JK2C8bl
ecrNdeSSkBSGcZx+u5roUyUDRe7oXRaGLZk5M3wT4Pf9ADx8Vp4NyPdlCrXVKLGs9YYCZKrxBATl
sQfBfbHBhz8eEKTVURVtbN72U0jwtEZAkujrrB/+sXlVIm4dMSaAkPHkCEaroTB0oczGlz6HvVFr
SwsQaH2aYQSXC54zbTl5svDN1B46zLSYgiHvvHc/x8K1VT7nOmIH5aukDYyR5RtxVwi0dWzby6Ol
UVnxHi/fAmCAy8iynd/YPRP5w0wS8ZvaLSpBxyVMY1w/OGO3xbbSb8suOMAYjvMDKIG4dC9+0Ygb
F2EZyG+TKY8YmynJGixQEQ9caF7mTFjCDyja7arS5FbskTTCsq0lhMLfUm3WMaEWz1mff9Uom2NA
WTTP7PawOKXAE4XvE4VqR0v8n+H4L4RVrlOHoQq0bYJ205aKSjfFXAUW+8PTM+8lqaj+bCPcQ3w1
YfarQIWgIfsQyFo8WFiJBjFMwcsqG9iVmmQTzkyqdhoV5BiiEVAKPGG48oVoF9TfNqWFDDxeUWbq
zAhl2XBuSjStC/p04HetxcbIrX2ax2NmYPzfdEDSXnFnG7GUfVtavckpJXpn3/QFKkOBOgBJM+xP
V9bZPClMPKnXy57r+dOJtDSIGWD1iaHqW2TAWCh1ODVYQ6/dHUEfBW5mqi+HQVCn+6us0+VAzrp/
LQDe/UTT6KBurNQUGJNIkTLBauUSlUK5pmSEGZEZKB5KDrl4hmj9+CSVO8DplX5ABiwByOmfo331
9Li7mR92mKrU8MdPyBNlksCdDlYZme6GZHWozYkUHSW98Ky9iVmRxpvgtaGovdpvfY+3JroVbxUz
9m8JcopsD06dTzubILSNRheweTOjZKO0sPPeIzJnrr/0Pti1TdtYWgPdyoUxBw2e2Y+eHnNVtVLG
82mrP1r8QkmKERRE03t2LgTkz0ivib67S7sKxQDx0h31d/H6Wuj1TNizdu6NoOsypbrs0T6mufY7
QSE9nc7wmpkLLfWmj8RvcxmYHvajTgKWUd325A7Bp0bPKMXzgC8+D1Wzye0T5lU3I7/BlVC72SoO
CTm5Ct9pFgS8OpDdwydblfKMW1imX+bflGN76jGPjaZY3L+xuAeqwgC6BaqmAAYtxEoux34q3arE
gq1mO0PwsDR7eT3BWAdVfntjw6HK0xvGQ2O6rfakRpJkosgGwG9A82rwOOPJyZEmmAtLLFyXCA==
`protect end_protected
| bsd-2-clause | 2a72ec2782aab2d5534f45103b40959b | 0.943777 | 1.844763 | false | false | false | false |
Hoernchen/hackrf | firmware/cpld/sgpio_if/top_tb.vhd | 1 | 3,702 | --
-- Copyright 2012 Jared Boone
--
-- This file is part of HackRF.
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2, or (at your option)
-- any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; see the file COPYING. If not, write to
-- the Free Software Foundation, Inc., 51 Franklin Street,
-- Boston, MA 02110-1301, USA.
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
ENTITY top_tb IS
END top_tb;
ARCHITECTURE behavior OF top_tb IS
COMPONENT top
PORT(
HOST_DATA : INOUT std_logic_vector(7 downto 0);
HOST_CAPTURE : OUT std_logic;
HOST_DISABLE : IN std_logic;
HOST_DIRECTION : IN std_logic;
DA : IN std_logic_vector(7 downto 0);
DD : OUT std_logic_vector(9 downto 0);
CODEC_CLK : IN std_logic;
CODEC_X2_CLK : IN std_logic;
B1AUX : INOUT std_logic_vector(16 downto 9);
B2AUX : INOUT std_logic_vector(16 downto 1)
);
END COMPONENT;
--Inputs
signal DA : std_logic_vector(7 downto 0) := (others => '0');
signal CODEC_CLK : std_logic := '0';
signal CODEC_X2_CLK : std_logic := '0';
signal HOST_DISABLE : std_logic := '1';
signal HOST_DIRECTION : std_logic := '0';
--BiDirs
signal HOST_DATA : std_logic_vector(7 downto 0);
signal B1AUX : std_logic_vector(16 downto 9);
signal B2AUX : std_logic_vector(16 downto 1);
--Outputs
signal DD : std_logic_vector(9 downto 0);
signal HOST_CAPTURE : std_logic;
begin
uut: top PORT MAP (
HOST_DATA => HOST_DATA,
HOST_CAPTURE => HOST_CAPTURE,
HOST_DISABLE => HOST_DISABLE,
HOST_DIRECTION => HOST_DIRECTION,
DA => DA,
DD => DD,
CODEC_CLK => CODEC_CLK,
CODEC_X2_CLK => CODEC_X2_CLK,
B1AUX => B1AUX,
B2AUX => B2AUX
);
clk_process :process
begin
CODEC_CLK <= '1';
CODEC_X2_CLK <= '1';
wait for 12.5 ns;
CODEC_X2_CLK <= '0';
wait for 12.5 ns;
CODEC_CLK <= '0';
CODEC_X2_CLK <= '1';
wait for 12.5 ns;
CODEC_X2_CLK <= '0';
wait for 12.5 ns;
end process;
adc_proc: process
begin
wait until rising_edge(CODEC_CLK);
wait for 9 ns;
DA <= (others => '0');
wait until falling_edge(CODEC_CLK);
wait for 9 ns;
DA <= (others => '1');
end process;
sgpio_proc: process
begin
HOST_DATA <= (others => 'Z');
HOST_DIRECTION <= '0';
HOST_DISABLE <= '1';
wait for 135 ns;
HOST_DISABLE <= '0';
wait for 1000 ns;
HOST_DISABLE <= '1';
wait for 100 ns;
HOST_DIRECTION <= '1';
wait for 100 ns;
HOST_DISABLE <= '0';
for i in 0 to 10 loop
HOST_DATA <= (others => '0');
wait until rising_edge(CODEC_CLK) and HOST_CAPTURE = '1';
HOST_DATA <= (others => '1');
wait until rising_edge(CODEC_CLK) and HOST_CAPTURE = '1';
end loop;
wait;
end process;
end;
| gpl-2.0 | 67b0c8f71d51913ab22414161c6bf5fc | 0.5443 | 3.758376 | false | false | false | false |
sergeykhbr/riscv_vhdl | vhdl/rtl/ethlib/grethaxi.vhd | 1 | 20,622 | --!
--! Copyright 2019 Sergey Khabarov, [email protected]
--!
--! Licensed under the Apache License, Version 2.0 (the "License");
--! you may not use this file except in compliance with the License.
--! You may obtain a copy of the License at
--!
--! http://www.apache.org/licenses/LICENSE-2.0
--!
--! Unless required by applicable law or agreed to in writing, software
--! distributed under the License is distributed on an "AS IS" BASIS,
--! WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
--! See the License for the specific language governing permissions and
--! limitations under the License.
--!
--! Standard library
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
library commonlib;
use commonlib.types_common.all;
--! AMBA system bus specific library.
library ambalib;
--! AXI4 configuration constants.
use ambalib.types_amba4.all;
--! Ethernet specific declarations.
library ethlib;
use ethlib.types_eth.all;
entity grethaxi is
generic(
async_reset : boolean := false;
xaddr : integer := 0;
xmask : integer := 16#FFFFF#;
xirq : integer := 0;
memtech : integer := 0;
ifg_gap : integer := 24;
attempt_limit : integer := 16;
backoff_limit : integer := 10;
slot_time : integer := 128;
mdcscaler : integer range 0 to 255 := 25;
enable_mdio : integer range 0 to 1 := 0;
fifosize : integer range 4 to 512 := 8;
nsync : integer range 1 to 2 := 2;
edcl : integer range 0 to 3 := 0;
edclbufsz : integer range 1 to 64 := 1;
macaddrh : integer := 16#00005E#;
macaddrl : integer := 16#000000#;
ipaddrh : integer := 16#c0a8#;
ipaddrl : integer := 16#0135#;
phyrstadr : integer range 0 to 32 := 0;
rmii : integer range 0 to 1 := 0;
oepol : integer range 0 to 1 := 0;
scanen : integer range 0 to 1 := 0;
ft : integer range 0 to 2 := 0;
edclft : integer range 0 to 2 := 0;
mdint_pol : integer range 0 to 1 := 0;
enable_mdint : integer range 0 to 1 := 0;
multicast : integer range 0 to 1 := 0;
edclsepahbg : integer range 0 to 1 := 0;
ramdebug : integer range 0 to 2 := 0;
mdiohold : integer := 1;
maxsize : integer := 1500;
gmiimode : integer range 0 to 1 := 0
);
port(
rst : in std_ulogic;
clk : in std_ulogic;
msti : in axi4_master_in_type;
msto : out axi4_master_out_type;
mstcfg : out axi4_master_config_type;
msto2 : out axi4_master_out_type;
mstcfg2 : out axi4_master_config_type;
slvi : in axi4_slave_in_type;
slvo : out axi4_slave_out_type;
slvcfg : out axi4_slave_config_type;
ethi : in eth_in_type;
etho : out eth_out_type;
irq : out std_logic
);
end entity;
architecture arch_grethaxi of grethaxi is
constant bufsize : std_logic_vector(2 downto 0) :=
conv_std_logic_vector(log2(edclbufsz), 3);
constant xslvconfig : axi4_slave_config_type := (
descrtype => PNP_CFG_TYPE_SLAVE,
descrsize => PNP_CFG_SLAVE_DESCR_BYTES,
irq_idx => conv_std_logic_vector(xirq, 8),
xaddr => conv_std_logic_vector(xaddr, CFG_SYSBUS_CFG_ADDR_BITS),
xmask => conv_std_logic_vector(xmask, CFG_SYSBUS_CFG_ADDR_BITS),
vid => VENDOR_GNSSSENSOR,
did => GNSSSENSOR_ETHMAC
);
constant xmstconfig : axi4_master_config_type := (
descrsize => PNP_CFG_MASTER_DESCR_BYTES,
descrtype => PNP_CFG_TYPE_MASTER,
vid => VENDOR_GNSSSENSOR,
did => GAISLER_ETH_MAC_MASTER
);
constant xmstconfig2 : axi4_master_config_type := (
descrsize => PNP_CFG_MASTER_DESCR_BYTES,
descrtype => PNP_CFG_TYPE_MASTER,
vid => VENDOR_GNSSSENSOR,
did => GAISLER_ETH_EDCL_MASTER
);
type local_addr_array_type is array (0 to CFG_WORDS_ON_BUS-1)
of std_logic_vector(15 downto 0);
type registers is record
ctrl : eth_control_type;
raddr : local_addr_array_type;
end record;
signal r, rin : registers;
signal imac_cmd : eth_command_type;
signal omac_status : eth_mac_status_type;
signal omac_rdbgdata : std_logic_vector(31 downto 0);
signal omac_tmsto : eth_tx_ahb_in_type;
signal imac_tmsti : eth_tx_ahb_out_type;
signal omac_tmsto2 : eth_tx_ahb_in_type;
signal imac_tmsti2 : eth_tx_ahb_out_type;
signal omac_rmsto : eth_rx_ahb_in_type;
signal imac_rmsti : eth_rx_ahb_out_type;
signal wb_dev_rdata : std_logic_vector(CFG_SYSBUS_DATA_BITS-1 downto 0);
signal wb_bus_raddr : global_addr_array_type;
signal w_bus_re : std_logic;
signal wb_bus_waddr : global_addr_array_type;
signal w_bus_we : std_logic;
signal wb_bus_wstrb : std_logic_vector(CFG_SYSBUS_DATA_BYTES-1 downto 0);
signal wb_bus_wdata : std_logic_vector(CFG_SYSBUS_DATA_BITS-1 downto 0);
begin
slv0 : axi4_slave generic map (
async_reset => async_reset
) port map (
i_clk => clk,
i_nrst => rst,
i_xcfg => xslvconfig,
i_xslvi => slvi,
o_xslvo => slvo,
i_ready => '1',
i_rdata => wb_dev_rdata,
o_re => w_bus_re,
o_r32 => open,
o_radr => wb_bus_raddr,
o_wadr => wb_bus_waddr,
o_we => w_bus_we,
o_wstrb => wb_bus_wstrb,
o_wdata => wb_bus_wdata
);
comb : process(r, ethi, omac_rdbgdata, omac_status, rst, w_bus_re,
wb_bus_raddr, wb_bus_waddr, w_bus_we, wb_bus_wstrb, wb_bus_wdata) is
variable v : registers;
variable vcmd : eth_command_type;
variable waddr : std_logic_vector(15 downto 0);
variable vrdata : std_logic_vector(CFG_SYSBUS_DATA_BITS-1 downto 0);
variable wdata32 : std_logic_vector(31 downto 0);
variable val : std_logic_vector(8*CFG_ALIGN_BYTES-1 downto 0);
begin
v := r;
vcmd := eth_command_none;
for n in 0 to CFG_WORDS_ON_BUS-1 loop
v.raddr(n) := wb_bus_raddr(n)(17 downto log2(CFG_ALIGN_BYTES));
val := (others => '0');
if (ramdebug = 0) or (r.raddr(n)(15 downto 14) = "00") then
case r.raddr(n)(3 downto 0) is
when "0000" => --ctrl reg
if ramdebug /= 0 then
val(13) := r.ctrl.ramdebugen;
end if;
if (edcl /= 0) then
val(31) := '1';
val(30 downto 28) := bufsize;
val(14) := r.ctrl.edcldis;
val(12) := r.ctrl.disableduplex;
end if;
if enable_mdint = 1 then
val(26) := '1';
val(10) := r.ctrl.pstatirqen;
end if;
if multicast = 1 then
val(25) := '1';
val(11) := r.ctrl.mcasten;
end if;
if rmii = 1 then
val(7) := omac_status.speed;
end if;
val(6) := omac_status.reset;
val(5) := r.ctrl.prom;
val(4) := omac_status.full_duplex;
val(3) := r.ctrl.rx_irqen;
val(2) := r.ctrl.tx_irqen;
val(1) := omac_status.rxen;
val(0) := omac_status.txen;
when "0001" => --status/int source reg
val(9) := not (omac_status.edcltx_idle or omac_status.edclrx_idle);
if enable_mdint = 1 then
val(8) := omac_status.phystat;
end if;
val(7) := omac_status.invaddr;
val(6) := omac_status.toosmall;
val(5) := omac_status.txahberr;
val(4) := omac_status.rxahberr;
val(3) := omac_status.tx_int;
val(2) := omac_status.rx_int;
val(1) := omac_status.tx_err;
val(0) := omac_status.rx_err;
when "0010" => --mac addr lsb
val := r.ctrl.mac_addr(31 downto 0);
when "0011" => --mac addr msb/mdio address
val(15 downto 0) := r.ctrl.mac_addr(47 downto 32);
when "0100" => --mdio ctrl/status
val(31 downto 16) := omac_status.mdio.cmd.data;
val(15 downto 11) := r.ctrl.mdio_phyadr;
val(10 downto 6) := omac_status.mdio.cmd.regadr;
val(3) := omac_status.mdio.busy;
val(2) := omac_status.mdio.linkfail;
val(1) := omac_status.mdio.cmd.read;
val(0) := omac_status.mdio.cmd.write;
when "0101" => --tx descriptor
val(31 downto 10) := r.ctrl.txdesc;
val(9 downto 3) := omac_status.txdsel;
when "0110" => --rx descriptor
val(31 downto 10) := r.ctrl.rxdesc;
val(9 downto 3) := omac_status.rxdsel;
when "0111" => --edcl ip
if (edcl /= 0) then
val := r.ctrl.edclip;
end if;
when "1000" =>
if multicast = 1 then
val := r.ctrl.hash(63 downto 32);
end if;
when "1001" =>
if multicast = 1 then
val := r.ctrl.hash(31 downto 0);
end if;
when "1010" =>
if edcl /= 0 then
val(15 downto 0) := r.ctrl.emacaddr(47 downto 32);
end if;
when "1011" =>
if edcl /= 0 then
val := r.ctrl.emacaddr(31 downto 0);
end if;
when others => null;
end case;
elsif r.raddr(n)(15 downto 14) = "01" then
if ramdebug /= 0 then
vcmd.dbg_access_id := DBG_ACCESS_TX_BUFFER;
vcmd.dbg_rd_ena := r.ctrl.ramdebugen;
vcmd.dbg_addr := r.raddr(n)(13 downto 0);
val := omac_rdbgdata;
end if;
elsif r.raddr(n)(15 downto 14) = "10" then
if ramdebug /= 0 then
vcmd.dbg_access_id := DBG_ACCESS_RX_BUFFER;
vcmd.dbg_rd_ena := r.ctrl.ramdebugen;
vcmd.dbg_addr := r.raddr(n)(13 downto 0);
val := omac_rdbgdata;
end if;
elsif r.raddr(n)(15 downto 14) = "11" then
if (ramdebug = 2) and (edcl /= 0) then
vcmd.dbg_access_id := DBG_ACCESS_EDCL_BUFFER;
vcmd.dbg_rd_ena := r.ctrl.ramdebugen;
vcmd.dbg_addr := r.raddr(n)(13 downto 0);
val := omac_rdbgdata;
end if;
end if;
vrdata(8*CFG_ALIGN_BYTES*(n+1)-1 downto 8*CFG_ALIGN_BYTES*n) := val;
end loop;
if w_bus_we = '1' then
for n in 0 to CFG_WORDS_ON_BUS-1 loop
waddr := wb_bus_waddr(n)(17 downto 2);
wdata32 := wb_bus_wdata(8*CFG_ALIGN_BYTES*(n+1)-1 downto 8*CFG_ALIGN_BYTES*n);
if wb_bus_wstrb(CFG_ALIGN_BYTES*(n+1)-1 downto CFG_ALIGN_BYTES*n) /= "0000" then
if (ramdebug = 0) or (waddr(15 downto 14) = "00") then
case waddr(3 downto 0) is
when "0000" => --ctrl reg
if ramdebug /= 0 then
v.ctrl.ramdebugen := wdata32(13);
end if;
if edcl /= 0 then
v.ctrl.edcldis := wdata32(14);
v.ctrl.disableduplex := wdata32(12);
end if;
if multicast = 1 then
v.ctrl.mcasten := wdata32(11);
end if;
if enable_mdint = 1 then
v.ctrl.pstatirqen := wdata32(10);
end if;
if rmii = 1 then
vcmd.set_speed := wdata32(7);
vcmd.clr_speed := not wdata32(7);
end if;
vcmd.set_reset := wdata32(6);
vcmd.clr_reset := not wdata32(6);
v.ctrl.prom := wdata32(5);
vcmd.set_full_duplex := wdata32(4);
vcmd.clr_full_duplex := not wdata32(4);
v.ctrl.rx_irqen := wdata32(3);
v.ctrl.tx_irqen := wdata32(2);
vcmd.set_rxena := wdata32(1);
vcmd.clr_rxena := not wdata32(1);
vcmd.set_txena := wdata32(0);
vcmd.clr_txena := not wdata32(0);
when "0001" => --status/int source reg
if enable_mdint = 1 then
vcmd.clr_status_phystat := wdata32(8);
end if;
vcmd.clr_status_invaddr := wdata32(7);
vcmd.clr_status_toosmall := wdata32(6);
vcmd.clr_status_txahberr := wdata32(5);
vcmd.clr_status_rxahberr := wdata32(4);
vcmd.clr_status_tx_int := wdata32(3);
vcmd.clr_status_rx_int := wdata32(2);
vcmd.clr_status_tx_err := wdata32(1);
vcmd.clr_status_rx_err := wdata32(0);
when "0010" => --mac addr lsb
v.ctrl.mac_addr(31 downto 0) := wdata32(31 downto 0);
when "0011" => --mac addr msb
v.ctrl.mac_addr(47 downto 32) := wdata32(15 downto 0);
when "0100" => --mdio ctrl/status
if enable_mdio = 1 then
vcmd.mdio_cmd.valid := not omac_status.mdio.busy;
if omac_status.mdio.busy = '0' then
v.ctrl.mdio_phyadr := wdata32(15 downto 11);
end if;
vcmd.mdio_cmd.data := wdata32(31 downto 16);
vcmd.mdio_cmd.regadr := wdata32(10 downto 6);
vcmd.mdio_cmd.read := wdata32(1);
vcmd.mdio_cmd.write := wdata32(0);
end if;
when "0101" => --tx descriptor
vcmd.set_txdsel := '1';
vcmd.txdsel := wdata32(9 downto 3);
v.ctrl.txdesc := wdata32(31 downto 10);
when "0110" => --rx descriptor
vcmd.set_rxdsel := '1';
vcmd.rxdsel := wdata32(9 downto 3);
v.ctrl.rxdesc := wdata32(31 downto 10);
when "0111" => --edcl ip
if (edcl /= 0) then
v.ctrl.edclip := wdata32;
end if;
when "1000" => --hash msb
if multicast = 1 then
v.ctrl.hash(63 downto 32) := wdata32;
end if;
when "1001" => --hash lsb
if multicast = 1 then
v.ctrl.hash(31 downto 0) := wdata32;
end if;
when "1010" =>
if edcl /= 0 then
v.ctrl.emacaddr(47 downto 32) := wdata32(15 downto 0);
end if;
when "1011" =>
if edcl /= 0 then
v.ctrl.emacaddr(31 downto 0) := wdata32;
end if;
when others => null;
end case;
elsif waddr(15 downto 14) = "01" then
if ramdebug /= 0 then
vcmd.dbg_access_id := DBG_ACCESS_TX_BUFFER;
vcmd.dbg_wr_ena := r.ctrl.ramdebugen;
vcmd.dbg_addr := waddr(13 downto 0);
vcmd.dbg_wdata := wdata32;
end if;
elsif waddr(15 downto 14) = "10" then
if ramdebug /= 0 then
vcmd.dbg_access_id := DBG_ACCESS_RX_BUFFER;
vcmd.dbg_wr_ena := r.ctrl.ramdebugen;
vcmd.dbg_addr := waddr(13 downto 0);
vcmd.dbg_wdata := wdata32;
end if;
elsif waddr(15 downto 14) = "11" then
if (ramdebug = 2) and (edcl /= 0) then
vcmd.dbg_access_id := DBG_ACCESS_EDCL_BUFFER;
vcmd.dbg_wr_ena := r.ctrl.ramdebugen;
vcmd.dbg_addr := waddr(13 downto 0);
vcmd.dbg_wdata := wdata32;
end if;
end if;
end if;
end loop;
end if;
------------------------------------------------------------------------------
-- RESET ----------------------------------------------------------------------
-------------------------------------------------------------------------------
if rst = '0' then
v.ctrl.tx_irqen := '0';
v.ctrl.rx_irqen := '0';
v.ctrl.prom := '0';
v.ctrl.pstatirqen := '0';
v.ctrl.mcasten := '0';
v.ctrl.ramdebugen := '0';
if edcl = 3 then
v.ctrl.edcldis := ethi.edcldisable;
elsif edcl /= 0 then
v.ctrl.edcldis := '0';
end if;
v.ctrl.disableduplex := '0';
if phyrstadr /= 32 then
v.ctrl.mdio_phyadr := conv_std_logic_vector(phyrstadr, 5);
else
v.ctrl.mdio_phyadr := ethi.phyrstaddr;
end if;
v.ctrl.mac_addr := (others => '0');
v.ctrl.txdesc := (others => '0');
v.ctrl.rxdesc := (others => '0');
v.ctrl.hash := (others => '0');
v.ctrl.edclip := conv_std_logic_vector(ipaddrh, 16) &
conv_std_logic_vector(ipaddrl, 16);
v.ctrl.emacaddr := conv_std_logic_vector(macaddrh, 24) &
conv_std_logic_vector(macaddrl, 24);
if edcl > 1 then
v.ctrl.edclip(3 downto 0) := ethi.edcladdr;
v.ctrl.emacaddr(3 downto 0) := ethi.edcladdr;
end if;
v.raddr(0) := (others => '0');
v.raddr(1) := (others => '0');
end if;
rin <= v;
imac_cmd <= vcmd;
wb_dev_rdata <= vrdata;
end process;
slvcfg <= xslvconfig;
mstcfg <= xmstconfig;
mstcfg2 <= xmstconfig2;
eth64 : grethc64 generic map (
memtech => memtech,
ifg_gap => ifg_gap,
attempt_limit => attempt_limit,
backoff_limit => backoff_limit,
mdcscaler => mdcscaler,
enable_mdio => enable_mdio,
fifosize => fifosize,
nsync => nsync,
edcl => edcl,
edclbufsz => edclbufsz,
macaddrh => macaddrh,
macaddrl => macaddrl,
ipaddrh => ipaddrh,
ipaddrl => ipaddrl,
phyrstadr => phyrstadr,
rmii => rmii,
oepol => oepol,
scanen => scanen,
mdint_pol => mdint_pol,
enable_mdint => enable_mdint,
multicast => multicast,
edclsepahbg => edclsepahbg,
ramdebug => ramdebug,
mdiohold => mdiohold,
maxsize => maxsize,
gmiimode => gmiimode
) port map (
rst => rst,
clk => clk,
ctrli => r.ctrl,
cmdi => imac_cmd,
statuso => omac_status,
rdbgdatao => omac_rdbgdata,
--irq
irq => irq,
--ethernet input signals
rmii_clk => ethi.rmii_clk,
tx_clk => ethi.tx_clk,
rx_clk => ethi.rx_clk,
tx_dv => ethi.tx_dv,
rxd => ethi.rxd,
rx_dv => ethi.rx_dv,
rx_er => ethi.rx_er,
rx_col => ethi.rx_col,
rx_en => ethi.rx_en,
rx_crs => ethi.rx_crs,
mdio_i => ethi.mdio_i,
phyrstaddr => ethi.phyrstaddr,
mdint => ethi.mdint,
--ethernet output signals
reset => etho.reset,
txd => etho.txd,
tx_en => etho.tx_en,
tx_er => etho.tx_er,
mdc => etho.mdc,
mdio_o => etho.mdio_o,
mdio_oe => etho.mdio_oe,
testrst => '0',
testen => '0',
testoen => '0',
edcladdr => ethi.edcladdr,
edclsepahb => ethi.edclsepahb,
edcldisable => ethi.edcldisable,
speed => etho.speed,
tmsto => omac_tmsto,
tmsti => imac_tmsti,
tmsto2 => omac_tmsto2,
tmsti2 => imac_tmsti2,
rmsto => omac_rmsto,
rmsti => imac_rmsti
);
etho.tx_clk <= '0';
etho.gbit <= '0';
--! AXI Master interface providing DMA access
axi0 : eth_axi_mst port map (
rst,
clk,
msti,
msto,
omac_tmsto,
imac_tmsti,
omac_rmsto,
imac_rmsti
);
edclmst_on : if edclsepahbg = 1 generate
axi1 : eth_axi_mst port map (
rst,
clk,
msti,
msto2,
omac_tmsto2,
imac_tmsti2,
eth_rx_in_none,
open
);
end generate;
edclmst_off : if edclsepahbg = 0 generate
msto2 <= axi4_master_out_none;
imac_tmsti2.grant <= '0';
imac_tmsti2.data <= (others => '0');
imac_tmsti2.ready <= '0';
imac_tmsti2.error <= '0';
imac_tmsti2.retry <= '0';
end generate;
regs : process(clk) is
begin
if rising_edge(clk) then r <= rin; end if;
end process;
end architecture;
| apache-2.0 | be922baba100a6c2ec476ef64bdd5fb1 | 0.497769 | 3.675281 | false | false | false | false |
sergeykhbr/riscv_vhdl | vhdl/rtl/riverlib/core/regibank.vhd | 1 | 5,821 | --!
--! Copyright 2019 Sergey Khabarov, [email protected]
--!
--! Licensed under the Apache License, Version 2.0 (the "License");
--! you may not use this file except in compliance with the License.
--! You may obtain a copy of the License at
--!
--! http://www.apache.org/licenses/LICENSE-2.0
--!
--! Unless required by applicable law or agreed to in writing, software
--! distributed under the License is distributed on an "AS IS" BASIS,
--! WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
--! See the License for the specific language governing permissions and
--! limitations under the License.
--!
library ieee;
use ieee.std_logic_1164.all;
use IEEE.std_logic_arith.all; -- UNSIGNED function
use ieee.std_logic_misc.all; -- or_reduce()
library commonlib;
use commonlib.types_common.all;
--! RIVER CPU specific library.
library riverlib;
--! RIVER CPU configuration constants.
use riverlib.river_cfg.all;
entity RegBank is generic (
async_reset : boolean;
fpu_ena : boolean
);
port (
i_clk : in std_logic; -- CPU clock
i_nrst : in std_logic; -- Reset. Active LOW.
i_radr1 : in std_logic_vector(5 downto 0); -- Port 1 read address
o_rdata1 : out std_logic_vector(RISCV_ARCH-1 downto 0); -- Port 1 read value
o_rhazard1 : out std_logic;
i_radr2 : in std_logic_vector(5 downto 0); -- Port 2 read address
o_rdata2 : out std_logic_vector(RISCV_ARCH-1 downto 0); -- Port 2 read value
o_rhazard2 : out std_logic;
i_waddr : in std_logic_vector(5 downto 0); -- Writing value
i_wena : in std_logic; -- Writing is enabled
i_whazard : in std_logic;
i_wtag : in std_logic_vector(3 downto 0);
i_wdata : in std_logic_vector(RISCV_ARCH-1 downto 0); -- Writing value
o_wtag : out std_logic_vector(3 downto 0);
i_dport_addr : in std_logic_vector(5 downto 0); -- Debug port address
i_dport_ena : in std_logic; -- Debug port is enabled
i_dport_write : in std_logic; -- Debug port write is enabled
i_dport_wdata : in std_logic_vector(RISCV_ARCH-1 downto 0); -- Debug port write value
o_dport_rdata : out std_logic_vector(RISCV_ARCH-1 downto 0);-- Debug port read value
o_ra : out std_logic_vector(RISCV_ARCH-1 downto 0); -- Return address for branch predictor
o_sp : out std_logic_vector(RISCV_ARCH-1 downto 0) -- Stack Pointer for the borders control
);
end;
architecture arch_RegBank of RegBank is
constant REG_MSB : integer := 4 + conv_integer(fpu_ena);
constant REGS_TOTAL : integer := 2**(REG_MSB + 1);
type reg_score_type is record
val : std_logic_vector(RISCV_ARCH-1 downto 0);
tag : std_logic_vector(3 downto 0);
hazard : std_logic;
end record;
type MemoryType is array (0 to REGS_TOTAL-1) of reg_score_type;
type RegistersType is record
mem : MemoryType;
end record;
signal r, rin : RegistersType;
begin
comb : process(i_nrst, i_radr1, i_radr2, i_waddr, i_wena, i_whazard, i_wtag, i_wdata,
i_dport_ena, i_dport_write, i_dport_addr, i_dport_wdata, r)
variable v : RegistersType;
variable int_waddr : integer;
variable int_daddr : integer;
begin
for i in 0 to REGS_TOTAL-1 loop
v.mem(i).hazard := r.mem(i).hazard;
v.mem(i).val := r.mem(i).val;
v.mem(i).tag := r.mem(i).tag;
end loop;
int_waddr := conv_integer(i_waddr(REG_MSB downto 0));
int_daddr := conv_integer(i_dport_addr(REG_MSB downto 0));
--! Debug port has higher priority. Collision must be controlled by SW
if (i_dport_ena and i_dport_write) = '1' then
if or_reduce(i_dport_addr) = '1' then
v.mem(int_daddr).val := i_dport_wdata;
v.mem(int_daddr).hazard := '0';
end if;
elsif i_wena = '1' and or_reduce(i_waddr(REG_MSB downto 0)) = '1' then
if i_wtag = r.mem(int_waddr).tag then
v.mem(int_waddr).hazard := i_whazard;
v.mem(int_waddr).val := i_wdata;
v.mem(int_waddr).tag := r.mem(int_waddr).tag + 1;
end if;
end if;
if not async_reset and i_nrst = '0' then
v.mem(Reg_Zero).hazard := '0';
v.mem(Reg_Zero).val := (others => '0');
v.mem(Reg_Zero).tag := (others => '0');
for i in 1 to REGS_TOTAL-1 loop
v.mem(i).hazard := '0';
v.mem(i).val := X"00000000FEEDFACE";
v.mem(i).tag := (others => '0');
end loop;
end if;
rin <= v;
end process;
o_rdata1 <= r.mem(conv_integer(i_radr1(REG_MSB downto 0))).val;
o_rhazard1 <= r.mem(conv_integer(i_radr1(REG_MSB downto 0))).hazard;
o_rdata2 <= r.mem(conv_integer(i_radr2(REG_MSB downto 0))).val;
o_rhazard2 <= r.mem(conv_integer(i_radr2(REG_MSB downto 0))).hazard;
o_wtag <= r.mem(conv_integer(i_waddr(REG_MSB downto 0))).tag;
o_dport_rdata <= r.mem(conv_integer(i_dport_addr(REG_MSB downto 0))).val;
o_ra <= r.mem(Reg_ra).val;
o_sp <= r.mem(Reg_sp).val;
-- registers:
regs : process(i_nrst, i_clk)
begin
if async_reset and i_nrst = '0' then
r.mem(Reg_Zero).hazard <= '0';
r.mem(Reg_Zero).val <= (others => '0');
r.mem(Reg_Zero).tag <= (others => '0');
for i in 1 to REGS_TOTAL-1 loop
r.mem(i).hazard <= '0';
r.mem(i).val <= X"00000000FEEDFACE";
r.mem(i).tag <= (others => '0');
end loop;
elsif rising_edge(i_clk) then
for i in 0 to REGS_TOTAL-1 loop
r.mem(i).hazard <= rin.mem(i).hazard;
r.mem(i).val <= rin.mem(i).val;
r.mem(i).tag <= rin.mem(i).tag;
end loop;
end if;
end process;
end;
| apache-2.0 | 1efb73b043b71633224c8e329a178a4d | 0.595087 | 3.198352 | false | false | false | false |
szanni/aeshw | zybo-base/zybo_bsd/zybo_bsd.srcs/sources_1/bd/system/ip/system_auto_pc_5/fifo_generator_v11_0/fifo_generator_v11_0_defaults.vhd | 19 | 30,145 | `protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
lHZAv/MVAAt3F19GG6CyO2D9ozHTHXUyHUqVqPhHJ9Up8V3v4BMtL2rZCdPHvvrLl9m3lxdPLeMd
yZjuwpNKug==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
V11pDh2GdTX922gInHRdE4PGQC5LocLJP7s9hbeXjPbTiX/dPLHGusbEN2B0toY0K8U4vuWNSniM
1aH2SNR2JV5BnhJYTc5D8l2e07TnA0V6ktY1z+NOBfbsIHPai5FO4rlYQdX0gfNxjRiE4WpTGufJ
+8B9yaPmasK5qJ0hmyc=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2013_09", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
0akrUk3wQb4EqzKkib7F59nSOOeoy+q3qc0fQDYykXO49Ll/FgY0ewL69TWySlFx1Cac/+BCy6vf
iumuPLpTjOS55mFm1JTMxYzM9NsagXEQHLi1lEkcr65/dw7cjFH/RPICXrv18S5beJM408VyZvsr
NCAeZ9gbVAaeGzkHq6VNPIh/P5GGGWEK3241GOn4p1v1t2GkteaDbOSjGK7wX7a4kTfRzrAH+xYH
86BcPdOp3oyEseFdQgL0BZboHxt4zJr0bXL7Ln+oOm7kGCKk4PXPdudDDSsXKQUPtDHqr2MHJwZk
LDVjKe6pX7e2DnCF/lojAxyhWqtc4aJmRRvYWw==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
P2FMFi4MUNbCcmQEmOw8kkGKpCf5liEfyrVflbrNDPfCQyQhrfO1z3elwJF/eYuRk4Q8ng49IhJM
QbJUTOajY+rTGsCSJpmNj13e1oNpCtCwEA2TBzHdzEyAxDwQ0hUh3ZqnFSNQ0MMnavo9wEIKRylK
MAHL5TjDsmLJG1Zi4ZQ=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
GFuz3jjDcNus13vZfabnTsKTQz9Q9tOYpUUTv0v99miJHiWg9X4Bm37tDSsBPgge2ZWYV/fIZNhM
o9RFowO2ZPIK8CdMOp5y1r9QlxbgxiEVYj1tH56LRgvbv2A1ghGFDDY3Qvyz5G2dmEuSZ/58uAtK
A8Mm1zy2Ln16qChURWHrjkDuCcIOuGQ1GysEn2sqg3E/XWxojTbAmy+LaQrAOqIwoDTGFZ/Ek5fe
49U6fyDbugt8sjMOq32EEkOAQwWmc5uVOZWv3KIDCD6tRxPMIg8J9cwcCTEoanlasaaRs9KqN5go
7g24OWiCSjQz8Pf4KXR9USnCWt9Xh2mPsrZAPg==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 20576)
`protect data_block
Im59AZ0tyI9QVvGpilKg9HEOiAHuKQ2NKYRjb1pd0X7WwD7SaI6W4ecFLl1slrZiOg38vNT2jeLC
sUifOcYtYKBpwUhczYuM0NU8ofXJE+tVEcgK0WeUxBa3Nm3JxIY8ceE0NiVlhzqucj6Zs6YSrTVR
IzoeekVAa08tJhIKjoAlFSa9wyTBR9RhdCoCDrL9mX0yChKzY08VowGrwE1Vx+je849cntpZtWLj
UyErf3AoiR5zlyY6+F9+ZJu0iKZ5kSqPVAsIbJdASVNhiUP9Gb2tkTyXlEqtQ2Q7TdzbUXD1P+e4
RIW0EDv1PJV3dgWa35jqC7S/Abo4GdaYudtrFmvXPh15P2UAEcIkAL2sXmw9Cq9e2/B3fe2h2WHZ
R6HRrugJiKb9Kz4zHzk0tE46PnEhGKJ3uPPTdumTTx0Jd9X3oCMvA/aBXYLuhkOXpwlU00ghdBZU
Hn9nPe9Zr3JJ+jddZRs7qhIGWWbrBF0wXoikisln23kFC+AL+KHs1AxGfnJCltH9K2SkN1vgrg3Y
E4eW7JQuIrHSKptWbTNSDTwyCpiUpFlOBRxz3JQqZkoSi7Q63rmxJmjre1xnMQDi+2F4PTZxCebB
vT/Clet4j9ITo998fieOV305e2SMayJ8sOY9kIOju5cxqL1xjxVk0J6nQvYkGMgwWd84+nqKMDQz
1bx3tnOa79cF8e1MXUAtikBEn3lqLZMHaI5Bwbx7Etf4/S+QyIwrcAhl4FHKc5RYRPchLN54KOKX
euUf+yQHDpRXmnhW3cI/7lZuUNLiHs33rZnSYUfp1Xr6zR/sZgQfFx+wWEZ+OCTLEyXq6qCxehKK
duezfDNrScrAS0i2JoIAe4i9ZKUBysFPkAD7HB1sircS37ZiKPgpcpdJiQzQKdB8A/eUfSV+wUcB
beubHqWWnfiLG42+Pm/ch9mX/4JcB763jWCEv4/J25vEG7R2xrWoZwfUKZv2M9PZKDY1ilna/ukW
N5Ok3Z9MPcXgnkQe28lofLwhehMtMAzVga4/e0ohQx9YzZHPN1hzfyW8A/k9HZiWY5v0tB7AGxkn
EruAVlGypO+UuTmayWJK2c9voLBVqfi8G+7+F+7PKZuyjIE62Vb3l8CFanvDr6S62IShU0gQ/xEc
C3at4n1VQvcTLLqAAgj2ev3R+JRK7KuksWvR5bb0OxzCat7j50CsKkecb/LfHXlEXBymQFbRzQyz
4d2qN/xHwTrpuixP25+4xuVBDCStx+os8A6IZ5qMe+kXMzjPqP+oJdJ4q20qsddfvb2nvZ4gHoLQ
NubwrmPtY356WeGGMnw9VHFc8OSs+MIEWQckOCjD5xhY7/LqUeui8Z1tIXvf0xS1RgLdzTRLWdRi
q4WOPSla7ee7S7dVZYAS3ki4sfgP6PVIhLjVexJxiMg/QtebgO6+HhKTeCMVoSJA8oSTTczyaSCw
SJqsZQpEKkN1Dm3F8IXAw+1yXZ6ROly7Z5BKBySqGuuexMEDibabYf9+FuElZll2TIK+s7UCTGFn
nu56mztixpSo2nxIjDJO1WS63u8a29uMYCXqGn7Nz9BBUrdbNQX6EhWhxZlbFrecwYYwYQoDANvq
lE6NhMmmqnIe3+SANBuo2572QPOzGOSVg5T+RGCfklwmzIn1WV9xHbI/yPJwr18TEt+PpGVq69Uc
GzFNUYEG8KNUB6muas3VcKvNxEphXlR41nRbzZTcaqwKKTLfyuzKG1uII9ThR1Yzvz6kgulpA1EQ
haJ5FWO6GJV7rXhSeBhKyG5EAUMRfcGkkuK5lsI1XYJZO5fJlKrkvMhrrDz+hMBjKnYWNoVNNIO0
uHjMWiUmuhXUif1KsOSbtWRGwdVsJigADeSYSgva8y2e4fVqkk5L2MAdj6BKueGLcxwboaodgZ+D
2QkfleRhz3zg8sy+CbLzaEFt1Fdo0HE9TPufWW6Mlw0RXqFxhqacm8lH1YF6IVXMwmLb89qp/LPc
lEOJ977Ns11Ibpv0bBtmceaPPhPNcQw9d+1bNalzHZaYnJELuMM8vkq3K0jWaJq8uG8XUKdDsXya
dh5HDBbZNOyD1MHPf74HB96huuOE/RRRA2OnlOx2RHx+oN9wFgA7/eHGylLsGs5xEZobwPAA/1xx
hKkLtdnHto/XQ+hrMDGm1GmvQ17RriZ7o/qhfjaCm/R4qW9Tij4zUEmhA1486zZPGIbW7Y3V0SpB
97ll26rJpijNMTUcu7DysTPAkbWvP9R08XcDn0k4wP4GdtPh6lP2fwPUKvBuO298ExnPt+G/7pHB
tKyIoB3T2/vLGoaW2/9EKFvs2JZZawize7NukAUFf24F6fp+QsXGVsRDh5ZhBBrD2wt/hvwi3hoj
RoTuwtQuRagCJzB5ZD84Aqc6UV0R/PrNMXXm1VXot3HROrD0qTkEo+1BmwX1puEBpd7cs7VpIHTw
hlw9PVHHQRgREJU0azV5978j2yK7wmdJ6Km9lbuGL1FUm7NewZjQP2bYCEM+l7Oft2STO7ndmFV8
9RelzQqOddxtZEDpCYZf2HrdDru6P+ohxrrR0SAcbThmi3neXkATR3D4r5BSAGT6s33hbjXtegHM
NhDCfnU5xC9i77597wARVfxpethuKJ0euNZNhUtv+XFVWj8VlzL6GCyzqRZryB7MkTnfiWVTFeLi
wwu9UVK9mcYLFi4Hlag/ssgdudHLnoqAys/MHb69RtYHQyn24Ex6bCST7gGoxRZGL+Mi3hTgP3aS
uPI9zc2DzmBp4DC/Usb7Soo4lDgcI7ZVIH+IV8rSi8zP3bRQ1XWXUCcDKlRGboJIo+vuV4D5jZ6/
ZZ2QHvGGABNyrpOR7Gw+fiZsWWluXSrBQqvIef/xuOMNg0zIXpfHznRoJg5tzs8JL3B/CfepfFyx
f2f5JepxChNszbF/R3/zbIGKQP1TyjSG6jIuwueid02fNy2ehbB55HmV/lGLa+/GJLZHVVIhbr3h
oIRfWia2Bu+BaMRbL/asbTxUBW1Vvtj8uYUdbqDwMxXrGzWk/YHX3s77lfpNtDBGbqzz/v1bWYy0
ORCHZ+75I9jjqBFjpZryruTahI+MP6maNSapiCs/28mBwWDHZg9TFIb5DJSC72NoLzFm7yrBT0GL
GBWFFv8C4lrAVZ5D2+r0Y4mySL0ZRUmDGJz5fI3wKm04eC/lDlS709Cm7xAfhFW0Tt8ql6lCZPry
VjKzFVZjw5rv4G2uJ/pDjIIbDeB/fLy6HuOX6xqB24OdTnnpra3tRB2dXPD28sEFRGfpYFjk3ljs
22TipwAUaDVcOmm2vX90cT8fRLqGWaR3citIai/n67i9xU7aPLAquAC+U+X4yW415/IMKYJA6k4f
PcoUxVFKrOEyzQuNWD7Kx5LY8Y6ey35mcQ253K7sYyUvCOi04NN0yNW3aXSfrOeam/QFmJo5FSAt
zNkeSjI/5pFnqorgrDZdV2WHXsWZTjrEg3QjkWXazJQOVU+x1oJOQBlCDNmPm6haqNhtJ04K0+Ox
YG5ewcaDne0fmK2RwjXTg4NxN6aNhwV1UHKHeksAKDSJbQd1Iim4VtZ7bhyOhYAAlO+7TOEHQqDP
earFCGMB5PEfEDr2++UO7aDZQKSCMVtTekEojwpIojl5BeTUQslWSl33RjieWIJfrg/rr4EJ8vvL
ov0TxeHW2fCCXEdzpUDGTcMSNbVg08dLabhZFPnYTsROCT1wJUVtYPf++PHW6YmKRYwBaYtjOUyZ
JYr8UEb2dOQoFPB6bmPMZMoLTYnYZpsVkZAvBvf7NPnoI2bdRKxGRdTctgLC5JsUQ/JP9eLcnApx
gLbVfI/O91X+DZJk5JDWmxpRw3n4gYz6iuFwPc4ZoMKxX5BpUVhgR9K2yfEWiIN6ukTZJF115k3R
ipqV/yntBarqL56QDHKEeJyCCF/zMUefVjknln4DRHGqnkb0ulM+MVD5tzUKFymTfKrNd8DTu2Wz
pxJXkm83EuisQ2IhuRrc3OQm4lWKDKDForm4hsWZWB0lK+piYakQDP1vKxeQOkklVqkmdbe6MffZ
3UX+1sN1OmJ8UKFaBeaEy3I/rJMqFBdJbFFLsTSjXJ9T5Jkl68DuQdfNbobPIHf3prEKWe5vdHZ4
P8TULZgji6zWcY0xo3VOsN6Gsh0E6nnnvDNBaoOlkX5qhjPe1Qh5wgFnn4pYDjgz4zYrhdCf5hxp
EWMx/caiUeu2wAZpyMj//wRTbP/stCohT37t6skQnj7YlX+RUd/IDlHlvdJaBaq08+D/eU0hVFkT
KmxKx2LooygZVZdONEdaBGfyq+15pnkYKBFB+mf2xVcrgGQUpUL0n+oAk60U0L8lxtO3H9nCF/ae
XjTV7LEANAVByqSJUOnl1t2Q30zWE9bVi3NyMsCH+WnnRe5fnKmr72Les+4keDnQjubGxENAnJYq
NnOS5YlfP33TzYF5QGgjtDwzJf9JFRBtAxEtU+kDZe53oCsJ77xZnhvpsQZduo3daAu3HAbKI8ZU
pFUvjXgsiFtbqpVCdLy+kd6+voPN3GcqB7f/i0qVGN580FgyZNf2QvqULLMB9nOv06mGb4LFoPGr
Lh806W+gQTM0P3smgwJede6pEIPsUpJpvVh8c3zCbfS473HwpBAY9m7m5OZ38UI0WVxHZ4oBeSKk
rQDAyYRvWyG9dH9hXRXO+VCIVQJgKwWelfGAq7yPUeGyww5vmDaOo/3IGionUM3aLtGXNhb4jV1E
QhosSqUH/X+IFYi1BCD6z/f5P7AdGEYwynl3ST54WrQFXhq/5IU2cRe7i1ySv3+Tr4hqnAv4XxYm
ohawa15c7ppzhUU+i0W3iozD6QcOI2XHA6Tmp27BKHf7yC5Uze8d9gF1CLmJvCYJV3MiwsdiuPPK
gWetq57i1quSzAKB1xFgPgzJhv162e23IOSsbDqTLbddcG8a+z8ooI3/rV2zekIIu3TN3x/Lg0Us
s73lHmRzLqeSVuQaJw5ENLE+Pvf3oUVY30Uic4zRYd6ao8sNhHJByi7k/Co6kxVDp0+juqdlgocg
Un/oSYtN1OXqnQJIoaVpgYRIXsSgkVyFBF4tI9zrDgWn1ERyELvHObAPeGzTjF7K/sabM/NA8dc8
UHv0BLoLsw5LEnSPFvcZuRydPWQ2SVROViOtwJV91U4JdV32PYbaBE9Rt4Wa9Bb6nvG/Y8kzIwfy
JuKZ4e8TuPzC8LH4rP7T5/0MQX4N3z47Q4O0X9eqVq7RaGc3pO9rjnGKbqWgSuso8IVURzZilIbw
ABkVOfyQWxYA8VWDkd6g2h6NQAruiGxjvciuZ3u3BPkbz0LSYHOlamv4DF3apsTCx8VXr5diqV9p
RhLKEwa9t4YrqcxuVKp4mUz4CMmjDW6p54F9t3ZjMxhLlGCzCJbgtsrlcSLQ2mLJGeYFN6ywQf4b
X0s1Q1hCD4mjaTiMmS7uKff+H9/ts+f/GGf+Qhb+Y6hqTHSyI596u9BFMRr+9iejaCSgQNFJ3wze
jKcmbqMxcxQqUxlL8xR9sxyRdEv1rNUzvV+o9b/iKRkkHndp5hjsjnlIAKCnSbD5aMC8MX3a/vVV
nkIvw9skzxgYH/4z6ptNy27lfj84sWhejbgPljRw/JXpkah23C8E/iH9Y2XUnNuYQX1cqp3AuOos
YEiA5yH44bKDEJ9Qpd65vbKVsoyEziPc72k95m7/P+y4Ghs+eUY8V1CKGsQNRGqpTe1bseATH2+v
1KZK5FfNt0pG1Pv1HzxE4FZVOzJSZrTNb5IXJye3bf8DIgcwBGFU+YUSIEqQFyptzZfjT3aZ7b59
RWlbFcFltT/BtNBqQOgaVcf3nDszO4I+RbCzBj5DK46CtNM1DqPaHOJ7OVAdy9bt7uZTIQy3SPXH
NZLWYvaj2KTh7JIQccblICUuYOIvi6PH4UI+SB36kGagi0+QqaAMLo7OodmGfBGTWTd06acBdSXl
3QomHfjlgZCBRS26xtjQy0w5g1ow+vaEVt+U2EcMjPLKK+4QWB/3tMqpd8kNm94rwDrfO/FqYaSu
dTF3+kCzqYO/iVXlc5NFxyzG9ZTx1ZqIo/E+J1kXEwhUWd9tBRewtjtF+OoLR3pklXGBHDZ5LxWQ
truHBLWK2/MaOeHhrgBtDKj/1mRrUEhcUWAVimy8XSb6hGkmjBDUeaP8U9OiS+IEVFCqgrPlOFae
UiVN3tgFfJRTDzvcRJ93eOnBfg/mt1xSrEbOToivfCpyFF17B/UkpJhcQXNVtJuSXbHn3y3In8qV
eZ0EEsl2Z0lijlNZ4LWzHLDU4tFUM6CgINaMCgtyB7AcN9FBeORT2Tnj2Ed57UEjdHZ4acnVR6ya
DghHwyJBf6KPoeZhiNaZqZUXHDwI/W0TxdXgjRiOpjk5lIOOLu+zNwN4e3WvtsMK/qaCF5jKA19e
iAosC3IOqIsKZCmv9x69+UamxkKsi4cUW6jhEqafWAu+jCkatqHke8yqI+n37qkr3c6yqDjMmuO7
QM09IhpXM1+cr+OItVAAratOT3oV2uEto6sMoIdYee3XPJKj5YgsH9OQbuXI1/vA1BhqzEwABmI2
mWMrvk0WJCrb3dvtfb6DwP8dFq387dNLU0plopitOJy11n0xEo0F/vhRAO5ZgfnajoIk2K1hlh7h
3Qx8TAex6XTwz6VUeJ2rFEgy+w72AQgXONpCANpMOHte39RkqaW1VQzjp9YpM7wOnKcWoA+PwSJw
Bn4pVigTKAP1okAsjg+e/7DaLGndG2LwzvgsQMSsz/5J1EoTvpEdXSU6bQLP+B3I7S4R5F821tNE
tswEdgC8lFGcU5p1ztM+vmEZYqgjtcXEiTdbe4gC1U1D5IBSjblhMdN5XMUnrTQaGBpZ4+J/AYWg
RIIfDT92d1XUB772kp9MfyN8IRG32mZwcin+N0f9+J1DHRS0T4piw0dTMovpUvMm8Yb672sqB0mk
OOBXlI8V5i023Hfiw0YKPJJY1kmn28bZ2RHlMxDriXgxJgD1cnSyxn6leV0YpAz7joSTF2zyq4Y6
+c+F+FPkzMpBH8BE1a81XRdPiIQGecMdWSAp+9iKIKaSJdXlQbMlS4b+lh/S4AyPu5f8BxCKJino
AkEug7HSnNYlM/ckc/EttcvKqsIQthpSRP/IHmXkKiixjwW13hDqzY05YyyHKQ+r0qo2KFx3GvIY
LfyGkSBv9SCdMNQmqgPqdCUM7WJlyh4cqQKppVXSBvFbOvPR82nBY2hXXKrIUJYTpfnyAqarELM9
8dSHgihE0xF1URQmCPil+9InXfZOVj4YFRW/EGgIUSQcPOZqVqnX0C/8fB2z2g/CHWJHkFJp+V1D
11ImYhq3cYHDs/wWzIHTpQ8mQCZXSH7+QVn8YXPKEs1Mqeb2kWL3HjgVMbuwvOc+wRaRgYoZfL4y
/AMCyMLwr4QowVvCIghJzh0zq+bUry00yEVNjUA7McuhRVBr745tobGdlLw27cN6Yy2qWK+vZtQt
tkcd1tcJGVYh691yaMiW/sAGEfzC1yzHil2xPKTfodTpj371gz3N12xdo6wXTQwUohFmtxgu+7ki
dPJTdJQ6uMtIbfCRWc+ZEMozHI2VWsbob8uI2hKK/Du+pgcni4Geg5QsV5KnYgbNFen9/bBw8EJu
o37XMnTrFTiHYwnV8Y3DJ92H4jZIucVXKoUPaUoIVblPuEoPlZfQnm5yllNjU4UF/CZXWhQt8Wv9
woCFRQHdFMcO/khUxVl9nR8IxrvNaH9wYHep2nCPjuKt22V3VDHbQDsiV3P1s6qlM5WBuSKv3lMu
LpukIpvGS3BhjPE8l1C12fLr7uTbxvIyeuFDRAuvTYAaBOrO1Io3AYNydWc7SAGq5nzfJzn2djNL
7QEgfaYfhVU552yduppXrH8BS1tYlLZBv1ovf5aesK30UD+WMPAFCjdXsOX/QWbvW03He2/0GQPF
PNzX9jW9TPkXnR3dHnt+CXbJmXuTocE7rJky39xZXNjbtBWuDoFOkxuSiAZW5OLzOjPZLrkdue6D
K90oEKnCQP6AAVYVqAFsEX6/h1tsXeSyX8Ya90YAvCJWdqqXiL/MNiW10aC71n08kESACtGUMjBP
2LRdvdX8M14vaJDPR8+3gRcMla9M1c/sfFHt1o+RDV2z81KwH558U4c3JGz3qQCqLVAXcTPoTRUr
Efair8zbcRanRrry+fUbxpRSGjS5pqmZd4F5OIrSpiRdX5akzmdmgSK20Yzi2vtNHNHDOqQy/1wm
gLnhXjsIwlRch5wNwAxHXzqdACKk/Ec0AWpuParr2t7za2w7sYUqttSx/SxbnYHIWHjzGEVHGW2J
nLwDf2yfqmqeIeGCb25Spm9XuLkmlilshTyene1/GDMe3BRHV2RGPCINxJs4SUUkBkOwDTypB29D
ixUS9kmUysptJPyqU9TTIIPhhz2d7091m+9Mk0iIrOIPIc4WPIc89CH3VQtSzgi75SdRARzxGPl/
hoKI20LS/gc+MWQHOqGeI4cF8oMQUbFWb3Ra04kG4hp6Ammh7Y0yeJ8WqY4ha13piMbrHmYvWVhJ
z1DZZhoLjK+FRWQ5I3L2DH4iVi6qSfwfRzf6lY/ln1QhtzXFy+7Qs+ieLf3SZybm37F1uKW/8tmd
Vu8VEZh6qwYBJ8l3AkYTngWXZRz9uhBxNBoqI4J4QZjpaAIeeJ5WbR18purBCipKUHCEFAeRXyHN
/paYV7PJ119MLSMjNp1NEoZXb6EfBQ54nS6OfXrjslefqUDTiybRui5EooLCumFd3K4Qk1pe5Vxd
NiXTknEujxfTMGME5ZfPDddQYXgvSOxc9yLsuio2/m73UWAOHoYGGnAPxdqcdUcoUoW9yf9Ws3Uy
0HZJ/Ql49rfDImH1Amt0V9w7DtQF9jYfyMZn0cOybORgqwpBtVj0hTazVZp2oLXaToD7J+oGG9K7
nT053C8FkZB0BS4OJcT6aVkYeypQKA+mrc1kbuz96r/pG/LFIHsSYL2pCLGTr0ItzFTxifSJo48r
V+BxXZRPSXMM+hEZbxbcMZxnwsTPAvnZc7hbmsrpLzjPDlAvc+dHroGPn5ntX2TqZln5UYmO3VAi
8+8GFJtzqYwctRSJb5u5QZZBRA0cpq+tNswnzW6PQ/g9t2GyIlYmZdVNrp8mXtXkZBvvi77Hf0Kw
+hWG4cwEWkMfcJ9Wt6QgWPAmO3RckY8H00JABijAGWt4+B40FjpUgVtPCe2VX9/IV+SW7qegs3m4
U6w6z56moJNB68lV0+CHS+XQZZPi4UmFD5mO1MH2GVs1M7L9jqEkddBkRyG5Rdi3MTk+/+FIFDpK
1yIGe2g/baH5PvdPb8pPnWxHXpOKCEZzZ2oObOuMDfE8IKv56xX37W9DviW79sMFMzCd8EYtSfxr
omRggwEF+xoKmdkThOF+TfzpYGM6xUjzH/DcdL2mJIJEdtWdEgXV245t/dkqZCDSjAFBQ2aNxNCe
kv7e/cq+AxyfKmv/wjSyPkjZq4oNH98oek1QXN1ux862XOjpbpr7i3P7Ypd3UXxcpP0d4b7c3dsX
Rt2guOXG2UZGcokOpmR8fzwGdUiL4OGAVMx7n0BMkapPSZsjALxEEUMYt4fqt/xYA8/kx9WcUNfi
xnyzfePGBBhhZ0cOo8BcIgY6MGWN0ZkZtGljEfaz+Zj7/hQqaUKdec+db9v3/+119/ik0NHRhioT
Z1xWwIDkiPpqrVASRzi57GbUKZnuzevdDMyLBMgR4PualoszGX70F+tc7GWM0ymg5NG1fG5C2/SI
4P15LwKGMftfzjwBVfobYIAxAZvO5UokYFz5ZRkswVlwAVnktsgWKMpPnkJEg8XioGHNBL9r1wya
mR1SQRQlR2FOzdHoaipDAZmazcMmDKC0kjnb9uYBCtU9d0bC+RhW0XSNXBbFdYLPNfBpcDNqr0ED
C2MTpQDBi82FGPinsNFP3G7CAQ2Uz/kDDlsmP1apXq3DOJf5HFmchowHlNojWDhlgfXsboZbhwJW
WUlSgkxlvYtaLYIQV3SvhlDQxindQtTz2ZZIG8jUmLUw2Yh75cwoo47VI+lLB6UriWSCXKuxo6PL
0LI9zWhkXx/jEgI+rZ5FpGxMB8XJpkvU/3VIlcBQPDvtDuyPgy+HhXFYh6TORAtwGzi5niGB5z0l
vDXOV9oXyiyNUUNqYzko+7g2bl+4niTIW3Pc8ebFjKCw8OLciY/C6O1HcZs4pambsLlkFeAzn6YS
i35GyxOSs6mSvN5zHCAD4VKyhC83EhoDFMcsIdLL/X+WDSlAOhQdWpMc5TNCpJ3DjwEQ4g1++3h6
wboWx1E7Yt6Pss1YkStpl+AJnxZsgI2gkw9I34OZugm6ci8DvkBcktZ38ewKxET59SfpMek0UKI/
V0rHjATYuGVVvosRO2Oscwi8DC6FxPVYkWrHkweafn1iOKPPTrdr1mGJasqwj77fFeYbYukmRDng
Is7zDu6TUL7q3YX/mDQXrCw9jzNjwWOi9zZgFGlST/lpytl+s+k9knfzIWzATEIaIcIO1XKsQPTc
fkI1z0Ou2g7iAp0ZpARrtSH1FXl4eMYNy+ZpEaEy7RuMIa6ro9qwpSBUxQbytxVXQdXNsWOHtSxi
rWl+28pQId3BSrEwdudLWb8CCA4TOTLhUzewAYehtCi8OCx9lLCtIfuKYsJTDXfm7ih1flwZUilU
2QUzmDPF8VXzux/Mpd5TIv5lz9IU162e5/G/KH5xLieY+Q1wQW3YXIT95URzJxlHA5Jl42K740yw
OYC7dlYqYkV9+5WKGrXmNSmJZlBthwr8Yszk6Xr0G8rodUlOT8JFAD9Y/En03KkYBwIGo/Xc/XVK
OuulCFCS9BQVte1IhktNlsmTgth1GsVptbWr225b4RNYa6z6oRA4xiV7rUD0MmwsmHYgoRKM6c69
4OMuMP7rGlZKC8VaRs1Af+NKtOYy6nWVc0Y++CEu3azaSJm1z1lVJQq0yiAvr0LCu+6uXB0s1rAF
qFLjLrOe9mazxxzvu6pVHuzV0r/L9uqt5l4YZelCzPVZVAM+9qPuUCFeO1TSReAxxJMpPMxmmrDk
A5QufIydz+NfNJqPLgWKagXrLYR0AJo4A8Yt09ki5fW0KOZ4HcRk2/pxHMp0Cgt5ZzjaB0kouHdH
iPNct92Y+MMiArMq7kIwh7PUtfB8Hees0CQSnEB3qWZbmJlX5zDt7Jo/tySrzllhcQjqxO0qgVSp
Tq82BYAlctDA0rgODAwHeYW+OWP7nbIr/jZIkJSZrMT1AuT/7R14XcYvoMB521Fekje7h5NbPAMq
lCLaPSBCWPgmeY4Hll6nPMud8ZyPYgQp4C2nAVdtJkAX6XePdMNPKltdJ/HFJRj1ykjMZ+V+Gf1J
4asFcYCziozFK4CV4k5eMJaarJgNcV4u0oCPzIT5Bciv6fwXigVCEqAZmGpmxJ4WsKlTZEm373Au
ZjHQh7T+m6IGxsjNmPLaKK7MBCR/S2F1IL5A9pwaBtP2wlmD5fpQ+s8lwoNRUD91SV+uzt/XlYbw
XM3uAHGxXYP2JqSPmOCfxAMxpiDfomgsqNOvMUH5u/CB8yq3l5N9g2fI1wPYPHJcmzDtTXcq8Z+a
1QgkIDDseCwbEU2LbRswo+X+WNbFNKf/XVx2eSuG1QNFDbBboct0e5HtqU8s9YSlez3SQnXPpO72
0mwr7j5tNelmwlYZsN1PXRpnPRbNUVTRXVGpEem05kYQLGApcT2w6Py+XPYlo0P4ukBZg5vbJOXw
nE3ZdSGXfuw0AOfZKDn/jj5E2pxav5VaKb/NRgHl3lNY27QsLogyNciaqyfV3Hbyn5xzEBK9IM2A
Q6OM9JyDafbpgpEEG49MnbWQfvbco9D0pEqEIQoKgiDWYrHr7hfjpqGEGecqqMT4NvSFbM5+fp61
5Y+9HHYJMc2zG5s4nEiR+utfB4+U2sDey3v5Z6vKAWAI0VRtCZWqW2OVwYJ2V7QEttS4OkUwXV+G
AWb2R8vZXNRjWsl6Huq6vjsCsON1ZullTIz9xbU/8DcY10+jRReysZP9IM7QDRl0r+Gh/xTpWuNE
TR9o/l0ark7t1y+Cy3csehjEA+7K+9EdReZOtDnONapH6VNB+A3l8MWeU3u+wziMrRKbBGuls+pE
jULfqjC9tO1DtNejrBxbpR7gDDXc/n7ImfhlYCULhGmZyAhkq0IGYJr9WMIZf/4l0BwZCGYrjnet
CZqM3Ys2Q+grN+bN4JLWXrmTtMI7UhlrLm8SaPO8KrUW4LqBREP3mCdRvMbhmGn+SmxC8xTZma6F
rs04g8Z5/ywdODtwqql0OBml9JzVs5vwVAT9Mmdre4R7zE5zK9cTiVsBFFk0szQumyfAEwyNfyUq
FynMp3Wq5dA/GMMwjh9ifcWvteuz1/4Z3LVgsWQa08aYG1kYJNSq8/AG7ti8QyzYSKvRKbXW6xij
yZVSqvpqy941AtVkh5MOnrSmhwAgeZ22RZGLL3snX3+vk+FZJiiV04mrHyvVKw8jtm40Sb4Ibsig
qNh0h1kpCMGkIip5il3rNn8R5CVEuxXbH6+tIYdxTA3ndaFK1Ye4QFfROQgeUIq0wffSLkhznNKg
A+v8k2jT6HUxJ6r++Dqi/B6cdbNiXrDuosEB/+GDMSMg/QZ0owa4iVwSHfVvF7L8fLQFN9yvfhjE
rPu16aO3BKEdkaavQ5CohOjmuiCi/Db/qVGA9shif9Idejk3tVMqCM1j3IoPHhQjGanpMCq1Iw33
Lp1BU0y6hvHBlnpHF7I8S0RsvmVO6jNWMyjunfCpK2wcQbw6Hs71Tc0ErLOBXR1OWZob9JvSllFh
mqdqkCUffvQFrFo7S4KAvG4d+SSjfSiBqu7uIKvl41fLz7Ujx+DkJP8iv4EYBfe/2/Ivjb+TV2xy
bnqUj9+ZFLO/mofq9uCtTv/y80dMVQeZyToz7Bi/sR1ge9EGq3to2Fkl8tvoMEJ0InlOUg15GvfE
cHpjGcoKjSWXTvOu6sKaRGu26QpEDXQ6bKZOSQAnwDpdHqfWCeUVmOF0Ppo2LBCVuqqxHJRkj2Fn
+TL257dMfeDoJjJwrcOUZACO101upByptDHy/naVaAoiY3p02L++Tt67SfiW8+jUaSgL2FKogXrl
z51BWdYRXB2Qk+6Q22eISFtVciZgEoYTSLUHsMFVRkL3CFkdSM/Siq5cUzSBQ4JbfyGVKz6JFf/e
KwwYxjBXHxBue/K5SPIGjr0F1Jv+asNPLYAVPOUDVKzgOTC5SUFvY2PfYugWx9s6cmkMWu6AaHyl
NVM08c9ILPB4rWQP7vrYFqjL8hXmmpAngD8F9Qlf7rAKKdiRoZJZjEsvFMOzVYuZPSmbY070u42d
tcpZcPp+ctGgIxYJkFLOyl78Ui1A+a3Fj+bXkh9J3tZZzLnHTD7ysQidEX0LVAFvIsjezngfkLr9
tPBiDYFNbtl3p4dfDO74/xUt0gtZpYWbHDPnBtPyq/CHbZQ2+Nm1RBAWuogr+90nEcAwuWL9AJmr
MaIVd8kmAl5J4Paaj25p2dBhFN5sIIHvXuKsMFBKlpJbnya2wic+JypKcq/om5hi9TpHUOMpH0mM
+sPXA1q1QlkFPbRuoelbDUkVihm7iUu+tpyWI/h8tCanksZVcZZAw9Jyb1R6vO/wdIwE3cXs1t9L
QbOeSv3O597bO1EovS+FwGL6aaFfXF8NeCURiEqbWRsCz1LIiOLD42Nglu6i4DQoHeo8GJux0OAq
q9g3g4hdWfRmCvAiAK0WK0rGmPrwOrxKfEoWU2uj0t8Cw7zOkbQdoJ5F1G2gKXvpWcntYRmD5KO4
FSGOvkCncIpFDmsesy9kDuHMHKwzziiAjFMSMGUTOd9hiJuuI2xd4xsU96PBkVNSS0DHU1HxP1iP
S2PXz+KHOaHLmngD+IgFNR7n81yZGd/PwFis+xJmx/Ya26YGOKxJcBkYOhUePbO+tyGdIXi7i7oB
5pFH/FF4e81ILV3JpKpROat21M24AVaZGY1LHw3XXTPkhOb+f8lM8DRoef7Y3+PofQrogtz7mfqE
FDuBa73apnYDJP1uD34og4lmK1oXUXiC2PrXmq53bWroyVWhpJ3iswS8GGUxkn8+25kx3gHPpXdt
+f2vwAnDtmiC0Fx4hMeWqR0uEnzUS17/yRl/z0+S49HHgPZBMI3mppNufRGN7D9IgO7vQgk3ASgi
LTSPvy1nZsOVFdxN+HWVsTN1ieJExRgBGKkZn3s6WvocLVlNZP3/5rzwCLvgB/DBgHuR2eQPCszr
JLQHD0rywOByuRef7cYhLmDybpNJD0wZGIYvAvE7DccvoBCRJPnv6M9uJW0lzuSXmQbpeKJS/qlq
aCusUDID3X8TKagE6wZiknXz7G5VH8WbxNcRNDxJ+zz0aBCNUgVeLdUcL+pSh1rDJGDySYA4Y4fS
ly1VKBIVvsGhTVnG5Dcl3VM5rrHALNrlxYWIoSx1ZQ5O8405eTW3PN08hBDcuHynMG0XJjnXuaAJ
UJItiNvL+SLw3zfrTwcwC2iZXjFDlNviUw5/fKwbjXqeGlpjKqKviOAWGimQkVByU+RaoA4YlLP+
1IVZIO+sV8yljVRWhJk80h5Af7hR1CcmB11mZYKFUxYyPkfRHxvnv9sErdEmIMn5rysYLzDWKYLC
QDnN2jUWb/WwnT9uudxpSolC8x7xJQ4KpBQY7+8h4JbMoQKDE/HJIWfEKgyXWF47QofU2VHiF+Za
166QnVxvumefTppYFq1meHip8vVBCR1Zaq0kgIpsTTawL3Yii/183J/2NzBPX1XrETwFiFllQdQ9
vusJGNZbjZTbCLogv+jPVskPktokW33rKLinEKOKFdWqiE3Y4wxCBMj6Da4bnzdNHPh+hV4UJjor
w1hKxLXe50Gt4wc3j4CBGoTnttI5ocfkB5lqGrOBU7xLQQCQ6bTbwMtK4rj+btPdLGDCGVNlONFQ
yUfGO/3/SWiTBCvZ/xRgUy02H1C/5Gl6WaA9opNUKMH6tLgSjDbNPy+rY5KZoZR8pyHCQ/Vxk8I2
pguYB82mFYgmsLpblu9Njf++YcT44wHwuPi/ZmexpLXGiqxEDueA3l0mzaODLnY0T6wf94u3rHYA
x2SKcJl+/Kl03Xzms0BxTJvydVqSP0w8JS7us0Giyhc5MIRWhEq5E93GqkUTR+BrVSe+1WxCDZFW
TRNSAdqKtBjQ6+Os62lrxp8qj6WmSfaHjNe3xrYEMtsYYZdUHxHbISQXs9+bCrRSUjxMCxkduBlr
2KJX6SVJmUjQK9Hv9BfhRlrziz+aUlYDHSNB8WaSt/oqR80+DyJ247lWEz/PlCVVjw5KpGhLRdk3
+PLpyIGDxcX1KxZSkhRXwSDlEceGBEHCbv3+8SGhJyCPrRlWW871GwFok1laFxwJJ+4WCb78x2Fw
6T14G2RUh0BS8e/CoXTU5JdUjehtzMkQP7UPF7bw+cteWdpDKyVJlgQ/9ZMBGTGXUHt9mYJpyWZ7
HB+kNE4g1Fgzdiv55Np+VmlriPbbVcx/ePwOpprMsHj0bZxPf/moqQsq5AjoFsMiKe+Nw2dV6cNg
OgHJ5gqt3bkiXaAa/XBwDt6sNiSvbm7UEHuID7S6D1NtVen29KVa9V97d1aL1Six+5SohKasQv4Q
UHjtrGzmujCl0845Y/JU4mkzwoHqYFg/mKjUSsZqKZxad8NBzrA9G+dvJSOdKqpy4fQu396th/+Z
A5i6IoX5V8S4ZZpPFuix3AWoldpae9pdW9PIU5MWki1zgjvnmP2DxSSIGd2BiMMqR1b4lECKVcWp
0ZjTf5L99QkqXRmXRQneHKtagNtWAu4YXpiVlHp2WdElQF8z7rxpLuBKm2QWVpfsK4i6S2gADcxM
+2QjjwbDwCznlQ2nizRtyuW/xQfbqW8S/ptUiE/Vx3M91rpuSq48fiiDHhKNLPma8cdge/XgqSMI
yJ8p2kXu0iU5xhp8lyZa8SoeIpXBfkFrE1JU1ZkYSO9eUbMCqVCJZCCZ+3whro1pB9j1tgbYX814
yfO7db5xR7cfknlrlIlsET0oZxKLO3MAwqHAznadDXOuwVxomlPZewVrX2JclK/ww5sC7/lULXIA
qk7vmKaSNvpBMR9ayx2yp75hQuum6kLAx5OH+ITBOZrXeIINPnm6/Y9ZuVIc9e0qgsL4Kdre8B1y
eti4avsI0WBdyRILXNJDDRxcj+PfmBWvxN3+SY1c+er4eIMADK+s4ePqr6hyB/j515xgMYbAr1Ez
xsQ6sMWQQx8Z4rh79iq9oY5OF3eeQJnjLYH/Hz6M4Bga4HgKHsfvmLcfmPKOndDNYfktXr6yMp3t
cInYQKoiBO1MmjkAqU48nH8Vdzi3bKt6cx6j0716xYXzpiiAzEDbi3JbinFzZcYneXaKECj+caX+
Gm953EDrNrx/f4wHHfjYE3YEZl6bbPpYqN7MyAPCWu6NJB6isqiYX0IZxW4L3B+N+46kSoSQapil
7TjPp10rwVbQDhFJGe1Ok0egGVSeZzr+yWec5kOHqOxny2aTi/nkkLQBiearmg6LQYDC1IJDfZ9Q
P7vgpEbj8I8dACVFLYpqI7LmZeqYEq4NWYxqkJy/XYbwiivEDXxS3xWg4Hccafcv/vZsO54a5t4S
B0M5THouzVb5B3CyrkLUPD4aPJ/xUIsITX4dUV+/+ZrToyv/jApJH3YcKmxYcATwPSovpxKuYdCf
6mU9UweyOVDU9qm7MRFpSeMLnrwAwS/elW/S47BH6LLKvrs8GjyGj5t/Z8HpBTAwa4qAkFwjwfpp
1dW//ABy9M61Egv/WHqlnHMCb6R0utypbFEKGL9vu9qgrQz7mSDJ1phBDMGldVMn2DyK3Rd6O2K0
Mk+GMOkqSiujP6wUhFQMhsyyUNag0oYIGMOeEVAl3fVyqtFcJWPXSpHH88P+anziphfh3iFt4g3W
NZZDZhUV8nBSKttksHDLvS9ovb7m8iLynIV5EqhNQJz6Evbnwv0bZY+XjVpyiP5wVSZtAtVwDtt7
IwlY389jSn4Q/hXZx+onid7BJ/1M6NZboop2U2T5t/5E19TqSU/v+IvIwatfTnCc1TXc9p6rJi9P
CiYYSnobnGo0CGTBYsa3kyobJN6hYcFehr3DH0hMsfrTBsTpdee0M+P3DJO+Lhp3fJZFzfhWv6GJ
cZbAfAfRIBeXDx691/MdTX5tnyNr1sCOI9pSk4RG1y/EIFvM3fNhxJsb93vX6ce7PAcMPYWbWriI
KnCa9DTy0U9zvwImuVO8XBQdDgR4rExFL2/AzCB/W4lZXnrMfCoPkvyfdovKdH5prRMHi387PaH/
FXaU40yXieclB6YHIuCDvdazxMOjGibaJkaHUEN5W1zMeDuyuX0caDwhqsExTNOqaViTkoeGO80j
WnKW7tmPdDf01zy0oJgsemc6riuK50hwqVnORhXg3RWUlYc+17F8Jigam+E0k5gB4xTJjtD5L5VD
OnwEFVKo+SjcUcIXI++KI7QGFS0pnUOqMJL9mqzDVuf5O4zJRCKyR3tMeveYrkGglzlZlnC1eCbU
gbYI20RRtdil0EOd+7lSphQLf8f4vb/lyVsHYkzkjSNRT6dCpmMfAG4RPd2o21Uf43ocBOBXMfMG
UCdZMKzPDdqyrGTT++3VzdwWIxJ4ycprv7wyVHMVZjQ1MlLF0AHXIe4SCtQxiwmOKa61KaInhcmA
H+THjwfPdsl96xEohUMGzhbAIBBF4iBFbrRuO/opajtssfVyaUAA3331f+2DVAjwRGFGIJ6hgy9X
P8XXWIYTuUwWsxicKNXJ34JJ+qrZNQD6m4mx+FuN7rqmDB6qyOW08SZDvMqnnjPhCH0K59UIhnqA
p+dfb0CjhK9fDimm+rgi8E9R2w0g7vu+7kdC5JMv0484Yq+vxmgu0doXHMxIIOhQmskJi1d7goGb
GxeHiPSHixglhIRjWwWaRRHkl+xm8C8tYGbGPYrBxsN4I8ZospM/2i2X26nk0cq3nxALotq2xRpB
pI8cNDHlOYKI9tSSIv9XSBmrS814NgEAz4X+R23omekqB86DvaeIb5h7veFgga//q+ASDBUw7klZ
JhnumvUcXueshH1X8vuTKCKYYHogx9kXIGd2BA2lXO/yps4E6AYAbFoaD/XPoxhegfrA7KUM4+l1
hwyoSN1NjwbOI5lmflAjM4t4lFj2GsFp1SfmU9NYLKRTwPR2MSkv5cEmcjI+Xo50dghKlcqGuM1s
BUkbZAoldDIpUasuDTj7T0L8+0nETxQXUuFcc4z9ki89rmyh/b15JJRbnNTtU/9xtNlBzAzCAUnc
QWnuuFDliou+1BN5tQO3hqb0NZySHmgVy5B1N5yMUL5MyPzEqMrTXojs8+kaqCJrXOR2ZageEnnF
fRH0vynog5pyEwOuAbcVarEJr5ApDJeXKRkmPd0UWpJ0qoS8/rAyr+FEEnZeVnBlMvEJhLXzYkt5
pxqIzRB491UFZQktNuzbOyBMAeqhUl1P7Hn5SIA6zgAO0gkBxqJ8D7iB0cZa2Fhbp0t6qSxKX1d9
U6yGqUK8f+98pFMnx8scrQimTjQXAq7rmGKTThFrnB6fR89tyL3v8bi/aC+1M1KNVouNSvJUJDYL
moePHRAr4XtxjC3NZV4nxOydDawYwzJLKa9exYdb5qu/8DInntylxHnJCkkr0WR6xHlnRZf9NVM1
834yY3Mg274P4gNDytvSfXckdtkQS1LbzALfUuI34xYYzhhivVfYpx4TSDg9RxVc2LXVm6U1hkUP
5KrnP3kEMQlRLeBXXKe8RkJem9HTL6XAV66Z9ZeiYHoSZ8US1RBpnPkqAY5KR2BzZlHewDjZ+pBk
AZUymjF3POZ+a9DoUiPqycFKXJWqRE9kbjJd8oP32z+w2cu7hDRRgE5yenEwJCNVieSbTeBdckz1
r5aDRugKl91Kv0ijwsUMI5NB0fDw+So1tqNu6gBG4WEQr+VwxQjet8OL38NR4p3ma1PDC7iL1Xav
cPEouxc3RrFqMBP9EFLacoPIJCZf22zDti0w2ipEzv1Bve02aQbmjPoUUNQabYVIhvuypOtxY9zE
lJj/4F2dYM4Rgo+EBQxPYtYWLqcQUVbpIpYG6Wm1hrGWGnbzGce0C/anfOBOUBlqfAKHk2MhC+Np
DUtMMmR5QI5mRhRmux+CuhHNYAutNa+5XvRS8gI5En7Ff/NWCMf9tbFZhMQUciHcNzFjopbe7UJj
2mZrWvhQqQyYkRAVyV0Mp7CHLHZFbjmlWnNSnEGPPvMJQz8cLtTQmtHcZdArW64QnziEXwKvK4UE
+S+SrYHDGugeiE+puf3/22oHv/ngPln1B/+jQSwjwmxe75HVijTzrrs0MUWXDx6jAt+L+2DkplLD
xZmhAEjZ4/fuh2JPVhMQUktjcrBXHJHrH8qgypaihv7BDOin48/fYI495hQ5mL/22q0gT01uQq6T
Z09oZar/MPK7EPvZuFbidq0EwvNSS7KyhGqo8buOj30gFdd/aAGoaRt/1a7v+O3LCvOhx5FLuXLU
W4d1/ljnQ3DCE8ato0IrZ6MFYRs6v1dr8eojIzkHuv2VsqSFQtqpWwJI1qm/bYPAn4LmI57sTXvx
hV1BXZJsAYeUK+BVwMNjU9wH2rtyLNkaPie14j+ZjwvLJA/t2puaEPoyKoKscppkZw/v9yOdgvos
r4Jho1sulKsNAPXeysMVpoUYso531x8SI5+uqOsQvTZGXPljkFyK8FhaBxI5AlHUsFDgHiBdCA7k
2Z7gC5QIuRFa4z9/EnUHe2GVaQGSocEtBu16RlCtkttXOl7xKbnONWJiw6OLpL2H0cHDEPWlw3k9
C8EtKtQ1v+go6V/HClGTzWrVxgeXN+53zVrWV+1bYw3QKLkwj/LB86RCK+/NaSJb3SnqADRMbLMg
6JSsDt2Jk4c+IMcbLbvaoQZgeuoulHCTNZ/pdB/j9GI4ClbIkBe1eupKXYt3PWBE3r0HFzWRlNIO
o0YDvmv/HsxkZZeGNa52OE+beMtirGQmDqaOgh/kQuAL/J5vq1k6lxSouEFoX1qq5cHw9vi5eVae
0Me9X8MOu/Reyo04idXM+uVoztxk5ZEVSBV0nrij0mCmd5apFTYAUoIBMKr8a+j+10i1JRc2/ypA
CuO8h46+s8pT955GhwDlnUIBBM5DOVDEuDuzjmdWrEGwiHJbJAzHfp3r+ANPnkPPxQdkFfY6Hhxu
a4LhzyAJCeaYbU3NuRi7X/x43NJwgbSJsPgI/aC7xSPAvL3wIAY7fOF5267tTWwBViRwAs4t8gko
UPA+cWiXvTH4dANA+7ZUi9VCJ3m8vK5UCyyyZHlq83FwxbOOdlxjx6wh/xWjIBzWjWLc91FWCvfU
bwhS0Rkvp4lLife+Vsj9e/0O+oB+NMNSX8zDgkPjdqxEN4T8GRSgCa+hi/66iO+qf4UVavyylZQL
vCfTrF0z5u5GntjpNWs8LWCK3EHj+o7+BrjlgDVd0X/uREUsj7fxpuDsGipRqi+J7u54P/c8CLpz
FRrjFGwkvW9dCfIrs6to83AnV1HGp/7UhpDl2Y/UnNqCNR3B8KA41dYDqPmGv/j+8Eq9JE+LzCWh
qQwNYgCxM4DZ0FBLd7+qEPPaqqsBgbICa+3IpOqhWWHOz0924FyMNJ6ylMwOfD4pmuwHQDotGjRX
Fe0WcvPAMFrFZ7dzPqkyGQQeu+xemyrM4wmGv4kzWZ8HumxJgQF2rgqOAnuj/RvgbMyjpsZgLN5H
XyE+bR91qY4m2BfHiB2HyJJjb8ro1U3XTlo5/yawz2R118JGBA3EMVvToZ0N0g7DngMpYhA64bD4
I0Kvje0R6rl9pPtIatFkFJ6W2VEwgbZudErGDUizZETXIa+25wFjAAfTH4FsTD0AE27hPOV6AbOE
9DEXWmkYILOyDoLdJSdLBBSBRmI+KTzdhWuaDb4yl8f6+Qv27kfXxbx+aRTRCKinvEG2zBmPouJE
aoPSxH8sVTyTmCAuBvJ7+0jQTTmdouMgFnszYZtPvbBdnDgMlFOttRyWYptNRm3B1MBE4tqIL/PT
uM5aPYvNsN1xsReN9keY5Mlfo31e8fC6MjN7to/3hAFy2ad+0DyODbXGuLXfKIQaKUX3PD86SkWa
rwCsjTqFVrh+CRYQnY2A2w8ucVgJxLSDienRplhpyoxO685wOfeuPd8VkUQgm+ajbNOKZOuHSSKp
Iasp/wxDnKa/NQ67U5fmzeTtbcXijzD21lNcn6iXOOnZP0rtdTn+SLMaEG8kRHMdJGiGFcLRO6KE
XTJetOLnIN2xGCs1rN3yI5Q1sdFj8HwmJfprCrr9pLaL64iM7EQAkgt/rPl0sfEYEnT6+AJoc0Ep
+Bxv0Z2WndbSNmUVP33cTi5N5mE0jZbqicKljJh1rxqSBzTzMO46sMaMjnzwN3b4UqG6lBe2jLEn
f52w7xRiUuFZ9TFucMmNrAvjiogTnrc/nor7J4jEf6Gg6UJnsdgg4I+zlIB1B39Tgc67c3notWs8
81Z6ZemkJaisTPB0vO6YYQ+MwCYf/JM2CHv40M1sT3xT4BhQT9zt7TA+VkBCRL+UbIJqPo2NQ0zC
EeUI9WWoAsRY4G9lIs3JrvUNdAHhQu9Byf2ZbyEtAPZk3Ynn3GX5CgJMVcBZcU1gDNEZ/+NMAOnt
ggV0XiIzCxE8/tJ2ROFIonsvJ5DYJ91XH6bNJSL5cMHR0bgieLkzwd2njOoCByzwShbyHjMbbi/x
cYqPpFP+60gFJMeGyfI8JMSKxNKfEFg/2od5PZjetE5V5Cw1oWrvoNnJdWTSN0+V4d5bNZVlAPPP
kiUq9KJiIhFx17bP7fWFYDJf4pP1fEjll/drjdGgUg3r58AgtNY8o4ZiRwuWgtGReIq9xpjUn5lQ
VMtzK8sgAJb0gpAHrzSDop5datztxVNkyPnmC16NjCWhrn2VwfUCxBwTn+ZfucWQqZ6+whvhcmG3
cYIKgtgwIkRwAhEPnb19EaJh/i7q/fHKthbgaRUp72jRm93+Dsk35s6CbCoEVEM4j7MrWg3eF119
iC/jkNLO5aHm1qCU5E9cVpIgufgdRaQN6UAbaVDIZCZBLaJkeebQccIPSSR++NxyjqO4smWI3DWZ
KZLb87y/xkzF9eDzY9MqJpniGyLq9Nm+NYl/Y2md1hb2W4Fg7SJa//7Azozw8Z+1vtIbJAu8r6Vm
RNNwnqz7ofjuMJGE2/wNFqHwSZTJjaHr3qkoBeEWX/FBFf4rs7cgc8MXfov7tUHXlA4w0bH3cAha
VmKNlxPBP9Uv/PVmAwIM9bLw8HOKti6HrwWo0ufILhRr0qmtJFlk9jPE6UtsckDJ7Vt4SqxQHvCr
QbO4x/yKsjgiTobUIAXuthSvihh62h8Fy/FHreGujuX4mKEt/uoRIQF4xrZMWavCk2isNqsk1Gzt
65aEtN3d7K1DTaOLturNE4YPC8Rs4+iDRiNhqStyEtuumPYXmKXKo9g8y9Sz+POoEP4cXrSe29cT
QmeUbD5rz6ReAPZyOBJ0RHE8FzWNqxiTEqdu4V68E+dRIqf1a3MpmwGpnQwEc59L5e+RqOcIkiWG
gWQQm8bPMMImzqvnWTYcLtnp0NFpzcDory6MoeY5dMiXQb/ys7ULeQEa4Pz1YW1DoK24lidkYy0B
9CmFdC09ElCECXf2KKmwLeWT765/5EnoGX/SRB0hho2EMoFAhdTbLGxDwZ3jg5o2fA2jIrYWemoh
v2qFAnKk3Plr7MAHgw3gXKXI8uaXZ4ovaEIrs26Mh6Qp0gKUXHHxdykxfmatgKoRMhl26nA4lb7t
gq4WqO84BiT5JADZkIk3sVveigpzcrx1yeKlprQOJb/Ld9oEUhrZ25yYEFmIdknJPg5K/AtwDQzV
M3CgvnQm5iRxHcsu3ICLdsfO47orKrsjFVzlTRsr0ubBinZAt3iDj3Q8zdiK+ev0vLxmLz3qmAm9
oxQUaQXjbJcFTawsamA52d6rmuvvXNTJOeYhBU1fkX10p9NoJA6anj2WzdYmaKHn0tZEr6Lsopz8
FYQyaYY21XMMg99ENzicc95nwvaND8nN29xFtBHnWC7P2ShoBSP0+lnDWMNxNPycvdAQW+dwC2Rc
tc7ExstF4HFqXEM4sFY9CHKkVnzqubea2VQiVNL/0TWtHPo7b7NzMD8cHtZsiKKh5yyz/IRP0GUM
CNWlDCX2OblyvKkpY7I3uvD4Fb5bfMz9v/WEejKYr459y/QKZdKe3/K+5DfTIzu0yL+GSKlvPqxM
wAaf4dVlxlPzCCVfvafT1XjSoeTdk5jz5Le7OMi0g/sr2UaZE/8RxUqOgOx9rbEngNdRdL9TSQDr
LsjpUbQw+naoL8u/PmTJpwE586+AOzmgsVmG1DG7IgzE/k8B7AaPZgJCkfgMtjGgNRcsIhw8nyi+
Lbq9y6a6ReQwGHQNn+T+b0j+PG78HyOf/6+yBesO3pqX+tnHqOlHKaB9v+bhQHC1FmPNNn2FkbGQ
dTzwr6phwJoAnYR+XQkSO+UA1hRO4SADyuUhAHlhTcGd8rWwBiQKiA+RMbrF0iOZ1owLpkYBCUao
kMjX+C2efmSjFVsQvE6EtjjkoBZRIM6nyo+7eqJwS/Cy1zgh0wwr06wnm0UUfecwk8D3VZslnXak
+dmgMxZ2vZZXdo1t7y9/FbdukDbLo5qzZJTH8070GCywo3xkFc1oYRNF0CsgCGSRywd12kv7QEFM
JnBdmDaW+1D5g0N+tNc92cOgK3Ulax1CbCvFU8gUDOTgVmNjbvOknXT7rSpdZWCFETiNSZI9kUFM
jgfnuc8Tvc5HdO9VAPAWabI/osfyqusm36wl+Q5HW0/q3Nsdm2X/E5SB9OE7trMzGBahsgPPM7hL
qZC3bsmn6+2RZ5WEqFD8d9oxGACaJd32b9figFGur5z6XPqb9DcQVNpzyCNj9evkmIpm++Co6P0i
+znnKqdl6ezHuBeJ+tHoK85htmycyJXAFb+giwsXKfgb9/pxwv0YpOJFJgIAHIKUJpqUOWF1X1El
98u2lBgBU+pMqbdSPYVe6JSkr7pedXerduFUS8RUcz9XWrtj/KgGBlOHp4TypMGTGrhsAxkbcerQ
aU4oaJsZagJNZ1DTmVfGGteG2WWjXVxEkQ0HuZE2AW6s/7zCMzGLvqUV0IOvtAbXopwtj7UE9cDD
CI8EmcvRb1JCypCKNe/1snHO3OIqYLR49H/7VHQtOYtIUxN9vNUW4+tXQMN4P9eu37r6SfFrLAOb
JwBwkDwBAwqK4TTDMOMjwz5t7egGZzHFEFXI46sslw6ggVTif7V7OMxCcztl+ncU1SuEt6Z/whEy
KEhjKYXiY3jus0D6LVtTZqTF2ehL1405MpgYrLl5UO3DZ2KMop+gQyz5Ar/p7JTVwW4PRKbwYo1/
/SaDrrLuiSO1Cg4eSNLiDVgV77cUVQI1WlutEclez7ELjlyDoIp2qTJ1vw03QNDPv+BjmH+92YYI
Q28p3kTYrmOCuzTMwDyZeGCOl+VunkYj5395u6rGcRN3tX41fKDEpUIMnpAmZILl5Tl/vdb9DwIv
4Y60CumK1cVQF4llaj2U9MkyOUG5yEcKgGKz0Xkmmy4jeToBlgwOSpssyoZD98VW9VSfVAk0aw0+
pz1ra2d0uKu+g1MlbYpx/SmLRJquo0Tgo6zFZlQLiw0m5PFCoya5E33FY61dTB+GodfJ1LiUZ0tp
wrFJRylP2ldoK91uNqESnDO4jFr5inppK2lBujbAO4twhDRigc6IOkNkwDMtbC14Ia+bihmVSQWq
m4A2+OFYPEB1Scbe8H4cyIKtT5xuBldgfdAdwUMfzK2JK18teUo0xDY2zueLxeLmV1JEGi7+n+Sn
HmuMkl8UHMGGFjxyLX8SRq6PrtCpSbbpedp5MkF2KqNb7DqYZ5smiOb4oECr6OB1nQpXWJdET0dH
3DHuth9C61QEZB0Zuuh+OCdsbrCLvrWMMBSAq/lJG5MHd+cYy0H+qy2/XofdznnNw7C4yMnfO4g8
EYNYP7UsDs3M7nbd+ZTCQUHayqF1HHR9xm68fBwGk9R4IiJ97dT7zcDFja7sVCekwNsOtbeVP27y
kf2vYoFF4IPIdXsYUIW0V5a/OAqn0T9rUCcscCvj6Bxun3BSUGutJMsXjzhUFpgtc24lt4g/vsaK
COjL+db5LW5kDtkOhKA2kmpgnSA1YAGyY++xxxoxloquW/MIk1iJKtjVMdJfaNMRbgvfk2KqGlFX
EY4wVtAcFAFU7R3RztDpveChWptYo9uhbOJ3MLE/S5Kl+QnW+NqrkamKJJna50ZdvOoWdSH8jwcl
jZaom6wTqJVJzJG8+ROpFw8ZmUllwhzJOjgk5sWqjeJ7ztWVM/4StC0ds1UufyGQRQCi3B1wntKL
StRD0Ede5xyID7A1zYJlY+nYaVVABNy5TiqNHbZLkV1YS8viG1a8sLpUYfgae/NGiSV+ZPWT+9nX
hcegrs/X8ajO34vtWoGUCEg0KeumWe7wrsA3MHLkzBFwDLaKgToOwt7IrXXhV5Yz2URx8+mnqo6N
MsPBak7CuII05rEjbJ/ZnHKHpyjuQ55+yCMXeXce3EojUMzRkx2nbtQTxK4h0CdV8YbEPJlFIBLi
gVM31sMVoh3xDEbp+oohbkeSWrcy4ZtMxYgKhe6Npi/12ratS0+Q+7n9FM+frGERapaeHO+Mm7Hs
tNqqxZFju5gQFPch+DW248nBSxqrgnGgRWnBZnLTNeTzyqaG8wU2B/SdfZ6B3+BO62+8K/wU2Faa
LaJ26lNoAZlAo33qQ/KY1x1hEHHHXVT7sbO9k29zrjcZPE3y2jiRaVzdOzDueRZEJF5uCNPQpyW1
wmV/B4OLZe4ZiQLK74NCzNHDNkfnX3EnBXD08xAQAe6WqbHO/c41pL9FKxUGB6uUHd7qR4yCRRCV
milQtvf8wAxsVQ2kKkhaPdf8zuQgM/8mP3Ni0SHjU0ygJDn/PAjc4b+m44NoLvWzTTxZBK8h2VTK
m321CYgGJ9jckK8uAMnyVKJRPrNiJe/vn7BuvbRsJG3cfdGirX8HhYjUQb9Q5fMWcfwhq/kNxA3G
gWROfBdW4aBLcfJf+4YZsPXmlIDqFeuEIAI9TwaeEZ6o+e88d1Lo2fsV8QXq0TgD32TSxP5c39YV
KG9RutbxafMNpRpebRrCqIIe8neKG+8eJf8k0qPbLui4t16WLxam4Xiq8rm9ZmyEjMIF2x43YbTX
skOsvrEr0u1IVyjz6HsUY+fpO+z7+w9TazlsX2JZXzOWMxLjhDH/PV4XUZgdAzwPhbWyUb5TsG4M
dzrkuj0CmNWs7ZaDMelNT1zyMCSroSYHUhla5nAmodPYvwRuXjOdVxnyRQF8Gn4JhxyIz/KIGLdh
/vj6SFAgJyaqoVIB/KxtWrjEYqYXOhl3upsF8dE1yMbFvlCiWqBD0FqAtxUehWY0w0pLRoqcV2nm
NWCgltASWRry7pXAhiDkiQ4w5i4wGjgV/IifqIw0jKeJQ7hZ4pyPsteyK1fRWP/mRJpcXyetNsx0
HI4XFJPvq94S/omTLAd2U6EuphzEnIM7RoPVZsHLv9vuRRR9D4qxVwT8h28Osiw4HTBEN3wMrXfS
d6u7QdtrG23W9nH4kKJNpoEpC2WGSNHPgzggta6OaquVvyfFKpM+qiOnN8cSZYCLhanA0lF03nSD
3r7RSTSsePFkZNgG0YRJZtRbh8phBA6VI4yUQBOVRXzB6xK6At6Av+Qa8OD79YfpAfV8NV8GV49U
PdlkDnVYMLbVw6SDKnOdkUndSBViCQqodeQdOXlMP/yIKUyMF5Cv2VVac4EikorD9+qL1oI3nLjL
KQZerg81NeEIZ4Q4vdsRYP3q//qQjuQVTdxjsjsRitRsX+sBEr8Mxq8eKuHC9DXNzATDx3EinW3s
oKXgDsCM8OkF3mafuQNlTCZOoQBb2LZMWpQWIAxIgLlGsWYvzGJkb6Zd7crpDSP2ECYn5l9kHWJJ
nI8tv3Rh76r2gClOuAfANKONjFIDGYBRYl/p+Dad4rM8kTOp61ewAgYOoTDFpQTEdc8sFuvE54LK
FXRhloiSwUUfrR6UvGaVCCoq29nH1U9P+unlC/SzUIAZ9qtpFN79UkdZrkircRmKzmQd9QfXkSTG
4K/HX2iEeUAeKPotwaHljFz/GfY04Hyy9O2nnjbQ6u1jy1zQACp2hMOq6fj7kx33cPkT2NwVYyeA
+BQrhdg5ZH0fUcUBWIJfg1Wobod2mWQ9bjE/uyRGJBuY8g6u5bHGb3DcO5lPiL2N/L8kil2b4B3e
aTckYdEHfn+drKmSx2P0GwAtfvIF7DZxpyldrbrsPi8JyFNVWS8SwNvvF0qLM2cjcxrmq959pzZA
AqTM4SDb9Lr82wo4wPTgUHa96wuWFS9vpExFmsoyaF5WwsHyeHsvC41xDJIxAKIiYNmLRRylSDJj
vKV1E/3dhzs424GE2ENNaR/2XNB0U5bcx8nI0wBW/WMGuCitIxkuxvgEpIZUhHktd30l9TsXF2Y=
`protect end_protected
| bsd-2-clause | 91729fa4640c0c9c12914b697be6c41d | 0.944933 | 1.838895 | false | false | false | false |
Bjay1435/capstone | Geoff/Geoff.srcs/sources_1/bd/dma_loopback/ipshared/xilinx.com/axi_sg_v4_1/hdl/src/vhdl/axi_sg_updt_noqueue.vhd | 1 | 30,472 | -- *************************************************************************
--
-- (c) Copyright 2010-2011 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
--
-- *************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: axi_sg_updt_noqueue.vhd
-- Description: This entity provides the descriptor update for the No Queue mode
--
-- VHDL-Standard: VHDL'93
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use ieee.std_logic_misc.all;
library axi_sg_v4_1_3;
use axi_sg_v4_1_3.axi_sg_pkg.all;
library lib_pkg_v1_0_2;
use lib_pkg_v1_0_2.lib_pkg.all;
-------------------------------------------------------------------------------
entity axi_sg_updt_noqueue is
generic (
C_M_AXI_SG_ADDR_WIDTH : integer range 32 to 64 := 32;
-- Master AXI Memory Map Address Width for Scatter Gather R/W Port
C_M_AXIS_UPDT_DATA_WIDTH : integer range 32 to 32 := 32;
-- Master AXI Memory Map Data Width for Scatter Gather R/W Port
C_S_AXIS_UPDPTR_TDATA_WIDTH : integer range 32 to 32 := 32;
-- 32 Update Status Bits
C_S_AXIS_UPDSTS_TDATA_WIDTH : integer range 33 to 33 := 33
-- 1 IOC bit + 32 Update Status Bits
);
port (
-----------------------------------------------------------------------
-- AXI Scatter Gather Interface
-----------------------------------------------------------------------
m_axi_sg_aclk : in std_logic ; --
m_axi_sg_aresetn : in std_logic ; --
--
-- Channel 1 Control --
updt_curdesc_wren : out std_logic ; --
updt_curdesc : out std_logic_vector --
(C_M_AXI_SG_ADDR_WIDTH-1 downto 0) ; --
updt_active : in std_logic ; --
updt_queue_empty : out std_logic ; --
updt_ioc : out std_logic ; --
updt_ioc_irq_set : in std_logic ; --
--
dma_interr : out std_logic ; --
dma_slverr : out std_logic ; --
dma_decerr : out std_logic ; --
dma_interr_set : in std_logic ; --
dma_slverr_set : in std_logic ; --
dma_decerr_set : in std_logic ; --
updt2_active : in std_logic ; --
updt2_queue_empty : out std_logic ; --
updt2_ioc : out std_logic ; --
updt2_ioc_irq_set : in std_logic ; --
--
dma2_interr : out std_logic ; --
dma2_slverr : out std_logic ; --
dma2_decerr : out std_logic ; --
dma2_interr_set : in std_logic ; --
dma2_slverr_set : in std_logic ; --
dma2_decerr_set : in std_logic ; --
--
--*********************************-- --
--** Channel Update Interface In **-- --
--*********************************-- --
-- Update Pointer Stream --
s_axis_updtptr_tdata : in std_logic_vector --
(C_M_AXI_SG_ADDR_WIDTH-1 downto 0) ; --
s_axis_updtptr_tvalid : in std_logic ; --
s_axis_updtptr_tready : out std_logic ; --
s_axis_updtptr_tlast : in std_logic ; --
--
-- Update Status Stream --
s_axis_updtsts_tdata : in std_logic_vector --
(C_S_AXIS_UPDSTS_TDATA_WIDTH-1 downto 0); --
s_axis_updtsts_tvalid : in std_logic ; --
s_axis_updtsts_tready : out std_logic ; --
s_axis_updtsts_tlast : in std_logic ; --
-- Update Pointer Stream --
s_axis2_updtptr_tdata : in std_logic_vector --
(C_M_AXI_SG_ADDR_WIDTH-1 downto 0) ; --
s_axis2_updtptr_tvalid : in std_logic ; --
s_axis2_updtptr_tready : out std_logic ; --
s_axis2_updtptr_tlast : in std_logic ; --
--
-- Update Status Stream --
s_axis2_updtsts_tdata : in std_logic_vector --
(C_S_AXIS_UPDSTS_TDATA_WIDTH-1 downto 0); --
s_axis2_updtsts_tvalid : in std_logic ; --
s_axis2_updtsts_tready : out std_logic ; --
s_axis2_updtsts_tlast : in std_logic ; --
--
--*********************************-- --
--** Channel Update Interface Out**-- --
--*********************************-- --
-- S2MM Stream Out To DataMover --
m_axis_updt_tdata : out std_logic_vector --
(C_M_AXIS_UPDT_DATA_WIDTH-1 downto 0); --
m_axis_updt_tlast : out std_logic ; --
m_axis_updt_tvalid : out std_logic ; --
m_axis_updt_tready : in std_logic --
);
end axi_sg_updt_noqueue;
-------------------------------------------------------------------------------
-- Architecture
-------------------------------------------------------------------------------
architecture implementation of axi_sg_updt_noqueue is
attribute DowngradeIPIdentifiedWarnings: string;
attribute DowngradeIPIdentifiedWarnings of implementation : architecture is "yes";
-------------------------------------------------------------------------------
-- Functions
-------------------------------------------------------------------------------
-- No Functions Declared
-------------------------------------------------------------------------------
-- Constants Declarations
-------------------------------------------------------------------------------
-- No Contstants Declared
-------------------------------------------------------------------------------
-- Signal / Type Declarations
-------------------------------------------------------------------------------
-- Channel signals
signal writing_curdesc : std_logic := '0';
signal write_curdesc_lsb : std_logic := '0';
signal write_curdesc_msb : std_logic := '0';
signal updt_active_d1 : std_logic := '0';
signal updt_active_re : std_logic := '0';
type PNTR_STATE_TYPE is (IDLE,
READ_CURDESC_LSB,
READ_CURDESC_MSB,
WRITE_STATUS
);
signal pntr_cs : PNTR_STATE_TYPE;
signal pntr_ns : PNTR_STATE_TYPE;
signal writing_status : std_logic := '0';
signal curdesc_tready : std_logic := '0';
signal writing_status_d1 : std_logic := '0';
signal writing_status_re : std_logic := '0';
signal writing_status_re_ch1 : std_logic := '0';
signal writing_status_re_ch2 : std_logic := '0';
signal updt_active_int : std_logic := '0';
signal s_axis_updtptr_tvalid_int : std_logic := '0';
signal s_axis_updtsts_tvalid_int : std_logic := '0';
signal s_axis_updtsts_tlast_int : std_logic := '0';
signal s_axis_updtptr_tdata_int : std_logic_vector (C_M_AXI_SG_ADDR_WIDTH-1 downto 0) := (others => '0');
signal s_axis_qual : std_logic := '0';
signal s_axis2_qual : std_logic := '0';
signal m_axis_updt_tdata_mm2s : std_logic_vector (31 downto 0); --
signal m_axis_updt_tlast_mm2s : std_logic ; --
signal m_axis_updt_tvalid_mm2s : std_logic ;
signal m_axis_updt_tdata_s2mm : std_logic_vector (31 downto 0); --
signal m_axis_updt_tlast_s2mm : std_logic ; --
signal m_axis_updt_tvalid_s2mm : std_logic ;
-------------------------------------------------------------------------------
-- Begin architecture logic
-------------------------------------------------------------------------------
begin
m_axis_updt_tdata <= m_axis_updt_tdata_mm2s when updt_active = '1' else
m_axis_updt_tdata_s2mm;
m_axis_updt_tvalid <= m_axis_updt_tvalid_mm2s when updt_active = '1' else
m_axis_updt_tvalid_s2mm;
m_axis_updt_tlast <= m_axis_updt_tlast_mm2s when updt_active = '1' else
m_axis_updt_tlast_s2mm;
updt_active_int <= updt_active or updt2_active;
s_axis_updtptr_tvalid_int <= s_axis_updtptr_tvalid or s_axis2_updtptr_tvalid;
s_axis_updtsts_tvalid_int <= s_axis_updtsts_tvalid or s_axis2_updtsts_tvalid;
s_axis_updtsts_tlast_int <= s_axis_updtsts_tlast or s_axis2_updtsts_tlast;
s_axis_qual <= s_axis_updtsts_tvalid and s_axis_updtsts_tlast and updt_active;
s_axis2_qual <= s_axis2_updtsts_tvalid and s_axis2_updtsts_tlast and updt2_active;
-- Asset active strobe on rising edge of update active
-- asertion. This kicks off the update process for
-- the channel
REG_ACTIVE : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
updt_active_d1 <= '0';
else
updt_active_d1 <= updt_active or updt2_active;
end if;
end if;
end process REG_ACTIVE;
updt_active_re <= (updt_active or updt2_active) and not updt_active_d1;
-- Current Descriptor Pointer Fetch. This state machine controls
-- reading out the current pointer from the Queue or channel port
-- and writing it to the update manager for use in command
-- generation to the DataMover for Descriptor update.
CURDESC_PNTR_STATE : process(pntr_cs,
updt_active_int,
s_axis_updtptr_tvalid_int,
updt_active, updt2_active,
s_axis_qual, s_axis2_qual,
s_axis_updtptr_tvalid,
s_axis2_updtptr_tvalid,
s_axis_updtsts_tvalid_int,
m_axis_updt_tready)
begin
write_curdesc_lsb <= '0';
write_curdesc_msb <= '0';
writing_status <= '0';
writing_curdesc <= '0';
curdesc_tready <= '0';
pntr_ns <= pntr_cs;
case pntr_cs is
when IDLE =>
if((s_axis_updtptr_tvalid = '1' and updt_active = '1') or
(s_axis2_updtptr_tvalid = '1' and updt2_active = '1')) then
writing_curdesc <= '1';
pntr_ns <= READ_CURDESC_LSB;
else
pntr_ns <= IDLE;
end if;
---------------------------------------------------------------
-- Get lower current descriptor
when READ_CURDESC_LSB =>
curdesc_tready <= '1';
writing_curdesc <= '1';
-- on tvalid from Queue or channel port then register
-- lsb curdesc and setup to register msb curdesc
if(s_axis_updtptr_tvalid_int = '1' and updt_active_int = '1')then
write_curdesc_lsb <= '1';
-- pntr_ns <= READ_CURDESC_MSB;
pntr_ns <= WRITE_STATUS;
else
-- coverage off
pntr_ns <= READ_CURDESC_LSB;
-- coverage on
end if;
-- coverage off
---------------------------------------------------------------
-- Get upper current descriptor
when READ_CURDESC_MSB =>
curdesc_tready <= '1';
writing_curdesc <= '1';
-- On tvalid from Queue or channel port then register
-- msb. This will also write curdesc out to update
-- manager.
if(s_axis_updtptr_tvalid_int = '1')then
write_curdesc_msb <= '1';
pntr_ns <= WRITE_STATUS;
else
pntr_ns <= READ_CURDESC_MSB;
end if;
-- coverage on
---------------------------------------------------------------
-- Hold in this state until remainder of descriptor is
-- written out.
when WRITE_STATUS =>
writing_status <= '1'; --s_axis_updtsts_tvalid_int;
if((s_axis_qual = '1' and m_axis_updt_tready = '1') or
(s_axis2_qual = '1' and m_axis_updt_tready = '1')) then
pntr_ns <= IDLE;
else
pntr_ns <= WRITE_STATUS;
end if;
-- coverage off
when others =>
pntr_ns <= IDLE;
-- coverage on
end case;
end process CURDESC_PNTR_STATE;
---------------------------------------------------------------------------
-- Register for CURDESC Pointer state machine
---------------------------------------------------------------------------
REG_PNTR_STATES : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
pntr_cs <= IDLE;
else
pntr_cs <= pntr_ns;
end if;
end if;
end process REG_PNTR_STATES;
-- Status stream signals
m_axis_updt_tdata_mm2s <= s_axis_updtsts_tdata(C_S_AXIS_UPDSTS_TDATA_WIDTH-2 downto 0);
m_axis_updt_tvalid_mm2s <= s_axis_updtsts_tvalid and writing_status;
m_axis_updt_tlast_mm2s <= s_axis_updtsts_tlast and writing_status;
s_axis_updtsts_tready <= m_axis_updt_tready and writing_status and updt_active;
-- Pointer stream signals
s_axis_updtptr_tready <= curdesc_tready and updt_active;
-- Indicate need for channel service for update state machine
updt_queue_empty <= not (s_axis_updtsts_tvalid); -- and writing_status);
m_axis_updt_tdata_s2mm <= s_axis2_updtsts_tdata(C_S_AXIS_UPDSTS_TDATA_WIDTH-2 downto 0);
m_axis_updt_tvalid_s2mm <= s_axis2_updtsts_tvalid and writing_status;
m_axis_updt_tlast_s2mm <= s_axis2_updtsts_tlast and writing_status;
s_axis2_updtsts_tready <= m_axis_updt_tready and writing_status and updt2_active;
-- Pointer stream signals
s_axis2_updtptr_tready <= curdesc_tready and updt2_active;
-- Indicate need for channel service for update state machine
updt2_queue_empty <= not (s_axis2_updtsts_tvalid); -- and writing_status);
--*********************************************************************
--** POINTER CAPTURE LOGIC
--*********************************************************************
s_axis_updtptr_tdata_int <= s_axis_updtptr_tdata when (updt_active = '1') else
s_axis2_updtptr_tdata;
---------------------------------------------------------------------------
-- Write lower order Next Descriptor Pointer out to pntr_mngr
---------------------------------------------------------------------------
REG_LSB_CURPNTR : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0' )then
updt_curdesc(31 downto 0) <= (others => '0');
-- Capture lower pointer from FIFO or channel port
elsif(write_curdesc_lsb = '1')then
updt_curdesc(31 downto 0) <= s_axis_updtptr_tdata_int(31 downto 0);
end if;
end if;
end process REG_LSB_CURPNTR;
---------------------------------------------------------------------------
-- 64 Bit Scatter Gather addresses enabled
---------------------------------------------------------------------------
GEN_UPPER_MSB_CURDESC : if C_M_AXI_SG_ADDR_WIDTH > 32 generate
begin
---------------------------------------------------------------------------
-- Write upper order Next Descriptor Pointer out to pntr_mngr
---------------------------------------------------------------------------
REG_MSB_CURPNTR : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0' )then
updt_curdesc(63 downto 32) <= (others => '0');
updt_curdesc_wren <= '0';
-- Capture upper pointer from FIFO or channel port
-- and also write curdesc out
elsif(write_curdesc_lsb = '1')then
updt_curdesc(63 downto 32) <= s_axis_updtptr_tdata_int(C_M_AXI_SG_ADDR_WIDTH-1 downto 32);
updt_curdesc_wren <= '1';
-- Assert tready/wren for only 1 clock
else
updt_curdesc_wren <= '0';
end if;
end if;
end process REG_MSB_CURPNTR;
end generate GEN_UPPER_MSB_CURDESC;
---------------------------------------------------------------------------
-- 32 Bit Scatter Gather addresses enabled
---------------------------------------------------------------------------
GEN_NO_UPR_MSB_CURDESC : if C_M_AXI_SG_ADDR_WIDTH = 32 generate
begin
-----------------------------------------------------------------------
-- No upper order therefore dump fetched word and write pntr lower next
-- pointer to pntr mngr
-----------------------------------------------------------------------
REG_MSB_CURPNTR : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0' )then
updt_curdesc_wren <= '0';
-- Throw away second word, only write curdesc out with msb
-- set to zero
elsif(write_curdesc_lsb = '1')then
-- elsif(write_curdesc_msb = '1')then
updt_curdesc_wren <= '1';
-- Assert for only 1 clock
else
updt_curdesc_wren <= '0';
end if;
end if;
end process REG_MSB_CURPNTR;
end generate GEN_NO_UPR_MSB_CURDESC;
--*********************************************************************
--** ERROR CAPTURE LOGIC
--*********************************************************************
-----------------------------------------------------------------------
-- Generate rising edge pulse on writing status signal. This will
-- assert at the beginning of the status write. Coupled with status
-- fifo set to first word fall through status will be on dout
-- regardless of target ready.
-----------------------------------------------------------------------
REG_WRITE_STATUS : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
writing_status_d1 <= '0';
else
writing_status_d1 <= writing_status;
end if;
end if;
end process REG_WRITE_STATUS;
writing_status_re <= writing_status and not writing_status_d1;
writing_status_re_ch1 <= writing_status_re and updt_active;
writing_status_re_ch2 <= writing_status_re and updt2_active;
---------------------------------------------------------------------------
-- Caputure IOC begin set
---------------------------------------------------------------------------
REG_IOC_PROCESS : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0' or updt_ioc_irq_set = '1')then
updt_ioc <= '0';
elsif(writing_status_re_ch1 = '1')then
updt_ioc <= s_axis_updtsts_tdata(DESC_IOC_TAG_BIT);
end if;
end if;
end process REG_IOC_PROCESS;
-----------------------------------------------------------------------
-- Capture DMA Internal Errors
-----------------------------------------------------------------------
CAPTURE_DMAINT_ERROR: process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0' or dma_interr_set = '1')then
dma_interr <= '0';
elsif(writing_status_re_ch1 = '1')then
dma_interr <= s_axis_updtsts_tdata(DESC_STS_INTERR_BIT);
end if;
end if;
end process CAPTURE_DMAINT_ERROR;
-----------------------------------------------------------------------
-- Capture DMA Slave Errors
-----------------------------------------------------------------------
CAPTURE_DMASLV_ERROR: process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0' or dma_slverr_set = '1')then
dma_slverr <= '0';
elsif(writing_status_re_ch1 = '1')then
dma_slverr <= s_axis_updtsts_tdata(DESC_STS_SLVERR_BIT);
end if;
end if;
end process CAPTURE_DMASLV_ERROR;
-----------------------------------------------------------------------
-- Capture DMA Decode Errors
-----------------------------------------------------------------------
CAPTURE_DMADEC_ERROR: process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0' or dma_decerr_set = '1')then
dma_decerr <= '0';
elsif(writing_status_re_ch1 = '1')then
dma_decerr <= s_axis_updtsts_tdata(DESC_STS_DECERR_BIT);
end if;
end if;
end process CAPTURE_DMADEC_ERROR;
---------------------------------------------------------------------------
-- Caputure IOC begin set
---------------------------------------------------------------------------
REG2_IOC_PROCESS : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0' or updt2_ioc_irq_set = '1')then
updt2_ioc <= '0';
elsif(writing_status_re_ch2 = '1')then
updt2_ioc <= s_axis2_updtsts_tdata(DESC_IOC_TAG_BIT);
end if;
end if;
end process REG2_IOC_PROCESS;
-----------------------------------------------------------------------
-- Capture DMA Internal Errors
-----------------------------------------------------------------------
CAPTURE2_DMAINT_ERROR: process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0' or dma2_interr_set = '1')then
dma2_interr <= '0';
elsif(writing_status_re_ch2 = '1')then
dma2_interr <= s_axis2_updtsts_tdata(DESC_STS_INTERR_BIT);
end if;
end if;
end process CAPTURE2_DMAINT_ERROR;
-----------------------------------------------------------------------
-- Capture DMA Slave Errors
-----------------------------------------------------------------------
CAPTURE2_DMASLV_ERROR: process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0' or dma2_slverr_set = '1')then
dma2_slverr <= '0';
elsif(writing_status_re_ch2 = '1')then
dma2_slverr <= s_axis2_updtsts_tdata(DESC_STS_SLVERR_BIT);
end if;
end if;
end process CAPTURE2_DMASLV_ERROR;
-----------------------------------------------------------------------
-- Capture DMA Decode Errors
-----------------------------------------------------------------------
CAPTURE2_DMADEC_ERROR: process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0' or dma2_decerr_set = '1')then
dma2_decerr <= '0';
elsif(writing_status_re_ch2 = '1')then
dma2_decerr <= s_axis2_updtsts_tdata(DESC_STS_DECERR_BIT);
end if;
end if;
end process CAPTURE2_DMADEC_ERROR;
end implementation;
| mit | e050407c577a7ae5cd3d1189672ffee3 | 0.402698 | 4.906134 | false | false | false | false |
szanni/aeshw | zybo-base/zybo_bsd/zybo_bsd.srcs/sources_1/bd/system/ip/system_auto_pc_5/fifo_generator_v11_0/common/synchronizer_ff.vhd | 19 | 8,637 | `protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
VqgplFNkI2rH3rP35CdiLJAesBBzx3ahYCWVov2QY8pnSpbbPHZzKXALTXuf8Lg9RV/60SesvL5+
Tx0kf3Xi2A==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
YpVJ/AkbT/7j7nP1FpW0u/1drBu1Ym0xSQcZVVNR2BH9CeGHgikyUixQxXpCsKnhOEb3pzk2wV6b
2udOCqgzaZfDIjjaxTt9/C6XIY+oMyWDycOTnGwR4Bf/A6rFEzTLA91kxNt5/tS1PVy+wjb7FCsa
mgkYj9eNUdtmSsLezko=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2013_09", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
pSdvSF3+OBx+pmFIuKYX+lTRtc2CK1xqA/WmTxOA/9c1xuF8tv0giSEc/96tBGsFFqc25YHyYiXZ
gYsCabVJMk2jc2XaKW+XFrRUGrQYLd+QPrzsIggnGqpN1i2vEJ2/57QIQEt4pR4jX78IzCIP9B1I
Mief83M338G9aIgdzONBxsD1Z3XK2M1fqZBI+UT4b8E2guDKnWsCC9f6WqxH/+ijAu2o7kXfkz/w
wH4eaCjn38eBIq4U5maYpwbVxvzCRoB69hlCwEEVDievRmXHouMD407mzOTwKaIkf/tAbFyB6i0D
s5Boa+TiBtHShhLBGBRqGoq+2UpGEaVgj8o3hg==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
HVe+dxCY+VHrZ/rUbzyWsz5ix04KcDyyUrFaCcS4yZ4GTBKi9GYUFVfTsXMpSX8pxXieZIsbIrAR
8ATsmu7QwmViHDzOMuS6sHzr6e8dC4A3UKQC6xKKwbJdSWPz/il1AOb6t1CcrpGMLBXMZTBj00R6
KptQtwRx2C4sHo/bHEs=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
gr9tWfnRHlUz7X9jwun0huNacy2IvVfab84T3X/BBntsyGpCEQL6hR0/eLuvmgsVt+peH9UtRKIo
Mx38RlMVlftuoIDUnixeoGaAc4c+4+tb16q3/5V7og6YvplXdBH8LQEEDNM3+H5ouvTLLeMul2Yk
sNNMGtkGcvzxpzj7QTVn+eSHg5B5sba+LhJuLxq02/5r329tzFZy8dtsa4HltD5DQbMsj44UHU8g
J84rl4f5z2tzAq3mdpwIqfhK2vn+BHZu8UlcbrIJKEkQpY9EPDhgx0vX44IIfHNFCmG2MgNy3yn4
3WNmBdtLjzwOjBTyBBtqdvJWbuTYLVDhGJrWQQ==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 4656)
`protect data_block
Zi9pBaAcftXHOQVA8fG9gFFqJEKZhli15EE9vI+dGAuuzT3mTCJGdoDi8SVlipTNsgE+V1RcJJn6
T3J53WijUpFF/Knu5aWOeEkX7VvPVncQpmsrCeG5r+gFmBWC5hkmU1w2qkIlvK2dnolO5o1/PR89
vClRmBnf1v58a6VRllRytHO9z1GO8aolJL3/N8XbDvn4dptEMWRptLgOGXEDjCLYWMWc4pSKrHoF
IrG9/6p0JwlbHOk2hiBfuqaxB95caNTYG+EytgqPRnVV5nTh6+Iy8/y664LivIvYuv8uR9W0k4AL
l1blAJrc/jL0miqTRi8NZu5+tEhV0Y7sjFsO/1Zifv9vZysqSJjzmNsTuLURknzvfI0dq2PnRiY/
eSCOn29CgyBTkn65jhn5m4vZYevMlHTzX8O3rI2nu76wK6WK1O6H9bvHg5GByJOtlGHo3HBsBzHZ
W41nPiquUPq+SixWHrQ8q5gqGvAfNk0pO2AlJoxXe/VY/vqz/NBzAcve0Rw0IYFo2BI8j1Q3Mc7F
p1F49JQXVxqGmo9+aQyqOLuw8FoYD/Q119cOJNGwjVuhzKTF1ByJ1WEacIaNnLn/5KoYf9IAcVNi
NcUbB2kuD/Y3F2x8uSmhiybHD243hBbfi5cxApjsWiFSnA8EVIWHLfAgdZa3JuoNMGV/FFJIiSmK
pcX3tkwzHrmkcrLn3eLX2LHkTXU7Dp0XRFOZu/17cFmPpAvT05lGzMZDWXa58ZPm2nN3iIyFvKKh
qAeQHf9OzvmLBNbzD5nrTYb8owv21WCq+Ps2Aw4D148aLl7htmUuB0vE2r7A3kgvYsfvbgZDYQ7X
+CKci/rVMxJfGypRYxDiPTc/FfPbsi/uvuQwKFpvQjeuA90xj80Y56QG1m+MMtsPDHJ7fOwj/9xm
/JOV7Vpbpa0TFA/wUXO10uTs5njlUQUE4GlhEpMjMBI8VF8F/Qg8ZaTQDEbdqvctQUPVPBx6OpdX
bgn/XM/Lvj2ALBshfbnU/AXcM06CjXc+6to13W1sbNSeUfi1h0UMe7RiIYBMqlzNdZ7C75FTrRQn
a3vmP7WfcOvw1mBcfhRSAzQqgyaTumMsXf9JIrBGk3zn8zZeSSd4ePhdWLzb/JYU1N+BnSjJvpYi
qlM31xTpxKwaF3pB1naIgSROk6iTqutbd7ACqHTlUNIMVc/wFV5DRPLCcKFT464ahigJKuIS6N/C
IffuD+Xz2SYyf57Z6e7uyUKjcpao67Acf3+EtCE3whq3LUAXKhYZ07Nmgy7m4/pMjhNWbz4UCYsH
28a7StTXS/+0iBaVtQlU7NT1lDhkjK0eT4hAna9ZwjFbOzisuHIe6DzY/zwkO9GyGexY2AC/V18e
+IT1QlR7CsIK2T0Z7v60zWZrvYCaqwTkyGBCwh5I3vYAaxl0xKIJO010glXpqC+M6QCD45WPdn7f
+Rxmdjc/TapA9hifPBTw6spNnWRHVidNjP9pJLdnXgHepeIk5mU6+Omgy20+THu293tvIxE2EigP
KzsFUJUtvdxb+r6KFmkO1jgRdMpc6xmuhzjpd5Nanm//65yj2kM8flheWDzhOMCKYnu9R0bT2KSA
DTiwOfGHVWYm4uWwLVLQsYqqjuKOeR1nMJ9PTPfc0yZDvvYmMT2OlV/S+3PhmLiLvxazengSrUDn
UTvy+pNAVXZ4GgTU357KAwgblayiWlYa4LM9xKkZCsMb7yMYFZmuPdMYnr6SnJiI7Oihzr9+5lCI
X/m0/Tx+bCT+k0+4W85tf35MvNILRV9notBDtON2I4V8FoZQB1JeDHBNTNc+Z4MdB/tz04jeoMGe
qykR0Fe1X8gJ5NOCQGIZ2NaeHrS6t/4pL8xPbLT1KSN1im3ggtPVAncC3rxeakylrownsnTk46t6
IvtTuwIoD1j3OFg54l02zOsX32TQOLpBNNph0zIRvYPSWHSwNUlG/h6wk7RctgtsnI/OCyeTHW7n
zSVFdlhgUaVQSL/zGXKb8bUXpUINKUXN5HKUjyiWGee5VA3KPdJ8FkOX1zlrCeQMgkqDQGlDEnNe
PGs1k71VB5BT28ykWAydqzdFEeQfsp1sxre9DOBTyfz9pxSJmxhnLER9YNzSvebe2TmYJ7Nw7ji2
ybE0zhxWKEwD3DzfZbYLv3EF+T9Wq3kKi1HH/v2iqWCW2cshlJdSRY6e7ZILVDpwQAk77mb+XbAo
sWRmohk1V9KgpN87KPDEOZ9v0qoMbDNjOsjvpxIEFCupDSiou64TwRKRmnyYYURg65Zsq5EjWc/O
JMRTsOl7Gs8Z+61cfuvHvqfRU9Ti8/TvXs7KvIMMKh1V7qbOgRtQ4CINljqtdsXT2MPtNHQviyOi
W6WSJureeLiz+/fUDM+ewrxt2I4z92ctzsABD+fmRRH9Q6khjZM9ZcO/f8NwYjSk2o0OsKVcFWHn
nHFMhx8Ttkf4QdK0CPK8vcE64RoThAmjfhzWmgtEWgz4+NzknmAE/n03/P7Taw31b6ppodaKLLXf
DtVCFSNsRLCpmSCs1fNjxTuiWco+/zz2GxSHJzLRraSmZCrRAbnNL0GgtsvhwAQO0w/j+0CRIW14
+dLIt+YzC8cr+U8e10hn6NC22Jd64STAjSb/1z8wqpRWh+TgTsJ04X7o2HHOW2vDRHejLx0askCM
zUjfLaeuflRM4klI74KDvhStcn07HcQU5oTAA7DURqlCZHijWIgNw2+7qPCc+yD4rqhuk6evTtbC
Vy8hSy54GRcw0Xo+bTLZH5F9+Hf1vbX4dLLbXMcH/miIy9sEkvSTrJN9ukcrPBbxGA2XP3R/E/ey
1XNgfzTVXr/1mOo3DFPYV3IbY26CLP+GGPxOSsB3eg5ofp8HC9OWyNM2Te4PojjNqlsP7WuPqpkM
V0D44QlbCey0lEYPsv4Q49p7OOTXqFsFFIfRL/F1iAOS0/l5frl3GOK4n7oTiCweCF8IOGc7rTJc
3EKUy00OX56KVuTIEo/927BD+2EuCQCIAP8boVqmGehdk0y8+EW6jC7upAwTa0UUGVxVSU3Ap2ZU
hUzCbWRP7dW1o6x2tdGo/m7lwhJttKvv7YRTQs0ZOwaChgKJ0vIkQL5pwhBoX/a4A0V+FZYCRBeP
fyKTxubLOIaYtE0r+drip51V96u+Xn4eB2vbQx/o40CJKzNT6sEC2SZsKlK0uSPTUE9//msnil4n
bIgAlNif6kVLdPukw3JL8opqdSu2ZfgO8SOTPYyN2KyzGkHqavLuX5UtVQnyWMM8OIr6mhHXZdCo
Ys2CLLAMtFwGwtM3yb+4UP6SRiDpDYlScKJs6MGvT64eLjzXujLvJDIO9DY4uuIsxafblgC2//Dn
i6cFXIcVTTBq22keUZCDBoQgYj48Z8yf0J+G3mKolcri5nk92HGGCjulb+e3HDH1vgvX2hHJBzdG
2bUykBbmUevYaLice4KmP4wDXIlGwmbMYqzD/temKiP5r1bJ5Ic2p5mBYmCFtC0RFCxFRAwYj7kB
M6GasUQfYW8yuTg1TUMGOnWHs9TEUqTNv3xh0s8lJrvntUAAvrL7WjMfWcIb6doAH3/oAFIiKXYw
e9uMpHynnKxEbrw2fV/WSoA/vCd+FJBVWj03bmZYWgjcUczpGlIbMDNO9eQfnN0KFfgxGr4HqOFg
4ZliOcn8doNX/BsP0C/k+uS67VuA3Q+uLgbodyPn9zJcjRyTKo2iipuQrgJ6issbAlHzcdWQsyAl
Olyxhs3p8hzAOytWpRihtZr4sA0r/ReZ7FHwinqOR5UhNCOS8YF94NgODwJ6n6DXt/Zu1n/pRBcA
HDDH9FNgKG6n9zyn0cPBqOUKGQvQcnyJU0gZttuUyv7vbK1oA3dm0Bj7e9K4HHng49jVlencfCk/
K2Lhh3Dzb8SEJyktpCf5noS+w02EJ3xVSEZUGG0nGmbapi1QqYwGP5AYh1Y9kciEjhEloCmIuFea
nb2m9alb+DcMi3h3QMFBz5JwDBD6v4DWdgnqfsS95ukH1qRykFaRcl6IM97o2UmNCb6RuphLu0Ik
9V61coTEVna05flkBx6x2Cht9Qed/g3blc3sLeh7s2IvuYG8tAnvROhFmEwPmt+WyaGZns2Khpvb
VVB1h3Ew52Y3dWZyXFnvnu4caZKG2Ab3xSxiyc2COMom/R/qNmxgVnZnl4ePSCO9he0a2GhKjf+a
VIfsSqBTtoDPjOBeRRjaUQ46uEA2dCNpelOfRPlPP1qqE9Kzs6gO5P4zvLi1cZCUqx1D71Y/fBeK
2CwaWQ+ApyO2Xn0P/Dx/k3DxirevVufKGnLzGfAT0yaeEOyYtVAtrcalQ0rE7NFIIDtR/8gBfmgY
dzDIv5iiOmyLDrXluq8txWvr99eKh14B1O2hy4wkcaYu7snGTPJjnLFEtQ/ZvoxLBJM4Hyisx06R
CtdnaaDfJKBvUQVI/xGeoxMXToQigqsb7esqW/SzJoDaMja2zFddnf+9j0av+POZ/l0ZmjWxIfgY
HKl937DwmWL7KaqIrx/82FPb9odhmlIyt8+TrRja+PL98A2dFwe1cQkPaDjSGw+mSiqsN0FSvdo4
5w2HBFYyqYbXkd9GN6/g2YkTJ3s91oYIDYsUNcWHpi5VxT3cG+Jw1eA9/0eTGFEhaw6CaGu+JHCM
GoTAAlFcm+c6HhWi6aFfJjyo/h47i3MIQtmLVjxL3p2csHWCzfGrv+DOhKaHRKZD6J8EUHNfDsu4
8ptLBN05CM0Rdt+GRmZk67MWgiuXVKYu8/XrnYYy/yApL888mvGBcrOhIFMeqhp1PsjYSQSWyG28
aibriUB5ZmyOdjlHzXQ38Rd1WKiW+QL1+RJ+jTQhftD2ebH3Zabsnu5V+sqF/sFLsXxM3GURvtnn
u0SlaO+BvTXQk/gRZp2HKPl2/GPRmE7OZYc2KJrQJJjmwMOSFuOfdsFEloqpaE4J6KGT74a+1xny
/WzFd7R7ObAFJDYqICvlLz8XwVjbxF02VpGZYonWDBebJT/S1w6lhUrOd5avXcM8uosTHF+yvcSY
0Gc7A/kAef2P1lRLB1vHw7PqZ4bRwgNsT0mf6SvfFPjpiSlqDLulasrdskK04Zmm300j/UPlOKra
T1lYMPXmL2a6kUjux0RBCZLk4PIiRr4xgIdA/aioQqJD+TSWaOxoQ4BC60aBXitGAAQLTm8yzrBu
aFk+cU65OMJWNkocu9s3B9AsMqw//8Dd6zDw2voeEAIbMi4AMResctzb7xN/Ovi59n4O8I7MPqV7
X3Q+ivJiLcqHHxyL+nKXdXI4wSL59twEB611OO9JEMNGubBWVENvvVmLmaIrkKFF8wKSVTlLfaCB
avZcrMPJ8FGdd6WadgRoDxKo4qd4mmN1lyYGD2COO7nvCbqLHDJEIBBvefXV2acFH8FmBf8gsUhT
OITzTZbQPWDeq/0oSjclupQc8CDGJbg9/oVHBtE5i+9ys03gmxD/jSYPCyyUktqQyIOCGhYSbkjE
0El0BSVWzPOC/W1qNwOgLCnSs9EnK79E3eVSHutw+CB6cViveNfB3k8H0yHevQIk+h3xZTjejRXj
YMk4HofwZI/fvwlSRRt8s80I/tQxxvAnTprIDEKD/o34mQS6RZWnqKvhV6PzZYIe4MsFBRvRf6Kb
VgPWz+LTAsIbLn/RIITeAVxTq35XnL1SyR01y9g+aNsyp0+ypCZCDJenVgx7kaTs1nLgBbW2n0Qd
ada0UsG5sigDZ2EBatM18wXzBCpUcBeg28qh17LWdbTDfff3gdP1WtVLQLxGsTSL7U7bl549GaSu
ugYh2co6NQ471n+gmwhXgYqYS14yCxvDVlreB0ValWx4PDGLQLiETJLgewmezG8v8D/9tAFDTs7N
M1eILWz3Gbux7HdHrN+kKn/32NpBpYrxOYiexFT4AXXtYBlJQO1wSFY+BWelh/V++UvcNHraWVpi
ltFpGrwpAFN47PG5TwHGpA7zZR8JT9otI/sgQg5WxzEp8zkEM1X15tTe7DliMQOlunLHSPDy5J3L
Ra3nO/gsixg6Y3CnUO2s0LMZHShg/yWgaqraEeOBIXisBSfqIW5mcm6GSqctOIG/OgSyMq/Buluv
xb6vqFMAmkBmtBes5X01uwpVeo5aCdKzemGJbezD8o+nFgi/fY024Rz+XYsdToAJ66fU+KCD3Toj
1V9rD1SHDahvRsitehaWnPHWAq0iNlNaF+eU5mf088pQiA/cUTT5
`protect end_protected
| bsd-2-clause | 50054de64abacdf9345667c72eef7b36 | 0.915596 | 1.909996 | false | false | false | false |
mharndt/profibusmonitor | VHDL_Bausteine_old/abandoned_code/TEST_CTRL_TELEGRAM_FILTER_SD1/F_DIV50000_SRC.vhd | 38 | 917 |
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity F_DIV50000 is
Port ( F_IN : in std_logic; -- Eingangsfrequenz
F_OUT : out std_logic); -- Ausgangsfrequen
-- FOUT ändert sich mit der
-- 0/1-Flanke von F_IN
end F_DIV50000;
architecture Behavioral of F_DIV50000 is
signal COUNTER : integer;
-- Maximalwert: Teilungsfaktor - 1
begin
process (F_IN,COUNTER )
begin
if (F_IN'event and F_IN = '1')
then -- am Eingang des Frequenzteilers ist eine 0/1-Flanke aufgetreten
if COUNTER = 0
then COUNTER <= 49999; -- Teilungsfaktor -1
else COUNTER <= COUNTER -1;
end if;
end if;
if COUNTER < 25000 -- Teilungsfaktor / 2 (abgerundet)
then F_OUT <= '0';
else F_OUT <= '1';
end if;
end process;
end Behavioral;
| gpl-2.0 | e4b54e32502988f465495eaa7ab9a260 | 0.594329 | 3.06689 | false | false | false | false |
BBN-Q/VHDL-FIR-filters | src/FIR_Systolic.vhd | 1 | 2,562 | ----------------------------------------------------------------------------------
-- Simple FIR filter using systolic form.
-- Initial version: Colm Ryan ([email protected])
-- Create Date: 06/05/2015
-- Dependencies:
--
--
----------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
-- Uncomment the following library declaration if instantiating
-- any Xilinx leaf cells in this code.
--library UNISIM;
--use UNISIM.VComponents.all;
library ieee_proposed;
use ieee_proposed.standard_additions.all;
entity FIR_Systolic is
generic(
coeffs : integer_vector := (2,3,4,5,6);
data_in_width : natural := 16
);
port (
rst : in std_logic;
clk : in std_logic;
data_in : in std_logic_vector(data_in_width-1 downto 0);
data_in_vld : std_logic;
data_in_last : std_logic;
data_out : out std_logic_vector(47 downto 0));
end FIR_Systolic;
architecture Behavioral of FIR_Systolic is
constant NUM_TAPS : natural := coeffs'length;
type chainedSum_t is array(0 to NUM_TAPS-1) of signed(47 downto 0);
signal chainedSum : chainedSum_t := (others => (others => '0'));
type dataRegs_t is array(0 to NUM_TAPS-2) of signed(data_in_width-1 downto 0);
signal dataRegs_1, dataRegs_2 : dataRegs_t := (others => (others => '0'));
signal data_in_d : signed(data_in_width-1 downto 0);
--Vivado does not infer DSP for constant multiplier so force DSP
-- see http://www.xilinx.com/support/answers/60913.html
attribute use_dsp48 : string;
attribute use_dsp48 of chainedSum : signal is "yes";
begin
main : process(clk)
begin
if rising_edge(clk) then
--register input data and convert to signed for DSP slice
data_in_d <= signed(data_in);
-- double register
dataRegs_1(0) <= data_in_d;
regLooper1 : for ct in 1 to NUM_TAPS-2 loop
dataRegs_1(ct) <= dataRegs_2(ct-1);
end loop;
regLooper2 : for ct in 0 to NUM_TAPS-2 loop
dataRegs_2(ct) <= dataRegs_1(ct);
end loop;
--Multiply by coeffs and chain the sum
--We resize to 18 bits because the DSP slices offer 18x25 bit multipliers
chainedSum(0) <= resize(data_in_d * to_signed(coeffs(0),18), 48);
sumLooper : for ct in 1 to NUM_TAPS-1 loop
chainedSum(ct) <= resize(dataRegs_2(ct-1) * to_signed(coeffs(ct),18), 48) + chainedSum(ct-1);
end loop;
--register out
data_out <= std_logic_vector(chainedSum(chainedSum'high));
end if;
end process;
end Behavioral;
| apache-2.0 | 832873e9dd362df75d006966e101f503 | 0.617486 | 3.416 | false | false | false | false |
sergeykhbr/riscv_vhdl | vhdl/rtl/commonlib/types_common.vhd | 1 | 7,252 | -----------------------------------------------------------------------------
--! @file
--! @copyright Copyright 2015 GNSS Sensor Ltd. All right reserved.
--! @author Sergey Khabarov - [email protected]
--! @brief Declaration and implementation of the types_common package.
------------------------------------------------------------------------------
--! Standard library
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use std.textio.all;
--! @brief Definition of the generic VHDL methods and constants.
--! @details This package defines common mathematical methods and
--! utility methods for the VHDL types conversions.
package types_common is
--! @brief Array declaration of the pre-computed log2 values.
type log2arr is array(0 to 512) of integer;
--! @brief Array definition of the pre-computed log2 values.
--! @details These values are used as an argument in bus width
--! declaration.
--!
--! Example usage:
--! @code
--! component foo_component is
--! generic (
--! max_clients : integer := 8
--! );
--! port (
--! foo : inout std_logic_vector(log2(max_clients)-1 downto 0)
--! );
--! end component;
--! @endcode
constant log2 : log2arr := (
0,0,1,2,2,3,3,3,3,4,4,4,4,4,4,4,4,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,
6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,
7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,
7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,
8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,
8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,
8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,
8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,
others => 9);
constant log2x : log2arr := (
0,1,1,2,2,3,3,3,3,4,4,4,4,4,4,4,4,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,
6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,
7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,
7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,
8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,
8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,
8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,
8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,
others => 9);
constant zero32 : std_logic_vector(31 downto 0) := X"00000000";
constant zero64 : std_logic_vector(63 downto 0) := zero32 & zero32;
function "-" (i : integer; d : std_logic_vector) return std_logic_vector;
function "-" (d : std_logic_vector; i : integer) return std_logic_vector;
function "-" (a, b : std_logic_vector) return std_logic_vector;
function "+" (d : std_logic_vector; i : integer) return std_logic_vector;
function "+" (a, b : std_logic_vector) return std_logic_vector;
function "+" (d : std_logic_vector; i : std_ulogic) return std_logic_vector;
function "*" (a, b : std_logic_vector) return std_logic_vector;
function conv_integer(v : std_logic_vector) return integer;
function conv_integer(v : std_logic) return integer;
function conv_integer(v : boolean) return integer;
function conv_std_logic_vector(i : integer; w : integer) return std_logic_vector;
function conv_std_logic_vector_signed(i : integer; w : integer) return std_logic_vector;
function conv_std_logic(b : boolean) return std_ulogic;
end;
package body types_common is
function conv_integer(v : std_logic_vector) return integer is
begin
if not is_x(v) then return(to_integer(unsigned(v)));
else return(0); end if;
end;
function conv_integer(v : std_logic) return integer is
begin
if not is_x(v) then
if v = '1' then return(1);
else return(0); end if;
else return(0); end if;
end;
function conv_integer(v : boolean) return integer is
begin
if v then return(1);
else return(0); end if;
end;
function conv_std_logic_vector(i : integer; w : integer) return std_logic_vector is
variable tmp : std_logic_vector(w-1 downto 0);
begin
tmp := std_logic_vector(to_unsigned(i, w));
return(tmp);
end;
function conv_std_logic_vector_signed(i : integer; w : integer) return std_logic_vector is
variable tmp : std_logic_vector(w-1 downto 0);
begin
tmp := std_logic_vector(to_signed(i, w));
return(tmp);
end;
function conv_std_logic(b : boolean) return std_ulogic is
begin
if b then return('1'); else return('0'); end if;
end;
function "+" (d : std_logic_vector; i : integer) return std_logic_vector is
variable x : std_logic_vector(d'length-1 downto 0);
begin
-- pragma translate_off
if not is_x(d) then
-- pragma translate_on
return(std_logic_vector(unsigned(d) + i));
-- pragma translate_off
else x := (others =>'X'); return(x);
end if;
-- pragma translate_on
end;
function "+" (a, b : std_logic_vector) return std_logic_vector is
variable x : std_logic_vector(a'length-1 downto 0);
variable y : std_logic_vector(b'length-1 downto 0);
begin
-- pragma translate_off
if not is_x(a&b) then
-- pragma translate_on
return(std_logic_vector(unsigned(a) + unsigned(b)));
-- pragma translate_off
else
x := (others =>'X'); y := (others =>'X');
if (x'length > y'length) then return(x); else return(y); end if;
end if;
-- pragma translate_on
end;
function "+" (d : std_logic_vector; i : std_ulogic) return std_logic_vector is
variable x : std_logic_vector(d'length-1 downto 0);
variable y : std_logic_vector(0 downto 0);
begin
y(0) := i;
-- pragma translate_off
if not is_x(d) then
-- pragma translate_on
return(std_logic_vector(unsigned(d) + unsigned(y)));
-- pragma translate_off
else x := (others =>'X'); return(x);
end if;
-- pragma translate_on
end;
function "-" (i : integer; d : std_logic_vector) return std_logic_vector is
variable x : std_logic_vector(d'length-1 downto 0);
begin
-- pragma translate_off
if not is_x(d) then
-- pragma translate_on
return(std_logic_vector(i - unsigned(d)));
-- pragma translate_off
else x := (others =>'X'); return(x);
end if;
-- pragma translate_on
end;
function "-" (d : std_logic_vector; i : integer) return std_logic_vector is
variable x : std_logic_vector(d'length-1 downto 0);
begin
-- pragma translate_off
if not is_x(d) then
-- pragma translate_on
return(std_logic_vector(unsigned(d) - i));
-- pragma translate_off
else x := (others =>'X'); return(x);
end if;
-- pragma translate_on
end;
function "-" (a, b : std_logic_vector) return std_logic_vector is
variable x : std_logic_vector(a'length-1 downto 0);
variable y : std_logic_vector(b'length-1 downto 0);
begin
-- pragma translate_off
if not is_x(a&b) then
-- pragma translate_on
return(std_logic_vector(unsigned(a) - unsigned(b)));
-- pragma translate_off
else
x := (others =>'X'); y := (others =>'X');
if (x'length > y'length) then return(x); else return(y); end if;
end if;
-- pragma translate_on
end;
function "*" (a, b : std_logic_vector) return std_logic_vector is
variable z : std_logic_vector(a'length+b'length-1 downto 0);
begin
-- pragma translate_off
if not is_x(a&b) then
-- pragma translate_on
return(std_logic_vector(unsigned(a) * unsigned(b)));
-- pragma translate_off
else
z := (others =>'X'); return(z);
end if;
-- pragma translate_on
end;
end;
| apache-2.0 | 1b1c3580294699ac7b1dc5d835c358c9 | 0.632929 | 2.458305 | false | false | false | false |
sergeykhbr/riscv_vhdl | vhdl/rtl/riverlib/cache/tagmem.vhd | 1 | 6,368 | --!
--! Copyright 2019 Sergey Khabarov, [email protected]
--!
--! Licensed under the Apache License, Version 2.0 (the "License");
--! you may not use this file except in compliance with the License.
--! You may obtain a copy of the License at
--!
--! http://www.apache.org/licenses/LICENSE-2.0
--!
--! Unless required by applicable law or agreed to in writing, software
--! distributed under the License is distributed on an "AS IS" BASIS,
--! WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
--! See the License for the specific language governing permissions and
--! limitations under the License.
--!
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_misc.all; -- or_reduce()
library commonlib;
use commonlib.types_common.all;
library techmap;
use techmap.types_mem.all;
entity tagmem is generic (
memtech : integer := 0;
async_reset : boolean := false;
wayidx : integer := 0;
abus : integer := 64; -- system bus address bus (32 or 64 bits)
ibits : integer := 7; -- lines memory addres width (usually 6..8)
lnbits : integer := 5; -- One line bits: log2(bytes_per_line)
flbits : integer := 1; -- Total flags number saved with address tag
snoop : boolean := false -- snoop channel (only with enabled L2-cache)
);
port (
i_clk : in std_logic;
i_nrst : in std_logic;
i_addr : in std_logic_vector(abus-1 downto 0);
i_wstrb : in std_logic_vector(2**lnbits-1 downto 0);
i_wdata : in std_logic_vector(8*(2**lnbits)-1 downto 0);
i_wflags : in std_logic_vector(flbits-1 downto 0);
o_raddr : out std_logic_vector(abus-1 downto 0);
o_rdata : out std_logic_vector(8*(2**lnbits)-1 downto 0);
o_rflags : out std_logic_vector(flbits-1 downto 0);
o_hit : out std_logic;
-- L2 snoop portm active when snoop = 1
i_snoop_addr : in std_logic_vector(abus-1 downto 0);
o_snoop_flags : out std_logic_vector(flbits-1 downto 0)
);
end;
architecture arch_tagmem of tagmem is
constant TAG_BITS : integer := abus - ibits - lnbits;
constant TAG_WITH_FLAGS : integer := TAG_BITS + flbits;
signal wb_index : std_logic_vector(ibits-1 downto 0);
signal tago_rdata : std_logic_vector(TAG_WITH_FLAGS-1 downto 0);
signal tagi_wdata : std_logic_vector(TAG_WITH_FLAGS-1 downto 0);
signal tagi_we : std_logic;
signal wb_snoop_index : std_logic_vector(ibits-1 downto 0);
signal wb_snoop_tagaddr : std_logic_vector(TAG_BITS-1 downto 0);
signal tago_snoop_rdata : std_logic_vector(TAG_WITH_FLAGS-1 downto 0);
signal rb_tagaddr : std_logic_vector(TAG_BITS-1 downto 0);
signal rb_index : std_logic_vector(ibits-1 downto 0);
signal rb_snoop_tagaddr : std_logic_vector(TAG_BITS-1 downto 0);
begin
-- 1-byte memory banks combining into cache line
dx : for n in 0 to 2**lnbits-1 generate
datax : ram_tech generic map (
memtech => memtech,
abits => ibits,
dbits => 8
) port map (
i_clk => i_clk,
i_addr => wb_index,
i_wena => i_wstrb(n),
i_wdata => i_wdata(8*n+7 downto 8*n),
o_rdata => o_rdata(8*n+7 downto 8*n)
);
end generate;
tag0 : ram_tech generic map (
memtech => memtech,
abits => ibits,
dbits => TAG_WITH_FLAGS
) port map (
i_clk => i_clk,
i_addr => wb_index,
i_wena => tagi_we,
i_wdata => tagi_wdata,
o_rdata => tago_rdata
);
snoopena : if snoop generate
tagsnoop0 : ram_tech generic map (
memtech => memtech,
abits => ibits,
dbits => TAG_WITH_FLAGS
) port map (
i_clk => i_clk,
i_addr => wb_snoop_index,
i_wena => tagi_we,
i_wdata => tagi_wdata,
o_rdata => tago_snoop_rdata
);
end generate;
snoopdis : if not snoop generate
tago_snoop_rdata <= (others => '0');
end generate;
comb : process(i_nrst, i_addr, i_wstrb, i_wdata, i_wflags,
tago_rdata, tago_snoop_rdata, rb_tagaddr, rb_index)
variable vb_index : std_logic_vector(ibits-1 downto 0);
variable vb_raddr : std_logic_vector(abus-1 downto 0);
variable vb_tagi_wdata : std_logic_vector(TAG_WITH_FLAGS-1 downto 0);
variable v_hit : std_logic;
variable vb_snoop_index : std_logic_vector(ibits-1 downto 0);
variable vb_snoop_tagaddr : std_logic_vector(TAG_BITS-1 downto 0);
variable vb_snoop_flags : std_logic_vector(flbits-1 downto 0);
begin
v_hit := '0';
if rb_tagaddr = tago_rdata(TAG_BITS-1 downto 0) then
v_hit := tago_rdata(TAG_BITS); -- valid bit
end if;
vb_raddr := (others => '0');
vb_raddr(abus-1 downto ibits + lnbits) := tago_rdata(TAG_BITS-1 downto 0);
vb_raddr(ibits + lnbits - 1 downto lnbits) := rb_index;
vb_index := i_addr(ibits + lnbits - 1 downto lnbits);
vb_tagi_wdata := i_wflags & i_addr(abus-1 downto ibits + lnbits);
if snoop then
vb_snoop_flags := tago_snoop_rdata(TAG_WITH_FLAGS-1 downto TAG_BITS);
vb_snoop_index := i_snoop_addr(ibits + lnbits - 1 downto lnbits);
vb_snoop_tagaddr := i_snoop_addr(abus - 1 downto ibits + lnbits);
if or_reduce(i_wstrb) = '1' then
vb_snoop_index := vb_index;
end if;
if rb_snoop_tagaddr /= tago_snoop_rdata(TAG_BITS-1 downto 0) then
vb_snoop_flags := (others => '0');
end if;
else
vb_snoop_flags := (others => '0');
vb_snoop_index := (others => '0');
vb_snoop_tagaddr := (others => '0');
end if;
if not async_reset and i_nrst = '0' then
vb_tagi_wdata := (others => '0');
vb_index := (others => '0');
end if;
wb_index <= vb_index;
tagi_we <= or_reduce(i_wstrb);
tagi_wdata <= vb_tagi_wdata;
o_raddr <= vb_raddr;
o_rflags <= tago_rdata(TAG_WITH_FLAGS-1 downto TAG_BITS);
o_hit <= v_hit;
wb_snoop_index <= vb_snoop_index;
wb_snoop_tagaddr <= vb_snoop_tagaddr;
o_snoop_flags <= vb_snoop_flags;
end process;
-- registers:
regs : process(i_clk, i_nrst)
begin
if async_reset and i_nrst = '0' then
rb_tagaddr <= (others => '0');
rb_index <= (others => '0');
rb_snoop_tagaddr <= (others => '0');
elsif rising_edge(i_clk) then
rb_tagaddr <= tagi_wdata(TAG_BITS-1 downto 0);
rb_index <= wb_index;
rb_snoop_tagaddr <= wb_snoop_tagaddr;
end if;
end process;
end;
| apache-2.0 | f128a15e1faa13323264dfc7b90a10f0 | 0.617462 | 3.16501 | false | false | false | false |
szanni/aeshw | aes-core/decryption_module_tb.vhd | 1 | 8,069 | --------------------------------------------------------------------------------
-- Company:
-- Engineer:
--
-- Create Date: 09:50:28 07/21/2014
-- Design Name:
-- Module Name: /home/qfi/Documents/aeshw/aes-core/aes-core/decryption_module_tb.vhd
-- Project Name: aes-core
-- Target Device:
-- Tool versions:
-- Description:
--
-- VHDL Test Bench Created by ISE for module: decryption_module
--
-- Dependencies:
--
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
--
-- Notes:
-- This testbench has been automatically generated using types std_logic and
-- std_logic_vector for the ports of the unit under test. Xilinx recommends
-- that these types always be used for the top-level I/O of a design in order
-- to guarantee that the testbench will bind correctly to the post-implementation
-- simulation model.
--------------------------------------------------------------------------------
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--USE ieee.numeric_std.ALL;
ENTITY decryption_module_tb IS
END decryption_module_tb;
ARCHITECTURE behavior OF decryption_module_tb IS
-- Component Declaration for the Unit Under Test (UUT)
COMPONENT decryption_module
PORT(
clk : IN std_logic;
reset : IN std_logic;
dec_start : IN std_logic;
dec_end : OUT std_logic;
din : IN std_logic_vector(127 downto 0);
dout : OUT std_logic_vector(127 downto 0);
addr_rkey : OUT std_logic_vector(3 downto 0);
rkey_in : IN std_logic_vector(127 downto 0)
);
END COMPONENT;
--Inputs
signal clk : std_logic := '0';
signal reset : std_logic := '0';
signal dec_start : std_logic := '0';
signal din : std_logic_vector(127 downto 0) := (others => '0');
signal rkey_in : std_logic_vector(127 downto 0) := (others => '0');
--Outputs
signal dec_end : std_logic;
signal dout : std_logic_vector(127 downto 0);
signal addr_rkey : std_logic_vector(3 downto 0);
-- Clock period definitions
constant clk_period : time := 10 ns;
BEGIN
-- Instantiate the Unit Under Test (UUT)
uut: decryption_module PORT MAP (
clk => clk,
reset => reset,
dec_start => dec_start,
dec_end => dec_end,
din => din,
dout => dout,
addr_rkey => addr_rkey,
rkey_in => rkey_in
);
-- Clock process definitions
clk_process :process
begin
clk <= '0';
wait for clk_period/2;
clk <= '1';
wait for clk_period/2;
end process;
-- Stimulus process
stim_proc: process
begin
wait for clk_period;
dec_start <= '1';
din <= x"69c4e0d86a7b0430d8cdb78070b4c55a"; -- plaintext
wait for clk_period;
assert addr_rkey = x"A" report "decryption : wrong round key address" severity failure; -- counter initialized
wait for clk_period;
assert addr_rkey = x"9" report "decryption : wrong round key address" severity failure;
rkey_in <= x"13111d7fe3944a17f307a78b4d2b30c5"; -- round key 0 now available (one cycle after round key address "A" due to synchronous read)
assert dec_end = '0' report "decryption : wrong end signal" severity failure; -- not yet finished
wait for clk_period;
-- pre round finished
rkey_in <= x"549932d1f08557681093ed9cbe2c974e"; -- round key 1 now available
assert dout = x"7ad5fda789ef4e272bca100b3d9ff59f" report "decryption : wrong result in round 0" severity failure; -- pre round finished
assert addr_rkey = x"8" report "decryption : wrong round key address" severity failure;
assert dec_end = '0' report "decryption : wrong end signal" severity failure; -- not yet finished
wait for clk_period;
-- round 1 finished
rkey_in <= x"47438735a41c65b9e016baf4aebf7ad2"; -- round key 2 now available
assert dout = x"54d990a16ba09ab596bbf40ea111702f" report "decryption : wrong result in round 1" severity failure;
assert addr_rkey = x"7" report "decryption : wrong round key address" severity failure;
assert dec_end = '0' report "decryption : wrong end signal" severity failure; -- not yet finished
wait for clk_period;
-- round 2 finished
rkey_in <= x"14f9701ae35fe28c440adf4d4ea9c026"; -- round key 3 now available
assert dout = x"3e1c22c0b6fcbf768da85067f6170495" report "decryption : wrong result in round 2" severity failure;
assert addr_rkey = x"6" report "decryption : wrong round key address" severity failure;
assert dec_end = '0' report "decryption : wrong end signal" severity failure; -- not yet finished
wait for clk_period;
-- round 3 finished
rkey_in <= x"5e390f7df7a69296a7553dc10aa31f6b"; -- round key 4 now available
assert dout = x"b458124c68b68a014b99f82e5f15554c" report "decryption : wrong result in round 3" severity failure;
assert addr_rkey = x"5" report "decryption : wrong round key address" severity failure;
assert dec_end = '0' report "decryption : wrong end signal" severity failure; -- not yet finished
wait for clk_period;
-- round 4 finished
rkey_in <= x"3caaa3e8a99f9deb50f3af57adf622aa"; -- round key 5 now available
assert dout = x"e8dab6901477d4653ff7f5e2e747dd4f" report "decryption : wrong result in round 4" severity failure;
assert addr_rkey = x"4" report "decryption : wrong round key address" severity failure;
assert dec_end = '0' report "decryption : wrong end signal" severity failure; -- not yet finished
wait for clk_period;
-- round 5 finished
rkey_in <= x"47f7f7bc95353e03f96c32bcfd058dfd"; -- round key 6 now available
assert dout = x"36339d50f9b539269f2c092dc4406d23" report "decryption : wrong result in round 5" severity failure;
assert addr_rkey = x"3" report "decryption : wrong round key address" severity failure;
assert dec_end = '0' report "decryption : wrong end signal" severity failure; -- not yet finished
wait for clk_period;
-- round 6 finished
rkey_in <= x"b6ff744ed2c2c9bf6c590cbf0469bf41"; -- round key 7 now available
assert dout = x"2d6d7ef03f33e334093602dd5bfb12c7" report "decryption : wrong result in round 6" severity failure;
assert addr_rkey = x"2" report "decryption : wrong round key address" severity failure;
assert dec_end = '0' report "decryption : wrong end signal" severity failure; -- not yet finished
wait for clk_period;
-- round 7 finished
rkey_in <= x"b692cf0b643dbdf1be9bc5006830b3fe"; -- round key 8 now available
assert dout = x"3bd92268fc74fb735767cbe0c0590e2d" report "decryption : wrong result in round 7" severity failure;
assert addr_rkey = x"1" report "decryption : wrong round key address" severity failure;
assert dec_end = '0' report "decryption : wrong end signal" severity failure; -- not yet finished
wait for clk_period;
-- round 8 finished
rkey_in <= x"d6aa74fdd2af72fadaa678f1d6ab76fe"; -- round key 9 now available
assert dout = x"a7be1a6997ad739bd8c9ca451f618b61" report "decryption : wrong result in round 8" severity failure;
assert addr_rkey = x"0" report "decryption : wrong round key address" severity failure;
assert dec_end = '0' report "decryption : wrong end signal" severity failure; -- not yet finished
wait for clk_period;
-- round 9 finished
rkey_in <= x"000102030405060708090a0b0c0d0e0f"; -- round key 10 now available
assert dout = x"6353e08c0960e104cd70b751bacad0e7" report "decryption : wrong result in round 9" severity failure;
assert dec_end = '0' report "decryption : wrong end signal" severity failure; -- not yet finished
wait for clk_period;
-- round 10 finished
assert dout = x"00112233445566778899aabbccddeeff" report "decryption : wrong result in round 10" severity failure;
assert dec_end = '1' report "decryption : wrong end signal" severity failure; -- finished
wait for clk_period;
assert dec_end = '0' report "decryption : wrong end signal" severity failure; -- ready
wait;
end process;
END;
| bsd-2-clause | a9b909499f4f85568c67cd7e8cf9b3d3 | 0.683604 | 3.442406 | false | false | false | false |
sergeykhbr/riscv_vhdl | vhdl/rtl/techmap/pll/SysPLL_v6.vhd | 1 | 7,590 | -- file: SysPLL_v6.vhd
--
-- (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
--
------------------------------------------------------------------------------
-- User entered comments
------------------------------------------------------------------------------
-- None
--
------------------------------------------------------------------------------
-- "Output Output Phase Duty Pk-to-Pk Phase"
-- "Clock Freq (MHz) (degrees) Cycle (%) Jitter (ps) Error (ps)"
------------------------------------------------------------------------------
-- CLK_OUT1____40.000______0.000______50.0______135.255_____89.971
--
------------------------------------------------------------------------------
-- "Input Clock Freq (MHz) Input Jitter (UI)"
------------------------------------------------------------------------------
-- __primary_________200.000____________0.010
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
use ieee.numeric_std.all;
library unisim;
use unisim.vcomponents.all;
entity SysPLL_v6 is
port
(-- Clock in ports
CLK_IN : in std_logic;
-- Clock out ports
CLK_OUT1 : out std_logic;
-- Status and control signals
RESET : in std_logic;
LOCKED : out std_logic
);
end SysPLL_v6;
architecture xilinx of SysPLL_v6 is
attribute CORE_GENERATION_INFO : string;
attribute CORE_GENERATION_INFO of xilinx : architecture is "SysPLL_v6,clk_wiz_v3_6,{component_name=SysPLL_v6,use_phase_alignment=true,use_min_o_jitter=false,use_max_i_jitter=false,use_dyn_phase_shift=false,use_inclk_switchover=false,use_dyn_reconfig=false,feedback_source=FDBK_AUTO,primtype_sel=MMCM_ADV,num_out_clk=1,clkin1_period=5.000,clkin2_period=10.0,use_power_down=false,use_reset=true,use_locked=true,use_inclk_stopped=false,use_status=false,use_freeze=false,use_clk_valid=false,feedback_type=SINGLE,clock_mgr_type=MANUAL,manual_override=false}";
-- Output clock buffering / unused connectors
signal clkfbout : std_logic;
signal clkfbout_buf : std_logic;
signal clkfboutb_unused : std_logic;
signal clkout0 : std_logic;
signal clkout0b_unused : std_logic;
signal clkout1_unused : std_logic;
signal clkout1b_unused : std_logic;
signal clkout2_unused : std_logic;
signal clkout2b_unused : std_logic;
signal clkout3_unused : std_logic;
signal clkout3b_unused : std_logic;
signal clkout4_unused : std_logic;
signal clkout5_unused : std_logic;
signal clkout6_unused : std_logic;
-- Dynamic programming unused signals
signal do_unused : std_logic_vector(15 downto 0);
signal drdy_unused : std_logic;
-- Dynamic phase shift unused signals
signal psdone_unused : std_logic;
-- Unused status signals
signal clkfbstopped_unused : std_logic;
signal clkinstopped_unused : std_logic;
begin
-- Clocking primitive
--------------------------------------
-- Instantiation of the MMCM primitive
-- * Unused inputs are tied off
-- * Unused outputs are labeled unused
mmcm_adv_inst : MMCM_ADV
generic map
(BANDWIDTH => "OPTIMIZED",
CLKOUT4_CASCADE => FALSE,
CLOCK_HOLD => FALSE,
COMPENSATION => "ZHOLD",
STARTUP_WAIT => FALSE,
DIVCLK_DIVIDE => 1,
CLKFBOUT_MULT_F => 5.000,
CLKFBOUT_PHASE => 0.000,
CLKFBOUT_USE_FINE_PS => FALSE,
CLKOUT0_DIVIDE_F => 25.000,
CLKOUT0_PHASE => 0.000,
CLKOUT0_DUTY_CYCLE => 0.500,
CLKOUT0_USE_FINE_PS => FALSE,
CLKIN1_PERIOD => 5.000,
REF_JITTER1 => 0.010)
port map
-- Output clocks
(CLKFBOUT => clkfbout,
CLKFBOUTB => clkfboutb_unused,
CLKOUT0 => clkout0,
CLKOUT0B => clkout0b_unused,
CLKOUT1 => clkout1_unused,
CLKOUT1B => clkout1b_unused,
CLKOUT2 => clkout2_unused,
CLKOUT2B => clkout2b_unused,
CLKOUT3 => clkout3_unused,
CLKOUT3B => clkout3b_unused,
CLKOUT4 => clkout4_unused,
CLKOUT5 => clkout5_unused,
CLKOUT6 => clkout6_unused,
-- Input clock control
CLKFBIN => clkfbout_buf,
CLKIN1 => CLK_IN,
CLKIN2 => '0',
-- Tied to always select the primary input clock
CLKINSEL => '1',
-- Ports for dynamic reconfiguration
DADDR => (others => '0'),
DCLK => '0',
DEN => '0',
DI => (others => '0'),
DO => do_unused,
DRDY => drdy_unused,
DWE => '0',
-- Ports for dynamic phase shift
PSCLK => '0',
PSEN => '0',
PSINCDEC => '0',
PSDONE => psdone_unused,
-- Other control and status signals
LOCKED => LOCKED,
CLKINSTOPPED => clkinstopped_unused,
CLKFBSTOPPED => clkfbstopped_unused,
PWRDWN => '0',
RST => RESET);
-- Output buffering
-------------------------------------
clkf_buf : BUFG
port map
(O => clkfbout_buf,
I => clkfbout);
clkout1_buf : BUFG
port map
(O => CLK_OUT1,
I => clkout0);
end xilinx;
| apache-2.0 | 6614bcba9ee7a884165c02c23d795070 | 0.586034 | 4.179515 | false | false | false | false |
szanni/aeshw | aes-core/sbox_inv_tb.vhd | 1 | 624 | library ieee;
use ieee.std_logic_1164.all;
entity sbox_inv_tb is
end sbox_inv_tb;
architecture behavior of sbox_inv_tb is
component sbox_inv
port (
d_in : in std_logic_vector(7 downto 0);
d_out : out std_logic_vector(7 downto 0)
);
end component;
--Inputs
signal d_in : std_logic_vector(7 downto 0) := (others => '0');
--Outputs
signal d_out : std_logic_vector(7 downto 0);
begin
uut: sbox_inv port map (
d_in => d_in,
d_out => d_out
);
stim_proc: process
begin
d_in <= x"b8";
wait for 10 ns;
assert d_out = x"9a" report "sbox_inv: lookup failure" severity failure;
wait;
end process;
end;
| bsd-2-clause | 1fc5f67e11e1253628d4c2a21ff34b72 | 0.657051 | 2.557377 | false | false | false | false |
sergeykhbr/riscv_vhdl | vhdl/rtl/prj/ml605_gnss/top_ml605_gnss.vhd | 1 | 13,649 | --!
--! Copyright 2018 Sergey Khabarov, [email protected]
--!
--! Licensed under the Apache License, Version 2.0 (the "License");
--! you may not use this file except in compliance with the License.
--! You may obtain a copy of the License at
--!
--! http://www.apache.org/licenses/LICENSE-2.0
--!
--! Unless required by applicable law or agreed to in writing, software
--! distributed under the License is distributed on an "AS IS" BASIS,
--! WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
--! See the License for the specific language governing permissions and
--! limitations under the License.
--!
--! Standard library
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
--! Data transformation and math functions library
library commonlib;
use commonlib.types_common.all;
--! Technology definition library.
library techmap;
--! Technology constants definition.
use techmap.gencomp.all;
--! "Virtual" PLL declaration.
use techmap.types_pll.all;
-- "Virtual" memory banks
use techmap.types_mem.all;
--! "Virtual" buffers declaration.
use techmap.types_buf.all;
--! Top-level implementaion library
library work;
--! Target dependable configuration: RTL, FPGA or ASIC.
use work.config_target.all;
entity top_ml605_gnss is port
(
--! Input reset. Active HIGH.
i_rst : in std_logic;
--! Differential clock (LVDS) positive/negaive signal.
i_sclk_p : in std_logic;
i_sclk_n : in std_logic;
--! GPIO: [11:4] LEDs; [3:0] DIP switch
io_gpio : inout std_logic_vector(11 downto 0);
--! JTAG signals:
i_jtag_tck : in std_logic;
i_jtag_ntrst : in std_logic;
i_jtag_tms : in std_logic;
i_jtag_tdi : in std_logic;
o_jtag_tdo : out std_logic;
o_jtag_vref : out std_logic;
--! UART1 signals:
i_uart1_rd : in std_logic;
o_uart1_td : out std_logic;
--! UART2 TAP (debug port) signals: DO NOT SUPPORT FIRMWARE OUTPUT!
i_uart2_rd : in std_logic;
o_uart2_td : out std_logic;
--! Ethernet MAC PHY interface signals
i_gmiiclk_p : in std_ulogic;
i_gmiiclk_n : in std_ulogic;
o_egtx_clk : out std_ulogic;
i_etx_clk : in std_ulogic;
i_erx_clk : in std_ulogic;
i_erxd : in std_logic_vector(3 downto 0);
i_erx_dv : in std_ulogic;
i_erx_er : in std_ulogic;
i_erx_col : in std_ulogic;
i_erx_crs : in std_ulogic;
i_emdint : in std_ulogic;
o_etxd : out std_logic_vector(3 downto 0);
o_etx_en : out std_ulogic;
o_etx_er : out std_ulogic;
o_emdc : out std_ulogic;
io_emdio : inout std_logic;
o_erstn : out std_ulogic;
-- GNSS Sub-system signals:
i_clk_adc : in std_logic;
i_gps_I : in std_logic_vector(1 downto 0);
i_gps_Q : in std_logic_vector(1 downto 0);
i_glo_I : in std_logic_vector(1 downto 0);
i_glo_Q : in std_logic_vector(1 downto 0);
o_pps : out std_logic;
i_gps_ld : in std_logic;
i_glo_ld : in std_logic;
o_max_sclk : out std_logic;
o_max_sdata : out std_logic;
o_max_ncs : out std_logic_vector(1 downto 0);
i_antext_stat : in std_logic;
i_antext_detect : in std_logic;
o_antext_ena : out std_logic;
o_antint_contr : out std_logic
);
end top_ml605_gnss;
architecture arch_top_ml605_gnss of top_ml605_gnss is
component riscv_soc is port
(
i_rst : in std_logic;
i_clk : in std_logic;
--! GPIO.
i_gpio : in std_logic_vector(11 downto 0);
o_gpio : out std_logic_vector(11 downto 0);
o_gpio_dir : out std_logic_vector(11 downto 0);
--! GPTimers
o_pwm : out std_logic_vector(1 downto 0);
--! JTAG signals:
i_jtag_tck : in std_logic;
i_jtag_ntrst : in std_logic;
i_jtag_tms : in std_logic;
i_jtag_tdi : in std_logic;
o_jtag_tdo : out std_logic;
o_jtag_vref : out std_logic;
--! UART1 signals:
i_uart1_ctsn : in std_logic;
i_uart1_rd : in std_logic;
o_uart1_td : out std_logic;
o_uart1_rtsn : out std_logic;
--! UART2 (debug port) signals:
i_uart2_ctsn : in std_logic;
i_uart2_rd : in std_logic;
o_uart2_td : out std_logic;
o_uart2_rtsn : out std_logic;
--! SPI Flash
i_flash_si : in std_logic;
o_flash_so : out std_logic;
o_flash_sck : out std_logic;
o_flash_csn : out std_logic;
o_flash_wpn : out std_logic;
o_flash_holdn : out std_logic;
o_flash_reset : out std_logic;
--! OTP Memory
i_otp_d : in std_logic_vector(15 downto 0);
o_otp_d : out std_logic_vector(15 downto 0);
o_otp_a : out std_logic_vector(11 downto 0);
o_otp_we : out std_logic;
o_otp_re : out std_logic;
--! Ethernet MAC PHY interface signals
i_etx_clk : in std_ulogic;
i_erx_clk : in std_ulogic;
i_erxd : in std_logic_vector(3 downto 0);
i_erx_dv : in std_ulogic;
i_erx_er : in std_ulogic;
i_erx_col : in std_ulogic;
i_erx_crs : in std_ulogic;
i_emdint : in std_ulogic;
o_etxd : out std_logic_vector(3 downto 0);
o_etx_en : out std_ulogic;
o_etx_er : out std_ulogic;
o_emdc : out std_ulogic;
i_eth_mdio : in std_logic;
o_eth_mdio : out std_logic;
o_eth_mdio_oe : out std_logic;
i_eth_gtx_clk : in std_logic;
i_eth_gtx_clk_90 : in std_logic;
o_erstn : out std_ulogic;
-- GNSS Sub-system signals:
i_clk_adc : in std_logic;
i_gps_I : in std_logic_vector(1 downto 0);
i_gps_Q : in std_logic_vector(1 downto 0);
i_glo_I : in std_logic_vector(1 downto 0);
i_glo_Q : in std_logic_vector(1 downto 0);
o_pps : out std_logic;
i_gps_ld : in std_logic;
i_glo_ld : in std_logic;
o_max_sclk : out std_logic;
o_max_sdata : out std_logic;
o_max_ncs : out std_logic_vector(1 downto 0);
i_antext_stat : in std_logic;
i_antext_detect : in std_logic;
o_antext_ena : out std_logic;
o_antint_contr : out std_logic
);
end component;
signal ib_rst : std_logic;
signal ib_clk_tcxo : std_logic;
signal ib_sclk_n : std_logic;
signal ob_gpio_direction : std_logic_vector(11 downto 0);
signal ob_gpio_opins : std_logic_vector(11 downto 0);
signal ib_gpio_ipins : std_logic_vector(11 downto 0);
signal ib_uart1_rd : std_logic;
signal ob_uart1_td : std_logic;
signal ib_uart2_rd : std_logic;
signal ob_uart2_td : std_logic;
--! JTAG signals:
signal ib_jtag_tck : std_logic;
signal ib_jtag_ntrst : std_logic;
signal ib_jtag_tms : std_logic;
signal ib_jtag_tdi : std_logic;
signal ob_jtag_tdo : std_logic;
signal ob_jtag_vref : std_logic;
signal ib_gmiiclk : std_logic;
signal ib_eth_mdio : std_logic;
signal ob_eth_mdio : std_logic;
signal ob_eth_mdio_oe : std_logic;
signal w_eth_gtx_clk : std_logic;
signal w_eth_gtx_clk_90 : std_logic;
signal ib_clk_adc : std_logic;
signal ib_gps_I : std_logic_vector(1 downto 0);
signal ib_gps_Q : std_logic_vector(1 downto 0);
signal ib_glo_I : std_logic_vector(1 downto 0);
signal ib_glo_Q : std_logic_vector(1 downto 0);
signal ob_pps : std_logic;
signal ib_gps_ld : std_logic;
signal ib_glo_ld : std_logic;
signal ob_max_sclk : std_logic;
signal ob_max_sdata : std_logic;
signal ob_max_ncs : std_logic_vector(1 downto 0);
signal ib_antext_stat : std_logic;
signal ib_antext_detect : std_logic;
signal ob_antext_ena : std_logic;
signal ob_antint_contr : std_logic;
signal w_ext_reset : std_ulogic; -- External system reset or PLL unlcoked. MUST NOT USED BY DEVICES.
signal w_glob_rst : std_ulogic; -- Global reset active HIGH
signal w_glob_nrst : std_ulogic; -- Global reset active LOW
signal w_soft_rst : std_ulogic; -- Software reset (acitve HIGH) from DSU
signal w_bus_nrst : std_ulogic; -- Global reset and Soft Reset active LOW
signal w_clk_bus : std_ulogic; -- bus clock from the internal PLL (100MHz virtex6/40MHz Spartan6)
signal w_pll_lock : std_ulogic; -- PLL status signal. 0=Unlocked; 1=locked.
begin
--! PAD buffers:
irst0 : ibuf_tech generic map(CFG_PADTECH) port map (ib_rst, i_rst);
iclk0 : idsbuf_tech generic map (CFG_PADTECH) port map (
i_sclk_p, i_sclk_n, ib_clk_tcxo);
ird1 : ibuf_tech generic map(CFG_PADTECH) port map (ib_uart1_rd, i_uart1_rd);
otd1 : obuf_tech generic map(CFG_PADTECH) port map (o_uart1_td, ob_uart1_td);
ird2 : ibuf_tech generic map(CFG_PADTECH) port map (ib_uart2_rd, i_uart2_rd);
otd2 : obuf_tech generic map(CFG_PADTECH) port map (o_uart2_td, ob_uart2_td);
gpiox : for i in 0 to 11 generate
iob0 : iobuf_tech generic map(CFG_PADTECH)
port map (ib_gpio_ipins(i), io_gpio(i), ob_gpio_opins(i), ob_gpio_direction(i));
end generate;
--! JTAG signals:
ijtck0 : ibuf_tech generic map(CFG_PADTECH) port map (ib_jtag_tck, i_jtag_tck);
ijtrst0 : ibuf_tech generic map(CFG_PADTECH) port map (ib_jtag_ntrst, i_jtag_ntrst);
ijtms0 : ibuf_tech generic map(CFG_PADTECH) port map (ib_jtag_tms, i_jtag_tms);
ijtdi0 : ibuf_tech generic map(CFG_PADTECH) port map (ib_jtag_tdi, i_jtag_tdi);
ojtdo0 : obuf_tech generic map(CFG_PADTECH) port map (o_jtag_tdo, ob_jtag_tdo);
ojvrf0 : obuf_tech generic map(CFG_PADTECH) port map (o_jtag_vref, ob_jtag_vref);
igbebuf0 : igdsbuf_tech generic map (CFG_PADTECH) port map (
i_gmiiclk_p, i_gmiiclk_n, ib_gmiiclk);
iomdio : iobuf_tech generic map(CFG_PADTECH)
port map (ib_eth_mdio, io_emdio, ob_eth_mdio, ob_eth_mdio_oe);
--! GNSS sub-system
iclkadc0 : ibuf_tech generic map(CFG_PADTECH) port map (ib_clk_adc, i_clk_adc);
adcx : for i in 0 to 1 generate
igpsi0 : ibuf_tech generic map(CFG_PADTECH) port map (ib_gps_I(i), i_gps_I(i));
igpsq0 : ibuf_tech generic map(CFG_PADTECH) port map (ib_gps_Q(i), i_gps_Q(i));
igloi0 : ibuf_tech generic map(CFG_PADTECH) port map (ib_glo_I(i), i_glo_I(i));
igloq0 : ibuf_tech generic map(CFG_PADTECH) port map (ib_glo_Q(i), i_glo_Q(i));
end generate;
opps0 : obuf_tech generic map(CFG_PADTECH) port map (o_pps, ob_pps);
igpsld0 : ibuf_tech generic map(CFG_PADTECH) port map (ib_gps_ld, i_gps_ld);
iglold0 : ibuf_tech generic map(CFG_PADTECH) port map (ib_glo_ld, i_glo_ld);
omaxclk0 : obuf_tech generic map(CFG_PADTECH) port map (o_max_sclk, ob_max_sclk);
omaxdat0 : obuf_tech generic map(CFG_PADTECH) port map (o_max_sdata, ob_max_sdata);
omaxcs0 : obuf_tech generic map(CFG_PADTECH) port map (o_max_ncs(0), ob_max_ncs(0));
omaxcs1 : obuf_tech generic map(CFG_PADTECH) port map (o_max_ncs(1), ob_max_ncs(1));
iantstat0 : ibuf_tech generic map(CFG_PADTECH) port map (ib_antext_stat, i_antext_stat);
iantdet0 : ibuf_tech generic map(CFG_PADTECH) port map (ib_antext_detect, i_antext_detect);
oanten0 : obuf_tech generic map(CFG_PADTECH) port map (o_antext_ena, ob_antext_ena);
oantctr0 : obuf_tech generic map(CFG_PADTECH) port map (o_antint_contr, ob_antint_contr);
--! Gigabit clock phase rotator with buffers
clkrot90 : clkp90_tech generic map (
tech => CFG_FABTECH,
freq => 125000 -- KHz = 125 MHz
) port map (
i_rst => ib_rst,
i_clk => ib_gmiiclk,
o_clk => w_eth_gtx_clk,
o_clkp90 => w_eth_gtx_clk_90,
o_clk2x => open, -- used in gbe 'io_ref'
o_lock => open
);
o_egtx_clk <= w_eth_gtx_clk;
------------------------------------
-- @brief Internal PLL device instance.
pll0 : SysPLL_tech generic map (
tech => CFG_FABTECH
) port map (
i_reset => ib_rst,
i_clk_tcxo => ib_clk_tcxo,
o_clk_bus => w_clk_bus,
o_locked => w_pll_lock
);
w_ext_reset <= ib_rst or not w_pll_lock;
soc0 : riscv_soc port map
(
i_rst => w_ext_reset,
i_clk => w_clk_bus,
--! GPIO.
i_gpio => ib_gpio_ipins,
o_gpio => ob_gpio_opins,
o_gpio_dir => ob_gpio_direction,
--! GPTimers
o_pwm => open,
--! JTAG signals:
i_jtag_tck => ib_jtag_tck,
i_jtag_ntrst => ib_jtag_ntrst,
i_jtag_tms => ib_jtag_tms,
i_jtag_tdi => ib_jtag_tdi,
o_jtag_tdo => ob_jtag_tdo,
o_jtag_vref => ob_jtag_vref,
--! UART1 signals:
i_uart1_ctsn => '0',
i_uart1_rd => ib_uart1_rd,
o_uart1_td => ob_uart1_td,
o_uart1_rtsn => open,
--! UART2 (debug port) signals:
i_uart2_ctsn => '0',
i_uart2_rd => ib_uart2_rd,
o_uart2_td => ob_uart2_td,
o_uart2_rtsn => open,
--! SPI Flash
i_flash_si => '0',
o_flash_so => open,
o_flash_sck => open,
o_flash_csn => open,
o_flash_wpn => open,
o_flash_holdn => open,
o_flash_reset => open,
--! OTP Memory
i_otp_d => X"0000",
o_otp_d => open,
o_otp_a => open,
o_otp_we => open,
o_otp_re => open,
--! Ethernet MAC PHY interface signals
i_etx_clk => i_etx_clk,
i_erx_clk => i_erx_clk,
i_erxd => i_erxd,
i_erx_dv => i_erx_dv,
i_erx_er => i_erx_er,
i_erx_col => i_erx_col,
i_erx_crs => i_erx_crs,
i_emdint => i_emdint,
o_etxd => o_etxd,
o_etx_en => o_etx_en,
o_etx_er => o_etx_er,
o_emdc => o_emdc,
i_eth_mdio => ib_eth_mdio,
o_eth_mdio => ob_eth_mdio,
o_eth_mdio_oe => ob_eth_mdio_oe,
i_eth_gtx_clk => w_eth_gtx_clk,
i_eth_gtx_clk_90 => w_eth_gtx_clk_90,
o_erstn => o_erstn,
-- GNSS Sub-system signals:
i_clk_adc => ib_clk_adc,
i_gps_I => ib_gps_I,
i_gps_Q => ib_gps_Q,
i_glo_I => ib_glo_I,
i_glo_Q => ib_glo_Q,
o_pps => ob_pps,
i_gps_ld => ib_gps_ld,
i_glo_ld => ib_glo_ld,
o_max_sclk => ob_max_sclk,
o_max_sdata => ob_max_sdata,
o_max_ncs => ob_max_ncs,
i_antext_stat => ib_antext_stat,
i_antext_detect => ib_antext_detect,
o_antext_ena => ob_antext_ena,
o_antint_contr => ob_antint_contr
);
end arch_top_ml605_gnss;
| apache-2.0 | 601b38f401a921f2cdccc4f7a15321a7 | 0.624295 | 2.783806 | false | false | false | false |
szanni/aeshw | zybo-base/zybo_bsd/zybo_bsd.srcs/sources_1/bd/system/ip/system_auto_pc_5/fifo_generator_v11_0/builtin/builtin_prim_v6.vhd | 19 | 37,128 | `protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
cIiYfk3Xy6N5OP4pq3GmqGiiVNUZ6H5+UojetFJBvbKolIu21jc4BnJQVK6clVlXeOqxCwUuMeWy
2HOHrYFv+g==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
lIziGPDmnLk8lYYpZIaDaMbL8fBzq4Pr1Jhh0ulXet+pjCJLyV5jakxS1oSptZ+tHYCT5i9DwoXk
484l0YBwGxIV/F50kQ4mY5SmovR5v/32XWyGw8Sob1+z/rA/iYbfy53jpQjBFTMhONxMl2jPMKOr
8b4lWHN3CKPgzR7gpH0=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2013_09", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
htRzDc7r6AHMWLJSZlCSE/9tAboPhTxPArTqmJzMnfBntgIxMOX2YAPT8iZ7gZlglNlT/Bmc3ZIa
nj4bYkmP/Ed/Ze8J5Af7OuS/hLPfbdPEIMVOJrAzPKtgRUGYzZFakpIpDVbTLnXVCXGbnWwhbHOl
N+MoLyC3ep/1xGkMFlPyLgKVegokAfOd/5ePZ6yal5L+KR1ET32v4t5eGaONowzpG0O9uY8LtLQU
iVJDGAf4BzpePmtzOyeo5v68FfUFTjm1d6csF3e9pbQ9fEwJazksjJfyX2XYuUZH1eu5bhyJMU/O
c9/o5sfORhKXoxNo0FDKepouEYzneEXI8uuD0A==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
FHtFxX6m7YezwdeWAQ6jmWMHTTCQ3ATyb5990cCrfHVNkzUwGdq1shf9GRL+uR3C20sVQ7v4/+tb
aJQn0JjlSYvQTO2Q6FVyjXNHAr7wpM4t4p6I4KuMXkNXuNp6PVpERQgKViWQe974sEr/n8wacl6w
0ZeeyAlvAxPvOHeW8Sc=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
WrHRD4nLu8DRRwrUtiyMH2ZN6Vs3L2kgyFgp5P9DMlNKTdIDDQa1yTQPpciIt64OlniyoYCatBqg
Wt8N5KlawExwntwLmfujXap7EAFuw40uyJX+yki/gczIgekz/25Q1+NPVfIAzqSReCro4UUW45VQ
4oIxLBIF53PvEJm3CGD200yoSxIl9Szkkq1FCyNtIufy0im7xj9CnEg/iFEwxzn8s8Ge79lV+lhg
fO4H7eA/Qsx28fzoVv2RYnMwC/Ln7iTt2527VU0KjrPDX1WGbNCJ5ny6IM/daMbuTMvJb5fz48+S
KUNyOcNxuhu15WGxxGlN6mcj5zB0r8XxgsnOfQ==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 25744)
`protect data_block
EufbohqYXYXdSKgd2wid85QAz6nmZQlgwpxyaOJ6iU5HCwy5KcUzMU5Vk0eG7GRTWbqqwaELdsbR
eWwJt26/naD594YSUwZsF363lEqCh7g7mw2Tjh5wKmzg21ncivZ5TADtxkHoaKrLrtNTQmfg6Y7K
fch1+Fcv73dUCyijN6KfpAOQXPtfIF7QWZrdJ6k4NDCetzr7iK7HUssjfCYfK51WEKNfZRQiVWaW
z+RFZaWjJJe6UlE/0bL9T5/97oJa6aRIEz//oQnCMqhki8uMEuXo9dWSlqaHm5Gtqq3dVScF3nVU
IryEMtjK1gA0odj5PDQuJ57gNpNrrbvt7AKvlimUbzRJPzEcNWeVvl8a0iEBuJgWOmnAWZzrxZmn
3ya869WW/KAp+p3jtqrqtCcadMac1lWbKWYNJ8Q+zd2HMOetPxJGCuQiEc9sAD+oQoePJsmFI5nd
Myx43TgaFr4PoR+lcjEVvhf6vwQRxrVf+SedzLBPi4HLXn4EPxdZX4nLhkivAY/Mvf9G1DraNrLm
wqtLse9/LqIGOlRgnmrddSSjtJA+J1DJQGo+70iEFiliVIQjBThbm4oK8G3lT0bVcQcaXPKJB5tt
HuYsa42fkZpvQzPFZ9ef/S91298m4ZyCBiOM2RSb8lUtwT9DaIsDPcS+TIMnpfO+CA0eibRUsmwG
UnKmkQMjgOvBMqu2nhIPVPHtUwD45SDrPQDVCL+hJTQwWzL6Q3i1tnS68VRNtWTy75p0BgIZVAw+
d5KINDwwT77oX3MxIE7rTWsSDi9w9QAlmHf2bUA/fHxsuOxVhCCaTBntGjd9ZFGObkoPd8JDkPN1
AGb+rcl8iWOTlfiaApc/dL3/WKx5PsaKnAPa8wm1+6b1vgkrhLqPOJ5b1099jh9nitFbjmxRONfz
itpzL1PMEaLmpwiSVShcWG2MhoIdI0plXu/rO68ia37tVbb3xyarB+8V2jUBaHh+yquKJdU/egPc
P3rMVXqFBbWhhb8mXxO6bAYHgTHKAhTvBoxWvsKl9Uw96apSUF1dSdq7tt/AUfO9PL/bsIBZGwfl
vCKf5pq1UG2iWInMBJ7hod7Y/wg9xx19xqkFcvHubFHjHo4eN3mJx7f7Rr5fht7Bbf/het+kVbW7
kBZoCqNjehW2PjqUPNw2EyCLwl3mAp0eLNYcVNxqGbSex0XdefPpw0xRlP52d2tUabAmitkITope
Kpwyd28XQKmXS7Bug9S0XPb9r8OcMkdN96J1RaNlP4VlKEqLOUAfrP04e/csu/SawPSDFJQIjwih
7K/HKz3FCSHnxCBT/9KMbdM6qcIaYOU/ud4lCBg2jh9YCyjWHtDt1bEaf/lBuZUXthZIpCK+l9Kt
wSZdMHwnkSthvygcbC2g515wUoCaPuhRVeqg6m3oXzS6Wi7qvxJtA5RZoP0hlHr9n/TAVEhzVrkN
RjT8VkJWyDN8OKBzKijilyL72famQUekMyTE4gaujs4a1y9Vdn0Ll+tQKURFFaxFI0IZ3k7rGqTl
k4NlqS/mMydRScIAOVlUpZwKJudejPOzCHijyM9MEDZ1SyLJ+Hx4f6inrINpcC/Jwq3dGT+EeYfh
/0XMhfq2c6iYAVvOUyEvoJ3zlSEOPzWJabBKv2Qzoo5LQzcdq2dgLyIYTC9WsXqzxAU+hinta3CK
4nYoKsYZgYJVf2ruiJEpkb+gaa2ywKaRxd4TywuQsNgtdsg0yO2MrWVZe61smBZ8ptdpxYyGSvDe
VTFE5D/a5inntknJkiINU+hb8qDoxaVUkFb7WEsmj7TZ2G+8kj2R0qxQW82fdrOjQ08o9HSTHCKG
AnTABQ7zLVSJ3aBCXZmhVgUiZLZQS4HRFkOr+CxVhHLaLSpvvOVoJpNU0owVXwPsBbivWgDQJjzM
D+zsmzCD7qd1n6a8rENnADJx2o7qq0YPJTtu33FTvsOGOU9K1xXyf/rFEeoXUA6IG5CoY4v0sIo9
BtYnnIqNmFHBvwsno9vtRxvRy9oeiPVwM3GRu0TJidKdzBlzaY8N1y8VK1A8lsdYCClXBz8Vh3OH
YHMULtOPbLwBlBUjTtNIP3wLJX0QoKLuWjbnGl8cAhkLkcYONB7nVHEe+5EhU0OjQ2yn7/oNFJoM
arfnv1SAjAHzHeCa/ZnMkYMu0Oq7sMYh6CioIJHe6TYV7GjBef/WP8xL+KzDexcR1pHl8dLcAZiY
yy31/tGt1YcSDZsIB9xxi38eUlV4TUq07L160GoNEGTmX0EsChtLYYnBuI/TRULkd7ane059AbZw
OGG3NSO8O5sVeO4ogf50PNpU/Tcq3AVih8LfzKaJjrX1E5QeR7Yy8W2wBqzjB2R1Mv//TsfViE+i
9sHJS5GxEjIWMaFrTXgY0HS01360hR6LXsSHr8YqQerKUV5f/G8ozWyjayQ7pTwsNCZ2TGo/NzgQ
vriPyBXwfwus0Dz0HgCe9Jqr0sUVDBi4JZ6oywkSbhkXxRmKVTC4/arRMqyH5QVgp6YdrSfJdqCR
bnorb6nQ9kmR4xagorBZhRVzg6jySLqVwuYBe1tbZtpqkzb4Qhv1U/XtbSVi1QPufu0utw7qcuH6
gvFHJfxigK26sE2TAGI76t6ggD5k0yq/VYHnLIHDY7WElDwgtsdjEOTylRxt/EDezvdW7j6+iamk
tBNrlJaum2/f8D3QFqVlOZrAhrMhIWHsyqfsOQQL0wid2Ycu/ncgfZJ6lAcmuMkiw3PS5A69Fig5
woiZcu8O3rRsgMY2XDR8EwoxJBE3VDad/Qd8HCsP5+Cxv9eauUeBxYqaGirlY2DdA1LKznFjNNNZ
+wRBtTRFO3EWJkA2B2ADqIn6JcV1dQGN/pqhaFGla4R2OFno5EMZdUNUSBlScOl+DfE889NCEol6
2SJpmjjSMJkgw5dM6h3YgatJ2jracP4AP8kg1iZepUmPYvAM+BfY4O2/FUOGII/sIwnuSK4ES85i
JB0o9QFi0nxij7e3xzrxNN9A/VVe5v4ZcUGA12qX0F+Nk77yvteQxXpthfJd1SQ4Ekr1Yi7P995D
lBq9hkwqeN/+m/StFNjjL1LAWXEueLA/eAwa9gcgssvqVFVyKwLx6svVNnkLP/3wHhEANeVv6Feo
yqHPsW6Tf1OKu3skd7r6oynfBNSOEQALsDLzlK2bcTK07Fk05ET1xxMNWvQNOiyK2cSzQKeulG8c
U7GkBD+aMjAtYC0B9OPNj2c3a7UM1Bi00qI7y8AGRz99BZYHd9BAyTHes5LUZHtGzCSdGCkXnUG1
LoEezNxelj37f4K7jexsYqH49gLHwPR4avS3cDkVn2ghaAE22n0iTWu+ax0R+JB4Jt/RGEgPWxBa
0LqkNPKZ8zOT6hsS25jnhFwAIckbjs8qkDQcw0ary37mPLWvCadjxs7jKlDHWGS+D4VyIKmUaO5v
wL+NVS1xU5iP5EMM3uttLPJfoYYpCCHshnNT6UZwzS7djU/wChNpoKRiv4n+uD3LgWR8akMq2OTV
t4eV7DfQd2TA/CU4KOR2cWjB9Ao5XA6Jp7RgQj51ZT5gL4GmBQYVkwSQNamaG9F+EctTe9FRsvhZ
79L6K1jrldewaWDPPCbuO0wMqZp1alAXcs12pvqSxQhRPeTO31LhSVUWW4KhXGSnQ0ObJcZL2XHh
FMQ04dOjxvXU92l7OCjDlFsZxPNJzb7+yywM2bLM1AGBm7dNSmu0WRdIFeTN6iWt0bWv/yzZs2+B
iRnLuSwT80ON1foAZJiVoEb05jF/kyOIp71LTd8GvNeo11DTFhXOokgnZHEC7RA/ybqJRcSHpGox
uXbZGiuyGkmTFMsZd++uh+do+xX6vnYw7UHT3Qk9aCrdvw7PC1a1S3YIMTYe7JhEWvEdoG+SU8Xl
McEa92GatgEkfRQjGicEwoC4Rp0GhtWqdaiiPhKZYKAWaf8U/PyUhpox2QD+vcnm4T4wjzsZIQzZ
jj+3wq09qH0ioygYki9NGiBefzfzxUuCq4s7jlbEE0xUeWHOLEpFkBLbYjoJrsY5KjePUOkY6K85
53zzfQO/UFuba3dJGUOB9RBXHXV9WyTAGRbYwUE8vSUXQ0m6MSI7vfxFMPwWz3+z77/7qTIgiax5
0crPX1+lraifiN9UMEqmGLkW8qxTrLyNwW0LzVq/OurQcNuKmAgR8VX2j5fBafP26VihfXj+w5HZ
t/bOXPQcUtFa4MQaLgZ+Mb+nHEc2ilOn2yWMXyP6chLMuguB37vZEeoU1xNeJCe7bSWbd4jqZZeS
ced0jXLo29W01GyKGvwmF03HBfgSY9cA7oOaoUt9P+1u9N2Ah+6ptjaEzvE3W/7T7nX2B9tMZZOp
+v0KkGEF/BvXlboS2DR1xzWbSdQO3y9U5yM+JQayqDlhNW29lF8eGmMTtxITby8CRgHqsyoeYTRK
T1KHE/3gM9l9dEUPri7H1Emqne/yRNWDG0Zs0kVGetEXKzDOAPLGZxk8ggDjnBJ2hs2ymqOubxHp
JZK3xVsbMQ30y3/suX0+pE1zv9/EInsqM1hgpTzQzEtZf6RqnJEpGx9skThs32tVvy/ofR0yBmIa
3XpdR5oHyuUAkNAT/2Sv1Ma9bFL6P2PfP0Fnv6KBiJUPbJzyvkHEwoUK0V3bBoKimaZaAPBqWHyw
4VcozHz4PtERSXsszXoi6ok/VqE1z75jz92VlCtFiu0nYuUP1hEtLmD032kQt4bAhSn2jk1Du3IC
TaLdcM8aYCQchVFGPkrEEINjQYcfUCRdymuNUQyAQBHnbaF2H1RaRn8fUP7dEIq1SIt/uQeJEdY9
lDO67omDl8A3+QTwvqUINrYsd+OmnQb7WOHd0QKb3SxnJX83SESyHrRxtNJs0XPJeOlR8FBBB/MN
CYz5Nz5t0sV7MSreZrWMNG5BAkD6Pa0Q0h+VAa4sufjsJBEzHrHcSNUGNy5UDVn0Qos/jBPbhu+m
pEA2LANA3oerkkua+hpNLl7mcQqn7dceFPJgZr8VkxrxG6cXpIlq3NuL3AsdVJ9jMhh/C/NUPwaO
No83RPXpDQBlMeklHcEerRAnajGU/DS47egHhXv51d/KffXGh3DsX4V7c9AqZZEj+o1etIOvYLh4
PhRrbR1QBT4oWdte4BQtInpB7dnXkmtGo0SpWbK/YYqz5c0hgJbqqO+nRS6yoD7adzhR4aRrANmS
a6Y3fpqHFMD0Ij3V96cheB2c+TFKrxmLdFR+mDyP8pNfhWM9uNi2bwCnoFPBZJaIRO1k6Behq00f
WFabdiE87uZD5aLz/Cx9OarwkRVj/wc2zSzJXzMG7sljuU2GI9EaStWEx4jWrgx/nQZfi+xL0+KJ
doelEKtWvFwnUwY1Ur4eumm4cdEKqtArFuYOuy0oEqfa/K1xSsErPiDVyaQeeZcWklTspPB5RO8t
FtUUl7YOqrULKy1Sb91X9SyeS45Gl2pWUNJK4y+29/5MjPchJR/2l50HbBxt3inFMPePIsQaXrtj
MYWI9nYFrg51GnAgzTC/5L+WnBUo3sEuw3Y34mwK0aHrG99UtKgUz5ynNuXQTSEf7ppPRyDgWK3A
59Aukovejs2T6X4fksqzfa7u3W0WIncqhXy8Fp4pTKwEqD+bFNCsgnJJXftg9mMBqncXa5bUMvHG
nHciTm+rfByUQKQYOCQ3pxPop1SzkM6hC3UEfBdW31MMPNVn6pYj96AkPtKvdIGwaXFxpkdgWf1m
JjiwzCWUh5NTEDchCFxp7DPruXGz2ByR/pkaejHu79sRNDFnDqF3RD8NeykQtYiCMhPQp/1lU9nw
Fkz9NN7p6jQ+DK30HMQPUaSofKFpHmVA9l23F46OhZWRGW/nPu1t1q6QhkioYA6NZrefiGe9YmAu
/rboi0qfX6J06ZcJnM5U5q5IN5Vq/YTe9NtGQ2u4liD44gRyLyuV/GrosTXndlHCjHly3J0Ld5rR
QPR5FoUUwofQzL3e79Z1KTJI1mbgqbf/To3gHW3boF7V28XNB1foklTM/jvMcm7K4Fweoy9veKKH
H222yRfYvq0qn4afD6lF20e2Qt34qgRptytfYDDaWVBgJnnGXm+FUt5COJX0ULAVPwHNWS2vJfou
1nB7Wf+pF6YNUx/uKWJgp72LkYtOUZrReqXsJBBHsqRRW+/Icr169ak+0mTG2zJQ19W9GR7th3FB
DhRB0Zq+naCPRNXqE1/uFkIqyQPpWnx2dvMI4sErYPUHlw1dc8BXkZgJjiw+Iqi4dwx0V4UPZH45
vdp+lJULOuBXR1ZuMB1z9bOUDHX5jkMPu7rDB7+hhLPGf1y41GIK+LKGRZYpjako3hAqsx+6WcY4
2SyvOjrceAUT2TMnEi6FfLEdaQStEag6B+HMS1UQGW7kgziOUCs/+/pUw0RYNHRdZehA65slmQ+i
Wbnrm4mxo5u2nGqu1uqFLhhgC7dnwn7yYZ4AnCJhLv4MpoDlB3DhPui7Wunp6/vUXVAlqhk1CNMR
C3mIX3soJnKSW7SNAnSmjE8DJnW+FIq3zWd0o0UGsl2wxSMYIjx8FjapoShV1wG97ni80AAwG5Tk
9aduEhPCphvr5b8PD7ZWWoCT5NDwcL4zrCgKXoroE9uYMW8oVwhyJWKMnM3Y2+uFGd02Mz1qRUQa
yECfWufKo1NJL9RK8YigUqJZrMF0R95Se7JKOcQBtsQmJ3+cZoI2WCY0oZmMIiEcE0uj1bbXJm7S
y+cL4hJ66ThHizfWBk5G2Fjg2NFoHNydV6Gn5dlejq64RPRGS9SmjS6fqAfB25Ro8SoVlnYByDT0
hxtFEzvGLhFkcpcOTOsG0RI05UIeHE6+vD8uNPYTXq9kvgs+a61uVjauepnqtYJuDrDPhVm74pMs
10CJWZ+PUOdpZN8usJYVtspWXDtch7rN2hsojrNr0vN5/DZsdpCtIa0weggEOui+II4fjdWC+D1Z
BUnhor+RztGV7GLExfNGGhfDsziEE2WA1wpNjpJgw/yL0Q7TlWPO7c1xhYQRp2cKYpxBIgPYegGa
MCRbt2vSdGQpY48kAJjI8t0+VQvxsLfffQFxlNn5TWvE930KpSFH/g9feuUln0WytvmxURDfgnYO
joLsq2qKM42HaX11SeYfBkFvJurvT1nh0M6ZEE2KBjBoxXf0+GJy4EjXKwQtrfDFSTtvzkFmnkxG
DHsoRMTPdALEGEiZ8Bi84IXB0WfgRYtC6aR09VHuL/FGaPCrfFTD4jrspajjoVg0ty1VbudZ+3Fa
7uyPni/enGHLSKL203X8sx2EKaRaBZAYg+pMZzjGjHLXU7xXFvzyPkRuWibEj7jDjAgIMQgzkSMN
WZi0dEGh/HvEDuGNzXAAYSwNGKQQvQyBInvbEOebMXJgJq7b6CWLcRhwGQXeLIfiOqzzkxuzD9Qs
26WDvm4NBnDfeUM1IsvT0jX1c5xF283FrtVSLKtdhkFdWi9j4fk+7DLQ5mOqG9I27ncWOjZgYW4/
CdPJb3x+5fMugeQiA9rgbTVz1Hob2ebqdncFET5U94ZmN6nJouZN2B/bvqv53zTbz5qqQn+nbIqm
7u4BXAlXD4W2sU4DvhFob7Nr0/d1l8LRagjeuwFd1cMTB0s7AWconPm+BSUjgtLcsujyGUaQgRK1
QoDDV9nOs+xPCBoKcJugwM3thkeqHKqiL35/IYTyxekUxwFuIe/gKUf8G3GHvv1k6Ri8EL1ze/bO
y1iRdrPYTs/W3TJD2yZE4EOI98i4PMfsxJR5MLPihnj7AowKt62yiYaZdgHISG7MsAjkVQUfI0rx
A1rVINhUXiWC//LCzuv44sXWEySmSgFYvsQPA/QCfFDeK9qBPZo3Zu/Y40dJeT3hfgSezkvvPMm1
zTB10hTxErze7xJhQhLKcj94E+n4IGLxKS/1FyXaOMIWdjI7lgnRk91xr7tHf0YOqcAXkWVXer0u
ly/nkx7J8/xf6WUz4UkKBo7UBQA/0t6/Vq/psIU0uxA5pq+bZuzc/jVhvi22z1iFJbN23WcHenSJ
cCdRlKe8tH1ja2tTLkgm9QqcMzNBOiZZCFzXnw5wodDwJLcK8EvlAukJK/oWX0nztxilJ44LLl2x
yerHNm1ILPDBHZfGHjjtZOKk+y6u+LB47D01ERah2hRSL90NuyzHfnZx4HXPgsKOUnPh5fenEpiW
Vl8bH3Jwe6SmqY/tK74ySVyTxG3/ZBE7zZZttu/0FbtPrufw3+ZF7P91PMu3djQaFOxBk3PSIhw0
vlWpFObJSgCqWqgGi4lfj1VQkGKlrP3M8qBdPlii1de4jTwpzriaA7S4/5jXDYezCSZRK05aMcIn
ybDGwvRKFeDm0tw6M327XmVFlXcQeJqR3Lcdg6PLpdwO/G3RYxIfL00GHQl8DWow+6xL5Vft3ihp
G0+zVcp9icWK+Cr6lhqDL0bRT1WnjzZxvaMNdo22HlwMu8SSy+ZHgs9Mh4blUJY3MImbuJL7q5kr
xjolMeik4R9M5ETpdt8M4j9TWymcFum4UFRF8g7kXyyrnSLCa1iQ+8NuMHMfAf+qprxrBEvOTsj+
JteDWyz6illjV3s0UjdH5qMGxmWSqbRgTvaUZUKzARhuLtyyD+2zj8yuSo4dfhnFph/h1fOBKKvA
D8dN0CKOQsY4mth0kIFTCgN02QNN8PhvDH/NNL3wJ7FUnDrmbebgEt+ahsasQNUQcRWCSni0bQvo
N3mhs+3RRX4txqFEeLLHdWCcsTlsPSEXPK9k9pf8U83OEpbyJGkuiRfxtf6/FYNMrHT8MNWnjuW1
t0l1QrO3Jbi7wD3N8iyo3V4k5W05eOPuAtiSDQ7O7dqbPKgT07pIp2Xl1garDsv1xFdN1m3cQMa6
+Gzar39KHTJ6Gx2vFBfCXB/68WRV7lziE7n0BZCPK1AJ5aWhzzUF27caTzKkgCUww5/D2y4d+fX5
V65As3sqG/1uEh+wKiuJr8P962C1O+/tgceS+587oe7+b5//yNmwhYgX24NiwqQ3LJWAmPMU02LL
IS3nOj5qceZIXYNs87OUjQhK0KvZC7TRVsWLr0hr0ZdwHhGJhqaJrJPjMcCBhLBfBeBhP3Ji4ffD
qDq51Fr9Ksf+DYQV8fOsZq1WD2EFtayQkLtBLTJ8OvewdCTC9f52JadCvzkm6YYuPkxf8/XetKLY
KXHIQ/o9iaNNVstVrl0j2WVs0NZc/1w5AwbFygl9ztRfSoHmV/x2CKsM6qNIjMCf8RyflqQt9+j5
BeEDcAuq859NHHs3ljzqka0Zd7HjjdNE6I9gHb8JR82sUqOGdqVW6H4Xm9MibeK08IyhKKYhzCN/
jKundD6sCnX7L6Iixq9rhh1S5oQAjiLTvPcapp+FJMsagyO5jnfTWakK794XLXZ1E13EtnB3gcRZ
IwYYmzd92cUh32y6uN3iy9Slt7wBA/tePPJvF6E507+coiBOTVnheVlNyOAh8GQM4Gk7mXg8oSHj
bJtAWshNm2z4pQAKEe4NT9JBWXSuOlhkwlLdKbGTwA21Ju/fE0WMa+9Ao9mPc+DHqO82UPX9KJRn
wv3kjH+iwnBnQ/vAoUM92JFH1w8wb6OF1/xPrMJVNRtOQXSUudgCDqc+gJxF54dGQjGER+LIoG4E
UHAY0aQjpFwozqbpLvPpO/WKr4LGz1ZUldkbjJrBzxePyfbW47janAd8wxiZz0oxByP0SQe6JhrX
EW/eVuI3n8kcD0l/dSPBRseoXg3B75SgJpnK4pENmu1WyrA/ntLGl02KxvXL5TlReaTKzkF5brOL
EGCZA8yADZdOZoUqhjqUR0rkwiXiLTPhyocnrkFLKYmlOd5+fhjAPmrdepx/2mwOex2PF7PJvURH
yeqNh28TvmwheQccNqp+AxBgGA4XCoBK1wJcres6SLxxaoFNb3W3PVon/OPMBWx1cy/d3B0em5CF
rrBurq1tBhg3S5tBjtqVo97rn/OHit8jL+wEZKhdy6rvw6TssQHByQ0eNJTjHIqVEaNbA4xPWEaC
pXeMfJrbDsNzDAkv+d0fgwLTgpWzty7SzVyf8hLFdzo7/+A6Bi2KstH/cYG6I/Bs+Kk2QmDDgtff
L0rdCLtxVu9sGil6Dk/2HoOuu/f3d9thE2/M8fELlVOwT9Buqv81GOIdR1eudfbb1//neebIolpl
xOmN+jYCT84g0UcBcXJsY3nCb7D1pLGeYbeytdVEU40dE5rpzQyiDJ5v5x35Z0ylkE+Q1+iIrkHY
rxTwh6ifz1XrQDQe9BVDl1KloGoi/I23J6iakqLCiQKGHed7+odIoPWRKv//4GoKfxosGLEoOPhS
cNbaRn1TohVC6tMglmehn+WQgobiAxvCB1t0gsYdNgUdPGlp096Kii21zfMU9ergkfKCXYZGj0o2
P2/4iiOfMoxORz9G0gsgSLhHl6bFYExAi2kmL051u9bhNA/+kg+BR9lppHbpjhZaw/bqBgrYcSuU
e66G042G9i7/VfWSQQyLaimNz1uMBv/GF3PUMuvG44Iv/7yTIVxUJcDYMVvRSJr/FZ0c50wxCTjl
yBjHpcjV9VVG+oVb7to+JhghUoMTByNQZfRrNoQp/0XGwXFrEv/LQTSY4A9gvUGo6kX1pTs1os+L
3HrO1bflk85x0ZiDE4GCWyGOYspc+L2ikxau91sPrHZbGsAjPshX+34GH1JMU5hhYaR9Jj017bQR
watNo++FItAs1R5coRtNCyD8rwyBIpEpV/0T0+Ouvefyn/RUcH7Y0+c92ngXjJEACUJ3cn7oZQLF
laVlqOh3MQvqC1TVQAdjOXEllqXJptict/h+TNdBTDpBWq/WHRc3VsN/qABHG/NtiAjTPSgC+3Vu
3zovaSurCo6eZ+Rr6qS9WBT1d1HlfgDDHLxSKWsNjgZ1knM5aTzidzil9dVSbrSYVQDhRbhdgBPo
QISSR61NgJTal4MDVj3yE+aXh+Z8oL1HQY9vHr5b1xoaLEda1IQGAFo/yDEQf1ZfDRT/0V7DtwH8
YRIuawd7vZb54cBvFzBYSJMUIyNmsWbzI/WEmlW8bz4oEjAgf5y1DxNb7ccp2dl5aukPmQUO3iwl
3PAcWTjVEMGsQ1JR/9ZT/DRYvL+cy/CfUYGN0KRcTtzsixqO2A0A57omtSIYTSC7hJxdYhlB+XC2
Hnmfc4Aa/iPTc+c9Ri7Ngj2/lpz1DGXbxYjYjhs+wQD/nsfFB8I6sfNNOpb84W7PRYQeWgjA8FW7
Ix76EH3FIJU6+cL7bqwEjq0S5L94cTsuYNTYmUyuMkeGOVWtQZQmyY6xra6J/jSjzJkQVb0PpPlH
SwhzLiiizsnbMVo1RyfsjzdyoB4fa78QVRpZA9FNhPglf0ce26Vyl5pM++jpvLQF0j+NjwpSQOEt
Rh4SE6KUK6nVtIRtqEsGHT7qWu1zp8scw230ZD8cPThDP/kPhHHDTXcF6BvgJoIGHIMsHLwQjBHe
Dy/f9K/Oka7imaxplO77ixV1VdxEtPA6RK3SOVGCyB0K8jJRSinGq+gGL4Jj6CjRJBBKYovUh7Rv
Gzbsad7OvrrmXtZuaOYOTRtkwlVYwZDrAbDwhr2azxL0I06pkmwO90QB/a2RVKyealGY84IT232z
E4t7X9klOAM6FpI5leFrBSt6RVAKgI27JLmMmIFLq8SmeYMoEOp+Raf8/M65wED+HzW4OYBc4WkF
q/90CjNjh8pApVsV2ZJvPTMa99mKg+yiuz/hL3WSRyjR6apAm61YmVWZhpmOG52JFGo+Ow0Dn8Iz
jA5PUreWAo7S4WFC6vOej2fOWIcQ1Q3OsvML1thHmJGyskAXZeUGbNzEJP3WHy0gXRdrslI6ph2X
M9sNZBjYh30qes84AJ4V5skYt/aCVvQYWXqzar57tVAd7NTojtp96KRGOIk8tSfLakwcwFDitsxI
zWUWGS+Ms8C4oTgOvX1uVmmfbrhDrWbi+A6JnCFk7XR/DSu7YTAHtOWKeReCWQia07OBwfi2O50V
p8JlADtBKFieyLJhfOioEjjuZi4YqO4KcGdc79As0OY4Vg7G7oT4HfT6EqSffqUHjITBXqi5wO6E
vgD86WSa+eYOe7/EjPpO9cOuyb6FDASdBPqo5WcY2eofv1cQ1z6bAAQ7VS9kQnf95WxaYBdyG+HB
1Y2RzIXRKKpPg5xLWN5WFVJNCEtF8y4YdH6e34yByEy9Kelq+etx4226q5w6w3bSi10pSoygtURv
OXvlRY3BBUINfiIZwbbIH713Azr/bS84Y9IFUmf+J7jzVUouzaqMw8QRlVOle4fsS+7Hu/gDGnJh
1/QYzUPH9j+2ZR3CLAOA6KtViehg6kd14f4xdJSg7UEmoN5OohE4054xXNyHNYCipwa9Odz5p2ju
xNtyhYNdEkxy5Ww8N1nZUwbdGjjt/DDrtmkBd1cMWXHJ4hxUEHH4PFLde4rk/Dev37RDZBBut0BW
K1tYDqf1L+Pecmw4ldf/ckx7Z5mBfa/F4hV+TQlgir/CEb3vh2VRlKqyhIM+T+z4Th4GjD7F0gsF
PIFi7X8a5nRqGXFKpCqddenWkgujisRdqabaUbq25dwdhVHiBFuYjL64FKYJkwqhcNnW6pGGlFTh
Kg2O8fFG5hqjRTmanGkhtUsWr6yp+oRyXLaeHMlbgsN+VMY0EQ/tjnWbYDzfVthJxdYu80vJV54u
SWCDKRU4cBwQcSw+mskB/J9QnTMJQ03Jp+DjOXbAsmYcVRX4lSaj6E1cgk0I4xB0F3qcAgryR9iV
+Trxpn64GLc+Lzgk4N06vJeQLUw/urW6GoDiilWJpYr8qDImBTgjw36yT5UtpzjC6s65dN96YXKb
Uu8sA5Feq4xkXKMfv5hmb5+JlkkJihdt4IO/lgH8YJ1o2Wit1xKp2XjKjZ+Kow8H8vSw/116jUbY
wXBioA9Rigizi+yx1/aZ14fpTMnAfN6t6KdBJWN12bUJaoeZ/AfKF5os+g5cb8LyE0ySTvWorPkr
wjjhYda7w9cIN+RpNoAyeMd8Or4olm9AqNAXHsegAC8ZAQnDxB5aBuFh198xiFcxbpoEi8C6EWei
It6d0XflDCNku2cs5uPLfWyIuH+yCgBaJkkCWSPgHjmdLHXZgSGzCat7tjNVQ/WPgmKc5M1Wc3Dh
9NxoHJ5/TakqFLeBOYyK3b8rOTbCAjIeE6Bvz10j0Bp6xpGNJuOviL60KW3N4STusQrYxwejsVoy
b5R9fM2sqS0oDOT6ohGJxnkEKASrTNinyzxFdaq5ubP4v4v1J8X7jgVZZi62WWJBewadI1GTX03a
fVXqPtNhdnUCXFiBMkYeCZPOFlRu84wlQ5b+7yKbVcn4hWH4TPfsJghPOBjmx5wVhP3cx4eSQtMs
BafqcWMbsJVtCgG34c5ghS9Q0cmtivfjsdAhaWc2osYy319v28OSr7BBXXaYo3uScTmFU074Xjc9
zYMajRLSvdznyxKGGBahVYjMb4q2+hDW/dMk5TsSs8YL02ezleUkVsoMOIq4GXyXD47YssfBN1Uw
1zjLXUJAGqQdE5q3DimuW/EVhnGHGgJFSKAqWsWMu/D64gfW5vpLlJUbXKSVlfGsCdpikhDvsaCF
DIaR6HC14TYL1WgQViz3zuUfBLntiedRv+kkixxXASPHuRKfwirBObSCEbgn2xFmycuK2xCOyWWb
0UQo5wvqIU7ZtQKTth0sW5j/yNXE1xvuGMAt2AMmm24O73dpUXqMQnHVZROWAllphy3mTh8TtvjQ
JSFt240jW22skHAVV4XbCfR+1Wim88vjWSAM3K4DujsRF4AgT117tvkuEAb9GjOvKzEx8Z9MxNoE
C+OmbakxOg0mq8sh487GIJOG7OW31eZo/4dfKOJfG1QxAgro6HpoaOUTmcJz2eg5Hn2ZmJ+c2Di2
gALfxK/aXLa/JaW/Tw5ygMKNgxVmzFx6CNP1FrbLjMR1QbRuzAC8z+ieBAmK7JHWfoJo/dBSIHM9
OEAOZ5w1WXveTRcWseaJhw5W2EBeoqdUBmbYajn4cb1TnoumQB+eNMA/GfS7+ZuJifnlp+RCJrFd
VZwt/HF7+NAVoRfUF8hxf4TTTJksH+YBs6NFYIZDocNTmNHeMUplHADkvDzM+anBzNBVR6ffX0L9
qWw4hDQGUZFyGwWQIVu8xHjw3tMPx8R+38BPPzVLR8XL/EQb08OrWWdjPw+q7gK9p5xoz8zkH8Uq
sXgoq5t0tc4/HbeCzV5hmrQqQDNb2gmUjTLyIY5R5p6HK7rECHXi684EoJ/GC7dfGprGWwrqah+g
3qM8CjyQyN2oWgRddYhWXU8obNzG0U9/4bhXak+BEzi8SR0qsCsmG+PQ5hc7N0LvMHWkKSw9YYtF
ZCUMICUNEMGeIoS5M17V5fyQJs8jFCP1XLHr3jQWHg5a9jI4Me5p7oC0VDytmPOWruKPeYeZAYTz
Kqle6AHOmuuHzimy9N5YmPZcIe/y+MJtqsky4f7rk17IIYdfKPLfivQUIyChkKvi2CZA874nIVOX
ue2BEwhjYOiKv+Xqj0ZXNdwdRAh17OEGlfKnnQy2c7YSMSgSugsiRe6rHi9fZ44gI3xe20OCvTiv
yLLLyLxMI8bU9rokOFxmCNowPLRiYeSYcqkW5DvKudqklTjW8mQXZcHQsO9Ce5yuPcOz5yk0zyxp
630x8AzS2tUfHfuiZ1RaXCe3gvkQ0r9hTLv4olzAE/stq8nmLdwwQAHGYHOy29SRRwchV1fWBA8b
wWaPf9A0d9l05U1ekG3iW3gMMyj6rbDDyeMFcf76LhAMdZt4JegiRFTmUMfzXOB7LKr3E1KtxyQr
Fq3mQiyrdJck9+3AqI4IpziNQtn70Jl8t5S52jT8vyCu2yBHlw4JYMdQqWZZwoNW4MYiQnIQiur3
0ZrT8yMbRkiZCg0l5ypAbW3q2JmoJLDJwp/hSMx9DPYQu949ZyXLP3eyjizYVD+Zy41t4ueFQo9v
h/Y2JPbOcZ3k9QJLyilQ5EUZBCbFmaknZnH9t6+qJSLH9lhZrvTuczh5/1BFA2zd2EJAOzlBZlVw
G856lLk630RhZ+XGRO0d428yGyh1UGJJkruGd9rUHwsQqfiFgY78IKMWner/3RX+fql21RZXjWWW
xcEWGMlb7IFoN/5YoivjmeYd0jumvBgovFtEAe2Typ4R/gx/p/HZ39bPOdmrGouOKfJhLGIBRFJR
RKV+9j5P/fGGmb8YzoJa2xa45WLFhiyqzWuzIijN7SS5ofnA8lYRVx3HIe+el5H4XbLJqyZNSfHD
0XDQWWuyLYXlnu/juRfuWFo2R7yQXVY62A4SIikcEQDSf+Id8cEXl/IctdXLY6M1SOQH1yZAb1qQ
v01muPTJFbDCggkZsSTZG890oD4I2RJt5ugt8NXh2waMhn263qg5xiTEhZKYcfp7qrqqk0UN55SH
IBq4NSOUo4PUQZYkdP5NjpekOa6rdrIQ23KgKil3uAqiHKD2xz3G+2xf8eO1rXOBwIdFS+DZTVib
wESriOIpfiF31VhaV+/cFxK57/CEueloRECrbAOgha5ePzztVES2Gdcl2DwQHznzVAFcyG3FF6ug
6twRXTsB7zCWyNMkS3vc1HUKscG1XP+tLvqdhdJnrn/xzGxnR/RCd4HwdW+GazEsT9Q0CGLzBHGA
rEAn6mE0pAEUf15GEzQVlh6g58hjkVxh6gV+88liBx/kfVi3Lrgb9cdkTmSx4UKkURO4KskSaxVa
Ss+VeM/OFkrRnxa2Qr7A2Oh9x8bxbhsniza+PFMR62cSh/1Z+axpYL/gpdhgfgFIf/wVlSMHyU5N
J5ERF41M6VHqylKDi7dbguElqpI8B8egtewT+XK6Y9cG5cyZkbRRlIqAT99sBpDx9nZe/DLLoVNs
7x4r+r6LqOLLrO6gTv5xNFmW8g/8Z1Ruwq2uKvUGmcBWgxyequhMBL8chFfImnS1Ga8ud0JeUqFW
yYRuzfLWdVM1IGhbaeRQ25hcyd/MrNuBaAabSydrdxy8k1QFCDp/mtgr8EBnpUw9b1TgTEbm0i4C
4TN/1m9fyuqJxwZHMXNPAcIsBFqRZ5a5ow6dQQUThYaeC5/hK5305sTAvRKgzQXCzPPzjNhkC/R+
22PdzVU3s6ehXg4HTZWO+PVJk28leRtpHIPRYefw9UPl5T5I8OLxEOkIm3Um9c5OW+LeSTbqlQsG
Y8N0nCSExZftuLGQPc2kt3D3CIVUe3QEQm7rSMBryP9nJ6WhzU5x9pYvs+DI8nzsblrwS2KbxzEc
eEHsOgTYFRimid5MtOoZIetxWqClMLfvF4K0/bl9q+UmY5+7VuiY4sO/J/V+H+C3rU9EvGva0a9Z
D8TDYO5UYnZ4MlVl8h4zZcnmOlpvSVjhpLualxqi+zE0c509uZY6696sC0PHd/cC+rcN/Wk/RLO4
IG8eXqdfyA+ysdDNH31rvUQDENcxbVWB+ulYciLA20/xrQNIM8ItpZyAL4kV6YKGFWq9us0eVYWg
LiIDkBI6w5ZwLUDJByzm2lfb0WomTOXWxkG/4s4XiKuawBaZDOxm4XhWC1JxGrgaoYejKrfp7X3v
zPsWGkb6/P0h8CEzwkZ41+JBs3fhcyv+BTOdJq9VHy9m8/sGQvp93cYTkUKVQhlyw9GT0kvfUtZW
anY+mQEew2gd+5zOTzRiUeJSVYmUZy5P9SMW5vt4EXCPn83ZA4i85YUN+h2QWzzjS4/ptSTMga+0
/7FMz4YdQOYHGcfmA5DJAMZemsYH+rWfp1UV/Uk8mwv0IL0rrJmew9HpnXFsbx8l/qldGJpmVIfp
XRwycA50UXgOb1zmAMSFKOeGspYgNp7qHJasPcZN4m7JVRf3ngiBJrb9eNqX/YyYMOnafRfookan
V5ywMR2rGEiFqFEWAGs/vOQi5zccb6h16GfVsCGFCvx/gDJ59nZt98jxbWsCMF6ApgCbDxcHZ2CW
JNARVyrgMPOn3i81x96HPgGoohrgw+81bU6pxsu3V5WrZD3KVZu/WdkmN7FLipC0fu30GSKjNaH0
5+ATEkl8D0v41uocIUh1x0O99mz5lM0SNBtZBakVChmJlI32UzeJAKk/IqEQlaJHl74JmKIVWKWP
MshDlUwLvEW2uxW6nGU/4eV1Ep4JZ24p3NQnKH587epHlsBSrLQE6K19br6fTLFhDCT4SGVTOWMz
n0BMcCbHojKPITrHA+o6U/F5smir+6W1UFpoeFoSQF+qvuQ5Ymc55h2Et3AUFf3ZspAwID4PiXaB
jCYUL3PIKq4XYSRxOwlnPAHdArkPrvMjFofEaxJIB/1IeEYwW4HuVdhk1RndGkGGE2GsLL/hhFc6
4BPE9DneGG/Ge1xc+dkGrYGRVDlDD1SXPRzv9kP8b5qXzI8HspPrYYBPBeTHdao5Cw5eWZFaD9sy
YQHsLb0UzcVYYI2jvi/73GOFqgaUDPeX/+uGP/MyxooUAvBaRN5pAI2cqYQnUQfOGWTjwLoCxGDK
DyCQlBJvOfoQEwBrrnZLLOT/bww8WS/RQannROZ9dfwsnQdp73VIe6JqT/tjbmazVA1BtaLWiFwc
3YHBF1baQgftOjAC03SW6Wi+ZpuOXvO788sdYVkPDb5DLz2bDRpWFoCKNyu37EqqQAsAA373Jy/+
GFjXNTqf/SjPtXshsyNPzD2pKbcyC2M+nqP9DiSgLxoMKHrmVIlOiczgfCbHw8KbgG0jgYXtOzEL
8NhhtWHM1tUzAU7YLIreoCKYsS2Tc03g4vY4B/xPgBOLiJy9FtE014SRq/AidTIy1mv3M9IG+CTo
dLAmaLpXNhK+hV79YINmWoSDe8kvpPLtwmQAme8866yy/iAR04GvV54FYRVEcwEucPAPE2ICftFU
AyBeNuaMr5uZ7YKJ/0NnG5G8g491rBJUedKBy7NyYVj4sjAezbf45TNoTVScrBVI2FNdfRt/7fHj
+49T7u/kRhgKOdDfuMIsLjXBJFACjR4RnT8C1iH5rThsrFCy4a2icXBMyYl5j9UZhVIsmn5Regwf
DvHdBKvS0//Gy+6j3d3haxyP8XgvQRReXRUxHOeO2esZzUNAXHCT4IW6ote/HbcDLrNiYAhOyd02
Hxfl/40al2ldzOzsqRvt/pOxlbpJ5k0B51+92aJGUgYNb/Ib1nVIIXlobXTxP6v41roH8u49y1r4
paiys+hHOOKENbUKbdQAzaV/19J6NTkt+5hfqSYIGdp8Lt5zrKYg85vBXeu0Lry9YlexkVUl0Ntr
KpfA4VCF1JzirKYpQ5blPnJcej2xo/tXwI2dnxfNBPx6IaDdYgchsf6uv/GJNXJl9SMCHkNb5Nm7
B4wkN3ZiW30mUhnWHA9lWBTJfP2uPI0xJtejQ3+y6DHcpuL5KjvjmKP0WplSEJEYMxtAFdcZA73l
CUqgnrfWCMNkgqPUPK8qgTkDxSusAEQUQg4HfNWimRRsMuBkISgIC6a+DRDZQNMeORs70ZH5mNAC
dcDVkFf/hl9XUNLGfMTaqzfxqUyvfS5HJarmdhLIBgKJeWafCRSUEjdY1y+ekyfq3uMfipGDeFL5
FFBZvGhyU9xKxjyj8FizZZkUbLPXEDHAa98tltn8JJG5xYBShbwcBJ4WIUU47xbvm3kwVKWWQXOJ
FuG4Mbx5mQG3xbSxk7ZZVa0PiCKA8ozI8zTGOl2TUYydTAap2x8CPR+lWu4jl2fUfexKWGzZOC9C
1hDryMtICGcbbiUGMZCINsTWEEcnyoe3Mc7oWvHiSiGvqSGa7wdTFiOPAt9aT86QZ7KhO7PMAxcA
iXXxJ5mxNWx/6IUGy+JCznZ0NjrFIUbatewkPSvjfEqd5CvWpzeoPQLzZxui1asFBHeOPpnRingg
PD035lTCKUXMGCh6VSg3G0va987857ELRITmWyGMqoRA5OIJxRENl6iSxrx5AamSVnO4y47JlqdD
jM1uzsP9Xw3HqpvshAnmKS1tXSGmo/Vl2GfO3Cc8o/5SV+qIy8HODbM0Vmm+6LS2FsbGkTd0UNDG
nKJu7fNyvHrXgZh+CMZgX+3Uft/K8eSnCEsR0VOIifNJMmNE3VqzhN3NKcov1QYwMC9ecASHkybX
0IYSVFrTdo3FUiqtEFUs5nxBlJ4+8783yZzKDO1V4bqs2w52P6rOkXFpAUJfekiIs6fW31DMBOrC
UctdestckjL/lTL9qRa9bWCh86TnK6vMEBL4FFqwl6BaSjC0DoxXsdLz+CSSRvqmj5KfhL1p1WqI
YshW8vi3B6VLbWutmZAPLCP4nURO3iVvb0buRO8ipwswYEtegrvuVUfOh+S49KEFQE5pcFU5vali
JqX3Q0OUEPurV2BQHyWPXq+UBvH4PC7ImdJzMNr6LLqQ9Bvj299QVhcU60y2yPUPSmP2B6iQbshl
oe/b+p8G+u1L08qMfm7AbX/iMSGyzhRpfDfWvZ59RMgqOUqn1sogCQ+PzgfuX2FJWsmbONgqtTed
LV90dQBvwbDshPcFw9Ns7G5C+ix4BGAnw9LN8XlZZPnA6IxSObXuDr8YBeP5I82Wgq4ypV2nrcWd
f3HWS4x/CCKh5nHh7HAdad21mPIIgO9HZZrkUwnwLmru8IkXMzS/OP2iuxQ/FAAqL2Ifs+Cp6eYX
OyP+aGxa4+/mj4aENIFWIc1xiz7DWM86KlVzu9/dT/m2A/kyUiR2Im2YCy9btoya5w6fakwzQFdL
UU6XubYaoB7W7Sd9+H+HbCai+X0c4IuAnGN6UBTDFOsPazc9HIfyqwo8Sy6Nk79gRNyhI2M6Sx3G
CQPAYMrPGQYRW9jizixpXkSwz6T2rUQYDzqohPnvRF3GWhpypRqF1eUT0n0Aqv1Aq/+JVLTYkLc0
o7WY8vmbyVLVCO5I0q8vpMFwzvmAgaCgueRytncdlQIKM36lakkFxBVrfepmsVJxx7RkJ7+X8U7D
GZlOSZnoPXdZ12P0p7g/of36BDJyyMu8TQqhyQimpu2MqxtcuweCP//J1W159VNUf9nY2kIf5WnD
FlOKmU8fgEtSOYWvisRYN1eSi9G1wZzmBm/V9q5jxToijWQgCZ4kDPFUze9HaJ+eq5sybHe2aZBF
JQiz5CNKp9t4XZbP4Uwhv6FEuKUZouXhuVBcFvej19MRdildKXguoBQbM7RvVs/CHU4Jd3jEYddQ
dzCIOQzZjc17GxQcYmt1BTa+hNPsdnQQbE6LbPC8BgjcPVeLpFqBkf+qV6EcQsoWg2a3Xwtyfbki
+PPX3DFyvQ0+MmmBvMuH2Hhcq3lVPIy6KmyLbXGJYFiF13DzLUXzysfSV2f0UfKoMMohTDEvRFJW
j9s7MVio0WPCb9i4drg8VcGmbB5BcsgqFCHayIag/u58dd6AYHREiUO6UYblam906/gK02Gy1hL9
eKa212YLT7c6g5WXQrOfDly9GgIk4jMaEY80zH+owR1CSH0dUb6IqJrOqZuLLFFMitUSdP4j0sjA
jvGyLJ7t4XIFVgBQf5BKLRG3beILvl9IQ/qx7GtyvwwOxO4Csj/prBVWcZeZfjr//7WbxjnulhnT
PRHbZ0r+4VOl7Cp7YV5jbYlGgkZohsj8PDsGQ22/jxlQvdEnPcWXSBPRqKrX3J0SPn62EhQeM1KZ
m6PqvnDMa/YhY7+iSp5Io3Mj1g8AtVG40wigf9MzH7Msy08oDeNmpKkITRR91l+q/MUf5gTPuPv8
zW1X39ToAr9AbN3yZisJtGWeKHopAS6cAU4bCDYSgU/g/NK+SSSxMAlmJ9eL0L+YqrSnEhH48eDm
GMYmM3JM6wvmy9W7XAWliiZ+eRCk8FenOkD/TkM0pkiDpqKPDT6N3BHe1Mj8xFnHjBL+Tynvnffi
AHM0dmHkqCVg7stf1eGzxtULWczeASEfWQjRa0FvD5XR+AIob8+4h0XWEpsTtzWQIQ5fY5FKKcFa
ptgzsBvGfvc5gRl5teoFHOLyUWJrPn3wyzIKmxufk9wmIRx6zxO4uWfni8pOGbEEJ1sVV8SbLUgg
QwfsQ6Kb/ZVt0O8Bt1CQ77rKcYH0O4nfSc9FzOetGdgFNwnehKni6ENZ4N63gFhb0jPAakcZ+L4s
UIntg7AiWG9qpPdpmAsAnZkk49SH58jztCsBU0y9+2xlVZ2RDjl4U022V8OR4YQKpToYdBQjhGUJ
5XvlGeV90KUXVqp6kwDA3pFThaFkoFExO4mFNoDd9YPJ8NueP+zcjVVUV+1q/ebZCx+8FyMyoSUV
A7MAhB/hdVnfAvVY9/LEgKKAUIVn9wxG0jZUQUK03ViJyEp/BAZYXbYfIABr3l1T+kA6vLVFTZhK
kXQoDlPUVBMSo35awNWfwJutimS+UHMWcE+WjZTY8BBcRSqlBscZcs5NSeYvRuUARlcbQ0Y98xBs
zkiCdsvKZsZB1vv1iIoh+wibcvjqOhItHQzr4vJ5NgWON2/qa3Q/MVbrLx8r+T2O1PXw+VVHn+fE
2966FSDxHbq/44Mm+cfQRZJ/ObaBAJJ+WpmbAXyjrUSu9rnYGsYSAboxTWbF2mY5uCtMVNkdJ7mj
+94YTe/EWsLCjPVLb5iJWPHNK88FJqXwj8ttz9DI5h2I+FJq2CgW13C/HgSdlcLMP6BOji8poXfw
JWX1LhlxqWL8Yv7s2neTvhPMkHN3a13HYL/QR/iR8n6dZhmjp+tqCZcjE6r2EQhNbE3Br1t7KGQa
FWpM7eNehADIKGGowKPSpteBAhvkykyj4OudxPm21moeJOfK1lTB7a+Q6AntSVANbskg3sNztcCi
Z/KeQKpa78FMvrJBusRLFoh1i3RuFObnLUSeLoeYawKYIWy/ci3QYwPN2wiVHx4LZGd523G/IU51
I6to1MjQVD7ceNPMIoo443+OqUQoiNGkxa63+uuSvGAbNGutHvjjOtQ9F+xO3aWqiSixcgc7VLGY
xrpghYMhy22zAXPF5cP+RhkLUEfgwQQD5TaKq4H9DSVsowbUo6+0emIS86ZlkJAunzgs/vcchqIJ
v6qpphwbcX/U2LBlBEbKinoVSCqC4imEDfQY1Q2bgFB4Lk3p8Ce8ga5uBZGhRCp6aFDfM+r9syDA
gRKwwtQ1wWYYZA9VwOXpOM9VLIi3+onlSzqchfrMSzsRcPKr8fQ2JZxLfgtmwfAJ/itjYWtTN//0
yQ+6GSsScJsTnqyNXGW8GQ2SdGhXcnBBi/WPx1SGMt/ZA5g9Hp2toHhgPJl8blkPLn9Z7LD0AvJg
lrl1iyq/mC5GnsuxKm0pG0wuHh1F9r1UccoU/C8yTh2h91sNNGKMYCwT2Vq6Gh4Ny9nwIIKl1RGi
aNIuFHocMgDzXmPlpuBfrQDh72efVDzM1y/hhXQ5XzdCs2zzvxbPda2QnkvnsdND8riNRge4GbGg
EOcHSAXndvAxGJ2KBCktVsQdbcKt+F/fSVoi8HfAS34gMHi/GXi9rg8u2mj+9HzpDEzE0DKg4HRf
PHf8Pl6H8Ct133PxAaTb9xJwzqwdqMWdSfHNz04VKnELxt6eawj6/pzmoT1DrEW/pI3Y5HojUo1T
nCe3wHXo0E4JUj4/8HQJYWlC5LERDxSyO/jSVOFOM38/zPeCR+inSBOt6O5Eed9CI/WwXdHCnVzV
Ky9pzB4j5l8IWip8iBjG5YK71Xg/4eauRncYcWLLJXGxXSViw9FOT26IwFFYlzVSNS+cIFJtLGqr
4n80fEKHQncCR/pI71iy/0gO1G8S6MLFBkfWEdT4i604lG19mu5hVkO0ic0jJprRyKWfLvpHvxMh
w+Uf21v5SG2QPRd7b2xDJe0Rla6klsNyLM7tuIZd0E2vynU+0iYiOQX24OQup8vMparqoo0DwK3m
O+zAhuSNuyInF+6EWSz1ZT9MXlXF8n1rpWCw1Jtx8pty7rqjqUbYXoQABTUZc1avfBlGdCnxiYIC
4f0rMYaVUr65IKHwJ8A+iksDSVcA/KWQLQwJgT9C8YGYeSd/cVu9CGEnbmOYySFvMVZdfKHfC0Vs
pgCVjpgviM/fp85PE+mVD40a200+mBt04rr987n5xcd/2jvQD8CH/aQrkLSVj8Tzjp0RiN+cnqlp
FkSmleG93FxwOUuWG5Tx7O1hkAsamXyuDAvf2ADRVupYIj/GxhgQUi8pwx+/PCy1yai2avHv8Z/R
Y4VsW1ZzpVXhTiHCDUD7BhKHkZzLrJMp82ziuw5kr6Gs72E/3XQU6XT+3t00ss5F353EJULGIME3
jcVGNVq+4/3GOEf48j2AUVEEy/GaudPgtYedG/wKdqaMhJEic35y/QsnnRS8c1ZIxI8wBLfVrgeD
iy2QThZvgTnG5T1I9uZA7Zb2Ac8a5dRlkKrXr/aR/SPiUwVULRojBYqN/Luav658prV340AlcnOm
HNvuJfdUnO1UElhoIU9sQw+JcZ1+jPAKl+l+zDVAIwhjnK3qG8JYhNpqMp9by8DHB2XeLEWbcpNI
cBt5V01birZjJ5/B+/+AfNYzSXFXc37chmiZuxpPJ1VK+LLgau50rC5AqvUvxVMOiw1v/lmXq3c5
ozJZP3hNQe0ECPh58ddQt80SoW4x9xKH15Ht7fYU1LOCmrhPDxJUGCzuEyOkyDXJlmUpabMD51A+
6PFwKpedodpoTS5eBzuL0BvKD3MF/EzdLKmTu6PX0M53Ir1aptQhXU5CETB++nMDFsY164+PyVk8
bcRhFWIo86xIfI3qQqVsapCDqJKnB8aNQGJoXI3hmHylDC+Fzatj8HoH6juf19Ruac5j7XuTjJcz
f+O/rSCwNw4Dg9XBT7dbI39fh7XNABvqkQXvOCPjU2s3G/fjDQpgd6BNKogY/yNNVcWNpzhOlmCx
nM1yXd0AMz+uwIfQHoSUuyyeKnBF49j0clcmndDXgw4vTo1xoQgOEOarRKpn2AuuZ51Xq2A++jy8
WYXkiE9+2yijLpEYSFJ+/UaJRF9K29ZgVcoPHWoVzp7Z9eE4HTIqBSC4H7JLVDNDBK66xUxingmd
ag7ao5ErS1QRwSOOtjs2KF9ibUf7PKAd2tMZOeRd7Yha76uQrA0NsmBCZ236JutQ6kMcLOy/pguP
c+cPsXdP0n9qk8tFFd7wt40tr5Shu51Z88ubLeF5OyLxeay0Ov/94LGLfyYiX8MyNYzslVjzC9qD
0ED3x6/LaUTl6HHf9ld4UjBWbesMIXviaRKpBsp2dsU8ckDAUILm1I3V+XUq/mhYwsLWRvVuXOO5
/8TiRv6ejQ5ldsCJAk406e46yVJNJJUR2X2PDQxpvxrhJq6Fjh/wQCDqogkJ2u5A3ZYDfOdHsdCx
83aVGM9SH1VwiSF3MdzNSb+dNeNOcAp3Yod6GdKalF61CjvezHY8DG4ba4n38g5e5/7S1LVDY6jR
oXW7rpoOZgtmWpJlNtUnKpe6g1pjx2lzlVlrIdlgN5w8E0q0MymH7iPvhibFD8GlPL2AYFAtM75R
qiKXcD7QghANT0xaTJPLacVI/08GyUCwqELHejbX8t86opKcs9ljvBqVgBIEZvvNjPkzUs3a6m1D
WkT3FryPemen90NEGRfsTzOuskW3e6ApyA2qeCLz2Ezf5vUEhlgz58NujiujMdpIsux2UlACrSmD
TZrZAUuE5S2sA/OqF5FijCL7GMdcvZ1eU8Sc0OVnRPQKFktK0MNVLhIKrrO2e+APCYdHc7CwoqN5
ciHPbaqGjQPrBIS7ccqJFda2euT/6OkfCDSbVcThoMO71EM2ylFCTmz6MeimBOnK4qa83po3q9Kn
9GEw+x3UIBPglUEsublg5dJw5HZwDmNGsydVz07oYhBmgQHyAduWhwjzEz5cTLYtQDS6xIZY/q0e
//+ygppAmRKd6RvDJZQ/sa2MFobCLJYHjSAmsacAs36eZN9oW6jgTlINk7ieTSC6Zm98HyqS6mEc
yLaJMf+k4b23f6CE87PEJTiobRVBoM2ZtwUavGD1Uv6Vwdj29ZpzW6yKUUw7HmfhGGPXnWgzhCuY
+JivV5BnhdnFtIkIj/d2Sbav9jHwdqktnIDr4w+ABlsJSJWSItNfn93uIr1JplVk8KT/wzEcZxkj
M1grILlWs3KLE1A9gBnCaKLmrtIzMnuT67biDDOLZZU9cnsOia246SVe4WWFdDGFV2MAHC2v63ev
chOZDoCh37OuIxb5pbcE4Re7E+FAsihmdmTzjk2e0DFvdd0VlM2eOcejHqgVpxezy3Uk2MFwOPij
ZuCdDo2aRUELYLXj2MNEW1tDacpMzibsqHxS5m2WMj+hfQRXEztbsCROl0cD5GlEhKB1iQ34JJvE
Vv8C9oyGbs/BWk/sphMvpP/j3eyzgCgSwL2QzEscNJh3CN+JbTtnwfWv3JbF38XmIdv51jk52nyK
g/OWBCzc12ASjD2ZBb3SYNPU2CNoTfk082VbwnBP1mTbbP2WUAbUtXlbRlD4McpWW5oYvUWwcQDt
nCFiIZpFCETASoQNsRwR3pOigLUtjOE3iwXuFQ7uCRhV/mKlMuvcLJda/s1h2fRCp0U1PqK38k4q
kRADDwO1zsNXr/2bEF7bhdyktjLgxE+PEOOdb1oGDtSWitUFnJR0/qzXmfpa3O4XZeat3eU5oeJt
K/RTiK4KiSRd57KTqRF4nqsV1vbSx94tQsOsP46ChokQaeoFKDVRMujEmTGdOUthvHScxLstMBVE
8fV9mgOaOqkw1quhTsuAkhrfxau6YnsL+z2iPVJCgMtJGC8ixbhlW5qMPFUnZ1QqBu0V/5VleyEY
NIxw03ANjSOejVl5GHJydwxdMGZliKfLQyoR4jV/cqvShybV3WwTbwedbLq+osMYK4deQmSmTICg
6xl5y45ggj8ciSKR2BAnDXSR1KLQVyz/5A9fYUJdLEQSXSmNAFMqV8LZg3/bYSvOGZO9/r8QPyQL
ivoYkSHV7VH4OT42PSacg7qUoRlu+pMEzFTfjqRxMZR28dIAqbbVAL+h/PgbZEvs3dxld9OZzNcp
oXLtEKESOXqSt8Lu3K4L9JoxCDEfp8uRZkpZrbPVH4Y8VUaw9LxJsT6Cabcm8ULvCliqH+1yHO6H
Rl9jL8WF62cNQxoRYuezlmiudV90UMyq/us1rcGAneCFXqOF5DPvPf6ldgSjHzCfxYbxrLV/9rIt
/3bUt5xhTEeVIi1TC4s7oxFb/PMOpLWqy702FGOlEbbcwCwarmC9cSR6W8wULFGIZ0XyJw7P1qFu
rte+5ecj41RBYDN27OxmUWVJ4ccjJDTHxd52uecwJUGpsXfxe6gVx6hNSJwTEChy/MWZ2AS/35WI
nzU1PKSnaC31G36Iw8gglU90/KvESwy3ML2vzGxNy5Vh7SfcKCWg8zf7iM6YhoN7PpH/BWY0cFkI
bTWnoKXxYNlpDt/i9+kFoNh8UiWlaEOroQcokkuob3i9al0uVchawZGtFJVctVfhlV53JjVJSg1S
sVkj5JpyygwBqtS9/WMgOz07KSKAcuAZvs8KK+mpTdo4RD+VNH7y8QghVefR74nZ+MzLezCeM9gJ
+VrffljCsDq6M6ga+55rywzq0de/8FW4KbO30b7Ld1U36PsN9VFWYyheYIT8A+RQwGz5E753r1g8
2/eFrPxbmNvsEs45138Fvt53pa4QCIxO0j004plei2xCjz+/eUVovk04+xT5hy3qE0bl+xN1qQGP
12FZAGjhQQ9tAwmjTVAP1/F1A41Q9fBM+JrzOiY87i5sdWwO6Ilrn/xvDRyAMd7PXQTq+YgLlM7x
Gi8bN6MW2T2vkr6aXa0V+6e+IBJ1cJc0eU/Vmo5E63LvNZts9G/x/6uPmuVEb7ijh+v4TCXVfzmJ
4MWdL9KcoS+3rRBN+AdWPBRbnWFRe0hCTZCzyJt2vnQvUnCwE0J3OJlCnBbV3lASrG+wgBin1ofB
fLj0+8b8zOT7fHqL9QovZwcI7sYZBIO/kKzr9PhkALlEEUpu4E+B0Sa2/8CMlPXfPYYJuUUETsFF
Ps+BDoPVWh6VZH+dtHuf6bsT+IFzCPzHG6Ri+JBUnV2g+uADAtcEqRYn3sqIMLq9RCxVxIVjEcdF
0Y/Oz5/H4n7/eeJX53spXG5MedpxJZpcnW6fJUQGIaIsitpoaaEPJODoOlY8xupgYwRz7tG+Hkas
pFxiDfHYQdNt5xSIQqPfpyVQ57bdoA6UW9Bo0VFkzxM28st3KcVPpNLENzNZmKvK+OYXRSGdcQKq
H3owHc4iHxd/DVI486ANKzOS5iPIWGcvyzKLg62t5bV29ZRc4HiCc27xAV/a33EBQMhF/m/6r4Cc
TTE4fsUOoxyyC14didlzm3F1iygQUklHZsQJEa7vFi9390wnAetAcXqdIM5BAgzEwjk8SbhNg51I
BPDOVzoSYXAIrgmEVm6gjnvc9VPDYxEIv82R5sRwuunY+OfCg5XzrTF4EE6yZtyWhv9bnaiJXIDb
1GzofcHH7INJBi7d1VA39fXYvM5UnM29lBrFYClcGNrdZcn9sXVSK6I47e4a92dUjWj29O8B11VC
P/p0GQtNyrk98vIOkVy2u/GMuTOy1JohlxUEZTM9rR9zl3bzO23ayQBPLHxpUaLwMaN3JUbRH1Df
MdOfDCf3ueBkYyl9SppPIzJnOWVc/nOneqqECp2wPHtRIhWfyA4/lWM+aFU4O/1Vf1npZySbFLtW
JhuFWrURsT9b6v6K7OEZe1c+Ev7Ga4z/B6EHbYWLVWbvgyL/VJzr8sVOYyxjVTIjHALLk3aXv8N1
hM2vldJxH310aFCPJz2Md5MDR/Mgqy8g0ChnTMFrrpau4GMOwgTM0LdPKZbfil4lU42a9fl/wuoh
hGflwWkWQk88Lt0vXh74I6s9YQiJ+nX89bnwjzf+mt7mjxnGQNfMXntsPEfX2Hn4xMQnjjeYP9vT
PoAexj4cKrICw3dhN4WHHmxawv+Mf+96/l6QCnxn3dWxshVkzHr9Hcbx3bon3M2pIp0IWO3GvIsX
dRiywEd/Wd07OvsTWfhYwTgSGqg/qq1Q08iTPIQrcamWH7UjuojIlwAvM6GCRFKaQ9ieKhIdLWcY
B+CMpb2JXCNnT6i96rdkl2L8hZkFXHYv5IGbU3a1/fgtpeL5V+y3/lXrt1XhE48ZnlvzWMU6FM12
yDK4lu6NIc3GNnFQIWD5UtQVTR6dAK11PMfb2DUroM9lx+I+yyY2rY+TyYhfaM9QZ0KiSec6r/VY
I3RFqqTD2o5oftLnoPB1pAMLfT/pye3wf4PxCcuFED3WGiKXcRWgpR0BAy/gpE7U81MlMVWVxt0P
sj+Cy2GWJQ59TioxR4/r69egUjvqxzv3jXF+n8WOnCcPyf/5iBKEX9gUs3QTAA2utRojnMAS4hWx
WzfW7t7UZ0HpoGBn6uf9PxIBNYgPGOdg9bUDTgXXe0DEB/TRpIeHlEi02UMOxWoAFSem7rAPFyhS
y+wZai2tN3NfozI3uWz5YfyqaRnN7AHezlkUVrx7qfPrqy01uzAQ9bdb6D2kr/lAq420r6f+YD2N
tbAlV0gyaTE/LgpbI1Y9T83r2gZ3wM+jPVyH8o/VTZRzCVMR2uY41gVGtlMbnkBZyFnSggwuohZd
wG/lnYOYa/PL1LUpv20IQmkJcWSU9e9YZmWuBjyU9FddNg3drpABHZ2Onx7XED912M/s3A2Z3ilt
PzF37CoGoKIQmde5tNLz9Vr16z1h9zE/viINVnXxCwpsb0k+JjEyhQtwJGaps0EGej5WdNyuXvQI
hU5xWBb0ct2HO3au4r1UlIJyu1AUmj+IfU9kjxgm9RWviWE8JjXWEum2p++3AQNqvIWYZtEksJy/
CBZZAyHou3pORCTVq6ApvxXsIj6On2CAYmT1z/wFNG11oLx8VQ0kEgNjwlzvGRKTdGiHy4nOvRb+
Nh1RwA4bYoetIHh+9aa333eRsboo/h7jRAJn9aaNGrqEvdL1FZlK6N/eggeTWwDTK2mMmFaIabPb
xSU2YHbk08iJxXfXBWMBjy/JpX8PVaTdQJWh/L6Uo3240gUMEHOdnnFqlqborVSB/OD/u3tTLJRD
Vwbixi5AEONF8uWF+EwDxEdcW1l/j6GaPHVDkMFskO07UjJaGsZBwarNS6hUDgoUw8l3FDblQTxL
advhFcq3DZQTxMntCqdVMXtcH8qB3F2mNWUkI4IM2h31yKPvhQDHSQkhv1aSZ9zta2W4q22GMwS6
UkiyYd58pvN5GNidSIrumVLQiIZRMYesAEyJH3rUq+ErEPTnZJGsxsLTndd8LZRcVGvcjJYTIlJh
HAGoYnBSAntNVqnYIYe3V4meGSJWbms/dL+FSaBnTW14vUJicU7B/1REYH37U6SePLB5LtKSm2wl
gwS+NKPAOASSxIo3w4RLHchWzoAvaTdS+RNPMuUOQ41q6HmoNjaeAeCsnrnzr+yUKg8Y6feQfMRq
vhPJ05z2uwxIiG+IAnnF/ormWE7Bt8TXij4BSw+knUkm1fJ/ZE2wq8o8FB34HuXquhame4f7LwQ+
kk3VFZYZrg6JVuXSpDQUjAbJfk28OytJgN7MMhIyxHCJ3ApilWmtoms5rRWZrpHNYprEGwoaTppH
+75Wtd59ZPy67SQvAFgJ6/4yS1v/IocmLB+TJ675pZkM9nqNwVP2tH4PBztWktCZ75vcyIxH0Ya6
YZY3bYU9iy0FLguC3YPlBO6Ov0e/e0DjvWxcuzZEbyEjvGJ8pNhL1OCM+ROptosmeE7h7m97Xhhr
eWYj3R+3cvgTuq384C5XfE50DD1SGqayqyq2locdZg6FuOUJNZCB0om4NGY/9KJYgmE+wZB77l1c
4zoFOcGd+S7KGwgW8z/0ilpKF0OWA4+xmcBRZ6OTfRd0/A+0zyl+kL3lZ99doF9mTBr4s4XVZt+p
vT4beshl6ww9QKamJDNGl9leI1NvMDcRWCHeO+1OqnoJFok75eYAY5XFhIRLL85bUGKAHnGOJQLL
svi99CKVzzvmahp3cLXKQdKxO+3udSXarJ5wz/a/7W5hUCowbsWlsc22I9hcOUceduAtvF86KGXp
GYk0l8g6ODfV9QMROFycg/xqNe3ukgGuvvw7P8we8cl2S4Bx8GKJyK2bBqM79c4i8QKX8sEvRvqM
wXs7qWFRaSJhn2TwuyttfheyOZ/oQmCS9sVZqyx8O5ItQRvgoEc4K703ctuBPPq6ouzjlzloxC2w
B/OStInnAclFyZRdvgpz50rn5eCXiF5j/AGBJ1FFG0jshcwtwVVXZ2YEtl8yiuWyc2boWXgO2F2Q
/tn0P5VJFfNs0oZib2WlysUPrpGOQ2PqWRmKEbkdabAYsunL03P7jyBvdEw22cvH0TunhRsGGdx8
llYwL+iw0kS7pqdnTQwOu5rSChvdNwRUZGndb1y7d7jQKJbbUS54vyKuow6g/AEjsoFoLeAs35EE
fXCljRNG32vc9FWfAwLspDo4jhBwf+VlNJiTcIrz1gUZFt0VdkaGrMuBfgGOSAZ6FXlI3JeUWnMY
CLsGyHM4P1UccMN0HiS/3nOxEFaiei3owz112u6dhEBjy0FDoruUB+I7qQWgiylxKgwHeQSRJgW4
U1lI+sKfpMA/vmYU1K1A/lG+N79youkqIIY6IFq49C6o/FsoZB76Q3zHqS6zcGPrZiZX1nPNDXKs
jTkeSbxVDX7jNyH7QoKnvzWmk58qqLR5ish1ENidEJsFP0w3uvTLmtHcrifKtOpw9AE4+vZA8BmI
IBzJHdgN0n80iYdyocXBqCGWg3xGuroqtqwm/9UfK9xO8w9JXcbsyYN2Wvidwsxl/ufQtfaj8yPg
QP7Rq/HhEqhSnUclXbInD2zFbY2brb6g85sYRati3wutNKyenp/3RD2ENMZYqaX4OLUvTr8OXo3s
FngrGNxZUg/kTp/NWeHmGTvIhmhDvkt+xOw34TrlQ9DBHaR4h0+N1rFzmgT9Djb87cXEAtqUCf2O
Tjkr2O5vopPkkAhhMr8x4K7tXfv3yprh+h1qAYEXQqitk387WxOAuXOCKo4w34lMHCbj7FcN8DRq
34nkgPymDHALbCL0MNhmrP+juObR9vATFUMI9FGBVbYqaTyIelQmd/RjfKw8MqcSpqvUQpSGdm/Q
LFmZFR6rKpO414OD22wP9qIk5lApfC5HgvBe91aVWH/sPylHeugiG5f2zZcRGW3ClvUmg0BtRbM1
2N30hSsqVfXI7rilpQ3vaQJDd0JbXm5cFSipOTs2MoBjLm1LiydRlmxVCxwhF7WoF8XZNq8kcqiD
HMbFPCLxbX8zCLQJPTdZTr0i4MGfkU6vyiEksYuozDPx7WYuTR+aiazK22dTK43pA3xr4NR9Vb/B
q28vYjogyVFQHHBqWlqHKRgAHuD3l9+Ci/XEEeNGnQ9AHxzkiIqxfXejiuqWe3PL0FYkwP43E23r
ggjsJfIc93l1MCBfPiFCc76wxTALbNzn1QuaBDbYDU0m6c9/0dzniI15hJ/fXiOTVwI9S9C8ikhc
oGv6moLvbv/Lm+/5avbJ5r0lE4pw8qjnC4CbafuXAi7bHenonFAkjii+YbODGHyhapQPg+z69PYw
Tj6WOKzE1QEyoVcmn9b2uDtQPohlPyUuP5e/9l/E3PvY6AnmZ8Xu0tHNtv7GVzrjQ9lcPWUVjpm6
15W/EJsEs/5FOoiUSnYnbs8d74yRjfVFfPIfaCp0JwUPdImYb8WtIa1wnBUS/JgajJad6BsNXO1b
f4omnEBmHunu5GxzMdzAgPfv7gtyhAfEkXNKBwE7uoNgXgNhkhsVwrc19Q+trvJ4PwtxKWOwRuB4
CogMsOLKSr71e5NxHIaCz9vJnKvGJsjgKg+o2jJrMMDpL7yKXvqXs5/SzuzahywpoZzscRcqDS+7
qQido9yCeOPwjfW+r1lMuHw/ScECn8ELSMO6bTBA3jUs5gB/bq0w4+xBRN5gWBjNseEGqn55nHjn
4MVDifffX+rDTlpmj/GMkTWeYApZVPOmnwVWfsN+ubL95//RhAvnDokTKsRVmSR7yFD/kTb+09CU
yOpE3FE3n1RvyN8sGSL9rxPbQwOhwojYwV+SChXRZ/dUDXTewgUfyXtWxyrbBAhfzSPEWD6nubv/
Bi5qqj9umY6XWovDxYj2G5RjU2H9liGn6jg0PqeqVc+6Yu29R/XgXI06TpAfJM3Dv4u/d+AkuHpb
SmDQ1eQWuMIfdT/YG1hOG22LegD2RgBXDMXH0CgWtaltnbgZs4ejcRmzeNpW/+mgixqg6eRkVhXG
4wcnvLQECMGmNX2yC1TCqhqx7JtRA5z6JgW1LDDBkXZfxcLaitJkPT0DPqxw8vClaI2gyIP2zA7f
MDghDLxgzViDXUc1LLUMwiLaXHH36h53xSLx/U8W3/LaYVQrDAW/Utu5E2zxl9DryrB2SYqfzD50
pYCvLDqSyu7mS6f86hbmQ2x3XCpJkYRwx1PAB8QEuJhe4PP/01LDfalCUXr/VRSZHvq/HoBIuJ8I
XA8alusRUOaCZmkIIkjrH+GdAdr4vKhD12d5/bYw7NXx3+x3QH0UNSQntiB+V8Cjb/N1A4tBOLkL
ta/r9cIZAQ0r5GU7koEWfLbFZDJWLb+gHL47QzpKVAB+vqiK4mvOpjqmgU72vYXK3KQRpWFzleGE
+5SsiqWBWLvbESVhf7wIT9TXZB9eQoHAITUvmQmaXuKSmNaa0+TP1wWOSmt/qZwA05p8be7IXh+5
L3mCbBg9QdXaZeDxcI3iC381UEeWUXTzn5a8LSkAyBUbHSIAkQ5Qsg3VZdUgxUFN0s769YevIYFn
JAfG6nxOfa0eD+/8U1FuC2pk+A/Pvg0vn2Z0nOtP01lyRqcRklYBqyqginrGrfHuFaJKVx8YrZt3
W7BwPRu5G2vovQU406IZsG9+XLN2DPYUk1ssbotS875JQiVqVH1BHYC5A/9FU/scty0Xs5tShoqj
BLFfMW6ImWMyoG3mXNVh3vERYOIFJeSKbLhx+C1AyaRQGCFYW9MaCEatg4WH0lyaQmT4IIcMEg42
q9tWVyM1yPvSWJCzOqB7lFwlh13uOXbU82X5j4KWKWr+HQrUGblqoNSa9d5MX54QV1xCxMiq/0ha
u6q6x8WZyFgJP9XOmpQvHk/7IBCxbYA56nTFLVU+RdCH1USdAw/4zCs7eP7aMAjNpNXJby/u1qac
onSIVvcEU07Ym+clgXO+jbdZzYU3AbxOYLfKqYye+o8v1fSxRBgnwq4pISuzkwLJ8wigWlmrDZM/
fX1lD3ASgnH3kah+efAZkBQbM6mfvFYd8UROlRY40u1D4SKAHr5QEF2DFA/x2Gms3q5q9mC7DcKj
Ed1/MvfxZnGMytM4cKn6CLgFhYchXk5vwpD9o/CV9ElPZEm/klwGc5A1I7zq0ClfuspX3Du1Go1h
Kg9J18aeroc7l1RL5DysLeBRfAilaP9Bb2PotEnrpHOUg95dWsqf28cBTH1TKXupcAkAFGhCbt/X
M1VqCmhttBxlaYm7r+JxdYNPs7Shb1GuJ2qwfwzxljMN3SYUgiIljkDHIwf3IMGScUAS5koj5E/o
It0Mj7qc/cf/wS1hBiMq7GK9I4D+KWdytDol8Cq8IkVKUCc+qsnxza8OI22NJT1c0GbUHOSwKTgF
yZy8GpTtzxDWjbo8cM/kh477blDmaLePsu8/c8WcajKCGQv05VgmQbCJhq6/55xuXcPua7U2KoL2
w/Z9ccgcPTTSpGwdPNHWy3Ig4nbZV2aFLJN+GTQUrMchyD6NT5Afuiv0gWMjiBb8pPMGenmfuJv8
cWZFypBZLOmlVGQqZS7RXkOx5JRHEtYbUF0Q7++rISZ0MDtG83+1z6madoF/jDdtrasETn4p2Qz3
53kJ2CFB5a3i5NIwr0v/gzNmk8ZOHiyuXVzX25Y0x9b9YTDmn8ksM7zi5JP2fD7HisLGkGhgzdtL
030Vefi+4sajB2+76RsfL7DNz8h8qVnhFEr5DkIcqNSLplgoXlx+ATPZhBw7ysBVr5hl5+gg7xgc
F9UIO5ukjSgcn2q32bGjw6/qwANBaoatxZ+ajVsgqzGdvOQ1fCO0eUK1om/V1oJqqxzF3uwXAb6D
or7I16kT3J53hjGWdTLWPaVxdYdzViMiRM9NKMGmdE4OzfsEK1UW/o8efnEVmcxVWokXSlSnf/NT
pHdrB44xsg+HJzaa3+PsBi+waM4nuC9xGQnBlQDMUTKX7cQ05da9gBdeZ7PJnBNAO1BD3Vv1KPHk
oJH/8T4ylPsV6gu2K+bGezjdb+/H2kfJIs2/OsK7HyBJfcqnrJ+gKUpflK4LWvJ4cZ/u2ll+7zYt
YMn6HOkEjQQsUhcdZ1cqpkdiaEKQSmDHsd9V58tEiQAn9Ncj9uGC21Ie4EcBUuHnLivki3ic6rfy
tuVoeoBn178COMzSXDtAtfyHTEAuY2yJac0xfcBOjvojipAGR1j1QZspo+524G/DcWLkIIUc66/U
z4C0BE+omvysDjlBpvm5Ym1g0Xy0I/IXAC5PB4xQswi8EujYmg==
`protect end_protected
| bsd-2-clause | 299381d08f085d865caea9e657b3fe61 | 0.945944 | 1.831944 | false | false | false | false |
mharndt/profibusmonitor | VHDL_Bausteine_old/PROFIBUS_MONITOR/CTRL_CRLF_VHDL.vhd | 4 | 3,004 | -- CTRL_CRLF
-- Carriage Return Line Fed bei Telegrammende in den zu sendenen Datenstrom einfügen
-- Projekt: PROFIBUS MONITOR
-- Ersteller: Martin Harndt
-- Erstellt: 10.01.2013
-- Bearbeiter: mharndt
-- Geaendert: 18.01.2013
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity CTRL_CRLF_VHDL is
Port(BYTE_IN : in std_logic_vector (7 downto 0); --Eingangsvariable, zu Daten Input, 8 bit
BYTE_OK : in std_logic; --Eingangsvariable, Byte OK
T_CMPLT : in std_logic; --Eingangsvariabel, Telegramm vollständig
BYTE_SEND : out std_logic_vector (7 downto 0); --Ausgangsvariable, zu sendene Daten, 8 bit
CLK : in std_logic; --Taktvariable
IN_NEXT_STATE: in std_logic; --1:Zustandsuebergang möglich
RESET : in std_logic); --1: Initialzustand annehmen
end CTRL_CRLF_VHDL;
architecture Behavioral of CTRL_CRLF_VHDL is
type TYPE_STATE is
(ST_CRLF_00, --Zustaende CTRL_CRLF
ST_CRLF_01,
ST_CRLF_02,
ST_CRLF_03);
signal SV : TYPE_STATE; --Zustandsvariable
signal n_SV: TYPE_STATE; --Zustandsvariable, neuer Wert
signal SV_M: TYPE_STATE; --Zustandsvariable, Ausgang Master
signal not_CLK : std_logic; --negierte Taktvariable
begin
NOT_CLK_PROC: process (CLK) --negieren Taktvariable
begin
not_CLK <= not CLK;
end process;
SREG_M_PROC: process (RESET, n_SV, CLK) --Master
begin
if (RESET ='1')
then SV_M <= ST_CRLF_00;
else
if (CLK'event and CLK = '1')
then
if (IN_NEXT_STATE = '1')
then SV_M <= n_SV;
else SV_M <= SV_M;
end if;
end if;
end if;
end process;
SREG_S_PROC: process (RESET, SV_M, not_CLK) --Slave
begin
if (RESET = '1')
then SV <= ST_CRLF_00;
else
if (not_CLK'event and not_CLK = '1')
then SV <= SV_M;
end if;
end if;
end process;
CTRL_CRLF_PROC:process (BYTE_IN, BYTE_OK, T_CMPLT, SV) --Wenn Byte ok dann Output=Input, wenn Byte ok und Telegramm komplett dann OUTPUT=CRLF
begin
case SV is
when ST_CRLF_00 =>
if (BYTE_OK = '1')
then
--CR01
BYTE_SEND <= BYTE_IN; --Output=Input
n_sv <= ST_CRLF_01; --Zustandsübergang
else
--CR00
BYTE_SEND <= BYTE_IN; --Output=Input
n_sv <= ST_CRLF_00; --bleibt im Zustand
end if;
when ST_CRLF_01 =>
if (T_CMPLT = '1')
then
--CR02
BYTE_SEND <= x"0D"; --Carriage Return
n_SV <= ST_CRLF_02; --Zustandsübergang
else
--CR01
BYTE_SEND <= BYTE_IN; --Output=Input
n_sv <= ST_CRLF_01; --Zustandsübergang
end if;
when ST_CRLF_02 =>
--CR03
BYTE_SEND <= x"0A"; --Line Feed
n_SV <= ST_CRLF_00; --Zustandsübergang
when others =>
-- CR00
BYTE_SEND <= BYTE_IN; --Output=Input
n_SV <= ST_CRLF_00; --Zustandsübergang
end case;
end process;
end Behavioral;
| gpl-2.0 | af3917b52fcdd43a40ffd8750fc8c53d | 0.595872 | 3.258134 | false | false | false | false |
Bjay1435/capstone | Geoff/Geoff.srcs/sources_1/bd/dma_loopback/ipshared/xilinx.com/axi_dma_v7_1/hdl/src/vhdl/axi_dma_mm2s_mngr.vhd | 1 | 51,660 | -- (c) Copyright 2012 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
------------------------------------------------------------
-------------------------------------------------------------------------------
-- Filename: axi_dma_mm2s_mngr.vhd
-- Description: This entity is the top level entity for the AXI DMA MM2S
-- manager.
--
-- VHDL-Standard: VHDL'93
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use ieee.std_logic_misc.all;
library unisim;
use unisim.vcomponents.all;
library axi_dma_v7_1_10;
use axi_dma_v7_1_10.axi_dma_pkg.all;
-------------------------------------------------------------------------------
entity axi_dma_mm2s_mngr is
generic(
C_PRMRY_IS_ACLK_ASYNC : integer range 0 to 1 := 0;
-- Primary MM2S/S2MM sync/async mode
-- 0 = synchronous mode - all clocks are synchronous
-- 1 = asynchronous mode - Primary data path channels (MM2S and S2MM)
-- run asynchronous to AXI Lite, DMA Control,
-- and SG.
C_PRMY_CMDFIFO_DEPTH : integer range 1 to 16 := 1;
-- Depth of DataMover command FIFO
-----------------------------------------------------------------------
-- Scatter Gather Parameters
-----------------------------------------------------------------------
C_INCLUDE_SG : integer range 0 to 1 := 1;
-- Include or Exclude the Scatter Gather Engine
-- 0 = Exclude SG Engine - Enables Simple DMA Mode
-- 1 = Include SG Engine - Enables Scatter Gather Mode
C_SG_INCLUDE_STSCNTRL_STRM : integer range 0 to 1 := 1;
-- Include or Exclude AXI Status and AXI Control Streams
-- 0 = Exclude Status and Control Streams
-- 1 = Include Status and Control Streams
C_SG_INCLUDE_DESC_QUEUE : integer range 0 to 1 := 0;
-- Include or Exclude Scatter Gather Descriptor Queuing
-- 0 = Exclude SG Descriptor Queuing
-- 1 = Include SG Descriptor Queuing
C_SG_LENGTH_WIDTH : integer range 8 to 23 := 14;
-- Descriptor Buffer Length, Transferred Bytes, and Status Stream
-- Rx Length Width. Indicates the least significant valid bits of
-- descriptor buffer length, transferred bytes, or Rx Length value
-- in the status word coincident with tlast.
C_M_AXI_SG_ADDR_WIDTH : integer range 32 to 64 := 32;
-- Master AXI Memory Map Address Width for Scatter Gather R/W Port
C_M_AXIS_SG_TDATA_WIDTH : integer range 32 to 32 := 32;
-- AXI Master Stream in for descriptor fetch
C_S_AXIS_UPDPTR_TDATA_WIDTH : integer range 32 to 32 := 32;
-- 32 Update Status Bits
C_S_AXIS_UPDSTS_TDATA_WIDTH : integer range 33 to 33 := 33;
-- 1 IOC bit + 32 Update Status Bits
C_M_AXIS_MM2S_CNTRL_TDATA_WIDTH : integer range 32 to 32 := 32;
-- Master AXI Control Stream Data Width
-----------------------------------------------------------------------
-- Memory Map to Stream (MM2S) Parameters
-----------------------------------------------------------------------
C_INCLUDE_MM2S : integer range 0 to 1 := 1;
-- Include or exclude MM2S primary data path
-- 0 = Exclude MM2S primary data path
-- 1 = Include MM2S primary data path
C_M_AXI_MM2S_ADDR_WIDTH : integer range 32 to 64 := 32;
-- Master AXI Memory Map Address Width for MM2S Read Port
C_ENABLE_MULTI_CHANNEL : integer range 0 to 1 := 0;
C_MICRO_DMA : integer range 0 to 1 := 0;
C_FAMILY : string := "virtex7"
-- Target FPGA Device Family
);
port (
-- Secondary Clock and Reset
m_axi_sg_aclk : in std_logic ; --
m_axi_sg_aresetn : in std_logic ; --
--
-- Primary Clock and Reset --
axi_prmry_aclk : in std_logic ; --
p_reset_n : in std_logic ; --
--
soft_reset : in std_logic ; --
--
-- MM2S Control and Status --
mm2s_run_stop : in std_logic ; --
mm2s_keyhole : in std_logic ;
mm2s_halted : in std_logic ; --
mm2s_ftch_idle : in std_logic ; --
mm2s_updt_idle : in std_logic ; --
mm2s_ftch_err_early : in std_logic ; --
mm2s_ftch_stale_desc : in std_logic ; --
mm2s_tailpntr_enble : in std_logic ; --
mm2s_halt : in std_logic ; --
mm2s_halt_cmplt : in std_logic ; --
mm2s_halted_clr : out std_logic ; --
mm2s_halted_set : out std_logic ; --
mm2s_idle_set : out std_logic ; --
mm2s_idle_clr : out std_logic ; --
mm2s_new_curdesc : out std_logic_vector --
(C_M_AXI_SG_ADDR_WIDTH-1 downto 0); --
mm2s_new_curdesc_wren : out std_logic ; --
mm2s_stop : out std_logic ; --
mm2s_desc_flush : out std_logic ; --
cntrl_strm_stop : out std_logic ;
mm2s_all_idle : out std_logic ; --
--
mm2s_error : out std_logic ; --
s2mm_error : in std_logic ; --
-- Simple DMA Mode Signals
mm2s_sa : in std_logic_vector --
(C_M_AXI_MM2S_ADDR_WIDTH-1 downto 0); --
mm2s_length_wren : in std_logic ; --
mm2s_length : in std_logic_vector --
(C_SG_LENGTH_WIDTH-1 downto 0) ; --
mm2s_smple_done : out std_logic ; --
mm2s_interr_set : out std_logic ; --
mm2s_slverr_set : out std_logic ; --
mm2s_decerr_set : out std_logic ; --
m_axis_mm2s_aclk : in std_logic;
mm2s_strm_tlast : in std_logic;
mm2s_strm_tready : in std_logic;
mm2s_axis_info : out std_logic_vector
(13 downto 0);
--
-- SG MM2S Descriptor Fetch AXI Stream In --
m_axis_mm2s_ftch_tdata : in std_logic_vector --
(C_M_AXIS_SG_TDATA_WIDTH-1 downto 0); --
m_axis_mm2s_ftch_tvalid : in std_logic ; --
m_axis_mm2s_ftch_tready : out std_logic ; --
m_axis_mm2s_ftch_tlast : in std_logic ; --
m_axis_mm2s_ftch_tdata_new : in std_logic_vector --
(96+31*0+(0+2)*(C_M_AXI_SG_ADDR_WIDTH-32) downto 0); --
m_axis_mm2s_ftch_tdata_mcdma_new : in std_logic_vector --
(63 downto 0); --
m_axis_mm2s_ftch_tvalid_new : in std_logic ; --
m_axis_ftch1_desc_available : in std_logic;
--
-- SG MM2S Descriptor Update AXI Stream Out --
s_axis_mm2s_updtptr_tdata : out std_logic_vector --
(C_M_AXI_SG_ADDR_WIDTH-1 downto 0); --
s_axis_mm2s_updtptr_tvalid : out std_logic ; --
s_axis_mm2s_updtptr_tready : in std_logic ; --
s_axis_mm2s_updtptr_tlast : out std_logic ; --
--
s_axis_mm2s_updtsts_tdata : out std_logic_vector --
(C_S_AXIS_UPDSTS_TDATA_WIDTH-1 downto 0); --
s_axis_mm2s_updtsts_tvalid : out std_logic ; --
s_axis_mm2s_updtsts_tready : in std_logic ; --
s_axis_mm2s_updtsts_tlast : out std_logic ; --
--
-- User Command Interface Ports (AXI Stream) --
s_axis_mm2s_cmd_tvalid : out std_logic ; --
s_axis_mm2s_cmd_tready : in std_logic ; --
s_axis_mm2s_cmd_tdata : out std_logic_vector --
((C_M_AXI_MM2S_ADDR_WIDTH-32+2*32+CMD_BASE_WIDTH+46)-1 downto 0);--
--
-- User Status Interface Ports (AXI Stream) --
m_axis_mm2s_sts_tvalid : in std_logic ; --
m_axis_mm2s_sts_tready : out std_logic ; --
m_axis_mm2s_sts_tdata : in std_logic_vector(7 downto 0) ; --
m_axis_mm2s_sts_tkeep : in std_logic_vector(0 downto 0) ; --
mm2s_err : in std_logic ; --
--
ftch_error : in std_logic ; --
updt_error : in std_logic ; --
--
-- Memory Map to Stream Control Stream Interface --
m_axis_mm2s_cntrl_tdata : out std_logic_vector --
(C_M_AXIS_MM2S_CNTRL_TDATA_WIDTH-1 downto 0); --
m_axis_mm2s_cntrl_tkeep : out std_logic_vector --
((C_M_AXIS_MM2S_CNTRL_TDATA_WIDTH/8)-1 downto 0); --
m_axis_mm2s_cntrl_tvalid : out std_logic ; --
m_axis_mm2s_cntrl_tready : in std_logic ; --
m_axis_mm2s_cntrl_tlast : out std_logic --
);
end axi_dma_mm2s_mngr;
-------------------------------------------------------------------------------
-- Architecture
-------------------------------------------------------------------------------
architecture implementation of axi_dma_mm2s_mngr is
attribute DowngradeIPIdentifiedWarnings: string;
attribute DowngradeIPIdentifiedWarnings of implementation : architecture is "yes";
-------------------------------------------------------------------------------
-- Functions
-------------------------------------------------------------------------------
-- No Functions Declared
-------------------------------------------------------------------------------
-- Constants Declarations
-------------------------------------------------------------------------------
-- No Constants Declared
-------------------------------------------------------------------------------
-- Signal / Type Declarations
-------------------------------------------------------------------------------
-- Primary DataMover Command signals
signal mm2s_cmnd_wr : std_logic := '0';
signal mm2s_cmnd_data : std_logic_vector
((C_M_AXI_MM2S_ADDR_WIDTH-32+2*32+CMD_BASE_WIDTH+46)-1 downto 0) := (others => '0');
signal mm2s_cmnd_pending : std_logic := '0';
-- Primary DataMover Status signals
signal mm2s_done : std_logic := '0';
signal mm2s_stop_i : std_logic := '0';
signal mm2s_interr : std_logic := '0';
signal mm2s_slverr : std_logic := '0';
signal mm2s_decerr : std_logic := '0';
signal mm2s_tag : std_logic_vector(3 downto 0) := (others => '0');
signal dma_mm2s_error : std_logic := '0';
signal soft_reset_d1 : std_logic := '0';
signal soft_reset_d2 : std_logic := '0';
signal soft_reset_re : std_logic := '0';
signal mm2s_error_i : std_logic := '0';
--signal cntrl_strm_stop : std_logic := '0';
signal mm2s_halted_set_i : std_logic := '0';
signal mm2s_sts_received_clr : std_logic := '0';
signal mm2s_sts_received : std_logic := '0';
signal mm2s_cmnd_idle : std_logic := '0';
signal mm2s_sts_idle : std_logic := '0';
-- Scatter Gather Interface signals
signal desc_fetch_req : std_logic := '0';
signal desc_fetch_done : std_logic := '0';
signal desc_fetch_done_del : std_logic := '0';
signal desc_update_req : std_logic := '0';
signal desc_update_done : std_logic := '0';
signal desc_available : std_logic := '0';
signal packet_in_progress : std_logic := '0';
signal mm2s_desc_baddress : std_logic_vector(C_M_AXI_MM2S_ADDR_WIDTH-1 downto 0) := (others => '0');
signal mm2s_desc_blength : std_logic_vector(BUFFER_LENGTH_WIDTH-1 downto 0) := (others => '0');
signal mm2s_desc_blength_v : std_logic_vector(BUFFER_LENGTH_WIDTH-1 downto 0) := (others => '0');
signal mm2s_desc_blength_s : std_logic_vector(BUFFER_LENGTH_WIDTH-1 downto 0) := (others => '0');
signal mm2s_desc_eof : std_logic := '0';
signal mm2s_desc_sof : std_logic := '0';
signal mm2s_desc_cmplt : std_logic := '0';
signal mm2s_desc_info : std_logic_vector(C_M_AXIS_SG_TDATA_WIDTH-1 downto 0) := (others => '0');
signal mm2s_desc_app0 : std_logic_vector(C_M_AXIS_SG_TDATA_WIDTH-1 downto 0) := (others => '0');
signal mm2s_desc_app1 : std_logic_vector(C_M_AXIS_SG_TDATA_WIDTH-1 downto 0) := (others => '0');
signal mm2s_desc_app2 : std_logic_vector(C_M_AXIS_SG_TDATA_WIDTH-1 downto 0) := (others => '0');
signal mm2s_desc_app3 : std_logic_vector(C_M_AXIS_SG_TDATA_WIDTH-1 downto 0) := (others => '0');
signal mm2s_desc_app4 : std_logic_vector(C_M_AXIS_SG_TDATA_WIDTH-1 downto 0) := (others => '0');
signal mm2s_desc_info_int : std_logic_vector(13 downto 0) := (others => '0');
signal mm2s_strm_tlast_int : std_logic;
signal rd_en_hold, rd_en_hold_int : std_logic;
-- Control Stream Fifo write signals
signal cntrlstrm_fifo_wren : std_logic := '0';
signal cntrlstrm_fifo_full : std_logic := '0';
signal cntrlstrm_fifo_din : std_logic_vector(C_M_AXIS_MM2S_CNTRL_TDATA_WIDTH downto 0) := (others => '0');
signal info_fifo_full : std_logic;
signal info_fifo_empty : std_logic;
signal updt_pending : std_logic := '0';
signal mm2s_cmnd_wr_1 : std_logic := '0';
signal fifo_rst : std_logic;
signal fifo_empty : std_logic;
signal fifo_empty_first : std_logic;
signal fifo_empty_first1 : std_logic;
signal first_read_pulse : std_logic;
signal fifo_read : std_logic;
-------------------------------------------------------------------------------
-- Begin architecture logic
-------------------------------------------------------------------------------
begin
-------------------------------------------------------------------------------
-- Include MM2S State Machine and support logic
-------------------------------------------------------------------------------
GEN_MM2S_DMA_CONTROL : if C_INCLUDE_MM2S = 1 generate
begin
-- Pass out to register module
mm2s_halted_set <= mm2s_halted_set_i;
-------------------------------------------------------------------------------
-- Graceful shut down logic
-------------------------------------------------------------------------------
-- Error from DataMover (DMAIntErr, DMADecErr, or DMASlvErr) or SG Update error
-- or SG Fetch error, or Stale Descriptor Error
mm2s_error_i <= dma_mm2s_error -- Primary data mover reports error
or updt_error -- SG Update engine reports error
or ftch_error -- SG Fetch engine reports error
or mm2s_ftch_err_early -- SG Fetch engine reports early error on mm2s
or mm2s_ftch_stale_desc; -- SG Fetch stale descriptor error
-- pass out to shut down s2mm
mm2s_error <= mm2s_error_i;
-- Clear run/stop and stop state machines due to errors or soft reset
-- Error based on datamover error report or sg update error or sg fetch error
-- SG update error and fetch error included because need to shut down, no way
-- to update descriptors on sg update error and on fetch error descriptor
-- data is corrupt therefor do not want to issue the xfer command to primary datamover
--CR#566306 status for both mm2s and s2mm datamover are masked during shutdown therefore
-- need to stop all processes regardless of the source of the error.
-- mm2s_stop_i <= mm2s_error -- Error
-- or soft_reset; -- Soft Reset issued
mm2s_stop_i <= mm2s_error_i -- Error on MM2S
or s2mm_error -- Error on S2MM
or soft_reset; -- Soft Reset issued
-- Reg stop out
REG_STOP_OUT : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
mm2s_stop <= '0';
else
mm2s_stop <= mm2s_stop_i;
end if;
end if;
end process REG_STOP_OUT;
-- Generate DMA Controller For Scatter Gather Mode
GEN_SCATTER_GATHER_MODE : if C_INCLUDE_SG = 1 generate
begin
-- Not Used in SG Mode (Errors are imbedded in updated descriptor and
-- generate error after descriptor update is complete)
mm2s_interr_set <= '0';
mm2s_slverr_set <= '0';
mm2s_decerr_set <= '0';
mm2s_smple_done <= '0';
mm2s_cmnd_wr_1 <= m_axis_mm2s_ftch_tvalid_new;
---------------------------------------------------------------------------
-- MM2S Primary DMA Controller State Machine
---------------------------------------------------------------------------
I_MM2S_SM : entity axi_dma_v7_1_10.axi_dma_mm2s_sm
generic map(
C_M_AXI_MM2S_ADDR_WIDTH => C_M_AXI_MM2S_ADDR_WIDTH ,
C_SG_LENGTH_WIDTH => C_SG_LENGTH_WIDTH ,
C_SG_INCLUDE_DESC_QUEUE => C_SG_INCLUDE_DESC_QUEUE ,
C_PRMY_CMDFIFO_DEPTH => C_PRMY_CMDFIFO_DEPTH ,
C_ENABLE_MULTI_CHANNEL => C_ENABLE_MULTI_CHANNEL
)
port map(
m_axi_sg_aclk => m_axi_sg_aclk ,
m_axi_sg_aresetn => m_axi_sg_aresetn ,
-- Channel 1 Control and Status
mm2s_run_stop => mm2s_run_stop ,
mm2s_keyhole => mm2s_keyhole ,
mm2s_ftch_idle => mm2s_ftch_idle ,
mm2s_cmnd_idle => mm2s_cmnd_idle ,
mm2s_sts_idle => mm2s_sts_idle ,
mm2s_stop => mm2s_stop_i ,
mm2s_desc_flush => mm2s_desc_flush ,
-- MM2S Descriptor Fetch Request (from mm2s_sm)
desc_available => desc_available ,
desc_fetch_req => desc_fetch_req ,
desc_fetch_done => desc_fetch_done ,
desc_update_done => desc_update_done ,
updt_pending => updt_pending ,
packet_in_progress => packet_in_progress ,
-- DataMover Command
mm2s_cmnd_wr => open, --mm2s_cmnd_wr_1 ,
mm2s_cmnd_data => mm2s_cmnd_data ,
mm2s_cmnd_pending => mm2s_cmnd_pending ,
-- Descriptor Fields
mm2s_cache_info => mm2s_desc_info ,
mm2s_desc_baddress => mm2s_desc_baddress ,
mm2s_desc_blength => mm2s_desc_blength ,
mm2s_desc_blength_v => mm2s_desc_blength_v ,
mm2s_desc_blength_s => mm2s_desc_blength_s ,
mm2s_desc_eof => mm2s_desc_eof ,
mm2s_desc_sof => mm2s_desc_sof
);
---------------------------------------------------------------------------
-- MM2S Scatter Gather State Machine
---------------------------------------------------------------------------
I_MM2S_SG_IF : entity axi_dma_v7_1_10.axi_dma_mm2s_sg_if
generic map(
-------------------------------------------------------------------
-- Scatter Gather Parameters
-------------------------------------------------------------------
C_PRMRY_IS_ACLK_ASYNC => C_PRMRY_IS_ACLK_ASYNC ,
C_SG_INCLUDE_DESC_QUEUE => C_SG_INCLUDE_DESC_QUEUE ,
C_SG_INCLUDE_STSCNTRL_STRM => C_SG_INCLUDE_STSCNTRL_STRM ,
C_M_AXIS_SG_TDATA_WIDTH => C_M_AXIS_SG_TDATA_WIDTH ,
C_S_AXIS_UPDPTR_TDATA_WIDTH => C_S_AXIS_UPDPTR_TDATA_WIDTH ,
C_S_AXIS_UPDSTS_TDATA_WIDTH => C_S_AXIS_UPDSTS_TDATA_WIDTH ,
C_M_AXI_SG_ADDR_WIDTH => C_M_AXI_SG_ADDR_WIDTH ,
C_M_AXI_MM2S_ADDR_WIDTH => C_M_AXI_MM2S_ADDR_WIDTH ,
C_M_AXIS_MM2S_CNTRL_TDATA_WIDTH => C_M_AXIS_MM2S_CNTRL_TDATA_WIDTH,
C_ENABLE_MULTI_CHANNEL => C_ENABLE_MULTI_CHANNEL ,
C_MICRO_DMA => C_MICRO_DMA,
C_FAMILY => C_FAMILY
)
port map(
m_axi_sg_aclk => m_axi_sg_aclk ,
m_axi_sg_aresetn => m_axi_sg_aresetn ,
-- SG MM2S Descriptor Fetch AXI Stream In
m_axis_mm2s_ftch_tdata => m_axis_mm2s_ftch_tdata ,
m_axis_mm2s_ftch_tvalid => m_axis_mm2s_ftch_tvalid ,
m_axis_mm2s_ftch_tready => m_axis_mm2s_ftch_tready ,
m_axis_mm2s_ftch_tlast => m_axis_mm2s_ftch_tlast ,
m_axis_mm2s_ftch_tdata_new => m_axis_mm2s_ftch_tdata_new ,
m_axis_mm2s_ftch_tdata_mcdma_new => m_axis_mm2s_ftch_tdata_mcdma_new ,
m_axis_mm2s_ftch_tvalid_new => m_axis_mm2s_ftch_tvalid_new ,
m_axis_ftch1_desc_available => m_axis_ftch1_desc_available ,
-- SG MM2S Descriptor Update AXI Stream Out
s_axis_mm2s_updtptr_tdata => s_axis_mm2s_updtptr_tdata ,
s_axis_mm2s_updtptr_tvalid => s_axis_mm2s_updtptr_tvalid ,
s_axis_mm2s_updtptr_tready => s_axis_mm2s_updtptr_tready ,
s_axis_mm2s_updtptr_tlast => s_axis_mm2s_updtptr_tlast ,
s_axis_mm2s_updtsts_tdata => s_axis_mm2s_updtsts_tdata ,
s_axis_mm2s_updtsts_tvalid => s_axis_mm2s_updtsts_tvalid ,
s_axis_mm2s_updtsts_tready => s_axis_mm2s_updtsts_tready ,
s_axis_mm2s_updtsts_tlast => s_axis_mm2s_updtsts_tlast ,
-- MM2S Descriptor Fetch Request (from mm2s_sm)
desc_available => desc_available ,
desc_fetch_req => desc_fetch_req ,
desc_fetch_done => desc_fetch_done ,
updt_pending => updt_pending ,
packet_in_progress => packet_in_progress ,
-- MM2S Descriptor Update Request
desc_update_done => desc_update_done ,
mm2s_ftch_stale_desc => mm2s_ftch_stale_desc ,
mm2s_sts_received_clr => mm2s_sts_received_clr ,
mm2s_sts_received => mm2s_sts_received ,
mm2s_desc_cmplt => mm2s_desc_cmplt ,
mm2s_done => mm2s_done ,
mm2s_interr => mm2s_interr ,
mm2s_slverr => mm2s_slverr ,
mm2s_decerr => mm2s_decerr ,
mm2s_tag => mm2s_tag ,
mm2s_halt => mm2s_halt , -- CR566306
-- Control Stream Output
cntrlstrm_fifo_wren => cntrlstrm_fifo_wren ,
cntrlstrm_fifo_full => cntrlstrm_fifo_full ,
cntrlstrm_fifo_din => cntrlstrm_fifo_din ,
-- MM2S Descriptor Field Output
mm2s_new_curdesc => mm2s_new_curdesc ,
mm2s_new_curdesc_wren => mm2s_new_curdesc_wren ,
mm2s_desc_baddress => mm2s_desc_baddress ,
mm2s_desc_blength => mm2s_desc_blength ,
mm2s_desc_blength_v => mm2s_desc_blength_v ,
mm2s_desc_blength_s => mm2s_desc_blength_s ,
mm2s_desc_info => mm2s_desc_info ,
mm2s_desc_eof => mm2s_desc_eof ,
mm2s_desc_sof => mm2s_desc_sof ,
mm2s_desc_app0 => mm2s_desc_app0 ,
mm2s_desc_app1 => mm2s_desc_app1 ,
mm2s_desc_app2 => mm2s_desc_app2 ,
mm2s_desc_app3 => mm2s_desc_app3 ,
mm2s_desc_app4 => mm2s_desc_app4
);
cntrlstrm_fifo_full <= '0';
end generate GEN_SCATTER_GATHER_MODE;
-- Generate DMA Controller for Simple DMA Mode
GEN_SIMPLE_DMA_MODE : if C_INCLUDE_SG = 0 generate
begin
-- Scatter Gather signals not used in Simple DMA Mode
m_axis_mm2s_ftch_tready <= '0';
s_axis_mm2s_updtptr_tdata <= (others => '0');
s_axis_mm2s_updtptr_tvalid <= '0';
s_axis_mm2s_updtptr_tlast <= '0';
s_axis_mm2s_updtsts_tdata <= (others => '0');
s_axis_mm2s_updtsts_tvalid <= '0';
s_axis_mm2s_updtsts_tlast <= '0';
desc_available <= '0';
desc_fetch_done <= '0';
packet_in_progress <= '0';
desc_update_done <= '0';
cntrlstrm_fifo_wren <= '0';
cntrlstrm_fifo_din <= (others => '0');
mm2s_new_curdesc <= (others => '0');
mm2s_new_curdesc_wren <= '0';
mm2s_desc_baddress <= (others => '0');
mm2s_desc_blength <= (others => '0');
mm2s_desc_blength_v <= (others => '0');
mm2s_desc_blength_s <= (others => '0');
mm2s_desc_eof <= '0';
mm2s_desc_sof <= '0';
mm2s_desc_cmplt <= '0';
mm2s_desc_app0 <= (others => '0');
mm2s_desc_app1 <= (others => '0');
mm2s_desc_app2 <= (others => '0');
mm2s_desc_app3 <= (others => '0');
mm2s_desc_app4 <= (others => '0');
desc_fetch_req <= '0';
-- Simple DMA State Machine
I_MM2S_SMPL_SM : entity axi_dma_v7_1_10.axi_dma_smple_sm
generic map(
C_M_AXI_ADDR_WIDTH => C_M_AXI_MM2S_ADDR_WIDTH ,
C_SG_LENGTH_WIDTH => C_SG_LENGTH_WIDTH,
C_MICRO_DMA => C_MICRO_DMA
)
port map(
m_axi_sg_aclk => m_axi_sg_aclk ,
m_axi_sg_aresetn => m_axi_sg_aresetn ,
-- Channel 1 Control and Status
run_stop => mm2s_run_stop ,
keyhole => mm2s_keyhole ,
stop => mm2s_stop_i ,
cmnd_idle => mm2s_cmnd_idle ,
sts_idle => mm2s_sts_idle ,
-- DataMover Status
sts_received => mm2s_sts_received ,
sts_received_clr => mm2s_sts_received_clr ,
-- DataMover Command
cmnd_wr => mm2s_cmnd_wr_1 ,
cmnd_data => mm2s_cmnd_data ,
cmnd_pending => mm2s_cmnd_pending ,
-- Trasnfer Qualifiers
xfer_length_wren => mm2s_length_wren ,
xfer_address => mm2s_sa ,
xfer_length => mm2s_length
);
-- Pass Done/Error Status out to DMASR
mm2s_interr_set <= mm2s_interr;
mm2s_slverr_set <= mm2s_slverr;
mm2s_decerr_set <= mm2s_decerr;
-- S2MM Simple DMA Transfer Done - used to assert IOC bit in DMASR.
-- Receive clear when not shutting down
mm2s_smple_done <= mm2s_sts_received_clr when mm2s_stop_i = '0'
-- Else halt set prior to halted being set
else mm2s_halted_set_i when mm2s_halted = '0'
else '0';
end generate GEN_SIMPLE_DMA_MODE;
-------------------------------------------------------------------------------
-- MM2S Primary DataMover command status interface
-------------------------------------------------------------------------------
I_MM2S_CMDSTS : entity axi_dma_v7_1_10.axi_dma_mm2s_cmdsts_if
generic map(
C_M_AXI_MM2S_ADDR_WIDTH => C_M_AXI_MM2S_ADDR_WIDTH,
C_ENABLE_MULTI_CHANNEL => C_ENABLE_MULTI_CHANNEL,
C_ENABLE_QUEUE => C_SG_INCLUDE_DESC_QUEUE
)
port map(
m_axi_sg_aclk => m_axi_sg_aclk ,
m_axi_sg_aresetn => m_axi_sg_aresetn ,
-- Fetch command write interface from mm2s sm
mm2s_cmnd_wr => mm2s_cmnd_wr_1 ,
mm2s_cmnd_data => mm2s_cmnd_data ,
mm2s_cmnd_pending => mm2s_cmnd_pending ,
mm2s_sts_received_clr => mm2s_sts_received_clr ,
mm2s_sts_received => mm2s_sts_received ,
mm2s_tailpntr_enble => mm2s_tailpntr_enble ,
mm2s_desc_cmplt => mm2s_desc_cmplt ,
-- User Command Interface Ports (AXI Stream)
s_axis_mm2s_cmd_tvalid => s_axis_mm2s_cmd_tvalid ,
s_axis_mm2s_cmd_tready => s_axis_mm2s_cmd_tready ,
s_axis_mm2s_cmd_tdata => s_axis_mm2s_cmd_tdata ,
-- User Status Interface Ports (AXI Stream)
m_axis_mm2s_sts_tvalid => m_axis_mm2s_sts_tvalid ,
m_axis_mm2s_sts_tready => m_axis_mm2s_sts_tready ,
m_axis_mm2s_sts_tdata => m_axis_mm2s_sts_tdata ,
m_axis_mm2s_sts_tkeep => m_axis_mm2s_sts_tkeep ,
-- MM2S Primary DataMover Status
mm2s_err => mm2s_err ,
mm2s_done => mm2s_done ,
mm2s_error => dma_mm2s_error ,
mm2s_interr => mm2s_interr ,
mm2s_slverr => mm2s_slverr ,
mm2s_decerr => mm2s_decerr ,
mm2s_tag => mm2s_tag
);
---------------------------------------------------------------------------
-- Halt / Idle Status Manager
---------------------------------------------------------------------------
I_MM2S_STS_MNGR : entity axi_dma_v7_1_10.axi_dma_mm2s_sts_mngr
generic map(
C_PRMRY_IS_ACLK_ASYNC => C_PRMRY_IS_ACLK_ASYNC
)
port map(
m_axi_sg_aclk => m_axi_sg_aclk ,
m_axi_sg_aresetn => m_axi_sg_aresetn ,
-- dma control and sg engine status signals
mm2s_run_stop => mm2s_run_stop ,
mm2s_ftch_idle => mm2s_ftch_idle ,
mm2s_updt_idle => mm2s_updt_idle ,
mm2s_cmnd_idle => mm2s_cmnd_idle ,
mm2s_sts_idle => mm2s_sts_idle ,
-- stop and halt control/status
mm2s_stop => mm2s_stop_i ,
mm2s_halt_cmplt => mm2s_halt_cmplt ,
-- system state and control
mm2s_all_idle => mm2s_all_idle ,
mm2s_halted_clr => mm2s_halted_clr ,
mm2s_halted_set => mm2s_halted_set_i ,
mm2s_idle_set => mm2s_idle_set ,
mm2s_idle_clr => mm2s_idle_clr
);
-- MM2S Control Stream Included
GEN_CNTRL_STREAM : if C_SG_INCLUDE_STSCNTRL_STRM = 1 and C_INCLUDE_SG = 1 generate
begin
-- Register soft reset to create rising edge pulse to use for shut down.
-- soft_reset from DMACR does not clear until after all reset processes
-- are done. This causes stop to assert too long causing issue with
-- status stream skid buffer.
REG_SFT_RST : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
soft_reset_d1 <= '0';
soft_reset_d2 <= '0';
else
soft_reset_d1 <= soft_reset;
soft_reset_d2 <= soft_reset_d1;
end if;
end if;
end process REG_SFT_RST;
-- Rising edge soft reset pulse
soft_reset_re <= soft_reset_d1 and not soft_reset_d2;
-- Control Stream module stop requires rising edge of soft reset to
-- shut down due to DMACR.SoftReset does not deassert on internal hard reset
-- It clears after therefore do not want to issue another stop to cntrl strm
-- skid buffer.
cntrl_strm_stop <= mm2s_error_i -- Error
or soft_reset_re; -- Soft Reset issued
-- Control stream interface
-- I_MM2S_CNTRL_STREAM : entity axi_dma_v7_1_10.axi_dma_mm2s_cntrl_strm
-- generic map(
-- C_PRMRY_IS_ACLK_ASYNC => C_PRMRY_IS_ACLK_ASYNC ,
-- C_PRMY_CMDFIFO_DEPTH => C_PRMY_CMDFIFO_DEPTH ,
-- C_M_AXIS_MM2S_CNTRL_TDATA_WIDTH => C_M_AXIS_MM2S_CNTRL_TDATA_WIDTH ,
-- C_FAMILY => C_FAMILY
-- )
-- port map(
-- -- Secondary clock / reset
-- m_axi_sg_aclk => m_axi_sg_aclk ,
-- m_axi_sg_aresetn => m_axi_sg_aresetn ,
--
-- -- Primary clock / reset
-- axi_prmry_aclk => axi_prmry_aclk ,
-- p_reset_n => p_reset_n ,
--
-- -- MM2S Error
-- mm2s_stop => cntrl_strm_stop ,
--
-- -- Control Stream input
---- cntrlstrm_fifo_wren => cntrlstrm_fifo_wren ,
-- cntrlstrm_fifo_full => cntrlstrm_fifo_full ,
-- cntrlstrm_fifo_din => cntrlstrm_fifo_din ,
--
-- -- Memory Map to Stream Control Stream Interface
-- m_axis_mm2s_cntrl_tdata => m_axis_mm2s_cntrl_tdata ,
-- m_axis_mm2s_cntrl_tkeep => m_axis_mm2s_cntrl_tkeep ,
-- m_axis_mm2s_cntrl_tvalid => m_axis_mm2s_cntrl_tvalid ,
-- m_axis_mm2s_cntrl_tready => m_axis_mm2s_cntrl_tready ,
-- m_axis_mm2s_cntrl_tlast => m_axis_mm2s_cntrl_tlast
--
-- );
end generate GEN_CNTRL_STREAM;
-- MM2S Control Stream Excluded
GEN_NO_CNTRL_STREAM : if C_SG_INCLUDE_STSCNTRL_STRM = 0 or C_INCLUDE_SG = 0 generate
begin
soft_reset_d1 <= '0';
soft_reset_d2 <= '0';
soft_reset_re <= '0';
cntrl_strm_stop <= '0';
end generate GEN_NO_CNTRL_STREAM;
m_axis_mm2s_cntrl_tdata <= (others => '0');
m_axis_mm2s_cntrl_tkeep <= (others => '0');
m_axis_mm2s_cntrl_tvalid <= '0';
m_axis_mm2s_cntrl_tlast <= '0';
end generate GEN_MM2S_DMA_CONTROL;
-------------------------------------------------------------------------------
-- Exclude MM2S State Machine and support logic
-------------------------------------------------------------------------------
GEN_NO_MM2S_DMA_CONTROL : if C_INCLUDE_MM2S = 0 generate
begin
m_axis_mm2s_ftch_tready <= '0';
s_axis_mm2s_updtptr_tdata <= (others =>'0');
s_axis_mm2s_updtptr_tvalid <= '0';
s_axis_mm2s_updtptr_tlast <= '0';
s_axis_mm2s_updtsts_tdata <= (others =>'0');
s_axis_mm2s_updtsts_tvalid <= '0';
s_axis_mm2s_updtsts_tlast <= '0';
mm2s_new_curdesc <= (others =>'0');
mm2s_new_curdesc_wren <= '0';
s_axis_mm2s_cmd_tvalid <= '0';
s_axis_mm2s_cmd_tdata <= (others =>'0');
m_axis_mm2s_sts_tready <= '0';
mm2s_halted_clr <= '0';
mm2s_halted_set <= '0';
mm2s_idle_set <= '0';
mm2s_idle_clr <= '0';
m_axis_mm2s_cntrl_tdata <= (others => '0');
m_axis_mm2s_cntrl_tkeep <= (others => '0');
m_axis_mm2s_cntrl_tvalid <= '0';
m_axis_mm2s_cntrl_tlast <= '0';
mm2s_stop <= '0';
mm2s_desc_flush <= '0';
mm2s_all_idle <= '1';
mm2s_error <= '0'; -- CR#570587
mm2s_interr_set <= '0';
mm2s_slverr_set <= '0';
mm2s_decerr_set <= '0';
mm2s_smple_done <= '0';
cntrl_strm_stop <= '0';
end generate GEN_NO_MM2S_DMA_CONTROL;
TDEST_FIFO : if (C_ENABLE_MULTI_CHANNEL = 1) generate
process (m_axi_sg_aclk)
begin
if (m_axi_sg_aclk'event and m_axi_sg_aclk = '1') then
if (m_axi_sg_aresetn = '0') then
desc_fetch_done_del <= '0';
else --if (m_axi_sg_aclk'event and m_axi_sg_aclk = '1') then
desc_fetch_done_del <= desc_fetch_done;
end if;
end if;
end process;
process (m_axis_mm2s_aclk)
begin
if (m_axis_mm2s_aclk'event and m_axis_mm2s_aclk = '1') then
if (m_axi_sg_aresetn = '0') then
fifo_empty <= '0';
else
fifo_empty <= info_fifo_empty;
end if;
end if;
end process;
process (m_axis_mm2s_aclk)
begin
if (m_axis_mm2s_aclk'event and m_axis_mm2s_aclk = '1') then
if (m_axi_sg_aresetn = '0') then
fifo_empty_first <= '0';
fifo_empty_first1 <= '0';
else
if (fifo_empty_first = '0' and (info_fifo_empty = '0' and fifo_empty = '1')) then
fifo_empty_first <= '1';
end if;
fifo_empty_first1 <= fifo_empty_first;
end if;
end if;
end process;
first_read_pulse <= fifo_empty_first and (not fifo_empty_first1);
fifo_read <= first_read_pulse or rd_en_hold;
mm2s_desc_info_int <= mm2s_desc_info (19 downto 16) & mm2s_desc_info (12 downto 8) & mm2s_desc_info (4 downto 0);
-- mm2s_strm_tlast_int <= mm2s_strm_tlast and (not info_fifo_empty);
-- process (m_axis_mm2s_aclk)
-- begin
-- if (m_axis_mm2s_aclk'event and m_axis_mm2s_aclk = '1') then
-- if (p_reset_n = '0') then
-- rd_en_hold <= '0';
-- rd_en_hold_int <= '0';
-- else
-- if (rd_en_hold = '1') then
-- rd_en_hold <= '0';
-- elsif (info_fifo_empty = '0' and mm2s_strm_tlast = '1' and mm2s_strm_tready = '1') then
-- rd_en_hold <= '1';
-- rd_en_hold_int <= '0';
-- else
-- rd_en_hold <= rd_en_hold;
-- rd_en_hold_int <= rd_en_hold_int;
-- end if;
-- end if;
-- end if;
-- end process;
process (m_axis_mm2s_aclk)
begin
if (m_axis_mm2s_aclk'event and m_axis_mm2s_aclk = '1') then
if (p_reset_n = '0') then
rd_en_hold <= '0';
rd_en_hold_int <= '0';
else
if (info_fifo_empty = '1' and mm2s_strm_tlast = '1' and mm2s_strm_tready = '1') then
rd_en_hold <= '1';
rd_en_hold_int <= '0';
elsif (info_fifo_empty = '0') then
rd_en_hold <= mm2s_strm_tlast and mm2s_strm_tready;
rd_en_hold_int <= rd_en_hold;
else
rd_en_hold <= rd_en_hold;
rd_en_hold_int <= rd_en_hold_int;
end if;
end if;
end if;
end process;
fifo_rst <= not (m_axi_sg_aresetn);
-- Following FIFO is used to store the Tuser, Tid and xCache info
I_INFO_FIFO : entity axi_dma_v7_1_10.axi_dma_afifo_autord
generic map(
C_DWIDTH => 14,
C_DEPTH => 31 ,
C_CNT_WIDTH => 5 ,
C_USE_BLKMEM => 0,
C_USE_AUTORD => 1,
C_PRMRY_IS_ACLK_ASYNC => C_PRMRY_IS_ACLK_ASYNC ,
C_FAMILY => C_FAMILY
)
port map(
-- Inputs
AFIFO_Ainit => fifo_rst ,
AFIFO_Wr_clk => m_axi_sg_aclk ,
AFIFO_Wr_en => desc_fetch_done_del ,
AFIFO_Din => mm2s_desc_info_int ,
AFIFO_Rd_clk => m_axis_mm2s_aclk ,
AFIFO_Rd_en => rd_en_hold_int, --fifo_read, --mm2s_strm_tlast_int ,
AFIFO_Clr_Rd_Data_Valid => '0' ,
-- Outputs
AFIFO_DValid => open ,
AFIFO_Dout => mm2s_axis_info ,
AFIFO_Full => info_fifo_full ,
AFIFO_Empty => info_fifo_empty ,
AFIFO_Almost_full => open ,
AFIFO_Almost_empty => open ,
AFIFO_Wr_count => open ,
AFIFO_Rd_count => open ,
AFIFO_Corr_Rd_count => open ,
AFIFO_Corr_Rd_count_minus1 => open ,
AFIFO_Rd_ack => open
);
end generate TDEST_FIFO;
NO_TDEST_FIFO : if (C_ENABLE_MULTI_CHANNEL = 0) generate
mm2s_axis_info <= (others => '0');
end generate NO_TDEST_FIFO;
end implementation;
| mit | 92f400ae72828de01e4c49c000955fd0 | 0.40633 | 4.222313 | false | false | false | false |
szanni/aeshw | aes-core/counter_tb.vhd | 1 | 2,954 | --------------------------------------------------------------------------------
-- Company:
-- Engineer:
--
-- Create Date: 15:29:38 07/13/2014
-- Design Name:
-- Module Name: /home/qfi/Documents/aeshw/aes-core/aes-core/counter_tb.vhd
-- Project Name: aes-core
-- Target Device:
-- Tool versions:
-- Description:
--
-- VHDL Test Bench Created by ISE for module: counter
--
-- Dependencies:
--
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
--
-- Notes:
-- This testbench has been automatically generated using types std_logic and
-- std_logic_vector for the ports of the unit under test. Xilinx recommends
-- that these types always be used for the top-level I/O of a design in order
-- to guarantee that the testbench will bind correctly to the post-implementation
-- simulation model.
--------------------------------------------------------------------------------
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
use ieee.numeric_std.all;
-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--USE ieee.numeric_std.ALL;
ENTITY counter_tb IS
END counter_tb;
ARCHITECTURE behavior OF counter_tb IS
-- Component Declaration for the Unit Under Test (UUT)
COMPONENT counter
PORT(
clk : IN std_logic;
reset : IN std_logic;
y : IN std_logic_vector(1 downto 0);
d_out : OUT std_logic_vector(7 downto 0);
x : OUT std_logic
);
END COMPONENT;
--Inputs
signal clk : std_logic := '0';
signal reset : std_logic := '0';
signal y : std_logic_vector(1 downto 0) := (others => '0');
signal x : std_logic;
--Outputs
signal d_out : std_logic_vector(7 downto 0);
-- Clock period definitions
constant clk_period : time := 10 ns;
BEGIN
-- Instantiate the Unit Under Test (UUT)
uut: counter PORT MAP (
clk => clk,
reset => reset,
y => y,
d_out => d_out,
x => x
);
-- Clock process definitions
clk_process :process
begin
for i in 0 to 11 loop
clk <= '0';
wait for clk_period/2;
clk <= '1';
wait for clk_period/2;
end loop;
wait;
end process;
-- Stimulus process
stim_proc: process
begin
wait for clk_period;
-- load 0 into the register
y <= "00";
wait for clk_period;
assert d_out = x"00" report "counter : failure" severity failure;
assert x = '0' report "counter : failure" severity failure;
-- increment value
y <= "01";
for i in 1 to 10 loop
wait for clk_period;
assert d_out = std_logic_vector(to_unsigned(i, d_out'length)) report "counter : failure" severity failure;
assert x = '0' report "counter : failure" severity failure;
end loop;
assert d_out = x"0B" report "counter : failure" severity failure;
assert x = '1' report "counter : failure" severity failure;
wait;
end process;
END;
| bsd-2-clause | 51a8db6d0f9ec8d6ffd170289e9ca0c2 | 0.599865 | 3.68789 | false | true | false | false |
AlessandroSpallina/CalcolatoriElettronici | VHDL/28-01-16/28-01-16_compito_last.vhd | 2 | 4,112 | -- Copyright (C) 2016 by Spallina Ind.
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity mariangela is
port (
din : in std_logic_vector(15 downto 0);
start, clk : in std_logic;
dout : out std_logic_vector(15 downto 0);
fine : out std_logic
);
end mariangela;
architecture beh of mariangela is
type stati is (idle, getOP, getA, getB, exe1, exe2, exe3);
signal st : stati;
signal REG, A, B : std_logic_vector(15 downto 0);
signal OP : std_logic_vector(2 downto 0);
signal counter : integer range 2 downto 0;
function next_state (st : stati; start : std_logic; op : std_logic_vector(2 downto 0); counter : integer range 2 downto 0; reg : std_logic_vector(15 downto 0))
return stati is
variable nxt : stati;
begin
case st is
when idle =>
if start = '1' then nxt := getOP;
else nxt := idle;
end if;
when getOP =>
nxt := getA;
when getA =>
case op is
when "101" | "000" | "100" =>
nxt := exe1;
when "110" =>
if conv_integer(REG) = 0 then nxt := exe1;
else nxt := exe3;
end if;
when others =>
nxt := getB;
end case;
when getB =>
case op is
when "001" =>
nxt := exe1;
when "010" =>
nxt := exe3;
when others =>
nxt := exe2;
end case;
when exe1 =>
nxt := idle;
when exe2 =>
if counter < 1 then nxt := exe2;
else nxt := idle;
end if;
when exe3 =>
if counter < 2 then nxt := exe3;
else nxt := idle;
end if;
end case;
return nxt;
end next_state;
-- siccome non ho niente da fare nella vita, mi scrivo sta procedura tanto per D:
procedure return_result (signal REG : inout std_logic_vector(15 downto 0); value_to_return : in std_logic_vector(15 downto 0); signal dout : out std_logic_vector(15 downto 0)) is
begin
REG <= value_to_return;
dout <= REG;
end return_result;
-- anche questa funzione è fatta perchè non ho che fare :D
function min (A : std_logic_vector(15 downto 0); B : std_logic_vector(15 downto 0); REG : std_logic_vector(15 downto 0))
return std_logic_vector is
variable tmp : std_logic_vector(15 downto 0);
begin
if (A < B) then
tmp := A;
else
tmp := B;
end if;
if(tmp > REG) then
tmp := REG;
end if;
return tmp;
end min;
signal enOP, enA, enB, enEXE1, enEXE2, enEXE3 : std_logic;
begin
-- CU
process (clk)
begin
if clk'event and clk = '0' then
st <= next_state (st, start, op, counter, reg);
end if;
end process;
enOP <= '1' when st = getOP else '0';
enA <= '1' when st = getA else '0';
enB <= '1' when st = getB else '0';
enEXE1 <= '1' when st = exe1 else '0';
enEXE2 <= '1' when st = exe2 else '0';
enEXE3 <= '1' when st = exe3 else '0';
-- DATAPATH
process (clk)
begin
if enOP = '1' then
op <= din(2 downto 0);
counter <= 0;
end if;
if enA = '1' then
A <= din;
end if;
if enB = '1' then
B <= din;
end if;
if enEXE1 = '1' then
case op is
when "100" | "000" => -- SET
REG <= A;
when "001" => -- AND (A,B)
return_result(REG, (A and B), dout);
when "101" => -- AND (A,REG)
return_result(REG, (A and REG), dout);
when others => -- "110" ADD => SET
REG <= A;
end case;
end if;
if enEXE2 = '1' then -- MIN
if counter = 1 then
return_result(REG, min(A,B,REG), dout);
else
counter <= counter + 1;
end if;
end if;
if enEXE3 = '1' then
if counter = 2 then
case op is
when "010" => -- ADD (A,B)
return_result(REG, A+B, dout);
when others => -- "110" ADD (A,REG)
return_result(REG, A+REG, dout);
end case;
else
counter <= counter + 1;
end if;
end if;
if enEXE1 = '1' or (enEXE2 = '1' and counter = 1) or (enEXE3 = '1' and counter = 2) then
fine <= '1';
else
fine <= '0';
end if;
end process;
end beh;
| mit | b3b7bdac5eb848a1f330610b8aebf94a | 0.548881 | 2.820302 | false | false | false | false |
sergeykhbr/riscv_vhdl | vhdl/rtl/prj/ml605/config_v6.vhd | 1 | 2,749 | --!
--! Copyright 2019 Sergey Khabarov, [email protected]
--!
--! Licensed under the Apache License, Version 2.0 (the "License");
--! you may not use this file except in compliance with the License.
--! You may obtain a copy of the License at
--!
--! http://www.apache.org/licenses/LICENSE-2.0
--!
--! Unless required by applicable law or agreed to in writing, software
--! distributed under the License is distributed on an "AS IS" BASIS,
--! WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
--! See the License for the specific language governing permissions and
--! limitations under the License.
--!
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
library techmap;
use techmap.gencomp.all;
package config_target is
-- Technology and synthesis options
constant CFG_FABTECH : integer := virtex6;
constant CFG_MEMTECH : integer := virtex6;
constant CFG_PADTECH : integer := virtex6;
constant CFG_JTAGTECH : integer := virtex6;
constant CFG_ASYNC_RESET : boolean := false;
constant CFG_TOPDIR : string := "../../../";
--! @brief Number of processors in a system
--! @details This value may be in a range 1 to CFG_TOTAL_CPU_MAX-1
constant CFG_CPU_NUM : integer := 1;
--! @brief HEX-image for the initialization of the Boot ROM.
--! @details This file is used by \e inferred ROM implementation.
constant CFG_SIM_BOOTROM_HEX : string :=
CFG_TOPDIR & "examples/boot/linuxbuild/bin/bootimage.hex";
-- CFG_TOPDIR & "examples/bootrom_tests/linuxbuild/bin/bootrom_tests.hex";
--! @brief HEX-image for the initialization of the FwImage ROM.
--! @details This file is used by \e inferred ROM implementation.
constant CFG_SIM_FWIMAGE_HEX : string :=
CFG_TOPDIR & "examples/zephyr/gcc711/zephyr.hex";
-- CFG_TOPDIR & "examples/dhrystone21/makefiles/bin/dhrystone21.hex";
--! @brief Hardware SoC Identificator.
--!
--! @details Read Only unique platform identificator that could be
--! read by firmware from the Plug'n'Play support module.
constant CFG_HW_ID : std_logic_vector(31 downto 0) := X"20191206";
--! @brief Enabling Ethernet MAC interface.
--! @details By default MAC module enables support of the debug feature EDCL.
constant CFG_ETHERNET_ENABLE : boolean := true;
--! @brief Enable/Disable Debug Unit
constant CFG_DSU_ENABLE : boolean := true;
--! External Flash IC connected via SPI
constant CFG_EXT_FLASH_ENA : boolean := false;
--! GNSS sub-system
constant CFG_GNSS_SS_ENA : boolean := false;
--! OTP 8 KB memory bank
constant CFG_OTP8KB_ENA : boolean := false;
--! Coherent bridge with L2-cache
constant CFG_L2CACHE_ENA : boolean := false;
end;
| apache-2.0 | f0b820c3a265123bf70be43d6d479cf0 | 0.687523 | 3.882768 | false | false | false | false |
Bjay1435/capstone | Geoff/Geoff.srcs/sources_1/bd/dma_loopback/ipshared/xilinx.com/axi_dma_v7_1/hdl/src/vhdl/axi_dma_sofeof_gen.vhd | 1 | 19,882 | -- (c) Copyright 2012 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
------------------------------------------------------------
-------------------------------------------------------------------------------
-- Filename: axi_dma_sofeof_gen.vhd
-- Description: This entity manages
--
-- VHDL-Standard: VHDL'93
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use ieee.std_logic_misc.all;
library unisim;
use unisim.vcomponents.all;
library lib_cdc_v1_0_2;
library axi_dma_v7_1_10;
use axi_dma_v7_1_10.axi_dma_pkg.all;
-------------------------------------------------------------------------------
entity axi_dma_sofeof_gen is
generic (
C_PRMRY_IS_ACLK_ASYNC : integer range 0 to 1 := 0
-- Primary MM2S/S2MM sync/async mode
-- 0 = synchronous mode - all clocks are synchronous
-- 1 = asynchronous mode - Primary data path channels (MM2S and S2MM)
-- run asynchronous to AXI Lite, DMA Control,
-- and SG.
);
port (
-----------------------------------------------------------------------
-- AXI Scatter Gather Interface
-----------------------------------------------------------------------
axi_prmry_aclk : in std_logic ; --
p_reset_n : in std_logic ; --
--
m_axi_sg_aclk : in std_logic ; --
m_axi_sg_aresetn : in std_logic ; --
--
axis_tready : in std_logic ; --
axis_tvalid : in std_logic ; --
axis_tlast : in std_logic ; --
--
packet_sof : out std_logic ; --
packet_eof : out std_logic --
--
);
end axi_dma_sofeof_gen;
-------------------------------------------------------------------------------
-- Architecture
-------------------------------------------------------------------------------
architecture implementation of axi_dma_sofeof_gen is
attribute DowngradeIPIdentifiedWarnings: string;
attribute DowngradeIPIdentifiedWarnings of implementation : architecture is "yes";
ATTRIBUTE async_reg : STRING;
-------------------------------------------------------------------------------
-- Functions
-------------------------------------------------------------------------------
-- No Functions Declared
-------------------------------------------------------------------------------
-- Constants Declarations
-------------------------------------------------------------------------------
-- No Constants Declared
-------------------------------------------------------------------------------
-- Signal / Type Declarations
-------------------------------------------------------------------------------
signal p_ready : std_logic := '0';
signal p_valid : std_logic := '0';
signal p_valid_d1 : std_logic := '0';
signal p_valid_re : std_logic := '0';
signal p_last : std_logic := '0';
signal p_last_d1 : std_logic := '0';
signal p_last_re : std_logic := '0';
signal s_ready : std_logic := '0';
signal s_valid : std_logic := '0';
signal s_valid_d1 : std_logic := '0';
signal s_valid_re : std_logic := '0';
signal s_last : std_logic := '0';
signal s_last_d1 : std_logic := '0';
signal s_last_re : std_logic := '0';
signal s_sof_d1_cdc_tig : std_logic := '0';
signal s_sof_d2 : std_logic := '0';
--ATTRIBUTE async_reg OF s_sof_d1_cdc_tig : SIGNAL IS "true";
--ATTRIBUTE async_reg OF s_sof_d2 : SIGNAL IS "true";
signal s_sof_d3 : std_logic := '0';
signal s_sof_re : std_logic := '0';
signal s_sof : std_logic := '0';
signal p_sof : std_logic := '0';
signal s_eof_d1_cdc_tig : std_logic := '0';
signal s_eof_d2 : std_logic := '0';
--ATTRIBUTE async_reg OF s_eof_d1_cdc_tig : SIGNAL IS "true";
--ATTRIBUTE async_reg OF s_eof_d2 : SIGNAL IS "true";
signal s_eof_d3 : std_logic := '0';
signal s_eof_re : std_logic := '0';
signal p_eof : std_logic := '0';
signal p_eof_d1_cdc_tig : std_logic := '0';
signal p_eof_d2 : std_logic := '0';
--ATTRIBUTE async_reg OF p_eof_d1_cdc_tig : SIGNAL IS "true";
--ATTRIBUTE async_reg OF p_eof_d2 : SIGNAL IS "true";
signal p_eof_d3 : std_logic := '0';
signal p_eof_clr : std_logic := '0';
signal s_sof_generated : std_logic := '0';
signal sof_generated_fe : std_logic := '0';
signal s_eof_re_latch : std_logic := '0';
-------------------------------------------------------------------------------
-- Begin architecture logic
-------------------------------------------------------------------------------
begin
-- pass internal version out
packet_sof <= s_sof_re;
packet_eof <= s_eof_re;
-- Generate for when primary clock is asynchronous
GEN_FOR_ASYNC : if C_PRMRY_IS_ACLK_ASYNC = 1 generate
begin
---------------------------------------------------------------------------
-- Generate Packet SOF
---------------------------------------------------------------------------
-- Register stream control in to isolate wrt clock
-- for timing closure
REG_STRM_IN : process(axi_prmry_aclk)
begin
if(axi_prmry_aclk'EVENT and axi_prmry_aclk = '1')then
if(p_reset_n = '0')then
p_valid <= '0';
p_last <= '0';
p_ready <= '0';
else
p_valid <= axis_tvalid;
p_last <= axis_tlast ;
p_ready <= axis_tready;
end if;
end if;
end process REG_STRM_IN;
-- Generate rising edge pulse on valid to use for
-- smaple and hold register
REG_FOR_RE : process(axi_prmry_aclk)
begin
if(axi_prmry_aclk'EVENT and axi_prmry_aclk = '1')then
if(p_reset_n = '0')then
p_valid_d1 <= '0';
p_last_d1 <= '0';
p_last_re <= '0';
else
p_valid_d1 <= p_valid and p_ready;
p_last_d1 <= p_last and p_valid and p_ready;
-- register to aligne with setting of p_sof
p_last_re <= p_ready and p_valid and p_last and not p_last_d1;
end if;
end if;
end process REG_FOR_RE;
p_valid_re <= p_ready and p_valid and not p_valid_d1;
-- Sample and hold valid re to create sof
SOF_SMPL_N_HOLD : process(axi_prmry_aclk)
begin
if(axi_prmry_aclk'EVENT and axi_prmry_aclk = '1')then
-- clear at end of packet
if(p_reset_n = '0' or p_eof_clr = '1')then
p_sof <= '0';
-- assert at beginning of packet hold to allow
-- clock crossing to slower secondary clk
elsif(p_valid_re = '1')then
p_sof <= '1';
end if;
end if;
end process SOF_SMPL_N_HOLD;
-- Register p_sof into secondary clock domain to
-- generate packet_sof and also to clear sample and held p_sof
SOF_REG2SCNDRY : entity lib_cdc_v1_0_2.cdc_sync
generic map (
C_CDC_TYPE => 1,
C_RESET_STATE => 0,
C_SINGLE_BIT => 1,
C_VECTOR_WIDTH => 32,
C_MTBF_STAGES => MTBF_STAGES
)
port map (
prmry_aclk => '0',
prmry_resetn => '0',
prmry_in => p_sof,
prmry_vect_in => (others => '0'),
scndry_aclk => m_axi_sg_aclk,
scndry_resetn => '0',
scndry_out => s_sof_d2,
scndry_vect_out => open
);
SOF_REG2SCNDRY1 : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
-- s_sof_d1_cdc_tig <= '0';
-- s_sof_d2 <= '0';
s_sof_d3 <= '0';
else
-- s_sof_d1_cdc_tig <= p_sof;
-- s_sof_d2 <= s_sof_d1_cdc_tig;
s_sof_d3 <= s_sof_d2;
end if;
end if;
end process SOF_REG2SCNDRY1;
s_sof_re <= s_sof_d2 and not s_sof_d3;
---------------------------------------------------------------------------
-- Generate Packet EOF
---------------------------------------------------------------------------
-- Sample and hold valid re to create sof
EOF_SMPL_N_HOLD : process(axi_prmry_aclk)
begin
if(axi_prmry_aclk'EVENT and axi_prmry_aclk = '1')then
if(p_reset_n = '0' or p_eof_clr = '1')then
p_eof <= '0';
-- if p_last but p_sof not set then it means between pkt
-- gap was too small to catch new sof. therefor do not
-- generate eof
elsif(p_last_re = '1' and p_sof = '0')then
p_eof <= '0';
elsif(p_last_re = '1')then
p_eof <= '1';
end if;
end if;
end process EOF_SMPL_N_HOLD;
-- Register p_sof into secondary clock domain to
-- generate packet_sof and also to clear sample and held p_sof
-- CDC register has to be a pure flop
EOF_REG2SCNDRY : entity lib_cdc_v1_0_2.cdc_sync
generic map (
C_CDC_TYPE => 1,
C_RESET_STATE => 0,
C_SINGLE_BIT => 1,
C_VECTOR_WIDTH => 32,
C_MTBF_STAGES => MTBF_STAGES
)
port map (
prmry_aclk => '0',
prmry_resetn => '0',
prmry_in => p_eof,
prmry_vect_in => (others => '0'),
scndry_aclk => m_axi_sg_aclk,
scndry_resetn => '0',
scndry_out => s_eof_d2,
scndry_vect_out => open
);
EOF_REG2SCNDRY1 : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
-- s_eof_d1_cdc_tig <= '0';
-- s_eof_d2 <= '0';
s_eof_d3 <= '0'; -- CR605883
else
-- s_eof_d1_cdc_tig <= p_eof;
-- s_eof_d2 <= s_eof_d1_cdc_tig;
s_eof_d3 <= s_eof_d2; -- CR605883
end if;
end if;
end process EOF_REG2SCNDRY1;
s_eof_re <= s_eof_d2 and not s_eof_d3;
EOF_latch : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
s_eof_re_latch <= '0';
elsif (s_eof_re = '1') then
s_eof_re_latch <= not s_eof_re_latch;
end if;
end if;
end process EOF_latch;
-- Register s_sof_re back into primary clock domain to use
-- as clear of p_sof.
EOF_REG2PRMRY : entity lib_cdc_v1_0_2.cdc_sync
generic map (
C_CDC_TYPE => 1,
C_RESET_STATE => 0,
C_SINGLE_BIT => 1,
C_VECTOR_WIDTH => 32,
C_MTBF_STAGES => MTBF_STAGES
)
port map (
prmry_aclk => '0',
prmry_resetn => '0',
prmry_in => s_eof_re_latch,
prmry_vect_in => (others => '0'),
scndry_aclk => axi_prmry_aclk,
scndry_resetn => '0',
scndry_out => p_eof_d2,
scndry_vect_out => open
);
EOF_REG2PRMRY1 : process(axi_prmry_aclk)
begin
if(axi_prmry_aclk'EVENT and axi_prmry_aclk = '1')then
if(p_reset_n = '0')then
-- p_eof_d1_cdc_tig <= '0';
-- p_eof_d2 <= '0';
p_eof_d3 <= '0';
else
-- p_eof_d1_cdc_tig <= s_eof_re_latch;
-- p_eof_d2 <= p_eof_d1_cdc_tig;
p_eof_d3 <= p_eof_d2;
end if;
end if;
end process EOF_REG2PRMRY1;
-- p_eof_clr <= p_eof_d2 and not p_eof_d3;-- CR565366
-- drive eof clear for minimum of 2 scndry clocks
-- to guarentee secondary capture. this allows
-- new valid assertions to not be missed in
-- creating next sof.
p_eof_clr <= p_eof_d2 xor p_eof_d3;
end generate GEN_FOR_ASYNC;
-- Generate for when primary clock is synchronous
GEN_FOR_SYNC : if C_PRMRY_IS_ACLK_ASYNC = 0 generate
begin
---------------------------------------------------------------------------
-- Generate Packet EOF and SOF
---------------------------------------------------------------------------
-- Register stream control in to isolate wrt clock
-- for timing closure
REG_STRM_IN : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
s_valid <= '0';
s_last <= '0';
s_ready <= '0';
else
s_valid <= axis_tvalid;
s_last <= axis_tlast ;
s_ready <= axis_tready;
end if;
end if;
end process REG_STRM_IN;
-- Generate rising edge pulse on valid to use for
-- smaple and hold register
REG_FOR_RE : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
s_valid_d1 <= '0';
s_last_d1 <= '0';
else
s_valid_d1 <= s_valid and s_ready;
s_last_d1 <= s_last and s_valid and s_ready;
end if;
end if;
end process REG_FOR_RE;
-- CR565366 investigating delay interurpt issue discovered
-- this coding issue.
-- s_valid_re <= s_ready and s_valid and not s_last_d1;
s_valid_re <= s_ready and s_valid and not s_valid_d1;
s_last_re <= s_ready and s_valid and s_last and not s_last_d1;
-- Sample and hold valid re to create sof
SOF_SMPL_N_HOLD : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(p_reset_n = '0' or s_eof_re = '1')then
s_sof_generated <= '0';
-- new
elsif((s_valid_re = '1')
or (sof_generated_fe = '1' and s_ready = '1' and s_valid = '1'))then
s_sof_generated <= '1';
end if;
end if;
end process SOF_SMPL_N_HOLD;
-- Register p_sof into secondary clock domain to
-- generate packet_sof and also to clear sample and held p_sof
SOF_REG2SCNDRY : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
s_sof_d1_cdc_tig <= '0';
else
s_sof_d1_cdc_tig <= s_sof_generated;
end if;
end if;
end process SOF_REG2SCNDRY;
-- generate falling edge pulse on end of packet for use if
-- need to generate an immediate sof.
sof_generated_fe <= not s_sof_generated and s_sof_d1_cdc_tig;
-- generate SOF on rising edge of valid if not already in a packet OR...
s_sof_re <= '1' when (s_valid_re = '1' and s_sof_generated = '0')
or (sof_generated_fe = '1' -- If end of previous packet
and s_ready = '1' -- and ready asserted
and s_valid = '1') -- and valid asserted
else '0';
-- generate eof on rising edge of valid last assertion OR...
s_eof_re <= '1' when (s_last_re = '1')
or (sof_generated_fe = '1' -- If end of previous packet
and s_ready = '1' -- and ready asserted
and s_valid = '1' -- and valid asserted
and s_last = '1') -- and last asserted
else '0';
end generate GEN_FOR_SYNC;
end implementation;
| mit | 3a396362a6052ba789767aa0d02150ff | 0.443567 | 4.08087 | false | false | false | false |
sergeykhbr/riscv_vhdl | vhdl/rtl/ambalib/defslv.vhd | 1 | 2,934 | --!
--! Copyright 2019 Sergey Khabarov, [email protected]
--!
--! Licensed under the Apache License, Version 2.0 (the "License");
--! you may not use this file except in compliance with the License.
--! You may obtain a copy of the License at
--!
--! http://www.apache.org/licenses/LICENSE-2.0
--!
--! Unless required by applicable law or agreed to in writing, software
--! distributed under the License is distributed on an "AS IS" BASIS,
--! WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
--! See the License for the specific language governing permissions and
--! limitations under the License.
--!
library ieee;
use ieee.std_logic_1164.all;
library commonlib;
use commonlib.types_common.all;
library ambalib;
use ambalib.types_amba4.all;
entity axi4_defslv is
generic (
async_reset : boolean
);
port (
i_clk : in std_logic;
i_nrst : in std_logic;
i_xslvi : in axi4_slave_in_type;
o_xslvo : out axi4_slave_out_type
);
end;
architecture arch_axi4_defslv of axi4_defslv is
type defslv_state_type is (DefSlave_Idle, DefSlave_R, DefSlave_W, DefSlave_B);
type registers_type is record
state : defslv_state_type;
burst_cnt : std_logic_vector(7 downto 0);
end record;
constant R_RESET : registers_type := (DefSlave_Idle, X"00");
signal rin, r : registers_type;
begin
comblogic : process(i_nrst, i_xslvi, r)
variable v : registers_type;
variable vslvo : axi4_slave_out_type;
begin
v := r;
vslvo := axi4_slave_out_none;
vslvo.b_resp := AXI_RESP_DECERR;
vslvo.r_resp := AXI_RESP_DECERR;
case r.state is
when DefSlave_Idle =>
vslvo.ar_ready := '1';
vslvo.aw_ready := '1';
if i_xslvi.aw_valid = '1' then
vslvo.ar_ready := '0';
v.state := DefSlave_W;
v.burst_cnt := i_xslvi.aw_bits.len;
elsif i_xslvi.ar_valid = '1' then
v.state := DefSlave_R;
v.burst_cnt := i_xslvi.ar_bits.len;
end if;
when DefSlave_R =>
vslvo.r_valid := '1';
vslvo.r_data := (others => '1');
if r.burst_cnt = X"00" then
v.state := DefSlave_Idle;
vslvo.r_last := '1';
else
v.burst_cnt := r.burst_cnt - 1;
end if;
when DefSlave_W =>
vslvo.w_ready := '1';
if r.burst_cnt = X"00" then
v.state := DefSlave_B;
else
v.burst_cnt := r.burst_cnt - 1;
end if;
when DefSlave_B =>
vslvo.b_valid := '1';
v.state := DefSlave_Idle;
when others =>
end case;
if not async_reset and i_nrst = '0' then
v := R_RESET;
end if;
rin <= v;
o_xslvo <= vslvo;
end process;
-- registers
regs : process(i_clk, i_nrst)
begin
if async_reset and i_nrst = '0' then
r <= R_RESET;
elsif rising_edge(i_clk) then
r <= rin;
end if;
end process;
end;
| apache-2.0 | 773ea3667ec3b9d2fd4cb39e5eac3ffc | 0.592365 | 3.241989 | false | false | false | false |
sergeykhbr/riscv_vhdl | vhdl/rtl/riverlib/core/arith/divstage64.vhd | 1 | 7,548 | --!
--! Copyright 2019 Sergey Khabarov, [email protected]
--!
--! Licensed under the Apache License, Version 2.0 (the "License");
--! you may not use this file except in compliance with the License.
--! You may obtain a copy of the License at
--!
--! http://www.apache.org/licenses/LICENSE-2.0
--!
--! Unless required by applicable law or agreed to in writing, software
--! distributed under the License is distributed on an "AS IS" BASIS,
--! WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
--! See the License for the specific language governing permissions and
--! limitations under the License.
--!
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_misc.all; -- or_reduce()
library commonlib;
use commonlib.types_common.all;
entity divstage64 is
port (
i_divident : in std_logic_vector(63 downto 0); -- integer value
i_divisor : in std_logic_vector(123 downto 0); -- integer value
o_resid : out std_logic_vector(63 downto 0); -- residual value
o_bits : out std_logic_vector(3 downto 0) -- resulting bits
);
end;
architecture arch_divstage64 of divstage64 is
type thresh_type is array (15 downto 0) of std_logic_vector(65 downto 0);
begin
-- registers:
comb : process(i_divident, i_divisor)
variable wb_thresh : thresh_type;
variable wb_dif : std_logic_vector(63 downto 0);
variable wb_bits : std_logic_vector(3 downto 0);
variable wb_divident : std_logic_vector(64 downto 0);
variable wb_divx1 : std_logic_vector(64 downto 0);
variable wb_divx2 : std_logic_vector(64 downto 0);
variable wb_divx3 : std_logic_vector(64 downto 0);
variable wb_divx4 : std_logic_vector(64 downto 0);
variable wb_divx5 : std_logic_vector(64 downto 0);
variable wb_divx6 : std_logic_vector(64 downto 0);
variable wb_divx7 : std_logic_vector(64 downto 0);
variable wb_divx8 : std_logic_vector(64 downto 0);
variable wb_divx9 : std_logic_vector(64 downto 0);
variable wb_divx10 : std_logic_vector(64 downto 0);
variable wb_divx11 : std_logic_vector(64 downto 0);
variable wb_divx12 : std_logic_vector(64 downto 0);
variable wb_divx13 : std_logic_vector(64 downto 0);
variable wb_divx14 : std_logic_vector(64 downto 0);
variable wb_divx15 : std_logic_vector(64 downto 0);
variable wb_divx16 : std_logic_vector(64 downto 0);
begin
wb_divident := '0' & i_divident;
wb_divx1(63 downto 0) := i_divisor(63 downto 0);
wb_divx1(64) := or_reduce(i_divisor(123 downto 64));
wb_divx2(63 downto 0) := i_divisor(62 downto 0) & '0';
wb_divx2(64) := or_reduce(i_divisor(123 downto 63));
wb_divx3(64 downto 0) := ('0' & wb_divx2(63 downto 0)) + ('0' & wb_divx1(63 downto 0));
wb_divx3(64) := wb_divx3(64) or wb_divx2(64);
wb_divx4(63 downto 0) := i_divisor(61 downto 0) & "00";
wb_divx4(64) := or_reduce(i_divisor(123 downto 62));
wb_divx5(64 downto 0) := ('0' & wb_divx4(63 downto 0)) + ('0' & wb_divx1(63 downto 0));
wb_divx5(64) := wb_divx5(64) or wb_divx4(64);
wb_divx6(63 downto 0) := wb_divx3(62 downto 0) & '0';
wb_divx6(64) := wb_divx3(64) or wb_divx3(63);
wb_divx8(63 downto 0) := wb_divx1(60 downto 0) & "000";
wb_divx8(64) := or_reduce(i_divisor(123 downto 61));
-- 7 = 8 - 1
wb_divx7(64 downto 0) := wb_divx8(64 downto 0) - ('0' & wb_divx1(63 downto 0));
wb_divx7(64) := wb_divx7(64) or or_reduce(i_divisor(123 downto 62));
-- 9 = 8 + 1
wb_divx9(64 downto 0) := ('0' & wb_divx8(63 downto 0)) + ('0' & wb_divx1(63 downto 0));
wb_divx9(64) := wb_divx9(64) or or_reduce(i_divisor(123 downto 61));
-- 10 = 8 + 2
wb_divx10(64 downto 0) := ('0' & wb_divx8(63 downto 0)) + ('0' & wb_divx2(63 downto 0));
wb_divx10(64) := wb_divx10(64) or or_reduce(i_divisor(123 downto 61));
-- 11 = 8 + 3
wb_divx11(64 downto 0) := ('0' & wb_divx8(63 downto 0)) + ('0' & wb_divx3(63 downto 0));
wb_divx11(64) := wb_divx11(64) or or_reduce(i_divisor(123 downto 61));
-- 12 = 3 << 2
wb_divx12(63 downto 0) := wb_divx3(61 downto 0) & "00";
wb_divx12(64) := wb_divx3(64) or wb_divx3(63) or wb_divx3(62);
-- 16 = divisor << 4
wb_divx16(63 downto 0) := wb_divx1(59 downto 0) & "0000";
wb_divx16(64) := or_reduce(i_divisor(123 downto 60));
-- 13 = 16 - 3
wb_divx13(64 downto 0) := wb_divx16(64 downto 0) - ('0' & wb_divx3(63 downto 0));
wb_divx13(64) := wb_divx13(64) or or_reduce(i_divisor(123 downto 61));
-- 14 = 7 << 1
wb_divx14(63 downto 0) := wb_divx7(62 downto 0) & '0';
wb_divx14(64) := wb_divx7(64) or wb_divx7(63);
-- 15 = 16 - 1
wb_divx15(64 downto 0) := wb_divx16(64 downto 0) - ('0' & wb_divx1(63 downto 0));
wb_divx15(64) := wb_divx15(64) or or_reduce(i_divisor(123 downto 61));
wb_thresh(15) := ('0' & wb_divident) - ('0' & wb_divx15);
wb_thresh(14) := ('0' & wb_divident) - ('0' & wb_divx14);
wb_thresh(13) := ('0' & wb_divident) - ('0' & wb_divx13);
wb_thresh(12) := ('0' & wb_divident) - ('0' & wb_divx12);
wb_thresh(11) := ('0' & wb_divident) - ('0' & wb_divx11);
wb_thresh(10) := ('0' & wb_divident) - ('0' & wb_divx10);
wb_thresh(9) := ('0' & wb_divident) - ('0' & wb_divx9);
wb_thresh(8) := ('0' & wb_divident) - ('0' & wb_divx8);
wb_thresh(7) := ('0' & wb_divident) - ('0' & wb_divx7);
wb_thresh(6) := ('0' & wb_divident) - ('0' & wb_divx6);
wb_thresh(5) := ('0' & wb_divident) - ('0' & wb_divx5);
wb_thresh(4) := ('0' & wb_divident) - ('0' & wb_divx4);
wb_thresh(3) := ('0' & wb_divident) - ('0' & wb_divx3);
wb_thresh(2) := ('0' & wb_divident) - ('0' & wb_divx2);
wb_thresh(1) := ('0' & wb_divident) - ('0' & wb_divx1);
wb_thresh(0) := ('0' & wb_divident);
if wb_thresh(15)(65) = '0' then
wb_bits := X"F";
wb_dif := wb_thresh(15)(63 downto 0);
elsif wb_thresh(14)(65) = '0' then
wb_bits := X"E";
wb_dif := wb_thresh(14)(63 downto 0);
elsif wb_thresh(13)(65) = '0' then
wb_bits := X"D";
wb_dif := wb_thresh(13)(63 downto 0);
elsif wb_thresh(12)(65) = '0' then
wb_bits := X"C";
wb_dif := wb_thresh(12)(63 downto 0);
elsif wb_thresh(11)(65) = '0' then
wb_bits := X"B";
wb_dif := wb_thresh(11)(63 downto 0);
elsif wb_thresh(10)(65) = '0' then
wb_bits := X"A";
wb_dif := wb_thresh(10)(63 downto 0);
elsif wb_thresh(9)(65) = '0' then
wb_bits := X"9";
wb_dif := wb_thresh(9)(63 downto 0);
elsif wb_thresh(8)(65) = '0' then
wb_bits := X"8";
wb_dif := wb_thresh(8)(63 downto 0);
elsif wb_thresh(7)(65) = '0' then
wb_bits := X"7";
wb_dif := wb_thresh(7)(63 downto 0);
elsif wb_thresh(6)(65) = '0' then
wb_bits := X"6";
wb_dif := wb_thresh(6)(63 downto 0);
elsif wb_thresh(5)(65) = '0' then
wb_bits := X"5";
wb_dif := wb_thresh(5)(63 downto 0);
elsif wb_thresh(4)(65) = '0' then
wb_bits := X"4";
wb_dif := wb_thresh(4)(63 downto 0);
elsif wb_thresh(3)(65) = '0' then
wb_bits := X"3";
wb_dif := wb_thresh(3)(63 downto 0);
elsif wb_thresh(2)(65) = '0' then
wb_bits := X"2";
wb_dif := wb_thresh(2)(63 downto 0);
elsif wb_thresh(1)(65) = '0' then
wb_bits := X"1";
wb_dif := wb_thresh(1)(63 downto 0);
else
wb_bits := X"0";
wb_dif := wb_thresh(0)(63 downto 0);
end if;
o_bits <= wb_bits;
o_resid <= wb_dif;
end process;
end;
| apache-2.0 | 23a782b9221868bb84bad02d25740882 | 0.576709 | 2.684211 | false | false | false | false |
sergeykhbr/riscv_vhdl | vhdl/rtl/riverlib/core/proc.vhd | 1 | 25,339 | --!
--! Copyright 2019 Sergey Khabarov, [email protected]
--!
--! Licensed under the Apache License, Version 2.0 (the "License");
--! you may not use this file except in compliance with the License.
--! You may obtain a copy of the License at
--!
--! http://www.apache.org/licenses/LICENSE-2.0
--!
--! Unless required by applicable law or agreed to in writing, software
--! distributed under the License is distributed on an "AS IS" BASIS,
--! WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
--! See the License for the specific language governing permissions and
--! limitations under the License.
--!
library ieee;
use ieee.std_logic_1164.all;
library commonlib;
use commonlib.types_common.all;
--! RIVER CPU specific library.
library riverlib;
--! RIVER CPU configuration constants.
use riverlib.river_cfg.all;
entity Processor is
generic (
hartid : integer;
async_reset : boolean;
fpu_ena : boolean;
tracer_ena : boolean
);
port (
i_clk : in std_logic; -- CPU clock
i_nrst : in std_logic; -- Reset. Active LOW.
-- Control path:
i_req_ctrl_ready : in std_logic; -- ICache is ready to accept request
o_req_ctrl_valid : out std_logic; -- Request to ICache is valid
o_req_ctrl_addr : out std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);-- Requesting address to ICache
i_resp_ctrl_valid : in std_logic; -- ICache response is valid
i_resp_ctrl_addr : in std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);-- Response address must be equal to the latest request address
i_resp_ctrl_data : in std_logic_vector(31 downto 0); -- Read value
i_resp_ctrl_load_fault : in std_logic; -- bus response with error
i_resp_ctrl_executable : in std_logic;
o_resp_ctrl_ready : out std_logic;
-- Data path:
i_req_data_ready : in std_logic; -- DCache is ready to accept request
o_req_data_valid : out std_logic; -- Request to DCache is valid
o_req_data_write : out std_logic; -- Read/Write transaction
o_req_data_addr : out std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);-- Requesting address to DCache
o_req_data_wdata : out std_logic_vector(63 downto 0); -- Writing value
o_req_data_wstrb : out std_logic_vector(7 downto 0); -- 8-bytes aligned strobs
i_resp_data_valid : in std_logic; -- DCache response is valid
i_resp_data_addr : in std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);-- DCache response address must be equal to the latest request address
i_resp_data_data : in std_logic_vector(63 downto 0); -- Read value
i_resp_data_store_fault_addr : in std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
i_resp_data_load_fault : in std_logic; -- Bus response with SLVERR or DECERR on read
i_resp_data_store_fault : in std_logic; -- Bus response with SLVERR or DECERR on write
i_resp_data_er_mpu_load : in std_logic;
i_resp_data_er_mpu_store : in std_logic;
o_resp_data_ready : out std_logic;
-- External interrupt pin
i_ext_irq : in std_logic; -- PLIC interrupt accordingly with spec
-- MPU interface
o_mpu_region_we : out std_logic;
o_mpu_region_idx : out std_logic_vector(CFG_MPU_TBL_WIDTH-1 downto 0);
o_mpu_region_addr : out std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
o_mpu_region_mask : out std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
o_mpu_region_flags : out std_logic_vector(CFG_MPU_FL_TOTAL-1 downto 0); -- {ena, cachable, r, w, x}
-- Debug interface:
i_dport_req_valid : in std_logic; -- Debug access from DSU is valid
i_dport_write : in std_logic; -- Write command flag
i_dport_addr : in std_logic_vector(CFG_DPORT_ADDR_BITS-1 downto 0); -- Debug Port address
i_dport_wdata : in std_logic_vector(RISCV_ARCH-1 downto 0);-- Write value
o_dport_req_ready : out std_logic; -- Ready to accept dbg request
i_dport_resp_ready : in std_logic; -- Read to accept response
o_dport_resp_valid : out std_logic; -- Response is valid
o_dport_rdata : out std_logic_vector(RISCV_ARCH-1 downto 0);-- Response value
o_halted : out std_logic;
-- Debug signals:
o_flush_address : out std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);-- Address of instruction to remove from ICache
o_flush_valid : out std_logic; -- Remove address from ICache is valid
o_data_flush_address : out std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0); -- Address of instruction to remove from D$
o_data_flush_valid : out std_logic; -- Remove address from D$ is valid
i_data_flush_end : in std_logic
);
end;
architecture arch_Processor of Processor is
type FetchType is record
req_fire : std_logic;
instr_load_fault : std_logic;
instr_executable : std_logic;
valid : std_logic;
pc : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
instr : std_logic_vector(31 downto 0);
imem_req_valid : std_logic;
imem_req_addr : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
pipeline_hold : std_logic;
end record;
type InstructionDecodeType is record
pc : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
instr : std_logic_vector(31 downto 0);
instr_valid : std_logic;
memop_store : std_logic;
memop_load : std_logic;
memop_sign_ext : std_logic;
memop_size : std_logic_vector(1 downto 0);
rv32 : std_logic; -- 32-bits instruction
compressed : std_logic; -- C-extension
f64 : std_logic; -- D-extension (FPU)
unsigned_op : std_logic; -- Unsigned operands
isa_type : std_logic_vector(ISA_Total-1 downto 0);
instr_vec : std_logic_vector(Instr_Total-1 downto 0);
exception : std_logic;
instr_load_fault : std_logic;
instr_executable : std_logic;
radr1 : std_logic_vector(5 downto 0);
radr2 : std_logic_vector(5 downto 0);
csr_addr : std_logic_vector(11 downto 0);
waddr : std_logic_vector(5 downto 0);
imm : std_logic_vector(RISCV_ARCH-1 downto 0);
progbuf_ena : std_logic;
end record;
type ExecuteType is record
trap_ready : std_logic;
valid : std_logic;
instr : std_logic_vector(31 downto 0);
pc : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
npc : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
ex_npc : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
wena : std_logic;
waddr : std_logic_vector(5 downto 0);
wdata : std_logic_vector(RISCV_ARCH-1 downto 0);
wtag : std_logic_vector(3 downto 0);
whazard : std_logic;
mret : std_logic;
uret : std_logic;
csr_wena : std_logic;
csr_wdata : std_logic_vector(RISCV_ARCH-1 downto 0);
ex_instr_load_fault : std_logic;
ex_instr_not_executable : std_logic;
ex_illegal_instr : std_logic;
ex_unalign_load : std_logic;
ex_unalign_store : std_logic;
ex_breakpoint : std_logic;
ex_ecall : std_logic;
ex_fpu_invalidop : std_logic; -- FPU Exception: invalid operation
ex_fpu_divbyzero : std_logic; -- FPU Exception: divide by zero
ex_fpu_overflow : std_logic; -- FPU Exception: overflow
ex_fpu_underflow : std_logic; -- FPU Exception: underflow
ex_fpu_inexact : std_logic; -- FPU Exception: inexact
fpu_valid : std_logic;
memop_sign_ext : std_logic;
memop_load : std_logic;
memop_store : std_logic;
memop_size : std_logic_vector(1 downto 0);
memop_addr : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
memop_wdata : std_logic_vector(RISCV_ARCH-1 downto 0);
memop_waddr : std_logic_vector(5 downto 0);
memop_wtag : std_logic_vector(3 downto 0);
d_ready : std_logic; -- Hold pipeline from Execution stage
flushd : std_logic;
flushi : std_logic;
call : std_logic;
ret : std_logic;
multi_ready : std_logic;
end record;
type MemoryType is record
memop_ready : std_logic;
flushd : std_logic;
end record;
type WriteBackType is record
wena : std_logic;
waddr : std_logic_vector(5 downto 0);
wdata : std_logic_vector(RISCV_ARCH-1 downto 0);
wtag : std_logic_vector(3 downto 0);
end record;
type IntRegsType is record
rdata1 : std_logic_vector(RISCV_ARCH-1 downto 0);
rhazard1 : std_logic;
rdata2 : std_logic_vector(RISCV_ARCH-1 downto 0);
rhazard2 : std_logic;
wtag : std_logic_vector(3 downto 0);
dport_rdata : std_logic_vector(RISCV_ARCH-1 downto 0);
ra : std_logic_vector(RISCV_ARCH-1 downto 0); -- Return address
sp : std_logic_vector(RISCV_ARCH-1 downto 0); -- Stack pointer
end record;
type CsrType is record
rdata : std_logic_vector(RISCV_ARCH-1 downto 0);
mepc : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
uepc : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
dport_valid : std_logic;
dport_rdata : std_logic_vector(RISCV_ARCH-1 downto 0);
trap_valid : std_logic;
trap_pc : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
progbuf_ena : std_logic; -- execute instruction from progbuf
progbuf_pc : std_logic_vector(31 downto 0); -- progbuf instruction counter
progbuf_data : std_logic_vector(31 downto 0); -- progbuf instruction to execute
flushi_ena : std_logic; -- clear specified addr in ICache without execution of fence.i
flushi_addr : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0); -- ICache address to flush
executed_cnt : std_logic_vector(63 downto 0); -- Number of executed instruction
dbg_pc_write : std_logic; -- modify npc value strob
dbg_pc : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
halt : std_logic;
end record;
--! 5-stages CPU pipeline
type PipelineType is record
f : FetchType; -- Fetch instruction stage
d : InstructionDecodeType; -- Decode instruction stage
e : ExecuteType; -- Execute instruction
m : MemoryType; -- Memory load/store
w : WriteBackType; -- Write back registers value
end record;
type DebugType is record
csr_addr : std_logic_vector(11 downto 0); -- Address of the sub-region register
reg_addr : std_logic_vector(5 downto 0);
core_wdata : std_logic_vector(RISCV_ARCH-1 downto 0);-- Write data
csr_ena : std_logic; -- Region 0: Access to CSR bank is enabled.
csr_write : std_logic; -- Region 0: CSR write enable
ireg_ena : std_logic; -- Region 1: Access to integer register bank is enabled
ireg_write : std_logic; -- Region 1: Integer registers bank write pulse
end record;
type BranchPredictorType is record
npc : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
end record;
signal ireg : IntRegsType;
signal csr : CsrType;
signal w : PipelineType;
signal dbg : DebugType;
signal bp : BranchPredictorType;
signal w_fetch_pipeline_hold : std_logic;
signal w_any_pipeline_hold : std_logic;
signal w_flush_pipeline : std_logic;
signal w_writeback_ready : std_logic;
signal w_reg_wena : std_logic;
signal w_reg_whazard : std_logic;
signal wb_reg_waddr : std_logic_vector(5 downto 0);
signal wb_reg_wdata : std_logic_vector(RISCV_ARCH-1 downto 0);
signal wb_reg_wtag : std_logic_vector(3 downto 0);
begin
w_fetch_pipeline_hold <= not w.e.d_ready or csr.halt;
w_any_pipeline_hold <= w.f.pipeline_hold or not w.e.d_ready or csr.halt;
w_writeback_ready <= not w.e.wena;
w_reg_wena <= w.e.wena when w.e.wena = '1' else w.w.wena;
w_reg_whazard <= w.e.whazard when w.e.wena = '1' else '0';
wb_reg_waddr <= w.e.waddr when w.e.wena = '1' else w.w.waddr;
wb_reg_wdata <= w.e.wdata when w.e.wena = '1' else w.w.wdata;
wb_reg_wtag <= w.e.wtag when w.e.wena = '1' else w.w.wtag;
w_flush_pipeline <= w.e.flushi or w.e.ex_breakpoint or csr.flushi_ena;
o_flush_valid <= w_flush_pipeline;
o_flush_address <= (others => '1') when w.e.flushi = '1'
else w.e.npc when w.e.ex_breakpoint = '1'
else csr.flushi_addr;
o_data_flush_address <= (others => '1');
o_data_flush_valid <= w.m.flushd;
o_req_ctrl_valid <= w.f.imem_req_valid;
o_req_ctrl_addr <= w.f.imem_req_addr;
o_halted <= csr.halt;
fetch0 : InstrFetch generic map (
async_reset => async_reset
) port map (
i_clk => i_clk,
i_nrst => i_nrst,
i_pipeline_hold => w_fetch_pipeline_hold,
i_mem_req_ready => i_req_ctrl_ready,
o_mem_addr_valid => w.f.imem_req_valid,
o_mem_addr => w.f.imem_req_addr,
i_mem_data_valid => i_resp_ctrl_valid,
i_mem_data_addr => i_resp_ctrl_addr,
i_mem_data => i_resp_ctrl_data,
i_mem_load_fault => i_resp_ctrl_load_fault,
i_mem_executable => i_resp_ctrl_executable,
o_mem_resp_ready => o_resp_ctrl_ready,
i_flush_pipeline => w_flush_pipeline,
i_progbuf_ena => csr.progbuf_ena,
i_progbuf_pc => csr.progbuf_pc,
i_progbuf_data => csr.progbuf_data,
i_predict_npc => bp.npc,
o_mem_req_fire => w.f.req_fire,
o_instr_load_fault => w.f.instr_load_fault,
o_instr_executable => w.f.instr_executable,
o_valid => w.f.valid,
o_pc => w.f.pc,
o_instr => w.f.instr,
o_hold => w.f.pipeline_hold);
dec0 : InstrDecoder generic map (
async_reset => async_reset,
fpu_ena => fpu_ena
) port map (
i_clk => i_clk,
i_nrst => i_nrst,
i_any_hold => w_any_pipeline_hold,
i_f_valid => w.f.valid,
i_f_pc => w.f.pc,
i_f_instr => w.f.instr,
i_instr_load_fault => w.f.instr_load_fault,
i_instr_executable => w.f.instr_executable,
o_radr1 => w.d.radr1,
o_radr2 => w.d.radr2,
o_waddr => w.d.waddr,
o_csr_addr => w.d.csr_addr,
o_imm => w.d.imm,
i_e_ready => w.e.d_ready,
i_flush_pipeline => w_flush_pipeline,
i_progbuf_ena => csr.progbuf_ena,
o_valid => w.d.instr_valid,
o_pc => w.d.pc,
o_instr => w.d.instr,
o_memop_store => w.d.memop_store,
o_memop_load => w.d.memop_load,
o_memop_sign_ext => w.d.memop_sign_ext,
o_memop_size => w.d.memop_size,
o_unsigned_op => w.d.unsigned_op,
o_rv32 => w.d.rv32,
o_compressed => w.d.compressed,
o_f64 => w.d.f64,
o_isa_type => w.d.isa_type,
o_instr_vec => w.d.instr_vec,
o_exception => w.d.exception,
o_instr_load_fault => w.d.instr_load_fault,
o_instr_executable => w.d.instr_executable,
o_progbuf_ena => w.d.progbuf_ena);
exec0 : InstrExecute generic map (
async_reset => async_reset,
fpu_ena => fpu_ena
) port map (
i_clk => i_clk,
i_nrst => i_nrst,
i_d_valid => w.d.instr_valid,
i_d_pc => w.d.pc,
i_d_progbuf_ena => w.d.progbuf_ena,
i_dbg_progbuf_ena => csr.progbuf_ena,
i_d_instr => w.d.instr,
i_d_radr1 => w.d.radr1,
i_d_radr2 => w.d.radr2,
i_d_waddr => w.d.waddr,
i_d_imm => w.d.imm,
i_wb_waddr => w.w.waddr,
i_memop_store => w.d.memop_store,
i_memop_load => w.d.memop_load,
i_memop_sign_ext => w.d.memop_sign_ext,
i_memop_size => w.d.memop_size,
i_unsigned_op => w.d.unsigned_op,
i_rv32 => w.d.rv32,
i_compressed => w.d.compressed,
i_f64 => w.d.f64,
i_isa_type => w.d.isa_type,
i_ivec => w.d.instr_vec,
i_unsup_exception => w.d.exception,
i_instr_load_fault => w.d.instr_load_fault,
i_instr_executable => w.d.instr_executable,
i_dport_npc_write => csr.dbg_pc_write,
i_dport_npc => csr.dbg_pc,
i_rdata1 => ireg.rdata1,
i_rhazard1 => ireg.rhazard1,
i_rdata2 => ireg.rdata2,
i_rhazard2 => ireg.rhazard2,
i_wtag => ireg.wtag,
o_wena => w.e.wena,
o_waddr => w.e.waddr,
o_whazard => w.e.whazard,
o_wdata => w.e.wdata,
o_wtag => w.e.wtag,
o_d_ready => w.e.d_ready,
o_csr_wena => w.e.csr_wena,
i_csr_rdata => csr.rdata,
o_csr_wdata => w.e.csr_wdata,
i_mepc => csr.mepc,
i_uepc => csr.uepc,
i_trap_valid => csr.trap_valid,
i_trap_pc => csr.trap_pc,
o_ex_npc => w.e.ex_npc,
o_ex_instr_load_fault => w.e.ex_instr_load_fault,
o_ex_instr_not_executable => w.e.ex_instr_not_executable,
o_ex_illegal_instr => w.e.ex_illegal_instr,
o_ex_unalign_store => w.e.ex_unalign_store,
o_ex_unalign_load => w.e.ex_unalign_load,
o_ex_breakpoint => w.e.ex_breakpoint,
o_ex_ecall => w.e.ex_ecall,
o_ex_fpu_invalidop => w.e.ex_fpu_invalidop,
o_ex_fpu_divbyzero => w.e.ex_fpu_divbyzero,
o_ex_fpu_overflow => w.e.ex_fpu_overflow,
o_ex_fpu_underflow => w.e.ex_fpu_underflow,
o_ex_fpu_inexact => w.e.ex_fpu_inexact,
o_fpu_valid => w.e.fpu_valid,
o_memop_sign_ext => w.e.memop_sign_ext,
o_memop_load => w.e.memop_load,
o_memop_store => w.e.memop_store,
o_memop_size => w.e.memop_size,
o_memop_addr => w.e.memop_addr,
o_memop_wdata => w.e.memop_wdata,
o_memop_waddr => w.e.memop_waddr,
o_memop_wtag => w.e.memop_wtag,
i_memop_ready => w.m.memop_ready,
o_trap_ready => w.e.trap_ready,
o_valid => w.e.valid,
o_pc => w.e.pc,
o_npc => w.e.npc,
o_instr => w.e.instr,
i_flushd_end => i_data_flush_end,
o_flushd => w.e.flushd,
o_flushi => w.e.flushi,
o_call => w.e.call,
o_ret => w.e.ret,
o_mret => w.e.mret,
o_uret => w.e.uret,
o_multi_ready => w.e.multi_ready);
mem0 : MemAccess generic map (
async_reset => async_reset
) port map (
i_clk => i_clk,
i_nrst => i_nrst,
i_e_valid => w.e.valid,
i_e_pc => w.e.pc,
i_e_instr => w.e.instr,
i_e_flushd => w.e.flushd,
o_flushd => w.m.flushd,
i_memop_waddr => w.e.memop_waddr,
i_memop_wtag => w.e.memop_wtag,
i_memop_wdata => w.e.memop_wdata,
i_memop_sign_ext => w.e.memop_sign_ext,
i_memop_load => w.e.memop_load,
i_memop_store => w.e.memop_store,
i_memop_size => w.e.memop_size,
i_memop_addr => w.e.memop_addr,
o_memop_ready => w.m.memop_ready,
o_wb_wena => w.w.wena,
o_wb_waddr => w.w.waddr,
o_wb_wdata => w.w.wdata,
o_wb_wtag => w.w.wtag,
i_wb_ready => w_writeback_ready,
i_mem_req_ready => i_req_data_ready,
o_mem_valid => o_req_data_valid,
o_mem_write => o_req_data_write,
o_mem_addr => o_req_data_addr,
o_mem_wdata => o_req_data_wdata,
o_mem_wstrb => o_req_data_wstrb,
i_mem_data_valid => i_resp_data_valid,
i_mem_data_addr => i_resp_data_addr,
i_mem_data => i_resp_data_data,
o_mem_resp_ready => o_resp_data_ready);
predic0 : BranchPredictor generic map (
async_reset => async_reset
) port map (
i_clk => i_clk,
i_nrst => i_nrst,
i_req_mem_fire => w.f.req_fire,
i_resp_mem_valid => i_resp_ctrl_valid,
i_resp_mem_addr => i_resp_ctrl_addr,
i_resp_mem_data => i_resp_ctrl_data,
i_e_npc => w.e.npc,
i_ra => ireg.ra,
o_npc_predict => bp.npc);
iregs0 : RegBank generic map (
async_reset => async_reset,
fpu_ena => fpu_ena
) port map (
i_clk => i_clk,
i_nrst => i_nrst,
i_radr1 => w.d.radr1,
o_rdata1 => ireg.rdata1,
o_rhazard1 => ireg.rhazard1,
i_radr2 => w.d.radr2,
o_rdata2 => ireg.rdata2,
o_rhazard2 => ireg.rhazard2,
i_waddr => wb_reg_waddr,
i_wena => w_reg_wena,
i_whazard => w_reg_whazard,
i_wtag => wb_reg_wtag,
i_wdata => wb_reg_wdata,
o_wtag => ireg.wtag,
i_dport_addr => dbg.reg_addr,
i_dport_ena => dbg.ireg_ena,
i_dport_write => dbg.ireg_write,
i_dport_wdata => dbg.core_wdata,
o_dport_rdata => ireg.dport_rdata,
o_ra => ireg.ra, -- Return address
o_sp => ireg.sp);
csr0 : CsrRegs generic map (
hartid => hartid,
async_reset => async_reset
) port map (
i_clk => i_clk,
i_nrst => i_nrst,
i_mret => w.e.mret,
i_uret => w.e.uret,
i_sp => ireg.sp,
i_addr => w.d.csr_addr,
i_wena => w.e.csr_wena,
i_wdata => w.e.csr_wdata,
o_rdata => csr.rdata,
o_mepc => csr.mepc,
o_uepc => csr.uepc,
i_trap_ready => w.e.trap_ready,
i_e_pc => w.e.pc,
i_e_npc => w.e.npc,
i_ex_npc => w.e.ex_npc,
i_ex_data_addr => i_resp_data_addr,
i_ex_data_load_fault => i_resp_data_load_fault,
i_ex_data_store_fault => i_resp_data_store_fault,
i_ex_data_store_fault_addr => i_resp_data_store_fault_addr,
i_ex_instr_load_fault => w.e.ex_instr_load_fault,
i_ex_illegal_instr => w.e.ex_illegal_instr,
i_ex_unalign_store => w.e.ex_unalign_store,
i_ex_unalign_load => w.e.ex_unalign_load,
i_ex_mpu_store => i_resp_data_er_mpu_store,
i_ex_mpu_load => i_resp_data_er_mpu_load,
i_ex_breakpoint => w.e.ex_breakpoint,
i_ex_ecall => w.e.ex_ecall,
i_ex_fpu_invalidop => w.e.ex_fpu_invalidop,
i_ex_fpu_divbyzero => w.e.ex_fpu_divbyzero,
i_ex_fpu_overflow => w.e.ex_fpu_overflow,
i_ex_fpu_underflow => w.e.ex_fpu_underflow,
i_ex_fpu_inexact => w.e.ex_fpu_inexact,
i_fpu_valid => w.e.fpu_valid,
i_irq_external => i_ext_irq,
i_e_next_ready => w.e.trap_ready,
i_e_valid => w.e.valid,
o_executed_cnt => csr.executed_cnt,
o_trap_valid => csr.trap_valid,
o_trap_pc => csr.trap_pc,
o_dbg_pc_write => csr.dbg_pc_write,
o_dbg_pc => csr.dbg_pc,
o_progbuf_ena => csr.progbuf_ena,
o_progbuf_pc => csr.progbuf_pc,
o_progbuf_data => csr.progbuf_data,
o_flushi_ena => csr.flushi_ena,
o_flushi_addr => csr.flushi_addr,
o_mpu_region_we => o_mpu_region_we,
o_mpu_region_idx => o_mpu_region_idx,
o_mpu_region_addr => o_mpu_region_addr,
o_mpu_region_mask => o_mpu_region_mask,
o_mpu_region_flags => o_mpu_region_flags,
i_dport_ena => dbg.csr_ena,
i_dport_write => dbg.csr_write,
i_dport_addr => dbg.csr_addr,
i_dport_wdata => dbg.core_wdata,
o_dport_valid => csr.dport_valid,
o_dport_rdata => csr.dport_rdata,
o_halt => csr.halt);
dbg0 : DbgPort generic map (
async_reset => async_reset
) port map (
i_clk => i_clk,
i_nrst => i_nrst,
i_dport_req_valid => i_dport_req_valid,
i_dport_write => i_dport_write,
i_dport_addr => i_dport_addr,
i_dport_wdata => i_dport_wdata,
o_dport_req_ready => o_dport_req_ready,
i_dport_resp_ready => i_dport_resp_ready,
o_dport_resp_valid => o_dport_resp_valid,
o_dport_rdata => o_dport_rdata,
o_csr_addr => dbg.csr_addr,
o_reg_addr => dbg.reg_addr,
o_core_wdata => dbg.core_wdata,
o_csr_ena => dbg.csr_ena,
o_csr_write => dbg.csr_write,
i_csr_valid => csr.dport_valid,
i_csr_rdata => csr.dport_rdata,
o_ireg_ena => dbg.ireg_ena,
o_ireg_write => dbg.ireg_write,
i_ireg_rdata => ireg.dport_rdata,
i_pc => w.e.pc,
i_npc => w.e.npc,
i_e_call => w.e.call,
i_e_ret => w.e.ret);
end;
| apache-2.0 | 71ba91f4b8ca7bb57a6328edfa9f8c2c | 0.553534 | 3.129817 | false | false | false | false |
sergeykhbr/riscv_vhdl | vhdl/rtl/riverlib/dsu/dmi_regs.vhd | 1 | 22,910 | --!
--! Copyright 2018 Sergey Khabarov, [email protected]
--!
--! Licensed under the Apache License, Version 2.0 (the "License");
--! you may not use this file except in compliance with the License.
--! You may obtain a copy of the License at
--!
--! http://www.apache.org/licenses/LICENSE-2.0
--!
--! Unless required by applicable law or agreed to in writing, software
--! distributed under the License is distributed on an "AS IS" BASIS,
--! WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
--! See the License for the specific language governing permissions and
--! limitations under the License.
--!
--! @brief Access to debug port of CPUs through the DMI registers.
-----------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_misc.all; -- or_reduce()
use ieee.numeric_std.all;
library commonlib;
use commonlib.types_common.all;
library ambalib;
use ambalib.types_amba4.all;
library riverlib;
use riverlib.river_cfg.all;
use riverlib.types_river.all;
entity dmi_regs is
generic (
async_reset : boolean := false;
cpu_available : integer := 1
);
port
(
clk : in std_logic;
nrst : in std_logic;
-- port[0] connected to JTAG TAP has access to AXI master interface (SBA registers)
i_dmi_jtag_req_valid : in std_logic;
o_dmi_jtag_req_ready : out std_logic;
i_dmi_jtag_write : in std_logic;
i_dmi_jtag_addr : in std_logic_vector(6 downto 0);
i_dmi_jtag_wdata : in std_logic_vector(31 downto 0);
o_dmi_jtag_resp_valid : out std_logic;
i_dmi_jtag_resp_ready : in std_logic;
o_dmi_jtag_rdata : out std_logic_vector(31 downto 0);
-- port[1] connected to DSU doesn't have access to AXI master interface
i_dmi_dsu_req_valid : in std_logic;
o_dmi_dsu_req_ready : out std_logic;
i_dmi_dsu_write : in std_logic;
i_dmi_dsu_addr : in std_logic_vector(6 downto 0);
i_dmi_dsu_wdata : in std_logic_vector(31 downto 0);
o_dmi_dsu_resp_valid : out std_logic;
i_dmi_dsu_resp_ready : in std_logic;
o_dmi_dsu_rdata : out std_logic_vector(31 downto 0);
-- Common signals
o_hartsel : out std_logic_vector(CFG_LOG2_CPU_MAX-1 downto 0);
o_dmstat : out std_logic_vector(1 downto 0);
o_ndmreset : out std_logic; -- non-debug module reset
o_cfg : out axi4_master_config_type;
i_xmsti : in axi4_master_in_type;
o_xmsto : out axi4_master_out_type;
o_dporti : out dport_in_vector;
i_dporto : in dport_out_vector
);
end;
architecture arch_dmi_regs of dmi_regs is
constant xconfig : axi4_master_config_type := (
descrtype => PNP_CFG_TYPE_MASTER,
descrsize => PNP_CFG_MASTER_DESCR_BYTES,
vid => VENDOR_GNSSSENSOR,
did => RISCV_RIVER_DMI
);
constant HARTSELLEN : integer := CFG_LOG2_CPU_MAX;
constant HART_AVAILABLE_MASK : std_logic_vector(HARTSELLEN-1 downto 0) :=
conv_std_logic_vector(2**log2(cpu_available) - 1, HARTSELLEN);
type state_type is (
Idle,
DmiRequest,
AbstractCommand,
DportRequest,
DportResponse,
DportPostexec,
DportBroadbandRequest,
DportBroadbandResponse,
Dma_AR,
Dma_R,
Dma_AW,
Dma_W,
Dma_B,
DmiResponse
);
type registers is record
state : state_type;
dmstat : std_logic_vector(1 downto 0);
hartsel : std_logic_vector(HARTSELLEN-1 downto 0);
ndmreset : std_logic; -- non-debug module reset
resumeack : std_logic;
halt_after_reset : std_logic;
addr : std_logic_vector(CFG_DPORT_ADDR_BITS-1 downto 0);
rdata : std_logic_vector(63 downto 0);
wdata : std_logic_vector(63 downto 0);
wstrb : std_logic_vector(7 downto 0);
memdata : std_logic_vector(63 downto 0);
arg0 : std_logic_vector(63 downto 0);
command : std_logic_vector(31 downto 0);
autoexecdata : std_logic_vector(CFG_DATA_REG_TOTAL-1 downto 0);
autoexecprogbuf : std_logic_vector(CFG_PROGBUF_REG_TOTAL-1 downto 0);
transfer : std_logic;
write : std_logic;
postexec : std_logic;
jtag_dsu : std_logic;
broadband_req : std_logic_vector(CFG_TOTAL_CPU_MAX-1 downto 0);
sberror : std_logic_vector(2 downto 0);
sbreadonaddr : std_logic;
sbaccess : std_logic_vector(2 downto 0);
sbautoincrement : std_logic;
sbreadondata : std_logic;
sbaddress : std_logic_vector(63 downto 0);
end record;
constant R_RESET : registers := (
Idle, -- state
"00", -- dmstat
(others => '0'), -- hartsel
'0', -- ndmreset
'0', -- resumeack
'0', -- halt_after_reset
(others => '0'), -- addr
(others => '0'), -- rdata
(others => '0'), -- wdata
(others => '0'), -- wstrb
(others => '0'), -- memdata
(others => '0'), -- arg0
(others => '0'), -- command
(others => '0'), -- autoexecdata
(others => '0'), -- autoexecprogbuf
'0', -- transfer
'0', -- write
'0', -- postexec
'0', -- jtag_dsu
(others => '0'), -- broadband_req
(others => '0'), -- sberror
'0', -- sbreadonaddr
(others => '0'), -- sbaccess
'0', -- sbautoincrement
'0', -- sbreadondata
(others => '0') -- sbaddress
);
constant h004_DATA0 : std_logic_vector(11 downto 0) := X"004";
constant h005_DATA1 : std_logic_vector(11 downto 0) := X"005";
constant h010_DMCONTROL : std_logic_vector(11 downto 0) := X"010";
constant h011_DMSTATUS : std_logic_vector(11 downto 0) := X"011";
constant h016_ABSTRACTCS : std_logic_vector(11 downto 0) := X"016";
constant h017_COMMAND : std_logic_vector(11 downto 0) := X"017";
constant h018_ABSTRACTAUTO : std_logic_vector(11 downto 0) := X"018";
constant h02n_PROGBUFn : std_logic_vector(11 downto 0) := X"020";
constant h038_SBCS : std_logic_vector(11 downto 0) := X"038";
constant h039_SBADDRESS0 : std_logic_vector(11 downto 0) := X"039";
constant h03A_SBADDRESS1 : std_logic_vector(11 downto 0) := X"03A";
constant h03C_SBDATA0 : std_logic_vector(11 downto 0) := X"03C";
constant h03D_SBDATA1 : std_logic_vector(11 downto 0) := X"03D";
constant h040_HALTSUM0 : std_logic_vector(11 downto 0) := X"040";
signal r, rin: registers;
begin
comblogic : process(nrst,
i_dmi_jtag_req_valid, i_dmi_jtag_write, i_dmi_jtag_addr, i_dmi_jtag_wdata, i_dmi_jtag_resp_ready,
i_dmi_dsu_req_valid, i_dmi_dsu_write, i_dmi_dsu_addr, i_dmi_dsu_wdata, i_dmi_dsu_resp_ready,
i_xmsti, i_dporto, r)
variable v : registers;
variable v_dmi_jtag_req_ready : std_logic;
variable v_dmi_dsu_req_ready : std_logic;
variable v_dmi_jtag_resp_valid : std_logic;
variable v_dmi_dsu_resp_valid : std_logic;
variable vdporti : dport_in_vector;
variable v_ar_valid : std_logic;
variable v_aw_valid : std_logic;
variable v_w_valid : std_logic;
variable vxmsto : axi4_master_out_type;
variable hsel : integer range 0 to CFG_TOTAL_CPU_MAX-1;
variable v_axi_ready : std_logic;
variable vb_haltsum : std_logic_vector(CFG_TOTAL_CPU_MAX-1 downto 0);
variable sbaidx3 : integer range 0 to 7;
variable sbaidx2 : integer range 0 to 3;
variable sbaidx1 : integer range 0 to 1;
begin
v := r;
v_dmi_jtag_req_ready := '0';
v_dmi_dsu_req_ready := '0';
v_dmi_jtag_resp_valid := '0';
v_dmi_dsu_resp_valid := '0';
vdporti := (others => dport_in_none);
vxmsto := axi4_master_out_none;
v_ar_valid := '0';
v_aw_valid := '0';
v_w_valid := '0';
hsel := conv_integer(r.hartsel);
sbaidx3 := conv_integer(r.sbaddress(2 downto 0));
sbaidx2 := conv_integer(r.sbaddress(2 downto 1));
sbaidx1 := conv_integer(r.sbaddress(2 downto 2));
for n in 0 to CFG_TOTAL_CPU_MAX-1 loop
vb_haltsum(n) := i_dporto(n).halted;
end loop;
case r.state is
when Idle =>
v.addr := (others => '0');
v.wdata := (others => '0');
v.rdata := (others => '0');
v.transfer := '0';
v.postexec := '0';
if i_dmi_jtag_req_valid = '1' then
v.jtag_dsu := '0';
v_dmi_jtag_req_ready := '1';
v.write := i_dmi_jtag_write;
v.addr(6 downto 0) := i_dmi_jtag_addr;
v.wdata(31 downto 0) := i_dmi_jtag_wdata;
v.state := DmiRequest;
elsif i_dmi_dsu_req_valid = '1' then
v.jtag_dsu := '1';
v_dmi_dsu_req_ready := '1';
v.write := i_dmi_dsu_write;
v.addr(6 downto 0) := i_dmi_dsu_addr;
v.wdata(31 downto 0) := i_dmi_dsu_wdata;
v.state := DmiRequest;
end if;
when DmiRequest =>
v.state := DmiResponse; -- default no dport transfer
if r.addr(11 downto 0) = h004_DATA0 then
v.rdata(31 downto 0) := r.arg0(31 downto 0);
if r.write = '1' then
v.arg0(31 downto 0) := r.wdata(31 downto 0);
end if;
if r.autoexecdata(0) = '1'then
v.state := AbstractCommand;
end if;
elsif r.addr(11 downto 0) = h005_DATA1 then
v.rdata(31 downto 0) := r.arg0(63 downto 32);
if r.write = '1' then
v.arg0(63 downto 32) := r.wdata(31 downto 0);
end if;
if r.autoexecdata(1) = '1' then
v.state := AbstractCommand;
end if;
elsif r.addr(11 downto 0) = h010_DMCONTROL then
v.rdata(16+HARTSELLEN-1 downto 16) := r.hartsel;
v.rdata(1) := r.ndmreset;
v.rdata(0) := '1'; -- dmactive: 1=module functional normally
if r.write = '1' then
-- Access to CSR only on writing
v.hartsel := r.wdata(16+HARTSELLEN-1 downto 16) and HART_AVAILABLE_MASK; -- hartsello
v.ndmreset := r.wdata(1); -- ndmreset
v.resumeack := not r.wdata(31) and r.wdata(30) and i_dporto(conv_integer(v.hartsel)).halted;
if r.ndmreset = '1' and r.wdata(1) = '0' and r.halt_after_reset = '1' then
v.state := DportRequest;
v.addr(13 downto 0) := "00" & CSR_runcontrol;
v.wdata := (others => '0');
v.wdata(31) := '1'; -- haltreq:
elsif r.wdata(1) = '1' then -- ndmreset
-- do not make DPort request the CPU will be resetted and cannot respond
v.halt_after_reset := r.wdata(31); -- haltreq
elsif (r.wdata(31) or r.wdata(30)) = '1' then
v.state := DportRequest;
v.addr(13 downto 0) := "00" & CSR_runcontrol;
end if;
end if;
elsif r.addr(11 downto 0) = h011_DMSTATUS then
v.rdata(17) := r.resumeack; -- allresumeack
v.rdata(16) := r.resumeack; -- anyresumeack
v.rdata(15) := not i_dporto(hsel).available; -- allnonexistent
v.rdata(14) := not i_dporto(hsel).available; -- anynonexistent
v.rdata(13) := not i_dporto(hsel).available; -- allunavail
v.rdata(12) := not i_dporto(hsel).available; -- anyunavail
v.rdata(11) := not i_dporto(hsel).halted and i_dporto(hsel).available; -- allrunning:
v.rdata(10) := not i_dporto(hsel).halted and i_dporto(hsel).available; -- anyrunning:
v.rdata(9) := i_dporto(hsel).halted and i_dporto(hsel).available; -- allhalted:
v.rdata(8) := i_dporto(hsel).halted and i_dporto(hsel).available; -- anyhalted:
v.rdata(7) := '1'; -- authenticated:
v.rdata(3 downto 0) := X"2"; -- version: dbg spec v0.13
elsif r.addr(11 downto 0) = h016_ABSTRACTCS then
v.state := DportRequest;
v.addr(13 downto 0) := "00" & CSR_abstractcs;
elsif r.addr(11 downto 0) = h017_COMMAND then
if r.write = '1' then
v.command := r.wdata(31 downto 0); -- original value for auto repeat
v.state := AbstractCommand;
end if;
elsif r.addr(11 downto 0) = h018_ABSTRACTAUTO then
v.rdata(CFG_DATA_REG_TOTAL-1 downto 0) := r.autoexecdata;
v.rdata(16+CFG_PROGBUF_REG_TOTAL-1 downto 16) := r.autoexecprogbuf;
if r.write = '1' then
v.autoexecdata := r.wdata(CFG_DATA_REG_TOTAL-1 downto 0);
v.autoexecprogbuf := r.wdata(16+CFG_PROGBUF_REG_TOTAL-1 downto 16);
end if;
elsif r.addr(11 downto 4) = h02n_PROGBUFn(11 downto 4) then -- PROGBUF0..PROGBUF15
v.addr(13 downto 0) := "00" & CSR_progbuf;
v.wdata(35 downto 32) := r.addr(3 downto 0);
v.broadband_req := (others => '1'); -- to all Harts
v.state := DportBroadbandRequest;
elsif r.addr(11 downto 0) = h038_SBCS then
v.rdata(31 downto 29) := "001"; -- sbversion: 1=current spec
if (r.state = Dma_AR) or (r.state = Dma_R)
or (r.state = Dma_AW) or (r.state = Dma_W) or (r.state = Dma_B) then
v.rdata(21) := '1'; -- sbbusy
end if;
v.rdata(20) := r.sbreadonaddr; -- when 1 auto-read on write to sbaddress0
v.rdata(19 downto 17) := r.sbaccess; -- 2=32; 3=64 bits
v.rdata(16) := r.sbautoincrement; -- increment after each system access
v.rdata(15) := r.sbreadondata; -- when 1 every auto-read on read from sbdata0
v.rdata(14 downto 12) := r.sberror; -- 1=timeout; 2=bad address; 3=unalignment;4=wrong size
v.rdata(11 downto 5) := conv_std_logic_vector(64,7); -- system bus width in bits
v.rdata(3) := '1'; -- sbaccess64 - supported 64-bit access
v.rdata(2) := '1'; -- sbaccess32 - supported 32-bit access
v.rdata(1) := '1'; -- sbaccess16 - supported 16-bit access
v.rdata(0) := '1'; -- sbaccess8 - supported 8-bit access
if r.write = '1' then
v.sbreadonaddr := r.wdata(20);
v.sbaccess := r.wdata(19 downto 17);
v.sbautoincrement := r.wdata(16);
v.sbreadondata := r.wdata(15);
if r.wdata(12) = '1' then
v.sberror := (others => '0');
end if;
end if;
elsif r.addr(11 downto 0) = h039_SBADDRESS0 then
v.rdata(31 downto 0) := r.sbaddress(31 downto 0);
if r.write = '1' then
v.sbaddress(31 downto 0) := r.wdata(31 downto 0);
if r.sbreadonaddr = '1' then
v.state := Dma_AR;
end if;
end if;
elsif r.addr(11 downto 0) = h03A_SBADDRESS1 then
v.rdata(31 downto 0) := r.sbaddress(63 downto 32);
if r.write = '1' then
v.sbaddress(63 downto 32) := r.wdata(31 downto 0);
end if;
elsif r.addr(11 downto 0) = h03C_SBDATA0 then
v.rdata(31 downto 0) := r.memdata(31 downto 0);
if r.write = '0' then
v.state := Dma_AR;
else
v.state := Dma_AW;
v.memdata := (others => '0');
v.wstrb := (others => '0');
case r.sbaccess is
when "000" => -- 8-bits access
v.memdata(8*sbaidx3+7 downto 8*sbaidx3) := r.wdata(7 downto 0);
v.wstrb(sbaidx3) := '1';
when "001" => -- 16-bits access
v.memdata(16*sbaidx2+15 downto 16*sbaidx2) := r.wdata(15 downto 0);
v.wstrb(2*sbaidx2+1 downto 2*sbaidx2) := "11";
when "010" => -- 32-bits access
v.memdata(32*sbaidx1+31 downto 32*sbaidx1) := r.wdata(31 downto 0);
v.wstrb(4*sbaidx1+3 downto 4*sbaidx1) := X"F";
when others =>
v.memdata := r.wdata;
v.wstrb := X"FF";
end case;
end if;
elsif r.addr(11 downto 0) = h03D_SBDATA1 then
v.rdata(31 downto 0) := r.memdata(63 downto 32);
if r.write = '0' then
v.memdata(63 downto 32) := r.wdata(31 downto 0);
end if;
elsif r.addr(11 downto 0) = h040_HALTSUM0 then
v.rdata(CFG_TOTAL_CPU_MAX-1 downto 0) := vb_haltsum;
end if;
when AbstractCommand =>
v.state := DmiResponse; -- no transfer or not implemented command type
if r.command(31 downto 24) = X"00" then -- cmdtype: 0=register access
v.wdata := r.arg0;
v.addr(13 downto 0) := r.command(13 downto 0); -- regno:
v.write := r.command(16); -- write:
v.transfer := r.command(17); -- transfer
v.postexec := r.command(18); -- postexec:
if r.command(19) = '1' then -- aarpostincrement
v.command(13 downto 0) := r.command(13 downto 0) + 1;
end if;
if r.command(16) = '0' or r.command(17) = '1' then
-- read operation or write with transfer
v.state := DportRequest;
end if;
end if;
when DportRequest =>
vdporti(hsel).req_valid := '1';
vdporti(hsel).addr := r.addr;
vdporti(hsel).write := r.write;
vdporti(hsel).wdata := r.wdata;
if i_dporto(hsel).req_ready = '1' then
v.state := DportResponse;
end if;
when DportResponse =>
vdporti(hsel).resp_ready := '1';
if i_dporto(hsel).resp_valid = '1' then
v.state := DmiResponse;
v.rdata := i_dporto(hsel).rdata;
if r.write = '0' and r.transfer = '1' then
v.arg0 := i_dporto(hsel).rdata;
end if;
if r.postexec = '1' then
v.state := DportPostexec;
end if;
end if;
when DportPostexec =>
v.write := '1';
v.postexec := '0';
v.transfer := '0';
v.addr(13 downto 0) := "00" & CSR_runcontrol;
v.wdata := (others => '0');
v.wdata(27) := '1'; -- req_progbuf: request to execute progbuf
v.state := DportRequest;
when DportBroadbandRequest =>
for i in 0 to CFG_TOTAL_CPU_MAX-1 loop
vdporti(i).req_valid := r.broadband_req(i);
vdporti(i).wdata := r.wdata;
vdporti(i).addr := r.addr;
vdporti(i).write := r.write;
if i_dporto(i).req_ready = '1' then
v.broadband_req(i) := '0';
end if;
end loop;
if or_reduce(r.broadband_req) = '0' then
v.broadband_req := (others => '1');
v.state := DportBroadbandResponse;
end if;
when DportBroadbandResponse =>
for i in 0 to CFG_TOTAL_CPU_MAX-1 loop
vdporti(i).resp_ready := r.broadband_req(i);
if i_dporto(i).resp_valid = '1' then
v.broadband_req(i) := '0';
end if;
end loop;
if or_reduce(r.broadband_req) = '0' then
if r.postexec = '1' then
v.state := DportPostexec;
else
v.state := DmiResponse;
end if;
end if;
when Dma_AR =>
v_ar_valid := '1';
if i_xmsti.ar_ready = '1' then
v.state := Dma_R;
end if;
when Dma_R =>
case r.sbaccess is
when "000" => -- 8-bits access
v.memdata(7 downto 0) := i_xmsti.r_data(8*sbaidx3+7 downto 8*sbaidx3);
when "001" => -- 16-bits access
v.memdata(15 downto 0) := i_xmsti.r_data(16*sbaidx2+15 downto 16*sbaidx2);
when "010" => -- 32-bits access
v.memdata(31 downto 0) := i_xmsti.r_data(32*sbaidx1+31 downto 32*sbaidx1);
when others =>
v.memdata := i_xmsti.r_data;
end case;
if i_xmsti.r_valid = '1' then
v.state := DmiResponse;
if i_xmsti.r_resp(1) = '1' then
v.sberror := "010"; -- Bad address was accessed
end if;
if r.sbautoincrement = '1' then
v.sbaddress := r.sbaddress + XSizeToBytes(sbaidx3);
end if;
end if;
when Dma_AW =>
v_aw_valid := '1';
if i_xmsti.aw_ready = '1' then
v.state := Dma_W;
end if;
when Dma_W =>
v_w_valid := '1';
if i_xmsti.w_ready = '1' then
v.state := Dma_B;
end if;
when Dma_B =>
if i_xmsti.b_valid = '1' then
v.state := DmiResponse;
if i_xmsti.b_resp(1) = '1' then
v.sberror := "010"; -- Bad address was accessed
end if;
if r.sbautoincrement = '1' then
v.sbaddress := r.sbaddress + XSizeToBytes(sbaidx3);
end if;
end if;
when DmiResponse =>
v_dmi_jtag_resp_valid := not r.jtag_dsu;
v_dmi_dsu_resp_valid := r.jtag_dsu;
if (not r.jtag_dsu and i_dmi_jtag_resp_ready) = '1' or
(r.jtag_dsu and i_dmi_dsu_resp_ready) = '1' then
v.state := Idle;
end if;
when others =>
end case;
if not async_reset and nrst = '0' then
v := R_RESET;
end if;
vxmsto.ar_valid := v_ar_valid;
vxmsto.ar_bits.addr := r.sbaddress(CFG_SYSBUS_ADDR_BITS-1 downto 0);
vxmsto.ar_bits.size := r.sbaccess;
vxmsto.r_ready := '1';
vxmsto.aw_valid := v_aw_valid;
vxmsto.aw_bits.addr := r.sbaddress(CFG_SYSBUS_ADDR_BITS-1 downto 0);
vxmsto.aw_bits.size := r.sbaccess;
vxmsto.w_valid := v_w_valid;
vxmsto.w_data := r.memdata(CFG_SYSBUS_DATA_BITS-1 downto 0);
vxmsto.w_strb := r.wstrb(CFG_SYSBUS_DATA_BYTES-1 downto 0);
vxmsto.w_last := '1';
vxmsto.b_ready := '1';
rin <= v;
o_dmi_jtag_req_ready <= v_dmi_jtag_req_ready;
o_dmi_jtag_resp_valid <= v_dmi_jtag_resp_valid;
o_dmi_jtag_rdata <= r.rdata(31 downto 0);
o_dmi_dsu_req_ready <= v_dmi_dsu_req_ready;
o_dmi_dsu_resp_valid <= v_dmi_dsu_resp_valid;
o_dmi_dsu_rdata <= r.rdata(31 downto 0);
o_dporti <= vdporti;
o_xmsto <= vxmsto;
end process;
o_cfg <= xconfig;
o_hartsel <= r.hartsel;
o_ndmreset <= r.ndmreset;
o_dmstat <= r.dmstat;
-- registers:
regs : process(clk, nrst)
begin
if async_reset and nrst = '0' then
r <= R_RESET;
elsif rising_edge(clk) then
r <= rin;
end if;
end process;
end;
| apache-2.0 | 34678ac4322f084a835bc3adcc6db0d3 | 0.536403 | 3.23862 | false | false | false | false |
szanni/aeshw | aes-core/encryption_module_tb.vhd | 1 | 8,094 | --------------------------------------------------------------------------------
-- Company:
-- Engineer:
--
-- Create Date: 11:53:00 07/17/2014
-- Design Name:
-- Module Name: /home/qfi/Documents/aeshw/aes-core/aes-core/encryption_module_tb.vhd
-- Project Name: aes-core
-- Target Device:
-- Tool versions:
-- Description:
--
-- VHDL Test Bench Created by ISE for module: encryption_module
--
-- Dependencies:
--
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
--
-- Notes:
-- This testbench has been automatically generated using types std_logic and
-- std_logic_vector for the ports of the unit under test. Xilinx recommends
-- that these types always be used for the top-level I/O of a design in order
-- to guarantee that the testbench will bind correctly to the post-implementation
-- simulation model.
--------------------------------------------------------------------------------
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--USE ieee.numeric_std.ALL;
ENTITY encryption_module_tb IS
END encryption_module_tb;
ARCHITECTURE behavior OF encryption_module_tb IS
-- Component Declaration for the Unit Under Test (UUT)
COMPONENT encryption_module
PORT(
clk : IN std_logic;
reset : IN std_logic;
enc_start : IN std_logic;
enc_end : OUT std_logic;
din : IN std_logic_vector(127 downto 0);
dout : OUT std_logic_vector(127 downto 0);
addr_rkey : OUT std_logic_vector(3 downto 0);
rkey_in : IN std_logic_vector(127 downto 0)
);
END COMPONENT;
--Inputs
signal clk : std_logic := '0';
signal reset : std_logic := '0';
signal enc_start : std_logic := '0';
signal din : std_logic_vector(127 downto 0) := (others => '0');
signal rkey_in : std_logic_vector(127 downto 0) := (others => '0');
--Outputs
signal enc_end : std_logic;
signal dout : std_logic_vector(127 downto 0);
signal addr_rkey : std_logic_vector(3 downto 0);
-- Clock period definitions
constant clk_period : time := 10 ns;
BEGIN
-- Instantiate the Unit Under Test (UUT)
uut: encryption_module PORT MAP (
clk => clk,
reset => reset,
enc_start => enc_start,
enc_end => enc_end,
din => din,
dout => dout,
addr_rkey => addr_rkey,
rkey_in => rkey_in
);
-- Clock process definitions
clk_process :process
begin
for i in 0 to 15 loop
clk <= '0';
wait for clk_period/2;
clk <= '1';
wait for clk_period/2;
end loop;
end process;
-- Stimulus process
stim_proc: process
begin
wait for clk_period;
enc_start <= '1';
din <= x"00112233445566778899aabbccddeeff"; -- plaintext
wait for clk_period;
assert addr_rkey = x"0" report "encryption : wrong round key address" severity failure; -- counter initialized
wait for clk_period;
assert addr_rkey = x"1" report "encryption : wrong round key address" severity failure;
rkey_in <= x"000102030405060708090a0b0c0d0e0f"; -- round 0 now available (one cycle after round key address "0" due to synchronous read)
assert enc_end = '0' report "encryption : wrong end signal" severity failure; -- not yet finished
wait for clk_period;
-- pre round finished
rkey_in <= x"d6aa74fdd2af72fadaa678f1d6ab76fe"; -- round key 1 now available
assert dout = x"00102030405060708090a0b0c0d0e0f0" report "encryption : wrong result in round 0" severity failure; -- pre round finished
assert addr_rkey = x"2" report "encryption : wrong round key address" severity failure;
assert enc_end = '0' report "encryption : wrong end signal" severity failure; -- not yet finished
wait for clk_period;
-- round 1 finished
rkey_in <= x"b692cf0b643dbdf1be9bc5006830b3fe"; -- round key 2 now available
assert dout = x"89d810e8855ace682d1843d8cb128fe4" report "encryption : wrong result in round 1" severity failure;
assert addr_rkey = x"3" report "encryption : wrong round key address" severity failure;
assert enc_end = '0' report "encryption : wrong end signal" severity failure; -- not yet finished
wait for clk_period;
-- round 2 finished
rkey_in <= x"b6ff744ed2c2c9bf6c590cbf0469bf41"; -- round key 3 now available
assert dout = x"4915598f55e5d7a0daca94fa1f0a63f7" report "encryption : wrong result in round 2" severity failure;
assert addr_rkey = x"4" report "encryption : wrong round key address" severity failure;
assert enc_end = '0' report "encryption : wrong end signal" severity failure; -- not yet finished
wait for clk_period;
-- round 3 finished
rkey_in <= x"47f7f7bc95353e03f96c32bcfd058dfd"; -- round key 4 now available
assert dout = x"fa636a2825b339c940668a3157244d17" report "encryption : wrong result in round 3" severity failure;
assert addr_rkey = x"5" report "encryption : wrong round key address" severity failure;
assert enc_end = '0' report "encryption : wrong end signal" severity failure; -- not yet finished
wait for clk_period;
-- round 4 finished
rkey_in <= x"3caaa3e8a99f9deb50f3af57adf622aa"; -- round key 5 now available
assert dout = x"247240236966b3fa6ed2753288425b6c" report "encryption : wrong result in round 4" severity failure;
assert addr_rkey = x"6" report "encryption : wrong round key address" severity failure;
assert enc_end = '0' report "encryption : wrong end signal" severity failure; -- not yet finished
wait for clk_period;
-- round 5 finished
rkey_in <= x"5e390f7df7a69296a7553dc10aa31f6b"; -- round key 6 now available
assert dout = x"c81677bc9b7ac93b25027992b0261996" report "encryption : wrong result in round 5" severity failure;
assert addr_rkey = x"7" report "encryption : wrong round key address" severity failure;
assert enc_end = '0' report "encryption : wrong end signal" severity failure; -- not yet finished
wait for clk_period;
-- round 6 finished
rkey_in <= x"14f9701ae35fe28c440adf4d4ea9c026"; -- round key 7 now available
assert dout = x"c62fe109f75eedc3cc79395d84f9cf5d" report "encryption : wrong result in round 6" severity failure;
assert addr_rkey = x"8" report "encryption : wrong round key address" severity failure;
assert enc_end = '0' report "encryption : wrong end signal" severity failure; -- not yet finished
wait for clk_period;
-- round 7 finished
rkey_in <= x"47438735a41c65b9e016baf4aebf7ad2"; -- round key 8 now available
assert dout = x"d1876c0f79c4300ab45594add66ff41f" report "encryption : wrong result in round 7" severity failure;
assert addr_rkey = x"9" report "encryption : wrong round key address" severity failure;
assert enc_end = '0' report "encryption : wrong end signal" severity failure; -- not yet finished
wait for clk_period;
-- round 8 finished
rkey_in <= x"549932d1f08557681093ed9cbe2c974e"; -- round key 9 now available
assert dout = x"fde3bad205e5d0d73547964ef1fe37f1" report "encryption : wrong result in round 8" severity failure;
assert addr_rkey = x"A" report "encryption : wrong round key address" severity failure;
assert enc_end = '0' report "encryption : wrong end signal" severity failure; -- not yet finished
wait for clk_period;
-- round 9 finished
rkey_in <= x"13111d7fe3944a17f307a78b4d2b30c5"; -- round key 10 now available
assert dout = x"bd6e7c3df2b5779e0b61216e8b10b689" report "encryption : wrong result in round 9" severity failure;
assert enc_end = '0' report "encryption : wrong end signal" severity failure; -- not yet finished
wait for clk_period;
-- round 10 finished
assert dout = x"69c4e0d86a7b0430d8cdb78070b4c55a" report "encryption : wrong result in round 10" severity failure;
assert enc_end = '1' report "encryption : wrong end signal" severity failure; -- finished
wait for clk_period;
assert enc_end = '0' report "encryption : wrong end signal" severity failure; -- ready
wait;
end process;
END;
| bsd-2-clause | f8ad4ad40ec1e4625cd09340871dfd99 | 0.68384 | 3.438403 | false | false | false | false |
szanni/aeshw | zybo-base/zybo_bsd/zybo_bsd.srcs/sources_1/bd/system/ip/system_auto_pc_5/fifo_generator_v11_0/ramfifo/wr_status_flags_ss.vhd | 19 | 23,791 | `protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
e5xVIDBGzQkhDoQ5sfeAF2q83P6A1Z/qsmlSYQJY5xTravGd4CV8IrniJyUa6zNomwm8ijfsSBDZ
3Cv5fk91Hw==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
JTncam9YaU88Ye5zsiMSZerKzQZ8ndV/jFOlVBJ2+1NMrth4ym5MZgOOJUn+hqDs7WawEc66qp7n
dAXASYJYn+qFnCtyUAhIyvGYbamoaDWo5Ex6WN67wq/uxVFQHJyQE9mBWmFUuyQbfWAxdn0X8Ddd
XBKhuVWHjadjfvTndGU=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2013_09", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
WysH5jibOCiuNoaEF/J6UEux/f9qwkqszrQvmOG1LAQguVnzJ7+cmZtEvDLaeM5SMkI/c6AvWtXW
QAEuUSUqI7fc7s94OSdoy/EO2eWxzu/2PZr3+Vm/RDQkA2VgY92Mk7iTSAe4nvupzjwLJJp7MPFn
W0Qp6hutV366SMmocbalqT6lFUEm3BdJRb/waOPaQXsiK/eXFOfDC+OkXBIeDSI4U6bTS5BbTI6J
pFf7UmKKQ3+TO+1O/Q+2hW5WOgJzIUFjgYlL/k7HV9GLoiTkFeWQv9D4PmITDLLqEoJBQEH042D6
w9tSjJ90YaeXyJsQBc944KHiROaj7JIGL9ptSg==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
HfnNrIheX+bmcZCjcmnXLaiCn2W6T6H6Dp6dScskVGNGAylFhqrXsMMXHrPiUKf5LFkT6rGH4xNt
DnPlwzwiCAkQpMo27mNuJmSmEL1NZn19+z1IhIkgUjJMK+DU6V8j1HJvLoBzdBKXeOfEsIha7CfH
SYvgpUYxukUrvYeSdDM=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
FcdqosqcEEFjwfToDdg81IlS3kR13BUL9UoyGE7K0tYyJxwBRWvuEZwjlqyLvEdW74UEcoL322wG
MsjKrbrYQdHQMnu0VAIvQRAp+YUu8ZY/Amts9d4uoKQ4ceZKPNKKjhA2gLCTZlClOnHdKjhfnFhg
C4vFlIgGFFvgy7hYPvMYgUjBeujuUeMJVrfDQoBe2vY01NCaYs8PD38+MZrB1yBWXtoIH1Kudp5s
6rfzNC3iiU875HSyCH3s6Fgf+5qupOBLk1FOGYXDOgVB80WiCFsXlSgDSubN5g0HTJQJ5d2+rdH3
3+ADIpk9sqzMVdE2qp7yCA7kfUMNWwWOq2rtCw==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 15872)
`protect data_block
4aK9nRWvVjlxIKF2x0qa9NV2t2mDrtthn+IbFT1fLWLDi9rczbae6bVONr1iJ6T4G8DETIVjBuY1
MnCmGcGz7CNbpq8u7J9aftYj2DQplUrwMmZQLI+iAsHWiuJzWU0b3FwfDqw32es7iPEO18SBbM11
AUYaZZkc5wmppvidg61k5iWmxF2/QEuB32yh+4rpuC8NxJdUc+fFl50TrjaknACqtyakfrSijiLr
V0N52T4m43DQRqYCpbvhs+mSRfQ2URyq3jAPeEuK3E+VtkaEMSRPcQJRZ6Q74LSybWpA+/PHMipH
IpvPOBIeGAeHqQ4qfRoR85Fvnj3xqr0rYAZs9/PEuPq3tAkWARp+CpULmmP/TsbRLDio6GgMjVl7
U0NgEoDGiYPf3wiQHNgNSmmD5UQVZwWB53EvOzwZ/RzPldIGz/wnsrQI5zJ7z+pteyjeG65/ckXJ
Ics9LDsjNdVCW15zIvW30VXS2LZghDynNaUMe5cdPpUmLPmlo0/fXC0LEzISnh+vX01/mFVIDN9R
LN1oXm2CMQfAHY/r3FOUqBfT3S5q3Pd9WiF6yfxA0pFeLxe/Nn+J61Pimb0i2tU4gNGNbIWqblVz
qkVyDTDoXDQYktHBMBpOl/TisHiMqXxxML+/jXqqAeP/jYyWxewwtoDZMxbBkrQqyv59n3aRWFzn
w+B44DiTyzPwvzmfUH8Vxxp5d/lENcT2D6LDIInJfZCTncF0uR1izDTomkfytyCG8UYmX3Jqo/yJ
FewjGVcSzt24nErLjAq8w6Pp3euilgx9LiBCGt9bcTBDdlZJJmHTtd3CSQOkjzYZ7XkQpjFyuYia
2XuG6TM/mTIWpaNoQVVoVwpXQM4IQEVHtlwRaC9fHriMinq6z2bi1IgXcMH6Jc22hOz2O9o3XxRk
ZZyhZF1Wn+fXHg6DYUj8UV8k4VzFO5cqbns+Gz03dHJpIkTMJGLL8fQqNbb+fJXwMqOv0EgV9dIR
rkkFtsiWD1UlNN0ie0wQIdTKrarBvYB8TuAmRjGVBOOzNjszRI+cC1p9ZhFpRDi6uDzqHXfo7hKI
7guyj6kn1yBgE52TfQDoQ9dqZEPTPgSQ94AzyD9HX9MdYgRM3fS50E+5iXiL82TRQsXARVDs/+yQ
5fo20BSJr4jOiO36moIM080YyeIu0UeZFeVblsdWBLt9p3HmHzdpnRgB+NXiFB5Hla7DIH9mImd5
EYcCe8JVfLlfSIpTC0vFymFvDOEiy5qqFp0fJK7Rlo9x0bwFADHdN0OfNv81Ax04VcmKC2SwKwCw
+UoDIEhCWUq5lVvA8ojO5GJkpJv3Q6DIvDlYBTK+TvOyJJ85ZRWck6ShdYBTKyGCyVCegiTY+bHq
Uq4ARs6gGYQ0m6Gi6tUhGmA9rvuaDzD3F8MSttOMjpfGIEPiFNeoATT/drJQgacG3Y82B/UaGyQD
oHwz03SrOPI7Tt27c93neen3xKkxnigJSc6q/OYLTzmxFgSUp8AVtyvqOX53PeGyc212H0K3sKeg
ClsKXM5PxFpyEPRsGBtxb6oQ15DWX/RfCcrZOspcOSw1EJRD39X+0+hm+nWdwTwpqhXtn14z4L5W
J4FbcclLMhXGlbpSsynMq/MnhEcb12sMxv6b8yTdTTk8CoPPc+MmkJXfMqjScYNmAkn5fYXn5Kbc
DcXAwQtRmZ0jO2gWo2fgno/uJxPGb+fdtDwWXAb6A2R8Y3nWI3kcmtF4NBAoROImC4FE/eeQegD0
IYl3qFZ35wHfIMWFZ287DaHfHeN8tfK+UuLfcmjH3Au37F21bUuzSgYspUpqPPeO5ZuJeudiKkgV
jqE3KlmbfkZZJZzOxPhFv2LqJZhrRGFYbkW+4O5ElcZd6babRC5y/+tTXut3vqsO3vN1S0nVPKh7
oq4ynJV+GYop64mBRIYFAz7RdM0i/Dn3tWB7aym6JEYrUkSmu6geUVAb9/PNisGIwwxR1HqhNE23
q8Y61H6SY3iMjFBOsitoteJLsh5M1Rgysaa/lWh4YnTFf2N2er2k4tJK/dynOqmJteWPmwBvp+9E
kuLxYbN1km2qvRZtuBesiW6tI89Q+mXCbJacwlv1VShV8/VBBN69BWfM/PjAsDD1lc4TGefASP7r
4NGYxNCUQO/7x+9k8kOaxbs2U0f5m9lsRn/b9n5ZYY/tkwUvy6p3Wn2pz8iguNQGEoXM/Tt+JJH5
cdsDW4UnCDcAN6hMAiUPN4FYS5kUhfeTviG2b6dVfXMCKCnD8PBBv0meZb67xvHxuxwI4qg81IhX
b7OvY2YjXQzuYrNtiinH92hRJXfFX4z1Dl5M6QPDsEkp59xTUxWHUFdr5r20Rn6JVWRqlGerZbN6
22mWO/z5gNPPZUJ+7SiX6B7IBe58BBW2Mvlw4PEHK/zlIOn2sjoIlitiA3tL4upIKpMvlB+r/7mZ
FWXeT1dbZLXCvtLNPTR9T/PnxMT/0ikRRHRCmqI0r0WDIV8N8k6NQYyEgqTcqVKG9P6pgVr/9b0B
4CY0LrXyVhFDzYYeIhIjWbqDYzbhu6wFEDmiZpdymniCsdZ8St2/DePgruxbYboH31Es90mQTKpC
0EhJ7V4b1M4+vAox6MOFFCfp9OWFNkUZcmUmYZb1l0NdGIBVz3CcDgnvD1lVeZcvwW9/ACQLJRxz
wSU62KvnojiWEVHPanl5Ar1dx4Jrk9HqYMEAyXHLLdLPSKHHq8yceyeDK9FqpjGj+pdbHCv1hfMx
max1sg+FTCRnyoVHWgd6NJaz7QA8T9jioTrGILX/EHMEySm4OQaw2GFt1vYLn/Alr+MGsw7D0bcz
qjOhkQ0QeBsgtz0z/Z2mAvl+1Gn7Hj9sulOo/ejH8EQf50K2Ng8qOYjmOv6H7rRw9AEeizg6IQgn
Z+5ccR5y8bgN3RA9UMShjPf85YYYwb2Ccr5E7tU0o3majPpyGwy2L6371mHcWNimqqOCy8YtJZGu
6jnMBdhlRBq2jNh3rxA2RY2U8MXYjaO8oeY2opVfbAFVehLIKVtlsBzLUt+CYwkmaxAtL5bOcEZY
nCSluBG7pEozMLKkN3vslg3caJIyoEuBi2SgCKWuRWvaEOc7BPB0H6pz+IxON0dUYnA3s8RdM9X3
VLbSl/AAxkbG9LF+cpYHUCBUo5euUKvIkV2CBeMKZOQl/0qzH4TmQHYW6yogDxfBSJfDTCqViq5c
nBFQ1GEJ2URhPaRojbDIY34r5pxIDHGQYw+2WkkYE6bDdR+O0Lc9AkjiqwlihNVlg23KtJuQgG3X
xpuImBIiNG2kJM7c2vG31/Z+31sXKrz6FE6FrwMDcodqbdY6oU9fbWsFQ+XHn1rs/tb0XlEAEK6z
+xW2icoEmZQlzNuYYL7d0ssnKCpuBXYMzIXbTl1zDxa1ankJSFTQAPvfOdOYzUJtuAcXtKBCTXjT
LsvcxEVB5dKcp3Nx4L6U/EUg4+ZghKZN6J4rGRf1k22oogZ7nPNG18z0bkUiiEiWpgLEtR61vMxI
T8Fgq5qu3NA8HTaTTqCOYLyaKntLXfABi7XvYOcIo2wYD/GlONQaz26/Sm5TqXBV1vxYvvHrU0/8
RQ0/gVfeIXMZXNgHVuMLukhMyUHFkJdRnijEnmishDmFSD0P9ArB9F4BosswXbdnzmpdAeuU+JtZ
WATDPT486Gs42vYYw81mZp+NYBoHob08pQ+dzkzbJk/DRD0BX72a0YnVkJfw3cq2i5TM0UZupnex
s157b8O5mtjrO8/LTW/5zta1PLPzBOBVJV9ESr42LX83BCIRZKWsYdd+Cm89m50XnTz0NRtDbwST
/RxJRs+BB9R7IYmhi0Y4C6O489uTTn5tMGkp1VMR6Ui0DneZqsFEq4WIjUG4QSu46E+RhvyJSxAS
YtR+8ma4XB/DpGVAQ+gb986Y+qd7XrwqS+mPoODY+Rh1qdDH+2lUjKuSZKpwMNjNqttGOp4YOakW
ljaORRukAoRtUisWF5j8YI3iimeLOUDWMXnMk9iocRdxSE590Q1Kt1rtbfAAmp9FnlulTW7BvLaW
tw17FMcSPHaLLx2+1on9+hEPk6IUtln6x6w4YKCKwpcaEiWkZ5d1aa1f3HCze9yWmwplVif4J/AX
bEdqWx58PIZHzBztJFFgrDazoeDolFskyXDFHALZbxd7mSAU2BuWPf++MBvYxBEigRFcvjefJQRU
SO3aHva1SoMv3nrsTaM4ksao1+NkQEnpPNVnkxNOm/OuUHmXCiGeLBvlJLRODV9VWvVF8BjxmCtS
WSbtW0YUV93FMmNIoOsANILkbU0bcgZfI5lS6UQEeFXz19i0ag2O5UP1zeE1bkKgAQPrbTsf0OcK
WYNtGySUizRLtqRcpiUowj9bW5sLe1LeD7fSmZHJh6WBOCUY5c1SBGidBlav1E4t+v7SdfOkMK0g
RrZSyGF8UGB0Ug58s9n6JidGuwqxHUvEuYgzkfJZXVbX/CT9gg3lGIuTJ5qPSOtb72p1Kr9sfZkN
gtPuQZGA2V6p/HOKNSgIzhbLwn+hUV4kQ6ZbY53FanDkiOVIq9hgagMzTwJpB7a6jrZDWmiv5a2E
hnx5p13b0s0UedCKAjwqG1CMJAYRhQtRcjzzXyXZZ0R8NJJJhWBpxHhbJ0ZHKKs7+4Uu3/oa6Gm4
0MQlDJADP5UHADUTKxF6MDly8Jh6ooD9I7I29mhuUYDpSeEsxP8Hw7sMAtaeXmXfo++BvLN7MWjf
iwPvX0HMtI/ZqV3ovcoYzBlss0IKmcgc/LK+VTuutvIYeLwoa1g9pNnJ6kierGxqdjkDwmzwSX1D
WjmXWqAHid+x6cMM0u320yJ+f6aBGrVKsjRXBFHyR0JYGBAb9FJsLx+ntkIgxGyzy+McqxuRIvFd
U14rXLF/cqixTaJXjJHGyiZGw4LI32NpEYNQ3LBHk2nac7lmBnv6P0A/haIDnonr+ggSeowiPA0v
zKEVy/Anv36fGp4BZBbygfc6F0m2UvHyxwx6q0y3l9BL7wto4GPl3qm5pePZNjbmPYPFug/Bic3G
chLmrdj5wS0Kf8o3e0Rgti3hdC4rFcRPRyGdfzQnvR2Hu29oOXefQh/6G1p/dH3F9eaOCRYm1T+b
HtDsOHLCkAlxpZCFbqYE49aefbddD7rVPNDZh4KBfJh9kGXZywEwKU8URlQYmJH2onBdV07Gtt74
+2DjwPrq1AXsWpXjQOdP3zkY4K0VYiZiK5aMC+GrzTTrC923SYj8gbZSCz432GzXI3MsV1oG7CWY
fSdSKof8+1s5pmVqYiMoYKnZfQnyBoSYWk5LmGCHeR1VBwI8Zv69+oD94zl3Cuc5u8FdnYp4Aq+j
zSnGWeKNJWm/XZiWgoAlutrPkRhHiNa3FJOnpXi9Vd6O5qoXyCkIgdmwAaqMf96KzyBKlo29JakM
/BPTE0WVrqCtHSSwtQCTRLjHp869XsvvKBBlF0BGcXSyhX5hSGYvNl0IWmZNQR8c3KiNVGvHTutS
1J1hBZrk9cyWRwI/San3ILnoyn2hsSE74hbJnr8+Rp7yzpno1F7vSSeo5FKj+XBOwYde8cL7nLxH
XTKH6CL9vFIIvmENyz2+hYPGCjapTwcmhD0vh8kXORle1c1cjRDCa3rDoRI4Y4bdvybl3KO5DB42
HqZoPKcUlh6+WU/YSnomHU3PX6UhXlt7AnRVaKa3BupudGRbGOtndayz+RYZKS8/xKkMxmcMaRXZ
09DDGfyzQ3X2Jl4ts8WMVPnIs/UVVv9qMtS44XHWe466ETYMFlIVkZ1ZpcCPDFdYi8DE4cbEruiK
t5F7nKi/In7prv9QfGho2D0srIxfWfKV06o+5uenw+wcZ0hi1G2KzWaulmUvRe7lVgn4I4E/U08C
dNnxH4TA8OPcL4PCu8jMkTuS9GYfMz3J8Kx6y9zSxHSgpIcviV9r1WtlOnHhvR3mispuAru3PRqM
YX1KCXTmNqONqeJPt7ZSrjz/oXwTH/YBY8ZNZy0V+qHRQM5ILccZBbd/0neFm3QRNmluVHm1CBr2
tuKpXs7HeYJCJi9bvEFcfXuwa39WHftKOxc2l/DONbEXVqviMt/pQvnb4ASDLb/oDd0PKEDFqix1
QcIkNR6SrZdBKwgYOfhispak/mscviRMBRVu1qDXuhorCZkEpUpdUGo3Js5Og53SJGcCb+nvHnuO
tSX+BbWKzGvUvIc56yAgELDeQpF8hkuqEtw4XXvsOCIGW0JmwgpJiC6GOMl2jngJd280tTQuTGd3
uL2vLQD14Q0ywqQ+IIJRmRmirtZAcgE5d44MmD3RCFaEYCLvqM0aBTzKb3KupiAklIB2xPsHdnSh
0U6fodMzCVKZ4PhP/1lmgbpV1Mx2eIGk7Y5tNHI1EJgCtXnem78ewL/8N1tcDw3Hg7oi63ud8uY7
Fv1aW9NByjBWbZKHa1lLOKI7xgNjkfJLFY/Gj9cCqOPUF4xnTHS7/92C2T41FqRHan7TEw10Qp0t
Uz8cbmZYy9rQSMZFLjkmKAb1D/DTB1+vC6qzAMB4RVOS5x93reznheRGxV/ZgJUtH/JtPTxmMjdM
uKIPVpbe4y5hbbAWChzuMVS+ujtarFSHsIhyFHbTUf65+GlUwJaE2Dr2/3wk2j/Dlocopva5PvHt
FJRWDxYsC7SY8mJXXZ55C8dFJE0jk1WVExUZEO84uSuB4+POFuvyCrzVQvc0wGu8Ir0VGq5MlXFp
4sBlYcn6ztA7zSFLk6UztfhI3UIQLIcbCvXOx4m5M98gVj1b0cy5tn6kZCNF9PaZ6bgUaD8llowC
OpDeBwsdp8ut18mv9fxOBFgkaln9NBA7n2sHmbLIdKpsmvx9ecKrrhPgbnhSbic+eQXrwecnRhAF
yUQbkkd/5d9mmRCzgdhXocyVy2NHizd5zsX2ShX4via0dVKQbmwakXxHkAwPYUPCqoPV8dUW8hKJ
9yiQ4yRxBSWGc7MlcqeXp+q2Nu6PXjuhi6IEE5PxkfsADNXnxdtYtmS1HtatmahwLX6ETSHlpyWN
0mdEEkMkObh15e2XkQpF5+Ge67cjMROeXRpW9x7QgqbesbO2KyZduaLPvpWs0g4uI811Xft1RVM7
haz1B8/vU16ZodJspc/8tn+oxyIip98/1M8pXNL3nfxszujQBcjn6aQyySCZ7c34mTuYuRztgU+N
981ppS/2iJ0g6Jt7KKxdRjlULrQNadR9bdbXO7QPkX/7g0L8IJ4Iku9ingOqwOkOI813pjUvGwUc
0aKdqNjnjwaVxoO8SFfRYPHz2dJi2IZZgkeKguxpL9HxYACdvFkwuvPR2lNLPAXB2ghJ2y5FAXP5
X7wHELeyIiZUiAYnlp+66Ea4sQJR2S4N0EZC39PriZEU8BZrjhlboH5/Pu0jGWcd7T/w4n761BWm
H9sDA72W9Tb68j1aDYCPP/ABG6qbVCbra9Ot+Z4OK1nlA78+5FvJ3tIJQAnZzgCEvdL5ZKHZbV9y
5ydYegQjw0r2Zq7RaAMDUas95D+n5m2Oez2iJ01CoM0BXxZeLeTvE/cZP6sNzKo4t6hQ3irPsjDg
yQblBhrTBg/CZhdKTRrnlWE/sdCr/mqNgUJ/TvyJzXE35cQw8KiR6twnBJZnaXElgC1MjSN2R7XW
GN20U+EBrv+xFfjqb9UkPVE+Iv6CQR8W6ScFzXMKxKd+ZrQwiKjNL0fSTNf9I/ME119CHOzmPo6p
KHo9wWf5PcYSwD7/vzJOebDTbqEof71cHlTV6QdoixOpybgJGI0mgrMfijnfCPGBkeNONNSqHEqb
GKlkETYKSYr5zY/aJRDHTufqtq0UPMLPr6UNG1SfLkD3XRVaMhmbpgOnInNFFrGBVDemvgAOOM5h
AQQqmXhZeYezksv0fYS4KUvt9ZiXRdNGYqTgZyfXOVi/gqdWwHybuq+6R0iVXxUJqntCNJ/W9NdR
uTHPXtZa/ErRtH8GpCOnVTZx8rNDT3XSFsvJNlX3DKh4ayUQI2KChkOhpwm3Z2CcVTHNhiGjnHrJ
ny6daaMZEX7XTP+Yiqj3m4h0m6Xo1l8eUv3TaY5A+LG7pZCsGVfCBfs4eF4pgThxoqNum6eMBX57
20gO5GIXHKbRnPQhufnb1aFJW4ukhxGl4CRZ2znum1mAQENqBpdfDq5wTJSC6b08Mmsl2dKugMtd
IDlLLPdoMk5D2KlHD0GQefeCzOza3oOW1HUsjXLrW8ugVQOnn+uGJbiqE0jeTeUbT3nfQZpiVTYQ
uNG8icfGXyabB13+Vi4kuA25gocLA2c99Cs3Et5G0n4gahbUo8nmuOmqvxXJK6uh6EBwlLn7u86D
9NtecIckktttuRSYppMZmUfzAfv4/ruxyVpu4AG1HVY3hp+Nh0Rbg0wbKIR0YbtGosZKAfL3RnL7
jT7cCRCTtW5AuknyPeBNN3w7ZvUKcySUb58gJTdmMD5c4ev27oQQm335yb0zVc4fs2IQVJK8YDdB
EUgmjzMKwo6Rgu6/yNJ44HEmODuAXp871awWsoLtYCO/FfmbppfBVX/45rFlDzBzc89Ql8j7HAVc
1KnvLS82qRdjFZfpC8JNSWEi9iYsWqWX23L5souT8Dccnv58yrkj3BO8DO5hPQcMvedIVQfdqgex
HNfI/OY+Z39vcvoCBNWyw8Gxj718s0WJEruxcdgNdrVTBza3MZllB2EyrP7HQ+F2OD72ffmznlQ1
mME8pEzedEfHlJu7zo69xPRGvaKG+9z9MQs4gE1deewywBEBABRixYzVRVkhm4rWmCiP4wpqMope
mca19hg/42MiiOkuYxe3yXmBiCNdgvL35TtVYqIKfJqDKJ+JN4selk9EEGcAaiODoeXjl96RXOBw
EP7E9LuNvQbTcVkTZTW0glaJbTN0Cq1rRevuZT4Op3qQ1k+c2T7tiYoTb85P0uav7l7uUKdoIarz
ellcV7FiL3Aa6t+dQMf/sZb1tGVlgrp7euu2vshmQE3XJYG3pb+ue9L8RE568LLt4J4CjR0SmDWk
IqXnp2AkA+xPpjSMDtLZxd18sApGI1Fyk8fasfUXOPCXXxZnS09ImK8w9bxqm1sYIfZdLDjPBWnh
zKBolZuc2PDzv3MU0x4dkucwYunAKS5OpxTESr36fGG1935x4/aQgTIoGS5usfXjEo9gMvzjE2Iw
jlZrqXFsBoU4MpaJlNHBe9Z9SCBnPMnxPdoVyMezUIfkmN+2WPtPl8yP7vtt5WAZOMQ1hIHFwUle
+eqE26AB4tcXU3oKYTQwErt2PxSMrw9MIzaR11G61KR38W2iXIjFXHWwsTs2DIkj9MVJ6nLclhvC
vkUM4cbXOe51eYgObwBOamtCb6mVgy7YJKn20WABL3KVYoUg+xPiuwU+dmc/dRCNEoNgY4oMJ4FE
y39LwQMS1iJ9X0K3Jot+PDECe0QtBkVWpkxD/0Nr+esN95Pqer5x1vkyYzwfy5MyDaiYPLXpkFzA
sa7gCKddRmAxmY+8Bqrzvx5BT/8y8FfyqrNjLw0E52kg1AZAWhMHyGJWpo8W1mxCgQMkIpmTjT4y
6HttKexCbX3f2/shojiPMRTlvx/OaA0FY/4EGaCJyaxkw0PxpKitnOgOjIGhIWiYngxiGJXrg77F
5gJ9AeNFRCUnSFK5SII/GNfDGG2kUi0ERy/HihtpOsIpMO7dD28d04nHNWjiZgGqcGSLeP/xp9qj
R8M/i2A5DjQ21vdU/udf6O8sCBDbwaEBEG4VOYNez2TaqM71zCsR2frRSFvEYah3CtaywxjE635H
pVrgFjoWpgbo/ECsazanpJLX3iy+DoRD+2GXnPZlOSBPSzb9RWawZ6yH8jcSG7zDKynjIgEyaxPB
RcAZUkVWKxve9kyLykSiBMA1yv30TZVG48QEuMpU3TQTrczHbSjDlFVbaziGbZsJtKFdwyA4wyH3
hYk3giJFqM58THA4FVK+V/WZmZ60cDhvi9Bod12vIOc662pKb0InZPYeU/i+XJMUnfNdG3E5xRPh
bTnStzc2fWu6F99XIq1USWMhRvj2AzYRwHaRQVcu2NLebnf8L5CU3zj7pcg2O8Hu45X6qRv7YW/Z
x7Sd/WXzKYCmnmXd0Hb6n8JCv4K+cgYbcdCAJIVoDWCDvXlizj9NlFwXEBTauXKHhBSx9mGmN5oM
HLhjue6aQdoZsfTirO42vvHLKrdxeE/Up1oM2T4dy+1OlVLaunvr2fl81EO/Fvu+ulWuXokk5uwr
EnZFcnAN5c0WssPYnbn2bSlUb2mGtc9M3Uvl3+8uo+7OcBZZJtyPnyZS9/Ai9C6syAHqor2ZMDXP
VwFZMRUlCif61os7ALddps51YDHcKc+ExUoyffrZ5fjJiRkZhM+oqiopH3ICuoz2bK+7n3dtzo1P
mqEMOzAvbmkDzBIDvg55S1f6c9/bjjFsRwi7HZreGYDw2dF7xtEOCorzR77Qx2B4h1Cu431cg8Sf
/X+y0dj+og8xVj9/8u4O/2VwV3unmAlCgGBwjy/IpR4Q0RgNvok1WK+vVDqxVybVLEwSvwQcOpMi
THU+UgAFgPNN2BLAy6MQzyeJt6ALYRXmsp/Z28kLqd8j8BoDwZ9d+hvXZBX/x/XDI9xBFPAQhDmn
/RlU8jWBlpYM/t9S/2vjWCoooc1y2Oa+WkzNTLIK5dhiAx8evwhDbB4pKAECx+OZuBza/uyYJbbw
9O2iSpFS3ZNIbNsqlttqgpFm9Q3gW2Mv2PK5Q3O6eIaEOeeabl3m1DMBZqhsBeS9XmIzNs3//uxl
kjSIdVscSLDqnHLoNBkIccMpNra1zPknY4FRxkZlruEsYWL6I7AlGEK6xn1IigpvzI+ctyPKdzEh
5B3hxWBbtDNOoJt+qKcuS0ANzKuBOuvPdtvJE/Y45Z2sbdKi9PTJspBHu3pPTJ1l0N0X1SVc16hk
rU7l9A4x8AMncqTYCKijZcbwCjXH0ro0D5gi8pOaHXfIrxtkbCoO5nBp3z4cTbjsqIT51AaNN42U
KwMWTlWiKjminvKEpmoqQ2KEj4PrTScaF/S52GL9a9E1prc0DBsxYcLRSF3UM4AoKB8v2ajkAx86
wX58YQpga/QPb/qEa6AHCeVxaYWPMUAUsBysHeOQ/H3fXNyGh2bvV6/w8DKcXZqnv7ojHFk+sl76
gMMrQ8iAn3DlkeInXMXt0/qc06Pp1sHSz2w2D67WLlBpGjsTCMixGFpP986ogkvXyyY9Z0CfH1UI
nZMBbv/8x+Q1UwFIIsxWviLszDYqbYXo+tCT/iNlPaA1kKn1cCCwhd3NmyR+nrljjKPe8y8O95+Y
hyhYskAPiE2c9y8uOyM0mGFnIIq0Atp15oOHunCnQKVzSjIr4UkgzGJgLT6ix8aWaLM0ENglYli6
1Go3RC08m8FNg7pVF41Oxr1PC90Qc677fcso5zSFb6cJ8YtOc6fJukVKdIp+jgy9QUdIxwvuB6eL
6ZQ3MenqeMjzJp7ldxj645/NRAxvNoEYljvTD2sZlhgBhDfKRqTqv3D5Ueta51/ujBxiz/DHtNAi
NqdVXXxDCNBwrXmuhOu05jx4h+3JLYLeemWI8mDsbOUIxIPE3b/+Mfox6+6574BqzdCgHonrL9Yw
QQWT9qtyjuQNa2vX+QoNC4RMudJIX2jtCQdQwAGQ3mGrjoukG/bP5ublze+UTeaS14KmsRiT5gRg
Jcwru+qllHkMq7xJU0737NcT/gERA2kIsTXjIFQD4aHYhUqu4DhpQa/TaWQVM83fCeo5rPsEPFp6
33aDxnvrIa2Q5/o0EH3ai5m4KiEyTd+MltNIB/a8lU+3UDPG+ISesHmsipcbtsQmi7CyisHnlioP
Qa96MQ1SPGqDYncMZ8gt1xGa5pv8rpZd8O5D0UiAiF1nwBLGFGVyINxJ/ekPw7hn0C5Ienue8q3H
b3mpMRCNQIdmY/y6ruHJjIL6XWYr9DJD/vdlVuWBuHA//87pggVA4MTYfmzXXHqJgc6CCf/CvVtF
S1lYqsgAkYy0M9Hyax46K5rDFlntypdir5L11k0t1oQGnRjVn+H7nmcbVf6gCIS8PRR8FekRwVTQ
g0EurL6ShBozppW3N8pLlO/AlKVglPnG3TPV5sUqBehXb+S1q5MTWQuC5/czdEq3LDrzjSAndxwd
PfeDCejZScO05FH/Ce/oveA2CSUyjkRyU0/DUQNIqucQn0bfKQwNlPZSZXuYYwAr7M3KNi4BnDhk
eS4X//kxYtFTup6jctfq61EnPZk71kDN+ORi5XhL2y+HdGZuKGOkQgpI+l8qLbpn8R+k+K+PCz99
GiOtB6D4S0qDSubF15IB+BZiVWABaKw4QnW1NtF0yZwm+5cGN5ldtBCNmBwjeCjnAgr1Rh4mlsTP
211zDqI9Y9jJfC1jsijJFu8kPOEO0aBj6avPWy80DrXK7421OiQSt0i+wVZb/uiPnk4grika1Flt
VX6G50S2y4PD5kOhO5hJChn+a2CZVCymU1BSV9rJ4PKJ1VZZagDe7gDjJRfyLUGt7+V1M7DcD5oD
R+OC2QImtkHSGV9Nr2WnIKocCo+lMW03HE2HIEVX8vYBe9bZsuVNeJcmtVnOb17NjfZUzcukV6yW
qN4iUJEcrZ1EN58wDvLHU4D260xXWHqYaG56/SnKlRV2/uQz8CRwiE5xCJSzdNB0aa52wdzimtCR
lW+cZk/I/8xwK5Td7H75PgQvD8lo7hxb86V4J8N/ePzK8PLR7rD32yA5djEIN2MBuUeuobmWabNA
IumojO0PdmA5NFjn7gdKzcEsQlKjjr/kjZ5kTMVCRJpcb/kSUEfrLeuIVnHvA9Lry34eEYce3U0B
ae0XNV+Ao3EcpYY+ZdMya79ZBSkq0l2bFYNGPeSFQCtSED4bQo9keDtgYzGMOXUUKDXIFqjoMFDU
rMZv+de4iygT6/0HACcUJiHbTX7JGs1xaGeviAntMwIdJ4FfoP6EWDMyh0RyEx4noc330sb+wER2
8UuJnkBP7K5LbEHKN8j6DJnpXx/v/v2CsaG3hDOJdxzR0svQI4Jo2BehF9p0qkoqz0zzAq+FwhyW
Qy00cX7K76JdugJoGjwfrCIo7Q8ONb7tjpFpYW7T4Q4jAC5vidzwKO2CmFqQkWDqzn89NUJ4DldF
XWC6TOsvCE2iasz2FHkdeaiyVUDSx54ZLb6fCiz7nKhkkFlZnYV+ZT/FlaOC8G/wjYWaY4jkgmlR
DVXmp0HE0JUfatxIKTPwi+mpORBSfyPXMZgxebpmR4o8IN1EmvZHvRSjO0sv8YqvP/3lURGhDNOn
XeXZFsT3k9tKC+4a1uZTDKHnrTTxieJkqXkeKLrER5aPAQaQtwudC3VBea1oq7a3DeqV46aT3IOx
hBvvQzO5EcJ6xofWZ/OTgpnI3IHnF1A9rcT+FbQwISSOfOiyKomQgGlC6Qq6EUZ0WIFaaK+mMrbU
Roz/kexZGdY9exSAF0JZreZwG0++1v3kPquIsZtjj3L6/vch3BUIpSDbphQQP3z3pYuQnulaVRO4
LeEpzHE3Gw6XpIbTwFmGPyQrY8rpOnvweIqAJLBwsqdWmWgxWINpIBQZEPK/uWzIHqEmCeCIZFfT
x2dkD94YNaWqDdkZ+S6OMjZHzs+AV7iJaNHlU+dlQ26phEaYyf3OuIMkV8YbsYtO4ekXPmYr0Xjb
JYVEP65jiJUgoTMPIY16RCAXugUGaTUgu/3fJbAlZs797ztl52naxrz9cJAiVXruU4Plx43aX3Xz
GnrZtc78vQgxkq8jmuoaPbZqZ49Bm20qp6/ZZFPXmnXjveXP7h8cSlntZG/sRJkWJG12T1rwCOFm
3XwR4S6OpvS5rUhtiyqwwgR3vYl5KHGgC1gFS7yeZOb9ho8iyIboaW0tOz+OZ+2YRhZbZ8zp82ry
go+jd3iz4gTMtVwS0VdHBo1w1+OJhE6R/naeUoBBCLPscAmvQQw90GayCVdYzoTZAKJCRnx5FkEn
jPza28ybMTjrp5POPEsyj+ceqTG+YKIAq8uwHzDRfLXlHQxjzVSs3HwTmSbNmuFXv2BepePoruQw
Zxk5osw2YjEO7ctAzU6z6lhpz5IOIfgIlveNQC6sWKgb8OQINcKsowq4R0nS8kqItZt2aLos7SIJ
EBqGbg8yfFESpRCMn0ljBuNQ5B7JotMXa52WhG1JXksfVuJv2pNid4cmNmhHALXSVf7mNmKbplXE
OpIOalpFsPC6UVLGTt20g+jFvKdPNZaEDm3gjR0L3VSONp0xBQyho1/Pr9tweZCmUGlDWGoE88YO
HbyFvGBmDem8lQuXbGJuzBLisUGtQPEMPT4t8tTgrDhQLYkj4Sj/aGbHfasakj137heCGfKSXbX6
dzlu7mzKuKOvu927L16umBogU7bWSY7Uhg3pTQoRpcHBn6LoHegKab9nup+/raZ80hSbJ+bu1SEY
drCvHaz1a4heCY/i2TR0YGtDOYGcStO+Y1Zbpyu2L+ETZO0Ho72jGrZnPepFFy30IJcrbRwZRtBh
U3hWGplKgoAZHT+X2rZwm1SyeijqpApaMTtUk3o2ndnwOuQ9G3RWLP624akw/j6UerUtJyKlhFf1
F79x9B7g8/wui7bfKhrCpLMZX0/zJHKlllb465vja+Addh8c7Qg4dCWSbetGmAGNvNrQotDEamyO
cXylWUyz3UABqJ3tI4kOy6NIvI5CDPLlr4OyS64VlKHeAT0V7NwICoYDc6GQskVSRRxzFzfmbxJ4
EqK+3Ek0c0GamslgY/EzarWxDbhfAa/Qjf9gRn73kmKCWRxx+XXRCnLjBML8V+0t+eq8FVOXJ2jH
hmIS9jiMqj1IL3lt8+xVrrCkUMW23kqWW59ndyt2BoZIh+PdckFOpFWJPq5worz5dIwrd8SqcHVm
8HZGLcPlS9baDQ1XTqkVo3fjpI1lIdJzz3yhRvOR/75tVKj0BfrU1RX8PTECZOG1nRCkNrTM102c
flaZlp3P8tY2BwU3snLV8IyTFXBB8q3lDa+rB6AkhSjQIKRZTSKooZs2aSQ6eCRwquxPQntfSMj6
8LeX9OpuQcbtbpOkfyHlBHEJvzrjTogsxoViEUkNO1DJurbcCI+T4gs5kN/jP6YirSMckW3Qm5T4
Kla6towUOaP+7kkQTaL/WGLFKajl1znUGF/InJAsmFeluvY2et3VlyPaFfDpbEkzK7s/Q3Au6QVf
EOj30zb51KsFclGzoryZDi1T3lVvG/UveeqQPCXPQU4jq9sK2kZVvTgjOH3isvx1vSutOzXGrW/Y
fv6av4uwMvsQjXGwG4SXdJW+62AqWUxAAgi0JWBBOuYZyJHz5KqOLQyBDAFRkTftVjtHIqoRLtWY
TGzYJTc+n5KBQP/NQ0AbolbyfxCyj8XTtVyly5UMjsqMOe1+MUdAmPi9IRQw2XZ5iIzDyaLZjqaV
Pln/c6Z5Cl64PS5kJwwXcyWz2oAnqq9g2yCtsWUMdmqhEeNKlybB38FdEOy1XBDqYT1FWQo8/u4x
s9cZ9txblxRA+lXG59Z0KI941eef++XnKPjN2ZOgdVS8gydYaQjJl+1jT+n1Tsx1CrDjUUPfLrte
xwEOXZ87qF8nTTaK2+ABEEmh23W1mqcZI7wqnb9Mbc/9CTQ3mhdedNlf8TQh7r8JP4sXQpGhqFV3
oPeHdaGzD+HSSpYT4+3F1HxRBGl6xw70c4mEtGGdflkMd3SDd9AlbQkNDK6njUlJD+QV7BOEpJyT
wbsZn/+KM9jSH5xQtIjotXvdHGCx8YfKHqYJDmmntG0F0F85cBVdc08bxlmjxpL8vjdyxTrnoHg2
W6bMgNuRMtxLPknEr/wDRH8QZDmK951bUiX2IIqaP2f7VLN6/oS2vGqe1DJNtPaiOy7dGI9TerxV
S3DCr5SQmUmvz/KHfMpqYdu2VScZqsh9aAxkvXvBwqg8XSczukWg5RnguRmEnAi7PdrbWO05qs/J
/5vnZMqdMlVN4HCFfSPHzA7/b5REquQmajz7XeYwnuufD5VM2u8qPdt4/kZuMfYVxiV1F7eD+gW+
BXIQxi3iVr/NBD9mAgv+clr8fG9Y0dAlOzqvj/Q/OqoggPs4wo09yxGjREMegxRi4nFS/iYlb8qG
rYdkQucL8foh8/CY+8QH84Df/YII8vlouQ8ij2rHeK58nCJ897/TYlEGTuV6hTZ1qERwgeIXJQ6C
8Di4j/wt8C3b2j64SF8yHeO8JPHtd3fG94lEoHKSQPF1Hu0eAnTedmT4etFUE2bfnsQpY9ZsEOCB
IJJtiPJGJGSIr4BMRbzmZtg5qeMpbBmri6QUUNHvnjaAtANWKuZkBOPL0SwqsKPq0783VOu0KAZJ
rJMt2A5wEEyk+td5LQ53F+rzJznjadYcBMhAnW+ikrqIoWcv/e7zjWKxLOZrPAdqJw5aLZ03iu+y
FEFXb8KZ/jjUd81fb8qbPPjtGgRWf3BjhyfapT5gb8CsAIllCwATwHEEw4F0YyUj9OdGpP6WHLaS
w/gRYiwE0Ay/pyJwL9/td72iVoOYsbH2PjbCa5+BVPHK9xjW4l6piDpDmBFORIgapfAi+Q9jNe+F
ZcWOx+e4AdJ84n6FlX38zkJCOndiY1McUQSzIY8YELMYfSZwGugBUuIVRoeT9Dwbt8HiUbypPVcD
37tIt4c7c2yGpi101MKG4OJ0n0HrAhrhbHBgSXQgWuv1HMi3VcmW4Zihk+qbWWyK3v+aqaLzzDJD
WLc4YHpCLVv6WwRrVtxVTw+h4swpA45ObaOtTAB3LCiPIlU6u/rdjNF+UOvPkmaUZAVHgcBdX7eq
iA7B33orJb8++w+AYdXxKAAUd/L56T9PxeTr3DqD9b2ffkL85xPsyOZRA1U1mlofY4J4dR6YPHmE
BP6qQrTOzEa8qfLs3wFvUMKzU3Q6tAoWd2Kcm5lfdEanPoFBiycznZCSNetD4sZYg/5CvgERlHRv
p5dbUL6FHwx1KSWYDQmA8Sh+6QLZJ8IohF6bayNcwEOu1WZj0ursCUF9QJbqv3A47h7lOn3Yi333
v0jaXanHo2UlSYUfnEY98KSzJ9FD4gZa6fATzR9OgdpWF9+YBWDd2kKUJw728qNwQT1ApV/Wddwj
T64AY0GG6HoinPJnxV7+73jw17w/RkCG9SFcxtZa/iMzWEjPiK3nixQNJiRsXfpaxQ3+9oigMjB8
xz2CcVeY8nGq1/XiEC6yQR/QvNvKtPbBXvl15/XhcPkMcmShAWCEknH7rK7fZ31bQbhZUVqu/9eM
ia8SB/4aSJaxelA6hOMewicbnLFrfpQJ3nTOzaP6fFY8FNRlxAdHcjvU6aefBV4TwUc66FzARSHm
AKHQ3xEHtdoSB4yOBppvZjzKoVOCm4QonfBCBS7SkOPHINRwTQMx8f9GKF3CRNMMSBekWi7MX85G
Hk3nSnfgRSgSqJZjYitlLonjfAb8yyIL55keYA/1W9lIINK22+AUs5mErs5KDs/YxsG3UELJqYUm
gsH2Ku6MHAfAbSjxXKuJ0XRR9RlheuqvbJgciDhn/TO4D5lFLos3lHQgj+oMkqJLGmDHv+8RDkQO
llBCRX8xL03EvJ/P+NxLIZVt4uwlIe4Lq2p4en0nBa3zVaore48R4dqG+7GP6WxQ2QORAFe/TsXi
+sTHfLIG1m+gxcgSwQRsvvGt/6GmhPxyDh0jmxOODWQs774MDVCf2D9cWN/fRdEEnWZGbkK1qn1+
FKkK+WhlSWEmJ4pzYnEaIkhJAJL/v3QTFAXplLuxP10OE1QmV7gxCg2sX6HFs8lR+fWgtuHosOYU
kOsozbnxc1g0PcAbhyUurHDBN907v7FqgAA/tm2raeLj5L+VcZLNzgyypLO8CEuJIcnVA5xlXSjs
fToO6XvV6cZL9Np6hNdHTAHq3tN+yaY2cogZHplfaSL6p/d2YkKX4LtzjXwDGw0wODGID/tDbzfQ
IoUUx4KJAx1INkelQJdGjdEOxyOpZfA4beQhCPGfKo6k3ddROeCjrhufkqRzOr67gWPfp/Oql++U
idg2Z9DY4/PfLmpWbEDWLJl6ionwJrIRyUj/RfbxGWtR5pmN7583Q0yYMiB7ueKFa5lZ8W/ERSR4
lsASSBeNg7iQun7TJWy13d2ZPQFBcj8YpswRZjwn4ACndI14V1PYfok/HvGUnHydwFkoGgTur8yt
YckxCyROZILbGEu5E4qyyld6OHn0KVN0OWAV5Xpg47KP5YL7f6oO8pXz0nAhpsdOx1zHZrA8gCso
zBeOy1aZgczNWJuIgVYdBd0LHQPlmC/JabOyyM29ToNoEhBF6KQpYKt7BN0zh4u5rQXh1bjYFRkC
p8f7O5gC0WYERfUFapF9sQRkeHVF0ihYReRFsW2yIWBkI38iy3PKKrOsoUQOrbET6OvNjdmBPyjo
oFLQ+SlMqLjJuiN/nkMRN5RldvuXqE/+SnqCHBh3MIlxJrFKLXJL2iANFeMifsR6Yfa1PccbfEL4
jRsWiz9k8CnjxMB0/yUT9qO4S5DggGGtx73EAa9QSEQPKlKVNyTUTPTTvDtj3P7CqwGhQLw9evMZ
LPmxa4NOj7GSTsERZGZnwu1lUdAh+56O+zejtGUAe9ypkxZfBm8c+NqG4xeXNLXnksNEYgSyKkOJ
9uwNWcLh4ixSGHUn2aF82WClfS5DoICSJqvsuRWqGHv1sO4C66v1zG7xI3REvxcpJPPskcEBLxL5
ucmVajPFyqqpqTjIEENYyvDB/10Dli5BE+DgXGJ2FkZt6BU6Hl0g7U0RUTnAHlIFJLj/HeVrLWNe
fK7MXbbEppZv0urqZNHwoSg1bitrjJjkwb7j8fIXDyk9syAqz9JCdqVJgZwL6aDkWbDOe7HksIva
Ru5vJzuEhUT2YMW5DscJ6PADTkyxO1Du251i9OewpAUoWU+GIpdvg96mJlaKHVYp9piQGZ8dDPyf
LzfZ31EacD03aCMzWK1GvZexekjDcR3mZ+4yM0Md62xt3ZRMASplgE7qwG2h1+20zHVW2g9JmLcL
f+uVJ/lqbQdeHfGD4iFCJhiPRPdmvqANs/juCejTZ3dzyhG9iMT/f8zhxDtMz17fpy9X0dw5Uf7I
MS0/vxQG3Selsw0etjGHm6HWg7zswjTU9BqSRLSegSWX56TvV3x9mnd2EAsytx0zJyKYWaiGlylO
yhsxUXrOTZMCSqPIA1/viEdVbEnGVoGVbtuliNwCgpmQVFXlfrCon+HSwj8QJlSQtbPgP3YQiD0A
Sq92oM7/Nei2NGQ+SUHDiZBPkdyUVtIpEMe75CHPCVRtYFmGiRkGHbYTDs1U+KVjfg/vuLXwnz+O
Jawy3w1flVk8bCMvWdrX3m3toE91+gGJPvWTsa+zRHbFkksTgSWP20yMt51sGIjTWNlpXBR/P3wY
d6GYpaM5EjKXJX3wm/fobRhmL2yuwnPPchWh15rw4YBX1lx+pn+MGGRKroqDTboSWpLoPNz5iJvR
A4PkCTZ/MAhpodeJJhLHg70QiBQY7ebReNCtgF2KmA+DQUIV2RZoLqOoqDJGoNHiwA3SXJmupzdu
EMmLUdLPR85TJaoBBEBC8zQNU597QzInw+YE7c4eA2975lf3tReQ71eY2JaQsG5vwxbFcHLCTgWE
h7eNMkUBKCdWuJPfWbkkCS7bulfS4NduV5WjPA4NPoZcE4Y3Q6WHimxlQLB/OJktqGRq+wJvLJtD
cLmxYARbF8LqpaIm4n94dTgjCqYenYWn0kBzj8vyigDhb4OgOnpKSubKvT4RWZmzvOHZos1pA1L4
zW1+QTdVypkdsQ8+KjQbjbOemLECgTMX6BFFrAkUtsYipvOJ0ZJgoS5BtDg2rD63HbC0/WQM3xpl
y+WmgyP5prCGQUfAiyRGdN2Vje6GiixKfS+dAPCbx4n1miMPJQxHcv36jcG+fKBAtRWK1RYcQaXx
l4cc8LNEtUxCHkvC4hhyhs8TmVishwGj3aWxZo9bhbZJeqKM6VW9zzB6TAXriBOGJC43pMC7RUBO
/xCh1TFaYhCxc9siwn5hs1bmiBUW9B9hy7PBoAXvBRfufcDLgrA1WKc4PGKtOowzmcxNip7gy3Nr
jkwhbH8ujsDAq8b60LRUDGvvqxpxEiD5AMO94V08JvqyAP5Ogr5GC3Rh29aIqDjUayPpMZXUuucW
PyhWXii5tNEtCGvJ2GLq6wynL0ofcKEbmmAuu4pAtzQpsdH8kpuRu03AJAdoPULZQtWzE+Tzstiq
4O444GNNM649CN2hNWR7D92AM8jVA/tKL8lk66UbILyq996BYjc3yIIamMIaw0XklO1XtmeH26Ad
HR8kXL4jwqm7lLSyHSqJ17NWWOo7k3Az/bdZHappuH7ODewi0rmtLxOk3+VGG+xwaVBZd+vQ/Ns8
S4zf5ew4heEzmKjqtA2YUKucYL8yHICqzqwGb7naxt46EE3tv6x9AjsGl833kulhyBzy0OyCod3+
7evYIexGofhKJwWiSD24rNvfkfmhAm2cXrl+dpIKZpGvzpqEKMlmMkQ5qSBrYozru5I6nWWMov+K
zwocnToZVa9SX8K556tabKoiv2doJ8b808+qGA82hf7JUKZuR8K+88tya2njBbsOYTjvOsUaHzFr
lL9yA9T2veRVPse0gY2Gj3wItR8vONMZxSblMXlheaEhZ+ng48ZkGoduuuo23IzqLDOIvkhzXq3+
XJoqqHMA/2Xt54gk3AFcVoUzeuDdw8xAAFi36gZfvDYu12Uz8aI3vLhoI/KIGoYXIktCRKpeTQ8t
7ffc9tC6DcUfian9Pb0A/ocE7BFN9bcBlZgdfAH+j4RJ8R9MmBCfjie9K6GZSjktVoxaG97VXJqi
hZzclxdE2cJuHmO0hMgR0fjryefVLkPCEhL3dWFcPoWucM3hUyqrQ/4e9yvxV/DrNAdnHMNN7mnB
DOLP9KMDxGgQgn/uQNwFbgpN2kSrezM4DVrVGnRQ3SjbDNZF9EOkcBdRHehwxokJbLEOuVswqJhP
OCHU+C7CogLBNGCCYbYgk2oY+djBulYEDnGB/bUNpDbM4iwteWTBgeNOlp0gxX/cHGl5QlRObnT5
tuszMh8FaogoqFgBAmTRL17zvNBQts7B4SE4qvsbonE6mnCYp6lLyi6gmFWsEYUkQlJkup4gA33T
fV5mUEyw6C8hjeCG1/lcFD+RHUas1GRcyechOhSJGBYjCLJORuDy7R8WBSobEWI9uiAuzMxLa3fE
CJBv3qgfnw41SuvbSHtMqyc7qgMC6Dlm6PA=
`protect end_protected
| bsd-2-clause | c346d244db3d74a370cd0a01d0351d8c | 0.944475 | 1.854759 | false | false | false | false |
Hoernchen/hackrf | firmware/cpld/sgpio_if/top.vhd | 1 | 4,061 | --
-- Copyright 2012 Jared Boone
-- Copyright 2013 Benjamin Vernoux
--
-- This file is part of HackRF.
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2, or (at your option)
-- any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; see the file COPYING. If not, write to
-- the Free Software Foundation, Inc., 51 Franklin Street,
-- Boston, MA 02110-1301, USA.
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
library UNISIM;
use UNISIM.vcomponents.all;
entity top is
Port(
HOST_DATA : inout std_logic_vector(7 downto 0);
HOST_CAPTURE : out std_logic;
HOST_DISABLE : in std_logic;
HOST_DIRECTION : in std_logic;
DA : in std_logic_vector(7 downto 0);
DD : out std_logic_vector(9 downto 0);
CODEC_CLK : in std_logic;
CODEC_X2_CLK : in std_logic;
B1AUX : inout std_logic_vector(16 downto 9);
B2AUX : inout std_logic_vector(16 downto 1)
);
end top;
architecture Behavioral of top is
signal codec_clk_i : std_logic;
signal adc_data_i : std_logic_vector(7 downto 0);
signal dac_data_o : std_logic_vector(9 downto 0);
signal host_clk_i : std_logic;
type transfer_direction is (from_adc, to_dac);
signal transfer_direction_i : transfer_direction;
signal host_data_enable_i : std_logic;
signal host_data_capture_o : std_logic;
signal data_from_host_i : std_logic_vector(7 downto 0);
signal data_to_host_o : std_logic_vector(7 downto 0);
begin
B1AUX <= (others => '0');
B2AUX <= (others => '0');
------------------------------------------------
-- Codec interface
adc_data_i <= DA(7 downto 0);
DD(9 downto 0) <= dac_data_o;
------------------------------------------------
-- Clocks
codec_clk_i <= CODEC_CLK;
BUFG_host : BUFG
port map (
O => host_clk_i,
I => CODEC_X2_CLK
);
------------------------------------------------
-- SGPIO interface
HOST_DATA <= data_to_host_o when transfer_direction_i = from_adc
else (others => 'Z');
data_from_host_i <= HOST_DATA;
HOST_CAPTURE <= host_data_capture_o;
host_data_enable_i <= not HOST_DISABLE;
transfer_direction_i <= to_dac when HOST_DIRECTION = '1'
else from_adc;
------------------------------------------------
process(host_clk_i)
begin
if rising_edge(host_clk_i) then
data_to_host_o <= adc_data_i;
end if;
end process;
process(host_clk_i)
begin
if rising_edge(host_clk_i) then
if transfer_direction_i = to_dac then
dac_data_o <= data_from_host_i & "00";
else
dac_data_o <= (dac_data_o'high => '1', others => '0');
end if;
end if;
end process;
process(host_clk_i, codec_clk_i)
begin
if rising_edge(host_clk_i) then
if transfer_direction_i = to_dac then
if codec_clk_i = '1' then
host_data_capture_o <= host_data_enable_i;
end if;
else
if codec_clk_i = '0' then
host_data_capture_o <= host_data_enable_i;
end if;
end if;
end if;
end process;
end Behavioral;
| gpl-2.0 | 199734c8d7ceb47c0f5efcad5711a932 | 0.520069 | 3.889847 | false | false | false | false |
szanni/aeshw | zybo-base/zybo_bsd/zybo_bsd.srcs/sources_1/bd/system/ip/system_auto_pc_5/fifo_generator_v11_0/ramfifo/wr_logic.vhd | 19 | 37,687 | `protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
HUpwfbtoJu5ljZH1PD1nirfZUiqEH4rdOJmHG3byOsiHMKK3LegkCLnxPuPlk+MO+z4ctY9AQVS+
qDXnVNabAA==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
J5amwDwAOhmwY1AI7aPhS8ck8cUzk3ZbW/PSkoxcoFtS5AuFiIpCT9Eh2Lt0JzHUUKx72jQhC4xP
E8DYUPCIo40JuI++9z5fK4HwpQiCOB47OP9CCbDUXkdRdGgF4e6aIOfD40xCprloxnLZWVs0yawE
2eWpDksVPZ7exWV5yp8=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2013_09", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
kHeSBUaR4Gb9xyNR7/PmBoZ6gckk9p1h7+VOSSxhgJTOkeDKrcZOdIV1GDgFDrDQ7kzRgTiYYdNg
fXk4UhiKwBVyrTjV2sMzg3+WqoUQIK6Jy3j+rnKZ0FHbaJ/B0H/GfbBoAdHe7Ll2JvXvA2JrUnjB
cZCpVeHDgAOSHC+pzlRSIpPSacSQtQcR7XQ/3XaxnZYRC7uHkv276AbG3wIpLBG2zxIX3ZP+ackQ
pH7/JslwJLo+2yMp03WDL60KY4dKN4/3Cbuq0p9ZXqs2Y5D7OEUZNxyvOtt0dnCx89ZP9OSkU6+U
STforoN1MyOGgJ2YZ3QN/z5I0fk2RYpfEM9JsA==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
Lu2s7AKqknRcUE5f3UmM0sxhb8YGklEChkrpjNpqeFmWrHZVTV653SjxOWSucZRxKRWERgvAD5Ge
f+lfXprxLknFOXVThhIZcoGHsP1dAaIYcRFINHuR+NXvmYc17FBsIljnkMKM4grLGNoBCK5BU3oj
+OpUaEAqYZcR3Ny7rME=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
ZNNygMQdh+aYmFNm+RRdz6IwBodkqsu7V9fE3BGXF5I2MBgRK6iGinaX8yLwnKR/gy2F4SnWUzqm
SM6Hy+mVD8IIS+xm7ukIVwLbM9+0zez0kJn+qWOW6DSjxPXqHRWy3fQI42FtwyVBs6pb7/W8Q9NM
y83XMjmhW9gbYNHIHq5e9D7ao/9WQ1Ytg4YhUY4H4cSzY2tHj3tbIsVO5Swzs3K1mz8KunAK9qzN
WNyQE7ctUOauX1bPhyKN8vZcKzkl7x8jPe9GO6BDBcCZS9DeY3P2LTqajNPbMa7b+rdlszJkVZWF
aXg8+G+Fp5cfd6qUK77FET8A+G+lv6qs6bNgOw==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 26160)
`protect data_block
MVTeerMMv1ncahri/iQIJYQfSzBGFwfh2xKaJlpUO9OCwCoVcy27laDrkS4BLZJe0LuE8ZkDBlwx
e1KWTaC12+Vx0oUVRm0qhku1DxzKi0BAHvaeM+m9M/g+NDkv75nCLY/pl4zl5xfjmMAmPUZVCBbc
4fU9JumW+t+smzkCaXxTOB0EC9qCndyRt3Qe6B4aYPJLZpg146+tt1igW3T+O+uIRZljRjjK7nJV
omLmXv9LQpLvVb8J17Xk6Ihxb3iHq4aQOTLXzlWTc0E5kVDJNoyfbNuWKRkIGxs7M25R3kpF5W07
QQVS9gib+seLhpngCebfpN38Fd1/8fIxIdnPcVspxQqGoAAJ4POWeA+SkR7gCC5Zp6dyOJlTUpt7
ntyDhEZJFZrpLqlyXy+wOzZWInBtVzW9VE3Ja/BvE0JQwwWZ19GMDNA4kegRGB/IXX30p/ZYg924
X13LrWKQokrcewYVLDa2OzJjKQQILqyL3TBg3ML9PqDeAmedrlia8bwsq81GxXoW5N2HlA6bqCba
2M8rJVGaykWztO044hMMbK37VdslgbypaPzpWMCeK1kXN00rUd4A1+PFdMkR4MhoCN7Z+3jKwnSl
/t/GmOKB13N+ECa5VbMXpeRzJjhiZk5pyA30cqi18AN1S8iRYHeWb+/CUMryOJBOxnbYVuQcr/0m
6K4f9ge7s5gQarEHkc1Mfwgp3qx0KXWxURBNbr4b3JtLNcP9LYSEWfxbwzhUzP9+3kmCg+nrMBDk
WY9sm7Rcknnizy1JHMFjqVEnxvaD4CtHu0P8GLm0ScOui7WnGDFAGXiQ+60rUob3XsJ2/Rb8O51g
Yl/Xqyu2nBzncOeqM80xlyPCFZPZAgN+bnkrALzhZh0yjduu0W8lwYN3GfyK5B4AfXyfZLhCD+Pd
81j1PRdUedJtXXEv+4VJKIqcKKMQhx4rxLW9YpR+qQPfbFKH70F2YqMuVs2BWqxkWifstXzG/xl5
MELDDnAlOP2+GpQkdhCrZFMS7vErc/MH8uZ/qZKFyTHCrtLQOu18HfjReMxhTYY19rDmh7/r1wwz
wS7WzRNL4C7xB0VPh7NbKtKu2G2d/IV+oC5KGRXlQBWjeE5DKodz3IZNpZCLPts9y2EuCohZFIxk
+qoQjlwemaC08Q8Yy4ISGo0F2eMe8UL1LuI40auWZ+iqu3p+hWmhld4+DHsf9+YVJB4GuyOwdoBY
pM/KZgCr+eplopY98dMj/+Ffroy+drZFquMQoEHhB00ggVbc4bo5VMGlJsq26wuh8QqEd72NRPdR
wc/V507sJPODGQeXeMHJnuipCKtiPgAq3t68Xd8FEjGVpH3XP097wfoyhuNJeZwYxzo4A+l98Q8c
va97Ah8g7z3rH1+bH6IYyo0sFLHNsEohbOknfiEkzALuDP6K/RSjNrwQ48bUlm8fP9/1vL04vXYS
vPHXjxB4WVC06T2LpilUo0ASfpVNnYHua/7FZNTo3cGNuvrh9iN7emjyoacblC2GQD82xbFwNkss
HiNJmnRjlEZ955r0s7bsvTf2iCnFTpxsIDQyTNT6K1QpZbw8Bd3AMc3tpIuUSIPZPNpd92TbctoA
rzwLf+pagfyy4XygmHfz30kZOi+EqulTpf+Hgb8Ku8O/nExcTzKMBn3S8PJnm0ioxouZAXKj+IEZ
3rRo2qYWasqJtwYeEw3Oens1mQnyYL13t0I1V8pl2HGQ8frOf2JGzIOCePD1LXlQavZeHkQTAjO4
vKIWo7Tcm3nQnr5H3ZHWEKoIFhcZiSPQpEfw6D2qxbanACXSKwTrTPFYp0DtMQu7596In4KLb+kA
dZ3wiNDPesJ6q4z2LDc/f4KUYOXitr5n/8w4FiQiNmSHCcy0vVrtYn+Fh5sDC/E0Qtg6qdK45/kZ
vqtQM/5yvuhLhlYg3MthYTx4ufjMennzBXfHWGB0rV/lWwiJYYTarV+NVjLsiMThQ/jYJ/CvY98Z
sMEM1D1JTR/twXXTCSBC9gq/Mb2xwEZGj543CJKHcGetcTvE1sfWhJWfu4VyL+pfA+mlzYVy3lDR
KH7WTWqBiy2Oe6nT5ll/pz1SyiVWcK+4nkpMKHYZlnwW10lh2qlcpONX+aYTDnivH4nwqfwVq6co
N+Z6vEH7xwU5aMFnbodOO+zOkiMuv4Ui9vuAnhzpadiHhOEXl6yYFbyts6OMPBOm7PPKL3MS3vDq
V0Jj2qxN3jXIWrq/LEdREWJ2YZ+xIR+diH/7yLzs/kC0hjjcwpGnA0Cyng7Jdow6Gn+ysmUAXyo2
XZBBgIUSee1NEYVpGO6BiVe37Rb65juTET5i68+d/m+IzsghtMvaIDduVPG+134I38HaRtpDhULJ
xlGvPfxKKbPrCaGeesjkqXpxmuRzEkLrcF7ifT32gSMqvm0iD7H3oK5oG+76IhTDAk0V6CUeP+DW
Si3dZ7CoIIw55s58oeleiSr81uL0ZvUrLheUGB8tfJjp9Sh8FwMB/9XXX151CnyngFTdl60VAgFC
F3zMq0tzOlhmuf6U9JI6dJaSVi5TOwpl2mynv0UmGQ6og+UZKF415701lKHGA61rjP46dp2qO5X2
61oybtltBjyhHVkjFM19rNNz/JkNbjwsDH2VaVuBd3jsX7ihWo6QAqrL7kp3EdaINOAvgXrEUqJe
hyBGH9RzUNcIm52zLJikrHtJ9HP+eiMcslQearptYKLcUZugWDISfwJq/dcA31ILZCEYq0UBYX0Q
pkUio36LkIRjYMr9UDl2TlUrij3q5Efd7fCx8aiO5V+Nyt5m33mjzYBE2S3ZzMCkS2KWN41a2MnY
0MTQLb9jvwfUARaZKaLV+DJs5QzgDdPx0voVmFcpmq6dBnCGWuhHXqHyqJ4tpzklFrTSHxKYto9q
U54aPJUwFHXX2jH/845ovt9eA8hqjjv2838Rpflkwq2QXeWBKOqlF99O8KutD+guSmEgvDXFF0H1
DghB+8OZ7VqULJp6m91A8jtyEDIl/2d1iHc8NX+IXMWhg5DAHMNaklMIH8pxObPkVUaEiTL7mtGB
4EpJMKTtLlpUQoVB62nXRFR9V4NTNlj2ZDWi5VCbdLQD3W8xEVos14H4rLKngmKrLqQSdspS9jjT
63Cs1fWAp8RBRDf3EVpuBB8NaxB9Imx+LIghkW6UZgOBtIw+zjOb242m1va1wVOoKMlS0RvgVT5A
xD9+vviDozSG/qvFOLmhziwav+89A1FccBLYNyVpjBFZFpR8PUdU5qm4fWNa60/7yQg6SlmaeBex
FxhDskPKtwv6NYkR4VtHiesrWy87iDtGvznk8V+n5I0dLN4fxArmB65aSjawJZHMrqU1LVJbIUD7
YC/zn3DOBJR/PEaIpPtHoSNwR3RGppuAotApIjlR03b8JOhj00YXxHapaZoHlKbYiqwxwbXUFO5R
ESXeW02vwXAjXhm4Ng1ODBUg+kAxrYkSDI/wRfwB4d0GJ0kYqU7/QQWGY5KeiyBOEV7qqb3PTgxD
D5nvxYJ8mRMnQf7hP+OEAsPd3xy2KcAQuu9EFC4TRe0cOXjj47DB9p8KupKwWhz3J7YpIpwBi/zS
Tc6YGDBFBZFFYsQrlzB2F+NZsBo98aNEb5pLb77T2zr4RdQBvz5boy0ucUNWRFsjsBqRyopPksy5
H3xRrig+SGzf14Y4DPjIJf034Wea3OYKDcBzLMwaCJavnVD8gQBbRF3vWsw7FEekmUeIi1ptKP4a
AVMvzTNSQfU8MxBs7ao+Jm2UKxeOwx9/fHZFEf934ysMHbb1vo06QBo+ClkmvWSkj9laBuuUfqbG
7fLgqERqtkqo2OZTvGZNFCej9r8TlX7bIj9HH+m0g/V017pTUlkWjtMR4VP2+k8VHZxqXZXIidyF
OOnn5vSChhhSgzkpHYj2sm5ooFuVc8M7eJUsF7r1DKsDL+QCGi3cFbywqo/SMVF8cAbg2OJo4N+X
S8+gRxNqVh3d2aOGEtQVZ8q9eTY/LyfK+3VJJgdNMr6YebHRr1zT4+WlXq5pysl6R8bEqVB9oWwV
lOL1QrYqzbhiUOXEMtovYLunYK/El/ZT6gfMIxEWSGAv0qN1MYOGRUNhJnp4BiUd2QD1x7tS4Zh5
cxaFaMbeYlZWWIV0PnKXboStGYAXNVkZbZcxN3vK4NiH2vrurPKX2oXlexCXzt96ZnOoBKZUKt3D
24eswf9TA+1/ClJY1e3ZWln5r1uxBlYoYn/ufx6ZjLLA05caQ4Nu0zpmovhJhHrsSempEIB+R3Cb
6Yw9pwzov/LgWSRRd6KPqHIHBVfd459sp8CoGDi2Xz/q/9V7KrbPUOdT3zdofsotJsjCYHMP9oYo
rcmlx6ymbt4nvC+ONNNVSdRo5o0NkUxA9yxPU3VRNpD0/9SYhCIYiQVun4QN2mvsbEtPO+wJkP6F
g/gUvNbaRScFYgumoGfpmXd+W4P0AKhRyd+p0mpRu1hmLzF5eLRU46VTTSyg7tPyPkDy8/NIhcXC
xcmJnPnJwBg2HgqM3zIvsTRQ1ekx3ENSglScKqU5Bv3iFHuk2aJEBDZWmvkO+IAKc6C0NPt4JrSq
P5rquJe3ilLKitdgZ5gqXBgsCLcGb1A7Jh5Vl0+C5gczGD2tqwjjimna5LSsgm8auAvwjVS+cI6c
cwwaaVILp6ynFZGUxhRASy5n0S43YDI63jrC8dPDN8Ys5hajJwYtYGuUyyFtsVxjKVR1MMJTQ5Q+
LnHWA0dfmDRyyXFf5TfG7KRefeW2JaI576ahiLSuxSIF5HJw2LbzUTjnb9mstlS5ssDEKCGpTfyn
32tIiGiWtaMvvzO70iZyeKgHbFTFhchHb+8b7AiABLC5p6xB+/LmUKKhcZ7dEwhj0q3/MEMyEV5T
1nI/E1TONjnDLVwlguonK2d3IwCQxZflRBduizgPIN3bv1X4MbnCU4ni+/o4RQz62oEXS760Rj5U
ea64PrQyYEvG6UESnzTVMdVPqu4xQjNwJfoSmXNpnBGv3PDNYo9l3MKIRGNNLiFzjxHykuelvK6m
3izTo8NXgupP9+7sA6UF+EtZHkE/A8cm1qmT/eqLKpQ1WXRnh5kjL9X9MKjVKaR7PR7nZvQCAL0V
IwmAnOzE/X2jnmjW3UX1B/kMoXu/T4azt6dzbWLyenWq2Ts6XVKwzqOWVaNdFLjqElvkbb7kkk93
HyEKzyuVUYwzHPvUH9TJUvpTZ4wdnwIqEGiNp1onX3/O4gvdMvjl8wnLI8l1Dx+IObq+mb43o67x
+LKApbUAzJmDv9SC2P6nQVCO+75RElht4YDNQkb+pNOfeOJ5oIPmtqa1XnuOYXeE4jZf7NZ7WBLP
9i4JnM0qw2mRH3ogKSJWLIjq9o5mYeKWQ6dmMZxudAJufxMqjcdANR2bKMzp7/m/fsp5kaFz/xuM
guFSYmPDprQKvifiXeMufakMsKpJCWdxwV88IFasajNbevjxcKYWhNxdepzjoGrke/ggxFQiMzgg
rMt2uCIu3J1A0JB6xa8ydTkjc+LQWA0iu4A6yE0XfpyzpgsNyKJH36E2XbWshUKqUy2KW2hOSYi7
5tUdYGyNkpPEp/I4DyA+f93JCr0AI0ib8LmKD0hbuge2ugED95ZyOGatT7XKZuWlwZy0M1075Y6+
7gLA44daL/Nxa8I9/uRV1HzdMX8+7QLgYefwdp3WX2DN1A/GzvzaQR9RlRTsvWdWIfXjgL8MaJWI
7aa77GdaUSVfBkvgBFdFUXrkcxTqa8HGaBVFIalXtaxiuOnbAAeReBZ5QwofRrJfDwLp9AaiQ+4z
xSk4ui5r/aNne7vcpjsW2ghrN0a19xa304/nhboaWvhdtKglBBreIKvdCOZzgNhTxM9UaBYP1qmt
bogRRDiK4w2/e5LovqyRaXCraihjUZTRT6Tpf5v9aOvcZLLNZYu/2KjuYgBIpz7UCiHCM9ni1KD6
kHPP5PxJoh9tEzfwySMzPGWZBCpkqWbUaqCdQEVf4mH07dzvi9nvVRShx3qV8OY6Fyz6AZMwKAsx
eCKD2GgEdOFSS8Pl7CmWaoYVdq8tZY7hZBAf8sY8nlwUhEFXH0HgTCB3p6MnNTZTF/AtV7A9U5nr
U7dk/KRKtkeADxfPstZ/U5K6Z80Pb61Wx/ElP1KsvQyWHeRSfFoHzB5cD1GPXrJ6W//V0a60j0sJ
YSWFXy8Awp33xo3Ms16fS3lovRhx3pzPJ3w+YCEiVeKzQ1KHCgii0LwG4/uobex/NP6EZjWEWcw4
D39SvkI7Pk8VkYnC/i4k6b2YpKmwR5JbpJX5U9WHtgCAwtOiL13o5biCnCb8obdUbeZmuEZnBimN
4is+GpivfrmSUyfb082eB4j549Qdn2RJ32Z9CDYuodRdSYYGmLJm2WSfTtU0t3bvXRjlVrAna/B0
t1pKulOkBWrcdXJ3ZggPfsUu56BT8kZITV15O/edVj8yZtYx9fpwMOk/554FxhjYiFrynPuP20gJ
3KZ5Sf7qBcF+Zo6BlAsNpRy4M79KXCeGagzYY6lCiH5V8eDmmZOwe8alj7hDoIY70tP3bvIF32fC
sI07jrHFWG96vRY7oSziqMPLGgFueABs8L2HbgJlv8SuqctKaWIY66uoVkCkOaqMhR0vVGVnGNg4
KgmXFXO2kcoUwgf+4G/GD014L5Nn+QBEM7zrZRrRgGigAham0Zx92vxVA2xv12EEtDMt51AoqCEf
xQ8E8puIdXPspTR05wZzauvYryfaTY/5XFp7ski2t+nbgLtKE9dylH5e3iLWetfFCbL5rw3jFqj1
J8AmiLR1+ikdeznzTqXpRjP9/Bh5Qkp1t5E2mmgyIbW9V2VIpIzC1jGoL2KzoUIPHx3XDTBfyXSA
AgnrrZsfsPn8cPhleIAH11dBJ8ikn7b9EHJmIaRXI+nSg6f1CVWrww5NMBO/slgAh1xb5HvoH6Fu
QPxigjn64trA324lWB+VpqeGLftu7jCP88BlMPI4uG5MRNQpnIbu2q8CUAhlWBhDpMYw1idpWLI2
P2kYp92bEMpiTye5Ed4TQt338LoG4cmBi+cZLdpQHIj8rK2Kss1z7yG3g7gH3RWRi8lgYHFBFYL2
0aHHLcXOOWWpDudicFkEbE+xb8ER94G/pImXz0MKdA7QfgBcvCwlC9cevV0rlPaGSkV8A9p6/ZHk
od1kih26xeTH/ift4Du/SWCVIxEGqyVCKPwFG55ThHFBUzdFu0nfGA3yNuN8IJbK3Wu4WN83D+V8
3SW6JMdqXFu+PM5647/vlmHJ/Pu7OGvotKtXudALLTsbxOPmo/HyCzzaewlWxhtb4Hnj9lIbvC9h
zg5oZetJabG4+GtgxYwnMalDziqe5FHan3S6OFsfe1f9vZz8oQWxAnW2ziDd6NiS2dIkETWP1St+
5eZwv/AD08C6c5Np6IcwZ0aTUCLYy5lH2cNTofZQbhR/XRsDhLIMzyYTet5rduzTE2fVfxRMPZa4
7+k9Hw8zWsV/rWiIU7tuz1l/H81PXx33VWZwdlo+Fi8PzEzVy1avqDV8m9f7TRtY+rzGZGG56HtN
WMmxwqNxcYUkY8hLx7MHfyvTZAoDCpbF8s5FeRxEX4Ucu3R7euRAVRP5m09oA8i6rphuxDVwnf09
ALom1Ht5rzUTU2COycGAoSRGFkrPKj2Oeom5hmuRwWKtWW/KQSyXnA/SjKFssx4oRCGGrWWjuMih
pKfWN6AJn6OJkI5BfenltDgPg3flPKWK8/O2Tde9TyKkMkcNse944LV/jAX1orYgZn4tfQICKiTe
EwvjFMZX61K7VX8zuELT38bygf+m+oX9y6uxshKB6quaaDWK/uVdCfYHp0MTT3+Wrj9dXsr741l2
OEgAF9Qo/kF2/fUY7GN3vDPutw6DGRYpPSC8zTj1JHBs1UdWrxSg3e97zOIiTBgvPkgN+YpuVpCA
DRYEwN5UogVCJIm3ROU1VhMZDemY5x23ucCndmcTxtJcuJAxcnKVFahdL9lE4qkeQwzqFOXiPmPy
VCU1VDxB4jcY6Lv9rWM+2rDPgzVlDd47KKGtqt+y7dsJoa2KuBubfCtijILIloWdLStyxYnY7xql
ZxhY/PPbYOPppwY9S2Dswtj1m84M6DZKZejlzJyzvbVdG6rNejY2LfnmVjJIvyF7bfzcaxTayaAd
lAB6y+79pzbhDbwVGvgWiUDA3bZQdCz3QLjcxYUbnO4dzEn6UaTW2Ps3GFKgO5Niw+gmUshwe7TA
IcNWPymgLLJHF5TgpAYMSypt2MLHX9/VF7RBZDkU+qNI8t2bEhWR11RPztoFLAB+0cY9uCJTbWPe
YVFayNZxlryqZrFy0kAAE6V4pcthIT9J9f75hystkAwKpg+nzLfxrOioRxzpgv42vwRaRCeXIW3X
OCWpq3XDI3jFqoLr8xRCkKmbzDXU9hiWcYqEHOlxCHnhMhwU38hsdwEw+zzl8h4ahCd80Y8btQdm
I50kGi8u461kKx9EaaDudxGuKXkdtgCfsNKlTl01vGxYJUOEshGBKNQKzymNcI27jVABA1MRtCWS
vwjOcFNmoqXKLTWrYVA67ruVN18Dwyh1WyMjkLGAxrGMpQci0KOf4P8iBYYY9gxUJh0yMheGJXcE
/PQIqS+/CTj6O3r4i0olYANO/tFML7+xt5ty/4WnClPkrG3MMXudvZ6+ZZhNMP43R/aNRW4784hB
dpgRtTjI6z2g/27mmEuQdZqaBH31awiSdLUjgho44AzfKqcP0S2eYMgWi/G8u3L95W20GzayK/le
d2S32UVMEhCZHKGhb+x5PpfCr33KYV5Nln7Gp1CFFK+VZA17WjQ+ZmmMjBFKmSqECwbVfY7qWCdK
eGA2QGc2KinVOWiur3ZTQmS+5b//yjqAcQb9/E1ihAupBtmojtgfG+kpe8NpA6sOv/nZXC3Dn1p9
YJCf0SlK4XnOXQlL7bBgEFIagfefW8ct1GGZb+CnMZrfKIjA+85GbWzusMDq/Qt82RXzyvIgRXwd
Y37bbZF8AGc4m7j1MVPvX8r1weVMCbxxTLl8RYVcDm2hAXZYz+R8WTlXrEwvkITJROca+S2Pb39k
FP8RRWDIQ3uSSYXrf/3bEt31eBSncuYppef0V2YgeCUOcCAkUB25zjKe7Ag6i90yMZtzh/U9NExi
9x6jnAyy+ILexo+tR6UX9BDhRWbIu2FkqZUuSABI8HZ27jpeDu/zFF8SkALj8ntT+xic4uEsF1M2
3cpj59M1ncW2SLibcO1/gCdxbdQpQU3fMObdCwb0WEYCXDCICJ/Ws5OUrnv7Ze9Myyc2oaP76uAZ
lKrj9VHH5j7c8KjJIAEbtiz8AzzjIup9hg+5ixlKkLspxGaVb7gJzXcdJl/SuZq7894I9PT4M6Ad
puJdZ4BsxJ5C7AhIBLEAwkrKmXhYp5EFZ67Tj59Hw2afF5chCjwoaP5kpKYBht9qxA9WOytY160K
ZuSBC9JZB5qIsaLT0feHFUD3Ro2SdD9CtN9oUXeWxKg1HP+u1g3MNmpxY/CVqscMszlEUsoB3WkQ
6nbNYljkGI2IzjJgE0ePvFXilDZ3rzUZSzOA+dLom/6C8Jp5QtrtnUqwZVgSBXvLKVcZ6LW6xSvl
Fp2Irw8U0P8mKgul7GosNq0ZZK5AbrBf6dNYs7CZoNZU/Os9n1CjH9MunrI0Bc08hj3jD9R6BLdn
xjYTSlM6+l0l63+1Hc+T9m5cW3DLHz1fbkJit0kxmWd+gNkZNa+bZ/wPlXmO4bbyJq69xjKluXju
+dseO5J7fWm6Fz8ZY1bEFoXPZhPU47TyTtD0xV8wiARUmt/fxObexUncEbW4HSOek3Bsfa2IXewM
YMH38cdX5vS8TLKZ887hvFUtI8LL75VA2kngCfeeNBKNhHw+nn+3uJhvYBjUp7z/QlDqbH7x546R
kdEPKpc3MHxtlSMuEITYtYRuha4MauNgcVIf4tBkCWafaxWyxjQs8fOCqecJ9PyhqHGm9KYSgV7U
xCEHAokjVzp2XG2F4YRBHfYcyb9IXj5/0640VPPuK3NCWacOCXExElyrhYaLW7DB7zCFW6DguB0h
QbkfCPQ8wLieFnjNRToiXFCRSrHiTwX28q/btyZ+pAJSC+eZZbh0MPGlliArRKQz9bzFDXOoCzQM
558Sms5+nT54QFyRVtf0CFw/blMoM+oAW60vImQ5mQRPVlvDBqEs4kD097Wic56U6WYA+S8C4Gu3
aayUlWdEX7AsC/5MGeefHnrRrnH4v4uXsyKx6Q3QTepuGvogLyegYBnLn5pPTKJzefsdJuM4tdXZ
xPUmrfPGRhH5cN6keC2lqNDvdAF55TcVorMDbCTqtxtTZB6HZob1zoft6c8yeAxrfPudy8gXFG52
8EZ8JGehd/i8PjRl3lPtGCadW9XBMkUqUiblOMLk54MzoyAHYu1tP+7JTJGCqeOG9iaRaoKL+0Qp
V42M7k5YjK0pen2keBMkNzAAkQDeIL2cnbEeIcy0L1vk3MRFa3Bjr/6bYbytMLrhdc6Ab5dxit6e
4+xiXphbj5rebSl0upTiyEOdFlsRjvA2FU1+QtxFBD/F1gtMj5E4saxQ4M85H+r+MJWv1DciVfHs
zKUdSyHEPuDSR7y49Amez1YkqjkxCoXZMsVQj2VcFT0G6u+EYIQMbM/q8bg5tIydsnVLibzjaW+H
hx8/pwdJYr0RHfPXnTkXV/dPS/zHfIWrX+vkZ0mBPWXkAJu/z1Kco8Fr9IeRvLbBMjpE2IwoI2O3
JpZLFbn5jUjAx1wzfJgxULgdYkVtlbmj8tFYiUGWYGVBycXRj9SNAPFAI6BGt8HG41YNLmgQW5na
SL8Y4/ibnKxXYJLliKtLrTmPtlvrUEnGyOZrWLflslFRMqpYGc4/0SBd5y3Bkx1tEbF9ZGitAvBO
1p/G0eE2Z6jFAtDV5L3pL2+JMD8aKG/Dbs+4zyn/7K4XfGYc8ZQ7FBx3vbceGiydXvXfTO4QjUg0
vxDasIqHsSwuSzrVGPlNKDuzZJ7EAn0PyExuY93SeHqdd5jAFTmP1/C8Br+v55yRglmMVAfhBilK
jeBqAErNDIQE33Bxz9QIT5Fnq7OuEcVPBNpl4BdKJo8XZ93byDIeIvrTBQ8/40zwyqWoL/JD5oMO
5v6UDCc5hEhsvU4BPuFAbHHhid9BXlN3s0mGildf50Sm8BvDFUalw3tIsbpnaSSr71nuiwwPQchd
gTT9GipiU53wGPowKK8S4rpl4BiTXoWhPOsv61TKC2wMmLSUut+uBe/z3irJ3HnXr65n1Fru1SiK
24SyacUBxmeHqumao4DtuPYjB+FyUoWuE+9OVF9XpeM+eKKJgdLuVZdd3CnngPc/Fj07SG1lIKZk
oJBbQR0oVF1MCiEfWg6dfbl/mCE9FDH5NCzBnPm/fVfKZxu/aHVfkiSRqXqWSYbhroWmdY+mF5ph
tz0AvN+nXDZE8dkMQDqRf0WV0r6dVda9B0Fj3Jssy0cfQ299F52rMx/xvs9JEBDR38lShNLas9iO
DgjKGPrgmFMDg8mflSKEfGtI/7S440I/9QVY1ESrALCKJ87s0DfZknhYKPs5+00iGQe00Z70vs3n
SlZp4YyBoxZocnMcNGzzvJDWTXotTePs0fD6g2DXU2TkOhcv7o2UhGMz+j2GZHdI6hkI80LIQm9p
QmfTVxDIR99BA8SUsewxUuEoQYBT9k6RPmxsIMIGZAJjFabiRNLewHPfnziBCjRibhhP2DUZpq9H
D9MA9LegaurSsXITCoamK4di0rOs954lxntxfCpdrrKVC4NO8h8BDFWI48/xNHWaHTmq/XPfE2Z5
TSHqmmGJoMijMXL7Patuao9ZDI+FYyZOBjS5dgS7YlCs6kchLnA+XN6wR0LjK5OtpxRbXUryEpZ7
z7NtYpt/xeDHlyiBK+yXiz0hawNkpwqJ4dil2NUb43OBqrixlf8vDXyRxyib/A9//4aOtfQxy5YY
BEtW+V5FG/qwLazI3B0t7D/RuO48EWVthN15rmC8+0ZTRjULmJMGIG1gMjLKrqCIkkCaVglOC4rI
6UqQ3RCD0nfUpsv7FQRY9a/V+rky2BQjDo0Xa9PHJovW7u+iYOxv0EpgLptAwY7ehwP93L8R3SvW
eIa9iYL9ZRytqlIljIMaTN5BA72RCd+kLRskUiFDEjz8+NHtcqf4i033ijciNNBdVOMFH0miS8Rp
S9EOzy9+5Wc5XaNFVr3lJ3g6MlexUYCceTxR0Y75nsbzxmxHXh2GSzM66Pw60ZEdo8lqoEJ1MYSl
nBGOCqe0XBbMyBf/6PDOhdsPNO7JxBFZXOCYTEZhyAgO7eY/Evymqlkg0bgXzP4BD5p+urD7mfjG
uOrmfg3FpL+JtRDVEHnebG3Vh/YtW1hdcCwSaTO+apFkk9sRjD/silRqZlpxkx1UKj2SDx614dWH
8v3DRZkrCvGqVPsEtk6iweBaXgCE6GnR069/RNJ/cXgI5bIqm+i1Z4gVL2400I4vg3MnGBjclZVQ
im+l3s0SpChJnYJLREQ5kwd7kT0a52X7ZE1O/e9s6TvU7t36so7qxCAsOJub32wqx4CmOSr1lYG8
fBtuRsDnI5FYr9xTqxAUBDFsadrS2cL8oclvQ6v/juy09kCy7uuPCKaIyI9mVoMcFcUOxYTXh7Fh
tRHe3k2kSXM61OqxcXK8Gvvf+9tYfmlZxfYaxOvaaRj6290g1N/zHLiHrFCMWFuZj2iWJMNnGKul
Md28AOVzgoU0Y7Me07PHqJsXmf+X6jFYWxDDurprsL1EEY5WAeA8OMgyE2FB6pY9C6Wi+ldrP24j
dV0SHeMIxv5LirwtuyQ/lm7GnMztVUerMMt2+HCmCyWWWLVbchds1k9B8p7fEPp5Ryj+QXpWXYFZ
r+0n9DkxZx6tKivXEfOwMgH1SnAw/TmcMQ8PC3BgigjwPfXDqamUKrmXYZoI7FpGwZOdOh4OT5/b
CQ9Vp8+Fkh/kAwxXP0IVM/1ePGjtw2pwlVZT5td2pKMARadi+8/UAcc9MRSmo3Ou8fneXgp0mY4Y
lsliKjm23ROtjtXtPkHqGrEEjT5KVBAsJbY4YgLEUwiP8I16hL/oF/3pPLBa5UBKqh9emXZEaB2w
j4X+tCowfR+tJxeuKZcn24tz84e58N0sKe4VJKGM8RnIrbYk+vn0Z0A2+ojVfsKoGXGg1xOQRLFz
9QSGo8399OYmacide7GS0RzspZU0YBTa4DkcoOkQnr6JsBgv/CfWUwMTfHWJwEK1W5WTGyb9jPGP
8m0F5zAdw4ul/xaSARecsm5LyAy/TE3JPMQdpGJRZVbljSAd/5u6DlzxAIgyZlnRLDM0NCdaY/ww
bMsBDg954/PQ6XCy4tIJ3LljwQSqV0Y8mxeIh0XJdVIDsIY3b5KHSujviNsNHhBH7ud32js8rIZR
Z98vEoECEcDQqkcWDQB0B4paQRaNQqY/gBehdoPc/Bb25KHa7vNwEK2hM0GbLJy9rCA+KfdDi1vL
2QtYnfqZcg0f2JLzLpzvroaWo9uBlWEoQ15DeQFahSd4slPhMua2Vrj7DNjKw+tc0CEX8YWPyt1c
ZgB5k4Wac/3rEUnqaBOkIoGEZsss1OUmpGCuYaek3TXOMQcvlqqqASa/h0nZxecqCa03PGoWdz6Q
sO1HAK1XoOyxzLnGPpgHJlzfkgyLGhmVvHnhOxLmKc1J4iAScZk6BZc8fT5yShV8MjgoaAytjh+K
0XFUxkeqAa6vBKKyLnBhlvKhVT4vGYYzblbCZ1c9eEZssYceblRLHcAKGkWBUjI2MWn17JGwURDP
EpEUstMiHNlXda7V/nupGD4Amt9FP8FuQwvPzlnEgnUDFHDt0bBKum/6xEskueI8vFT+AoJfp+ZJ
rXl3KnkdxCEK1V1b4+MT7qx4tedpoS15u3XVzNndNzF2mY6veaIYVNrqxZXSVjWFa2YM/kO18fxA
X8gtXNsvNBwi9eD69Q20JqTtvJ8XFkCvPovNq+bW2Cc+9Yx3tLv5kCmKMIXvZZMH5sfHcAihFeyD
j0GwYreShd5QmlTsp6sBoVyD+F5kACpViLyRk7CLdU6XyiFbTpA7WDrDv3zFupWdhgL4xeS9rWeW
gMm7ocDzGZpX347x51q5jdo9vLFI7evt+14DO3Qk7QNJBMBa+vf80I4cr/XYBFjYPEnVoNyvXu3r
TFZEjiQH4JiNti+z0YkK4Qc9qrmP6cr5DixHkqLZXDyaqVzPec1HUq3JSfkGUIkPBp5a04csNLLW
6LOmzJgXZEXUHPbq7Gk0Fqs4QKdUYxrP/hEYmMr/3EieA2Goi778GTyK5ULSxuQF0a1LZ+65Cfxy
rPAb9kfijS5WTdMnPzsPBDF2UFRybeQiVflKetnoGvgujIOCSMyyWwtdLNx070aSG2QAZwQY5Q6w
V9LiNRjQgGw27hhoRo6LruV8paM52Qv0aZQuXw3ahoUfkeKPskwdnKzcmomP79s7UX9jUILxXN3q
uFLwAZdfe1S8X4+ouZ6A/k1PNUT3x9pGc+ngcvsDe2YpSsIC8hyHcwzgAnym0CFKZGZDBLY+QdZG
fQ7I8igc3l4qt3VzpuWpSIF7C3apfQvHXgDc7psgBdSrNYhtKx30S18dsKh0zh8LK/dwORC6R2+9
l93dd0Go7QMN0dmeAKmnoryjCsUfyKjEOaGdrIbVG0Awb2TpJHD9hQIyeVvhGRdU9p2rrOz8j8J4
BDVU/fPuOMGeCpNTe+baA6Yn/wy+UksNxMgDYAQCR5L8ZpNcbucrbicoPmNtWYjGgpKy1LXJ5+Rx
APX0WEXhWgsFAgS3T4RrTSNof1DNY3gYXbuSwmfiRVtOeAPyBLh9f6lX0LU9ru/wgM8/dTLxj/tb
+1kcK++c7zJlI4oU+OMqIR9jyXmxppePuFLgkNiorKmeV684DEWQB/ImTM1imoqRGlDf8Ve+/upD
MgtZDo7U27FvFCL/Bsh9OyUhIeFJoA7/HIK63U7Pmxn7oxMGfGC4sBjm78kn3OEiOeL1vHuMa7Ld
ApCJKPP2+iafe8EumXy1ojITCXnI1q9X/LJ+NkNfxLwJlnl+Emkpun/25bpdVVWpOg/abaLlxlcX
qZw9Fe3NaByoCI85ZKxWTSH0Je0CBFh//DcNVAIkK7GujaCJurF6oTgw7fl5b9g5ZYq2tRfAFpSM
Nu19AUMgV0Pv1VEW+MtHxptjKSaTFBVQ+2Q64ckGAak9DNAwqmUJdNfMs9RhLsLwWwIz9Bi97WlM
KLgwJTrJ3meyLVMxK/IjgX5M/+6AhF+WkJVW8kfN9iqyxHnkRIYBahke0CuJ8rVzyUKZmBRtQ3a/
nOgUjzbL2JHom1NujSamvCX1sALuNcPUmzWGbKz8LQnqbB2ZoRFvGQuSpJ/Xvqm+IpthGq3cqRi4
UU6HJJUzd/TO1m0dle3QME5WSKbTV7/WoJufd2uYZDtwcIT7YEjjTmSUyG7X9A4polw44CgyJctH
5XCMwpUsl++0Mv6J+/FlHneQisaW5WSMVKF2T1bbL3I6/JLsJpmmWDsOmAdjj5aGDHasA4v+Lhhc
eVq+T4oN7lQR3pI7EiOxOsv+yOz5nYQ14EUDlm5g1FDphk0LxL1+MmyZiBBTyi8/hTkFulNCNfuj
LCJlEmFstc/9rq3llcwN0nuQLuFk3RAkMxBgpHxodE4G91K/jwRIAjAakICqM3QN4lGxp4qUPeXy
lnd56b7FVjWwac/jtKPRbZd4nME8BBa/3vJuOr/Gqb30uF/EvW/D3kk3538KI6VmvT78XV2KFPUC
Z75BHnCLu45ETGuHKyP4rhCcitAJoizAEAvCUiI+ihEnVqDP+zgoEEdMnBfSwwfcqnHT3pExwJgX
9zaO6Jn/bZJFVaeLL7+1P3v8PLW/MjK/Y2iubilSiycDpRxqNaofvhFhB4wBdu3WIIYVKFlgkywd
88Wn4qZHLVNxm2EyOuN4cHeR88InpfrMZn2vY9KTz2L1Big1ugVq0dZjMqQv9R+/UiKc/VR13rW2
iFyVLaUtgdcrG1mkwCNZy5c8kCYghC0o2l8mfnu8z1R8FuRbkCCBUmQvnXN9ORvaLaBQw4hRXrsB
YTQhSjtzCx15RNoor1yv+I7Fp0cJrh1T5bX9A8o40FTln9de8Z6hwiqOxAzBeVXWuqAPBo0fQimX
D/VS4trcY88VvbHDCRFG1ACLg4F1tfSVH4WbtkD1BFkYQbSa/IZQ9pcRVY7Mo5ealt95QCp2F69M
8aGumb8MmNwFQms3de9KnLEw0EuSHQsguIdcWLD9sozt8NMwbJoADpvatyEMfPlbV0JuDeYwCA34
+Bm5Cdp/L2QIeZbuFUnlbIzIx0rThPDHyFXQV5LeMvHgqGBNNugXZ7gR9EF2fyvmIuh++5RpK6CR
UpCCEWns0vVQo/oDnACjuNYh/TDueV17miHuauoqVsh82r7V3cUrb7yT3CeOUf/c9KRTILQd9xU/
vwEZ6itXg2/ntcK7y+CbyUElpyr63ir0eXqEtvHR1bT9/pDt/W4IFiY3JqNuDOlwnpR1QlulL7r1
KrbOQqlr+B4b3CziVDMyrBnLxBzkym6AyaFIaSc4JEX3LJKHtSFk0iGADPkthxn0VWdiQ2TT4GZ6
hXT1vjXFEzC2TmSKbWKcC+JzyB0LN2AU7wY9i0IkOis6wNO1/fqGpbMAygHEYG1cbNw3hnN4A7lr
aYyipE8/GQ8FxL+tkkBt15gHQ40h+nXSSsqGa4Dvv4bIUxpifTz7oLCgBjxXoRIPp6MSL2olWfdq
pkfA8yG/DAx7ZRBaPefDy+XV2JV3g8/EFp1NvRskSZS9fRES0n9x0GKwjxqeT09Im2g6lAZMd572
lj+af32hnc8Z9ymIG6lkkHxa5y+t5OAQ7O31fhCoJRUrTTcp8xBXxzgKzCSO9sW7sZtPg70Y874B
RQf/azBJujGkhT2Kzw6FQS1X3ww9R1HbLonQ71JA+fUh+w6pR3UvoT7IgkTBhZ9om6KFUBUZPt1o
3VtYVawyX+W0mAL0zg+v4m5TJzGHvh5tPMWuwasYbTmFP+tEah/ip1LZivLWkPnxhSbOi2e22vKK
tLe0RLL9Jpqj/yBJ17RWwHWism3ukgYAmeqx+6ce8RUfiJpQslm18WrdiemXVGg3ExRl0Blwy4jv
9PUXo3pwUUahWViTdFZ8WDl2TIm2BY2vSbbe9nyc/se9k6PbX8JItweHR2oEizuPkZfuhVjKG8Dd
vCUrbXTLot75q3BcE6wr16vIzI2R6mXw3H4reMXdc7ee6pZwcGgnMyOCd3aVQUm1JRpRd2L4wC+p
pYYYEFq+/zajO+3EpTzHbBPn6i1INdo1FKJcwil4pXasrody8XnQH+wZjxIB0TiuvUOZDAOH4mks
Kt7ov6wjfUr5n9N/ObfFyN4B5zLwf7Gtt19njAGNCpZgtTLTMnpxUWGe+yUKXlrOLA4bWhyHv3ua
djGwME5nYZwcK7MrpbUJMuyaIcSLNr9+7x0nQX7p8kyCeMR/bvpLggz3yCOJ3qUxxjQkD/psQLkV
9tyk/sTXwFm9jjUtguIVtpIZ9Omj/rfp5InH9yry4vViOQOxvGxVWioYMvCTTOe39+66lpjU/98d
hd2xfVPcJZle82yuYGGykC02jWCFTGpuvlR6Nl4gV55k8sRVm9B2fpiqfx2KPD7vn5EnKkwER5zR
GqmEAiSAsvTIED1+4CvY8+PF7yYgNmOEcUCwyy6bguyFaojNH6M6kqjC0Sw3au4AuA9SKsfd/hD6
3vyi4kRbSjXZiNXpSMCSFgOoYbF6mVs7c89TUO7KPpeMOLZYjH5OwZtIvIdA14qmmYanyUi947Ad
pqOHMWw7KR9YMwM0rVa6iwb7rCcneKANJ3siXTNLAjtqn5+wBs50dyMkDS8DYBxfl4rvaKwLZI8b
U25SYY07vFs0P10myg8O0CbzuNZ8hHc1YHFDIpYEZpSGp8BvvErR6jSa7l/O1taokBTx6tU+B3jO
LEACXebzKSKsamgqTaraFH35c8Mb5qDdgLtxg8fYvdlXAP5lAOvLjsMwSeFr5mqMRPAbO/u1CpZU
DLtIDkhnybCfsEc4scFJpC7QrWmCKp87xsRkx3OQrKYOW7ESbH32Dnocyfwn/6n6rkza0BSmHAdj
Je7Ua6nTFSjVv/HKDQIPqITE/mT56pNApgbAslErR/EN68+cCZgYpfVNhaiG9FRp2z5TI/eo1Bi8
WWaf4PoX6gOTD3ug3cT/hXhIVd1t5tIhwEYmvPJG/OaZxmS2wCbnaionj0FRV8GFXJT8jLBuez9M
jXXNhz/AGuAEmpLzbKAeqgXvRuEz7SLIW9c72gV99zl9ZWaJ4a1dQZlkZS9g2C0p3ZDDt+KNXLdq
eXJf8fNkDzX2Y5yLsXaq1RRZlITnQgDtHFaVlZ/eFVizNBIXSLlXf0/45eLew/R0xU4M6bLuCuB6
cfReQFOdLvEX9i+IXk/8VsZpt3sc7PwKvTv019oagaftw79SV7zVr1ximw/mrts3ExyfkNlkT2cy
5BRF0TZBFum+PqPdpbuUdnvlLgG5+K9LFVR+/xlI2denVL3N5gDNxgRF1UGU3m2yKFqaDwC0ZfEw
PE5xaCdQkrIejYKq4cJCH6WbMyb8H0e4t/8TPRU1GILqGvTF2HmEtyP4tN/MH7/Dxrsv1TnzpDkc
UM13pPzSH4zg7Nhe6CHkAjUpDuLqlL6+nG6saqJscBhHfgYhKSP+nFYro1Oe8XhXz2EsKuem19U0
7y2poVhKshxhEM6pl3P0WAj+qOU5EuiqUm3QaUgiarCwakBZmFObAK68oUa0v+8AipuDsAp9KutH
YiApuQ+bPOs8cDl9SgBd1ow1l57Qk8fOrAym+bSvGhEfLT258iWa4eLJbPCny7wheE6X2YrHLwr3
We0HIrVRKn7oVxx0KJlP8LDrwViDu48lnHYCjZtGG0jxV9fRGbl+7NAoA78Mok1hnIOQDWF1TXu2
qjL3f8FF59slGK6GXI7voUd6ofBDBDe+1dIAfcLjdmEbX2U2OicEEen9CXnD6HFYLe5Cge6xCc/I
RGmV/c/JOGMjB5NCDSNxSxqE19aBPW+pb/ifhRo1Y4sUoOOE48VpUNZgVbklXYaILcRyYUsfWNa3
jDtRDwjZb06ps49qx5KzLqLB6YItxD2xSz0qSpoIekf9shcvvyJQ/Fsaa/5A/kw62Hy1v1lPBpjS
eMcLnKhEvCIh4BPYPwgZj7lY0GaSpvZ3WPmxkJNW8/8gSK/U5jb0jkjEt9t37GM7Xw8Re3VOiisH
sRL1JHnJtI43P55C9vcnhb9IOU7gI/xubjdy8Tq/EhDlfPdPrhqAnonu4MxaPnhLMNZzlGji10SR
GsvLm17x3z0BW9cUlfKUgO2XXVkt00YVHEDlDhNM4LC+Py9OK4GhWg4qF2e8cOslwoD39hVzKWQ8
bUNLNxjxFH+PlijJ+6kNB2OwJYPfKigON4X6ZquWOQlberzwYZXkSL1KitzpRf4D2uvfdLXmqKv6
nUX3DOZH5ef35v3zKaTA8BC40NxobZh/odEn21Mb8FPI3j0ALqi31PecINWDMLOK8SofWF6HHTa+
KEoD1JpW9HGdHs0F6cktsJFFkjpDmmJaHhF6k7ZljkTC5aT2r9S7FQAPJwIiUQlxZ4YUgC9JDPxJ
+gx+0IJtbkogkm6TGCXRTG2nt3clBtKBCKGSdiUQ00s+J9QXeR8dGifO4KhyKFzMhkkYtUMUaEqR
eYm5BCXqwYSxtHn6/zfisJKVpJIWVG5vswspKcqbcTqUA38Ygoz+Wu4twEBEPwhPI+zEtFcUrSaG
J2QBLclddE29y5KMhfG04wojx2KjnNZTAD8wOH5kkypSJoJ/KBCZtxREDW8+lzQiXYDL/vfycV41
J8QsVklQNhaDdkiofGb30/X+HUv43pyDxwL65RlwA8GYTVml5akF+CNe4mHv+ojniYpRG/0p1sKW
W3h9qhfwgVjClepP0yTBJsJDeGXWDWVYzNiXOfodHdIJFWovZVCz/2MwGYmOWyR+9ZPwunZyTO6z
y8OhE5kFlZQld3IOx1sP4HPxCQQKuWhh6HRyH12D5B9X11ULVAC5bV0Pm3zU9fFU26JKgTbaeAgW
+bLU6OrhUpAnttsWKyZk1skUpgZ1xUkEyyCr5ovf0WrWnzY0+B8r7TXy3ouo6mvbzoEbuRqfSgKG
FdUBSYonWTUwUlFOI+7pyq7tSWEN27fCi5X4FA0n3gr2N9qaj30PWkghhVtBEUfwyOp1NYP67goy
92Jzg1gTBtTsp+FqAsqlddk6oN5BOlZNhww3D9EOiJsWNGcqU+GbzdkoDnydWsiUli8MhAl0HwsB
E10hHwMmMHXV6/a9xESERTUP1oN9TpksETlKSzyWuHHd6rtuXbB5MW9bLeMdNP+XzXpALn2hcnlB
EzGz9e3zogT/kR8/rxK29NAPfBJxXUG3i09ONb/HyJo5sUls7HpYdOaDzXb/uBQjmzQ4O4aZfKBK
R94rhOtyRuNsTlRBwXmQwg4izbf8Wx/VL8QDs/py/ej7oQW6qk3JQEcSTkky3MabG9/2SDi/Upfy
y4CtA64huWmRLbpU0WZeQD/C4DTt0Yo4Oy+xriZBrqLQQKsnYGxAMf8Vx5yNK+5cmCHUj87pmYYb
cCA9nNotr4BREE5RdSdeJpmQOWKfWfPH+HjnHkE3cMUHAfDjTZtFiYUCiLxsK2X5ESPL64f5C295
4bP9UUwVCwb/rjXmNu085YzS5EBt/GnEkMmsmmYAB2DAPhFS8rcGiR1ymBF0+QRkWQjxNDiT8KhO
/+30M9/jhJfWG2OIPjg3b0rvYPt0aQUY5iT3jDFcKMtQ2feBInsxWQsilx5O61QPiYhiD6+glz4a
RBXYQk8M5zZ1hCwcNfFX6mJmgeRHcdjZ65JqjOQhXMFlN7+8kvoIIpF/PC51T8EpTkNmfuIfSTkG
EuXQR1M4DuvnYVky2ci7yLfjOZruTXPqUJXs/w5MTfNgEOuyCnrPBKh3ssO3fyDhQTRDWXal9bjf
hBXnTT89yJhz8v5mSCXI5OTSGGtL+2xn3seKuJ9yRHTrMAA/1KqD1aSeSqXt+SG8cZGvc3HrEDAY
P3epdMSMK/eNtjyg0IQwOMThaK+iJA4rvgvs8Uszt4zjfI0hQVE3F5S/s89upnZjaRE5Nt97qmmg
Xie9nmGT4buh2FRzSjbNgRQrpaCK53kZR7amPYR5SiT7xgYjgfmFAHqGRsqm9Z/Es5Az95tif2l5
LENf1U67Kuq5mHV9d2S4PMWXZn0+nN7tucVA0QzwUgTKhGI3jG7MgU8jNciB0VNgwA9vJCWYb8je
ADQ+GV/4i5UHAfw4vneA5R7U5hFuGCwPtk7F9AWou6QufQojFSfRXRleG7LVSQ/RhCm9DCLx5RqC
f6CdbpmsPSRmBzBjgXi0nByvv7atyfOzIo/BqoLaO6EkoEp7dw+NLn+snMCM6OUmK3DYTverCEZW
CPPw1wheMjLkb32jcwgtiQbL7xJTlYbnGcsl6Dbo0Dd0ae31qd5akjzzjinDBThk8I0PiI4WudIn
qJvxtqPTDEJmX356cRYizHDQkCVWHBEoTfUtghjtJCTIHM0h4Tew399CfpegJXHK+zbJO4SMX0hE
7CHEAUG76Jl0D7UnfOsUT4h4sWxEVyIGPol49zl8exGoQwoyiDiOXrrZ+5iMB5YRQRW6dMn+A1H+
5JlDFrrJ4XECG0jo6NEVzqXJVk276DoFVh9RrcnVspSfr+Gby9cXQ4sIgjQp6rYNyDFosWGBoEyN
hyAEmCyAQN+lXxeIA1vTKxI/79Kyx1eIU9a26dOefQn9jCjLGLJH/eYyfzqTA0FKMsGfApZCPmj2
gQpauwXk7tUJxatg3cq3wGeVkwZRhuAt/ZD3J9agRXkSSLSNNpMqAJYjjUJZIcxJddJrzhXrTL3a
u8gdt18h6coAaVf7tdaX5fqO1CVxlLV7NeO74iNX76resze69wZhoxFmRtfaiQDXv1+++hRbWZvk
X3arQfNVAyUptu7nm1cQJSd9tv+DRJvZ2fN7GFpjpjUxNBFHNlDD9HaYE73O4lR3Vdfngw4c6NtE
gzh9thX2zAzX3vOSA4VQnenovqII7esv1ncBYTvvKAM1+O4PDjAF0eXPj3zACG048Yx03HHxe7Yc
WZHfP/yFr3b2pmWbL9zkiFPiNgh+r2X4iD0owuP+NO38Q0wrhdnTl0Hh99YOhjeparSlcyi/UKAg
t0QWlIL7XxljbzgFEZck5CcQwObyxPXStzqEOBpDCoMtgPQ8w8h1/mpaimeWjeV9iSDvMz/X81ZW
xCqF8W1wlPR3VmaehmgAJckHYDEO7l8J9bsIdbMAP8JnVzCD7I+k7PQCbsqc2zqYkD9+qQ0B3kGB
gBEU1KJCrXsCQMAsQxTxiM3jhg1N3ajXHQPKqXNr8DoDIpOOBXXG00LgxzVhIJEmzlp+7QK9qsxm
sSsqL24VtAg/ewHXUbir0Puoktd4Nf8EArdluS1iq0xYuxJmITiqj4DfGteHXQ3rVv9RdktLp7F2
ILhkT3u1/jg2TRXAtuui564hliwUgdyv2QNPkcsEUK3ZDtuqli48E3LtR494nJLr1rlkcKSID6ee
vMMO3Xg0/i4DMxvULnrBBBc/djvz8T7EJnxX2buUVaAvzrI2wYi5OvpQaBnsodD26OnVS9QQV4jp
esm7iHLkIJgoWsE9Q8oMIIXfn3qQzGeyage57AHP6r0uiuCKTT9VBAktP4THB0mEomxK8LnddhsP
7V0tyN3Apn2uAaL1ld8Yb2EN9adnl5vlaOrxv69pgm7R+sjN3rm6MqshXJDrVxT5oDOsuM71TLZi
0sI2q8Q0ayyyhbU+6mggPmnWS6G5wOT/qVjBc645tgaiyHneAyomAduoIsqOj7Dp0l/CALyJWmOv
ucDBZjUEzUeBck+jXv0W+x27KXbHZR9rW20ZFd4VDvgbgRePrxNJXJhXZ/SSoAHwn9cNohoAEO5z
eMiFsLdr6rPzkk8N8BbjAK0DDDbqEjsWe3NjRO0oWlazKHPvYBXuAWNsuFZnnt2pOIJ+7Y+kdU8M
OagEBipnFkc2KxVEx9ucH21TTgq+HSetPD7wZKxFm4X04pz3Mj+e3iJ57d9IZbnEau0NaRe/Ti65
kJUbPshttdp/7joWTVDn17m+XwxN20unrMbdd2QkQVFUb9QHjxmaZfYz3PhqnXJlNWd7agbCLjk7
bSYdYHP1HhXJPMV2a9dqS09xYzYvbCfD2olZFLNmTObo70JidML5vXcbPvu15c7h2VNM7Amd3Jy7
abt5GVdXt0QNeBUZVPBGN6v0rtmb0zJcy5tObGO7pbYeh5Fb74HdlxFtuytKkuEqt7i4Mbfv6O+A
P3hH9LJ/varQLOXygfHJMMPyoFj4j4aC52dI1UqpARmNOosBM5GA1T2MHLRmfqo6XpxJpbuwmWYH
aWPVqrYjcKZAk/NDoy9aXifXi+zqjH/X5QqXFqag3AAYSKn7PBkZ/c8D8t1nANncoi085JiW/ydF
4DPMgjMfaoSkNe7OCq4ezCAOURmAf7VqQPDKjieB9U+my1H+CKEUpk/ZAfvyZga1ov/OwXTpQtdn
kiCBDeKk/+F3FkTC6KuJwa7HyoU6j0CdOdfID4mImXDMnZLAzNxlp2L9GJmXRUrAbABf0lYYAg39
30ZvSiAVJVBsVQKZtgwB9mwMQ3pOc1ry4Y0ido9NdTM0mktDGiQbdtmy17x9NLDwcovmZv1Kkm7Z
fruq1D3YHy2FrmvKkyP9hRtZa60IuRUiZWGuS9XcJPDCGw1JJASNnIbt7ol5culHcvmhYEegzYuN
UhP5wydilCLCnzsxhf7EYL94Fe++7ga1bfjkePKfzWtJULt3av7u7heabZWzJG7+TfqrAewJoZ3M
XCm4JUYFOwJulvbY1yLuQsQFKN3pMqRWpGIuu7+KfXASJAy++djenbueU2GwpDHwFO2blnsp4NGB
K/mUPNMSxOHA6jVAqHgfUrrQMWrKDQeZGFiyZlJJaWvRf5XsabJA+VHXXCKYsRSOmd5tumZTdlya
H2tLc/UudWig+pbNJRJXNbArVwDQrU6alFeto/sSyuO1/h6KjI8CNV4BiCWNo8c9ud66WwjZ9z1C
bidJofWWfQK0iwb7+fFydd3Dzbc8JCdpR4o0bPDcMV5CHqW/SFMXuvTQOfU3jsqGr+A0hFG9u0Vh
gQczyZ+DEtynL2e5cMCbCkRlo8sAb5rNhiXrAhvspJ85MY/dAt3e4ONa5eKwaVFSxzFyE699XzJH
OIR5XXDbRmIECQyZHwYyS3P1q8SFt2lqk283MIm3K6KCrR3o/XLk0F9IGTEHLQOb7tD+gnraiNy2
PcKHznPWZsTF2thcnUhcH3t1yhY6V+t9gkkBEWjTYhMiigONwk37EtZGa+Hr2ZXlfA3lFHJ747T9
SjRrsCCkCzIw+4BUAm2yaS5RkFjO3XDilXaXht58W4Ciju2yJ8U74Wg2tk27ha+u6BuCLgmeTeAm
brUSxvZUop4YPjy4k13OH/9IIPBx/K6tBG/zKQnWQNw/cVxYEkktGBP43ybxk+IXHJspgLHhRy8o
S5GlyRR1gST2Ljh1H6TiXr6LfeqtQvdIjw7Cs+WAp/JLPcOdYBLX37wa9mJpm8qrtavnwP+WYPVu
/OcyzZBPKtRV7drlpaJ1Ph6+QnjlHyoss0HiI/aZ2hOi/geoNFnqZrWyUxXmX4cR95+vDagl+6E5
kJCJVskMJ42QDG9X23Uh96QVB97tg47O6FfNvxoibvb06umxppf6OzWkpLVm2CH2/96mPfpYFlxo
G9ZLBhB80uIeqYcinREOpr8c/F1PLWfBovwEfr38tCikldE0n32y3YfEhGQ3sjh07GwdDi8EOJws
P72jbZp8Ko4htma+gsYI5M8KjptYaoLeclI4+h93Xij7KuDp0NHIRHenz+pUozRQwUl7aMGH468r
CJA5S2nIt4dmrb7pJxgLKPY9h5fNW5pMHp8gp+jUwxaV7pSHn0iba6UFdZQG7P/DCJLJz14ZUhnv
CAQ9kyfPQS16LWWnkbuZIGhTd6S43odaVHYkeZeV2mLDzVaPh34Zf2Te+z1WGfOzGFtD0I2pFFXO
Cixif8unEmle1pmXLZPuIJokCy43DqrIBvj3dPgyqvEqgseQ2+YjoP7hqVMWfmjT7qaeACRfEYN/
Odci3/NrinGUYCFRSBcumw/h4WB30Qww/YNy4gB5jBnuF/QoniDSclgFfOfmxdpl6WTds/FmUBIZ
MESS/JvtCutGWmlezjPzUj9iPPgOezsw/UoFroO26sqWKkCxTt6BSjZCI58JLZkvGR6hCEGb89k5
SBeENehWsSN9cUWrhscC3aCK6HpGoiAklvkkQ5gIiykgbIs+Xd5kNoqheXj86fh5dz/2P+RFfXVi
e0w81ZtsHBvUrPEDFawn4hz1FLb62zaKGBAmTPOi/w6D2xW2XoFKlUP346eaHmN2AtYseiPsEqop
Kut2HzdB7nKMu6/uLhvLtZFWObsnq4XYQMIdtpWdvqudtxN7IJtjh7qt1Vkd8DLKrG+p36SP5ih5
DG2Yps7AUWOLKFegvtQOKQor5xDjKl7dR+BQdQNQGEgf6487cRZ2giD8lRLXnGrezgpsOMZdzV1A
XioW64UrE5LO2DkSUzAeH94jycp3rZ1mZpk3xT0qRPRRnXKREDiAuK2qJZ44ckyLzS3TcGxTOTS7
KZldkdnr03xkciMJ+Iv0GGYxcAbwKJQF6Jtxu3MOVxkA1pML7JXHl/D1yZCziN1KV/F86QOmUQlB
70VPIK7MM/NDYP16/LDuvzThkdv034pRN0dnBwY/UeS5ZZXjDuBMVQd6MslOQliUIPPjbBe/9l/s
zNCKfQW0CxamuYjfZ5JkkAgtqeeQnEjnT2ZMfv8HF1VdImjCjq2IyW4GFJRfotEfjwCpUCMcA0AD
EXES9TCav7KDz9vPA2HjyAyAFmWGQmoSWn9FjMG4mY78zXGVcG73s6RS7oC7uuzGWGzibt6X7mAR
0NSToyHQidzqCH4iF5cUfEY/ybe+1KIpzM4GQqmOLf+Hz6oxhPAzHClZvS9IdaIdk7jicZEklOjv
8X73gOD2wyZXQWYFCpvSI+RqxAb9f8amGuaLwwXmHyXRLIx85yOcEAq2JhQG5eGFDZqMFPSTwlkv
ID0NRydB31g8FHKBsAiGm9i9CGEfq9Eq6JpPb4BqS+03Q0VIrkggTTI3bqbyZJhrwbET/pgX4YR+
XsnJ+UATl056xT8LhUg2xgwNsV5HnTnBYdQOYthhUcMCudm94TrkEsZkPR0If8e9wa+Z0stekSRs
RiFMJCgm0WQ+CglsfVKAx2cAQoaLvp/mOrLBTStzitpD/Kg3hU1MAyqkr6WVfLe24sxlAwuvXMHa
v64sJdz2q6uoQOfPjcEF/OkU/bdVeHcw0+4wyHeoKvKhHhNVMt6PMA3St8cddu4+6WqfGb9tXi0x
bNGsWAu9UH9dJrHx8KfxskDW8uwLnyDuit3Far5OmKbmcNq82cDkhujFUc06fDBpVqknDYpXPp+x
jGsG6CQnc4vbMQ2X3vg+V23tPWs46b+6ygpgvQtbtNMkYkCsfYZirWPxTGL4dg21PDjQeDm6jxjV
JD7cmWunhniOJCdRhDZSEMwVx6uX1peTFr72bwkPt03kMP1pP/TEnI9Lbgx9FYJH6i4BN5680P3t
EZov7gygYnAgsshNrpZl2LXDiXHHkP+f8rZ9WdekqEbNfIoAocdLE17CMddF1GQRJQIxs4XR8V2J
NeH7defNCRlxEUaOd5vUtEafjPUAbbJID3VqdJQQmeZwlY4WdLXGtbhYw6a/ayUnCWisDsbI+7XT
3ZURaTlZJIVwUKxYntzF+Bdu2ZAqGl5k8s8D7vUhjZr8hEGvwj42yZor3lMMbDXebthPMmF/NRXq
LOugSvf0Mhbxk6XWYb+5MJbDWpsE2ivOwshyJ2ufcLb4ahMIbkBnkll1qy+Btz6JynWIIMu/44gI
QKcvmW/Hh6cTIZUUAmoGM26dEC2w5p98sQ5LvEA/jkPRZC2bx0RXDw2QYm0KXPpZHw1TRWk+5ICb
KIeVDi/0xhoaa98BqUziINq2j6AhJzjzhnyZ139E6WUnnI99C22gt2oRZBfAp9rcieNPFEdyJ101
BvKkBbP8zvAK77gE8zYdfKcHFxfU0zoD6A8DCpsyi8Gtj1ybwZf3IsXtHJ/8dcAB7AyIjlcbaZVA
CAC6rssAZ8cyEkmlE84jyU712Ywef+stenqdrmCmITTcIDslUFF7VYomsbR05uRbeXbAT/bhmv3u
vqeWAmIcKwNgB5WLdy0r3ld+56O9Qjg6BVHKOTrP3SEK/w70EvbxTVOmo2eQ7m5OZDp1o87op1P+
wXjDen9r63qYIbrVckblCaC21GG/jG06BKQrSgQYk635hVSountBVQQN2CkTsIJKkdehJ0q5XfC4
J70k4+hk8K0HzDleqNknMIgv6kgPS/t5lit7FQNx7AEtGdGdGmMEK7bOaVyLmDok/z87FkqSLMxu
JgwG9YvKp2RJdzOKGMlpS1oL0VIyKTlSK0TwAC74CEK2ULGCkO1ni9MFimvcxMNClOyuJYUjnKFO
oM7CRm5SR04jcxaphXE90mvPt3lXWuYYKk+dhW+j7IDf4j0cUyMIlxcEuMspeJ2sBCv2BR47RvZV
xx+W/rLt67bbXuRighOVdI3/DCijbdpgO+USmBLRbn7S+MjwxqiZLvt4X6iWzkskWI/HTnFe/z+V
3LOrNg3ptALF5tZVDQKKaXAQ6UhH3iANtdVfkPFNpuQLWIeuFreJjbIZ+QuBz1XCIwXjUUbKT7fH
GIynjqvvUIAGFcFMSNV1fWNZ5Mq0vZ9IxUIaCeFEYTcOn0LnTd76ACs7Gt9CRHNA6SpiRe8bZf+z
5TrpRuaUXGmoZlN1MDkM5SRRPlaWSE3HmDWPPwBX0TV9a7PqUohs5GPboPb+OUvzA+d2bRg5GFMp
xDML8MQRh57eeg92JKeiQ9KuyIxdJGvvA6P6pO5eIcs/wg+6uFhm+kDjojF8wqTqZ7GRQA4bMXaa
H8anQ9xbyDAEQWSAIwkZTJDMwnJ4WlMuieggPooAKPVF2NirAUs2l1u0KmrdAoK0hh/xgyYwZqlJ
TViF3QCflQt7IqrwhK2YykVzaAu8GhDA2w74LsOAlji7ZLrM+mc8A0db/UW1SLHA2OvnB/oTQb+z
CBpRRlaatxG64hXFA5yKL4mBZa/rVmD89IG1mT1fD+8ZMJyTKkku9P2TS4gbDwGBSqY4qY6/Kd86
8DGhU4CE8YXNSB47HLnZVtuEMeemMzC/9WH7prXmSJSWoD4vpsO3/FGd32PX03LQPZZWcI0nIrEM
pBGaeFqOo2v/COdDaRzh82BjEFHaAivy6xWp65/R8usHifcjLNIUosM9QnFKs+DD3YqCR5DRR6F0
6belvxkW8fStYbTOKx6v4BZWdKPWQidlSWjm7MH1Sp9BsbDvet3UfozoQEyt/4w392XOFUhJ3qGe
s2q7MCDVrZrvEO0SGWjW6f4CRVLPl+59s8lD1JIoJna8TvS4HF6UStMk1fsmNdwoMNSQxsiTOK9L
rA3jvR9MaJwwJe2zeQd7DwvJLsd5PofWpxLANX0bEI/zxdcv5qlxZo4C8EZ2OnwgpjsxhyNwlBu0
qNWFaLlNmZTssQ+5JoyEhB8wVUFVRheKhWG/iq7TsGU1+AeX+crsPIILr78a53io4swIK46YECWc
PxiSyn1nDgsqME5w5EttimpUSpDe2IoPrCTmjloiU36tyHbX/6FQgxajfIpY5Ma2vz5BcHbNvTQi
dFdEDQk+PzWwZkXB+xTDPXNY2YOFl7BUntwaGNUgmVZD0KwFwAAqBZ1KUDEKi+B+HuN4dqijZIh5
gyI/KqL7JmYNk9H37wovIRuSevLosK+64SEkPb/YjGDndO3lXRKd1kqf1y+m4y06+jLDuMf5sYTw
r/EbW6ctWPCzC26ZyR46mPIOa+Z1x7zkWBFI2HINS9eNBcd7BLupAN9WqG0le9hk6SCGmv0QRBd3
uEWDfo7J1QLKgkF10ro0GE9uZ6eHTXB+JP246ytZkQATQcjyS6EY2Gs5VBjNvNZck8rHjo4Qmz9z
Ea4bY3q2WTjEC0tZdJcOn0MqkxA3T8qSamB+LAtCrb7RgB2i4t53iPOPvQiXE7RZ0b00G+KqC/oB
gXSJA4nSZzFtR/tmliY01HfX6IUhTiPBSD2zYfOelb+dFYhyNY2+8b4xPfEiNd7igj1FpVULEd8V
kDp1wwyt29BbJZgPzOBzuwpDOlIVlOonPSfMr3t+I0XEvKEtZhCJYoB7UtFJZqIavKXfTsGgXvIw
z3H4tfQsC1du6XQq+AlvxVW5LB+7fa/BsLo0lMuBeC79VX205GDdViX00UHOddNniHVZGz++JLD3
ZYX5nGFWiSizlh4Y+erqO9guZyJahIcYnp22YvyFvKX0Ut8dBlVrWoLZ0YiVZi0JY4RRIJ1fKfoX
tQEGQiVyi4VDtvnGpoobobwdkC0mB/aXzODCqLZwvR20umNOifmhyPJ3PX4KA0pKNXf+pryCM6as
azB6Aq8hr/OcXzHXGrlvdaKOa/zpojxs9icIX/ra8cmkAS53YEplttvWotZnqfrL28z8ptn9jyvn
s01+cXo5aqSQGkM63LvXQUbSeqwi3VQ5VmDNp5Bbans/McTxefN/Jnx6u/OwTPN70FKlu0UhlUPr
j8x+bhzGRnAhT9E+ksF0heu4maxJ058MDz+Q+hNs1rV6igF0Q8Ht1jMQfUKvqIzoaSdzvUwTUkEi
o0pO5pKKR8Vp106frAvUT85nF8gVBU56n8vpUswY6mmXowX0VFXeR+0TY53dRsJfP7uYt3UsIxEy
ClLWTIWC/z0xR6Svs2EzabF8Sbs2sJLYbweEU/wryZ09U//GGC+stHoJ41SKyGdiubFOBDWjUR36
jpBk/gnOT3IwPvvdqR2DUuDLDbNfm9Ki9ZI5E1ZLHAA1VrfI5LsKk6eQo0nYLtZTlu2KrpWha6e2
bRTGlQyLK1s0OtHImXazgyit8tDIPSZMg/fjWyn44eT4UUnP4emaXSW3t0zSZ7M/+YyLNUk+HJWu
O9lZPovRYcXTjBxeiSmEd4yI0a66NZpl4xIL784I4B//0s3Q7WJLhYwl0xxmao7MoSy0VizCYin2
bt/W0P/qcmyjw6vFzZwX2m7InhOvxdJpLMya6cL6Q+IRFR/tNba+jo66ZJozeNwuMQ7kxN3kJ4Zz
zgsin44bou8C1yyXthutIkG8oIkSOGso2kMmHXeQhaHO/a1vBHJ5zAAx/KzwDwc6kx6aMkDys6Vw
68ZqBaqWX4VE7IJHRHwmC+jlpGT8Uij9fO4HoiYJSvXkI/bjudpx9gd+YcWXKIEjVly3kBDEWcZN
Ol24tlSSHyx/eHdNFrSgGtbaLcKff62+IalQaOC/eQoCGa9yMHAvkOXr52LVJ8R6oZwP6msShyOV
qcBrr71zK+nmmMjueD2QzySw56MSYoyyD5f2GPtglCgDKXexk8X6u/Fa782WitBqa9S8OidiNYLt
ZyGSNL/TAKzKbIrO2oP5YMygh7BRpKQEtKXKgS4miaDKmdta9nJQoqZyo0/+muNeoZfdR3CcbwdU
+MObM5CtvE7ykbbHBzN6pXY8J7+T3X6fCxVlatUCvdszXopxhSx1NiV4FQESHm9CehBveK6EcNVB
8JEHsz0rnDCz3V2gmuGtqTDD7PaedM/P5866yL003TruV57HY6Y2JfICmIOds4LUV6mn03cAcJ87
Y6tiTz8rnn8wKX7v8lF+9kztWL2nzaO5fw0GWuET7tlo0kTYp4LSX8rqy+0xoSxQVC84QhQEVPsC
T2cQAgdciuIXCo70EoU+HlIkLRvOVb0QXrf7JuVTNw8NZUdHNZeHl81IcCPJMwcPou7De7RY5HvS
O5Xz/2DuUyJBRTeI8m1DcUGqeeQZ3sGdw0YI+Vzn1+QHVRd4mq8Lr6tD7EAxZ31ixsgHM4G0B1W6
wLtuHCGZKTHbqs+kf8zmYqmquWFzLSXm951GuvUVoJW2KrLepy1k0xLkOqqGFynjgKtuyBMr7QS+
vQ6bjhcCIKIWgTFboWkFZykdnfymiMwHI0Y6PCdm4d6UlUmCQ+Q+a5OcIr1lEOlzjrv6HZ7Dubm3
KALpb5hWdOw+rMB5Ijl1IN4QtepEQaus/LZSPz2R3PzOXx06macCwOnCS7LZAHIWFNrac7PkSB5/
teTWUZ+rn4Wvtsof3jTOwQTivr5LQKxG0KjUHUYCcqmRXw+tWD4UgFakEo1jOUaIsrSo0XNYF2Jm
LPE3BFMYQctebv9a5AfpsHFoD6TUpLYNg2RooP5fMsj7E1G9IVA3YSBCKgZrWYrmrXKHfhpAn8/I
Va/56p8IjX0GOwoNFE5GFwR3xEXiVMD9OCM6gKVeK6yd+yLkYFCshJTFwN5eThIl/06mCW1mmRwG
+aZLH0mQxB3HwS2/cP8F/S/mZRGjhZ7S4xbJgMy9tO+tri7rw/Yi5ggRffaJSaNxIKrLKZKaanT2
SM8AGFmE+elYfR/pJ+xzisrRsn0fbNsh26yDHCjnN9/09n1u8G1XU5RJL7M6W2MyEU/kTHtrCPgv
s1Iijx4d0OuyVI+zoLc47KlDtTeyxoZj28gQHlQBWwHTNtKBE0TsIe2XS6LtR8tSkcRbjuv/mmsC
REGmnsCnfY35apT2Jno3npmGHnUy/VUU67bvdJIm9HTMQJA88JlX5Vg6WKM3VcjNhAMjb+9c+R26
EGR3Gfwb72inCn9WcbihLndL94ldAy1HEVG63vrYxXkmewdj7yQO7m1afv2SwybcUBnWRwzUi2ak
/IPvL++0ky4MXGGC2ZHsATXX0255gLtYI6tsnxmq+cV2t7Prigf/PBi0/fIrGj+qeDVIF6uxLqJX
LQfdYX9uBFG2JaUj1nV+6TOBW4ffSIdGoQSwI0URB64lqvT0Z2aA0BtrSMn5V4C5el3oGiTbpfxk
ywlSZq42fF3JkmuFx62MCq+FblfrGjMs8x8o8WwDqIgEKPJWGyUJvMleeMfBbpvmt47sqNT977ac
iRJ9t7bmDgA3L9PRKpP8UvrCZ/ZNVJxa0L4q2sMUfvH2/Srk3t3Gj6QYRIGTJ6GAROhNhkuhnRal
dcySsHkwcsuqH+PHPO4NtIy3jQoR7uPRNCN5xb+KNGwt6S7U05XsWYpDLGyQAgEMLR2zw4kDPAzB
7ZyE8tkKC1u36YO8ij8UWpRJn3fUyjx2M8N5DA15yAXJ7S+PSewbKEgzs2krPhblQdCKSQUUyZm+
WCZ7FyRuGqq90hhmQfbZmfg4n11Vl9J6FIaaCJ43gurqQD6/b72MEzwOs1qnv+5xMoUJf6U8SS2Q
AQLdpMR8FeL8sxFiIgNeYDf5f8AcSmaLJI0vOdms9/NsDsvlyWTC4HR0WUtyIXBHpY9pnnbe8UbU
FOmluUmuFKJg+Sw0lARGq5L8D727XG2W5KE0SrdWyx1zmNINvFcXcsXvgHbAQrgefJQkas5Pv5ca
s0xpnLQMvucMYTyxLYb2SnDKtS6qmEXUfuxfGOBYlBok/cPUWf45pFDxeQF/sVG16fcw4D+UfNVC
rkQlzr0enc5n5jlwoL8vi49aGMdukd4gbO+SdW7GOxJlB1u1OH6yLAcjyRo0i5Zx/nLm7bjoXphX
k+B1GpAkPVSvuCpRYIa3dWi7089E4ir5NtFQQW2WTqD20ZyNM/TyDCY76EIDzVPrMAXeQ/AqxpZJ
bvfVCVaCK01Z9Frh8N+aO+FLCAJlTAmWOi8+Yw8JkizYQVJXft91QjMbiWBfGykjFvSpV8ygIN1n
ZGgsf/OuiGrmbiVsqabdc2nrevIhadi2y/XQ6gmwerSbf2DYLP7rpyFHaMyawtoKKt8xFbn75VW+
ykUD2tLr4PVBtSkg18DxyuUNkb48ayKoXP6JQYdfapR/UB+rIjN62Z4TtsOOXeUieaNIuWnK6hJb
7h7IPo+NVhaFAHGRZ8jo/2Ri6JTosNlKqTXAaXofJj1Xcxx15K0zyiAItf8VoHeMD7qGETS9YN8i
WD00V00nGbTv/NFsChttMI3rxzPY806Pk9s2Svq4vL2QMqb6dnu1d/KSMnq62pw3P/34r12BburV
jZUWd6YYO2kbRndTMi6z1DsIlgA2+JtNHtoUFfz8hT3AB7rc/0K3LeNzYgpoCPvidADuZrF7LxFK
v/snnenwaQCF27AbWFCI9e1nQfJFaBYBOy5dtfWfe9fIRoN5e/f92hHCpdFRukb9iggipndi3Nnk
f7lsMxg+h0wpVuT6C3h+G7TTJ6K9V6yxqKx2kCbajpkhmzjzNp5ER4JhIgVyiWW4MZ1afXC9oHWM
jWAOVLpxHnoBc759SJ7bWRELYo5RiyBDcNtbhkDAsQyfqn9erIBmFBUPMYCuhGZv3Uahq/UNNgom
cf0UDz3sr1aqs/lWZhOvaqXqqxiDQKzcDM+BGRatdHM295qNBhefFrueZsDKOSlhjPZckEdokdzp
b8k2f+xfxppEpT2NB8IEzoA77vA9cECdrWGWp9IGMCHkpwMpV6o2w10thS7gA4lu4MAS9FF8X/g4
x4vdBzPojQlOXR+C9aVsUsHhKSFNvWtPWOrcy0lVNm6eAYzHYGxbFPu1tGOcEmHWyyvy9ismkeY+
1fZy61LnjkEP7SSEm3PVN43ooXNQ0xG6kpJUGjrL9xf5ZnbfAO1dlmqV2O+Ec+jhgx4HjvPsLRvX
U8nc7ITsW6aAnAEpf+ixcvcSgRicuTgsmpV5q1vRo4ljaAFQYo9rcCnDJ6RDYLOtyHk+q1dgqw67
fCtK9WJqp0KXTyGzESzuLNA4WXBJnyIN9vUCO664GHmc11Om8dCln24ThcpPSBB17a1a6GKG3vuP
K1n8oW2n8gkmDSiKjHKar7ORDT1Lk7S6kAMsrR7De4C+D2Mjaw2eb8c45ujXw2tKnCcSdBulty8o
mNFIUPU8to1edzFT3JKXcuPx4HkrVwC4ePcEogRLOZp5DEg9DT8gFKmJKs1Oq7ACnazjIJcYjeGp
vFKPC3NYH0AGQ+1b/HUtAEKpXhx6pnune95YPZFiAmXieTBkGpGkfFBQVW6fhwT2nz9XgAnAufd8
lkMWNlflHjQHRpfRcBsGBd/QU/Yjjzuw7z/l5gAvGJ9oMdrEc0KEvMgh5z7VNFQ8PAhybSB24Lpj
g1fLvNvkL2yWUkom9K5QvmIhqZpqdbK18iEaR/s5efYUQE+moMqG2veG8lFCu5IHm/M2QX/GqmTC
JUEeT7WD9a9OkF3OLQUN6za/E+hJTNtAGCJ3YUo+Xg/efFOBJ7i5400yaDqia3MomBNDBnAgWePi
4sl0MHhJUpVLjn0Ybh+fIYYoE3d8jIku2GUYpmRBatVMI40UGDvd8BZsLBvexM8hlZk/7KKQvpiS
iQbFSL9Ul5LWtYm89ZvtJMRcO/e1V1MNg3ETV2iK2NDeu/ggcIhwoMqstvvQGs6Tb1FZ4hYngxWp
0LCzgHJk/No4tQri18rK5KiLRsHKih/Qk/KwbppS4Wa8LmJlvCagGhCKLNUqf8h6DWxb0t9t9+oe
16Nsd7F5Ks39SxNdm/lMCvYEOxg2mhZUJzR7Sx0Rw6YOCQfrwgCaDung3C1K/DY8gHubBhszk/9J
y7iYXjUyfxqDJBRaW1wZyv5QXiqgy1JbeqgAU6GellEWi3P//grXrF26oPTECk9GqwBMaOHyKYsA
krw05DOe9h74CRCISwiY7w3J5ADuGZrFKtxohB01iLnjJI33Ys1SMcb9AuGRLsFSnulSl3sBaoUw
mRYscinqEqBzvQm26Bqi8QVaPNcZ7+49qSa6fCuf7JfygP6SuqQHPY9Ehl/1GmU3Vo3ye28u
`protect end_protected
| bsd-2-clause | 7e5e56f49527a3abf7d5bc28b411b5fb | 0.948205 | 1.828135 | false | false | false | false |
sergeykhbr/riscv_vhdl | vhdl/rtl/misclib/axi4_pnp.vhd | 1 | 10,167 | --!
--! Copyright 2019 Sergey Khabarov, [email protected]
--!
--! Licensed under the Apache License, Version 2.0 (the "License");
--! you may not use this file except in compliance with the License.
--! You may obtain a copy of the License at
--!
--! http://www.apache.org/licenses/LICENSE-2.0
--!
--! Unless required by applicable law or agreed to in writing, software
--! distributed under the License is distributed on an "AS IS" BASIS,
--! WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
--! See the License for the specific language governing permissions and
--! limitations under the License.
--!
library ieee;
use ieee.std_logic_1164.all;
library techmap;
use techmap.gencomp.all;
library commonlib;
use commonlib.types_common.all;
--! AMBA system bus specific library.
library ambalib;
--! AXI4 configuration constants.
use ambalib.types_amba4.all;
use ambalib.types_bus0.all;
--! @brief Hardware Configuration storage with the AMBA AXI4 interface.
entity axi4_pnp is
generic (
async_reset : boolean := false;
xaddr : integer := 0;
xmask : integer := 16#fffff#;
tech : integer := 0;
hw_id : std_logic_vector(31 downto 0) := X"20170101"
);
port (
sys_clk : in std_logic;
adc_clk : in std_logic;
nrst : in std_logic;
mstcfg : in bus0_xmst_cfg_vector;
slvcfg : in bus0_xslv_cfg_vector;
cfg : out axi4_slave_config_type;
i : in axi4_slave_in_type;
o : out axi4_slave_out_type;
-- OTP Timing control
i_otp_busy : in std_logic;
o_otp_cfg_rsetup : out std_logic_vector(3 downto 0);
o_otp_cfg_wadrsetup : out std_logic_vector(3 downto 0);
o_otp_cfg_wactive : out std_logic_vector(31 downto 0);
o_otp_cfg_whold : out std_logic_vector(3 downto 0)
);
end;
architecture axi4_nasti_pnp of axi4_pnp is
constant xconfig : axi4_slave_config_type := (
descrsize => PNP_CFG_SLAVE_DESCR_BYTES,
descrtype => PNP_CFG_TYPE_SLAVE,
irq_idx => conv_std_logic_vector(0, 8),
xaddr => conv_std_logic_vector(xaddr, CFG_SYSBUS_CFG_ADDR_BITS),
xmask => conv_std_logic_vector(xmask, CFG_SYSBUS_CFG_ADDR_BITS),
vid => VENDOR_GNSSSENSOR,
did => GNSSSENSOR_PNP
);
type master_config_map is array (0 to 2*CFG_BUS0_XMST_TOTAL-1)
of std_logic_vector(31 downto 0);
type slave_config_map is array (0 to 4*CFG_BUS0_XSLV_TOTAL-1)
of std_logic_vector(31 downto 0);
type registers is record
fw_id : std_logic_vector(31 downto 0);
idt : std_logic_vector(63 downto 0); --! debug counter
malloc_addr : std_logic_vector(63 downto 0); --! dynamic allocation addr
malloc_size : std_logic_vector(63 downto 0); --! dynamic allocation size
fwdbg1 : std_logic_vector(63 downto 0); --! FW marker for the debug porposes
fwdbg2 : std_logic_vector(63 downto 0);
adc_detect : std_logic_vector(7 downto 0);
raddr : global_addr_array_type;
otp_cfg_rsetup : std_logic_vector(3 downto 0);
otp_cfg_wadrsetup : std_logic_vector(3 downto 0);
otp_cfg_wactive : std_logic_vector(31 downto 0);
otp_cfg_whold : std_logic_vector(3 downto 0);
end record;
constant R_RESET : registers := (
(others => '0'), (others => '0'), (others => '0'),
(others => '0'), (others => '0'), (others => '0'),
(others => '0'),
((others => '0'), (others => '0')),
conv_std_logic_vector(2,4), -- otp_cfg_rsetup: read address setup > 30 ns
conv_std_logic_vector(2,4), -- otp_cfg_wadrsetup: write address setup before 'we' pulse > 20 ns
conv_std_logic_vector(4000000,32), -- otp_cfg_wactive: 'we' pulse duration:
-- more 50 ms and less 100 ms (fclk = 80 MHz)
conv_std_logic_vector(0,4) -- otp_cfg_whold: change addres after we=0 > 10 ns (1 clock = 0)
);
signal r, rin : registers;
--! @brief Detector of the ADC clock.
--! @details If this register won't equal to 0xFF, then we suppose RF front-end
--! not connected and FW should print message to enable 'i_int_clkrf'
--! jumper to make possible generation of the 1 msec interrupts.
signal r_adc_detect : std_logic_vector(7 downto 0);
signal wb_dev_rdata : std_logic_vector(CFG_SYSBUS_DATA_BITS-1 downto 0);
signal wb_bus_raddr : global_addr_array_type;
signal w_bus_re : std_logic;
signal wb_bus_waddr : global_addr_array_type;
signal w_bus_we : std_logic;
signal wb_bus_wstrb : std_logic_vector(CFG_SYSBUS_DATA_BYTES-1 downto 0);
signal wb_bus_wdata : std_logic_vector(CFG_SYSBUS_DATA_BITS-1 downto 0);
begin
axi0 : axi4_slave generic map (
async_reset => async_reset
) port map (
i_clk => sys_clk,
i_nrst => nrst,
i_xcfg => xconfig,
i_xslvi => i,
o_xslvo => o,
i_ready => '1',
i_rdata => wb_dev_rdata,
o_re => w_bus_re,
o_r32 => open,
o_radr => wb_bus_raddr,
o_wadr => wb_bus_waddr,
o_we => w_bus_we,
o_wstrb => wb_bus_wstrb,
o_wdata => wb_bus_wdata
);
comblogic : process(nrst, slvcfg, mstcfg, r, r_adc_detect, i_otp_busy,
w_bus_re, wb_bus_raddr, wb_bus_waddr,
w_bus_we, wb_bus_wstrb, wb_bus_wdata)
variable v : registers;
variable mstmap : master_config_map;
variable slvmap : slave_config_map;
variable raddr : integer;
variable waddr : integer;
variable vrdata : std_logic_vector(CFG_SYSBUS_DATA_BITS-1 downto 0);
variable rtmp : std_logic_vector(31 downto 0);
variable wtmp : std_logic_vector(31 downto 0);
begin
v := r;
v.raddr := wb_bus_raddr;
v.adc_detect := r_adc_detect;
for k in 0 to CFG_BUS0_XMST_TOTAL-1 loop
mstmap(2*k) := "00" & X"00000" & mstcfg(k).descrtype & mstcfg(k).descrsize;
mstmap(2*k+1) := mstcfg(k).vid & mstcfg(k).did;
end loop;
for k in 0 to CFG_BUS0_XSLV_TOTAL-1 loop
slvmap(4*k) := X"00" &
slvcfg(k).irq_idx & "000000" &
slvcfg(k).descrtype & slvcfg(k).descrsize;
slvmap(4*k+1) := slvcfg(k).vid & slvcfg(k).did;
slvmap(4*k+2) := slvcfg(k).xmask & X"000";
slvmap(4*k+3) := slvcfg(k).xaddr & X"000";
end loop;
vrdata := (others => '0');
for n in 0 to CFG_WORDS_ON_BUS-1 loop
raddr := conv_integer(r.raddr(n)(11 downto 2));
rtmp := (others => '0');
if raddr = 0 then
rtmp := hw_id;
elsif raddr = 1 then
rtmp := r.fw_id;
elsif raddr = 2 then
rtmp := r.adc_detect
& conv_std_logic_vector(CFG_BUS0_XMST_TOTAL,8)
& conv_std_logic_vector(CFG_BUS0_XSLV_TOTAL,8)
& conv_std_logic_vector(tech,8);
elsif raddr = 3 then
-- reserved
elsif raddr = 4 then
rtmp := r.idt(31 downto 0);
elsif raddr = 5 then
rtmp := r.idt(63 downto 32);
elsif raddr = 6 then
rtmp := r.malloc_addr(31 downto 0);
elsif raddr = 7 then
rtmp := r.malloc_addr(63 downto 32);
elsif raddr = 8 then
rtmp := r.malloc_size(31 downto 0);
elsif raddr = 9 then
rtmp := r.malloc_size(63 downto 32);
elsif raddr = 10 then
rtmp := r.fwdbg1(31 downto 0);
elsif raddr = 11 then
rtmp := r.fwdbg1(63 downto 32);
elsif raddr = 12 then
rtmp := r.fwdbg2(31 downto 0);
elsif raddr = 13 then
rtmp := r.fwdbg2(63 downto 32);
elsif raddr = 14 then
rtmp(0) := i_otp_busy;
rtmp(11 downto 8) := r.otp_cfg_rsetup;
rtmp(15 downto 12) := r.otp_cfg_wadrsetup;
rtmp(19 downto 16) := r.otp_cfg_whold;
elsif raddr = 15 then
rtmp := r.otp_cfg_wactive;
elsif raddr >= 16 and raddr < 16+2*CFG_BUS0_XMST_TOTAL then
rtmp := mstmap(raddr - 16);
elsif raddr >= 16+2*CFG_BUS0_XMST_TOTAL
and raddr < 16+2*CFG_BUS0_XMST_TOTAL+4*CFG_BUS0_XSLV_TOTAL then
rtmp := slvmap(raddr - 16 - 2*CFG_BUS0_XMST_TOTAL);
end if;
vrdata(32*(n+1)-1 downto 32*n) := rtmp;
end loop;
if w_bus_we = '1' then
for n in 0 to CFG_WORDS_ON_BUS-1 loop
if conv_integer(wb_bus_wstrb(CFG_ALIGN_BYTES*(n+1)-1 downto CFG_ALIGN_BYTES*n)) /= 0 then
waddr := conv_integer(wb_bus_waddr(n)(11 downto 2));
wtmp := wb_bus_wdata(32*(n+1)-1 downto 32*n);
case waddr is
when 1 => v.fw_id := wtmp;
when 4 => v.idt(31 downto 0) := wtmp;
when 5 => v.idt(63 downto 32) := wtmp;
when 6 => v.malloc_addr(31 downto 0) := wtmp;
when 7 => v.malloc_addr(63 downto 32) := wtmp;
when 8 => v.malloc_size(31 downto 0) := wtmp;
when 9 => v.malloc_size(63 downto 32) := wtmp;
when 10 => v.fwdbg1(31 downto 0) := wtmp;
when 11 => v.fwdbg1(63 downto 32) := wtmp;
when 12 => v.fwdbg2(31 downto 0) := wtmp;
when 13 => v.fwdbg2(63 downto 32) := wtmp;
when 14 =>
v.otp_cfg_rsetup := wtmp(11 downto 8);
v.otp_cfg_wadrsetup := wtmp(15 downto 12);
v.otp_cfg_whold := wtmp(19 downto 16);
when 15 => v.otp_cfg_wactive := wtmp;
when others =>
end case;
end if;
end loop;
end if;
if not async_reset and nrst = '0' then
v := R_RESET;
end if;
rin <= v;
wb_dev_rdata <= vrdata;
end process;
cfg <= xconfig;
o_otp_cfg_rsetup <= r.otp_cfg_rsetup;
o_otp_cfg_wadrsetup <= r.otp_cfg_wadrsetup;
o_otp_cfg_wactive <= r.otp_cfg_wactive;
o_otp_cfg_whold <= r.otp_cfg_whold;
-- registers:
regs : process(sys_clk, nrst)
begin
if async_reset and nrst = '0' then
r <= R_RESET;
elsif rising_edge(sys_clk) then
r <= rin;
end if;
end process;
-- ADC clock detector:
regsadc : process(adc_clk, nrst)
begin
if nrst = '0' then
r_adc_detect <= (others => '0');
elsif rising_edge(adc_clk) then
r_adc_detect <= r_adc_detect(6 downto 0) & nrst;
end if;
end process;
end;
| apache-2.0 | a9278525df9651cf7dda15369b521b40 | 0.583653 | 3.213338 | false | false | false | false |
sergeykhbr/riscv_vhdl | vhdl/rtl/riverlib/river_top.vhd | 1 | 10,998 | --!
--! Copyright 2018 Sergey Khabarov, [email protected]
--!
--! Licensed under the Apache License, Version 2.0 (the "License");
--! you may not use this file except in compliance with the License.
--! You may obtain a copy of the License at
--!
--! http://www.apache.org/licenses/LICENSE-2.0
--!
--! Unless required by applicable law or agreed to in writing, software
--! distributed under the License is distributed on an "AS IS" BASIS,
--! WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
--! See the License for the specific language governing permissions and
--! limitations under the License.
--!
library ieee;
use ieee.std_logic_1164.all;
library commonlib;
use commonlib.types_common.all;
--! RIVER CPU specific library.
library riverlib;
--! RIVER CPU configuration constants.
use riverlib.river_cfg.all;
entity RiverTop is
generic (
memtech : integer := 0;
hartid : integer := 0;
async_reset : boolean := false;
fpu_ena : boolean := true;
coherence_ena : boolean := false;
tracer_ena : boolean := false
);
port (
i_clk : in std_logic; -- CPU clock
i_nrst : in std_logic; -- Reset. Active LOW.
-- Memory interface:
i_req_mem_ready : in std_logic; -- AXI request was accepted
o_req_mem_path : out std_logic; -- 0=ctrl; 1=data path
o_req_mem_valid : out std_logic; -- AXI memory request is valid
o_req_mem_type : out std_logic_vector(REQ_MEM_TYPE_BITS-1 downto 0);-- AXI memory request is write type
o_req_mem_addr : out std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0); -- AXI memory request address
o_req_mem_strob : out std_logic_vector(L1CACHE_BYTES_PER_LINE-1 downto 0);-- Writing strob. 1 bit per Byte
o_req_mem_data : out std_logic_vector(L1CACHE_LINE_BITS-1 downto 0); -- Writing data
i_resp_mem_valid : in std_logic; -- AXI response is valid
i_resp_mem_path : in std_logic; -- 0=ctrl; 1=data path
i_resp_mem_data : in std_logic_vector(L1CACHE_LINE_BITS-1 downto 0); -- Read data
i_resp_mem_load_fault : in std_logic; -- Bus response with SLVERR or DECERR on read
i_resp_mem_store_fault : in std_logic; -- Bus response with SLVERR or DECERR on write
-- Interrupt line from external interrupts controller (PLIC).
i_ext_irq : in std_logic;
-- D$ Snoop interface
i_req_snoop_valid : in std_logic;
i_req_snoop_type : in std_logic_vector(SNOOP_REQ_TYPE_BITS-1 downto 0);
o_req_snoop_ready : out std_logic;
i_req_snoop_addr : in std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
i_resp_snoop_ready : in std_logic;
o_resp_snoop_valid : out std_logic;
o_resp_snoop_data : out std_logic_vector(L1CACHE_LINE_BITS-1 downto 0);
o_resp_snoop_flags : out std_logic_vector(DTAG_FL_TOTAL-1 downto 0);
-- Debug interface:
i_dport_req_valid : in std_logic; -- Debug access from DSU is valid
i_dport_write : in std_logic; -- Write command flag
i_dport_addr : in std_logic_vector(CFG_DPORT_ADDR_BITS-1 downto 0); -- Debug Port address
i_dport_wdata : in std_logic_vector(RISCV_ARCH-1 downto 0);-- Write value
o_dport_req_ready : out std_logic; -- Ready to accept dbg request
i_dport_resp_ready : in std_logic; -- Read to accept response
o_dport_resp_valid : out std_logic; -- Response is valid
o_dport_rdata : out std_logic_vector(RISCV_ARCH-1 downto 0);-- Response value
o_halted : out std_logic
);
end;
architecture arch_RiverTop of RiverTop is
-- Control path:
signal w_req_ctrl_ready : std_logic;
signal w_req_ctrl_valid : std_logic;
signal wb_req_ctrl_addr : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
signal w_resp_ctrl_valid : std_logic;
signal wb_resp_ctrl_addr : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
signal wb_resp_ctrl_data : std_logic_vector(31 downto 0);
signal w_resp_ctrl_load_fault : std_logic;
signal w_resp_ctrl_executable : std_logic;
signal w_resp_ctrl_ready : std_logic;
-- Data path:
signal w_req_data_ready : std_logic;
signal w_req_data_valid : std_logic;
signal w_req_data_write : std_logic;
signal wb_req_data_addr : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
signal wb_req_data_wdata : std_logic_vector(63 downto 0);
signal wb_req_data_wstrb : std_logic_vector(7 downto 0);
signal w_resp_data_valid : std_logic;
signal wb_resp_data_addr : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
signal wb_resp_data_data : std_logic_vector(63 downto 0);
signal w_resp_data_load_fault : std_logic;
signal w_resp_data_store_fault : std_logic;
signal w_resp_data_er_mpu_load : std_logic;
signal w_resp_data_er_mpu_store : std_logic;
signal wb_resp_data_store_fault_addr : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
signal w_resp_data_ready : std_logic;
signal w_mpu_region_we : std_logic;
signal wb_mpu_region_idx : std_logic_vector(CFG_MPU_TBL_WIDTH-1 downto 0);
signal wb_mpu_region_addr : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
signal wb_mpu_region_mask : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
signal wb_mpu_region_flags : std_logic_vector(CFG_MPU_FL_TOTAL-1 downto 0);
signal wb_flush_address : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
signal w_flush_valid : std_logic;
signal wb_data_flush_address : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
signal w_data_flush_valid : std_logic;
signal w_data_flush_end : std_logic;
begin
proc0 : Processor generic map (
hartid => hartid,
async_reset => async_reset,
fpu_ena => fpu_ena,
tracer_ena => tracer_ena
) port map (
i_clk => i_clk,
i_nrst => i_nrst,
i_req_ctrl_ready => w_req_ctrl_ready,
o_req_ctrl_valid => w_req_ctrl_valid,
o_req_ctrl_addr => wb_req_ctrl_addr,
i_resp_ctrl_valid => w_resp_ctrl_valid,
i_resp_ctrl_addr => wb_resp_ctrl_addr,
i_resp_ctrl_data => wb_resp_ctrl_data,
i_resp_ctrl_load_fault => w_resp_ctrl_load_fault,
i_resp_ctrl_executable => w_resp_ctrl_executable,
o_resp_ctrl_ready => w_resp_ctrl_ready,
i_req_data_ready => w_req_data_ready,
o_req_data_valid => w_req_data_valid,
o_req_data_write => w_req_data_write,
o_req_data_addr => wb_req_data_addr,
o_req_data_wdata => wb_req_data_wdata,
o_req_data_wstrb => wb_req_data_wstrb,
i_resp_data_valid => w_resp_data_valid,
i_resp_data_addr => wb_resp_data_addr,
i_resp_data_data => wb_resp_data_data,
i_resp_data_store_fault_addr => wb_resp_data_store_fault_addr,
i_resp_data_load_fault => w_resp_data_load_fault,
i_resp_data_store_fault => w_resp_data_store_fault,
i_resp_data_er_mpu_load => w_resp_data_er_mpu_load,
i_resp_data_er_mpu_store => w_resp_data_er_mpu_store,
o_resp_data_ready => w_resp_data_ready,
i_ext_irq => i_ext_irq,
o_mpu_region_we => w_mpu_region_we,
o_mpu_region_idx => wb_mpu_region_idx,
o_mpu_region_addr => wb_mpu_region_addr,
o_mpu_region_mask => wb_mpu_region_mask,
o_mpu_region_flags => wb_mpu_region_flags,
i_dport_req_valid => i_dport_req_valid,
i_dport_write => i_dport_write,
i_dport_addr => i_dport_addr,
i_dport_wdata => i_dport_wdata,
o_dport_req_ready => o_dport_req_ready,
i_dport_resp_ready => i_dport_resp_ready,
o_dport_resp_valid => o_dport_resp_valid,
o_dport_rdata => o_dport_rdata,
o_halted => o_halted,
o_flush_address => wb_flush_address,
o_flush_valid => w_flush_valid,
o_data_flush_address => wb_data_flush_address,
o_data_flush_valid => w_data_flush_valid,
i_data_flush_end => w_data_flush_end);
cache0 : CacheTop generic map (
memtech => memtech,
async_reset => async_reset,
coherence_ena => coherence_ena
) port map (
i_clk => i_clk,
i_nrst => i_nrst,
i_req_ctrl_valid => w_req_ctrl_valid,
i_req_ctrl_addr => wb_req_ctrl_addr,
o_req_ctrl_ready => w_req_ctrl_ready,
o_resp_ctrl_valid => w_resp_ctrl_valid,
o_resp_ctrl_addr => wb_resp_ctrl_addr,
o_resp_ctrl_data => wb_resp_ctrl_data,
o_resp_ctrl_load_fault => w_resp_ctrl_load_fault,
o_resp_ctrl_executable => w_resp_ctrl_executable,
i_resp_ctrl_ready => w_resp_ctrl_ready,
i_req_data_valid => w_req_data_valid,
i_req_data_write => w_req_data_write,
i_req_data_addr => wb_req_data_addr,
i_req_data_wdata => wb_req_data_wdata,
i_req_data_wstrb => wb_req_data_wstrb,
o_req_data_ready => w_req_data_ready,
o_resp_data_valid => w_resp_data_valid,
o_resp_data_addr => wb_resp_data_addr,
o_resp_data_data => wb_resp_data_data,
o_resp_data_store_fault_addr => wb_resp_data_store_fault_addr,
o_resp_data_load_fault => w_resp_data_load_fault,
o_resp_data_store_fault => w_resp_data_store_fault,
o_resp_data_er_mpu_load => w_resp_data_er_mpu_load,
o_resp_data_er_mpu_store => w_resp_data_er_mpu_store,
i_resp_data_ready => w_resp_data_ready,
i_req_mem_ready => i_req_mem_ready,
o_req_mem_path => o_req_mem_path,
o_req_mem_valid => o_req_mem_valid,
o_req_mem_type => o_req_mem_type,
o_req_mem_addr => o_req_mem_addr,
o_req_mem_strob => o_req_mem_strob,
o_req_mem_data => o_req_mem_data,
i_resp_mem_valid => i_resp_mem_valid,
i_resp_mem_path => i_resp_mem_path,
i_resp_mem_data => i_resp_mem_data,
i_resp_mem_load_fault => i_resp_mem_load_fault,
i_resp_mem_store_fault => i_resp_mem_store_fault,
i_mpu_region_we => w_mpu_region_we,
i_mpu_region_idx => wb_mpu_region_idx,
i_mpu_region_addr => wb_mpu_region_addr,
i_mpu_region_mask => wb_mpu_region_mask,
i_mpu_region_flags => wb_mpu_region_flags,
i_req_snoop_valid => i_req_snoop_valid,
i_req_snoop_type => i_req_snoop_type,
o_req_snoop_ready => o_req_snoop_ready,
i_req_snoop_addr => i_req_snoop_addr,
i_resp_snoop_ready => i_resp_snoop_ready,
o_resp_snoop_valid => o_resp_snoop_valid,
o_resp_snoop_data => o_resp_snoop_data,
o_resp_snoop_flags => o_resp_snoop_flags,
i_flush_address => wb_flush_address,
i_flush_valid => w_flush_valid,
i_data_flush_address => wb_data_flush_address,
i_data_flush_valid => w_data_flush_valid,
o_data_flush_end => w_data_flush_end);
end;
| apache-2.0 | 469ee451d337e918e21887104474a38c | 0.61202 | 3.056698 | false | false | false | false |
sergeykhbr/riscv_vhdl | vhdl/rtl/riverlib/l2cache/river_l2serdes.vhd | 1 | 7,868 | --!
--! Copyright 2020 Sergey Khabarov, [email protected]
--!
--! Licensed under the Apache License, Version 2.0 (the "License");
--! you may not use this file except in compliance with the License.
--! You may obtain a copy of the License at
--!
--! http://www.apache.org/licenses/LICENSE-2.0
--!
--! Unless required by applicable law or agreed to in writing, software
--! distributed under the License is distributed on an "AS IS" BASIS,
--! WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
--! See the License for the specific language governing permissions and
--! limitations under the License.
--!
library ieee;
use ieee.std_logic_1164.all;
library commonlib;
use commonlib.types_common.all;
--! AMBA system bus specific library.
library ambalib;
--! AXI4 configuration constants.
use ambalib.types_amba4.all;
--! RIVER CPU specific library.
library riverlib;
--! RIVER CPU configuration constants.
use riverlib.river_cfg.all;
--! River top level with AMBA interface module declaration
use riverlib.types_river.all;
entity river_l2serdes is
generic (
async_reset : boolean
);
port (
i_nrst : in std_logic;
i_clk : in std_logic;
i_l2o : in axi4_l2_out_type;
o_l2i : out axi4_l2_in_type;
i_msti : in axi4_master_in_type;
o_msto : out axi4_master_out_type
);
end;
architecture arch_river_l2serdes of river_l2serdes is
-- TODO as generic parameters
constant linew : integer := L1CACHE_LINE_BITS;
constant busw : integer := CFG_SYSBUS_DATA_BITS;
constant lineb : integer := linew / 8;
constant busb : integer := busw / 8;
constant SERDES_BURST_LEN : integer := lineb / busb;
type state_type is (Idle, Read, Write);
type RegistersType is record
state : state_type;
req_len : std_logic_vector(7 downto 0);
b_wait : std_logic;
cacheline : std_logic_vector(linew-1 downto 0);
wstrb : std_logic_vector(lineb-1 downto 0);
rmux : std_logic_vector(SERDES_BURST_LEN-1 downto 0);
end record;
constant R_RESET : RegistersType := (
idle, X"00", '0', (others => '0'), (others => '0'), (others => '0')
);
signal r, rin : RegistersType;
function size2len(size: std_logic_vector)
return std_logic_vector is
variable len: std_logic_vector(7 downto 0);
begin
case size(2 downto 0) is
when "100" => len := X"01";
when "101" => len := X"03";
when "110" => len := X"07";
when "111" => len := X"0F";
when others => len := X"00";
end case;
return len;
end function size2len;
begin
comb : process(i_nrst, i_l2o, i_msti, r)
variable v : RegistersType;
variable v_req_mem_ready : std_logic;
variable vb_line_o : std_logic_vector(linew-1 downto 0);
variable v_r_valid : std_logic;
variable v_w_valid : std_logic;
variable v_w_last : std_logic;
variable v_w_ready : std_logic;
variable vb_len : std_logic_vector(7 downto 0);
variable vb_aw_id : std_logic_vector(CFG_SYSBUS_ID_BITS-1 downto 0);
variable vb_ar_id : std_logic_vector(CFG_SYSBUS_ID_BITS-1 downto 0);
begin
v := r;
v_req_mem_ready := '0';
v_r_valid := '0';
v_w_valid := '0';
v_w_last := '0';
v_w_ready := '0';
vb_len := (others => '0');
vb_aw_id := (others => '0');
vb_ar_id := (others => '0');
vb_aw_id(CFG_CPU_ID_BITS-1 downto 0) := i_l2o.aw_id;
vb_ar_id(CFG_CPU_ID_BITS-1 downto 0) := i_l2o.ar_id;
vb_line_o := r.cacheline;
for i in 0 to SERDES_BURST_LEN-1 loop
if r.rmux(i) = '1' then
vb_line_o((i+1)*busw-1 downto i*busw) := i_msti.r_data;
end if;
end loop;
if i_l2o.b_ready = '1' then
v.b_wait := '0';
end if;
case r.state is
when Idle =>
v_req_mem_ready := '1';
when Read =>
if i_msti.r_valid = '1' then
v.cacheline := vb_line_o;
v.rmux := r.rmux(SERDES_BURST_LEN-2 downto 0) & '0';
if r.req_len = X"00" then
v_r_valid := '1';
v_req_mem_ready := '1';
else
v.req_len := r.req_len - 1;
end if;
end if;
when Write =>
v_w_valid := '1';
if r.req_len = X"00" then
v_w_last := '1';
end if;
if i_msti.w_ready = '1' then
v.cacheline(linew-1 downto linew-busw) := (others => '0');
v.cacheline(linew-busw-1 downto 0) := r.cacheline(linew-1 downto busw);
v.wstrb(lineb-1 downto lineb-busb) := (others => '0');
v.wstrb(lineb-busb-1 downto 0) := r.wstrb(lineb-1 downto busb);
if r.req_len = X"00" then
v_w_ready := '1';
v.b_wait := '1';
v_req_mem_ready := '1';
else
v.req_len := r.req_len - 1;
end if;
end if;
when others =>
end case;
if v_req_mem_ready = '1' then
if (i_l2o.ar_valid and i_msti.ar_ready) = '1' then
v.state := Read;
v.rmux := conv_std_logic_vector(1, SERDES_BURST_LEN);
vb_len := size2len(i_l2o.ar_bits.size);
elsif (i_l2o.aw_valid and i_msti.aw_ready) = '1' then
v.cacheline := i_l2o.w_data; -- Undocumented River (Axi-lite) feature
v.wstrb := i_l2o.w_strb;
v.state := Write;
vb_len := size2len(i_l2o.aw_bits.size);
else
v.state := Idle;
end if;
v.req_len := vb_len;
end if;
if not async_reset and i_nrst = '0' then
v := R_RESET;
end if;
o_msto.aw_valid <= i_l2o.aw_valid;
o_msto.aw_bits.addr <= i_l2o.aw_bits.addr;
o_msto.aw_bits.len <= vb_len; -- burst len = len[7:0] + 1
o_msto.aw_bits.size <= "011"; -- 0=1B; 1=2B; 2=4B; 3=8B; ...
o_msto.aw_bits.burst <= "01"; -- 00=FIXED; 01=INCR; 10=WRAP; 11=reserved
o_msto.aw_bits.lock <= i_l2o.aw_bits.lock;
o_msto.aw_bits.cache <= i_l2o.aw_bits.cache;
o_msto.aw_bits.prot <= i_l2o.aw_bits.prot;
o_msto.aw_bits.qos <= i_l2o.aw_bits.qos;
o_msto.aw_bits.region <= i_l2o.aw_bits.region;
o_msto.aw_id <= vb_aw_id;
o_msto.aw_user <= i_l2o.aw_user;
o_msto.w_valid <= v_w_valid;
o_msto.w_last <= v_w_last;
o_msto.w_data <= r.cacheline(busw-1 downto 0);
o_msto.w_strb <= r.wstrb(busb-1 downto 0);
o_msto.w_user <= i_l2o.w_user;
o_msto.b_ready <= i_l2o.b_ready;
o_msto.ar_valid <= i_l2o.ar_valid;
o_msto.ar_bits.addr <= i_l2o.ar_bits.addr;
o_msto.ar_bits.len <= vb_len; -- burst len = len[7:0] + 1
o_msto.ar_bits.size <= "011"; -- 0=1B; 1=2B; 2=4B; 3=8B; ...
o_msto.ar_bits.burst <= "01"; -- 00=FIXED; 01=INCR; 10=WRAP; 11=reserved
o_msto.ar_bits.lock <= i_l2o.ar_bits.lock;
o_msto.ar_bits.cache <= i_l2o.ar_bits.cache;
o_msto.ar_bits.prot <= i_l2o.ar_bits.prot;
o_msto.ar_bits.qos <= i_l2o.ar_bits.qos;
o_msto.ar_bits.region <= i_l2o.ar_bits.region;
o_msto.ar_id <= vb_ar_id;
o_msto.ar_user <= i_l2o.ar_user;
o_msto.r_ready <= i_l2o.r_ready;
o_l2i.aw_ready <= i_msti.aw_ready;
o_l2i.w_ready <= v_w_ready;
o_l2i.b_valid <= i_msti.b_valid and r.b_wait;
o_l2i.b_resp <= i_msti.b_resp;
o_l2i.b_id <= i_msti.b_id(CFG_CPU_ID_BITS-1 downto 0);
o_l2i.b_user <= i_msti.b_user;
o_l2i.ar_ready <= i_msti.ar_ready;
o_l2i.r_valid <= v_r_valid;
o_l2i.r_resp <= i_msti.r_resp;
o_l2i.r_data <= vb_line_o;
o_l2i.r_last <= v_r_valid;
o_l2i.r_id <= i_msti.r_id(CFG_CPU_ID_BITS-1 downto 0);
o_l2i.r_user <= i_msti.r_user;
rin <= v;
end process;
-- registers:
regs : process(i_clk, i_nrst)
begin
if async_reset and i_nrst = '0' then
r <= R_RESET;
elsif rising_edge(i_clk) then
r <= rin;
end if;
end process;
end;
| apache-2.0 | b00a3e9c1d9ac4f85a70edfc4df000e2 | 0.565074 | 2.760702 | false | false | false | false |
szanni/aeshw | zybo-base/zybo_bsd/zybo_bsd.srcs/sources_1/bd/system/ip/system_auto_pc_5/fifo_generator_v11_0/ramfifo/dc_ss_fwft.vhd | 19 | 9,156 | `protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
eRz+leRSRPpou0Iyb6bnhB8hg9kPbBirrzFUAdKqw/be3+N8ZrhDizYaLfXqnwxlgZsSWJCzRfM7
HvMw/rTLhw==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
Rl74r1iJC/bnSjzA+Rx4NZe56NnmjoVRFzUux12uAkwgT++rVuZ0cWQxVSY31Gff9TGn02lNxavo
U1xWF81U2u/Zi0XY7ZHmbpbdUEdpSv9huiEIrpuLuTgWjBSUwsGYqRxHLx1vq4vioRXFlAhPk9JA
iYodwxjKI7YbbZElfVA=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2013_09", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
lO1ylq105LQ/xiJNZcB3fPTy1RngsQ3yQ/KJ6FM1qs+SoXmUQjQaEb6hJLPAypYN8r4VdJAzSC/U
5nFe27DWNjEKmiIleROkH20okne+9N7+PhPIZQnib521U3SV/ecBImKKPYRpHhAeqE7OE/DzQFWx
10ISqR1I6WBii4R8gkz5k4dkFHhiTU6fgkIHLUXXclJrpQ6fHHlk7MPcpQDjK7bXjIiQ81qfpVmp
P5Kh8wiY7VppUj33GlIcYsNio8GAIV3e0kBKLoX73uDqdvJ/2zBzKOZoDd0As7C4AHF8YSixL0MC
djalIDRCSOBX8Rd9h057rIe8ZIXNMu/BHoKk/g==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
aJoUzTg4Ju9hNY+ZPcuNUmGg+rCD8aivgSTst8VRB5/g9QHuzghA24ad2z08gxWDFeIOT/HFgT6H
g4nDsyLlbHK2gxUijkJ6ORkRfGOxb8UwHTzLEIRJ5zmkHtJXYM250JOsiukrgEDT40HqdtSgre6O
kXXliGFm9MU0LwRby+I=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
ca/+TaSll/KHF7mIE37XMZRKDQpSdluwuJA9x/CRPHNmOrubSxRKoPtbXlxVM6ehE2hXp6yB6qBf
Fup9ZI873BFwgulDsuQHuOSUPGo4bBHwDnNbSi/4G2je8uxqj4KeP/bv0RKunNMT/FTascQdDh6n
SVSARZi75+ElUvhBfAjPHB+yugMvSxDk7TRPn1RomvNtW1CJTL51/PQt26FoAtnxmwYDcU5wo8WT
ATzZmP4jq9ClSvjXHkf/VnlLenBFunDj22Ef6vdvxByXWMZrDdZyqqIvDvktra69BBPdtD2LNyW1
FCI6v17qDRdmShLAB1bJHs4PPkDtQbDOwcgx6g==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 5040)
`protect data_block
lmDBhH2N1dVyr6Nx9UJnCqbVIGTs6xb5a1JBLsQDb1u6ak2Y9w+hzQuzpRQDI9KwrFRgnvEs7ZT5
/2erdWOBCFUVk9MvsY6SAEvX2k88OrHzY4L32DgAn2B08x642ngwasBeTvX8VL8MoRQJwU3PdcZy
Wm8tffH12U9ZCPcY3faNFcNHlW051suOnfhwVur1Acd+RboAZWFS351l+7sjVXC2Ug5yGSPPem2C
Aowk//TB8x4Fae2mSF24p3Wmp9Y+7oVzba/S+Ugiiyu57bz4wIibGxEqwNnL/trVC+cqtBRWjusv
ngC93W2hrwpIEk9Y6lgmtzEF/nlJwrwOxrCTr8vArV6LVJeBH2KBXmXeqmkxrtbBmOSikXxx9482
jucheBC45w1g+LoBZ5zEmSSc3rCy6pFz5VzgW/KttQkODde8MvrnW5r/rTjn4hAqgAO1HWckbiGU
PtNvd5p59bIHLawabEjLlYMzD2rj2DeSOsn+PYdQ4vbTQdMcFUOkCH+b6swNhu7wmAhO3L6CN3N3
pEiGCGRghrq6YNBracQVnVto9A6XRFBWoHVSkSCVztIUquL3cRXMzp7ma8i2024zbYMeQrl6wmrH
O49189DsMfMHpEqkgT2xz+yo3f/xKnioXiA9U57X1NjXq91HpdBJhhnaV3Eg8POTstp5r7qjfPyI
zTkYJ2IWioJJNcmpBYAn4SgHyFOvM0246AbKxV/41P5qosEGpXTFGdHJj7JmoyRVhOFB1m73FnUf
zc/KQzh5O4tPC8dBGscN6Wun4JazZ1elhqFIUFO8eTvI3YJGNmDhK5s3wQ8OKL4jRhR8+vdITPOz
IyYPrB3IUTWNdkjLa6ulgzE3DTCViGZGo0eLe/3b6GEPHDTTGV5+BQ76B3DbpBa9/CEs/O1OCGLv
+UjCNdus18u8jAQla6cPSnxHmwLWVgS1g8A8LRM9eAE1Jj2gmPdRRj9sT2QQke2QVKW6IuJwgrJN
f/FoFD5OdmpSrWLo8URr+8yEImFkkWG1rlZMF4b2agX3TvaaW9CD34M4kIXyaekKGw8t4bRNB3xi
K0EGA2DeB0Oev7MZOBzgEZms1kziADkBhbpUzWy+PMq1W0yxcWLfAcB1qLlpEhqozaoZbajQN+kK
ObDEAqEjqd0lq3DZzLpAQmOtFMHH11K8xUt5Z2yPLk7F1bmKLIUNbhmC3bS84YqNSTFNZyWWdZuc
srHnDyZQMVn0IxLD9eRQjDQHmFsNZWMdKxzQAyXEPDnavZvUnKl4+SqLkgpTY+nDn2kRFHhxg0nh
6ArlHZjGlkQJjjjK2tTwgeG1a63HcxewMNweCEauYZmmxUr6zHNoczPUrwyjIHJBv9d5XORZjJrg
T3HRnIi7rZKXIl5VVrpIiTVJuFmXdzDHRhJ6IK7OJccm2VelAGD51/zpKLnNNbuJ3HJ/9yLX5ge8
NidA73tMAV4wcIvRZyJK0vNLogsqJoVZAj3Kj9CGYhIjDW7hW85wwhvMPmDCRki0K+xy1E//nlES
y6rfoJ85cVWV5K7DP3KOChx02VES41J1UCbHnjaVdtJFlTPU3KB0+vNpK0VpzTmUcF2sGwx5qAxD
ClIFz9Di3URw+NZnChUtx1McpqVXNFVPV+xrS0Ck2O23oFAuUFjulQdwnex5GgE58FzAHlC7HnY+
6sXcr/s5h1gcsARWYeYLRkWGVfSOLdCRxl5DATlAIhyIP9Bd17WjGZXVjnmnA02q8Mcl/pRds46c
FmlcifhVs9fm4nE3OtlQmIFPD5mFG+pyH5Af/k3o/GKUGeLs2Ypko85ZgYVxEw06ChO1O4VVP1nZ
L28f6BlUpbB35ZaIQ3mciDJNWgK68e1H4yVtcn9k+r8aVx3Hf7x6Ok1QgxsQl5d1o2JWJKiciik9
tLScTYb6AzuJoVEhv2fuwSGFklwcS/kcOd/xZ1A/P7dZOMikjt4zxbMZ9zrjjmSzdMOh1UaXFpe8
QqpcE7Jfme23o36SmMVWdSsEY/8IYRZbgtfSKmeauL6EytxKgnoBDwOBaFPr0lcfldP6YYLlFGpS
AXfkWz3FgQ+xTkg376AhR2eaoh5T2EFyYqtt5fX6i7j3Krx6b5eKY4AG9XkUBdGagR0AFXWoAzWB
xbkuNijBmGa031l983iOGJRudR6GuMMiXrWroGX/9OxJHuK1GBYzE5AVox1wLY+XIdpE+HnhDvJl
3wU2MfyoKVjHQ+fyCZ11RV9XHCfb+SwOSxDCkXPhvICDDb+x1zpTeO0XW6jstwxPAnw6W9XEEfza
OjbuV1xG0zaFjtRPN7T+iT/ZtQZTxEvuUcKB2j+uZ2+UUJiCLFw8cIE5v3/fSWlqOolGXCMGMq2s
o8dYztDbgAiw+1bfNAvh8kdQSdNYuH6dpy3lYA6cVWI6xQmg0h+9Di12mK8wSLHZmG0v0s23bFLr
CcFXNXrDmQosuPGv8SZ971bOEgB/tf7NTSYOhUpFaYaCvCtKcwZz0hjuEvurLylbQ9Xo6eVxWhr6
g2fptgjKo/Y69iyY9PlCs40MEkYhKuv8m7NHhOqD+XKhd3GpePG9wj8Gq2iU6JAb4l5zcTaKCl86
IhUZKv8nb5nj+bYOjhJWZFpa2d+/SnNn2OjeG8ZiD60mLd6aX+q+eQw9jdrSu8dfvER+2t+ri9wa
HfRggp6WK6sPH32/bzHP/lDJUrV7jj1I4MCfPz8P920ZfS1He3+wlI4PLHQ5m8ohhWF0O1VBJ7PZ
LqnufhPDBPM1Oy/Omc61Ff2U5HzupGucnyK20yxVB2QG15kPh5gPXV5DWLZHOlGjS9tw+mSJPYhY
06HSLSNCu8zZFM1vCRE+vC6/dDyxVFD/h8gbW2szMbk4JvyI6ZO9guQksuJHqB6IvoKC7iy/qM0u
Jtwzm8YTYox/nr1FhMC9+CJJrIJB8wEjjUJAJsXA1HTKFTZsq2ke5nP1m/4ic7kulCDJOkB+kFNu
nuT1hoEJx0U4HkFOM/am2XhpCgh6z/9gCu/g9/pIg9tnIwgu4s+b5AJOrBvSHmYIkpIwaYO9h8I2
c33ILAQNN30g8gITrEiwtA3ontgYKs7T35wqXVWGzZba5E6WgOHYa5tOOaYK711AtLBy+Q+MSZQu
tZdI0bYVxMtOfuwkvUlmj9n9zinCzUFNH4gudq67owUeiqDkZWmWR4xDkR47aiQaw+y0yvPK+RU3
0KQ43vOVinHfM0MIAxQnKQz3bkd5Z3qc1/0eFTmNOZSZKhSkTIdvNBJV1FgkDnvVdPuK6lGF5HB/
YeSrCDq8h+VofobmP1TUVyBaU8OQBNCq8PQ+5yBvdV7Isuvcfii/YG5kPg1wOEValNRm95CmC/27
j9Hx9xeSVD2s1H9hjBcyD/PnkQ1+wp6oueFJELGVjD89FAgzPL+JKWyhfp2O3yLktPu0ye04L3mA
9qD+NMvTj7S2Fl+cBtDJZ5S/nx8MQMvjYh59HTTFIq+lKzp1z4zLtGK5loV07nBY2iacMyXy2U7W
RPFQP9tf9mEmgxyyAaO69qCni6ZceE8ol3tHlBTP6uP5p5ZAVkWOCrqjBn6QpIh6+6H7jrU8IfCB
eJf7xvoSuWoxlyU70I6x17PIsMBeD9ZcEbCSTH46lC0rxxn8oT+wbeFOvcDJlmkvkb7/Zfz63gWQ
wv2kifQaDz2pOiCm/P10e/s6PHUqLp2xi8TDS00ij6LFG7vx9wiH8Y18MYcD63MAeWDSsf08MBn6
Iv0ZP4jK3pjeBFDuOTFZgJrDclGUgNRBtEMHNS9TGfgNuI22bkCgHsYJNVJPQBmeNg0uTFO7+p1e
OrmIiO8H9zX2PQ/Omvzryy7wFErbdnY6sdF163zGG5qxLQycSpwy0sD4pKlbBHNK8l8ZSo+8xCbh
Kq84GuuRrY/R+KHweqaEHvsJgIjjq5ZjczptHbNtSDUCBiERI4NCvJOa6EFaqYBu+LId7gD4811Q
4FxHJ/XUTEPk6ThI6yUFuciphxhIKLVP7Mxa8N4dobMuv9qxAr8LbCkj23LCE+2UXmBq2zTzhwZk
KH1sA2xbzlr18apIzOtoZc967m6xlAlSyKF5HM1SE3P7LchsEaOxLsFKs70NmPJMwduqz+Zwq9ua
ZfSsAsKb6n1P+IXOKhFirAWa0qgDRBBtxO+5WXkGjlM1zmGLpweMBM5RoeF9QpHAq9rrpJTfnY1p
tyt0k7AOUNyXgEgjQyC2+/co9g7uz/XK8PXDuXySBXFXsuxMAgiPgelLCRWt7F3/lDe8triJJhuQ
MgUT8wPa0s5uzXKG/bWwIiIuKHcoYmIUjkNAB3FU1822A+Uk8HlVepEQp6hMIlnoO3zrj7AZysqc
m6MEPSKdheyazLGL5cGbh6aciijwuW97/fUn/G024GElt+cyjfruFqNDv6GysNvQmCZLbUIzFYY7
ONKQ3YKkqASZktW9B4ihPnmUioQI9N85QGbRS7wHXhRxr047aKvvRSK0A3V0Dhm4OLzbOA9f+kmI
JY9GXS5hSDAmNl+fvpZ7QHN9lp6JSJjqMZ0/3qDA+985TbNEc8rQWOIXMf6uy34lrdAueCEtCWWj
Rqd69+2zunb347VIu6iehnnuQF2ktRSUlywzEPf4fUtyaZWFUFiI02+z2FGdM1uCGEQXujSIaIwA
qVqjAir1gYCpSYyMjlcQP3//pRIUUEIxKUPf0kxPKvPKCJC5yBpZ7OrnGBHNp7LMM9NkhS/CKC8p
xgclYn1jEf3Dz5IIhuf7mAAB4UscZFYYn00e35XyWV7w5BA9m2JtFFyj5B6OJRsGdt22oI1sVwrJ
AZs3/KLCQZjidrz8KrnVFfkthy9vzO7js9nkusH2lWtqeE+U0h8V8l7llJ8wyzUquu/C5qQnhD5P
wcpvxXYdaMb1QTv1U1YR0aV7elOo2m+PYJ9NK6bocwfTzaTvKmQ+yqgFvwHpb0pWvnvfk5Z5Q0bl
iyIw9VkzpNSNocrLTuUjFq4CVbdSZhtCkR6DxTPLhJbHApv+U5ZJslsk54X3PuSxflXV/WVq6ezo
Z4ZFwpry0o99jRpRms3Z0NiNr3ojclLNbNEjA+WamYvdV2jLI4DK4wsCpJj8N/Ezs/e1PSMUl6lY
qL9Y5JfkrBs259nLqGV0Szi0my9nMlj9TJ63bDXwMuaFNuCgUkPOSttJEMVGwfK0G1AGwxE1t8gi
SpBsF9wxVKCBKBmeIpShdEJ/aBEYt9R5lFc5tmY94lbWhN/qWJzi62RLA/lEmOdbDjXLIKwcH5Yw
P3eF1LrIL6bPrx8DAYa/ODRa5CCFOO2T3m6/rnJUUjusaM4k2/poGhBggSEnuxfGeNCbOP0sLMZR
tEeJ87YFl3Ye3+aH584rU2YEdmPLKZjgU5ISvddJfy0t3Eeo1QAFwGUZl/RWw0KEPYkrVSgH4GYe
Onmn2q4D3DjOhdpxdzk5CFq2LoySnjWsiHK6LKBVe8IShyKeXOEaiMoE2Sm+buUg0ZtYpqtHD03/
fjK4V6Yss7Ix5o2C9tObxOyU1PFNbzZwFNXE+rewrVHOs4PtZEjox92MicT5rbKaVs7ypAcqX186
fNHsmuF7Ew8oK2Nf2aMqMsXtxvDCHShdkVqfrz6bs8foMM3DXhvkbwCz+KfR5woBrloO9XOdRP/k
HD0ifbTPkRkpTB5c3VEVSwFVJ1aMGYrW9WM3B/FW4RZy4q6CLd5ndxKnwSWoZCtQjOTlhs1g+jUd
Tw9Z4FIl18PUkQkfCmw3DKAvoEhB7s4fdDMDOJ6zuU+WQBYGPkS/5FMd/sHTAVkY4V2A4W35hQ53
8R13l8jjzxFdTJmfOLSoen0jZroaxI6o14oKneV7tTAAxKSS/1gM5zglOZPF443KbZN44Tjh3x5+
ZsYm+KPYzhpXgHsVS+rjaynwpSLfs+btL5bE+uJaq5w83ZN7e0o2cFoI8F55TG8266A37qJlykTO
KAU2vr6If4NcaGfyUohm6bQHtlqBe6Hj3Dq84G13YYK/PmwkEN1WYr+8k3OHj3W+JrlKmSOrqg8k
LmhgZCNPEaxEpy02mX9L7MzJmjM8m0Nhp/AexHcUQ+US32K7sUBaWeILqmVK+cvyZwFMM0txRf16
uBCgtpZD+O4Y9MR6vLP/KVm9JjskGiD3Gy5IlFlPYQC8fQJUSAsClV4b1fosgybEcjgyuUxlBgGE
xYVY2CCY2Icev70wmD2TF33n4xQhsckOCWDszK8yET6GqGxv4XFR+zTvX+QKUIQwKeKU848NCkdz
SQ98ueA8fa3rOwNwpbYQuyDm1N6svpTyyWbENkhqpisBigCy+ljENhP5/cAhMAjUbWjBsT2EMzHS
LR7o94FMhuK/57DhuJ2nBOzURhWA8S37tLjcBppwuv/5X63BINd0+Z9KJZH8CAcnxwaXDat6LUcs
uCGCwP9u+00kzqIsb1YbYNmjay3ZRHAjAQLQUCK5Fjwqj0LOn+i68cD9O5brXT3kiQR88U/mX9+u
ostJ5Bv2YpM5DH2pO/19VRGSerGS33Zt6QCsi1nf002rRK9AwKkRYA5nzWJlRIj5bhkDQPdyikLP
dN/B36RPI18Wzm/6GpcJaB6uWhG2nhhk0/dCLMXImhFqzwtp6BLGb1McNq+v6X1CTE3cGvOnPz6P
Ev287hT9ddBV6TL2BPhg39fZujwYYZbG/nj/2TOqGsJ52HmLTlydSs8JAQuox7XaavT++8mFCLLo
K7wj7KZNA65Tn09kpA9NLItcw1uuCbCR
`protect end_protected
| bsd-2-clause | 86a4ab6e1786d80456f41900bbbdd0e8 | 0.922018 | 1.9075 | false | false | false | false |
sergeykhbr/riscv_vhdl | vhdl/rtl/riverlib/cache/types_cache.vhd | 1 | 9,724 | --!
--! Copyright 2019 Sergey Khabarov, [email protected]
--!
--! Licensed under the Apache License, Version 2.0 (the "License");
--! you may not use this file except in compliance with the License.
--! You may obtain a copy of the License at
--!
--! http://www.apache.org/licenses/LICENSE-2.0
--!
--! Unless required by applicable law or agreed to in writing, software
--! distributed under the License is distributed on an "AS IS" BASIS,
--! WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
--! See the License for the specific language governing permissions and
--! limitations under the License.
--!
--! Standard library
library ieee;
use ieee.std_logic_1164.all;
library commonlib;
use commonlib.types_common.all;
library riverlib;
use riverlib.river_cfg.all;
package types_cache is
component lrunway is generic (
abits : integer; -- cache bus address bus (usually 6..8)
waybits : integer -- Number of ways bitwidth (=2 for 4-ways cache)
);
port (
i_clk : in std_logic;
i_init : in std_logic;
i_raddr : in std_logic_vector(abits-1 downto 0);
i_waddr : in std_logic_vector(abits-1 downto 0);
i_up : in std_logic;
i_down : in std_logic;
i_lru : in std_logic_vector(waybits-1 downto 0);
o_lru : out std_logic_vector(waybits-1 downto 0)
);
end component;
component tagmem is generic (
memtech : integer := 0;
async_reset : boolean := false;
wayidx : integer := 0;
abus : integer := 64; -- system bus address bus (32 or 64 bits)
ibits : integer := 7; -- lines memory addres width (usually 6..8)
lnbits : integer := 5; -- One line bits: log2(bytes_per_line)
flbits : integer := 1; -- Total flags number saved with address tag
snoop : boolean := false -- snoop channel (only with enabled L2-cache)
);
port (
i_clk : in std_logic;
i_nrst : in std_logic;
i_addr : in std_logic_vector(abus-1 downto 0);
i_wstrb : in std_logic_vector(2**lnbits-1 downto 0);
i_wdata : in std_logic_vector(8*(2**lnbits)-1 downto 0);
i_wflags : in std_logic_vector(flbits-1 downto 0);
o_raddr : out std_logic_vector(abus-1 downto 0);
o_rdata : out std_logic_vector(8*(2**lnbits)-1 downto 0);
o_rflags : out std_logic_vector(flbits-1 downto 0);
o_hit : out std_logic;
i_snoop_addr : in std_logic_vector(abus-1 downto 0);
o_snoop_flags : out std_logic_vector(flbits-1 downto 0)
);
end component;
component tagmemnway is generic (
memtech : integer := 0;
async_reset : boolean := false;
abus : integer := 64; -- system bus address bus (32 or 64 bits)
waybits : integer := 2; -- log2 of number of ways bits (=2 for 4 ways)
ibits : integer := 7; -- lines memory addres width (usually 6..8)
lnbits : integer := 5; -- One line bits: log2(bytes_per_line)
flbits : integer := 1; -- Total flags number saved with address tag
snoop : boolean := false -- Snoop port disabled; 1 Enabled (L2 caching)
);
port (
i_clk : in std_logic;
i_nrst : in std_logic;
i_direct_access : in std_logic;
i_invalidate : in std_logic;
i_re : in std_logic;
i_we : in std_logic;
i_addr : in std_logic_vector(abus-1 downto 0);
i_wdata : in std_logic_vector(8*(2**lnbits)-1 downto 0);
i_wstrb : in std_logic_vector(2**lnbits-1 downto 0);
i_wflags : in std_logic_vector(flbits-1 downto 0);
o_raddr : out std_logic_vector(abus-1 downto 0);
o_rdata : out std_logic_vector(8*(2**lnbits)-1 downto 0);
o_rflags : out std_logic_vector(flbits-1 downto 0);
o_hit : out std_logic;
-- L2 snoop port, active when snoop = 1
i_snoop_addr : in std_logic_vector(abus-1 downto 0);
o_snoop_ready : out std_logic;
o_snoop_flags : out std_logic_vector(flbits-1 downto 0)
);
end component;
component tagmemcoupled is generic (
memtech : integer := 0;
async_reset : boolean := false;
abus : integer := 64; -- system bus address bus (32 or 64 bits)
waybits : integer := 2; -- log2 of number of ways bits (=2 for 4 ways)
ibits : integer := 7; -- lines memory addres width (usually 6..8)
lnbits : integer := 5; -- One line bits: log2(bytes_per_line)
flbits : integer := 1 -- Total flags number saved with address tag
);
port (
i_clk : in std_logic;
i_nrst : in std_logic;
i_direct_access : in std_logic;
i_invalidate : in std_logic;
i_re : in std_logic;
i_we : in std_logic;
i_addr : in std_logic_vector(abus-1 downto 0);
i_wdata : in std_logic_vector(8*(2**lnbits)-1 downto 0);
i_wstrb : in std_logic_vector(2**lnbits-1 downto 0);
i_wflags : in std_logic_vector(flbits-1 downto 0);
o_raddr : out std_logic_vector(abus-1 downto 0);
o_rdata : out std_logic_vector(8*(2**lnbits)+15 downto 0);
o_rflags : out std_logic_vector(flbits-1 downto 0);
o_hit : out std_logic;
o_hit_next : out std_logic
);
end component;
component icache_lru is generic (
memtech : integer;
async_reset : boolean
);
port (
i_clk : in std_logic;
i_nrst : in std_logic;
-- Control path:
i_req_valid : in std_logic;
i_req_addr : in std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
o_req_ready : out std_logic;
o_resp_valid : out std_logic;
o_resp_addr : out std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
o_resp_data : out std_logic_vector(31 downto 0);
o_resp_load_fault : out std_logic;
o_resp_executable : out std_logic;
o_resp_writable : out std_logic;
o_resp_readable : out std_logic;
i_resp_ready : in std_logic;
-- Memory interface:
i_req_mem_ready : in std_logic;
o_req_mem_valid : out std_logic;
o_req_mem_type : out std_logic_vector(REQ_MEM_TYPE_BITS-1 downto 0);
o_req_mem_addr : out std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
o_req_mem_strob : out std_logic_vector(ICACHE_BYTES_PER_LINE-1 downto 0);
o_req_mem_data : out std_logic_vector(ICACHE_LINE_BITS-1 downto 0);
i_mem_data_valid : in std_logic;
i_mem_data : in std_logic_vector(ICACHE_LINE_BITS-1 downto 0);
i_mem_load_fault : in std_logic;
-- MPU interface:
o_mpu_addr : out std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
i_mpu_flags : in std_logic_vector(CFG_MPU_FL_TOTAL-1 downto 0);
-- Debug Signals:
i_flush_address : in std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0); -- clear ICache address from debug interface
i_flush_valid : in std_logic -- address to clear icache is valid
);
end component;
component dcache_lru is generic (
memtech : integer;
async_reset : boolean;
coherence_ena : boolean
);
port (
i_clk : in std_logic;
i_nrst : in std_logic;
-- Control path:
i_req_valid : in std_logic;
i_req_write : in std_logic;
i_req_addr : in std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
i_req_wdata : in std_logic_vector(63 downto 0);
i_req_wstrb : in std_logic_vector(7 downto 0);
o_req_ready : out std_logic;
o_resp_valid : out std_logic;
o_resp_addr : out std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
o_resp_data : out std_logic_vector(63 downto 0);
o_resp_er_addr : out std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
o_resp_er_load_fault : out std_logic;
o_resp_er_store_fault : out std_logic;
o_resp_er_mpu_load : out std_logic;
o_resp_er_mpu_store : out std_logic;
i_resp_ready : in std_logic;
-- Memory interface:
i_req_mem_ready : in std_logic;
o_req_mem_valid : out std_logic;
o_req_mem_type : out std_logic_vector(REQ_MEM_TYPE_BITS-1 downto 0);
o_req_mem_addr : out std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
o_req_mem_strob : out std_logic_vector(DCACHE_BYTES_PER_LINE-1 downto 0);
o_req_mem_data : out std_logic_vector(DCACHE_LINE_BITS-1 downto 0);
i_mem_data_valid : in std_logic;
i_mem_data : in std_logic_vector(DCACHE_LINE_BITS-1 downto 0);
i_mem_load_fault : in std_logic;
i_mem_store_fault : in std_logic;
-- MPU interface
o_mpu_addr : out std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
i_mpu_flags : in std_logic_vector(CFG_MPU_FL_TOTAL-1 downto 0);
-- D$ Snoop interface
i_req_snoop_valid : in std_logic;
i_req_snoop_type : in std_logic_vector(SNOOP_REQ_TYPE_BITS-1 downto 0);
o_req_snoop_ready : out std_logic;
i_req_snoop_addr : in std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
i_resp_snoop_ready : in std_logic;
o_resp_snoop_valid : out std_logic;
o_resp_snoop_data : out std_logic_vector(L1CACHE_LINE_BITS-1 downto 0);
o_resp_snoop_flags : out std_logic_vector(DTAG_FL_TOTAL-1 downto 0);
-- Debug Signals:
i_flush_address : in std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
i_flush_valid : in std_logic;
o_flush_end : out std_logic
);
end component;
component mpu is generic (
async_reset : boolean
);
port (
i_clk : in std_logic;
i_nrst : in std_logic;
i_iaddr : in std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
i_daddr : in std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
i_region_we : in std_logic;
i_region_idx : in std_logic_vector(CFG_MPU_TBL_WIDTH-1 downto 0);
i_region_addr : in std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
i_region_mask : in std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
i_region_flags : in std_logic_vector(CFG_MPU_FL_TOTAL-1 downto 0); -- {ena, cachable, r, w, x}
o_iflags : out std_logic_vector(CFG_MPU_FL_TOTAL-1 downto 0);
o_dflags : out std_logic_vector(CFG_MPU_FL_TOTAL-1 downto 0)
);
end component;
end;
| apache-2.0 | 08187a5b394e8a2cbf509d89d5ebdf61 | 0.638009 | 3.078189 | false | false | false | false |
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