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140,180 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv | 90,320,290 | ex5-11_apb_monitor.sv | sv | 99 | 115 | [] | [] | [] | null | line:8: before: "import" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:9: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.sv\n uvm_macros.svh\n uvm_macros.svh.v\n uvm_macros.svh.sv\n obj_dir/uvm_macros.svh\n obj_dir/uvm_macros.svh.v\n obj_dir/uvm_macros.svh.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:10: Cannot find include file: sv/apb_transfer.sv\n`include "sv/apb_transfer.sv" \n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:8: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:16: Unsupported: classes\nclass apb_monitor extends uvm_monitor;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:16: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_monitor extends uvm_monitor;\n ^~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:24: syntax error, unexpected IDENTIFIER\n uvm_analysis_port #(apb_transfer) item_collected_port;\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:36: Define or directive not defined: \'`uvm_component_utils_begin\'\n `uvm_component_utils_begin(apb_monitor)\n ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:36: syntax error, unexpected \'(\'\n `uvm_component_utils_begin(apb_monitor)\n ^~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:37: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(checks_enable, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:38: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(coverage_enable, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:39: Define or directive not defined: \'`uvm_component_utils_end\'\n `uvm_component_utils_end\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:41: Unsupported: SystemVerilog 2005 reserved word not implemented: \'covergroup\'\n covergroup apb_transfer_cg;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:42: Unsupported: SystemVerilog 2005 reserved word not implemented: \'coverpoint\'\n TRANS_ADDR : coverpoint trans_collected.addr {\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:43: Unsupported: SystemVerilog 2005 reserved word not implemented: \'bins\'\n bins ZERO = {0};\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:44: Unsupported: SystemVerilog 2005 reserved word not implemented: \'bins\'\n bins NON_ZERO = {[1:8\'h7f]};\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:46: Unsupported: SystemVerilog 2005 reserved word not implemented: \'coverpoint\'\n TRANS_DIRECTION : coverpoint trans_collected.direction;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:47: Unsupported: SystemVerilog 2005 reserved word not implemented: \'coverpoint\'\n TRANS_DATA : coverpoint trans_collected.data {\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:48: Unsupported: SystemVerilog 2005 reserved word not implemented: \'bins\'\n bins ZERO = {0};\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:49: Unsupported: SystemVerilog 2005 reserved word not implemented: \'bins\'\n bins NON_ZERO = {[1:8\'hfe]};\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:50: Unsupported: SystemVerilog 2005 reserved word not implemented: \'bins\'\n bins ALL_ONES = {8\'hff};\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:52: Unsupported: SystemVerilog 2005 reserved word not implemented: \'cross\'\n TRANS_ADDR_X_TRANS_DIRECTION: cross TRANS_ADDR, TRANS_DIRECTION;\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:53: Unsupported: SystemVerilog 2005 reserved word not implemented: \'endgroup\'\n endgroup\n ^~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:56: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:56: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:66: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern virtual function void write(apb_transfer trans);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:68: syntax error, unexpected extern\n extern virtual protected function void perform_coverage();\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:76: Unsupported or unknown PLI call: $cast\n $cast(trans_collected, trans.clone());\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:78: Define or directive not defined: \'`uvm_info\'\n `uvm_info(get_type_name(), {"Transaction Collected:\\n", trans_collected.sprint()}, UVM_HIGH)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:78: syntax error, unexpected \',\'\n `uvm_info(get_type_name(), {"Transaction Collected:\\n", trans_collected.sprint()}, UVM_HIGH)\n ^\n%Warning-ENDLABEL: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:83: End label \'write\' does not match begin label \'perform_checks\'\nendfunction : write\n ^~~~~\n ... Use "/* verilator lint_off ENDLABEL */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:86: Unsupported: Hierarchical class references\nfunction void apb_monitor::perform_checks();\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:86: Unsupported: scoped class reference\nfunction void apb_monitor::perform_checks();\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:67: Unsupported: Out of class block function declaration\n extern protected function void perform_checks();\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:91: Unsupported: Hierarchical class references\nfunction void apb_monitor::perform_coverage();\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:91: Unsupported: scoped class reference\nfunction void apb_monitor::perform_coverage();\n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:86: Unsupported: Out of class block function declaration\nfunction void apb_monitor::perform_checks();\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:96: Unsupported: Hierarchical class references\nfunction void apb_monitor::report_phase(uvm_phase phase);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:96: Unsupported: scoped class reference\nfunction void apb_monitor::report_phase(uvm_phase phase);\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:91: Unsupported: Out of class block function declaration\nfunction void apb_monitor::perform_coverage();\n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:96: syntax error, unexpected IDENTIFIER, expecting \')\'\nfunction void apb_monitor::report_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:97: Define or directive not defined: \'`uvm_info\'\n `uvm_info(get_type_name(), $sformatf("Report: APB monitor collected %0d transfers", num_transactions), UVM_LOW);\n ^~~~~~~~~\n%Error: Exiting due to 40 error(s), 1 warning(s)\n' | 308,357 | function | function void apb_monitor::perform_coverage();
apb_transfer_cg.sample();
endfunction | function void apb_monitor::perform_coverage(); |
apb_transfer_cg.sample();
endfunction | 0 |
140,181 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv | 90,320,290 | ex5-11_apb_monitor.sv | sv | 99 | 115 | [] | [] | [] | null | line:8: before: "import" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:9: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.sv\n uvm_macros.svh\n uvm_macros.svh.v\n uvm_macros.svh.sv\n obj_dir/uvm_macros.svh\n obj_dir/uvm_macros.svh.v\n obj_dir/uvm_macros.svh.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:10: Cannot find include file: sv/apb_transfer.sv\n`include "sv/apb_transfer.sv" \n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:8: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:16: Unsupported: classes\nclass apb_monitor extends uvm_monitor;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:16: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_monitor extends uvm_monitor;\n ^~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:24: syntax error, unexpected IDENTIFIER\n uvm_analysis_port #(apb_transfer) item_collected_port;\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:36: Define or directive not defined: \'`uvm_component_utils_begin\'\n `uvm_component_utils_begin(apb_monitor)\n ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:36: syntax error, unexpected \'(\'\n `uvm_component_utils_begin(apb_monitor)\n ^~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:37: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(checks_enable, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:38: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(coverage_enable, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:39: Define or directive not defined: \'`uvm_component_utils_end\'\n `uvm_component_utils_end\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:41: Unsupported: SystemVerilog 2005 reserved word not implemented: \'covergroup\'\n covergroup apb_transfer_cg;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:42: Unsupported: SystemVerilog 2005 reserved word not implemented: \'coverpoint\'\n TRANS_ADDR : coverpoint trans_collected.addr {\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:43: Unsupported: SystemVerilog 2005 reserved word not implemented: \'bins\'\n bins ZERO = {0};\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:44: Unsupported: SystemVerilog 2005 reserved word not implemented: \'bins\'\n bins NON_ZERO = {[1:8\'h7f]};\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:46: Unsupported: SystemVerilog 2005 reserved word not implemented: \'coverpoint\'\n TRANS_DIRECTION : coverpoint trans_collected.direction;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:47: Unsupported: SystemVerilog 2005 reserved word not implemented: \'coverpoint\'\n TRANS_DATA : coverpoint trans_collected.data {\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:48: Unsupported: SystemVerilog 2005 reserved word not implemented: \'bins\'\n bins ZERO = {0};\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:49: Unsupported: SystemVerilog 2005 reserved word not implemented: \'bins\'\n bins NON_ZERO = {[1:8\'hfe]};\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:50: Unsupported: SystemVerilog 2005 reserved word not implemented: \'bins\'\n bins ALL_ONES = {8\'hff};\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:52: Unsupported: SystemVerilog 2005 reserved word not implemented: \'cross\'\n TRANS_ADDR_X_TRANS_DIRECTION: cross TRANS_ADDR, TRANS_DIRECTION;\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:53: Unsupported: SystemVerilog 2005 reserved word not implemented: \'endgroup\'\n endgroup\n ^~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:56: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:56: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:66: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern virtual function void write(apb_transfer trans);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:68: syntax error, unexpected extern\n extern virtual protected function void perform_coverage();\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:76: Unsupported or unknown PLI call: $cast\n $cast(trans_collected, trans.clone());\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:78: Define or directive not defined: \'`uvm_info\'\n `uvm_info(get_type_name(), {"Transaction Collected:\\n", trans_collected.sprint()}, UVM_HIGH)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:78: syntax error, unexpected \',\'\n `uvm_info(get_type_name(), {"Transaction Collected:\\n", trans_collected.sprint()}, UVM_HIGH)\n ^\n%Warning-ENDLABEL: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:83: End label \'write\' does not match begin label \'perform_checks\'\nendfunction : write\n ^~~~~\n ... Use "/* verilator lint_off ENDLABEL */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:86: Unsupported: Hierarchical class references\nfunction void apb_monitor::perform_checks();\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:86: Unsupported: scoped class reference\nfunction void apb_monitor::perform_checks();\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:67: Unsupported: Out of class block function declaration\n extern protected function void perform_checks();\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:91: Unsupported: Hierarchical class references\nfunction void apb_monitor::perform_coverage();\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:91: Unsupported: scoped class reference\nfunction void apb_monitor::perform_coverage();\n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:86: Unsupported: Out of class block function declaration\nfunction void apb_monitor::perform_checks();\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:96: Unsupported: Hierarchical class references\nfunction void apb_monitor::report_phase(uvm_phase phase);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:96: Unsupported: scoped class reference\nfunction void apb_monitor::report_phase(uvm_phase phase);\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:91: Unsupported: Out of class block function declaration\nfunction void apb_monitor::perform_coverage();\n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:96: syntax error, unexpected IDENTIFIER, expecting \')\'\nfunction void apb_monitor::report_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-11_apb_monitor.sv:97: Define or directive not defined: \'`uvm_info\'\n `uvm_info(get_type_name(), $sformatf("Report: APB monitor collected %0d transfers", num_transactions), UVM_LOW);\n ^~~~~~~~~\n%Error: Exiting due to 40 error(s), 1 warning(s)\n' | 308,357 | function | function void apb_monitor::report_phase(uvm_phase phase);
`uvm_info(get_type_name(), $sformatf("Report: APB monitor collected %0d transfers", num_transactions), UVM_LOW);
endfunction | function void apb_monitor::report_phase(uvm_phase phase); |
`uvm_info(get_type_name(), $sformatf("Report: APB monitor collected %0d transfers", num_transactions), UVM_LOW);
endfunction | 0 |
140,182 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv | 90,320,290 | ex5-12_apb_master_agent.sv | sv | 69 | 81 | [] | [] | [] | null | line:8: before: "import" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:9: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.sv\n uvm_macros.svh\n uvm_macros.svh.v\n uvm_macros.svh.sv\n obj_dir/uvm_macros.svh\n obj_dir/uvm_macros.svh.v\n obj_dir/uvm_macros.svh.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:10: Cannot find include file: sv/apb_if.sv\n`include "sv/apb_if.sv" \n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:11: Cannot find include file: sv/apb_config.sv\n`include "sv/apb_config.sv" \n ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:12: Cannot find include file: sv/apb_transfer.sv\n`include "sv/apb_transfer.sv" \n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:13: Cannot find include file: sv/apb_collector.sv\n`include "sv/apb_collector.sv" \n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:14: Cannot find include file: sv/apb_monitor.sv\n`include "sv/apb_monitor.sv" \n ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:15: Cannot find include file: sv/apb_master_driver.sv\n`include "sv/apb_master_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:16: Cannot find include file: sv/apb_master_sequencer.sv\n`include "sv/apb_master_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:8: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:21: Unsupported: classes\nclass apb_master_agent extends uvm_agent;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:21: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_master_agent extends uvm_agent;\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:33: Define or directive not defined: \'`uvm_component_utils_begin\'\n `uvm_component_utils_begin(apb_master_agent)\n ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:34: Define or directive not defined: \'`uvm_field_enum\'\n `uvm_field_enum(uvm_active_passive_enum, is_active, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:35: Define or directive not defined: \'`uvm_component_utils_end\'\n `uvm_component_utils_end\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:38: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:38: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:43: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern virtual function void build_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:44: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern virtual function void connect_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:49: Unsupported: Hierarchical class references\nfunction void apb_master_agent::build_phase(uvm_phase phase);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:49: Unsupported: scoped class reference\nfunction void apb_master_agent::build_phase(uvm_phase phase);\n ^~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:44: Unsupported: Out of class block function declaration\n extern virtual function void connect_phase(uvm_phase phase);\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:49: syntax error, unexpected IDENTIFIER, expecting \')\'\nfunction void apb_master_agent::build_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:61: Unsupported: Hierarchical class references\nfunction void apb_master_agent::connect_phase(uvm_phase phase);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:61: Unsupported: scoped class reference\nfunction void apb_master_agent::connect_phase(uvm_phase phase);\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:49: Unsupported: Out of class block function declaration\nfunction void apb_master_agent::build_phase(uvm_phase phase);\n ^~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:61: syntax error, unexpected IDENTIFIER, expecting \')\'\nfunction void apb_master_agent::connect_phase(uvm_phase phase);\n ^~~~~\n%Error: Exiting due to 26 error(s)\n' | 308,359 | function | function new (string name, uvm_component parent);
super.new(name, parent);
endfunction | function new (string name, uvm_component parent); |
super.new(name, parent);
endfunction | 0 |
140,183 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv | 90,320,290 | ex5-12_apb_master_agent.sv | sv | 69 | 81 | [] | [] | [] | null | line:8: before: "import" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:9: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.sv\n uvm_macros.svh\n uvm_macros.svh.v\n uvm_macros.svh.sv\n obj_dir/uvm_macros.svh\n obj_dir/uvm_macros.svh.v\n obj_dir/uvm_macros.svh.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:10: Cannot find include file: sv/apb_if.sv\n`include "sv/apb_if.sv" \n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:11: Cannot find include file: sv/apb_config.sv\n`include "sv/apb_config.sv" \n ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:12: Cannot find include file: sv/apb_transfer.sv\n`include "sv/apb_transfer.sv" \n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:13: Cannot find include file: sv/apb_collector.sv\n`include "sv/apb_collector.sv" \n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:14: Cannot find include file: sv/apb_monitor.sv\n`include "sv/apb_monitor.sv" \n ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:15: Cannot find include file: sv/apb_master_driver.sv\n`include "sv/apb_master_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:16: Cannot find include file: sv/apb_master_sequencer.sv\n`include "sv/apb_master_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:8: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:21: Unsupported: classes\nclass apb_master_agent extends uvm_agent;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:21: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_master_agent extends uvm_agent;\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:33: Define or directive not defined: \'`uvm_component_utils_begin\'\n `uvm_component_utils_begin(apb_master_agent)\n ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:34: Define or directive not defined: \'`uvm_field_enum\'\n `uvm_field_enum(uvm_active_passive_enum, is_active, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:35: Define or directive not defined: \'`uvm_component_utils_end\'\n `uvm_component_utils_end\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:38: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:38: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:43: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern virtual function void build_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:44: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern virtual function void connect_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:49: Unsupported: Hierarchical class references\nfunction void apb_master_agent::build_phase(uvm_phase phase);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:49: Unsupported: scoped class reference\nfunction void apb_master_agent::build_phase(uvm_phase phase);\n ^~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:44: Unsupported: Out of class block function declaration\n extern virtual function void connect_phase(uvm_phase phase);\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:49: syntax error, unexpected IDENTIFIER, expecting \')\'\nfunction void apb_master_agent::build_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:61: Unsupported: Hierarchical class references\nfunction void apb_master_agent::connect_phase(uvm_phase phase);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:61: Unsupported: scoped class reference\nfunction void apb_master_agent::connect_phase(uvm_phase phase);\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:49: Unsupported: Out of class block function declaration\nfunction void apb_master_agent::build_phase(uvm_phase phase);\n ^~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:61: syntax error, unexpected IDENTIFIER, expecting \')\'\nfunction void apb_master_agent::connect_phase(uvm_phase phase);\n ^~~~~\n%Error: Exiting due to 26 error(s)\n' | 308,359 | function | function void build_phase(uvm_phase phase);
extern virtual function void connect_phase(uvm_phase phase);
endclass : apb_master_agent
function void apb_master_agent::build_phase(uvm_phase phase);
super.build_phase(phase);
monitor = apb_monitor::type_id::create("monitor", this);
collector = apb_collector::type_id::create("collector", this);
if(is_active == UVM_ACTIVE) begin
sequencer = apb_master_sequencer::type_id::create("sequencer",this);
driver = apb_master_driver::type_id::create("driver",this);
end
endfunction | function void build_phase(uvm_phase phase); |
extern virtual function void connect_phase(uvm_phase phase);
endclass : apb_master_agent
function void apb_master_agent::build_phase(uvm_phase phase);
super.build_phase(phase);
monitor = apb_monitor::type_id::create("monitor", this);
collector = apb_collector::type_id::create("collector", this);
if(is_active == UVM_ACTIVE) begin
sequencer = apb_master_sequencer::type_id::create("sequencer",this);
driver = apb_master_driver::type_id::create("driver",this);
end
endfunction | 0 |
140,184 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv | 90,320,290 | ex5-12_apb_master_agent.sv | sv | 69 | 81 | [] | [] | [] | null | line:8: before: "import" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:9: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.sv\n uvm_macros.svh\n uvm_macros.svh.v\n uvm_macros.svh.sv\n obj_dir/uvm_macros.svh\n obj_dir/uvm_macros.svh.v\n obj_dir/uvm_macros.svh.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:10: Cannot find include file: sv/apb_if.sv\n`include "sv/apb_if.sv" \n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:11: Cannot find include file: sv/apb_config.sv\n`include "sv/apb_config.sv" \n ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:12: Cannot find include file: sv/apb_transfer.sv\n`include "sv/apb_transfer.sv" \n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:13: Cannot find include file: sv/apb_collector.sv\n`include "sv/apb_collector.sv" \n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:14: Cannot find include file: sv/apb_monitor.sv\n`include "sv/apb_monitor.sv" \n ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:15: Cannot find include file: sv/apb_master_driver.sv\n`include "sv/apb_master_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:16: Cannot find include file: sv/apb_master_sequencer.sv\n`include "sv/apb_master_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:8: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:21: Unsupported: classes\nclass apb_master_agent extends uvm_agent;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:21: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_master_agent extends uvm_agent;\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:33: Define or directive not defined: \'`uvm_component_utils_begin\'\n `uvm_component_utils_begin(apb_master_agent)\n ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:34: Define or directive not defined: \'`uvm_field_enum\'\n `uvm_field_enum(uvm_active_passive_enum, is_active, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:35: Define or directive not defined: \'`uvm_component_utils_end\'\n `uvm_component_utils_end\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:38: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:38: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:43: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern virtual function void build_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:44: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern virtual function void connect_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:49: Unsupported: Hierarchical class references\nfunction void apb_master_agent::build_phase(uvm_phase phase);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:49: Unsupported: scoped class reference\nfunction void apb_master_agent::build_phase(uvm_phase phase);\n ^~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:44: Unsupported: Out of class block function declaration\n extern virtual function void connect_phase(uvm_phase phase);\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:49: syntax error, unexpected IDENTIFIER, expecting \')\'\nfunction void apb_master_agent::build_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:61: Unsupported: Hierarchical class references\nfunction void apb_master_agent::connect_phase(uvm_phase phase);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:61: Unsupported: scoped class reference\nfunction void apb_master_agent::connect_phase(uvm_phase phase);\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:49: Unsupported: Out of class block function declaration\nfunction void apb_master_agent::build_phase(uvm_phase phase);\n ^~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-12_apb_master_agent.sv:61: syntax error, unexpected IDENTIFIER, expecting \')\'\nfunction void apb_master_agent::connect_phase(uvm_phase phase);\n ^~~~~\n%Error: Exiting due to 26 error(s)\n' | 308,359 | function | function void apb_master_agent::connect_phase(uvm_phase phase);
super.connect_phase(phase);
collector.item_collected_port.connect(monitor.coll_mon_port);
if (is_active == UVM_ACTIVE) begin
driver.seq_item_port.connect(sequencer.seq_item_export);
end
endfunction | function void apb_master_agent::connect_phase(uvm_phase phase); |
super.connect_phase(phase);
collector.item_collected_port.connect(monitor.coll_mon_port);
if (is_active == UVM_ACTIVE) begin
driver.seq_item_port.connect(sequencer.seq_item_export);
end
endfunction | 0 |
140,185 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv | 90,320,290 | ex5-13a_test_env.sv | sv | 57 | 66 | [] | [] | [] | null | line:12: before: "interface" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:9: Cannot find include file: sv/apb_if.sv\n`include "sv/apb_if.sv" \n ^~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.sv\n sv/apb_if.sv\n sv/apb_if.sv.v\n sv/apb_if.sv.sv\n obj_dir/sv/apb_if.sv\n obj_dir/sv/apb_if.sv.v\n obj_dir/sv/apb_if.sv.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:12: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:14: Cannot find include file: sv/apb_transfer.sv\n`include "sv/apb_transfer.sv" \n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:15: Cannot find include file: sv/apb_config.sv\n`include "sv/apb_config.sv" \n ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:16: Cannot find include file: sv/apb_bus_monitor.sv\n`include "sv/apb_bus_monitor.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:17: Cannot find include file: sv/apb_monitor.sv\n`include "sv/apb_monitor.sv" \n ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:18: Cannot find include file: sv/apb_collector.sv\n`include "sv/apb_collector.sv" \n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:19: Cannot find include file: sv/apb_master_driver.sv\n`include "sv/apb_master_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:20: Cannot find include file: sv/apb_master_sequencer.sv\n`include "sv/apb_master_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:21: Cannot find include file: sv/apb_master_agent.sv\n`include "sv/apb_master_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:22: Cannot find include file: sv/apb_slave_driver.sv\n`include "sv/apb_slave_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:23: Cannot find include file: sv/apb_slave_sequencer.sv\n`include "sv/apb_slave_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:24: Cannot find include file: sv/apb_slave_agent.sv\n`include "sv/apb_slave_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:25: Cannot find include file: sv/apb_env0.sv\n`include "sv/apb_env0.sv" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:11: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:27: Unsupported: classes\nclass env_test extends uvm_test;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:27: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass env_test extends uvm_test;\n ^~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:31: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(env_test)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:31: syntax error, unexpected \'(\'\n `uvm_component_utils(env_test)\n ^~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:43: syntax error, unexpected \'(\', expecting IDENTIFIER\n uvm_test_done.set_drain_time(this, 100);\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:52: syntax error, unexpected \'#\'\n uvm_config_db#(virtual apb_if)::set(null, "*", "vif", apb_if0);\n ^\n%Error: Internal Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:10: ../V3ParseSym.h:114: Symbols suggest ending CLASS \'env_test\' but parser thinks ending MODULE \'test\'\nmodule test;\n ^~~~\n' | 308,360 | module | module test;
import uvm_pkg::*;
`include "uvm_macros.svh"
`include "sv/apb_transfer.sv"
`include "sv/apb_config.sv"
`include "sv/apb_bus_monitor.sv"
`include "sv/apb_monitor.sv"
`include "sv/apb_collector.sv"
`include "sv/apb_master_driver.sv"
`include "sv/apb_master_sequencer.sv"
`include "sv/apb_master_agent.sv"
`include "sv/apb_slave_driver.sv"
`include "sv/apb_slave_sequencer.sv"
`include "sv/apb_slave_agent.sv"
`include "sv/apb_env0.sv"
class env_test extends uvm_test;
apb_env env;
`uvm_component_utils(env_test)
function new(string name="env_test", uvm_component parent);
super.new(name, parent);
endfunction : new
function void build_phase(uvm_phase phase);
env = apb_env::type_id::create("env", this);
endfunction : build_phase
function void start_of_simulation_phase(uvm_phase phase);
this.print();
uvm_test_done.set_drain_time(this, 100);
endfunction : start_of_simulation_phase
endclass : env_test
bit clk, reset;
apb_if apb_if0 (clk, reset);
initial begin
uvm_config_db#(virtual apb_if)::set(null, "*", "vif", apb_if0);
run_test("env_test");
end
endmodule | module test; |
import uvm_pkg::*;
`include "uvm_macros.svh"
`include "sv/apb_transfer.sv"
`include "sv/apb_config.sv"
`include "sv/apb_bus_monitor.sv"
`include "sv/apb_monitor.sv"
`include "sv/apb_collector.sv"
`include "sv/apb_master_driver.sv"
`include "sv/apb_master_sequencer.sv"
`include "sv/apb_master_agent.sv"
`include "sv/apb_slave_driver.sv"
`include "sv/apb_slave_sequencer.sv"
`include "sv/apb_slave_agent.sv"
`include "sv/apb_env0.sv"
class env_test extends uvm_test;
apb_env env;
`uvm_component_utils(env_test)
function new(string name="env_test", uvm_component parent);
super.new(name, parent);
endfunction : new
function void build_phase(uvm_phase phase);
env = apb_env::type_id::create("env", this);
endfunction : build_phase
function void start_of_simulation_phase(uvm_phase phase);
this.print();
uvm_test_done.set_drain_time(this, 100);
endfunction : start_of_simulation_phase
endclass : env_test
bit clk, reset;
apb_if apb_if0 (clk, reset);
initial begin
uvm_config_db#(virtual apb_if)::set(null, "*", "vif", apb_if0);
run_test("env_test");
end
endmodule | 0 |
140,186 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv | 90,320,290 | ex5-13a_test_env.sv | sv | 57 | 66 | [] | [] | [] | null | line:12: before: "interface" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:9: Cannot find include file: sv/apb_if.sv\n`include "sv/apb_if.sv" \n ^~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.sv\n sv/apb_if.sv\n sv/apb_if.sv.v\n sv/apb_if.sv.sv\n obj_dir/sv/apb_if.sv\n obj_dir/sv/apb_if.sv.v\n obj_dir/sv/apb_if.sv.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:12: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:14: Cannot find include file: sv/apb_transfer.sv\n`include "sv/apb_transfer.sv" \n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:15: Cannot find include file: sv/apb_config.sv\n`include "sv/apb_config.sv" \n ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:16: Cannot find include file: sv/apb_bus_monitor.sv\n`include "sv/apb_bus_monitor.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:17: Cannot find include file: sv/apb_monitor.sv\n`include "sv/apb_monitor.sv" \n ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:18: Cannot find include file: sv/apb_collector.sv\n`include "sv/apb_collector.sv" \n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:19: Cannot find include file: sv/apb_master_driver.sv\n`include "sv/apb_master_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:20: Cannot find include file: sv/apb_master_sequencer.sv\n`include "sv/apb_master_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:21: Cannot find include file: sv/apb_master_agent.sv\n`include "sv/apb_master_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:22: Cannot find include file: sv/apb_slave_driver.sv\n`include "sv/apb_slave_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:23: Cannot find include file: sv/apb_slave_sequencer.sv\n`include "sv/apb_slave_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:24: Cannot find include file: sv/apb_slave_agent.sv\n`include "sv/apb_slave_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:25: Cannot find include file: sv/apb_env0.sv\n`include "sv/apb_env0.sv" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:11: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:27: Unsupported: classes\nclass env_test extends uvm_test;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:27: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass env_test extends uvm_test;\n ^~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:31: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(env_test)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:31: syntax error, unexpected \'(\'\n `uvm_component_utils(env_test)\n ^~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:43: syntax error, unexpected \'(\', expecting IDENTIFIER\n uvm_test_done.set_drain_time(this, 100);\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:52: syntax error, unexpected \'#\'\n uvm_config_db#(virtual apb_if)::set(null, "*", "vif", apb_if0);\n ^\n%Error: Internal Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:10: ../V3ParseSym.h:114: Symbols suggest ending CLASS \'env_test\' but parser thinks ending MODULE \'test\'\nmodule test;\n ^~~~\n' | 308,360 | function | function new(string name="env_test", uvm_component parent);
super.new(name, parent);
endfunction | function new(string name="env_test", uvm_component parent); |
super.new(name, parent);
endfunction | 0 |
140,187 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv | 90,320,290 | ex5-13a_test_env.sv | sv | 57 | 66 | [] | [] | [] | null | line:12: before: "interface" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:9: Cannot find include file: sv/apb_if.sv\n`include "sv/apb_if.sv" \n ^~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.sv\n sv/apb_if.sv\n sv/apb_if.sv.v\n sv/apb_if.sv.sv\n obj_dir/sv/apb_if.sv\n obj_dir/sv/apb_if.sv.v\n obj_dir/sv/apb_if.sv.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:12: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:14: Cannot find include file: sv/apb_transfer.sv\n`include "sv/apb_transfer.sv" \n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:15: Cannot find include file: sv/apb_config.sv\n`include "sv/apb_config.sv" \n ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:16: Cannot find include file: sv/apb_bus_monitor.sv\n`include "sv/apb_bus_monitor.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:17: Cannot find include file: sv/apb_monitor.sv\n`include "sv/apb_monitor.sv" \n ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:18: Cannot find include file: sv/apb_collector.sv\n`include "sv/apb_collector.sv" \n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:19: Cannot find include file: sv/apb_master_driver.sv\n`include "sv/apb_master_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:20: Cannot find include file: sv/apb_master_sequencer.sv\n`include "sv/apb_master_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:21: Cannot find include file: sv/apb_master_agent.sv\n`include "sv/apb_master_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:22: Cannot find include file: sv/apb_slave_driver.sv\n`include "sv/apb_slave_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:23: Cannot find include file: sv/apb_slave_sequencer.sv\n`include "sv/apb_slave_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:24: Cannot find include file: sv/apb_slave_agent.sv\n`include "sv/apb_slave_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:25: Cannot find include file: sv/apb_env0.sv\n`include "sv/apb_env0.sv" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:11: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:27: Unsupported: classes\nclass env_test extends uvm_test;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:27: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass env_test extends uvm_test;\n ^~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:31: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(env_test)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:31: syntax error, unexpected \'(\'\n `uvm_component_utils(env_test)\n ^~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:43: syntax error, unexpected \'(\', expecting IDENTIFIER\n uvm_test_done.set_drain_time(this, 100);\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:52: syntax error, unexpected \'#\'\n uvm_config_db#(virtual apb_if)::set(null, "*", "vif", apb_if0);\n ^\n%Error: Internal Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:10: ../V3ParseSym.h:114: Symbols suggest ending CLASS \'env_test\' but parser thinks ending MODULE \'test\'\nmodule test;\n ^~~~\n' | 308,360 | function | function void build_phase(uvm_phase phase);
env = apb_env::type_id::create("env", this);
endfunction | function void build_phase(uvm_phase phase); |
env = apb_env::type_id::create("env", this);
endfunction | 0 |
140,188 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv | 90,320,290 | ex5-13a_test_env.sv | sv | 57 | 66 | [] | [] | [] | null | line:12: before: "interface" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:9: Cannot find include file: sv/apb_if.sv\n`include "sv/apb_if.sv" \n ^~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.sv\n sv/apb_if.sv\n sv/apb_if.sv.v\n sv/apb_if.sv.sv\n obj_dir/sv/apb_if.sv\n obj_dir/sv/apb_if.sv.v\n obj_dir/sv/apb_if.sv.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:12: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:14: Cannot find include file: sv/apb_transfer.sv\n`include "sv/apb_transfer.sv" \n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:15: Cannot find include file: sv/apb_config.sv\n`include "sv/apb_config.sv" \n ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:16: Cannot find include file: sv/apb_bus_monitor.sv\n`include "sv/apb_bus_monitor.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:17: Cannot find include file: sv/apb_monitor.sv\n`include "sv/apb_monitor.sv" \n ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:18: Cannot find include file: sv/apb_collector.sv\n`include "sv/apb_collector.sv" \n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:19: Cannot find include file: sv/apb_master_driver.sv\n`include "sv/apb_master_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:20: Cannot find include file: sv/apb_master_sequencer.sv\n`include "sv/apb_master_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:21: Cannot find include file: sv/apb_master_agent.sv\n`include "sv/apb_master_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:22: Cannot find include file: sv/apb_slave_driver.sv\n`include "sv/apb_slave_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:23: Cannot find include file: sv/apb_slave_sequencer.sv\n`include "sv/apb_slave_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:24: Cannot find include file: sv/apb_slave_agent.sv\n`include "sv/apb_slave_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:25: Cannot find include file: sv/apb_env0.sv\n`include "sv/apb_env0.sv" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:11: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:27: Unsupported: classes\nclass env_test extends uvm_test;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:27: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass env_test extends uvm_test;\n ^~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:31: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(env_test)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:31: syntax error, unexpected \'(\'\n `uvm_component_utils(env_test)\n ^~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:43: syntax error, unexpected \'(\', expecting IDENTIFIER\n uvm_test_done.set_drain_time(this, 100);\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:52: syntax error, unexpected \'#\'\n uvm_config_db#(virtual apb_if)::set(null, "*", "vif", apb_if0);\n ^\n%Error: Internal Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13a_test_env.sv:10: ../V3ParseSym.h:114: Symbols suggest ending CLASS \'env_test\' but parser thinks ending MODULE \'test\'\nmodule test;\n ^~~~\n' | 308,360 | function | function void start_of_simulation_phase(uvm_phase phase);
this.print();
uvm_test_done.set_drain_time(this, 100);
endfunction | function void start_of_simulation_phase(uvm_phase phase); |
this.print();
uvm_test_done.set_drain_time(this, 100);
endfunction | 0 |
140,189 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv | 90,320,290 | ex5-13_apb_env.sv | sv | 116 | 92 | [] | [] | [] | null | line:10: before: "interface" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:7: Cannot find include file: sv/apb_if.sv\n`include "sv/apb_if.sv" \n ^~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.sv\n sv/apb_if.sv\n sv/apb_if.sv.v\n sv/apb_if.sv.sv\n obj_dir/sv/apb_if.sv\n obj_dir/sv/apb_if.sv.v\n obj_dir/sv/apb_if.sv.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:10: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:12: Cannot find include file: sv/apb_transfer.sv\n`include "sv/apb_transfer.sv" \n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:13: Cannot find include file: sv/apb_config.sv\n`include "sv/apb_config.sv" \n ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:14: Cannot find include file: sv/apb_monitor.sv\n`include "sv/apb_monitor.sv" \n ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:15: Cannot find include file: sv/apb_collector.sv\n`include "sv/apb_collector.sv" \n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:16: Cannot find include file: sv/apb_master_driver.sv\n`include "sv/apb_master_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:17: Cannot find include file: sv/apb_master_sequencer.sv\n`include "sv/apb_master_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:18: Cannot find include file: sv/apb_master_agent.sv\n`include "sv/apb_master_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:19: Cannot find include file: sv/apb_slave_driver.sv\n`include "sv/apb_slave_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:20: Cannot find include file: sv/apb_slave_sequencer.sv\n`include "sv/apb_slave_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:21: Cannot find include file: sv/apb_slave_agent.sv\n`include "sv/apb_slave_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:9: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:23: Unsupported: classes\nclass apb_env extends uvm_env;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:23: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_env extends uvm_env;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:29: syntax error, unexpected \']\', expecting TYPE-IDENTIFIER\n apb_slave_agent slaves[]; \n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:34: Define or directive not defined: \'`uvm_component_utils_begin\'\n `uvm_component_utils_begin(apb_env)\n ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:34: syntax error, unexpected \'(\'\n `uvm_component_utils_begin(apb_env)\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:35: Define or directive not defined: \'`uvm_field_object\'\n `uvm_field_object(cfg, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:36: Define or directive not defined: \'`uvm_component_utils_end\'\n `uvm_component_utils_end\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:51: syntax error, unexpected super\n super.build_phase(phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:55: syntax error, unexpected \'#\'\n if (!uvm_config_db#(apb_config)::get(this, "", "cfg", cfg)) begin\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:56: Define or directive not defined: \'`uvm_info\'\n `uvm_info("NOCONFIG", "using default_apb_config", UVM_MEDIUM)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:57: Unsupported or unknown PLI call: $cast\n $cast(cfg, factory.create_object_by_name("default_apb_config","cfg"));\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:78: syntax error, unexpected \'.\', expecting IDENTIFIER\n bus_collector.item_collected_port.connect(bus_monitor.coll_mon_port);\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:79: syntax error, unexpected \'.\', expecting IDENTIFIER\n bus_monitor.addr_trans_port.connect(bus_collector.addr_trans_export);\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:88: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(demo_tb)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:91: Unsupported: new constructor\n function new(string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:91: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new(string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:107: syntax error, unexpected \'#\'\n uvm_config_db#(virtual apb_if)::set(null, "*", "vif", apb_if0);\n ^\n%Warning-STMTDLY: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:113: Unsupported: Ignoring delay on this delayed statement.\n #100 global_stop_request();\n ^\n ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: Internal Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:8: ../V3ParseSym.h:114: Symbols suggest ending FUNC \'new\' but parser thinks ending MODULE \'test\'\nmodule test;\n ^~~~\n' | 308,361 | module | module test;
import uvm_pkg::*;
`include "uvm_macros.svh"
`include "sv/apb_transfer.sv"
`include "sv/apb_config.sv"
`include "sv/apb_monitor.sv"
`include "sv/apb_collector.sv"
`include "sv/apb_master_driver.sv"
`include "sv/apb_master_sequencer.sv"
`include "sv/apb_master_agent.sv"
`include "sv/apb_slave_driver.sv"
`include "sv/apb_slave_sequencer.sv"
`include "sv/apb_slave_agent.sv"
class apb_env extends uvm_env;
apb_config cfg;
apb_master_agent master;
apb_slave_agent slaves[];
apb_monitor bus_monitor;
apb_collector bus_collector;
`uvm_component_utils_begin(apb_env)
`uvm_field_object(cfg, UVM_DEFAULT)
`uvm_component_utils_end
function new(string name, uvm_component parent);
super.new(name, parent);
endfunction : new
extern virtual function void build_phase(uvm_phase phase);
extern virtual function void connect_phase(uvm_phase phase);
endclass : apb_env
function void apb_env::build_phase(uvm_phase phase);
uvm_object config_obj;
super.build_phase(phase);
if(cfg == null)
if (!uvm_config_db#(apb_config)::get(this, "", "cfg", cfg)) begin
`uvm_info("NOCONFIG", "using default_apb_config", UVM_MEDIUM)
$cast(cfg, factory.create_object_by_name("default_apb_config","cfg"));
end
uvm_config_object::set(this, "*", "cfg", cfg);
foreach(cfg.slave_configs[i])
uvm_config_object::set(this, $sformatf("slave[%0d]*", i), "cfg", cfg.slave_configs[i]);
bus_monitor = apb_monitor::type_id::create("bus_monitor",this);
bus_collector = apb_collector::type_id::create("bus_collector",this);
master = apb_master_agent::type_id::create("master", this);
slaves = new[cfg.slave_configs.size()];
foreach(slaves[i])
slaves[i] = apb_slave_agent::type_id::create($sformatf("slave[%0d]", i), this);
endfunction : build_phase
function void apb_env::connect_phase(uvm_phase phase);
super.connect_phase(phase);
bus_collector.item_collected_port.connect(bus_monitor.coll_mon_port);
bus_monitor.addr_trans_port.connect(bus_collector.addr_trans_export);
foreach(slaves[i]) begin
if (slaves[i].is_active == UVM_ACTIVE)
slaves[i].sequencer.addr_trans_port.connect(bus_monitor.addr_trans_export);
end
endfunction : connect_phase
class demo_tb extends uvm_env;
`uvm_component_utils(demo_tb)
apb_env apb0;
function new(string name, uvm_component parent);
super.new(name, parent);
endfunction : new
virtual function void build_phase(uvm_phase phase);
super.build_phase(phase);
apb0 = apb_env::type_id::create("apb0", this);
endfunction : build_phase
endclass : demo_tb
bit clk, reset;
apb_if apb_if0 (clk, reset);
initial begin
uvm_config_db#(virtual apb_if)::set(null, "*", "vif", apb_if0);
run_test("demo_tb");
end
initial
#100 global_stop_request();
endmodule | module test; |
import uvm_pkg::*;
`include "uvm_macros.svh"
`include "sv/apb_transfer.sv"
`include "sv/apb_config.sv"
`include "sv/apb_monitor.sv"
`include "sv/apb_collector.sv"
`include "sv/apb_master_driver.sv"
`include "sv/apb_master_sequencer.sv"
`include "sv/apb_master_agent.sv"
`include "sv/apb_slave_driver.sv"
`include "sv/apb_slave_sequencer.sv"
`include "sv/apb_slave_agent.sv"
class apb_env extends uvm_env;
apb_config cfg;
apb_master_agent master;
apb_slave_agent slaves[];
apb_monitor bus_monitor;
apb_collector bus_collector;
`uvm_component_utils_begin(apb_env)
`uvm_field_object(cfg, UVM_DEFAULT)
`uvm_component_utils_end
function new(string name, uvm_component parent);
super.new(name, parent);
endfunction : new
extern virtual function void build_phase(uvm_phase phase);
extern virtual function void connect_phase(uvm_phase phase);
endclass : apb_env
function void apb_env::build_phase(uvm_phase phase);
uvm_object config_obj;
super.build_phase(phase);
if(cfg == null)
if (!uvm_config_db#(apb_config)::get(this, "", "cfg", cfg)) begin
`uvm_info("NOCONFIG", "using default_apb_config", UVM_MEDIUM)
$cast(cfg, factory.create_object_by_name("default_apb_config","cfg"));
end
uvm_config_object::set(this, "*", "cfg", cfg);
foreach(cfg.slave_configs[i])
uvm_config_object::set(this, $sformatf("slave[%0d]*", i), "cfg", cfg.slave_configs[i]);
bus_monitor = apb_monitor::type_id::create("bus_monitor",this);
bus_collector = apb_collector::type_id::create("bus_collector",this);
master = apb_master_agent::type_id::create("master", this);
slaves = new[cfg.slave_configs.size()];
foreach(slaves[i])
slaves[i] = apb_slave_agent::type_id::create($sformatf("slave[%0d]", i), this);
endfunction : build_phase
function void apb_env::connect_phase(uvm_phase phase);
super.connect_phase(phase);
bus_collector.item_collected_port.connect(bus_monitor.coll_mon_port);
bus_monitor.addr_trans_port.connect(bus_collector.addr_trans_export);
foreach(slaves[i]) begin
if (slaves[i].is_active == UVM_ACTIVE)
slaves[i].sequencer.addr_trans_port.connect(bus_monitor.addr_trans_export);
end
endfunction : connect_phase
class demo_tb extends uvm_env;
`uvm_component_utils(demo_tb)
apb_env apb0;
function new(string name, uvm_component parent);
super.new(name, parent);
endfunction : new
virtual function void build_phase(uvm_phase phase);
super.build_phase(phase);
apb0 = apb_env::type_id::create("apb0", this);
endfunction : build_phase
endclass : demo_tb
bit clk, reset;
apb_if apb_if0 (clk, reset);
initial begin
uvm_config_db#(virtual apb_if)::set(null, "*", "vif", apb_if0);
run_test("demo_tb");
end
initial
#100 global_stop_request();
endmodule | 0 |
140,190 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv | 90,320,290 | ex5-13_apb_env.sv | sv | 116 | 92 | [] | [] | [] | null | line:10: before: "interface" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:7: Cannot find include file: sv/apb_if.sv\n`include "sv/apb_if.sv" \n ^~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.sv\n sv/apb_if.sv\n sv/apb_if.sv.v\n sv/apb_if.sv.sv\n obj_dir/sv/apb_if.sv\n obj_dir/sv/apb_if.sv.v\n obj_dir/sv/apb_if.sv.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:10: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:12: Cannot find include file: sv/apb_transfer.sv\n`include "sv/apb_transfer.sv" \n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:13: Cannot find include file: sv/apb_config.sv\n`include "sv/apb_config.sv" \n ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:14: Cannot find include file: sv/apb_monitor.sv\n`include "sv/apb_monitor.sv" \n ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:15: Cannot find include file: sv/apb_collector.sv\n`include "sv/apb_collector.sv" \n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:16: Cannot find include file: sv/apb_master_driver.sv\n`include "sv/apb_master_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:17: Cannot find include file: sv/apb_master_sequencer.sv\n`include "sv/apb_master_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:18: Cannot find include file: sv/apb_master_agent.sv\n`include "sv/apb_master_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:19: Cannot find include file: sv/apb_slave_driver.sv\n`include "sv/apb_slave_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:20: Cannot find include file: sv/apb_slave_sequencer.sv\n`include "sv/apb_slave_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:21: Cannot find include file: sv/apb_slave_agent.sv\n`include "sv/apb_slave_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:9: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:23: Unsupported: classes\nclass apb_env extends uvm_env;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:23: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_env extends uvm_env;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:29: syntax error, unexpected \']\', expecting TYPE-IDENTIFIER\n apb_slave_agent slaves[]; \n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:34: Define or directive not defined: \'`uvm_component_utils_begin\'\n `uvm_component_utils_begin(apb_env)\n ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:34: syntax error, unexpected \'(\'\n `uvm_component_utils_begin(apb_env)\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:35: Define or directive not defined: \'`uvm_field_object\'\n `uvm_field_object(cfg, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:36: Define or directive not defined: \'`uvm_component_utils_end\'\n `uvm_component_utils_end\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:51: syntax error, unexpected super\n super.build_phase(phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:55: syntax error, unexpected \'#\'\n if (!uvm_config_db#(apb_config)::get(this, "", "cfg", cfg)) begin\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:56: Define or directive not defined: \'`uvm_info\'\n `uvm_info("NOCONFIG", "using default_apb_config", UVM_MEDIUM)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:57: Unsupported or unknown PLI call: $cast\n $cast(cfg, factory.create_object_by_name("default_apb_config","cfg"));\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:78: syntax error, unexpected \'.\', expecting IDENTIFIER\n bus_collector.item_collected_port.connect(bus_monitor.coll_mon_port);\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:79: syntax error, unexpected \'.\', expecting IDENTIFIER\n bus_monitor.addr_trans_port.connect(bus_collector.addr_trans_export);\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:88: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(demo_tb)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:91: Unsupported: new constructor\n function new(string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:91: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new(string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:107: syntax error, unexpected \'#\'\n uvm_config_db#(virtual apb_if)::set(null, "*", "vif", apb_if0);\n ^\n%Warning-STMTDLY: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:113: Unsupported: Ignoring delay on this delayed statement.\n #100 global_stop_request();\n ^\n ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: Internal Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:8: ../V3ParseSym.h:114: Symbols suggest ending FUNC \'new\' but parser thinks ending MODULE \'test\'\nmodule test;\n ^~~~\n' | 308,361 | function | function new(string name, uvm_component parent);
super.new(name, parent);
endfunction | function new(string name, uvm_component parent); |
super.new(name, parent);
endfunction | 0 |
140,191 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv | 90,320,290 | ex5-13_apb_env.sv | sv | 116 | 92 | [] | [] | [] | null | line:10: before: "interface" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:7: Cannot find include file: sv/apb_if.sv\n`include "sv/apb_if.sv" \n ^~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.sv\n sv/apb_if.sv\n sv/apb_if.sv.v\n sv/apb_if.sv.sv\n obj_dir/sv/apb_if.sv\n obj_dir/sv/apb_if.sv.v\n obj_dir/sv/apb_if.sv.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:10: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:12: Cannot find include file: sv/apb_transfer.sv\n`include "sv/apb_transfer.sv" \n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:13: Cannot find include file: sv/apb_config.sv\n`include "sv/apb_config.sv" \n ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:14: Cannot find include file: sv/apb_monitor.sv\n`include "sv/apb_monitor.sv" \n ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:15: Cannot find include file: sv/apb_collector.sv\n`include "sv/apb_collector.sv" \n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:16: Cannot find include file: sv/apb_master_driver.sv\n`include "sv/apb_master_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:17: Cannot find include file: sv/apb_master_sequencer.sv\n`include "sv/apb_master_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:18: Cannot find include file: sv/apb_master_agent.sv\n`include "sv/apb_master_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:19: Cannot find include file: sv/apb_slave_driver.sv\n`include "sv/apb_slave_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:20: Cannot find include file: sv/apb_slave_sequencer.sv\n`include "sv/apb_slave_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:21: Cannot find include file: sv/apb_slave_agent.sv\n`include "sv/apb_slave_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:9: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:23: Unsupported: classes\nclass apb_env extends uvm_env;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:23: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_env extends uvm_env;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:29: syntax error, unexpected \']\', expecting TYPE-IDENTIFIER\n apb_slave_agent slaves[]; \n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:34: Define or directive not defined: \'`uvm_component_utils_begin\'\n `uvm_component_utils_begin(apb_env)\n ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:34: syntax error, unexpected \'(\'\n `uvm_component_utils_begin(apb_env)\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:35: Define or directive not defined: \'`uvm_field_object\'\n `uvm_field_object(cfg, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:36: Define or directive not defined: \'`uvm_component_utils_end\'\n `uvm_component_utils_end\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:51: syntax error, unexpected super\n super.build_phase(phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:55: syntax error, unexpected \'#\'\n if (!uvm_config_db#(apb_config)::get(this, "", "cfg", cfg)) begin\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:56: Define or directive not defined: \'`uvm_info\'\n `uvm_info("NOCONFIG", "using default_apb_config", UVM_MEDIUM)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:57: Unsupported or unknown PLI call: $cast\n $cast(cfg, factory.create_object_by_name("default_apb_config","cfg"));\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:78: syntax error, unexpected \'.\', expecting IDENTIFIER\n bus_collector.item_collected_port.connect(bus_monitor.coll_mon_port);\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:79: syntax error, unexpected \'.\', expecting IDENTIFIER\n bus_monitor.addr_trans_port.connect(bus_collector.addr_trans_export);\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:88: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(demo_tb)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:91: Unsupported: new constructor\n function new(string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:91: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new(string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:107: syntax error, unexpected \'#\'\n uvm_config_db#(virtual apb_if)::set(null, "*", "vif", apb_if0);\n ^\n%Warning-STMTDLY: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:113: Unsupported: Ignoring delay on this delayed statement.\n #100 global_stop_request();\n ^\n ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: Internal Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:8: ../V3ParseSym.h:114: Symbols suggest ending FUNC \'new\' but parser thinks ending MODULE \'test\'\nmodule test;\n ^~~~\n' | 308,361 | function | function void build_phase(uvm_phase phase);
extern virtual function void connect_phase(uvm_phase phase);
endclass : apb_env
function void apb_env::build_phase(uvm_phase phase);
uvm_object config_obj;
super.build_phase(phase);
if(cfg == null)
if (!uvm_config_db#(apb_config)::get(this, "", "cfg", cfg)) begin
`uvm_info("NOCONFIG", "using default_apb_config", UVM_MEDIUM)
$cast(cfg, factory.create_object_by_name("default_apb_config","cfg"));
end
uvm_config_object::set(this, "*", "cfg", cfg);
foreach(cfg.slave_configs[i])
uvm_config_object::set(this, $sformatf("slave[%0d]*", i), "cfg", cfg.slave_configs[i]);
bus_monitor = apb_monitor::type_id::create("bus_monitor",this);
bus_collector = apb_collector::type_id::create("bus_collector",this);
master = apb_master_agent::type_id::create("master", this);
slaves = new[cfg.slave_configs.size()];
foreach(slaves[i])
slaves[i] = apb_slave_agent::type_id::create($sformatf("slave[%0d]", i), this);
endfunction | function void build_phase(uvm_phase phase); |
extern virtual function void connect_phase(uvm_phase phase);
endclass : apb_env
function void apb_env::build_phase(uvm_phase phase);
uvm_object config_obj;
super.build_phase(phase);
if(cfg == null)
if (!uvm_config_db#(apb_config)::get(this, "", "cfg", cfg)) begin
`uvm_info("NOCONFIG", "using default_apb_config", UVM_MEDIUM)
$cast(cfg, factory.create_object_by_name("default_apb_config","cfg"));
end
uvm_config_object::set(this, "*", "cfg", cfg);
foreach(cfg.slave_configs[i])
uvm_config_object::set(this, $sformatf("slave[%0d]*", i), "cfg", cfg.slave_configs[i]);
bus_monitor = apb_monitor::type_id::create("bus_monitor",this);
bus_collector = apb_collector::type_id::create("bus_collector",this);
master = apb_master_agent::type_id::create("master", this);
slaves = new[cfg.slave_configs.size()];
foreach(slaves[i])
slaves[i] = apb_slave_agent::type_id::create($sformatf("slave[%0d]", i), this);
endfunction | 0 |
140,192 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv | 90,320,290 | ex5-13_apb_env.sv | sv | 116 | 92 | [] | [] | [] | null | line:10: before: "interface" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:7: Cannot find include file: sv/apb_if.sv\n`include "sv/apb_if.sv" \n ^~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.sv\n sv/apb_if.sv\n sv/apb_if.sv.v\n sv/apb_if.sv.sv\n obj_dir/sv/apb_if.sv\n obj_dir/sv/apb_if.sv.v\n obj_dir/sv/apb_if.sv.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:10: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:12: Cannot find include file: sv/apb_transfer.sv\n`include "sv/apb_transfer.sv" \n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:13: Cannot find include file: sv/apb_config.sv\n`include "sv/apb_config.sv" \n ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:14: Cannot find include file: sv/apb_monitor.sv\n`include "sv/apb_monitor.sv" \n ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:15: Cannot find include file: sv/apb_collector.sv\n`include "sv/apb_collector.sv" \n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:16: Cannot find include file: sv/apb_master_driver.sv\n`include "sv/apb_master_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:17: Cannot find include file: sv/apb_master_sequencer.sv\n`include "sv/apb_master_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:18: Cannot find include file: sv/apb_master_agent.sv\n`include "sv/apb_master_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:19: Cannot find include file: sv/apb_slave_driver.sv\n`include "sv/apb_slave_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:20: Cannot find include file: sv/apb_slave_sequencer.sv\n`include "sv/apb_slave_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:21: Cannot find include file: sv/apb_slave_agent.sv\n`include "sv/apb_slave_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:9: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:23: Unsupported: classes\nclass apb_env extends uvm_env;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:23: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_env extends uvm_env;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:29: syntax error, unexpected \']\', expecting TYPE-IDENTIFIER\n apb_slave_agent slaves[]; \n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:34: Define or directive not defined: \'`uvm_component_utils_begin\'\n `uvm_component_utils_begin(apb_env)\n ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:34: syntax error, unexpected \'(\'\n `uvm_component_utils_begin(apb_env)\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:35: Define or directive not defined: \'`uvm_field_object\'\n `uvm_field_object(cfg, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:36: Define or directive not defined: \'`uvm_component_utils_end\'\n `uvm_component_utils_end\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:51: syntax error, unexpected super\n super.build_phase(phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:55: syntax error, unexpected \'#\'\n if (!uvm_config_db#(apb_config)::get(this, "", "cfg", cfg)) begin\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:56: Define or directive not defined: \'`uvm_info\'\n `uvm_info("NOCONFIG", "using default_apb_config", UVM_MEDIUM)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:57: Unsupported or unknown PLI call: $cast\n $cast(cfg, factory.create_object_by_name("default_apb_config","cfg"));\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:78: syntax error, unexpected \'.\', expecting IDENTIFIER\n bus_collector.item_collected_port.connect(bus_monitor.coll_mon_port);\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:79: syntax error, unexpected \'.\', expecting IDENTIFIER\n bus_monitor.addr_trans_port.connect(bus_collector.addr_trans_export);\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:88: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(demo_tb)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:91: Unsupported: new constructor\n function new(string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:91: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new(string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:107: syntax error, unexpected \'#\'\n uvm_config_db#(virtual apb_if)::set(null, "*", "vif", apb_if0);\n ^\n%Warning-STMTDLY: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:113: Unsupported: Ignoring delay on this delayed statement.\n #100 global_stop_request();\n ^\n ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: Internal Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:8: ../V3ParseSym.h:114: Symbols suggest ending FUNC \'new\' but parser thinks ending MODULE \'test\'\nmodule test;\n ^~~~\n' | 308,361 | function | function void apb_env::connect_phase(uvm_phase phase);
super.connect_phase(phase);
bus_collector.item_collected_port.connect(bus_monitor.coll_mon_port);
bus_monitor.addr_trans_port.connect(bus_collector.addr_trans_export);
foreach(slaves[i]) begin
if (slaves[i].is_active == UVM_ACTIVE)
slaves[i].sequencer.addr_trans_port.connect(bus_monitor.addr_trans_export);
end
endfunction | function void apb_env::connect_phase(uvm_phase phase); |
super.connect_phase(phase);
bus_collector.item_collected_port.connect(bus_monitor.coll_mon_port);
bus_monitor.addr_trans_port.connect(bus_collector.addr_trans_export);
foreach(slaves[i]) begin
if (slaves[i].is_active == UVM_ACTIVE)
slaves[i].sequencer.addr_trans_port.connect(bus_monitor.addr_trans_export);
end
endfunction | 0 |
140,194 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv | 90,320,290 | ex5-13_apb_env.sv | sv | 116 | 92 | [] | [] | [] | null | line:10: before: "interface" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:7: Cannot find include file: sv/apb_if.sv\n`include "sv/apb_if.sv" \n ^~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.sv\n sv/apb_if.sv\n sv/apb_if.sv.v\n sv/apb_if.sv.sv\n obj_dir/sv/apb_if.sv\n obj_dir/sv/apb_if.sv.v\n obj_dir/sv/apb_if.sv.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:10: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:12: Cannot find include file: sv/apb_transfer.sv\n`include "sv/apb_transfer.sv" \n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:13: Cannot find include file: sv/apb_config.sv\n`include "sv/apb_config.sv" \n ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:14: Cannot find include file: sv/apb_monitor.sv\n`include "sv/apb_monitor.sv" \n ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:15: Cannot find include file: sv/apb_collector.sv\n`include "sv/apb_collector.sv" \n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:16: Cannot find include file: sv/apb_master_driver.sv\n`include "sv/apb_master_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:17: Cannot find include file: sv/apb_master_sequencer.sv\n`include "sv/apb_master_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:18: Cannot find include file: sv/apb_master_agent.sv\n`include "sv/apb_master_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:19: Cannot find include file: sv/apb_slave_driver.sv\n`include "sv/apb_slave_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:20: Cannot find include file: sv/apb_slave_sequencer.sv\n`include "sv/apb_slave_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:21: Cannot find include file: sv/apb_slave_agent.sv\n`include "sv/apb_slave_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:9: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:23: Unsupported: classes\nclass apb_env extends uvm_env;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:23: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_env extends uvm_env;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:29: syntax error, unexpected \']\', expecting TYPE-IDENTIFIER\n apb_slave_agent slaves[]; \n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:34: Define or directive not defined: \'`uvm_component_utils_begin\'\n `uvm_component_utils_begin(apb_env)\n ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:34: syntax error, unexpected \'(\'\n `uvm_component_utils_begin(apb_env)\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:35: Define or directive not defined: \'`uvm_field_object\'\n `uvm_field_object(cfg, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:36: Define or directive not defined: \'`uvm_component_utils_end\'\n `uvm_component_utils_end\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:51: syntax error, unexpected super\n super.build_phase(phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:55: syntax error, unexpected \'#\'\n if (!uvm_config_db#(apb_config)::get(this, "", "cfg", cfg)) begin\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:56: Define or directive not defined: \'`uvm_info\'\n `uvm_info("NOCONFIG", "using default_apb_config", UVM_MEDIUM)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:57: Unsupported or unknown PLI call: $cast\n $cast(cfg, factory.create_object_by_name("default_apb_config","cfg"));\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:78: syntax error, unexpected \'.\', expecting IDENTIFIER\n bus_collector.item_collected_port.connect(bus_monitor.coll_mon_port);\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:79: syntax error, unexpected \'.\', expecting IDENTIFIER\n bus_monitor.addr_trans_port.connect(bus_collector.addr_trans_export);\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:88: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(demo_tb)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:91: Unsupported: new constructor\n function new(string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:91: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new(string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:107: syntax error, unexpected \'#\'\n uvm_config_db#(virtual apb_if)::set(null, "*", "vif", apb_if0);\n ^\n%Warning-STMTDLY: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:113: Unsupported: Ignoring delay on this delayed statement.\n #100 global_stop_request();\n ^\n ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: Internal Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env.sv:8: ../V3ParseSym.h:114: Symbols suggest ending FUNC \'new\' but parser thinks ending MODULE \'test\'\nmodule test;\n ^~~~\n' | 308,361 | function | function void build_phase(uvm_phase phase);
super.build_phase(phase);
apb0 = apb_env::type_id::create("apb0", this);
endfunction | function void build_phase(uvm_phase phase); |
super.build_phase(phase);
apb0 = apb_env::type_id::create("apb0", this);
endfunction | 0 |
140,195 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv | 90,320,290 | ex5-13_apb_env_build.sv | sv | 83 | 84 | [] | [] | [] | null | line:9: before: "interface" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:6: Cannot find include file: sv/apb_if.sv\n`include "sv/apb_if.sv" \n ^~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.sv\n sv/apb_if.sv\n sv/apb_if.sv.v\n sv/apb_if.sv.sv\n obj_dir/sv/apb_if.sv\n obj_dir/sv/apb_if.sv.v\n obj_dir/sv/apb_if.sv.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:7: Cannot find include file: uvm_pkg.sv\n`include "uvm_pkg.sv" \n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:10: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:12: Cannot find include file: sv/apb_transfer.sv\n`include "sv/apb_transfer.sv" \n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:13: Cannot find include file: sv/apb_config.sv\n`include "sv/apb_config.sv" \n ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:14: Cannot find include file: sv/apb_bus_monitor.sv\n`include "sv/apb_bus_monitor.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:15: Cannot find include file: sv/apb_monitor.sv\n`include "sv/apb_monitor.sv" \n ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:16: Cannot find include file: sv/apb_collector.sv\n`include "sv/apb_collector.sv" \n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:17: Cannot find include file: sv/apb_master_driver.sv\n`include "sv/apb_master_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:18: Cannot find include file: sv/apb_master_sequencer.sv\n`include "sv/apb_master_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:19: Cannot find include file: sv/apb_master_agent.sv\n`include "sv/apb_master_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:20: Cannot find include file: sv/apb_slave_driver.sv\n`include "sv/apb_slave_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:21: Cannot find include file: sv/apb_slave_sequencer.sv\n`include "sv/apb_slave_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:22: Cannot find include file: sv/apb_slave_agent.sv\n`include "sv/apb_slave_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:25: Cannot find include file: sv/apb_env1.sv\n`include "sv/apb_env1.sv" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:9: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:28: syntax error, unexpected ::, expecting \'(\' or \';\'\nfunction void apb_env::build();\n ^~\n : ... Perhaps \'apb_env\' is a package which needs to be predeclared? (IEEE 1800-2017 26.3)\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:30: syntax error, unexpected super\n super.build();\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:34: Define or directive not defined: \'`uvm_info\'\n `uvm_info(get_type_name(), "NOCONFIG: creating an apb_config", UVM_MEDIUM)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:34: syntax error, unexpected \'(\'\n `uvm_info(get_type_name(), "NOCONFIG: creating an apb_config", UVM_MEDIUM)\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:36: Unsupported: SystemVerilog 2005 reserved word not implemented: \'randomize\'\n if (!cfg.randomize()) `uvm_fatal("RANDFAIL", "APB Config rand failed")\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:36: syntax error, unexpected \'(\'\n if (!cfg.randomize()) `uvm_fatal("RANDFAIL", "APB Config rand failed")\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:36: Define or directive not defined: \'`uvm_fatal\'\n if (!cfg.randomize()) `uvm_fatal("RANDFAIL", "APB Config rand failed")\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:40: syntax error, unexpected \'=\', expecting IDENTIFIER\n bus_monitor = apb_bus_monitor::type_id::create("bus_monitor",this);\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:41: syntax error, unexpected \'=\', expecting IDENTIFIER\n bus_monitor.cfg = cfg;\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:43: syntax error, unexpected \'=\', expecting IDENTIFIER\n master = apb_master_agent::type_id::create(cfg.master_config.name,this);\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:44: syntax error, unexpected \'=\', expecting IDENTIFIER\n master.cfg = cfg;\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:54: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(demo_tb)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:57: Unsupported: new constructor\n function new(string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:57: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new(string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:64: syntax error, unexpected \'(\', expecting IDENTIFIER\n apb0.assign_vi(test.apb_if0);\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:75: syntax error, unexpected ::, expecting \';\'\n tb = demo_tb::type_id::create("tb", null);\n ^~\n%Warning-STMTDLY: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:80: Unsupported: Ignoring delay on this delayed statement.\n #100 global_stop_request();\n ^\n ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: Internal Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:8: ../V3ParseSym.h:114: Symbols suggest ending FUNC \'new\' but parser thinks ending MODULE \'test\'\nmodule test;\n ^~~~\n' | 308,362 | module | module test;
import uvm_pkg::*;
`include "uvm_macros.svh"
`include "sv/apb_transfer.sv"
`include "sv/apb_config.sv"
`include "sv/apb_bus_monitor.sv"
`include "sv/apb_monitor.sv"
`include "sv/apb_collector.sv"
`include "sv/apb_master_driver.sv"
`include "sv/apb_master_sequencer.sv"
`include "sv/apb_master_agent.sv"
`include "sv/apb_slave_driver.sv"
`include "sv/apb_slave_sequencer.sv"
`include "sv/apb_slave_agent.sv"
`define BUILD_EX
`include "sv/apb_env1.sv"
function void apb_env::build();
uvm_object config_obj;
super.build();
if(cfg == null) begin
`uvm_info(get_type_name(), "NOCONFIG: creating an apb_config", UVM_MEDIUM)
cfg = apb_config::type_id::create("cfg");
if (!cfg.randomize()) `uvm_fatal("RANDFAIL", "APB Config rand failed")
cfg.print();
end
if (cfg.has_bus_monitor) begin
bus_monitor = apb_bus_monitor::type_id::create("bus_monitor",this);
bus_monitor.cfg = cfg;
end
master = apb_master_agent::type_id::create(cfg.master_config.name,this);
master.cfg = cfg;
slaves = new[cfg.slave_configs.size()];
foreach(slaves[i]) begin
slaves[i] = apb_slave_agent::type_id::create($sformatf("slave[%0d]", i), this);
slaves[i].cfg = cfg.slave_configs[i];
end
endfunction : build
class demo_tb extends uvm_env;
`uvm_component_utils(demo_tb)
apb_env apb0;
apb_config apb_cfg;
function new(string name, uvm_component parent);
super.new(name, parent);
endfunction : new
virtual function void build();
apb0 = apb_env::type_id::create("apb0", this);
endfunction : build
virtual function void connect();
apb0.assign_vi(test.apb_if0);
endfunction : connect
endclass : demo_tb
bit clk, reset;
apb_if apb_if0 (clk, reset);
demo_tb tb;
initial begin
tb = demo_tb::type_id::create("tb", null);
run_test();
end
initial
#100 global_stop_request();
endmodule | module test; |
import uvm_pkg::*;
`include "uvm_macros.svh"
`include "sv/apb_transfer.sv"
`include "sv/apb_config.sv"
`include "sv/apb_bus_monitor.sv"
`include "sv/apb_monitor.sv"
`include "sv/apb_collector.sv"
`include "sv/apb_master_driver.sv"
`include "sv/apb_master_sequencer.sv"
`include "sv/apb_master_agent.sv"
`include "sv/apb_slave_driver.sv"
`include "sv/apb_slave_sequencer.sv"
`include "sv/apb_slave_agent.sv"
`define BUILD_EX
`include "sv/apb_env1.sv"
function void apb_env::build();
uvm_object config_obj;
super.build();
if(cfg == null) begin
`uvm_info(get_type_name(), "NOCONFIG: creating an apb_config", UVM_MEDIUM)
cfg = apb_config::type_id::create("cfg");
if (!cfg.randomize()) `uvm_fatal("RANDFAIL", "APB Config rand failed")
cfg.print();
end
if (cfg.has_bus_monitor) begin
bus_monitor = apb_bus_monitor::type_id::create("bus_monitor",this);
bus_monitor.cfg = cfg;
end
master = apb_master_agent::type_id::create(cfg.master_config.name,this);
master.cfg = cfg;
slaves = new[cfg.slave_configs.size()];
foreach(slaves[i]) begin
slaves[i] = apb_slave_agent::type_id::create($sformatf("slave[%0d]", i), this);
slaves[i].cfg = cfg.slave_configs[i];
end
endfunction : build
class demo_tb extends uvm_env;
`uvm_component_utils(demo_tb)
apb_env apb0;
apb_config apb_cfg;
function new(string name, uvm_component parent);
super.new(name, parent);
endfunction : new
virtual function void build();
apb0 = apb_env::type_id::create("apb0", this);
endfunction : build
virtual function void connect();
apb0.assign_vi(test.apb_if0);
endfunction : connect
endclass : demo_tb
bit clk, reset;
apb_if apb_if0 (clk, reset);
demo_tb tb;
initial begin
tb = demo_tb::type_id::create("tb", null);
run_test();
end
initial
#100 global_stop_request();
endmodule | 0 |
140,196 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv | 90,320,290 | ex5-13_apb_env_build.sv | sv | 83 | 84 | [] | [] | [] | null | line:9: before: "interface" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:6: Cannot find include file: sv/apb_if.sv\n`include "sv/apb_if.sv" \n ^~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.sv\n sv/apb_if.sv\n sv/apb_if.sv.v\n sv/apb_if.sv.sv\n obj_dir/sv/apb_if.sv\n obj_dir/sv/apb_if.sv.v\n obj_dir/sv/apb_if.sv.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:7: Cannot find include file: uvm_pkg.sv\n`include "uvm_pkg.sv" \n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:10: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:12: Cannot find include file: sv/apb_transfer.sv\n`include "sv/apb_transfer.sv" \n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:13: Cannot find include file: sv/apb_config.sv\n`include "sv/apb_config.sv" \n ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:14: Cannot find include file: sv/apb_bus_monitor.sv\n`include "sv/apb_bus_monitor.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:15: Cannot find include file: sv/apb_monitor.sv\n`include "sv/apb_monitor.sv" \n ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:16: Cannot find include file: sv/apb_collector.sv\n`include "sv/apb_collector.sv" \n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:17: Cannot find include file: sv/apb_master_driver.sv\n`include "sv/apb_master_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:18: Cannot find include file: sv/apb_master_sequencer.sv\n`include "sv/apb_master_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:19: Cannot find include file: sv/apb_master_agent.sv\n`include "sv/apb_master_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:20: Cannot find include file: sv/apb_slave_driver.sv\n`include "sv/apb_slave_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:21: Cannot find include file: sv/apb_slave_sequencer.sv\n`include "sv/apb_slave_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:22: Cannot find include file: sv/apb_slave_agent.sv\n`include "sv/apb_slave_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:25: Cannot find include file: sv/apb_env1.sv\n`include "sv/apb_env1.sv" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:9: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:28: syntax error, unexpected ::, expecting \'(\' or \';\'\nfunction void apb_env::build();\n ^~\n : ... Perhaps \'apb_env\' is a package which needs to be predeclared? (IEEE 1800-2017 26.3)\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:30: syntax error, unexpected super\n super.build();\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:34: Define or directive not defined: \'`uvm_info\'\n `uvm_info(get_type_name(), "NOCONFIG: creating an apb_config", UVM_MEDIUM)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:34: syntax error, unexpected \'(\'\n `uvm_info(get_type_name(), "NOCONFIG: creating an apb_config", UVM_MEDIUM)\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:36: Unsupported: SystemVerilog 2005 reserved word not implemented: \'randomize\'\n if (!cfg.randomize()) `uvm_fatal("RANDFAIL", "APB Config rand failed")\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:36: syntax error, unexpected \'(\'\n if (!cfg.randomize()) `uvm_fatal("RANDFAIL", "APB Config rand failed")\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:36: Define or directive not defined: \'`uvm_fatal\'\n if (!cfg.randomize()) `uvm_fatal("RANDFAIL", "APB Config rand failed")\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:40: syntax error, unexpected \'=\', expecting IDENTIFIER\n bus_monitor = apb_bus_monitor::type_id::create("bus_monitor",this);\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:41: syntax error, unexpected \'=\', expecting IDENTIFIER\n bus_monitor.cfg = cfg;\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:43: syntax error, unexpected \'=\', expecting IDENTIFIER\n master = apb_master_agent::type_id::create(cfg.master_config.name,this);\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:44: syntax error, unexpected \'=\', expecting IDENTIFIER\n master.cfg = cfg;\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:54: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(demo_tb)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:57: Unsupported: new constructor\n function new(string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:57: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new(string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:64: syntax error, unexpected \'(\', expecting IDENTIFIER\n apb0.assign_vi(test.apb_if0);\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:75: syntax error, unexpected ::, expecting \';\'\n tb = demo_tb::type_id::create("tb", null);\n ^~\n%Warning-STMTDLY: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:80: Unsupported: Ignoring delay on this delayed statement.\n #100 global_stop_request();\n ^\n ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: Internal Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:8: ../V3ParseSym.h:114: Symbols suggest ending FUNC \'new\' but parser thinks ending MODULE \'test\'\nmodule test;\n ^~~~\n' | 308,362 | function | function void apb_env::build();
uvm_object config_obj;
super.build();
if(cfg == null) begin
`uvm_info(get_type_name(), "NOCONFIG: creating an apb_config", UVM_MEDIUM)
cfg = apb_config::type_id::create("cfg");
if (!cfg.randomize()) `uvm_fatal("RANDFAIL", "APB Config rand failed")
cfg.print();
end
if (cfg.has_bus_monitor) begin
bus_monitor = apb_bus_monitor::type_id::create("bus_monitor",this);
bus_monitor.cfg = cfg;
end
master = apb_master_agent::type_id::create(cfg.master_config.name,this);
master.cfg = cfg;
slaves = new[cfg.slave_configs.size()];
foreach(slaves[i]) begin
slaves[i] = apb_slave_agent::type_id::create($sformatf("slave[%0d]", i), this);
slaves[i].cfg = cfg.slave_configs[i];
end
endfunction | function void apb_env::build(); |
uvm_object config_obj;
super.build();
if(cfg == null) begin
`uvm_info(get_type_name(), "NOCONFIG: creating an apb_config", UVM_MEDIUM)
cfg = apb_config::type_id::create("cfg");
if (!cfg.randomize()) `uvm_fatal("RANDFAIL", "APB Config rand failed")
cfg.print();
end
if (cfg.has_bus_monitor) begin
bus_monitor = apb_bus_monitor::type_id::create("bus_monitor",this);
bus_monitor.cfg = cfg;
end
master = apb_master_agent::type_id::create(cfg.master_config.name,this);
master.cfg = cfg;
slaves = new[cfg.slave_configs.size()];
foreach(slaves[i]) begin
slaves[i] = apb_slave_agent::type_id::create($sformatf("slave[%0d]", i), this);
slaves[i].cfg = cfg.slave_configs[i];
end
endfunction | 0 |
140,197 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv | 90,320,290 | ex5-13_apb_env_build.sv | sv | 83 | 84 | [] | [] | [] | null | line:9: before: "interface" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:6: Cannot find include file: sv/apb_if.sv\n`include "sv/apb_if.sv" \n ^~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.sv\n sv/apb_if.sv\n sv/apb_if.sv.v\n sv/apb_if.sv.sv\n obj_dir/sv/apb_if.sv\n obj_dir/sv/apb_if.sv.v\n obj_dir/sv/apb_if.sv.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:7: Cannot find include file: uvm_pkg.sv\n`include "uvm_pkg.sv" \n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:10: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:12: Cannot find include file: sv/apb_transfer.sv\n`include "sv/apb_transfer.sv" \n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:13: Cannot find include file: sv/apb_config.sv\n`include "sv/apb_config.sv" \n ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:14: Cannot find include file: sv/apb_bus_monitor.sv\n`include "sv/apb_bus_monitor.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:15: Cannot find include file: sv/apb_monitor.sv\n`include "sv/apb_monitor.sv" \n ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:16: Cannot find include file: sv/apb_collector.sv\n`include "sv/apb_collector.sv" \n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:17: Cannot find include file: sv/apb_master_driver.sv\n`include "sv/apb_master_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:18: Cannot find include file: sv/apb_master_sequencer.sv\n`include "sv/apb_master_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:19: Cannot find include file: sv/apb_master_agent.sv\n`include "sv/apb_master_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:20: Cannot find include file: sv/apb_slave_driver.sv\n`include "sv/apb_slave_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:21: Cannot find include file: sv/apb_slave_sequencer.sv\n`include "sv/apb_slave_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:22: Cannot find include file: sv/apb_slave_agent.sv\n`include "sv/apb_slave_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:25: Cannot find include file: sv/apb_env1.sv\n`include "sv/apb_env1.sv" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:9: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:28: syntax error, unexpected ::, expecting \'(\' or \';\'\nfunction void apb_env::build();\n ^~\n : ... Perhaps \'apb_env\' is a package which needs to be predeclared? (IEEE 1800-2017 26.3)\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:30: syntax error, unexpected super\n super.build();\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:34: Define or directive not defined: \'`uvm_info\'\n `uvm_info(get_type_name(), "NOCONFIG: creating an apb_config", UVM_MEDIUM)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:34: syntax error, unexpected \'(\'\n `uvm_info(get_type_name(), "NOCONFIG: creating an apb_config", UVM_MEDIUM)\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:36: Unsupported: SystemVerilog 2005 reserved word not implemented: \'randomize\'\n if (!cfg.randomize()) `uvm_fatal("RANDFAIL", "APB Config rand failed")\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:36: syntax error, unexpected \'(\'\n if (!cfg.randomize()) `uvm_fatal("RANDFAIL", "APB Config rand failed")\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:36: Define or directive not defined: \'`uvm_fatal\'\n if (!cfg.randomize()) `uvm_fatal("RANDFAIL", "APB Config rand failed")\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:40: syntax error, unexpected \'=\', expecting IDENTIFIER\n bus_monitor = apb_bus_monitor::type_id::create("bus_monitor",this);\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:41: syntax error, unexpected \'=\', expecting IDENTIFIER\n bus_monitor.cfg = cfg;\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:43: syntax error, unexpected \'=\', expecting IDENTIFIER\n master = apb_master_agent::type_id::create(cfg.master_config.name,this);\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:44: syntax error, unexpected \'=\', expecting IDENTIFIER\n master.cfg = cfg;\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:54: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(demo_tb)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:57: Unsupported: new constructor\n function new(string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:57: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new(string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:64: syntax error, unexpected \'(\', expecting IDENTIFIER\n apb0.assign_vi(test.apb_if0);\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:75: syntax error, unexpected ::, expecting \';\'\n tb = demo_tb::type_id::create("tb", null);\n ^~\n%Warning-STMTDLY: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:80: Unsupported: Ignoring delay on this delayed statement.\n #100 global_stop_request();\n ^\n ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: Internal Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:8: ../V3ParseSym.h:114: Symbols suggest ending FUNC \'new\' but parser thinks ending MODULE \'test\'\nmodule test;\n ^~~~\n' | 308,362 | function | function new(string name, uvm_component parent);
super.new(name, parent);
endfunction | function new(string name, uvm_component parent); |
super.new(name, parent);
endfunction | 0 |
140,198 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv | 90,320,290 | ex5-13_apb_env_build.sv | sv | 83 | 84 | [] | [] | [] | null | line:9: before: "interface" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:6: Cannot find include file: sv/apb_if.sv\n`include "sv/apb_if.sv" \n ^~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.sv\n sv/apb_if.sv\n sv/apb_if.sv.v\n sv/apb_if.sv.sv\n obj_dir/sv/apb_if.sv\n obj_dir/sv/apb_if.sv.v\n obj_dir/sv/apb_if.sv.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:7: Cannot find include file: uvm_pkg.sv\n`include "uvm_pkg.sv" \n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:10: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:12: Cannot find include file: sv/apb_transfer.sv\n`include "sv/apb_transfer.sv" \n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:13: Cannot find include file: sv/apb_config.sv\n`include "sv/apb_config.sv" \n ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:14: Cannot find include file: sv/apb_bus_monitor.sv\n`include "sv/apb_bus_monitor.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:15: Cannot find include file: sv/apb_monitor.sv\n`include "sv/apb_monitor.sv" \n ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:16: Cannot find include file: sv/apb_collector.sv\n`include "sv/apb_collector.sv" \n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:17: Cannot find include file: sv/apb_master_driver.sv\n`include "sv/apb_master_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:18: Cannot find include file: sv/apb_master_sequencer.sv\n`include "sv/apb_master_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:19: Cannot find include file: sv/apb_master_agent.sv\n`include "sv/apb_master_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:20: Cannot find include file: sv/apb_slave_driver.sv\n`include "sv/apb_slave_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:21: Cannot find include file: sv/apb_slave_sequencer.sv\n`include "sv/apb_slave_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:22: Cannot find include file: sv/apb_slave_agent.sv\n`include "sv/apb_slave_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:25: Cannot find include file: sv/apb_env1.sv\n`include "sv/apb_env1.sv" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:9: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:28: syntax error, unexpected ::, expecting \'(\' or \';\'\nfunction void apb_env::build();\n ^~\n : ... Perhaps \'apb_env\' is a package which needs to be predeclared? (IEEE 1800-2017 26.3)\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:30: syntax error, unexpected super\n super.build();\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:34: Define or directive not defined: \'`uvm_info\'\n `uvm_info(get_type_name(), "NOCONFIG: creating an apb_config", UVM_MEDIUM)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:34: syntax error, unexpected \'(\'\n `uvm_info(get_type_name(), "NOCONFIG: creating an apb_config", UVM_MEDIUM)\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:36: Unsupported: SystemVerilog 2005 reserved word not implemented: \'randomize\'\n if (!cfg.randomize()) `uvm_fatal("RANDFAIL", "APB Config rand failed")\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:36: syntax error, unexpected \'(\'\n if (!cfg.randomize()) `uvm_fatal("RANDFAIL", "APB Config rand failed")\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:36: Define or directive not defined: \'`uvm_fatal\'\n if (!cfg.randomize()) `uvm_fatal("RANDFAIL", "APB Config rand failed")\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:40: syntax error, unexpected \'=\', expecting IDENTIFIER\n bus_monitor = apb_bus_monitor::type_id::create("bus_monitor",this);\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:41: syntax error, unexpected \'=\', expecting IDENTIFIER\n bus_monitor.cfg = cfg;\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:43: syntax error, unexpected \'=\', expecting IDENTIFIER\n master = apb_master_agent::type_id::create(cfg.master_config.name,this);\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:44: syntax error, unexpected \'=\', expecting IDENTIFIER\n master.cfg = cfg;\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:54: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(demo_tb)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:57: Unsupported: new constructor\n function new(string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:57: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new(string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:64: syntax error, unexpected \'(\', expecting IDENTIFIER\n apb0.assign_vi(test.apb_if0);\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:75: syntax error, unexpected ::, expecting \';\'\n tb = demo_tb::type_id::create("tb", null);\n ^~\n%Warning-STMTDLY: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:80: Unsupported: Ignoring delay on this delayed statement.\n #100 global_stop_request();\n ^\n ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: Internal Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:8: ../V3ParseSym.h:114: Symbols suggest ending FUNC \'new\' but parser thinks ending MODULE \'test\'\nmodule test;\n ^~~~\n' | 308,362 | function | function void build();
apb0 = apb_env::type_id::create("apb0", this);
endfunction | function void build(); |
apb0 = apb_env::type_id::create("apb0", this);
endfunction | 0 |
140,199 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv | 90,320,290 | ex5-13_apb_env_build.sv | sv | 83 | 84 | [] | [] | [] | null | line:9: before: "interface" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:6: Cannot find include file: sv/apb_if.sv\n`include "sv/apb_if.sv" \n ^~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.sv\n sv/apb_if.sv\n sv/apb_if.sv.v\n sv/apb_if.sv.sv\n obj_dir/sv/apb_if.sv\n obj_dir/sv/apb_if.sv.v\n obj_dir/sv/apb_if.sv.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:7: Cannot find include file: uvm_pkg.sv\n`include "uvm_pkg.sv" \n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:10: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:12: Cannot find include file: sv/apb_transfer.sv\n`include "sv/apb_transfer.sv" \n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:13: Cannot find include file: sv/apb_config.sv\n`include "sv/apb_config.sv" \n ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:14: Cannot find include file: sv/apb_bus_monitor.sv\n`include "sv/apb_bus_monitor.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:15: Cannot find include file: sv/apb_monitor.sv\n`include "sv/apb_monitor.sv" \n ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:16: Cannot find include file: sv/apb_collector.sv\n`include "sv/apb_collector.sv" \n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:17: Cannot find include file: sv/apb_master_driver.sv\n`include "sv/apb_master_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:18: Cannot find include file: sv/apb_master_sequencer.sv\n`include "sv/apb_master_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:19: Cannot find include file: sv/apb_master_agent.sv\n`include "sv/apb_master_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:20: Cannot find include file: sv/apb_slave_driver.sv\n`include "sv/apb_slave_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:21: Cannot find include file: sv/apb_slave_sequencer.sv\n`include "sv/apb_slave_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:22: Cannot find include file: sv/apb_slave_agent.sv\n`include "sv/apb_slave_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:25: Cannot find include file: sv/apb_env1.sv\n`include "sv/apb_env1.sv" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:9: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:28: syntax error, unexpected ::, expecting \'(\' or \';\'\nfunction void apb_env::build();\n ^~\n : ... Perhaps \'apb_env\' is a package which needs to be predeclared? (IEEE 1800-2017 26.3)\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:30: syntax error, unexpected super\n super.build();\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:34: Define or directive not defined: \'`uvm_info\'\n `uvm_info(get_type_name(), "NOCONFIG: creating an apb_config", UVM_MEDIUM)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:34: syntax error, unexpected \'(\'\n `uvm_info(get_type_name(), "NOCONFIG: creating an apb_config", UVM_MEDIUM)\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:36: Unsupported: SystemVerilog 2005 reserved word not implemented: \'randomize\'\n if (!cfg.randomize()) `uvm_fatal("RANDFAIL", "APB Config rand failed")\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:36: syntax error, unexpected \'(\'\n if (!cfg.randomize()) `uvm_fatal("RANDFAIL", "APB Config rand failed")\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:36: Define or directive not defined: \'`uvm_fatal\'\n if (!cfg.randomize()) `uvm_fatal("RANDFAIL", "APB Config rand failed")\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:40: syntax error, unexpected \'=\', expecting IDENTIFIER\n bus_monitor = apb_bus_monitor::type_id::create("bus_monitor",this);\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:41: syntax error, unexpected \'=\', expecting IDENTIFIER\n bus_monitor.cfg = cfg;\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:43: syntax error, unexpected \'=\', expecting IDENTIFIER\n master = apb_master_agent::type_id::create(cfg.master_config.name,this);\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:44: syntax error, unexpected \'=\', expecting IDENTIFIER\n master.cfg = cfg;\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:54: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(demo_tb)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:57: Unsupported: new constructor\n function new(string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:57: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new(string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:64: syntax error, unexpected \'(\', expecting IDENTIFIER\n apb0.assign_vi(test.apb_if0);\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:75: syntax error, unexpected ::, expecting \';\'\n tb = demo_tb::type_id::create("tb", null);\n ^~\n%Warning-STMTDLY: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:80: Unsupported: Ignoring delay on this delayed statement.\n #100 global_stop_request();\n ^\n ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: Internal Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-13_apb_env_build.sv:8: ../V3ParseSym.h:114: Symbols suggest ending FUNC \'new\' but parser thinks ending MODULE \'test\'\nmodule test;\n ^~~~\n' | 308,362 | function | function void connect();
apb0.assign_vi(test.apb_if0);
endfunction | function void connect(); |
apb0.assign_vi(test.apb_if0);
endfunction | 0 |
140,200 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv | 90,320,290 | ex5-15_apb_env_build.sv | sv | 79 | 92 | [] | [] | [] | null | line:11: before: "interface" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:8: Cannot find include file: sv/apb_if.sv\n`include "sv/apb_if.sv" \n ^~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.sv\n sv/apb_if.sv\n sv/apb_if.sv.v\n sv/apb_if.sv.sv\n obj_dir/sv/apb_if.sv\n obj_dir/sv/apb_if.sv.v\n obj_dir/sv/apb_if.sv.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:11: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:13: Cannot find include file: sv/apb_transfer.sv\n`include "sv/apb_transfer.sv" \n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:14: Cannot find include file: sv/apb_config.sv\n`include "sv/apb_config.sv" \n ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:15: Cannot find include file: sv/apb_monitor.sv\n`include "sv/apb_monitor.sv" \n ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:16: Cannot find include file: sv/apb_collector.sv\n`include "sv/apb_collector.sv" \n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:17: Cannot find include file: sv/apb_master_driver.sv\n`include "sv/apb_master_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:18: Cannot find include file: sv/apb_master_sequencer.sv\n`include "sv/apb_master_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:19: Cannot find include file: sv/apb_master_agent.sv\n`include "sv/apb_master_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:20: Cannot find include file: sv/apb_slave_driver.sv\n`include "sv/apb_slave_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:21: Cannot find include file: sv/apb_slave_sequencer.sv\n`include "sv/apb_slave_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:22: Cannot find include file: sv/apb_slave_agent.sv\n`include "sv/apb_slave_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:26: Cannot find include file: sv/apb_env1.sv\n`include "sv/apb_env1.sv" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:10: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:29: syntax error, unexpected ::, expecting \'(\' or \';\'\nfunction void apb_env::build_phase(uvm_phase phase);\n ^~\n : ... Perhaps \'apb_env\' is a package which needs to be predeclared? (IEEE 1800-2017 26.3)\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:31: syntax error, unexpected super\n super.build_phase(phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:35: syntax error, unexpected \'#\'\n if (!uvm_config_db#(apb_config)::get(this, "", "cfg", cfg)) begin\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:36: Define or directive not defined: \'`uvm_info\'\n `uvm_info("NOCONFIG", "using default_apb_config", UVM_MEDIUM)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:37: Unsupported or unknown PLI call: $cast\n $cast(cfg, factory.create_object_by_name("default_apb_config","cfg"));\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:59: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(demo_tb)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:61: Unsupported: new constructor\n function new(string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:61: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new(string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:74: syntax error, unexpected \'#\'\n uvm_config_db#(virtual apb_if)::set(null, "*", "vif", apb_if0);\n ^\n%Error: Internal Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:9: ../V3ParseSym.h:114: Symbols suggest ending FUNC \'new\' but parser thinks ending MODULE \'test\'\nmodule test;\n ^~~~\n' | 308,364 | module | module test;
import uvm_pkg::*;
`include "uvm_macros.svh"
`include "sv/apb_transfer.sv"
`include "sv/apb_config.sv"
`include "sv/apb_monitor.sv"
`include "sv/apb_collector.sv"
`include "sv/apb_master_driver.sv"
`include "sv/apb_master_sequencer.sv"
`include "sv/apb_master_agent.sv"
`include "sv/apb_slave_driver.sv"
`include "sv/apb_slave_sequencer.sv"
`include "sv/apb_slave_agent.sv"
`define ENV_NO_BUILD
`include "sv/apb_env1.sv"
function void apb_env::build_phase(uvm_phase phase);
uvm_object config_obj;
super.build_phase(phase);
if(cfg == null)
if (!uvm_config_db#(apb_config)::get(this, "", "cfg", cfg)) begin
`uvm_info("NOCONFIG", "using default_apb_config", UVM_MEDIUM)
$cast(cfg, factory.create_object_by_name("default_apb_config","cfg"));
end
uvm_config_object::set(this, "*", "cfg", cfg);
foreach(cfg.slave_configs[i])
uvm_config_object::set(this, $sformatf("slave[%0d]*", i), "cfg", cfg.slave_configs[i]);
bus_monitor = apb_monitor::type_id::create("bus_monitor",this);
bus_collector = apb_collector::type_id::create("bus_collector",this);
master = apb_master_agent::type_id::create("master", this);
slaves = new[cfg.slave_configs.size()];
foreach(slaves[i])
slaves[i] = apb_slave_agent::type_id::create($sformatf("slave[%0d]", i), this);
endfunction : build_phase
class demo_tb extends uvm_env;
`uvm_component_utils(demo_tb)
apb_env apb0;
function new(string name, uvm_component parent);
super.new(name, parent);
endfunction : new
virtual function void build_phase(uvm_phase phase);
super.build_phase(phase);
apb0 = apb_env::type_id::create("apb0", this);
endfunction : build_phase
endclass : demo_tb
bit clk, reset;
apb_if apb_if0 (clk, reset);
initial begin
uvm_config_db#(virtual apb_if)::set(null, "*", "vif", apb_if0);
run_test("demo_tb");
end
endmodule | module test; |
import uvm_pkg::*;
`include "uvm_macros.svh"
`include "sv/apb_transfer.sv"
`include "sv/apb_config.sv"
`include "sv/apb_monitor.sv"
`include "sv/apb_collector.sv"
`include "sv/apb_master_driver.sv"
`include "sv/apb_master_sequencer.sv"
`include "sv/apb_master_agent.sv"
`include "sv/apb_slave_driver.sv"
`include "sv/apb_slave_sequencer.sv"
`include "sv/apb_slave_agent.sv"
`define ENV_NO_BUILD
`include "sv/apb_env1.sv"
function void apb_env::build_phase(uvm_phase phase);
uvm_object config_obj;
super.build_phase(phase);
if(cfg == null)
if (!uvm_config_db#(apb_config)::get(this, "", "cfg", cfg)) begin
`uvm_info("NOCONFIG", "using default_apb_config", UVM_MEDIUM)
$cast(cfg, factory.create_object_by_name("default_apb_config","cfg"));
end
uvm_config_object::set(this, "*", "cfg", cfg);
foreach(cfg.slave_configs[i])
uvm_config_object::set(this, $sformatf("slave[%0d]*", i), "cfg", cfg.slave_configs[i]);
bus_monitor = apb_monitor::type_id::create("bus_monitor",this);
bus_collector = apb_collector::type_id::create("bus_collector",this);
master = apb_master_agent::type_id::create("master", this);
slaves = new[cfg.slave_configs.size()];
foreach(slaves[i])
slaves[i] = apb_slave_agent::type_id::create($sformatf("slave[%0d]", i), this);
endfunction : build_phase
class demo_tb extends uvm_env;
`uvm_component_utils(demo_tb)
apb_env apb0;
function new(string name, uvm_component parent);
super.new(name, parent);
endfunction : new
virtual function void build_phase(uvm_phase phase);
super.build_phase(phase);
apb0 = apb_env::type_id::create("apb0", this);
endfunction : build_phase
endclass : demo_tb
bit clk, reset;
apb_if apb_if0 (clk, reset);
initial begin
uvm_config_db#(virtual apb_if)::set(null, "*", "vif", apb_if0);
run_test("demo_tb");
end
endmodule | 0 |
140,201 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv | 90,320,290 | ex5-15_apb_env_build.sv | sv | 79 | 92 | [] | [] | [] | null | line:11: before: "interface" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:8: Cannot find include file: sv/apb_if.sv\n`include "sv/apb_if.sv" \n ^~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.sv\n sv/apb_if.sv\n sv/apb_if.sv.v\n sv/apb_if.sv.sv\n obj_dir/sv/apb_if.sv\n obj_dir/sv/apb_if.sv.v\n obj_dir/sv/apb_if.sv.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:11: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:13: Cannot find include file: sv/apb_transfer.sv\n`include "sv/apb_transfer.sv" \n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:14: Cannot find include file: sv/apb_config.sv\n`include "sv/apb_config.sv" \n ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:15: Cannot find include file: sv/apb_monitor.sv\n`include "sv/apb_monitor.sv" \n ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:16: Cannot find include file: sv/apb_collector.sv\n`include "sv/apb_collector.sv" \n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:17: Cannot find include file: sv/apb_master_driver.sv\n`include "sv/apb_master_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:18: Cannot find include file: sv/apb_master_sequencer.sv\n`include "sv/apb_master_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:19: Cannot find include file: sv/apb_master_agent.sv\n`include "sv/apb_master_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:20: Cannot find include file: sv/apb_slave_driver.sv\n`include "sv/apb_slave_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:21: Cannot find include file: sv/apb_slave_sequencer.sv\n`include "sv/apb_slave_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:22: Cannot find include file: sv/apb_slave_agent.sv\n`include "sv/apb_slave_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:26: Cannot find include file: sv/apb_env1.sv\n`include "sv/apb_env1.sv" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:10: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:29: syntax error, unexpected ::, expecting \'(\' or \';\'\nfunction void apb_env::build_phase(uvm_phase phase);\n ^~\n : ... Perhaps \'apb_env\' is a package which needs to be predeclared? (IEEE 1800-2017 26.3)\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:31: syntax error, unexpected super\n super.build_phase(phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:35: syntax error, unexpected \'#\'\n if (!uvm_config_db#(apb_config)::get(this, "", "cfg", cfg)) begin\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:36: Define or directive not defined: \'`uvm_info\'\n `uvm_info("NOCONFIG", "using default_apb_config", UVM_MEDIUM)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:37: Unsupported or unknown PLI call: $cast\n $cast(cfg, factory.create_object_by_name("default_apb_config","cfg"));\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:59: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(demo_tb)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:61: Unsupported: new constructor\n function new(string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:61: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new(string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:74: syntax error, unexpected \'#\'\n uvm_config_db#(virtual apb_if)::set(null, "*", "vif", apb_if0);\n ^\n%Error: Internal Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:9: ../V3ParseSym.h:114: Symbols suggest ending FUNC \'new\' but parser thinks ending MODULE \'test\'\nmodule test;\n ^~~~\n' | 308,364 | function | function void apb_env::build_phase(uvm_phase phase);
uvm_object config_obj;
super.build_phase(phase);
if(cfg == null)
if (!uvm_config_db#(apb_config)::get(this, "", "cfg", cfg)) begin
`uvm_info("NOCONFIG", "using default_apb_config", UVM_MEDIUM)
$cast(cfg, factory.create_object_by_name("default_apb_config","cfg"));
end
uvm_config_object::set(this, "*", "cfg", cfg);
foreach(cfg.slave_configs[i])
uvm_config_object::set(this, $sformatf("slave[%0d]*", i), "cfg", cfg.slave_configs[i]);
bus_monitor = apb_monitor::type_id::create("bus_monitor",this);
bus_collector = apb_collector::type_id::create("bus_collector",this);
master = apb_master_agent::type_id::create("master", this);
slaves = new[cfg.slave_configs.size()];
foreach(slaves[i])
slaves[i] = apb_slave_agent::type_id::create($sformatf("slave[%0d]", i), this);
endfunction | function void apb_env::build_phase(uvm_phase phase); |
uvm_object config_obj;
super.build_phase(phase);
if(cfg == null)
if (!uvm_config_db#(apb_config)::get(this, "", "cfg", cfg)) begin
`uvm_info("NOCONFIG", "using default_apb_config", UVM_MEDIUM)
$cast(cfg, factory.create_object_by_name("default_apb_config","cfg"));
end
uvm_config_object::set(this, "*", "cfg", cfg);
foreach(cfg.slave_configs[i])
uvm_config_object::set(this, $sformatf("slave[%0d]*", i), "cfg", cfg.slave_configs[i]);
bus_monitor = apb_monitor::type_id::create("bus_monitor",this);
bus_collector = apb_collector::type_id::create("bus_collector",this);
master = apb_master_agent::type_id::create("master", this);
slaves = new[cfg.slave_configs.size()];
foreach(slaves[i])
slaves[i] = apb_slave_agent::type_id::create($sformatf("slave[%0d]", i), this);
endfunction | 0 |
140,202 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv | 90,320,290 | ex5-15_apb_env_build.sv | sv | 79 | 92 | [] | [] | [] | null | line:11: before: "interface" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:8: Cannot find include file: sv/apb_if.sv\n`include "sv/apb_if.sv" \n ^~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.sv\n sv/apb_if.sv\n sv/apb_if.sv.v\n sv/apb_if.sv.sv\n obj_dir/sv/apb_if.sv\n obj_dir/sv/apb_if.sv.v\n obj_dir/sv/apb_if.sv.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:11: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:13: Cannot find include file: sv/apb_transfer.sv\n`include "sv/apb_transfer.sv" \n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:14: Cannot find include file: sv/apb_config.sv\n`include "sv/apb_config.sv" \n ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:15: Cannot find include file: sv/apb_monitor.sv\n`include "sv/apb_monitor.sv" \n ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:16: Cannot find include file: sv/apb_collector.sv\n`include "sv/apb_collector.sv" \n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:17: Cannot find include file: sv/apb_master_driver.sv\n`include "sv/apb_master_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:18: Cannot find include file: sv/apb_master_sequencer.sv\n`include "sv/apb_master_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:19: Cannot find include file: sv/apb_master_agent.sv\n`include "sv/apb_master_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:20: Cannot find include file: sv/apb_slave_driver.sv\n`include "sv/apb_slave_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:21: Cannot find include file: sv/apb_slave_sequencer.sv\n`include "sv/apb_slave_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:22: Cannot find include file: sv/apb_slave_agent.sv\n`include "sv/apb_slave_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:26: Cannot find include file: sv/apb_env1.sv\n`include "sv/apb_env1.sv" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:10: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:29: syntax error, unexpected ::, expecting \'(\' or \';\'\nfunction void apb_env::build_phase(uvm_phase phase);\n ^~\n : ... Perhaps \'apb_env\' is a package which needs to be predeclared? (IEEE 1800-2017 26.3)\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:31: syntax error, unexpected super\n super.build_phase(phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:35: syntax error, unexpected \'#\'\n if (!uvm_config_db#(apb_config)::get(this, "", "cfg", cfg)) begin\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:36: Define or directive not defined: \'`uvm_info\'\n `uvm_info("NOCONFIG", "using default_apb_config", UVM_MEDIUM)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:37: Unsupported or unknown PLI call: $cast\n $cast(cfg, factory.create_object_by_name("default_apb_config","cfg"));\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:59: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(demo_tb)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:61: Unsupported: new constructor\n function new(string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:61: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new(string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:74: syntax error, unexpected \'#\'\n uvm_config_db#(virtual apb_if)::set(null, "*", "vif", apb_if0);\n ^\n%Error: Internal Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:9: ../V3ParseSym.h:114: Symbols suggest ending FUNC \'new\' but parser thinks ending MODULE \'test\'\nmodule test;\n ^~~~\n' | 308,364 | function | function new(string name, uvm_component parent);
super.new(name, parent);
endfunction | function new(string name, uvm_component parent); |
super.new(name, parent);
endfunction | 0 |
140,203 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv | 90,320,290 | ex5-15_apb_env_build.sv | sv | 79 | 92 | [] | [] | [] | null | line:11: before: "interface" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:8: Cannot find include file: sv/apb_if.sv\n`include "sv/apb_if.sv" \n ^~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.sv\n sv/apb_if.sv\n sv/apb_if.sv.v\n sv/apb_if.sv.sv\n obj_dir/sv/apb_if.sv\n obj_dir/sv/apb_if.sv.v\n obj_dir/sv/apb_if.sv.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:11: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:13: Cannot find include file: sv/apb_transfer.sv\n`include "sv/apb_transfer.sv" \n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:14: Cannot find include file: sv/apb_config.sv\n`include "sv/apb_config.sv" \n ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:15: Cannot find include file: sv/apb_monitor.sv\n`include "sv/apb_monitor.sv" \n ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:16: Cannot find include file: sv/apb_collector.sv\n`include "sv/apb_collector.sv" \n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:17: Cannot find include file: sv/apb_master_driver.sv\n`include "sv/apb_master_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:18: Cannot find include file: sv/apb_master_sequencer.sv\n`include "sv/apb_master_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:19: Cannot find include file: sv/apb_master_agent.sv\n`include "sv/apb_master_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:20: Cannot find include file: sv/apb_slave_driver.sv\n`include "sv/apb_slave_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:21: Cannot find include file: sv/apb_slave_sequencer.sv\n`include "sv/apb_slave_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:22: Cannot find include file: sv/apb_slave_agent.sv\n`include "sv/apb_slave_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:26: Cannot find include file: sv/apb_env1.sv\n`include "sv/apb_env1.sv" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:10: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:29: syntax error, unexpected ::, expecting \'(\' or \';\'\nfunction void apb_env::build_phase(uvm_phase phase);\n ^~\n : ... Perhaps \'apb_env\' is a package which needs to be predeclared? (IEEE 1800-2017 26.3)\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:31: syntax error, unexpected super\n super.build_phase(phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:35: syntax error, unexpected \'#\'\n if (!uvm_config_db#(apb_config)::get(this, "", "cfg", cfg)) begin\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:36: Define or directive not defined: \'`uvm_info\'\n `uvm_info("NOCONFIG", "using default_apb_config", UVM_MEDIUM)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:37: Unsupported or unknown PLI call: $cast\n $cast(cfg, factory.create_object_by_name("default_apb_config","cfg"));\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:59: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(demo_tb)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:61: Unsupported: new constructor\n function new(string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:61: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new(string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:74: syntax error, unexpected \'#\'\n uvm_config_db#(virtual apb_if)::set(null, "*", "vif", apb_if0);\n ^\n%Error: Internal Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-15_apb_env_build.sv:9: ../V3ParseSym.h:114: Symbols suggest ending FUNC \'new\' but parser thinks ending MODULE \'test\'\nmodule test;\n ^~~~\n' | 308,364 | function | function void build_phase(uvm_phase phase);
super.build_phase(phase);
apb0 = apb_env::type_id::create("apb0", this);
endfunction | function void build_phase(uvm_phase phase); |
super.build_phase(phase);
apb0 = apb_env::type_id::create("apb0", this);
endfunction | 0 |
140,204 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-16_demo_apb_config.sv | 90,320,290 | ex5-16_demo_apb_config.sv | sv | 34 | 71 | [] | [] | [] | null | line:9: before: ":" | null | 139: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-16_demo_apb_config.sv:10: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.sv\n uvm_macros.svh\n uvm_macros.svh.v\n uvm_macros.svh.sv\n obj_dir/uvm_macros.svh\n obj_dir/uvm_macros.svh.v\n obj_dir/uvm_macros.svh.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-16_demo_apb_config.sv:12: Cannot find include file: sv/apb_config.sv\n`include "sv/apb_config.sv" \n ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-16_demo_apb_config.sv:9: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-16_demo_apb_config.sv:14: Unsupported: classes\nclass demo_config extends apb_config;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-16_demo_apb_config.sv:14: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass demo_config extends apb_config;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-16_demo_apb_config.sv:15: Define or directive not defined: \'`uvm_object_utils\'\n `uvm_object_utils(demo_config)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-16_demo_apb_config.sv:29: Unsupported: Hierarchical class references\n apb_cfg = demo_config::type_id::create("apb_cfg", null);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-16_demo_apb_config.sv:29: Unsupported: scoped class reference\n apb_cfg = demo_config::type_id::create("apb_cfg", null);\n ^~~~~~~\nSegmentation fault\n%Error: Command Failed /usr/bin/verilator_bin --xml-output data/verilator_xmls/73c75a35-45fa-4f5d-a65e-933ba8508157.xml --y data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs\\,data/full_repos/permissive/90320290 data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-16_demo_apb_config.sv\n' | 308,365 | module | module test;
import uvm_pkg::*;
`include "uvm_macros.svh"
`include "sv/apb_config.sv"
class demo_config extends apb_config;
`uvm_object_utils(demo_config)
function new(string name = "demo_config");
super.new(name);
add_slave("slave0", 32'h0000_0000, 32'h7FFF_FFFF, 0, UVM_ACTIVE);
add_slave("slave1", 32'h8000_0000, 32'hFFFF_FFFF, 1, UVM_PASSIVE);
add_master("master", UVM_ACTIVE);
endfunction
endclass : demo_config
demo_config apb_cfg;
initial begin
apb_cfg = demo_config::type_id::create("apb_cfg", null);
apb_cfg.print();
end
endmodule | module test; |
import uvm_pkg::*;
`include "uvm_macros.svh"
`include "sv/apb_config.sv"
class demo_config extends apb_config;
`uvm_object_utils(demo_config)
function new(string name = "demo_config");
super.new(name);
add_slave("slave0", 32'h0000_0000, 32'h7FFF_FFFF, 0, UVM_ACTIVE);
add_slave("slave1", 32'h8000_0000, 32'hFFFF_FFFF, 1, UVM_PASSIVE);
add_master("master", UVM_ACTIVE);
endfunction
endclass : demo_config
demo_config apb_cfg;
initial begin
apb_cfg = demo_config::type_id::create("apb_cfg", null);
apb_cfg.print();
end
endmodule | 0 |
140,205 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-16_demo_apb_config.sv | 90,320,290 | ex5-16_demo_apb_config.sv | sv | 34 | 71 | [] | [] | [] | null | line:9: before: ":" | null | 139: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-16_demo_apb_config.sv:10: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.sv\n uvm_macros.svh\n uvm_macros.svh.v\n uvm_macros.svh.sv\n obj_dir/uvm_macros.svh\n obj_dir/uvm_macros.svh.v\n obj_dir/uvm_macros.svh.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-16_demo_apb_config.sv:12: Cannot find include file: sv/apb_config.sv\n`include "sv/apb_config.sv" \n ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-16_demo_apb_config.sv:9: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-16_demo_apb_config.sv:14: Unsupported: classes\nclass demo_config extends apb_config;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-16_demo_apb_config.sv:14: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass demo_config extends apb_config;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-16_demo_apb_config.sv:15: Define or directive not defined: \'`uvm_object_utils\'\n `uvm_object_utils(demo_config)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-16_demo_apb_config.sv:29: Unsupported: Hierarchical class references\n apb_cfg = demo_config::type_id::create("apb_cfg", null);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-16_demo_apb_config.sv:29: Unsupported: scoped class reference\n apb_cfg = demo_config::type_id::create("apb_cfg", null);\n ^~~~~~~\nSegmentation fault\n%Error: Command Failed /usr/bin/verilator_bin --xml-output data/verilator_xmls/73c75a35-45fa-4f5d-a65e-933ba8508157.xml --y data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs\\,data/full_repos/permissive/90320290 data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-16_demo_apb_config.sv\n' | 308,365 | function | function new(string name = "demo_config");
super.new(name);
add_slave("slave0", 32'h0000_0000, 32'h7FFF_FFFF, 0, UVM_ACTIVE);
add_slave("slave1", 32'h8000_0000, 32'hFFFF_FFFF, 1, UVM_PASSIVE);
add_master("master", UVM_ACTIVE);
endfunction | function new(string name = "demo_config"); |
super.new(name);
add_slave("slave0", 32'h0000_0000, 32'h7FFF_FFFF, 0, UVM_ACTIVE);
add_slave("slave1", 32'h8000_0000, 32'hFFFF_FFFF, 1, UVM_PASSIVE);
add_master("master", UVM_ACTIVE);
endfunction | 0 |
140,206 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv | 90,320,290 | ex5-17_apb_tb_build.sv | sv | 76 | 81 | [] | [] | [] | null | line:11: before: "interface" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:8: Cannot find include file: sv/apb_if.sv\n`include "sv/apb_if.sv" \n ^~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.sv\n sv/apb_if.sv\n sv/apb_if.sv.v\n sv/apb_if.sv.sv\n obj_dir/sv/apb_if.sv\n obj_dir/sv/apb_if.sv.v\n obj_dir/sv/apb_if.sv.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:11: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:13: Cannot find include file: sv/apb_transfer.sv\n`include "sv/apb_transfer.sv" \n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:14: Cannot find include file: sv/apb_config.sv\n`include "sv/apb_config.sv" \n ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:15: Cannot find include file: sv/apb_bus_monitor.sv\n`include "sv/apb_bus_monitor.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:16: Cannot find include file: sv/apb_monitor.sv\n`include "sv/apb_monitor.sv" \n ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:17: Cannot find include file: sv/apb_collector.sv\n`include "sv/apb_collector.sv" \n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:18: Cannot find include file: sv/apb_master_driver.sv\n`include "sv/apb_master_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:19: Cannot find include file: sv/apb_master_sequencer.sv\n`include "sv/apb_master_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:20: Cannot find include file: sv/apb_master_agent.sv\n`include "sv/apb_master_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:21: Cannot find include file: sv/apb_slave_driver.sv\n`include "sv/apb_slave_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:22: Cannot find include file: sv/apb_slave_sequencer.sv\n`include "sv/apb_slave_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:23: Cannot find include file: sv/apb_slave_agent.sv\n`include "sv/apb_slave_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:24: Cannot find include file: sv/apb_env1.sv\n`include "sv/apb_env1.sv" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:10: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:26: Unsupported: classes\nclass demo_config extends apb_config;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:26: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass demo_config extends apb_config;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:27: Define or directive not defined: \'`uvm_object_utils\'\n `uvm_object_utils(demo_config)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:40: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(demo_tb)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:43: Unsupported: new constructor\n function new(string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:43: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new(string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:56: syntax error, unexpected \'(\', expecting IDENTIFIER\n uvm_test_done.set_drain_time(this, 100);\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:67: syntax error, unexpected \'#\'\n uvm_config_db#(virtual apb_if)::set(null, "*", "vif", apb_if0);\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:68: syntax error, unexpected ::, expecting \';\'\n tb = demo_tb::type_id::create("tb", null);\n ^~\n : ... Perhaps \'demo_tb\' is a package which needs to be predeclared? (IEEE 1800-2017 26.3)\n%Warning-STMTDLY: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:73: Unsupported: Ignoring delay on this delayed statement.\n #100 global_stop_request();\n ^\n ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: Internal Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:9: ../V3ParseSym.h:114: Symbols suggest ending FUNC \'new\' but parser thinks ending MODULE \'test\'\nmodule test;\n ^~~~\n' | 308,366 | module | module test;
import uvm_pkg::*;
`include "uvm_macros.svh"
`include "sv/apb_transfer.sv"
`include "sv/apb_config.sv"
`include "sv/apb_bus_monitor.sv"
`include "sv/apb_monitor.sv"
`include "sv/apb_collector.sv"
`include "sv/apb_master_driver.sv"
`include "sv/apb_master_sequencer.sv"
`include "sv/apb_master_agent.sv"
`include "sv/apb_slave_driver.sv"
`include "sv/apb_slave_sequencer.sv"
`include "sv/apb_slave_agent.sv"
`include "sv/apb_env1.sv"
class demo_config extends apb_config;
`uvm_object_utils(demo_config)
function new(string name = "demo_config");
super.new(name);
add_slave("slave0", 32'h0000_0000, 32'h7FFF_FFFF, 0, UVM_ACTIVE);
add_slave("slave1", 32'h8000_0000, 32'hFFFF_FFFF, 1, UVM_PASSIVE);
add_master("master", UVM_ACTIVE);
endfunction
endclass : demo_config
class demo_tb extends uvm_env;
`uvm_component_utils(demo_tb)
apb_env apb0;
demo_config demo_cfg;
function new(string name, uvm_component parent);
super.new(name, parent);
endfunction : new
virtual function void build_phase(uvm_phase phase);
super.build_phase(phase);
demo_cfg = demo_config::type_id::create("demo_cfg");
uvm_config_object::set(this, "apb0", "cfg", demo_cfg);
apb0 = apb_env::type_id::create("apb0", this);
endfunction : build_phase
function void start_of_simulation_phase(uvm_phase phase);
this.print();
uvm_test_done.set_drain_time(this, 100);
endfunction : start_of_simulation_phase
endclass : demo_tb
bit clk, reset;
apb_if apb_if0 (clk, reset);
demo_tb tb;
initial begin
uvm_config_db#(virtual apb_if)::set(null, "*", "vif", apb_if0);
tb = demo_tb::type_id::create("tb", null);
run_test();
end
initial
#100 global_stop_request();
endmodule | module test; |
import uvm_pkg::*;
`include "uvm_macros.svh"
`include "sv/apb_transfer.sv"
`include "sv/apb_config.sv"
`include "sv/apb_bus_monitor.sv"
`include "sv/apb_monitor.sv"
`include "sv/apb_collector.sv"
`include "sv/apb_master_driver.sv"
`include "sv/apb_master_sequencer.sv"
`include "sv/apb_master_agent.sv"
`include "sv/apb_slave_driver.sv"
`include "sv/apb_slave_sequencer.sv"
`include "sv/apb_slave_agent.sv"
`include "sv/apb_env1.sv"
class demo_config extends apb_config;
`uvm_object_utils(demo_config)
function new(string name = "demo_config");
super.new(name);
add_slave("slave0", 32'h0000_0000, 32'h7FFF_FFFF, 0, UVM_ACTIVE);
add_slave("slave1", 32'h8000_0000, 32'hFFFF_FFFF, 1, UVM_PASSIVE);
add_master("master", UVM_ACTIVE);
endfunction
endclass : demo_config
class demo_tb extends uvm_env;
`uvm_component_utils(demo_tb)
apb_env apb0;
demo_config demo_cfg;
function new(string name, uvm_component parent);
super.new(name, parent);
endfunction : new
virtual function void build_phase(uvm_phase phase);
super.build_phase(phase);
demo_cfg = demo_config::type_id::create("demo_cfg");
uvm_config_object::set(this, "apb0", "cfg", demo_cfg);
apb0 = apb_env::type_id::create("apb0", this);
endfunction : build_phase
function void start_of_simulation_phase(uvm_phase phase);
this.print();
uvm_test_done.set_drain_time(this, 100);
endfunction : start_of_simulation_phase
endclass : demo_tb
bit clk, reset;
apb_if apb_if0 (clk, reset);
demo_tb tb;
initial begin
uvm_config_db#(virtual apb_if)::set(null, "*", "vif", apb_if0);
tb = demo_tb::type_id::create("tb", null);
run_test();
end
initial
#100 global_stop_request();
endmodule | 0 |
140,207 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv | 90,320,290 | ex5-17_apb_tb_build.sv | sv | 76 | 81 | [] | [] | [] | null | line:11: before: "interface" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:8: Cannot find include file: sv/apb_if.sv\n`include "sv/apb_if.sv" \n ^~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.sv\n sv/apb_if.sv\n sv/apb_if.sv.v\n sv/apb_if.sv.sv\n obj_dir/sv/apb_if.sv\n obj_dir/sv/apb_if.sv.v\n obj_dir/sv/apb_if.sv.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:11: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:13: Cannot find include file: sv/apb_transfer.sv\n`include "sv/apb_transfer.sv" \n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:14: Cannot find include file: sv/apb_config.sv\n`include "sv/apb_config.sv" \n ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:15: Cannot find include file: sv/apb_bus_monitor.sv\n`include "sv/apb_bus_monitor.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:16: Cannot find include file: sv/apb_monitor.sv\n`include "sv/apb_monitor.sv" \n ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:17: Cannot find include file: sv/apb_collector.sv\n`include "sv/apb_collector.sv" \n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:18: Cannot find include file: sv/apb_master_driver.sv\n`include "sv/apb_master_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:19: Cannot find include file: sv/apb_master_sequencer.sv\n`include "sv/apb_master_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:20: Cannot find include file: sv/apb_master_agent.sv\n`include "sv/apb_master_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:21: Cannot find include file: sv/apb_slave_driver.sv\n`include "sv/apb_slave_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:22: Cannot find include file: sv/apb_slave_sequencer.sv\n`include "sv/apb_slave_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:23: Cannot find include file: sv/apb_slave_agent.sv\n`include "sv/apb_slave_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:24: Cannot find include file: sv/apb_env1.sv\n`include "sv/apb_env1.sv" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:10: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:26: Unsupported: classes\nclass demo_config extends apb_config;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:26: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass demo_config extends apb_config;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:27: Define or directive not defined: \'`uvm_object_utils\'\n `uvm_object_utils(demo_config)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:40: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(demo_tb)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:43: Unsupported: new constructor\n function new(string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:43: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new(string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:56: syntax error, unexpected \'(\', expecting IDENTIFIER\n uvm_test_done.set_drain_time(this, 100);\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:67: syntax error, unexpected \'#\'\n uvm_config_db#(virtual apb_if)::set(null, "*", "vif", apb_if0);\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:68: syntax error, unexpected ::, expecting \';\'\n tb = demo_tb::type_id::create("tb", null);\n ^~\n : ... Perhaps \'demo_tb\' is a package which needs to be predeclared? (IEEE 1800-2017 26.3)\n%Warning-STMTDLY: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:73: Unsupported: Ignoring delay on this delayed statement.\n #100 global_stop_request();\n ^\n ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: Internal Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:9: ../V3ParseSym.h:114: Symbols suggest ending FUNC \'new\' but parser thinks ending MODULE \'test\'\nmodule test;\n ^~~~\n' | 308,366 | function | function new(string name = "demo_config");
super.new(name);
add_slave("slave0", 32'h0000_0000, 32'h7FFF_FFFF, 0, UVM_ACTIVE);
add_slave("slave1", 32'h8000_0000, 32'hFFFF_FFFF, 1, UVM_PASSIVE);
add_master("master", UVM_ACTIVE);
endfunction | function new(string name = "demo_config"); |
super.new(name);
add_slave("slave0", 32'h0000_0000, 32'h7FFF_FFFF, 0, UVM_ACTIVE);
add_slave("slave1", 32'h8000_0000, 32'hFFFF_FFFF, 1, UVM_PASSIVE);
add_master("master", UVM_ACTIVE);
endfunction | 0 |
140,208 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv | 90,320,290 | ex5-17_apb_tb_build.sv | sv | 76 | 81 | [] | [] | [] | null | line:11: before: "interface" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:8: Cannot find include file: sv/apb_if.sv\n`include "sv/apb_if.sv" \n ^~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.sv\n sv/apb_if.sv\n sv/apb_if.sv.v\n sv/apb_if.sv.sv\n obj_dir/sv/apb_if.sv\n obj_dir/sv/apb_if.sv.v\n obj_dir/sv/apb_if.sv.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:11: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:13: Cannot find include file: sv/apb_transfer.sv\n`include "sv/apb_transfer.sv" \n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:14: Cannot find include file: sv/apb_config.sv\n`include "sv/apb_config.sv" \n ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:15: Cannot find include file: sv/apb_bus_monitor.sv\n`include "sv/apb_bus_monitor.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:16: Cannot find include file: sv/apb_monitor.sv\n`include "sv/apb_monitor.sv" \n ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:17: Cannot find include file: sv/apb_collector.sv\n`include "sv/apb_collector.sv" \n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:18: Cannot find include file: sv/apb_master_driver.sv\n`include "sv/apb_master_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:19: Cannot find include file: sv/apb_master_sequencer.sv\n`include "sv/apb_master_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:20: Cannot find include file: sv/apb_master_agent.sv\n`include "sv/apb_master_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:21: Cannot find include file: sv/apb_slave_driver.sv\n`include "sv/apb_slave_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:22: Cannot find include file: sv/apb_slave_sequencer.sv\n`include "sv/apb_slave_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:23: Cannot find include file: sv/apb_slave_agent.sv\n`include "sv/apb_slave_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:24: Cannot find include file: sv/apb_env1.sv\n`include "sv/apb_env1.sv" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:10: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:26: Unsupported: classes\nclass demo_config extends apb_config;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:26: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass demo_config extends apb_config;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:27: Define or directive not defined: \'`uvm_object_utils\'\n `uvm_object_utils(demo_config)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:40: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(demo_tb)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:43: Unsupported: new constructor\n function new(string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:43: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new(string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:56: syntax error, unexpected \'(\', expecting IDENTIFIER\n uvm_test_done.set_drain_time(this, 100);\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:67: syntax error, unexpected \'#\'\n uvm_config_db#(virtual apb_if)::set(null, "*", "vif", apb_if0);\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:68: syntax error, unexpected ::, expecting \';\'\n tb = demo_tb::type_id::create("tb", null);\n ^~\n : ... Perhaps \'demo_tb\' is a package which needs to be predeclared? (IEEE 1800-2017 26.3)\n%Warning-STMTDLY: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:73: Unsupported: Ignoring delay on this delayed statement.\n #100 global_stop_request();\n ^\n ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: Internal Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:9: ../V3ParseSym.h:114: Symbols suggest ending FUNC \'new\' but parser thinks ending MODULE \'test\'\nmodule test;\n ^~~~\n' | 308,366 | function | function new(string name, uvm_component parent);
super.new(name, parent);
endfunction | function new(string name, uvm_component parent); |
super.new(name, parent);
endfunction | 0 |
140,209 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv | 90,320,290 | ex5-17_apb_tb_build.sv | sv | 76 | 81 | [] | [] | [] | null | line:11: before: "interface" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:8: Cannot find include file: sv/apb_if.sv\n`include "sv/apb_if.sv" \n ^~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.sv\n sv/apb_if.sv\n sv/apb_if.sv.v\n sv/apb_if.sv.sv\n obj_dir/sv/apb_if.sv\n obj_dir/sv/apb_if.sv.v\n obj_dir/sv/apb_if.sv.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:11: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:13: Cannot find include file: sv/apb_transfer.sv\n`include "sv/apb_transfer.sv" \n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:14: Cannot find include file: sv/apb_config.sv\n`include "sv/apb_config.sv" \n ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:15: Cannot find include file: sv/apb_bus_monitor.sv\n`include "sv/apb_bus_monitor.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:16: Cannot find include file: sv/apb_monitor.sv\n`include "sv/apb_monitor.sv" \n ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:17: Cannot find include file: sv/apb_collector.sv\n`include "sv/apb_collector.sv" \n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:18: Cannot find include file: sv/apb_master_driver.sv\n`include "sv/apb_master_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:19: Cannot find include file: sv/apb_master_sequencer.sv\n`include "sv/apb_master_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:20: Cannot find include file: sv/apb_master_agent.sv\n`include "sv/apb_master_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:21: Cannot find include file: sv/apb_slave_driver.sv\n`include "sv/apb_slave_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:22: Cannot find include file: sv/apb_slave_sequencer.sv\n`include "sv/apb_slave_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:23: Cannot find include file: sv/apb_slave_agent.sv\n`include "sv/apb_slave_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:24: Cannot find include file: sv/apb_env1.sv\n`include "sv/apb_env1.sv" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:10: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:26: Unsupported: classes\nclass demo_config extends apb_config;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:26: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass demo_config extends apb_config;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:27: Define or directive not defined: \'`uvm_object_utils\'\n `uvm_object_utils(demo_config)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:40: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(demo_tb)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:43: Unsupported: new constructor\n function new(string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:43: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new(string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:56: syntax error, unexpected \'(\', expecting IDENTIFIER\n uvm_test_done.set_drain_time(this, 100);\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:67: syntax error, unexpected \'#\'\n uvm_config_db#(virtual apb_if)::set(null, "*", "vif", apb_if0);\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:68: syntax error, unexpected ::, expecting \';\'\n tb = demo_tb::type_id::create("tb", null);\n ^~\n : ... Perhaps \'demo_tb\' is a package which needs to be predeclared? (IEEE 1800-2017 26.3)\n%Warning-STMTDLY: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:73: Unsupported: Ignoring delay on this delayed statement.\n #100 global_stop_request();\n ^\n ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: Internal Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:9: ../V3ParseSym.h:114: Symbols suggest ending FUNC \'new\' but parser thinks ending MODULE \'test\'\nmodule test;\n ^~~~\n' | 308,366 | function | function void build_phase(uvm_phase phase);
super.build_phase(phase);
demo_cfg = demo_config::type_id::create("demo_cfg");
uvm_config_object::set(this, "apb0", "cfg", demo_cfg);
apb0 = apb_env::type_id::create("apb0", this);
endfunction | function void build_phase(uvm_phase phase); |
super.build_phase(phase);
demo_cfg = demo_config::type_id::create("demo_cfg");
uvm_config_object::set(this, "apb0", "cfg", demo_cfg);
apb0 = apb_env::type_id::create("apb0", this);
endfunction | 0 |
140,210 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv | 90,320,290 | ex5-17_apb_tb_build.sv | sv | 76 | 81 | [] | [] | [] | null | line:11: before: "interface" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:8: Cannot find include file: sv/apb_if.sv\n`include "sv/apb_if.sv" \n ^~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.sv\n sv/apb_if.sv\n sv/apb_if.sv.v\n sv/apb_if.sv.sv\n obj_dir/sv/apb_if.sv\n obj_dir/sv/apb_if.sv.v\n obj_dir/sv/apb_if.sv.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:11: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:13: Cannot find include file: sv/apb_transfer.sv\n`include "sv/apb_transfer.sv" \n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:14: Cannot find include file: sv/apb_config.sv\n`include "sv/apb_config.sv" \n ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:15: Cannot find include file: sv/apb_bus_monitor.sv\n`include "sv/apb_bus_monitor.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:16: Cannot find include file: sv/apb_monitor.sv\n`include "sv/apb_monitor.sv" \n ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:17: Cannot find include file: sv/apb_collector.sv\n`include "sv/apb_collector.sv" \n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:18: Cannot find include file: sv/apb_master_driver.sv\n`include "sv/apb_master_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:19: Cannot find include file: sv/apb_master_sequencer.sv\n`include "sv/apb_master_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:20: Cannot find include file: sv/apb_master_agent.sv\n`include "sv/apb_master_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:21: Cannot find include file: sv/apb_slave_driver.sv\n`include "sv/apb_slave_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:22: Cannot find include file: sv/apb_slave_sequencer.sv\n`include "sv/apb_slave_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:23: Cannot find include file: sv/apb_slave_agent.sv\n`include "sv/apb_slave_agent.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:24: Cannot find include file: sv/apb_env1.sv\n`include "sv/apb_env1.sv" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:10: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:26: Unsupported: classes\nclass demo_config extends apb_config;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:26: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass demo_config extends apb_config;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:27: Define or directive not defined: \'`uvm_object_utils\'\n `uvm_object_utils(demo_config)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:40: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(demo_tb)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:43: Unsupported: new constructor\n function new(string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:43: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new(string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:56: syntax error, unexpected \'(\', expecting IDENTIFIER\n uvm_test_done.set_drain_time(this, 100);\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:67: syntax error, unexpected \'#\'\n uvm_config_db#(virtual apb_if)::set(null, "*", "vif", apb_if0);\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:68: syntax error, unexpected ::, expecting \';\'\n tb = demo_tb::type_id::create("tb", null);\n ^~\n : ... Perhaps \'demo_tb\' is a package which needs to be predeclared? (IEEE 1800-2017 26.3)\n%Warning-STMTDLY: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:73: Unsupported: Ignoring delay on this delayed statement.\n #100 global_stop_request();\n ^\n ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: Internal Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-17_apb_tb_build.sv:9: ../V3ParseSym.h:114: Symbols suggest ending FUNC \'new\' but parser thinks ending MODULE \'test\'\nmodule test;\n ^~~~\n' | 308,366 | function | function void start_of_simulation_phase(uvm_phase phase);
this.print();
uvm_test_done.set_drain_time(this, 100);
endfunction | function void start_of_simulation_phase(uvm_phase phase); |
this.print();
uvm_test_done.set_drain_time(this, 100);
endfunction | 0 |
140,211 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-18_apb_transfer_seq.sv | 90,320,290 | ex5-18_apb_transfer_seq.sv | sv | 37 | 81 | [] | [] | [] | null | line:8: before: "import" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-18_apb_transfer_seq.sv:9: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.sv\n uvm_macros.svh\n uvm_macros.svh.v\n uvm_macros.svh.sv\n obj_dir/uvm_macros.svh\n obj_dir/uvm_macros.svh.v\n obj_dir/uvm_macros.svh.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-18_apb_transfer_seq.sv:10: Cannot find include file: sv/apb_transfer.sv\n`include "sv/apb_transfer.sv" \n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-18_apb_transfer_seq.sv:8: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-18_apb_transfer_seq.sv:15: Unsupported: classes\nclass apb_transfer_seq extends uvm_sequence #(apb_transfer);\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-18_apb_transfer_seq.sv:15: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_transfer_seq extends uvm_sequence #(apb_transfer);\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-18_apb_transfer_seq.sv:17: Unsupported: new constructor\n function new(string name="apb_transfer_seq");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-18_apb_transfer_seq.sv:18: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-18_apb_transfer_seq.sv:18: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-18_apb_transfer_seq.sv:18: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-18_apb_transfer_seq.sv:21: Define or directive not defined: \'`uvm_object_utils\'\n `uvm_object_utils(apb_transfer_seq)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-18_apb_transfer_seq.sv:21: syntax error, unexpected \'(\'\n `uvm_object_utils(apb_transfer_seq)\n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-18_apb_transfer_seq.sv:25: Define or directive not defined: \'`uvm_info\'\n `uvm_info(get_type_name(), "Starting...", UVM_HIGH)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-18_apb_transfer_seq.sv:25: syntax error, unexpected \',\'\n `uvm_info(get_type_name(), "Starting...", UVM_HIGH)\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-18_apb_transfer_seq.sv:27: Define or directive not defined: \'`uvm_do\'\n `uvm_do(req)\n ^~~~~~~\n%Error: Cannot continue\n' | 308,367 | function | function new(string name="apb_transfer_seq");
super.new(name);
endfunction | function new(string name="apb_transfer_seq"); |
super.new(name);
endfunction | 0 |
140,212 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-19_multi_transfer_seq.sv | 90,320,290 | ex5-19_multi_transfer_seq.sv | sv | 42 | 81 | [] | [] | [] | null | line:8: before: "import" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-19_multi_transfer_seq.sv:9: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.sv\n uvm_macros.svh\n uvm_macros.svh.v\n uvm_macros.svh.sv\n obj_dir/uvm_macros.svh\n obj_dir/uvm_macros.svh.v\n obj_dir/uvm_macros.svh.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-19_multi_transfer_seq.sv:10: Cannot find include file: sv/apb_transfer.sv\n`include "sv/apb_transfer.sv" \n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-19_multi_transfer_seq.sv:11: Cannot find include file: sv/apb_transfer_seq.sv\n`include "sv/apb_transfer_seq.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-19_multi_transfer_seq.sv:8: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-19_multi_transfer_seq.sv:16: Unsupported: classes\nclass multi_apb_transfer_seq extends uvm_sequence #(apb_transfer);\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-19_multi_transfer_seq.sv:16: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass multi_apb_transfer_seq extends uvm_sequence #(apb_transfer);\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-19_multi_transfer_seq.sv:19: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint c_num_seq { num_seq inside {[1:10]}; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-19_multi_transfer_seq.sv:19: syntax error, unexpected IDENTIFIER\n constraint c_num_seq { num_seq inside {[1:10]}; }\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-19_multi_transfer_seq.sv:22: Define or directive not defined: \'`uvm_object_utils\'\n `uvm_object_utils(multi_apb_transfer_seq)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-19_multi_transfer_seq.sv:23: Unsupported: new constructor\n function new(string name="multi_apb_transfer_seq");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-19_multi_transfer_seq.sv:24: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-19_multi_transfer_seq.sv:24: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-19_multi_transfer_seq.sv:24: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-19_multi_transfer_seq.sv:27: syntax error, unexpected virtual\n virtual task body();\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-19_multi_transfer_seq.sv:28: syntax error, unexpected IDENTIFIER\n apb_transfer_seq apb_seq; \n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-19_multi_transfer_seq.sv:31: Unsupported: this\n starting_phase.raise_objection(this, "Starting multi_apb_transfer_seq");\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-19_multi_transfer_seq.sv:35: Define or directive not defined: \'`uvm_do\'\n `uvm_do(apb_seq)\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-19_multi_transfer_seq.sv:38: syntax error, unexpected if\n if (starting_phase != null)\n ^~\n%Error: Exiting due to 18 error(s)\n' | 308,368 | function | function new(string name="multi_apb_transfer_seq");
super.new(name);
endfunction | function new(string name="multi_apb_transfer_seq"); |
super.new(name);
endfunction | 0 |
140,213 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-1_apb_transfer.sv | 90,320,290 | ex5-1_apb_transfer.sv | sv | 61 | 81 | [] | [] | [] | null | line:13: before: ":" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-1_apb_transfer.sv:14: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.sv\n uvm_macros.svh\n uvm_macros.svh.v\n uvm_macros.svh.sv\n obj_dir/uvm_macros.svh\n obj_dir/uvm_macros.svh.v\n obj_dir/uvm_macros.svh.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-1_apb_transfer.sv:13: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-1_apb_transfer.sv:20: Unsupported: classes\nclass apb_transfer extends uvm_sequence_item; \n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-1_apb_transfer.sv:20: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_transfer extends uvm_sequence_item; \n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-1_apb_transfer.sv:28: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint c_default_delay { transmit_delay inside {[0:100]} ; } \n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-1_apb_transfer.sv:29: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint c_default_addr { addr[1:0] == 2\'b00; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-1_apb_transfer.sv:31: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(apb_transfer)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-1_apb_transfer.sv:32: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(addr, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-1_apb_transfer.sv:33: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(data, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-1_apb_transfer.sv:34: Define or directive not defined: \'`uvm_field_enum\'\n `uvm_field_enum(apb_direction_enum, direction, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-1_apb_transfer.sv:35: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(transmit_delay, UVM_DEFAULT|UVM_NOCOMPARE|UVM_NOPACK)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-1_apb_transfer.sv:36: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-1_apb_transfer.sv:49: Unsupported: new with arguments\n my_transfer = new();\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-1_apb_transfer.sv:51: Unsupported: SystemVerilog 2005 reserved word not implemented: \'randomize\'\n void\'(my_transfer.randomize());\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-1_apb_transfer.sv:51: syntax error, unexpected \'(\'\n void\'(my_transfer.randomize());\n ^\n%Error: Internal Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-1_apb_transfer.sv:12: ../V3ParseSym.h:114: Symbols suggest ending CLASS \'apb_transfer\' but parser thinks ending MODULE \'test\'\nmodule test;\n ^~~~\n' | 308,369 | module | module test;
import uvm_pkg::*;
`include "uvm_macros.svh"
typedef enum bit {APB_READ, APB_WRITE} apb_direction_enum;
class apb_transfer extends uvm_sequence_item;
rand bit [31:0] addr;
rand bit [31:0] data;
rand apb_direction_enum direction;
rand int unsigned transmit_delay;
constraint c_default_delay { transmit_delay inside {[0:100]} ; }
constraint c_default_addr { addr[1:0] == 2'b00; }
`uvm_object_utils_begin(apb_transfer)
`uvm_field_int(addr, UVM_DEFAULT)
`uvm_field_int(data, UVM_DEFAULT)
`uvm_field_enum(apb_direction_enum, direction, UVM_DEFAULT)
`uvm_field_int(transmit_delay, UVM_DEFAULT|UVM_NOCOMPARE|UVM_NOPACK)
`uvm_object_utils_end
function new (string name = "apb_transfer");
super.new(name);
endfunction
endclass : apb_transfer
apb_transfer my_transfer;
initial begin
my_transfer = new();
repeat (3) begin
void'(my_transfer.randomize());
my_transfer.print();
end
$display("UVM DEFAULT TREE PRINTER FORMAT:");
my_transfer.print(uvm_default_tree_printer);
$display("UVM DEFAULT LINE PRINTER FORMAT:");
my_transfer.print(uvm_default_line_printer);
end
endmodule | module test; |
import uvm_pkg::*;
`include "uvm_macros.svh"
typedef enum bit {APB_READ, APB_WRITE} apb_direction_enum;
class apb_transfer extends uvm_sequence_item;
rand bit [31:0] addr;
rand bit [31:0] data;
rand apb_direction_enum direction;
rand int unsigned transmit_delay;
constraint c_default_delay { transmit_delay inside {[0:100]} ; }
constraint c_default_addr { addr[1:0] == 2'b00; }
`uvm_object_utils_begin(apb_transfer)
`uvm_field_int(addr, UVM_DEFAULT)
`uvm_field_int(data, UVM_DEFAULT)
`uvm_field_enum(apb_direction_enum, direction, UVM_DEFAULT)
`uvm_field_int(transmit_delay, UVM_DEFAULT|UVM_NOCOMPARE|UVM_NOPACK)
`uvm_object_utils_end
function new (string name = "apb_transfer");
super.new(name);
endfunction
endclass : apb_transfer
apb_transfer my_transfer;
initial begin
my_transfer = new();
repeat (3) begin
void'(my_transfer.randomize());
my_transfer.print();
end
$display("UVM DEFAULT TREE PRINTER FORMAT:");
my_transfer.print(uvm_default_tree_printer);
$display("UVM DEFAULT LINE PRINTER FORMAT:");
my_transfer.print(uvm_default_line_printer);
end
endmodule | 0 |
140,214 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-1_apb_transfer.sv | 90,320,290 | ex5-1_apb_transfer.sv | sv | 61 | 81 | [] | [] | [] | null | line:13: before: ":" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-1_apb_transfer.sv:14: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.sv\n uvm_macros.svh\n uvm_macros.svh.v\n uvm_macros.svh.sv\n obj_dir/uvm_macros.svh\n obj_dir/uvm_macros.svh.v\n obj_dir/uvm_macros.svh.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-1_apb_transfer.sv:13: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-1_apb_transfer.sv:20: Unsupported: classes\nclass apb_transfer extends uvm_sequence_item; \n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-1_apb_transfer.sv:20: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_transfer extends uvm_sequence_item; \n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-1_apb_transfer.sv:28: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint c_default_delay { transmit_delay inside {[0:100]} ; } \n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-1_apb_transfer.sv:29: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint c_default_addr { addr[1:0] == 2\'b00; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-1_apb_transfer.sv:31: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(apb_transfer)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-1_apb_transfer.sv:32: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(addr, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-1_apb_transfer.sv:33: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(data, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-1_apb_transfer.sv:34: Define or directive not defined: \'`uvm_field_enum\'\n `uvm_field_enum(apb_direction_enum, direction, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-1_apb_transfer.sv:35: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(transmit_delay, UVM_DEFAULT|UVM_NOCOMPARE|UVM_NOPACK)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-1_apb_transfer.sv:36: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-1_apb_transfer.sv:49: Unsupported: new with arguments\n my_transfer = new();\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-1_apb_transfer.sv:51: Unsupported: SystemVerilog 2005 reserved word not implemented: \'randomize\'\n void\'(my_transfer.randomize());\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-1_apb_transfer.sv:51: syntax error, unexpected \'(\'\n void\'(my_transfer.randomize());\n ^\n%Error: Internal Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-1_apb_transfer.sv:12: ../V3ParseSym.h:114: Symbols suggest ending CLASS \'apb_transfer\' but parser thinks ending MODULE \'test\'\nmodule test;\n ^~~~\n' | 308,369 | function | function new (string name = "apb_transfer");
super.new(name);
endfunction | function new (string name = "apb_transfer"); |
super.new(name);
endfunction | 0 |
140,215 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-20_sequence_w_params.sv | 90,320,290 | ex5-20_sequence_w_params.sv | sv | 46 | 81 | [] | [] | [] | null | line:8: before: "import" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-20_sequence_w_params.sv:9: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.sv\n uvm_macros.svh\n uvm_macros.svh.v\n uvm_macros.svh.sv\n obj_dir/uvm_macros.svh\n obj_dir/uvm_macros.svh.v\n obj_dir/uvm_macros.svh.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-20_sequence_w_params.sv:10: Cannot find include file: sv/apb_transfer.sv\n`include "sv/apb_transfer.sv" \n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-20_sequence_w_params.sv:8: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-20_sequence_w_params.sv:15: Unsupported: classes\nclass apb_write_read_word_seq extends uvm_sequence #(apb_transfer);\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-20_sequence_w_params.sv:15: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_write_read_word_seq extends uvm_sequence #(apb_transfer);\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-20_sequence_w_params.sv:19: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint c_start_addr { start_addr[1:0] == 2\'b00; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-20_sequence_w_params.sv:19: syntax error, unexpected IDENTIFIER\n constraint c_start_addr { start_addr[1:0] == 2\'b00; }\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-20_sequence_w_params.sv:22: Define or directive not defined: \'`uvm_object_utils\'\n `uvm_object_utils(apb_write_read_word_seq)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-20_sequence_w_params.sv:24: Unsupported: new constructor\n function new(string name="apb_write_read_word_seq");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-20_sequence_w_params.sv:25: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-20_sequence_w_params.sv:25: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-20_sequence_w_params.sv:25: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-20_sequence_w_params.sv:28: syntax error, unexpected virtual\n virtual task body();\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-20_sequence_w_params.sv:29: Define or directive not defined: \'`uvm_info\'\n `uvm_info(get_type_name(), "Starting...", UVM_HIGH)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-20_sequence_w_params.sv:29: syntax error, unexpected \',\'\n `uvm_info(get_type_name(), "Starting...", UVM_HIGH)\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-20_sequence_w_params.sv:31: Define or directive not defined: \'`uvm_do_with\'\n `uvm_do_with(req, { req.addr == start_addr;\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-20_sequence_w_params.sv:32: syntax error, unexpected \';\'\n req.direction == APB_WRITE; })\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-20_sequence_w_params.sv:34: Define or directive not defined: \'`uvm_do_with\'\n `uvm_do_with(req, { req.addr == start_addr;\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-20_sequence_w_params.sv:35: syntax error, unexpected \';\'\n req.direction == APB_READ; })\n ^\n%Error: Cannot continue\n' | 308,370 | function | function new(string name="apb_write_read_word_seq");
super.new(name);
endfunction | function new(string name="apb_write_read_word_seq"); |
super.new(name);
endfunction | 0 |
140,216 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-21_apb_traffic_seq.sv | 90,320,290 | ex5-21_apb_traffic_seq.sv | sv | 40 | 81 | [] | [] | [] | null | line:8: before: "import" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-21_apb_traffic_seq.sv:9: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.sv\n uvm_macros.svh\n uvm_macros.svh.v\n uvm_macros.svh.sv\n obj_dir/uvm_macros.svh\n obj_dir/uvm_macros.svh.v\n obj_dir/uvm_macros.svh.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-21_apb_traffic_seq.sv:10: Cannot find include file: sv/apb_transfer.sv\n`include "sv/apb_transfer.sv" \n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-21_apb_traffic_seq.sv:11: Cannot find include file: sv/apb_transfer_seq.sv\n`include "sv/apb_transfer_seq.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-21_apb_traffic_seq.sv:12: Cannot find include file: sv/multi_apb_transfer_seq.sv\n`include "sv/multi_apb_transfer_seq.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-21_apb_traffic_seq.sv:13: Cannot find include file: sv/apb_write_read_word_seq.sv\n`include "sv/apb_write_read_word_seq.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-21_apb_traffic_seq.sv:8: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-21_apb_traffic_seq.sv:18: Unsupported: classes\nclass apb_traffic_seq extends uvm_sequence #(apb_transfer);\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-21_apb_traffic_seq.sv:18: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_traffic_seq extends uvm_sequence #(apb_transfer);\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-21_apb_traffic_seq.sv:24: Define or directive not defined: \'`uvm_object_utils\'\n `uvm_object_utils(apb_traffic_seq)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-21_apb_traffic_seq.sv:26: Unsupported: new constructor\n function new(string name="apb_traffic_seq");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-21_apb_traffic_seq.sv:27: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-21_apb_traffic_seq.sv:27: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-21_apb_traffic_seq.sv:27: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-21_apb_traffic_seq.sv:31: syntax error, unexpected virtual\n virtual task body();\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-21_apb_traffic_seq.sv:32: Define or directive not defined: \'`uvm_info\'\n `uvm_info(get_type_name(), "Starting...", UVM_HIGH)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-21_apb_traffic_seq.sv:32: syntax error, unexpected \',\'\n `uvm_info(get_type_name(), "Starting...", UVM_HIGH)\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-21_apb_traffic_seq.sv:34: Define or directive not defined: \'`uvm_do_with\'\n `uvm_do_with( wr_rd_seq, { start_addr inside {[\'h0000:\'h1fff]}; } )\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-21_apb_traffic_seq.sv:35: Define or directive not defined: \'`uvm_do_with\'\n `uvm_do_with( multi_seq, { num_seq == 5; } )\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-21_apb_traffic_seq.sv:37: Define or directive not defined: \'`uvm_do_with\'\n `uvm_do_with(wr_rd_seq, { start_addr inside {[\'h2000:\'hffff]};})\n ^~~~~~~~~~~~\n%Error: Cannot continue\n' | 308,372 | function | function new(string name="apb_traffic_seq");
super.new(name);
endfunction | function new(string name="apb_traffic_seq"); |
super.new(name);
endfunction | 0 |
140,217 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-22_sequence_library.sv | 90,320,290 | ex5-22_sequence_library.sv | sv | 38 | 81 | [] | [] | [] | null | line:8: before: "import" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-22_sequence_library.sv:9: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.sv\n uvm_macros.svh\n uvm_macros.svh.v\n uvm_macros.svh.sv\n obj_dir/uvm_macros.svh\n obj_dir/uvm_macros.svh.v\n obj_dir/uvm_macros.svh.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-22_sequence_library.sv:10: Cannot find include file: sv/apb_transfer.sv\n`include "sv/apb_transfer.sv" \n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-22_sequence_library.sv:11: Cannot find include file: sv/apb_transfer_seq.sv\n`include "sv/apb_transfer_seq.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-22_sequence_library.sv:12: Cannot find include file: sv/multi_apb_transfer_seq.sv\n`include "sv/multi_apb_transfer_seq.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-22_sequence_library.sv:13: Cannot find include file: sv/apb_write_read_word_seq.sv\n`include "sv/apb_write_read_word_seq.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-22_sequence_library.sv:14: Cannot find include file: sv/apb_traffic_seq.sv\n`include "sv/apb_traffic_seq.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-22_sequence_library.sv:8: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-22_sequence_library.sv:19: Unsupported: classes\nclass mydut_seq_lib extends uvm_sequence_library #(apb_transfer);\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-22_sequence_library.sv:19: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass mydut_seq_lib extends uvm_sequence_library #(apb_transfer);\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-22_sequence_library.sv:21: Define or directive not defined: \'`uvm_object_utils\'\n `uvm_object_utils(mydut_seq_lib)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-22_sequence_library.sv:22: Define or directive not defined: \'`uvm_sequence_library_utils\'\n `uvm_sequence_library_utils(mydut_seq_lib)\n ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-22_sequence_library.sv:24: Unsupported: new constructor\n function new(string name="mydut_seq_lib");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-22_sequence_library.sv:25: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-22_sequence_library.sv:25: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-22_sequence_library.sv:25: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-22_sequence_library.sv:30: syntax error, unexpected ::, expecting \')\'\n add_sequence(apb_transfer_seq::get_type());\n ^~\n : ... Perhaps \'apb_transfer_seq\' is a package which needs to be predeclared? (IEEE 1800-2017 26.3)\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-22_sequence_library.sv:31: syntax error, unexpected ::, expecting \')\'\n add_sequence(multi_apb_transfer_seq::get_type());\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-22_sequence_library.sv:32: syntax error, unexpected ::, expecting \')\'\n add_sequence(apb_write_read_word_seq::get_type());\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-22_sequence_library.sv:33: syntax error, unexpected ::, expecting \')\'\n add_sequence(apb_traffic_seq::get_type());\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-22_sequence_library.sv:37: syntax error, unexpected endclass\nendclass : mydut_seq_lib\n^~~~~~~~\n%Error: Exiting due to 20 error(s)\n' | 308,373 | function | function new(string name="mydut_seq_lib");
super.new(name);
min_random_count = 1;
max_random_count = 5;
add_sequence(apb_transfer_seq::get_type());
add_sequence(multi_apb_transfer_seq::get_type());
add_sequence(apb_write_read_word_seq::get_type());
add_sequence(apb_traffic_seq::get_type());
init_sequence_library();
endfunction | function new(string name="mydut_seq_lib"); |
super.new(name);
min_random_count = 1;
max_random_count = 5;
add_sequence(apb_transfer_seq::get_type());
add_sequence(multi_apb_transfer_seq::get_type());
add_sequence(apb_write_read_word_seq::get_type());
add_sequence(apb_traffic_seq::get_type());
init_sequence_library();
endfunction | 0 |
140,218 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-23_apb_read_block_seq.sv | 90,320,290 | ex5-23_apb_read_block_seq.sv | sv | 48 | 81 | [] | [] | [] | null | line:8: before: "import" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-23_apb_read_block_seq.sv:9: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.sv\n uvm_macros.svh\n uvm_macros.svh.v\n uvm_macros.svh.sv\n obj_dir/uvm_macros.svh\n obj_dir/uvm_macros.svh.v\n obj_dir/uvm_macros.svh.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-23_apb_read_block_seq.sv:10: Cannot find include file: sv/apb_transfer.sv\n`include "sv/apb_transfer.sv" \n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-23_apb_read_block_seq.sv:8: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-23_apb_read_block_seq.sv:15: Unsupported: classes\nclass apb_read_block_seq extends uvm_sequence #(apb_transfer);\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-23_apb_read_block_seq.sv:15: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_read_block_seq extends uvm_sequence #(apb_transfer);\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-23_apb_read_block_seq.sv:18: syntax error, unexpected rand\n rand int num_seq;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-23_apb_read_block_seq.sv:19: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint c_start_addr { start_addr[1:0] == 2\'b00; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-23_apb_read_block_seq.sv:19: syntax error, unexpected IDENTIFIER\n constraint c_start_addr { start_addr[1:0] == 2\'b00; }\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-23_apb_read_block_seq.sv:20: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint c_num_seq { num_seq inside {[1:10]}; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-23_apb_read_block_seq.sv:23: Define or directive not defined: \'`uvm_object_utils\'\n `uvm_object_utils(apb_read_block_seq)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-23_apb_read_block_seq.sv:24: Unsupported: new constructor\n function new(string name="apb_read_block_seq");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-23_apb_read_block_seq.sv:25: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-23_apb_read_block_seq.sv:25: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-23_apb_read_block_seq.sv:25: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-23_apb_read_block_seq.sv:28: syntax error, unexpected virtual\n virtual task pre_body();\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-23_apb_read_block_seq.sv:31: Unsupported: this\n starting_phase.raise_objection(this, "APB read block");\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-23_apb_read_block_seq.sv:34: syntax error, unexpected virtual\n virtual task body();\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-23_apb_read_block_seq.sv:37: Define or directive not defined: \'`uvm_do_with\'\n `uvm_do_with(req, {req.addr == start_addr;} )\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-23_apb_read_block_seq.sv:37: syntax error, unexpected \',\'\n `uvm_do_with(req, {req.addr == start_addr;} )\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-23_apb_read_block_seq.sv:42: syntax error, unexpected virtual\n virtual task post_body();\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-23_apb_read_block_seq.sv:45: Unsupported: this\n starting_phase.drop_objection(this, "APB read block");\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-23_apb_read_block_seq.sv:47: syntax error, unexpected endclass\nendclass : apb_read_block_seq\n^~~~~~~~\n%Error: Exiting due to 22 error(s)\n' | 308,374 | function | function new(string name="apb_read_block_seq");
super.new(name);
endfunction | function new(string name="apb_read_block_seq"); |
super.new(name);
endfunction | 0 |
140,219 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-24_apb_master_base_seq.sv | 90,320,290 | ex5-24_apb_master_base_seq.sv | sv | 39 | 81 | [] | [] | [] | null | line:8: before: "import" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-24_apb_master_base_seq.sv:9: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.sv\n uvm_macros.svh\n uvm_macros.svh.v\n uvm_macros.svh.sv\n obj_dir/uvm_macros.svh\n obj_dir/uvm_macros.svh.v\n obj_dir/uvm_macros.svh.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-24_apb_master_base_seq.sv:10: Cannot find include file: sv/apb_transfer.sv\n`include "sv/apb_transfer.sv" \n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-24_apb_master_base_seq.sv:11: Cannot find include file: sv/apb_master_sequencer.sv\n`include "sv/apb_master_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-24_apb_master_base_seq.sv:8: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-24_apb_master_base_seq.sv:15: Unsupported: classes\nclass apb_master_base_seq extends uvm_sequence #(apb_transfer);\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-24_apb_master_base_seq.sv:15: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_master_base_seq extends uvm_sequence #(apb_transfer);\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-24_apb_master_base_seq.sv:18: Unsupported: new constructor\n function new(string name="apb_master_base_seq");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-24_apb_master_base_seq.sv:19: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-24_apb_master_base_seq.sv:19: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-24_apb_master_base_seq.sv:19: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-24_apb_master_base_seq.sv:22: Define or directive not defined: \'`uvm_object_utils\'\n `uvm_object_utils(apb_master_base_seq)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-24_apb_master_base_seq.sv:22: syntax error, unexpected \'(\'\n `uvm_object_utils(apb_master_base_seq)\n ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-24_apb_master_base_seq.sv:23: Define or directive not defined: \'`uvm_declare_p_sequencer\'\n `uvm_declare_p_sequencer(apb_master_sequencer)\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-24_apb_master_base_seq.sv:28: Unsupported: this\n starting_phase.raise_objection(this, { "Running sequence \'",\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-24_apb_master_base_seq.sv:32: syntax error, unexpected virtual\n virtual task post_body();\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-24_apb_master_base_seq.sv:35: Unsupported: this\n starting_phase.drop_objection(this, { "Completed sequence \'",\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-24_apb_master_base_seq.sv:38: syntax error, unexpected endclass\nendclass : apb_master_base_seq\n^~~~~~~~\n%Error: Exiting due to 17 error(s)\n' | 308,375 | function | function new(string name="apb_master_base_seq");
super.new(name);
endfunction | function new(string name="apb_master_base_seq"); |
super.new(name);
endfunction | 0 |
140,220 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-25_apb_read_byte_seq.sv | 90,320,290 | ex5-25_apb_read_byte_seq.sv | sv | 34 | 81 | [] | [] | [] | null | line:8: before: "import" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-25_apb_read_byte_seq.sv:9: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.sv\n uvm_macros.svh\n uvm_macros.svh.v\n uvm_macros.svh.sv\n obj_dir/uvm_macros.svh\n obj_dir/uvm_macros.svh.v\n obj_dir/uvm_macros.svh.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-25_apb_read_byte_seq.sv:10: Cannot find include file: sv/apb_transfer.sv\n`include "sv/apb_transfer.sv" \n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-25_apb_read_byte_seq.sv:11: Cannot find include file: sv/apb_master_sequencer.sv\n`include "sv/apb_master_sequencer.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-25_apb_read_byte_seq.sv:12: Cannot find include file: sv/apb_master_base_seq.sv\n`include "sv/apb_master_base_seq.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-25_apb_read_byte_seq.sv:8: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-25_apb_read_byte_seq.sv:17: Unsupported: classes\nclass apb_read_byte_seq extends apb_master_base_seq;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-25_apb_read_byte_seq.sv:17: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_read_byte_seq extends apb_master_base_seq;\n ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-25_apb_read_byte_seq.sv:21: Unsupported: new constructor\n function new(string name="apb_read_byte_seq");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-25_apb_read_byte_seq.sv:22: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-25_apb_read_byte_seq.sv:22: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-25_apb_read_byte_seq.sv:22: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-25_apb_read_byte_seq.sv:26: Define or directive not defined: \'`uvm_object_utils\'\n `uvm_object_utils(apb_read_byte_seq)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-25_apb_read_byte_seq.sv:26: syntax error, unexpected \'(\'\n `uvm_object_utils(apb_read_byte_seq)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-25_apb_read_byte_seq.sv:29: Define or directive not defined: \'`uvm_info\'\n `uvm_info(get_type_name(), "Starting ...", UVM_HIGH)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-25_apb_read_byte_seq.sv:29: syntax error, unexpected \',\'\n `uvm_info(get_type_name(), "Starting ...", UVM_HIGH)\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-25_apb_read_byte_seq.sv:30: Define or directive not defined: \'`uvm_do_with\'\n `uvm_do_with(req, {req.addr == start_addr; req.direction == APB_READ; })\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-25_apb_read_byte_seq.sv:30: syntax error, unexpected \';\'\n `uvm_do_with(req, {req.addr == start_addr; req.direction == APB_READ; })\n ^\n%Error: Cannot continue\n' | 308,376 | function | function new(string name="apb_read_byte_seq");
super.new(name);
endfunction | function new(string name="apb_read_byte_seq"); |
super.new(name);
endfunction | 0 |
140,221 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv | 90,320,290 | ex5-2_apb_transfer1.sv | sv | 72 | 88 | [] | [] | [] | null | line:12: before: ":" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:13: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.sv\n uvm_macros.svh\n uvm_macros.svh.v\n uvm_macros.svh.sv\n obj_dir/uvm_macros.svh\n obj_dir/uvm_macros.svh.v\n obj_dir/uvm_macros.svh.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:12: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:21: Unsupported: classes\nclass apb_transfer extends uvm_sequence_item; \n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:21: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_transfer extends uvm_sequence_item; \n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:31: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint c_addr { addr[1:0] == 2\'b00; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:32: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint c_transmit_delay { solve delay_kind before transmit_delay;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:32: Unsupported: SystemVerilog 2005 reserved word not implemented: \'solve\'\n constraint c_transmit_delay { solve delay_kind before transmit_delay;\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:32: Unsupported: SystemVerilog 2005 reserved word not implemented: \'before\'\n constraint c_transmit_delay { solve delay_kind before transmit_delay;\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:41: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(apb_transfer)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:42: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(addr, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:43: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(data, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:44: Define or directive not defined: \'`uvm_field_enum\'\n `uvm_field_enum(apb_direction_enum, direction, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:45: Define or directive not defined: \'`uvm_field_enum\'\n `uvm_field_enum(apb_dly_enum, delay_kind, UVM_DEFAULT | UVM_NOCOMPARE | UVM_NOPACK)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:46: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(transmit_delay, UVM_DEFAULT | UVM_NOCOMPARE | UVM_NOPACK)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:47: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:59: Unsupported: new with arguments\n my_transfer = new();\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:61: Unsupported: SystemVerilog 2005 reserved word not implemented: \'randomize\'\n void\'(my_transfer.randomize());\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:61: syntax error, unexpected \'(\'\n void\'(my_transfer.randomize());\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:65: Unsupported: SystemVerilog 2005 reserved word not implemented: \'randomize\'\n void\'(my_transfer.randomize() with {delay_kind == MAX;});\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:65: syntax error, unexpected \'(\'\n void\'(my_transfer.randomize() with {delay_kind == MAX;});\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:65: Unsupported: SystemVerilog 2005 reserved word not implemented: \'with\'\n void\'(my_transfer.randomize() with {delay_kind == MAX;});\n ^~~~\n%Error: Internal Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:11: ../V3ParseSym.h:114: Symbols suggest ending CLASS \'apb_transfer\' but parser thinks ending MODULE \'test\'\nmodule test();\n ^~~~\n' | 308,377 | module | module test();
import uvm_pkg::*;
`include "uvm_macros.svh"
typedef enum bit {APB_READ, APB_WRITE} apb_direction_enum;
typedef enum {ZERO, SHORT, MEDIUM, LONG, MAX} apb_dly_enum;
class apb_transfer extends uvm_sequence_item;
rand bit [31:0] addr;
rand bit [31:0] data;
rand apb_direction_enum direction;
rand apb_dly_enum delay_kind;
rand int unsigned transmit_delay;
constraint c_addr { addr[1:0] == 2'b00; }
constraint c_transmit_delay { solve delay_kind before transmit_delay;
transmit_delay >= 0; transmit_delay <= 100 ;
(delay_kind == ZERO) -> transmit_delay == 0;
(delay_kind == SHORT) -> transmit_delay inside {[1:10]};
(delay_kind == MEDIUM) -> transmit_delay inside {[11:29]};
(delay_kind == LONG) -> transmit_delay inside {[30:100]};
(delay_kind == MAX) -> transmit_delay == 100; }
`uvm_object_utils_begin(apb_transfer)
`uvm_field_int(addr, UVM_DEFAULT)
`uvm_field_int(data, UVM_DEFAULT)
`uvm_field_enum(apb_direction_enum, direction, UVM_DEFAULT)
`uvm_field_enum(apb_dly_enum, delay_kind, UVM_DEFAULT | UVM_NOCOMPARE | UVM_NOPACK)
`uvm_field_int(transmit_delay, UVM_DEFAULT | UVM_NOCOMPARE | UVM_NOPACK)
`uvm_object_utils_end
function new (string name = "apb_transfer");
super.new(name);
endfunction
endclass : apb_transfer
apb_transfer my_transfer;
initial begin
my_transfer = new();
repeat (3) begin
void'(my_transfer.randomize());
my_transfer.print();
end
$display("my_transfer.randomize() with {delay_kind == MAX;} : ");
void'(my_transfer.randomize() with {delay_kind == MAX;});
my_transfer.print();
end
endmodule | module test(); |
import uvm_pkg::*;
`include "uvm_macros.svh"
typedef enum bit {APB_READ, APB_WRITE} apb_direction_enum;
typedef enum {ZERO, SHORT, MEDIUM, LONG, MAX} apb_dly_enum;
class apb_transfer extends uvm_sequence_item;
rand bit [31:0] addr;
rand bit [31:0] data;
rand apb_direction_enum direction;
rand apb_dly_enum delay_kind;
rand int unsigned transmit_delay;
constraint c_addr { addr[1:0] == 2'b00; }
constraint c_transmit_delay { solve delay_kind before transmit_delay;
transmit_delay >= 0; transmit_delay <= 100 ;
(delay_kind == ZERO) -> transmit_delay == 0;
(delay_kind == SHORT) -> transmit_delay inside {[1:10]};
(delay_kind == MEDIUM) -> transmit_delay inside {[11:29]};
(delay_kind == LONG) -> transmit_delay inside {[30:100]};
(delay_kind == MAX) -> transmit_delay == 100; }
`uvm_object_utils_begin(apb_transfer)
`uvm_field_int(addr, UVM_DEFAULT)
`uvm_field_int(data, UVM_DEFAULT)
`uvm_field_enum(apb_direction_enum, direction, UVM_DEFAULT)
`uvm_field_enum(apb_dly_enum, delay_kind, UVM_DEFAULT | UVM_NOCOMPARE | UVM_NOPACK)
`uvm_field_int(transmit_delay, UVM_DEFAULT | UVM_NOCOMPARE | UVM_NOPACK)
`uvm_object_utils_end
function new (string name = "apb_transfer");
super.new(name);
endfunction
endclass : apb_transfer
apb_transfer my_transfer;
initial begin
my_transfer = new();
repeat (3) begin
void'(my_transfer.randomize());
my_transfer.print();
end
$display("my_transfer.randomize() with {delay_kind == MAX;} : ");
void'(my_transfer.randomize() with {delay_kind == MAX;});
my_transfer.print();
end
endmodule | 0 |
140,222 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv | 90,320,290 | ex5-2_apb_transfer1.sv | sv | 72 | 88 | [] | [] | [] | null | line:12: before: ":" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:13: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.sv\n uvm_macros.svh\n uvm_macros.svh.v\n uvm_macros.svh.sv\n obj_dir/uvm_macros.svh\n obj_dir/uvm_macros.svh.v\n obj_dir/uvm_macros.svh.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:12: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:21: Unsupported: classes\nclass apb_transfer extends uvm_sequence_item; \n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:21: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_transfer extends uvm_sequence_item; \n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:31: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint c_addr { addr[1:0] == 2\'b00; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:32: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint c_transmit_delay { solve delay_kind before transmit_delay;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:32: Unsupported: SystemVerilog 2005 reserved word not implemented: \'solve\'\n constraint c_transmit_delay { solve delay_kind before transmit_delay;\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:32: Unsupported: SystemVerilog 2005 reserved word not implemented: \'before\'\n constraint c_transmit_delay { solve delay_kind before transmit_delay;\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:41: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(apb_transfer)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:42: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(addr, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:43: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(data, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:44: Define or directive not defined: \'`uvm_field_enum\'\n `uvm_field_enum(apb_direction_enum, direction, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:45: Define or directive not defined: \'`uvm_field_enum\'\n `uvm_field_enum(apb_dly_enum, delay_kind, UVM_DEFAULT | UVM_NOCOMPARE | UVM_NOPACK)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:46: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(transmit_delay, UVM_DEFAULT | UVM_NOCOMPARE | UVM_NOPACK)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:47: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:59: Unsupported: new with arguments\n my_transfer = new();\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:61: Unsupported: SystemVerilog 2005 reserved word not implemented: \'randomize\'\n void\'(my_transfer.randomize());\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:61: syntax error, unexpected \'(\'\n void\'(my_transfer.randomize());\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:65: Unsupported: SystemVerilog 2005 reserved word not implemented: \'randomize\'\n void\'(my_transfer.randomize() with {delay_kind == MAX;});\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:65: syntax error, unexpected \'(\'\n void\'(my_transfer.randomize() with {delay_kind == MAX;});\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:65: Unsupported: SystemVerilog 2005 reserved word not implemented: \'with\'\n void\'(my_transfer.randomize() with {delay_kind == MAX;});\n ^~~~\n%Error: Internal Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-2_apb_transfer1.sv:11: ../V3ParseSym.h:114: Symbols suggest ending CLASS \'apb_transfer\' but parser thinks ending MODULE \'test\'\nmodule test();\n ^~~~\n' | 308,377 | function | function new (string name = "apb_transfer");
super.new(name);
endfunction | function new (string name = "apb_transfer"); |
super.new(name);
endfunction | 0 |
140,223 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-3_apb_transfer_test.sv | 90,320,290 | ex5-3_apb_transfer_test.sv | sv | 44 | 76 | [] | [] | [] | null | line:10: before: "package" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-3_apb_transfer_test.sv:13: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.sv\n uvm_macros.svh\n uvm_macros.svh.v\n uvm_macros.svh.sv\n obj_dir/uvm_macros.svh\n obj_dir/uvm_macros.svh.v\n obj_dir/uvm_macros.svh.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-3_apb_transfer_test.sv:16: Cannot find include file: sv/apb_transfer.sv\n`include "sv/apb_transfer.sv" \n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-3_apb_transfer_test.sv:23: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-3_apb_transfer_test.sv:12: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-3_apb_transfer_test.sv:22: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-3_apb_transfer_test.sv:30: syntax error, unexpected ::, expecting \';\'\n my_xfer = apb_transfer::type_id::create("my_xfer");\n ^~\n : ... Perhaps \'apb_transfer\' is a package which needs to be predeclared? (IEEE 1800-2017 26.3)\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-3_apb_transfer_test.sv:32: Unsupported: SystemVerilog 2005 reserved word not implemented: \'randomize\'\n if (!my_xfer.randomize())\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-3_apb_transfer_test.sv:32: syntax error, unexpected \'(\'\n if (!my_xfer.randomize())\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-3_apb_transfer_test.sv:33: Define or directive not defined: \'`uvm_fatal\'\n `uvm_fatal("RANDFAIL", "Can not randomize my_xfer")\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-3_apb_transfer_test.sv:37: Unsupported: SystemVerilog 2005 reserved word not implemented: \'randomize\'\n if (!my_xfer.randomize() with {addr inside {[\'h0000:\'hFFFF]}; \n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-3_apb_transfer_test.sv:37: syntax error, unexpected \'(\'\n if (!my_xfer.randomize() with {addr inside {[\'h0000:\'hFFFF]}; \n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-3_apb_transfer_test.sv:37: Unsupported: SystemVerilog 2005 reserved word not implemented: \'with\'\n if (!my_xfer.randomize() with {addr inside {[\'h0000:\'hFFFF]}; \n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-3_apb_transfer_test.sv:38: syntax error, unexpected \';\'\n direction == APB_WRITE; })\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-3_apb_transfer_test.sv:39: Define or directive not defined: \'`uvm_fatal\'\n `uvm_fatal("RANDFAIL", "Can not randomize my_xfer")\n ^~~~~~~~~~\n%Error: Exiting due to 14 error(s)\n' | 308,378 | module | module test;
import uvm_pkg::*;
`include "uvm_macros.svh"
import apb_pkg::*;
apb_transfer my_xfer;
initial begin
my_xfer = apb_transfer::type_id::create("my_xfer");
repeat (5) begin
if (!my_xfer.randomize())
`uvm_fatal("RANDFAIL", "Can not randomize my_xfer")
my_xfer.print();
end
if (!my_xfer.randomize() with {addr inside {['h0000:'hFFFF]};
direction == APB_WRITE; })
`uvm_fatal("RANDFAIL", "Can not randomize my_xfer")
my_xfer.print();
end
endmodule | module test; |
import uvm_pkg::*;
`include "uvm_macros.svh"
import apb_pkg::*;
apb_transfer my_xfer;
initial begin
my_xfer = apb_transfer::type_id::create("my_xfer");
repeat (5) begin
if (!my_xfer.randomize())
`uvm_fatal("RANDFAIL", "Can not randomize my_xfer")
my_xfer.print();
end
if (!my_xfer.randomize() with {addr inside {['h0000:'hFFFF]};
direction == APB_WRITE; })
`uvm_fatal("RANDFAIL", "Can not randomize my_xfer")
my_xfer.print();
end
endmodule | 0 |
140,224 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv | 90,320,290 | ex5-4_apb_master_driver.sv | sv | 81 | 112 | [] | [] | [] | null | line:8: before: "import" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:9: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.sv\n uvm_macros.svh\n uvm_macros.svh.v\n uvm_macros.svh.sv\n obj_dir/uvm_macros.svh\n obj_dir/uvm_macros.svh.v\n obj_dir/uvm_macros.svh.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:10: Cannot find include file: sv/apb_if.sv\n`include "sv/apb_if.sv" \n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:11: Cannot find include file: sv/apb_transfer.sv\n`include "sv/apb_transfer.sv" \n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:8: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:16: Unsupported: classes\nclass apb_master_driver extends uvm_driver #(apb_transfer);\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:16: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_master_driver extends uvm_driver #(apb_transfer);\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:19: Unsupported: virtual data type\n virtual apb_if vif;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:22: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(apb_master_driver)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:22: syntax error, unexpected \'(\'\n `uvm_component_utils(apb_master_driver)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:25: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:25: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:29: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern virtual function void connect_phase (uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:30: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern virtual task run_phase (uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:32: syntax error, unexpected extern\n extern virtual protected task reset_signals();\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:43: Unsupported: Hierarchical class references\ntask apb_master_driver::run_phase(uvm_phase phase);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:43: Unsupported: scoped class reference\ntask apb_master_driver::run_phase(uvm_phase phase);\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:31: Unsupported: Out of class block function declaration\n extern virtual protected task get_and_drive();\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:43: syntax error, unexpected IDENTIFIER, expecting \')\'\ntask apb_master_driver::run_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:52: Unsupported: Hierarchical class references\ntask apb_master_driver::get_and_drive();\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:52: Unsupported: scoped class reference\ntask apb_master_driver::get_and_drive();\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:43: Unsupported: Out of class block function declaration\ntask apb_master_driver::run_phase(uvm_phase phase);\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:63: Unsupported: Hierarchical class references\ntask apb_master_driver::reset_signals();\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:63: Unsupported: scoped class reference\ntask apb_master_driver::reset_signals();\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:52: Unsupported: Out of class block function declaration\ntask apb_master_driver::get_and_drive();\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:65: syntax error, unexpected \'@\'\n @(negedge vif.presetn);\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:66: Define or directive not defined: \'`uvm_info\'\n `uvm_info("APB_MASTER_DRIVER", "Reset observed", UVM_MEDIUM)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:66: syntax error, unexpected \',\'\n `uvm_info("APB_MASTER_DRIVER", "Reset observed", UVM_MEDIUM)\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:78: Unsupported: Hierarchical class references\ntask apb_master_driver::drive_transfer (apb_transfer trans);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:78: Unsupported: scoped class reference\ntask apb_master_driver::drive_transfer (apb_transfer trans);\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:63: Unsupported: Out of class block function declaration\ntask apb_master_driver::reset_signals();\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:78: syntax error, unexpected IDENTIFIER, expecting \')\'\ntask apb_master_driver::drive_transfer (apb_transfer trans);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:79: Define or directive not defined: \'`uvm_info\'\n `uvm_info("APB_MASTER_DRIVER", $sformatf("APB Finished Driving Transfer \\n%s", trans.sprint()), UVM_MEDIUM)\n ^~~~~~~~~\n%Error: Exiting due to 32 error(s)\n' | 308,379 | function | function new (string name, uvm_component parent);
super.new(name, parent);
endfunction | function new (string name, uvm_component parent); |
super.new(name, parent);
endfunction | 0 |
140,225 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv | 90,320,290 | ex5-4_apb_master_driver.sv | sv | 81 | 112 | [] | [] | [] | null | line:8: before: "import" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:9: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.sv\n uvm_macros.svh\n uvm_macros.svh.v\n uvm_macros.svh.sv\n obj_dir/uvm_macros.svh\n obj_dir/uvm_macros.svh.v\n obj_dir/uvm_macros.svh.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:10: Cannot find include file: sv/apb_if.sv\n`include "sv/apb_if.sv" \n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:11: Cannot find include file: sv/apb_transfer.sv\n`include "sv/apb_transfer.sv" \n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:8: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:16: Unsupported: classes\nclass apb_master_driver extends uvm_driver #(apb_transfer);\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:16: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_master_driver extends uvm_driver #(apb_transfer);\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:19: Unsupported: virtual data type\n virtual apb_if vif;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:22: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(apb_master_driver)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:22: syntax error, unexpected \'(\'\n `uvm_component_utils(apb_master_driver)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:25: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:25: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:29: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern virtual function void connect_phase (uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:30: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern virtual task run_phase (uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:32: syntax error, unexpected extern\n extern virtual protected task reset_signals();\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:43: Unsupported: Hierarchical class references\ntask apb_master_driver::run_phase(uvm_phase phase);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:43: Unsupported: scoped class reference\ntask apb_master_driver::run_phase(uvm_phase phase);\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:31: Unsupported: Out of class block function declaration\n extern virtual protected task get_and_drive();\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:43: syntax error, unexpected IDENTIFIER, expecting \')\'\ntask apb_master_driver::run_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:52: Unsupported: Hierarchical class references\ntask apb_master_driver::get_and_drive();\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:52: Unsupported: scoped class reference\ntask apb_master_driver::get_and_drive();\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:43: Unsupported: Out of class block function declaration\ntask apb_master_driver::run_phase(uvm_phase phase);\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:63: Unsupported: Hierarchical class references\ntask apb_master_driver::reset_signals();\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:63: Unsupported: scoped class reference\ntask apb_master_driver::reset_signals();\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:52: Unsupported: Out of class block function declaration\ntask apb_master_driver::get_and_drive();\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:65: syntax error, unexpected \'@\'\n @(negedge vif.presetn);\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:66: Define or directive not defined: \'`uvm_info\'\n `uvm_info("APB_MASTER_DRIVER", "Reset observed", UVM_MEDIUM)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:66: syntax error, unexpected \',\'\n `uvm_info("APB_MASTER_DRIVER", "Reset observed", UVM_MEDIUM)\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:78: Unsupported: Hierarchical class references\ntask apb_master_driver::drive_transfer (apb_transfer trans);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:78: Unsupported: scoped class reference\ntask apb_master_driver::drive_transfer (apb_transfer trans);\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:63: Unsupported: Out of class block function declaration\ntask apb_master_driver::reset_signals();\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:78: syntax error, unexpected IDENTIFIER, expecting \')\'\ntask apb_master_driver::drive_transfer (apb_transfer trans);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-4_apb_master_driver.sv:79: Define or directive not defined: \'`uvm_info\'\n `uvm_info("APB_MASTER_DRIVER", $sformatf("APB Finished Driving Transfer \\n%s", trans.sprint()), UVM_MEDIUM)\n ^~~~~~~~~\n%Error: Exiting due to 32 error(s)\n' | 308,379 | function | function void connect_phase (uvm_phase phase);
extern virtual task run_phase (uvm_phase phase);
extern virtual protected task get_and_drive();
extern virtual protected task reset_signals();
extern virtual protected task drive_transfer(apb_transfer trans);
endclass : apb_master_driver
function void apb_master_driver::connect_phase(uvm_phase phase);
endfunction | function void connect_phase (uvm_phase phase); |
extern virtual task run_phase (uvm_phase phase);
extern virtual protected task get_and_drive();
extern virtual protected task reset_signals();
extern virtual protected task drive_transfer(apb_transfer trans);
endclass : apb_master_driver
function void apb_master_driver::connect_phase(uvm_phase phase);
endfunction | 0 |
140,226 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-6a_configure_vif.sv | 90,320,290 | ex5-6a_configure_vif.sv | sv | 25 | 71 | [] | [] | [] | null | line:11: before: "interface" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-6a_configure_vif.sv:8: Cannot find include file: sv/apb_if.sv\n`include "sv/apb_if.sv" \n ^~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.sv\n sv/apb_if.sv\n sv/apb_if.sv.v\n sv/apb_if.sv.sv\n obj_dir/sv/apb_if.sv\n obj_dir/sv/apb_if.sv.v\n obj_dir/sv/apb_if.sv.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-6a_configure_vif.sv:9: Cannot find include file: uvm_pkg.sv\n`include "uvm_pkg.sv" \n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-6a_configure_vif.sv:12: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-6a_configure_vif.sv:11: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-6a_configure_vif.sv:20: syntax error, unexpected \'#\'\n uvm_config_db#(virtual apb_if)::set(null, "*apb0*", "vif", apb_if0);\n ^\n%Error: Exiting due to 5 error(s)\n' | 308,381 | module | module test;
import uvm_pkg::*;
`include "uvm_macros.svh"
bit clk, resetn;
apb_if apb_if0 (clk, resetn);
initial begin
uvm_config_db#(virtual apb_if)::set(null, "*apb0*", "vif", apb_if0);
end
endmodule | module test; |
import uvm_pkg::*;
`include "uvm_macros.svh"
bit clk, resetn;
apb_if apb_if0 (clk, resetn);
initial begin
uvm_config_db#(virtual apb_if)::set(null, "*apb0*", "vif", apb_if0);
end
endmodule | 0 |
140,227 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-6b_test_driver.sv | 90,320,290 | ex5-6b_test_driver.sv | sv | 31 | 73 | [] | [] | [] | null | line:11: before: "interface" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-6b_test_driver.sv:8: Cannot find include file: sv/apb_if.sv\n`include "sv/apb_if.sv" \n ^~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/sv/apb_if.sv.sv\n sv/apb_if.sv\n sv/apb_if.sv.v\n sv/apb_if.sv.sv\n obj_dir/sv/apb_if.sv\n obj_dir/sv/apb_if.sv.v\n obj_dir/sv/apb_if.sv.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-6b_test_driver.sv:11: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-6b_test_driver.sv:13: Cannot find include file: sv/apb_transfer.sv\n`include "sv/apb_transfer.sv" \n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-6b_test_driver.sv:14: Cannot find include file: sv/apb_master_driver.sv\n`include "sv/apb_master_driver.sv" \n ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-6b_test_driver.sv:10: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-6b_test_driver.sv:25: syntax error, unexpected \'#\'\n uvm_config_db#(virtual apb_if)::set(null, "*", "vif", apb_if0);\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-6b_test_driver.sv:26: syntax error, unexpected ::, expecting \';\'\n driver = apb_master_driver::type_id::create("driver", null);\n ^~\n : ... Perhaps \'apb_master_driver\' is a package which needs to be predeclared? (IEEE 1800-2017 26.3)\n%Error: Exiting due to 7 error(s)\n' | 308,382 | module | module test;
import uvm_pkg::*;
`include "uvm_macros.svh"
`include "sv/apb_transfer.sv"
`include "sv/apb_master_driver.sv"
bit clk, resetn;
apb_if apb_if0 (clk, resetn);
apb_master_driver driver;
initial begin
uvm_config_db#(virtual apb_if)::set(null, "*", "vif", apb_if0);
driver = apb_master_driver::type_id::create("driver", null);
driver.vif = apb_if0;
end
endmodule | module test; |
import uvm_pkg::*;
`include "uvm_macros.svh"
`include "sv/apb_transfer.sv"
`include "sv/apb_master_driver.sv"
bit clk, resetn;
apb_if apb_if0 (clk, resetn);
apb_master_driver driver;
initial begin
uvm_config_db#(virtual apb_if)::set(null, "*", "vif", apb_if0);
driver = apb_master_driver::type_id::create("driver", null);
driver.vif = apb_if0;
end
endmodule | 0 |
140,228 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-7_generator.sv | 90,320,290 | ex5-7_generator.sv | sv | 41 | 66 | [] | [] | [] | null | line:7: before: ":" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-7_generator.sv:8: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.sv\n uvm_macros.svh\n uvm_macros.svh.v\n uvm_macros.svh.sv\n obj_dir/uvm_macros.svh\n obj_dir/uvm_macros.svh.v\n obj_dir/uvm_macros.svh.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-7_generator.sv:9: Cannot find include file: sv/apb_transfer.sv\n`include "sv/apb_transfer.sv" \n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-7_generator.sv:7: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-7_generator.sv:11: Unsupported: classes\nclass generator;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-7_generator.sv:14: syntax error, unexpected IDENTIFIER\n apb_transfer transfer;\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-7_generator.sv:16: syntax error, unexpected IDENTIFIER, expecting \')\'\n task get_next_item(output apb_transfer trans);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-7_generator.sv:19: Unsupported: SystemVerilog 2005 reserved word not implemented: \'randomize\'\n if (!transfer.randomize())\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-7_generator.sv:20: Define or directive not defined: \'`uvm_fatal\'\n `uvm_fatal("RANDFAIL", "Failure to randomize transfer")\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-7_generator.sv:24: Define or directive not defined: \'`uvm_warning\'\n else `uvm_warning("MAXCNT", "Maximum transfer count reached")\n ^~~~~~~~~~~~\n%Error: Cannot continue\n' | 308,384 | module | module test();
import uvm_pkg::*;
`include "uvm_macros.svh"
`include "sv/apb_transfer.sv"
class generator;
rand int max_count = 3;
int count;
apb_transfer transfer;
task get_next_item(output apb_transfer trans);
if (count <= max_count) begin
transfer = apb_transfer::type_id::create("transfer");
if (!transfer.randomize())
`uvm_fatal("RANDFAIL", "Failure to randomize transfer")
trans = transfer;
count++;
end
else `uvm_warning("MAXCNT", "Maximum transfer count reached")
endtask : get_next_item
endclass : generator
generator my_gen;
apb_transfer trans;
initial begin
my_gen = new();
repeat (4) begin
my_gen.get_next_item(trans);
if (trans != null) trans.print();
end
end
endmodule | module test(); |
import uvm_pkg::*;
`include "uvm_macros.svh"
`include "sv/apb_transfer.sv"
class generator;
rand int max_count = 3;
int count;
apb_transfer transfer;
task get_next_item(output apb_transfer trans);
if (count <= max_count) begin
transfer = apb_transfer::type_id::create("transfer");
if (!transfer.randomize())
`uvm_fatal("RANDFAIL", "Failure to randomize transfer")
trans = transfer;
count++;
end
else `uvm_warning("MAXCNT", "Maximum transfer count reached")
endtask : get_next_item
endclass : generator
generator my_gen;
apb_transfer trans;
initial begin
my_gen = new();
repeat (4) begin
my_gen.get_next_item(trans);
if (trans != null) trans.print();
end
end
endmodule | 0 |
140,229 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv | 90,320,290 | ex5-8a_driver_sequencer.sv | sv | 93 | 94 | [] | [] | [] | null | line:9: before: ":" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:10: Cannot find include file: uvm_macros.svh\n `include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.sv\n uvm_macros.svh\n uvm_macros.svh.v\n uvm_macros.svh.sv\n obj_dir/uvm_macros.svh\n obj_dir/uvm_macros.svh.v\n obj_dir/uvm_macros.svh.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:9: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\n import uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:13: Unsupported: classes\n class simple_transfer extends uvm_sequence_item;\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:13: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\n class simple_transfer extends uvm_sequence_item;\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:16: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(simple_transfer)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:16: syntax error, unexpected \'(\'\n `uvm_object_utils_begin(simple_transfer)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:17: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(question, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:18: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(answer, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:19: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:26: Define or directive not defined: \'`uvm_object_utils\'\n `uvm_object_utils(simple_seq)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:33: syntax error, unexpected \'(\', expecting IDENTIFIER\n starting_phase.raise_objection(this, "simple_seq");\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:34: Define or directive not defined: \'`uvm_do\'\n `uvm_do(req)\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:41: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(simple_sequencer)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:48: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:48: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:51: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(simple_driver)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:61: syntax error, unexpected \'(\', expecting IDENTIFIER\n seq_item_port.item_done();\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:67: syntax error, unexpected \'=\', expecting IDENTIFIER\n trans.answer = trans.question + 1;\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:68: syntax error, unexpected \'(\', expecting IDENTIFIER\n trans.print();\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:77: Define or directive not defined: \'`uvm_info\'\n `uvm_info("TOP", "Beginning test...", UVM_LOW)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:77: syntax error, unexpected \',\'\n `uvm_info("TOP", "Beginning test...", UVM_LOW)\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:79: Unsupported: new with arguments\n s_sequencer0 = new("s_sequencer0", null); s_sequencer0.build_phase(null);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:80: Unsupported: new with arguments\n s_driver0 = new("s_driver0", null); s_driver0.build_phase(null);\n ^~~\n%Warning-STMTDLY: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:88: Unsupported: Ignoring delay on this delayed statement.\n #10000;\n ^\n ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: Internal Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:8: ../V3ParseSym.h:114: Symbols suggest ending FUNC \'new\' but parser thinks ending MODULE \'test\'\nmodule test;\n ^~~~\n' | 308,385 | module | module test;
import uvm_pkg::*;
`include "uvm_macros.svh"
class simple_transfer extends uvm_sequence_item;
rand int question;
int answer;
`uvm_object_utils_begin(simple_transfer)
`uvm_field_int(question, UVM_DEFAULT)
`uvm_field_int(answer, UVM_DEFAULT)
`uvm_object_utils_end
function new (string name="simple_transfer");
super.new(name);
endfunction : new
endclass : simple_transfer
class simple_seq extends uvm_sequence #(simple_transfer);
`uvm_object_utils(simple_seq)
function new (string name="simple_seq");
super.new(name);
endfunction : new
virtual task body();
starting_phase.raise_objection(this, "simple_seq");
`uvm_do(req)
starting_phase.drop_objection(this, "simple_seq");
endtask : body
endclass : simple_seq
class simple_sequencer extends uvm_sequencer #(simple_transfer);
`uvm_component_utils(simple_sequencer)
function new (string name, uvm_component parent);
super.new(name, parent);
endfunction : new
endclass
class simple_driver extends uvm_driver #(simple_transfer);
function new (string name, uvm_component parent);
super.new(name, parent);
endfunction : new
`uvm_component_utils(simple_driver)
task run_phase(uvm_phase phase);
get_and_drive();
endtask : run_phase
task get_and_drive();
while (1) begin
seq_item_port.get_next_item(req);
send_to_dut(req);
seq_item_port.item_done();
end
endtask
task send_to_dut(simple_transfer trans);
trans.answer = trans.question + 1;
trans.print();
endtask : send_to_dut
endclass
simple_sequencer s_sequencer0;
simple_driver s_driver0;
initial begin
`uvm_info("TOP", "Beginning test...", UVM_LOW)
uvm_config_string::set(null, "s_sequencer0.run_phase", "default_sequence", "simple_seq");
s_sequencer0 = new("s_sequencer0", null); s_sequencer0.build_phase(null);
s_driver0 = new("s_driver0", null); s_driver0.build_phase(null);
s_driver0.seq_item_port.connect(s_sequencer0.seq_item_export);
s_driver0.rsp_port.connect(s_sequencer0.rsp_export);
s_sequencer0.print(); s_driver0.print();
run_test();
end
initial begin
#10000;
global_stop_request();
end
endmodule | module test; |
import uvm_pkg::*;
`include "uvm_macros.svh"
class simple_transfer extends uvm_sequence_item;
rand int question;
int answer;
`uvm_object_utils_begin(simple_transfer)
`uvm_field_int(question, UVM_DEFAULT)
`uvm_field_int(answer, UVM_DEFAULT)
`uvm_object_utils_end
function new (string name="simple_transfer");
super.new(name);
endfunction : new
endclass : simple_transfer
class simple_seq extends uvm_sequence #(simple_transfer);
`uvm_object_utils(simple_seq)
function new (string name="simple_seq");
super.new(name);
endfunction : new
virtual task body();
starting_phase.raise_objection(this, "simple_seq");
`uvm_do(req)
starting_phase.drop_objection(this, "simple_seq");
endtask : body
endclass : simple_seq
class simple_sequencer extends uvm_sequencer #(simple_transfer);
`uvm_component_utils(simple_sequencer)
function new (string name, uvm_component parent);
super.new(name, parent);
endfunction : new
endclass
class simple_driver extends uvm_driver #(simple_transfer);
function new (string name, uvm_component parent);
super.new(name, parent);
endfunction : new
`uvm_component_utils(simple_driver)
task run_phase(uvm_phase phase);
get_and_drive();
endtask : run_phase
task get_and_drive();
while (1) begin
seq_item_port.get_next_item(req);
send_to_dut(req);
seq_item_port.item_done();
end
endtask
task send_to_dut(simple_transfer trans);
trans.answer = trans.question + 1;
trans.print();
endtask : send_to_dut
endclass
simple_sequencer s_sequencer0;
simple_driver s_driver0;
initial begin
`uvm_info("TOP", "Beginning test...", UVM_LOW)
uvm_config_string::set(null, "s_sequencer0.run_phase", "default_sequence", "simple_seq");
s_sequencer0 = new("s_sequencer0", null); s_sequencer0.build_phase(null);
s_driver0 = new("s_driver0", null); s_driver0.build_phase(null);
s_driver0.seq_item_port.connect(s_sequencer0.seq_item_export);
s_driver0.rsp_port.connect(s_sequencer0.rsp_export);
s_sequencer0.print(); s_driver0.print();
run_test();
end
initial begin
#10000;
global_stop_request();
end
endmodule | 0 |
140,230 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv | 90,320,290 | ex5-8a_driver_sequencer.sv | sv | 93 | 94 | [] | [] | [] | null | line:9: before: ":" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:10: Cannot find include file: uvm_macros.svh\n `include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.sv\n uvm_macros.svh\n uvm_macros.svh.v\n uvm_macros.svh.sv\n obj_dir/uvm_macros.svh\n obj_dir/uvm_macros.svh.v\n obj_dir/uvm_macros.svh.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:9: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\n import uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:13: Unsupported: classes\n class simple_transfer extends uvm_sequence_item;\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:13: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\n class simple_transfer extends uvm_sequence_item;\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:16: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(simple_transfer)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:16: syntax error, unexpected \'(\'\n `uvm_object_utils_begin(simple_transfer)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:17: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(question, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:18: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(answer, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:19: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:26: Define or directive not defined: \'`uvm_object_utils\'\n `uvm_object_utils(simple_seq)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:33: syntax error, unexpected \'(\', expecting IDENTIFIER\n starting_phase.raise_objection(this, "simple_seq");\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:34: Define or directive not defined: \'`uvm_do\'\n `uvm_do(req)\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:41: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(simple_sequencer)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:48: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:48: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:51: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(simple_driver)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:61: syntax error, unexpected \'(\', expecting IDENTIFIER\n seq_item_port.item_done();\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:67: syntax error, unexpected \'=\', expecting IDENTIFIER\n trans.answer = trans.question + 1;\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:68: syntax error, unexpected \'(\', expecting IDENTIFIER\n trans.print();\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:77: Define or directive not defined: \'`uvm_info\'\n `uvm_info("TOP", "Beginning test...", UVM_LOW)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:77: syntax error, unexpected \',\'\n `uvm_info("TOP", "Beginning test...", UVM_LOW)\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:79: Unsupported: new with arguments\n s_sequencer0 = new("s_sequencer0", null); s_sequencer0.build_phase(null);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:80: Unsupported: new with arguments\n s_driver0 = new("s_driver0", null); s_driver0.build_phase(null);\n ^~~\n%Warning-STMTDLY: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:88: Unsupported: Ignoring delay on this delayed statement.\n #10000;\n ^\n ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: Internal Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:8: ../V3ParseSym.h:114: Symbols suggest ending FUNC \'new\' but parser thinks ending MODULE \'test\'\nmodule test;\n ^~~~\n' | 308,385 | function | function new (string name="simple_transfer");
super.new(name);
endfunction | function new (string name="simple_transfer"); |
super.new(name);
endfunction | 0 |
140,231 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv | 90,320,290 | ex5-8a_driver_sequencer.sv | sv | 93 | 94 | [] | [] | [] | null | line:9: before: ":" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:10: Cannot find include file: uvm_macros.svh\n `include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.sv\n uvm_macros.svh\n uvm_macros.svh.v\n uvm_macros.svh.sv\n obj_dir/uvm_macros.svh\n obj_dir/uvm_macros.svh.v\n obj_dir/uvm_macros.svh.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:9: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\n import uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:13: Unsupported: classes\n class simple_transfer extends uvm_sequence_item;\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:13: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\n class simple_transfer extends uvm_sequence_item;\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:16: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(simple_transfer)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:16: syntax error, unexpected \'(\'\n `uvm_object_utils_begin(simple_transfer)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:17: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(question, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:18: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(answer, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:19: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:26: Define or directive not defined: \'`uvm_object_utils\'\n `uvm_object_utils(simple_seq)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:33: syntax error, unexpected \'(\', expecting IDENTIFIER\n starting_phase.raise_objection(this, "simple_seq");\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:34: Define or directive not defined: \'`uvm_do\'\n `uvm_do(req)\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:41: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(simple_sequencer)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:48: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:48: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:51: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(simple_driver)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:61: syntax error, unexpected \'(\', expecting IDENTIFIER\n seq_item_port.item_done();\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:67: syntax error, unexpected \'=\', expecting IDENTIFIER\n trans.answer = trans.question + 1;\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:68: syntax error, unexpected \'(\', expecting IDENTIFIER\n trans.print();\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:77: Define or directive not defined: \'`uvm_info\'\n `uvm_info("TOP", "Beginning test...", UVM_LOW)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:77: syntax error, unexpected \',\'\n `uvm_info("TOP", "Beginning test...", UVM_LOW)\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:79: Unsupported: new with arguments\n s_sequencer0 = new("s_sequencer0", null); s_sequencer0.build_phase(null);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:80: Unsupported: new with arguments\n s_driver0 = new("s_driver0", null); s_driver0.build_phase(null);\n ^~~\n%Warning-STMTDLY: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:88: Unsupported: Ignoring delay on this delayed statement.\n #10000;\n ^\n ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: Internal Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:8: ../V3ParseSym.h:114: Symbols suggest ending FUNC \'new\' but parser thinks ending MODULE \'test\'\nmodule test;\n ^~~~\n' | 308,385 | function | function new (string name="simple_seq");
super.new(name);
endfunction | function new (string name="simple_seq"); |
super.new(name);
endfunction | 0 |
140,232 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv | 90,320,290 | ex5-8a_driver_sequencer.sv | sv | 93 | 94 | [] | [] | [] | null | line:9: before: ":" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:10: Cannot find include file: uvm_macros.svh\n `include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.sv\n uvm_macros.svh\n uvm_macros.svh.v\n uvm_macros.svh.sv\n obj_dir/uvm_macros.svh\n obj_dir/uvm_macros.svh.v\n obj_dir/uvm_macros.svh.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:9: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\n import uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:13: Unsupported: classes\n class simple_transfer extends uvm_sequence_item;\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:13: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\n class simple_transfer extends uvm_sequence_item;\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:16: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(simple_transfer)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:16: syntax error, unexpected \'(\'\n `uvm_object_utils_begin(simple_transfer)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:17: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(question, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:18: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(answer, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:19: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:26: Define or directive not defined: \'`uvm_object_utils\'\n `uvm_object_utils(simple_seq)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:33: syntax error, unexpected \'(\', expecting IDENTIFIER\n starting_phase.raise_objection(this, "simple_seq");\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:34: Define or directive not defined: \'`uvm_do\'\n `uvm_do(req)\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:41: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(simple_sequencer)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:48: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:48: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:51: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(simple_driver)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:61: syntax error, unexpected \'(\', expecting IDENTIFIER\n seq_item_port.item_done();\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:67: syntax error, unexpected \'=\', expecting IDENTIFIER\n trans.answer = trans.question + 1;\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:68: syntax error, unexpected \'(\', expecting IDENTIFIER\n trans.print();\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:77: Define or directive not defined: \'`uvm_info\'\n `uvm_info("TOP", "Beginning test...", UVM_LOW)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:77: syntax error, unexpected \',\'\n `uvm_info("TOP", "Beginning test...", UVM_LOW)\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:79: Unsupported: new with arguments\n s_sequencer0 = new("s_sequencer0", null); s_sequencer0.build_phase(null);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:80: Unsupported: new with arguments\n s_driver0 = new("s_driver0", null); s_driver0.build_phase(null);\n ^~~\n%Warning-STMTDLY: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:88: Unsupported: Ignoring delay on this delayed statement.\n #10000;\n ^\n ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: Internal Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8a_driver_sequencer.sv:8: ../V3ParseSym.h:114: Symbols suggest ending FUNC \'new\' but parser thinks ending MODULE \'test\'\nmodule test;\n ^~~~\n' | 308,385 | function | function new (string name, uvm_component parent);
super.new(name, parent);
endfunction | function new (string name, uvm_component parent); |
super.new(name, parent);
endfunction | 0 |
140,234 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8_apb_master_sequencer.sv | 90,320,290 | ex5-8_apb_master_sequencer.sv | sv | 26 | 81 | [] | [] | [] | null | line:8: before: "import" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8_apb_master_sequencer.sv:9: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.sv\n uvm_macros.svh\n uvm_macros.svh.v\n uvm_macros.svh.sv\n obj_dir/uvm_macros.svh\n obj_dir/uvm_macros.svh.v\n obj_dir/uvm_macros.svh.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8_apb_master_sequencer.sv:10: Cannot find include file: sv/apb_transfer.sv\n`include "sv/apb_transfer.sv" \n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8_apb_master_sequencer.sv:8: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8_apb_master_sequencer.sv:15: Unsupported: classes\nclass apb_master_sequencer extends uvm_sequencer #(apb_transfer);\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8_apb_master_sequencer.sv:15: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_master_sequencer extends uvm_sequencer #(apb_transfer);\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8_apb_master_sequencer.sv:18: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(apb_master_sequencer)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8_apb_master_sequencer.sv:21: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-8_apb_master_sequencer.sv:21: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: Exiting due to 8 error(s)\n' | 308,386 | function | function new (string name, uvm_component parent);
super.new(name, parent);
endfunction | function new (string name, uvm_component parent); |
super.new(name, parent);
endfunction | 0 |
140,235 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv | 90,320,290 | ex5-9_simple_pipe_driver.sv | sv | 194 | 157 | [] | [] | [] | null | line:7: before: ":" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:8: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.sv\n uvm_macros.svh\n uvm_macros.svh.v\n uvm_macros.svh.sv\n obj_dir/uvm_macros.svh\n obj_dir/uvm_macros.svh.v\n obj_dir/uvm_macros.svh.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:7: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:11: Unsupported: classes\nclass simple_transfer extends uvm_sequence_item;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:11: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass simple_transfer extends uvm_sequence_item;\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:14: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(simple_transfer)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:14: syntax error, unexpected \'(\'\n `uvm_object_utils_begin(simple_transfer)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:15: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(question, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:16: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(answer, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:17: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:24: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(simple_sequencer)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:32: syntax error, unexpected rand\n rand int unsigned num_s_req;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:35: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint c_num_p_req { num_p_req inside {1,2,3,4}; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:36: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint c_num_s_req { num_s_req inside {1,2,3,4}; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:41: Unsupported: new constructor\n function new(string name="pipeline_seq");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:42: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:42: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:42: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:44: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(pipeline_seq)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:44: syntax error, unexpected \'(\'\n `uvm_object_utils_begin(pipeline_seq)\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:45: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(num_s_req, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:46: Define or directive not defined: \'`uvm_field_queue_object\'\n `uvm_field_queue_object(s_req_list, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:47: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:50: Define or directive not defined: \'`uvm_info\'\n `uvm_info("pipeline_seq", "Starting...", UVM_LOW)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:61: Unsupported or unknown PLI call: $cast\n $cast(temp_item, this_item.clone());\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:61: syntax error, unexpected ${ignored-bbox-sys}\n $cast(temp_item, this_item.clone());\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:62: syntax error, unexpected \'(\', expecting IDENTIFIER\n temp_item.set_id_info(this_item);\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:63: Unsupported or unknown PLI call: $cast\n if($cast(t_s_req, temp_item))\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:64: syntax error, unexpected \'(\', expecting IDENTIFIER\n s_req_list.push_front(t_s_req);\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:66: Define or directive not defined: \'`uvm_error\'\n : ... Suggested alternative: \'`error\'\n `uvm_error("CASTFAIL", "ERROR!")\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:70: Define or directive not defined: \'`uvm_info\'\n `uvm_info("send_requests", $sformatf("%0d s_req items will be sent.", num_s_req), UVM_LOW)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:72: Unsupported: SystemVerilog 2005 reserved word not implemented: \'randomize\'\n assert(std::randomize(delay_s_req) with { delay_s_req < 200; });\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:72: Unsupported: SystemVerilog 2005 reserved word not implemented: \'with\'\n assert(std::randomize(delay_s_req) with { delay_s_req < 200; });\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:74: Define or directive not defined: \'`uvm_info\'\n `uvm_info("send_requests", $sformatf("Sending s_req #%0d...", i), UVM_LOW)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:75: Define or directive not defined: \'`uvm_do\'\n `uvm_do(s_req)\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:83: syntax error, unexpected int, expecting IDENTIFIER or genvar\n for (int i = 0; i < num_s_req + num_p_req; i++) begin\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:85: Unsupported or unknown PLI call: $cast\n if ($cast(temp_s_rsp, t_uvs)) begin \n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:86: syntax error, unexpected int, expecting IDENTIFIER or genvar\n for (int i = 0; i < s_req_list.size(); i++) begin\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:89: Define or directive not defined: \'`uvm_info\'\n `uvm_info("process_responses", $sformatf("Simple Request/Response pair for...\\n%s\\n%s", s_req_list[i].sprint(), temp_s_rsp.sprint()), UVM_LOW)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:93: Define or directive not defined: \'`uvm_error\'\n : ... Suggested alternative: \'`error\'\n `uvm_error("process_responses", "ERROR -- simple question answer mismatch")\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:93: syntax error, unexpected \'(\'\n `uvm_error("process_responses", "ERROR -- simple question answer mismatch")\n ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:97: Define or directive not defined: \'`uvm_error\'\n : ... Suggested alternative: \'`error\'\n `uvm_error("process_responses", "ERROR -- unexpected response type")\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:103: syntax error, unexpected \'(\', expecting IDENTIFIER\n starting_phase.raise_objection(this, {"Running sequence \'",\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:109: syntax error, unexpected \'(\', expecting IDENTIFIER\n starting_phase.drop_objection(this, {"Completed sequence \'",\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:118: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:118: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:121: Define or directive not defined: \'`uvm_component_utils_begin\'\n `uvm_component_utils_begin(simple_driver)\n ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:122: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(max_pipeline_depth, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:123: Define or directive not defined: \'`uvm_field_queue_object\'\n `uvm_field_queue_object(req_list, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:124: Define or directive not defined: \'`uvm_component_utils_end\'\n `uvm_component_utils_end\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:136: Define or directive not defined: \'`uvm_info\'\n `uvm_info("get_and_drive", {"has a req\\n", req.sprint()}, UVM_LOW)\n ^~~~~~~~~\n%Error: Exiting due to too many errors encountered; --error-limit=50\n' | 308,387 | module | module test;
import uvm_pkg::*;
`include "uvm_macros.svh"
class simple_transfer extends uvm_sequence_item;
rand int question;
int answer;
`uvm_object_utils_begin(simple_transfer)
`uvm_field_int(question, UVM_DEFAULT)
`uvm_field_int(answer, UVM_DEFAULT)
`uvm_object_utils_end
function new (string name="simple_transfer");
super.new(name);
endfunction : new
endclass : simple_transfer
class simple_sequencer extends uvm_sequencer #(simple_transfer);
`uvm_component_utils(simple_sequencer)
function new (string name, uvm_component parent);
super.new(name, parent);
endfunction : new
endclass
class pipeline_seq extends uvm_sequence;
simple_transfer s_req_list [$];
rand int unsigned num_s_req;
rand simple_transfer s_req;
rand int unsigned num_p_req;
constraint c_num_p_req { num_p_req inside {1,2,3,4}; }
constraint c_num_s_req { num_s_req inside {1,2,3,4}; }
int unsigned delay_p_req;
int unsigned delay_s_req;
function new(string name="pipeline_seq");
super.new(name);
endfunction
`uvm_object_utils_begin(pipeline_seq)
`uvm_field_int(num_s_req, UVM_DEFAULT)
`uvm_field_queue_object(s_req_list, UVM_DEFAULT)
`uvm_object_utils_end
virtual task body();
`uvm_info("pipeline_seq", "Starting...", UVM_LOW)
#10;
fork
send_requests();
process_responses();
join
endtask
function void post_do(uvm_sequence_item this_item);
uvm_sequence_item temp_item;
simple_transfer t_s_req;
$cast(temp_item, this_item.clone());
temp_item.set_id_info(this_item);
if($cast(t_s_req, temp_item))
s_req_list.push_front(t_s_req);
else
`uvm_error("CASTFAIL", "ERROR!")
endfunction
task send_requests();
`uvm_info("send_requests", $sformatf("%0d s_req items will be sent.", num_s_req), UVM_LOW)
for(int i = 0; i < num_s_req; i++) begin
assert(std::randomize(delay_s_req) with { delay_s_req < 200; });
#delay_s_req;
`uvm_info("send_requests", $sformatf("Sending s_req #%0d...", i), UVM_LOW)
`uvm_do(s_req)
end
endtask
task process_responses();
uvm_sequence_item t_uvs;
simple_transfer temp_s_req;
simple_transfer temp_s_rsp;
for (int i = 0; i < num_s_req + num_p_req; i++) begin
get_response(t_uvs);
if ($cast(temp_s_rsp, t_uvs)) begin
for (int i = 0; i < s_req_list.size(); i++) begin
if(temp_s_rsp.get_transaction_id() == s_req_list[i].get_transaction_id())
assert(temp_s_rsp.answer == s_req_list[i].question + 1) begin
`uvm_info("process_responses", $sformatf("Simple Request/Response pair for...\n%s\n%s", s_req_list[i].sprint(), temp_s_rsp.sprint()), UVM_LOW)
s_req_list.delete(i);
end
else
`uvm_error("process_responses", "ERROR -- simple question answer mismatch")
end
end
else
`uvm_error("process_responses", "ERROR -- unexpected response type")
end
endtask
virtual task pre_body();
if (starting_phase != null)
starting_phase.raise_objection(this, {"Running sequence '",
get_full_name(), "'"});
endtask
virtual task post_body();
if (starting_phase != null)
starting_phase.drop_objection(this, {"Completed sequence '",
get_full_name(), "'"});
endtask
endclass : pipeline_seq
class simple_driver extends uvm_driver #(simple_transfer);
simple_transfer req_list [$];
int max_pipeline_depth=2;
function new (string name, uvm_component parent);
super.new(name, parent);
endfunction : new
`uvm_component_utils_begin(simple_driver)
`uvm_field_int(max_pipeline_depth, UVM_DEFAULT)
`uvm_field_queue_object(req_list, UVM_DEFAULT)
`uvm_component_utils_end
task run_phase(uvm_phase phase);
fork
get_and_drive();
drive_transfers();
join
endtask : run_phase
task get_and_drive();
while (req_list.size() < max_pipeline_depth) begin
seq_item_port.get_next_item(req);
`uvm_info("get_and_drive", {"has a req\n", req.sprint()}, UVM_LOW)
$cast(rsp, req.clone());
rsp.set_id_info(req);
req_list.push_front(rsp);
seq_item_port.item_done();
end
endtask : get_and_drive
task drive_transfers();
simple_transfer cur_req;
while (1) begin
wait (req_list.size()>0)
cur_req = req_list.pop_back();
send_to_dut(cur_req);
rsp_port.write(cur_req);
end
endtask : drive_transfers
task send_to_dut(simple_transfer trans);
trans.answer = trans.question + 1;
endtask : send_to_dut
endclass
class simple_test extends uvm_test;
simple_sequencer sequencer;
simple_driver driver;
`uvm_component_utils(simple_test)
function new(string name="simple_test", uvm_component parent);
super.new(name, parent);
endfunction : new
function void build_phase(uvm_phase phase);
uvm_config_wrapper::set(this, "sequencer.run_phase", "default_sequence", pipeline_seq::get_type());
sequencer = simple_sequencer::type_id::create("sequencer", this);
driver = simple_driver::type_id::create("driver", this);
endfunction : build_phase
function void connect_phase(uvm_phase phase);
driver.seq_item_port.connect(sequencer.seq_item_export);
driver.rsp_port.connect(sequencer.rsp_export);
endfunction : connect_phase
function void start_of_simulation_phase(uvm_phase phase);
this.print();
endfunction : start_of_simulation_phase
endclass : simple_test
initial begin
`uvm_info("TOP", "Beginning test...", UVM_LOW)
end
endmodule | module test; |
import uvm_pkg::*;
`include "uvm_macros.svh"
class simple_transfer extends uvm_sequence_item;
rand int question;
int answer;
`uvm_object_utils_begin(simple_transfer)
`uvm_field_int(question, UVM_DEFAULT)
`uvm_field_int(answer, UVM_DEFAULT)
`uvm_object_utils_end
function new (string name="simple_transfer");
super.new(name);
endfunction : new
endclass : simple_transfer
class simple_sequencer extends uvm_sequencer #(simple_transfer);
`uvm_component_utils(simple_sequencer)
function new (string name, uvm_component parent);
super.new(name, parent);
endfunction : new
endclass
class pipeline_seq extends uvm_sequence;
simple_transfer s_req_list [$];
rand int unsigned num_s_req;
rand simple_transfer s_req;
rand int unsigned num_p_req;
constraint c_num_p_req { num_p_req inside {1,2,3,4}; }
constraint c_num_s_req { num_s_req inside {1,2,3,4}; }
int unsigned delay_p_req;
int unsigned delay_s_req;
function new(string name="pipeline_seq");
super.new(name);
endfunction
`uvm_object_utils_begin(pipeline_seq)
`uvm_field_int(num_s_req, UVM_DEFAULT)
`uvm_field_queue_object(s_req_list, UVM_DEFAULT)
`uvm_object_utils_end
virtual task body();
`uvm_info("pipeline_seq", "Starting...", UVM_LOW)
#10;
fork
send_requests();
process_responses();
join
endtask
function void post_do(uvm_sequence_item this_item);
uvm_sequence_item temp_item;
simple_transfer t_s_req;
$cast(temp_item, this_item.clone());
temp_item.set_id_info(this_item);
if($cast(t_s_req, temp_item))
s_req_list.push_front(t_s_req);
else
`uvm_error("CASTFAIL", "ERROR!")
endfunction
task send_requests();
`uvm_info("send_requests", $sformatf("%0d s_req items will be sent.", num_s_req), UVM_LOW)
for(int i = 0; i < num_s_req; i++) begin
assert(std::randomize(delay_s_req) with { delay_s_req < 200; });
#delay_s_req;
`uvm_info("send_requests", $sformatf("Sending s_req #%0d...", i), UVM_LOW)
`uvm_do(s_req)
end
endtask
task process_responses();
uvm_sequence_item t_uvs;
simple_transfer temp_s_req;
simple_transfer temp_s_rsp;
for (int i = 0; i < num_s_req + num_p_req; i++) begin
get_response(t_uvs);
if ($cast(temp_s_rsp, t_uvs)) begin
for (int i = 0; i < s_req_list.size(); i++) begin
if(temp_s_rsp.get_transaction_id() == s_req_list[i].get_transaction_id())
assert(temp_s_rsp.answer == s_req_list[i].question + 1) begin
`uvm_info("process_responses", $sformatf("Simple Request/Response pair for...\n%s\n%s", s_req_list[i].sprint(), temp_s_rsp.sprint()), UVM_LOW)
s_req_list.delete(i);
end
else
`uvm_error("process_responses", "ERROR -- simple question answer mismatch")
end
end
else
`uvm_error("process_responses", "ERROR -- unexpected response type")
end
endtask
virtual task pre_body();
if (starting_phase != null)
starting_phase.raise_objection(this, {"Running sequence '",
get_full_name(), "'"});
endtask
virtual task post_body();
if (starting_phase != null)
starting_phase.drop_objection(this, {"Completed sequence '",
get_full_name(), "'"});
endtask
endclass : pipeline_seq
class simple_driver extends uvm_driver #(simple_transfer);
simple_transfer req_list [$];
int max_pipeline_depth=2;
function new (string name, uvm_component parent);
super.new(name, parent);
endfunction : new
`uvm_component_utils_begin(simple_driver)
`uvm_field_int(max_pipeline_depth, UVM_DEFAULT)
`uvm_field_queue_object(req_list, UVM_DEFAULT)
`uvm_component_utils_end
task run_phase(uvm_phase phase);
fork
get_and_drive();
drive_transfers();
join
endtask : run_phase
task get_and_drive();
while (req_list.size() < max_pipeline_depth) begin
seq_item_port.get_next_item(req);
`uvm_info("get_and_drive", {"has a req\n", req.sprint()}, UVM_LOW)
$cast(rsp, req.clone());
rsp.set_id_info(req);
req_list.push_front(rsp);
seq_item_port.item_done();
end
endtask : get_and_drive
task drive_transfers();
simple_transfer cur_req;
while (1) begin
wait (req_list.size()>0)
cur_req = req_list.pop_back();
send_to_dut(cur_req);
rsp_port.write(cur_req);
end
endtask : drive_transfers
task send_to_dut(simple_transfer trans);
trans.answer = trans.question + 1;
endtask : send_to_dut
endclass
class simple_test extends uvm_test;
simple_sequencer sequencer;
simple_driver driver;
`uvm_component_utils(simple_test)
function new(string name="simple_test", uvm_component parent);
super.new(name, parent);
endfunction : new
function void build_phase(uvm_phase phase);
uvm_config_wrapper::set(this, "sequencer.run_phase", "default_sequence", pipeline_seq::get_type());
sequencer = simple_sequencer::type_id::create("sequencer", this);
driver = simple_driver::type_id::create("driver", this);
endfunction : build_phase
function void connect_phase(uvm_phase phase);
driver.seq_item_port.connect(sequencer.seq_item_export);
driver.rsp_port.connect(sequencer.rsp_export);
endfunction : connect_phase
function void start_of_simulation_phase(uvm_phase phase);
this.print();
endfunction : start_of_simulation_phase
endclass : simple_test
initial begin
`uvm_info("TOP", "Beginning test...", UVM_LOW)
end
endmodule | 0 |
140,236 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv | 90,320,290 | ex5-9_simple_pipe_driver.sv | sv | 194 | 157 | [] | [] | [] | null | line:7: before: ":" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:8: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.sv\n uvm_macros.svh\n uvm_macros.svh.v\n uvm_macros.svh.sv\n obj_dir/uvm_macros.svh\n obj_dir/uvm_macros.svh.v\n obj_dir/uvm_macros.svh.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:7: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:11: Unsupported: classes\nclass simple_transfer extends uvm_sequence_item;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:11: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass simple_transfer extends uvm_sequence_item;\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:14: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(simple_transfer)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:14: syntax error, unexpected \'(\'\n `uvm_object_utils_begin(simple_transfer)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:15: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(question, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:16: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(answer, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:17: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:24: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(simple_sequencer)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:32: syntax error, unexpected rand\n rand int unsigned num_s_req;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:35: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint c_num_p_req { num_p_req inside {1,2,3,4}; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:36: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint c_num_s_req { num_s_req inside {1,2,3,4}; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:41: Unsupported: new constructor\n function new(string name="pipeline_seq");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:42: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:42: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:42: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:44: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(pipeline_seq)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:44: syntax error, unexpected \'(\'\n `uvm_object_utils_begin(pipeline_seq)\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:45: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(num_s_req, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:46: Define or directive not defined: \'`uvm_field_queue_object\'\n `uvm_field_queue_object(s_req_list, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:47: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:50: Define or directive not defined: \'`uvm_info\'\n `uvm_info("pipeline_seq", "Starting...", UVM_LOW)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:61: Unsupported or unknown PLI call: $cast\n $cast(temp_item, this_item.clone());\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:61: syntax error, unexpected ${ignored-bbox-sys}\n $cast(temp_item, this_item.clone());\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:62: syntax error, unexpected \'(\', expecting IDENTIFIER\n temp_item.set_id_info(this_item);\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:63: Unsupported or unknown PLI call: $cast\n if($cast(t_s_req, temp_item))\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:64: syntax error, unexpected \'(\', expecting IDENTIFIER\n s_req_list.push_front(t_s_req);\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:66: Define or directive not defined: \'`uvm_error\'\n : ... Suggested alternative: \'`error\'\n `uvm_error("CASTFAIL", "ERROR!")\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:70: Define or directive not defined: \'`uvm_info\'\n `uvm_info("send_requests", $sformatf("%0d s_req items will be sent.", num_s_req), UVM_LOW)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:72: Unsupported: SystemVerilog 2005 reserved word not implemented: \'randomize\'\n assert(std::randomize(delay_s_req) with { delay_s_req < 200; });\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:72: Unsupported: SystemVerilog 2005 reserved word not implemented: \'with\'\n assert(std::randomize(delay_s_req) with { delay_s_req < 200; });\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:74: Define or directive not defined: \'`uvm_info\'\n `uvm_info("send_requests", $sformatf("Sending s_req #%0d...", i), UVM_LOW)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:75: Define or directive not defined: \'`uvm_do\'\n `uvm_do(s_req)\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:83: syntax error, unexpected int, expecting IDENTIFIER or genvar\n for (int i = 0; i < num_s_req + num_p_req; i++) begin\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:85: Unsupported or unknown PLI call: $cast\n if ($cast(temp_s_rsp, t_uvs)) begin \n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:86: syntax error, unexpected int, expecting IDENTIFIER or genvar\n for (int i = 0; i < s_req_list.size(); i++) begin\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:89: Define or directive not defined: \'`uvm_info\'\n `uvm_info("process_responses", $sformatf("Simple Request/Response pair for...\\n%s\\n%s", s_req_list[i].sprint(), temp_s_rsp.sprint()), UVM_LOW)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:93: Define or directive not defined: \'`uvm_error\'\n : ... Suggested alternative: \'`error\'\n `uvm_error("process_responses", "ERROR -- simple question answer mismatch")\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:93: syntax error, unexpected \'(\'\n `uvm_error("process_responses", "ERROR -- simple question answer mismatch")\n ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:97: Define or directive not defined: \'`uvm_error\'\n : ... Suggested alternative: \'`error\'\n `uvm_error("process_responses", "ERROR -- unexpected response type")\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:103: syntax error, unexpected \'(\', expecting IDENTIFIER\n starting_phase.raise_objection(this, {"Running sequence \'",\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:109: syntax error, unexpected \'(\', expecting IDENTIFIER\n starting_phase.drop_objection(this, {"Completed sequence \'",\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:118: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:118: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:121: Define or directive not defined: \'`uvm_component_utils_begin\'\n `uvm_component_utils_begin(simple_driver)\n ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:122: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(max_pipeline_depth, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:123: Define or directive not defined: \'`uvm_field_queue_object\'\n `uvm_field_queue_object(req_list, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:124: Define or directive not defined: \'`uvm_component_utils_end\'\n `uvm_component_utils_end\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:136: Define or directive not defined: \'`uvm_info\'\n `uvm_info("get_and_drive", {"has a req\\n", req.sprint()}, UVM_LOW)\n ^~~~~~~~~\n%Error: Exiting due to too many errors encountered; --error-limit=50\n' | 308,387 | function | function new (string name="simple_transfer");
super.new(name);
endfunction | function new (string name="simple_transfer"); |
super.new(name);
endfunction | 0 |
140,237 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv | 90,320,290 | ex5-9_simple_pipe_driver.sv | sv | 194 | 157 | [] | [] | [] | null | line:7: before: ":" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:8: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.sv\n uvm_macros.svh\n uvm_macros.svh.v\n uvm_macros.svh.sv\n obj_dir/uvm_macros.svh\n obj_dir/uvm_macros.svh.v\n obj_dir/uvm_macros.svh.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:7: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:11: Unsupported: classes\nclass simple_transfer extends uvm_sequence_item;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:11: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass simple_transfer extends uvm_sequence_item;\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:14: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(simple_transfer)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:14: syntax error, unexpected \'(\'\n `uvm_object_utils_begin(simple_transfer)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:15: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(question, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:16: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(answer, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:17: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:24: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(simple_sequencer)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:32: syntax error, unexpected rand\n rand int unsigned num_s_req;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:35: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint c_num_p_req { num_p_req inside {1,2,3,4}; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:36: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint c_num_s_req { num_s_req inside {1,2,3,4}; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:41: Unsupported: new constructor\n function new(string name="pipeline_seq");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:42: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:42: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:42: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:44: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(pipeline_seq)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:44: syntax error, unexpected \'(\'\n `uvm_object_utils_begin(pipeline_seq)\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:45: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(num_s_req, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:46: Define or directive not defined: \'`uvm_field_queue_object\'\n `uvm_field_queue_object(s_req_list, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:47: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:50: Define or directive not defined: \'`uvm_info\'\n `uvm_info("pipeline_seq", "Starting...", UVM_LOW)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:61: Unsupported or unknown PLI call: $cast\n $cast(temp_item, this_item.clone());\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:61: syntax error, unexpected ${ignored-bbox-sys}\n $cast(temp_item, this_item.clone());\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:62: syntax error, unexpected \'(\', expecting IDENTIFIER\n temp_item.set_id_info(this_item);\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:63: Unsupported or unknown PLI call: $cast\n if($cast(t_s_req, temp_item))\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:64: syntax error, unexpected \'(\', expecting IDENTIFIER\n s_req_list.push_front(t_s_req);\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:66: Define or directive not defined: \'`uvm_error\'\n : ... Suggested alternative: \'`error\'\n `uvm_error("CASTFAIL", "ERROR!")\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:70: Define or directive not defined: \'`uvm_info\'\n `uvm_info("send_requests", $sformatf("%0d s_req items will be sent.", num_s_req), UVM_LOW)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:72: Unsupported: SystemVerilog 2005 reserved word not implemented: \'randomize\'\n assert(std::randomize(delay_s_req) with { delay_s_req < 200; });\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:72: Unsupported: SystemVerilog 2005 reserved word not implemented: \'with\'\n assert(std::randomize(delay_s_req) with { delay_s_req < 200; });\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:74: Define or directive not defined: \'`uvm_info\'\n `uvm_info("send_requests", $sformatf("Sending s_req #%0d...", i), UVM_LOW)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:75: Define or directive not defined: \'`uvm_do\'\n `uvm_do(s_req)\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:83: syntax error, unexpected int, expecting IDENTIFIER or genvar\n for (int i = 0; i < num_s_req + num_p_req; i++) begin\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:85: Unsupported or unknown PLI call: $cast\n if ($cast(temp_s_rsp, t_uvs)) begin \n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:86: syntax error, unexpected int, expecting IDENTIFIER or genvar\n for (int i = 0; i < s_req_list.size(); i++) begin\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:89: Define or directive not defined: \'`uvm_info\'\n `uvm_info("process_responses", $sformatf("Simple Request/Response pair for...\\n%s\\n%s", s_req_list[i].sprint(), temp_s_rsp.sprint()), UVM_LOW)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:93: Define or directive not defined: \'`uvm_error\'\n : ... Suggested alternative: \'`error\'\n `uvm_error("process_responses", "ERROR -- simple question answer mismatch")\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:93: syntax error, unexpected \'(\'\n `uvm_error("process_responses", "ERROR -- simple question answer mismatch")\n ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:97: Define or directive not defined: \'`uvm_error\'\n : ... Suggested alternative: \'`error\'\n `uvm_error("process_responses", "ERROR -- unexpected response type")\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:103: syntax error, unexpected \'(\', expecting IDENTIFIER\n starting_phase.raise_objection(this, {"Running sequence \'",\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:109: syntax error, unexpected \'(\', expecting IDENTIFIER\n starting_phase.drop_objection(this, {"Completed sequence \'",\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:118: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:118: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:121: Define or directive not defined: \'`uvm_component_utils_begin\'\n `uvm_component_utils_begin(simple_driver)\n ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:122: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(max_pipeline_depth, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:123: Define or directive not defined: \'`uvm_field_queue_object\'\n `uvm_field_queue_object(req_list, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:124: Define or directive not defined: \'`uvm_component_utils_end\'\n `uvm_component_utils_end\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:136: Define or directive not defined: \'`uvm_info\'\n `uvm_info("get_and_drive", {"has a req\\n", req.sprint()}, UVM_LOW)\n ^~~~~~~~~\n%Error: Exiting due to too many errors encountered; --error-limit=50\n' | 308,387 | function | function new (string name, uvm_component parent);
super.new(name, parent);
endfunction | function new (string name, uvm_component parent); |
super.new(name, parent);
endfunction | 0 |
140,238 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv | 90,320,290 | ex5-9_simple_pipe_driver.sv | sv | 194 | 157 | [] | [] | [] | null | line:7: before: ":" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:8: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.sv\n uvm_macros.svh\n uvm_macros.svh.v\n uvm_macros.svh.sv\n obj_dir/uvm_macros.svh\n obj_dir/uvm_macros.svh.v\n obj_dir/uvm_macros.svh.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:7: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:11: Unsupported: classes\nclass simple_transfer extends uvm_sequence_item;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:11: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass simple_transfer extends uvm_sequence_item;\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:14: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(simple_transfer)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:14: syntax error, unexpected \'(\'\n `uvm_object_utils_begin(simple_transfer)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:15: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(question, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:16: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(answer, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:17: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:24: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(simple_sequencer)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:32: syntax error, unexpected rand\n rand int unsigned num_s_req;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:35: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint c_num_p_req { num_p_req inside {1,2,3,4}; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:36: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint c_num_s_req { num_s_req inside {1,2,3,4}; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:41: Unsupported: new constructor\n function new(string name="pipeline_seq");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:42: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:42: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:42: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:44: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(pipeline_seq)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:44: syntax error, unexpected \'(\'\n `uvm_object_utils_begin(pipeline_seq)\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:45: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(num_s_req, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:46: Define or directive not defined: \'`uvm_field_queue_object\'\n `uvm_field_queue_object(s_req_list, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:47: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:50: Define or directive not defined: \'`uvm_info\'\n `uvm_info("pipeline_seq", "Starting...", UVM_LOW)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:61: Unsupported or unknown PLI call: $cast\n $cast(temp_item, this_item.clone());\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:61: syntax error, unexpected ${ignored-bbox-sys}\n $cast(temp_item, this_item.clone());\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:62: syntax error, unexpected \'(\', expecting IDENTIFIER\n temp_item.set_id_info(this_item);\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:63: Unsupported or unknown PLI call: $cast\n if($cast(t_s_req, temp_item))\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:64: syntax error, unexpected \'(\', expecting IDENTIFIER\n s_req_list.push_front(t_s_req);\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:66: Define or directive not defined: \'`uvm_error\'\n : ... Suggested alternative: \'`error\'\n `uvm_error("CASTFAIL", "ERROR!")\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:70: Define or directive not defined: \'`uvm_info\'\n `uvm_info("send_requests", $sformatf("%0d s_req items will be sent.", num_s_req), UVM_LOW)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:72: Unsupported: SystemVerilog 2005 reserved word not implemented: \'randomize\'\n assert(std::randomize(delay_s_req) with { delay_s_req < 200; });\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:72: Unsupported: SystemVerilog 2005 reserved word not implemented: \'with\'\n assert(std::randomize(delay_s_req) with { delay_s_req < 200; });\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:74: Define or directive not defined: \'`uvm_info\'\n `uvm_info("send_requests", $sformatf("Sending s_req #%0d...", i), UVM_LOW)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:75: Define or directive not defined: \'`uvm_do\'\n `uvm_do(s_req)\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:83: syntax error, unexpected int, expecting IDENTIFIER or genvar\n for (int i = 0; i < num_s_req + num_p_req; i++) begin\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:85: Unsupported or unknown PLI call: $cast\n if ($cast(temp_s_rsp, t_uvs)) begin \n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:86: syntax error, unexpected int, expecting IDENTIFIER or genvar\n for (int i = 0; i < s_req_list.size(); i++) begin\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:89: Define or directive not defined: \'`uvm_info\'\n `uvm_info("process_responses", $sformatf("Simple Request/Response pair for...\\n%s\\n%s", s_req_list[i].sprint(), temp_s_rsp.sprint()), UVM_LOW)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:93: Define or directive not defined: \'`uvm_error\'\n : ... Suggested alternative: \'`error\'\n `uvm_error("process_responses", "ERROR -- simple question answer mismatch")\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:93: syntax error, unexpected \'(\'\n `uvm_error("process_responses", "ERROR -- simple question answer mismatch")\n ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:97: Define or directive not defined: \'`uvm_error\'\n : ... Suggested alternative: \'`error\'\n `uvm_error("process_responses", "ERROR -- unexpected response type")\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:103: syntax error, unexpected \'(\', expecting IDENTIFIER\n starting_phase.raise_objection(this, {"Running sequence \'",\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:109: syntax error, unexpected \'(\', expecting IDENTIFIER\n starting_phase.drop_objection(this, {"Completed sequence \'",\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:118: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:118: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:121: Define or directive not defined: \'`uvm_component_utils_begin\'\n `uvm_component_utils_begin(simple_driver)\n ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:122: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(max_pipeline_depth, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:123: Define or directive not defined: \'`uvm_field_queue_object\'\n `uvm_field_queue_object(req_list, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:124: Define or directive not defined: \'`uvm_component_utils_end\'\n `uvm_component_utils_end\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:136: Define or directive not defined: \'`uvm_info\'\n `uvm_info("get_and_drive", {"has a req\\n", req.sprint()}, UVM_LOW)\n ^~~~~~~~~\n%Error: Exiting due to too many errors encountered; --error-limit=50\n' | 308,387 | function | function new(string name="pipeline_seq");
super.new(name);
endfunction | function new(string name="pipeline_seq"); |
super.new(name);
endfunction | 0 |
140,239 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv | 90,320,290 | ex5-9_simple_pipe_driver.sv | sv | 194 | 157 | [] | [] | [] | null | line:7: before: ":" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:8: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.sv\n uvm_macros.svh\n uvm_macros.svh.v\n uvm_macros.svh.sv\n obj_dir/uvm_macros.svh\n obj_dir/uvm_macros.svh.v\n obj_dir/uvm_macros.svh.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:7: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:11: Unsupported: classes\nclass simple_transfer extends uvm_sequence_item;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:11: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass simple_transfer extends uvm_sequence_item;\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:14: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(simple_transfer)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:14: syntax error, unexpected \'(\'\n `uvm_object_utils_begin(simple_transfer)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:15: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(question, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:16: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(answer, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:17: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:24: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(simple_sequencer)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:32: syntax error, unexpected rand\n rand int unsigned num_s_req;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:35: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint c_num_p_req { num_p_req inside {1,2,3,4}; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:36: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint c_num_s_req { num_s_req inside {1,2,3,4}; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:41: Unsupported: new constructor\n function new(string name="pipeline_seq");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:42: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:42: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:42: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:44: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(pipeline_seq)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:44: syntax error, unexpected \'(\'\n `uvm_object_utils_begin(pipeline_seq)\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:45: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(num_s_req, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:46: Define or directive not defined: \'`uvm_field_queue_object\'\n `uvm_field_queue_object(s_req_list, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:47: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:50: Define or directive not defined: \'`uvm_info\'\n `uvm_info("pipeline_seq", "Starting...", UVM_LOW)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:61: Unsupported or unknown PLI call: $cast\n $cast(temp_item, this_item.clone());\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:61: syntax error, unexpected ${ignored-bbox-sys}\n $cast(temp_item, this_item.clone());\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:62: syntax error, unexpected \'(\', expecting IDENTIFIER\n temp_item.set_id_info(this_item);\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:63: Unsupported or unknown PLI call: $cast\n if($cast(t_s_req, temp_item))\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:64: syntax error, unexpected \'(\', expecting IDENTIFIER\n s_req_list.push_front(t_s_req);\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:66: Define or directive not defined: \'`uvm_error\'\n : ... Suggested alternative: \'`error\'\n `uvm_error("CASTFAIL", "ERROR!")\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:70: Define or directive not defined: \'`uvm_info\'\n `uvm_info("send_requests", $sformatf("%0d s_req items will be sent.", num_s_req), UVM_LOW)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:72: Unsupported: SystemVerilog 2005 reserved word not implemented: \'randomize\'\n assert(std::randomize(delay_s_req) with { delay_s_req < 200; });\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:72: Unsupported: SystemVerilog 2005 reserved word not implemented: \'with\'\n assert(std::randomize(delay_s_req) with { delay_s_req < 200; });\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:74: Define or directive not defined: \'`uvm_info\'\n `uvm_info("send_requests", $sformatf("Sending s_req #%0d...", i), UVM_LOW)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:75: Define or directive not defined: \'`uvm_do\'\n `uvm_do(s_req)\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:83: syntax error, unexpected int, expecting IDENTIFIER or genvar\n for (int i = 0; i < num_s_req + num_p_req; i++) begin\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:85: Unsupported or unknown PLI call: $cast\n if ($cast(temp_s_rsp, t_uvs)) begin \n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:86: syntax error, unexpected int, expecting IDENTIFIER or genvar\n for (int i = 0; i < s_req_list.size(); i++) begin\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:89: Define or directive not defined: \'`uvm_info\'\n `uvm_info("process_responses", $sformatf("Simple Request/Response pair for...\\n%s\\n%s", s_req_list[i].sprint(), temp_s_rsp.sprint()), UVM_LOW)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:93: Define or directive not defined: \'`uvm_error\'\n : ... Suggested alternative: \'`error\'\n `uvm_error("process_responses", "ERROR -- simple question answer mismatch")\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:93: syntax error, unexpected \'(\'\n `uvm_error("process_responses", "ERROR -- simple question answer mismatch")\n ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:97: Define or directive not defined: \'`uvm_error\'\n : ... Suggested alternative: \'`error\'\n `uvm_error("process_responses", "ERROR -- unexpected response type")\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:103: syntax error, unexpected \'(\', expecting IDENTIFIER\n starting_phase.raise_objection(this, {"Running sequence \'",\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:109: syntax error, unexpected \'(\', expecting IDENTIFIER\n starting_phase.drop_objection(this, {"Completed sequence \'",\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:118: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:118: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:121: Define or directive not defined: \'`uvm_component_utils_begin\'\n `uvm_component_utils_begin(simple_driver)\n ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:122: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(max_pipeline_depth, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:123: Define or directive not defined: \'`uvm_field_queue_object\'\n `uvm_field_queue_object(req_list, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:124: Define or directive not defined: \'`uvm_component_utils_end\'\n `uvm_component_utils_end\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:136: Define or directive not defined: \'`uvm_info\'\n `uvm_info("get_and_drive", {"has a req\\n", req.sprint()}, UVM_LOW)\n ^~~~~~~~~\n%Error: Exiting due to too many errors encountered; --error-limit=50\n' | 308,387 | function | function void post_do(uvm_sequence_item this_item);
uvm_sequence_item temp_item;
simple_transfer t_s_req;
$cast(temp_item, this_item.clone());
temp_item.set_id_info(this_item);
if($cast(t_s_req, temp_item))
s_req_list.push_front(t_s_req);
else
`uvm_error("CASTFAIL", "ERROR!")
endfunction | function void post_do(uvm_sequence_item this_item); |
uvm_sequence_item temp_item;
simple_transfer t_s_req;
$cast(temp_item, this_item.clone());
temp_item.set_id_info(this_item);
if($cast(t_s_req, temp_item))
s_req_list.push_front(t_s_req);
else
`uvm_error("CASTFAIL", "ERROR!")
endfunction | 0 |
140,241 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv | 90,320,290 | ex5-9_simple_pipe_driver.sv | sv | 194 | 157 | [] | [] | [] | null | line:7: before: ":" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:8: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.sv\n uvm_macros.svh\n uvm_macros.svh.v\n uvm_macros.svh.sv\n obj_dir/uvm_macros.svh\n obj_dir/uvm_macros.svh.v\n obj_dir/uvm_macros.svh.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:7: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:11: Unsupported: classes\nclass simple_transfer extends uvm_sequence_item;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:11: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass simple_transfer extends uvm_sequence_item;\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:14: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(simple_transfer)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:14: syntax error, unexpected \'(\'\n `uvm_object_utils_begin(simple_transfer)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:15: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(question, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:16: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(answer, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:17: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:24: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(simple_sequencer)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:32: syntax error, unexpected rand\n rand int unsigned num_s_req;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:35: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint c_num_p_req { num_p_req inside {1,2,3,4}; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:36: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint c_num_s_req { num_s_req inside {1,2,3,4}; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:41: Unsupported: new constructor\n function new(string name="pipeline_seq");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:42: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:42: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:42: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:44: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(pipeline_seq)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:44: syntax error, unexpected \'(\'\n `uvm_object_utils_begin(pipeline_seq)\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:45: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(num_s_req, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:46: Define or directive not defined: \'`uvm_field_queue_object\'\n `uvm_field_queue_object(s_req_list, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:47: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:50: Define or directive not defined: \'`uvm_info\'\n `uvm_info("pipeline_seq", "Starting...", UVM_LOW)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:61: Unsupported or unknown PLI call: $cast\n $cast(temp_item, this_item.clone());\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:61: syntax error, unexpected ${ignored-bbox-sys}\n $cast(temp_item, this_item.clone());\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:62: syntax error, unexpected \'(\', expecting IDENTIFIER\n temp_item.set_id_info(this_item);\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:63: Unsupported or unknown PLI call: $cast\n if($cast(t_s_req, temp_item))\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:64: syntax error, unexpected \'(\', expecting IDENTIFIER\n s_req_list.push_front(t_s_req);\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:66: Define or directive not defined: \'`uvm_error\'\n : ... Suggested alternative: \'`error\'\n `uvm_error("CASTFAIL", "ERROR!")\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:70: Define or directive not defined: \'`uvm_info\'\n `uvm_info("send_requests", $sformatf("%0d s_req items will be sent.", num_s_req), UVM_LOW)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:72: Unsupported: SystemVerilog 2005 reserved word not implemented: \'randomize\'\n assert(std::randomize(delay_s_req) with { delay_s_req < 200; });\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:72: Unsupported: SystemVerilog 2005 reserved word not implemented: \'with\'\n assert(std::randomize(delay_s_req) with { delay_s_req < 200; });\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:74: Define or directive not defined: \'`uvm_info\'\n `uvm_info("send_requests", $sformatf("Sending s_req #%0d...", i), UVM_LOW)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:75: Define or directive not defined: \'`uvm_do\'\n `uvm_do(s_req)\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:83: syntax error, unexpected int, expecting IDENTIFIER or genvar\n for (int i = 0; i < num_s_req + num_p_req; i++) begin\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:85: Unsupported or unknown PLI call: $cast\n if ($cast(temp_s_rsp, t_uvs)) begin \n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:86: syntax error, unexpected int, expecting IDENTIFIER or genvar\n for (int i = 0; i < s_req_list.size(); i++) begin\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:89: Define or directive not defined: \'`uvm_info\'\n `uvm_info("process_responses", $sformatf("Simple Request/Response pair for...\\n%s\\n%s", s_req_list[i].sprint(), temp_s_rsp.sprint()), UVM_LOW)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:93: Define or directive not defined: \'`uvm_error\'\n : ... Suggested alternative: \'`error\'\n `uvm_error("process_responses", "ERROR -- simple question answer mismatch")\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:93: syntax error, unexpected \'(\'\n `uvm_error("process_responses", "ERROR -- simple question answer mismatch")\n ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:97: Define or directive not defined: \'`uvm_error\'\n : ... Suggested alternative: \'`error\'\n `uvm_error("process_responses", "ERROR -- unexpected response type")\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:103: syntax error, unexpected \'(\', expecting IDENTIFIER\n starting_phase.raise_objection(this, {"Running sequence \'",\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:109: syntax error, unexpected \'(\', expecting IDENTIFIER\n starting_phase.drop_objection(this, {"Completed sequence \'",\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:118: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:118: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:121: Define or directive not defined: \'`uvm_component_utils_begin\'\n `uvm_component_utils_begin(simple_driver)\n ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:122: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(max_pipeline_depth, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:123: Define or directive not defined: \'`uvm_field_queue_object\'\n `uvm_field_queue_object(req_list, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:124: Define or directive not defined: \'`uvm_component_utils_end\'\n `uvm_component_utils_end\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:136: Define or directive not defined: \'`uvm_info\'\n `uvm_info("get_and_drive", {"has a req\\n", req.sprint()}, UVM_LOW)\n ^~~~~~~~~\n%Error: Exiting due to too many errors encountered; --error-limit=50\n' | 308,387 | function | function new(string name="simple_test", uvm_component parent);
super.new(name, parent);
endfunction | function new(string name="simple_test", uvm_component parent); |
super.new(name, parent);
endfunction | 0 |
140,242 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv | 90,320,290 | ex5-9_simple_pipe_driver.sv | sv | 194 | 157 | [] | [] | [] | null | line:7: before: ":" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:8: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.sv\n uvm_macros.svh\n uvm_macros.svh.v\n uvm_macros.svh.sv\n obj_dir/uvm_macros.svh\n obj_dir/uvm_macros.svh.v\n obj_dir/uvm_macros.svh.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:7: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:11: Unsupported: classes\nclass simple_transfer extends uvm_sequence_item;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:11: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass simple_transfer extends uvm_sequence_item;\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:14: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(simple_transfer)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:14: syntax error, unexpected \'(\'\n `uvm_object_utils_begin(simple_transfer)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:15: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(question, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:16: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(answer, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:17: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:24: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(simple_sequencer)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:32: syntax error, unexpected rand\n rand int unsigned num_s_req;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:35: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint c_num_p_req { num_p_req inside {1,2,3,4}; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:36: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint c_num_s_req { num_s_req inside {1,2,3,4}; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:41: Unsupported: new constructor\n function new(string name="pipeline_seq");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:42: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:42: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:42: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:44: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(pipeline_seq)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:44: syntax error, unexpected \'(\'\n `uvm_object_utils_begin(pipeline_seq)\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:45: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(num_s_req, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:46: Define or directive not defined: \'`uvm_field_queue_object\'\n `uvm_field_queue_object(s_req_list, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:47: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:50: Define or directive not defined: \'`uvm_info\'\n `uvm_info("pipeline_seq", "Starting...", UVM_LOW)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:61: Unsupported or unknown PLI call: $cast\n $cast(temp_item, this_item.clone());\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:61: syntax error, unexpected ${ignored-bbox-sys}\n $cast(temp_item, this_item.clone());\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:62: syntax error, unexpected \'(\', expecting IDENTIFIER\n temp_item.set_id_info(this_item);\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:63: Unsupported or unknown PLI call: $cast\n if($cast(t_s_req, temp_item))\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:64: syntax error, unexpected \'(\', expecting IDENTIFIER\n s_req_list.push_front(t_s_req);\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:66: Define or directive not defined: \'`uvm_error\'\n : ... Suggested alternative: \'`error\'\n `uvm_error("CASTFAIL", "ERROR!")\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:70: Define or directive not defined: \'`uvm_info\'\n `uvm_info("send_requests", $sformatf("%0d s_req items will be sent.", num_s_req), UVM_LOW)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:72: Unsupported: SystemVerilog 2005 reserved word not implemented: \'randomize\'\n assert(std::randomize(delay_s_req) with { delay_s_req < 200; });\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:72: Unsupported: SystemVerilog 2005 reserved word not implemented: \'with\'\n assert(std::randomize(delay_s_req) with { delay_s_req < 200; });\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:74: Define or directive not defined: \'`uvm_info\'\n `uvm_info("send_requests", $sformatf("Sending s_req #%0d...", i), UVM_LOW)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:75: Define or directive not defined: \'`uvm_do\'\n `uvm_do(s_req)\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:83: syntax error, unexpected int, expecting IDENTIFIER or genvar\n for (int i = 0; i < num_s_req + num_p_req; i++) begin\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:85: Unsupported or unknown PLI call: $cast\n if ($cast(temp_s_rsp, t_uvs)) begin \n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:86: syntax error, unexpected int, expecting IDENTIFIER or genvar\n for (int i = 0; i < s_req_list.size(); i++) begin\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:89: Define or directive not defined: \'`uvm_info\'\n `uvm_info("process_responses", $sformatf("Simple Request/Response pair for...\\n%s\\n%s", s_req_list[i].sprint(), temp_s_rsp.sprint()), UVM_LOW)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:93: Define or directive not defined: \'`uvm_error\'\n : ... Suggested alternative: \'`error\'\n `uvm_error("process_responses", "ERROR -- simple question answer mismatch")\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:93: syntax error, unexpected \'(\'\n `uvm_error("process_responses", "ERROR -- simple question answer mismatch")\n ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:97: Define or directive not defined: \'`uvm_error\'\n : ... Suggested alternative: \'`error\'\n `uvm_error("process_responses", "ERROR -- unexpected response type")\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:103: syntax error, unexpected \'(\', expecting IDENTIFIER\n starting_phase.raise_objection(this, {"Running sequence \'",\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:109: syntax error, unexpected \'(\', expecting IDENTIFIER\n starting_phase.drop_objection(this, {"Completed sequence \'",\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:118: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:118: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:121: Define or directive not defined: \'`uvm_component_utils_begin\'\n `uvm_component_utils_begin(simple_driver)\n ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:122: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(max_pipeline_depth, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:123: Define or directive not defined: \'`uvm_field_queue_object\'\n `uvm_field_queue_object(req_list, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:124: Define or directive not defined: \'`uvm_component_utils_end\'\n `uvm_component_utils_end\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:136: Define or directive not defined: \'`uvm_info\'\n `uvm_info("get_and_drive", {"has a req\\n", req.sprint()}, UVM_LOW)\n ^~~~~~~~~\n%Error: Exiting due to too many errors encountered; --error-limit=50\n' | 308,387 | function | function void build_phase(uvm_phase phase);
uvm_config_wrapper::set(this, "sequencer.run_phase", "default_sequence", pipeline_seq::get_type());
sequencer = simple_sequencer::type_id::create("sequencer", this);
driver = simple_driver::type_id::create("driver", this);
endfunction | function void build_phase(uvm_phase phase); |
uvm_config_wrapper::set(this, "sequencer.run_phase", "default_sequence", pipeline_seq::get_type());
sequencer = simple_sequencer::type_id::create("sequencer", this);
driver = simple_driver::type_id::create("driver", this);
endfunction | 0 |
140,243 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv | 90,320,290 | ex5-9_simple_pipe_driver.sv | sv | 194 | 157 | [] | [] | [] | null | line:7: before: ":" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:8: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.sv\n uvm_macros.svh\n uvm_macros.svh.v\n uvm_macros.svh.sv\n obj_dir/uvm_macros.svh\n obj_dir/uvm_macros.svh.v\n obj_dir/uvm_macros.svh.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:7: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:11: Unsupported: classes\nclass simple_transfer extends uvm_sequence_item;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:11: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass simple_transfer extends uvm_sequence_item;\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:14: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(simple_transfer)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:14: syntax error, unexpected \'(\'\n `uvm_object_utils_begin(simple_transfer)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:15: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(question, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:16: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(answer, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:17: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:24: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(simple_sequencer)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:32: syntax error, unexpected rand\n rand int unsigned num_s_req;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:35: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint c_num_p_req { num_p_req inside {1,2,3,4}; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:36: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint c_num_s_req { num_s_req inside {1,2,3,4}; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:41: Unsupported: new constructor\n function new(string name="pipeline_seq");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:42: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:42: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:42: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:44: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(pipeline_seq)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:44: syntax error, unexpected \'(\'\n `uvm_object_utils_begin(pipeline_seq)\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:45: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(num_s_req, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:46: Define or directive not defined: \'`uvm_field_queue_object\'\n `uvm_field_queue_object(s_req_list, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:47: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:50: Define or directive not defined: \'`uvm_info\'\n `uvm_info("pipeline_seq", "Starting...", UVM_LOW)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:61: Unsupported or unknown PLI call: $cast\n $cast(temp_item, this_item.clone());\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:61: syntax error, unexpected ${ignored-bbox-sys}\n $cast(temp_item, this_item.clone());\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:62: syntax error, unexpected \'(\', expecting IDENTIFIER\n temp_item.set_id_info(this_item);\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:63: Unsupported or unknown PLI call: $cast\n if($cast(t_s_req, temp_item))\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:64: syntax error, unexpected \'(\', expecting IDENTIFIER\n s_req_list.push_front(t_s_req);\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:66: Define or directive not defined: \'`uvm_error\'\n : ... Suggested alternative: \'`error\'\n `uvm_error("CASTFAIL", "ERROR!")\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:70: Define or directive not defined: \'`uvm_info\'\n `uvm_info("send_requests", $sformatf("%0d s_req items will be sent.", num_s_req), UVM_LOW)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:72: Unsupported: SystemVerilog 2005 reserved word not implemented: \'randomize\'\n assert(std::randomize(delay_s_req) with { delay_s_req < 200; });\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:72: Unsupported: SystemVerilog 2005 reserved word not implemented: \'with\'\n assert(std::randomize(delay_s_req) with { delay_s_req < 200; });\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:74: Define or directive not defined: \'`uvm_info\'\n `uvm_info("send_requests", $sformatf("Sending s_req #%0d...", i), UVM_LOW)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:75: Define or directive not defined: \'`uvm_do\'\n `uvm_do(s_req)\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:83: syntax error, unexpected int, expecting IDENTIFIER or genvar\n for (int i = 0; i < num_s_req + num_p_req; i++) begin\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:85: Unsupported or unknown PLI call: $cast\n if ($cast(temp_s_rsp, t_uvs)) begin \n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:86: syntax error, unexpected int, expecting IDENTIFIER or genvar\n for (int i = 0; i < s_req_list.size(); i++) begin\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:89: Define or directive not defined: \'`uvm_info\'\n `uvm_info("process_responses", $sformatf("Simple Request/Response pair for...\\n%s\\n%s", s_req_list[i].sprint(), temp_s_rsp.sprint()), UVM_LOW)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:93: Define or directive not defined: \'`uvm_error\'\n : ... Suggested alternative: \'`error\'\n `uvm_error("process_responses", "ERROR -- simple question answer mismatch")\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:93: syntax error, unexpected \'(\'\n `uvm_error("process_responses", "ERROR -- simple question answer mismatch")\n ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:97: Define or directive not defined: \'`uvm_error\'\n : ... Suggested alternative: \'`error\'\n `uvm_error("process_responses", "ERROR -- unexpected response type")\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:103: syntax error, unexpected \'(\', expecting IDENTIFIER\n starting_phase.raise_objection(this, {"Running sequence \'",\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:109: syntax error, unexpected \'(\', expecting IDENTIFIER\n starting_phase.drop_objection(this, {"Completed sequence \'",\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:118: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:118: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:121: Define or directive not defined: \'`uvm_component_utils_begin\'\n `uvm_component_utils_begin(simple_driver)\n ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:122: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(max_pipeline_depth, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:123: Define or directive not defined: \'`uvm_field_queue_object\'\n `uvm_field_queue_object(req_list, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:124: Define or directive not defined: \'`uvm_component_utils_end\'\n `uvm_component_utils_end\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:136: Define or directive not defined: \'`uvm_info\'\n `uvm_info("get_and_drive", {"has a req\\n", req.sprint()}, UVM_LOW)\n ^~~~~~~~~\n%Error: Exiting due to too many errors encountered; --error-limit=50\n' | 308,387 | function | function void connect_phase(uvm_phase phase);
driver.seq_item_port.connect(sequencer.seq_item_export);
driver.rsp_port.connect(sequencer.rsp_export);
endfunction | function void connect_phase(uvm_phase phase); |
driver.seq_item_port.connect(sequencer.seq_item_export);
driver.rsp_port.connect(sequencer.rsp_export);
endfunction | 0 |
140,244 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv | 90,320,290 | ex5-9_simple_pipe_driver.sv | sv | 194 | 157 | [] | [] | [] | null | line:7: before: ":" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:8: Cannot find include file: uvm_macros.svh\n`include "uvm_macros.svh" \n ^~~~~~~~~~~~~~~~\n ... Looked in:\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.v\n data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs,data/full_repos/permissive/90320290/uvm_macros.svh.sv\n uvm_macros.svh\n uvm_macros.svh.v\n uvm_macros.svh.sv\n obj_dir/uvm_macros.svh\n obj_dir/uvm_macros.svh.v\n obj_dir/uvm_macros.svh.sv\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:7: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport uvm_pkg::*;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:11: Unsupported: classes\nclass simple_transfer extends uvm_sequence_item;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:11: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass simple_transfer extends uvm_sequence_item;\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:14: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(simple_transfer)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:14: syntax error, unexpected \'(\'\n `uvm_object_utils_begin(simple_transfer)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:15: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(question, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:16: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(answer, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:17: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:24: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(simple_sequencer)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:32: syntax error, unexpected rand\n rand int unsigned num_s_req;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:35: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint c_num_p_req { num_p_req inside {1,2,3,4}; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:36: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint c_num_s_req { num_s_req inside {1,2,3,4}; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:41: Unsupported: new constructor\n function new(string name="pipeline_seq");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:42: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:42: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:42: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:44: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(pipeline_seq)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:44: syntax error, unexpected \'(\'\n `uvm_object_utils_begin(pipeline_seq)\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:45: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(num_s_req, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:46: Define or directive not defined: \'`uvm_field_queue_object\'\n `uvm_field_queue_object(s_req_list, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:47: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:50: Define or directive not defined: \'`uvm_info\'\n `uvm_info("pipeline_seq", "Starting...", UVM_LOW)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:61: Unsupported or unknown PLI call: $cast\n $cast(temp_item, this_item.clone());\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:61: syntax error, unexpected ${ignored-bbox-sys}\n $cast(temp_item, this_item.clone());\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:62: syntax error, unexpected \'(\', expecting IDENTIFIER\n temp_item.set_id_info(this_item);\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:63: Unsupported or unknown PLI call: $cast\n if($cast(t_s_req, temp_item))\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:64: syntax error, unexpected \'(\', expecting IDENTIFIER\n s_req_list.push_front(t_s_req);\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:66: Define or directive not defined: \'`uvm_error\'\n : ... Suggested alternative: \'`error\'\n `uvm_error("CASTFAIL", "ERROR!")\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:70: Define or directive not defined: \'`uvm_info\'\n `uvm_info("send_requests", $sformatf("%0d s_req items will be sent.", num_s_req), UVM_LOW)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:72: Unsupported: SystemVerilog 2005 reserved word not implemented: \'randomize\'\n assert(std::randomize(delay_s_req) with { delay_s_req < 200; });\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:72: Unsupported: SystemVerilog 2005 reserved word not implemented: \'with\'\n assert(std::randomize(delay_s_req) with { delay_s_req < 200; });\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:74: Define or directive not defined: \'`uvm_info\'\n `uvm_info("send_requests", $sformatf("Sending s_req #%0d...", i), UVM_LOW)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:75: Define or directive not defined: \'`uvm_do\'\n `uvm_do(s_req)\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:83: syntax error, unexpected int, expecting IDENTIFIER or genvar\n for (int i = 0; i < num_s_req + num_p_req; i++) begin\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:85: Unsupported or unknown PLI call: $cast\n if ($cast(temp_s_rsp, t_uvs)) begin \n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:86: syntax error, unexpected int, expecting IDENTIFIER or genvar\n for (int i = 0; i < s_req_list.size(); i++) begin\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:89: Define or directive not defined: \'`uvm_info\'\n `uvm_info("process_responses", $sformatf("Simple Request/Response pair for...\\n%s\\n%s", s_req_list[i].sprint(), temp_s_rsp.sprint()), UVM_LOW)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:93: Define or directive not defined: \'`uvm_error\'\n : ... Suggested alternative: \'`error\'\n `uvm_error("process_responses", "ERROR -- simple question answer mismatch")\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:93: syntax error, unexpected \'(\'\n `uvm_error("process_responses", "ERROR -- simple question answer mismatch")\n ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:97: Define or directive not defined: \'`uvm_error\'\n : ... Suggested alternative: \'`error\'\n `uvm_error("process_responses", "ERROR -- unexpected response type")\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:103: syntax error, unexpected \'(\', expecting IDENTIFIER\n starting_phase.raise_objection(this, {"Running sequence \'",\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:109: syntax error, unexpected \'(\', expecting IDENTIFIER\n starting_phase.drop_objection(this, {"Completed sequence \'",\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:118: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:118: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:121: Define or directive not defined: \'`uvm_component_utils_begin\'\n `uvm_component_utils_begin(simple_driver)\n ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:122: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(max_pipeline_depth, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:123: Define or directive not defined: \'`uvm_field_queue_object\'\n `uvm_field_queue_object(req_list, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:124: Define or directive not defined: \'`uvm_component_utils_end\'\n `uvm_component_utils_end\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/ex5-9_simple_pipe_driver.sv:136: Define or directive not defined: \'`uvm_info\'\n `uvm_info("get_and_drive", {"has a req\\n", req.sprint()}, UVM_LOW)\n ^~~~~~~~~\n%Error: Exiting due to too many errors encountered; --error-limit=50\n' | 308,387 | function | function void start_of_simulation_phase(uvm_phase phase);
this.print();
endfunction | function void start_of_simulation_phase(uvm_phase phase); |
this.print();
endfunction | 0 |
140,245 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv | 90,320,290 | apb_bus_monitor.sv | sv | 123 | 115 | [] | [] | [] | null | line:11: before: "class" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:11: Unsupported: classes\nclass apb_bus_monitor extends uvm_monitor;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:11: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_bus_monitor extends uvm_monitor;\n ^~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:14: Unsupported: virtual data type\n virtual apb_if vif;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:22: syntax error, unexpected IDENTIFIER\n apb_config cfg;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:34: Define or directive not defined: \'`uvm_component_utils_begin\'\n `uvm_component_utils_begin(apb_bus_monitor)\n ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:34: syntax error, unexpected \'(\'\n `uvm_component_utils_begin(apb_bus_monitor)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:35: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(checks_enable, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:36: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(coverage_enable, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:37: Define or directive not defined: \'`uvm_component_utils_end\'\n `uvm_component_utils_end\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:39: Unsupported: SystemVerilog 2005 reserved word not implemented: \'covergroup\'\n covergroup apb_transfer_cg;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:40: Unsupported: SystemVerilog 2005 reserved word not implemented: \'coverpoint\'\n TRANS_ADDR : coverpoint trans_collected.addr {\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:41: Unsupported: SystemVerilog 2005 reserved word not implemented: \'bins\'\n bins ZERO = {0};\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:42: Unsupported: SystemVerilog 2005 reserved word not implemented: \'bins\'\n bins NON_ZERO = {[1:8\'h7f]};\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:44: Unsupported: SystemVerilog 2005 reserved word not implemented: \'coverpoint\'\n TRANS_DIRECTION : coverpoint trans_collected.direction;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:45: Unsupported: SystemVerilog 2005 reserved word not implemented: \'coverpoint\'\n TRANS_DATA : coverpoint trans_collected.data {\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:46: Unsupported: SystemVerilog 2005 reserved word not implemented: \'bins\'\n bins ZERO = {0};\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:47: Unsupported: SystemVerilog 2005 reserved word not implemented: \'bins\'\n bins NON_ZERO = {[1:8\'hfe]};\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:48: Unsupported: SystemVerilog 2005 reserved word not implemented: \'bins\'\n bins ALL_ONES = {8\'hff};\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:50: Unsupported: SystemVerilog 2005 reserved word not implemented: \'cross\'\n TRANS_ADDR_X_TRANS_DIRECTION: cross TRANS_ADDR, TRANS_DIRECTION;\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:51: Unsupported: SystemVerilog 2005 reserved word not implemented: \'endgroup\'\n endgroup\n ^~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:54: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:54: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:63: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern virtual function void connect_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:64: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern virtual task run_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:66: syntax error, unexpected extern\n extern virtual protected function void perform_coverage();\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:73: Unsupported: super\n super.connect_phase(phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:74: syntax error, unexpected \'#\'\n if (!uvm_config_db#(virtual apb_if)::get(this, get_full_name(), "vif", vif))\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:75: Define or directive not defined: \'`uvm_error\'\n : ... Suggested alternative: \'`error\'\n `uvm_error("NOVIF", {"virtual interface (apb_if) must be set for: ", get_full_name(), ".vif"})\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:81: syntax error, unexpected ::, expecting \';\'\n trans_collected = apb_transfer::type_id::create("trans_collected");\n ^~\n : ... Perhaps \'apb_transfer\' is a package which needs to be predeclared? (IEEE 1800-2017 26.3)\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:83: syntax error, unexpected \'@\'\n @(posedge vif.pclk iff (vif.psel != 0));\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:84: Unsupported: this\n void\'(this.begin_tr(trans_collected));\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:94: syntax error, unexpected \'@\'\n @(posedge vif.pclk);\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:97: Unsupported: this\n this.end_tr(trans_collected);\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:101: Define or directive not defined: \'`uvm_info\'\n `uvm_info(get_type_name(), $sformatf("Transfer collected :\\n%s",\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:101: syntax error, unexpected \',\'\n `uvm_info(get_type_name(), $sformatf("Transfer collected :\\n%s",\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:108: Unsupported: Hierarchical class references\nfunction void apb_bus_monitor::perform_checks();\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:108: Unsupported: scoped class reference\nfunction void apb_bus_monitor::perform_checks();\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:65: Unsupported: Out of class block function declaration\n extern protected function void perform_checks();\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:113: Unsupported: Hierarchical class references\nfunction void apb_bus_monitor::perform_coverage();\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:113: Unsupported: scoped class reference\nfunction void apb_bus_monitor::perform_coverage();\n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:108: Unsupported: Out of class block function declaration\nfunction void apb_bus_monitor::perform_checks();\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:118: Unsupported: Hierarchical class references\nfunction void apb_bus_monitor::report_phase(uvm_phase phase);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:118: Unsupported: scoped class reference\nfunction void apb_bus_monitor::report_phase(uvm_phase phase);\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:113: Unsupported: Out of class block function declaration\nfunction void apb_bus_monitor::perform_coverage();\n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:118: syntax error, unexpected IDENTIFIER, expecting \')\'\nfunction void apb_bus_monitor::report_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:119: Define or directive not defined: \'`uvm_info\'\n `uvm_info(get_type_name(), $sformatf("Report: APB monitor collected %0d transfers", num_transactions), UVM_LOW);\n ^~~~~~~~~\n%Error: Exiting due to 46 error(s)\n ... See the manual and https://verilator.org for more assistance.\n' | 308,388 | function | function new (string name, uvm_component parent);
super.new(name, parent);
trans_collected = new();
apb_transfer_cg = new();
item_collected_port = new("item_collected_port", this);
endfunction | function new (string name, uvm_component parent); |
super.new(name, parent);
trans_collected = new();
apb_transfer_cg = new();
item_collected_port = new("item_collected_port", this);
endfunction | 0 |
140,246 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv | 90,320,290 | apb_bus_monitor.sv | sv | 123 | 115 | [] | [] | [] | null | line:11: before: "class" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:11: Unsupported: classes\nclass apb_bus_monitor extends uvm_monitor;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:11: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_bus_monitor extends uvm_monitor;\n ^~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:14: Unsupported: virtual data type\n virtual apb_if vif;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:22: syntax error, unexpected IDENTIFIER\n apb_config cfg;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:34: Define or directive not defined: \'`uvm_component_utils_begin\'\n `uvm_component_utils_begin(apb_bus_monitor)\n ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:34: syntax error, unexpected \'(\'\n `uvm_component_utils_begin(apb_bus_monitor)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:35: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(checks_enable, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:36: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(coverage_enable, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:37: Define or directive not defined: \'`uvm_component_utils_end\'\n `uvm_component_utils_end\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:39: Unsupported: SystemVerilog 2005 reserved word not implemented: \'covergroup\'\n covergroup apb_transfer_cg;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:40: Unsupported: SystemVerilog 2005 reserved word not implemented: \'coverpoint\'\n TRANS_ADDR : coverpoint trans_collected.addr {\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:41: Unsupported: SystemVerilog 2005 reserved word not implemented: \'bins\'\n bins ZERO = {0};\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:42: Unsupported: SystemVerilog 2005 reserved word not implemented: \'bins\'\n bins NON_ZERO = {[1:8\'h7f]};\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:44: Unsupported: SystemVerilog 2005 reserved word not implemented: \'coverpoint\'\n TRANS_DIRECTION : coverpoint trans_collected.direction;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:45: Unsupported: SystemVerilog 2005 reserved word not implemented: \'coverpoint\'\n TRANS_DATA : coverpoint trans_collected.data {\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:46: Unsupported: SystemVerilog 2005 reserved word not implemented: \'bins\'\n bins ZERO = {0};\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:47: Unsupported: SystemVerilog 2005 reserved word not implemented: \'bins\'\n bins NON_ZERO = {[1:8\'hfe]};\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:48: Unsupported: SystemVerilog 2005 reserved word not implemented: \'bins\'\n bins ALL_ONES = {8\'hff};\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:50: Unsupported: SystemVerilog 2005 reserved word not implemented: \'cross\'\n TRANS_ADDR_X_TRANS_DIRECTION: cross TRANS_ADDR, TRANS_DIRECTION;\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:51: Unsupported: SystemVerilog 2005 reserved word not implemented: \'endgroup\'\n endgroup\n ^~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:54: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:54: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:63: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern virtual function void connect_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:64: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern virtual task run_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:66: syntax error, unexpected extern\n extern virtual protected function void perform_coverage();\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:73: Unsupported: super\n super.connect_phase(phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:74: syntax error, unexpected \'#\'\n if (!uvm_config_db#(virtual apb_if)::get(this, get_full_name(), "vif", vif))\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:75: Define or directive not defined: \'`uvm_error\'\n : ... Suggested alternative: \'`error\'\n `uvm_error("NOVIF", {"virtual interface (apb_if) must be set for: ", get_full_name(), ".vif"})\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:81: syntax error, unexpected ::, expecting \';\'\n trans_collected = apb_transfer::type_id::create("trans_collected");\n ^~\n : ... Perhaps \'apb_transfer\' is a package which needs to be predeclared? (IEEE 1800-2017 26.3)\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:83: syntax error, unexpected \'@\'\n @(posedge vif.pclk iff (vif.psel != 0));\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:84: Unsupported: this\n void\'(this.begin_tr(trans_collected));\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:94: syntax error, unexpected \'@\'\n @(posedge vif.pclk);\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:97: Unsupported: this\n this.end_tr(trans_collected);\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:101: Define or directive not defined: \'`uvm_info\'\n `uvm_info(get_type_name(), $sformatf("Transfer collected :\\n%s",\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:101: syntax error, unexpected \',\'\n `uvm_info(get_type_name(), $sformatf("Transfer collected :\\n%s",\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:108: Unsupported: Hierarchical class references\nfunction void apb_bus_monitor::perform_checks();\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:108: Unsupported: scoped class reference\nfunction void apb_bus_monitor::perform_checks();\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:65: Unsupported: Out of class block function declaration\n extern protected function void perform_checks();\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:113: Unsupported: Hierarchical class references\nfunction void apb_bus_monitor::perform_coverage();\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:113: Unsupported: scoped class reference\nfunction void apb_bus_monitor::perform_coverage();\n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:108: Unsupported: Out of class block function declaration\nfunction void apb_bus_monitor::perform_checks();\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:118: Unsupported: Hierarchical class references\nfunction void apb_bus_monitor::report_phase(uvm_phase phase);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:118: Unsupported: scoped class reference\nfunction void apb_bus_monitor::report_phase(uvm_phase phase);\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:113: Unsupported: Out of class block function declaration\nfunction void apb_bus_monitor::perform_coverage();\n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:118: syntax error, unexpected IDENTIFIER, expecting \')\'\nfunction void apb_bus_monitor::report_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:119: Define or directive not defined: \'`uvm_info\'\n `uvm_info(get_type_name(), $sformatf("Report: APB monitor collected %0d transfers", num_transactions), UVM_LOW);\n ^~~~~~~~~\n%Error: Exiting due to 46 error(s)\n ... See the manual and https://verilator.org for more assistance.\n' | 308,388 | function | function void connect_phase(uvm_phase phase);
extern virtual task run_phase(uvm_phase phase);
extern protected function void perform_checks();
extern virtual protected function void perform_coverage();
extern virtual function void report_phase(uvm_phase phase);
endclass : apb_bus_monitor
function void apb_bus_monitor::connect_phase(uvm_phase phase);
super.connect_phase(phase);
if (!uvm_config_db#(virtual apb_if)::get(this, get_full_name(), "vif", vif))
`uvm_error("NOVIF", {"virtual interface (apb_if) must be set for: ", get_full_name(), ".vif"})
endfunction | function void connect_phase(uvm_phase phase); |
extern virtual task run_phase(uvm_phase phase);
extern protected function void perform_checks();
extern virtual protected function void perform_coverage();
extern virtual function void report_phase(uvm_phase phase);
endclass : apb_bus_monitor
function void apb_bus_monitor::connect_phase(uvm_phase phase);
super.connect_phase(phase);
if (!uvm_config_db#(virtual apb_if)::get(this, get_full_name(), "vif", vif))
`uvm_error("NOVIF", {"virtual interface (apb_if) must be set for: ", get_full_name(), ".vif"})
endfunction | 0 |
140,247 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv | 90,320,290 | apb_bus_monitor.sv | sv | 123 | 115 | [] | [] | [] | null | line:11: before: "class" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:11: Unsupported: classes\nclass apb_bus_monitor extends uvm_monitor;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:11: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_bus_monitor extends uvm_monitor;\n ^~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:14: Unsupported: virtual data type\n virtual apb_if vif;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:22: syntax error, unexpected IDENTIFIER\n apb_config cfg;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:34: Define or directive not defined: \'`uvm_component_utils_begin\'\n `uvm_component_utils_begin(apb_bus_monitor)\n ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:34: syntax error, unexpected \'(\'\n `uvm_component_utils_begin(apb_bus_monitor)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:35: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(checks_enable, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:36: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(coverage_enable, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:37: Define or directive not defined: \'`uvm_component_utils_end\'\n `uvm_component_utils_end\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:39: Unsupported: SystemVerilog 2005 reserved word not implemented: \'covergroup\'\n covergroup apb_transfer_cg;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:40: Unsupported: SystemVerilog 2005 reserved word not implemented: \'coverpoint\'\n TRANS_ADDR : coverpoint trans_collected.addr {\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:41: Unsupported: SystemVerilog 2005 reserved word not implemented: \'bins\'\n bins ZERO = {0};\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:42: Unsupported: SystemVerilog 2005 reserved word not implemented: \'bins\'\n bins NON_ZERO = {[1:8\'h7f]};\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:44: Unsupported: SystemVerilog 2005 reserved word not implemented: \'coverpoint\'\n TRANS_DIRECTION : coverpoint trans_collected.direction;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:45: Unsupported: SystemVerilog 2005 reserved word not implemented: \'coverpoint\'\n TRANS_DATA : coverpoint trans_collected.data {\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:46: Unsupported: SystemVerilog 2005 reserved word not implemented: \'bins\'\n bins ZERO = {0};\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:47: Unsupported: SystemVerilog 2005 reserved word not implemented: \'bins\'\n bins NON_ZERO = {[1:8\'hfe]};\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:48: Unsupported: SystemVerilog 2005 reserved word not implemented: \'bins\'\n bins ALL_ONES = {8\'hff};\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:50: Unsupported: SystemVerilog 2005 reserved word not implemented: \'cross\'\n TRANS_ADDR_X_TRANS_DIRECTION: cross TRANS_ADDR, TRANS_DIRECTION;\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:51: Unsupported: SystemVerilog 2005 reserved word not implemented: \'endgroup\'\n endgroup\n ^~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:54: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:54: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:63: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern virtual function void connect_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:64: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern virtual task run_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:66: syntax error, unexpected extern\n extern virtual protected function void perform_coverage();\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:73: Unsupported: super\n super.connect_phase(phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:74: syntax error, unexpected \'#\'\n if (!uvm_config_db#(virtual apb_if)::get(this, get_full_name(), "vif", vif))\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:75: Define or directive not defined: \'`uvm_error\'\n : ... Suggested alternative: \'`error\'\n `uvm_error("NOVIF", {"virtual interface (apb_if) must be set for: ", get_full_name(), ".vif"})\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:81: syntax error, unexpected ::, expecting \';\'\n trans_collected = apb_transfer::type_id::create("trans_collected");\n ^~\n : ... Perhaps \'apb_transfer\' is a package which needs to be predeclared? (IEEE 1800-2017 26.3)\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:83: syntax error, unexpected \'@\'\n @(posedge vif.pclk iff (vif.psel != 0));\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:84: Unsupported: this\n void\'(this.begin_tr(trans_collected));\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:94: syntax error, unexpected \'@\'\n @(posedge vif.pclk);\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:97: Unsupported: this\n this.end_tr(trans_collected);\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:101: Define or directive not defined: \'`uvm_info\'\n `uvm_info(get_type_name(), $sformatf("Transfer collected :\\n%s",\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:101: syntax error, unexpected \',\'\n `uvm_info(get_type_name(), $sformatf("Transfer collected :\\n%s",\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:108: Unsupported: Hierarchical class references\nfunction void apb_bus_monitor::perform_checks();\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:108: Unsupported: scoped class reference\nfunction void apb_bus_monitor::perform_checks();\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:65: Unsupported: Out of class block function declaration\n extern protected function void perform_checks();\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:113: Unsupported: Hierarchical class references\nfunction void apb_bus_monitor::perform_coverage();\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:113: Unsupported: scoped class reference\nfunction void apb_bus_monitor::perform_coverage();\n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:108: Unsupported: Out of class block function declaration\nfunction void apb_bus_monitor::perform_checks();\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:118: Unsupported: Hierarchical class references\nfunction void apb_bus_monitor::report_phase(uvm_phase phase);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:118: Unsupported: scoped class reference\nfunction void apb_bus_monitor::report_phase(uvm_phase phase);\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:113: Unsupported: Out of class block function declaration\nfunction void apb_bus_monitor::perform_coverage();\n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:118: syntax error, unexpected IDENTIFIER, expecting \')\'\nfunction void apb_bus_monitor::report_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:119: Define or directive not defined: \'`uvm_info\'\n `uvm_info(get_type_name(), $sformatf("Report: APB monitor collected %0d transfers", num_transactions), UVM_LOW);\n ^~~~~~~~~\n%Error: Exiting due to 46 error(s)\n ... See the manual and https://verilator.org for more assistance.\n' | 308,388 | function | function void apb_bus_monitor::perform_checks();
endfunction | function void apb_bus_monitor::perform_checks(); |
endfunction | 0 |
140,248 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv | 90,320,290 | apb_bus_monitor.sv | sv | 123 | 115 | [] | [] | [] | null | line:11: before: "class" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:11: Unsupported: classes\nclass apb_bus_monitor extends uvm_monitor;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:11: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_bus_monitor extends uvm_monitor;\n ^~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:14: Unsupported: virtual data type\n virtual apb_if vif;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:22: syntax error, unexpected IDENTIFIER\n apb_config cfg;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:34: Define or directive not defined: \'`uvm_component_utils_begin\'\n `uvm_component_utils_begin(apb_bus_monitor)\n ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:34: syntax error, unexpected \'(\'\n `uvm_component_utils_begin(apb_bus_monitor)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:35: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(checks_enable, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:36: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(coverage_enable, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:37: Define or directive not defined: \'`uvm_component_utils_end\'\n `uvm_component_utils_end\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:39: Unsupported: SystemVerilog 2005 reserved word not implemented: \'covergroup\'\n covergroup apb_transfer_cg;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:40: Unsupported: SystemVerilog 2005 reserved word not implemented: \'coverpoint\'\n TRANS_ADDR : coverpoint trans_collected.addr {\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:41: Unsupported: SystemVerilog 2005 reserved word not implemented: \'bins\'\n bins ZERO = {0};\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:42: Unsupported: SystemVerilog 2005 reserved word not implemented: \'bins\'\n bins NON_ZERO = {[1:8\'h7f]};\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:44: Unsupported: SystemVerilog 2005 reserved word not implemented: \'coverpoint\'\n TRANS_DIRECTION : coverpoint trans_collected.direction;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:45: Unsupported: SystemVerilog 2005 reserved word not implemented: \'coverpoint\'\n TRANS_DATA : coverpoint trans_collected.data {\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:46: Unsupported: SystemVerilog 2005 reserved word not implemented: \'bins\'\n bins ZERO = {0};\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:47: Unsupported: SystemVerilog 2005 reserved word not implemented: \'bins\'\n bins NON_ZERO = {[1:8\'hfe]};\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:48: Unsupported: SystemVerilog 2005 reserved word not implemented: \'bins\'\n bins ALL_ONES = {8\'hff};\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:50: Unsupported: SystemVerilog 2005 reserved word not implemented: \'cross\'\n TRANS_ADDR_X_TRANS_DIRECTION: cross TRANS_ADDR, TRANS_DIRECTION;\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:51: Unsupported: SystemVerilog 2005 reserved word not implemented: \'endgroup\'\n endgroup\n ^~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:54: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:54: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:63: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern virtual function void connect_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:64: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern virtual task run_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:66: syntax error, unexpected extern\n extern virtual protected function void perform_coverage();\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:73: Unsupported: super\n super.connect_phase(phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:74: syntax error, unexpected \'#\'\n if (!uvm_config_db#(virtual apb_if)::get(this, get_full_name(), "vif", vif))\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:75: Define or directive not defined: \'`uvm_error\'\n : ... Suggested alternative: \'`error\'\n `uvm_error("NOVIF", {"virtual interface (apb_if) must be set for: ", get_full_name(), ".vif"})\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:81: syntax error, unexpected ::, expecting \';\'\n trans_collected = apb_transfer::type_id::create("trans_collected");\n ^~\n : ... Perhaps \'apb_transfer\' is a package which needs to be predeclared? (IEEE 1800-2017 26.3)\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:83: syntax error, unexpected \'@\'\n @(posedge vif.pclk iff (vif.psel != 0));\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:84: Unsupported: this\n void\'(this.begin_tr(trans_collected));\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:94: syntax error, unexpected \'@\'\n @(posedge vif.pclk);\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:97: Unsupported: this\n this.end_tr(trans_collected);\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:101: Define or directive not defined: \'`uvm_info\'\n `uvm_info(get_type_name(), $sformatf("Transfer collected :\\n%s",\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:101: syntax error, unexpected \',\'\n `uvm_info(get_type_name(), $sformatf("Transfer collected :\\n%s",\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:108: Unsupported: Hierarchical class references\nfunction void apb_bus_monitor::perform_checks();\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:108: Unsupported: scoped class reference\nfunction void apb_bus_monitor::perform_checks();\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:65: Unsupported: Out of class block function declaration\n extern protected function void perform_checks();\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:113: Unsupported: Hierarchical class references\nfunction void apb_bus_monitor::perform_coverage();\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:113: Unsupported: scoped class reference\nfunction void apb_bus_monitor::perform_coverage();\n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:108: Unsupported: Out of class block function declaration\nfunction void apb_bus_monitor::perform_checks();\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:118: Unsupported: Hierarchical class references\nfunction void apb_bus_monitor::report_phase(uvm_phase phase);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:118: Unsupported: scoped class reference\nfunction void apb_bus_monitor::report_phase(uvm_phase phase);\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:113: Unsupported: Out of class block function declaration\nfunction void apb_bus_monitor::perform_coverage();\n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:118: syntax error, unexpected IDENTIFIER, expecting \')\'\nfunction void apb_bus_monitor::report_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:119: Define or directive not defined: \'`uvm_info\'\n `uvm_info(get_type_name(), $sformatf("Report: APB monitor collected %0d transfers", num_transactions), UVM_LOW);\n ^~~~~~~~~\n%Error: Exiting due to 46 error(s)\n ... See the manual and https://verilator.org for more assistance.\n' | 308,388 | function | function void apb_bus_monitor::perform_coverage();
apb_transfer_cg.sample();
endfunction | function void apb_bus_monitor::perform_coverage(); |
apb_transfer_cg.sample();
endfunction | 0 |
140,249 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv | 90,320,290 | apb_bus_monitor.sv | sv | 123 | 115 | [] | [] | [] | null | line:11: before: "class" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:11: Unsupported: classes\nclass apb_bus_monitor extends uvm_monitor;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:11: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_bus_monitor extends uvm_monitor;\n ^~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:14: Unsupported: virtual data type\n virtual apb_if vif;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:22: syntax error, unexpected IDENTIFIER\n apb_config cfg;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:34: Define or directive not defined: \'`uvm_component_utils_begin\'\n `uvm_component_utils_begin(apb_bus_monitor)\n ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:34: syntax error, unexpected \'(\'\n `uvm_component_utils_begin(apb_bus_monitor)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:35: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(checks_enable, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:36: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(coverage_enable, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:37: Define or directive not defined: \'`uvm_component_utils_end\'\n `uvm_component_utils_end\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:39: Unsupported: SystemVerilog 2005 reserved word not implemented: \'covergroup\'\n covergroup apb_transfer_cg;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:40: Unsupported: SystemVerilog 2005 reserved word not implemented: \'coverpoint\'\n TRANS_ADDR : coverpoint trans_collected.addr {\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:41: Unsupported: SystemVerilog 2005 reserved word not implemented: \'bins\'\n bins ZERO = {0};\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:42: Unsupported: SystemVerilog 2005 reserved word not implemented: \'bins\'\n bins NON_ZERO = {[1:8\'h7f]};\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:44: Unsupported: SystemVerilog 2005 reserved word not implemented: \'coverpoint\'\n TRANS_DIRECTION : coverpoint trans_collected.direction;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:45: Unsupported: SystemVerilog 2005 reserved word not implemented: \'coverpoint\'\n TRANS_DATA : coverpoint trans_collected.data {\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:46: Unsupported: SystemVerilog 2005 reserved word not implemented: \'bins\'\n bins ZERO = {0};\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:47: Unsupported: SystemVerilog 2005 reserved word not implemented: \'bins\'\n bins NON_ZERO = {[1:8\'hfe]};\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:48: Unsupported: SystemVerilog 2005 reserved word not implemented: \'bins\'\n bins ALL_ONES = {8\'hff};\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:50: Unsupported: SystemVerilog 2005 reserved word not implemented: \'cross\'\n TRANS_ADDR_X_TRANS_DIRECTION: cross TRANS_ADDR, TRANS_DIRECTION;\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:51: Unsupported: SystemVerilog 2005 reserved word not implemented: \'endgroup\'\n endgroup\n ^~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:54: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:54: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:63: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern virtual function void connect_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:64: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern virtual task run_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:66: syntax error, unexpected extern\n extern virtual protected function void perform_coverage();\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:73: Unsupported: super\n super.connect_phase(phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:74: syntax error, unexpected \'#\'\n if (!uvm_config_db#(virtual apb_if)::get(this, get_full_name(), "vif", vif))\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:75: Define or directive not defined: \'`uvm_error\'\n : ... Suggested alternative: \'`error\'\n `uvm_error("NOVIF", {"virtual interface (apb_if) must be set for: ", get_full_name(), ".vif"})\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:81: syntax error, unexpected ::, expecting \';\'\n trans_collected = apb_transfer::type_id::create("trans_collected");\n ^~\n : ... Perhaps \'apb_transfer\' is a package which needs to be predeclared? (IEEE 1800-2017 26.3)\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:83: syntax error, unexpected \'@\'\n @(posedge vif.pclk iff (vif.psel != 0));\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:84: Unsupported: this\n void\'(this.begin_tr(trans_collected));\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:94: syntax error, unexpected \'@\'\n @(posedge vif.pclk);\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:97: Unsupported: this\n this.end_tr(trans_collected);\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:101: Define or directive not defined: \'`uvm_info\'\n `uvm_info(get_type_name(), $sformatf("Transfer collected :\\n%s",\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:101: syntax error, unexpected \',\'\n `uvm_info(get_type_name(), $sformatf("Transfer collected :\\n%s",\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:108: Unsupported: Hierarchical class references\nfunction void apb_bus_monitor::perform_checks();\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:108: Unsupported: scoped class reference\nfunction void apb_bus_monitor::perform_checks();\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:65: Unsupported: Out of class block function declaration\n extern protected function void perform_checks();\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:113: Unsupported: Hierarchical class references\nfunction void apb_bus_monitor::perform_coverage();\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:113: Unsupported: scoped class reference\nfunction void apb_bus_monitor::perform_coverage();\n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:108: Unsupported: Out of class block function declaration\nfunction void apb_bus_monitor::perform_checks();\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:118: Unsupported: Hierarchical class references\nfunction void apb_bus_monitor::report_phase(uvm_phase phase);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:118: Unsupported: scoped class reference\nfunction void apb_bus_monitor::report_phase(uvm_phase phase);\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:113: Unsupported: Out of class block function declaration\nfunction void apb_bus_monitor::perform_coverage();\n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:118: syntax error, unexpected IDENTIFIER, expecting \')\'\nfunction void apb_bus_monitor::report_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_bus_monitor.sv:119: Define or directive not defined: \'`uvm_info\'\n `uvm_info(get_type_name(), $sformatf("Report: APB monitor collected %0d transfers", num_transactions), UVM_LOW);\n ^~~~~~~~~\n%Error: Exiting due to 46 error(s)\n ... See the manual and https://verilator.org for more assistance.\n' | 308,388 | function | function void apb_bus_monitor::report_phase(uvm_phase phase);
`uvm_info(get_type_name(), $sformatf("Report: APB monitor collected %0d transfers", num_transactions), UVM_LOW);
endfunction | function void apb_bus_monitor::report_phase(uvm_phase phase); |
`uvm_info(get_type_name(), $sformatf("Report: APB monitor collected %0d transfers", num_transactions), UVM_LOW);
endfunction | 0 |
140,250 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv | 90,320,290 | apb_collector.sv | sv | 109 | 117 | [] | [] | [] | null | line:11: before: "class" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:11: Unsupported: classes\nclass apb_collector extends uvm_component;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:11: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_collector extends uvm_component;\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:14: Unsupported: virtual data type\n virtual apb_if vif;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:24: syntax error, unexpected IDENTIFIER\n uvm_analysis_port #(apb_transfer) item_collected_port;\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:28: Unsupported: event data types\n event addr_trans_grabbed;\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:30: syntax error, unexpected IDENTIFIER\n apb_transfer trans_collected;\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:33: Define or directive not defined: \'`uvm_component_utils_begin\'\n `uvm_component_utils_begin(apb_collector)\n ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:34: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(checks_enable, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:35: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(coverage_enable, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:36: Define or directive not defined: \'`uvm_component_utils_end\'\n `uvm_component_utils_end\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:39: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:39: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:47: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern virtual function void connect_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:48: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern task run_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:49: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern task peek(output apb_transfer trans);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:51: syntax error, unexpected extern\n extern virtual function void perform_checks();\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:57: Unsupported: super\n super.connect_phase(phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:58: syntax error, unexpected \'#\'\n if (!uvm_config_db#(virtual apb_if)::get(this, get_full_name(), "vif", vif))\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:59: Define or directive not defined: \'`uvm_error\'\n : ... Suggested alternative: \'`error\'\n `uvm_error("NOVIF", {"virtual interface must be set for: ", get_full_name(), ".vif"})\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:64: Unsupported: new with arguments\n trans_collected = new("trans_collected");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:66: syntax error, unexpected \'@\'\n @(posedge vif.pclk iff (vif.psel != 0));\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:67: Unsupported: this\n void\'(this.begin_tr(trans_collected));\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:77: syntax error, unexpected ->\n -> addr_trans_grabbed;\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:81: Unsupported: this\n this.end_tr(trans_collected);\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:85: Define or directive not defined: \'`uvm_info\'\n `uvm_info(get_type_name(), $sformatf("Transfer collected :\\n%s",\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:85: syntax error, unexpected \',\'\n `uvm_info(get_type_name(), $sformatf("Transfer collected :\\n%s",\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:91: Unsupported: Hierarchical class references\ntask apb_collector::peek(output apb_transfer trans);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:91: Unsupported: scoped class reference\ntask apb_collector::peek(output apb_transfer trans);\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:50: Unsupported: Out of class block function declaration\n extern virtual function void perform_coverage();\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:91: syntax error, unexpected IDENTIFIER, expecting \')\'\ntask apb_collector::peek(output apb_transfer trans);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:96: Unsupported: Hierarchical class references\nfunction void apb_collector::perform_coverage();\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:96: Unsupported: scoped class reference\nfunction void apb_collector::perform_coverage();\n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:91: Unsupported: Out of class block function declaration\ntask apb_collector::peek(output apb_transfer trans);\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:100: Unsupported: Hierarchical class references\nfunction void apb_collector::perform_checks();\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:100: Unsupported: scoped class reference\nfunction void apb_collector::perform_checks();\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:96: Unsupported: Out of class block function declaration\nfunction void apb_collector::perform_coverage();\n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:104: Unsupported: Hierarchical class references\nfunction void apb_collector::report_phase(uvm_phase phase);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:104: Unsupported: scoped class reference\nfunction void apb_collector::report_phase(uvm_phase phase);\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:100: Unsupported: Out of class block function declaration\nfunction void apb_collector::perform_checks();\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:104: syntax error, unexpected IDENTIFIER, expecting \')\'\nfunction void apb_collector::report_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:105: Define or directive not defined: \'`uvm_info\'\n `uvm_info(get_type_name(), $sformatf("Report: APB collector collected %0d transfers", num_transactions), UVM_LOW);\n ^~~~~~~~~\n%Error: Exiting due to 41 error(s)\n ... See the manual and https://verilator.org for more assistance.\n' | 308,389 | function | function new (string name, uvm_component parent);
super.new(name, parent);
item_collected_port = new("item_collected_port", this);
addr_trans_export = new("addr_trans_export", this);
endfunction | function new (string name, uvm_component parent); |
super.new(name, parent);
item_collected_port = new("item_collected_port", this);
addr_trans_export = new("addr_trans_export", this);
endfunction | 0 |
140,251 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv | 90,320,290 | apb_collector.sv | sv | 109 | 117 | [] | [] | [] | null | line:11: before: "class" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:11: Unsupported: classes\nclass apb_collector extends uvm_component;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:11: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_collector extends uvm_component;\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:14: Unsupported: virtual data type\n virtual apb_if vif;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:24: syntax error, unexpected IDENTIFIER\n uvm_analysis_port #(apb_transfer) item_collected_port;\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:28: Unsupported: event data types\n event addr_trans_grabbed;\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:30: syntax error, unexpected IDENTIFIER\n apb_transfer trans_collected;\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:33: Define or directive not defined: \'`uvm_component_utils_begin\'\n `uvm_component_utils_begin(apb_collector)\n ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:34: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(checks_enable, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:35: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(coverage_enable, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:36: Define or directive not defined: \'`uvm_component_utils_end\'\n `uvm_component_utils_end\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:39: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:39: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:47: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern virtual function void connect_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:48: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern task run_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:49: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern task peek(output apb_transfer trans);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:51: syntax error, unexpected extern\n extern virtual function void perform_checks();\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:57: Unsupported: super\n super.connect_phase(phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:58: syntax error, unexpected \'#\'\n if (!uvm_config_db#(virtual apb_if)::get(this, get_full_name(), "vif", vif))\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:59: Define or directive not defined: \'`uvm_error\'\n : ... Suggested alternative: \'`error\'\n `uvm_error("NOVIF", {"virtual interface must be set for: ", get_full_name(), ".vif"})\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:64: Unsupported: new with arguments\n trans_collected = new("trans_collected");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:66: syntax error, unexpected \'@\'\n @(posedge vif.pclk iff (vif.psel != 0));\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:67: Unsupported: this\n void\'(this.begin_tr(trans_collected));\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:77: syntax error, unexpected ->\n -> addr_trans_grabbed;\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:81: Unsupported: this\n this.end_tr(trans_collected);\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:85: Define or directive not defined: \'`uvm_info\'\n `uvm_info(get_type_name(), $sformatf("Transfer collected :\\n%s",\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:85: syntax error, unexpected \',\'\n `uvm_info(get_type_name(), $sformatf("Transfer collected :\\n%s",\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:91: Unsupported: Hierarchical class references\ntask apb_collector::peek(output apb_transfer trans);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:91: Unsupported: scoped class reference\ntask apb_collector::peek(output apb_transfer trans);\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:50: Unsupported: Out of class block function declaration\n extern virtual function void perform_coverage();\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:91: syntax error, unexpected IDENTIFIER, expecting \')\'\ntask apb_collector::peek(output apb_transfer trans);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:96: Unsupported: Hierarchical class references\nfunction void apb_collector::perform_coverage();\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:96: Unsupported: scoped class reference\nfunction void apb_collector::perform_coverage();\n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:91: Unsupported: Out of class block function declaration\ntask apb_collector::peek(output apb_transfer trans);\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:100: Unsupported: Hierarchical class references\nfunction void apb_collector::perform_checks();\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:100: Unsupported: scoped class reference\nfunction void apb_collector::perform_checks();\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:96: Unsupported: Out of class block function declaration\nfunction void apb_collector::perform_coverage();\n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:104: Unsupported: Hierarchical class references\nfunction void apb_collector::report_phase(uvm_phase phase);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:104: Unsupported: scoped class reference\nfunction void apb_collector::report_phase(uvm_phase phase);\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:100: Unsupported: Out of class block function declaration\nfunction void apb_collector::perform_checks();\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:104: syntax error, unexpected IDENTIFIER, expecting \')\'\nfunction void apb_collector::report_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:105: Define or directive not defined: \'`uvm_info\'\n `uvm_info(get_type_name(), $sformatf("Report: APB collector collected %0d transfers", num_transactions), UVM_LOW);\n ^~~~~~~~~\n%Error: Exiting due to 41 error(s)\n ... See the manual and https://verilator.org for more assistance.\n' | 308,389 | function | function void connect_phase(uvm_phase phase);
extern task run_phase(uvm_phase phase);
extern task peek(output apb_transfer trans);
extern virtual function void perform_coverage();
extern virtual function void perform_checks();
extern virtual function void report_phase(uvm_phase phase);
endclass : apb_collector
function void apb_collector::connect_phase(uvm_phase phase);
super.connect_phase(phase);
if (!uvm_config_db#(virtual apb_if)::get(this, get_full_name(), "vif", vif))
`uvm_error("NOVIF", {"virtual interface must be set for: ", get_full_name(), ".vif"})
endfunction | function void connect_phase(uvm_phase phase); |
extern task run_phase(uvm_phase phase);
extern task peek(output apb_transfer trans);
extern virtual function void perform_coverage();
extern virtual function void perform_checks();
extern virtual function void report_phase(uvm_phase phase);
endclass : apb_collector
function void apb_collector::connect_phase(uvm_phase phase);
super.connect_phase(phase);
if (!uvm_config_db#(virtual apb_if)::get(this, get_full_name(), "vif", vif))
`uvm_error("NOVIF", {"virtual interface must be set for: ", get_full_name(), ".vif"})
endfunction | 0 |
140,252 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv | 90,320,290 | apb_collector.sv | sv | 109 | 117 | [] | [] | [] | null | line:11: before: "class" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:11: Unsupported: classes\nclass apb_collector extends uvm_component;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:11: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_collector extends uvm_component;\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:14: Unsupported: virtual data type\n virtual apb_if vif;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:24: syntax error, unexpected IDENTIFIER\n uvm_analysis_port #(apb_transfer) item_collected_port;\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:28: Unsupported: event data types\n event addr_trans_grabbed;\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:30: syntax error, unexpected IDENTIFIER\n apb_transfer trans_collected;\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:33: Define or directive not defined: \'`uvm_component_utils_begin\'\n `uvm_component_utils_begin(apb_collector)\n ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:34: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(checks_enable, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:35: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(coverage_enable, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:36: Define or directive not defined: \'`uvm_component_utils_end\'\n `uvm_component_utils_end\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:39: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:39: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:47: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern virtual function void connect_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:48: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern task run_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:49: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern task peek(output apb_transfer trans);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:51: syntax error, unexpected extern\n extern virtual function void perform_checks();\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:57: Unsupported: super\n super.connect_phase(phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:58: syntax error, unexpected \'#\'\n if (!uvm_config_db#(virtual apb_if)::get(this, get_full_name(), "vif", vif))\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:59: Define or directive not defined: \'`uvm_error\'\n : ... Suggested alternative: \'`error\'\n `uvm_error("NOVIF", {"virtual interface must be set for: ", get_full_name(), ".vif"})\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:64: Unsupported: new with arguments\n trans_collected = new("trans_collected");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:66: syntax error, unexpected \'@\'\n @(posedge vif.pclk iff (vif.psel != 0));\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:67: Unsupported: this\n void\'(this.begin_tr(trans_collected));\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:77: syntax error, unexpected ->\n -> addr_trans_grabbed;\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:81: Unsupported: this\n this.end_tr(trans_collected);\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:85: Define or directive not defined: \'`uvm_info\'\n `uvm_info(get_type_name(), $sformatf("Transfer collected :\\n%s",\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:85: syntax error, unexpected \',\'\n `uvm_info(get_type_name(), $sformatf("Transfer collected :\\n%s",\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:91: Unsupported: Hierarchical class references\ntask apb_collector::peek(output apb_transfer trans);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:91: Unsupported: scoped class reference\ntask apb_collector::peek(output apb_transfer trans);\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:50: Unsupported: Out of class block function declaration\n extern virtual function void perform_coverage();\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:91: syntax error, unexpected IDENTIFIER, expecting \')\'\ntask apb_collector::peek(output apb_transfer trans);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:96: Unsupported: Hierarchical class references\nfunction void apb_collector::perform_coverage();\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:96: Unsupported: scoped class reference\nfunction void apb_collector::perform_coverage();\n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:91: Unsupported: Out of class block function declaration\ntask apb_collector::peek(output apb_transfer trans);\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:100: Unsupported: Hierarchical class references\nfunction void apb_collector::perform_checks();\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:100: Unsupported: scoped class reference\nfunction void apb_collector::perform_checks();\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:96: Unsupported: Out of class block function declaration\nfunction void apb_collector::perform_coverage();\n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:104: Unsupported: Hierarchical class references\nfunction void apb_collector::report_phase(uvm_phase phase);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:104: Unsupported: scoped class reference\nfunction void apb_collector::report_phase(uvm_phase phase);\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:100: Unsupported: Out of class block function declaration\nfunction void apb_collector::perform_checks();\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:104: syntax error, unexpected IDENTIFIER, expecting \')\'\nfunction void apb_collector::report_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:105: Define or directive not defined: \'`uvm_info\'\n `uvm_info(get_type_name(), $sformatf("Report: APB collector collected %0d transfers", num_transactions), UVM_LOW);\n ^~~~~~~~~\n%Error: Exiting due to 41 error(s)\n ... See the manual and https://verilator.org for more assistance.\n' | 308,389 | function | function void apb_collector::perform_coverage();
endfunction | function void apb_collector::perform_coverage(); |
endfunction | 0 |
140,253 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv | 90,320,290 | apb_collector.sv | sv | 109 | 117 | [] | [] | [] | null | line:11: before: "class" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:11: Unsupported: classes\nclass apb_collector extends uvm_component;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:11: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_collector extends uvm_component;\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:14: Unsupported: virtual data type\n virtual apb_if vif;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:24: syntax error, unexpected IDENTIFIER\n uvm_analysis_port #(apb_transfer) item_collected_port;\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:28: Unsupported: event data types\n event addr_trans_grabbed;\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:30: syntax error, unexpected IDENTIFIER\n apb_transfer trans_collected;\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:33: Define or directive not defined: \'`uvm_component_utils_begin\'\n `uvm_component_utils_begin(apb_collector)\n ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:34: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(checks_enable, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:35: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(coverage_enable, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:36: Define or directive not defined: \'`uvm_component_utils_end\'\n `uvm_component_utils_end\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:39: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:39: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:47: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern virtual function void connect_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:48: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern task run_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:49: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern task peek(output apb_transfer trans);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:51: syntax error, unexpected extern\n extern virtual function void perform_checks();\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:57: Unsupported: super\n super.connect_phase(phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:58: syntax error, unexpected \'#\'\n if (!uvm_config_db#(virtual apb_if)::get(this, get_full_name(), "vif", vif))\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:59: Define or directive not defined: \'`uvm_error\'\n : ... Suggested alternative: \'`error\'\n `uvm_error("NOVIF", {"virtual interface must be set for: ", get_full_name(), ".vif"})\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:64: Unsupported: new with arguments\n trans_collected = new("trans_collected");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:66: syntax error, unexpected \'@\'\n @(posedge vif.pclk iff (vif.psel != 0));\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:67: Unsupported: this\n void\'(this.begin_tr(trans_collected));\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:77: syntax error, unexpected ->\n -> addr_trans_grabbed;\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:81: Unsupported: this\n this.end_tr(trans_collected);\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:85: Define or directive not defined: \'`uvm_info\'\n `uvm_info(get_type_name(), $sformatf("Transfer collected :\\n%s",\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:85: syntax error, unexpected \',\'\n `uvm_info(get_type_name(), $sformatf("Transfer collected :\\n%s",\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:91: Unsupported: Hierarchical class references\ntask apb_collector::peek(output apb_transfer trans);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:91: Unsupported: scoped class reference\ntask apb_collector::peek(output apb_transfer trans);\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:50: Unsupported: Out of class block function declaration\n extern virtual function void perform_coverage();\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:91: syntax error, unexpected IDENTIFIER, expecting \')\'\ntask apb_collector::peek(output apb_transfer trans);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:96: Unsupported: Hierarchical class references\nfunction void apb_collector::perform_coverage();\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:96: Unsupported: scoped class reference\nfunction void apb_collector::perform_coverage();\n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:91: Unsupported: Out of class block function declaration\ntask apb_collector::peek(output apb_transfer trans);\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:100: Unsupported: Hierarchical class references\nfunction void apb_collector::perform_checks();\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:100: Unsupported: scoped class reference\nfunction void apb_collector::perform_checks();\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:96: Unsupported: Out of class block function declaration\nfunction void apb_collector::perform_coverage();\n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:104: Unsupported: Hierarchical class references\nfunction void apb_collector::report_phase(uvm_phase phase);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:104: Unsupported: scoped class reference\nfunction void apb_collector::report_phase(uvm_phase phase);\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:100: Unsupported: Out of class block function declaration\nfunction void apb_collector::perform_checks();\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:104: syntax error, unexpected IDENTIFIER, expecting \')\'\nfunction void apb_collector::report_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:105: Define or directive not defined: \'`uvm_info\'\n `uvm_info(get_type_name(), $sformatf("Report: APB collector collected %0d transfers", num_transactions), UVM_LOW);\n ^~~~~~~~~\n%Error: Exiting due to 41 error(s)\n ... See the manual and https://verilator.org for more assistance.\n' | 308,389 | function | function void apb_collector::perform_checks();
endfunction | function void apb_collector::perform_checks(); |
endfunction | 0 |
140,254 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv | 90,320,290 | apb_collector.sv | sv | 109 | 117 | [] | [] | [] | null | line:11: before: "class" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:11: Unsupported: classes\nclass apb_collector extends uvm_component;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:11: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_collector extends uvm_component;\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:14: Unsupported: virtual data type\n virtual apb_if vif;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:24: syntax error, unexpected IDENTIFIER\n uvm_analysis_port #(apb_transfer) item_collected_port;\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:28: Unsupported: event data types\n event addr_trans_grabbed;\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:30: syntax error, unexpected IDENTIFIER\n apb_transfer trans_collected;\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:33: Define or directive not defined: \'`uvm_component_utils_begin\'\n `uvm_component_utils_begin(apb_collector)\n ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:34: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(checks_enable, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:35: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(coverage_enable, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:36: Define or directive not defined: \'`uvm_component_utils_end\'\n `uvm_component_utils_end\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:39: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:39: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:47: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern virtual function void connect_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:48: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern task run_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:49: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern task peek(output apb_transfer trans);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:51: syntax error, unexpected extern\n extern virtual function void perform_checks();\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:57: Unsupported: super\n super.connect_phase(phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:58: syntax error, unexpected \'#\'\n if (!uvm_config_db#(virtual apb_if)::get(this, get_full_name(), "vif", vif))\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:59: Define or directive not defined: \'`uvm_error\'\n : ... Suggested alternative: \'`error\'\n `uvm_error("NOVIF", {"virtual interface must be set for: ", get_full_name(), ".vif"})\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:64: Unsupported: new with arguments\n trans_collected = new("trans_collected");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:66: syntax error, unexpected \'@\'\n @(posedge vif.pclk iff (vif.psel != 0));\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:67: Unsupported: this\n void\'(this.begin_tr(trans_collected));\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:77: syntax error, unexpected ->\n -> addr_trans_grabbed;\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:81: Unsupported: this\n this.end_tr(trans_collected);\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:85: Define or directive not defined: \'`uvm_info\'\n `uvm_info(get_type_name(), $sformatf("Transfer collected :\\n%s",\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:85: syntax error, unexpected \',\'\n `uvm_info(get_type_name(), $sformatf("Transfer collected :\\n%s",\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:91: Unsupported: Hierarchical class references\ntask apb_collector::peek(output apb_transfer trans);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:91: Unsupported: scoped class reference\ntask apb_collector::peek(output apb_transfer trans);\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:50: Unsupported: Out of class block function declaration\n extern virtual function void perform_coverage();\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:91: syntax error, unexpected IDENTIFIER, expecting \')\'\ntask apb_collector::peek(output apb_transfer trans);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:96: Unsupported: Hierarchical class references\nfunction void apb_collector::perform_coverage();\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:96: Unsupported: scoped class reference\nfunction void apb_collector::perform_coverage();\n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:91: Unsupported: Out of class block function declaration\ntask apb_collector::peek(output apb_transfer trans);\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:100: Unsupported: Hierarchical class references\nfunction void apb_collector::perform_checks();\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:100: Unsupported: scoped class reference\nfunction void apb_collector::perform_checks();\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:96: Unsupported: Out of class block function declaration\nfunction void apb_collector::perform_coverage();\n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:104: Unsupported: Hierarchical class references\nfunction void apb_collector::report_phase(uvm_phase phase);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:104: Unsupported: scoped class reference\nfunction void apb_collector::report_phase(uvm_phase phase);\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:100: Unsupported: Out of class block function declaration\nfunction void apb_collector::perform_checks();\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:104: syntax error, unexpected IDENTIFIER, expecting \')\'\nfunction void apb_collector::report_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_collector.sv:105: Define or directive not defined: \'`uvm_info\'\n `uvm_info(get_type_name(), $sformatf("Report: APB collector collected %0d transfers", num_transactions), UVM_LOW);\n ^~~~~~~~~\n%Error: Exiting due to 41 error(s)\n ... See the manual and https://verilator.org for more assistance.\n' | 308,389 | function | function void apb_collector::report_phase(uvm_phase phase);
`uvm_info(get_type_name(), $sformatf("Report: APB collector collected %0d transfers", num_transactions), UVM_LOW);
endfunction | function void apb_collector::report_phase(uvm_phase phase); |
`uvm_info(get_type_name(), $sformatf("Report: APB collector collected %0d transfers", num_transactions), UVM_LOW);
endfunction | 0 |
140,255 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv | 90,320,290 | apb_config.sv | sv | 163 | 99 | [] | [] | [] | null | line:17: before: "class" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:17: Unsupported: classes\nclass apb_slave_config extends uvm_object;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:17: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_slave_config extends uvm_object;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:19: syntax error, unexpected rand\n rand uvm_active_passive_enum is_active = UVM_ACTIVE;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:21: syntax error, unexpected rand\n rand int unsigned end_address;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:22: syntax error, unexpected rand\n rand int psel_index;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:25: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint addr_cst { start_address <= end_address; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:25: syntax error, unexpected IDENTIFIER\n constraint addr_cst { start_address <= end_address; }\n ^~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:26: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint psel_cst { psel_index inside {[0:15]}; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:28: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(apb_slave_config)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:30: Define or directive not defined: \'`uvm_field_string\'\n `uvm_field_string(name, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:31: Define or directive not defined: \'`uvm_field_enum\'\n `uvm_field_enum(uvm_active_passive_enum, is_active, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:32: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(start_address, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:33: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(end_address, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:34: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(psel_index, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:35: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:38: Unsupported: new constructor\n function new (string name = "apb_slave_config");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:39: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:39: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:39: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:47: syntax error, unexpected endclass\nendclass : apb_slave_config\n^~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:50: Unsupported: classes\nclass apb_master_config extends uvm_object;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:50: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_master_config extends uvm_object;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:53: syntax error, unexpected IDENTIFIER\n uvm_active_passive_enum is_active = UVM_ACTIVE;\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:55: Unsupported: new constructor\n function new (string name = "unnamed-apb_master_config");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:56: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:56: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:56: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:59: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(apb_master_config)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:59: syntax error, unexpected \'(\'\n `uvm_object_utils_begin(apb_master_config)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:61: Define or directive not defined: \'`uvm_field_string\'\n `uvm_field_string(name, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:62: Define or directive not defined: \'`uvm_field_enum\'\n `uvm_field_enum(uvm_active_passive_enum, is_active, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:63: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:68: Unsupported: classes\nclass apb_config extends uvm_object;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:68: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_config extends uvm_object;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:72: syntax error, unexpected rand\n rand apb_slave_config slave_configs[$];\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:73: syntax error, unexpected rand\n rand int num_slaves;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:77: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(apb_config)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:77: syntax error, unexpected \'(\'\n `uvm_object_utils_begin(apb_config)\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:78: Define or directive not defined: \'`uvm_field_queue_object\'\n `uvm_field_queue_object(slave_configs, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:79: Define or directive not defined: \'`uvm_field_object\'\n `uvm_field_object(master_config, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:80: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(num_slaves, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:81: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(has_bus_monitor, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:82: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:84: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint c_num_slaves { num_slaves inside {[1:4]}; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:86: Unsupported: new constructor\n function new (string name = "unnamed-apb_config");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:87: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:87: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:87: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:93: Unsupported: Hierarchical class references\n slave_configs[i] = apb_slave_config::type_id::create($sformatf("slave%0d", i));\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:93: Unsupported: scoped class reference\n slave_configs[i] = apb_slave_config::type_id::create($sformatf("slave%0d", i));\n ^~~~~~~\n%Error: Exiting due to too many errors encountered; --error-limit=50\n ... See the manual and https://verilator.org for more assistance.\n' | 308,390 | function | function new (string name = "apb_slave_config");
super.new(name);
endfunction | function new (string name = "apb_slave_config"); |
super.new(name);
endfunction | 0 |
140,256 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv | 90,320,290 | apb_config.sv | sv | 163 | 99 | [] | [] | [] | null | line:17: before: "class" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:17: Unsupported: classes\nclass apb_slave_config extends uvm_object;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:17: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_slave_config extends uvm_object;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:19: syntax error, unexpected rand\n rand uvm_active_passive_enum is_active = UVM_ACTIVE;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:21: syntax error, unexpected rand\n rand int unsigned end_address;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:22: syntax error, unexpected rand\n rand int psel_index;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:25: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint addr_cst { start_address <= end_address; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:25: syntax error, unexpected IDENTIFIER\n constraint addr_cst { start_address <= end_address; }\n ^~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:26: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint psel_cst { psel_index inside {[0:15]}; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:28: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(apb_slave_config)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:30: Define or directive not defined: \'`uvm_field_string\'\n `uvm_field_string(name, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:31: Define or directive not defined: \'`uvm_field_enum\'\n `uvm_field_enum(uvm_active_passive_enum, is_active, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:32: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(start_address, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:33: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(end_address, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:34: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(psel_index, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:35: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:38: Unsupported: new constructor\n function new (string name = "apb_slave_config");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:39: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:39: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:39: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:47: syntax error, unexpected endclass\nendclass : apb_slave_config\n^~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:50: Unsupported: classes\nclass apb_master_config extends uvm_object;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:50: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_master_config extends uvm_object;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:53: syntax error, unexpected IDENTIFIER\n uvm_active_passive_enum is_active = UVM_ACTIVE;\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:55: Unsupported: new constructor\n function new (string name = "unnamed-apb_master_config");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:56: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:56: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:56: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:59: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(apb_master_config)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:59: syntax error, unexpected \'(\'\n `uvm_object_utils_begin(apb_master_config)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:61: Define or directive not defined: \'`uvm_field_string\'\n `uvm_field_string(name, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:62: Define or directive not defined: \'`uvm_field_enum\'\n `uvm_field_enum(uvm_active_passive_enum, is_active, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:63: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:68: Unsupported: classes\nclass apb_config extends uvm_object;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:68: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_config extends uvm_object;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:72: syntax error, unexpected rand\n rand apb_slave_config slave_configs[$];\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:73: syntax error, unexpected rand\n rand int num_slaves;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:77: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(apb_config)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:77: syntax error, unexpected \'(\'\n `uvm_object_utils_begin(apb_config)\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:78: Define or directive not defined: \'`uvm_field_queue_object\'\n `uvm_field_queue_object(slave_configs, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:79: Define or directive not defined: \'`uvm_field_object\'\n `uvm_field_object(master_config, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:80: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(num_slaves, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:81: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(has_bus_monitor, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:82: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:84: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint c_num_slaves { num_slaves inside {[1:4]}; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:86: Unsupported: new constructor\n function new (string name = "unnamed-apb_config");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:87: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:87: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:87: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:93: Unsupported: Hierarchical class references\n slave_configs[i] = apb_slave_config::type_id::create($sformatf("slave%0d", i));\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:93: Unsupported: scoped class reference\n slave_configs[i] = apb_slave_config::type_id::create($sformatf("slave%0d", i));\n ^~~~~~~\n%Error: Exiting due to too many errors encountered; --error-limit=50\n ... See the manual and https://verilator.org for more assistance.\n' | 308,390 | function | function bit check_address_range(int unsigned addr);
return (!((start_address > addr) || (end_address < addr)));
endfunction | function bit check_address_range(int unsigned addr); |
return (!((start_address > addr) || (end_address < addr)));
endfunction | 0 |
140,257 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv | 90,320,290 | apb_config.sv | sv | 163 | 99 | [] | [] | [] | null | line:17: before: "class" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:17: Unsupported: classes\nclass apb_slave_config extends uvm_object;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:17: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_slave_config extends uvm_object;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:19: syntax error, unexpected rand\n rand uvm_active_passive_enum is_active = UVM_ACTIVE;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:21: syntax error, unexpected rand\n rand int unsigned end_address;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:22: syntax error, unexpected rand\n rand int psel_index;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:25: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint addr_cst { start_address <= end_address; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:25: syntax error, unexpected IDENTIFIER\n constraint addr_cst { start_address <= end_address; }\n ^~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:26: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint psel_cst { psel_index inside {[0:15]}; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:28: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(apb_slave_config)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:30: Define or directive not defined: \'`uvm_field_string\'\n `uvm_field_string(name, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:31: Define or directive not defined: \'`uvm_field_enum\'\n `uvm_field_enum(uvm_active_passive_enum, is_active, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:32: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(start_address, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:33: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(end_address, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:34: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(psel_index, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:35: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:38: Unsupported: new constructor\n function new (string name = "apb_slave_config");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:39: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:39: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:39: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:47: syntax error, unexpected endclass\nendclass : apb_slave_config\n^~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:50: Unsupported: classes\nclass apb_master_config extends uvm_object;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:50: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_master_config extends uvm_object;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:53: syntax error, unexpected IDENTIFIER\n uvm_active_passive_enum is_active = UVM_ACTIVE;\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:55: Unsupported: new constructor\n function new (string name = "unnamed-apb_master_config");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:56: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:56: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:56: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:59: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(apb_master_config)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:59: syntax error, unexpected \'(\'\n `uvm_object_utils_begin(apb_master_config)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:61: Define or directive not defined: \'`uvm_field_string\'\n `uvm_field_string(name, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:62: Define or directive not defined: \'`uvm_field_enum\'\n `uvm_field_enum(uvm_active_passive_enum, is_active, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:63: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:68: Unsupported: classes\nclass apb_config extends uvm_object;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:68: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_config extends uvm_object;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:72: syntax error, unexpected rand\n rand apb_slave_config slave_configs[$];\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:73: syntax error, unexpected rand\n rand int num_slaves;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:77: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(apb_config)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:77: syntax error, unexpected \'(\'\n `uvm_object_utils_begin(apb_config)\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:78: Define or directive not defined: \'`uvm_field_queue_object\'\n `uvm_field_queue_object(slave_configs, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:79: Define or directive not defined: \'`uvm_field_object\'\n `uvm_field_object(master_config, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:80: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(num_slaves, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:81: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(has_bus_monitor, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:82: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:84: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint c_num_slaves { num_slaves inside {[1:4]}; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:86: Unsupported: new constructor\n function new (string name = "unnamed-apb_config");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:87: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:87: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:87: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:93: Unsupported: Hierarchical class references\n slave_configs[i] = apb_slave_config::type_id::create($sformatf("slave%0d", i));\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:93: Unsupported: scoped class reference\n slave_configs[i] = apb_slave_config::type_id::create($sformatf("slave%0d", i));\n ^~~~~~~\n%Error: Exiting due to too many errors encountered; --error-limit=50\n ... See the manual and https://verilator.org for more assistance.\n' | 308,390 | function | function new (string name = "unnamed-apb_master_config");
super.new(name);
endfunction | function new (string name = "unnamed-apb_master_config"); |
super.new(name);
endfunction | 0 |
140,258 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv | 90,320,290 | apb_config.sv | sv | 163 | 99 | [] | [] | [] | null | line:17: before: "class" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:17: Unsupported: classes\nclass apb_slave_config extends uvm_object;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:17: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_slave_config extends uvm_object;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:19: syntax error, unexpected rand\n rand uvm_active_passive_enum is_active = UVM_ACTIVE;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:21: syntax error, unexpected rand\n rand int unsigned end_address;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:22: syntax error, unexpected rand\n rand int psel_index;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:25: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint addr_cst { start_address <= end_address; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:25: syntax error, unexpected IDENTIFIER\n constraint addr_cst { start_address <= end_address; }\n ^~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:26: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint psel_cst { psel_index inside {[0:15]}; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:28: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(apb_slave_config)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:30: Define or directive not defined: \'`uvm_field_string\'\n `uvm_field_string(name, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:31: Define or directive not defined: \'`uvm_field_enum\'\n `uvm_field_enum(uvm_active_passive_enum, is_active, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:32: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(start_address, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:33: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(end_address, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:34: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(psel_index, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:35: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:38: Unsupported: new constructor\n function new (string name = "apb_slave_config");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:39: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:39: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:39: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:47: syntax error, unexpected endclass\nendclass : apb_slave_config\n^~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:50: Unsupported: classes\nclass apb_master_config extends uvm_object;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:50: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_master_config extends uvm_object;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:53: syntax error, unexpected IDENTIFIER\n uvm_active_passive_enum is_active = UVM_ACTIVE;\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:55: Unsupported: new constructor\n function new (string name = "unnamed-apb_master_config");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:56: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:56: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:56: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:59: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(apb_master_config)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:59: syntax error, unexpected \'(\'\n `uvm_object_utils_begin(apb_master_config)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:61: Define or directive not defined: \'`uvm_field_string\'\n `uvm_field_string(name, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:62: Define or directive not defined: \'`uvm_field_enum\'\n `uvm_field_enum(uvm_active_passive_enum, is_active, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:63: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:68: Unsupported: classes\nclass apb_config extends uvm_object;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:68: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_config extends uvm_object;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:72: syntax error, unexpected rand\n rand apb_slave_config slave_configs[$];\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:73: syntax error, unexpected rand\n rand int num_slaves;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:77: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(apb_config)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:77: syntax error, unexpected \'(\'\n `uvm_object_utils_begin(apb_config)\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:78: Define or directive not defined: \'`uvm_field_queue_object\'\n `uvm_field_queue_object(slave_configs, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:79: Define or directive not defined: \'`uvm_field_object\'\n `uvm_field_object(master_config, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:80: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(num_slaves, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:81: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(has_bus_monitor, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:82: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:84: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint c_num_slaves { num_slaves inside {[1:4]}; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:86: Unsupported: new constructor\n function new (string name = "unnamed-apb_config");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:87: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:87: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:87: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:93: Unsupported: Hierarchical class references\n slave_configs[i] = apb_slave_config::type_id::create($sformatf("slave%0d", i));\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:93: Unsupported: scoped class reference\n slave_configs[i] = apb_slave_config::type_id::create($sformatf("slave%0d", i));\n ^~~~~~~\n%Error: Exiting due to too many errors encountered; --error-limit=50\n ... See the manual and https://verilator.org for more assistance.\n' | 308,390 | function | function new (string name = "unnamed-apb_config");
super.new(name);
endfunction | function new (string name = "unnamed-apb_config"); |
super.new(name);
endfunction | 0 |
140,259 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv | 90,320,290 | apb_config.sv | sv | 163 | 99 | [] | [] | [] | null | line:17: before: "class" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:17: Unsupported: classes\nclass apb_slave_config extends uvm_object;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:17: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_slave_config extends uvm_object;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:19: syntax error, unexpected rand\n rand uvm_active_passive_enum is_active = UVM_ACTIVE;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:21: syntax error, unexpected rand\n rand int unsigned end_address;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:22: syntax error, unexpected rand\n rand int psel_index;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:25: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint addr_cst { start_address <= end_address; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:25: syntax error, unexpected IDENTIFIER\n constraint addr_cst { start_address <= end_address; }\n ^~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:26: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint psel_cst { psel_index inside {[0:15]}; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:28: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(apb_slave_config)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:30: Define or directive not defined: \'`uvm_field_string\'\n `uvm_field_string(name, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:31: Define or directive not defined: \'`uvm_field_enum\'\n `uvm_field_enum(uvm_active_passive_enum, is_active, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:32: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(start_address, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:33: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(end_address, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:34: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(psel_index, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:35: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:38: Unsupported: new constructor\n function new (string name = "apb_slave_config");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:39: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:39: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:39: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:47: syntax error, unexpected endclass\nendclass : apb_slave_config\n^~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:50: Unsupported: classes\nclass apb_master_config extends uvm_object;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:50: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_master_config extends uvm_object;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:53: syntax error, unexpected IDENTIFIER\n uvm_active_passive_enum is_active = UVM_ACTIVE;\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:55: Unsupported: new constructor\n function new (string name = "unnamed-apb_master_config");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:56: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:56: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:56: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:59: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(apb_master_config)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:59: syntax error, unexpected \'(\'\n `uvm_object_utils_begin(apb_master_config)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:61: Define or directive not defined: \'`uvm_field_string\'\n `uvm_field_string(name, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:62: Define or directive not defined: \'`uvm_field_enum\'\n `uvm_field_enum(uvm_active_passive_enum, is_active, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:63: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:68: Unsupported: classes\nclass apb_config extends uvm_object;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:68: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_config extends uvm_object;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:72: syntax error, unexpected rand\n rand apb_slave_config slave_configs[$];\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:73: syntax error, unexpected rand\n rand int num_slaves;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:77: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(apb_config)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:77: syntax error, unexpected \'(\'\n `uvm_object_utils_begin(apb_config)\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:78: Define or directive not defined: \'`uvm_field_queue_object\'\n `uvm_field_queue_object(slave_configs, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:79: Define or directive not defined: \'`uvm_field_object\'\n `uvm_field_object(master_config, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:80: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(num_slaves, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:81: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(has_bus_monitor, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:82: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:84: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint c_num_slaves { num_slaves inside {[1:4]}; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:86: Unsupported: new constructor\n function new (string name = "unnamed-apb_config");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:87: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:87: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:87: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:93: Unsupported: Hierarchical class references\n slave_configs[i] = apb_slave_config::type_id::create($sformatf("slave%0d", i));\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:93: Unsupported: scoped class reference\n slave_configs[i] = apb_slave_config::type_id::create($sformatf("slave%0d", i));\n ^~~~~~~\n%Error: Exiting due to too many errors encountered; --error-limit=50\n ... See the manual and https://verilator.org for more assistance.\n' | 308,390 | function | function void post_randomize();
add_master("master", UVM_ACTIVE);
for( int i=0; i<num_slaves; i++) begin
slave_configs[i] = apb_slave_config::type_id::create($sformatf("slave%0d", i));
if(!slave_configs[i].randomize() with { psel_index == i; })
`uvm_fatal("RNDFAIL", "SLAVE config rand failed")
end
endfunction | function void post_randomize(); |
add_master("master", UVM_ACTIVE);
for( int i=0; i<num_slaves; i++) begin
slave_configs[i] = apb_slave_config::type_id::create($sformatf("slave%0d", i));
if(!slave_configs[i].randomize() with { psel_index == i; })
`uvm_fatal("RNDFAIL", "SLAVE config rand failed")
end
endfunction | 0 |
140,260 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv | 90,320,290 | apb_config.sv | sv | 163 | 99 | [] | [] | [] | null | line:17: before: "class" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:17: Unsupported: classes\nclass apb_slave_config extends uvm_object;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:17: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_slave_config extends uvm_object;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:19: syntax error, unexpected rand\n rand uvm_active_passive_enum is_active = UVM_ACTIVE;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:21: syntax error, unexpected rand\n rand int unsigned end_address;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:22: syntax error, unexpected rand\n rand int psel_index;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:25: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint addr_cst { start_address <= end_address; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:25: syntax error, unexpected IDENTIFIER\n constraint addr_cst { start_address <= end_address; }\n ^~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:26: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint psel_cst { psel_index inside {[0:15]}; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:28: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(apb_slave_config)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:30: Define or directive not defined: \'`uvm_field_string\'\n `uvm_field_string(name, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:31: Define or directive not defined: \'`uvm_field_enum\'\n `uvm_field_enum(uvm_active_passive_enum, is_active, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:32: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(start_address, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:33: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(end_address, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:34: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(psel_index, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:35: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:38: Unsupported: new constructor\n function new (string name = "apb_slave_config");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:39: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:39: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:39: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:47: syntax error, unexpected endclass\nendclass : apb_slave_config\n^~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:50: Unsupported: classes\nclass apb_master_config extends uvm_object;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:50: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_master_config extends uvm_object;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:53: syntax error, unexpected IDENTIFIER\n uvm_active_passive_enum is_active = UVM_ACTIVE;\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:55: Unsupported: new constructor\n function new (string name = "unnamed-apb_master_config");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:56: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:56: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:56: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:59: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(apb_master_config)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:59: syntax error, unexpected \'(\'\n `uvm_object_utils_begin(apb_master_config)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:61: Define or directive not defined: \'`uvm_field_string\'\n `uvm_field_string(name, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:62: Define or directive not defined: \'`uvm_field_enum\'\n `uvm_field_enum(uvm_active_passive_enum, is_active, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:63: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:68: Unsupported: classes\nclass apb_config extends uvm_object;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:68: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_config extends uvm_object;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:72: syntax error, unexpected rand\n rand apb_slave_config slave_configs[$];\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:73: syntax error, unexpected rand\n rand int num_slaves;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:77: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(apb_config)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:77: syntax error, unexpected \'(\'\n `uvm_object_utils_begin(apb_config)\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:78: Define or directive not defined: \'`uvm_field_queue_object\'\n `uvm_field_queue_object(slave_configs, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:79: Define or directive not defined: \'`uvm_field_object\'\n `uvm_field_object(master_config, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:80: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(num_slaves, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:81: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(has_bus_monitor, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:82: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:84: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint c_num_slaves { num_slaves inside {[1:4]}; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:86: Unsupported: new constructor\n function new (string name = "unnamed-apb_config");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:87: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:87: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:87: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:93: Unsupported: Hierarchical class references\n slave_configs[i] = apb_slave_config::type_id::create($sformatf("slave%0d", i));\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:93: Unsupported: scoped class reference\n slave_configs[i] = apb_slave_config::type_id::create($sformatf("slave%0d", i));\n ^~~~~~~\n%Error: Exiting due to too many errors encountered; --error-limit=50\n ... See the manual and https://verilator.org for more assistance.\n' | 308,390 | function | function void add_slave(string name, int start_addr, int end_addr,
int psel_indx, uvm_active_passive_enum is_active = UVM_ACTIVE);
extern function void add_master(string name,
uvm_active_passive_enum is_active = UVM_ACTIVE);
extern function int get_slave_psel_by_addr(int addr);
extern function string get_slave_name_by_addr(int addr);
endclass : apb_config
function void apb_config::add_slave(string name, int start_addr, int end_addr,
int psel_indx, uvm_active_passive_enum is_active = UVM_ACTIVE);
apb_slave_config tmp_slave_cfg;
num_slaves++;
tmp_slave_cfg = apb_slave_config::type_id::create("slave_config");
tmp_slave_cfg.name = name;
tmp_slave_cfg.start_address = start_addr;
tmp_slave_cfg.end_address = end_addr;
tmp_slave_cfg.psel_index = psel_indx;
tmp_slave_cfg.is_active = is_active;
slave_configs.push_back(tmp_slave_cfg);
endfunction | function void add_slave(string name, int start_addr, int end_addr,
int psel_indx, uvm_active_passive_enum is_active = UVM_ACTIVE); |
extern function void add_master(string name,
uvm_active_passive_enum is_active = UVM_ACTIVE);
extern function int get_slave_psel_by_addr(int addr);
extern function string get_slave_name_by_addr(int addr);
endclass : apb_config
function void apb_config::add_slave(string name, int start_addr, int end_addr,
int psel_indx, uvm_active_passive_enum is_active = UVM_ACTIVE);
apb_slave_config tmp_slave_cfg;
num_slaves++;
tmp_slave_cfg = apb_slave_config::type_id::create("slave_config");
tmp_slave_cfg.name = name;
tmp_slave_cfg.start_address = start_addr;
tmp_slave_cfg.end_address = end_addr;
tmp_slave_cfg.psel_index = psel_indx;
tmp_slave_cfg.is_active = is_active;
slave_configs.push_back(tmp_slave_cfg);
endfunction | 0 |
140,261 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv | 90,320,290 | apb_config.sv | sv | 163 | 99 | [] | [] | [] | null | line:17: before: "class" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:17: Unsupported: classes\nclass apb_slave_config extends uvm_object;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:17: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_slave_config extends uvm_object;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:19: syntax error, unexpected rand\n rand uvm_active_passive_enum is_active = UVM_ACTIVE;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:21: syntax error, unexpected rand\n rand int unsigned end_address;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:22: syntax error, unexpected rand\n rand int psel_index;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:25: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint addr_cst { start_address <= end_address; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:25: syntax error, unexpected IDENTIFIER\n constraint addr_cst { start_address <= end_address; }\n ^~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:26: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint psel_cst { psel_index inside {[0:15]}; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:28: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(apb_slave_config)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:30: Define or directive not defined: \'`uvm_field_string\'\n `uvm_field_string(name, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:31: Define or directive not defined: \'`uvm_field_enum\'\n `uvm_field_enum(uvm_active_passive_enum, is_active, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:32: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(start_address, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:33: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(end_address, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:34: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(psel_index, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:35: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:38: Unsupported: new constructor\n function new (string name = "apb_slave_config");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:39: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:39: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:39: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:47: syntax error, unexpected endclass\nendclass : apb_slave_config\n^~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:50: Unsupported: classes\nclass apb_master_config extends uvm_object;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:50: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_master_config extends uvm_object;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:53: syntax error, unexpected IDENTIFIER\n uvm_active_passive_enum is_active = UVM_ACTIVE;\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:55: Unsupported: new constructor\n function new (string name = "unnamed-apb_master_config");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:56: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:56: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:56: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:59: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(apb_master_config)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:59: syntax error, unexpected \'(\'\n `uvm_object_utils_begin(apb_master_config)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:61: Define or directive not defined: \'`uvm_field_string\'\n `uvm_field_string(name, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:62: Define or directive not defined: \'`uvm_field_enum\'\n `uvm_field_enum(uvm_active_passive_enum, is_active, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:63: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:68: Unsupported: classes\nclass apb_config extends uvm_object;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:68: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_config extends uvm_object;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:72: syntax error, unexpected rand\n rand apb_slave_config slave_configs[$];\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:73: syntax error, unexpected rand\n rand int num_slaves;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:77: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(apb_config)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:77: syntax error, unexpected \'(\'\n `uvm_object_utils_begin(apb_config)\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:78: Define or directive not defined: \'`uvm_field_queue_object\'\n `uvm_field_queue_object(slave_configs, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:79: Define or directive not defined: \'`uvm_field_object\'\n `uvm_field_object(master_config, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:80: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(num_slaves, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:81: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(has_bus_monitor, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:82: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:84: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint c_num_slaves { num_slaves inside {[1:4]}; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:86: Unsupported: new constructor\n function new (string name = "unnamed-apb_config");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:87: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:87: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:87: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:93: Unsupported: Hierarchical class references\n slave_configs[i] = apb_slave_config::type_id::create($sformatf("slave%0d", i));\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:93: Unsupported: scoped class reference\n slave_configs[i] = apb_slave_config::type_id::create($sformatf("slave%0d", i));\n ^~~~~~~\n%Error: Exiting due to too many errors encountered; --error-limit=50\n ... See the manual and https://verilator.org for more assistance.\n' | 308,390 | function | function void apb_config::add_master(string name, uvm_active_passive_enum is_active = UVM_ACTIVE);
master_config = apb_master_config::type_id::create("master_config");
master_config.name = name;
master_config.is_active = is_active;
endfunction | function void apb_config::add_master(string name, uvm_active_passive_enum is_active = UVM_ACTIVE); |
master_config = apb_master_config::type_id::create("master_config");
master_config.name = name;
master_config.is_active = is_active;
endfunction | 0 |
140,262 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv | 90,320,290 | apb_config.sv | sv | 163 | 99 | [] | [] | [] | null | line:17: before: "class" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:17: Unsupported: classes\nclass apb_slave_config extends uvm_object;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:17: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_slave_config extends uvm_object;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:19: syntax error, unexpected rand\n rand uvm_active_passive_enum is_active = UVM_ACTIVE;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:21: syntax error, unexpected rand\n rand int unsigned end_address;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:22: syntax error, unexpected rand\n rand int psel_index;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:25: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint addr_cst { start_address <= end_address; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:25: syntax error, unexpected IDENTIFIER\n constraint addr_cst { start_address <= end_address; }\n ^~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:26: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint psel_cst { psel_index inside {[0:15]}; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:28: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(apb_slave_config)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:30: Define or directive not defined: \'`uvm_field_string\'\n `uvm_field_string(name, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:31: Define or directive not defined: \'`uvm_field_enum\'\n `uvm_field_enum(uvm_active_passive_enum, is_active, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:32: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(start_address, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:33: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(end_address, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:34: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(psel_index, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:35: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:38: Unsupported: new constructor\n function new (string name = "apb_slave_config");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:39: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:39: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:39: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:47: syntax error, unexpected endclass\nendclass : apb_slave_config\n^~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:50: Unsupported: classes\nclass apb_master_config extends uvm_object;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:50: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_master_config extends uvm_object;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:53: syntax error, unexpected IDENTIFIER\n uvm_active_passive_enum is_active = UVM_ACTIVE;\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:55: Unsupported: new constructor\n function new (string name = "unnamed-apb_master_config");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:56: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:56: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:56: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:59: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(apb_master_config)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:59: syntax error, unexpected \'(\'\n `uvm_object_utils_begin(apb_master_config)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:61: Define or directive not defined: \'`uvm_field_string\'\n `uvm_field_string(name, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:62: Define or directive not defined: \'`uvm_field_enum\'\n `uvm_field_enum(uvm_active_passive_enum, is_active, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:63: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:68: Unsupported: classes\nclass apb_config extends uvm_object;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:68: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_config extends uvm_object;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:72: syntax error, unexpected rand\n rand apb_slave_config slave_configs[$];\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:73: syntax error, unexpected rand\n rand int num_slaves;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:77: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(apb_config)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:77: syntax error, unexpected \'(\'\n `uvm_object_utils_begin(apb_config)\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:78: Define or directive not defined: \'`uvm_field_queue_object\'\n `uvm_field_queue_object(slave_configs, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:79: Define or directive not defined: \'`uvm_field_object\'\n `uvm_field_object(master_config, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:80: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(num_slaves, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:81: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(has_bus_monitor, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:82: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:84: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint c_num_slaves { num_slaves inside {[1:4]}; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:86: Unsupported: new constructor\n function new (string name = "unnamed-apb_config");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:87: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:87: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:87: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:93: Unsupported: Hierarchical class references\n slave_configs[i] = apb_slave_config::type_id::create($sformatf("slave%0d", i));\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:93: Unsupported: scoped class reference\n slave_configs[i] = apb_slave_config::type_id::create($sformatf("slave%0d", i));\n ^~~~~~~\n%Error: Exiting due to too many errors encountered; --error-limit=50\n ... See the manual and https://verilator.org for more assistance.\n' | 308,390 | function | function int apb_config::get_slave_psel_by_addr(int addr);
for (int i = 0; i < slave_configs.size(); i++)
if(slave_configs[i].check_address_range(addr)) begin
return slave_configs[i].psel_index;
end
endfunction | function int apb_config::get_slave_psel_by_addr(int addr); |
for (int i = 0; i < slave_configs.size(); i++)
if(slave_configs[i].check_address_range(addr)) begin
return slave_configs[i].psel_index;
end
endfunction | 0 |
140,263 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv | 90,320,290 | apb_config.sv | sv | 163 | 99 | [] | [] | [] | null | line:17: before: "class" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:17: Unsupported: classes\nclass apb_slave_config extends uvm_object;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:17: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_slave_config extends uvm_object;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:19: syntax error, unexpected rand\n rand uvm_active_passive_enum is_active = UVM_ACTIVE;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:21: syntax error, unexpected rand\n rand int unsigned end_address;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:22: syntax error, unexpected rand\n rand int psel_index;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:25: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint addr_cst { start_address <= end_address; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:25: syntax error, unexpected IDENTIFIER\n constraint addr_cst { start_address <= end_address; }\n ^~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:26: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint psel_cst { psel_index inside {[0:15]}; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:28: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(apb_slave_config)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:30: Define or directive not defined: \'`uvm_field_string\'\n `uvm_field_string(name, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:31: Define or directive not defined: \'`uvm_field_enum\'\n `uvm_field_enum(uvm_active_passive_enum, is_active, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:32: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(start_address, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:33: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(end_address, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:34: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(psel_index, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:35: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:38: Unsupported: new constructor\n function new (string name = "apb_slave_config");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:39: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:39: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:39: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:47: syntax error, unexpected endclass\nendclass : apb_slave_config\n^~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:50: Unsupported: classes\nclass apb_master_config extends uvm_object;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:50: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_master_config extends uvm_object;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:53: syntax error, unexpected IDENTIFIER\n uvm_active_passive_enum is_active = UVM_ACTIVE;\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:55: Unsupported: new constructor\n function new (string name = "unnamed-apb_master_config");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:56: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:56: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:56: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:59: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(apb_master_config)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:59: syntax error, unexpected \'(\'\n `uvm_object_utils_begin(apb_master_config)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:61: Define or directive not defined: \'`uvm_field_string\'\n `uvm_field_string(name, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:62: Define or directive not defined: \'`uvm_field_enum\'\n `uvm_field_enum(uvm_active_passive_enum, is_active, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:63: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:68: Unsupported: classes\nclass apb_config extends uvm_object;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:68: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_config extends uvm_object;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:72: syntax error, unexpected rand\n rand apb_slave_config slave_configs[$];\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:73: syntax error, unexpected rand\n rand int num_slaves;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:77: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(apb_config)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:77: syntax error, unexpected \'(\'\n `uvm_object_utils_begin(apb_config)\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:78: Define or directive not defined: \'`uvm_field_queue_object\'\n `uvm_field_queue_object(slave_configs, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:79: Define or directive not defined: \'`uvm_field_object\'\n `uvm_field_object(master_config, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:80: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(num_slaves, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:81: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(has_bus_monitor, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:82: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:84: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint c_num_slaves { num_slaves inside {[1:4]}; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:86: Unsupported: new constructor\n function new (string name = "unnamed-apb_config");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:87: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:87: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:87: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:93: Unsupported: Hierarchical class references\n slave_configs[i] = apb_slave_config::type_id::create($sformatf("slave%0d", i));\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:93: Unsupported: scoped class reference\n slave_configs[i] = apb_slave_config::type_id::create($sformatf("slave%0d", i));\n ^~~~~~~\n%Error: Exiting due to too many errors encountered; --error-limit=50\n ... See the manual and https://verilator.org for more assistance.\n' | 308,390 | function | function string apb_config::get_slave_name_by_addr(int addr);
for (int i = 0; i < slave_configs.size(); i++)
if(slave_configs[i].check_address_range(addr)) begin
return slave_configs[i].name;
end
endfunction | function string apb_config::get_slave_name_by_addr(int addr); |
for (int i = 0; i < slave_configs.size(); i++)
if(slave_configs[i].check_address_range(addr)) begin
return slave_configs[i].name;
end
endfunction | 0 |
140,264 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv | 90,320,290 | apb_config.sv | sv | 163 | 99 | [] | [] | [] | null | line:17: before: "class" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:17: Unsupported: classes\nclass apb_slave_config extends uvm_object;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:17: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_slave_config extends uvm_object;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:19: syntax error, unexpected rand\n rand uvm_active_passive_enum is_active = UVM_ACTIVE;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:21: syntax error, unexpected rand\n rand int unsigned end_address;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:22: syntax error, unexpected rand\n rand int psel_index;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:25: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint addr_cst { start_address <= end_address; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:25: syntax error, unexpected IDENTIFIER\n constraint addr_cst { start_address <= end_address; }\n ^~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:26: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint psel_cst { psel_index inside {[0:15]}; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:28: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(apb_slave_config)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:30: Define or directive not defined: \'`uvm_field_string\'\n `uvm_field_string(name, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:31: Define or directive not defined: \'`uvm_field_enum\'\n `uvm_field_enum(uvm_active_passive_enum, is_active, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:32: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(start_address, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:33: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(end_address, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:34: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(psel_index, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:35: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:38: Unsupported: new constructor\n function new (string name = "apb_slave_config");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:39: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:39: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:39: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:47: syntax error, unexpected endclass\nendclass : apb_slave_config\n^~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:50: Unsupported: classes\nclass apb_master_config extends uvm_object;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:50: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_master_config extends uvm_object;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:53: syntax error, unexpected IDENTIFIER\n uvm_active_passive_enum is_active = UVM_ACTIVE;\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:55: Unsupported: new constructor\n function new (string name = "unnamed-apb_master_config");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:56: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:56: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:56: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:59: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(apb_master_config)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:59: syntax error, unexpected \'(\'\n `uvm_object_utils_begin(apb_master_config)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:61: Define or directive not defined: \'`uvm_field_string\'\n `uvm_field_string(name, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:62: Define or directive not defined: \'`uvm_field_enum\'\n `uvm_field_enum(uvm_active_passive_enum, is_active, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:63: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:68: Unsupported: classes\nclass apb_config extends uvm_object;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:68: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_config extends uvm_object;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:72: syntax error, unexpected rand\n rand apb_slave_config slave_configs[$];\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:73: syntax error, unexpected rand\n rand int num_slaves;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:77: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(apb_config)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:77: syntax error, unexpected \'(\'\n `uvm_object_utils_begin(apb_config)\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:78: Define or directive not defined: \'`uvm_field_queue_object\'\n `uvm_field_queue_object(slave_configs, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:79: Define or directive not defined: \'`uvm_field_object\'\n `uvm_field_object(master_config, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:80: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(num_slaves, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:81: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(has_bus_monitor, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:82: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:84: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint c_num_slaves { num_slaves inside {[1:4]}; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:86: Unsupported: new constructor\n function new (string name = "unnamed-apb_config");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:87: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:87: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:87: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:93: Unsupported: Hierarchical class references\n slave_configs[i] = apb_slave_config::type_id::create($sformatf("slave%0d", i));\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_config.sv:93: Unsupported: scoped class reference\n slave_configs[i] = apb_slave_config::type_id::create($sformatf("slave%0d", i));\n ^~~~~~~\n%Error: Exiting due to too many errors encountered; --error-limit=50\n ... See the manual and https://verilator.org for more assistance.\n' | 308,390 | function | function new(string name = "default_apb_config-S0S1-master");
super.new(name);
add_slave("slave0", 32'h0000_0000, 32'h7FFF_FFFF, 0, UVM_ACTIVE);
add_slave("slave1", 32'h8000_0000, 32'hFFFF_FFFF, 1, UVM_ACTIVE);
add_master("master", UVM_ACTIVE);
endfunction | function new(string name = "default_apb_config-S0S1-master"); |
super.new(name);
add_slave("slave0", 32'h0000_0000, 32'h7FFF_FFFF, 0, UVM_ACTIVE);
add_slave("slave1", 32'h8000_0000, 32'hFFFF_FFFF, 1, UVM_ACTIVE);
add_master("master", UVM_ACTIVE);
endfunction | 0 |
140,265 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv | 90,320,290 | apb_env0.sv | sv | 74 | 92 | [] | [] | [] | null | line:11: before: "class" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:11: Unsupported: classes\nclass apb_env extends uvm_env;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:11: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_env extends uvm_env;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:23: Define or directive not defined: \'`uvm_component_utils_begin\'\n `uvm_component_utils_begin(apb_env)\n ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:24: Define or directive not defined: \'`uvm_field_object\'\n `uvm_field_object(cfg, UVM_DEFAULT|UVM_REFERENCE)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:25: Define or directive not defined: \'`uvm_component_utils_end\'\n `uvm_component_utils_end\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:28: Unsupported: new constructor\n function new(string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:28: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new(string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:33: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern virtual function void build_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:34: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern virtual function void connect_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:38: Unsupported: Hierarchical class references\nfunction void apb_env::build_phase(uvm_phase phase);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:38: Unsupported: scoped class reference\nfunction void apb_env::build_phase(uvm_phase phase);\n ^~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:34: Unsupported: Out of class block function declaration\n extern virtual function void connect_phase(uvm_phase phase);\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:38: syntax error, unexpected IDENTIFIER, expecting \')\'\nfunction void apb_env::build_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:44: Define or directive not defined: \'`uvm_info\'\n `uvm_info("NOCONFIG", "using default_apb_config", UVM_MEDIUM)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:45: Unsupported or unknown PLI call: $cast\n $cast(cfg, factory.create_object_by_name("default_apb_config","cfg"));\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:63: Unsupported: Hierarchical class references\nfunction void apb_env::connect_phase(uvm_phase phase);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:63: Unsupported: scoped class reference\nfunction void apb_env::connect_phase(uvm_phase phase);\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:38: Unsupported: Out of class block function declaration\nfunction void apb_env::build_phase(uvm_phase phase);\n ^~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:63: syntax error, unexpected IDENTIFIER, expecting \')\'\nfunction void apb_env::connect_phase(uvm_phase phase);\n ^~~~~\n%Error: Exiting due to 19 error(s)\n ... See the manual and https://verilator.org for more assistance.\n' | 308,391 | function | function new(string name, uvm_component parent);
super.new(name, parent);
endfunction | function new(string name, uvm_component parent); |
super.new(name, parent);
endfunction | 0 |
140,266 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv | 90,320,290 | apb_env0.sv | sv | 74 | 92 | [] | [] | [] | null | line:11: before: "class" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:11: Unsupported: classes\nclass apb_env extends uvm_env;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:11: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_env extends uvm_env;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:23: Define or directive not defined: \'`uvm_component_utils_begin\'\n `uvm_component_utils_begin(apb_env)\n ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:24: Define or directive not defined: \'`uvm_field_object\'\n `uvm_field_object(cfg, UVM_DEFAULT|UVM_REFERENCE)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:25: Define or directive not defined: \'`uvm_component_utils_end\'\n `uvm_component_utils_end\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:28: Unsupported: new constructor\n function new(string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:28: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new(string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:33: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern virtual function void build_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:34: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern virtual function void connect_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:38: Unsupported: Hierarchical class references\nfunction void apb_env::build_phase(uvm_phase phase);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:38: Unsupported: scoped class reference\nfunction void apb_env::build_phase(uvm_phase phase);\n ^~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:34: Unsupported: Out of class block function declaration\n extern virtual function void connect_phase(uvm_phase phase);\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:38: syntax error, unexpected IDENTIFIER, expecting \')\'\nfunction void apb_env::build_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:44: Define or directive not defined: \'`uvm_info\'\n `uvm_info("NOCONFIG", "using default_apb_config", UVM_MEDIUM)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:45: Unsupported or unknown PLI call: $cast\n $cast(cfg, factory.create_object_by_name("default_apb_config","cfg"));\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:63: Unsupported: Hierarchical class references\nfunction void apb_env::connect_phase(uvm_phase phase);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:63: Unsupported: scoped class reference\nfunction void apb_env::connect_phase(uvm_phase phase);\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:38: Unsupported: Out of class block function declaration\nfunction void apb_env::build_phase(uvm_phase phase);\n ^~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:63: syntax error, unexpected IDENTIFIER, expecting \')\'\nfunction void apb_env::connect_phase(uvm_phase phase);\n ^~~~~\n%Error: Exiting due to 19 error(s)\n ... See the manual and https://verilator.org for more assistance.\n' | 308,391 | function | function void build_phase(uvm_phase phase);
extern virtual function void connect_phase(uvm_phase phase);
endclass : apb_env
function void apb_env::build_phase(uvm_phase phase);
uvm_object config_obj;
super.build_phase(phase);
if(cfg == null) begin
`uvm_info("NOCONFIG", "using default_apb_config", UVM_MEDIUM)
$cast(cfg, factory.create_object_by_name("default_apb_config","cfg"));
end
uvm_config_object::set(this, "*", "cfg", cfg);
foreach(cfg.slave_configs[i])
uvm_config_object::set(this, $sformatf("slave[%0d]*", i), "cfg", cfg.slave_configs[i]);
if (cfg.has_bus_monitor) begin
bus_monitor = apb_monitor::type_id::create("bus_monitor",this);
bus_collector = apb_collector::type_id::create("bus_collector",this);
end
master = apb_master_agent::type_id::create(cfg.master_config.name,this);
slaves = new[cfg.slave_configs.size()];
foreach(slaves[i]) begin
slaves[i] = apb_slave_agent::type_id::create($sformatf("slave[%0d]", i), this);
end
endfunction | function void build_phase(uvm_phase phase); |
extern virtual function void connect_phase(uvm_phase phase);
endclass : apb_env
function void apb_env::build_phase(uvm_phase phase);
uvm_object config_obj;
super.build_phase(phase);
if(cfg == null) begin
`uvm_info("NOCONFIG", "using default_apb_config", UVM_MEDIUM)
$cast(cfg, factory.create_object_by_name("default_apb_config","cfg"));
end
uvm_config_object::set(this, "*", "cfg", cfg);
foreach(cfg.slave_configs[i])
uvm_config_object::set(this, $sformatf("slave[%0d]*", i), "cfg", cfg.slave_configs[i]);
if (cfg.has_bus_monitor) begin
bus_monitor = apb_monitor::type_id::create("bus_monitor",this);
bus_collector = apb_collector::type_id::create("bus_collector",this);
end
master = apb_master_agent::type_id::create(cfg.master_config.name,this);
slaves = new[cfg.slave_configs.size()];
foreach(slaves[i]) begin
slaves[i] = apb_slave_agent::type_id::create($sformatf("slave[%0d]", i), this);
end
endfunction | 0 |
140,267 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv | 90,320,290 | apb_env0.sv | sv | 74 | 92 | [] | [] | [] | null | line:11: before: "class" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:11: Unsupported: classes\nclass apb_env extends uvm_env;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:11: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_env extends uvm_env;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:23: Define or directive not defined: \'`uvm_component_utils_begin\'\n `uvm_component_utils_begin(apb_env)\n ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:24: Define or directive not defined: \'`uvm_field_object\'\n `uvm_field_object(cfg, UVM_DEFAULT|UVM_REFERENCE)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:25: Define or directive not defined: \'`uvm_component_utils_end\'\n `uvm_component_utils_end\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:28: Unsupported: new constructor\n function new(string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:28: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new(string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:33: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern virtual function void build_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:34: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern virtual function void connect_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:38: Unsupported: Hierarchical class references\nfunction void apb_env::build_phase(uvm_phase phase);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:38: Unsupported: scoped class reference\nfunction void apb_env::build_phase(uvm_phase phase);\n ^~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:34: Unsupported: Out of class block function declaration\n extern virtual function void connect_phase(uvm_phase phase);\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:38: syntax error, unexpected IDENTIFIER, expecting \')\'\nfunction void apb_env::build_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:44: Define or directive not defined: \'`uvm_info\'\n `uvm_info("NOCONFIG", "using default_apb_config", UVM_MEDIUM)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:45: Unsupported or unknown PLI call: $cast\n $cast(cfg, factory.create_object_by_name("default_apb_config","cfg"));\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:63: Unsupported: Hierarchical class references\nfunction void apb_env::connect_phase(uvm_phase phase);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:63: Unsupported: scoped class reference\nfunction void apb_env::connect_phase(uvm_phase phase);\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:38: Unsupported: Out of class block function declaration\nfunction void apb_env::build_phase(uvm_phase phase);\n ^~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_env0.sv:63: syntax error, unexpected IDENTIFIER, expecting \')\'\nfunction void apb_env::connect_phase(uvm_phase phase);\n ^~~~~\n%Error: Exiting due to 19 error(s)\n ... See the manual and https://verilator.org for more assistance.\n' | 308,391 | function | function void apb_env::connect_phase(uvm_phase phase);
super.connect_phase(phase);
bus_collector.item_collected_port.connect(bus_monitor.coll_mon_port);
bus_monitor.addr_trans_port.connect(bus_collector.addr_trans_export);
foreach(slaves[i]) begin
if (slaves[i].is_active == UVM_ACTIVE)
slaves[i].sequencer.addr_trans_port.connect(bus_monitor.addr_trans_export);
end
endfunction | function void apb_env::connect_phase(uvm_phase phase); |
super.connect_phase(phase);
bus_collector.item_collected_port.connect(bus_monitor.coll_mon_port);
bus_monitor.addr_trans_port.connect(bus_collector.addr_trans_export);
foreach(slaves[i]) begin
if (slaves[i].is_active == UVM_ACTIVE)
slaves[i].sequencer.addr_trans_port.connect(bus_monitor.addr_trans_export);
end
endfunction | 0 |
140,268 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv | 90,320,290 | apb_master_agent.sv | sv | 65 | 81 | [] | [] | [] | null | line:11: before: "class" | null | 1: b"%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:11: Unsupported: classes\nclass apb_master_agent extends uvm_agent;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:11: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_master_agent extends uvm_agent;\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:26: Define or directive not defined: '`uvm_component_utils_begin'\n `uvm_component_utils_begin(apb_master_agent)\n ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:27: Define or directive not defined: '`uvm_field_enum'\n `uvm_field_enum(uvm_active_passive_enum, is_active, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:28: Define or directive not defined: '`uvm_component_utils_end'\n `uvm_component_utils_end\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:31: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:31: syntax error, unexpected IDENTIFIER, expecting ')'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:36: syntax error, unexpected IDENTIFIER, expecting ')'\n extern virtual function void build_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:37: syntax error, unexpected IDENTIFIER, expecting ')'\n extern virtual function void connect_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:42: Unsupported: Hierarchical class references\nfunction void apb_master_agent::build_phase(uvm_phase phase);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:42: Unsupported: scoped class reference\nfunction void apb_master_agent::build_phase(uvm_phase phase);\n ^~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:37: Unsupported: Out of class block function declaration\n extern virtual function void connect_phase(uvm_phase phase);\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:42: syntax error, unexpected IDENTIFIER, expecting ')'\nfunction void apb_master_agent::build_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:54: Unsupported: Hierarchical class references\nfunction void apb_master_agent::connect_phase(uvm_phase phase);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:54: Unsupported: scoped class reference\nfunction void apb_master_agent::connect_phase(uvm_phase phase);\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:42: Unsupported: Out of class block function declaration\nfunction void apb_master_agent::build_phase(uvm_phase phase);\n ^~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:54: syntax error, unexpected IDENTIFIER, expecting ')'\nfunction void apb_master_agent::connect_phase(uvm_phase phase);\n ^~~~~\n%Error: Exiting due to 17 error(s)\n ... See the manual and https://verilator.org for more assistance.\n" | 308,394 | function | function new (string name, uvm_component parent);
super.new(name, parent);
endfunction | function new (string name, uvm_component parent); |
super.new(name, parent);
endfunction | 0 |
140,269 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv | 90,320,290 | apb_master_agent.sv | sv | 65 | 81 | [] | [] | [] | null | line:11: before: "class" | null | 1: b"%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:11: Unsupported: classes\nclass apb_master_agent extends uvm_agent;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:11: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_master_agent extends uvm_agent;\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:26: Define or directive not defined: '`uvm_component_utils_begin'\n `uvm_component_utils_begin(apb_master_agent)\n ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:27: Define or directive not defined: '`uvm_field_enum'\n `uvm_field_enum(uvm_active_passive_enum, is_active, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:28: Define or directive not defined: '`uvm_component_utils_end'\n `uvm_component_utils_end\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:31: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:31: syntax error, unexpected IDENTIFIER, expecting ')'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:36: syntax error, unexpected IDENTIFIER, expecting ')'\n extern virtual function void build_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:37: syntax error, unexpected IDENTIFIER, expecting ')'\n extern virtual function void connect_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:42: Unsupported: Hierarchical class references\nfunction void apb_master_agent::build_phase(uvm_phase phase);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:42: Unsupported: scoped class reference\nfunction void apb_master_agent::build_phase(uvm_phase phase);\n ^~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:37: Unsupported: Out of class block function declaration\n extern virtual function void connect_phase(uvm_phase phase);\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:42: syntax error, unexpected IDENTIFIER, expecting ')'\nfunction void apb_master_agent::build_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:54: Unsupported: Hierarchical class references\nfunction void apb_master_agent::connect_phase(uvm_phase phase);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:54: Unsupported: scoped class reference\nfunction void apb_master_agent::connect_phase(uvm_phase phase);\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:42: Unsupported: Out of class block function declaration\nfunction void apb_master_agent::build_phase(uvm_phase phase);\n ^~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:54: syntax error, unexpected IDENTIFIER, expecting ')'\nfunction void apb_master_agent::connect_phase(uvm_phase phase);\n ^~~~~\n%Error: Exiting due to 17 error(s)\n ... See the manual and https://verilator.org for more assistance.\n" | 308,394 | function | function void build_phase(uvm_phase phase);
extern virtual function void connect_phase(uvm_phase phase);
endclass : apb_master_agent
function void apb_master_agent::build_phase(uvm_phase phase);
super.build_phase(phase);
collector = apb_collector::type_id::create("collector", this);
monitor = apb_monitor::type_id::create("monitor", this);
if(is_active == UVM_ACTIVE) begin
sequencer = apb_master_sequencer::type_id::create("sequencer",this);
driver = apb_master_driver::type_id::create("driver",this);
end
endfunction | function void build_phase(uvm_phase phase); |
extern virtual function void connect_phase(uvm_phase phase);
endclass : apb_master_agent
function void apb_master_agent::build_phase(uvm_phase phase);
super.build_phase(phase);
collector = apb_collector::type_id::create("collector", this);
monitor = apb_monitor::type_id::create("monitor", this);
if(is_active == UVM_ACTIVE) begin
sequencer = apb_master_sequencer::type_id::create("sequencer",this);
driver = apb_master_driver::type_id::create("driver",this);
end
endfunction | 0 |
140,270 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv | 90,320,290 | apb_master_agent.sv | sv | 65 | 81 | [] | [] | [] | null | line:11: before: "class" | null | 1: b"%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:11: Unsupported: classes\nclass apb_master_agent extends uvm_agent;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:11: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_master_agent extends uvm_agent;\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:26: Define or directive not defined: '`uvm_component_utils_begin'\n `uvm_component_utils_begin(apb_master_agent)\n ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:27: Define or directive not defined: '`uvm_field_enum'\n `uvm_field_enum(uvm_active_passive_enum, is_active, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:28: Define or directive not defined: '`uvm_component_utils_end'\n `uvm_component_utils_end\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:31: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:31: syntax error, unexpected IDENTIFIER, expecting ')'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:36: syntax error, unexpected IDENTIFIER, expecting ')'\n extern virtual function void build_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:37: syntax error, unexpected IDENTIFIER, expecting ')'\n extern virtual function void connect_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:42: Unsupported: Hierarchical class references\nfunction void apb_master_agent::build_phase(uvm_phase phase);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:42: Unsupported: scoped class reference\nfunction void apb_master_agent::build_phase(uvm_phase phase);\n ^~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:37: Unsupported: Out of class block function declaration\n extern virtual function void connect_phase(uvm_phase phase);\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:42: syntax error, unexpected IDENTIFIER, expecting ')'\nfunction void apb_master_agent::build_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:54: Unsupported: Hierarchical class references\nfunction void apb_master_agent::connect_phase(uvm_phase phase);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:54: Unsupported: scoped class reference\nfunction void apb_master_agent::connect_phase(uvm_phase phase);\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:42: Unsupported: Out of class block function declaration\nfunction void apb_master_agent::build_phase(uvm_phase phase);\n ^~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_agent.sv:54: syntax error, unexpected IDENTIFIER, expecting ')'\nfunction void apb_master_agent::connect_phase(uvm_phase phase);\n ^~~~~\n%Error: Exiting due to 17 error(s)\n ... See the manual and https://verilator.org for more assistance.\n" | 308,394 | function | function void apb_master_agent::connect_phase(uvm_phase phase);
super.connect_phase(phase);
collector.item_collected_port.connect(monitor.coll_mon_port);
monitor.addr_trans_port.connect(collector.addr_trans_export);
if (is_active == UVM_ACTIVE) begin
driver.seq_item_port.connect(sequencer.seq_item_export);
end
endfunction | function void apb_master_agent::connect_phase(uvm_phase phase); |
super.connect_phase(phase);
collector.item_collected_port.connect(monitor.coll_mon_port);
monitor.addr_trans_port.connect(collector.addr_trans_export);
if (is_active == UVM_ACTIVE) begin
driver.seq_item_port.connect(sequencer.seq_item_export);
end
endfunction | 0 |
140,271 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv | 90,320,290 | apb_master_driver.sv | sv | 103 | 88 | [] | [] | [] | null | line:10: before: "class" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:10: Unsupported: classes\nclass apb_master_driver extends uvm_driver #(apb_transfer);\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:10: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_master_driver extends uvm_driver #(apb_transfer);\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:13: Unsupported: virtual data type\n virtual apb_if vif;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:16: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(apb_master_driver)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:16: syntax error, unexpected \'(\'\n `uvm_component_utils(apb_master_driver)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:19: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:19: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:23: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern virtual function void connect_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:24: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern virtual task run_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:26: syntax error, unexpected extern\n extern virtual protected task reset_signals();\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:33: Unsupported: super\n super.connect_phase(phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:34: syntax error, unexpected \'#\'\n if (!uvm_config_db#(virtual apb_if)::get(this, get_full_name(), "vif", vif))\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:35: Define or directive not defined: \'`uvm_error\'\n : ... Suggested alternative: \'`error\'\n `uvm_error("NOVIF",{"virtual interface must be set for: ",get_full_name(), ".vif"})\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:41: Unsupported: fork statements\n fork\n ^~~~\n%Warning-ENDLABEL: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:45: End label \'run_phase\' does not match begin label \'get_and_drive\'\nendtask : run_phase\n ^~~~~~~~~\n ... Use "/* verilator lint_off ENDLABEL */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:48: Unsupported: Hierarchical class references\ntask apb_master_driver::get_and_drive();\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:48: Unsupported: scoped class reference\ntask apb_master_driver::get_and_drive();\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:25: Unsupported: Out of class block function declaration\n extern virtual protected task get_and_drive();\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:59: Unsupported: Hierarchical class references\ntask apb_master_driver::reset_signals();\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:59: Unsupported: scoped class reference\ntask apb_master_driver::reset_signals();\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:48: Unsupported: Out of class block function declaration\ntask apb_master_driver::get_and_drive();\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:61: syntax error, unexpected \'@\'\n @(negedge vif.presetn);\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:74: Unsupported: Hierarchical class references\ntask apb_master_driver::drive_transfer (apb_transfer trans);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:74: Unsupported: scoped class reference\ntask apb_master_driver::drive_transfer (apb_transfer trans);\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:59: Unsupported: Out of class block function declaration\ntask apb_master_driver::reset_signals();\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:74: syntax error, unexpected IDENTIFIER, expecting \')\'\ntask apb_master_driver::drive_transfer (apb_transfer trans);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:76: syntax error, unexpected if\n if (trans.transmit_delay > 0)\n ^~\n%Error: Exiting due to 26 error(s), 1 warning(s)\n ... See the manual and https://verilator.org for more assistance.\n' | 308,396 | function | function new (string name, uvm_component parent);
super.new(name, parent);
endfunction | function new (string name, uvm_component parent); |
super.new(name, parent);
endfunction | 0 |
140,272 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv | 90,320,290 | apb_master_driver.sv | sv | 103 | 88 | [] | [] | [] | null | line:10: before: "class" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:10: Unsupported: classes\nclass apb_master_driver extends uvm_driver #(apb_transfer);\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:10: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_master_driver extends uvm_driver #(apb_transfer);\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:13: Unsupported: virtual data type\n virtual apb_if vif;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:16: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(apb_master_driver)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:16: syntax error, unexpected \'(\'\n `uvm_component_utils(apb_master_driver)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:19: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:19: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:23: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern virtual function void connect_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:24: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern virtual task run_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:26: syntax error, unexpected extern\n extern virtual protected task reset_signals();\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:33: Unsupported: super\n super.connect_phase(phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:34: syntax error, unexpected \'#\'\n if (!uvm_config_db#(virtual apb_if)::get(this, get_full_name(), "vif", vif))\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:35: Define or directive not defined: \'`uvm_error\'\n : ... Suggested alternative: \'`error\'\n `uvm_error("NOVIF",{"virtual interface must be set for: ",get_full_name(), ".vif"})\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:41: Unsupported: fork statements\n fork\n ^~~~\n%Warning-ENDLABEL: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:45: End label \'run_phase\' does not match begin label \'get_and_drive\'\nendtask : run_phase\n ^~~~~~~~~\n ... Use "/* verilator lint_off ENDLABEL */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:48: Unsupported: Hierarchical class references\ntask apb_master_driver::get_and_drive();\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:48: Unsupported: scoped class reference\ntask apb_master_driver::get_and_drive();\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:25: Unsupported: Out of class block function declaration\n extern virtual protected task get_and_drive();\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:59: Unsupported: Hierarchical class references\ntask apb_master_driver::reset_signals();\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:59: Unsupported: scoped class reference\ntask apb_master_driver::reset_signals();\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:48: Unsupported: Out of class block function declaration\ntask apb_master_driver::get_and_drive();\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:61: syntax error, unexpected \'@\'\n @(negedge vif.presetn);\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:74: Unsupported: Hierarchical class references\ntask apb_master_driver::drive_transfer (apb_transfer trans);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:74: Unsupported: scoped class reference\ntask apb_master_driver::drive_transfer (apb_transfer trans);\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:59: Unsupported: Out of class block function declaration\ntask apb_master_driver::reset_signals();\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:74: syntax error, unexpected IDENTIFIER, expecting \')\'\ntask apb_master_driver::drive_transfer (apb_transfer trans);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_driver.sv:76: syntax error, unexpected if\n if (trans.transmit_delay > 0)\n ^~\n%Error: Exiting due to 26 error(s), 1 warning(s)\n ... See the manual and https://verilator.org for more assistance.\n' | 308,396 | function | function void connect_phase(uvm_phase phase);
extern virtual task run_phase(uvm_phase phase);
extern virtual protected task get_and_drive();
extern virtual protected task reset_signals();
extern virtual protected task drive_transfer(apb_transfer trans);
endclass : apb_master_driver
function void apb_master_driver::connect_phase(uvm_phase phase);
super.connect_phase(phase);
if (!uvm_config_db#(virtual apb_if)::get(this, get_full_name(), "vif", vif))
`uvm_error("NOVIF",{"virtual interface must be set for: ",get_full_name(), ".vif"})
endfunction | function void connect_phase(uvm_phase phase); |
extern virtual task run_phase(uvm_phase phase);
extern virtual protected task get_and_drive();
extern virtual protected task reset_signals();
extern virtual protected task drive_transfer(apb_transfer trans);
endclass : apb_master_driver
function void apb_master_driver::connect_phase(uvm_phase phase);
super.connect_phase(phase);
if (!uvm_config_db#(virtual apb_if)::get(this, get_full_name(), "vif", vif))
`uvm_error("NOVIF",{"virtual interface must be set for: ",get_full_name(), ".vif"})
endfunction | 0 |
140,273 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_sequencer.sv | 90,320,290 | apb_master_sequencer.sv | sv | 19 | 81 | [] | [] | [] | null | line:8: before: "class" | null | 1: b"%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_sequencer.sv:8: Unsupported: classes\nclass apb_master_sequencer extends uvm_sequencer #(apb_transfer);\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_sequencer.sv:8: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_master_sequencer extends uvm_sequencer #(apb_transfer);\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_sequencer.sv:11: Define or directive not defined: '`uvm_component_utils'\n `uvm_component_utils(apb_master_sequencer)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_sequencer.sv:14: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_master_sequencer.sv:14: syntax error, unexpected IDENTIFIER, expecting ')'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: Exiting due to 5 error(s)\n ... See the manual and https://verilator.org for more assistance.\n" | 308,397 | function | function new (string name, uvm_component parent);
super.new(name, parent);
endfunction | function new (string name, uvm_component parent); |
super.new(name, parent);
endfunction | 0 |
140,274 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv | 90,320,290 | apb_slave_agent.sv | sv | 75 | 81 | [] | [] | [] | null | line:11: before: "class" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:11: Unsupported: classes\nclass apb_slave_agent extends uvm_agent;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:11: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_slave_agent extends uvm_agent;\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:27: Define or directive not defined: \'`uvm_component_utils_begin\'\n `uvm_component_utils_begin(apb_slave_agent)\n ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:28: Define or directive not defined: \'`uvm_field_enum\'\n `uvm_field_enum(uvm_active_passive_enum, is_active, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:29: Define or directive not defined: \'`uvm_component_utils_end\'\n `uvm_component_utils_end\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:32: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:32: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:38: syntax error, unexpected extern\n extern virtual function void connect();\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:45: Unsupported: super\n super.build();\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:48: syntax error, unexpected ::, expecting \';\'\n collector = apb_collector::type_id::create("collector", this);\n ^~\n : ... Perhaps \'apb_collector\' is a package which needs to be predeclared? (IEEE 1800-2017 26.3)\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:49: syntax error, unexpected ::, expecting \';\'\n monitor = apb_monitor::type_id::create("monitor", this);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:51: syntax error, unexpected ::, expecting \';\'\n sequencer = apb_slave_sequencer::type_id::create("sequencer",this);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:52: syntax error, unexpected ::, expecting \';\'\n driver = apb_slave_driver::type_id::create("driver",this);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:57: Unsupported: Hierarchical class references\nfunction void apb_slave_agent::connect();\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:57: Unsupported: scoped class reference\nfunction void apb_slave_agent::connect();\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:37: Unsupported: Out of class block function declaration\n extern virtual function void build();\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:67: Unsupported: Hierarchical class references\nfunction void apb_slave_agent::assign_vi(virtual interface apb_if vif);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:67: Unsupported: scoped class reference\nfunction void apb_slave_agent::assign_vi(virtual interface apb_if vif);\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:57: Unsupported: Out of class block function declaration\nfunction void apb_slave_agent::connect();\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:67: Unsupported: virtual interface\nfunction void apb_slave_agent::assign_vi(virtual interface apb_if vif);\n ^~~~~~~\n%Error: Exiting due to 20 error(s)\n ... See the manual and https://verilator.org for more assistance.\n' | 308,399 | function | function new (string name, uvm_component parent);
super.new(name, parent);
endfunction | function new (string name, uvm_component parent); |
super.new(name, parent);
endfunction | 0 |
140,275 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv | 90,320,290 | apb_slave_agent.sv | sv | 75 | 81 | [] | [] | [] | null | line:11: before: "class" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:11: Unsupported: classes\nclass apb_slave_agent extends uvm_agent;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:11: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_slave_agent extends uvm_agent;\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:27: Define or directive not defined: \'`uvm_component_utils_begin\'\n `uvm_component_utils_begin(apb_slave_agent)\n ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:28: Define or directive not defined: \'`uvm_field_enum\'\n `uvm_field_enum(uvm_active_passive_enum, is_active, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:29: Define or directive not defined: \'`uvm_component_utils_end\'\n `uvm_component_utils_end\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:32: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:32: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:38: syntax error, unexpected extern\n extern virtual function void connect();\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:45: Unsupported: super\n super.build();\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:48: syntax error, unexpected ::, expecting \';\'\n collector = apb_collector::type_id::create("collector", this);\n ^~\n : ... Perhaps \'apb_collector\' is a package which needs to be predeclared? (IEEE 1800-2017 26.3)\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:49: syntax error, unexpected ::, expecting \';\'\n monitor = apb_monitor::type_id::create("monitor", this);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:51: syntax error, unexpected ::, expecting \';\'\n sequencer = apb_slave_sequencer::type_id::create("sequencer",this);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:52: syntax error, unexpected ::, expecting \';\'\n driver = apb_slave_driver::type_id::create("driver",this);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:57: Unsupported: Hierarchical class references\nfunction void apb_slave_agent::connect();\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:57: Unsupported: scoped class reference\nfunction void apb_slave_agent::connect();\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:37: Unsupported: Out of class block function declaration\n extern virtual function void build();\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:67: Unsupported: Hierarchical class references\nfunction void apb_slave_agent::assign_vi(virtual interface apb_if vif);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:67: Unsupported: scoped class reference\nfunction void apb_slave_agent::assign_vi(virtual interface apb_if vif);\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:57: Unsupported: Out of class block function declaration\nfunction void apb_slave_agent::connect();\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:67: Unsupported: virtual interface\nfunction void apb_slave_agent::assign_vi(virtual interface apb_if vif);\n ^~~~~~~\n%Error: Exiting due to 20 error(s)\n ... See the manual and https://verilator.org for more assistance.\n' | 308,399 | function | function void build();
extern virtual function void connect();
extern virtual function void assign_vi(virtual interface apb_if vif);
endclass : apb_slave_agent
function void apb_slave_agent::build();
super.build();
if (cfg != null) is_active = cfg.is_active;
collector = apb_collector::type_id::create("collector", this);
monitor = apb_monitor::type_id::create("monitor", this);
if(is_active == UVM_ACTIVE) begin
sequencer = apb_slave_sequencer::type_id::create("sequencer",this);
driver = apb_slave_driver::type_id::create("driver",this);
end
endfunction | function void build(); |
extern virtual function void connect();
extern virtual function void assign_vi(virtual interface apb_if vif);
endclass : apb_slave_agent
function void apb_slave_agent::build();
super.build();
if (cfg != null) is_active = cfg.is_active;
collector = apb_collector::type_id::create("collector", this);
monitor = apb_monitor::type_id::create("monitor", this);
if(is_active == UVM_ACTIVE) begin
sequencer = apb_slave_sequencer::type_id::create("sequencer",this);
driver = apb_slave_driver::type_id::create("driver",this);
end
endfunction | 0 |
140,276 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv | 90,320,290 | apb_slave_agent.sv | sv | 75 | 81 | [] | [] | [] | null | line:11: before: "class" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:11: Unsupported: classes\nclass apb_slave_agent extends uvm_agent;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:11: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_slave_agent extends uvm_agent;\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:27: Define or directive not defined: \'`uvm_component_utils_begin\'\n `uvm_component_utils_begin(apb_slave_agent)\n ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:28: Define or directive not defined: \'`uvm_field_enum\'\n `uvm_field_enum(uvm_active_passive_enum, is_active, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:29: Define or directive not defined: \'`uvm_component_utils_end\'\n `uvm_component_utils_end\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:32: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:32: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:38: syntax error, unexpected extern\n extern virtual function void connect();\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:45: Unsupported: super\n super.build();\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:48: syntax error, unexpected ::, expecting \';\'\n collector = apb_collector::type_id::create("collector", this);\n ^~\n : ... Perhaps \'apb_collector\' is a package which needs to be predeclared? (IEEE 1800-2017 26.3)\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:49: syntax error, unexpected ::, expecting \';\'\n monitor = apb_monitor::type_id::create("monitor", this);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:51: syntax error, unexpected ::, expecting \';\'\n sequencer = apb_slave_sequencer::type_id::create("sequencer",this);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:52: syntax error, unexpected ::, expecting \';\'\n driver = apb_slave_driver::type_id::create("driver",this);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:57: Unsupported: Hierarchical class references\nfunction void apb_slave_agent::connect();\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:57: Unsupported: scoped class reference\nfunction void apb_slave_agent::connect();\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:37: Unsupported: Out of class block function declaration\n extern virtual function void build();\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:67: Unsupported: Hierarchical class references\nfunction void apb_slave_agent::assign_vi(virtual interface apb_if vif);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:67: Unsupported: scoped class reference\nfunction void apb_slave_agent::assign_vi(virtual interface apb_if vif);\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:57: Unsupported: Out of class block function declaration\nfunction void apb_slave_agent::connect();\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:67: Unsupported: virtual interface\nfunction void apb_slave_agent::assign_vi(virtual interface apb_if vif);\n ^~~~~~~\n%Error: Exiting due to 20 error(s)\n ... See the manual and https://verilator.org for more assistance.\n' | 308,399 | function | function void apb_slave_agent::connect();
collector.item_collected_port.connect(monitor.coll_mon_port);
monitor.addr_trans_port.connect(collector.addr_trans_export);
if (is_active == UVM_ACTIVE) begin
driver.seq_item_port.connect(sequencer.seq_item_export);
end
endfunction | function void apb_slave_agent::connect(); |
collector.item_collected_port.connect(monitor.coll_mon_port);
monitor.addr_trans_port.connect(collector.addr_trans_export);
if (is_active == UVM_ACTIVE) begin
driver.seq_item_port.connect(sequencer.seq_item_export);
end
endfunction | 0 |
140,277 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv | 90,320,290 | apb_slave_agent.sv | sv | 75 | 81 | [] | [] | [] | null | line:11: before: "class" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:11: Unsupported: classes\nclass apb_slave_agent extends uvm_agent;\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:11: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_slave_agent extends uvm_agent;\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:27: Define or directive not defined: \'`uvm_component_utils_begin\'\n `uvm_component_utils_begin(apb_slave_agent)\n ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:28: Define or directive not defined: \'`uvm_field_enum\'\n `uvm_field_enum(uvm_active_passive_enum, is_active, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:29: Define or directive not defined: \'`uvm_component_utils_end\'\n `uvm_component_utils_end\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:32: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:32: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:38: syntax error, unexpected extern\n extern virtual function void connect();\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:45: Unsupported: super\n super.build();\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:48: syntax error, unexpected ::, expecting \';\'\n collector = apb_collector::type_id::create("collector", this);\n ^~\n : ... Perhaps \'apb_collector\' is a package which needs to be predeclared? (IEEE 1800-2017 26.3)\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:49: syntax error, unexpected ::, expecting \';\'\n monitor = apb_monitor::type_id::create("monitor", this);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:51: syntax error, unexpected ::, expecting \';\'\n sequencer = apb_slave_sequencer::type_id::create("sequencer",this);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:52: syntax error, unexpected ::, expecting \';\'\n driver = apb_slave_driver::type_id::create("driver",this);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:57: Unsupported: Hierarchical class references\nfunction void apb_slave_agent::connect();\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:57: Unsupported: scoped class reference\nfunction void apb_slave_agent::connect();\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:37: Unsupported: Out of class block function declaration\n extern virtual function void build();\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:67: Unsupported: Hierarchical class references\nfunction void apb_slave_agent::assign_vi(virtual interface apb_if vif);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:67: Unsupported: scoped class reference\nfunction void apb_slave_agent::assign_vi(virtual interface apb_if vif);\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:57: Unsupported: Out of class block function declaration\nfunction void apb_slave_agent::connect();\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_agent.sv:67: Unsupported: virtual interface\nfunction void apb_slave_agent::assign_vi(virtual interface apb_if vif);\n ^~~~~~~\n%Error: Exiting due to 20 error(s)\n ... See the manual and https://verilator.org for more assistance.\n' | 308,399 | function | function void apb_slave_agent::assign_vi(virtual interface apb_if vif);
collector.vif = vif;
if (is_active == UVM_ACTIVE) begin
if(driver != null) driver.vif = vif;
end
endfunction | function void apb_slave_agent::assign_vi(virtual interface apb_if vif); |
collector.vif = vif;
if (is_active == UVM_ACTIVE) begin
if(driver != null) driver.vif = vif;
end
endfunction | 0 |
140,278 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv | 90,320,290 | apb_slave_driver.sv | sv | 93 | 89 | [] | [] | [] | null | line:15: before: "class" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:15: Unsupported: classes\nclass apb_slave_driver extends uvm_driver #(apb_transfer);\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:15: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_slave_driver extends uvm_driver #(apb_transfer);\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:18: Unsupported: virtual data type\n virtual apb_if vif;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:21: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(apb_slave_driver)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:21: syntax error, unexpected \'(\'\n `uvm_component_utils(apb_slave_driver)\n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:24: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:24: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:29: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern virtual function void connect_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:30: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern virtual task run_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:32: syntax error, unexpected extern\n extern virtual task reset_signals();\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:39: Unsupported: super\n super.connect_phase(phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:44: syntax error, unexpected \'#\'\n if (!uvm_config_db#(virtual apb_if)::get(this, "", "vif", vif))\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:45: Define or directive not defined: \'`uvm_error\'\n : ... Suggested alternative: \'`error\'\n `uvm_error("NOVIF",{"virtual interface must be set for: ",get_full_name(),".vif"})\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:52: Unsupported: fork statements\n fork\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:56: syntax error, unexpected endtask\nendtask : run_phase\n^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:62: Define or directive not defined: \'`uvm_info\'\n `uvm_info(get_type_name(), "Reset dropped", UVM_MEDIUM)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:62: syntax error, unexpected \',\'\n `uvm_info(get_type_name(), "Reset dropped", UVM_MEDIUM)\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:71: Unsupported: Hierarchical class references\ntask apb_slave_driver::reset_signals();\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:71: Unsupported: scoped class reference\ntask apb_slave_driver::reset_signals();\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:31: Unsupported: Out of class block function declaration\n extern virtual task get_and_drive();\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:73: syntax error, unexpected \'@\'\n @(negedge vif.presetn);\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:74: Define or directive not defined: \'`uvm_info\'\n `uvm_info(get_type_name(), "Reset observed", UVM_MEDIUM)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:74: syntax error, unexpected \',\'\n `uvm_info(get_type_name(), "Reset observed", UVM_MEDIUM)\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:82: Unsupported: Hierarchical class references\ntask apb_slave_driver::respond_to_transfer(apb_transfer resp);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:82: Unsupported: scoped class reference\ntask apb_slave_driver::respond_to_transfer(apb_transfer resp);\n ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:71: Unsupported: Out of class block function declaration\ntask apb_slave_driver::reset_signals();\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:82: syntax error, unexpected IDENTIFIER, expecting \')\'\ntask apb_slave_driver::respond_to_transfer(apb_transfer resp);\n ^~~~\n%Error: Exiting due to 27 error(s)\n ... See the manual and https://verilator.org for more assistance.\n' | 308,400 | function | function new (string name, uvm_component parent);
super.new(name, parent);
endfunction | function new (string name, uvm_component parent); |
super.new(name, parent);
endfunction | 0 |
140,279 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv | 90,320,290 | apb_slave_driver.sv | sv | 93 | 89 | [] | [] | [] | null | line:15: before: "class" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:15: Unsupported: classes\nclass apb_slave_driver extends uvm_driver #(apb_transfer);\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:15: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_slave_driver extends uvm_driver #(apb_transfer);\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:18: Unsupported: virtual data type\n virtual apb_if vif;\n ^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:21: Define or directive not defined: \'`uvm_component_utils\'\n `uvm_component_utils(apb_slave_driver)\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:21: syntax error, unexpected \'(\'\n `uvm_component_utils(apb_slave_driver)\n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:24: Unsupported: new constructor\n function new (string name, uvm_component parent);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:24: syntax error, unexpected IDENTIFIER, expecting \')\'\n function new (string name, uvm_component parent);\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:29: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern virtual function void connect_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:30: syntax error, unexpected IDENTIFIER, expecting \')\'\n extern virtual task run_phase(uvm_phase phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:32: syntax error, unexpected extern\n extern virtual task reset_signals();\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:39: Unsupported: super\n super.connect_phase(phase);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:44: syntax error, unexpected \'#\'\n if (!uvm_config_db#(virtual apb_if)::get(this, "", "vif", vif))\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:45: Define or directive not defined: \'`uvm_error\'\n : ... Suggested alternative: \'`error\'\n `uvm_error("NOVIF",{"virtual interface must be set for: ",get_full_name(),".vif"})\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:52: Unsupported: fork statements\n fork\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:56: syntax error, unexpected endtask\nendtask : run_phase\n^~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:62: Define or directive not defined: \'`uvm_info\'\n `uvm_info(get_type_name(), "Reset dropped", UVM_MEDIUM)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:62: syntax error, unexpected \',\'\n `uvm_info(get_type_name(), "Reset dropped", UVM_MEDIUM)\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:71: Unsupported: Hierarchical class references\ntask apb_slave_driver::reset_signals();\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:71: Unsupported: scoped class reference\ntask apb_slave_driver::reset_signals();\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:31: Unsupported: Out of class block function declaration\n extern virtual task get_and_drive();\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:73: syntax error, unexpected \'@\'\n @(negedge vif.presetn);\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:74: Define or directive not defined: \'`uvm_info\'\n `uvm_info(get_type_name(), "Reset observed", UVM_MEDIUM)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:74: syntax error, unexpected \',\'\n `uvm_info(get_type_name(), "Reset observed", UVM_MEDIUM)\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:82: Unsupported: Hierarchical class references\ntask apb_slave_driver::respond_to_transfer(apb_transfer resp);\n ^~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:82: Unsupported: scoped class reference\ntask apb_slave_driver::respond_to_transfer(apb_transfer resp);\n ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:71: Unsupported: Out of class block function declaration\ntask apb_slave_driver::reset_signals();\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_slave_driver.sv:82: syntax error, unexpected IDENTIFIER, expecting \')\'\ntask apb_slave_driver::respond_to_transfer(apb_transfer resp);\n ^~~~\n%Error: Exiting due to 27 error(s)\n ... See the manual and https://verilator.org for more assistance.\n' | 308,400 | function | function void connect_phase(uvm_phase phase);
extern virtual task run_phase(uvm_phase phase);
extern virtual task get_and_drive();
extern virtual task reset_signals();
extern virtual task respond_to_transfer(apb_transfer resp);
endclass : apb_slave_driver
function void apb_slave_driver::connect_phase(uvm_phase phase);
super.connect_phase(phase);
if(vif == null) begin
if (!uvm_config_db#(virtual apb_if)::get(this, "", "vif", vif))
`uvm_error("NOVIF",{"virtual interface must be set for: ",get_full_name(),".vif"})
end
endfunction | function void connect_phase(uvm_phase phase); |
extern virtual task run_phase(uvm_phase phase);
extern virtual task get_and_drive();
extern virtual task reset_signals();
extern virtual task respond_to_transfer(apb_transfer resp);
endclass : apb_slave_driver
function void apb_slave_driver::connect_phase(uvm_phase phase);
super.connect_phase(phase);
if(vif == null) begin
if (!uvm_config_db#(virtual apb_if)::get(this, "", "vif", vif))
`uvm_error("NOVIF",{"virtual interface must be set for: ",get_full_name(),".vif"})
end
endfunction | 0 |
140,280 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_traffic_seq.sv | 90,320,290 | apb_traffic_seq.sv | sv | 36 | 81 | [] | [] | [] | null | line:4: before: "class" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_traffic_seq.sv:4: Unsupported: classes\nclass apb_traffic_seq extends uvm_sequence #(apb_transfer);\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_traffic_seq.sv:4: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_traffic_seq extends uvm_sequence #(apb_transfer);\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_traffic_seq.sv:10: Define or directive not defined: \'`uvm_object_utils\'\n `uvm_object_utils(apb_traffic_seq)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_traffic_seq.sv:12: Unsupported: new constructor\n function new(string name="apb_traffic_seq");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_traffic_seq.sv:13: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_traffic_seq.sv:13: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_traffic_seq.sv:13: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_traffic_seq.sv:17: syntax error, unexpected virtual\n virtual task body();\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_traffic_seq.sv:20: Unsupported: this\n starting_phase.raise_objection(this, {"Running sequence:",\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_traffic_seq.sv:23: Define or directive not defined: \'`uvm_info\'\n `uvm_info(get_type_name(), "Starting...", UVM_HIGH)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_traffic_seq.sv:23: syntax error, unexpected \',\'\n `uvm_info(get_type_name(), "Starting...", UVM_HIGH)\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_traffic_seq.sv:25: Define or directive not defined: \'`uvm_do_with\'\n `uvm_do_with( wr_rd_seq, { start_addr inside {[\'h0000:\'h1fff]}; } )\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_traffic_seq.sv:26: Define or directive not defined: \'`uvm_do_with\'\n `uvm_do_with( multi_seq, { num_seq == 5; } )\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_traffic_seq.sv:28: Define or directive not defined: \'`uvm_do_with\'\n `uvm_do_with(wr_rd_seq, { start_addr inside {[\'h2000:\'hffff]};})\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_traffic_seq.sv:35: syntax error, unexpected endclass\nendclass : apb_traffic_seq\n^~~~~~~~\n%Error: Exiting due to 15 error(s)\n ... See the manual and https://verilator.org for more assistance.\n' | 308,402 | function | function new(string name="apb_traffic_seq");
super.new(name);
endfunction | function new(string name="apb_traffic_seq"); |
super.new(name);
endfunction | 0 |
140,281 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_transfer.sv | 90,320,290 | apb_transfer.sv | sv | 48 | 81 | [] | [] | [] | null | line:9: before: "typedef" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_transfer.sv:11: Unsupported: classes\nclass apb_transfer extends uvm_sequence_item; \n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_transfer.sv:11: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_transfer extends uvm_sequence_item; \n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_transfer.sv:14: syntax error, unexpected rand\n rand bit [31:0] data;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_transfer.sv:15: syntax error, unexpected rand\n rand apb_direction_enum direction;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_transfer.sv:18: syntax error, unexpected rand\n rand apb_dly_enum delay_kind;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_transfer.sv:19: syntax error, unexpected rand\n rand int unsigned transmit_delay;\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_transfer.sv:21: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint c_addr { addr[1:0] == 2\'b00; }\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_transfer.sv:21: syntax error, unexpected IDENTIFIER\n constraint c_addr { addr[1:0] == 2\'b00; }\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_transfer.sv:22: Unsupported: SystemVerilog 2005 reserved word not implemented: \'constraint\'\n constraint c_transmit_delay { solve delay_kind before transmit_delay;\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_transfer.sv:22: Unsupported: SystemVerilog 2005 reserved word not implemented: \'solve\'\n constraint c_transmit_delay { solve delay_kind before transmit_delay;\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_transfer.sv:22: Unsupported: SystemVerilog 2005 reserved word not implemented: \'before\'\n constraint c_transmit_delay { solve delay_kind before transmit_delay;\n ^~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_transfer.sv:31: Define or directive not defined: \'`uvm_object_utils_begin\'\n `uvm_object_utils_begin(apb_transfer)\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_transfer.sv:32: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(addr, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_transfer.sv:33: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(data, UVM_DEFAULT)\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_transfer.sv:34: Define or directive not defined: \'`uvm_field_enum\'\n `uvm_field_enum(apb_direction_enum, direction, UVM_DEFAULT)\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_transfer.sv:35: Define or directive not defined: \'`uvm_field_enum\'\n `uvm_field_enum(apb_dly_enum, delay_kind,\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_transfer.sv:37: Define or directive not defined: \'`uvm_field_int\'\n `uvm_field_int(transmit_delay,\n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_transfer.sv:39: Define or directive not defined: \'`uvm_object_utils_end\'\n `uvm_object_utils_end\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_transfer.sv:42: Unsupported: new constructor\n function new (string name = "apb_transfer");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_transfer.sv:43: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_transfer.sv:43: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_transfer.sv:43: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_transfer.sv:46: syntax error, unexpected endclass\nendclass : apb_transfer\n^~~~~~~~\n%Error: Exiting due to 23 error(s)\n ... See the manual and https://verilator.org for more assistance.\n' | 308,403 | function | function new (string name = "apb_transfer");
super.new(name);
endfunction | function new (string name = "apb_transfer"); |
super.new(name);
endfunction | 0 |
140,282 | data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_transfer_seq.sv | 90,320,290 | apb_transfer_seq.sv | sv | 40 | 81 | [] | [] | [] | null | line:7: before: "class" | null | 1: b'%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_transfer_seq.sv:7: Unsupported: classes\nclass apb_transfer_seq extends uvm_sequence #(apb_transfer);\n^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_transfer_seq.sv:7: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass apb_transfer_seq extends uvm_sequence #(apb_transfer);\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_transfer_seq.sv:9: Unsupported: new constructor\n function new(string name="apb_transfer_seq");\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_transfer_seq.sv:10: Unsupported: super\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_transfer_seq.sv:10: Unsupported: new with arguments\n super.new(name);\n ^~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_transfer_seq.sv:10: Unsupported: dotted new\n super.new(name);\n ^~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_transfer_seq.sv:13: Define or directive not defined: \'`uvm_object_utils\'\n `uvm_object_utils(apb_transfer_seq)\n ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_transfer_seq.sv:13: syntax error, unexpected \'(\'\n `uvm_object_utils(apb_transfer_seq)\n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_transfer_seq.sv:19: Unsupported: this\n starting_phase.raise_objection(this, {"Running sequence:",\n ^~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_transfer_seq.sv:22: Define or directive not defined: \'`uvm_info\'\n `uvm_info(get_type_name(), "Starting...", UVM_HIGH)\n ^~~~~~~~~\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_transfer_seq.sv:22: syntax error, unexpected \',\'\n `uvm_info(get_type_name(), "Starting...", UVM_HIGH)\n ^\n%Error: data/full_repos/permissive/90320290/uvm_book/examples_lib/5_interface_uvcs/sv/apb_transfer_seq.sv:24: Define or directive not defined: \'`uvm_do\'\n `uvm_do(req)\n ^~~~~~~\n%Error: Exiting due to 12 error(s)\n ... See the manual and https://verilator.org for more assistance.\n' | 308,404 | function | function new(string name="apb_transfer_seq");
super.new(name);
endfunction | function new(string name="apb_transfer_seq"); |
super.new(name);
endfunction | 0 |
Subsets and Splits