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// SPDX-License-Identifier: GPL-2.0-or-later
/*
*
* Implementation of primary alsa driver code base for Intel HD Audio.
*
* Copyright(c) 2004 Intel Corporation. All rights reserved.
*
* Copyright (c) 2004 Takashi Iwai <[email protected]>
* PeiSen Hou <[email protected]>
*/
#include <linux/clocksource.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pm_runtime.h>
#include <linux/slab.h>
#ifdef CONFIG_X86
/* for art-tsc conversion */
#include <asm/tsc.h>
#endif
#include <sound/core.h>
#include <sound/initval.h>
#include "hda_controller.h"
#include "hda_local.h"
#define CREATE_TRACE_POINTS
#include "hda_controller_trace.h"
/* DSP lock helpers */
#define dsp_lock(dev) snd_hdac_dsp_lock(azx_stream(dev))
#define dsp_unlock(dev) snd_hdac_dsp_unlock(azx_stream(dev))
#define dsp_is_locked(dev) snd_hdac_stream_is_locked(azx_stream(dev))
/* assign a stream for the PCM */
static inline struct azx_dev *
azx_assign_device(struct azx *chip, struct snd_pcm_substream *substream)
{
struct hdac_stream *s;
s = snd_hdac_stream_assign(azx_bus(chip), substream);
if (!s)
return NULL;
return stream_to_azx_dev(s);
}
/* release the assigned stream */
static inline void azx_release_device(struct azx_dev *azx_dev)
{
snd_hdac_stream_release(azx_stream(azx_dev));
}
static inline struct hda_pcm_stream *
to_hda_pcm_stream(struct snd_pcm_substream *substream)
{
struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
return &apcm->info->stream[substream->stream];
}
static u64 azx_adjust_codec_delay(struct snd_pcm_substream *substream,
u64 nsec)
{
struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
struct hda_pcm_stream *hinfo = to_hda_pcm_stream(substream);
u64 codec_frames, codec_nsecs;
if (!hinfo->ops.get_delay)
return nsec;
codec_frames = hinfo->ops.get_delay(hinfo, apcm->codec, substream);
codec_nsecs = div_u64(codec_frames * 1000000000LL,
substream->runtime->rate);
if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
return nsec + codec_nsecs;
return (nsec > codec_nsecs) ? nsec - codec_nsecs : 0;
}
/*
* PCM ops
*/
static int azx_pcm_close(struct snd_pcm_substream *substream)
{
struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
struct hda_pcm_stream *hinfo = to_hda_pcm_stream(substream);
struct azx *chip = apcm->chip;
struct azx_dev *azx_dev = get_azx_dev(substream);
trace_azx_pcm_close(chip, azx_dev);
mutex_lock(&chip->open_mutex);
azx_release_device(azx_dev);
if (hinfo->ops.close)
hinfo->ops.close(hinfo, apcm->codec, substream);
snd_hda_power_down(apcm->codec);
mutex_unlock(&chip->open_mutex);
snd_hda_codec_pcm_put(apcm->info);
return 0;
}
static int azx_pcm_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *hw_params)
{
struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
struct azx *chip = apcm->chip;
struct azx_dev *azx_dev = get_azx_dev(substream);
int ret = 0;
trace_azx_pcm_hw_params(chip, azx_dev);
dsp_lock(azx_dev);
if (dsp_is_locked(azx_dev)) {
ret = -EBUSY;
goto unlock;
}
azx_dev->core.bufsize = 0;
azx_dev->core.period_bytes = 0;
azx_dev->core.format_val = 0;
unlock:
dsp_unlock(azx_dev);
return ret;
}
static int azx_pcm_hw_free(struct snd_pcm_substream *substream)
{
struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
struct azx_dev *azx_dev = get_azx_dev(substream);
struct hda_pcm_stream *hinfo = to_hda_pcm_stream(substream);
/* reset BDL address */
dsp_lock(azx_dev);
if (!dsp_is_locked(azx_dev))
snd_hdac_stream_cleanup(azx_stream(azx_dev));
snd_hda_codec_cleanup(apcm->codec, hinfo, substream);
azx_stream(azx_dev)->prepared = 0;
dsp_unlock(azx_dev);
return 0;
}
static int azx_pcm_prepare(struct snd_pcm_substream *substream)
{
struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
struct azx *chip = apcm->chip;
struct azx_dev *azx_dev = get_azx_dev(substream);
struct hda_pcm_stream *hinfo = to_hda_pcm_stream(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
unsigned int format_val, stream_tag;
int err;
struct hda_spdif_out *spdif =
snd_hda_spdif_out_of_nid(apcm->codec, hinfo->nid);
unsigned short ctls = spdif ? spdif->ctls : 0;
trace_azx_pcm_prepare(chip, azx_dev);
dsp_lock(azx_dev);
if (dsp_is_locked(azx_dev)) {
err = -EBUSY;
goto unlock;
}
snd_hdac_stream_reset(azx_stream(azx_dev));
format_val = snd_hdac_calc_stream_format(runtime->rate,
runtime->channels,
runtime->format,
hinfo->maxbps,
ctls);
if (!format_val) {
dev_err(chip->card->dev,
"invalid format_val, rate=%d, ch=%d, format=%d\n",
runtime->rate, runtime->channels, runtime->format);
err = -EINVAL;
goto unlock;
}
err = snd_hdac_stream_set_params(azx_stream(azx_dev), format_val);
if (err < 0)
goto unlock;
snd_hdac_stream_setup(azx_stream(azx_dev));
stream_tag = azx_dev->core.stream_tag;
/* CA-IBG chips need the playback stream starting from 1 */
if ((chip->driver_caps & AZX_DCAPS_CTX_WORKAROUND) &&
stream_tag > chip->capture_streams)
stream_tag -= chip->capture_streams;
err = snd_hda_codec_prepare(apcm->codec, hinfo, stream_tag,
azx_dev->core.format_val, substream);
unlock:
if (!err)
azx_stream(azx_dev)->prepared = 1;
dsp_unlock(azx_dev);
return err;
}
static int azx_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
{
struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
struct azx *chip = apcm->chip;
struct hdac_bus *bus = azx_bus(chip);
struct azx_dev *azx_dev;
struct snd_pcm_substream *s;
struct hdac_stream *hstr;
bool start;
int sbits = 0;
int sync_reg;
azx_dev = get_azx_dev(substream);
trace_azx_pcm_trigger(chip, azx_dev, cmd);
hstr = azx_stream(azx_dev);
if (chip->driver_caps & AZX_DCAPS_OLD_SSYNC)
sync_reg = AZX_REG_OLD_SSYNC;
else
sync_reg = AZX_REG_SSYNC;
if (dsp_is_locked(azx_dev) || !hstr->prepared)
return -EPIPE;
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
case SNDRV_PCM_TRIGGER_RESUME:
start = true;
break;
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
case SNDRV_PCM_TRIGGER_SUSPEND:
case SNDRV_PCM_TRIGGER_STOP:
start = false;
break;
default:
return -EINVAL;
}
snd_pcm_group_for_each_entry(s, substream) {
if (s->pcm->card != substream->pcm->card)
continue;
azx_dev = get_azx_dev(s);
sbits |= 1 << azx_dev->core.index;
snd_pcm_trigger_done(s, substream);
}
spin_lock(&bus->reg_lock);
/* first, set SYNC bits of corresponding streams */
snd_hdac_stream_sync_trigger(hstr, true, sbits, sync_reg);
snd_pcm_group_for_each_entry(s, substream) {
if (s->pcm->card != substream->pcm->card)
continue;
azx_dev = get_azx_dev(s);
if (start) {
azx_dev->insufficient = 1;
snd_hdac_stream_start(azx_stream(azx_dev));
} else {
snd_hdac_stream_stop(azx_stream(azx_dev));
}
}
spin_unlock(&bus->reg_lock);
snd_hdac_stream_sync(hstr, start, sbits);
spin_lock(&bus->reg_lock);
/* reset SYNC bits */
snd_hdac_stream_sync_trigger(hstr, false, sbits, sync_reg);
if (start)
snd_hdac_stream_timecounter_init(hstr, sbits);
spin_unlock(&bus->reg_lock);
return 0;
}
unsigned int azx_get_pos_lpib(struct azx *chip, struct azx_dev *azx_dev)
{
return snd_hdac_stream_get_pos_lpib(azx_stream(azx_dev));
}
EXPORT_SYMBOL_GPL(azx_get_pos_lpib);
unsigned int azx_get_pos_posbuf(struct azx *chip, struct azx_dev *azx_dev)
{
return snd_hdac_stream_get_pos_posbuf(azx_stream(azx_dev));
}
EXPORT_SYMBOL_GPL(azx_get_pos_posbuf);
unsigned int azx_get_position(struct azx *chip,
struct azx_dev *azx_dev)
{
struct snd_pcm_substream *substream = azx_dev->core.substream;
unsigned int pos;
int stream = substream->stream;
int delay = 0;
if (chip->get_position[stream])
pos = chip->get_position[stream](chip, azx_dev);
else /* use the position buffer as default */
pos = azx_get_pos_posbuf(chip, azx_dev);
if (pos >= azx_dev->core.bufsize)
pos = 0;
if (substream->runtime) {
struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
struct hda_pcm_stream *hinfo = to_hda_pcm_stream(substream);
if (chip->get_delay[stream])
delay += chip->get_delay[stream](chip, azx_dev, pos);
if (hinfo->ops.get_delay)
delay += hinfo->ops.get_delay(hinfo, apcm->codec,
substream);
substream->runtime->delay = delay;
}
trace_azx_get_position(chip, azx_dev, pos, delay);
return pos;
}
EXPORT_SYMBOL_GPL(azx_get_position);
static snd_pcm_uframes_t azx_pcm_pointer(struct snd_pcm_substream *substream)
{
struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
struct azx *chip = apcm->chip;
struct azx_dev *azx_dev = get_azx_dev(substream);
return bytes_to_frames(substream->runtime,
azx_get_position(chip, azx_dev));
}
/*
* azx_scale64: Scale base by mult/div while not overflowing sanely
*
* Derived from scale64_check_overflow in kernel/time/timekeeping.c
*
* The tmestamps for a 48Khz stream can overflow after (2^64/10^9)/48K which
* is about 384307 ie ~4.5 days.
*
* This scales the calculation so that overflow will happen but after 2^64 /
* 48000 secs, which is pretty large!
*
* In caln below:
* base may overflow, but since there isn’t any additional division
* performed on base it’s OK
* rem can’t overflow because both are 32-bit values
*/
#ifdef CONFIG_X86
static u64 azx_scale64(u64 base, u32 num, u32 den)
{
u64 rem;
rem = do_div(base, den);
base *= num;
rem *= num;
do_div(rem, den);
return base + rem;
}
static int azx_get_sync_time(ktime_t *device,
struct system_counterval_t *system, void *ctx)
{
struct snd_pcm_substream *substream = ctx;
struct azx_dev *azx_dev = get_azx_dev(substream);
struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
struct azx *chip = apcm->chip;
struct snd_pcm_runtime *runtime;
u64 ll_counter, ll_counter_l, ll_counter_h;
u64 tsc_counter, tsc_counter_l, tsc_counter_h;
u32 wallclk_ctr, wallclk_cycles;
bool direction;
u32 dma_select;
u32 timeout;
u32 retry_count = 0;
runtime = substream->runtime;
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
direction = 1;
else
direction = 0;
/* 0th stream tag is not used, so DMA ch 0 is for 1st stream tag */
do {
timeout = 100;
dma_select = (direction << GTSCC_CDMAS_DMA_DIR_SHIFT) |
(azx_dev->core.stream_tag - 1);
snd_hdac_chip_writel(azx_bus(chip), GTSCC, dma_select);
/* Enable the capture */
snd_hdac_chip_updatel(azx_bus(chip), GTSCC, 0, GTSCC_TSCCI_MASK);
while (timeout) {
if (snd_hdac_chip_readl(azx_bus(chip), GTSCC) &
GTSCC_TSCCD_MASK)
break;
timeout--;
}
if (!timeout) {
dev_err(chip->card->dev, "GTSCC capture Timedout!\n");
return -EIO;
}
/* Read wall clock counter */
wallclk_ctr = snd_hdac_chip_readl(azx_bus(chip), WALFCC);
/* Read TSC counter */
tsc_counter_l = snd_hdac_chip_readl(azx_bus(chip), TSCCL);
tsc_counter_h = snd_hdac_chip_readl(azx_bus(chip), TSCCU);
/* Read Link counter */
ll_counter_l = snd_hdac_chip_readl(azx_bus(chip), LLPCL);
ll_counter_h = snd_hdac_chip_readl(azx_bus(chip), LLPCU);
/* Ack: registers read done */
snd_hdac_chip_writel(azx_bus(chip), GTSCC, GTSCC_TSCCD_SHIFT);
tsc_counter = (tsc_counter_h << TSCCU_CCU_SHIFT) |
tsc_counter_l;
ll_counter = (ll_counter_h << LLPC_CCU_SHIFT) | ll_counter_l;
wallclk_cycles = wallclk_ctr & WALFCC_CIF_MASK;
/*
* An error occurs near frame "rollover". The clocks in
* frame value indicates whether this error may have
* occurred. Here we use the value of 10 i.e.,
* HDA_MAX_CYCLE_OFFSET
*/
if (wallclk_cycles < HDA_MAX_CYCLE_VALUE - HDA_MAX_CYCLE_OFFSET
&& wallclk_cycles > HDA_MAX_CYCLE_OFFSET)
break;
/*
* Sleep before we read again, else we may again get
* value near to MAX_CYCLE. Try to sleep for different
* amount of time so we dont hit the same number again
*/
udelay(retry_count++);
} while (retry_count != HDA_MAX_CYCLE_READ_RETRY);
if (retry_count == HDA_MAX_CYCLE_READ_RETRY) {
dev_err_ratelimited(chip->card->dev,
"Error in WALFCC cycle count\n");
return -EIO;
}
*device = ns_to_ktime(azx_scale64(ll_counter,
NSEC_PER_SEC, runtime->rate));
*device = ktime_add_ns(*device, (wallclk_cycles * NSEC_PER_SEC) /
((HDA_MAX_CYCLE_VALUE + 1) * runtime->rate));
*system = convert_art_to_tsc(tsc_counter);
return 0;
}
#else
static int azx_get_sync_time(ktime_t *device,
struct system_counterval_t *system, void *ctx)
{
return -ENXIO;
}
#endif
static int azx_get_crosststamp(struct snd_pcm_substream *substream,
struct system_device_crosststamp *xtstamp)
{
return get_device_system_crosststamp(azx_get_sync_time,
substream, NULL, xtstamp);
}
static inline bool is_link_time_supported(struct snd_pcm_runtime *runtime,
struct snd_pcm_audio_tstamp_config *ts)
{
if (runtime->hw.info & SNDRV_PCM_INFO_HAS_LINK_SYNCHRONIZED_ATIME)
if (ts->type_requested == SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_SYNCHRONIZED)
return true;
return false;
}
static int azx_get_time_info(struct snd_pcm_substream *substream,
struct timespec64 *system_ts, struct timespec64 *audio_ts,
struct snd_pcm_audio_tstamp_config *audio_tstamp_config,
struct snd_pcm_audio_tstamp_report *audio_tstamp_report)
{
struct azx_dev *azx_dev = get_azx_dev(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
struct system_device_crosststamp xtstamp;
int ret;
u64 nsec;
if ((substream->runtime->hw.info & SNDRV_PCM_INFO_HAS_LINK_ATIME) &&
(audio_tstamp_config->type_requested == SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK)) {
snd_pcm_gettime(substream->runtime, system_ts);
nsec = timecounter_read(&azx_dev->core.tc);
if (audio_tstamp_config->report_delay)
nsec = azx_adjust_codec_delay(substream, nsec);
*audio_ts = ns_to_timespec64(nsec);
audio_tstamp_report->actual_type = SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK;
audio_tstamp_report->accuracy_report = 1; /* rest of structure is valid */
audio_tstamp_report->accuracy = 42; /* 24 MHz WallClock == 42ns resolution */
} else if (is_link_time_supported(runtime, audio_tstamp_config)) {
ret = azx_get_crosststamp(substream, &xtstamp);
if (ret)
return ret;
switch (runtime->tstamp_type) {
case SNDRV_PCM_TSTAMP_TYPE_MONOTONIC:
return -EINVAL;
case SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW:
*system_ts = ktime_to_timespec64(xtstamp.sys_monoraw);
break;
default:
*system_ts = ktime_to_timespec64(xtstamp.sys_realtime);
break;
}
*audio_ts = ktime_to_timespec64(xtstamp.device);
audio_tstamp_report->actual_type =
SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_SYNCHRONIZED;
audio_tstamp_report->accuracy_report = 1;
/* 24 MHz WallClock == 42ns resolution */
audio_tstamp_report->accuracy = 42;
} else {
audio_tstamp_report->actual_type = SNDRV_PCM_AUDIO_TSTAMP_TYPE_DEFAULT;
}
return 0;
}
static const struct snd_pcm_hardware azx_pcm_hw = {
.info = (SNDRV_PCM_INFO_MMAP |
SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_MMAP_VALID |
/* No full-resume yet implemented */
/* SNDRV_PCM_INFO_RESUME |*/
SNDRV_PCM_INFO_PAUSE |
SNDRV_PCM_INFO_SYNC_START |
SNDRV_PCM_INFO_HAS_WALL_CLOCK | /* legacy */
SNDRV_PCM_INFO_HAS_LINK_ATIME |
SNDRV_PCM_INFO_NO_PERIOD_WAKEUP),
.formats = SNDRV_PCM_FMTBIT_S16_LE,
.rates = SNDRV_PCM_RATE_48000,
.rate_min = 48000,
.rate_max = 48000,
.channels_min = 2,
.channels_max = 2,
.buffer_bytes_max = AZX_MAX_BUF_SIZE,
.period_bytes_min = 128,
.period_bytes_max = AZX_MAX_BUF_SIZE / 2,
.periods_min = 2,
.periods_max = AZX_MAX_FRAG,
.fifo_size = 0,
};
static int azx_pcm_open(struct snd_pcm_substream *substream)
{
struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
struct hda_pcm_stream *hinfo = to_hda_pcm_stream(substream);
struct azx *chip = apcm->chip;
struct azx_dev *azx_dev;
struct snd_pcm_runtime *runtime = substream->runtime;
int err;
int buff_step;
snd_hda_codec_pcm_get(apcm->info);
mutex_lock(&chip->open_mutex);
azx_dev = azx_assign_device(chip, substream);
trace_azx_pcm_open(chip, azx_dev);
if (azx_dev == NULL) {
err = -EBUSY;
goto unlock;
}
runtime->private_data = azx_dev;
runtime->hw = azx_pcm_hw;
if (chip->gts_present)
runtime->hw.info |= SNDRV_PCM_INFO_HAS_LINK_SYNCHRONIZED_ATIME;
runtime->hw.channels_min = hinfo->channels_min;
runtime->hw.channels_max = hinfo->channels_max;
runtime->hw.formats = hinfo->formats;
runtime->hw.rates = hinfo->rates;
snd_pcm_limit_hw_rates(runtime);
snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
/* avoid wrap-around with wall-clock */
snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_TIME,
20,
178000000);
if (chip->align_buffer_size)
/* constrain buffer sizes to be multiple of 128
bytes. This is more efficient in terms of memory
access but isn't required by the HDA spec and
prevents users from specifying exact period/buffer
sizes. For example for 44.1kHz, a period size set
to 20ms will be rounded to 19.59ms. */
buff_step = 128;
else
/* Don't enforce steps on buffer sizes, still need to
be multiple of 4 bytes (HDA spec). Tested on Intel
HDA controllers, may not work on all devices where
option needs to be disabled */
buff_step = 4;
snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
buff_step);
snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
buff_step);
snd_hda_power_up(apcm->codec);
if (hinfo->ops.open)
err = hinfo->ops.open(hinfo, apcm->codec, substream);
else
err = -ENODEV;
if (err < 0) {
azx_release_device(azx_dev);
goto powerdown;
}
snd_pcm_limit_hw_rates(runtime);
/* sanity check */
if (snd_BUG_ON(!runtime->hw.channels_min) ||
snd_BUG_ON(!runtime->hw.channels_max) ||
snd_BUG_ON(!runtime->hw.formats) ||
snd_BUG_ON(!runtime->hw.rates)) {
azx_release_device(azx_dev);
if (hinfo->ops.close)
hinfo->ops.close(hinfo, apcm->codec, substream);
err = -EINVAL;
goto powerdown;
}
/* disable LINK_ATIME timestamps for capture streams
until we figure out how to handle digital inputs */
if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
runtime->hw.info &= ~SNDRV_PCM_INFO_HAS_WALL_CLOCK; /* legacy */
runtime->hw.info &= ~SNDRV_PCM_INFO_HAS_LINK_ATIME;
}
snd_pcm_set_sync(substream);
mutex_unlock(&chip->open_mutex);
return 0;
powerdown:
snd_hda_power_down(apcm->codec);
unlock:
mutex_unlock(&chip->open_mutex);
snd_hda_codec_pcm_put(apcm->info);
return err;
}
static const struct snd_pcm_ops azx_pcm_ops = {
.open = azx_pcm_open,
.close = azx_pcm_close,
.hw_params = azx_pcm_hw_params,
.hw_free = azx_pcm_hw_free,
.prepare = azx_pcm_prepare,
.trigger = azx_pcm_trigger,
.pointer = azx_pcm_pointer,
.get_time_info = azx_get_time_info,
};
static void azx_pcm_free(struct snd_pcm *pcm)
{
struct azx_pcm *apcm = pcm->private_data;
if (apcm) {
list_del(&apcm->list);
apcm->info->pcm = NULL;
kfree(apcm);
}
}
#define MAX_PREALLOC_SIZE (32 * 1024 * 1024)
int snd_hda_attach_pcm_stream(struct hda_bus *_bus, struct hda_codec *codec,
struct hda_pcm *cpcm)
{
struct hdac_bus *bus = &_bus->core;
struct azx *chip = bus_to_azx(bus);
struct snd_pcm *pcm;
struct azx_pcm *apcm;
int pcm_dev = cpcm->device;
unsigned int size;
int s, err;
int type = SNDRV_DMA_TYPE_DEV_SG;
list_for_each_entry(apcm, &chip->pcm_list, list) {
if (apcm->pcm->device == pcm_dev) {
dev_err(chip->card->dev, "PCM %d already exists\n",
pcm_dev);
return -EBUSY;
}
}
err = snd_pcm_new(chip->card, cpcm->name, pcm_dev,
cpcm->stream[SNDRV_PCM_STREAM_PLAYBACK].substreams,
cpcm->stream[SNDRV_PCM_STREAM_CAPTURE].substreams,
&pcm);
if (err < 0)
return err;
strscpy(pcm->name, cpcm->name, sizeof(pcm->name));
apcm = kzalloc(sizeof(*apcm), GFP_KERNEL);
if (apcm == NULL) {
snd_device_free(chip->card, pcm);
return -ENOMEM;
}
apcm->chip = chip;
apcm->pcm = pcm;
apcm->codec = codec;
apcm->info = cpcm;
pcm->private_data = apcm;
pcm->private_free = azx_pcm_free;
if (cpcm->pcm_type == HDA_PCM_TYPE_MODEM)
pcm->dev_class = SNDRV_PCM_CLASS_MODEM;
list_add_tail(&apcm->list, &chip->pcm_list);
cpcm->pcm = pcm;
for (s = 0; s < 2; s++) {
if (cpcm->stream[s].substreams)
snd_pcm_set_ops(pcm, s, &azx_pcm_ops);
}
/* buffer pre-allocation */
size = CONFIG_SND_HDA_PREALLOC_SIZE * 1024;
if (size > MAX_PREALLOC_SIZE)
size = MAX_PREALLOC_SIZE;
if (chip->uc_buffer)
type = SNDRV_DMA_TYPE_DEV_WC_SG;
snd_pcm_set_managed_buffer_all(pcm, type, chip->card->dev,
size, MAX_PREALLOC_SIZE);
return 0;
}
static unsigned int azx_command_addr(u32 cmd)
{
unsigned int addr = cmd >> 28;
if (addr >= AZX_MAX_CODECS) {
snd_BUG();
addr = 0;
}
return addr;
}
/* receive a response */
static int azx_rirb_get_response(struct hdac_bus *bus, unsigned int addr,
unsigned int *res)
{
struct azx *chip = bus_to_azx(bus);
struct hda_bus *hbus = &chip->bus;
int err;
again:
err = snd_hdac_bus_get_response(bus, addr, res);
if (!err)
return 0;
if (hbus->no_response_fallback)
return -EIO;
if (!bus->polling_mode) {
dev_warn(chip->card->dev,
"azx_get_response timeout, switching to polling mode: last cmd=0x%08x\n",
bus->last_cmd[addr]);
bus->polling_mode = 1;
goto again;
}
if (chip->msi) {
dev_warn(chip->card->dev,
"No response from codec, disabling MSI: last cmd=0x%08x\n",
bus->last_cmd[addr]);
if (chip->ops->disable_msi_reset_irq &&
chip->ops->disable_msi_reset_irq(chip) < 0)
return -EIO;
goto again;
}
if (chip->probing) {
/* If this critical timeout happens during the codec probing
* phase, this is likely an access to a non-existing codec
* slot. Better to return an error and reset the system.
*/
return -EIO;
}
/* no fallback mechanism? */
if (!chip->fallback_to_single_cmd)
return -EIO;
/* a fatal communication error; need either to reset or to fallback
* to the single_cmd mode
*/
if (hbus->allow_bus_reset && !hbus->response_reset && !hbus->in_reset) {
hbus->response_reset = 1;
dev_err(chip->card->dev,
"No response from codec, resetting bus: last cmd=0x%08x\n",
bus->last_cmd[addr]);
return -EAGAIN; /* give a chance to retry */
}
dev_err(chip->card->dev,
"azx_get_response timeout, switching to single_cmd mode: last cmd=0x%08x\n",
bus->last_cmd[addr]);
chip->single_cmd = 1;
hbus->response_reset = 0;
snd_hdac_bus_stop_cmd_io(bus);
return -EIO;
}
/*
* Use the single immediate command instead of CORB/RIRB for simplicity
*
* Note: according to Intel, this is not preferred use. The command was
* intended for the BIOS only, and may get confused with unsolicited
* responses. So, we shouldn't use it for normal operation from the
* driver.
* I left the codes, however, for debugging/testing purposes.
*/
/* receive a response */
static int azx_single_wait_for_response(struct azx *chip, unsigned int addr)
{
int timeout = 50;
while (timeout--) {
/* check IRV busy bit */
if (azx_readw(chip, IRS) & AZX_IRS_VALID) {
/* reuse rirb.res as the response return value */
azx_bus(chip)->rirb.res[addr] = azx_readl(chip, IR);
return 0;
}
udelay(1);
}
if (printk_ratelimit())
dev_dbg(chip->card->dev, "get_response timeout: IRS=0x%x\n",
azx_readw(chip, IRS));
azx_bus(chip)->rirb.res[addr] = -1;
return -EIO;
}
/* send a command */
static int azx_single_send_cmd(struct hdac_bus *bus, u32 val)
{
struct azx *chip = bus_to_azx(bus);
unsigned int addr = azx_command_addr(val);
int timeout = 50;
bus->last_cmd[azx_command_addr(val)] = val;
while (timeout--) {
/* check ICB busy bit */
if (!((azx_readw(chip, IRS) & AZX_IRS_BUSY))) {
/* Clear IRV valid bit */
azx_writew(chip, IRS, azx_readw(chip, IRS) |
AZX_IRS_VALID);
azx_writel(chip, IC, val);
azx_writew(chip, IRS, azx_readw(chip, IRS) |
AZX_IRS_BUSY);
return azx_single_wait_for_response(chip, addr);
}
udelay(1);
}
if (printk_ratelimit())
dev_dbg(chip->card->dev,
"send_cmd timeout: IRS=0x%x, val=0x%x\n",
azx_readw(chip, IRS), val);
return -EIO;
}
/* receive a response */
static int azx_single_get_response(struct hdac_bus *bus, unsigned int addr,
unsigned int *res)
{
if (res)
*res = bus->rirb.res[addr];
return 0;
}
/*
* The below are the main callbacks from hda_codec.
*
* They are just the skeleton to call sub-callbacks according to the
* current setting of chip->single_cmd.
*/
/* send a command */
static int azx_send_cmd(struct hdac_bus *bus, unsigned int val)
{
struct azx *chip = bus_to_azx(bus);
if (chip->disabled)
return 0;
if (chip->single_cmd)
return azx_single_send_cmd(bus, val);
else
return snd_hdac_bus_send_cmd(bus, val);
}
/* get a response */
static int azx_get_response(struct hdac_bus *bus, unsigned int addr,
unsigned int *res)
{
struct azx *chip = bus_to_azx(bus);
if (chip->disabled)
return 0;
if (chip->single_cmd)
return azx_single_get_response(bus, addr, res);
else
return azx_rirb_get_response(bus, addr, res);
}
static const struct hdac_bus_ops bus_core_ops = {
.command = azx_send_cmd,
.get_response = azx_get_response,
};
#ifdef CONFIG_SND_HDA_DSP_LOADER
/*
* DSP loading code (e.g. for CA0132)
*/
/* use the first stream for loading DSP */
static struct azx_dev *
azx_get_dsp_loader_dev(struct azx *chip)
{
struct hdac_bus *bus = azx_bus(chip);
struct hdac_stream *s;
list_for_each_entry(s, &bus->stream_list, list)
if (s->index == chip->playback_index_offset)
return stream_to_azx_dev(s);
return NULL;
}
int snd_hda_codec_load_dsp_prepare(struct hda_codec *codec, unsigned int format,
unsigned int byte_size,
struct snd_dma_buffer *bufp)
{
struct hdac_bus *bus = &codec->bus->core;
struct azx *chip = bus_to_azx(bus);
struct azx_dev *azx_dev;
struct hdac_stream *hstr;
bool saved = false;
int err;
azx_dev = azx_get_dsp_loader_dev(chip);
hstr = azx_stream(azx_dev);
spin_lock_irq(&bus->reg_lock);
if (hstr->opened) {
chip->saved_azx_dev = *azx_dev;
saved = true;
}
spin_unlock_irq(&bus->reg_lock);
err = snd_hdac_dsp_prepare(hstr, format, byte_size, bufp);
if (err < 0) {
spin_lock_irq(&bus->reg_lock);
if (saved)
*azx_dev = chip->saved_azx_dev;
spin_unlock_irq(&bus->reg_lock);
return err;
}
hstr->prepared = 0;
return err;
}
EXPORT_SYMBOL_GPL(snd_hda_codec_load_dsp_prepare);
void snd_hda_codec_load_dsp_trigger(struct hda_codec *codec, bool start)
{
struct hdac_bus *bus = &codec->bus->core;
struct azx *chip = bus_to_azx(bus);
struct azx_dev *azx_dev = azx_get_dsp_loader_dev(chip);
snd_hdac_dsp_trigger(azx_stream(azx_dev), start);
}
EXPORT_SYMBOL_GPL(snd_hda_codec_load_dsp_trigger);
void snd_hda_codec_load_dsp_cleanup(struct hda_codec *codec,
struct snd_dma_buffer *dmab)
{
struct hdac_bus *bus = &codec->bus->core;
struct azx *chip = bus_to_azx(bus);
struct azx_dev *azx_dev = azx_get_dsp_loader_dev(chip);
struct hdac_stream *hstr = azx_stream(azx_dev);
if (!dmab->area || !hstr->locked)
return;
snd_hdac_dsp_cleanup(hstr, dmab);
spin_lock_irq(&bus->reg_lock);
if (hstr->opened)
*azx_dev = chip->saved_azx_dev;
hstr->locked = false;
spin_unlock_irq(&bus->reg_lock);
}
EXPORT_SYMBOL_GPL(snd_hda_codec_load_dsp_cleanup);
#endif /* CONFIG_SND_HDA_DSP_LOADER */
/*
* reset and start the controller registers
*/
void azx_init_chip(struct azx *chip, bool full_reset)
{
if (snd_hdac_bus_init_chip(azx_bus(chip), full_reset)) {
/* correct RINTCNT for CXT */
if (chip->driver_caps & AZX_DCAPS_CTX_WORKAROUND)
azx_writew(chip, RINTCNT, 0xc0);
}
}
EXPORT_SYMBOL_GPL(azx_init_chip);
void azx_stop_all_streams(struct azx *chip)
{
struct hdac_bus *bus = azx_bus(chip);
snd_hdac_stop_streams(bus);
}
EXPORT_SYMBOL_GPL(azx_stop_all_streams);
void azx_stop_chip(struct azx *chip)
{
snd_hdac_bus_stop_chip(azx_bus(chip));
}
EXPORT_SYMBOL_GPL(azx_stop_chip);
/*
* interrupt handler
*/
static void stream_update(struct hdac_bus *bus, struct hdac_stream *s)
{
struct azx *chip = bus_to_azx(bus);
struct azx_dev *azx_dev = stream_to_azx_dev(s);
/* check whether this IRQ is really acceptable */
if (!chip->ops->position_check ||
chip->ops->position_check(chip, azx_dev)) {
spin_unlock(&bus->reg_lock);
snd_pcm_period_elapsed(azx_stream(azx_dev)->substream);
spin_lock(&bus->reg_lock);
}
}
irqreturn_t azx_interrupt(int irq, void *dev_id)
{
struct azx *chip = dev_id;
struct hdac_bus *bus = azx_bus(chip);
u32 status;
bool active, handled = false;
int repeat = 0; /* count for avoiding endless loop */
#ifdef CONFIG_PM
if (azx_has_pm_runtime(chip))
if (!pm_runtime_active(chip->card->dev))
return IRQ_NONE;
#endif
spin_lock(&bus->reg_lock);
if (chip->disabled)
goto unlock;
do {
status = azx_readl(chip, INTSTS);
if (status == 0 || status == 0xffffffff)
break;
handled = true;
active = false;
if (snd_hdac_bus_handle_stream_irq(bus, status, stream_update))
active = true;
status = azx_readb(chip, RIRBSTS);
if (status & RIRB_INT_MASK) {
/*
* Clearing the interrupt status here ensures that no
* interrupt gets masked after the RIRB wp is read in
* snd_hdac_bus_update_rirb. This avoids a possible
* race condition where codec response in RIRB may
* remain unserviced by IRQ, eventually falling back
* to polling mode in azx_rirb_get_response.
*/
azx_writeb(chip, RIRBSTS, RIRB_INT_MASK);
active = true;
if (status & RIRB_INT_RESPONSE) {
if (chip->driver_caps & AZX_DCAPS_CTX_WORKAROUND)
udelay(80);
snd_hdac_bus_update_rirb(bus);
}
}
} while (active && ++repeat < 10);
unlock:
spin_unlock(&bus->reg_lock);
return IRQ_RETVAL(handled);
}
EXPORT_SYMBOL_GPL(azx_interrupt);
/*
* Codec initerface
*/
/*
* Probe the given codec address
*/
static int probe_codec(struct azx *chip, int addr)
{
unsigned int cmd = (addr << 28) | (AC_NODE_ROOT << 20) |
(AC_VERB_PARAMETERS << 8) | AC_PAR_VENDOR_ID;
struct hdac_bus *bus = azx_bus(chip);
int err;
unsigned int res = -1;
mutex_lock(&bus->cmd_mutex);
chip->probing = 1;
azx_send_cmd(bus, cmd);
err = azx_get_response(bus, addr, &res);
chip->probing = 0;
mutex_unlock(&bus->cmd_mutex);
if (err < 0 || res == -1)
return -EIO;
dev_dbg(chip->card->dev, "codec #%d probed OK\n", addr);
return 0;
}
void snd_hda_bus_reset(struct hda_bus *bus)
{
struct azx *chip = bus_to_azx(&bus->core);
bus->in_reset = 1;
azx_stop_chip(chip);
azx_init_chip(chip, true);
if (bus->core.chip_init)
snd_hda_bus_reset_codecs(bus);
bus->in_reset = 0;
}
/* HD-audio bus initialization */
int azx_bus_init(struct azx *chip, const char *model)
{
struct hda_bus *bus = &chip->bus;
int err;
err = snd_hdac_bus_init(&bus->core, chip->card->dev, &bus_core_ops);
if (err < 0)
return err;
bus->card = chip->card;
mutex_init(&bus->prepare_mutex);
bus->pci = chip->pci;
bus->modelname = model;
bus->mixer_assigned = -1;
bus->core.snoop = azx_snoop(chip);
if (chip->get_position[0] != azx_get_pos_lpib ||
chip->get_position[1] != azx_get_pos_lpib)
bus->core.use_posbuf = true;
bus->core.bdl_pos_adj = chip->bdl_pos_adj;
if (chip->driver_caps & AZX_DCAPS_CORBRP_SELF_CLEAR)
bus->core.corbrp_self_clear = true;
if (chip->driver_caps & AZX_DCAPS_4K_BDLE_BOUNDARY)
bus->core.align_bdle_4k = true;
/* enable sync_write flag for stable communication as default */
bus->core.sync_write = 1;
return 0;
}
EXPORT_SYMBOL_GPL(azx_bus_init);
/* Probe codecs */
int azx_probe_codecs(struct azx *chip, unsigned int max_slots)
{
struct hdac_bus *bus = azx_bus(chip);
int c, codecs, err;
codecs = 0;
if (!max_slots)
max_slots = AZX_DEFAULT_CODECS;
/* First try to probe all given codec slots */
for (c = 0; c < max_slots; c++) {
if ((bus->codec_mask & (1 << c)) & chip->codec_probe_mask) {
if (probe_codec(chip, c) < 0) {
/* Some BIOSen give you wrong codec addresses
* that don't exist
*/
dev_warn(chip->card->dev,
"Codec #%d probe error; disabling it...\n", c);
bus->codec_mask &= ~(1 << c);
/* More badly, accessing to a non-existing
* codec often screws up the controller chip,
* and disturbs the further communications.
* Thus if an error occurs during probing,
* better to reset the controller chip to
* get back to the sanity state.
*/
azx_stop_chip(chip);
azx_init_chip(chip, true);
}
}
}
/* Then create codec instances */
for (c = 0; c < max_slots; c++) {
if ((bus->codec_mask & (1 << c)) & chip->codec_probe_mask) {
struct hda_codec *codec;
err = snd_hda_codec_new(&chip->bus, chip->card, c, &codec);
if (err < 0)
continue;
codec->jackpoll_interval = chip->jackpoll_interval;
codec->beep_mode = chip->beep_mode;
codec->ctl_dev_id = chip->ctl_dev_id;
codecs++;
}
}
if (!codecs) {
dev_err(chip->card->dev, "no codecs initialized\n");
return -ENXIO;
}
return 0;
}
EXPORT_SYMBOL_GPL(azx_probe_codecs);
/* configure each codec instance */
int azx_codec_configure(struct azx *chip)
{
struct hda_codec *codec, *next;
int success = 0;
list_for_each_codec(codec, &chip->bus) {
if (!snd_hda_codec_configure(codec))
success++;
}
if (success) {
/* unregister failed codecs if any codec has been probed */
list_for_each_codec_safe(codec, next, &chip->bus) {
if (!codec->configured) {
codec_err(codec, "Unable to configure, disabling\n");
snd_hdac_device_unregister(&codec->core);
}
}
}
return success ? 0 : -ENODEV;
}
EXPORT_SYMBOL_GPL(azx_codec_configure);
static int stream_direction(struct azx *chip, unsigned char index)
{
if (index >= chip->capture_index_offset &&
index < chip->capture_index_offset + chip->capture_streams)
return SNDRV_PCM_STREAM_CAPTURE;
return SNDRV_PCM_STREAM_PLAYBACK;
}
/* initialize SD streams */
int azx_init_streams(struct azx *chip)
{
int i;
int stream_tags[2] = { 0, 0 };
/* initialize each stream (aka device)
* assign the starting bdl address to each stream (device)
* and initialize
*/
for (i = 0; i < chip->num_streams; i++) {
struct azx_dev *azx_dev = kzalloc(sizeof(*azx_dev), GFP_KERNEL);
int dir, tag;
if (!azx_dev)
return -ENOMEM;
dir = stream_direction(chip, i);
/* stream tag must be unique throughout
* the stream direction group,
* valid values 1...15
* use separate stream tag if the flag
* AZX_DCAPS_SEPARATE_STREAM_TAG is used
*/
if (chip->driver_caps & AZX_DCAPS_SEPARATE_STREAM_TAG)
tag = ++stream_tags[dir];
else
tag = i + 1;
snd_hdac_stream_init(azx_bus(chip), azx_stream(azx_dev),
i, dir, tag);
}
return 0;
}
EXPORT_SYMBOL_GPL(azx_init_streams);
void azx_free_streams(struct azx *chip)
{
struct hdac_bus *bus = azx_bus(chip);
struct hdac_stream *s;
while (!list_empty(&bus->stream_list)) {
s = list_first_entry(&bus->stream_list, struct hdac_stream, list);
list_del(&s->list);
kfree(stream_to_azx_dev(s));
}
}
EXPORT_SYMBOL_GPL(azx_free_streams);
| linux-master | sound/pci/hda/hda_controller.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* HD audio interface patch for Creative X-Fi CA0110-IBG chip
*
* Copyright (c) 2008 Takashi Iwai <[email protected]>
*/
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <sound/core.h>
#include <sound/hda_codec.h>
#include "hda_local.h"
#include "hda_auto_parser.h"
#include "hda_jack.h"
#include "hda_generic.h"
static const struct hda_codec_ops ca0110_patch_ops = {
.build_controls = snd_hda_gen_build_controls,
.build_pcms = snd_hda_gen_build_pcms,
.init = snd_hda_gen_init,
.free = snd_hda_gen_free,
.unsol_event = snd_hda_jack_unsol_event,
};
static int ca0110_parse_auto_config(struct hda_codec *codec)
{
struct hda_gen_spec *spec = codec->spec;
int err;
err = snd_hda_parse_pin_defcfg(codec, &spec->autocfg, NULL, 0);
if (err < 0)
return err;
err = snd_hda_gen_parse_auto_config(codec, &spec->autocfg);
if (err < 0)
return err;
return 0;
}
static int patch_ca0110(struct hda_codec *codec)
{
struct hda_gen_spec *spec;
int err;
spec = kzalloc(sizeof(*spec), GFP_KERNEL);
if (!spec)
return -ENOMEM;
snd_hda_gen_spec_init(spec);
codec->spec = spec;
codec->patch_ops = ca0110_patch_ops;
spec->multi_cap_vol = 1;
codec->bus->core.needs_damn_long_delay = 1;
err = ca0110_parse_auto_config(codec);
if (err < 0)
goto error;
return 0;
error:
snd_hda_gen_free(codec);
return err;
}
/*
* patch entries
*/
static const struct hda_device_id snd_hda_id_ca0110[] = {
HDA_CODEC_ENTRY(0x1102000a, "CA0110-IBG", patch_ca0110),
HDA_CODEC_ENTRY(0x1102000b, "CA0110-IBG", patch_ca0110),
HDA_CODEC_ENTRY(0x1102000d, "SB0880 X-Fi", patch_ca0110),
{} /* terminator */
};
MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_ca0110);
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("Creative CA0110-IBG HD-audio codec");
static struct hda_codec_driver ca0110_driver = {
.id = snd_hda_id_ca0110,
};
module_hda_codec_driver(ca0110_driver);
| linux-master | sound/pci/hda/patch_ca0110.c |
// SPDX-License-Identifier: GPL-2.0
//
// CS35l41 ALSA HDA audio driver
//
// Copyright 2021 Cirrus Logic, Inc.
//
// Author: Lucas Tanure <[email protected]>
#include <linux/acpi.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <sound/hda_codec.h>
#include <sound/soc.h>
#include <linux/pm_runtime.h>
#include "hda_local.h"
#include "hda_auto_parser.h"
#include "hda_jack.h"
#include "hda_generic.h"
#include "hda_component.h"
#include "cs35l41_hda.h"
#include "hda_cs_dsp_ctl.h"
#include "cs35l41_hda_property.h"
#define CS35L41_FIRMWARE_ROOT "cirrus/"
#define CS35L41_PART "cs35l41"
#define HALO_STATE_DSP_CTL_NAME "HALO_STATE"
#define HALO_STATE_DSP_CTL_TYPE 5
#define HALO_STATE_DSP_CTL_ALG 262308
#define CAL_R_DSP_CTL_NAME "CAL_R"
#define CAL_STATUS_DSP_CTL_NAME "CAL_STATUS"
#define CAL_CHECKSUM_DSP_CTL_NAME "CAL_CHECKSUM"
#define CAL_AMBIENT_DSP_CTL_NAME "CAL_AMBIENT"
#define CAL_DSP_CTL_TYPE 5
#define CAL_DSP_CTL_ALG 205
static bool firmware_autostart = 1;
module_param(firmware_autostart, bool, 0444);
MODULE_PARM_DESC(firmware_autostart, "Allow automatic firmware download on boot"
"(0=Disable, 1=Enable) (default=1); ");
static const struct reg_sequence cs35l41_hda_config[] = {
{ CS35L41_PLL_CLK_CTRL, 0x00000430 }, // 3072000Hz, BCLK Input, PLL_REFCLK_EN = 1
{ CS35L41_DSP_CLK_CTRL, 0x00000003 }, // DSP CLK EN
{ CS35L41_GLOBAL_CLK_CTRL, 0x00000003 }, // GLOBAL_FS = 48 kHz
{ CS35L41_SP_ENABLES, 0x00010000 }, // ASP_RX1_EN = 1
{ CS35L41_SP_RATE_CTRL, 0x00000021 }, // ASP_BCLK_FREQ = 3.072 MHz
{ CS35L41_SP_FORMAT, 0x20200200 }, // 32 bits RX/TX slots, I2S, clk consumer
{ CS35L41_SP_HIZ_CTRL, 0x00000002 }, // Hi-Z unused
{ CS35L41_SP_TX_WL, 0x00000018 }, // 24 cycles/slot
{ CS35L41_SP_RX_WL, 0x00000018 }, // 24 cycles/slot
{ CS35L41_DAC_PCM1_SRC, 0x00000008 }, // DACPCM1_SRC = ASPRX1
{ CS35L41_ASP_TX1_SRC, 0x00000018 }, // ASPTX1 SRC = VMON
{ CS35L41_ASP_TX2_SRC, 0x00000019 }, // ASPTX2 SRC = IMON
{ CS35L41_ASP_TX3_SRC, 0x00000032 }, // ASPTX3 SRC = ERRVOL
{ CS35L41_ASP_TX4_SRC, 0x00000033 }, // ASPTX4 SRC = CLASSH_TGT
{ CS35L41_DSP1_RX1_SRC, 0x00000008 }, // DSP1RX1 SRC = ASPRX1
{ CS35L41_DSP1_RX2_SRC, 0x00000009 }, // DSP1RX2 SRC = ASPRX2
{ CS35L41_DSP1_RX3_SRC, 0x00000018 }, // DSP1RX3 SRC = VMON
{ CS35L41_DSP1_RX4_SRC, 0x00000019 }, // DSP1RX4 SRC = IMON
{ CS35L41_DSP1_RX5_SRC, 0x00000020 }, // DSP1RX5 SRC = ERRVOL
};
static const struct reg_sequence cs35l41_hda_config_dsp[] = {
{ CS35L41_PLL_CLK_CTRL, 0x00000430 }, // 3072000Hz, BCLK Input, PLL_REFCLK_EN = 1
{ CS35L41_DSP_CLK_CTRL, 0x00000003 }, // DSP CLK EN
{ CS35L41_GLOBAL_CLK_CTRL, 0x00000003 }, // GLOBAL_FS = 48 kHz
{ CS35L41_SP_ENABLES, 0x00010001 }, // ASP_RX1_EN = 1, ASP_TX1_EN = 1
{ CS35L41_SP_RATE_CTRL, 0x00000021 }, // ASP_BCLK_FREQ = 3.072 MHz
{ CS35L41_SP_FORMAT, 0x20200200 }, // 32 bits RX/TX slots, I2S, clk consumer
{ CS35L41_SP_HIZ_CTRL, 0x00000003 }, // Hi-Z unused/disabled
{ CS35L41_SP_TX_WL, 0x00000018 }, // 24 cycles/slot
{ CS35L41_SP_RX_WL, 0x00000018 }, // 24 cycles/slot
{ CS35L41_DAC_PCM1_SRC, 0x00000032 }, // DACPCM1_SRC = ERR_VOL
{ CS35L41_ASP_TX1_SRC, 0x00000018 }, // ASPTX1 SRC = VMON
{ CS35L41_ASP_TX2_SRC, 0x00000019 }, // ASPTX2 SRC = IMON
{ CS35L41_ASP_TX3_SRC, 0x00000028 }, // ASPTX3 SRC = VPMON
{ CS35L41_ASP_TX4_SRC, 0x00000029 }, // ASPTX4 SRC = VBSTMON
{ CS35L41_DSP1_RX1_SRC, 0x00000008 }, // DSP1RX1 SRC = ASPRX1
{ CS35L41_DSP1_RX2_SRC, 0x00000008 }, // DSP1RX2 SRC = ASPRX1
{ CS35L41_DSP1_RX3_SRC, 0x00000018 }, // DSP1RX3 SRC = VMON
{ CS35L41_DSP1_RX4_SRC, 0x00000019 }, // DSP1RX4 SRC = IMON
{ CS35L41_DSP1_RX5_SRC, 0x00000029 }, // DSP1RX5 SRC = VBSTMON
};
static const struct reg_sequence cs35l41_hda_unmute[] = {
{ CS35L41_AMP_DIG_VOL_CTRL, 0x00008000 }, // AMP_HPF_PCM_EN = 1, AMP_VOL_PCM 0.0 dB
{ CS35L41_AMP_GAIN_CTRL, 0x00000084 }, // AMP_GAIN_PCM 4.5 dB
};
static const struct reg_sequence cs35l41_hda_unmute_dsp[] = {
{ CS35L41_AMP_DIG_VOL_CTRL, 0x00008000 }, // AMP_HPF_PCM_EN = 1, AMP_VOL_PCM 0.0 dB
{ CS35L41_AMP_GAIN_CTRL, 0x00000233 }, // AMP_GAIN_PCM = 17.5dB AMP_GAIN_PDM = 19.5dB
};
static const struct reg_sequence cs35l41_hda_mute[] = {
{ CS35L41_AMP_GAIN_CTRL, 0x00000000 }, // AMP_GAIN_PCM 0.5 dB
{ CS35L41_AMP_DIG_VOL_CTRL, 0x0000A678 }, // AMP_HPF_PCM_EN = 1, AMP_VOL_PCM Mute
};
static void cs35l41_add_controls(struct cs35l41_hda *cs35l41)
{
struct hda_cs_dsp_ctl_info info;
info.device_name = cs35l41->amp_name;
info.fw_type = cs35l41->firmware_type;
info.card = cs35l41->codec->card;
hda_cs_dsp_add_controls(&cs35l41->cs_dsp, &info);
}
static const struct cs_dsp_client_ops client_ops = {
.control_remove = hda_cs_dsp_control_remove,
};
static int cs35l41_request_firmware_file(struct cs35l41_hda *cs35l41,
const struct firmware **firmware, char **filename,
const char *dir, const char *ssid, const char *amp_name,
int spkid, const char *filetype)
{
const char * const dsp_name = cs35l41->cs_dsp.name;
char *s, c;
int ret = 0;
if (spkid > -1 && ssid && amp_name)
*filename = kasprintf(GFP_KERNEL, "%s%s-%s-%s-%s-spkid%d-%s.%s", dir, CS35L41_PART,
dsp_name, hda_cs_dsp_fw_ids[cs35l41->firmware_type],
ssid, spkid, amp_name, filetype);
else if (spkid > -1 && ssid)
*filename = kasprintf(GFP_KERNEL, "%s%s-%s-%s-%s-spkid%d.%s", dir, CS35L41_PART,
dsp_name, hda_cs_dsp_fw_ids[cs35l41->firmware_type],
ssid, spkid, filetype);
else if (ssid && amp_name)
*filename = kasprintf(GFP_KERNEL, "%s%s-%s-%s-%s-%s.%s", dir, CS35L41_PART,
dsp_name, hda_cs_dsp_fw_ids[cs35l41->firmware_type],
ssid, amp_name, filetype);
else if (ssid)
*filename = kasprintf(GFP_KERNEL, "%s%s-%s-%s-%s.%s", dir, CS35L41_PART,
dsp_name, hda_cs_dsp_fw_ids[cs35l41->firmware_type],
ssid, filetype);
else
*filename = kasprintf(GFP_KERNEL, "%s%s-%s-%s.%s", dir, CS35L41_PART,
dsp_name, hda_cs_dsp_fw_ids[cs35l41->firmware_type],
filetype);
if (*filename == NULL)
return -ENOMEM;
/*
* Make sure that filename is lower-case and any non alpha-numeric
* characters except full stop and '/' are replaced with hyphens.
*/
s = *filename;
while (*s) {
c = *s;
if (isalnum(c))
*s = tolower(c);
else if (c != '.' && c != '/')
*s = '-';
s++;
}
ret = firmware_request_nowarn(firmware, *filename, cs35l41->dev);
if (ret != 0) {
dev_dbg(cs35l41->dev, "Failed to request '%s'\n", *filename);
kfree(*filename);
*filename = NULL;
}
return ret;
}
static int cs35l41_request_firmware_files_spkid(struct cs35l41_hda *cs35l41,
const struct firmware **wmfw_firmware,
char **wmfw_filename,
const struct firmware **coeff_firmware,
char **coeff_filename)
{
int ret;
/* try cirrus/part-dspN-fwtype-sub<-spkidN><-ampname>.wmfw */
ret = cs35l41_request_firmware_file(cs35l41, wmfw_firmware, wmfw_filename,
CS35L41_FIRMWARE_ROOT,
cs35l41->acpi_subsystem_id, cs35l41->amp_name,
cs35l41->speaker_id, "wmfw");
if (!ret) {
/* try cirrus/part-dspN-fwtype-sub<-spkidN><-ampname>.bin */
return cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename,
CS35L41_FIRMWARE_ROOT,
cs35l41->acpi_subsystem_id, cs35l41->amp_name,
cs35l41->speaker_id, "bin");
}
/* try cirrus/part-dspN-fwtype-sub<-ampname>.wmfw */
ret = cs35l41_request_firmware_file(cs35l41, wmfw_firmware, wmfw_filename,
CS35L41_FIRMWARE_ROOT, cs35l41->acpi_subsystem_id,
cs35l41->amp_name, -1, "wmfw");
if (!ret) {
/* try cirrus/part-dspN-fwtype-sub<-spkidN><-ampname>.bin */
return cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename,
CS35L41_FIRMWARE_ROOT,
cs35l41->acpi_subsystem_id, cs35l41->amp_name,
cs35l41->speaker_id, "bin");
}
/* try cirrus/part-dspN-fwtype-sub<-spkidN>.wmfw */
ret = cs35l41_request_firmware_file(cs35l41, wmfw_firmware, wmfw_filename,
CS35L41_FIRMWARE_ROOT, cs35l41->acpi_subsystem_id,
NULL, cs35l41->speaker_id, "wmfw");
if (!ret) {
/* try cirrus/part-dspN-fwtype-sub<-spkidN><-ampname>.bin */
ret = cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename,
CS35L41_FIRMWARE_ROOT,
cs35l41->acpi_subsystem_id,
cs35l41->amp_name, cs35l41->speaker_id, "bin");
if (ret)
/* try cirrus/part-dspN-fwtype-sub<-spkidN>.bin */
return cs35l41_request_firmware_file(cs35l41, coeff_firmware,
coeff_filename, CS35L41_FIRMWARE_ROOT,
cs35l41->acpi_subsystem_id, NULL,
cs35l41->speaker_id, "bin");
}
/* try cirrus/part-dspN-fwtype-sub.wmfw */
ret = cs35l41_request_firmware_file(cs35l41, wmfw_firmware, wmfw_filename,
CS35L41_FIRMWARE_ROOT, cs35l41->acpi_subsystem_id,
NULL, -1, "wmfw");
if (!ret) {
/* try cirrus/part-dspN-fwtype-sub<-spkidN><-ampname>.bin */
ret = cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename,
CS35L41_FIRMWARE_ROOT,
cs35l41->acpi_subsystem_id, cs35l41->amp_name,
cs35l41->speaker_id, "bin");
if (ret)
/* try cirrus/part-dspN-fwtype-sub<-spkidN>.bin */
return cs35l41_request_firmware_file(cs35l41, coeff_firmware,
coeff_filename, CS35L41_FIRMWARE_ROOT,
cs35l41->acpi_subsystem_id, NULL,
cs35l41->speaker_id, "bin");
}
return ret;
}
static int cs35l41_request_firmware_files(struct cs35l41_hda *cs35l41,
const struct firmware **wmfw_firmware,
char **wmfw_filename,
const struct firmware **coeff_firmware,
char **coeff_filename)
{
int ret;
if (cs35l41->speaker_id > -1) {
ret = cs35l41_request_firmware_files_spkid(cs35l41, wmfw_firmware, wmfw_filename,
coeff_firmware, coeff_filename);
goto out;
}
/* try cirrus/part-dspN-fwtype-sub<-ampname>.wmfw */
ret = cs35l41_request_firmware_file(cs35l41, wmfw_firmware, wmfw_filename,
CS35L41_FIRMWARE_ROOT, cs35l41->acpi_subsystem_id,
cs35l41->amp_name, -1, "wmfw");
if (!ret) {
/* try cirrus/part-dspN-fwtype-sub<-ampname>.bin */
ret = cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename,
CS35L41_FIRMWARE_ROOT,
cs35l41->acpi_subsystem_id, cs35l41->amp_name,
-1, "bin");
goto out;
}
/* try cirrus/part-dspN-fwtype-sub.wmfw */
ret = cs35l41_request_firmware_file(cs35l41, wmfw_firmware, wmfw_filename,
CS35L41_FIRMWARE_ROOT, cs35l41->acpi_subsystem_id,
NULL, -1, "wmfw");
if (!ret) {
/* try cirrus/part-dspN-fwtype-sub<-ampname>.bin */
ret = cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename,
CS35L41_FIRMWARE_ROOT,
cs35l41->acpi_subsystem_id,
cs35l41->amp_name, -1, "bin");
if (ret)
/* try cirrus/part-dspN-fwtype-sub.bin */
ret = cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename,
CS35L41_FIRMWARE_ROOT,
cs35l41->acpi_subsystem_id, NULL, -1,
"bin");
}
out:
if (!ret)
return 0;
/* Handle fallback */
dev_warn(cs35l41->dev, "Falling back to default firmware.\n");
release_firmware(*wmfw_firmware);
kfree(*wmfw_filename);
/* fallback try cirrus/part-dspN-fwtype.wmfw */
ret = cs35l41_request_firmware_file(cs35l41, wmfw_firmware, wmfw_filename,
CS35L41_FIRMWARE_ROOT, NULL, NULL, -1, "wmfw");
if (!ret)
/* fallback try cirrus/part-dspN-fwtype.bin */
ret = cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename,
CS35L41_FIRMWARE_ROOT, NULL, NULL, -1, "bin");
if (ret) {
release_firmware(*wmfw_firmware);
kfree(*wmfw_filename);
dev_warn(cs35l41->dev, "Unable to find firmware and tuning\n");
}
return ret;
}
#if IS_ENABLED(CONFIG_EFI)
static int cs35l41_apply_calibration(struct cs35l41_hda *cs35l41, __be32 ambient, __be32 r0,
__be32 status, __be32 checksum)
{
int ret;
ret = hda_cs_dsp_write_ctl(&cs35l41->cs_dsp, CAL_AMBIENT_DSP_CTL_NAME, CAL_DSP_CTL_TYPE,
CAL_DSP_CTL_ALG, &ambient, 4);
if (ret) {
dev_err(cs35l41->dev, "Cannot Write Control: %s - %d\n", CAL_AMBIENT_DSP_CTL_NAME,
ret);
return ret;
}
ret = hda_cs_dsp_write_ctl(&cs35l41->cs_dsp, CAL_R_DSP_CTL_NAME, CAL_DSP_CTL_TYPE,
CAL_DSP_CTL_ALG, &r0, 4);
if (ret) {
dev_err(cs35l41->dev, "Cannot Write Control: %s - %d\n", CAL_R_DSP_CTL_NAME, ret);
return ret;
}
ret = hda_cs_dsp_write_ctl(&cs35l41->cs_dsp, CAL_STATUS_DSP_CTL_NAME, CAL_DSP_CTL_TYPE,
CAL_DSP_CTL_ALG, &status, 4);
if (ret) {
dev_err(cs35l41->dev, "Cannot Write Control: %s - %d\n", CAL_STATUS_DSP_CTL_NAME,
ret);
return ret;
}
ret = hda_cs_dsp_write_ctl(&cs35l41->cs_dsp, CAL_CHECKSUM_DSP_CTL_NAME, CAL_DSP_CTL_TYPE,
CAL_DSP_CTL_ALG, &checksum, 4);
if (ret) {
dev_err(cs35l41->dev, "Cannot Write Control: %s - %d\n", CAL_CHECKSUM_DSP_CTL_NAME,
ret);
return ret;
}
return 0;
}
static int cs35l41_save_calibration(struct cs35l41_hda *cs35l41)
{
static efi_guid_t efi_guid = EFI_GUID(0x02f9af02, 0x7734, 0x4233, 0xb4, 0x3d, 0x93, 0xfe,
0x5a, 0xa3, 0x5d, 0xb3);
static efi_char16_t efi_name[] = L"CirrusSmartAmpCalibrationData";
const struct cs35l41_amp_efi_data *efi_data;
const struct cs35l41_amp_cal_data *cl;
unsigned long data_size = 0;
efi_status_t status;
int ret = 0;
u8 *data = NULL;
u32 attr;
/* Get real size of UEFI variable */
status = efi.get_variable(efi_name, &efi_guid, &attr, &data_size, data);
if (status == EFI_BUFFER_TOO_SMALL) {
ret = -ENODEV;
/* Allocate data buffer of data_size bytes */
data = vmalloc(data_size);
if (!data)
return -ENOMEM;
/* Get variable contents into buffer */
status = efi.get_variable(efi_name, &efi_guid, &attr, &data_size, data);
if (status == EFI_SUCCESS) {
efi_data = (struct cs35l41_amp_efi_data *)data;
dev_dbg(cs35l41->dev, "Calibration: Size=%d, Amp Count=%d\n",
efi_data->size, efi_data->count);
if (efi_data->count > cs35l41->index) {
cl = &efi_data->data[cs35l41->index];
dev_dbg(cs35l41->dev,
"Calibration: Ambient=%02x, Status=%02x, R0=%d\n",
cl->calAmbient, cl->calStatus, cl->calR);
/* Calibration can only be applied whilst the DSP is not running */
ret = cs35l41_apply_calibration(cs35l41,
cpu_to_be32(cl->calAmbient),
cpu_to_be32(cl->calR),
cpu_to_be32(cl->calStatus),
cpu_to_be32(cl->calR + 1));
}
}
vfree(data);
}
return ret;
}
#else
static int cs35l41_save_calibration(struct cs35l41_hda *cs35l41)
{
dev_warn(cs35l41->dev, "Calibration not supported without EFI support.\n");
return 0;
}
#endif
static int cs35l41_init_dsp(struct cs35l41_hda *cs35l41)
{
const struct firmware *coeff_firmware = NULL;
const struct firmware *wmfw_firmware = NULL;
struct cs_dsp *dsp = &cs35l41->cs_dsp;
char *coeff_filename = NULL;
char *wmfw_filename = NULL;
int ret;
if (!cs35l41->halo_initialized) {
cs35l41_configure_cs_dsp(cs35l41->dev, cs35l41->regmap, dsp);
dsp->client_ops = &client_ops;
ret = cs_dsp_halo_init(&cs35l41->cs_dsp);
if (ret)
return ret;
cs35l41->halo_initialized = true;
}
ret = cs35l41_request_firmware_files(cs35l41, &wmfw_firmware, &wmfw_filename,
&coeff_firmware, &coeff_filename);
if (ret < 0)
return ret;
dev_dbg(cs35l41->dev, "Loading WMFW Firmware: %s\n", wmfw_filename);
if (coeff_filename)
dev_dbg(cs35l41->dev, "Loading Coefficient File: %s\n", coeff_filename);
else
dev_warn(cs35l41->dev, "No Coefficient File available.\n");
ret = cs_dsp_power_up(dsp, wmfw_firmware, wmfw_filename, coeff_firmware, coeff_filename,
hda_cs_dsp_fw_ids[cs35l41->firmware_type]);
if (ret)
goto err_release;
cs35l41_add_controls(cs35l41);
ret = cs35l41_save_calibration(cs35l41);
err_release:
release_firmware(wmfw_firmware);
release_firmware(coeff_firmware);
kfree(wmfw_filename);
kfree(coeff_filename);
return ret;
}
static void cs35l41_shutdown_dsp(struct cs35l41_hda *cs35l41)
{
struct cs_dsp *dsp = &cs35l41->cs_dsp;
cs_dsp_stop(dsp);
cs_dsp_power_down(dsp);
cs35l41->firmware_running = false;
dev_dbg(cs35l41->dev, "Unloaded Firmware\n");
}
static void cs35l41_remove_dsp(struct cs35l41_hda *cs35l41)
{
struct cs_dsp *dsp = &cs35l41->cs_dsp;
cancel_work_sync(&cs35l41->fw_load_work);
mutex_lock(&cs35l41->fw_mutex);
cs35l41_shutdown_dsp(cs35l41);
cs_dsp_remove(dsp);
cs35l41->halo_initialized = false;
mutex_unlock(&cs35l41->fw_mutex);
}
/* Protection release cycle to get the speaker out of Safe-Mode */
static void cs35l41_error_release(struct device *dev, struct regmap *regmap, unsigned int mask)
{
regmap_write(regmap, CS35L41_PROTECT_REL_ERR_IGN, 0);
regmap_set_bits(regmap, CS35L41_PROTECT_REL_ERR_IGN, mask);
regmap_clear_bits(regmap, CS35L41_PROTECT_REL_ERR_IGN, mask);
}
/* Clear all errors to release safe mode. Global Enable must be cleared first. */
static void cs35l41_irq_release(struct cs35l41_hda *cs35l41)
{
cs35l41_error_release(cs35l41->dev, cs35l41->regmap, cs35l41->irq_errors);
cs35l41->irq_errors = 0;
}
static void cs35l41_hda_play_start(struct device *dev)
{
struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev);
struct regmap *reg = cs35l41->regmap;
dev_dbg(dev, "Play (Start)\n");
if (cs35l41->playback_started) {
dev_dbg(dev, "Playback already started.");
return;
}
cs35l41->playback_started = true;
if (cs35l41->firmware_running) {
regmap_multi_reg_write(reg, cs35l41_hda_config_dsp,
ARRAY_SIZE(cs35l41_hda_config_dsp));
regmap_update_bits(reg, CS35L41_PWR_CTRL2,
CS35L41_VMON_EN_MASK | CS35L41_IMON_EN_MASK,
1 << CS35L41_VMON_EN_SHIFT | 1 << CS35L41_IMON_EN_SHIFT);
cs35l41_set_cspl_mbox_cmd(cs35l41->dev, reg, CSPL_MBOX_CMD_RESUME);
} else {
regmap_multi_reg_write(reg, cs35l41_hda_config, ARRAY_SIZE(cs35l41_hda_config));
}
regmap_update_bits(reg, CS35L41_PWR_CTRL2, CS35L41_AMP_EN_MASK, 1 << CS35L41_AMP_EN_SHIFT);
if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST)
regmap_write(reg, CS35L41_GPIO1_CTRL1, 0x00008001);
}
static void cs35l41_hda_play_done(struct device *dev)
{
struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev);
struct regmap *reg = cs35l41->regmap;
dev_dbg(dev, "Play (Complete)\n");
cs35l41_global_enable(dev, reg, cs35l41->hw_cfg.bst_type, 1, NULL,
cs35l41->firmware_running);
if (cs35l41->firmware_running) {
regmap_multi_reg_write(reg, cs35l41_hda_unmute_dsp,
ARRAY_SIZE(cs35l41_hda_unmute_dsp));
} else {
regmap_multi_reg_write(reg, cs35l41_hda_unmute,
ARRAY_SIZE(cs35l41_hda_unmute));
}
}
static void cs35l41_hda_pause_start(struct device *dev)
{
struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev);
struct regmap *reg = cs35l41->regmap;
dev_dbg(dev, "Pause (Start)\n");
regmap_multi_reg_write(reg, cs35l41_hda_mute, ARRAY_SIZE(cs35l41_hda_mute));
cs35l41_global_enable(dev, reg, cs35l41->hw_cfg.bst_type, 0, NULL,
cs35l41->firmware_running);
}
static void cs35l41_hda_pause_done(struct device *dev)
{
struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev);
struct regmap *reg = cs35l41->regmap;
dev_dbg(dev, "Pause (Complete)\n");
regmap_update_bits(reg, CS35L41_PWR_CTRL2, CS35L41_AMP_EN_MASK, 0 << CS35L41_AMP_EN_SHIFT);
if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST)
regmap_write(reg, CS35L41_GPIO1_CTRL1, 0x00000001);
if (cs35l41->firmware_running) {
cs35l41_set_cspl_mbox_cmd(dev, reg, CSPL_MBOX_CMD_PAUSE);
regmap_update_bits(reg, CS35L41_PWR_CTRL2,
CS35L41_VMON_EN_MASK | CS35L41_IMON_EN_MASK,
0 << CS35L41_VMON_EN_SHIFT | 0 << CS35L41_IMON_EN_SHIFT);
}
cs35l41_irq_release(cs35l41);
cs35l41->playback_started = false;
}
static void cs35l41_hda_pre_playback_hook(struct device *dev, int action)
{
struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev);
switch (action) {
case HDA_GEN_PCM_ACT_CLEANUP:
mutex_lock(&cs35l41->fw_mutex);
cs35l41_hda_pause_start(dev);
mutex_unlock(&cs35l41->fw_mutex);
break;
default:
break;
}
}
static void cs35l41_hda_playback_hook(struct device *dev, int action)
{
struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev);
switch (action) {
case HDA_GEN_PCM_ACT_OPEN:
/*
* All amps must be resumed before we can start playing back.
* This ensures, for external boost, that all amps are in AMP_SAFE mode.
* Do this in HDA_GEN_PCM_ACT_OPEN, since this is run prior to any of the
* other actions.
*/
pm_runtime_get_sync(dev);
break;
case HDA_GEN_PCM_ACT_PREPARE:
mutex_lock(&cs35l41->fw_mutex);
cs35l41_hda_play_start(dev);
mutex_unlock(&cs35l41->fw_mutex);
break;
case HDA_GEN_PCM_ACT_CLEANUP:
mutex_lock(&cs35l41->fw_mutex);
cs35l41_hda_pause_done(dev);
mutex_unlock(&cs35l41->fw_mutex);
break;
case HDA_GEN_PCM_ACT_CLOSE:
mutex_lock(&cs35l41->fw_mutex);
if (!cs35l41->firmware_running && cs35l41->request_fw_load &&
!cs35l41->fw_request_ongoing) {
dev_info(dev, "Requesting Firmware Load after HDA_GEN_PCM_ACT_CLOSE\n");
cs35l41->fw_request_ongoing = true;
schedule_work(&cs35l41->fw_load_work);
}
mutex_unlock(&cs35l41->fw_mutex);
/*
* Playback must be finished for all amps before we start runtime suspend.
* This ensures no amps are playing back when we start putting them to sleep.
*/
pm_runtime_mark_last_busy(dev);
pm_runtime_put_autosuspend(dev);
break;
default:
break;
}
}
static void cs35l41_hda_post_playback_hook(struct device *dev, int action)
{
struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev);
switch (action) {
case HDA_GEN_PCM_ACT_PREPARE:
mutex_lock(&cs35l41->fw_mutex);
cs35l41_hda_play_done(dev);
mutex_unlock(&cs35l41->fw_mutex);
break;
default:
break;
}
}
static int cs35l41_hda_channel_map(struct device *dev, unsigned int tx_num, unsigned int *tx_slot,
unsigned int rx_num, unsigned int *rx_slot)
{
struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev);
static const char * const channel_name[] = { "L", "R" };
if (!cs35l41->amp_name) {
if (*rx_slot >= ARRAY_SIZE(channel_name))
return -EINVAL;
cs35l41->amp_name = devm_kasprintf(cs35l41->dev, GFP_KERNEL, "%s%d",
channel_name[*rx_slot], cs35l41->channel_index);
if (!cs35l41->amp_name)
return -ENOMEM;
}
return cs35l41_set_channels(cs35l41->dev, cs35l41->regmap, tx_num, tx_slot, rx_num,
rx_slot);
}
static int cs35l41_ready_for_reset(struct cs35l41_hda *cs35l41)
{
int ret = 0;
mutex_lock(&cs35l41->fw_mutex);
if (cs35l41->firmware_running) {
regcache_cache_only(cs35l41->regmap, false);
ret = cs35l41_exit_hibernate(cs35l41->dev, cs35l41->regmap);
if (ret) {
dev_warn(cs35l41->dev, "Unable to exit Hibernate.");
goto err;
}
/* Test key needs to be unlocked to allow the OTP settings to re-apply */
cs35l41_test_key_unlock(cs35l41->dev, cs35l41->regmap);
ret = regcache_sync(cs35l41->regmap);
cs35l41_test_key_lock(cs35l41->dev, cs35l41->regmap);
if (ret) {
dev_err(cs35l41->dev, "Failed to restore register cache: %d\n", ret);
goto err;
}
if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST)
cs35l41_init_boost(cs35l41->dev, cs35l41->regmap, &cs35l41->hw_cfg);
cs35l41_shutdown_dsp(cs35l41);
cs35l41_safe_reset(cs35l41->regmap, cs35l41->hw_cfg.bst_type);
}
err:
regcache_cache_only(cs35l41->regmap, true);
regcache_mark_dirty(cs35l41->regmap);
mutex_unlock(&cs35l41->fw_mutex);
return ret;
}
static int cs35l41_system_suspend_prep(struct device *dev)
{
struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev);
dev_dbg(cs35l41->dev, "System Suspend Prepare\n");
if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST_NO_VSPK_SWITCH) {
dev_err_once(cs35l41->dev, "System Suspend not supported\n");
return 0; /* don't block the whole system suspend */
}
mutex_lock(&cs35l41->fw_mutex);
if (cs35l41->playback_started)
cs35l41_hda_pause_start(dev);
mutex_unlock(&cs35l41->fw_mutex);
return 0;
}
static int cs35l41_system_suspend(struct device *dev)
{
struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev);
int ret;
dev_dbg(cs35l41->dev, "System Suspend\n");
if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST_NO_VSPK_SWITCH) {
dev_err_once(cs35l41->dev, "System Suspend not supported\n");
return 0; /* don't block the whole system suspend */
}
mutex_lock(&cs35l41->fw_mutex);
if (cs35l41->playback_started)
cs35l41_hda_pause_done(dev);
mutex_unlock(&cs35l41->fw_mutex);
ret = pm_runtime_force_suspend(dev);
if (ret) {
dev_err(dev, "System Suspend Failed, unable to runtime suspend: %d\n", ret);
return ret;
}
/* Shutdown DSP before system suspend */
ret = cs35l41_ready_for_reset(cs35l41);
if (ret)
dev_err(dev, "System Suspend Failed, not ready for Reset: %d\n", ret);
/*
* Reset GPIO may be shared, so cannot reset here.
* However beyond this point, amps may be powered down.
*/
return ret;
}
static int cs35l41_system_resume(struct device *dev)
{
struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev);
int ret;
dev_dbg(cs35l41->dev, "System Resume\n");
if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST_NO_VSPK_SWITCH) {
dev_err_once(cs35l41->dev, "System Resume not supported\n");
return 0; /* don't block the whole system resume */
}
if (cs35l41->reset_gpio) {
usleep_range(2000, 2100);
gpiod_set_value_cansleep(cs35l41->reset_gpio, 1);
}
usleep_range(2000, 2100);
ret = pm_runtime_force_resume(dev);
if (ret) {
dev_err(dev, "System Resume Failed: Unable to runtime resume: %d\n", ret);
return ret;
}
mutex_lock(&cs35l41->fw_mutex);
if (cs35l41->request_fw_load && !cs35l41->fw_request_ongoing) {
cs35l41->fw_request_ongoing = true;
schedule_work(&cs35l41->fw_load_work);
}
mutex_unlock(&cs35l41->fw_mutex);
return ret;
}
static int cs35l41_runtime_idle(struct device *dev)
{
struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev);
if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST_NO_VSPK_SWITCH)
return -EBUSY; /* suspend not supported yet on this model */
return 0;
}
static int cs35l41_runtime_suspend(struct device *dev)
{
struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev);
int ret = 0;
dev_dbg(cs35l41->dev, "Runtime Suspend\n");
if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST_NO_VSPK_SWITCH) {
dev_dbg(cs35l41->dev, "Runtime Suspend not supported\n");
return 0;
}
mutex_lock(&cs35l41->fw_mutex);
if (cs35l41->firmware_running) {
ret = cs35l41_enter_hibernate(cs35l41->dev, cs35l41->regmap,
cs35l41->hw_cfg.bst_type);
if (ret)
goto err;
} else {
cs35l41_safe_reset(cs35l41->regmap, cs35l41->hw_cfg.bst_type);
}
regcache_cache_only(cs35l41->regmap, true);
regcache_mark_dirty(cs35l41->regmap);
err:
mutex_unlock(&cs35l41->fw_mutex);
return ret;
}
static int cs35l41_runtime_resume(struct device *dev)
{
struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev);
int ret = 0;
dev_dbg(cs35l41->dev, "Runtime Resume\n");
if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST_NO_VSPK_SWITCH) {
dev_dbg(cs35l41->dev, "Runtime Resume not supported\n");
return 0;
}
mutex_lock(&cs35l41->fw_mutex);
regcache_cache_only(cs35l41->regmap, false);
if (cs35l41->firmware_running) {
ret = cs35l41_exit_hibernate(cs35l41->dev, cs35l41->regmap);
if (ret) {
dev_warn(cs35l41->dev, "Unable to exit Hibernate.");
goto err;
}
}
/* Test key needs to be unlocked to allow the OTP settings to re-apply */
cs35l41_test_key_unlock(cs35l41->dev, cs35l41->regmap);
ret = regcache_sync(cs35l41->regmap);
cs35l41_test_key_lock(cs35l41->dev, cs35l41->regmap);
if (ret) {
dev_err(cs35l41->dev, "Failed to restore register cache: %d\n", ret);
goto err;
}
if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST)
cs35l41_init_boost(cs35l41->dev, cs35l41->regmap, &cs35l41->hw_cfg);
err:
mutex_unlock(&cs35l41->fw_mutex);
return ret;
}
static int cs35l41_smart_amp(struct cs35l41_hda *cs35l41)
{
__be32 halo_sts;
int ret;
ret = cs35l41_init_dsp(cs35l41);
if (ret) {
dev_warn(cs35l41->dev, "Cannot Initialize Firmware. Error: %d\n", ret);
goto clean_dsp;
}
ret = cs35l41_write_fs_errata(cs35l41->dev, cs35l41->regmap);
if (ret) {
dev_err(cs35l41->dev, "Cannot Write FS Errata: %d\n", ret);
goto clean_dsp;
}
ret = cs_dsp_run(&cs35l41->cs_dsp);
if (ret) {
dev_err(cs35l41->dev, "Fail to start dsp: %d\n", ret);
goto clean_dsp;
}
ret = read_poll_timeout(hda_cs_dsp_read_ctl, ret,
be32_to_cpu(halo_sts) == HALO_STATE_CODE_RUN,
1000, 15000, false, &cs35l41->cs_dsp, HALO_STATE_DSP_CTL_NAME,
HALO_STATE_DSP_CTL_TYPE, HALO_STATE_DSP_CTL_ALG,
&halo_sts, sizeof(halo_sts));
if (ret) {
dev_err(cs35l41->dev, "Timeout waiting for HALO Core to start. State: %u\n",
halo_sts);
goto clean_dsp;
}
ret = cs35l41_set_cspl_mbox_cmd(cs35l41->dev, cs35l41->regmap, CSPL_MBOX_CMD_PAUSE);
if (ret) {
dev_err(cs35l41->dev, "Error waiting for DSP to pause: %u\n", ret);
goto clean_dsp;
}
cs35l41->firmware_running = true;
return 0;
clean_dsp:
cs35l41_shutdown_dsp(cs35l41);
return ret;
}
static void cs35l41_load_firmware(struct cs35l41_hda *cs35l41, bool load)
{
if (cs35l41->firmware_running && !load) {
dev_dbg(cs35l41->dev, "Unloading Firmware\n");
cs35l41_shutdown_dsp(cs35l41);
} else if (!cs35l41->firmware_running && load) {
dev_dbg(cs35l41->dev, "Loading Firmware\n");
cs35l41_smart_amp(cs35l41);
} else {
dev_dbg(cs35l41->dev, "Unable to Load firmware.\n");
}
}
static int cs35l41_fw_load_ctl_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct cs35l41_hda *cs35l41 = snd_kcontrol_chip(kcontrol);
ucontrol->value.integer.value[0] = cs35l41->request_fw_load;
return 0;
}
static void cs35l41_fw_load_work(struct work_struct *work)
{
struct cs35l41_hda *cs35l41 = container_of(work, struct cs35l41_hda, fw_load_work);
pm_runtime_get_sync(cs35l41->dev);
mutex_lock(&cs35l41->fw_mutex);
/* Recheck if playback is ongoing, mutex will block playback during firmware loading */
if (cs35l41->playback_started)
dev_err(cs35l41->dev, "Cannot Load/Unload firmware during Playback. Retrying...\n");
else
cs35l41_load_firmware(cs35l41, cs35l41->request_fw_load);
cs35l41->fw_request_ongoing = false;
mutex_unlock(&cs35l41->fw_mutex);
pm_runtime_mark_last_busy(cs35l41->dev);
pm_runtime_put_autosuspend(cs35l41->dev);
}
static int cs35l41_fw_load_ctl_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct cs35l41_hda *cs35l41 = snd_kcontrol_chip(kcontrol);
if (cs35l41->request_fw_load == ucontrol->value.integer.value[0])
return 0;
if (cs35l41->fw_request_ongoing) {
dev_dbg(cs35l41->dev, "Existing request not complete\n");
return -EBUSY;
}
/* Check if playback is ongoing when initial request is made */
if (cs35l41->playback_started) {
dev_err(cs35l41->dev, "Cannot Load/Unload firmware during Playback\n");
return -EBUSY;
}
cs35l41->fw_request_ongoing = true;
cs35l41->request_fw_load = ucontrol->value.integer.value[0];
schedule_work(&cs35l41->fw_load_work);
return 1;
}
static int cs35l41_fw_type_ctl_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct cs35l41_hda *cs35l41 = snd_kcontrol_chip(kcontrol);
ucontrol->value.enumerated.item[0] = cs35l41->firmware_type;
return 0;
}
static int cs35l41_fw_type_ctl_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct cs35l41_hda *cs35l41 = snd_kcontrol_chip(kcontrol);
if (ucontrol->value.enumerated.item[0] < HDA_CS_DSP_NUM_FW) {
if (cs35l41->firmware_type != ucontrol->value.enumerated.item[0]) {
cs35l41->firmware_type = ucontrol->value.enumerated.item[0];
return 1;
} else {
return 0;
}
}
return -EINVAL;
}
static int cs35l41_fw_type_ctl_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
return snd_ctl_enum_info(uinfo, 1, ARRAY_SIZE(hda_cs_dsp_fw_ids), hda_cs_dsp_fw_ids);
}
static int cs35l41_create_controls(struct cs35l41_hda *cs35l41)
{
char fw_type_ctl_name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
char fw_load_ctl_name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
struct snd_kcontrol_new fw_type_ctl = {
.name = fw_type_ctl_name,
.iface = SNDRV_CTL_ELEM_IFACE_CARD,
.info = cs35l41_fw_type_ctl_info,
.get = cs35l41_fw_type_ctl_get,
.put = cs35l41_fw_type_ctl_put,
};
struct snd_kcontrol_new fw_load_ctl = {
.name = fw_load_ctl_name,
.iface = SNDRV_CTL_ELEM_IFACE_CARD,
.info = snd_ctl_boolean_mono_info,
.get = cs35l41_fw_load_ctl_get,
.put = cs35l41_fw_load_ctl_put,
};
int ret;
scnprintf(fw_type_ctl_name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN, "%s DSP1 Firmware Type",
cs35l41->amp_name);
scnprintf(fw_load_ctl_name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN, "%s DSP1 Firmware Load",
cs35l41->amp_name);
ret = snd_ctl_add(cs35l41->codec->card, snd_ctl_new1(&fw_type_ctl, cs35l41));
if (ret) {
dev_err(cs35l41->dev, "Failed to add KControl %s = %d\n", fw_type_ctl.name, ret);
return ret;
}
dev_dbg(cs35l41->dev, "Added Control %s\n", fw_type_ctl.name);
ret = snd_ctl_add(cs35l41->codec->card, snd_ctl_new1(&fw_load_ctl, cs35l41));
if (ret) {
dev_err(cs35l41->dev, "Failed to add KControl %s = %d\n", fw_load_ctl.name, ret);
return ret;
}
dev_dbg(cs35l41->dev, "Added Control %s\n", fw_load_ctl.name);
return 0;
}
static int cs35l41_hda_bind(struct device *dev, struct device *master, void *master_data)
{
struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev);
struct hda_component *comps = master_data;
unsigned int sleep_flags;
int ret = 0;
if (!comps || cs35l41->index < 0 || cs35l41->index >= HDA_MAX_COMPONENTS)
return -EINVAL;
comps = &comps[cs35l41->index];
if (comps->dev)
return -EBUSY;
pm_runtime_get_sync(dev);
mutex_lock(&cs35l41->fw_mutex);
comps->dev = dev;
if (!cs35l41->acpi_subsystem_id)
cs35l41->acpi_subsystem_id = kasprintf(GFP_KERNEL, "%.8x",
comps->codec->core.subsystem_id);
cs35l41->codec = comps->codec;
strscpy(comps->name, dev_name(dev), sizeof(comps->name));
cs35l41->firmware_type = HDA_CS_DSP_FW_SPK_PROT;
if (firmware_autostart) {
dev_dbg(cs35l41->dev, "Firmware Autostart.\n");
cs35l41->request_fw_load = true;
if (cs35l41_smart_amp(cs35l41) < 0)
dev_warn(cs35l41->dev, "Cannot Run Firmware, reverting to dsp bypass...\n");
} else {
dev_dbg(cs35l41->dev, "Firmware Autostart is disabled.\n");
}
ret = cs35l41_create_controls(cs35l41);
comps->playback_hook = cs35l41_hda_playback_hook;
comps->pre_playback_hook = cs35l41_hda_pre_playback_hook;
comps->post_playback_hook = cs35l41_hda_post_playback_hook;
mutex_unlock(&cs35l41->fw_mutex);
sleep_flags = lock_system_sleep();
if (!device_link_add(&comps->codec->core.dev, cs35l41->dev, DL_FLAG_STATELESS))
dev_warn(dev, "Unable to create device link\n");
unlock_system_sleep(sleep_flags);
pm_runtime_mark_last_busy(dev);
pm_runtime_put_autosuspend(dev);
dev_info(cs35l41->dev,
"CS35L41 Bound - SSID: %s, BST: %d, VSPK: %d, CH: %c, FW EN: %d, SPKID: %d\n",
cs35l41->acpi_subsystem_id, cs35l41->hw_cfg.bst_type,
cs35l41->hw_cfg.gpio1.func == CS35l41_VSPK_SWITCH,
cs35l41->hw_cfg.spk_pos ? 'R' : 'L',
cs35l41->firmware_running, cs35l41->speaker_id);
return ret;
}
static void cs35l41_hda_unbind(struct device *dev, struct device *master, void *master_data)
{
struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev);
struct hda_component *comps = master_data;
unsigned int sleep_flags;
if (comps[cs35l41->index].dev == dev) {
memset(&comps[cs35l41->index], 0, sizeof(*comps));
sleep_flags = lock_system_sleep();
device_link_remove(&comps->codec->core.dev, cs35l41->dev);
unlock_system_sleep(sleep_flags);
}
}
static const struct component_ops cs35l41_hda_comp_ops = {
.bind = cs35l41_hda_bind,
.unbind = cs35l41_hda_unbind,
};
static irqreturn_t cs35l41_bst_short_err(int irq, void *data)
{
struct cs35l41_hda *cs35l41 = data;
dev_crit_ratelimited(cs35l41->dev, "LBST Error\n");
set_bit(CS35L41_BST_SHORT_ERR_RLS_SHIFT, &cs35l41->irq_errors);
return IRQ_HANDLED;
}
static irqreturn_t cs35l41_bst_dcm_uvp_err(int irq, void *data)
{
struct cs35l41_hda *cs35l41 = data;
dev_crit_ratelimited(cs35l41->dev, "DCM VBST Under Voltage Error\n");
set_bit(CS35L41_BST_UVP_ERR_RLS_SHIFT, &cs35l41->irq_errors);
return IRQ_HANDLED;
}
static irqreturn_t cs35l41_bst_ovp_err(int irq, void *data)
{
struct cs35l41_hda *cs35l41 = data;
dev_crit_ratelimited(cs35l41->dev, "VBST Over Voltage error\n");
set_bit(CS35L41_BST_OVP_ERR_RLS_SHIFT, &cs35l41->irq_errors);
return IRQ_HANDLED;
}
static irqreturn_t cs35l41_temp_err(int irq, void *data)
{
struct cs35l41_hda *cs35l41 = data;
dev_crit_ratelimited(cs35l41->dev, "Over temperature error\n");
set_bit(CS35L41_TEMP_ERR_RLS_SHIFT, &cs35l41->irq_errors);
return IRQ_HANDLED;
}
static irqreturn_t cs35l41_temp_warn(int irq, void *data)
{
struct cs35l41_hda *cs35l41 = data;
dev_crit_ratelimited(cs35l41->dev, "Over temperature warning\n");
set_bit(CS35L41_TEMP_WARN_ERR_RLS_SHIFT, &cs35l41->irq_errors);
return IRQ_HANDLED;
}
static irqreturn_t cs35l41_amp_short(int irq, void *data)
{
struct cs35l41_hda *cs35l41 = data;
dev_crit_ratelimited(cs35l41->dev, "Amp short error\n");
set_bit(CS35L41_AMP_SHORT_ERR_RLS_SHIFT, &cs35l41->irq_errors);
return IRQ_HANDLED;
}
static const struct cs35l41_irq cs35l41_irqs[] = {
CS35L41_IRQ(BST_OVP_ERR, "Boost Overvoltage Error", cs35l41_bst_ovp_err),
CS35L41_IRQ(BST_DCM_UVP_ERR, "Boost Undervoltage Error", cs35l41_bst_dcm_uvp_err),
CS35L41_IRQ(BST_SHORT_ERR, "Boost Inductor Short Error", cs35l41_bst_short_err),
CS35L41_IRQ(TEMP_WARN, "Temperature Warning", cs35l41_temp_warn),
CS35L41_IRQ(TEMP_ERR, "Temperature Error", cs35l41_temp_err),
CS35L41_IRQ(AMP_SHORT_ERR, "Amp Short", cs35l41_amp_short),
};
static const struct regmap_irq cs35l41_reg_irqs[] = {
CS35L41_REG_IRQ(IRQ1_STATUS1, BST_OVP_ERR),
CS35L41_REG_IRQ(IRQ1_STATUS1, BST_DCM_UVP_ERR),
CS35L41_REG_IRQ(IRQ1_STATUS1, BST_SHORT_ERR),
CS35L41_REG_IRQ(IRQ1_STATUS1, TEMP_WARN),
CS35L41_REG_IRQ(IRQ1_STATUS1, TEMP_ERR),
CS35L41_REG_IRQ(IRQ1_STATUS1, AMP_SHORT_ERR),
};
static struct regmap_irq_chip cs35l41_regmap_irq_chip = {
.name = "cs35l41 IRQ1 Controller",
.status_base = CS35L41_IRQ1_STATUS1,
.mask_base = CS35L41_IRQ1_MASK1,
.ack_base = CS35L41_IRQ1_STATUS1,
.num_regs = 4,
.irqs = cs35l41_reg_irqs,
.num_irqs = ARRAY_SIZE(cs35l41_reg_irqs),
.runtime_pm = true,
};
static int cs35l41_hda_apply_properties(struct cs35l41_hda *cs35l41)
{
struct cs35l41_hw_cfg *hw_cfg = &cs35l41->hw_cfg;
bool using_irq = false;
int irq, irq_pol;
int ret;
int i;
if (!cs35l41->hw_cfg.valid)
return -EINVAL;
ret = cs35l41_init_boost(cs35l41->dev, cs35l41->regmap, hw_cfg);
if (ret)
return ret;
if (hw_cfg->gpio1.valid) {
switch (hw_cfg->gpio1.func) {
case CS35L41_NOT_USED:
break;
case CS35l41_VSPK_SWITCH:
hw_cfg->gpio1.func = CS35L41_GPIO1_GPIO;
hw_cfg->gpio1.out_en = true;
break;
case CS35l41_SYNC:
hw_cfg->gpio1.func = CS35L41_GPIO1_MDSYNC;
break;
default:
dev_err(cs35l41->dev, "Invalid function %d for GPIO1\n",
hw_cfg->gpio1.func);
return -EINVAL;
}
}
if (hw_cfg->gpio2.valid) {
switch (hw_cfg->gpio2.func) {
case CS35L41_NOT_USED:
break;
case CS35L41_INTERRUPT:
using_irq = true;
hw_cfg->gpio2.func = CS35L41_GPIO2_INT_OPEN_DRAIN;
break;
default:
dev_err(cs35l41->dev, "Invalid GPIO2 function %d\n", hw_cfg->gpio2.func);
return -EINVAL;
}
}
irq_pol = cs35l41_gpio_config(cs35l41->regmap, hw_cfg);
if (cs35l41->irq && using_irq) {
ret = devm_regmap_add_irq_chip(cs35l41->dev, cs35l41->regmap, cs35l41->irq,
IRQF_ONESHOT | IRQF_SHARED | irq_pol,
0, &cs35l41_regmap_irq_chip, &cs35l41->irq_data);
if (ret)
return ret;
for (i = 0; i < ARRAY_SIZE(cs35l41_irqs); i++) {
irq = regmap_irq_get_virq(cs35l41->irq_data, cs35l41_irqs[i].irq);
if (irq < 0)
return irq;
ret = devm_request_threaded_irq(cs35l41->dev, irq, NULL,
cs35l41_irqs[i].handler,
IRQF_ONESHOT | IRQF_SHARED | irq_pol,
cs35l41_irqs[i].name, cs35l41);
if (ret)
return ret;
}
}
return cs35l41_hda_channel_map(cs35l41->dev, 0, NULL, 1, &hw_cfg->spk_pos);
}
int cs35l41_get_speaker_id(struct device *dev, int amp_index, int num_amps, int fixed_gpio_id)
{
struct gpio_desc *speaker_id_desc;
int speaker_id = -ENODEV;
if (fixed_gpio_id >= 0) {
dev_dbg(dev, "Found Fixed Speaker ID GPIO (index = %d)\n", fixed_gpio_id);
speaker_id_desc = gpiod_get_index(dev, NULL, fixed_gpio_id, GPIOD_IN);
if (IS_ERR(speaker_id_desc)) {
speaker_id = PTR_ERR(speaker_id_desc);
return speaker_id;
}
speaker_id = gpiod_get_value_cansleep(speaker_id_desc);
gpiod_put(speaker_id_desc);
dev_dbg(dev, "Speaker ID = %d\n", speaker_id);
} else {
int base_index;
int gpios_per_amp;
int count;
int tmp;
int i;
count = gpiod_count(dev, "spk-id");
if (count > 0) {
speaker_id = 0;
gpios_per_amp = count / num_amps;
base_index = gpios_per_amp * amp_index;
if (count % num_amps)
return -EINVAL;
dev_dbg(dev, "Found %d Speaker ID GPIOs per Amp\n", gpios_per_amp);
for (i = 0; i < gpios_per_amp; i++) {
speaker_id_desc = gpiod_get_index(dev, "spk-id", i + base_index,
GPIOD_IN);
if (IS_ERR(speaker_id_desc)) {
speaker_id = PTR_ERR(speaker_id_desc);
break;
}
tmp = gpiod_get_value_cansleep(speaker_id_desc);
gpiod_put(speaker_id_desc);
if (tmp < 0) {
speaker_id = tmp;
break;
}
speaker_id |= tmp << i;
}
dev_dbg(dev, "Speaker ID = %d\n", speaker_id);
}
}
return speaker_id;
}
static int cs35l41_hda_read_acpi(struct cs35l41_hda *cs35l41, const char *hid, int id)
{
struct cs35l41_hw_cfg *hw_cfg = &cs35l41->hw_cfg;
u32 values[HDA_MAX_COMPONENTS];
struct acpi_device *adev;
struct device *physdev;
const char *sub;
char *property;
size_t nval;
int i, ret;
adev = acpi_dev_get_first_match_dev(hid, NULL, -1);
if (!adev) {
dev_err(cs35l41->dev, "Failed to find an ACPI device for %s\n", hid);
return -ENODEV;
}
physdev = get_device(acpi_get_first_physical_node(adev));
acpi_dev_put(adev);
sub = acpi_get_subsystem_id(ACPI_HANDLE(physdev));
if (IS_ERR(sub))
sub = NULL;
cs35l41->acpi_subsystem_id = sub;
ret = cs35l41_add_dsd_properties(cs35l41, physdev, id, hid);
if (!ret) {
dev_info(cs35l41->dev, "Using extra _DSD properties, bypassing _DSD in ACPI\n");
goto put_physdev;
}
property = "cirrus,dev-index";
ret = device_property_count_u32(physdev, property);
if (ret <= 0)
goto err;
if (ret > ARRAY_SIZE(values)) {
ret = -EINVAL;
goto err;
}
nval = ret;
ret = device_property_read_u32_array(physdev, property, values, nval);
if (ret)
goto err;
cs35l41->index = -1;
for (i = 0; i < nval; i++) {
if (values[i] == id) {
cs35l41->index = i;
break;
}
}
if (cs35l41->index == -1) {
dev_err(cs35l41->dev, "No index found in %s\n", property);
ret = -ENODEV;
goto err;
}
/* To use the same release code for all laptop variants we can't use devm_ version of
* gpiod_get here, as CLSA010* don't have a fully functional bios with an _DSD node
*/
cs35l41->reset_gpio = fwnode_gpiod_get_index(acpi_fwnode_handle(adev), "reset", cs35l41->index,
GPIOD_OUT_LOW, "cs35l41-reset");
property = "cirrus,speaker-position";
ret = device_property_read_u32_array(physdev, property, values, nval);
if (ret)
goto err;
hw_cfg->spk_pos = values[cs35l41->index];
cs35l41->channel_index = 0;
for (i = 0; i < cs35l41->index; i++)
if (values[i] == hw_cfg->spk_pos)
cs35l41->channel_index++;
property = "cirrus,gpio1-func";
ret = device_property_read_u32_array(physdev, property, values, nval);
if (ret)
goto err;
hw_cfg->gpio1.func = values[cs35l41->index];
hw_cfg->gpio1.valid = true;
property = "cirrus,gpio2-func";
ret = device_property_read_u32_array(physdev, property, values, nval);
if (ret)
goto err;
hw_cfg->gpio2.func = values[cs35l41->index];
hw_cfg->gpio2.valid = true;
property = "cirrus,boost-peak-milliamp";
ret = device_property_read_u32_array(physdev, property, values, nval);
if (ret == 0)
hw_cfg->bst_ipk = values[cs35l41->index];
else
hw_cfg->bst_ipk = -1;
property = "cirrus,boost-ind-nanohenry";
ret = device_property_read_u32_array(physdev, property, values, nval);
if (ret == 0)
hw_cfg->bst_ind = values[cs35l41->index];
else
hw_cfg->bst_ind = -1;
property = "cirrus,boost-cap-microfarad";
ret = device_property_read_u32_array(physdev, property, values, nval);
if (ret == 0)
hw_cfg->bst_cap = values[cs35l41->index];
else
hw_cfg->bst_cap = -1;
cs35l41->speaker_id = cs35l41_get_speaker_id(physdev, cs35l41->index, nval, -1);
if (hw_cfg->bst_ind > 0 || hw_cfg->bst_cap > 0 || hw_cfg->bst_ipk > 0)
hw_cfg->bst_type = CS35L41_INT_BOOST;
else
hw_cfg->bst_type = CS35L41_EXT_BOOST;
hw_cfg->valid = true;
put_device(physdev);
return 0;
err:
dev_err(cs35l41->dev, "Failed property %s: %d\n", property, ret);
hw_cfg->valid = false;
hw_cfg->gpio1.valid = false;
hw_cfg->gpio2.valid = false;
put_physdev:
put_device(physdev);
return ret;
}
int cs35l41_hda_probe(struct device *dev, const char *device_name, int id, int irq,
struct regmap *regmap)
{
unsigned int int_sts, regid, reg_revid, mtl_revid, chipid, int_status;
struct cs35l41_hda *cs35l41;
int ret;
BUILD_BUG_ON(ARRAY_SIZE(cs35l41_irqs) != ARRAY_SIZE(cs35l41_reg_irqs));
BUILD_BUG_ON(ARRAY_SIZE(cs35l41_irqs) != CS35L41_NUM_IRQ);
if (IS_ERR(regmap))
return PTR_ERR(regmap);
cs35l41 = devm_kzalloc(dev, sizeof(*cs35l41), GFP_KERNEL);
if (!cs35l41)
return -ENOMEM;
cs35l41->dev = dev;
cs35l41->irq = irq;
cs35l41->regmap = regmap;
dev_set_drvdata(dev, cs35l41);
ret = cs35l41_hda_read_acpi(cs35l41, device_name, id);
if (ret)
return dev_err_probe(cs35l41->dev, ret, "Platform not supported\n");
if (IS_ERR(cs35l41->reset_gpio)) {
ret = PTR_ERR(cs35l41->reset_gpio);
cs35l41->reset_gpio = NULL;
if (ret == -EBUSY) {
dev_info(cs35l41->dev, "Reset line busy, assuming shared reset\n");
} else {
dev_err_probe(cs35l41->dev, ret, "Failed to get reset GPIO\n");
goto err;
}
}
if (cs35l41->reset_gpio) {
usleep_range(2000, 2100);
gpiod_set_value_cansleep(cs35l41->reset_gpio, 1);
}
usleep_range(2000, 2100);
ret = regmap_read_poll_timeout(cs35l41->regmap, CS35L41_IRQ1_STATUS4, int_status,
int_status & CS35L41_OTP_BOOT_DONE, 1000, 100000);
if (ret) {
dev_err(cs35l41->dev, "Failed waiting for OTP_BOOT_DONE: %d\n", ret);
goto err;
}
ret = regmap_read(cs35l41->regmap, CS35L41_IRQ1_STATUS3, &int_sts);
if (ret || (int_sts & CS35L41_OTP_BOOT_ERR)) {
dev_err(cs35l41->dev, "OTP Boot status %x error: %d\n",
int_sts & CS35L41_OTP_BOOT_ERR, ret);
ret = -EIO;
goto err;
}
ret = regmap_read(cs35l41->regmap, CS35L41_DEVID, ®id);
if (ret) {
dev_err(cs35l41->dev, "Get Device ID failed: %d\n", ret);
goto err;
}
ret = regmap_read(cs35l41->regmap, CS35L41_REVID, ®_revid);
if (ret) {
dev_err(cs35l41->dev, "Get Revision ID failed: %d\n", ret);
goto err;
}
mtl_revid = reg_revid & CS35L41_MTLREVID_MASK;
chipid = (mtl_revid % 2) ? CS35L41R_CHIP_ID : CS35L41_CHIP_ID;
if (regid != chipid) {
dev_err(cs35l41->dev, "CS35L41 Device ID (%X). Expected ID %X\n", regid, chipid);
ret = -ENODEV;
goto err;
}
ret = cs35l41_test_key_unlock(cs35l41->dev, cs35l41->regmap);
if (ret)
goto err;
ret = cs35l41_register_errata_patch(cs35l41->dev, cs35l41->regmap, reg_revid);
if (ret)
goto err;
ret = cs35l41_otp_unpack(cs35l41->dev, cs35l41->regmap);
if (ret) {
dev_err(cs35l41->dev, "OTP Unpack failed: %d\n", ret);
goto err;
}
ret = cs35l41_test_key_lock(cs35l41->dev, cs35l41->regmap);
if (ret)
goto err;
ret = regmap_multi_reg_write(cs35l41->regmap, cs35l41_hda_mute,
ARRAY_SIZE(cs35l41_hda_mute));
if (ret)
goto err;
INIT_WORK(&cs35l41->fw_load_work, cs35l41_fw_load_work);
mutex_init(&cs35l41->fw_mutex);
pm_runtime_set_autosuspend_delay(cs35l41->dev, 3000);
pm_runtime_use_autosuspend(cs35l41->dev);
pm_runtime_mark_last_busy(cs35l41->dev);
pm_runtime_set_active(cs35l41->dev);
pm_runtime_get_noresume(cs35l41->dev);
pm_runtime_enable(cs35l41->dev);
ret = cs35l41_hda_apply_properties(cs35l41);
if (ret)
goto err_pm;
pm_runtime_put_autosuspend(cs35l41->dev);
ret = component_add(cs35l41->dev, &cs35l41_hda_comp_ops);
if (ret) {
dev_err(cs35l41->dev, "Register component failed: %d\n", ret);
pm_runtime_disable(cs35l41->dev);
goto err;
}
dev_info(cs35l41->dev, "Cirrus Logic CS35L41 (%x), Revision: %02X\n", regid, reg_revid);
return 0;
err_pm:
pm_runtime_disable(cs35l41->dev);
pm_runtime_put_noidle(cs35l41->dev);
err:
if (cs35l41_safe_reset(cs35l41->regmap, cs35l41->hw_cfg.bst_type))
gpiod_set_value_cansleep(cs35l41->reset_gpio, 0);
gpiod_put(cs35l41->reset_gpio);
kfree(cs35l41->acpi_subsystem_id);
return ret;
}
EXPORT_SYMBOL_NS_GPL(cs35l41_hda_probe, SND_HDA_SCODEC_CS35L41);
void cs35l41_hda_remove(struct device *dev)
{
struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev);
pm_runtime_get_sync(cs35l41->dev);
pm_runtime_disable(cs35l41->dev);
if (cs35l41->halo_initialized)
cs35l41_remove_dsp(cs35l41);
component_del(cs35l41->dev, &cs35l41_hda_comp_ops);
pm_runtime_put_noidle(cs35l41->dev);
if (cs35l41_safe_reset(cs35l41->regmap, cs35l41->hw_cfg.bst_type))
gpiod_set_value_cansleep(cs35l41->reset_gpio, 0);
gpiod_put(cs35l41->reset_gpio);
kfree(cs35l41->acpi_subsystem_id);
}
EXPORT_SYMBOL_NS_GPL(cs35l41_hda_remove, SND_HDA_SCODEC_CS35L41);
const struct dev_pm_ops cs35l41_hda_pm_ops = {
RUNTIME_PM_OPS(cs35l41_runtime_suspend, cs35l41_runtime_resume,
cs35l41_runtime_idle)
.prepare = cs35l41_system_suspend_prep,
SYSTEM_SLEEP_PM_OPS(cs35l41_system_suspend, cs35l41_system_resume)
};
EXPORT_SYMBOL_NS_GPL(cs35l41_hda_pm_ops, SND_HDA_SCODEC_CS35L41);
MODULE_DESCRIPTION("CS35L41 HDA Driver");
MODULE_IMPORT_NS(SND_HDA_CS_DSP_CONTROLS);
MODULE_AUTHOR("Lucas Tanure, Cirrus Logic Inc, <[email protected]>");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(FW_CS_DSP);
| linux-master | sound/pci/hda/cs35l41_hda.c |
// SPDX-License-Identifier: GPL-2.0
//
// CS35l41 HDA I2C driver
//
// Copyright 2021 Cirrus Logic, Inc.
//
// Author: Lucas Tanure <[email protected]>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/i2c.h>
#include "cs35l41_hda.h"
static int cs35l41_hda_i2c_probe(struct i2c_client *clt)
{
const char *device_name;
/*
* Compare against the device name so it works for SPI, normal ACPI
* and for ACPI by serial-multi-instantiate matching cases.
*/
if (strstr(dev_name(&clt->dev), "CLSA0100"))
device_name = "CLSA0100";
else if (strstr(dev_name(&clt->dev), "CLSA0101"))
device_name = "CLSA0101";
else if (strstr(dev_name(&clt->dev), "CSC3551"))
device_name = "CSC3551";
else
return -ENODEV;
return cs35l41_hda_probe(&clt->dev, device_name, clt->addr, clt->irq,
devm_regmap_init_i2c(clt, &cs35l41_regmap_i2c));
}
static void cs35l41_hda_i2c_remove(struct i2c_client *clt)
{
cs35l41_hda_remove(&clt->dev);
}
static const struct i2c_device_id cs35l41_hda_i2c_id[] = {
{ "cs35l41-hda", 0 },
{}
};
static const struct acpi_device_id cs35l41_acpi_hda_match[] = {
{"CLSA0100", 0 },
{"CLSA0101", 0 },
{"CSC3551", 0 },
{}
};
MODULE_DEVICE_TABLE(acpi, cs35l41_acpi_hda_match);
static struct i2c_driver cs35l41_i2c_driver = {
.driver = {
.name = "cs35l41-hda",
.acpi_match_table = cs35l41_acpi_hda_match,
.pm = &cs35l41_hda_pm_ops,
},
.id_table = cs35l41_hda_i2c_id,
.probe = cs35l41_hda_i2c_probe,
.remove = cs35l41_hda_i2c_remove,
};
module_i2c_driver(cs35l41_i2c_driver);
MODULE_DESCRIPTION("HDA CS35L41 driver");
MODULE_IMPORT_NS(SND_HDA_SCODEC_CS35L41);
MODULE_AUTHOR("Lucas Tanure <[email protected]>");
MODULE_LICENSE("GPL");
| linux-master | sound/pci/hda/cs35l41_hda_i2c.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* HD-audio codec driver binding
* Copyright (c) Takashi Iwai <[email protected]>
*/
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/mutex.h>
#include <linux/module.h>
#include <linux/export.h>
#include <linux/pm.h>
#include <sound/core.h>
#include <sound/hda_codec.h>
#include "hda_local.h"
#include "hda_jack.h"
/*
* find a matching codec id
*/
static int hda_codec_match(struct hdac_device *dev, struct hdac_driver *drv)
{
struct hda_codec *codec = container_of(dev, struct hda_codec, core);
struct hda_codec_driver *driver =
container_of(drv, struct hda_codec_driver, core);
const struct hda_device_id *list;
/* check probe_id instead of vendor_id if set */
u32 id = codec->probe_id ? codec->probe_id : codec->core.vendor_id;
u32 rev_id = codec->core.revision_id;
for (list = driver->id; list->vendor_id; list++) {
if (list->vendor_id == id &&
(!list->rev_id || list->rev_id == rev_id)) {
codec->preset = list;
return 1;
}
}
return 0;
}
/* process an unsolicited event */
static void hda_codec_unsol_event(struct hdac_device *dev, unsigned int ev)
{
struct hda_codec *codec = container_of(dev, struct hda_codec, core);
/* ignore unsol events during shutdown */
if (codec->bus->shutdown)
return;
/* ignore unsol events during system suspend/resume */
if (codec->core.dev.power.power_state.event != PM_EVENT_ON)
return;
if (codec->patch_ops.unsol_event)
codec->patch_ops.unsol_event(codec, ev);
}
/**
* snd_hda_codec_set_name - set the codec name
* @codec: the HDA codec
* @name: name string to set
*/
int snd_hda_codec_set_name(struct hda_codec *codec, const char *name)
{
int err;
if (!name)
return 0;
err = snd_hdac_device_set_chip_name(&codec->core, name);
if (err < 0)
return err;
/* update the mixer name */
if (!*codec->card->mixername ||
codec->bus->mixer_assigned >= codec->core.addr) {
snprintf(codec->card->mixername,
sizeof(codec->card->mixername), "%s %s",
codec->core.vendor_name, codec->core.chip_name);
codec->bus->mixer_assigned = codec->core.addr;
}
return 0;
}
EXPORT_SYMBOL_GPL(snd_hda_codec_set_name);
static int hda_codec_driver_probe(struct device *dev)
{
struct hda_codec *codec = dev_to_hda_codec(dev);
struct module *owner = dev->driver->owner;
hda_codec_patch_t patch;
int err;
if (codec->bus->core.ext_ops) {
if (WARN_ON(!codec->bus->core.ext_ops->hdev_attach))
return -EINVAL;
return codec->bus->core.ext_ops->hdev_attach(&codec->core);
}
if (WARN_ON(!codec->preset))
return -EINVAL;
err = snd_hda_codec_set_name(codec, codec->preset->name);
if (err < 0)
goto error;
err = snd_hdac_regmap_init(&codec->core);
if (err < 0)
goto error;
if (!try_module_get(owner)) {
err = -EINVAL;
goto error;
}
patch = (hda_codec_patch_t)codec->preset->driver_data;
if (patch) {
err = patch(codec);
if (err < 0)
goto error_module_put;
}
err = snd_hda_codec_build_pcms(codec);
if (err < 0)
goto error_module;
err = snd_hda_codec_build_controls(codec);
if (err < 0)
goto error_module;
/* only register after the bus probe finished; otherwise it's racy */
if (!codec->bus->bus_probing && codec->card->registered) {
err = snd_card_register(codec->card);
if (err < 0)
goto error_module;
snd_hda_codec_register(codec);
}
codec->core.lazy_cache = true;
return 0;
error_module:
if (codec->patch_ops.free)
codec->patch_ops.free(codec);
error_module_put:
module_put(owner);
error:
snd_hda_codec_cleanup_for_unbind(codec);
codec->preset = NULL;
return err;
}
static int hda_codec_driver_remove(struct device *dev)
{
struct hda_codec *codec = dev_to_hda_codec(dev);
if (codec->bus->core.ext_ops) {
if (WARN_ON(!codec->bus->core.ext_ops->hdev_detach))
return -EINVAL;
return codec->bus->core.ext_ops->hdev_detach(&codec->core);
}
snd_hda_codec_disconnect_pcms(codec);
snd_hda_jack_tbl_disconnect(codec);
if (!refcount_dec_and_test(&codec->pcm_ref))
wait_event(codec->remove_sleep, !refcount_read(&codec->pcm_ref));
snd_power_sync_ref(codec->bus->card);
if (codec->patch_ops.free)
codec->patch_ops.free(codec);
snd_hda_codec_cleanup_for_unbind(codec);
codec->preset = NULL;
module_put(dev->driver->owner);
return 0;
}
static void hda_codec_driver_shutdown(struct device *dev)
{
snd_hda_codec_shutdown(dev_to_hda_codec(dev));
}
int __hda_codec_driver_register(struct hda_codec_driver *drv, const char *name,
struct module *owner)
{
drv->core.driver.name = name;
drv->core.driver.owner = owner;
drv->core.driver.bus = &snd_hda_bus_type;
drv->core.driver.probe = hda_codec_driver_probe;
drv->core.driver.remove = hda_codec_driver_remove;
drv->core.driver.shutdown = hda_codec_driver_shutdown;
drv->core.driver.pm = &hda_codec_driver_pm;
drv->core.type = HDA_DEV_LEGACY;
drv->core.match = hda_codec_match;
drv->core.unsol_event = hda_codec_unsol_event;
return driver_register(&drv->core.driver);
}
EXPORT_SYMBOL_GPL(__hda_codec_driver_register);
void hda_codec_driver_unregister(struct hda_codec_driver *drv)
{
driver_unregister(&drv->core.driver);
}
EXPORT_SYMBOL_GPL(hda_codec_driver_unregister);
static inline bool codec_probed(struct hda_codec *codec)
{
return device_attach(hda_codec_dev(codec)) > 0 && codec->preset;
}
/* try to auto-load codec module */
static void request_codec_module(struct hda_codec *codec)
{
#ifdef MODULE
char modalias[32];
const char *mod = NULL;
switch (codec->probe_id) {
case HDA_CODEC_ID_GENERIC_HDMI:
#if IS_MODULE(CONFIG_SND_HDA_CODEC_HDMI)
mod = "snd-hda-codec-hdmi";
#endif
break;
case HDA_CODEC_ID_GENERIC:
#if IS_MODULE(CONFIG_SND_HDA_GENERIC)
mod = "snd-hda-codec-generic";
#endif
break;
default:
snd_hdac_codec_modalias(&codec->core, modalias, sizeof(modalias));
mod = modalias;
break;
}
if (mod)
request_module(mod);
#endif /* MODULE */
}
/* try to auto-load and bind the codec module */
static void codec_bind_module(struct hda_codec *codec)
{
#ifdef MODULE
request_codec_module(codec);
if (codec_probed(codec))
return;
#endif
}
#if IS_ENABLED(CONFIG_SND_HDA_CODEC_HDMI)
/* if all audio out widgets are digital, let's assume the codec as a HDMI/DP */
static bool is_likely_hdmi_codec(struct hda_codec *codec)
{
hda_nid_t nid;
/*
* For ASoC users, if snd_hda_hdmi_codec module is denylisted and any
* event causes i915 enumeration to fail, ->wcaps remains uninitialized.
*/
if (!codec->wcaps)
return true;
for_each_hda_codec_node(nid, codec) {
unsigned int wcaps = get_wcaps(codec, nid);
switch (get_wcaps_type(wcaps)) {
case AC_WID_AUD_IN:
return false; /* HDMI parser supports only HDMI out */
case AC_WID_AUD_OUT:
if (!(wcaps & AC_WCAP_DIGITAL))
return false;
break;
}
}
return true;
}
#else
/* no HDMI codec parser support */
#define is_likely_hdmi_codec(codec) false
#endif /* CONFIG_SND_HDA_CODEC_HDMI */
static int codec_bind_generic(struct hda_codec *codec)
{
if (codec->probe_id)
return -ENODEV;
if (is_likely_hdmi_codec(codec)) {
codec->probe_id = HDA_CODEC_ID_GENERIC_HDMI;
request_codec_module(codec);
if (codec_probed(codec))
return 0;
}
codec->probe_id = HDA_CODEC_ID_GENERIC;
request_codec_module(codec);
if (codec_probed(codec))
return 0;
return -ENODEV;
}
#if IS_ENABLED(CONFIG_SND_HDA_GENERIC)
#define is_generic_config(codec) \
(codec->modelname && !strcmp(codec->modelname, "generic"))
#else
#define is_generic_config(codec) 0
#endif
/**
* snd_hda_codec_configure - (Re-)configure the HD-audio codec
* @codec: the HDA codec
*
* Start parsing of the given codec tree and (re-)initialize the whole
* patch instance.
*
* Returns 0 if successful or a negative error code.
*/
int snd_hda_codec_configure(struct hda_codec *codec)
{
int err;
if (codec->configured)
return 0;
if (is_generic_config(codec))
codec->probe_id = HDA_CODEC_ID_GENERIC;
else
codec->probe_id = 0;
if (!device_is_registered(&codec->core.dev)) {
err = snd_hdac_device_register(&codec->core);
if (err < 0)
return err;
}
if (!codec->preset)
codec_bind_module(codec);
if (!codec->preset) {
err = codec_bind_generic(codec);
if (err < 0) {
codec_dbg(codec, "Unable to bind the codec\n");
return err;
}
}
codec->configured = 1;
return 0;
}
EXPORT_SYMBOL_GPL(snd_hda_codec_configure);
| linux-master | sound/pci/hda/hda_bind.c |
// SPDX-License-Identifier: GPL-2.0
//
// HDA DSP ALSA Control Driver
//
// Copyright 2022 Cirrus Logic, Inc.
//
// Author: Stefan Binding <[email protected]>
#include <linux/module.h>
#include <sound/soc.h>
#include <linux/firmware/cirrus/cs_dsp.h>
#include <linux/firmware/cirrus/wmfw.h>
#include "hda_cs_dsp_ctl.h"
#define ADSP_MAX_STD_CTRL_SIZE 512
struct hda_cs_dsp_coeff_ctl {
struct cs_dsp_coeff_ctl *cs_ctl;
struct snd_card *card;
struct snd_kcontrol *kctl;
};
static const char * const hda_cs_dsp_fw_text[HDA_CS_DSP_NUM_FW] = {
[HDA_CS_DSP_FW_SPK_PROT] = "Prot",
[HDA_CS_DSP_FW_SPK_CALI] = "Cali",
[HDA_CS_DSP_FW_SPK_DIAG] = "Diag",
[HDA_CS_DSP_FW_MISC] = "Misc",
};
const char * const hda_cs_dsp_fw_ids[HDA_CS_DSP_NUM_FW] = {
[HDA_CS_DSP_FW_SPK_PROT] = "spk-prot",
[HDA_CS_DSP_FW_SPK_CALI] = "spk-cali",
[HDA_CS_DSP_FW_SPK_DIAG] = "spk-diag",
[HDA_CS_DSP_FW_MISC] = "misc",
};
EXPORT_SYMBOL_NS_GPL(hda_cs_dsp_fw_ids, SND_HDA_CS_DSP_CONTROLS);
static int hda_cs_dsp_coeff_info(struct snd_kcontrol *kctl, struct snd_ctl_elem_info *uinfo)
{
struct hda_cs_dsp_coeff_ctl *ctl = (struct hda_cs_dsp_coeff_ctl *)snd_kcontrol_chip(kctl);
struct cs_dsp_coeff_ctl *cs_ctl = ctl->cs_ctl;
uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
uinfo->count = cs_ctl->len;
return 0;
}
static int hda_cs_dsp_coeff_put(struct snd_kcontrol *kctl, struct snd_ctl_elem_value *ucontrol)
{
struct hda_cs_dsp_coeff_ctl *ctl = (struct hda_cs_dsp_coeff_ctl *)snd_kcontrol_chip(kctl);
struct cs_dsp_coeff_ctl *cs_ctl = ctl->cs_ctl;
char *p = ucontrol->value.bytes.data;
int ret = 0;
mutex_lock(&cs_ctl->dsp->pwr_lock);
ret = cs_dsp_coeff_write_ctrl(cs_ctl, 0, p, cs_ctl->len);
mutex_unlock(&cs_ctl->dsp->pwr_lock);
return ret;
}
static int hda_cs_dsp_coeff_get(struct snd_kcontrol *kctl, struct snd_ctl_elem_value *ucontrol)
{
struct hda_cs_dsp_coeff_ctl *ctl = (struct hda_cs_dsp_coeff_ctl *)snd_kcontrol_chip(kctl);
struct cs_dsp_coeff_ctl *cs_ctl = ctl->cs_ctl;
char *p = ucontrol->value.bytes.data;
int ret;
mutex_lock(&cs_ctl->dsp->pwr_lock);
ret = cs_dsp_coeff_read_ctrl(cs_ctl, 0, p, cs_ctl->len);
mutex_unlock(&cs_ctl->dsp->pwr_lock);
return ret;
}
static unsigned int wmfw_convert_flags(unsigned int in)
{
unsigned int out, rd, wr, vol;
rd = SNDRV_CTL_ELEM_ACCESS_READ;
wr = SNDRV_CTL_ELEM_ACCESS_WRITE;
vol = SNDRV_CTL_ELEM_ACCESS_VOLATILE;
out = 0;
if (in) {
out |= rd;
if (in & WMFW_CTL_FLAG_WRITEABLE)
out |= wr;
if (in & WMFW_CTL_FLAG_VOLATILE)
out |= vol;
} else {
out |= rd | wr | vol;
}
return out;
}
static void hda_cs_dsp_add_kcontrol(struct hda_cs_dsp_coeff_ctl *ctl, const char *name)
{
struct cs_dsp_coeff_ctl *cs_ctl = ctl->cs_ctl;
struct snd_kcontrol_new kcontrol = {0};
struct snd_kcontrol *kctl;
int ret = 0;
if (cs_ctl->len > ADSP_MAX_STD_CTRL_SIZE) {
dev_err(cs_ctl->dsp->dev, "KControl %s: length %zu exceeds maximum %d\n", name,
cs_ctl->len, ADSP_MAX_STD_CTRL_SIZE);
return;
}
kcontrol.name = name;
kcontrol.info = hda_cs_dsp_coeff_info;
kcontrol.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
kcontrol.access = wmfw_convert_flags(cs_ctl->flags);
kcontrol.get = hda_cs_dsp_coeff_get;
kcontrol.put = hda_cs_dsp_coeff_put;
/* Save ctl inside private_data, ctl is owned by cs_dsp,
* and will be freed when cs_dsp removes the control */
kctl = snd_ctl_new1(&kcontrol, (void *)ctl);
if (!kctl)
return;
ret = snd_ctl_add(ctl->card, kctl);
if (ret) {
dev_err(cs_ctl->dsp->dev, "Failed to add KControl %s = %d\n", kcontrol.name, ret);
return;
}
dev_dbg(cs_ctl->dsp->dev, "Added KControl: %s\n", kcontrol.name);
ctl->kctl = kctl;
}
static void hda_cs_dsp_control_add(struct cs_dsp_coeff_ctl *cs_ctl,
const struct hda_cs_dsp_ctl_info *info)
{
struct cs_dsp *cs_dsp = cs_ctl->dsp;
char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
struct hda_cs_dsp_coeff_ctl *ctl;
const char *region_name;
int ret;
region_name = cs_dsp_mem_region_name(cs_ctl->alg_region.type);
if (!region_name) {
dev_warn(cs_dsp->dev, "Unknown region type: %d\n", cs_ctl->alg_region.type);
return;
}
ret = scnprintf(name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN, "%s %s %.12s %x", info->device_name,
cs_dsp->name, hda_cs_dsp_fw_text[info->fw_type], cs_ctl->alg_region.alg);
if (cs_ctl->subname) {
int avail = SNDRV_CTL_ELEM_ID_NAME_MAXLEN - ret - 2;
int skip = 0;
/* Truncate the subname from the start if it is too long */
if (cs_ctl->subname_len > avail)
skip = cs_ctl->subname_len - avail;
snprintf(name + ret, SNDRV_CTL_ELEM_ID_NAME_MAXLEN - ret,
" %.*s", cs_ctl->subname_len - skip, cs_ctl->subname + skip);
}
ctl = kzalloc(sizeof(*ctl), GFP_KERNEL);
if (!ctl)
return;
ctl->cs_ctl = cs_ctl;
ctl->card = info->card;
cs_ctl->priv = ctl;
hda_cs_dsp_add_kcontrol(ctl, name);
}
void hda_cs_dsp_add_controls(struct cs_dsp *dsp, const struct hda_cs_dsp_ctl_info *info)
{
struct cs_dsp_coeff_ctl *cs_ctl;
/*
* pwr_lock would cause mutex inversion with ALSA control lock compared
* to the get/put functions.
* It is safe to walk the list without holding a mutex because entries
* are persistent and only cs_dsp_power_up() or cs_dsp_remove() can
* change the list.
*/
lockdep_assert_not_held(&dsp->pwr_lock);
list_for_each_entry(cs_ctl, &dsp->ctl_list, list) {
if (cs_ctl->flags & WMFW_CTL_FLAG_SYS)
continue;
if (cs_ctl->priv)
continue;
hda_cs_dsp_control_add(cs_ctl, info);
}
}
EXPORT_SYMBOL_NS_GPL(hda_cs_dsp_add_controls, SND_HDA_CS_DSP_CONTROLS);
void hda_cs_dsp_control_remove(struct cs_dsp_coeff_ctl *cs_ctl)
{
struct hda_cs_dsp_coeff_ctl *ctl = cs_ctl->priv;
kfree(ctl);
}
EXPORT_SYMBOL_NS_GPL(hda_cs_dsp_control_remove, SND_HDA_CS_DSP_CONTROLS);
int hda_cs_dsp_write_ctl(struct cs_dsp *dsp, const char *name, int type,
unsigned int alg, const void *buf, size_t len)
{
struct cs_dsp_coeff_ctl *cs_ctl;
struct hda_cs_dsp_coeff_ctl *ctl;
int ret;
mutex_lock(&dsp->pwr_lock);
cs_ctl = cs_dsp_get_ctl(dsp, name, type, alg);
ret = cs_dsp_coeff_write_ctrl(cs_ctl, 0, buf, len);
mutex_unlock(&dsp->pwr_lock);
if (ret < 0)
return ret;
if (ret == 0 || (cs_ctl->flags & WMFW_CTL_FLAG_SYS))
return 0;
ctl = cs_ctl->priv;
snd_ctl_notify(ctl->card, SNDRV_CTL_EVENT_MASK_VALUE, &ctl->kctl->id);
return 0;
}
EXPORT_SYMBOL_NS_GPL(hda_cs_dsp_write_ctl, SND_HDA_CS_DSP_CONTROLS);
int hda_cs_dsp_read_ctl(struct cs_dsp *dsp, const char *name, int type,
unsigned int alg, void *buf, size_t len)
{
int ret;
mutex_lock(&dsp->pwr_lock);
ret = cs_dsp_coeff_read_ctrl(cs_dsp_get_ctl(dsp, name, type, alg), 0, buf, len);
mutex_unlock(&dsp->pwr_lock);
return ret;
}
EXPORT_SYMBOL_NS_GPL(hda_cs_dsp_read_ctl, SND_HDA_CS_DSP_CONTROLS);
MODULE_DESCRIPTION("CS_DSP ALSA Control HDA Library");
MODULE_AUTHOR("Stefan Binding, <[email protected]>");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(FW_CS_DSP);
| linux-master | sound/pci/hda/hda_cs_dsp_ctl.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Generic routines and proc interface for ELD(EDID Like Data) information
*
* Copyright(c) 2008 Intel Corporation.
* Copyright (c) 2013 Anssi Hannula <[email protected]>
*
* Authors:
* Wu Fengguang <[email protected]>
*/
#include <linux/init.h>
#include <linux/slab.h>
#include <sound/core.h>
#include <asm/unaligned.h>
#include <sound/hda_chmap.h>
#include <sound/hda_codec.h>
#include "hda_local.h"
enum eld_versions {
ELD_VER_CEA_861D = 2,
ELD_VER_PARTIAL = 31,
};
enum cea_edid_versions {
CEA_EDID_VER_NONE = 0,
CEA_EDID_VER_CEA861 = 1,
CEA_EDID_VER_CEA861A = 2,
CEA_EDID_VER_CEA861BCD = 3,
CEA_EDID_VER_RESERVED = 4,
};
static const char * const eld_connection_type_names[4] = {
"HDMI",
"DisplayPort",
"2-reserved",
"3-reserved"
};
enum cea_audio_coding_types {
AUDIO_CODING_TYPE_REF_STREAM_HEADER = 0,
AUDIO_CODING_TYPE_LPCM = 1,
AUDIO_CODING_TYPE_AC3 = 2,
AUDIO_CODING_TYPE_MPEG1 = 3,
AUDIO_CODING_TYPE_MP3 = 4,
AUDIO_CODING_TYPE_MPEG2 = 5,
AUDIO_CODING_TYPE_AACLC = 6,
AUDIO_CODING_TYPE_DTS = 7,
AUDIO_CODING_TYPE_ATRAC = 8,
AUDIO_CODING_TYPE_SACD = 9,
AUDIO_CODING_TYPE_EAC3 = 10,
AUDIO_CODING_TYPE_DTS_HD = 11,
AUDIO_CODING_TYPE_MLP = 12,
AUDIO_CODING_TYPE_DST = 13,
AUDIO_CODING_TYPE_WMAPRO = 14,
AUDIO_CODING_TYPE_REF_CXT = 15,
/* also include valid xtypes below */
AUDIO_CODING_TYPE_HE_AAC = 15,
AUDIO_CODING_TYPE_HE_AAC2 = 16,
AUDIO_CODING_TYPE_MPEG_SURROUND = 17,
};
enum cea_audio_coding_xtypes {
AUDIO_CODING_XTYPE_HE_REF_CT = 0,
AUDIO_CODING_XTYPE_HE_AAC = 1,
AUDIO_CODING_XTYPE_HE_AAC2 = 2,
AUDIO_CODING_XTYPE_MPEG_SURROUND = 3,
AUDIO_CODING_XTYPE_FIRST_RESERVED = 4,
};
static const char * const cea_audio_coding_type_names[] = {
/* 0 */ "undefined",
/* 1 */ "LPCM",
/* 2 */ "AC-3",
/* 3 */ "MPEG1",
/* 4 */ "MP3",
/* 5 */ "MPEG2",
/* 6 */ "AAC-LC",
/* 7 */ "DTS",
/* 8 */ "ATRAC",
/* 9 */ "DSD (One Bit Audio)",
/* 10 */ "E-AC-3/DD+ (Dolby Digital Plus)",
/* 11 */ "DTS-HD",
/* 12 */ "MLP (Dolby TrueHD)",
/* 13 */ "DST",
/* 14 */ "WMAPro",
/* 15 */ "HE-AAC",
/* 16 */ "HE-AACv2",
/* 17 */ "MPEG Surround",
};
/*
* The following two lists are shared between
* - HDMI audio InfoFrame (source to sink)
* - CEA E-EDID Extension (sink to source)
*/
/*
* SS1:SS0 index => sample size
*/
static const int cea_sample_sizes[4] = {
0, /* 0: Refer to Stream Header */
AC_SUPPCM_BITS_16, /* 1: 16 bits */
AC_SUPPCM_BITS_20, /* 2: 20 bits */
AC_SUPPCM_BITS_24, /* 3: 24 bits */
};
/*
* SF2:SF1:SF0 index => sampling frequency
*/
static const int cea_sampling_frequencies[8] = {
0, /* 0: Refer to Stream Header */
SNDRV_PCM_RATE_32000, /* 1: 32000Hz */
SNDRV_PCM_RATE_44100, /* 2: 44100Hz */
SNDRV_PCM_RATE_48000, /* 3: 48000Hz */
SNDRV_PCM_RATE_88200, /* 4: 88200Hz */
SNDRV_PCM_RATE_96000, /* 5: 96000Hz */
SNDRV_PCM_RATE_176400, /* 6: 176400Hz */
SNDRV_PCM_RATE_192000, /* 7: 192000Hz */
};
static unsigned int hdmi_get_eld_data(struct hda_codec *codec, hda_nid_t nid,
int byte_index)
{
unsigned int val;
val = snd_hda_codec_read(codec, nid, 0,
AC_VERB_GET_HDMI_ELDD, byte_index);
#ifdef BE_PARANOID
codec_info(codec, "HDMI: ELD data byte %d: 0x%x\n", byte_index, val);
#endif
return val;
}
#define GRAB_BITS(buf, byte, lowbit, bits) \
({ \
BUILD_BUG_ON(lowbit > 7); \
BUILD_BUG_ON(bits > 8); \
BUILD_BUG_ON(bits <= 0); \
\
(buf[byte] >> (lowbit)) & ((1 << (bits)) - 1); \
})
static void hdmi_update_short_audio_desc(struct hda_codec *codec,
struct cea_sad *a,
const unsigned char *buf)
{
int i;
int val;
val = GRAB_BITS(buf, 1, 0, 7);
a->rates = 0;
for (i = 0; i < 7; i++)
if (val & (1 << i))
a->rates |= cea_sampling_frequencies[i + 1];
a->channels = GRAB_BITS(buf, 0, 0, 3);
a->channels++;
a->sample_bits = 0;
a->max_bitrate = 0;
a->format = GRAB_BITS(buf, 0, 3, 4);
switch (a->format) {
case AUDIO_CODING_TYPE_REF_STREAM_HEADER:
codec_info(codec, "HDMI: audio coding type 0 not expected\n");
break;
case AUDIO_CODING_TYPE_LPCM:
val = GRAB_BITS(buf, 2, 0, 3);
for (i = 0; i < 3; i++)
if (val & (1 << i))
a->sample_bits |= cea_sample_sizes[i + 1];
break;
case AUDIO_CODING_TYPE_AC3:
case AUDIO_CODING_TYPE_MPEG1:
case AUDIO_CODING_TYPE_MP3:
case AUDIO_CODING_TYPE_MPEG2:
case AUDIO_CODING_TYPE_AACLC:
case AUDIO_CODING_TYPE_DTS:
case AUDIO_CODING_TYPE_ATRAC:
a->max_bitrate = GRAB_BITS(buf, 2, 0, 8);
a->max_bitrate *= 8000;
break;
case AUDIO_CODING_TYPE_SACD:
break;
case AUDIO_CODING_TYPE_EAC3:
break;
case AUDIO_CODING_TYPE_DTS_HD:
break;
case AUDIO_CODING_TYPE_MLP:
break;
case AUDIO_CODING_TYPE_DST:
break;
case AUDIO_CODING_TYPE_WMAPRO:
a->profile = GRAB_BITS(buf, 2, 0, 3);
break;
case AUDIO_CODING_TYPE_REF_CXT:
a->format = GRAB_BITS(buf, 2, 3, 5);
if (a->format == AUDIO_CODING_XTYPE_HE_REF_CT ||
a->format >= AUDIO_CODING_XTYPE_FIRST_RESERVED) {
codec_info(codec,
"HDMI: audio coding xtype %d not expected\n",
a->format);
a->format = 0;
} else
a->format += AUDIO_CODING_TYPE_HE_AAC -
AUDIO_CODING_XTYPE_HE_AAC;
break;
}
}
/*
* Be careful, ELD buf could be totally rubbish!
*/
int snd_hdmi_parse_eld(struct hda_codec *codec, struct parsed_hdmi_eld *e,
const unsigned char *buf, int size)
{
int mnl;
int i;
memset(e, 0, sizeof(*e));
e->eld_ver = GRAB_BITS(buf, 0, 3, 5);
if (e->eld_ver != ELD_VER_CEA_861D &&
e->eld_ver != ELD_VER_PARTIAL) {
codec_info(codec, "HDMI: Unknown ELD version %d\n", e->eld_ver);
goto out_fail;
}
e->baseline_len = GRAB_BITS(buf, 2, 0, 8);
mnl = GRAB_BITS(buf, 4, 0, 5);
e->cea_edid_ver = GRAB_BITS(buf, 4, 5, 3);
e->support_hdcp = GRAB_BITS(buf, 5, 0, 1);
e->support_ai = GRAB_BITS(buf, 5, 1, 1);
e->conn_type = GRAB_BITS(buf, 5, 2, 2);
e->sad_count = GRAB_BITS(buf, 5, 4, 4);
e->aud_synch_delay = GRAB_BITS(buf, 6, 0, 8) * 2;
e->spk_alloc = GRAB_BITS(buf, 7, 0, 7);
e->port_id = get_unaligned_le64(buf + 8);
/* not specified, but the spec's tendency is little endian */
e->manufacture_id = get_unaligned_le16(buf + 16);
e->product_id = get_unaligned_le16(buf + 18);
if (mnl > ELD_MAX_MNL) {
codec_info(codec, "HDMI: MNL is reserved value %d\n", mnl);
goto out_fail;
} else if (ELD_FIXED_BYTES + mnl > size) {
codec_info(codec, "HDMI: out of range MNL %d\n", mnl);
goto out_fail;
} else
strscpy(e->monitor_name, buf + ELD_FIXED_BYTES, mnl + 1);
for (i = 0; i < e->sad_count; i++) {
if (ELD_FIXED_BYTES + mnl + 3 * (i + 1) > size) {
codec_info(codec, "HDMI: out of range SAD %d\n", i);
goto out_fail;
}
hdmi_update_short_audio_desc(codec, e->sad + i,
buf + ELD_FIXED_BYTES + mnl + 3 * i);
}
/*
* HDMI sink's ELD info cannot always be retrieved for now, e.g.
* in console or for audio devices. Assume the highest speakers
* configuration, to _not_ prohibit multi-channel audio playback.
*/
if (!e->spk_alloc)
e->spk_alloc = 0xffff;
return 0;
out_fail:
return -EINVAL;
}
int snd_hdmi_get_eld_size(struct hda_codec *codec, hda_nid_t nid)
{
return snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_HDMI_DIP_SIZE,
AC_DIPSIZE_ELD_BUF);
}
int snd_hdmi_get_eld(struct hda_codec *codec, hda_nid_t nid,
unsigned char *buf, int *eld_size)
{
int i;
int ret = 0;
int size;
/*
* ELD size is initialized to zero in caller function. If no errors and
* ELD is valid, actual eld_size is assigned.
*/
size = snd_hdmi_get_eld_size(codec, nid);
if (size == 0) {
/* wfg: workaround for ASUS P5E-VM HDMI board */
codec_info(codec, "HDMI: ELD buf size is 0, force 128\n");
size = 128;
}
if (size < ELD_FIXED_BYTES || size > ELD_MAX_SIZE) {
codec_info(codec, "HDMI: invalid ELD buf size %d\n", size);
return -ERANGE;
}
/* set ELD buffer */
for (i = 0; i < size; i++) {
unsigned int val = hdmi_get_eld_data(codec, nid, i);
/*
* Graphics driver might be writing to ELD buffer right now.
* Just abort. The caller will repoll after a while.
*/
if (!(val & AC_ELDD_ELD_VALID)) {
codec_info(codec, "HDMI: invalid ELD data byte %d\n", i);
ret = -EINVAL;
goto error;
}
val &= AC_ELDD_ELD_DATA;
/*
* The first byte cannot be zero. This can happen on some DVI
* connections. Some Intel chips may also need some 250ms delay
* to return non-zero ELD data, even when the graphics driver
* correctly writes ELD content before setting ELD_valid bit.
*/
if (!val && !i) {
codec_dbg(codec, "HDMI: 0 ELD data\n");
ret = -EINVAL;
goto error;
}
buf[i] = val;
}
*eld_size = size;
error:
return ret;
}
/*
* SNDRV_PCM_RATE_* and AC_PAR_PCM values don't match, print correct rates with
* hdmi-specific routine.
*/
static void hdmi_print_pcm_rates(int pcm, char *buf, int buflen)
{
static const unsigned int alsa_rates[] = {
5512, 8000, 11025, 16000, 22050, 32000, 44100, 48000, 64000,
88200, 96000, 176400, 192000, 384000
};
int i, j;
for (i = 0, j = 0; i < ARRAY_SIZE(alsa_rates); i++)
if (pcm & (1 << i))
j += scnprintf(buf + j, buflen - j, " %d",
alsa_rates[i]);
buf[j] = '\0'; /* necessary when j == 0 */
}
#define SND_PRINT_RATES_ADVISED_BUFSIZE 80
static void hdmi_show_short_audio_desc(struct hda_codec *codec,
struct cea_sad *a)
{
char buf[SND_PRINT_RATES_ADVISED_BUFSIZE];
char buf2[8 + SND_PRINT_BITS_ADVISED_BUFSIZE] = ", bits =";
if (!a->format)
return;
hdmi_print_pcm_rates(a->rates, buf, sizeof(buf));
if (a->format == AUDIO_CODING_TYPE_LPCM)
snd_print_pcm_bits(a->sample_bits, buf2 + 8, sizeof(buf2) - 8);
else if (a->max_bitrate)
snprintf(buf2, sizeof(buf2),
", max bitrate = %d", a->max_bitrate);
else
buf2[0] = '\0';
codec_dbg(codec,
"HDMI: supports coding type %s: channels = %d, rates =%s%s\n",
cea_audio_coding_type_names[a->format],
a->channels, buf, buf2);
}
void snd_hdmi_show_eld(struct hda_codec *codec, struct parsed_hdmi_eld *e)
{
int i;
codec_dbg(codec, "HDMI: detected monitor %s at connection type %s\n",
e->monitor_name,
eld_connection_type_names[e->conn_type]);
if (e->spk_alloc) {
char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
snd_hdac_print_channel_allocation(e->spk_alloc, buf, sizeof(buf));
codec_dbg(codec, "HDMI: available speakers:%s\n", buf);
}
for (i = 0; i < e->sad_count; i++)
hdmi_show_short_audio_desc(codec, e->sad + i);
}
#ifdef CONFIG_SND_PROC_FS
static void hdmi_print_sad_info(int i, struct cea_sad *a,
struct snd_info_buffer *buffer)
{
char buf[SND_PRINT_RATES_ADVISED_BUFSIZE];
snd_iprintf(buffer, "sad%d_coding_type\t[0x%x] %s\n",
i, a->format, cea_audio_coding_type_names[a->format]);
snd_iprintf(buffer, "sad%d_channels\t\t%d\n", i, a->channels);
hdmi_print_pcm_rates(a->rates, buf, sizeof(buf));
snd_iprintf(buffer, "sad%d_rates\t\t[0x%x]%s\n", i, a->rates, buf);
if (a->format == AUDIO_CODING_TYPE_LPCM) {
snd_print_pcm_bits(a->sample_bits, buf, sizeof(buf));
snd_iprintf(buffer, "sad%d_bits\t\t[0x%x]%s\n",
i, a->sample_bits, buf);
}
if (a->max_bitrate)
snd_iprintf(buffer, "sad%d_max_bitrate\t%d\n",
i, a->max_bitrate);
if (a->profile)
snd_iprintf(buffer, "sad%d_profile\t\t%d\n", i, a->profile);
}
void snd_hdmi_print_eld_info(struct hdmi_eld *eld,
struct snd_info_buffer *buffer,
hda_nid_t pin_nid, int dev_id, hda_nid_t cvt_nid)
{
struct parsed_hdmi_eld *e = &eld->info;
char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
int i;
static const char * const eld_version_names[32] = {
"reserved",
"reserved",
"CEA-861D or below",
[3 ... 30] = "reserved",
[31] = "partial"
};
static const char * const cea_edid_version_names[8] = {
"no CEA EDID Timing Extension block present",
"CEA-861",
"CEA-861-A",
"CEA-861-B, C or D",
[4 ... 7] = "reserved"
};
snd_iprintf(buffer, "monitor_present\t\t%d\n", eld->monitor_present);
snd_iprintf(buffer, "eld_valid\t\t%d\n", eld->eld_valid);
snd_iprintf(buffer, "codec_pin_nid\t\t0x%x\n", pin_nid);
snd_iprintf(buffer, "codec_dev_id\t\t0x%x\n", dev_id);
snd_iprintf(buffer, "codec_cvt_nid\t\t0x%x\n", cvt_nid);
if (!eld->eld_valid)
return;
snd_iprintf(buffer, "monitor_name\t\t%s\n", e->monitor_name);
snd_iprintf(buffer, "connection_type\t\t%s\n",
eld_connection_type_names[e->conn_type]);
snd_iprintf(buffer, "eld_version\t\t[0x%x] %s\n", e->eld_ver,
eld_version_names[e->eld_ver]);
snd_iprintf(buffer, "edid_version\t\t[0x%x] %s\n", e->cea_edid_ver,
cea_edid_version_names[e->cea_edid_ver]);
snd_iprintf(buffer, "manufacture_id\t\t0x%x\n", e->manufacture_id);
snd_iprintf(buffer, "product_id\t\t0x%x\n", e->product_id);
snd_iprintf(buffer, "port_id\t\t\t0x%llx\n", (long long)e->port_id);
snd_iprintf(buffer, "support_hdcp\t\t%d\n", e->support_hdcp);
snd_iprintf(buffer, "support_ai\t\t%d\n", e->support_ai);
snd_iprintf(buffer, "audio_sync_delay\t%d\n", e->aud_synch_delay);
snd_hdac_print_channel_allocation(e->spk_alloc, buf, sizeof(buf));
snd_iprintf(buffer, "speakers\t\t[0x%x]%s\n", e->spk_alloc, buf);
snd_iprintf(buffer, "sad_count\t\t%d\n", e->sad_count);
for (i = 0; i < e->sad_count; i++)
hdmi_print_sad_info(i, e->sad + i, buffer);
}
void snd_hdmi_write_eld_info(struct hdmi_eld *eld,
struct snd_info_buffer *buffer)
{
struct parsed_hdmi_eld *e = &eld->info;
char line[64];
char name[64];
char *sname;
long long val;
unsigned int n;
while (!snd_info_get_line(buffer, line, sizeof(line))) {
if (sscanf(line, "%s %llx", name, &val) != 2)
continue;
/*
* We don't allow modification to these fields:
* monitor_name manufacture_id product_id
* eld_version edid_version
*/
if (!strcmp(name, "monitor_present"))
eld->monitor_present = val;
else if (!strcmp(name, "eld_valid"))
eld->eld_valid = val;
else if (!strcmp(name, "connection_type"))
e->conn_type = val;
else if (!strcmp(name, "port_id"))
e->port_id = val;
else if (!strcmp(name, "support_hdcp"))
e->support_hdcp = val;
else if (!strcmp(name, "support_ai"))
e->support_ai = val;
else if (!strcmp(name, "audio_sync_delay"))
e->aud_synch_delay = val;
else if (!strcmp(name, "speakers"))
e->spk_alloc = val;
else if (!strcmp(name, "sad_count"))
e->sad_count = val;
else if (!strncmp(name, "sad", 3)) {
sname = name + 4;
n = name[3] - '0';
if (name[4] >= '0' && name[4] <= '9') {
sname++;
n = 10 * n + name[4] - '0';
}
if (n >= ELD_MAX_SAD)
continue;
if (!strcmp(sname, "_coding_type"))
e->sad[n].format = val;
else if (!strcmp(sname, "_channels"))
e->sad[n].channels = val;
else if (!strcmp(sname, "_rates"))
e->sad[n].rates = val;
else if (!strcmp(sname, "_bits"))
e->sad[n].sample_bits = val;
else if (!strcmp(sname, "_max_bitrate"))
e->sad[n].max_bitrate = val;
else if (!strcmp(sname, "_profile"))
e->sad[n].profile = val;
if (n >= e->sad_count)
e->sad_count = n + 1;
}
}
}
#endif /* CONFIG_SND_PROC_FS */
/* update PCM info based on ELD */
void snd_hdmi_eld_update_pcm_info(struct parsed_hdmi_eld *e,
struct hda_pcm_stream *hinfo)
{
u32 rates;
u64 formats;
unsigned int maxbps;
unsigned int channels_max;
int i;
/* assume basic audio support (the basic audio flag is not in ELD;
* however, all audio capable sinks are required to support basic
* audio) */
rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
SNDRV_PCM_RATE_48000;
formats = SNDRV_PCM_FMTBIT_S16_LE;
maxbps = 16;
channels_max = 2;
for (i = 0; i < e->sad_count; i++) {
struct cea_sad *a = &e->sad[i];
rates |= a->rates;
if (a->channels > channels_max)
channels_max = a->channels;
if (a->format == AUDIO_CODING_TYPE_LPCM) {
if (a->sample_bits & AC_SUPPCM_BITS_20) {
formats |= SNDRV_PCM_FMTBIT_S32_LE;
if (maxbps < 20)
maxbps = 20;
}
if (a->sample_bits & AC_SUPPCM_BITS_24) {
formats |= SNDRV_PCM_FMTBIT_S32_LE;
if (maxbps < 24)
maxbps = 24;
}
}
}
/* restrict the parameters by the values the codec provides */
hinfo->rates &= rates;
hinfo->formats &= formats;
hinfo->maxbps = min(hinfo->maxbps, maxbps);
hinfo->channels_max = min(hinfo->channels_max, channels_max);
}
/* ATI/AMD specific stuff (ELD emulation) */
#define ATI_VERB_SET_AUDIO_DESCRIPTOR 0x776
#define ATI_VERB_SET_SINK_INFO_INDEX 0x780
#define ATI_VERB_GET_SPEAKER_ALLOCATION 0xf70
#define ATI_VERB_GET_AUDIO_DESCRIPTOR 0xf76
#define ATI_VERB_GET_AUDIO_VIDEO_DELAY 0xf7b
#define ATI_VERB_GET_SINK_INFO_INDEX 0xf80
#define ATI_VERB_GET_SINK_INFO_DATA 0xf81
#define ATI_SPKALLOC_SPKALLOC 0x007f
#define ATI_SPKALLOC_TYPE_HDMI 0x0100
#define ATI_SPKALLOC_TYPE_DISPLAYPORT 0x0200
/* first three bytes are just standard SAD */
#define ATI_AUDIODESC_CHANNELS 0x00000007
#define ATI_AUDIODESC_RATES 0x0000ff00
#define ATI_AUDIODESC_LPCM_STEREO_RATES 0xff000000
/* in standard HDMI VSDB format */
#define ATI_DELAY_VIDEO_LATENCY 0x000000ff
#define ATI_DELAY_AUDIO_LATENCY 0x0000ff00
enum ati_sink_info_idx {
ATI_INFO_IDX_MANUFACTURER_ID = 0,
ATI_INFO_IDX_PRODUCT_ID = 1,
ATI_INFO_IDX_SINK_DESC_LEN = 2,
ATI_INFO_IDX_PORT_ID_LOW = 3,
ATI_INFO_IDX_PORT_ID_HIGH = 4,
ATI_INFO_IDX_SINK_DESC_FIRST = 5,
ATI_INFO_IDX_SINK_DESC_LAST = 22, /* max len 18 bytes */
};
int snd_hdmi_get_eld_ati(struct hda_codec *codec, hda_nid_t nid,
unsigned char *buf, int *eld_size, bool rev3_or_later)
{
int spkalloc, ati_sad, aud_synch;
int sink_desc_len = 0;
int pos, i;
/* ATI/AMD does not have ELD, emulate it */
spkalloc = snd_hda_codec_read(codec, nid, 0, ATI_VERB_GET_SPEAKER_ALLOCATION, 0);
if (spkalloc <= 0) {
codec_info(codec, "HDMI ATI/AMD: no speaker allocation for ELD\n");
return -EINVAL;
}
memset(buf, 0, ELD_FIXED_BYTES + ELD_MAX_MNL + ELD_MAX_SAD * 3);
/* version */
buf[0] = ELD_VER_CEA_861D << 3;
/* speaker allocation from EDID */
buf[7] = spkalloc & ATI_SPKALLOC_SPKALLOC;
/* is DisplayPort? */
if (spkalloc & ATI_SPKALLOC_TYPE_DISPLAYPORT)
buf[5] |= 0x04;
pos = ELD_FIXED_BYTES;
if (rev3_or_later) {
int sink_info;
snd_hda_codec_write(codec, nid, 0, ATI_VERB_SET_SINK_INFO_INDEX, ATI_INFO_IDX_PORT_ID_LOW);
sink_info = snd_hda_codec_read(codec, nid, 0, ATI_VERB_GET_SINK_INFO_DATA, 0);
put_unaligned_le32(sink_info, buf + 8);
snd_hda_codec_write(codec, nid, 0, ATI_VERB_SET_SINK_INFO_INDEX, ATI_INFO_IDX_PORT_ID_HIGH);
sink_info = snd_hda_codec_read(codec, nid, 0, ATI_VERB_GET_SINK_INFO_DATA, 0);
put_unaligned_le32(sink_info, buf + 12);
snd_hda_codec_write(codec, nid, 0, ATI_VERB_SET_SINK_INFO_INDEX, ATI_INFO_IDX_MANUFACTURER_ID);
sink_info = snd_hda_codec_read(codec, nid, 0, ATI_VERB_GET_SINK_INFO_DATA, 0);
put_unaligned_le16(sink_info, buf + 16);
snd_hda_codec_write(codec, nid, 0, ATI_VERB_SET_SINK_INFO_INDEX, ATI_INFO_IDX_PRODUCT_ID);
sink_info = snd_hda_codec_read(codec, nid, 0, ATI_VERB_GET_SINK_INFO_DATA, 0);
put_unaligned_le16(sink_info, buf + 18);
snd_hda_codec_write(codec, nid, 0, ATI_VERB_SET_SINK_INFO_INDEX, ATI_INFO_IDX_SINK_DESC_LEN);
sink_desc_len = snd_hda_codec_read(codec, nid, 0, ATI_VERB_GET_SINK_INFO_DATA, 0);
if (sink_desc_len > ELD_MAX_MNL) {
codec_info(codec, "HDMI ATI/AMD: Truncating HDMI sink description with length %d\n",
sink_desc_len);
sink_desc_len = ELD_MAX_MNL;
}
buf[4] |= sink_desc_len;
for (i = 0; i < sink_desc_len; i++) {
snd_hda_codec_write(codec, nid, 0, ATI_VERB_SET_SINK_INFO_INDEX, ATI_INFO_IDX_SINK_DESC_FIRST + i);
buf[pos++] = snd_hda_codec_read(codec, nid, 0, ATI_VERB_GET_SINK_INFO_DATA, 0);
}
}
for (i = AUDIO_CODING_TYPE_LPCM; i <= AUDIO_CODING_TYPE_WMAPRO; i++) {
if (i == AUDIO_CODING_TYPE_SACD || i == AUDIO_CODING_TYPE_DST)
continue; /* not handled by ATI/AMD */
snd_hda_codec_write(codec, nid, 0, ATI_VERB_SET_AUDIO_DESCRIPTOR, i << 3);
ati_sad = snd_hda_codec_read(codec, nid, 0, ATI_VERB_GET_AUDIO_DESCRIPTOR, 0);
if (ati_sad <= 0)
continue;
if (ati_sad & ATI_AUDIODESC_RATES) {
/* format is supported, copy SAD as-is */
buf[pos++] = (ati_sad & 0x0000ff) >> 0;
buf[pos++] = (ati_sad & 0x00ff00) >> 8;
buf[pos++] = (ati_sad & 0xff0000) >> 16;
}
if (i == AUDIO_CODING_TYPE_LPCM
&& (ati_sad & ATI_AUDIODESC_LPCM_STEREO_RATES)
&& (ati_sad & ATI_AUDIODESC_LPCM_STEREO_RATES) >> 16 != (ati_sad & ATI_AUDIODESC_RATES)) {
/* for PCM there is a separate stereo rate mask */
buf[pos++] = ((ati_sad & 0x000000ff) & ~ATI_AUDIODESC_CHANNELS) | 0x1;
/* rates from the extra byte */
buf[pos++] = (ati_sad & 0xff000000) >> 24;
buf[pos++] = (ati_sad & 0x00ff0000) >> 16;
}
}
if (pos == ELD_FIXED_BYTES + sink_desc_len) {
codec_info(codec, "HDMI ATI/AMD: no audio descriptors for ELD\n");
return -EINVAL;
}
/*
* HDMI VSDB latency format:
* separately for both audio and video:
* 0 field not valid or unknown latency
* [1..251] msecs = (x-1)*2 (max 500ms with x = 251 = 0xfb)
* 255 audio/video not supported
*
* HDA latency format:
* single value indicating video latency relative to audio:
* 0 unknown or 0ms
* [1..250] msecs = x*2 (max 500ms with x = 250 = 0xfa)
* [251..255] reserved
*/
aud_synch = snd_hda_codec_read(codec, nid, 0, ATI_VERB_GET_AUDIO_VIDEO_DELAY, 0);
if ((aud_synch & ATI_DELAY_VIDEO_LATENCY) && (aud_synch & ATI_DELAY_AUDIO_LATENCY)) {
int video_latency_hdmi = (aud_synch & ATI_DELAY_VIDEO_LATENCY);
int audio_latency_hdmi = (aud_synch & ATI_DELAY_AUDIO_LATENCY) >> 8;
if (video_latency_hdmi <= 0xfb && audio_latency_hdmi <= 0xfb &&
video_latency_hdmi > audio_latency_hdmi)
buf[6] = video_latency_hdmi - audio_latency_hdmi;
/* else unknown/invalid or 0ms or video ahead of audio, so use zero */
}
/* SAD count */
buf[5] |= ((pos - ELD_FIXED_BYTES - sink_desc_len) / 3) << 4;
/* Baseline ELD block length is 4-byte aligned */
pos = round_up(pos, 4);
/* Baseline ELD length (4-byte header is not counted in) */
buf[2] = (pos - 4) / 4;
*eld_size = pos;
return 0;
}
| linux-master | sound/pci/hda/hda_eld.c |
// SPDX-License-Identifier: GPL-2.0
/* Fixes for Lenovo Ideapad S740, to be included from codec driver */
static const struct hda_verb alc285_ideapad_s740_coefs[] = {
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x10 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0320 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x24 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0041 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x24 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0041 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x007f },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x007f },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0001 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0001 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0001 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0001 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x003c },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0011 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x003c },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0011 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x000c },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x001a },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x000c },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x001a },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x000f },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0042 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x000f },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0042 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0010 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0040 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0010 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0040 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0003 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0009 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0003 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0009 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x001c },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x004c },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x001c },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x004c },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x001d },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x004e },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x001d },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x004e },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x001b },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0001 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x001b },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0001 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0019 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0025 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0019 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0025 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0018 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0037 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0018 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0037 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x001a },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0040 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x001a },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0040 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0016 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0076 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0016 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0076 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0017 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0010 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0017 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0010 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0015 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0015 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0015 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0015 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0007 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0086 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0007 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0086 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0002 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0001 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0002 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0001 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0002 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0002 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x24 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0042 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x24 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0042 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x007f },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x007f },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0001 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0001 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0001 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0001 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x003c },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0011 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x003c },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0011 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x000c },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x002a },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x000c },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x002a },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x000f },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0046 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x000f },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0046 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0010 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0044 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0010 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0044 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0003 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0009 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0003 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0009 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x001c },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x004c },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x001c },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x004c },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x001b },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0001 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x001b },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0001 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0019 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0025 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0019 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0025 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0018 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0037 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0018 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0037 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x001a },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0040 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x001a },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0040 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0016 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0076 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0016 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0076 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0017 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0010 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0017 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0010 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0015 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0015 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0015 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0015 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0007 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0086 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0007 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0086 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0002 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0001 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0002 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0001 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0002 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{}
};
static void alc285_fixup_ideapad_s740_coef(struct hda_codec *codec,
const struct hda_fixup *fix,
int action)
{
switch (action) {
case HDA_FIXUP_ACT_PRE_PROBE:
snd_hda_add_verbs(codec, alc285_ideapad_s740_coefs);
break;
}
}
| linux-master | sound/pci/hda/ideapad_s740_helper.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Universal Interface for Intel High Definition Audio Codec
*
* Generic proc interface
*
* Copyright (c) 2004 Takashi Iwai <[email protected]>
*/
#include <linux/init.h>
#include <linux/slab.h>
#include <sound/core.h>
#include <linux/module.h>
#include <sound/hda_codec.h>
#include "hda_local.h"
static int dump_coef = -1;
module_param(dump_coef, int, 0644);
MODULE_PARM_DESC(dump_coef, "Dump processing coefficients in codec proc file (-1=auto, 0=disable, 1=enable)");
/* always use noncached version */
#define param_read(codec, nid, parm) \
snd_hdac_read_parm_uncached(&(codec)->core, nid, parm)
static const char *get_wid_type_name(unsigned int wid_value)
{
static const char * const names[16] = {
[AC_WID_AUD_OUT] = "Audio Output",
[AC_WID_AUD_IN] = "Audio Input",
[AC_WID_AUD_MIX] = "Audio Mixer",
[AC_WID_AUD_SEL] = "Audio Selector",
[AC_WID_PIN] = "Pin Complex",
[AC_WID_POWER] = "Power Widget",
[AC_WID_VOL_KNB] = "Volume Knob Widget",
[AC_WID_BEEP] = "Beep Generator Widget",
[AC_WID_VENDOR] = "Vendor Defined Widget",
};
if (wid_value == -1)
return "UNKNOWN Widget";
wid_value &= 0xf;
if (names[wid_value])
return names[wid_value];
else
return "UNKNOWN Widget";
}
static void print_nid_array(struct snd_info_buffer *buffer,
struct hda_codec *codec, hda_nid_t nid,
struct snd_array *array)
{
int i;
struct hda_nid_item *items = array->list, *item;
struct snd_kcontrol *kctl;
for (i = 0; i < array->used; i++) {
item = &items[i];
if (item->nid == nid) {
kctl = item->kctl;
snd_iprintf(buffer,
" Control: name=\"%s\", index=%i, device=%i\n",
kctl->id.name, kctl->id.index + item->index,
kctl->id.device);
if (item->flags & HDA_NID_ITEM_AMP)
snd_iprintf(buffer,
" ControlAmp: chs=%lu, dir=%s, "
"idx=%lu, ofs=%lu\n",
get_amp_channels(kctl),
get_amp_direction(kctl) ? "Out" : "In",
get_amp_index(kctl),
get_amp_offset(kctl));
}
}
}
static void print_nid_pcms(struct snd_info_buffer *buffer,
struct hda_codec *codec, hda_nid_t nid)
{
int type;
struct hda_pcm *cpcm;
list_for_each_entry(cpcm, &codec->pcm_list_head, list) {
for (type = 0; type < 2; type++) {
if (cpcm->stream[type].nid != nid || cpcm->pcm == NULL)
continue;
snd_iprintf(buffer, " Device: name=\"%s\", "
"type=\"%s\", device=%i\n",
cpcm->name,
snd_hda_pcm_type_name[cpcm->pcm_type],
cpcm->pcm->device);
}
}
}
static void print_amp_caps(struct snd_info_buffer *buffer,
struct hda_codec *codec, hda_nid_t nid, int dir)
{
unsigned int caps;
caps = param_read(codec, nid, dir == HDA_OUTPUT ?
AC_PAR_AMP_OUT_CAP : AC_PAR_AMP_IN_CAP);
if (caps == -1 || caps == 0) {
snd_iprintf(buffer, "N/A\n");
return;
}
snd_iprintf(buffer, "ofs=0x%02x, nsteps=0x%02x, stepsize=0x%02x, "
"mute=%x\n",
caps & AC_AMPCAP_OFFSET,
(caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT,
(caps & AC_AMPCAP_STEP_SIZE) >> AC_AMPCAP_STEP_SIZE_SHIFT,
(caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT);
}
/* is this a stereo widget or a stereo-to-mono mix? */
static bool is_stereo_amps(struct hda_codec *codec, hda_nid_t nid,
int dir, unsigned int wcaps, int indices)
{
hda_nid_t conn;
if (wcaps & AC_WCAP_STEREO)
return true;
/* check for a stereo-to-mono mix; it must be:
* only a single connection, only for input, and only a mixer widget
*/
if (indices != 1 || dir != HDA_INPUT ||
get_wcaps_type(wcaps) != AC_WID_AUD_MIX)
return false;
if (snd_hda_get_raw_connections(codec, nid, &conn, 1) < 0)
return false;
/* the connection source is a stereo? */
wcaps = snd_hda_param_read(codec, conn, AC_PAR_AUDIO_WIDGET_CAP);
return !!(wcaps & AC_WCAP_STEREO);
}
static void print_amp_vals(struct snd_info_buffer *buffer,
struct hda_codec *codec, hda_nid_t nid,
int dir, unsigned int wcaps, int indices)
{
unsigned int val;
bool stereo;
int i;
stereo = is_stereo_amps(codec, nid, dir, wcaps, indices);
dir = dir == HDA_OUTPUT ? AC_AMP_GET_OUTPUT : AC_AMP_GET_INPUT;
for (i = 0; i < indices; i++) {
snd_iprintf(buffer, " [");
val = snd_hda_codec_read(codec, nid, 0,
AC_VERB_GET_AMP_GAIN_MUTE,
AC_AMP_GET_LEFT | dir | i);
snd_iprintf(buffer, "0x%02x", val);
if (stereo) {
val = snd_hda_codec_read(codec, nid, 0,
AC_VERB_GET_AMP_GAIN_MUTE,
AC_AMP_GET_RIGHT | dir | i);
snd_iprintf(buffer, " 0x%02x", val);
}
snd_iprintf(buffer, "]");
}
snd_iprintf(buffer, "\n");
}
static void print_pcm_rates(struct snd_info_buffer *buffer, unsigned int pcm)
{
static const unsigned int rates[] = {
8000, 11025, 16000, 22050, 32000, 44100, 48000, 88200,
96000, 176400, 192000, 384000
};
int i;
pcm &= AC_SUPPCM_RATES;
snd_iprintf(buffer, " rates [0x%x]:", pcm);
for (i = 0; i < ARRAY_SIZE(rates); i++)
if (pcm & (1 << i))
snd_iprintf(buffer, " %d", rates[i]);
snd_iprintf(buffer, "\n");
}
static void print_pcm_bits(struct snd_info_buffer *buffer, unsigned int pcm)
{
char buf[SND_PRINT_BITS_ADVISED_BUFSIZE];
snd_iprintf(buffer, " bits [0x%x]:", (pcm >> 16) & 0xff);
snd_print_pcm_bits(pcm, buf, sizeof(buf));
snd_iprintf(buffer, "%s\n", buf);
}
static void print_pcm_formats(struct snd_info_buffer *buffer,
unsigned int streams)
{
snd_iprintf(buffer, " formats [0x%x]:", streams & 0xf);
if (streams & AC_SUPFMT_PCM)
snd_iprintf(buffer, " PCM");
if (streams & AC_SUPFMT_FLOAT32)
snd_iprintf(buffer, " FLOAT");
if (streams & AC_SUPFMT_AC3)
snd_iprintf(buffer, " AC3");
snd_iprintf(buffer, "\n");
}
static void print_pcm_caps(struct snd_info_buffer *buffer,
struct hda_codec *codec, hda_nid_t nid)
{
unsigned int pcm = param_read(codec, nid, AC_PAR_PCM);
unsigned int stream = param_read(codec, nid, AC_PAR_STREAM);
if (pcm == -1 || stream == -1) {
snd_iprintf(buffer, "N/A\n");
return;
}
print_pcm_rates(buffer, pcm);
print_pcm_bits(buffer, pcm);
print_pcm_formats(buffer, stream);
}
static const char *get_jack_connection(u32 cfg)
{
static const char * const names[16] = {
"Unknown", "1/8", "1/4", "ATAPI",
"RCA", "Optical","Digital", "Analog",
"DIN", "XLR", "RJ11", "Comb",
NULL, NULL, NULL, "Other"
};
cfg = (cfg & AC_DEFCFG_CONN_TYPE) >> AC_DEFCFG_CONN_TYPE_SHIFT;
if (names[cfg])
return names[cfg];
else
return "UNKNOWN";
}
static const char *get_jack_color(u32 cfg)
{
static const char * const names[16] = {
"Unknown", "Black", "Grey", "Blue",
"Green", "Red", "Orange", "Yellow",
"Purple", "Pink", NULL, NULL,
NULL, NULL, "White", "Other",
};
cfg = (cfg & AC_DEFCFG_COLOR) >> AC_DEFCFG_COLOR_SHIFT;
if (names[cfg])
return names[cfg];
else
return "UNKNOWN";
}
/*
* Parse the pin default config value and returns the string of the
* jack location, e.g. "Rear", "Front", etc.
*/
static const char *get_jack_location(u32 cfg)
{
static const char * const bases[7] = {
"N/A", "Rear", "Front", "Left", "Right", "Top", "Bottom",
};
static const unsigned char specials_idx[] = {
0x07, 0x08,
0x17, 0x18, 0x19,
0x37, 0x38
};
static const char * const specials[] = {
"Rear Panel", "Drive Bar",
"Riser", "HDMI", "ATAPI",
"Mobile-In", "Mobile-Out"
};
int i;
cfg = (cfg & AC_DEFCFG_LOCATION) >> AC_DEFCFG_LOCATION_SHIFT;
if ((cfg & 0x0f) < 7)
return bases[cfg & 0x0f];
for (i = 0; i < ARRAY_SIZE(specials_idx); i++) {
if (cfg == specials_idx[i])
return specials[i];
}
return "UNKNOWN";
}
/*
* Parse the pin default config value and returns the string of the
* jack connectivity, i.e. external or internal connection.
*/
static const char *get_jack_connectivity(u32 cfg)
{
static const char * const jack_locations[4] = {
"Ext", "Int", "Sep", "Oth"
};
return jack_locations[(cfg >> (AC_DEFCFG_LOCATION_SHIFT + 4)) & 3];
}
/*
* Parse the pin default config value and returns the string of the
* jack type, i.e. the purpose of the jack, such as Line-Out or CD.
*/
static const char *get_jack_type(u32 cfg)
{
static const char * const jack_types[16] = {
"Line Out", "Speaker", "HP Out", "CD",
"SPDIF Out", "Digital Out", "Modem Line", "Modem Hand",
"Line In", "Aux", "Mic", "Telephony",
"SPDIF In", "Digital In", "Reserved", "Other"
};
return jack_types[(cfg & AC_DEFCFG_DEVICE)
>> AC_DEFCFG_DEVICE_SHIFT];
}
static void print_pin_caps(struct snd_info_buffer *buffer,
struct hda_codec *codec, hda_nid_t nid,
int *supports_vref)
{
static const char * const jack_conns[4] = {
"Jack", "N/A", "Fixed", "Both"
};
unsigned int caps, val;
caps = param_read(codec, nid, AC_PAR_PIN_CAP);
snd_iprintf(buffer, " Pincap 0x%08x:", caps);
if (caps & AC_PINCAP_IN)
snd_iprintf(buffer, " IN");
if (caps & AC_PINCAP_OUT)
snd_iprintf(buffer, " OUT");
if (caps & AC_PINCAP_HP_DRV)
snd_iprintf(buffer, " HP");
if (caps & AC_PINCAP_EAPD)
snd_iprintf(buffer, " EAPD");
if (caps & AC_PINCAP_PRES_DETECT)
snd_iprintf(buffer, " Detect");
if (caps & AC_PINCAP_BALANCE)
snd_iprintf(buffer, " Balanced");
if (caps & AC_PINCAP_HDMI) {
/* Realtek uses this bit as a different meaning */
if ((codec->core.vendor_id >> 16) == 0x10ec)
snd_iprintf(buffer, " R/L");
else {
if (caps & AC_PINCAP_HBR)
snd_iprintf(buffer, " HBR");
snd_iprintf(buffer, " HDMI");
}
}
if (caps & AC_PINCAP_DP)
snd_iprintf(buffer, " DP");
if (caps & AC_PINCAP_TRIG_REQ)
snd_iprintf(buffer, " Trigger");
if (caps & AC_PINCAP_IMP_SENSE)
snd_iprintf(buffer, " ImpSense");
snd_iprintf(buffer, "\n");
if (caps & AC_PINCAP_VREF) {
unsigned int vref =
(caps & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
snd_iprintf(buffer, " Vref caps:");
if (vref & AC_PINCAP_VREF_HIZ)
snd_iprintf(buffer, " HIZ");
if (vref & AC_PINCAP_VREF_50)
snd_iprintf(buffer, " 50");
if (vref & AC_PINCAP_VREF_GRD)
snd_iprintf(buffer, " GRD");
if (vref & AC_PINCAP_VREF_80)
snd_iprintf(buffer, " 80");
if (vref & AC_PINCAP_VREF_100)
snd_iprintf(buffer, " 100");
snd_iprintf(buffer, "\n");
*supports_vref = 1;
} else
*supports_vref = 0;
if (caps & AC_PINCAP_EAPD) {
val = snd_hda_codec_read(codec, nid, 0,
AC_VERB_GET_EAPD_BTLENABLE, 0);
snd_iprintf(buffer, " EAPD 0x%x:", val);
if (val & AC_EAPDBTL_BALANCED)
snd_iprintf(buffer, " BALANCED");
if (val & AC_EAPDBTL_EAPD)
snd_iprintf(buffer, " EAPD");
if (val & AC_EAPDBTL_LR_SWAP)
snd_iprintf(buffer, " R/L");
snd_iprintf(buffer, "\n");
}
caps = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
snd_iprintf(buffer, " Pin Default 0x%08x: [%s] %s at %s %s\n", caps,
jack_conns[(caps & AC_DEFCFG_PORT_CONN) >> AC_DEFCFG_PORT_CONN_SHIFT],
get_jack_type(caps),
get_jack_connectivity(caps),
get_jack_location(caps));
snd_iprintf(buffer, " Conn = %s, Color = %s\n",
get_jack_connection(caps),
get_jack_color(caps));
/* Default association and sequence values refer to default grouping
* of pin complexes and their sequence within the group. This is used
* for priority and resource allocation.
*/
snd_iprintf(buffer, " DefAssociation = 0x%x, Sequence = 0x%x\n",
(caps & AC_DEFCFG_DEF_ASSOC) >> AC_DEFCFG_ASSOC_SHIFT,
caps & AC_DEFCFG_SEQUENCE);
if (((caps & AC_DEFCFG_MISC) >> AC_DEFCFG_MISC_SHIFT) &
AC_DEFCFG_MISC_NO_PRESENCE) {
/* Miscellaneous bit indicates external hardware does not
* support presence detection even if the pin complex
* indicates it is supported.
*/
snd_iprintf(buffer, " Misc = NO_PRESENCE\n");
}
}
static void print_pin_ctls(struct snd_info_buffer *buffer,
struct hda_codec *codec, hda_nid_t nid,
int supports_vref)
{
unsigned int pinctls;
pinctls = snd_hda_codec_read(codec, nid, 0,
AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
snd_iprintf(buffer, " Pin-ctls: 0x%02x:", pinctls);
if (pinctls & AC_PINCTL_IN_EN)
snd_iprintf(buffer, " IN");
if (pinctls & AC_PINCTL_OUT_EN)
snd_iprintf(buffer, " OUT");
if (pinctls & AC_PINCTL_HP_EN)
snd_iprintf(buffer, " HP");
if (supports_vref) {
int vref = pinctls & AC_PINCTL_VREFEN;
switch (vref) {
case AC_PINCTL_VREF_HIZ:
snd_iprintf(buffer, " VREF_HIZ");
break;
case AC_PINCTL_VREF_50:
snd_iprintf(buffer, " VREF_50");
break;
case AC_PINCTL_VREF_GRD:
snd_iprintf(buffer, " VREF_GRD");
break;
case AC_PINCTL_VREF_80:
snd_iprintf(buffer, " VREF_80");
break;
case AC_PINCTL_VREF_100:
snd_iprintf(buffer, " VREF_100");
break;
}
}
snd_iprintf(buffer, "\n");
}
static void print_vol_knob(struct snd_info_buffer *buffer,
struct hda_codec *codec, hda_nid_t nid)
{
unsigned int cap = param_read(codec, nid, AC_PAR_VOL_KNB_CAP);
snd_iprintf(buffer, " Volume-Knob: delta=%d, steps=%d, ",
(cap >> 7) & 1, cap & 0x7f);
cap = snd_hda_codec_read(codec, nid, 0,
AC_VERB_GET_VOLUME_KNOB_CONTROL, 0);
snd_iprintf(buffer, "direct=%d, val=%d\n",
(cap >> 7) & 1, cap & 0x7f);
}
static void print_audio_io(struct snd_info_buffer *buffer,
struct hda_codec *codec, hda_nid_t nid,
unsigned int wid_type)
{
int conv = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_CONV, 0);
snd_iprintf(buffer,
" Converter: stream=%d, channel=%d\n",
(conv & AC_CONV_STREAM) >> AC_CONV_STREAM_SHIFT,
conv & AC_CONV_CHANNEL);
if (wid_type == AC_WID_AUD_IN && (conv & AC_CONV_CHANNEL) == 0) {
int sdi = snd_hda_codec_read(codec, nid, 0,
AC_VERB_GET_SDI_SELECT, 0);
snd_iprintf(buffer, " SDI-Select: %d\n",
sdi & AC_SDI_SELECT);
}
}
static void print_digital_conv(struct snd_info_buffer *buffer,
struct hda_codec *codec, hda_nid_t nid)
{
unsigned int digi1 = snd_hda_codec_read(codec, nid, 0,
AC_VERB_GET_DIGI_CONVERT_1, 0);
unsigned char digi2 = digi1 >> 8;
unsigned char digi3 = digi1 >> 16;
snd_iprintf(buffer, " Digital:");
if (digi1 & AC_DIG1_ENABLE)
snd_iprintf(buffer, " Enabled");
if (digi1 & AC_DIG1_V)
snd_iprintf(buffer, " Validity");
if (digi1 & AC_DIG1_VCFG)
snd_iprintf(buffer, " ValidityCfg");
if (digi1 & AC_DIG1_EMPHASIS)
snd_iprintf(buffer, " Preemphasis");
if (digi1 & AC_DIG1_COPYRIGHT)
snd_iprintf(buffer, " Non-Copyright");
if (digi1 & AC_DIG1_NONAUDIO)
snd_iprintf(buffer, " Non-Audio");
if (digi1 & AC_DIG1_PROFESSIONAL)
snd_iprintf(buffer, " Pro");
if (digi1 & AC_DIG1_LEVEL)
snd_iprintf(buffer, " GenLevel");
if (digi3 & AC_DIG3_KAE)
snd_iprintf(buffer, " KAE");
snd_iprintf(buffer, "\n");
snd_iprintf(buffer, " Digital category: 0x%x\n",
digi2 & AC_DIG2_CC);
snd_iprintf(buffer, " IEC Coding Type: 0x%x\n",
digi3 & AC_DIG3_ICT);
}
static const char *get_pwr_state(u32 state)
{
static const char * const buf[] = {
"D0", "D1", "D2", "D3", "D3cold"
};
if (state < ARRAY_SIZE(buf))
return buf[state];
return "UNKNOWN";
}
static void print_power_state(struct snd_info_buffer *buffer,
struct hda_codec *codec, hda_nid_t nid)
{
static const char * const names[] = {
[ilog2(AC_PWRST_D0SUP)] = "D0",
[ilog2(AC_PWRST_D1SUP)] = "D1",
[ilog2(AC_PWRST_D2SUP)] = "D2",
[ilog2(AC_PWRST_D3SUP)] = "D3",
[ilog2(AC_PWRST_D3COLDSUP)] = "D3cold",
[ilog2(AC_PWRST_S3D3COLDSUP)] = "S3D3cold",
[ilog2(AC_PWRST_CLKSTOP)] = "CLKSTOP",
[ilog2(AC_PWRST_EPSS)] = "EPSS",
};
int sup = param_read(codec, nid, AC_PAR_POWER_STATE);
int pwr = snd_hda_codec_read(codec, nid, 0,
AC_VERB_GET_POWER_STATE, 0);
if (sup != -1) {
int i;
snd_iprintf(buffer, " Power states: ");
for (i = 0; i < ARRAY_SIZE(names); i++) {
if (sup & (1U << i))
snd_iprintf(buffer, " %s", names[i]);
}
snd_iprintf(buffer, "\n");
}
snd_iprintf(buffer, " Power: setting=%s, actual=%s",
get_pwr_state(pwr & AC_PWRST_SETTING),
get_pwr_state((pwr & AC_PWRST_ACTUAL) >>
AC_PWRST_ACTUAL_SHIFT));
if (pwr & AC_PWRST_ERROR)
snd_iprintf(buffer, ", Error");
if (pwr & AC_PWRST_CLK_STOP_OK)
snd_iprintf(buffer, ", Clock-stop-OK");
if (pwr & AC_PWRST_SETTING_RESET)
snd_iprintf(buffer, ", Setting-reset");
snd_iprintf(buffer, "\n");
}
static void print_unsol_cap(struct snd_info_buffer *buffer,
struct hda_codec *codec, hda_nid_t nid)
{
int unsol = snd_hda_codec_read(codec, nid, 0,
AC_VERB_GET_UNSOLICITED_RESPONSE, 0);
snd_iprintf(buffer,
" Unsolicited: tag=%02x, enabled=%d\n",
unsol & AC_UNSOL_TAG,
(unsol & AC_UNSOL_ENABLED) ? 1 : 0);
}
static inline bool can_dump_coef(struct hda_codec *codec)
{
switch (dump_coef) {
case 0: return false;
case 1: return true;
default: return codec->dump_coef;
}
}
static void print_proc_caps(struct snd_info_buffer *buffer,
struct hda_codec *codec, hda_nid_t nid)
{
unsigned int i, ncoeff, oldindex;
unsigned int proc_caps = param_read(codec, nid, AC_PAR_PROC_CAP);
ncoeff = (proc_caps & AC_PCAP_NUM_COEF) >> AC_PCAP_NUM_COEF_SHIFT;
snd_iprintf(buffer, " Processing caps: benign=%d, ncoeff=%d\n",
proc_caps & AC_PCAP_BENIGN, ncoeff);
if (!can_dump_coef(codec))
return;
/* Note: This is racy - another process could run in parallel and change
the coef index too. */
oldindex = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_COEF_INDEX, 0);
for (i = 0; i < ncoeff; i++) {
unsigned int val;
snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_COEF_INDEX, i);
val = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PROC_COEF,
0);
snd_iprintf(buffer, " Coeff 0x%02x: 0x%04x\n", i, val);
}
snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_COEF_INDEX, oldindex);
}
static void print_conn_list(struct snd_info_buffer *buffer,
struct hda_codec *codec, hda_nid_t nid,
unsigned int wid_type, hda_nid_t *conn,
int conn_len)
{
int c, curr = -1;
const hda_nid_t *list;
int cache_len;
if (conn_len > 1 &&
wid_type != AC_WID_AUD_MIX &&
wid_type != AC_WID_VOL_KNB &&
wid_type != AC_WID_POWER)
curr = snd_hda_codec_read(codec, nid, 0,
AC_VERB_GET_CONNECT_SEL, 0);
snd_iprintf(buffer, " Connection: %d\n", conn_len);
if (conn_len > 0) {
snd_iprintf(buffer, " ");
for (c = 0; c < conn_len; c++) {
snd_iprintf(buffer, " 0x%02x", conn[c]);
if (c == curr)
snd_iprintf(buffer, "*");
}
snd_iprintf(buffer, "\n");
}
/* Get Cache connections info */
cache_len = snd_hda_get_conn_list(codec, nid, &list);
if (cache_len >= 0 && (cache_len != conn_len ||
memcmp(list, conn, conn_len) != 0)) {
snd_iprintf(buffer, " In-driver Connection: %d\n", cache_len);
if (cache_len > 0) {
snd_iprintf(buffer, " ");
for (c = 0; c < cache_len; c++)
snd_iprintf(buffer, " 0x%02x", list[c]);
snd_iprintf(buffer, "\n");
}
}
}
static void print_gpio(struct snd_info_buffer *buffer,
struct hda_codec *codec, hda_nid_t nid)
{
unsigned int gpio =
param_read(codec, codec->core.afg, AC_PAR_GPIO_CAP);
unsigned int enable, direction, wake, unsol, sticky, data;
int i, max;
snd_iprintf(buffer, "GPIO: io=%d, o=%d, i=%d, "
"unsolicited=%d, wake=%d\n",
gpio & AC_GPIO_IO_COUNT,
(gpio & AC_GPIO_O_COUNT) >> AC_GPIO_O_COUNT_SHIFT,
(gpio & AC_GPIO_I_COUNT) >> AC_GPIO_I_COUNT_SHIFT,
(gpio & AC_GPIO_UNSOLICITED) ? 1 : 0,
(gpio & AC_GPIO_WAKE) ? 1 : 0);
max = gpio & AC_GPIO_IO_COUNT;
if (!max || max > 8)
return;
enable = snd_hda_codec_read(codec, nid, 0,
AC_VERB_GET_GPIO_MASK, 0);
direction = snd_hda_codec_read(codec, nid, 0,
AC_VERB_GET_GPIO_DIRECTION, 0);
wake = snd_hda_codec_read(codec, nid, 0,
AC_VERB_GET_GPIO_WAKE_MASK, 0);
unsol = snd_hda_codec_read(codec, nid, 0,
AC_VERB_GET_GPIO_UNSOLICITED_RSP_MASK, 0);
sticky = snd_hda_codec_read(codec, nid, 0,
AC_VERB_GET_GPIO_STICKY_MASK, 0);
data = snd_hda_codec_read(codec, nid, 0,
AC_VERB_GET_GPIO_DATA, 0);
for (i = 0; i < max; ++i)
snd_iprintf(buffer,
" IO[%d]: enable=%d, dir=%d, wake=%d, "
"sticky=%d, data=%d, unsol=%d\n", i,
(enable & (1<<i)) ? 1 : 0,
(direction & (1<<i)) ? 1 : 0,
(wake & (1<<i)) ? 1 : 0,
(sticky & (1<<i)) ? 1 : 0,
(data & (1<<i)) ? 1 : 0,
(unsol & (1<<i)) ? 1 : 0);
/* FIXME: add GPO and GPI pin information */
print_nid_array(buffer, codec, nid, &codec->mixers);
print_nid_array(buffer, codec, nid, &codec->nids);
}
static void print_dpmst_connections(struct snd_info_buffer *buffer, struct hda_codec *codec,
hda_nid_t nid, int dev_num)
{
int c, conn_len, curr, dev_id_saved;
hda_nid_t *conn;
conn_len = snd_hda_get_num_raw_conns(codec, nid);
if (conn_len <= 0)
return;
conn = kmalloc_array(conn_len, sizeof(hda_nid_t), GFP_KERNEL);
if (!conn)
return;
dev_id_saved = snd_hda_get_dev_select(codec, nid);
snd_hda_set_dev_select(codec, nid, dev_num);
curr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_CONNECT_SEL, 0);
if (snd_hda_get_raw_connections(codec, nid, conn, conn_len) < 0)
goto out;
for (c = 0; c < conn_len; c++) {
snd_iprintf(buffer, " 0x%02x", conn[c]);
if (c == curr)
snd_iprintf(buffer, "*");
}
out:
kfree(conn);
snd_hda_set_dev_select(codec, nid, dev_id_saved);
}
static void print_device_list(struct snd_info_buffer *buffer,
struct hda_codec *codec, hda_nid_t nid)
{
int i, curr = -1;
u8 dev_list[AC_MAX_DEV_LIST_LEN];
int devlist_len;
devlist_len = snd_hda_get_devices(codec, nid, dev_list,
AC_MAX_DEV_LIST_LEN);
snd_iprintf(buffer, " Devices: %d\n", devlist_len);
if (devlist_len <= 0)
return;
curr = snd_hda_codec_read(codec, nid, 0,
AC_VERB_GET_DEVICE_SEL, 0);
for (i = 0; i < devlist_len; i++) {
if (i == curr)
snd_iprintf(buffer, " *");
else
snd_iprintf(buffer, " ");
snd_iprintf(buffer,
"Dev %02d: PD = %d, ELDV = %d, IA = %d, Connections [", i,
!!(dev_list[i] & AC_DE_PD),
!!(dev_list[i] & AC_DE_ELDV),
!!(dev_list[i] & AC_DE_IA));
print_dpmst_connections(buffer, codec, nid, i);
snd_iprintf(buffer, " ]\n");
}
}
static void print_codec_core_info(struct hdac_device *codec,
struct snd_info_buffer *buffer)
{
snd_iprintf(buffer, "Codec: ");
if (codec->vendor_name && codec->chip_name)
snd_iprintf(buffer, "%s %s\n",
codec->vendor_name, codec->chip_name);
else
snd_iprintf(buffer, "Not Set\n");
snd_iprintf(buffer, "Address: %d\n", codec->addr);
if (codec->afg)
snd_iprintf(buffer, "AFG Function Id: 0x%x (unsol %u)\n",
codec->afg_function_id, codec->afg_unsol);
if (codec->mfg)
snd_iprintf(buffer, "MFG Function Id: 0x%x (unsol %u)\n",
codec->mfg_function_id, codec->mfg_unsol);
snd_iprintf(buffer, "Vendor Id: 0x%08x\n", codec->vendor_id);
snd_iprintf(buffer, "Subsystem Id: 0x%08x\n", codec->subsystem_id);
snd_iprintf(buffer, "Revision Id: 0x%x\n", codec->revision_id);
if (codec->mfg)
snd_iprintf(buffer, "Modem Function Group: 0x%x\n", codec->mfg);
else
snd_iprintf(buffer, "No Modem Function Group found\n");
}
static void print_codec_info(struct snd_info_entry *entry,
struct snd_info_buffer *buffer)
{
struct hda_codec *codec = entry->private_data;
hda_nid_t nid, fg;
int i, nodes;
print_codec_core_info(&codec->core, buffer);
fg = codec->core.afg;
if (!fg)
return;
snd_hda_power_up(codec);
snd_iprintf(buffer, "Default PCM:\n");
print_pcm_caps(buffer, codec, fg);
snd_iprintf(buffer, "Default Amp-In caps: ");
print_amp_caps(buffer, codec, fg, HDA_INPUT);
snd_iprintf(buffer, "Default Amp-Out caps: ");
print_amp_caps(buffer, codec, fg, HDA_OUTPUT);
snd_iprintf(buffer, "State of AFG node 0x%02x:\n", fg);
print_power_state(buffer, codec, fg);
nodes = snd_hda_get_sub_nodes(codec, fg, &nid);
if (! nid || nodes < 0) {
snd_iprintf(buffer, "Invalid AFG subtree\n");
snd_hda_power_down(codec);
return;
}
print_gpio(buffer, codec, fg);
if (codec->proc_widget_hook)
codec->proc_widget_hook(buffer, codec, fg);
for (i = 0; i < nodes; i++, nid++) {
unsigned int wid_caps =
param_read(codec, nid, AC_PAR_AUDIO_WIDGET_CAP);
unsigned int wid_type = get_wcaps_type(wid_caps);
hda_nid_t *conn = NULL;
int conn_len = 0;
snd_iprintf(buffer, "Node 0x%02x [%s] wcaps 0x%x:", nid,
get_wid_type_name(wid_type), wid_caps);
if (wid_caps & AC_WCAP_STEREO) {
unsigned int chans = get_wcaps_channels(wid_caps);
if (chans == 2)
snd_iprintf(buffer, " Stereo");
else
snd_iprintf(buffer, " %d-Channels", chans);
} else
snd_iprintf(buffer, " Mono");
if (wid_caps & AC_WCAP_DIGITAL)
snd_iprintf(buffer, " Digital");
if (wid_caps & AC_WCAP_IN_AMP)
snd_iprintf(buffer, " Amp-In");
if (wid_caps & AC_WCAP_OUT_AMP)
snd_iprintf(buffer, " Amp-Out");
if (wid_caps & AC_WCAP_STRIPE)
snd_iprintf(buffer, " Stripe");
if (wid_caps & AC_WCAP_LR_SWAP)
snd_iprintf(buffer, " R/L");
if (wid_caps & AC_WCAP_CP_CAPS)
snd_iprintf(buffer, " CP");
snd_iprintf(buffer, "\n");
print_nid_array(buffer, codec, nid, &codec->mixers);
print_nid_array(buffer, codec, nid, &codec->nids);
print_nid_pcms(buffer, codec, nid);
/* volume knob is a special widget that always have connection
* list
*/
if (wid_type == AC_WID_VOL_KNB)
wid_caps |= AC_WCAP_CONN_LIST;
if (wid_caps & AC_WCAP_CONN_LIST) {
conn_len = snd_hda_get_num_raw_conns(codec, nid);
if (conn_len > 0) {
conn = kmalloc_array(conn_len,
sizeof(hda_nid_t),
GFP_KERNEL);
if (!conn)
return;
if (snd_hda_get_raw_connections(codec, nid, conn,
conn_len) < 0)
conn_len = 0;
}
}
if (wid_caps & AC_WCAP_IN_AMP) {
snd_iprintf(buffer, " Amp-In caps: ");
print_amp_caps(buffer, codec, nid, HDA_INPUT);
snd_iprintf(buffer, " Amp-In vals: ");
if (wid_type == AC_WID_PIN ||
(codec->single_adc_amp &&
wid_type == AC_WID_AUD_IN))
print_amp_vals(buffer, codec, nid, HDA_INPUT,
wid_caps, 1);
else
print_amp_vals(buffer, codec, nid, HDA_INPUT,
wid_caps, conn_len);
}
if (wid_caps & AC_WCAP_OUT_AMP) {
snd_iprintf(buffer, " Amp-Out caps: ");
print_amp_caps(buffer, codec, nid, HDA_OUTPUT);
snd_iprintf(buffer, " Amp-Out vals: ");
if (wid_type == AC_WID_PIN &&
codec->pin_amp_workaround)
print_amp_vals(buffer, codec, nid, HDA_OUTPUT,
wid_caps, conn_len);
else
print_amp_vals(buffer, codec, nid, HDA_OUTPUT,
wid_caps, 1);
}
switch (wid_type) {
case AC_WID_PIN: {
int supports_vref;
print_pin_caps(buffer, codec, nid, &supports_vref);
print_pin_ctls(buffer, codec, nid, supports_vref);
break;
}
case AC_WID_VOL_KNB:
print_vol_knob(buffer, codec, nid);
break;
case AC_WID_AUD_OUT:
case AC_WID_AUD_IN:
print_audio_io(buffer, codec, nid, wid_type);
if (wid_caps & AC_WCAP_DIGITAL)
print_digital_conv(buffer, codec, nid);
if (wid_caps & AC_WCAP_FORMAT_OVRD) {
snd_iprintf(buffer, " PCM:\n");
print_pcm_caps(buffer, codec, nid);
}
break;
}
if (wid_caps & AC_WCAP_UNSOL_CAP)
print_unsol_cap(buffer, codec, nid);
if (wid_caps & AC_WCAP_POWER)
print_power_state(buffer, codec, nid);
if (wid_caps & AC_WCAP_DELAY)
snd_iprintf(buffer, " Delay: %d samples\n",
(wid_caps & AC_WCAP_DELAY) >>
AC_WCAP_DELAY_SHIFT);
if (wid_type == AC_WID_PIN && codec->dp_mst)
print_device_list(buffer, codec, nid);
if (wid_caps & AC_WCAP_CONN_LIST)
print_conn_list(buffer, codec, nid, wid_type,
conn, conn_len);
if (wid_caps & AC_WCAP_PROC_WID)
print_proc_caps(buffer, codec, nid);
if (codec->proc_widget_hook)
codec->proc_widget_hook(buffer, codec, nid);
kfree(conn);
}
snd_hda_power_down(codec);
}
/*
* create a proc read
*/
int snd_hda_codec_proc_new(struct hda_codec *codec)
{
char name[32];
snprintf(name, sizeof(name), "codec#%d", codec->core.addr);
return snd_card_ro_proc_new(codec->card, name, codec, print_codec_info);
}
| linux-master | sound/pci/hda/hda_proc.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* patch_cs8409-tables.c -- HD audio interface patch for Cirrus Logic CS8409 HDA bridge chip
*
* Copyright (C) 2021 Cirrus Logic, Inc. and
* Cirrus Logic International Semiconductor Ltd.
*
* Author: Lucas Tanure <[email protected]>
*/
#include "patch_cs8409.h"
/******************************************************************************
* CS42L42 Specific Data
*
******************************************************************************/
static const DECLARE_TLV_DB_SCALE(cs42l42_dac_db_scale, CS42L42_HP_VOL_REAL_MIN * 100, 100, 1);
static const DECLARE_TLV_DB_SCALE(cs42l42_adc_db_scale, CS42L42_AMIC_VOL_REAL_MIN * 100, 100, 1);
const struct snd_kcontrol_new cs42l42_dac_volume_mixer = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.index = 0,
.subdevice = (HDA_SUBDEV_AMP_FLAG | HDA_SUBDEV_NID_FLAG),
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.info = cs42l42_volume_info,
.get = cs42l42_volume_get,
.put = cs42l42_volume_put,
.tlv = { .p = cs42l42_dac_db_scale },
.private_value = HDA_COMPOSE_AMP_VAL_OFS(CS8409_PIN_ASP1_TRANSMITTER_A, 3, CS8409_CODEC0,
HDA_OUTPUT, CS42L42_VOL_DAC) | HDA_AMP_VAL_MIN_MUTE
};
const struct snd_kcontrol_new cs42l42_adc_volume_mixer = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.index = 0,
.subdevice = (HDA_SUBDEV_AMP_FLAG | HDA_SUBDEV_NID_FLAG),
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.info = cs42l42_volume_info,
.get = cs42l42_volume_get,
.put = cs42l42_volume_put,
.tlv = { .p = cs42l42_adc_db_scale },
.private_value = HDA_COMPOSE_AMP_VAL_OFS(CS8409_PIN_ASP1_RECEIVER_A, 1, CS8409_CODEC0,
HDA_INPUT, CS42L42_VOL_ADC) | HDA_AMP_VAL_MIN_MUTE
};
const struct hda_pcm_stream cs42l42_48k_pcm_analog_playback = {
.rates = SNDRV_PCM_RATE_48000, /* fixed rate */
};
const struct hda_pcm_stream cs42l42_48k_pcm_analog_capture = {
.rates = SNDRV_PCM_RATE_48000, /* fixed rate */
};
/******************************************************************************
* BULLSEYE / WARLOCK / CYBORG Specific Arrays
* CS8409/CS42L42
******************************************************************************/
const struct hda_verb cs8409_cs42l42_init_verbs[] = {
{ CS8409_PIN_AFG, AC_VERB_SET_GPIO_WAKE_MASK, 0x0018 }, /* WAKE from GPIO 3,4 */
{ CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_PROC_STATE, 0x0001 }, /* Enable VPW processing */
{ CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_COEF_INDEX, 0x0002 }, /* Configure GPIO 6,7 */
{ CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_PROC_COEF, 0x0080 }, /* I2C mode */
{ CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_COEF_INDEX, 0x005b }, /* Set I2C bus speed */
{ CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_PROC_COEF, 0x0200 }, /* 100kHz I2C_STO = 2 */
{} /* terminator */
};
static const struct hda_pintbl cs8409_cs42l42_pincfgs[] = {
{ CS8409_PIN_ASP1_TRANSMITTER_A, 0x042120f0 }, /* ASP-1-TX */
{ CS8409_PIN_ASP1_RECEIVER_A, 0x04a12050 }, /* ASP-1-RX */
{ CS8409_PIN_ASP2_TRANSMITTER_A, 0x901000f0 }, /* ASP-2-TX */
{ CS8409_PIN_DMIC1_IN, 0x90a00090 }, /* DMIC-1 */
{} /* terminator */
};
static const struct hda_pintbl cs8409_cs42l42_pincfgs_no_dmic[] = {
{ CS8409_PIN_ASP1_TRANSMITTER_A, 0x042120f0 }, /* ASP-1-TX */
{ CS8409_PIN_ASP1_RECEIVER_A, 0x04a12050 }, /* ASP-1-RX */
{ CS8409_PIN_ASP2_TRANSMITTER_A, 0x901000f0 }, /* ASP-2-TX */
{} /* terminator */
};
/* Vendor specific HW configuration for CS42L42 */
static const struct cs8409_i2c_param cs42l42_init_reg_seq[] = {
{ CS42L42_I2C_TIMEOUT, 0xB0 },
{ CS42L42_ADC_CTL, 0x00 },
{ 0x1D02, 0x06 },
{ CS42L42_ADC_VOLUME, 0x9F },
{ CS42L42_OSC_SWITCH, 0x01 },
{ CS42L42_MCLK_CTL, 0x02 },
{ CS42L42_SRC_CTL, 0x03 },
{ CS42L42_MCLK_SRC_SEL, 0x00 },
{ CS42L42_ASP_FRM_CFG, 0x13 },
{ CS42L42_FSYNC_P_LOWER, 0xFF },
{ CS42L42_FSYNC_P_UPPER, 0x00 },
{ CS42L42_ASP_CLK_CFG, 0x20 },
{ CS42L42_SPDIF_CLK_CFG, 0x0D },
{ CS42L42_ASP_RX_DAI0_CH1_AP_RES, 0x02 },
{ CS42L42_ASP_RX_DAI0_CH1_BIT_MSB, 0x00 },
{ CS42L42_ASP_RX_DAI0_CH1_BIT_LSB, 0x00 },
{ CS42L42_ASP_RX_DAI0_CH2_AP_RES, 0x02 },
{ CS42L42_ASP_RX_DAI0_CH2_BIT_MSB, 0x00 },
{ CS42L42_ASP_RX_DAI0_CH2_BIT_LSB, 0x20 },
{ CS42L42_ASP_RX_DAI0_CH3_AP_RES, 0x02 },
{ CS42L42_ASP_RX_DAI0_CH3_BIT_MSB, 0x00 },
{ CS42L42_ASP_RX_DAI0_CH3_BIT_LSB, 0x80 },
{ CS42L42_ASP_RX_DAI0_CH4_AP_RES, 0x02 },
{ CS42L42_ASP_RX_DAI0_CH4_BIT_MSB, 0x00 },
{ CS42L42_ASP_RX_DAI0_CH4_BIT_LSB, 0xA0 },
{ CS42L42_ASP_RX_DAI0_EN, 0x0C },
{ CS42L42_ASP_TX_CH_EN, 0x01 },
{ CS42L42_ASP_TX_CH_AP_RES, 0x02 },
{ CS42L42_ASP_TX_CH1_BIT_MSB, 0x00 },
{ CS42L42_ASP_TX_CH1_BIT_LSB, 0x00 },
{ CS42L42_ASP_TX_SZ_EN, 0x01 },
{ CS42L42_PWR_CTL1, 0x0A },
{ CS42L42_PWR_CTL2, 0x84 },
{ CS42L42_MIXER_CHA_VOL, 0x3F },
{ CS42L42_MIXER_CHB_VOL, 0x3F },
{ CS42L42_MIXER_ADC_VOL, 0x3f },
{ CS42L42_HP_CTL, 0x03 },
{ CS42L42_MIC_DET_CTL1, 0xB6 },
{ CS42L42_TIPSENSE_CTL, 0xC2 },
{ CS42L42_HS_CLAMP_DISABLE, 0x01 },
{ CS42L42_HS_SWITCH_CTL, 0xF3 },
{ CS42L42_PWR_CTL3, 0x20 },
{ CS42L42_RSENSE_CTL2, 0x00 },
{ CS42L42_RSENSE_CTL3, 0x00 },
{ CS42L42_TSENSE_CTL, 0x80 },
{ CS42L42_HS_BIAS_CTL, 0xC0 },
{ CS42L42_PWR_CTL1, 0x02 },
{ CS42L42_ADC_OVFL_INT_MASK, 0xff },
{ CS42L42_MIXER_INT_MASK, 0xff },
{ CS42L42_SRC_INT_MASK, 0xff },
{ CS42L42_ASP_RX_INT_MASK, 0xff },
{ CS42L42_ASP_TX_INT_MASK, 0xff },
{ CS42L42_CODEC_INT_MASK, 0xff },
{ CS42L42_SRCPL_INT_MASK, 0xff },
{ CS42L42_VPMON_INT_MASK, 0xff },
{ CS42L42_PLL_LOCK_INT_MASK, 0xff },
{ CS42L42_TSRS_PLUG_INT_MASK, 0xff },
{ CS42L42_DET_INT1_MASK, 0xff },
{ CS42L42_DET_INT2_MASK, 0xff },
};
/* Vendor specific hw configuration for CS8409 */
const struct cs8409_cir_param cs8409_cs42l42_hw_cfg[] = {
/* +PLL1/2_EN, +I2C_EN */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_DEV_CFG1, 0xb008 },
/* ASP1/2_EN=0, ASP1_STP=1 */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_DEV_CFG2, 0x0002 },
/* ASP1/2_BUS_IDLE=10, +GPIO_I2C */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_DEV_CFG3, 0x0a80 },
/* ASP1.A: TX.LAP=0, TX.LSZ=24 bits, TX.LCS=0 */
{ CS8409_PIN_VENDOR_WIDGET, ASP1_A_TX_CTRL1, 0x0800 },
/* ASP1.A: TX.RAP=0, TX.RSZ=24 bits, TX.RCS=32 */
{ CS8409_PIN_VENDOR_WIDGET, ASP1_A_TX_CTRL2, 0x0820 },
/* ASP2.A: TX.LAP=0, TX.LSZ=24 bits, TX.LCS=0 */
{ CS8409_PIN_VENDOR_WIDGET, ASP2_A_TX_CTRL1, 0x0800 },
/* ASP2.A: TX.RAP=1, TX.RSZ=24 bits, TX.RCS=0 */
{ CS8409_PIN_VENDOR_WIDGET, ASP2_A_TX_CTRL2, 0x2800 },
/* ASP1.A: RX.LAP=0, RX.LSZ=24 bits, RX.LCS=0 */
{ CS8409_PIN_VENDOR_WIDGET, ASP1_A_RX_CTRL1, 0x0800 },
/* ASP1.A: RX.RAP=0, RX.RSZ=24 bits, RX.RCS=0 */
{ CS8409_PIN_VENDOR_WIDGET, ASP1_A_RX_CTRL2, 0x0800 },
/* ASP1: LCHI = 00h */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_ASP1_CLK_CTRL1, 0x8000 },
/* ASP1: MC/SC_SRCSEL=PLL1, LCPR=FFh */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_ASP1_CLK_CTRL2, 0x28ff },
/* ASP1: MCEN=0, FSD=011, SCPOL_IN/OUT=0, SCDIV=1:4 */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_ASP1_CLK_CTRL3, 0x0062 },
/* ASP2: LCHI=1Fh */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_ASP2_CLK_CTRL1, 0x801f },
/* ASP2: MC/SC_SRCSEL=PLL1, LCPR=3Fh */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_ASP2_CLK_CTRL2, 0x283f },
/* ASP2: 5050=1, MCEN=0, FSD=010, SCPOL_IN/OUT=1, SCDIV=1:16 */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_ASP2_CLK_CTRL3, 0x805c },
/* DMIC1_MO=10b, DMIC1/2_SR=1 */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_DMIC_CFG, 0x0023 },
/* ASP1/2_BEEP=0 */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_BEEP_CFG, 0x0000 },
/* ASP1/2_EN=1, ASP1_STP=1 */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_DEV_CFG2, 0x0062 },
/* -PLL2_EN */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_DEV_CFG1, 0x9008 },
/* TX2.A: pre-scale att.=0 dB */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_PRE_SCALE_ATTN2, 0x0000 },
/* ASP1/2_xxx_EN=1, ASP1/2_MCLK_EN=0, DMIC1_SCL_EN=1 */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_PAD_CFG_SLW_RATE_CTRL, 0xfc03 },
/* test mode on */
{ CS8409_PIN_VENDOR_WIDGET, 0xc0, 0x9999 },
/* GPIO hysteresis = 30 us */
{ CS8409_PIN_VENDOR_WIDGET, 0xc5, 0x0000 },
/* test mode off */
{ CS8409_PIN_VENDOR_WIDGET, 0xc0, 0x0000 },
{} /* Terminator */
};
const struct cs8409_cir_param cs8409_cs42l42_bullseye_atn[] = {
/* EQ_SEL=1, EQ1/2_EN=0 */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_CTRL1, 0x4000 },
/* +EQ_ACC */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0x4000 },
/* +EQ2_EN */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_CTRL1, 0x4010 },
/* EQ_DATA_HI=0x0647 */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W1, 0x0647 },
/* +EQ_WRT, +EQ_ACC, EQ_ADR=0, EQ_DATA_LO=0x67 */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0xc0c7 },
/* EQ_DATA_HI=0x0647 */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W1, 0x0647 },
/* +EQ_WRT, +EQ_ACC, EQ_ADR=1, EQ_DATA_LO=0x67 */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0xc1c7 },
/* EQ_DATA_HI=0xf370 */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W1, 0xf370 },
/* +EQ_WRT, +EQ_ACC, EQ_ADR=2, EQ_DATA_LO=0x71 */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0xc271 },
/* EQ_DATA_HI=0x1ef8 */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W1, 0x1ef8 },
/* +EQ_WRT, +EQ_ACC, EQ_ADR=3, EQ_DATA_LO=0x48 */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0xc348 },
/* EQ_DATA_HI=0xc110 */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W1, 0xc110 },
/* +EQ_WRT, +EQ_ACC, EQ_ADR=4, EQ_DATA_LO=0x5a */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0xc45a },
/* EQ_DATA_HI=0x1f29 */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W1, 0x1f29 },
/* +EQ_WRT, +EQ_ACC, EQ_ADR=5, EQ_DATA_LO=0x74 */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0xc574 },
/* EQ_DATA_HI=0x1d7a */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W1, 0x1d7a },
/* +EQ_WRT, +EQ_ACC, EQ_ADR=6, EQ_DATA_LO=0x53 */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0xc653 },
/* EQ_DATA_HI=0xc38c */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W1, 0xc38c },
/* +EQ_WRT, +EQ_ACC, EQ_ADR=7, EQ_DATA_LO=0x14 */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0xc714 },
/* EQ_DATA_HI=0x1ca3 */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W1, 0x1ca3 },
/* +EQ_WRT, +EQ_ACC, EQ_ADR=8, EQ_DATA_LO=0xc7 */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0xc8c7 },
/* EQ_DATA_HI=0xc38c */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W1, 0xc38c },
/* +EQ_WRT, +EQ_ACC, EQ_ADR=9, EQ_DATA_LO=0x14 */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0xc914 },
/* -EQ_ACC, -EQ_WRT */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0x0000 },
{} /* Terminator */
};
struct sub_codec cs8409_cs42l42_codec = {
.addr = CS42L42_I2C_ADDR,
.reset_gpio = CS8409_CS42L42_RESET,
.irq_mask = CS8409_CS42L42_INT,
.init_seq = cs42l42_init_reg_seq,
.init_seq_num = ARRAY_SIZE(cs42l42_init_reg_seq),
.hp_jack_in = 0,
.mic_jack_in = 0,
.paged = 1,
.suspended = 1,
.no_type_dect = 0,
};
/******************************************************************************
* Dolphin Specific Arrays
* CS8409/ 2 X CS42L42
******************************************************************************/
const struct hda_verb dolphin_init_verbs[] = {
{ 0x01, AC_VERB_SET_GPIO_WAKE_MASK, DOLPHIN_WAKE }, /* WAKE from GPIO 0,4 */
{ CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_PROC_STATE, 0x0001 }, /* Enable VPW processing */
{ CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_COEF_INDEX, 0x0002 }, /* Configure GPIO 6,7 */
{ CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_PROC_COEF, 0x0080 }, /* I2C mode */
{ CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_COEF_INDEX, 0x005b }, /* Set I2C bus speed */
{ CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_PROC_COEF, 0x0200 }, /* 100kHz I2C_STO = 2 */
{} /* terminator */
};
static const struct hda_pintbl dolphin_pincfgs[] = {
{ 0x24, 0x022210f0 }, /* ASP-1-TX-A */
{ 0x25, 0x010240f0 }, /* ASP-1-TX-B */
{ 0x34, 0x02a21050 }, /* ASP-1-RX */
{} /* terminator */
};
/* Vendor specific HW configuration for CS42L42 */
static const struct cs8409_i2c_param dolphin_c0_init_reg_seq[] = {
{ CS42L42_I2C_TIMEOUT, 0xB0 },
{ CS42L42_ADC_CTL, 0x00 },
{ 0x1D02, 0x06 },
{ CS42L42_ADC_VOLUME, 0x9F },
{ CS42L42_OSC_SWITCH, 0x01 },
{ CS42L42_MCLK_CTL, 0x02 },
{ CS42L42_SRC_CTL, 0x03 },
{ CS42L42_MCLK_SRC_SEL, 0x00 },
{ CS42L42_ASP_FRM_CFG, 0x13 },
{ CS42L42_FSYNC_P_LOWER, 0xFF },
{ CS42L42_FSYNC_P_UPPER, 0x00 },
{ CS42L42_ASP_CLK_CFG, 0x20 },
{ CS42L42_SPDIF_CLK_CFG, 0x0D },
{ CS42L42_ASP_RX_DAI0_CH1_AP_RES, 0x02 },
{ CS42L42_ASP_RX_DAI0_CH1_BIT_MSB, 0x00 },
{ CS42L42_ASP_RX_DAI0_CH1_BIT_LSB, 0x00 },
{ CS42L42_ASP_RX_DAI0_CH2_AP_RES, 0x02 },
{ CS42L42_ASP_RX_DAI0_CH2_BIT_MSB, 0x00 },
{ CS42L42_ASP_RX_DAI0_CH2_BIT_LSB, 0x20 },
{ CS42L42_ASP_RX_DAI0_EN, 0x0C },
{ CS42L42_ASP_TX_CH_EN, 0x01 },
{ CS42L42_ASP_TX_CH_AP_RES, 0x02 },
{ CS42L42_ASP_TX_CH1_BIT_MSB, 0x00 },
{ CS42L42_ASP_TX_CH1_BIT_LSB, 0x00 },
{ CS42L42_ASP_TX_SZ_EN, 0x01 },
{ CS42L42_PWR_CTL1, 0x0A },
{ CS42L42_PWR_CTL2, 0x84 },
{ CS42L42_HP_CTL, 0x03 },
{ CS42L42_MIXER_CHA_VOL, 0x3F },
{ CS42L42_MIXER_CHB_VOL, 0x3F },
{ CS42L42_MIXER_ADC_VOL, 0x3f },
{ CS42L42_MIC_DET_CTL1, 0xB6 },
{ CS42L42_TIPSENSE_CTL, 0xC2 },
{ CS42L42_HS_CLAMP_DISABLE, 0x01 },
{ CS42L42_HS_SWITCH_CTL, 0xF3 },
{ CS42L42_PWR_CTL3, 0x20 },
{ CS42L42_RSENSE_CTL2, 0x00 },
{ CS42L42_RSENSE_CTL3, 0x00 },
{ CS42L42_TSENSE_CTL, 0x80 },
{ CS42L42_HS_BIAS_CTL, 0xC0 },
{ CS42L42_PWR_CTL1, 0x02 },
{ CS42L42_ADC_OVFL_INT_MASK, 0xff },
{ CS42L42_MIXER_INT_MASK, 0xff },
{ CS42L42_SRC_INT_MASK, 0xff },
{ CS42L42_ASP_RX_INT_MASK, 0xff },
{ CS42L42_ASP_TX_INT_MASK, 0xff },
{ CS42L42_CODEC_INT_MASK, 0xff },
{ CS42L42_SRCPL_INT_MASK, 0xff },
{ CS42L42_VPMON_INT_MASK, 0xff },
{ CS42L42_PLL_LOCK_INT_MASK, 0xff },
{ CS42L42_TSRS_PLUG_INT_MASK, 0xff },
{ CS42L42_DET_INT1_MASK, 0xff },
{ CS42L42_DET_INT2_MASK, 0xff }
};
static const struct cs8409_i2c_param dolphin_c1_init_reg_seq[] = {
{ CS42L42_I2C_TIMEOUT, 0xB0 },
{ CS42L42_ADC_CTL, 0x00 },
{ 0x1D02, 0x06 },
{ CS42L42_ADC_VOLUME, 0x9F },
{ CS42L42_OSC_SWITCH, 0x01 },
{ CS42L42_MCLK_CTL, 0x02 },
{ CS42L42_SRC_CTL, 0x03 },
{ CS42L42_MCLK_SRC_SEL, 0x00 },
{ CS42L42_ASP_FRM_CFG, 0x13 },
{ CS42L42_FSYNC_P_LOWER, 0xFF },
{ CS42L42_FSYNC_P_UPPER, 0x00 },
{ CS42L42_ASP_CLK_CFG, 0x20 },
{ CS42L42_SPDIF_CLK_CFG, 0x0D },
{ CS42L42_ASP_RX_DAI0_CH1_AP_RES, 0x02 },
{ CS42L42_ASP_RX_DAI0_CH1_BIT_MSB, 0x00 },
{ CS42L42_ASP_RX_DAI0_CH1_BIT_LSB, 0x80 },
{ CS42L42_ASP_RX_DAI0_CH2_AP_RES, 0x02 },
{ CS42L42_ASP_RX_DAI0_CH2_BIT_MSB, 0x00 },
{ CS42L42_ASP_RX_DAI0_CH2_BIT_LSB, 0xA0 },
{ CS42L42_ASP_RX_DAI0_EN, 0x0C },
{ CS42L42_ASP_TX_CH_EN, 0x00 },
{ CS42L42_ASP_TX_CH_AP_RES, 0x02 },
{ CS42L42_ASP_TX_CH1_BIT_MSB, 0x00 },
{ CS42L42_ASP_TX_CH1_BIT_LSB, 0x00 },
{ CS42L42_ASP_TX_SZ_EN, 0x00 },
{ CS42L42_PWR_CTL1, 0x0E },
{ CS42L42_PWR_CTL2, 0x84 },
{ CS42L42_HP_CTL, 0x01 },
{ CS42L42_MIXER_CHA_VOL, 0x3F },
{ CS42L42_MIXER_CHB_VOL, 0x3F },
{ CS42L42_MIXER_ADC_VOL, 0x3f },
{ CS42L42_MIC_DET_CTL1, 0xB6 },
{ CS42L42_TIPSENSE_CTL, 0xC2 },
{ CS42L42_HS_CLAMP_DISABLE, 0x01 },
{ CS42L42_HS_SWITCH_CTL, 0xF3 },
{ CS42L42_PWR_CTL3, 0x20 },
{ CS42L42_RSENSE_CTL2, 0x00 },
{ CS42L42_RSENSE_CTL3, 0x00 },
{ CS42L42_TSENSE_CTL, 0x80 },
{ CS42L42_HS_BIAS_CTL, 0xC0 },
{ CS42L42_PWR_CTL1, 0x06 },
{ CS42L42_ADC_OVFL_INT_MASK, 0xff },
{ CS42L42_MIXER_INT_MASK, 0xff },
{ CS42L42_SRC_INT_MASK, 0xff },
{ CS42L42_ASP_RX_INT_MASK, 0xff },
{ CS42L42_ASP_TX_INT_MASK, 0xff },
{ CS42L42_CODEC_INT_MASK, 0xff },
{ CS42L42_SRCPL_INT_MASK, 0xff },
{ CS42L42_VPMON_INT_MASK, 0xff },
{ CS42L42_PLL_LOCK_INT_MASK, 0xff },
{ CS42L42_TSRS_PLUG_INT_MASK, 0xff },
{ CS42L42_DET_INT1_MASK, 0xff },
{ CS42L42_DET_INT2_MASK, 0xff }
};
/* Vendor specific hw configuration for CS8409 */
const struct cs8409_cir_param dolphin_hw_cfg[] = {
/* +PLL1/2_EN, +I2C_EN */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_DEV_CFG1, 0xb008 },
/* ASP1_EN=0, ASP1_STP=1 */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_DEV_CFG2, 0x0002 },
/* ASP1/2_BUS_IDLE=10, +GPIO_I2C */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_DEV_CFG3, 0x0a80 },
/* ASP1.A: TX.LAP=0, TX.LSZ=24 bits, TX.LCS=0 */
{ CS8409_PIN_VENDOR_WIDGET, ASP1_A_TX_CTRL1, 0x0800 },
/* ASP1.A: TX.RAP=0, TX.RSZ=24 bits, TX.RCS=32 */
{ CS8409_PIN_VENDOR_WIDGET, ASP1_A_TX_CTRL2, 0x0820 },
/* ASP1.B: TX.LAP=0, TX.LSZ=24 bits, TX.LCS=128 */
{ CS8409_PIN_VENDOR_WIDGET, ASP1_B_TX_CTRL1, 0x0880 },
/* ASP1.B: TX.RAP=0, TX.RSZ=24 bits, TX.RCS=160 */
{ CS8409_PIN_VENDOR_WIDGET, ASP1_B_TX_CTRL2, 0x08a0 },
/* ASP1.A: RX.LAP=0, RX.LSZ=24 bits, RX.LCS=0 */
{ CS8409_PIN_VENDOR_WIDGET, ASP1_A_RX_CTRL1, 0x0800 },
/* ASP1.A: RX.RAP=0, RX.RSZ=24 bits, RX.RCS=0 */
{ CS8409_PIN_VENDOR_WIDGET, ASP1_A_RX_CTRL2, 0x0800 },
/* ASP1: LCHI = 00h */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_ASP1_CLK_CTRL1, 0x8000 },
/* ASP1: MC/SC_SRCSEL=PLL1, LCPR=FFh */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_ASP1_CLK_CTRL2, 0x28ff },
/* ASP1: MCEN=0, FSD=011, SCPOL_IN/OUT=0, SCDIV=1:4 */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_ASP1_CLK_CTRL3, 0x0062 },
/* ASP1/2_BEEP=0 */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_BEEP_CFG, 0x0000 },
/* ASP1_EN=1, ASP1_STP=1 */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_DEV_CFG2, 0x0022 },
/* -PLL2_EN */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_DEV_CFG1, 0x9008 },
/* ASP1_xxx_EN=1, ASP1_MCLK_EN=0 */
{ CS8409_PIN_VENDOR_WIDGET, CS8409_PAD_CFG_SLW_RATE_CTRL, 0x5400 },
/* test mode on */
{ CS8409_PIN_VENDOR_WIDGET, 0xc0, 0x9999 },
/* GPIO hysteresis = 30 us */
{ CS8409_PIN_VENDOR_WIDGET, 0xc5, 0x0000 },
/* test mode off */
{ CS8409_PIN_VENDOR_WIDGET, 0xc0, 0x0000 },
{} /* Terminator */
};
struct sub_codec dolphin_cs42l42_0 = {
.addr = DOLPHIN_C0_I2C_ADDR,
.reset_gpio = DOLPHIN_C0_RESET,
.irq_mask = DOLPHIN_C0_INT,
.init_seq = dolphin_c0_init_reg_seq,
.init_seq_num = ARRAY_SIZE(dolphin_c0_init_reg_seq),
.hp_jack_in = 0,
.mic_jack_in = 0,
.paged = 1,
.suspended = 1,
.no_type_dect = 0,
};
struct sub_codec dolphin_cs42l42_1 = {
.addr = DOLPHIN_C1_I2C_ADDR,
.reset_gpio = DOLPHIN_C1_RESET,
.irq_mask = DOLPHIN_C1_INT,
.init_seq = dolphin_c1_init_reg_seq,
.init_seq_num = ARRAY_SIZE(dolphin_c1_init_reg_seq),
.hp_jack_in = 0,
.mic_jack_in = 0,
.paged = 1,
.suspended = 1,
.no_type_dect = 1,
};
/******************************************************************************
* CS8409 Patch Driver Structs
* Arrays Used for all projects using CS8409
******************************************************************************/
const struct snd_pci_quirk cs8409_fixup_tbl[] = {
SND_PCI_QUIRK(0x1028, 0x0A11, "Bullseye", CS8409_BULLSEYE),
SND_PCI_QUIRK(0x1028, 0x0A12, "Bullseye", CS8409_BULLSEYE),
SND_PCI_QUIRK(0x1028, 0x0A23, "Bullseye", CS8409_BULLSEYE),
SND_PCI_QUIRK(0x1028, 0x0A24, "Bullseye", CS8409_BULLSEYE),
SND_PCI_QUIRK(0x1028, 0x0A25, "Bullseye", CS8409_BULLSEYE),
SND_PCI_QUIRK(0x1028, 0x0A29, "Bullseye", CS8409_BULLSEYE),
SND_PCI_QUIRK(0x1028, 0x0A2A, "Bullseye", CS8409_BULLSEYE),
SND_PCI_QUIRK(0x1028, 0x0A2B, "Bullseye", CS8409_BULLSEYE),
SND_PCI_QUIRK(0x1028, 0x0A77, "Cyborg", CS8409_CYBORG),
SND_PCI_QUIRK(0x1028, 0x0A78, "Cyborg", CS8409_CYBORG),
SND_PCI_QUIRK(0x1028, 0x0A79, "Cyborg", CS8409_CYBORG),
SND_PCI_QUIRK(0x1028, 0x0A7A, "Cyborg", CS8409_CYBORG),
SND_PCI_QUIRK(0x1028, 0x0A7D, "Cyborg", CS8409_CYBORG),
SND_PCI_QUIRK(0x1028, 0x0A7E, "Cyborg", CS8409_CYBORG),
SND_PCI_QUIRK(0x1028, 0x0A7F, "Cyborg", CS8409_CYBORG),
SND_PCI_QUIRK(0x1028, 0x0A80, "Cyborg", CS8409_CYBORG),
SND_PCI_QUIRK(0x1028, 0x0AB0, "Warlock", CS8409_WARLOCK),
SND_PCI_QUIRK(0x1028, 0x0AB2, "Warlock", CS8409_WARLOCK),
SND_PCI_QUIRK(0x1028, 0x0AB1, "Warlock", CS8409_WARLOCK),
SND_PCI_QUIRK(0x1028, 0x0AB3, "Warlock", CS8409_WARLOCK),
SND_PCI_QUIRK(0x1028, 0x0AB4, "Warlock", CS8409_WARLOCK),
SND_PCI_QUIRK(0x1028, 0x0AB5, "Warlock", CS8409_WARLOCK),
SND_PCI_QUIRK(0x1028, 0x0ACF, "Dolphin", CS8409_DOLPHIN),
SND_PCI_QUIRK(0x1028, 0x0AD0, "Dolphin", CS8409_DOLPHIN),
SND_PCI_QUIRK(0x1028, 0x0AD1, "Dolphin", CS8409_DOLPHIN),
SND_PCI_QUIRK(0x1028, 0x0AD2, "Dolphin", CS8409_DOLPHIN),
SND_PCI_QUIRK(0x1028, 0x0AD3, "Dolphin", CS8409_DOLPHIN),
SND_PCI_QUIRK(0x1028, 0x0AD9, "Warlock", CS8409_WARLOCK),
SND_PCI_QUIRK(0x1028, 0x0ADA, "Warlock", CS8409_WARLOCK),
SND_PCI_QUIRK(0x1028, 0x0ADB, "Warlock", CS8409_WARLOCK),
SND_PCI_QUIRK(0x1028, 0x0ADC, "Warlock", CS8409_WARLOCK),
SND_PCI_QUIRK(0x1028, 0x0ADF, "Cyborg", CS8409_CYBORG),
SND_PCI_QUIRK(0x1028, 0x0AE0, "Cyborg", CS8409_CYBORG),
SND_PCI_QUIRK(0x1028, 0x0AE1, "Cyborg", CS8409_CYBORG),
SND_PCI_QUIRK(0x1028, 0x0AE2, "Cyborg", CS8409_CYBORG),
SND_PCI_QUIRK(0x1028, 0x0AE9, "Cyborg", CS8409_CYBORG),
SND_PCI_QUIRK(0x1028, 0x0AEA, "Cyborg", CS8409_CYBORG),
SND_PCI_QUIRK(0x1028, 0x0AEB, "Cyborg", CS8409_CYBORG),
SND_PCI_QUIRK(0x1028, 0x0AEC, "Cyborg", CS8409_CYBORG),
SND_PCI_QUIRK(0x1028, 0x0AED, "Cyborg", CS8409_CYBORG),
SND_PCI_QUIRK(0x1028, 0x0AEE, "Cyborg", CS8409_CYBORG),
SND_PCI_QUIRK(0x1028, 0x0AEF, "Cyborg", CS8409_CYBORG),
SND_PCI_QUIRK(0x1028, 0x0AF0, "Cyborg", CS8409_CYBORG),
SND_PCI_QUIRK(0x1028, 0x0AF4, "Warlock", CS8409_WARLOCK),
SND_PCI_QUIRK(0x1028, 0x0AF5, "Warlock", CS8409_WARLOCK),
SND_PCI_QUIRK(0x1028, 0x0B92, "Warlock MLK", CS8409_WARLOCK_MLK),
SND_PCI_QUIRK(0x1028, 0x0B93, "Warlock MLK Dual Mic", CS8409_WARLOCK_MLK_DUAL_MIC),
SND_PCI_QUIRK(0x1028, 0x0B94, "Warlock MLK", CS8409_WARLOCK_MLK),
SND_PCI_QUIRK(0x1028, 0x0B95, "Warlock MLK Dual Mic", CS8409_WARLOCK_MLK_DUAL_MIC),
SND_PCI_QUIRK(0x1028, 0x0B96, "Warlock MLK", CS8409_WARLOCK_MLK),
SND_PCI_QUIRK(0x1028, 0x0B97, "Warlock MLK Dual Mic", CS8409_WARLOCK_MLK_DUAL_MIC),
SND_PCI_QUIRK(0x1028, 0x0BA5, "Odin", CS8409_ODIN),
SND_PCI_QUIRK(0x1028, 0x0BA6, "Odin", CS8409_ODIN),
SND_PCI_QUIRK(0x1028, 0x0BA8, "Odin", CS8409_ODIN),
SND_PCI_QUIRK(0x1028, 0x0BAA, "Odin", CS8409_ODIN),
SND_PCI_QUIRK(0x1028, 0x0BAE, "Odin", CS8409_ODIN),
SND_PCI_QUIRK(0x1028, 0x0BB2, "Warlock MLK", CS8409_WARLOCK_MLK),
SND_PCI_QUIRK(0x1028, 0x0BB3, "Warlock MLK", CS8409_WARLOCK_MLK),
SND_PCI_QUIRK(0x1028, 0x0BB4, "Warlock MLK", CS8409_WARLOCK_MLK),
SND_PCI_QUIRK(0x1028, 0x0BB5, "Warlock N3 15 TGL-U Nuvoton EC", CS8409_WARLOCK),
SND_PCI_QUIRK(0x1028, 0x0BB6, "Warlock V3 15 TGL-U Nuvoton EC", CS8409_WARLOCK),
SND_PCI_QUIRK(0x1028, 0x0BB8, "Warlock MLK", CS8409_WARLOCK_MLK),
SND_PCI_QUIRK(0x1028, 0x0BB9, "Warlock MLK Dual Mic", CS8409_WARLOCK_MLK_DUAL_MIC),
SND_PCI_QUIRK(0x1028, 0x0BBA, "Warlock MLK", CS8409_WARLOCK_MLK),
SND_PCI_QUIRK(0x1028, 0x0BBB, "Warlock MLK Dual Mic", CS8409_WARLOCK_MLK_DUAL_MIC),
SND_PCI_QUIRK(0x1028, 0x0BBC, "Warlock MLK", CS8409_WARLOCK_MLK),
SND_PCI_QUIRK(0x1028, 0x0BBD, "Warlock MLK Dual Mic", CS8409_WARLOCK_MLK_DUAL_MIC),
SND_PCI_QUIRK(0x1028, 0x0BD4, "Dolphin", CS8409_DOLPHIN),
SND_PCI_QUIRK(0x1028, 0x0BD5, "Dolphin", CS8409_DOLPHIN),
SND_PCI_QUIRK(0x1028, 0x0BD6, "Dolphin", CS8409_DOLPHIN),
SND_PCI_QUIRK(0x1028, 0x0BD7, "Dolphin", CS8409_DOLPHIN),
SND_PCI_QUIRK(0x1028, 0x0BD8, "Dolphin", CS8409_DOLPHIN),
SND_PCI_QUIRK(0x1028, 0x0C43, "Dolphin", CS8409_DOLPHIN),
SND_PCI_QUIRK(0x1028, 0x0C50, "Dolphin", CS8409_DOLPHIN),
SND_PCI_QUIRK(0x1028, 0x0C51, "Dolphin", CS8409_DOLPHIN),
SND_PCI_QUIRK(0x1028, 0x0C52, "Dolphin", CS8409_DOLPHIN),
SND_PCI_QUIRK(0x1028, 0x0C73, "Dolphin", CS8409_DOLPHIN),
SND_PCI_QUIRK(0x1028, 0x0C75, "Dolphin", CS8409_DOLPHIN),
SND_PCI_QUIRK(0x1028, 0x0C7D, "Dolphin", CS8409_DOLPHIN),
SND_PCI_QUIRK(0x1028, 0x0C7F, "Dolphin", CS8409_DOLPHIN),
{} /* terminator */
};
/* Dell Inspiron models with cs8409/cs42l42 */
const struct hda_model_fixup cs8409_models[] = {
{ .id = CS8409_BULLSEYE, .name = "bullseye" },
{ .id = CS8409_WARLOCK, .name = "warlock" },
{ .id = CS8409_WARLOCK_MLK, .name = "warlock mlk" },
{ .id = CS8409_WARLOCK_MLK_DUAL_MIC, .name = "warlock mlk dual mic" },
{ .id = CS8409_CYBORG, .name = "cyborg" },
{ .id = CS8409_DOLPHIN, .name = "dolphin" },
{ .id = CS8409_ODIN, .name = "odin" },
{}
};
const struct hda_fixup cs8409_fixups[] = {
[CS8409_BULLSEYE] = {
.type = HDA_FIXUP_PINS,
.v.pins = cs8409_cs42l42_pincfgs,
.chained = true,
.chain_id = CS8409_FIXUPS,
},
[CS8409_WARLOCK] = {
.type = HDA_FIXUP_PINS,
.v.pins = cs8409_cs42l42_pincfgs,
.chained = true,
.chain_id = CS8409_FIXUPS,
},
[CS8409_WARLOCK_MLK] = {
.type = HDA_FIXUP_PINS,
.v.pins = cs8409_cs42l42_pincfgs,
.chained = true,
.chain_id = CS8409_FIXUPS,
},
[CS8409_WARLOCK_MLK_DUAL_MIC] = {
.type = HDA_FIXUP_PINS,
.v.pins = cs8409_cs42l42_pincfgs,
.chained = true,
.chain_id = CS8409_FIXUPS,
},
[CS8409_CYBORG] = {
.type = HDA_FIXUP_PINS,
.v.pins = cs8409_cs42l42_pincfgs,
.chained = true,
.chain_id = CS8409_FIXUPS,
},
[CS8409_FIXUPS] = {
.type = HDA_FIXUP_FUNC,
.v.func = cs8409_cs42l42_fixups,
},
[CS8409_DOLPHIN] = {
.type = HDA_FIXUP_PINS,
.v.pins = dolphin_pincfgs,
.chained = true,
.chain_id = CS8409_DOLPHIN_FIXUPS,
},
[CS8409_DOLPHIN_FIXUPS] = {
.type = HDA_FIXUP_FUNC,
.v.func = dolphin_fixups,
},
[CS8409_ODIN] = {
.type = HDA_FIXUP_PINS,
.v.pins = cs8409_cs42l42_pincfgs_no_dmic,
.chained = true,
.chain_id = CS8409_FIXUPS,
},
};
| linux-master | sound/pci/hda/patch_cs8409-tables.c |
// SPDX-License-Identifier: GPL-2.0-only
//
// HDA audio driver for Cirrus Logic CS35L56 smart amp
//
// Copyright (C) 2023 Cirrus Logic, Inc. and
// Cirrus Logic International Semiconductor Ltd.
//
#include <linux/acpi.h>
#include <linux/debugfs.h>
#include <linux/gpio/consumer.h>
#include <linux/module.h>
#include <linux/pm_runtime.h>
#include <linux/regmap.h>
#include <linux/slab.h>
#include <sound/core.h>
#include <sound/hda_codec.h>
#include <sound/tlv.h>
#include "cs35l56_hda.h"
#include "hda_component.h"
#include "hda_cs_dsp_ctl.h"
#include "hda_generic.h"
/*
* The cs35l56_hda_dai_config[] reg sequence configures the device as
* ASP1_BCLK_FREQ = 3.072 MHz
* ASP1_RX_WIDTH = 32 cycles per slot, ASP1_TX_WIDTH = 32 cycles per slot, ASP1_FMT = I2S
* ASP1_DOUT_HIZ_CONTROL = Hi-Z during unused timeslots
* ASP1_RX_WL = 24 bits per sample
* ASP1_TX_WL = 24 bits per sample
* ASP1_RXn_EN 1..3 and ASP1_TXn_EN 1..4 disabled
*/
static const struct reg_sequence cs35l56_hda_dai_config[] = {
{ CS35L56_ASP1_CONTROL1, 0x00000021 },
{ CS35L56_ASP1_CONTROL2, 0x20200200 },
{ CS35L56_ASP1_CONTROL3, 0x00000003 },
{ CS35L56_ASP1_DATA_CONTROL5, 0x00000018 },
{ CS35L56_ASP1_DATA_CONTROL1, 0x00000018 },
{ CS35L56_ASP1_ENABLES1, 0x00000000 },
};
static void cs35l56_hda_play(struct cs35l56_hda *cs35l56)
{
unsigned int val;
int ret;
pm_runtime_get_sync(cs35l56->base.dev);
ret = cs35l56_mbox_send(&cs35l56->base, CS35L56_MBOX_CMD_AUDIO_PLAY);
if (ret == 0) {
/* Wait for firmware to enter PS0 power state */
ret = regmap_read_poll_timeout(cs35l56->base.regmap,
CS35L56_TRANSDUCER_ACTUAL_PS,
val, (val == CS35L56_PS0),
CS35L56_PS0_POLL_US,
CS35L56_PS0_TIMEOUT_US);
if (ret)
dev_warn(cs35l56->base.dev, "PS0 wait failed: %d\n", ret);
}
regmap_set_bits(cs35l56->base.regmap, CS35L56_ASP1_ENABLES1,
BIT(CS35L56_ASP_RX1_EN_SHIFT) | BIT(CS35L56_ASP_RX2_EN_SHIFT) |
cs35l56->asp_tx_mask);
cs35l56->playing = true;
}
static void cs35l56_hda_pause(struct cs35l56_hda *cs35l56)
{
cs35l56->playing = false;
cs35l56_mbox_send(&cs35l56->base, CS35L56_MBOX_CMD_AUDIO_PAUSE);
regmap_clear_bits(cs35l56->base.regmap, CS35L56_ASP1_ENABLES1,
BIT(CS35L56_ASP_RX1_EN_SHIFT) | BIT(CS35L56_ASP_RX2_EN_SHIFT) |
BIT(CS35L56_ASP_TX1_EN_SHIFT) | BIT(CS35L56_ASP_TX2_EN_SHIFT) |
BIT(CS35L56_ASP_TX3_EN_SHIFT) | BIT(CS35L56_ASP_TX4_EN_SHIFT));
pm_runtime_mark_last_busy(cs35l56->base.dev);
pm_runtime_put_autosuspend(cs35l56->base.dev);
}
static void cs35l56_hda_playback_hook(struct device *dev, int action)
{
struct cs35l56_hda *cs35l56 = dev_get_drvdata(dev);
dev_dbg(cs35l56->base.dev, "%s()%d: action: %d\n", __func__, __LINE__, action);
switch (action) {
case HDA_GEN_PCM_ACT_PREPARE:
if (cs35l56->playing)
break;
/* If we're suspended: flag that resume should start playback */
if (cs35l56->suspended) {
cs35l56->playing = true;
break;
}
cs35l56_hda_play(cs35l56);
break;
case HDA_GEN_PCM_ACT_CLEANUP:
if (!cs35l56->playing)
break;
cs35l56_hda_pause(cs35l56);
break;
default:
break;
}
}
static int cs35l56_hda_runtime_suspend(struct device *dev)
{
struct cs35l56_hda *cs35l56 = dev_get_drvdata(dev);
if (cs35l56->cs_dsp.booted)
cs_dsp_stop(&cs35l56->cs_dsp);
return cs35l56_runtime_suspend_common(&cs35l56->base);
}
static int cs35l56_hda_runtime_resume(struct device *dev)
{
struct cs35l56_hda *cs35l56 = dev_get_drvdata(dev);
int ret;
ret = cs35l56_runtime_resume_common(&cs35l56->base, false);
if (ret < 0)
return ret;
if (cs35l56->cs_dsp.booted) {
ret = cs_dsp_run(&cs35l56->cs_dsp);
if (ret) {
dev_dbg(cs35l56->base.dev, "%s: cs_dsp_run ret %d\n", __func__, ret);
goto err;
}
}
return 0;
err:
cs35l56_mbox_send(&cs35l56->base, CS35L56_MBOX_CMD_ALLOW_AUTO_HIBERNATE);
regmap_write(cs35l56->base.regmap, CS35L56_DSP_VIRTUAL1_MBOX_1,
CS35L56_MBOX_CMD_HIBERNATE_NOW);
regcache_cache_only(cs35l56->base.regmap, true);
return ret;
}
static int cs35l56_hda_mixer_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
uinfo->count = 1;
uinfo->value.enumerated.items = CS35L56_NUM_INPUT_SRC;
if (uinfo->value.enumerated.item >= CS35L56_NUM_INPUT_SRC)
uinfo->value.enumerated.item = CS35L56_NUM_INPUT_SRC - 1;
strscpy(uinfo->value.enumerated.name, cs35l56_tx_input_texts[uinfo->value.enumerated.item],
sizeof(uinfo->value.enumerated.name));
return 0;
}
static int cs35l56_hda_mixer_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct cs35l56_hda *cs35l56 = (struct cs35l56_hda *)kcontrol->private_data;
unsigned int reg_val;
int i;
regmap_read(cs35l56->base.regmap, kcontrol->private_value, ®_val);
reg_val &= CS35L56_ASP_TXn_SRC_MASK;
for (i = 0; i < CS35L56_NUM_INPUT_SRC; ++i) {
if (cs35l56_tx_input_values[i] == reg_val) {
ucontrol->value.enumerated.item[0] = i;
break;
}
}
return 0;
}
static int cs35l56_hda_mixer_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct cs35l56_hda *cs35l56 = (struct cs35l56_hda *)kcontrol->private_data;
unsigned int item = ucontrol->value.enumerated.item[0];
bool changed;
if (item >= CS35L56_NUM_INPUT_SRC)
return -EINVAL;
regmap_update_bits_check(cs35l56->base.regmap, kcontrol->private_value,
CS35L56_INPUT_MASK, cs35l56_tx_input_values[item],
&changed);
return changed;
}
static int cs35l56_hda_posture_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 1;
uinfo->value.integer.min = CS35L56_MAIN_POSTURE_MIN;
uinfo->value.integer.max = CS35L56_MAIN_POSTURE_MAX;
return 0;
}
static int cs35l56_hda_posture_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct cs35l56_hda *cs35l56 = (struct cs35l56_hda *)kcontrol->private_data;
unsigned int pos;
int ret;
ret = regmap_read(cs35l56->base.regmap, CS35L56_MAIN_POSTURE_NUMBER, &pos);
if (ret)
return ret;
ucontrol->value.integer.value[0] = pos;
return 0;
}
static int cs35l56_hda_posture_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct cs35l56_hda *cs35l56 = (struct cs35l56_hda *)kcontrol->private_data;
unsigned long pos = ucontrol->value.integer.value[0];
bool changed;
int ret;
if ((pos < CS35L56_MAIN_POSTURE_MIN) ||
(pos > CS35L56_MAIN_POSTURE_MAX))
return -EINVAL;
ret = regmap_update_bits_check(cs35l56->base.regmap,
CS35L56_MAIN_POSTURE_NUMBER,
CS35L56_MAIN_POSTURE_MASK,
pos, &changed);
if (ret)
return ret;
return changed;
}
static const struct {
const char *name;
unsigned int reg;
} cs35l56_hda_mixer_controls[] = {
{ "ASP1 TX1 Source", CS35L56_ASP1TX1_INPUT },
{ "ASP1 TX2 Source", CS35L56_ASP1TX2_INPUT },
{ "ASP1 TX3 Source", CS35L56_ASP1TX3_INPUT },
{ "ASP1 TX4 Source", CS35L56_ASP1TX4_INPUT },
};
static const DECLARE_TLV_DB_SCALE(cs35l56_hda_vol_tlv, -10000, 25, 0);
static int cs35l56_hda_vol_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 1;
uinfo->value.integer.step = 1;
uinfo->value.integer.min = 0;
uinfo->value.integer.max = CS35L56_MAIN_RENDER_USER_VOLUME_MAX -
CS35L56_MAIN_RENDER_USER_VOLUME_MIN;
return 0;
}
static int cs35l56_hda_vol_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct cs35l56_hda *cs35l56 = (struct cs35l56_hda *)kcontrol->private_data;
unsigned int raw_vol;
int vol;
int ret;
ret = regmap_read(cs35l56->base.regmap, CS35L56_MAIN_RENDER_USER_VOLUME, &raw_vol);
if (ret)
return ret;
vol = (s16)(raw_vol & 0xFFFF);
vol >>= CS35L56_MAIN_RENDER_USER_VOLUME_SHIFT;
if (vol & BIT(CS35L56_MAIN_RENDER_USER_VOLUME_SIGNBIT))
vol |= ~((int)(BIT(CS35L56_MAIN_RENDER_USER_VOLUME_SIGNBIT) - 1));
ucontrol->value.integer.value[0] = vol - CS35L56_MAIN_RENDER_USER_VOLUME_MIN;
return 0;
}
static int cs35l56_hda_vol_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct cs35l56_hda *cs35l56 = (struct cs35l56_hda *)kcontrol->private_data;
long vol = ucontrol->value.integer.value[0];
unsigned int raw_vol;
bool changed;
int ret;
if ((vol < 0) || (vol > (CS35L56_MAIN_RENDER_USER_VOLUME_MAX -
CS35L56_MAIN_RENDER_USER_VOLUME_MIN)))
return -EINVAL;
raw_vol = (vol + CS35L56_MAIN_RENDER_USER_VOLUME_MIN) <<
CS35L56_MAIN_RENDER_USER_VOLUME_SHIFT;
ret = regmap_update_bits_check(cs35l56->base.regmap,
CS35L56_MAIN_RENDER_USER_VOLUME,
CS35L56_MAIN_RENDER_USER_VOLUME_MASK,
raw_vol, &changed);
if (ret)
return ret;
return changed;
}
static void cs35l56_hda_create_controls(struct cs35l56_hda *cs35l56)
{
struct snd_kcontrol_new ctl_template = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
.info = cs35l56_hda_posture_info,
.get = cs35l56_hda_posture_get,
.put = cs35l56_hda_posture_put,
};
char name[64];
int i;
snprintf(name, sizeof(name), "%s Posture Number", cs35l56->amp_name);
ctl_template.name = name;
cs35l56->posture_ctl = snd_ctl_new1(&ctl_template, cs35l56);
if (snd_ctl_add(cs35l56->codec->card, cs35l56->posture_ctl))
dev_err(cs35l56->base.dev, "Failed to add KControl: %s\n", ctl_template.name);
/* Mixer controls */
ctl_template.info = cs35l56_hda_mixer_info;
ctl_template.get = cs35l56_hda_mixer_get;
ctl_template.put = cs35l56_hda_mixer_put;
BUILD_BUG_ON(ARRAY_SIZE(cs35l56->mixer_ctl) != ARRAY_SIZE(cs35l56_hda_mixer_controls));
for (i = 0; i < ARRAY_SIZE(cs35l56_hda_mixer_controls); ++i) {
snprintf(name, sizeof(name), "%s %s", cs35l56->amp_name,
cs35l56_hda_mixer_controls[i].name);
ctl_template.private_value = cs35l56_hda_mixer_controls[i].reg;
cs35l56->mixer_ctl[i] = snd_ctl_new1(&ctl_template, cs35l56);
if (snd_ctl_add(cs35l56->codec->card, cs35l56->mixer_ctl[i])) {
dev_err(cs35l56->base.dev, "Failed to add KControl: %s\n",
ctl_template.name);
}
}
ctl_template.info = cs35l56_hda_vol_info;
ctl_template.get = cs35l56_hda_vol_get;
ctl_template.put = cs35l56_hda_vol_put;
ctl_template.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ);
ctl_template.tlv.p = cs35l56_hda_vol_tlv;
snprintf(name, sizeof(name), "%s Speaker Playback Volume", cs35l56->amp_name);
ctl_template.name = name;
cs35l56->volume_ctl = snd_ctl_new1(&ctl_template, cs35l56);
if (snd_ctl_add(cs35l56->codec->card, cs35l56->volume_ctl))
dev_err(cs35l56->base.dev, "Failed to add KControl: %s\n", ctl_template.name);
}
static void cs35l56_hda_remove_controls(struct cs35l56_hda *cs35l56)
{
int i;
for (i = ARRAY_SIZE(cs35l56->mixer_ctl) - 1; i >= 0; i--)
snd_ctl_remove(cs35l56->codec->card, cs35l56->mixer_ctl[i]);
snd_ctl_remove(cs35l56->codec->card, cs35l56->posture_ctl);
snd_ctl_remove(cs35l56->codec->card, cs35l56->volume_ctl);
}
static const struct cs_dsp_client_ops cs35l56_hda_client_ops = {
.control_remove = hda_cs_dsp_control_remove,
};
static int cs35l56_hda_request_firmware_file(struct cs35l56_hda *cs35l56,
const struct firmware **firmware, char **filename,
const char *dir, const char *system_name,
const char *amp_name,
const char *filetype)
{
char *s, c;
int ret = 0;
if (system_name && amp_name)
*filename = kasprintf(GFP_KERNEL, "%scs35l56%s-%02x-dsp1-misc-%s-%s.%s", dir,
cs35l56->base.secured ? "s" : "", cs35l56->base.rev,
system_name, amp_name, filetype);
else if (system_name)
*filename = kasprintf(GFP_KERNEL, "%scs35l56%s-%02x-dsp1-misc-%s.%s", dir,
cs35l56->base.secured ? "s" : "", cs35l56->base.rev,
system_name, filetype);
else
*filename = kasprintf(GFP_KERNEL, "%scs35l56%s-%02x-dsp1-misc.%s", dir,
cs35l56->base.secured ? "s" : "", cs35l56->base.rev,
filetype);
if (!*filename)
return -ENOMEM;
/*
* Make sure that filename is lower-case and any non alpha-numeric
* characters except full stop and forward slash are replaced with
* hyphens.
*/
s = *filename;
while (*s) {
c = *s;
if (isalnum(c))
*s = tolower(c);
else if (c != '.' && c != '/')
*s = '-';
s++;
}
ret = firmware_request_nowarn(firmware, *filename, cs35l56->base.dev);
if (ret) {
dev_dbg(cs35l56->base.dev, "Failed to request '%s'\n", *filename);
kfree(*filename);
*filename = NULL;
return ret;
}
dev_dbg(cs35l56->base.dev, "Found '%s'\n", *filename);
return 0;
}
static const char cirrus_dir[] = "cirrus/";
static void cs35l56_hda_request_firmware_files(struct cs35l56_hda *cs35l56,
const struct firmware **wmfw_firmware,
char **wmfw_filename,
const struct firmware **coeff_firmware,
char **coeff_filename)
{
const char *system_name = cs35l56->system_name;
const char *amp_name = cs35l56->amp_name;
int ret;
if (system_name && amp_name) {
if (!cs35l56_hda_request_firmware_file(cs35l56, wmfw_firmware, wmfw_filename,
cirrus_dir, system_name, amp_name, "wmfw")) {
cs35l56_hda_request_firmware_file(cs35l56, coeff_firmware, coeff_filename,
cirrus_dir, system_name, amp_name, "bin");
return;
}
}
if (system_name) {
if (!cs35l56_hda_request_firmware_file(cs35l56, wmfw_firmware, wmfw_filename,
cirrus_dir, system_name, NULL, "wmfw")) {
if (amp_name)
cs35l56_hda_request_firmware_file(cs35l56,
coeff_firmware, coeff_filename,
cirrus_dir, system_name,
amp_name, "bin");
if (!*coeff_firmware)
cs35l56_hda_request_firmware_file(cs35l56,
coeff_firmware, coeff_filename,
cirrus_dir, system_name,
NULL, "bin");
return;
}
}
ret = cs35l56_hda_request_firmware_file(cs35l56, wmfw_firmware, wmfw_filename,
cirrus_dir, NULL, NULL, "wmfw");
if (!ret) {
cs35l56_hda_request_firmware_file(cs35l56, coeff_firmware, coeff_filename,
cirrus_dir, NULL, NULL, "bin");
return;
}
/* When a firmware file is not found must still search for the coeff files */
if (system_name) {
if (amp_name)
cs35l56_hda_request_firmware_file(cs35l56, coeff_firmware, coeff_filename,
cirrus_dir, system_name, amp_name, "bin");
if (!*coeff_firmware)
cs35l56_hda_request_firmware_file(cs35l56, coeff_firmware, coeff_filename,
cirrus_dir, system_name, NULL, "bin");
}
if (!*coeff_firmware)
cs35l56_hda_request_firmware_file(cs35l56, coeff_firmware, coeff_filename,
cirrus_dir, NULL, NULL, "bin");
}
static void cs35l56_hda_release_firmware_files(const struct firmware *wmfw_firmware,
char *wmfw_filename,
const struct firmware *coeff_firmware,
char *coeff_filename)
{
if (wmfw_firmware)
release_firmware(wmfw_firmware);
kfree(wmfw_filename);
if (coeff_firmware)
release_firmware(coeff_firmware);
kfree(coeff_filename);
}
static void cs35l56_hda_add_dsp_controls(struct cs35l56_hda *cs35l56)
{
struct hda_cs_dsp_ctl_info info;
info.device_name = cs35l56->amp_name;
info.fw_type = HDA_CS_DSP_FW_MISC;
info.card = cs35l56->codec->card;
hda_cs_dsp_add_controls(&cs35l56->cs_dsp, &info);
}
static int cs35l56_hda_fw_load(struct cs35l56_hda *cs35l56)
{
const struct firmware *coeff_firmware = NULL;
const struct firmware *wmfw_firmware = NULL;
char *coeff_filename = NULL;
char *wmfw_filename = NULL;
unsigned int firmware_missing;
int ret = 0;
/* Prepare for a new DSP power-up */
if (cs35l56->base.fw_patched)
cs_dsp_power_down(&cs35l56->cs_dsp);
cs35l56->base.fw_patched = false;
pm_runtime_get_sync(cs35l56->base.dev);
ret = regmap_read(cs35l56->base.regmap, CS35L56_PROTECTION_STATUS, &firmware_missing);
if (ret) {
dev_err(cs35l56->base.dev, "Failed to read PROTECTION_STATUS: %d\n", ret);
goto err_pm_put;
}
firmware_missing &= CS35L56_FIRMWARE_MISSING;
/*
* Firmware can only be downloaded if the CS35L56 is secured or is
* running from the built-in ROM. If it is secured the BIOS will have
* downloaded firmware, and the wmfw/bin files will only contain
* tunings that are safe to download with the firmware running.
*/
if (cs35l56->base.secured || firmware_missing) {
cs35l56_hda_request_firmware_files(cs35l56, &wmfw_firmware, &wmfw_filename,
&coeff_firmware, &coeff_filename);
}
/*
* If the BIOS didn't patch the firmware a bin file is mandatory to
* enable the ASP·
*/
if (!coeff_firmware && firmware_missing) {
dev_err(cs35l56->base.dev, ".bin file required but not found\n");
ret = -ENOENT;
goto err_fw_release;
}
mutex_lock(&cs35l56->base.irq_lock);
/*
* When the device is running in secure mode the firmware files can
* only contain insecure tunings and therefore we do not need to
* shutdown the firmware to apply them and can use the lower cost
* reinit sequence instead.
*/
if (!cs35l56->base.secured && (wmfw_firmware || coeff_firmware)) {
ret = cs35l56_firmware_shutdown(&cs35l56->base);
if (ret)
goto err;
}
ret = cs_dsp_power_up(&cs35l56->cs_dsp, wmfw_firmware, wmfw_filename,
coeff_firmware, coeff_filename, "misc");
if (ret) {
dev_dbg(cs35l56->base.dev, "%s: cs_dsp_power_up ret %d\n", __func__, ret);
goto err;
}
if (wmfw_filename)
dev_dbg(cs35l56->base.dev, "Loaded WMFW Firmware: %s\n", wmfw_filename);
if (coeff_filename)
dev_dbg(cs35l56->base.dev, "Loaded Coefficients: %s\n", coeff_filename);
if (cs35l56->base.secured) {
ret = cs35l56_mbox_send(&cs35l56->base, CS35L56_MBOX_CMD_AUDIO_REINIT);
if (ret)
goto err_powered_up;
} else if (wmfw_firmware || coeff_firmware) {
/* If we downloaded firmware, reset the device and wait for it to boot */
cs35l56_system_reset(&cs35l56->base, false);
regcache_mark_dirty(cs35l56->base.regmap);
ret = cs35l56_wait_for_firmware_boot(&cs35l56->base);
if (ret)
goto err_powered_up;
}
/* Disable auto-hibernate so that runtime_pm has control */
ret = cs35l56_mbox_send(&cs35l56->base, CS35L56_MBOX_CMD_PREVENT_AUTO_HIBERNATE);
if (ret)
goto err_powered_up;
regcache_sync(cs35l56->base.regmap);
regmap_clear_bits(cs35l56->base.regmap, CS35L56_PROTECTION_STATUS,
CS35L56_FIRMWARE_MISSING);
cs35l56->base.fw_patched = true;
ret = cs_dsp_run(&cs35l56->cs_dsp);
if (ret)
dev_dbg(cs35l56->base.dev, "%s: cs_dsp_run ret %d\n", __func__, ret);
err_powered_up:
if (!cs35l56->base.fw_patched)
cs_dsp_power_down(&cs35l56->cs_dsp);
err:
mutex_unlock(&cs35l56->base.irq_lock);
err_fw_release:
cs35l56_hda_release_firmware_files(wmfw_firmware, wmfw_filename,
coeff_firmware, coeff_filename);
err_pm_put:
pm_runtime_put(cs35l56->base.dev);
return ret;
}
static int cs35l56_hda_bind(struct device *dev, struct device *master, void *master_data)
{
struct cs35l56_hda *cs35l56 = dev_get_drvdata(dev);
struct hda_component *comps = master_data;
int ret;
if (!comps || cs35l56->index < 0 || cs35l56->index >= HDA_MAX_COMPONENTS)
return -EINVAL;
comps = &comps[cs35l56->index];
if (comps->dev)
return -EBUSY;
comps->dev = dev;
cs35l56->codec = comps->codec;
strscpy(comps->name, dev_name(dev), sizeof(comps->name));
comps->playback_hook = cs35l56_hda_playback_hook;
ret = cs35l56_hda_fw_load(cs35l56);
if (ret)
return ret;
cs35l56_hda_create_controls(cs35l56);
cs35l56_hda_add_dsp_controls(cs35l56);
#if IS_ENABLED(CONFIG_SND_DEBUG)
cs35l56->debugfs_root = debugfs_create_dir(dev_name(cs35l56->base.dev), sound_debugfs_root);
cs_dsp_init_debugfs(&cs35l56->cs_dsp, cs35l56->debugfs_root);
#endif
dev_dbg(cs35l56->base.dev, "Bound\n");
return 0;
}
static void cs35l56_hda_unbind(struct device *dev, struct device *master, void *master_data)
{
struct cs35l56_hda *cs35l56 = dev_get_drvdata(dev);
struct hda_component *comps = master_data;
cs35l56_hda_remove_controls(cs35l56);
#if IS_ENABLED(CONFIG_SND_DEBUG)
cs_dsp_cleanup_debugfs(&cs35l56->cs_dsp);
debugfs_remove_recursive(cs35l56->debugfs_root);
#endif
if (cs35l56->base.fw_patched)
cs_dsp_power_down(&cs35l56->cs_dsp);
cs_dsp_remove(&cs35l56->cs_dsp);
if (comps[cs35l56->index].dev == dev)
memset(&comps[cs35l56->index], 0, sizeof(*comps));
dev_dbg(cs35l56->base.dev, "Unbound\n");
}
static const struct component_ops cs35l56_hda_comp_ops = {
.bind = cs35l56_hda_bind,
.unbind = cs35l56_hda_unbind,
};
static int cs35l56_hda_system_suspend(struct device *dev)
{
struct cs35l56_hda *cs35l56 = dev_get_drvdata(dev);
if (cs35l56->playing)
cs35l56_hda_pause(cs35l56);
cs35l56->suspended = true;
/*
* The interrupt line is normally shared, but after we start suspending
* we can't check if our device is the source of an interrupt, and can't
* clear it. Prevent this race by temporarily disabling the parent irq
* until we reach _no_irq.
*/
if (cs35l56->base.irq)
disable_irq(cs35l56->base.irq);
return pm_runtime_force_suspend(dev);
}
static int cs35l56_hda_system_suspend_late(struct device *dev)
{
struct cs35l56_hda *cs35l56 = dev_get_drvdata(dev);
/*
* RESET is usually shared by all amps so it must not be asserted until
* all driver instances have done their suspend() stage.
*/
if (cs35l56->base.reset_gpio) {
gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 0);
cs35l56_wait_min_reset_pulse();
}
return 0;
}
static int cs35l56_hda_system_suspend_no_irq(struct device *dev)
{
struct cs35l56_hda *cs35l56 = dev_get_drvdata(dev);
/* Handlers are now disabled so the parent IRQ can safely be re-enabled. */
if (cs35l56->base.irq)
enable_irq(cs35l56->base.irq);
return 0;
}
static int cs35l56_hda_system_resume_no_irq(struct device *dev)
{
struct cs35l56_hda *cs35l56 = dev_get_drvdata(dev);
/*
* WAKE interrupts unmask if the CS35L56 hibernates, which can cause
* spurious interrupts, and the interrupt line is normally shared.
* We can't check if our device is the source of an interrupt, and can't
* clear it, until it has fully resumed. Prevent this race by temporarily
* disabling the parent irq until we complete resume().
*/
if (cs35l56->base.irq)
disable_irq(cs35l56->base.irq);
return 0;
}
static int cs35l56_hda_system_resume_early(struct device *dev)
{
struct cs35l56_hda *cs35l56 = dev_get_drvdata(dev);
/* Ensure a spec-compliant RESET pulse. */
if (cs35l56->base.reset_gpio) {
gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 0);
cs35l56_wait_min_reset_pulse();
/* Release shared RESET before drivers start resume(). */
gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 1);
cs35l56_wait_control_port_ready();
}
return 0;
}
static int cs35l56_hda_system_resume(struct device *dev)
{
struct cs35l56_hda *cs35l56 = dev_get_drvdata(dev);
int ret;
/* Undo pm_runtime_force_suspend() before re-enabling the irq */
ret = pm_runtime_force_resume(dev);
if (cs35l56->base.irq)
enable_irq(cs35l56->base.irq);
if (ret)
return ret;
cs35l56->suspended = false;
ret = cs35l56_is_fw_reload_needed(&cs35l56->base);
dev_dbg(cs35l56->base.dev, "fw_reload_needed: %d\n", ret);
if (ret > 0) {
ret = cs35l56_hda_fw_load(cs35l56);
if (ret)
return ret;
}
if (cs35l56->playing)
cs35l56_hda_play(cs35l56);
return 0;
}
static int cs35l56_hda_read_acpi(struct cs35l56_hda *cs35l56, int id)
{
u32 values[HDA_MAX_COMPONENTS];
struct acpi_device *adev;
const char *property, *sub;
size_t nval;
int i, ret;
/*
* ACPI_COMPANION isn't available when this driver was instantiated by
* the serial-multi-instantiate driver, so lookup the node by HID
*/
if (!ACPI_COMPANION(cs35l56->base.dev)) {
adev = acpi_dev_get_first_match_dev("CSC3556", NULL, -1);
if (!adev) {
dev_err(cs35l56->base.dev, "Failed to find an ACPI device for %s\n",
dev_name(cs35l56->base.dev));
return -ENODEV;
}
ACPI_COMPANION_SET(cs35l56->base.dev, adev);
}
property = "cirrus,dev-index";
ret = device_property_count_u32(cs35l56->base.dev, property);
if (ret <= 0)
goto err;
if (ret > ARRAY_SIZE(values)) {
ret = -EINVAL;
goto err;
}
nval = ret;
ret = device_property_read_u32_array(cs35l56->base.dev, property, values, nval);
if (ret)
goto err;
cs35l56->index = -1;
for (i = 0; i < nval; i++) {
if (values[i] == id) {
cs35l56->index = i;
break;
}
}
/*
* It's not an error for the ID to be missing: for I2C there can be
* an alias address that is not a real device. So reject silently.
*/
if (cs35l56->index == -1) {
dev_dbg(cs35l56->base.dev, "No index found in %s\n", property);
ret = -ENODEV;
goto err;
}
sub = acpi_get_subsystem_id(ACPI_HANDLE(cs35l56->base.dev));
if (IS_ERR(sub)) {
dev_info(cs35l56->base.dev,
"Read ACPI _SUB failed(%ld): fallback to generic firmware\n",
PTR_ERR(sub));
} else {
cs35l56->system_name = sub;
}
cs35l56->base.reset_gpio = devm_gpiod_get_index_optional(cs35l56->base.dev,
"reset",
cs35l56->index,
GPIOD_OUT_LOW);
if (IS_ERR(cs35l56->base.reset_gpio)) {
ret = PTR_ERR(cs35l56->base.reset_gpio);
/*
* If RESET is shared the first amp to probe will grab the reset
* line and reset all the amps
*/
if (ret != -EBUSY)
return dev_err_probe(cs35l56->base.dev, ret, "Failed to get reset GPIO\n");
dev_info(cs35l56->base.dev, "Reset GPIO busy, assume shared reset\n");
cs35l56->base.reset_gpio = NULL;
}
return 0;
err:
if (ret != -ENODEV)
dev_err(cs35l56->base.dev, "Failed property %s: %d\n", property, ret);
return ret;
}
int cs35l56_hda_common_probe(struct cs35l56_hda *cs35l56, int id)
{
int ret;
mutex_init(&cs35l56->base.irq_lock);
dev_set_drvdata(cs35l56->base.dev, cs35l56);
ret = cs35l56_hda_read_acpi(cs35l56, id);
if (ret)
goto err;
cs35l56->amp_name = devm_kasprintf(cs35l56->base.dev, GFP_KERNEL, "AMP%d",
cs35l56->index + 1);
if (!cs35l56->amp_name) {
ret = -ENOMEM;
goto err;
}
cs35l56_init_cs_dsp(&cs35l56->base, &cs35l56->cs_dsp);
cs35l56->cs_dsp.client_ops = &cs35l56_hda_client_ops;
if (cs35l56->base.reset_gpio) {
dev_dbg(cs35l56->base.dev, "Hard reset\n");
/*
* The GPIOD_OUT_LOW to *_gpiod_get_*() will be ignored if the
* ACPI defines a different default state. So explicitly set low.
*/
gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 0);
cs35l56_wait_min_reset_pulse();
gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 1);
}
ret = cs35l56_hw_init(&cs35l56->base);
if (ret < 0)
goto err;
/* Reset the device and wait for it to boot */
cs35l56_system_reset(&cs35l56->base, false);
ret = cs35l56_wait_for_firmware_boot(&cs35l56->base);
if (ret)
goto err;
ret = cs35l56_set_patch(&cs35l56->base);
if (ret)
goto err;
regcache_mark_dirty(cs35l56->base.regmap);
regcache_sync(cs35l56->base.regmap);
/* Disable auto-hibernate so that runtime_pm has control */
ret = cs35l56_mbox_send(&cs35l56->base, CS35L56_MBOX_CMD_PREVENT_AUTO_HIBERNATE);
if (ret)
goto err;
ret = cs_dsp_halo_init(&cs35l56->cs_dsp);
if (ret) {
dev_err_probe(cs35l56->base.dev, ret, "cs_dsp_halo_init failed\n");
goto err;
}
dev_dbg(cs35l56->base.dev, "DSP system name: '%s', amp name: '%s'\n",
cs35l56->system_name, cs35l56->amp_name);
regmap_multi_reg_write(cs35l56->base.regmap, cs35l56_hda_dai_config,
ARRAY_SIZE(cs35l56_hda_dai_config));
/*
* By default only enable one ASP1TXn, where n=amplifier index,
* This prevents multiple amps trying to drive the same slot.
*/
cs35l56->asp_tx_mask = BIT(cs35l56->index);
pm_runtime_set_autosuspend_delay(cs35l56->base.dev, 3000);
pm_runtime_use_autosuspend(cs35l56->base.dev);
pm_runtime_set_active(cs35l56->base.dev);
pm_runtime_mark_last_busy(cs35l56->base.dev);
pm_runtime_enable(cs35l56->base.dev);
ret = component_add(cs35l56->base.dev, &cs35l56_hda_comp_ops);
if (ret) {
dev_err(cs35l56->base.dev, "Register component failed: %d\n", ret);
goto pm_err;
}
cs35l56->base.init_done = true;
return 0;
pm_err:
pm_runtime_disable(cs35l56->base.dev);
err:
gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 0);
return ret;
}
EXPORT_SYMBOL_NS_GPL(cs35l56_hda_common_probe, SND_HDA_SCODEC_CS35L56);
void cs35l56_hda_remove(struct device *dev)
{
struct cs35l56_hda *cs35l56 = dev_get_drvdata(dev);
pm_runtime_dont_use_autosuspend(cs35l56->base.dev);
pm_runtime_get_sync(cs35l56->base.dev);
pm_runtime_disable(cs35l56->base.dev);
component_del(cs35l56->base.dev, &cs35l56_hda_comp_ops);
kfree(cs35l56->system_name);
pm_runtime_put_noidle(cs35l56->base.dev);
gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 0);
}
EXPORT_SYMBOL_NS_GPL(cs35l56_hda_remove, SND_HDA_SCODEC_CS35L56);
const struct dev_pm_ops cs35l56_hda_pm_ops = {
RUNTIME_PM_OPS(cs35l56_hda_runtime_suspend, cs35l56_hda_runtime_resume, NULL)
SYSTEM_SLEEP_PM_OPS(cs35l56_hda_system_suspend, cs35l56_hda_system_resume)
LATE_SYSTEM_SLEEP_PM_OPS(cs35l56_hda_system_suspend_late,
cs35l56_hda_system_resume_early)
NOIRQ_SYSTEM_SLEEP_PM_OPS(cs35l56_hda_system_suspend_no_irq,
cs35l56_hda_system_resume_no_irq)
};
EXPORT_SYMBOL_NS_GPL(cs35l56_hda_pm_ops, SND_HDA_SCODEC_CS35L56);
MODULE_DESCRIPTION("CS35L56 HDA Driver");
MODULE_IMPORT_NS(SND_HDA_CS_DSP_CONTROLS);
MODULE_IMPORT_NS(SND_SOC_CS35L56_SHARED);
MODULE_AUTHOR("Richard Fitzgerald <[email protected]>");
MODULE_AUTHOR("Simon Trimmer <[email protected]>");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(FW_CS_DSP);
| linux-master | sound/pci/hda/cs35l56_hda.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Universal Interface for Intel High Definition Audio Codec
*
* HD audio interface patch for Realtek ALC codecs
*
* Copyright (c) 2004 Kailang Yang <[email protected]>
* PeiSen Hou <[email protected]>
* Takashi Iwai <[email protected]>
* Jonathan Woithe <[email protected]>
*/
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/slab.h>
#include <linux/pci.h>
#include <linux/dmi.h>
#include <linux/module.h>
#include <linux/input.h>
#include <linux/leds.h>
#include <linux/ctype.h>
#include <sound/core.h>
#include <sound/jack.h>
#include <sound/hda_codec.h>
#include "hda_local.h"
#include "hda_auto_parser.h"
#include "hda_jack.h"
#include "hda_generic.h"
#include "hda_component.h"
/* keep halting ALC5505 DSP, for power saving */
#define HALT_REALTEK_ALC5505
/* extra amp-initialization sequence types */
enum {
ALC_INIT_UNDEFINED,
ALC_INIT_NONE,
ALC_INIT_DEFAULT,
};
enum {
ALC_HEADSET_MODE_UNKNOWN,
ALC_HEADSET_MODE_UNPLUGGED,
ALC_HEADSET_MODE_HEADSET,
ALC_HEADSET_MODE_MIC,
ALC_HEADSET_MODE_HEADPHONE,
};
enum {
ALC_HEADSET_TYPE_UNKNOWN,
ALC_HEADSET_TYPE_CTIA,
ALC_HEADSET_TYPE_OMTP,
};
enum {
ALC_KEY_MICMUTE_INDEX,
};
struct alc_customize_define {
unsigned int sku_cfg;
unsigned char port_connectivity;
unsigned char check_sum;
unsigned char customization;
unsigned char external_amp;
unsigned int enable_pcbeep:1;
unsigned int platform_type:1;
unsigned int swap:1;
unsigned int override:1;
unsigned int fixup:1; /* Means that this sku is set by driver, not read from hw */
};
struct alc_coef_led {
unsigned int idx;
unsigned int mask;
unsigned int on;
unsigned int off;
};
struct alc_spec {
struct hda_gen_spec gen; /* must be at head */
/* codec parameterization */
struct alc_customize_define cdefine;
unsigned int parse_flags; /* flag for snd_hda_parse_pin_defcfg() */
/* GPIO bits */
unsigned int gpio_mask;
unsigned int gpio_dir;
unsigned int gpio_data;
bool gpio_write_delay; /* add a delay before writing gpio_data */
/* mute LED for HP laptops, see vref_mute_led_set() */
int mute_led_polarity;
int micmute_led_polarity;
hda_nid_t mute_led_nid;
hda_nid_t cap_mute_led_nid;
unsigned int gpio_mute_led_mask;
unsigned int gpio_mic_led_mask;
struct alc_coef_led mute_led_coef;
struct alc_coef_led mic_led_coef;
struct mutex coef_mutex;
hda_nid_t headset_mic_pin;
hda_nid_t headphone_mic_pin;
int current_headset_mode;
int current_headset_type;
/* hooks */
void (*init_hook)(struct hda_codec *codec);
#ifdef CONFIG_PM
void (*power_hook)(struct hda_codec *codec);
#endif
void (*shutup)(struct hda_codec *codec);
int init_amp;
int codec_variant; /* flag for other variants */
unsigned int has_alc5505_dsp:1;
unsigned int no_depop_delay:1;
unsigned int done_hp_init:1;
unsigned int no_shutup_pins:1;
unsigned int ultra_low_power:1;
unsigned int has_hs_key:1;
unsigned int no_internal_mic_pin:1;
unsigned int en_3kpull_low:1;
/* for PLL fix */
hda_nid_t pll_nid;
unsigned int pll_coef_idx, pll_coef_bit;
unsigned int coef0;
struct input_dev *kb_dev;
u8 alc_mute_keycode_map[1];
/* component binding */
struct component_match *match;
struct hda_component comps[HDA_MAX_COMPONENTS];
};
/*
* COEF access helper functions
*/
static void coef_mutex_lock(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
snd_hda_power_up_pm(codec);
mutex_lock(&spec->coef_mutex);
}
static void coef_mutex_unlock(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
mutex_unlock(&spec->coef_mutex);
snd_hda_power_down_pm(codec);
}
static int __alc_read_coefex_idx(struct hda_codec *codec, hda_nid_t nid,
unsigned int coef_idx)
{
unsigned int val;
snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_COEF_INDEX, coef_idx);
val = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PROC_COEF, 0);
return val;
}
static int alc_read_coefex_idx(struct hda_codec *codec, hda_nid_t nid,
unsigned int coef_idx)
{
unsigned int val;
coef_mutex_lock(codec);
val = __alc_read_coefex_idx(codec, nid, coef_idx);
coef_mutex_unlock(codec);
return val;
}
#define alc_read_coef_idx(codec, coef_idx) \
alc_read_coefex_idx(codec, 0x20, coef_idx)
static void __alc_write_coefex_idx(struct hda_codec *codec, hda_nid_t nid,
unsigned int coef_idx, unsigned int coef_val)
{
snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_COEF_INDEX, coef_idx);
snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_PROC_COEF, coef_val);
}
static void alc_write_coefex_idx(struct hda_codec *codec, hda_nid_t nid,
unsigned int coef_idx, unsigned int coef_val)
{
coef_mutex_lock(codec);
__alc_write_coefex_idx(codec, nid, coef_idx, coef_val);
coef_mutex_unlock(codec);
}
#define alc_write_coef_idx(codec, coef_idx, coef_val) \
alc_write_coefex_idx(codec, 0x20, coef_idx, coef_val)
static void __alc_update_coefex_idx(struct hda_codec *codec, hda_nid_t nid,
unsigned int coef_idx, unsigned int mask,
unsigned int bits_set)
{
unsigned int val = __alc_read_coefex_idx(codec, nid, coef_idx);
if (val != -1)
__alc_write_coefex_idx(codec, nid, coef_idx,
(val & ~mask) | bits_set);
}
static void alc_update_coefex_idx(struct hda_codec *codec, hda_nid_t nid,
unsigned int coef_idx, unsigned int mask,
unsigned int bits_set)
{
coef_mutex_lock(codec);
__alc_update_coefex_idx(codec, nid, coef_idx, mask, bits_set);
coef_mutex_unlock(codec);
}
#define alc_update_coef_idx(codec, coef_idx, mask, bits_set) \
alc_update_coefex_idx(codec, 0x20, coef_idx, mask, bits_set)
/* a special bypass for COEF 0; read the cached value at the second time */
static unsigned int alc_get_coef0(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
if (!spec->coef0)
spec->coef0 = alc_read_coef_idx(codec, 0);
return spec->coef0;
}
/* coef writes/updates batch */
struct coef_fw {
unsigned char nid;
unsigned char idx;
unsigned short mask;
unsigned short val;
};
#define UPDATE_COEFEX(_nid, _idx, _mask, _val) \
{ .nid = (_nid), .idx = (_idx), .mask = (_mask), .val = (_val) }
#define WRITE_COEFEX(_nid, _idx, _val) UPDATE_COEFEX(_nid, _idx, -1, _val)
#define WRITE_COEF(_idx, _val) WRITE_COEFEX(0x20, _idx, _val)
#define UPDATE_COEF(_idx, _mask, _val) UPDATE_COEFEX(0x20, _idx, _mask, _val)
static void alc_process_coef_fw(struct hda_codec *codec,
const struct coef_fw *fw)
{
coef_mutex_lock(codec);
for (; fw->nid; fw++) {
if (fw->mask == (unsigned short)-1)
__alc_write_coefex_idx(codec, fw->nid, fw->idx, fw->val);
else
__alc_update_coefex_idx(codec, fw->nid, fw->idx,
fw->mask, fw->val);
}
coef_mutex_unlock(codec);
}
/*
* GPIO setup tables, used in initialization
*/
/* Enable GPIO mask and set output */
static void alc_setup_gpio(struct hda_codec *codec, unsigned int mask)
{
struct alc_spec *spec = codec->spec;
spec->gpio_mask |= mask;
spec->gpio_dir |= mask;
spec->gpio_data |= mask;
}
static void alc_write_gpio_data(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA,
spec->gpio_data);
}
static void alc_update_gpio_data(struct hda_codec *codec, unsigned int mask,
bool on)
{
struct alc_spec *spec = codec->spec;
unsigned int oldval = spec->gpio_data;
if (on)
spec->gpio_data |= mask;
else
spec->gpio_data &= ~mask;
if (oldval != spec->gpio_data)
alc_write_gpio_data(codec);
}
static void alc_write_gpio(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
if (!spec->gpio_mask)
return;
snd_hda_codec_write(codec, codec->core.afg, 0,
AC_VERB_SET_GPIO_MASK, spec->gpio_mask);
snd_hda_codec_write(codec, codec->core.afg, 0,
AC_VERB_SET_GPIO_DIRECTION, spec->gpio_dir);
if (spec->gpio_write_delay)
msleep(1);
alc_write_gpio_data(codec);
}
static void alc_fixup_gpio(struct hda_codec *codec, int action,
unsigned int mask)
{
if (action == HDA_FIXUP_ACT_PRE_PROBE)
alc_setup_gpio(codec, mask);
}
static void alc_fixup_gpio1(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
alc_fixup_gpio(codec, action, 0x01);
}
static void alc_fixup_gpio2(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
alc_fixup_gpio(codec, action, 0x02);
}
static void alc_fixup_gpio3(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
alc_fixup_gpio(codec, action, 0x03);
}
static void alc_fixup_gpio4(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
alc_fixup_gpio(codec, action, 0x04);
}
static void alc_fixup_micmute_led(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
if (action == HDA_FIXUP_ACT_PRE_PROBE)
snd_hda_gen_add_micmute_led_cdev(codec, NULL);
}
/*
* Fix hardware PLL issue
* On some codecs, the analog PLL gating control must be off while
* the default value is 1.
*/
static void alc_fix_pll(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
if (spec->pll_nid)
alc_update_coefex_idx(codec, spec->pll_nid, spec->pll_coef_idx,
1 << spec->pll_coef_bit, 0);
}
static void alc_fix_pll_init(struct hda_codec *codec, hda_nid_t nid,
unsigned int coef_idx, unsigned int coef_bit)
{
struct alc_spec *spec = codec->spec;
spec->pll_nid = nid;
spec->pll_coef_idx = coef_idx;
spec->pll_coef_bit = coef_bit;
alc_fix_pll(codec);
}
/* update the master volume per volume-knob's unsol event */
static void alc_update_knob_master(struct hda_codec *codec,
struct hda_jack_callback *jack)
{
unsigned int val;
struct snd_kcontrol *kctl;
struct snd_ctl_elem_value *uctl;
kctl = snd_hda_find_mixer_ctl(codec, "Master Playback Volume");
if (!kctl)
return;
uctl = kzalloc(sizeof(*uctl), GFP_KERNEL);
if (!uctl)
return;
val = snd_hda_codec_read(codec, jack->nid, 0,
AC_VERB_GET_VOLUME_KNOB_CONTROL, 0);
val &= HDA_AMP_VOLMASK;
uctl->value.integer.value[0] = val;
uctl->value.integer.value[1] = val;
kctl->put(kctl, uctl);
kfree(uctl);
}
static void alc880_unsol_event(struct hda_codec *codec, unsigned int res)
{
/* For some reason, the res given from ALC880 is broken.
Here we adjust it properly. */
snd_hda_jack_unsol_event(codec, res >> 2);
}
/* Change EAPD to verb control */
static void alc_fill_eapd_coef(struct hda_codec *codec)
{
int coef;
coef = alc_get_coef0(codec);
switch (codec->core.vendor_id) {
case 0x10ec0262:
alc_update_coef_idx(codec, 0x7, 0, 1<<5);
break;
case 0x10ec0267:
case 0x10ec0268:
alc_update_coef_idx(codec, 0x7, 0, 1<<13);
break;
case 0x10ec0269:
if ((coef & 0x00f0) == 0x0010)
alc_update_coef_idx(codec, 0xd, 0, 1<<14);
if ((coef & 0x00f0) == 0x0020)
alc_update_coef_idx(codec, 0x4, 1<<15, 0);
if ((coef & 0x00f0) == 0x0030)
alc_update_coef_idx(codec, 0x10, 1<<9, 0);
break;
case 0x10ec0280:
case 0x10ec0284:
case 0x10ec0290:
case 0x10ec0292:
alc_update_coef_idx(codec, 0x4, 1<<15, 0);
break;
case 0x10ec0225:
case 0x10ec0295:
case 0x10ec0299:
alc_update_coef_idx(codec, 0x67, 0xf000, 0x3000);
fallthrough;
case 0x10ec0215:
case 0x10ec0230:
case 0x10ec0233:
case 0x10ec0235:
case 0x10ec0236:
case 0x10ec0245:
case 0x10ec0255:
case 0x10ec0256:
case 0x19e58326:
case 0x10ec0257:
case 0x10ec0282:
case 0x10ec0283:
case 0x10ec0286:
case 0x10ec0288:
case 0x10ec0285:
case 0x10ec0298:
case 0x10ec0289:
case 0x10ec0300:
alc_update_coef_idx(codec, 0x10, 1<<9, 0);
break;
case 0x10ec0275:
alc_update_coef_idx(codec, 0xe, 0, 1<<0);
break;
case 0x10ec0287:
alc_update_coef_idx(codec, 0x10, 1<<9, 0);
alc_write_coef_idx(codec, 0x8, 0x4ab7);
break;
case 0x10ec0293:
alc_update_coef_idx(codec, 0xa, 1<<13, 0);
break;
case 0x10ec0234:
case 0x10ec0274:
case 0x10ec0294:
case 0x10ec0700:
case 0x10ec0701:
case 0x10ec0703:
case 0x10ec0711:
alc_update_coef_idx(codec, 0x10, 1<<15, 0);
break;
case 0x10ec0662:
if ((coef & 0x00f0) == 0x0030)
alc_update_coef_idx(codec, 0x4, 1<<10, 0); /* EAPD Ctrl */
break;
case 0x10ec0272:
case 0x10ec0273:
case 0x10ec0663:
case 0x10ec0665:
case 0x10ec0670:
case 0x10ec0671:
case 0x10ec0672:
alc_update_coef_idx(codec, 0xd, 0, 1<<14); /* EAPD Ctrl */
break;
case 0x10ec0222:
case 0x10ec0623:
alc_update_coef_idx(codec, 0x19, 1<<13, 0);
break;
case 0x10ec0668:
alc_update_coef_idx(codec, 0x7, 3<<13, 0);
break;
case 0x10ec0867:
alc_update_coef_idx(codec, 0x4, 1<<10, 0);
break;
case 0x10ec0888:
if ((coef & 0x00f0) == 0x0020 || (coef & 0x00f0) == 0x0030)
alc_update_coef_idx(codec, 0x7, 1<<5, 0);
break;
case 0x10ec0892:
case 0x10ec0897:
alc_update_coef_idx(codec, 0x7, 1<<5, 0);
break;
case 0x10ec0899:
case 0x10ec0900:
case 0x10ec0b00:
case 0x10ec1168:
case 0x10ec1220:
alc_update_coef_idx(codec, 0x7, 1<<1, 0);
break;
}
}
/* additional initialization for ALC888 variants */
static void alc888_coef_init(struct hda_codec *codec)
{
switch (alc_get_coef0(codec) & 0x00f0) {
/* alc888-VA */
case 0x00:
/* alc888-VB */
case 0x10:
alc_update_coef_idx(codec, 7, 0, 0x2030); /* Turn EAPD to High */
break;
}
}
/* turn on/off EAPD control (only if available) */
static void set_eapd(struct hda_codec *codec, hda_nid_t nid, int on)
{
if (get_wcaps_type(get_wcaps(codec, nid)) != AC_WID_PIN)
return;
if (snd_hda_query_pin_caps(codec, nid) & AC_PINCAP_EAPD)
snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
on ? 2 : 0);
}
/* turn on/off EAPD controls of the codec */
static void alc_auto_setup_eapd(struct hda_codec *codec, bool on)
{
/* We currently only handle front, HP */
static const hda_nid_t pins[] = {
0x0f, 0x10, 0x14, 0x15, 0x17, 0
};
const hda_nid_t *p;
for (p = pins; *p; p++)
set_eapd(codec, *p, on);
}
static int find_ext_mic_pin(struct hda_codec *codec);
static void alc_headset_mic_no_shutup(struct hda_codec *codec)
{
const struct hda_pincfg *pin;
int mic_pin = find_ext_mic_pin(codec);
int i;
/* don't shut up pins when unloading the driver; otherwise it breaks
* the default pin setup at the next load of the driver
*/
if (codec->bus->shutdown)
return;
snd_array_for_each(&codec->init_pins, i, pin) {
/* use read here for syncing after issuing each verb */
if (pin->nid != mic_pin)
snd_hda_codec_read(codec, pin->nid, 0,
AC_VERB_SET_PIN_WIDGET_CONTROL, 0);
}
codec->pins_shutup = 1;
}
static void alc_shutup_pins(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
switch (codec->core.vendor_id) {
case 0x10ec0236:
case 0x10ec0256:
case 0x19e58326:
case 0x10ec0283:
case 0x10ec0286:
case 0x10ec0288:
case 0x10ec0298:
alc_headset_mic_no_shutup(codec);
break;
default:
if (!spec->no_shutup_pins)
snd_hda_shutup_pins(codec);
break;
}
}
/* generic shutup callback;
* just turning off EAPD and a little pause for avoiding pop-noise
*/
static void alc_eapd_shutup(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
alc_auto_setup_eapd(codec, false);
if (!spec->no_depop_delay)
msleep(200);
alc_shutup_pins(codec);
}
/* generic EAPD initialization */
static void alc_auto_init_amp(struct hda_codec *codec, int type)
{
alc_auto_setup_eapd(codec, true);
alc_write_gpio(codec);
switch (type) {
case ALC_INIT_DEFAULT:
switch (codec->core.vendor_id) {
case 0x10ec0260:
alc_update_coefex_idx(codec, 0x1a, 7, 0, 0x2010);
break;
case 0x10ec0880:
case 0x10ec0882:
case 0x10ec0883:
case 0x10ec0885:
alc_update_coef_idx(codec, 7, 0, 0x2030);
break;
case 0x10ec0888:
alc888_coef_init(codec);
break;
}
break;
}
}
/* get a primary headphone pin if available */
static hda_nid_t alc_get_hp_pin(struct alc_spec *spec)
{
if (spec->gen.autocfg.hp_pins[0])
return spec->gen.autocfg.hp_pins[0];
if (spec->gen.autocfg.line_out_type == AC_JACK_HP_OUT)
return spec->gen.autocfg.line_out_pins[0];
return 0;
}
/*
* Realtek SSID verification
*/
/* Could be any non-zero and even value. When used as fixup, tells
* the driver to ignore any present sku defines.
*/
#define ALC_FIXUP_SKU_IGNORE (2)
static void alc_fixup_sku_ignore(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
spec->cdefine.fixup = 1;
spec->cdefine.sku_cfg = ALC_FIXUP_SKU_IGNORE;
}
}
static void alc_fixup_no_depop_delay(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
if (action == HDA_FIXUP_ACT_PROBE) {
spec->no_depop_delay = 1;
codec->depop_delay = 0;
}
}
static int alc_auto_parse_customize_define(struct hda_codec *codec)
{
unsigned int ass, tmp, i;
unsigned nid = 0;
struct alc_spec *spec = codec->spec;
spec->cdefine.enable_pcbeep = 1; /* assume always enabled */
if (spec->cdefine.fixup) {
ass = spec->cdefine.sku_cfg;
if (ass == ALC_FIXUP_SKU_IGNORE)
return -1;
goto do_sku;
}
if (!codec->bus->pci)
return -1;
ass = codec->core.subsystem_id & 0xffff;
if (ass != codec->bus->pci->subsystem_device && (ass & 1))
goto do_sku;
nid = 0x1d;
if (codec->core.vendor_id == 0x10ec0260)
nid = 0x17;
ass = snd_hda_codec_get_pincfg(codec, nid);
if (!(ass & 1)) {
codec_info(codec, "%s: SKU not ready 0x%08x\n",
codec->core.chip_name, ass);
return -1;
}
/* check sum */
tmp = 0;
for (i = 1; i < 16; i++) {
if ((ass >> i) & 1)
tmp++;
}
if (((ass >> 16) & 0xf) != tmp)
return -1;
spec->cdefine.port_connectivity = ass >> 30;
spec->cdefine.enable_pcbeep = (ass & 0x100000) >> 20;
spec->cdefine.check_sum = (ass >> 16) & 0xf;
spec->cdefine.customization = ass >> 8;
do_sku:
spec->cdefine.sku_cfg = ass;
spec->cdefine.external_amp = (ass & 0x38) >> 3;
spec->cdefine.platform_type = (ass & 0x4) >> 2;
spec->cdefine.swap = (ass & 0x2) >> 1;
spec->cdefine.override = ass & 0x1;
codec_dbg(codec, "SKU: Nid=0x%x sku_cfg=0x%08x\n",
nid, spec->cdefine.sku_cfg);
codec_dbg(codec, "SKU: port_connectivity=0x%x\n",
spec->cdefine.port_connectivity);
codec_dbg(codec, "SKU: enable_pcbeep=0x%x\n", spec->cdefine.enable_pcbeep);
codec_dbg(codec, "SKU: check_sum=0x%08x\n", spec->cdefine.check_sum);
codec_dbg(codec, "SKU: customization=0x%08x\n", spec->cdefine.customization);
codec_dbg(codec, "SKU: external_amp=0x%x\n", spec->cdefine.external_amp);
codec_dbg(codec, "SKU: platform_type=0x%x\n", spec->cdefine.platform_type);
codec_dbg(codec, "SKU: swap=0x%x\n", spec->cdefine.swap);
codec_dbg(codec, "SKU: override=0x%x\n", spec->cdefine.override);
return 0;
}
/* return the position of NID in the list, or -1 if not found */
static int find_idx_in_nid_list(hda_nid_t nid, const hda_nid_t *list, int nums)
{
int i;
for (i = 0; i < nums; i++)
if (list[i] == nid)
return i;
return -1;
}
/* return true if the given NID is found in the list */
static bool found_in_nid_list(hda_nid_t nid, const hda_nid_t *list, int nums)
{
return find_idx_in_nid_list(nid, list, nums) >= 0;
}
/* check subsystem ID and set up device-specific initialization;
* return 1 if initialized, 0 if invalid SSID
*/
/* 32-bit subsystem ID for BIOS loading in HD Audio codec.
* 31 ~ 16 : Manufacture ID
* 15 ~ 8 : SKU ID
* 7 ~ 0 : Assembly ID
* port-A --> pin 39/41, port-E --> pin 14/15, port-D --> pin 35/36
*/
static int alc_subsystem_id(struct hda_codec *codec, const hda_nid_t *ports)
{
unsigned int ass, tmp, i;
unsigned nid;
struct alc_spec *spec = codec->spec;
if (spec->cdefine.fixup) {
ass = spec->cdefine.sku_cfg;
if (ass == ALC_FIXUP_SKU_IGNORE)
return 0;
goto do_sku;
}
ass = codec->core.subsystem_id & 0xffff;
if (codec->bus->pci &&
ass != codec->bus->pci->subsystem_device && (ass & 1))
goto do_sku;
/* invalid SSID, check the special NID pin defcfg instead */
/*
* 31~30 : port connectivity
* 29~21 : reserve
* 20 : PCBEEP input
* 19~16 : Check sum (15:1)
* 15~1 : Custom
* 0 : override
*/
nid = 0x1d;
if (codec->core.vendor_id == 0x10ec0260)
nid = 0x17;
ass = snd_hda_codec_get_pincfg(codec, nid);
codec_dbg(codec,
"realtek: No valid SSID, checking pincfg 0x%08x for NID 0x%x\n",
ass, nid);
if (!(ass & 1))
return 0;
if ((ass >> 30) != 1) /* no physical connection */
return 0;
/* check sum */
tmp = 0;
for (i = 1; i < 16; i++) {
if ((ass >> i) & 1)
tmp++;
}
if (((ass >> 16) & 0xf) != tmp)
return 0;
do_sku:
codec_dbg(codec, "realtek: Enabling init ASM_ID=0x%04x CODEC_ID=%08x\n",
ass & 0xffff, codec->core.vendor_id);
/*
* 0 : override
* 1 : Swap Jack
* 2 : 0 --> Desktop, 1 --> Laptop
* 3~5 : External Amplifier control
* 7~6 : Reserved
*/
tmp = (ass & 0x38) >> 3; /* external Amp control */
if (spec->init_amp == ALC_INIT_UNDEFINED) {
switch (tmp) {
case 1:
alc_setup_gpio(codec, 0x01);
break;
case 3:
alc_setup_gpio(codec, 0x02);
break;
case 7:
alc_setup_gpio(codec, 0x04);
break;
case 5:
default:
spec->init_amp = ALC_INIT_DEFAULT;
break;
}
}
/* is laptop or Desktop and enable the function "Mute internal speaker
* when the external headphone out jack is plugged"
*/
if (!(ass & 0x8000))
return 1;
/*
* 10~8 : Jack location
* 12~11: Headphone out -> 00: PortA, 01: PortE, 02: PortD, 03: Resvered
* 14~13: Resvered
* 15 : 1 --> enable the function "Mute internal speaker
* when the external headphone out jack is plugged"
*/
if (!alc_get_hp_pin(spec)) {
hda_nid_t nid;
tmp = (ass >> 11) & 0x3; /* HP to chassis */
nid = ports[tmp];
if (found_in_nid_list(nid, spec->gen.autocfg.line_out_pins,
spec->gen.autocfg.line_outs))
return 1;
spec->gen.autocfg.hp_pins[0] = nid;
}
return 1;
}
/* Check the validity of ALC subsystem-id
* ports contains an array of 4 pin NIDs for port-A, E, D and I */
static void alc_ssid_check(struct hda_codec *codec, const hda_nid_t *ports)
{
if (!alc_subsystem_id(codec, ports)) {
struct alc_spec *spec = codec->spec;
if (spec->init_amp == ALC_INIT_UNDEFINED) {
codec_dbg(codec,
"realtek: Enable default setup for auto mode as fallback\n");
spec->init_amp = ALC_INIT_DEFAULT;
}
}
}
/*
*/
static void alc_fixup_inv_dmic(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
spec->gen.inv_dmic_split = 1;
}
static int alc_build_controls(struct hda_codec *codec)
{
int err;
err = snd_hda_gen_build_controls(codec);
if (err < 0)
return err;
snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_BUILD);
return 0;
}
/*
* Common callbacks
*/
static void alc_pre_init(struct hda_codec *codec)
{
alc_fill_eapd_coef(codec);
}
#define is_s3_resume(codec) \
((codec)->core.dev.power.power_state.event == PM_EVENT_RESUME)
#define is_s4_resume(codec) \
((codec)->core.dev.power.power_state.event == PM_EVENT_RESTORE)
static int alc_init(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
/* hibernation resume needs the full chip initialization */
if (is_s4_resume(codec))
alc_pre_init(codec);
if (spec->init_hook)
spec->init_hook(codec);
spec->gen.skip_verbs = 1; /* applied in below */
snd_hda_gen_init(codec);
alc_fix_pll(codec);
alc_auto_init_amp(codec, spec->init_amp);
snd_hda_apply_verbs(codec); /* apply verbs here after own init */
snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_INIT);
return 0;
}
#define alc_free snd_hda_gen_free
#ifdef CONFIG_PM
static inline void alc_shutup(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
if (!snd_hda_get_bool_hint(codec, "shutup"))
return; /* disabled explicitly by hints */
if (spec && spec->shutup)
spec->shutup(codec);
else
alc_shutup_pins(codec);
}
static void alc_power_eapd(struct hda_codec *codec)
{
alc_auto_setup_eapd(codec, false);
}
static int alc_suspend(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
alc_shutup(codec);
if (spec && spec->power_hook)
spec->power_hook(codec);
return 0;
}
static int alc_resume(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
if (!spec->no_depop_delay)
msleep(150); /* to avoid pop noise */
codec->patch_ops.init(codec);
snd_hda_regmap_sync(codec);
hda_call_check_power_status(codec, 0x01);
return 0;
}
#endif
/*
*/
static const struct hda_codec_ops alc_patch_ops = {
.build_controls = alc_build_controls,
.build_pcms = snd_hda_gen_build_pcms,
.init = alc_init,
.free = alc_free,
.unsol_event = snd_hda_jack_unsol_event,
#ifdef CONFIG_PM
.resume = alc_resume,
.suspend = alc_suspend,
.check_power_status = snd_hda_gen_check_power_status,
#endif
};
#define alc_codec_rename(codec, name) snd_hda_codec_set_name(codec, name)
/*
* Rename codecs appropriately from COEF value or subvendor id
*/
struct alc_codec_rename_table {
unsigned int vendor_id;
unsigned short coef_mask;
unsigned short coef_bits;
const char *name;
};
struct alc_codec_rename_pci_table {
unsigned int codec_vendor_id;
unsigned short pci_subvendor;
unsigned short pci_subdevice;
const char *name;
};
static const struct alc_codec_rename_table rename_tbl[] = {
{ 0x10ec0221, 0xf00f, 0x1003, "ALC231" },
{ 0x10ec0269, 0xfff0, 0x3010, "ALC277" },
{ 0x10ec0269, 0xf0f0, 0x2010, "ALC259" },
{ 0x10ec0269, 0xf0f0, 0x3010, "ALC258" },
{ 0x10ec0269, 0x00f0, 0x0010, "ALC269VB" },
{ 0x10ec0269, 0xffff, 0xa023, "ALC259" },
{ 0x10ec0269, 0xffff, 0x6023, "ALC281X" },
{ 0x10ec0269, 0x00f0, 0x0020, "ALC269VC" },
{ 0x10ec0269, 0x00f0, 0x0030, "ALC269VD" },
{ 0x10ec0662, 0xffff, 0x4020, "ALC656" },
{ 0x10ec0887, 0x00f0, 0x0030, "ALC887-VD" },
{ 0x10ec0888, 0x00f0, 0x0030, "ALC888-VD" },
{ 0x10ec0888, 0xf0f0, 0x3020, "ALC886" },
{ 0x10ec0899, 0x2000, 0x2000, "ALC899" },
{ 0x10ec0892, 0xffff, 0x8020, "ALC661" },
{ 0x10ec0892, 0xffff, 0x8011, "ALC661" },
{ 0x10ec0892, 0xffff, 0x4011, "ALC656" },
{ } /* terminator */
};
static const struct alc_codec_rename_pci_table rename_pci_tbl[] = {
{ 0x10ec0280, 0x1028, 0, "ALC3220" },
{ 0x10ec0282, 0x1028, 0, "ALC3221" },
{ 0x10ec0283, 0x1028, 0, "ALC3223" },
{ 0x10ec0288, 0x1028, 0, "ALC3263" },
{ 0x10ec0292, 0x1028, 0, "ALC3226" },
{ 0x10ec0293, 0x1028, 0, "ALC3235" },
{ 0x10ec0255, 0x1028, 0, "ALC3234" },
{ 0x10ec0668, 0x1028, 0, "ALC3661" },
{ 0x10ec0275, 0x1028, 0, "ALC3260" },
{ 0x10ec0899, 0x1028, 0, "ALC3861" },
{ 0x10ec0298, 0x1028, 0, "ALC3266" },
{ 0x10ec0236, 0x1028, 0, "ALC3204" },
{ 0x10ec0256, 0x1028, 0, "ALC3246" },
{ 0x10ec0225, 0x1028, 0, "ALC3253" },
{ 0x10ec0295, 0x1028, 0, "ALC3254" },
{ 0x10ec0299, 0x1028, 0, "ALC3271" },
{ 0x10ec0670, 0x1025, 0, "ALC669X" },
{ 0x10ec0676, 0x1025, 0, "ALC679X" },
{ 0x10ec0282, 0x1043, 0, "ALC3229" },
{ 0x10ec0233, 0x1043, 0, "ALC3236" },
{ 0x10ec0280, 0x103c, 0, "ALC3228" },
{ 0x10ec0282, 0x103c, 0, "ALC3227" },
{ 0x10ec0286, 0x103c, 0, "ALC3242" },
{ 0x10ec0290, 0x103c, 0, "ALC3241" },
{ 0x10ec0668, 0x103c, 0, "ALC3662" },
{ 0x10ec0283, 0x17aa, 0, "ALC3239" },
{ 0x10ec0292, 0x17aa, 0, "ALC3232" },
{ } /* terminator */
};
static int alc_codec_rename_from_preset(struct hda_codec *codec)
{
const struct alc_codec_rename_table *p;
const struct alc_codec_rename_pci_table *q;
for (p = rename_tbl; p->vendor_id; p++) {
if (p->vendor_id != codec->core.vendor_id)
continue;
if ((alc_get_coef0(codec) & p->coef_mask) == p->coef_bits)
return alc_codec_rename(codec, p->name);
}
if (!codec->bus->pci)
return 0;
for (q = rename_pci_tbl; q->codec_vendor_id; q++) {
if (q->codec_vendor_id != codec->core.vendor_id)
continue;
if (q->pci_subvendor != codec->bus->pci->subsystem_vendor)
continue;
if (!q->pci_subdevice ||
q->pci_subdevice == codec->bus->pci->subsystem_device)
return alc_codec_rename(codec, q->name);
}
return 0;
}
/*
* Digital-beep handlers
*/
#ifdef CONFIG_SND_HDA_INPUT_BEEP
/* additional beep mixers; private_value will be overwritten */
static const struct snd_kcontrol_new alc_beep_mixer[] = {
HDA_CODEC_VOLUME("Beep Playback Volume", 0, 0, HDA_INPUT),
HDA_CODEC_MUTE_BEEP("Beep Playback Switch", 0, 0, HDA_INPUT),
};
/* set up and create beep controls */
static int set_beep_amp(struct alc_spec *spec, hda_nid_t nid,
int idx, int dir)
{
struct snd_kcontrol_new *knew;
unsigned int beep_amp = HDA_COMPOSE_AMP_VAL(nid, 3, idx, dir);
int i;
for (i = 0; i < ARRAY_SIZE(alc_beep_mixer); i++) {
knew = snd_hda_gen_add_kctl(&spec->gen, NULL,
&alc_beep_mixer[i]);
if (!knew)
return -ENOMEM;
knew->private_value = beep_amp;
}
return 0;
}
static const struct snd_pci_quirk beep_allow_list[] = {
SND_PCI_QUIRK(0x1043, 0x103c, "ASUS", 1),
SND_PCI_QUIRK(0x1043, 0x115d, "ASUS", 1),
SND_PCI_QUIRK(0x1043, 0x829f, "ASUS", 1),
SND_PCI_QUIRK(0x1043, 0x8376, "EeePC", 1),
SND_PCI_QUIRK(0x1043, 0x83ce, "EeePC", 1),
SND_PCI_QUIRK(0x1043, 0x831a, "EeePC", 1),
SND_PCI_QUIRK(0x1043, 0x834a, "EeePC", 1),
SND_PCI_QUIRK(0x1458, 0xa002, "GA-MA790X", 1),
SND_PCI_QUIRK(0x8086, 0xd613, "Intel", 1),
/* denylist -- no beep available */
SND_PCI_QUIRK(0x17aa, 0x309e, "Lenovo ThinkCentre M73", 0),
SND_PCI_QUIRK(0x17aa, 0x30a3, "Lenovo ThinkCentre M93", 0),
{}
};
static inline int has_cdefine_beep(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
const struct snd_pci_quirk *q;
q = snd_pci_quirk_lookup(codec->bus->pci, beep_allow_list);
if (q)
return q->value;
return spec->cdefine.enable_pcbeep;
}
#else
#define set_beep_amp(spec, nid, idx, dir) 0
#define has_cdefine_beep(codec) 0
#endif
/* parse the BIOS configuration and set up the alc_spec */
/* return 1 if successful, 0 if the proper config is not found,
* or a negative error code
*/
static int alc_parse_auto_config(struct hda_codec *codec,
const hda_nid_t *ignore_nids,
const hda_nid_t *ssid_nids)
{
struct alc_spec *spec = codec->spec;
struct auto_pin_cfg *cfg = &spec->gen.autocfg;
int err;
err = snd_hda_parse_pin_defcfg(codec, cfg, ignore_nids,
spec->parse_flags);
if (err < 0)
return err;
if (ssid_nids)
alc_ssid_check(codec, ssid_nids);
err = snd_hda_gen_parse_auto_config(codec, cfg);
if (err < 0)
return err;
return 1;
}
/* common preparation job for alc_spec */
static int alc_alloc_spec(struct hda_codec *codec, hda_nid_t mixer_nid)
{
struct alc_spec *spec = kzalloc(sizeof(*spec), GFP_KERNEL);
int err;
if (!spec)
return -ENOMEM;
codec->spec = spec;
snd_hda_gen_spec_init(&spec->gen);
spec->gen.mixer_nid = mixer_nid;
spec->gen.own_eapd_ctl = 1;
codec->single_adc_amp = 1;
/* FIXME: do we need this for all Realtek codec models? */
codec->spdif_status_reset = 1;
codec->forced_resume = 1;
codec->patch_ops = alc_patch_ops;
mutex_init(&spec->coef_mutex);
err = alc_codec_rename_from_preset(codec);
if (err < 0) {
kfree(spec);
return err;
}
return 0;
}
static int alc880_parse_auto_config(struct hda_codec *codec)
{
static const hda_nid_t alc880_ignore[] = { 0x1d, 0 };
static const hda_nid_t alc880_ssids[] = { 0x15, 0x1b, 0x14, 0 };
return alc_parse_auto_config(codec, alc880_ignore, alc880_ssids);
}
/*
* ALC880 fix-ups
*/
enum {
ALC880_FIXUP_GPIO1,
ALC880_FIXUP_GPIO2,
ALC880_FIXUP_MEDION_RIM,
ALC880_FIXUP_LG,
ALC880_FIXUP_LG_LW25,
ALC880_FIXUP_W810,
ALC880_FIXUP_EAPD_COEF,
ALC880_FIXUP_TCL_S700,
ALC880_FIXUP_VOL_KNOB,
ALC880_FIXUP_FUJITSU,
ALC880_FIXUP_F1734,
ALC880_FIXUP_UNIWILL,
ALC880_FIXUP_UNIWILL_DIG,
ALC880_FIXUP_Z71V,
ALC880_FIXUP_ASUS_W5A,
ALC880_FIXUP_3ST_BASE,
ALC880_FIXUP_3ST,
ALC880_FIXUP_3ST_DIG,
ALC880_FIXUP_5ST_BASE,
ALC880_FIXUP_5ST,
ALC880_FIXUP_5ST_DIG,
ALC880_FIXUP_6ST_BASE,
ALC880_FIXUP_6ST,
ALC880_FIXUP_6ST_DIG,
ALC880_FIXUP_6ST_AUTOMUTE,
};
/* enable the volume-knob widget support on NID 0x21 */
static void alc880_fixup_vol_knob(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
if (action == HDA_FIXUP_ACT_PROBE)
snd_hda_jack_detect_enable_callback(codec, 0x21,
alc_update_knob_master);
}
static const struct hda_fixup alc880_fixups[] = {
[ALC880_FIXUP_GPIO1] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_gpio1,
},
[ALC880_FIXUP_GPIO2] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_gpio2,
},
[ALC880_FIXUP_MEDION_RIM] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x07 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x3060 },
{ }
},
.chained = true,
.chain_id = ALC880_FIXUP_GPIO2,
},
[ALC880_FIXUP_LG] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
/* disable bogus unused pins */
{ 0x16, 0x411111f0 },
{ 0x18, 0x411111f0 },
{ 0x1a, 0x411111f0 },
{ }
}
},
[ALC880_FIXUP_LG_LW25] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x1a, 0x0181344f }, /* line-in */
{ 0x1b, 0x0321403f }, /* headphone */
{ }
}
},
[ALC880_FIXUP_W810] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
/* disable bogus unused pins */
{ 0x17, 0x411111f0 },
{ }
},
.chained = true,
.chain_id = ALC880_FIXUP_GPIO2,
},
[ALC880_FIXUP_EAPD_COEF] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
/* change to EAPD mode */
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x07 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x3060 },
{}
},
},
[ALC880_FIXUP_TCL_S700] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
/* change to EAPD mode */
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x07 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x3070 },
{}
},
.chained = true,
.chain_id = ALC880_FIXUP_GPIO2,
},
[ALC880_FIXUP_VOL_KNOB] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc880_fixup_vol_knob,
},
[ALC880_FIXUP_FUJITSU] = {
/* override all pins as BIOS on old Amilo is broken */
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x14, 0x0121401f }, /* HP */
{ 0x15, 0x99030120 }, /* speaker */
{ 0x16, 0x99030130 }, /* bass speaker */
{ 0x17, 0x411111f0 }, /* N/A */
{ 0x18, 0x411111f0 }, /* N/A */
{ 0x19, 0x01a19950 }, /* mic-in */
{ 0x1a, 0x411111f0 }, /* N/A */
{ 0x1b, 0x411111f0 }, /* N/A */
{ 0x1c, 0x411111f0 }, /* N/A */
{ 0x1d, 0x411111f0 }, /* N/A */
{ 0x1e, 0x01454140 }, /* SPDIF out */
{ }
},
.chained = true,
.chain_id = ALC880_FIXUP_VOL_KNOB,
},
[ALC880_FIXUP_F1734] = {
/* almost compatible with FUJITSU, but no bass and SPDIF */
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x14, 0x0121401f }, /* HP */
{ 0x15, 0x99030120 }, /* speaker */
{ 0x16, 0x411111f0 }, /* N/A */
{ 0x17, 0x411111f0 }, /* N/A */
{ 0x18, 0x411111f0 }, /* N/A */
{ 0x19, 0x01a19950 }, /* mic-in */
{ 0x1a, 0x411111f0 }, /* N/A */
{ 0x1b, 0x411111f0 }, /* N/A */
{ 0x1c, 0x411111f0 }, /* N/A */
{ 0x1d, 0x411111f0 }, /* N/A */
{ 0x1e, 0x411111f0 }, /* N/A */
{ }
},
.chained = true,
.chain_id = ALC880_FIXUP_VOL_KNOB,
},
[ALC880_FIXUP_UNIWILL] = {
/* need to fix HP and speaker pins to be parsed correctly */
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x14, 0x0121411f }, /* HP */
{ 0x15, 0x99030120 }, /* speaker */
{ 0x16, 0x99030130 }, /* bass speaker */
{ }
},
},
[ALC880_FIXUP_UNIWILL_DIG] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
/* disable bogus unused pins */
{ 0x17, 0x411111f0 },
{ 0x19, 0x411111f0 },
{ 0x1b, 0x411111f0 },
{ 0x1f, 0x411111f0 },
{ }
}
},
[ALC880_FIXUP_Z71V] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
/* set up the whole pins as BIOS is utterly broken */
{ 0x14, 0x99030120 }, /* speaker */
{ 0x15, 0x0121411f }, /* HP */
{ 0x16, 0x411111f0 }, /* N/A */
{ 0x17, 0x411111f0 }, /* N/A */
{ 0x18, 0x01a19950 }, /* mic-in */
{ 0x19, 0x411111f0 }, /* N/A */
{ 0x1a, 0x01813031 }, /* line-in */
{ 0x1b, 0x411111f0 }, /* N/A */
{ 0x1c, 0x411111f0 }, /* N/A */
{ 0x1d, 0x411111f0 }, /* N/A */
{ 0x1e, 0x0144111e }, /* SPDIF */
{ }
}
},
[ALC880_FIXUP_ASUS_W5A] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
/* set up the whole pins as BIOS is utterly broken */
{ 0x14, 0x0121411f }, /* HP */
{ 0x15, 0x411111f0 }, /* N/A */
{ 0x16, 0x411111f0 }, /* N/A */
{ 0x17, 0x411111f0 }, /* N/A */
{ 0x18, 0x90a60160 }, /* mic */
{ 0x19, 0x411111f0 }, /* N/A */
{ 0x1a, 0x411111f0 }, /* N/A */
{ 0x1b, 0x411111f0 }, /* N/A */
{ 0x1c, 0x411111f0 }, /* N/A */
{ 0x1d, 0x411111f0 }, /* N/A */
{ 0x1e, 0xb743111e }, /* SPDIF out */
{ }
},
.chained = true,
.chain_id = ALC880_FIXUP_GPIO1,
},
[ALC880_FIXUP_3ST_BASE] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x14, 0x01014010 }, /* line-out */
{ 0x15, 0x411111f0 }, /* N/A */
{ 0x16, 0x411111f0 }, /* N/A */
{ 0x17, 0x411111f0 }, /* N/A */
{ 0x18, 0x01a19c30 }, /* mic-in */
{ 0x19, 0x0121411f }, /* HP */
{ 0x1a, 0x01813031 }, /* line-in */
{ 0x1b, 0x02a19c40 }, /* front-mic */
{ 0x1c, 0x411111f0 }, /* N/A */
{ 0x1d, 0x411111f0 }, /* N/A */
/* 0x1e is filled in below */
{ 0x1f, 0x411111f0 }, /* N/A */
{ }
}
},
[ALC880_FIXUP_3ST] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x1e, 0x411111f0 }, /* N/A */
{ }
},
.chained = true,
.chain_id = ALC880_FIXUP_3ST_BASE,
},
[ALC880_FIXUP_3ST_DIG] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x1e, 0x0144111e }, /* SPDIF */
{ }
},
.chained = true,
.chain_id = ALC880_FIXUP_3ST_BASE,
},
[ALC880_FIXUP_5ST_BASE] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x14, 0x01014010 }, /* front */
{ 0x15, 0x411111f0 }, /* N/A */
{ 0x16, 0x01011411 }, /* CLFE */
{ 0x17, 0x01016412 }, /* surr */
{ 0x18, 0x01a19c30 }, /* mic-in */
{ 0x19, 0x0121411f }, /* HP */
{ 0x1a, 0x01813031 }, /* line-in */
{ 0x1b, 0x02a19c40 }, /* front-mic */
{ 0x1c, 0x411111f0 }, /* N/A */
{ 0x1d, 0x411111f0 }, /* N/A */
/* 0x1e is filled in below */
{ 0x1f, 0x411111f0 }, /* N/A */
{ }
}
},
[ALC880_FIXUP_5ST] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x1e, 0x411111f0 }, /* N/A */
{ }
},
.chained = true,
.chain_id = ALC880_FIXUP_5ST_BASE,
},
[ALC880_FIXUP_5ST_DIG] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x1e, 0x0144111e }, /* SPDIF */
{ }
},
.chained = true,
.chain_id = ALC880_FIXUP_5ST_BASE,
},
[ALC880_FIXUP_6ST_BASE] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x14, 0x01014010 }, /* front */
{ 0x15, 0x01016412 }, /* surr */
{ 0x16, 0x01011411 }, /* CLFE */
{ 0x17, 0x01012414 }, /* side */
{ 0x18, 0x01a19c30 }, /* mic-in */
{ 0x19, 0x02a19c40 }, /* front-mic */
{ 0x1a, 0x01813031 }, /* line-in */
{ 0x1b, 0x0121411f }, /* HP */
{ 0x1c, 0x411111f0 }, /* N/A */
{ 0x1d, 0x411111f0 }, /* N/A */
/* 0x1e is filled in below */
{ 0x1f, 0x411111f0 }, /* N/A */
{ }
}
},
[ALC880_FIXUP_6ST] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x1e, 0x411111f0 }, /* N/A */
{ }
},
.chained = true,
.chain_id = ALC880_FIXUP_6ST_BASE,
},
[ALC880_FIXUP_6ST_DIG] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x1e, 0x0144111e }, /* SPDIF */
{ }
},
.chained = true,
.chain_id = ALC880_FIXUP_6ST_BASE,
},
[ALC880_FIXUP_6ST_AUTOMUTE] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x1b, 0x0121401f }, /* HP with jack detect */
{ }
},
.chained_before = true,
.chain_id = ALC880_FIXUP_6ST_BASE,
},
};
static const struct snd_pci_quirk alc880_fixup_tbl[] = {
SND_PCI_QUIRK(0x1019, 0x0f69, "Coeus G610P", ALC880_FIXUP_W810),
SND_PCI_QUIRK(0x1043, 0x10c3, "ASUS W5A", ALC880_FIXUP_ASUS_W5A),
SND_PCI_QUIRK(0x1043, 0x1964, "ASUS Z71V", ALC880_FIXUP_Z71V),
SND_PCI_QUIRK_VENDOR(0x1043, "ASUS", ALC880_FIXUP_GPIO1),
SND_PCI_QUIRK(0x147b, 0x1045, "ABit AA8XE", ALC880_FIXUP_6ST_AUTOMUTE),
SND_PCI_QUIRK(0x1558, 0x5401, "Clevo GPIO2", ALC880_FIXUP_GPIO2),
SND_PCI_QUIRK_VENDOR(0x1558, "Clevo", ALC880_FIXUP_EAPD_COEF),
SND_PCI_QUIRK(0x1584, 0x9050, "Uniwill", ALC880_FIXUP_UNIWILL_DIG),
SND_PCI_QUIRK(0x1584, 0x9054, "Uniwill", ALC880_FIXUP_F1734),
SND_PCI_QUIRK(0x1584, 0x9070, "Uniwill", ALC880_FIXUP_UNIWILL),
SND_PCI_QUIRK(0x1584, 0x9077, "Uniwill P53", ALC880_FIXUP_VOL_KNOB),
SND_PCI_QUIRK(0x161f, 0x203d, "W810", ALC880_FIXUP_W810),
SND_PCI_QUIRK(0x161f, 0x205d, "Medion Rim 2150", ALC880_FIXUP_MEDION_RIM),
SND_PCI_QUIRK(0x1631, 0xe011, "PB 13201056", ALC880_FIXUP_6ST_AUTOMUTE),
SND_PCI_QUIRK(0x1734, 0x107c, "FSC Amilo M1437", ALC880_FIXUP_FUJITSU),
SND_PCI_QUIRK(0x1734, 0x1094, "FSC Amilo M1451G", ALC880_FIXUP_FUJITSU),
SND_PCI_QUIRK(0x1734, 0x10ac, "FSC AMILO Xi 1526", ALC880_FIXUP_F1734),
SND_PCI_QUIRK(0x1734, 0x10b0, "FSC Amilo Pi1556", ALC880_FIXUP_FUJITSU),
SND_PCI_QUIRK(0x1854, 0x003b, "LG", ALC880_FIXUP_LG),
SND_PCI_QUIRK(0x1854, 0x005f, "LG P1 Express", ALC880_FIXUP_LG),
SND_PCI_QUIRK(0x1854, 0x0068, "LG w1", ALC880_FIXUP_LG),
SND_PCI_QUIRK(0x1854, 0x0077, "LG LW25", ALC880_FIXUP_LG_LW25),
SND_PCI_QUIRK(0x19db, 0x4188, "TCL S700", ALC880_FIXUP_TCL_S700),
/* Below is the copied entries from alc880_quirks.c.
* It's not quite sure whether BIOS sets the correct pin-config table
* on these machines, thus they are kept to be compatible with
* the old static quirks. Once when it's confirmed to work without
* these overrides, it'd be better to remove.
*/
SND_PCI_QUIRK(0x1019, 0xa880, "ECS", ALC880_FIXUP_5ST_DIG),
SND_PCI_QUIRK(0x1019, 0xa884, "Acer APFV", ALC880_FIXUP_6ST),
SND_PCI_QUIRK(0x1025, 0x0070, "ULI", ALC880_FIXUP_3ST_DIG),
SND_PCI_QUIRK(0x1025, 0x0077, "ULI", ALC880_FIXUP_6ST_DIG),
SND_PCI_QUIRK(0x1025, 0x0078, "ULI", ALC880_FIXUP_6ST_DIG),
SND_PCI_QUIRK(0x1025, 0x0087, "ULI", ALC880_FIXUP_6ST_DIG),
SND_PCI_QUIRK(0x1025, 0xe309, "ULI", ALC880_FIXUP_3ST_DIG),
SND_PCI_QUIRK(0x1025, 0xe310, "ULI", ALC880_FIXUP_3ST),
SND_PCI_QUIRK(0x1039, 0x1234, NULL, ALC880_FIXUP_6ST_DIG),
SND_PCI_QUIRK(0x104d, 0x81a0, "Sony", ALC880_FIXUP_3ST),
SND_PCI_QUIRK(0x104d, 0x81d6, "Sony", ALC880_FIXUP_3ST),
SND_PCI_QUIRK(0x107b, 0x3032, "Gateway", ALC880_FIXUP_5ST),
SND_PCI_QUIRK(0x107b, 0x3033, "Gateway", ALC880_FIXUP_5ST),
SND_PCI_QUIRK(0x107b, 0x4039, "Gateway", ALC880_FIXUP_5ST),
SND_PCI_QUIRK(0x1297, 0xc790, "Shuttle ST20G5", ALC880_FIXUP_6ST_DIG),
SND_PCI_QUIRK(0x1458, 0xa102, "Gigabyte K8", ALC880_FIXUP_6ST_DIG),
SND_PCI_QUIRK(0x1462, 0x1150, "MSI", ALC880_FIXUP_6ST_DIG),
SND_PCI_QUIRK(0x1509, 0x925d, "FIC P4M", ALC880_FIXUP_6ST_DIG),
SND_PCI_QUIRK(0x1565, 0x8202, "Biostar", ALC880_FIXUP_5ST_DIG),
SND_PCI_QUIRK(0x1695, 0x400d, "EPoX", ALC880_FIXUP_5ST_DIG),
SND_PCI_QUIRK(0x1695, 0x4012, "EPox EP-5LDA", ALC880_FIXUP_5ST_DIG),
SND_PCI_QUIRK(0x2668, 0x8086, NULL, ALC880_FIXUP_6ST_DIG), /* broken BIOS */
SND_PCI_QUIRK(0x8086, 0x2668, NULL, ALC880_FIXUP_6ST_DIG),
SND_PCI_QUIRK(0x8086, 0xa100, "Intel mobo", ALC880_FIXUP_5ST_DIG),
SND_PCI_QUIRK(0x8086, 0xd400, "Intel mobo", ALC880_FIXUP_5ST_DIG),
SND_PCI_QUIRK(0x8086, 0xd401, "Intel mobo", ALC880_FIXUP_5ST_DIG),
SND_PCI_QUIRK(0x8086, 0xd402, "Intel mobo", ALC880_FIXUP_3ST_DIG),
SND_PCI_QUIRK(0x8086, 0xe224, "Intel mobo", ALC880_FIXUP_5ST_DIG),
SND_PCI_QUIRK(0x8086, 0xe305, "Intel mobo", ALC880_FIXUP_3ST_DIG),
SND_PCI_QUIRK(0x8086, 0xe308, "Intel mobo", ALC880_FIXUP_3ST_DIG),
SND_PCI_QUIRK(0x8086, 0xe400, "Intel mobo", ALC880_FIXUP_5ST_DIG),
SND_PCI_QUIRK(0x8086, 0xe401, "Intel mobo", ALC880_FIXUP_5ST_DIG),
SND_PCI_QUIRK(0x8086, 0xe402, "Intel mobo", ALC880_FIXUP_5ST_DIG),
/* default Intel */
SND_PCI_QUIRK_VENDOR(0x8086, "Intel mobo", ALC880_FIXUP_3ST),
SND_PCI_QUIRK(0xa0a0, 0x0560, "AOpen i915GMm-HFS", ALC880_FIXUP_5ST_DIG),
SND_PCI_QUIRK(0xe803, 0x1019, NULL, ALC880_FIXUP_6ST_DIG),
{}
};
static const struct hda_model_fixup alc880_fixup_models[] = {
{.id = ALC880_FIXUP_3ST, .name = "3stack"},
{.id = ALC880_FIXUP_3ST_DIG, .name = "3stack-digout"},
{.id = ALC880_FIXUP_5ST, .name = "5stack"},
{.id = ALC880_FIXUP_5ST_DIG, .name = "5stack-digout"},
{.id = ALC880_FIXUP_6ST, .name = "6stack"},
{.id = ALC880_FIXUP_6ST_DIG, .name = "6stack-digout"},
{.id = ALC880_FIXUP_6ST_AUTOMUTE, .name = "6stack-automute"},
{}
};
/*
* OK, here we have finally the patch for ALC880
*/
static int patch_alc880(struct hda_codec *codec)
{
struct alc_spec *spec;
int err;
err = alc_alloc_spec(codec, 0x0b);
if (err < 0)
return err;
spec = codec->spec;
spec->gen.need_dac_fix = 1;
spec->gen.beep_nid = 0x01;
codec->patch_ops.unsol_event = alc880_unsol_event;
alc_pre_init(codec);
snd_hda_pick_fixup(codec, alc880_fixup_models, alc880_fixup_tbl,
alc880_fixups);
snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
/* automatic parse from the BIOS config */
err = alc880_parse_auto_config(codec);
if (err < 0)
goto error;
if (!spec->gen.no_analog) {
err = set_beep_amp(spec, 0x0b, 0x05, HDA_INPUT);
if (err < 0)
goto error;
}
snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
return 0;
error:
alc_free(codec);
return err;
}
/*
* ALC260 support
*/
static int alc260_parse_auto_config(struct hda_codec *codec)
{
static const hda_nid_t alc260_ignore[] = { 0x17, 0 };
static const hda_nid_t alc260_ssids[] = { 0x10, 0x15, 0x0f, 0 };
return alc_parse_auto_config(codec, alc260_ignore, alc260_ssids);
}
/*
* Pin config fixes
*/
enum {
ALC260_FIXUP_HP_DC5750,
ALC260_FIXUP_HP_PIN_0F,
ALC260_FIXUP_COEF,
ALC260_FIXUP_GPIO1,
ALC260_FIXUP_GPIO1_TOGGLE,
ALC260_FIXUP_REPLACER,
ALC260_FIXUP_HP_B1900,
ALC260_FIXUP_KN1,
ALC260_FIXUP_FSC_S7020,
ALC260_FIXUP_FSC_S7020_JWSE,
ALC260_FIXUP_VAIO_PINS,
};
static void alc260_gpio1_automute(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
alc_update_gpio_data(codec, 0x01, spec->gen.hp_jack_present);
}
static void alc260_fixup_gpio1_toggle(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
if (action == HDA_FIXUP_ACT_PROBE) {
/* although the machine has only one output pin, we need to
* toggle GPIO1 according to the jack state
*/
spec->gen.automute_hook = alc260_gpio1_automute;
spec->gen.detect_hp = 1;
spec->gen.automute_speaker = 1;
spec->gen.autocfg.hp_pins[0] = 0x0f; /* copy it for automute */
snd_hda_jack_detect_enable_callback(codec, 0x0f,
snd_hda_gen_hp_automute);
alc_setup_gpio(codec, 0x01);
}
}
static void alc260_fixup_kn1(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
static const struct hda_pintbl pincfgs[] = {
{ 0x0f, 0x02214000 }, /* HP/speaker */
{ 0x12, 0x90a60160 }, /* int mic */
{ 0x13, 0x02a19000 }, /* ext mic */
{ 0x18, 0x01446000 }, /* SPDIF out */
/* disable bogus I/O pins */
{ 0x10, 0x411111f0 },
{ 0x11, 0x411111f0 },
{ 0x14, 0x411111f0 },
{ 0x15, 0x411111f0 },
{ 0x16, 0x411111f0 },
{ 0x17, 0x411111f0 },
{ 0x19, 0x411111f0 },
{ }
};
switch (action) {
case HDA_FIXUP_ACT_PRE_PROBE:
snd_hda_apply_pincfgs(codec, pincfgs);
spec->init_amp = ALC_INIT_NONE;
break;
}
}
static void alc260_fixup_fsc_s7020(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
if (action == HDA_FIXUP_ACT_PRE_PROBE)
spec->init_amp = ALC_INIT_NONE;
}
static void alc260_fixup_fsc_s7020_jwse(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
spec->gen.add_jack_modes = 1;
spec->gen.hp_mic = 1;
}
}
static const struct hda_fixup alc260_fixups[] = {
[ALC260_FIXUP_HP_DC5750] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x11, 0x90130110 }, /* speaker */
{ }
}
},
[ALC260_FIXUP_HP_PIN_0F] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x0f, 0x01214000 }, /* HP */
{ }
}
},
[ALC260_FIXUP_COEF] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
{ 0x1a, AC_VERB_SET_COEF_INDEX, 0x07 },
{ 0x1a, AC_VERB_SET_PROC_COEF, 0x3040 },
{ }
},
},
[ALC260_FIXUP_GPIO1] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_gpio1,
},
[ALC260_FIXUP_GPIO1_TOGGLE] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc260_fixup_gpio1_toggle,
.chained = true,
.chain_id = ALC260_FIXUP_HP_PIN_0F,
},
[ALC260_FIXUP_REPLACER] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
{ 0x1a, AC_VERB_SET_COEF_INDEX, 0x07 },
{ 0x1a, AC_VERB_SET_PROC_COEF, 0x3050 },
{ }
},
.chained = true,
.chain_id = ALC260_FIXUP_GPIO1_TOGGLE,
},
[ALC260_FIXUP_HP_B1900] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc260_fixup_gpio1_toggle,
.chained = true,
.chain_id = ALC260_FIXUP_COEF,
},
[ALC260_FIXUP_KN1] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc260_fixup_kn1,
},
[ALC260_FIXUP_FSC_S7020] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc260_fixup_fsc_s7020,
},
[ALC260_FIXUP_FSC_S7020_JWSE] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc260_fixup_fsc_s7020_jwse,
.chained = true,
.chain_id = ALC260_FIXUP_FSC_S7020,
},
[ALC260_FIXUP_VAIO_PINS] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
/* Pin configs are missing completely on some VAIOs */
{ 0x0f, 0x01211020 },
{ 0x10, 0x0001003f },
{ 0x11, 0x411111f0 },
{ 0x12, 0x01a15930 },
{ 0x13, 0x411111f0 },
{ 0x14, 0x411111f0 },
{ 0x15, 0x411111f0 },
{ 0x16, 0x411111f0 },
{ 0x17, 0x411111f0 },
{ 0x18, 0x411111f0 },
{ 0x19, 0x411111f0 },
{ }
}
},
};
static const struct snd_pci_quirk alc260_fixup_tbl[] = {
SND_PCI_QUIRK(0x1025, 0x007b, "Acer C20x", ALC260_FIXUP_GPIO1),
SND_PCI_QUIRK(0x1025, 0x007f, "Acer Aspire 9500", ALC260_FIXUP_COEF),
SND_PCI_QUIRK(0x1025, 0x008f, "Acer", ALC260_FIXUP_GPIO1),
SND_PCI_QUIRK(0x103c, 0x280a, "HP dc5750", ALC260_FIXUP_HP_DC5750),
SND_PCI_QUIRK(0x103c, 0x30ba, "HP Presario B1900", ALC260_FIXUP_HP_B1900),
SND_PCI_QUIRK(0x104d, 0x81bb, "Sony VAIO", ALC260_FIXUP_VAIO_PINS),
SND_PCI_QUIRK(0x104d, 0x81e2, "Sony VAIO TX", ALC260_FIXUP_HP_PIN_0F),
SND_PCI_QUIRK(0x10cf, 0x1326, "FSC LifeBook S7020", ALC260_FIXUP_FSC_S7020),
SND_PCI_QUIRK(0x1509, 0x4540, "Favorit 100XS", ALC260_FIXUP_GPIO1),
SND_PCI_QUIRK(0x152d, 0x0729, "Quanta KN1", ALC260_FIXUP_KN1),
SND_PCI_QUIRK(0x161f, 0x2057, "Replacer 672V", ALC260_FIXUP_REPLACER),
SND_PCI_QUIRK(0x1631, 0xc017, "PB V7900", ALC260_FIXUP_COEF),
{}
};
static const struct hda_model_fixup alc260_fixup_models[] = {
{.id = ALC260_FIXUP_GPIO1, .name = "gpio1"},
{.id = ALC260_FIXUP_COEF, .name = "coef"},
{.id = ALC260_FIXUP_FSC_S7020, .name = "fujitsu"},
{.id = ALC260_FIXUP_FSC_S7020_JWSE, .name = "fujitsu-jwse"},
{}
};
/*
*/
static int patch_alc260(struct hda_codec *codec)
{
struct alc_spec *spec;
int err;
err = alc_alloc_spec(codec, 0x07);
if (err < 0)
return err;
spec = codec->spec;
/* as quite a few machines require HP amp for speaker outputs,
* it's easier to enable it unconditionally; even if it's unneeded,
* it's almost harmless.
*/
spec->gen.prefer_hp_amp = 1;
spec->gen.beep_nid = 0x01;
spec->shutup = alc_eapd_shutup;
alc_pre_init(codec);
snd_hda_pick_fixup(codec, alc260_fixup_models, alc260_fixup_tbl,
alc260_fixups);
snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
/* automatic parse from the BIOS config */
err = alc260_parse_auto_config(codec);
if (err < 0)
goto error;
if (!spec->gen.no_analog) {
err = set_beep_amp(spec, 0x07, 0x05, HDA_INPUT);
if (err < 0)
goto error;
}
snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
return 0;
error:
alc_free(codec);
return err;
}
/*
* ALC882/883/885/888/889 support
*
* ALC882 is almost identical with ALC880 but has cleaner and more flexible
* configuration. Each pin widget can choose any input DACs and a mixer.
* Each ADC is connected from a mixer of all inputs. This makes possible
* 6-channel independent captures.
*
* In addition, an independent DAC for the multi-playback (not used in this
* driver yet).
*/
/*
* Pin config fixes
*/
enum {
ALC882_FIXUP_ABIT_AW9D_MAX,
ALC882_FIXUP_LENOVO_Y530,
ALC882_FIXUP_PB_M5210,
ALC882_FIXUP_ACER_ASPIRE_7736,
ALC882_FIXUP_ASUS_W90V,
ALC889_FIXUP_CD,
ALC889_FIXUP_FRONT_HP_NO_PRESENCE,
ALC889_FIXUP_VAIO_TT,
ALC888_FIXUP_EEE1601,
ALC886_FIXUP_EAPD,
ALC882_FIXUP_EAPD,
ALC883_FIXUP_EAPD,
ALC883_FIXUP_ACER_EAPD,
ALC882_FIXUP_GPIO1,
ALC882_FIXUP_GPIO2,
ALC882_FIXUP_GPIO3,
ALC889_FIXUP_COEF,
ALC882_FIXUP_ASUS_W2JC,
ALC882_FIXUP_ACER_ASPIRE_4930G,
ALC882_FIXUP_ACER_ASPIRE_8930G,
ALC882_FIXUP_ASPIRE_8930G_VERBS,
ALC885_FIXUP_MACPRO_GPIO,
ALC889_FIXUP_DAC_ROUTE,
ALC889_FIXUP_MBP_VREF,
ALC889_FIXUP_IMAC91_VREF,
ALC889_FIXUP_MBA11_VREF,
ALC889_FIXUP_MBA21_VREF,
ALC889_FIXUP_MP11_VREF,
ALC889_FIXUP_MP41_VREF,
ALC882_FIXUP_INV_DMIC,
ALC882_FIXUP_NO_PRIMARY_HP,
ALC887_FIXUP_ASUS_BASS,
ALC887_FIXUP_BASS_CHMAP,
ALC1220_FIXUP_GB_DUAL_CODECS,
ALC1220_FIXUP_GB_X570,
ALC1220_FIXUP_CLEVO_P950,
ALC1220_FIXUP_CLEVO_PB51ED,
ALC1220_FIXUP_CLEVO_PB51ED_PINS,
ALC887_FIXUP_ASUS_AUDIO,
ALC887_FIXUP_ASUS_HMIC,
ALCS1200A_FIXUP_MIC_VREF,
};
static void alc889_fixup_coef(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
if (action != HDA_FIXUP_ACT_INIT)
return;
alc_update_coef_idx(codec, 7, 0, 0x2030);
}
/* set up GPIO at initialization */
static void alc885_fixup_macpro_gpio(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
spec->gpio_write_delay = true;
alc_fixup_gpio3(codec, fix, action);
}
/* Fix the connection of some pins for ALC889:
* At least, Acer Aspire 5935 shows the connections to DAC3/4 don't
* work correctly (bko#42740)
*/
static void alc889_fixup_dac_route(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
/* fake the connections during parsing the tree */
static const hda_nid_t conn1[] = { 0x0c, 0x0d };
static const hda_nid_t conn2[] = { 0x0e, 0x0f };
snd_hda_override_conn_list(codec, 0x14, ARRAY_SIZE(conn1), conn1);
snd_hda_override_conn_list(codec, 0x15, ARRAY_SIZE(conn1), conn1);
snd_hda_override_conn_list(codec, 0x18, ARRAY_SIZE(conn2), conn2);
snd_hda_override_conn_list(codec, 0x1a, ARRAY_SIZE(conn2), conn2);
} else if (action == HDA_FIXUP_ACT_PROBE) {
/* restore the connections */
static const hda_nid_t conn[] = { 0x0c, 0x0d, 0x0e, 0x0f, 0x26 };
snd_hda_override_conn_list(codec, 0x14, ARRAY_SIZE(conn), conn);
snd_hda_override_conn_list(codec, 0x15, ARRAY_SIZE(conn), conn);
snd_hda_override_conn_list(codec, 0x18, ARRAY_SIZE(conn), conn);
snd_hda_override_conn_list(codec, 0x1a, ARRAY_SIZE(conn), conn);
}
}
/* Set VREF on HP pin */
static void alc889_fixup_mbp_vref(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
static const hda_nid_t nids[] = { 0x14, 0x15, 0x19 };
struct alc_spec *spec = codec->spec;
int i;
if (action != HDA_FIXUP_ACT_INIT)
return;
for (i = 0; i < ARRAY_SIZE(nids); i++) {
unsigned int val = snd_hda_codec_get_pincfg(codec, nids[i]);
if (get_defcfg_device(val) != AC_JACK_HP_OUT)
continue;
val = snd_hda_codec_get_pin_target(codec, nids[i]);
val |= AC_PINCTL_VREF_80;
snd_hda_set_pin_ctl(codec, nids[i], val);
spec->gen.keep_vref_in_automute = 1;
break;
}
}
static void alc889_fixup_mac_pins(struct hda_codec *codec,
const hda_nid_t *nids, int num_nids)
{
struct alc_spec *spec = codec->spec;
int i;
for (i = 0; i < num_nids; i++) {
unsigned int val;
val = snd_hda_codec_get_pin_target(codec, nids[i]);
val |= AC_PINCTL_VREF_50;
snd_hda_set_pin_ctl(codec, nids[i], val);
}
spec->gen.keep_vref_in_automute = 1;
}
/* Set VREF on speaker pins on imac91 */
static void alc889_fixup_imac91_vref(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
static const hda_nid_t nids[] = { 0x18, 0x1a };
if (action == HDA_FIXUP_ACT_INIT)
alc889_fixup_mac_pins(codec, nids, ARRAY_SIZE(nids));
}
/* Set VREF on speaker pins on mba11 */
static void alc889_fixup_mba11_vref(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
static const hda_nid_t nids[] = { 0x18 };
if (action == HDA_FIXUP_ACT_INIT)
alc889_fixup_mac_pins(codec, nids, ARRAY_SIZE(nids));
}
/* Set VREF on speaker pins on mba21 */
static void alc889_fixup_mba21_vref(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
static const hda_nid_t nids[] = { 0x18, 0x19 };
if (action == HDA_FIXUP_ACT_INIT)
alc889_fixup_mac_pins(codec, nids, ARRAY_SIZE(nids));
}
/* Don't take HP output as primary
* Strangely, the speaker output doesn't work on Vaio Z and some Vaio
* all-in-one desktop PCs (for example VGC-LN51JGB) through DAC 0x05
*/
static void alc882_fixup_no_primary_hp(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
spec->gen.no_primary_hp = 1;
spec->gen.no_multi_io = 1;
}
}
static void alc_fixup_bass_chmap(struct hda_codec *codec,
const struct hda_fixup *fix, int action);
/* For dual-codec configuration, we need to disable some features to avoid
* conflicts of kctls and PCM streams
*/
static void alc_fixup_dual_codecs(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
if (action != HDA_FIXUP_ACT_PRE_PROBE)
return;
/* disable vmaster */
spec->gen.suppress_vmaster = 1;
/* auto-mute and auto-mic switch don't work with multiple codecs */
spec->gen.suppress_auto_mute = 1;
spec->gen.suppress_auto_mic = 1;
/* disable aamix as well */
spec->gen.mixer_nid = 0;
/* add location prefix to avoid conflicts */
codec->force_pin_prefix = 1;
}
static void rename_ctl(struct hda_codec *codec, const char *oldname,
const char *newname)
{
struct snd_kcontrol *kctl;
kctl = snd_hda_find_mixer_ctl(codec, oldname);
if (kctl)
snd_ctl_rename(codec->card, kctl, newname);
}
static void alc1220_fixup_gb_dual_codecs(struct hda_codec *codec,
const struct hda_fixup *fix,
int action)
{
alc_fixup_dual_codecs(codec, fix, action);
switch (action) {
case HDA_FIXUP_ACT_PRE_PROBE:
/* override card longname to provide a unique UCM profile */
strcpy(codec->card->longname, "HDAudio-Gigabyte-ALC1220DualCodecs");
break;
case HDA_FIXUP_ACT_BUILD:
/* rename Capture controls depending on the codec */
rename_ctl(codec, "Capture Volume",
codec->addr == 0 ?
"Rear-Panel Capture Volume" :
"Front-Panel Capture Volume");
rename_ctl(codec, "Capture Switch",
codec->addr == 0 ?
"Rear-Panel Capture Switch" :
"Front-Panel Capture Switch");
break;
}
}
static void alc1220_fixup_gb_x570(struct hda_codec *codec,
const struct hda_fixup *fix,
int action)
{
static const hda_nid_t conn1[] = { 0x0c };
static const struct coef_fw gb_x570_coefs[] = {
WRITE_COEF(0x07, 0x03c0),
WRITE_COEF(0x1a, 0x01c1),
WRITE_COEF(0x1b, 0x0202),
WRITE_COEF(0x43, 0x3005),
{}
};
switch (action) {
case HDA_FIXUP_ACT_PRE_PROBE:
snd_hda_override_conn_list(codec, 0x14, ARRAY_SIZE(conn1), conn1);
snd_hda_override_conn_list(codec, 0x1b, ARRAY_SIZE(conn1), conn1);
break;
case HDA_FIXUP_ACT_INIT:
alc_process_coef_fw(codec, gb_x570_coefs);
break;
}
}
static void alc1220_fixup_clevo_p950(struct hda_codec *codec,
const struct hda_fixup *fix,
int action)
{
static const hda_nid_t conn1[] = { 0x0c };
if (action != HDA_FIXUP_ACT_PRE_PROBE)
return;
alc_update_coef_idx(codec, 0x7, 0, 0x3c3);
/* We therefore want to make sure 0x14 (front headphone) and
* 0x1b (speakers) use the stereo DAC 0x02
*/
snd_hda_override_conn_list(codec, 0x14, ARRAY_SIZE(conn1), conn1);
snd_hda_override_conn_list(codec, 0x1b, ARRAY_SIZE(conn1), conn1);
}
static void alc_fixup_headset_mode_no_hp_mic(struct hda_codec *codec,
const struct hda_fixup *fix, int action);
static void alc1220_fixup_clevo_pb51ed(struct hda_codec *codec,
const struct hda_fixup *fix,
int action)
{
alc1220_fixup_clevo_p950(codec, fix, action);
alc_fixup_headset_mode_no_hp_mic(codec, fix, action);
}
static void alc887_asus_hp_automute_hook(struct hda_codec *codec,
struct hda_jack_callback *jack)
{
struct alc_spec *spec = codec->spec;
unsigned int vref;
snd_hda_gen_hp_automute(codec, jack);
if (spec->gen.hp_jack_present)
vref = AC_PINCTL_VREF_80;
else
vref = AC_PINCTL_VREF_HIZ;
snd_hda_set_pin_ctl(codec, 0x19, PIN_HP | vref);
}
static void alc887_fixup_asus_jack(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
if (action != HDA_FIXUP_ACT_PROBE)
return;
snd_hda_set_pin_ctl_cache(codec, 0x1b, PIN_HP);
spec->gen.hp_automute_hook = alc887_asus_hp_automute_hook;
}
static const struct hda_fixup alc882_fixups[] = {
[ALC882_FIXUP_ABIT_AW9D_MAX] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x15, 0x01080104 }, /* side */
{ 0x16, 0x01011012 }, /* rear */
{ 0x17, 0x01016011 }, /* clfe */
{ }
}
},
[ALC882_FIXUP_LENOVO_Y530] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x15, 0x99130112 }, /* rear int speakers */
{ 0x16, 0x99130111 }, /* subwoofer */
{ }
}
},
[ALC882_FIXUP_PB_M5210] = {
.type = HDA_FIXUP_PINCTLS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, PIN_VREF50 },
{}
}
},
[ALC882_FIXUP_ACER_ASPIRE_7736] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_sku_ignore,
},
[ALC882_FIXUP_ASUS_W90V] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x16, 0x99130110 }, /* fix sequence for CLFE */
{ }
}
},
[ALC889_FIXUP_CD] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x1c, 0x993301f0 }, /* CD */
{ }
}
},
[ALC889_FIXUP_FRONT_HP_NO_PRESENCE] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x1b, 0x02214120 }, /* Front HP jack is flaky, disable jack detect */
{ }
},
.chained = true,
.chain_id = ALC889_FIXUP_CD,
},
[ALC889_FIXUP_VAIO_TT] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x17, 0x90170111 }, /* hidden surround speaker */
{ }
}
},
[ALC888_FIXUP_EEE1601] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x0b },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0838 },
{ }
}
},
[ALC886_FIXUP_EAPD] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
/* change to EAPD mode */
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x07 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0068 },
{ }
}
},
[ALC882_FIXUP_EAPD] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
/* change to EAPD mode */
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x07 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x3060 },
{ }
}
},
[ALC883_FIXUP_EAPD] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
/* change to EAPD mode */
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x07 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x3070 },
{ }
}
},
[ALC883_FIXUP_ACER_EAPD] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
/* eanable EAPD on Acer laptops */
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x07 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x3050 },
{ }
}
},
[ALC882_FIXUP_GPIO1] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_gpio1,
},
[ALC882_FIXUP_GPIO2] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_gpio2,
},
[ALC882_FIXUP_GPIO3] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_gpio3,
},
[ALC882_FIXUP_ASUS_W2JC] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_gpio1,
.chained = true,
.chain_id = ALC882_FIXUP_EAPD,
},
[ALC889_FIXUP_COEF] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc889_fixup_coef,
},
[ALC882_FIXUP_ACER_ASPIRE_4930G] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x16, 0x99130111 }, /* CLFE speaker */
{ 0x17, 0x99130112 }, /* surround speaker */
{ }
},
.chained = true,
.chain_id = ALC882_FIXUP_GPIO1,
},
[ALC882_FIXUP_ACER_ASPIRE_8930G] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x16, 0x99130111 }, /* CLFE speaker */
{ 0x1b, 0x99130112 }, /* surround speaker */
{ }
},
.chained = true,
.chain_id = ALC882_FIXUP_ASPIRE_8930G_VERBS,
},
[ALC882_FIXUP_ASPIRE_8930G_VERBS] = {
/* additional init verbs for Acer Aspire 8930G */
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
/* Enable all DACs */
/* DAC DISABLE/MUTE 1? */
/* setting bits 1-5 disables DAC nids 0x02-0x06
* apparently. Init=0x38 */
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x03 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
/* DAC DISABLE/MUTE 2? */
/* some bit here disables the other DACs.
* Init=0x4900 */
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x08 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
/* DMIC fix
* This laptop has a stereo digital microphone.
* The mics are only 1cm apart which makes the stereo
* useless. However, either the mic or the ALC889
* makes the signal become a difference/sum signal
* instead of standard stereo, which is annoying.
* So instead we flip this bit which makes the
* codec replicate the sum signal to both channels,
* turning it into a normal mono mic.
*/
/* DMIC_CONTROL? Init value = 0x0001 */
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x0b },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0003 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x07 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x3050 },
{ }
},
.chained = true,
.chain_id = ALC882_FIXUP_GPIO1,
},
[ALC885_FIXUP_MACPRO_GPIO] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc885_fixup_macpro_gpio,
},
[ALC889_FIXUP_DAC_ROUTE] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc889_fixup_dac_route,
},
[ALC889_FIXUP_MBP_VREF] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc889_fixup_mbp_vref,
.chained = true,
.chain_id = ALC882_FIXUP_GPIO1,
},
[ALC889_FIXUP_IMAC91_VREF] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc889_fixup_imac91_vref,
.chained = true,
.chain_id = ALC882_FIXUP_GPIO1,
},
[ALC889_FIXUP_MBA11_VREF] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc889_fixup_mba11_vref,
.chained = true,
.chain_id = ALC889_FIXUP_MBP_VREF,
},
[ALC889_FIXUP_MBA21_VREF] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc889_fixup_mba21_vref,
.chained = true,
.chain_id = ALC889_FIXUP_MBP_VREF,
},
[ALC889_FIXUP_MP11_VREF] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc889_fixup_mba11_vref,
.chained = true,
.chain_id = ALC885_FIXUP_MACPRO_GPIO,
},
[ALC889_FIXUP_MP41_VREF] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc889_fixup_mbp_vref,
.chained = true,
.chain_id = ALC885_FIXUP_MACPRO_GPIO,
},
[ALC882_FIXUP_INV_DMIC] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_inv_dmic,
},
[ALC882_FIXUP_NO_PRIMARY_HP] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc882_fixup_no_primary_hp,
},
[ALC887_FIXUP_ASUS_BASS] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{0x16, 0x99130130}, /* bass speaker */
{}
},
.chained = true,
.chain_id = ALC887_FIXUP_BASS_CHMAP,
},
[ALC887_FIXUP_BASS_CHMAP] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_bass_chmap,
},
[ALC1220_FIXUP_GB_DUAL_CODECS] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc1220_fixup_gb_dual_codecs,
},
[ALC1220_FIXUP_GB_X570] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc1220_fixup_gb_x570,
},
[ALC1220_FIXUP_CLEVO_P950] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc1220_fixup_clevo_p950,
},
[ALC1220_FIXUP_CLEVO_PB51ED] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc1220_fixup_clevo_pb51ed,
},
[ALC1220_FIXUP_CLEVO_PB51ED_PINS] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, 0x01a1913c }, /* use as headset mic, without its own jack detect */
{}
},
.chained = true,
.chain_id = ALC1220_FIXUP_CLEVO_PB51ED,
},
[ALC887_FIXUP_ASUS_AUDIO] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x15, 0x02a14150 }, /* use as headset mic, without its own jack detect */
{ 0x19, 0x22219420 },
{}
},
},
[ALC887_FIXUP_ASUS_HMIC] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc887_fixup_asus_jack,
.chained = true,
.chain_id = ALC887_FIXUP_ASUS_AUDIO,
},
[ALCS1200A_FIXUP_MIC_VREF] = {
.type = HDA_FIXUP_PINCTLS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x18, PIN_VREF50 }, /* rear mic */
{ 0x19, PIN_VREF50 }, /* front mic */
{}
}
},
};
static const struct snd_pci_quirk alc882_fixup_tbl[] = {
SND_PCI_QUIRK(0x1025, 0x006c, "Acer Aspire 9810", ALC883_FIXUP_ACER_EAPD),
SND_PCI_QUIRK(0x1025, 0x0090, "Acer Aspire", ALC883_FIXUP_ACER_EAPD),
SND_PCI_QUIRK(0x1025, 0x0107, "Acer Aspire", ALC883_FIXUP_ACER_EAPD),
SND_PCI_QUIRK(0x1025, 0x010a, "Acer Ferrari 5000", ALC883_FIXUP_ACER_EAPD),
SND_PCI_QUIRK(0x1025, 0x0110, "Acer Aspire", ALC883_FIXUP_ACER_EAPD),
SND_PCI_QUIRK(0x1025, 0x0112, "Acer Aspire 9303", ALC883_FIXUP_ACER_EAPD),
SND_PCI_QUIRK(0x1025, 0x0121, "Acer Aspire 5920G", ALC883_FIXUP_ACER_EAPD),
SND_PCI_QUIRK(0x1025, 0x013e, "Acer Aspire 4930G",
ALC882_FIXUP_ACER_ASPIRE_4930G),
SND_PCI_QUIRK(0x1025, 0x013f, "Acer Aspire 5930G",
ALC882_FIXUP_ACER_ASPIRE_4930G),
SND_PCI_QUIRK(0x1025, 0x0145, "Acer Aspire 8930G",
ALC882_FIXUP_ACER_ASPIRE_8930G),
SND_PCI_QUIRK(0x1025, 0x0146, "Acer Aspire 6935G",
ALC882_FIXUP_ACER_ASPIRE_8930G),
SND_PCI_QUIRK(0x1025, 0x0142, "Acer Aspire 7730G",
ALC882_FIXUP_ACER_ASPIRE_4930G),
SND_PCI_QUIRK(0x1025, 0x0155, "Packard-Bell M5120", ALC882_FIXUP_PB_M5210),
SND_PCI_QUIRK(0x1025, 0x015e, "Acer Aspire 6930G",
ALC882_FIXUP_ACER_ASPIRE_4930G),
SND_PCI_QUIRK(0x1025, 0x0166, "Acer Aspire 6530G",
ALC882_FIXUP_ACER_ASPIRE_4930G),
SND_PCI_QUIRK(0x1025, 0x021e, "Acer Aspire 5739G",
ALC882_FIXUP_ACER_ASPIRE_4930G),
SND_PCI_QUIRK(0x1025, 0x0259, "Acer Aspire 5935", ALC889_FIXUP_DAC_ROUTE),
SND_PCI_QUIRK(0x1025, 0x026b, "Acer Aspire 8940G", ALC882_FIXUP_ACER_ASPIRE_8930G),
SND_PCI_QUIRK(0x1025, 0x0296, "Acer Aspire 7736z", ALC882_FIXUP_ACER_ASPIRE_7736),
SND_PCI_QUIRK(0x1043, 0x13c2, "Asus A7M", ALC882_FIXUP_EAPD),
SND_PCI_QUIRK(0x1043, 0x1873, "ASUS W90V", ALC882_FIXUP_ASUS_W90V),
SND_PCI_QUIRK(0x1043, 0x1971, "Asus W2JC", ALC882_FIXUP_ASUS_W2JC),
SND_PCI_QUIRK(0x1043, 0x2390, "Asus D700SA", ALC887_FIXUP_ASUS_HMIC),
SND_PCI_QUIRK(0x1043, 0x835f, "Asus Eee 1601", ALC888_FIXUP_EEE1601),
SND_PCI_QUIRK(0x1043, 0x84bc, "ASUS ET2700", ALC887_FIXUP_ASUS_BASS),
SND_PCI_QUIRK(0x1043, 0x8691, "ASUS ROG Ranger VIII", ALC882_FIXUP_GPIO3),
SND_PCI_QUIRK(0x1043, 0x8797, "ASUS TUF B550M-PLUS", ALCS1200A_FIXUP_MIC_VREF),
SND_PCI_QUIRK(0x104d, 0x9043, "Sony Vaio VGC-LN51JGB", ALC882_FIXUP_NO_PRIMARY_HP),
SND_PCI_QUIRK(0x104d, 0x9044, "Sony VAIO AiO", ALC882_FIXUP_NO_PRIMARY_HP),
SND_PCI_QUIRK(0x104d, 0x9047, "Sony Vaio TT", ALC889_FIXUP_VAIO_TT),
SND_PCI_QUIRK(0x104d, 0x905a, "Sony Vaio Z", ALC882_FIXUP_NO_PRIMARY_HP),
SND_PCI_QUIRK(0x104d, 0x9060, "Sony Vaio VPCL14M1R", ALC882_FIXUP_NO_PRIMARY_HP),
/* All Apple entries are in codec SSIDs */
SND_PCI_QUIRK(0x106b, 0x00a0, "MacBookPro 3,1", ALC889_FIXUP_MBP_VREF),
SND_PCI_QUIRK(0x106b, 0x00a1, "Macbook", ALC889_FIXUP_MBP_VREF),
SND_PCI_QUIRK(0x106b, 0x00a4, "MacbookPro 4,1", ALC889_FIXUP_MBP_VREF),
SND_PCI_QUIRK(0x106b, 0x0c00, "Mac Pro", ALC889_FIXUP_MP11_VREF),
SND_PCI_QUIRK(0x106b, 0x1000, "iMac 24", ALC885_FIXUP_MACPRO_GPIO),
SND_PCI_QUIRK(0x106b, 0x2800, "AppleTV", ALC885_FIXUP_MACPRO_GPIO),
SND_PCI_QUIRK(0x106b, 0x2c00, "MacbookPro rev3", ALC889_FIXUP_MBP_VREF),
SND_PCI_QUIRK(0x106b, 0x3000, "iMac", ALC889_FIXUP_MBP_VREF),
SND_PCI_QUIRK(0x106b, 0x3200, "iMac 7,1 Aluminum", ALC882_FIXUP_EAPD),
SND_PCI_QUIRK(0x106b, 0x3400, "MacBookAir 1,1", ALC889_FIXUP_MBA11_VREF),
SND_PCI_QUIRK(0x106b, 0x3500, "MacBookAir 2,1", ALC889_FIXUP_MBA21_VREF),
SND_PCI_QUIRK(0x106b, 0x3600, "Macbook 3,1", ALC889_FIXUP_MBP_VREF),
SND_PCI_QUIRK(0x106b, 0x3800, "MacbookPro 4,1", ALC889_FIXUP_MBP_VREF),
SND_PCI_QUIRK(0x106b, 0x3e00, "iMac 24 Aluminum", ALC885_FIXUP_MACPRO_GPIO),
SND_PCI_QUIRK(0x106b, 0x3f00, "Macbook 5,1", ALC889_FIXUP_IMAC91_VREF),
SND_PCI_QUIRK(0x106b, 0x4000, "MacbookPro 5,1", ALC889_FIXUP_IMAC91_VREF),
SND_PCI_QUIRK(0x106b, 0x4100, "Macmini 3,1", ALC889_FIXUP_IMAC91_VREF),
SND_PCI_QUIRK(0x106b, 0x4200, "Mac Pro 4,1/5,1", ALC889_FIXUP_MP41_VREF),
SND_PCI_QUIRK(0x106b, 0x4300, "iMac 9,1", ALC889_FIXUP_IMAC91_VREF),
SND_PCI_QUIRK(0x106b, 0x4600, "MacbookPro 5,2", ALC889_FIXUP_IMAC91_VREF),
SND_PCI_QUIRK(0x106b, 0x4900, "iMac 9,1 Aluminum", ALC889_FIXUP_IMAC91_VREF),
SND_PCI_QUIRK(0x106b, 0x4a00, "Macbook 5,2", ALC889_FIXUP_MBA11_VREF),
SND_PCI_QUIRK(0x1071, 0x8258, "Evesham Voyaeger", ALC882_FIXUP_EAPD),
SND_PCI_QUIRK(0x13fe, 0x1009, "Advantech MIT-W101", ALC886_FIXUP_EAPD),
SND_PCI_QUIRK(0x1458, 0xa002, "Gigabyte EP45-DS3/Z87X-UD3H", ALC889_FIXUP_FRONT_HP_NO_PRESENCE),
SND_PCI_QUIRK(0x1458, 0xa0b8, "Gigabyte AZ370-Gaming", ALC1220_FIXUP_GB_DUAL_CODECS),
SND_PCI_QUIRK(0x1458, 0xa0cd, "Gigabyte X570 Aorus Master", ALC1220_FIXUP_GB_X570),
SND_PCI_QUIRK(0x1458, 0xa0ce, "Gigabyte X570 Aorus Xtreme", ALC1220_FIXUP_GB_X570),
SND_PCI_QUIRK(0x1458, 0xa0d5, "Gigabyte X570S Aorus Master", ALC1220_FIXUP_GB_X570),
SND_PCI_QUIRK(0x1462, 0x11f7, "MSI-GE63", ALC1220_FIXUP_CLEVO_P950),
SND_PCI_QUIRK(0x1462, 0x1228, "MSI-GP63", ALC1220_FIXUP_CLEVO_P950),
SND_PCI_QUIRK(0x1462, 0x1229, "MSI-GP73", ALC1220_FIXUP_CLEVO_P950),
SND_PCI_QUIRK(0x1462, 0x1275, "MSI-GL63", ALC1220_FIXUP_CLEVO_P950),
SND_PCI_QUIRK(0x1462, 0x1276, "MSI-GL73", ALC1220_FIXUP_CLEVO_P950),
SND_PCI_QUIRK(0x1462, 0x1293, "MSI-GP65", ALC1220_FIXUP_CLEVO_P950),
SND_PCI_QUIRK(0x1462, 0x7350, "MSI-7350", ALC889_FIXUP_CD),
SND_PCI_QUIRK(0x1462, 0xcc34, "MSI Godlike X570", ALC1220_FIXUP_GB_DUAL_CODECS),
SND_PCI_QUIRK(0x1462, 0xda57, "MSI Z270-Gaming", ALC1220_FIXUP_GB_DUAL_CODECS),
SND_PCI_QUIRK_VENDOR(0x1462, "MSI", ALC882_FIXUP_GPIO3),
SND_PCI_QUIRK(0x147b, 0x107a, "Abit AW9D-MAX", ALC882_FIXUP_ABIT_AW9D_MAX),
SND_PCI_QUIRK(0x1558, 0x3702, "Clevo X370SN[VW]", ALC1220_FIXUP_CLEVO_PB51ED_PINS),
SND_PCI_QUIRK(0x1558, 0x50d3, "Clevo PC50[ER][CDF]", ALC1220_FIXUP_CLEVO_PB51ED_PINS),
SND_PCI_QUIRK(0x1558, 0x65d1, "Clevo PB51[ER][CDF]", ALC1220_FIXUP_CLEVO_PB51ED_PINS),
SND_PCI_QUIRK(0x1558, 0x65d2, "Clevo PB51R[CDF]", ALC1220_FIXUP_CLEVO_PB51ED_PINS),
SND_PCI_QUIRK(0x1558, 0x65e1, "Clevo PB51[ED][DF]", ALC1220_FIXUP_CLEVO_PB51ED_PINS),
SND_PCI_QUIRK(0x1558, 0x65e5, "Clevo PC50D[PRS](?:-D|-G)?", ALC1220_FIXUP_CLEVO_PB51ED_PINS),
SND_PCI_QUIRK(0x1558, 0x65f1, "Clevo PC50HS", ALC1220_FIXUP_CLEVO_PB51ED_PINS),
SND_PCI_QUIRK(0x1558, 0x65f5, "Clevo PD50PN[NRT]", ALC1220_FIXUP_CLEVO_PB51ED_PINS),
SND_PCI_QUIRK(0x1558, 0x66a2, "Clevo PE60RNE", ALC1220_FIXUP_CLEVO_PB51ED_PINS),
SND_PCI_QUIRK(0x1558, 0x67d1, "Clevo PB71[ER][CDF]", ALC1220_FIXUP_CLEVO_PB51ED_PINS),
SND_PCI_QUIRK(0x1558, 0x67e1, "Clevo PB71[DE][CDF]", ALC1220_FIXUP_CLEVO_PB51ED_PINS),
SND_PCI_QUIRK(0x1558, 0x67e5, "Clevo PC70D[PRS](?:-D|-G)?", ALC1220_FIXUP_CLEVO_PB51ED_PINS),
SND_PCI_QUIRK(0x1558, 0x67f1, "Clevo PC70H[PRS]", ALC1220_FIXUP_CLEVO_PB51ED_PINS),
SND_PCI_QUIRK(0x1558, 0x67f5, "Clevo PD70PN[NRT]", ALC1220_FIXUP_CLEVO_PB51ED_PINS),
SND_PCI_QUIRK(0x1558, 0x70d1, "Clevo PC70[ER][CDF]", ALC1220_FIXUP_CLEVO_PB51ED_PINS),
SND_PCI_QUIRK(0x1558, 0x7714, "Clevo X170SM", ALC1220_FIXUP_CLEVO_PB51ED_PINS),
SND_PCI_QUIRK(0x1558, 0x7715, "Clevo X170KM-G", ALC1220_FIXUP_CLEVO_PB51ED),
SND_PCI_QUIRK(0x1558, 0x9501, "Clevo P950HR", ALC1220_FIXUP_CLEVO_P950),
SND_PCI_QUIRK(0x1558, 0x9506, "Clevo P955HQ", ALC1220_FIXUP_CLEVO_P950),
SND_PCI_QUIRK(0x1558, 0x950a, "Clevo P955H[PR]", ALC1220_FIXUP_CLEVO_P950),
SND_PCI_QUIRK(0x1558, 0x95e1, "Clevo P95xER", ALC1220_FIXUP_CLEVO_P950),
SND_PCI_QUIRK(0x1558, 0x95e2, "Clevo P950ER", ALC1220_FIXUP_CLEVO_P950),
SND_PCI_QUIRK(0x1558, 0x95e3, "Clevo P955[ER]T", ALC1220_FIXUP_CLEVO_P950),
SND_PCI_QUIRK(0x1558, 0x95e4, "Clevo P955ER", ALC1220_FIXUP_CLEVO_P950),
SND_PCI_QUIRK(0x1558, 0x95e5, "Clevo P955EE6", ALC1220_FIXUP_CLEVO_P950),
SND_PCI_QUIRK(0x1558, 0x95e6, "Clevo P950R[CDF]", ALC1220_FIXUP_CLEVO_P950),
SND_PCI_QUIRK(0x1558, 0x96e1, "Clevo P960[ER][CDFN]-K", ALC1220_FIXUP_CLEVO_P950),
SND_PCI_QUIRK(0x1558, 0x97e1, "Clevo P970[ER][CDFN]", ALC1220_FIXUP_CLEVO_P950),
SND_PCI_QUIRK(0x1558, 0x97e2, "Clevo P970RC-M", ALC1220_FIXUP_CLEVO_P950),
SND_PCI_QUIRK(0x1558, 0xd502, "Clevo PD50SNE", ALC1220_FIXUP_CLEVO_PB51ED_PINS),
SND_PCI_QUIRK_VENDOR(0x1558, "Clevo laptop", ALC882_FIXUP_EAPD),
SND_PCI_QUIRK(0x161f, 0x2054, "Medion laptop", ALC883_FIXUP_EAPD),
SND_PCI_QUIRK(0x17aa, 0x3a0d, "Lenovo Y530", ALC882_FIXUP_LENOVO_Y530),
SND_PCI_QUIRK(0x8086, 0x0022, "DX58SO", ALC889_FIXUP_COEF),
{}
};
static const struct hda_model_fixup alc882_fixup_models[] = {
{.id = ALC882_FIXUP_ABIT_AW9D_MAX, .name = "abit-aw9d"},
{.id = ALC882_FIXUP_LENOVO_Y530, .name = "lenovo-y530"},
{.id = ALC882_FIXUP_ACER_ASPIRE_7736, .name = "acer-aspire-7736"},
{.id = ALC882_FIXUP_ASUS_W90V, .name = "asus-w90v"},
{.id = ALC889_FIXUP_CD, .name = "cd"},
{.id = ALC889_FIXUP_FRONT_HP_NO_PRESENCE, .name = "no-front-hp"},
{.id = ALC889_FIXUP_VAIO_TT, .name = "vaio-tt"},
{.id = ALC888_FIXUP_EEE1601, .name = "eee1601"},
{.id = ALC882_FIXUP_EAPD, .name = "alc882-eapd"},
{.id = ALC883_FIXUP_EAPD, .name = "alc883-eapd"},
{.id = ALC882_FIXUP_GPIO1, .name = "gpio1"},
{.id = ALC882_FIXUP_GPIO2, .name = "gpio2"},
{.id = ALC882_FIXUP_GPIO3, .name = "gpio3"},
{.id = ALC889_FIXUP_COEF, .name = "alc889-coef"},
{.id = ALC882_FIXUP_ASUS_W2JC, .name = "asus-w2jc"},
{.id = ALC882_FIXUP_ACER_ASPIRE_4930G, .name = "acer-aspire-4930g"},
{.id = ALC882_FIXUP_ACER_ASPIRE_8930G, .name = "acer-aspire-8930g"},
{.id = ALC883_FIXUP_ACER_EAPD, .name = "acer-aspire"},
{.id = ALC885_FIXUP_MACPRO_GPIO, .name = "macpro-gpio"},
{.id = ALC889_FIXUP_DAC_ROUTE, .name = "dac-route"},
{.id = ALC889_FIXUP_MBP_VREF, .name = "mbp-vref"},
{.id = ALC889_FIXUP_IMAC91_VREF, .name = "imac91-vref"},
{.id = ALC889_FIXUP_MBA11_VREF, .name = "mba11-vref"},
{.id = ALC889_FIXUP_MBA21_VREF, .name = "mba21-vref"},
{.id = ALC889_FIXUP_MP11_VREF, .name = "mp11-vref"},
{.id = ALC889_FIXUP_MP41_VREF, .name = "mp41-vref"},
{.id = ALC882_FIXUP_INV_DMIC, .name = "inv-dmic"},
{.id = ALC882_FIXUP_NO_PRIMARY_HP, .name = "no-primary-hp"},
{.id = ALC887_FIXUP_ASUS_BASS, .name = "asus-bass"},
{.id = ALC1220_FIXUP_GB_DUAL_CODECS, .name = "dual-codecs"},
{.id = ALC1220_FIXUP_GB_X570, .name = "gb-x570"},
{.id = ALC1220_FIXUP_CLEVO_P950, .name = "clevo-p950"},
{}
};
static const struct snd_hda_pin_quirk alc882_pin_fixup_tbl[] = {
SND_HDA_PIN_QUIRK(0x10ec1220, 0x1043, "ASUS", ALC1220_FIXUP_CLEVO_P950,
{0x14, 0x01014010},
{0x15, 0x01011012},
{0x16, 0x01016011},
{0x18, 0x01a19040},
{0x19, 0x02a19050},
{0x1a, 0x0181304f},
{0x1b, 0x0221401f},
{0x1e, 0x01456130}),
SND_HDA_PIN_QUIRK(0x10ec1220, 0x1462, "MS-7C35", ALC1220_FIXUP_CLEVO_P950,
{0x14, 0x01015010},
{0x15, 0x01011012},
{0x16, 0x01011011},
{0x18, 0x01a11040},
{0x19, 0x02a19050},
{0x1a, 0x0181104f},
{0x1b, 0x0221401f},
{0x1e, 0x01451130}),
{}
};
/*
* BIOS auto configuration
*/
/* almost identical with ALC880 parser... */
static int alc882_parse_auto_config(struct hda_codec *codec)
{
static const hda_nid_t alc882_ignore[] = { 0x1d, 0 };
static const hda_nid_t alc882_ssids[] = { 0x15, 0x1b, 0x14, 0 };
return alc_parse_auto_config(codec, alc882_ignore, alc882_ssids);
}
/*
*/
static int patch_alc882(struct hda_codec *codec)
{
struct alc_spec *spec;
int err;
err = alc_alloc_spec(codec, 0x0b);
if (err < 0)
return err;
spec = codec->spec;
switch (codec->core.vendor_id) {
case 0x10ec0882:
case 0x10ec0885:
case 0x10ec0900:
case 0x10ec0b00:
case 0x10ec1220:
break;
default:
/* ALC883 and variants */
alc_fix_pll_init(codec, 0x20, 0x0a, 10);
break;
}
alc_pre_init(codec);
snd_hda_pick_fixup(codec, alc882_fixup_models, alc882_fixup_tbl,
alc882_fixups);
snd_hda_pick_pin_fixup(codec, alc882_pin_fixup_tbl, alc882_fixups, true);
snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
alc_auto_parse_customize_define(codec);
if (has_cdefine_beep(codec))
spec->gen.beep_nid = 0x01;
/* automatic parse from the BIOS config */
err = alc882_parse_auto_config(codec);
if (err < 0)
goto error;
if (!spec->gen.no_analog && spec->gen.beep_nid) {
err = set_beep_amp(spec, 0x0b, 0x05, HDA_INPUT);
if (err < 0)
goto error;
}
snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
return 0;
error:
alc_free(codec);
return err;
}
/*
* ALC262 support
*/
static int alc262_parse_auto_config(struct hda_codec *codec)
{
static const hda_nid_t alc262_ignore[] = { 0x1d, 0 };
static const hda_nid_t alc262_ssids[] = { 0x15, 0x1b, 0x14, 0 };
return alc_parse_auto_config(codec, alc262_ignore, alc262_ssids);
}
/*
* Pin config fixes
*/
enum {
ALC262_FIXUP_FSC_H270,
ALC262_FIXUP_FSC_S7110,
ALC262_FIXUP_HP_Z200,
ALC262_FIXUP_TYAN,
ALC262_FIXUP_LENOVO_3000,
ALC262_FIXUP_BENQ,
ALC262_FIXUP_BENQ_T31,
ALC262_FIXUP_INV_DMIC,
ALC262_FIXUP_INTEL_BAYLEYBAY,
};
static const struct hda_fixup alc262_fixups[] = {
[ALC262_FIXUP_FSC_H270] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x14, 0x99130110 }, /* speaker */
{ 0x15, 0x0221142f }, /* front HP */
{ 0x1b, 0x0121141f }, /* rear HP */
{ }
}
},
[ALC262_FIXUP_FSC_S7110] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x15, 0x90170110 }, /* speaker */
{ }
},
.chained = true,
.chain_id = ALC262_FIXUP_BENQ,
},
[ALC262_FIXUP_HP_Z200] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x16, 0x99130120 }, /* internal speaker */
{ }
}
},
[ALC262_FIXUP_TYAN] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x14, 0x1993e1f0 }, /* int AUX */
{ }
}
},
[ALC262_FIXUP_LENOVO_3000] = {
.type = HDA_FIXUP_PINCTLS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, PIN_VREF50 },
{}
},
.chained = true,
.chain_id = ALC262_FIXUP_BENQ,
},
[ALC262_FIXUP_BENQ] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x07 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x3070 },
{}
}
},
[ALC262_FIXUP_BENQ_T31] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x07 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x3050 },
{}
}
},
[ALC262_FIXUP_INV_DMIC] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_inv_dmic,
},
[ALC262_FIXUP_INTEL_BAYLEYBAY] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_no_depop_delay,
},
};
static const struct snd_pci_quirk alc262_fixup_tbl[] = {
SND_PCI_QUIRK(0x103c, 0x170b, "HP Z200", ALC262_FIXUP_HP_Z200),
SND_PCI_QUIRK(0x10cf, 0x1397, "Fujitsu Lifebook S7110", ALC262_FIXUP_FSC_S7110),
SND_PCI_QUIRK(0x10cf, 0x142d, "Fujitsu Lifebook E8410", ALC262_FIXUP_BENQ),
SND_PCI_QUIRK(0x10f1, 0x2915, "Tyan Thunder n6650W", ALC262_FIXUP_TYAN),
SND_PCI_QUIRK(0x1734, 0x1141, "FSC ESPRIMO U9210", ALC262_FIXUP_FSC_H270),
SND_PCI_QUIRK(0x1734, 0x1147, "FSC Celsius H270", ALC262_FIXUP_FSC_H270),
SND_PCI_QUIRK(0x17aa, 0x384e, "Lenovo 3000", ALC262_FIXUP_LENOVO_3000),
SND_PCI_QUIRK(0x17ff, 0x0560, "Benq ED8", ALC262_FIXUP_BENQ),
SND_PCI_QUIRK(0x17ff, 0x058d, "Benq T31-16", ALC262_FIXUP_BENQ_T31),
SND_PCI_QUIRK(0x8086, 0x7270, "BayleyBay", ALC262_FIXUP_INTEL_BAYLEYBAY),
{}
};
static const struct hda_model_fixup alc262_fixup_models[] = {
{.id = ALC262_FIXUP_INV_DMIC, .name = "inv-dmic"},
{.id = ALC262_FIXUP_FSC_H270, .name = "fsc-h270"},
{.id = ALC262_FIXUP_FSC_S7110, .name = "fsc-s7110"},
{.id = ALC262_FIXUP_HP_Z200, .name = "hp-z200"},
{.id = ALC262_FIXUP_TYAN, .name = "tyan"},
{.id = ALC262_FIXUP_LENOVO_3000, .name = "lenovo-3000"},
{.id = ALC262_FIXUP_BENQ, .name = "benq"},
{.id = ALC262_FIXUP_BENQ_T31, .name = "benq-t31"},
{.id = ALC262_FIXUP_INTEL_BAYLEYBAY, .name = "bayleybay"},
{}
};
/*
*/
static int patch_alc262(struct hda_codec *codec)
{
struct alc_spec *spec;
int err;
err = alc_alloc_spec(codec, 0x0b);
if (err < 0)
return err;
spec = codec->spec;
spec->gen.shared_mic_vref_pin = 0x18;
spec->shutup = alc_eapd_shutup;
#if 0
/* pshou 07/11/05 set a zero PCM sample to DAC when FIFO is
* under-run
*/
alc_update_coefex_idx(codec, 0x1a, 7, 0, 0x80);
#endif
alc_fix_pll_init(codec, 0x20, 0x0a, 10);
alc_pre_init(codec);
snd_hda_pick_fixup(codec, alc262_fixup_models, alc262_fixup_tbl,
alc262_fixups);
snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
alc_auto_parse_customize_define(codec);
if (has_cdefine_beep(codec))
spec->gen.beep_nid = 0x01;
/* automatic parse from the BIOS config */
err = alc262_parse_auto_config(codec);
if (err < 0)
goto error;
if (!spec->gen.no_analog && spec->gen.beep_nid) {
err = set_beep_amp(spec, 0x0b, 0x05, HDA_INPUT);
if (err < 0)
goto error;
}
snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
return 0;
error:
alc_free(codec);
return err;
}
/*
* ALC268
*/
/* bind Beep switches of both NID 0x0f and 0x10 */
static int alc268_beep_switch_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
unsigned long pval;
int err;
mutex_lock(&codec->control_mutex);
pval = kcontrol->private_value;
kcontrol->private_value = (pval & ~0xff) | 0x0f;
err = snd_hda_mixer_amp_switch_put(kcontrol, ucontrol);
if (err >= 0) {
kcontrol->private_value = (pval & ~0xff) | 0x10;
err = snd_hda_mixer_amp_switch_put(kcontrol, ucontrol);
}
kcontrol->private_value = pval;
mutex_unlock(&codec->control_mutex);
return err;
}
static const struct snd_kcontrol_new alc268_beep_mixer[] = {
HDA_CODEC_VOLUME("Beep Playback Volume", 0x1d, 0x0, HDA_INPUT),
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Beep Playback Switch",
.subdevice = HDA_SUBDEV_AMP_FLAG,
.info = snd_hda_mixer_amp_switch_info,
.get = snd_hda_mixer_amp_switch_get,
.put = alc268_beep_switch_put,
.private_value = HDA_COMPOSE_AMP_VAL(0x0f, 3, 1, HDA_INPUT)
},
};
/* set PCBEEP vol = 0, mute connections */
static const struct hda_verb alc268_beep_init_verbs[] = {
{0x1d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
{0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(1)},
{0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(1)},
{ }
};
enum {
ALC268_FIXUP_INV_DMIC,
ALC268_FIXUP_HP_EAPD,
ALC268_FIXUP_SPDIF,
};
static const struct hda_fixup alc268_fixups[] = {
[ALC268_FIXUP_INV_DMIC] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_inv_dmic,
},
[ALC268_FIXUP_HP_EAPD] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
{0x15, AC_VERB_SET_EAPD_BTLENABLE, 0},
{}
}
},
[ALC268_FIXUP_SPDIF] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x1e, 0x014b1180 }, /* enable SPDIF out */
{}
}
},
};
static const struct hda_model_fixup alc268_fixup_models[] = {
{.id = ALC268_FIXUP_INV_DMIC, .name = "inv-dmic"},
{.id = ALC268_FIXUP_HP_EAPD, .name = "hp-eapd"},
{.id = ALC268_FIXUP_SPDIF, .name = "spdif"},
{}
};
static const struct snd_pci_quirk alc268_fixup_tbl[] = {
SND_PCI_QUIRK(0x1025, 0x0139, "Acer TravelMate 6293", ALC268_FIXUP_SPDIF),
SND_PCI_QUIRK(0x1025, 0x015b, "Acer AOA 150 (ZG5)", ALC268_FIXUP_INV_DMIC),
/* below is codec SSID since multiple Toshiba laptops have the
* same PCI SSID 1179:ff00
*/
SND_PCI_QUIRK(0x1179, 0xff06, "Toshiba P200", ALC268_FIXUP_HP_EAPD),
{}
};
/*
* BIOS auto configuration
*/
static int alc268_parse_auto_config(struct hda_codec *codec)
{
static const hda_nid_t alc268_ssids[] = { 0x15, 0x1b, 0x14, 0 };
return alc_parse_auto_config(codec, NULL, alc268_ssids);
}
/*
*/
static int patch_alc268(struct hda_codec *codec)
{
struct alc_spec *spec;
int i, err;
/* ALC268 has no aa-loopback mixer */
err = alc_alloc_spec(codec, 0);
if (err < 0)
return err;
spec = codec->spec;
if (has_cdefine_beep(codec))
spec->gen.beep_nid = 0x01;
spec->shutup = alc_eapd_shutup;
alc_pre_init(codec);
snd_hda_pick_fixup(codec, alc268_fixup_models, alc268_fixup_tbl, alc268_fixups);
snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
/* automatic parse from the BIOS config */
err = alc268_parse_auto_config(codec);
if (err < 0)
goto error;
if (err > 0 && !spec->gen.no_analog &&
spec->gen.autocfg.speaker_pins[0] != 0x1d) {
for (i = 0; i < ARRAY_SIZE(alc268_beep_mixer); i++) {
if (!snd_hda_gen_add_kctl(&spec->gen, NULL,
&alc268_beep_mixer[i])) {
err = -ENOMEM;
goto error;
}
}
snd_hda_add_verbs(codec, alc268_beep_init_verbs);
if (!query_amp_caps(codec, 0x1d, HDA_INPUT))
/* override the amp caps for beep generator */
snd_hda_override_amp_caps(codec, 0x1d, HDA_INPUT,
(0x0c << AC_AMPCAP_OFFSET_SHIFT) |
(0x0c << AC_AMPCAP_NUM_STEPS_SHIFT) |
(0x07 << AC_AMPCAP_STEP_SIZE_SHIFT) |
(0 << AC_AMPCAP_MUTE_SHIFT));
}
snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
return 0;
error:
alc_free(codec);
return err;
}
/*
* ALC269
*/
static const struct hda_pcm_stream alc269_44k_pcm_analog_playback = {
.rates = SNDRV_PCM_RATE_44100, /* fixed rate */
};
static const struct hda_pcm_stream alc269_44k_pcm_analog_capture = {
.rates = SNDRV_PCM_RATE_44100, /* fixed rate */
};
/* different alc269-variants */
enum {
ALC269_TYPE_ALC269VA,
ALC269_TYPE_ALC269VB,
ALC269_TYPE_ALC269VC,
ALC269_TYPE_ALC269VD,
ALC269_TYPE_ALC280,
ALC269_TYPE_ALC282,
ALC269_TYPE_ALC283,
ALC269_TYPE_ALC284,
ALC269_TYPE_ALC293,
ALC269_TYPE_ALC286,
ALC269_TYPE_ALC298,
ALC269_TYPE_ALC255,
ALC269_TYPE_ALC256,
ALC269_TYPE_ALC257,
ALC269_TYPE_ALC215,
ALC269_TYPE_ALC225,
ALC269_TYPE_ALC245,
ALC269_TYPE_ALC287,
ALC269_TYPE_ALC294,
ALC269_TYPE_ALC300,
ALC269_TYPE_ALC623,
ALC269_TYPE_ALC700,
};
/*
* BIOS auto configuration
*/
static int alc269_parse_auto_config(struct hda_codec *codec)
{
static const hda_nid_t alc269_ignore[] = { 0x1d, 0 };
static const hda_nid_t alc269_ssids[] = { 0, 0x1b, 0x14, 0x21 };
static const hda_nid_t alc269va_ssids[] = { 0x15, 0x1b, 0x14, 0 };
struct alc_spec *spec = codec->spec;
const hda_nid_t *ssids;
switch (spec->codec_variant) {
case ALC269_TYPE_ALC269VA:
case ALC269_TYPE_ALC269VC:
case ALC269_TYPE_ALC280:
case ALC269_TYPE_ALC284:
case ALC269_TYPE_ALC293:
ssids = alc269va_ssids;
break;
case ALC269_TYPE_ALC269VB:
case ALC269_TYPE_ALC269VD:
case ALC269_TYPE_ALC282:
case ALC269_TYPE_ALC283:
case ALC269_TYPE_ALC286:
case ALC269_TYPE_ALC298:
case ALC269_TYPE_ALC255:
case ALC269_TYPE_ALC256:
case ALC269_TYPE_ALC257:
case ALC269_TYPE_ALC215:
case ALC269_TYPE_ALC225:
case ALC269_TYPE_ALC245:
case ALC269_TYPE_ALC287:
case ALC269_TYPE_ALC294:
case ALC269_TYPE_ALC300:
case ALC269_TYPE_ALC623:
case ALC269_TYPE_ALC700:
ssids = alc269_ssids;
break;
default:
ssids = alc269_ssids;
break;
}
return alc_parse_auto_config(codec, alc269_ignore, ssids);
}
static const struct hda_jack_keymap alc_headset_btn_keymap[] = {
{ SND_JACK_BTN_0, KEY_PLAYPAUSE },
{ SND_JACK_BTN_1, KEY_VOICECOMMAND },
{ SND_JACK_BTN_2, KEY_VOLUMEUP },
{ SND_JACK_BTN_3, KEY_VOLUMEDOWN },
{}
};
static void alc_headset_btn_callback(struct hda_codec *codec,
struct hda_jack_callback *jack)
{
int report = 0;
if (jack->unsol_res & (7 << 13))
report |= SND_JACK_BTN_0;
if (jack->unsol_res & (1 << 16 | 3 << 8))
report |= SND_JACK_BTN_1;
/* Volume up key */
if (jack->unsol_res & (7 << 23))
report |= SND_JACK_BTN_2;
/* Volume down key */
if (jack->unsol_res & (7 << 10))
report |= SND_JACK_BTN_3;
snd_hda_jack_set_button_state(codec, jack->nid, report);
}
static void alc_disable_headset_jack_key(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
if (!spec->has_hs_key)
return;
switch (codec->core.vendor_id) {
case 0x10ec0215:
case 0x10ec0225:
case 0x10ec0285:
case 0x10ec0287:
case 0x10ec0295:
case 0x10ec0289:
case 0x10ec0299:
alc_write_coef_idx(codec, 0x48, 0x0);
alc_update_coef_idx(codec, 0x49, 0x0045, 0x0);
alc_update_coef_idx(codec, 0x44, 0x0045 << 8, 0x0);
break;
case 0x10ec0230:
case 0x10ec0236:
case 0x10ec0256:
case 0x19e58326:
alc_write_coef_idx(codec, 0x48, 0x0);
alc_update_coef_idx(codec, 0x49, 0x0045, 0x0);
break;
}
}
static void alc_enable_headset_jack_key(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
if (!spec->has_hs_key)
return;
switch (codec->core.vendor_id) {
case 0x10ec0215:
case 0x10ec0225:
case 0x10ec0285:
case 0x10ec0287:
case 0x10ec0295:
case 0x10ec0289:
case 0x10ec0299:
alc_write_coef_idx(codec, 0x48, 0xd011);
alc_update_coef_idx(codec, 0x49, 0x007f, 0x0045);
alc_update_coef_idx(codec, 0x44, 0x007f << 8, 0x0045 << 8);
break;
case 0x10ec0230:
case 0x10ec0236:
case 0x10ec0256:
case 0x19e58326:
alc_write_coef_idx(codec, 0x48, 0xd011);
alc_update_coef_idx(codec, 0x49, 0x007f, 0x0045);
break;
}
}
static void alc_fixup_headset_jack(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
hda_nid_t hp_pin;
switch (action) {
case HDA_FIXUP_ACT_PRE_PROBE:
spec->has_hs_key = 1;
snd_hda_jack_detect_enable_callback(codec, 0x55,
alc_headset_btn_callback);
break;
case HDA_FIXUP_ACT_BUILD:
hp_pin = alc_get_hp_pin(spec);
if (!hp_pin || snd_hda_jack_bind_keymap(codec, 0x55,
alc_headset_btn_keymap,
hp_pin))
snd_hda_jack_add_kctl(codec, 0x55, "Headset Jack",
false, SND_JACK_HEADSET,
alc_headset_btn_keymap);
alc_enable_headset_jack_key(codec);
break;
}
}
static void alc269vb_toggle_power_output(struct hda_codec *codec, int power_up)
{
alc_update_coef_idx(codec, 0x04, 1 << 11, power_up ? (1 << 11) : 0);
}
static void alc269_shutup(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
if (spec->codec_variant == ALC269_TYPE_ALC269VB)
alc269vb_toggle_power_output(codec, 0);
if (spec->codec_variant == ALC269_TYPE_ALC269VB &&
(alc_get_coef0(codec) & 0x00ff) == 0x018) {
msleep(150);
}
alc_shutup_pins(codec);
}
static const struct coef_fw alc282_coefs[] = {
WRITE_COEF(0x03, 0x0002), /* Power Down Control */
UPDATE_COEF(0x05, 0xff3f, 0x0700), /* FIFO and filter clock */
WRITE_COEF(0x07, 0x0200), /* DMIC control */
UPDATE_COEF(0x06, 0x00f0, 0), /* Analog clock */
UPDATE_COEF(0x08, 0xfffc, 0x0c2c), /* JD */
WRITE_COEF(0x0a, 0xcccc), /* JD offset1 */
WRITE_COEF(0x0b, 0xcccc), /* JD offset2 */
WRITE_COEF(0x0e, 0x6e00), /* LDO1/2/3, DAC/ADC */
UPDATE_COEF(0x0f, 0xf800, 0x1000), /* JD */
UPDATE_COEF(0x10, 0xfc00, 0x0c00), /* Capless */
WRITE_COEF(0x6f, 0x0), /* Class D test 4 */
UPDATE_COEF(0x0c, 0xfe00, 0), /* IO power down directly */
WRITE_COEF(0x34, 0xa0c0), /* ANC */
UPDATE_COEF(0x16, 0x0008, 0), /* AGC MUX */
UPDATE_COEF(0x1d, 0x00e0, 0), /* DAC simple content protection */
UPDATE_COEF(0x1f, 0x00e0, 0), /* ADC simple content protection */
WRITE_COEF(0x21, 0x8804), /* DAC ADC Zero Detection */
WRITE_COEF(0x63, 0x2902), /* PLL */
WRITE_COEF(0x68, 0xa080), /* capless control 2 */
WRITE_COEF(0x69, 0x3400), /* capless control 3 */
WRITE_COEF(0x6a, 0x2f3e), /* capless control 4 */
WRITE_COEF(0x6b, 0x0), /* capless control 5 */
UPDATE_COEF(0x6d, 0x0fff, 0x0900), /* class D test 2 */
WRITE_COEF(0x6e, 0x110a), /* class D test 3 */
UPDATE_COEF(0x70, 0x00f8, 0x00d8), /* class D test 5 */
WRITE_COEF(0x71, 0x0014), /* class D test 6 */
WRITE_COEF(0x72, 0xc2ba), /* classD OCP */
UPDATE_COEF(0x77, 0x0f80, 0), /* classD pure DC test */
WRITE_COEF(0x6c, 0xfc06), /* Class D amp control */
{}
};
static void alc282_restore_default_value(struct hda_codec *codec)
{
alc_process_coef_fw(codec, alc282_coefs);
}
static void alc282_init(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
hda_nid_t hp_pin = alc_get_hp_pin(spec);
bool hp_pin_sense;
int coef78;
alc282_restore_default_value(codec);
if (!hp_pin)
return;
hp_pin_sense = snd_hda_jack_detect(codec, hp_pin);
coef78 = alc_read_coef_idx(codec, 0x78);
/* Index 0x78 Direct Drive HP AMP LPM Control 1 */
/* Headphone capless set to high power mode */
alc_write_coef_idx(codec, 0x78, 0x9004);
if (hp_pin_sense)
msleep(2);
snd_hda_codec_write(codec, hp_pin, 0,
AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE);
if (hp_pin_sense)
msleep(85);
snd_hda_codec_write(codec, hp_pin, 0,
AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
if (hp_pin_sense)
msleep(100);
/* Headphone capless set to normal mode */
alc_write_coef_idx(codec, 0x78, coef78);
}
static void alc282_shutup(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
hda_nid_t hp_pin = alc_get_hp_pin(spec);
bool hp_pin_sense;
int coef78;
if (!hp_pin) {
alc269_shutup(codec);
return;
}
hp_pin_sense = snd_hda_jack_detect(codec, hp_pin);
coef78 = alc_read_coef_idx(codec, 0x78);
alc_write_coef_idx(codec, 0x78, 0x9004);
if (hp_pin_sense)
msleep(2);
snd_hda_codec_write(codec, hp_pin, 0,
AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE);
if (hp_pin_sense)
msleep(85);
if (!spec->no_shutup_pins)
snd_hda_codec_write(codec, hp_pin, 0,
AC_VERB_SET_PIN_WIDGET_CONTROL, 0x0);
if (hp_pin_sense)
msleep(100);
alc_auto_setup_eapd(codec, false);
alc_shutup_pins(codec);
alc_write_coef_idx(codec, 0x78, coef78);
}
static const struct coef_fw alc283_coefs[] = {
WRITE_COEF(0x03, 0x0002), /* Power Down Control */
UPDATE_COEF(0x05, 0xff3f, 0x0700), /* FIFO and filter clock */
WRITE_COEF(0x07, 0x0200), /* DMIC control */
UPDATE_COEF(0x06, 0x00f0, 0), /* Analog clock */
UPDATE_COEF(0x08, 0xfffc, 0x0c2c), /* JD */
WRITE_COEF(0x0a, 0xcccc), /* JD offset1 */
WRITE_COEF(0x0b, 0xcccc), /* JD offset2 */
WRITE_COEF(0x0e, 0x6fc0), /* LDO1/2/3, DAC/ADC */
UPDATE_COEF(0x0f, 0xf800, 0x1000), /* JD */
UPDATE_COEF(0x10, 0xfc00, 0x0c00), /* Capless */
WRITE_COEF(0x3a, 0x0), /* Class D test 4 */
UPDATE_COEF(0x0c, 0xfe00, 0x0), /* IO power down directly */
WRITE_COEF(0x22, 0xa0c0), /* ANC */
UPDATE_COEFEX(0x53, 0x01, 0x000f, 0x0008), /* AGC MUX */
UPDATE_COEF(0x1d, 0x00e0, 0), /* DAC simple content protection */
UPDATE_COEF(0x1f, 0x00e0, 0), /* ADC simple content protection */
WRITE_COEF(0x21, 0x8804), /* DAC ADC Zero Detection */
WRITE_COEF(0x2e, 0x2902), /* PLL */
WRITE_COEF(0x33, 0xa080), /* capless control 2 */
WRITE_COEF(0x34, 0x3400), /* capless control 3 */
WRITE_COEF(0x35, 0x2f3e), /* capless control 4 */
WRITE_COEF(0x36, 0x0), /* capless control 5 */
UPDATE_COEF(0x38, 0x0fff, 0x0900), /* class D test 2 */
WRITE_COEF(0x39, 0x110a), /* class D test 3 */
UPDATE_COEF(0x3b, 0x00f8, 0x00d8), /* class D test 5 */
WRITE_COEF(0x3c, 0x0014), /* class D test 6 */
WRITE_COEF(0x3d, 0xc2ba), /* classD OCP */
UPDATE_COEF(0x42, 0x0f80, 0x0), /* classD pure DC test */
WRITE_COEF(0x49, 0x0), /* test mode */
UPDATE_COEF(0x40, 0xf800, 0x9800), /* Class D DC enable */
UPDATE_COEF(0x42, 0xf000, 0x2000), /* DC offset */
WRITE_COEF(0x37, 0xfc06), /* Class D amp control */
UPDATE_COEF(0x1b, 0x8000, 0), /* HP JD control */
{}
};
static void alc283_restore_default_value(struct hda_codec *codec)
{
alc_process_coef_fw(codec, alc283_coefs);
}
static void alc283_init(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
hda_nid_t hp_pin = alc_get_hp_pin(spec);
bool hp_pin_sense;
alc283_restore_default_value(codec);
if (!hp_pin)
return;
msleep(30);
hp_pin_sense = snd_hda_jack_detect(codec, hp_pin);
/* Index 0x43 Direct Drive HP AMP LPM Control 1 */
/* Headphone capless set to high power mode */
alc_write_coef_idx(codec, 0x43, 0x9004);
snd_hda_codec_write(codec, hp_pin, 0,
AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE);
if (hp_pin_sense)
msleep(85);
snd_hda_codec_write(codec, hp_pin, 0,
AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
if (hp_pin_sense)
msleep(85);
/* Index 0x46 Combo jack auto switch control 2 */
/* 3k pull low control for Headset jack. */
alc_update_coef_idx(codec, 0x46, 3 << 12, 0);
/* Headphone capless set to normal mode */
alc_write_coef_idx(codec, 0x43, 0x9614);
}
static void alc283_shutup(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
hda_nid_t hp_pin = alc_get_hp_pin(spec);
bool hp_pin_sense;
if (!hp_pin) {
alc269_shutup(codec);
return;
}
hp_pin_sense = snd_hda_jack_detect(codec, hp_pin);
alc_write_coef_idx(codec, 0x43, 0x9004);
/*depop hp during suspend*/
alc_write_coef_idx(codec, 0x06, 0x2100);
snd_hda_codec_write(codec, hp_pin, 0,
AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE);
if (hp_pin_sense)
msleep(100);
if (!spec->no_shutup_pins)
snd_hda_codec_write(codec, hp_pin, 0,
AC_VERB_SET_PIN_WIDGET_CONTROL, 0x0);
alc_update_coef_idx(codec, 0x46, 0, 3 << 12);
if (hp_pin_sense)
msleep(100);
alc_auto_setup_eapd(codec, false);
alc_shutup_pins(codec);
alc_write_coef_idx(codec, 0x43, 0x9614);
}
static void alc256_init(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
hda_nid_t hp_pin = alc_get_hp_pin(spec);
bool hp_pin_sense;
if (spec->ultra_low_power) {
alc_update_coef_idx(codec, 0x03, 1<<1, 1<<1);
alc_update_coef_idx(codec, 0x08, 3<<2, 3<<2);
alc_update_coef_idx(codec, 0x08, 7<<4, 0);
alc_update_coef_idx(codec, 0x3b, 1<<15, 0);
alc_update_coef_idx(codec, 0x0e, 7<<6, 7<<6);
msleep(30);
}
if (!hp_pin)
hp_pin = 0x21;
msleep(30);
hp_pin_sense = snd_hda_jack_detect(codec, hp_pin);
if (hp_pin_sense)
msleep(2);
alc_update_coefex_idx(codec, 0x57, 0x04, 0x0007, 0x1); /* Low power */
snd_hda_codec_write(codec, hp_pin, 0,
AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE);
if (hp_pin_sense || spec->ultra_low_power)
msleep(85);
snd_hda_codec_write(codec, hp_pin, 0,
AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
if (hp_pin_sense || spec->ultra_low_power)
msleep(100);
alc_update_coef_idx(codec, 0x46, 3 << 12, 0);
alc_update_coefex_idx(codec, 0x57, 0x04, 0x0007, 0x4); /* Hight power */
alc_update_coefex_idx(codec, 0x53, 0x02, 0x8000, 1 << 15); /* Clear bit */
alc_update_coefex_idx(codec, 0x53, 0x02, 0x8000, 0 << 15);
/*
* Expose headphone mic (or possibly Line In on some machines) instead
* of PC Beep on 1Ah, and disable 1Ah loopback for all outputs. See
* Documentation/sound/hd-audio/realtek-pc-beep.rst for details of
* this register.
*/
alc_write_coef_idx(codec, 0x36, 0x5757);
}
static void alc256_shutup(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
hda_nid_t hp_pin = alc_get_hp_pin(spec);
bool hp_pin_sense;
if (!hp_pin)
hp_pin = 0x21;
alc_update_coefex_idx(codec, 0x57, 0x04, 0x0007, 0x1); /* Low power */
hp_pin_sense = snd_hda_jack_detect(codec, hp_pin);
if (hp_pin_sense)
msleep(2);
snd_hda_codec_write(codec, hp_pin, 0,
AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE);
if (hp_pin_sense || spec->ultra_low_power)
msleep(85);
/* 3k pull low control for Headset jack. */
/* NOTE: call this before clearing the pin, otherwise codec stalls */
/* If disable 3k pulldown control for alc257, the Mic detection will not work correctly
* when booting with headset plugged. So skip setting it for the codec alc257
*/
if (spec->en_3kpull_low)
alc_update_coef_idx(codec, 0x46, 0, 3 << 12);
if (!spec->no_shutup_pins)
snd_hda_codec_write(codec, hp_pin, 0,
AC_VERB_SET_PIN_WIDGET_CONTROL, 0x0);
if (hp_pin_sense || spec->ultra_low_power)
msleep(100);
alc_auto_setup_eapd(codec, false);
alc_shutup_pins(codec);
if (spec->ultra_low_power) {
msleep(50);
alc_update_coef_idx(codec, 0x03, 1<<1, 0);
alc_update_coef_idx(codec, 0x08, 7<<4, 7<<4);
alc_update_coef_idx(codec, 0x08, 3<<2, 0);
alc_update_coef_idx(codec, 0x3b, 1<<15, 1<<15);
alc_update_coef_idx(codec, 0x0e, 7<<6, 0);
msleep(30);
}
}
static void alc285_hp_init(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
hda_nid_t hp_pin = alc_get_hp_pin(spec);
int i, val;
int coef38, coef0d, coef36;
alc_update_coef_idx(codec, 0x4a, 1<<15, 1<<15); /* Reset HP JD */
coef38 = alc_read_coef_idx(codec, 0x38); /* Amp control */
coef0d = alc_read_coef_idx(codec, 0x0d); /* Digital Misc control */
coef36 = alc_read_coef_idx(codec, 0x36); /* Passthrough Control */
alc_update_coef_idx(codec, 0x38, 1<<4, 0x0);
alc_update_coef_idx(codec, 0x0d, 0x110, 0x0);
alc_update_coef_idx(codec, 0x67, 0xf000, 0x3000);
if (hp_pin)
snd_hda_codec_write(codec, hp_pin, 0,
AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE);
msleep(130);
alc_update_coef_idx(codec, 0x36, 1<<14, 1<<14);
alc_update_coef_idx(codec, 0x36, 1<<13, 0x0);
if (hp_pin)
snd_hda_codec_write(codec, hp_pin, 0,
AC_VERB_SET_PIN_WIDGET_CONTROL, 0x0);
msleep(10);
alc_write_coef_idx(codec, 0x67, 0x0); /* Set HP depop to manual mode */
alc_write_coefex_idx(codec, 0x58, 0x00, 0x7880);
alc_write_coefex_idx(codec, 0x58, 0x0f, 0xf049);
alc_update_coefex_idx(codec, 0x58, 0x03, 0x00f0, 0x00c0);
alc_write_coefex_idx(codec, 0x58, 0x00, 0xf888); /* HP depop procedure start */
val = alc_read_coefex_idx(codec, 0x58, 0x00);
for (i = 0; i < 20 && val & 0x8000; i++) {
msleep(50);
val = alc_read_coefex_idx(codec, 0x58, 0x00);
} /* Wait for depop procedure finish */
alc_write_coefex_idx(codec, 0x58, 0x00, val); /* write back the result */
alc_update_coef_idx(codec, 0x38, 1<<4, coef38);
alc_update_coef_idx(codec, 0x0d, 0x110, coef0d);
alc_update_coef_idx(codec, 0x36, 3<<13, coef36);
msleep(50);
alc_update_coef_idx(codec, 0x4a, 1<<15, 0);
}
static void alc225_init(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
hda_nid_t hp_pin = alc_get_hp_pin(spec);
bool hp1_pin_sense, hp2_pin_sense;
if (spec->ultra_low_power) {
alc_update_coef_idx(codec, 0x08, 0x0f << 2, 3<<2);
alc_update_coef_idx(codec, 0x0e, 7<<6, 7<<6);
alc_update_coef_idx(codec, 0x33, 1<<11, 0);
msleep(30);
}
if (spec->codec_variant != ALC269_TYPE_ALC287 &&
spec->codec_variant != ALC269_TYPE_ALC245)
/* required only at boot or S3 and S4 resume time */
if (!spec->done_hp_init ||
is_s3_resume(codec) ||
is_s4_resume(codec)) {
alc285_hp_init(codec);
spec->done_hp_init = true;
}
if (!hp_pin)
hp_pin = 0x21;
msleep(30);
hp1_pin_sense = snd_hda_jack_detect(codec, hp_pin);
hp2_pin_sense = snd_hda_jack_detect(codec, 0x16);
if (hp1_pin_sense || hp2_pin_sense)
msleep(2);
alc_update_coefex_idx(codec, 0x57, 0x04, 0x0007, 0x1); /* Low power */
if (hp1_pin_sense || spec->ultra_low_power)
snd_hda_codec_write(codec, hp_pin, 0,
AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE);
if (hp2_pin_sense)
snd_hda_codec_write(codec, 0x16, 0,
AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE);
if (hp1_pin_sense || hp2_pin_sense || spec->ultra_low_power)
msleep(85);
if (hp1_pin_sense || spec->ultra_low_power)
snd_hda_codec_write(codec, hp_pin, 0,
AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
if (hp2_pin_sense)
snd_hda_codec_write(codec, 0x16, 0,
AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
if (hp1_pin_sense || hp2_pin_sense || spec->ultra_low_power)
msleep(100);
alc_update_coef_idx(codec, 0x4a, 3 << 10, 0);
alc_update_coefex_idx(codec, 0x57, 0x04, 0x0007, 0x4); /* Hight power */
}
static void alc225_shutup(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
hda_nid_t hp_pin = alc_get_hp_pin(spec);
bool hp1_pin_sense, hp2_pin_sense;
if (!hp_pin)
hp_pin = 0x21;
alc_disable_headset_jack_key(codec);
/* 3k pull low control for Headset jack. */
alc_update_coef_idx(codec, 0x4a, 0, 3 << 10);
hp1_pin_sense = snd_hda_jack_detect(codec, hp_pin);
hp2_pin_sense = snd_hda_jack_detect(codec, 0x16);
if (hp1_pin_sense || hp2_pin_sense)
msleep(2);
if (hp1_pin_sense || spec->ultra_low_power)
snd_hda_codec_write(codec, hp_pin, 0,
AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE);
if (hp2_pin_sense)
snd_hda_codec_write(codec, 0x16, 0,
AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE);
if (hp1_pin_sense || hp2_pin_sense || spec->ultra_low_power)
msleep(85);
if (hp1_pin_sense || spec->ultra_low_power)
snd_hda_codec_write(codec, hp_pin, 0,
AC_VERB_SET_PIN_WIDGET_CONTROL, 0x0);
if (hp2_pin_sense)
snd_hda_codec_write(codec, 0x16, 0,
AC_VERB_SET_PIN_WIDGET_CONTROL, 0x0);
if (hp1_pin_sense || hp2_pin_sense || spec->ultra_low_power)
msleep(100);
alc_auto_setup_eapd(codec, false);
alc_shutup_pins(codec);
if (spec->ultra_low_power) {
msleep(50);
alc_update_coef_idx(codec, 0x08, 0x0f << 2, 0x0c << 2);
alc_update_coef_idx(codec, 0x0e, 7<<6, 0);
alc_update_coef_idx(codec, 0x33, 1<<11, 1<<11);
alc_update_coef_idx(codec, 0x4a, 3<<4, 2<<4);
msleep(30);
}
alc_update_coef_idx(codec, 0x4a, 3 << 10, 0);
alc_enable_headset_jack_key(codec);
}
static void alc_default_init(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
hda_nid_t hp_pin = alc_get_hp_pin(spec);
bool hp_pin_sense;
if (!hp_pin)
return;
msleep(30);
hp_pin_sense = snd_hda_jack_detect(codec, hp_pin);
if (hp_pin_sense)
msleep(2);
snd_hda_codec_write(codec, hp_pin, 0,
AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE);
if (hp_pin_sense)
msleep(85);
snd_hda_codec_write(codec, hp_pin, 0,
AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
if (hp_pin_sense)
msleep(100);
}
static void alc_default_shutup(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
hda_nid_t hp_pin = alc_get_hp_pin(spec);
bool hp_pin_sense;
if (!hp_pin) {
alc269_shutup(codec);
return;
}
hp_pin_sense = snd_hda_jack_detect(codec, hp_pin);
if (hp_pin_sense)
msleep(2);
snd_hda_codec_write(codec, hp_pin, 0,
AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE);
if (hp_pin_sense)
msleep(85);
if (!spec->no_shutup_pins)
snd_hda_codec_write(codec, hp_pin, 0,
AC_VERB_SET_PIN_WIDGET_CONTROL, 0x0);
if (hp_pin_sense)
msleep(100);
alc_auto_setup_eapd(codec, false);
alc_shutup_pins(codec);
}
static void alc294_hp_init(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
hda_nid_t hp_pin = alc_get_hp_pin(spec);
int i, val;
if (!hp_pin)
return;
snd_hda_codec_write(codec, hp_pin, 0,
AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE);
msleep(100);
if (!spec->no_shutup_pins)
snd_hda_codec_write(codec, hp_pin, 0,
AC_VERB_SET_PIN_WIDGET_CONTROL, 0x0);
alc_update_coef_idx(codec, 0x6f, 0x000f, 0);/* Set HP depop to manual mode */
alc_update_coefex_idx(codec, 0x58, 0x00, 0x8000, 0x8000); /* HP depop procedure start */
/* Wait for depop procedure finish */
val = alc_read_coefex_idx(codec, 0x58, 0x01);
for (i = 0; i < 20 && val & 0x0080; i++) {
msleep(50);
val = alc_read_coefex_idx(codec, 0x58, 0x01);
}
/* Set HP depop to auto mode */
alc_update_coef_idx(codec, 0x6f, 0x000f, 0x000b);
msleep(50);
}
static void alc294_init(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
/* required only at boot or S4 resume time */
if (!spec->done_hp_init ||
codec->core.dev.power.power_state.event == PM_EVENT_RESTORE) {
alc294_hp_init(codec);
spec->done_hp_init = true;
}
alc_default_init(codec);
}
static void alc5505_coef_set(struct hda_codec *codec, unsigned int index_reg,
unsigned int val)
{
snd_hda_codec_write(codec, 0x51, 0, AC_VERB_SET_COEF_INDEX, index_reg >> 1);
snd_hda_codec_write(codec, 0x51, 0, AC_VERB_SET_PROC_COEF, val & 0xffff); /* LSB */
snd_hda_codec_write(codec, 0x51, 0, AC_VERB_SET_PROC_COEF, val >> 16); /* MSB */
}
static int alc5505_coef_get(struct hda_codec *codec, unsigned int index_reg)
{
unsigned int val;
snd_hda_codec_write(codec, 0x51, 0, AC_VERB_SET_COEF_INDEX, index_reg >> 1);
val = snd_hda_codec_read(codec, 0x51, 0, AC_VERB_GET_PROC_COEF, 0)
& 0xffff;
val |= snd_hda_codec_read(codec, 0x51, 0, AC_VERB_GET_PROC_COEF, 0)
<< 16;
return val;
}
static void alc5505_dsp_halt(struct hda_codec *codec)
{
unsigned int val;
alc5505_coef_set(codec, 0x3000, 0x000c); /* DSP CPU stop */
alc5505_coef_set(codec, 0x880c, 0x0008); /* DDR enter self refresh */
alc5505_coef_set(codec, 0x61c0, 0x11110080); /* Clock control for PLL and CPU */
alc5505_coef_set(codec, 0x6230, 0xfc0d4011); /* Disable Input OP */
alc5505_coef_set(codec, 0x61b4, 0x040a2b03); /* Stop PLL2 */
alc5505_coef_set(codec, 0x61b0, 0x00005b17); /* Stop PLL1 */
alc5505_coef_set(codec, 0x61b8, 0x04133303); /* Stop PLL3 */
val = alc5505_coef_get(codec, 0x6220);
alc5505_coef_set(codec, 0x6220, (val | 0x3000)); /* switch Ringbuffer clock to DBUS clock */
}
static void alc5505_dsp_back_from_halt(struct hda_codec *codec)
{
alc5505_coef_set(codec, 0x61b8, 0x04133302);
alc5505_coef_set(codec, 0x61b0, 0x00005b16);
alc5505_coef_set(codec, 0x61b4, 0x040a2b02);
alc5505_coef_set(codec, 0x6230, 0xf80d4011);
alc5505_coef_set(codec, 0x6220, 0x2002010f);
alc5505_coef_set(codec, 0x880c, 0x00000004);
}
static void alc5505_dsp_init(struct hda_codec *codec)
{
unsigned int val;
alc5505_dsp_halt(codec);
alc5505_dsp_back_from_halt(codec);
alc5505_coef_set(codec, 0x61b0, 0x5b14); /* PLL1 control */
alc5505_coef_set(codec, 0x61b0, 0x5b16);
alc5505_coef_set(codec, 0x61b4, 0x04132b00); /* PLL2 control */
alc5505_coef_set(codec, 0x61b4, 0x04132b02);
alc5505_coef_set(codec, 0x61b8, 0x041f3300); /* PLL3 control*/
alc5505_coef_set(codec, 0x61b8, 0x041f3302);
snd_hda_codec_write(codec, 0x51, 0, AC_VERB_SET_CODEC_RESET, 0); /* Function reset */
alc5505_coef_set(codec, 0x61b8, 0x041b3302);
alc5505_coef_set(codec, 0x61b8, 0x04173302);
alc5505_coef_set(codec, 0x61b8, 0x04163302);
alc5505_coef_set(codec, 0x8800, 0x348b328b); /* DRAM control */
alc5505_coef_set(codec, 0x8808, 0x00020022); /* DRAM control */
alc5505_coef_set(codec, 0x8818, 0x00000400); /* DRAM control */
val = alc5505_coef_get(codec, 0x6200) >> 16; /* Read revision ID */
if (val <= 3)
alc5505_coef_set(codec, 0x6220, 0x2002010f); /* I/O PAD Configuration */
else
alc5505_coef_set(codec, 0x6220, 0x6002018f);
alc5505_coef_set(codec, 0x61ac, 0x055525f0); /**/
alc5505_coef_set(codec, 0x61c0, 0x12230080); /* Clock control */
alc5505_coef_set(codec, 0x61b4, 0x040e2b02); /* PLL2 control */
alc5505_coef_set(codec, 0x61bc, 0x010234f8); /* OSC Control */
alc5505_coef_set(codec, 0x880c, 0x00000004); /* DRAM Function control */
alc5505_coef_set(codec, 0x880c, 0x00000003);
alc5505_coef_set(codec, 0x880c, 0x00000010);
#ifdef HALT_REALTEK_ALC5505
alc5505_dsp_halt(codec);
#endif
}
#ifdef HALT_REALTEK_ALC5505
#define alc5505_dsp_suspend(codec) do { } while (0) /* NOP */
#define alc5505_dsp_resume(codec) do { } while (0) /* NOP */
#else
#define alc5505_dsp_suspend(codec) alc5505_dsp_halt(codec)
#define alc5505_dsp_resume(codec) alc5505_dsp_back_from_halt(codec)
#endif
#ifdef CONFIG_PM
static int alc269_suspend(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
if (spec->has_alc5505_dsp)
alc5505_dsp_suspend(codec);
return alc_suspend(codec);
}
static int alc269_resume(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
if (spec->codec_variant == ALC269_TYPE_ALC269VB)
alc269vb_toggle_power_output(codec, 0);
if (spec->codec_variant == ALC269_TYPE_ALC269VB &&
(alc_get_coef0(codec) & 0x00ff) == 0x018) {
msleep(150);
}
codec->patch_ops.init(codec);
if (spec->codec_variant == ALC269_TYPE_ALC269VB)
alc269vb_toggle_power_output(codec, 1);
if (spec->codec_variant == ALC269_TYPE_ALC269VB &&
(alc_get_coef0(codec) & 0x00ff) == 0x017) {
msleep(200);
}
snd_hda_regmap_sync(codec);
hda_call_check_power_status(codec, 0x01);
/* on some machine, the BIOS will clear the codec gpio data when enter
* suspend, and won't restore the data after resume, so we restore it
* in the driver.
*/
if (spec->gpio_data)
alc_write_gpio_data(codec);
if (spec->has_alc5505_dsp)
alc5505_dsp_resume(codec);
return 0;
}
#endif /* CONFIG_PM */
static void alc269_fixup_pincfg_no_hp_to_lineout(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
if (action == HDA_FIXUP_ACT_PRE_PROBE)
spec->parse_flags = HDA_PINCFG_NO_HP_FIXUP;
}
static void alc269_fixup_pincfg_U7x7_headset_mic(struct hda_codec *codec,
const struct hda_fixup *fix,
int action)
{
unsigned int cfg_headphone = snd_hda_codec_get_pincfg(codec, 0x21);
unsigned int cfg_headset_mic = snd_hda_codec_get_pincfg(codec, 0x19);
if (cfg_headphone && cfg_headset_mic == 0x411111f0)
snd_hda_codec_set_pincfg(codec, 0x19,
(cfg_headphone & ~AC_DEFCFG_DEVICE) |
(AC_JACK_MIC_IN << AC_DEFCFG_DEVICE_SHIFT));
}
static void alc269_fixup_hweq(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
if (action == HDA_FIXUP_ACT_INIT)
alc_update_coef_idx(codec, 0x1e, 0, 0x80);
}
static void alc269_fixup_headset_mic(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
if (action == HDA_FIXUP_ACT_PRE_PROBE)
spec->parse_flags |= HDA_PINCFG_HEADSET_MIC;
}
static void alc271_fixup_dmic(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
static const struct hda_verb verbs[] = {
{0x20, AC_VERB_SET_COEF_INDEX, 0x0d},
{0x20, AC_VERB_SET_PROC_COEF, 0x4000},
{}
};
unsigned int cfg;
if (strcmp(codec->core.chip_name, "ALC271X") &&
strcmp(codec->core.chip_name, "ALC269VB"))
return;
cfg = snd_hda_codec_get_pincfg(codec, 0x12);
if (get_defcfg_connect(cfg) == AC_JACK_PORT_FIXED)
snd_hda_sequence_write(codec, verbs);
}
/* Fix the speaker amp after resume, etc */
static void alc269vb_fixup_aspire_e1_coef(struct hda_codec *codec,
const struct hda_fixup *fix,
int action)
{
if (action == HDA_FIXUP_ACT_INIT)
alc_update_coef_idx(codec, 0x0d, 0x6000, 0x6000);
}
static void alc269_fixup_pcm_44k(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
if (action != HDA_FIXUP_ACT_PROBE)
return;
/* Due to a hardware problem on Lenovo Ideadpad, we need to
* fix the sample rate of analog I/O to 44.1kHz
*/
spec->gen.stream_analog_playback = &alc269_44k_pcm_analog_playback;
spec->gen.stream_analog_capture = &alc269_44k_pcm_analog_capture;
}
static void alc269_fixup_stereo_dmic(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
/* The digital-mic unit sends PDM (differential signal) instead of
* the standard PCM, thus you can't record a valid mono stream as is.
* Below is a workaround specific to ALC269 to control the dmic
* signal source as mono.
*/
if (action == HDA_FIXUP_ACT_INIT)
alc_update_coef_idx(codec, 0x07, 0, 0x80);
}
static void alc269_quanta_automute(struct hda_codec *codec)
{
snd_hda_gen_update_outputs(codec);
alc_write_coef_idx(codec, 0x0c, 0x680);
alc_write_coef_idx(codec, 0x0c, 0x480);
}
static void alc269_fixup_quanta_mute(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
if (action != HDA_FIXUP_ACT_PROBE)
return;
spec->gen.automute_hook = alc269_quanta_automute;
}
static void alc269_x101_hp_automute_hook(struct hda_codec *codec,
struct hda_jack_callback *jack)
{
struct alc_spec *spec = codec->spec;
int vref;
msleep(200);
snd_hda_gen_hp_automute(codec, jack);
vref = spec->gen.hp_jack_present ? PIN_VREF80 : 0;
msleep(100);
snd_hda_codec_write(codec, 0x18, 0, AC_VERB_SET_PIN_WIDGET_CONTROL,
vref);
msleep(500);
snd_hda_codec_write(codec, 0x18, 0, AC_VERB_SET_PIN_WIDGET_CONTROL,
vref);
}
/*
* Magic sequence to make Huawei Matebook X right speaker working (bko#197801)
*/
struct hda_alc298_mbxinit {
unsigned char value_0x23;
unsigned char value_0x25;
};
static void alc298_huawei_mbx_stereo_seq(struct hda_codec *codec,
const struct hda_alc298_mbxinit *initval,
bool first)
{
snd_hda_codec_write(codec, 0x06, 0, AC_VERB_SET_DIGI_CONVERT_3, 0x0);
alc_write_coef_idx(codec, 0x26, 0xb000);
if (first)
snd_hda_codec_write(codec, 0x21, 0, AC_VERB_GET_PIN_SENSE, 0x0);
snd_hda_codec_write(codec, 0x6, 0, AC_VERB_SET_DIGI_CONVERT_3, 0x80);
alc_write_coef_idx(codec, 0x26, 0xf000);
alc_write_coef_idx(codec, 0x23, initval->value_0x23);
if (initval->value_0x23 != 0x1e)
alc_write_coef_idx(codec, 0x25, initval->value_0x25);
snd_hda_codec_write(codec, 0x20, 0, AC_VERB_SET_COEF_INDEX, 0x26);
snd_hda_codec_write(codec, 0x20, 0, AC_VERB_SET_PROC_COEF, 0xb010);
}
static void alc298_fixup_huawei_mbx_stereo(struct hda_codec *codec,
const struct hda_fixup *fix,
int action)
{
/* Initialization magic */
static const struct hda_alc298_mbxinit dac_init[] = {
{0x0c, 0x00}, {0x0d, 0x00}, {0x0e, 0x00}, {0x0f, 0x00},
{0x10, 0x00}, {0x1a, 0x40}, {0x1b, 0x82}, {0x1c, 0x00},
{0x1d, 0x00}, {0x1e, 0x00}, {0x1f, 0x00},
{0x20, 0xc2}, {0x21, 0xc8}, {0x22, 0x26}, {0x23, 0x24},
{0x27, 0xff}, {0x28, 0xff}, {0x29, 0xff}, {0x2a, 0x8f},
{0x2b, 0x02}, {0x2c, 0x48}, {0x2d, 0x34}, {0x2e, 0x00},
{0x2f, 0x00},
{0x30, 0x00}, {0x31, 0x00}, {0x32, 0x00}, {0x33, 0x00},
{0x34, 0x00}, {0x35, 0x01}, {0x36, 0x93}, {0x37, 0x0c},
{0x38, 0x00}, {0x39, 0x00}, {0x3a, 0xf8}, {0x38, 0x80},
{}
};
const struct hda_alc298_mbxinit *seq;
if (action != HDA_FIXUP_ACT_INIT)
return;
/* Start */
snd_hda_codec_write(codec, 0x06, 0, AC_VERB_SET_DIGI_CONVERT_3, 0x00);
snd_hda_codec_write(codec, 0x06, 0, AC_VERB_SET_DIGI_CONVERT_3, 0x80);
alc_write_coef_idx(codec, 0x26, 0xf000);
alc_write_coef_idx(codec, 0x22, 0x31);
alc_write_coef_idx(codec, 0x23, 0x0b);
alc_write_coef_idx(codec, 0x25, 0x00);
snd_hda_codec_write(codec, 0x20, 0, AC_VERB_SET_COEF_INDEX, 0x26);
snd_hda_codec_write(codec, 0x20, 0, AC_VERB_SET_PROC_COEF, 0xb010);
for (seq = dac_init; seq->value_0x23; seq++)
alc298_huawei_mbx_stereo_seq(codec, seq, seq == dac_init);
}
static void alc269_fixup_x101_headset_mic(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
spec->parse_flags |= HDA_PINCFG_HEADSET_MIC;
spec->gen.hp_automute_hook = alc269_x101_hp_automute_hook;
}
}
static void alc_update_vref_led(struct hda_codec *codec, hda_nid_t pin,
bool polarity, bool on)
{
unsigned int pinval;
if (!pin)
return;
if (polarity)
on = !on;
pinval = snd_hda_codec_get_pin_target(codec, pin);
pinval &= ~AC_PINCTL_VREFEN;
pinval |= on ? AC_PINCTL_VREF_80 : AC_PINCTL_VREF_HIZ;
/* temporarily power up/down for setting VREF */
snd_hda_power_up_pm(codec);
snd_hda_set_pin_ctl_cache(codec, pin, pinval);
snd_hda_power_down_pm(codec);
}
/* update mute-LED according to the speaker mute state via mic VREF pin */
static int vref_mute_led_set(struct led_classdev *led_cdev,
enum led_brightness brightness)
{
struct hda_codec *codec = dev_to_hda_codec(led_cdev->dev->parent);
struct alc_spec *spec = codec->spec;
alc_update_vref_led(codec, spec->mute_led_nid,
spec->mute_led_polarity, brightness);
return 0;
}
/* Make sure the led works even in runtime suspend */
static unsigned int led_power_filter(struct hda_codec *codec,
hda_nid_t nid,
unsigned int power_state)
{
struct alc_spec *spec = codec->spec;
if (power_state != AC_PWRST_D3 || nid == 0 ||
(nid != spec->mute_led_nid && nid != spec->cap_mute_led_nid))
return power_state;
/* Set pin ctl again, it might have just been set to 0 */
snd_hda_set_pin_ctl(codec, nid,
snd_hda_codec_get_pin_target(codec, nid));
return snd_hda_gen_path_power_filter(codec, nid, power_state);
}
static void alc269_fixup_hp_mute_led(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
const struct dmi_device *dev = NULL;
if (action != HDA_FIXUP_ACT_PRE_PROBE)
return;
while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING, NULL, dev))) {
int pol, pin;
if (sscanf(dev->name, "HP_Mute_LED_%d_%x", &pol, &pin) != 2)
continue;
if (pin < 0x0a || pin >= 0x10)
break;
spec->mute_led_polarity = pol;
spec->mute_led_nid = pin - 0x0a + 0x18;
snd_hda_gen_add_mute_led_cdev(codec, vref_mute_led_set);
codec->power_filter = led_power_filter;
codec_dbg(codec,
"Detected mute LED for %x:%d\n", spec->mute_led_nid,
spec->mute_led_polarity);
break;
}
}
static void alc269_fixup_hp_mute_led_micx(struct hda_codec *codec,
const struct hda_fixup *fix,
int action, hda_nid_t pin)
{
struct alc_spec *spec = codec->spec;
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
spec->mute_led_polarity = 0;
spec->mute_led_nid = pin;
snd_hda_gen_add_mute_led_cdev(codec, vref_mute_led_set);
codec->power_filter = led_power_filter;
}
}
static void alc269_fixup_hp_mute_led_mic1(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
alc269_fixup_hp_mute_led_micx(codec, fix, action, 0x18);
}
static void alc269_fixup_hp_mute_led_mic2(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
alc269_fixup_hp_mute_led_micx(codec, fix, action, 0x19);
}
static void alc269_fixup_hp_mute_led_mic3(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
alc269_fixup_hp_mute_led_micx(codec, fix, action, 0x1b);
}
/* update LED status via GPIO */
static void alc_update_gpio_led(struct hda_codec *codec, unsigned int mask,
int polarity, bool enabled)
{
if (polarity)
enabled = !enabled;
alc_update_gpio_data(codec, mask, !enabled); /* muted -> LED on */
}
/* turn on/off mute LED via GPIO per vmaster hook */
static int gpio_mute_led_set(struct led_classdev *led_cdev,
enum led_brightness brightness)
{
struct hda_codec *codec = dev_to_hda_codec(led_cdev->dev->parent);
struct alc_spec *spec = codec->spec;
alc_update_gpio_led(codec, spec->gpio_mute_led_mask,
spec->mute_led_polarity, !brightness);
return 0;
}
/* turn on/off mic-mute LED via GPIO per capture hook */
static int micmute_led_set(struct led_classdev *led_cdev,
enum led_brightness brightness)
{
struct hda_codec *codec = dev_to_hda_codec(led_cdev->dev->parent);
struct alc_spec *spec = codec->spec;
alc_update_gpio_led(codec, spec->gpio_mic_led_mask,
spec->micmute_led_polarity, !brightness);
return 0;
}
/* setup mute and mic-mute GPIO bits, add hooks appropriately */
static void alc_fixup_hp_gpio_led(struct hda_codec *codec,
int action,
unsigned int mute_mask,
unsigned int micmute_mask)
{
struct alc_spec *spec = codec->spec;
alc_fixup_gpio(codec, action, mute_mask | micmute_mask);
if (action != HDA_FIXUP_ACT_PRE_PROBE)
return;
if (mute_mask) {
spec->gpio_mute_led_mask = mute_mask;
snd_hda_gen_add_mute_led_cdev(codec, gpio_mute_led_set);
}
if (micmute_mask) {
spec->gpio_mic_led_mask = micmute_mask;
snd_hda_gen_add_micmute_led_cdev(codec, micmute_led_set);
}
}
static void alc236_fixup_hp_gpio_led(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
alc_fixup_hp_gpio_led(codec, action, 0x02, 0x01);
}
static void alc269_fixup_hp_gpio_led(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
alc_fixup_hp_gpio_led(codec, action, 0x08, 0x10);
}
static void alc285_fixup_hp_gpio_led(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
alc_fixup_hp_gpio_led(codec, action, 0x04, 0x01);
}
static void alc286_fixup_hp_gpio_led(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
alc_fixup_hp_gpio_led(codec, action, 0x02, 0x20);
}
static void alc287_fixup_hp_gpio_led(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
alc_fixup_hp_gpio_led(codec, action, 0x10, 0);
}
static void alc245_fixup_hp_gpio_led(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
if (action == HDA_FIXUP_ACT_PRE_PROBE)
spec->micmute_led_polarity = 1;
alc_fixup_hp_gpio_led(codec, action, 0, 0x04);
}
/* turn on/off mic-mute LED per capture hook via VREF change */
static int vref_micmute_led_set(struct led_classdev *led_cdev,
enum led_brightness brightness)
{
struct hda_codec *codec = dev_to_hda_codec(led_cdev->dev->parent);
struct alc_spec *spec = codec->spec;
alc_update_vref_led(codec, spec->cap_mute_led_nid,
spec->micmute_led_polarity, brightness);
return 0;
}
static void alc269_fixup_hp_gpio_mic1_led(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
alc_fixup_hp_gpio_led(codec, action, 0x08, 0);
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
/* Like hp_gpio_mic1_led, but also needs GPIO4 low to
* enable headphone amp
*/
spec->gpio_mask |= 0x10;
spec->gpio_dir |= 0x10;
spec->cap_mute_led_nid = 0x18;
snd_hda_gen_add_micmute_led_cdev(codec, vref_micmute_led_set);
codec->power_filter = led_power_filter;
}
}
static void alc280_fixup_hp_gpio4(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
alc_fixup_hp_gpio_led(codec, action, 0x08, 0);
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
spec->cap_mute_led_nid = 0x18;
snd_hda_gen_add_micmute_led_cdev(codec, vref_micmute_led_set);
codec->power_filter = led_power_filter;
}
}
/* HP Spectre x360 14 model needs a unique workaround for enabling the amp;
* it needs to toggle the GPIO0 once on and off at each time (bko#210633)
*/
static void alc245_fixup_hp_x360_amp(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
switch (action) {
case HDA_FIXUP_ACT_PRE_PROBE:
spec->gpio_mask |= 0x01;
spec->gpio_dir |= 0x01;
break;
case HDA_FIXUP_ACT_INIT:
/* need to toggle GPIO to enable the amp */
alc_update_gpio_data(codec, 0x01, true);
msleep(100);
alc_update_gpio_data(codec, 0x01, false);
break;
}
}
/* toggle GPIO2 at each time stream is started; we use PREPARE state instead */
static void alc274_hp_envy_pcm_hook(struct hda_pcm_stream *hinfo,
struct hda_codec *codec,
struct snd_pcm_substream *substream,
int action)
{
switch (action) {
case HDA_GEN_PCM_ACT_PREPARE:
alc_update_gpio_data(codec, 0x04, true);
break;
case HDA_GEN_PCM_ACT_CLEANUP:
alc_update_gpio_data(codec, 0x04, false);
break;
}
}
static void alc274_fixup_hp_envy_gpio(struct hda_codec *codec,
const struct hda_fixup *fix,
int action)
{
struct alc_spec *spec = codec->spec;
if (action == HDA_FIXUP_ACT_PROBE) {
spec->gpio_mask |= 0x04;
spec->gpio_dir |= 0x04;
spec->gen.pcm_playback_hook = alc274_hp_envy_pcm_hook;
}
}
static void alc_update_coef_led(struct hda_codec *codec,
struct alc_coef_led *led,
bool polarity, bool on)
{
if (polarity)
on = !on;
/* temporarily power up/down for setting COEF bit */
alc_update_coef_idx(codec, led->idx, led->mask,
on ? led->on : led->off);
}
/* update mute-LED according to the speaker mute state via COEF bit */
static int coef_mute_led_set(struct led_classdev *led_cdev,
enum led_brightness brightness)
{
struct hda_codec *codec = dev_to_hda_codec(led_cdev->dev->parent);
struct alc_spec *spec = codec->spec;
alc_update_coef_led(codec, &spec->mute_led_coef,
spec->mute_led_polarity, brightness);
return 0;
}
static void alc285_fixup_hp_mute_led_coefbit(struct hda_codec *codec,
const struct hda_fixup *fix,
int action)
{
struct alc_spec *spec = codec->spec;
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
spec->mute_led_polarity = 0;
spec->mute_led_coef.idx = 0x0b;
spec->mute_led_coef.mask = 1 << 3;
spec->mute_led_coef.on = 1 << 3;
spec->mute_led_coef.off = 0;
snd_hda_gen_add_mute_led_cdev(codec, coef_mute_led_set);
}
}
static void alc236_fixup_hp_mute_led_coefbit(struct hda_codec *codec,
const struct hda_fixup *fix,
int action)
{
struct alc_spec *spec = codec->spec;
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
spec->mute_led_polarity = 0;
spec->mute_led_coef.idx = 0x34;
spec->mute_led_coef.mask = 1 << 5;
spec->mute_led_coef.on = 0;
spec->mute_led_coef.off = 1 << 5;
snd_hda_gen_add_mute_led_cdev(codec, coef_mute_led_set);
}
}
static void alc236_fixup_hp_mute_led_coefbit2(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
spec->mute_led_polarity = 0;
spec->mute_led_coef.idx = 0x07;
spec->mute_led_coef.mask = 1;
spec->mute_led_coef.on = 1;
spec->mute_led_coef.off = 0;
snd_hda_gen_add_mute_led_cdev(codec, coef_mute_led_set);
}
}
static void alc245_fixup_hp_mute_led_coefbit(struct hda_codec *codec,
const struct hda_fixup *fix,
int action)
{
struct alc_spec *spec = codec->spec;
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
spec->mute_led_polarity = 0;
spec->mute_led_coef.idx = 0x0b;
spec->mute_led_coef.mask = 3 << 2;
spec->mute_led_coef.on = 2 << 2;
spec->mute_led_coef.off = 1 << 2;
snd_hda_gen_add_mute_led_cdev(codec, coef_mute_led_set);
}
}
/* turn on/off mic-mute LED per capture hook by coef bit */
static int coef_micmute_led_set(struct led_classdev *led_cdev,
enum led_brightness brightness)
{
struct hda_codec *codec = dev_to_hda_codec(led_cdev->dev->parent);
struct alc_spec *spec = codec->spec;
alc_update_coef_led(codec, &spec->mic_led_coef,
spec->micmute_led_polarity, brightness);
return 0;
}
static void alc285_fixup_hp_coef_micmute_led(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
spec->mic_led_coef.idx = 0x19;
spec->mic_led_coef.mask = 1 << 13;
spec->mic_led_coef.on = 1 << 13;
spec->mic_led_coef.off = 0;
snd_hda_gen_add_micmute_led_cdev(codec, coef_micmute_led_set);
}
}
static void alc285_fixup_hp_gpio_micmute_led(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
if (action == HDA_FIXUP_ACT_PRE_PROBE)
spec->micmute_led_polarity = 1;
alc_fixup_hp_gpio_led(codec, action, 0, 0x04);
}
static void alc236_fixup_hp_coef_micmute_led(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
spec->mic_led_coef.idx = 0x35;
spec->mic_led_coef.mask = 3 << 2;
spec->mic_led_coef.on = 2 << 2;
spec->mic_led_coef.off = 1 << 2;
snd_hda_gen_add_micmute_led_cdev(codec, coef_micmute_led_set);
}
}
static void alc285_fixup_hp_mute_led(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
alc285_fixup_hp_mute_led_coefbit(codec, fix, action);
alc285_fixup_hp_coef_micmute_led(codec, fix, action);
}
static void alc285_fixup_hp_spectre_x360_mute_led(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
alc285_fixup_hp_mute_led_coefbit(codec, fix, action);
alc285_fixup_hp_gpio_micmute_led(codec, fix, action);
}
static void alc236_fixup_hp_mute_led(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
alc236_fixup_hp_mute_led_coefbit(codec, fix, action);
alc236_fixup_hp_coef_micmute_led(codec, fix, action);
}
static void alc236_fixup_hp_micmute_led_vref(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
spec->cap_mute_led_nid = 0x1a;
snd_hda_gen_add_micmute_led_cdev(codec, vref_micmute_led_set);
codec->power_filter = led_power_filter;
}
}
static void alc236_fixup_hp_mute_led_micmute_vref(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
alc236_fixup_hp_mute_led_coefbit(codec, fix, action);
alc236_fixup_hp_micmute_led_vref(codec, fix, action);
}
static inline void alc298_samsung_write_coef_pack(struct hda_codec *codec,
const unsigned short coefs[2])
{
alc_write_coef_idx(codec, 0x23, coefs[0]);
alc_write_coef_idx(codec, 0x25, coefs[1]);
alc_write_coef_idx(codec, 0x26, 0xb011);
}
struct alc298_samsung_amp_desc {
unsigned char nid;
unsigned short init_seq[2][2];
};
static void alc298_fixup_samsung_amp(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
int i, j;
static const unsigned short init_seq[][2] = {
{ 0x19, 0x00 }, { 0x20, 0xc0 }, { 0x22, 0x44 }, { 0x23, 0x08 },
{ 0x24, 0x85 }, { 0x25, 0x41 }, { 0x35, 0x40 }, { 0x36, 0x01 },
{ 0x38, 0x81 }, { 0x3a, 0x03 }, { 0x3b, 0x81 }, { 0x40, 0x3e },
{ 0x41, 0x07 }, { 0x400, 0x1 }
};
static const struct alc298_samsung_amp_desc amps[] = {
{ 0x3a, { { 0x18, 0x1 }, { 0x26, 0x0 } } },
{ 0x39, { { 0x18, 0x2 }, { 0x26, 0x1 } } }
};
if (action != HDA_FIXUP_ACT_INIT)
return;
for (i = 0; i < ARRAY_SIZE(amps); i++) {
alc_write_coef_idx(codec, 0x22, amps[i].nid);
for (j = 0; j < ARRAY_SIZE(amps[i].init_seq); j++)
alc298_samsung_write_coef_pack(codec, amps[i].init_seq[j]);
for (j = 0; j < ARRAY_SIZE(init_seq); j++)
alc298_samsung_write_coef_pack(codec, init_seq[j]);
}
}
#if IS_REACHABLE(CONFIG_INPUT)
static void gpio2_mic_hotkey_event(struct hda_codec *codec,
struct hda_jack_callback *event)
{
struct alc_spec *spec = codec->spec;
/* GPIO2 just toggles on a keypress/keyrelease cycle. Therefore
send both key on and key off event for every interrupt. */
input_report_key(spec->kb_dev, spec->alc_mute_keycode_map[ALC_KEY_MICMUTE_INDEX], 1);
input_sync(spec->kb_dev);
input_report_key(spec->kb_dev, spec->alc_mute_keycode_map[ALC_KEY_MICMUTE_INDEX], 0);
input_sync(spec->kb_dev);
}
static int alc_register_micmute_input_device(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
int i;
spec->kb_dev = input_allocate_device();
if (!spec->kb_dev) {
codec_err(codec, "Out of memory (input_allocate_device)\n");
return -ENOMEM;
}
spec->alc_mute_keycode_map[ALC_KEY_MICMUTE_INDEX] = KEY_MICMUTE;
spec->kb_dev->name = "Microphone Mute Button";
spec->kb_dev->evbit[0] = BIT_MASK(EV_KEY);
spec->kb_dev->keycodesize = sizeof(spec->alc_mute_keycode_map[0]);
spec->kb_dev->keycodemax = ARRAY_SIZE(spec->alc_mute_keycode_map);
spec->kb_dev->keycode = spec->alc_mute_keycode_map;
for (i = 0; i < ARRAY_SIZE(spec->alc_mute_keycode_map); i++)
set_bit(spec->alc_mute_keycode_map[i], spec->kb_dev->keybit);
if (input_register_device(spec->kb_dev)) {
codec_err(codec, "input_register_device failed\n");
input_free_device(spec->kb_dev);
spec->kb_dev = NULL;
return -ENOMEM;
}
return 0;
}
/* GPIO1 = set according to SKU external amp
* GPIO2 = mic mute hotkey
* GPIO3 = mute LED
* GPIO4 = mic mute LED
*/
static void alc280_fixup_hp_gpio2_mic_hotkey(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
alc_fixup_hp_gpio_led(codec, action, 0x08, 0x10);
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
spec->init_amp = ALC_INIT_DEFAULT;
if (alc_register_micmute_input_device(codec) != 0)
return;
spec->gpio_mask |= 0x06;
spec->gpio_dir |= 0x02;
spec->gpio_data |= 0x02;
snd_hda_codec_write_cache(codec, codec->core.afg, 0,
AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x04);
snd_hda_jack_detect_enable_callback(codec, codec->core.afg,
gpio2_mic_hotkey_event);
return;
}
if (!spec->kb_dev)
return;
switch (action) {
case HDA_FIXUP_ACT_FREE:
input_unregister_device(spec->kb_dev);
spec->kb_dev = NULL;
}
}
/* Line2 = mic mute hotkey
* GPIO2 = mic mute LED
*/
static void alc233_fixup_lenovo_line2_mic_hotkey(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
alc_fixup_hp_gpio_led(codec, action, 0, 0x04);
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
spec->init_amp = ALC_INIT_DEFAULT;
if (alc_register_micmute_input_device(codec) != 0)
return;
snd_hda_jack_detect_enable_callback(codec, 0x1b,
gpio2_mic_hotkey_event);
return;
}
if (!spec->kb_dev)
return;
switch (action) {
case HDA_FIXUP_ACT_FREE:
input_unregister_device(spec->kb_dev);
spec->kb_dev = NULL;
}
}
#else /* INPUT */
#define alc280_fixup_hp_gpio2_mic_hotkey NULL
#define alc233_fixup_lenovo_line2_mic_hotkey NULL
#endif /* INPUT */
static void alc269_fixup_hp_line1_mic1_led(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
alc269_fixup_hp_mute_led_micx(codec, fix, action, 0x1a);
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
spec->cap_mute_led_nid = 0x18;
snd_hda_gen_add_micmute_led_cdev(codec, vref_micmute_led_set);
}
}
static const struct coef_fw alc225_pre_hsmode[] = {
UPDATE_COEF(0x4a, 1<<8, 0),
UPDATE_COEFEX(0x57, 0x05, 1<<14, 0),
UPDATE_COEF(0x63, 3<<14, 3<<14),
UPDATE_COEF(0x4a, 3<<4, 2<<4),
UPDATE_COEF(0x4a, 3<<10, 3<<10),
UPDATE_COEF(0x45, 0x3f<<10, 0x34<<10),
UPDATE_COEF(0x4a, 3<<10, 0),
{}
};
static void alc_headset_mode_unplugged(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
static const struct coef_fw coef0255[] = {
WRITE_COEF(0x1b, 0x0c0b), /* LDO and MISC control */
WRITE_COEF(0x45, 0xd089), /* UAJ function set to menual mode */
UPDATE_COEFEX(0x57, 0x05, 1<<14, 0), /* Direct Drive HP Amp control(Set to verb control)*/
WRITE_COEF(0x06, 0x6104), /* Set MIC2 Vref gate with HP */
WRITE_COEFEX(0x57, 0x03, 0x8aa6), /* Direct Drive HP Amp control */
{}
};
static const struct coef_fw coef0256[] = {
WRITE_COEF(0x1b, 0x0c4b), /* LDO and MISC control */
WRITE_COEF(0x45, 0xd089), /* UAJ function set to menual mode */
WRITE_COEF(0x06, 0x6104), /* Set MIC2 Vref gate with HP */
WRITE_COEFEX(0x57, 0x03, 0x09a3), /* Direct Drive HP Amp control */
UPDATE_COEFEX(0x57, 0x05, 1<<14, 0), /* Direct Drive HP Amp control(Set to verb control)*/
{}
};
static const struct coef_fw coef0233[] = {
WRITE_COEF(0x1b, 0x0c0b),
WRITE_COEF(0x45, 0xc429),
UPDATE_COEF(0x35, 0x4000, 0),
WRITE_COEF(0x06, 0x2104),
WRITE_COEF(0x1a, 0x0001),
WRITE_COEF(0x26, 0x0004),
WRITE_COEF(0x32, 0x42a3),
{}
};
static const struct coef_fw coef0288[] = {
UPDATE_COEF(0x4f, 0xfcc0, 0xc400),
UPDATE_COEF(0x50, 0x2000, 0x2000),
UPDATE_COEF(0x56, 0x0006, 0x0006),
UPDATE_COEF(0x66, 0x0008, 0),
UPDATE_COEF(0x67, 0x2000, 0),
{}
};
static const struct coef_fw coef0298[] = {
UPDATE_COEF(0x19, 0x1300, 0x0300),
{}
};
static const struct coef_fw coef0292[] = {
WRITE_COEF(0x76, 0x000e),
WRITE_COEF(0x6c, 0x2400),
WRITE_COEF(0x18, 0x7308),
WRITE_COEF(0x6b, 0xc429),
{}
};
static const struct coef_fw coef0293[] = {
UPDATE_COEF(0x10, 7<<8, 6<<8), /* SET Line1 JD to 0 */
UPDATE_COEFEX(0x57, 0x05, 1<<15|1<<13, 0x0), /* SET charge pump by verb */
UPDATE_COEFEX(0x57, 0x03, 1<<10, 1<<10), /* SET EN_OSW to 1 */
UPDATE_COEF(0x1a, 1<<3, 1<<3), /* Combo JD gating with LINE1-VREFO */
WRITE_COEF(0x45, 0xc429), /* Set to TRS type */
UPDATE_COEF(0x4a, 0x000f, 0x000e), /* Combo Jack auto detect */
{}
};
static const struct coef_fw coef0668[] = {
WRITE_COEF(0x15, 0x0d40),
WRITE_COEF(0xb7, 0x802b),
{}
};
static const struct coef_fw coef0225[] = {
UPDATE_COEF(0x63, 3<<14, 0),
{}
};
static const struct coef_fw coef0274[] = {
UPDATE_COEF(0x4a, 0x0100, 0),
UPDATE_COEFEX(0x57, 0x05, 0x4000, 0),
UPDATE_COEF(0x6b, 0xf000, 0x5000),
UPDATE_COEF(0x4a, 0x0010, 0),
UPDATE_COEF(0x4a, 0x0c00, 0x0c00),
WRITE_COEF(0x45, 0x5289),
UPDATE_COEF(0x4a, 0x0c00, 0),
{}
};
if (spec->no_internal_mic_pin) {
alc_update_coef_idx(codec, 0x45, 0xf<<12 | 1<<10, 5<<12);
return;
}
switch (codec->core.vendor_id) {
case 0x10ec0255:
alc_process_coef_fw(codec, coef0255);
break;
case 0x10ec0230:
case 0x10ec0236:
case 0x10ec0256:
case 0x19e58326:
alc_process_coef_fw(codec, coef0256);
break;
case 0x10ec0234:
case 0x10ec0274:
case 0x10ec0294:
alc_process_coef_fw(codec, coef0274);
break;
case 0x10ec0233:
case 0x10ec0283:
alc_process_coef_fw(codec, coef0233);
break;
case 0x10ec0286:
case 0x10ec0288:
alc_process_coef_fw(codec, coef0288);
break;
case 0x10ec0298:
alc_process_coef_fw(codec, coef0298);
alc_process_coef_fw(codec, coef0288);
break;
case 0x10ec0292:
alc_process_coef_fw(codec, coef0292);
break;
case 0x10ec0293:
alc_process_coef_fw(codec, coef0293);
break;
case 0x10ec0668:
alc_process_coef_fw(codec, coef0668);
break;
case 0x10ec0215:
case 0x10ec0225:
case 0x10ec0285:
case 0x10ec0295:
case 0x10ec0289:
case 0x10ec0299:
alc_process_coef_fw(codec, alc225_pre_hsmode);
alc_process_coef_fw(codec, coef0225);
break;
case 0x10ec0867:
alc_update_coefex_idx(codec, 0x57, 0x5, 1<<14, 0);
break;
}
codec_dbg(codec, "Headset jack set to unplugged mode.\n");
}
static void alc_headset_mode_mic_in(struct hda_codec *codec, hda_nid_t hp_pin,
hda_nid_t mic_pin)
{
static const struct coef_fw coef0255[] = {
WRITE_COEFEX(0x57, 0x03, 0x8aa6),
WRITE_COEF(0x06, 0x6100), /* Set MIC2 Vref gate to normal */
{}
};
static const struct coef_fw coef0256[] = {
UPDATE_COEFEX(0x57, 0x05, 1<<14, 1<<14), /* Direct Drive HP Amp control(Set to verb control)*/
WRITE_COEFEX(0x57, 0x03, 0x09a3),
WRITE_COEF(0x06, 0x6100), /* Set MIC2 Vref gate to normal */
{}
};
static const struct coef_fw coef0233[] = {
UPDATE_COEF(0x35, 0, 1<<14),
WRITE_COEF(0x06, 0x2100),
WRITE_COEF(0x1a, 0x0021),
WRITE_COEF(0x26, 0x008c),
{}
};
static const struct coef_fw coef0288[] = {
UPDATE_COEF(0x4f, 0x00c0, 0),
UPDATE_COEF(0x50, 0x2000, 0),
UPDATE_COEF(0x56, 0x0006, 0),
UPDATE_COEF(0x4f, 0xfcc0, 0xc400),
UPDATE_COEF(0x66, 0x0008, 0x0008),
UPDATE_COEF(0x67, 0x2000, 0x2000),
{}
};
static const struct coef_fw coef0292[] = {
WRITE_COEF(0x19, 0xa208),
WRITE_COEF(0x2e, 0xacf0),
{}
};
static const struct coef_fw coef0293[] = {
UPDATE_COEFEX(0x57, 0x05, 0, 1<<15|1<<13), /* SET charge pump by verb */
UPDATE_COEFEX(0x57, 0x03, 1<<10, 0), /* SET EN_OSW to 0 */
UPDATE_COEF(0x1a, 1<<3, 0), /* Combo JD gating without LINE1-VREFO */
{}
};
static const struct coef_fw coef0688[] = {
WRITE_COEF(0xb7, 0x802b),
WRITE_COEF(0xb5, 0x1040),
UPDATE_COEF(0xc3, 0, 1<<12),
{}
};
static const struct coef_fw coef0225[] = {
UPDATE_COEFEX(0x57, 0x05, 1<<14, 1<<14),
UPDATE_COEF(0x4a, 3<<4, 2<<4),
UPDATE_COEF(0x63, 3<<14, 0),
{}
};
static const struct coef_fw coef0274[] = {
UPDATE_COEFEX(0x57, 0x05, 0x4000, 0x4000),
UPDATE_COEF(0x4a, 0x0010, 0),
UPDATE_COEF(0x6b, 0xf000, 0),
{}
};
switch (codec->core.vendor_id) {
case 0x10ec0255:
alc_write_coef_idx(codec, 0x45, 0xc489);
snd_hda_set_pin_ctl_cache(codec, hp_pin, 0);
alc_process_coef_fw(codec, coef0255);
snd_hda_set_pin_ctl_cache(codec, mic_pin, PIN_VREF50);
break;
case 0x10ec0230:
case 0x10ec0236:
case 0x10ec0256:
case 0x19e58326:
alc_write_coef_idx(codec, 0x45, 0xc489);
snd_hda_set_pin_ctl_cache(codec, hp_pin, 0);
alc_process_coef_fw(codec, coef0256);
snd_hda_set_pin_ctl_cache(codec, mic_pin, PIN_VREF50);
break;
case 0x10ec0234:
case 0x10ec0274:
case 0x10ec0294:
alc_write_coef_idx(codec, 0x45, 0x4689);
snd_hda_set_pin_ctl_cache(codec, hp_pin, 0);
alc_process_coef_fw(codec, coef0274);
snd_hda_set_pin_ctl_cache(codec, mic_pin, PIN_VREF50);
break;
case 0x10ec0233:
case 0x10ec0283:
alc_write_coef_idx(codec, 0x45, 0xc429);
snd_hda_set_pin_ctl_cache(codec, hp_pin, 0);
alc_process_coef_fw(codec, coef0233);
snd_hda_set_pin_ctl_cache(codec, mic_pin, PIN_VREF50);
break;
case 0x10ec0286:
case 0x10ec0288:
case 0x10ec0298:
snd_hda_set_pin_ctl_cache(codec, hp_pin, 0);
alc_process_coef_fw(codec, coef0288);
snd_hda_set_pin_ctl_cache(codec, mic_pin, PIN_VREF50);
break;
case 0x10ec0292:
snd_hda_set_pin_ctl_cache(codec, hp_pin, 0);
alc_process_coef_fw(codec, coef0292);
break;
case 0x10ec0293:
/* Set to TRS mode */
alc_write_coef_idx(codec, 0x45, 0xc429);
snd_hda_set_pin_ctl_cache(codec, hp_pin, 0);
alc_process_coef_fw(codec, coef0293);
snd_hda_set_pin_ctl_cache(codec, mic_pin, PIN_VREF50);
break;
case 0x10ec0867:
alc_update_coefex_idx(codec, 0x57, 0x5, 0, 1<<14);
fallthrough;
case 0x10ec0221:
case 0x10ec0662:
snd_hda_set_pin_ctl_cache(codec, hp_pin, 0);
snd_hda_set_pin_ctl_cache(codec, mic_pin, PIN_VREF50);
break;
case 0x10ec0668:
alc_write_coef_idx(codec, 0x11, 0x0001);
snd_hda_set_pin_ctl_cache(codec, hp_pin, 0);
alc_process_coef_fw(codec, coef0688);
snd_hda_set_pin_ctl_cache(codec, mic_pin, PIN_VREF50);
break;
case 0x10ec0215:
case 0x10ec0225:
case 0x10ec0285:
case 0x10ec0295:
case 0x10ec0289:
case 0x10ec0299:
alc_process_coef_fw(codec, alc225_pre_hsmode);
alc_update_coef_idx(codec, 0x45, 0x3f<<10, 0x31<<10);
snd_hda_set_pin_ctl_cache(codec, hp_pin, 0);
alc_process_coef_fw(codec, coef0225);
snd_hda_set_pin_ctl_cache(codec, mic_pin, PIN_VREF50);
break;
}
codec_dbg(codec, "Headset jack set to mic-in mode.\n");
}
static void alc_headset_mode_default(struct hda_codec *codec)
{
static const struct coef_fw coef0225[] = {
UPDATE_COEF(0x45, 0x3f<<10, 0x30<<10),
UPDATE_COEF(0x45, 0x3f<<10, 0x31<<10),
UPDATE_COEF(0x49, 3<<8, 0<<8),
UPDATE_COEF(0x4a, 3<<4, 3<<4),
UPDATE_COEF(0x63, 3<<14, 0),
UPDATE_COEF(0x67, 0xf000, 0x3000),
{}
};
static const struct coef_fw coef0255[] = {
WRITE_COEF(0x45, 0xc089),
WRITE_COEF(0x45, 0xc489),
WRITE_COEFEX(0x57, 0x03, 0x8ea6),
WRITE_COEF(0x49, 0x0049),
{}
};
static const struct coef_fw coef0256[] = {
WRITE_COEF(0x45, 0xc489),
WRITE_COEFEX(0x57, 0x03, 0x0da3),
WRITE_COEF(0x49, 0x0049),
UPDATE_COEFEX(0x57, 0x05, 1<<14, 0), /* Direct Drive HP Amp control(Set to verb control)*/
WRITE_COEF(0x06, 0x6100),
{}
};
static const struct coef_fw coef0233[] = {
WRITE_COEF(0x06, 0x2100),
WRITE_COEF(0x32, 0x4ea3),
{}
};
static const struct coef_fw coef0288[] = {
UPDATE_COEF(0x4f, 0xfcc0, 0xc400), /* Set to TRS type */
UPDATE_COEF(0x50, 0x2000, 0x2000),
UPDATE_COEF(0x56, 0x0006, 0x0006),
UPDATE_COEF(0x66, 0x0008, 0),
UPDATE_COEF(0x67, 0x2000, 0),
{}
};
static const struct coef_fw coef0292[] = {
WRITE_COEF(0x76, 0x000e),
WRITE_COEF(0x6c, 0x2400),
WRITE_COEF(0x6b, 0xc429),
WRITE_COEF(0x18, 0x7308),
{}
};
static const struct coef_fw coef0293[] = {
UPDATE_COEF(0x4a, 0x000f, 0x000e), /* Combo Jack auto detect */
WRITE_COEF(0x45, 0xC429), /* Set to TRS type */
UPDATE_COEF(0x1a, 1<<3, 0), /* Combo JD gating without LINE1-VREFO */
{}
};
static const struct coef_fw coef0688[] = {
WRITE_COEF(0x11, 0x0041),
WRITE_COEF(0x15, 0x0d40),
WRITE_COEF(0xb7, 0x802b),
{}
};
static const struct coef_fw coef0274[] = {
WRITE_COEF(0x45, 0x4289),
UPDATE_COEF(0x4a, 0x0010, 0x0010),
UPDATE_COEF(0x6b, 0x0f00, 0),
UPDATE_COEF(0x49, 0x0300, 0x0300),
{}
};
switch (codec->core.vendor_id) {
case 0x10ec0215:
case 0x10ec0225:
case 0x10ec0285:
case 0x10ec0295:
case 0x10ec0289:
case 0x10ec0299:
alc_process_coef_fw(codec, alc225_pre_hsmode);
alc_process_coef_fw(codec, coef0225);
break;
case 0x10ec0255:
alc_process_coef_fw(codec, coef0255);
break;
case 0x10ec0230:
case 0x10ec0236:
case 0x10ec0256:
case 0x19e58326:
alc_write_coef_idx(codec, 0x1b, 0x0e4b);
alc_write_coef_idx(codec, 0x45, 0xc089);
msleep(50);
alc_process_coef_fw(codec, coef0256);
break;
case 0x10ec0234:
case 0x10ec0274:
case 0x10ec0294:
alc_process_coef_fw(codec, coef0274);
break;
case 0x10ec0233:
case 0x10ec0283:
alc_process_coef_fw(codec, coef0233);
break;
case 0x10ec0286:
case 0x10ec0288:
case 0x10ec0298:
alc_process_coef_fw(codec, coef0288);
break;
case 0x10ec0292:
alc_process_coef_fw(codec, coef0292);
break;
case 0x10ec0293:
alc_process_coef_fw(codec, coef0293);
break;
case 0x10ec0668:
alc_process_coef_fw(codec, coef0688);
break;
case 0x10ec0867:
alc_update_coefex_idx(codec, 0x57, 0x5, 1<<14, 0);
break;
}
codec_dbg(codec, "Headset jack set to headphone (default) mode.\n");
}
/* Iphone type */
static void alc_headset_mode_ctia(struct hda_codec *codec)
{
int val;
static const struct coef_fw coef0255[] = {
WRITE_COEF(0x45, 0xd489), /* Set to CTIA type */
WRITE_COEF(0x1b, 0x0c2b),
WRITE_COEFEX(0x57, 0x03, 0x8ea6),
{}
};
static const struct coef_fw coef0256[] = {
WRITE_COEF(0x45, 0xd489), /* Set to CTIA type */
WRITE_COEF(0x1b, 0x0e6b),
{}
};
static const struct coef_fw coef0233[] = {
WRITE_COEF(0x45, 0xd429),
WRITE_COEF(0x1b, 0x0c2b),
WRITE_COEF(0x32, 0x4ea3),
{}
};
static const struct coef_fw coef0288[] = {
UPDATE_COEF(0x50, 0x2000, 0x2000),
UPDATE_COEF(0x56, 0x0006, 0x0006),
UPDATE_COEF(0x66, 0x0008, 0),
UPDATE_COEF(0x67, 0x2000, 0),
{}
};
static const struct coef_fw coef0292[] = {
WRITE_COEF(0x6b, 0xd429),
WRITE_COEF(0x76, 0x0008),
WRITE_COEF(0x18, 0x7388),
{}
};
static const struct coef_fw coef0293[] = {
WRITE_COEF(0x45, 0xd429), /* Set to ctia type */
UPDATE_COEF(0x10, 7<<8, 7<<8), /* SET Line1 JD to 1 */
{}
};
static const struct coef_fw coef0688[] = {
WRITE_COEF(0x11, 0x0001),
WRITE_COEF(0x15, 0x0d60),
WRITE_COEF(0xc3, 0x0000),
{}
};
static const struct coef_fw coef0225_1[] = {
UPDATE_COEF(0x45, 0x3f<<10, 0x35<<10),
UPDATE_COEF(0x63, 3<<14, 2<<14),
{}
};
static const struct coef_fw coef0225_2[] = {
UPDATE_COEF(0x45, 0x3f<<10, 0x35<<10),
UPDATE_COEF(0x63, 3<<14, 1<<14),
{}
};
switch (codec->core.vendor_id) {
case 0x10ec0255:
alc_process_coef_fw(codec, coef0255);
break;
case 0x10ec0230:
case 0x10ec0236:
case 0x10ec0256:
case 0x19e58326:
alc_process_coef_fw(codec, coef0256);
break;
case 0x10ec0234:
case 0x10ec0274:
case 0x10ec0294:
alc_write_coef_idx(codec, 0x45, 0xd689);
break;
case 0x10ec0233:
case 0x10ec0283:
alc_process_coef_fw(codec, coef0233);
break;
case 0x10ec0298:
val = alc_read_coef_idx(codec, 0x50);
if (val & (1 << 12)) {
alc_update_coef_idx(codec, 0x8e, 0x0070, 0x0020);
alc_update_coef_idx(codec, 0x4f, 0xfcc0, 0xd400);
msleep(300);
} else {
alc_update_coef_idx(codec, 0x8e, 0x0070, 0x0010);
alc_update_coef_idx(codec, 0x4f, 0xfcc0, 0xd400);
msleep(300);
}
break;
case 0x10ec0286:
case 0x10ec0288:
alc_update_coef_idx(codec, 0x4f, 0xfcc0, 0xd400);
msleep(300);
alc_process_coef_fw(codec, coef0288);
break;
case 0x10ec0292:
alc_process_coef_fw(codec, coef0292);
break;
case 0x10ec0293:
alc_process_coef_fw(codec, coef0293);
break;
case 0x10ec0668:
alc_process_coef_fw(codec, coef0688);
break;
case 0x10ec0215:
case 0x10ec0225:
case 0x10ec0285:
case 0x10ec0295:
case 0x10ec0289:
case 0x10ec0299:
val = alc_read_coef_idx(codec, 0x45);
if (val & (1 << 9))
alc_process_coef_fw(codec, coef0225_2);
else
alc_process_coef_fw(codec, coef0225_1);
break;
case 0x10ec0867:
alc_update_coefex_idx(codec, 0x57, 0x5, 1<<14, 0);
break;
}
codec_dbg(codec, "Headset jack set to iPhone-style headset mode.\n");
}
/* Nokia type */
static void alc_headset_mode_omtp(struct hda_codec *codec)
{
static const struct coef_fw coef0255[] = {
WRITE_COEF(0x45, 0xe489), /* Set to OMTP Type */
WRITE_COEF(0x1b, 0x0c2b),
WRITE_COEFEX(0x57, 0x03, 0x8ea6),
{}
};
static const struct coef_fw coef0256[] = {
WRITE_COEF(0x45, 0xe489), /* Set to OMTP Type */
WRITE_COEF(0x1b, 0x0e6b),
{}
};
static const struct coef_fw coef0233[] = {
WRITE_COEF(0x45, 0xe429),
WRITE_COEF(0x1b, 0x0c2b),
WRITE_COEF(0x32, 0x4ea3),
{}
};
static const struct coef_fw coef0288[] = {
UPDATE_COEF(0x50, 0x2000, 0x2000),
UPDATE_COEF(0x56, 0x0006, 0x0006),
UPDATE_COEF(0x66, 0x0008, 0),
UPDATE_COEF(0x67, 0x2000, 0),
{}
};
static const struct coef_fw coef0292[] = {
WRITE_COEF(0x6b, 0xe429),
WRITE_COEF(0x76, 0x0008),
WRITE_COEF(0x18, 0x7388),
{}
};
static const struct coef_fw coef0293[] = {
WRITE_COEF(0x45, 0xe429), /* Set to omtp type */
UPDATE_COEF(0x10, 7<<8, 7<<8), /* SET Line1 JD to 1 */
{}
};
static const struct coef_fw coef0688[] = {
WRITE_COEF(0x11, 0x0001),
WRITE_COEF(0x15, 0x0d50),
WRITE_COEF(0xc3, 0x0000),
{}
};
static const struct coef_fw coef0225[] = {
UPDATE_COEF(0x45, 0x3f<<10, 0x39<<10),
UPDATE_COEF(0x63, 3<<14, 2<<14),
{}
};
switch (codec->core.vendor_id) {
case 0x10ec0255:
alc_process_coef_fw(codec, coef0255);
break;
case 0x10ec0230:
case 0x10ec0236:
case 0x10ec0256:
case 0x19e58326:
alc_process_coef_fw(codec, coef0256);
break;
case 0x10ec0234:
case 0x10ec0274:
case 0x10ec0294:
alc_write_coef_idx(codec, 0x45, 0xe689);
break;
case 0x10ec0233:
case 0x10ec0283:
alc_process_coef_fw(codec, coef0233);
break;
case 0x10ec0298:
alc_update_coef_idx(codec, 0x8e, 0x0070, 0x0010);/* Headset output enable */
alc_update_coef_idx(codec, 0x4f, 0xfcc0, 0xe400);
msleep(300);
break;
case 0x10ec0286:
case 0x10ec0288:
alc_update_coef_idx(codec, 0x4f, 0xfcc0, 0xe400);
msleep(300);
alc_process_coef_fw(codec, coef0288);
break;
case 0x10ec0292:
alc_process_coef_fw(codec, coef0292);
break;
case 0x10ec0293:
alc_process_coef_fw(codec, coef0293);
break;
case 0x10ec0668:
alc_process_coef_fw(codec, coef0688);
break;
case 0x10ec0215:
case 0x10ec0225:
case 0x10ec0285:
case 0x10ec0295:
case 0x10ec0289:
case 0x10ec0299:
alc_process_coef_fw(codec, coef0225);
break;
}
codec_dbg(codec, "Headset jack set to Nokia-style headset mode.\n");
}
static void alc_determine_headset_type(struct hda_codec *codec)
{
int val;
bool is_ctia = false;
struct alc_spec *spec = codec->spec;
static const struct coef_fw coef0255[] = {
WRITE_COEF(0x45, 0xd089), /* combo jack auto switch control(Check type)*/
WRITE_COEF(0x49, 0x0149), /* combo jack auto switch control(Vref
conteol) */
{}
};
static const struct coef_fw coef0288[] = {
UPDATE_COEF(0x4f, 0xfcc0, 0xd400), /* Check Type */
{}
};
static const struct coef_fw coef0298[] = {
UPDATE_COEF(0x50, 0x2000, 0x2000),
UPDATE_COEF(0x56, 0x0006, 0x0006),
UPDATE_COEF(0x66, 0x0008, 0),
UPDATE_COEF(0x67, 0x2000, 0),
UPDATE_COEF(0x19, 0x1300, 0x1300),
{}
};
static const struct coef_fw coef0293[] = {
UPDATE_COEF(0x4a, 0x000f, 0x0008), /* Combo Jack auto detect */
WRITE_COEF(0x45, 0xD429), /* Set to ctia type */
{}
};
static const struct coef_fw coef0688[] = {
WRITE_COEF(0x11, 0x0001),
WRITE_COEF(0xb7, 0x802b),
WRITE_COEF(0x15, 0x0d60),
WRITE_COEF(0xc3, 0x0c00),
{}
};
static const struct coef_fw coef0274[] = {
UPDATE_COEF(0x4a, 0x0010, 0),
UPDATE_COEF(0x4a, 0x8000, 0),
WRITE_COEF(0x45, 0xd289),
UPDATE_COEF(0x49, 0x0300, 0x0300),
{}
};
if (spec->no_internal_mic_pin) {
alc_update_coef_idx(codec, 0x45, 0xf<<12 | 1<<10, 5<<12);
return;
}
switch (codec->core.vendor_id) {
case 0x10ec0255:
alc_process_coef_fw(codec, coef0255);
msleep(300);
val = alc_read_coef_idx(codec, 0x46);
is_ctia = (val & 0x0070) == 0x0070;
break;
case 0x10ec0230:
case 0x10ec0236:
case 0x10ec0256:
case 0x19e58326:
alc_write_coef_idx(codec, 0x1b, 0x0e4b);
alc_write_coef_idx(codec, 0x06, 0x6104);
alc_write_coefex_idx(codec, 0x57, 0x3, 0x09a3);
snd_hda_codec_write(codec, 0x21, 0,
AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE);
msleep(80);
snd_hda_codec_write(codec, 0x21, 0,
AC_VERB_SET_PIN_WIDGET_CONTROL, 0x0);
alc_process_coef_fw(codec, coef0255);
msleep(300);
val = alc_read_coef_idx(codec, 0x46);
is_ctia = (val & 0x0070) == 0x0070;
alc_write_coefex_idx(codec, 0x57, 0x3, 0x0da3);
alc_update_coefex_idx(codec, 0x57, 0x5, 1<<14, 0);
snd_hda_codec_write(codec, 0x21, 0,
AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
msleep(80);
snd_hda_codec_write(codec, 0x21, 0,
AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
break;
case 0x10ec0234:
case 0x10ec0274:
case 0x10ec0294:
alc_process_coef_fw(codec, coef0274);
msleep(850);
val = alc_read_coef_idx(codec, 0x46);
is_ctia = (val & 0x00f0) == 0x00f0;
break;
case 0x10ec0233:
case 0x10ec0283:
alc_write_coef_idx(codec, 0x45, 0xd029);
msleep(300);
val = alc_read_coef_idx(codec, 0x46);
is_ctia = (val & 0x0070) == 0x0070;
break;
case 0x10ec0298:
snd_hda_codec_write(codec, 0x21, 0,
AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE);
msleep(100);
snd_hda_codec_write(codec, 0x21, 0,
AC_VERB_SET_PIN_WIDGET_CONTROL, 0x0);
msleep(200);
val = alc_read_coef_idx(codec, 0x50);
if (val & (1 << 12)) {
alc_update_coef_idx(codec, 0x8e, 0x0070, 0x0020);
alc_process_coef_fw(codec, coef0288);
msleep(350);
val = alc_read_coef_idx(codec, 0x50);
is_ctia = (val & 0x0070) == 0x0070;
} else {
alc_update_coef_idx(codec, 0x8e, 0x0070, 0x0010);
alc_process_coef_fw(codec, coef0288);
msleep(350);
val = alc_read_coef_idx(codec, 0x50);
is_ctia = (val & 0x0070) == 0x0070;
}
alc_process_coef_fw(codec, coef0298);
snd_hda_codec_write(codec, 0x21, 0,
AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP);
msleep(75);
snd_hda_codec_write(codec, 0x21, 0,
AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
break;
case 0x10ec0286:
case 0x10ec0288:
alc_process_coef_fw(codec, coef0288);
msleep(350);
val = alc_read_coef_idx(codec, 0x50);
is_ctia = (val & 0x0070) == 0x0070;
break;
case 0x10ec0292:
alc_write_coef_idx(codec, 0x6b, 0xd429);
msleep(300);
val = alc_read_coef_idx(codec, 0x6c);
is_ctia = (val & 0x001c) == 0x001c;
break;
case 0x10ec0293:
alc_process_coef_fw(codec, coef0293);
msleep(300);
val = alc_read_coef_idx(codec, 0x46);
is_ctia = (val & 0x0070) == 0x0070;
break;
case 0x10ec0668:
alc_process_coef_fw(codec, coef0688);
msleep(300);
val = alc_read_coef_idx(codec, 0xbe);
is_ctia = (val & 0x1c02) == 0x1c02;
break;
case 0x10ec0215:
case 0x10ec0225:
case 0x10ec0285:
case 0x10ec0295:
case 0x10ec0289:
case 0x10ec0299:
snd_hda_codec_write(codec, 0x21, 0,
AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE);
msleep(80);
snd_hda_codec_write(codec, 0x21, 0,
AC_VERB_SET_PIN_WIDGET_CONTROL, 0x0);
alc_process_coef_fw(codec, alc225_pre_hsmode);
alc_update_coef_idx(codec, 0x67, 0xf000, 0x1000);
val = alc_read_coef_idx(codec, 0x45);
if (val & (1 << 9)) {
alc_update_coef_idx(codec, 0x45, 0x3f<<10, 0x34<<10);
alc_update_coef_idx(codec, 0x49, 3<<8, 2<<8);
msleep(800);
val = alc_read_coef_idx(codec, 0x46);
is_ctia = (val & 0x00f0) == 0x00f0;
} else {
alc_update_coef_idx(codec, 0x45, 0x3f<<10, 0x34<<10);
alc_update_coef_idx(codec, 0x49, 3<<8, 1<<8);
msleep(800);
val = alc_read_coef_idx(codec, 0x46);
is_ctia = (val & 0x00f0) == 0x00f0;
}
alc_update_coef_idx(codec, 0x4a, 7<<6, 7<<6);
alc_update_coef_idx(codec, 0x4a, 3<<4, 3<<4);
alc_update_coef_idx(codec, 0x67, 0xf000, 0x3000);
snd_hda_codec_write(codec, 0x21, 0,
AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
msleep(80);
snd_hda_codec_write(codec, 0x21, 0,
AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
break;
case 0x10ec0867:
is_ctia = true;
break;
}
codec_dbg(codec, "Headset jack detected iPhone-style headset: %s\n",
is_ctia ? "yes" : "no");
spec->current_headset_type = is_ctia ? ALC_HEADSET_TYPE_CTIA : ALC_HEADSET_TYPE_OMTP;
}
static void alc_update_headset_mode(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
hda_nid_t mux_pin = spec->gen.imux_pins[spec->gen.cur_mux[0]];
hda_nid_t hp_pin = alc_get_hp_pin(spec);
int new_headset_mode;
if (!snd_hda_jack_detect(codec, hp_pin))
new_headset_mode = ALC_HEADSET_MODE_UNPLUGGED;
else if (mux_pin == spec->headset_mic_pin)
new_headset_mode = ALC_HEADSET_MODE_HEADSET;
else if (mux_pin == spec->headphone_mic_pin)
new_headset_mode = ALC_HEADSET_MODE_MIC;
else
new_headset_mode = ALC_HEADSET_MODE_HEADPHONE;
if (new_headset_mode == spec->current_headset_mode) {
snd_hda_gen_update_outputs(codec);
return;
}
switch (new_headset_mode) {
case ALC_HEADSET_MODE_UNPLUGGED:
alc_headset_mode_unplugged(codec);
spec->current_headset_mode = ALC_HEADSET_MODE_UNKNOWN;
spec->current_headset_type = ALC_HEADSET_TYPE_UNKNOWN;
spec->gen.hp_jack_present = false;
break;
case ALC_HEADSET_MODE_HEADSET:
if (spec->current_headset_type == ALC_HEADSET_TYPE_UNKNOWN)
alc_determine_headset_type(codec);
if (spec->current_headset_type == ALC_HEADSET_TYPE_CTIA)
alc_headset_mode_ctia(codec);
else if (spec->current_headset_type == ALC_HEADSET_TYPE_OMTP)
alc_headset_mode_omtp(codec);
spec->gen.hp_jack_present = true;
break;
case ALC_HEADSET_MODE_MIC:
alc_headset_mode_mic_in(codec, hp_pin, spec->headphone_mic_pin);
spec->gen.hp_jack_present = false;
break;
case ALC_HEADSET_MODE_HEADPHONE:
alc_headset_mode_default(codec);
spec->gen.hp_jack_present = true;
break;
}
if (new_headset_mode != ALC_HEADSET_MODE_MIC) {
snd_hda_set_pin_ctl_cache(codec, hp_pin,
AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
if (spec->headphone_mic_pin && spec->headphone_mic_pin != hp_pin)
snd_hda_set_pin_ctl_cache(codec, spec->headphone_mic_pin,
PIN_VREFHIZ);
}
spec->current_headset_mode = new_headset_mode;
snd_hda_gen_update_outputs(codec);
}
static void alc_update_headset_mode_hook(struct hda_codec *codec,
struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
alc_update_headset_mode(codec);
}
static void alc_update_headset_jack_cb(struct hda_codec *codec,
struct hda_jack_callback *jack)
{
snd_hda_gen_hp_automute(codec, jack);
alc_update_headset_mode(codec);
}
static void alc_probe_headset_mode(struct hda_codec *codec)
{
int i;
struct alc_spec *spec = codec->spec;
struct auto_pin_cfg *cfg = &spec->gen.autocfg;
/* Find mic pins */
for (i = 0; i < cfg->num_inputs; i++) {
if (cfg->inputs[i].is_headset_mic && !spec->headset_mic_pin)
spec->headset_mic_pin = cfg->inputs[i].pin;
if (cfg->inputs[i].is_headphone_mic && !spec->headphone_mic_pin)
spec->headphone_mic_pin = cfg->inputs[i].pin;
}
WARN_ON(spec->gen.cap_sync_hook);
spec->gen.cap_sync_hook = alc_update_headset_mode_hook;
spec->gen.automute_hook = alc_update_headset_mode;
spec->gen.hp_automute_hook = alc_update_headset_jack_cb;
}
static void alc_fixup_headset_mode(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
switch (action) {
case HDA_FIXUP_ACT_PRE_PROBE:
spec->parse_flags |= HDA_PINCFG_HEADSET_MIC | HDA_PINCFG_HEADPHONE_MIC;
break;
case HDA_FIXUP_ACT_PROBE:
alc_probe_headset_mode(codec);
break;
case HDA_FIXUP_ACT_INIT:
if (is_s3_resume(codec) || is_s4_resume(codec)) {
spec->current_headset_mode = ALC_HEADSET_MODE_UNKNOWN;
spec->current_headset_type = ALC_HEADSET_TYPE_UNKNOWN;
}
alc_update_headset_mode(codec);
break;
}
}
static void alc_fixup_headset_mode_no_hp_mic(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
struct alc_spec *spec = codec->spec;
spec->parse_flags |= HDA_PINCFG_HEADSET_MIC;
}
else
alc_fixup_headset_mode(codec, fix, action);
}
static void alc255_set_default_jack_type(struct hda_codec *codec)
{
/* Set to iphone type */
static const struct coef_fw alc255fw[] = {
WRITE_COEF(0x1b, 0x880b),
WRITE_COEF(0x45, 0xd089),
WRITE_COEF(0x1b, 0x080b),
WRITE_COEF(0x46, 0x0004),
WRITE_COEF(0x1b, 0x0c0b),
{}
};
static const struct coef_fw alc256fw[] = {
WRITE_COEF(0x1b, 0x884b),
WRITE_COEF(0x45, 0xd089),
WRITE_COEF(0x1b, 0x084b),
WRITE_COEF(0x46, 0x0004),
WRITE_COEF(0x1b, 0x0c4b),
{}
};
switch (codec->core.vendor_id) {
case 0x10ec0255:
alc_process_coef_fw(codec, alc255fw);
break;
case 0x10ec0230:
case 0x10ec0236:
case 0x10ec0256:
case 0x19e58326:
alc_process_coef_fw(codec, alc256fw);
break;
}
msleep(30);
}
static void alc_fixup_headset_mode_alc255(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
alc255_set_default_jack_type(codec);
}
alc_fixup_headset_mode(codec, fix, action);
}
static void alc_fixup_headset_mode_alc255_no_hp_mic(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
struct alc_spec *spec = codec->spec;
spec->parse_flags |= HDA_PINCFG_HEADSET_MIC;
alc255_set_default_jack_type(codec);
}
else
alc_fixup_headset_mode(codec, fix, action);
}
static void alc288_update_headset_jack_cb(struct hda_codec *codec,
struct hda_jack_callback *jack)
{
struct alc_spec *spec = codec->spec;
alc_update_headset_jack_cb(codec, jack);
/* Headset Mic enable or disable, only for Dell Dino */
alc_update_gpio_data(codec, 0x40, spec->gen.hp_jack_present);
}
static void alc_fixup_headset_mode_dell_alc288(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
alc_fixup_headset_mode(codec, fix, action);
if (action == HDA_FIXUP_ACT_PROBE) {
struct alc_spec *spec = codec->spec;
/* toggled via hp_automute_hook */
spec->gpio_mask |= 0x40;
spec->gpio_dir |= 0x40;
spec->gen.hp_automute_hook = alc288_update_headset_jack_cb;
}
}
static void alc_fixup_auto_mute_via_amp(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
struct alc_spec *spec = codec->spec;
spec->gen.auto_mute_via_amp = 1;
}
}
static void alc_fixup_no_shutup(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
struct alc_spec *spec = codec->spec;
spec->no_shutup_pins = 1;
}
}
static void alc_fixup_disable_aamix(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
struct alc_spec *spec = codec->spec;
/* Disable AA-loopback as it causes white noise */
spec->gen.mixer_nid = 0;
}
}
/* fixup for Thinkpad docks: add dock pins, avoid HP parser fixup */
static void alc_fixup_tpt440_dock(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
static const struct hda_pintbl pincfgs[] = {
{ 0x16, 0x21211010 }, /* dock headphone */
{ 0x19, 0x21a11010 }, /* dock mic */
{ }
};
struct alc_spec *spec = codec->spec;
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
spec->parse_flags = HDA_PINCFG_NO_HP_FIXUP;
codec->power_save_node = 0; /* avoid click noises */
snd_hda_apply_pincfgs(codec, pincfgs);
}
}
static void alc_fixup_tpt470_dock(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
static const struct hda_pintbl pincfgs[] = {
{ 0x17, 0x21211010 }, /* dock headphone */
{ 0x19, 0x21a11010 }, /* dock mic */
{ }
};
struct alc_spec *spec = codec->spec;
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
spec->parse_flags = HDA_PINCFG_NO_HP_FIXUP;
snd_hda_apply_pincfgs(codec, pincfgs);
} else if (action == HDA_FIXUP_ACT_INIT) {
/* Enable DOCK device */
snd_hda_codec_write(codec, 0x17, 0,
AC_VERB_SET_CONFIG_DEFAULT_BYTES_3, 0);
/* Enable DOCK device */
snd_hda_codec_write(codec, 0x19, 0,
AC_VERB_SET_CONFIG_DEFAULT_BYTES_3, 0);
}
}
static void alc_fixup_tpt470_dacs(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
/* Assure the speaker pin to be coupled with DAC NID 0x03; otherwise
* the speaker output becomes too low by some reason on Thinkpads with
* ALC298 codec
*/
static const hda_nid_t preferred_pairs[] = {
0x14, 0x03, 0x17, 0x02, 0x21, 0x02,
0
};
struct alc_spec *spec = codec->spec;
if (action == HDA_FIXUP_ACT_PRE_PROBE)
spec->gen.preferred_dacs = preferred_pairs;
}
static void alc295_fixup_asus_dacs(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
static const hda_nid_t preferred_pairs[] = {
0x17, 0x02, 0x21, 0x03, 0
};
struct alc_spec *spec = codec->spec;
if (action == HDA_FIXUP_ACT_PRE_PROBE)
spec->gen.preferred_dacs = preferred_pairs;
}
static void alc_shutup_dell_xps13(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
int hp_pin = alc_get_hp_pin(spec);
/* Prevent pop noises when headphones are plugged in */
snd_hda_codec_write(codec, hp_pin, 0,
AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE);
msleep(20);
}
static void alc_fixup_dell_xps13(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
struct hda_input_mux *imux = &spec->gen.input_mux;
int i;
switch (action) {
case HDA_FIXUP_ACT_PRE_PROBE:
/* mic pin 0x19 must be initialized with Vref Hi-Z, otherwise
* it causes a click noise at start up
*/
snd_hda_codec_set_pin_target(codec, 0x19, PIN_VREFHIZ);
spec->shutup = alc_shutup_dell_xps13;
break;
case HDA_FIXUP_ACT_PROBE:
/* Make the internal mic the default input source. */
for (i = 0; i < imux->num_items; i++) {
if (spec->gen.imux_pins[i] == 0x12) {
spec->gen.cur_mux[0] = i;
break;
}
}
break;
}
}
static void alc_fixup_headset_mode_alc662(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
spec->parse_flags |= HDA_PINCFG_HEADSET_MIC;
spec->gen.hp_mic = 1; /* Mic-in is same pin as headphone */
/* Disable boost for mic-in permanently. (This code is only called
from quirks that guarantee that the headphone is at NID 0x1b.) */
snd_hda_codec_write(codec, 0x1b, 0, AC_VERB_SET_AMP_GAIN_MUTE, 0x7000);
snd_hda_override_wcaps(codec, 0x1b, get_wcaps(codec, 0x1b) & ~AC_WCAP_IN_AMP);
} else
alc_fixup_headset_mode(codec, fix, action);
}
static void alc_fixup_headset_mode_alc668(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
alc_write_coef_idx(codec, 0xc4, 0x8000);
alc_update_coef_idx(codec, 0xc2, ~0xfe, 0);
snd_hda_set_pin_ctl_cache(codec, 0x18, 0);
}
alc_fixup_headset_mode(codec, fix, action);
}
/* Returns the nid of the external mic input pin, or 0 if it cannot be found. */
static int find_ext_mic_pin(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
struct auto_pin_cfg *cfg = &spec->gen.autocfg;
hda_nid_t nid;
unsigned int defcfg;
int i;
for (i = 0; i < cfg->num_inputs; i++) {
if (cfg->inputs[i].type != AUTO_PIN_MIC)
continue;
nid = cfg->inputs[i].pin;
defcfg = snd_hda_codec_get_pincfg(codec, nid);
if (snd_hda_get_input_pin_attr(defcfg) == INPUT_PIN_ATTR_INT)
continue;
return nid;
}
return 0;
}
static void alc271_hp_gate_mic_jack(struct hda_codec *codec,
const struct hda_fixup *fix,
int action)
{
struct alc_spec *spec = codec->spec;
if (action == HDA_FIXUP_ACT_PROBE) {
int mic_pin = find_ext_mic_pin(codec);
int hp_pin = alc_get_hp_pin(spec);
if (snd_BUG_ON(!mic_pin || !hp_pin))
return;
snd_hda_jack_set_gating_jack(codec, mic_pin, hp_pin);
}
}
static void alc269_fixup_limit_int_mic_boost(struct hda_codec *codec,
const struct hda_fixup *fix,
int action)
{
struct alc_spec *spec = codec->spec;
struct auto_pin_cfg *cfg = &spec->gen.autocfg;
int i;
/* The mic boosts on level 2 and 3 are too noisy
on the internal mic input.
Therefore limit the boost to 0 or 1. */
if (action != HDA_FIXUP_ACT_PROBE)
return;
for (i = 0; i < cfg->num_inputs; i++) {
hda_nid_t nid = cfg->inputs[i].pin;
unsigned int defcfg;
if (cfg->inputs[i].type != AUTO_PIN_MIC)
continue;
defcfg = snd_hda_codec_get_pincfg(codec, nid);
if (snd_hda_get_input_pin_attr(defcfg) != INPUT_PIN_ATTR_INT)
continue;
snd_hda_override_amp_caps(codec, nid, HDA_INPUT,
(0x00 << AC_AMPCAP_OFFSET_SHIFT) |
(0x01 << AC_AMPCAP_NUM_STEPS_SHIFT) |
(0x2f << AC_AMPCAP_STEP_SIZE_SHIFT) |
(0 << AC_AMPCAP_MUTE_SHIFT));
}
}
static void alc283_hp_automute_hook(struct hda_codec *codec,
struct hda_jack_callback *jack)
{
struct alc_spec *spec = codec->spec;
int vref;
msleep(200);
snd_hda_gen_hp_automute(codec, jack);
vref = spec->gen.hp_jack_present ? PIN_VREF80 : 0;
msleep(600);
snd_hda_codec_write(codec, 0x19, 0, AC_VERB_SET_PIN_WIDGET_CONTROL,
vref);
}
static void alc283_fixup_chromebook(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
switch (action) {
case HDA_FIXUP_ACT_PRE_PROBE:
snd_hda_override_wcaps(codec, 0x03, 0);
/* Disable AA-loopback as it causes white noise */
spec->gen.mixer_nid = 0;
break;
case HDA_FIXUP_ACT_INIT:
/* MIC2-VREF control */
/* Set to manual mode */
alc_update_coef_idx(codec, 0x06, 0x000c, 0);
/* Enable Line1 input control by verb */
alc_update_coef_idx(codec, 0x1a, 0, 1 << 4);
break;
}
}
static void alc283_fixup_sense_combo_jack(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
switch (action) {
case HDA_FIXUP_ACT_PRE_PROBE:
spec->gen.hp_automute_hook = alc283_hp_automute_hook;
break;
case HDA_FIXUP_ACT_INIT:
/* MIC2-VREF control */
/* Set to manual mode */
alc_update_coef_idx(codec, 0x06, 0x000c, 0);
break;
}
}
/* mute tablet speaker pin (0x14) via dock plugging in addition */
static void asus_tx300_automute(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
snd_hda_gen_update_outputs(codec);
if (snd_hda_jack_detect(codec, 0x1b))
spec->gen.mute_bits |= (1ULL << 0x14);
}
static void alc282_fixup_asus_tx300(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
static const struct hda_pintbl dock_pins[] = {
{ 0x1b, 0x21114000 }, /* dock speaker pin */
{}
};
switch (action) {
case HDA_FIXUP_ACT_PRE_PROBE:
spec->init_amp = ALC_INIT_DEFAULT;
/* TX300 needs to set up GPIO2 for the speaker amp */
alc_setup_gpio(codec, 0x04);
snd_hda_apply_pincfgs(codec, dock_pins);
spec->gen.auto_mute_via_amp = 1;
spec->gen.automute_hook = asus_tx300_automute;
snd_hda_jack_detect_enable_callback(codec, 0x1b,
snd_hda_gen_hp_automute);
break;
case HDA_FIXUP_ACT_PROBE:
spec->init_amp = ALC_INIT_DEFAULT;
break;
case HDA_FIXUP_ACT_BUILD:
/* this is a bit tricky; give more sane names for the main
* (tablet) speaker and the dock speaker, respectively
*/
rename_ctl(codec, "Speaker Playback Switch",
"Dock Speaker Playback Switch");
rename_ctl(codec, "Bass Speaker Playback Switch",
"Speaker Playback Switch");
break;
}
}
static void alc290_fixup_mono_speakers(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
/* DAC node 0x03 is giving mono output. We therefore want to
make sure 0x14 (front speaker) and 0x15 (headphones) use the
stereo DAC, while leaving 0x17 (bass speaker) for node 0x03. */
static const hda_nid_t conn1[] = { 0x0c };
snd_hda_override_conn_list(codec, 0x14, ARRAY_SIZE(conn1), conn1);
snd_hda_override_conn_list(codec, 0x15, ARRAY_SIZE(conn1), conn1);
}
}
static void alc298_fixup_speaker_volume(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
/* The speaker is routed to the Node 0x06 by a mistake, as a result
we can't adjust the speaker's volume since this node does not has
Amp-out capability. we change the speaker's route to:
Node 0x02 (Audio Output) -> Node 0x0c (Audio Mixer) -> Node 0x17 (
Pin Complex), since Node 0x02 has Amp-out caps, we can adjust
speaker's volume now. */
static const hda_nid_t conn1[] = { 0x0c };
snd_hda_override_conn_list(codec, 0x17, ARRAY_SIZE(conn1), conn1);
}
}
/* disable DAC3 (0x06) selection on NID 0x17 as it has no volume amp control */
static void alc295_fixup_disable_dac3(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
static const hda_nid_t conn[] = { 0x02, 0x03 };
snd_hda_override_conn_list(codec, 0x17, ARRAY_SIZE(conn), conn);
}
}
/* force NID 0x17 (Bass Speaker) to DAC1 to share it with the main speaker */
static void alc285_fixup_speaker2_to_dac1(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
static const hda_nid_t conn[] = { 0x02 };
snd_hda_override_conn_list(codec, 0x17, ARRAY_SIZE(conn), conn);
}
}
/* Hook to update amp GPIO4 for automute */
static void alc280_hp_gpio4_automute_hook(struct hda_codec *codec,
struct hda_jack_callback *jack)
{
struct alc_spec *spec = codec->spec;
snd_hda_gen_hp_automute(codec, jack);
/* mute_led_polarity is set to 0, so we pass inverted value here */
alc_update_gpio_led(codec, 0x10, spec->mute_led_polarity,
!spec->gen.hp_jack_present);
}
/* Manage GPIOs for HP EliteBook Folio 9480m.
*
* GPIO4 is the headphone amplifier power control
* GPIO3 is the audio output mute indicator LED
*/
static void alc280_fixup_hp_9480m(struct hda_codec *codec,
const struct hda_fixup *fix,
int action)
{
struct alc_spec *spec = codec->spec;
alc_fixup_hp_gpio_led(codec, action, 0x08, 0);
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
/* amp at GPIO4; toggled via alc280_hp_gpio4_automute_hook() */
spec->gpio_mask |= 0x10;
spec->gpio_dir |= 0x10;
spec->gen.hp_automute_hook = alc280_hp_gpio4_automute_hook;
}
}
static void alc275_fixup_gpio4_off(struct hda_codec *codec,
const struct hda_fixup *fix,
int action)
{
struct alc_spec *spec = codec->spec;
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
spec->gpio_mask |= 0x04;
spec->gpio_dir |= 0x04;
/* set data bit low */
}
}
/* Quirk for Thinkpad X1 7th and 8th Gen
* The following fixed routing needed
* DAC1 (NID 0x02) -> Speaker (NID 0x14); some eq applied secretly
* DAC2 (NID 0x03) -> Bass (NID 0x17) & Headphone (NID 0x21); sharing a DAC
* DAC3 (NID 0x06) -> Unused, due to the lack of volume amp
*/
static void alc285_fixup_thinkpad_x1_gen7(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
static const hda_nid_t conn[] = { 0x02, 0x03 }; /* exclude 0x06 */
static const hda_nid_t preferred_pairs[] = {
0x14, 0x02, 0x17, 0x03, 0x21, 0x03, 0
};
struct alc_spec *spec = codec->spec;
switch (action) {
case HDA_FIXUP_ACT_PRE_PROBE:
snd_hda_override_conn_list(codec, 0x17, ARRAY_SIZE(conn), conn);
spec->gen.preferred_dacs = preferred_pairs;
break;
case HDA_FIXUP_ACT_BUILD:
/* The generic parser creates somewhat unintuitive volume ctls
* with the fixed routing above, and the shared DAC2 may be
* confusing for PA.
* Rename those to unique names so that PA doesn't touch them
* and use only Master volume.
*/
rename_ctl(codec, "Front Playback Volume", "DAC1 Playback Volume");
rename_ctl(codec, "Bass Speaker Playback Volume", "DAC2 Playback Volume");
break;
}
}
static void alc233_alc662_fixup_lenovo_dual_codecs(struct hda_codec *codec,
const struct hda_fixup *fix,
int action)
{
alc_fixup_dual_codecs(codec, fix, action);
switch (action) {
case HDA_FIXUP_ACT_PRE_PROBE:
/* override card longname to provide a unique UCM profile */
strcpy(codec->card->longname, "HDAudio-Lenovo-DualCodecs");
break;
case HDA_FIXUP_ACT_BUILD:
/* rename Capture controls depending on the codec */
rename_ctl(codec, "Capture Volume",
codec->addr == 0 ?
"Rear-Panel Capture Volume" :
"Front-Panel Capture Volume");
rename_ctl(codec, "Capture Switch",
codec->addr == 0 ?
"Rear-Panel Capture Switch" :
"Front-Panel Capture Switch");
break;
}
}
static void alc225_fixup_s3_pop_noise(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
if (action != HDA_FIXUP_ACT_PRE_PROBE)
return;
codec->power_save_node = 1;
}
/* Forcibly assign NID 0x03 to HP/LO while NID 0x02 to SPK for EQ */
static void alc274_fixup_bind_dacs(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
static const hda_nid_t preferred_pairs[] = {
0x21, 0x03, 0x1b, 0x03, 0x16, 0x02,
0
};
if (action != HDA_FIXUP_ACT_PRE_PROBE)
return;
spec->gen.preferred_dacs = preferred_pairs;
spec->gen.auto_mute_via_amp = 1;
codec->power_save_node = 0;
}
/* avoid DAC 0x06 for bass speaker 0x17; it has no volume control */
static void alc289_fixup_asus_ga401(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
static const hda_nid_t preferred_pairs[] = {
0x14, 0x02, 0x17, 0x02, 0x21, 0x03, 0
};
struct alc_spec *spec = codec->spec;
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
spec->gen.preferred_dacs = preferred_pairs;
spec->gen.obey_preferred_dacs = 1;
}
}
/* The DAC of NID 0x3 will introduce click/pop noise on headphones, so invalidate it */
static void alc285_fixup_invalidate_dacs(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
if (action != HDA_FIXUP_ACT_PRE_PROBE)
return;
snd_hda_override_wcaps(codec, 0x03, 0);
}
static void alc_combo_jack_hp_jd_restart(struct hda_codec *codec)
{
switch (codec->core.vendor_id) {
case 0x10ec0274:
case 0x10ec0294:
case 0x10ec0225:
case 0x10ec0295:
case 0x10ec0299:
alc_update_coef_idx(codec, 0x4a, 0x8000, 1 << 15); /* Reset HP JD */
alc_update_coef_idx(codec, 0x4a, 0x8000, 0 << 15);
break;
case 0x10ec0230:
case 0x10ec0235:
case 0x10ec0236:
case 0x10ec0255:
case 0x10ec0256:
case 0x19e58326:
alc_update_coef_idx(codec, 0x1b, 0x8000, 1 << 15); /* Reset HP JD */
alc_update_coef_idx(codec, 0x1b, 0x8000, 0 << 15);
break;
}
}
static void alc295_fixup_chromebook(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
switch (action) {
case HDA_FIXUP_ACT_PRE_PROBE:
spec->ultra_low_power = true;
break;
case HDA_FIXUP_ACT_INIT:
alc_combo_jack_hp_jd_restart(codec);
break;
}
}
static void alc_fixup_disable_mic_vref(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
if (action == HDA_FIXUP_ACT_PRE_PROBE)
snd_hda_codec_set_pin_target(codec, 0x19, PIN_VREFHIZ);
}
static void alc294_gx502_toggle_output(struct hda_codec *codec,
struct hda_jack_callback *cb)
{
/* The Windows driver sets the codec up in a very different way where
* it appears to leave 0x10 = 0x8a20 set. For Linux we need to toggle it
*/
if (snd_hda_jack_detect_state(codec, 0x21) == HDA_JACK_PRESENT)
alc_write_coef_idx(codec, 0x10, 0x8a20);
else
alc_write_coef_idx(codec, 0x10, 0x0a20);
}
static void alc294_fixup_gx502_hp(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
/* Pin 0x21: headphones/headset mic */
if (!is_jack_detectable(codec, 0x21))
return;
switch (action) {
case HDA_FIXUP_ACT_PRE_PROBE:
snd_hda_jack_detect_enable_callback(codec, 0x21,
alc294_gx502_toggle_output);
break;
case HDA_FIXUP_ACT_INIT:
/* Make sure to start in a correct state, i.e. if
* headphones have been plugged in before powering up the system
*/
alc294_gx502_toggle_output(codec, NULL);
break;
}
}
static void alc294_gu502_toggle_output(struct hda_codec *codec,
struct hda_jack_callback *cb)
{
/* Windows sets 0x10 to 0x8420 for Node 0x20 which is
* responsible from changes between speakers and headphones
*/
if (snd_hda_jack_detect_state(codec, 0x21) == HDA_JACK_PRESENT)
alc_write_coef_idx(codec, 0x10, 0x8420);
else
alc_write_coef_idx(codec, 0x10, 0x0a20);
}
static void alc294_fixup_gu502_hp(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
if (!is_jack_detectable(codec, 0x21))
return;
switch (action) {
case HDA_FIXUP_ACT_PRE_PROBE:
snd_hda_jack_detect_enable_callback(codec, 0x21,
alc294_gu502_toggle_output);
break;
case HDA_FIXUP_ACT_INIT:
alc294_gu502_toggle_output(codec, NULL);
break;
}
}
static void alc285_fixup_hp_gpio_amp_init(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
if (action != HDA_FIXUP_ACT_INIT)
return;
msleep(100);
alc_write_coef_idx(codec, 0x65, 0x0);
}
static void alc274_fixup_hp_headset_mic(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
switch (action) {
case HDA_FIXUP_ACT_INIT:
alc_combo_jack_hp_jd_restart(codec);
break;
}
}
static void alc_fixup_no_int_mic(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
switch (action) {
case HDA_FIXUP_ACT_PRE_PROBE:
/* Mic RING SLEEVE swap for combo jack */
alc_update_coef_idx(codec, 0x45, 0xf<<12 | 1<<10, 5<<12);
spec->no_internal_mic_pin = true;
break;
case HDA_FIXUP_ACT_INIT:
alc_combo_jack_hp_jd_restart(codec);
break;
}
}
/* GPIO1 = amplifier on/off
* GPIO3 = mic mute LED
*/
static void alc285_fixup_hp_spectre_x360_eb1(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
static const hda_nid_t conn[] = { 0x02 };
struct alc_spec *spec = codec->spec;
static const struct hda_pintbl pincfgs[] = {
{ 0x14, 0x90170110 }, /* front/high speakers */
{ 0x17, 0x90170130 }, /* back/bass speakers */
{ }
};
//enable micmute led
alc_fixup_hp_gpio_led(codec, action, 0x00, 0x04);
switch (action) {
case HDA_FIXUP_ACT_PRE_PROBE:
spec->micmute_led_polarity = 1;
/* needed for amp of back speakers */
spec->gpio_mask |= 0x01;
spec->gpio_dir |= 0x01;
snd_hda_apply_pincfgs(codec, pincfgs);
/* share DAC to have unified volume control */
snd_hda_override_conn_list(codec, 0x14, ARRAY_SIZE(conn), conn);
snd_hda_override_conn_list(codec, 0x17, ARRAY_SIZE(conn), conn);
break;
case HDA_FIXUP_ACT_INIT:
/* need to toggle GPIO to enable the amp of back speakers */
alc_update_gpio_data(codec, 0x01, true);
msleep(100);
alc_update_gpio_data(codec, 0x01, false);
break;
}
}
static void alc285_fixup_hp_spectre_x360(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
static const hda_nid_t conn[] = { 0x02 };
static const struct hda_pintbl pincfgs[] = {
{ 0x14, 0x90170110 }, /* rear speaker */
{ }
};
switch (action) {
case HDA_FIXUP_ACT_PRE_PROBE:
snd_hda_apply_pincfgs(codec, pincfgs);
/* force front speaker to DAC1 */
snd_hda_override_conn_list(codec, 0x17, ARRAY_SIZE(conn), conn);
break;
}
}
/* for hda_fixup_thinkpad_acpi() */
#include "thinkpad_helper.c"
static void alc_fixup_thinkpad_acpi(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
alc_fixup_no_shutup(codec, fix, action); /* reduce click noise */
hda_fixup_thinkpad_acpi(codec, fix, action);
}
/* Fixup for Lenovo Legion 15IMHg05 speaker output on headset removal. */
static void alc287_fixup_legion_15imhg05_speakers(struct hda_codec *codec,
const struct hda_fixup *fix,
int action)
{
struct alc_spec *spec = codec->spec;
switch (action) {
case HDA_FIXUP_ACT_PRE_PROBE:
spec->gen.suppress_auto_mute = 1;
break;
}
}
static int comp_bind(struct device *dev)
{
struct hda_codec *cdc = dev_to_hda_codec(dev);
struct alc_spec *spec = cdc->spec;
return component_bind_all(dev, spec->comps);
}
static void comp_unbind(struct device *dev)
{
struct hda_codec *cdc = dev_to_hda_codec(dev);
struct alc_spec *spec = cdc->spec;
component_unbind_all(dev, spec->comps);
}
static const struct component_master_ops comp_master_ops = {
.bind = comp_bind,
.unbind = comp_unbind,
};
static void comp_generic_playback_hook(struct hda_pcm_stream *hinfo, struct hda_codec *cdc,
struct snd_pcm_substream *sub, int action)
{
struct alc_spec *spec = cdc->spec;
int i;
for (i = 0; i < HDA_MAX_COMPONENTS; i++) {
if (spec->comps[i].dev && spec->comps[i].pre_playback_hook)
spec->comps[i].pre_playback_hook(spec->comps[i].dev, action);
}
for (i = 0; i < HDA_MAX_COMPONENTS; i++) {
if (spec->comps[i].dev && spec->comps[i].playback_hook)
spec->comps[i].playback_hook(spec->comps[i].dev, action);
}
for (i = 0; i < HDA_MAX_COMPONENTS; i++) {
if (spec->comps[i].dev && spec->comps[i].post_playback_hook)
spec->comps[i].post_playback_hook(spec->comps[i].dev, action);
}
}
struct scodec_dev_name {
const char *bus;
const char *hid;
int index;
};
/* match the device name in a slightly relaxed manner */
static int comp_match_cs35l41_dev_name(struct device *dev, void *data)
{
struct scodec_dev_name *p = data;
const char *d = dev_name(dev);
int n = strlen(p->bus);
char tmp[32];
/* check the bus name */
if (strncmp(d, p->bus, n))
return 0;
/* skip the bus number */
if (isdigit(d[n]))
n++;
/* the rest must be exact matching */
snprintf(tmp, sizeof(tmp), "-%s:00-cs35l41-hda.%d", p->hid, p->index);
return !strcmp(d + n, tmp);
}
static int comp_match_tas2781_dev_name(struct device *dev,
void *data)
{
struct scodec_dev_name *p = data;
const char *d = dev_name(dev);
int n = strlen(p->bus);
char tmp[32];
/* check the bus name */
if (strncmp(d, p->bus, n))
return 0;
/* skip the bus number */
if (isdigit(d[n]))
n++;
/* the rest must be exact matching */
snprintf(tmp, sizeof(tmp), "-%s:00", p->hid);
return !strcmp(d + n, tmp);
}
static void cs35l41_generic_fixup(struct hda_codec *cdc, int action, const char *bus,
const char *hid, int count)
{
struct device *dev = hda_codec_dev(cdc);
struct alc_spec *spec = cdc->spec;
struct scodec_dev_name *rec;
int ret, i;
switch (action) {
case HDA_FIXUP_ACT_PRE_PROBE:
for (i = 0; i < count; i++) {
rec = devm_kmalloc(dev, sizeof(*rec), GFP_KERNEL);
if (!rec)
return;
rec->bus = bus;
rec->hid = hid;
rec->index = i;
spec->comps[i].codec = cdc;
component_match_add(dev, &spec->match,
comp_match_cs35l41_dev_name, rec);
}
ret = component_master_add_with_match(dev, &comp_master_ops, spec->match);
if (ret)
codec_err(cdc, "Fail to register component aggregator %d\n", ret);
else
spec->gen.pcm_playback_hook = comp_generic_playback_hook;
break;
case HDA_FIXUP_ACT_FREE:
component_master_del(dev, &comp_master_ops);
break;
}
}
static void tas2781_generic_fixup(struct hda_codec *cdc, int action,
const char *bus, const char *hid)
{
struct device *dev = hda_codec_dev(cdc);
struct alc_spec *spec = cdc->spec;
struct scodec_dev_name *rec;
int ret;
switch (action) {
case HDA_FIXUP_ACT_PRE_PROBE:
rec = devm_kmalloc(dev, sizeof(*rec), GFP_KERNEL);
if (!rec)
return;
rec->bus = bus;
rec->hid = hid;
rec->index = 0;
spec->comps[0].codec = cdc;
component_match_add(dev, &spec->match,
comp_match_tas2781_dev_name, rec);
ret = component_master_add_with_match(dev, &comp_master_ops,
spec->match);
if (ret)
codec_err(cdc,
"Fail to register component aggregator %d\n",
ret);
else
spec->gen.pcm_playback_hook =
comp_generic_playback_hook;
break;
case HDA_FIXUP_ACT_FREE:
component_master_del(dev, &comp_master_ops);
break;
}
}
static void cs35l41_fixup_i2c_two(struct hda_codec *cdc, const struct hda_fixup *fix, int action)
{
cs35l41_generic_fixup(cdc, action, "i2c", "CSC3551", 2);
}
static void cs35l41_fixup_spi_two(struct hda_codec *codec, const struct hda_fixup *fix, int action)
{
cs35l41_generic_fixup(codec, action, "spi", "CSC3551", 2);
}
static void cs35l41_fixup_spi_four(struct hda_codec *codec, const struct hda_fixup *fix, int action)
{
cs35l41_generic_fixup(codec, action, "spi", "CSC3551", 4);
}
static void alc287_fixup_legion_16achg6_speakers(struct hda_codec *cdc, const struct hda_fixup *fix,
int action)
{
cs35l41_generic_fixup(cdc, action, "i2c", "CLSA0100", 2);
}
static void alc287_fixup_legion_16ithg6_speakers(struct hda_codec *cdc, const struct hda_fixup *fix,
int action)
{
cs35l41_generic_fixup(cdc, action, "i2c", "CLSA0101", 2);
}
static void tas2781_fixup_i2c(struct hda_codec *cdc,
const struct hda_fixup *fix, int action)
{
tas2781_generic_fixup(cdc, action, "i2c", "TIAS2781");
}
/* for alc295_fixup_hp_top_speakers */
#include "hp_x360_helper.c"
/* for alc285_fixup_ideapad_s740_coef() */
#include "ideapad_s740_helper.c"
static const struct coef_fw alc256_fixup_set_coef_defaults_coefs[] = {
WRITE_COEF(0x10, 0x0020), WRITE_COEF(0x24, 0x0000),
WRITE_COEF(0x26, 0x0000), WRITE_COEF(0x29, 0x3000),
WRITE_COEF(0x37, 0xfe05), WRITE_COEF(0x45, 0x5089),
{}
};
static void alc256_fixup_set_coef_defaults(struct hda_codec *codec,
const struct hda_fixup *fix,
int action)
{
/*
* A certain other OS sets these coeffs to different values. On at least
* one TongFang barebone these settings might survive even a cold
* reboot. So to restore a clean slate the values are explicitly reset
* to default here. Without this, the external microphone is always in a
* plugged-in state, while the internal microphone is always in an
* unplugged state, breaking the ability to use the internal microphone.
*/
alc_process_coef_fw(codec, alc256_fixup_set_coef_defaults_coefs);
}
static const struct coef_fw alc233_fixup_no_audio_jack_coefs[] = {
WRITE_COEF(0x1a, 0x9003), WRITE_COEF(0x1b, 0x0e2b), WRITE_COEF(0x37, 0xfe06),
WRITE_COEF(0x38, 0x4981), WRITE_COEF(0x45, 0xd489), WRITE_COEF(0x46, 0x0074),
WRITE_COEF(0x49, 0x0149),
{}
};
static void alc233_fixup_no_audio_jack(struct hda_codec *codec,
const struct hda_fixup *fix,
int action)
{
/*
* The audio jack input and output is not detected on the ASRock NUC Box
* 1100 series when cold booting without this fix. Warm rebooting from a
* certain other OS makes the audio functional, as COEF settings are
* preserved in this case. This fix sets these altered COEF values as
* the default.
*/
alc_process_coef_fw(codec, alc233_fixup_no_audio_jack_coefs);
}
static void alc256_fixup_mic_no_presence_and_resume(struct hda_codec *codec,
const struct hda_fixup *fix,
int action)
{
/*
* The Clevo NJ51CU comes either with the ALC293 or the ALC256 codec,
* but uses the 0x8686 subproduct id in both cases. The ALC256 codec
* needs an additional quirk for sound working after suspend and resume.
*/
if (codec->core.vendor_id == 0x10ec0256) {
alc_update_coef_idx(codec, 0x10, 1<<9, 0);
snd_hda_codec_set_pincfg(codec, 0x19, 0x04a11120);
} else {
snd_hda_codec_set_pincfg(codec, 0x1a, 0x04a1113c);
}
}
static void alc_fixup_dell4_mic_no_presence_quiet(struct hda_codec *codec,
const struct hda_fixup *fix,
int action)
{
struct alc_spec *spec = codec->spec;
struct hda_input_mux *imux = &spec->gen.input_mux;
int i;
alc269_fixup_limit_int_mic_boost(codec, fix, action);
switch (action) {
case HDA_FIXUP_ACT_PRE_PROBE:
/**
* Set the vref of pin 0x19 (Headset Mic) and pin 0x1b (Headphone Mic)
* to Hi-Z to avoid pop noises at startup and when plugging and
* unplugging headphones.
*/
snd_hda_codec_set_pin_target(codec, 0x19, PIN_VREFHIZ);
snd_hda_codec_set_pin_target(codec, 0x1b, PIN_VREFHIZ);
break;
case HDA_FIXUP_ACT_PROBE:
/**
* Make the internal mic (0x12) the default input source to
* prevent pop noises on cold boot.
*/
for (i = 0; i < imux->num_items; i++) {
if (spec->gen.imux_pins[i] == 0x12) {
spec->gen.cur_mux[0] = i;
break;
}
}
break;
}
}
static void alc287_fixup_yoga9_14iap7_bass_spk_pin(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
/*
* The Pin Complex 0x17 for the bass speakers is wrongly reported as
* unconnected.
*/
static const struct hda_pintbl pincfgs[] = {
{ 0x17, 0x90170121 },
{ }
};
/*
* Avoid DAC 0x06 and 0x08, as they have no volume controls.
* DAC 0x02 and 0x03 would be fine.
*/
static const hda_nid_t conn[] = { 0x02, 0x03 };
/*
* Prefer both speakerbar (0x14) and bass speakers (0x17) connected to DAC 0x02.
* Headphones (0x21) are connected to DAC 0x03.
*/
static const hda_nid_t preferred_pairs[] = {
0x14, 0x02,
0x17, 0x02,
0x21, 0x03,
0
};
struct alc_spec *spec = codec->spec;
switch (action) {
case HDA_FIXUP_ACT_PRE_PROBE:
snd_hda_apply_pincfgs(codec, pincfgs);
snd_hda_override_conn_list(codec, 0x17, ARRAY_SIZE(conn), conn);
spec->gen.preferred_dacs = preferred_pairs;
break;
}
}
static void alc295_fixup_dell_inspiron_top_speakers(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
static const struct hda_pintbl pincfgs[] = {
{ 0x14, 0x90170151 },
{ 0x17, 0x90170150 },
{ }
};
static const hda_nid_t conn[] = { 0x02, 0x03 };
static const hda_nid_t preferred_pairs[] = {
0x14, 0x02,
0x17, 0x03,
0x21, 0x02,
0
};
struct alc_spec *spec = codec->spec;
alc_fixup_no_shutup(codec, fix, action);
switch (action) {
case HDA_FIXUP_ACT_PRE_PROBE:
snd_hda_apply_pincfgs(codec, pincfgs);
snd_hda_override_conn_list(codec, 0x17, ARRAY_SIZE(conn), conn);
spec->gen.preferred_dacs = preferred_pairs;
break;
}
}
/* Forcibly assign NID 0x03 to HP while NID 0x02 to SPK */
static void alc287_fixup_bind_dacs(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
static const hda_nid_t conn[] = { 0x02, 0x03 }; /* exclude 0x06 */
static const hda_nid_t preferred_pairs[] = {
0x17, 0x02, 0x21, 0x03, 0
};
if (action != HDA_FIXUP_ACT_PRE_PROBE)
return;
snd_hda_override_conn_list(codec, 0x17, ARRAY_SIZE(conn), conn);
spec->gen.preferred_dacs = preferred_pairs;
spec->gen.auto_mute_via_amp = 1;
if (spec->gen.autocfg.speaker_pins[0] != 0x14) {
snd_hda_codec_write_cache(codec, 0x14, 0, AC_VERB_SET_PIN_WIDGET_CONTROL,
0x0); /* Make sure 0x14 was disable */
}
}
enum {
ALC269_FIXUP_GPIO2,
ALC269_FIXUP_SONY_VAIO,
ALC275_FIXUP_SONY_VAIO_GPIO2,
ALC269_FIXUP_DELL_M101Z,
ALC269_FIXUP_SKU_IGNORE,
ALC269_FIXUP_ASUS_G73JW,
ALC269_FIXUP_ASUS_N7601ZM_PINS,
ALC269_FIXUP_ASUS_N7601ZM,
ALC269_FIXUP_LENOVO_EAPD,
ALC275_FIXUP_SONY_HWEQ,
ALC275_FIXUP_SONY_DISABLE_AAMIX,
ALC271_FIXUP_DMIC,
ALC269_FIXUP_PCM_44K,
ALC269_FIXUP_STEREO_DMIC,
ALC269_FIXUP_HEADSET_MIC,
ALC269_FIXUP_QUANTA_MUTE,
ALC269_FIXUP_LIFEBOOK,
ALC269_FIXUP_LIFEBOOK_EXTMIC,
ALC269_FIXUP_LIFEBOOK_HP_PIN,
ALC269_FIXUP_LIFEBOOK_NO_HP_TO_LINEOUT,
ALC255_FIXUP_LIFEBOOK_U7x7_HEADSET_MIC,
ALC269_FIXUP_AMIC,
ALC269_FIXUP_DMIC,
ALC269VB_FIXUP_AMIC,
ALC269VB_FIXUP_DMIC,
ALC269_FIXUP_HP_MUTE_LED,
ALC269_FIXUP_HP_MUTE_LED_MIC1,
ALC269_FIXUP_HP_MUTE_LED_MIC2,
ALC269_FIXUP_HP_MUTE_LED_MIC3,
ALC269_FIXUP_HP_GPIO_LED,
ALC269_FIXUP_HP_GPIO_MIC1_LED,
ALC269_FIXUP_HP_LINE1_MIC1_LED,
ALC269_FIXUP_INV_DMIC,
ALC269_FIXUP_LENOVO_DOCK,
ALC269_FIXUP_LENOVO_DOCK_LIMIT_BOOST,
ALC269_FIXUP_NO_SHUTUP,
ALC286_FIXUP_SONY_MIC_NO_PRESENCE,
ALC269_FIXUP_PINCFG_NO_HP_TO_LINEOUT,
ALC269_FIXUP_DELL1_MIC_NO_PRESENCE,
ALC269_FIXUP_DELL2_MIC_NO_PRESENCE,
ALC269_FIXUP_DELL3_MIC_NO_PRESENCE,
ALC269_FIXUP_DELL4_MIC_NO_PRESENCE,
ALC269_FIXUP_DELL4_MIC_NO_PRESENCE_QUIET,
ALC269_FIXUP_HEADSET_MODE,
ALC269_FIXUP_HEADSET_MODE_NO_HP_MIC,
ALC269_FIXUP_ASPIRE_HEADSET_MIC,
ALC269_FIXUP_ASUS_X101_FUNC,
ALC269_FIXUP_ASUS_X101_VERB,
ALC269_FIXUP_ASUS_X101,
ALC271_FIXUP_AMIC_MIC2,
ALC271_FIXUP_HP_GATE_MIC_JACK,
ALC271_FIXUP_HP_GATE_MIC_JACK_E1_572,
ALC269_FIXUP_ACER_AC700,
ALC269_FIXUP_LIMIT_INT_MIC_BOOST,
ALC269VB_FIXUP_ASUS_ZENBOOK,
ALC269VB_FIXUP_ASUS_ZENBOOK_UX31A,
ALC269VB_FIXUP_ASUS_MIC_NO_PRESENCE,
ALC269_FIXUP_LIMIT_INT_MIC_BOOST_MUTE_LED,
ALC269VB_FIXUP_ORDISSIMO_EVE2,
ALC283_FIXUP_CHROME_BOOK,
ALC283_FIXUP_SENSE_COMBO_JACK,
ALC282_FIXUP_ASUS_TX300,
ALC283_FIXUP_INT_MIC,
ALC290_FIXUP_MONO_SPEAKERS,
ALC290_FIXUP_MONO_SPEAKERS_HSJACK,
ALC290_FIXUP_SUBWOOFER,
ALC290_FIXUP_SUBWOOFER_HSJACK,
ALC269_FIXUP_THINKPAD_ACPI,
ALC269_FIXUP_DMIC_THINKPAD_ACPI,
ALC255_FIXUP_ACER_MIC_NO_PRESENCE,
ALC255_FIXUP_ASUS_MIC_NO_PRESENCE,
ALC255_FIXUP_DELL1_MIC_NO_PRESENCE,
ALC255_FIXUP_DELL2_MIC_NO_PRESENCE,
ALC255_FIXUP_HEADSET_MODE,
ALC255_FIXUP_HEADSET_MODE_NO_HP_MIC,
ALC293_FIXUP_DELL1_MIC_NO_PRESENCE,
ALC292_FIXUP_TPT440_DOCK,
ALC292_FIXUP_TPT440,
ALC283_FIXUP_HEADSET_MIC,
ALC255_FIXUP_MIC_MUTE_LED,
ALC282_FIXUP_ASPIRE_V5_PINS,
ALC269VB_FIXUP_ASPIRE_E1_COEF,
ALC280_FIXUP_HP_GPIO4,
ALC286_FIXUP_HP_GPIO_LED,
ALC280_FIXUP_HP_GPIO2_MIC_HOTKEY,
ALC280_FIXUP_HP_DOCK_PINS,
ALC269_FIXUP_HP_DOCK_GPIO_MIC1_LED,
ALC280_FIXUP_HP_9480M,
ALC245_FIXUP_HP_X360_AMP,
ALC285_FIXUP_HP_SPECTRE_X360_EB1,
ALC288_FIXUP_DELL_HEADSET_MODE,
ALC288_FIXUP_DELL1_MIC_NO_PRESENCE,
ALC288_FIXUP_DELL_XPS_13,
ALC288_FIXUP_DISABLE_AAMIX,
ALC292_FIXUP_DELL_E7X_AAMIX,
ALC292_FIXUP_DELL_E7X,
ALC292_FIXUP_DISABLE_AAMIX,
ALC293_FIXUP_DISABLE_AAMIX_MULTIJACK,
ALC298_FIXUP_ALIENWARE_MIC_NO_PRESENCE,
ALC298_FIXUP_DELL1_MIC_NO_PRESENCE,
ALC298_FIXUP_DELL_AIO_MIC_NO_PRESENCE,
ALC275_FIXUP_DELL_XPS,
ALC293_FIXUP_LENOVO_SPK_NOISE,
ALC233_FIXUP_LENOVO_LINE2_MIC_HOTKEY,
ALC255_FIXUP_DELL_SPK_NOISE,
ALC225_FIXUP_DISABLE_MIC_VREF,
ALC225_FIXUP_DELL1_MIC_NO_PRESENCE,
ALC295_FIXUP_DISABLE_DAC3,
ALC285_FIXUP_SPEAKER2_TO_DAC1,
ALC285_FIXUP_ASUS_SPEAKER2_TO_DAC1,
ALC285_FIXUP_ASUS_HEADSET_MIC,
ALC285_FIXUP_ASUS_SPI_REAR_SPEAKERS,
ALC285_FIXUP_ASUS_I2C_SPEAKER2_TO_DAC1,
ALC285_FIXUP_ASUS_I2C_HEADSET_MIC,
ALC280_FIXUP_HP_HEADSET_MIC,
ALC221_FIXUP_HP_FRONT_MIC,
ALC292_FIXUP_TPT460,
ALC298_FIXUP_SPK_VOLUME,
ALC298_FIXUP_LENOVO_SPK_VOLUME,
ALC256_FIXUP_DELL_INSPIRON_7559_SUBWOOFER,
ALC269_FIXUP_ATIV_BOOK_8,
ALC221_FIXUP_HP_288PRO_MIC_NO_PRESENCE,
ALC221_FIXUP_HP_MIC_NO_PRESENCE,
ALC256_FIXUP_ASUS_HEADSET_MODE,
ALC256_FIXUP_ASUS_MIC,
ALC256_FIXUP_ASUS_AIO_GPIO2,
ALC233_FIXUP_ASUS_MIC_NO_PRESENCE,
ALC233_FIXUP_EAPD_COEF_AND_MIC_NO_PRESENCE,
ALC233_FIXUP_LENOVO_MULTI_CODECS,
ALC233_FIXUP_ACER_HEADSET_MIC,
ALC294_FIXUP_LENOVO_MIC_LOCATION,
ALC225_FIXUP_DELL_WYSE_MIC_NO_PRESENCE,
ALC225_FIXUP_S3_POP_NOISE,
ALC700_FIXUP_INTEL_REFERENCE,
ALC274_FIXUP_DELL_BIND_DACS,
ALC274_FIXUP_DELL_AIO_LINEOUT_VERB,
ALC298_FIXUP_TPT470_DOCK_FIX,
ALC298_FIXUP_TPT470_DOCK,
ALC255_FIXUP_DUMMY_LINEOUT_VERB,
ALC255_FIXUP_DELL_HEADSET_MIC,
ALC256_FIXUP_HUAWEI_MACH_WX9_PINS,
ALC298_FIXUP_HUAWEI_MBX_STEREO,
ALC295_FIXUP_HP_X360,
ALC221_FIXUP_HP_HEADSET_MIC,
ALC285_FIXUP_LENOVO_HEADPHONE_NOISE,
ALC295_FIXUP_HP_AUTO_MUTE,
ALC286_FIXUP_ACER_AIO_MIC_NO_PRESENCE,
ALC294_FIXUP_ASUS_MIC,
ALC294_FIXUP_ASUS_HEADSET_MIC,
ALC294_FIXUP_ASUS_SPK,
ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE,
ALC285_FIXUP_LENOVO_PC_BEEP_IN_NOISE,
ALC255_FIXUP_ACER_HEADSET_MIC,
ALC295_FIXUP_CHROME_BOOK,
ALC225_FIXUP_HEADSET_JACK,
ALC225_FIXUP_DELL_WYSE_AIO_MIC_NO_PRESENCE,
ALC225_FIXUP_WYSE_AUTO_MUTE,
ALC225_FIXUP_WYSE_DISABLE_MIC_VREF,
ALC286_FIXUP_ACER_AIO_HEADSET_MIC,
ALC256_FIXUP_ASUS_HEADSET_MIC,
ALC256_FIXUP_ASUS_MIC_NO_PRESENCE,
ALC299_FIXUP_PREDATOR_SPK,
ALC256_FIXUP_MEDION_HEADSET_NO_PRESENCE,
ALC289_FIXUP_DELL_SPK2,
ALC289_FIXUP_DUAL_SPK,
ALC294_FIXUP_SPK2_TO_DAC1,
ALC294_FIXUP_ASUS_DUAL_SPK,
ALC285_FIXUP_THINKPAD_X1_GEN7,
ALC285_FIXUP_THINKPAD_HEADSET_JACK,
ALC294_FIXUP_ASUS_ALLY,
ALC294_FIXUP_ASUS_ALLY_PINS,
ALC294_FIXUP_ASUS_ALLY_VERBS,
ALC294_FIXUP_ASUS_ALLY_SPEAKER,
ALC294_FIXUP_ASUS_HPE,
ALC294_FIXUP_ASUS_COEF_1B,
ALC294_FIXUP_ASUS_GX502_HP,
ALC294_FIXUP_ASUS_GX502_PINS,
ALC294_FIXUP_ASUS_GX502_VERBS,
ALC294_FIXUP_ASUS_GU502_HP,
ALC294_FIXUP_ASUS_GU502_PINS,
ALC294_FIXUP_ASUS_GU502_VERBS,
ALC294_FIXUP_ASUS_G513_PINS,
ALC285_FIXUP_ASUS_G533Z_PINS,
ALC285_FIXUP_HP_GPIO_LED,
ALC285_FIXUP_HP_MUTE_LED,
ALC285_FIXUP_HP_SPECTRE_X360_MUTE_LED,
ALC236_FIXUP_HP_MUTE_LED_COEFBIT2,
ALC236_FIXUP_HP_GPIO_LED,
ALC236_FIXUP_HP_MUTE_LED,
ALC236_FIXUP_HP_MUTE_LED_MICMUTE_VREF,
ALC298_FIXUP_SAMSUNG_AMP,
ALC298_FIXUP_SAMSUNG_HEADPHONE_VERY_QUIET,
ALC256_FIXUP_SAMSUNG_HEADPHONE_VERY_QUIET,
ALC295_FIXUP_ASUS_MIC_NO_PRESENCE,
ALC269VC_FIXUP_ACER_VCOPPERBOX_PINS,
ALC269VC_FIXUP_ACER_HEADSET_MIC,
ALC269VC_FIXUP_ACER_MIC_NO_PRESENCE,
ALC289_FIXUP_ASUS_GA401,
ALC289_FIXUP_ASUS_GA502,
ALC256_FIXUP_ACER_MIC_NO_PRESENCE,
ALC285_FIXUP_HP_GPIO_AMP_INIT,
ALC269_FIXUP_CZC_B20,
ALC269_FIXUP_CZC_TMI,
ALC269_FIXUP_CZC_L101,
ALC269_FIXUP_LEMOTE_A1802,
ALC269_FIXUP_LEMOTE_A190X,
ALC256_FIXUP_INTEL_NUC8_RUGGED,
ALC233_FIXUP_INTEL_NUC8_DMIC,
ALC233_FIXUP_INTEL_NUC8_BOOST,
ALC256_FIXUP_INTEL_NUC10,
ALC255_FIXUP_XIAOMI_HEADSET_MIC,
ALC274_FIXUP_HP_MIC,
ALC274_FIXUP_HP_HEADSET_MIC,
ALC274_FIXUP_HP_ENVY_GPIO,
ALC256_FIXUP_ASUS_HPE,
ALC285_FIXUP_THINKPAD_NO_BASS_SPK_HEADSET_JACK,
ALC287_FIXUP_HP_GPIO_LED,
ALC256_FIXUP_HP_HEADSET_MIC,
ALC245_FIXUP_HP_GPIO_LED,
ALC236_FIXUP_DELL_AIO_HEADSET_MIC,
ALC282_FIXUP_ACER_DISABLE_LINEOUT,
ALC255_FIXUP_ACER_LIMIT_INT_MIC_BOOST,
ALC256_FIXUP_ACER_HEADSET_MIC,
ALC285_FIXUP_IDEAPAD_S740_COEF,
ALC285_FIXUP_HP_LIMIT_INT_MIC_BOOST,
ALC295_FIXUP_ASUS_DACS,
ALC295_FIXUP_HP_OMEN,
ALC285_FIXUP_HP_SPECTRE_X360,
ALC287_FIXUP_IDEAPAD_BASS_SPK_AMP,
ALC623_FIXUP_LENOVO_THINKSTATION_P340,
ALC255_FIXUP_ACER_HEADPHONE_AND_MIC,
ALC236_FIXUP_HP_LIMIT_INT_MIC_BOOST,
ALC287_FIXUP_LEGION_15IMHG05_SPEAKERS,
ALC287_FIXUP_LEGION_15IMHG05_AUTOMUTE,
ALC287_FIXUP_YOGA7_14ITL_SPEAKERS,
ALC298_FIXUP_LENOVO_C940_DUET7,
ALC287_FIXUP_13S_GEN2_SPEAKERS,
ALC256_FIXUP_SET_COEF_DEFAULTS,
ALC256_FIXUP_SYSTEM76_MIC_NO_PRESENCE,
ALC233_FIXUP_NO_AUDIO_JACK,
ALC256_FIXUP_MIC_NO_PRESENCE_AND_RESUME,
ALC285_FIXUP_LEGION_Y9000X_SPEAKERS,
ALC285_FIXUP_LEGION_Y9000X_AUTOMUTE,
ALC287_FIXUP_LEGION_16ACHG6,
ALC287_FIXUP_CS35L41_I2C_2,
ALC287_FIXUP_CS35L41_I2C_2_HP_GPIO_LED,
ALC245_FIXUP_CS35L41_SPI_2,
ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED,
ALC245_FIXUP_CS35L41_SPI_4,
ALC245_FIXUP_CS35L41_SPI_4_HP_GPIO_LED,
ALC285_FIXUP_HP_SPEAKERS_MICMUTE_LED,
ALC295_FIXUP_FRAMEWORK_LAPTOP_MIC_NO_PRESENCE,
ALC287_FIXUP_LEGION_16ITHG6,
ALC287_FIXUP_YOGA9_14IAP7_BASS_SPK,
ALC287_FIXUP_YOGA9_14IAP7_BASS_SPK_PIN,
ALC295_FIXUP_DELL_INSPIRON_TOP_SPEAKERS,
ALC236_FIXUP_DELL_DUAL_CODECS,
ALC287_FIXUP_CS35L41_I2C_2_THINKPAD_ACPI,
ALC287_FIXUP_TAS2781_I2C,
ALC245_FIXUP_HP_MUTE_LED_COEFBIT,
ALC245_FIXUP_HP_X360_MUTE_LEDS,
ALC287_FIXUP_THINKPAD_I2S_SPK,
};
/* A special fixup for Lenovo C940 and Yoga Duet 7;
* both have the very same PCI SSID, and we need to apply different fixups
* depending on the codec ID
*/
static void alc298_fixup_lenovo_c940_duet7(struct hda_codec *codec,
const struct hda_fixup *fix,
int action)
{
int id;
if (codec->core.vendor_id == 0x10ec0298)
id = ALC298_FIXUP_LENOVO_SPK_VOLUME; /* C940 */
else
id = ALC287_FIXUP_YOGA7_14ITL_SPEAKERS; /* Duet 7 */
__snd_hda_apply_fixup(codec, id, action, 0);
}
static const struct hda_fixup alc269_fixups[] = {
[ALC269_FIXUP_GPIO2] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_gpio2,
},
[ALC269_FIXUP_SONY_VAIO] = {
.type = HDA_FIXUP_PINCTLS,
.v.pins = (const struct hda_pintbl[]) {
{0x19, PIN_VREFGRD},
{}
}
},
[ALC275_FIXUP_SONY_VAIO_GPIO2] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc275_fixup_gpio4_off,
.chained = true,
.chain_id = ALC269_FIXUP_SONY_VAIO
},
[ALC269_FIXUP_DELL_M101Z] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
/* Enables internal speaker */
{0x20, AC_VERB_SET_COEF_INDEX, 13},
{0x20, AC_VERB_SET_PROC_COEF, 0x4040},
{}
}
},
[ALC269_FIXUP_SKU_IGNORE] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_sku_ignore,
},
[ALC269_FIXUP_ASUS_G73JW] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x17, 0x99130111 }, /* subwoofer */
{ }
}
},
[ALC269_FIXUP_ASUS_N7601ZM_PINS] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, 0x03A11050 },
{ 0x1a, 0x03A11C30 },
{ 0x21, 0x03211420 },
{ }
}
},
[ALC269_FIXUP_ASUS_N7601ZM] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
{0x20, AC_VERB_SET_COEF_INDEX, 0x62},
{0x20, AC_VERB_SET_PROC_COEF, 0xa007},
{0x20, AC_VERB_SET_COEF_INDEX, 0x10},
{0x20, AC_VERB_SET_PROC_COEF, 0x8420},
{0x20, AC_VERB_SET_COEF_INDEX, 0x0f},
{0x20, AC_VERB_SET_PROC_COEF, 0x7774},
{ }
},
.chained = true,
.chain_id = ALC269_FIXUP_ASUS_N7601ZM_PINS,
},
[ALC269_FIXUP_LENOVO_EAPD] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
{0x14, AC_VERB_SET_EAPD_BTLENABLE, 0},
{}
}
},
[ALC275_FIXUP_SONY_HWEQ] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc269_fixup_hweq,
.chained = true,
.chain_id = ALC275_FIXUP_SONY_VAIO_GPIO2
},
[ALC275_FIXUP_SONY_DISABLE_AAMIX] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_disable_aamix,
.chained = true,
.chain_id = ALC269_FIXUP_SONY_VAIO
},
[ALC271_FIXUP_DMIC] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc271_fixup_dmic,
},
[ALC269_FIXUP_PCM_44K] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc269_fixup_pcm_44k,
.chained = true,
.chain_id = ALC269_FIXUP_QUANTA_MUTE
},
[ALC269_FIXUP_STEREO_DMIC] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc269_fixup_stereo_dmic,
},
[ALC269_FIXUP_HEADSET_MIC] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc269_fixup_headset_mic,
},
[ALC269_FIXUP_QUANTA_MUTE] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc269_fixup_quanta_mute,
},
[ALC269_FIXUP_LIFEBOOK] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x1a, 0x2101103f }, /* dock line-out */
{ 0x1b, 0x23a11040 }, /* dock mic-in */
{ }
},
.chained = true,
.chain_id = ALC269_FIXUP_QUANTA_MUTE
},
[ALC269_FIXUP_LIFEBOOK_EXTMIC] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, 0x01a1903c }, /* headset mic, with jack detect */
{ }
},
},
[ALC269_FIXUP_LIFEBOOK_HP_PIN] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x21, 0x0221102f }, /* HP out */
{ }
},
},
[ALC269_FIXUP_LIFEBOOK_NO_HP_TO_LINEOUT] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc269_fixup_pincfg_no_hp_to_lineout,
},
[ALC255_FIXUP_LIFEBOOK_U7x7_HEADSET_MIC] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc269_fixup_pincfg_U7x7_headset_mic,
},
[ALC269_FIXUP_AMIC] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x14, 0x99130110 }, /* speaker */
{ 0x15, 0x0121401f }, /* HP out */
{ 0x18, 0x01a19c20 }, /* mic */
{ 0x19, 0x99a3092f }, /* int-mic */
{ }
},
},
[ALC269_FIXUP_DMIC] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x12, 0x99a3092f }, /* int-mic */
{ 0x14, 0x99130110 }, /* speaker */
{ 0x15, 0x0121401f }, /* HP out */
{ 0x18, 0x01a19c20 }, /* mic */
{ }
},
},
[ALC269VB_FIXUP_AMIC] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x14, 0x99130110 }, /* speaker */
{ 0x18, 0x01a19c20 }, /* mic */
{ 0x19, 0x99a3092f }, /* int-mic */
{ 0x21, 0x0121401f }, /* HP out */
{ }
},
},
[ALC269VB_FIXUP_DMIC] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x12, 0x99a3092f }, /* int-mic */
{ 0x14, 0x99130110 }, /* speaker */
{ 0x18, 0x01a19c20 }, /* mic */
{ 0x21, 0x0121401f }, /* HP out */
{ }
},
},
[ALC269_FIXUP_HP_MUTE_LED] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc269_fixup_hp_mute_led,
},
[ALC269_FIXUP_HP_MUTE_LED_MIC1] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc269_fixup_hp_mute_led_mic1,
},
[ALC269_FIXUP_HP_MUTE_LED_MIC2] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc269_fixup_hp_mute_led_mic2,
},
[ALC269_FIXUP_HP_MUTE_LED_MIC3] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc269_fixup_hp_mute_led_mic3,
.chained = true,
.chain_id = ALC295_FIXUP_HP_AUTO_MUTE
},
[ALC269_FIXUP_HP_GPIO_LED] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc269_fixup_hp_gpio_led,
},
[ALC269_FIXUP_HP_GPIO_MIC1_LED] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc269_fixup_hp_gpio_mic1_led,
},
[ALC269_FIXUP_HP_LINE1_MIC1_LED] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc269_fixup_hp_line1_mic1_led,
},
[ALC269_FIXUP_INV_DMIC] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_inv_dmic,
},
[ALC269_FIXUP_NO_SHUTUP] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_no_shutup,
},
[ALC269_FIXUP_LENOVO_DOCK] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, 0x23a11040 }, /* dock mic */
{ 0x1b, 0x2121103f }, /* dock headphone */
{ }
},
.chained = true,
.chain_id = ALC269_FIXUP_PINCFG_NO_HP_TO_LINEOUT
},
[ALC269_FIXUP_LENOVO_DOCK_LIMIT_BOOST] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc269_fixup_limit_int_mic_boost,
.chained = true,
.chain_id = ALC269_FIXUP_LENOVO_DOCK,
},
[ALC269_FIXUP_PINCFG_NO_HP_TO_LINEOUT] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc269_fixup_pincfg_no_hp_to_lineout,
.chained = true,
.chain_id = ALC269_FIXUP_THINKPAD_ACPI,
},
[ALC269_FIXUP_DELL1_MIC_NO_PRESENCE] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, 0x01a1913c }, /* use as headset mic, without its own jack detect */
{ 0x1a, 0x01a1913d }, /* use as headphone mic, without its own jack detect */
{ }
},
.chained = true,
.chain_id = ALC269_FIXUP_HEADSET_MODE
},
[ALC269_FIXUP_DELL2_MIC_NO_PRESENCE] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x16, 0x21014020 }, /* dock line out */
{ 0x19, 0x21a19030 }, /* dock mic */
{ 0x1a, 0x01a1913c }, /* use as headset mic, without its own jack detect */
{ }
},
.chained = true,
.chain_id = ALC269_FIXUP_HEADSET_MODE_NO_HP_MIC
},
[ALC269_FIXUP_DELL3_MIC_NO_PRESENCE] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x1a, 0x01a1913c }, /* use as headset mic, without its own jack detect */
{ }
},
.chained = true,
.chain_id = ALC269_FIXUP_HEADSET_MODE_NO_HP_MIC
},
[ALC269_FIXUP_DELL4_MIC_NO_PRESENCE] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, 0x01a1913c }, /* use as headset mic, without its own jack detect */
{ 0x1b, 0x01a1913d }, /* use as headphone mic, without its own jack detect */
{ }
},
.chained = true,
.chain_id = ALC269_FIXUP_HEADSET_MODE
},
[ALC269_FIXUP_HEADSET_MODE] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_headset_mode,
.chained = true,
.chain_id = ALC255_FIXUP_MIC_MUTE_LED
},
[ALC269_FIXUP_HEADSET_MODE_NO_HP_MIC] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_headset_mode_no_hp_mic,
},
[ALC269_FIXUP_ASPIRE_HEADSET_MIC] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, 0x01a1913c }, /* headset mic w/o jack detect */
{ }
},
.chained = true,
.chain_id = ALC269_FIXUP_HEADSET_MODE,
},
[ALC286_FIXUP_SONY_MIC_NO_PRESENCE] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x18, 0x01a1913c }, /* use as headset mic, without its own jack detect */
{ }
},
.chained = true,
.chain_id = ALC269_FIXUP_HEADSET_MIC
},
[ALC256_FIXUP_HUAWEI_MACH_WX9_PINS] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{0x12, 0x90a60130},
{0x13, 0x40000000},
{0x14, 0x90170110},
{0x18, 0x411111f0},
{0x19, 0x04a11040},
{0x1a, 0x411111f0},
{0x1b, 0x90170112},
{0x1d, 0x40759a05},
{0x1e, 0x411111f0},
{0x21, 0x04211020},
{ }
},
.chained = true,
.chain_id = ALC255_FIXUP_MIC_MUTE_LED
},
[ALC298_FIXUP_HUAWEI_MBX_STEREO] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc298_fixup_huawei_mbx_stereo,
.chained = true,
.chain_id = ALC255_FIXUP_MIC_MUTE_LED
},
[ALC269_FIXUP_ASUS_X101_FUNC] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc269_fixup_x101_headset_mic,
},
[ALC269_FIXUP_ASUS_X101_VERB] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
{0x18, AC_VERB_SET_PIN_WIDGET_CONTROL, 0},
{0x20, AC_VERB_SET_COEF_INDEX, 0x08},
{0x20, AC_VERB_SET_PROC_COEF, 0x0310},
{ }
},
.chained = true,
.chain_id = ALC269_FIXUP_ASUS_X101_FUNC
},
[ALC269_FIXUP_ASUS_X101] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x18, 0x04a1182c }, /* Headset mic */
{ }
},
.chained = true,
.chain_id = ALC269_FIXUP_ASUS_X101_VERB
},
[ALC271_FIXUP_AMIC_MIC2] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x14, 0x99130110 }, /* speaker */
{ 0x19, 0x01a19c20 }, /* mic */
{ 0x1b, 0x99a7012f }, /* int-mic */
{ 0x21, 0x0121401f }, /* HP out */
{ }
},
},
[ALC271_FIXUP_HP_GATE_MIC_JACK] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc271_hp_gate_mic_jack,
.chained = true,
.chain_id = ALC271_FIXUP_AMIC_MIC2,
},
[ALC271_FIXUP_HP_GATE_MIC_JACK_E1_572] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc269_fixup_limit_int_mic_boost,
.chained = true,
.chain_id = ALC271_FIXUP_HP_GATE_MIC_JACK,
},
[ALC269_FIXUP_ACER_AC700] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x12, 0x99a3092f }, /* int-mic */
{ 0x14, 0x99130110 }, /* speaker */
{ 0x18, 0x03a11c20 }, /* mic */
{ 0x1e, 0x0346101e }, /* SPDIF1 */
{ 0x21, 0x0321101f }, /* HP out */
{ }
},
.chained = true,
.chain_id = ALC271_FIXUP_DMIC,
},
[ALC269_FIXUP_LIMIT_INT_MIC_BOOST] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc269_fixup_limit_int_mic_boost,
.chained = true,
.chain_id = ALC269_FIXUP_THINKPAD_ACPI,
},
[ALC269VB_FIXUP_ASUS_ZENBOOK] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc269_fixup_limit_int_mic_boost,
.chained = true,
.chain_id = ALC269VB_FIXUP_DMIC,
},
[ALC269VB_FIXUP_ASUS_ZENBOOK_UX31A] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
/* class-D output amp +5dB */
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x12 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x2800 },
{}
},
.chained = true,
.chain_id = ALC269VB_FIXUP_ASUS_ZENBOOK,
},
[ALC269VB_FIXUP_ASUS_MIC_NO_PRESENCE] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x18, 0x01a110f0 }, /* use as headset mic */
{ }
},
.chained = true,
.chain_id = ALC269_FIXUP_HEADSET_MIC
},
[ALC269_FIXUP_LIMIT_INT_MIC_BOOST_MUTE_LED] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc269_fixup_limit_int_mic_boost,
.chained = true,
.chain_id = ALC269_FIXUP_HP_MUTE_LED_MIC1,
},
[ALC269VB_FIXUP_ORDISSIMO_EVE2] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x12, 0x99a3092f }, /* int-mic */
{ 0x18, 0x03a11d20 }, /* mic */
{ 0x19, 0x411111f0 }, /* Unused bogus pin */
{ }
},
},
[ALC283_FIXUP_CHROME_BOOK] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc283_fixup_chromebook,
},
[ALC283_FIXUP_SENSE_COMBO_JACK] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc283_fixup_sense_combo_jack,
.chained = true,
.chain_id = ALC283_FIXUP_CHROME_BOOK,
},
[ALC282_FIXUP_ASUS_TX300] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc282_fixup_asus_tx300,
},
[ALC283_FIXUP_INT_MIC] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
{0x20, AC_VERB_SET_COEF_INDEX, 0x1a},
{0x20, AC_VERB_SET_PROC_COEF, 0x0011},
{ }
},
.chained = true,
.chain_id = ALC269_FIXUP_LIMIT_INT_MIC_BOOST
},
[ALC290_FIXUP_SUBWOOFER_HSJACK] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x17, 0x90170112 }, /* subwoofer */
{ }
},
.chained = true,
.chain_id = ALC290_FIXUP_MONO_SPEAKERS_HSJACK,
},
[ALC290_FIXUP_SUBWOOFER] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x17, 0x90170112 }, /* subwoofer */
{ }
},
.chained = true,
.chain_id = ALC290_FIXUP_MONO_SPEAKERS,
},
[ALC290_FIXUP_MONO_SPEAKERS] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc290_fixup_mono_speakers,
},
[ALC290_FIXUP_MONO_SPEAKERS_HSJACK] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc290_fixup_mono_speakers,
.chained = true,
.chain_id = ALC269_FIXUP_DELL3_MIC_NO_PRESENCE,
},
[ALC269_FIXUP_THINKPAD_ACPI] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_thinkpad_acpi,
.chained = true,
.chain_id = ALC269_FIXUP_SKU_IGNORE,
},
[ALC269_FIXUP_DMIC_THINKPAD_ACPI] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_inv_dmic,
.chained = true,
.chain_id = ALC269_FIXUP_THINKPAD_ACPI,
},
[ALC255_FIXUP_ACER_MIC_NO_PRESENCE] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, 0x01a1913c }, /* use as headset mic, without its own jack detect */
{ }
},
.chained = true,
.chain_id = ALC255_FIXUP_HEADSET_MODE
},
[ALC255_FIXUP_ASUS_MIC_NO_PRESENCE] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, 0x01a1913c }, /* use as headset mic, without its own jack detect */
{ }
},
.chained = true,
.chain_id = ALC255_FIXUP_HEADSET_MODE
},
[ALC255_FIXUP_DELL1_MIC_NO_PRESENCE] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, 0x01a1913c }, /* use as headset mic, without its own jack detect */
{ 0x1a, 0x01a1913d }, /* use as headphone mic, without its own jack detect */
{ }
},
.chained = true,
.chain_id = ALC255_FIXUP_HEADSET_MODE
},
[ALC255_FIXUP_DELL2_MIC_NO_PRESENCE] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, 0x01a1913c }, /* use as headset mic, without its own jack detect */
{ }
},
.chained = true,
.chain_id = ALC255_FIXUP_HEADSET_MODE_NO_HP_MIC
},
[ALC255_FIXUP_HEADSET_MODE] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_headset_mode_alc255,
.chained = true,
.chain_id = ALC255_FIXUP_MIC_MUTE_LED
},
[ALC255_FIXUP_HEADSET_MODE_NO_HP_MIC] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_headset_mode_alc255_no_hp_mic,
},
[ALC293_FIXUP_DELL1_MIC_NO_PRESENCE] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x18, 0x01a1913d }, /* use as headphone mic, without its own jack detect */
{ 0x1a, 0x01a1913c }, /* use as headset mic, without its own jack detect */
{ }
},
.chained = true,
.chain_id = ALC269_FIXUP_HEADSET_MODE
},
[ALC292_FIXUP_TPT440_DOCK] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_tpt440_dock,
.chained = true,
.chain_id = ALC269_FIXUP_LIMIT_INT_MIC_BOOST
},
[ALC292_FIXUP_TPT440] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_disable_aamix,
.chained = true,
.chain_id = ALC292_FIXUP_TPT440_DOCK,
},
[ALC283_FIXUP_HEADSET_MIC] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, 0x04a110f0 },
{ },
},
},
[ALC255_FIXUP_MIC_MUTE_LED] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_micmute_led,
},
[ALC282_FIXUP_ASPIRE_V5_PINS] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x12, 0x90a60130 },
{ 0x14, 0x90170110 },
{ 0x17, 0x40000008 },
{ 0x18, 0x411111f0 },
{ 0x19, 0x01a1913c },
{ 0x1a, 0x411111f0 },
{ 0x1b, 0x411111f0 },
{ 0x1d, 0x40f89b2d },
{ 0x1e, 0x411111f0 },
{ 0x21, 0x0321101f },
{ },
},
},
[ALC269VB_FIXUP_ASPIRE_E1_COEF] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc269vb_fixup_aspire_e1_coef,
},
[ALC280_FIXUP_HP_GPIO4] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc280_fixup_hp_gpio4,
},
[ALC286_FIXUP_HP_GPIO_LED] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc286_fixup_hp_gpio_led,
},
[ALC280_FIXUP_HP_GPIO2_MIC_HOTKEY] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc280_fixup_hp_gpio2_mic_hotkey,
},
[ALC280_FIXUP_HP_DOCK_PINS] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x1b, 0x21011020 }, /* line-out */
{ 0x1a, 0x01a1903c }, /* headset mic */
{ 0x18, 0x2181103f }, /* line-in */
{ },
},
.chained = true,
.chain_id = ALC280_FIXUP_HP_GPIO4
},
[ALC269_FIXUP_HP_DOCK_GPIO_MIC1_LED] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x1b, 0x21011020 }, /* line-out */
{ 0x18, 0x2181103f }, /* line-in */
{ },
},
.chained = true,
.chain_id = ALC269_FIXUP_HP_GPIO_MIC1_LED
},
[ALC280_FIXUP_HP_9480M] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc280_fixup_hp_9480m,
},
[ALC245_FIXUP_HP_X360_AMP] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc245_fixup_hp_x360_amp,
.chained = true,
.chain_id = ALC245_FIXUP_HP_GPIO_LED
},
[ALC288_FIXUP_DELL_HEADSET_MODE] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_headset_mode_dell_alc288,
.chained = true,
.chain_id = ALC255_FIXUP_MIC_MUTE_LED
},
[ALC288_FIXUP_DELL1_MIC_NO_PRESENCE] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x18, 0x01a1913c }, /* use as headset mic, without its own jack detect */
{ 0x1a, 0x01a1913d }, /* use as headphone mic, without its own jack detect */
{ }
},
.chained = true,
.chain_id = ALC288_FIXUP_DELL_HEADSET_MODE
},
[ALC288_FIXUP_DISABLE_AAMIX] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_disable_aamix,
.chained = true,
.chain_id = ALC288_FIXUP_DELL1_MIC_NO_PRESENCE
},
[ALC288_FIXUP_DELL_XPS_13] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_dell_xps13,
.chained = true,
.chain_id = ALC288_FIXUP_DISABLE_AAMIX
},
[ALC292_FIXUP_DISABLE_AAMIX] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_disable_aamix,
.chained = true,
.chain_id = ALC269_FIXUP_DELL2_MIC_NO_PRESENCE
},
[ALC293_FIXUP_DISABLE_AAMIX_MULTIJACK] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_disable_aamix,
.chained = true,
.chain_id = ALC293_FIXUP_DELL1_MIC_NO_PRESENCE
},
[ALC292_FIXUP_DELL_E7X_AAMIX] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_dell_xps13,
.chained = true,
.chain_id = ALC292_FIXUP_DISABLE_AAMIX
},
[ALC292_FIXUP_DELL_E7X] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_micmute_led,
/* micmute fixup must be applied at last */
.chained_before = true,
.chain_id = ALC292_FIXUP_DELL_E7X_AAMIX,
},
[ALC298_FIXUP_ALIENWARE_MIC_NO_PRESENCE] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x18, 0x01a1913c }, /* headset mic w/o jack detect */
{ }
},
.chained_before = true,
.chain_id = ALC269_FIXUP_HEADSET_MODE,
},
[ALC298_FIXUP_DELL1_MIC_NO_PRESENCE] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x18, 0x01a1913c }, /* use as headset mic, without its own jack detect */
{ 0x1a, 0x01a1913d }, /* use as headphone mic, without its own jack detect */
{ }
},
.chained = true,
.chain_id = ALC269_FIXUP_HEADSET_MODE
},
[ALC298_FIXUP_DELL_AIO_MIC_NO_PRESENCE] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x18, 0x01a1913c }, /* use as headset mic, without its own jack detect */
{ }
},
.chained = true,
.chain_id = ALC269_FIXUP_HEADSET_MODE
},
[ALC275_FIXUP_DELL_XPS] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
/* Enables internal speaker */
{0x20, AC_VERB_SET_COEF_INDEX, 0x1f},
{0x20, AC_VERB_SET_PROC_COEF, 0x00c0},
{0x20, AC_VERB_SET_COEF_INDEX, 0x30},
{0x20, AC_VERB_SET_PROC_COEF, 0x00b1},
{}
}
},
[ALC293_FIXUP_LENOVO_SPK_NOISE] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_disable_aamix,
.chained = true,
.chain_id = ALC269_FIXUP_THINKPAD_ACPI
},
[ALC233_FIXUP_LENOVO_LINE2_MIC_HOTKEY] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc233_fixup_lenovo_line2_mic_hotkey,
},
[ALC233_FIXUP_INTEL_NUC8_DMIC] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_inv_dmic,
.chained = true,
.chain_id = ALC233_FIXUP_INTEL_NUC8_BOOST,
},
[ALC233_FIXUP_INTEL_NUC8_BOOST] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc269_fixup_limit_int_mic_boost
},
[ALC255_FIXUP_DELL_SPK_NOISE] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_disable_aamix,
.chained = true,
.chain_id = ALC255_FIXUP_DELL1_MIC_NO_PRESENCE
},
[ALC225_FIXUP_DISABLE_MIC_VREF] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_disable_mic_vref,
.chained = true,
.chain_id = ALC269_FIXUP_DELL1_MIC_NO_PRESENCE
},
[ALC225_FIXUP_DELL1_MIC_NO_PRESENCE] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
/* Disable pass-through path for FRONT 14h */
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x36 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x57d7 },
{}
},
.chained = true,
.chain_id = ALC225_FIXUP_DISABLE_MIC_VREF
},
[ALC280_FIXUP_HP_HEADSET_MIC] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_disable_aamix,
.chained = true,
.chain_id = ALC269_FIXUP_HEADSET_MIC,
},
[ALC221_FIXUP_HP_FRONT_MIC] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, 0x02a19020 }, /* Front Mic */
{ }
},
},
[ALC292_FIXUP_TPT460] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_tpt440_dock,
.chained = true,
.chain_id = ALC293_FIXUP_LENOVO_SPK_NOISE,
},
[ALC298_FIXUP_SPK_VOLUME] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc298_fixup_speaker_volume,
.chained = true,
.chain_id = ALC298_FIXUP_DELL_AIO_MIC_NO_PRESENCE,
},
[ALC298_FIXUP_LENOVO_SPK_VOLUME] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc298_fixup_speaker_volume,
},
[ALC295_FIXUP_DISABLE_DAC3] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc295_fixup_disable_dac3,
},
[ALC285_FIXUP_SPEAKER2_TO_DAC1] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc285_fixup_speaker2_to_dac1,
.chained = true,
.chain_id = ALC269_FIXUP_THINKPAD_ACPI
},
[ALC285_FIXUP_ASUS_SPEAKER2_TO_DAC1] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc285_fixup_speaker2_to_dac1,
.chained = true,
.chain_id = ALC245_FIXUP_CS35L41_SPI_2
},
[ALC285_FIXUP_ASUS_HEADSET_MIC] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, 0x03a11050 },
{ 0x1b, 0x03a11c30 },
{ }
},
.chained = true,
.chain_id = ALC285_FIXUP_ASUS_SPEAKER2_TO_DAC1
},
[ALC285_FIXUP_ASUS_SPI_REAR_SPEAKERS] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x14, 0x90170120 },
{ }
},
.chained = true,
.chain_id = ALC285_FIXUP_ASUS_HEADSET_MIC
},
[ALC285_FIXUP_ASUS_I2C_SPEAKER2_TO_DAC1] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc285_fixup_speaker2_to_dac1,
.chained = true,
.chain_id = ALC287_FIXUP_CS35L41_I2C_2
},
[ALC285_FIXUP_ASUS_I2C_HEADSET_MIC] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, 0x03a11050 },
{ 0x1b, 0x03a11c30 },
{ }
},
.chained = true,
.chain_id = ALC285_FIXUP_ASUS_I2C_SPEAKER2_TO_DAC1
},
[ALC256_FIXUP_DELL_INSPIRON_7559_SUBWOOFER] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x1b, 0x90170151 },
{ }
},
.chained = true,
.chain_id = ALC255_FIXUP_DELL1_MIC_NO_PRESENCE
},
[ALC269_FIXUP_ATIV_BOOK_8] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_auto_mute_via_amp,
.chained = true,
.chain_id = ALC269_FIXUP_NO_SHUTUP
},
[ALC221_FIXUP_HP_288PRO_MIC_NO_PRESENCE] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, 0x01a1913c }, /* use as headset mic, without its own jack detect */
{ 0x1a, 0x01813030 }, /* use as headphone mic, without its own jack detect */
{ }
},
.chained = true,
.chain_id = ALC269_FIXUP_HEADSET_MODE
},
[ALC221_FIXUP_HP_MIC_NO_PRESENCE] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x18, 0x01a1913c }, /* use as headset mic, without its own jack detect */
{ 0x1a, 0x01a1913d }, /* use as headphone mic, without its own jack detect */
{ }
},
.chained = true,
.chain_id = ALC269_FIXUP_HEADSET_MODE
},
[ALC256_FIXUP_ASUS_HEADSET_MODE] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_headset_mode,
},
[ALC256_FIXUP_ASUS_MIC] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x13, 0x90a60160 }, /* use as internal mic */
{ 0x19, 0x04a11120 }, /* use as headset mic, without its own jack detect */
{ }
},
.chained = true,
.chain_id = ALC256_FIXUP_ASUS_HEADSET_MODE
},
[ALC256_FIXUP_ASUS_AIO_GPIO2] = {
.type = HDA_FIXUP_FUNC,
/* Set up GPIO2 for the speaker amp */
.v.func = alc_fixup_gpio4,
},
[ALC233_FIXUP_ASUS_MIC_NO_PRESENCE] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, 0x01a1913c }, /* use as headset mic, without its own jack detect */
{ }
},
.chained = true,
.chain_id = ALC269_FIXUP_HEADSET_MIC
},
[ALC233_FIXUP_EAPD_COEF_AND_MIC_NO_PRESENCE] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
/* Enables internal speaker */
{0x20, AC_VERB_SET_COEF_INDEX, 0x40},
{0x20, AC_VERB_SET_PROC_COEF, 0x8800},
{}
},
.chained = true,
.chain_id = ALC233_FIXUP_ASUS_MIC_NO_PRESENCE
},
[ALC233_FIXUP_LENOVO_MULTI_CODECS] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc233_alc662_fixup_lenovo_dual_codecs,
.chained = true,
.chain_id = ALC269_FIXUP_GPIO2
},
[ALC233_FIXUP_ACER_HEADSET_MIC] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x45 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x5089 },
{ }
},
.chained = true,
.chain_id = ALC233_FIXUP_ASUS_MIC_NO_PRESENCE
},
[ALC294_FIXUP_LENOVO_MIC_LOCATION] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
/* Change the mic location from front to right, otherwise there are
two front mics with the same name, pulseaudio can't handle them.
This is just a temporary workaround, after applying this fixup,
there will be one "Front Mic" and one "Mic" in this machine.
*/
{ 0x1a, 0x04a19040 },
{ }
},
},
[ALC225_FIXUP_DELL_WYSE_MIC_NO_PRESENCE] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x16, 0x0101102f }, /* Rear Headset HP */
{ 0x19, 0x02a1913c }, /* use as Front headset mic, without its own jack detect */
{ 0x1a, 0x01a19030 }, /* Rear Headset MIC */
{ 0x1b, 0x02011020 },
{ }
},
.chained = true,
.chain_id = ALC225_FIXUP_S3_POP_NOISE
},
[ALC225_FIXUP_S3_POP_NOISE] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc225_fixup_s3_pop_noise,
.chained = true,
.chain_id = ALC269_FIXUP_HEADSET_MODE_NO_HP_MIC
},
[ALC700_FIXUP_INTEL_REFERENCE] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
/* Enables internal speaker */
{0x20, AC_VERB_SET_COEF_INDEX, 0x45},
{0x20, AC_VERB_SET_PROC_COEF, 0x5289},
{0x20, AC_VERB_SET_COEF_INDEX, 0x4A},
{0x20, AC_VERB_SET_PROC_COEF, 0x001b},
{0x58, AC_VERB_SET_COEF_INDEX, 0x00},
{0x58, AC_VERB_SET_PROC_COEF, 0x3888},
{0x20, AC_VERB_SET_COEF_INDEX, 0x6f},
{0x20, AC_VERB_SET_PROC_COEF, 0x2c0b},
{}
}
},
[ALC274_FIXUP_DELL_BIND_DACS] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc274_fixup_bind_dacs,
.chained = true,
.chain_id = ALC269_FIXUP_DELL1_MIC_NO_PRESENCE
},
[ALC274_FIXUP_DELL_AIO_LINEOUT_VERB] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x1b, 0x0401102f },
{ }
},
.chained = true,
.chain_id = ALC274_FIXUP_DELL_BIND_DACS
},
[ALC298_FIXUP_TPT470_DOCK_FIX] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_tpt470_dock,
.chained = true,
.chain_id = ALC293_FIXUP_LENOVO_SPK_NOISE
},
[ALC298_FIXUP_TPT470_DOCK] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_tpt470_dacs,
.chained = true,
.chain_id = ALC298_FIXUP_TPT470_DOCK_FIX
},
[ALC255_FIXUP_DUMMY_LINEOUT_VERB] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x14, 0x0201101f },
{ }
},
.chained = true,
.chain_id = ALC255_FIXUP_DELL1_MIC_NO_PRESENCE
},
[ALC255_FIXUP_DELL_HEADSET_MIC] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, 0x01a1913c }, /* use as headset mic, without its own jack detect */
{ }
},
.chained = true,
.chain_id = ALC269_FIXUP_HEADSET_MIC
},
[ALC295_FIXUP_HP_X360] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc295_fixup_hp_top_speakers,
.chained = true,
.chain_id = ALC269_FIXUP_HP_MUTE_LED_MIC3
},
[ALC221_FIXUP_HP_HEADSET_MIC] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, 0x0181313f},
{ }
},
.chained = true,
.chain_id = ALC269_FIXUP_HEADSET_MIC
},
[ALC285_FIXUP_LENOVO_HEADPHONE_NOISE] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc285_fixup_invalidate_dacs,
.chained = true,
.chain_id = ALC269_FIXUP_THINKPAD_ACPI
},
[ALC295_FIXUP_HP_AUTO_MUTE] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_auto_mute_via_amp,
},
[ALC286_FIXUP_ACER_AIO_MIC_NO_PRESENCE] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x18, 0x01a1913c }, /* use as headset mic, without its own jack detect */
{ }
},
.chained = true,
.chain_id = ALC269_FIXUP_HEADSET_MIC
},
[ALC294_FIXUP_ASUS_MIC] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x13, 0x90a60160 }, /* use as internal mic */
{ 0x19, 0x04a11120 }, /* use as headset mic, without its own jack detect */
{ }
},
.chained = true,
.chain_id = ALC269_FIXUP_HEADSET_MIC
},
[ALC294_FIXUP_ASUS_HEADSET_MIC] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, 0x01a1103c }, /* use as headset mic */
{ }
},
.chained = true,
.chain_id = ALC269_FIXUP_HEADSET_MIC
},
[ALC294_FIXUP_ASUS_SPK] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
/* Set EAPD high */
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x40 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x8800 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x0f },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x7774 },
{ }
},
.chained = true,
.chain_id = ALC294_FIXUP_ASUS_HEADSET_MIC
},
[ALC295_FIXUP_CHROME_BOOK] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc295_fixup_chromebook,
.chained = true,
.chain_id = ALC225_FIXUP_HEADSET_JACK
},
[ALC225_FIXUP_HEADSET_JACK] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_headset_jack,
},
[ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x1a, 0x01a1913c }, /* use as headset mic, without its own jack detect */
{ }
},
.chained = true,
.chain_id = ALC269_FIXUP_HEADSET_MODE_NO_HP_MIC
},
[ALC285_FIXUP_LENOVO_PC_BEEP_IN_NOISE] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
/* Disable PCBEEP-IN passthrough */
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x36 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x57d7 },
{ }
},
.chained = true,
.chain_id = ALC285_FIXUP_LENOVO_HEADPHONE_NOISE
},
[ALC255_FIXUP_ACER_HEADSET_MIC] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, 0x03a11130 },
{ 0x1a, 0x90a60140 }, /* use as internal mic */
{ }
},
.chained = true,
.chain_id = ALC255_FIXUP_HEADSET_MODE_NO_HP_MIC
},
[ALC225_FIXUP_DELL_WYSE_AIO_MIC_NO_PRESENCE] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x16, 0x01011020 }, /* Rear Line out */
{ 0x19, 0x01a1913c }, /* use as Front headset mic, without its own jack detect */
{ }
},
.chained = true,
.chain_id = ALC225_FIXUP_WYSE_AUTO_MUTE
},
[ALC225_FIXUP_WYSE_AUTO_MUTE] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_auto_mute_via_amp,
.chained = true,
.chain_id = ALC225_FIXUP_WYSE_DISABLE_MIC_VREF
},
[ALC225_FIXUP_WYSE_DISABLE_MIC_VREF] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_disable_mic_vref,
.chained = true,
.chain_id = ALC269_FIXUP_HEADSET_MODE_NO_HP_MIC
},
[ALC286_FIXUP_ACER_AIO_HEADSET_MIC] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x4f },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x5029 },
{ }
},
.chained = true,
.chain_id = ALC286_FIXUP_ACER_AIO_MIC_NO_PRESENCE
},
[ALC256_FIXUP_ASUS_HEADSET_MIC] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, 0x03a11020 }, /* headset mic with jack detect */
{ }
},
.chained = true,
.chain_id = ALC256_FIXUP_ASUS_HEADSET_MODE
},
[ALC256_FIXUP_ASUS_MIC_NO_PRESENCE] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, 0x04a11120 }, /* use as headset mic, without its own jack detect */
{ }
},
.chained = true,
.chain_id = ALC256_FIXUP_ASUS_HEADSET_MODE
},
[ALC299_FIXUP_PREDATOR_SPK] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x21, 0x90170150 }, /* use as headset mic, without its own jack detect */
{ }
}
},
[ALC256_FIXUP_MEDION_HEADSET_NO_PRESENCE] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, 0x04a11040 },
{ 0x21, 0x04211020 },
{ }
},
.chained = true,
.chain_id = ALC256_FIXUP_ASUS_HEADSET_MODE
},
[ALC289_FIXUP_DELL_SPK2] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x17, 0x90170130 }, /* bass spk */
{ }
},
.chained = true,
.chain_id = ALC269_FIXUP_DELL4_MIC_NO_PRESENCE
},
[ALC289_FIXUP_DUAL_SPK] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc285_fixup_speaker2_to_dac1,
.chained = true,
.chain_id = ALC289_FIXUP_DELL_SPK2
},
[ALC294_FIXUP_SPK2_TO_DAC1] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc285_fixup_speaker2_to_dac1,
.chained = true,
.chain_id = ALC294_FIXUP_ASUS_HEADSET_MIC
},
[ALC294_FIXUP_ASUS_DUAL_SPK] = {
.type = HDA_FIXUP_FUNC,
/* The GPIO must be pulled to initialize the AMP */
.v.func = alc_fixup_gpio4,
.chained = true,
.chain_id = ALC294_FIXUP_SPK2_TO_DAC1
},
[ALC294_FIXUP_ASUS_ALLY] = {
.type = HDA_FIXUP_FUNC,
.v.func = cs35l41_fixup_i2c_two,
.chained = true,
.chain_id = ALC294_FIXUP_ASUS_ALLY_PINS
},
[ALC294_FIXUP_ASUS_ALLY_PINS] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, 0x03a11050 },
{ 0x1a, 0x03a11c30 },
{ 0x21, 0x03211420 },
{ }
},
.chained = true,
.chain_id = ALC294_FIXUP_ASUS_ALLY_VERBS
},
[ALC294_FIXUP_ASUS_ALLY_VERBS] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x45 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x5089 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x46 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0004 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x47 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xa47a },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x49 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0049},
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x4a },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x201b },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x6b },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x4278},
{ }
},
.chained = true,
.chain_id = ALC294_FIXUP_ASUS_ALLY_SPEAKER
},
[ALC294_FIXUP_ASUS_ALLY_SPEAKER] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc285_fixup_speaker2_to_dac1,
},
[ALC285_FIXUP_THINKPAD_X1_GEN7] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc285_fixup_thinkpad_x1_gen7,
.chained = true,
.chain_id = ALC269_FIXUP_THINKPAD_ACPI
},
[ALC285_FIXUP_THINKPAD_HEADSET_JACK] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_headset_jack,
.chained = true,
.chain_id = ALC285_FIXUP_THINKPAD_X1_GEN7
},
[ALC294_FIXUP_ASUS_HPE] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
/* Set EAPD high */
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x0f },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x7774 },
{ }
},
.chained = true,
.chain_id = ALC294_FIXUP_ASUS_HEADSET_MIC
},
[ALC294_FIXUP_ASUS_GX502_PINS] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, 0x03a11050 }, /* front HP mic */
{ 0x1a, 0x01a11830 }, /* rear external mic */
{ 0x21, 0x03211020 }, /* front HP out */
{ }
},
.chained = true,
.chain_id = ALC294_FIXUP_ASUS_GX502_VERBS
},
[ALC294_FIXUP_ASUS_GX502_VERBS] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
/* set 0x15 to HP-OUT ctrl */
{ 0x15, AC_VERB_SET_PIN_WIDGET_CONTROL, 0xc0 },
/* unmute the 0x15 amp */
{ 0x15, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000 },
{ }
},
.chained = true,
.chain_id = ALC294_FIXUP_ASUS_GX502_HP
},
[ALC294_FIXUP_ASUS_GX502_HP] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc294_fixup_gx502_hp,
},
[ALC294_FIXUP_ASUS_GU502_PINS] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, 0x01a11050 }, /* rear HP mic */
{ 0x1a, 0x01a11830 }, /* rear external mic */
{ 0x21, 0x012110f0 }, /* rear HP out */
{ }
},
.chained = true,
.chain_id = ALC294_FIXUP_ASUS_GU502_VERBS
},
[ALC294_FIXUP_ASUS_GU502_VERBS] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
/* set 0x15 to HP-OUT ctrl */
{ 0x15, AC_VERB_SET_PIN_WIDGET_CONTROL, 0xc0 },
/* unmute the 0x15 amp */
{ 0x15, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000 },
/* set 0x1b to HP-OUT */
{ 0x1b, AC_VERB_SET_PIN_WIDGET_CONTROL, 0x24 },
{ }
},
.chained = true,
.chain_id = ALC294_FIXUP_ASUS_GU502_HP
},
[ALC294_FIXUP_ASUS_GU502_HP] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc294_fixup_gu502_hp,
},
[ALC294_FIXUP_ASUS_G513_PINS] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, 0x03a11050 }, /* front HP mic */
{ 0x1a, 0x03a11c30 }, /* rear external mic */
{ 0x21, 0x03211420 }, /* front HP out */
{ }
},
},
[ALC285_FIXUP_ASUS_G533Z_PINS] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x14, 0x90170152 }, /* Speaker Surround Playback Switch */
{ 0x19, 0x03a19020 }, /* Mic Boost Volume */
{ 0x1a, 0x03a11c30 }, /* Mic Boost Volume */
{ 0x1e, 0x90170151 }, /* Rear jack, IN OUT EAPD Detect */
{ 0x21, 0x03211420 },
{ }
},
},
[ALC294_FIXUP_ASUS_COEF_1B] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
/* Set bit 10 to correct noisy output after reboot from
* Windows 10 (due to pop noise reduction?)
*/
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x1b },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x4e4b },
{ }
},
.chained = true,
.chain_id = ALC289_FIXUP_ASUS_GA401,
},
[ALC285_FIXUP_HP_GPIO_LED] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc285_fixup_hp_gpio_led,
},
[ALC285_FIXUP_HP_MUTE_LED] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc285_fixup_hp_mute_led,
},
[ALC285_FIXUP_HP_SPECTRE_X360_MUTE_LED] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc285_fixup_hp_spectre_x360_mute_led,
},
[ALC236_FIXUP_HP_MUTE_LED_COEFBIT2] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc236_fixup_hp_mute_led_coefbit2,
},
[ALC236_FIXUP_HP_GPIO_LED] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc236_fixup_hp_gpio_led,
},
[ALC236_FIXUP_HP_MUTE_LED] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc236_fixup_hp_mute_led,
},
[ALC236_FIXUP_HP_MUTE_LED_MICMUTE_VREF] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc236_fixup_hp_mute_led_micmute_vref,
},
[ALC298_FIXUP_SAMSUNG_AMP] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc298_fixup_samsung_amp,
.chained = true,
.chain_id = ALC298_FIXUP_SAMSUNG_HEADPHONE_VERY_QUIET
},
[ALC298_FIXUP_SAMSUNG_HEADPHONE_VERY_QUIET] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
{ 0x1a, AC_VERB_SET_PIN_WIDGET_CONTROL, 0xc5 },
{ }
},
},
[ALC256_FIXUP_SAMSUNG_HEADPHONE_VERY_QUIET] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x08},
{ 0x20, AC_VERB_SET_PROC_COEF, 0x2fcf},
{ }
},
},
[ALC295_FIXUP_ASUS_MIC_NO_PRESENCE] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, 0x01a1913c }, /* use as headset mic, without its own jack detect */
{ }
},
.chained = true,
.chain_id = ALC269_FIXUP_HEADSET_MODE
},
[ALC269VC_FIXUP_ACER_VCOPPERBOX_PINS] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x14, 0x90100120 }, /* use as internal speaker */
{ 0x18, 0x02a111f0 }, /* use as headset mic, without its own jack detect */
{ 0x1a, 0x01011020 }, /* use as line out */
{ },
},
.chained = true,
.chain_id = ALC269_FIXUP_HEADSET_MIC
},
[ALC269VC_FIXUP_ACER_HEADSET_MIC] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x18, 0x02a11030 }, /* use as headset mic */
{ }
},
.chained = true,
.chain_id = ALC269_FIXUP_HEADSET_MIC
},
[ALC269VC_FIXUP_ACER_MIC_NO_PRESENCE] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x18, 0x01a11130 }, /* use as headset mic, without its own jack detect */
{ }
},
.chained = true,
.chain_id = ALC269_FIXUP_HEADSET_MIC
},
[ALC289_FIXUP_ASUS_GA401] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc289_fixup_asus_ga401,
.chained = true,
.chain_id = ALC289_FIXUP_ASUS_GA502,
},
[ALC289_FIXUP_ASUS_GA502] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, 0x03a11020 }, /* headset mic with jack detect */
{ }
},
},
[ALC256_FIXUP_ACER_MIC_NO_PRESENCE] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, 0x02a11120 }, /* use as headset mic, without its own jack detect */
{ }
},
.chained = true,
.chain_id = ALC256_FIXUP_ASUS_HEADSET_MODE
},
[ALC285_FIXUP_HP_GPIO_AMP_INIT] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc285_fixup_hp_gpio_amp_init,
.chained = true,
.chain_id = ALC285_FIXUP_HP_GPIO_LED
},
[ALC269_FIXUP_CZC_B20] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x12, 0x411111f0 },
{ 0x14, 0x90170110 }, /* speaker */
{ 0x15, 0x032f1020 }, /* HP out */
{ 0x17, 0x411111f0 },
{ 0x18, 0x03ab1040 }, /* mic */
{ 0x19, 0xb7a7013f },
{ 0x1a, 0x0181305f },
{ 0x1b, 0x411111f0 },
{ 0x1d, 0x411111f0 },
{ 0x1e, 0x411111f0 },
{ }
},
.chain_id = ALC269_FIXUP_DMIC,
},
[ALC269_FIXUP_CZC_TMI] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x12, 0x4000c000 },
{ 0x14, 0x90170110 }, /* speaker */
{ 0x15, 0x0421401f }, /* HP out */
{ 0x17, 0x411111f0 },
{ 0x18, 0x04a19020 }, /* mic */
{ 0x19, 0x411111f0 },
{ 0x1a, 0x411111f0 },
{ 0x1b, 0x411111f0 },
{ 0x1d, 0x40448505 },
{ 0x1e, 0x411111f0 },
{ 0x20, 0x8000ffff },
{ }
},
.chain_id = ALC269_FIXUP_DMIC,
},
[ALC269_FIXUP_CZC_L101] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x12, 0x40000000 },
{ 0x14, 0x01014010 }, /* speaker */
{ 0x15, 0x411111f0 }, /* HP out */
{ 0x16, 0x411111f0 },
{ 0x18, 0x01a19020 }, /* mic */
{ 0x19, 0x02a19021 },
{ 0x1a, 0x0181302f },
{ 0x1b, 0x0221401f },
{ 0x1c, 0x411111f0 },
{ 0x1d, 0x4044c601 },
{ 0x1e, 0x411111f0 },
{ }
},
.chain_id = ALC269_FIXUP_DMIC,
},
[ALC269_FIXUP_LEMOTE_A1802] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x12, 0x40000000 },
{ 0x14, 0x90170110 }, /* speaker */
{ 0x17, 0x411111f0 },
{ 0x18, 0x03a19040 }, /* mic1 */
{ 0x19, 0x90a70130 }, /* mic2 */
{ 0x1a, 0x411111f0 },
{ 0x1b, 0x411111f0 },
{ 0x1d, 0x40489d2d },
{ 0x1e, 0x411111f0 },
{ 0x20, 0x0003ffff },
{ 0x21, 0x03214020 },
{ }
},
.chain_id = ALC269_FIXUP_DMIC,
},
[ALC269_FIXUP_LEMOTE_A190X] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x14, 0x99130110 }, /* speaker */
{ 0x15, 0x0121401f }, /* HP out */
{ 0x18, 0x01a19c20 }, /* rear mic */
{ 0x19, 0x99a3092f }, /* front mic */
{ 0x1b, 0x0201401f }, /* front lineout */
{ }
},
.chain_id = ALC269_FIXUP_DMIC,
},
[ALC256_FIXUP_INTEL_NUC8_RUGGED] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x1b, 0x01a1913c }, /* use as headset mic, without its own jack detect */
{ }
},
.chained = true,
.chain_id = ALC269_FIXUP_HEADSET_MODE
},
[ALC256_FIXUP_INTEL_NUC10] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, 0x01a1913c }, /* use as headset mic, without its own jack detect */
{ }
},
.chained = true,
.chain_id = ALC269_FIXUP_HEADSET_MODE
},
[ALC255_FIXUP_XIAOMI_HEADSET_MIC] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x45 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x5089 },
{ }
},
.chained = true,
.chain_id = ALC289_FIXUP_ASUS_GA502
},
[ALC274_FIXUP_HP_MIC] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x45 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x5089 },
{ }
},
},
[ALC274_FIXUP_HP_HEADSET_MIC] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc274_fixup_hp_headset_mic,
.chained = true,
.chain_id = ALC274_FIXUP_HP_MIC
},
[ALC274_FIXUP_HP_ENVY_GPIO] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc274_fixup_hp_envy_gpio,
},
[ALC256_FIXUP_ASUS_HPE] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
/* Set EAPD high */
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x0f },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x7778 },
{ }
},
.chained = true,
.chain_id = ALC294_FIXUP_ASUS_HEADSET_MIC
},
[ALC285_FIXUP_THINKPAD_NO_BASS_SPK_HEADSET_JACK] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_headset_jack,
.chained = true,
.chain_id = ALC269_FIXUP_THINKPAD_ACPI
},
[ALC287_FIXUP_HP_GPIO_LED] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc287_fixup_hp_gpio_led,
},
[ALC256_FIXUP_HP_HEADSET_MIC] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc274_fixup_hp_headset_mic,
},
[ALC236_FIXUP_DELL_AIO_HEADSET_MIC] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_no_int_mic,
.chained = true,
.chain_id = ALC255_FIXUP_DELL1_MIC_NO_PRESENCE
},
[ALC282_FIXUP_ACER_DISABLE_LINEOUT] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x1b, 0x411111f0 },
{ 0x18, 0x01a1913c }, /* use as headset mic, without its own jack detect */
{ },
},
.chained = true,
.chain_id = ALC269_FIXUP_HEADSET_MODE
},
[ALC255_FIXUP_ACER_LIMIT_INT_MIC_BOOST] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc269_fixup_limit_int_mic_boost,
.chained = true,
.chain_id = ALC255_FIXUP_ACER_MIC_NO_PRESENCE,
},
[ALC256_FIXUP_ACER_HEADSET_MIC] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, 0x02a1113c }, /* use as headset mic, without its own jack detect */
{ 0x1a, 0x90a1092f }, /* use as internal mic */
{ }
},
.chained = true,
.chain_id = ALC269_FIXUP_HEADSET_MODE_NO_HP_MIC
},
[ALC285_FIXUP_IDEAPAD_S740_COEF] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc285_fixup_ideapad_s740_coef,
.chained = true,
.chain_id = ALC269_FIXUP_THINKPAD_ACPI,
},
[ALC285_FIXUP_HP_LIMIT_INT_MIC_BOOST] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc269_fixup_limit_int_mic_boost,
.chained = true,
.chain_id = ALC285_FIXUP_HP_MUTE_LED,
},
[ALC295_FIXUP_ASUS_DACS] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc295_fixup_asus_dacs,
},
[ALC295_FIXUP_HP_OMEN] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x12, 0xb7a60130 },
{ 0x13, 0x40000000 },
{ 0x14, 0x411111f0 },
{ 0x16, 0x411111f0 },
{ 0x17, 0x90170110 },
{ 0x18, 0x411111f0 },
{ 0x19, 0x02a11030 },
{ 0x1a, 0x411111f0 },
{ 0x1b, 0x04a19030 },
{ 0x1d, 0x40600001 },
{ 0x1e, 0x411111f0 },
{ 0x21, 0x03211020 },
{}
},
.chained = true,
.chain_id = ALC269_FIXUP_HP_LINE1_MIC1_LED,
},
[ALC285_FIXUP_HP_SPECTRE_X360] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc285_fixup_hp_spectre_x360,
},
[ALC285_FIXUP_HP_SPECTRE_X360_EB1] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc285_fixup_hp_spectre_x360_eb1
},
[ALC287_FIXUP_IDEAPAD_BASS_SPK_AMP] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc285_fixup_ideapad_s740_coef,
.chained = true,
.chain_id = ALC285_FIXUP_THINKPAD_HEADSET_JACK,
},
[ALC623_FIXUP_LENOVO_THINKSTATION_P340] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_no_shutup,
.chained = true,
.chain_id = ALC283_FIXUP_HEADSET_MIC,
},
[ALC255_FIXUP_ACER_HEADPHONE_AND_MIC] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x21, 0x03211030 }, /* Change the Headphone location to Left */
{ }
},
.chained = true,
.chain_id = ALC255_FIXUP_XIAOMI_HEADSET_MIC
},
[ALC236_FIXUP_HP_LIMIT_INT_MIC_BOOST] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc269_fixup_limit_int_mic_boost,
.chained = true,
.chain_id = ALC236_FIXUP_HP_MUTE_LED_MICMUTE_VREF,
},
[ALC285_FIXUP_LEGION_Y9000X_SPEAKERS] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc285_fixup_ideapad_s740_coef,
.chained = true,
.chain_id = ALC285_FIXUP_LEGION_Y9000X_AUTOMUTE,
},
[ALC285_FIXUP_LEGION_Y9000X_AUTOMUTE] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc287_fixup_legion_15imhg05_speakers,
.chained = true,
.chain_id = ALC269_FIXUP_THINKPAD_ACPI,
},
[ALC287_FIXUP_LEGION_15IMHG05_SPEAKERS] = {
.type = HDA_FIXUP_VERBS,
//.v.verbs = legion_15imhg05_coefs,
.v.verbs = (const struct hda_verb[]) {
// set left speaker Legion 7i.
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x24 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x41 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xc },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x1a },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x2 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
// set right speaker Legion 7i.
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x24 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x42 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xc },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x2a },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x2 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{}
},
.chained = true,
.chain_id = ALC287_FIXUP_LEGION_15IMHG05_AUTOMUTE,
},
[ALC287_FIXUP_LEGION_15IMHG05_AUTOMUTE] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc287_fixup_legion_15imhg05_speakers,
.chained = true,
.chain_id = ALC269_FIXUP_HEADSET_MODE,
},
[ALC287_FIXUP_YOGA7_14ITL_SPEAKERS] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
// set left speaker Yoga 7i.
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x24 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x41 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xc },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x1a },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x2 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
// set right speaker Yoga 7i.
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x24 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x46 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xc },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x2a },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x2 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{}
},
.chained = true,
.chain_id = ALC269_FIXUP_HEADSET_MODE,
},
[ALC298_FIXUP_LENOVO_C940_DUET7] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc298_fixup_lenovo_c940_duet7,
},
[ALC287_FIXUP_13S_GEN2_SPEAKERS] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x24 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x41 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x2 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x24 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x42 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x2 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{}
},
.chained = true,
.chain_id = ALC269_FIXUP_HEADSET_MODE,
},
[ALC256_FIXUP_SET_COEF_DEFAULTS] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc256_fixup_set_coef_defaults,
},
[ALC245_FIXUP_HP_GPIO_LED] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc245_fixup_hp_gpio_led,
},
[ALC256_FIXUP_SYSTEM76_MIC_NO_PRESENCE] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, 0x03a11120 }, /* use as headset mic, without its own jack detect */
{ }
},
.chained = true,
.chain_id = ALC269_FIXUP_HEADSET_MODE_NO_HP_MIC,
},
[ALC233_FIXUP_NO_AUDIO_JACK] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc233_fixup_no_audio_jack,
},
[ALC256_FIXUP_MIC_NO_PRESENCE_AND_RESUME] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc256_fixup_mic_no_presence_and_resume,
.chained = true,
.chain_id = ALC269_FIXUP_HEADSET_MODE_NO_HP_MIC
},
[ALC287_FIXUP_LEGION_16ACHG6] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc287_fixup_legion_16achg6_speakers,
},
[ALC287_FIXUP_CS35L41_I2C_2] = {
.type = HDA_FIXUP_FUNC,
.v.func = cs35l41_fixup_i2c_two,
},
[ALC287_FIXUP_CS35L41_I2C_2_HP_GPIO_LED] = {
.type = HDA_FIXUP_FUNC,
.v.func = cs35l41_fixup_i2c_two,
.chained = true,
.chain_id = ALC285_FIXUP_HP_MUTE_LED,
},
[ALC245_FIXUP_CS35L41_SPI_2] = {
.type = HDA_FIXUP_FUNC,
.v.func = cs35l41_fixup_spi_two,
},
[ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED] = {
.type = HDA_FIXUP_FUNC,
.v.func = cs35l41_fixup_spi_two,
.chained = true,
.chain_id = ALC285_FIXUP_HP_GPIO_LED,
},
[ALC245_FIXUP_CS35L41_SPI_4] = {
.type = HDA_FIXUP_FUNC,
.v.func = cs35l41_fixup_spi_four,
},
[ALC245_FIXUP_CS35L41_SPI_4_HP_GPIO_LED] = {
.type = HDA_FIXUP_FUNC,
.v.func = cs35l41_fixup_spi_four,
.chained = true,
.chain_id = ALC285_FIXUP_HP_GPIO_LED,
},
[ALC285_FIXUP_HP_SPEAKERS_MICMUTE_LED] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x19 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x8e11 },
{ }
},
.chained = true,
.chain_id = ALC285_FIXUP_HP_MUTE_LED,
},
[ALC269_FIXUP_DELL4_MIC_NO_PRESENCE_QUIET] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_dell4_mic_no_presence_quiet,
.chained = true,
.chain_id = ALC269_FIXUP_DELL4_MIC_NO_PRESENCE,
},
[ALC295_FIXUP_FRAMEWORK_LAPTOP_MIC_NO_PRESENCE] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, 0x02a1112c }, /* use as headset mic, without its own jack detect */
{ }
},
.chained = true,
.chain_id = ALC269_FIXUP_HEADSET_MODE_NO_HP_MIC
},
[ALC287_FIXUP_LEGION_16ITHG6] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc287_fixup_legion_16ithg6_speakers,
},
[ALC287_FIXUP_YOGA9_14IAP7_BASS_SPK] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
// enable left speaker
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x24 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x41 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xc },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x1a },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xf },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x42 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x10 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x40 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x2 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
// enable right speaker
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x24 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x46 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xc },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x2a },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xf },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x46 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x10 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x44 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x2 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
{ },
},
},
[ALC287_FIXUP_YOGA9_14IAP7_BASS_SPK_PIN] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc287_fixup_yoga9_14iap7_bass_spk_pin,
.chained = true,
.chain_id = ALC287_FIXUP_YOGA9_14IAP7_BASS_SPK,
},
[ALC295_FIXUP_DELL_INSPIRON_TOP_SPEAKERS] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc295_fixup_dell_inspiron_top_speakers,
.chained = true,
.chain_id = ALC269_FIXUP_DELL4_MIC_NO_PRESENCE,
},
[ALC236_FIXUP_DELL_DUAL_CODECS] = {
.type = HDA_FIXUP_PINS,
.v.func = alc1220_fixup_gb_dual_codecs,
.chained = true,
.chain_id = ALC255_FIXUP_DELL1_MIC_NO_PRESENCE,
},
[ALC287_FIXUP_CS35L41_I2C_2_THINKPAD_ACPI] = {
.type = HDA_FIXUP_FUNC,
.v.func = cs35l41_fixup_i2c_two,
.chained = true,
.chain_id = ALC269_FIXUP_THINKPAD_ACPI,
},
[ALC287_FIXUP_TAS2781_I2C] = {
.type = HDA_FIXUP_FUNC,
.v.func = tas2781_fixup_i2c,
.chained = true,
.chain_id = ALC269_FIXUP_THINKPAD_ACPI,
},
[ALC245_FIXUP_HP_MUTE_LED_COEFBIT] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc245_fixup_hp_mute_led_coefbit,
},
[ALC245_FIXUP_HP_X360_MUTE_LEDS] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc245_fixup_hp_mute_led_coefbit,
.chained = true,
.chain_id = ALC245_FIXUP_HP_GPIO_LED
},
[ALC287_FIXUP_THINKPAD_I2S_SPK] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc287_fixup_bind_dacs,
},
};
static const struct snd_pci_quirk alc269_fixup_tbl[] = {
SND_PCI_QUIRK(0x1025, 0x0283, "Acer TravelMate 8371", ALC269_FIXUP_INV_DMIC),
SND_PCI_QUIRK(0x1025, 0x029b, "Acer 1810TZ", ALC269_FIXUP_INV_DMIC),
SND_PCI_QUIRK(0x1025, 0x0349, "Acer AOD260", ALC269_FIXUP_INV_DMIC),
SND_PCI_QUIRK(0x1025, 0x047c, "Acer AC700", ALC269_FIXUP_ACER_AC700),
SND_PCI_QUIRK(0x1025, 0x072d, "Acer Aspire V5-571G", ALC269_FIXUP_ASPIRE_HEADSET_MIC),
SND_PCI_QUIRK(0x1025, 0x0740, "Acer AO725", ALC271_FIXUP_HP_GATE_MIC_JACK),
SND_PCI_QUIRK(0x1025, 0x0742, "Acer AO756", ALC271_FIXUP_HP_GATE_MIC_JACK),
SND_PCI_QUIRK(0x1025, 0x0762, "Acer Aspire E1-472", ALC271_FIXUP_HP_GATE_MIC_JACK_E1_572),
SND_PCI_QUIRK(0x1025, 0x0775, "Acer Aspire E1-572", ALC271_FIXUP_HP_GATE_MIC_JACK_E1_572),
SND_PCI_QUIRK(0x1025, 0x079b, "Acer Aspire V5-573G", ALC282_FIXUP_ASPIRE_V5_PINS),
SND_PCI_QUIRK(0x1025, 0x080d, "Acer Aspire V5-122P", ALC269_FIXUP_ASPIRE_HEADSET_MIC),
SND_PCI_QUIRK(0x1025, 0x0840, "Acer Aspire E1", ALC269VB_FIXUP_ASPIRE_E1_COEF),
SND_PCI_QUIRK(0x1025, 0x101c, "Acer Veriton N2510G", ALC269_FIXUP_LIFEBOOK),
SND_PCI_QUIRK(0x1025, 0x102b, "Acer Aspire C24-860", ALC286_FIXUP_ACER_AIO_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1025, 0x1065, "Acer Aspire C20-820", ALC269VC_FIXUP_ACER_HEADSET_MIC),
SND_PCI_QUIRK(0x1025, 0x106d, "Acer Cloudbook 14", ALC283_FIXUP_CHROME_BOOK),
SND_PCI_QUIRK(0x1025, 0x1094, "Acer Aspire E5-575T", ALC255_FIXUP_ACER_LIMIT_INT_MIC_BOOST),
SND_PCI_QUIRK(0x1025, 0x1099, "Acer Aspire E5-523G", ALC255_FIXUP_ACER_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1025, 0x110e, "Acer Aspire ES1-432", ALC255_FIXUP_ACER_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1025, 0x1166, "Acer Veriton N4640G", ALC269_FIXUP_LIFEBOOK),
SND_PCI_QUIRK(0x1025, 0x1167, "Acer Veriton N6640G", ALC269_FIXUP_LIFEBOOK),
SND_PCI_QUIRK(0x1025, 0x1246, "Acer Predator Helios 500", ALC299_FIXUP_PREDATOR_SPK),
SND_PCI_QUIRK(0x1025, 0x1247, "Acer vCopperbox", ALC269VC_FIXUP_ACER_VCOPPERBOX_PINS),
SND_PCI_QUIRK(0x1025, 0x1248, "Acer Veriton N4660G", ALC269VC_FIXUP_ACER_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1025, 0x1269, "Acer SWIFT SF314-54", ALC256_FIXUP_ACER_HEADSET_MIC),
SND_PCI_QUIRK(0x1025, 0x128f, "Acer Veriton Z6860G", ALC286_FIXUP_ACER_AIO_HEADSET_MIC),
SND_PCI_QUIRK(0x1025, 0x1290, "Acer Veriton Z4860G", ALC286_FIXUP_ACER_AIO_HEADSET_MIC),
SND_PCI_QUIRK(0x1025, 0x1291, "Acer Veriton Z4660G", ALC286_FIXUP_ACER_AIO_HEADSET_MIC),
SND_PCI_QUIRK(0x1025, 0x129c, "Acer SWIFT SF314-55", ALC256_FIXUP_ACER_HEADSET_MIC),
SND_PCI_QUIRK(0x1025, 0x129d, "Acer SWIFT SF313-51", ALC256_FIXUP_ACER_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1025, 0x1300, "Acer SWIFT SF314-56", ALC256_FIXUP_ACER_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1025, 0x1308, "Acer Aspire Z24-890", ALC286_FIXUP_ACER_AIO_HEADSET_MIC),
SND_PCI_QUIRK(0x1025, 0x132a, "Acer TravelMate B114-21", ALC233_FIXUP_ACER_HEADSET_MIC),
SND_PCI_QUIRK(0x1025, 0x1330, "Acer TravelMate X514-51T", ALC255_FIXUP_ACER_HEADSET_MIC),
SND_PCI_QUIRK(0x1025, 0x141f, "Acer Spin SP513-54N", ALC255_FIXUP_ACER_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1025, 0x142b, "Acer Swift SF314-42", ALC255_FIXUP_ACER_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1025, 0x1430, "Acer TravelMate B311R-31", ALC256_FIXUP_ACER_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1025, 0x1466, "Acer Aspire A515-56", ALC255_FIXUP_ACER_HEADPHONE_AND_MIC),
SND_PCI_QUIRK(0x1025, 0x1534, "Acer Predator PH315-54", ALC255_FIXUP_ACER_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1028, 0x0470, "Dell M101z", ALC269_FIXUP_DELL_M101Z),
SND_PCI_QUIRK(0x1028, 0x053c, "Dell Latitude E5430", ALC292_FIXUP_DELL_E7X),
SND_PCI_QUIRK(0x1028, 0x054b, "Dell XPS one 2710", ALC275_FIXUP_DELL_XPS),
SND_PCI_QUIRK(0x1028, 0x05bd, "Dell Latitude E6440", ALC292_FIXUP_DELL_E7X),
SND_PCI_QUIRK(0x1028, 0x05be, "Dell Latitude E6540", ALC292_FIXUP_DELL_E7X),
SND_PCI_QUIRK(0x1028, 0x05ca, "Dell Latitude E7240", ALC292_FIXUP_DELL_E7X),
SND_PCI_QUIRK(0x1028, 0x05cb, "Dell Latitude E7440", ALC292_FIXUP_DELL_E7X),
SND_PCI_QUIRK(0x1028, 0x05da, "Dell Vostro 5460", ALC290_FIXUP_SUBWOOFER),
SND_PCI_QUIRK(0x1028, 0x05f4, "Dell", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1028, 0x05f5, "Dell", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1028, 0x05f6, "Dell", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1028, 0x0615, "Dell Vostro 5470", ALC290_FIXUP_SUBWOOFER_HSJACK),
SND_PCI_QUIRK(0x1028, 0x0616, "Dell Vostro 5470", ALC290_FIXUP_SUBWOOFER_HSJACK),
SND_PCI_QUIRK(0x1028, 0x062c, "Dell Latitude E5550", ALC292_FIXUP_DELL_E7X),
SND_PCI_QUIRK(0x1028, 0x062e, "Dell Latitude E7450", ALC292_FIXUP_DELL_E7X),
SND_PCI_QUIRK(0x1028, 0x0638, "Dell Inspiron 5439", ALC290_FIXUP_MONO_SPEAKERS_HSJACK),
SND_PCI_QUIRK(0x1028, 0x064a, "Dell", ALC293_FIXUP_DELL1_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1028, 0x064b, "Dell", ALC293_FIXUP_DELL1_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1028, 0x0665, "Dell XPS 13", ALC288_FIXUP_DELL_XPS_13),
SND_PCI_QUIRK(0x1028, 0x0669, "Dell Optiplex 9020m", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1028, 0x069a, "Dell Vostro 5480", ALC290_FIXUP_SUBWOOFER_HSJACK),
SND_PCI_QUIRK(0x1028, 0x06c7, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1028, 0x06d9, "Dell", ALC293_FIXUP_DELL1_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1028, 0x06da, "Dell", ALC293_FIXUP_DELL1_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1028, 0x06db, "Dell", ALC293_FIXUP_DISABLE_AAMIX_MULTIJACK),
SND_PCI_QUIRK(0x1028, 0x06dd, "Dell", ALC293_FIXUP_DISABLE_AAMIX_MULTIJACK),
SND_PCI_QUIRK(0x1028, 0x06de, "Dell", ALC293_FIXUP_DISABLE_AAMIX_MULTIJACK),
SND_PCI_QUIRK(0x1028, 0x06df, "Dell", ALC293_FIXUP_DISABLE_AAMIX_MULTIJACK),
SND_PCI_QUIRK(0x1028, 0x06e0, "Dell", ALC293_FIXUP_DISABLE_AAMIX_MULTIJACK),
SND_PCI_QUIRK(0x1028, 0x0706, "Dell Inspiron 7559", ALC256_FIXUP_DELL_INSPIRON_7559_SUBWOOFER),
SND_PCI_QUIRK(0x1028, 0x0725, "Dell Inspiron 3162", ALC255_FIXUP_DELL_SPK_NOISE),
SND_PCI_QUIRK(0x1028, 0x0738, "Dell Precision 5820", ALC269_FIXUP_NO_SHUTUP),
SND_PCI_QUIRK(0x1028, 0x075c, "Dell XPS 27 7760", ALC298_FIXUP_SPK_VOLUME),
SND_PCI_QUIRK(0x1028, 0x075d, "Dell AIO", ALC298_FIXUP_SPK_VOLUME),
SND_PCI_QUIRK(0x1028, 0x0798, "Dell Inspiron 17 7000 Gaming", ALC256_FIXUP_DELL_INSPIRON_7559_SUBWOOFER),
SND_PCI_QUIRK(0x1028, 0x07b0, "Dell Precision 7520", ALC295_FIXUP_DISABLE_DAC3),
SND_PCI_QUIRK(0x1028, 0x080c, "Dell WYSE", ALC225_FIXUP_DELL_WYSE_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1028, 0x084b, "Dell", ALC274_FIXUP_DELL_AIO_LINEOUT_VERB),
SND_PCI_QUIRK(0x1028, 0x084e, "Dell", ALC274_FIXUP_DELL_AIO_LINEOUT_VERB),
SND_PCI_QUIRK(0x1028, 0x0871, "Dell Precision 3630", ALC255_FIXUP_DELL_HEADSET_MIC),
SND_PCI_QUIRK(0x1028, 0x0872, "Dell Precision 3630", ALC255_FIXUP_DELL_HEADSET_MIC),
SND_PCI_QUIRK(0x1028, 0x0873, "Dell Precision 3930", ALC255_FIXUP_DUMMY_LINEOUT_VERB),
SND_PCI_QUIRK(0x1028, 0x08ad, "Dell WYSE AIO", ALC225_FIXUP_DELL_WYSE_AIO_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1028, 0x08ae, "Dell WYSE NB", ALC225_FIXUP_DELL1_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1028, 0x0935, "Dell", ALC274_FIXUP_DELL_AIO_LINEOUT_VERB),
SND_PCI_QUIRK(0x1028, 0x097d, "Dell Precision", ALC289_FIXUP_DUAL_SPK),
SND_PCI_QUIRK(0x1028, 0x097e, "Dell Precision", ALC289_FIXUP_DUAL_SPK),
SND_PCI_QUIRK(0x1028, 0x098d, "Dell Precision", ALC233_FIXUP_ASUS_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1028, 0x09bf, "Dell Precision", ALC233_FIXUP_ASUS_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1028, 0x0a2e, "Dell", ALC236_FIXUP_DELL_AIO_HEADSET_MIC),
SND_PCI_QUIRK(0x1028, 0x0a30, "Dell", ALC236_FIXUP_DELL_AIO_HEADSET_MIC),
SND_PCI_QUIRK(0x1028, 0x0a38, "Dell Latitude 7520", ALC269_FIXUP_DELL4_MIC_NO_PRESENCE_QUIET),
SND_PCI_QUIRK(0x1028, 0x0a58, "Dell", ALC255_FIXUP_DELL_HEADSET_MIC),
SND_PCI_QUIRK(0x1028, 0x0a61, "Dell XPS 15 9510", ALC289_FIXUP_DUAL_SPK),
SND_PCI_QUIRK(0x1028, 0x0a62, "Dell Precision 5560", ALC289_FIXUP_DUAL_SPK),
SND_PCI_QUIRK(0x1028, 0x0a9d, "Dell Latitude 5430", ALC269_FIXUP_DELL4_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1028, 0x0a9e, "Dell Latitude 5430", ALC269_FIXUP_DELL4_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1028, 0x0b19, "Dell XPS 15 9520", ALC289_FIXUP_DUAL_SPK),
SND_PCI_QUIRK(0x1028, 0x0b1a, "Dell Precision 5570", ALC289_FIXUP_DUAL_SPK),
SND_PCI_QUIRK(0x1028, 0x0b37, "Dell Inspiron 16 Plus 7620 2-in-1", ALC295_FIXUP_DELL_INSPIRON_TOP_SPEAKERS),
SND_PCI_QUIRK(0x1028, 0x0b71, "Dell Inspiron 16 Plus 7620", ALC295_FIXUP_DELL_INSPIRON_TOP_SPEAKERS),
SND_PCI_QUIRK(0x1028, 0x0c03, "Dell Precision 5340", ALC269_FIXUP_DELL4_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1028, 0x0c19, "Dell Precision 3340", ALC236_FIXUP_DELL_DUAL_CODECS),
SND_PCI_QUIRK(0x1028, 0x0c1a, "Dell Precision 3340", ALC236_FIXUP_DELL_DUAL_CODECS),
SND_PCI_QUIRK(0x1028, 0x0c1b, "Dell Precision 3440", ALC236_FIXUP_DELL_DUAL_CODECS),
SND_PCI_QUIRK(0x1028, 0x0c1c, "Dell Precision 3540", ALC236_FIXUP_DELL_DUAL_CODECS),
SND_PCI_QUIRK(0x1028, 0x0c1d, "Dell Precision 3440", ALC236_FIXUP_DELL_DUAL_CODECS),
SND_PCI_QUIRK(0x1028, 0x0c1e, "Dell Precision 3540", ALC236_FIXUP_DELL_DUAL_CODECS),
SND_PCI_QUIRK(0x1028, 0x0cbd, "Dell Oasis 13 CS MTL-U", ALC245_FIXUP_CS35L41_SPI_2),
SND_PCI_QUIRK(0x1028, 0x0cbe, "Dell Oasis 13 2-IN-1 MTL-U", ALC245_FIXUP_CS35L41_SPI_2),
SND_PCI_QUIRK(0x1028, 0x0cbf, "Dell Oasis 13 Low Weight MTU-L", ALC245_FIXUP_CS35L41_SPI_2),
SND_PCI_QUIRK(0x1028, 0x0cc1, "Dell Oasis 14 MTL-H/U", ALC245_FIXUP_CS35L41_SPI_2),
SND_PCI_QUIRK(0x1028, 0x0cc2, "Dell Oasis 14 2-in-1 MTL-H/U", ALC245_FIXUP_CS35L41_SPI_2),
SND_PCI_QUIRK(0x1028, 0x0cc3, "Dell Oasis 14 Low Weight MTL-U", ALC245_FIXUP_CS35L41_SPI_2),
SND_PCI_QUIRK(0x1028, 0x0cc4, "Dell Oasis 16 MTL-H/U", ALC245_FIXUP_CS35L41_SPI_2),
SND_PCI_QUIRK(0x1028, 0x164a, "Dell", ALC293_FIXUP_DELL1_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1028, 0x164b, "Dell", ALC293_FIXUP_DELL1_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x103c, 0x1586, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC2),
SND_PCI_QUIRK(0x103c, 0x18e6, "HP", ALC269_FIXUP_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x218b, "HP", ALC269_FIXUP_LIMIT_INT_MIC_BOOST_MUTE_LED),
SND_PCI_QUIRK(0x103c, 0x21f9, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1),
SND_PCI_QUIRK(0x103c, 0x2210, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1),
SND_PCI_QUIRK(0x103c, 0x2214, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1),
SND_PCI_QUIRK(0x103c, 0x221b, "HP", ALC269_FIXUP_HP_GPIO_MIC1_LED),
SND_PCI_QUIRK(0x103c, 0x221c, "HP EliteBook 755 G2", ALC280_FIXUP_HP_HEADSET_MIC),
SND_PCI_QUIRK(0x103c, 0x2221, "HP", ALC269_FIXUP_HP_GPIO_MIC1_LED),
SND_PCI_QUIRK(0x103c, 0x2225, "HP", ALC269_FIXUP_HP_GPIO_MIC1_LED),
SND_PCI_QUIRK(0x103c, 0x2236, "HP", ALC269_FIXUP_HP_LINE1_MIC1_LED),
SND_PCI_QUIRK(0x103c, 0x2237, "HP", ALC269_FIXUP_HP_LINE1_MIC1_LED),
SND_PCI_QUIRK(0x103c, 0x2238, "HP", ALC269_FIXUP_HP_LINE1_MIC1_LED),
SND_PCI_QUIRK(0x103c, 0x2239, "HP", ALC269_FIXUP_HP_LINE1_MIC1_LED),
SND_PCI_QUIRK(0x103c, 0x224b, "HP", ALC269_FIXUP_HP_LINE1_MIC1_LED),
SND_PCI_QUIRK(0x103c, 0x2253, "HP", ALC269_FIXUP_HP_GPIO_MIC1_LED),
SND_PCI_QUIRK(0x103c, 0x2254, "HP", ALC269_FIXUP_HP_GPIO_MIC1_LED),
SND_PCI_QUIRK(0x103c, 0x2255, "HP", ALC269_FIXUP_HP_GPIO_MIC1_LED),
SND_PCI_QUIRK(0x103c, 0x2256, "HP", ALC269_FIXUP_HP_GPIO_MIC1_LED),
SND_PCI_QUIRK(0x103c, 0x2257, "HP", ALC269_FIXUP_HP_GPIO_MIC1_LED),
SND_PCI_QUIRK(0x103c, 0x2259, "HP", ALC269_FIXUP_HP_GPIO_MIC1_LED),
SND_PCI_QUIRK(0x103c, 0x225a, "HP", ALC269_FIXUP_HP_DOCK_GPIO_MIC1_LED),
SND_PCI_QUIRK(0x103c, 0x225f, "HP", ALC280_FIXUP_HP_GPIO2_MIC_HOTKEY),
SND_PCI_QUIRK(0x103c, 0x2260, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1),
SND_PCI_QUIRK(0x103c, 0x2263, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1),
SND_PCI_QUIRK(0x103c, 0x2264, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1),
SND_PCI_QUIRK(0x103c, 0x2265, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1),
SND_PCI_QUIRK(0x103c, 0x2268, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1),
SND_PCI_QUIRK(0x103c, 0x226a, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1),
SND_PCI_QUIRK(0x103c, 0x226b, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1),
SND_PCI_QUIRK(0x103c, 0x226e, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1),
SND_PCI_QUIRK(0x103c, 0x2271, "HP", ALC286_FIXUP_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x2272, "HP", ALC269_FIXUP_HP_GPIO_MIC1_LED),
SND_PCI_QUIRK(0x103c, 0x2272, "HP", ALC280_FIXUP_HP_DOCK_PINS),
SND_PCI_QUIRK(0x103c, 0x2273, "HP", ALC269_FIXUP_HP_GPIO_MIC1_LED),
SND_PCI_QUIRK(0x103c, 0x2273, "HP", ALC280_FIXUP_HP_DOCK_PINS),
SND_PCI_QUIRK(0x103c, 0x2278, "HP", ALC269_FIXUP_HP_GPIO_MIC1_LED),
SND_PCI_QUIRK(0x103c, 0x227f, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1),
SND_PCI_QUIRK(0x103c, 0x2282, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1),
SND_PCI_QUIRK(0x103c, 0x228b, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1),
SND_PCI_QUIRK(0x103c, 0x228e, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1),
SND_PCI_QUIRK(0x103c, 0x229e, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1),
SND_PCI_QUIRK(0x103c, 0x22b2, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1),
SND_PCI_QUIRK(0x103c, 0x22b7, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1),
SND_PCI_QUIRK(0x103c, 0x22bf, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1),
SND_PCI_QUIRK(0x103c, 0x22c4, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1),
SND_PCI_QUIRK(0x103c, 0x22c5, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1),
SND_PCI_QUIRK(0x103c, 0x22c7, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1),
SND_PCI_QUIRK(0x103c, 0x22c8, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1),
SND_PCI_QUIRK(0x103c, 0x22cf, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1),
SND_PCI_QUIRK(0x103c, 0x22db, "HP", ALC280_FIXUP_HP_9480M),
SND_PCI_QUIRK(0x103c, 0x22dc, "HP", ALC269_FIXUP_HP_GPIO_MIC1_LED),
SND_PCI_QUIRK(0x103c, 0x22fb, "HP", ALC269_FIXUP_HP_GPIO_MIC1_LED),
SND_PCI_QUIRK(0x103c, 0x2334, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1),
SND_PCI_QUIRK(0x103c, 0x2335, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1),
SND_PCI_QUIRK(0x103c, 0x2336, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1),
SND_PCI_QUIRK(0x103c, 0x2337, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1),
SND_PCI_QUIRK(0x103c, 0x2b5e, "HP 288 Pro G2 MT", ALC221_FIXUP_HP_288PRO_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x103c, 0x802e, "HP Z240 SFF", ALC221_FIXUP_HP_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x103c, 0x802f, "HP Z240", ALC221_FIXUP_HP_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x103c, 0x8077, "HP", ALC256_FIXUP_HP_HEADSET_MIC),
SND_PCI_QUIRK(0x103c, 0x8158, "HP", ALC256_FIXUP_HP_HEADSET_MIC),
SND_PCI_QUIRK(0x103c, 0x820d, "HP Pavilion 15", ALC295_FIXUP_HP_X360),
SND_PCI_QUIRK(0x103c, 0x8256, "HP", ALC221_FIXUP_HP_FRONT_MIC),
SND_PCI_QUIRK(0x103c, 0x827e, "HP x360", ALC295_FIXUP_HP_X360),
SND_PCI_QUIRK(0x103c, 0x827f, "HP x360", ALC269_FIXUP_HP_MUTE_LED_MIC3),
SND_PCI_QUIRK(0x103c, 0x82bf, "HP G3 mini", ALC221_FIXUP_HP_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x103c, 0x82c0, "HP G3 mini premium", ALC221_FIXUP_HP_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x103c, 0x83b9, "HP Spectre x360", ALC269_FIXUP_HP_MUTE_LED_MIC3),
SND_PCI_QUIRK(0x103c, 0x841c, "HP Pavilion 15-CK0xx", ALC269_FIXUP_HP_MUTE_LED_MIC3),
SND_PCI_QUIRK(0x103c, 0x8497, "HP Envy x360", ALC269_FIXUP_HP_MUTE_LED_MIC3),
SND_PCI_QUIRK(0x103c, 0x84da, "HP OMEN dc0019-ur", ALC295_FIXUP_HP_OMEN),
SND_PCI_QUIRK(0x103c, 0x84e7, "HP Pavilion 15", ALC269_FIXUP_HP_MUTE_LED_MIC3),
SND_PCI_QUIRK(0x103c, 0x8519, "HP Spectre x360 15-df0xxx", ALC285_FIXUP_HP_SPECTRE_X360),
SND_PCI_QUIRK(0x103c, 0x860f, "HP ZBook 15 G6", ALC285_FIXUP_HP_GPIO_AMP_INIT),
SND_PCI_QUIRK(0x103c, 0x861f, "HP Elite Dragonfly G1", ALC285_FIXUP_HP_GPIO_AMP_INIT),
SND_PCI_QUIRK(0x103c, 0x869d, "HP", ALC236_FIXUP_HP_MUTE_LED),
SND_PCI_QUIRK(0x103c, 0x86c7, "HP Envy AiO 32", ALC274_FIXUP_HP_ENVY_GPIO),
SND_PCI_QUIRK(0x103c, 0x86e7, "HP Spectre x360 15-eb0xxx", ALC285_FIXUP_HP_SPECTRE_X360_EB1),
SND_PCI_QUIRK(0x103c, 0x86e8, "HP Spectre x360 15-eb0xxx", ALC285_FIXUP_HP_SPECTRE_X360_EB1),
SND_PCI_QUIRK(0x103c, 0x86f9, "HP Spectre x360 13-aw0xxx", ALC285_FIXUP_HP_SPECTRE_X360_MUTE_LED),
SND_PCI_QUIRK(0x103c, 0x8716, "HP Elite Dragonfly G2 Notebook PC", ALC285_FIXUP_HP_GPIO_AMP_INIT),
SND_PCI_QUIRK(0x103c, 0x8720, "HP EliteBook x360 1040 G8 Notebook PC", ALC285_FIXUP_HP_GPIO_AMP_INIT),
SND_PCI_QUIRK(0x103c, 0x8724, "HP EliteBook 850 G7", ALC285_FIXUP_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8728, "HP EliteBook 840 G7", ALC285_FIXUP_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8729, "HP", ALC285_FIXUP_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8730, "HP ProBook 445 G7", ALC236_FIXUP_HP_MUTE_LED_MICMUTE_VREF),
SND_PCI_QUIRK(0x103c, 0x8735, "HP ProBook 435 G7", ALC236_FIXUP_HP_MUTE_LED_MICMUTE_VREF),
SND_PCI_QUIRK(0x103c, 0x8736, "HP", ALC285_FIXUP_HP_GPIO_AMP_INIT),
SND_PCI_QUIRK(0x103c, 0x8760, "HP", ALC285_FIXUP_HP_MUTE_LED),
SND_PCI_QUIRK(0x103c, 0x877a, "HP", ALC285_FIXUP_HP_MUTE_LED),
SND_PCI_QUIRK(0x103c, 0x877d, "HP", ALC236_FIXUP_HP_MUTE_LED),
SND_PCI_QUIRK(0x103c, 0x8780, "HP ZBook Fury 17 G7 Mobile Workstation",
ALC285_FIXUP_HP_GPIO_AMP_INIT),
SND_PCI_QUIRK(0x103c, 0x8783, "HP ZBook Fury 15 G7 Mobile Workstation",
ALC285_FIXUP_HP_GPIO_AMP_INIT),
SND_PCI_QUIRK(0x103c, 0x8786, "HP OMEN 15", ALC285_FIXUP_HP_MUTE_LED),
SND_PCI_QUIRK(0x103c, 0x8787, "HP OMEN 15", ALC285_FIXUP_HP_MUTE_LED),
SND_PCI_QUIRK(0x103c, 0x8788, "HP OMEN 15", ALC285_FIXUP_HP_MUTE_LED),
SND_PCI_QUIRK(0x103c, 0x87c8, "HP", ALC287_FIXUP_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x87e5, "HP ProBook 440 G8 Notebook PC", ALC236_FIXUP_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x87e7, "HP ProBook 450 G8 Notebook PC", ALC236_FIXUP_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x87f1, "HP ProBook 630 G8 Notebook PC", ALC236_FIXUP_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x87f2, "HP ProBook 640 G8 Notebook PC", ALC236_FIXUP_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x87f4, "HP", ALC287_FIXUP_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x87f5, "HP", ALC287_FIXUP_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x87f6, "HP Spectre x360 14", ALC245_FIXUP_HP_X360_AMP),
SND_PCI_QUIRK(0x103c, 0x87f7, "HP Spectre x360 14", ALC245_FIXUP_HP_X360_AMP),
SND_PCI_QUIRK(0x103c, 0x8805, "HP ProBook 650 G8 Notebook PC", ALC236_FIXUP_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x880d, "HP EliteBook 830 G8 Notebook PC", ALC285_FIXUP_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8811, "HP Spectre x360 15-eb1xxx", ALC285_FIXUP_HP_SPECTRE_X360_EB1),
SND_PCI_QUIRK(0x103c, 0x8812, "HP Spectre x360 15-eb1xxx", ALC285_FIXUP_HP_SPECTRE_X360_EB1),
SND_PCI_QUIRK(0x103c, 0x881d, "HP 250 G8 Notebook PC", ALC236_FIXUP_HP_MUTE_LED_COEFBIT2),
SND_PCI_QUIRK(0x103c, 0x8846, "HP EliteBook 850 G8 Notebook PC", ALC285_FIXUP_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8847, "HP EliteBook x360 830 G8 Notebook PC", ALC285_FIXUP_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x884b, "HP EliteBook 840 Aero G8 Notebook PC", ALC285_FIXUP_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x884c, "HP EliteBook 840 G8 Notebook PC", ALC285_FIXUP_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8862, "HP ProBook 445 G8 Notebook PC", ALC236_FIXUP_HP_LIMIT_INT_MIC_BOOST),
SND_PCI_QUIRK(0x103c, 0x8863, "HP ProBook 445 G8 Notebook PC", ALC236_FIXUP_HP_LIMIT_INT_MIC_BOOST),
SND_PCI_QUIRK(0x103c, 0x886d, "HP ZBook Fury 17.3 Inch G8 Mobile Workstation PC", ALC285_FIXUP_HP_GPIO_AMP_INIT),
SND_PCI_QUIRK(0x103c, 0x8870, "HP ZBook Fury 15.6 Inch G8 Mobile Workstation PC", ALC285_FIXUP_HP_GPIO_AMP_INIT),
SND_PCI_QUIRK(0x103c, 0x8873, "HP ZBook Studio 15.6 Inch G8 Mobile Workstation PC", ALC285_FIXUP_HP_GPIO_AMP_INIT),
SND_PCI_QUIRK(0x103c, 0x887a, "HP Laptop 15s-eq2xxx", ALC236_FIXUP_HP_MUTE_LED_COEFBIT2),
SND_PCI_QUIRK(0x103c, 0x888a, "HP ENVY x360 Convertible 15-eu0xxx", ALC245_FIXUP_HP_X360_MUTE_LEDS),
SND_PCI_QUIRK(0x103c, 0x888d, "HP ZBook Power 15.6 inch G8 Mobile Workstation PC", ALC236_FIXUP_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8895, "HP EliteBook 855 G8 Notebook PC", ALC285_FIXUP_HP_SPEAKERS_MICMUTE_LED),
SND_PCI_QUIRK(0x103c, 0x8896, "HP EliteBook 855 G8 Notebook PC", ALC285_FIXUP_HP_MUTE_LED),
SND_PCI_QUIRK(0x103c, 0x8898, "HP EliteBook 845 G8 Notebook PC", ALC285_FIXUP_HP_LIMIT_INT_MIC_BOOST),
SND_PCI_QUIRK(0x103c, 0x88d0, "HP Pavilion 15-eh1xxx (mainboard 88D0)", ALC287_FIXUP_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8902, "HP OMEN 16", ALC285_FIXUP_HP_MUTE_LED),
SND_PCI_QUIRK(0x103c, 0x8919, "HP Pavilion Aero Laptop 13-be0xxx", ALC287_FIXUP_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x896d, "HP ZBook Firefly 16 G9", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x896e, "HP EliteBook x360 830 G9", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8971, "HP EliteBook 830 G9", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8972, "HP EliteBook 840 G9", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8973, "HP EliteBook 860 G9", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8974, "HP EliteBook 840 Aero G9", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8975, "HP EliteBook x360 840 Aero G9", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8981, "HP Elite Dragonfly G3", ALC245_FIXUP_CS35L41_SPI_4),
SND_PCI_QUIRK(0x103c, 0x898e, "HP EliteBook 835 G9", ALC287_FIXUP_CS35L41_I2C_2),
SND_PCI_QUIRK(0x103c, 0x898f, "HP EliteBook 835 G9", ALC287_FIXUP_CS35L41_I2C_2),
SND_PCI_QUIRK(0x103c, 0x8991, "HP EliteBook 845 G9", ALC287_FIXUP_CS35L41_I2C_2_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8992, "HP EliteBook 845 G9", ALC287_FIXUP_CS35L41_I2C_2),
SND_PCI_QUIRK(0x103c, 0x8994, "HP EliteBook 855 G9", ALC287_FIXUP_CS35L41_I2C_2_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8995, "HP EliteBook 855 G9", ALC287_FIXUP_CS35L41_I2C_2),
SND_PCI_QUIRK(0x103c, 0x89a4, "HP ProBook 440 G9", ALC236_FIXUP_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x89a6, "HP ProBook 450 G9", ALC236_FIXUP_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x89aa, "HP EliteBook 630 G9", ALC236_FIXUP_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x89ac, "HP EliteBook 640 G9", ALC236_FIXUP_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x89ae, "HP EliteBook 650 G9", ALC236_FIXUP_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x89c0, "HP ZBook Power 15.6 G9", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x89c3, "Zbook Studio G9", ALC245_FIXUP_CS35L41_SPI_4_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x89c6, "Zbook Fury 17 G9", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x89ca, "HP", ALC236_FIXUP_HP_MUTE_LED_MICMUTE_VREF),
SND_PCI_QUIRK(0x103c, 0x89d3, "HP EliteBook 645 G9 (MB 89D2)", ALC236_FIXUP_HP_MUTE_LED_MICMUTE_VREF),
SND_PCI_QUIRK(0x103c, 0x8a25, "HP Victus 16-d1xxx (MB 8A25)", ALC245_FIXUP_HP_MUTE_LED_COEFBIT),
SND_PCI_QUIRK(0x103c, 0x8a78, "HP Dev One", ALC285_FIXUP_HP_LIMIT_INT_MIC_BOOST),
SND_PCI_QUIRK(0x103c, 0x8aa0, "HP ProBook 440 G9 (MB 8A9E)", ALC236_FIXUP_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8aa3, "HP ProBook 450 G9 (MB 8AA1)", ALC236_FIXUP_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8aa8, "HP EliteBook 640 G9 (MB 8AA6)", ALC236_FIXUP_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8aab, "HP EliteBook 650 G9 (MB 8AA9)", ALC236_FIXUP_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8abb, "HP ZBook Firefly 14 G9", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8ad1, "HP EliteBook 840 14 inch G9 Notebook PC", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8ad2, "HP EliteBook 860 16 inch G9 Notebook PC", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8b42, "HP", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8b43, "HP", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8b44, "HP", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8b45, "HP", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8b46, "HP", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8b47, "HP", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8b5d, "HP", ALC236_FIXUP_HP_MUTE_LED_MICMUTE_VREF),
SND_PCI_QUIRK(0x103c, 0x8b5e, "HP", ALC236_FIXUP_HP_MUTE_LED_MICMUTE_VREF),
SND_PCI_QUIRK(0x103c, 0x8b63, "HP Elite Dragonfly 13.5 inch G4", ALC245_FIXUP_CS35L41_SPI_4_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8b65, "HP ProBook 455 15.6 inch G10 Notebook PC", ALC236_FIXUP_HP_MUTE_LED_MICMUTE_VREF),
SND_PCI_QUIRK(0x103c, 0x8b66, "HP", ALC236_FIXUP_HP_MUTE_LED_MICMUTE_VREF),
SND_PCI_QUIRK(0x103c, 0x8b70, "HP EliteBook 835 G10", ALC287_FIXUP_CS35L41_I2C_2_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8b72, "HP EliteBook 845 G10", ALC287_FIXUP_CS35L41_I2C_2_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8b74, "HP EliteBook 845W G10", ALC287_FIXUP_CS35L41_I2C_2_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8b77, "HP ElieBook 865 G10", ALC287_FIXUP_CS35L41_I2C_2),
SND_PCI_QUIRK(0x103c, 0x8b7a, "HP", ALC236_FIXUP_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8b7d, "HP", ALC236_FIXUP_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8b87, "HP", ALC236_FIXUP_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8b8a, "HP", ALC236_FIXUP_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8b8b, "HP", ALC236_FIXUP_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8b8d, "HP", ALC236_FIXUP_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8b8f, "HP", ALC245_FIXUP_CS35L41_SPI_4_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8b92, "HP", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8b96, "HP", ALC236_FIXUP_HP_MUTE_LED_MICMUTE_VREF),
SND_PCI_QUIRK(0x103c, 0x8b97, "HP", ALC236_FIXUP_HP_MUTE_LED_MICMUTE_VREF),
SND_PCI_QUIRK(0x103c, 0x8bf0, "HP", ALC236_FIXUP_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8c46, "HP EliteBook 830 G11", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8c47, "HP EliteBook 840 G11", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8c48, "HP EliteBook 860 G11", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8c49, "HP Elite x360 830 2-in-1 G11", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8c70, "HP EliteBook 835 G11", ALC287_FIXUP_CS35L41_I2C_2_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8c71, "HP EliteBook 845 G11", ALC287_FIXUP_CS35L41_I2C_2_HP_GPIO_LED),
SND_PCI_QUIRK(0x103c, 0x8c72, "HP EliteBook 865 G11", ALC287_FIXUP_CS35L41_I2C_2_HP_GPIO_LED),
SND_PCI_QUIRK(0x1043, 0x103e, "ASUS X540SA", ALC256_FIXUP_ASUS_MIC),
SND_PCI_QUIRK(0x1043, 0x103f, "ASUS TX300", ALC282_FIXUP_ASUS_TX300),
SND_PCI_QUIRK(0x1043, 0x106d, "Asus K53BE", ALC269_FIXUP_LIMIT_INT_MIC_BOOST),
SND_PCI_QUIRK(0x1043, 0x10a1, "ASUS UX391UA", ALC294_FIXUP_ASUS_SPK),
SND_PCI_QUIRK(0x1043, 0x10c0, "ASUS X540SA", ALC256_FIXUP_ASUS_MIC),
SND_PCI_QUIRK(0x1043, 0x10d0, "ASUS X540LA/X540LJ", ALC255_FIXUP_ASUS_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1043, 0x115d, "Asus 1015E", ALC269_FIXUP_LIMIT_INT_MIC_BOOST),
SND_PCI_QUIRK(0x1043, 0x11c0, "ASUS X556UR", ALC255_FIXUP_ASUS_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1043, 0x125e, "ASUS Q524UQK", ALC255_FIXUP_ASUS_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1043, 0x1271, "ASUS X430UN", ALC256_FIXUP_ASUS_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1043, 0x1290, "ASUS X441SA", ALC233_FIXUP_EAPD_COEF_AND_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1043, 0x12a0, "ASUS X441UV", ALC233_FIXUP_EAPD_COEF_AND_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1043, 0x12a3, "Asus N7691ZM", ALC269_FIXUP_ASUS_N7601ZM),
SND_PCI_QUIRK(0x1043, 0x12af, "ASUS UX582ZS", ALC245_FIXUP_CS35L41_SPI_2),
SND_PCI_QUIRK(0x1043, 0x12e0, "ASUS X541SA", ALC256_FIXUP_ASUS_MIC),
SND_PCI_QUIRK(0x1043, 0x12f0, "ASUS X541UV", ALC256_FIXUP_ASUS_MIC),
SND_PCI_QUIRK(0x1043, 0x1313, "Asus K42JZ", ALC269VB_FIXUP_ASUS_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1043, 0x13b0, "ASUS Z550SA", ALC256_FIXUP_ASUS_MIC),
SND_PCI_QUIRK(0x1043, 0x1427, "Asus Zenbook UX31E", ALC269VB_FIXUP_ASUS_ZENBOOK),
SND_PCI_QUIRK(0x1043, 0x1433, "ASUS GX650P", ALC285_FIXUP_ASUS_I2C_HEADSET_MIC),
SND_PCI_QUIRK(0x1043, 0x1463, "Asus GA402X", ALC285_FIXUP_ASUS_I2C_HEADSET_MIC),
SND_PCI_QUIRK(0x1043, 0x1473, "ASUS GU604V", ALC285_FIXUP_ASUS_HEADSET_MIC),
SND_PCI_QUIRK(0x1043, 0x1483, "ASUS GU603V", ALC285_FIXUP_ASUS_HEADSET_MIC),
SND_PCI_QUIRK(0x1043, 0x1493, "ASUS GV601V", ALC285_FIXUP_ASUS_HEADSET_MIC),
SND_PCI_QUIRK(0x1043, 0x1517, "Asus Zenbook UX31A", ALC269VB_FIXUP_ASUS_ZENBOOK_UX31A),
SND_PCI_QUIRK(0x1043, 0x1573, "ASUS GZ301V", ALC285_FIXUP_ASUS_HEADSET_MIC),
SND_PCI_QUIRK(0x1043, 0x1662, "ASUS GV301QH", ALC294_FIXUP_ASUS_DUAL_SPK),
SND_PCI_QUIRK(0x1043, 0x1683, "ASUS UM3402YAR", ALC287_FIXUP_CS35L41_I2C_2),
SND_PCI_QUIRK(0x1043, 0x16b2, "ASUS GU603", ALC289_FIXUP_ASUS_GA401),
SND_PCI_QUIRK(0x1043, 0x16e3, "ASUS UX50", ALC269_FIXUP_STEREO_DMIC),
SND_PCI_QUIRK(0x1043, 0x1740, "ASUS UX430UA", ALC295_FIXUP_ASUS_DACS),
SND_PCI_QUIRK(0x1043, 0x17d1, "ASUS UX431FL", ALC294_FIXUP_ASUS_DUAL_SPK),
SND_PCI_QUIRK(0x1043, 0x17f3, "ROG Ally RC71L_RC71L", ALC294_FIXUP_ASUS_ALLY),
SND_PCI_QUIRK(0x1043, 0x1881, "ASUS Zephyrus S/M", ALC294_FIXUP_ASUS_GX502_PINS),
SND_PCI_QUIRK(0x1043, 0x18b1, "Asus MJ401TA", ALC256_FIXUP_ASUS_HEADSET_MIC),
SND_PCI_QUIRK(0x1043, 0x18f1, "Asus FX505DT", ALC256_FIXUP_ASUS_HEADSET_MIC),
SND_PCI_QUIRK(0x1043, 0x194e, "ASUS UX563FD", ALC294_FIXUP_ASUS_HPE),
SND_PCI_QUIRK(0x1043, 0x1970, "ASUS UX550VE", ALC289_FIXUP_ASUS_GA401),
SND_PCI_QUIRK(0x1043, 0x1982, "ASUS B1400CEPE", ALC256_FIXUP_ASUS_HPE),
SND_PCI_QUIRK(0x1043, 0x19ce, "ASUS B9450FA", ALC294_FIXUP_ASUS_HPE),
SND_PCI_QUIRK(0x1043, 0x19e1, "ASUS UX581LV", ALC295_FIXUP_ASUS_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1043, 0x1a13, "Asus G73Jw", ALC269_FIXUP_ASUS_G73JW),
SND_PCI_QUIRK(0x1043, 0x1a30, "ASUS X705UD", ALC256_FIXUP_ASUS_MIC),
SND_PCI_QUIRK(0x1043, 0x1a8f, "ASUS UX582ZS", ALC245_FIXUP_CS35L41_SPI_2),
SND_PCI_QUIRK(0x1043, 0x1b11, "ASUS UX431DA", ALC294_FIXUP_ASUS_COEF_1B),
SND_PCI_QUIRK(0x1043, 0x1b13, "Asus U41SV", ALC269_FIXUP_INV_DMIC),
SND_PCI_QUIRK(0x1043, 0x1b93, "ASUS G614JVR/JIR", ALC245_FIXUP_CS35L41_SPI_2),
SND_PCI_QUIRK(0x1043, 0x1bbd, "ASUS Z550MA", ALC255_FIXUP_ASUS_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1043, 0x1c23, "Asus X55U", ALC269_FIXUP_LIMIT_INT_MIC_BOOST),
SND_PCI_QUIRK(0x1043, 0x1c62, "ASUS GU603", ALC289_FIXUP_ASUS_GA401),
SND_PCI_QUIRK(0x1043, 0x1c92, "ASUS ROG Strix G15", ALC285_FIXUP_ASUS_G533Z_PINS),
SND_PCI_QUIRK(0x1043, 0x1c9f, "ASUS G614JI", ALC285_FIXUP_ASUS_HEADSET_MIC),
SND_PCI_QUIRK(0x1043, 0x1caf, "ASUS G634JYR/JZR", ALC285_FIXUP_ASUS_SPI_REAR_SPEAKERS),
SND_PCI_QUIRK(0x1043, 0x1ccd, "ASUS X555UB", ALC256_FIXUP_ASUS_MIC),
SND_PCI_QUIRK(0x1043, 0x1d1f, "ASUS ROG Strix G17 2023 (G713PV)", ALC287_FIXUP_CS35L41_I2C_2),
SND_PCI_QUIRK(0x1043, 0x1d42, "ASUS Zephyrus G14 2022", ALC289_FIXUP_ASUS_GA401),
SND_PCI_QUIRK(0x1043, 0x1d4e, "ASUS TM420", ALC256_FIXUP_ASUS_HPE),
SND_PCI_QUIRK(0x1043, 0x1e02, "ASUS UX3402ZA", ALC245_FIXUP_CS35L41_SPI_2),
SND_PCI_QUIRK(0x1043, 0x16a3, "ASUS UX3402VA", ALC245_FIXUP_CS35L41_SPI_2),
SND_PCI_QUIRK(0x1043, 0x1e11, "ASUS Zephyrus G15", ALC289_FIXUP_ASUS_GA502),
SND_PCI_QUIRK(0x1043, 0x1e12, "ASUS UM3402", ALC287_FIXUP_CS35L41_I2C_2),
SND_PCI_QUIRK(0x1043, 0x1e51, "ASUS Zephyrus M15", ALC294_FIXUP_ASUS_GU502_PINS),
SND_PCI_QUIRK(0x1043, 0x1e5e, "ASUS ROG Strix G513", ALC294_FIXUP_ASUS_G513_PINS),
SND_PCI_QUIRK(0x1043, 0x1e8e, "ASUS Zephyrus G15", ALC289_FIXUP_ASUS_GA401),
SND_PCI_QUIRK(0x1043, 0x1c52, "ASUS Zephyrus G15 2022", ALC289_FIXUP_ASUS_GA401),
SND_PCI_QUIRK(0x1043, 0x1f11, "ASUS Zephyrus G14", ALC289_FIXUP_ASUS_GA401),
SND_PCI_QUIRK(0x1043, 0x1f12, "ASUS UM5302", ALC287_FIXUP_CS35L41_I2C_2),
SND_PCI_QUIRK(0x1043, 0x1f92, "ASUS ROG Flow X16", ALC289_FIXUP_ASUS_GA401),
SND_PCI_QUIRK(0x1043, 0x3030, "ASUS ZN270IE", ALC256_FIXUP_ASUS_AIO_GPIO2),
SND_PCI_QUIRK(0x1043, 0x3a20, "ASUS G614JZR", ALC245_FIXUP_CS35L41_SPI_2),
SND_PCI_QUIRK(0x1043, 0x3a30, "ASUS G814JVR/JIR", ALC245_FIXUP_CS35L41_SPI_2),
SND_PCI_QUIRK(0x1043, 0x3a40, "ASUS G814JZR", ALC245_FIXUP_CS35L41_SPI_2),
SND_PCI_QUIRK(0x1043, 0x3a50, "ASUS G834JYR/JZR", ALC245_FIXUP_CS35L41_SPI_2),
SND_PCI_QUIRK(0x1043, 0x3a60, "ASUS G634JYR/JZR", ALC245_FIXUP_CS35L41_SPI_2),
SND_PCI_QUIRK(0x1043, 0x831a, "ASUS P901", ALC269_FIXUP_STEREO_DMIC),
SND_PCI_QUIRK(0x1043, 0x834a, "ASUS S101", ALC269_FIXUP_STEREO_DMIC),
SND_PCI_QUIRK(0x1043, 0x8398, "ASUS P1005", ALC269_FIXUP_STEREO_DMIC),
SND_PCI_QUIRK(0x1043, 0x83ce, "ASUS P1005", ALC269_FIXUP_STEREO_DMIC),
SND_PCI_QUIRK(0x1043, 0x8516, "ASUS X101CH", ALC269_FIXUP_ASUS_X101),
SND_PCI_QUIRK(0x104d, 0x9073, "Sony VAIO", ALC275_FIXUP_SONY_VAIO_GPIO2),
SND_PCI_QUIRK(0x104d, 0x907b, "Sony VAIO", ALC275_FIXUP_SONY_HWEQ),
SND_PCI_QUIRK(0x104d, 0x9084, "Sony VAIO", ALC275_FIXUP_SONY_HWEQ),
SND_PCI_QUIRK(0x104d, 0x9099, "Sony VAIO S13", ALC275_FIXUP_SONY_DISABLE_AAMIX),
SND_PCI_QUIRK(0x104d, 0x90b5, "Sony VAIO Pro 11", ALC286_FIXUP_SONY_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x104d, 0x90b6, "Sony VAIO Pro 13", ALC286_FIXUP_SONY_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x10cf, 0x1475, "Lifebook", ALC269_FIXUP_LIFEBOOK),
SND_PCI_QUIRK(0x10cf, 0x159f, "Lifebook E780", ALC269_FIXUP_LIFEBOOK_NO_HP_TO_LINEOUT),
SND_PCI_QUIRK(0x10cf, 0x15dc, "Lifebook T731", ALC269_FIXUP_LIFEBOOK_HP_PIN),
SND_PCI_QUIRK(0x10cf, 0x1629, "Lifebook U7x7", ALC255_FIXUP_LIFEBOOK_U7x7_HEADSET_MIC),
SND_PCI_QUIRK(0x10cf, 0x1757, "Lifebook E752", ALC269_FIXUP_LIFEBOOK_HP_PIN),
SND_PCI_QUIRK(0x10cf, 0x1845, "Lifebook U904", ALC269_FIXUP_LIFEBOOK_EXTMIC),
SND_PCI_QUIRK(0x10ec, 0x10f2, "Intel Reference board", ALC700_FIXUP_INTEL_REFERENCE),
SND_PCI_QUIRK(0x10ec, 0x118c, "Medion EE4254 MD62100", ALC256_FIXUP_MEDION_HEADSET_NO_PRESENCE),
SND_PCI_QUIRK(0x10ec, 0x1230, "Intel Reference board", ALC295_FIXUP_CHROME_BOOK),
SND_PCI_QUIRK(0x10ec, 0x124c, "Intel Reference board", ALC295_FIXUP_CHROME_BOOK),
SND_PCI_QUIRK(0x10ec, 0x1252, "Intel Reference board", ALC295_FIXUP_CHROME_BOOK),
SND_PCI_QUIRK(0x10ec, 0x1254, "Intel Reference board", ALC295_FIXUP_CHROME_BOOK),
SND_PCI_QUIRK(0x10ec, 0x12cc, "Intel Reference board", ALC225_FIXUP_HEADSET_JACK),
SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-SZ6", ALC269_FIXUP_HEADSET_MODE),
SND_PCI_QUIRK(0x144d, 0xc109, "Samsung Ativ book 9 (NP900X3G)", ALC269_FIXUP_INV_DMIC),
SND_PCI_QUIRK(0x144d, 0xc169, "Samsung Notebook 9 Pen (NP930SBE-K01US)", ALC298_FIXUP_SAMSUNG_AMP),
SND_PCI_QUIRK(0x144d, 0xc176, "Samsung Notebook 9 Pro (NP930MBE-K04US)", ALC298_FIXUP_SAMSUNG_AMP),
SND_PCI_QUIRK(0x144d, 0xc189, "Samsung Galaxy Flex Book (NT950QCG-X716)", ALC298_FIXUP_SAMSUNG_AMP),
SND_PCI_QUIRK(0x144d, 0xc18a, "Samsung Galaxy Book Ion (NP930XCJ-K01US)", ALC298_FIXUP_SAMSUNG_AMP),
SND_PCI_QUIRK(0x144d, 0xc1a3, "Samsung Galaxy Book Pro (NP935XDB-KC1SE)", ALC298_FIXUP_SAMSUNG_AMP),
SND_PCI_QUIRK(0x144d, 0xc1a6, "Samsung Galaxy Book Pro 360 (NP930QBD)", ALC298_FIXUP_SAMSUNG_AMP),
SND_PCI_QUIRK(0x144d, 0xc740, "Samsung Ativ book 8 (NP870Z5G)", ALC269_FIXUP_ATIV_BOOK_8),
SND_PCI_QUIRK(0x144d, 0xc812, "Samsung Notebook Pen S (NT950SBE-X58)", ALC298_FIXUP_SAMSUNG_AMP),
SND_PCI_QUIRK(0x144d, 0xc830, "Samsung Galaxy Book Ion (NT950XCJ-X716A)", ALC298_FIXUP_SAMSUNG_AMP),
SND_PCI_QUIRK(0x144d, 0xc832, "Samsung Galaxy Book Flex Alpha (NP730QCJ)", ALC256_FIXUP_SAMSUNG_HEADPHONE_VERY_QUIET),
SND_PCI_QUIRK(0x144d, 0xca03, "Samsung Galaxy Book2 Pro 360 (NP930QED)", ALC298_FIXUP_SAMSUNG_AMP),
SND_PCI_QUIRK(0x144d, 0xc868, "Samsung Galaxy Book2 Pro (NP930XED)", ALC298_FIXUP_SAMSUNG_AMP),
SND_PCI_QUIRK(0x1458, 0xfa53, "Gigabyte BXBT-2807", ALC283_FIXUP_HEADSET_MIC),
SND_PCI_QUIRK(0x1462, 0xb120, "MSI Cubi MS-B120", ALC283_FIXUP_HEADSET_MIC),
SND_PCI_QUIRK(0x1462, 0xb171, "Cubi N 8GL (MS-B171)", ALC283_FIXUP_HEADSET_MIC),
SND_PCI_QUIRK(0x152d, 0x1082, "Quanta NL3", ALC269_FIXUP_LIFEBOOK),
SND_PCI_QUIRK(0x1558, 0x1323, "Clevo N130ZU", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x1325, "Clevo N15[01][CW]U", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x1401, "Clevo L140[CZ]U", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x1403, "Clevo N140CU", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x1404, "Clevo N150CU", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x14a1, "Clevo L141MU", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x4018, "Clevo NV40M[BE]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x4019, "Clevo NV40MZ", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x4020, "Clevo NV40MB", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x4041, "Clevo NV4[15]PZ", ALC256_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x40a1, "Clevo NL40GU", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x40c1, "Clevo NL40[CZ]U", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x40d1, "Clevo NL41DU", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x5015, "Clevo NH5[58]H[HJK]Q", ALC256_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x5017, "Clevo NH7[79]H[HJK]Q", ALC256_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x50a3, "Clevo NJ51GU", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x50b3, "Clevo NK50S[BEZ]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x50b6, "Clevo NK50S5", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x50b8, "Clevo NK50SZ", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x50d5, "Clevo NP50D5", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x50e1, "Clevo NH5[58]HPQ", ALC256_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x50e2, "Clevo NH7[79]HPQ", ALC256_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x50f0, "Clevo NH50A[CDF]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x50f2, "Clevo NH50E[PR]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x50f3, "Clevo NH58DPQ", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x50f5, "Clevo NH55EPY", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x50f6, "Clevo NH55DPQ", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x5101, "Clevo S510WU", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x5157, "Clevo W517GU1", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x51a1, "Clevo NS50MU", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x51b1, "Clevo NS50AU", ALC256_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x51b3, "Clevo NS70AU", ALC256_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x5630, "Clevo NP50RNJS", ALC256_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x70a1, "Clevo NB70T[HJK]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x70b3, "Clevo NK70SB", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x70f2, "Clevo NH79EPY", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x70f3, "Clevo NH77DPQ", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x70f4, "Clevo NH77EPY", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x70f6, "Clevo NH77DPQ-Y", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x7716, "Clevo NS50PU", ALC256_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x7717, "Clevo NS70PU", ALC256_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x7718, "Clevo L140PU", ALC256_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x7724, "Clevo L140AU", ALC256_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x8228, "Clevo NR40BU", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x8520, "Clevo NH50D[CD]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x8521, "Clevo NH77D[CD]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x8535, "Clevo NH50D[BE]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x8536, "Clevo NH79D[BE]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x8550, "Clevo NH[57][0-9][ER][ACDH]Q", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x8551, "Clevo NH[57][0-9][ER][ACDH]Q", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x8560, "Clevo NH[57][0-9][ER][ACDH]Q", ALC269_FIXUP_HEADSET_MIC),
SND_PCI_QUIRK(0x1558, 0x8561, "Clevo NH[57][0-9][ER][ACDH]Q", ALC269_FIXUP_HEADSET_MIC),
SND_PCI_QUIRK(0x1558, 0x8562, "Clevo NH[57][0-9]RZ[Q]", ALC269_FIXUP_DMIC),
SND_PCI_QUIRK(0x1558, 0x8668, "Clevo NP50B[BE]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x866d, "Clevo NP5[05]PN[HJK]", ALC256_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x867c, "Clevo NP7[01]PNP", ALC256_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x867d, "Clevo NP7[01]PN[HJK]", ALC256_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x8680, "Clevo NJ50LU", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x8686, "Clevo NH50[CZ]U", ALC256_FIXUP_MIC_NO_PRESENCE_AND_RESUME),
SND_PCI_QUIRK(0x1558, 0x8a20, "Clevo NH55DCQ-Y", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x8a51, "Clevo NH70RCQ-Y", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x8d50, "Clevo NH55RCQ-M", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x951d, "Clevo N950T[CDF]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x9600, "Clevo N960K[PR]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x961d, "Clevo N960S[CDF]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0x971d, "Clevo N970T[CDF]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0xa500, "Clevo NL5[03]RU", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0xa600, "Clevo NL50NU", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0xa650, "Clevo NP[567]0SN[CD]", ALC256_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0xa671, "Clevo NP70SN[CDE]", ALC256_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0xb018, "Clevo NP50D[BE]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0xb019, "Clevo NH77D[BE]Q", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0xb022, "Clevo NH77D[DC][QW]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0xc018, "Clevo NP50D[BE]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0xc019, "Clevo NH77D[BE]Q", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1558, 0xc022, "Clevo NH77[DC][QW]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x17aa, 0x1036, "Lenovo P520", ALC233_FIXUP_LENOVO_MULTI_CODECS),
SND_PCI_QUIRK(0x17aa, 0x1048, "ThinkCentre Station", ALC623_FIXUP_LENOVO_THINKSTATION_P340),
SND_PCI_QUIRK(0x17aa, 0x20f2, "Thinkpad SL410/510", ALC269_FIXUP_SKU_IGNORE),
SND_PCI_QUIRK(0x17aa, 0x215e, "Thinkpad L512", ALC269_FIXUP_SKU_IGNORE),
SND_PCI_QUIRK(0x17aa, 0x21b8, "Thinkpad Edge 14", ALC269_FIXUP_SKU_IGNORE),
SND_PCI_QUIRK(0x17aa, 0x21ca, "Thinkpad L412", ALC269_FIXUP_SKU_IGNORE),
SND_PCI_QUIRK(0x17aa, 0x21e9, "Thinkpad Edge 15", ALC269_FIXUP_SKU_IGNORE),
SND_PCI_QUIRK(0x17aa, 0x21f3, "Thinkpad T430", ALC269_FIXUP_LENOVO_DOCK),
SND_PCI_QUIRK(0x17aa, 0x21f6, "Thinkpad T530", ALC269_FIXUP_LENOVO_DOCK_LIMIT_BOOST),
SND_PCI_QUIRK(0x17aa, 0x21fa, "Thinkpad X230", ALC269_FIXUP_LENOVO_DOCK),
SND_PCI_QUIRK(0x17aa, 0x21fb, "Thinkpad T430s", ALC269_FIXUP_LENOVO_DOCK),
SND_PCI_QUIRK(0x17aa, 0x2203, "Thinkpad X230 Tablet", ALC269_FIXUP_LENOVO_DOCK),
SND_PCI_QUIRK(0x17aa, 0x2208, "Thinkpad T431s", ALC269_FIXUP_LENOVO_DOCK),
SND_PCI_QUIRK(0x17aa, 0x220c, "Thinkpad T440s", ALC292_FIXUP_TPT440),
SND_PCI_QUIRK(0x17aa, 0x220e, "Thinkpad T440p", ALC292_FIXUP_TPT440_DOCK),
SND_PCI_QUIRK(0x17aa, 0x2210, "Thinkpad T540p", ALC292_FIXUP_TPT440_DOCK),
SND_PCI_QUIRK(0x17aa, 0x2211, "Thinkpad W541", ALC292_FIXUP_TPT440_DOCK),
SND_PCI_QUIRK(0x17aa, 0x2212, "Thinkpad T440", ALC292_FIXUP_TPT440_DOCK),
SND_PCI_QUIRK(0x17aa, 0x2214, "Thinkpad X240", ALC292_FIXUP_TPT440_DOCK),
SND_PCI_QUIRK(0x17aa, 0x2215, "Thinkpad", ALC269_FIXUP_LIMIT_INT_MIC_BOOST),
SND_PCI_QUIRK(0x17aa, 0x2218, "Thinkpad X1 Carbon 2nd", ALC292_FIXUP_TPT440_DOCK),
SND_PCI_QUIRK(0x17aa, 0x2223, "ThinkPad T550", ALC292_FIXUP_TPT440_DOCK),
SND_PCI_QUIRK(0x17aa, 0x2226, "ThinkPad X250", ALC292_FIXUP_TPT440_DOCK),
SND_PCI_QUIRK(0x17aa, 0x222d, "Thinkpad", ALC298_FIXUP_TPT470_DOCK),
SND_PCI_QUIRK(0x17aa, 0x222e, "Thinkpad", ALC298_FIXUP_TPT470_DOCK),
SND_PCI_QUIRK(0x17aa, 0x2231, "Thinkpad T560", ALC292_FIXUP_TPT460),
SND_PCI_QUIRK(0x17aa, 0x2233, "Thinkpad", ALC292_FIXUP_TPT460),
SND_PCI_QUIRK(0x17aa, 0x2245, "Thinkpad T470", ALC298_FIXUP_TPT470_DOCK),
SND_PCI_QUIRK(0x17aa, 0x2246, "Thinkpad", ALC298_FIXUP_TPT470_DOCK),
SND_PCI_QUIRK(0x17aa, 0x2247, "Thinkpad", ALC298_FIXUP_TPT470_DOCK),
SND_PCI_QUIRK(0x17aa, 0x2249, "Thinkpad", ALC292_FIXUP_TPT460),
SND_PCI_QUIRK(0x17aa, 0x224b, "Thinkpad", ALC298_FIXUP_TPT470_DOCK),
SND_PCI_QUIRK(0x17aa, 0x224c, "Thinkpad", ALC298_FIXUP_TPT470_DOCK),
SND_PCI_QUIRK(0x17aa, 0x224d, "Thinkpad", ALC298_FIXUP_TPT470_DOCK),
SND_PCI_QUIRK(0x17aa, 0x225d, "Thinkpad T480", ALC269_FIXUP_LIMIT_INT_MIC_BOOST),
SND_PCI_QUIRK(0x17aa, 0x2292, "Thinkpad X1 Carbon 7th", ALC285_FIXUP_THINKPAD_HEADSET_JACK),
SND_PCI_QUIRK(0x17aa, 0x22be, "Thinkpad X1 Carbon 8th", ALC285_FIXUP_THINKPAD_HEADSET_JACK),
SND_PCI_QUIRK(0x17aa, 0x22c1, "Thinkpad P1 Gen 3", ALC285_FIXUP_THINKPAD_NO_BASS_SPK_HEADSET_JACK),
SND_PCI_QUIRK(0x17aa, 0x22c2, "Thinkpad X1 Extreme Gen 3", ALC285_FIXUP_THINKPAD_NO_BASS_SPK_HEADSET_JACK),
SND_PCI_QUIRK(0x17aa, 0x22f1, "Thinkpad", ALC287_FIXUP_CS35L41_I2C_2_THINKPAD_ACPI),
SND_PCI_QUIRK(0x17aa, 0x22f2, "Thinkpad", ALC287_FIXUP_CS35L41_I2C_2_THINKPAD_ACPI),
SND_PCI_QUIRK(0x17aa, 0x22f3, "Thinkpad", ALC287_FIXUP_CS35L41_I2C_2_THINKPAD_ACPI),
SND_PCI_QUIRK(0x17aa, 0x2316, "Thinkpad P1 Gen 6", ALC287_FIXUP_CS35L41_I2C_2_THINKPAD_ACPI),
SND_PCI_QUIRK(0x17aa, 0x2317, "Thinkpad P1 Gen 6", ALC287_FIXUP_CS35L41_I2C_2_THINKPAD_ACPI),
SND_PCI_QUIRK(0x17aa, 0x2318, "Thinkpad Z13 Gen2", ALC287_FIXUP_CS35L41_I2C_2_THINKPAD_ACPI),
SND_PCI_QUIRK(0x17aa, 0x2319, "Thinkpad Z16 Gen2", ALC287_FIXUP_CS35L41_I2C_2_THINKPAD_ACPI),
SND_PCI_QUIRK(0x17aa, 0x231a, "Thinkpad Z16 Gen2", ALC287_FIXUP_CS35L41_I2C_2_THINKPAD_ACPI),
SND_PCI_QUIRK(0x17aa, 0x30bb, "ThinkCentre AIO", ALC233_FIXUP_LENOVO_LINE2_MIC_HOTKEY),
SND_PCI_QUIRK(0x17aa, 0x30e2, "ThinkCentre AIO", ALC233_FIXUP_LENOVO_LINE2_MIC_HOTKEY),
SND_PCI_QUIRK(0x17aa, 0x310c, "ThinkCentre Station", ALC294_FIXUP_LENOVO_MIC_LOCATION),
SND_PCI_QUIRK(0x17aa, 0x3111, "ThinkCentre Station", ALC294_FIXUP_LENOVO_MIC_LOCATION),
SND_PCI_QUIRK(0x17aa, 0x312a, "ThinkCentre Station", ALC294_FIXUP_LENOVO_MIC_LOCATION),
SND_PCI_QUIRK(0x17aa, 0x312f, "ThinkCentre Station", ALC294_FIXUP_LENOVO_MIC_LOCATION),
SND_PCI_QUIRK(0x17aa, 0x313c, "ThinkCentre Station", ALC294_FIXUP_LENOVO_MIC_LOCATION),
SND_PCI_QUIRK(0x17aa, 0x3151, "ThinkCentre Station", ALC283_FIXUP_HEADSET_MIC),
SND_PCI_QUIRK(0x17aa, 0x3176, "ThinkCentre Station", ALC283_FIXUP_HEADSET_MIC),
SND_PCI_QUIRK(0x17aa, 0x3178, "ThinkCentre Station", ALC283_FIXUP_HEADSET_MIC),
SND_PCI_QUIRK(0x17aa, 0x31af, "ThinkCentre Station", ALC623_FIXUP_LENOVO_THINKSTATION_P340),
SND_PCI_QUIRK(0x17aa, 0x3801, "Lenovo Yoga9 14IAP7", ALC287_FIXUP_YOGA9_14IAP7_BASS_SPK_PIN),
SND_PCI_QUIRK(0x17aa, 0x3802, "Lenovo Yoga DuetITL 2021", ALC287_FIXUP_YOGA7_14ITL_SPEAKERS),
SND_PCI_QUIRK(0x17aa, 0x3813, "Legion 7i 15IMHG05", ALC287_FIXUP_LEGION_15IMHG05_SPEAKERS),
SND_PCI_QUIRK(0x17aa, 0x3818, "Lenovo C940 / Yoga Duet 7", ALC298_FIXUP_LENOVO_C940_DUET7),
SND_PCI_QUIRK(0x17aa, 0x3819, "Lenovo 13s Gen2 ITL", ALC287_FIXUP_13S_GEN2_SPEAKERS),
SND_PCI_QUIRK(0x17aa, 0x3820, "Yoga Duet 7 13ITL6", ALC287_FIXUP_YOGA7_14ITL_SPEAKERS),
SND_PCI_QUIRK(0x17aa, 0x3824, "Legion Y9000X 2020", ALC285_FIXUP_LEGION_Y9000X_SPEAKERS),
SND_PCI_QUIRK(0x17aa, 0x3827, "Ideapad S740", ALC285_FIXUP_IDEAPAD_S740_COEF),
SND_PCI_QUIRK(0x17aa, 0x3834, "Lenovo IdeaPad Slim 9i 14ITL5", ALC287_FIXUP_YOGA7_14ITL_SPEAKERS),
SND_PCI_QUIRK(0x17aa, 0x383d, "Legion Y9000X 2019", ALC285_FIXUP_LEGION_Y9000X_SPEAKERS),
SND_PCI_QUIRK(0x17aa, 0x3843, "Yoga 9i", ALC287_FIXUP_IDEAPAD_BASS_SPK_AMP),
SND_PCI_QUIRK(0x17aa, 0x3847, "Legion 7 16ACHG6", ALC287_FIXUP_LEGION_16ACHG6),
SND_PCI_QUIRK(0x17aa, 0x384a, "Lenovo Yoga 7 15ITL5", ALC287_FIXUP_YOGA7_14ITL_SPEAKERS),
SND_PCI_QUIRK(0x17aa, 0x3852, "Lenovo Yoga 7 14ITL5", ALC287_FIXUP_YOGA7_14ITL_SPEAKERS),
SND_PCI_QUIRK(0x17aa, 0x3853, "Lenovo Yoga 7 15ITL5", ALC287_FIXUP_YOGA7_14ITL_SPEAKERS),
SND_PCI_QUIRK(0x17aa, 0x3855, "Legion 7 16ITHG6", ALC287_FIXUP_LEGION_16ITHG6),
SND_PCI_QUIRK(0x17aa, 0x3869, "Lenovo Yoga7 14IAL7", ALC287_FIXUP_YOGA9_14IAP7_BASS_SPK_PIN),
SND_PCI_QUIRK(0x17aa, 0x387d, "Yoga S780-16 pro Quad AAC", ALC287_FIXUP_TAS2781_I2C),
SND_PCI_QUIRK(0x17aa, 0x387e, "Yoga S780-16 pro Quad YC", ALC287_FIXUP_TAS2781_I2C),
SND_PCI_QUIRK(0x17aa, 0x3881, "YB9 dual power mode2 YC", ALC287_FIXUP_TAS2781_I2C),
SND_PCI_QUIRK(0x17aa, 0x3884, "Y780 YG DUAL", ALC287_FIXUP_TAS2781_I2C),
SND_PCI_QUIRK(0x17aa, 0x3886, "Y780 VECO DUAL", ALC287_FIXUP_TAS2781_I2C),
SND_PCI_QUIRK(0x17aa, 0x38a7, "Y780P AMD YG dual", ALC287_FIXUP_TAS2781_I2C),
SND_PCI_QUIRK(0x17aa, 0x38a8, "Y780P AMD VECO dual", ALC287_FIXUP_TAS2781_I2C),
SND_PCI_QUIRK(0x17aa, 0x38ba, "Yoga S780-14.5 Air AMD quad YC", ALC287_FIXUP_TAS2781_I2C),
SND_PCI_QUIRK(0x17aa, 0x38bb, "Yoga S780-14.5 Air AMD quad AAC", ALC287_FIXUP_TAS2781_I2C),
SND_PCI_QUIRK(0x17aa, 0x38be, "Yoga S980-14.5 proX YC Dual", ALC287_FIXUP_TAS2781_I2C),
SND_PCI_QUIRK(0x17aa, 0x38bf, "Yoga S980-14.5 proX LX Dual", ALC287_FIXUP_TAS2781_I2C),
SND_PCI_QUIRK(0x17aa, 0x38c3, "Y980 DUAL", ALC287_FIXUP_TAS2781_I2C),
SND_PCI_QUIRK(0x17aa, 0x38cb, "Y790 YG DUAL", ALC287_FIXUP_TAS2781_I2C),
SND_PCI_QUIRK(0x17aa, 0x38cd, "Y790 VECO DUAL", ALC287_FIXUP_TAS2781_I2C),
SND_PCI_QUIRK(0x17aa, 0x3902, "Lenovo E50-80", ALC269_FIXUP_DMIC_THINKPAD_ACPI),
SND_PCI_QUIRK(0x17aa, 0x3977, "IdeaPad S210", ALC283_FIXUP_INT_MIC),
SND_PCI_QUIRK(0x17aa, 0x3978, "Lenovo B50-70", ALC269_FIXUP_DMIC_THINKPAD_ACPI),
SND_PCI_QUIRK(0x17aa, 0x3bf8, "Quanta FL1", ALC269_FIXUP_PCM_44K),
SND_PCI_QUIRK(0x17aa, 0x5013, "Thinkpad", ALC269_FIXUP_LIMIT_INT_MIC_BOOST),
SND_PCI_QUIRK(0x17aa, 0x501a, "Thinkpad", ALC283_FIXUP_INT_MIC),
SND_PCI_QUIRK(0x17aa, 0x501e, "Thinkpad L440", ALC292_FIXUP_TPT440_DOCK),
SND_PCI_QUIRK(0x17aa, 0x5026, "Thinkpad", ALC269_FIXUP_LIMIT_INT_MIC_BOOST),
SND_PCI_QUIRK(0x17aa, 0x5034, "Thinkpad T450", ALC292_FIXUP_TPT440_DOCK),
SND_PCI_QUIRK(0x17aa, 0x5036, "Thinkpad T450s", ALC292_FIXUP_TPT440_DOCK),
SND_PCI_QUIRK(0x17aa, 0x503c, "Thinkpad L450", ALC292_FIXUP_TPT440_DOCK),
SND_PCI_QUIRK(0x17aa, 0x504a, "ThinkPad X260", ALC292_FIXUP_TPT440_DOCK),
SND_PCI_QUIRK(0x17aa, 0x504b, "Thinkpad", ALC293_FIXUP_LENOVO_SPK_NOISE),
SND_PCI_QUIRK(0x17aa, 0x5050, "Thinkpad T560p", ALC292_FIXUP_TPT460),
SND_PCI_QUIRK(0x17aa, 0x5051, "Thinkpad L460", ALC292_FIXUP_TPT460),
SND_PCI_QUIRK(0x17aa, 0x5053, "Thinkpad T460", ALC292_FIXUP_TPT460),
SND_PCI_QUIRK(0x17aa, 0x505d, "Thinkpad", ALC298_FIXUP_TPT470_DOCK),
SND_PCI_QUIRK(0x17aa, 0x505f, "Thinkpad", ALC298_FIXUP_TPT470_DOCK),
SND_PCI_QUIRK(0x17aa, 0x5062, "Thinkpad", ALC298_FIXUP_TPT470_DOCK),
SND_PCI_QUIRK(0x17aa, 0x508b, "Thinkpad X12 Gen 1", ALC287_FIXUP_LEGION_15IMHG05_SPEAKERS),
SND_PCI_QUIRK(0x17aa, 0x5109, "Thinkpad", ALC269_FIXUP_LIMIT_INT_MIC_BOOST),
SND_PCI_QUIRK(0x17aa, 0x511e, "Thinkpad", ALC298_FIXUP_TPT470_DOCK),
SND_PCI_QUIRK(0x17aa, 0x511f, "Thinkpad", ALC298_FIXUP_TPT470_DOCK),
SND_PCI_QUIRK(0x17aa, 0x9e54, "LENOVO NB", ALC269_FIXUP_LENOVO_EAPD),
SND_PCI_QUIRK(0x17aa, 0x9e56, "Lenovo ZhaoYang CF4620Z", ALC286_FIXUP_SONY_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1849, 0x1233, "ASRock NUC Box 1100", ALC233_FIXUP_NO_AUDIO_JACK),
SND_PCI_QUIRK(0x1849, 0xa233, "Positivo Master C6300", ALC269_FIXUP_HEADSET_MIC),
SND_PCI_QUIRK(0x19e5, 0x3204, "Huawei MACH-WX9", ALC256_FIXUP_HUAWEI_MACH_WX9_PINS),
SND_PCI_QUIRK(0x19e5, 0x320f, "Huawei WRT-WX9 ", ALC256_FIXUP_ASUS_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1b35, 0x1235, "CZC B20", ALC269_FIXUP_CZC_B20),
SND_PCI_QUIRK(0x1b35, 0x1236, "CZC TMI", ALC269_FIXUP_CZC_TMI),
SND_PCI_QUIRK(0x1b35, 0x1237, "CZC L101", ALC269_FIXUP_CZC_L101),
SND_PCI_QUIRK(0x1b7d, 0xa831, "Ordissimo EVE2 ", ALC269VB_FIXUP_ORDISSIMO_EVE2), /* Also known as Malata PC-B1303 */
SND_PCI_QUIRK(0x1c06, 0x2013, "Lemote A1802", ALC269_FIXUP_LEMOTE_A1802),
SND_PCI_QUIRK(0x1c06, 0x2015, "Lemote A190X", ALC269_FIXUP_LEMOTE_A190X),
SND_PCI_QUIRK(0x1c6c, 0x1251, "Positivo N14KP6-TG", ALC288_FIXUP_DELL1_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1d05, 0x1132, "TongFang PHxTxX1", ALC256_FIXUP_SET_COEF_DEFAULTS),
SND_PCI_QUIRK(0x1d05, 0x1096, "TongFang GMxMRxx", ALC269_FIXUP_NO_SHUTUP),
SND_PCI_QUIRK(0x1d05, 0x1100, "TongFang GKxNRxx", ALC269_FIXUP_NO_SHUTUP),
SND_PCI_QUIRK(0x1d05, 0x1111, "TongFang GMxZGxx", ALC269_FIXUP_NO_SHUTUP),
SND_PCI_QUIRK(0x1d05, 0x1119, "TongFang GMxZGxx", ALC269_FIXUP_NO_SHUTUP),
SND_PCI_QUIRK(0x1d05, 0x1129, "TongFang GMxZGxx", ALC269_FIXUP_NO_SHUTUP),
SND_PCI_QUIRK(0x1d05, 0x1147, "TongFang GMxTGxx", ALC269_FIXUP_NO_SHUTUP),
SND_PCI_QUIRK(0x1d05, 0x115c, "TongFang GMxTGxx", ALC269_FIXUP_NO_SHUTUP),
SND_PCI_QUIRK(0x1d05, 0x121b, "TongFang GMxAGxx", ALC269_FIXUP_NO_SHUTUP),
SND_PCI_QUIRK(0x1d72, 0x1602, "RedmiBook", ALC255_FIXUP_XIAOMI_HEADSET_MIC),
SND_PCI_QUIRK(0x1d72, 0x1701, "XiaomiNotebook Pro", ALC298_FIXUP_DELL1_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1d72, 0x1901, "RedmiBook 14", ALC256_FIXUP_ASUS_HEADSET_MIC),
SND_PCI_QUIRK(0x1d72, 0x1945, "Redmi G", ALC256_FIXUP_ASUS_HEADSET_MIC),
SND_PCI_QUIRK(0x1d72, 0x1947, "RedmiBook Air", ALC255_FIXUP_XIAOMI_HEADSET_MIC),
SND_PCI_QUIRK(0x8086, 0x2074, "Intel NUC 8", ALC233_FIXUP_INTEL_NUC8_DMIC),
SND_PCI_QUIRK(0x8086, 0x2080, "Intel NUC 8 Rugged", ALC256_FIXUP_INTEL_NUC8_RUGGED),
SND_PCI_QUIRK(0x8086, 0x2081, "Intel NUC 10", ALC256_FIXUP_INTEL_NUC10),
SND_PCI_QUIRK(0x8086, 0x3038, "Intel NUC 13", ALC225_FIXUP_HEADSET_JACK),
SND_PCI_QUIRK(0xf111, 0x0001, "Framework Laptop", ALC295_FIXUP_FRAMEWORK_LAPTOP_MIC_NO_PRESENCE),
#if 0
/* Below is a quirk table taken from the old code.
* Basically the device should work as is without the fixup table.
* If BIOS doesn't give a proper info, enable the corresponding
* fixup entry.
*/
SND_PCI_QUIRK(0x1043, 0x8330, "ASUS Eeepc P703 P900A",
ALC269_FIXUP_AMIC),
SND_PCI_QUIRK(0x1043, 0x1013, "ASUS N61Da", ALC269_FIXUP_AMIC),
SND_PCI_QUIRK(0x1043, 0x1143, "ASUS B53f", ALC269_FIXUP_AMIC),
SND_PCI_QUIRK(0x1043, 0x1133, "ASUS UJ20ft", ALC269_FIXUP_AMIC),
SND_PCI_QUIRK(0x1043, 0x1183, "ASUS K72DR", ALC269_FIXUP_AMIC),
SND_PCI_QUIRK(0x1043, 0x11b3, "ASUS K52DR", ALC269_FIXUP_AMIC),
SND_PCI_QUIRK(0x1043, 0x11e3, "ASUS U33Jc", ALC269_FIXUP_AMIC),
SND_PCI_QUIRK(0x1043, 0x1273, "ASUS UL80Jt", ALC269_FIXUP_AMIC),
SND_PCI_QUIRK(0x1043, 0x1283, "ASUS U53Jc", ALC269_FIXUP_AMIC),
SND_PCI_QUIRK(0x1043, 0x12b3, "ASUS N82JV", ALC269_FIXUP_AMIC),
SND_PCI_QUIRK(0x1043, 0x12d3, "ASUS N61Jv", ALC269_FIXUP_AMIC),
SND_PCI_QUIRK(0x1043, 0x13a3, "ASUS UL30Vt", ALC269_FIXUP_AMIC),
SND_PCI_QUIRK(0x1043, 0x1373, "ASUS G73JX", ALC269_FIXUP_AMIC),
SND_PCI_QUIRK(0x1043, 0x1383, "ASUS UJ30Jc", ALC269_FIXUP_AMIC),
SND_PCI_QUIRK(0x1043, 0x13d3, "ASUS N61JA", ALC269_FIXUP_AMIC),
SND_PCI_QUIRK(0x1043, 0x1413, "ASUS UL50", ALC269_FIXUP_AMIC),
SND_PCI_QUIRK(0x1043, 0x1443, "ASUS UL30", ALC269_FIXUP_AMIC),
SND_PCI_QUIRK(0x1043, 0x1453, "ASUS M60Jv", ALC269_FIXUP_AMIC),
SND_PCI_QUIRK(0x1043, 0x1483, "ASUS UL80", ALC269_FIXUP_AMIC),
SND_PCI_QUIRK(0x1043, 0x14f3, "ASUS F83Vf", ALC269_FIXUP_AMIC),
SND_PCI_QUIRK(0x1043, 0x14e3, "ASUS UL20", ALC269_FIXUP_AMIC),
SND_PCI_QUIRK(0x1043, 0x1513, "ASUS UX30", ALC269_FIXUP_AMIC),
SND_PCI_QUIRK(0x1043, 0x1593, "ASUS N51Vn", ALC269_FIXUP_AMIC),
SND_PCI_QUIRK(0x1043, 0x15a3, "ASUS N60Jv", ALC269_FIXUP_AMIC),
SND_PCI_QUIRK(0x1043, 0x15b3, "ASUS N60Dp", ALC269_FIXUP_AMIC),
SND_PCI_QUIRK(0x1043, 0x15c3, "ASUS N70De", ALC269_FIXUP_AMIC),
SND_PCI_QUIRK(0x1043, 0x15e3, "ASUS F83T", ALC269_FIXUP_AMIC),
SND_PCI_QUIRK(0x1043, 0x1643, "ASUS M60J", ALC269_FIXUP_AMIC),
SND_PCI_QUIRK(0x1043, 0x1653, "ASUS U50", ALC269_FIXUP_AMIC),
SND_PCI_QUIRK(0x1043, 0x1693, "ASUS F50N", ALC269_FIXUP_AMIC),
SND_PCI_QUIRK(0x1043, 0x16a3, "ASUS F5Q", ALC269_FIXUP_AMIC),
SND_PCI_QUIRK(0x1043, 0x1723, "ASUS P80", ALC269_FIXUP_AMIC),
SND_PCI_QUIRK(0x1043, 0x1743, "ASUS U80", ALC269_FIXUP_AMIC),
SND_PCI_QUIRK(0x1043, 0x1773, "ASUS U20A", ALC269_FIXUP_AMIC),
SND_PCI_QUIRK(0x1043, 0x1883, "ASUS F81Se", ALC269_FIXUP_AMIC),
SND_PCI_QUIRK(0x152d, 0x1778, "Quanta ON1", ALC269_FIXUP_DMIC),
SND_PCI_QUIRK(0x17aa, 0x3be9, "Quanta Wistron", ALC269_FIXUP_AMIC),
SND_PCI_QUIRK(0x17aa, 0x3bf8, "Quanta FL1", ALC269_FIXUP_AMIC),
SND_PCI_QUIRK(0x17ff, 0x059a, "Quanta EL3", ALC269_FIXUP_DMIC),
SND_PCI_QUIRK(0x17ff, 0x059b, "Quanta JR1", ALC269_FIXUP_DMIC),
#endif
{}
};
static const struct snd_pci_quirk alc269_fixup_vendor_tbl[] = {
SND_PCI_QUIRK_VENDOR(0x1025, "Acer Aspire", ALC271_FIXUP_DMIC),
SND_PCI_QUIRK_VENDOR(0x103c, "HP", ALC269_FIXUP_HP_MUTE_LED),
SND_PCI_QUIRK_VENDOR(0x104d, "Sony VAIO", ALC269_FIXUP_SONY_VAIO),
SND_PCI_QUIRK_VENDOR(0x17aa, "Thinkpad", ALC269_FIXUP_THINKPAD_ACPI),
SND_PCI_QUIRK_VENDOR(0x19e5, "Huawei Matebook", ALC255_FIXUP_MIC_MUTE_LED),
{}
};
static const struct hda_model_fixup alc269_fixup_models[] = {
{.id = ALC269_FIXUP_AMIC, .name = "laptop-amic"},
{.id = ALC269_FIXUP_DMIC, .name = "laptop-dmic"},
{.id = ALC269_FIXUP_STEREO_DMIC, .name = "alc269-dmic"},
{.id = ALC271_FIXUP_DMIC, .name = "alc271-dmic"},
{.id = ALC269_FIXUP_INV_DMIC, .name = "inv-dmic"},
{.id = ALC269_FIXUP_HEADSET_MIC, .name = "headset-mic"},
{.id = ALC269_FIXUP_HEADSET_MODE, .name = "headset-mode"},
{.id = ALC269_FIXUP_HEADSET_MODE_NO_HP_MIC, .name = "headset-mode-no-hp-mic"},
{.id = ALC269_FIXUP_LENOVO_DOCK, .name = "lenovo-dock"},
{.id = ALC269_FIXUP_LENOVO_DOCK_LIMIT_BOOST, .name = "lenovo-dock-limit-boost"},
{.id = ALC269_FIXUP_HP_GPIO_LED, .name = "hp-gpio-led"},
{.id = ALC269_FIXUP_HP_DOCK_GPIO_MIC1_LED, .name = "hp-dock-gpio-mic1-led"},
{.id = ALC269_FIXUP_DELL1_MIC_NO_PRESENCE, .name = "dell-headset-multi"},
{.id = ALC269_FIXUP_DELL2_MIC_NO_PRESENCE, .name = "dell-headset-dock"},
{.id = ALC269_FIXUP_DELL3_MIC_NO_PRESENCE, .name = "dell-headset3"},
{.id = ALC269_FIXUP_DELL4_MIC_NO_PRESENCE, .name = "dell-headset4"},
{.id = ALC283_FIXUP_CHROME_BOOK, .name = "alc283-dac-wcaps"},
{.id = ALC283_FIXUP_SENSE_COMBO_JACK, .name = "alc283-sense-combo"},
{.id = ALC292_FIXUP_TPT440_DOCK, .name = "tpt440-dock"},
{.id = ALC292_FIXUP_TPT440, .name = "tpt440"},
{.id = ALC292_FIXUP_TPT460, .name = "tpt460"},
{.id = ALC298_FIXUP_TPT470_DOCK_FIX, .name = "tpt470-dock-fix"},
{.id = ALC298_FIXUP_TPT470_DOCK, .name = "tpt470-dock"},
{.id = ALC233_FIXUP_LENOVO_MULTI_CODECS, .name = "dual-codecs"},
{.id = ALC700_FIXUP_INTEL_REFERENCE, .name = "alc700-ref"},
{.id = ALC269_FIXUP_SONY_VAIO, .name = "vaio"},
{.id = ALC269_FIXUP_DELL_M101Z, .name = "dell-m101z"},
{.id = ALC269_FIXUP_ASUS_G73JW, .name = "asus-g73jw"},
{.id = ALC269_FIXUP_LENOVO_EAPD, .name = "lenovo-eapd"},
{.id = ALC275_FIXUP_SONY_HWEQ, .name = "sony-hweq"},
{.id = ALC269_FIXUP_PCM_44K, .name = "pcm44k"},
{.id = ALC269_FIXUP_LIFEBOOK, .name = "lifebook"},
{.id = ALC269_FIXUP_LIFEBOOK_EXTMIC, .name = "lifebook-extmic"},
{.id = ALC269_FIXUP_LIFEBOOK_HP_PIN, .name = "lifebook-hp-pin"},
{.id = ALC255_FIXUP_LIFEBOOK_U7x7_HEADSET_MIC, .name = "lifebook-u7x7"},
{.id = ALC269VB_FIXUP_AMIC, .name = "alc269vb-amic"},
{.id = ALC269VB_FIXUP_DMIC, .name = "alc269vb-dmic"},
{.id = ALC269_FIXUP_HP_MUTE_LED_MIC1, .name = "hp-mute-led-mic1"},
{.id = ALC269_FIXUP_HP_MUTE_LED_MIC2, .name = "hp-mute-led-mic2"},
{.id = ALC269_FIXUP_HP_MUTE_LED_MIC3, .name = "hp-mute-led-mic3"},
{.id = ALC269_FIXUP_HP_GPIO_MIC1_LED, .name = "hp-gpio-mic1"},
{.id = ALC269_FIXUP_HP_LINE1_MIC1_LED, .name = "hp-line1-mic1"},
{.id = ALC269_FIXUP_NO_SHUTUP, .name = "noshutup"},
{.id = ALC286_FIXUP_SONY_MIC_NO_PRESENCE, .name = "sony-nomic"},
{.id = ALC269_FIXUP_ASPIRE_HEADSET_MIC, .name = "aspire-headset-mic"},
{.id = ALC269_FIXUP_ASUS_X101, .name = "asus-x101"},
{.id = ALC271_FIXUP_HP_GATE_MIC_JACK, .name = "acer-ao7xx"},
{.id = ALC271_FIXUP_HP_GATE_MIC_JACK_E1_572, .name = "acer-aspire-e1"},
{.id = ALC269_FIXUP_ACER_AC700, .name = "acer-ac700"},
{.id = ALC269_FIXUP_LIMIT_INT_MIC_BOOST, .name = "limit-mic-boost"},
{.id = ALC269VB_FIXUP_ASUS_ZENBOOK, .name = "asus-zenbook"},
{.id = ALC269VB_FIXUP_ASUS_ZENBOOK_UX31A, .name = "asus-zenbook-ux31a"},
{.id = ALC269VB_FIXUP_ORDISSIMO_EVE2, .name = "ordissimo"},
{.id = ALC282_FIXUP_ASUS_TX300, .name = "asus-tx300"},
{.id = ALC283_FIXUP_INT_MIC, .name = "alc283-int-mic"},
{.id = ALC290_FIXUP_MONO_SPEAKERS_HSJACK, .name = "mono-speakers"},
{.id = ALC290_FIXUP_SUBWOOFER_HSJACK, .name = "alc290-subwoofer"},
{.id = ALC269_FIXUP_THINKPAD_ACPI, .name = "thinkpad"},
{.id = ALC269_FIXUP_DMIC_THINKPAD_ACPI, .name = "dmic-thinkpad"},
{.id = ALC255_FIXUP_ACER_MIC_NO_PRESENCE, .name = "alc255-acer"},
{.id = ALC255_FIXUP_ASUS_MIC_NO_PRESENCE, .name = "alc255-asus"},
{.id = ALC255_FIXUP_DELL1_MIC_NO_PRESENCE, .name = "alc255-dell1"},
{.id = ALC255_FIXUP_DELL2_MIC_NO_PRESENCE, .name = "alc255-dell2"},
{.id = ALC293_FIXUP_DELL1_MIC_NO_PRESENCE, .name = "alc293-dell1"},
{.id = ALC283_FIXUP_HEADSET_MIC, .name = "alc283-headset"},
{.id = ALC255_FIXUP_MIC_MUTE_LED, .name = "alc255-dell-mute"},
{.id = ALC282_FIXUP_ASPIRE_V5_PINS, .name = "aspire-v5"},
{.id = ALC269VB_FIXUP_ASPIRE_E1_COEF, .name = "aspire-e1-coef"},
{.id = ALC280_FIXUP_HP_GPIO4, .name = "hp-gpio4"},
{.id = ALC286_FIXUP_HP_GPIO_LED, .name = "hp-gpio-led"},
{.id = ALC280_FIXUP_HP_GPIO2_MIC_HOTKEY, .name = "hp-gpio2-hotkey"},
{.id = ALC280_FIXUP_HP_DOCK_PINS, .name = "hp-dock-pins"},
{.id = ALC269_FIXUP_HP_DOCK_GPIO_MIC1_LED, .name = "hp-dock-gpio-mic"},
{.id = ALC280_FIXUP_HP_9480M, .name = "hp-9480m"},
{.id = ALC288_FIXUP_DELL_HEADSET_MODE, .name = "alc288-dell-headset"},
{.id = ALC288_FIXUP_DELL1_MIC_NO_PRESENCE, .name = "alc288-dell1"},
{.id = ALC288_FIXUP_DELL_XPS_13, .name = "alc288-dell-xps13"},
{.id = ALC292_FIXUP_DELL_E7X, .name = "dell-e7x"},
{.id = ALC293_FIXUP_DISABLE_AAMIX_MULTIJACK, .name = "alc293-dell"},
{.id = ALC298_FIXUP_DELL1_MIC_NO_PRESENCE, .name = "alc298-dell1"},
{.id = ALC298_FIXUP_DELL_AIO_MIC_NO_PRESENCE, .name = "alc298-dell-aio"},
{.id = ALC275_FIXUP_DELL_XPS, .name = "alc275-dell-xps"},
{.id = ALC293_FIXUP_LENOVO_SPK_NOISE, .name = "lenovo-spk-noise"},
{.id = ALC233_FIXUP_LENOVO_LINE2_MIC_HOTKEY, .name = "lenovo-hotkey"},
{.id = ALC255_FIXUP_DELL_SPK_NOISE, .name = "dell-spk-noise"},
{.id = ALC225_FIXUP_DELL1_MIC_NO_PRESENCE, .name = "alc225-dell1"},
{.id = ALC295_FIXUP_DISABLE_DAC3, .name = "alc295-disable-dac3"},
{.id = ALC285_FIXUP_SPEAKER2_TO_DAC1, .name = "alc285-speaker2-to-dac1"},
{.id = ALC280_FIXUP_HP_HEADSET_MIC, .name = "alc280-hp-headset"},
{.id = ALC221_FIXUP_HP_FRONT_MIC, .name = "alc221-hp-mic"},
{.id = ALC298_FIXUP_SPK_VOLUME, .name = "alc298-spk-volume"},
{.id = ALC256_FIXUP_DELL_INSPIRON_7559_SUBWOOFER, .name = "dell-inspiron-7559"},
{.id = ALC269_FIXUP_ATIV_BOOK_8, .name = "ativ-book"},
{.id = ALC221_FIXUP_HP_MIC_NO_PRESENCE, .name = "alc221-hp-mic"},
{.id = ALC256_FIXUP_ASUS_HEADSET_MODE, .name = "alc256-asus-headset"},
{.id = ALC256_FIXUP_ASUS_MIC, .name = "alc256-asus-mic"},
{.id = ALC256_FIXUP_ASUS_AIO_GPIO2, .name = "alc256-asus-aio"},
{.id = ALC233_FIXUP_ASUS_MIC_NO_PRESENCE, .name = "alc233-asus"},
{.id = ALC233_FIXUP_EAPD_COEF_AND_MIC_NO_PRESENCE, .name = "alc233-eapd"},
{.id = ALC294_FIXUP_LENOVO_MIC_LOCATION, .name = "alc294-lenovo-mic"},
{.id = ALC225_FIXUP_DELL_WYSE_MIC_NO_PRESENCE, .name = "alc225-wyse"},
{.id = ALC274_FIXUP_DELL_AIO_LINEOUT_VERB, .name = "alc274-dell-aio"},
{.id = ALC255_FIXUP_DUMMY_LINEOUT_VERB, .name = "alc255-dummy-lineout"},
{.id = ALC255_FIXUP_DELL_HEADSET_MIC, .name = "alc255-dell-headset"},
{.id = ALC295_FIXUP_HP_X360, .name = "alc295-hp-x360"},
{.id = ALC225_FIXUP_HEADSET_JACK, .name = "alc-headset-jack"},
{.id = ALC295_FIXUP_CHROME_BOOK, .name = "alc-chrome-book"},
{.id = ALC299_FIXUP_PREDATOR_SPK, .name = "predator-spk"},
{.id = ALC298_FIXUP_HUAWEI_MBX_STEREO, .name = "huawei-mbx-stereo"},
{.id = ALC256_FIXUP_MEDION_HEADSET_NO_PRESENCE, .name = "alc256-medion-headset"},
{.id = ALC298_FIXUP_SAMSUNG_AMP, .name = "alc298-samsung-amp"},
{.id = ALC256_FIXUP_SAMSUNG_HEADPHONE_VERY_QUIET, .name = "alc256-samsung-headphone"},
{.id = ALC255_FIXUP_XIAOMI_HEADSET_MIC, .name = "alc255-xiaomi-headset"},
{.id = ALC274_FIXUP_HP_MIC, .name = "alc274-hp-mic-detect"},
{.id = ALC245_FIXUP_HP_X360_AMP, .name = "alc245-hp-x360-amp"},
{.id = ALC295_FIXUP_HP_OMEN, .name = "alc295-hp-omen"},
{.id = ALC285_FIXUP_HP_SPECTRE_X360, .name = "alc285-hp-spectre-x360"},
{.id = ALC285_FIXUP_HP_SPECTRE_X360_EB1, .name = "alc285-hp-spectre-x360-eb1"},
{.id = ALC287_FIXUP_IDEAPAD_BASS_SPK_AMP, .name = "alc287-ideapad-bass-spk-amp"},
{.id = ALC287_FIXUP_YOGA9_14IAP7_BASS_SPK_PIN, .name = "alc287-yoga9-bass-spk-pin"},
{.id = ALC623_FIXUP_LENOVO_THINKSTATION_P340, .name = "alc623-lenovo-thinkstation-p340"},
{.id = ALC255_FIXUP_ACER_HEADPHONE_AND_MIC, .name = "alc255-acer-headphone-and-mic"},
{.id = ALC285_FIXUP_HP_GPIO_AMP_INIT, .name = "alc285-hp-amp-init"},
{}
};
#define ALC225_STANDARD_PINS \
{0x21, 0x04211020}
#define ALC256_STANDARD_PINS \
{0x12, 0x90a60140}, \
{0x14, 0x90170110}, \
{0x21, 0x02211020}
#define ALC282_STANDARD_PINS \
{0x14, 0x90170110}
#define ALC290_STANDARD_PINS \
{0x12, 0x99a30130}
#define ALC292_STANDARD_PINS \
{0x14, 0x90170110}, \
{0x15, 0x0221401f}
#define ALC295_STANDARD_PINS \
{0x12, 0xb7a60130}, \
{0x14, 0x90170110}, \
{0x21, 0x04211020}
#define ALC298_STANDARD_PINS \
{0x12, 0x90a60130}, \
{0x21, 0x03211020}
static const struct snd_hda_pin_quirk alc269_pin_fixup_tbl[] = {
SND_HDA_PIN_QUIRK(0x10ec0221, 0x103c, "HP Workstation", ALC221_FIXUP_HP_HEADSET_MIC,
{0x14, 0x01014020},
{0x17, 0x90170110},
{0x18, 0x02a11030},
{0x19, 0x0181303F},
{0x21, 0x0221102f}),
SND_HDA_PIN_QUIRK(0x10ec0255, 0x1025, "Acer", ALC255_FIXUP_ACER_MIC_NO_PRESENCE,
{0x12, 0x90a601c0},
{0x14, 0x90171120},
{0x21, 0x02211030}),
SND_HDA_PIN_QUIRK(0x10ec0255, 0x1043, "ASUS", ALC255_FIXUP_ASUS_MIC_NO_PRESENCE,
{0x14, 0x90170110},
{0x1b, 0x90a70130},
{0x21, 0x03211020}),
SND_HDA_PIN_QUIRK(0x10ec0255, 0x1043, "ASUS", ALC255_FIXUP_ASUS_MIC_NO_PRESENCE,
{0x1a, 0x90a70130},
{0x1b, 0x90170110},
{0x21, 0x03211020}),
SND_HDA_PIN_QUIRK(0x10ec0225, 0x1028, "Dell", ALC225_FIXUP_DELL1_MIC_NO_PRESENCE,
ALC225_STANDARD_PINS,
{0x12, 0xb7a60130},
{0x14, 0x901701a0}),
SND_HDA_PIN_QUIRK(0x10ec0225, 0x1028, "Dell", ALC225_FIXUP_DELL1_MIC_NO_PRESENCE,
ALC225_STANDARD_PINS,
{0x12, 0xb7a60130},
{0x14, 0x901701b0}),
SND_HDA_PIN_QUIRK(0x10ec0225, 0x1028, "Dell", ALC225_FIXUP_DELL1_MIC_NO_PRESENCE,
ALC225_STANDARD_PINS,
{0x12, 0xb7a60150},
{0x14, 0x901701a0}),
SND_HDA_PIN_QUIRK(0x10ec0225, 0x1028, "Dell", ALC225_FIXUP_DELL1_MIC_NO_PRESENCE,
ALC225_STANDARD_PINS,
{0x12, 0xb7a60150},
{0x14, 0x901701b0}),
SND_HDA_PIN_QUIRK(0x10ec0225, 0x1028, "Dell", ALC225_FIXUP_DELL1_MIC_NO_PRESENCE,
ALC225_STANDARD_PINS,
{0x12, 0xb7a60130},
{0x1b, 0x90170110}),
SND_HDA_PIN_QUIRK(0x10ec0233, 0x8086, "Intel NUC Skull Canyon", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE,
{0x1b, 0x01111010},
{0x1e, 0x01451130},
{0x21, 0x02211020}),
SND_HDA_PIN_QUIRK(0x10ec0235, 0x17aa, "Lenovo", ALC233_FIXUP_LENOVO_LINE2_MIC_HOTKEY,
{0x12, 0x90a60140},
{0x14, 0x90170110},
{0x19, 0x02a11030},
{0x21, 0x02211020}),
SND_HDA_PIN_QUIRK(0x10ec0235, 0x17aa, "Lenovo", ALC294_FIXUP_LENOVO_MIC_LOCATION,
{0x14, 0x90170110},
{0x19, 0x02a11030},
{0x1a, 0x02a11040},
{0x1b, 0x01014020},
{0x21, 0x0221101f}),
SND_HDA_PIN_QUIRK(0x10ec0235, 0x17aa, "Lenovo", ALC294_FIXUP_LENOVO_MIC_LOCATION,
{0x14, 0x90170110},
{0x19, 0x02a11030},
{0x1a, 0x02a11040},
{0x1b, 0x01011020},
{0x21, 0x0221101f}),
SND_HDA_PIN_QUIRK(0x10ec0235, 0x17aa, "Lenovo", ALC294_FIXUP_LENOVO_MIC_LOCATION,
{0x14, 0x90170110},
{0x19, 0x02a11020},
{0x1a, 0x02a11030},
{0x21, 0x0221101f}),
SND_HDA_PIN_QUIRK(0x10ec0236, 0x1028, "Dell", ALC236_FIXUP_DELL_AIO_HEADSET_MIC,
{0x21, 0x02211010}),
SND_HDA_PIN_QUIRK(0x10ec0236, 0x103c, "HP", ALC256_FIXUP_HP_HEADSET_MIC,
{0x14, 0x90170110},
{0x19, 0x02a11020},
{0x21, 0x02211030}),
SND_HDA_PIN_QUIRK(0x10ec0255, 0x1028, "Dell", ALC255_FIXUP_DELL2_MIC_NO_PRESENCE,
{0x14, 0x90170110},
{0x21, 0x02211020}),
SND_HDA_PIN_QUIRK(0x10ec0255, 0x1028, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE,
{0x14, 0x90170130},
{0x21, 0x02211040}),
SND_HDA_PIN_QUIRK(0x10ec0255, 0x1028, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE,
{0x12, 0x90a60140},
{0x14, 0x90170110},
{0x21, 0x02211020}),
SND_HDA_PIN_QUIRK(0x10ec0255, 0x1028, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE,
{0x12, 0x90a60160},
{0x14, 0x90170120},
{0x21, 0x02211030}),
SND_HDA_PIN_QUIRK(0x10ec0255, 0x1028, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE,
{0x14, 0x90170110},
{0x1b, 0x02011020},
{0x21, 0x0221101f}),
SND_HDA_PIN_QUIRK(0x10ec0255, 0x1028, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE,
{0x14, 0x90170110},
{0x1b, 0x01011020},
{0x21, 0x0221101f}),
SND_HDA_PIN_QUIRK(0x10ec0255, 0x1028, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE,
{0x14, 0x90170130},
{0x1b, 0x01014020},
{0x21, 0x0221103f}),
SND_HDA_PIN_QUIRK(0x10ec0255, 0x1028, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE,
{0x14, 0x90170130},
{0x1b, 0x01011020},
{0x21, 0x0221103f}),
SND_HDA_PIN_QUIRK(0x10ec0255, 0x1028, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE,
{0x14, 0x90170130},
{0x1b, 0x02011020},
{0x21, 0x0221103f}),
SND_HDA_PIN_QUIRK(0x10ec0255, 0x1028, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE,
{0x14, 0x90170150},
{0x1b, 0x02011020},
{0x21, 0x0221105f}),
SND_HDA_PIN_QUIRK(0x10ec0255, 0x1028, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE,
{0x14, 0x90170110},
{0x1b, 0x01014020},
{0x21, 0x0221101f}),
SND_HDA_PIN_QUIRK(0x10ec0255, 0x1028, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE,
{0x12, 0x90a60160},
{0x14, 0x90170120},
{0x17, 0x90170140},
{0x21, 0x0321102f}),
SND_HDA_PIN_QUIRK(0x10ec0255, 0x1028, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE,
{0x12, 0x90a60160},
{0x14, 0x90170130},
{0x21, 0x02211040}),
SND_HDA_PIN_QUIRK(0x10ec0255, 0x1028, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE,
{0x12, 0x90a60160},
{0x14, 0x90170140},
{0x21, 0x02211050}),
SND_HDA_PIN_QUIRK(0x10ec0255, 0x1028, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE,
{0x12, 0x90a60170},
{0x14, 0x90170120},
{0x21, 0x02211030}),
SND_HDA_PIN_QUIRK(0x10ec0255, 0x1028, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE,
{0x12, 0x90a60170},
{0x14, 0x90170130},
{0x21, 0x02211040}),
SND_HDA_PIN_QUIRK(0x10ec0255, 0x1028, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE,
{0x12, 0x90a60170},
{0x14, 0x90171130},
{0x21, 0x02211040}),
SND_HDA_PIN_QUIRK(0x10ec0255, 0x1028, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE,
{0x12, 0x90a60170},
{0x14, 0x90170140},
{0x21, 0x02211050}),
SND_HDA_PIN_QUIRK(0x10ec0255, 0x1028, "Dell Inspiron 5548", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE,
{0x12, 0x90a60180},
{0x14, 0x90170130},
{0x21, 0x02211040}),
SND_HDA_PIN_QUIRK(0x10ec0255, 0x1028, "Dell Inspiron 5565", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE,
{0x12, 0x90a60180},
{0x14, 0x90170120},
{0x21, 0x02211030}),
SND_HDA_PIN_QUIRK(0x10ec0255, 0x1028, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE,
{0x1b, 0x01011020},
{0x21, 0x02211010}),
SND_HDA_PIN_QUIRK(0x10ec0256, 0x1043, "ASUS", ALC256_FIXUP_ASUS_MIC,
{0x14, 0x90170110},
{0x1b, 0x90a70130},
{0x21, 0x04211020}),
SND_HDA_PIN_QUIRK(0x10ec0256, 0x1043, "ASUS", ALC256_FIXUP_ASUS_MIC,
{0x14, 0x90170110},
{0x1b, 0x90a70130},
{0x21, 0x03211020}),
SND_HDA_PIN_QUIRK(0x10ec0256, 0x1043, "ASUS", ALC256_FIXUP_ASUS_MIC_NO_PRESENCE,
{0x12, 0x90a60130},
{0x14, 0x90170110},
{0x21, 0x03211020}),
SND_HDA_PIN_QUIRK(0x10ec0256, 0x1043, "ASUS", ALC256_FIXUP_ASUS_MIC_NO_PRESENCE,
{0x12, 0x90a60130},
{0x14, 0x90170110},
{0x21, 0x04211020}),
SND_HDA_PIN_QUIRK(0x10ec0256, 0x1043, "ASUS", ALC256_FIXUP_ASUS_MIC_NO_PRESENCE,
{0x1a, 0x90a70130},
{0x1b, 0x90170110},
{0x21, 0x03211020}),
SND_HDA_PIN_QUIRK(0x10ec0256, 0x103c, "HP", ALC256_FIXUP_HP_HEADSET_MIC,
{0x14, 0x90170110},
{0x19, 0x02a11020},
{0x21, 0x0221101f}),
SND_HDA_PIN_QUIRK(0x10ec0274, 0x103c, "HP", ALC274_FIXUP_HP_HEADSET_MIC,
{0x17, 0x90170110},
{0x19, 0x03a11030},
{0x21, 0x03211020}),
SND_HDA_PIN_QUIRK(0x10ec0280, 0x103c, "HP", ALC280_FIXUP_HP_GPIO4,
{0x12, 0x90a60130},
{0x14, 0x90170110},
{0x15, 0x0421101f},
{0x1a, 0x04a11020}),
SND_HDA_PIN_QUIRK(0x10ec0280, 0x103c, "HP", ALC269_FIXUP_HP_GPIO_MIC1_LED,
{0x12, 0x90a60140},
{0x14, 0x90170110},
{0x15, 0x0421101f},
{0x18, 0x02811030},
{0x1a, 0x04a1103f},
{0x1b, 0x02011020}),
SND_HDA_PIN_QUIRK(0x10ec0282, 0x103c, "HP 15 Touchsmart", ALC269_FIXUP_HP_MUTE_LED_MIC1,
ALC282_STANDARD_PINS,
{0x12, 0x99a30130},
{0x19, 0x03a11020},
{0x21, 0x0321101f}),
SND_HDA_PIN_QUIRK(0x10ec0282, 0x103c, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1,
ALC282_STANDARD_PINS,
{0x12, 0x99a30130},
{0x19, 0x03a11020},
{0x21, 0x03211040}),
SND_HDA_PIN_QUIRK(0x10ec0282, 0x103c, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1,
ALC282_STANDARD_PINS,
{0x12, 0x99a30130},
{0x19, 0x03a11030},
{0x21, 0x03211020}),
SND_HDA_PIN_QUIRK(0x10ec0282, 0x103c, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1,
ALC282_STANDARD_PINS,
{0x12, 0x99a30130},
{0x19, 0x04a11020},
{0x21, 0x0421101f}),
SND_HDA_PIN_QUIRK(0x10ec0282, 0x103c, "HP", ALC269_FIXUP_HP_LINE1_MIC1_LED,
ALC282_STANDARD_PINS,
{0x12, 0x90a60140},
{0x19, 0x04a11030},
{0x21, 0x04211020}),
SND_HDA_PIN_QUIRK(0x10ec0282, 0x1025, "Acer", ALC282_FIXUP_ACER_DISABLE_LINEOUT,
ALC282_STANDARD_PINS,
{0x12, 0x90a609c0},
{0x18, 0x03a11830},
{0x19, 0x04a19831},
{0x1a, 0x0481303f},
{0x1b, 0x04211020},
{0x21, 0x0321101f}),
SND_HDA_PIN_QUIRK(0x10ec0282, 0x1025, "Acer", ALC282_FIXUP_ACER_DISABLE_LINEOUT,
ALC282_STANDARD_PINS,
{0x12, 0x90a60940},
{0x18, 0x03a11830},
{0x19, 0x04a19831},
{0x1a, 0x0481303f},
{0x1b, 0x04211020},
{0x21, 0x0321101f}),
SND_HDA_PIN_QUIRK(0x10ec0283, 0x1028, "Dell", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE,
ALC282_STANDARD_PINS,
{0x12, 0x90a60130},
{0x21, 0x0321101f}),
SND_HDA_PIN_QUIRK(0x10ec0283, 0x1028, "Dell", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE,
{0x12, 0x90a60160},
{0x14, 0x90170120},
{0x21, 0x02211030}),
SND_HDA_PIN_QUIRK(0x10ec0283, 0x1028, "Dell", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE,
ALC282_STANDARD_PINS,
{0x12, 0x90a60130},
{0x19, 0x03a11020},
{0x21, 0x0321101f}),
SND_HDA_PIN_QUIRK(0x10ec0285, 0x17aa, "Lenovo", ALC285_FIXUP_LENOVO_PC_BEEP_IN_NOISE,
{0x12, 0x90a60130},
{0x14, 0x90170110},
{0x19, 0x04a11040},
{0x21, 0x04211020}),
SND_HDA_PIN_QUIRK(0x10ec0285, 0x17aa, "Lenovo", ALC285_FIXUP_LENOVO_PC_BEEP_IN_NOISE,
{0x14, 0x90170110},
{0x19, 0x04a11040},
{0x1d, 0x40600001},
{0x21, 0x04211020}),
SND_HDA_PIN_QUIRK(0x10ec0285, 0x17aa, "Lenovo", ALC285_FIXUP_THINKPAD_NO_BASS_SPK_HEADSET_JACK,
{0x14, 0x90170110},
{0x19, 0x04a11040},
{0x21, 0x04211020}),
SND_HDA_PIN_QUIRK(0x10ec0287, 0x17aa, "Lenovo", ALC285_FIXUP_THINKPAD_HEADSET_JACK,
{0x14, 0x90170110},
{0x17, 0x90170111},
{0x19, 0x03a11030},
{0x21, 0x03211020}),
SND_HDA_PIN_QUIRK(0x10ec0287, 0x17aa, "Lenovo", ALC287_FIXUP_THINKPAD_I2S_SPK,
{0x17, 0x90170110},
{0x19, 0x03a11030},
{0x21, 0x03211020}),
SND_HDA_PIN_QUIRK(0x10ec0287, 0x17aa, "Lenovo", ALC287_FIXUP_THINKPAD_I2S_SPK,
{0x17, 0x90170110}, /* 0x231f with RTK I2S AMP */
{0x19, 0x04a11040},
{0x21, 0x04211020}),
SND_HDA_PIN_QUIRK(0x10ec0286, 0x1025, "Acer", ALC286_FIXUP_ACER_AIO_MIC_NO_PRESENCE,
{0x12, 0x90a60130},
{0x17, 0x90170110},
{0x21, 0x02211020}),
SND_HDA_PIN_QUIRK(0x10ec0288, 0x1028, "Dell", ALC288_FIXUP_DELL1_MIC_NO_PRESENCE,
{0x12, 0x90a60120},
{0x14, 0x90170110},
{0x21, 0x0321101f}),
SND_HDA_PIN_QUIRK(0x10ec0290, 0x103c, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1,
ALC290_STANDARD_PINS,
{0x15, 0x04211040},
{0x18, 0x90170112},
{0x1a, 0x04a11020}),
SND_HDA_PIN_QUIRK(0x10ec0290, 0x103c, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1,
ALC290_STANDARD_PINS,
{0x15, 0x04211040},
{0x18, 0x90170110},
{0x1a, 0x04a11020}),
SND_HDA_PIN_QUIRK(0x10ec0290, 0x103c, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1,
ALC290_STANDARD_PINS,
{0x15, 0x0421101f},
{0x1a, 0x04a11020}),
SND_HDA_PIN_QUIRK(0x10ec0290, 0x103c, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1,
ALC290_STANDARD_PINS,
{0x15, 0x04211020},
{0x1a, 0x04a11040}),
SND_HDA_PIN_QUIRK(0x10ec0290, 0x103c, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1,
ALC290_STANDARD_PINS,
{0x14, 0x90170110},
{0x15, 0x04211020},
{0x1a, 0x04a11040}),
SND_HDA_PIN_QUIRK(0x10ec0290, 0x103c, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1,
ALC290_STANDARD_PINS,
{0x14, 0x90170110},
{0x15, 0x04211020},
{0x1a, 0x04a11020}),
SND_HDA_PIN_QUIRK(0x10ec0290, 0x103c, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1,
ALC290_STANDARD_PINS,
{0x14, 0x90170110},
{0x15, 0x0421101f},
{0x1a, 0x04a11020}),
SND_HDA_PIN_QUIRK(0x10ec0292, 0x1028, "Dell", ALC269_FIXUP_DELL2_MIC_NO_PRESENCE,
ALC292_STANDARD_PINS,
{0x12, 0x90a60140},
{0x16, 0x01014020},
{0x19, 0x01a19030}),
SND_HDA_PIN_QUIRK(0x10ec0292, 0x1028, "Dell", ALC269_FIXUP_DELL2_MIC_NO_PRESENCE,
ALC292_STANDARD_PINS,
{0x12, 0x90a60140},
{0x16, 0x01014020},
{0x18, 0x02a19031},
{0x19, 0x01a1903e}),
SND_HDA_PIN_QUIRK(0x10ec0292, 0x1028, "Dell", ALC269_FIXUP_DELL3_MIC_NO_PRESENCE,
ALC292_STANDARD_PINS,
{0x12, 0x90a60140}),
SND_HDA_PIN_QUIRK(0x10ec0293, 0x1028, "Dell", ALC293_FIXUP_DELL1_MIC_NO_PRESENCE,
ALC292_STANDARD_PINS,
{0x13, 0x90a60140},
{0x16, 0x21014020},
{0x19, 0x21a19030}),
SND_HDA_PIN_QUIRK(0x10ec0293, 0x1028, "Dell", ALC293_FIXUP_DELL1_MIC_NO_PRESENCE,
ALC292_STANDARD_PINS,
{0x13, 0x90a60140}),
SND_HDA_PIN_QUIRK(0x10ec0294, 0x1043, "ASUS", ALC294_FIXUP_ASUS_HPE,
{0x17, 0x90170110},
{0x21, 0x04211020}),
SND_HDA_PIN_QUIRK(0x10ec0294, 0x1043, "ASUS", ALC294_FIXUP_ASUS_MIC,
{0x14, 0x90170110},
{0x1b, 0x90a70130},
{0x21, 0x04211020}),
SND_HDA_PIN_QUIRK(0x10ec0294, 0x1043, "ASUS", ALC294_FIXUP_ASUS_SPK,
{0x12, 0x90a60130},
{0x17, 0x90170110},
{0x21, 0x03211020}),
SND_HDA_PIN_QUIRK(0x10ec0294, 0x1043, "ASUS", ALC294_FIXUP_ASUS_SPK,
{0x12, 0x90a60130},
{0x17, 0x90170110},
{0x21, 0x04211020}),
SND_HDA_PIN_QUIRK(0x10ec0295, 0x1043, "ASUS", ALC294_FIXUP_ASUS_SPK,
{0x12, 0x90a60130},
{0x17, 0x90170110},
{0x21, 0x03211020}),
SND_HDA_PIN_QUIRK(0x10ec0295, 0x1043, "ASUS", ALC295_FIXUP_ASUS_MIC_NO_PRESENCE,
{0x12, 0x90a60120},
{0x17, 0x90170110},
{0x21, 0x04211030}),
SND_HDA_PIN_QUIRK(0x10ec0295, 0x1043, "ASUS", ALC295_FIXUP_ASUS_MIC_NO_PRESENCE,
{0x12, 0x90a60130},
{0x17, 0x90170110},
{0x21, 0x03211020}),
SND_HDA_PIN_QUIRK(0x10ec0295, 0x1043, "ASUS", ALC295_FIXUP_ASUS_MIC_NO_PRESENCE,
{0x12, 0x90a60130},
{0x17, 0x90170110},
{0x21, 0x03211020}),
SND_HDA_PIN_QUIRK(0x10ec0295, 0x1028, "Dell", ALC269_FIXUP_DELL4_MIC_NO_PRESENCE,
{0x14, 0x90170110},
{0x21, 0x04211020}),
SND_HDA_PIN_QUIRK(0x10ec0295, 0x1028, "Dell", ALC269_FIXUP_DELL4_MIC_NO_PRESENCE,
{0x14, 0x90170110},
{0x21, 0x04211030}),
SND_HDA_PIN_QUIRK(0x10ec0295, 0x1028, "Dell", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE,
ALC295_STANDARD_PINS,
{0x17, 0x21014020},
{0x18, 0x21a19030}),
SND_HDA_PIN_QUIRK(0x10ec0295, 0x1028, "Dell", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE,
ALC295_STANDARD_PINS,
{0x17, 0x21014040},
{0x18, 0x21a19050}),
SND_HDA_PIN_QUIRK(0x10ec0295, 0x1028, "Dell", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE,
ALC295_STANDARD_PINS),
SND_HDA_PIN_QUIRK(0x10ec0298, 0x1028, "Dell", ALC298_FIXUP_DELL1_MIC_NO_PRESENCE,
ALC298_STANDARD_PINS,
{0x17, 0x90170110}),
SND_HDA_PIN_QUIRK(0x10ec0298, 0x1028, "Dell", ALC298_FIXUP_DELL1_MIC_NO_PRESENCE,
ALC298_STANDARD_PINS,
{0x17, 0x90170140}),
SND_HDA_PIN_QUIRK(0x10ec0298, 0x1028, "Dell", ALC298_FIXUP_DELL1_MIC_NO_PRESENCE,
ALC298_STANDARD_PINS,
{0x17, 0x90170150}),
SND_HDA_PIN_QUIRK(0x10ec0298, 0x1028, "Dell", ALC298_FIXUP_SPK_VOLUME,
{0x12, 0xb7a60140},
{0x13, 0xb7a60150},
{0x17, 0x90170110},
{0x1a, 0x03011020},
{0x21, 0x03211030}),
SND_HDA_PIN_QUIRK(0x10ec0298, 0x1028, "Dell", ALC298_FIXUP_ALIENWARE_MIC_NO_PRESENCE,
{0x12, 0xb7a60140},
{0x17, 0x90170110},
{0x1a, 0x03a11030},
{0x21, 0x03211020}),
SND_HDA_PIN_QUIRK(0x10ec0299, 0x1028, "Dell", ALC269_FIXUP_DELL4_MIC_NO_PRESENCE,
ALC225_STANDARD_PINS,
{0x12, 0xb7a60130},
{0x17, 0x90170110}),
SND_HDA_PIN_QUIRK(0x10ec0623, 0x17aa, "Lenovo", ALC283_FIXUP_HEADSET_MIC,
{0x14, 0x01014010},
{0x17, 0x90170120},
{0x18, 0x02a11030},
{0x19, 0x02a1103f},
{0x21, 0x0221101f}),
{}
};
/* This is the fallback pin_fixup_tbl for alc269 family, to make the tbl match
* more machines, don't need to match all valid pins, just need to match
* all the pins defined in the tbl. Just because of this reason, it is possible
* that a single machine matches multiple tbls, so there is one limitation:
* at most one tbl is allowed to define for the same vendor and same codec
*/
static const struct snd_hda_pin_quirk alc269_fallback_pin_fixup_tbl[] = {
SND_HDA_PIN_QUIRK(0x10ec0289, 0x1028, "Dell", ALC269_FIXUP_DELL4_MIC_NO_PRESENCE,
{0x19, 0x40000000},
{0x1b, 0x40000000}),
SND_HDA_PIN_QUIRK(0x10ec0256, 0x1028, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE,
{0x19, 0x40000000},
{0x1a, 0x40000000}),
SND_HDA_PIN_QUIRK(0x10ec0236, 0x1028, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE,
{0x19, 0x40000000},
{0x1a, 0x40000000}),
SND_HDA_PIN_QUIRK(0x10ec0274, 0x1028, "Dell", ALC274_FIXUP_DELL_AIO_LINEOUT_VERB,
{0x19, 0x40000000},
{0x1a, 0x40000000}),
{}
};
static void alc269_fill_coef(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
int val;
if (spec->codec_variant != ALC269_TYPE_ALC269VB)
return;
if ((alc_get_coef0(codec) & 0x00ff) < 0x015) {
alc_write_coef_idx(codec, 0xf, 0x960b);
alc_write_coef_idx(codec, 0xe, 0x8817);
}
if ((alc_get_coef0(codec) & 0x00ff) == 0x016) {
alc_write_coef_idx(codec, 0xf, 0x960b);
alc_write_coef_idx(codec, 0xe, 0x8814);
}
if ((alc_get_coef0(codec) & 0x00ff) == 0x017) {
/* Power up output pin */
alc_update_coef_idx(codec, 0x04, 0, 1<<11);
}
if ((alc_get_coef0(codec) & 0x00ff) == 0x018) {
val = alc_read_coef_idx(codec, 0xd);
if (val != -1 && (val & 0x0c00) >> 10 != 0x1) {
/* Capless ramp up clock control */
alc_write_coef_idx(codec, 0xd, val | (1<<10));
}
val = alc_read_coef_idx(codec, 0x17);
if (val != -1 && (val & 0x01c0) >> 6 != 0x4) {
/* Class D power on reset */
alc_write_coef_idx(codec, 0x17, val | (1<<7));
}
}
/* HP */
alc_update_coef_idx(codec, 0x4, 0, 1<<11);
}
/*
*/
static int patch_alc269(struct hda_codec *codec)
{
struct alc_spec *spec;
int err;
err = alc_alloc_spec(codec, 0x0b);
if (err < 0)
return err;
spec = codec->spec;
spec->gen.shared_mic_vref_pin = 0x18;
codec->power_save_node = 0;
spec->en_3kpull_low = true;
#ifdef CONFIG_PM
codec->patch_ops.suspend = alc269_suspend;
codec->patch_ops.resume = alc269_resume;
#endif
spec->shutup = alc_default_shutup;
spec->init_hook = alc_default_init;
switch (codec->core.vendor_id) {
case 0x10ec0269:
spec->codec_variant = ALC269_TYPE_ALC269VA;
switch (alc_get_coef0(codec) & 0x00f0) {
case 0x0010:
if (codec->bus->pci &&
codec->bus->pci->subsystem_vendor == 0x1025 &&
spec->cdefine.platform_type == 1)
err = alc_codec_rename(codec, "ALC271X");
spec->codec_variant = ALC269_TYPE_ALC269VB;
break;
case 0x0020:
if (codec->bus->pci &&
codec->bus->pci->subsystem_vendor == 0x17aa &&
codec->bus->pci->subsystem_device == 0x21f3)
err = alc_codec_rename(codec, "ALC3202");
spec->codec_variant = ALC269_TYPE_ALC269VC;
break;
case 0x0030:
spec->codec_variant = ALC269_TYPE_ALC269VD;
break;
default:
alc_fix_pll_init(codec, 0x20, 0x04, 15);
}
if (err < 0)
goto error;
spec->shutup = alc269_shutup;
spec->init_hook = alc269_fill_coef;
alc269_fill_coef(codec);
break;
case 0x10ec0280:
case 0x10ec0290:
spec->codec_variant = ALC269_TYPE_ALC280;
break;
case 0x10ec0282:
spec->codec_variant = ALC269_TYPE_ALC282;
spec->shutup = alc282_shutup;
spec->init_hook = alc282_init;
break;
case 0x10ec0233:
case 0x10ec0283:
spec->codec_variant = ALC269_TYPE_ALC283;
spec->shutup = alc283_shutup;
spec->init_hook = alc283_init;
break;
case 0x10ec0284:
case 0x10ec0292:
spec->codec_variant = ALC269_TYPE_ALC284;
break;
case 0x10ec0293:
spec->codec_variant = ALC269_TYPE_ALC293;
break;
case 0x10ec0286:
case 0x10ec0288:
spec->codec_variant = ALC269_TYPE_ALC286;
break;
case 0x10ec0298:
spec->codec_variant = ALC269_TYPE_ALC298;
break;
case 0x10ec0235:
case 0x10ec0255:
spec->codec_variant = ALC269_TYPE_ALC255;
spec->shutup = alc256_shutup;
spec->init_hook = alc256_init;
break;
case 0x10ec0230:
case 0x10ec0236:
case 0x10ec0256:
case 0x19e58326:
spec->codec_variant = ALC269_TYPE_ALC256;
spec->shutup = alc256_shutup;
spec->init_hook = alc256_init;
spec->gen.mixer_nid = 0; /* ALC256 does not have any loopback mixer path */
if (codec->core.vendor_id == 0x10ec0236 &&
codec->bus->pci->vendor != PCI_VENDOR_ID_AMD)
spec->en_3kpull_low = false;
break;
case 0x10ec0257:
spec->codec_variant = ALC269_TYPE_ALC257;
spec->shutup = alc256_shutup;
spec->init_hook = alc256_init;
spec->gen.mixer_nid = 0;
spec->en_3kpull_low = false;
break;
case 0x10ec0215:
case 0x10ec0245:
case 0x10ec0285:
case 0x10ec0289:
if (alc_get_coef0(codec) & 0x0010)
spec->codec_variant = ALC269_TYPE_ALC245;
else
spec->codec_variant = ALC269_TYPE_ALC215;
spec->shutup = alc225_shutup;
spec->init_hook = alc225_init;
spec->gen.mixer_nid = 0;
break;
case 0x10ec0225:
case 0x10ec0295:
case 0x10ec0299:
spec->codec_variant = ALC269_TYPE_ALC225;
spec->shutup = alc225_shutup;
spec->init_hook = alc225_init;
spec->gen.mixer_nid = 0; /* no loopback on ALC225, ALC295 and ALC299 */
break;
case 0x10ec0287:
spec->codec_variant = ALC269_TYPE_ALC287;
spec->shutup = alc225_shutup;
spec->init_hook = alc225_init;
spec->gen.mixer_nid = 0; /* no loopback on ALC287 */
break;
case 0x10ec0234:
case 0x10ec0274:
case 0x10ec0294:
spec->codec_variant = ALC269_TYPE_ALC294;
spec->gen.mixer_nid = 0; /* ALC2x4 does not have any loopback mixer path */
alc_update_coef_idx(codec, 0x6b, 0x0018, (1<<4) | (1<<3)); /* UAJ MIC Vref control by verb */
spec->init_hook = alc294_init;
break;
case 0x10ec0300:
spec->codec_variant = ALC269_TYPE_ALC300;
spec->gen.mixer_nid = 0; /* no loopback on ALC300 */
break;
case 0x10ec0623:
spec->codec_variant = ALC269_TYPE_ALC623;
break;
case 0x10ec0700:
case 0x10ec0701:
case 0x10ec0703:
case 0x10ec0711:
spec->codec_variant = ALC269_TYPE_ALC700;
spec->gen.mixer_nid = 0; /* ALC700 does not have any loopback mixer path */
alc_update_coef_idx(codec, 0x4a, 1 << 15, 0); /* Combo jack auto trigger control */
spec->init_hook = alc294_init;
break;
}
if (snd_hda_codec_read(codec, 0x51, 0, AC_VERB_PARAMETERS, 0) == 0x10ec5505) {
spec->has_alc5505_dsp = 1;
spec->init_hook = alc5505_dsp_init;
}
alc_pre_init(codec);
snd_hda_pick_fixup(codec, alc269_fixup_models,
alc269_fixup_tbl, alc269_fixups);
/* FIXME: both TX300 and ROG Strix G17 have the same SSID, and
* the quirk breaks the latter (bko#214101).
* Clear the wrong entry.
*/
if (codec->fixup_id == ALC282_FIXUP_ASUS_TX300 &&
codec->core.vendor_id == 0x10ec0294) {
codec_dbg(codec, "Clear wrong fixup for ASUS ROG Strix G17\n");
codec->fixup_id = HDA_FIXUP_ID_NOT_SET;
}
snd_hda_pick_pin_fixup(codec, alc269_pin_fixup_tbl, alc269_fixups, true);
snd_hda_pick_pin_fixup(codec, alc269_fallback_pin_fixup_tbl, alc269_fixups, false);
snd_hda_pick_fixup(codec, NULL, alc269_fixup_vendor_tbl,
alc269_fixups);
snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
alc_auto_parse_customize_define(codec);
if (has_cdefine_beep(codec))
spec->gen.beep_nid = 0x01;
/* automatic parse from the BIOS config */
err = alc269_parse_auto_config(codec);
if (err < 0)
goto error;
if (!spec->gen.no_analog && spec->gen.beep_nid && spec->gen.mixer_nid) {
err = set_beep_amp(spec, spec->gen.mixer_nid, 0x04, HDA_INPUT);
if (err < 0)
goto error;
}
snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
return 0;
error:
alc_free(codec);
return err;
}
/*
* ALC861
*/
static int alc861_parse_auto_config(struct hda_codec *codec)
{
static const hda_nid_t alc861_ignore[] = { 0x1d, 0 };
static const hda_nid_t alc861_ssids[] = { 0x0e, 0x0f, 0x0b, 0 };
return alc_parse_auto_config(codec, alc861_ignore, alc861_ssids);
}
/* Pin config fixes */
enum {
ALC861_FIXUP_FSC_AMILO_PI1505,
ALC861_FIXUP_AMP_VREF_0F,
ALC861_FIXUP_NO_JACK_DETECT,
ALC861_FIXUP_ASUS_A6RP,
ALC660_FIXUP_ASUS_W7J,
};
/* On some laptops, VREF of pin 0x0f is abused for controlling the main amp */
static void alc861_fixup_asus_amp_vref_0f(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
unsigned int val;
if (action != HDA_FIXUP_ACT_INIT)
return;
val = snd_hda_codec_get_pin_target(codec, 0x0f);
if (!(val & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN)))
val |= AC_PINCTL_IN_EN;
val |= AC_PINCTL_VREF_50;
snd_hda_set_pin_ctl(codec, 0x0f, val);
spec->gen.keep_vref_in_automute = 1;
}
/* suppress the jack-detection */
static void alc_fixup_no_jack_detect(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
if (action == HDA_FIXUP_ACT_PRE_PROBE)
codec->no_jack_detect = 1;
}
static const struct hda_fixup alc861_fixups[] = {
[ALC861_FIXUP_FSC_AMILO_PI1505] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x0b, 0x0221101f }, /* HP */
{ 0x0f, 0x90170310 }, /* speaker */
{ }
}
},
[ALC861_FIXUP_AMP_VREF_0F] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc861_fixup_asus_amp_vref_0f,
},
[ALC861_FIXUP_NO_JACK_DETECT] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_no_jack_detect,
},
[ALC861_FIXUP_ASUS_A6RP] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc861_fixup_asus_amp_vref_0f,
.chained = true,
.chain_id = ALC861_FIXUP_NO_JACK_DETECT,
},
[ALC660_FIXUP_ASUS_W7J] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
/* ASUS W7J needs a magic pin setup on unused NID 0x10
* for enabling outputs
*/
{0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, 0x24},
{ }
},
}
};
static const struct snd_pci_quirk alc861_fixup_tbl[] = {
SND_PCI_QUIRK(0x1043, 0x1253, "ASUS W7J", ALC660_FIXUP_ASUS_W7J),
SND_PCI_QUIRK(0x1043, 0x1263, "ASUS Z35HL", ALC660_FIXUP_ASUS_W7J),
SND_PCI_QUIRK(0x1043, 0x1393, "ASUS A6Rp", ALC861_FIXUP_ASUS_A6RP),
SND_PCI_QUIRK_VENDOR(0x1043, "ASUS laptop", ALC861_FIXUP_AMP_VREF_0F),
SND_PCI_QUIRK(0x1462, 0x7254, "HP DX2200", ALC861_FIXUP_NO_JACK_DETECT),
SND_PCI_QUIRK_VENDOR(0x1584, "Haier/Uniwill", ALC861_FIXUP_AMP_VREF_0F),
SND_PCI_QUIRK(0x1734, 0x10c7, "FSC Amilo Pi1505", ALC861_FIXUP_FSC_AMILO_PI1505),
{}
};
/*
*/
static int patch_alc861(struct hda_codec *codec)
{
struct alc_spec *spec;
int err;
err = alc_alloc_spec(codec, 0x15);
if (err < 0)
return err;
spec = codec->spec;
if (has_cdefine_beep(codec))
spec->gen.beep_nid = 0x23;
#ifdef CONFIG_PM
spec->power_hook = alc_power_eapd;
#endif
alc_pre_init(codec);
snd_hda_pick_fixup(codec, NULL, alc861_fixup_tbl, alc861_fixups);
snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
/* automatic parse from the BIOS config */
err = alc861_parse_auto_config(codec);
if (err < 0)
goto error;
if (!spec->gen.no_analog) {
err = set_beep_amp(spec, 0x23, 0, HDA_OUTPUT);
if (err < 0)
goto error;
}
snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
return 0;
error:
alc_free(codec);
return err;
}
/*
* ALC861-VD support
*
* Based on ALC882
*
* In addition, an independent DAC
*/
static int alc861vd_parse_auto_config(struct hda_codec *codec)
{
static const hda_nid_t alc861vd_ignore[] = { 0x1d, 0 };
static const hda_nid_t alc861vd_ssids[] = { 0x15, 0x1b, 0x14, 0 };
return alc_parse_auto_config(codec, alc861vd_ignore, alc861vd_ssids);
}
enum {
ALC660VD_FIX_ASUS_GPIO1,
ALC861VD_FIX_DALLAS,
};
/* exclude VREF80 */
static void alc861vd_fixup_dallas(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
snd_hda_override_pin_caps(codec, 0x18, 0x00000734);
snd_hda_override_pin_caps(codec, 0x19, 0x0000073c);
}
}
/* reset GPIO1 */
static void alc660vd_fixup_asus_gpio1(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
if (action == HDA_FIXUP_ACT_PRE_PROBE)
spec->gpio_mask |= 0x02;
alc_fixup_gpio(codec, action, 0x01);
}
static const struct hda_fixup alc861vd_fixups[] = {
[ALC660VD_FIX_ASUS_GPIO1] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc660vd_fixup_asus_gpio1,
},
[ALC861VD_FIX_DALLAS] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc861vd_fixup_dallas,
},
};
static const struct snd_pci_quirk alc861vd_fixup_tbl[] = {
SND_PCI_QUIRK(0x103c, 0x30bf, "HP TX1000", ALC861VD_FIX_DALLAS),
SND_PCI_QUIRK(0x1043, 0x1339, "ASUS A7-K", ALC660VD_FIX_ASUS_GPIO1),
SND_PCI_QUIRK(0x1179, 0xff31, "Toshiba L30-149", ALC861VD_FIX_DALLAS),
{}
};
/*
*/
static int patch_alc861vd(struct hda_codec *codec)
{
struct alc_spec *spec;
int err;
err = alc_alloc_spec(codec, 0x0b);
if (err < 0)
return err;
spec = codec->spec;
if (has_cdefine_beep(codec))
spec->gen.beep_nid = 0x23;
spec->shutup = alc_eapd_shutup;
alc_pre_init(codec);
snd_hda_pick_fixup(codec, NULL, alc861vd_fixup_tbl, alc861vd_fixups);
snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
/* automatic parse from the BIOS config */
err = alc861vd_parse_auto_config(codec);
if (err < 0)
goto error;
if (!spec->gen.no_analog) {
err = set_beep_amp(spec, 0x0b, 0x05, HDA_INPUT);
if (err < 0)
goto error;
}
snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
return 0;
error:
alc_free(codec);
return err;
}
/*
* ALC662 support
*
* ALC662 is almost identical with ALC880 but has cleaner and more flexible
* configuration. Each pin widget can choose any input DACs and a mixer.
* Each ADC is connected from a mixer of all inputs. This makes possible
* 6-channel independent captures.
*
* In addition, an independent DAC for the multi-playback (not used in this
* driver yet).
*/
/*
* BIOS auto configuration
*/
static int alc662_parse_auto_config(struct hda_codec *codec)
{
static const hda_nid_t alc662_ignore[] = { 0x1d, 0 };
static const hda_nid_t alc663_ssids[] = { 0x15, 0x1b, 0x14, 0x21 };
static const hda_nid_t alc662_ssids[] = { 0x15, 0x1b, 0x14, 0 };
const hda_nid_t *ssids;
if (codec->core.vendor_id == 0x10ec0272 || codec->core.vendor_id == 0x10ec0663 ||
codec->core.vendor_id == 0x10ec0665 || codec->core.vendor_id == 0x10ec0670 ||
codec->core.vendor_id == 0x10ec0671)
ssids = alc663_ssids;
else
ssids = alc662_ssids;
return alc_parse_auto_config(codec, alc662_ignore, ssids);
}
static void alc272_fixup_mario(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
if (action != HDA_FIXUP_ACT_PRE_PROBE)
return;
if (snd_hda_override_amp_caps(codec, 0x2, HDA_OUTPUT,
(0x3b << AC_AMPCAP_OFFSET_SHIFT) |
(0x3b << AC_AMPCAP_NUM_STEPS_SHIFT) |
(0x03 << AC_AMPCAP_STEP_SIZE_SHIFT) |
(0 << AC_AMPCAP_MUTE_SHIFT)))
codec_warn(codec, "failed to override amp caps for NID 0x2\n");
}
static const struct snd_pcm_chmap_elem asus_pcm_2_1_chmaps[] = {
{ .channels = 2,
.map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR } },
{ .channels = 4,
.map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR,
SNDRV_CHMAP_NA, SNDRV_CHMAP_LFE } }, /* LFE only on right */
{ }
};
/* override the 2.1 chmap */
static void alc_fixup_bass_chmap(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
if (action == HDA_FIXUP_ACT_BUILD) {
struct alc_spec *spec = codec->spec;
spec->gen.pcm_rec[0]->stream[0].chmap = asus_pcm_2_1_chmaps;
}
}
/* avoid D3 for keeping GPIO up */
static unsigned int gpio_led_power_filter(struct hda_codec *codec,
hda_nid_t nid,
unsigned int power_state)
{
struct alc_spec *spec = codec->spec;
if (nid == codec->core.afg && power_state == AC_PWRST_D3 && spec->gpio_data)
return AC_PWRST_D0;
return power_state;
}
static void alc662_fixup_led_gpio1(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
alc_fixup_hp_gpio_led(codec, action, 0x01, 0);
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
spec->mute_led_polarity = 1;
codec->power_filter = gpio_led_power_filter;
}
}
static void alc662_usi_automute_hook(struct hda_codec *codec,
struct hda_jack_callback *jack)
{
struct alc_spec *spec = codec->spec;
int vref;
msleep(200);
snd_hda_gen_hp_automute(codec, jack);
vref = spec->gen.hp_jack_present ? PIN_VREF80 : 0;
msleep(100);
snd_hda_codec_write(codec, 0x19, 0, AC_VERB_SET_PIN_WIDGET_CONTROL,
vref);
}
static void alc662_fixup_usi_headset_mic(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
spec->parse_flags |= HDA_PINCFG_HEADSET_MIC;
spec->gen.hp_automute_hook = alc662_usi_automute_hook;
}
}
static void alc662_aspire_ethos_mute_speakers(struct hda_codec *codec,
struct hda_jack_callback *cb)
{
/* surround speakers at 0x1b already get muted automatically when
* headphones are plugged in, but we have to mute/unmute the remaining
* channels manually:
* 0x15 - front left/front right
* 0x18 - front center/ LFE
*/
if (snd_hda_jack_detect_state(codec, 0x1b) == HDA_JACK_PRESENT) {
snd_hda_set_pin_ctl_cache(codec, 0x15, 0);
snd_hda_set_pin_ctl_cache(codec, 0x18, 0);
} else {
snd_hda_set_pin_ctl_cache(codec, 0x15, PIN_OUT);
snd_hda_set_pin_ctl_cache(codec, 0x18, PIN_OUT);
}
}
static void alc662_fixup_aspire_ethos_hp(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
/* Pin 0x1b: shared headphones jack and surround speakers */
if (!is_jack_detectable(codec, 0x1b))
return;
switch (action) {
case HDA_FIXUP_ACT_PRE_PROBE:
snd_hda_jack_detect_enable_callback(codec, 0x1b,
alc662_aspire_ethos_mute_speakers);
/* subwoofer needs an extra GPIO setting to become audible */
alc_setup_gpio(codec, 0x02);
break;
case HDA_FIXUP_ACT_INIT:
/* Make sure to start in a correct state, i.e. if
* headphones have been plugged in before powering up the system
*/
alc662_aspire_ethos_mute_speakers(codec, NULL);
break;
}
}
static void alc671_fixup_hp_headset_mic2(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
static const struct hda_pintbl pincfgs[] = {
{ 0x19, 0x02a11040 }, /* use as headset mic, with its own jack detect */
{ 0x1b, 0x0181304f },
{ }
};
switch (action) {
case HDA_FIXUP_ACT_PRE_PROBE:
spec->gen.mixer_nid = 0;
spec->parse_flags |= HDA_PINCFG_HEADSET_MIC;
snd_hda_apply_pincfgs(codec, pincfgs);
break;
case HDA_FIXUP_ACT_INIT:
alc_write_coef_idx(codec, 0x19, 0xa054);
break;
}
}
static void alc897_hp_automute_hook(struct hda_codec *codec,
struct hda_jack_callback *jack)
{
struct alc_spec *spec = codec->spec;
int vref;
snd_hda_gen_hp_automute(codec, jack);
vref = spec->gen.hp_jack_present ? (PIN_HP | AC_PINCTL_VREF_100) : PIN_HP;
snd_hda_codec_write(codec, 0x1b, 0, AC_VERB_SET_PIN_WIDGET_CONTROL,
vref);
}
static void alc897_fixup_lenovo_headset_mic(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
spec->gen.hp_automute_hook = alc897_hp_automute_hook;
}
}
static void alc897_fixup_lenovo_headset_mode(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct alc_spec *spec = codec->spec;
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
spec->parse_flags |= HDA_PINCFG_HEADSET_MIC;
spec->gen.hp_automute_hook = alc897_hp_automute_hook;
}
}
static const struct coef_fw alc668_coefs[] = {
WRITE_COEF(0x01, 0xbebe), WRITE_COEF(0x02, 0xaaaa), WRITE_COEF(0x03, 0x0),
WRITE_COEF(0x04, 0x0180), WRITE_COEF(0x06, 0x0), WRITE_COEF(0x07, 0x0f80),
WRITE_COEF(0x08, 0x0031), WRITE_COEF(0x0a, 0x0060), WRITE_COEF(0x0b, 0x0),
WRITE_COEF(0x0c, 0x7cf7), WRITE_COEF(0x0d, 0x1080), WRITE_COEF(0x0e, 0x7f7f),
WRITE_COEF(0x0f, 0xcccc), WRITE_COEF(0x10, 0xddcc), WRITE_COEF(0x11, 0x0001),
WRITE_COEF(0x13, 0x0), WRITE_COEF(0x14, 0x2aa0), WRITE_COEF(0x17, 0xa940),
WRITE_COEF(0x19, 0x0), WRITE_COEF(0x1a, 0x0), WRITE_COEF(0x1b, 0x0),
WRITE_COEF(0x1c, 0x0), WRITE_COEF(0x1d, 0x0), WRITE_COEF(0x1e, 0x7418),
WRITE_COEF(0x1f, 0x0804), WRITE_COEF(0x20, 0x4200), WRITE_COEF(0x21, 0x0468),
WRITE_COEF(0x22, 0x8ccc), WRITE_COEF(0x23, 0x0250), WRITE_COEF(0x24, 0x7418),
WRITE_COEF(0x27, 0x0), WRITE_COEF(0x28, 0x8ccc), WRITE_COEF(0x2a, 0xff00),
WRITE_COEF(0x2b, 0x8000), WRITE_COEF(0xa7, 0xff00), WRITE_COEF(0xa8, 0x8000),
WRITE_COEF(0xaa, 0x2e17), WRITE_COEF(0xab, 0xa0c0), WRITE_COEF(0xac, 0x0),
WRITE_COEF(0xad, 0x0), WRITE_COEF(0xae, 0x2ac6), WRITE_COEF(0xaf, 0xa480),
WRITE_COEF(0xb0, 0x0), WRITE_COEF(0xb1, 0x0), WRITE_COEF(0xb2, 0x0),
WRITE_COEF(0xb3, 0x0), WRITE_COEF(0xb4, 0x0), WRITE_COEF(0xb5, 0x1040),
WRITE_COEF(0xb6, 0xd697), WRITE_COEF(0xb7, 0x902b), WRITE_COEF(0xb8, 0xd697),
WRITE_COEF(0xb9, 0x902b), WRITE_COEF(0xba, 0xb8ba), WRITE_COEF(0xbb, 0xaaab),
WRITE_COEF(0xbc, 0xaaaf), WRITE_COEF(0xbd, 0x6aaa), WRITE_COEF(0xbe, 0x1c02),
WRITE_COEF(0xc0, 0x00ff), WRITE_COEF(0xc1, 0x0fa6),
{}
};
static void alc668_restore_default_value(struct hda_codec *codec)
{
alc_process_coef_fw(codec, alc668_coefs);
}
enum {
ALC662_FIXUP_ASPIRE,
ALC662_FIXUP_LED_GPIO1,
ALC662_FIXUP_IDEAPAD,
ALC272_FIXUP_MARIO,
ALC662_FIXUP_CZC_ET26,
ALC662_FIXUP_CZC_P10T,
ALC662_FIXUP_SKU_IGNORE,
ALC662_FIXUP_HP_RP5800,
ALC662_FIXUP_ASUS_MODE1,
ALC662_FIXUP_ASUS_MODE2,
ALC662_FIXUP_ASUS_MODE3,
ALC662_FIXUP_ASUS_MODE4,
ALC662_FIXUP_ASUS_MODE5,
ALC662_FIXUP_ASUS_MODE6,
ALC662_FIXUP_ASUS_MODE7,
ALC662_FIXUP_ASUS_MODE8,
ALC662_FIXUP_NO_JACK_DETECT,
ALC662_FIXUP_ZOTAC_Z68,
ALC662_FIXUP_INV_DMIC,
ALC662_FIXUP_DELL_MIC_NO_PRESENCE,
ALC668_FIXUP_DELL_MIC_NO_PRESENCE,
ALC662_FIXUP_HEADSET_MODE,
ALC668_FIXUP_HEADSET_MODE,
ALC662_FIXUP_BASS_MODE4_CHMAP,
ALC662_FIXUP_BASS_16,
ALC662_FIXUP_BASS_1A,
ALC662_FIXUP_BASS_CHMAP,
ALC668_FIXUP_AUTO_MUTE,
ALC668_FIXUP_DELL_DISABLE_AAMIX,
ALC668_FIXUP_DELL_XPS13,
ALC662_FIXUP_ASUS_Nx50,
ALC668_FIXUP_ASUS_Nx51_HEADSET_MODE,
ALC668_FIXUP_ASUS_Nx51,
ALC668_FIXUP_MIC_COEF,
ALC668_FIXUP_ASUS_G751,
ALC891_FIXUP_HEADSET_MODE,
ALC891_FIXUP_DELL_MIC_NO_PRESENCE,
ALC662_FIXUP_ACER_VERITON,
ALC892_FIXUP_ASROCK_MOBO,
ALC662_FIXUP_USI_FUNC,
ALC662_FIXUP_USI_HEADSET_MODE,
ALC662_FIXUP_LENOVO_MULTI_CODECS,
ALC669_FIXUP_ACER_ASPIRE_ETHOS,
ALC669_FIXUP_ACER_ASPIRE_ETHOS_HEADSET,
ALC671_FIXUP_HP_HEADSET_MIC2,
ALC662_FIXUP_ACER_X2660G_HEADSET_MODE,
ALC662_FIXUP_ACER_NITRO_HEADSET_MODE,
ALC668_FIXUP_ASUS_NO_HEADSET_MIC,
ALC668_FIXUP_HEADSET_MIC,
ALC668_FIXUP_MIC_DET_COEF,
ALC897_FIXUP_LENOVO_HEADSET_MIC,
ALC897_FIXUP_HEADSET_MIC_PIN,
ALC897_FIXUP_HP_HSMIC_VERB,
ALC897_FIXUP_LENOVO_HEADSET_MODE,
ALC897_FIXUP_HEADSET_MIC_PIN2,
ALC897_FIXUP_UNIS_H3C_X500S,
};
static const struct hda_fixup alc662_fixups[] = {
[ALC662_FIXUP_ASPIRE] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x15, 0x99130112 }, /* subwoofer */
{ }
}
},
[ALC662_FIXUP_LED_GPIO1] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc662_fixup_led_gpio1,
},
[ALC662_FIXUP_IDEAPAD] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x17, 0x99130112 }, /* subwoofer */
{ }
},
.chained = true,
.chain_id = ALC662_FIXUP_LED_GPIO1,
},
[ALC272_FIXUP_MARIO] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc272_fixup_mario,
},
[ALC662_FIXUP_CZC_ET26] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{0x12, 0x403cc000},
{0x14, 0x90170110}, /* speaker */
{0x15, 0x411111f0},
{0x16, 0x411111f0},
{0x18, 0x01a19030}, /* mic */
{0x19, 0x90a7013f}, /* int-mic */
{0x1a, 0x01014020},
{0x1b, 0x0121401f},
{0x1c, 0x411111f0},
{0x1d, 0x411111f0},
{0x1e, 0x40478e35},
{}
},
.chained = true,
.chain_id = ALC662_FIXUP_SKU_IGNORE
},
[ALC662_FIXUP_CZC_P10T] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
{0x14, AC_VERB_SET_EAPD_BTLENABLE, 0},
{}
}
},
[ALC662_FIXUP_SKU_IGNORE] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_sku_ignore,
},
[ALC662_FIXUP_HP_RP5800] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x14, 0x0221201f }, /* HP out */
{ }
},
.chained = true,
.chain_id = ALC662_FIXUP_SKU_IGNORE
},
[ALC662_FIXUP_ASUS_MODE1] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x14, 0x99130110 }, /* speaker */
{ 0x18, 0x01a19c20 }, /* mic */
{ 0x19, 0x99a3092f }, /* int-mic */
{ 0x21, 0x0121401f }, /* HP out */
{ }
},
.chained = true,
.chain_id = ALC662_FIXUP_SKU_IGNORE
},
[ALC662_FIXUP_ASUS_MODE2] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x14, 0x99130110 }, /* speaker */
{ 0x18, 0x01a19820 }, /* mic */
{ 0x19, 0x99a3092f }, /* int-mic */
{ 0x1b, 0x0121401f }, /* HP out */
{ }
},
.chained = true,
.chain_id = ALC662_FIXUP_SKU_IGNORE
},
[ALC662_FIXUP_ASUS_MODE3] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x14, 0x99130110 }, /* speaker */
{ 0x15, 0x0121441f }, /* HP */
{ 0x18, 0x01a19840 }, /* mic */
{ 0x19, 0x99a3094f }, /* int-mic */
{ 0x21, 0x01211420 }, /* HP2 */
{ }
},
.chained = true,
.chain_id = ALC662_FIXUP_SKU_IGNORE
},
[ALC662_FIXUP_ASUS_MODE4] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x14, 0x99130110 }, /* speaker */
{ 0x16, 0x99130111 }, /* speaker */
{ 0x18, 0x01a19840 }, /* mic */
{ 0x19, 0x99a3094f }, /* int-mic */
{ 0x21, 0x0121441f }, /* HP */
{ }
},
.chained = true,
.chain_id = ALC662_FIXUP_SKU_IGNORE
},
[ALC662_FIXUP_ASUS_MODE5] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x14, 0x99130110 }, /* speaker */
{ 0x15, 0x0121441f }, /* HP */
{ 0x16, 0x99130111 }, /* speaker */
{ 0x18, 0x01a19840 }, /* mic */
{ 0x19, 0x99a3094f }, /* int-mic */
{ }
},
.chained = true,
.chain_id = ALC662_FIXUP_SKU_IGNORE
},
[ALC662_FIXUP_ASUS_MODE6] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x14, 0x99130110 }, /* speaker */
{ 0x15, 0x01211420 }, /* HP2 */
{ 0x18, 0x01a19840 }, /* mic */
{ 0x19, 0x99a3094f }, /* int-mic */
{ 0x1b, 0x0121441f }, /* HP */
{ }
},
.chained = true,
.chain_id = ALC662_FIXUP_SKU_IGNORE
},
[ALC662_FIXUP_ASUS_MODE7] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x14, 0x99130110 }, /* speaker */
{ 0x17, 0x99130111 }, /* speaker */
{ 0x18, 0x01a19840 }, /* mic */
{ 0x19, 0x99a3094f }, /* int-mic */
{ 0x1b, 0x01214020 }, /* HP */
{ 0x21, 0x0121401f }, /* HP */
{ }
},
.chained = true,
.chain_id = ALC662_FIXUP_SKU_IGNORE
},
[ALC662_FIXUP_ASUS_MODE8] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x14, 0x99130110 }, /* speaker */
{ 0x12, 0x99a30970 }, /* int-mic */
{ 0x15, 0x01214020 }, /* HP */
{ 0x17, 0x99130111 }, /* speaker */
{ 0x18, 0x01a19840 }, /* mic */
{ 0x21, 0x0121401f }, /* HP */
{ }
},
.chained = true,
.chain_id = ALC662_FIXUP_SKU_IGNORE
},
[ALC662_FIXUP_NO_JACK_DETECT] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_no_jack_detect,
},
[ALC662_FIXUP_ZOTAC_Z68] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x1b, 0x02214020 }, /* Front HP */
{ }
}
},
[ALC662_FIXUP_INV_DMIC] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_inv_dmic,
},
[ALC668_FIXUP_DELL_XPS13] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_dell_xps13,
.chained = true,
.chain_id = ALC668_FIXUP_DELL_DISABLE_AAMIX
},
[ALC668_FIXUP_DELL_DISABLE_AAMIX] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_disable_aamix,
.chained = true,
.chain_id = ALC668_FIXUP_DELL_MIC_NO_PRESENCE
},
[ALC668_FIXUP_AUTO_MUTE] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_auto_mute_via_amp,
.chained = true,
.chain_id = ALC668_FIXUP_DELL_MIC_NO_PRESENCE
},
[ALC662_FIXUP_DELL_MIC_NO_PRESENCE] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, 0x03a1113c }, /* use as headset mic, without its own jack detect */
/* headphone mic by setting pin control of 0x1b (headphone out) to in + vref_50 */
{ }
},
.chained = true,
.chain_id = ALC662_FIXUP_HEADSET_MODE
},
[ALC662_FIXUP_HEADSET_MODE] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_headset_mode_alc662,
},
[ALC668_FIXUP_DELL_MIC_NO_PRESENCE] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, 0x03a1913d }, /* use as headphone mic, without its own jack detect */
{ 0x1b, 0x03a1113c }, /* use as headset mic, without its own jack detect */
{ }
},
.chained = true,
.chain_id = ALC668_FIXUP_HEADSET_MODE
},
[ALC668_FIXUP_HEADSET_MODE] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_headset_mode_alc668,
},
[ALC662_FIXUP_BASS_MODE4_CHMAP] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_bass_chmap,
.chained = true,
.chain_id = ALC662_FIXUP_ASUS_MODE4
},
[ALC662_FIXUP_BASS_16] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{0x16, 0x80106111}, /* bass speaker */
{}
},
.chained = true,
.chain_id = ALC662_FIXUP_BASS_CHMAP,
},
[ALC662_FIXUP_BASS_1A] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{0x1a, 0x80106111}, /* bass speaker */
{}
},
.chained = true,
.chain_id = ALC662_FIXUP_BASS_CHMAP,
},
[ALC662_FIXUP_BASS_CHMAP] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_bass_chmap,
},
[ALC662_FIXUP_ASUS_Nx50] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_auto_mute_via_amp,
.chained = true,
.chain_id = ALC662_FIXUP_BASS_1A
},
[ALC668_FIXUP_ASUS_Nx51_HEADSET_MODE] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_headset_mode_alc668,
.chain_id = ALC662_FIXUP_BASS_CHMAP
},
[ALC668_FIXUP_ASUS_Nx51] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, 0x03a1913d }, /* use as headphone mic, without its own jack detect */
{ 0x1a, 0x90170151 }, /* bass speaker */
{ 0x1b, 0x03a1113c }, /* use as headset mic, without its own jack detect */
{}
},
.chained = true,
.chain_id = ALC668_FIXUP_ASUS_Nx51_HEADSET_MODE,
},
[ALC668_FIXUP_MIC_COEF] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
{ 0x20, AC_VERB_SET_COEF_INDEX, 0xc3 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x4000 },
{}
},
},
[ALC668_FIXUP_ASUS_G751] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x16, 0x0421101f }, /* HP */
{}
},
.chained = true,
.chain_id = ALC668_FIXUP_MIC_COEF
},
[ALC891_FIXUP_HEADSET_MODE] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_headset_mode,
},
[ALC891_FIXUP_DELL_MIC_NO_PRESENCE] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, 0x03a1913d }, /* use as headphone mic, without its own jack detect */
{ 0x1b, 0x03a1113c }, /* use as headset mic, without its own jack detect */
{ }
},
.chained = true,
.chain_id = ALC891_FIXUP_HEADSET_MODE
},
[ALC662_FIXUP_ACER_VERITON] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x15, 0x50170120 }, /* no internal speaker */
{ }
}
},
[ALC892_FIXUP_ASROCK_MOBO] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x15, 0x40f000f0 }, /* disabled */
{ 0x16, 0x40f000f0 }, /* disabled */
{ }
}
},
[ALC662_FIXUP_USI_FUNC] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc662_fixup_usi_headset_mic,
},
[ALC662_FIXUP_USI_HEADSET_MODE] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, 0x02a1913c }, /* use as headset mic, without its own jack detect */
{ 0x18, 0x01a1903d },
{ }
},
.chained = true,
.chain_id = ALC662_FIXUP_USI_FUNC
},
[ALC662_FIXUP_LENOVO_MULTI_CODECS] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc233_alc662_fixup_lenovo_dual_codecs,
},
[ALC669_FIXUP_ACER_ASPIRE_ETHOS_HEADSET] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc662_fixup_aspire_ethos_hp,
},
[ALC669_FIXUP_ACER_ASPIRE_ETHOS] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x15, 0x92130110 }, /* front speakers */
{ 0x18, 0x99130111 }, /* center/subwoofer */
{ 0x1b, 0x11130012 }, /* surround plus jack for HP */
{ }
},
.chained = true,
.chain_id = ALC669_FIXUP_ACER_ASPIRE_ETHOS_HEADSET
},
[ALC671_FIXUP_HP_HEADSET_MIC2] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc671_fixup_hp_headset_mic2,
},
[ALC662_FIXUP_ACER_X2660G_HEADSET_MODE] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x1a, 0x02a1113c }, /* use as headset mic, without its own jack detect */
{ }
},
.chained = true,
.chain_id = ALC662_FIXUP_USI_FUNC
},
[ALC662_FIXUP_ACER_NITRO_HEADSET_MODE] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x1a, 0x01a11140 }, /* use as headset mic, without its own jack detect */
{ 0x1b, 0x0221144f },
{ }
},
.chained = true,
.chain_id = ALC662_FIXUP_USI_FUNC
},
[ALC668_FIXUP_ASUS_NO_HEADSET_MIC] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x1b, 0x04a1112c },
{ }
},
.chained = true,
.chain_id = ALC668_FIXUP_HEADSET_MIC
},
[ALC668_FIXUP_HEADSET_MIC] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc269_fixup_headset_mic,
.chained = true,
.chain_id = ALC668_FIXUP_MIC_DET_COEF
},
[ALC668_FIXUP_MIC_DET_COEF] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x15 },
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0d60 },
{}
},
},
[ALC897_FIXUP_LENOVO_HEADSET_MIC] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc897_fixup_lenovo_headset_mic,
},
[ALC897_FIXUP_HEADSET_MIC_PIN] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x1a, 0x03a11050 },
{ }
},
.chained = true,
.chain_id = ALC897_FIXUP_LENOVO_HEADSET_MIC
},
[ALC897_FIXUP_HP_HSMIC_VERB] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x19, 0x01a1913c }, /* use as headset mic, without its own jack detect */
{ }
},
},
[ALC897_FIXUP_LENOVO_HEADSET_MODE] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc897_fixup_lenovo_headset_mode,
},
[ALC897_FIXUP_HEADSET_MIC_PIN2] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x1a, 0x01a11140 }, /* use as headset mic, without its own jack detect */
{ }
},
.chained = true,
.chain_id = ALC897_FIXUP_LENOVO_HEADSET_MODE
},
[ALC897_FIXUP_UNIS_H3C_X500S] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = (const struct hda_verb[]) {
{ 0x14, AC_VERB_SET_EAPD_BTLENABLE, 0 },
{}
},
},
};
static const struct snd_pci_quirk alc662_fixup_tbl[] = {
SND_PCI_QUIRK(0x1019, 0x9087, "ECS", ALC662_FIXUP_ASUS_MODE2),
SND_PCI_QUIRK(0x1025, 0x022f, "Acer Aspire One", ALC662_FIXUP_INV_DMIC),
SND_PCI_QUIRK(0x1025, 0x0241, "Packard Bell DOTS", ALC662_FIXUP_INV_DMIC),
SND_PCI_QUIRK(0x1025, 0x0308, "Acer Aspire 8942G", ALC662_FIXUP_ASPIRE),
SND_PCI_QUIRK(0x1025, 0x031c, "Gateway NV79", ALC662_FIXUP_SKU_IGNORE),
SND_PCI_QUIRK(0x1025, 0x0349, "eMachines eM250", ALC662_FIXUP_INV_DMIC),
SND_PCI_QUIRK(0x1025, 0x034a, "Gateway LT27", ALC662_FIXUP_INV_DMIC),
SND_PCI_QUIRK(0x1025, 0x038b, "Acer Aspire 8943G", ALC662_FIXUP_ASPIRE),
SND_PCI_QUIRK(0x1025, 0x0566, "Acer Aspire Ethos 8951G", ALC669_FIXUP_ACER_ASPIRE_ETHOS),
SND_PCI_QUIRK(0x1025, 0x123c, "Acer Nitro N50-600", ALC662_FIXUP_ACER_NITRO_HEADSET_MODE),
SND_PCI_QUIRK(0x1025, 0x124e, "Acer 2660G", ALC662_FIXUP_ACER_X2660G_HEADSET_MODE),
SND_PCI_QUIRK(0x1028, 0x05d8, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1028, 0x05db, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1028, 0x05fe, "Dell XPS 15", ALC668_FIXUP_DELL_XPS13),
SND_PCI_QUIRK(0x1028, 0x060a, "Dell XPS 13", ALC668_FIXUP_DELL_XPS13),
SND_PCI_QUIRK(0x1028, 0x060d, "Dell M3800", ALC668_FIXUP_DELL_XPS13),
SND_PCI_QUIRK(0x1028, 0x0625, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1028, 0x0626, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1028, 0x0696, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1028, 0x0698, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1028, 0x069f, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x103c, 0x1632, "HP RP5800", ALC662_FIXUP_HP_RP5800),
SND_PCI_QUIRK(0x103c, 0x870c, "HP", ALC897_FIXUP_HP_HSMIC_VERB),
SND_PCI_QUIRK(0x103c, 0x8719, "HP", ALC897_FIXUP_HP_HSMIC_VERB),
SND_PCI_QUIRK(0x103c, 0x872b, "HP", ALC897_FIXUP_HP_HSMIC_VERB),
SND_PCI_QUIRK(0x103c, 0x873e, "HP", ALC671_FIXUP_HP_HEADSET_MIC2),
SND_PCI_QUIRK(0x103c, 0x8768, "HP Slim Desktop S01", ALC671_FIXUP_HP_HEADSET_MIC2),
SND_PCI_QUIRK(0x103c, 0x877e, "HP 288 Pro G6", ALC671_FIXUP_HP_HEADSET_MIC2),
SND_PCI_QUIRK(0x103c, 0x885f, "HP 288 Pro G8", ALC671_FIXUP_HP_HEADSET_MIC2),
SND_PCI_QUIRK(0x1043, 0x1080, "Asus UX501VW", ALC668_FIXUP_HEADSET_MODE),
SND_PCI_QUIRK(0x1043, 0x11cd, "Asus N550", ALC662_FIXUP_ASUS_Nx50),
SND_PCI_QUIRK(0x1043, 0x129d, "Asus N750", ALC662_FIXUP_ASUS_Nx50),
SND_PCI_QUIRK(0x1043, 0x12ff, "ASUS G751", ALC668_FIXUP_ASUS_G751),
SND_PCI_QUIRK(0x1043, 0x13df, "Asus N550JX", ALC662_FIXUP_BASS_1A),
SND_PCI_QUIRK(0x1043, 0x1477, "ASUS N56VZ", ALC662_FIXUP_BASS_MODE4_CHMAP),
SND_PCI_QUIRK(0x1043, 0x15a7, "ASUS UX51VZH", ALC662_FIXUP_BASS_16),
SND_PCI_QUIRK(0x1043, 0x177d, "ASUS N551", ALC668_FIXUP_ASUS_Nx51),
SND_PCI_QUIRK(0x1043, 0x17bd, "ASUS N751", ALC668_FIXUP_ASUS_Nx51),
SND_PCI_QUIRK(0x1043, 0x185d, "ASUS G551JW", ALC668_FIXUP_ASUS_NO_HEADSET_MIC),
SND_PCI_QUIRK(0x1043, 0x1963, "ASUS X71SL", ALC662_FIXUP_ASUS_MODE8),
SND_PCI_QUIRK(0x1043, 0x1b73, "ASUS N55SF", ALC662_FIXUP_BASS_16),
SND_PCI_QUIRK(0x1043, 0x1bf3, "ASUS N76VZ", ALC662_FIXUP_BASS_MODE4_CHMAP),
SND_PCI_QUIRK(0x1043, 0x8469, "ASUS mobo", ALC662_FIXUP_NO_JACK_DETECT),
SND_PCI_QUIRK(0x105b, 0x0cd6, "Foxconn", ALC662_FIXUP_ASUS_MODE2),
SND_PCI_QUIRK(0x144d, 0xc051, "Samsung R720", ALC662_FIXUP_IDEAPAD),
SND_PCI_QUIRK(0x14cd, 0x5003, "USI", ALC662_FIXUP_USI_HEADSET_MODE),
SND_PCI_QUIRK(0x17aa, 0x1036, "Lenovo P520", ALC662_FIXUP_LENOVO_MULTI_CODECS),
SND_PCI_QUIRK(0x17aa, 0x1057, "Lenovo P360", ALC897_FIXUP_HEADSET_MIC_PIN),
SND_PCI_QUIRK(0x17aa, 0x1064, "Lenovo P3 Tower", ALC897_FIXUP_HEADSET_MIC_PIN),
SND_PCI_QUIRK(0x17aa, 0x32ca, "Lenovo ThinkCentre M80", ALC897_FIXUP_HEADSET_MIC_PIN),
SND_PCI_QUIRK(0x17aa, 0x32cb, "Lenovo ThinkCentre M70", ALC897_FIXUP_HEADSET_MIC_PIN),
SND_PCI_QUIRK(0x17aa, 0x32cf, "Lenovo ThinkCentre M950", ALC897_FIXUP_HEADSET_MIC_PIN),
SND_PCI_QUIRK(0x17aa, 0x32f7, "Lenovo ThinkCentre M90", ALC897_FIXUP_HEADSET_MIC_PIN),
SND_PCI_QUIRK(0x17aa, 0x3321, "Lenovo ThinkCentre M70 Gen4", ALC897_FIXUP_HEADSET_MIC_PIN),
SND_PCI_QUIRK(0x17aa, 0x331b, "Lenovo ThinkCentre M90 Gen4", ALC897_FIXUP_HEADSET_MIC_PIN),
SND_PCI_QUIRK(0x17aa, 0x3742, "Lenovo TianYi510Pro-14IOB", ALC897_FIXUP_HEADSET_MIC_PIN2),
SND_PCI_QUIRK(0x17aa, 0x38af, "Lenovo Ideapad Y550P", ALC662_FIXUP_IDEAPAD),
SND_PCI_QUIRK(0x17aa, 0x3a0d, "Lenovo Ideapad Y550", ALC662_FIXUP_IDEAPAD),
SND_PCI_QUIRK(0x1849, 0x5892, "ASRock B150M", ALC892_FIXUP_ASROCK_MOBO),
SND_PCI_QUIRK(0x19da, 0xa130, "Zotac Z68", ALC662_FIXUP_ZOTAC_Z68),
SND_PCI_QUIRK(0x1b0a, 0x01b8, "ACER Veriton", ALC662_FIXUP_ACER_VERITON),
SND_PCI_QUIRK(0x1b35, 0x1234, "CZC ET26", ALC662_FIXUP_CZC_ET26),
SND_PCI_QUIRK(0x1b35, 0x2206, "CZC P10T", ALC662_FIXUP_CZC_P10T),
SND_PCI_QUIRK(0x1c6c, 0x1239, "Compaq N14JP6-V2", ALC897_FIXUP_HP_HSMIC_VERB),
#if 0
/* Below is a quirk table taken from the old code.
* Basically the device should work as is without the fixup table.
* If BIOS doesn't give a proper info, enable the corresponding
* fixup entry.
*/
SND_PCI_QUIRK(0x1043, 0x1000, "ASUS N50Vm", ALC662_FIXUP_ASUS_MODE1),
SND_PCI_QUIRK(0x1043, 0x1092, "ASUS NB", ALC662_FIXUP_ASUS_MODE3),
SND_PCI_QUIRK(0x1043, 0x1173, "ASUS K73Jn", ALC662_FIXUP_ASUS_MODE1),
SND_PCI_QUIRK(0x1043, 0x11c3, "ASUS M70V", ALC662_FIXUP_ASUS_MODE3),
SND_PCI_QUIRK(0x1043, 0x11d3, "ASUS NB", ALC662_FIXUP_ASUS_MODE1),
SND_PCI_QUIRK(0x1043, 0x11f3, "ASUS NB", ALC662_FIXUP_ASUS_MODE2),
SND_PCI_QUIRK(0x1043, 0x1203, "ASUS NB", ALC662_FIXUP_ASUS_MODE1),
SND_PCI_QUIRK(0x1043, 0x1303, "ASUS G60J", ALC662_FIXUP_ASUS_MODE1),
SND_PCI_QUIRK(0x1043, 0x1333, "ASUS G60Jx", ALC662_FIXUP_ASUS_MODE1),
SND_PCI_QUIRK(0x1043, 0x1339, "ASUS NB", ALC662_FIXUP_ASUS_MODE2),
SND_PCI_QUIRK(0x1043, 0x13e3, "ASUS N71JA", ALC662_FIXUP_ASUS_MODE7),
SND_PCI_QUIRK(0x1043, 0x1463, "ASUS N71", ALC662_FIXUP_ASUS_MODE7),
SND_PCI_QUIRK(0x1043, 0x14d3, "ASUS G72", ALC662_FIXUP_ASUS_MODE8),
SND_PCI_QUIRK(0x1043, 0x1563, "ASUS N90", ALC662_FIXUP_ASUS_MODE3),
SND_PCI_QUIRK(0x1043, 0x15d3, "ASUS N50SF F50SF", ALC662_FIXUP_ASUS_MODE1),
SND_PCI_QUIRK(0x1043, 0x16c3, "ASUS NB", ALC662_FIXUP_ASUS_MODE2),
SND_PCI_QUIRK(0x1043, 0x16f3, "ASUS K40C K50C", ALC662_FIXUP_ASUS_MODE2),
SND_PCI_QUIRK(0x1043, 0x1733, "ASUS N81De", ALC662_FIXUP_ASUS_MODE1),
SND_PCI_QUIRK(0x1043, 0x1753, "ASUS NB", ALC662_FIXUP_ASUS_MODE2),
SND_PCI_QUIRK(0x1043, 0x1763, "ASUS NB", ALC662_FIXUP_ASUS_MODE6),
SND_PCI_QUIRK(0x1043, 0x1765, "ASUS NB", ALC662_FIXUP_ASUS_MODE6),
SND_PCI_QUIRK(0x1043, 0x1783, "ASUS NB", ALC662_FIXUP_ASUS_MODE2),
SND_PCI_QUIRK(0x1043, 0x1793, "ASUS F50GX", ALC662_FIXUP_ASUS_MODE1),
SND_PCI_QUIRK(0x1043, 0x17b3, "ASUS F70SL", ALC662_FIXUP_ASUS_MODE3),
SND_PCI_QUIRK(0x1043, 0x17f3, "ASUS X58LE", ALC662_FIXUP_ASUS_MODE2),
SND_PCI_QUIRK(0x1043, 0x1813, "ASUS NB", ALC662_FIXUP_ASUS_MODE2),
SND_PCI_QUIRK(0x1043, 0x1823, "ASUS NB", ALC662_FIXUP_ASUS_MODE5),
SND_PCI_QUIRK(0x1043, 0x1833, "ASUS NB", ALC662_FIXUP_ASUS_MODE6),
SND_PCI_QUIRK(0x1043, 0x1843, "ASUS NB", ALC662_FIXUP_ASUS_MODE2),
SND_PCI_QUIRK(0x1043, 0x1853, "ASUS F50Z", ALC662_FIXUP_ASUS_MODE1),
SND_PCI_QUIRK(0x1043, 0x1864, "ASUS NB", ALC662_FIXUP_ASUS_MODE2),
SND_PCI_QUIRK(0x1043, 0x1876, "ASUS NB", ALC662_FIXUP_ASUS_MODE2),
SND_PCI_QUIRK(0x1043, 0x1893, "ASUS M50Vm", ALC662_FIXUP_ASUS_MODE3),
SND_PCI_QUIRK(0x1043, 0x1894, "ASUS X55", ALC662_FIXUP_ASUS_MODE3),
SND_PCI_QUIRK(0x1043, 0x18b3, "ASUS N80Vc", ALC662_FIXUP_ASUS_MODE1),
SND_PCI_QUIRK(0x1043, 0x18c3, "ASUS VX5", ALC662_FIXUP_ASUS_MODE1),
SND_PCI_QUIRK(0x1043, 0x18d3, "ASUS N81Te", ALC662_FIXUP_ASUS_MODE1),
SND_PCI_QUIRK(0x1043, 0x18f3, "ASUS N505Tp", ALC662_FIXUP_ASUS_MODE1),
SND_PCI_QUIRK(0x1043, 0x1903, "ASUS F5GL", ALC662_FIXUP_ASUS_MODE1),
SND_PCI_QUIRK(0x1043, 0x1913, "ASUS NB", ALC662_FIXUP_ASUS_MODE2),
SND_PCI_QUIRK(0x1043, 0x1933, "ASUS F80Q", ALC662_FIXUP_ASUS_MODE2),
SND_PCI_QUIRK(0x1043, 0x1943, "ASUS Vx3V", ALC662_FIXUP_ASUS_MODE1),
SND_PCI_QUIRK(0x1043, 0x1953, "ASUS NB", ALC662_FIXUP_ASUS_MODE1),
SND_PCI_QUIRK(0x1043, 0x1963, "ASUS X71C", ALC662_FIXUP_ASUS_MODE3),
SND_PCI_QUIRK(0x1043, 0x1983, "ASUS N5051A", ALC662_FIXUP_ASUS_MODE1),
SND_PCI_QUIRK(0x1043, 0x1993, "ASUS N20", ALC662_FIXUP_ASUS_MODE1),
SND_PCI_QUIRK(0x1043, 0x19b3, "ASUS F7Z", ALC662_FIXUP_ASUS_MODE1),
SND_PCI_QUIRK(0x1043, 0x19c3, "ASUS F5Z/F6x", ALC662_FIXUP_ASUS_MODE2),
SND_PCI_QUIRK(0x1043, 0x19e3, "ASUS NB", ALC662_FIXUP_ASUS_MODE1),
SND_PCI_QUIRK(0x1043, 0x19f3, "ASUS NB", ALC662_FIXUP_ASUS_MODE4),
#endif
{}
};
static const struct hda_model_fixup alc662_fixup_models[] = {
{.id = ALC662_FIXUP_ASPIRE, .name = "aspire"},
{.id = ALC662_FIXUP_IDEAPAD, .name = "ideapad"},
{.id = ALC272_FIXUP_MARIO, .name = "mario"},
{.id = ALC662_FIXUP_HP_RP5800, .name = "hp-rp5800"},
{.id = ALC662_FIXUP_ASUS_MODE1, .name = "asus-mode1"},
{.id = ALC662_FIXUP_ASUS_MODE2, .name = "asus-mode2"},
{.id = ALC662_FIXUP_ASUS_MODE3, .name = "asus-mode3"},
{.id = ALC662_FIXUP_ASUS_MODE4, .name = "asus-mode4"},
{.id = ALC662_FIXUP_ASUS_MODE5, .name = "asus-mode5"},
{.id = ALC662_FIXUP_ASUS_MODE6, .name = "asus-mode6"},
{.id = ALC662_FIXUP_ASUS_MODE7, .name = "asus-mode7"},
{.id = ALC662_FIXUP_ASUS_MODE8, .name = "asus-mode8"},
{.id = ALC662_FIXUP_ZOTAC_Z68, .name = "zotac-z68"},
{.id = ALC662_FIXUP_INV_DMIC, .name = "inv-dmic"},
{.id = ALC662_FIXUP_DELL_MIC_NO_PRESENCE, .name = "alc662-headset-multi"},
{.id = ALC668_FIXUP_DELL_MIC_NO_PRESENCE, .name = "dell-headset-multi"},
{.id = ALC662_FIXUP_HEADSET_MODE, .name = "alc662-headset"},
{.id = ALC668_FIXUP_HEADSET_MODE, .name = "alc668-headset"},
{.id = ALC662_FIXUP_BASS_16, .name = "bass16"},
{.id = ALC662_FIXUP_BASS_1A, .name = "bass1a"},
{.id = ALC668_FIXUP_AUTO_MUTE, .name = "automute"},
{.id = ALC668_FIXUP_DELL_XPS13, .name = "dell-xps13"},
{.id = ALC662_FIXUP_ASUS_Nx50, .name = "asus-nx50"},
{.id = ALC668_FIXUP_ASUS_Nx51, .name = "asus-nx51"},
{.id = ALC668_FIXUP_ASUS_G751, .name = "asus-g751"},
{.id = ALC891_FIXUP_HEADSET_MODE, .name = "alc891-headset"},
{.id = ALC891_FIXUP_DELL_MIC_NO_PRESENCE, .name = "alc891-headset-multi"},
{.id = ALC662_FIXUP_ACER_VERITON, .name = "acer-veriton"},
{.id = ALC892_FIXUP_ASROCK_MOBO, .name = "asrock-mobo"},
{.id = ALC662_FIXUP_USI_HEADSET_MODE, .name = "usi-headset"},
{.id = ALC662_FIXUP_LENOVO_MULTI_CODECS, .name = "dual-codecs"},
{.id = ALC669_FIXUP_ACER_ASPIRE_ETHOS, .name = "aspire-ethos"},
{.id = ALC897_FIXUP_UNIS_H3C_X500S, .name = "unis-h3c-x500s"},
{}
};
static const struct snd_hda_pin_quirk alc662_pin_fixup_tbl[] = {
SND_HDA_PIN_QUIRK(0x10ec0867, 0x1028, "Dell", ALC891_FIXUP_DELL_MIC_NO_PRESENCE,
{0x17, 0x02211010},
{0x18, 0x01a19030},
{0x1a, 0x01813040},
{0x21, 0x01014020}),
SND_HDA_PIN_QUIRK(0x10ec0867, 0x1028, "Dell", ALC891_FIXUP_DELL_MIC_NO_PRESENCE,
{0x16, 0x01813030},
{0x17, 0x02211010},
{0x18, 0x01a19040},
{0x21, 0x01014020}),
SND_HDA_PIN_QUIRK(0x10ec0662, 0x1028, "Dell", ALC662_FIXUP_DELL_MIC_NO_PRESENCE,
{0x14, 0x01014010},
{0x18, 0x01a19020},
{0x1a, 0x0181302f},
{0x1b, 0x0221401f}),
SND_HDA_PIN_QUIRK(0x10ec0668, 0x1028, "Dell", ALC668_FIXUP_AUTO_MUTE,
{0x12, 0x99a30130},
{0x14, 0x90170110},
{0x15, 0x0321101f},
{0x16, 0x03011020}),
SND_HDA_PIN_QUIRK(0x10ec0668, 0x1028, "Dell", ALC668_FIXUP_AUTO_MUTE,
{0x12, 0x99a30140},
{0x14, 0x90170110},
{0x15, 0x0321101f},
{0x16, 0x03011020}),
SND_HDA_PIN_QUIRK(0x10ec0668, 0x1028, "Dell", ALC668_FIXUP_AUTO_MUTE,
{0x12, 0x99a30150},
{0x14, 0x90170110},
{0x15, 0x0321101f},
{0x16, 0x03011020}),
SND_HDA_PIN_QUIRK(0x10ec0668, 0x1028, "Dell", ALC668_FIXUP_AUTO_MUTE,
{0x14, 0x90170110},
{0x15, 0x0321101f},
{0x16, 0x03011020}),
SND_HDA_PIN_QUIRK(0x10ec0668, 0x1028, "Dell XPS 15", ALC668_FIXUP_AUTO_MUTE,
{0x12, 0x90a60130},
{0x14, 0x90170110},
{0x15, 0x0321101f}),
SND_HDA_PIN_QUIRK(0x10ec0671, 0x103c, "HP cPC", ALC671_FIXUP_HP_HEADSET_MIC2,
{0x14, 0x01014010},
{0x17, 0x90170150},
{0x19, 0x02a11060},
{0x1b, 0x01813030},
{0x21, 0x02211020}),
SND_HDA_PIN_QUIRK(0x10ec0671, 0x103c, "HP cPC", ALC671_FIXUP_HP_HEADSET_MIC2,
{0x14, 0x01014010},
{0x18, 0x01a19040},
{0x1b, 0x01813030},
{0x21, 0x02211020}),
SND_HDA_PIN_QUIRK(0x10ec0671, 0x103c, "HP cPC", ALC671_FIXUP_HP_HEADSET_MIC2,
{0x14, 0x01014020},
{0x17, 0x90170110},
{0x18, 0x01a19050},
{0x1b, 0x01813040},
{0x21, 0x02211030}),
{}
};
/*
*/
static int patch_alc662(struct hda_codec *codec)
{
struct alc_spec *spec;
int err;
err = alc_alloc_spec(codec, 0x0b);
if (err < 0)
return err;
spec = codec->spec;
spec->shutup = alc_eapd_shutup;
/* handle multiple HPs as is */
spec->parse_flags = HDA_PINCFG_NO_HP_FIXUP;
alc_fix_pll_init(codec, 0x20, 0x04, 15);
switch (codec->core.vendor_id) {
case 0x10ec0668:
spec->init_hook = alc668_restore_default_value;
break;
}
alc_pre_init(codec);
snd_hda_pick_fixup(codec, alc662_fixup_models,
alc662_fixup_tbl, alc662_fixups);
snd_hda_pick_pin_fixup(codec, alc662_pin_fixup_tbl, alc662_fixups, true);
snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
alc_auto_parse_customize_define(codec);
if (has_cdefine_beep(codec))
spec->gen.beep_nid = 0x01;
if ((alc_get_coef0(codec) & (1 << 14)) &&
codec->bus->pci && codec->bus->pci->subsystem_vendor == 0x1025 &&
spec->cdefine.platform_type == 1) {
err = alc_codec_rename(codec, "ALC272X");
if (err < 0)
goto error;
}
/* automatic parse from the BIOS config */
err = alc662_parse_auto_config(codec);
if (err < 0)
goto error;
if (!spec->gen.no_analog && spec->gen.beep_nid) {
switch (codec->core.vendor_id) {
case 0x10ec0662:
err = set_beep_amp(spec, 0x0b, 0x05, HDA_INPUT);
break;
case 0x10ec0272:
case 0x10ec0663:
case 0x10ec0665:
case 0x10ec0668:
err = set_beep_amp(spec, 0x0b, 0x04, HDA_INPUT);
break;
case 0x10ec0273:
err = set_beep_amp(spec, 0x0b, 0x03, HDA_INPUT);
break;
}
if (err < 0)
goto error;
}
snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
return 0;
error:
alc_free(codec);
return err;
}
/*
* ALC680 support
*/
static int alc680_parse_auto_config(struct hda_codec *codec)
{
return alc_parse_auto_config(codec, NULL, NULL);
}
/*
*/
static int patch_alc680(struct hda_codec *codec)
{
int err;
/* ALC680 has no aa-loopback mixer */
err = alc_alloc_spec(codec, 0);
if (err < 0)
return err;
/* automatic parse from the BIOS config */
err = alc680_parse_auto_config(codec);
if (err < 0) {
alc_free(codec);
return err;
}
return 0;
}
/*
* patch entries
*/
static const struct hda_device_id snd_hda_id_realtek[] = {
HDA_CODEC_ENTRY(0x10ec0215, "ALC215", patch_alc269),
HDA_CODEC_ENTRY(0x10ec0221, "ALC221", patch_alc269),
HDA_CODEC_ENTRY(0x10ec0222, "ALC222", patch_alc269),
HDA_CODEC_ENTRY(0x10ec0225, "ALC225", patch_alc269),
HDA_CODEC_ENTRY(0x10ec0230, "ALC236", patch_alc269),
HDA_CODEC_ENTRY(0x10ec0231, "ALC231", patch_alc269),
HDA_CODEC_ENTRY(0x10ec0233, "ALC233", patch_alc269),
HDA_CODEC_ENTRY(0x10ec0234, "ALC234", patch_alc269),
HDA_CODEC_ENTRY(0x10ec0235, "ALC233", patch_alc269),
HDA_CODEC_ENTRY(0x10ec0236, "ALC236", patch_alc269),
HDA_CODEC_ENTRY(0x10ec0245, "ALC245", patch_alc269),
HDA_CODEC_ENTRY(0x10ec0255, "ALC255", patch_alc269),
HDA_CODEC_ENTRY(0x10ec0256, "ALC256", patch_alc269),
HDA_CODEC_ENTRY(0x10ec0257, "ALC257", patch_alc269),
HDA_CODEC_ENTRY(0x10ec0260, "ALC260", patch_alc260),
HDA_CODEC_ENTRY(0x10ec0262, "ALC262", patch_alc262),
HDA_CODEC_ENTRY(0x10ec0267, "ALC267", patch_alc268),
HDA_CODEC_ENTRY(0x10ec0268, "ALC268", patch_alc268),
HDA_CODEC_ENTRY(0x10ec0269, "ALC269", patch_alc269),
HDA_CODEC_ENTRY(0x10ec0270, "ALC270", patch_alc269),
HDA_CODEC_ENTRY(0x10ec0272, "ALC272", patch_alc662),
HDA_CODEC_ENTRY(0x10ec0274, "ALC274", patch_alc269),
HDA_CODEC_ENTRY(0x10ec0275, "ALC275", patch_alc269),
HDA_CODEC_ENTRY(0x10ec0276, "ALC276", patch_alc269),
HDA_CODEC_ENTRY(0x10ec0280, "ALC280", patch_alc269),
HDA_CODEC_ENTRY(0x10ec0282, "ALC282", patch_alc269),
HDA_CODEC_ENTRY(0x10ec0283, "ALC283", patch_alc269),
HDA_CODEC_ENTRY(0x10ec0284, "ALC284", patch_alc269),
HDA_CODEC_ENTRY(0x10ec0285, "ALC285", patch_alc269),
HDA_CODEC_ENTRY(0x10ec0286, "ALC286", patch_alc269),
HDA_CODEC_ENTRY(0x10ec0287, "ALC287", patch_alc269),
HDA_CODEC_ENTRY(0x10ec0288, "ALC288", patch_alc269),
HDA_CODEC_ENTRY(0x10ec0289, "ALC289", patch_alc269),
HDA_CODEC_ENTRY(0x10ec0290, "ALC290", patch_alc269),
HDA_CODEC_ENTRY(0x10ec0292, "ALC292", patch_alc269),
HDA_CODEC_ENTRY(0x10ec0293, "ALC293", patch_alc269),
HDA_CODEC_ENTRY(0x10ec0294, "ALC294", patch_alc269),
HDA_CODEC_ENTRY(0x10ec0295, "ALC295", patch_alc269),
HDA_CODEC_ENTRY(0x10ec0298, "ALC298", patch_alc269),
HDA_CODEC_ENTRY(0x10ec0299, "ALC299", patch_alc269),
HDA_CODEC_ENTRY(0x10ec0300, "ALC300", patch_alc269),
HDA_CODEC_ENTRY(0x10ec0623, "ALC623", patch_alc269),
HDA_CODEC_REV_ENTRY(0x10ec0861, 0x100340, "ALC660", patch_alc861),
HDA_CODEC_ENTRY(0x10ec0660, "ALC660-VD", patch_alc861vd),
HDA_CODEC_ENTRY(0x10ec0861, "ALC861", patch_alc861),
HDA_CODEC_ENTRY(0x10ec0862, "ALC861-VD", patch_alc861vd),
HDA_CODEC_REV_ENTRY(0x10ec0662, 0x100002, "ALC662 rev2", patch_alc882),
HDA_CODEC_REV_ENTRY(0x10ec0662, 0x100101, "ALC662 rev1", patch_alc662),
HDA_CODEC_REV_ENTRY(0x10ec0662, 0x100300, "ALC662 rev3", patch_alc662),
HDA_CODEC_ENTRY(0x10ec0663, "ALC663", patch_alc662),
HDA_CODEC_ENTRY(0x10ec0665, "ALC665", patch_alc662),
HDA_CODEC_ENTRY(0x10ec0667, "ALC667", patch_alc662),
HDA_CODEC_ENTRY(0x10ec0668, "ALC668", patch_alc662),
HDA_CODEC_ENTRY(0x10ec0670, "ALC670", patch_alc662),
HDA_CODEC_ENTRY(0x10ec0671, "ALC671", patch_alc662),
HDA_CODEC_ENTRY(0x10ec0680, "ALC680", patch_alc680),
HDA_CODEC_ENTRY(0x10ec0700, "ALC700", patch_alc269),
HDA_CODEC_ENTRY(0x10ec0701, "ALC701", patch_alc269),
HDA_CODEC_ENTRY(0x10ec0703, "ALC703", patch_alc269),
HDA_CODEC_ENTRY(0x10ec0711, "ALC711", patch_alc269),
HDA_CODEC_ENTRY(0x10ec0867, "ALC891", patch_alc662),
HDA_CODEC_ENTRY(0x10ec0880, "ALC880", patch_alc880),
HDA_CODEC_ENTRY(0x10ec0882, "ALC882", patch_alc882),
HDA_CODEC_ENTRY(0x10ec0883, "ALC883", patch_alc882),
HDA_CODEC_REV_ENTRY(0x10ec0885, 0x100101, "ALC889A", patch_alc882),
HDA_CODEC_REV_ENTRY(0x10ec0885, 0x100103, "ALC889A", patch_alc882),
HDA_CODEC_ENTRY(0x10ec0885, "ALC885", patch_alc882),
HDA_CODEC_ENTRY(0x10ec0887, "ALC887", patch_alc882),
HDA_CODEC_REV_ENTRY(0x10ec0888, 0x100101, "ALC1200", patch_alc882),
HDA_CODEC_ENTRY(0x10ec0888, "ALC888", patch_alc882),
HDA_CODEC_ENTRY(0x10ec0889, "ALC889", patch_alc882),
HDA_CODEC_ENTRY(0x10ec0892, "ALC892", patch_alc662),
HDA_CODEC_ENTRY(0x10ec0897, "ALC897", patch_alc662),
HDA_CODEC_ENTRY(0x10ec0899, "ALC898", patch_alc882),
HDA_CODEC_ENTRY(0x10ec0900, "ALC1150", patch_alc882),
HDA_CODEC_ENTRY(0x10ec0b00, "ALCS1200A", patch_alc882),
HDA_CODEC_ENTRY(0x10ec1168, "ALC1220", patch_alc882),
HDA_CODEC_ENTRY(0x10ec1220, "ALC1220", patch_alc882),
HDA_CODEC_ENTRY(0x19e58326, "HW8326", patch_alc269),
{} /* terminator */
};
MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_realtek);
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("Realtek HD-audio codec");
static struct hda_codec_driver realtek_driver = {
.id = snd_hda_id_realtek,
};
module_hda_codec_driver(realtek_driver);
| linux-master | sound/pci/hda/patch_realtek.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Universal Interface for Intel High Definition Audio Codec
*
* Generic widget tree parser
*
* Copyright (c) 2004 Takashi Iwai <[email protected]>
*/
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/export.h>
#include <linux/sort.h>
#include <linux/delay.h>
#include <linux/ctype.h>
#include <linux/string.h>
#include <linux/bitops.h>
#include <linux/module.h>
#include <linux/leds.h>
#include <sound/core.h>
#include <sound/jack.h>
#include <sound/tlv.h>
#include <sound/hda_codec.h>
#include "hda_local.h"
#include "hda_auto_parser.h"
#include "hda_jack.h"
#include "hda_beep.h"
#include "hda_generic.h"
/**
* snd_hda_gen_spec_init - initialize hda_gen_spec struct
* @spec: hda_gen_spec object to initialize
*
* Initialize the given hda_gen_spec object.
*/
int snd_hda_gen_spec_init(struct hda_gen_spec *spec)
{
snd_array_init(&spec->kctls, sizeof(struct snd_kcontrol_new), 32);
snd_array_init(&spec->paths, sizeof(struct nid_path), 8);
snd_array_init(&spec->loopback_list, sizeof(struct hda_amp_list), 8);
mutex_init(&spec->pcm_mutex);
return 0;
}
EXPORT_SYMBOL_GPL(snd_hda_gen_spec_init);
/**
* snd_hda_gen_add_kctl - Add a new kctl_new struct from the template
* @spec: hda_gen_spec object
* @name: name string to override the template, NULL if unchanged
* @temp: template for the new kctl
*
* Add a new kctl (actually snd_kcontrol_new to be instantiated later)
* element based on the given snd_kcontrol_new template @temp and the
* name string @name to the list in @spec.
* Returns the newly created object or NULL as error.
*/
struct snd_kcontrol_new *
snd_hda_gen_add_kctl(struct hda_gen_spec *spec, const char *name,
const struct snd_kcontrol_new *temp)
{
struct snd_kcontrol_new *knew = snd_array_new(&spec->kctls);
if (!knew)
return NULL;
*knew = *temp;
if (name)
knew->name = kstrdup(name, GFP_KERNEL);
else if (knew->name)
knew->name = kstrdup(knew->name, GFP_KERNEL);
if (!knew->name)
return NULL;
return knew;
}
EXPORT_SYMBOL_GPL(snd_hda_gen_add_kctl);
static void free_kctls(struct hda_gen_spec *spec)
{
if (spec->kctls.list) {
struct snd_kcontrol_new *kctl = spec->kctls.list;
int i;
for (i = 0; i < spec->kctls.used; i++)
kfree(kctl[i].name);
}
snd_array_free(&spec->kctls);
}
static void snd_hda_gen_spec_free(struct hda_gen_spec *spec)
{
if (!spec)
return;
free_kctls(spec);
snd_array_free(&spec->paths);
snd_array_free(&spec->loopback_list);
#ifdef CONFIG_SND_HDA_GENERIC_LEDS
if (spec->led_cdevs[LED_AUDIO_MUTE])
led_classdev_unregister(spec->led_cdevs[LED_AUDIO_MUTE]);
if (spec->led_cdevs[LED_AUDIO_MICMUTE])
led_classdev_unregister(spec->led_cdevs[LED_AUDIO_MICMUTE]);
#endif
}
/*
* store user hints
*/
static void parse_user_hints(struct hda_codec *codec)
{
struct hda_gen_spec *spec = codec->spec;
int val;
val = snd_hda_get_bool_hint(codec, "jack_detect");
if (val >= 0)
codec->no_jack_detect = !val;
val = snd_hda_get_bool_hint(codec, "inv_jack_detect");
if (val >= 0)
codec->inv_jack_detect = !!val;
val = snd_hda_get_bool_hint(codec, "trigger_sense");
if (val >= 0)
codec->no_trigger_sense = !val;
val = snd_hda_get_bool_hint(codec, "inv_eapd");
if (val >= 0)
codec->inv_eapd = !!val;
val = snd_hda_get_bool_hint(codec, "pcm_format_first");
if (val >= 0)
codec->pcm_format_first = !!val;
val = snd_hda_get_bool_hint(codec, "sticky_stream");
if (val >= 0)
codec->no_sticky_stream = !val;
val = snd_hda_get_bool_hint(codec, "spdif_status_reset");
if (val >= 0)
codec->spdif_status_reset = !!val;
val = snd_hda_get_bool_hint(codec, "pin_amp_workaround");
if (val >= 0)
codec->pin_amp_workaround = !!val;
val = snd_hda_get_bool_hint(codec, "single_adc_amp");
if (val >= 0)
codec->single_adc_amp = !!val;
val = snd_hda_get_bool_hint(codec, "power_save_node");
if (val >= 0)
codec->power_save_node = !!val;
val = snd_hda_get_bool_hint(codec, "auto_mute");
if (val >= 0)
spec->suppress_auto_mute = !val;
val = snd_hda_get_bool_hint(codec, "auto_mic");
if (val >= 0)
spec->suppress_auto_mic = !val;
val = snd_hda_get_bool_hint(codec, "line_in_auto_switch");
if (val >= 0)
spec->line_in_auto_switch = !!val;
val = snd_hda_get_bool_hint(codec, "auto_mute_via_amp");
if (val >= 0)
spec->auto_mute_via_amp = !!val;
val = snd_hda_get_bool_hint(codec, "need_dac_fix");
if (val >= 0)
spec->need_dac_fix = !!val;
val = snd_hda_get_bool_hint(codec, "primary_hp");
if (val >= 0)
spec->no_primary_hp = !val;
val = snd_hda_get_bool_hint(codec, "multi_io");
if (val >= 0)
spec->no_multi_io = !val;
val = snd_hda_get_bool_hint(codec, "multi_cap_vol");
if (val >= 0)
spec->multi_cap_vol = !!val;
val = snd_hda_get_bool_hint(codec, "inv_dmic_split");
if (val >= 0)
spec->inv_dmic_split = !!val;
val = snd_hda_get_bool_hint(codec, "indep_hp");
if (val >= 0)
spec->indep_hp = !!val;
val = snd_hda_get_bool_hint(codec, "add_stereo_mix_input");
if (val >= 0)
spec->add_stereo_mix_input = !!val;
/* the following two are just for compatibility */
val = snd_hda_get_bool_hint(codec, "add_out_jack_modes");
if (val >= 0)
spec->add_jack_modes = !!val;
val = snd_hda_get_bool_hint(codec, "add_in_jack_modes");
if (val >= 0)
spec->add_jack_modes = !!val;
val = snd_hda_get_bool_hint(codec, "add_jack_modes");
if (val >= 0)
spec->add_jack_modes = !!val;
val = snd_hda_get_bool_hint(codec, "power_down_unused");
if (val >= 0)
spec->power_down_unused = !!val;
val = snd_hda_get_bool_hint(codec, "add_hp_mic");
if (val >= 0)
spec->hp_mic = !!val;
val = snd_hda_get_bool_hint(codec, "hp_mic_detect");
if (val >= 0)
spec->suppress_hp_mic_detect = !val;
val = snd_hda_get_bool_hint(codec, "vmaster");
if (val >= 0)
spec->suppress_vmaster = !val;
if (!snd_hda_get_int_hint(codec, "mixer_nid", &val))
spec->mixer_nid = val;
}
/*
* pin control value accesses
*/
#define update_pin_ctl(codec, pin, val) \
snd_hda_codec_write_cache(codec, pin, 0, \
AC_VERB_SET_PIN_WIDGET_CONTROL, val)
/* restore the pinctl based on the cached value */
static inline void restore_pin_ctl(struct hda_codec *codec, hda_nid_t pin)
{
update_pin_ctl(codec, pin, snd_hda_codec_get_pin_target(codec, pin));
}
/* set the pinctl target value and write it if requested */
static void set_pin_target(struct hda_codec *codec, hda_nid_t pin,
unsigned int val, bool do_write)
{
if (!pin)
return;
val = snd_hda_correct_pin_ctl(codec, pin, val);
snd_hda_codec_set_pin_target(codec, pin, val);
if (do_write)
update_pin_ctl(codec, pin, val);
}
/* set pinctl target values for all given pins */
static void set_pin_targets(struct hda_codec *codec, int num_pins,
hda_nid_t *pins, unsigned int val)
{
int i;
for (i = 0; i < num_pins; i++)
set_pin_target(codec, pins[i], val, false);
}
/*
* parsing paths
*/
/* return the position of NID in the list, or -1 if not found */
static int find_idx_in_nid_list(hda_nid_t nid, const hda_nid_t *list, int nums)
{
int i;
for (i = 0; i < nums; i++)
if (list[i] == nid)
return i;
return -1;
}
/* return true if the given NID is contained in the path */
static bool is_nid_contained(struct nid_path *path, hda_nid_t nid)
{
return find_idx_in_nid_list(nid, path->path, path->depth) >= 0;
}
static struct nid_path *get_nid_path(struct hda_codec *codec,
hda_nid_t from_nid, hda_nid_t to_nid,
int anchor_nid)
{
struct hda_gen_spec *spec = codec->spec;
struct nid_path *path;
int i;
snd_array_for_each(&spec->paths, i, path) {
if (path->depth <= 0)
continue;
if ((!from_nid || path->path[0] == from_nid) &&
(!to_nid || path->path[path->depth - 1] == to_nid)) {
if (!anchor_nid ||
(anchor_nid > 0 && is_nid_contained(path, anchor_nid)) ||
(anchor_nid < 0 && !is_nid_contained(path, anchor_nid)))
return path;
}
}
return NULL;
}
/**
* snd_hda_get_path_idx - get the index number corresponding to the path
* instance
* @codec: the HDA codec
* @path: nid_path object
*
* The returned index starts from 1, i.e. the actual array index with offset 1,
* and zero is handled as an invalid path
*/
int snd_hda_get_path_idx(struct hda_codec *codec, struct nid_path *path)
{
struct hda_gen_spec *spec = codec->spec;
struct nid_path *array = spec->paths.list;
ssize_t idx;
if (!spec->paths.used)
return 0;
idx = path - array;
if (idx < 0 || idx >= spec->paths.used)
return 0;
return idx + 1;
}
EXPORT_SYMBOL_GPL(snd_hda_get_path_idx);
/**
* snd_hda_get_path_from_idx - get the path instance corresponding to the
* given index number
* @codec: the HDA codec
* @idx: the path index
*/
struct nid_path *snd_hda_get_path_from_idx(struct hda_codec *codec, int idx)
{
struct hda_gen_spec *spec = codec->spec;
if (idx <= 0 || idx > spec->paths.used)
return NULL;
return snd_array_elem(&spec->paths, idx - 1);
}
EXPORT_SYMBOL_GPL(snd_hda_get_path_from_idx);
/* check whether the given DAC is already found in any existing paths */
static bool is_dac_already_used(struct hda_codec *codec, hda_nid_t nid)
{
struct hda_gen_spec *spec = codec->spec;
const struct nid_path *path;
int i;
snd_array_for_each(&spec->paths, i, path) {
if (path->path[0] == nid)
return true;
}
return false;
}
/* check whether the given two widgets can be connected */
static bool is_reachable_path(struct hda_codec *codec,
hda_nid_t from_nid, hda_nid_t to_nid)
{
if (!from_nid || !to_nid)
return false;
return snd_hda_get_conn_index(codec, to_nid, from_nid, true) >= 0;
}
/* nid, dir and idx */
#define AMP_VAL_COMPARE_MASK (0xffff | (1U << 18) | (0x0f << 19))
/* check whether the given ctl is already assigned in any path elements */
static bool is_ctl_used(struct hda_codec *codec, unsigned int val, int type)
{
struct hda_gen_spec *spec = codec->spec;
const struct nid_path *path;
int i;
val &= AMP_VAL_COMPARE_MASK;
snd_array_for_each(&spec->paths, i, path) {
if ((path->ctls[type] & AMP_VAL_COMPARE_MASK) == val)
return true;
}
return false;
}
/* check whether a control with the given (nid, dir, idx) was assigned */
static bool is_ctl_associated(struct hda_codec *codec, hda_nid_t nid,
int dir, int idx, int type)
{
unsigned int val = HDA_COMPOSE_AMP_VAL(nid, 3, idx, dir);
return is_ctl_used(codec, val, type);
}
static void print_nid_path(struct hda_codec *codec,
const char *pfx, struct nid_path *path)
{
char buf[40];
char *pos = buf;
int i;
*pos = 0;
for (i = 0; i < path->depth; i++)
pos += scnprintf(pos, sizeof(buf) - (pos - buf), "%s%02x",
pos != buf ? ":" : "",
path->path[i]);
codec_dbg(codec, "%s path: depth=%d '%s'\n", pfx, path->depth, buf);
}
/* called recursively */
static bool __parse_nid_path(struct hda_codec *codec,
hda_nid_t from_nid, hda_nid_t to_nid,
int anchor_nid, struct nid_path *path,
int depth)
{
const hda_nid_t *conn;
int i, nums;
if (to_nid == anchor_nid)
anchor_nid = 0; /* anchor passed */
else if (to_nid == (hda_nid_t)(-anchor_nid))
return false; /* hit the exclusive nid */
nums = snd_hda_get_conn_list(codec, to_nid, &conn);
for (i = 0; i < nums; i++) {
if (conn[i] != from_nid) {
/* special case: when from_nid is 0,
* try to find an empty DAC
*/
if (from_nid ||
get_wcaps_type(get_wcaps(codec, conn[i])) != AC_WID_AUD_OUT ||
is_dac_already_used(codec, conn[i]))
continue;
}
/* anchor is not requested or already passed? */
if (anchor_nid <= 0)
goto found;
}
if (depth >= MAX_NID_PATH_DEPTH)
return false;
for (i = 0; i < nums; i++) {
unsigned int type;
type = get_wcaps_type(get_wcaps(codec, conn[i]));
if (type == AC_WID_AUD_OUT || type == AC_WID_AUD_IN ||
type == AC_WID_PIN)
continue;
if (__parse_nid_path(codec, from_nid, conn[i],
anchor_nid, path, depth + 1))
goto found;
}
return false;
found:
path->path[path->depth] = conn[i];
path->idx[path->depth + 1] = i;
if (nums > 1 && get_wcaps_type(get_wcaps(codec, to_nid)) != AC_WID_AUD_MIX)
path->multi[path->depth + 1] = 1;
path->depth++;
return true;
}
/*
* snd_hda_parse_nid_path - parse the widget path from the given nid to
* the target nid
* @codec: the HDA codec
* @from_nid: the NID where the path start from
* @to_nid: the NID where the path ends at
* @anchor_nid: the anchor indication
* @path: the path object to store the result
*
* Returns true if a matching path is found.
*
* The parsing behavior depends on parameters:
* when @from_nid is 0, try to find an empty DAC;
* when @anchor_nid is set to a positive value, only paths through the widget
* with the given value are evaluated.
* when @anchor_nid is set to a negative value, paths through the widget
* with the negative of given value are excluded, only other paths are chosen.
* when @anchor_nid is zero, no special handling about path selection.
*/
static bool snd_hda_parse_nid_path(struct hda_codec *codec, hda_nid_t from_nid,
hda_nid_t to_nid, int anchor_nid,
struct nid_path *path)
{
if (__parse_nid_path(codec, from_nid, to_nid, anchor_nid, path, 1)) {
path->path[path->depth] = to_nid;
path->depth++;
return true;
}
return false;
}
/**
* snd_hda_add_new_path - parse the path between the given NIDs and
* add to the path list
* @codec: the HDA codec
* @from_nid: the NID where the path start from
* @to_nid: the NID where the path ends at
* @anchor_nid: the anchor indication, see snd_hda_parse_nid_path()
*
* If no valid path is found, returns NULL.
*/
struct nid_path *
snd_hda_add_new_path(struct hda_codec *codec, hda_nid_t from_nid,
hda_nid_t to_nid, int anchor_nid)
{
struct hda_gen_spec *spec = codec->spec;
struct nid_path *path;
if (from_nid && to_nid && !is_reachable_path(codec, from_nid, to_nid))
return NULL;
/* check whether the path has been already added */
path = get_nid_path(codec, from_nid, to_nid, anchor_nid);
if (path)
return path;
path = snd_array_new(&spec->paths);
if (!path)
return NULL;
memset(path, 0, sizeof(*path));
if (snd_hda_parse_nid_path(codec, from_nid, to_nid, anchor_nid, path))
return path;
/* push back */
spec->paths.used--;
return NULL;
}
EXPORT_SYMBOL_GPL(snd_hda_add_new_path);
/* clear the given path as invalid so that it won't be picked up later */
static void invalidate_nid_path(struct hda_codec *codec, int idx)
{
struct nid_path *path = snd_hda_get_path_from_idx(codec, idx);
if (!path)
return;
memset(path, 0, sizeof(*path));
}
/* return a DAC if paired to the given pin by codec driver */
static hda_nid_t get_preferred_dac(struct hda_codec *codec, hda_nid_t pin)
{
struct hda_gen_spec *spec = codec->spec;
const hda_nid_t *list = spec->preferred_dacs;
if (!list)
return 0;
for (; *list; list += 2)
if (*list == pin)
return list[1];
return 0;
}
/* look for an empty DAC slot */
static hda_nid_t look_for_dac(struct hda_codec *codec, hda_nid_t pin,
bool is_digital)
{
struct hda_gen_spec *spec = codec->spec;
bool cap_digital;
int i;
for (i = 0; i < spec->num_all_dacs; i++) {
hda_nid_t nid = spec->all_dacs[i];
if (!nid || is_dac_already_used(codec, nid))
continue;
cap_digital = !!(get_wcaps(codec, nid) & AC_WCAP_DIGITAL);
if (is_digital != cap_digital)
continue;
if (is_reachable_path(codec, nid, pin))
return nid;
}
return 0;
}
/* replace the channels in the composed amp value with the given number */
static unsigned int amp_val_replace_channels(unsigned int val, unsigned int chs)
{
val &= ~(0x3U << 16);
val |= chs << 16;
return val;
}
static bool same_amp_caps(struct hda_codec *codec, hda_nid_t nid1,
hda_nid_t nid2, int dir)
{
if (!(get_wcaps(codec, nid1) & (1 << (dir + 1))))
return !(get_wcaps(codec, nid2) & (1 << (dir + 1)));
return (query_amp_caps(codec, nid1, dir) ==
query_amp_caps(codec, nid2, dir));
}
/* look for a widget suitable for assigning a mute switch in the path */
static hda_nid_t look_for_out_mute_nid(struct hda_codec *codec,
struct nid_path *path)
{
int i;
for (i = path->depth - 1; i >= 0; i--) {
if (nid_has_mute(codec, path->path[i], HDA_OUTPUT))
return path->path[i];
if (i != path->depth - 1 && i != 0 &&
nid_has_mute(codec, path->path[i], HDA_INPUT))
return path->path[i];
}
return 0;
}
/* look for a widget suitable for assigning a volume ctl in the path */
static hda_nid_t look_for_out_vol_nid(struct hda_codec *codec,
struct nid_path *path)
{
struct hda_gen_spec *spec = codec->spec;
int i;
for (i = path->depth - 1; i >= 0; i--) {
hda_nid_t nid = path->path[i];
if ((spec->out_vol_mask >> nid) & 1)
continue;
if (nid_has_volume(codec, nid, HDA_OUTPUT))
return nid;
}
return 0;
}
/*
* path activation / deactivation
*/
/* can have the amp-in capability? */
static bool has_amp_in(struct hda_codec *codec, struct nid_path *path, int idx)
{
hda_nid_t nid = path->path[idx];
unsigned int caps = get_wcaps(codec, nid);
unsigned int type = get_wcaps_type(caps);
if (!(caps & AC_WCAP_IN_AMP))
return false;
if (type == AC_WID_PIN && idx > 0) /* only for input pins */
return false;
return true;
}
/* can have the amp-out capability? */
static bool has_amp_out(struct hda_codec *codec, struct nid_path *path, int idx)
{
hda_nid_t nid = path->path[idx];
unsigned int caps = get_wcaps(codec, nid);
unsigned int type = get_wcaps_type(caps);
if (!(caps & AC_WCAP_OUT_AMP))
return false;
if (type == AC_WID_PIN && !idx) /* only for output pins */
return false;
return true;
}
/* check whether the given (nid,dir,idx) is active */
static bool is_active_nid(struct hda_codec *codec, hda_nid_t nid,
unsigned int dir, unsigned int idx)
{
struct hda_gen_spec *spec = codec->spec;
int type = get_wcaps_type(get_wcaps(codec, nid));
const struct nid_path *path;
int i, n;
if (nid == codec->core.afg)
return true;
snd_array_for_each(&spec->paths, n, path) {
if (!path->active)
continue;
if (codec->power_save_node) {
if (!path->stream_enabled)
continue;
/* ignore unplugged paths except for DAC/ADC */
if (!(path->pin_enabled || path->pin_fixed) &&
type != AC_WID_AUD_OUT && type != AC_WID_AUD_IN)
continue;
}
for (i = 0; i < path->depth; i++) {
if (path->path[i] == nid) {
if (dir == HDA_OUTPUT || idx == -1 ||
path->idx[i] == idx)
return true;
break;
}
}
}
return false;
}
/* check whether the NID is referred by any active paths */
#define is_active_nid_for_any(codec, nid) \
is_active_nid(codec, nid, HDA_OUTPUT, -1)
/* get the default amp value for the target state */
static int get_amp_val_to_activate(struct hda_codec *codec, hda_nid_t nid,
int dir, unsigned int caps, bool enable)
{
unsigned int val = 0;
if (caps & AC_AMPCAP_NUM_STEPS) {
/* set to 0dB */
if (enable)
val = (caps & AC_AMPCAP_OFFSET) >> AC_AMPCAP_OFFSET_SHIFT;
}
if (caps & (AC_AMPCAP_MUTE | AC_AMPCAP_MIN_MUTE)) {
if (!enable)
val |= HDA_AMP_MUTE;
}
return val;
}
/* is this a stereo widget or a stereo-to-mono mix? */
static bool is_stereo_amps(struct hda_codec *codec, hda_nid_t nid, int dir)
{
unsigned int wcaps = get_wcaps(codec, nid);
hda_nid_t conn;
if (wcaps & AC_WCAP_STEREO)
return true;
if (dir != HDA_INPUT || get_wcaps_type(wcaps) != AC_WID_AUD_MIX)
return false;
if (snd_hda_get_num_conns(codec, nid) != 1)
return false;
if (snd_hda_get_connections(codec, nid, &conn, 1) < 0)
return false;
return !!(get_wcaps(codec, conn) & AC_WCAP_STEREO);
}
/* initialize the amp value (only at the first time) */
static void init_amp(struct hda_codec *codec, hda_nid_t nid, int dir, int idx)
{
unsigned int caps = query_amp_caps(codec, nid, dir);
int val = get_amp_val_to_activate(codec, nid, dir, caps, false);
if (is_stereo_amps(codec, nid, dir))
snd_hda_codec_amp_init_stereo(codec, nid, dir, idx, 0xff, val);
else
snd_hda_codec_amp_init(codec, nid, 0, dir, idx, 0xff, val);
}
/* update the amp, doing in stereo or mono depending on NID */
static int update_amp(struct hda_codec *codec, hda_nid_t nid, int dir, int idx,
unsigned int mask, unsigned int val)
{
if (is_stereo_amps(codec, nid, dir))
return snd_hda_codec_amp_stereo(codec, nid, dir, idx,
mask, val);
else
return snd_hda_codec_amp_update(codec, nid, 0, dir, idx,
mask, val);
}
/* calculate amp value mask we can modify;
* if the given amp is controlled by mixers, don't touch it
*/
static unsigned int get_amp_mask_to_modify(struct hda_codec *codec,
hda_nid_t nid, int dir, int idx,
unsigned int caps)
{
unsigned int mask = 0xff;
if (caps & (AC_AMPCAP_MUTE | AC_AMPCAP_MIN_MUTE)) {
if (is_ctl_associated(codec, nid, dir, idx, NID_PATH_MUTE_CTL))
mask &= ~0x80;
}
if (caps & AC_AMPCAP_NUM_STEPS) {
if (is_ctl_associated(codec, nid, dir, idx, NID_PATH_VOL_CTL) ||
is_ctl_associated(codec, nid, dir, idx, NID_PATH_BOOST_CTL))
mask &= ~0x7f;
}
return mask;
}
static void activate_amp(struct hda_codec *codec, hda_nid_t nid, int dir,
int idx, int idx_to_check, bool enable)
{
unsigned int caps;
unsigned int mask, val;
caps = query_amp_caps(codec, nid, dir);
val = get_amp_val_to_activate(codec, nid, dir, caps, enable);
mask = get_amp_mask_to_modify(codec, nid, dir, idx_to_check, caps);
if (!mask)
return;
val &= mask;
update_amp(codec, nid, dir, idx, mask, val);
}
static void check_and_activate_amp(struct hda_codec *codec, hda_nid_t nid,
int dir, int idx, int idx_to_check,
bool enable)
{
/* check whether the given amp is still used by others */
if (!enable && is_active_nid(codec, nid, dir, idx_to_check))
return;
activate_amp(codec, nid, dir, idx, idx_to_check, enable);
}
static void activate_amp_out(struct hda_codec *codec, struct nid_path *path,
int i, bool enable)
{
hda_nid_t nid = path->path[i];
init_amp(codec, nid, HDA_OUTPUT, 0);
check_and_activate_amp(codec, nid, HDA_OUTPUT, 0, 0, enable);
}
static void activate_amp_in(struct hda_codec *codec, struct nid_path *path,
int i, bool enable, bool add_aamix)
{
struct hda_gen_spec *spec = codec->spec;
const hda_nid_t *conn;
int n, nums, idx;
int type;
hda_nid_t nid = path->path[i];
nums = snd_hda_get_conn_list(codec, nid, &conn);
if (nums < 0)
return;
type = get_wcaps_type(get_wcaps(codec, nid));
if (type == AC_WID_PIN ||
(type == AC_WID_AUD_IN && codec->single_adc_amp)) {
nums = 1;
idx = 0;
} else
idx = path->idx[i];
for (n = 0; n < nums; n++)
init_amp(codec, nid, HDA_INPUT, n);
/* here is a little bit tricky in comparison with activate_amp_out();
* when aa-mixer is available, we need to enable the path as well
*/
for (n = 0; n < nums; n++) {
if (n != idx) {
if (conn[n] != spec->mixer_merge_nid)
continue;
/* when aamix is disabled, force to off */
if (!add_aamix) {
activate_amp(codec, nid, HDA_INPUT, n, n, false);
continue;
}
}
check_and_activate_amp(codec, nid, HDA_INPUT, n, idx, enable);
}
}
/* sync power of each widget in the given path */
static hda_nid_t path_power_update(struct hda_codec *codec,
struct nid_path *path,
bool allow_powerdown)
{
hda_nid_t nid, changed = 0;
int i, state, power;
for (i = 0; i < path->depth; i++) {
nid = path->path[i];
if (!(get_wcaps(codec, nid) & AC_WCAP_POWER))
continue;
if (nid == codec->core.afg)
continue;
if (!allow_powerdown || is_active_nid_for_any(codec, nid))
state = AC_PWRST_D0;
else
state = AC_PWRST_D3;
power = snd_hda_codec_read(codec, nid, 0,
AC_VERB_GET_POWER_STATE, 0);
if (power != (state | (state << 4))) {
snd_hda_codec_write(codec, nid, 0,
AC_VERB_SET_POWER_STATE, state);
changed = nid;
/* all known codecs seem to be capable to handl
* widgets state even in D3, so far.
* if any new codecs need to restore the widget
* states after D0 transition, call the function
* below.
*/
#if 0 /* disabled */
if (state == AC_PWRST_D0)
snd_hdac_regmap_sync_node(&codec->core, nid);
#endif
}
}
return changed;
}
/* do sync with the last power state change */
static void sync_power_state_change(struct hda_codec *codec, hda_nid_t nid)
{
if (nid) {
msleep(10);
snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
}
}
/**
* snd_hda_activate_path - activate or deactivate the given path
* @codec: the HDA codec
* @path: the path to activate/deactivate
* @enable: flag to activate or not
* @add_aamix: enable the input from aamix NID
*
* If @add_aamix is set, enable the input from aa-mix NID as well (if any).
*/
void snd_hda_activate_path(struct hda_codec *codec, struct nid_path *path,
bool enable, bool add_aamix)
{
struct hda_gen_spec *spec = codec->spec;
int i;
path->active = enable;
/* make sure the widget is powered up */
if (enable && (spec->power_down_unused || codec->power_save_node))
path_power_update(codec, path, codec->power_save_node);
for (i = path->depth - 1; i >= 0; i--) {
hda_nid_t nid = path->path[i];
if (enable && path->multi[i])
snd_hda_codec_write_cache(codec, nid, 0,
AC_VERB_SET_CONNECT_SEL,
path->idx[i]);
if (has_amp_in(codec, path, i))
activate_amp_in(codec, path, i, enable, add_aamix);
if (has_amp_out(codec, path, i))
activate_amp_out(codec, path, i, enable);
}
}
EXPORT_SYMBOL_GPL(snd_hda_activate_path);
/* if the given path is inactive, put widgets into D3 (only if suitable) */
static void path_power_down_sync(struct hda_codec *codec, struct nid_path *path)
{
struct hda_gen_spec *spec = codec->spec;
if (!(spec->power_down_unused || codec->power_save_node) || path->active)
return;
sync_power_state_change(codec, path_power_update(codec, path, true));
}
/* turn on/off EAPD on the given pin */
static void set_pin_eapd(struct hda_codec *codec, hda_nid_t pin, bool enable)
{
struct hda_gen_spec *spec = codec->spec;
if (spec->own_eapd_ctl ||
!(snd_hda_query_pin_caps(codec, pin) & AC_PINCAP_EAPD))
return;
if (spec->keep_eapd_on && !enable)
return;
if (codec->inv_eapd)
enable = !enable;
snd_hda_codec_write_cache(codec, pin, 0,
AC_VERB_SET_EAPD_BTLENABLE,
enable ? 0x02 : 0x00);
}
/* re-initialize the path specified by the given path index */
static void resume_path_from_idx(struct hda_codec *codec, int path_idx)
{
struct nid_path *path = snd_hda_get_path_from_idx(codec, path_idx);
if (path)
snd_hda_activate_path(codec, path, path->active, false);
}
/*
* Helper functions for creating mixer ctl elements
*/
static int hda_gen_mixer_mute_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol);
static int hda_gen_bind_mute_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol);
static int hda_gen_bind_mute_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol);
enum {
HDA_CTL_WIDGET_VOL,
HDA_CTL_WIDGET_MUTE,
HDA_CTL_BIND_MUTE,
};
static const struct snd_kcontrol_new control_templates[] = {
HDA_CODEC_VOLUME(NULL, 0, 0, 0),
/* only the put callback is replaced for handling the special mute */
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.subdevice = HDA_SUBDEV_AMP_FLAG,
.info = snd_hda_mixer_amp_switch_info,
.get = snd_hda_mixer_amp_switch_get,
.put = hda_gen_mixer_mute_put, /* replaced */
.private_value = HDA_COMPOSE_AMP_VAL(0, 3, 0, 0),
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.info = snd_hda_mixer_amp_switch_info,
.get = hda_gen_bind_mute_get,
.put = hda_gen_bind_mute_put, /* replaced */
.private_value = HDA_COMPOSE_AMP_VAL(0, 3, 0, 0),
},
};
/* add dynamic controls from template */
static struct snd_kcontrol_new *
add_control(struct hda_gen_spec *spec, int type, const char *name,
int cidx, unsigned long val)
{
struct snd_kcontrol_new *knew;
knew = snd_hda_gen_add_kctl(spec, name, &control_templates[type]);
if (!knew)
return NULL;
knew->index = cidx;
if (get_amp_nid_(val))
knew->subdevice = HDA_SUBDEV_AMP_FLAG;
if (knew->access == 0)
knew->access = SNDRV_CTL_ELEM_ACCESS_READWRITE;
knew->private_value = val;
return knew;
}
static int add_control_with_pfx(struct hda_gen_spec *spec, int type,
const char *pfx, const char *dir,
const char *sfx, int cidx, unsigned long val)
{
char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
int len;
len = snprintf(name, sizeof(name), "%s %s %s", pfx, dir, sfx);
if (snd_BUG_ON(len >= sizeof(name)))
return -EINVAL;
if (!add_control(spec, type, name, cidx, val))
return -ENOMEM;
return 0;
}
#define add_pb_vol_ctrl(spec, type, pfx, val) \
add_control_with_pfx(spec, type, pfx, "Playback", "Volume", 0, val)
#define add_pb_sw_ctrl(spec, type, pfx, val) \
add_control_with_pfx(spec, type, pfx, "Playback", "Switch", 0, val)
#define __add_pb_vol_ctrl(spec, type, pfx, cidx, val) \
add_control_with_pfx(spec, type, pfx, "Playback", "Volume", cidx, val)
#define __add_pb_sw_ctrl(spec, type, pfx, cidx, val) \
add_control_with_pfx(spec, type, pfx, "Playback", "Switch", cidx, val)
static int add_vol_ctl(struct hda_codec *codec, const char *pfx, int cidx,
unsigned int chs, struct nid_path *path)
{
unsigned int val;
if (!path)
return 0;
val = path->ctls[NID_PATH_VOL_CTL];
if (!val)
return 0;
val = amp_val_replace_channels(val, chs);
return __add_pb_vol_ctrl(codec->spec, HDA_CTL_WIDGET_VOL, pfx, cidx, val);
}
/* return the channel bits suitable for the given path->ctls[] */
static int get_default_ch_nums(struct hda_codec *codec, struct nid_path *path,
int type)
{
int chs = 1; /* mono (left only) */
if (path) {
hda_nid_t nid = get_amp_nid_(path->ctls[type]);
if (nid && (get_wcaps(codec, nid) & AC_WCAP_STEREO))
chs = 3; /* stereo */
}
return chs;
}
static int add_stereo_vol(struct hda_codec *codec, const char *pfx, int cidx,
struct nid_path *path)
{
int chs = get_default_ch_nums(codec, path, NID_PATH_VOL_CTL);
return add_vol_ctl(codec, pfx, cidx, chs, path);
}
/* create a mute-switch for the given mixer widget;
* if it has multiple sources (e.g. DAC and loopback), create a bind-mute
*/
static int add_sw_ctl(struct hda_codec *codec, const char *pfx, int cidx,
unsigned int chs, struct nid_path *path)
{
unsigned int val;
int type = HDA_CTL_WIDGET_MUTE;
if (!path)
return 0;
val = path->ctls[NID_PATH_MUTE_CTL];
if (!val)
return 0;
val = amp_val_replace_channels(val, chs);
if (get_amp_direction_(val) == HDA_INPUT) {
hda_nid_t nid = get_amp_nid_(val);
int nums = snd_hda_get_num_conns(codec, nid);
if (nums > 1) {
type = HDA_CTL_BIND_MUTE;
val |= nums << 19;
}
}
return __add_pb_sw_ctrl(codec->spec, type, pfx, cidx, val);
}
static int add_stereo_sw(struct hda_codec *codec, const char *pfx,
int cidx, struct nid_path *path)
{
int chs = get_default_ch_nums(codec, path, NID_PATH_MUTE_CTL);
return add_sw_ctl(codec, pfx, cidx, chs, path);
}
/* playback mute control with the software mute bit check */
static void sync_auto_mute_bits(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
struct hda_gen_spec *spec = codec->spec;
if (spec->auto_mute_via_amp) {
hda_nid_t nid = get_amp_nid(kcontrol);
bool enabled = !((spec->mute_bits >> nid) & 1);
ucontrol->value.integer.value[0] &= enabled;
ucontrol->value.integer.value[1] &= enabled;
}
}
static int hda_gen_mixer_mute_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
sync_auto_mute_bits(kcontrol, ucontrol);
return snd_hda_mixer_amp_switch_put(kcontrol, ucontrol);
}
/*
* Bound mute controls
*/
#define AMP_VAL_IDX_SHIFT 19
#define AMP_VAL_IDX_MASK (0x0f<<19)
static int hda_gen_bind_mute_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
unsigned long pval;
int err;
mutex_lock(&codec->control_mutex);
pval = kcontrol->private_value;
kcontrol->private_value = pval & ~AMP_VAL_IDX_MASK; /* index 0 */
err = snd_hda_mixer_amp_switch_get(kcontrol, ucontrol);
kcontrol->private_value = pval;
mutex_unlock(&codec->control_mutex);
return err;
}
static int hda_gen_bind_mute_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
unsigned long pval;
int i, indices, err = 0, change = 0;
sync_auto_mute_bits(kcontrol, ucontrol);
mutex_lock(&codec->control_mutex);
pval = kcontrol->private_value;
indices = (pval & AMP_VAL_IDX_MASK) >> AMP_VAL_IDX_SHIFT;
for (i = 0; i < indices; i++) {
kcontrol->private_value = (pval & ~AMP_VAL_IDX_MASK) |
(i << AMP_VAL_IDX_SHIFT);
err = snd_hda_mixer_amp_switch_put(kcontrol, ucontrol);
if (err < 0)
break;
change |= err;
}
kcontrol->private_value = pval;
mutex_unlock(&codec->control_mutex);
return err < 0 ? err : change;
}
/* any ctl assigned to the path with the given index? */
static bool path_has_mixer(struct hda_codec *codec, int path_idx, int ctl_type)
{
struct nid_path *path = snd_hda_get_path_from_idx(codec, path_idx);
return path && path->ctls[ctl_type];
}
static const char * const channel_name[] = {
"Front", "Surround", "CLFE", "Side", "Back",
};
/* give some appropriate ctl name prefix for the given line out channel */
static const char *get_line_out_pfx(struct hda_codec *codec, int ch,
int *index, int ctl_type)
{
struct hda_gen_spec *spec = codec->spec;
struct auto_pin_cfg *cfg = &spec->autocfg;
*index = 0;
if (cfg->line_outs == 1 && !spec->multi_ios &&
!codec->force_pin_prefix &&
!cfg->hp_outs && !cfg->speaker_outs)
return spec->vmaster_mute.hook ? "PCM" : "Master";
/* if there is really a single DAC used in the whole output paths,
* use it master (or "PCM" if a vmaster hook is present)
*/
if (spec->multiout.num_dacs == 1 && !spec->mixer_nid &&
!codec->force_pin_prefix &&
!spec->multiout.hp_out_nid[0] && !spec->multiout.extra_out_nid[0])
return spec->vmaster_mute.hook ? "PCM" : "Master";
/* multi-io channels */
if (ch >= cfg->line_outs)
goto fixed_name;
switch (cfg->line_out_type) {
case AUTO_PIN_SPEAKER_OUT:
/* if the primary channel vol/mute is shared with HP volume,
* don't name it as Speaker
*/
if (!ch && cfg->hp_outs &&
!path_has_mixer(codec, spec->hp_paths[0], ctl_type))
break;
if (cfg->line_outs == 1)
return "Speaker";
if (cfg->line_outs == 2)
return ch ? "Bass Speaker" : "Speaker";
break;
case AUTO_PIN_HP_OUT:
/* if the primary channel vol/mute is shared with spk volume,
* don't name it as Headphone
*/
if (!ch && cfg->speaker_outs &&
!path_has_mixer(codec, spec->speaker_paths[0], ctl_type))
break;
/* for multi-io case, only the primary out */
if (ch && spec->multi_ios)
break;
*index = ch;
return "Headphone";
case AUTO_PIN_LINE_OUT:
/* This deals with the case where one HP or one Speaker or
* one HP + one Speaker need to share the DAC with LO
*/
if (!ch) {
bool hp_lo_shared = false, spk_lo_shared = false;
if (cfg->speaker_outs)
spk_lo_shared = !path_has_mixer(codec,
spec->speaker_paths[0], ctl_type);
if (cfg->hp_outs)
hp_lo_shared = !path_has_mixer(codec, spec->hp_paths[0], ctl_type);
if (hp_lo_shared && spk_lo_shared)
return spec->vmaster_mute.hook ? "PCM" : "Master";
if (hp_lo_shared)
return "Headphone+LO";
if (spk_lo_shared)
return "Speaker+LO";
}
}
/* for a single channel output, we don't have to name the channel */
if (cfg->line_outs == 1 && !spec->multi_ios)
return "Line Out";
fixed_name:
if (ch >= ARRAY_SIZE(channel_name)) {
snd_BUG();
return "PCM";
}
return channel_name[ch];
}
/*
* Parse output paths
*/
/* badness definition */
enum {
/* No primary DAC is found for the main output */
BAD_NO_PRIMARY_DAC = 0x10000,
/* No DAC is found for the extra output */
BAD_NO_DAC = 0x4000,
/* No possible multi-ios */
BAD_MULTI_IO = 0x120,
/* No individual DAC for extra output */
BAD_NO_EXTRA_DAC = 0x102,
/* No individual DAC for extra surrounds */
BAD_NO_EXTRA_SURR_DAC = 0x101,
/* Primary DAC shared with main surrounds */
BAD_SHARED_SURROUND = 0x100,
/* No independent HP possible */
BAD_NO_INDEP_HP = 0x10,
/* Primary DAC shared with main CLFE */
BAD_SHARED_CLFE = 0x10,
/* Primary DAC shared with extra surrounds */
BAD_SHARED_EXTRA_SURROUND = 0x10,
/* Volume widget is shared */
BAD_SHARED_VOL = 0x10,
};
/* look for widgets in the given path which are appropriate for
* volume and mute controls, and assign the values to ctls[].
*
* When no appropriate widget is found in the path, the badness value
* is incremented depending on the situation. The function returns the
* total badness for both volume and mute controls.
*/
static int assign_out_path_ctls(struct hda_codec *codec, struct nid_path *path)
{
struct hda_gen_spec *spec = codec->spec;
hda_nid_t nid;
unsigned int val;
int badness = 0;
if (!path)
return BAD_SHARED_VOL * 2;
if (path->ctls[NID_PATH_VOL_CTL] ||
path->ctls[NID_PATH_MUTE_CTL])
return 0; /* already evaluated */
nid = look_for_out_vol_nid(codec, path);
if (nid) {
val = HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT);
if (spec->dac_min_mute)
val |= HDA_AMP_VAL_MIN_MUTE;
if (is_ctl_used(codec, val, NID_PATH_VOL_CTL))
badness += BAD_SHARED_VOL;
else
path->ctls[NID_PATH_VOL_CTL] = val;
} else
badness += BAD_SHARED_VOL;
nid = look_for_out_mute_nid(codec, path);
if (nid) {
unsigned int wid_type = get_wcaps_type(get_wcaps(codec, nid));
if (wid_type == AC_WID_PIN || wid_type == AC_WID_AUD_OUT ||
nid_has_mute(codec, nid, HDA_OUTPUT))
val = HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT);
else
val = HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_INPUT);
if (is_ctl_used(codec, val, NID_PATH_MUTE_CTL))
badness += BAD_SHARED_VOL;
else
path->ctls[NID_PATH_MUTE_CTL] = val;
} else
badness += BAD_SHARED_VOL;
return badness;
}
const struct badness_table hda_main_out_badness = {
.no_primary_dac = BAD_NO_PRIMARY_DAC,
.no_dac = BAD_NO_DAC,
.shared_primary = BAD_NO_PRIMARY_DAC,
.shared_surr = BAD_SHARED_SURROUND,
.shared_clfe = BAD_SHARED_CLFE,
.shared_surr_main = BAD_SHARED_SURROUND,
};
EXPORT_SYMBOL_GPL(hda_main_out_badness);
const struct badness_table hda_extra_out_badness = {
.no_primary_dac = BAD_NO_DAC,
.no_dac = BAD_NO_DAC,
.shared_primary = BAD_NO_EXTRA_DAC,
.shared_surr = BAD_SHARED_EXTRA_SURROUND,
.shared_clfe = BAD_SHARED_EXTRA_SURROUND,
.shared_surr_main = BAD_NO_EXTRA_SURR_DAC,
};
EXPORT_SYMBOL_GPL(hda_extra_out_badness);
/* get the DAC of the primary output corresponding to the given array index */
static hda_nid_t get_primary_out(struct hda_codec *codec, int idx)
{
struct hda_gen_spec *spec = codec->spec;
struct auto_pin_cfg *cfg = &spec->autocfg;
if (cfg->line_outs > idx)
return spec->private_dac_nids[idx];
idx -= cfg->line_outs;
if (spec->multi_ios > idx)
return spec->multi_io[idx].dac;
return 0;
}
/* return the DAC if it's reachable, otherwise zero */
static inline hda_nid_t try_dac(struct hda_codec *codec,
hda_nid_t dac, hda_nid_t pin)
{
return is_reachable_path(codec, dac, pin) ? dac : 0;
}
/* try to assign DACs to pins and return the resultant badness */
static int try_assign_dacs(struct hda_codec *codec, int num_outs,
const hda_nid_t *pins, hda_nid_t *dacs,
int *path_idx,
const struct badness_table *bad)
{
struct hda_gen_spec *spec = codec->spec;
int i, j;
int badness = 0;
hda_nid_t dac;
if (!num_outs)
return 0;
for (i = 0; i < num_outs; i++) {
struct nid_path *path;
hda_nid_t pin = pins[i];
if (!spec->obey_preferred_dacs) {
path = snd_hda_get_path_from_idx(codec, path_idx[i]);
if (path) {
badness += assign_out_path_ctls(codec, path);
continue;
}
}
dacs[i] = get_preferred_dac(codec, pin);
if (dacs[i]) {
if (is_dac_already_used(codec, dacs[i]))
badness += bad->shared_primary;
} else if (spec->obey_preferred_dacs) {
badness += BAD_NO_PRIMARY_DAC;
}
if (!dacs[i])
dacs[i] = look_for_dac(codec, pin, false);
if (!dacs[i] && !i) {
/* try to steal the DAC of surrounds for the front */
for (j = 1; j < num_outs; j++) {
if (is_reachable_path(codec, dacs[j], pin)) {
dacs[0] = dacs[j];
dacs[j] = 0;
invalidate_nid_path(codec, path_idx[j]);
path_idx[j] = 0;
break;
}
}
}
dac = dacs[i];
if (!dac) {
if (num_outs > 2)
dac = try_dac(codec, get_primary_out(codec, i), pin);
if (!dac)
dac = try_dac(codec, dacs[0], pin);
if (!dac)
dac = try_dac(codec, get_primary_out(codec, i), pin);
if (dac) {
if (!i)
badness += bad->shared_primary;
else if (i == 1)
badness += bad->shared_surr;
else
badness += bad->shared_clfe;
} else if (is_reachable_path(codec, spec->private_dac_nids[0], pin)) {
dac = spec->private_dac_nids[0];
badness += bad->shared_surr_main;
} else if (!i)
badness += bad->no_primary_dac;
else
badness += bad->no_dac;
}
if (!dac)
continue;
path = snd_hda_add_new_path(codec, dac, pin, -spec->mixer_nid);
if (!path && !i && spec->mixer_nid) {
/* try with aamix */
path = snd_hda_add_new_path(codec, dac, pin, 0);
}
if (!path) {
dacs[i] = 0;
badness += bad->no_dac;
} else {
/* print_nid_path(codec, "output", path); */
path->active = true;
path_idx[i] = snd_hda_get_path_idx(codec, path);
badness += assign_out_path_ctls(codec, path);
}
}
return badness;
}
/* return NID if the given pin has only a single connection to a certain DAC */
static hda_nid_t get_dac_if_single(struct hda_codec *codec, hda_nid_t pin)
{
struct hda_gen_spec *spec = codec->spec;
int i;
hda_nid_t nid_found = 0;
for (i = 0; i < spec->num_all_dacs; i++) {
hda_nid_t nid = spec->all_dacs[i];
if (!nid || is_dac_already_used(codec, nid))
continue;
if (is_reachable_path(codec, nid, pin)) {
if (nid_found)
return 0;
nid_found = nid;
}
}
return nid_found;
}
/* check whether the given pin can be a multi-io pin */
static bool can_be_multiio_pin(struct hda_codec *codec,
unsigned int location, hda_nid_t nid)
{
unsigned int defcfg, caps;
defcfg = snd_hda_codec_get_pincfg(codec, nid);
if (get_defcfg_connect(defcfg) != AC_JACK_PORT_COMPLEX)
return false;
if (location && get_defcfg_location(defcfg) != location)
return false;
caps = snd_hda_query_pin_caps(codec, nid);
if (!(caps & AC_PINCAP_OUT))
return false;
return true;
}
/* count the number of input pins that are capable to be multi-io */
static int count_multiio_pins(struct hda_codec *codec, hda_nid_t reference_pin)
{
struct hda_gen_spec *spec = codec->spec;
struct auto_pin_cfg *cfg = &spec->autocfg;
unsigned int defcfg = snd_hda_codec_get_pincfg(codec, reference_pin);
unsigned int location = get_defcfg_location(defcfg);
int type, i;
int num_pins = 0;
for (type = AUTO_PIN_LINE_IN; type >= AUTO_PIN_MIC; type--) {
for (i = 0; i < cfg->num_inputs; i++) {
if (cfg->inputs[i].type != type)
continue;
if (can_be_multiio_pin(codec, location,
cfg->inputs[i].pin))
num_pins++;
}
}
return num_pins;
}
/*
* multi-io helper
*
* When hardwired is set, try to fill ony hardwired pins, and returns
* zero if any pins are filled, non-zero if nothing found.
* When hardwired is off, try to fill possible input pins, and returns
* the badness value.
*/
static int fill_multi_ios(struct hda_codec *codec,
hda_nid_t reference_pin,
bool hardwired)
{
struct hda_gen_spec *spec = codec->spec;
struct auto_pin_cfg *cfg = &spec->autocfg;
int type, i, j, num_pins, old_pins;
unsigned int defcfg = snd_hda_codec_get_pincfg(codec, reference_pin);
unsigned int location = get_defcfg_location(defcfg);
int badness = 0;
struct nid_path *path;
old_pins = spec->multi_ios;
if (old_pins >= 2)
goto end_fill;
num_pins = count_multiio_pins(codec, reference_pin);
if (num_pins < 2)
goto end_fill;
for (type = AUTO_PIN_LINE_IN; type >= AUTO_PIN_MIC; type--) {
for (i = 0; i < cfg->num_inputs; i++) {
hda_nid_t nid = cfg->inputs[i].pin;
hda_nid_t dac = 0;
if (cfg->inputs[i].type != type)
continue;
if (!can_be_multiio_pin(codec, location, nid))
continue;
for (j = 0; j < spec->multi_ios; j++) {
if (nid == spec->multi_io[j].pin)
break;
}
if (j < spec->multi_ios)
continue;
if (hardwired)
dac = get_dac_if_single(codec, nid);
else if (!dac)
dac = look_for_dac(codec, nid, false);
if (!dac) {
badness++;
continue;
}
path = snd_hda_add_new_path(codec, dac, nid,
-spec->mixer_nid);
if (!path) {
badness++;
continue;
}
/* print_nid_path(codec, "multiio", path); */
spec->multi_io[spec->multi_ios].pin = nid;
spec->multi_io[spec->multi_ios].dac = dac;
spec->out_paths[cfg->line_outs + spec->multi_ios] =
snd_hda_get_path_idx(codec, path);
spec->multi_ios++;
if (spec->multi_ios >= 2)
break;
}
}
end_fill:
if (badness)
badness = BAD_MULTI_IO;
if (old_pins == spec->multi_ios) {
if (hardwired)
return 1; /* nothing found */
else
return badness; /* no badness if nothing found */
}
if (!hardwired && spec->multi_ios < 2) {
/* cancel newly assigned paths */
spec->paths.used -= spec->multi_ios - old_pins;
spec->multi_ios = old_pins;
return badness;
}
/* assign volume and mute controls */
for (i = old_pins; i < spec->multi_ios; i++) {
path = snd_hda_get_path_from_idx(codec, spec->out_paths[cfg->line_outs + i]);
badness += assign_out_path_ctls(codec, path);
}
return badness;
}
/* map DACs for all pins in the list if they are single connections */
static bool map_singles(struct hda_codec *codec, int outs,
const hda_nid_t *pins, hda_nid_t *dacs, int *path_idx)
{
struct hda_gen_spec *spec = codec->spec;
int i;
bool found = false;
for (i = 0; i < outs; i++) {
struct nid_path *path;
hda_nid_t dac;
if (dacs[i])
continue;
dac = get_dac_if_single(codec, pins[i]);
if (!dac)
continue;
path = snd_hda_add_new_path(codec, dac, pins[i],
-spec->mixer_nid);
if (!path && !i && spec->mixer_nid)
path = snd_hda_add_new_path(codec, dac, pins[i], 0);
if (path) {
dacs[i] = dac;
found = true;
/* print_nid_path(codec, "output", path); */
path->active = true;
path_idx[i] = snd_hda_get_path_idx(codec, path);
}
}
return found;
}
static inline bool has_aamix_out_paths(struct hda_gen_spec *spec)
{
return spec->aamix_out_paths[0] || spec->aamix_out_paths[1] ||
spec->aamix_out_paths[2];
}
/* create a new path including aamix if available, and return its index */
static int check_aamix_out_path(struct hda_codec *codec, int path_idx)
{
struct hda_gen_spec *spec = codec->spec;
struct nid_path *path;
hda_nid_t path_dac, dac, pin;
path = snd_hda_get_path_from_idx(codec, path_idx);
if (!path || !path->depth ||
is_nid_contained(path, spec->mixer_nid))
return 0;
path_dac = path->path[0];
dac = spec->private_dac_nids[0];
pin = path->path[path->depth - 1];
path = snd_hda_add_new_path(codec, dac, pin, spec->mixer_nid);
if (!path) {
if (dac != path_dac)
dac = path_dac;
else if (spec->multiout.hp_out_nid[0])
dac = spec->multiout.hp_out_nid[0];
else if (spec->multiout.extra_out_nid[0])
dac = spec->multiout.extra_out_nid[0];
else
dac = 0;
if (dac)
path = snd_hda_add_new_path(codec, dac, pin,
spec->mixer_nid);
}
if (!path)
return 0;
/* print_nid_path(codec, "output-aamix", path); */
path->active = false; /* unused as default */
path->pin_fixed = true; /* static route */
return snd_hda_get_path_idx(codec, path);
}
/* check whether the independent HP is available with the current config */
static bool indep_hp_possible(struct hda_codec *codec)
{
struct hda_gen_spec *spec = codec->spec;
struct auto_pin_cfg *cfg = &spec->autocfg;
struct nid_path *path;
int i, idx;
if (cfg->line_out_type == AUTO_PIN_HP_OUT)
idx = spec->out_paths[0];
else
idx = spec->hp_paths[0];
path = snd_hda_get_path_from_idx(codec, idx);
if (!path)
return false;
/* assume no path conflicts unless aamix is involved */
if (!spec->mixer_nid || !is_nid_contained(path, spec->mixer_nid))
return true;
/* check whether output paths contain aamix */
for (i = 0; i < cfg->line_outs; i++) {
if (spec->out_paths[i] == idx)
break;
path = snd_hda_get_path_from_idx(codec, spec->out_paths[i]);
if (path && is_nid_contained(path, spec->mixer_nid))
return false;
}
for (i = 0; i < cfg->speaker_outs; i++) {
path = snd_hda_get_path_from_idx(codec, spec->speaker_paths[i]);
if (path && is_nid_contained(path, spec->mixer_nid))
return false;
}
return true;
}
/* fill the empty entries in the dac array for speaker/hp with the
* shared dac pointed by the paths
*/
static void refill_shared_dacs(struct hda_codec *codec, int num_outs,
hda_nid_t *dacs, int *path_idx)
{
struct nid_path *path;
int i;
for (i = 0; i < num_outs; i++) {
if (dacs[i])
continue;
path = snd_hda_get_path_from_idx(codec, path_idx[i]);
if (!path)
continue;
dacs[i] = path->path[0];
}
}
/* fill in the dac_nids table from the parsed pin configuration */
static int fill_and_eval_dacs(struct hda_codec *codec,
bool fill_hardwired,
bool fill_mio_first)
{
struct hda_gen_spec *spec = codec->spec;
struct auto_pin_cfg *cfg = &spec->autocfg;
int i, err, badness;
/* set num_dacs once to full for look_for_dac() */
spec->multiout.num_dacs = cfg->line_outs;
spec->multiout.dac_nids = spec->private_dac_nids;
memset(spec->private_dac_nids, 0, sizeof(spec->private_dac_nids));
memset(spec->multiout.hp_out_nid, 0, sizeof(spec->multiout.hp_out_nid));
memset(spec->multiout.extra_out_nid, 0, sizeof(spec->multiout.extra_out_nid));
spec->multi_ios = 0;
snd_array_free(&spec->paths);
/* clear path indices */
memset(spec->out_paths, 0, sizeof(spec->out_paths));
memset(spec->hp_paths, 0, sizeof(spec->hp_paths));
memset(spec->speaker_paths, 0, sizeof(spec->speaker_paths));
memset(spec->aamix_out_paths, 0, sizeof(spec->aamix_out_paths));
memset(spec->digout_paths, 0, sizeof(spec->digout_paths));
memset(spec->input_paths, 0, sizeof(spec->input_paths));
memset(spec->loopback_paths, 0, sizeof(spec->loopback_paths));
memset(&spec->digin_path, 0, sizeof(spec->digin_path));
badness = 0;
/* fill hard-wired DACs first */
if (fill_hardwired) {
bool mapped;
do {
mapped = map_singles(codec, cfg->line_outs,
cfg->line_out_pins,
spec->private_dac_nids,
spec->out_paths);
mapped |= map_singles(codec, cfg->hp_outs,
cfg->hp_pins,
spec->multiout.hp_out_nid,
spec->hp_paths);
mapped |= map_singles(codec, cfg->speaker_outs,
cfg->speaker_pins,
spec->multiout.extra_out_nid,
spec->speaker_paths);
if (!spec->no_multi_io &&
fill_mio_first && cfg->line_outs == 1 &&
cfg->line_out_type != AUTO_PIN_SPEAKER_OUT) {
err = fill_multi_ios(codec, cfg->line_out_pins[0], true);
if (!err)
mapped = true;
}
} while (mapped);
}
badness += try_assign_dacs(codec, cfg->line_outs, cfg->line_out_pins,
spec->private_dac_nids, spec->out_paths,
spec->main_out_badness);
if (!spec->no_multi_io && fill_mio_first &&
cfg->line_outs == 1 && cfg->line_out_type != AUTO_PIN_SPEAKER_OUT) {
/* try to fill multi-io first */
err = fill_multi_ios(codec, cfg->line_out_pins[0], false);
if (err < 0)
return err;
/* we don't count badness at this stage yet */
}
if (cfg->line_out_type != AUTO_PIN_HP_OUT) {
err = try_assign_dacs(codec, cfg->hp_outs, cfg->hp_pins,
spec->multiout.hp_out_nid,
spec->hp_paths,
spec->extra_out_badness);
if (err < 0)
return err;
badness += err;
}
if (cfg->line_out_type != AUTO_PIN_SPEAKER_OUT) {
err = try_assign_dacs(codec, cfg->speaker_outs,
cfg->speaker_pins,
spec->multiout.extra_out_nid,
spec->speaker_paths,
spec->extra_out_badness);
if (err < 0)
return err;
badness += err;
}
if (!spec->no_multi_io &&
cfg->line_outs == 1 && cfg->line_out_type != AUTO_PIN_SPEAKER_OUT) {
err = fill_multi_ios(codec, cfg->line_out_pins[0], false);
if (err < 0)
return err;
badness += err;
}
if (spec->mixer_nid) {
spec->aamix_out_paths[0] =
check_aamix_out_path(codec, spec->out_paths[0]);
if (cfg->line_out_type != AUTO_PIN_HP_OUT)
spec->aamix_out_paths[1] =
check_aamix_out_path(codec, spec->hp_paths[0]);
if (cfg->line_out_type != AUTO_PIN_SPEAKER_OUT)
spec->aamix_out_paths[2] =
check_aamix_out_path(codec, spec->speaker_paths[0]);
}
if (!spec->no_multi_io &&
cfg->hp_outs && cfg->line_out_type == AUTO_PIN_SPEAKER_OUT)
if (count_multiio_pins(codec, cfg->hp_pins[0]) >= 2)
spec->multi_ios = 1; /* give badness */
/* re-count num_dacs and squash invalid entries */
spec->multiout.num_dacs = 0;
for (i = 0; i < cfg->line_outs; i++) {
if (spec->private_dac_nids[i])
spec->multiout.num_dacs++;
else {
memmove(spec->private_dac_nids + i,
spec->private_dac_nids + i + 1,
sizeof(hda_nid_t) * (cfg->line_outs - i - 1));
spec->private_dac_nids[cfg->line_outs - 1] = 0;
}
}
spec->ext_channel_count = spec->min_channel_count =
spec->multiout.num_dacs * 2;
if (spec->multi_ios == 2) {
for (i = 0; i < 2; i++)
spec->private_dac_nids[spec->multiout.num_dacs++] =
spec->multi_io[i].dac;
} else if (spec->multi_ios) {
spec->multi_ios = 0;
badness += BAD_MULTI_IO;
}
if (spec->indep_hp && !indep_hp_possible(codec))
badness += BAD_NO_INDEP_HP;
/* re-fill the shared DAC for speaker / headphone */
if (cfg->line_out_type != AUTO_PIN_HP_OUT)
refill_shared_dacs(codec, cfg->hp_outs,
spec->multiout.hp_out_nid,
spec->hp_paths);
if (cfg->line_out_type != AUTO_PIN_SPEAKER_OUT)
refill_shared_dacs(codec, cfg->speaker_outs,
spec->multiout.extra_out_nid,
spec->speaker_paths);
return badness;
}
#define DEBUG_BADNESS
#ifdef DEBUG_BADNESS
#define debug_badness(fmt, ...) \
codec_dbg(codec, fmt, ##__VA_ARGS__)
#else
#define debug_badness(fmt, ...) \
do { if (0) codec_dbg(codec, fmt, ##__VA_ARGS__); } while (0)
#endif
#ifdef DEBUG_BADNESS
static inline void print_nid_path_idx(struct hda_codec *codec,
const char *pfx, int idx)
{
struct nid_path *path;
path = snd_hda_get_path_from_idx(codec, idx);
if (path)
print_nid_path(codec, pfx, path);
}
static void debug_show_configs(struct hda_codec *codec,
struct auto_pin_cfg *cfg)
{
struct hda_gen_spec *spec = codec->spec;
static const char * const lo_type[3] = { "LO", "SP", "HP" };
int i;
debug_badness("multi_outs = %x/%x/%x/%x : %x/%x/%x/%x (type %s)\n",
cfg->line_out_pins[0], cfg->line_out_pins[1],
cfg->line_out_pins[2], cfg->line_out_pins[3],
spec->multiout.dac_nids[0],
spec->multiout.dac_nids[1],
spec->multiout.dac_nids[2],
spec->multiout.dac_nids[3],
lo_type[cfg->line_out_type]);
for (i = 0; i < cfg->line_outs; i++)
print_nid_path_idx(codec, " out", spec->out_paths[i]);
if (spec->multi_ios > 0)
debug_badness("multi_ios(%d) = %x/%x : %x/%x\n",
spec->multi_ios,
spec->multi_io[0].pin, spec->multi_io[1].pin,
spec->multi_io[0].dac, spec->multi_io[1].dac);
for (i = 0; i < spec->multi_ios; i++)
print_nid_path_idx(codec, " mio",
spec->out_paths[cfg->line_outs + i]);
if (cfg->hp_outs)
debug_badness("hp_outs = %x/%x/%x/%x : %x/%x/%x/%x\n",
cfg->hp_pins[0], cfg->hp_pins[1],
cfg->hp_pins[2], cfg->hp_pins[3],
spec->multiout.hp_out_nid[0],
spec->multiout.hp_out_nid[1],
spec->multiout.hp_out_nid[2],
spec->multiout.hp_out_nid[3]);
for (i = 0; i < cfg->hp_outs; i++)
print_nid_path_idx(codec, " hp ", spec->hp_paths[i]);
if (cfg->speaker_outs)
debug_badness("spk_outs = %x/%x/%x/%x : %x/%x/%x/%x\n",
cfg->speaker_pins[0], cfg->speaker_pins[1],
cfg->speaker_pins[2], cfg->speaker_pins[3],
spec->multiout.extra_out_nid[0],
spec->multiout.extra_out_nid[1],
spec->multiout.extra_out_nid[2],
spec->multiout.extra_out_nid[3]);
for (i = 0; i < cfg->speaker_outs; i++)
print_nid_path_idx(codec, " spk", spec->speaker_paths[i]);
for (i = 0; i < 3; i++)
print_nid_path_idx(codec, " mix", spec->aamix_out_paths[i]);
}
#else
#define debug_show_configs(codec, cfg) /* NOP */
#endif
/* find all available DACs of the codec */
static void fill_all_dac_nids(struct hda_codec *codec)
{
struct hda_gen_spec *spec = codec->spec;
hda_nid_t nid;
spec->num_all_dacs = 0;
memset(spec->all_dacs, 0, sizeof(spec->all_dacs));
for_each_hda_codec_node(nid, codec) {
if (get_wcaps_type(get_wcaps(codec, nid)) != AC_WID_AUD_OUT)
continue;
if (spec->num_all_dacs >= ARRAY_SIZE(spec->all_dacs)) {
codec_err(codec, "Too many DACs!\n");
break;
}
spec->all_dacs[spec->num_all_dacs++] = nid;
}
}
static int parse_output_paths(struct hda_codec *codec)
{
struct hda_gen_spec *spec = codec->spec;
struct auto_pin_cfg *cfg = &spec->autocfg;
struct auto_pin_cfg *best_cfg;
unsigned int val;
int best_badness = INT_MAX;
int badness;
bool fill_hardwired = true, fill_mio_first = true;
bool best_wired = true, best_mio = true;
bool hp_spk_swapped = false;
best_cfg = kmalloc(sizeof(*best_cfg), GFP_KERNEL);
if (!best_cfg)
return -ENOMEM;
*best_cfg = *cfg;
for (;;) {
badness = fill_and_eval_dacs(codec, fill_hardwired,
fill_mio_first);
if (badness < 0) {
kfree(best_cfg);
return badness;
}
debug_badness("==> lo_type=%d, wired=%d, mio=%d, badness=0x%x\n",
cfg->line_out_type, fill_hardwired, fill_mio_first,
badness);
debug_show_configs(codec, cfg);
if (badness < best_badness) {
best_badness = badness;
*best_cfg = *cfg;
best_wired = fill_hardwired;
best_mio = fill_mio_first;
}
if (!badness)
break;
fill_mio_first = !fill_mio_first;
if (!fill_mio_first)
continue;
fill_hardwired = !fill_hardwired;
if (!fill_hardwired)
continue;
if (hp_spk_swapped)
break;
hp_spk_swapped = true;
if (cfg->speaker_outs > 0 &&
cfg->line_out_type == AUTO_PIN_HP_OUT) {
cfg->hp_outs = cfg->line_outs;
memcpy(cfg->hp_pins, cfg->line_out_pins,
sizeof(cfg->hp_pins));
cfg->line_outs = cfg->speaker_outs;
memcpy(cfg->line_out_pins, cfg->speaker_pins,
sizeof(cfg->speaker_pins));
cfg->speaker_outs = 0;
memset(cfg->speaker_pins, 0, sizeof(cfg->speaker_pins));
cfg->line_out_type = AUTO_PIN_SPEAKER_OUT;
fill_hardwired = true;
continue;
}
if (cfg->hp_outs > 0 &&
cfg->line_out_type == AUTO_PIN_SPEAKER_OUT) {
cfg->speaker_outs = cfg->line_outs;
memcpy(cfg->speaker_pins, cfg->line_out_pins,
sizeof(cfg->speaker_pins));
cfg->line_outs = cfg->hp_outs;
memcpy(cfg->line_out_pins, cfg->hp_pins,
sizeof(cfg->hp_pins));
cfg->hp_outs = 0;
memset(cfg->hp_pins, 0, sizeof(cfg->hp_pins));
cfg->line_out_type = AUTO_PIN_HP_OUT;
fill_hardwired = true;
continue;
}
break;
}
if (badness) {
debug_badness("==> restoring best_cfg\n");
*cfg = *best_cfg;
fill_and_eval_dacs(codec, best_wired, best_mio);
}
debug_badness("==> Best config: lo_type=%d, wired=%d, mio=%d\n",
cfg->line_out_type, best_wired, best_mio);
debug_show_configs(codec, cfg);
if (cfg->line_out_pins[0]) {
struct nid_path *path;
path = snd_hda_get_path_from_idx(codec, spec->out_paths[0]);
if (path)
spec->vmaster_nid = look_for_out_vol_nid(codec, path);
if (spec->vmaster_nid) {
snd_hda_set_vmaster_tlv(codec, spec->vmaster_nid,
HDA_OUTPUT, spec->vmaster_tlv);
if (spec->dac_min_mute)
spec->vmaster_tlv[SNDRV_CTL_TLVO_DB_SCALE_MUTE_AND_STEP] |= TLV_DB_SCALE_MUTE;
}
}
/* set initial pinctl targets */
if (spec->prefer_hp_amp || cfg->line_out_type == AUTO_PIN_HP_OUT)
val = PIN_HP;
else
val = PIN_OUT;
set_pin_targets(codec, cfg->line_outs, cfg->line_out_pins, val);
if (cfg->line_out_type != AUTO_PIN_HP_OUT)
set_pin_targets(codec, cfg->hp_outs, cfg->hp_pins, PIN_HP);
if (cfg->line_out_type != AUTO_PIN_SPEAKER_OUT) {
val = spec->prefer_hp_amp ? PIN_HP : PIN_OUT;
set_pin_targets(codec, cfg->speaker_outs,
cfg->speaker_pins, val);
}
/* clear indep_hp flag if not available */
if (spec->indep_hp && !indep_hp_possible(codec))
spec->indep_hp = 0;
kfree(best_cfg);
return 0;
}
/* add playback controls from the parsed DAC table */
static int create_multi_out_ctls(struct hda_codec *codec,
const struct auto_pin_cfg *cfg)
{
struct hda_gen_spec *spec = codec->spec;
int i, err, noutputs;
noutputs = cfg->line_outs;
if (spec->multi_ios > 0 && cfg->line_outs < 3)
noutputs += spec->multi_ios;
for (i = 0; i < noutputs; i++) {
const char *name;
int index;
struct nid_path *path;
path = snd_hda_get_path_from_idx(codec, spec->out_paths[i]);
if (!path)
continue;
name = get_line_out_pfx(codec, i, &index, NID_PATH_VOL_CTL);
if (!name || !strcmp(name, "CLFE")) {
/* Center/LFE */
err = add_vol_ctl(codec, "Center", 0, 1, path);
if (err < 0)
return err;
err = add_vol_ctl(codec, "LFE", 0, 2, path);
if (err < 0)
return err;
} else {
err = add_stereo_vol(codec, name, index, path);
if (err < 0)
return err;
}
name = get_line_out_pfx(codec, i, &index, NID_PATH_MUTE_CTL);
if (!name || !strcmp(name, "CLFE")) {
err = add_sw_ctl(codec, "Center", 0, 1, path);
if (err < 0)
return err;
err = add_sw_ctl(codec, "LFE", 0, 2, path);
if (err < 0)
return err;
} else {
err = add_stereo_sw(codec, name, index, path);
if (err < 0)
return err;
}
}
return 0;
}
static int create_extra_out(struct hda_codec *codec, int path_idx,
const char *pfx, int cidx)
{
struct nid_path *path;
int err;
path = snd_hda_get_path_from_idx(codec, path_idx);
if (!path)
return 0;
err = add_stereo_vol(codec, pfx, cidx, path);
if (err < 0)
return err;
err = add_stereo_sw(codec, pfx, cidx, path);
if (err < 0)
return err;
return 0;
}
/* add playback controls for speaker and HP outputs */
static int create_extra_outs(struct hda_codec *codec, int num_pins,
const int *paths, const char *pfx)
{
int i;
for (i = 0; i < num_pins; i++) {
const char *name;
char tmp[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
int err, idx = 0;
if (num_pins == 2 && i == 1 && !strcmp(pfx, "Speaker"))
name = "Bass Speaker";
else if (num_pins >= 3) {
snprintf(tmp, sizeof(tmp), "%s %s",
pfx, channel_name[i]);
name = tmp;
} else {
name = pfx;
idx = i;
}
err = create_extra_out(codec, paths[i], name, idx);
if (err < 0)
return err;
}
return 0;
}
static int create_hp_out_ctls(struct hda_codec *codec)
{
struct hda_gen_spec *spec = codec->spec;
return create_extra_outs(codec, spec->autocfg.hp_outs,
spec->hp_paths,
"Headphone");
}
static int create_speaker_out_ctls(struct hda_codec *codec)
{
struct hda_gen_spec *spec = codec->spec;
return create_extra_outs(codec, spec->autocfg.speaker_outs,
spec->speaker_paths,
"Speaker");
}
/*
* independent HP controls
*/
static void call_hp_automute(struct hda_codec *codec,
struct hda_jack_callback *jack);
static int indep_hp_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
return snd_hda_enum_bool_helper_info(kcontrol, uinfo);
}
static int indep_hp_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
struct hda_gen_spec *spec = codec->spec;
ucontrol->value.enumerated.item[0] = spec->indep_hp_enabled;
return 0;
}
static void update_aamix_paths(struct hda_codec *codec, bool do_mix,
int nomix_path_idx, int mix_path_idx,
int out_type);
static int indep_hp_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
struct hda_gen_spec *spec = codec->spec;
unsigned int select = ucontrol->value.enumerated.item[0];
int ret = 0;
mutex_lock(&spec->pcm_mutex);
if (spec->active_streams) {
ret = -EBUSY;
goto unlock;
}
if (spec->indep_hp_enabled != select) {
hda_nid_t *dacp;
if (spec->autocfg.line_out_type == AUTO_PIN_HP_OUT)
dacp = &spec->private_dac_nids[0];
else
dacp = &spec->multiout.hp_out_nid[0];
/* update HP aamix paths in case it conflicts with indep HP */
if (spec->have_aamix_ctl) {
if (spec->autocfg.line_out_type == AUTO_PIN_HP_OUT)
update_aamix_paths(codec, spec->aamix_mode,
spec->out_paths[0],
spec->aamix_out_paths[0],
spec->autocfg.line_out_type);
else
update_aamix_paths(codec, spec->aamix_mode,
spec->hp_paths[0],
spec->aamix_out_paths[1],
AUTO_PIN_HP_OUT);
}
spec->indep_hp_enabled = select;
if (spec->indep_hp_enabled)
*dacp = 0;
else
*dacp = spec->alt_dac_nid;
call_hp_automute(codec, NULL);
ret = 1;
}
unlock:
mutex_unlock(&spec->pcm_mutex);
return ret;
}
static const struct snd_kcontrol_new indep_hp_ctl = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Independent HP",
.info = indep_hp_info,
.get = indep_hp_get,
.put = indep_hp_put,
};
static int create_indep_hp_ctls(struct hda_codec *codec)
{
struct hda_gen_spec *spec = codec->spec;
hda_nid_t dac;
if (!spec->indep_hp)
return 0;
if (spec->autocfg.line_out_type == AUTO_PIN_HP_OUT)
dac = spec->multiout.dac_nids[0];
else
dac = spec->multiout.hp_out_nid[0];
if (!dac) {
spec->indep_hp = 0;
return 0;
}
spec->indep_hp_enabled = false;
spec->alt_dac_nid = dac;
if (!snd_hda_gen_add_kctl(spec, NULL, &indep_hp_ctl))
return -ENOMEM;
return 0;
}
/*
* channel mode enum control
*/
static int ch_mode_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
struct hda_gen_spec *spec = codec->spec;
int chs;
uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
uinfo->count = 1;
uinfo->value.enumerated.items = spec->multi_ios + 1;
if (uinfo->value.enumerated.item > spec->multi_ios)
uinfo->value.enumerated.item = spec->multi_ios;
chs = uinfo->value.enumerated.item * 2 + spec->min_channel_count;
sprintf(uinfo->value.enumerated.name, "%dch", chs);
return 0;
}
static int ch_mode_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
struct hda_gen_spec *spec = codec->spec;
ucontrol->value.enumerated.item[0] =
(spec->ext_channel_count - spec->min_channel_count) / 2;
return 0;
}
static inline struct nid_path *
get_multiio_path(struct hda_codec *codec, int idx)
{
struct hda_gen_spec *spec = codec->spec;
return snd_hda_get_path_from_idx(codec,
spec->out_paths[spec->autocfg.line_outs + idx]);
}
static void update_automute_all(struct hda_codec *codec);
/* Default value to be passed as aamix argument for snd_hda_activate_path();
* used for output paths
*/
static bool aamix_default(struct hda_gen_spec *spec)
{
return !spec->have_aamix_ctl || spec->aamix_mode;
}
static int set_multi_io(struct hda_codec *codec, int idx, bool output)
{
struct hda_gen_spec *spec = codec->spec;
hda_nid_t nid = spec->multi_io[idx].pin;
struct nid_path *path;
path = get_multiio_path(codec, idx);
if (!path)
return -EINVAL;
if (path->active == output)
return 0;
if (output) {
set_pin_target(codec, nid, PIN_OUT, true);
snd_hda_activate_path(codec, path, true, aamix_default(spec));
set_pin_eapd(codec, nid, true);
} else {
set_pin_eapd(codec, nid, false);
snd_hda_activate_path(codec, path, false, aamix_default(spec));
set_pin_target(codec, nid, spec->multi_io[idx].ctl_in, true);
path_power_down_sync(codec, path);
}
/* update jack retasking in case it modifies any of them */
update_automute_all(codec);
return 0;
}
static int ch_mode_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
struct hda_gen_spec *spec = codec->spec;
int i, ch;
ch = ucontrol->value.enumerated.item[0];
if (ch < 0 || ch > spec->multi_ios)
return -EINVAL;
if (ch == (spec->ext_channel_count - spec->min_channel_count) / 2)
return 0;
spec->ext_channel_count = ch * 2 + spec->min_channel_count;
for (i = 0; i < spec->multi_ios; i++)
set_multi_io(codec, i, i < ch);
spec->multiout.max_channels = max(spec->ext_channel_count,
spec->const_channel_count);
if (spec->need_dac_fix)
spec->multiout.num_dacs = spec->multiout.max_channels / 2;
return 1;
}
static const struct snd_kcontrol_new channel_mode_enum = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Channel Mode",
.info = ch_mode_info,
.get = ch_mode_get,
.put = ch_mode_put,
};
static int create_multi_channel_mode(struct hda_codec *codec)
{
struct hda_gen_spec *spec = codec->spec;
if (spec->multi_ios > 0) {
if (!snd_hda_gen_add_kctl(spec, NULL, &channel_mode_enum))
return -ENOMEM;
}
return 0;
}
/*
* aamix loopback enable/disable switch
*/
#define loopback_mixing_info indep_hp_info
static int loopback_mixing_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
struct hda_gen_spec *spec = codec->spec;
ucontrol->value.enumerated.item[0] = spec->aamix_mode;
return 0;
}
static void update_aamix_paths(struct hda_codec *codec, bool do_mix,
int nomix_path_idx, int mix_path_idx,
int out_type)
{
struct hda_gen_spec *spec = codec->spec;
struct nid_path *nomix_path, *mix_path;
nomix_path = snd_hda_get_path_from_idx(codec, nomix_path_idx);
mix_path = snd_hda_get_path_from_idx(codec, mix_path_idx);
if (!nomix_path || !mix_path)
return;
/* if HP aamix path is driven from a different DAC and the
* independent HP mode is ON, can't turn on aamix path
*/
if (out_type == AUTO_PIN_HP_OUT && spec->indep_hp_enabled &&
mix_path->path[0] != spec->alt_dac_nid)
do_mix = false;
if (do_mix) {
snd_hda_activate_path(codec, nomix_path, false, true);
snd_hda_activate_path(codec, mix_path, true, true);
path_power_down_sync(codec, nomix_path);
} else {
snd_hda_activate_path(codec, mix_path, false, false);
snd_hda_activate_path(codec, nomix_path, true, false);
path_power_down_sync(codec, mix_path);
}
}
/* re-initialize the output paths; only called from loopback_mixing_put() */
static void update_output_paths(struct hda_codec *codec, int num_outs,
const int *paths)
{
struct hda_gen_spec *spec = codec->spec;
struct nid_path *path;
int i;
for (i = 0; i < num_outs; i++) {
path = snd_hda_get_path_from_idx(codec, paths[i]);
if (path)
snd_hda_activate_path(codec, path, path->active,
spec->aamix_mode);
}
}
static int loopback_mixing_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
struct hda_gen_spec *spec = codec->spec;
const struct auto_pin_cfg *cfg = &spec->autocfg;
unsigned int val = ucontrol->value.enumerated.item[0];
if (val == spec->aamix_mode)
return 0;
spec->aamix_mode = val;
if (has_aamix_out_paths(spec)) {
update_aamix_paths(codec, val, spec->out_paths[0],
spec->aamix_out_paths[0],
cfg->line_out_type);
update_aamix_paths(codec, val, spec->hp_paths[0],
spec->aamix_out_paths[1],
AUTO_PIN_HP_OUT);
update_aamix_paths(codec, val, spec->speaker_paths[0],
spec->aamix_out_paths[2],
AUTO_PIN_SPEAKER_OUT);
} else {
update_output_paths(codec, cfg->line_outs, spec->out_paths);
if (cfg->line_out_type != AUTO_PIN_HP_OUT)
update_output_paths(codec, cfg->hp_outs, spec->hp_paths);
if (cfg->line_out_type != AUTO_PIN_SPEAKER_OUT)
update_output_paths(codec, cfg->speaker_outs,
spec->speaker_paths);
}
return 1;
}
static const struct snd_kcontrol_new loopback_mixing_enum = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Loopback Mixing",
.info = loopback_mixing_info,
.get = loopback_mixing_get,
.put = loopback_mixing_put,
};
static int create_loopback_mixing_ctl(struct hda_codec *codec)
{
struct hda_gen_spec *spec = codec->spec;
if (!spec->mixer_nid)
return 0;
if (!snd_hda_gen_add_kctl(spec, NULL, &loopback_mixing_enum))
return -ENOMEM;
spec->have_aamix_ctl = 1;
return 0;
}
/*
* shared headphone/mic handling
*/
static void call_update_outputs(struct hda_codec *codec);
/* for shared I/O, change the pin-control accordingly */
static void update_hp_mic(struct hda_codec *codec, int adc_mux, bool force)
{
struct hda_gen_spec *spec = codec->spec;
bool as_mic;
unsigned int val;
hda_nid_t pin;
pin = spec->hp_mic_pin;
as_mic = spec->cur_mux[adc_mux] == spec->hp_mic_mux_idx;
if (!force) {
val = snd_hda_codec_get_pin_target(codec, pin);
if (as_mic) {
if (val & PIN_IN)
return;
} else {
if (val & PIN_OUT)
return;
}
}
val = snd_hda_get_default_vref(codec, pin);
/* if the HP pin doesn't support VREF and the codec driver gives an
* alternative pin, set up the VREF on that pin instead
*/
if (val == AC_PINCTL_VREF_HIZ && spec->shared_mic_vref_pin) {
const hda_nid_t vref_pin = spec->shared_mic_vref_pin;
unsigned int vref_val = snd_hda_get_default_vref(codec, vref_pin);
if (vref_val != AC_PINCTL_VREF_HIZ)
snd_hda_set_pin_ctl_cache(codec, vref_pin,
PIN_IN | (as_mic ? vref_val : 0));
}
if (!spec->hp_mic_jack_modes) {
if (as_mic)
val |= PIN_IN;
else
val = PIN_HP;
set_pin_target(codec, pin, val, true);
call_hp_automute(codec, NULL);
}
}
/* create a shared input with the headphone out */
static int create_hp_mic(struct hda_codec *codec)
{
struct hda_gen_spec *spec = codec->spec;
struct auto_pin_cfg *cfg = &spec->autocfg;
unsigned int defcfg;
hda_nid_t nid;
if (!spec->hp_mic) {
if (spec->suppress_hp_mic_detect)
return 0;
/* automatic detection: only if no input or a single internal
* input pin is found, try to detect the shared hp/mic
*/
if (cfg->num_inputs > 1)
return 0;
else if (cfg->num_inputs == 1) {
defcfg = snd_hda_codec_get_pincfg(codec, cfg->inputs[0].pin);
if (snd_hda_get_input_pin_attr(defcfg) != INPUT_PIN_ATTR_INT)
return 0;
}
}
spec->hp_mic = 0; /* clear once */
if (cfg->num_inputs >= AUTO_CFG_MAX_INS)
return 0;
nid = 0;
if (cfg->line_out_type == AUTO_PIN_HP_OUT && cfg->line_outs > 0)
nid = cfg->line_out_pins[0];
else if (cfg->hp_outs > 0)
nid = cfg->hp_pins[0];
if (!nid)
return 0;
if (!(snd_hda_query_pin_caps(codec, nid) & AC_PINCAP_IN))
return 0; /* no input */
cfg->inputs[cfg->num_inputs].pin = nid;
cfg->inputs[cfg->num_inputs].type = AUTO_PIN_MIC;
cfg->inputs[cfg->num_inputs].is_headphone_mic = 1;
cfg->num_inputs++;
spec->hp_mic = 1;
spec->hp_mic_pin = nid;
/* we can't handle auto-mic together with HP-mic */
spec->suppress_auto_mic = 1;
codec_dbg(codec, "Enable shared I/O jack on NID 0x%x\n", nid);
return 0;
}
/*
* output jack mode
*/
static int create_hp_mic_jack_mode(struct hda_codec *codec, hda_nid_t pin);
static const char * const out_jack_texts[] = {
"Line Out", "Headphone Out",
};
static int out_jack_mode_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
return snd_hda_enum_helper_info(kcontrol, uinfo, 2, out_jack_texts);
}
static int out_jack_mode_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
hda_nid_t nid = kcontrol->private_value;
if (snd_hda_codec_get_pin_target(codec, nid) == PIN_HP)
ucontrol->value.enumerated.item[0] = 1;
else
ucontrol->value.enumerated.item[0] = 0;
return 0;
}
static int out_jack_mode_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
hda_nid_t nid = kcontrol->private_value;
unsigned int val;
val = ucontrol->value.enumerated.item[0] ? PIN_HP : PIN_OUT;
if (snd_hda_codec_get_pin_target(codec, nid) == val)
return 0;
snd_hda_set_pin_ctl_cache(codec, nid, val);
return 1;
}
static const struct snd_kcontrol_new out_jack_mode_enum = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.info = out_jack_mode_info,
.get = out_jack_mode_get,
.put = out_jack_mode_put,
};
static bool find_kctl_name(struct hda_codec *codec, const char *name, int idx)
{
struct hda_gen_spec *spec = codec->spec;
const struct snd_kcontrol_new *kctl;
int i;
snd_array_for_each(&spec->kctls, i, kctl) {
if (!strcmp(kctl->name, name) && kctl->index == idx)
return true;
}
return false;
}
static void get_jack_mode_name(struct hda_codec *codec, hda_nid_t pin,
char *name, size_t name_len)
{
struct hda_gen_spec *spec = codec->spec;
int idx = 0;
snd_hda_get_pin_label(codec, pin, &spec->autocfg, name, name_len, &idx);
strlcat(name, " Jack Mode", name_len);
for (; find_kctl_name(codec, name, idx); idx++)
;
}
static int get_out_jack_num_items(struct hda_codec *codec, hda_nid_t pin)
{
struct hda_gen_spec *spec = codec->spec;
if (spec->add_jack_modes) {
unsigned int pincap = snd_hda_query_pin_caps(codec, pin);
if ((pincap & AC_PINCAP_OUT) && (pincap & AC_PINCAP_HP_DRV))
return 2;
}
return 1;
}
static int create_out_jack_modes(struct hda_codec *codec, int num_pins,
hda_nid_t *pins)
{
struct hda_gen_spec *spec = codec->spec;
int i;
for (i = 0; i < num_pins; i++) {
hda_nid_t pin = pins[i];
if (pin == spec->hp_mic_pin)
continue;
if (get_out_jack_num_items(codec, pin) > 1) {
struct snd_kcontrol_new *knew;
char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
get_jack_mode_name(codec, pin, name, sizeof(name));
knew = snd_hda_gen_add_kctl(spec, name,
&out_jack_mode_enum);
if (!knew)
return -ENOMEM;
knew->private_value = pin;
}
}
return 0;
}
/*
* input jack mode
*/
/* from AC_PINCTL_VREF_HIZ to AC_PINCTL_VREF_100 */
#define NUM_VREFS 6
static const char * const vref_texts[NUM_VREFS] = {
"Line In", "Mic 50pc Bias", "Mic 0V Bias",
"", "Mic 80pc Bias", "Mic 100pc Bias"
};
static unsigned int get_vref_caps(struct hda_codec *codec, hda_nid_t pin)
{
unsigned int pincap;
pincap = snd_hda_query_pin_caps(codec, pin);
pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
/* filter out unusual vrefs */
pincap &= ~(AC_PINCAP_VREF_GRD | AC_PINCAP_VREF_100);
return pincap;
}
/* convert from the enum item index to the vref ctl index (0=HIZ, 1=50%...) */
static int get_vref_idx(unsigned int vref_caps, unsigned int item_idx)
{
unsigned int i, n = 0;
for (i = 0; i < NUM_VREFS; i++) {
if (vref_caps & (1 << i)) {
if (n == item_idx)
return i;
n++;
}
}
return 0;
}
/* convert back from the vref ctl index to the enum item index */
static int cvt_from_vref_idx(unsigned int vref_caps, unsigned int idx)
{
unsigned int i, n = 0;
for (i = 0; i < NUM_VREFS; i++) {
if (i == idx)
return n;
if (vref_caps & (1 << i))
n++;
}
return 0;
}
static int in_jack_mode_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
hda_nid_t nid = kcontrol->private_value;
unsigned int vref_caps = get_vref_caps(codec, nid);
snd_hda_enum_helper_info(kcontrol, uinfo, hweight32(vref_caps),
vref_texts);
/* set the right text */
strcpy(uinfo->value.enumerated.name,
vref_texts[get_vref_idx(vref_caps, uinfo->value.enumerated.item)]);
return 0;
}
static int in_jack_mode_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
hda_nid_t nid = kcontrol->private_value;
unsigned int vref_caps = get_vref_caps(codec, nid);
unsigned int idx;
idx = snd_hda_codec_get_pin_target(codec, nid) & AC_PINCTL_VREFEN;
ucontrol->value.enumerated.item[0] = cvt_from_vref_idx(vref_caps, idx);
return 0;
}
static int in_jack_mode_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
hda_nid_t nid = kcontrol->private_value;
unsigned int vref_caps = get_vref_caps(codec, nid);
unsigned int val, idx;
val = snd_hda_codec_get_pin_target(codec, nid);
idx = cvt_from_vref_idx(vref_caps, val & AC_PINCTL_VREFEN);
if (idx == ucontrol->value.enumerated.item[0])
return 0;
val &= ~AC_PINCTL_VREFEN;
val |= get_vref_idx(vref_caps, ucontrol->value.enumerated.item[0]);
snd_hda_set_pin_ctl_cache(codec, nid, val);
return 1;
}
static const struct snd_kcontrol_new in_jack_mode_enum = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.info = in_jack_mode_info,
.get = in_jack_mode_get,
.put = in_jack_mode_put,
};
static int get_in_jack_num_items(struct hda_codec *codec, hda_nid_t pin)
{
struct hda_gen_spec *spec = codec->spec;
int nitems = 0;
if (spec->add_jack_modes)
nitems = hweight32(get_vref_caps(codec, pin));
return nitems ? nitems : 1;
}
static int create_in_jack_mode(struct hda_codec *codec, hda_nid_t pin)
{
struct hda_gen_spec *spec = codec->spec;
struct snd_kcontrol_new *knew;
char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
unsigned int defcfg;
if (pin == spec->hp_mic_pin)
return 0; /* already done in create_out_jack_mode() */
/* no jack mode for fixed pins */
defcfg = snd_hda_codec_get_pincfg(codec, pin);
if (snd_hda_get_input_pin_attr(defcfg) == INPUT_PIN_ATTR_INT)
return 0;
/* no multiple vref caps? */
if (get_in_jack_num_items(codec, pin) <= 1)
return 0;
get_jack_mode_name(codec, pin, name, sizeof(name));
knew = snd_hda_gen_add_kctl(spec, name, &in_jack_mode_enum);
if (!knew)
return -ENOMEM;
knew->private_value = pin;
return 0;
}
/*
* HP/mic shared jack mode
*/
static int hp_mic_jack_mode_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
hda_nid_t nid = kcontrol->private_value;
int out_jacks = get_out_jack_num_items(codec, nid);
int in_jacks = get_in_jack_num_items(codec, nid);
const char *text = NULL;
int idx;
uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
uinfo->count = 1;
uinfo->value.enumerated.items = out_jacks + in_jacks;
if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
idx = uinfo->value.enumerated.item;
if (idx < out_jacks) {
if (out_jacks > 1)
text = out_jack_texts[idx];
else
text = "Headphone Out";
} else {
idx -= out_jacks;
if (in_jacks > 1) {
unsigned int vref_caps = get_vref_caps(codec, nid);
text = vref_texts[get_vref_idx(vref_caps, idx)];
} else
text = "Mic In";
}
strcpy(uinfo->value.enumerated.name, text);
return 0;
}
static int get_cur_hp_mic_jack_mode(struct hda_codec *codec, hda_nid_t nid)
{
int out_jacks = get_out_jack_num_items(codec, nid);
int in_jacks = get_in_jack_num_items(codec, nid);
unsigned int val = snd_hda_codec_get_pin_target(codec, nid);
int idx = 0;
if (val & PIN_OUT) {
if (out_jacks > 1 && val == PIN_HP)
idx = 1;
} else if (val & PIN_IN) {
idx = out_jacks;
if (in_jacks > 1) {
unsigned int vref_caps = get_vref_caps(codec, nid);
val &= AC_PINCTL_VREFEN;
idx += cvt_from_vref_idx(vref_caps, val);
}
}
return idx;
}
static int hp_mic_jack_mode_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
hda_nid_t nid = kcontrol->private_value;
ucontrol->value.enumerated.item[0] =
get_cur_hp_mic_jack_mode(codec, nid);
return 0;
}
static int hp_mic_jack_mode_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
hda_nid_t nid = kcontrol->private_value;
int out_jacks = get_out_jack_num_items(codec, nid);
int in_jacks = get_in_jack_num_items(codec, nid);
unsigned int val, oldval, idx;
oldval = get_cur_hp_mic_jack_mode(codec, nid);
idx = ucontrol->value.enumerated.item[0];
if (oldval == idx)
return 0;
if (idx < out_jacks) {
if (out_jacks > 1)
val = idx ? PIN_HP : PIN_OUT;
else
val = PIN_HP;
} else {
idx -= out_jacks;
if (in_jacks > 1) {
unsigned int vref_caps = get_vref_caps(codec, nid);
val = snd_hda_codec_get_pin_target(codec, nid);
val &= ~(AC_PINCTL_VREFEN | PIN_HP);
val |= get_vref_idx(vref_caps, idx) | PIN_IN;
} else
val = snd_hda_get_default_vref(codec, nid) | PIN_IN;
}
snd_hda_set_pin_ctl_cache(codec, nid, val);
call_hp_automute(codec, NULL);
return 1;
}
static const struct snd_kcontrol_new hp_mic_jack_mode_enum = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.info = hp_mic_jack_mode_info,
.get = hp_mic_jack_mode_get,
.put = hp_mic_jack_mode_put,
};
static int create_hp_mic_jack_mode(struct hda_codec *codec, hda_nid_t pin)
{
struct hda_gen_spec *spec = codec->spec;
struct snd_kcontrol_new *knew;
knew = snd_hda_gen_add_kctl(spec, "Headphone Mic Jack Mode",
&hp_mic_jack_mode_enum);
if (!knew)
return -ENOMEM;
knew->private_value = pin;
spec->hp_mic_jack_modes = 1;
return 0;
}
/*
* Parse input paths
*/
/* add the powersave loopback-list entry */
static int add_loopback_list(struct hda_gen_spec *spec, hda_nid_t mix, int idx)
{
struct hda_amp_list *list;
list = snd_array_new(&spec->loopback_list);
if (!list)
return -ENOMEM;
list->nid = mix;
list->dir = HDA_INPUT;
list->idx = idx;
spec->loopback.amplist = spec->loopback_list.list;
return 0;
}
/* return true if either a volume or a mute amp is found for the given
* aamix path; the amp has to be either in the mixer node or its direct leaf
*/
static bool look_for_mix_leaf_ctls(struct hda_codec *codec, hda_nid_t mix_nid,
hda_nid_t pin, unsigned int *mix_val,
unsigned int *mute_val)
{
int idx, num_conns;
const hda_nid_t *list;
hda_nid_t nid;
idx = snd_hda_get_conn_index(codec, mix_nid, pin, true);
if (idx < 0)
return false;
*mix_val = *mute_val = 0;
if (nid_has_volume(codec, mix_nid, HDA_INPUT))
*mix_val = HDA_COMPOSE_AMP_VAL(mix_nid, 3, idx, HDA_INPUT);
if (nid_has_mute(codec, mix_nid, HDA_INPUT))
*mute_val = HDA_COMPOSE_AMP_VAL(mix_nid, 3, idx, HDA_INPUT);
if (*mix_val && *mute_val)
return true;
/* check leaf node */
num_conns = snd_hda_get_conn_list(codec, mix_nid, &list);
if (num_conns < idx)
return false;
nid = list[idx];
if (!*mix_val && nid_has_volume(codec, nid, HDA_OUTPUT) &&
!is_ctl_associated(codec, nid, HDA_OUTPUT, 0, NID_PATH_VOL_CTL))
*mix_val = HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT);
if (!*mute_val && nid_has_mute(codec, nid, HDA_OUTPUT) &&
!is_ctl_associated(codec, nid, HDA_OUTPUT, 0, NID_PATH_MUTE_CTL))
*mute_val = HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT);
return *mix_val || *mute_val;
}
/* create input playback/capture controls for the given pin */
static int new_analog_input(struct hda_codec *codec, int input_idx,
hda_nid_t pin, const char *ctlname, int ctlidx,
hda_nid_t mix_nid)
{
struct hda_gen_spec *spec = codec->spec;
struct nid_path *path;
unsigned int mix_val, mute_val;
int err, idx;
if (!look_for_mix_leaf_ctls(codec, mix_nid, pin, &mix_val, &mute_val))
return 0;
path = snd_hda_add_new_path(codec, pin, mix_nid, 0);
if (!path)
return -EINVAL;
print_nid_path(codec, "loopback", path);
spec->loopback_paths[input_idx] = snd_hda_get_path_idx(codec, path);
idx = path->idx[path->depth - 1];
if (mix_val) {
err = __add_pb_vol_ctrl(spec, HDA_CTL_WIDGET_VOL, ctlname, ctlidx, mix_val);
if (err < 0)
return err;
path->ctls[NID_PATH_VOL_CTL] = mix_val;
}
if (mute_val) {
err = __add_pb_sw_ctrl(spec, HDA_CTL_WIDGET_MUTE, ctlname, ctlidx, mute_val);
if (err < 0)
return err;
path->ctls[NID_PATH_MUTE_CTL] = mute_val;
}
path->active = true;
path->stream_enabled = true; /* no DAC/ADC involved */
err = add_loopback_list(spec, mix_nid, idx);
if (err < 0)
return err;
if (spec->mixer_nid != spec->mixer_merge_nid &&
!spec->loopback_merge_path) {
path = snd_hda_add_new_path(codec, spec->mixer_nid,
spec->mixer_merge_nid, 0);
if (path) {
print_nid_path(codec, "loopback-merge", path);
path->active = true;
path->pin_fixed = true; /* static route */
path->stream_enabled = true; /* no DAC/ADC involved */
spec->loopback_merge_path =
snd_hda_get_path_idx(codec, path);
}
}
return 0;
}
static int is_input_pin(struct hda_codec *codec, hda_nid_t nid)
{
unsigned int pincap = snd_hda_query_pin_caps(codec, nid);
return (pincap & AC_PINCAP_IN) != 0;
}
/* Parse the codec tree and retrieve ADCs */
static int fill_adc_nids(struct hda_codec *codec)
{
struct hda_gen_spec *spec = codec->spec;
hda_nid_t nid;
hda_nid_t *adc_nids = spec->adc_nids;
int max_nums = ARRAY_SIZE(spec->adc_nids);
int nums = 0;
for_each_hda_codec_node(nid, codec) {
unsigned int caps = get_wcaps(codec, nid);
int type = get_wcaps_type(caps);
if (type != AC_WID_AUD_IN || (caps & AC_WCAP_DIGITAL))
continue;
adc_nids[nums] = nid;
if (++nums >= max_nums)
break;
}
spec->num_adc_nids = nums;
/* copy the detected ADCs to all_adcs[] */
spec->num_all_adcs = nums;
memcpy(spec->all_adcs, spec->adc_nids, nums * sizeof(hda_nid_t));
return nums;
}
/* filter out invalid adc_nids that don't give all active input pins;
* if needed, check whether dynamic ADC-switching is available
*/
static int check_dyn_adc_switch(struct hda_codec *codec)
{
struct hda_gen_spec *spec = codec->spec;
struct hda_input_mux *imux = &spec->input_mux;
unsigned int ok_bits;
int i, n, nums;
nums = 0;
ok_bits = 0;
for (n = 0; n < spec->num_adc_nids; n++) {
for (i = 0; i < imux->num_items; i++) {
if (!spec->input_paths[i][n])
break;
}
if (i >= imux->num_items) {
ok_bits |= (1 << n);
nums++;
}
}
if (!ok_bits) {
/* check whether ADC-switch is possible */
for (i = 0; i < imux->num_items; i++) {
for (n = 0; n < spec->num_adc_nids; n++) {
if (spec->input_paths[i][n]) {
spec->dyn_adc_idx[i] = n;
break;
}
}
}
codec_dbg(codec, "enabling ADC switching\n");
spec->dyn_adc_switch = 1;
} else if (nums != spec->num_adc_nids) {
/* shrink the invalid adcs and input paths */
nums = 0;
for (n = 0; n < spec->num_adc_nids; n++) {
if (!(ok_bits & (1 << n)))
continue;
if (n != nums) {
spec->adc_nids[nums] = spec->adc_nids[n];
for (i = 0; i < imux->num_items; i++) {
invalidate_nid_path(codec,
spec->input_paths[i][nums]);
spec->input_paths[i][nums] =
spec->input_paths[i][n];
spec->input_paths[i][n] = 0;
}
}
nums++;
}
spec->num_adc_nids = nums;
}
if (imux->num_items == 1 ||
(imux->num_items == 2 && spec->hp_mic)) {
codec_dbg(codec, "reducing to a single ADC\n");
spec->num_adc_nids = 1; /* reduce to a single ADC */
}
/* single index for individual volumes ctls */
if (!spec->dyn_adc_switch && spec->multi_cap_vol)
spec->num_adc_nids = 1;
return 0;
}
/* parse capture source paths from the given pin and create imux items */
static int parse_capture_source(struct hda_codec *codec, hda_nid_t pin,
int cfg_idx, int num_adcs,
const char *label, int anchor)
{
struct hda_gen_spec *spec = codec->spec;
struct hda_input_mux *imux = &spec->input_mux;
int imux_idx = imux->num_items;
bool imux_added = false;
int c;
for (c = 0; c < num_adcs; c++) {
struct nid_path *path;
hda_nid_t adc = spec->adc_nids[c];
if (!is_reachable_path(codec, pin, adc))
continue;
path = snd_hda_add_new_path(codec, pin, adc, anchor);
if (!path)
continue;
print_nid_path(codec, "input", path);
spec->input_paths[imux_idx][c] =
snd_hda_get_path_idx(codec, path);
if (!imux_added) {
if (spec->hp_mic_pin == pin)
spec->hp_mic_mux_idx = imux->num_items;
spec->imux_pins[imux->num_items] = pin;
snd_hda_add_imux_item(codec, imux, label, cfg_idx, NULL);
imux_added = true;
if (spec->dyn_adc_switch)
spec->dyn_adc_idx[imux_idx] = c;
}
}
return 0;
}
/*
* create playback/capture controls for input pins
*/
/* fill the label for each input at first */
static int fill_input_pin_labels(struct hda_codec *codec)
{
struct hda_gen_spec *spec = codec->spec;
const struct auto_pin_cfg *cfg = &spec->autocfg;
int i;
for (i = 0; i < cfg->num_inputs; i++) {
hda_nid_t pin = cfg->inputs[i].pin;
const char *label;
int j, idx;
if (!is_input_pin(codec, pin))
continue;
label = hda_get_autocfg_input_label(codec, cfg, i);
idx = 0;
for (j = i - 1; j >= 0; j--) {
if (spec->input_labels[j] &&
!strcmp(spec->input_labels[j], label)) {
idx = spec->input_label_idxs[j] + 1;
break;
}
}
spec->input_labels[i] = label;
spec->input_label_idxs[i] = idx;
}
return 0;
}
#define CFG_IDX_MIX 99 /* a dummy cfg->input idx for stereo mix */
static int create_input_ctls(struct hda_codec *codec)
{
struct hda_gen_spec *spec = codec->spec;
const struct auto_pin_cfg *cfg = &spec->autocfg;
hda_nid_t mixer = spec->mixer_nid;
int num_adcs;
int i, err;
unsigned int val;
num_adcs = fill_adc_nids(codec);
if (num_adcs < 0)
return 0;
err = fill_input_pin_labels(codec);
if (err < 0)
return err;
for (i = 0; i < cfg->num_inputs; i++) {
hda_nid_t pin;
pin = cfg->inputs[i].pin;
if (!is_input_pin(codec, pin))
continue;
val = PIN_IN;
if (cfg->inputs[i].type == AUTO_PIN_MIC)
val |= snd_hda_get_default_vref(codec, pin);
if (pin != spec->hp_mic_pin &&
!snd_hda_codec_get_pin_target(codec, pin))
set_pin_target(codec, pin, val, false);
if (mixer) {
if (is_reachable_path(codec, pin, mixer)) {
err = new_analog_input(codec, i, pin,
spec->input_labels[i],
spec->input_label_idxs[i],
mixer);
if (err < 0)
return err;
}
}
err = parse_capture_source(codec, pin, i, num_adcs,
spec->input_labels[i], -mixer);
if (err < 0)
return err;
if (spec->add_jack_modes) {
err = create_in_jack_mode(codec, pin);
if (err < 0)
return err;
}
}
/* add stereo mix when explicitly enabled via hint */
if (mixer && spec->add_stereo_mix_input == HDA_HINT_STEREO_MIX_ENABLE) {
err = parse_capture_source(codec, mixer, CFG_IDX_MIX, num_adcs,
"Stereo Mix", 0);
if (err < 0)
return err;
else
spec->suppress_auto_mic = 1;
}
return 0;
}
/*
* input source mux
*/
/* get the input path specified by the given adc and imux indices */
static struct nid_path *get_input_path(struct hda_codec *codec, int adc_idx, int imux_idx)
{
struct hda_gen_spec *spec = codec->spec;
if (imux_idx < 0 || imux_idx >= HDA_MAX_NUM_INPUTS) {
snd_BUG();
return NULL;
}
if (spec->dyn_adc_switch)
adc_idx = spec->dyn_adc_idx[imux_idx];
if (adc_idx < 0 || adc_idx >= AUTO_CFG_MAX_INS) {
snd_BUG();
return NULL;
}
return snd_hda_get_path_from_idx(codec, spec->input_paths[imux_idx][adc_idx]);
}
static int mux_select(struct hda_codec *codec, unsigned int adc_idx,
unsigned int idx);
static int mux_enum_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
struct hda_gen_spec *spec = codec->spec;
return snd_hda_input_mux_info(&spec->input_mux, uinfo);
}
static int mux_enum_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
struct hda_gen_spec *spec = codec->spec;
/* the ctls are created at once with multiple counts */
unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
return 0;
}
static int mux_enum_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
return mux_select(codec, adc_idx,
ucontrol->value.enumerated.item[0]);
}
static const struct snd_kcontrol_new cap_src_temp = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Input Source",
.info = mux_enum_info,
.get = mux_enum_get,
.put = mux_enum_put,
};
/*
* capture volume and capture switch ctls
*/
typedef int (*put_call_t)(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol);
/* call the given amp update function for all amps in the imux list at once */
static int cap_put_caller(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol,
put_call_t func, int type)
{
struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
struct hda_gen_spec *spec = codec->spec;
const struct hda_input_mux *imux;
struct nid_path *path;
int i, adc_idx, ret, err = 0;
imux = &spec->input_mux;
adc_idx = kcontrol->id.index;
mutex_lock(&codec->control_mutex);
for (i = 0; i < imux->num_items; i++) {
path = get_input_path(codec, adc_idx, i);
if (!path || !path->ctls[type])
continue;
kcontrol->private_value = path->ctls[type];
ret = func(kcontrol, ucontrol);
if (ret < 0) {
err = ret;
break;
}
if (ret > 0)
err = 1;
}
mutex_unlock(&codec->control_mutex);
if (err >= 0 && spec->cap_sync_hook)
spec->cap_sync_hook(codec, kcontrol, ucontrol);
return err;
}
/* capture volume ctl callbacks */
#define cap_vol_info snd_hda_mixer_amp_volume_info
#define cap_vol_get snd_hda_mixer_amp_volume_get
#define cap_vol_tlv snd_hda_mixer_amp_tlv
static int cap_vol_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
return cap_put_caller(kcontrol, ucontrol,
snd_hda_mixer_amp_volume_put,
NID_PATH_VOL_CTL);
}
static const struct snd_kcontrol_new cap_vol_temp = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Capture Volume",
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ |
SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK),
.info = cap_vol_info,
.get = cap_vol_get,
.put = cap_vol_put,
.tlv = { .c = cap_vol_tlv },
};
/* capture switch ctl callbacks */
#define cap_sw_info snd_ctl_boolean_stereo_info
#define cap_sw_get snd_hda_mixer_amp_switch_get
static int cap_sw_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
return cap_put_caller(kcontrol, ucontrol,
snd_hda_mixer_amp_switch_put,
NID_PATH_MUTE_CTL);
}
static const struct snd_kcontrol_new cap_sw_temp = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Capture Switch",
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
.info = cap_sw_info,
.get = cap_sw_get,
.put = cap_sw_put,
};
static int parse_capvol_in_path(struct hda_codec *codec, struct nid_path *path)
{
hda_nid_t nid;
int i, depth;
path->ctls[NID_PATH_VOL_CTL] = path->ctls[NID_PATH_MUTE_CTL] = 0;
for (depth = 0; depth < 3; depth++) {
if (depth >= path->depth)
return -EINVAL;
i = path->depth - depth - 1;
nid = path->path[i];
if (!path->ctls[NID_PATH_VOL_CTL]) {
if (nid_has_volume(codec, nid, HDA_OUTPUT))
path->ctls[NID_PATH_VOL_CTL] =
HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT);
else if (nid_has_volume(codec, nid, HDA_INPUT)) {
int idx = path->idx[i];
if (!depth && codec->single_adc_amp)
idx = 0;
path->ctls[NID_PATH_VOL_CTL] =
HDA_COMPOSE_AMP_VAL(nid, 3, idx, HDA_INPUT);
}
}
if (!path->ctls[NID_PATH_MUTE_CTL]) {
if (nid_has_mute(codec, nid, HDA_OUTPUT))
path->ctls[NID_PATH_MUTE_CTL] =
HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT);
else if (nid_has_mute(codec, nid, HDA_INPUT)) {
int idx = path->idx[i];
if (!depth && codec->single_adc_amp)
idx = 0;
path->ctls[NID_PATH_MUTE_CTL] =
HDA_COMPOSE_AMP_VAL(nid, 3, idx, HDA_INPUT);
}
}
}
return 0;
}
static bool is_inv_dmic_pin(struct hda_codec *codec, hda_nid_t nid)
{
struct hda_gen_spec *spec = codec->spec;
struct auto_pin_cfg *cfg = &spec->autocfg;
unsigned int val;
int i;
if (!spec->inv_dmic_split)
return false;
for (i = 0; i < cfg->num_inputs; i++) {
if (cfg->inputs[i].pin != nid)
continue;
if (cfg->inputs[i].type != AUTO_PIN_MIC)
return false;
val = snd_hda_codec_get_pincfg(codec, nid);
return snd_hda_get_input_pin_attr(val) == INPUT_PIN_ATTR_INT;
}
return false;
}
/* capture switch put callback for a single control with hook call */
static int cap_single_sw_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
struct hda_gen_spec *spec = codec->spec;
int ret;
ret = snd_hda_mixer_amp_switch_put(kcontrol, ucontrol);
if (ret < 0)
return ret;
if (spec->cap_sync_hook)
spec->cap_sync_hook(codec, kcontrol, ucontrol);
return ret;
}
static int add_single_cap_ctl(struct hda_codec *codec, const char *label,
int idx, bool is_switch, unsigned int ctl,
bool inv_dmic)
{
struct hda_gen_spec *spec = codec->spec;
char tmpname[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
int type = is_switch ? HDA_CTL_WIDGET_MUTE : HDA_CTL_WIDGET_VOL;
const char *sfx = is_switch ? "Switch" : "Volume";
unsigned int chs = inv_dmic ? 1 : 3;
struct snd_kcontrol_new *knew;
if (!ctl)
return 0;
if (label)
snprintf(tmpname, sizeof(tmpname),
"%s Capture %s", label, sfx);
else
snprintf(tmpname, sizeof(tmpname),
"Capture %s", sfx);
knew = add_control(spec, type, tmpname, idx,
amp_val_replace_channels(ctl, chs));
if (!knew)
return -ENOMEM;
if (is_switch) {
knew->put = cap_single_sw_put;
if (spec->mic_mute_led)
knew->access |= SNDRV_CTL_ELEM_ACCESS_MIC_LED;
}
if (!inv_dmic)
return 0;
/* Make independent right kcontrol */
if (label)
snprintf(tmpname, sizeof(tmpname),
"Inverted %s Capture %s", label, sfx);
else
snprintf(tmpname, sizeof(tmpname),
"Inverted Capture %s", sfx);
knew = add_control(spec, type, tmpname, idx,
amp_val_replace_channels(ctl, 2));
if (!knew)
return -ENOMEM;
if (is_switch) {
knew->put = cap_single_sw_put;
if (spec->mic_mute_led)
knew->access |= SNDRV_CTL_ELEM_ACCESS_MIC_LED;
}
return 0;
}
/* create single (and simple) capture volume and switch controls */
static int create_single_cap_vol_ctl(struct hda_codec *codec, int idx,
unsigned int vol_ctl, unsigned int sw_ctl,
bool inv_dmic)
{
int err;
err = add_single_cap_ctl(codec, NULL, idx, false, vol_ctl, inv_dmic);
if (err < 0)
return err;
err = add_single_cap_ctl(codec, NULL, idx, true, sw_ctl, inv_dmic);
if (err < 0)
return err;
return 0;
}
/* create bound capture volume and switch controls */
static int create_bind_cap_vol_ctl(struct hda_codec *codec, int idx,
unsigned int vol_ctl, unsigned int sw_ctl)
{
struct hda_gen_spec *spec = codec->spec;
struct snd_kcontrol_new *knew;
if (vol_ctl) {
knew = snd_hda_gen_add_kctl(spec, NULL, &cap_vol_temp);
if (!knew)
return -ENOMEM;
knew->index = idx;
knew->private_value = vol_ctl;
knew->subdevice = HDA_SUBDEV_AMP_FLAG;
}
if (sw_ctl) {
knew = snd_hda_gen_add_kctl(spec, NULL, &cap_sw_temp);
if (!knew)
return -ENOMEM;
knew->index = idx;
knew->private_value = sw_ctl;
knew->subdevice = HDA_SUBDEV_AMP_FLAG;
if (spec->mic_mute_led)
knew->access |= SNDRV_CTL_ELEM_ACCESS_MIC_LED;
}
return 0;
}
/* return the vol ctl when used first in the imux list */
static unsigned int get_first_cap_ctl(struct hda_codec *codec, int idx, int type)
{
struct nid_path *path;
unsigned int ctl;
int i;
path = get_input_path(codec, 0, idx);
if (!path)
return 0;
ctl = path->ctls[type];
if (!ctl)
return 0;
for (i = 0; i < idx - 1; i++) {
path = get_input_path(codec, 0, i);
if (path && path->ctls[type] == ctl)
return 0;
}
return ctl;
}
/* create individual capture volume and switch controls per input */
static int create_multi_cap_vol_ctl(struct hda_codec *codec)
{
struct hda_gen_spec *spec = codec->spec;
struct hda_input_mux *imux = &spec->input_mux;
int i, err, type;
for (i = 0; i < imux->num_items; i++) {
bool inv_dmic;
int idx;
idx = imux->items[i].index;
if (idx >= spec->autocfg.num_inputs)
continue;
inv_dmic = is_inv_dmic_pin(codec, spec->imux_pins[i]);
for (type = 0; type < 2; type++) {
err = add_single_cap_ctl(codec,
spec->input_labels[idx],
spec->input_label_idxs[idx],
type,
get_first_cap_ctl(codec, i, type),
inv_dmic);
if (err < 0)
return err;
}
}
return 0;
}
static int create_capture_mixers(struct hda_codec *codec)
{
struct hda_gen_spec *spec = codec->spec;
struct hda_input_mux *imux = &spec->input_mux;
int i, n, nums, err;
if (spec->dyn_adc_switch)
nums = 1;
else
nums = spec->num_adc_nids;
if (!spec->auto_mic && imux->num_items > 1) {
struct snd_kcontrol_new *knew;
const char *name;
name = nums > 1 ? "Input Source" : "Capture Source";
knew = snd_hda_gen_add_kctl(spec, name, &cap_src_temp);
if (!knew)
return -ENOMEM;
knew->count = nums;
}
for (n = 0; n < nums; n++) {
bool multi = false;
bool multi_cap_vol = spec->multi_cap_vol;
bool inv_dmic = false;
int vol, sw;
vol = sw = 0;
for (i = 0; i < imux->num_items; i++) {
struct nid_path *path;
path = get_input_path(codec, n, i);
if (!path)
continue;
parse_capvol_in_path(codec, path);
if (!vol)
vol = path->ctls[NID_PATH_VOL_CTL];
else if (vol != path->ctls[NID_PATH_VOL_CTL]) {
multi = true;
if (!same_amp_caps(codec, vol,
path->ctls[NID_PATH_VOL_CTL], HDA_INPUT))
multi_cap_vol = true;
}
if (!sw)
sw = path->ctls[NID_PATH_MUTE_CTL];
else if (sw != path->ctls[NID_PATH_MUTE_CTL]) {
multi = true;
if (!same_amp_caps(codec, sw,
path->ctls[NID_PATH_MUTE_CTL], HDA_INPUT))
multi_cap_vol = true;
}
if (is_inv_dmic_pin(codec, spec->imux_pins[i]))
inv_dmic = true;
}
if (!multi)
err = create_single_cap_vol_ctl(codec, n, vol, sw,
inv_dmic);
else if (!multi_cap_vol && !inv_dmic)
err = create_bind_cap_vol_ctl(codec, n, vol, sw);
else
err = create_multi_cap_vol_ctl(codec);
if (err < 0)
return err;
}
return 0;
}
/*
* add mic boosts if needed
*/
/* check whether the given amp is feasible as a boost volume */
static bool check_boost_vol(struct hda_codec *codec, hda_nid_t nid,
int dir, int idx)
{
unsigned int step;
if (!nid_has_volume(codec, nid, dir) ||
is_ctl_associated(codec, nid, dir, idx, NID_PATH_VOL_CTL) ||
is_ctl_associated(codec, nid, dir, idx, NID_PATH_BOOST_CTL))
return false;
step = (query_amp_caps(codec, nid, dir) & AC_AMPCAP_STEP_SIZE)
>> AC_AMPCAP_STEP_SIZE_SHIFT;
if (step < 0x20)
return false;
return true;
}
/* look for a boost amp in a widget close to the pin */
static unsigned int look_for_boost_amp(struct hda_codec *codec,
struct nid_path *path)
{
unsigned int val = 0;
hda_nid_t nid;
int depth;
for (depth = 0; depth < 3; depth++) {
if (depth >= path->depth - 1)
break;
nid = path->path[depth];
if (depth && check_boost_vol(codec, nid, HDA_OUTPUT, 0)) {
val = HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT);
break;
} else if (check_boost_vol(codec, nid, HDA_INPUT,
path->idx[depth])) {
val = HDA_COMPOSE_AMP_VAL(nid, 3, path->idx[depth],
HDA_INPUT);
break;
}
}
return val;
}
static int parse_mic_boost(struct hda_codec *codec)
{
struct hda_gen_spec *spec = codec->spec;
struct auto_pin_cfg *cfg = &spec->autocfg;
struct hda_input_mux *imux = &spec->input_mux;
int i;
if (!spec->num_adc_nids)
return 0;
for (i = 0; i < imux->num_items; i++) {
struct nid_path *path;
unsigned int val;
int idx;
char boost_label[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
idx = imux->items[i].index;
if (idx >= imux->num_items)
continue;
/* check only line-in and mic pins */
if (cfg->inputs[idx].type > AUTO_PIN_LINE_IN)
continue;
path = get_input_path(codec, 0, i);
if (!path)
continue;
val = look_for_boost_amp(codec, path);
if (!val)
continue;
/* create a boost control */
snprintf(boost_label, sizeof(boost_label),
"%s Boost Volume", spec->input_labels[idx]);
if (!add_control(spec, HDA_CTL_WIDGET_VOL, boost_label,
spec->input_label_idxs[idx], val))
return -ENOMEM;
path->ctls[NID_PATH_BOOST_CTL] = val;
}
return 0;
}
#ifdef CONFIG_SND_HDA_GENERIC_LEDS
/*
* vmaster mute LED hook helpers
*/
static int create_mute_led_cdev(struct hda_codec *codec,
int (*callback)(struct led_classdev *,
enum led_brightness),
bool micmute)
{
struct hda_gen_spec *spec = codec->spec;
struct led_classdev *cdev;
int idx = micmute ? LED_AUDIO_MICMUTE : LED_AUDIO_MUTE;
int err;
cdev = devm_kzalloc(&codec->core.dev, sizeof(*cdev), GFP_KERNEL);
if (!cdev)
return -ENOMEM;
cdev->name = micmute ? "hda::micmute" : "hda::mute";
cdev->max_brightness = 1;
cdev->default_trigger = micmute ? "audio-micmute" : "audio-mute";
cdev->brightness_set_blocking = callback;
cdev->brightness = ledtrig_audio_get(idx);
cdev->flags = LED_CORE_SUSPENDRESUME;
err = led_classdev_register(&codec->core.dev, cdev);
if (err < 0)
return err;
spec->led_cdevs[idx] = cdev;
return 0;
}
/**
* snd_hda_gen_add_mute_led_cdev - Create a LED classdev and enable as vmaster mute LED
* @codec: the HDA codec
* @callback: the callback for LED classdev brightness_set_blocking
*/
int snd_hda_gen_add_mute_led_cdev(struct hda_codec *codec,
int (*callback)(struct led_classdev *,
enum led_brightness))
{
struct hda_gen_spec *spec = codec->spec;
int err;
if (callback) {
err = create_mute_led_cdev(codec, callback, false);
if (err) {
codec_warn(codec, "failed to create a mute LED cdev\n");
return err;
}
}
if (spec->vmaster_mute.hook)
codec_err(codec, "vmaster hook already present before cdev!\n");
spec->vmaster_mute_led = 1;
return 0;
}
EXPORT_SYMBOL_GPL(snd_hda_gen_add_mute_led_cdev);
/**
* snd_hda_gen_add_micmute_led_cdev - Create a LED classdev and enable as mic-mute LED
* @codec: the HDA codec
* @callback: the callback for LED classdev brightness_set_blocking
*
* Called from the codec drivers for offering the mic mute LED controls.
* This creates a LED classdev and sets up the cap_sync_hook that is called at
* each time when the capture mixer switch changes.
*
* When NULL is passed to @callback, no classdev is created but only the
* LED-trigger is set up.
*
* Returns 0 or a negative error.
*/
int snd_hda_gen_add_micmute_led_cdev(struct hda_codec *codec,
int (*callback)(struct led_classdev *,
enum led_brightness))
{
struct hda_gen_spec *spec = codec->spec;
int err;
if (callback) {
err = create_mute_led_cdev(codec, callback, true);
if (err) {
codec_warn(codec, "failed to create a mic-mute LED cdev\n");
return err;
}
}
spec->mic_mute_led = 1;
return 0;
}
EXPORT_SYMBOL_GPL(snd_hda_gen_add_micmute_led_cdev);
#endif /* CONFIG_SND_HDA_GENERIC_LEDS */
/*
* parse digital I/Os and set up NIDs in BIOS auto-parse mode
*/
static void parse_digital(struct hda_codec *codec)
{
struct hda_gen_spec *spec = codec->spec;
struct nid_path *path;
int i, nums;
hda_nid_t dig_nid, pin;
/* support multiple SPDIFs; the secondary is set up as a follower */
nums = 0;
for (i = 0; i < spec->autocfg.dig_outs; i++) {
pin = spec->autocfg.dig_out_pins[i];
dig_nid = look_for_dac(codec, pin, true);
if (!dig_nid)
continue;
path = snd_hda_add_new_path(codec, dig_nid, pin, 0);
if (!path)
continue;
print_nid_path(codec, "digout", path);
path->active = true;
path->pin_fixed = true; /* no jack detection */
spec->digout_paths[i] = snd_hda_get_path_idx(codec, path);
set_pin_target(codec, pin, PIN_OUT, false);
if (!nums) {
spec->multiout.dig_out_nid = dig_nid;
spec->dig_out_type = spec->autocfg.dig_out_type[0];
} else {
spec->multiout.follower_dig_outs = spec->follower_dig_outs;
if (nums >= ARRAY_SIZE(spec->follower_dig_outs) - 1)
break;
spec->follower_dig_outs[nums - 1] = dig_nid;
}
nums++;
}
if (spec->autocfg.dig_in_pin) {
pin = spec->autocfg.dig_in_pin;
for_each_hda_codec_node(dig_nid, codec) {
unsigned int wcaps = get_wcaps(codec, dig_nid);
if (get_wcaps_type(wcaps) != AC_WID_AUD_IN)
continue;
if (!(wcaps & AC_WCAP_DIGITAL))
continue;
path = snd_hda_add_new_path(codec, pin, dig_nid, 0);
if (path) {
print_nid_path(codec, "digin", path);
path->active = true;
path->pin_fixed = true; /* no jack */
spec->dig_in_nid = dig_nid;
spec->digin_path = snd_hda_get_path_idx(codec, path);
set_pin_target(codec, pin, PIN_IN, false);
break;
}
}
}
}
/*
* input MUX handling
*/
static bool dyn_adc_pcm_resetup(struct hda_codec *codec, int cur);
/* select the given imux item; either unmute exclusively or select the route */
static int mux_select(struct hda_codec *codec, unsigned int adc_idx,
unsigned int idx)
{
struct hda_gen_spec *spec = codec->spec;
const struct hda_input_mux *imux;
struct nid_path *old_path, *path;
imux = &spec->input_mux;
if (!imux->num_items)
return 0;
if (idx >= imux->num_items)
idx = imux->num_items - 1;
if (spec->cur_mux[adc_idx] == idx)
return 0;
old_path = get_input_path(codec, adc_idx, spec->cur_mux[adc_idx]);
if (!old_path)
return 0;
if (old_path->active)
snd_hda_activate_path(codec, old_path, false, false);
spec->cur_mux[adc_idx] = idx;
if (spec->hp_mic)
update_hp_mic(codec, adc_idx, false);
if (spec->dyn_adc_switch)
dyn_adc_pcm_resetup(codec, idx);
path = get_input_path(codec, adc_idx, idx);
if (!path)
return 0;
if (path->active)
return 0;
snd_hda_activate_path(codec, path, true, false);
if (spec->cap_sync_hook)
spec->cap_sync_hook(codec, NULL, NULL);
path_power_down_sync(codec, old_path);
return 1;
}
/* power up/down widgets in the all paths that match with the given NID
* as terminals (either start- or endpoint)
*
* returns the last changed NID, or zero if unchanged.
*/
static hda_nid_t set_path_power(struct hda_codec *codec, hda_nid_t nid,
int pin_state, int stream_state)
{
struct hda_gen_spec *spec = codec->spec;
hda_nid_t last, changed = 0;
struct nid_path *path;
int n;
snd_array_for_each(&spec->paths, n, path) {
if (!path->depth)
continue;
if (path->path[0] == nid ||
path->path[path->depth - 1] == nid) {
bool pin_old = path->pin_enabled;
bool stream_old = path->stream_enabled;
if (pin_state >= 0)
path->pin_enabled = pin_state;
if (stream_state >= 0)
path->stream_enabled = stream_state;
if ((!path->pin_fixed && path->pin_enabled != pin_old)
|| path->stream_enabled != stream_old) {
last = path_power_update(codec, path, true);
if (last)
changed = last;
}
}
}
return changed;
}
/* check the jack status for power control */
static bool detect_pin_state(struct hda_codec *codec, hda_nid_t pin)
{
if (!is_jack_detectable(codec, pin))
return true;
return snd_hda_jack_detect_state(codec, pin) != HDA_JACK_NOT_PRESENT;
}
/* power up/down the paths of the given pin according to the jack state;
* power = 0/1 : only power up/down if it matches with the jack state,
* < 0 : force power up/down to follow the jack sate
*
* returns the last changed NID, or zero if unchanged.
*/
static hda_nid_t set_pin_power_jack(struct hda_codec *codec, hda_nid_t pin,
int power)
{
bool on;
if (!codec->power_save_node)
return 0;
on = detect_pin_state(codec, pin);
if (power >= 0 && on != power)
return 0;
return set_path_power(codec, pin, on, -1);
}
static void pin_power_callback(struct hda_codec *codec,
struct hda_jack_callback *jack,
bool on)
{
if (jack && jack->nid)
sync_power_state_change(codec,
set_pin_power_jack(codec, jack->nid, on));
}
/* callback only doing power up -- called at first */
static void pin_power_up_callback(struct hda_codec *codec,
struct hda_jack_callback *jack)
{
pin_power_callback(codec, jack, true);
}
/* callback only doing power down -- called at last */
static void pin_power_down_callback(struct hda_codec *codec,
struct hda_jack_callback *jack)
{
pin_power_callback(codec, jack, false);
}
/* set up the power up/down callbacks */
static void add_pin_power_ctls(struct hda_codec *codec, int num_pins,
const hda_nid_t *pins, bool on)
{
int i;
hda_jack_callback_fn cb =
on ? pin_power_up_callback : pin_power_down_callback;
for (i = 0; i < num_pins && pins[i]; i++) {
if (is_jack_detectable(codec, pins[i]))
snd_hda_jack_detect_enable_callback(codec, pins[i], cb);
else
set_path_power(codec, pins[i], true, -1);
}
}
/* enabled power callback to each available I/O pin with jack detections;
* the digital I/O pins are excluded because of the unreliable detectsion
*/
static void add_all_pin_power_ctls(struct hda_codec *codec, bool on)
{
struct hda_gen_spec *spec = codec->spec;
struct auto_pin_cfg *cfg = &spec->autocfg;
int i;
if (!codec->power_save_node)
return;
add_pin_power_ctls(codec, cfg->line_outs, cfg->line_out_pins, on);
if (cfg->line_out_type != AUTO_PIN_HP_OUT)
add_pin_power_ctls(codec, cfg->hp_outs, cfg->hp_pins, on);
if (cfg->line_out_type != AUTO_PIN_SPEAKER_OUT)
add_pin_power_ctls(codec, cfg->speaker_outs, cfg->speaker_pins, on);
for (i = 0; i < cfg->num_inputs; i++)
add_pin_power_ctls(codec, 1, &cfg->inputs[i].pin, on);
}
/* sync path power up/down with the jack states of given pins */
static void sync_pin_power_ctls(struct hda_codec *codec, int num_pins,
const hda_nid_t *pins)
{
int i;
for (i = 0; i < num_pins && pins[i]; i++)
if (is_jack_detectable(codec, pins[i]))
set_pin_power_jack(codec, pins[i], -1);
}
/* sync path power up/down with pins; called at init and resume */
static void sync_all_pin_power_ctls(struct hda_codec *codec)
{
struct hda_gen_spec *spec = codec->spec;
struct auto_pin_cfg *cfg = &spec->autocfg;
int i;
if (!codec->power_save_node)
return;
sync_pin_power_ctls(codec, cfg->line_outs, cfg->line_out_pins);
if (cfg->line_out_type != AUTO_PIN_HP_OUT)
sync_pin_power_ctls(codec, cfg->hp_outs, cfg->hp_pins);
if (cfg->line_out_type != AUTO_PIN_SPEAKER_OUT)
sync_pin_power_ctls(codec, cfg->speaker_outs, cfg->speaker_pins);
for (i = 0; i < cfg->num_inputs; i++)
sync_pin_power_ctls(codec, 1, &cfg->inputs[i].pin);
}
/* add fake paths if not present yet */
static int add_fake_paths(struct hda_codec *codec, hda_nid_t nid,
int num_pins, const hda_nid_t *pins)
{
struct hda_gen_spec *spec = codec->spec;
struct nid_path *path;
int i;
for (i = 0; i < num_pins; i++) {
if (!pins[i])
break;
if (get_nid_path(codec, nid, pins[i], 0))
continue;
path = snd_array_new(&spec->paths);
if (!path)
return -ENOMEM;
memset(path, 0, sizeof(*path));
path->depth = 2;
path->path[0] = nid;
path->path[1] = pins[i];
path->active = true;
}
return 0;
}
/* create fake paths to all outputs from beep */
static int add_fake_beep_paths(struct hda_codec *codec)
{
struct hda_gen_spec *spec = codec->spec;
struct auto_pin_cfg *cfg = &spec->autocfg;
hda_nid_t nid = spec->beep_nid;
int err;
if (!codec->power_save_node || !nid)
return 0;
err = add_fake_paths(codec, nid, cfg->line_outs, cfg->line_out_pins);
if (err < 0)
return err;
if (cfg->line_out_type != AUTO_PIN_HP_OUT) {
err = add_fake_paths(codec, nid, cfg->hp_outs, cfg->hp_pins);
if (err < 0)
return err;
}
if (cfg->line_out_type != AUTO_PIN_SPEAKER_OUT) {
err = add_fake_paths(codec, nid, cfg->speaker_outs,
cfg->speaker_pins);
if (err < 0)
return err;
}
return 0;
}
/* power up/down beep widget and its output paths */
static void beep_power_hook(struct hda_beep *beep, bool on)
{
set_path_power(beep->codec, beep->nid, -1, on);
}
/**
* snd_hda_gen_fix_pin_power - Fix the power of the given pin widget to D0
* @codec: the HDA codec
* @pin: NID of pin to fix
*/
int snd_hda_gen_fix_pin_power(struct hda_codec *codec, hda_nid_t pin)
{
struct hda_gen_spec *spec = codec->spec;
struct nid_path *path;
path = snd_array_new(&spec->paths);
if (!path)
return -ENOMEM;
memset(path, 0, sizeof(*path));
path->depth = 1;
path->path[0] = pin;
path->active = true;
path->pin_fixed = true;
path->stream_enabled = true;
return 0;
}
EXPORT_SYMBOL_GPL(snd_hda_gen_fix_pin_power);
/*
* Jack detections for HP auto-mute and mic-switch
*/
/* check each pin in the given array; returns true if any of them is plugged */
static bool detect_jacks(struct hda_codec *codec, int num_pins, const hda_nid_t *pins)
{
int i;
bool present = false;
for (i = 0; i < num_pins; i++) {
hda_nid_t nid = pins[i];
if (!nid)
break;
/* don't detect pins retasked as inputs */
if (snd_hda_codec_get_pin_target(codec, nid) & AC_PINCTL_IN_EN)
continue;
if (snd_hda_jack_detect_state(codec, nid) == HDA_JACK_PRESENT)
present = true;
}
return present;
}
/* standard HP/line-out auto-mute helper */
static void do_automute(struct hda_codec *codec, int num_pins, const hda_nid_t *pins,
int *paths, bool mute)
{
struct hda_gen_spec *spec = codec->spec;
int i;
for (i = 0; i < num_pins; i++) {
hda_nid_t nid = pins[i];
unsigned int val, oldval;
if (!nid)
break;
oldval = snd_hda_codec_get_pin_target(codec, nid);
if (oldval & PIN_IN)
continue; /* no mute for inputs */
if (spec->auto_mute_via_amp) {
struct nid_path *path;
hda_nid_t mute_nid;
path = snd_hda_get_path_from_idx(codec, paths[i]);
if (!path)
continue;
mute_nid = get_amp_nid_(path->ctls[NID_PATH_MUTE_CTL]);
if (!mute_nid)
continue;
if (mute)
spec->mute_bits |= (1ULL << mute_nid);
else
spec->mute_bits &= ~(1ULL << mute_nid);
continue;
} else {
/* don't reset VREF value in case it's controlling
* the amp (see alc861_fixup_asus_amp_vref_0f())
*/
if (spec->keep_vref_in_automute)
val = oldval & ~PIN_HP;
else
val = 0;
if (!mute)
val |= oldval;
/* here we call update_pin_ctl() so that the pinctl is
* changed without changing the pinctl target value;
* the original target value will be still referred at
* the init / resume again
*/
update_pin_ctl(codec, nid, val);
}
set_pin_eapd(codec, nid, !mute);
if (codec->power_save_node) {
bool on = !mute;
if (on)
on = detect_pin_state(codec, nid);
set_path_power(codec, nid, on, -1);
}
}
}
/**
* snd_hda_gen_update_outputs - Toggle outputs muting
* @codec: the HDA codec
*
* Update the mute status of all outputs based on the current jack states.
*/
void snd_hda_gen_update_outputs(struct hda_codec *codec)
{
struct hda_gen_spec *spec = codec->spec;
int *paths;
int on;
/* Control HP pins/amps depending on master_mute state;
* in general, HP pins/amps control should be enabled in all cases,
* but currently set only for master_mute, just to be safe
*/
if (spec->autocfg.line_out_type == AUTO_PIN_HP_OUT)
paths = spec->out_paths;
else
paths = spec->hp_paths;
do_automute(codec, ARRAY_SIZE(spec->autocfg.hp_pins),
spec->autocfg.hp_pins, paths, spec->master_mute);
if (!spec->automute_speaker)
on = 0;
else
on = spec->hp_jack_present | spec->line_jack_present;
on |= spec->master_mute;
spec->speaker_muted = on;
if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT)
paths = spec->out_paths;
else
paths = spec->speaker_paths;
do_automute(codec, ARRAY_SIZE(spec->autocfg.speaker_pins),
spec->autocfg.speaker_pins, paths, on);
/* toggle line-out mutes if needed, too */
/* if LO is a copy of either HP or Speaker, don't need to handle it */
if (spec->autocfg.line_out_pins[0] == spec->autocfg.hp_pins[0] ||
spec->autocfg.line_out_pins[0] == spec->autocfg.speaker_pins[0])
return;
if (!spec->automute_lo)
on = 0;
else
on = spec->hp_jack_present;
on |= spec->master_mute;
spec->line_out_muted = on;
paths = spec->out_paths;
do_automute(codec, ARRAY_SIZE(spec->autocfg.line_out_pins),
spec->autocfg.line_out_pins, paths, on);
}
EXPORT_SYMBOL_GPL(snd_hda_gen_update_outputs);
static void call_update_outputs(struct hda_codec *codec)
{
struct hda_gen_spec *spec = codec->spec;
if (spec->automute_hook)
spec->automute_hook(codec);
else
snd_hda_gen_update_outputs(codec);
/* sync the whole vmaster followers to reflect the new auto-mute status */
if (spec->auto_mute_via_amp && !codec->bus->shutdown)
snd_ctl_sync_vmaster(spec->vmaster_mute.sw_kctl, false);
}
/**
* snd_hda_gen_hp_automute - standard HP-automute helper
* @codec: the HDA codec
* @jack: jack object, NULL for the whole
*/
void snd_hda_gen_hp_automute(struct hda_codec *codec,
struct hda_jack_callback *jack)
{
struct hda_gen_spec *spec = codec->spec;
hda_nid_t *pins = spec->autocfg.hp_pins;
int num_pins = ARRAY_SIZE(spec->autocfg.hp_pins);
/* No detection for the first HP jack during indep-HP mode */
if (spec->indep_hp_enabled) {
pins++;
num_pins--;
}
spec->hp_jack_present = detect_jacks(codec, num_pins, pins);
if (!spec->detect_hp || (!spec->automute_speaker && !spec->automute_lo))
return;
call_update_outputs(codec);
}
EXPORT_SYMBOL_GPL(snd_hda_gen_hp_automute);
/**
* snd_hda_gen_line_automute - standard line-out-automute helper
* @codec: the HDA codec
* @jack: jack object, NULL for the whole
*/
void snd_hda_gen_line_automute(struct hda_codec *codec,
struct hda_jack_callback *jack)
{
struct hda_gen_spec *spec = codec->spec;
if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT)
return;
/* check LO jack only when it's different from HP */
if (spec->autocfg.line_out_pins[0] == spec->autocfg.hp_pins[0])
return;
spec->line_jack_present =
detect_jacks(codec, ARRAY_SIZE(spec->autocfg.line_out_pins),
spec->autocfg.line_out_pins);
if (!spec->automute_speaker || !spec->detect_lo)
return;
call_update_outputs(codec);
}
EXPORT_SYMBOL_GPL(snd_hda_gen_line_automute);
/**
* snd_hda_gen_mic_autoswitch - standard mic auto-switch helper
* @codec: the HDA codec
* @jack: jack object, NULL for the whole
*/
void snd_hda_gen_mic_autoswitch(struct hda_codec *codec,
struct hda_jack_callback *jack)
{
struct hda_gen_spec *spec = codec->spec;
int i;
if (!spec->auto_mic)
return;
for (i = spec->am_num_entries - 1; i > 0; i--) {
hda_nid_t pin = spec->am_entry[i].pin;
/* don't detect pins retasked as outputs */
if (snd_hda_codec_get_pin_target(codec, pin) & AC_PINCTL_OUT_EN)
continue;
if (snd_hda_jack_detect_state(codec, pin) == HDA_JACK_PRESENT) {
mux_select(codec, 0, spec->am_entry[i].idx);
return;
}
}
mux_select(codec, 0, spec->am_entry[0].idx);
}
EXPORT_SYMBOL_GPL(snd_hda_gen_mic_autoswitch);
/* call appropriate hooks */
static void call_hp_automute(struct hda_codec *codec,
struct hda_jack_callback *jack)
{
struct hda_gen_spec *spec = codec->spec;
if (spec->hp_automute_hook)
spec->hp_automute_hook(codec, jack);
else
snd_hda_gen_hp_automute(codec, jack);
}
static void call_line_automute(struct hda_codec *codec,
struct hda_jack_callback *jack)
{
struct hda_gen_spec *spec = codec->spec;
if (spec->line_automute_hook)
spec->line_automute_hook(codec, jack);
else
snd_hda_gen_line_automute(codec, jack);
}
static void call_mic_autoswitch(struct hda_codec *codec,
struct hda_jack_callback *jack)
{
struct hda_gen_spec *spec = codec->spec;
if (spec->mic_autoswitch_hook)
spec->mic_autoswitch_hook(codec, jack);
else
snd_hda_gen_mic_autoswitch(codec, jack);
}
/* update jack retasking */
static void update_automute_all(struct hda_codec *codec)
{
call_hp_automute(codec, NULL);
call_line_automute(codec, NULL);
call_mic_autoswitch(codec, NULL);
}
/*
* Auto-Mute mode mixer enum support
*/
static int automute_mode_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
struct hda_gen_spec *spec = codec->spec;
static const char * const texts3[] = {
"Disabled", "Speaker Only", "Line Out+Speaker"
};
if (spec->automute_speaker_possible && spec->automute_lo_possible)
return snd_hda_enum_helper_info(kcontrol, uinfo, 3, texts3);
return snd_hda_enum_bool_helper_info(kcontrol, uinfo);
}
static int automute_mode_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
struct hda_gen_spec *spec = codec->spec;
unsigned int val = 0;
if (spec->automute_speaker)
val++;
if (spec->automute_lo)
val++;
ucontrol->value.enumerated.item[0] = val;
return 0;
}
static int automute_mode_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
struct hda_gen_spec *spec = codec->spec;
switch (ucontrol->value.enumerated.item[0]) {
case 0:
if (!spec->automute_speaker && !spec->automute_lo)
return 0;
spec->automute_speaker = 0;
spec->automute_lo = 0;
break;
case 1:
if (spec->automute_speaker_possible) {
if (!spec->automute_lo && spec->automute_speaker)
return 0;
spec->automute_speaker = 1;
spec->automute_lo = 0;
} else if (spec->automute_lo_possible) {
if (spec->automute_lo)
return 0;
spec->automute_lo = 1;
} else
return -EINVAL;
break;
case 2:
if (!spec->automute_lo_possible || !spec->automute_speaker_possible)
return -EINVAL;
if (spec->automute_speaker && spec->automute_lo)
return 0;
spec->automute_speaker = 1;
spec->automute_lo = 1;
break;
default:
return -EINVAL;
}
call_update_outputs(codec);
return 1;
}
static const struct snd_kcontrol_new automute_mode_enum = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Auto-Mute Mode",
.info = automute_mode_info,
.get = automute_mode_get,
.put = automute_mode_put,
};
static int add_automute_mode_enum(struct hda_codec *codec)
{
struct hda_gen_spec *spec = codec->spec;
if (!snd_hda_gen_add_kctl(spec, NULL, &automute_mode_enum))
return -ENOMEM;
return 0;
}
/*
* Check the availability of HP/line-out auto-mute;
* Set up appropriately if really supported
*/
static int check_auto_mute_availability(struct hda_codec *codec)
{
struct hda_gen_spec *spec = codec->spec;
struct auto_pin_cfg *cfg = &spec->autocfg;
int present = 0;
int i, err;
if (spec->suppress_auto_mute)
return 0;
if (cfg->hp_pins[0])
present++;
if (cfg->line_out_pins[0])
present++;
if (cfg->speaker_pins[0])
present++;
if (present < 2) /* need two different output types */
return 0;
if (!cfg->speaker_pins[0] &&
cfg->line_out_type == AUTO_PIN_SPEAKER_OUT) {
memcpy(cfg->speaker_pins, cfg->line_out_pins,
sizeof(cfg->speaker_pins));
cfg->speaker_outs = cfg->line_outs;
}
if (!cfg->hp_pins[0] &&
cfg->line_out_type == AUTO_PIN_HP_OUT) {
memcpy(cfg->hp_pins, cfg->line_out_pins,
sizeof(cfg->hp_pins));
cfg->hp_outs = cfg->line_outs;
}
for (i = 0; i < cfg->hp_outs; i++) {
hda_nid_t nid = cfg->hp_pins[i];
if (!is_jack_detectable(codec, nid))
continue;
codec_dbg(codec, "Enable HP auto-muting on NID 0x%x\n", nid);
snd_hda_jack_detect_enable_callback(codec, nid,
call_hp_automute);
spec->detect_hp = 1;
}
if (cfg->line_out_type == AUTO_PIN_LINE_OUT && cfg->line_outs) {
if (cfg->speaker_outs)
for (i = 0; i < cfg->line_outs; i++) {
hda_nid_t nid = cfg->line_out_pins[i];
if (!is_jack_detectable(codec, nid))
continue;
codec_dbg(codec, "Enable Line-Out auto-muting on NID 0x%x\n", nid);
snd_hda_jack_detect_enable_callback(codec, nid,
call_line_automute);
spec->detect_lo = 1;
}
spec->automute_lo_possible = spec->detect_hp;
}
spec->automute_speaker_possible = cfg->speaker_outs &&
(spec->detect_hp || spec->detect_lo);
spec->automute_lo = spec->automute_lo_possible;
spec->automute_speaker = spec->automute_speaker_possible;
if (spec->automute_speaker_possible || spec->automute_lo_possible) {
/* create a control for automute mode */
err = add_automute_mode_enum(codec);
if (err < 0)
return err;
}
return 0;
}
/* check whether all auto-mic pins are valid; setup indices if OK */
static bool auto_mic_check_imux(struct hda_codec *codec)
{
struct hda_gen_spec *spec = codec->spec;
const struct hda_input_mux *imux;
int i;
imux = &spec->input_mux;
for (i = 0; i < spec->am_num_entries; i++) {
spec->am_entry[i].idx =
find_idx_in_nid_list(spec->am_entry[i].pin,
spec->imux_pins, imux->num_items);
if (spec->am_entry[i].idx < 0)
return false; /* no corresponding imux */
}
/* we don't need the jack detection for the first pin */
for (i = 1; i < spec->am_num_entries; i++)
snd_hda_jack_detect_enable_callback(codec,
spec->am_entry[i].pin,
call_mic_autoswitch);
return true;
}
static int compare_attr(const void *ap, const void *bp)
{
const struct automic_entry *a = ap;
const struct automic_entry *b = bp;
return (int)(a->attr - b->attr);
}
/*
* Check the availability of auto-mic switch;
* Set up if really supported
*/
static int check_auto_mic_availability(struct hda_codec *codec)
{
struct hda_gen_spec *spec = codec->spec;
struct auto_pin_cfg *cfg = &spec->autocfg;
unsigned int types;
int i, num_pins;
if (spec->suppress_auto_mic)
return 0;
types = 0;
num_pins = 0;
for (i = 0; i < cfg->num_inputs; i++) {
hda_nid_t nid = cfg->inputs[i].pin;
unsigned int attr;
attr = snd_hda_codec_get_pincfg(codec, nid);
attr = snd_hda_get_input_pin_attr(attr);
if (types & (1 << attr))
return 0; /* already occupied */
switch (attr) {
case INPUT_PIN_ATTR_INT:
if (cfg->inputs[i].type != AUTO_PIN_MIC)
return 0; /* invalid type */
break;
case INPUT_PIN_ATTR_UNUSED:
return 0; /* invalid entry */
default:
if (cfg->inputs[i].type > AUTO_PIN_LINE_IN)
return 0; /* invalid type */
if (!spec->line_in_auto_switch &&
cfg->inputs[i].type != AUTO_PIN_MIC)
return 0; /* only mic is allowed */
if (!is_jack_detectable(codec, nid))
return 0; /* no unsol support */
break;
}
if (num_pins >= MAX_AUTO_MIC_PINS)
return 0;
types |= (1 << attr);
spec->am_entry[num_pins].pin = nid;
spec->am_entry[num_pins].attr = attr;
num_pins++;
}
if (num_pins < 2)
return 0;
spec->am_num_entries = num_pins;
/* sort the am_entry in the order of attr so that the pin with a
* higher attr will be selected when the jack is plugged.
*/
sort(spec->am_entry, num_pins, sizeof(spec->am_entry[0]),
compare_attr, NULL);
if (!auto_mic_check_imux(codec))
return 0;
spec->auto_mic = 1;
spec->num_adc_nids = 1;
spec->cur_mux[0] = spec->am_entry[0].idx;
codec_dbg(codec, "Enable auto-mic switch on NID 0x%x/0x%x/0x%x\n",
spec->am_entry[0].pin,
spec->am_entry[1].pin,
spec->am_entry[2].pin);
return 0;
}
/**
* snd_hda_gen_path_power_filter - power_filter hook to make inactive widgets
* into power down
* @codec: the HDA codec
* @nid: NID to evalute
* @power_state: target power state
*/
unsigned int snd_hda_gen_path_power_filter(struct hda_codec *codec,
hda_nid_t nid,
unsigned int power_state)
{
struct hda_gen_spec *spec = codec->spec;
if (!spec->power_down_unused && !codec->power_save_node)
return power_state;
if (power_state != AC_PWRST_D0 || nid == codec->core.afg)
return power_state;
if (get_wcaps_type(get_wcaps(codec, nid)) >= AC_WID_POWER)
return power_state;
if (is_active_nid_for_any(codec, nid))
return power_state;
return AC_PWRST_D3;
}
EXPORT_SYMBOL_GPL(snd_hda_gen_path_power_filter);
/* mute all aamix inputs initially; parse up to the first leaves */
static void mute_all_mixer_nid(struct hda_codec *codec, hda_nid_t mix)
{
int i, nums;
const hda_nid_t *conn;
bool has_amp;
nums = snd_hda_get_conn_list(codec, mix, &conn);
has_amp = nid_has_mute(codec, mix, HDA_INPUT);
for (i = 0; i < nums; i++) {
if (has_amp)
update_amp(codec, mix, HDA_INPUT, i,
0xff, HDA_AMP_MUTE);
else if (nid_has_volume(codec, conn[i], HDA_OUTPUT))
update_amp(codec, conn[i], HDA_OUTPUT, 0,
0xff, HDA_AMP_MUTE);
}
}
/**
* snd_hda_gen_stream_pm - Stream power management callback
* @codec: the HDA codec
* @nid: audio widget
* @on: power on/off flag
*
* Set this in patch_ops.stream_pm. Only valid with power_save_node flag.
*/
void snd_hda_gen_stream_pm(struct hda_codec *codec, hda_nid_t nid, bool on)
{
if (codec->power_save_node)
set_path_power(codec, nid, -1, on);
}
EXPORT_SYMBOL_GPL(snd_hda_gen_stream_pm);
/**
* snd_hda_gen_parse_auto_config - Parse the given BIOS configuration and
* set up the hda_gen_spec
* @codec: the HDA codec
* @cfg: Parsed pin configuration
*
* return 1 if successful, 0 if the proper config is not found,
* or a negative error code
*/
int snd_hda_gen_parse_auto_config(struct hda_codec *codec,
struct auto_pin_cfg *cfg)
{
struct hda_gen_spec *spec = codec->spec;
int err;
parse_user_hints(codec);
if (spec->vmaster_mute_led || spec->mic_mute_led)
snd_ctl_led_request();
if (spec->mixer_nid && !spec->mixer_merge_nid)
spec->mixer_merge_nid = spec->mixer_nid;
if (cfg != &spec->autocfg) {
spec->autocfg = *cfg;
cfg = &spec->autocfg;
}
if (!spec->main_out_badness)
spec->main_out_badness = &hda_main_out_badness;
if (!spec->extra_out_badness)
spec->extra_out_badness = &hda_extra_out_badness;
fill_all_dac_nids(codec);
if (!cfg->line_outs) {
if (cfg->dig_outs || cfg->dig_in_pin) {
spec->multiout.max_channels = 2;
spec->no_analog = 1;
goto dig_only;
}
if (!cfg->num_inputs && !cfg->dig_in_pin)
return 0; /* can't find valid BIOS pin config */
}
if (!spec->no_primary_hp &&
cfg->line_out_type == AUTO_PIN_SPEAKER_OUT &&
cfg->line_outs <= cfg->hp_outs) {
/* use HP as primary out */
cfg->speaker_outs = cfg->line_outs;
memcpy(cfg->speaker_pins, cfg->line_out_pins,
sizeof(cfg->speaker_pins));
cfg->line_outs = cfg->hp_outs;
memcpy(cfg->line_out_pins, cfg->hp_pins, sizeof(cfg->hp_pins));
cfg->hp_outs = 0;
memset(cfg->hp_pins, 0, sizeof(cfg->hp_pins));
cfg->line_out_type = AUTO_PIN_HP_OUT;
}
err = parse_output_paths(codec);
if (err < 0)
return err;
err = create_multi_channel_mode(codec);
if (err < 0)
return err;
err = create_multi_out_ctls(codec, cfg);
if (err < 0)
return err;
err = create_hp_out_ctls(codec);
if (err < 0)
return err;
err = create_speaker_out_ctls(codec);
if (err < 0)
return err;
err = create_indep_hp_ctls(codec);
if (err < 0)
return err;
err = create_loopback_mixing_ctl(codec);
if (err < 0)
return err;
err = create_hp_mic(codec);
if (err < 0)
return err;
err = create_input_ctls(codec);
if (err < 0)
return err;
/* add power-down pin callbacks at first */
add_all_pin_power_ctls(codec, false);
spec->const_channel_count = spec->ext_channel_count;
/* check the multiple speaker and headphone pins */
if (cfg->line_out_type != AUTO_PIN_SPEAKER_OUT)
spec->const_channel_count = max(spec->const_channel_count,
cfg->speaker_outs * 2);
if (cfg->line_out_type != AUTO_PIN_HP_OUT)
spec->const_channel_count = max(spec->const_channel_count,
cfg->hp_outs * 2);
spec->multiout.max_channels = max(spec->ext_channel_count,
spec->const_channel_count);
err = check_auto_mute_availability(codec);
if (err < 0)
return err;
err = check_dyn_adc_switch(codec);
if (err < 0)
return err;
err = check_auto_mic_availability(codec);
if (err < 0)
return err;
/* add stereo mix if available and not enabled yet */
if (!spec->auto_mic && spec->mixer_nid &&
spec->add_stereo_mix_input == HDA_HINT_STEREO_MIX_AUTO &&
spec->input_mux.num_items > 1) {
err = parse_capture_source(codec, spec->mixer_nid,
CFG_IDX_MIX, spec->num_all_adcs,
"Stereo Mix", 0);
if (err < 0)
return err;
}
err = create_capture_mixers(codec);
if (err < 0)
return err;
err = parse_mic_boost(codec);
if (err < 0)
return err;
/* create "Headphone Mic Jack Mode" if no input selection is
* available (or user specifies add_jack_modes hint)
*/
if (spec->hp_mic_pin &&
(spec->auto_mic || spec->input_mux.num_items == 1 ||
spec->add_jack_modes)) {
err = create_hp_mic_jack_mode(codec, spec->hp_mic_pin);
if (err < 0)
return err;
}
if (spec->add_jack_modes) {
if (cfg->line_out_type != AUTO_PIN_SPEAKER_OUT) {
err = create_out_jack_modes(codec, cfg->line_outs,
cfg->line_out_pins);
if (err < 0)
return err;
}
if (cfg->line_out_type != AUTO_PIN_HP_OUT) {
err = create_out_jack_modes(codec, cfg->hp_outs,
cfg->hp_pins);
if (err < 0)
return err;
}
}
/* add power-up pin callbacks at last */
add_all_pin_power_ctls(codec, true);
/* mute all aamix input initially */
if (spec->mixer_nid)
mute_all_mixer_nid(codec, spec->mixer_nid);
dig_only:
parse_digital(codec);
if (spec->power_down_unused || codec->power_save_node) {
if (!codec->power_filter)
codec->power_filter = snd_hda_gen_path_power_filter;
if (!codec->patch_ops.stream_pm)
codec->patch_ops.stream_pm = snd_hda_gen_stream_pm;
}
if (!spec->no_analog && spec->beep_nid) {
err = snd_hda_attach_beep_device(codec, spec->beep_nid);
if (err < 0)
return err;
if (codec->beep && codec->power_save_node) {
err = add_fake_beep_paths(codec);
if (err < 0)
return err;
codec->beep->power_hook = beep_power_hook;
}
}
return 1;
}
EXPORT_SYMBOL_GPL(snd_hda_gen_parse_auto_config);
/*
* Build control elements
*/
/* follower controls for virtual master */
static const char * const follower_pfxs[] = {
"Front", "Surround", "Center", "LFE", "Side",
"Headphone", "Speaker", "Mono", "Line Out",
"CLFE", "Bass Speaker", "PCM",
"Speaker Front", "Speaker Surround", "Speaker CLFE", "Speaker Side",
"Headphone Front", "Headphone Surround", "Headphone CLFE",
"Headphone Side", "Headphone+LO", "Speaker+LO",
NULL,
};
/**
* snd_hda_gen_build_controls - Build controls from the parsed results
* @codec: the HDA codec
*
* Pass this to build_controls patch_ops.
*/
int snd_hda_gen_build_controls(struct hda_codec *codec)
{
struct hda_gen_spec *spec = codec->spec;
int err;
if (spec->kctls.used) {
err = snd_hda_add_new_ctls(codec, spec->kctls.list);
if (err < 0)
return err;
}
if (spec->multiout.dig_out_nid) {
err = snd_hda_create_dig_out_ctls(codec,
spec->multiout.dig_out_nid,
spec->multiout.dig_out_nid,
spec->pcm_rec[1]->pcm_type);
if (err < 0)
return err;
if (!spec->no_analog) {
err = snd_hda_create_spdif_share_sw(codec,
&spec->multiout);
if (err < 0)
return err;
spec->multiout.share_spdif = 1;
}
}
if (spec->dig_in_nid) {
err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
if (err < 0)
return err;
}
/* if we have no master control, let's create it */
if (!spec->no_analog && !spec->suppress_vmaster &&
!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
err = snd_hda_add_vmaster(codec, "Master Playback Volume",
spec->vmaster_tlv, follower_pfxs,
"Playback Volume", 0);
if (err < 0)
return err;
}
if (!spec->no_analog && !spec->suppress_vmaster &&
!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
err = __snd_hda_add_vmaster(codec, "Master Playback Switch",
NULL, follower_pfxs,
"Playback Switch", true,
spec->vmaster_mute_led ?
SNDRV_CTL_ELEM_ACCESS_SPK_LED : 0,
&spec->vmaster_mute.sw_kctl);
if (err < 0)
return err;
if (spec->vmaster_mute.hook) {
snd_hda_add_vmaster_hook(codec, &spec->vmaster_mute);
snd_hda_sync_vmaster_hook(&spec->vmaster_mute);
}
}
free_kctls(spec); /* no longer needed */
err = snd_hda_jack_add_kctls(codec, &spec->autocfg);
if (err < 0)
return err;
return 0;
}
EXPORT_SYMBOL_GPL(snd_hda_gen_build_controls);
/*
* PCM definitions
*/
static void call_pcm_playback_hook(struct hda_pcm_stream *hinfo,
struct hda_codec *codec,
struct snd_pcm_substream *substream,
int action)
{
struct hda_gen_spec *spec = codec->spec;
if (spec->pcm_playback_hook)
spec->pcm_playback_hook(hinfo, codec, substream, action);
}
static void call_pcm_capture_hook(struct hda_pcm_stream *hinfo,
struct hda_codec *codec,
struct snd_pcm_substream *substream,
int action)
{
struct hda_gen_spec *spec = codec->spec;
if (spec->pcm_capture_hook)
spec->pcm_capture_hook(hinfo, codec, substream, action);
}
/*
* Analog playback callbacks
*/
static int playback_pcm_open(struct hda_pcm_stream *hinfo,
struct hda_codec *codec,
struct snd_pcm_substream *substream)
{
struct hda_gen_spec *spec = codec->spec;
int err;
mutex_lock(&spec->pcm_mutex);
err = snd_hda_multi_out_analog_open(codec,
&spec->multiout, substream,
hinfo);
if (!err) {
spec->active_streams |= 1 << STREAM_MULTI_OUT;
call_pcm_playback_hook(hinfo, codec, substream,
HDA_GEN_PCM_ACT_OPEN);
}
mutex_unlock(&spec->pcm_mutex);
return err;
}
static int playback_pcm_prepare(struct hda_pcm_stream *hinfo,
struct hda_codec *codec,
unsigned int stream_tag,
unsigned int format,
struct snd_pcm_substream *substream)
{
struct hda_gen_spec *spec = codec->spec;
int err;
err = snd_hda_multi_out_analog_prepare(codec, &spec->multiout,
stream_tag, format, substream);
if (!err)
call_pcm_playback_hook(hinfo, codec, substream,
HDA_GEN_PCM_ACT_PREPARE);
return err;
}
static int playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
struct hda_codec *codec,
struct snd_pcm_substream *substream)
{
struct hda_gen_spec *spec = codec->spec;
int err;
err = snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
if (!err)
call_pcm_playback_hook(hinfo, codec, substream,
HDA_GEN_PCM_ACT_CLEANUP);
return err;
}
static int playback_pcm_close(struct hda_pcm_stream *hinfo,
struct hda_codec *codec,
struct snd_pcm_substream *substream)
{
struct hda_gen_spec *spec = codec->spec;
mutex_lock(&spec->pcm_mutex);
spec->active_streams &= ~(1 << STREAM_MULTI_OUT);
call_pcm_playback_hook(hinfo, codec, substream,
HDA_GEN_PCM_ACT_CLOSE);
mutex_unlock(&spec->pcm_mutex);
return 0;
}
static int capture_pcm_open(struct hda_pcm_stream *hinfo,
struct hda_codec *codec,
struct snd_pcm_substream *substream)
{
call_pcm_capture_hook(hinfo, codec, substream, HDA_GEN_PCM_ACT_OPEN);
return 0;
}
static int capture_pcm_prepare(struct hda_pcm_stream *hinfo,
struct hda_codec *codec,
unsigned int stream_tag,
unsigned int format,
struct snd_pcm_substream *substream)
{
snd_hda_codec_setup_stream(codec, hinfo->nid, stream_tag, 0, format);
call_pcm_capture_hook(hinfo, codec, substream,
HDA_GEN_PCM_ACT_PREPARE);
return 0;
}
static int capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
struct hda_codec *codec,
struct snd_pcm_substream *substream)
{
snd_hda_codec_cleanup_stream(codec, hinfo->nid);
call_pcm_capture_hook(hinfo, codec, substream,
HDA_GEN_PCM_ACT_CLEANUP);
return 0;
}
static int capture_pcm_close(struct hda_pcm_stream *hinfo,
struct hda_codec *codec,
struct snd_pcm_substream *substream)
{
call_pcm_capture_hook(hinfo, codec, substream, HDA_GEN_PCM_ACT_CLOSE);
return 0;
}
static int alt_playback_pcm_open(struct hda_pcm_stream *hinfo,
struct hda_codec *codec,
struct snd_pcm_substream *substream)
{
struct hda_gen_spec *spec = codec->spec;
int err = 0;
mutex_lock(&spec->pcm_mutex);
if (spec->indep_hp && !spec->indep_hp_enabled)
err = -EBUSY;
else
spec->active_streams |= 1 << STREAM_INDEP_HP;
call_pcm_playback_hook(hinfo, codec, substream,
HDA_GEN_PCM_ACT_OPEN);
mutex_unlock(&spec->pcm_mutex);
return err;
}
static int alt_playback_pcm_close(struct hda_pcm_stream *hinfo,
struct hda_codec *codec,
struct snd_pcm_substream *substream)
{
struct hda_gen_spec *spec = codec->spec;
mutex_lock(&spec->pcm_mutex);
spec->active_streams &= ~(1 << STREAM_INDEP_HP);
call_pcm_playback_hook(hinfo, codec, substream,
HDA_GEN_PCM_ACT_CLOSE);
mutex_unlock(&spec->pcm_mutex);
return 0;
}
static int alt_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
struct hda_codec *codec,
unsigned int stream_tag,
unsigned int format,
struct snd_pcm_substream *substream)
{
snd_hda_codec_setup_stream(codec, hinfo->nid, stream_tag, 0, format);
call_pcm_playback_hook(hinfo, codec, substream,
HDA_GEN_PCM_ACT_PREPARE);
return 0;
}
static int alt_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
struct hda_codec *codec,
struct snd_pcm_substream *substream)
{
snd_hda_codec_cleanup_stream(codec, hinfo->nid);
call_pcm_playback_hook(hinfo, codec, substream,
HDA_GEN_PCM_ACT_CLEANUP);
return 0;
}
/*
* Digital out
*/
static int dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
struct hda_codec *codec,
struct snd_pcm_substream *substream)
{
struct hda_gen_spec *spec = codec->spec;
return snd_hda_multi_out_dig_open(codec, &spec->multiout);
}
static int dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
struct hda_codec *codec,
unsigned int stream_tag,
unsigned int format,
struct snd_pcm_substream *substream)
{
struct hda_gen_spec *spec = codec->spec;
return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
stream_tag, format, substream);
}
static int dig_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
struct hda_codec *codec,
struct snd_pcm_substream *substream)
{
struct hda_gen_spec *spec = codec->spec;
return snd_hda_multi_out_dig_cleanup(codec, &spec->multiout);
}
static int dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
struct hda_codec *codec,
struct snd_pcm_substream *substream)
{
struct hda_gen_spec *spec = codec->spec;
return snd_hda_multi_out_dig_close(codec, &spec->multiout);
}
/*
* Analog capture
*/
#define alt_capture_pcm_open capture_pcm_open
#define alt_capture_pcm_close capture_pcm_close
static int alt_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
struct hda_codec *codec,
unsigned int stream_tag,
unsigned int format,
struct snd_pcm_substream *substream)
{
struct hda_gen_spec *spec = codec->spec;
snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number + 1],
stream_tag, 0, format);
call_pcm_capture_hook(hinfo, codec, substream,
HDA_GEN_PCM_ACT_PREPARE);
return 0;
}
static int alt_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
struct hda_codec *codec,
struct snd_pcm_substream *substream)
{
struct hda_gen_spec *spec = codec->spec;
snd_hda_codec_cleanup_stream(codec,
spec->adc_nids[substream->number + 1]);
call_pcm_capture_hook(hinfo, codec, substream,
HDA_GEN_PCM_ACT_CLEANUP);
return 0;
}
/*
*/
static const struct hda_pcm_stream pcm_analog_playback = {
.substreams = 1,
.channels_min = 2,
.channels_max = 8,
/* NID is set in build_pcms */
.ops = {
.open = playback_pcm_open,
.close = playback_pcm_close,
.prepare = playback_pcm_prepare,
.cleanup = playback_pcm_cleanup
},
};
static const struct hda_pcm_stream pcm_analog_capture = {
.substreams = 1,
.channels_min = 2,
.channels_max = 2,
/* NID is set in build_pcms */
.ops = {
.open = capture_pcm_open,
.close = capture_pcm_close,
.prepare = capture_pcm_prepare,
.cleanup = capture_pcm_cleanup
},
};
static const struct hda_pcm_stream pcm_analog_alt_playback = {
.substreams = 1,
.channels_min = 2,
.channels_max = 2,
/* NID is set in build_pcms */
.ops = {
.open = alt_playback_pcm_open,
.close = alt_playback_pcm_close,
.prepare = alt_playback_pcm_prepare,
.cleanup = alt_playback_pcm_cleanup
},
};
static const struct hda_pcm_stream pcm_analog_alt_capture = {
.substreams = 2, /* can be overridden */
.channels_min = 2,
.channels_max = 2,
/* NID is set in build_pcms */
.ops = {
.open = alt_capture_pcm_open,
.close = alt_capture_pcm_close,
.prepare = alt_capture_pcm_prepare,
.cleanup = alt_capture_pcm_cleanup
},
};
static const struct hda_pcm_stream pcm_digital_playback = {
.substreams = 1,
.channels_min = 2,
.channels_max = 2,
/* NID is set in build_pcms */
.ops = {
.open = dig_playback_pcm_open,
.close = dig_playback_pcm_close,
.prepare = dig_playback_pcm_prepare,
.cleanup = dig_playback_pcm_cleanup
},
};
static const struct hda_pcm_stream pcm_digital_capture = {
.substreams = 1,
.channels_min = 2,
.channels_max = 2,
/* NID is set in build_pcms */
};
/* Used by build_pcms to flag that a PCM has no playback stream */
static const struct hda_pcm_stream pcm_null_stream = {
.substreams = 0,
.channels_min = 0,
.channels_max = 0,
};
/*
* dynamic changing ADC PCM streams
*/
static bool dyn_adc_pcm_resetup(struct hda_codec *codec, int cur)
{
struct hda_gen_spec *spec = codec->spec;
hda_nid_t new_adc = spec->adc_nids[spec->dyn_adc_idx[cur]];
if (spec->cur_adc && spec->cur_adc != new_adc) {
/* stream is running, let's swap the current ADC */
__snd_hda_codec_cleanup_stream(codec, spec->cur_adc, 1);
spec->cur_adc = new_adc;
snd_hda_codec_setup_stream(codec, new_adc,
spec->cur_adc_stream_tag, 0,
spec->cur_adc_format);
return true;
}
return false;
}
/* analog capture with dynamic dual-adc changes */
static int dyn_adc_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
struct hda_codec *codec,
unsigned int stream_tag,
unsigned int format,
struct snd_pcm_substream *substream)
{
struct hda_gen_spec *spec = codec->spec;
spec->cur_adc = spec->adc_nids[spec->dyn_adc_idx[spec->cur_mux[0]]];
spec->cur_adc_stream_tag = stream_tag;
spec->cur_adc_format = format;
snd_hda_codec_setup_stream(codec, spec->cur_adc, stream_tag, 0, format);
call_pcm_capture_hook(hinfo, codec, substream, HDA_GEN_PCM_ACT_PREPARE);
return 0;
}
static int dyn_adc_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
struct hda_codec *codec,
struct snd_pcm_substream *substream)
{
struct hda_gen_spec *spec = codec->spec;
snd_hda_codec_cleanup_stream(codec, spec->cur_adc);
spec->cur_adc = 0;
call_pcm_capture_hook(hinfo, codec, substream, HDA_GEN_PCM_ACT_CLEANUP);
return 0;
}
static const struct hda_pcm_stream dyn_adc_pcm_analog_capture = {
.substreams = 1,
.channels_min = 2,
.channels_max = 2,
.nid = 0, /* fill later */
.ops = {
.prepare = dyn_adc_capture_pcm_prepare,
.cleanup = dyn_adc_capture_pcm_cleanup
},
};
static void fill_pcm_stream_name(char *str, size_t len, const char *sfx,
const char *chip_name)
{
char *p;
if (*str)
return;
strscpy(str, chip_name, len);
/* drop non-alnum chars after a space */
for (p = strchr(str, ' '); p; p = strchr(p + 1, ' ')) {
if (!isalnum(p[1])) {
*p = 0;
break;
}
}
strlcat(str, sfx, len);
}
/* copy PCM stream info from @default_str, and override non-NULL entries
* from @spec_str and @nid
*/
static void setup_pcm_stream(struct hda_pcm_stream *str,
const struct hda_pcm_stream *default_str,
const struct hda_pcm_stream *spec_str,
hda_nid_t nid)
{
*str = *default_str;
if (nid)
str->nid = nid;
if (spec_str) {
if (spec_str->substreams)
str->substreams = spec_str->substreams;
if (spec_str->channels_min)
str->channels_min = spec_str->channels_min;
if (spec_str->channels_max)
str->channels_max = spec_str->channels_max;
if (spec_str->rates)
str->rates = spec_str->rates;
if (spec_str->formats)
str->formats = spec_str->formats;
if (spec_str->maxbps)
str->maxbps = spec_str->maxbps;
}
}
/**
* snd_hda_gen_build_pcms - build PCM streams based on the parsed results
* @codec: the HDA codec
*
* Pass this to build_pcms patch_ops.
*/
int snd_hda_gen_build_pcms(struct hda_codec *codec)
{
struct hda_gen_spec *spec = codec->spec;
struct hda_pcm *info;
bool have_multi_adcs;
if (spec->no_analog)
goto skip_analog;
fill_pcm_stream_name(spec->stream_name_analog,
sizeof(spec->stream_name_analog),
" Analog", codec->core.chip_name);
info = snd_hda_codec_pcm_new(codec, "%s", spec->stream_name_analog);
if (!info)
return -ENOMEM;
spec->pcm_rec[0] = info;
if (spec->multiout.num_dacs > 0) {
setup_pcm_stream(&info->stream[SNDRV_PCM_STREAM_PLAYBACK],
&pcm_analog_playback,
spec->stream_analog_playback,
spec->multiout.dac_nids[0]);
info->stream[SNDRV_PCM_STREAM_PLAYBACK].channels_max =
spec->multiout.max_channels;
if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
spec->autocfg.line_outs == 2)
info->stream[SNDRV_PCM_STREAM_PLAYBACK].chmap =
snd_pcm_2_1_chmaps;
}
if (spec->num_adc_nids) {
setup_pcm_stream(&info->stream[SNDRV_PCM_STREAM_CAPTURE],
(spec->dyn_adc_switch ?
&dyn_adc_pcm_analog_capture : &pcm_analog_capture),
spec->stream_analog_capture,
spec->adc_nids[0]);
}
skip_analog:
/* SPDIF for stream index #1 */
if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
fill_pcm_stream_name(spec->stream_name_digital,
sizeof(spec->stream_name_digital),
" Digital", codec->core.chip_name);
info = snd_hda_codec_pcm_new(codec, "%s",
spec->stream_name_digital);
if (!info)
return -ENOMEM;
codec->follower_dig_outs = spec->multiout.follower_dig_outs;
spec->pcm_rec[1] = info;
if (spec->dig_out_type)
info->pcm_type = spec->dig_out_type;
else
info->pcm_type = HDA_PCM_TYPE_SPDIF;
if (spec->multiout.dig_out_nid)
setup_pcm_stream(&info->stream[SNDRV_PCM_STREAM_PLAYBACK],
&pcm_digital_playback,
spec->stream_digital_playback,
spec->multiout.dig_out_nid);
if (spec->dig_in_nid)
setup_pcm_stream(&info->stream[SNDRV_PCM_STREAM_CAPTURE],
&pcm_digital_capture,
spec->stream_digital_capture,
spec->dig_in_nid);
}
if (spec->no_analog)
return 0;
/* If the use of more than one ADC is requested for the current
* model, configure a second analog capture-only PCM.
*/
have_multi_adcs = (spec->num_adc_nids > 1) &&
!spec->dyn_adc_switch && !spec->auto_mic;
/* Additional Analaog capture for index #2 */
if (spec->alt_dac_nid || have_multi_adcs) {
fill_pcm_stream_name(spec->stream_name_alt_analog,
sizeof(spec->stream_name_alt_analog),
" Alt Analog", codec->core.chip_name);
info = snd_hda_codec_pcm_new(codec, "%s",
spec->stream_name_alt_analog);
if (!info)
return -ENOMEM;
spec->pcm_rec[2] = info;
if (spec->alt_dac_nid)
setup_pcm_stream(&info->stream[SNDRV_PCM_STREAM_PLAYBACK],
&pcm_analog_alt_playback,
spec->stream_analog_alt_playback,
spec->alt_dac_nid);
else
setup_pcm_stream(&info->stream[SNDRV_PCM_STREAM_PLAYBACK],
&pcm_null_stream, NULL, 0);
if (have_multi_adcs) {
setup_pcm_stream(&info->stream[SNDRV_PCM_STREAM_CAPTURE],
&pcm_analog_alt_capture,
spec->stream_analog_alt_capture,
spec->adc_nids[1]);
info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams =
spec->num_adc_nids - 1;
} else {
setup_pcm_stream(&info->stream[SNDRV_PCM_STREAM_CAPTURE],
&pcm_null_stream, NULL, 0);
}
}
return 0;
}
EXPORT_SYMBOL_GPL(snd_hda_gen_build_pcms);
/*
* Standard auto-parser initializations
*/
/* configure the given path as a proper output */
static void set_output_and_unmute(struct hda_codec *codec, int path_idx)
{
struct nid_path *path;
hda_nid_t pin;
path = snd_hda_get_path_from_idx(codec, path_idx);
if (!path || !path->depth)
return;
pin = path->path[path->depth - 1];
restore_pin_ctl(codec, pin);
snd_hda_activate_path(codec, path, path->active,
aamix_default(codec->spec));
set_pin_eapd(codec, pin, path->active);
}
/* initialize primary output paths */
static void init_multi_out(struct hda_codec *codec)
{
struct hda_gen_spec *spec = codec->spec;
int i;
for (i = 0; i < spec->autocfg.line_outs; i++)
set_output_and_unmute(codec, spec->out_paths[i]);
}
static void __init_extra_out(struct hda_codec *codec, int num_outs, int *paths)
{
int i;
for (i = 0; i < num_outs; i++)
set_output_and_unmute(codec, paths[i]);
}
/* initialize hp and speaker paths */
static void init_extra_out(struct hda_codec *codec)
{
struct hda_gen_spec *spec = codec->spec;
if (spec->autocfg.line_out_type != AUTO_PIN_HP_OUT)
__init_extra_out(codec, spec->autocfg.hp_outs, spec->hp_paths);
if (spec->autocfg.line_out_type != AUTO_PIN_SPEAKER_OUT)
__init_extra_out(codec, spec->autocfg.speaker_outs,
spec->speaker_paths);
}
/* initialize multi-io paths */
static void init_multi_io(struct hda_codec *codec)
{
struct hda_gen_spec *spec = codec->spec;
int i;
for (i = 0; i < spec->multi_ios; i++) {
hda_nid_t pin = spec->multi_io[i].pin;
struct nid_path *path;
path = get_multiio_path(codec, i);
if (!path)
continue;
if (!spec->multi_io[i].ctl_in)
spec->multi_io[i].ctl_in =
snd_hda_codec_get_pin_target(codec, pin);
snd_hda_activate_path(codec, path, path->active,
aamix_default(spec));
}
}
static void init_aamix_paths(struct hda_codec *codec)
{
struct hda_gen_spec *spec = codec->spec;
if (!spec->have_aamix_ctl)
return;
if (!has_aamix_out_paths(spec))
return;
update_aamix_paths(codec, spec->aamix_mode, spec->out_paths[0],
spec->aamix_out_paths[0],
spec->autocfg.line_out_type);
update_aamix_paths(codec, spec->aamix_mode, spec->hp_paths[0],
spec->aamix_out_paths[1],
AUTO_PIN_HP_OUT);
update_aamix_paths(codec, spec->aamix_mode, spec->speaker_paths[0],
spec->aamix_out_paths[2],
AUTO_PIN_SPEAKER_OUT);
}
/* set up input pins and loopback paths */
static void init_analog_input(struct hda_codec *codec)
{
struct hda_gen_spec *spec = codec->spec;
struct auto_pin_cfg *cfg = &spec->autocfg;
int i;
for (i = 0; i < cfg->num_inputs; i++) {
hda_nid_t nid = cfg->inputs[i].pin;
if (is_input_pin(codec, nid))
restore_pin_ctl(codec, nid);
/* init loopback inputs */
if (spec->mixer_nid) {
resume_path_from_idx(codec, spec->loopback_paths[i]);
resume_path_from_idx(codec, spec->loopback_merge_path);
}
}
}
/* initialize ADC paths */
static void init_input_src(struct hda_codec *codec)
{
struct hda_gen_spec *spec = codec->spec;
struct hda_input_mux *imux = &spec->input_mux;
struct nid_path *path;
int i, c, nums;
if (spec->dyn_adc_switch)
nums = 1;
else
nums = spec->num_adc_nids;
for (c = 0; c < nums; c++) {
for (i = 0; i < imux->num_items; i++) {
path = get_input_path(codec, c, i);
if (path) {
bool active = path->active;
if (i == spec->cur_mux[c])
active = true;
snd_hda_activate_path(codec, path, active, false);
}
}
if (spec->hp_mic)
update_hp_mic(codec, c, true);
}
if (spec->cap_sync_hook)
spec->cap_sync_hook(codec, NULL, NULL);
}
/* set right pin controls for digital I/O */
static void init_digital(struct hda_codec *codec)
{
struct hda_gen_spec *spec = codec->spec;
int i;
hda_nid_t pin;
for (i = 0; i < spec->autocfg.dig_outs; i++)
set_output_and_unmute(codec, spec->digout_paths[i]);
pin = spec->autocfg.dig_in_pin;
if (pin) {
restore_pin_ctl(codec, pin);
resume_path_from_idx(codec, spec->digin_path);
}
}
/* clear unsol-event tags on unused pins; Conexant codecs seem to leave
* invalid unsol tags by some reason
*/
static void clear_unsol_on_unused_pins(struct hda_codec *codec)
{
const struct hda_pincfg *pin;
int i;
snd_array_for_each(&codec->init_pins, i, pin) {
hda_nid_t nid = pin->nid;
if (is_jack_detectable(codec, nid) &&
!snd_hda_jack_tbl_get(codec, nid))
snd_hda_codec_write_cache(codec, nid, 0,
AC_VERB_SET_UNSOLICITED_ENABLE, 0);
}
}
/**
* snd_hda_gen_init - initialize the generic spec
* @codec: the HDA codec
*
* This can be put as patch_ops init function.
*/
int snd_hda_gen_init(struct hda_codec *codec)
{
struct hda_gen_spec *spec = codec->spec;
if (spec->init_hook)
spec->init_hook(codec);
if (!spec->skip_verbs)
snd_hda_apply_verbs(codec);
init_multi_out(codec);
init_extra_out(codec);
init_multi_io(codec);
init_aamix_paths(codec);
init_analog_input(codec);
init_input_src(codec);
init_digital(codec);
clear_unsol_on_unused_pins(codec);
sync_all_pin_power_ctls(codec);
/* call init functions of standard auto-mute helpers */
update_automute_all(codec);
snd_hda_regmap_sync(codec);
if (spec->vmaster_mute.sw_kctl && spec->vmaster_mute.hook)
snd_hda_sync_vmaster_hook(&spec->vmaster_mute);
hda_call_check_power_status(codec, 0x01);
return 0;
}
EXPORT_SYMBOL_GPL(snd_hda_gen_init);
/**
* snd_hda_gen_free - free the generic spec
* @codec: the HDA codec
*
* This can be put as patch_ops free function.
*/
void snd_hda_gen_free(struct hda_codec *codec)
{
snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_FREE);
snd_hda_gen_spec_free(codec->spec);
kfree(codec->spec);
codec->spec = NULL;
}
EXPORT_SYMBOL_GPL(snd_hda_gen_free);
#ifdef CONFIG_PM
/**
* snd_hda_gen_check_power_status - check the loopback power save state
* @codec: the HDA codec
* @nid: NID to inspect
*
* This can be put as patch_ops check_power_status function.
*/
int snd_hda_gen_check_power_status(struct hda_codec *codec, hda_nid_t nid)
{
struct hda_gen_spec *spec = codec->spec;
return snd_hda_check_amp_list_power(codec, &spec->loopback, nid);
}
EXPORT_SYMBOL_GPL(snd_hda_gen_check_power_status);
#endif
/*
* the generic codec support
*/
static const struct hda_codec_ops generic_patch_ops = {
.build_controls = snd_hda_gen_build_controls,
.build_pcms = snd_hda_gen_build_pcms,
.init = snd_hda_gen_init,
.free = snd_hda_gen_free,
.unsol_event = snd_hda_jack_unsol_event,
#ifdef CONFIG_PM
.check_power_status = snd_hda_gen_check_power_status,
#endif
};
/*
* snd_hda_parse_generic_codec - Generic codec parser
* @codec: the HDA codec
*/
static int snd_hda_parse_generic_codec(struct hda_codec *codec)
{
struct hda_gen_spec *spec;
int err;
spec = kzalloc(sizeof(*spec), GFP_KERNEL);
if (!spec)
return -ENOMEM;
snd_hda_gen_spec_init(spec);
codec->spec = spec;
err = snd_hda_parse_pin_defcfg(codec, &spec->autocfg, NULL, 0);
if (err < 0)
goto error;
err = snd_hda_gen_parse_auto_config(codec, &spec->autocfg);
if (err < 0)
goto error;
codec->patch_ops = generic_patch_ops;
return 0;
error:
snd_hda_gen_free(codec);
return err;
}
static const struct hda_device_id snd_hda_id_generic[] = {
HDA_CODEC_ENTRY(HDA_CODEC_ID_GENERIC, "Generic", snd_hda_parse_generic_codec),
{} /* terminator */
};
MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_generic);
static struct hda_codec_driver generic_driver = {
.id = snd_hda_id_generic,
};
module_hda_codec_driver(generic_driver);
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("Generic HD-audio codec parser");
| linux-master | sound/pci/hda/hda_generic.c |
// SPDX-License-Identifier: GPL-2.0-only
//
// CS35L56 HDA audio driver I2C binding
//
// Copyright (C) 2023 Cirrus Logic, Inc. and
// Cirrus Logic International Semiconductor Ltd.
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include "cs35l56_hda.h"
static int cs35l56_hda_i2c_probe(struct i2c_client *clt)
{
struct cs35l56_hda *cs35l56;
int ret;
cs35l56 = devm_kzalloc(&clt->dev, sizeof(*cs35l56), GFP_KERNEL);
if (!cs35l56)
return -ENOMEM;
cs35l56->base.dev = &clt->dev;
cs35l56->base.regmap = devm_regmap_init_i2c(clt, &cs35l56_regmap_i2c);
if (IS_ERR(cs35l56->base.regmap)) {
ret = PTR_ERR(cs35l56->base.regmap);
dev_err(cs35l56->base.dev, "Failed to allocate register map: %d\n",
ret);
return ret;
}
ret = cs35l56_hda_common_probe(cs35l56, clt->addr);
if (ret)
return ret;
ret = cs35l56_irq_request(&cs35l56->base, clt->irq);
if (ret < 0)
cs35l56_hda_remove(cs35l56->base.dev);
return ret;
}
static void cs35l56_hda_i2c_remove(struct i2c_client *clt)
{
cs35l56_hda_remove(&clt->dev);
}
static const struct i2c_device_id cs35l56_hda_i2c_id[] = {
{ "cs35l56-hda", 0 },
{}
};
static struct i2c_driver cs35l56_hda_i2c_driver = {
.driver = {
.name = "cs35l56-hda",
.pm = &cs35l56_hda_pm_ops,
},
.id_table = cs35l56_hda_i2c_id,
.probe = cs35l56_hda_i2c_probe,
.remove = cs35l56_hda_i2c_remove,
};
module_i2c_driver(cs35l56_hda_i2c_driver);
MODULE_DESCRIPTION("HDA CS35L56 I2C driver");
MODULE_IMPORT_NS(SND_HDA_SCODEC_CS35L56);
MODULE_IMPORT_NS(SND_SOC_CS35L56_SHARED);
MODULE_AUTHOR("Richard Fitzgerald <[email protected]>");
MODULE_AUTHOR("Simon Trimmer <[email protected]>");
MODULE_LICENSE("GPL");
| linux-master | sound/pci/hda/cs35l56_hda_i2c.c |
// SPDX-License-Identifier: GPL-2.0
/* Helper functions for Thinkpad LED control;
* to be included from codec driver
*/
#if IS_ENABLED(CONFIG_THINKPAD_ACPI)
#include <linux/acpi.h>
#include <linux/leds.h>
static bool is_thinkpad(struct hda_codec *codec)
{
return (codec->core.subsystem_id >> 16 == 0x17aa) &&
(acpi_dev_found("LEN0068") || acpi_dev_found("LEN0268") ||
acpi_dev_found("IBM0068"));
}
static void hda_fixup_thinkpad_acpi(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
if (!is_thinkpad(codec))
return;
snd_hda_gen_add_mute_led_cdev(codec, NULL);
snd_hda_gen_add_micmute_led_cdev(codec, NULL);
}
}
#else /* CONFIG_THINKPAD_ACPI */
static void hda_fixup_thinkpad_acpi(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
}
#endif /* CONFIG_THINKPAD_ACPI */
| linux-master | sound/pci/hda/thinkpad_helper.c |
// SPDX-License-Identifier: GPL-2.0
//
// CS35L41 ALSA HDA Property driver
//
// Copyright 2023 Cirrus Logic, Inc.
//
// Author: Stefan Binding <[email protected]>
#include <linux/gpio/consumer.h>
#include <linux/string.h>
#include "cs35l41_hda_property.h"
/*
* Device CLSA010(0/1) doesn't have _DSD so a gpiod_get by the label reset won't work.
* And devices created by serial-multi-instantiate don't have their device struct
* pointing to the correct fwnode, so acpi_dev must be used here.
* And devm functions expect that the device requesting the resource has the correct
* fwnode.
*/
static int lenovo_legion_no_acpi(struct cs35l41_hda *cs35l41, struct device *physdev, int id,
const char *hid)
{
struct cs35l41_hw_cfg *hw_cfg = &cs35l41->hw_cfg;
/* check I2C address to assign the index */
cs35l41->index = id == 0x40 ? 0 : 1;
cs35l41->channel_index = 0;
cs35l41->reset_gpio = gpiod_get_index(physdev, NULL, 0, GPIOD_OUT_HIGH);
cs35l41->speaker_id = cs35l41_get_speaker_id(physdev, 0, 0, 2);
hw_cfg->spk_pos = cs35l41->index;
hw_cfg->gpio2.func = CS35L41_INTERRUPT;
hw_cfg->gpio2.valid = true;
hw_cfg->valid = true;
if (strcmp(hid, "CLSA0100") == 0) {
hw_cfg->bst_type = CS35L41_EXT_BOOST_NO_VSPK_SWITCH;
} else if (strcmp(hid, "CLSA0101") == 0) {
hw_cfg->bst_type = CS35L41_EXT_BOOST;
hw_cfg->gpio1.func = CS35l41_VSPK_SWITCH;
hw_cfg->gpio1.valid = true;
}
return 0;
}
/*
* Device 103C89C6 does have _DSD, however it is setup to use the wrong boost type.
* We can override the _DSD to correct the boost type here.
* Since this laptop has valid ACPI, we do not need to handle cs-gpios, since that already exists
* in the ACPI.
*/
static int hp_vision_acpi_fix(struct cs35l41_hda *cs35l41, struct device *physdev, int id,
const char *hid)
{
struct cs35l41_hw_cfg *hw_cfg = &cs35l41->hw_cfg;
dev_info(cs35l41->dev, "Adding DSD properties for %s\n", cs35l41->acpi_subsystem_id);
cs35l41->index = id;
cs35l41->channel_index = 0;
cs35l41->reset_gpio = gpiod_get_index(physdev, NULL, 1, GPIOD_OUT_HIGH);
cs35l41->speaker_id = -ENOENT;
hw_cfg->spk_pos = cs35l41->index ? 1 : 0; // right:left
hw_cfg->gpio1.func = CS35L41_NOT_USED;
hw_cfg->gpio1.valid = true;
hw_cfg->gpio2.func = CS35L41_INTERRUPT;
hw_cfg->gpio2.valid = true;
hw_cfg->bst_type = CS35L41_INT_BOOST;
hw_cfg->bst_ind = 1000;
hw_cfg->bst_ipk = 4500;
hw_cfg->bst_cap = 24;
hw_cfg->valid = true;
return 0;
}
struct cs35l41_prop_model {
const char *hid;
const char *ssid;
int (*add_prop)(struct cs35l41_hda *cs35l41, struct device *physdev, int id,
const char *hid);
};
static const struct cs35l41_prop_model cs35l41_prop_model_table[] = {
{ "CLSA0100", NULL, lenovo_legion_no_acpi },
{ "CLSA0101", NULL, lenovo_legion_no_acpi },
{ "CSC3551", "103C89C6", hp_vision_acpi_fix },
{}
};
int cs35l41_add_dsd_properties(struct cs35l41_hda *cs35l41, struct device *physdev, int id,
const char *hid)
{
const struct cs35l41_prop_model *model;
for (model = cs35l41_prop_model_table; model->hid; model++) {
if (!strcmp(model->hid, hid) &&
(!model->ssid ||
(cs35l41->acpi_subsystem_id &&
!strcmp(model->ssid, cs35l41->acpi_subsystem_id))))
return model->add_prop(cs35l41, physdev, id, hid);
}
return -ENOENT;
}
| linux-master | sound/pci/hda/cs35l41_hda_property.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* HD audio interface patch for AD1882, AD1884, AD1981HD, AD1983, AD1984,
* AD1986A, AD1988
*
* Copyright (c) 2005-2007 Takashi Iwai <[email protected]>
*/
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <sound/core.h>
#include <sound/hda_codec.h>
#include "hda_local.h"
#include "hda_auto_parser.h"
#include "hda_beep.h"
#include "hda_jack.h"
#include "hda_generic.h"
struct ad198x_spec {
struct hda_gen_spec gen;
/* for auto parser */
int smux_paths[4];
unsigned int cur_smux;
hda_nid_t eapd_nid;
unsigned int beep_amp; /* beep amp value, set via set_beep_amp() */
int num_smux_conns;
};
#ifdef CONFIG_SND_HDA_INPUT_BEEP
/* additional beep mixers; the actual parameters are overwritten at build */
static const struct snd_kcontrol_new ad_beep_mixer[] = {
HDA_CODEC_VOLUME("Beep Playback Volume", 0, 0, HDA_OUTPUT),
HDA_CODEC_MUTE_BEEP("Beep Playback Switch", 0, 0, HDA_OUTPUT),
{ } /* end */
};
#define set_beep_amp(spec, nid, idx, dir) \
((spec)->beep_amp = HDA_COMPOSE_AMP_VAL(nid, 1, idx, dir)) /* mono */
#else
#define set_beep_amp(spec, nid, idx, dir) /* NOP */
#endif
#ifdef CONFIG_SND_HDA_INPUT_BEEP
static int create_beep_ctls(struct hda_codec *codec)
{
struct ad198x_spec *spec = codec->spec;
const struct snd_kcontrol_new *knew;
if (!spec->beep_amp)
return 0;
for (knew = ad_beep_mixer ; knew->name; knew++) {
int err;
struct snd_kcontrol *kctl;
kctl = snd_ctl_new1(knew, codec);
if (!kctl)
return -ENOMEM;
kctl->private_value = spec->beep_amp;
err = snd_hda_ctl_add(codec, 0, kctl);
if (err < 0)
return err;
}
return 0;
}
#else
#define create_beep_ctls(codec) 0
#endif
#ifdef CONFIG_PM
static void ad198x_power_eapd_write(struct hda_codec *codec, hda_nid_t front,
hda_nid_t hp)
{
if (snd_hda_query_pin_caps(codec, front) & AC_PINCAP_EAPD)
snd_hda_codec_write(codec, front, 0, AC_VERB_SET_EAPD_BTLENABLE,
!codec->inv_eapd ? 0x00 : 0x02);
if (snd_hda_query_pin_caps(codec, hp) & AC_PINCAP_EAPD)
snd_hda_codec_write(codec, hp, 0, AC_VERB_SET_EAPD_BTLENABLE,
!codec->inv_eapd ? 0x00 : 0x02);
}
static void ad198x_power_eapd(struct hda_codec *codec)
{
/* We currently only handle front, HP */
switch (codec->core.vendor_id) {
case 0x11d41882:
case 0x11d4882a:
case 0x11d41884:
case 0x11d41984:
case 0x11d41883:
case 0x11d4184a:
case 0x11d4194a:
case 0x11d4194b:
case 0x11d41988:
case 0x11d4198b:
case 0x11d4989a:
case 0x11d4989b:
ad198x_power_eapd_write(codec, 0x12, 0x11);
break;
case 0x11d41981:
case 0x11d41983:
ad198x_power_eapd_write(codec, 0x05, 0x06);
break;
case 0x11d41986:
ad198x_power_eapd_write(codec, 0x1b, 0x1a);
break;
}
}
static int ad198x_suspend(struct hda_codec *codec)
{
snd_hda_shutup_pins(codec);
ad198x_power_eapd(codec);
return 0;
}
#endif
/* follow EAPD via vmaster hook */
static void ad_vmaster_eapd_hook(void *private_data, int enabled)
{
struct hda_codec *codec = private_data;
struct ad198x_spec *spec = codec->spec;
if (!spec->eapd_nid)
return;
if (codec->inv_eapd)
enabled = !enabled;
snd_hda_codec_write_cache(codec, spec->eapd_nid, 0,
AC_VERB_SET_EAPD_BTLENABLE,
enabled ? 0x02 : 0x00);
}
/*
* Automatic parse of I/O pins from the BIOS configuration
*/
static int ad198x_auto_build_controls(struct hda_codec *codec)
{
int err;
err = snd_hda_gen_build_controls(codec);
if (err < 0)
return err;
err = create_beep_ctls(codec);
if (err < 0)
return err;
return 0;
}
static const struct hda_codec_ops ad198x_auto_patch_ops = {
.build_controls = ad198x_auto_build_controls,
.build_pcms = snd_hda_gen_build_pcms,
.init = snd_hda_gen_init,
.free = snd_hda_gen_free,
.unsol_event = snd_hda_jack_unsol_event,
#ifdef CONFIG_PM
.check_power_status = snd_hda_gen_check_power_status,
.suspend = ad198x_suspend,
#endif
};
static int ad198x_parse_auto_config(struct hda_codec *codec, bool indep_hp)
{
struct ad198x_spec *spec = codec->spec;
struct auto_pin_cfg *cfg = &spec->gen.autocfg;
int err;
codec->spdif_status_reset = 1;
codec->no_trigger_sense = 1;
codec->no_sticky_stream = 1;
spec->gen.indep_hp = indep_hp;
if (!spec->gen.add_stereo_mix_input)
spec->gen.add_stereo_mix_input = HDA_HINT_STEREO_MIX_AUTO;
err = snd_hda_parse_pin_defcfg(codec, cfg, NULL, 0);
if (err < 0)
return err;
err = snd_hda_gen_parse_auto_config(codec, cfg);
if (err < 0)
return err;
return 0;
}
/*
* AD1986A specific
*/
static int alloc_ad_spec(struct hda_codec *codec)
{
struct ad198x_spec *spec;
spec = kzalloc(sizeof(*spec), GFP_KERNEL);
if (!spec)
return -ENOMEM;
codec->spec = spec;
snd_hda_gen_spec_init(&spec->gen);
codec->patch_ops = ad198x_auto_patch_ops;
return 0;
}
/*
* AD1986A fixup codes
*/
/* Lenovo N100 seems to report the reversed bit for HP jack-sensing */
static void ad_fixup_inv_jack_detect(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct ad198x_spec *spec = codec->spec;
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
codec->inv_jack_detect = 1;
spec->gen.keep_eapd_on = 1;
spec->gen.vmaster_mute.hook = ad_vmaster_eapd_hook;
spec->eapd_nid = 0x1b;
}
}
/* Toshiba Satellite L40 implements EAPD in a standard way unlike others */
static void ad1986a_fixup_eapd(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct ad198x_spec *spec = codec->spec;
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
codec->inv_eapd = 0;
spec->gen.keep_eapd_on = 1;
spec->eapd_nid = 0x1b;
}
}
/* enable stereo-mix input for avoiding regression on KDE (bko#88251) */
static void ad1986a_fixup_eapd_mix_in(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct ad198x_spec *spec = codec->spec;
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
ad1986a_fixup_eapd(codec, fix, action);
spec->gen.add_stereo_mix_input = HDA_HINT_STEREO_MIX_ENABLE;
}
}
enum {
AD1986A_FIXUP_INV_JACK_DETECT,
AD1986A_FIXUP_ULTRA,
AD1986A_FIXUP_SAMSUNG,
AD1986A_FIXUP_3STACK,
AD1986A_FIXUP_LAPTOP,
AD1986A_FIXUP_LAPTOP_IMIC,
AD1986A_FIXUP_EAPD,
AD1986A_FIXUP_EAPD_MIX_IN,
AD1986A_FIXUP_EASYNOTE,
};
static const struct hda_fixup ad1986a_fixups[] = {
[AD1986A_FIXUP_INV_JACK_DETECT] = {
.type = HDA_FIXUP_FUNC,
.v.func = ad_fixup_inv_jack_detect,
},
[AD1986A_FIXUP_ULTRA] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x1b, 0x90170110 }, /* speaker */
{ 0x1d, 0x90a7013e }, /* int mic */
{}
},
},
[AD1986A_FIXUP_SAMSUNG] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x1b, 0x90170110 }, /* speaker */
{ 0x1d, 0x90a7013e }, /* int mic */
{ 0x20, 0x411111f0 }, /* N/A */
{ 0x24, 0x411111f0 }, /* N/A */
{}
},
},
[AD1986A_FIXUP_3STACK] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x1a, 0x02214021 }, /* headphone */
{ 0x1b, 0x01014011 }, /* front */
{ 0x1c, 0x01813030 }, /* line-in */
{ 0x1d, 0x01a19020 }, /* rear mic */
{ 0x1e, 0x411111f0 }, /* N/A */
{ 0x1f, 0x02a190f0 }, /* mic */
{ 0x20, 0x411111f0 }, /* N/A */
{}
},
},
[AD1986A_FIXUP_LAPTOP] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x1a, 0x02214021 }, /* headphone */
{ 0x1b, 0x90170110 }, /* speaker */
{ 0x1c, 0x411111f0 }, /* N/A */
{ 0x1d, 0x411111f0 }, /* N/A */
{ 0x1e, 0x411111f0 }, /* N/A */
{ 0x1f, 0x02a191f0 }, /* mic */
{ 0x20, 0x411111f0 }, /* N/A */
{}
},
},
[AD1986A_FIXUP_LAPTOP_IMIC] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x1d, 0x90a7013e }, /* int mic */
{}
},
.chained_before = 1,
.chain_id = AD1986A_FIXUP_LAPTOP,
},
[AD1986A_FIXUP_EAPD] = {
.type = HDA_FIXUP_FUNC,
.v.func = ad1986a_fixup_eapd,
},
[AD1986A_FIXUP_EAPD_MIX_IN] = {
.type = HDA_FIXUP_FUNC,
.v.func = ad1986a_fixup_eapd_mix_in,
},
[AD1986A_FIXUP_EASYNOTE] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x1a, 0x0421402f }, /* headphone */
{ 0x1b, 0x90170110 }, /* speaker */
{ 0x1c, 0x411111f0 }, /* N/A */
{ 0x1d, 0x90a70130 }, /* int mic */
{ 0x1e, 0x411111f0 }, /* N/A */
{ 0x1f, 0x04a19040 }, /* mic */
{ 0x20, 0x411111f0 }, /* N/A */
{ 0x21, 0x411111f0 }, /* N/A */
{ 0x22, 0x411111f0 }, /* N/A */
{ 0x23, 0x411111f0 }, /* N/A */
{ 0x24, 0x411111f0 }, /* N/A */
{ 0x25, 0x411111f0 }, /* N/A */
{}
},
.chained = true,
.chain_id = AD1986A_FIXUP_EAPD_MIX_IN,
},
};
static const struct snd_pci_quirk ad1986a_fixup_tbl[] = {
SND_PCI_QUIRK(0x103c, 0x30af, "HP B2800", AD1986A_FIXUP_LAPTOP_IMIC),
SND_PCI_QUIRK(0x1043, 0x1153, "ASUS M9V", AD1986A_FIXUP_LAPTOP_IMIC),
SND_PCI_QUIRK(0x1043, 0x1443, "ASUS Z99He", AD1986A_FIXUP_EAPD),
SND_PCI_QUIRK(0x1043, 0x1447, "ASUS A8JN", AD1986A_FIXUP_EAPD),
SND_PCI_QUIRK_MASK(0x1043, 0xff00, 0x8100, "ASUS P5", AD1986A_FIXUP_3STACK),
SND_PCI_QUIRK_MASK(0x1043, 0xff00, 0x8200, "ASUS M2", AD1986A_FIXUP_3STACK),
SND_PCI_QUIRK(0x10de, 0xcb84, "ASUS A8N-VM", AD1986A_FIXUP_3STACK),
SND_PCI_QUIRK(0x1179, 0xff40, "Toshiba Satellite L40", AD1986A_FIXUP_EAPD),
SND_PCI_QUIRK(0x144d, 0xc01e, "FSC V2060", AD1986A_FIXUP_LAPTOP),
SND_PCI_QUIRK_MASK(0x144d, 0xff00, 0xc000, "Samsung", AD1986A_FIXUP_SAMSUNG),
SND_PCI_QUIRK(0x144d, 0xc027, "Samsung Q1", AD1986A_FIXUP_ULTRA),
SND_PCI_QUIRK(0x1631, 0xc022, "PackardBell EasyNote MX65", AD1986A_FIXUP_EASYNOTE),
SND_PCI_QUIRK(0x17aa, 0x2066, "Lenovo N100", AD1986A_FIXUP_INV_JACK_DETECT),
SND_PCI_QUIRK(0x17aa, 0x1011, "Lenovo M55", AD1986A_FIXUP_3STACK),
SND_PCI_QUIRK(0x17aa, 0x1017, "Lenovo A60", AD1986A_FIXUP_3STACK),
{}
};
static const struct hda_model_fixup ad1986a_fixup_models[] = {
{ .id = AD1986A_FIXUP_3STACK, .name = "3stack" },
{ .id = AD1986A_FIXUP_LAPTOP, .name = "laptop" },
{ .id = AD1986A_FIXUP_LAPTOP_IMIC, .name = "laptop-imic" },
{ .id = AD1986A_FIXUP_LAPTOP_IMIC, .name = "laptop-eapd" }, /* alias */
{ .id = AD1986A_FIXUP_EAPD, .name = "eapd" },
{}
};
/*
*/
static int patch_ad1986a(struct hda_codec *codec)
{
int err;
struct ad198x_spec *spec;
static const hda_nid_t preferred_pairs[] = {
0x1a, 0x03,
0x1b, 0x03,
0x1c, 0x04,
0x1d, 0x05,
0x1e, 0x03,
0
};
err = alloc_ad_spec(codec);
if (err < 0)
return err;
spec = codec->spec;
/* AD1986A has the inverted EAPD implementation */
codec->inv_eapd = 1;
spec->gen.mixer_nid = 0x07;
spec->gen.beep_nid = 0x19;
set_beep_amp(spec, 0x18, 0, HDA_OUTPUT);
/* AD1986A has a hardware problem that it can't share a stream
* with multiple output pins. The copy of front to surrounds
* causes noisy or silent outputs at a certain timing, e.g.
* changing the volume.
* So, let's disable the shared stream.
*/
spec->gen.multiout.no_share_stream = 1;
/* give fixed DAC/pin pairs */
spec->gen.preferred_dacs = preferred_pairs;
/* AD1986A can't manage the dynamic pin on/off smoothly */
spec->gen.auto_mute_via_amp = 1;
snd_hda_pick_fixup(codec, ad1986a_fixup_models, ad1986a_fixup_tbl,
ad1986a_fixups);
snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
err = ad198x_parse_auto_config(codec, false);
if (err < 0) {
snd_hda_gen_free(codec);
return err;
}
snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
return 0;
}
/*
* AD1983 specific
*/
/*
* SPDIF mux control for AD1983 auto-parser
*/
static int ad1983_auto_smux_enum_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
struct ad198x_spec *spec = codec->spec;
static const char * const texts2[] = { "PCM", "ADC" };
static const char * const texts3[] = { "PCM", "ADC1", "ADC2" };
int num_conns = spec->num_smux_conns;
if (num_conns == 2)
return snd_hda_enum_helper_info(kcontrol, uinfo, 2, texts2);
else if (num_conns == 3)
return snd_hda_enum_helper_info(kcontrol, uinfo, 3, texts3);
else
return -EINVAL;
}
static int ad1983_auto_smux_enum_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
struct ad198x_spec *spec = codec->spec;
ucontrol->value.enumerated.item[0] = spec->cur_smux;
return 0;
}
static int ad1983_auto_smux_enum_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
struct ad198x_spec *spec = codec->spec;
unsigned int val = ucontrol->value.enumerated.item[0];
hda_nid_t dig_out = spec->gen.multiout.dig_out_nid;
int num_conns = spec->num_smux_conns;
if (val >= num_conns)
return -EINVAL;
if (spec->cur_smux == val)
return 0;
spec->cur_smux = val;
snd_hda_codec_write_cache(codec, dig_out, 0,
AC_VERB_SET_CONNECT_SEL, val);
return 1;
}
static const struct snd_kcontrol_new ad1983_auto_smux_mixer = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "IEC958 Playback Source",
.info = ad1983_auto_smux_enum_info,
.get = ad1983_auto_smux_enum_get,
.put = ad1983_auto_smux_enum_put,
};
static int ad1983_add_spdif_mux_ctl(struct hda_codec *codec)
{
struct ad198x_spec *spec = codec->spec;
hda_nid_t dig_out = spec->gen.multiout.dig_out_nid;
int num_conns;
if (!dig_out)
return 0;
num_conns = snd_hda_get_num_conns(codec, dig_out);
if (num_conns != 2 && num_conns != 3)
return 0;
spec->num_smux_conns = num_conns;
if (!snd_hda_gen_add_kctl(&spec->gen, NULL, &ad1983_auto_smux_mixer))
return -ENOMEM;
return 0;
}
static int patch_ad1983(struct hda_codec *codec)
{
static const hda_nid_t conn_0c[] = { 0x08 };
static const hda_nid_t conn_0d[] = { 0x09 };
struct ad198x_spec *spec;
int err;
err = alloc_ad_spec(codec);
if (err < 0)
return err;
spec = codec->spec;
spec->gen.mixer_nid = 0x0e;
spec->gen.beep_nid = 0x10;
set_beep_amp(spec, 0x10, 0, HDA_OUTPUT);
/* limit the loopback routes not to confuse the parser */
snd_hda_override_conn_list(codec, 0x0c, ARRAY_SIZE(conn_0c), conn_0c);
snd_hda_override_conn_list(codec, 0x0d, ARRAY_SIZE(conn_0d), conn_0d);
err = ad198x_parse_auto_config(codec, false);
if (err < 0)
goto error;
err = ad1983_add_spdif_mux_ctl(codec);
if (err < 0)
goto error;
return 0;
error:
snd_hda_gen_free(codec);
return err;
}
/*
* AD1981 HD specific
*/
static void ad1981_fixup_hp_eapd(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct ad198x_spec *spec = codec->spec;
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
spec->gen.vmaster_mute.hook = ad_vmaster_eapd_hook;
spec->eapd_nid = 0x05;
}
}
/* set the upper-limit for mixer amp to 0dB for avoiding the possible
* damage by overloading
*/
static void ad1981_fixup_amp_override(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
if (action == HDA_FIXUP_ACT_PRE_PROBE)
snd_hda_override_amp_caps(codec, 0x11, HDA_INPUT,
(0x17 << AC_AMPCAP_OFFSET_SHIFT) |
(0x17 << AC_AMPCAP_NUM_STEPS_SHIFT) |
(0x05 << AC_AMPCAP_STEP_SIZE_SHIFT) |
(1 << AC_AMPCAP_MUTE_SHIFT));
}
enum {
AD1981_FIXUP_AMP_OVERRIDE,
AD1981_FIXUP_HP_EAPD,
};
static const struct hda_fixup ad1981_fixups[] = {
[AD1981_FIXUP_AMP_OVERRIDE] = {
.type = HDA_FIXUP_FUNC,
.v.func = ad1981_fixup_amp_override,
},
[AD1981_FIXUP_HP_EAPD] = {
.type = HDA_FIXUP_FUNC,
.v.func = ad1981_fixup_hp_eapd,
.chained = true,
.chain_id = AD1981_FIXUP_AMP_OVERRIDE,
},
};
static const struct snd_pci_quirk ad1981_fixup_tbl[] = {
SND_PCI_QUIRK_VENDOR(0x1014, "Lenovo", AD1981_FIXUP_AMP_OVERRIDE),
SND_PCI_QUIRK_VENDOR(0x103c, "HP", AD1981_FIXUP_HP_EAPD),
SND_PCI_QUIRK_VENDOR(0x17aa, "Lenovo", AD1981_FIXUP_AMP_OVERRIDE),
/* HP nx6320 (reversed SSID, H/W bug) */
SND_PCI_QUIRK(0x30b0, 0x103c, "HP nx6320", AD1981_FIXUP_HP_EAPD),
{}
};
static int patch_ad1981(struct hda_codec *codec)
{
struct ad198x_spec *spec;
int err;
err = alloc_ad_spec(codec);
if (err < 0)
return -ENOMEM;
spec = codec->spec;
spec->gen.mixer_nid = 0x0e;
spec->gen.beep_nid = 0x10;
set_beep_amp(spec, 0x0d, 0, HDA_OUTPUT);
snd_hda_pick_fixup(codec, NULL, ad1981_fixup_tbl, ad1981_fixups);
snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
err = ad198x_parse_auto_config(codec, false);
if (err < 0)
goto error;
err = ad1983_add_spdif_mux_ctl(codec);
if (err < 0)
goto error;
snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
return 0;
error:
snd_hda_gen_free(codec);
return err;
}
/*
* AD1988
*
* Output pins and routes
*
* Pin Mix Sel DAC (*)
* port-A 0x11 (mute/hp) <- 0x22 <- 0x37 <- 03/04/06
* port-B 0x14 (mute/hp) <- 0x2b <- 0x30 <- 03/04/06
* port-C 0x15 (mute) <- 0x2c <- 0x31 <- 05/0a
* port-D 0x12 (mute/hp) <- 0x29 <- 04
* port-E 0x17 (mute/hp) <- 0x26 <- 0x32 <- 05/0a
* port-F 0x16 (mute) <- 0x2a <- 06
* port-G 0x24 (mute) <- 0x27 <- 05
* port-H 0x25 (mute) <- 0x28 <- 0a
* mono 0x13 (mute/amp)<- 0x1e <- 0x36 <- 03/04/06
*
* DAC0 = 03h, DAC1 = 04h, DAC2 = 05h, DAC3 = 06h, DAC4 = 0ah
* (*) DAC2/3/4 are swapped to DAC3/4/2 on AD198A rev.2 due to a h/w bug.
*
* Input pins and routes
*
* pin boost mix input # / adc input #
* port-A 0x11 -> 0x38 -> mix 2, ADC 0
* port-B 0x14 -> 0x39 -> mix 0, ADC 1
* port-C 0x15 -> 0x3a -> 33:0 - mix 1, ADC 2
* port-D 0x12 -> 0x3d -> mix 3, ADC 8
* port-E 0x17 -> 0x3c -> 34:0 - mix 4, ADC 4
* port-F 0x16 -> 0x3b -> mix 5, ADC 3
* port-G 0x24 -> N/A -> 33:1 - mix 1, 34:1 - mix 4, ADC 6
* port-H 0x25 -> N/A -> 33:2 - mix 1, 34:2 - mix 4, ADC 7
*
*
* DAC assignment
* 6stack - front/surr/CLFE/side/opt DACs - 04/06/05/0a/03
* 3stack - front/surr/CLFE/opt DACs - 04/05/0a/03
*
* Inputs of Analog Mix (0x20)
* 0:Port-B (front mic)
* 1:Port-C/G/H (line-in)
* 2:Port-A
* 3:Port-D (line-in/2)
* 4:Port-E/G/H (mic-in)
* 5:Port-F (mic2-in)
* 6:CD
* 7:Beep
*
* ADC selection
* 0:Port-A
* 1:Port-B (front mic-in)
* 2:Port-C (line-in)
* 3:Port-F (mic2-in)
* 4:Port-E (mic-in)
* 5:CD
* 6:Port-G
* 7:Port-H
* 8:Port-D (line-in/2)
* 9:Mix
*
* Proposed pin assignments by the datasheet
*
* 6-stack
* Port-A front headphone
* B front mic-in
* C rear line-in
* D rear front-out
* E rear mic-in
* F rear surround
* G rear CLFE
* H rear side
*
* 3-stack
* Port-A front headphone
* B front mic
* C rear line-in/surround
* D rear front-out
* E rear mic-in/CLFE
*
* laptop
* Port-A headphone
* B mic-in
* C docking station
* D internal speaker (with EAPD)
* E/F quad mic array
*/
static int ad1988_auto_smux_enum_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
struct ad198x_spec *spec = codec->spec;
static const char * const texts[] = {
"PCM", "ADC1", "ADC2", "ADC3",
};
int num_conns = spec->num_smux_conns;
if (num_conns > 4)
num_conns = 4;
return snd_hda_enum_helper_info(kcontrol, uinfo, num_conns, texts);
}
static int ad1988_auto_smux_enum_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
struct ad198x_spec *spec = codec->spec;
ucontrol->value.enumerated.item[0] = spec->cur_smux;
return 0;
}
static int ad1988_auto_smux_enum_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
struct ad198x_spec *spec = codec->spec;
unsigned int val = ucontrol->value.enumerated.item[0];
struct nid_path *path;
int num_conns = spec->num_smux_conns;
if (val >= num_conns)
return -EINVAL;
if (spec->cur_smux == val)
return 0;
mutex_lock(&codec->control_mutex);
path = snd_hda_get_path_from_idx(codec,
spec->smux_paths[spec->cur_smux]);
if (path)
snd_hda_activate_path(codec, path, false, true);
path = snd_hda_get_path_from_idx(codec, spec->smux_paths[val]);
if (path)
snd_hda_activate_path(codec, path, true, true);
spec->cur_smux = val;
mutex_unlock(&codec->control_mutex);
return 1;
}
static const struct snd_kcontrol_new ad1988_auto_smux_mixer = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "IEC958 Playback Source",
.info = ad1988_auto_smux_enum_info,
.get = ad1988_auto_smux_enum_get,
.put = ad1988_auto_smux_enum_put,
};
static int ad1988_auto_init(struct hda_codec *codec)
{
struct ad198x_spec *spec = codec->spec;
int i, err;
err = snd_hda_gen_init(codec);
if (err < 0)
return err;
if (!spec->gen.autocfg.dig_outs)
return 0;
for (i = 0; i < 4; i++) {
struct nid_path *path;
path = snd_hda_get_path_from_idx(codec, spec->smux_paths[i]);
if (path)
snd_hda_activate_path(codec, path, path->active, false);
}
return 0;
}
static int ad1988_add_spdif_mux_ctl(struct hda_codec *codec)
{
struct ad198x_spec *spec = codec->spec;
int i, num_conns;
/* we create four static faked paths, since AD codecs have odd
* widget connections regarding the SPDIF out source
*/
static const struct nid_path fake_paths[4] = {
{
.depth = 3,
.path = { 0x02, 0x1d, 0x1b },
.idx = { 0, 0, 0 },
.multi = { 0, 0, 0 },
},
{
.depth = 4,
.path = { 0x08, 0x0b, 0x1d, 0x1b },
.idx = { 0, 0, 1, 0 },
.multi = { 0, 1, 0, 0 },
},
{
.depth = 4,
.path = { 0x09, 0x0b, 0x1d, 0x1b },
.idx = { 0, 1, 1, 0 },
.multi = { 0, 1, 0, 0 },
},
{
.depth = 4,
.path = { 0x0f, 0x0b, 0x1d, 0x1b },
.idx = { 0, 2, 1, 0 },
.multi = { 0, 1, 0, 0 },
},
};
/* SPDIF source mux appears to be present only on AD1988A */
if (!spec->gen.autocfg.dig_outs ||
get_wcaps_type(get_wcaps(codec, 0x1d)) != AC_WID_AUD_MIX)
return 0;
num_conns = snd_hda_get_num_conns(codec, 0x0b) + 1;
if (num_conns != 3 && num_conns != 4)
return 0;
spec->num_smux_conns = num_conns;
for (i = 0; i < num_conns; i++) {
struct nid_path *path = snd_array_new(&spec->gen.paths);
if (!path)
return -ENOMEM;
*path = fake_paths[i];
if (!i)
path->active = 1;
spec->smux_paths[i] = snd_hda_get_path_idx(codec, path);
}
if (!snd_hda_gen_add_kctl(&spec->gen, NULL, &ad1988_auto_smux_mixer))
return -ENOMEM;
codec->patch_ops.init = ad1988_auto_init;
return 0;
}
/*
*/
enum {
AD1988_FIXUP_6STACK_DIG,
};
static const struct hda_fixup ad1988_fixups[] = {
[AD1988_FIXUP_6STACK_DIG] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
{ 0x11, 0x02214130 }, /* front-hp */
{ 0x12, 0x01014010 }, /* line-out */
{ 0x14, 0x02a19122 }, /* front-mic */
{ 0x15, 0x01813021 }, /* line-in */
{ 0x16, 0x01011012 }, /* line-out */
{ 0x17, 0x01a19020 }, /* mic */
{ 0x1b, 0x0145f1f0 }, /* SPDIF */
{ 0x24, 0x01016011 }, /* line-out */
{ 0x25, 0x01012013 }, /* line-out */
{ }
}
},
};
static const struct hda_model_fixup ad1988_fixup_models[] = {
{ .id = AD1988_FIXUP_6STACK_DIG, .name = "6stack-dig" },
{}
};
static int patch_ad1988(struct hda_codec *codec)
{
struct ad198x_spec *spec;
int err;
err = alloc_ad_spec(codec);
if (err < 0)
return err;
spec = codec->spec;
spec->gen.mixer_nid = 0x20;
spec->gen.mixer_merge_nid = 0x21;
spec->gen.beep_nid = 0x10;
set_beep_amp(spec, 0x10, 0, HDA_OUTPUT);
snd_hda_pick_fixup(codec, ad1988_fixup_models, NULL, ad1988_fixups);
snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
err = ad198x_parse_auto_config(codec, true);
if (err < 0)
goto error;
err = ad1988_add_spdif_mux_ctl(codec);
if (err < 0)
goto error;
snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
return 0;
error:
snd_hda_gen_free(codec);
return err;
}
/*
* AD1884 / AD1984
*
* port-B - front line/mic-in
* port-E - aux in/out
* port-F - aux in/out
* port-C - rear line/mic-in
* port-D - rear line/hp-out
* port-A - front line/hp-out
*
* AD1984 = AD1884 + two digital mic-ins
*
* AD1883 / AD1884A / AD1984A / AD1984B
*
* port-B (0x14) - front mic-in
* port-E (0x1c) - rear mic-in
* port-F (0x16) - CD / ext out
* port-C (0x15) - rear line-in
* port-D (0x12) - rear line-out
* port-A (0x11) - front hp-out
*
* AD1984A = AD1884A + digital-mic
* AD1883 = equivalent with AD1984A
* AD1984B = AD1984A + extra SPDIF-out
*/
/* set the upper-limit for mixer amp to 0dB for avoiding the possible
* damage by overloading
*/
static void ad1884_fixup_amp_override(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
if (action == HDA_FIXUP_ACT_PRE_PROBE)
snd_hda_override_amp_caps(codec, 0x20, HDA_INPUT,
(0x17 << AC_AMPCAP_OFFSET_SHIFT) |
(0x17 << AC_AMPCAP_NUM_STEPS_SHIFT) |
(0x05 << AC_AMPCAP_STEP_SIZE_SHIFT) |
(1 << AC_AMPCAP_MUTE_SHIFT));
}
/* toggle GPIO1 according to the mute state */
static void ad1884_vmaster_hp_gpio_hook(void *private_data, int enabled)
{
struct hda_codec *codec = private_data;
struct ad198x_spec *spec = codec->spec;
if (spec->eapd_nid)
ad_vmaster_eapd_hook(private_data, enabled);
snd_hda_codec_write_cache(codec, 0x01, 0,
AC_VERB_SET_GPIO_DATA,
enabled ? 0x00 : 0x02);
}
static void ad1884_fixup_hp_eapd(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct ad198x_spec *spec = codec->spec;
switch (action) {
case HDA_FIXUP_ACT_PRE_PROBE:
spec->gen.vmaster_mute.hook = ad1884_vmaster_hp_gpio_hook;
spec->gen.own_eapd_ctl = 1;
snd_hda_codec_write_cache(codec, 0x01, 0,
AC_VERB_SET_GPIO_MASK, 0x02);
snd_hda_codec_write_cache(codec, 0x01, 0,
AC_VERB_SET_GPIO_DIRECTION, 0x02);
snd_hda_codec_write_cache(codec, 0x01, 0,
AC_VERB_SET_GPIO_DATA, 0x02);
break;
case HDA_FIXUP_ACT_PROBE:
if (spec->gen.autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT)
spec->eapd_nid = spec->gen.autocfg.line_out_pins[0];
else
spec->eapd_nid = spec->gen.autocfg.speaker_pins[0];
break;
}
}
static void ad1884_fixup_thinkpad(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
struct ad198x_spec *spec = codec->spec;
if (action == HDA_FIXUP_ACT_PRE_PROBE) {
spec->gen.keep_eapd_on = 1;
spec->gen.vmaster_mute.hook = ad_vmaster_eapd_hook;
spec->eapd_nid = 0x12;
/* Analog PC Beeper - allow firmware/ACPI beeps */
spec->beep_amp = HDA_COMPOSE_AMP_VAL(0x20, 3, 3, HDA_INPUT);
spec->gen.beep_nid = 0; /* no digital beep */
}
}
/* set magic COEFs for dmic */
static const struct hda_verb ad1884_dmic_init_verbs[] = {
{0x01, AC_VERB_SET_COEF_INDEX, 0x13f7},
{0x01, AC_VERB_SET_PROC_COEF, 0x08},
{}
};
enum {
AD1884_FIXUP_AMP_OVERRIDE,
AD1884_FIXUP_HP_EAPD,
AD1884_FIXUP_DMIC_COEF,
AD1884_FIXUP_THINKPAD,
AD1884_FIXUP_HP_TOUCHSMART,
};
static const struct hda_fixup ad1884_fixups[] = {
[AD1884_FIXUP_AMP_OVERRIDE] = {
.type = HDA_FIXUP_FUNC,
.v.func = ad1884_fixup_amp_override,
},
[AD1884_FIXUP_HP_EAPD] = {
.type = HDA_FIXUP_FUNC,
.v.func = ad1884_fixup_hp_eapd,
.chained = true,
.chain_id = AD1884_FIXUP_AMP_OVERRIDE,
},
[AD1884_FIXUP_DMIC_COEF] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = ad1884_dmic_init_verbs,
},
[AD1884_FIXUP_THINKPAD] = {
.type = HDA_FIXUP_FUNC,
.v.func = ad1884_fixup_thinkpad,
.chained = true,
.chain_id = AD1884_FIXUP_DMIC_COEF,
},
[AD1884_FIXUP_HP_TOUCHSMART] = {
.type = HDA_FIXUP_VERBS,
.v.verbs = ad1884_dmic_init_verbs,
.chained = true,
.chain_id = AD1884_FIXUP_HP_EAPD,
},
};
static const struct snd_pci_quirk ad1884_fixup_tbl[] = {
SND_PCI_QUIRK(0x103c, 0x2a82, "HP Touchsmart", AD1884_FIXUP_HP_TOUCHSMART),
SND_PCI_QUIRK_VENDOR(0x103c, "HP", AD1884_FIXUP_HP_EAPD),
SND_PCI_QUIRK_VENDOR(0x17aa, "Lenovo Thinkpad", AD1884_FIXUP_THINKPAD),
{}
};
static int patch_ad1884(struct hda_codec *codec)
{
struct ad198x_spec *spec;
int err;
err = alloc_ad_spec(codec);
if (err < 0)
return err;
spec = codec->spec;
spec->gen.mixer_nid = 0x20;
spec->gen.mixer_merge_nid = 0x21;
spec->gen.beep_nid = 0x10;
set_beep_amp(spec, 0x10, 0, HDA_OUTPUT);
snd_hda_pick_fixup(codec, NULL, ad1884_fixup_tbl, ad1884_fixups);
snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
err = ad198x_parse_auto_config(codec, true);
if (err < 0)
goto error;
err = ad1983_add_spdif_mux_ctl(codec);
if (err < 0)
goto error;
snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
return 0;
error:
snd_hda_gen_free(codec);
return err;
}
/*
* AD1882 / AD1882A
*
* port-A - front hp-out
* port-B - front mic-in
* port-C - rear line-in, shared surr-out (3stack)
* port-D - rear line-out
* port-E - rear mic-in, shared clfe-out (3stack)
* port-F - rear surr-out (6stack)
* port-G - rear clfe-out (6stack)
*/
static int patch_ad1882(struct hda_codec *codec)
{
struct ad198x_spec *spec;
int err;
err = alloc_ad_spec(codec);
if (err < 0)
return err;
spec = codec->spec;
spec->gen.mixer_nid = 0x20;
spec->gen.mixer_merge_nid = 0x21;
spec->gen.beep_nid = 0x10;
set_beep_amp(spec, 0x10, 0, HDA_OUTPUT);
err = ad198x_parse_auto_config(codec, true);
if (err < 0)
goto error;
err = ad1988_add_spdif_mux_ctl(codec);
if (err < 0)
goto error;
return 0;
error:
snd_hda_gen_free(codec);
return err;
}
/*
* patch entries
*/
static const struct hda_device_id snd_hda_id_analog[] = {
HDA_CODEC_ENTRY(0x11d4184a, "AD1884A", patch_ad1884),
HDA_CODEC_ENTRY(0x11d41882, "AD1882", patch_ad1882),
HDA_CODEC_ENTRY(0x11d41883, "AD1883", patch_ad1884),
HDA_CODEC_ENTRY(0x11d41884, "AD1884", patch_ad1884),
HDA_CODEC_ENTRY(0x11d4194a, "AD1984A", patch_ad1884),
HDA_CODEC_ENTRY(0x11d4194b, "AD1984B", patch_ad1884),
HDA_CODEC_ENTRY(0x11d41981, "AD1981", patch_ad1981),
HDA_CODEC_ENTRY(0x11d41983, "AD1983", patch_ad1983),
HDA_CODEC_ENTRY(0x11d41984, "AD1984", patch_ad1884),
HDA_CODEC_ENTRY(0x11d41986, "AD1986A", patch_ad1986a),
HDA_CODEC_ENTRY(0x11d41988, "AD1988", patch_ad1988),
HDA_CODEC_ENTRY(0x11d4198b, "AD1988B", patch_ad1988),
HDA_CODEC_ENTRY(0x11d4882a, "AD1882A", patch_ad1882),
HDA_CODEC_ENTRY(0x11d4989a, "AD1989A", patch_ad1988),
HDA_CODEC_ENTRY(0x11d4989b, "AD1989B", patch_ad1988),
{} /* terminator */
};
MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_analog);
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("Analog Devices HD-audio codec");
static struct hda_codec_driver analog_driver = {
.id = snd_hda_id_analog,
};
module_hda_codec_driver(analog_driver);
| linux-master | sound/pci/hda/patch_analog.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Universal Interface for Intel High Definition Audio Codec
*
* HD audio interface patch for C-Media CMI9880
*
* Copyright (c) 2004 Takashi Iwai <[email protected]>
*/
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <sound/core.h>
#include <sound/hda_codec.h>
#include "hda_local.h"
#include "hda_auto_parser.h"
#include "hda_jack.h"
#include "hda_generic.h"
struct cmi_spec {
struct hda_gen_spec gen;
};
/*
* stuff for auto-parser
*/
static const struct hda_codec_ops cmi_auto_patch_ops = {
.build_controls = snd_hda_gen_build_controls,
.build_pcms = snd_hda_gen_build_pcms,
.init = snd_hda_gen_init,
.free = snd_hda_gen_free,
.unsol_event = snd_hda_jack_unsol_event,
};
static int patch_cmi9880(struct hda_codec *codec)
{
struct cmi_spec *spec;
struct auto_pin_cfg *cfg;
int err;
spec = kzalloc(sizeof(*spec), GFP_KERNEL);
if (spec == NULL)
return -ENOMEM;
codec->spec = spec;
codec->patch_ops = cmi_auto_patch_ops;
cfg = &spec->gen.autocfg;
snd_hda_gen_spec_init(&spec->gen);
err = snd_hda_parse_pin_defcfg(codec, cfg, NULL, 0);
if (err < 0)
goto error;
err = snd_hda_gen_parse_auto_config(codec, cfg);
if (err < 0)
goto error;
return 0;
error:
snd_hda_gen_free(codec);
return err;
}
static int patch_cmi8888(struct hda_codec *codec)
{
struct cmi_spec *spec;
struct auto_pin_cfg *cfg;
int err;
spec = kzalloc(sizeof(*spec), GFP_KERNEL);
if (!spec)
return -ENOMEM;
codec->spec = spec;
codec->patch_ops = cmi_auto_patch_ops;
cfg = &spec->gen.autocfg;
snd_hda_gen_spec_init(&spec->gen);
/* mask NID 0x10 from the playback volume selection;
* it's a headphone boost volume handled manually below
*/
spec->gen.out_vol_mask = (1ULL << 0x10);
err = snd_hda_parse_pin_defcfg(codec, cfg, NULL, 0);
if (err < 0)
goto error;
err = snd_hda_gen_parse_auto_config(codec, cfg);
if (err < 0)
goto error;
if (get_defcfg_device(snd_hda_codec_get_pincfg(codec, 0x10)) ==
AC_JACK_HP_OUT) {
static const struct snd_kcontrol_new amp_kctl =
HDA_CODEC_VOLUME("Headphone Amp Playback Volume",
0x10, 0, HDA_OUTPUT);
if (!snd_hda_gen_add_kctl(&spec->gen, NULL, &_kctl)) {
err = -ENOMEM;
goto error;
}
}
return 0;
error:
snd_hda_gen_free(codec);
return err;
}
/*
* patch entries
*/
static const struct hda_device_id snd_hda_id_cmedia[] = {
HDA_CODEC_ENTRY(0x13f68888, "CMI8888", patch_cmi8888),
HDA_CODEC_ENTRY(0x13f69880, "CMI9880", patch_cmi9880),
HDA_CODEC_ENTRY(0x434d4980, "CMI9880", patch_cmi9880),
{} /* terminator */
};
MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_cmedia);
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("C-Media HD-audio codec");
static struct hda_codec_driver cmedia_driver = {
.id = snd_hda_id_cmedia,
};
module_hda_codec_driver(cmedia_driver);
| linux-master | sound/pci/hda/patch_cmedia.c |
// SPDX-License-Identifier: GPL-2.0
/* Fixes for HP X360 laptops with top B&O speakers
* to be included from codec driver
*/
static void alc295_fixup_hp_top_speakers(struct hda_codec *codec,
const struct hda_fixup *fix, int action)
{
static const struct hda_pintbl pincfgs[] = {
{ 0x17, 0x90170110 },
{ }
};
static const struct coef_fw alc295_hp_speakers_coefs[] = {
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x0000), WRITE_COEF(0x28, 0x0000), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x003f), WRITE_COEF(0x28, 0x1000), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x0004), WRITE_COEF(0x28, 0x0600), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x006a), WRITE_COEF(0x28, 0x0006), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x006c), WRITE_COEF(0x28, 0xc0c0), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x0008), WRITE_COEF(0x28, 0xb000), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x002e), WRITE_COEF(0x28, 0x0800), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x006a), WRITE_COEF(0x28, 0x00c1), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x006c), WRITE_COEF(0x28, 0x0320), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x0039), WRITE_COEF(0x28, 0x0000), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x003b), WRITE_COEF(0x28, 0xffff), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x003c), WRITE_COEF(0x28, 0xffd0), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x003a), WRITE_COEF(0x28, 0x1dfe), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x0080), WRITE_COEF(0x28, 0x0880), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x003a), WRITE_COEF(0x28, 0x0dfe), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x0018), WRITE_COEF(0x28, 0x0219), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x006a), WRITE_COEF(0x28, 0x005d), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x006c), WRITE_COEF(0x28, 0x9142), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x00c0), WRITE_COEF(0x28, 0x01ce), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x00c1), WRITE_COEF(0x28, 0xed0c), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x00c2), WRITE_COEF(0x28, 0x1c00), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x00c3), WRITE_COEF(0x28, 0x0000), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x00c4), WRITE_COEF(0x28, 0x0200), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x00c5), WRITE_COEF(0x28, 0x0000), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x00c6), WRITE_COEF(0x28, 0x0399), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x00c7), WRITE_COEF(0x28, 0x2330), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x00c8), WRITE_COEF(0x28, 0x1e5d), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x00c9), WRITE_COEF(0x28, 0x6eff), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x00ca), WRITE_COEF(0x28, 0x01c0), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x00cb), WRITE_COEF(0x28, 0xed0c), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x00cc), WRITE_COEF(0x28, 0x1c00), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x00cd), WRITE_COEF(0x28, 0x0000), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x00ce), WRITE_COEF(0x28, 0x0200), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x00cf), WRITE_COEF(0x28, 0x0000), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x00d0), WRITE_COEF(0x28, 0x0399), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x00d1), WRITE_COEF(0x28, 0x2330), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x00d2), WRITE_COEF(0x28, 0x1e5d), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x00d3), WRITE_COEF(0x28, 0x6eff), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x0062), WRITE_COEF(0x28, 0x8000), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x0063), WRITE_COEF(0x28, 0x5f5f), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x0064), WRITE_COEF(0x28, 0x1000), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x0065), WRITE_COEF(0x28, 0x0000), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x0066), WRITE_COEF(0x28, 0x4004), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x0067), WRITE_COEF(0x28, 0x0802), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x0068), WRITE_COEF(0x28, 0x890f), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x0069), WRITE_COEF(0x28, 0xe021), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x0070), WRITE_COEF(0x28, 0x8012), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x0071), WRITE_COEF(0x28, 0x3450), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x0072), WRITE_COEF(0x28, 0x0123), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x0073), WRITE_COEF(0x28, 0x4543), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x0074), WRITE_COEF(0x28, 0x2100), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x0075), WRITE_COEF(0x28, 0x4321), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x0076), WRITE_COEF(0x28, 0x0000), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x0050), WRITE_COEF(0x28, 0x8200), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x003a), WRITE_COEF(0x28, 0x1dfe), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x0051), WRITE_COEF(0x28, 0x0707), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x0052), WRITE_COEF(0x28, 0x4090), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x006a), WRITE_COEF(0x28, 0x0090), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x006c), WRITE_COEF(0x28, 0x721f), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x0012), WRITE_COEF(0x28, 0xebeb), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x009e), WRITE_COEF(0x28, 0x0000), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x0060), WRITE_COEF(0x28, 0x2213), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x006a), WRITE_COEF(0x28, 0x0006), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x006c), WRITE_COEF(0x28, 0x0000), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x003f), WRITE_COEF(0x28, 0x3000), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x0004), WRITE_COEF(0x28, 0x0500), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x0040), WRITE_COEF(0x28, 0x800c), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x0046), WRITE_COEF(0x28, 0xc22e), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x004b), WRITE_COEF(0x28, 0x0000), WRITE_COEF(0x29, 0xb024),
WRITE_COEF(0x24, 0x0012), WRITE_COEF(0x26, 0x0050), WRITE_COEF(0x28, 0x82ec), WRITE_COEF(0x29, 0xb024),
};
switch (action) {
case HDA_FIXUP_ACT_PRE_PROBE:
snd_hda_apply_pincfgs(codec, pincfgs);
alc295_fixup_disable_dac3(codec, fix, action);
break;
case HDA_FIXUP_ACT_INIT:
alc_process_coef_fw(codec, alc295_hp_speakers_coefs);
break;
}
}
| linux-master | sound/pci/hda/hp_x360_helper.c |
// SPDX-License-Identifier: GPL-2.0-only
//
// CS35L56 HDA audio driver SPI binding
//
// Copyright (C) 2023 Cirrus Logic, Inc. and
// Cirrus Logic International Semiconductor Ltd.
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/spi/spi.h>
#include "cs35l56_hda.h"
static int cs35l56_hda_spi_probe(struct spi_device *spi)
{
struct cs35l56_hda *cs35l56;
int ret;
cs35l56 = devm_kzalloc(&spi->dev, sizeof(*cs35l56), GFP_KERNEL);
if (!cs35l56)
return -ENOMEM;
cs35l56->base.dev = &spi->dev;
cs35l56->base.regmap = devm_regmap_init_spi(spi, &cs35l56_regmap_spi);
if (IS_ERR(cs35l56->base.regmap)) {
ret = PTR_ERR(cs35l56->base.regmap);
dev_err(cs35l56->base.dev, "Failed to allocate register map: %d\n",
ret);
return ret;
}
ret = cs35l56_hda_common_probe(cs35l56, spi->chip_select);
if (ret)
return ret;
ret = cs35l56_irq_request(&cs35l56->base, spi->irq);
if (ret < 0)
cs35l56_hda_remove(cs35l56->base.dev);
return ret;
}
static void cs35l56_hda_spi_remove(struct spi_device *spi)
{
cs35l56_hda_remove(&spi->dev);
}
static const struct spi_device_id cs35l56_hda_spi_id[] = {
{ "cs35l56-hda", 0 },
{}
};
static struct spi_driver cs35l56_hda_spi_driver = {
.driver = {
.name = "cs35l56-hda",
.pm = &cs35l56_hda_pm_ops,
},
.id_table = cs35l56_hda_spi_id,
.probe = cs35l56_hda_spi_probe,
.remove = cs35l56_hda_spi_remove,
};
module_spi_driver(cs35l56_hda_spi_driver);
MODULE_DESCRIPTION("HDA CS35L56 SPI driver");
MODULE_IMPORT_NS(SND_HDA_SCODEC_CS35L56);
MODULE_IMPORT_NS(SND_SOC_CS35L56_SHARED);
MODULE_AUTHOR("Richard Fitzgerald <[email protected]>");
MODULE_AUTHOR("Simon Trimmer <[email protected]>");
MODULE_LICENSE("GPL");
| linux-master | sound/pci/hda/cs35l56_hda_spi.c |
// SPDX-License-Identifier: GPL-2.0
//
// TAS2781 HDA I2C driver
//
// Copyright 2023 Texas Instruments, Inc.
//
// Author: Shenghao Ding <[email protected]>
#include <linux/acpi.h>
#include <linux/crc8.h>
#include <linux/crc32.h>
#include <linux/efi.h>
#include <linux/firmware.h>
#include <linux/i2c.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/pm_runtime.h>
#include <linux/regmap.h>
#include <sound/hda_codec.h>
#include <sound/soc.h>
#include <sound/tas2781.h>
#include <sound/tlv.h>
#include <sound/tas2781-tlv.h>
#include "hda_local.h"
#include "hda_auto_parser.h"
#include "hda_component.h"
#include "hda_jack.h"
#include "hda_generic.h"
#define TASDEVICE_SPEAKER_CALIBRATION_SIZE 20
/* No standard control callbacks for SNDRV_CTL_ELEM_IFACE_CARD
* Define two controls, one is Volume control callbacks, the other is
* flag setting control callbacks.
*/
/* Volume control callbacks for tas2781 */
#define ACARD_SINGLE_RANGE_EXT_TLV(xname, xreg, xshift, xmin, xmax, xinvert, \
xhandler_get, xhandler_put, tlv_array) \
{ .iface = SNDRV_CTL_ELEM_IFACE_CARD, .name = (xname),\
.access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
SNDRV_CTL_ELEM_ACCESS_READWRITE,\
.tlv.p = (tlv_array), \
.info = snd_soc_info_volsw_range, \
.get = xhandler_get, .put = xhandler_put, \
.private_value = (unsigned long)&(struct soc_mixer_control) \
{.reg = xreg, .rreg = xreg, .shift = xshift, \
.rshift = xshift, .min = xmin, .max = xmax, \
.invert = xinvert} }
/* Flag control callbacks for tas2781 */
#define ACARD_SINGLE_BOOL_EXT(xname, xdata, xhandler_get, xhandler_put) \
{ .iface = SNDRV_CTL_ELEM_IFACE_CARD, .name = xname, \
.info = snd_ctl_boolean_mono_info, \
.get = xhandler_get, .put = xhandler_put, \
.private_value = xdata }
enum calib_data {
R0_VAL = 0,
INV_R0,
R0LOW,
POWER,
TLIM,
CALIB_MAX
};
static int tas2781_get_i2c_res(struct acpi_resource *ares, void *data)
{
struct tasdevice_priv *tas_priv = data;
struct acpi_resource_i2c_serialbus *sb;
if (i2c_acpi_get_i2c_resource(ares, &sb)) {
if (tas_priv->ndev < TASDEVICE_MAX_CHANNELS &&
sb->slave_address != TAS2781_GLOBAL_ADDR) {
tas_priv->tasdevice[tas_priv->ndev].dev_addr =
(unsigned int)sb->slave_address;
tas_priv->ndev++;
}
}
return 1;
}
static int tas2781_read_acpi(struct tasdevice_priv *p, const char *hid)
{
struct acpi_device *adev;
struct device *physdev;
LIST_HEAD(resources);
const char *sub;
int ret;
adev = acpi_dev_get_first_match_dev(hid, NULL, -1);
if (!adev) {
dev_err(p->dev,
"Failed to find an ACPI device for %s\n", hid);
return -ENODEV;
}
ret = acpi_dev_get_resources(adev, &resources, tas2781_get_i2c_res, p);
if (ret < 0)
goto err;
acpi_dev_free_resource_list(&resources);
strscpy(p->dev_name, hid, sizeof(p->dev_name));
physdev = get_device(acpi_get_first_physical_node(adev));
acpi_dev_put(adev);
/* No side-effect to the playback even if subsystem_id is NULL*/
sub = acpi_get_subsystem_id(ACPI_HANDLE(physdev));
if (IS_ERR(sub))
sub = NULL;
p->acpi_subsystem_id = sub;
put_device(physdev);
return 0;
err:
dev_err(p->dev, "read acpi error, ret: %d\n", ret);
acpi_dev_put(adev);
return ret;
}
static void tas2781_hda_playback_hook(struct device *dev, int action)
{
struct tasdevice_priv *tas_priv = dev_get_drvdata(dev);
dev_dbg(tas_priv->dev, "%s: action = %d\n", __func__, action);
switch (action) {
case HDA_GEN_PCM_ACT_OPEN:
pm_runtime_get_sync(dev);
mutex_lock(&tas_priv->codec_lock);
tasdevice_tuning_switch(tas_priv, 0);
mutex_unlock(&tas_priv->codec_lock);
break;
case HDA_GEN_PCM_ACT_CLOSE:
mutex_lock(&tas_priv->codec_lock);
tasdevice_tuning_switch(tas_priv, 1);
mutex_unlock(&tas_priv->codec_lock);
pm_runtime_mark_last_busy(dev);
pm_runtime_put_autosuspend(dev);
break;
default:
dev_dbg(tas_priv->dev, "Playback action not supported: %d\n",
action);
break;
}
}
static int tasdevice_info_profile(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
struct tasdevice_priv *tas_priv = snd_kcontrol_chip(kcontrol);
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 1;
uinfo->value.integer.min = 0;
uinfo->value.integer.max = tas_priv->rcabin.ncfgs - 1;
return 0;
}
static int tasdevice_get_profile_id(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct tasdevice_priv *tas_priv = snd_kcontrol_chip(kcontrol);
ucontrol->value.integer.value[0] = tas_priv->rcabin.profile_cfg_id;
return 0;
}
static int tasdevice_set_profile_id(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct tasdevice_priv *tas_priv = snd_kcontrol_chip(kcontrol);
int nr_profile = ucontrol->value.integer.value[0];
int max = tas_priv->rcabin.ncfgs - 1;
int val, ret = 0;
val = clamp(nr_profile, 0, max);
if (tas_priv->rcabin.profile_cfg_id != val) {
tas_priv->rcabin.profile_cfg_id = val;
ret = 1;
}
return ret;
}
static int tasdevice_info_programs(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
struct tasdevice_priv *tas_priv = snd_kcontrol_chip(kcontrol);
struct tasdevice_fw *tas_fw = tas_priv->fmw;
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 1;
uinfo->value.integer.min = 0;
uinfo->value.integer.max = tas_fw->nr_programs - 1;
return 0;
}
static int tasdevice_info_config(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
struct tasdevice_priv *tas_priv = snd_kcontrol_chip(kcontrol);
struct tasdevice_fw *tas_fw = tas_priv->fmw;
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 1;
uinfo->value.integer.min = 0;
uinfo->value.integer.max = tas_fw->nr_configurations - 1;
return 0;
}
static int tasdevice_program_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct tasdevice_priv *tas_priv = snd_kcontrol_chip(kcontrol);
ucontrol->value.integer.value[0] = tas_priv->cur_prog;
return 0;
}
static int tasdevice_program_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct tasdevice_priv *tas_priv = snd_kcontrol_chip(kcontrol);
struct tasdevice_fw *tas_fw = tas_priv->fmw;
int nr_program = ucontrol->value.integer.value[0];
int max = tas_fw->nr_programs - 1;
int val, ret = 0;
val = clamp(nr_program, 0, max);
if (tas_priv->cur_prog != val) {
tas_priv->cur_prog = val;
ret = 1;
}
return ret;
}
static int tasdevice_config_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct tasdevice_priv *tas_priv = snd_kcontrol_chip(kcontrol);
ucontrol->value.integer.value[0] = tas_priv->cur_conf;
return 0;
}
static int tasdevice_config_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct tasdevice_priv *tas_priv = snd_kcontrol_chip(kcontrol);
struct tasdevice_fw *tas_fw = tas_priv->fmw;
int nr_config = ucontrol->value.integer.value[0];
int max = tas_fw->nr_configurations - 1;
int val, ret = 0;
val = clamp(nr_config, 0, max);
if (tas_priv->cur_conf != val) {
tas_priv->cur_conf = val;
ret = 1;
}
return ret;
}
/*
* tas2781_digital_getvol - get the volum control
* @kcontrol: control pointer
* @ucontrol: User data
* Customer Kcontrol for tas2781 is primarily for regmap booking, paging
* depends on internal regmap mechanism.
* tas2781 contains book and page two-level register map, especially
* book switching will set the register BXXP00R7F, after switching to the
* correct book, then leverage the mechanism for paging to access the
* register.
*/
static int tas2781_digital_getvol(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct tasdevice_priv *tas_priv = snd_kcontrol_chip(kcontrol);
struct soc_mixer_control *mc =
(struct soc_mixer_control *)kcontrol->private_value;
return tasdevice_digital_getvol(tas_priv, ucontrol, mc);
}
static int tas2781_amp_getvol(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct tasdevice_priv *tas_priv = snd_kcontrol_chip(kcontrol);
struct soc_mixer_control *mc =
(struct soc_mixer_control *)kcontrol->private_value;
return tasdevice_amp_getvol(tas_priv, ucontrol, mc);
}
static int tas2781_digital_putvol(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct tasdevice_priv *tas_priv = snd_kcontrol_chip(kcontrol);
struct soc_mixer_control *mc =
(struct soc_mixer_control *)kcontrol->private_value;
/* The check of the given value is in tasdevice_digital_putvol. */
return tasdevice_digital_putvol(tas_priv, ucontrol, mc);
}
static int tas2781_amp_putvol(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct tasdevice_priv *tas_priv = snd_kcontrol_chip(kcontrol);
struct soc_mixer_control *mc =
(struct soc_mixer_control *)kcontrol->private_value;
/* The check of the given value is in tasdevice_amp_putvol. */
return tasdevice_amp_putvol(tas_priv, ucontrol, mc);
}
static int tas2781_force_fwload_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct tasdevice_priv *tas_priv = snd_kcontrol_chip(kcontrol);
ucontrol->value.integer.value[0] = (int)tas_priv->force_fwload_status;
dev_dbg(tas_priv->dev, "%s : Force FWload %s\n", __func__,
tas_priv->force_fwload_status ? "ON" : "OFF");
return 0;
}
static int tas2781_force_fwload_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct tasdevice_priv *tas_priv = snd_kcontrol_chip(kcontrol);
bool change, val = (bool)ucontrol->value.integer.value[0];
if (tas_priv->force_fwload_status == val)
change = false;
else {
change = true;
tas_priv->force_fwload_status = val;
}
dev_dbg(tas_priv->dev, "%s : Force FWload %s\n", __func__,
tas_priv->force_fwload_status ? "ON" : "OFF");
return change;
}
static const struct snd_kcontrol_new tas2781_snd_controls[] = {
ACARD_SINGLE_RANGE_EXT_TLV("Speaker Analog Gain", TAS2781_AMP_LEVEL,
1, 0, 20, 0, tas2781_amp_getvol,
tas2781_amp_putvol, amp_vol_tlv),
ACARD_SINGLE_RANGE_EXT_TLV("Speaker Digital Gain", TAS2781_DVC_LVL,
0, 0, 200, 1, tas2781_digital_getvol,
tas2781_digital_putvol, dvc_tlv),
ACARD_SINGLE_BOOL_EXT("Speaker Force Firmware Load", 0,
tas2781_force_fwload_get, tas2781_force_fwload_put),
};
static const struct snd_kcontrol_new tas2781_prof_ctrl = {
.name = "Speaker Profile Id",
.iface = SNDRV_CTL_ELEM_IFACE_CARD,
.info = tasdevice_info_profile,
.get = tasdevice_get_profile_id,
.put = tasdevice_set_profile_id,
};
static const struct snd_kcontrol_new tas2781_dsp_prog_ctrl = {
.name = "Speaker Program Id",
.iface = SNDRV_CTL_ELEM_IFACE_CARD,
.info = tasdevice_info_programs,
.get = tasdevice_program_get,
.put = tasdevice_program_put,
};
static const struct snd_kcontrol_new tas2781_dsp_conf_ctrl = {
.name = "Speaker Config Id",
.iface = SNDRV_CTL_ELEM_IFACE_CARD,
.info = tasdevice_info_config,
.get = tasdevice_config_get,
.put = tasdevice_config_put,
};
static void tas2781_apply_calib(struct tasdevice_priv *tas_priv)
{
static const unsigned char page_array[CALIB_MAX] = {
0x17, 0x18, 0x18, 0x0d, 0x18
};
static const unsigned char rgno_array[CALIB_MAX] = {
0x74, 0x0c, 0x14, 0x3c, 0x7c
};
unsigned char *data;
int i, j, rc;
for (i = 0; i < tas_priv->ndev; i++) {
data = tas_priv->cali_data.data +
i * TASDEVICE_SPEAKER_CALIBRATION_SIZE;
for (j = 0; j < CALIB_MAX; j++) {
rc = tasdevice_dev_bulk_write(tas_priv, i,
TASDEVICE_REG(0, page_array[j], rgno_array[j]),
&(data[4 * j]), 4);
if (rc < 0)
dev_err(tas_priv->dev,
"chn %d calib %d bulk_wr err = %d\n",
i, j, rc);
}
}
}
/* Update the calibrate data, including speaker impedance, f0, etc, into algo.
* Calibrate data is done by manufacturer in the factory. These data are used
* by Algo for calucating the speaker temperature, speaker membrance excursion
* and f0 in real time during playback.
*/
static int tas2781_save_calibration(struct tasdevice_priv *tas_priv)
{
efi_guid_t efi_guid = EFI_GUID(0x02f9af02, 0x7734, 0x4233, 0xb4, 0x3d,
0x93, 0xfe, 0x5a, 0xa3, 0x5d, 0xb3);
static efi_char16_t efi_name[] = L"CALI_DATA";
struct tm *tm = &tas_priv->tm;
unsigned int attr, crc;
unsigned int *tmp_val;
efi_status_t status;
/* Lenovo devices */
if (tas_priv->catlog_id == LENOVO)
efi_guid = EFI_GUID(0x1f52d2a1, 0xbb3a, 0x457d, 0xbc, 0x09,
0x43, 0xa3, 0xf4, 0x31, 0x0a, 0x92);
tas_priv->cali_data.total_sz = 0;
/* Get real size of UEFI variable */
status = efi.get_variable(efi_name, &efi_guid, &attr,
&tas_priv->cali_data.total_sz, tas_priv->cali_data.data);
if (status == EFI_BUFFER_TOO_SMALL) {
/* Allocate data buffer of data_size bytes */
tas_priv->cali_data.data = devm_kzalloc(tas_priv->dev,
tas_priv->cali_data.total_sz, GFP_KERNEL);
if (!tas_priv->cali_data.data)
return -ENOMEM;
/* Get variable contents into buffer */
status = efi.get_variable(efi_name, &efi_guid, &attr,
&tas_priv->cali_data.total_sz,
tas_priv->cali_data.data);
if (status != EFI_SUCCESS)
return -EINVAL;
}
tmp_val = (unsigned int *)tas_priv->cali_data.data;
crc = crc32(~0, tas_priv->cali_data.data, 84) ^ ~0;
dev_dbg(tas_priv->dev, "cali crc 0x%08x PK tmp_val 0x%08x\n",
crc, tmp_val[21]);
if (crc == tmp_val[21]) {
time64_to_tm(tmp_val[20], 0, tm);
dev_dbg(tas_priv->dev, "%4ld-%2d-%2d, %2d:%2d:%2d\n",
tm->tm_year, tm->tm_mon, tm->tm_mday,
tm->tm_hour, tm->tm_min, tm->tm_sec);
tas2781_apply_calib(tas_priv);
} else
tas_priv->cali_data.total_sz = 0;
return 0;
}
static void tasdev_fw_ready(const struct firmware *fmw, void *context)
{
struct tasdevice_priv *tas_priv = context;
struct hda_codec *codec = tas_priv->codec;
int i, ret;
pm_runtime_get_sync(tas_priv->dev);
mutex_lock(&tas_priv->codec_lock);
ret = tasdevice_rca_parser(tas_priv, fmw);
if (ret)
goto out;
ret = snd_ctl_add(codec->card,
snd_ctl_new1(&tas2781_prof_ctrl, tas_priv));
if (ret) {
dev_err(tas_priv->dev,
"Failed to add KControl %s = %d\n",
tas2781_prof_ctrl.name, ret);
goto out;
}
for (i = 0; i < ARRAY_SIZE(tas2781_snd_controls); i++) {
ret = snd_ctl_add(codec->card,
snd_ctl_new1(&tas2781_snd_controls[i], tas_priv));
if (ret) {
dev_err(tas_priv->dev,
"Failed to add KControl %s = %d\n",
tas2781_snd_controls[i].name, ret);
goto out;
}
}
tasdevice_dsp_remove(tas_priv);
tas_priv->fw_state = TASDEVICE_DSP_FW_PENDING;
scnprintf(tas_priv->coef_binaryname, 64, "TAS2XXX%04X.bin",
codec->core.subsystem_id & 0xffff);
ret = tasdevice_dsp_parser(tas_priv);
if (ret) {
dev_err(tas_priv->dev, "dspfw load %s error\n",
tas_priv->coef_binaryname);
tas_priv->fw_state = TASDEVICE_DSP_FW_FAIL;
goto out;
}
ret = snd_ctl_add(codec->card,
snd_ctl_new1(&tas2781_dsp_prog_ctrl, tas_priv));
if (ret) {
dev_err(tas_priv->dev,
"Failed to add KControl %s = %d\n",
tas2781_dsp_prog_ctrl.name, ret);
goto out;
}
ret = snd_ctl_add(codec->card,
snd_ctl_new1(&tas2781_dsp_conf_ctrl, tas_priv));
if (ret) {
dev_err(tas_priv->dev,
"Failed to add KControl %s = %d\n",
tas2781_dsp_conf_ctrl.name, ret);
goto out;
}
tas_priv->fw_state = TASDEVICE_DSP_FW_ALL_OK;
tasdevice_prmg_load(tas_priv, 0);
/* If calibrated data occurs error, dsp will still works with default
* calibrated data inside algo.
*/
tas2781_save_calibration(tas_priv);
out:
if (tas_priv->fw_state == TASDEVICE_DSP_FW_FAIL) {
/*If DSP FW fail, kcontrol won't be created */
tasdevice_config_info_remove(tas_priv);
tasdevice_dsp_remove(tas_priv);
}
mutex_unlock(&tas_priv->codec_lock);
if (fmw)
release_firmware(fmw);
pm_runtime_mark_last_busy(tas_priv->dev);
pm_runtime_put_autosuspend(tas_priv->dev);
}
static int tas2781_hda_bind(struct device *dev, struct device *master,
void *master_data)
{
struct tasdevice_priv *tas_priv = dev_get_drvdata(dev);
struct hda_component *comps = master_data;
struct hda_codec *codec;
unsigned int subid;
int ret;
if (!comps || tas_priv->index < 0 ||
tas_priv->index >= HDA_MAX_COMPONENTS)
return -EINVAL;
comps = &comps[tas_priv->index];
if (comps->dev)
return -EBUSY;
codec = comps->codec;
subid = codec->core.subsystem_id >> 16;
switch (subid) {
case 0x17aa:
tas_priv->catlog_id = LENOVO;
break;
default:
tas_priv->catlog_id = OTHERS;
break;
}
pm_runtime_get_sync(dev);
comps->dev = dev;
strscpy(comps->name, dev_name(dev), sizeof(comps->name));
ret = tascodec_init(tas_priv, codec, tasdev_fw_ready);
if (!ret)
comps->playback_hook = tas2781_hda_playback_hook;
pm_runtime_mark_last_busy(dev);
pm_runtime_put_autosuspend(dev);
return ret;
}
static void tas2781_hda_unbind(struct device *dev,
struct device *master, void *master_data)
{
struct tasdevice_priv *tas_priv = dev_get_drvdata(dev);
struct hda_component *comps = master_data;
if (comps[tas_priv->index].dev == dev)
memset(&comps[tas_priv->index], 0, sizeof(*comps));
tasdevice_config_info_remove(tas_priv);
tasdevice_dsp_remove(tas_priv);
tas_priv->fw_state = TASDEVICE_DSP_FW_PENDING;
}
static const struct component_ops tas2781_hda_comp_ops = {
.bind = tas2781_hda_bind,
.unbind = tas2781_hda_unbind,
};
static void tas2781_hda_remove(struct device *dev)
{
struct tasdevice_priv *tas_priv = dev_get_drvdata(dev);
pm_runtime_get_sync(tas_priv->dev);
pm_runtime_disable(tas_priv->dev);
component_del(tas_priv->dev, &tas2781_hda_comp_ops);
pm_runtime_put_noidle(tas_priv->dev);
tasdevice_remove(tas_priv);
}
static int tas2781_hda_i2c_probe(struct i2c_client *clt)
{
struct tasdevice_priv *tas_priv;
const char *device_name;
int ret;
if (strstr(dev_name(&clt->dev), "TIAS2781"))
device_name = "TIAS2781";
else
return -ENODEV;
tas_priv = tasdevice_kzalloc(clt);
if (!tas_priv)
return -ENOMEM;
tas_priv->irq_info.irq = clt->irq;
ret = tas2781_read_acpi(tas_priv, device_name);
if (ret)
return dev_err_probe(tas_priv->dev, ret,
"Platform not supported\n");
ret = tasdevice_init(tas_priv);
if (ret)
goto err;
pm_runtime_set_autosuspend_delay(tas_priv->dev, 3000);
pm_runtime_use_autosuspend(tas_priv->dev);
pm_runtime_mark_last_busy(tas_priv->dev);
pm_runtime_set_active(tas_priv->dev);
pm_runtime_get_noresume(tas_priv->dev);
pm_runtime_enable(tas_priv->dev);
pm_runtime_put_autosuspend(tas_priv->dev);
ret = component_add(tas_priv->dev, &tas2781_hda_comp_ops);
if (ret) {
dev_err(tas_priv->dev, "Register component failed: %d\n", ret);
pm_runtime_disable(tas_priv->dev);
goto err;
}
tas2781_reset(tas_priv);
err:
if (ret)
tas2781_hda_remove(&clt->dev);
return ret;
}
static void tas2781_hda_i2c_remove(struct i2c_client *clt)
{
tas2781_hda_remove(&clt->dev);
}
static int tas2781_runtime_suspend(struct device *dev)
{
struct tasdevice_priv *tas_priv = dev_get_drvdata(dev);
int i;
dev_dbg(tas_priv->dev, "Runtime Suspend\n");
mutex_lock(&tas_priv->codec_lock);
if (tas_priv->playback_started) {
tasdevice_tuning_switch(tas_priv, 1);
tas_priv->playback_started = false;
}
for (i = 0; i < tas_priv->ndev; i++) {
tas_priv->tasdevice[i].cur_book = -1;
tas_priv->tasdevice[i].cur_prog = -1;
tas_priv->tasdevice[i].cur_conf = -1;
}
regcache_cache_only(tas_priv->regmap, true);
regcache_mark_dirty(tas_priv->regmap);
mutex_unlock(&tas_priv->codec_lock);
return 0;
}
static int tas2781_runtime_resume(struct device *dev)
{
struct tasdevice_priv *tas_priv = dev_get_drvdata(dev);
unsigned long calib_data_sz =
tas_priv->ndev * TASDEVICE_SPEAKER_CALIBRATION_SIZE;
int ret;
dev_dbg(tas_priv->dev, "Runtime Resume\n");
mutex_lock(&tas_priv->codec_lock);
regcache_cache_only(tas_priv->regmap, false);
ret = regcache_sync(tas_priv->regmap);
if (ret) {
dev_err(tas_priv->dev,
"Failed to restore register cache: %d\n", ret);
goto out;
}
tasdevice_prmg_load(tas_priv, tas_priv->cur_prog);
/* If calibrated data occurs error, dsp will still works with default
* calibrated data inside algo.
*/
if (tas_priv->cali_data.total_sz > calib_data_sz)
tas2781_apply_calib(tas_priv);
out:
mutex_unlock(&tas_priv->codec_lock);
return ret;
}
static int tas2781_system_suspend(struct device *dev)
{
struct tasdevice_priv *tas_priv = dev_get_drvdata(dev);
int ret;
dev_dbg(tas_priv->dev, "System Suspend\n");
ret = pm_runtime_force_suspend(dev);
if (ret)
return ret;
/* Shutdown chip before system suspend */
regcache_cache_only(tas_priv->regmap, false);
tasdevice_tuning_switch(tas_priv, 1);
regcache_cache_only(tas_priv->regmap, true);
regcache_mark_dirty(tas_priv->regmap);
/*
* Reset GPIO may be shared, so cannot reset here.
* However beyond this point, amps may be powered down.
*/
return 0;
}
static int tas2781_system_resume(struct device *dev)
{
struct tasdevice_priv *tas_priv = dev_get_drvdata(dev);
unsigned long calib_data_sz =
tas_priv->ndev * TASDEVICE_SPEAKER_CALIBRATION_SIZE;
int i, ret;
dev_dbg(tas_priv->dev, "System Resume\n");
ret = pm_runtime_force_resume(dev);
if (ret)
return ret;
mutex_lock(&tas_priv->codec_lock);
for (i = 0; i < tas_priv->ndev; i++) {
tas_priv->tasdevice[i].cur_book = -1;
tas_priv->tasdevice[i].cur_prog = -1;
tas_priv->tasdevice[i].cur_conf = -1;
}
tas2781_reset(tas_priv);
tasdevice_prmg_load(tas_priv, tas_priv->cur_prog);
/* If calibrated data occurs error, dsp will still work with default
* calibrated data inside algo.
*/
if (tas_priv->cali_data.total_sz > calib_data_sz)
tas2781_apply_calib(tas_priv);
mutex_unlock(&tas_priv->codec_lock);
return 0;
}
static const struct dev_pm_ops tas2781_hda_pm_ops = {
RUNTIME_PM_OPS(tas2781_runtime_suspend, tas2781_runtime_resume, NULL)
SYSTEM_SLEEP_PM_OPS(tas2781_system_suspend, tas2781_system_resume)
};
static const struct i2c_device_id tas2781_hda_i2c_id[] = {
{ "tas2781-hda", 0 },
{}
};
static const struct acpi_device_id tas2781_acpi_hda_match[] = {
{"TIAS2781", 0 },
{}
};
MODULE_DEVICE_TABLE(acpi, tas2781_acpi_hda_match);
static struct i2c_driver tas2781_hda_i2c_driver = {
.driver = {
.name = "tas2781-hda",
.acpi_match_table = tas2781_acpi_hda_match,
.pm = &tas2781_hda_pm_ops,
},
.id_table = tas2781_hda_i2c_id,
.probe = tas2781_hda_i2c_probe,
.remove = tas2781_hda_i2c_remove,
};
module_i2c_driver(tas2781_hda_i2c_driver);
MODULE_DESCRIPTION("TAS2781 HDA Driver");
MODULE_AUTHOR("Shenghao Ding, TI, <[email protected]>");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(SND_SOC_TAS2781_FMWLIB);
| linux-master | sound/pci/hda/tas2781_hda_i2c.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* ALSA driver for Echoaudio soundcards.
* Copyright (C) 2003-2004 Giuliano Pochini <[email protected]>
*/
#define ECHOGALS_FAMILY
#define ECHOCARD_LAYLA20
#define ECHOCARD_NAME "Layla20"
#define ECHOCARD_HAS_MONITOR
#define ECHOCARD_HAS_ASIC
#define ECHOCARD_HAS_INPUT_GAIN
#define ECHOCARD_HAS_OUTPUT_NOMINAL_LEVEL
#define ECHOCARD_HAS_SUPER_INTERLEAVE
#define ECHOCARD_HAS_DIGITAL_IO
#define ECHOCARD_HAS_EXTERNAL_CLOCK
#define ECHOCARD_HAS_ADAT false
#define ECHOCARD_HAS_OUTPUT_CLOCK_SWITCH
#define ECHOCARD_HAS_MIDI
/* Pipe indexes */
#define PX_ANALOG_OUT 0 /* 10 */
#define PX_DIGITAL_OUT 10 /* 2 */
#define PX_ANALOG_IN 12 /* 8 */
#define PX_DIGITAL_IN 20 /* 2 */
#define PX_NUM 22
/* Bus indexes */
#define BX_ANALOG_OUT 0 /* 10 */
#define BX_DIGITAL_OUT 10 /* 2 */
#define BX_ANALOG_IN 12 /* 8 */
#define BX_DIGITAL_IN 20 /* 2 */
#define BX_NUM 22
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/pci.h>
#include <linux/module.h>
#include <linux/firmware.h>
#include <linux/slab.h>
#include <linux/io.h>
#include <sound/core.h>
#include <sound/info.h>
#include <sound/control.h>
#include <sound/tlv.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/asoundef.h>
#include <sound/initval.h>
#include <sound/rawmidi.h>
#include <linux/atomic.h>
#include "echoaudio.h"
MODULE_FIRMWARE("ea/layla20_dsp.fw");
MODULE_FIRMWARE("ea/layla20_asic.fw");
#define FW_LAYLA20_DSP 0
#define FW_LAYLA20_ASIC 1
static const struct firmware card_fw[] = {
{0, "layla20_dsp.fw"},
{0, "layla20_asic.fw"}
};
static const struct pci_device_id snd_echo_ids[] = {
{0x1057, 0x1801, 0xECC0, 0x0030, 0, 0, 0}, /* DSP 56301 Layla20 rev.0 */
{0x1057, 0x1801, 0xECC0, 0x0031, 0, 0, 0}, /* DSP 56301 Layla20 rev.1 */
{0,}
};
static const struct snd_pcm_hardware pcm_hardware_skel = {
.info = SNDRV_PCM_INFO_MMAP |
SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_MMAP_VALID |
SNDRV_PCM_INFO_PAUSE |
SNDRV_PCM_INFO_SYNC_START,
.formats = SNDRV_PCM_FMTBIT_U8 |
SNDRV_PCM_FMTBIT_S16_LE |
SNDRV_PCM_FMTBIT_S24_3LE |
SNDRV_PCM_FMTBIT_S32_LE |
SNDRV_PCM_FMTBIT_S32_BE,
.rates = SNDRV_PCM_RATE_8000_48000 | SNDRV_PCM_RATE_CONTINUOUS,
.rate_min = 8000,
.rate_max = 50000,
.channels_min = 1,
.channels_max = 10,
.buffer_bytes_max = 262144,
.period_bytes_min = 32,
.period_bytes_max = 131072,
.periods_min = 2,
.periods_max = 220,
/* One page (4k) contains 512 instructions. I don't know if the hw
supports lists longer than this. In this case periods_max=220 is a
safe limit to make sure the list never exceeds 512 instructions. */
};
#include "layla20_dsp.c"
#include "echoaudio_dsp.c"
#include "echoaudio.c"
#include "midi.c"
| linux-master | sound/pci/echoaudio/layla20.c |
/****************************************************************************
Copyright Echo Digital Audio Corporation (c) 1998 - 2004
All rights reserved
www.echoaudio.com
This file is part of Echo Digital Audio's generic driver library.
Echo Digital Audio's generic driver library is free software;
you can redistribute it and/or modify it under the terms of
the GNU General Public License as published by the Free Software
Foundation.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston,
MA 02111-1307, USA.
*************************************************************************
Translation from C++ and adaptation for use in ALSA-Driver
were made by Giuliano Pochini <[email protected]>
****************************************************************************/
static int write_control_reg(struct echoaudio *chip, u32 value, char force);
static int set_input_clock(struct echoaudio *chip, u16 clock);
static int set_professional_spdif(struct echoaudio *chip, char prof);
static int set_digital_mode(struct echoaudio *chip, u8 mode);
static int load_asic_generic(struct echoaudio *chip, u32 cmd, short asic);
static int check_asic_status(struct echoaudio *chip);
static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id)
{
int err;
if (snd_BUG_ON((subdevice_id & 0xfff0) != MONA))
return -ENODEV;
err = init_dsp_comm_page(chip);
if (err) {
dev_err(chip->card->dev,
"init_hw - could not initialize DSP comm page\n");
return err;
}
chip->device_id = device_id;
chip->subdevice_id = subdevice_id;
chip->bad_board = true;
chip->input_clock_types =
ECHO_CLOCK_BIT_INTERNAL | ECHO_CLOCK_BIT_SPDIF |
ECHO_CLOCK_BIT_WORD | ECHO_CLOCK_BIT_ADAT;
chip->digital_modes =
ECHOCAPS_HAS_DIGITAL_MODE_SPDIF_RCA |
ECHOCAPS_HAS_DIGITAL_MODE_SPDIF_OPTICAL |
ECHOCAPS_HAS_DIGITAL_MODE_ADAT;
/* Mona comes in both '301 and '361 flavors */
if (chip->device_id == DEVICE_ID_56361)
chip->dsp_code_to_load = FW_MONA_361_DSP;
else
chip->dsp_code_to_load = FW_MONA_301_DSP;
err = load_firmware(chip);
if (err < 0)
return err;
chip->bad_board = false;
return err;
}
static int set_mixer_defaults(struct echoaudio *chip)
{
chip->digital_mode = DIGITAL_MODE_SPDIF_RCA;
chip->professional_spdif = false;
chip->digital_in_automute = true;
return init_line_levels(chip);
}
static u32 detect_input_clocks(const struct echoaudio *chip)
{
u32 clocks_from_dsp, clock_bits;
/* Map the DSP clock detect bits to the generic driver clock
detect bits */
clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks);
clock_bits = ECHO_CLOCK_BIT_INTERNAL;
if (clocks_from_dsp & GML_CLOCK_DETECT_BIT_SPDIF)
clock_bits |= ECHO_CLOCK_BIT_SPDIF;
if (clocks_from_dsp & GML_CLOCK_DETECT_BIT_ADAT)
clock_bits |= ECHO_CLOCK_BIT_ADAT;
if (clocks_from_dsp & GML_CLOCK_DETECT_BIT_WORD)
clock_bits |= ECHO_CLOCK_BIT_WORD;
return clock_bits;
}
/* Mona has an ASIC on the PCI card and another ASIC in the external box;
both need to be loaded. */
static int load_asic(struct echoaudio *chip)
{
u32 control_reg;
int err;
short asic;
if (chip->asic_loaded)
return 0;
mdelay(10);
if (chip->device_id == DEVICE_ID_56361)
asic = FW_MONA_361_1_ASIC48;
else
asic = FW_MONA_301_1_ASIC48;
err = load_asic_generic(chip, DSP_FNC_LOAD_MONA_PCI_CARD_ASIC, asic);
if (err < 0)
return err;
chip->asic_code = asic;
mdelay(10);
/* Do the external one */
err = load_asic_generic(chip, DSP_FNC_LOAD_MONA_EXTERNAL_ASIC,
FW_MONA_2_ASIC);
if (err < 0)
return err;
mdelay(10);
err = check_asic_status(chip);
/* Set up the control register if the load succeeded -
48 kHz, internal clock, S/PDIF RCA mode */
if (!err) {
control_reg = GML_CONVERTER_ENABLE | GML_48KHZ;
err = write_control_reg(chip, control_reg, true);
}
return err;
}
/* Depending on what digital mode you want, Mona needs different ASICs
loaded. This function checks the ASIC needed for the new mode and sees
if it matches the one already loaded. */
static int switch_asic(struct echoaudio *chip, char double_speed)
{
int err;
short asic;
/* Check the clock detect bits to see if this is
a single-speed clock or a double-speed clock; load
a new ASIC if necessary. */
if (chip->device_id == DEVICE_ID_56361) {
if (double_speed)
asic = FW_MONA_361_1_ASIC96;
else
asic = FW_MONA_361_1_ASIC48;
} else {
if (double_speed)
asic = FW_MONA_301_1_ASIC96;
else
asic = FW_MONA_301_1_ASIC48;
}
if (asic != chip->asic_code) {
/* Load the desired ASIC */
err = load_asic_generic(chip, DSP_FNC_LOAD_MONA_PCI_CARD_ASIC,
asic);
if (err < 0)
return err;
chip->asic_code = asic;
}
return 0;
}
static int set_sample_rate(struct echoaudio *chip, u32 rate)
{
u32 control_reg, clock;
short asic;
char force_write;
/* Only set the clock for internal mode. */
if (chip->input_clock != ECHO_CLOCK_INTERNAL) {
dev_dbg(chip->card->dev,
"Cannot set sample rate - clock not set to CLK_CLOCKININTERNAL\n");
/* Save the rate anyhow */
chip->comm_page->sample_rate = cpu_to_le32(rate);
chip->sample_rate = rate;
return 0;
}
/* Now, check to see if the required ASIC is loaded */
if (rate >= 88200) {
if (chip->digital_mode == DIGITAL_MODE_ADAT)
return -EINVAL;
if (chip->device_id == DEVICE_ID_56361)
asic = FW_MONA_361_1_ASIC96;
else
asic = FW_MONA_301_1_ASIC96;
} else {
if (chip->device_id == DEVICE_ID_56361)
asic = FW_MONA_361_1_ASIC48;
else
asic = FW_MONA_301_1_ASIC48;
}
force_write = 0;
if (asic != chip->asic_code) {
int err;
/* Load the desired ASIC (load_asic_generic() can sleep) */
spin_unlock_irq(&chip->lock);
err = load_asic_generic(chip, DSP_FNC_LOAD_MONA_PCI_CARD_ASIC,
asic);
spin_lock_irq(&chip->lock);
if (err < 0)
return err;
chip->asic_code = asic;
force_write = 1;
}
/* Compute the new control register value */
clock = 0;
control_reg = le32_to_cpu(chip->comm_page->control_register);
control_reg &= GML_CLOCK_CLEAR_MASK;
control_reg &= GML_SPDIF_RATE_CLEAR_MASK;
switch (rate) {
case 96000:
clock = GML_96KHZ;
break;
case 88200:
clock = GML_88KHZ;
break;
case 48000:
clock = GML_48KHZ | GML_SPDIF_SAMPLE_RATE1;
break;
case 44100:
clock = GML_44KHZ;
/* Professional mode */
if (control_reg & GML_SPDIF_PRO_MODE)
clock |= GML_SPDIF_SAMPLE_RATE0;
break;
case 32000:
clock = GML_32KHZ | GML_SPDIF_SAMPLE_RATE0 |
GML_SPDIF_SAMPLE_RATE1;
break;
case 22050:
clock = GML_22KHZ;
break;
case 16000:
clock = GML_16KHZ;
break;
case 11025:
clock = GML_11KHZ;
break;
case 8000:
clock = GML_8KHZ;
break;
default:
dev_err(chip->card->dev,
"set_sample_rate: %d invalid!\n", rate);
return -EINVAL;
}
control_reg |= clock;
chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP */
chip->sample_rate = rate;
dev_dbg(chip->card->dev,
"set_sample_rate: %d clock %d\n", rate, clock);
return write_control_reg(chip, control_reg, force_write);
}
static int set_input_clock(struct echoaudio *chip, u16 clock)
{
u32 control_reg, clocks_from_dsp;
int err;
/* Mask off the clock select bits */
control_reg = le32_to_cpu(chip->comm_page->control_register) &
GML_CLOCK_CLEAR_MASK;
clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks);
switch (clock) {
case ECHO_CLOCK_INTERNAL:
chip->input_clock = ECHO_CLOCK_INTERNAL;
return set_sample_rate(chip, chip->sample_rate);
case ECHO_CLOCK_SPDIF:
if (chip->digital_mode == DIGITAL_MODE_ADAT)
return -EAGAIN;
spin_unlock_irq(&chip->lock);
err = switch_asic(chip, clocks_from_dsp &
GML_CLOCK_DETECT_BIT_SPDIF96);
spin_lock_irq(&chip->lock);
if (err < 0)
return err;
control_reg |= GML_SPDIF_CLOCK;
if (clocks_from_dsp & GML_CLOCK_DETECT_BIT_SPDIF96)
control_reg |= GML_DOUBLE_SPEED_MODE;
else
control_reg &= ~GML_DOUBLE_SPEED_MODE;
break;
case ECHO_CLOCK_WORD:
spin_unlock_irq(&chip->lock);
err = switch_asic(chip, clocks_from_dsp &
GML_CLOCK_DETECT_BIT_WORD96);
spin_lock_irq(&chip->lock);
if (err < 0)
return err;
control_reg |= GML_WORD_CLOCK;
if (clocks_from_dsp & GML_CLOCK_DETECT_BIT_WORD96)
control_reg |= GML_DOUBLE_SPEED_MODE;
else
control_reg &= ~GML_DOUBLE_SPEED_MODE;
break;
case ECHO_CLOCK_ADAT:
dev_dbg(chip->card->dev, "Set Mona clock to ADAT\n");
if (chip->digital_mode != DIGITAL_MODE_ADAT)
return -EAGAIN;
control_reg |= GML_ADAT_CLOCK;
control_reg &= ~GML_DOUBLE_SPEED_MODE;
break;
default:
dev_err(chip->card->dev,
"Input clock 0x%x not supported for Mona\n", clock);
return -EINVAL;
}
chip->input_clock = clock;
return write_control_reg(chip, control_reg, true);
}
static int dsp_set_digital_mode(struct echoaudio *chip, u8 mode)
{
u32 control_reg;
int err, incompatible_clock;
/* Set clock to "internal" if it's not compatible with the new mode */
incompatible_clock = false;
switch (mode) {
case DIGITAL_MODE_SPDIF_OPTICAL:
case DIGITAL_MODE_SPDIF_RCA:
if (chip->input_clock == ECHO_CLOCK_ADAT)
incompatible_clock = true;
break;
case DIGITAL_MODE_ADAT:
if (chip->input_clock == ECHO_CLOCK_SPDIF)
incompatible_clock = true;
break;
default:
dev_err(chip->card->dev,
"Digital mode not supported: %d\n", mode);
return -EINVAL;
}
spin_lock_irq(&chip->lock);
if (incompatible_clock) { /* Switch to 48KHz, internal */
chip->sample_rate = 48000;
set_input_clock(chip, ECHO_CLOCK_INTERNAL);
}
/* Clear the current digital mode */
control_reg = le32_to_cpu(chip->comm_page->control_register);
control_reg &= GML_DIGITAL_MODE_CLEAR_MASK;
/* Tweak the control reg */
switch (mode) {
case DIGITAL_MODE_SPDIF_OPTICAL:
control_reg |= GML_SPDIF_OPTICAL_MODE;
break;
case DIGITAL_MODE_SPDIF_RCA:
/* GML_SPDIF_OPTICAL_MODE bit cleared */
break;
case DIGITAL_MODE_ADAT:
/* If the current ASIC is the 96KHz ASIC, switch the ASIC
and set to 48 KHz */
if (chip->asic_code == FW_MONA_361_1_ASIC96 ||
chip->asic_code == FW_MONA_301_1_ASIC96) {
set_sample_rate(chip, 48000);
}
control_reg |= GML_ADAT_MODE;
control_reg &= ~GML_DOUBLE_SPEED_MODE;
break;
}
err = write_control_reg(chip, control_reg, false);
spin_unlock_irq(&chip->lock);
if (err < 0)
return err;
chip->digital_mode = mode;
dev_dbg(chip->card->dev, "set_digital_mode to %d\n", mode);
return incompatible_clock;
}
| linux-master | sound/pci/echoaudio/mona_dsp.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* ALSA driver for Echoaudio soundcards.
* Copyright (C) 2009 Giuliano Pochini <[email protected]>
*/
#define INDIGO_FAMILY
#define ECHOCARD_INDIGO_IOX
#define ECHOCARD_NAME "Indigo IOx"
#define ECHOCARD_HAS_MONITOR
#define ECHOCARD_HAS_SUPER_INTERLEAVE
#define ECHOCARD_HAS_VMIXER
#define ECHOCARD_HAS_STEREO_BIG_ENDIAN32
/* Pipe indexes */
#define PX_ANALOG_OUT 0 /* 8 */
#define PX_DIGITAL_OUT 8 /* 0 */
#define PX_ANALOG_IN 8 /* 2 */
#define PX_DIGITAL_IN 10 /* 0 */
#define PX_NUM 10
/* Bus indexes */
#define BX_ANALOG_OUT 0 /* 2 */
#define BX_DIGITAL_OUT 2 /* 0 */
#define BX_ANALOG_IN 2 /* 2 */
#define BX_DIGITAL_IN 4 /* 0 */
#define BX_NUM 4
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/pci.h>
#include <linux/module.h>
#include <linux/firmware.h>
#include <linux/io.h>
#include <linux/slab.h>
#include <sound/core.h>
#include <sound/info.h>
#include <sound/control.h>
#include <sound/tlv.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/asoundef.h>
#include <sound/initval.h>
#include <linux/atomic.h>
#include "echoaudio.h"
MODULE_FIRMWARE("ea/loader_dsp.fw");
MODULE_FIRMWARE("ea/indigo_iox_dsp.fw");
#define FW_361_LOADER 0
#define FW_INDIGO_IOX_DSP 1
static const struct firmware card_fw[] = {
{0, "loader_dsp.fw"},
{0, "indigo_iox_dsp.fw"}
};
static const struct pci_device_id snd_echo_ids[] = {
{0x1057, 0x3410, 0xECC0, 0x00D0, 0, 0, 0}, /* Indigo IOx */
{0,}
};
static const struct snd_pcm_hardware pcm_hardware_skel = {
.info = SNDRV_PCM_INFO_MMAP |
SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_MMAP_VALID |
SNDRV_PCM_INFO_PAUSE |
SNDRV_PCM_INFO_SYNC_START,
.formats = SNDRV_PCM_FMTBIT_U8 |
SNDRV_PCM_FMTBIT_S16_LE |
SNDRV_PCM_FMTBIT_S24_3LE |
SNDRV_PCM_FMTBIT_S32_LE |
SNDRV_PCM_FMTBIT_S32_BE,
.rates = SNDRV_PCM_RATE_32000 |
SNDRV_PCM_RATE_44100 |
SNDRV_PCM_RATE_48000 |
SNDRV_PCM_RATE_64000 |
SNDRV_PCM_RATE_88200 |
SNDRV_PCM_RATE_96000,
.rate_min = 32000,
.rate_max = 96000,
.channels_min = 1,
.channels_max = 8,
.buffer_bytes_max = 262144,
.period_bytes_min = 32,
.period_bytes_max = 131072,
.periods_min = 2,
.periods_max = 220,
};
#include "indigoiox_dsp.c"
#include "indigo_express_dsp.c"
#include "echoaudio_dsp.c"
#include "echoaudio.c"
| linux-master | sound/pci/echoaudio/indigoiox.c |
/****************************************************************************
Copyright Echo Digital Audio Corporation (c) 1998 - 2004
All rights reserved
www.echoaudio.com
This file is part of Echo Digital Audio's generic driver library.
Echo Digital Audio's generic driver library is free software;
you can redistribute it and/or modify it under the terms of
the GNU General Public License as published by the Free Software
Foundation.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston,
MA 02111-1307, USA.
*************************************************************************
Translation from C++ and adaptation for use in ALSA-Driver
were made by Giuliano Pochini <[email protected]>
****************************************************************************/
static int set_vmixer_gain(struct echoaudio *chip, u16 output, u16 pipe,
int gain);
static int update_vmixer_level(struct echoaudio *chip);
static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id)
{
int err;
if (snd_BUG_ON((subdevice_id & 0xfff0) != INDIGO_IO))
return -ENODEV;
err = init_dsp_comm_page(chip);
if (err) {
dev_err(chip->card->dev,
"init_hw - could not initialize DSP comm page\n");
return err;
}
chip->device_id = device_id;
chip->subdevice_id = subdevice_id;
chip->bad_board = true;
chip->dsp_code_to_load = FW_INDIGO_IO_DSP;
/* Since this card has no ASIC, mark it as loaded so everything
works OK */
chip->asic_loaded = true;
chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL;
err = load_firmware(chip);
if (err < 0)
return err;
chip->bad_board = false;
return err;
}
static int set_mixer_defaults(struct echoaudio *chip)
{
return init_line_levels(chip);
}
static u32 detect_input_clocks(const struct echoaudio *chip)
{
return ECHO_CLOCK_BIT_INTERNAL;
}
/* The IndigoIO has no ASIC. Just do nothing */
static int load_asic(struct echoaudio *chip)
{
return 0;
}
static int set_sample_rate(struct echoaudio *chip, u32 rate)
{
if (wait_handshake(chip))
return -EIO;
chip->sample_rate = rate;
chip->comm_page->sample_rate = cpu_to_le32(rate);
clear_handshake(chip);
return send_vector(chip, DSP_VC_UPDATE_CLOCKS);
}
/* This function routes the sound from a virtual channel to a real output */
static int set_vmixer_gain(struct echoaudio *chip, u16 output, u16 pipe,
int gain)
{
int index;
if (snd_BUG_ON(pipe >= num_pipes_out(chip) ||
output >= num_busses_out(chip)))
return -EINVAL;
if (wait_handshake(chip))
return -EIO;
chip->vmixer_gain[output][pipe] = gain;
index = output * num_pipes_out(chip) + pipe;
chip->comm_page->vmixer[index] = gain;
dev_dbg(chip->card->dev,
"set_vmixer_gain: pipe %d, out %d = %d\n", pipe, output, gain);
return 0;
}
/* Tell the DSP to read and update virtual mixer levels in comm page. */
static int update_vmixer_level(struct echoaudio *chip)
{
if (wait_handshake(chip))
return -EIO;
clear_handshake(chip);
return send_vector(chip, DSP_VC_SET_VMIXER_GAIN);
}
| linux-master | sound/pci/echoaudio/indigoio_dsp.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* ALSA driver for Echoaudio soundcards.
* Copyright (C) 2003-2004 Giuliano Pochini <[email protected]>
*/
#define ECHO24_FAMILY
#define ECHOCARD_LAYLA24
#define ECHOCARD_NAME "Layla24"
#define ECHOCARD_HAS_MONITOR
#define ECHOCARD_HAS_ASIC
#define ECHOCARD_HAS_INPUT_NOMINAL_LEVEL
#define ECHOCARD_HAS_OUTPUT_NOMINAL_LEVEL
#define ECHOCARD_HAS_SUPER_INTERLEAVE
#define ECHOCARD_HAS_DIGITAL_IO
#define ECHOCARD_HAS_DIGITAL_IN_AUTOMUTE
#define ECHOCARD_HAS_DIGITAL_MODE_SWITCH
#define ECHOCARD_HAS_EXTERNAL_CLOCK
#define ECHOCARD_HAS_ADAT 6
#define ECHOCARD_HAS_STEREO_BIG_ENDIAN32
#define ECHOCARD_HAS_MIDI
/* Pipe indexes */
#define PX_ANALOG_OUT 0 /* 8 */
#define PX_DIGITAL_OUT 8 /* 8 */
#define PX_ANALOG_IN 16 /* 8 */
#define PX_DIGITAL_IN 24 /* 8 */
#define PX_NUM 32
/* Bus indexes */
#define BX_ANALOG_OUT 0 /* 8 */
#define BX_DIGITAL_OUT 8 /* 8 */
#define BX_ANALOG_IN 16 /* 8 */
#define BX_DIGITAL_IN 24 /* 8 */
#define BX_NUM 32
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/pci.h>
#include <linux/module.h>
#include <linux/firmware.h>
#include <linux/slab.h>
#include <linux/io.h>
#include <sound/core.h>
#include <sound/info.h>
#include <sound/control.h>
#include <sound/tlv.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/asoundef.h>
#include <sound/initval.h>
#include <sound/rawmidi.h>
#include <linux/atomic.h>
#include "echoaudio.h"
MODULE_FIRMWARE("ea/loader_dsp.fw");
MODULE_FIRMWARE("ea/layla24_dsp.fw");
MODULE_FIRMWARE("ea/layla24_1_asic.fw");
MODULE_FIRMWARE("ea/layla24_2A_asic.fw");
MODULE_FIRMWARE("ea/layla24_2S_asic.fw");
#define FW_361_LOADER 0
#define FW_LAYLA24_DSP 1
#define FW_LAYLA24_1_ASIC 2
#define FW_LAYLA24_2A_ASIC 3
#define FW_LAYLA24_2S_ASIC 4
static const struct firmware card_fw[] = {
{0, "loader_dsp.fw"},
{0, "layla24_dsp.fw"},
{0, "layla24_1_asic.fw"},
{0, "layla24_2A_asic.fw"},
{0, "layla24_2S_asic.fw"}
};
static const struct pci_device_id snd_echo_ids[] = {
{0x1057, 0x3410, 0xECC0, 0x0060, 0, 0, 0}, /* DSP 56361 Layla24 rev.0 */
{0,}
};
static const struct snd_pcm_hardware pcm_hardware_skel = {
.info = SNDRV_PCM_INFO_MMAP |
SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_MMAP_VALID |
SNDRV_PCM_INFO_PAUSE |
SNDRV_PCM_INFO_SYNC_START,
.formats = SNDRV_PCM_FMTBIT_U8 |
SNDRV_PCM_FMTBIT_S16_LE |
SNDRV_PCM_FMTBIT_S24_3LE |
SNDRV_PCM_FMTBIT_S32_LE |
SNDRV_PCM_FMTBIT_S32_BE,
.rates = SNDRV_PCM_RATE_8000_96000,
.rate_min = 8000,
.rate_max = 100000,
.channels_min = 1,
.channels_max = 8,
.buffer_bytes_max = 262144,
.period_bytes_min = 32,
.period_bytes_max = 131072,
.periods_min = 2,
.periods_max = 220,
/* One page (4k) contains 512 instructions. I don't know if the hw
supports lists longer than this. In this case periods_max=220 is a
safe limit to make sure the list never exceeds 512 instructions. */
};
#include "layla24_dsp.c"
#include "echoaudio_dsp.c"
#include "echoaudio_gml.c"
#include "echoaudio.c"
#include "midi.c"
| linux-master | sound/pci/echoaudio/layla24.c |
/************************************************************************
This file is part of Echo Digital Audio's generic driver library.
Copyright Echo Digital Audio Corporation (c) 1998 - 2005
All rights reserved
www.echoaudio.com
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*************************************************************************
Translation from C++ and adaptation for use in ALSA-Driver
were made by Giuliano Pochini <[email protected]>
*************************************************************************/
static int set_sample_rate(struct echoaudio *chip, u32 rate)
{
u32 clock, control_reg, old_control_reg;
if (wait_handshake(chip))
return -EIO;
old_control_reg = le32_to_cpu(chip->comm_page->control_register);
control_reg = old_control_reg & ~INDIGO_EXPRESS_CLOCK_MASK;
switch (rate) {
case 32000:
clock = INDIGO_EXPRESS_32000;
break;
case 44100:
clock = INDIGO_EXPRESS_44100;
break;
case 48000:
clock = INDIGO_EXPRESS_48000;
break;
case 64000:
clock = INDIGO_EXPRESS_32000|INDIGO_EXPRESS_DOUBLE_SPEED;
break;
case 88200:
clock = INDIGO_EXPRESS_44100|INDIGO_EXPRESS_DOUBLE_SPEED;
break;
case 96000:
clock = INDIGO_EXPRESS_48000|INDIGO_EXPRESS_DOUBLE_SPEED;
break;
default:
return -EINVAL;
}
control_reg |= clock;
if (control_reg != old_control_reg) {
dev_dbg(chip->card->dev,
"set_sample_rate: %d clock %d\n", rate, clock);
chip->comm_page->control_register = cpu_to_le32(control_reg);
chip->sample_rate = rate;
clear_handshake(chip);
return send_vector(chip, DSP_VC_UPDATE_CLOCKS);
}
return 0;
}
/* This function routes the sound from a virtual channel to a real output */
static int set_vmixer_gain(struct echoaudio *chip, u16 output, u16 pipe,
int gain)
{
int index;
if (snd_BUG_ON(pipe >= num_pipes_out(chip) ||
output >= num_busses_out(chip)))
return -EINVAL;
if (wait_handshake(chip))
return -EIO;
chip->vmixer_gain[output][pipe] = gain;
index = output * num_pipes_out(chip) + pipe;
chip->comm_page->vmixer[index] = gain;
dev_dbg(chip->card->dev,
"set_vmixer_gain: pipe %d, out %d = %d\n", pipe, output, gain);
return 0;
}
/* Tell the DSP to read and update virtual mixer levels in comm page. */
static int update_vmixer_level(struct echoaudio *chip)
{
if (wait_handshake(chip))
return -EIO;
clear_handshake(chip);
return send_vector(chip, DSP_VC_SET_VMIXER_GAIN);
}
static u32 detect_input_clocks(const struct echoaudio *chip)
{
return ECHO_CLOCK_BIT_INTERNAL;
}
/* The IndigoIO has no ASIC. Just do nothing */
static int load_asic(struct echoaudio *chip)
{
return 0;
}
| linux-master | sound/pci/echoaudio/indigo_express_dsp.c |
/****************************************************************************
Copyright Echo Digital Audio Corporation (c) 1998 - 2004
All rights reserved
www.echoaudio.com
This file is part of Echo Digital Audio's generic driver library.
Echo Digital Audio's generic driver library is free software;
you can redistribute it and/or modify it under the terms of
the GNU General Public License as published by the Free Software
Foundation.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston,
MA 02111-1307, USA.
*************************************************************************
Translation from C++ and adaptation for use in ALSA-Driver
were made by Giuliano Pochini <[email protected]>
****************************************************************************/
static int read_dsp(struct echoaudio *chip, u32 *data);
static int set_professional_spdif(struct echoaudio *chip, char prof);
static int load_asic_generic(struct echoaudio *chip, u32 cmd, short asic);
static int check_asic_status(struct echoaudio *chip);
static int update_flags(struct echoaudio *chip);
static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id)
{
int err;
if (snd_BUG_ON((subdevice_id & 0xfff0) != LAYLA20))
return -ENODEV;
err = init_dsp_comm_page(chip);
if (err) {
dev_err(chip->card->dev,
"init_hw - could not initialize DSP comm page\n");
return err;
}
chip->device_id = device_id;
chip->subdevice_id = subdevice_id;
chip->bad_board = true;
chip->has_midi = true;
chip->dsp_code_to_load = FW_LAYLA20_DSP;
chip->input_clock_types =
ECHO_CLOCK_BIT_INTERNAL | ECHO_CLOCK_BIT_SPDIF |
ECHO_CLOCK_BIT_WORD | ECHO_CLOCK_BIT_SUPER;
chip->output_clock_types =
ECHO_CLOCK_BIT_WORD | ECHO_CLOCK_BIT_SUPER;
err = load_firmware(chip);
if (err < 0)
return err;
chip->bad_board = false;
return err;
}
static int set_mixer_defaults(struct echoaudio *chip)
{
chip->professional_spdif = false;
return init_line_levels(chip);
}
static u32 detect_input_clocks(const struct echoaudio *chip)
{
u32 clocks_from_dsp, clock_bits;
/* Map the DSP clock detect bits to the generic driver clock detect bits */
clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks);
clock_bits = ECHO_CLOCK_BIT_INTERNAL;
if (clocks_from_dsp & GLDM_CLOCK_DETECT_BIT_SPDIF)
clock_bits |= ECHO_CLOCK_BIT_SPDIF;
if (clocks_from_dsp & GLDM_CLOCK_DETECT_BIT_WORD) {
if (clocks_from_dsp & GLDM_CLOCK_DETECT_BIT_SUPER)
clock_bits |= ECHO_CLOCK_BIT_SUPER;
else
clock_bits |= ECHO_CLOCK_BIT_WORD;
}
return clock_bits;
}
/* ASIC status check - some cards have one or two ASICs that need to be
loaded. Once that load is complete, this function is called to see if
the load was successful.
If this load fails, it does not necessarily mean that the hardware is
defective - the external box may be disconnected or turned off.
This routine sometimes fails for Layla20; for Layla20, the loop runs
5 times and succeeds if it wins on three of the loops. */
static int check_asic_status(struct echoaudio *chip)
{
u32 asic_status;
int goodcnt, i;
chip->asic_loaded = false;
for (i = goodcnt = 0; i < 5; i++) {
send_vector(chip, DSP_VC_TEST_ASIC);
/* The DSP will return a value to indicate whether or not
the ASIC is currently loaded */
if (read_dsp(chip, &asic_status) < 0) {
dev_err(chip->card->dev,
"check_asic_status: failed on read_dsp\n");
return -EIO;
}
if (asic_status == ASIC_ALREADY_LOADED) {
if (++goodcnt == 3) {
chip->asic_loaded = true;
return 0;
}
}
}
return -EIO;
}
/* Layla20 has an ASIC in the external box */
static int load_asic(struct echoaudio *chip)
{
int err;
if (chip->asic_loaded)
return 0;
err = load_asic_generic(chip, DSP_FNC_LOAD_LAYLA_ASIC,
FW_LAYLA20_ASIC);
if (err < 0)
return err;
/* Check if ASIC is alive and well. */
return check_asic_status(chip);
}
static int set_sample_rate(struct echoaudio *chip, u32 rate)
{
if (snd_BUG_ON(rate < 8000 || rate > 50000))
return -EINVAL;
/* Only set the clock for internal mode. Do not return failure,
simply treat it as a non-event. */
if (chip->input_clock != ECHO_CLOCK_INTERNAL) {
dev_warn(chip->card->dev,
"Cannot set sample rate - clock not set to CLK_CLOCKININTERNAL\n");
chip->comm_page->sample_rate = cpu_to_le32(rate);
chip->sample_rate = rate;
return 0;
}
if (wait_handshake(chip))
return -EIO;
dev_dbg(chip->card->dev, "set_sample_rate(%d)\n", rate);
chip->sample_rate = rate;
chip->comm_page->sample_rate = cpu_to_le32(rate);
clear_handshake(chip);
return send_vector(chip, DSP_VC_SET_LAYLA_SAMPLE_RATE);
}
static int set_input_clock(struct echoaudio *chip, u16 clock_source)
{
u16 clock;
u32 rate;
rate = 0;
switch (clock_source) {
case ECHO_CLOCK_INTERNAL:
rate = chip->sample_rate;
clock = LAYLA20_CLOCK_INTERNAL;
break;
case ECHO_CLOCK_SPDIF:
clock = LAYLA20_CLOCK_SPDIF;
break;
case ECHO_CLOCK_WORD:
clock = LAYLA20_CLOCK_WORD;
break;
case ECHO_CLOCK_SUPER:
clock = LAYLA20_CLOCK_SUPER;
break;
default:
dev_err(chip->card->dev,
"Input clock 0x%x not supported for Layla24\n",
clock_source);
return -EINVAL;
}
chip->input_clock = clock_source;
chip->comm_page->input_clock = cpu_to_le16(clock);
clear_handshake(chip);
send_vector(chip, DSP_VC_UPDATE_CLOCKS);
if (rate)
set_sample_rate(chip, rate);
return 0;
}
static int set_output_clock(struct echoaudio *chip, u16 clock)
{
switch (clock) {
case ECHO_CLOCK_SUPER:
clock = LAYLA20_OUTPUT_CLOCK_SUPER;
break;
case ECHO_CLOCK_WORD:
clock = LAYLA20_OUTPUT_CLOCK_WORD;
break;
default:
dev_err(chip->card->dev, "set_output_clock wrong clock\n");
return -EINVAL;
}
if (wait_handshake(chip))
return -EIO;
chip->comm_page->output_clock = cpu_to_le16(clock);
chip->output_clock = clock;
clear_handshake(chip);
return send_vector(chip, DSP_VC_UPDATE_CLOCKS);
}
/* Set input bus gain (one unit is 0.5dB !) */
static int set_input_gain(struct echoaudio *chip, u16 input, int gain)
{
if (snd_BUG_ON(input >= num_busses_in(chip)))
return -EINVAL;
if (wait_handshake(chip))
return -EIO;
chip->input_gain[input] = gain;
gain += GL20_INPUT_GAIN_MAGIC_NUMBER;
chip->comm_page->line_in_level[input] = gain;
return 0;
}
/* Tell the DSP to reread the flags from the comm page */
static int update_flags(struct echoaudio *chip)
{
if (wait_handshake(chip))
return -EIO;
clear_handshake(chip);
return send_vector(chip, DSP_VC_UPDATE_FLAGS);
}
static int set_professional_spdif(struct echoaudio *chip, char prof)
{
if (prof)
chip->comm_page->flags |=
cpu_to_le32(DSP_FLAG_PROFESSIONAL_SPDIF);
else
chip->comm_page->flags &=
~cpu_to_le32(DSP_FLAG_PROFESSIONAL_SPDIF);
chip->professional_spdif = prof;
return update_flags(chip);
}
| linux-master | sound/pci/echoaudio/layla20_dsp.c |
/****************************************************************************
Copyright Echo Digital Audio Corporation (c) 1998 - 2004
All rights reserved
www.echoaudio.com
This file is part of Echo Digital Audio's generic driver library.
Echo Digital Audio's generic driver library is free software;
you can redistribute it and/or modify it under the terms of
the GNU General Public License as published by the Free Software Foundation.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston,
MA 02111-1307, USA.
*************************************************************************
Translation from C++ and adaptation for use in ALSA-Driver
were made by Giuliano Pochini <[email protected]>
****************************************************************************/
static int write_control_reg(struct echoaudio *chip, u32 value, char force);
static int set_input_clock(struct echoaudio *chip, u16 clock);
static int set_professional_spdif(struct echoaudio *chip, char prof);
static int set_digital_mode(struct echoaudio *chip, u8 mode);
static int load_asic_generic(struct echoaudio *chip, u32 cmd, short asic);
static int check_asic_status(struct echoaudio *chip);
static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id)
{
int err;
if (snd_BUG_ON((subdevice_id & 0xfff0) != LAYLA24))
return -ENODEV;
err = init_dsp_comm_page(chip);
if (err) {
dev_err(chip->card->dev,
"init_hw - could not initialize DSP comm page\n");
return err;
}
chip->device_id = device_id;
chip->subdevice_id = subdevice_id;
chip->bad_board = true;
chip->has_midi = true;
chip->dsp_code_to_load = FW_LAYLA24_DSP;
chip->input_clock_types =
ECHO_CLOCK_BIT_INTERNAL | ECHO_CLOCK_BIT_SPDIF |
ECHO_CLOCK_BIT_WORD | ECHO_CLOCK_BIT_ADAT;
chip->digital_modes =
ECHOCAPS_HAS_DIGITAL_MODE_SPDIF_RCA |
ECHOCAPS_HAS_DIGITAL_MODE_SPDIF_OPTICAL |
ECHOCAPS_HAS_DIGITAL_MODE_ADAT;
err = load_firmware(chip);
if (err < 0)
return err;
chip->bad_board = false;
err = init_line_levels(chip);
if (err < 0)
return err;
return err;
}
static int set_mixer_defaults(struct echoaudio *chip)
{
chip->digital_mode = DIGITAL_MODE_SPDIF_RCA;
chip->professional_spdif = false;
chip->digital_in_automute = true;
return init_line_levels(chip);
}
static u32 detect_input_clocks(const struct echoaudio *chip)
{
u32 clocks_from_dsp, clock_bits;
/* Map the DSP clock detect bits to the generic driver clock detect bits */
clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks);
clock_bits = ECHO_CLOCK_BIT_INTERNAL;
if (clocks_from_dsp & GML_CLOCK_DETECT_BIT_SPDIF)
clock_bits |= ECHO_CLOCK_BIT_SPDIF;
if (clocks_from_dsp & GML_CLOCK_DETECT_BIT_ADAT)
clock_bits |= ECHO_CLOCK_BIT_ADAT;
if (clocks_from_dsp & GML_CLOCK_DETECT_BIT_WORD)
clock_bits |= ECHO_CLOCK_BIT_WORD;
return clock_bits;
}
/* Layla24 has an ASIC on the PCI card and another ASIC in the external box;
both need to be loaded. */
static int load_asic(struct echoaudio *chip)
{
int err;
if (chip->asic_loaded)
return 1;
/* Give the DSP a few milliseconds to settle down */
mdelay(10);
/* Load the ASIC for the PCI card */
err = load_asic_generic(chip, DSP_FNC_LOAD_LAYLA24_PCI_CARD_ASIC,
FW_LAYLA24_1_ASIC);
if (err < 0)
return err;
chip->asic_code = FW_LAYLA24_2S_ASIC;
/* Now give the new ASIC a little time to set up */
mdelay(10);
/* Do the external one */
err = load_asic_generic(chip, DSP_FNC_LOAD_LAYLA24_EXTERNAL_ASIC,
FW_LAYLA24_2S_ASIC);
if (err < 0)
return err;
/* Now give the external ASIC a little time to set up */
mdelay(10);
/* See if it worked */
err = check_asic_status(chip);
/* Set up the control register if the load succeeded -
48 kHz, internal clock, S/PDIF RCA mode */
if (!err)
err = write_control_reg(chip, GML_CONVERTER_ENABLE | GML_48KHZ,
true);
return err;
}
static int set_sample_rate(struct echoaudio *chip, u32 rate)
{
u32 control_reg, clock, base_rate;
if (snd_BUG_ON(rate >= 50000 &&
chip->digital_mode == DIGITAL_MODE_ADAT))
return -EINVAL;
/* Only set the clock for internal mode. */
if (chip->input_clock != ECHO_CLOCK_INTERNAL) {
dev_warn(chip->card->dev,
"Cannot set sample rate - clock not set to CLK_CLOCKININTERNAL\n");
/* Save the rate anyhow */
chip->comm_page->sample_rate = cpu_to_le32(rate);
chip->sample_rate = rate;
return 0;
}
/* Get the control register & clear the appropriate bits */
control_reg = le32_to_cpu(chip->comm_page->control_register);
control_reg &= GML_CLOCK_CLEAR_MASK & GML_SPDIF_RATE_CLEAR_MASK;
clock = 0;
switch (rate) {
case 96000:
clock = GML_96KHZ;
break;
case 88200:
clock = GML_88KHZ;
break;
case 48000:
clock = GML_48KHZ | GML_SPDIF_SAMPLE_RATE1;
break;
case 44100:
clock = GML_44KHZ;
/* Professional mode */
if (control_reg & GML_SPDIF_PRO_MODE)
clock |= GML_SPDIF_SAMPLE_RATE0;
break;
case 32000:
clock = GML_32KHZ | GML_SPDIF_SAMPLE_RATE0 |
GML_SPDIF_SAMPLE_RATE1;
break;
case 22050:
clock = GML_22KHZ;
break;
case 16000:
clock = GML_16KHZ;
break;
case 11025:
clock = GML_11KHZ;
break;
case 8000:
clock = GML_8KHZ;
break;
default:
/* If this is a non-standard rate, then the driver needs to
use Layla24's special "continuous frequency" mode */
clock = LAYLA24_CONTINUOUS_CLOCK;
if (rate > 50000) {
base_rate = rate >> 1;
control_reg |= GML_DOUBLE_SPEED_MODE;
} else {
base_rate = rate;
}
if (base_rate < 25000)
base_rate = 25000;
if (wait_handshake(chip))
return -EIO;
chip->comm_page->sample_rate =
cpu_to_le32(LAYLA24_MAGIC_NUMBER / base_rate - 2);
clear_handshake(chip);
send_vector(chip, DSP_VC_SET_LAYLA24_FREQUENCY_REG);
}
control_reg |= clock;
chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP ? */
chip->sample_rate = rate;
dev_dbg(chip->card->dev,
"set_sample_rate: %d clock %d\n", rate, control_reg);
return write_control_reg(chip, control_reg, false);
}
static int set_input_clock(struct echoaudio *chip, u16 clock)
{
u32 control_reg, clocks_from_dsp;
/* Mask off the clock select bits */
control_reg = le32_to_cpu(chip->comm_page->control_register) &
GML_CLOCK_CLEAR_MASK;
clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks);
/* Pick the new clock */
switch (clock) {
case ECHO_CLOCK_INTERNAL:
chip->input_clock = ECHO_CLOCK_INTERNAL;
return set_sample_rate(chip, chip->sample_rate);
case ECHO_CLOCK_SPDIF:
if (chip->digital_mode == DIGITAL_MODE_ADAT)
return -EAGAIN;
control_reg |= GML_SPDIF_CLOCK;
/* Layla24 doesn't support 96KHz S/PDIF */
control_reg &= ~GML_DOUBLE_SPEED_MODE;
break;
case ECHO_CLOCK_WORD:
control_reg |= GML_WORD_CLOCK;
if (clocks_from_dsp & GML_CLOCK_DETECT_BIT_WORD96)
control_reg |= GML_DOUBLE_SPEED_MODE;
else
control_reg &= ~GML_DOUBLE_SPEED_MODE;
break;
case ECHO_CLOCK_ADAT:
if (chip->digital_mode != DIGITAL_MODE_ADAT)
return -EAGAIN;
control_reg |= GML_ADAT_CLOCK;
control_reg &= ~GML_DOUBLE_SPEED_MODE;
break;
default:
dev_err(chip->card->dev,
"Input clock 0x%x not supported for Layla24\n", clock);
return -EINVAL;
}
chip->input_clock = clock;
return write_control_reg(chip, control_reg, true);
}
/* Depending on what digital mode you want, Layla24 needs different ASICs
loaded. This function checks the ASIC needed for the new mode and sees
if it matches the one already loaded. */
static int switch_asic(struct echoaudio *chip, short asic)
{
s8 *monitors;
/* Check to see if this is already loaded */
if (asic != chip->asic_code) {
monitors = kmemdup(chip->comm_page->monitors,
MONITOR_ARRAY_SIZE, GFP_KERNEL);
if (! monitors)
return -ENOMEM;
memset(chip->comm_page->monitors, ECHOGAIN_MUTED,
MONITOR_ARRAY_SIZE);
/* Load the desired ASIC */
if (load_asic_generic(chip, DSP_FNC_LOAD_LAYLA24_EXTERNAL_ASIC,
asic) < 0) {
memcpy(chip->comm_page->monitors, monitors,
MONITOR_ARRAY_SIZE);
kfree(monitors);
return -EIO;
}
chip->asic_code = asic;
memcpy(chip->comm_page->monitors, monitors, MONITOR_ARRAY_SIZE);
kfree(monitors);
}
return 0;
}
static int dsp_set_digital_mode(struct echoaudio *chip, u8 mode)
{
u32 control_reg;
int err, incompatible_clock;
short asic;
/* Set clock to "internal" if it's not compatible with the new mode */
incompatible_clock = false;
switch (mode) {
case DIGITAL_MODE_SPDIF_OPTICAL:
case DIGITAL_MODE_SPDIF_RCA:
if (chip->input_clock == ECHO_CLOCK_ADAT)
incompatible_clock = true;
asic = FW_LAYLA24_2S_ASIC;
break;
case DIGITAL_MODE_ADAT:
if (chip->input_clock == ECHO_CLOCK_SPDIF)
incompatible_clock = true;
asic = FW_LAYLA24_2A_ASIC;
break;
default:
dev_err(chip->card->dev,
"Digital mode not supported: %d\n", mode);
return -EINVAL;
}
if (incompatible_clock) { /* Switch to 48KHz, internal */
chip->sample_rate = 48000;
spin_lock_irq(&chip->lock);
set_input_clock(chip, ECHO_CLOCK_INTERNAL);
spin_unlock_irq(&chip->lock);
}
/* switch_asic() can sleep */
if (switch_asic(chip, asic) < 0)
return -EIO;
spin_lock_irq(&chip->lock);
/* Tweak the control register */
control_reg = le32_to_cpu(chip->comm_page->control_register);
control_reg &= GML_DIGITAL_MODE_CLEAR_MASK;
switch (mode) {
case DIGITAL_MODE_SPDIF_OPTICAL:
control_reg |= GML_SPDIF_OPTICAL_MODE;
break;
case DIGITAL_MODE_SPDIF_RCA:
/* GML_SPDIF_OPTICAL_MODE bit cleared */
break;
case DIGITAL_MODE_ADAT:
control_reg |= GML_ADAT_MODE;
control_reg &= ~GML_DOUBLE_SPEED_MODE;
break;
}
err = write_control_reg(chip, control_reg, true);
spin_unlock_irq(&chip->lock);
if (err < 0)
return err;
chip->digital_mode = mode;
dev_dbg(chip->card->dev, "set_digital_mode to %d\n", mode);
return incompatible_clock;
}
| linux-master | sound/pci/echoaudio/layla24_dsp.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* ALSA driver for Echoaudio soundcards.
* Copyright (C) 2003-2004 Giuliano Pochini <[email protected]>
*/
#define ECHO3G_FAMILY
#define ECHOCARD_ECHO3G
#define ECHOCARD_NAME "Echo3G"
#define ECHOCARD_HAS_MONITOR
#define ECHOCARD_HAS_ASIC
#define ECHOCARD_HAS_INPUT_NOMINAL_LEVEL
#define ECHOCARD_HAS_OUTPUT_NOMINAL_LEVEL
#define ECHOCARD_HAS_SUPER_INTERLEAVE
#define ECHOCARD_HAS_DIGITAL_IO
#define ECHOCARD_HAS_DIGITAL_MODE_SWITCH
#define ECHOCARD_HAS_ADAT 6
#define ECHOCARD_HAS_EXTERNAL_CLOCK
#define ECHOCARD_HAS_STEREO_BIG_ENDIAN32
#define ECHOCARD_HAS_MIDI
#define ECHOCARD_HAS_PHANTOM_POWER
/* Pipe indexes */
#define PX_ANALOG_OUT 0
#define PX_DIGITAL_OUT chip->px_digital_out
#define PX_ANALOG_IN chip->px_analog_in
#define PX_DIGITAL_IN chip->px_digital_in
#define PX_NUM chip->px_num
/* Bus indexes */
#define BX_ANALOG_OUT 0
#define BX_DIGITAL_OUT chip->bx_digital_out
#define BX_ANALOG_IN chip->bx_analog_in
#define BX_DIGITAL_IN chip->bx_digital_in
#define BX_NUM chip->bx_num
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/pci.h>
#include <linux/module.h>
#include <linux/firmware.h>
#include <linux/slab.h>
#include <linux/io.h>
#include <sound/core.h>
#include <sound/info.h>
#include <sound/control.h>
#include <sound/tlv.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/asoundef.h>
#include <sound/initval.h>
#include <sound/rawmidi.h>
#include <linux/atomic.h>
#include "echoaudio.h"
MODULE_FIRMWARE("ea/loader_dsp.fw");
MODULE_FIRMWARE("ea/echo3g_dsp.fw");
MODULE_FIRMWARE("ea/3g_asic.fw");
#define FW_361_LOADER 0
#define FW_ECHO3G_DSP 1
#define FW_3G_ASIC 2
static const struct firmware card_fw[] = {
{0, "loader_dsp.fw"},
{0, "echo3g_dsp.fw"},
{0, "3g_asic.fw"}
};
static const struct pci_device_id snd_echo_ids[] = {
{0x1057, 0x3410, 0xECC0, 0x0100, 0, 0, 0}, /* Echo 3G */
{0,}
};
static const struct snd_pcm_hardware pcm_hardware_skel = {
.info = SNDRV_PCM_INFO_MMAP |
SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_MMAP_VALID |
SNDRV_PCM_INFO_PAUSE |
SNDRV_PCM_INFO_SYNC_START,
.formats = SNDRV_PCM_FMTBIT_U8 |
SNDRV_PCM_FMTBIT_S16_LE |
SNDRV_PCM_FMTBIT_S24_3LE |
SNDRV_PCM_FMTBIT_S32_LE |
SNDRV_PCM_FMTBIT_S32_BE,
.rates = SNDRV_PCM_RATE_32000 |
SNDRV_PCM_RATE_44100 |
SNDRV_PCM_RATE_48000 |
SNDRV_PCM_RATE_88200 |
SNDRV_PCM_RATE_96000 |
SNDRV_PCM_RATE_CONTINUOUS,
.rate_min = 32000,
.rate_max = 100000,
.channels_min = 1,
.channels_max = 8,
.buffer_bytes_max = 262144,
.period_bytes_min = 32,
.period_bytes_max = 131072,
.periods_min = 2,
.periods_max = 220,
};
#include "echo3g_dsp.c"
#include "echoaudio_dsp.c"
#include "echoaudio_3g.c"
#include "echoaudio.c"
#include "midi.c"
| linux-master | sound/pci/echoaudio/echo3g.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* ALSA driver for Echoaudio soundcards.
* Copyright (C) 2003-2004 Giuliano Pochini <[email protected]>
*/
#define ECHOGALS_FAMILY
#define ECHOCARD_GINA20
#define ECHOCARD_NAME "Gina20"
#define ECHOCARD_HAS_MONITOR
#define ECHOCARD_HAS_INPUT_GAIN
#define ECHOCARD_HAS_DIGITAL_IO
#define ECHOCARD_HAS_EXTERNAL_CLOCK
#define ECHOCARD_HAS_ADAT false
/* Pipe indexes */
#define PX_ANALOG_OUT 0 /* 8 */
#define PX_DIGITAL_OUT 8 /* 2 */
#define PX_ANALOG_IN 10 /* 2 */
#define PX_DIGITAL_IN 12 /* 2 */
#define PX_NUM 14
/* Bus indexes */
#define BX_ANALOG_OUT 0 /* 8 */
#define BX_DIGITAL_OUT 8 /* 2 */
#define BX_ANALOG_IN 10 /* 2 */
#define BX_DIGITAL_IN 12 /* 2 */
#define BX_NUM 14
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/pci.h>
#include <linux/module.h>
#include <linux/firmware.h>
#include <linux/slab.h>
#include <linux/io.h>
#include <sound/core.h>
#include <sound/info.h>
#include <sound/control.h>
#include <sound/tlv.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/asoundef.h>
#include <sound/initval.h>
#include <linux/atomic.h>
#include "echoaudio.h"
MODULE_FIRMWARE("ea/gina20_dsp.fw");
#define FW_GINA20_DSP 0
static const struct firmware card_fw[] = {
{0, "gina20_dsp.fw"}
};
static const struct pci_device_id snd_echo_ids[] = {
{0x1057, 0x1801, 0xECC0, 0x0020, 0, 0, 0}, /* DSP 56301 Gina20 rev.0 */
{0,}
};
static const struct snd_pcm_hardware pcm_hardware_skel = {
.info = SNDRV_PCM_INFO_MMAP |
SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_MMAP_VALID |
SNDRV_PCM_INFO_PAUSE |
SNDRV_PCM_INFO_SYNC_START,
.formats = SNDRV_PCM_FMTBIT_U8 |
SNDRV_PCM_FMTBIT_S16_LE |
SNDRV_PCM_FMTBIT_S24_3LE |
SNDRV_PCM_FMTBIT_S32_LE |
SNDRV_PCM_FMTBIT_S32_BE,
.rates = SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000,
.rate_min = 44100,
.rate_max = 48000,
.channels_min = 1,
.channels_max = 2,
.buffer_bytes_max = 262144,
.period_bytes_min = 32,
.period_bytes_max = 131072,
.periods_min = 2,
.periods_max = 220,
/* One page (4k) contains 512 instructions. I don't know if the hw
supports lists longer than this. In this case periods_max=220 is a
safe limit to make sure the list never exceeds 512 instructions. */
};
#include "gina20_dsp.c"
#include "echoaudio_dsp.c"
#include "echoaudio.c"
| linux-master | sound/pci/echoaudio/gina20.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* ALSA driver for Echoaudio soundcards.
* Copyright (C) 2003-2004 Giuliano Pochini <[email protected]>
*/
#define ECHO24_FAMILY
#define ECHOCARD_GINA24
#define ECHOCARD_NAME "Gina24"
#define ECHOCARD_HAS_MONITOR
#define ECHOCARD_HAS_ASIC
#define ECHOCARD_HAS_INPUT_NOMINAL_LEVEL
#define ECHOCARD_HAS_OUTPUT_NOMINAL_LEVEL
#define ECHOCARD_HAS_SUPER_INTERLEAVE
#define ECHOCARD_HAS_DIGITAL_IO
#define ECHOCARD_HAS_DIGITAL_IN_AUTOMUTE
#define ECHOCARD_HAS_DIGITAL_MODE_SWITCH
#define ECHOCARD_HAS_EXTERNAL_CLOCK
#define ECHOCARD_HAS_ADAT 6
#define ECHOCARD_HAS_STEREO_BIG_ENDIAN32
/* Pipe indexes */
#define PX_ANALOG_OUT 0 /* 8 */
#define PX_DIGITAL_OUT 8 /* 8 */
#define PX_ANALOG_IN 16 /* 2 */
#define PX_DIGITAL_IN 18 /* 8 */
#define PX_NUM 26
/* Bus indexes */
#define BX_ANALOG_OUT 0 /* 8 */
#define BX_DIGITAL_OUT 8 /* 8 */
#define BX_ANALOG_IN 16 /* 2 */
#define BX_DIGITAL_IN 18 /* 8 */
#define BX_NUM 26
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/pci.h>
#include <linux/module.h>
#include <linux/firmware.h>
#include <linux/slab.h>
#include <linux/io.h>
#include <sound/core.h>
#include <sound/info.h>
#include <sound/control.h>
#include <sound/tlv.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/asoundef.h>
#include <sound/initval.h>
#include <linux/atomic.h>
#include "echoaudio.h"
MODULE_FIRMWARE("ea/loader_dsp.fw");
MODULE_FIRMWARE("ea/gina24_301_dsp.fw");
MODULE_FIRMWARE("ea/gina24_361_dsp.fw");
MODULE_FIRMWARE("ea/gina24_301_asic.fw");
MODULE_FIRMWARE("ea/gina24_361_asic.fw");
#define FW_361_LOADER 0
#define FW_GINA24_301_DSP 1
#define FW_GINA24_361_DSP 2
#define FW_GINA24_301_ASIC 3
#define FW_GINA24_361_ASIC 4
static const struct firmware card_fw[] = {
{0, "loader_dsp.fw"},
{0, "gina24_301_dsp.fw"},
{0, "gina24_361_dsp.fw"},
{0, "gina24_301_asic.fw"},
{0, "gina24_361_asic.fw"}
};
static const struct pci_device_id snd_echo_ids[] = {
{0x1057, 0x1801, 0xECC0, 0x0050, 0, 0, 0}, /* DSP 56301 Gina24 rev.0 */
{0x1057, 0x1801, 0xECC0, 0x0051, 0, 0, 0}, /* DSP 56301 Gina24 rev.1 */
{0x1057, 0x3410, 0xECC0, 0x0050, 0, 0, 0}, /* DSP 56361 Gina24 rev.0 */
{0x1057, 0x3410, 0xECC0, 0x0051, 0, 0, 0}, /* DSP 56361 Gina24 rev.1 */
{0,}
};
static const struct snd_pcm_hardware pcm_hardware_skel = {
.info = SNDRV_PCM_INFO_MMAP |
SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_MMAP_VALID |
SNDRV_PCM_INFO_PAUSE |
SNDRV_PCM_INFO_SYNC_START,
.formats = SNDRV_PCM_FMTBIT_U8 |
SNDRV_PCM_FMTBIT_S16_LE |
SNDRV_PCM_FMTBIT_S24_3LE |
SNDRV_PCM_FMTBIT_S32_LE |
SNDRV_PCM_FMTBIT_S32_BE,
.rates = SNDRV_PCM_RATE_8000_48000 |
SNDRV_PCM_RATE_88200 |
SNDRV_PCM_RATE_96000,
.rate_min = 8000,
.rate_max = 96000,
.channels_min = 1,
.channels_max = 8,
.buffer_bytes_max = 262144,
.period_bytes_min = 32,
.period_bytes_max = 131072,
.periods_min = 2,
.periods_max = 220,
/* One page (4k) contains 512 instructions. I don't know if the hw
supports lists longer than this. In this case periods_max=220 is a
safe limit to make sure the list never exceeds 512 instructions.
220 ~= (512 - 1 - (BUFFER_BYTES_MAX / PAGE_SIZE)) / 2 */
};
#include "gina24_dsp.c"
#include "echoaudio_dsp.c"
#include "echoaudio_gml.c"
#include "echoaudio.c"
| linux-master | sound/pci/echoaudio/gina24.c |
/****************************************************************************
Copyright Echo Digital Audio Corporation (c) 1998 - 2004
All rights reserved
www.echoaudio.com
This file is part of Echo Digital Audio's generic driver library.
Echo Digital Audio's generic driver library is free software;
you can redistribute it and/or modify it under the terms of
the GNU General Public License as published by the Free Software
Foundation.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston,
MA 02111-1307, USA.
*************************************************************************
Translation from C++ and adaptation for use in ALSA-Driver
were made by Giuliano Pochini <[email protected]>
****************************************************************************/
static int set_vmixer_gain(struct echoaudio *chip, u16 output, u16 pipe,
int gain);
static int update_vmixer_level(struct echoaudio *chip);
static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id)
{
int err;
if (snd_BUG_ON((subdevice_id & 0xfff0) != INDIGO))
return -ENODEV;
err = init_dsp_comm_page(chip);
if (err) {
dev_err(chip->card->dev,
"init_hw - could not initialize DSP comm page\n");
return err;
}
chip->device_id = device_id;
chip->subdevice_id = subdevice_id;
chip->bad_board = true;
chip->dsp_code_to_load = FW_INDIGO_DSP;
/* Since this card has no ASIC, mark it as loaded so everything
works OK */
chip->asic_loaded = true;
chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL;
err = load_firmware(chip);
if (err < 0)
return err;
chip->bad_board = false;
return err;
}
static int set_mixer_defaults(struct echoaudio *chip)
{
return init_line_levels(chip);
}
static u32 detect_input_clocks(const struct echoaudio *chip)
{
return ECHO_CLOCK_BIT_INTERNAL;
}
/* The Indigo has no ASIC. Just do nothing */
static int load_asic(struct echoaudio *chip)
{
return 0;
}
static int set_sample_rate(struct echoaudio *chip, u32 rate)
{
u32 control_reg;
switch (rate) {
case 96000:
control_reg = MIA_96000;
break;
case 88200:
control_reg = MIA_88200;
break;
case 48000:
control_reg = MIA_48000;
break;
case 44100:
control_reg = MIA_44100;
break;
case 32000:
control_reg = MIA_32000;
break;
default:
dev_err(chip->card->dev,
"set_sample_rate: %d invalid!\n", rate);
return -EINVAL;
}
/* Set the control register if it has changed */
if (control_reg != le32_to_cpu(chip->comm_page->control_register)) {
if (wait_handshake(chip))
return -EIO;
chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP */
chip->comm_page->control_register = cpu_to_le32(control_reg);
chip->sample_rate = rate;
clear_handshake(chip);
return send_vector(chip, DSP_VC_UPDATE_CLOCKS);
}
return 0;
}
/* This function routes the sound from a virtual channel to a real output */
static int set_vmixer_gain(struct echoaudio *chip, u16 output, u16 pipe,
int gain)
{
int index;
if (snd_BUG_ON(pipe >= num_pipes_out(chip) ||
output >= num_busses_out(chip)))
return -EINVAL;
if (wait_handshake(chip))
return -EIO;
chip->vmixer_gain[output][pipe] = gain;
index = output * num_pipes_out(chip) + pipe;
chip->comm_page->vmixer[index] = gain;
dev_dbg(chip->card->dev,
"set_vmixer_gain: pipe %d, out %d = %d\n", pipe, output, gain);
return 0;
}
/* Tell the DSP to read and update virtual mixer levels in comm page. */
static int update_vmixer_level(struct echoaudio *chip)
{
if (wait_handshake(chip))
return -EIO;
clear_handshake(chip);
return send_vector(chip, DSP_VC_SET_VMIXER_GAIN);
}
| linux-master | sound/pci/echoaudio/indigo_dsp.c |
/****************************************************************************
Copyright Echo Digital Audio Corporation (c) 1998 - 2004
All rights reserved
www.echoaudio.com
This file is part of Echo Digital Audio's generic driver library.
Echo Digital Audio's generic driver library is free software;
you can redistribute it and/or modify it under the terms of
the GNU General Public License as published by the Free Software
Foundation.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston,
MA 02111-1307, USA.
*************************************************************************
Translation from C++ and adaptation for use in ALSA-Driver
were made by Giuliano Pochini <[email protected]>
****************************************************************************/
static int set_professional_spdif(struct echoaudio *chip, char prof);
static int update_flags(struct echoaudio *chip);
static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id)
{
int err;
if (snd_BUG_ON((subdevice_id & 0xfff0) != GINA20))
return -ENODEV;
err = init_dsp_comm_page(chip);
if (err) {
dev_err(chip->card->dev,
"init_hw - could not initialize DSP comm page\n");
return err;
}
chip->device_id = device_id;
chip->subdevice_id = subdevice_id;
chip->bad_board = true;
chip->dsp_code_to_load = FW_GINA20_DSP;
chip->spdif_status = GD_SPDIF_STATUS_UNDEF;
chip->clock_state = GD_CLOCK_UNDEF;
/* Since this card has no ASIC, mark it as loaded so everything
works OK */
chip->asic_loaded = true;
chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL |
ECHO_CLOCK_BIT_SPDIF;
err = load_firmware(chip);
if (err < 0)
return err;
chip->bad_board = false;
return err;
}
static int set_mixer_defaults(struct echoaudio *chip)
{
chip->professional_spdif = false;
return init_line_levels(chip);
}
static u32 detect_input_clocks(const struct echoaudio *chip)
{
u32 clocks_from_dsp, clock_bits;
/* Map the DSP clock detect bits to the generic driver clock
detect bits */
clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks);
clock_bits = ECHO_CLOCK_BIT_INTERNAL;
if (clocks_from_dsp & GLDM_CLOCK_DETECT_BIT_SPDIF)
clock_bits |= ECHO_CLOCK_BIT_SPDIF;
return clock_bits;
}
/* The Gina20 has no ASIC. Just do nothing */
static int load_asic(struct echoaudio *chip)
{
return 0;
}
static int set_sample_rate(struct echoaudio *chip, u32 rate)
{
u8 clock_state, spdif_status;
if (wait_handshake(chip))
return -EIO;
switch (rate) {
case 44100:
clock_state = GD_CLOCK_44;
spdif_status = GD_SPDIF_STATUS_44;
break;
case 48000:
clock_state = GD_CLOCK_48;
spdif_status = GD_SPDIF_STATUS_48;
break;
default:
clock_state = GD_CLOCK_NOCHANGE;
spdif_status = GD_SPDIF_STATUS_NOCHANGE;
break;
}
if (chip->clock_state == clock_state)
clock_state = GD_CLOCK_NOCHANGE;
if (spdif_status == chip->spdif_status)
spdif_status = GD_SPDIF_STATUS_NOCHANGE;
chip->comm_page->sample_rate = cpu_to_le32(rate);
chip->comm_page->gd_clock_state = clock_state;
chip->comm_page->gd_spdif_status = spdif_status;
chip->comm_page->gd_resampler_state = 3; /* magic number - should always be 3 */
/* Save the new audio state if it changed */
if (clock_state != GD_CLOCK_NOCHANGE)
chip->clock_state = clock_state;
if (spdif_status != GD_SPDIF_STATUS_NOCHANGE)
chip->spdif_status = spdif_status;
chip->sample_rate = rate;
clear_handshake(chip);
return send_vector(chip, DSP_VC_SET_GD_AUDIO_STATE);
}
static int set_input_clock(struct echoaudio *chip, u16 clock)
{
switch (clock) {
case ECHO_CLOCK_INTERNAL:
/* Reset the audio state to unknown (just in case) */
chip->clock_state = GD_CLOCK_UNDEF;
chip->spdif_status = GD_SPDIF_STATUS_UNDEF;
set_sample_rate(chip, chip->sample_rate);
chip->input_clock = clock;
break;
case ECHO_CLOCK_SPDIF:
chip->comm_page->gd_clock_state = GD_CLOCK_SPDIFIN;
chip->comm_page->gd_spdif_status = GD_SPDIF_STATUS_NOCHANGE;
clear_handshake(chip);
send_vector(chip, DSP_VC_SET_GD_AUDIO_STATE);
chip->clock_state = GD_CLOCK_SPDIFIN;
chip->input_clock = clock;
break;
default:
return -EINVAL;
}
return 0;
}
/* Set input bus gain (one unit is 0.5dB !) */
static int set_input_gain(struct echoaudio *chip, u16 input, int gain)
{
if (snd_BUG_ON(input >= num_busses_in(chip)))
return -EINVAL;
if (wait_handshake(chip))
return -EIO;
chip->input_gain[input] = gain;
gain += GL20_INPUT_GAIN_MAGIC_NUMBER;
chip->comm_page->line_in_level[input] = gain;
return 0;
}
/* Tell the DSP to reread the flags from the comm page */
static int update_flags(struct echoaudio *chip)
{
if (wait_handshake(chip))
return -EIO;
clear_handshake(chip);
return send_vector(chip, DSP_VC_UPDATE_FLAGS);
}
static int set_professional_spdif(struct echoaudio *chip, char prof)
{
if (prof)
chip->comm_page->flags |=
cpu_to_le32(DSP_FLAG_PROFESSIONAL_SPDIF);
else
chip->comm_page->flags &=
~cpu_to_le32(DSP_FLAG_PROFESSIONAL_SPDIF);
chip->professional_spdif = prof;
return update_flags(chip);
}
| linux-master | sound/pci/echoaudio/gina20_dsp.c |
/****************************************************************************
Copyright Echo Digital Audio Corporation (c) 1998 - 2004
All rights reserved
www.echoaudio.com
This file is part of Echo Digital Audio's generic driver library.
Echo Digital Audio's generic driver library is free software;
you can redistribute it and/or modify it under the terms of
the GNU General Public License as published by the Free Software
Foundation.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston,
MA 02111-1307, USA.
*************************************************************************
Translation from C++ and adaptation for use in ALSA-Driver
were made by Giuliano Pochini <[email protected]>
****************************************************************************/
#if PAGE_SIZE < 4096
#error PAGE_SIZE is < 4k
#endif
static int restore_dsp_rettings(struct echoaudio *chip);
/* Some vector commands involve the DSP reading or writing data to and from the
comm page; if you send one of these commands to the DSP, it will complete the
command and then write a non-zero value to the Handshake field in the
comm page. This function waits for the handshake to show up. */
static int wait_handshake(struct echoaudio *chip)
{
int i;
/* Wait up to 20ms for the handshake from the DSP */
for (i = 0; i < HANDSHAKE_TIMEOUT; i++) {
/* Look for the handshake value */
barrier();
if (chip->comm_page->handshake) {
return 0;
}
udelay(1);
}
dev_err(chip->card->dev, "wait_handshake(): Timeout waiting for DSP\n");
return -EBUSY;
}
/* Much of the interaction between the DSP and the driver is done via vector
commands; send_vector writes a vector command to the DSP. Typically, this
causes the DSP to read or write fields in the comm page.
PCI posting is not required thanks to the handshake logic. */
static int send_vector(struct echoaudio *chip, u32 command)
{
int i;
wmb(); /* Flush all pending writes before sending the command */
/* Wait up to 100ms for the "vector busy" bit to be off */
for (i = 0; i < VECTOR_BUSY_TIMEOUT; i++) {
if (!(get_dsp_register(chip, CHI32_VECTOR_REG) &
CHI32_VECTOR_BUSY)) {
set_dsp_register(chip, CHI32_VECTOR_REG, command);
/*if (i) DE_ACT(("send_vector time: %d\n", i));*/
return 0;
}
udelay(1);
}
dev_err(chip->card->dev, "timeout on send_vector\n");
return -EBUSY;
}
/* write_dsp writes a 32-bit value to the DSP; this is used almost
exclusively for loading the DSP. */
static int write_dsp(struct echoaudio *chip, u32 data)
{
u32 status, i;
for (i = 0; i < 10000000; i++) { /* timeout = 10s */
status = get_dsp_register(chip, CHI32_STATUS_REG);
if ((status & CHI32_STATUS_HOST_WRITE_EMPTY) != 0) {
set_dsp_register(chip, CHI32_DATA_REG, data);
wmb(); /* write it immediately */
return 0;
}
udelay(1);
cond_resched();
}
chip->bad_board = true; /* Set true until DSP re-loaded */
dev_dbg(chip->card->dev, "write_dsp: Set bad_board to true\n");
return -EIO;
}
/* read_dsp reads a 32-bit value from the DSP; this is used almost
exclusively for loading the DSP and checking the status of the ASIC. */
static int read_dsp(struct echoaudio *chip, u32 *data)
{
u32 status, i;
for (i = 0; i < READ_DSP_TIMEOUT; i++) {
status = get_dsp_register(chip, CHI32_STATUS_REG);
if ((status & CHI32_STATUS_HOST_READ_FULL) != 0) {
*data = get_dsp_register(chip, CHI32_DATA_REG);
return 0;
}
udelay(1);
cond_resched();
}
chip->bad_board = true; /* Set true until DSP re-loaded */
dev_err(chip->card->dev, "read_dsp: Set bad_board to true\n");
return -EIO;
}
/****************************************************************************
Firmware loading functions
****************************************************************************/
/* This function is used to read back the serial number from the DSP;
this is triggered by the SET_COMMPAGE_ADDR command.
Only some early Echogals products have serial numbers in the ROM;
the serial number is not used, but you still need to do this as
part of the DSP load process. */
static int read_sn(struct echoaudio *chip)
{
int i;
u32 sn[6];
for (i = 0; i < 5; i++) {
if (read_dsp(chip, &sn[i])) {
dev_err(chip->card->dev,
"Failed to read serial number\n");
return -EIO;
}
}
dev_dbg(chip->card->dev,
"Read serial number %08x %08x %08x %08x %08x\n",
sn[0], sn[1], sn[2], sn[3], sn[4]);
return 0;
}
#ifndef ECHOCARD_HAS_ASIC
/* This card has no ASIC, just return ok */
static inline int check_asic_status(struct echoaudio *chip)
{
chip->asic_loaded = true;
return 0;
}
#endif /* !ECHOCARD_HAS_ASIC */
#ifdef ECHOCARD_HAS_ASIC
/* Load ASIC code - done after the DSP is loaded */
static int load_asic_generic(struct echoaudio *chip, u32 cmd, short asic)
{
const struct firmware *fw;
int err;
u32 i, size;
u8 *code;
err = get_firmware(&fw, chip, asic);
if (err < 0) {
dev_warn(chip->card->dev, "Firmware not found !\n");
return err;
}
code = (u8 *)fw->data;
size = fw->size;
/* Send the "Here comes the ASIC" command */
if (write_dsp(chip, cmd) < 0)
goto la_error;
/* Write length of ASIC file in bytes */
if (write_dsp(chip, size) < 0)
goto la_error;
for (i = 0; i < size; i++) {
if (write_dsp(chip, code[i]) < 0)
goto la_error;
}
free_firmware(fw, chip);
return 0;
la_error:
dev_err(chip->card->dev, "failed on write_dsp\n");
free_firmware(fw, chip);
return -EIO;
}
#endif /* ECHOCARD_HAS_ASIC */
#ifdef DSP_56361
/* Install the resident loader for 56361 DSPs; The resident loader is on
the EPROM on the board for 56301 DSP. The resident loader is a tiny little
program that is used to load the real DSP code. */
static int install_resident_loader(struct echoaudio *chip)
{
u32 address;
int index, words, i;
u16 *code;
u32 status;
const struct firmware *fw;
/* 56361 cards only! This check is required by the old 56301-based
Mona and Gina24 */
if (chip->device_id != DEVICE_ID_56361)
return 0;
/* Look to see if the resident loader is present. If the resident
loader is already installed, host flag 5 will be on. */
status = get_dsp_register(chip, CHI32_STATUS_REG);
if (status & CHI32_STATUS_REG_HF5) {
dev_dbg(chip->card->dev,
"Resident loader already installed; status is 0x%x\n",
status);
return 0;
}
i = get_firmware(&fw, chip, FW_361_LOADER);
if (i < 0) {
dev_warn(chip->card->dev, "Firmware not found !\n");
return i;
}
/* The DSP code is an array of 16 bit words. The array is divided up
into sections. The first word of each section is the size in words,
followed by the section type.
Since DSP addresses and data are 24 bits wide, they each take up two
16 bit words in the array.
This is a lot like the other loader loop, but it's not a loop, you
don't write the memory type, and you don't write a zero at the end. */
/* Set DSP format bits for 24 bit mode */
set_dsp_register(chip, CHI32_CONTROL_REG,
get_dsp_register(chip, CHI32_CONTROL_REG) | 0x900);
code = (u16 *)fw->data;
/* Skip the header section; the first word in the array is the size
of the first section, so the first real section of code is pointed
to by Code[0]. */
index = code[0];
/* Skip the section size, LRS block type, and DSP memory type */
index += 3;
/* Get the number of DSP words to write */
words = code[index++];
/* Get the DSP address for this block; 24 bits, so build from two words */
address = ((u32)code[index] << 16) + code[index + 1];
index += 2;
/* Write the count to the DSP */
if (write_dsp(chip, words)) {
dev_err(chip->card->dev,
"install_resident_loader: Failed to write word count!\n");
goto irl_error;
}
/* Write the DSP address */
if (write_dsp(chip, address)) {
dev_err(chip->card->dev,
"install_resident_loader: Failed to write DSP address!\n");
goto irl_error;
}
/* Write out this block of code to the DSP */
for (i = 0; i < words; i++) {
u32 data;
data = ((u32)code[index] << 16) + code[index + 1];
if (write_dsp(chip, data)) {
dev_err(chip->card->dev,
"install_resident_loader: Failed to write DSP code\n");
goto irl_error;
}
index += 2;
}
/* Wait for flag 5 to come up */
for (i = 0; i < 200; i++) { /* Timeout is 50us * 200 = 10ms */
udelay(50);
status = get_dsp_register(chip, CHI32_STATUS_REG);
if (status & CHI32_STATUS_REG_HF5)
break;
}
if (i == 200) {
dev_err(chip->card->dev, "Resident loader failed to set HF5\n");
goto irl_error;
}
dev_dbg(chip->card->dev, "Resident loader successfully installed\n");
free_firmware(fw, chip);
return 0;
irl_error:
free_firmware(fw, chip);
return -EIO;
}
#endif /* DSP_56361 */
static int load_dsp(struct echoaudio *chip, u16 *code)
{
u32 address, data;
int index, words, i;
if (chip->dsp_code == code) {
dev_warn(chip->card->dev, "DSP is already loaded!\n");
return 0;
}
chip->bad_board = true; /* Set true until DSP loaded */
chip->dsp_code = NULL; /* Current DSP code not loaded */
chip->asic_loaded = false; /* Loading the DSP code will reset the ASIC */
dev_dbg(chip->card->dev, "load_dsp: Set bad_board to true\n");
/* If this board requires a resident loader, install it. */
#ifdef DSP_56361
i = install_resident_loader(chip);
if (i < 0)
return i;
#endif
/* Send software reset command */
if (send_vector(chip, DSP_VC_RESET) < 0) {
dev_err(chip->card->dev,
"LoadDsp: send_vector DSP_VC_RESET failed, Critical Failure\n");
return -EIO;
}
/* Delay 10us */
udelay(10);
/* Wait 10ms for HF3 to indicate that software reset is complete */
for (i = 0; i < 1000; i++) { /* Timeout is 10us * 1000 = 10ms */
if (get_dsp_register(chip, CHI32_STATUS_REG) &
CHI32_STATUS_REG_HF3)
break;
udelay(10);
}
if (i == 1000) {
dev_err(chip->card->dev,
"load_dsp: Timeout waiting for CHI32_STATUS_REG_HF3\n");
return -EIO;
}
/* Set DSP format bits for 24 bit mode now that soft reset is done */
set_dsp_register(chip, CHI32_CONTROL_REG,
get_dsp_register(chip, CHI32_CONTROL_REG) | 0x900);
/* Main loader loop */
index = code[0];
for (;;) {
int block_type, mem_type;
/* Total Block Size */
index++;
/* Block Type */
block_type = code[index];
if (block_type == 4) /* We're finished */
break;
index++;
/* Memory Type P=0,X=1,Y=2 */
mem_type = code[index++];
/* Block Code Size */
words = code[index++];
if (words == 0) /* We're finished */
break;
/* Start Address */
address = ((u32)code[index] << 16) + code[index + 1];
index += 2;
if (write_dsp(chip, words) < 0) {
dev_err(chip->card->dev,
"load_dsp: failed to write number of DSP words\n");
return -EIO;
}
if (write_dsp(chip, address) < 0) {
dev_err(chip->card->dev,
"load_dsp: failed to write DSP address\n");
return -EIO;
}
if (write_dsp(chip, mem_type) < 0) {
dev_err(chip->card->dev,
"load_dsp: failed to write DSP memory type\n");
return -EIO;
}
/* Code */
for (i = 0; i < words; i++, index+=2) {
data = ((u32)code[index] << 16) + code[index + 1];
if (write_dsp(chip, data) < 0) {
dev_err(chip->card->dev,
"load_dsp: failed to write DSP data\n");
return -EIO;
}
}
}
if (write_dsp(chip, 0) < 0) { /* We're done!!! */
dev_err(chip->card->dev,
"load_dsp: Failed to write final zero\n");
return -EIO;
}
udelay(10);
for (i = 0; i < 5000; i++) { /* Timeout is 100us * 5000 = 500ms */
/* Wait for flag 4 - indicates that the DSP loaded OK */
if (get_dsp_register(chip, CHI32_STATUS_REG) &
CHI32_STATUS_REG_HF4) {
set_dsp_register(chip, CHI32_CONTROL_REG,
get_dsp_register(chip, CHI32_CONTROL_REG) & ~0x1b00);
if (write_dsp(chip, DSP_FNC_SET_COMMPAGE_ADDR) < 0) {
dev_err(chip->card->dev,
"load_dsp: Failed to write DSP_FNC_SET_COMMPAGE_ADDR\n");
return -EIO;
}
if (write_dsp(chip, chip->comm_page_phys) < 0) {
dev_err(chip->card->dev,
"load_dsp: Failed to write comm page address\n");
return -EIO;
}
/* Get the serial number via slave mode.
This is triggered by the SET_COMMPAGE_ADDR command.
We don't actually use the serial number but we have to
get it as part of the DSP init voodoo. */
if (read_sn(chip) < 0) {
dev_err(chip->card->dev,
"load_dsp: Failed to read serial number\n");
return -EIO;
}
chip->dsp_code = code; /* Show which DSP code loaded */
chip->bad_board = false; /* DSP OK */
return 0;
}
udelay(100);
}
dev_err(chip->card->dev,
"load_dsp: DSP load timed out waiting for HF4\n");
return -EIO;
}
/* load_firmware takes care of loading the DSP and any ASIC code. */
static int load_firmware(struct echoaudio *chip)
{
const struct firmware *fw;
int box_type, err;
if (snd_BUG_ON(!chip->comm_page))
return -EPERM;
/* See if the ASIC is present and working - only if the DSP is already loaded */
if (chip->dsp_code) {
box_type = check_asic_status(chip);
if (box_type >= 0)
return box_type;
/* ASIC check failed; force the DSP to reload */
chip->dsp_code = NULL;
}
err = get_firmware(&fw, chip, chip->dsp_code_to_load);
if (err < 0)
return err;
err = load_dsp(chip, (u16 *)fw->data);
free_firmware(fw, chip);
if (err < 0)
return err;
box_type = load_asic(chip);
if (box_type < 0)
return box_type; /* error */
return box_type;
}
/****************************************************************************
Mixer functions
****************************************************************************/
#if defined(ECHOCARD_HAS_INPUT_NOMINAL_LEVEL) || \
defined(ECHOCARD_HAS_OUTPUT_NOMINAL_LEVEL)
/* Set the nominal level for an input or output bus (true = -10dBV, false = +4dBu) */
static int set_nominal_level(struct echoaudio *chip, u16 index, char consumer)
{
if (snd_BUG_ON(index >= num_busses_out(chip) + num_busses_in(chip)))
return -EINVAL;
/* Wait for the handshake (OK even if ASIC is not loaded) */
if (wait_handshake(chip))
return -EIO;
chip->nominal_level[index] = consumer;
if (consumer)
chip->comm_page->nominal_level_mask |= cpu_to_le32(1 << index);
else
chip->comm_page->nominal_level_mask &= ~cpu_to_le32(1 << index);
return 0;
}
#endif /* ECHOCARD_HAS_*_NOMINAL_LEVEL */
/* Set the gain for a single physical output channel (dB). */
static int set_output_gain(struct echoaudio *chip, u16 channel, s8 gain)
{
if (snd_BUG_ON(channel >= num_busses_out(chip)))
return -EINVAL;
if (wait_handshake(chip))
return -EIO;
/* Save the new value */
chip->output_gain[channel] = gain;
chip->comm_page->line_out_level[channel] = gain;
return 0;
}
#ifdef ECHOCARD_HAS_MONITOR
/* Set the monitor level from an input bus to an output bus. */
static int set_monitor_gain(struct echoaudio *chip, u16 output, u16 input,
s8 gain)
{
if (snd_BUG_ON(output >= num_busses_out(chip) ||
input >= num_busses_in(chip)))
return -EINVAL;
if (wait_handshake(chip))
return -EIO;
chip->monitor_gain[output][input] = gain;
chip->comm_page->monitors[monitor_index(chip, output, input)] = gain;
return 0;
}
#endif /* ECHOCARD_HAS_MONITOR */
/* Tell the DSP to read and update output, nominal & monitor levels in comm page. */
static int update_output_line_level(struct echoaudio *chip)
{
if (wait_handshake(chip))
return -EIO;
clear_handshake(chip);
return send_vector(chip, DSP_VC_UPDATE_OUTVOL);
}
/* Tell the DSP to read and update input levels in comm page */
static int update_input_line_level(struct echoaudio *chip)
{
if (wait_handshake(chip))
return -EIO;
clear_handshake(chip);
return send_vector(chip, DSP_VC_UPDATE_INGAIN);
}
/* set_meters_on turns the meters on or off. If meters are turned on, the DSP
will write the meter and clock detect values to the comm page at about 30Hz */
static void set_meters_on(struct echoaudio *chip, char on)
{
if (on && !chip->meters_enabled) {
send_vector(chip, DSP_VC_METERS_ON);
chip->meters_enabled = 1;
} else if (!on && chip->meters_enabled) {
send_vector(chip, DSP_VC_METERS_OFF);
chip->meters_enabled = 0;
memset((s8 *)chip->comm_page->vu_meter, ECHOGAIN_MUTED,
DSP_MAXPIPES);
memset((s8 *)chip->comm_page->peak_meter, ECHOGAIN_MUTED,
DSP_MAXPIPES);
}
}
/* Fill out an the given array using the current values in the comm page.
Meters are written in the comm page by the DSP in this order:
Output busses
Input busses
Output pipes (vmixer cards only)
This function assumes there are no more than 16 in/out busses or pipes
Meters is an array [3][16][2] of long. */
static void get_audio_meters(struct echoaudio *chip, long *meters)
{
unsigned int i, m, n;
for (i = 0 ; i < 96; i++)
meters[i] = 0;
for (m = 0, n = 0, i = 0; i < num_busses_out(chip); i++, m++) {
meters[n++] = chip->comm_page->vu_meter[m];
meters[n++] = chip->comm_page->peak_meter[m];
}
#ifdef ECHOCARD_ECHO3G
m = E3G_MAX_OUTPUTS; /* Skip unused meters */
#endif
for (n = 32, i = 0; i < num_busses_in(chip); i++, m++) {
meters[n++] = chip->comm_page->vu_meter[m];
meters[n++] = chip->comm_page->peak_meter[m];
}
#ifdef ECHOCARD_HAS_VMIXER
for (n = 64, i = 0; i < num_pipes_out(chip); i++, m++) {
meters[n++] = chip->comm_page->vu_meter[m];
meters[n++] = chip->comm_page->peak_meter[m];
}
#endif
}
static int restore_dsp_rettings(struct echoaudio *chip)
{
int i, o, err;
err = check_asic_status(chip);
if (err < 0)
return err;
/* Gina20/Darla20 only. Should be harmless for other cards. */
chip->comm_page->gd_clock_state = GD_CLOCK_UNDEF;
chip->comm_page->gd_spdif_status = GD_SPDIF_STATUS_UNDEF;
chip->comm_page->handshake = cpu_to_le32(0xffffffff);
/* Restore output busses */
for (i = 0; i < num_busses_out(chip); i++) {
err = set_output_gain(chip, i, chip->output_gain[i]);
if (err < 0)
return err;
}
#ifdef ECHOCARD_HAS_VMIXER
for (i = 0; i < num_pipes_out(chip); i++)
for (o = 0; o < num_busses_out(chip); o++) {
err = set_vmixer_gain(chip, o, i,
chip->vmixer_gain[o][i]);
if (err < 0)
return err;
}
if (update_vmixer_level(chip) < 0)
return -EIO;
#endif /* ECHOCARD_HAS_VMIXER */
#ifdef ECHOCARD_HAS_MONITOR
for (o = 0; o < num_busses_out(chip); o++)
for (i = 0; i < num_busses_in(chip); i++) {
err = set_monitor_gain(chip, o, i,
chip->monitor_gain[o][i]);
if (err < 0)
return err;
}
#endif /* ECHOCARD_HAS_MONITOR */
#ifdef ECHOCARD_HAS_INPUT_GAIN
for (i = 0; i < num_busses_in(chip); i++) {
err = set_input_gain(chip, i, chip->input_gain[i]);
if (err < 0)
return err;
}
#endif /* ECHOCARD_HAS_INPUT_GAIN */
err = update_output_line_level(chip);
if (err < 0)
return err;
err = update_input_line_level(chip);
if (err < 0)
return err;
err = set_sample_rate(chip, chip->sample_rate);
if (err < 0)
return err;
if (chip->meters_enabled) {
err = send_vector(chip, DSP_VC_METERS_ON);
if (err < 0)
return err;
}
#ifdef ECHOCARD_HAS_DIGITAL_MODE_SWITCH
if (set_digital_mode(chip, chip->digital_mode) < 0)
return -EIO;
#endif
#ifdef ECHOCARD_HAS_DIGITAL_IO
if (set_professional_spdif(chip, chip->professional_spdif) < 0)
return -EIO;
#endif
#ifdef ECHOCARD_HAS_PHANTOM_POWER
if (set_phantom_power(chip, chip->phantom_power) < 0)
return -EIO;
#endif
#ifdef ECHOCARD_HAS_EXTERNAL_CLOCK
/* set_input_clock() also restores automute setting */
if (set_input_clock(chip, chip->input_clock) < 0)
return -EIO;
#endif
#ifdef ECHOCARD_HAS_OUTPUT_CLOCK_SWITCH
if (set_output_clock(chip, chip->output_clock) < 0)
return -EIO;
#endif
if (wait_handshake(chip) < 0)
return -EIO;
clear_handshake(chip);
if (send_vector(chip, DSP_VC_UPDATE_FLAGS) < 0)
return -EIO;
return 0;
}
/****************************************************************************
Transport functions
****************************************************************************/
/* set_audio_format() sets the format of the audio data in host memory for
this pipe. Note that _MS_ (mono-to-stereo) playback modes are not used by ALSA
but they are here because they are just mono while capturing */
static void set_audio_format(struct echoaudio *chip, u16 pipe_index,
const struct audioformat *format)
{
u16 dsp_format;
dsp_format = DSP_AUDIOFORM_SS_16LE;
/* Look for super-interleave (no big-endian and 8 bits) */
if (format->interleave > 2) {
switch (format->bits_per_sample) {
case 16:
dsp_format = DSP_AUDIOFORM_SUPER_INTERLEAVE_16LE;
break;
case 24:
dsp_format = DSP_AUDIOFORM_SUPER_INTERLEAVE_24LE;
break;
case 32:
dsp_format = DSP_AUDIOFORM_SUPER_INTERLEAVE_32LE;
break;
}
dsp_format |= format->interleave;
} else if (format->data_are_bigendian) {
/* For big-endian data, only 32 bit samples are supported */
switch (format->interleave) {
case 1:
dsp_format = DSP_AUDIOFORM_MM_32BE;
break;
#ifdef ECHOCARD_HAS_STEREO_BIG_ENDIAN32
case 2:
dsp_format = DSP_AUDIOFORM_SS_32BE;
break;
#endif
}
} else if (format->interleave == 1 &&
format->bits_per_sample == 32 && !format->mono_to_stereo) {
/* 32 bit little-endian mono->mono case */
dsp_format = DSP_AUDIOFORM_MM_32LE;
} else {
/* Handle the other little-endian formats */
switch (format->bits_per_sample) {
case 8:
if (format->interleave == 2)
dsp_format = DSP_AUDIOFORM_SS_8;
else
dsp_format = DSP_AUDIOFORM_MS_8;
break;
default:
case 16:
if (format->interleave == 2)
dsp_format = DSP_AUDIOFORM_SS_16LE;
else
dsp_format = DSP_AUDIOFORM_MS_16LE;
break;
case 24:
if (format->interleave == 2)
dsp_format = DSP_AUDIOFORM_SS_24LE;
else
dsp_format = DSP_AUDIOFORM_MS_24LE;
break;
case 32:
if (format->interleave == 2)
dsp_format = DSP_AUDIOFORM_SS_32LE;
else
dsp_format = DSP_AUDIOFORM_MS_32LE;
break;
}
}
dev_dbg(chip->card->dev,
"set_audio_format[%d] = %x\n", pipe_index, dsp_format);
chip->comm_page->audio_format[pipe_index] = cpu_to_le16(dsp_format);
}
/* start_transport starts transport for a set of pipes.
The bits 1 in channel_mask specify what pipes to start. Only the bit of the
first channel must be set, regardless its interleave.
Same thing for pause_ and stop_ -trasport below. */
static int start_transport(struct echoaudio *chip, u32 channel_mask,
u32 cyclic_mask)
{
if (wait_handshake(chip))
return -EIO;
chip->comm_page->cmd_start |= cpu_to_le32(channel_mask);
if (chip->comm_page->cmd_start) {
clear_handshake(chip);
send_vector(chip, DSP_VC_START_TRANSFER);
if (wait_handshake(chip))
return -EIO;
/* Keep track of which pipes are transporting */
chip->active_mask |= channel_mask;
chip->comm_page->cmd_start = 0;
return 0;
}
dev_err(chip->card->dev, "start_transport: No pipes to start!\n");
return -EINVAL;
}
static int pause_transport(struct echoaudio *chip, u32 channel_mask)
{
if (wait_handshake(chip))
return -EIO;
chip->comm_page->cmd_stop |= cpu_to_le32(channel_mask);
chip->comm_page->cmd_reset = 0;
if (chip->comm_page->cmd_stop) {
clear_handshake(chip);
send_vector(chip, DSP_VC_STOP_TRANSFER);
if (wait_handshake(chip))
return -EIO;
/* Keep track of which pipes are transporting */
chip->active_mask &= ~channel_mask;
chip->comm_page->cmd_stop = 0;
chip->comm_page->cmd_reset = 0;
return 0;
}
dev_dbg(chip->card->dev, "pause_transport: No pipes to stop!\n");
return 0;
}
static int stop_transport(struct echoaudio *chip, u32 channel_mask)
{
if (wait_handshake(chip))
return -EIO;
chip->comm_page->cmd_stop |= cpu_to_le32(channel_mask);
chip->comm_page->cmd_reset |= cpu_to_le32(channel_mask);
if (chip->comm_page->cmd_reset) {
clear_handshake(chip);
send_vector(chip, DSP_VC_STOP_TRANSFER);
if (wait_handshake(chip))
return -EIO;
/* Keep track of which pipes are transporting */
chip->active_mask &= ~channel_mask;
chip->comm_page->cmd_stop = 0;
chip->comm_page->cmd_reset = 0;
return 0;
}
dev_dbg(chip->card->dev, "stop_transport: No pipes to stop!\n");
return 0;
}
static inline int is_pipe_allocated(struct echoaudio *chip, u16 pipe_index)
{
return (chip->pipe_alloc_mask & (1 << pipe_index));
}
/* Stops everything and turns off the DSP. All pipes should be already
stopped and unallocated. */
static int rest_in_peace(struct echoaudio *chip)
{
/* Stops all active pipes (just to be sure) */
stop_transport(chip, chip->active_mask);
set_meters_on(chip, false);
#ifdef ECHOCARD_HAS_MIDI
enable_midi_input(chip, false);
#endif
/* Go to sleep */
if (chip->dsp_code) {
/* Make load_firmware do a complete reload */
chip->dsp_code = NULL;
/* Put the DSP to sleep */
return send_vector(chip, DSP_VC_GO_COMATOSE);
}
return 0;
}
/* Fills the comm page with default values */
static int init_dsp_comm_page(struct echoaudio *chip)
{
/* Check if the compiler added extra padding inside the structure */
if (offsetof(struct comm_page, midi_output) != 0xbe0) {
dev_err(chip->card->dev,
"init_dsp_comm_page() - Invalid struct comm_page structure\n");
return -EPERM;
}
/* Init all the basic stuff */
chip->card_name = ECHOCARD_NAME;
chip->bad_board = true; /* Set true until DSP loaded */
chip->dsp_code = NULL; /* Current DSP code not loaded */
chip->asic_loaded = false;
memset(chip->comm_page, 0, sizeof(struct comm_page));
/* Init the comm page */
chip->comm_page->comm_size =
cpu_to_le32(sizeof(struct comm_page));
chip->comm_page->handshake = cpu_to_le32(0xffffffff);
chip->comm_page->midi_out_free_count =
cpu_to_le32(DSP_MIDI_OUT_FIFO_SIZE);
chip->comm_page->sample_rate = cpu_to_le32(44100);
/* Set line levels so we don't blast any inputs on startup */
memset(chip->comm_page->monitors, ECHOGAIN_MUTED, MONITOR_ARRAY_SIZE);
memset(chip->comm_page->vmixer, ECHOGAIN_MUTED, VMIXER_ARRAY_SIZE);
return 0;
}
/* This function initializes the chip structure with default values, ie. all
* muted and internal clock source. Then it copies the settings to the DSP.
* This MUST be called after the DSP is up and running !
*/
static int init_line_levels(struct echoaudio *chip)
{
memset(chip->output_gain, ECHOGAIN_MUTED, sizeof(chip->output_gain));
memset(chip->input_gain, ECHOGAIN_MUTED, sizeof(chip->input_gain));
memset(chip->monitor_gain, ECHOGAIN_MUTED, sizeof(chip->monitor_gain));
memset(chip->vmixer_gain, ECHOGAIN_MUTED, sizeof(chip->vmixer_gain));
chip->input_clock = ECHO_CLOCK_INTERNAL;
chip->output_clock = ECHO_CLOCK_WORD;
chip->sample_rate = 44100;
return restore_dsp_rettings(chip);
}
/* This is low level part of the interrupt handler.
It returns -1 if the IRQ is not ours, or N>=0 if it is, where N is the number
of midi data in the input queue. */
static int service_irq(struct echoaudio *chip)
{
int st;
/* Read the DSP status register and see if this DSP generated this interrupt */
if (get_dsp_register(chip, CHI32_STATUS_REG) & CHI32_STATUS_IRQ) {
st = 0;
#ifdef ECHOCARD_HAS_MIDI
/* Get and parse midi data if present */
if (chip->comm_page->midi_input[0]) /* The count is at index 0 */
st = midi_service_irq(chip); /* Returns how many midi bytes we received */
#endif
/* Clear the hardware interrupt */
chip->comm_page->midi_input[0] = 0;
send_vector(chip, DSP_VC_ACK_INT);
return st;
}
return -1;
}
/******************************************************************************
Functions for opening and closing pipes
******************************************************************************/
/* allocate_pipes is used to reserve audio pipes for your exclusive use.
The call will fail if some pipes are already allocated. */
static int allocate_pipes(struct echoaudio *chip, struct audiopipe *pipe,
int pipe_index, int interleave)
{
int i;
u32 channel_mask;
dev_dbg(chip->card->dev,
"allocate_pipes: ch=%d int=%d\n", pipe_index, interleave);
if (chip->bad_board)
return -EIO;
for (channel_mask = i = 0; i < interleave; i++)
channel_mask |= 1 << (pipe_index + i);
if (chip->pipe_alloc_mask & channel_mask) {
dev_err(chip->card->dev,
"allocate_pipes: channel already open\n");
return -EAGAIN;
}
chip->comm_page->position[pipe_index] = 0;
chip->pipe_alloc_mask |= channel_mask;
/* This driver uses cyclic buffers only */
chip->pipe_cyclic_mask |= channel_mask;
pipe->index = pipe_index;
pipe->interleave = interleave;
pipe->state = PIPE_STATE_STOPPED;
/* The counter register is where the DSP writes the 32 bit DMA
position for a pipe. The DSP is constantly updating this value as
it moves data. The DMA counter is in units of bytes, not samples. */
pipe->dma_counter = (__le32 *)&chip->comm_page->position[pipe_index];
*pipe->dma_counter = 0;
return pipe_index;
}
static int free_pipes(struct echoaudio *chip, struct audiopipe *pipe)
{
u32 channel_mask;
int i;
if (snd_BUG_ON(!is_pipe_allocated(chip, pipe->index)))
return -EINVAL;
if (snd_BUG_ON(pipe->state != PIPE_STATE_STOPPED))
return -EINVAL;
for (channel_mask = i = 0; i < pipe->interleave; i++)
channel_mask |= 1 << (pipe->index + i);
chip->pipe_alloc_mask &= ~channel_mask;
chip->pipe_cyclic_mask &= ~channel_mask;
return 0;
}
/******************************************************************************
Functions for managing the scatter-gather list
******************************************************************************/
static int sglist_init(struct echoaudio *chip, struct audiopipe *pipe)
{
pipe->sglist_head = 0;
memset(pipe->sgpage.area, 0, PAGE_SIZE);
chip->comm_page->sglist_addr[pipe->index].addr =
cpu_to_le32(pipe->sgpage.addr);
return 0;
}
static int sglist_add_mapping(struct echoaudio *chip, struct audiopipe *pipe,
dma_addr_t address, size_t length)
{
int head = pipe->sglist_head;
struct sg_entry *list = (struct sg_entry *)pipe->sgpage.area;
if (head < MAX_SGLIST_ENTRIES - 1) {
list[head].addr = cpu_to_le32(address);
list[head].size = cpu_to_le32(length);
pipe->sglist_head++;
} else {
dev_err(chip->card->dev, "SGlist: too many fragments\n");
return -ENOMEM;
}
return 0;
}
static inline int sglist_add_irq(struct echoaudio *chip, struct audiopipe *pipe)
{
return sglist_add_mapping(chip, pipe, 0, 0);
}
static inline int sglist_wrap(struct echoaudio *chip, struct audiopipe *pipe)
{
return sglist_add_mapping(chip, pipe, pipe->sgpage.addr, 0);
}
| linux-master | sound/pci/echoaudio/echoaudio_dsp.c |
/****************************************************************************
Copyright Echo Digital Audio Corporation (c) 1998 - 2004
All rights reserved
www.echoaudio.com
This file is part of Echo Digital Audio's generic driver library.
Echo Digital Audio's generic driver library is free software;
you can redistribute it and/or modify it under the terms of
the GNU General Public License as published by the Free Software
Foundation.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston,
MA 02111-1307, USA.
*************************************************************************
Translation from C++ and adaptation for use in ALSA-Driver
were made by Giuliano Pochini <[email protected]>
****************************************************************************/
static int set_input_clock(struct echoaudio *chip, u16 clock);
static int set_professional_spdif(struct echoaudio *chip, char prof);
static int update_flags(struct echoaudio *chip);
static int set_vmixer_gain(struct echoaudio *chip, u16 output, u16 pipe,
int gain);
static int update_vmixer_level(struct echoaudio *chip);
static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id)
{
int err;
if (snd_BUG_ON((subdevice_id & 0xfff0) != MIA))
return -ENODEV;
err = init_dsp_comm_page(chip);
if (err) {
dev_err(chip->card->dev,
"init_hw - could not initialize DSP comm page\n");
return err;
}
chip->device_id = device_id;
chip->subdevice_id = subdevice_id;
chip->bad_board = true;
chip->dsp_code_to_load = FW_MIA_DSP;
/* Since this card has no ASIC, mark it as loaded so everything
works OK */
chip->asic_loaded = true;
if ((subdevice_id & 0x0000f) == MIA_MIDI_REV)
chip->has_midi = true;
chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL |
ECHO_CLOCK_BIT_SPDIF;
err = load_firmware(chip);
if (err < 0)
return err;
chip->bad_board = false;
return err;
}
static int set_mixer_defaults(struct echoaudio *chip)
{
return init_line_levels(chip);
}
static u32 detect_input_clocks(const struct echoaudio *chip)
{
u32 clocks_from_dsp, clock_bits;
/* Map the DSP clock detect bits to the generic driver clock
detect bits */
clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks);
clock_bits = ECHO_CLOCK_BIT_INTERNAL;
if (clocks_from_dsp & GLDM_CLOCK_DETECT_BIT_SPDIF)
clock_bits |= ECHO_CLOCK_BIT_SPDIF;
return clock_bits;
}
/* The Mia has no ASIC. Just do nothing */
static int load_asic(struct echoaudio *chip)
{
return 0;
}
static int set_sample_rate(struct echoaudio *chip, u32 rate)
{
u32 control_reg;
switch (rate) {
case 96000:
control_reg = MIA_96000;
break;
case 88200:
control_reg = MIA_88200;
break;
case 48000:
control_reg = MIA_48000;
break;
case 44100:
control_reg = MIA_44100;
break;
case 32000:
control_reg = MIA_32000;
break;
default:
dev_err(chip->card->dev,
"set_sample_rate: %d invalid!\n", rate);
return -EINVAL;
}
/* Override the clock setting if this Mia is set to S/PDIF clock */
if (chip->input_clock == ECHO_CLOCK_SPDIF)
control_reg |= MIA_SPDIF;
/* Set the control register if it has changed */
if (control_reg != le32_to_cpu(chip->comm_page->control_register)) {
if (wait_handshake(chip))
return -EIO;
chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP */
chip->comm_page->control_register = cpu_to_le32(control_reg);
chip->sample_rate = rate;
clear_handshake(chip);
return send_vector(chip, DSP_VC_UPDATE_CLOCKS);
}
return 0;
}
static int set_input_clock(struct echoaudio *chip, u16 clock)
{
dev_dbg(chip->card->dev, "set_input_clock(%d)\n", clock);
if (snd_BUG_ON(clock != ECHO_CLOCK_INTERNAL &&
clock != ECHO_CLOCK_SPDIF))
return -EINVAL;
chip->input_clock = clock;
return set_sample_rate(chip, chip->sample_rate);
}
/* This function routes the sound from a virtual channel to a real output */
static int set_vmixer_gain(struct echoaudio *chip, u16 output, u16 pipe,
int gain)
{
int index;
if (snd_BUG_ON(pipe >= num_pipes_out(chip) ||
output >= num_busses_out(chip)))
return -EINVAL;
if (wait_handshake(chip))
return -EIO;
chip->vmixer_gain[output][pipe] = gain;
index = output * num_pipes_out(chip) + pipe;
chip->comm_page->vmixer[index] = gain;
dev_dbg(chip->card->dev,
"set_vmixer_gain: pipe %d, out %d = %d\n", pipe, output, gain);
return 0;
}
/* Tell the DSP to read and update virtual mixer levels in comm page. */
static int update_vmixer_level(struct echoaudio *chip)
{
if (wait_handshake(chip))
return -EIO;
clear_handshake(chip);
return send_vector(chip, DSP_VC_SET_VMIXER_GAIN);
}
/* Tell the DSP to reread the flags from the comm page */
static int update_flags(struct echoaudio *chip)
{
if (wait_handshake(chip))
return -EIO;
clear_handshake(chip);
return send_vector(chip, DSP_VC_UPDATE_FLAGS);
}
static int set_professional_spdif(struct echoaudio *chip, char prof)
{
dev_dbg(chip->card->dev, "set_professional_spdif %d\n", prof);
if (prof)
chip->comm_page->flags |=
cpu_to_le32(DSP_FLAG_PROFESSIONAL_SPDIF);
else
chip->comm_page->flags &=
~cpu_to_le32(DSP_FLAG_PROFESSIONAL_SPDIF);
chip->professional_spdif = prof;
return update_flags(chip);
}
| linux-master | sound/pci/echoaudio/mia_dsp.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* ALSA driver for Echoaudio soundcards.
* Copyright (C) 2003-2004 Giuliano Pochini <[email protected]>
*/
#define ECHO24_FAMILY
#define ECHOCARD_MIA
#define ECHOCARD_NAME "Mia"
#define ECHOCARD_HAS_MONITOR
#define ECHOCARD_HAS_INPUT_NOMINAL_LEVEL
#define ECHOCARD_HAS_OUTPUT_NOMINAL_LEVEL
#define ECHOCARD_HAS_SUPER_INTERLEAVE
#define ECHOCARD_HAS_VMIXER
#define ECHOCARD_HAS_DIGITAL_IO
#define ECHOCARD_HAS_EXTERNAL_CLOCK
#define ECHOCARD_HAS_ADAT false
#define ECHOCARD_HAS_STEREO_BIG_ENDIAN32
#define ECHOCARD_HAS_MIDI
#define ECHOCARD_HAS_LINE_OUT_GAIN
/* Pipe indexes */
#define PX_ANALOG_OUT 0 /* 8 */
#define PX_DIGITAL_OUT 8 /* 0 */
#define PX_ANALOG_IN 8 /* 2 */
#define PX_DIGITAL_IN 10 /* 2 */
#define PX_NUM 12
/* Bus indexes */
#define BX_ANALOG_OUT 0 /* 2 */
#define BX_DIGITAL_OUT 2 /* 2 */
#define BX_ANALOG_IN 4 /* 2 */
#define BX_DIGITAL_IN 6 /* 2 */
#define BX_NUM 8
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/pci.h>
#include <linux/module.h>
#include <linux/firmware.h>
#include <linux/slab.h>
#include <linux/io.h>
#include <sound/core.h>
#include <sound/info.h>
#include <sound/control.h>
#include <sound/tlv.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/asoundef.h>
#include <sound/initval.h>
#include <sound/rawmidi.h>
#include <linux/atomic.h>
#include "echoaudio.h"
MODULE_FIRMWARE("ea/loader_dsp.fw");
MODULE_FIRMWARE("ea/mia_dsp.fw");
#define FW_361_LOADER 0
#define FW_MIA_DSP 1
static const struct firmware card_fw[] = {
{0, "loader_dsp.fw"},
{0, "mia_dsp.fw"}
};
static const struct pci_device_id snd_echo_ids[] = {
{0x1057, 0x3410, 0xECC0, 0x0080, 0, 0, 0}, /* DSP 56361 Mia rev.0 */
{0x1057, 0x3410, 0xECC0, 0x0081, 0, 0, 0}, /* DSP 56361 Mia rev.1 */
{0,}
};
static const struct snd_pcm_hardware pcm_hardware_skel = {
.info = SNDRV_PCM_INFO_MMAP |
SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_MMAP_VALID |
SNDRV_PCM_INFO_PAUSE |
SNDRV_PCM_INFO_SYNC_START,
.formats = SNDRV_PCM_FMTBIT_U8 |
SNDRV_PCM_FMTBIT_S16_LE |
SNDRV_PCM_FMTBIT_S24_3LE |
SNDRV_PCM_FMTBIT_S32_LE |
SNDRV_PCM_FMTBIT_S32_BE,
.rates = SNDRV_PCM_RATE_32000 |
SNDRV_PCM_RATE_44100 |
SNDRV_PCM_RATE_48000 |
SNDRV_PCM_RATE_88200 |
SNDRV_PCM_RATE_96000,
.rate_min = 8000,
.rate_max = 96000,
.channels_min = 1,
.channels_max = 8,
.buffer_bytes_max = 262144,
.period_bytes_min = 32,
.period_bytes_max = 131072,
.periods_min = 2,
.periods_max = 220,
/* One page (4k) contains 512 instructions. I don't know if the hw
supports lists longer than this. In this case periods_max=220 is a
safe limit to make sure the list never exceeds 512 instructions. */
};
#include "mia_dsp.c"
#include "echoaudio_dsp.c"
#include "echoaudio.c"
#include "midi.c"
| linux-master | sound/pci/echoaudio/mia.c |
/****************************************************************************
Copyright Echo Digital Audio Corporation (c) 1998 - 2004
All rights reserved
www.echoaudio.com
This file is part of Echo Digital Audio's generic driver library.
Echo Digital Audio's generic driver library is free software;
you can redistribute it and/or modify it under the terms of
the GNU General Public License as published by the Free Software
Foundation.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston,
MA 02111-1307, USA.
*************************************************************************
Translation from C++ and adaptation for use in ALSA-Driver
were made by Giuliano Pochini <[email protected]>
****************************************************************************/
/* These functions are common for all "3G" cards */
static int check_asic_status(struct echoaudio *chip)
{
u32 box_status;
if (wait_handshake(chip))
return -EIO;
chip->comm_page->ext_box_status = cpu_to_le32(E3G_ASIC_NOT_LOADED);
chip->asic_loaded = false;
clear_handshake(chip);
send_vector(chip, DSP_VC_TEST_ASIC);
if (wait_handshake(chip)) {
chip->dsp_code = NULL;
return -EIO;
}
box_status = le32_to_cpu(chip->comm_page->ext_box_status);
dev_dbg(chip->card->dev, "box_status=%x\n", box_status);
if (box_status == E3G_ASIC_NOT_LOADED)
return -ENODEV;
chip->asic_loaded = true;
return box_status & E3G_BOX_TYPE_MASK;
}
static inline u32 get_frq_reg(struct echoaudio *chip)
{
return le32_to_cpu(chip->comm_page->e3g_frq_register);
}
/* Most configuration of 3G cards is accomplished by writing the control
register. write_control_reg sends the new control register value to the DSP. */
static int write_control_reg(struct echoaudio *chip, u32 ctl, u32 frq,
char force)
{
__le32 ctl_reg, frq_reg;
if (wait_handshake(chip))
return -EIO;
dev_dbg(chip->card->dev,
"WriteControlReg: Setting 0x%x, 0x%x\n", ctl, frq);
ctl_reg = cpu_to_le32(ctl);
frq_reg = cpu_to_le32(frq);
if (ctl_reg != chip->comm_page->control_register ||
frq_reg != chip->comm_page->e3g_frq_register || force) {
chip->comm_page->e3g_frq_register = frq_reg;
chip->comm_page->control_register = ctl_reg;
clear_handshake(chip);
return send_vector(chip, DSP_VC_WRITE_CONTROL_REG);
}
dev_dbg(chip->card->dev, "WriteControlReg: not written, no change\n");
return 0;
}
/* Set the digital mode - currently for Gina24, Layla24, Mona, 3G */
static int set_digital_mode(struct echoaudio *chip, u8 mode)
{
u8 previous_mode;
int err, i, o;
/* All audio channels must be closed before changing the digital mode */
if (snd_BUG_ON(chip->pipe_alloc_mask))
return -EAGAIN;
if (snd_BUG_ON(!(chip->digital_modes & (1 << mode))))
return -EINVAL;
previous_mode = chip->digital_mode;
err = dsp_set_digital_mode(chip, mode);
/* If we successfully changed the digital mode from or to ADAT,
* then make sure all output, input and monitor levels are
* updated by the DSP comm object. */
if (err >= 0 && previous_mode != mode &&
(previous_mode == DIGITAL_MODE_ADAT || mode == DIGITAL_MODE_ADAT)) {
spin_lock_irq(&chip->lock);
for (o = 0; o < num_busses_out(chip); o++)
for (i = 0; i < num_busses_in(chip); i++)
set_monitor_gain(chip, o, i,
chip->monitor_gain[o][i]);
#ifdef ECHOCARD_HAS_INPUT_GAIN
for (i = 0; i < num_busses_in(chip); i++)
set_input_gain(chip, i, chip->input_gain[i]);
update_input_line_level(chip);
#endif
for (o = 0; o < num_busses_out(chip); o++)
set_output_gain(chip, o, chip->output_gain[o]);
update_output_line_level(chip);
spin_unlock_irq(&chip->lock);
}
return err;
}
static u32 set_spdif_bits(struct echoaudio *chip, u32 control_reg, u32 rate)
{
control_reg &= E3G_SPDIF_FORMAT_CLEAR_MASK;
switch (rate) {
case 32000 :
control_reg |= E3G_SPDIF_SAMPLE_RATE0 | E3G_SPDIF_SAMPLE_RATE1;
break;
case 44100 :
if (chip->professional_spdif)
control_reg |= E3G_SPDIF_SAMPLE_RATE0;
break;
case 48000 :
control_reg |= E3G_SPDIF_SAMPLE_RATE1;
break;
}
if (chip->professional_spdif)
control_reg |= E3G_SPDIF_PRO_MODE;
if (chip->non_audio_spdif)
control_reg |= E3G_SPDIF_NOT_AUDIO;
control_reg |= E3G_SPDIF_24_BIT | E3G_SPDIF_TWO_CHANNEL |
E3G_SPDIF_COPY_PERMIT;
return control_reg;
}
/* Set the S/PDIF output format */
static int set_professional_spdif(struct echoaudio *chip, char prof)
{
u32 control_reg;
control_reg = le32_to_cpu(chip->comm_page->control_register);
chip->professional_spdif = prof;
control_reg = set_spdif_bits(chip, control_reg, chip->sample_rate);
return write_control_reg(chip, control_reg, get_frq_reg(chip), 0);
}
/* detect_input_clocks() returns a bitmask consisting of all the input clocks
currently connected to the hardware; this changes as the user connects and
disconnects clock inputs. You should use this information to determine which
clocks the user is allowed to select. */
static u32 detect_input_clocks(const struct echoaudio *chip)
{
u32 clocks_from_dsp, clock_bits;
/* Map the DSP clock detect bits to the generic driver clock
* detect bits */
clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks);
clock_bits = ECHO_CLOCK_BIT_INTERNAL;
if (clocks_from_dsp & E3G_CLOCK_DETECT_BIT_WORD)
clock_bits |= ECHO_CLOCK_BIT_WORD;
switch(chip->digital_mode) {
case DIGITAL_MODE_SPDIF_RCA:
case DIGITAL_MODE_SPDIF_OPTICAL:
if (clocks_from_dsp & E3G_CLOCK_DETECT_BIT_SPDIF)
clock_bits |= ECHO_CLOCK_BIT_SPDIF;
break;
case DIGITAL_MODE_ADAT:
if (clocks_from_dsp & E3G_CLOCK_DETECT_BIT_ADAT)
clock_bits |= ECHO_CLOCK_BIT_ADAT;
break;
}
return clock_bits;
}
static int load_asic(struct echoaudio *chip)
{
int box_type, err;
if (chip->asic_loaded)
return 0;
/* Give the DSP a few milliseconds to settle down */
mdelay(2);
err = load_asic_generic(chip, DSP_FNC_LOAD_3G_ASIC, FW_3G_ASIC);
if (err < 0)
return err;
chip->asic_code = FW_3G_ASIC;
/* Now give the new ASIC some time to set up */
msleep(1000);
/* See if it worked */
box_type = check_asic_status(chip);
/* Set up the control register if the load succeeded -
* 48 kHz, internal clock, S/PDIF RCA mode */
if (box_type >= 0) {
err = write_control_reg(chip, E3G_48KHZ,
E3G_FREQ_REG_DEFAULT, true);
if (err < 0)
return err;
}
return box_type;
}
static int set_sample_rate(struct echoaudio *chip, u32 rate)
{
u32 control_reg, clock, base_rate, frq_reg;
/* Only set the clock for internal mode. */
if (chip->input_clock != ECHO_CLOCK_INTERNAL) {
dev_warn(chip->card->dev,
"Cannot set sample rate - clock not set to CLK_CLOCKININTERNAL\n");
/* Save the rate anyhow */
chip->comm_page->sample_rate = cpu_to_le32(rate);
chip->sample_rate = rate;
set_input_clock(chip, chip->input_clock);
return 0;
}
if (snd_BUG_ON(rate >= 50000 &&
chip->digital_mode == DIGITAL_MODE_ADAT))
return -EINVAL;
clock = 0;
control_reg = le32_to_cpu(chip->comm_page->control_register);
control_reg &= E3G_CLOCK_CLEAR_MASK;
switch (rate) {
case 96000:
clock = E3G_96KHZ;
break;
case 88200:
clock = E3G_88KHZ;
break;
case 48000:
clock = E3G_48KHZ;
break;
case 44100:
clock = E3G_44KHZ;
break;
case 32000:
clock = E3G_32KHZ;
break;
default:
clock = E3G_CONTINUOUS_CLOCK;
if (rate > 50000)
clock |= E3G_DOUBLE_SPEED_MODE;
break;
}
control_reg |= clock;
control_reg = set_spdif_bits(chip, control_reg, rate);
base_rate = rate;
if (base_rate > 50000)
base_rate /= 2;
if (base_rate < 32000)
base_rate = 32000;
frq_reg = E3G_MAGIC_NUMBER / base_rate - 2;
if (frq_reg > E3G_FREQ_REG_MAX)
frq_reg = E3G_FREQ_REG_MAX;
chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP */
chip->sample_rate = rate;
dev_dbg(chip->card->dev,
"SetSampleRate: %d clock %x\n", rate, control_reg);
/* Tell the DSP about it - DSP reads both control reg & freq reg */
return write_control_reg(chip, control_reg, frq_reg, 0);
}
/* Set the sample clock source to internal, S/PDIF, ADAT */
static int set_input_clock(struct echoaudio *chip, u16 clock)
{
u32 control_reg, clocks_from_dsp;
/* Mask off the clock select bits */
control_reg = le32_to_cpu(chip->comm_page->control_register) &
E3G_CLOCK_CLEAR_MASK;
clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks);
switch (clock) {
case ECHO_CLOCK_INTERNAL:
chip->input_clock = ECHO_CLOCK_INTERNAL;
return set_sample_rate(chip, chip->sample_rate);
case ECHO_CLOCK_SPDIF:
if (chip->digital_mode == DIGITAL_MODE_ADAT)
return -EAGAIN;
control_reg |= E3G_SPDIF_CLOCK;
if (clocks_from_dsp & E3G_CLOCK_DETECT_BIT_SPDIF96)
control_reg |= E3G_DOUBLE_SPEED_MODE;
else
control_reg &= ~E3G_DOUBLE_SPEED_MODE;
break;
case ECHO_CLOCK_ADAT:
if (chip->digital_mode != DIGITAL_MODE_ADAT)
return -EAGAIN;
control_reg |= E3G_ADAT_CLOCK;
control_reg &= ~E3G_DOUBLE_SPEED_MODE;
break;
case ECHO_CLOCK_WORD:
control_reg |= E3G_WORD_CLOCK;
if (clocks_from_dsp & E3G_CLOCK_DETECT_BIT_WORD96)
control_reg |= E3G_DOUBLE_SPEED_MODE;
else
control_reg &= ~E3G_DOUBLE_SPEED_MODE;
break;
default:
dev_err(chip->card->dev,
"Input clock 0x%x not supported for Echo3G\n", clock);
return -EINVAL;
}
chip->input_clock = clock;
return write_control_reg(chip, control_reg, get_frq_reg(chip), 1);
}
static int dsp_set_digital_mode(struct echoaudio *chip, u8 mode)
{
u32 control_reg;
int err, incompatible_clock;
/* Set clock to "internal" if it's not compatible with the new mode */
incompatible_clock = false;
switch (mode) {
case DIGITAL_MODE_SPDIF_OPTICAL:
case DIGITAL_MODE_SPDIF_RCA:
if (chip->input_clock == ECHO_CLOCK_ADAT)
incompatible_clock = true;
break;
case DIGITAL_MODE_ADAT:
if (chip->input_clock == ECHO_CLOCK_SPDIF)
incompatible_clock = true;
break;
default:
dev_err(chip->card->dev,
"Digital mode not supported: %d\n", mode);
return -EINVAL;
}
spin_lock_irq(&chip->lock);
if (incompatible_clock) {
chip->sample_rate = 48000;
set_input_clock(chip, ECHO_CLOCK_INTERNAL);
}
/* Clear the current digital mode */
control_reg = le32_to_cpu(chip->comm_page->control_register);
control_reg &= E3G_DIGITAL_MODE_CLEAR_MASK;
/* Tweak the control reg */
switch (mode) {
case DIGITAL_MODE_SPDIF_OPTICAL:
control_reg |= E3G_SPDIF_OPTICAL_MODE;
break;
case DIGITAL_MODE_SPDIF_RCA:
/* E3G_SPDIF_OPTICAL_MODE bit cleared */
break;
case DIGITAL_MODE_ADAT:
control_reg |= E3G_ADAT_MODE;
control_reg &= ~E3G_DOUBLE_SPEED_MODE; /* @@ useless */
break;
}
err = write_control_reg(chip, control_reg, get_frq_reg(chip), 1);
spin_unlock_irq(&chip->lock);
if (err < 0)
return err;
chip->digital_mode = mode;
dev_dbg(chip->card->dev, "set_digital_mode(%d)\n", chip->digital_mode);
return incompatible_clock;
}
| linux-master | sound/pci/echoaudio/echoaudio_3g.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* ALSA driver for Echoaudio soundcards.
* Copyright (C) 2003-2004 Giuliano Pochini <[email protected]>
*/
#define ECHO24_FAMILY
#define ECHOCARD_MONA
#define ECHOCARD_NAME "Mona"
#define ECHOCARD_HAS_MONITOR
#define ECHOCARD_HAS_ASIC
#define ECHOCARD_HAS_SUPER_INTERLEAVE
#define ECHOCARD_HAS_DIGITAL_IO
#define ECHOCARD_HAS_DIGITAL_IN_AUTOMUTE
#define ECHOCARD_HAS_DIGITAL_MODE_SWITCH
#define ECHOCARD_HAS_EXTERNAL_CLOCK
#define ECHOCARD_HAS_ADAT 6
#define ECHOCARD_HAS_STEREO_BIG_ENDIAN32
/* Pipe indexes */
#define PX_ANALOG_OUT 0 /* 6 */
#define PX_DIGITAL_OUT 6 /* 8 */
#define PX_ANALOG_IN 14 /* 4 */
#define PX_DIGITAL_IN 18 /* 8 */
#define PX_NUM 26
/* Bus indexes */
#define BX_ANALOG_OUT 0 /* 6 */
#define BX_DIGITAL_OUT 6 /* 8 */
#define BX_ANALOG_IN 14 /* 4 */
#define BX_DIGITAL_IN 18 /* 8 */
#define BX_NUM 26
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/pci.h>
#include <linux/module.h>
#include <linux/firmware.h>
#include <linux/slab.h>
#include <linux/io.h>
#include <sound/core.h>
#include <sound/info.h>
#include <sound/control.h>
#include <sound/tlv.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/asoundef.h>
#include <sound/initval.h>
#include <linux/atomic.h>
#include "echoaudio.h"
MODULE_FIRMWARE("ea/loader_dsp.fw");
MODULE_FIRMWARE("ea/mona_301_dsp.fw");
MODULE_FIRMWARE("ea/mona_361_dsp.fw");
MODULE_FIRMWARE("ea/mona_301_1_asic_48.fw");
MODULE_FIRMWARE("ea/mona_301_1_asic_96.fw");
MODULE_FIRMWARE("ea/mona_361_1_asic_48.fw");
MODULE_FIRMWARE("ea/mona_361_1_asic_96.fw");
MODULE_FIRMWARE("ea/mona_2_asic.fw");
#define FW_361_LOADER 0
#define FW_MONA_301_DSP 1
#define FW_MONA_361_DSP 2
#define FW_MONA_301_1_ASIC48 3
#define FW_MONA_301_1_ASIC96 4
#define FW_MONA_361_1_ASIC48 5
#define FW_MONA_361_1_ASIC96 6
#define FW_MONA_2_ASIC 7
static const struct firmware card_fw[] = {
{0, "loader_dsp.fw"},
{0, "mona_301_dsp.fw"},
{0, "mona_361_dsp.fw"},
{0, "mona_301_1_asic_48.fw"},
{0, "mona_301_1_asic_96.fw"},
{0, "mona_361_1_asic_48.fw"},
{0, "mona_361_1_asic_96.fw"},
{0, "mona_2_asic.fw"}
};
static const struct pci_device_id snd_echo_ids[] = {
{0x1057, 0x1801, 0xECC0, 0x0070, 0, 0, 0}, /* DSP 56301 Mona rev.0 */
{0x1057, 0x1801, 0xECC0, 0x0071, 0, 0, 0}, /* DSP 56301 Mona rev.1 */
{0x1057, 0x1801, 0xECC0, 0x0072, 0, 0, 0}, /* DSP 56301 Mona rev.2 */
{0x1057, 0x3410, 0xECC0, 0x0070, 0, 0, 0}, /* DSP 56361 Mona rev.0 */
{0x1057, 0x3410, 0xECC0, 0x0071, 0, 0, 0}, /* DSP 56361 Mona rev.1 */
{0x1057, 0x3410, 0xECC0, 0x0072, 0, 0, 0}, /* DSP 56361 Mona rev.2 */
{0,}
};
static const struct snd_pcm_hardware pcm_hardware_skel = {
.info = SNDRV_PCM_INFO_MMAP |
SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_MMAP_VALID |
SNDRV_PCM_INFO_PAUSE |
SNDRV_PCM_INFO_SYNC_START,
.formats = SNDRV_PCM_FMTBIT_U8 |
SNDRV_PCM_FMTBIT_S16_LE |
SNDRV_PCM_FMTBIT_S24_3LE |
SNDRV_PCM_FMTBIT_S32_LE |
SNDRV_PCM_FMTBIT_S32_BE,
.rates = SNDRV_PCM_RATE_8000_48000 |
SNDRV_PCM_RATE_88200 |
SNDRV_PCM_RATE_96000,
.rate_min = 8000,
.rate_max = 96000,
.channels_min = 1,
.channels_max = 8,
.buffer_bytes_max = 262144,
.period_bytes_min = 32,
.period_bytes_max = 131072,
.periods_min = 2,
.periods_max = 220,
/* One page (4k) contains 512 instructions. I don't know if the hw
supports lists longer than this. In this case periods_max=220 is a
safe limit to make sure the list never exceeds 512 instructions. */
};
#include "mona_dsp.c"
#include "echoaudio_dsp.c"
#include "echoaudio_gml.c"
#include "echoaudio.c"
| linux-master | sound/pci/echoaudio/mona.c |
/****************************************************************************
Copyright Echo Digital Audio Corporation (c) 1998 - 2004
All rights reserved
www.echoaudio.com
This file is part of Echo Digital Audio's generic driver library.
Echo Digital Audio's generic driver library is free software;
you can redistribute it and/or modify it under the terms of
the GNU General Public License as published by the Free Software
Foundation.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston,
MA 02111-1307, USA.
*************************************************************************
Translation from C++ and adaptation for use in ALSA-Driver
were made by Giuliano Pochini <[email protected]>
****************************************************************************/
static int write_control_reg(struct echoaudio *chip, u32 value, char force);
static int set_input_clock(struct echoaudio *chip, u16 clock);
static int set_professional_spdif(struct echoaudio *chip, char prof);
static int set_digital_mode(struct echoaudio *chip, u8 mode);
static int load_asic_generic(struct echoaudio *chip, u32 cmd, short asic);
static int check_asic_status(struct echoaudio *chip);
static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id)
{
int err;
if (snd_BUG_ON((subdevice_id & 0xfff0) != GINA24))
return -ENODEV;
err = init_dsp_comm_page(chip);
if (err) {
dev_err(chip->card->dev,
"init_hw - could not initialize DSP comm page\n");
return err;
}
chip->device_id = device_id;
chip->subdevice_id = subdevice_id;
chip->bad_board = true;
chip->input_clock_types =
ECHO_CLOCK_BIT_INTERNAL | ECHO_CLOCK_BIT_SPDIF |
ECHO_CLOCK_BIT_ESYNC | ECHO_CLOCK_BIT_ESYNC96 |
ECHO_CLOCK_BIT_ADAT;
/* Gina24 comes in both '301 and '361 flavors */
if (chip->device_id == DEVICE_ID_56361) {
chip->dsp_code_to_load = FW_GINA24_361_DSP;
chip->digital_modes =
ECHOCAPS_HAS_DIGITAL_MODE_SPDIF_RCA |
ECHOCAPS_HAS_DIGITAL_MODE_SPDIF_OPTICAL |
ECHOCAPS_HAS_DIGITAL_MODE_ADAT;
} else {
chip->dsp_code_to_load = FW_GINA24_301_DSP;
chip->digital_modes =
ECHOCAPS_HAS_DIGITAL_MODE_SPDIF_RCA |
ECHOCAPS_HAS_DIGITAL_MODE_SPDIF_OPTICAL |
ECHOCAPS_HAS_DIGITAL_MODE_ADAT |
ECHOCAPS_HAS_DIGITAL_MODE_SPDIF_CDROM;
}
err = load_firmware(chip);
if (err < 0)
return err;
chip->bad_board = false;
return err;
}
static int set_mixer_defaults(struct echoaudio *chip)
{
chip->digital_mode = DIGITAL_MODE_SPDIF_RCA;
chip->professional_spdif = false;
chip->digital_in_automute = true;
return init_line_levels(chip);
}
static u32 detect_input_clocks(const struct echoaudio *chip)
{
u32 clocks_from_dsp, clock_bits;
/* Map the DSP clock detect bits to the generic driver clock
detect bits */
clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks);
clock_bits = ECHO_CLOCK_BIT_INTERNAL;
if (clocks_from_dsp & GML_CLOCK_DETECT_BIT_SPDIF)
clock_bits |= ECHO_CLOCK_BIT_SPDIF;
if (clocks_from_dsp & GML_CLOCK_DETECT_BIT_ADAT)
clock_bits |= ECHO_CLOCK_BIT_ADAT;
if (clocks_from_dsp & GML_CLOCK_DETECT_BIT_ESYNC)
clock_bits |= ECHO_CLOCK_BIT_ESYNC | ECHO_CLOCK_BIT_ESYNC96;
return clock_bits;
}
/* Gina24 has an ASIC on the PCI card which must be loaded for anything
interesting to happen. */
static int load_asic(struct echoaudio *chip)
{
u32 control_reg;
int err;
short asic;
if (chip->asic_loaded)
return 1;
/* Give the DSP a few milliseconds to settle down */
mdelay(10);
/* Pick the correct ASIC for '301 or '361 Gina24 */
if (chip->device_id == DEVICE_ID_56361)
asic = FW_GINA24_361_ASIC;
else
asic = FW_GINA24_301_ASIC;
err = load_asic_generic(chip, DSP_FNC_LOAD_GINA24_ASIC, asic);
if (err < 0)
return err;
chip->asic_code = asic;
/* Now give the new ASIC a little time to set up */
mdelay(10);
/* See if it worked */
err = check_asic_status(chip);
/* Set up the control register if the load succeeded -
48 kHz, internal clock, S/PDIF RCA mode */
if (!err) {
control_reg = GML_CONVERTER_ENABLE | GML_48KHZ;
err = write_control_reg(chip, control_reg, true);
}
return err;
}
static int set_sample_rate(struct echoaudio *chip, u32 rate)
{
u32 control_reg, clock;
if (snd_BUG_ON(rate >= 50000 &&
chip->digital_mode == DIGITAL_MODE_ADAT))
return -EINVAL;
/* Only set the clock for internal mode. */
if (chip->input_clock != ECHO_CLOCK_INTERNAL) {
dev_warn(chip->card->dev,
"Cannot set sample rate - clock not set to CLK_CLOCKININTERNAL\n");
/* Save the rate anyhow */
chip->comm_page->sample_rate = cpu_to_le32(rate);
chip->sample_rate = rate;
return 0;
}
clock = 0;
control_reg = le32_to_cpu(chip->comm_page->control_register);
control_reg &= GML_CLOCK_CLEAR_MASK & GML_SPDIF_RATE_CLEAR_MASK;
switch (rate) {
case 96000:
clock = GML_96KHZ;
break;
case 88200:
clock = GML_88KHZ;
break;
case 48000:
clock = GML_48KHZ | GML_SPDIF_SAMPLE_RATE1;
break;
case 44100:
clock = GML_44KHZ;
/* Professional mode ? */
if (control_reg & GML_SPDIF_PRO_MODE)
clock |= GML_SPDIF_SAMPLE_RATE0;
break;
case 32000:
clock = GML_32KHZ | GML_SPDIF_SAMPLE_RATE0 |
GML_SPDIF_SAMPLE_RATE1;
break;
case 22050:
clock = GML_22KHZ;
break;
case 16000:
clock = GML_16KHZ;
break;
case 11025:
clock = GML_11KHZ;
break;
case 8000:
clock = GML_8KHZ;
break;
default:
dev_err(chip->card->dev,
"set_sample_rate: %d invalid!\n", rate);
return -EINVAL;
}
control_reg |= clock;
chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP */
chip->sample_rate = rate;
dev_dbg(chip->card->dev, "set_sample_rate: %d clock %d\n", rate, clock);
return write_control_reg(chip, control_reg, false);
}
static int set_input_clock(struct echoaudio *chip, u16 clock)
{
u32 control_reg, clocks_from_dsp;
/* Mask off the clock select bits */
control_reg = le32_to_cpu(chip->comm_page->control_register) &
GML_CLOCK_CLEAR_MASK;
clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks);
switch (clock) {
case ECHO_CLOCK_INTERNAL:
chip->input_clock = ECHO_CLOCK_INTERNAL;
return set_sample_rate(chip, chip->sample_rate);
case ECHO_CLOCK_SPDIF:
if (chip->digital_mode == DIGITAL_MODE_ADAT)
return -EAGAIN;
control_reg |= GML_SPDIF_CLOCK;
if (clocks_from_dsp & GML_CLOCK_DETECT_BIT_SPDIF96)
control_reg |= GML_DOUBLE_SPEED_MODE;
else
control_reg &= ~GML_DOUBLE_SPEED_MODE;
break;
case ECHO_CLOCK_ADAT:
if (chip->digital_mode != DIGITAL_MODE_ADAT)
return -EAGAIN;
control_reg |= GML_ADAT_CLOCK;
control_reg &= ~GML_DOUBLE_SPEED_MODE;
break;
case ECHO_CLOCK_ESYNC:
control_reg |= GML_ESYNC_CLOCK;
control_reg &= ~GML_DOUBLE_SPEED_MODE;
break;
case ECHO_CLOCK_ESYNC96:
control_reg |= GML_ESYNC_CLOCK | GML_DOUBLE_SPEED_MODE;
break;
default:
dev_err(chip->card->dev,
"Input clock 0x%x not supported for Gina24\n", clock);
return -EINVAL;
}
chip->input_clock = clock;
return write_control_reg(chip, control_reg, true);
}
static int dsp_set_digital_mode(struct echoaudio *chip, u8 mode)
{
u32 control_reg;
int err, incompatible_clock;
/* Set clock to "internal" if it's not compatible with the new mode */
incompatible_clock = false;
switch (mode) {
case DIGITAL_MODE_SPDIF_OPTICAL:
case DIGITAL_MODE_SPDIF_CDROM:
case DIGITAL_MODE_SPDIF_RCA:
if (chip->input_clock == ECHO_CLOCK_ADAT)
incompatible_clock = true;
break;
case DIGITAL_MODE_ADAT:
if (chip->input_clock == ECHO_CLOCK_SPDIF)
incompatible_clock = true;
break;
default:
dev_err(chip->card->dev,
"Digital mode not supported: %d\n", mode);
return -EINVAL;
}
spin_lock_irq(&chip->lock);
if (incompatible_clock) { /* Switch to 48KHz, internal */
chip->sample_rate = 48000;
set_input_clock(chip, ECHO_CLOCK_INTERNAL);
}
/* Clear the current digital mode */
control_reg = le32_to_cpu(chip->comm_page->control_register);
control_reg &= GML_DIGITAL_MODE_CLEAR_MASK;
/* Tweak the control reg */
switch (mode) {
case DIGITAL_MODE_SPDIF_OPTICAL:
control_reg |= GML_SPDIF_OPTICAL_MODE;
break;
case DIGITAL_MODE_SPDIF_CDROM:
/* '361 Gina24 cards do not have the S/PDIF CD-ROM mode */
if (chip->device_id == DEVICE_ID_56301)
control_reg |= GML_SPDIF_CDROM_MODE;
break;
case DIGITAL_MODE_SPDIF_RCA:
/* GML_SPDIF_OPTICAL_MODE bit cleared */
break;
case DIGITAL_MODE_ADAT:
control_reg |= GML_ADAT_MODE;
control_reg &= ~GML_DOUBLE_SPEED_MODE;
break;
}
err = write_control_reg(chip, control_reg, true);
spin_unlock_irq(&chip->lock);
if (err < 0)
return err;
chip->digital_mode = mode;
dev_dbg(chip->card->dev,
"set_digital_mode to %d\n", chip->digital_mode);
return incompatible_clock;
}
| linux-master | sound/pci/echoaudio/gina24_dsp.c |
/***************************************************************************
Copyright Echo Digital Audio Corporation (c) 1998 - 2004
All rights reserved
www.echoaudio.com
This file is part of Echo Digital Audio's generic driver library.
Echo Digital Audio's generic driver library is free software;
you can redistribute it and/or modify it under the terms of
the GNU General Public License as published by the Free Software
Foundation.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston,
MA 02111-1307, USA.
*************************************************************************
Translation from C++ and adaptation for use in ALSA-Driver
were made by Giuliano Pochini <[email protected]>
****************************************************************************/
static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id)
{
int err;
if (snd_BUG_ON((subdevice_id & 0xfff0) != DARLA20))
return -ENODEV;
err = init_dsp_comm_page(chip);
if (err) {
dev_err(chip->card->dev,
"init_hw: could not initialize DSP comm page\n");
return err;
}
chip->device_id = device_id;
chip->subdevice_id = subdevice_id;
chip->bad_board = true;
chip->dsp_code_to_load = FW_DARLA20_DSP;
chip->spdif_status = GD_SPDIF_STATUS_UNDEF;
chip->clock_state = GD_CLOCK_UNDEF;
/* Since this card has no ASIC, mark it as loaded so everything
works OK */
chip->asic_loaded = true;
chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL;
err = load_firmware(chip);
if (err < 0)
return err;
chip->bad_board = false;
return err;
}
static int set_mixer_defaults(struct echoaudio *chip)
{
return init_line_levels(chip);
}
/* The Darla20 has no external clock sources */
static u32 detect_input_clocks(const struct echoaudio *chip)
{
return ECHO_CLOCK_BIT_INTERNAL;
}
/* The Darla20 has no ASIC. Just do nothing */
static int load_asic(struct echoaudio *chip)
{
return 0;
}
static int set_sample_rate(struct echoaudio *chip, u32 rate)
{
u8 clock_state, spdif_status;
if (wait_handshake(chip))
return -EIO;
switch (rate) {
case 44100:
clock_state = GD_CLOCK_44;
spdif_status = GD_SPDIF_STATUS_44;
break;
case 48000:
clock_state = GD_CLOCK_48;
spdif_status = GD_SPDIF_STATUS_48;
break;
default:
clock_state = GD_CLOCK_NOCHANGE;
spdif_status = GD_SPDIF_STATUS_NOCHANGE;
break;
}
if (chip->clock_state == clock_state)
clock_state = GD_CLOCK_NOCHANGE;
if (spdif_status == chip->spdif_status)
spdif_status = GD_SPDIF_STATUS_NOCHANGE;
chip->comm_page->sample_rate = cpu_to_le32(rate);
chip->comm_page->gd_clock_state = clock_state;
chip->comm_page->gd_spdif_status = spdif_status;
chip->comm_page->gd_resampler_state = 3; /* magic number - should always be 3 */
/* Save the new audio state if it changed */
if (clock_state != GD_CLOCK_NOCHANGE)
chip->clock_state = clock_state;
if (spdif_status != GD_SPDIF_STATUS_NOCHANGE)
chip->spdif_status = spdif_status;
chip->sample_rate = rate;
clear_handshake(chip);
return send_vector(chip, DSP_VC_SET_GD_AUDIO_STATE);
}
| linux-master | sound/pci/echoaudio/darla20_dsp.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* ALSA driver for Echoaudio soundcards.
* Copyright (C) 2003-2004 Giuliano Pochini <[email protected]>
* Copyright (C) 2020 Mark Hills <[email protected]>
*/
#include <linux/module.h>
MODULE_AUTHOR("Giuliano Pochini <[email protected]>");
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("Echoaudio " ECHOCARD_NAME " soundcards driver");
MODULE_DEVICE_TABLE(pci, snd_echo_ids);
static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
module_param_array(index, int, NULL, 0444);
MODULE_PARM_DESC(index, "Index value for " ECHOCARD_NAME " soundcard.");
module_param_array(id, charp, NULL, 0444);
MODULE_PARM_DESC(id, "ID string for " ECHOCARD_NAME " soundcard.");
module_param_array(enable, bool, NULL, 0444);
MODULE_PARM_DESC(enable, "Enable " ECHOCARD_NAME " soundcard.");
static const unsigned int channels_list[10] = {1, 2, 4, 6, 8, 10, 12, 14, 16, 999999};
static const DECLARE_TLV_DB_SCALE(db_scale_output_gain, -12800, 100, 1);
static int get_firmware(const struct firmware **fw_entry,
struct echoaudio *chip, const short fw_index)
{
int err;
char name[30];
#ifdef CONFIG_PM_SLEEP
if (chip->fw_cache[fw_index]) {
dev_dbg(chip->card->dev,
"firmware requested: %s is cached\n",
card_fw[fw_index].data);
*fw_entry = chip->fw_cache[fw_index];
return 0;
}
#endif
dev_dbg(chip->card->dev,
"firmware requested: %s\n", card_fw[fw_index].data);
snprintf(name, sizeof(name), "ea/%s", card_fw[fw_index].data);
err = request_firmware(fw_entry, name, &chip->pci->dev);
if (err < 0)
dev_err(chip->card->dev,
"get_firmware(): Firmware not available (%d)\n", err);
#ifdef CONFIG_PM_SLEEP
else
chip->fw_cache[fw_index] = *fw_entry;
#endif
return err;
}
static void free_firmware(const struct firmware *fw_entry,
struct echoaudio *chip)
{
#ifdef CONFIG_PM_SLEEP
dev_dbg(chip->card->dev, "firmware not released (kept in cache)\n");
#else
release_firmware(fw_entry);
#endif
}
static void free_firmware_cache(struct echoaudio *chip)
{
#ifdef CONFIG_PM_SLEEP
int i;
for (i = 0; i < 8 ; i++)
if (chip->fw_cache[i]) {
release_firmware(chip->fw_cache[i]);
dev_dbg(chip->card->dev, "release_firmware(%d)\n", i);
}
#endif
}
/******************************************************************************
PCM interface
******************************************************************************/
static void audiopipe_free(struct snd_pcm_runtime *runtime)
{
struct audiopipe *pipe = runtime->private_data;
if (pipe->sgpage.area)
snd_dma_free_pages(&pipe->sgpage);
kfree(pipe);
}
static int hw_rule_capture_format_by_channels(struct snd_pcm_hw_params *params,
struct snd_pcm_hw_rule *rule)
{
struct snd_interval *c = hw_param_interval(params,
SNDRV_PCM_HW_PARAM_CHANNELS);
struct snd_mask *f = hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT);
struct snd_mask fmt;
snd_mask_any(&fmt);
#ifndef ECHOCARD_HAS_STEREO_BIG_ENDIAN32
/* >=2 channels cannot be S32_BE */
if (c->min == 2) {
fmt.bits[0] &= ~SNDRV_PCM_FMTBIT_S32_BE;
return snd_mask_refine(f, &fmt);
}
#endif
/* > 2 channels cannot be U8 and S32_BE */
if (c->min > 2) {
fmt.bits[0] &= ~(SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S32_BE);
return snd_mask_refine(f, &fmt);
}
/* Mono is ok with any format */
return 0;
}
static int hw_rule_capture_channels_by_format(struct snd_pcm_hw_params *params,
struct snd_pcm_hw_rule *rule)
{
struct snd_interval *c = hw_param_interval(params,
SNDRV_PCM_HW_PARAM_CHANNELS);
struct snd_mask *f = hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT);
struct snd_interval ch;
snd_interval_any(&ch);
/* S32_BE is mono (and stereo) only */
if (f->bits[0] == SNDRV_PCM_FMTBIT_S32_BE) {
ch.min = 1;
#ifdef ECHOCARD_HAS_STEREO_BIG_ENDIAN32
ch.max = 2;
#else
ch.max = 1;
#endif
ch.integer = 1;
return snd_interval_refine(c, &ch);
}
/* U8 can be only mono or stereo */
if (f->bits[0] == SNDRV_PCM_FMTBIT_U8) {
ch.min = 1;
ch.max = 2;
ch.integer = 1;
return snd_interval_refine(c, &ch);
}
/* S16_LE, S24_3LE and S32_LE support any number of channels. */
return 0;
}
static int hw_rule_playback_format_by_channels(struct snd_pcm_hw_params *params,
struct snd_pcm_hw_rule *rule)
{
struct snd_interval *c = hw_param_interval(params,
SNDRV_PCM_HW_PARAM_CHANNELS);
struct snd_mask *f = hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT);
struct snd_mask fmt;
u64 fmask;
snd_mask_any(&fmt);
fmask = fmt.bits[0] + ((u64)fmt.bits[1] << 32);
/* >2 channels must be S16_LE, S24_3LE or S32_LE */
if (c->min > 2) {
fmask &= SNDRV_PCM_FMTBIT_S16_LE |
SNDRV_PCM_FMTBIT_S24_3LE |
SNDRV_PCM_FMTBIT_S32_LE;
/* 1 channel must be S32_BE or S32_LE */
} else if (c->max == 1)
fmask &= SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S32_BE;
#ifndef ECHOCARD_HAS_STEREO_BIG_ENDIAN32
/* 2 channels cannot be S32_BE */
else if (c->min == 2 && c->max == 2)
fmask &= ~SNDRV_PCM_FMTBIT_S32_BE;
#endif
else
return 0;
fmt.bits[0] &= (u32)fmask;
fmt.bits[1] &= (u32)(fmask >> 32);
return snd_mask_refine(f, &fmt);
}
static int hw_rule_playback_channels_by_format(struct snd_pcm_hw_params *params,
struct snd_pcm_hw_rule *rule)
{
struct snd_interval *c = hw_param_interval(params,
SNDRV_PCM_HW_PARAM_CHANNELS);
struct snd_mask *f = hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT);
struct snd_interval ch;
u64 fmask;
snd_interval_any(&ch);
ch.integer = 1;
fmask = f->bits[0] + ((u64)f->bits[1] << 32);
/* S32_BE is mono (and stereo) only */
if (fmask == SNDRV_PCM_FMTBIT_S32_BE) {
ch.min = 1;
#ifdef ECHOCARD_HAS_STEREO_BIG_ENDIAN32
ch.max = 2;
#else
ch.max = 1;
#endif
/* U8 is stereo only */
} else if (fmask == SNDRV_PCM_FMTBIT_U8)
ch.min = ch.max = 2;
/* S16_LE and S24_3LE must be at least stereo */
else if (!(fmask & ~(SNDRV_PCM_FMTBIT_S16_LE |
SNDRV_PCM_FMTBIT_S24_3LE)))
ch.min = 2;
else
return 0;
return snd_interval_refine(c, &ch);
}
/* Since the sample rate is a global setting, do allow the user to change the
sample rate only if there is only one pcm device open. */
static int hw_rule_sample_rate(struct snd_pcm_hw_params *params,
struct snd_pcm_hw_rule *rule)
{
struct snd_interval *rate = hw_param_interval(params,
SNDRV_PCM_HW_PARAM_RATE);
struct echoaudio *chip = rule->private;
struct snd_interval fixed;
int err;
mutex_lock(&chip->mode_mutex);
if (chip->can_set_rate) {
err = 0;
} else {
snd_interval_any(&fixed);
fixed.min = fixed.max = chip->sample_rate;
err = snd_interval_refine(rate, &fixed);
}
mutex_unlock(&chip->mode_mutex);
return err;
}
static int pcm_open(struct snd_pcm_substream *substream,
signed char max_channels)
{
struct echoaudio *chip;
struct snd_pcm_runtime *runtime;
struct audiopipe *pipe;
int err, i;
if (max_channels <= 0)
return -EAGAIN;
chip = snd_pcm_substream_chip(substream);
runtime = substream->runtime;
pipe = kzalloc(sizeof(struct audiopipe), GFP_KERNEL);
if (!pipe)
return -ENOMEM;
pipe->index = -1; /* Not configured yet */
/* Set up hw capabilities and contraints */
memcpy(&pipe->hw, &pcm_hardware_skel, sizeof(struct snd_pcm_hardware));
dev_dbg(chip->card->dev, "max_channels=%d\n", max_channels);
pipe->constr.list = channels_list;
pipe->constr.mask = 0;
for (i = 0; channels_list[i] <= max_channels; i++);
pipe->constr.count = i;
if (pipe->hw.channels_max > max_channels)
pipe->hw.channels_max = max_channels;
if (chip->digital_mode == DIGITAL_MODE_ADAT) {
pipe->hw.rate_max = 48000;
pipe->hw.rates &= SNDRV_PCM_RATE_8000_48000;
}
runtime->hw = pipe->hw;
runtime->private_data = pipe;
runtime->private_free = audiopipe_free;
snd_pcm_set_sync(substream);
/* Only mono and any even number of channels are allowed */
err = snd_pcm_hw_constraint_list(runtime, 0,
SNDRV_PCM_HW_PARAM_CHANNELS,
&pipe->constr);
if (err < 0)
return err;
/* All periods should have the same size */
err = snd_pcm_hw_constraint_integer(runtime,
SNDRV_PCM_HW_PARAM_PERIODS);
if (err < 0)
return err;
/* The hw accesses memory in chunks 32 frames long and they should be
32-bytes-aligned. It's not a requirement, but it seems that IRQs are
generated with a resolution of 32 frames. Thus we need the following */
err = snd_pcm_hw_constraint_step(runtime, 0,
SNDRV_PCM_HW_PARAM_PERIOD_SIZE, 32);
if (err < 0)
return err;
err = snd_pcm_hw_constraint_step(runtime, 0,
SNDRV_PCM_HW_PARAM_BUFFER_SIZE, 32);
if (err < 0)
return err;
err = snd_pcm_hw_rule_add(substream->runtime, 0,
SNDRV_PCM_HW_PARAM_RATE,
hw_rule_sample_rate, chip,
SNDRV_PCM_HW_PARAM_RATE, -1);
if (err < 0)
return err;
/* Allocate a page for the scatter-gather list */
err = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV,
&chip->pci->dev,
PAGE_SIZE, &pipe->sgpage);
if (err < 0) {
dev_err(chip->card->dev, "s-g list allocation failed\n");
return err;
}
/*
* Sole ownership required to set the rate
*/
dev_dbg(chip->card->dev, "pcm_open opencount=%d can_set_rate=%d, rate_set=%d",
chip->opencount, chip->can_set_rate, chip->rate_set);
chip->opencount++;
if (chip->opencount > 1 && chip->rate_set)
chip->can_set_rate = 0;
return 0;
}
static int pcm_analog_in_open(struct snd_pcm_substream *substream)
{
struct echoaudio *chip = snd_pcm_substream_chip(substream);
int err;
err = pcm_open(substream,
num_analog_busses_in(chip) - substream->number);
if (err < 0)
return err;
err = snd_pcm_hw_rule_add(substream->runtime, 0,
SNDRV_PCM_HW_PARAM_CHANNELS,
hw_rule_capture_channels_by_format, NULL,
SNDRV_PCM_HW_PARAM_FORMAT, -1);
if (err < 0)
return err;
err = snd_pcm_hw_rule_add(substream->runtime, 0,
SNDRV_PCM_HW_PARAM_FORMAT,
hw_rule_capture_format_by_channels, NULL,
SNDRV_PCM_HW_PARAM_CHANNELS, -1);
if (err < 0)
return err;
return 0;
}
static int pcm_analog_out_open(struct snd_pcm_substream *substream)
{
struct echoaudio *chip = snd_pcm_substream_chip(substream);
int max_channels, err;
#ifdef ECHOCARD_HAS_VMIXER
max_channels = num_pipes_out(chip);
#else
max_channels = num_analog_busses_out(chip);
#endif
err = pcm_open(substream, max_channels - substream->number);
if (err < 0)
return err;
err = snd_pcm_hw_rule_add(substream->runtime, 0,
SNDRV_PCM_HW_PARAM_CHANNELS,
hw_rule_playback_channels_by_format,
NULL,
SNDRV_PCM_HW_PARAM_FORMAT, -1);
if (err < 0)
return err;
err = snd_pcm_hw_rule_add(substream->runtime, 0,
SNDRV_PCM_HW_PARAM_FORMAT,
hw_rule_playback_format_by_channels,
NULL,
SNDRV_PCM_HW_PARAM_CHANNELS, -1);
if (err < 0)
return err;
return 0;
}
#ifdef ECHOCARD_HAS_DIGITAL_IO
static int pcm_digital_in_open(struct snd_pcm_substream *substream)
{
struct echoaudio *chip = snd_pcm_substream_chip(substream);
int err, max_channels;
max_channels = num_digital_busses_in(chip) - substream->number;
mutex_lock(&chip->mode_mutex);
if (chip->digital_mode == DIGITAL_MODE_ADAT)
err = pcm_open(substream, max_channels);
else /* If the card has ADAT, subtract the 6 channels
* that S/PDIF doesn't have
*/
err = pcm_open(substream, max_channels - ECHOCARD_HAS_ADAT);
if (err < 0)
goto din_exit;
err = snd_pcm_hw_rule_add(substream->runtime, 0,
SNDRV_PCM_HW_PARAM_CHANNELS,
hw_rule_capture_channels_by_format, NULL,
SNDRV_PCM_HW_PARAM_FORMAT, -1);
if (err < 0)
goto din_exit;
err = snd_pcm_hw_rule_add(substream->runtime, 0,
SNDRV_PCM_HW_PARAM_FORMAT,
hw_rule_capture_format_by_channels, NULL,
SNDRV_PCM_HW_PARAM_CHANNELS, -1);
if (err < 0)
goto din_exit;
din_exit:
mutex_unlock(&chip->mode_mutex);
return err;
}
#ifndef ECHOCARD_HAS_VMIXER /* See the note in snd_echo_new_pcm() */
static int pcm_digital_out_open(struct snd_pcm_substream *substream)
{
struct echoaudio *chip = snd_pcm_substream_chip(substream);
int err, max_channels;
max_channels = num_digital_busses_out(chip) - substream->number;
mutex_lock(&chip->mode_mutex);
if (chip->digital_mode == DIGITAL_MODE_ADAT)
err = pcm_open(substream, max_channels);
else /* If the card has ADAT, subtract the 6 channels
* that S/PDIF doesn't have
*/
err = pcm_open(substream, max_channels - ECHOCARD_HAS_ADAT);
if (err < 0)
goto dout_exit;
err = snd_pcm_hw_rule_add(substream->runtime, 0,
SNDRV_PCM_HW_PARAM_CHANNELS,
hw_rule_playback_channels_by_format,
NULL, SNDRV_PCM_HW_PARAM_FORMAT,
-1);
if (err < 0)
goto dout_exit;
err = snd_pcm_hw_rule_add(substream->runtime, 0,
SNDRV_PCM_HW_PARAM_FORMAT,
hw_rule_playback_format_by_channels,
NULL, SNDRV_PCM_HW_PARAM_CHANNELS,
-1);
if (err < 0)
goto dout_exit;
dout_exit:
mutex_unlock(&chip->mode_mutex);
return err;
}
#endif /* !ECHOCARD_HAS_VMIXER */
#endif /* ECHOCARD_HAS_DIGITAL_IO */
static int pcm_close(struct snd_pcm_substream *substream)
{
struct echoaudio *chip = snd_pcm_substream_chip(substream);
/* Nothing to do here. Audio is already off and pipe will be
* freed by its callback
*/
mutex_lock(&chip->mode_mutex);
dev_dbg(chip->card->dev, "pcm_open opencount=%d can_set_rate=%d, rate_set=%d",
chip->opencount, chip->can_set_rate, chip->rate_set);
chip->opencount--;
switch (chip->opencount) {
case 1:
chip->can_set_rate = 1;
break;
case 0:
chip->rate_set = 0;
break;
}
mutex_unlock(&chip->mode_mutex);
return 0;
}
/* Channel allocation and scatter-gather list setup */
static int init_engine(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *hw_params,
int pipe_index, int interleave)
{
struct echoaudio *chip;
int err, per, rest, page, edge, offs;
struct audiopipe *pipe;
chip = snd_pcm_substream_chip(substream);
pipe = (struct audiopipe *) substream->runtime->private_data;
/* Sets up che hardware. If it's already initialized, reset and
* redo with the new parameters
*/
spin_lock_irq(&chip->lock);
if (pipe->index >= 0) {
dev_dbg(chip->card->dev, "hwp_ie free(%d)\n", pipe->index);
err = free_pipes(chip, pipe);
snd_BUG_ON(err);
chip->substream[pipe->index] = NULL;
}
err = allocate_pipes(chip, pipe, pipe_index, interleave);
if (err < 0) {
spin_unlock_irq(&chip->lock);
dev_err(chip->card->dev, "allocate_pipes(%d) err=%d\n",
pipe_index, err);
return err;
}
spin_unlock_irq(&chip->lock);
dev_dbg(chip->card->dev, "allocate_pipes()=%d\n", pipe_index);
dev_dbg(chip->card->dev,
"pcm_hw_params (bufsize=%dB periods=%d persize=%dB)\n",
params_buffer_bytes(hw_params), params_periods(hw_params),
params_period_bytes(hw_params));
sglist_init(chip, pipe);
edge = PAGE_SIZE;
for (offs = page = per = 0; offs < params_buffer_bytes(hw_params);
per++) {
rest = params_period_bytes(hw_params);
if (offs + rest > params_buffer_bytes(hw_params))
rest = params_buffer_bytes(hw_params) - offs;
while (rest) {
dma_addr_t addr;
addr = snd_pcm_sgbuf_get_addr(substream, offs);
if (rest <= edge - offs) {
sglist_add_mapping(chip, pipe, addr, rest);
sglist_add_irq(chip, pipe);
offs += rest;
rest = 0;
} else {
sglist_add_mapping(chip, pipe, addr,
edge - offs);
rest -= edge - offs;
offs = edge;
}
if (offs == edge) {
edge += PAGE_SIZE;
page++;
}
}
}
/* Close the ring buffer */
sglist_wrap(chip, pipe);
/* This stuff is used by the irq handler, so it must be
* initialized before chip->substream
*/
pipe->last_period = 0;
pipe->last_counter = 0;
pipe->position = 0;
smp_wmb();
chip->substream[pipe_index] = substream;
chip->rate_set = 1;
spin_lock_irq(&chip->lock);
set_sample_rate(chip, hw_params->rate_num / hw_params->rate_den);
spin_unlock_irq(&chip->lock);
return 0;
}
static int pcm_analog_in_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *hw_params)
{
struct echoaudio *chip = snd_pcm_substream_chip(substream);
return init_engine(substream, hw_params, px_analog_in(chip) +
substream->number, params_channels(hw_params));
}
static int pcm_analog_out_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *hw_params)
{
return init_engine(substream, hw_params, substream->number,
params_channels(hw_params));
}
#ifdef ECHOCARD_HAS_DIGITAL_IO
static int pcm_digital_in_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *hw_params)
{
struct echoaudio *chip = snd_pcm_substream_chip(substream);
return init_engine(substream, hw_params, px_digital_in(chip) +
substream->number, params_channels(hw_params));
}
#ifndef ECHOCARD_HAS_VMIXER /* See the note in snd_echo_new_pcm() */
static int pcm_digital_out_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *hw_params)
{
struct echoaudio *chip = snd_pcm_substream_chip(substream);
return init_engine(substream, hw_params, px_digital_out(chip) +
substream->number, params_channels(hw_params));
}
#endif /* !ECHOCARD_HAS_VMIXER */
#endif /* ECHOCARD_HAS_DIGITAL_IO */
static int pcm_hw_free(struct snd_pcm_substream *substream)
{
struct echoaudio *chip;
struct audiopipe *pipe;
chip = snd_pcm_substream_chip(substream);
pipe = (struct audiopipe *) substream->runtime->private_data;
spin_lock_irq(&chip->lock);
if (pipe->index >= 0) {
dev_dbg(chip->card->dev, "pcm_hw_free(%d)\n", pipe->index);
free_pipes(chip, pipe);
chip->substream[pipe->index] = NULL;
pipe->index = -1;
}
spin_unlock_irq(&chip->lock);
return 0;
}
static int pcm_prepare(struct snd_pcm_substream *substream)
{
struct echoaudio *chip = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
struct audioformat format;
int pipe_index = ((struct audiopipe *)runtime->private_data)->index;
dev_dbg(chip->card->dev, "Prepare rate=%d format=%d channels=%d\n",
runtime->rate, runtime->format, runtime->channels);
format.interleave = runtime->channels;
format.data_are_bigendian = 0;
format.mono_to_stereo = 0;
switch (runtime->format) {
case SNDRV_PCM_FORMAT_U8:
format.bits_per_sample = 8;
break;
case SNDRV_PCM_FORMAT_S16_LE:
format.bits_per_sample = 16;
break;
case SNDRV_PCM_FORMAT_S24_3LE:
format.bits_per_sample = 24;
break;
case SNDRV_PCM_FORMAT_S32_BE:
format.data_are_bigendian = 1;
fallthrough;
case SNDRV_PCM_FORMAT_S32_LE:
format.bits_per_sample = 32;
break;
default:
dev_err(chip->card->dev,
"Prepare error: unsupported format %d\n",
runtime->format);
return -EINVAL;
}
if (snd_BUG_ON(pipe_index >= px_num(chip)))
return -EINVAL;
/*
* We passed checks we can do independently; now take
* exclusive control
*/
spin_lock_irq(&chip->lock);
if (snd_BUG_ON(!is_pipe_allocated(chip, pipe_index))) {
spin_unlock_irq(&chip->lock);
return -EINVAL;
}
set_audio_format(chip, pipe_index, &format);
spin_unlock_irq(&chip->lock);
return 0;
}
static int pcm_trigger(struct snd_pcm_substream *substream, int cmd)
{
struct echoaudio *chip = snd_pcm_substream_chip(substream);
struct audiopipe *pipe;
int i, err;
u32 channelmask = 0;
struct snd_pcm_substream *s;
snd_pcm_group_for_each_entry(s, substream) {
for (i = 0; i < DSP_MAXPIPES; i++) {
if (s == chip->substream[i]) {
channelmask |= 1 << i;
snd_pcm_trigger_done(s, substream);
}
}
}
spin_lock(&chip->lock);
switch (cmd) {
case SNDRV_PCM_TRIGGER_RESUME:
case SNDRV_PCM_TRIGGER_START:
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
for (i = 0; i < DSP_MAXPIPES; i++) {
if (channelmask & (1 << i)) {
pipe = chip->substream[i]->runtime->private_data;
switch (pipe->state) {
case PIPE_STATE_STOPPED:
pipe->last_period = 0;
pipe->last_counter = 0;
pipe->position = 0;
*pipe->dma_counter = 0;
fallthrough;
case PIPE_STATE_PAUSED:
pipe->state = PIPE_STATE_STARTED;
break;
case PIPE_STATE_STARTED:
break;
}
}
}
err = start_transport(chip, channelmask,
chip->pipe_cyclic_mask);
break;
case SNDRV_PCM_TRIGGER_SUSPEND:
case SNDRV_PCM_TRIGGER_STOP:
for (i = 0; i < DSP_MAXPIPES; i++) {
if (channelmask & (1 << i)) {
pipe = chip->substream[i]->runtime->private_data;
pipe->state = PIPE_STATE_STOPPED;
}
}
err = stop_transport(chip, channelmask);
break;
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
for (i = 0; i < DSP_MAXPIPES; i++) {
if (channelmask & (1 << i)) {
pipe = chip->substream[i]->runtime->private_data;
pipe->state = PIPE_STATE_PAUSED;
}
}
err = pause_transport(chip, channelmask);
break;
default:
err = -EINVAL;
}
spin_unlock(&chip->lock);
return err;
}
static snd_pcm_uframes_t pcm_pointer(struct snd_pcm_substream *substream)
{
struct snd_pcm_runtime *runtime = substream->runtime;
struct audiopipe *pipe = runtime->private_data;
u32 counter, step;
/*
* IRQ handling runs concurrently. Do not share tracking of
* counter with it, which would race or require locking
*/
counter = le32_to_cpu(*pipe->dma_counter); /* presumed atomic */
step = counter - pipe->last_counter; /* handles wrapping */
pipe->last_counter = counter;
/* counter doesn't neccessarily wrap on a multiple of
* buffer_size, so can't derive the position; must
* accumulate */
pipe->position += step;
pipe->position %= frames_to_bytes(runtime, runtime->buffer_size); /* wrap */
return bytes_to_frames(runtime, pipe->position);
}
/* pcm *_ops structures */
static const struct snd_pcm_ops analog_playback_ops = {
.open = pcm_analog_out_open,
.close = pcm_close,
.hw_params = pcm_analog_out_hw_params,
.hw_free = pcm_hw_free,
.prepare = pcm_prepare,
.trigger = pcm_trigger,
.pointer = pcm_pointer,
};
static const struct snd_pcm_ops analog_capture_ops = {
.open = pcm_analog_in_open,
.close = pcm_close,
.hw_params = pcm_analog_in_hw_params,
.hw_free = pcm_hw_free,
.prepare = pcm_prepare,
.trigger = pcm_trigger,
.pointer = pcm_pointer,
};
#ifdef ECHOCARD_HAS_DIGITAL_IO
#ifndef ECHOCARD_HAS_VMIXER
static const struct snd_pcm_ops digital_playback_ops = {
.open = pcm_digital_out_open,
.close = pcm_close,
.hw_params = pcm_digital_out_hw_params,
.hw_free = pcm_hw_free,
.prepare = pcm_prepare,
.trigger = pcm_trigger,
.pointer = pcm_pointer,
};
#endif /* !ECHOCARD_HAS_VMIXER */
static const struct snd_pcm_ops digital_capture_ops = {
.open = pcm_digital_in_open,
.close = pcm_close,
.hw_params = pcm_digital_in_hw_params,
.hw_free = pcm_hw_free,
.prepare = pcm_prepare,
.trigger = pcm_trigger,
.pointer = pcm_pointer,
};
#endif /* ECHOCARD_HAS_DIGITAL_IO */
/* Preallocate memory only for the first substream because it's the most
* used one
*/
static void snd_echo_preallocate_pages(struct snd_pcm *pcm, struct device *dev)
{
struct snd_pcm_substream *ss;
int stream;
for (stream = 0; stream < 2; stream++)
for (ss = pcm->streams[stream].substream; ss; ss = ss->next)
snd_pcm_set_managed_buffer(ss, SNDRV_DMA_TYPE_DEV_SG,
dev,
ss->number ? 0 : 128<<10,
256<<10);
}
/*<--snd_echo_probe() */
static int snd_echo_new_pcm(struct echoaudio *chip)
{
struct snd_pcm *pcm;
int err;
#ifdef ECHOCARD_HAS_VMIXER
/* This card has a Vmixer, that is there is no direct mapping from PCM
streams to physical outputs. The user can mix the streams as he wishes
via control interface and it's possible to send any stream to any
output, thus it makes no sense to keep analog and digital outputs
separated */
/* PCM#0 Virtual outputs and analog inputs */
err = snd_pcm_new(chip->card, "PCM", 0, num_pipes_out(chip),
num_analog_busses_in(chip), &pcm);
if (err < 0)
return err;
pcm->private_data = chip;
chip->analog_pcm = pcm;
strcpy(pcm->name, chip->card->shortname);
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &analog_playback_ops);
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &analog_capture_ops);
snd_echo_preallocate_pages(pcm, &chip->pci->dev);
#ifdef ECHOCARD_HAS_DIGITAL_IO
/* PCM#1 Digital inputs, no outputs */
err = snd_pcm_new(chip->card, "Digital PCM", 1, 0,
num_digital_busses_in(chip), &pcm);
if (err < 0)
return err;
pcm->private_data = chip;
chip->digital_pcm = pcm;
strcpy(pcm->name, chip->card->shortname);
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &digital_capture_ops);
snd_echo_preallocate_pages(pcm, &chip->pci->dev);
#endif /* ECHOCARD_HAS_DIGITAL_IO */
#else /* ECHOCARD_HAS_VMIXER */
/* The card can manage substreams formed by analog and digital channels
at the same time, but I prefer to keep analog and digital channels
separated, because that mixed thing is confusing and useless. So we
register two PCM devices: */
/* PCM#0 Analog i/o */
err = snd_pcm_new(chip->card, "Analog PCM", 0,
num_analog_busses_out(chip),
num_analog_busses_in(chip), &pcm);
if (err < 0)
return err;
pcm->private_data = chip;
chip->analog_pcm = pcm;
strcpy(pcm->name, chip->card->shortname);
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &analog_playback_ops);
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &analog_capture_ops);
snd_echo_preallocate_pages(pcm, &chip->pci->dev);
#ifdef ECHOCARD_HAS_DIGITAL_IO
/* PCM#1 Digital i/o */
err = snd_pcm_new(chip->card, "Digital PCM", 1,
num_digital_busses_out(chip),
num_digital_busses_in(chip), &pcm);
if (err < 0)
return err;
pcm->private_data = chip;
chip->digital_pcm = pcm;
strcpy(pcm->name, chip->card->shortname);
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &digital_playback_ops);
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &digital_capture_ops);
snd_echo_preallocate_pages(pcm, &chip->pci->dev);
#endif /* ECHOCARD_HAS_DIGITAL_IO */
#endif /* ECHOCARD_HAS_VMIXER */
return 0;
}
/******************************************************************************
Control interface
******************************************************************************/
#if !defined(ECHOCARD_HAS_VMIXER) || defined(ECHOCARD_HAS_LINE_OUT_GAIN)
/******************* PCM output volume *******************/
static int snd_echo_output_gain_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
struct echoaudio *chip;
chip = snd_kcontrol_chip(kcontrol);
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = num_busses_out(chip);
uinfo->value.integer.min = ECHOGAIN_MINOUT;
uinfo->value.integer.max = ECHOGAIN_MAXOUT;
return 0;
}
static int snd_echo_output_gain_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct echoaudio *chip;
int c;
chip = snd_kcontrol_chip(kcontrol);
for (c = 0; c < num_busses_out(chip); c++)
ucontrol->value.integer.value[c] = chip->output_gain[c];
return 0;
}
static int snd_echo_output_gain_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct echoaudio *chip;
int c, changed, gain;
changed = 0;
chip = snd_kcontrol_chip(kcontrol);
spin_lock_irq(&chip->lock);
for (c = 0; c < num_busses_out(chip); c++) {
gain = ucontrol->value.integer.value[c];
/* Ignore out of range values */
if (gain < ECHOGAIN_MINOUT || gain > ECHOGAIN_MAXOUT)
continue;
if (chip->output_gain[c] != gain) {
set_output_gain(chip, c, gain);
changed = 1;
}
}
if (changed)
update_output_line_level(chip);
spin_unlock_irq(&chip->lock);
return changed;
}
#ifdef ECHOCARD_HAS_LINE_OUT_GAIN
/* On the Mia this one controls the line-out volume */
static const struct snd_kcontrol_new snd_echo_line_output_gain = {
.name = "Line Playback Volume",
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ,
.info = snd_echo_output_gain_info,
.get = snd_echo_output_gain_get,
.put = snd_echo_output_gain_put,
.tlv = {.p = db_scale_output_gain},
};
#else
static const struct snd_kcontrol_new snd_echo_pcm_output_gain = {
.name = "PCM Playback Volume",
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,
.info = snd_echo_output_gain_info,
.get = snd_echo_output_gain_get,
.put = snd_echo_output_gain_put,
.tlv = {.p = db_scale_output_gain},
};
#endif
#endif /* !ECHOCARD_HAS_VMIXER || ECHOCARD_HAS_LINE_OUT_GAIN */
#ifdef ECHOCARD_HAS_INPUT_GAIN
/******************* Analog input volume *******************/
static int snd_echo_input_gain_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
struct echoaudio *chip;
chip = snd_kcontrol_chip(kcontrol);
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = num_analog_busses_in(chip);
uinfo->value.integer.min = ECHOGAIN_MININP;
uinfo->value.integer.max = ECHOGAIN_MAXINP;
return 0;
}
static int snd_echo_input_gain_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct echoaudio *chip;
int c;
chip = snd_kcontrol_chip(kcontrol);
for (c = 0; c < num_analog_busses_in(chip); c++)
ucontrol->value.integer.value[c] = chip->input_gain[c];
return 0;
}
static int snd_echo_input_gain_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct echoaudio *chip;
int c, gain, changed;
changed = 0;
chip = snd_kcontrol_chip(kcontrol);
spin_lock_irq(&chip->lock);
for (c = 0; c < num_analog_busses_in(chip); c++) {
gain = ucontrol->value.integer.value[c];
/* Ignore out of range values */
if (gain < ECHOGAIN_MININP || gain > ECHOGAIN_MAXINP)
continue;
if (chip->input_gain[c] != gain) {
set_input_gain(chip, c, gain);
changed = 1;
}
}
if (changed)
update_input_line_level(chip);
spin_unlock_irq(&chip->lock);
return changed;
}
static const DECLARE_TLV_DB_SCALE(db_scale_input_gain, -2500, 50, 0);
static const struct snd_kcontrol_new snd_echo_line_input_gain = {
.name = "Line Capture Volume",
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,
.info = snd_echo_input_gain_info,
.get = snd_echo_input_gain_get,
.put = snd_echo_input_gain_put,
.tlv = {.p = db_scale_input_gain},
};
#endif /* ECHOCARD_HAS_INPUT_GAIN */
#ifdef ECHOCARD_HAS_OUTPUT_NOMINAL_LEVEL
/************ Analog output nominal level (+4dBu / -10dBV) ***************/
static int snd_echo_output_nominal_info (struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
struct echoaudio *chip;
chip = snd_kcontrol_chip(kcontrol);
uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
uinfo->count = num_analog_busses_out(chip);
uinfo->value.integer.min = 0;
uinfo->value.integer.max = 1;
return 0;
}
static int snd_echo_output_nominal_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct echoaudio *chip;
int c;
chip = snd_kcontrol_chip(kcontrol);
for (c = 0; c < num_analog_busses_out(chip); c++)
ucontrol->value.integer.value[c] = chip->nominal_level[c];
return 0;
}
static int snd_echo_output_nominal_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct echoaudio *chip;
int c, changed;
changed = 0;
chip = snd_kcontrol_chip(kcontrol);
spin_lock_irq(&chip->lock);
for (c = 0; c < num_analog_busses_out(chip); c++) {
if (chip->nominal_level[c] != ucontrol->value.integer.value[c]) {
set_nominal_level(chip, c,
ucontrol->value.integer.value[c]);
changed = 1;
}
}
if (changed)
update_output_line_level(chip);
spin_unlock_irq(&chip->lock);
return changed;
}
static const struct snd_kcontrol_new snd_echo_output_nominal_level = {
.name = "Line Playback Switch (-10dBV)",
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.info = snd_echo_output_nominal_info,
.get = snd_echo_output_nominal_get,
.put = snd_echo_output_nominal_put,
};
#endif /* ECHOCARD_HAS_OUTPUT_NOMINAL_LEVEL */
#ifdef ECHOCARD_HAS_INPUT_NOMINAL_LEVEL
/*************** Analog input nominal level (+4dBu / -10dBV) ***************/
static int snd_echo_input_nominal_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
struct echoaudio *chip;
chip = snd_kcontrol_chip(kcontrol);
uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
uinfo->count = num_analog_busses_in(chip);
uinfo->value.integer.min = 0;
uinfo->value.integer.max = 1;
return 0;
}
static int snd_echo_input_nominal_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct echoaudio *chip;
int c;
chip = snd_kcontrol_chip(kcontrol);
for (c = 0; c < num_analog_busses_in(chip); c++)
ucontrol->value.integer.value[c] =
chip->nominal_level[bx_analog_in(chip) + c];
return 0;
}
static int snd_echo_input_nominal_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct echoaudio *chip;
int c, changed;
changed = 0;
chip = snd_kcontrol_chip(kcontrol);
spin_lock_irq(&chip->lock);
for (c = 0; c < num_analog_busses_in(chip); c++) {
if (chip->nominal_level[bx_analog_in(chip) + c] !=
ucontrol->value.integer.value[c]) {
set_nominal_level(chip, bx_analog_in(chip) + c,
ucontrol->value.integer.value[c]);
changed = 1;
}
}
if (changed)
update_output_line_level(chip); /* "Output" is not a mistake
* here.
*/
spin_unlock_irq(&chip->lock);
return changed;
}
static const struct snd_kcontrol_new snd_echo_intput_nominal_level = {
.name = "Line Capture Switch (-10dBV)",
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.info = snd_echo_input_nominal_info,
.get = snd_echo_input_nominal_get,
.put = snd_echo_input_nominal_put,
};
#endif /* ECHOCARD_HAS_INPUT_NOMINAL_LEVEL */
#ifdef ECHOCARD_HAS_MONITOR
/******************* Monitor mixer *******************/
static int snd_echo_mixer_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 1;
uinfo->value.integer.min = ECHOGAIN_MINOUT;
uinfo->value.integer.max = ECHOGAIN_MAXOUT;
return 0;
}
static int snd_echo_mixer_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct echoaudio *chip = snd_kcontrol_chip(kcontrol);
unsigned int out = ucontrol->id.index / num_busses_in(chip);
unsigned int in = ucontrol->id.index % num_busses_in(chip);
if (out >= ECHO_MAXAUDIOOUTPUTS || in >= ECHO_MAXAUDIOINPUTS)
return -EINVAL;
ucontrol->value.integer.value[0] = chip->monitor_gain[out][in];
return 0;
}
static int snd_echo_mixer_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct echoaudio *chip;
int changed, gain;
unsigned int out, in;
changed = 0;
chip = snd_kcontrol_chip(kcontrol);
out = ucontrol->id.index / num_busses_in(chip);
in = ucontrol->id.index % num_busses_in(chip);
if (out >= ECHO_MAXAUDIOOUTPUTS || in >= ECHO_MAXAUDIOINPUTS)
return -EINVAL;
gain = ucontrol->value.integer.value[0];
if (gain < ECHOGAIN_MINOUT || gain > ECHOGAIN_MAXOUT)
return -EINVAL;
if (chip->monitor_gain[out][in] != gain) {
spin_lock_irq(&chip->lock);
set_monitor_gain(chip, out, in, gain);
update_output_line_level(chip);
spin_unlock_irq(&chip->lock);
changed = 1;
}
return changed;
}
static struct snd_kcontrol_new snd_echo_monitor_mixer = {
.name = "Monitor Mixer Volume",
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,
.info = snd_echo_mixer_info,
.get = snd_echo_mixer_get,
.put = snd_echo_mixer_put,
.tlv = {.p = db_scale_output_gain},
};
#endif /* ECHOCARD_HAS_MONITOR */
#ifdef ECHOCARD_HAS_VMIXER
/******************* Vmixer *******************/
static int snd_echo_vmixer_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 1;
uinfo->value.integer.min = ECHOGAIN_MINOUT;
uinfo->value.integer.max = ECHOGAIN_MAXOUT;
return 0;
}
static int snd_echo_vmixer_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct echoaudio *chip;
chip = snd_kcontrol_chip(kcontrol);
ucontrol->value.integer.value[0] =
chip->vmixer_gain[ucontrol->id.index / num_pipes_out(chip)]
[ucontrol->id.index % num_pipes_out(chip)];
return 0;
}
static int snd_echo_vmixer_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct echoaudio *chip;
int gain, changed;
short vch, out;
changed = 0;
chip = snd_kcontrol_chip(kcontrol);
out = ucontrol->id.index / num_pipes_out(chip);
vch = ucontrol->id.index % num_pipes_out(chip);
gain = ucontrol->value.integer.value[0];
if (gain < ECHOGAIN_MINOUT || gain > ECHOGAIN_MAXOUT)
return -EINVAL;
if (chip->vmixer_gain[out][vch] != ucontrol->value.integer.value[0]) {
spin_lock_irq(&chip->lock);
set_vmixer_gain(chip, out, vch, ucontrol->value.integer.value[0]);
update_vmixer_level(chip);
spin_unlock_irq(&chip->lock);
changed = 1;
}
return changed;
}
static struct snd_kcontrol_new snd_echo_vmixer = {
.name = "VMixer Volume",
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,
.info = snd_echo_vmixer_info,
.get = snd_echo_vmixer_get,
.put = snd_echo_vmixer_put,
.tlv = {.p = db_scale_output_gain},
};
#endif /* ECHOCARD_HAS_VMIXER */
#ifdef ECHOCARD_HAS_DIGITAL_MODE_SWITCH
/******************* Digital mode switch *******************/
static int snd_echo_digital_mode_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
static const char * const names[4] = {
"S/PDIF Coaxial", "S/PDIF Optical", "ADAT Optical",
"S/PDIF Cdrom"
};
struct echoaudio *chip;
chip = snd_kcontrol_chip(kcontrol);
return snd_ctl_enum_info(uinfo, 1, chip->num_digital_modes, names);
}
static int snd_echo_digital_mode_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct echoaudio *chip;
int i, mode;
chip = snd_kcontrol_chip(kcontrol);
mode = chip->digital_mode;
for (i = chip->num_digital_modes - 1; i >= 0; i--)
if (mode == chip->digital_mode_list[i]) {
ucontrol->value.enumerated.item[0] = i;
break;
}
return 0;
}
static int snd_echo_digital_mode_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct echoaudio *chip;
int changed;
unsigned short emode, dmode;
changed = 0;
chip = snd_kcontrol_chip(kcontrol);
emode = ucontrol->value.enumerated.item[0];
if (emode >= chip->num_digital_modes)
return -EINVAL;
dmode = chip->digital_mode_list[emode];
if (dmode != chip->digital_mode) {
/* mode_mutex is required to make this operation atomic wrt
pcm_digital_*_open() and set_input_clock() functions. */
mutex_lock(&chip->mode_mutex);
/* Do not allow the user to change the digital mode when a pcm
device is open because it also changes the number of channels
and the allowed sample rates */
if (chip->opencount) {
changed = -EAGAIN;
} else {
changed = set_digital_mode(chip, dmode);
/* If we had to change the clock source, report it */
if (changed > 0 && chip->clock_src_ctl) {
snd_ctl_notify(chip->card,
SNDRV_CTL_EVENT_MASK_VALUE,
&chip->clock_src_ctl->id);
dev_dbg(chip->card->dev,
"SDM() =%d\n", changed);
}
if (changed >= 0)
changed = 1; /* No errors */
}
mutex_unlock(&chip->mode_mutex);
}
return changed;
}
static const struct snd_kcontrol_new snd_echo_digital_mode_switch = {
.name = "Digital mode Switch",
.iface = SNDRV_CTL_ELEM_IFACE_CARD,
.info = snd_echo_digital_mode_info,
.get = snd_echo_digital_mode_get,
.put = snd_echo_digital_mode_put,
};
#endif /* ECHOCARD_HAS_DIGITAL_MODE_SWITCH */
#ifdef ECHOCARD_HAS_DIGITAL_IO
/******************* S/PDIF mode switch *******************/
static int snd_echo_spdif_mode_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
static const char * const names[2] = {"Consumer", "Professional"};
return snd_ctl_enum_info(uinfo, 1, 2, names);
}
static int snd_echo_spdif_mode_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct echoaudio *chip;
chip = snd_kcontrol_chip(kcontrol);
ucontrol->value.enumerated.item[0] = !!chip->professional_spdif;
return 0;
}
static int snd_echo_spdif_mode_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct echoaudio *chip;
int mode;
chip = snd_kcontrol_chip(kcontrol);
mode = !!ucontrol->value.enumerated.item[0];
if (mode != chip->professional_spdif) {
spin_lock_irq(&chip->lock);
set_professional_spdif(chip, mode);
spin_unlock_irq(&chip->lock);
return 1;
}
return 0;
}
static const struct snd_kcontrol_new snd_echo_spdif_mode_switch = {
.name = "S/PDIF mode Switch",
.iface = SNDRV_CTL_ELEM_IFACE_CARD,
.info = snd_echo_spdif_mode_info,
.get = snd_echo_spdif_mode_get,
.put = snd_echo_spdif_mode_put,
};
#endif /* ECHOCARD_HAS_DIGITAL_IO */
#ifdef ECHOCARD_HAS_EXTERNAL_CLOCK
/******************* Select input clock source *******************/
static int snd_echo_clock_source_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
static const char * const names[8] = {
"Internal", "Word", "Super", "S/PDIF", "ADAT", "ESync",
"ESync96", "MTC"
};
struct echoaudio *chip;
chip = snd_kcontrol_chip(kcontrol);
return snd_ctl_enum_info(uinfo, 1, chip->num_clock_sources, names);
}
static int snd_echo_clock_source_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct echoaudio *chip;
int i, clock;
chip = snd_kcontrol_chip(kcontrol);
clock = chip->input_clock;
for (i = 0; i < chip->num_clock_sources; i++)
if (clock == chip->clock_source_list[i])
ucontrol->value.enumerated.item[0] = i;
return 0;
}
static int snd_echo_clock_source_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct echoaudio *chip;
int changed;
unsigned int eclock, dclock;
changed = 0;
chip = snd_kcontrol_chip(kcontrol);
eclock = ucontrol->value.enumerated.item[0];
if (eclock >= chip->input_clock_types)
return -EINVAL;
dclock = chip->clock_source_list[eclock];
if (chip->input_clock != dclock) {
mutex_lock(&chip->mode_mutex);
spin_lock_irq(&chip->lock);
changed = set_input_clock(chip, dclock);
if (!changed)
changed = 1; /* no errors */
spin_unlock_irq(&chip->lock);
mutex_unlock(&chip->mode_mutex);
}
if (changed < 0)
dev_dbg(chip->card->dev,
"seticlk val%d err 0x%x\n", dclock, changed);
return changed;
}
static const struct snd_kcontrol_new snd_echo_clock_source_switch = {
.name = "Sample Clock Source",
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
.info = snd_echo_clock_source_info,
.get = snd_echo_clock_source_get,
.put = snd_echo_clock_source_put,
};
#endif /* ECHOCARD_HAS_EXTERNAL_CLOCK */
#ifdef ECHOCARD_HAS_PHANTOM_POWER
/******************* Phantom power switch *******************/
#define snd_echo_phantom_power_info snd_ctl_boolean_mono_info
static int snd_echo_phantom_power_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct echoaudio *chip = snd_kcontrol_chip(kcontrol);
ucontrol->value.integer.value[0] = chip->phantom_power;
return 0;
}
static int snd_echo_phantom_power_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct echoaudio *chip = snd_kcontrol_chip(kcontrol);
int power, changed = 0;
power = !!ucontrol->value.integer.value[0];
if (chip->phantom_power != power) {
spin_lock_irq(&chip->lock);
changed = set_phantom_power(chip, power);
spin_unlock_irq(&chip->lock);
if (changed == 0)
changed = 1; /* no errors */
}
return changed;
}
static const struct snd_kcontrol_new snd_echo_phantom_power_switch = {
.name = "Phantom power Switch",
.iface = SNDRV_CTL_ELEM_IFACE_CARD,
.info = snd_echo_phantom_power_info,
.get = snd_echo_phantom_power_get,
.put = snd_echo_phantom_power_put,
};
#endif /* ECHOCARD_HAS_PHANTOM_POWER */
#ifdef ECHOCARD_HAS_DIGITAL_IN_AUTOMUTE
/******************* Digital input automute switch *******************/
#define snd_echo_automute_info snd_ctl_boolean_mono_info
static int snd_echo_automute_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct echoaudio *chip = snd_kcontrol_chip(kcontrol);
ucontrol->value.integer.value[0] = chip->digital_in_automute;
return 0;
}
static int snd_echo_automute_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct echoaudio *chip = snd_kcontrol_chip(kcontrol);
int automute, changed = 0;
automute = !!ucontrol->value.integer.value[0];
if (chip->digital_in_automute != automute) {
spin_lock_irq(&chip->lock);
changed = set_input_auto_mute(chip, automute);
spin_unlock_irq(&chip->lock);
if (changed == 0)
changed = 1; /* no errors */
}
return changed;
}
static const struct snd_kcontrol_new snd_echo_automute_switch = {
.name = "Digital Capture Switch (automute)",
.iface = SNDRV_CTL_ELEM_IFACE_CARD,
.info = snd_echo_automute_info,
.get = snd_echo_automute_get,
.put = snd_echo_automute_put,
};
#endif /* ECHOCARD_HAS_DIGITAL_IN_AUTOMUTE */
/******************* VU-meters switch *******************/
#define snd_echo_vumeters_switch_info snd_ctl_boolean_mono_info
static int snd_echo_vumeters_switch_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct echoaudio *chip;
chip = snd_kcontrol_chip(kcontrol);
spin_lock_irq(&chip->lock);
set_meters_on(chip, ucontrol->value.integer.value[0]);
spin_unlock_irq(&chip->lock);
return 1;
}
static const struct snd_kcontrol_new snd_echo_vumeters_switch = {
.name = "VU-meters Switch",
.iface = SNDRV_CTL_ELEM_IFACE_CARD,
.access = SNDRV_CTL_ELEM_ACCESS_WRITE,
.info = snd_echo_vumeters_switch_info,
.put = snd_echo_vumeters_switch_put,
};
/***** Read VU-meters (input, output, analog and digital together) *****/
static int snd_echo_vumeters_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 96;
uinfo->value.integer.min = ECHOGAIN_MINOUT;
uinfo->value.integer.max = 0;
return 0;
}
static int snd_echo_vumeters_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct echoaudio *chip;
chip = snd_kcontrol_chip(kcontrol);
get_audio_meters(chip, ucontrol->value.integer.value);
return 0;
}
static const struct snd_kcontrol_new snd_echo_vumeters = {
.name = "VU-meters",
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = SNDRV_CTL_ELEM_ACCESS_READ |
SNDRV_CTL_ELEM_ACCESS_VOLATILE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ,
.info = snd_echo_vumeters_info,
.get = snd_echo_vumeters_get,
.tlv = {.p = db_scale_output_gain},
};
/*** Channels info - it exports informations about the number of channels ***/
static int snd_echo_channels_info_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 6;
uinfo->value.integer.min = 0;
uinfo->value.integer.max = 1 << ECHO_CLOCK_NUMBER;
return 0;
}
static int snd_echo_channels_info_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct echoaudio *chip;
int detected, clocks, bit, src;
chip = snd_kcontrol_chip(kcontrol);
ucontrol->value.integer.value[0] = num_busses_in(chip);
ucontrol->value.integer.value[1] = num_analog_busses_in(chip);
ucontrol->value.integer.value[2] = num_busses_out(chip);
ucontrol->value.integer.value[3] = num_analog_busses_out(chip);
ucontrol->value.integer.value[4] = num_pipes_out(chip);
/* Compute the bitmask of the currently valid input clocks */
detected = detect_input_clocks(chip);
clocks = 0;
src = chip->num_clock_sources - 1;
for (bit = ECHO_CLOCK_NUMBER - 1; bit >= 0; bit--)
if (detected & (1 << bit))
for (; src >= 0; src--)
if (bit == chip->clock_source_list[src]) {
clocks |= 1 << src;
break;
}
ucontrol->value.integer.value[5] = clocks;
return 0;
}
static const struct snd_kcontrol_new snd_echo_channels_info = {
.name = "Channels info",
.iface = SNDRV_CTL_ELEM_IFACE_HWDEP,
.access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
.info = snd_echo_channels_info_info,
.get = snd_echo_channels_info_get,
};
/******************************************************************************
IRQ Handling
******************************************************************************/
/* Check if a period has elapsed since last interrupt
*
* Don't make any updates to state; PCM core handles this with the
* correct locks.
*
* \return true if a period has elapsed, otherwise false
*/
static bool period_has_elapsed(struct snd_pcm_substream *substream)
{
struct snd_pcm_runtime *runtime = substream->runtime;
struct audiopipe *pipe = runtime->private_data;
u32 counter, step;
size_t period_bytes;
if (pipe->state != PIPE_STATE_STARTED)
return false;
period_bytes = frames_to_bytes(runtime, runtime->period_size);
counter = le32_to_cpu(*pipe->dma_counter); /* presumed atomic */
step = counter - pipe->last_period; /* handles wrapping */
step -= step % period_bytes; /* acknowledge whole periods only */
if (step == 0)
return false; /* haven't advanced a whole period yet */
pipe->last_period += step; /* used exclusively by us */
return true;
}
static irqreturn_t snd_echo_interrupt(int irq, void *dev_id)
{
struct echoaudio *chip = dev_id;
int ss, st;
spin_lock(&chip->lock);
st = service_irq(chip);
if (st < 0) {
spin_unlock(&chip->lock);
return IRQ_NONE;
}
/* The hardware doesn't tell us which substream caused the irq,
thus we have to check all running substreams. */
for (ss = 0; ss < DSP_MAXPIPES; ss++) {
struct snd_pcm_substream *substream;
substream = chip->substream[ss];
if (substream && period_has_elapsed(substream)) {
spin_unlock(&chip->lock);
snd_pcm_period_elapsed(substream);
spin_lock(&chip->lock);
}
}
spin_unlock(&chip->lock);
#ifdef ECHOCARD_HAS_MIDI
if (st > 0 && chip->midi_in) {
snd_rawmidi_receive(chip->midi_in, chip->midi_buffer, st);
dev_dbg(chip->card->dev, "rawmidi_iread=%d\n", st);
}
#endif
return IRQ_HANDLED;
}
/******************************************************************************
Module construction / destruction
******************************************************************************/
static void snd_echo_free(struct snd_card *card)
{
struct echoaudio *chip = card->private_data;
if (chip->comm_page)
rest_in_peace(chip);
if (chip->irq >= 0)
free_irq(chip->irq, chip);
/* release chip data */
free_firmware_cache(chip);
}
/* <--snd_echo_probe() */
static int snd_echo_create(struct snd_card *card,
struct pci_dev *pci)
{
struct echoaudio *chip = card->private_data;
int err;
size_t sz;
pci_write_config_byte(pci, PCI_LATENCY_TIMER, 0xC0);
err = pcim_enable_device(pci);
if (err < 0)
return err;
pci_set_master(pci);
/* Allocate chip if needed */
spin_lock_init(&chip->lock);
chip->card = card;
chip->pci = pci;
chip->irq = -1;
chip->opencount = 0;
mutex_init(&chip->mode_mutex);
chip->can_set_rate = 1;
/* PCI resource allocation */
err = pci_request_regions(pci, ECHOCARD_NAME);
if (err < 0)
return err;
chip->dsp_registers_phys = pci_resource_start(pci, 0);
sz = pci_resource_len(pci, 0);
if (sz > PAGE_SIZE)
sz = PAGE_SIZE; /* We map only the required part */
chip->dsp_registers = devm_ioremap(&pci->dev, chip->dsp_registers_phys, sz);
if (!chip->dsp_registers) {
dev_err(chip->card->dev, "ioremap failed\n");
return -ENOMEM;
}
if (request_irq(pci->irq, snd_echo_interrupt, IRQF_SHARED,
KBUILD_MODNAME, chip)) {
dev_err(chip->card->dev, "cannot grab irq\n");
return -EBUSY;
}
chip->irq = pci->irq;
card->sync_irq = chip->irq;
dev_dbg(card->dev, "pci=%p irq=%d subdev=%04x Init hardware...\n",
chip->pci, chip->irq, chip->pci->subsystem_device);
card->private_free = snd_echo_free;
/* Create the DSP comm page - this is the area of memory used for most
of the communication with the DSP, which accesses it via bus mastering */
chip->commpage_dma_buf =
snd_devm_alloc_pages(&pci->dev, SNDRV_DMA_TYPE_DEV,
sizeof(struct comm_page));
if (!chip->commpage_dma_buf)
return -ENOMEM;
chip->comm_page_phys = chip->commpage_dma_buf->addr;
chip->comm_page = (struct comm_page *)chip->commpage_dma_buf->area;
err = init_hw(chip, chip->pci->device, chip->pci->subsystem_device);
if (err >= 0)
err = set_mixer_defaults(chip);
if (err < 0) {
dev_err(card->dev, "init_hw err=%d\n", err);
return err;
}
return 0;
}
/* constructor */
static int __snd_echo_probe(struct pci_dev *pci,
const struct pci_device_id *pci_id)
{
static int dev;
struct snd_card *card;
struct echoaudio *chip;
char *dsp;
__maybe_unused int i;
int err;
if (dev >= SNDRV_CARDS)
return -ENODEV;
if (!enable[dev]) {
dev++;
return -ENOENT;
}
i = 0;
err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
sizeof(*chip), &card);
if (err < 0)
return err;
chip = card->private_data;
err = snd_echo_create(card, pci);
if (err < 0)
return err;
strcpy(card->driver, "Echo_" ECHOCARD_NAME);
strcpy(card->shortname, chip->card_name);
dsp = "56301";
if (pci_id->device == 0x3410)
dsp = "56361";
sprintf(card->longname, "%s rev.%d (DSP%s) at 0x%lx irq %i",
card->shortname, pci_id->subdevice & 0x000f, dsp,
chip->dsp_registers_phys, chip->irq);
err = snd_echo_new_pcm(chip);
if (err < 0) {
dev_err(chip->card->dev, "new pcm error %d\n", err);
return err;
}
#ifdef ECHOCARD_HAS_MIDI
if (chip->has_midi) { /* Some Mia's do not have midi */
err = snd_echo_midi_create(card, chip);
if (err < 0) {
dev_err(chip->card->dev, "new midi error %d\n", err);
return err;
}
}
#endif
#ifdef ECHOCARD_HAS_VMIXER
snd_echo_vmixer.count = num_pipes_out(chip) * num_busses_out(chip);
err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_echo_vmixer, chip));
if (err < 0)
return err;
#ifdef ECHOCARD_HAS_LINE_OUT_GAIN
err = snd_ctl_add(chip->card,
snd_ctl_new1(&snd_echo_line_output_gain, chip));
if (err < 0)
return err;
#endif
#else /* ECHOCARD_HAS_VMIXER */
err = snd_ctl_add(chip->card,
snd_ctl_new1(&snd_echo_pcm_output_gain, chip));
if (err < 0)
return err;
#endif /* ECHOCARD_HAS_VMIXER */
#ifdef ECHOCARD_HAS_INPUT_GAIN
err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_echo_line_input_gain, chip));
if (err < 0)
return err;
#endif
#ifdef ECHOCARD_HAS_INPUT_NOMINAL_LEVEL
if (!chip->hasnt_input_nominal_level) {
err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_echo_intput_nominal_level, chip));
if (err < 0)
return err;
}
#endif
#ifdef ECHOCARD_HAS_OUTPUT_NOMINAL_LEVEL
err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_echo_output_nominal_level, chip));
if (err < 0)
return err;
#endif
err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_echo_vumeters_switch, chip));
if (err < 0)
return err;
err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_echo_vumeters, chip));
if (err < 0)
return err;
#ifdef ECHOCARD_HAS_MONITOR
snd_echo_monitor_mixer.count = num_busses_in(chip) * num_busses_out(chip);
err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_echo_monitor_mixer, chip));
if (err < 0)
return err;
#endif
#ifdef ECHOCARD_HAS_DIGITAL_IN_AUTOMUTE
err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_echo_automute_switch, chip));
if (err < 0)
return err;
#endif
err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_echo_channels_info, chip));
if (err < 0)
return err;
#ifdef ECHOCARD_HAS_DIGITAL_MODE_SWITCH
/* Creates a list of available digital modes */
chip->num_digital_modes = 0;
for (i = 0; i < 6; i++)
if (chip->digital_modes & (1 << i))
chip->digital_mode_list[chip->num_digital_modes++] = i;
err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_echo_digital_mode_switch, chip));
if (err < 0)
return err;
#endif /* ECHOCARD_HAS_DIGITAL_MODE_SWITCH */
#ifdef ECHOCARD_HAS_EXTERNAL_CLOCK
/* Creates a list of available clock sources */
chip->num_clock_sources = 0;
for (i = 0; i < 10; i++)
if (chip->input_clock_types & (1 << i))
chip->clock_source_list[chip->num_clock_sources++] = i;
if (chip->num_clock_sources > 1) {
chip->clock_src_ctl = snd_ctl_new1(&snd_echo_clock_source_switch, chip);
err = snd_ctl_add(chip->card, chip->clock_src_ctl);
if (err < 0)
return err;
}
#endif /* ECHOCARD_HAS_EXTERNAL_CLOCK */
#ifdef ECHOCARD_HAS_DIGITAL_IO
err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_echo_spdif_mode_switch, chip));
if (err < 0)
return err;
#endif
#ifdef ECHOCARD_HAS_PHANTOM_POWER
if (chip->has_phantom_power) {
err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_echo_phantom_power_switch, chip));
if (err < 0)
return err;
}
#endif
err = snd_card_register(card);
if (err < 0)
return err;
dev_info(card->dev, "Card registered: %s\n", card->longname);
pci_set_drvdata(pci, chip);
dev++;
return 0;
}
static int snd_echo_probe(struct pci_dev *pci,
const struct pci_device_id *pci_id)
{
return snd_card_free_on_error(&pci->dev, __snd_echo_probe(pci, pci_id));
}
#if defined(CONFIG_PM_SLEEP)
static int snd_echo_suspend(struct device *dev)
{
struct echoaudio *chip = dev_get_drvdata(dev);
#ifdef ECHOCARD_HAS_MIDI
/* This call can sleep */
if (chip->midi_out)
snd_echo_midi_output_trigger(chip->midi_out, 0);
#endif
spin_lock_irq(&chip->lock);
if (wait_handshake(chip)) {
spin_unlock_irq(&chip->lock);
return -EIO;
}
clear_handshake(chip);
if (send_vector(chip, DSP_VC_GO_COMATOSE) < 0) {
spin_unlock_irq(&chip->lock);
return -EIO;
}
spin_unlock_irq(&chip->lock);
chip->dsp_code = NULL;
free_irq(chip->irq, chip);
chip->irq = -1;
chip->card->sync_irq = -1;
return 0;
}
static int snd_echo_resume(struct device *dev)
{
struct pci_dev *pci = to_pci_dev(dev);
struct echoaudio *chip = dev_get_drvdata(dev);
struct comm_page *commpage, *commpage_bak;
u32 pipe_alloc_mask;
int err;
commpage = chip->comm_page;
commpage_bak = kmemdup(commpage, sizeof(*commpage), GFP_KERNEL);
if (commpage_bak == NULL)
return -ENOMEM;
err = init_hw(chip, chip->pci->device, chip->pci->subsystem_device);
if (err < 0) {
kfree(commpage_bak);
dev_err(dev, "resume init_hw err=%d\n", err);
return err;
}
/* Temporarily set chip->pipe_alloc_mask=0 otherwise
* restore_dsp_settings() fails.
*/
pipe_alloc_mask = chip->pipe_alloc_mask;
chip->pipe_alloc_mask = 0;
err = restore_dsp_rettings(chip);
chip->pipe_alloc_mask = pipe_alloc_mask;
if (err < 0) {
kfree(commpage_bak);
return err;
}
memcpy(&commpage->audio_format, &commpage_bak->audio_format,
sizeof(commpage->audio_format));
memcpy(&commpage->sglist_addr, &commpage_bak->sglist_addr,
sizeof(commpage->sglist_addr));
memcpy(&commpage->midi_output, &commpage_bak->midi_output,
sizeof(commpage->midi_output));
kfree(commpage_bak);
if (request_irq(pci->irq, snd_echo_interrupt, IRQF_SHARED,
KBUILD_MODNAME, chip)) {
dev_err(chip->card->dev, "cannot grab irq\n");
return -EBUSY;
}
chip->irq = pci->irq;
chip->card->sync_irq = chip->irq;
dev_dbg(dev, "resume irq=%d\n", chip->irq);
#ifdef ECHOCARD_HAS_MIDI
if (chip->midi_input_enabled)
enable_midi_input(chip, true);
if (chip->midi_out)
snd_echo_midi_output_trigger(chip->midi_out, 1);
#endif
return 0;
}
static SIMPLE_DEV_PM_OPS(snd_echo_pm, snd_echo_suspend, snd_echo_resume);
#define SND_ECHO_PM_OPS &snd_echo_pm
#else
#define SND_ECHO_PM_OPS NULL
#endif /* CONFIG_PM_SLEEP */
/******************************************************************************
Everything starts and ends here
******************************************************************************/
/* pci_driver definition */
static struct pci_driver echo_driver = {
.name = KBUILD_MODNAME,
.id_table = snd_echo_ids,
.probe = snd_echo_probe,
.driver = {
.pm = SND_ECHO_PM_OPS,
},
};
module_pci_driver(echo_driver);
| linux-master | sound/pci/echoaudio/echoaudio.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* ALSA driver for Echoaudio soundcards.
* Copyright (C) 2003-2004 Giuliano Pochini <[email protected]>
*/
#define ECHOGALS_FAMILY
#define ECHOCARD_DARLA20
#define ECHOCARD_NAME "Darla20"
#define ECHOCARD_HAS_MONITOR
/* Pipe indexes */
#define PX_ANALOG_OUT 0 /* 8 */
#define PX_DIGITAL_OUT 8 /* 0 */
#define PX_ANALOG_IN 8 /* 2 */
#define PX_DIGITAL_IN 10 /* 0 */
#define PX_NUM 10
/* Bus indexes */
#define BX_ANALOG_OUT 0 /* 8 */
#define BX_DIGITAL_OUT 8 /* 0 */
#define BX_ANALOG_IN 8 /* 2 */
#define BX_DIGITAL_IN 10 /* 0 */
#define BX_NUM 10
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/pci.h>
#include <linux/module.h>
#include <linux/firmware.h>
#include <linux/slab.h>
#include <linux/io.h>
#include <sound/core.h>
#include <sound/info.h>
#include <sound/control.h>
#include <sound/tlv.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/asoundef.h>
#include <sound/initval.h>
#include <linux/atomic.h>
#include "echoaudio.h"
MODULE_FIRMWARE("ea/darla20_dsp.fw");
#define FW_DARLA20_DSP 0
static const struct firmware card_fw[] = {
{0, "darla20_dsp.fw"}
};
static const struct pci_device_id snd_echo_ids[] = {
{0x1057, 0x1801, 0xECC0, 0x0010, 0, 0, 0}, /* DSP 56301 Darla20 rev.0 */
{0,}
};
static const struct snd_pcm_hardware pcm_hardware_skel = {
.info = SNDRV_PCM_INFO_MMAP |
SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_MMAP_VALID |
SNDRV_PCM_INFO_PAUSE |
SNDRV_PCM_INFO_SYNC_START,
.formats = SNDRV_PCM_FMTBIT_U8 |
SNDRV_PCM_FMTBIT_S16_LE |
SNDRV_PCM_FMTBIT_S24_3LE |
SNDRV_PCM_FMTBIT_S32_LE |
SNDRV_PCM_FMTBIT_S32_BE,
.rates = SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000,
.rate_min = 44100,
.rate_max = 48000,
.channels_min = 1,
.channels_max = 2,
.buffer_bytes_max = 262144,
.period_bytes_min = 32,
.period_bytes_max = 131072,
.periods_min = 2,
.periods_max = 220,
/* One page (4k) contains 512 instructions. I don't know if the hw
supports lists longer than this. In this case periods_max=220 is a
safe limit to make sure the list never exceeds 512 instructions. */
};
#include "darla20_dsp.c"
#include "echoaudio_dsp.c"
#include "echoaudio.c"
| linux-master | sound/pci/echoaudio/darla20.c |
/****************************************************************************
Copyright Echo Digital Audio Corporation (c) 1998 - 2004
All rights reserved
www.echoaudio.com
This file is part of Echo Digital Audio's generic driver library.
Echo Digital Audio's generic driver library is free software;
you can redistribute it and/or modify it under the terms of
the GNU General Public License as published by the Free Software
Foundation.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston,
MA 02111-1307, USA.
*************************************************************************
Translation from C++ and adaptation for use in ALSA-Driver
were made by Giuliano Pochini <[email protected]>
****************************************************************************/
/* These functions are common for Gina24, Layla24 and Mona cards */
/* ASIC status check - some cards have one or two ASICs that need to be
loaded. Once that load is complete, this function is called to see if
the load was successful.
If this load fails, it does not necessarily mean that the hardware is
defective - the external box may be disconnected or turned off. */
static int check_asic_status(struct echoaudio *chip)
{
u32 asic_status;
send_vector(chip, DSP_VC_TEST_ASIC);
/* The DSP will return a value to indicate whether or not the
ASIC is currently loaded */
if (read_dsp(chip, &asic_status) < 0) {
dev_err(chip->card->dev,
"check_asic_status: failed on read_dsp\n");
chip->asic_loaded = false;
return -EIO;
}
chip->asic_loaded = (asic_status == ASIC_ALREADY_LOADED);
return chip->asic_loaded ? 0 : -EIO;
}
/* Most configuration of Gina24, Layla24, or Mona is accomplished by writing
the control register. write_control_reg sends the new control register
value to the DSP. */
static int write_control_reg(struct echoaudio *chip, u32 value, char force)
{
__le32 reg_value;
/* Handle the digital input auto-mute */
if (chip->digital_in_automute)
value |= GML_DIGITAL_IN_AUTO_MUTE;
else
value &= ~GML_DIGITAL_IN_AUTO_MUTE;
dev_dbg(chip->card->dev, "write_control_reg: 0x%x\n", value);
/* Write the control register */
reg_value = cpu_to_le32(value);
if (reg_value != chip->comm_page->control_register || force) {
if (wait_handshake(chip))
return -EIO;
chip->comm_page->control_register = reg_value;
clear_handshake(chip);
return send_vector(chip, DSP_VC_WRITE_CONTROL_REG);
}
return 0;
}
/* Gina24, Layla24, and Mona support digital input auto-mute. If the digital
input auto-mute is enabled, the DSP will only enable the digital inputs if
the card is syncing to a valid clock on the ADAT or S/PDIF inputs.
If the auto-mute is disabled, the digital inputs are enabled regardless of
what the input clock is set or what is connected. */
static int set_input_auto_mute(struct echoaudio *chip, int automute)
{
dev_dbg(chip->card->dev, "set_input_auto_mute %d\n", automute);
chip->digital_in_automute = automute;
/* Re-set the input clock to the current value - indirectly causes
the auto-mute flag to be sent to the DSP */
return set_input_clock(chip, chip->input_clock);
}
/* S/PDIF coax / S/PDIF optical / ADAT - switch */
static int set_digital_mode(struct echoaudio *chip, u8 mode)
{
u8 previous_mode;
int err, i, o;
if (chip->bad_board)
return -EIO;
/* All audio channels must be closed before changing the digital mode */
if (snd_BUG_ON(chip->pipe_alloc_mask))
return -EAGAIN;
if (snd_BUG_ON(!(chip->digital_modes & (1 << mode))))
return -EINVAL;
previous_mode = chip->digital_mode;
err = dsp_set_digital_mode(chip, mode);
/* If we successfully changed the digital mode from or to ADAT,
then make sure all output, input and monitor levels are
updated by the DSP comm object. */
if (err >= 0 && previous_mode != mode &&
(previous_mode == DIGITAL_MODE_ADAT || mode == DIGITAL_MODE_ADAT)) {
spin_lock_irq(&chip->lock);
for (o = 0; o < num_busses_out(chip); o++)
for (i = 0; i < num_busses_in(chip); i++)
set_monitor_gain(chip, o, i,
chip->monitor_gain[o][i]);
#ifdef ECHOCARD_HAS_INPUT_GAIN
for (i = 0; i < num_busses_in(chip); i++)
set_input_gain(chip, i, chip->input_gain[i]);
update_input_line_level(chip);
#endif
for (o = 0; o < num_busses_out(chip); o++)
set_output_gain(chip, o, chip->output_gain[o]);
update_output_line_level(chip);
spin_unlock_irq(&chip->lock);
}
return err;
}
/* Set the S/PDIF output format */
static int set_professional_spdif(struct echoaudio *chip, char prof)
{
u32 control_reg;
int err;
/* Clear the current S/PDIF flags */
control_reg = le32_to_cpu(chip->comm_page->control_register);
control_reg &= GML_SPDIF_FORMAT_CLEAR_MASK;
/* Set the new S/PDIF flags depending on the mode */
control_reg |= GML_SPDIF_TWO_CHANNEL | GML_SPDIF_24_BIT |
GML_SPDIF_COPY_PERMIT;
if (prof) {
/* Professional mode */
control_reg |= GML_SPDIF_PRO_MODE;
switch (chip->sample_rate) {
case 32000:
control_reg |= GML_SPDIF_SAMPLE_RATE0 |
GML_SPDIF_SAMPLE_RATE1;
break;
case 44100:
control_reg |= GML_SPDIF_SAMPLE_RATE0;
break;
case 48000:
control_reg |= GML_SPDIF_SAMPLE_RATE1;
break;
}
} else {
/* Consumer mode */
switch (chip->sample_rate) {
case 32000:
control_reg |= GML_SPDIF_SAMPLE_RATE0 |
GML_SPDIF_SAMPLE_RATE1;
break;
case 48000:
control_reg |= GML_SPDIF_SAMPLE_RATE1;
break;
}
}
err = write_control_reg(chip, control_reg, false);
if (err)
return err;
chip->professional_spdif = prof;
dev_dbg(chip->card->dev, "set_professional_spdif to %s\n",
prof ? "Professional" : "Consumer");
return 0;
}
| linux-master | sound/pci/echoaudio/echoaudio_gml.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* ALSA driver for Echoaudio soundcards.
* Copyright (C) 2003-2004 Giuliano Pochini <[email protected]>
*/
#define INDIGO_FAMILY
#define ECHOCARD_INDIGO_DJ
#define ECHOCARD_NAME "Indigo DJ"
#define ECHOCARD_HAS_SUPER_INTERLEAVE
#define ECHOCARD_HAS_VMIXER
#define ECHOCARD_HAS_STEREO_BIG_ENDIAN32
/* Pipe indexes */
#define PX_ANALOG_OUT 0 /* 8 */
#define PX_DIGITAL_OUT 8 /* 0 */
#define PX_ANALOG_IN 8 /* 0 */
#define PX_DIGITAL_IN 8 /* 0 */
#define PX_NUM 8
/* Bus indexes */
#define BX_ANALOG_OUT 0 /* 4 */
#define BX_DIGITAL_OUT 4 /* 0 */
#define BX_ANALOG_IN 4 /* 0 */
#define BX_DIGITAL_IN 4 /* 0 */
#define BX_NUM 4
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/pci.h>
#include <linux/module.h>
#include <linux/firmware.h>
#include <linux/slab.h>
#include <linux/io.h>
#include <sound/core.h>
#include <sound/info.h>
#include <sound/control.h>
#include <sound/tlv.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/asoundef.h>
#include <sound/initval.h>
#include <linux/atomic.h>
#include "echoaudio.h"
MODULE_FIRMWARE("ea/loader_dsp.fw");
MODULE_FIRMWARE("ea/indigo_dj_dsp.fw");
#define FW_361_LOADER 0
#define FW_INDIGO_DJ_DSP 1
static const struct firmware card_fw[] = {
{0, "loader_dsp.fw"},
{0, "indigo_dj_dsp.fw"}
};
static const struct pci_device_id snd_echo_ids[] = {
{0x1057, 0x3410, 0xECC0, 0x00B0, 0, 0, 0}, /* Indigo DJ*/
{0,}
};
static const struct snd_pcm_hardware pcm_hardware_skel = {
.info = SNDRV_PCM_INFO_MMAP |
SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_MMAP_VALID |
SNDRV_PCM_INFO_PAUSE |
SNDRV_PCM_INFO_SYNC_START,
.formats = SNDRV_PCM_FMTBIT_U8 |
SNDRV_PCM_FMTBIT_S16_LE |
SNDRV_PCM_FMTBIT_S24_3LE |
SNDRV_PCM_FMTBIT_S32_LE |
SNDRV_PCM_FMTBIT_S32_BE,
.rates = SNDRV_PCM_RATE_32000 |
SNDRV_PCM_RATE_44100 |
SNDRV_PCM_RATE_48000 |
SNDRV_PCM_RATE_88200 |
SNDRV_PCM_RATE_96000,
.rate_min = 32000,
.rate_max = 96000,
.channels_min = 1,
.channels_max = 4,
.buffer_bytes_max = 262144,
.period_bytes_min = 32,
.period_bytes_max = 131072,
.periods_min = 2,
.periods_max = 220,
};
#include "indigodj_dsp.c"
#include "echoaudio_dsp.c"
#include "echoaudio.c"
| linux-master | sound/pci/echoaudio/indigodj.c |
/****************************************************************************
Copyright Echo Digital Audio Corporation (c) 1998 - 2004
All rights reserved
www.echoaudio.com
This file is part of Echo Digital Audio's generic driver library.
Echo Digital Audio's generic driver library is free software;
you can redistribute it and/or modify it under the terms of
the GNU General Public License as published by the Free Software
Foundation.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston,
MA 02111-1307, USA.
*************************************************************************
Translation from C++ and adaptation for use in ALSA-Driver
were made by Giuliano Pochini <[email protected]>
****************************************************************************/
/******************************************************************************
MIDI lowlevel code
******************************************************************************/
/* Start and stop Midi input */
static int enable_midi_input(struct echoaudio *chip, char enable)
{
dev_dbg(chip->card->dev, "enable_midi_input(%d)\n", enable);
if (wait_handshake(chip))
return -EIO;
if (enable) {
chip->mtc_state = MIDI_IN_STATE_NORMAL;
chip->comm_page->flags |=
cpu_to_le32(DSP_FLAG_MIDI_INPUT);
} else
chip->comm_page->flags &=
~cpu_to_le32(DSP_FLAG_MIDI_INPUT);
clear_handshake(chip);
return send_vector(chip, DSP_VC_UPDATE_FLAGS);
}
/* Send a buffer full of MIDI data to the DSP
Returns how many actually written or < 0 on error */
static int write_midi(struct echoaudio *chip, u8 *data, int bytes)
{
if (snd_BUG_ON(bytes <= 0 || bytes >= MIDI_OUT_BUFFER_SIZE))
return -EINVAL;
if (wait_handshake(chip))
return -EIO;
/* HF4 indicates that it is safe to write MIDI output data */
if (! (get_dsp_register(chip, CHI32_STATUS_REG) & CHI32_STATUS_REG_HF4))
return 0;
chip->comm_page->midi_output[0] = bytes;
memcpy(&chip->comm_page->midi_output[1], data, bytes);
chip->comm_page->midi_out_free_count = 0;
clear_handshake(chip);
send_vector(chip, DSP_VC_MIDI_WRITE);
dev_dbg(chip->card->dev, "write_midi: %d\n", bytes);
return bytes;
}
/* Run the state machine for MIDI input data
MIDI time code sync isn't supported by this code right now, but you still need
this state machine to parse the incoming MIDI data stream. Every time the DSP
sees a 0xF1 byte come in, it adds the DSP sample position to the MIDI data
stream. The DSP sample position is represented as a 32 bit unsigned value,
with the high 16 bits first, followed by the low 16 bits. Since these aren't
real MIDI bytes, the following logic is needed to skip them. */
static inline int mtc_process_data(struct echoaudio *chip, short midi_byte)
{
switch (chip->mtc_state) {
case MIDI_IN_STATE_NORMAL:
if (midi_byte == 0xF1)
chip->mtc_state = MIDI_IN_STATE_TS_HIGH;
break;
case MIDI_IN_STATE_TS_HIGH:
chip->mtc_state = MIDI_IN_STATE_TS_LOW;
return MIDI_IN_SKIP_DATA;
break;
case MIDI_IN_STATE_TS_LOW:
chip->mtc_state = MIDI_IN_STATE_F1_DATA;
return MIDI_IN_SKIP_DATA;
break;
case MIDI_IN_STATE_F1_DATA:
chip->mtc_state = MIDI_IN_STATE_NORMAL;
break;
}
return 0;
}
/* This function is called from the IRQ handler and it reads the midi data
from the DSP's buffer. It returns the number of bytes received. */
static int midi_service_irq(struct echoaudio *chip)
{
short int count, midi_byte, i, received;
/* The count is at index 0, followed by actual data */
count = le16_to_cpu(chip->comm_page->midi_input[0]);
if (snd_BUG_ON(count >= MIDI_IN_BUFFER_SIZE))
return 0;
/* Get the MIDI data from the comm page */
received = 0;
for (i = 1; i <= count; i++) {
/* Get the MIDI byte */
midi_byte = le16_to_cpu(chip->comm_page->midi_input[i]);
/* Parse the incoming MIDI stream. The incoming MIDI data
consists of MIDI bytes and timestamps for the MIDI time code
0xF1 bytes. mtc_process_data() is a little state machine that
parses the stream. If you get MIDI_IN_SKIP_DATA back, then
this is a timestamp byte, not a MIDI byte, so don't store it
in the MIDI input buffer. */
if (mtc_process_data(chip, midi_byte) == MIDI_IN_SKIP_DATA)
continue;
chip->midi_buffer[received++] = (u8)midi_byte;
}
return received;
}
/******************************************************************************
MIDI interface
******************************************************************************/
static int snd_echo_midi_input_open(struct snd_rawmidi_substream *substream)
{
struct echoaudio *chip = substream->rmidi->private_data;
chip->midi_in = substream;
return 0;
}
static void snd_echo_midi_input_trigger(struct snd_rawmidi_substream *substream,
int up)
{
struct echoaudio *chip = substream->rmidi->private_data;
if (up != chip->midi_input_enabled) {
spin_lock_irq(&chip->lock);
enable_midi_input(chip, up);
spin_unlock_irq(&chip->lock);
chip->midi_input_enabled = up;
}
}
static int snd_echo_midi_input_close(struct snd_rawmidi_substream *substream)
{
struct echoaudio *chip = substream->rmidi->private_data;
chip->midi_in = NULL;
return 0;
}
static int snd_echo_midi_output_open(struct snd_rawmidi_substream *substream)
{
struct echoaudio *chip = substream->rmidi->private_data;
chip->tinuse = 0;
chip->midi_full = 0;
chip->midi_out = substream;
return 0;
}
static void snd_echo_midi_output_write(struct timer_list *t)
{
struct echoaudio *chip = from_timer(chip, t, timer);
unsigned long flags;
int bytes, sent, time;
unsigned char buf[MIDI_OUT_BUFFER_SIZE - 1];
/* No interrupts are involved: we have to check at regular intervals
if the card's output buffer has room for new data. */
sent = 0;
spin_lock_irqsave(&chip->lock, flags);
chip->midi_full = 0;
if (!snd_rawmidi_transmit_empty(chip->midi_out)) {
bytes = snd_rawmidi_transmit_peek(chip->midi_out, buf,
MIDI_OUT_BUFFER_SIZE - 1);
dev_dbg(chip->card->dev, "Try to send %d bytes...\n", bytes);
sent = write_midi(chip, buf, bytes);
if (sent < 0) {
dev_err(chip->card->dev,
"write_midi() error %d\n", sent);
/* retry later */
sent = 9000;
chip->midi_full = 1;
} else if (sent > 0) {
dev_dbg(chip->card->dev, "%d bytes sent\n", sent);
snd_rawmidi_transmit_ack(chip->midi_out, sent);
} else {
/* Buffer is full. DSP's internal buffer is 64 (128 ?)
bytes long. Let's wait until half of them are sent */
dev_dbg(chip->card->dev, "Full\n");
sent = 32;
chip->midi_full = 1;
}
}
/* We restart the timer only if there is some data left to send */
if (!snd_rawmidi_transmit_empty(chip->midi_out) && chip->tinuse) {
/* The timer will expire slightly after the data has been
sent */
time = (sent << 3) / 25 + 1; /* 8/25=0.32ms to send a byte */
mod_timer(&chip->timer, jiffies + (time * HZ + 999) / 1000);
dev_dbg(chip->card->dev,
"Timer armed(%d)\n", ((time * HZ + 999) / 1000));
}
spin_unlock_irqrestore(&chip->lock, flags);
}
static void snd_echo_midi_output_trigger(struct snd_rawmidi_substream *substream,
int up)
{
struct echoaudio *chip = substream->rmidi->private_data;
dev_dbg(chip->card->dev, "snd_echo_midi_output_trigger(%d)\n", up);
spin_lock_irq(&chip->lock);
if (up) {
if (!chip->tinuse) {
timer_setup(&chip->timer, snd_echo_midi_output_write,
0);
chip->tinuse = 1;
}
} else {
if (chip->tinuse) {
chip->tinuse = 0;
spin_unlock_irq(&chip->lock);
del_timer_sync(&chip->timer);
dev_dbg(chip->card->dev, "Timer removed\n");
return;
}
}
spin_unlock_irq(&chip->lock);
if (up && !chip->midi_full)
snd_echo_midi_output_write(&chip->timer);
}
static int snd_echo_midi_output_close(struct snd_rawmidi_substream *substream)
{
struct echoaudio *chip = substream->rmidi->private_data;
chip->midi_out = NULL;
return 0;
}
static const struct snd_rawmidi_ops snd_echo_midi_input = {
.open = snd_echo_midi_input_open,
.close = snd_echo_midi_input_close,
.trigger = snd_echo_midi_input_trigger,
};
static const struct snd_rawmidi_ops snd_echo_midi_output = {
.open = snd_echo_midi_output_open,
.close = snd_echo_midi_output_close,
.trigger = snd_echo_midi_output_trigger,
};
/* <--snd_echo_probe() */
static int snd_echo_midi_create(struct snd_card *card,
struct echoaudio *chip)
{
int err;
err = snd_rawmidi_new(card, card->shortname, 0, 1, 1, &chip->rmidi);
if (err < 0)
return err;
strcpy(chip->rmidi->name, card->shortname);
chip->rmidi->private_data = chip;
snd_rawmidi_set_ops(chip->rmidi, SNDRV_RAWMIDI_STREAM_INPUT,
&snd_echo_midi_input);
snd_rawmidi_set_ops(chip->rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT,
&snd_echo_midi_output);
chip->rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT |
SNDRV_RAWMIDI_INFO_INPUT | SNDRV_RAWMIDI_INFO_DUPLEX;
return 0;
}
| linux-master | sound/pci/echoaudio/midi.c |
/***************************************************************************
Copyright Echo Digital Audio Corporation (c) 1998 - 2004
All rights reserved
www.echoaudio.com
This file is part of Echo Digital Audio's generic driver library.
Echo Digital Audio's generic driver library is free software;
you can redistribute it and/or modify it under the terms of
the GNU General Public License as published by the Free Software
Foundation.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston,
MA 02111-1307, USA.
*************************************************************************
Translation from C++ and adaptation for use in ALSA-Driver
were made by Giuliano Pochini <[email protected]>
****************************************************************************/
static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id)
{
int err;
if (snd_BUG_ON((subdevice_id & 0xfff0) != DARLA24))
return -ENODEV;
err = init_dsp_comm_page(chip);
if (err) {
dev_err(chip->card->dev,
"init_hw: could not initialize DSP comm page\n");
return err;
}
chip->device_id = device_id;
chip->subdevice_id = subdevice_id;
chip->bad_board = true;
chip->dsp_code_to_load = FW_DARLA24_DSP;
/* Since this card has no ASIC, mark it as loaded so everything
works OK */
chip->asic_loaded = true;
chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL |
ECHO_CLOCK_BIT_ESYNC;
err = load_firmware(chip);
if (err < 0)
return err;
chip->bad_board = false;
return err;
}
static int set_mixer_defaults(struct echoaudio *chip)
{
return init_line_levels(chip);
}
static u32 detect_input_clocks(const struct echoaudio *chip)
{
u32 clocks_from_dsp, clock_bits;
/* Map the DSP clock detect bits to the generic driver clock
detect bits */
clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks);
clock_bits = ECHO_CLOCK_BIT_INTERNAL;
if (clocks_from_dsp & GLDM_CLOCK_DETECT_BIT_ESYNC)
clock_bits |= ECHO_CLOCK_BIT_ESYNC;
return clock_bits;
}
/* The Darla24 has no ASIC. Just do nothing */
static int load_asic(struct echoaudio *chip)
{
return 0;
}
static int set_sample_rate(struct echoaudio *chip, u32 rate)
{
u8 clock;
switch (rate) {
case 96000:
clock = GD24_96000;
break;
case 88200:
clock = GD24_88200;
break;
case 48000:
clock = GD24_48000;
break;
case 44100:
clock = GD24_44100;
break;
case 32000:
clock = GD24_32000;
break;
case 22050:
clock = GD24_22050;
break;
case 16000:
clock = GD24_16000;
break;
case 11025:
clock = GD24_11025;
break;
case 8000:
clock = GD24_8000;
break;
default:
dev_err(chip->card->dev,
"set_sample_rate: Error, invalid sample rate %d\n",
rate);
return -EINVAL;
}
if (wait_handshake(chip))
return -EIO;
dev_dbg(chip->card->dev,
"set_sample_rate: %d clock %d\n", rate, clock);
chip->sample_rate = rate;
/* Override the sample rate if this card is set to Echo sync. */
if (chip->input_clock == ECHO_CLOCK_ESYNC)
clock = GD24_EXT_SYNC;
chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP ? */
chip->comm_page->gd_clock_state = clock;
clear_handshake(chip);
return send_vector(chip, DSP_VC_SET_GD_AUDIO_STATE);
}
static int set_input_clock(struct echoaudio *chip, u16 clock)
{
if (snd_BUG_ON(clock != ECHO_CLOCK_INTERNAL &&
clock != ECHO_CLOCK_ESYNC))
return -EINVAL;
chip->input_clock = clock;
return set_sample_rate(chip, chip->sample_rate);
}
| linux-master | sound/pci/echoaudio/darla24_dsp.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* ALSA driver for Echoaudio soundcards.
* Copyright (C) 2003-2004 Giuliano Pochini <[email protected]>
*/
#define ECHOGALS_FAMILY
#define ECHOCARD_DARLA24
#define ECHOCARD_NAME "Darla24"
#define ECHOCARD_HAS_MONITOR
#define ECHOCARD_HAS_INPUT_NOMINAL_LEVEL
#define ECHOCARD_HAS_OUTPUT_NOMINAL_LEVEL
#define ECHOCARD_HAS_EXTERNAL_CLOCK
#define ECHOCARD_HAS_SUPER_INTERLEAVE
/* Pipe indexes */
#define PX_ANALOG_OUT 0 /* 8 */
#define PX_DIGITAL_OUT 8 /* 0 */
#define PX_ANALOG_IN 8 /* 2 */
#define PX_DIGITAL_IN 10 /* 0 */
#define PX_NUM 10
/* Bus indexes */
#define BX_ANALOG_OUT 0 /* 8 */
#define BX_DIGITAL_OUT 8 /* 0 */
#define BX_ANALOG_IN 8 /* 2 */
#define BX_DIGITAL_IN 10 /* 0 */
#define BX_NUM 10
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/pci.h>
#include <linux/module.h>
#include <linux/firmware.h>
#include <linux/slab.h>
#include <linux/io.h>
#include <sound/core.h>
#include <sound/info.h>
#include <sound/control.h>
#include <sound/tlv.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/asoundef.h>
#include <sound/initval.h>
#include <linux/atomic.h>
#include "echoaudio.h"
MODULE_FIRMWARE("ea/darla24_dsp.fw");
#define FW_DARLA24_DSP 0
static const struct firmware card_fw[] = {
{0, "darla24_dsp.fw"}
};
static const struct pci_device_id snd_echo_ids[] = {
{0x1057, 0x1801, 0xECC0, 0x0040, 0, 0, 0}, /* DSP 56301 Darla24 rev.0 */
{0x1057, 0x1801, 0xECC0, 0x0041, 0, 0, 0}, /* DSP 56301 Darla24 rev.1 */
{0,}
};
static const struct snd_pcm_hardware pcm_hardware_skel = {
.info = SNDRV_PCM_INFO_MMAP |
SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_MMAP_VALID |
SNDRV_PCM_INFO_PAUSE |
SNDRV_PCM_INFO_SYNC_START,
.formats = SNDRV_PCM_FMTBIT_U8 |
SNDRV_PCM_FMTBIT_S16_LE |
SNDRV_PCM_FMTBIT_S24_3LE |
SNDRV_PCM_FMTBIT_S32_LE |
SNDRV_PCM_FMTBIT_S32_BE,
.rates = SNDRV_PCM_RATE_8000_48000 |
SNDRV_PCM_RATE_88200 |
SNDRV_PCM_RATE_96000,
.rate_min = 8000,
.rate_max = 96000,
.channels_min = 1,
.channels_max = 8,
.buffer_bytes_max = 262144,
.period_bytes_min = 32,
.period_bytes_max = 131072,
.periods_min = 2,
.periods_max = 220,
/* One page (4k) contains 512 instructions. I don't know if the hw
supports lists longer than this. In this case periods_max=220 is a
safe limit to make sure the list never exceeds 512 instructions. */
};
#include "darla24_dsp.c"
#include "echoaudio_dsp.c"
#include "echoaudio.c"
| linux-master | sound/pci/echoaudio/darla24.c |
/****************************************************************************
Copyright Echo Digital Audio Corporation (c) 1998 - 2004
All rights reserved
www.echoaudio.com
This file is part of Echo Digital Audio's generic driver library.
Echo Digital Audio's generic driver library is free software;
you can redistribute it and/or modify it under the terms of
the GNU General Public License as published by the Free Software
Foundation.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston,
MA 02111-1307, USA.
*************************************************************************
Translation from C++ and adaptation for use in ALSA-Driver
were made by Giuliano Pochini <[email protected]>
****************************************************************************/
static int load_asic(struct echoaudio *chip);
static int dsp_set_digital_mode(struct echoaudio *chip, u8 mode);
static int set_digital_mode(struct echoaudio *chip, u8 mode);
static int check_asic_status(struct echoaudio *chip);
static int set_sample_rate(struct echoaudio *chip, u32 rate);
static int set_input_clock(struct echoaudio *chip, u16 clock);
static int set_professional_spdif(struct echoaudio *chip, char prof);
static int set_phantom_power(struct echoaudio *chip, char on);
static int write_control_reg(struct echoaudio *chip, u32 ctl, u32 frq,
char force);
#include <linux/interrupt.h>
static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id)
{
int err;
local_irq_enable();
if (snd_BUG_ON((subdevice_id & 0xfff0) != ECHO3G))
return -ENODEV;
err = init_dsp_comm_page(chip);
if (err) {
dev_err(chip->card->dev,
"init_hw - could not initialize DSP comm page\n");
return err;
}
chip->comm_page->e3g_frq_register =
cpu_to_le32((E3G_MAGIC_NUMBER / 48000) - 2);
chip->device_id = device_id;
chip->subdevice_id = subdevice_id;
chip->bad_board = true;
chip->has_midi = true;
chip->dsp_code_to_load = FW_ECHO3G_DSP;
/* Load the DSP code and the ASIC on the PCI card and get
what type of external box is attached */
err = load_firmware(chip);
if (err < 0) {
return err;
} else if (err == E3G_GINA3G_BOX_TYPE) {
chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL |
ECHO_CLOCK_BIT_SPDIF |
ECHO_CLOCK_BIT_ADAT;
chip->card_name = "Gina3G";
chip->px_digital_out = chip->bx_digital_out = 6;
chip->px_analog_in = chip->bx_analog_in = 14;
chip->px_digital_in = chip->bx_digital_in = 16;
chip->px_num = chip->bx_num = 24;
chip->has_phantom_power = true;
chip->hasnt_input_nominal_level = true;
} else if (err == E3G_LAYLA3G_BOX_TYPE) {
chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL |
ECHO_CLOCK_BIT_SPDIF |
ECHO_CLOCK_BIT_ADAT |
ECHO_CLOCK_BIT_WORD;
chip->card_name = "Layla3G";
chip->px_digital_out = chip->bx_digital_out = 8;
chip->px_analog_in = chip->bx_analog_in = 16;
chip->px_digital_in = chip->bx_digital_in = 24;
chip->px_num = chip->bx_num = 32;
} else {
return -ENODEV;
}
chip->digital_modes = ECHOCAPS_HAS_DIGITAL_MODE_SPDIF_RCA |
ECHOCAPS_HAS_DIGITAL_MODE_SPDIF_OPTICAL |
ECHOCAPS_HAS_DIGITAL_MODE_ADAT;
return err;
}
static int set_mixer_defaults(struct echoaudio *chip)
{
chip->digital_mode = DIGITAL_MODE_SPDIF_RCA;
chip->professional_spdif = false;
chip->non_audio_spdif = false;
chip->bad_board = false;
chip->phantom_power = false;
return init_line_levels(chip);
}
static int set_phantom_power(struct echoaudio *chip, char on)
{
u32 control_reg = le32_to_cpu(chip->comm_page->control_register);
if (on)
control_reg |= E3G_PHANTOM_POWER;
else
control_reg &= ~E3G_PHANTOM_POWER;
chip->phantom_power = on;
return write_control_reg(chip, control_reg,
le32_to_cpu(chip->comm_page->e3g_frq_register),
0);
}
| linux-master | sound/pci/echoaudio/echo3g_dsp.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* ALSA driver for Echoaudio soundcards.
* Copyright (C) 2003-2004 Giuliano Pochini <[email protected]>
*/
#define INDIGO_FAMILY
#define ECHOCARD_INDIGO_IO
#define ECHOCARD_NAME "Indigo IO"
#define ECHOCARD_HAS_MONITOR
#define ECHOCARD_HAS_SUPER_INTERLEAVE
#define ECHOCARD_HAS_VMIXER
#define ECHOCARD_HAS_STEREO_BIG_ENDIAN32
/* Pipe indexes */
#define PX_ANALOG_OUT 0 /* 8 */
#define PX_DIGITAL_OUT 8 /* 0 */
#define PX_ANALOG_IN 8 /* 2 */
#define PX_DIGITAL_IN 10 /* 0 */
#define PX_NUM 10
/* Bus indexes */
#define BX_ANALOG_OUT 0 /* 2 */
#define BX_DIGITAL_OUT 2 /* 0 */
#define BX_ANALOG_IN 2 /* 2 */
#define BX_DIGITAL_IN 4 /* 0 */
#define BX_NUM 4
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/pci.h>
#include <linux/module.h>
#include <linux/firmware.h>
#include <linux/slab.h>
#include <linux/io.h>
#include <sound/core.h>
#include <sound/info.h>
#include <sound/control.h>
#include <sound/tlv.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/asoundef.h>
#include <sound/initval.h>
#include <linux/atomic.h>
#include "echoaudio.h"
MODULE_FIRMWARE("ea/loader_dsp.fw");
MODULE_FIRMWARE("ea/indigo_io_dsp.fw");
#define FW_361_LOADER 0
#define FW_INDIGO_IO_DSP 1
static const struct firmware card_fw[] = {
{0, "loader_dsp.fw"},
{0, "indigo_io_dsp.fw"}
};
static const struct pci_device_id snd_echo_ids[] = {
{0x1057, 0x3410, 0xECC0, 0x00A0, 0, 0, 0}, /* Indigo IO*/
{0,}
};
static const struct snd_pcm_hardware pcm_hardware_skel = {
.info = SNDRV_PCM_INFO_MMAP |
SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_MMAP_VALID |
SNDRV_PCM_INFO_PAUSE |
SNDRV_PCM_INFO_SYNC_START,
.formats = SNDRV_PCM_FMTBIT_U8 |
SNDRV_PCM_FMTBIT_S16_LE |
SNDRV_PCM_FMTBIT_S24_3LE |
SNDRV_PCM_FMTBIT_S32_LE |
SNDRV_PCM_FMTBIT_S32_BE,
.rates = SNDRV_PCM_RATE_32000 |
SNDRV_PCM_RATE_44100 |
SNDRV_PCM_RATE_48000 |
SNDRV_PCM_RATE_88200 |
SNDRV_PCM_RATE_96000,
.rate_min = 32000,
.rate_max = 96000,
.channels_min = 1,
.channels_max = 8,
.buffer_bytes_max = 262144,
.period_bytes_min = 32,
.period_bytes_max = 131072,
.periods_min = 2,
.periods_max = 220,
};
#include "indigoio_dsp.c"
#include "echoaudio_dsp.c"
#include "echoaudio.c"
| linux-master | sound/pci/echoaudio/indigoio.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* ALSA driver for Echoaudio soundcards.
* Copyright (C) 2009 Giuliano Pochini <[email protected]>
*/
#define INDIGO_FAMILY
#define ECHOCARD_INDIGO_DJX
#define ECHOCARD_NAME "Indigo DJx"
#define ECHOCARD_HAS_SUPER_INTERLEAVE
#define ECHOCARD_HAS_VMIXER
#define ECHOCARD_HAS_STEREO_BIG_ENDIAN32
/* Pipe indexes */
#define PX_ANALOG_OUT 0 /* 8 */
#define PX_DIGITAL_OUT 8 /* 0 */
#define PX_ANALOG_IN 8 /* 0 */
#define PX_DIGITAL_IN 8 /* 0 */
#define PX_NUM 8
/* Bus indexes */
#define BX_ANALOG_OUT 0 /* 4 */
#define BX_DIGITAL_OUT 4 /* 0 */
#define BX_ANALOG_IN 4 /* 0 */
#define BX_DIGITAL_IN 4 /* 0 */
#define BX_NUM 4
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/pci.h>
#include <linux/module.h>
#include <linux/firmware.h>
#include <linux/io.h>
#include <linux/slab.h>
#include <sound/core.h>
#include <sound/info.h>
#include <sound/control.h>
#include <sound/tlv.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/asoundef.h>
#include <sound/initval.h>
#include <linux/atomic.h>
#include "echoaudio.h"
MODULE_FIRMWARE("ea/loader_dsp.fw");
MODULE_FIRMWARE("ea/indigo_djx_dsp.fw");
#define FW_361_LOADER 0
#define FW_INDIGO_DJX_DSP 1
static const struct firmware card_fw[] = {
{0, "loader_dsp.fw"},
{0, "indigo_djx_dsp.fw"}
};
static const struct pci_device_id snd_echo_ids[] = {
{0x1057, 0x3410, 0xECC0, 0x00E0, 0, 0, 0}, /* Indigo DJx*/
{0,}
};
static const struct snd_pcm_hardware pcm_hardware_skel = {
.info = SNDRV_PCM_INFO_MMAP |
SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_MMAP_VALID |
SNDRV_PCM_INFO_PAUSE |
SNDRV_PCM_INFO_SYNC_START,
.formats = SNDRV_PCM_FMTBIT_U8 |
SNDRV_PCM_FMTBIT_S16_LE |
SNDRV_PCM_FMTBIT_S24_3LE |
SNDRV_PCM_FMTBIT_S32_LE |
SNDRV_PCM_FMTBIT_S32_BE,
.rates = SNDRV_PCM_RATE_32000 |
SNDRV_PCM_RATE_44100 |
SNDRV_PCM_RATE_48000 |
SNDRV_PCM_RATE_64000 |
SNDRV_PCM_RATE_88200 |
SNDRV_PCM_RATE_96000,
.rate_min = 32000,
.rate_max = 96000,
.channels_min = 1,
.channels_max = 4,
.buffer_bytes_max = 262144,
.period_bytes_min = 32,
.period_bytes_max = 131072,
.periods_min = 2,
.periods_max = 220,
};
#include "indigodjx_dsp.c"
#include "indigo_express_dsp.c"
#include "echoaudio_dsp.c"
#include "echoaudio.c"
| linux-master | sound/pci/echoaudio/indigodjx.c |
/************************************************************************
This file is part of Echo Digital Audio's generic driver library.
Copyright Echo Digital Audio Corporation (c) 1998 - 2005
All rights reserved
www.echoaudio.com
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*************************************************************************
Translation from C++ and adaptation for use in ALSA-Driver
were made by Giuliano Pochini <[email protected]>
*************************************************************************/
static int update_vmixer_level(struct echoaudio *chip);
static int set_vmixer_gain(struct echoaudio *chip, u16 output,
u16 pipe, int gain);
static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id)
{
int err;
if (snd_BUG_ON((subdevice_id & 0xfff0) != INDIGO_IOX))
return -ENODEV;
err = init_dsp_comm_page(chip);
if (err < 0) {
dev_err(chip->card->dev,
"init_hw - could not initialize DSP comm page\n");
return err;
}
chip->device_id = device_id;
chip->subdevice_id = subdevice_id;
chip->bad_board = true;
chip->dsp_code_to_load = FW_INDIGO_IOX_DSP;
/* Since this card has no ASIC, mark it as loaded so everything
works OK */
chip->asic_loaded = true;
chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL;
err = load_firmware(chip);
if (err < 0)
return err;
chip->bad_board = false;
return err;
}
static int set_mixer_defaults(struct echoaudio *chip)
{
return init_line_levels(chip);
}
| linux-master | sound/pci/echoaudio/indigoiox_dsp.c |
// SPDX-License-Identifier: GPL-2.0-only
/*
* ALSA driver for Echoaudio soundcards.
* Copyright (C) 2003-2004 Giuliano Pochini <[email protected]>
*/
#define INDIGO_FAMILY
#define ECHOCARD_INDIGO
#define ECHOCARD_NAME "Indigo"
#define ECHOCARD_HAS_SUPER_INTERLEAVE
#define ECHOCARD_HAS_VMIXER
#define ECHOCARD_HAS_STEREO_BIG_ENDIAN32
/* Pipe indexes */
#define PX_ANALOG_OUT 0 /* 8 */
#define PX_DIGITAL_OUT 8 /* 0 */
#define PX_ANALOG_IN 8 /* 0 */
#define PX_DIGITAL_IN 8 /* 0 */
#define PX_NUM 8
/* Bus indexes */
#define BX_ANALOG_OUT 0 /* 2 */
#define BX_DIGITAL_OUT 2 /* 0 */
#define BX_ANALOG_IN 2 /* 0 */
#define BX_DIGITAL_IN 2 /* 0 */
#define BX_NUM 2
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/pci.h>
#include <linux/module.h>
#include <linux/firmware.h>
#include <linux/slab.h>
#include <linux/io.h>
#include <sound/core.h>
#include <sound/info.h>
#include <sound/control.h>
#include <sound/tlv.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/asoundef.h>
#include <sound/initval.h>
#include <linux/atomic.h>
#include "echoaudio.h"
MODULE_FIRMWARE("ea/loader_dsp.fw");
MODULE_FIRMWARE("ea/indigo_dsp.fw");
#define FW_361_LOADER 0
#define FW_INDIGO_DSP 1
static const struct firmware card_fw[] = {
{0, "loader_dsp.fw"},
{0, "indigo_dsp.fw"}
};
static const struct pci_device_id snd_echo_ids[] = {
{0x1057, 0x3410, 0xECC0, 0x0090, 0, 0, 0}, /* Indigo */
{0,}
};
static const struct snd_pcm_hardware pcm_hardware_skel = {
.info = SNDRV_PCM_INFO_MMAP |
SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_MMAP_VALID |
SNDRV_PCM_INFO_PAUSE |
SNDRV_PCM_INFO_SYNC_START,
.formats = SNDRV_PCM_FMTBIT_U8 |
SNDRV_PCM_FMTBIT_S16_LE |
SNDRV_PCM_FMTBIT_S24_3LE |
SNDRV_PCM_FMTBIT_S32_LE |
SNDRV_PCM_FMTBIT_S32_BE,
.rates = SNDRV_PCM_RATE_32000 |
SNDRV_PCM_RATE_44100 |
SNDRV_PCM_RATE_48000 |
SNDRV_PCM_RATE_88200 |
SNDRV_PCM_RATE_96000,
.rate_min = 32000,
.rate_max = 96000,
.channels_min = 1,
.channels_max = 8,
.buffer_bytes_max = 262144,
.period_bytes_min = 32,
.period_bytes_max = 131072,
.periods_min = 2,
.periods_max = 220,
};
#include "indigo_dsp.c"
#include "echoaudio_dsp.c"
#include "echoaudio.c"
| linux-master | sound/pci/echoaudio/indigo.c |
/****************************************************************************
Copyright Echo Digital Audio Corporation (c) 1998 - 2004
All rights reserved
www.echoaudio.com
This file is part of Echo Digital Audio's generic driver library.
Echo Digital Audio's generic driver library is free software;
you can redistribute it and/or modify it under the terms of
the GNU General Public License as published by the Free Software
Foundation.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston,
MA 02111-1307, USA.
*************************************************************************
Translation from C++ and adaptation for use in ALSA-Driver
were made by Giuliano Pochini <[email protected]>
****************************************************************************/
static int set_vmixer_gain(struct echoaudio *chip, u16 output, u16 pipe,
int gain);
static int update_vmixer_level(struct echoaudio *chip);
static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id)
{
int err;
if (snd_BUG_ON((subdevice_id & 0xfff0) != INDIGO_DJ))
return -ENODEV;
err = init_dsp_comm_page(chip);
if (err) {
dev_err(chip->card->dev,
"init_hw - could not initialize DSP comm page\n");
return err;
}
chip->device_id = device_id;
chip->subdevice_id = subdevice_id;
chip->bad_board = true;
chip->dsp_code_to_load = FW_INDIGO_DJ_DSP;
/* Since this card has no ASIC, mark it as loaded so everything
works OK */
chip->asic_loaded = true;
chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL;
err = load_firmware(chip);
if (err < 0)
return err;
chip->bad_board = false;
return err;
}
static int set_mixer_defaults(struct echoaudio *chip)
{
return init_line_levels(chip);
}
static u32 detect_input_clocks(const struct echoaudio *chip)
{
return ECHO_CLOCK_BIT_INTERNAL;
}
/* The IndigoDJ has no ASIC. Just do nothing */
static int load_asic(struct echoaudio *chip)
{
return 0;
}
static int set_sample_rate(struct echoaudio *chip, u32 rate)
{
u32 control_reg;
switch (rate) {
case 96000:
control_reg = MIA_96000;
break;
case 88200:
control_reg = MIA_88200;
break;
case 48000:
control_reg = MIA_48000;
break;
case 44100:
control_reg = MIA_44100;
break;
case 32000:
control_reg = MIA_32000;
break;
default:
dev_err(chip->card->dev,
"set_sample_rate: %d invalid!\n", rate);
return -EINVAL;
}
/* Set the control register if it has changed */
if (control_reg != le32_to_cpu(chip->comm_page->control_register)) {
if (wait_handshake(chip))
return -EIO;
chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP */
chip->comm_page->control_register = cpu_to_le32(control_reg);
chip->sample_rate = rate;
clear_handshake(chip);
return send_vector(chip, DSP_VC_UPDATE_CLOCKS);
}
return 0;
}
/* This function routes the sound from a virtual channel to a real output */
static int set_vmixer_gain(struct echoaudio *chip, u16 output, u16 pipe,
int gain)
{
int index;
if (snd_BUG_ON(pipe >= num_pipes_out(chip) ||
output >= num_busses_out(chip)))
return -EINVAL;
if (wait_handshake(chip))
return -EIO;
chip->vmixer_gain[output][pipe] = gain;
index = output * num_pipes_out(chip) + pipe;
chip->comm_page->vmixer[index] = gain;
dev_dbg(chip->card->dev,
"set_vmixer_gain: pipe %d, out %d = %d\n", pipe, output, gain);
return 0;
}
/* Tell the DSP to read and update virtual mixer levels in comm page. */
static int update_vmixer_level(struct echoaudio *chip)
{
if (wait_handshake(chip))
return -EIO;
clear_handshake(chip);
return send_vector(chip, DSP_VC_SET_VMIXER_GAIN);
}
| linux-master | sound/pci/echoaudio/indigodj_dsp.c |
/************************************************************************
This file is part of Echo Digital Audio's generic driver library.
Copyright Echo Digital Audio Corporation (c) 1998 - 2005
All rights reserved
www.echoaudio.com
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*************************************************************************
Translation from C++ and adaptation for use in ALSA-Driver
were made by Giuliano Pochini <[email protected]>
*************************************************************************/
static int update_vmixer_level(struct echoaudio *chip);
static int set_vmixer_gain(struct echoaudio *chip, u16 output,
u16 pipe, int gain);
static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id)
{
int err;
if (snd_BUG_ON((subdevice_id & 0xfff0) != INDIGO_DJX))
return -ENODEV;
err = init_dsp_comm_page(chip);
if (err < 0) {
dev_err(chip->card->dev,
"init_hw - could not initialize DSP comm page\n");
return err;
}
chip->device_id = device_id;
chip->subdevice_id = subdevice_id;
chip->bad_board = true;
chip->dsp_code_to_load = FW_INDIGO_DJX_DSP;
/* Since this card has no ASIC, mark it as loaded so everything
works OK */
chip->asic_loaded = true;
chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL;
err = load_firmware(chip);
if (err < 0)
return err;
chip->bad_board = false;
return err;
}
static int set_mixer_defaults(struct echoaudio *chip)
{
return init_line_levels(chip);
}
| linux-master | sound/pci/echoaudio/indigodjx_dsp.c |
// SPDX-License-Identifier: GPL-2.0-only
/*****************************************************************************
*
* Copyright (C) 2008 Cedric Bregardis <[email protected]> and
* Jean-Christian Hassler <[email protected]>
* Copyright 1998 Emagic Soft- und Hardware GmbH
* Copyright 2002 Martijn Sipkema
*
* This file is part of the Audiowerk2 ALSA driver
*
*****************************************************************************/
#define TSL_WS0 (1UL << 31)
#define TSL_WS1 (1UL << 30)
#define TSL_WS2 (1UL << 29)
#define TSL_WS3 (1UL << 28)
#define TSL_WS4 (1UL << 27)
#define TSL_DIS_A1 (1UL << 24)
#define TSL_SDW_A1 (1UL << 23)
#define TSL_SIB_A1 (1UL << 22)
#define TSL_SF_A1 (1UL << 21)
#define TSL_LF_A1 (1UL << 20)
#define TSL_BSEL_A1 (1UL << 17)
#define TSL_DOD_A1 (1UL << 15)
#define TSL_LOW_A1 (1UL << 14)
#define TSL_DIS_A2 (1UL << 11)
#define TSL_SDW_A2 (1UL << 10)
#define TSL_SIB_A2 (1UL << 9)
#define TSL_SF_A2 (1UL << 8)
#define TSL_LF_A2 (1UL << 7)
#define TSL_BSEL_A2 (1UL << 4)
#define TSL_DOD_A2 (1UL << 2)
#define TSL_LOW_A2 (1UL << 1)
#define TSL_EOS (1UL << 0)
/* Audiowerk8 hardware setup: */
/* WS0, SD4, TSL1 - Analog/ digital in */
/* WS1, SD0, TSL1 - Analog out #1, digital out */
/* WS2, SD2, TSL1 - Analog out #2 */
/* WS3, SD1, TSL2 - Analog out #3 */
/* WS4, SD3, TSL2 - Analog out #4 */
/* Audiowerk8 timing: */
/* Timeslot: | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | ... */
/* A1_INPUT: */
/* SD4: <_ADC-L_>-------<_ADC-R_>-------< */
/* WS0: _______________/---------------\_ */
/* A1_OUTPUT: */
/* SD0: <_1-L___>-------<_1-R___>-------< */
/* WS1: _______________/---------------\_ */
/* SD2: >-------<_2-L___>-------<_2-R___> */
/* WS2: -------\_______________/--------- */
/* A2_OUTPUT: */
/* SD1: <_3-L___>-------<_3-R___>-------< */
/* WS3: _______________/---------------\_ */
/* SD3: >-------<_4-L___>-------<_4-R___> */
/* WS4: -------\_______________/--------- */
static const int tsl1[8] = {
1 * TSL_SDW_A1 | 3 * TSL_BSEL_A1 |
0 * TSL_DIS_A1 | 0 * TSL_DOD_A1 | TSL_LF_A1,
1 * TSL_SDW_A1 | 2 * TSL_BSEL_A1 |
0 * TSL_DIS_A1 | 0 * TSL_DOD_A1,
0 * TSL_SDW_A1 | 3 * TSL_BSEL_A1 |
0 * TSL_DIS_A1 | 0 * TSL_DOD_A1,
0 * TSL_SDW_A1 | 2 * TSL_BSEL_A1 |
0 * TSL_DIS_A1 | 0 * TSL_DOD_A1,
1 * TSL_SDW_A1 | 1 * TSL_BSEL_A1 |
0 * TSL_DIS_A1 | 0 * TSL_DOD_A1 | TSL_WS1 | TSL_WS0,
1 * TSL_SDW_A1 | 0 * TSL_BSEL_A1 |
0 * TSL_DIS_A1 | 0 * TSL_DOD_A1 | TSL_WS1 | TSL_WS0,
0 * TSL_SDW_A1 | 1 * TSL_BSEL_A1 |
0 * TSL_DIS_A1 | 0 * TSL_DOD_A1 | TSL_WS1 | TSL_WS0,
0 * TSL_SDW_A1 | 0 * TSL_BSEL_A1 | 0 * TSL_DIS_A1 |
0 * TSL_DOD_A1 | TSL_WS1 | TSL_WS0 | TSL_SF_A1 | TSL_EOS,
};
static const int tsl2[8] = {
0 * TSL_SDW_A2 | 3 * TSL_BSEL_A2 | 2 * TSL_DOD_A2 | TSL_LF_A2,
0 * TSL_SDW_A2 | 2 * TSL_BSEL_A2 | 2 * TSL_DOD_A2,
0 * TSL_SDW_A2 | 3 * TSL_BSEL_A2 | 2 * TSL_DOD_A2,
0 * TSL_SDW_A2 | 2 * TSL_BSEL_A2 | 2 * TSL_DOD_A2,
0 * TSL_SDW_A2 | 1 * TSL_BSEL_A2 | 2 * TSL_DOD_A2 | TSL_WS2,
0 * TSL_SDW_A2 | 0 * TSL_BSEL_A2 | 2 * TSL_DOD_A2 | TSL_WS2,
0 * TSL_SDW_A2 | 1 * TSL_BSEL_A2 | 2 * TSL_DOD_A2 | TSL_WS2,
0 * TSL_SDW_A2 | 0 * TSL_BSEL_A2 | 2 * TSL_DOD_A2 | TSL_WS2 | TSL_EOS
};
| linux-master | sound/pci/aw2/aw2-tsl.c |
// SPDX-License-Identifier: GPL-2.0-only
/*****************************************************************************
*
* Copyright (C) 2008 Cedric Bregardis <[email protected]> and
* Jean-Christian Hassler <[email protected]>
*
* This file is part of the Audiowerk2 ALSA driver
*
*****************************************************************************/
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/dma-mapping.h>
#include <linux/slab.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/io.h>
#include <linux/module.h>
#include <sound/core.h>
#include <sound/initval.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/control.h>
#include "saa7146.h"
#include "aw2-saa7146.h"
MODULE_AUTHOR("Cedric Bregardis <[email protected]>, "
"Jean-Christian Hassler <[email protected]>");
MODULE_DESCRIPTION("Emagic Audiowerk 2 sound driver");
MODULE_LICENSE("GPL");
/*********************************
* DEFINES
********************************/
#define CTL_ROUTE_ANALOG 0
#define CTL_ROUTE_DIGITAL 1
/*********************************
* TYPEDEFS
********************************/
/* hardware definition */
static const struct snd_pcm_hardware snd_aw2_playback_hw = {
.info = (SNDRV_PCM_INFO_MMAP |
SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER | SNDRV_PCM_INFO_MMAP_VALID),
.formats = SNDRV_PCM_FMTBIT_S16_LE,
.rates = SNDRV_PCM_RATE_44100,
.rate_min = 44100,
.rate_max = 44100,
.channels_min = 2,
.channels_max = 4,
.buffer_bytes_max = 32768,
.period_bytes_min = 4096,
.period_bytes_max = 32768,
.periods_min = 1,
.periods_max = 1024,
};
static const struct snd_pcm_hardware snd_aw2_capture_hw = {
.info = (SNDRV_PCM_INFO_MMAP |
SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER | SNDRV_PCM_INFO_MMAP_VALID),
.formats = SNDRV_PCM_FMTBIT_S16_LE,
.rates = SNDRV_PCM_RATE_44100,
.rate_min = 44100,
.rate_max = 44100,
.channels_min = 2,
.channels_max = 2,
.buffer_bytes_max = 32768,
.period_bytes_min = 4096,
.period_bytes_max = 32768,
.periods_min = 1,
.periods_max = 1024,
};
struct aw2_pcm_device {
struct snd_pcm *pcm;
unsigned int stream_number;
struct aw2 *chip;
};
struct aw2 {
struct snd_aw2_saa7146 saa7146;
struct pci_dev *pci;
int irq;
spinlock_t reg_lock;
struct mutex mtx;
unsigned long iobase_phys;
void __iomem *iobase_virt;
struct snd_card *card;
struct aw2_pcm_device device_playback[NB_STREAM_PLAYBACK];
struct aw2_pcm_device device_capture[NB_STREAM_CAPTURE];
};
/*********************************
* FUNCTION DECLARATIONS
********************************/
static int snd_aw2_create(struct snd_card *card, struct pci_dev *pci);
static int snd_aw2_probe(struct pci_dev *pci,
const struct pci_device_id *pci_id);
static int snd_aw2_pcm_playback_open(struct snd_pcm_substream *substream);
static int snd_aw2_pcm_playback_close(struct snd_pcm_substream *substream);
static int snd_aw2_pcm_capture_open(struct snd_pcm_substream *substream);
static int snd_aw2_pcm_capture_close(struct snd_pcm_substream *substream);
static int snd_aw2_pcm_prepare_playback(struct snd_pcm_substream *substream);
static int snd_aw2_pcm_prepare_capture(struct snd_pcm_substream *substream);
static int snd_aw2_pcm_trigger_playback(struct snd_pcm_substream *substream,
int cmd);
static int snd_aw2_pcm_trigger_capture(struct snd_pcm_substream *substream,
int cmd);
static snd_pcm_uframes_t snd_aw2_pcm_pointer_playback(struct snd_pcm_substream
*substream);
static snd_pcm_uframes_t snd_aw2_pcm_pointer_capture(struct snd_pcm_substream
*substream);
static int snd_aw2_new_pcm(struct aw2 *chip);
static int snd_aw2_control_switch_capture_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo);
static int snd_aw2_control_switch_capture_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value
*ucontrol);
static int snd_aw2_control_switch_capture_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value
*ucontrol);
/*********************************
* VARIABLES
********************************/
static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
module_param_array(index, int, NULL, 0444);
MODULE_PARM_DESC(index, "Index value for Audiowerk2 soundcard.");
module_param_array(id, charp, NULL, 0444);
MODULE_PARM_DESC(id, "ID string for the Audiowerk2 soundcard.");
module_param_array(enable, bool, NULL, 0444);
MODULE_PARM_DESC(enable, "Enable Audiowerk2 soundcard.");
static const struct pci_device_id snd_aw2_ids[] = {
{PCI_VENDOR_ID_PHILIPS, PCI_DEVICE_ID_PHILIPS_SAA7146, 0, 0,
0, 0, 0},
{0}
};
MODULE_DEVICE_TABLE(pci, snd_aw2_ids);
/* pci_driver definition */
static struct pci_driver aw2_driver = {
.name = KBUILD_MODNAME,
.id_table = snd_aw2_ids,
.probe = snd_aw2_probe,
};
module_pci_driver(aw2_driver);
/* operators for playback PCM alsa interface */
static const struct snd_pcm_ops snd_aw2_playback_ops = {
.open = snd_aw2_pcm_playback_open,
.close = snd_aw2_pcm_playback_close,
.prepare = snd_aw2_pcm_prepare_playback,
.trigger = snd_aw2_pcm_trigger_playback,
.pointer = snd_aw2_pcm_pointer_playback,
};
/* operators for capture PCM alsa interface */
static const struct snd_pcm_ops snd_aw2_capture_ops = {
.open = snd_aw2_pcm_capture_open,
.close = snd_aw2_pcm_capture_close,
.prepare = snd_aw2_pcm_prepare_capture,
.trigger = snd_aw2_pcm_trigger_capture,
.pointer = snd_aw2_pcm_pointer_capture,
};
static const struct snd_kcontrol_new aw2_control = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "PCM Capture Route",
.index = 0,
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
.private_value = 0xffff,
.info = snd_aw2_control_switch_capture_info,
.get = snd_aw2_control_switch_capture_get,
.put = snd_aw2_control_switch_capture_put
};
/*********************************
* FUNCTION IMPLEMENTATIONS
********************************/
/* component-destructor */
static void snd_aw2_free(struct snd_card *card)
{
struct aw2 *chip = card->private_data;
/* Free hardware */
snd_aw2_saa7146_free(&chip->saa7146);
}
/* chip-specific constructor */
static int snd_aw2_create(struct snd_card *card,
struct pci_dev *pci)
{
struct aw2 *chip = card->private_data;
int err;
/* initialize the PCI entry */
err = pcim_enable_device(pci);
if (err < 0)
return err;
pci_set_master(pci);
/* check PCI availability (32bit DMA) */
if (dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(32))) {
dev_err(card->dev, "Impossible to set 32bit mask DMA\n");
return -ENXIO;
}
/* initialize the stuff */
chip->card = card;
chip->pci = pci;
chip->irq = -1;
/* (1) PCI resource allocation */
err = pcim_iomap_regions(pci, 1 << 0, "Audiowerk2");
if (err < 0)
return err;
chip->iobase_phys = pci_resource_start(pci, 0);
chip->iobase_virt = pcim_iomap_table(pci)[0];
/* (2) initialization of the chip hardware */
snd_aw2_saa7146_setup(&chip->saa7146, chip->iobase_virt);
if (devm_request_irq(&pci->dev, pci->irq, snd_aw2_saa7146_interrupt,
IRQF_SHARED, KBUILD_MODNAME, chip)) {
dev_err(card->dev, "Cannot grab irq %d\n", pci->irq);
return -EBUSY;
}
chip->irq = pci->irq;
card->sync_irq = chip->irq;
card->private_free = snd_aw2_free;
dev_info(card->dev,
"Audiowerk 2 sound card (saa7146 chipset) detected and managed\n");
return 0;
}
/* constructor */
static int snd_aw2_probe(struct pci_dev *pci,
const struct pci_device_id *pci_id)
{
static int dev;
struct snd_card *card;
struct aw2 *chip;
int err;
/* (1) Continue if device is not enabled, else inc dev */
if (dev >= SNDRV_CARDS)
return -ENODEV;
if (!enable[dev]) {
dev++;
return -ENOENT;
}
/* (2) Create card instance */
err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
sizeof(*chip), &card);
if (err < 0)
return err;
chip = card->private_data;
/* (3) Create main component */
err = snd_aw2_create(card, pci);
if (err < 0)
goto error;
/* initialize mutex */
mutex_init(&chip->mtx);
/* init spinlock */
spin_lock_init(&chip->reg_lock);
/* (4) Define driver ID and name string */
strcpy(card->driver, "aw2");
strcpy(card->shortname, "Audiowerk2");
sprintf(card->longname, "%s with SAA7146 irq %i",
card->shortname, chip->irq);
/* (5) Create other components */
snd_aw2_new_pcm(chip);
/* (6) Register card instance */
err = snd_card_register(card);
if (err < 0)
goto error;
/* (7) Set PCI driver data */
pci_set_drvdata(pci, card);
dev++;
return 0;
error:
snd_card_free(card);
return err;
}
/* open callback */
static int snd_aw2_pcm_playback_open(struct snd_pcm_substream *substream)
{
struct snd_pcm_runtime *runtime = substream->runtime;
dev_dbg(substream->pcm->card->dev, "Playback_open\n");
runtime->hw = snd_aw2_playback_hw;
return 0;
}
/* close callback */
static int snd_aw2_pcm_playback_close(struct snd_pcm_substream *substream)
{
return 0;
}
static int snd_aw2_pcm_capture_open(struct snd_pcm_substream *substream)
{
struct snd_pcm_runtime *runtime = substream->runtime;
dev_dbg(substream->pcm->card->dev, "Capture_open\n");
runtime->hw = snd_aw2_capture_hw;
return 0;
}
/* close callback */
static int snd_aw2_pcm_capture_close(struct snd_pcm_substream *substream)
{
/* TODO: something to do ? */
return 0;
}
/* prepare callback for playback */
static int snd_aw2_pcm_prepare_playback(struct snd_pcm_substream *substream)
{
struct aw2_pcm_device *pcm_device = snd_pcm_substream_chip(substream);
struct aw2 *chip = pcm_device->chip;
struct snd_pcm_runtime *runtime = substream->runtime;
unsigned long period_size, buffer_size;
mutex_lock(&chip->mtx);
period_size = snd_pcm_lib_period_bytes(substream);
buffer_size = snd_pcm_lib_buffer_bytes(substream);
snd_aw2_saa7146_pcm_init_playback(&chip->saa7146,
pcm_device->stream_number,
runtime->dma_addr, period_size,
buffer_size);
/* Define Interrupt callback */
snd_aw2_saa7146_define_it_playback_callback(pcm_device->stream_number,
(snd_aw2_saa7146_it_cb)
snd_pcm_period_elapsed,
(void *)substream);
mutex_unlock(&chip->mtx);
return 0;
}
/* prepare callback for capture */
static int snd_aw2_pcm_prepare_capture(struct snd_pcm_substream *substream)
{
struct aw2_pcm_device *pcm_device = snd_pcm_substream_chip(substream);
struct aw2 *chip = pcm_device->chip;
struct snd_pcm_runtime *runtime = substream->runtime;
unsigned long period_size, buffer_size;
mutex_lock(&chip->mtx);
period_size = snd_pcm_lib_period_bytes(substream);
buffer_size = snd_pcm_lib_buffer_bytes(substream);
snd_aw2_saa7146_pcm_init_capture(&chip->saa7146,
pcm_device->stream_number,
runtime->dma_addr, period_size,
buffer_size);
/* Define Interrupt callback */
snd_aw2_saa7146_define_it_capture_callback(pcm_device->stream_number,
(snd_aw2_saa7146_it_cb)
snd_pcm_period_elapsed,
(void *)substream);
mutex_unlock(&chip->mtx);
return 0;
}
/* playback trigger callback */
static int snd_aw2_pcm_trigger_playback(struct snd_pcm_substream *substream,
int cmd)
{
int status = 0;
struct aw2_pcm_device *pcm_device = snd_pcm_substream_chip(substream);
struct aw2 *chip = pcm_device->chip;
spin_lock(&chip->reg_lock);
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
snd_aw2_saa7146_pcm_trigger_start_playback(&chip->saa7146,
pcm_device->
stream_number);
break;
case SNDRV_PCM_TRIGGER_STOP:
snd_aw2_saa7146_pcm_trigger_stop_playback(&chip->saa7146,
pcm_device->
stream_number);
break;
default:
status = -EINVAL;
}
spin_unlock(&chip->reg_lock);
return status;
}
/* capture trigger callback */
static int snd_aw2_pcm_trigger_capture(struct snd_pcm_substream *substream,
int cmd)
{
int status = 0;
struct aw2_pcm_device *pcm_device = snd_pcm_substream_chip(substream);
struct aw2 *chip = pcm_device->chip;
spin_lock(&chip->reg_lock);
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
snd_aw2_saa7146_pcm_trigger_start_capture(&chip->saa7146,
pcm_device->
stream_number);
break;
case SNDRV_PCM_TRIGGER_STOP:
snd_aw2_saa7146_pcm_trigger_stop_capture(&chip->saa7146,
pcm_device->
stream_number);
break;
default:
status = -EINVAL;
}
spin_unlock(&chip->reg_lock);
return status;
}
/* playback pointer callback */
static snd_pcm_uframes_t snd_aw2_pcm_pointer_playback(struct snd_pcm_substream
*substream)
{
struct aw2_pcm_device *pcm_device = snd_pcm_substream_chip(substream);
struct aw2 *chip = pcm_device->chip;
unsigned int current_ptr;
/* get the current hardware pointer */
struct snd_pcm_runtime *runtime = substream->runtime;
current_ptr =
snd_aw2_saa7146_get_hw_ptr_playback(&chip->saa7146,
pcm_device->stream_number,
runtime->dma_area,
runtime->buffer_size);
return bytes_to_frames(substream->runtime, current_ptr);
}
/* capture pointer callback */
static snd_pcm_uframes_t snd_aw2_pcm_pointer_capture(struct snd_pcm_substream
*substream)
{
struct aw2_pcm_device *pcm_device = snd_pcm_substream_chip(substream);
struct aw2 *chip = pcm_device->chip;
unsigned int current_ptr;
/* get the current hardware pointer */
struct snd_pcm_runtime *runtime = substream->runtime;
current_ptr =
snd_aw2_saa7146_get_hw_ptr_capture(&chip->saa7146,
pcm_device->stream_number,
runtime->dma_area,
runtime->buffer_size);
return bytes_to_frames(substream->runtime, current_ptr);
}
/* create a pcm device */
static int snd_aw2_new_pcm(struct aw2 *chip)
{
struct snd_pcm *pcm_playback_ana;
struct snd_pcm *pcm_playback_num;
struct snd_pcm *pcm_capture;
struct aw2_pcm_device *pcm_device;
int err = 0;
/* Create new Alsa PCM device */
err = snd_pcm_new(chip->card, "Audiowerk2 analog playback", 0, 1, 0,
&pcm_playback_ana);
if (err < 0) {
dev_err(chip->card->dev, "snd_pcm_new error (0x%X)\n", err);
return err;
}
/* Creation ok */
pcm_device = &chip->device_playback[NUM_STREAM_PLAYBACK_ANA];
/* Set PCM device name */
strcpy(pcm_playback_ana->name, "Analog playback");
/* Associate private data to PCM device */
pcm_playback_ana->private_data = pcm_device;
/* set operators of PCM device */
snd_pcm_set_ops(pcm_playback_ana, SNDRV_PCM_STREAM_PLAYBACK,
&snd_aw2_playback_ops);
/* store PCM device */
pcm_device->pcm = pcm_playback_ana;
/* give base chip pointer to our internal pcm device
structure */
pcm_device->chip = chip;
/* Give stream number to PCM device */
pcm_device->stream_number = NUM_STREAM_PLAYBACK_ANA;
/* pre-allocation of buffers */
/* Preallocate continuous pages. */
snd_pcm_set_managed_buffer_all(pcm_playback_ana,
SNDRV_DMA_TYPE_DEV,
&chip->pci->dev,
64 * 1024, 64 * 1024);
err = snd_pcm_new(chip->card, "Audiowerk2 digital playback", 1, 1, 0,
&pcm_playback_num);
if (err < 0) {
dev_err(chip->card->dev, "snd_pcm_new error (0x%X)\n", err);
return err;
}
/* Creation ok */
pcm_device = &chip->device_playback[NUM_STREAM_PLAYBACK_DIG];
/* Set PCM device name */
strcpy(pcm_playback_num->name, "Digital playback");
/* Associate private data to PCM device */
pcm_playback_num->private_data = pcm_device;
/* set operators of PCM device */
snd_pcm_set_ops(pcm_playback_num, SNDRV_PCM_STREAM_PLAYBACK,
&snd_aw2_playback_ops);
/* store PCM device */
pcm_device->pcm = pcm_playback_num;
/* give base chip pointer to our internal pcm device
structure */
pcm_device->chip = chip;
/* Give stream number to PCM device */
pcm_device->stream_number = NUM_STREAM_PLAYBACK_DIG;
/* pre-allocation of buffers */
/* Preallocate continuous pages. */
snd_pcm_set_managed_buffer_all(pcm_playback_num,
SNDRV_DMA_TYPE_DEV,
&chip->pci->dev,
64 * 1024, 64 * 1024);
err = snd_pcm_new(chip->card, "Audiowerk2 capture", 2, 0, 1,
&pcm_capture);
if (err < 0) {
dev_err(chip->card->dev, "snd_pcm_new error (0x%X)\n", err);
return err;
}
/* Creation ok */
pcm_device = &chip->device_capture[NUM_STREAM_CAPTURE_ANA];
/* Set PCM device name */
strcpy(pcm_capture->name, "Capture");
/* Associate private data to PCM device */
pcm_capture->private_data = pcm_device;
/* set operators of PCM device */
snd_pcm_set_ops(pcm_capture, SNDRV_PCM_STREAM_CAPTURE,
&snd_aw2_capture_ops);
/* store PCM device */
pcm_device->pcm = pcm_capture;
/* give base chip pointer to our internal pcm device
structure */
pcm_device->chip = chip;
/* Give stream number to PCM device */
pcm_device->stream_number = NUM_STREAM_CAPTURE_ANA;
/* pre-allocation of buffers */
/* Preallocate continuous pages. */
snd_pcm_set_managed_buffer_all(pcm_capture,
SNDRV_DMA_TYPE_DEV,
&chip->pci->dev,
64 * 1024, 64 * 1024);
/* Create control */
err = snd_ctl_add(chip->card, snd_ctl_new1(&aw2_control, chip));
if (err < 0) {
dev_err(chip->card->dev, "snd_ctl_add error (0x%X)\n", err);
return err;
}
return 0;
}
static int snd_aw2_control_switch_capture_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
static const char * const texts[2] = {
"Analog", "Digital"
};
return snd_ctl_enum_info(uinfo, 1, 2, texts);
}
static int snd_aw2_control_switch_capture_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value
*ucontrol)
{
struct aw2 *chip = snd_kcontrol_chip(kcontrol);
if (snd_aw2_saa7146_is_using_digital_input(&chip->saa7146))
ucontrol->value.enumerated.item[0] = CTL_ROUTE_DIGITAL;
else
ucontrol->value.enumerated.item[0] = CTL_ROUTE_ANALOG;
return 0;
}
static int snd_aw2_control_switch_capture_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value
*ucontrol)
{
struct aw2 *chip = snd_kcontrol_chip(kcontrol);
int changed = 0;
int is_disgital =
snd_aw2_saa7146_is_using_digital_input(&chip->saa7146);
if (((ucontrol->value.integer.value[0] == CTL_ROUTE_DIGITAL)
&& !is_disgital)
|| ((ucontrol->value.integer.value[0] == CTL_ROUTE_ANALOG)
&& is_disgital)) {
snd_aw2_saa7146_use_digital_input(&chip->saa7146, !is_disgital);
changed = 1;
}
return changed;
}
| linux-master | sound/pci/aw2/aw2-alsa.c |
// SPDX-License-Identifier: GPL-2.0-only
/*****************************************************************************
*
* Copyright (C) 2008 Cedric Bregardis <[email protected]> and
* Jean-Christian Hassler <[email protected]>
*
* This file is part of the Audiowerk2 ALSA driver
*
*****************************************************************************/
#define AW2_SAA7146_M
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/io.h>
#include <sound/core.h>
#include <sound/initval.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include "saa7146.h"
#include "aw2-saa7146.h"
#include "aw2-tsl.c"
#define WRITEREG(value, addr) writel((value), chip->base_addr + (addr))
#define READREG(addr) readl(chip->base_addr + (addr))
static struct snd_aw2_saa7146_cb_param
arr_substream_it_playback_cb[NB_STREAM_PLAYBACK];
static struct snd_aw2_saa7146_cb_param
arr_substream_it_capture_cb[NB_STREAM_CAPTURE];
static int snd_aw2_saa7146_get_limit(int size);
/* chip-specific destructor */
int snd_aw2_saa7146_free(struct snd_aw2_saa7146 *chip)
{
/* disable all irqs */
WRITEREG(0, IER);
/* reset saa7146 */
WRITEREG((MRST_N << 16), MC1);
/* Unset base addr */
chip->base_addr = NULL;
return 0;
}
void snd_aw2_saa7146_setup(struct snd_aw2_saa7146 *chip,
void __iomem *pci_base_addr)
{
/* set PCI burst/threshold
Burst length definition
VALUE BURST LENGTH
000 1 Dword
001 2 Dwords
010 4 Dwords
011 8 Dwords
100 16 Dwords
101 32 Dwords
110 64 Dwords
111 128 Dwords
Threshold definition
VALUE WRITE MODE READ MODE
00 1 Dword of valid data 1 empty Dword
01 4 Dwords of valid data 4 empty Dwords
10 8 Dwords of valid data 8 empty Dwords
11 16 Dwords of valid data 16 empty Dwords */
unsigned int acon2;
unsigned int acon1 = 0;
int i;
/* Set base addr */
chip->base_addr = pci_base_addr;
/* disable all irqs */
WRITEREG(0, IER);
/* reset saa7146 */
WRITEREG((MRST_N << 16), MC1);
/* enable audio interface */
#ifdef __BIG_ENDIAN
acon1 |= A1_SWAP;
acon1 |= A2_SWAP;
#endif
/* WS0_CTRL, WS0_SYNC: input TSL1, I2S */
/* At initialization WS1 and WS2 are disabled (configured as input) */
acon1 |= 0 * WS1_CTRL;
acon1 |= 0 * WS2_CTRL;
/* WS4 is not used. So it must not restart A2.
This is why it is configured as output (force to low) */
acon1 |= 3 * WS4_CTRL;
/* WS3_CTRL, WS3_SYNC: output TSL2, I2S */
acon1 |= 2 * WS3_CTRL;
/* A1 and A2 are active and asynchronous */
acon1 |= 3 * AUDIO_MODE;
WRITEREG(acon1, ACON1);
/* The following comes from original windows driver.
It is needed to have a correct behavior of input and output
simultenously, but I don't know why ! */
WRITEREG(3 * (BurstA1_in) + 3 * (ThreshA1_in) +
3 * (BurstA1_out) + 3 * (ThreshA1_out) +
3 * (BurstA2_out) + 3 * (ThreshA2_out), PCI_BT_A);
/* enable audio port pins */
WRITEREG((EAP << 16) | EAP, MC1);
/* enable I2C */
WRITEREG((EI2C << 16) | EI2C, MC1);
/* enable interrupts */
WRITEREG(A1_out | A2_out | A1_in | IIC_S | IIC_E, IER);
/* audio configuration */
acon2 = A2_CLKSRC | BCLK1_OEN;
WRITEREG(acon2, ACON2);
/* By default use analog input */
snd_aw2_saa7146_use_digital_input(chip, 0);
/* TSL setup */
for (i = 0; i < 8; ++i) {
WRITEREG(tsl1[i], TSL1 + (i * 4));
WRITEREG(tsl2[i], TSL2 + (i * 4));
}
}
void snd_aw2_saa7146_pcm_init_playback(struct snd_aw2_saa7146 *chip,
int stream_number,
unsigned long dma_addr,
unsigned long period_size,
unsigned long buffer_size)
{
unsigned long dw_page, dw_limit;
/* Configure DMA for substream
Configuration informations: ALSA has allocated continuous memory
pages. So we don't need to use MMU of saa7146.
*/
/* No MMU -> nothing to do with PageA1, we only configure the limit of
PageAx_out register */
/* Disable MMU */
dw_page = (0L << 11);
/* Configure Limit for DMA access.
The limit register defines an address limit, which generates
an interrupt if passed by the actual PCI address pointer.
'0001' means an interrupt will be generated if the lower
6 bits (64 bytes) of the PCI address are zero. '0010'
defines a limit of 128 bytes, '0011' one of 256 bytes, and
so on up to 1 Mbyte defined by '1111'. This interrupt range
can be calculated as follows:
Range = 2^(5 + Limit) bytes.
*/
dw_limit = snd_aw2_saa7146_get_limit(period_size);
dw_page |= (dw_limit << 4);
if (stream_number == 0) {
WRITEREG(dw_page, PageA2_out);
/* Base address for DMA transfert. */
/* This address has been reserved by ALSA. */
/* This is a physical address */
WRITEREG(dma_addr, BaseA2_out);
/* Define upper limit for DMA access */
WRITEREG(dma_addr + buffer_size, ProtA2_out);
} else if (stream_number == 1) {
WRITEREG(dw_page, PageA1_out);
/* Base address for DMA transfert. */
/* This address has been reserved by ALSA. */
/* This is a physical address */
WRITEREG(dma_addr, BaseA1_out);
/* Define upper limit for DMA access */
WRITEREG(dma_addr + buffer_size, ProtA1_out);
} else {
pr_err("aw2: snd_aw2_saa7146_pcm_init_playback: "
"Substream number is not 0 or 1 -> not managed\n");
}
}
void snd_aw2_saa7146_pcm_init_capture(struct snd_aw2_saa7146 *chip,
int stream_number, unsigned long dma_addr,
unsigned long period_size,
unsigned long buffer_size)
{
unsigned long dw_page, dw_limit;
/* Configure DMA for substream
Configuration informations: ALSA has allocated continuous memory
pages. So we don't need to use MMU of saa7146.
*/
/* No MMU -> nothing to do with PageA1, we only configure the limit of
PageAx_out register */
/* Disable MMU */
dw_page = (0L << 11);
/* Configure Limit for DMA access.
The limit register defines an address limit, which generates
an interrupt if passed by the actual PCI address pointer.
'0001' means an interrupt will be generated if the lower
6 bits (64 bytes) of the PCI address are zero. '0010'
defines a limit of 128 bytes, '0011' one of 256 bytes, and
so on up to 1 Mbyte defined by '1111'. This interrupt range
can be calculated as follows:
Range = 2^(5 + Limit) bytes.
*/
dw_limit = snd_aw2_saa7146_get_limit(period_size);
dw_page |= (dw_limit << 4);
if (stream_number == 0) {
WRITEREG(dw_page, PageA1_in);
/* Base address for DMA transfert. */
/* This address has been reserved by ALSA. */
/* This is a physical address */
WRITEREG(dma_addr, BaseA1_in);
/* Define upper limit for DMA access */
WRITEREG(dma_addr + buffer_size, ProtA1_in);
} else {
pr_err("aw2: snd_aw2_saa7146_pcm_init_capture: "
"Substream number is not 0 -> not managed\n");
}
}
void snd_aw2_saa7146_define_it_playback_callback(unsigned int stream_number,
snd_aw2_saa7146_it_cb
p_it_callback,
void *p_callback_param)
{
if (stream_number < NB_STREAM_PLAYBACK) {
arr_substream_it_playback_cb[stream_number].p_it_callback =
(snd_aw2_saa7146_it_cb) p_it_callback;
arr_substream_it_playback_cb[stream_number].p_callback_param =
(void *)p_callback_param;
}
}
void snd_aw2_saa7146_define_it_capture_callback(unsigned int stream_number,
snd_aw2_saa7146_it_cb
p_it_callback,
void *p_callback_param)
{
if (stream_number < NB_STREAM_CAPTURE) {
arr_substream_it_capture_cb[stream_number].p_it_callback =
(snd_aw2_saa7146_it_cb) p_it_callback;
arr_substream_it_capture_cb[stream_number].p_callback_param =
(void *)p_callback_param;
}
}
void snd_aw2_saa7146_pcm_trigger_start_playback(struct snd_aw2_saa7146 *chip,
int stream_number)
{
unsigned int acon1 = 0;
/* In aw8 driver, dma transfert is always active. It is
started and stopped in a larger "space" */
acon1 = READREG(ACON1);
if (stream_number == 0) {
WRITEREG((TR_E_A2_OUT << 16) | TR_E_A2_OUT, MC1);
/* WS2_CTRL, WS2_SYNC: output TSL2, I2S */
acon1 |= 2 * WS2_CTRL;
WRITEREG(acon1, ACON1);
} else if (stream_number == 1) {
WRITEREG((TR_E_A1_OUT << 16) | TR_E_A1_OUT, MC1);
/* WS1_CTRL, WS1_SYNC: output TSL1, I2S */
acon1 |= 1 * WS1_CTRL;
WRITEREG(acon1, ACON1);
}
}
void snd_aw2_saa7146_pcm_trigger_stop_playback(struct snd_aw2_saa7146 *chip,
int stream_number)
{
unsigned int acon1 = 0;
acon1 = READREG(ACON1);
if (stream_number == 0) {
/* WS2_CTRL, WS2_SYNC: output TSL2, I2S */
acon1 &= ~(3 * WS2_CTRL);
WRITEREG(acon1, ACON1);
WRITEREG((TR_E_A2_OUT << 16), MC1);
} else if (stream_number == 1) {
/* WS1_CTRL, WS1_SYNC: output TSL1, I2S */
acon1 &= ~(3 * WS1_CTRL);
WRITEREG(acon1, ACON1);
WRITEREG((TR_E_A1_OUT << 16), MC1);
}
}
void snd_aw2_saa7146_pcm_trigger_start_capture(struct snd_aw2_saa7146 *chip,
int stream_number)
{
/* In aw8 driver, dma transfert is always active. It is
started and stopped in a larger "space" */
if (stream_number == 0)
WRITEREG((TR_E_A1_IN << 16) | TR_E_A1_IN, MC1);
}
void snd_aw2_saa7146_pcm_trigger_stop_capture(struct snd_aw2_saa7146 *chip,
int stream_number)
{
if (stream_number == 0)
WRITEREG((TR_E_A1_IN << 16), MC1);
}
irqreturn_t snd_aw2_saa7146_interrupt(int irq, void *dev_id)
{
unsigned int isr;
__always_unused unsigned int iicsta;
struct snd_aw2_saa7146 *chip = dev_id;
isr = READREG(ISR);
if (!isr)
return IRQ_NONE;
WRITEREG(isr, ISR);
if (isr & (IIC_S | IIC_E)) {
iicsta = READREG(IICSTA);
WRITEREG(0x100, IICSTA);
}
if (isr & A1_out) {
if (arr_substream_it_playback_cb[1].p_it_callback != NULL) {
arr_substream_it_playback_cb[1].
p_it_callback(arr_substream_it_playback_cb[1].
p_callback_param);
}
}
if (isr & A2_out) {
if (arr_substream_it_playback_cb[0].p_it_callback != NULL) {
arr_substream_it_playback_cb[0].
p_it_callback(arr_substream_it_playback_cb[0].
p_callback_param);
}
}
if (isr & A1_in) {
if (arr_substream_it_capture_cb[0].p_it_callback != NULL) {
arr_substream_it_capture_cb[0].
p_it_callback(arr_substream_it_capture_cb[0].
p_callback_param);
}
}
return IRQ_HANDLED;
}
unsigned int snd_aw2_saa7146_get_hw_ptr_playback(struct snd_aw2_saa7146 *chip,
int stream_number,
unsigned char *start_addr,
unsigned int buffer_size)
{
long pci_adp = 0;
size_t ptr = 0;
if (stream_number == 0) {
pci_adp = READREG(PCI_ADP3);
ptr = pci_adp - (long)start_addr;
if (ptr == buffer_size)
ptr = 0;
}
if (stream_number == 1) {
pci_adp = READREG(PCI_ADP1);
ptr = pci_adp - (size_t) start_addr;
if (ptr == buffer_size)
ptr = 0;
}
return ptr;
}
unsigned int snd_aw2_saa7146_get_hw_ptr_capture(struct snd_aw2_saa7146 *chip,
int stream_number,
unsigned char *start_addr,
unsigned int buffer_size)
{
size_t pci_adp = 0;
size_t ptr = 0;
if (stream_number == 0) {
pci_adp = READREG(PCI_ADP2);
ptr = pci_adp - (size_t) start_addr;
if (ptr == buffer_size)
ptr = 0;
}
return ptr;
}
void snd_aw2_saa7146_use_digital_input(struct snd_aw2_saa7146 *chip,
int use_digital)
{
/* FIXME: switch between analog and digital input does not always work.
It can produce a kind of white noise. It seams that received data
are inverted sometime (endian inversion). Why ? I don't know, maybe
a problem of synchronization... However for the time being I have
not found the problem. Workaround: switch again (and again) between
digital and analog input until it works. */
if (use_digital)
WRITEREG(0x40, GPIO_CTRL);
else
WRITEREG(0x50, GPIO_CTRL);
}
int snd_aw2_saa7146_is_using_digital_input(struct snd_aw2_saa7146 *chip)
{
unsigned int reg_val = READREG(GPIO_CTRL);
if ((reg_val & 0xFF) == 0x40)
return 1;
else
return 0;
}
static int snd_aw2_saa7146_get_limit(int size)
{
int limitsize = 32;
int limit = 0;
while (limitsize < size) {
limitsize *= 2;
limit++;
}
return limit;
}
| linux-master | sound/pci/aw2/aw2-saa7146.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* The driver for the EMU10K1 (SB Live!) based soundcards
* Copyright (c) by Jaroslav Kysela <[email protected]>
* James Courtier-Dutton <[email protected]>
*/
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/time.h>
#include <linux/module.h>
#include <sound/core.h>
#include <sound/emu10k1.h>
#include <sound/initval.h>
MODULE_AUTHOR("Jaroslav Kysela <[email protected]>");
MODULE_DESCRIPTION("EMU10K1");
MODULE_LICENSE("GPL");
#if IS_ENABLED(CONFIG_SND_SEQUENCER)
#define ENABLE_SYNTH
#include <sound/emu10k1_synth.h>
#endif
static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
static int extin[SNDRV_CARDS];
static int extout[SNDRV_CARDS];
static int seq_ports[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 4};
static int max_synth_voices[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 64};
static int max_buffer_size[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 128};
static bool enable_ir[SNDRV_CARDS];
static uint subsystem[SNDRV_CARDS]; /* Force card subsystem model */
module_param_array(index, int, NULL, 0444);
MODULE_PARM_DESC(index, "Index value for the EMU10K1 soundcard.");
module_param_array(id, charp, NULL, 0444);
MODULE_PARM_DESC(id, "ID string for the EMU10K1 soundcard.");
module_param_array(enable, bool, NULL, 0444);
MODULE_PARM_DESC(enable, "Enable the EMU10K1 soundcard.");
module_param_array(extin, int, NULL, 0444);
MODULE_PARM_DESC(extin, "Available external inputs for FX8010. Zero=default.");
module_param_array(extout, int, NULL, 0444);
MODULE_PARM_DESC(extout, "Available external outputs for FX8010. Zero=default.");
module_param_array(seq_ports, int, NULL, 0444);
MODULE_PARM_DESC(seq_ports, "Allocated sequencer ports for internal synthesizer.");
module_param_array(max_synth_voices, int, NULL, 0444);
MODULE_PARM_DESC(max_synth_voices, "Maximum number of voices for WaveTable.");
module_param_array(max_buffer_size, int, NULL, 0444);
MODULE_PARM_DESC(max_buffer_size, "Maximum sample buffer size in MB.");
module_param_array(enable_ir, bool, NULL, 0444);
MODULE_PARM_DESC(enable_ir, "Enable IR.");
module_param_array(subsystem, uint, NULL, 0444);
MODULE_PARM_DESC(subsystem, "Force card subsystem model.");
/*
* Class 0401: 1102:0008 (rev 00) Subsystem: 1102:1001 -> Audigy2 Value Model:SB0400
*/
static const struct pci_device_id snd_emu10k1_ids[] = {
{ PCI_VDEVICE(CREATIVE, 0x0002), 0 }, /* EMU10K1 */
{ PCI_VDEVICE(CREATIVE, 0x0004), 1 }, /* Audigy */
{ PCI_VDEVICE(CREATIVE, 0x0008), 1 }, /* Audigy 2 Value SB0400 */
{ 0, }
};
MODULE_DEVICE_TABLE(pci, snd_emu10k1_ids);
static int snd_card_emu10k1_probe(struct pci_dev *pci,
const struct pci_device_id *pci_id)
{
static int dev;
struct snd_card *card;
struct snd_emu10k1 *emu;
#ifdef ENABLE_SYNTH
struct snd_seq_device *wave = NULL;
#endif
int err;
if (dev >= SNDRV_CARDS)
return -ENODEV;
if (!enable[dev]) {
dev++;
return -ENOENT;
}
err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
sizeof(*emu), &card);
if (err < 0)
return err;
emu = card->private_data;
if (max_buffer_size[dev] < 32)
max_buffer_size[dev] = 32;
else if (max_buffer_size[dev] > 1024)
max_buffer_size[dev] = 1024;
err = snd_emu10k1_create(card, pci, extin[dev], extout[dev],
(long)max_buffer_size[dev] * 1024 * 1024,
enable_ir[dev], subsystem[dev]);
if (err < 0)
return err;
err = snd_emu10k1_pcm(emu, 0);
if (err < 0)
return err;
if (emu->card_capabilities->ac97_chip) {
err = snd_emu10k1_pcm_mic(emu, 1);
if (err < 0)
return err;
}
err = snd_emu10k1_pcm_efx(emu, 2);
if (err < 0)
return err;
/* This stores the periods table. */
if (emu->card_capabilities->ca0151_chip) { /* P16V */
emu->p16v_buffer =
snd_devm_alloc_pages(&pci->dev, SNDRV_DMA_TYPE_DEV, 1024);
if (!emu->p16v_buffer)
return -ENOMEM;
}
err = snd_emu10k1_mixer(emu, 0, 3);
if (err < 0)
return err;
err = snd_emu10k1_timer(emu, 0);
if (err < 0)
return err;
err = snd_emu10k1_pcm_multi(emu, 3);
if (err < 0)
return err;
if (emu->card_capabilities->ca0151_chip) { /* P16V */
err = snd_p16v_pcm(emu, 4);
if (err < 0)
return err;
}
if (emu->audigy) {
err = snd_emu10k1_audigy_midi(emu);
if (err < 0)
return err;
} else {
err = snd_emu10k1_midi(emu);
if (err < 0)
return err;
}
err = snd_emu10k1_fx8010_new(emu, 0);
if (err < 0)
return err;
#ifdef ENABLE_SYNTH
if (snd_seq_device_new(card, 1, SNDRV_SEQ_DEV_ID_EMU10K1_SYNTH,
sizeof(struct snd_emu10k1_synth_arg), &wave) < 0 ||
wave == NULL) {
dev_warn(emu->card->dev,
"can't initialize Emu10k1 wavetable synth\n");
} else {
struct snd_emu10k1_synth_arg *arg;
arg = SNDRV_SEQ_DEVICE_ARGPTR(wave);
strcpy(wave->name, "Emu-10k1 Synth");
arg->hwptr = emu;
arg->index = 1;
arg->seq_ports = seq_ports[dev];
arg->max_voices = max_synth_voices[dev];
}
#endif
strscpy(card->driver, emu->card_capabilities->driver,
sizeof(card->driver));
strscpy(card->shortname, emu->card_capabilities->name,
sizeof(card->shortname));
snprintf(card->longname, sizeof(card->longname),
"%s (rev.%d, serial:0x%x) at 0x%lx, irq %i",
card->shortname, emu->revision, emu->serial, emu->port, emu->irq);
err = snd_card_register(card);
if (err < 0)
return err;
pci_set_drvdata(pci, card);
dev++;
return 0;
}
#ifdef CONFIG_PM_SLEEP
static int snd_emu10k1_suspend(struct device *dev)
{
struct snd_card *card = dev_get_drvdata(dev);
struct snd_emu10k1 *emu = card->private_data;
snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
emu->suspend = 1;
cancel_work_sync(&emu->emu1010.firmware_work);
cancel_work_sync(&emu->emu1010.clock_work);
snd_ac97_suspend(emu->ac97);
snd_emu10k1_efx_suspend(emu);
snd_emu10k1_suspend_regs(emu);
if (emu->card_capabilities->ca0151_chip)
snd_p16v_suspend(emu);
snd_emu10k1_done(emu);
return 0;
}
static int snd_emu10k1_resume(struct device *dev)
{
struct snd_card *card = dev_get_drvdata(dev);
struct snd_emu10k1 *emu = card->private_data;
snd_emu10k1_resume_init(emu);
snd_emu10k1_efx_resume(emu);
snd_ac97_resume(emu->ac97);
snd_emu10k1_resume_regs(emu);
if (emu->card_capabilities->ca0151_chip)
snd_p16v_resume(emu);
emu->suspend = 0;
snd_power_change_state(card, SNDRV_CTL_POWER_D0);
return 0;
}
static SIMPLE_DEV_PM_OPS(snd_emu10k1_pm, snd_emu10k1_suspend, snd_emu10k1_resume);
#define SND_EMU10K1_PM_OPS &snd_emu10k1_pm
#else
#define SND_EMU10K1_PM_OPS NULL
#endif /* CONFIG_PM_SLEEP */
static struct pci_driver emu10k1_driver = {
.name = KBUILD_MODNAME,
.id_table = snd_emu10k1_ids,
.probe = snd_card_emu10k1_probe,
.driver = {
.pm = SND_EMU10K1_PM_OPS,
},
};
module_pci_driver(emu10k1_driver);
| linux-master | sound/pci/emu10k1/emu10k1.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (c) by Lee Revell <[email protected]>
* Clemens Ladisch <[email protected]>
* Oswald Buddenhagen <[email protected]>
*
* Routines for control of EMU10K1 chips
*/
#include <linux/time.h>
#include <sound/core.h>
#include <sound/emu10k1.h>
static int snd_emu10k1_timer_start(struct snd_timer *timer)
{
struct snd_emu10k1 *emu;
unsigned int delay;
emu = snd_timer_chip(timer);
delay = timer->sticks - 1;
if (delay < 5 ) /* minimum time is 5 ticks */
delay = 5;
snd_emu10k1_intr_enable(emu, INTE_INTERVALTIMERENB);
outw(delay & TIMER_RATE_MASK, emu->port + TIMER);
return 0;
}
static int snd_emu10k1_timer_stop(struct snd_timer *timer)
{
struct snd_emu10k1 *emu;
emu = snd_timer_chip(timer);
snd_emu10k1_intr_disable(emu, INTE_INTERVALTIMERENB);
return 0;
}
static unsigned long snd_emu10k1_timer_c_resolution(struct snd_timer *timer)
{
struct snd_emu10k1 *emu = snd_timer_chip(timer);
if (emu->card_capabilities->emu_model &&
emu->emu1010.word_clock == 44100)
return 22676; // 1 sample @ 44.1 kHz = 22.675736...us
else
return 20833; // 1 sample @ 48 kHz = 20.833...us
}
static int snd_emu10k1_timer_precise_resolution(struct snd_timer *timer,
unsigned long *num, unsigned long *den)
{
struct snd_emu10k1 *emu = snd_timer_chip(timer);
*num = 1;
if (emu->card_capabilities->emu_model)
*den = emu->emu1010.word_clock;
else
*den = 48000;
return 0;
}
static const struct snd_timer_hardware snd_emu10k1_timer_hw = {
.flags = SNDRV_TIMER_HW_AUTO,
.ticks = 1024,
.start = snd_emu10k1_timer_start,
.stop = snd_emu10k1_timer_stop,
.c_resolution = snd_emu10k1_timer_c_resolution,
.precise_resolution = snd_emu10k1_timer_precise_resolution,
};
int snd_emu10k1_timer(struct snd_emu10k1 *emu, int device)
{
struct snd_timer *timer = NULL;
struct snd_timer_id tid;
int err;
tid.dev_class = SNDRV_TIMER_CLASS_CARD;
tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
tid.card = emu->card->number;
tid.device = device;
tid.subdevice = 0;
err = snd_timer_new(emu->card, "EMU10K1", &tid, &timer);
if (err >= 0) {
strcpy(timer->name, "EMU10K1 timer");
timer->private_data = emu;
timer->hw = snd_emu10k1_timer_hw;
}
emu->timer = timer;
return err;
}
| linux-master | sound/pci/emu10k1/timer.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* synth callback routines for Emu10k1
*
* Copyright (C) 2000 Takashi Iwai <[email protected]>
*/
#include <linux/export.h>
#include "emu10k1_synth_local.h"
#include <sound/asoundef.h>
/* voice status */
enum {
V_FREE=0, V_OFF, V_RELEASED, V_PLAYING, V_END
};
/* Keeps track of what we are finding */
struct best_voice {
unsigned int time;
int voice;
};
/*
* prototypes
*/
static void lookup_voices(struct snd_emux *emux, struct snd_emu10k1 *hw,
struct best_voice *best, int active_only);
static struct snd_emux_voice *get_voice(struct snd_emux *emux,
struct snd_emux_port *port);
static int start_voice(struct snd_emux_voice *vp);
static void trigger_voice(struct snd_emux_voice *vp);
static void release_voice(struct snd_emux_voice *vp);
static void update_voice(struct snd_emux_voice *vp, int update);
static void terminate_voice(struct snd_emux_voice *vp);
static void free_voice(struct snd_emux_voice *vp);
static u32 make_fmmod(struct snd_emux_voice *vp);
static u32 make_fm2frq2(struct snd_emux_voice *vp);
static int get_pitch_shift(struct snd_emux *emu);
/*
* Ensure a value is between two points
* macro evaluates its args more than once, so changed to upper-case.
*/
#define LIMITVALUE(x, a, b) do { if ((x) < (a)) (x) = (a); else if ((x) > (b)) (x) = (b); } while (0)
#define LIMITMAX(x, a) do {if ((x) > (a)) (x) = (a); } while (0)
/*
* set up operators
*/
static const struct snd_emux_operators emu10k1_ops = {
.owner = THIS_MODULE,
.get_voice = get_voice,
.prepare = start_voice,
.trigger = trigger_voice,
.release = release_voice,
.update = update_voice,
.terminate = terminate_voice,
.free_voice = free_voice,
.sample_new = snd_emu10k1_sample_new,
.sample_free = snd_emu10k1_sample_free,
.get_pitch_shift = get_pitch_shift,
};
void
snd_emu10k1_ops_setup(struct snd_emux *emux)
{
emux->ops = emu10k1_ops;
}
/*
* get more voice for pcm
*
* terminate most inactive voice and give it as a pcm voice.
*
* voice_lock is already held.
*/
int
snd_emu10k1_synth_get_voice(struct snd_emu10k1 *hw)
{
struct snd_emux *emu;
struct snd_emux_voice *vp;
struct best_voice best[V_END];
int i;
emu = hw->synth;
lookup_voices(emu, hw, best, 1); /* no OFF voices */
for (i = 0; i < V_END; i++) {
if (best[i].voice >= 0) {
int ch;
vp = &emu->voices[best[i].voice];
ch = vp->ch;
if (ch < 0) {
/*
dev_warn(emu->card->dev,
"synth_get_voice: ch < 0 (%d) ??", i);
*/
continue;
}
vp->emu->num_voices--;
vp->ch = -1;
vp->state = SNDRV_EMUX_ST_OFF;
return ch;
}
}
/* not found */
return -ENOMEM;
}
/*
* turn off the voice (not terminated)
*/
static void
release_voice(struct snd_emux_voice *vp)
{
struct snd_emu10k1 *hw;
hw = vp->hw;
snd_emu10k1_ptr_write_multiple(hw, vp->ch,
DCYSUSM, (unsigned char)vp->reg.parm.modrelease | DCYSUSM_PHASE1_MASK,
DCYSUSV, (unsigned char)vp->reg.parm.volrelease | DCYSUSV_PHASE1_MASK | DCYSUSV_CHANNELENABLE_MASK,
REGLIST_END);
}
/*
* terminate the voice
*/
static void
terminate_voice(struct snd_emux_voice *vp)
{
struct snd_emu10k1 *hw;
if (snd_BUG_ON(!vp))
return;
hw = vp->hw;
snd_emu10k1_ptr_write_multiple(hw, vp->ch,
DCYSUSV, 0,
VTFT, VTFT_FILTERTARGET_MASK,
CVCF, CVCF_CURRENTFILTER_MASK,
PTRX, 0,
CPF, 0,
REGLIST_END);
if (vp->block) {
struct snd_emu10k1_memblk *emem;
emem = (struct snd_emu10k1_memblk *)vp->block;
if (emem->map_locked > 0)
emem->map_locked--;
}
}
/*
* release the voice to system
*/
static void
free_voice(struct snd_emux_voice *vp)
{
struct snd_emu10k1 *hw;
hw = vp->hw;
/* FIXME: emu10k1_synth is broken. */
/* This can get called with hw == 0 */
/* Problem apparent on plug, unplug then plug */
/* on the Audigy 2 ZS Notebook. */
if (hw && (vp->ch >= 0)) {
snd_emu10k1_voice_free(hw, &hw->voices[vp->ch]);
vp->emu->num_voices--;
vp->ch = -1;
}
}
/*
* update registers
*/
static void
update_voice(struct snd_emux_voice *vp, int update)
{
struct snd_emu10k1 *hw;
hw = vp->hw;
if (update & SNDRV_EMUX_UPDATE_VOLUME)
snd_emu10k1_ptr_write(hw, IFATN_ATTENUATION, vp->ch, vp->avol);
if (update & SNDRV_EMUX_UPDATE_PITCH)
snd_emu10k1_ptr_write(hw, IP, vp->ch, vp->apitch);
if (update & SNDRV_EMUX_UPDATE_PAN) {
snd_emu10k1_ptr_write(hw, PTRX_FXSENDAMOUNT_A, vp->ch, vp->apan);
snd_emu10k1_ptr_write(hw, PTRX_FXSENDAMOUNT_B, vp->ch, vp->aaux);
}
if (update & SNDRV_EMUX_UPDATE_FMMOD)
snd_emu10k1_ptr_write(hw, FMMOD, vp->ch, make_fmmod(vp));
if (update & SNDRV_EMUX_UPDATE_TREMFREQ)
snd_emu10k1_ptr_write(hw, TREMFRQ, vp->ch, vp->reg.parm.tremfrq);
if (update & SNDRV_EMUX_UPDATE_FM2FRQ2)
snd_emu10k1_ptr_write(hw, FM2FRQ2, vp->ch, make_fm2frq2(vp));
if (update & SNDRV_EMUX_UPDATE_Q)
snd_emu10k1_ptr_write(hw, CCCA_RESONANCE, vp->ch, vp->reg.parm.filterQ);
}
/*
* look up voice table - get the best voice in order of preference
*/
/* spinlock held! */
static void
lookup_voices(struct snd_emux *emu, struct snd_emu10k1 *hw,
struct best_voice *best, int active_only)
{
struct snd_emux_voice *vp;
struct best_voice *bp;
int i;
for (i = 0; i < V_END; i++) {
best[i].time = (unsigned int)-1; /* XXX MAX_?INT really */
best[i].voice = -1;
}
/*
* Go through them all and get a best one to use.
* NOTE: could also look at volume and pick the quietest one.
*/
for (i = 0; i < emu->max_voices; i++) {
int state, val;
vp = &emu->voices[i];
state = vp->state;
if (state == SNDRV_EMUX_ST_OFF) {
if (vp->ch < 0) {
if (active_only)
continue;
bp = best + V_FREE;
} else
bp = best + V_OFF;
}
else if (state == SNDRV_EMUX_ST_RELEASED ||
state == SNDRV_EMUX_ST_PENDING) {
bp = best + V_RELEASED;
#if 1
val = snd_emu10k1_ptr_read(hw, CVCF_CURRENTVOL, vp->ch);
if (! val)
bp = best + V_OFF;
#endif
}
else if (state == SNDRV_EMUX_ST_STANDBY)
continue;
else if (state & SNDRV_EMUX_ST_ON)
bp = best + V_PLAYING;
else
continue;
/* check if sample is finished playing (non-looping only) */
if (bp != best + V_OFF && bp != best + V_FREE &&
(vp->reg.sample_mode & SNDRV_SFNT_SAMPLE_SINGLESHOT)) {
val = snd_emu10k1_ptr_read(hw, CCCA_CURRADDR, vp->ch) - 64;
if (val >= vp->reg.loopstart)
bp = best + V_OFF;
}
if (vp->time < bp->time) {
bp->time = vp->time;
bp->voice = i;
}
}
}
/*
* get an empty voice
*
* emu->voice_lock is already held.
*/
static struct snd_emux_voice *
get_voice(struct snd_emux *emu, struct snd_emux_port *port)
{
struct snd_emu10k1 *hw;
struct snd_emux_voice *vp;
struct best_voice best[V_END];
int i;
hw = emu->hw;
lookup_voices(emu, hw, best, 0);
for (i = 0; i < V_END; i++) {
if (best[i].voice >= 0) {
vp = &emu->voices[best[i].voice];
if (vp->ch < 0) {
/* allocate a voice */
struct snd_emu10k1_voice *hwvoice;
if (snd_emu10k1_voice_alloc(hw, EMU10K1_SYNTH, 1, 1, NULL, &hwvoice) < 0)
continue;
vp->ch = hwvoice->number;
emu->num_voices++;
}
return vp;
}
}
/* not found */
return NULL;
}
/*
* prepare envelopes and LFOs
*/
static int
start_voice(struct snd_emux_voice *vp)
{
unsigned int temp;
int ch;
u32 psst, dsl, map, ccca, vtarget;
unsigned int addr, mapped_offset;
struct snd_midi_channel *chan;
struct snd_emu10k1 *hw;
struct snd_emu10k1_memblk *emem;
hw = vp->hw;
ch = vp->ch;
if (snd_BUG_ON(ch < 0))
return -EINVAL;
chan = vp->chan;
emem = (struct snd_emu10k1_memblk *)vp->block;
if (emem == NULL)
return -EINVAL;
emem->map_locked++;
if (snd_emu10k1_memblk_map(hw, emem) < 0) {
/* dev_err(hw->card->devK, "emu: cannot map!\n"); */
return -ENOMEM;
}
mapped_offset = snd_emu10k1_memblk_offset(emem) >> 1;
vp->reg.start += mapped_offset;
vp->reg.end += mapped_offset;
vp->reg.loopstart += mapped_offset;
vp->reg.loopend += mapped_offset;
/* set channel routing */
/* A = left(0), B = right(1), C = reverb(c), D = chorus(d) */
if (hw->audigy) {
temp = FXBUS_MIDI_LEFT | (FXBUS_MIDI_RIGHT << 8) |
(FXBUS_MIDI_REVERB << 16) | (FXBUS_MIDI_CHORUS << 24);
snd_emu10k1_ptr_write(hw, A_FXRT1, ch, temp);
} else {
temp = (FXBUS_MIDI_LEFT << 16) | (FXBUS_MIDI_RIGHT << 20) |
(FXBUS_MIDI_REVERB << 24) | (FXBUS_MIDI_CHORUS << 28);
snd_emu10k1_ptr_write(hw, FXRT, ch, temp);
}
temp = vp->reg.parm.reverb;
temp += (int)vp->chan->control[MIDI_CTL_E1_REVERB_DEPTH] * 9 / 10;
LIMITMAX(temp, 255);
addr = vp->reg.loopstart;
psst = (temp << 24) | addr;
addr = vp->reg.loopend;
temp = vp->reg.parm.chorus;
temp += (int)chan->control[MIDI_CTL_E3_CHORUS_DEPTH] * 9 / 10;
LIMITMAX(temp, 255);
dsl = (temp << 24) | addr;
map = (hw->silent_page.addr << hw->address_mode) | (hw->address_mode ? MAP_PTI_MASK1 : MAP_PTI_MASK0);
addr = vp->reg.start + 64;
temp = vp->reg.parm.filterQ;
ccca = (temp << 28) | addr;
if (vp->apitch < 0xe400)
ccca |= CCCA_INTERPROM_0;
else {
unsigned int shift = (vp->apitch - 0xe000) >> 10;
ccca |= shift << 25;
}
if (vp->reg.sample_mode & SNDRV_SFNT_SAMPLE_8BITS)
ccca |= CCCA_8BITSELECT;
vtarget = (unsigned int)vp->vtarget << 16;
snd_emu10k1_ptr_write_multiple(hw, ch,
/* channel to be silent and idle */
DCYSUSV, 0,
VTFT, VTFT_FILTERTARGET_MASK,
CVCF, CVCF_CURRENTFILTER_MASK,
PTRX, 0,
CPF, 0,
/* set pitch offset */
IP, vp->apitch,
/* set envelope parameters */
ENVVAL, vp->reg.parm.moddelay,
ATKHLDM, vp->reg.parm.modatkhld,
DCYSUSM, vp->reg.parm.moddcysus,
ENVVOL, vp->reg.parm.voldelay,
ATKHLDV, vp->reg.parm.volatkhld,
/* decay/sustain parameter for volume envelope is used
for triggerg the voice */
/* cutoff and volume */
IFATN, (unsigned int)vp->acutoff << 8 | (unsigned char)vp->avol,
/* modulation envelope heights */
PEFE, vp->reg.parm.pefe,
/* lfo1/2 delay */
LFOVAL1, vp->reg.parm.lfo1delay,
LFOVAL2, vp->reg.parm.lfo2delay,
/* lfo1 pitch & cutoff shift */
FMMOD, make_fmmod(vp),
/* lfo1 volume & freq */
TREMFRQ, vp->reg.parm.tremfrq,
/* lfo2 pitch & freq */
FM2FRQ2, make_fm2frq2(vp),
/* reverb and loop start (reverb 8bit, MSB) */
PSST, psst,
/* chorus & loop end (chorus 8bit, MSB) */
DSL, dsl,
/* clear filter delay memory */
Z1, 0,
Z2, 0,
/* invalidate maps */
MAPA, map,
MAPB, map,
/* Q & current address (Q 4bit value, MSB) */
CCCA, ccca,
/* cache */
CCR, REG_VAL_PUT(CCR_CACHEINVALIDSIZE, 64),
/* reset volume */
VTFT, vtarget | vp->ftarget,
CVCF, vtarget | CVCF_CURRENTFILTER_MASK,
REGLIST_END);
hw->voices[ch].dirty = 1;
return 0;
}
/*
* Start envelope
*/
static void
trigger_voice(struct snd_emux_voice *vp)
{
unsigned int ptarget;
struct snd_emu10k1 *hw;
struct snd_emu10k1_memblk *emem;
hw = vp->hw;
emem = (struct snd_emu10k1_memblk *)vp->block;
if (! emem || emem->mapped_page < 0)
return; /* not mapped */
#if 0
ptarget = (unsigned int)vp->ptarget << 16;
#else
ptarget = IP_TO_CP(vp->apitch);
#endif
snd_emu10k1_ptr_write_multiple(hw, vp->ch,
/* set pitch target and pan (volume) */
PTRX, ptarget | (vp->apan << 8) | vp->aaux,
/* current pitch and fractional address */
CPF, ptarget,
/* enable envelope engine */
DCYSUSV, vp->reg.parm.voldcysus | DCYSUSV_CHANNELENABLE_MASK,
REGLIST_END);
}
#define MOD_SENSE 18
/* calculate lfo1 modulation height and cutoff register */
static u32
make_fmmod(struct snd_emux_voice *vp)
{
short pitch;
unsigned char cutoff;
int modulation;
pitch = (char)(vp->reg.parm.fmmod>>8);
cutoff = (vp->reg.parm.fmmod & 0xff);
modulation = vp->chan->gm_modulation + vp->chan->midi_pressure;
pitch += (MOD_SENSE * modulation) / 1200;
LIMITVALUE(pitch, -128, 127);
return ((unsigned char)pitch << 8) | cutoff;
}
/* calculate set lfo2 pitch & frequency register */
static u32
make_fm2frq2(struct snd_emux_voice *vp)
{
short pitch;
unsigned char freq;
int modulation;
pitch = (char)(vp->reg.parm.fm2frq2>>8);
freq = vp->reg.parm.fm2frq2 & 0xff;
modulation = vp->chan->gm_modulation + vp->chan->midi_pressure;
pitch += (MOD_SENSE * modulation) / 1200;
LIMITVALUE(pitch, -128, 127);
return ((unsigned char)pitch << 8) | freq;
}
static int get_pitch_shift(struct snd_emux *emu)
{
struct snd_emu10k1 *hw = emu->hw;
return (hw->card_capabilities->emu_model &&
hw->emu1010.word_clock == 44100) ? 0 : -501;
}
| linux-master | sound/pci/emu10k1/emu10k1_callback.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (c) by Jaroslav Kysela <[email protected]>
* Copyright (c) by Takashi Iwai <[email protected]>
*
* EMU10K1 memory page allocation (PTB area)
*/
#include <linux/pci.h>
#include <linux/gfp.h>
#include <linux/time.h>
#include <linux/mutex.h>
#include <linux/export.h>
#include <sound/core.h>
#include <sound/emu10k1.h>
/* page arguments of these two macros are Emu page (4096 bytes), not like
* aligned pages in others
*/
#define __set_ptb_entry(emu,page,addr) \
(((__le32 *)(emu)->ptb_pages.area)[page] = \
cpu_to_le32(((addr) << (emu->address_mode)) | (page)))
#define __get_ptb_entry(emu, page) \
(le32_to_cpu(((__le32 *)(emu)->ptb_pages.area)[page]))
#define UNIT_PAGES (PAGE_SIZE / EMUPAGESIZE)
#define MAX_ALIGN_PAGES0 (MAXPAGES0 / UNIT_PAGES)
#define MAX_ALIGN_PAGES1 (MAXPAGES1 / UNIT_PAGES)
/* get aligned page from offset address */
#define get_aligned_page(offset) ((offset) >> PAGE_SHIFT)
/* get offset address from aligned page */
#define aligned_page_offset(page) ((page) << PAGE_SHIFT)
#if PAGE_SIZE == EMUPAGESIZE && !IS_ENABLED(CONFIG_DYNAMIC_DEBUG)
/* fill PTB entrie(s) corresponding to page with addr */
#define set_ptb_entry(emu,page,addr) __set_ptb_entry(emu,page,addr)
/* fill PTB entrie(s) corresponding to page with silence pointer */
#define set_silent_ptb(emu,page) __set_ptb_entry(emu,page,emu->silent_page.addr)
#else
/* fill PTB entries -- we need to fill UNIT_PAGES entries */
static inline void set_ptb_entry(struct snd_emu10k1 *emu, int page, dma_addr_t addr)
{
int i;
page *= UNIT_PAGES;
for (i = 0; i < UNIT_PAGES; i++, page++) {
__set_ptb_entry(emu, page, addr);
dev_dbg(emu->card->dev, "mapped page %d to entry %.8x\n", page,
(unsigned int)__get_ptb_entry(emu, page));
addr += EMUPAGESIZE;
}
}
static inline void set_silent_ptb(struct snd_emu10k1 *emu, int page)
{
int i;
page *= UNIT_PAGES;
for (i = 0; i < UNIT_PAGES; i++, page++) {
/* do not increment ptr */
__set_ptb_entry(emu, page, emu->silent_page.addr);
dev_dbg(emu->card->dev, "mapped silent page %d to entry %.8x\n",
page, (unsigned int)__get_ptb_entry(emu, page));
}
}
#endif /* PAGE_SIZE */
/*
*/
static int synth_alloc_pages(struct snd_emu10k1 *hw, struct snd_emu10k1_memblk *blk);
static int synth_free_pages(struct snd_emu10k1 *hw, struct snd_emu10k1_memblk *blk);
#define get_emu10k1_memblk(l,member) list_entry(l, struct snd_emu10k1_memblk, member)
/* initialize emu10k1 part */
static void emu10k1_memblk_init(struct snd_emu10k1_memblk *blk)
{
blk->mapped_page = -1;
INIT_LIST_HEAD(&blk->mapped_link);
INIT_LIST_HEAD(&blk->mapped_order_link);
blk->map_locked = 0;
blk->first_page = get_aligned_page(blk->mem.offset);
blk->last_page = get_aligned_page(blk->mem.offset + blk->mem.size - 1);
blk->pages = blk->last_page - blk->first_page + 1;
}
/*
* search empty region on PTB with the given size
*
* if an empty region is found, return the page and store the next mapped block
* in nextp
* if not found, return a negative error code.
*/
static int search_empty_map_area(struct snd_emu10k1 *emu, int npages, struct list_head **nextp)
{
int page = 1, found_page = -ENOMEM;
int max_size = npages;
int size;
struct list_head *candidate = &emu->mapped_link_head;
struct list_head *pos;
list_for_each (pos, &emu->mapped_link_head) {
struct snd_emu10k1_memblk *blk = get_emu10k1_memblk(pos, mapped_link);
if (blk->mapped_page < 0)
continue;
size = blk->mapped_page - page;
if (size == npages) {
*nextp = pos;
return page;
}
else if (size > max_size) {
/* we look for the maximum empty hole */
max_size = size;
candidate = pos;
found_page = page;
}
page = blk->mapped_page + blk->pages;
}
size = (emu->address_mode ? MAX_ALIGN_PAGES1 : MAX_ALIGN_PAGES0) - page;
if (size >= max_size) {
*nextp = pos;
return page;
}
*nextp = candidate;
return found_page;
}
/*
* map a memory block onto emu10k1's PTB
*
* call with memblk_lock held
*/
static int map_memblk(struct snd_emu10k1 *emu, struct snd_emu10k1_memblk *blk)
{
int page, pg;
struct list_head *next;
page = search_empty_map_area(emu, blk->pages, &next);
if (page < 0) /* not found */
return page;
if (page == 0) {
dev_err(emu->card->dev, "trying to map zero (reserved) page\n");
return -EINVAL;
}
/* insert this block in the proper position of mapped list */
list_add_tail(&blk->mapped_link, next);
/* append this as a newest block in order list */
list_add_tail(&blk->mapped_order_link, &emu->mapped_order_link_head);
blk->mapped_page = page;
/* fill PTB */
for (pg = blk->first_page; pg <= blk->last_page; pg++) {
set_ptb_entry(emu, page, emu->page_addr_table[pg]);
page++;
}
return 0;
}
/*
* unmap the block
* return the size of resultant empty pages
*
* call with memblk_lock held
*/
static int unmap_memblk(struct snd_emu10k1 *emu, struct snd_emu10k1_memblk *blk)
{
int start_page, end_page, mpage, pg;
struct list_head *p;
struct snd_emu10k1_memblk *q;
/* calculate the expected size of empty region */
p = blk->mapped_link.prev;
if (p != &emu->mapped_link_head) {
q = get_emu10k1_memblk(p, mapped_link);
start_page = q->mapped_page + q->pages;
} else {
start_page = 1;
}
p = blk->mapped_link.next;
if (p != &emu->mapped_link_head) {
q = get_emu10k1_memblk(p, mapped_link);
end_page = q->mapped_page;
} else {
end_page = (emu->address_mode ? MAX_ALIGN_PAGES1 : MAX_ALIGN_PAGES0);
}
/* remove links */
list_del(&blk->mapped_link);
list_del(&blk->mapped_order_link);
/* clear PTB */
mpage = blk->mapped_page;
for (pg = blk->first_page; pg <= blk->last_page; pg++) {
set_silent_ptb(emu, mpage);
mpage++;
}
blk->mapped_page = -1;
return end_page - start_page; /* return the new empty size */
}
/*
* search empty pages with the given size, and create a memory block
*
* unlike synth_alloc the memory block is aligned to the page start
*/
static struct snd_emu10k1_memblk *
search_empty(struct snd_emu10k1 *emu, int size)
{
struct list_head *p;
struct snd_emu10k1_memblk *blk;
int page, psize;
psize = get_aligned_page(size + PAGE_SIZE -1);
page = 0;
list_for_each(p, &emu->memhdr->block) {
blk = get_emu10k1_memblk(p, mem.list);
if (page + psize <= blk->first_page)
goto __found_pages;
page = blk->last_page + 1;
}
if (page + psize > emu->max_cache_pages)
return NULL;
__found_pages:
/* create a new memory block */
blk = (struct snd_emu10k1_memblk *)__snd_util_memblk_new(emu->memhdr, psize << PAGE_SHIFT, p->prev);
if (blk == NULL)
return NULL;
blk->mem.offset = aligned_page_offset(page); /* set aligned offset */
emu10k1_memblk_init(blk);
return blk;
}
/*
* check if the given pointer is valid for pages
*/
static int is_valid_page(struct snd_emu10k1 *emu, dma_addr_t addr)
{
if (addr & ~emu->dma_mask) {
dev_err_ratelimited(emu->card->dev,
"max memory size is 0x%lx (addr = 0x%lx)!!\n",
emu->dma_mask, (unsigned long)addr);
return 0;
}
if (addr & (EMUPAGESIZE-1)) {
dev_err_ratelimited(emu->card->dev, "page is not aligned\n");
return 0;
}
return 1;
}
/*
* map the given memory block on PTB.
* if the block is already mapped, update the link order.
* if no empty pages are found, tries to release unused memory blocks
* and retry the mapping.
*/
int snd_emu10k1_memblk_map(struct snd_emu10k1 *emu, struct snd_emu10k1_memblk *blk)
{
int err;
int size;
struct list_head *p, *nextp;
struct snd_emu10k1_memblk *deleted;
unsigned long flags;
spin_lock_irqsave(&emu->memblk_lock, flags);
if (blk->mapped_page >= 0) {
/* update order link */
list_move_tail(&blk->mapped_order_link,
&emu->mapped_order_link_head);
spin_unlock_irqrestore(&emu->memblk_lock, flags);
return 0;
}
err = map_memblk(emu, blk);
if (err < 0) {
/* no enough page - try to unmap some blocks */
/* starting from the oldest block */
p = emu->mapped_order_link_head.next;
for (; p != &emu->mapped_order_link_head; p = nextp) {
nextp = p->next;
deleted = get_emu10k1_memblk(p, mapped_order_link);
if (deleted->map_locked)
continue;
size = unmap_memblk(emu, deleted);
if (size >= blk->pages) {
/* ok the empty region is enough large */
err = map_memblk(emu, blk);
break;
}
}
}
spin_unlock_irqrestore(&emu->memblk_lock, flags);
return err;
}
EXPORT_SYMBOL(snd_emu10k1_memblk_map);
/*
* page allocation for DMA
*/
struct snd_util_memblk *
snd_emu10k1_alloc_pages(struct snd_emu10k1 *emu, struct snd_pcm_substream *substream)
{
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_util_memhdr *hdr;
struct snd_emu10k1_memblk *blk;
int page, err, idx;
if (snd_BUG_ON(!emu))
return NULL;
if (snd_BUG_ON(runtime->dma_bytes <= 0 ||
runtime->dma_bytes >= (emu->address_mode ? MAXPAGES1 : MAXPAGES0) * EMUPAGESIZE))
return NULL;
hdr = emu->memhdr;
if (snd_BUG_ON(!hdr))
return NULL;
mutex_lock(&hdr->block_mutex);
blk = search_empty(emu, runtime->dma_bytes);
if (blk == NULL) {
mutex_unlock(&hdr->block_mutex);
return NULL;
}
/* fill buffer addresses but pointers are not stored so that
* snd_free_pci_page() is not called in synth_free()
*/
idx = 0;
for (page = blk->first_page; page <= blk->last_page; page++, idx++) {
unsigned long ofs = idx << PAGE_SHIFT;
dma_addr_t addr;
if (ofs >= runtime->dma_bytes)
addr = emu->silent_page.addr;
else
addr = snd_pcm_sgbuf_get_addr(substream, ofs);
if (! is_valid_page(emu, addr)) {
dev_err_ratelimited(emu->card->dev,
"emu: failure page = %d\n", idx);
mutex_unlock(&hdr->block_mutex);
return NULL;
}
emu->page_addr_table[page] = addr;
emu->page_ptr_table[page] = NULL;
}
/* set PTB entries */
blk->map_locked = 1; /* do not unmap this block! */
err = snd_emu10k1_memblk_map(emu, blk);
if (err < 0) {
__snd_util_mem_free(hdr, (struct snd_util_memblk *)blk);
mutex_unlock(&hdr->block_mutex);
return NULL;
}
mutex_unlock(&hdr->block_mutex);
return (struct snd_util_memblk *)blk;
}
/*
* release DMA buffer from page table
*/
int snd_emu10k1_free_pages(struct snd_emu10k1 *emu, struct snd_util_memblk *blk)
{
if (snd_BUG_ON(!emu || !blk))
return -EINVAL;
return snd_emu10k1_synth_free(emu, blk);
}
/*
* allocate DMA pages, widening the allocation if necessary
*
* See the comment above snd_emu10k1_detect_iommu() in emu10k1_main.c why
* this might be needed.
*
* If you modify this function check whether __synth_free_pages() also needs
* changes.
*/
int snd_emu10k1_alloc_pages_maybe_wider(struct snd_emu10k1 *emu, size_t size,
struct snd_dma_buffer *dmab)
{
if (emu->iommu_workaround) {
size_t npages = DIV_ROUND_UP(size, PAGE_SIZE);
size_t size_real = npages * PAGE_SIZE;
/*
* The device has been observed to accesses up to 256 extra
* bytes, but use 1k to be safe.
*/
if (size_real < size + 1024)
size += PAGE_SIZE;
}
return snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV,
&emu->pci->dev, size, dmab);
}
/*
* memory allocation using multiple pages (for synth)
* Unlike the DMA allocation above, non-contiguous pages are assined.
*/
/*
* allocate a synth sample area
*/
struct snd_util_memblk *
snd_emu10k1_synth_alloc(struct snd_emu10k1 *hw, unsigned int size)
{
struct snd_emu10k1_memblk *blk;
struct snd_util_memhdr *hdr = hw->memhdr;
mutex_lock(&hdr->block_mutex);
blk = (struct snd_emu10k1_memblk *)__snd_util_mem_alloc(hdr, size);
if (blk == NULL) {
mutex_unlock(&hdr->block_mutex);
return NULL;
}
if (synth_alloc_pages(hw, blk)) {
__snd_util_mem_free(hdr, (struct snd_util_memblk *)blk);
mutex_unlock(&hdr->block_mutex);
return NULL;
}
snd_emu10k1_memblk_map(hw, blk);
mutex_unlock(&hdr->block_mutex);
return (struct snd_util_memblk *)blk;
}
EXPORT_SYMBOL(snd_emu10k1_synth_alloc);
/*
* free a synth sample area
*/
int
snd_emu10k1_synth_free(struct snd_emu10k1 *emu, struct snd_util_memblk *memblk)
{
struct snd_util_memhdr *hdr = emu->memhdr;
struct snd_emu10k1_memblk *blk = (struct snd_emu10k1_memblk *)memblk;
unsigned long flags;
mutex_lock(&hdr->block_mutex);
spin_lock_irqsave(&emu->memblk_lock, flags);
if (blk->mapped_page >= 0)
unmap_memblk(emu, blk);
spin_unlock_irqrestore(&emu->memblk_lock, flags);
synth_free_pages(emu, blk);
__snd_util_mem_free(hdr, memblk);
mutex_unlock(&hdr->block_mutex);
return 0;
}
EXPORT_SYMBOL(snd_emu10k1_synth_free);
/* check new allocation range */
static void get_single_page_range(struct snd_util_memhdr *hdr,
struct snd_emu10k1_memblk *blk,
int *first_page_ret, int *last_page_ret)
{
struct list_head *p;
struct snd_emu10k1_memblk *q;
int first_page, last_page;
first_page = blk->first_page;
p = blk->mem.list.prev;
if (p != &hdr->block) {
q = get_emu10k1_memblk(p, mem.list);
if (q->last_page == first_page)
first_page++; /* first page was already allocated */
}
last_page = blk->last_page;
p = blk->mem.list.next;
if (p != &hdr->block) {
q = get_emu10k1_memblk(p, mem.list);
if (q->first_page == last_page)
last_page--; /* last page was already allocated */
}
*first_page_ret = first_page;
*last_page_ret = last_page;
}
/* release allocated pages */
static void __synth_free_pages(struct snd_emu10k1 *emu, int first_page,
int last_page)
{
struct snd_dma_buffer dmab;
int page;
dmab.dev.type = SNDRV_DMA_TYPE_DEV;
dmab.dev.dev = &emu->pci->dev;
for (page = first_page; page <= last_page; page++) {
if (emu->page_ptr_table[page] == NULL)
continue;
dmab.area = emu->page_ptr_table[page];
dmab.addr = emu->page_addr_table[page];
/*
* please keep me in sync with logic in
* snd_emu10k1_alloc_pages_maybe_wider()
*/
dmab.bytes = PAGE_SIZE;
if (emu->iommu_workaround)
dmab.bytes *= 2;
snd_dma_free_pages(&dmab);
emu->page_addr_table[page] = 0;
emu->page_ptr_table[page] = NULL;
}
}
/*
* allocate kernel pages
*/
static int synth_alloc_pages(struct snd_emu10k1 *emu, struct snd_emu10k1_memblk *blk)
{
int page, first_page, last_page;
struct snd_dma_buffer dmab;
emu10k1_memblk_init(blk);
get_single_page_range(emu->memhdr, blk, &first_page, &last_page);
/* allocate kernel pages */
for (page = first_page; page <= last_page; page++) {
if (snd_emu10k1_alloc_pages_maybe_wider(emu, PAGE_SIZE,
&dmab) < 0)
goto __fail;
if (!is_valid_page(emu, dmab.addr)) {
snd_dma_free_pages(&dmab);
goto __fail;
}
emu->page_addr_table[page] = dmab.addr;
emu->page_ptr_table[page] = dmab.area;
}
return 0;
__fail:
/* release allocated pages */
last_page = page - 1;
__synth_free_pages(emu, first_page, last_page);
return -ENOMEM;
}
/*
* free pages
*/
static int synth_free_pages(struct snd_emu10k1 *emu, struct snd_emu10k1_memblk *blk)
{
int first_page, last_page;
get_single_page_range(emu->memhdr, blk, &first_page, &last_page);
__synth_free_pages(emu, first_page, last_page);
return 0;
}
/* calculate buffer pointer from offset address */
static inline void *offset_ptr(struct snd_emu10k1 *emu, int page, int offset)
{
char *ptr;
if (snd_BUG_ON(page < 0 || page >= emu->max_cache_pages))
return NULL;
ptr = emu->page_ptr_table[page];
if (! ptr) {
dev_err(emu->card->dev,
"access to NULL ptr: page = %d\n", page);
return NULL;
}
ptr += offset & (PAGE_SIZE - 1);
return (void*)ptr;
}
/*
* bzero(blk + offset, size)
*/
int snd_emu10k1_synth_bzero(struct snd_emu10k1 *emu, struct snd_util_memblk *blk,
int offset, int size)
{
int page, nextofs, end_offset, temp, temp1;
void *ptr;
struct snd_emu10k1_memblk *p = (struct snd_emu10k1_memblk *)blk;
offset += blk->offset & (PAGE_SIZE - 1);
end_offset = offset + size;
page = get_aligned_page(offset);
do {
nextofs = aligned_page_offset(page + 1);
temp = nextofs - offset;
temp1 = end_offset - offset;
if (temp1 < temp)
temp = temp1;
ptr = offset_ptr(emu, page + p->first_page, offset);
if (ptr)
memset(ptr, 0, temp);
offset = nextofs;
page++;
} while (offset < end_offset);
return 0;
}
EXPORT_SYMBOL(snd_emu10k1_synth_bzero);
/*
* copy_from_user(blk + offset, data, size)
*/
int snd_emu10k1_synth_copy_from_user(struct snd_emu10k1 *emu, struct snd_util_memblk *blk,
int offset, const char __user *data, int size)
{
int page, nextofs, end_offset, temp, temp1;
void *ptr;
struct snd_emu10k1_memblk *p = (struct snd_emu10k1_memblk *)blk;
offset += blk->offset & (PAGE_SIZE - 1);
end_offset = offset + size;
page = get_aligned_page(offset);
do {
nextofs = aligned_page_offset(page + 1);
temp = nextofs - offset;
temp1 = end_offset - offset;
if (temp1 < temp)
temp = temp1;
ptr = offset_ptr(emu, page + p->first_page, offset);
if (ptr && copy_from_user(ptr, data, temp))
return -EFAULT;
offset = nextofs;
data += temp;
page++;
} while (offset < end_offset);
return 0;
}
EXPORT_SYMBOL(snd_emu10k1_synth_copy_from_user);
| linux-master | sound/pci/emu10k1/memory.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (c) by Jaroslav Kysela <[email protected]>
* Creative Labs, Inc.
* Routines for IRQ control of EMU10K1 chips
*/
#include <linux/time.h>
#include <sound/core.h>
#include <sound/emu10k1.h>
irqreturn_t snd_emu10k1_interrupt(int irq, void *dev_id)
{
struct snd_emu10k1 *emu = dev_id;
unsigned int status, orig_status;
int handled = 0;
int timeout = 0;
while ((status = inl(emu->port + IPR)) != 0) {
handled = 1;
if ((status & 0xffffffff) == 0xffffffff) {
dev_info(emu->card->dev,
"Suspected sound card removal\n");
break;
}
if (++timeout == 1000) {
dev_info(emu->card->dev, "emu10k1 irq routine failure\n");
break;
}
orig_status = status;
if (status & IPR_PCIERROR) {
dev_err(emu->card->dev, "interrupt: PCI error\n");
snd_emu10k1_intr_disable(emu, INTE_PCIERRORENABLE);
status &= ~IPR_PCIERROR;
}
if (status & (IPR_VOLINCR|IPR_VOLDECR|IPR_MUTE)) {
if (emu->hwvol_interrupt)
emu->hwvol_interrupt(emu, status);
else
snd_emu10k1_intr_disable(emu, INTE_VOLINCRENABLE|INTE_VOLDECRENABLE|INTE_MUTEENABLE);
status &= ~(IPR_VOLINCR|IPR_VOLDECR|IPR_MUTE);
}
if (status & IPR_CHANNELLOOP) {
struct snd_emu10k1_voice *pvoice;
int voice;
int voice_max = status & IPR_CHANNELNUMBERMASK;
u32 val;
val = snd_emu10k1_ptr_read(emu, CLIPL, 0);
pvoice = emu->voices;
for (voice = 0; voice <= voice_max; voice++) {
if (voice == 0x20)
val = snd_emu10k1_ptr_read(emu, CLIPH, 0);
if (val & 1) {
if (pvoice->use && pvoice->interrupt != NULL) {
pvoice->interrupt(emu, pvoice);
snd_emu10k1_voice_intr_ack(emu, voice);
} else {
snd_emu10k1_voice_intr_disable(emu, voice);
}
}
val >>= 1;
pvoice++;
}
val = snd_emu10k1_ptr_read(emu, HLIPL, 0);
pvoice = emu->voices;
for (voice = 0; voice <= voice_max; voice++) {
if (voice == 0x20)
val = snd_emu10k1_ptr_read(emu, HLIPH, 0);
if (val & 1) {
if (pvoice->use && pvoice->interrupt != NULL) {
pvoice->interrupt(emu, pvoice);
snd_emu10k1_voice_half_loop_intr_ack(emu, voice);
} else {
snd_emu10k1_voice_half_loop_intr_disable(emu, voice);
}
}
val >>= 1;
pvoice++;
}
status &= ~(IPR_CHANNELLOOP | IPR_CHANNELNUMBERMASK);
}
if (status & (IPR_ADCBUFFULL|IPR_ADCBUFHALFFULL)) {
if (emu->capture_interrupt)
emu->capture_interrupt(emu, status);
else
snd_emu10k1_intr_disable(emu, INTE_ADCBUFENABLE);
status &= ~(IPR_ADCBUFFULL|IPR_ADCBUFHALFFULL);
}
if (status & (IPR_MICBUFFULL|IPR_MICBUFHALFFULL)) {
if (emu->capture_mic_interrupt)
emu->capture_mic_interrupt(emu, status);
else
snd_emu10k1_intr_disable(emu, INTE_MICBUFENABLE);
status &= ~(IPR_MICBUFFULL|IPR_MICBUFHALFFULL);
}
if (status & (IPR_EFXBUFFULL|IPR_EFXBUFHALFFULL)) {
if (emu->capture_efx_interrupt)
emu->capture_efx_interrupt(emu, status);
else
snd_emu10k1_intr_disable(emu, INTE_EFXBUFENABLE);
status &= ~(IPR_EFXBUFFULL|IPR_EFXBUFHALFFULL);
}
if (status & (IPR_MIDITRANSBUFEMPTY|IPR_MIDIRECVBUFEMPTY)) {
if (emu->midi.interrupt)
emu->midi.interrupt(emu, status);
else
snd_emu10k1_intr_disable(emu, INTE_MIDITXENABLE|INTE_MIDIRXENABLE);
status &= ~(IPR_MIDITRANSBUFEMPTY|IPR_MIDIRECVBUFEMPTY);
}
if (status & (IPR_A_MIDITRANSBUFEMPTY2|IPR_A_MIDIRECVBUFEMPTY2)) {
if (emu->midi2.interrupt)
emu->midi2.interrupt(emu, status);
else
snd_emu10k1_intr_disable(emu, INTE_A_MIDITXENABLE2|INTE_A_MIDIRXENABLE2);
status &= ~(IPR_A_MIDITRANSBUFEMPTY2|IPR_A_MIDIRECVBUFEMPTY2);
}
if (status & IPR_INTERVALTIMER) {
if (emu->timer)
snd_timer_interrupt(emu->timer, emu->timer->sticks);
else
snd_emu10k1_intr_disable(emu, INTE_INTERVALTIMERENB);
status &= ~IPR_INTERVALTIMER;
}
if (status & (IPR_GPSPDIFSTATUSCHANGE|IPR_CDROMSTATUSCHANGE)) {
if (emu->spdif_interrupt)
emu->spdif_interrupt(emu, status);
else
snd_emu10k1_intr_disable(emu, INTE_GPSPDIFENABLE|INTE_CDSPDIFENABLE);
status &= ~(IPR_GPSPDIFSTATUSCHANGE|IPR_CDROMSTATUSCHANGE);
}
if (status & IPR_FXDSP) {
if (emu->dsp_interrupt)
emu->dsp_interrupt(emu);
else
snd_emu10k1_intr_disable(emu, INTE_FXDSPENABLE);
status &= ~IPR_FXDSP;
}
if (status & IPR_P16V) {
if (emu->p16v_interrupt)
emu->p16v_interrupt(emu);
else
outl(0, emu->port + INTE2);
status &= ~IPR_P16V;
}
if (status & IPR_A_GPIO) {
if (emu->gpio_interrupt)
emu->gpio_interrupt(emu);
else
snd_emu10k1_intr_disable(emu, INTE_A_GPIOENABLE);
status &= ~IPR_A_GPIO;
}
if (status) {
dev_err(emu->card->dev,
"unhandled interrupt: 0x%08x\n", status);
}
outl(orig_status, emu->port + IPR); /* ack all */
}
return IRQ_RETVAL(handled);
}
| linux-master | sound/pci/emu10k1/irq.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (c) by Jaroslav Kysela <[email protected]>
* Lee Revell <[email protected]>
* James Courtier-Dutton <[email protected]>
* Oswald Buddenhagen <[email protected]>
* Creative Labs, Inc.
*
* Routines for control of EMU10K1 chips
*/
#include <linux/time.h>
#include <sound/core.h>
#include <sound/emu10k1.h>
#include <linux/delay.h>
#include <linux/export.h>
#include "p17v.h"
static inline bool check_ptr_reg(struct snd_emu10k1 *emu, unsigned int reg)
{
if (snd_BUG_ON(!emu))
return false;
if (snd_BUG_ON(reg & (emu->audigy ? (0xffff0000 & ~A_PTR_ADDRESS_MASK)
: (0xffff0000 & ~PTR_ADDRESS_MASK))))
return false;
if (snd_BUG_ON(reg & 0x0000ffff & ~PTR_CHANNELNUM_MASK))
return false;
return true;
}
unsigned int snd_emu10k1_ptr_read(struct snd_emu10k1 * emu, unsigned int reg, unsigned int chn)
{
unsigned long flags;
unsigned int regptr, val;
unsigned int mask;
regptr = (reg << 16) | chn;
if (!check_ptr_reg(emu, regptr))
return 0;
spin_lock_irqsave(&emu->emu_lock, flags);
outl(regptr, emu->port + PTR);
val = inl(emu->port + DATA);
spin_unlock_irqrestore(&emu->emu_lock, flags);
if (reg & 0xff000000) {
unsigned char size, offset;
size = (reg >> 24) & 0x3f;
offset = (reg >> 16) & 0x1f;
mask = (1 << size) - 1;
return (val >> offset) & mask;
} else {
return val;
}
}
EXPORT_SYMBOL(snd_emu10k1_ptr_read);
void snd_emu10k1_ptr_write(struct snd_emu10k1 *emu, unsigned int reg, unsigned int chn, unsigned int data)
{
unsigned int regptr;
unsigned long flags;
unsigned int mask;
regptr = (reg << 16) | chn;
if (!check_ptr_reg(emu, regptr))
return;
if (reg & 0xff000000) {
unsigned char size, offset;
size = (reg >> 24) & 0x3f;
offset = (reg >> 16) & 0x1f;
mask = (1 << size) - 1;
if (snd_BUG_ON(data & ~mask))
return;
mask <<= offset;
data <<= offset;
spin_lock_irqsave(&emu->emu_lock, flags);
outl(regptr, emu->port + PTR);
data |= inl(emu->port + DATA) & ~mask;
} else {
spin_lock_irqsave(&emu->emu_lock, flags);
outl(regptr, emu->port + PTR);
}
outl(data, emu->port + DATA);
spin_unlock_irqrestore(&emu->emu_lock, flags);
}
EXPORT_SYMBOL(snd_emu10k1_ptr_write);
void snd_emu10k1_ptr_write_multiple(struct snd_emu10k1 *emu, unsigned int chn, ...)
{
va_list va;
u32 addr_mask;
unsigned long flags;
if (snd_BUG_ON(!emu))
return;
if (snd_BUG_ON(chn & ~PTR_CHANNELNUM_MASK))
return;
addr_mask = ~((emu->audigy ? A_PTR_ADDRESS_MASK : PTR_ADDRESS_MASK) >> 16);
va_start(va, chn);
spin_lock_irqsave(&emu->emu_lock, flags);
for (;;) {
u32 data;
u32 reg = va_arg(va, u32);
if (reg == REGLIST_END)
break;
data = va_arg(va, u32);
if (snd_BUG_ON(reg & addr_mask)) // Only raw registers supported here
continue;
outl((reg << 16) | chn, emu->port + PTR);
outl(data, emu->port + DATA);
}
spin_unlock_irqrestore(&emu->emu_lock, flags);
va_end(va);
}
EXPORT_SYMBOL(snd_emu10k1_ptr_write_multiple);
unsigned int snd_emu10k1_ptr20_read(struct snd_emu10k1 * emu,
unsigned int reg,
unsigned int chn)
{
unsigned long flags;
unsigned int regptr, val;
regptr = (reg << 16) | chn;
spin_lock_irqsave(&emu->emu_lock, flags);
outl(regptr, emu->port + PTR2);
val = inl(emu->port + DATA2);
spin_unlock_irqrestore(&emu->emu_lock, flags);
return val;
}
void snd_emu10k1_ptr20_write(struct snd_emu10k1 *emu,
unsigned int reg,
unsigned int chn,
unsigned int data)
{
unsigned int regptr;
unsigned long flags;
regptr = (reg << 16) | chn;
spin_lock_irqsave(&emu->emu_lock, flags);
outl(regptr, emu->port + PTR2);
outl(data, emu->port + DATA2);
spin_unlock_irqrestore(&emu->emu_lock, flags);
}
int snd_emu10k1_spi_write(struct snd_emu10k1 * emu,
unsigned int data)
{
unsigned int reset, set;
unsigned int reg, tmp;
int n, result;
int err = 0;
/* This function is not re-entrant, so protect against it. */
spin_lock(&emu->spi_lock);
if (emu->card_capabilities->ca0108_chip)
reg = P17V_SPI;
else {
/* For other chip types the SPI register
* is currently unknown. */
err = 1;
goto spi_write_exit;
}
if (data > 0xffff) {
/* Only 16bit values allowed */
err = 1;
goto spi_write_exit;
}
tmp = snd_emu10k1_ptr20_read(emu, reg, 0);
reset = (tmp & ~0x3ffff) | 0x20000; /* Set xxx20000 */
set = reset | 0x10000; /* Set xxx1xxxx */
snd_emu10k1_ptr20_write(emu, reg, 0, reset | data);
tmp = snd_emu10k1_ptr20_read(emu, reg, 0); /* write post */
snd_emu10k1_ptr20_write(emu, reg, 0, set | data);
result = 1;
/* Wait for status bit to return to 0 */
for (n = 0; n < 100; n++) {
udelay(10);
tmp = snd_emu10k1_ptr20_read(emu, reg, 0);
if (!(tmp & 0x10000)) {
result = 0;
break;
}
}
if (result) {
/* Timed out */
err = 1;
goto spi_write_exit;
}
snd_emu10k1_ptr20_write(emu, reg, 0, reset | data);
tmp = snd_emu10k1_ptr20_read(emu, reg, 0); /* Write post */
err = 0;
spi_write_exit:
spin_unlock(&emu->spi_lock);
return err;
}
/* The ADC does not support i2c read, so only write is implemented */
int snd_emu10k1_i2c_write(struct snd_emu10k1 *emu,
u32 reg,
u32 value)
{
u32 tmp;
int timeout = 0;
int status;
int retry;
int err = 0;
if ((reg > 0x7f) || (value > 0x1ff)) {
dev_err(emu->card->dev, "i2c_write: invalid values.\n");
return -EINVAL;
}
/* This function is not re-entrant, so protect against it. */
spin_lock(&emu->i2c_lock);
tmp = reg << 25 | value << 16;
/* This controls the I2C connected to the WM8775 ADC Codec */
snd_emu10k1_ptr20_write(emu, P17V_I2C_1, 0, tmp);
tmp = snd_emu10k1_ptr20_read(emu, P17V_I2C_1, 0); /* write post */
for (retry = 0; retry < 10; retry++) {
/* Send the data to i2c */
tmp = 0;
tmp = tmp | (I2C_A_ADC_LAST|I2C_A_ADC_START|I2C_A_ADC_ADD);
snd_emu10k1_ptr20_write(emu, P17V_I2C_ADDR, 0, tmp);
/* Wait till the transaction ends */
while (1) {
mdelay(1);
status = snd_emu10k1_ptr20_read(emu, P17V_I2C_ADDR, 0);
timeout++;
if ((status & I2C_A_ADC_START) == 0)
break;
if (timeout > 1000) {
dev_warn(emu->card->dev,
"emu10k1:I2C:timeout status=0x%x\n",
status);
break;
}
}
//Read back and see if the transaction is successful
if ((status & I2C_A_ADC_ABORT) == 0)
break;
}
if (retry == 10) {
dev_err(emu->card->dev, "Writing to ADC failed!\n");
dev_err(emu->card->dev, "status=0x%x, reg=%d, value=%d\n",
status, reg, value);
/* dump_stack(); */
err = -EINVAL;
}
spin_unlock(&emu->i2c_lock);
return err;
}
static void snd_emu1010_fpga_write_locked(struct snd_emu10k1 *emu, u32 reg, u32 value)
{
if (snd_BUG_ON(reg > 0x3f))
return;
reg += 0x40; /* 0x40 upwards are registers. */
if (snd_BUG_ON(value > 0x3f)) /* 0 to 0x3f are values */
return;
outw(reg, emu->port + A_GPIO);
udelay(10);
outw(reg | 0x80, emu->port + A_GPIO); /* High bit clocks the value into the fpga. */
udelay(10);
outw(value, emu->port + A_GPIO);
udelay(10);
outw(value | 0x80 , emu->port + A_GPIO); /* High bit clocks the value into the fpga. */
}
void snd_emu1010_fpga_write(struct snd_emu10k1 *emu, u32 reg, u32 value)
{
unsigned long flags;
spin_lock_irqsave(&emu->emu_lock, flags);
snd_emu1010_fpga_write_locked(emu, reg, value);
spin_unlock_irqrestore(&emu->emu_lock, flags);
}
static void snd_emu1010_fpga_read_locked(struct snd_emu10k1 *emu, u32 reg, u32 *value)
{
// The higest input pin is used as the designated interrupt trigger,
// so it needs to be masked out.
// But note that any other input pin change will also cause an IRQ,
// so using this function often causes an IRQ as a side effect.
u32 mask = emu->card_capabilities->ca0108_chip ? 0x1f : 0x7f;
if (snd_BUG_ON(reg > 0x3f))
return;
reg += 0x40; /* 0x40 upwards are registers. */
outw(reg, emu->port + A_GPIO);
udelay(10);
outw(reg | 0x80, emu->port + A_GPIO); /* High bit clocks the value into the fpga. */
udelay(10);
*value = ((inw(emu->port + A_GPIO) >> 8) & mask);
}
void snd_emu1010_fpga_read(struct snd_emu10k1 *emu, u32 reg, u32 *value)
{
unsigned long flags;
spin_lock_irqsave(&emu->emu_lock, flags);
snd_emu1010_fpga_read_locked(emu, reg, value);
spin_unlock_irqrestore(&emu->emu_lock, flags);
}
/* Each Destination has one and only one Source,
* but one Source can feed any number of Destinations simultaneously.
*/
void snd_emu1010_fpga_link_dst_src_write(struct snd_emu10k1 *emu, u32 dst, u32 src)
{
unsigned long flags;
if (snd_BUG_ON(dst & ~0x71f))
return;
if (snd_BUG_ON(src & ~0x71f))
return;
spin_lock_irqsave(&emu->emu_lock, flags);
snd_emu1010_fpga_write_locked(emu, EMU_HANA_DESTHI, dst >> 8);
snd_emu1010_fpga_write_locked(emu, EMU_HANA_DESTLO, dst & 0x1f);
snd_emu1010_fpga_write_locked(emu, EMU_HANA_SRCHI, src >> 8);
snd_emu1010_fpga_write_locked(emu, EMU_HANA_SRCLO, src & 0x1f);
spin_unlock_irqrestore(&emu->emu_lock, flags);
}
u32 snd_emu1010_fpga_link_dst_src_read(struct snd_emu10k1 *emu, u32 dst)
{
unsigned long flags;
u32 hi, lo;
if (snd_BUG_ON(dst & ~0x71f))
return 0;
spin_lock_irqsave(&emu->emu_lock, flags);
snd_emu1010_fpga_write_locked(emu, EMU_HANA_DESTHI, dst >> 8);
snd_emu1010_fpga_write_locked(emu, EMU_HANA_DESTLO, dst & 0x1f);
snd_emu1010_fpga_read_locked(emu, EMU_HANA_SRCHI, &hi);
snd_emu1010_fpga_read_locked(emu, EMU_HANA_SRCLO, &lo);
spin_unlock_irqrestore(&emu->emu_lock, flags);
return (hi << 8) | lo;
}
int snd_emu1010_get_raw_rate(struct snd_emu10k1 *emu, u8 src)
{
u32 reg_lo, reg_hi, value, value2;
switch (src) {
case EMU_HANA_WCLOCK_HANA_SPDIF_IN:
snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &value);
if (value & EMU_HANA_SPDIF_MODE_RX_INVALID)
return 0;
reg_lo = EMU_HANA_WC_SPDIF_LO;
reg_hi = EMU_HANA_WC_SPDIF_HI;
break;
case EMU_HANA_WCLOCK_HANA_ADAT_IN:
reg_lo = EMU_HANA_WC_ADAT_LO;
reg_hi = EMU_HANA_WC_ADAT_HI;
break;
case EMU_HANA_WCLOCK_SYNC_BNC:
reg_lo = EMU_HANA_WC_BNC_LO;
reg_hi = EMU_HANA_WC_BNC_HI;
break;
case EMU_HANA_WCLOCK_2ND_HANA:
reg_lo = EMU_HANA2_WC_SPDIF_LO;
reg_hi = EMU_HANA2_WC_SPDIF_HI;
break;
default:
return 0;
}
snd_emu1010_fpga_read(emu, reg_hi, &value);
snd_emu1010_fpga_read(emu, reg_lo, &value2);
// FIXME: The /4 is valid for 0404b, but contradicts all other info.
return 0x1770000 / 4 / (((value << 5) | value2) + 1);
}
void snd_emu1010_update_clock(struct snd_emu10k1 *emu)
{
int clock;
u32 leds;
switch (emu->emu1010.wclock) {
case EMU_HANA_WCLOCK_INT_44_1K | EMU_HANA_WCLOCK_1X:
clock = 44100;
leds = EMU_HANA_DOCK_LEDS_2_44K;
break;
case EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_1X:
clock = 48000;
leds = EMU_HANA_DOCK_LEDS_2_48K;
break;
default:
clock = snd_emu1010_get_raw_rate(
emu, emu->emu1010.wclock & EMU_HANA_WCLOCK_SRC_MASK);
// The raw rate reading is rather coarse (it cannot accurately
// represent 44.1 kHz) and fluctuates slightly. Luckily, the
// clock comes from digital inputs, which use standardized rates.
// So we round to the closest standard rate and ignore discrepancies.
if (clock < 46000) {
clock = 44100;
leds = EMU_HANA_DOCK_LEDS_2_EXT | EMU_HANA_DOCK_LEDS_2_44K;
} else {
clock = 48000;
leds = EMU_HANA_DOCK_LEDS_2_EXT | EMU_HANA_DOCK_LEDS_2_48K;
}
break;
}
emu->emu1010.word_clock = clock;
// FIXME: this should probably represent the AND of all currently
// used sources' lock status. But we don't know how to get that ...
leds |= EMU_HANA_DOCK_LEDS_2_LOCK;
snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, leds);
}
void snd_emu10k1_intr_enable(struct snd_emu10k1 *emu, unsigned int intrenb)
{
unsigned long flags;
unsigned int enable;
spin_lock_irqsave(&emu->emu_lock, flags);
enable = inl(emu->port + INTE) | intrenb;
outl(enable, emu->port + INTE);
spin_unlock_irqrestore(&emu->emu_lock, flags);
}
void snd_emu10k1_intr_disable(struct snd_emu10k1 *emu, unsigned int intrenb)
{
unsigned long flags;
unsigned int enable;
spin_lock_irqsave(&emu->emu_lock, flags);
enable = inl(emu->port + INTE) & ~intrenb;
outl(enable, emu->port + INTE);
spin_unlock_irqrestore(&emu->emu_lock, flags);
}
void snd_emu10k1_voice_intr_enable(struct snd_emu10k1 *emu, unsigned int voicenum)
{
unsigned long flags;
unsigned int val;
spin_lock_irqsave(&emu->emu_lock, flags);
if (voicenum >= 32) {
outl(CLIEH << 16, emu->port + PTR);
val = inl(emu->port + DATA);
val |= 1 << (voicenum - 32);
} else {
outl(CLIEL << 16, emu->port + PTR);
val = inl(emu->port + DATA);
val |= 1 << voicenum;
}
outl(val, emu->port + DATA);
spin_unlock_irqrestore(&emu->emu_lock, flags);
}
void snd_emu10k1_voice_intr_disable(struct snd_emu10k1 *emu, unsigned int voicenum)
{
unsigned long flags;
unsigned int val;
spin_lock_irqsave(&emu->emu_lock, flags);
if (voicenum >= 32) {
outl(CLIEH << 16, emu->port + PTR);
val = inl(emu->port + DATA);
val &= ~(1 << (voicenum - 32));
} else {
outl(CLIEL << 16, emu->port + PTR);
val = inl(emu->port + DATA);
val &= ~(1 << voicenum);
}
outl(val, emu->port + DATA);
spin_unlock_irqrestore(&emu->emu_lock, flags);
}
void snd_emu10k1_voice_intr_ack(struct snd_emu10k1 *emu, unsigned int voicenum)
{
unsigned long flags;
spin_lock_irqsave(&emu->emu_lock, flags);
if (voicenum >= 32) {
outl(CLIPH << 16, emu->port + PTR);
voicenum = 1 << (voicenum - 32);
} else {
outl(CLIPL << 16, emu->port + PTR);
voicenum = 1 << voicenum;
}
outl(voicenum, emu->port + DATA);
spin_unlock_irqrestore(&emu->emu_lock, flags);
}
void snd_emu10k1_voice_half_loop_intr_enable(struct snd_emu10k1 *emu, unsigned int voicenum)
{
unsigned long flags;
unsigned int val;
spin_lock_irqsave(&emu->emu_lock, flags);
if (voicenum >= 32) {
outl(HLIEH << 16, emu->port + PTR);
val = inl(emu->port + DATA);
val |= 1 << (voicenum - 32);
} else {
outl(HLIEL << 16, emu->port + PTR);
val = inl(emu->port + DATA);
val |= 1 << voicenum;
}
outl(val, emu->port + DATA);
spin_unlock_irqrestore(&emu->emu_lock, flags);
}
void snd_emu10k1_voice_half_loop_intr_disable(struct snd_emu10k1 *emu, unsigned int voicenum)
{
unsigned long flags;
unsigned int val;
spin_lock_irqsave(&emu->emu_lock, flags);
if (voicenum >= 32) {
outl(HLIEH << 16, emu->port + PTR);
val = inl(emu->port + DATA);
val &= ~(1 << (voicenum - 32));
} else {
outl(HLIEL << 16, emu->port + PTR);
val = inl(emu->port + DATA);
val &= ~(1 << voicenum);
}
outl(val, emu->port + DATA);
spin_unlock_irqrestore(&emu->emu_lock, flags);
}
void snd_emu10k1_voice_half_loop_intr_ack(struct snd_emu10k1 *emu, unsigned int voicenum)
{
unsigned long flags;
spin_lock_irqsave(&emu->emu_lock, flags);
if (voicenum >= 32) {
outl(HLIPH << 16, emu->port + PTR);
voicenum = 1 << (voicenum - 32);
} else {
outl(HLIPL << 16, emu->port + PTR);
voicenum = 1 << voicenum;
}
outl(voicenum, emu->port + DATA);
spin_unlock_irqrestore(&emu->emu_lock, flags);
}
#if 0
void snd_emu10k1_voice_set_loop_stop(struct snd_emu10k1 *emu, unsigned int voicenum)
{
unsigned long flags;
unsigned int sol;
spin_lock_irqsave(&emu->emu_lock, flags);
if (voicenum >= 32) {
outl(SOLEH << 16, emu->port + PTR);
sol = inl(emu->port + DATA);
sol |= 1 << (voicenum - 32);
} else {
outl(SOLEL << 16, emu->port + PTR);
sol = inl(emu->port + DATA);
sol |= 1 << voicenum;
}
outl(sol, emu->port + DATA);
spin_unlock_irqrestore(&emu->emu_lock, flags);
}
void snd_emu10k1_voice_clear_loop_stop(struct snd_emu10k1 *emu, unsigned int voicenum)
{
unsigned long flags;
unsigned int sol;
spin_lock_irqsave(&emu->emu_lock, flags);
if (voicenum >= 32) {
outl(SOLEH << 16, emu->port + PTR);
sol = inl(emu->port + DATA);
sol &= ~(1 << (voicenum - 32));
} else {
outl(SOLEL << 16, emu->port + PTR);
sol = inl(emu->port + DATA);
sol &= ~(1 << voicenum);
}
outl(sol, emu->port + DATA);
spin_unlock_irqrestore(&emu->emu_lock, flags);
}
#endif
void snd_emu10k1_voice_set_loop_stop_multiple(struct snd_emu10k1 *emu, u64 voices)
{
unsigned long flags;
spin_lock_irqsave(&emu->emu_lock, flags);
outl(SOLEL << 16, emu->port + PTR);
outl(inl(emu->port + DATA) | (u32)voices, emu->port + DATA);
outl(SOLEH << 16, emu->port + PTR);
outl(inl(emu->port + DATA) | (u32)(voices >> 32), emu->port + DATA);
spin_unlock_irqrestore(&emu->emu_lock, flags);
}
void snd_emu10k1_voice_clear_loop_stop_multiple(struct snd_emu10k1 *emu, u64 voices)
{
unsigned long flags;
spin_lock_irqsave(&emu->emu_lock, flags);
outl(SOLEL << 16, emu->port + PTR);
outl(inl(emu->port + DATA) & (u32)~voices, emu->port + DATA);
outl(SOLEH << 16, emu->port + PTR);
outl(inl(emu->port + DATA) & (u32)(~voices >> 32), emu->port + DATA);
spin_unlock_irqrestore(&emu->emu_lock, flags);
}
int snd_emu10k1_voice_clear_loop_stop_multiple_atomic(struct snd_emu10k1 *emu, u64 voices)
{
unsigned long flags;
u32 soll, solh;
int ret = -EIO;
spin_lock_irqsave(&emu->emu_lock, flags);
outl(SOLEL << 16, emu->port + PTR);
soll = inl(emu->port + DATA);
outl(SOLEH << 16, emu->port + PTR);
solh = inl(emu->port + DATA);
soll &= (u32)~voices;
solh &= (u32)(~voices >> 32);
for (int tries = 0; tries < 1000; tries++) {
const u32 quart = 1U << (REG_SIZE(WC_CURRENTCHANNEL) - 2);
// First we wait for the third quarter of the sample cycle ...
u32 wc = inl(emu->port + WC);
u32 cc = REG_VAL_GET(WC_CURRENTCHANNEL, wc);
if (cc >= quart * 2 && cc < quart * 3) {
// ... and release the low voices, while the high ones are serviced.
outl(SOLEL << 16, emu->port + PTR);
outl(soll, emu->port + DATA);
// Then we wait for the first quarter of the next sample cycle ...
for (; tries < 1000; tries++) {
cc = REG_VAL_GET(WC_CURRENTCHANNEL, inl(emu->port + WC));
if (cc < quart)
goto good;
// We will block for 10+ us with interrupts disabled. This is
// not nice at all, but necessary for reasonable reliability.
udelay(1);
}
break;
good:
// ... and release the high voices, while the low ones are serviced.
outl(SOLEH << 16, emu->port + PTR);
outl(solh, emu->port + DATA);
// Finally we verify that nothing interfered in fact.
if (REG_VAL_GET(WC_SAMPLECOUNTER, inl(emu->port + WC)) ==
((REG_VAL_GET(WC_SAMPLECOUNTER, wc) + 1) & REG_MASK0(WC_SAMPLECOUNTER))) {
ret = 0;
} else {
ret = -EAGAIN;
}
break;
}
// Don't block for too long
spin_unlock_irqrestore(&emu->emu_lock, flags);
udelay(1);
spin_lock_irqsave(&emu->emu_lock, flags);
}
spin_unlock_irqrestore(&emu->emu_lock, flags);
return ret;
}
void snd_emu10k1_wait(struct snd_emu10k1 *emu, unsigned int wait)
{
volatile unsigned count;
unsigned int newtime = 0, curtime;
curtime = inl(emu->port + WC) >> 6;
while (wait-- > 0) {
count = 0;
while (count++ < 16384) {
newtime = inl(emu->port + WC) >> 6;
if (newtime != curtime)
break;
}
if (count > 16384)
break;
curtime = newtime;
}
}
unsigned short snd_emu10k1_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
{
struct snd_emu10k1 *emu = ac97->private_data;
unsigned long flags;
unsigned short val;
spin_lock_irqsave(&emu->emu_lock, flags);
outb(reg, emu->port + AC97ADDRESS);
val = inw(emu->port + AC97DATA);
spin_unlock_irqrestore(&emu->emu_lock, flags);
return val;
}
void snd_emu10k1_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short data)
{
struct snd_emu10k1 *emu = ac97->private_data;
unsigned long flags;
spin_lock_irqsave(&emu->emu_lock, flags);
outb(reg, emu->port + AC97ADDRESS);
outw(data, emu->port + AC97DATA);
spin_unlock_irqrestore(&emu->emu_lock, flags);
}
| linux-master | sound/pci/emu10k1/io.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (c) by Jaroslav Kysela <[email protected]>
* Lee Revell <[email protected]>
* James Courtier-Dutton <[email protected]>
* Oswald Buddenhagen <[email protected]>
* Creative Labs, Inc.
*
* Routines for control of EMU10K1 chips / proc interface routines
*/
#include <linux/slab.h>
#include <linux/init.h>
#include <sound/core.h>
#include <sound/emu10k1.h>
#include "p16v.h"
static void snd_emu10k1_proc_spdif_status(struct snd_emu10k1 * emu,
struct snd_info_buffer *buffer,
char *title,
int status_reg,
int rate_reg)
{
static const char * const clkaccy[4] = { "1000ppm", "50ppm", "variable", "unknown" };
static const int samplerate[16] = { 44100, 1, 48000, 32000, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 };
static const char * const channel[16] = { "unspec", "left", "right", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12", "13", "14", "15" };
static const char * const emphasis[8] = { "none", "50/15 usec 2 channel", "2", "3", "4", "5", "6", "7" };
unsigned int status, rate = 0;
status = snd_emu10k1_ptr_read(emu, status_reg, 0);
snd_iprintf(buffer, "\n%s\n", title);
if (status != 0xffffffff) {
snd_iprintf(buffer, "Professional Mode : %s\n", (status & SPCS_PROFESSIONAL) ? "yes" : "no");
snd_iprintf(buffer, "Not Audio Data : %s\n", (status & SPCS_NOTAUDIODATA) ? "yes" : "no");
snd_iprintf(buffer, "Copyright : %s\n", (status & SPCS_COPYRIGHT) ? "yes" : "no");
snd_iprintf(buffer, "Emphasis : %s\n", emphasis[(status & SPCS_EMPHASISMASK) >> 3]);
snd_iprintf(buffer, "Mode : %i\n", (status & SPCS_MODEMASK) >> 6);
snd_iprintf(buffer, "Category Code : 0x%x\n", (status & SPCS_CATEGORYCODEMASK) >> 8);
snd_iprintf(buffer, "Generation Status : %s\n", status & SPCS_GENERATIONSTATUS ? "original" : "copy");
snd_iprintf(buffer, "Source Mask : %i\n", (status & SPCS_SOURCENUMMASK) >> 16);
snd_iprintf(buffer, "Channel Number : %s\n", channel[(status & SPCS_CHANNELNUMMASK) >> 20]);
snd_iprintf(buffer, "Sample Rate : %iHz\n", samplerate[(status & SPCS_SAMPLERATEMASK) >> 24]);
snd_iprintf(buffer, "Clock Accuracy : %s\n", clkaccy[(status & SPCS_CLKACCYMASK) >> 28]);
if (rate_reg > 0) {
rate = snd_emu10k1_ptr_read(emu, rate_reg, 0);
snd_iprintf(buffer, "S/PDIF Valid : %s\n", rate & SRCS_SPDIFVALID ? "on" : "off");
snd_iprintf(buffer, "S/PDIF Locked : %s\n", rate & SRCS_SPDIFLOCKED ? "on" : "off");
snd_iprintf(buffer, "Rate Locked : %s\n", rate & SRCS_RATELOCKED ? "on" : "off");
/* From ((Rate * 48000 ) / 262144); */
snd_iprintf(buffer, "Estimated Sample Rate : %d\n", ((rate & 0xFFFFF ) * 375) >> 11);
}
} else {
snd_iprintf(buffer, "No signal detected.\n");
}
}
static void snd_emu10k1_proc_read(struct snd_info_entry *entry,
struct snd_info_buffer *buffer)
{
struct snd_emu10k1 *emu = entry->private_data;
const char * const *inputs = emu->audigy ?
snd_emu10k1_audigy_ins : snd_emu10k1_sblive_ins;
const char * const *outputs = emu->audigy ?
snd_emu10k1_audigy_outs : snd_emu10k1_sblive_outs;
unsigned short extin_mask = emu->audigy ? ~0 : emu->fx8010.extin_mask;
unsigned short extout_mask = emu->audigy ? ~0 : emu->fx8010.extout_mask;
unsigned int val, val1, ptrx, psst, dsl, snda;
int nefx = emu->audigy ? 32 : 16;
int idx;
snd_iprintf(buffer, "EMU10K1\n\n");
snd_iprintf(buffer, "Card : %s\n",
emu->card_capabilities->emu_model ? "E-MU D.A.S." :
emu->card_capabilities->ecard ? "E-MU A.P.S." :
emu->audigy ? "SB Audigy" : "SB Live!");
snd_iprintf(buffer, "Internal TRAM (words) : 0x%x\n", emu->fx8010.itram_size);
snd_iprintf(buffer, "External TRAM (words) : 0x%x\n", (int)emu->fx8010.etram_pages.bytes / 2);
snd_iprintf(buffer, "\nEffect Send Routing & Amounts:\n");
for (idx = 0; idx < NUM_G; idx++) {
ptrx = snd_emu10k1_ptr_read(emu, PTRX, idx);
psst = snd_emu10k1_ptr_read(emu, PSST, idx);
dsl = snd_emu10k1_ptr_read(emu, DSL, idx);
if (emu->audigy) {
val = snd_emu10k1_ptr_read(emu, A_FXRT1, idx);
val1 = snd_emu10k1_ptr_read(emu, A_FXRT2, idx);
snda = snd_emu10k1_ptr_read(emu, A_SENDAMOUNTS, idx);
snd_iprintf(buffer, "Ch%-2i: A=%2i:%02x, B=%2i:%02x, C=%2i:%02x, D=%2i:%02x, ",
idx,
val & 0x3f, REG_VAL_GET(PTRX_FXSENDAMOUNT_A, ptrx),
(val >> 8) & 0x3f, REG_VAL_GET(PTRX_FXSENDAMOUNT_B, ptrx),
(val >> 16) & 0x3f, REG_VAL_GET(PSST_FXSENDAMOUNT_C, psst),
(val >> 24) & 0x3f, REG_VAL_GET(DSL_FXSENDAMOUNT_D, dsl));
snd_iprintf(buffer, "E=%2i:%02x, F=%2i:%02x, G=%2i:%02x, H=%2i:%02x\n",
val1 & 0x3f, (snda >> 24) & 0xff,
(val1 >> 8) & 0x3f, (snda >> 16) & 0xff,
(val1 >> 16) & 0x3f, (snda >> 8) & 0xff,
(val1 >> 24) & 0x3f, snda & 0xff);
} else {
val = snd_emu10k1_ptr_read(emu, FXRT, idx);
snd_iprintf(buffer, "Ch%-2i: A=%2i:%02x, B=%2i:%02x, C=%2i:%02x, D=%2i:%02x\n",
idx,
(val >> 16) & 0x0f, REG_VAL_GET(PTRX_FXSENDAMOUNT_A, ptrx),
(val >> 20) & 0x0f, REG_VAL_GET(PTRX_FXSENDAMOUNT_B, ptrx),
(val >> 24) & 0x0f, REG_VAL_GET(PSST_FXSENDAMOUNT_C, psst),
(val >> 28) & 0x0f, REG_VAL_GET(DSL_FXSENDAMOUNT_D, dsl));
}
}
snd_iprintf(buffer, "\nEffect Send Targets:\n");
// Audigy actually has 64, but we don't use them all.
for (idx = 0; idx < 32; idx++) {
const char *c = snd_emu10k1_fxbus[idx];
if (c)
snd_iprintf(buffer, " Channel %02i [%s]\n", idx, c);
}
if (!emu->card_capabilities->emu_model) {
snd_iprintf(buffer, "\nOutput Channels:\n");
for (idx = 0; idx < 32; idx++)
if (outputs[idx] && (extout_mask & (1 << idx)))
snd_iprintf(buffer, " Channel %02i [%s]\n", idx, outputs[idx]);
snd_iprintf(buffer, "\nInput Channels:\n");
for (idx = 0; idx < 16; idx++)
if (inputs[idx] && (extin_mask & (1 << idx)))
snd_iprintf(buffer, " Channel %02i [%s]\n", idx, inputs[idx]);
snd_iprintf(buffer, "\nMultichannel Capture Sources:\n");
for (idx = 0; idx < nefx; idx++)
if (emu->efx_voices_mask[0] & (1 << idx))
snd_iprintf(buffer, " Channel %02i [Output: %s]\n",
idx, outputs[idx] ? outputs[idx] : "???");
if (emu->audigy) {
for (idx = 0; idx < 32; idx++)
if (emu->efx_voices_mask[1] & (1 << idx))
snd_iprintf(buffer, " Channel %02i [Input: %s]\n",
idx + 32, inputs[idx] ? inputs[idx] : "???");
} else {
for (idx = 0; idx < 16; idx++) {
if (emu->efx_voices_mask[0] & ((1 << 16) << idx)) {
if (emu->card_capabilities->sblive51) {
s8 c = snd_emu10k1_sblive51_fxbus2_map[idx];
if (c == -1)
snd_iprintf(buffer, " Channel %02i [Output: %s]\n",
idx + 16, outputs[idx + 16]);
else
snd_iprintf(buffer, " Channel %02i [Input: %s]\n",
idx + 16, inputs[c]);
} else {
snd_iprintf(buffer, " Channel %02i [Input: %s]\n",
idx + 16, inputs[idx] ? inputs[idx] : "???");
}
}
}
}
}
}
static void snd_emu10k1_proc_spdif_read(struct snd_info_entry *entry,
struct snd_info_buffer *buffer)
{
struct snd_emu10k1 *emu = entry->private_data;
u32 value;
u32 value2;
if (emu->card_capabilities->emu_model) {
// This represents the S/PDIF lock status on 0404b, which is
// kinda weird and unhelpful, because monitoring it via IRQ is
// impractical (one gets an IRQ flood as long as it is desynced).
snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &value);
snd_iprintf(buffer, "Lock status 1: %#x\n", value & 0x10);
// Bit 0x1 in LO being 0 is supposedly for ADAT lock.
// The registers are always all zero on 0404b.
snd_emu1010_fpga_read(emu, EMU_HANA_LOCK_STS_LO, &value);
snd_emu1010_fpga_read(emu, EMU_HANA_LOCK_STS_HI, &value2);
snd_iprintf(buffer, "Lock status 2: %#x %#x\n", value, value2);
snd_iprintf(buffer, "S/PDIF rate: %dHz\n",
snd_emu1010_get_raw_rate(emu, EMU_HANA_WCLOCK_HANA_SPDIF_IN));
if (emu->card_capabilities->emu_model != EMU_MODEL_EMU0404) {
snd_iprintf(buffer, "ADAT rate: %dHz\n",
snd_emu1010_get_raw_rate(emu, EMU_HANA_WCLOCK_HANA_ADAT_IN));
snd_iprintf(buffer, "Dock rate: %dHz\n",
snd_emu1010_get_raw_rate(emu, EMU_HANA_WCLOCK_2ND_HANA));
}
if (emu->card_capabilities->emu_model == EMU_MODEL_EMU0404 ||
emu->card_capabilities->emu_model == EMU_MODEL_EMU1010)
snd_iprintf(buffer, "BNC rate: %dHz\n",
snd_emu1010_get_raw_rate(emu, EMU_HANA_WCLOCK_SYNC_BNC));
snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &value);
if (value & EMU_HANA_SPDIF_MODE_RX_INVALID)
snd_iprintf(buffer, "\nS/PDIF input invalid\n");
else
snd_iprintf(buffer, "\nS/PDIF mode: %s%s\n",
value & EMU_HANA_SPDIF_MODE_RX_PRO ? "professional" : "consumer",
value & EMU_HANA_SPDIF_MODE_RX_NOCOPY ? ", no copy" : "");
} else {
snd_emu10k1_proc_spdif_status(emu, buffer, "CD-ROM S/PDIF In", CDCS, CDSRCS);
snd_emu10k1_proc_spdif_status(emu, buffer, "Optical or Coax S/PDIF In", GPSCS, GPSRCS);
}
#if 0
val = snd_emu10k1_ptr_read(emu, ZVSRCS, 0);
snd_iprintf(buffer, "\nZoomed Video\n");
snd_iprintf(buffer, "Rate Locked : %s\n", val & SRCS_RATELOCKED ? "on" : "off");
snd_iprintf(buffer, "Estimated Sample Rate : 0x%x\n", val & SRCS_ESTSAMPLERATE);
#endif
}
static void snd_emu10k1_proc_rates_read(struct snd_info_entry *entry,
struct snd_info_buffer *buffer)
{
static const int samplerate[8] = { 44100, 48000, 96000, 192000, 4, 5, 6, 7 };
struct snd_emu10k1 *emu = entry->private_data;
unsigned int val, tmp, n;
val = snd_emu10k1_ptr20_read(emu, CAPTURE_RATE_STATUS, 0);
for (n = 0; n < 4; n++) {
tmp = val >> (16 + (n*4));
if (tmp & 0x8) snd_iprintf(buffer, "Channel %d: Rate=%d\n", n, samplerate[tmp & 0x7]);
else snd_iprintf(buffer, "Channel %d: No input\n", n);
}
}
struct emu10k1_reg_entry {
unsigned short base, size;
const char *name;
};
static const struct emu10k1_reg_entry sblive_reg_entries[] = {
{ 0, 0x10, "FXBUS" },
{ 0x10, 0x10, "EXTIN" },
{ 0x20, 0x10, "EXTOUT" },
{ 0x30, 0x10, "FXBUS2" },
{ 0x40, 0x20, NULL }, // Constants
{ 0x100, 0x100, "GPR" },
{ 0x200, 0x80, "ITRAM_DATA" },
{ 0x280, 0x20, "ETRAM_DATA" },
{ 0x300, 0x80, "ITRAM_ADDR" },
{ 0x380, 0x20, "ETRAM_ADDR" },
{ 0x400, 0, NULL }
};
static const struct emu10k1_reg_entry audigy_reg_entries[] = {
{ 0, 0x40, "FXBUS" },
{ 0x40, 0x10, "EXTIN" },
{ 0x50, 0x10, "P16VIN" },
{ 0x60, 0x20, "EXTOUT" },
{ 0x80, 0x20, "FXBUS2" },
{ 0xa0, 0x10, "EMU32OUTH" },
{ 0xb0, 0x10, "EMU32OUTL" },
{ 0xc0, 0x20, NULL }, // Constants
// This can't be quite right - overlap.
//{ 0x100, 0xc0, "ITRAM_CTL" },
//{ 0x1c0, 0x40, "ETRAM_CTL" },
{ 0x160, 0x20, "A3_EMU32IN" },
{ 0x1e0, 0x20, "A3_EMU32OUT" },
{ 0x200, 0xc0, "ITRAM_DATA" },
{ 0x2c0, 0x40, "ETRAM_DATA" },
{ 0x300, 0xc0, "ITRAM_ADDR" },
{ 0x3c0, 0x40, "ETRAM_ADDR" },
{ 0x400, 0x200, "GPR" },
{ 0x600, 0, NULL }
};
static const char * const emu10k1_const_entries[] = {
"C_00000000",
"C_00000001",
"C_00000002",
"C_00000003",
"C_00000004",
"C_00000008",
"C_00000010",
"C_00000020",
"C_00000100",
"C_00010000",
"C_00000800",
"C_10000000",
"C_20000000",
"C_40000000",
"C_80000000",
"C_7fffffff",
"C_ffffffff",
"C_fffffffe",
"C_c0000000",
"C_4f1bbcdc",
"C_5a7ef9db",
"C_00100000",
"GPR_ACCU",
"GPR_COND",
"GPR_NOISE0",
"GPR_NOISE1",
"GPR_IRQ",
"GPR_DBAC",
"GPR_DBACE",
"???",
};
static int disasm_emu10k1_reg(char *buffer,
const struct emu10k1_reg_entry *entries,
unsigned reg, const char *pfx)
{
for (int i = 0; ; i++) {
unsigned base = entries[i].base;
unsigned size = entries[i].size;
if (!size)
return sprintf(buffer, "%s0x%03x", pfx, reg);
if (reg >= base && reg < base + size) {
const char *name = entries[i].name;
reg -= base;
if (name)
return sprintf(buffer, "%s%s(%u)", pfx, name, reg);
return sprintf(buffer, "%s%s", pfx, emu10k1_const_entries[reg]);
}
}
}
static int disasm_sblive_reg(char *buffer, unsigned reg, const char *pfx)
{
return disasm_emu10k1_reg(buffer, sblive_reg_entries, reg, pfx);
}
static int disasm_audigy_reg(char *buffer, unsigned reg, const char *pfx)
{
return disasm_emu10k1_reg(buffer, audigy_reg_entries, reg, pfx);
}
static void snd_emu10k1_proc_acode_read(struct snd_info_entry *entry,
struct snd_info_buffer *buffer)
{
u32 pc;
struct snd_emu10k1 *emu = entry->private_data;
static const char * const insns[16] = {
"MAC0", "MAC1", "MAC2", "MAC3", "MACINT0", "MACINT1", "ACC3", "MACMV",
"ANDXOR", "TSTNEG", "LIMITGE", "LIMITLT", "LOG", "EXP", "INTERP", "SKIP",
};
static const char spaces[] = " ";
const int nspaces = sizeof(spaces) - 1;
snd_iprintf(buffer, "FX8010 Instruction List '%s'\n", emu->fx8010.name);
snd_iprintf(buffer, " Code dump :\n");
for (pc = 0; pc < (emu->audigy ? 1024 : 512); pc++) {
u32 low, high;
int len;
char buf[100];
char *bufp = buf;
low = snd_emu10k1_efx_read(emu, pc * 2);
high = snd_emu10k1_efx_read(emu, pc * 2 + 1);
if (emu->audigy) {
bufp += sprintf(bufp, " %-7s ", insns[(high >> 24) & 0x0f]);
bufp += disasm_audigy_reg(bufp, (high >> 12) & 0x7ff, "");
bufp += disasm_audigy_reg(bufp, (high >> 0) & 0x7ff, ", ");
bufp += disasm_audigy_reg(bufp, (low >> 12) & 0x7ff, ", ");
bufp += disasm_audigy_reg(bufp, (low >> 0) & 0x7ff, ", ");
} else {
bufp += sprintf(bufp, " %-7s ", insns[(high >> 20) & 0x0f]);
bufp += disasm_sblive_reg(bufp, (high >> 10) & 0x3ff, "");
bufp += disasm_sblive_reg(bufp, (high >> 0) & 0x3ff, ", ");
bufp += disasm_sblive_reg(bufp, (low >> 10) & 0x3ff, ", ");
bufp += disasm_sblive_reg(bufp, (low >> 0) & 0x3ff, ", ");
}
len = (int)(ptrdiff_t)(bufp - buf);
snd_iprintf(buffer, "%s %s /* 0x%04x: 0x%08x%08x */\n",
buf, &spaces[nspaces - clamp(65 - len, 0, nspaces)],
pc, high, low);
}
}
#define TOTAL_SIZE_GPR (0x100*4)
#define A_TOTAL_SIZE_GPR (0x200*4)
#define TOTAL_SIZE_TANKMEM_DATA (0xa0*4)
#define TOTAL_SIZE_TANKMEM_ADDR (0xa0*4)
#define A_TOTAL_SIZE_TANKMEM_DATA (0x100*4)
#define A_TOTAL_SIZE_TANKMEM_ADDR (0x100*4)
#define TOTAL_SIZE_CODE (0x200*8)
#define A_TOTAL_SIZE_CODE (0x400*8)
static ssize_t snd_emu10k1_fx8010_read(struct snd_info_entry *entry,
void *file_private_data,
struct file *file, char __user *buf,
size_t count, loff_t pos)
{
struct snd_emu10k1 *emu = entry->private_data;
unsigned int offset;
int tram_addr = 0;
unsigned int *tmp;
long res;
unsigned int idx;
if (!strcmp(entry->name, "fx8010_tram_addr")) {
offset = TANKMEMADDRREGBASE;
tram_addr = 1;
} else if (!strcmp(entry->name, "fx8010_tram_data")) {
offset = TANKMEMDATAREGBASE;
} else if (!strcmp(entry->name, "fx8010_code")) {
offset = emu->audigy ? A_MICROCODEBASE : MICROCODEBASE;
} else {
offset = emu->audigy ? A_FXGPREGBASE : FXGPREGBASE;
}
tmp = kmalloc(count + 8, GFP_KERNEL);
if (!tmp)
return -ENOMEM;
for (idx = 0; idx < ((pos & 3) + count + 3) >> 2; idx++) {
unsigned int val;
val = snd_emu10k1_ptr_read(emu, offset + idx + (pos >> 2), 0);
if (tram_addr && emu->audigy) {
val >>= 11;
val |= snd_emu10k1_ptr_read(emu, 0x100 + idx + (pos >> 2), 0) << 20;
}
tmp[idx] = val;
}
if (copy_to_user(buf, ((char *)tmp) + (pos & 3), count))
res = -EFAULT;
else
res = count;
kfree(tmp);
return res;
}
static void snd_emu10k1_proc_voices_read(struct snd_info_entry *entry,
struct snd_info_buffer *buffer)
{
struct snd_emu10k1 *emu = entry->private_data;
struct snd_emu10k1_voice *voice;
int idx;
static const char * const types[] = {
"Unused", "EFX", "EFX IRQ", "PCM", "PCM IRQ", "Synth"
};
static_assert(ARRAY_SIZE(types) == EMU10K1_NUM_TYPES);
snd_iprintf(buffer, "ch\tdirty\tlast\tuse\n");
for (idx = 0; idx < NUM_G; idx++) {
voice = &emu->voices[idx];
snd_iprintf(buffer, "%i\t%u\t%u\t%s\n",
idx,
voice->dirty,
voice->last,
types[voice->use]);
}
}
#ifdef CONFIG_SND_DEBUG
static void snd_emu_proc_emu1010_link_read(struct snd_emu10k1 *emu,
struct snd_info_buffer *buffer,
u32 dst)
{
u32 src = snd_emu1010_fpga_link_dst_src_read(emu, dst);
snd_iprintf(buffer, "%04x: %04x\n", dst, src);
}
static void snd_emu_proc_emu1010_reg_read(struct snd_info_entry *entry,
struct snd_info_buffer *buffer)
{
struct snd_emu10k1 *emu = entry->private_data;
u32 value;
int i;
snd_iprintf(buffer, "EMU1010 Registers:\n\n");
for(i = 0; i < 0x40; i+=1) {
snd_emu1010_fpga_read(emu, i, &value);
snd_iprintf(buffer, "%02x: %02x\n", i, value);
}
snd_iprintf(buffer, "\nEMU1010 Routes:\n\n");
for (i = 0; i < 16; i++) // To Alice2/Tina[2] via EMU32
snd_emu_proc_emu1010_link_read(emu, buffer, i);
if (emu->card_capabilities->emu_model != EMU_MODEL_EMU0404)
for (i = 0; i < 32; i++) // To Dock via EDI
snd_emu_proc_emu1010_link_read(emu, buffer, 0x100 + i);
if (emu->card_capabilities->emu_model != EMU_MODEL_EMU1616)
for (i = 0; i < 8; i++) // To Hamoa/local
snd_emu_proc_emu1010_link_read(emu, buffer, 0x200 + i);
for (i = 0; i < 8; i++) // To Hamoa/Mana/local
snd_emu_proc_emu1010_link_read(emu, buffer, 0x300 + i);
if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1616) {
for (i = 0; i < 16; i++) // To Tina2 via EMU32
snd_emu_proc_emu1010_link_read(emu, buffer, 0x400 + i);
} else if (emu->card_capabilities->emu_model != EMU_MODEL_EMU0404) {
for (i = 0; i < 8; i++) // To Hana ADAT
snd_emu_proc_emu1010_link_read(emu, buffer, 0x400 + i);
if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1010B) {
for (i = 0; i < 16; i++) // To Tina via EMU32
snd_emu_proc_emu1010_link_read(emu, buffer, 0x500 + i);
} else {
// To Alice2 via I2S
snd_emu_proc_emu1010_link_read(emu, buffer, 0x500);
snd_emu_proc_emu1010_link_read(emu, buffer, 0x501);
snd_emu_proc_emu1010_link_read(emu, buffer, 0x600);
snd_emu_proc_emu1010_link_read(emu, buffer, 0x601);
snd_emu_proc_emu1010_link_read(emu, buffer, 0x700);
snd_emu_proc_emu1010_link_read(emu, buffer, 0x701);
}
}
}
static void snd_emu_proc_io_reg_read(struct snd_info_entry *entry,
struct snd_info_buffer *buffer)
{
struct snd_emu10k1 *emu = entry->private_data;
unsigned long value;
int i;
snd_iprintf(buffer, "IO Registers:\n\n");
for(i = 0; i < 0x40; i+=4) {
value = inl(emu->port + i);
snd_iprintf(buffer, "%02X: %08lX\n", i, value);
}
}
static void snd_emu_proc_io_reg_write(struct snd_info_entry *entry,
struct snd_info_buffer *buffer)
{
struct snd_emu10k1 *emu = entry->private_data;
char line[64];
u32 reg, val;
while (!snd_info_get_line(buffer, line, sizeof(line))) {
if (sscanf(line, "%x %x", ®, &val) != 2)
continue;
if (reg < 0x40 && val <= 0xffffffff) {
outl(val, emu->port + (reg & 0xfffffffc));
}
}
}
static unsigned int snd_ptr_read(struct snd_emu10k1 * emu,
unsigned int iobase,
unsigned int reg,
unsigned int chn)
{
unsigned int regptr, val;
regptr = (reg << 16) | chn;
spin_lock_irq(&emu->emu_lock);
outl(regptr, emu->port + iobase + PTR);
val = inl(emu->port + iobase + DATA);
spin_unlock_irq(&emu->emu_lock);
return val;
}
static void snd_ptr_write(struct snd_emu10k1 *emu,
unsigned int iobase,
unsigned int reg,
unsigned int chn,
unsigned int data)
{
unsigned int regptr;
regptr = (reg << 16) | chn;
spin_lock_irq(&emu->emu_lock);
outl(regptr, emu->port + iobase + PTR);
outl(data, emu->port + iobase + DATA);
spin_unlock_irq(&emu->emu_lock);
}
static void snd_emu_proc_ptr_reg_read(struct snd_info_entry *entry,
struct snd_info_buffer *buffer, int iobase, int offset, int length, int voices)
{
struct snd_emu10k1 *emu = entry->private_data;
unsigned long value;
int i,j;
if (offset+length > 0xa0) {
snd_iprintf(buffer, "Input values out of range\n");
return;
}
snd_iprintf(buffer, "Registers 0x%x\n", iobase);
for(i = offset; i < offset+length; i++) {
snd_iprintf(buffer, "%02X: ",i);
for (j = 0; j < voices; j++) {
value = snd_ptr_read(emu, iobase, i, j);
snd_iprintf(buffer, "%08lX ", value);
}
snd_iprintf(buffer, "\n");
}
}
static void snd_emu_proc_ptr_reg_write(struct snd_info_entry *entry,
struct snd_info_buffer *buffer,
int iobase, int length, int voices)
{
struct snd_emu10k1 *emu = entry->private_data;
char line[64];
unsigned int reg, channel_id , val;
while (!snd_info_get_line(buffer, line, sizeof(line))) {
if (sscanf(line, "%x %x %x", ®, &channel_id, &val) != 3)
continue;
if (reg < length && channel_id < voices)
snd_ptr_write(emu, iobase, reg, channel_id, val);
}
}
static void snd_emu_proc_ptr_reg_write00(struct snd_info_entry *entry,
struct snd_info_buffer *buffer)
{
snd_emu_proc_ptr_reg_write(entry, buffer, 0, 0x80, 64);
}
static void snd_emu_proc_ptr_reg_write20(struct snd_info_entry *entry,
struct snd_info_buffer *buffer)
{
struct snd_emu10k1 *emu = entry->private_data;
snd_emu_proc_ptr_reg_write(entry, buffer, 0x20,
emu->card_capabilities->ca0108_chip ? 0xa0 : 0x80, 4);
}
static void snd_emu_proc_ptr_reg_read00a(struct snd_info_entry *entry,
struct snd_info_buffer *buffer)
{
snd_emu_proc_ptr_reg_read(entry, buffer, 0, 0, 0x40, 64);
}
static void snd_emu_proc_ptr_reg_read00b(struct snd_info_entry *entry,
struct snd_info_buffer *buffer)
{
snd_emu_proc_ptr_reg_read(entry, buffer, 0, 0x40, 0x40, 64);
}
static void snd_emu_proc_ptr_reg_read20a(struct snd_info_entry *entry,
struct snd_info_buffer *buffer)
{
snd_emu_proc_ptr_reg_read(entry, buffer, 0x20, 0, 0x40, 4);
}
static void snd_emu_proc_ptr_reg_read20b(struct snd_info_entry *entry,
struct snd_info_buffer *buffer)
{
snd_emu_proc_ptr_reg_read(entry, buffer, 0x20, 0x40, 0x40, 4);
}
static void snd_emu_proc_ptr_reg_read20c(struct snd_info_entry *entry,
struct snd_info_buffer * buffer)
{
snd_emu_proc_ptr_reg_read(entry, buffer, 0x20, 0x80, 0x20, 4);
}
#endif
static const struct snd_info_entry_ops snd_emu10k1_proc_ops_fx8010 = {
.read = snd_emu10k1_fx8010_read,
};
int snd_emu10k1_proc_init(struct snd_emu10k1 *emu)
{
struct snd_info_entry *entry;
#ifdef CONFIG_SND_DEBUG
if (emu->card_capabilities->emu_model) {
snd_card_ro_proc_new(emu->card, "emu1010_regs",
emu, snd_emu_proc_emu1010_reg_read);
}
snd_card_rw_proc_new(emu->card, "io_regs", emu,
snd_emu_proc_io_reg_read,
snd_emu_proc_io_reg_write);
snd_card_rw_proc_new(emu->card, "ptr_regs00a", emu,
snd_emu_proc_ptr_reg_read00a,
snd_emu_proc_ptr_reg_write00);
snd_card_rw_proc_new(emu->card, "ptr_regs00b", emu,
snd_emu_proc_ptr_reg_read00b,
snd_emu_proc_ptr_reg_write00);
if (!emu->card_capabilities->emu_model &&
(emu->card_capabilities->ca0151_chip || emu->card_capabilities->ca0108_chip)) {
snd_card_rw_proc_new(emu->card, "ptr_regs20a", emu,
snd_emu_proc_ptr_reg_read20a,
snd_emu_proc_ptr_reg_write20);
snd_card_rw_proc_new(emu->card, "ptr_regs20b", emu,
snd_emu_proc_ptr_reg_read20b,
snd_emu_proc_ptr_reg_write20);
if (emu->card_capabilities->ca0108_chip)
snd_card_rw_proc_new(emu->card, "ptr_regs20c", emu,
snd_emu_proc_ptr_reg_read20c,
snd_emu_proc_ptr_reg_write20);
}
#endif
snd_card_ro_proc_new(emu->card, "emu10k1", emu, snd_emu10k1_proc_read);
if (emu->card_capabilities->emu10k2_chip)
snd_card_ro_proc_new(emu->card, "spdif-in", emu,
snd_emu10k1_proc_spdif_read);
if (emu->card_capabilities->ca0151_chip)
snd_card_ro_proc_new(emu->card, "capture-rates", emu,
snd_emu10k1_proc_rates_read);
snd_card_ro_proc_new(emu->card, "voices", emu,
snd_emu10k1_proc_voices_read);
if (! snd_card_proc_new(emu->card, "fx8010_gpr", &entry)) {
entry->content = SNDRV_INFO_CONTENT_DATA;
entry->private_data = emu;
entry->mode = S_IFREG | 0444 /*| S_IWUSR*/;
entry->size = emu->audigy ? A_TOTAL_SIZE_GPR : TOTAL_SIZE_GPR;
entry->c.ops = &snd_emu10k1_proc_ops_fx8010;
}
if (! snd_card_proc_new(emu->card, "fx8010_tram_data", &entry)) {
entry->content = SNDRV_INFO_CONTENT_DATA;
entry->private_data = emu;
entry->mode = S_IFREG | 0444 /*| S_IWUSR*/;
entry->size = emu->audigy ? A_TOTAL_SIZE_TANKMEM_DATA : TOTAL_SIZE_TANKMEM_DATA ;
entry->c.ops = &snd_emu10k1_proc_ops_fx8010;
}
if (! snd_card_proc_new(emu->card, "fx8010_tram_addr", &entry)) {
entry->content = SNDRV_INFO_CONTENT_DATA;
entry->private_data = emu;
entry->mode = S_IFREG | 0444 /*| S_IWUSR*/;
entry->size = emu->audigy ? A_TOTAL_SIZE_TANKMEM_ADDR : TOTAL_SIZE_TANKMEM_ADDR ;
entry->c.ops = &snd_emu10k1_proc_ops_fx8010;
}
if (! snd_card_proc_new(emu->card, "fx8010_code", &entry)) {
entry->content = SNDRV_INFO_CONTENT_DATA;
entry->private_data = emu;
entry->mode = S_IFREG | 0444 /*| S_IWUSR*/;
entry->size = emu->audigy ? A_TOTAL_SIZE_CODE : TOTAL_SIZE_CODE;
entry->c.ops = &snd_emu10k1_proc_ops_fx8010;
}
snd_card_ro_proc_new(emu->card, "fx8010_acode", emu,
snd_emu10k1_proc_acode_read);
return 0;
}
| linux-master | sound/pci/emu10k1/emuproc.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (c) by Jaroslav Kysela <[email protected]>
* James Courtier-Dutton <[email protected]>
* Oswald Buddenhagen <[email protected]>
* Creative Labs, Inc.
*
* Routines for effect processor FX8010
*/
#include <linux/pci.h>
#include <linux/capability.h>
#include <linux/delay.h>
#include <linux/slab.h>
#include <linux/vmalloc.h>
#include <linux/init.h>
#include <linux/mutex.h>
#include <linux/moduleparam.h>
#include <linux/nospec.h>
#include <sound/core.h>
#include <sound/tlv.h>
#include <sound/emu10k1.h>
#if 0 /* for testing purposes - digital out -> capture */
#define EMU10K1_CAPTURE_DIGITAL_OUT
#endif
#if 0 /* for testing purposes - set S/PDIF to AC3 output */
#define EMU10K1_SET_AC3_IEC958
#endif
#if 0 /* for testing purposes - feed the front signal to Center/LFE outputs */
#define EMU10K1_CENTER_LFE_FROM_FRONT
#endif
static bool high_res_gpr_volume;
module_param(high_res_gpr_volume, bool, 0444);
MODULE_PARM_DESC(high_res_gpr_volume, "GPR mixer controls use 31-bit range.");
/*
* Tables
*/
// Playback channel labels; corresponds with the public FXBUS_* defines.
// Unlike the tables below, this is not determined by the hardware.
const char * const snd_emu10k1_fxbus[32] = {
/* 0x00 */ "PCM Left",
/* 0x01 */ "PCM Right",
/* 0x02 */ "PCM Rear Left",
/* 0x03 */ "PCM Rear Right",
/* 0x04 */ "MIDI Left",
/* 0x05 */ "MIDI Right",
/* 0x06 */ "PCM Center",
/* 0x07 */ "PCM LFE",
/* 0x08 */ "PCM Front Left",
/* 0x09 */ "PCM Front Right",
/* 0x0a */ NULL,
/* 0x0b */ NULL,
/* 0x0c */ "MIDI Reverb",
/* 0x0d */ "MIDI Chorus",
/* 0x0e */ "PCM Side Left",
/* 0x0f */ "PCM Side Right",
/* 0x10 */ NULL,
/* 0x11 */ NULL,
/* 0x12 */ NULL,
/* 0x13 */ NULL,
/* 0x14 */ "Passthrough Left",
/* 0x15 */ "Passthrough Right",
/* 0x16 */ NULL,
/* 0x17 */ NULL,
/* 0x18 */ NULL,
/* 0x19 */ NULL,
/* 0x1a */ NULL,
/* 0x1b */ NULL,
/* 0x1c */ NULL,
/* 0x1d */ NULL,
/* 0x1e */ NULL,
/* 0x1f */ NULL
};
// Physical inputs; corresponds with the public EXTIN_* defines.
const char * const snd_emu10k1_sblive_ins[16] = {
/* 0x00 */ "AC97 Left",
/* 0x01 */ "AC97 Right",
/* 0x02 */ "TTL IEC958 Left",
/* 0x03 */ "TTL IEC958 Right",
/* 0x04 */ "Zoom Video Left",
/* 0x05 */ "Zoom Video Right",
/* 0x06 */ "Optical IEC958 Left",
/* 0x07 */ "Optical IEC958 Right",
/* 0x08 */ "Line/Mic 1 Left",
/* 0x09 */ "Line/Mic 1 Right",
/* 0x0a */ "Coaxial IEC958 Left",
/* 0x0b */ "Coaxial IEC958 Right",
/* 0x0c */ "Line/Mic 2 Left",
/* 0x0d */ "Line/Mic 2 Right",
/* 0x0e */ NULL,
/* 0x0f */ NULL
};
// Physical inputs; corresponds with the public A_EXTIN_* defines.
const char * const snd_emu10k1_audigy_ins[16] = {
/* 0x00 */ "AC97 Left",
/* 0x01 */ "AC97 Right",
/* 0x02 */ "Audigy CD Left",
/* 0x03 */ "Audigy CD Right",
/* 0x04 */ "Optical IEC958 Left",
/* 0x05 */ "Optical IEC958 Right",
/* 0x06 */ NULL,
/* 0x07 */ NULL,
/* 0x08 */ "Line/Mic 2 Left",
/* 0x09 */ "Line/Mic 2 Right",
/* 0x0a */ "SPDIF Left",
/* 0x0b */ "SPDIF Right",
/* 0x0c */ "Aux2 Left",
/* 0x0d */ "Aux2 Right",
/* 0x0e */ NULL,
/* 0x0f */ NULL
};
// Physical outputs; corresponds with the public EXTOUT_* defines.
const char * const snd_emu10k1_sblive_outs[32] = {
/* 0x00 */ "AC97 Left",
/* 0x01 */ "AC97 Right",
/* 0x02 */ "Optical IEC958 Left",
/* 0x03 */ "Optical IEC958 Right",
/* 0x04 */ "Center",
/* 0x05 */ "LFE",
/* 0x06 */ "Headphone Left",
/* 0x07 */ "Headphone Right",
/* 0x08 */ "Surround Left",
/* 0x09 */ "Surround Right",
/* 0x0a */ "PCM Capture Left",
/* 0x0b */ "PCM Capture Right",
/* 0x0c */ "MIC Capture",
/* 0x0d */ "AC97 Surround Left",
/* 0x0e */ "AC97 Surround Right",
/* 0x0f */ NULL,
// This is actually the FXBUS2 range; SB Live! 5.1 only.
/* 0x10 */ NULL,
/* 0x11 */ "Analog Center",
/* 0x12 */ "Analog LFE",
/* 0x13 */ NULL,
/* 0x14 */ NULL,
/* 0x15 */ NULL,
/* 0x16 */ NULL,
/* 0x17 */ NULL,
/* 0x18 */ NULL,
/* 0x19 */ NULL,
/* 0x1a */ NULL,
/* 0x1b */ NULL,
/* 0x1c */ NULL,
/* 0x1d */ NULL,
/* 0x1e */ NULL,
/* 0x1f */ NULL,
};
// Physical outputs; corresponds with the public A_EXTOUT_* defines.
const char * const snd_emu10k1_audigy_outs[32] = {
/* 0x00 */ "Digital Front Left",
/* 0x01 */ "Digital Front Right",
/* 0x02 */ "Digital Center",
/* 0x03 */ "Digital LEF",
/* 0x04 */ "Headphone Left",
/* 0x05 */ "Headphone Right",
/* 0x06 */ "Digital Rear Left",
/* 0x07 */ "Digital Rear Right",
/* 0x08 */ "Front Left",
/* 0x09 */ "Front Right",
/* 0x0a */ "Center",
/* 0x0b */ "LFE",
/* 0x0c */ NULL,
/* 0x0d */ NULL,
/* 0x0e */ "Rear Left",
/* 0x0f */ "Rear Right",
/* 0x10 */ "AC97 Front Left",
/* 0x11 */ "AC97 Front Right",
/* 0x12 */ "ADC Capture Left",
/* 0x13 */ "ADC Capture Right",
/* 0x14 */ NULL,
/* 0x15 */ NULL,
/* 0x16 */ NULL,
/* 0x17 */ NULL,
/* 0x18 */ NULL,
/* 0x19 */ NULL,
/* 0x1a */ NULL,
/* 0x1b */ NULL,
/* 0x1c */ NULL,
/* 0x1d */ NULL,
/* 0x1e */ NULL,
/* 0x1f */ NULL,
};
// On the SB Live! 5.1, FXBUS2[1] and FXBUS2[2] are occupied by EXTOUT_ACENTER
// and EXTOUT_ALFE, so we can't connect inputs to them for multitrack recording.
//
// Since only 14 of the 16 EXTINs are used, this is not a big problem.
// We route AC97 to FX capture 14 and 15, SPDIF_CD to FX capture 0 and 3,
// and the rest of the EXTINs to the corresponding FX capture channel.
// Multitrack recorders will still see the center/LFE output signal
// on the second and third "input" channel.
const s8 snd_emu10k1_sblive51_fxbus2_map[16] = {
2, -1, -1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 0, 1
};
static const u32 bass_table[41][5] = {
{ 0x3e4f844f, 0x84ed4cc3, 0x3cc69927, 0x7b03553a, 0xc4da8486 },
{ 0x3e69a17a, 0x84c280fb, 0x3cd77cd4, 0x7b2f2a6f, 0xc4b08d1d },
{ 0x3e82ff42, 0x849991d5, 0x3ce7466b, 0x7b5917c6, 0xc48863ee },
{ 0x3e9bab3c, 0x847267f0, 0x3cf5ffe8, 0x7b813560, 0xc461f22c },
{ 0x3eb3b275, 0x844ced29, 0x3d03b295, 0x7ba79a1c, 0xc43d223b },
{ 0x3ecb2174, 0x84290c8b, 0x3d106714, 0x7bcc5ba3, 0xc419dfa5 },
{ 0x3ee2044b, 0x8406b244, 0x3d1c2561, 0x7bef8e77, 0xc3f8170f },
{ 0x3ef86698, 0x83e5cb96, 0x3d26f4d8, 0x7c114600, 0xc3d7b625 },
{ 0x3f0e5390, 0x83c646c9, 0x3d30dc39, 0x7c319498, 0xc3b8ab97 },
{ 0x3f23d60b, 0x83a81321, 0x3d39e1af, 0x7c508b9c, 0xc39ae704 },
{ 0x3f38f884, 0x838b20d2, 0x3d420ad2, 0x7c6e3b75, 0xc37e58f1 },
{ 0x3f4dc52c, 0x836f60ef, 0x3d495cab, 0x7c8ab3a6, 0xc362f2be },
{ 0x3f6245e8, 0x8354c565, 0x3d4fdbb8, 0x7ca602d6, 0xc348a69b },
{ 0x3f76845f, 0x833b40ec, 0x3d558bf0, 0x7cc036df, 0xc32f677c },
{ 0x3f8a8a03, 0x8322c6fb, 0x3d5a70c4, 0x7cd95cd7, 0xc317290b },
{ 0x3f9e6014, 0x830b4bc3, 0x3d5e8d25, 0x7cf1811a, 0xc2ffdfa5 },
{ 0x3fb20fae, 0x82f4c420, 0x3d61e37f, 0x7d08af56, 0xc2e9804a },
{ 0x3fc5a1cc, 0x82df2592, 0x3d6475c3, 0x7d1ef294, 0xc2d40096 },
{ 0x3fd91f55, 0x82ca6632, 0x3d664564, 0x7d345541, 0xc2bf56b9 },
{ 0x3fec9120, 0x82b67cac, 0x3d675356, 0x7d48e138, 0xc2ab796e },
{ 0x40000000, 0x82a36037, 0x3d67a012, 0x7d5c9fc9, 0xc2985fee },
{ 0x401374c7, 0x8291088a, 0x3d672b93, 0x7d6f99c3, 0xc28601f2 },
{ 0x4026f857, 0x827f6dd7, 0x3d65f559, 0x7d81d77c, 0xc27457a3 },
{ 0x403a939f, 0x826e88c5, 0x3d63fc63, 0x7d9360d4, 0xc2635996 },
{ 0x404e4faf, 0x825e5266, 0x3d613f32, 0x7da43d42, 0xc25300c6 },
{ 0x406235ba, 0x824ec434, 0x3d5dbbc3, 0x7db473d7, 0xc243468e },
{ 0x40764f1f, 0x823fd80c, 0x3d596f8f, 0x7dc40b44, 0xc23424a2 },
{ 0x408aa576, 0x82318824, 0x3d545787, 0x7dd309e2, 0xc2259509 },
{ 0x409f4296, 0x8223cf0b, 0x3d4e7012, 0x7de175b5, 0xc2179218 },
{ 0x40b430a0, 0x8216a7a1, 0x3d47b505, 0x7def5475, 0xc20a1670 },
{ 0x40c97a0a, 0x820a0d12, 0x3d4021a1, 0x7dfcab8d, 0xc1fd1cf5 },
{ 0x40df29a6, 0x81fdfad6, 0x3d37b08d, 0x7e098028, 0xc1f0a0ca },
{ 0x40f54ab1, 0x81f26ca9, 0x3d2e5bd1, 0x7e15d72b, 0xc1e49d52 },
{ 0x410be8da, 0x81e75e89, 0x3d241cce, 0x7e21b544, 0xc1d90e24 },
{ 0x41231051, 0x81dcccb3, 0x3d18ec37, 0x7e2d1ee6, 0xc1cdef10 },
{ 0x413acdd0, 0x81d2b39e, 0x3d0cc20a, 0x7e38184e, 0xc1c33c13 },
{ 0x41532ea7, 0x81c90ffb, 0x3cff9585, 0x7e42a58b, 0xc1b8f15a },
{ 0x416c40cd, 0x81bfdeb2, 0x3cf15d21, 0x7e4cca7c, 0xc1af0b3f },
{ 0x418612ea, 0x81b71cdc, 0x3ce20e85, 0x7e568ad3, 0xc1a58640 },
{ 0x41a0b465, 0x81aec7c5, 0x3cd19e7c, 0x7e5fea1e, 0xc19c5f03 },
{ 0x41bc3573, 0x81a6dcea, 0x3cc000e9, 0x7e68ebc2, 0xc1939250 }
};
static const u32 treble_table[41][5] = {
{ 0x0125cba9, 0xfed5debd, 0x00599b6c, 0x0d2506da, 0xfa85b354 },
{ 0x0142f67e, 0xfeb03163, 0x0066cd0f, 0x0d14c69d, 0xfa914473 },
{ 0x016328bd, 0xfe860158, 0x0075b7f2, 0x0d03eb27, 0xfa9d32d2 },
{ 0x0186b438, 0xfe56c982, 0x00869234, 0x0cf27048, 0xfaa97fca },
{ 0x01adf358, 0xfe21f5fe, 0x00999842, 0x0ce051c2, 0xfab62ca5 },
{ 0x01d949fa, 0xfde6e287, 0x00af0d8d, 0x0ccd8b4a, 0xfac33aa7 },
{ 0x02092669, 0xfda4d8bf, 0x00c73d4c, 0x0cba1884, 0xfad0ab07 },
{ 0x023e0268, 0xfd5b0e4a, 0x00e27b54, 0x0ca5f509, 0xfade7ef2 },
{ 0x0278645c, 0xfd08a2b0, 0x01012509, 0x0c911c63, 0xfaecb788 },
{ 0x02b8e091, 0xfcac9d1a, 0x0123a262, 0x0c7b8a14, 0xfafb55df },
{ 0x03001a9a, 0xfc45e9ce, 0x014a6709, 0x0c65398f, 0xfb0a5aff },
{ 0x034ec6d7, 0xfbd3576b, 0x0175f397, 0x0c4e2643, 0xfb19c7e4 },
{ 0x03a5ac15, 0xfb5393ee, 0x01a6d6ed, 0x0c364b94, 0xfb299d7c },
{ 0x0405a562, 0xfac52968, 0x01ddafae, 0x0c1da4e2, 0xfb39dca5 },
{ 0x046fa3fe, 0xfa267a66, 0x021b2ddd, 0x0c042d8d, 0xfb4a8631 },
{ 0x04e4b17f, 0xf975be0f, 0x0260149f, 0x0be9e0f2, 0xfb5b9ae0 },
{ 0x0565f220, 0xf8b0fbe5, 0x02ad3c29, 0x0bceba73, 0xfb6d1b60 },
{ 0x05f4a745, 0xf7d60722, 0x030393d4, 0x0bb2b578, 0xfb7f084d },
{ 0x06923236, 0xf6e279bd, 0x03642465, 0x0b95cd75, 0xfb916233 },
{ 0x07401713, 0xf5d3aef9, 0x03d01283, 0x0b77fded, 0xfba42984 },
{ 0x08000000, 0xf4a6bd88, 0x0448a161, 0x0b594278, 0xfbb75e9f },
{ 0x08d3c097, 0xf3587131, 0x04cf35a4, 0x0b3996c9, 0xfbcb01cb },
{ 0x09bd59a2, 0xf1e543f9, 0x05655880, 0x0b18f6b2, 0xfbdf1333 },
{ 0x0abefd0f, 0xf04956ca, 0x060cbb12, 0x0af75e2c, 0xfbf392e8 },
{ 0x0bdb123e, 0xee806984, 0x06c739fe, 0x0ad4c962, 0xfc0880dd },
{ 0x0d143a94, 0xec85d287, 0x0796e150, 0x0ab134b0, 0xfc1ddce5 },
{ 0x0e6d5664, 0xea547598, 0x087df0a0, 0x0a8c9cb6, 0xfc33a6ad },
{ 0x0fe98a2a, 0xe7e6ba35, 0x097edf83, 0x0a66fe5b, 0xfc49ddc2 },
{ 0x118c4421, 0xe536813a, 0x0a9c6248, 0x0a4056d7, 0xfc608185 },
{ 0x1359422e, 0xe23d19eb, 0x0bd96efb, 0x0a18a3bf, 0xfc77912c },
{ 0x1554982b, 0xdef33645, 0x0d3942bd, 0x09efe312, 0xfc8f0bc1 },
{ 0x1782b68a, 0xdb50deb1, 0x0ebf676d, 0x09c6133f, 0xfca6f019 },
{ 0x19e8715d, 0xd74d64fd, 0x106fb999, 0x099b3337, 0xfcbf3cd6 },
{ 0x1c8b07b8, 0xd2df56ab, 0x124e6ec8, 0x096f4274, 0xfcd7f060 },
{ 0x1f702b6d, 0xcdfc6e92, 0x14601c10, 0x0942410b, 0xfcf108e5 },
{ 0x229e0933, 0xc89985cd, 0x16a9bcfa, 0x09142fb5, 0xfd0a8451 },
{ 0x261b5118, 0xc2aa8409, 0x1930bab6, 0x08e50fdc, 0xfd24604d },
{ 0x29ef3f5d, 0xbc224f28, 0x1bfaf396, 0x08b4e3aa, 0xfd3e9a3b },
{ 0x2e21a59b, 0xb4f2ba46, 0x1f0ec2d6, 0x0883ae15, 0xfd592f33 },
{ 0x32baf44b, 0xad0c7429, 0x227308a3, 0x085172eb, 0xfd741bfd },
{ 0x37c4448b, 0xa45ef51d, 0x262f3267, 0x081e36dc, 0xfd8f5d14 }
};
/* dB gain = (float) 20 * log10( float(db_table_value) / 0x8000000 ) */
static const u32 db_table[101] = {
0x00000000, 0x01571f82, 0x01674b41, 0x01783a1b, 0x0189f540,
0x019c8651, 0x01aff763, 0x01c45306, 0x01d9a446, 0x01eff6b8,
0x0207567a, 0x021fd03d, 0x0239714c, 0x02544792, 0x027061a1,
0x028dcebb, 0x02ac9edc, 0x02cce2bf, 0x02eeabe8, 0x03120cb0,
0x0337184e, 0x035de2df, 0x03868173, 0x03b10a18, 0x03dd93e9,
0x040c3713, 0x043d0cea, 0x04702ff3, 0x04a5bbf2, 0x04ddcdfb,
0x0518847f, 0x0555ff62, 0x05966005, 0x05d9c95d, 0x06206005,
0x066a4a52, 0x06b7b067, 0x0708bc4c, 0x075d9a01, 0x07b6779d,
0x08138561, 0x0874f5d5, 0x08dafde1, 0x0945d4ed, 0x09b5b4fd,
0x0a2adad1, 0x0aa58605, 0x0b25f936, 0x0bac7a24, 0x0c3951d8,
0x0ccccccc, 0x0d673b17, 0x0e08f093, 0x0eb24510, 0x0f639481,
0x101d3f2d, 0x10dfa9e6, 0x11ab3e3f, 0x12806ac3, 0x135fa333,
0x144960c5, 0x153e2266, 0x163e6cfe, 0x174acbb7, 0x1863d04d,
0x198a1357, 0x1abe349f, 0x1c00db77, 0x1d52b712, 0x1eb47ee6,
0x2026f30f, 0x21aadcb6, 0x23410e7e, 0x24ea64f9, 0x26a7c71d,
0x287a26c4, 0x2a62812c, 0x2c61df84, 0x2e795779, 0x30aa0bcf,
0x32f52cfe, 0x355bf9d8, 0x37dfc033, 0x3a81dda4, 0x3d43c038,
0x4026e73c, 0x432ce40f, 0x46575af8, 0x49a8040f, 0x4d20ac2a,
0x50c335d3, 0x54919a57, 0x588dead1, 0x5cba514a, 0x611911ea,
0x65ac8c2f, 0x6a773c39, 0x6f7bbc23, 0x74bcc56c, 0x7a3d3272,
0x7fffffff,
};
/* EMU10k1/EMU10k2 DSP control db gain */
static const DECLARE_TLV_DB_SCALE(snd_emu10k1_db_scale1, -4000, 40, 1);
static const DECLARE_TLV_DB_LINEAR(snd_emu10k1_db_linear, TLV_DB_GAIN_MUTE, 0);
/* EMU10K1 bass/treble db gain */
static const DECLARE_TLV_DB_SCALE(snd_emu10k1_bass_treble_db_scale, -1200, 60, 0);
static const u32 onoff_table[2] = {
0x00000000, 0x00000001
};
/*
* controls
*/
static int snd_emu10k1_gpr_ctl_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
struct snd_emu10k1_fx8010_ctl *ctl =
(struct snd_emu10k1_fx8010_ctl *) kcontrol->private_value;
if (ctl->min == 0 && ctl->max == 1)
uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
else
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = ctl->vcount;
uinfo->value.integer.min = ctl->min;
uinfo->value.integer.max = ctl->max;
return 0;
}
static int snd_emu10k1_gpr_ctl_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1_fx8010_ctl *ctl =
(struct snd_emu10k1_fx8010_ctl *) kcontrol->private_value;
unsigned int i;
for (i = 0; i < ctl->vcount; i++)
ucontrol->value.integer.value[i] = ctl->value[i];
return 0;
}
static int snd_emu10k1_gpr_ctl_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
struct snd_emu10k1_fx8010_ctl *ctl =
(struct snd_emu10k1_fx8010_ctl *) kcontrol->private_value;
int nval, val;
unsigned int i, j;
int change = 0;
for (i = 0; i < ctl->vcount; i++) {
nval = ucontrol->value.integer.value[i];
if (nval < ctl->min)
nval = ctl->min;
if (nval > ctl->max)
nval = ctl->max;
if (nval != ctl->value[i])
change = 1;
val = ctl->value[i] = nval;
switch (ctl->translation) {
case EMU10K1_GPR_TRANSLATION_NONE:
snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[i], 0, val);
break;
case EMU10K1_GPR_TRANSLATION_NEGATE:
snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[i], 0, ~val);
break;
case EMU10K1_GPR_TRANSLATION_TABLE100:
snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[i], 0, db_table[val]);
break;
case EMU10K1_GPR_TRANSLATION_NEG_TABLE100:
snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[i], 0,
val == 100 ? 0x80000000 : -(int)db_table[val]);
break;
case EMU10K1_GPR_TRANSLATION_BASS:
if ((ctl->count % 5) != 0 || (ctl->count / 5) != ctl->vcount) {
change = -EIO;
goto __error;
}
for (j = 0; j < 5; j++)
snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[j * ctl->vcount + i], 0, bass_table[val][j]);
break;
case EMU10K1_GPR_TRANSLATION_TREBLE:
if ((ctl->count % 5) != 0 || (ctl->count / 5) != ctl->vcount) {
change = -EIO;
goto __error;
}
for (j = 0; j < 5; j++)
snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[j * ctl->vcount + i], 0, treble_table[val][j]);
break;
case EMU10K1_GPR_TRANSLATION_ONOFF:
snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[i], 0, onoff_table[val]);
break;
}
}
__error:
return change;
}
/*
* Interrupt handler
*/
static void snd_emu10k1_fx8010_interrupt(struct snd_emu10k1 *emu)
{
struct snd_emu10k1_fx8010_irq *irq, *nirq;
irq = emu->fx8010.irq_handlers;
while (irq) {
nirq = irq->next; /* irq ptr can be removed from list */
if (snd_emu10k1_ptr_read(emu, emu->gpr_base + irq->gpr_running, 0) & 0xffff0000) {
if (irq->handler)
irq->handler(emu, irq->private_data);
snd_emu10k1_ptr_write(emu, emu->gpr_base + irq->gpr_running, 0, 1);
}
irq = nirq;
}
}
int snd_emu10k1_fx8010_register_irq_handler(struct snd_emu10k1 *emu,
snd_fx8010_irq_handler_t *handler,
unsigned char gpr_running,
void *private_data,
struct snd_emu10k1_fx8010_irq *irq)
{
unsigned long flags;
irq->handler = handler;
irq->gpr_running = gpr_running;
irq->private_data = private_data;
irq->next = NULL;
spin_lock_irqsave(&emu->fx8010.irq_lock, flags);
if (emu->fx8010.irq_handlers == NULL) {
emu->fx8010.irq_handlers = irq;
emu->dsp_interrupt = snd_emu10k1_fx8010_interrupt;
snd_emu10k1_intr_enable(emu, INTE_FXDSPENABLE);
} else {
irq->next = emu->fx8010.irq_handlers;
emu->fx8010.irq_handlers = irq;
}
spin_unlock_irqrestore(&emu->fx8010.irq_lock, flags);
return 0;
}
int snd_emu10k1_fx8010_unregister_irq_handler(struct snd_emu10k1 *emu,
struct snd_emu10k1_fx8010_irq *irq)
{
struct snd_emu10k1_fx8010_irq *tmp;
unsigned long flags;
spin_lock_irqsave(&emu->fx8010.irq_lock, flags);
tmp = emu->fx8010.irq_handlers;
if (tmp == irq) {
emu->fx8010.irq_handlers = tmp->next;
if (emu->fx8010.irq_handlers == NULL) {
snd_emu10k1_intr_disable(emu, INTE_FXDSPENABLE);
emu->dsp_interrupt = NULL;
}
} else {
while (tmp && tmp->next != irq)
tmp = tmp->next;
if (tmp)
tmp->next = tmp->next->next;
}
spin_unlock_irqrestore(&emu->fx8010.irq_lock, flags);
return 0;
}
/*************************************************************************
* EMU10K1 effect manager
*************************************************************************/
static void snd_emu10k1_write_op(struct snd_emu10k1_fx8010_code *icode,
unsigned int *ptr,
u32 op, u32 r, u32 a, u32 x, u32 y)
{
u_int32_t *code;
if (snd_BUG_ON(*ptr >= 512))
return;
code = icode->code + (*ptr) * 2;
set_bit(*ptr, icode->code_valid);
code[0] = ((x & 0x3ff) << 10) | (y & 0x3ff);
code[1] = ((op & 0x0f) << 20) | ((r & 0x3ff) << 10) | (a & 0x3ff);
(*ptr)++;
}
#define OP(icode, ptr, op, r, a, x, y) \
snd_emu10k1_write_op(icode, ptr, op, r, a, x, y)
static void snd_emu10k1_audigy_write_op(struct snd_emu10k1_fx8010_code *icode,
unsigned int *ptr,
u32 op, u32 r, u32 a, u32 x, u32 y)
{
u_int32_t *code;
if (snd_BUG_ON(*ptr >= 1024))
return;
code = icode->code + (*ptr) * 2;
set_bit(*ptr, icode->code_valid);
code[0] = ((x & 0x7ff) << 12) | (y & 0x7ff);
code[1] = ((op & 0x0f) << 24) | ((r & 0x7ff) << 12) | (a & 0x7ff);
(*ptr)++;
}
#define A_OP(icode, ptr, op, r, a, x, y) \
snd_emu10k1_audigy_write_op(icode, ptr, op, r, a, x, y)
static void snd_emu10k1_efx_write(struct snd_emu10k1 *emu, unsigned int pc, unsigned int data)
{
pc += emu->audigy ? A_MICROCODEBASE : MICROCODEBASE;
snd_emu10k1_ptr_write(emu, pc, 0, data);
}
unsigned int snd_emu10k1_efx_read(struct snd_emu10k1 *emu, unsigned int pc)
{
pc += emu->audigy ? A_MICROCODEBASE : MICROCODEBASE;
return snd_emu10k1_ptr_read(emu, pc, 0);
}
static int snd_emu10k1_gpr_poke(struct snd_emu10k1 *emu,
struct snd_emu10k1_fx8010_code *icode,
bool in_kernel)
{
int gpr;
u32 val;
for (gpr = 0; gpr < (emu->audigy ? 0x200 : 0x100); gpr++) {
if (!test_bit(gpr, icode->gpr_valid))
continue;
if (in_kernel)
val = icode->gpr_map[gpr];
else if (get_user(val, (__user u32 *)&icode->gpr_map[gpr]))
return -EFAULT;
snd_emu10k1_ptr_write(emu, emu->gpr_base + gpr, 0, val);
}
return 0;
}
static int snd_emu10k1_gpr_peek(struct snd_emu10k1 *emu,
struct snd_emu10k1_fx8010_code *icode)
{
int gpr;
u32 val;
for (gpr = 0; gpr < (emu->audigy ? 0x200 : 0x100); gpr++) {
set_bit(gpr, icode->gpr_valid);
val = snd_emu10k1_ptr_read(emu, emu->gpr_base + gpr, 0);
if (put_user(val, (__user u32 *)&icode->gpr_map[gpr]))
return -EFAULT;
}
return 0;
}
static int snd_emu10k1_tram_poke(struct snd_emu10k1 *emu,
struct snd_emu10k1_fx8010_code *icode,
bool in_kernel)
{
int tram;
u32 addr, val;
for (tram = 0; tram < (emu->audigy ? 0x100 : 0xa0); tram++) {
if (!test_bit(tram, icode->tram_valid))
continue;
if (in_kernel) {
val = icode->tram_data_map[tram];
addr = icode->tram_addr_map[tram];
} else {
if (get_user(val, (__user __u32 *)&icode->tram_data_map[tram]) ||
get_user(addr, (__user __u32 *)&icode->tram_addr_map[tram]))
return -EFAULT;
}
snd_emu10k1_ptr_write(emu, TANKMEMDATAREGBASE + tram, 0, val);
if (!emu->audigy) {
snd_emu10k1_ptr_write(emu, TANKMEMADDRREGBASE + tram, 0, addr);
} else {
snd_emu10k1_ptr_write(emu, TANKMEMADDRREGBASE + tram, 0, addr << 12);
snd_emu10k1_ptr_write(emu, A_TANKMEMCTLREGBASE + tram, 0, addr >> 20);
}
}
return 0;
}
static int snd_emu10k1_tram_peek(struct snd_emu10k1 *emu,
struct snd_emu10k1_fx8010_code *icode)
{
int tram;
u32 val, addr;
memset(icode->tram_valid, 0, sizeof(icode->tram_valid));
for (tram = 0; tram < (emu->audigy ? 0x100 : 0xa0); tram++) {
set_bit(tram, icode->tram_valid);
val = snd_emu10k1_ptr_read(emu, TANKMEMDATAREGBASE + tram, 0);
if (!emu->audigy) {
addr = snd_emu10k1_ptr_read(emu, TANKMEMADDRREGBASE + tram, 0);
} else {
addr = snd_emu10k1_ptr_read(emu, TANKMEMADDRREGBASE + tram, 0) >> 12;
addr |= snd_emu10k1_ptr_read(emu, A_TANKMEMCTLREGBASE + tram, 0) << 20;
}
if (put_user(val, (__user u32 *)&icode->tram_data_map[tram]) ||
put_user(addr, (__user u32 *)&icode->tram_addr_map[tram]))
return -EFAULT;
}
return 0;
}
static int snd_emu10k1_code_poke(struct snd_emu10k1 *emu,
struct snd_emu10k1_fx8010_code *icode,
bool in_kernel)
{
u32 pc, lo, hi;
for (pc = 0; pc < (emu->audigy ? 2*1024 : 2*512); pc += 2) {
if (!test_bit(pc / 2, icode->code_valid))
continue;
if (in_kernel) {
lo = icode->code[pc + 0];
hi = icode->code[pc + 1];
} else {
if (get_user(lo, (__user u32 *)&icode->code[pc + 0]) ||
get_user(hi, (__user u32 *)&icode->code[pc + 1]))
return -EFAULT;
}
snd_emu10k1_efx_write(emu, pc + 0, lo);
snd_emu10k1_efx_write(emu, pc + 1, hi);
}
return 0;
}
static int snd_emu10k1_code_peek(struct snd_emu10k1 *emu,
struct snd_emu10k1_fx8010_code *icode)
{
u32 pc;
memset(icode->code_valid, 0, sizeof(icode->code_valid));
for (pc = 0; pc < (emu->audigy ? 2*1024 : 2*512); pc += 2) {
set_bit(pc / 2, icode->code_valid);
if (put_user(snd_emu10k1_efx_read(emu, pc + 0),
(__user u32 *)&icode->code[pc + 0]))
return -EFAULT;
if (put_user(snd_emu10k1_efx_read(emu, pc + 1),
(__user u32 *)&icode->code[pc + 1]))
return -EFAULT;
}
return 0;
}
static struct snd_emu10k1_fx8010_ctl *
snd_emu10k1_look_for_ctl(struct snd_emu10k1 *emu,
struct emu10k1_ctl_elem_id *_id)
{
struct snd_ctl_elem_id *id = (struct snd_ctl_elem_id *)_id;
struct snd_emu10k1_fx8010_ctl *ctl;
struct snd_kcontrol *kcontrol;
list_for_each_entry(ctl, &emu->fx8010.gpr_ctl, list) {
kcontrol = ctl->kcontrol;
if (kcontrol->id.iface == id->iface &&
kcontrol->id.index == id->index &&
!strcmp(kcontrol->id.name, id->name))
return ctl;
}
return NULL;
}
#define MAX_TLV_SIZE 256
static unsigned int *copy_tlv(const unsigned int __user *_tlv, bool in_kernel)
{
unsigned int data[2];
unsigned int *tlv;
if (!_tlv)
return NULL;
if (in_kernel)
memcpy(data, (__force void *)_tlv, sizeof(data));
else if (copy_from_user(data, _tlv, sizeof(data)))
return NULL;
if (data[1] >= MAX_TLV_SIZE)
return NULL;
tlv = kmalloc(data[1] + sizeof(data), GFP_KERNEL);
if (!tlv)
return NULL;
memcpy(tlv, data, sizeof(data));
if (in_kernel) {
memcpy(tlv + 2, (__force void *)(_tlv + 2), data[1]);
} else if (copy_from_user(tlv + 2, _tlv + 2, data[1])) {
kfree(tlv);
return NULL;
}
return tlv;
}
static int copy_gctl(struct snd_emu10k1 *emu,
struct snd_emu10k1_fx8010_control_gpr *dst,
struct snd_emu10k1_fx8010_control_gpr *src,
int idx, bool in_kernel)
{
struct snd_emu10k1_fx8010_control_gpr __user *_src;
struct snd_emu10k1_fx8010_control_old_gpr *octl;
struct snd_emu10k1_fx8010_control_old_gpr __user *_octl;
_src = (struct snd_emu10k1_fx8010_control_gpr __user *)src;
if (emu->support_tlv) {
if (in_kernel)
*dst = src[idx];
else if (copy_from_user(dst, &_src[idx], sizeof(*src)))
return -EFAULT;
return 0;
}
octl = (struct snd_emu10k1_fx8010_control_old_gpr *)src;
_octl = (struct snd_emu10k1_fx8010_control_old_gpr __user *)octl;
if (in_kernel)
memcpy(dst, &octl[idx], sizeof(*octl));
else if (copy_from_user(dst, &_octl[idx], sizeof(*octl)))
return -EFAULT;
dst->tlv = NULL;
return 0;
}
static int copy_gctl_to_user(struct snd_emu10k1 *emu,
struct snd_emu10k1_fx8010_control_gpr *dst,
struct snd_emu10k1_fx8010_control_gpr *src,
int idx)
{
struct snd_emu10k1_fx8010_control_gpr __user *_dst;
struct snd_emu10k1_fx8010_control_old_gpr __user *octl;
_dst = (struct snd_emu10k1_fx8010_control_gpr __user *)dst;
if (emu->support_tlv)
return copy_to_user(&_dst[idx], src, sizeof(*src));
octl = (struct snd_emu10k1_fx8010_control_old_gpr __user *)dst;
return copy_to_user(&octl[idx], src, sizeof(*octl));
}
static int copy_ctl_elem_id(const struct emu10k1_ctl_elem_id *list, int i,
struct emu10k1_ctl_elem_id *ret, bool in_kernel)
{
struct emu10k1_ctl_elem_id __user *_id =
(struct emu10k1_ctl_elem_id __user *)&list[i];
if (in_kernel)
*ret = list[i];
else if (copy_from_user(ret, _id, sizeof(*ret)))
return -EFAULT;
return 0;
}
static int snd_emu10k1_verify_controls(struct snd_emu10k1 *emu,
struct snd_emu10k1_fx8010_code *icode,
bool in_kernel)
{
unsigned int i;
struct emu10k1_ctl_elem_id id;
struct snd_emu10k1_fx8010_control_gpr *gctl;
struct snd_ctl_elem_id *gctl_id;
int err;
for (i = 0; i < icode->gpr_del_control_count; i++) {
err = copy_ctl_elem_id(icode->gpr_del_controls, i, &id,
in_kernel);
if (err < 0)
return err;
if (snd_emu10k1_look_for_ctl(emu, &id) == NULL)
return -ENOENT;
}
gctl = kmalloc(sizeof(*gctl), GFP_KERNEL);
if (! gctl)
return -ENOMEM;
err = 0;
for (i = 0; i < icode->gpr_add_control_count; i++) {
if (copy_gctl(emu, gctl, icode->gpr_add_controls, i,
in_kernel)) {
err = -EFAULT;
goto __error;
}
if (snd_emu10k1_look_for_ctl(emu, &gctl->id))
continue;
gctl_id = (struct snd_ctl_elem_id *)&gctl->id;
if (snd_ctl_find_id(emu->card, gctl_id)) {
err = -EEXIST;
goto __error;
}
if (gctl_id->iface != SNDRV_CTL_ELEM_IFACE_MIXER &&
gctl_id->iface != SNDRV_CTL_ELEM_IFACE_PCM) {
err = -EINVAL;
goto __error;
}
switch (gctl->translation) {
case EMU10K1_GPR_TRANSLATION_NONE:
case EMU10K1_GPR_TRANSLATION_NEGATE:
break;
case EMU10K1_GPR_TRANSLATION_TABLE100:
case EMU10K1_GPR_TRANSLATION_NEG_TABLE100:
if (gctl->min != 0 || gctl->max != 100) {
err = -EINVAL;
goto __error;
}
break;
case EMU10K1_GPR_TRANSLATION_BASS:
case EMU10K1_GPR_TRANSLATION_TREBLE:
if (gctl->min != 0 || gctl->max != 40) {
err = -EINVAL;
goto __error;
}
break;
case EMU10K1_GPR_TRANSLATION_ONOFF:
if (gctl->min != 0 || gctl->max != 1) {
err = -EINVAL;
goto __error;
}
break;
default:
err = -EINVAL;
goto __error;
}
}
for (i = 0; i < icode->gpr_list_control_count; i++) {
/* FIXME: we need to check the WRITE access */
if (copy_gctl(emu, gctl, icode->gpr_list_controls, i,
in_kernel)) {
err = -EFAULT;
goto __error;
}
}
__error:
kfree(gctl);
return err;
}
static void snd_emu10k1_ctl_private_free(struct snd_kcontrol *kctl)
{
struct snd_emu10k1_fx8010_ctl *ctl;
ctl = (struct snd_emu10k1_fx8010_ctl *) kctl->private_value;
kctl->private_value = 0;
list_del(&ctl->list);
kfree(ctl);
kfree(kctl->tlv.p);
}
static int snd_emu10k1_add_controls(struct snd_emu10k1 *emu,
struct snd_emu10k1_fx8010_code *icode,
bool in_kernel)
{
unsigned int i, j;
struct snd_emu10k1_fx8010_control_gpr *gctl;
struct snd_ctl_elem_id *gctl_id;
struct snd_emu10k1_fx8010_ctl *ctl, *nctl;
struct snd_kcontrol_new knew;
struct snd_kcontrol *kctl;
struct snd_ctl_elem_value *val;
int err = 0;
val = kmalloc(sizeof(*val), GFP_KERNEL);
gctl = kmalloc(sizeof(*gctl), GFP_KERNEL);
nctl = kmalloc(sizeof(*nctl), GFP_KERNEL);
if (!val || !gctl || !nctl) {
err = -ENOMEM;
goto __error;
}
for (i = 0; i < icode->gpr_add_control_count; i++) {
if (copy_gctl(emu, gctl, icode->gpr_add_controls, i,
in_kernel)) {
err = -EFAULT;
goto __error;
}
gctl_id = (struct snd_ctl_elem_id *)&gctl->id;
if (gctl_id->iface != SNDRV_CTL_ELEM_IFACE_MIXER &&
gctl_id->iface != SNDRV_CTL_ELEM_IFACE_PCM) {
err = -EINVAL;
goto __error;
}
if (!*gctl_id->name) {
err = -EINVAL;
goto __error;
}
ctl = snd_emu10k1_look_for_ctl(emu, &gctl->id);
memset(&knew, 0, sizeof(knew));
knew.iface = gctl_id->iface;
knew.name = gctl_id->name;
knew.index = gctl_id->index;
knew.device = gctl_id->device;
knew.subdevice = gctl_id->subdevice;
knew.info = snd_emu10k1_gpr_ctl_info;
knew.tlv.p = copy_tlv((const unsigned int __user *)gctl->tlv, in_kernel);
if (knew.tlv.p)
knew.access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ;
knew.get = snd_emu10k1_gpr_ctl_get;
knew.put = snd_emu10k1_gpr_ctl_put;
memset(nctl, 0, sizeof(*nctl));
nctl->vcount = gctl->vcount;
nctl->count = gctl->count;
for (j = 0; j < 32; j++) {
nctl->gpr[j] = gctl->gpr[j];
nctl->value[j] = ~gctl->value[j]; /* inverted, we want to write new value in gpr_ctl_put() */
val->value.integer.value[j] = gctl->value[j];
}
nctl->min = gctl->min;
nctl->max = gctl->max;
nctl->translation = gctl->translation;
if (ctl == NULL) {
ctl = kmalloc(sizeof(*ctl), GFP_KERNEL);
if (ctl == NULL) {
err = -ENOMEM;
kfree(knew.tlv.p);
goto __error;
}
knew.private_value = (unsigned long)ctl;
*ctl = *nctl;
kctl = snd_ctl_new1(&knew, emu);
err = snd_ctl_add(emu->card, kctl);
if (err < 0) {
kfree(ctl);
kfree(knew.tlv.p);
goto __error;
}
kctl->private_free = snd_emu10k1_ctl_private_free;
ctl->kcontrol = kctl;
list_add_tail(&ctl->list, &emu->fx8010.gpr_ctl);
} else {
/* overwrite */
nctl->list = ctl->list;
nctl->kcontrol = ctl->kcontrol;
*ctl = *nctl;
snd_ctl_notify(emu->card, SNDRV_CTL_EVENT_MASK_VALUE |
SNDRV_CTL_EVENT_MASK_INFO, &ctl->kcontrol->id);
}
snd_emu10k1_gpr_ctl_put(ctl->kcontrol, val);
}
__error:
kfree(nctl);
kfree(gctl);
kfree(val);
return err;
}
static int snd_emu10k1_del_controls(struct snd_emu10k1 *emu,
struct snd_emu10k1_fx8010_code *icode,
bool in_kernel)
{
unsigned int i;
struct emu10k1_ctl_elem_id id;
struct snd_emu10k1_fx8010_ctl *ctl;
struct snd_card *card = emu->card;
int err;
for (i = 0; i < icode->gpr_del_control_count; i++) {
err = copy_ctl_elem_id(icode->gpr_del_controls, i, &id,
in_kernel);
if (err < 0)
return err;
ctl = snd_emu10k1_look_for_ctl(emu, &id);
if (ctl)
snd_ctl_remove(card, ctl->kcontrol);
}
return 0;
}
static int snd_emu10k1_list_controls(struct snd_emu10k1 *emu,
struct snd_emu10k1_fx8010_code *icode)
{
unsigned int i = 0, j;
unsigned int total = 0;
struct snd_emu10k1_fx8010_control_gpr *gctl;
struct snd_emu10k1_fx8010_ctl *ctl;
struct snd_ctl_elem_id *id;
gctl = kmalloc(sizeof(*gctl), GFP_KERNEL);
if (! gctl)
return -ENOMEM;
list_for_each_entry(ctl, &emu->fx8010.gpr_ctl, list) {
total++;
if (icode->gpr_list_controls &&
i < icode->gpr_list_control_count) {
memset(gctl, 0, sizeof(*gctl));
id = &ctl->kcontrol->id;
gctl->id.iface = (__force int)id->iface;
strscpy(gctl->id.name, id->name, sizeof(gctl->id.name));
gctl->id.index = id->index;
gctl->id.device = id->device;
gctl->id.subdevice = id->subdevice;
gctl->vcount = ctl->vcount;
gctl->count = ctl->count;
for (j = 0; j < 32; j++) {
gctl->gpr[j] = ctl->gpr[j];
gctl->value[j] = ctl->value[j];
}
gctl->min = ctl->min;
gctl->max = ctl->max;
gctl->translation = ctl->translation;
if (copy_gctl_to_user(emu, icode->gpr_list_controls,
gctl, i)) {
kfree(gctl);
return -EFAULT;
}
i++;
}
}
icode->gpr_list_control_total = total;
kfree(gctl);
return 0;
}
static int snd_emu10k1_icode_poke(struct snd_emu10k1 *emu,
struct snd_emu10k1_fx8010_code *icode,
bool in_kernel)
{
int err = 0;
mutex_lock(&emu->fx8010.lock);
err = snd_emu10k1_verify_controls(emu, icode, in_kernel);
if (err < 0)
goto __error;
strscpy(emu->fx8010.name, icode->name, sizeof(emu->fx8010.name));
/* stop FX processor - this may be dangerous, but it's better to miss
some samples than generate wrong ones - [jk] */
if (emu->audigy)
snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg | A_DBG_SINGLE_STEP);
else
snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg | EMU10K1_DBG_SINGLE_STEP);
/* ok, do the main job */
err = snd_emu10k1_del_controls(emu, icode, in_kernel);
if (err < 0)
goto __error;
err = snd_emu10k1_gpr_poke(emu, icode, in_kernel);
if (err < 0)
goto __error;
err = snd_emu10k1_tram_poke(emu, icode, in_kernel);
if (err < 0)
goto __error;
err = snd_emu10k1_code_poke(emu, icode, in_kernel);
if (err < 0)
goto __error;
err = snd_emu10k1_add_controls(emu, icode, in_kernel);
if (err < 0)
goto __error;
/* start FX processor when the DSP code is updated */
if (emu->audigy)
snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg);
else
snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg);
__error:
mutex_unlock(&emu->fx8010.lock);
return err;
}
static int snd_emu10k1_icode_peek(struct snd_emu10k1 *emu,
struct snd_emu10k1_fx8010_code *icode)
{
int err;
mutex_lock(&emu->fx8010.lock);
strscpy(icode->name, emu->fx8010.name, sizeof(icode->name));
/* ok, do the main job */
err = snd_emu10k1_gpr_peek(emu, icode);
if (err >= 0)
err = snd_emu10k1_tram_peek(emu, icode);
if (err >= 0)
err = snd_emu10k1_code_peek(emu, icode);
if (err >= 0)
err = snd_emu10k1_list_controls(emu, icode);
mutex_unlock(&emu->fx8010.lock);
return err;
}
static int snd_emu10k1_ipcm_poke(struct snd_emu10k1 *emu,
struct snd_emu10k1_fx8010_pcm_rec *ipcm)
{
unsigned int i;
int err = 0;
struct snd_emu10k1_fx8010_pcm *pcm;
if (ipcm->substream >= EMU10K1_FX8010_PCM_COUNT)
return -EINVAL;
ipcm->substream = array_index_nospec(ipcm->substream,
EMU10K1_FX8010_PCM_COUNT);
if (ipcm->channels > 32)
return -EINVAL;
pcm = &emu->fx8010.pcm[ipcm->substream];
mutex_lock(&emu->fx8010.lock);
spin_lock_irq(&emu->reg_lock);
if (pcm->opened) {
err = -EBUSY;
goto __error;
}
if (ipcm->channels == 0) { /* remove */
pcm->valid = 0;
} else {
/* FIXME: we need to add universal code to the PCM transfer routine */
if (ipcm->channels != 2) {
err = -EINVAL;
goto __error;
}
pcm->valid = 1;
pcm->opened = 0;
pcm->channels = ipcm->channels;
pcm->tram_start = ipcm->tram_start;
pcm->buffer_size = ipcm->buffer_size;
pcm->gpr_size = ipcm->gpr_size;
pcm->gpr_count = ipcm->gpr_count;
pcm->gpr_tmpcount = ipcm->gpr_tmpcount;
pcm->gpr_ptr = ipcm->gpr_ptr;
pcm->gpr_trigger = ipcm->gpr_trigger;
pcm->gpr_running = ipcm->gpr_running;
for (i = 0; i < pcm->channels; i++)
pcm->etram[i] = ipcm->etram[i];
}
__error:
spin_unlock_irq(&emu->reg_lock);
mutex_unlock(&emu->fx8010.lock);
return err;
}
static int snd_emu10k1_ipcm_peek(struct snd_emu10k1 *emu,
struct snd_emu10k1_fx8010_pcm_rec *ipcm)
{
unsigned int i;
int err = 0;
struct snd_emu10k1_fx8010_pcm *pcm;
if (ipcm->substream >= EMU10K1_FX8010_PCM_COUNT)
return -EINVAL;
ipcm->substream = array_index_nospec(ipcm->substream,
EMU10K1_FX8010_PCM_COUNT);
pcm = &emu->fx8010.pcm[ipcm->substream];
mutex_lock(&emu->fx8010.lock);
spin_lock_irq(&emu->reg_lock);
ipcm->channels = pcm->channels;
ipcm->tram_start = pcm->tram_start;
ipcm->buffer_size = pcm->buffer_size;
ipcm->gpr_size = pcm->gpr_size;
ipcm->gpr_ptr = pcm->gpr_ptr;
ipcm->gpr_count = pcm->gpr_count;
ipcm->gpr_tmpcount = pcm->gpr_tmpcount;
ipcm->gpr_trigger = pcm->gpr_trigger;
ipcm->gpr_running = pcm->gpr_running;
for (i = 0; i < pcm->channels; i++)
ipcm->etram[i] = pcm->etram[i];
ipcm->res1 = ipcm->res2 = 0;
ipcm->pad = 0;
spin_unlock_irq(&emu->reg_lock);
mutex_unlock(&emu->fx8010.lock);
return err;
}
#define SND_EMU10K1_GPR_CONTROLS 44
#define SND_EMU10K1_INPUTS 12
#define SND_EMU10K1_PLAYBACK_CHANNELS 8
#define SND_EMU10K1_CAPTURE_CHANNELS 4
#define HR_VAL(v) ((v) * 0x80000000LL / 100 - 1)
static void
snd_emu10k1_init_mono_control2(struct snd_emu10k1_fx8010_control_gpr *ctl,
const char *name, int gpr, int defval, int defval_hr)
{
ctl->id.iface = (__force int)SNDRV_CTL_ELEM_IFACE_MIXER;
strcpy(ctl->id.name, name);
ctl->vcount = ctl->count = 1;
if (high_res_gpr_volume) {
ctl->min = -1;
ctl->max = 0x7fffffff;
ctl->tlv = snd_emu10k1_db_linear;
ctl->translation = EMU10K1_GPR_TRANSLATION_NEGATE;
defval = defval_hr;
} else {
ctl->min = 0;
ctl->max = 100;
ctl->tlv = snd_emu10k1_db_scale1;
ctl->translation = EMU10K1_GPR_TRANSLATION_NEG_TABLE100;
}
ctl->gpr[0] = gpr + 0; ctl->value[0] = defval;
}
#define snd_emu10k1_init_mono_control(ctl, name, gpr, defval) \
snd_emu10k1_init_mono_control2(ctl, name, gpr, defval, HR_VAL(defval))
static void
snd_emu10k1_init_stereo_control2(struct snd_emu10k1_fx8010_control_gpr *ctl,
const char *name, int gpr, int defval, int defval_hr)
{
ctl->id.iface = (__force int)SNDRV_CTL_ELEM_IFACE_MIXER;
strcpy(ctl->id.name, name);
ctl->vcount = ctl->count = 2;
if (high_res_gpr_volume) {
ctl->min = -1;
ctl->max = 0x7fffffff;
ctl->tlv = snd_emu10k1_db_linear;
ctl->translation = EMU10K1_GPR_TRANSLATION_NEGATE;
defval = defval_hr;
} else {
ctl->min = 0;
ctl->max = 100;
ctl->tlv = snd_emu10k1_db_scale1;
ctl->translation = EMU10K1_GPR_TRANSLATION_NEG_TABLE100;
}
ctl->gpr[0] = gpr + 0; ctl->value[0] = defval;
ctl->gpr[1] = gpr + 1; ctl->value[1] = defval;
}
#define snd_emu10k1_init_stereo_control(ctl, name, gpr, defval) \
snd_emu10k1_init_stereo_control2(ctl, name, gpr, defval, HR_VAL(defval))
static void
snd_emu10k1_init_mono_onoff_control(struct snd_emu10k1_fx8010_control_gpr *ctl,
const char *name, int gpr, int defval)
{
ctl->id.iface = (__force int)SNDRV_CTL_ELEM_IFACE_MIXER;
strcpy(ctl->id.name, name);
ctl->vcount = ctl->count = 1;
ctl->gpr[0] = gpr + 0; ctl->value[0] = defval;
ctl->min = 0;
ctl->max = 1;
ctl->translation = EMU10K1_GPR_TRANSLATION_ONOFF;
}
static void
snd_emu10k1_init_stereo_onoff_control(struct snd_emu10k1_fx8010_control_gpr *ctl,
const char *name, int gpr, int defval)
{
ctl->id.iface = (__force int)SNDRV_CTL_ELEM_IFACE_MIXER;
strcpy(ctl->id.name, name);
ctl->vcount = ctl->count = 2;
ctl->gpr[0] = gpr + 0; ctl->value[0] = defval;
ctl->gpr[1] = gpr + 1; ctl->value[1] = defval;
ctl->min = 0;
ctl->max = 1;
ctl->translation = EMU10K1_GPR_TRANSLATION_ONOFF;
}
/*
* Used for emu1010 - conversion from 32-bit capture inputs from the FPGA
* to 2 x 16-bit registers in Audigy - their values are read via DMA.
* Conversion is performed by Audigy DSP instructions of FX8010.
*/
static void snd_emu10k1_audigy_dsp_convert_32_to_2x16(
struct snd_emu10k1_fx8010_code *icode,
u32 *ptr, int tmp, int bit_shifter16,
int reg_in, int reg_out)
{
// This leaves the low word in place, which is fine,
// as the low bits are completely ignored subsequently.
// reg_out[1] = reg_in
A_OP(icode, ptr, iACC3, reg_out + 1, reg_in, A_C_00000000, A_C_00000000);
// It is fine to read reg_in multiple times.
// tmp = reg_in << 15
A_OP(icode, ptr, iMACINT1, A_GPR(tmp), A_C_00000000, reg_in, A_GPR(bit_shifter16));
// Left-shift once more. This is a separate step, as the
// signed multiplication would clobber the MSB.
// reg_out[0] = tmp + ((tmp << 31) >> 31)
A_OP(icode, ptr, iMAC3, reg_out, A_GPR(tmp), A_GPR(tmp), A_C_80000000);
}
#define ENUM_GPR(name, size) name, name ## _dummy = name + (size) - 1
/*
* initial DSP configuration for Audigy
*/
static int _snd_emu10k1_audigy_init_efx(struct snd_emu10k1 *emu)
{
int err, z, nctl;
enum {
ENUM_GPR(playback, SND_EMU10K1_PLAYBACK_CHANNELS),
ENUM_GPR(stereo_mix, 2),
ENUM_GPR(capture, 2),
ENUM_GPR(bit_shifter16, 1),
// The fixed allocation of these breaks the pattern, but why not.
// Splitting these into left/right is questionable, as it will break
// down for center/lfe. But it works for stereo/quadro, so whatever.
ENUM_GPR(bass_gpr, 2 * 5), // two sides, five coefficients
ENUM_GPR(treble_gpr, 2 * 5),
ENUM_GPR(bass_tmp, SND_EMU10K1_PLAYBACK_CHANNELS * 4), // four delay stages
ENUM_GPR(treble_tmp, SND_EMU10K1_PLAYBACK_CHANNELS * 4),
ENUM_GPR(tmp, 3),
num_static_gprs
};
int gpr = num_static_gprs;
u32 ptr, ptr_skip;
struct snd_emu10k1_fx8010_code *icode = NULL;
struct snd_emu10k1_fx8010_control_gpr *controls = NULL, *ctl;
u32 *gpr_map;
err = -ENOMEM;
icode = kzalloc(sizeof(*icode), GFP_KERNEL);
if (!icode)
return err;
icode->gpr_map = kcalloc(512 + 256 + 256 + 2 * 1024,
sizeof(u_int32_t), GFP_KERNEL);
if (!icode->gpr_map)
goto __err_gpr;
controls = kcalloc(SND_EMU10K1_GPR_CONTROLS,
sizeof(*controls), GFP_KERNEL);
if (!controls)
goto __err_ctrls;
gpr_map = icode->gpr_map;
icode->tram_data_map = icode->gpr_map + 512;
icode->tram_addr_map = icode->tram_data_map + 256;
icode->code = icode->tram_addr_map + 256;
/* clear free GPRs */
memset(icode->gpr_valid, 0xff, 512 / 8);
/* clear TRAM data & address lines */
memset(icode->tram_valid, 0xff, 256 / 8);
strcpy(icode->name, "Audigy DSP code for ALSA");
ptr = 0;
nctl = 0;
gpr_map[bit_shifter16] = 0x00008000;
#if 1
/* PCM front Playback Volume (independent from stereo mix)
* playback = -gpr * FXBUS_PCM_LEFT_FRONT >> 31
* where gpr contains negated attenuation from corresponding mixer control
* (snd_emu10k1_init_stereo_control)
*/
A_OP(icode, &ptr, iMAC1, A_GPR(playback), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT_FRONT));
A_OP(icode, &ptr, iMAC1, A_GPR(playback+1), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT_FRONT));
snd_emu10k1_init_stereo_control(&controls[nctl++], "PCM Front Playback Volume", gpr, 100);
gpr += 2;
/* PCM Surround Playback (independent from stereo mix) */
A_OP(icode, &ptr, iMAC1, A_GPR(playback+2), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT_REAR));
A_OP(icode, &ptr, iMAC1, A_GPR(playback+3), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT_REAR));
snd_emu10k1_init_stereo_control(&controls[nctl++], "PCM Surround Playback Volume", gpr, 100);
gpr += 2;
/* PCM Side Playback (independent from stereo mix) */
if (emu->card_capabilities->spk71) {
A_OP(icode, &ptr, iMAC1, A_GPR(playback+6), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT_SIDE));
A_OP(icode, &ptr, iMAC1, A_GPR(playback+7), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT_SIDE));
snd_emu10k1_init_stereo_control(&controls[nctl++], "PCM Side Playback Volume", gpr, 100);
gpr += 2;
}
/* PCM Center Playback (independent from stereo mix) */
A_OP(icode, &ptr, iMAC1, A_GPR(playback+4), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_CENTER));
snd_emu10k1_init_mono_control(&controls[nctl++], "PCM Center Playback Volume", gpr, 100);
gpr++;
/* PCM LFE Playback (independent from stereo mix) */
A_OP(icode, &ptr, iMAC1, A_GPR(playback+5), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LFE));
snd_emu10k1_init_mono_control(&controls[nctl++], "PCM LFE Playback Volume", gpr, 100);
gpr++;
/*
* Stereo Mix
*/
/* Wave (PCM) Playback Volume (will be renamed later) */
A_OP(icode, &ptr, iMAC1, A_GPR(stereo_mix), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT));
A_OP(icode, &ptr, iMAC1, A_GPR(stereo_mix+1), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT));
snd_emu10k1_init_stereo_control(&controls[nctl++], "Wave Playback Volume", gpr, 100);
gpr += 2;
/* Synth Playback */
A_OP(icode, &ptr, iMAC1, A_GPR(stereo_mix+0), A_GPR(stereo_mix+0), A_GPR(gpr), A_FXBUS(FXBUS_MIDI_LEFT));
A_OP(icode, &ptr, iMAC1, A_GPR(stereo_mix+1), A_GPR(stereo_mix+1), A_GPR(gpr+1), A_FXBUS(FXBUS_MIDI_RIGHT));
snd_emu10k1_init_stereo_control(&controls[nctl++], "Synth Playback Volume", gpr, 100);
gpr += 2;
/* Wave (PCM) Capture */
A_OP(icode, &ptr, iMAC1, A_GPR(capture+0), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT));
A_OP(icode, &ptr, iMAC1, A_GPR(capture+1), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT));
snd_emu10k1_init_stereo_control(&controls[nctl++], "PCM Capture Volume", gpr, 0);
gpr += 2;
/* Synth Capture */
A_OP(icode, &ptr, iMAC1, A_GPR(capture+0), A_GPR(capture+0), A_GPR(gpr), A_FXBUS(FXBUS_MIDI_LEFT));
A_OP(icode, &ptr, iMAC1, A_GPR(capture+1), A_GPR(capture+1), A_GPR(gpr+1), A_FXBUS(FXBUS_MIDI_RIGHT));
snd_emu10k1_init_stereo_control(&controls[nctl++], "Synth Capture Volume", gpr, 0);
gpr += 2;
// We need to double the volume, as we configure the voices for half volume,
// which is necessary for bit-identical reproduction.
{ static_assert(stereo_mix == playback + SND_EMU10K1_PLAYBACK_CHANNELS); }
for (z = 0; z < SND_EMU10K1_PLAYBACK_CHANNELS + 2; z++)
A_OP(icode, &ptr, iACC3, A_GPR(playback + z), A_GPR(playback + z), A_GPR(playback + z), A_C_00000000);
/*
* inputs
*/
#define A_ADD_VOLUME_IN(var,vol,input) \
A_OP(icode, &ptr, iMAC1, A_GPR(var), A_GPR(var), A_GPR(vol), A_EXTIN(input))
if (emu->card_capabilities->emu_model) {
/* EMU1010 DSP 0 and DSP 1 Capture */
// The 24 MSB hold the actual value. We implicitly discard the 16 LSB.
if (emu->card_capabilities->ca0108_chip) {
// For unclear reasons, the EMU32IN cannot be the Y operand!
A_OP(icode, &ptr, iMAC1, A_GPR(capture+0), A_GPR(capture+0), A3_EMU32IN(0x0), A_GPR(gpr));
// A3_EMU32IN(0) is delayed by one sample, so all other A3_EMU32IN channels
// need to be delayed as well; we use an auxiliary register for that.
A_OP(icode, &ptr, iMAC1, A_GPR(capture+1), A_GPR(capture+1), A_GPR(gpr+2), A_GPR(gpr+1));
A_OP(icode, &ptr, iACC3, A_GPR(gpr+2), A3_EMU32IN(0x1), A_C_00000000, A_C_00000000);
} else {
A_OP(icode, &ptr, iMAC1, A_GPR(capture+0), A_GPR(capture+0), A_P16VIN(0x0), A_GPR(gpr));
// A_P16VIN(0) is delayed by one sample, so all other A_P16VIN channels
// need to be delayed as well; we use an auxiliary register for that.
A_OP(icode, &ptr, iMAC1, A_GPR(capture+1), A_GPR(capture+1), A_GPR(gpr+2), A_GPR(gpr+1));
A_OP(icode, &ptr, iACC3, A_GPR(gpr+2), A_P16VIN(0x1), A_C_00000000, A_C_00000000);
}
snd_emu10k1_init_stereo_control(&controls[nctl++], "EMU Capture Volume", gpr, 0);
gpr_map[gpr + 2] = 0x00000000;
gpr += 3;
} else {
if (emu->card_capabilities->ac97_chip) {
/* AC'97 Playback Volume - used only for mic (renamed later) */
A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_AC97_L);
A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_AC97_R);
snd_emu10k1_init_stereo_control(&controls[nctl++], "AMic Playback Volume", gpr, 0);
gpr += 2;
/* AC'97 Capture Volume - used only for mic */
A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_AC97_L);
A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_AC97_R);
snd_emu10k1_init_stereo_control(&controls[nctl++], "Mic Capture Volume", gpr, 0);
gpr += 2;
/* mic capture buffer */
A_OP(icode, &ptr, iINTERP, A_EXTOUT(A_EXTOUT_MIC_CAP), A_EXTIN(A_EXTIN_AC97_L), A_C_40000000, A_EXTIN(A_EXTIN_AC97_R));
}
/* Audigy CD Playback Volume */
A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_SPDIF_CD_L);
A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_SPDIF_CD_R);
snd_emu10k1_init_stereo_control(&controls[nctl++],
emu->card_capabilities->ac97_chip ? "Audigy CD Playback Volume" : "CD Playback Volume",
gpr, 0);
gpr += 2;
/* Audigy CD Capture Volume */
A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_SPDIF_CD_L);
A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_SPDIF_CD_R);
snd_emu10k1_init_stereo_control(&controls[nctl++],
emu->card_capabilities->ac97_chip ? "Audigy CD Capture Volume" : "CD Capture Volume",
gpr, 0);
gpr += 2;
/* Optical SPDIF Playback Volume */
A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_OPT_SPDIF_L);
A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_OPT_SPDIF_R);
snd_emu10k1_init_stereo_control(&controls[nctl++], SNDRV_CTL_NAME_IEC958("Optical ",PLAYBACK,VOLUME), gpr, 0);
gpr += 2;
/* Optical SPDIF Capture Volume */
A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_OPT_SPDIF_L);
A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_OPT_SPDIF_R);
snd_emu10k1_init_stereo_control(&controls[nctl++], SNDRV_CTL_NAME_IEC958("Optical ",CAPTURE,VOLUME), gpr, 0);
gpr += 2;
/* Line2 Playback Volume */
A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_LINE2_L);
A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_LINE2_R);
snd_emu10k1_init_stereo_control(&controls[nctl++],
emu->card_capabilities->ac97_chip ? "Line2 Playback Volume" : "Line Playback Volume",
gpr, 0);
gpr += 2;
/* Line2 Capture Volume */
A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_LINE2_L);
A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_LINE2_R);
snd_emu10k1_init_stereo_control(&controls[nctl++],
emu->card_capabilities->ac97_chip ? "Line2 Capture Volume" : "Line Capture Volume",
gpr, 0);
gpr += 2;
/* Philips ADC Playback Volume */
A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_ADC_L);
A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_ADC_R);
snd_emu10k1_init_stereo_control(&controls[nctl++], "Analog Mix Playback Volume", gpr, 0);
gpr += 2;
/* Philips ADC Capture Volume */
A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_ADC_L);
A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_ADC_R);
snd_emu10k1_init_stereo_control(&controls[nctl++], "Analog Mix Capture Volume", gpr, 0);
gpr += 2;
/* Aux2 Playback Volume */
A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_AUX2_L);
A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_AUX2_R);
snd_emu10k1_init_stereo_control(&controls[nctl++],
emu->card_capabilities->ac97_chip ? "Aux2 Playback Volume" : "Aux Playback Volume",
gpr, 0);
gpr += 2;
/* Aux2 Capture Volume */
A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_AUX2_L);
A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_AUX2_R);
snd_emu10k1_init_stereo_control(&controls[nctl++],
emu->card_capabilities->ac97_chip ? "Aux2 Capture Volume" : "Aux Capture Volume",
gpr, 0);
gpr += 2;
}
/* Stereo Mix Front Playback Volume */
A_OP(icode, &ptr, iMAC1, A_GPR(playback), A_GPR(playback), A_GPR(gpr), A_GPR(stereo_mix));
A_OP(icode, &ptr, iMAC1, A_GPR(playback+1), A_GPR(playback+1), A_GPR(gpr+1), A_GPR(stereo_mix+1));
snd_emu10k1_init_stereo_control(&controls[nctl++], "Front Playback Volume", gpr, 100);
gpr += 2;
/* Stereo Mix Surround Playback */
A_OP(icode, &ptr, iMAC1, A_GPR(playback+2), A_GPR(playback+2), A_GPR(gpr), A_GPR(stereo_mix));
A_OP(icode, &ptr, iMAC1, A_GPR(playback+3), A_GPR(playback+3), A_GPR(gpr+1), A_GPR(stereo_mix+1));
snd_emu10k1_init_stereo_control(&controls[nctl++], "Surround Playback Volume", gpr, 0);
gpr += 2;
/* Stereo Mix Center Playback */
/* Center = sub = Left/2 + Right/2 */
A_OP(icode, &ptr, iINTERP, A_GPR(tmp), A_GPR(stereo_mix), A_C_40000000, A_GPR(stereo_mix+1));
A_OP(icode, &ptr, iMAC1, A_GPR(playback+4), A_GPR(playback+4), A_GPR(gpr), A_GPR(tmp));
snd_emu10k1_init_mono_control(&controls[nctl++], "Center Playback Volume", gpr, 0);
gpr++;
/* Stereo Mix LFE Playback */
A_OP(icode, &ptr, iMAC1, A_GPR(playback+5), A_GPR(playback+5), A_GPR(gpr), A_GPR(tmp));
snd_emu10k1_init_mono_control(&controls[nctl++], "LFE Playback Volume", gpr, 0);
gpr++;
if (emu->card_capabilities->spk71) {
/* Stereo Mix Side Playback */
A_OP(icode, &ptr, iMAC1, A_GPR(playback+6), A_GPR(playback+6), A_GPR(gpr), A_GPR(stereo_mix));
A_OP(icode, &ptr, iMAC1, A_GPR(playback+7), A_GPR(playback+7), A_GPR(gpr+1), A_GPR(stereo_mix+1));
snd_emu10k1_init_stereo_control(&controls[nctl++], "Side Playback Volume", gpr, 0);
gpr += 2;
}
/*
* outputs
*/
#define A_PUT_OUTPUT(out,src) A_OP(icode, &ptr, iACC3, A_EXTOUT(out), A_C_00000000, A_C_00000000, A_GPR(src))
#define A_PUT_STEREO_OUTPUT(out1,out2,src) \
{A_PUT_OUTPUT(out1,src); A_PUT_OUTPUT(out2,src+1);}
#define _A_SWITCH(icode, ptr, dst, src, sw) \
A_OP((icode), ptr, iMACINT0, dst, A_C_00000000, src, sw);
#define A_SWITCH(icode, ptr, dst, src, sw) \
_A_SWITCH(icode, ptr, A_GPR(dst), A_GPR(src), A_GPR(sw))
#define _A_SWITCH_NEG(icode, ptr, dst, src) \
A_OP((icode), ptr, iANDXOR, dst, src, A_C_00000001, A_C_00000001);
#define A_SWITCH_NEG(icode, ptr, dst, src) \
_A_SWITCH_NEG(icode, ptr, A_GPR(dst), A_GPR(src))
/*
* Process tone control
*/
ctl = &controls[nctl + 0];
ctl->id.iface = (__force int)SNDRV_CTL_ELEM_IFACE_MIXER;
strcpy(ctl->id.name, "Tone Control - Bass");
ctl->vcount = 2;
ctl->count = 10;
ctl->min = 0;
ctl->max = 40;
ctl->value[0] = ctl->value[1] = 20;
ctl->translation = EMU10K1_GPR_TRANSLATION_BASS;
ctl = &controls[nctl + 1];
ctl->id.iface = (__force int)SNDRV_CTL_ELEM_IFACE_MIXER;
strcpy(ctl->id.name, "Tone Control - Treble");
ctl->vcount = 2;
ctl->count = 10;
ctl->min = 0;
ctl->max = 40;
ctl->value[0] = ctl->value[1] = 20;
ctl->translation = EMU10K1_GPR_TRANSLATION_TREBLE;
for (z = 0; z < 5; z++) {
int j;
for (j = 0; j < 2; j++) {
controls[nctl + 0].gpr[z * 2 + j] = bass_gpr + z * 2 + j;
controls[nctl + 1].gpr[z * 2 + j] = treble_gpr + z * 2 + j;
}
}
nctl += 2;
A_OP(icode, &ptr, iACC3, A_C_00000000, A_GPR(gpr), A_C_00000000, A_C_00000000);
snd_emu10k1_init_mono_onoff_control(controls + nctl++, "Tone Control - Switch", gpr, 0);
gpr++;
A_OP(icode, &ptr, iSKIP, A_GPR_COND, A_GPR_COND, A_CC_REG_ZERO, A_GPR(gpr));
ptr_skip = ptr;
for (z = 0; z < 4; z++) { /* front/rear/center-lfe/side */
int j, k, l, d;
for (j = 0; j < 2; j++) { /* left/right */
k = bass_tmp + (z * 8) + (j * 4);
l = treble_tmp + (z * 8) + (j * 4);
d = playback + z * 2 + j;
A_OP(icode, &ptr, iMAC0, A_C_00000000, A_C_00000000, A_GPR(d), A_GPR(bass_gpr + 0 + j));
A_OP(icode, &ptr, iMACMV, A_GPR(k+1), A_GPR(k), A_GPR(k+1), A_GPR(bass_gpr + 4 + j));
A_OP(icode, &ptr, iMACMV, A_GPR(k), A_GPR(d), A_GPR(k), A_GPR(bass_gpr + 2 + j));
A_OP(icode, &ptr, iMACMV, A_GPR(k+3), A_GPR(k+2), A_GPR(k+3), A_GPR(bass_gpr + 8 + j));
A_OP(icode, &ptr, iMAC0, A_GPR(k+2), A_GPR_ACCU, A_GPR(k+2), A_GPR(bass_gpr + 6 + j));
A_OP(icode, &ptr, iACC3, A_GPR(k+2), A_GPR(k+2), A_GPR(k+2), A_C_00000000);
A_OP(icode, &ptr, iMAC0, A_C_00000000, A_C_00000000, A_GPR(k+2), A_GPR(treble_gpr + 0 + j));
A_OP(icode, &ptr, iMACMV, A_GPR(l+1), A_GPR(l), A_GPR(l+1), A_GPR(treble_gpr + 4 + j));
A_OP(icode, &ptr, iMACMV, A_GPR(l), A_GPR(k+2), A_GPR(l), A_GPR(treble_gpr + 2 + j));
A_OP(icode, &ptr, iMACMV, A_GPR(l+3), A_GPR(l+2), A_GPR(l+3), A_GPR(treble_gpr + 8 + j));
A_OP(icode, &ptr, iMAC0, A_GPR(l+2), A_GPR_ACCU, A_GPR(l+2), A_GPR(treble_gpr + 6 + j));
A_OP(icode, &ptr, iMACINT0, A_GPR(l+2), A_C_00000000, A_GPR(l+2), A_C_00000010);
A_OP(icode, &ptr, iACC3, A_GPR(d), A_GPR(l+2), A_C_00000000, A_C_00000000);
if (z == 2) /* center */
break;
}
}
gpr_map[gpr++] = ptr - ptr_skip;
/* Master volume (will be renamed later) */
for (z = 0; z < 8; z++)
A_OP(icode, &ptr, iMAC1, A_GPR(playback+z), A_C_00000000, A_GPR(gpr), A_GPR(playback+z));
snd_emu10k1_init_mono_control(&controls[nctl++], "Wave Master Playback Volume", gpr, 0);
gpr++;
if (emu->card_capabilities->emu_model) {
/* EMU1010 Outputs from PCM Front, Rear, Center, LFE, Side */
dev_info(emu->card->dev, "EMU outputs on\n");
for (z = 0; z < 8; z++) {
if (emu->card_capabilities->ca0108_chip) {
A_OP(icode, &ptr, iACC3, A3_EMU32OUT(z), A_GPR(playback + z), A_C_00000000, A_C_00000000);
} else {
A_OP(icode, &ptr, iACC3, A_EMU32OUTL(z), A_GPR(playback + z), A_C_00000000, A_C_00000000);
}
}
} else {
/* analog speakers */
A_PUT_STEREO_OUTPUT(A_EXTOUT_AFRONT_L, A_EXTOUT_AFRONT_R, playback);
A_PUT_STEREO_OUTPUT(A_EXTOUT_AREAR_L, A_EXTOUT_AREAR_R, playback+2);
A_PUT_OUTPUT(A_EXTOUT_ACENTER, playback+4);
A_PUT_OUTPUT(A_EXTOUT_ALFE, playback+5);
if (emu->card_capabilities->spk71)
A_PUT_STEREO_OUTPUT(A_EXTOUT_ASIDE_L, A_EXTOUT_ASIDE_R, playback+6);
/* headphone */
A_PUT_STEREO_OUTPUT(A_EXTOUT_HEADPHONE_L, A_EXTOUT_HEADPHONE_R, playback);
/* IEC958 Optical Raw Playback Switch */
gpr_map[gpr++] = 0;
gpr_map[gpr++] = 0x1008;
gpr_map[gpr++] = 0xffff0000;
for (z = 0; z < 2; z++) {
A_OP(icode, &ptr, iMAC0, A_GPR(tmp + 2), A_FXBUS(FXBUS_PT_LEFT + z), A_C_00000000, A_C_00000000);
A_OP(icode, &ptr, iSKIP, A_GPR_COND, A_GPR_COND, A_GPR(gpr - 2), A_C_00000001);
A_OP(icode, &ptr, iACC3, A_GPR(tmp + 2), A_C_00000000, A_C_00010000, A_GPR(tmp + 2));
A_OP(icode, &ptr, iANDXOR, A_GPR(tmp + 2), A_GPR(tmp + 2), A_GPR(gpr - 1), A_C_00000000);
A_SWITCH(icode, &ptr, tmp + 0, tmp + 2, gpr + z);
A_SWITCH_NEG(icode, &ptr, tmp + 1, gpr + z);
A_SWITCH(icode, &ptr, tmp + 1, playback + z, tmp + 1);
if ((z==1) && (emu->card_capabilities->spdif_bug)) {
/* Due to a SPDIF output bug on some Audigy cards, this code delays the Right channel by 1 sample */
dev_info(emu->card->dev,
"Installing spdif_bug patch: %s\n",
emu->card_capabilities->name);
A_OP(icode, &ptr, iACC3, A_EXTOUT(A_EXTOUT_FRONT_L + z), A_GPR(gpr - 3), A_C_00000000, A_C_00000000);
A_OP(icode, &ptr, iACC3, A_GPR(gpr - 3), A_GPR(tmp + 0), A_GPR(tmp + 1), A_C_00000000);
} else {
A_OP(icode, &ptr, iACC3, A_EXTOUT(A_EXTOUT_FRONT_L + z), A_GPR(tmp + 0), A_GPR(tmp + 1), A_C_00000000);
}
}
snd_emu10k1_init_stereo_onoff_control(controls + nctl++, SNDRV_CTL_NAME_IEC958("Optical Raw ",PLAYBACK,SWITCH), gpr, 0);
gpr += 2;
A_PUT_STEREO_OUTPUT(A_EXTOUT_REAR_L, A_EXTOUT_REAR_R, playback+2);
A_PUT_OUTPUT(A_EXTOUT_CENTER, playback+4);
A_PUT_OUTPUT(A_EXTOUT_LFE, playback+5);
}
/* ADC buffer */
#ifdef EMU10K1_CAPTURE_DIGITAL_OUT
A_PUT_STEREO_OUTPUT(A_EXTOUT_ADC_CAP_L, A_EXTOUT_ADC_CAP_R, playback);
#else
A_PUT_OUTPUT(A_EXTOUT_ADC_CAP_L, capture);
A_PUT_OUTPUT(A_EXTOUT_ADC_CAP_R, capture+1);
#endif
if (emu->card_capabilities->emu_model) {
/* Capture 16 channels of S32_LE sound. */
if (emu->card_capabilities->ca0108_chip) {
dev_info(emu->card->dev, "EMU2 inputs on\n");
/* Note that the Tina[2] DSPs have 16 more EMU32 inputs which we don't use. */
snd_emu10k1_audigy_dsp_convert_32_to_2x16(
icode, &ptr, tmp, bit_shifter16, A3_EMU32IN(0), A_FXBUS2(0));
// A3_EMU32IN(0) is delayed by one sample, so all other A3_EMU32IN channels
// need to be delayed as well; we use an auxiliary register for that.
for (z = 1; z < 0x10; z++) {
snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp,
bit_shifter16,
A_GPR(gpr),
A_FXBUS2(z*2) );
A_OP(icode, &ptr, iACC3, A_GPR(gpr), A3_EMU32IN(z), A_C_00000000, A_C_00000000);
gpr_map[gpr++] = 0x00000000;
}
} else {
dev_info(emu->card->dev, "EMU inputs on\n");
/* Note that the Alice2 DSPs have 6 I2S inputs which we don't use. */
/*
dev_dbg(emu->card->dev, "emufx.c: gpr=0x%x, tmp=0x%x\n",
gpr, tmp);
*/
snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_P16VIN(0x0), A_FXBUS2(0) );
/* A_P16VIN(0) is delayed by one sample, so all other A_P16VIN channels
* will need to also be delayed; we use an auxiliary register for that. */
for (z = 1; z < 0x10; z++) {
snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_GPR(gpr), A_FXBUS2(z * 2) );
A_OP(icode, &ptr, iACC3, A_GPR(gpr), A_P16VIN(z), A_C_00000000, A_C_00000000);
gpr_map[gpr++] = 0x00000000;
}
}
#if 0
for (z = 4; z < 8; z++) {
A_OP(icode, &ptr, iACC3, A_FXBUS2(z), A_C_00000000, A_C_00000000, A_C_00000000);
}
for (z = 0xc; z < 0x10; z++) {
A_OP(icode, &ptr, iACC3, A_FXBUS2(z), A_C_00000000, A_C_00000000, A_C_00000000);
}
#endif
} else {
/* EFX capture - capture the 16 EXTINs */
/* Capture 16 channels of S16_LE sound */
for (z = 0; z < 16; z++) {
A_OP(icode, &ptr, iACC3, A_FXBUS2(z), A_C_00000000, A_C_00000000, A_EXTIN(z));
}
}
#endif /* JCD test */
/*
* ok, set up done..
*/
if (gpr > 512) {
snd_BUG();
err = -EIO;
goto __err;
}
/* clear remaining instruction memory */
while (ptr < 0x400)
A_OP(icode, &ptr, 0x0f, 0xc0, 0xc0, 0xcf, 0xc0);
icode->gpr_add_control_count = nctl;
icode->gpr_add_controls = controls;
emu->support_tlv = 1; /* support TLV */
err = snd_emu10k1_icode_poke(emu, icode, true);
emu->support_tlv = 0; /* clear again */
__err:
kfree(controls);
__err_ctrls:
kfree(icode->gpr_map);
__err_gpr:
kfree(icode);
return err;
}
/*
* initial DSP configuration for Emu10k1
*/
/* Volumes are in the [-2^31, 0] range, zero being mute. */
static void _volume(struct snd_emu10k1_fx8010_code *icode, u32 *ptr, u32 dst, u32 src, u32 vol)
{
OP(icode, ptr, iMAC1, dst, C_00000000, src, vol);
}
static void _volume_add(struct snd_emu10k1_fx8010_code *icode, u32 *ptr, u32 dst, u32 src, u32 vol)
{
OP(icode, ptr, iMAC1, dst, dst, src, vol);
}
#define VOLUME(icode, ptr, dst, src, vol) \
_volume(icode, ptr, GPR(dst), GPR(src), GPR(vol))
#define VOLUME_IN(icode, ptr, dst, src, vol) \
_volume(icode, ptr, GPR(dst), EXTIN(src), GPR(vol))
#define VOLUME_ADD(icode, ptr, dst, src, vol) \
_volume_add(icode, ptr, GPR(dst), GPR(src), GPR(vol))
#define VOLUME_ADDIN(icode, ptr, dst, src, vol) \
_volume_add(icode, ptr, GPR(dst), EXTIN(src), GPR(vol))
#define VOLUME_OUT(icode, ptr, dst, src, vol) \
_volume(icode, ptr, EXTOUT(dst), GPR(src), GPR(vol))
#define _SWITCH(icode, ptr, dst, src, sw) \
OP((icode), ptr, iMACINT0, dst, C_00000000, src, sw);
#define SWITCH(icode, ptr, dst, src, sw) \
_SWITCH(icode, ptr, GPR(dst), GPR(src), GPR(sw))
#define SWITCH_IN(icode, ptr, dst, src, sw) \
_SWITCH(icode, ptr, GPR(dst), EXTIN(src), GPR(sw))
#define _SWITCH_NEG(icode, ptr, dst, src) \
OP((icode), ptr, iANDXOR, dst, src, C_00000001, C_00000001);
#define SWITCH_NEG(icode, ptr, dst, src) \
_SWITCH_NEG(icode, ptr, GPR(dst), GPR(src))
static int _snd_emu10k1_init_efx(struct snd_emu10k1 *emu)
{
int err, i, z, gpr, tmp, playback, capture;
u32 ptr, ptr_skip;
struct snd_emu10k1_fx8010_code *icode;
struct snd_emu10k1_fx8010_pcm_rec *ipcm = NULL;
struct snd_emu10k1_fx8010_control_gpr *controls = NULL, *ctl;
u32 *gpr_map;
err = -ENOMEM;
icode = kzalloc(sizeof(*icode), GFP_KERNEL);
if (!icode)
return err;
icode->gpr_map = kcalloc(256 + 160 + 160 + 2 * 512,
sizeof(u_int32_t), GFP_KERNEL);
if (!icode->gpr_map)
goto __err_gpr;
controls = kcalloc(SND_EMU10K1_GPR_CONTROLS,
sizeof(struct snd_emu10k1_fx8010_control_gpr),
GFP_KERNEL);
if (!controls)
goto __err_ctrls;
ipcm = kzalloc(sizeof(*ipcm), GFP_KERNEL);
if (!ipcm)
goto __err_ipcm;
gpr_map = icode->gpr_map;
icode->tram_data_map = icode->gpr_map + 256;
icode->tram_addr_map = icode->tram_data_map + 160;
icode->code = icode->tram_addr_map + 160;
/* clear free GPRs */
memset(icode->gpr_valid, 0xff, 256 / 8);
/* clear TRAM data & address lines */
memset(icode->tram_valid, 0xff, 160 / 8);
strcpy(icode->name, "SB Live! FX8010 code for ALSA v1.2 by Jaroslav Kysela");
ptr = 0; i = 0;
/* we have 12 inputs */
playback = SND_EMU10K1_INPUTS;
/* we have 6 playback channels and tone control doubles */
capture = playback + SND_EMU10K1_PLAYBACK_CHANNELS;
gpr = capture + SND_EMU10K1_CAPTURE_CHANNELS;
tmp = 0x88; /* we need 4 temporary GPR */
/* from 0x8c to 0xff is the area for tone control */
/*
* Process FX Buses
*/
OP(icode, &ptr, iMACINT0, GPR(0), C_00000000, FXBUS(FXBUS_PCM_LEFT), C_00000008);
OP(icode, &ptr, iMACINT0, GPR(1), C_00000000, FXBUS(FXBUS_PCM_RIGHT), C_00000008);
OP(icode, &ptr, iMACINT0, GPR(2), C_00000000, FXBUS(FXBUS_MIDI_LEFT), C_00000008);
OP(icode, &ptr, iMACINT0, GPR(3), C_00000000, FXBUS(FXBUS_MIDI_RIGHT), C_00000008);
OP(icode, &ptr, iMACINT0, GPR(4), C_00000000, FXBUS(FXBUS_PCM_LEFT_REAR), C_00000008);
OP(icode, &ptr, iMACINT0, GPR(5), C_00000000, FXBUS(FXBUS_PCM_RIGHT_REAR), C_00000008);
OP(icode, &ptr, iMACINT0, GPR(6), C_00000000, FXBUS(FXBUS_PCM_CENTER), C_00000008);
OP(icode, &ptr, iMACINT0, GPR(7), C_00000000, FXBUS(FXBUS_PCM_LFE), C_00000008);
OP(icode, &ptr, iMACINT0, GPR(8), C_00000000, C_00000000, C_00000000); /* S/PDIF left */
OP(icode, &ptr, iMACINT0, GPR(9), C_00000000, C_00000000, C_00000000); /* S/PDIF right */
OP(icode, &ptr, iMACINT0, GPR(10), C_00000000, FXBUS(FXBUS_PCM_LEFT_FRONT), C_00000008);
OP(icode, &ptr, iMACINT0, GPR(11), C_00000000, FXBUS(FXBUS_PCM_RIGHT_FRONT), C_00000008);
/* Raw S/PDIF PCM */
ipcm->substream = 0;
ipcm->channels = 2;
ipcm->tram_start = 0;
ipcm->buffer_size = (64 * 1024) / 2;
ipcm->gpr_size = gpr++;
ipcm->gpr_ptr = gpr++;
ipcm->gpr_count = gpr++;
ipcm->gpr_tmpcount = gpr++;
ipcm->gpr_trigger = gpr++;
ipcm->gpr_running = gpr++;
ipcm->etram[0] = 0;
ipcm->etram[1] = 1;
gpr_map[gpr + 0] = 0xfffff000;
gpr_map[gpr + 1] = 0xffff0000;
gpr_map[gpr + 2] = 0x70000000;
gpr_map[gpr + 3] = 0x00000007;
gpr_map[gpr + 4] = 0x001f << 11;
gpr_map[gpr + 5] = 0x001c << 11;
gpr_map[gpr + 6] = (0x22 - 0x01) - 1; /* skip at 01 to 22 */
gpr_map[gpr + 7] = (0x22 - 0x06) - 1; /* skip at 06 to 22 */
gpr_map[gpr + 8] = 0x2000000 + (2<<11);
gpr_map[gpr + 9] = 0x4000000 + (2<<11);
gpr_map[gpr + 10] = 1<<11;
gpr_map[gpr + 11] = (0x24 - 0x0a) - 1; /* skip at 0a to 24 */
gpr_map[gpr + 12] = 0;
/* if the trigger flag is not set, skip */
/* 00: */ OP(icode, &ptr, iMAC0, C_00000000, GPR(ipcm->gpr_trigger), C_00000000, C_00000000);
/* 01: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_ZERO, GPR(gpr + 6));
/* if the running flag is set, we're running */
/* 02: */ OP(icode, &ptr, iMAC0, C_00000000, GPR(ipcm->gpr_running), C_00000000, C_00000000);
/* 03: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, C_00000004);
/* wait until ((GPR_DBAC>>11) & 0x1f) == 0x1c) */
/* 04: */ OP(icode, &ptr, iANDXOR, GPR(tmp + 0), GPR_DBAC, GPR(gpr + 4), C_00000000);
/* 05: */ OP(icode, &ptr, iMACINT0, C_00000000, GPR(tmp + 0), C_ffffffff, GPR(gpr + 5));
/* 06: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, GPR(gpr + 7));
/* 07: */ OP(icode, &ptr, iACC3, GPR(gpr + 12), C_00000010, C_00000001, C_00000000);
/* 08: */ OP(icode, &ptr, iANDXOR, GPR(ipcm->gpr_running), GPR(ipcm->gpr_running), C_00000000, C_00000001);
/* 09: */ OP(icode, &ptr, iACC3, GPR(gpr + 12), GPR(gpr + 12), C_ffffffff, C_00000000);
/* 0a: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, GPR(gpr + 11));
/* 0b: */ OP(icode, &ptr, iACC3, GPR(gpr + 12), C_00000001, C_00000000, C_00000000);
/* 0c: */ OP(icode, &ptr, iANDXOR, GPR(tmp + 0), ETRAM_DATA(ipcm->etram[0]), GPR(gpr + 0), C_00000000);
/* 0d: */ OP(icode, &ptr, iLOG, GPR(tmp + 0), GPR(tmp + 0), GPR(gpr + 3), C_00000000);
/* 0e: */ OP(icode, &ptr, iANDXOR, GPR(8), GPR(tmp + 0), GPR(gpr + 1), GPR(gpr + 2));
/* 0f: */ OP(icode, &ptr, iSKIP, C_00000000, GPR_COND, CC_REG_MINUS, C_00000001);
/* 10: */ OP(icode, &ptr, iANDXOR, GPR(8), GPR(8), GPR(gpr + 1), GPR(gpr + 2));
/* 11: */ OP(icode, &ptr, iANDXOR, GPR(tmp + 0), ETRAM_DATA(ipcm->etram[1]), GPR(gpr + 0), C_00000000);
/* 12: */ OP(icode, &ptr, iLOG, GPR(tmp + 0), GPR(tmp + 0), GPR(gpr + 3), C_00000000);
/* 13: */ OP(icode, &ptr, iANDXOR, GPR(9), GPR(tmp + 0), GPR(gpr + 1), GPR(gpr + 2));
/* 14: */ OP(icode, &ptr, iSKIP, C_00000000, GPR_COND, CC_REG_MINUS, C_00000001);
/* 15: */ OP(icode, &ptr, iANDXOR, GPR(9), GPR(9), GPR(gpr + 1), GPR(gpr + 2));
/* 16: */ OP(icode, &ptr, iACC3, GPR(tmp + 0), GPR(ipcm->gpr_ptr), C_00000001, C_00000000);
/* 17: */ OP(icode, &ptr, iMACINT0, C_00000000, GPR(tmp + 0), C_ffffffff, GPR(ipcm->gpr_size));
/* 18: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_MINUS, C_00000001);
/* 19: */ OP(icode, &ptr, iACC3, GPR(tmp + 0), C_00000000, C_00000000, C_00000000);
/* 1a: */ OP(icode, &ptr, iACC3, GPR(ipcm->gpr_ptr), GPR(tmp + 0), C_00000000, C_00000000);
/* 1b: */ OP(icode, &ptr, iACC3, GPR(ipcm->gpr_tmpcount), GPR(ipcm->gpr_tmpcount), C_ffffffff, C_00000000);
/* 1c: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, C_00000002);
/* 1d: */ OP(icode, &ptr, iACC3, GPR(ipcm->gpr_tmpcount), GPR(ipcm->gpr_count), C_00000000, C_00000000);
/* 1e: */ OP(icode, &ptr, iACC3, GPR_IRQ, C_80000000, C_00000000, C_00000000);
/* 1f: */ OP(icode, &ptr, iANDXOR, GPR(ipcm->gpr_running), GPR(ipcm->gpr_running), C_00000001, C_00010000);
/* 20: */ OP(icode, &ptr, iANDXOR, GPR(ipcm->gpr_running), GPR(ipcm->gpr_running), C_00010000, C_00000001);
/* 21: */ OP(icode, &ptr, iSKIP, C_00000000, C_7fffffff, C_7fffffff, C_00000002);
/* 22: */ OP(icode, &ptr, iMACINT1, ETRAM_ADDR(ipcm->etram[0]), GPR(gpr + 8), GPR_DBAC, C_ffffffff);
/* 23: */ OP(icode, &ptr, iMACINT1, ETRAM_ADDR(ipcm->etram[1]), GPR(gpr + 9), GPR_DBAC, C_ffffffff);
/* 24: */
gpr += 13;
/* Wave Playback Volume */
for (z = 0; z < 2; z++)
VOLUME(icode, &ptr, playback + z, z, gpr + z);
snd_emu10k1_init_stereo_control(controls + i++, "Wave Playback Volume", gpr, 100);
gpr += 2;
/* Wave Surround Playback Volume */
for (z = 0; z < 2; z++)
VOLUME(icode, &ptr, playback + 2 + z, z, gpr + z);
snd_emu10k1_init_stereo_control(controls + i++, "Wave Surround Playback Volume", gpr, 0);
gpr += 2;
/* Wave Center/LFE Playback Volume */
OP(icode, &ptr, iACC3, GPR(tmp + 0), FXBUS(FXBUS_PCM_LEFT), FXBUS(FXBUS_PCM_RIGHT), C_00000000);
OP(icode, &ptr, iMACINT0, GPR(tmp + 0), C_00000000, GPR(tmp + 0), C_00000004);
VOLUME(icode, &ptr, playback + 4, tmp + 0, gpr);
snd_emu10k1_init_mono_control(controls + i++, "Wave Center Playback Volume", gpr++, 0);
VOLUME(icode, &ptr, playback + 5, tmp + 0, gpr);
snd_emu10k1_init_mono_control(controls + i++, "Wave LFE Playback Volume", gpr++, 0);
/* Wave Capture Volume + Switch */
for (z = 0; z < 2; z++) {
SWITCH(icode, &ptr, tmp + 0, z, gpr + 2 + z);
VOLUME(icode, &ptr, capture + z, tmp + 0, gpr + z);
}
snd_emu10k1_init_stereo_control(controls + i++, "Wave Capture Volume", gpr, 0);
snd_emu10k1_init_stereo_onoff_control(controls + i++, "Wave Capture Switch", gpr + 2, 0);
gpr += 4;
/* Synth Playback Volume */
for (z = 0; z < 2; z++)
VOLUME_ADD(icode, &ptr, playback + z, 2 + z, gpr + z);
snd_emu10k1_init_stereo_control(controls + i++, "Synth Playback Volume", gpr, 100);
gpr += 2;
/* Synth Capture Volume + Switch */
for (z = 0; z < 2; z++) {
SWITCH(icode, &ptr, tmp + 0, 2 + z, gpr + 2 + z);
VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
}
snd_emu10k1_init_stereo_control(controls + i++, "Synth Capture Volume", gpr, 0);
snd_emu10k1_init_stereo_onoff_control(controls + i++, "Synth Capture Switch", gpr + 2, 0);
gpr += 4;
/* Surround Digital Playback Volume (renamed later without Digital) */
for (z = 0; z < 2; z++)
VOLUME_ADD(icode, &ptr, playback + 2 + z, 4 + z, gpr + z);
snd_emu10k1_init_stereo_control(controls + i++, "Surround Digital Playback Volume", gpr, 100);
gpr += 2;
/* Surround Capture Volume + Switch */
for (z = 0; z < 2; z++) {
SWITCH(icode, &ptr, tmp + 0, 4 + z, gpr + 2 + z);
VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
}
snd_emu10k1_init_stereo_control(controls + i++, "Surround Capture Volume", gpr, 0);
snd_emu10k1_init_stereo_onoff_control(controls + i++, "Surround Capture Switch", gpr + 2, 0);
gpr += 4;
/* Center Playback Volume (renamed later without Digital) */
VOLUME_ADD(icode, &ptr, playback + 4, 6, gpr);
snd_emu10k1_init_mono_control(controls + i++, "Center Digital Playback Volume", gpr++, 100);
/* LFE Playback Volume + Switch (renamed later without Digital) */
VOLUME_ADD(icode, &ptr, playback + 5, 7, gpr);
snd_emu10k1_init_mono_control(controls + i++, "LFE Digital Playback Volume", gpr++, 100);
/* Front Playback Volume */
for (z = 0; z < 2; z++)
VOLUME_ADD(icode, &ptr, playback + z, 10 + z, gpr + z);
snd_emu10k1_init_stereo_control(controls + i++, "Front Playback Volume", gpr, 100);
gpr += 2;
/* Front Capture Volume + Switch */
for (z = 0; z < 2; z++) {
SWITCH(icode, &ptr, tmp + 0, 10 + z, gpr + 2);
VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
}
snd_emu10k1_init_stereo_control(controls + i++, "Front Capture Volume", gpr, 0);
snd_emu10k1_init_mono_onoff_control(controls + i++, "Front Capture Switch", gpr + 2, 0);
gpr += 3;
/*
* Process inputs
*/
if (emu->fx8010.extin_mask & ((1<<EXTIN_AC97_L)|(1<<EXTIN_AC97_R))) {
/* AC'97 Playback Volume */
VOLUME_ADDIN(icode, &ptr, playback + 0, EXTIN_AC97_L, gpr); gpr++;
VOLUME_ADDIN(icode, &ptr, playback + 1, EXTIN_AC97_R, gpr); gpr++;
snd_emu10k1_init_stereo_control(controls + i++, "AC97 Playback Volume", gpr-2, 0);
/* AC'97 Capture Volume */
VOLUME_ADDIN(icode, &ptr, capture + 0, EXTIN_AC97_L, gpr); gpr++;
VOLUME_ADDIN(icode, &ptr, capture + 1, EXTIN_AC97_R, gpr); gpr++;
snd_emu10k1_init_stereo_control(controls + i++, "AC97 Capture Volume", gpr-2, 100);
}
if (emu->fx8010.extin_mask & ((1<<EXTIN_SPDIF_CD_L)|(1<<EXTIN_SPDIF_CD_R))) {
/* IEC958 TTL Playback Volume */
for (z = 0; z < 2; z++)
VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_SPDIF_CD_L + z, gpr + z);
snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("TTL ",PLAYBACK,VOLUME), gpr, 0);
gpr += 2;
/* IEC958 TTL Capture Volume + Switch */
for (z = 0; z < 2; z++) {
SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_SPDIF_CD_L + z, gpr + 2 + z);
VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
}
snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("TTL ",CAPTURE,VOLUME), gpr, 0);
snd_emu10k1_init_stereo_onoff_control(controls + i++, SNDRV_CTL_NAME_IEC958("TTL ",CAPTURE,SWITCH), gpr + 2, 0);
gpr += 4;
}
if (emu->fx8010.extin_mask & ((1<<EXTIN_ZOOM_L)|(1<<EXTIN_ZOOM_R))) {
/* Zoom Video Playback Volume */
for (z = 0; z < 2; z++)
VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_ZOOM_L + z, gpr + z);
snd_emu10k1_init_stereo_control(controls + i++, "Zoom Video Playback Volume", gpr, 0);
gpr += 2;
/* Zoom Video Capture Volume + Switch */
for (z = 0; z < 2; z++) {
SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_ZOOM_L + z, gpr + 2 + z);
VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
}
snd_emu10k1_init_stereo_control(controls + i++, "Zoom Video Capture Volume", gpr, 0);
snd_emu10k1_init_stereo_onoff_control(controls + i++, "Zoom Video Capture Switch", gpr + 2, 0);
gpr += 4;
}
if (emu->fx8010.extin_mask & ((1<<EXTIN_TOSLINK_L)|(1<<EXTIN_TOSLINK_R))) {
/* IEC958 Optical Playback Volume */
for (z = 0; z < 2; z++)
VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_TOSLINK_L + z, gpr + z);
snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("LiveDrive ",PLAYBACK,VOLUME), gpr, 0);
gpr += 2;
/* IEC958 Optical Capture Volume */
for (z = 0; z < 2; z++) {
SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_TOSLINK_L + z, gpr + 2 + z);
VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
}
snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("LiveDrive ",CAPTURE,VOLUME), gpr, 0);
snd_emu10k1_init_stereo_onoff_control(controls + i++, SNDRV_CTL_NAME_IEC958("LiveDrive ",CAPTURE,SWITCH), gpr + 2, 0);
gpr += 4;
}
if (emu->fx8010.extin_mask & ((1<<EXTIN_LINE1_L)|(1<<EXTIN_LINE1_R))) {
/* Line LiveDrive Playback Volume */
for (z = 0; z < 2; z++)
VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_LINE1_L + z, gpr + z);
snd_emu10k1_init_stereo_control(controls + i++, "Line LiveDrive Playback Volume", gpr, 0);
gpr += 2;
/* Line LiveDrive Capture Volume + Switch */
for (z = 0; z < 2; z++) {
SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_LINE1_L + z, gpr + 2 + z);
VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
}
snd_emu10k1_init_stereo_control(controls + i++, "Line LiveDrive Capture Volume", gpr, 0);
snd_emu10k1_init_stereo_onoff_control(controls + i++, "Line LiveDrive Capture Switch", gpr + 2, 0);
gpr += 4;
}
if (emu->fx8010.extin_mask & ((1<<EXTIN_COAX_SPDIF_L)|(1<<EXTIN_COAX_SPDIF_R))) {
/* IEC958 Coax Playback Volume */
for (z = 0; z < 2; z++)
VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_COAX_SPDIF_L + z, gpr + z);
snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("Coaxial ",PLAYBACK,VOLUME), gpr, 0);
gpr += 2;
/* IEC958 Coax Capture Volume + Switch */
for (z = 0; z < 2; z++) {
SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_COAX_SPDIF_L + z, gpr + 2 + z);
VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
}
snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("Coaxial ",CAPTURE,VOLUME), gpr, 0);
snd_emu10k1_init_stereo_onoff_control(controls + i++, SNDRV_CTL_NAME_IEC958("Coaxial ",CAPTURE,SWITCH), gpr + 2, 0);
gpr += 4;
}
if (emu->fx8010.extin_mask & ((1<<EXTIN_LINE2_L)|(1<<EXTIN_LINE2_R))) {
/* Line LiveDrive Playback Volume */
for (z = 0; z < 2; z++)
VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_LINE2_L + z, gpr + z);
snd_emu10k1_init_stereo_control(controls + i++, "Line2 LiveDrive Playback Volume", gpr, 0);
controls[i-1].id.index = 1;
gpr += 2;
/* Line LiveDrive Capture Volume */
for (z = 0; z < 2; z++) {
SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_LINE2_L + z, gpr + 2 + z);
VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
}
snd_emu10k1_init_stereo_control(controls + i++, "Line2 LiveDrive Capture Volume", gpr, 0);
controls[i-1].id.index = 1;
snd_emu10k1_init_stereo_onoff_control(controls + i++, "Line2 LiveDrive Capture Switch", gpr + 2, 0);
controls[i-1].id.index = 1;
gpr += 4;
}
/*
* Process tone control
*/
ctl = &controls[i + 0];
ctl->id.iface = (__force int)SNDRV_CTL_ELEM_IFACE_MIXER;
strcpy(ctl->id.name, "Tone Control - Bass");
ctl->vcount = 2;
ctl->count = 10;
ctl->min = 0;
ctl->max = 40;
ctl->value[0] = ctl->value[1] = 20;
ctl->tlv = snd_emu10k1_bass_treble_db_scale;
ctl->translation = EMU10K1_GPR_TRANSLATION_BASS;
ctl = &controls[i + 1];
ctl->id.iface = (__force int)SNDRV_CTL_ELEM_IFACE_MIXER;
strcpy(ctl->id.name, "Tone Control - Treble");
ctl->vcount = 2;
ctl->count = 10;
ctl->min = 0;
ctl->max = 40;
ctl->value[0] = ctl->value[1] = 20;
ctl->tlv = snd_emu10k1_bass_treble_db_scale;
ctl->translation = EMU10K1_GPR_TRANSLATION_TREBLE;
#define BASS_GPR 0x8c
#define TREBLE_GPR 0x96
for (z = 0; z < 5; z++) {
int j;
for (j = 0; j < 2; j++) {
controls[i + 0].gpr[z * 2 + j] = BASS_GPR + z * 2 + j;
controls[i + 1].gpr[z * 2 + j] = TREBLE_GPR + z * 2 + j;
}
}
i += 2;
OP(icode, &ptr, iACC3, C_00000000, GPR(gpr), C_00000000, C_00000000);
snd_emu10k1_init_mono_onoff_control(controls + i++, "Tone Control - Switch", gpr, 0);
gpr++;
OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_ZERO, GPR(gpr));
ptr_skip = ptr;
for (z = 0; z < 3; z++) { /* front/rear/center-lfe */
int j, k, l, d;
for (j = 0; j < 2; j++) { /* left/right */
k = 0xa0 + (z * 8) + (j * 4);
l = 0xd0 + (z * 8) + (j * 4);
d = playback + z * 2 + j;
OP(icode, &ptr, iMAC0, C_00000000, C_00000000, GPR(d), GPR(BASS_GPR + 0 + j));
OP(icode, &ptr, iMACMV, GPR(k+1), GPR(k), GPR(k+1), GPR(BASS_GPR + 4 + j));
OP(icode, &ptr, iMACMV, GPR(k), GPR(d), GPR(k), GPR(BASS_GPR + 2 + j));
OP(icode, &ptr, iMACMV, GPR(k+3), GPR(k+2), GPR(k+3), GPR(BASS_GPR + 8 + j));
OP(icode, &ptr, iMAC0, GPR(k+2), GPR_ACCU, GPR(k+2), GPR(BASS_GPR + 6 + j));
OP(icode, &ptr, iACC3, GPR(k+2), GPR(k+2), GPR(k+2), C_00000000);
OP(icode, &ptr, iMAC0, C_00000000, C_00000000, GPR(k+2), GPR(TREBLE_GPR + 0 + j));
OP(icode, &ptr, iMACMV, GPR(l+1), GPR(l), GPR(l+1), GPR(TREBLE_GPR + 4 + j));
OP(icode, &ptr, iMACMV, GPR(l), GPR(k+2), GPR(l), GPR(TREBLE_GPR + 2 + j));
OP(icode, &ptr, iMACMV, GPR(l+3), GPR(l+2), GPR(l+3), GPR(TREBLE_GPR + 8 + j));
OP(icode, &ptr, iMAC0, GPR(l+2), GPR_ACCU, GPR(l+2), GPR(TREBLE_GPR + 6 + j));
OP(icode, &ptr, iMACINT0, GPR(l+2), C_00000000, GPR(l+2), C_00000010);
OP(icode, &ptr, iACC3, GPR(d), GPR(l+2), C_00000000, C_00000000);
if (z == 2) /* center */
break;
}
}
gpr_map[gpr++] = ptr - ptr_skip;
#undef BASS_GPR
#undef TREBLE_GPR
/*
* Process outputs
*/
if (emu->fx8010.extout_mask & ((1<<EXTOUT_AC97_L)|(1<<EXTOUT_AC97_R))) {
/* AC'97 Playback Volume */
for (z = 0; z < 2; z++)
OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_L + z), GPR(playback + z), C_00000000, C_00000000);
}
if (emu->fx8010.extout_mask & ((1<<EXTOUT_TOSLINK_L)|(1<<EXTOUT_TOSLINK_R))) {
/* IEC958 Optical Raw Playback Switch */
for (z = 0; z < 2; z++) {
SWITCH(icode, &ptr, tmp + 0, 8 + z, gpr + z);
SWITCH_NEG(icode, &ptr, tmp + 1, gpr + z);
SWITCH(icode, &ptr, tmp + 1, playback + z, tmp + 1);
OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_TOSLINK_L + z), GPR(tmp + 0), GPR(tmp + 1), C_00000000);
#ifdef EMU10K1_CAPTURE_DIGITAL_OUT
OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ADC_CAP_L + z), GPR(tmp + 0), GPR(tmp + 1), C_00000000);
#endif
}
snd_emu10k1_init_stereo_onoff_control(controls + i++, SNDRV_CTL_NAME_IEC958("Optical Raw ",PLAYBACK,SWITCH), gpr, 0);
gpr += 2;
}
if (emu->fx8010.extout_mask & ((1<<EXTOUT_HEADPHONE_L)|(1<<EXTOUT_HEADPHONE_R))) {
/* Headphone Playback Volume */
for (z = 0; z < 2; z++) {
SWITCH(icode, &ptr, tmp + 0, playback + 4 + z, gpr + 2 + z);
SWITCH_NEG(icode, &ptr, tmp + 1, gpr + 2 + z);
SWITCH(icode, &ptr, tmp + 1, playback + z, tmp + 1);
OP(icode, &ptr, iACC3, GPR(tmp + 0), GPR(tmp + 0), GPR(tmp + 1), C_00000000);
VOLUME_OUT(icode, &ptr, EXTOUT_HEADPHONE_L + z, tmp + 0, gpr + z);
}
snd_emu10k1_init_stereo_control(controls + i++, "Headphone Playback Volume", gpr + 0, 0);
controls[i-1].id.index = 1; /* AC'97 can have also Headphone control */
snd_emu10k1_init_mono_onoff_control(controls + i++, "Headphone Center Playback Switch", gpr + 2, 0);
controls[i-1].id.index = 1;
snd_emu10k1_init_mono_onoff_control(controls + i++, "Headphone LFE Playback Switch", gpr + 3, 0);
controls[i-1].id.index = 1;
gpr += 4;
}
if (emu->fx8010.extout_mask & ((1<<EXTOUT_REAR_L)|(1<<EXTOUT_REAR_R)))
for (z = 0; z < 2; z++)
OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_REAR_L + z), GPR(playback + 2 + z), C_00000000, C_00000000);
if (emu->fx8010.extout_mask & ((1<<EXTOUT_AC97_REAR_L)|(1<<EXTOUT_AC97_REAR_R)))
for (z = 0; z < 2; z++)
OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_REAR_L + z), GPR(playback + 2 + z), C_00000000, C_00000000);
if (emu->fx8010.extout_mask & (1<<EXTOUT_AC97_CENTER)) {
#ifndef EMU10K1_CENTER_LFE_FROM_FRONT
OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_CENTER), GPR(playback + 4), C_00000000, C_00000000);
OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ACENTER), GPR(playback + 4), C_00000000, C_00000000);
#else
OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_CENTER), GPR(playback + 0), C_00000000, C_00000000);
OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ACENTER), GPR(playback + 0), C_00000000, C_00000000);
#endif
}
if (emu->fx8010.extout_mask & (1<<EXTOUT_AC97_LFE)) {
#ifndef EMU10K1_CENTER_LFE_FROM_FRONT
OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_LFE), GPR(playback + 5), C_00000000, C_00000000);
OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ALFE), GPR(playback + 5), C_00000000, C_00000000);
#else
OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_LFE), GPR(playback + 1), C_00000000, C_00000000);
OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ALFE), GPR(playback + 1), C_00000000, C_00000000);
#endif
}
#ifndef EMU10K1_CAPTURE_DIGITAL_OUT
for (z = 0; z < 2; z++)
OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ADC_CAP_L + z), GPR(capture + z), C_00000000, C_00000000);
#endif
if (emu->fx8010.extout_mask & (1<<EXTOUT_MIC_CAP))
OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_MIC_CAP), GPR(capture + 2), C_00000000, C_00000000);
/* EFX capture - capture the 16 EXTINS */
if (emu->card_capabilities->sblive51) {
for (z = 0; z < 16; z++) {
s8 c = snd_emu10k1_sblive51_fxbus2_map[z];
if (c != -1)
OP(icode, &ptr, iACC3, FXBUS2(z), C_00000000, C_00000000, EXTIN(c));
}
} else {
for (z = 0; z < 16; z++)
OP(icode, &ptr, iACC3, FXBUS2(z), C_00000000, C_00000000, EXTIN(z));
}
if (gpr > tmp) {
snd_BUG();
err = -EIO;
goto __err;
}
if (i > SND_EMU10K1_GPR_CONTROLS) {
snd_BUG();
err = -EIO;
goto __err;
}
/* clear remaining instruction memory */
while (ptr < 0x200)
OP(icode, &ptr, iACC3, C_00000000, C_00000000, C_00000000, C_00000000);
err = snd_emu10k1_fx8010_tram_setup(emu, ipcm->buffer_size);
if (err < 0)
goto __err;
icode->gpr_add_control_count = i;
icode->gpr_add_controls = controls;
emu->support_tlv = 1; /* support TLV */
err = snd_emu10k1_icode_poke(emu, icode, true);
emu->support_tlv = 0; /* clear again */
if (err >= 0)
err = snd_emu10k1_ipcm_poke(emu, ipcm);
__err:
kfree(ipcm);
__err_ipcm:
kfree(controls);
__err_ctrls:
kfree(icode->gpr_map);
__err_gpr:
kfree(icode);
return err;
}
int snd_emu10k1_init_efx(struct snd_emu10k1 *emu)
{
spin_lock_init(&emu->fx8010.irq_lock);
INIT_LIST_HEAD(&emu->fx8010.gpr_ctl);
if (emu->audigy)
return _snd_emu10k1_audigy_init_efx(emu);
else
return _snd_emu10k1_init_efx(emu);
}
void snd_emu10k1_free_efx(struct snd_emu10k1 *emu)
{
/* stop processor */
if (emu->audigy)
snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg = A_DBG_SINGLE_STEP);
else
snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg = EMU10K1_DBG_SINGLE_STEP);
}
#if 0 /* FIXME: who use them? */
int snd_emu10k1_fx8010_tone_control_activate(struct snd_emu10k1 *emu, int output)
{
if (output < 0 || output >= 6)
return -EINVAL;
snd_emu10k1_ptr_write(emu, emu->gpr_base + 0x94 + output, 0, 1);
return 0;
}
int snd_emu10k1_fx8010_tone_control_deactivate(struct snd_emu10k1 *emu, int output)
{
if (output < 0 || output >= 6)
return -EINVAL;
snd_emu10k1_ptr_write(emu, emu->gpr_base + 0x94 + output, 0, 0);
return 0;
}
#endif
int snd_emu10k1_fx8010_tram_setup(struct snd_emu10k1 *emu, u32 size)
{
u8 size_reg = 0;
/* size is in samples */
if (size != 0) {
size = (size - 1) >> 13;
while (size) {
size >>= 1;
size_reg++;
}
size = 0x2000 << size_reg;
}
if ((emu->fx8010.etram_pages.bytes / 2) == size)
return 0;
spin_lock_irq(&emu->emu_lock);
outl(HCFG_LOCKTANKCACHE_MASK | inl(emu->port + HCFG), emu->port + HCFG);
spin_unlock_irq(&emu->emu_lock);
snd_emu10k1_ptr_write(emu, TCB, 0, 0);
snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K);
if (emu->fx8010.etram_pages.area != NULL) {
snd_dma_free_pages(&emu->fx8010.etram_pages);
emu->fx8010.etram_pages.area = NULL;
emu->fx8010.etram_pages.bytes = 0;
}
if (size > 0) {
if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, &emu->pci->dev,
size * 2, &emu->fx8010.etram_pages) < 0)
return -ENOMEM;
memset(emu->fx8010.etram_pages.area, 0, size * 2);
snd_emu10k1_ptr_write(emu, TCB, 0, emu->fx8010.etram_pages.addr);
snd_emu10k1_ptr_write(emu, TCBS, 0, size_reg);
spin_lock_irq(&emu->emu_lock);
outl(inl(emu->port + HCFG) & ~HCFG_LOCKTANKCACHE_MASK, emu->port + HCFG);
spin_unlock_irq(&emu->emu_lock);
}
return 0;
}
static int snd_emu10k1_fx8010_open(struct snd_hwdep * hw, struct file *file)
{
return 0;
}
static void copy_string(char *dst, const char *src, const char *null, int idx)
{
if (src == NULL)
sprintf(dst, "%s %02X", null, idx);
else
strcpy(dst, src);
}
static void snd_emu10k1_fx8010_info(struct snd_emu10k1 *emu,
struct snd_emu10k1_fx8010_info *info)
{
const char * const *fxbus, * const *extin, * const *extout;
unsigned short extin_mask, extout_mask;
int res;
info->internal_tram_size = emu->fx8010.itram_size;
info->external_tram_size = emu->fx8010.etram_pages.bytes / 2;
fxbus = snd_emu10k1_fxbus;
extin = emu->audigy ? snd_emu10k1_audigy_ins : snd_emu10k1_sblive_ins;
extout = emu->audigy ? snd_emu10k1_audigy_outs : snd_emu10k1_sblive_outs;
extin_mask = emu->audigy ? ~0 : emu->fx8010.extin_mask;
extout_mask = emu->audigy ? ~0 : emu->fx8010.extout_mask;
for (res = 0; res < 16; res++, fxbus++, extin++, extout++) {
copy_string(info->fxbus_names[res], *fxbus, "FXBUS", res);
copy_string(info->extin_names[res], extin_mask & (1 << res) ? *extin : NULL, "Unused", res);
copy_string(info->extout_names[res], extout_mask & (1 << res) ? *extout : NULL, "Unused", res);
}
for (res = 16; res < 32; res++, extout++)
copy_string(info->extout_names[res], extout_mask & (1 << res) ? *extout : NULL, "Unused", res);
info->gpr_controls = emu->fx8010.gpr_count;
}
static int snd_emu10k1_fx8010_ioctl(struct snd_hwdep * hw, struct file *file, unsigned int cmd, unsigned long arg)
{
struct snd_emu10k1 *emu = hw->private_data;
struct snd_emu10k1_fx8010_info *info;
struct snd_emu10k1_fx8010_code *icode;
struct snd_emu10k1_fx8010_pcm_rec *ipcm;
unsigned int addr;
void __user *argp = (void __user *)arg;
int res;
switch (cmd) {
case SNDRV_EMU10K1_IOCTL_PVERSION:
emu->support_tlv = 1;
return put_user(SNDRV_EMU10K1_VERSION, (int __user *)argp);
case SNDRV_EMU10K1_IOCTL_INFO:
info = kzalloc(sizeof(*info), GFP_KERNEL);
if (!info)
return -ENOMEM;
snd_emu10k1_fx8010_info(emu, info);
if (copy_to_user(argp, info, sizeof(*info))) {
kfree(info);
return -EFAULT;
}
kfree(info);
return 0;
case SNDRV_EMU10K1_IOCTL_CODE_POKE:
if (!capable(CAP_SYS_ADMIN))
return -EPERM;
icode = memdup_user(argp, sizeof(*icode));
if (IS_ERR(icode))
return PTR_ERR(icode);
res = snd_emu10k1_icode_poke(emu, icode, false);
kfree(icode);
return res;
case SNDRV_EMU10K1_IOCTL_CODE_PEEK:
icode = memdup_user(argp, sizeof(*icode));
if (IS_ERR(icode))
return PTR_ERR(icode);
res = snd_emu10k1_icode_peek(emu, icode);
if (res == 0 && copy_to_user(argp, icode, sizeof(*icode))) {
kfree(icode);
return -EFAULT;
}
kfree(icode);
return res;
case SNDRV_EMU10K1_IOCTL_PCM_POKE:
ipcm = memdup_user(argp, sizeof(*ipcm));
if (IS_ERR(ipcm))
return PTR_ERR(ipcm);
res = snd_emu10k1_ipcm_poke(emu, ipcm);
kfree(ipcm);
return res;
case SNDRV_EMU10K1_IOCTL_PCM_PEEK:
ipcm = memdup_user(argp, sizeof(*ipcm));
if (IS_ERR(ipcm))
return PTR_ERR(ipcm);
res = snd_emu10k1_ipcm_peek(emu, ipcm);
if (res == 0 && copy_to_user(argp, ipcm, sizeof(*ipcm))) {
kfree(ipcm);
return -EFAULT;
}
kfree(ipcm);
return res;
case SNDRV_EMU10K1_IOCTL_TRAM_SETUP:
if (!capable(CAP_SYS_ADMIN))
return -EPERM;
if (get_user(addr, (unsigned int __user *)argp))
return -EFAULT;
mutex_lock(&emu->fx8010.lock);
res = snd_emu10k1_fx8010_tram_setup(emu, addr);
mutex_unlock(&emu->fx8010.lock);
return res;
case SNDRV_EMU10K1_IOCTL_STOP:
if (!capable(CAP_SYS_ADMIN))
return -EPERM;
if (emu->audigy)
snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg |= A_DBG_SINGLE_STEP);
else
snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg |= EMU10K1_DBG_SINGLE_STEP);
return 0;
case SNDRV_EMU10K1_IOCTL_CONTINUE:
if (!capable(CAP_SYS_ADMIN))
return -EPERM;
if (emu->audigy)
snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg = 0);
else
snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg = 0);
return 0;
case SNDRV_EMU10K1_IOCTL_ZERO_TRAM_COUNTER:
if (!capable(CAP_SYS_ADMIN))
return -EPERM;
if (emu->audigy)
snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg | A_DBG_ZC);
else
snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg | EMU10K1_DBG_ZC);
udelay(10);
if (emu->audigy)
snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg);
else
snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg);
return 0;
case SNDRV_EMU10K1_IOCTL_SINGLE_STEP:
if (!capable(CAP_SYS_ADMIN))
return -EPERM;
if (get_user(addr, (unsigned int __user *)argp))
return -EFAULT;
if (emu->audigy) {
if (addr > A_DBG_STEP_ADDR)
return -EINVAL;
snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg |= A_DBG_SINGLE_STEP);
udelay(10);
snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg | A_DBG_STEP | addr);
} else {
if (addr > EMU10K1_DBG_SINGLE_STEP_ADDR)
return -EINVAL;
snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg |= EMU10K1_DBG_SINGLE_STEP);
udelay(10);
snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg | EMU10K1_DBG_STEP | addr);
}
return 0;
case SNDRV_EMU10K1_IOCTL_DBG_READ:
if (emu->audigy)
addr = snd_emu10k1_ptr_read(emu, A_DBG, 0);
else
addr = snd_emu10k1_ptr_read(emu, DBG, 0);
if (put_user(addr, (unsigned int __user *)argp))
return -EFAULT;
return 0;
}
return -ENOTTY;
}
static int snd_emu10k1_fx8010_release(struct snd_hwdep * hw, struct file *file)
{
return 0;
}
int snd_emu10k1_fx8010_new(struct snd_emu10k1 *emu, int device)
{
struct snd_hwdep *hw;
int err;
err = snd_hwdep_new(emu->card, "FX8010", device, &hw);
if (err < 0)
return err;
strcpy(hw->name, "EMU10K1 (FX8010)");
hw->iface = SNDRV_HWDEP_IFACE_EMU10K1;
hw->ops.open = snd_emu10k1_fx8010_open;
hw->ops.ioctl = snd_emu10k1_fx8010_ioctl;
hw->ops.release = snd_emu10k1_fx8010_release;
hw->private_data = emu;
return 0;
}
#ifdef CONFIG_PM_SLEEP
int snd_emu10k1_efx_alloc_pm_buffer(struct snd_emu10k1 *emu)
{
int len;
len = emu->audigy ? 0x200 : 0x100;
emu->saved_gpr = kmalloc_array(len, 4, GFP_KERNEL);
if (! emu->saved_gpr)
return -ENOMEM;
len = emu->audigy ? 0x100 : 0xa0;
emu->tram_val_saved = kmalloc_array(len, 4, GFP_KERNEL);
emu->tram_addr_saved = kmalloc_array(len, 4, GFP_KERNEL);
if (! emu->tram_val_saved || ! emu->tram_addr_saved)
return -ENOMEM;
len = emu->audigy ? 2 * 1024 : 2 * 512;
emu->saved_icode = vmalloc(array_size(len, 4));
if (! emu->saved_icode)
return -ENOMEM;
return 0;
}
void snd_emu10k1_efx_free_pm_buffer(struct snd_emu10k1 *emu)
{
kfree(emu->saved_gpr);
kfree(emu->tram_val_saved);
kfree(emu->tram_addr_saved);
vfree(emu->saved_icode);
}
/*
* save/restore GPR, TRAM and codes
*/
void snd_emu10k1_efx_suspend(struct snd_emu10k1 *emu)
{
int i, len;
len = emu->audigy ? 0x200 : 0x100;
for (i = 0; i < len; i++)
emu->saved_gpr[i] = snd_emu10k1_ptr_read(emu, emu->gpr_base + i, 0);
len = emu->audigy ? 0x100 : 0xa0;
for (i = 0; i < len; i++) {
emu->tram_val_saved[i] = snd_emu10k1_ptr_read(emu, TANKMEMDATAREGBASE + i, 0);
emu->tram_addr_saved[i] = snd_emu10k1_ptr_read(emu, TANKMEMADDRREGBASE + i, 0);
if (emu->audigy) {
emu->tram_addr_saved[i] >>= 12;
emu->tram_addr_saved[i] |=
snd_emu10k1_ptr_read(emu, A_TANKMEMCTLREGBASE + i, 0) << 20;
}
}
len = emu->audigy ? 2 * 1024 : 2 * 512;
for (i = 0; i < len; i++)
emu->saved_icode[i] = snd_emu10k1_efx_read(emu, i);
}
void snd_emu10k1_efx_resume(struct snd_emu10k1 *emu)
{
int i, len;
/* set up TRAM */
if (emu->fx8010.etram_pages.bytes > 0) {
unsigned size, size_reg = 0;
size = emu->fx8010.etram_pages.bytes / 2;
size = (size - 1) >> 13;
while (size) {
size >>= 1;
size_reg++;
}
outl(HCFG_LOCKTANKCACHE_MASK | inl(emu->port + HCFG), emu->port + HCFG);
snd_emu10k1_ptr_write(emu, TCB, 0, emu->fx8010.etram_pages.addr);
snd_emu10k1_ptr_write(emu, TCBS, 0, size_reg);
outl(inl(emu->port + HCFG) & ~HCFG_LOCKTANKCACHE_MASK, emu->port + HCFG);
}
if (emu->audigy)
snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg | A_DBG_SINGLE_STEP);
else
snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg | EMU10K1_DBG_SINGLE_STEP);
len = emu->audigy ? 0x200 : 0x100;
for (i = 0; i < len; i++)
snd_emu10k1_ptr_write(emu, emu->gpr_base + i, 0, emu->saved_gpr[i]);
len = emu->audigy ? 0x100 : 0xa0;
for (i = 0; i < len; i++) {
snd_emu10k1_ptr_write(emu, TANKMEMDATAREGBASE + i, 0,
emu->tram_val_saved[i]);
if (! emu->audigy)
snd_emu10k1_ptr_write(emu, TANKMEMADDRREGBASE + i, 0,
emu->tram_addr_saved[i]);
else {
snd_emu10k1_ptr_write(emu, TANKMEMADDRREGBASE + i, 0,
emu->tram_addr_saved[i] << 12);
snd_emu10k1_ptr_write(emu, TANKMEMADDRREGBASE + i, 0,
emu->tram_addr_saved[i] >> 20);
}
}
len = emu->audigy ? 2 * 1024 : 2 * 512;
for (i = 0; i < len; i++)
snd_emu10k1_efx_write(emu, i, emu->saved_icode[i]);
/* start FX processor when the DSP code is updated */
if (emu->audigy)
snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg);
else
snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg);
}
#endif
| linux-master | sound/pci/emu10k1/emufx.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (c) by Jaroslav Kysela <[email protected]>
* Lee Revell <[email protected]>
* Oswald Buddenhagen <[email protected]>
* Creative Labs, Inc.
*
* Routines for control of EMU10K1 chips - voice manager
*/
#include <linux/time.h>
#include <linux/export.h>
#include <sound/core.h>
#include <sound/emu10k1.h>
/* Previously the voice allocator started at 0 every time. The new voice
* allocator uses a round robin scheme. The next free voice is tracked in
* the card record and each allocation begins where the last left off. The
* hardware requires stereo interleaved voices be aligned to an even/odd
* boundary.
* --rlrevell
*/
static int voice_alloc(struct snd_emu10k1 *emu, int type, int number,
struct snd_emu10k1_pcm *epcm, struct snd_emu10k1_voice **rvoice)
{
struct snd_emu10k1_voice *voice;
int i, j, k, skip;
for (i = emu->next_free_voice, j = 0; j < NUM_G; i = (i + skip) % NUM_G, j += skip) {
/*
dev_dbg(emu->card->dev, "i %d j %d next free %d!\n",
i, j, emu->next_free_voice);
*/
/* stereo voices must be even/odd */
if ((number > 1) && (i % 2)) {
skip = 1;
continue;
}
for (k = 0; k < number; k++) {
voice = &emu->voices[i + k];
if (voice->use) {
skip = k + 1;
goto next;
}
}
for (k = 0; k < number; k++) {
voice = &emu->voices[i + k];
voice->use = type;
voice->epcm = epcm;
/* dev_dbg(emu->card->dev, "allocated voice %d\n", i + k); */
}
voice->last = 1;
*rvoice = &emu->voices[i];
emu->next_free_voice = (i + number) % NUM_G;
return 0;
next: ;
}
return -ENOMEM; // -EBUSY would have been better
}
static void voice_free(struct snd_emu10k1 *emu,
struct snd_emu10k1_voice *pvoice)
{
if (pvoice->dirty)
snd_emu10k1_voice_init(emu, pvoice->number);
pvoice->interrupt = NULL;
pvoice->use = pvoice->dirty = pvoice->last = 0;
pvoice->epcm = NULL;
}
int snd_emu10k1_voice_alloc(struct snd_emu10k1 *emu, int type, int count, int channels,
struct snd_emu10k1_pcm *epcm, struct snd_emu10k1_voice **rvoice)
{
unsigned long flags;
int result;
if (snd_BUG_ON(!rvoice))
return -EINVAL;
if (snd_BUG_ON(!count))
return -EINVAL;
if (snd_BUG_ON(!channels))
return -EINVAL;
spin_lock_irqsave(&emu->voice_lock, flags);
for (int got = 0; got < channels; ) {
result = voice_alloc(emu, type, count, epcm, &rvoice[got]);
if (result == 0) {
got++;
/*
dev_dbg(emu->card->dev, "voice alloc - %i, %i of %i\n",
rvoice[got - 1]->number, got, want);
*/
continue;
}
if (type != EMU10K1_SYNTH && emu->get_synth_voice) {
/* free a voice from synth */
result = emu->get_synth_voice(emu);
if (result >= 0) {
voice_free(emu, &emu->voices[result]);
continue;
}
}
for (int i = 0; i < got; i++) {
for (int j = 0; j < count; j++)
voice_free(emu, rvoice[i] + j);
rvoice[i] = NULL;
}
break;
}
spin_unlock_irqrestore(&emu->voice_lock, flags);
return result;
}
EXPORT_SYMBOL(snd_emu10k1_voice_alloc);
int snd_emu10k1_voice_free(struct snd_emu10k1 *emu,
struct snd_emu10k1_voice *pvoice)
{
unsigned long flags;
int last;
if (snd_BUG_ON(!pvoice))
return -EINVAL;
spin_lock_irqsave(&emu->voice_lock, flags);
do {
last = pvoice->last;
voice_free(emu, pvoice++);
} while (!last);
spin_unlock_irqrestore(&emu->voice_lock, flags);
return 0;
}
EXPORT_SYMBOL(snd_emu10k1_voice_free);
| linux-master | sound/pci/emu10k1/voice.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2000 Takashi Iwai <[email protected]>
*
* Routines for control of EMU10K1 WaveTable synth
*/
#include "emu10k1_synth_local.h"
#include <linux/init.h>
#include <linux/module.h>
MODULE_AUTHOR("Takashi Iwai");
MODULE_DESCRIPTION("Routines for control of EMU10K1 WaveTable synth");
MODULE_LICENSE("GPL");
/*
* create a new hardware dependent device for Emu10k1
*/
static int snd_emu10k1_synth_probe(struct device *_dev)
{
struct snd_seq_device *dev = to_seq_dev(_dev);
struct snd_emux *emux;
struct snd_emu10k1 *hw;
struct snd_emu10k1_synth_arg *arg;
arg = SNDRV_SEQ_DEVICE_ARGPTR(dev);
if (arg == NULL)
return -EINVAL;
if (arg->seq_ports <= 0)
return 0; /* nothing */
if (arg->max_voices < 1)
arg->max_voices = 1;
else if (arg->max_voices > 64)
arg->max_voices = 64;
if (snd_emux_new(&emux) < 0)
return -ENOMEM;
snd_emu10k1_ops_setup(emux);
hw = arg->hwptr;
emux->hw = hw;
emux->max_voices = arg->max_voices;
emux->num_ports = arg->seq_ports;
emux->memhdr = hw->memhdr;
/* maximum two ports */
emux->midi_ports = arg->seq_ports < 2 ? arg->seq_ports : 2;
/* audigy has two external midis */
emux->midi_devidx = hw->audigy ? 2 : 1;
emux->linear_panning = 0;
emux->hwdep_idx = 2; /* FIXED */
if (snd_emux_register(emux, dev->card, arg->index, "Emu10k1") < 0) {
snd_emux_free(emux);
return -ENOMEM;
}
spin_lock_irq(&hw->voice_lock);
hw->synth = emux;
hw->get_synth_voice = snd_emu10k1_synth_get_voice;
spin_unlock_irq(&hw->voice_lock);
dev->driver_data = emux;
return 0;
}
static int snd_emu10k1_synth_remove(struct device *_dev)
{
struct snd_seq_device *dev = to_seq_dev(_dev);
struct snd_emux *emux;
struct snd_emu10k1 *hw;
if (dev->driver_data == NULL)
return 0; /* not registered actually */
emux = dev->driver_data;
hw = emux->hw;
spin_lock_irq(&hw->voice_lock);
hw->synth = NULL;
hw->get_synth_voice = NULL;
spin_unlock_irq(&hw->voice_lock);
snd_emux_free(emux);
return 0;
}
/*
* INIT part
*/
static struct snd_seq_driver emu10k1_synth_driver = {
.driver = {
.name = KBUILD_MODNAME,
.probe = snd_emu10k1_synth_probe,
.remove = snd_emu10k1_synth_remove,
},
.id = SNDRV_SEQ_DEV_ID_EMU10K1_SYNTH,
.argsize = sizeof(struct snd_emu10k1_synth_arg),
};
module_snd_seq_driver(emu10k1_synth_driver);
| linux-master | sound/pci/emu10k1/emu10k1_synth.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (c) by Jaroslav Kysela <[email protected]>
* Lee Revell <[email protected]>
* James Courtier-Dutton <[email protected]>
* Oswald Buddenhagen <[email protected]>
* Creative Labs, Inc.
*
* Routines for control of EMU10K1 chips / PCM routines
*/
#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/slab.h>
#include <linux/time.h>
#include <linux/init.h>
#include <sound/core.h>
#include <sound/emu10k1.h>
static void snd_emu10k1_pcm_interrupt(struct snd_emu10k1 *emu,
struct snd_emu10k1_voice *voice)
{
struct snd_emu10k1_pcm *epcm;
epcm = voice->epcm;
if (!epcm)
return;
if (epcm->substream == NULL)
return;
#if 0
dev_dbg(emu->card->dev,
"IRQ: position = 0x%x, period = 0x%x, size = 0x%x\n",
epcm->substream->runtime->hw->pointer(emu, epcm->substream),
snd_pcm_lib_period_bytes(epcm->substream),
snd_pcm_lib_buffer_bytes(epcm->substream));
#endif
snd_pcm_period_elapsed(epcm->substream);
}
static void snd_emu10k1_pcm_ac97adc_interrupt(struct snd_emu10k1 *emu,
unsigned int status)
{
#if 0
if (status & IPR_ADCBUFHALFFULL) {
if (emu->pcm_capture_substream->runtime->mode == SNDRV_PCM_MODE_FRAME)
return;
}
#endif
snd_pcm_period_elapsed(emu->pcm_capture_substream);
}
static void snd_emu10k1_pcm_ac97mic_interrupt(struct snd_emu10k1 *emu,
unsigned int status)
{
#if 0
if (status & IPR_MICBUFHALFFULL) {
if (emu->pcm_capture_mic_substream->runtime->mode == SNDRV_PCM_MODE_FRAME)
return;
}
#endif
snd_pcm_period_elapsed(emu->pcm_capture_mic_substream);
}
static void snd_emu10k1_pcm_efx_interrupt(struct snd_emu10k1 *emu,
unsigned int status)
{
#if 0
if (status & IPR_EFXBUFHALFFULL) {
if (emu->pcm_capture_efx_substream->runtime->mode == SNDRV_PCM_MODE_FRAME)
return;
}
#endif
snd_pcm_period_elapsed(emu->pcm_capture_efx_substream);
}
static void snd_emu10k1_pcm_free_voices(struct snd_emu10k1_pcm *epcm)
{
for (unsigned i = 0; i < ARRAY_SIZE(epcm->voices); i++) {
if (epcm->voices[i]) {
snd_emu10k1_voice_free(epcm->emu, epcm->voices[i]);
epcm->voices[i] = NULL;
}
}
}
static int snd_emu10k1_pcm_channel_alloc(struct snd_emu10k1_pcm *epcm,
int type, int count, int channels)
{
int err;
snd_emu10k1_pcm_free_voices(epcm);
err = snd_emu10k1_voice_alloc(epcm->emu,
type, count, channels,
epcm, &epcm->voices[0]);
if (err < 0)
return err;
if (epcm->extra == NULL) {
// The hardware supports only (half-)loop interrupts, so to support an
// arbitrary number of periods per buffer, we use an extra voice with a
// period-sized loop as the interrupt source. Additionally, the interrupt
// timing of the hardware is "suboptimal" and needs some compensation.
err = snd_emu10k1_voice_alloc(epcm->emu,
type + 1, 1, 1,
epcm, &epcm->extra);
if (err < 0) {
/*
dev_dbg(emu->card->dev, "pcm_channel_alloc: "
"failed extra: voices=%d, frame=%d\n",
voices, frame);
*/
snd_emu10k1_pcm_free_voices(epcm);
return err;
}
epcm->extra->interrupt = snd_emu10k1_pcm_interrupt;
}
return 0;
}
// Primes 2-7 and 2^n multiples thereof, up to 16.
static const unsigned int efx_capture_channels[] = {
1, 2, 3, 4, 5, 6, 7, 8, 10, 12, 14, 16
};
static const struct snd_pcm_hw_constraint_list hw_constraints_efx_capture_channels = {
.count = ARRAY_SIZE(efx_capture_channels),
.list = efx_capture_channels,
.mask = 0
};
static const unsigned int capture_buffer_sizes[31] = {
384, 448, 512, 640,
384*2, 448*2, 512*2, 640*2,
384*4, 448*4, 512*4, 640*4,
384*8, 448*8, 512*8, 640*8,
384*16, 448*16, 512*16, 640*16,
384*32, 448*32, 512*32, 640*32,
384*64, 448*64, 512*64, 640*64,
384*128,448*128,512*128
};
static const struct snd_pcm_hw_constraint_list hw_constraints_capture_buffer_sizes = {
.count = 31,
.list = capture_buffer_sizes,
.mask = 0
};
static const unsigned int capture_rates[8] = {
8000, 11025, 16000, 22050, 24000, 32000, 44100, 48000
};
static const struct snd_pcm_hw_constraint_list hw_constraints_capture_rates = {
.count = 8,
.list = capture_rates,
.mask = 0
};
static unsigned int snd_emu10k1_capture_rate_reg(unsigned int rate)
{
switch (rate) {
case 8000: return ADCCR_SAMPLERATE_8;
case 11025: return ADCCR_SAMPLERATE_11;
case 16000: return ADCCR_SAMPLERATE_16;
case 22050: return ADCCR_SAMPLERATE_22;
case 24000: return ADCCR_SAMPLERATE_24;
case 32000: return ADCCR_SAMPLERATE_32;
case 44100: return ADCCR_SAMPLERATE_44;
case 48000: return ADCCR_SAMPLERATE_48;
default:
snd_BUG();
return ADCCR_SAMPLERATE_8;
}
}
static const unsigned int audigy_capture_rates[9] = {
8000, 11025, 12000, 16000, 22050, 24000, 32000, 44100, 48000
};
static const struct snd_pcm_hw_constraint_list hw_constraints_audigy_capture_rates = {
.count = 9,
.list = audigy_capture_rates,
.mask = 0
};
static unsigned int snd_emu10k1_audigy_capture_rate_reg(unsigned int rate)
{
switch (rate) {
case 8000: return A_ADCCR_SAMPLERATE_8;
case 11025: return A_ADCCR_SAMPLERATE_11;
case 12000: return A_ADCCR_SAMPLERATE_12;
case 16000: return ADCCR_SAMPLERATE_16;
case 22050: return ADCCR_SAMPLERATE_22;
case 24000: return ADCCR_SAMPLERATE_24;
case 32000: return ADCCR_SAMPLERATE_32;
case 44100: return ADCCR_SAMPLERATE_44;
case 48000: return ADCCR_SAMPLERATE_48;
default:
snd_BUG();
return A_ADCCR_SAMPLERATE_8;
}
}
static void snd_emu10k1_constrain_capture_rates(struct snd_emu10k1 *emu,
struct snd_pcm_runtime *runtime)
{
if (emu->card_capabilities->emu_model &&
emu->emu1010.word_clock == 44100) {
// This also sets the rate constraint by deleting SNDRV_PCM_RATE_KNOT
runtime->hw.rates = SNDRV_PCM_RATE_11025 | \
SNDRV_PCM_RATE_22050 | \
SNDRV_PCM_RATE_44100;
runtime->hw.rate_min = 11025;
runtime->hw.rate_max = 44100;
return;
}
snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
emu->audigy ? &hw_constraints_audigy_capture_rates :
&hw_constraints_capture_rates);
}
static void snd_emu1010_constrain_efx_rate(struct snd_emu10k1 *emu,
struct snd_pcm_runtime *runtime)
{
int rate;
rate = emu->emu1010.word_clock;
runtime->hw.rate_min = runtime->hw.rate_max = rate;
runtime->hw.rates = snd_pcm_rate_to_rate_bit(rate);
}
static unsigned int emu10k1_calc_pitch_target(unsigned int rate)
{
unsigned int pitch_target;
pitch_target = (rate << 8) / 375;
pitch_target = (pitch_target >> 1) + (pitch_target & 1);
return pitch_target;
}
#define PITCH_48000 0x00004000
#define PITCH_96000 0x00008000
#define PITCH_85000 0x00007155
#define PITCH_80726 0x00006ba2
#define PITCH_67882 0x00005a82
#define PITCH_57081 0x00004c1c
static unsigned int emu10k1_select_interprom(unsigned int pitch_target)
{
if (pitch_target == PITCH_48000)
return CCCA_INTERPROM_0;
else if (pitch_target < PITCH_48000)
return CCCA_INTERPROM_1;
else if (pitch_target >= PITCH_96000)
return CCCA_INTERPROM_0;
else if (pitch_target >= PITCH_85000)
return CCCA_INTERPROM_6;
else if (pitch_target >= PITCH_80726)
return CCCA_INTERPROM_5;
else if (pitch_target >= PITCH_67882)
return CCCA_INTERPROM_4;
else if (pitch_target >= PITCH_57081)
return CCCA_INTERPROM_3;
else
return CCCA_INTERPROM_2;
}
static u16 emu10k1_send_target_from_amount(u8 amount)
{
static const u8 shifts[8] = { 4, 4, 5, 6, 7, 8, 9, 10 };
static const u16 offsets[8] = { 0, 0x200, 0x400, 0x800, 0x1000, 0x2000, 0x4000, 0x8000 };
u8 exp;
if (amount == 0xff)
return 0xffff;
exp = amount >> 5;
return ((amount & 0x1f) << shifts[exp]) + offsets[exp];
}
static void snd_emu10k1_pcm_init_voice(struct snd_emu10k1 *emu,
struct snd_emu10k1_voice *evoice,
bool w_16, bool stereo,
unsigned int start_addr,
unsigned int end_addr,
const unsigned char *send_routing,
const unsigned char *send_amount)
{
unsigned int silent_page;
int voice;
voice = evoice->number;
silent_page = ((unsigned int)emu->silent_page.addr << emu->address_mode) |
(emu->address_mode ? MAP_PTI_MASK1 : MAP_PTI_MASK0);
snd_emu10k1_ptr_write_multiple(emu, voice,
// Not really necessary for the slave, but it doesn't hurt
CPF, stereo ? CPF_STEREO_MASK : 0,
// Assumption that PT is already 0 so no harm overwriting
PTRX, (send_amount[0] << 8) | send_amount[1],
// Stereo slaves don't need to have the addresses set, but it doesn't hurt
DSL, end_addr | (send_amount[3] << 24),
PSST, start_addr | (send_amount[2] << 24),
CCCA, emu10k1_select_interprom(evoice->epcm->pitch_target) |
(w_16 ? 0 : CCCA_8BITSELECT),
// Clear filter delay memory
Z1, 0,
Z2, 0,
// Invalidate maps
MAPA, silent_page,
MAPB, silent_page,
// Disable filter (in conjunction with CCCA_RESONANCE == 0)
VTFT, VTFT_FILTERTARGET_MASK,
CVCF, CVCF_CURRENTFILTER_MASK,
REGLIST_END);
// Setup routing
if (emu->audigy) {
snd_emu10k1_ptr_write_multiple(emu, voice,
A_FXRT1, snd_emu10k1_compose_audigy_fxrt1(send_routing),
A_FXRT2, snd_emu10k1_compose_audigy_fxrt2(send_routing),
A_SENDAMOUNTS, snd_emu10k1_compose_audigy_sendamounts(send_amount),
REGLIST_END);
for (int i = 0; i < 4; i++) {
u32 aml = emu10k1_send_target_from_amount(send_amount[2 * i]);
u32 amh = emu10k1_send_target_from_amount(send_amount[2 * i + 1]);
snd_emu10k1_ptr_write(emu, A_CSBA + i, voice, (amh << 16) | aml);
}
} else {
snd_emu10k1_ptr_write(emu, FXRT, voice,
snd_emu10k1_compose_send_routing(send_routing));
}
emu->voices[voice].dirty = 1;
}
static void snd_emu10k1_pcm_init_voices(struct snd_emu10k1 *emu,
struct snd_emu10k1_voice *evoice,
bool w_16, bool stereo,
unsigned int start_addr,
unsigned int end_addr,
struct snd_emu10k1_pcm_mixer *mix)
{
spin_lock_irq(&emu->reg_lock);
snd_emu10k1_pcm_init_voice(emu, evoice, w_16, stereo,
start_addr, end_addr,
&mix->send_routing[stereo][0],
&mix->send_volume[stereo][0]);
if (stereo)
snd_emu10k1_pcm_init_voice(emu, evoice + 1, w_16, true,
start_addr, end_addr,
&mix->send_routing[2][0],
&mix->send_volume[2][0]);
spin_unlock_irq(&emu->reg_lock);
}
static void snd_emu10k1_pcm_init_extra_voice(struct snd_emu10k1 *emu,
struct snd_emu10k1_voice *evoice,
bool w_16,
unsigned int start_addr,
unsigned int end_addr)
{
static const unsigned char send_routing[8] = { 0, 1, 2, 3, 4, 5, 6, 7 };
static const unsigned char send_amount[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
snd_emu10k1_pcm_init_voice(emu, evoice, w_16, false,
start_addr, end_addr,
send_routing, send_amount);
}
static int snd_emu10k1_playback_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *hw_params)
{
struct snd_emu10k1 *emu = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_emu10k1_pcm *epcm = runtime->private_data;
size_t alloc_size;
int type, channels, count;
int err;
if (epcm->type == PLAYBACK_EMUVOICE) {
type = EMU10K1_PCM;
channels = 1;
count = params_channels(hw_params);
} else {
type = EMU10K1_EFX;
channels = params_channels(hw_params);
count = 1;
}
err = snd_emu10k1_pcm_channel_alloc(epcm, type, count, channels);
if (err < 0)
return err;
alloc_size = params_buffer_bytes(hw_params);
if (emu->iommu_workaround)
alloc_size += EMUPAGESIZE;
err = snd_pcm_lib_malloc_pages(substream, alloc_size);
if (err < 0)
return err;
if (emu->iommu_workaround && runtime->dma_bytes >= EMUPAGESIZE)
runtime->dma_bytes -= EMUPAGESIZE;
if (err > 0) { /* change */
int mapped;
if (epcm->memblk != NULL)
snd_emu10k1_free_pages(emu, epcm->memblk);
epcm->memblk = snd_emu10k1_alloc_pages(emu, substream);
epcm->start_addr = 0;
if (! epcm->memblk)
return -ENOMEM;
mapped = ((struct snd_emu10k1_memblk *)epcm->memblk)->mapped_page;
if (mapped < 0)
return -ENOMEM;
epcm->start_addr = mapped << PAGE_SHIFT;
}
return 0;
}
static int snd_emu10k1_playback_hw_free(struct snd_pcm_substream *substream)
{
struct snd_emu10k1 *emu = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_emu10k1_pcm *epcm;
if (runtime->private_data == NULL)
return 0;
epcm = runtime->private_data;
if (epcm->extra) {
snd_emu10k1_voice_free(epcm->emu, epcm->extra);
epcm->extra = NULL;
}
snd_emu10k1_pcm_free_voices(epcm);
if (epcm->memblk) {
snd_emu10k1_free_pages(emu, epcm->memblk);
epcm->memblk = NULL;
epcm->start_addr = 0;
}
snd_pcm_lib_free_pages(substream);
return 0;
}
static int snd_emu10k1_playback_prepare(struct snd_pcm_substream *substream)
{
struct snd_emu10k1 *emu = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_emu10k1_pcm *epcm = runtime->private_data;
bool w_16 = snd_pcm_format_width(runtime->format) == 16;
bool stereo = runtime->channels == 2;
unsigned int start_addr, end_addr;
unsigned int rate;
rate = runtime->rate;
if (emu->card_capabilities->emu_model &&
emu->emu1010.word_clock == 44100)
rate = rate * 480 / 441;
epcm->pitch_target = emu10k1_calc_pitch_target(rate);
start_addr = epcm->start_addr >> w_16;
end_addr = start_addr + runtime->period_size;
snd_emu10k1_pcm_init_extra_voice(emu, epcm->extra, w_16,
start_addr, end_addr);
start_addr >>= stereo;
epcm->ccca_start_addr = start_addr;
end_addr = start_addr + runtime->buffer_size;
snd_emu10k1_pcm_init_voices(emu, epcm->voices[0], w_16, stereo,
start_addr, end_addr,
&emu->pcm_mixer[substream->number]);
return 0;
}
static int snd_emu10k1_efx_playback_prepare(struct snd_pcm_substream *substream)
{
struct snd_emu10k1 *emu = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_emu10k1_pcm *epcm = runtime->private_data;
unsigned int start_addr;
unsigned int extra_size, channel_size;
unsigned int i;
epcm->pitch_target = PITCH_48000;
start_addr = epcm->start_addr >> 1; // 16-bit voices
extra_size = runtime->period_size;
channel_size = runtime->buffer_size;
snd_emu10k1_pcm_init_extra_voice(emu, epcm->extra, true,
start_addr, start_addr + extra_size);
epcm->ccca_start_addr = start_addr;
for (i = 0; i < runtime->channels; i++) {
snd_emu10k1_pcm_init_voices(emu, epcm->voices[i], true, false,
start_addr, start_addr + channel_size,
&emu->efx_pcm_mixer[i]);
start_addr += channel_size;
}
return 0;
}
static const struct snd_pcm_hardware snd_emu10k1_efx_playback =
{
.info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_NONINTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_RESUME |
SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_PAUSE),
.formats = SNDRV_PCM_FMTBIT_S16_LE,
.rates = SNDRV_PCM_RATE_48000,
.rate_min = 48000,
.rate_max = 48000,
.channels_min = 1,
.channels_max = NUM_EFX_PLAYBACK,
.buffer_bytes_max = (128*1024),
.period_bytes_max = (128*1024),
.periods_min = 2,
.periods_max = 1024,
.fifo_size = 0,
};
static int snd_emu10k1_capture_prepare(struct snd_pcm_substream *substream)
{
struct snd_emu10k1 *emu = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_emu10k1_pcm *epcm = runtime->private_data;
int idx;
/* zeroing the buffer size will stop capture */
snd_emu10k1_ptr_write(emu, epcm->capture_bs_reg, 0, 0);
switch (epcm->type) {
case CAPTURE_AC97ADC:
snd_emu10k1_ptr_write(emu, ADCCR, 0, 0);
break;
case CAPTURE_EFX:
if (emu->card_capabilities->emu_model) {
// The upper 32 16-bit capture voices, two for each of the 16 32-bit channels.
// The lower voices are occupied by A_EXTOUT_*_CAP*.
epcm->capture_cr_val = 0;
epcm->capture_cr_val2 = 0xffffffff >> (32 - runtime->channels * 2);
}
if (emu->audigy) {
snd_emu10k1_ptr_write_multiple(emu, 0,
A_FXWC1, 0,
A_FXWC2, 0,
REGLIST_END);
} else
snd_emu10k1_ptr_write(emu, FXWC, 0, 0);
break;
default:
break;
}
snd_emu10k1_ptr_write(emu, epcm->capture_ba_reg, 0, runtime->dma_addr);
epcm->capture_bufsize = snd_pcm_lib_buffer_bytes(substream);
epcm->capture_bs_val = 0;
for (idx = 0; idx < 31; idx++) {
if (capture_buffer_sizes[idx] == epcm->capture_bufsize) {
epcm->capture_bs_val = idx + 1;
break;
}
}
if (epcm->capture_bs_val == 0) {
snd_BUG();
epcm->capture_bs_val++;
}
if (epcm->type == CAPTURE_AC97ADC) {
unsigned rate = runtime->rate;
if (!(runtime->hw.rates & SNDRV_PCM_RATE_48000))
rate = rate * 480 / 441;
epcm->capture_cr_val = emu->audigy ? A_ADCCR_LCHANENABLE : ADCCR_LCHANENABLE;
if (runtime->channels > 1)
epcm->capture_cr_val |= emu->audigy ? A_ADCCR_RCHANENABLE : ADCCR_RCHANENABLE;
epcm->capture_cr_val |= emu->audigy ?
snd_emu10k1_audigy_capture_rate_reg(rate) :
snd_emu10k1_capture_rate_reg(rate);
}
return 0;
}
static void snd_emu10k1_playback_fill_cache(struct snd_emu10k1 *emu,
unsigned voice,
u32 sample, bool stereo)
{
u32 ccr;
// We assume that the cache is resting at this point (i.e.,
// CCR_CACHEINVALIDSIZE is very small).
// Clear leading frames. For simplicitly, this does too much,
// except for 16-bit stereo. And the interpolator will actually
// access them at all only when we're pitch-shifting.
for (int i = 0; i < 3; i++)
snd_emu10k1_ptr_write(emu, CD0 + i, voice, sample);
// Fill cache
ccr = (64 - 3) << REG_SHIFT(CCR_CACHEINVALIDSIZE);
if (stereo) {
// The engine goes haywire if CCR_READADDRESS is out of sync
snd_emu10k1_ptr_write(emu, CCR, voice + 1, ccr);
}
snd_emu10k1_ptr_write(emu, CCR, voice, ccr);
}
static void snd_emu10k1_playback_prepare_voices(struct snd_emu10k1 *emu,
struct snd_emu10k1_pcm *epcm,
bool w_16, bool stereo,
int channels)
{
struct snd_pcm_substream *substream = epcm->substream;
struct snd_pcm_runtime *runtime = substream->runtime;
unsigned eloop_start = epcm->start_addr >> w_16;
unsigned loop_start = eloop_start >> stereo;
unsigned eloop_size = runtime->period_size;
unsigned loop_size = runtime->buffer_size;
u32 sample = w_16 ? 0 : 0x80808080;
// To make the playback actually start at the 1st frame,
// we need to compensate for two circumstances:
// - The actual position is delayed by the cache size (64 frames)
// - The interpolator is centered around the 4th frame
loop_start += (epcm->resume_pos + 64 - 3) % loop_size;
for (int i = 0; i < channels; i++) {
unsigned voice = epcm->voices[i]->number;
snd_emu10k1_ptr_write(emu, CCCA_CURRADDR, voice, loop_start);
loop_start += loop_size;
snd_emu10k1_playback_fill_cache(emu, voice, sample, stereo);
}
// The interrupt is triggered when CCCA_CURRADDR (CA) wraps around,
// which is ahead of the actual playback position, so the interrupt
// source needs to be delayed.
//
// In principle, this wouldn't need to be the cache's entire size - in
// practice, CCR_CACHEINVALIDSIZE (CIS) > `fetch threshold` has never
// been observed, and assuming 40 _bytes_ should be safe.
//
// The cache fills are somewhat random, which makes it impossible to
// align them with the interrupts. This makes a non-delayed interrupt
// source not practical, as the interrupt handler would have to wait
// for (CA - CIS) >= period_boundary for every channel in the stream.
//
// This is why all other (open) drivers for these chips use timer-based
// interrupts.
//
eloop_start += (epcm->resume_pos + eloop_size - 3) % eloop_size;
snd_emu10k1_ptr_write(emu, CCCA_CURRADDR, epcm->extra->number, eloop_start);
// It takes a moment until the cache fills complete,
// but the unmuting takes long enough for that.
}
static void snd_emu10k1_playback_commit_volume(struct snd_emu10k1 *emu,
struct snd_emu10k1_voice *evoice,
unsigned int vattn)
{
snd_emu10k1_ptr_write_multiple(emu, evoice->number,
VTFT, vattn | VTFT_FILTERTARGET_MASK,
CVCF, vattn | CVCF_CURRENTFILTER_MASK,
REGLIST_END);
}
static void snd_emu10k1_playback_unmute_voice(struct snd_emu10k1 *emu,
struct snd_emu10k1_voice *evoice,
bool stereo, bool master,
struct snd_emu10k1_pcm_mixer *mix)
{
unsigned int vattn;
unsigned int tmp;
tmp = stereo ? (master ? 1 : 2) : 0;
vattn = mix->attn[tmp] << 16;
snd_emu10k1_playback_commit_volume(emu, evoice, vattn);
}
static void snd_emu10k1_playback_unmute_voices(struct snd_emu10k1 *emu,
struct snd_emu10k1_voice *evoice,
bool stereo,
struct snd_emu10k1_pcm_mixer *mix)
{
snd_emu10k1_playback_unmute_voice(emu, evoice, stereo, true, mix);
if (stereo)
snd_emu10k1_playback_unmute_voice(emu, evoice + 1, true, false, mix);
}
static void snd_emu10k1_playback_mute_voice(struct snd_emu10k1 *emu,
struct snd_emu10k1_voice *evoice)
{
snd_emu10k1_playback_commit_volume(emu, evoice, 0);
}
static void snd_emu10k1_playback_mute_voices(struct snd_emu10k1 *emu,
struct snd_emu10k1_voice *evoice,
bool stereo)
{
snd_emu10k1_playback_mute_voice(emu, evoice);
if (stereo)
snd_emu10k1_playback_mute_voice(emu, evoice + 1);
}
static void snd_emu10k1_playback_commit_pitch(struct snd_emu10k1 *emu,
u32 voice, u32 pitch_target)
{
u32 ptrx = snd_emu10k1_ptr_read(emu, PTRX, voice);
u32 cpf = snd_emu10k1_ptr_read(emu, CPF, voice);
snd_emu10k1_ptr_write_multiple(emu, voice,
PTRX, (ptrx & ~PTRX_PITCHTARGET_MASK) | pitch_target,
CPF, (cpf & ~(CPF_CURRENTPITCH_MASK | CPF_FRACADDRESS_MASK)) | pitch_target,
REGLIST_END);
}
static void snd_emu10k1_playback_trigger_voice(struct snd_emu10k1 *emu,
struct snd_emu10k1_voice *evoice)
{
unsigned int voice;
voice = evoice->number;
snd_emu10k1_playback_commit_pitch(emu, voice, evoice->epcm->pitch_target << 16);
}
static void snd_emu10k1_playback_stop_voice(struct snd_emu10k1 *emu,
struct snd_emu10k1_voice *evoice)
{
unsigned int voice;
voice = evoice->number;
snd_emu10k1_playback_commit_pitch(emu, voice, 0);
}
static void snd_emu10k1_playback_set_running(struct snd_emu10k1 *emu,
struct snd_emu10k1_pcm *epcm)
{
epcm->running = 1;
snd_emu10k1_voice_intr_enable(emu, epcm->extra->number);
}
static void snd_emu10k1_playback_set_stopped(struct snd_emu10k1 *emu,
struct snd_emu10k1_pcm *epcm)
{
snd_emu10k1_voice_intr_disable(emu, epcm->extra->number);
epcm->running = 0;
}
static int snd_emu10k1_playback_trigger(struct snd_pcm_substream *substream,
int cmd)
{
struct snd_emu10k1 *emu = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_emu10k1_pcm *epcm = runtime->private_data;
struct snd_emu10k1_pcm_mixer *mix;
bool w_16 = snd_pcm_format_width(runtime->format) == 16;
bool stereo = runtime->channels == 2;
int result = 0;
/*
dev_dbg(emu->card->dev,
"trigger - emu10k1 = 0x%x, cmd = %i, pointer = %i\n",
(int)emu, cmd, substream->ops->pointer(substream))
*/
spin_lock(&emu->reg_lock);
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
snd_emu10k1_playback_prepare_voices(emu, epcm, w_16, stereo, 1);
fallthrough;
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
case SNDRV_PCM_TRIGGER_RESUME:
mix = &emu->pcm_mixer[substream->number];
snd_emu10k1_playback_unmute_voices(emu, epcm->voices[0], stereo, mix);
snd_emu10k1_playback_set_running(emu, epcm);
snd_emu10k1_playback_trigger_voice(emu, epcm->voices[0]);
snd_emu10k1_playback_trigger_voice(emu, epcm->extra);
break;
case SNDRV_PCM_TRIGGER_STOP:
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
case SNDRV_PCM_TRIGGER_SUSPEND:
snd_emu10k1_playback_stop_voice(emu, epcm->voices[0]);
snd_emu10k1_playback_stop_voice(emu, epcm->extra);
snd_emu10k1_playback_set_stopped(emu, epcm);
snd_emu10k1_playback_mute_voices(emu, epcm->voices[0], stereo);
break;
default:
result = -EINVAL;
break;
}
spin_unlock(&emu->reg_lock);
return result;
}
static int snd_emu10k1_capture_trigger(struct snd_pcm_substream *substream,
int cmd)
{
struct snd_emu10k1 *emu = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_emu10k1_pcm *epcm = runtime->private_data;
int result = 0;
spin_lock(&emu->reg_lock);
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
case SNDRV_PCM_TRIGGER_RESUME:
/* hmm this should cause full and half full interrupt to be raised? */
outl(epcm->capture_ipr, emu->port + IPR);
snd_emu10k1_intr_enable(emu, epcm->capture_inte);
/*
dev_dbg(emu->card->dev, "adccr = 0x%x, adcbs = 0x%x\n",
epcm->adccr, epcm->adcbs);
*/
switch (epcm->type) {
case CAPTURE_AC97ADC:
snd_emu10k1_ptr_write(emu, ADCCR, 0, epcm->capture_cr_val);
break;
case CAPTURE_EFX:
if (emu->audigy) {
snd_emu10k1_ptr_write_multiple(emu, 0,
A_FXWC1, epcm->capture_cr_val,
A_FXWC2, epcm->capture_cr_val2,
REGLIST_END);
dev_dbg(emu->card->dev,
"cr_val=0x%x, cr_val2=0x%x\n",
epcm->capture_cr_val,
epcm->capture_cr_val2);
} else
snd_emu10k1_ptr_write(emu, FXWC, 0, epcm->capture_cr_val);
break;
default:
break;
}
snd_emu10k1_ptr_write(emu, epcm->capture_bs_reg, 0, epcm->capture_bs_val);
epcm->running = 1;
epcm->first_ptr = 1;
break;
case SNDRV_PCM_TRIGGER_STOP:
case SNDRV_PCM_TRIGGER_SUSPEND:
epcm->running = 0;
snd_emu10k1_intr_disable(emu, epcm->capture_inte);
outl(epcm->capture_ipr, emu->port + IPR);
snd_emu10k1_ptr_write(emu, epcm->capture_bs_reg, 0, 0);
switch (epcm->type) {
case CAPTURE_AC97ADC:
snd_emu10k1_ptr_write(emu, ADCCR, 0, 0);
break;
case CAPTURE_EFX:
if (emu->audigy) {
snd_emu10k1_ptr_write_multiple(emu, 0,
A_FXWC1, 0,
A_FXWC2, 0,
REGLIST_END);
} else
snd_emu10k1_ptr_write(emu, FXWC, 0, 0);
break;
default:
break;
}
break;
default:
result = -EINVAL;
}
spin_unlock(&emu->reg_lock);
return result;
}
static snd_pcm_uframes_t snd_emu10k1_playback_pointer(struct snd_pcm_substream *substream)
{
struct snd_emu10k1 *emu = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_emu10k1_pcm *epcm = runtime->private_data;
int ptr;
if (!epcm->running)
return 0;
ptr = snd_emu10k1_ptr_read(emu, CCCA, epcm->voices[0]->number) & 0x00ffffff;
ptr -= epcm->ccca_start_addr;
// This is the size of the whole cache minus the interpolator read-ahead,
// which leads us to the actual playback position.
//
// The cache is constantly kept mostly filled, so in principle we could
// return a more advanced position representing how far the hardware has
// already read the buffer, and set runtime->delay accordingly. However,
// this would be slightly different for every channel (and remarkably slow
// to obtain), so only a fixed worst-case value would be practical.
//
ptr -= 64 - 3;
if (ptr < 0)
ptr += runtime->buffer_size;
/*
dev_dbg(emu->card->dev,
"ptr = 0x%lx, buffer_size = 0x%lx, period_size = 0x%lx\n",
(long)ptr, (long)runtime->buffer_size,
(long)runtime->period_size);
*/
return ptr;
}
static u64 snd_emu10k1_efx_playback_voice_mask(struct snd_emu10k1_pcm *epcm,
int channels)
{
u64 mask = 0;
for (int i = 0; i < channels; i++) {
int voice = epcm->voices[i]->number;
mask |= 1ULL << voice;
}
return mask;
}
static void snd_emu10k1_efx_playback_freeze_voices(struct snd_emu10k1 *emu,
struct snd_emu10k1_pcm *epcm,
int channels)
{
for (int i = 0; i < channels; i++) {
int voice = epcm->voices[i]->number;
snd_emu10k1_ptr_write(emu, CPF_STOP, voice, 1);
snd_emu10k1_playback_commit_pitch(emu, voice, PITCH_48000 << 16);
}
}
static void snd_emu10k1_efx_playback_unmute_voices(struct snd_emu10k1 *emu,
struct snd_emu10k1_pcm *epcm,
int channels)
{
for (int i = 0; i < channels; i++)
snd_emu10k1_playback_unmute_voice(emu, epcm->voices[i], false, true,
&emu->efx_pcm_mixer[i]);
}
static void snd_emu10k1_efx_playback_stop_voices(struct snd_emu10k1 *emu,
struct snd_emu10k1_pcm *epcm,
int channels)
{
for (int i = 0; i < channels; i++)
snd_emu10k1_playback_stop_voice(emu, epcm->voices[i]);
snd_emu10k1_playback_set_stopped(emu, epcm);
for (int i = 0; i < channels; i++)
snd_emu10k1_playback_mute_voice(emu, epcm->voices[i]);
}
static int snd_emu10k1_efx_playback_trigger(struct snd_pcm_substream *substream,
int cmd)
{
struct snd_emu10k1 *emu = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_emu10k1_pcm *epcm = runtime->private_data;
u64 mask;
int result = 0;
spin_lock(&emu->reg_lock);
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
case SNDRV_PCM_TRIGGER_RESUME:
mask = snd_emu10k1_efx_playback_voice_mask(
epcm, runtime->channels);
for (int i = 0; i < 10; i++) {
// Note that the freeze is not interruptible, so we make no
// effort to reset the bits outside the error handling here.
snd_emu10k1_voice_set_loop_stop_multiple(emu, mask);
snd_emu10k1_efx_playback_freeze_voices(
emu, epcm, runtime->channels);
snd_emu10k1_playback_prepare_voices(
emu, epcm, true, false, runtime->channels);
// It might seem to make more sense to unmute the voices only after
// they have been started, to potentially avoid torturing the speakers
// if something goes wrong. However, we cannot unmute atomically,
// which means that we'd get some mild artifacts in the regular case.
snd_emu10k1_efx_playback_unmute_voices(emu, epcm, runtime->channels);
snd_emu10k1_playback_set_running(emu, epcm);
result = snd_emu10k1_voice_clear_loop_stop_multiple_atomic(emu, mask);
if (result == 0) {
// The extra voice is allowed to lag a bit
snd_emu10k1_playback_trigger_voice(emu, epcm->extra);
goto leave;
}
snd_emu10k1_efx_playback_stop_voices(
emu, epcm, runtime->channels);
if (result != -EAGAIN)
break;
// The sync start can legitimately fail due to NMIs, etc.
}
snd_emu10k1_voice_clear_loop_stop_multiple(emu, mask);
break;
case SNDRV_PCM_TRIGGER_SUSPEND:
case SNDRV_PCM_TRIGGER_STOP:
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
snd_emu10k1_playback_stop_voice(emu, epcm->extra);
snd_emu10k1_efx_playback_stop_voices(
emu, epcm, runtime->channels);
epcm->resume_pos = snd_emu10k1_playback_pointer(substream);
break;
default:
result = -EINVAL;
break;
}
leave:
spin_unlock(&emu->reg_lock);
return result;
}
static snd_pcm_uframes_t snd_emu10k1_capture_pointer(struct snd_pcm_substream *substream)
{
struct snd_emu10k1 *emu = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_emu10k1_pcm *epcm = runtime->private_data;
unsigned int ptr;
if (!epcm->running)
return 0;
if (epcm->first_ptr) {
udelay(50); /* hack, it takes awhile until capture is started */
epcm->first_ptr = 0;
}
ptr = snd_emu10k1_ptr_read(emu, epcm->capture_idx_reg, 0) & 0x0000ffff;
return bytes_to_frames(runtime, ptr);
}
/*
* Playback support device description
*/
static const struct snd_pcm_hardware snd_emu10k1_playback =
{
.info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_RESUME |
SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_PAUSE),
.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
.rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_96000,
.rate_min = 4000,
.rate_max = 96000,
.channels_min = 1,
.channels_max = 2,
.buffer_bytes_max = (128*1024),
.period_bytes_max = (128*1024),
.periods_min = 2,
.periods_max = 1024,
.fifo_size = 0,
};
/*
* Capture support device description
*/
static const struct snd_pcm_hardware snd_emu10k1_capture =
{
.info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_RESUME |
SNDRV_PCM_INFO_MMAP_VALID),
.formats = SNDRV_PCM_FMTBIT_S16_LE,
.rates = SNDRV_PCM_RATE_8000_48000 | SNDRV_PCM_RATE_KNOT,
.rate_min = 8000,
.rate_max = 48000,
.channels_min = 1,
.channels_max = 2,
.buffer_bytes_max = (64*1024),
.period_bytes_min = 384,
.period_bytes_max = (64*1024),
.periods_min = 2,
.periods_max = 2,
.fifo_size = 0,
};
static const struct snd_pcm_hardware snd_emu10k1_capture_efx =
{
.info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_RESUME |
SNDRV_PCM_INFO_MMAP_VALID),
.formats = SNDRV_PCM_FMTBIT_S16_LE,
.rates = SNDRV_PCM_RATE_48000,
.rate_min = 48000,
.rate_max = 48000,
.channels_min = 1,
.channels_max = 16,
.buffer_bytes_max = (64*1024),
.period_bytes_min = 384,
.period_bytes_max = (64*1024),
.periods_min = 2,
.periods_max = 2,
.fifo_size = 0,
};
/*
*
*/
static void snd_emu10k1_pcm_mixer_notify1(struct snd_emu10k1 *emu, struct snd_kcontrol *kctl, int idx, int activate)
{
struct snd_ctl_elem_id id;
if (! kctl)
return;
if (activate)
kctl->vd[idx].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
else
kctl->vd[idx].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
snd_ctl_notify(emu->card, SNDRV_CTL_EVENT_MASK_VALUE |
SNDRV_CTL_EVENT_MASK_INFO,
snd_ctl_build_ioff(&id, kctl, idx));
}
static void snd_emu10k1_pcm_mixer_notify(struct snd_emu10k1 *emu, int idx, int activate)
{
snd_emu10k1_pcm_mixer_notify1(emu, emu->ctl_send_routing, idx, activate);
snd_emu10k1_pcm_mixer_notify1(emu, emu->ctl_send_volume, idx, activate);
snd_emu10k1_pcm_mixer_notify1(emu, emu->ctl_attn, idx, activate);
}
static void snd_emu10k1_pcm_efx_mixer_notify(struct snd_emu10k1 *emu, int idx, int activate)
{
snd_emu10k1_pcm_mixer_notify1(emu, emu->ctl_efx_send_routing, idx, activate);
snd_emu10k1_pcm_mixer_notify1(emu, emu->ctl_efx_send_volume, idx, activate);
snd_emu10k1_pcm_mixer_notify1(emu, emu->ctl_efx_attn, idx, activate);
}
static void snd_emu10k1_pcm_free_substream(struct snd_pcm_runtime *runtime)
{
kfree(runtime->private_data);
}
static int snd_emu10k1_efx_playback_close(struct snd_pcm_substream *substream)
{
struct snd_emu10k1 *emu = snd_pcm_substream_chip(substream);
struct snd_emu10k1_pcm_mixer *mix;
int i;
for (i = 0; i < NUM_EFX_PLAYBACK; i++) {
mix = &emu->efx_pcm_mixer[i];
mix->epcm = NULL;
snd_emu10k1_pcm_efx_mixer_notify(emu, i, 0);
}
return 0;
}
static int snd_emu10k1_playback_set_constraints(struct snd_pcm_runtime *runtime)
{
int err;
// The buffer size must be a multiple of the period size, to avoid a
// mismatch between the extra voice and the regular voices.
err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
if (err < 0)
return err;
// The hardware is typically the cache's size of 64 frames ahead.
// Leave enough time for actually filling up the buffer.
err = snd_pcm_hw_constraint_minmax(
runtime, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, 128, UINT_MAX);
return err;
}
static int snd_emu10k1_efx_playback_open(struct snd_pcm_substream *substream)
{
struct snd_emu10k1 *emu = snd_pcm_substream_chip(substream);
struct snd_emu10k1_pcm *epcm;
struct snd_emu10k1_pcm_mixer *mix;
struct snd_pcm_runtime *runtime = substream->runtime;
int i, j, err;
epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
if (epcm == NULL)
return -ENOMEM;
epcm->emu = emu;
epcm->type = PLAYBACK_EFX;
epcm->substream = substream;
runtime->private_data = epcm;
runtime->private_free = snd_emu10k1_pcm_free_substream;
runtime->hw = snd_emu10k1_efx_playback;
if (emu->card_capabilities->emu_model)
snd_emu1010_constrain_efx_rate(emu, runtime);
err = snd_emu10k1_playback_set_constraints(runtime);
if (err < 0) {
kfree(epcm);
return err;
}
for (i = 0; i < NUM_EFX_PLAYBACK; i++) {
mix = &emu->efx_pcm_mixer[i];
for (j = 0; j < 8; j++)
mix->send_routing[0][j] = i + j;
memset(&mix->send_volume, 0, sizeof(mix->send_volume));
mix->send_volume[0][0] = 255;
mix->attn[0] = 0x8000;
mix->epcm = epcm;
snd_emu10k1_pcm_efx_mixer_notify(emu, i, 1);
}
return 0;
}
static int snd_emu10k1_playback_open(struct snd_pcm_substream *substream)
{
struct snd_emu10k1 *emu = snd_pcm_substream_chip(substream);
struct snd_emu10k1_pcm *epcm;
struct snd_emu10k1_pcm_mixer *mix;
struct snd_pcm_runtime *runtime = substream->runtime;
int i, err, sample_rate;
epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
if (epcm == NULL)
return -ENOMEM;
epcm->emu = emu;
epcm->type = PLAYBACK_EMUVOICE;
epcm->substream = substream;
runtime->private_data = epcm;
runtime->private_free = snd_emu10k1_pcm_free_substream;
runtime->hw = snd_emu10k1_playback;
err = snd_emu10k1_playback_set_constraints(runtime);
if (err < 0) {
kfree(epcm);
return err;
}
if (emu->card_capabilities->emu_model)
sample_rate = emu->emu1010.word_clock;
else
sample_rate = 48000;
err = snd_pcm_hw_rule_noresample(runtime, sample_rate);
if (err < 0) {
kfree(epcm);
return err;
}
mix = &emu->pcm_mixer[substream->number];
for (i = 0; i < 8; i++)
mix->send_routing[0][i] = mix->send_routing[1][i] = mix->send_routing[2][i] = i;
memset(&mix->send_volume, 0, sizeof(mix->send_volume));
mix->send_volume[0][0] = mix->send_volume[0][1] =
mix->send_volume[1][0] = mix->send_volume[2][1] = 255;
mix->attn[0] = mix->attn[1] = mix->attn[2] = 0x8000;
mix->epcm = epcm;
snd_emu10k1_pcm_mixer_notify(emu, substream->number, 1);
return 0;
}
static int snd_emu10k1_playback_close(struct snd_pcm_substream *substream)
{
struct snd_emu10k1 *emu = snd_pcm_substream_chip(substream);
struct snd_emu10k1_pcm_mixer *mix = &emu->pcm_mixer[substream->number];
mix->epcm = NULL;
snd_emu10k1_pcm_mixer_notify(emu, substream->number, 0);
return 0;
}
static int snd_emu10k1_capture_open(struct snd_pcm_substream *substream)
{
struct snd_emu10k1 *emu = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_emu10k1_pcm *epcm;
epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
if (epcm == NULL)
return -ENOMEM;
epcm->emu = emu;
epcm->type = CAPTURE_AC97ADC;
epcm->substream = substream;
epcm->capture_ipr = IPR_ADCBUFFULL|IPR_ADCBUFHALFFULL;
epcm->capture_inte = INTE_ADCBUFENABLE;
epcm->capture_ba_reg = ADCBA;
epcm->capture_bs_reg = ADCBS;
epcm->capture_idx_reg = emu->audigy ? A_ADCIDX : ADCIDX;
runtime->private_data = epcm;
runtime->private_free = snd_emu10k1_pcm_free_substream;
runtime->hw = snd_emu10k1_capture;
snd_emu10k1_constrain_capture_rates(emu, runtime);
snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
&hw_constraints_capture_buffer_sizes);
emu->capture_interrupt = snd_emu10k1_pcm_ac97adc_interrupt;
emu->pcm_capture_substream = substream;
return 0;
}
static int snd_emu10k1_capture_close(struct snd_pcm_substream *substream)
{
struct snd_emu10k1 *emu = snd_pcm_substream_chip(substream);
emu->capture_interrupt = NULL;
emu->pcm_capture_substream = NULL;
return 0;
}
static int snd_emu10k1_capture_mic_open(struct snd_pcm_substream *substream)
{
struct snd_emu10k1 *emu = snd_pcm_substream_chip(substream);
struct snd_emu10k1_pcm *epcm;
struct snd_pcm_runtime *runtime = substream->runtime;
epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
if (epcm == NULL)
return -ENOMEM;
epcm->emu = emu;
epcm->type = CAPTURE_AC97MIC;
epcm->substream = substream;
epcm->capture_ipr = IPR_MICBUFFULL|IPR_MICBUFHALFFULL;
epcm->capture_inte = INTE_MICBUFENABLE;
epcm->capture_ba_reg = MICBA;
epcm->capture_bs_reg = MICBS;
epcm->capture_idx_reg = emu->audigy ? A_MICIDX : MICIDX;
substream->runtime->private_data = epcm;
substream->runtime->private_free = snd_emu10k1_pcm_free_substream;
runtime->hw = snd_emu10k1_capture;
runtime->hw.rates = SNDRV_PCM_RATE_8000;
runtime->hw.rate_min = runtime->hw.rate_max = 8000;
snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
&hw_constraints_capture_buffer_sizes);
emu->capture_mic_interrupt = snd_emu10k1_pcm_ac97mic_interrupt;
emu->pcm_capture_mic_substream = substream;
return 0;
}
static int snd_emu10k1_capture_mic_close(struct snd_pcm_substream *substream)
{
struct snd_emu10k1 *emu = snd_pcm_substream_chip(substream);
emu->capture_mic_interrupt = NULL;
emu->pcm_capture_mic_substream = NULL;
return 0;
}
static int snd_emu10k1_capture_efx_open(struct snd_pcm_substream *substream)
{
struct snd_emu10k1 *emu = snd_pcm_substream_chip(substream);
struct snd_emu10k1_pcm *epcm;
struct snd_pcm_runtime *runtime = substream->runtime;
int nefx = emu->audigy ? 64 : 32;
int idx, err;
epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
if (epcm == NULL)
return -ENOMEM;
epcm->emu = emu;
epcm->type = CAPTURE_EFX;
epcm->substream = substream;
epcm->capture_ipr = IPR_EFXBUFFULL|IPR_EFXBUFHALFFULL;
epcm->capture_inte = INTE_EFXBUFENABLE;
epcm->capture_ba_reg = FXBA;
epcm->capture_bs_reg = FXBS;
epcm->capture_idx_reg = FXIDX;
substream->runtime->private_data = epcm;
substream->runtime->private_free = snd_emu10k1_pcm_free_substream;
runtime->hw = snd_emu10k1_capture_efx;
if (emu->card_capabilities->emu_model) {
snd_emu1010_constrain_efx_rate(emu, runtime);
/*
* There are 32 mono channels of 16bits each.
* 24bit Audio uses 2x channels over 16bit,
* 96kHz uses 2x channels over 48kHz,
* 192kHz uses 4x channels over 48kHz.
* So, for 48kHz 24bit, one has 16 channels,
* for 96kHz 24bit, one has 8 channels,
* for 192kHz 24bit, one has 4 channels.
* 1010rev2 and 1616(m) cards have double that,
* but we don't exceed 16 channels anyway.
*/
#if 0
/* For 96kHz */
runtime->hw.channels_min = runtime->hw.channels_max = 4;
#endif
#if 0
/* For 192kHz */
runtime->hw.channels_min = runtime->hw.channels_max = 2;
#endif
runtime->hw.formats = SNDRV_PCM_FMTBIT_S32_LE;
} else {
spin_lock_irq(&emu->reg_lock);
runtime->hw.channels_min = runtime->hw.channels_max = 0;
for (idx = 0; idx < nefx; idx++) {
if (emu->efx_voices_mask[idx/32] & (1 << (idx%32))) {
runtime->hw.channels_min++;
runtime->hw.channels_max++;
}
}
epcm->capture_cr_val = emu->efx_voices_mask[0];
epcm->capture_cr_val2 = emu->efx_voices_mask[1];
spin_unlock_irq(&emu->reg_lock);
}
err = snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
&hw_constraints_efx_capture_channels);
if (err < 0) {
kfree(epcm);
return err;
}
snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
&hw_constraints_capture_buffer_sizes);
emu->capture_efx_interrupt = snd_emu10k1_pcm_efx_interrupt;
emu->pcm_capture_efx_substream = substream;
return 0;
}
static int snd_emu10k1_capture_efx_close(struct snd_pcm_substream *substream)
{
struct snd_emu10k1 *emu = snd_pcm_substream_chip(substream);
emu->capture_efx_interrupt = NULL;
emu->pcm_capture_efx_substream = NULL;
return 0;
}
static const struct snd_pcm_ops snd_emu10k1_playback_ops = {
.open = snd_emu10k1_playback_open,
.close = snd_emu10k1_playback_close,
.hw_params = snd_emu10k1_playback_hw_params,
.hw_free = snd_emu10k1_playback_hw_free,
.prepare = snd_emu10k1_playback_prepare,
.trigger = snd_emu10k1_playback_trigger,
.pointer = snd_emu10k1_playback_pointer,
};
static const struct snd_pcm_ops snd_emu10k1_capture_ops = {
.open = snd_emu10k1_capture_open,
.close = snd_emu10k1_capture_close,
.prepare = snd_emu10k1_capture_prepare,
.trigger = snd_emu10k1_capture_trigger,
.pointer = snd_emu10k1_capture_pointer,
};
/* EFX playback */
static const struct snd_pcm_ops snd_emu10k1_efx_playback_ops = {
.open = snd_emu10k1_efx_playback_open,
.close = snd_emu10k1_efx_playback_close,
.hw_params = snd_emu10k1_playback_hw_params,
.hw_free = snd_emu10k1_playback_hw_free,
.prepare = snd_emu10k1_efx_playback_prepare,
.trigger = snd_emu10k1_efx_playback_trigger,
.pointer = snd_emu10k1_playback_pointer,
};
int snd_emu10k1_pcm(struct snd_emu10k1 *emu, int device)
{
struct snd_pcm *pcm;
struct snd_pcm_substream *substream;
int err;
err = snd_pcm_new(emu->card, "emu10k1", device, 32, 1, &pcm);
if (err < 0)
return err;
pcm->private_data = emu;
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_emu10k1_playback_ops);
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_emu10k1_capture_ops);
pcm->info_flags = 0;
pcm->dev_subclass = SNDRV_PCM_SUBCLASS_GENERIC_MIX;
strcpy(pcm->name, "ADC Capture/Standard PCM Playback");
emu->pcm = pcm;
/* playback substream can't use managed buffers due to alignment */
for (substream = pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream; substream; substream = substream->next)
snd_pcm_lib_preallocate_pages(substream, SNDRV_DMA_TYPE_DEV_SG,
&emu->pci->dev,
64*1024, 64*1024);
for (substream = pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream; substream; substream = substream->next)
snd_pcm_set_managed_buffer(substream, SNDRV_DMA_TYPE_DEV,
&emu->pci->dev, 64*1024, 64*1024);
return 0;
}
int snd_emu10k1_pcm_multi(struct snd_emu10k1 *emu, int device)
{
struct snd_pcm *pcm;
struct snd_pcm_substream *substream;
int err;
err = snd_pcm_new(emu->card, "emu10k1", device, 1, 0, &pcm);
if (err < 0)
return err;
pcm->private_data = emu;
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_emu10k1_efx_playback_ops);
pcm->info_flags = 0;
pcm->dev_subclass = SNDRV_PCM_SUBCLASS_GENERIC_MIX;
strcpy(pcm->name, "Multichannel Playback");
emu->pcm_multi = pcm;
for (substream = pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream; substream; substream = substream->next)
snd_pcm_lib_preallocate_pages(substream, SNDRV_DMA_TYPE_DEV_SG,
&emu->pci->dev,
64*1024, 64*1024);
return 0;
}
static const struct snd_pcm_ops snd_emu10k1_capture_mic_ops = {
.open = snd_emu10k1_capture_mic_open,
.close = snd_emu10k1_capture_mic_close,
.prepare = snd_emu10k1_capture_prepare,
.trigger = snd_emu10k1_capture_trigger,
.pointer = snd_emu10k1_capture_pointer,
};
int snd_emu10k1_pcm_mic(struct snd_emu10k1 *emu, int device)
{
struct snd_pcm *pcm;
int err;
err = snd_pcm_new(emu->card, "emu10k1 mic", device, 0, 1, &pcm);
if (err < 0)
return err;
pcm->private_data = emu;
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_emu10k1_capture_mic_ops);
pcm->info_flags = 0;
strcpy(pcm->name, "Mic Capture");
emu->pcm_mic = pcm;
snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, &emu->pci->dev,
64*1024, 64*1024);
return 0;
}
static int snd_emu10k1_pcm_efx_voices_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
int nefx = emu->audigy ? 64 : 32;
uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
uinfo->count = nefx;
uinfo->value.integer.min = 0;
uinfo->value.integer.max = 1;
return 0;
}
static int snd_emu10k1_pcm_efx_voices_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
int nefx = emu->audigy ? 64 : 32;
int idx;
for (idx = 0; idx < nefx; idx++)
ucontrol->value.integer.value[idx] = (emu->efx_voices_mask[idx / 32] & (1 << (idx % 32))) ? 1 : 0;
return 0;
}
static int snd_emu10k1_pcm_efx_voices_mask_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
unsigned int nval[2], bits;
int nefx = emu->audigy ? 64 : 32;
int change, idx;
nval[0] = nval[1] = 0;
for (idx = 0, bits = 0; idx < nefx; idx++)
if (ucontrol->value.integer.value[idx]) {
nval[idx / 32] |= 1 << (idx % 32);
bits++;
}
if (bits == 9 || bits == 11 || bits == 13 || bits == 15 || bits > 16)
return -EINVAL;
spin_lock_irq(&emu->reg_lock);
change = (nval[0] != emu->efx_voices_mask[0]) ||
(nval[1] != emu->efx_voices_mask[1]);
emu->efx_voices_mask[0] = nval[0];
emu->efx_voices_mask[1] = nval[1];
spin_unlock_irq(&emu->reg_lock);
return change;
}
static const struct snd_kcontrol_new snd_emu10k1_pcm_efx_voices_mask = {
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
.name = "Captured FX8010 Outputs",
.info = snd_emu10k1_pcm_efx_voices_mask_info,
.get = snd_emu10k1_pcm_efx_voices_mask_get,
.put = snd_emu10k1_pcm_efx_voices_mask_put
};
static const struct snd_pcm_ops snd_emu10k1_capture_efx_ops = {
.open = snd_emu10k1_capture_efx_open,
.close = snd_emu10k1_capture_efx_close,
.prepare = snd_emu10k1_capture_prepare,
.trigger = snd_emu10k1_capture_trigger,
.pointer = snd_emu10k1_capture_pointer,
};
/* EFX playback */
#define INITIAL_TRAM_SHIFT 14
#define INITIAL_TRAM_POS(size) ((((size) / 2) - INITIAL_TRAM_SHIFT) - 1)
static void snd_emu10k1_fx8010_playback_irq(struct snd_emu10k1 *emu, void *private_data)
{
struct snd_pcm_substream *substream = private_data;
snd_pcm_period_elapsed(substream);
}
static void snd_emu10k1_fx8010_playback_tram_poke1(unsigned short *dst_left,
unsigned short *dst_right,
unsigned short *src,
unsigned int count,
unsigned int tram_shift)
{
/*
dev_dbg(emu->card->dev,
"tram_poke1: dst_left = 0x%p, dst_right = 0x%p, "
"src = 0x%p, count = 0x%x\n",
dst_left, dst_right, src, count);
*/
if ((tram_shift & 1) == 0) {
while (count--) {
*dst_left-- = *src++;
*dst_right-- = *src++;
}
} else {
while (count--) {
*dst_right-- = *src++;
*dst_left-- = *src++;
}
}
}
static void fx8010_pb_trans_copy(struct snd_pcm_substream *substream,
struct snd_pcm_indirect *rec, size_t bytes)
{
struct snd_emu10k1 *emu = snd_pcm_substream_chip(substream);
struct snd_emu10k1_fx8010_pcm *pcm = &emu->fx8010.pcm[substream->number];
unsigned int tram_size = pcm->buffer_size;
unsigned short *src = (unsigned short *)(substream->runtime->dma_area + rec->sw_data);
unsigned int frames = bytes >> 2, count;
unsigned int tram_pos = pcm->tram_pos;
unsigned int tram_shift = pcm->tram_shift;
while (frames > tram_pos) {
count = tram_pos + 1;
snd_emu10k1_fx8010_playback_tram_poke1((unsigned short *)emu->fx8010.etram_pages.area + tram_pos,
(unsigned short *)emu->fx8010.etram_pages.area + tram_pos + tram_size / 2,
src, count, tram_shift);
src += count * 2;
frames -= count;
tram_pos = (tram_size / 2) - 1;
tram_shift++;
}
snd_emu10k1_fx8010_playback_tram_poke1((unsigned short *)emu->fx8010.etram_pages.area + tram_pos,
(unsigned short *)emu->fx8010.etram_pages.area + tram_pos + tram_size / 2,
src, frames, tram_shift);
tram_pos -= frames;
pcm->tram_pos = tram_pos;
pcm->tram_shift = tram_shift;
}
static int snd_emu10k1_fx8010_playback_transfer(struct snd_pcm_substream *substream)
{
struct snd_emu10k1 *emu = snd_pcm_substream_chip(substream);
struct snd_emu10k1_fx8010_pcm *pcm = &emu->fx8010.pcm[substream->number];
return snd_pcm_indirect_playback_transfer(substream, &pcm->pcm_rec,
fx8010_pb_trans_copy);
}
static int snd_emu10k1_fx8010_playback_hw_free(struct snd_pcm_substream *substream)
{
struct snd_emu10k1 *emu = snd_pcm_substream_chip(substream);
struct snd_emu10k1_fx8010_pcm *pcm = &emu->fx8010.pcm[substream->number];
unsigned int i;
for (i = 0; i < pcm->channels; i++)
snd_emu10k1_ptr_write(emu, TANKMEMADDRREGBASE + 0x80 + pcm->etram[i], 0, 0);
return 0;
}
static int snd_emu10k1_fx8010_playback_prepare(struct snd_pcm_substream *substream)
{
struct snd_emu10k1 *emu = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_emu10k1_fx8010_pcm *pcm = &emu->fx8010.pcm[substream->number];
unsigned int i;
/*
dev_dbg(emu->card->dev, "prepare: etram_pages = 0x%p, dma_area = 0x%x, "
"buffer_size = 0x%x (0x%x)\n",
emu->fx8010.etram_pages, runtime->dma_area,
runtime->buffer_size, runtime->buffer_size << 2);
*/
memset(&pcm->pcm_rec, 0, sizeof(pcm->pcm_rec));
pcm->pcm_rec.hw_buffer_size = pcm->buffer_size * 2; /* byte size */
pcm->pcm_rec.sw_buffer_size = snd_pcm_lib_buffer_bytes(substream);
pcm->tram_pos = INITIAL_TRAM_POS(pcm->buffer_size);
pcm->tram_shift = 0;
snd_emu10k1_ptr_write_multiple(emu, 0,
emu->gpr_base + pcm->gpr_running, 0, /* reset */
emu->gpr_base + pcm->gpr_trigger, 0, /* reset */
emu->gpr_base + pcm->gpr_size, runtime->buffer_size,
emu->gpr_base + pcm->gpr_ptr, 0, /* reset ptr number */
emu->gpr_base + pcm->gpr_count, runtime->period_size,
emu->gpr_base + pcm->gpr_tmpcount, runtime->period_size,
REGLIST_END);
for (i = 0; i < pcm->channels; i++)
snd_emu10k1_ptr_write(emu, TANKMEMADDRREGBASE + 0x80 + pcm->etram[i], 0, (TANKMEMADDRREG_READ|TANKMEMADDRREG_ALIGN) + i * (runtime->buffer_size / pcm->channels));
return 0;
}
static int snd_emu10k1_fx8010_playback_trigger(struct snd_pcm_substream *substream, int cmd)
{
struct snd_emu10k1 *emu = snd_pcm_substream_chip(substream);
struct snd_emu10k1_fx8010_pcm *pcm = &emu->fx8010.pcm[substream->number];
int result = 0;
spin_lock(&emu->reg_lock);
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
/* follow thru */
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
case SNDRV_PCM_TRIGGER_RESUME:
#ifdef EMU10K1_SET_AC3_IEC958
{
int i;
for (i = 0; i < 3; i++) {
unsigned int bits;
bits = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC | SPCS_GENERATIONSTATUS |
0x00001200 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT | SPCS_NOTAUDIODATA;
snd_emu10k1_ptr_write(emu, SPCS0 + i, 0, bits);
}
}
#endif
result = snd_emu10k1_fx8010_register_irq_handler(emu, snd_emu10k1_fx8010_playback_irq, pcm->gpr_running, substream, &pcm->irq);
if (result < 0)
goto __err;
snd_emu10k1_fx8010_playback_transfer(substream); /* roll the ball */
snd_emu10k1_ptr_write(emu, emu->gpr_base + pcm->gpr_trigger, 0, 1);
break;
case SNDRV_PCM_TRIGGER_STOP:
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
case SNDRV_PCM_TRIGGER_SUSPEND:
snd_emu10k1_fx8010_unregister_irq_handler(emu, &pcm->irq);
snd_emu10k1_ptr_write(emu, emu->gpr_base + pcm->gpr_trigger, 0, 0);
pcm->tram_pos = INITIAL_TRAM_POS(pcm->buffer_size);
pcm->tram_shift = 0;
break;
default:
result = -EINVAL;
break;
}
__err:
spin_unlock(&emu->reg_lock);
return result;
}
static snd_pcm_uframes_t snd_emu10k1_fx8010_playback_pointer(struct snd_pcm_substream *substream)
{
struct snd_emu10k1 *emu = snd_pcm_substream_chip(substream);
struct snd_emu10k1_fx8010_pcm *pcm = &emu->fx8010.pcm[substream->number];
size_t ptr; /* byte pointer */
if (!snd_emu10k1_ptr_read(emu, emu->gpr_base + pcm->gpr_trigger, 0))
return 0;
ptr = snd_emu10k1_ptr_read(emu, emu->gpr_base + pcm->gpr_ptr, 0) << 2;
return snd_pcm_indirect_playback_pointer(substream, &pcm->pcm_rec, ptr);
}
static const struct snd_pcm_hardware snd_emu10k1_fx8010_playback =
{
.info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_RESUME |
/* SNDRV_PCM_INFO_MMAP_VALID | */ SNDRV_PCM_INFO_PAUSE |
SNDRV_PCM_INFO_SYNC_APPLPTR),
.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
.rates = SNDRV_PCM_RATE_48000,
.rate_min = 48000,
.rate_max = 48000,
.channels_min = 1,
.channels_max = 1,
.buffer_bytes_max = (128*1024),
.period_bytes_min = 1024,
.period_bytes_max = (128*1024),
.periods_min = 2,
.periods_max = 1024,
.fifo_size = 0,
};
static int snd_emu10k1_fx8010_playback_open(struct snd_pcm_substream *substream)
{
struct snd_emu10k1 *emu = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_emu10k1_fx8010_pcm *pcm = &emu->fx8010.pcm[substream->number];
runtime->hw = snd_emu10k1_fx8010_playback;
runtime->hw.channels_min = runtime->hw.channels_max = pcm->channels;
runtime->hw.period_bytes_max = (pcm->buffer_size * 2) / 2;
spin_lock_irq(&emu->reg_lock);
if (pcm->valid == 0) {
spin_unlock_irq(&emu->reg_lock);
return -ENODEV;
}
pcm->opened = 1;
spin_unlock_irq(&emu->reg_lock);
return 0;
}
static int snd_emu10k1_fx8010_playback_close(struct snd_pcm_substream *substream)
{
struct snd_emu10k1 *emu = snd_pcm_substream_chip(substream);
struct snd_emu10k1_fx8010_pcm *pcm = &emu->fx8010.pcm[substream->number];
spin_lock_irq(&emu->reg_lock);
pcm->opened = 0;
spin_unlock_irq(&emu->reg_lock);
return 0;
}
static const struct snd_pcm_ops snd_emu10k1_fx8010_playback_ops = {
.open = snd_emu10k1_fx8010_playback_open,
.close = snd_emu10k1_fx8010_playback_close,
.hw_free = snd_emu10k1_fx8010_playback_hw_free,
.prepare = snd_emu10k1_fx8010_playback_prepare,
.trigger = snd_emu10k1_fx8010_playback_trigger,
.pointer = snd_emu10k1_fx8010_playback_pointer,
.ack = snd_emu10k1_fx8010_playback_transfer,
};
int snd_emu10k1_pcm_efx(struct snd_emu10k1 *emu, int device)
{
struct snd_pcm *pcm;
struct snd_kcontrol *kctl;
int err;
err = snd_pcm_new(emu->card, "emu10k1 efx", device, emu->audigy ? 0 : 8, 1, &pcm);
if (err < 0)
return err;
pcm->private_data = emu;
if (!emu->audigy)
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_emu10k1_fx8010_playback_ops);
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_emu10k1_capture_efx_ops);
pcm->info_flags = 0;
if (emu->audigy)
strcpy(pcm->name, "Multichannel Capture");
else
strcpy(pcm->name, "Multichannel Capture/PT Playback");
emu->pcm_efx = pcm;
if (!emu->card_capabilities->emu_model) {
// On Sound Blasters, the DSP code copies the EXTINs to FXBUS2.
// The mask determines which of these and the EXTOUTs the multi-
// channel capture actually records (the channel order is fixed).
if (emu->audigy) {
emu->efx_voices_mask[0] = 0;
emu->efx_voices_mask[1] = 0xffff;
} else {
emu->efx_voices_mask[0] = 0xffff0000;
emu->efx_voices_mask[1] = 0;
}
kctl = snd_ctl_new1(&snd_emu10k1_pcm_efx_voices_mask, emu);
if (!kctl)
return -ENOMEM;
kctl->id.device = device;
err = snd_ctl_add(emu->card, kctl);
if (err < 0)
return err;
} else {
// On E-MU cards, the DSP code copies the P16VINs/EMU32INs to
// FXBUS2. These are already selected & routed by the FPGA,
// so there is no need to apply additional masking.
}
snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, &emu->pci->dev,
64*1024, 64*1024);
return 0;
}
| linux-master | sound/pci/emu10k1/emupcm.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (c) by Jaroslav Kysela <[email protected]>,
* Takashi Iwai <[email protected]>
* Lee Revell <[email protected]>
* James Courtier-Dutton <[email protected]>
* Oswald Buddenhagen <[email protected]>
* Creative Labs, Inc.
*
* Routines for control of EMU10K1 chips / mixer routines
*/
#include <linux/time.h>
#include <linux/init.h>
#include <sound/core.h>
#include <sound/emu10k1.h>
#include <linux/delay.h>
#include <sound/tlv.h>
#include "p17v.h"
#define AC97_ID_STAC9758 0x83847658
static const DECLARE_TLV_DB_SCALE(snd_audigy_db_scale2, -10350, 50, 1); /* WM8775 gain scale */
static int add_ctls(struct snd_emu10k1 *emu, const struct snd_kcontrol_new *tpl,
const char * const *ctls, unsigned nctls)
{
struct snd_kcontrol_new kctl = *tpl;
int err;
for (unsigned i = 0; i < nctls; i++) {
kctl.name = ctls[i];
kctl.private_value = i;
err = snd_ctl_add(emu->card, snd_ctl_new1(&kctl, emu));
if (err < 0)
return err;
}
return 0;
}
static int snd_emu10k1_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
uinfo->count = 1;
return 0;
}
static int snd_emu10k1_spdif_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
/* Limit: emu->spdif_bits */
if (idx >= 3)
return -EINVAL;
ucontrol->value.iec958.status[0] = (emu->spdif_bits[idx] >> 0) & 0xff;
ucontrol->value.iec958.status[1] = (emu->spdif_bits[idx] >> 8) & 0xff;
ucontrol->value.iec958.status[2] = (emu->spdif_bits[idx] >> 16) & 0xff;
ucontrol->value.iec958.status[3] = (emu->spdif_bits[idx] >> 24) & 0xff;
return 0;
}
static int snd_emu10k1_spdif_get_mask(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
ucontrol->value.iec958.status[0] = 0xff;
ucontrol->value.iec958.status[1] = 0xff;
ucontrol->value.iec958.status[2] = 0xff;
ucontrol->value.iec958.status[3] = 0xff;
return 0;
}
#define PAIR_PS(base, one, two, sfx) base " " one sfx, base " " two sfx
#define LR_PS(base, sfx) PAIR_PS(base, "Left", "Right", sfx)
#define ADAT_PS(pfx, sfx) \
pfx "ADAT 0" sfx, pfx "ADAT 1" sfx, pfx "ADAT 2" sfx, pfx "ADAT 3" sfx, \
pfx "ADAT 4" sfx, pfx "ADAT 5" sfx, pfx "ADAT 6" sfx, pfx "ADAT 7" sfx
#define PAIR_REGS(base, one, two) \
base ## one ## 1, \
base ## two ## 1
#define LR_REGS(base) PAIR_REGS(base, _LEFT, _RIGHT)
#define ADAT_REGS(base) \
base+0, base+1, base+2, base+3, base+4, base+5, base+6, base+7
/*
* List of data sources available for each destination
*/
#define DSP_TEXTS \
"DSP 0", "DSP 1", "DSP 2", "DSP 3", "DSP 4", "DSP 5", "DSP 6", "DSP 7", \
"DSP 8", "DSP 9", "DSP 10", "DSP 11", "DSP 12", "DSP 13", "DSP 14", "DSP 15", \
"DSP 16", "DSP 17", "DSP 18", "DSP 19", "DSP 20", "DSP 21", "DSP 22", "DSP 23", \
"DSP 24", "DSP 25", "DSP 26", "DSP 27", "DSP 28", "DSP 29", "DSP 30", "DSP 31"
#define PAIR_TEXTS(base, one, two) PAIR_PS(base, one, two, "")
#define LR_TEXTS(base) LR_PS(base, "")
#define ADAT_TEXTS(pfx) ADAT_PS(pfx, "")
#define EMU32_SRC_REGS \
EMU_SRC_ALICE_EMU32A, \
EMU_SRC_ALICE_EMU32A+1, \
EMU_SRC_ALICE_EMU32A+2, \
EMU_SRC_ALICE_EMU32A+3, \
EMU_SRC_ALICE_EMU32A+4, \
EMU_SRC_ALICE_EMU32A+5, \
EMU_SRC_ALICE_EMU32A+6, \
EMU_SRC_ALICE_EMU32A+7, \
EMU_SRC_ALICE_EMU32A+8, \
EMU_SRC_ALICE_EMU32A+9, \
EMU_SRC_ALICE_EMU32A+0xa, \
EMU_SRC_ALICE_EMU32A+0xb, \
EMU_SRC_ALICE_EMU32A+0xc, \
EMU_SRC_ALICE_EMU32A+0xd, \
EMU_SRC_ALICE_EMU32A+0xe, \
EMU_SRC_ALICE_EMU32A+0xf, \
EMU_SRC_ALICE_EMU32B, \
EMU_SRC_ALICE_EMU32B+1, \
EMU_SRC_ALICE_EMU32B+2, \
EMU_SRC_ALICE_EMU32B+3, \
EMU_SRC_ALICE_EMU32B+4, \
EMU_SRC_ALICE_EMU32B+5, \
EMU_SRC_ALICE_EMU32B+6, \
EMU_SRC_ALICE_EMU32B+7, \
EMU_SRC_ALICE_EMU32B+8, \
EMU_SRC_ALICE_EMU32B+9, \
EMU_SRC_ALICE_EMU32B+0xa, \
EMU_SRC_ALICE_EMU32B+0xb, \
EMU_SRC_ALICE_EMU32B+0xc, \
EMU_SRC_ALICE_EMU32B+0xd, \
EMU_SRC_ALICE_EMU32B+0xe, \
EMU_SRC_ALICE_EMU32B+0xf
/* 1010 rev1 */
#define EMU1010_COMMON_TEXTS \
"Silence", \
PAIR_TEXTS("Dock Mic", "A", "B"), \
LR_TEXTS("Dock ADC1"), \
LR_TEXTS("Dock ADC2"), \
LR_TEXTS("Dock ADC3"), \
LR_TEXTS("0202 ADC"), \
LR_TEXTS("1010 SPDIF"), \
ADAT_TEXTS("1010 ")
static const char * const emu1010_src_texts[] = {
EMU1010_COMMON_TEXTS,
DSP_TEXTS,
};
static const unsigned short emu1010_src_regs[] = {
EMU_SRC_SILENCE,
PAIR_REGS(EMU_SRC_DOCK_MIC, _A, _B),
LR_REGS(EMU_SRC_DOCK_ADC1),
LR_REGS(EMU_SRC_DOCK_ADC2),
LR_REGS(EMU_SRC_DOCK_ADC3),
LR_REGS(EMU_SRC_HAMOA_ADC),
LR_REGS(EMU_SRC_HANA_SPDIF),
ADAT_REGS(EMU_SRC_HANA_ADAT),
EMU32_SRC_REGS,
};
static_assert(ARRAY_SIZE(emu1010_src_regs) == ARRAY_SIZE(emu1010_src_texts));
/* 1010 rev2 */
#define EMU1010b_COMMON_TEXTS \
"Silence", \
PAIR_TEXTS("Dock Mic", "A", "B"), \
LR_TEXTS("Dock ADC1"), \
LR_TEXTS("Dock ADC2"), \
LR_TEXTS("0202 ADC"), \
LR_TEXTS("Dock SPDIF"), \
LR_TEXTS("1010 SPDIF"), \
ADAT_TEXTS("Dock "), \
ADAT_TEXTS("1010 ")
static const char * const emu1010b_src_texts[] = {
EMU1010b_COMMON_TEXTS,
DSP_TEXTS,
};
static const unsigned short emu1010b_src_regs[] = {
EMU_SRC_SILENCE,
PAIR_REGS(EMU_SRC_DOCK_MIC, _A, _B),
LR_REGS(EMU_SRC_DOCK_ADC1),
LR_REGS(EMU_SRC_DOCK_ADC2),
LR_REGS(EMU_SRC_HAMOA_ADC),
LR_REGS(EMU_SRC_MDOCK_SPDIF),
LR_REGS(EMU_SRC_HANA_SPDIF),
ADAT_REGS(EMU_SRC_MDOCK_ADAT),
ADAT_REGS(EMU_SRC_HANA_ADAT),
EMU32_SRC_REGS,
};
static_assert(ARRAY_SIZE(emu1010b_src_regs) == ARRAY_SIZE(emu1010b_src_texts));
/* 1616(m) cardbus */
#define EMU1616_COMMON_TEXTS \
"Silence", \
PAIR_TEXTS("Mic", "A", "B"), \
LR_TEXTS("ADC1"), \
LR_TEXTS("ADC2"), \
LR_TEXTS("SPDIF"), \
ADAT_TEXTS("")
static const char * const emu1616_src_texts[] = {
EMU1616_COMMON_TEXTS,
DSP_TEXTS,
};
static const unsigned short emu1616_src_regs[] = {
EMU_SRC_SILENCE,
PAIR_REGS(EMU_SRC_DOCK_MIC, _A, _B),
LR_REGS(EMU_SRC_DOCK_ADC1),
LR_REGS(EMU_SRC_DOCK_ADC2),
LR_REGS(EMU_SRC_MDOCK_SPDIF),
ADAT_REGS(EMU_SRC_MDOCK_ADAT),
EMU32_SRC_REGS,
};
static_assert(ARRAY_SIZE(emu1616_src_regs) == ARRAY_SIZE(emu1616_src_texts));
/* 0404 rev1 & rev2 */
#define EMU0404_COMMON_TEXTS \
"Silence", \
LR_TEXTS("ADC"), \
LR_TEXTS("SPDIF")
static const char * const emu0404_src_texts[] = {
EMU0404_COMMON_TEXTS,
DSP_TEXTS,
};
static const unsigned short emu0404_src_regs[] = {
EMU_SRC_SILENCE,
LR_REGS(EMU_SRC_HAMOA_ADC),
LR_REGS(EMU_SRC_HANA_SPDIF),
EMU32_SRC_REGS,
};
static_assert(ARRAY_SIZE(emu0404_src_regs) == ARRAY_SIZE(emu0404_src_texts));
/*
* Data destinations - physical EMU outputs.
* Each destination has an enum mixer control to choose a data source
*/
#define LR_CTLS(base) LR_PS(base, " Playback Enum")
#define ADAT_CTLS(pfx) ADAT_PS(pfx, " Playback Enum")
/* 1010 rev1 */
static const char * const emu1010_output_texts[] = {
LR_CTLS("Dock DAC1"),
LR_CTLS("Dock DAC2"),
LR_CTLS("Dock DAC3"),
LR_CTLS("Dock DAC4"),
LR_CTLS("Dock Phones"),
LR_CTLS("Dock SPDIF"),
LR_CTLS("0202 DAC"),
LR_CTLS("1010 SPDIF"),
ADAT_CTLS("1010 "),
};
static_assert(ARRAY_SIZE(emu1010_output_texts) <= NUM_OUTPUT_DESTS);
static const unsigned short emu1010_output_dst[] = {
LR_REGS(EMU_DST_DOCK_DAC1),
LR_REGS(EMU_DST_DOCK_DAC2),
LR_REGS(EMU_DST_DOCK_DAC3),
LR_REGS(EMU_DST_DOCK_DAC4),
LR_REGS(EMU_DST_DOCK_PHONES),
LR_REGS(EMU_DST_DOCK_SPDIF),
LR_REGS(EMU_DST_HAMOA_DAC),
LR_REGS(EMU_DST_HANA_SPDIF),
ADAT_REGS(EMU_DST_HANA_ADAT),
};
static_assert(ARRAY_SIZE(emu1010_output_dst) == ARRAY_SIZE(emu1010_output_texts));
static const unsigned short emu1010_output_dflt[] = {
EMU_SRC_ALICE_EMU32A+0, EMU_SRC_ALICE_EMU32A+1,
EMU_SRC_ALICE_EMU32A+2, EMU_SRC_ALICE_EMU32A+3,
EMU_SRC_ALICE_EMU32A+4, EMU_SRC_ALICE_EMU32A+5,
EMU_SRC_ALICE_EMU32A+6, EMU_SRC_ALICE_EMU32A+7,
EMU_SRC_ALICE_EMU32A+0, EMU_SRC_ALICE_EMU32A+1,
EMU_SRC_ALICE_EMU32A+0, EMU_SRC_ALICE_EMU32A+1,
EMU_SRC_ALICE_EMU32A+0, EMU_SRC_ALICE_EMU32A+1,
EMU_SRC_ALICE_EMU32A+0, EMU_SRC_ALICE_EMU32A+1,
EMU_SRC_ALICE_EMU32A+0, EMU_SRC_ALICE_EMU32A+1, EMU_SRC_ALICE_EMU32A+2, EMU_SRC_ALICE_EMU32A+3,
EMU_SRC_ALICE_EMU32A+4, EMU_SRC_ALICE_EMU32A+5, EMU_SRC_ALICE_EMU32A+6, EMU_SRC_ALICE_EMU32A+7,
};
static_assert(ARRAY_SIZE(emu1010_output_dflt) == ARRAY_SIZE(emu1010_output_dst));
/* 1010 rev2 */
static const char * const snd_emu1010b_output_texts[] = {
LR_CTLS("Dock DAC1"),
LR_CTLS("Dock DAC2"),
LR_CTLS("Dock DAC3"),
LR_CTLS("Dock SPDIF"),
ADAT_CTLS("Dock "),
LR_CTLS("0202 DAC"),
LR_CTLS("1010 SPDIF"),
ADAT_CTLS("1010 "),
};
static_assert(ARRAY_SIZE(snd_emu1010b_output_texts) <= NUM_OUTPUT_DESTS);
static const unsigned short emu1010b_output_dst[] = {
LR_REGS(EMU_DST_DOCK_DAC1),
LR_REGS(EMU_DST_DOCK_DAC2),
LR_REGS(EMU_DST_DOCK_DAC3),
LR_REGS(EMU_DST_MDOCK_SPDIF),
ADAT_REGS(EMU_DST_MDOCK_ADAT),
LR_REGS(EMU_DST_HAMOA_DAC),
LR_REGS(EMU_DST_HANA_SPDIF),
ADAT_REGS(EMU_DST_HANA_ADAT),
};
static_assert(ARRAY_SIZE(emu1010b_output_dst) == ARRAY_SIZE(snd_emu1010b_output_texts));
static const unsigned short emu1010b_output_dflt[] = {
EMU_SRC_ALICE_EMU32A+0, EMU_SRC_ALICE_EMU32A+1,
EMU_SRC_ALICE_EMU32A+2, EMU_SRC_ALICE_EMU32A+3,
EMU_SRC_ALICE_EMU32A+4, EMU_SRC_ALICE_EMU32A+5,
EMU_SRC_ALICE_EMU32A+0, EMU_SRC_ALICE_EMU32A+1,
EMU_SRC_ALICE_EMU32A+0, EMU_SRC_ALICE_EMU32A+1, EMU_SRC_ALICE_EMU32A+2, EMU_SRC_ALICE_EMU32A+3,
EMU_SRC_ALICE_EMU32A+4, EMU_SRC_ALICE_EMU32A+5, EMU_SRC_ALICE_EMU32A+6, EMU_SRC_ALICE_EMU32A+7,
EMU_SRC_ALICE_EMU32A+0, EMU_SRC_ALICE_EMU32A+1,
EMU_SRC_ALICE_EMU32A+0, EMU_SRC_ALICE_EMU32A+1,
EMU_SRC_ALICE_EMU32A+0, EMU_SRC_ALICE_EMU32A+1, EMU_SRC_ALICE_EMU32A+2, EMU_SRC_ALICE_EMU32A+3,
EMU_SRC_ALICE_EMU32A+4, EMU_SRC_ALICE_EMU32A+5, EMU_SRC_ALICE_EMU32A+6, EMU_SRC_ALICE_EMU32A+7,
};
/* 1616(m) cardbus */
static const char * const snd_emu1616_output_texts[] = {
LR_CTLS("Dock DAC1"),
LR_CTLS("Dock DAC2"),
LR_CTLS("Dock DAC3"),
LR_CTLS("Dock SPDIF"),
ADAT_CTLS("Dock "),
LR_CTLS("Mana DAC"),
};
static_assert(ARRAY_SIZE(snd_emu1616_output_texts) <= NUM_OUTPUT_DESTS);
static const unsigned short emu1616_output_dst[] = {
LR_REGS(EMU_DST_DOCK_DAC1),
LR_REGS(EMU_DST_DOCK_DAC2),
LR_REGS(EMU_DST_DOCK_DAC3),
LR_REGS(EMU_DST_MDOCK_SPDIF),
ADAT_REGS(EMU_DST_MDOCK_ADAT),
EMU_DST_MANA_DAC_LEFT, EMU_DST_MANA_DAC_RIGHT,
};
static_assert(ARRAY_SIZE(emu1616_output_dst) == ARRAY_SIZE(snd_emu1616_output_texts));
static const unsigned short emu1616_output_dflt[] = {
EMU_SRC_ALICE_EMU32A+0, EMU_SRC_ALICE_EMU32A+1,
EMU_SRC_ALICE_EMU32A+2, EMU_SRC_ALICE_EMU32A+3,
EMU_SRC_ALICE_EMU32A+4, EMU_SRC_ALICE_EMU32A+5,
EMU_SRC_ALICE_EMU32A+0, EMU_SRC_ALICE_EMU32A+1,
EMU_SRC_ALICE_EMU32A+0, EMU_SRC_ALICE_EMU32A+1, EMU_SRC_ALICE_EMU32A+2, EMU_SRC_ALICE_EMU32A+3,
EMU_SRC_ALICE_EMU32A+4, EMU_SRC_ALICE_EMU32A+5, EMU_SRC_ALICE_EMU32A+6, EMU_SRC_ALICE_EMU32A+7,
EMU_SRC_ALICE_EMU32A+0, EMU_SRC_ALICE_EMU32A+1,
};
static_assert(ARRAY_SIZE(emu1616_output_dflt) == ARRAY_SIZE(emu1616_output_dst));
/* 0404 rev1 & rev2 */
static const char * const snd_emu0404_output_texts[] = {
LR_CTLS("DAC"),
LR_CTLS("SPDIF"),
};
static_assert(ARRAY_SIZE(snd_emu0404_output_texts) <= NUM_OUTPUT_DESTS);
static const unsigned short emu0404_output_dst[] = {
LR_REGS(EMU_DST_HAMOA_DAC),
LR_REGS(EMU_DST_HANA_SPDIF),
};
static_assert(ARRAY_SIZE(emu0404_output_dst) == ARRAY_SIZE(snd_emu0404_output_texts));
static const unsigned short emu0404_output_dflt[] = {
EMU_SRC_ALICE_EMU32A+0, EMU_SRC_ALICE_EMU32A+1,
EMU_SRC_ALICE_EMU32A+0, EMU_SRC_ALICE_EMU32A+1,
};
static_assert(ARRAY_SIZE(emu0404_output_dflt) == ARRAY_SIZE(emu0404_output_dst));
/*
* Data destinations - FPGA outputs going to Alice2 (Audigy) for
* capture (EMU32 + I2S links)
* Each destination has an enum mixer control to choose a data source
*/
static const char * const emu1010_input_texts[] = {
"DSP 0 Capture Enum",
"DSP 1 Capture Enum",
"DSP 2 Capture Enum",
"DSP 3 Capture Enum",
"DSP 4 Capture Enum",
"DSP 5 Capture Enum",
"DSP 6 Capture Enum",
"DSP 7 Capture Enum",
"DSP 8 Capture Enum",
"DSP 9 Capture Enum",
"DSP A Capture Enum",
"DSP B Capture Enum",
"DSP C Capture Enum",
"DSP D Capture Enum",
"DSP E Capture Enum",
"DSP F Capture Enum",
/* These exist only on rev1 EMU1010 cards. */
"DSP 10 Capture Enum",
"DSP 11 Capture Enum",
"DSP 12 Capture Enum",
"DSP 13 Capture Enum",
"DSP 14 Capture Enum",
"DSP 15 Capture Enum",
};
static_assert(ARRAY_SIZE(emu1010_input_texts) <= NUM_INPUT_DESTS);
static const unsigned short emu1010_input_dst[] = {
EMU_DST_ALICE2_EMU32_0,
EMU_DST_ALICE2_EMU32_1,
EMU_DST_ALICE2_EMU32_2,
EMU_DST_ALICE2_EMU32_3,
EMU_DST_ALICE2_EMU32_4,
EMU_DST_ALICE2_EMU32_5,
EMU_DST_ALICE2_EMU32_6,
EMU_DST_ALICE2_EMU32_7,
EMU_DST_ALICE2_EMU32_8,
EMU_DST_ALICE2_EMU32_9,
EMU_DST_ALICE2_EMU32_A,
EMU_DST_ALICE2_EMU32_B,
EMU_DST_ALICE2_EMU32_C,
EMU_DST_ALICE2_EMU32_D,
EMU_DST_ALICE2_EMU32_E,
EMU_DST_ALICE2_EMU32_F,
/* These exist only on rev1 EMU1010 cards. */
EMU_DST_ALICE_I2S0_LEFT,
EMU_DST_ALICE_I2S0_RIGHT,
EMU_DST_ALICE_I2S1_LEFT,
EMU_DST_ALICE_I2S1_RIGHT,
EMU_DST_ALICE_I2S2_LEFT,
EMU_DST_ALICE_I2S2_RIGHT,
};
static_assert(ARRAY_SIZE(emu1010_input_dst) == ARRAY_SIZE(emu1010_input_texts));
static const unsigned short emu1010_input_dflt[] = {
EMU_SRC_DOCK_MIC_A1,
EMU_SRC_DOCK_MIC_B1,
EMU_SRC_HAMOA_ADC_LEFT1,
EMU_SRC_HAMOA_ADC_RIGHT1,
EMU_SRC_DOCK_ADC1_LEFT1,
EMU_SRC_DOCK_ADC1_RIGHT1,
EMU_SRC_DOCK_ADC2_LEFT1,
EMU_SRC_DOCK_ADC2_RIGHT1,
/* Pavel Hofman - setting defaults for all capture channels.
* Defaults only, users will set their own values anyways, let's
* just copy/paste. */
EMU_SRC_DOCK_MIC_A1,
EMU_SRC_DOCK_MIC_B1,
EMU_SRC_HAMOA_ADC_LEFT1,
EMU_SRC_HAMOA_ADC_RIGHT1,
EMU_SRC_DOCK_ADC1_LEFT1,
EMU_SRC_DOCK_ADC1_RIGHT1,
EMU_SRC_DOCK_ADC2_LEFT1,
EMU_SRC_DOCK_ADC2_RIGHT1,
EMU_SRC_DOCK_ADC1_LEFT1,
EMU_SRC_DOCK_ADC1_RIGHT1,
EMU_SRC_DOCK_ADC2_LEFT1,
EMU_SRC_DOCK_ADC2_RIGHT1,
EMU_SRC_DOCK_ADC3_LEFT1,
EMU_SRC_DOCK_ADC3_RIGHT1,
};
static_assert(ARRAY_SIZE(emu1010_input_dflt) == ARRAY_SIZE(emu1010_input_dst));
static const unsigned short emu0404_input_dflt[] = {
EMU_SRC_HAMOA_ADC_LEFT1,
EMU_SRC_HAMOA_ADC_RIGHT1,
EMU_SRC_SILENCE,
EMU_SRC_SILENCE,
EMU_SRC_SILENCE,
EMU_SRC_SILENCE,
EMU_SRC_SILENCE,
EMU_SRC_SILENCE,
EMU_SRC_HANA_SPDIF_LEFT1,
EMU_SRC_HANA_SPDIF_RIGHT1,
EMU_SRC_SILENCE,
EMU_SRC_SILENCE,
EMU_SRC_SILENCE,
EMU_SRC_SILENCE,
EMU_SRC_SILENCE,
EMU_SRC_SILENCE,
};
struct snd_emu1010_routing_info {
const char * const *src_texts;
const char * const *out_texts;
const unsigned short *src_regs;
const unsigned short *out_regs;
const unsigned short *in_regs;
const unsigned short *out_dflts;
const unsigned short *in_dflts;
unsigned n_srcs;
unsigned n_outs;
unsigned n_ins;
};
static const struct snd_emu1010_routing_info emu1010_routing_info[] = {
{
/* rev1 1010 */
.src_regs = emu1010_src_regs,
.src_texts = emu1010_src_texts,
.n_srcs = ARRAY_SIZE(emu1010_src_texts),
.out_dflts = emu1010_output_dflt,
.out_regs = emu1010_output_dst,
.out_texts = emu1010_output_texts,
.n_outs = ARRAY_SIZE(emu1010_output_dst),
.in_dflts = emu1010_input_dflt,
.in_regs = emu1010_input_dst,
.n_ins = ARRAY_SIZE(emu1010_input_dst),
},
{
/* rev2 1010 */
.src_regs = emu1010b_src_regs,
.src_texts = emu1010b_src_texts,
.n_srcs = ARRAY_SIZE(emu1010b_src_texts),
.out_dflts = emu1010b_output_dflt,
.out_regs = emu1010b_output_dst,
.out_texts = snd_emu1010b_output_texts,
.n_outs = ARRAY_SIZE(emu1010b_output_dst),
.in_dflts = emu1010_input_dflt,
.in_regs = emu1010_input_dst,
.n_ins = ARRAY_SIZE(emu1010_input_dst) - 6,
},
{
/* 1616(m) cardbus */
.src_regs = emu1616_src_regs,
.src_texts = emu1616_src_texts,
.n_srcs = ARRAY_SIZE(emu1616_src_texts),
.out_dflts = emu1616_output_dflt,
.out_regs = emu1616_output_dst,
.out_texts = snd_emu1616_output_texts,
.n_outs = ARRAY_SIZE(emu1616_output_dst),
.in_dflts = emu1010_input_dflt,
.in_regs = emu1010_input_dst,
.n_ins = ARRAY_SIZE(emu1010_input_dst) - 6,
},
{
/* 0404 */
.src_regs = emu0404_src_regs,
.src_texts = emu0404_src_texts,
.n_srcs = ARRAY_SIZE(emu0404_src_texts),
.out_dflts = emu0404_output_dflt,
.out_regs = emu0404_output_dst,
.out_texts = snd_emu0404_output_texts,
.n_outs = ARRAY_SIZE(emu0404_output_dflt),
.in_dflts = emu0404_input_dflt,
.in_regs = emu1010_input_dst,
.n_ins = ARRAY_SIZE(emu1010_input_dst) - 6,
},
};
static unsigned emu1010_idx(struct snd_emu10k1 *emu)
{
return emu->card_capabilities->emu_model - 1;
}
static void snd_emu1010_output_source_apply(struct snd_emu10k1 *emu,
int channel, int src)
{
const struct snd_emu1010_routing_info *emu_ri =
&emu1010_routing_info[emu1010_idx(emu)];
snd_emu1010_fpga_link_dst_src_write(emu,
emu_ri->out_regs[channel], emu_ri->src_regs[src]);
}
static void snd_emu1010_input_source_apply(struct snd_emu10k1 *emu,
int channel, int src)
{
const struct snd_emu1010_routing_info *emu_ri =
&emu1010_routing_info[emu1010_idx(emu)];
snd_emu1010_fpga_link_dst_src_write(emu,
emu_ri->in_regs[channel], emu_ri->src_regs[src]);
}
static void snd_emu1010_apply_sources(struct snd_emu10k1 *emu)
{
const struct snd_emu1010_routing_info *emu_ri =
&emu1010_routing_info[emu1010_idx(emu)];
for (unsigned i = 0; i < emu_ri->n_outs; i++)
snd_emu1010_output_source_apply(
emu, i, emu->emu1010.output_source[i]);
for (unsigned i = 0; i < emu_ri->n_ins; i++)
snd_emu1010_input_source_apply(
emu, i, emu->emu1010.input_source[i]);
}
static u8 emu1010_map_source(const struct snd_emu1010_routing_info *emu_ri,
unsigned val)
{
for (unsigned i = 0; i < emu_ri->n_srcs; i++)
if (val == emu_ri->src_regs[i])
return i;
return 0;
}
static int snd_emu1010_input_output_source_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
const struct snd_emu1010_routing_info *emu_ri =
&emu1010_routing_info[emu1010_idx(emu)];
return snd_ctl_enum_info(uinfo, 1, emu_ri->n_srcs, emu_ri->src_texts);
}
static int snd_emu1010_output_source_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
const struct snd_emu1010_routing_info *emu_ri =
&emu1010_routing_info[emu1010_idx(emu)];
unsigned channel = kcontrol->private_value;
if (channel >= emu_ri->n_outs)
return -EINVAL;
ucontrol->value.enumerated.item[0] = emu->emu1010.output_source[channel];
return 0;
}
static int snd_emu1010_output_source_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
const struct snd_emu1010_routing_info *emu_ri =
&emu1010_routing_info[emu1010_idx(emu)];
unsigned val = ucontrol->value.enumerated.item[0];
unsigned channel = kcontrol->private_value;
int change;
if (val >= emu_ri->n_srcs)
return -EINVAL;
if (channel >= emu_ri->n_outs)
return -EINVAL;
change = (emu->emu1010.output_source[channel] != val);
if (change) {
emu->emu1010.output_source[channel] = val;
snd_emu1010_output_source_apply(emu, channel, val);
}
return change;
}
static const struct snd_kcontrol_new emu1010_output_source_ctl = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
.info = snd_emu1010_input_output_source_info,
.get = snd_emu1010_output_source_get,
.put = snd_emu1010_output_source_put
};
static int snd_emu1010_input_source_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
const struct snd_emu1010_routing_info *emu_ri =
&emu1010_routing_info[emu1010_idx(emu)];
unsigned channel = kcontrol->private_value;
if (channel >= emu_ri->n_ins)
return -EINVAL;
ucontrol->value.enumerated.item[0] = emu->emu1010.input_source[channel];
return 0;
}
static int snd_emu1010_input_source_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
const struct snd_emu1010_routing_info *emu_ri =
&emu1010_routing_info[emu1010_idx(emu)];
unsigned val = ucontrol->value.enumerated.item[0];
unsigned channel = kcontrol->private_value;
int change;
if (val >= emu_ri->n_srcs)
return -EINVAL;
if (channel >= emu_ri->n_ins)
return -EINVAL;
change = (emu->emu1010.input_source[channel] != val);
if (change) {
emu->emu1010.input_source[channel] = val;
snd_emu1010_input_source_apply(emu, channel, val);
}
return change;
}
static const struct snd_kcontrol_new emu1010_input_source_ctl = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
.info = snd_emu1010_input_output_source_info,
.get = snd_emu1010_input_source_get,
.put = snd_emu1010_input_source_put
};
static int add_emu1010_source_mixers(struct snd_emu10k1 *emu)
{
const struct snd_emu1010_routing_info *emu_ri =
&emu1010_routing_info[emu1010_idx(emu)];
int err;
err = add_ctls(emu, &emu1010_output_source_ctl,
emu_ri->out_texts, emu_ri->n_outs);
if (err < 0)
return err;
err = add_ctls(emu, &emu1010_input_source_ctl,
emu1010_input_texts, emu_ri->n_ins);
return err;
}
static const char * const snd_emu1010_adc_pads[] = {
"ADC1 14dB PAD 0202 Capture Switch",
"ADC1 14dB PAD Audio Dock Capture Switch",
"ADC2 14dB PAD Audio Dock Capture Switch",
"ADC3 14dB PAD Audio Dock Capture Switch",
};
static const unsigned short snd_emu1010_adc_pad_regs[] = {
EMU_HANA_0202_ADC_PAD1,
EMU_HANA_DOCK_ADC_PAD1,
EMU_HANA_DOCK_ADC_PAD2,
EMU_HANA_DOCK_ADC_PAD3,
};
#define snd_emu1010_adc_pads_info snd_ctl_boolean_mono_info
static int snd_emu1010_adc_pads_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
unsigned int mask = snd_emu1010_adc_pad_regs[kcontrol->private_value];
ucontrol->value.integer.value[0] = (emu->emu1010.adc_pads & mask) ? 1 : 0;
return 0;
}
static int snd_emu1010_adc_pads_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
unsigned int mask = snd_emu1010_adc_pad_regs[kcontrol->private_value];
unsigned int val, cache;
int change;
val = ucontrol->value.integer.value[0];
cache = emu->emu1010.adc_pads;
if (val == 1)
cache = cache | mask;
else
cache = cache & ~mask;
change = (cache != emu->emu1010.adc_pads);
if (change) {
snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, cache );
emu->emu1010.adc_pads = cache;
}
return change;
}
static const struct snd_kcontrol_new emu1010_adc_pads_ctl = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
.info = snd_emu1010_adc_pads_info,
.get = snd_emu1010_adc_pads_get,
.put = snd_emu1010_adc_pads_put
};
static const char * const snd_emu1010_dac_pads[] = {
"DAC1 0202 14dB PAD Playback Switch",
"DAC1 Audio Dock 14dB PAD Playback Switch",
"DAC2 Audio Dock 14dB PAD Playback Switch",
"DAC3 Audio Dock 14dB PAD Playback Switch",
"DAC4 Audio Dock 14dB PAD Playback Switch",
};
static const unsigned short snd_emu1010_dac_regs[] = {
EMU_HANA_0202_DAC_PAD1,
EMU_HANA_DOCK_DAC_PAD1,
EMU_HANA_DOCK_DAC_PAD2,
EMU_HANA_DOCK_DAC_PAD3,
EMU_HANA_DOCK_DAC_PAD4,
};
#define snd_emu1010_dac_pads_info snd_ctl_boolean_mono_info
static int snd_emu1010_dac_pads_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
unsigned int mask = snd_emu1010_dac_regs[kcontrol->private_value];
ucontrol->value.integer.value[0] = (emu->emu1010.dac_pads & mask) ? 1 : 0;
return 0;
}
static int snd_emu1010_dac_pads_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
unsigned int mask = snd_emu1010_dac_regs[kcontrol->private_value];
unsigned int val, cache;
int change;
val = ucontrol->value.integer.value[0];
cache = emu->emu1010.dac_pads;
if (val == 1)
cache = cache | mask;
else
cache = cache & ~mask;
change = (cache != emu->emu1010.dac_pads);
if (change) {
snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, cache );
emu->emu1010.dac_pads = cache;
}
return change;
}
static const struct snd_kcontrol_new emu1010_dac_pads_ctl = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
.info = snd_emu1010_dac_pads_info,
.get = snd_emu1010_dac_pads_get,
.put = snd_emu1010_dac_pads_put
};
struct snd_emu1010_pads_info {
const char * const *adc_ctls, * const *dac_ctls;
unsigned n_adc_ctls, n_dac_ctls;
};
static const struct snd_emu1010_pads_info emu1010_pads_info[] = {
{
/* rev1 1010 */
.adc_ctls = snd_emu1010_adc_pads,
.n_adc_ctls = ARRAY_SIZE(snd_emu1010_adc_pads),
.dac_ctls = snd_emu1010_dac_pads,
.n_dac_ctls = ARRAY_SIZE(snd_emu1010_dac_pads),
},
{
/* rev2 1010 */
.adc_ctls = snd_emu1010_adc_pads,
.n_adc_ctls = ARRAY_SIZE(snd_emu1010_adc_pads) - 1,
.dac_ctls = snd_emu1010_dac_pads,
.n_dac_ctls = ARRAY_SIZE(snd_emu1010_dac_pads) - 1,
},
{
/* 1616(m) cardbus */
.adc_ctls = snd_emu1010_adc_pads + 1,
.n_adc_ctls = ARRAY_SIZE(snd_emu1010_adc_pads) - 2,
.dac_ctls = snd_emu1010_dac_pads + 1,
.n_dac_ctls = ARRAY_SIZE(snd_emu1010_dac_pads) - 2,
},
{
/* 0404 */
.adc_ctls = NULL,
.n_adc_ctls = 0,
.dac_ctls = NULL,
.n_dac_ctls = 0,
},
};
static const char * const emu1010_clock_texts[] = {
"44100", "48000", "SPDIF", "ADAT", "Dock", "BNC"
};
static const u8 emu1010_clock_vals[] = {
EMU_HANA_WCLOCK_INT_44_1K,
EMU_HANA_WCLOCK_INT_48K,
EMU_HANA_WCLOCK_HANA_SPDIF_IN,
EMU_HANA_WCLOCK_HANA_ADAT_IN,
EMU_HANA_WCLOCK_2ND_HANA,
EMU_HANA_WCLOCK_SYNC_BNC,
};
static const char * const emu0404_clock_texts[] = {
"44100", "48000", "SPDIF", "BNC"
};
static const u8 emu0404_clock_vals[] = {
EMU_HANA_WCLOCK_INT_44_1K,
EMU_HANA_WCLOCK_INT_48K,
EMU_HANA_WCLOCK_HANA_SPDIF_IN,
EMU_HANA_WCLOCK_SYNC_BNC,
};
struct snd_emu1010_clock_info {
const char * const *texts;
const u8 *vals;
unsigned num;
};
static const struct snd_emu1010_clock_info emu1010_clock_info[] = {
{
// rev1 1010
.texts = emu1010_clock_texts,
.vals = emu1010_clock_vals,
.num = ARRAY_SIZE(emu1010_clock_vals),
},
{
// rev2 1010
.texts = emu1010_clock_texts,
.vals = emu1010_clock_vals,
.num = ARRAY_SIZE(emu1010_clock_vals) - 1,
},
{
// 1616(m) CardBus
.texts = emu1010_clock_texts,
// TODO: determine what is actually available.
// Pedantically, *every* source comes from the 2nd FPGA, as the
// card itself has no own (digital) audio ports. The user manual
// claims that ADAT and S/PDIF clock sources are separate, which
// can mean two things: either E-MU mapped the dock's sources to
// the primary ones, or they determine the meaning of the "Dock"
// source depending on how the ports are actually configured
// (which the 2nd FPGA must be doing anyway).
.vals = emu1010_clock_vals,
.num = ARRAY_SIZE(emu1010_clock_vals),
},
{
// 0404
.texts = emu0404_clock_texts,
.vals = emu0404_clock_vals,
.num = ARRAY_SIZE(emu0404_clock_vals),
},
};
static int snd_emu1010_clock_source_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
const struct snd_emu1010_clock_info *emu_ci =
&emu1010_clock_info[emu1010_idx(emu)];
return snd_ctl_enum_info(uinfo, 1, emu_ci->num, emu_ci->texts);
}
static int snd_emu1010_clock_source_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
ucontrol->value.enumerated.item[0] = emu->emu1010.clock_source;
return 0;
}
static int snd_emu1010_clock_source_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
const struct snd_emu1010_clock_info *emu_ci =
&emu1010_clock_info[emu1010_idx(emu)];
unsigned int val;
int change = 0;
val = ucontrol->value.enumerated.item[0] ;
if (val >= emu_ci->num)
return -EINVAL;
spin_lock_irq(&emu->reg_lock);
change = (emu->emu1010.clock_source != val);
if (change) {
emu->emu1010.clock_source = val;
emu->emu1010.wclock = emu_ci->vals[val];
snd_emu1010_update_clock(emu);
snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_MUTE);
snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, emu->emu1010.wclock);
spin_unlock_irq(&emu->reg_lock);
msleep(10); // Allow DLL to settle
snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
} else {
spin_unlock_irq(&emu->reg_lock);
}
return change;
}
static const struct snd_kcontrol_new snd_emu1010_clock_source =
{
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Clock Source",
.count = 1,
.info = snd_emu1010_clock_source_info,
.get = snd_emu1010_clock_source_get,
.put = snd_emu1010_clock_source_put
};
static int snd_emu1010_clock_fallback_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
static const char * const texts[2] = {
"44100", "48000"
};
return snd_ctl_enum_info(uinfo, 1, 2, texts);
}
static int snd_emu1010_clock_fallback_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
ucontrol->value.enumerated.item[0] = emu->emu1010.clock_fallback;
return 0;
}
static int snd_emu1010_clock_fallback_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
unsigned int val = ucontrol->value.enumerated.item[0];
int change;
if (val >= 2)
return -EINVAL;
change = (emu->emu1010.clock_fallback != val);
if (change) {
emu->emu1010.clock_fallback = val;
snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 1 - val);
}
return change;
}
static const struct snd_kcontrol_new snd_emu1010_clock_fallback =
{
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Clock Fallback",
.count = 1,
.info = snd_emu1010_clock_fallback_info,
.get = snd_emu1010_clock_fallback_get,
.put = snd_emu1010_clock_fallback_put
};
static int snd_emu1010_optical_out_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
static const char * const texts[2] = {
"SPDIF", "ADAT"
};
return snd_ctl_enum_info(uinfo, 1, 2, texts);
}
static int snd_emu1010_optical_out_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
ucontrol->value.enumerated.item[0] = emu->emu1010.optical_out;
return 0;
}
static int snd_emu1010_optical_out_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
unsigned int val;
u32 tmp;
int change = 0;
val = ucontrol->value.enumerated.item[0];
/* Limit: uinfo->value.enumerated.items = 2; */
if (val >= 2)
return -EINVAL;
change = (emu->emu1010.optical_out != val);
if (change) {
emu->emu1010.optical_out = val;
tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : EMU_HANA_OPTICAL_IN_SPDIF) |
(emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : EMU_HANA_OPTICAL_OUT_SPDIF);
snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp);
}
return change;
}
static const struct snd_kcontrol_new snd_emu1010_optical_out = {
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Optical Output Mode",
.count = 1,
.info = snd_emu1010_optical_out_info,
.get = snd_emu1010_optical_out_get,
.put = snd_emu1010_optical_out_put
};
static int snd_emu1010_optical_in_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
static const char * const texts[2] = {
"SPDIF", "ADAT"
};
return snd_ctl_enum_info(uinfo, 1, 2, texts);
}
static int snd_emu1010_optical_in_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
ucontrol->value.enumerated.item[0] = emu->emu1010.optical_in;
return 0;
}
static int snd_emu1010_optical_in_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
unsigned int val;
u32 tmp;
int change = 0;
val = ucontrol->value.enumerated.item[0];
/* Limit: uinfo->value.enumerated.items = 2; */
if (val >= 2)
return -EINVAL;
change = (emu->emu1010.optical_in != val);
if (change) {
emu->emu1010.optical_in = val;
tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : EMU_HANA_OPTICAL_IN_SPDIF) |
(emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : EMU_HANA_OPTICAL_OUT_SPDIF);
snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp);
}
return change;
}
static const struct snd_kcontrol_new snd_emu1010_optical_in = {
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Optical Input Mode",
.count = 1,
.info = snd_emu1010_optical_in_info,
.get = snd_emu1010_optical_in_get,
.put = snd_emu1010_optical_in_put
};
static int snd_audigy_i2c_capture_source_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
#if 0
static const char * const texts[4] = {
"Unknown1", "Unknown2", "Mic", "Line"
};
#endif
static const char * const texts[2] = {
"Mic", "Line"
};
return snd_ctl_enum_info(uinfo, 1, 2, texts);
}
static int snd_audigy_i2c_capture_source_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
ucontrol->value.enumerated.item[0] = emu->i2c_capture_source;
return 0;
}
static int snd_audigy_i2c_capture_source_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
unsigned int source_id;
unsigned int ngain, ogain;
u16 gpio;
int change = 0;
u32 source;
/* If the capture source has changed,
* update the capture volume from the cached value
* for the particular source.
*/
source_id = ucontrol->value.enumerated.item[0];
/* Limit: uinfo->value.enumerated.items = 2; */
/* emu->i2c_capture_volume */
if (source_id >= 2)
return -EINVAL;
change = (emu->i2c_capture_source != source_id);
if (change) {
snd_emu10k1_i2c_write(emu, ADC_MUX, 0); /* Mute input */
spin_lock_irq(&emu->emu_lock);
gpio = inw(emu->port + A_IOCFG);
if (source_id==0)
outw(gpio | 0x4, emu->port + A_IOCFG);
else
outw(gpio & ~0x4, emu->port + A_IOCFG);
spin_unlock_irq(&emu->emu_lock);
ngain = emu->i2c_capture_volume[source_id][0]; /* Left */
ogain = emu->i2c_capture_volume[emu->i2c_capture_source][0]; /* Left */
if (ngain != ogain)
snd_emu10k1_i2c_write(emu, ADC_ATTEN_ADCL, ((ngain) & 0xff));
ngain = emu->i2c_capture_volume[source_id][1]; /* Right */
ogain = emu->i2c_capture_volume[emu->i2c_capture_source][1]; /* Right */
if (ngain != ogain)
snd_emu10k1_i2c_write(emu, ADC_ATTEN_ADCR, ((ngain) & 0xff));
source = 1 << (source_id + 2);
snd_emu10k1_i2c_write(emu, ADC_MUX, source); /* Set source */
emu->i2c_capture_source = source_id;
}
return change;
}
static const struct snd_kcontrol_new snd_audigy_i2c_capture_source =
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Capture Source",
.info = snd_audigy_i2c_capture_source_info,
.get = snd_audigy_i2c_capture_source_get,
.put = snd_audigy_i2c_capture_source_put
};
static int snd_audigy_i2c_volume_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 2;
uinfo->value.integer.min = 0;
uinfo->value.integer.max = 255;
return 0;
}
static int snd_audigy_i2c_volume_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
unsigned int source_id;
source_id = kcontrol->private_value;
/* Limit: emu->i2c_capture_volume */
/* capture_source: uinfo->value.enumerated.items = 2 */
if (source_id >= 2)
return -EINVAL;
ucontrol->value.integer.value[0] = emu->i2c_capture_volume[source_id][0];
ucontrol->value.integer.value[1] = emu->i2c_capture_volume[source_id][1];
return 0;
}
static int snd_audigy_i2c_volume_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
unsigned int ogain;
unsigned int ngain0, ngain1;
unsigned int source_id;
int change = 0;
source_id = kcontrol->private_value;
/* Limit: emu->i2c_capture_volume */
/* capture_source: uinfo->value.enumerated.items = 2 */
if (source_id >= 2)
return -EINVAL;
ngain0 = ucontrol->value.integer.value[0];
ngain1 = ucontrol->value.integer.value[1];
if (ngain0 > 0xff)
return -EINVAL;
if (ngain1 > 0xff)
return -EINVAL;
ogain = emu->i2c_capture_volume[source_id][0]; /* Left */
if (ogain != ngain0) {
if (emu->i2c_capture_source == source_id)
snd_emu10k1_i2c_write(emu, ADC_ATTEN_ADCL, ngain0);
emu->i2c_capture_volume[source_id][0] = ngain0;
change = 1;
}
ogain = emu->i2c_capture_volume[source_id][1]; /* Right */
if (ogain != ngain1) {
if (emu->i2c_capture_source == source_id)
snd_emu10k1_i2c_write(emu, ADC_ATTEN_ADCR, ngain1);
emu->i2c_capture_volume[source_id][1] = ngain1;
change = 1;
}
return change;
}
static const struct snd_kcontrol_new i2c_volume_ctl = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ,
.info = snd_audigy_i2c_volume_info,
.get = snd_audigy_i2c_volume_get,
.put = snd_audigy_i2c_volume_put,
.tlv = { .p = snd_audigy_db_scale2 }
};
static const char * const snd_audigy_i2c_volume_ctls[] = {
"Mic Capture Volume",
"Line Capture Volume",
};
#if 0
static int snd_audigy_spdif_output_rate_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
static const char * const texts[] = {"44100", "48000", "96000"};
return snd_ctl_enum_info(uinfo, 1, 3, texts);
}
static int snd_audigy_spdif_output_rate_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
unsigned int tmp;
tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
switch (tmp & A_SPDIF_RATE_MASK) {
case A_SPDIF_44100:
ucontrol->value.enumerated.item[0] = 0;
break;
case A_SPDIF_48000:
ucontrol->value.enumerated.item[0] = 1;
break;
case A_SPDIF_96000:
ucontrol->value.enumerated.item[0] = 2;
break;
default:
ucontrol->value.enumerated.item[0] = 1;
}
return 0;
}
static int snd_audigy_spdif_output_rate_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
int change;
unsigned int reg, val, tmp;
switch(ucontrol->value.enumerated.item[0]) {
case 0:
val = A_SPDIF_44100;
break;
case 1:
val = A_SPDIF_48000;
break;
case 2:
val = A_SPDIF_96000;
break;
default:
val = A_SPDIF_48000;
break;
}
spin_lock_irq(&emu->reg_lock);
reg = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
tmp = reg & ~A_SPDIF_RATE_MASK;
tmp |= val;
change = (tmp != reg);
if (change)
snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
spin_unlock_irq(&emu->reg_lock);
return change;
}
static const struct snd_kcontrol_new snd_audigy_spdif_output_rate =
{
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Audigy SPDIF Output Sample Rate",
.count = 1,
.info = snd_audigy_spdif_output_rate_info,
.get = snd_audigy_spdif_output_rate_get,
.put = snd_audigy_spdif_output_rate_put
};
#endif
static int snd_emu10k1_spdif_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
int change;
unsigned int val;
/* Limit: emu->spdif_bits */
if (idx >= 3)
return -EINVAL;
val = (ucontrol->value.iec958.status[0] << 0) |
(ucontrol->value.iec958.status[1] << 8) |
(ucontrol->value.iec958.status[2] << 16) |
(ucontrol->value.iec958.status[3] << 24);
change = val != emu->spdif_bits[idx];
if (change) {
snd_emu10k1_ptr_write(emu, SPCS0 + idx, 0, val);
emu->spdif_bits[idx] = val;
}
return change;
}
static const struct snd_kcontrol_new snd_emu10k1_spdif_mask_control =
{
.access = SNDRV_CTL_ELEM_ACCESS_READ,
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
.name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK),
.count = 3,
.info = snd_emu10k1_spdif_info,
.get = snd_emu10k1_spdif_get_mask
};
static const struct snd_kcontrol_new snd_emu10k1_spdif_control =
{
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
.name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
.count = 3,
.info = snd_emu10k1_spdif_info,
.get = snd_emu10k1_spdif_get,
.put = snd_emu10k1_spdif_put
};
static void update_emu10k1_fxrt(struct snd_emu10k1 *emu, int voice, unsigned char *route)
{
if (emu->audigy) {
snd_emu10k1_ptr_write_multiple(emu, voice,
A_FXRT1, snd_emu10k1_compose_audigy_fxrt1(route),
A_FXRT2, snd_emu10k1_compose_audigy_fxrt2(route),
REGLIST_END);
} else {
snd_emu10k1_ptr_write(emu, FXRT, voice,
snd_emu10k1_compose_send_routing(route));
}
}
static void update_emu10k1_send_volume(struct snd_emu10k1 *emu, int voice, unsigned char *volume)
{
snd_emu10k1_ptr_write(emu, PTRX_FXSENDAMOUNT_A, voice, volume[0]);
snd_emu10k1_ptr_write(emu, PTRX_FXSENDAMOUNT_B, voice, volume[1]);
snd_emu10k1_ptr_write(emu, PSST_FXSENDAMOUNT_C, voice, volume[2]);
snd_emu10k1_ptr_write(emu, DSL_FXSENDAMOUNT_D, voice, volume[3]);
if (emu->audigy) {
snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, voice,
snd_emu10k1_compose_audigy_sendamounts(volume));
}
}
/* PCM stream controls */
static int snd_emu10k1_send_routing_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = emu->audigy ? 3*8 : 3*4;
uinfo->value.integer.min = 0;
uinfo->value.integer.max = emu->audigy ? 0x3f : 0x0f;
return 0;
}
static int snd_emu10k1_send_routing_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
struct snd_emu10k1_pcm_mixer *mix =
&emu->pcm_mixer[snd_ctl_get_ioffidx(kcontrol, &ucontrol->id)];
int voice, idx;
int num_efx = emu->audigy ? 8 : 4;
int mask = emu->audigy ? 0x3f : 0x0f;
for (voice = 0; voice < 3; voice++)
for (idx = 0; idx < num_efx; idx++)
ucontrol->value.integer.value[(voice * num_efx) + idx] =
mix->send_routing[voice][idx] & mask;
return 0;
}
static int snd_emu10k1_send_routing_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
struct snd_emu10k1_pcm_mixer *mix =
&emu->pcm_mixer[snd_ctl_get_ioffidx(kcontrol, &ucontrol->id)];
int change = 0, voice, idx, val;
int num_efx = emu->audigy ? 8 : 4;
int mask = emu->audigy ? 0x3f : 0x0f;
spin_lock_irq(&emu->reg_lock);
for (voice = 0; voice < 3; voice++)
for (idx = 0; idx < num_efx; idx++) {
val = ucontrol->value.integer.value[(voice * num_efx) + idx] & mask;
if (mix->send_routing[voice][idx] != val) {
mix->send_routing[voice][idx] = val;
change = 1;
}
}
if (change && mix->epcm && mix->epcm->voices[0]) {
if (!mix->epcm->voices[0]->last) {
update_emu10k1_fxrt(emu, mix->epcm->voices[0]->number,
&mix->send_routing[1][0]);
update_emu10k1_fxrt(emu, mix->epcm->voices[0]->number + 1,
&mix->send_routing[2][0]);
} else {
update_emu10k1_fxrt(emu, mix->epcm->voices[0]->number,
&mix->send_routing[0][0]);
}
}
spin_unlock_irq(&emu->reg_lock);
return change;
}
static const struct snd_kcontrol_new snd_emu10k1_send_routing_control =
{
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
.name = "EMU10K1 PCM Send Routing",
.count = 32,
.info = snd_emu10k1_send_routing_info,
.get = snd_emu10k1_send_routing_get,
.put = snd_emu10k1_send_routing_put
};
static int snd_emu10k1_send_volume_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = emu->audigy ? 3*8 : 3*4;
uinfo->value.integer.min = 0;
uinfo->value.integer.max = 255;
return 0;
}
static int snd_emu10k1_send_volume_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
struct snd_emu10k1_pcm_mixer *mix =
&emu->pcm_mixer[snd_ctl_get_ioffidx(kcontrol, &ucontrol->id)];
int idx;
int num_efx = emu->audigy ? 8 : 4;
for (idx = 0; idx < 3*num_efx; idx++)
ucontrol->value.integer.value[idx] = mix->send_volume[idx/num_efx][idx%num_efx];
return 0;
}
static int snd_emu10k1_send_volume_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
struct snd_emu10k1_pcm_mixer *mix =
&emu->pcm_mixer[snd_ctl_get_ioffidx(kcontrol, &ucontrol->id)];
int change = 0, idx, val;
int num_efx = emu->audigy ? 8 : 4;
spin_lock_irq(&emu->reg_lock);
for (idx = 0; idx < 3*num_efx; idx++) {
val = ucontrol->value.integer.value[idx] & 255;
if (mix->send_volume[idx/num_efx][idx%num_efx] != val) {
mix->send_volume[idx/num_efx][idx%num_efx] = val;
change = 1;
}
}
if (change && mix->epcm && mix->epcm->voices[0]) {
if (!mix->epcm->voices[0]->last) {
update_emu10k1_send_volume(emu, mix->epcm->voices[0]->number,
&mix->send_volume[1][0]);
update_emu10k1_send_volume(emu, mix->epcm->voices[0]->number + 1,
&mix->send_volume[2][0]);
} else {
update_emu10k1_send_volume(emu, mix->epcm->voices[0]->number,
&mix->send_volume[0][0]);
}
}
spin_unlock_irq(&emu->reg_lock);
return change;
}
static const struct snd_kcontrol_new snd_emu10k1_send_volume_control =
{
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
.name = "EMU10K1 PCM Send Volume",
.count = 32,
.info = snd_emu10k1_send_volume_info,
.get = snd_emu10k1_send_volume_get,
.put = snd_emu10k1_send_volume_put
};
static int snd_emu10k1_attn_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 3;
uinfo->value.integer.min = 0;
uinfo->value.integer.max = 0x1fffd;
return 0;
}
static int snd_emu10k1_attn_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
struct snd_emu10k1_pcm_mixer *mix =
&emu->pcm_mixer[snd_ctl_get_ioffidx(kcontrol, &ucontrol->id)];
int idx;
for (idx = 0; idx < 3; idx++)
ucontrol->value.integer.value[idx] = mix->attn[idx] * 0xffffU / 0x8000U;
return 0;
}
static int snd_emu10k1_attn_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
struct snd_emu10k1_pcm_mixer *mix =
&emu->pcm_mixer[snd_ctl_get_ioffidx(kcontrol, &ucontrol->id)];
int change = 0, idx, val;
spin_lock_irq(&emu->reg_lock);
for (idx = 0; idx < 3; idx++) {
unsigned uval = ucontrol->value.integer.value[idx] & 0x1ffff;
val = uval * 0x8000U / 0xffffU;
if (mix->attn[idx] != val) {
mix->attn[idx] = val;
change = 1;
}
}
if (change && mix->epcm && mix->epcm->voices[0]) {
if (!mix->epcm->voices[0]->last) {
snd_emu10k1_ptr_write(emu, VTFT_VOLUMETARGET, mix->epcm->voices[0]->number, mix->attn[1]);
snd_emu10k1_ptr_write(emu, VTFT_VOLUMETARGET, mix->epcm->voices[0]->number + 1, mix->attn[2]);
} else {
snd_emu10k1_ptr_write(emu, VTFT_VOLUMETARGET, mix->epcm->voices[0]->number, mix->attn[0]);
}
}
spin_unlock_irq(&emu->reg_lock);
return change;
}
static const struct snd_kcontrol_new snd_emu10k1_attn_control =
{
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
.name = "EMU10K1 PCM Volume",
.count = 32,
.info = snd_emu10k1_attn_info,
.get = snd_emu10k1_attn_get,
.put = snd_emu10k1_attn_put
};
/* Mutichannel PCM stream controls */
static int snd_emu10k1_efx_send_routing_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = emu->audigy ? 8 : 4;
uinfo->value.integer.min = 0;
uinfo->value.integer.max = emu->audigy ? 0x3f : 0x0f;
return 0;
}
static int snd_emu10k1_efx_send_routing_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
struct snd_emu10k1_pcm_mixer *mix =
&emu->efx_pcm_mixer[snd_ctl_get_ioffidx(kcontrol, &ucontrol->id)];
int idx;
int num_efx = emu->audigy ? 8 : 4;
int mask = emu->audigy ? 0x3f : 0x0f;
for (idx = 0; idx < num_efx; idx++)
ucontrol->value.integer.value[idx] =
mix->send_routing[0][idx] & mask;
return 0;
}
static int snd_emu10k1_efx_send_routing_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
int ch = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
struct snd_emu10k1_pcm_mixer *mix = &emu->efx_pcm_mixer[ch];
int change = 0, idx, val;
int num_efx = emu->audigy ? 8 : 4;
int mask = emu->audigy ? 0x3f : 0x0f;
spin_lock_irq(&emu->reg_lock);
for (idx = 0; idx < num_efx; idx++) {
val = ucontrol->value.integer.value[idx] & mask;
if (mix->send_routing[0][idx] != val) {
mix->send_routing[0][idx] = val;
change = 1;
}
}
if (change && mix->epcm) {
if (mix->epcm->voices[ch]) {
update_emu10k1_fxrt(emu, mix->epcm->voices[ch]->number,
&mix->send_routing[0][0]);
}
}
spin_unlock_irq(&emu->reg_lock);
return change;
}
static const struct snd_kcontrol_new snd_emu10k1_efx_send_routing_control =
{
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
.name = "Multichannel PCM Send Routing",
.count = 16,
.info = snd_emu10k1_efx_send_routing_info,
.get = snd_emu10k1_efx_send_routing_get,
.put = snd_emu10k1_efx_send_routing_put
};
static int snd_emu10k1_efx_send_volume_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = emu->audigy ? 8 : 4;
uinfo->value.integer.min = 0;
uinfo->value.integer.max = 255;
return 0;
}
static int snd_emu10k1_efx_send_volume_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
struct snd_emu10k1_pcm_mixer *mix =
&emu->efx_pcm_mixer[snd_ctl_get_ioffidx(kcontrol, &ucontrol->id)];
int idx;
int num_efx = emu->audigy ? 8 : 4;
for (idx = 0; idx < num_efx; idx++)
ucontrol->value.integer.value[idx] = mix->send_volume[0][idx];
return 0;
}
static int snd_emu10k1_efx_send_volume_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
int ch = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
struct snd_emu10k1_pcm_mixer *mix = &emu->efx_pcm_mixer[ch];
int change = 0, idx, val;
int num_efx = emu->audigy ? 8 : 4;
spin_lock_irq(&emu->reg_lock);
for (idx = 0; idx < num_efx; idx++) {
val = ucontrol->value.integer.value[idx] & 255;
if (mix->send_volume[0][idx] != val) {
mix->send_volume[0][idx] = val;
change = 1;
}
}
if (change && mix->epcm) {
if (mix->epcm->voices[ch]) {
update_emu10k1_send_volume(emu, mix->epcm->voices[ch]->number,
&mix->send_volume[0][0]);
}
}
spin_unlock_irq(&emu->reg_lock);
return change;
}
static const struct snd_kcontrol_new snd_emu10k1_efx_send_volume_control =
{
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
.name = "Multichannel PCM Send Volume",
.count = 16,
.info = snd_emu10k1_efx_send_volume_info,
.get = snd_emu10k1_efx_send_volume_get,
.put = snd_emu10k1_efx_send_volume_put
};
static int snd_emu10k1_efx_attn_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 1;
uinfo->value.integer.min = 0;
uinfo->value.integer.max = 0x1fffd;
return 0;
}
static int snd_emu10k1_efx_attn_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
struct snd_emu10k1_pcm_mixer *mix =
&emu->efx_pcm_mixer[snd_ctl_get_ioffidx(kcontrol, &ucontrol->id)];
ucontrol->value.integer.value[0] = mix->attn[0] * 0xffffU / 0x8000U;
return 0;
}
static int snd_emu10k1_efx_attn_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
int ch = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
struct snd_emu10k1_pcm_mixer *mix = &emu->efx_pcm_mixer[ch];
int change = 0, val;
unsigned uval;
spin_lock_irq(&emu->reg_lock);
uval = ucontrol->value.integer.value[0] & 0x1ffff;
val = uval * 0x8000U / 0xffffU;
if (mix->attn[0] != val) {
mix->attn[0] = val;
change = 1;
}
if (change && mix->epcm) {
if (mix->epcm->voices[ch]) {
snd_emu10k1_ptr_write(emu, VTFT_VOLUMETARGET, mix->epcm->voices[ch]->number, mix->attn[0]);
}
}
spin_unlock_irq(&emu->reg_lock);
return change;
}
static const struct snd_kcontrol_new snd_emu10k1_efx_attn_control =
{
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
.name = "Multichannel PCM Volume",
.count = 16,
.info = snd_emu10k1_efx_attn_info,
.get = snd_emu10k1_efx_attn_get,
.put = snd_emu10k1_efx_attn_put
};
#define snd_emu10k1_shared_spdif_info snd_ctl_boolean_mono_info
static int snd_emu10k1_shared_spdif_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
if (emu->audigy)
ucontrol->value.integer.value[0] = inw(emu->port + A_IOCFG) & A_IOCFG_GPOUT0 ? 1 : 0;
else
ucontrol->value.integer.value[0] = inl(emu->port + HCFG) & HCFG_GPOUT0 ? 1 : 0;
if (emu->card_capabilities->invert_shared_spdif)
ucontrol->value.integer.value[0] =
!ucontrol->value.integer.value[0];
return 0;
}
static int snd_emu10k1_shared_spdif_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
unsigned int reg, val, sw;
int change = 0;
sw = ucontrol->value.integer.value[0];
if (emu->card_capabilities->invert_shared_spdif)
sw = !sw;
spin_lock_irq(&emu->emu_lock);
if ( emu->card_capabilities->i2c_adc) {
/* Do nothing for Audigy 2 ZS Notebook */
} else if (emu->audigy) {
reg = inw(emu->port + A_IOCFG);
val = sw ? A_IOCFG_GPOUT0 : 0;
change = (reg & A_IOCFG_GPOUT0) != val;
if (change) {
reg &= ~A_IOCFG_GPOUT0;
reg |= val;
outw(reg | val, emu->port + A_IOCFG);
}
}
reg = inl(emu->port + HCFG);
val = sw ? HCFG_GPOUT0 : 0;
change |= (reg & HCFG_GPOUT0) != val;
if (change) {
reg &= ~HCFG_GPOUT0;
reg |= val;
outl(reg | val, emu->port + HCFG);
}
spin_unlock_irq(&emu->emu_lock);
return change;
}
static const struct snd_kcontrol_new snd_emu10k1_shared_spdif =
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "SB Live Analog/Digital Output Jack",
.info = snd_emu10k1_shared_spdif_info,
.get = snd_emu10k1_shared_spdif_get,
.put = snd_emu10k1_shared_spdif_put
};
static const struct snd_kcontrol_new snd_audigy_shared_spdif =
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Audigy Analog/Digital Output Jack",
.info = snd_emu10k1_shared_spdif_info,
.get = snd_emu10k1_shared_spdif_get,
.put = snd_emu10k1_shared_spdif_put
};
/* workaround for too low volume on Audigy due to 16bit/24bit conversion */
#define snd_audigy_capture_boost_info snd_ctl_boolean_mono_info
static int snd_audigy_capture_boost_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
unsigned int val;
/* FIXME: better to use a cached version */
val = snd_ac97_read(emu->ac97, AC97_REC_GAIN);
ucontrol->value.integer.value[0] = !!val;
return 0;
}
static int snd_audigy_capture_boost_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
unsigned int val;
if (ucontrol->value.integer.value[0])
val = 0x0f0f;
else
val = 0;
return snd_ac97_update(emu->ac97, AC97_REC_GAIN, val);
}
static const struct snd_kcontrol_new snd_audigy_capture_boost =
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Mic Extra Boost",
.info = snd_audigy_capture_boost_info,
.get = snd_audigy_capture_boost_get,
.put = snd_audigy_capture_boost_put
};
/*
*/
static void snd_emu10k1_mixer_free_ac97(struct snd_ac97 *ac97)
{
struct snd_emu10k1 *emu = ac97->private_data;
emu->ac97 = NULL;
}
/*
*/
static int remove_ctl(struct snd_card *card, const char *name)
{
struct snd_ctl_elem_id id;
memset(&id, 0, sizeof(id));
strcpy(id.name, name);
id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
return snd_ctl_remove_id(card, &id);
}
static int rename_ctl(struct snd_card *card, const char *src, const char *dst)
{
struct snd_kcontrol *kctl = snd_ctl_find_id_mixer(card, src);
if (kctl) {
snd_ctl_rename(card, kctl, dst);
return 0;
}
return -ENOENT;
}
int snd_emu10k1_mixer(struct snd_emu10k1 *emu,
int pcm_device, int multi_device)
{
int err;
struct snd_kcontrol *kctl;
struct snd_card *card = emu->card;
const char * const *c;
static const char * const emu10k1_remove_ctls[] = {
/* no AC97 mono, surround, center/lfe */
"Master Mono Playback Switch",
"Master Mono Playback Volume",
"PCM Out Path & Mute",
"Mono Output Select",
"Surround Playback Switch",
"Surround Playback Volume",
"Center Playback Switch",
"Center Playback Volume",
"LFE Playback Switch",
"LFE Playback Volume",
NULL
};
static const char * const emu10k1_rename_ctls[] = {
"Surround Digital Playback Volume", "Surround Playback Volume",
"Center Digital Playback Volume", "Center Playback Volume",
"LFE Digital Playback Volume", "LFE Playback Volume",
NULL
};
static const char * const audigy_remove_ctls[] = {
/* Master/PCM controls on ac97 of Audigy has no effect */
/* On the Audigy2 the AC97 playback is piped into
* the Philips ADC for 24bit capture */
"PCM Playback Switch",
"PCM Playback Volume",
"Master Playback Switch",
"Master Playback Volume",
"PCM Out Path & Mute",
"Mono Output Select",
/* remove unused AC97 capture controls */
"Capture Source",
"Capture Switch",
"Capture Volume",
"Mic Select",
"Headphone Playback Switch",
"Headphone Playback Volume",
"3D Control - Center",
"3D Control - Depth",
"3D Control - Switch",
"Video Playback Switch",
"Video Playback Volume",
"Mic Playback Switch",
"Mic Playback Volume",
"External Amplifier",
NULL
};
static const char * const audigy_rename_ctls[] = {
/* use conventional names */
"Wave Playback Volume", "PCM Playback Volume",
/* "Wave Capture Volume", "PCM Capture Volume", */
"Wave Master Playback Volume", "Master Playback Volume",
"AMic Playback Volume", "Mic Playback Volume",
"Master Mono Playback Switch", "Phone Output Playback Switch",
"Master Mono Playback Volume", "Phone Output Playback Volume",
NULL
};
static const char * const audigy_rename_ctls_i2c_adc[] = {
//"Analog Mix Capture Volume","OLD Analog Mix Capture Volume",
"Line Capture Volume", "Analog Mix Capture Volume",
"Wave Playback Volume", "OLD PCM Playback Volume",
"Wave Master Playback Volume", "Master Playback Volume",
"AMic Playback Volume", "Old Mic Playback Volume",
"CD Capture Volume", "IEC958 Optical Capture Volume",
NULL
};
static const char * const audigy_remove_ctls_i2c_adc[] = {
/* On the Audigy2 ZS Notebook
* Capture via WM8775 */
"Mic Capture Volume",
"Analog Mix Capture Volume",
"Aux Capture Volume",
"IEC958 Optical Capture Volume",
NULL
};
static const char * const audigy_remove_ctls_1361t_adc[] = {
/* On the Audigy2 the AC97 playback is piped into
* the Philips ADC for 24bit capture */
"PCM Playback Switch",
"PCM Playback Volume",
"Capture Source",
"Capture Switch",
"Capture Volume",
"Mic Capture Volume",
"Headphone Playback Switch",
"Headphone Playback Volume",
"3D Control - Center",
"3D Control - Depth",
"3D Control - Switch",
"Line2 Playback Volume",
"Line2 Capture Volume",
NULL
};
static const char * const audigy_rename_ctls_1361t_adc[] = {
"Master Playback Switch", "Master Capture Switch",
"Master Playback Volume", "Master Capture Volume",
"Wave Master Playback Volume", "Master Playback Volume",
"Beep Playback Switch", "Beep Capture Switch",
"Beep Playback Volume", "Beep Capture Volume",
"Phone Playback Switch", "Phone Capture Switch",
"Phone Playback Volume", "Phone Capture Volume",
"Mic Playback Switch", "Mic Capture Switch",
"Mic Playback Volume", "Mic Capture Volume",
"Line Playback Switch", "Line Capture Switch",
"Line Playback Volume", "Line Capture Volume",
"CD Playback Switch", "CD Capture Switch",
"CD Playback Volume", "CD Capture Volume",
"Aux Playback Switch", "Aux Capture Switch",
"Aux Playback Volume", "Aux Capture Volume",
"Video Playback Switch", "Video Capture Switch",
"Video Playback Volume", "Video Capture Volume",
"Master Mono Playback Switch", "Phone Output Playback Switch",
"Master Mono Playback Volume", "Phone Output Playback Volume",
NULL
};
if (emu->card_capabilities->ac97_chip) {
struct snd_ac97_bus *pbus;
struct snd_ac97_template ac97;
static const struct snd_ac97_bus_ops ops = {
.write = snd_emu10k1_ac97_write,
.read = snd_emu10k1_ac97_read,
};
err = snd_ac97_bus(emu->card, 0, &ops, NULL, &pbus);
if (err < 0)
return err;
pbus->no_vra = 1; /* we don't need VRA */
memset(&ac97, 0, sizeof(ac97));
ac97.private_data = emu;
ac97.private_free = snd_emu10k1_mixer_free_ac97;
ac97.scaps = AC97_SCAP_NO_SPDIF;
err = snd_ac97_mixer(pbus, &ac97, &emu->ac97);
if (err < 0) {
if (emu->card_capabilities->ac97_chip == 1)
return err;
dev_info(emu->card->dev,
"AC97 is optional on this board\n");
dev_info(emu->card->dev,
"Proceeding without ac97 mixers...\n");
snd_device_free(emu->card, pbus);
goto no_ac97; /* FIXME: get rid of ugly gotos.. */
}
if (emu->audigy) {
/* set master volume to 0 dB */
snd_ac97_write_cache(emu->ac97, AC97_MASTER, 0x0000);
/* set capture source to mic */
snd_ac97_write_cache(emu->ac97, AC97_REC_SEL, 0x0000);
/* set mono output (TAD) to mic */
snd_ac97_update_bits(emu->ac97, AC97_GENERAL_PURPOSE,
0x0200, 0x0200);
if (emu->card_capabilities->adc_1361t)
c = audigy_remove_ctls_1361t_adc;
else
c = audigy_remove_ctls;
} else {
/*
* Credits for cards based on STAC9758:
* James Courtier-Dutton <[email protected]>
* Voluspa <[email protected]>
*/
if (emu->ac97->id == AC97_ID_STAC9758) {
emu->rear_ac97 = 1;
snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE|AC97SLOT_REAR_LEFT|AC97SLOT_REAR_RIGHT);
snd_ac97_write_cache(emu->ac97, AC97_HEADPHONE, 0x0202);
remove_ctl(card,"Front Playback Volume");
remove_ctl(card,"Front Playback Switch");
}
/* remove unused AC97 controls */
snd_ac97_write_cache(emu->ac97, AC97_SURROUND_MASTER, 0x0202);
snd_ac97_write_cache(emu->ac97, AC97_CENTER_LFE_MASTER, 0x0202);
c = emu10k1_remove_ctls;
}
for (; *c; c++)
remove_ctl(card, *c);
} else if (emu->card_capabilities->i2c_adc) {
c = audigy_remove_ctls_i2c_adc;
for (; *c; c++)
remove_ctl(card, *c);
} else {
no_ac97:
if (emu->card_capabilities->ecard)
strcpy(emu->card->mixername, "EMU APS");
else if (emu->audigy)
strcpy(emu->card->mixername, "SB Audigy");
else
strcpy(emu->card->mixername, "Emu10k1");
}
if (emu->audigy)
if (emu->card_capabilities->adc_1361t)
c = audigy_rename_ctls_1361t_adc;
else if (emu->card_capabilities->i2c_adc)
c = audigy_rename_ctls_i2c_adc;
else
c = audigy_rename_ctls;
else
c = emu10k1_rename_ctls;
for (; *c; c += 2)
rename_ctl(card, c[0], c[1]);
if (emu->card_capabilities->subsystem == 0x80401102) { /* SB Live! Platinum CT4760P */
remove_ctl(card, "Center Playback Volume");
remove_ctl(card, "LFE Playback Volume");
remove_ctl(card, "Wave Center Playback Volume");
remove_ctl(card, "Wave LFE Playback Volume");
}
if (emu->card_capabilities->subsystem == 0x20071102) { /* Audigy 4 Pro */
rename_ctl(card, "Line2 Capture Volume", "Line1/Mic Capture Volume");
rename_ctl(card, "Analog Mix Capture Volume", "Line2 Capture Volume");
rename_ctl(card, "Aux2 Capture Volume", "Line3 Capture Volume");
rename_ctl(card, "Mic Capture Volume", "Unknown1 Capture Volume");
}
kctl = emu->ctl_send_routing = snd_ctl_new1(&snd_emu10k1_send_routing_control, emu);
if (!kctl)
return -ENOMEM;
kctl->id.device = pcm_device;
err = snd_ctl_add(card, kctl);
if (err)
return err;
kctl = emu->ctl_send_volume = snd_ctl_new1(&snd_emu10k1_send_volume_control, emu);
if (!kctl)
return -ENOMEM;
kctl->id.device = pcm_device;
err = snd_ctl_add(card, kctl);
if (err)
return err;
kctl = emu->ctl_attn = snd_ctl_new1(&snd_emu10k1_attn_control, emu);
if (!kctl)
return -ENOMEM;
kctl->id.device = pcm_device;
err = snd_ctl_add(card, kctl);
if (err)
return err;
kctl = emu->ctl_efx_send_routing = snd_ctl_new1(&snd_emu10k1_efx_send_routing_control, emu);
if (!kctl)
return -ENOMEM;
kctl->id.device = multi_device;
err = snd_ctl_add(card, kctl);
if (err)
return err;
kctl = emu->ctl_efx_send_volume = snd_ctl_new1(&snd_emu10k1_efx_send_volume_control, emu);
if (!kctl)
return -ENOMEM;
kctl->id.device = multi_device;
err = snd_ctl_add(card, kctl);
if (err)
return err;
kctl = emu->ctl_efx_attn = snd_ctl_new1(&snd_emu10k1_efx_attn_control, emu);
if (!kctl)
return -ENOMEM;
kctl->id.device = multi_device;
err = snd_ctl_add(card, kctl);
if (err)
return err;
if (!emu->card_capabilities->ecard && !emu->card_capabilities->emu_model) {
/* sb live! and audigy */
kctl = snd_ctl_new1(&snd_emu10k1_spdif_mask_control, emu);
if (!kctl)
return -ENOMEM;
if (!emu->audigy)
kctl->id.device = emu->pcm_efx->device;
err = snd_ctl_add(card, kctl);
if (err)
return err;
kctl = snd_ctl_new1(&snd_emu10k1_spdif_control, emu);
if (!kctl)
return -ENOMEM;
if (!emu->audigy)
kctl->id.device = emu->pcm_efx->device;
err = snd_ctl_add(card, kctl);
if (err)
return err;
}
if (emu->card_capabilities->emu_model) {
; /* Disable the snd_audigy_spdif_shared_spdif */
} else if (emu->audigy) {
kctl = snd_ctl_new1(&snd_audigy_shared_spdif, emu);
if (!kctl)
return -ENOMEM;
err = snd_ctl_add(card, kctl);
if (err)
return err;
#if 0
kctl = snd_ctl_new1(&snd_audigy_spdif_output_rate, emu);
if (!kctl)
return -ENOMEM;
err = snd_ctl_add(card, kctl);
if (err)
return err;
#endif
} else if (! emu->card_capabilities->ecard) {
/* sb live! */
kctl = snd_ctl_new1(&snd_emu10k1_shared_spdif, emu);
if (!kctl)
return -ENOMEM;
err = snd_ctl_add(card, kctl);
if (err)
return err;
}
if (emu->card_capabilities->ca0151_chip) { /* P16V */
err = snd_p16v_mixer(emu);
if (err)
return err;
}
if (emu->card_capabilities->emu_model) {
unsigned i, emu_idx = emu1010_idx(emu);
const struct snd_emu1010_routing_info *emu_ri =
&emu1010_routing_info[emu_idx];
const struct snd_emu1010_pads_info *emu_pi = &emu1010_pads_info[emu_idx];
for (i = 0; i < emu_ri->n_ins; i++)
emu->emu1010.input_source[i] =
emu1010_map_source(emu_ri, emu_ri->in_dflts[i]);
for (i = 0; i < emu_ri->n_outs; i++)
emu->emu1010.output_source[i] =
emu1010_map_source(emu_ri, emu_ri->out_dflts[i]);
snd_emu1010_apply_sources(emu);
kctl = emu->ctl_clock_source = snd_ctl_new1(&snd_emu1010_clock_source, emu);
err = snd_ctl_add(card, kctl);
if (err < 0)
return err;
err = snd_ctl_add(card,
snd_ctl_new1(&snd_emu1010_clock_fallback, emu));
if (err < 0)
return err;
err = add_ctls(emu, &emu1010_adc_pads_ctl,
emu_pi->adc_ctls, emu_pi->n_adc_ctls);
if (err < 0)
return err;
err = add_ctls(emu, &emu1010_dac_pads_ctl,
emu_pi->dac_ctls, emu_pi->n_dac_ctls);
if (err < 0)
return err;
if (!emu->card_capabilities->no_adat) {
err = snd_ctl_add(card,
snd_ctl_new1(&snd_emu1010_optical_out, emu));
if (err < 0)
return err;
err = snd_ctl_add(card,
snd_ctl_new1(&snd_emu1010_optical_in, emu));
if (err < 0)
return err;
}
err = add_emu1010_source_mixers(emu);
if (err < 0)
return err;
}
if ( emu->card_capabilities->i2c_adc) {
err = snd_ctl_add(card, snd_ctl_new1(&snd_audigy_i2c_capture_source, emu));
if (err < 0)
return err;
err = add_ctls(emu, &i2c_volume_ctl,
snd_audigy_i2c_volume_ctls,
ARRAY_SIZE(snd_audigy_i2c_volume_ctls));
if (err < 0)
return err;
}
if (emu->card_capabilities->ac97_chip && emu->audigy) {
err = snd_ctl_add(card, snd_ctl_new1(&snd_audigy_capture_boost,
emu));
if (err < 0)
return err;
}
return 0;
}
| linux-master | sound/pci/emu10k1/emumixer.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (c) by James Courtier-Dutton <[email protected]>
* Driver p16v chips
* Version: 0.25
*
* FEATURES currently supported:
* Output fixed at S32_LE, 2 channel to hw:0,0
* Rates: 44.1, 48, 96, 192.
*
* Changelog:
* 0.8
* Use separate card based buffer for periods table.
* 0.9
* Use 2 channel output streams instead of 8 channel.
* (8 channel output streams might be good for ASIO type output)
* Corrected speaker output, so Front -> Front etc.
* 0.10
* Fixed missed interrupts.
* 0.11
* Add Sound card model number and names.
* Add Analog volume controls.
* 0.12
* Corrected playback interrupts. Now interrupt per period, instead of half period.
* 0.13
* Use single trigger for multichannel.
* 0.14
* Mic capture now works at fixed: S32_LE, 96000Hz, Stereo.
* 0.15
* Force buffer_size / period_size == INTEGER.
* 0.16
* Update p16v.c to work with changed alsa api.
* 0.17
* Update p16v.c to work with changed alsa api. Removed boot_devs.
* 0.18
* Merging with snd-emu10k1 driver.
* 0.19
* One stereo channel at 24bit now works.
* 0.20
* Added better register defines.
* 0.21
* Integrated with snd-emu10k1 driver.
* 0.22
* Removed #if 0 ... #endif
* 0.23
* Implement different capture rates.
* 0.24
* Implement different capture source channels.
* e.g. When HD Capture source is set to SPDIF,
* setting HD Capture channel to 0 captures from CDROM digital input.
* setting HD Capture channel to 1 captures from SPDIF in.
* 0.25
* Include capture buffer sizes.
*
* BUGS:
* Some stability problems when unloading the snd-p16v kernel module.
* --
*
* TODO:
* SPDIF out.
* Find out how to change capture sample rates. E.g. To record SPDIF at 48000Hz.
* Currently capture fixed at 48000Hz.
*
* --
* GENERAL INFO:
* Model: SB0240
* P16V Chip: CA0151-DBS
* Audigy 2 Chip: CA0102-IAT
* AC97 Codec: STAC 9721
* ADC: Philips 1361T (Stereo 24bit)
* DAC: CS4382-K (8-channel, 24bit, 192Khz)
*
* This code was initially based on code from ALSA's emu10k1x.c which is:
* Copyright (c) by Francisco Moraes <[email protected]>
*/
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/pci.h>
#include <linux/slab.h>
#include <linux/vmalloc.h>
#include <linux/moduleparam.h>
#include <sound/core.h>
#include <sound/initval.h>
#include <sound/pcm.h>
#include <sound/ac97_codec.h>
#include <sound/info.h>
#include <sound/tlv.h>
#include <sound/emu10k1.h>
#include "p16v.h"
#define SET_CHANNEL 0 /* Testing channel outputs 0=Front, 1=Center/LFE, 2=Unknown, 3=Rear */
#define PCM_FRONT_CHANNEL 0
#define PCM_REAR_CHANNEL 1
#define PCM_CENTER_LFE_CHANNEL 2
#define PCM_SIDE_CHANNEL 3
#define CONTROL_FRONT_CHANNEL 0
#define CONTROL_REAR_CHANNEL 3
#define CONTROL_CENTER_LFE_CHANNEL 1
#define CONTROL_SIDE_CHANNEL 2
/* Card IDs:
* Class 0401: 1102:0004 (rev 04) Subsystem: 1102:2002 -> Audigy2 ZS 7.1 Model:SB0350
* Class 0401: 1102:0004 (rev 04) Subsystem: 1102:1007 -> Audigy2 6.1 Model:SB0240
* Class 0401: 1102:0004 (rev 04) Subsystem: 1102:1002 -> Audigy2 Platinum Model:SB msb0240230009266
* Class 0401: 1102:0004 (rev 04) Subsystem: 1102:2007 -> Audigy4 Pro Model:SB0380 M1SB0380472001901E
*
*/
/* hardware definition */
static const struct snd_pcm_hardware snd_p16v_playback_hw = {
.info = SNDRV_PCM_INFO_MMAP |
SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_RESUME |
SNDRV_PCM_INFO_MMAP_VALID |
SNDRV_PCM_INFO_SYNC_START,
.formats = SNDRV_PCM_FMTBIT_S32_LE, /* Only supports 24-bit samples padded to 32 bits. */
.rates = SNDRV_PCM_RATE_192000 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_44100,
.rate_min = 44100,
.rate_max = 192000,
.channels_min = 8,
.channels_max = 8,
.buffer_bytes_max = ((65536 - 64) * 8),
.period_bytes_min = 64,
.period_bytes_max = (65536 - 64),
.periods_min = 2,
.periods_max = 8,
.fifo_size = 0,
};
static const struct snd_pcm_hardware snd_p16v_capture_hw = {
.info = (SNDRV_PCM_INFO_MMAP |
SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_RESUME |
SNDRV_PCM_INFO_MMAP_VALID),
.formats = SNDRV_PCM_FMTBIT_S32_LE,
.rates = SNDRV_PCM_RATE_192000 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_44100,
.rate_min = 44100,
.rate_max = 192000,
.channels_min = 2,
.channels_max = 2,
.buffer_bytes_max = (65536 - 64),
.period_bytes_min = 64,
.period_bytes_max = (65536 - 128) >> 1, /* size has to be N*64 bytes */
.periods_min = 2,
.periods_max = 2,
.fifo_size = 0,
};
/* open_playback callback */
static int snd_p16v_pcm_open_playback_channel(struct snd_pcm_substream *substream, int channel_id)
{
struct snd_pcm_runtime *runtime = substream->runtime;
int err;
/*
dev_dbg(emu->card->dev, "epcm device=%d, channel_id=%d\n",
substream->pcm->device, channel_id);
*/
runtime->hw = snd_p16v_playback_hw;
#if 0 /* debug */
dev_dbg(emu->card->dev,
"p16v: open channel_id=%d, channel=%p, use=0x%x\n",
channel_id, channel, channel->use);
dev_dbg(emu->card->dev, "open:channel_id=%d, chip=%p, channel=%p\n",
channel_id, chip, channel);
#endif /* debug */
/* channel->interrupt = snd_p16v_pcm_channel_interrupt; */
err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
if (err < 0)
return err;
runtime->sync.id32[0] = substream->pcm->card->number;
runtime->sync.id32[1] = 'P';
runtime->sync.id32[2] = 16;
runtime->sync.id32[3] = 'V';
return 0;
}
/* open_capture callback */
static int snd_p16v_pcm_open_capture_channel(struct snd_pcm_substream *substream, int channel_id)
{
struct snd_pcm_runtime *runtime = substream->runtime;
int err;
/*
dev_dbg(emu->card->dev, "epcm device=%d, channel_id=%d\n",
substream->pcm->device, channel_id);
*/
runtime->hw = snd_p16v_capture_hw;
err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
if (err < 0)
return err;
return 0;
}
/* close callback */
static int snd_p16v_pcm_close_playback(struct snd_pcm_substream *substream)
{
return 0;
}
/* close callback */
static int snd_p16v_pcm_close_capture(struct snd_pcm_substream *substream)
{
return 0;
}
static int snd_p16v_pcm_open_playback_front(struct snd_pcm_substream *substream)
{
return snd_p16v_pcm_open_playback_channel(substream, PCM_FRONT_CHANNEL);
}
static int snd_p16v_pcm_open_capture(struct snd_pcm_substream *substream)
{
// Only using channel 0 for now, but the card has 2 channels.
return snd_p16v_pcm_open_capture_channel(substream, 0);
}
/* prepare playback callback */
static int snd_p16v_pcm_prepare_playback(struct snd_pcm_substream *substream)
{
struct snd_emu10k1 *emu = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
int channel = substream->pcm->device - emu->p16v_device_offset;
u32 *table_base = (u32 *)(emu->p16v_buffer->area+(8*16*channel));
u32 period_size_bytes = frames_to_bytes(runtime, runtime->period_size);
int i;
u32 tmp;
#if 0 /* debug */
dev_dbg(emu->card->dev,
"prepare:channel_number=%d, rate=%d, "
"format=0x%x, channels=%d, buffer_size=%ld, "
"period_size=%ld, periods=%u, frames_to_bytes=%d\n",
channel, runtime->rate, runtime->format, runtime->channels,
runtime->buffer_size, runtime->period_size,
runtime->periods, frames_to_bytes(runtime, 1));
dev_dbg(emu->card->dev,
"dma_addr=%x, dma_area=%p, table_base=%p\n",
runtime->dma_addr, runtime->dma_area, table_base);
dev_dbg(emu->card->dev,
"dma_addr=%x, dma_area=%p, dma_bytes(size)=%x\n",
emu->p16v_buffer->addr, emu->p16v_buffer->area,
emu->p16v_buffer->bytes);
#endif /* debug */
tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, channel);
tmp &= ~(A_SPDIF_RATE_MASK | A_EHC_SRC48_MASK);
switch (runtime->rate) {
case 44100:
snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, channel,
tmp | A_SPDIF_44100 | A_EHC_SRC48_44);
break;
case 96000:
snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, channel,
tmp | A_SPDIF_96000 | A_EHC_SRC48_96);
break;
case 192000:
snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, channel,
tmp | A_SPDIF_192000 | A_EHC_SRC48_192);
break;
case 48000:
default:
snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, channel,
tmp | A_SPDIF_48000 | A_EHC_SRC48_BYPASS);
break;
}
/* FIXME: Check emu->buffer.size before actually writing to it. */
for(i = 0; i < runtime->periods; i++) {
table_base[i*2]=runtime->dma_addr+(i*period_size_bytes);
table_base[(i*2)+1]=period_size_bytes<<16;
}
snd_emu10k1_ptr20_write(emu, PLAYBACK_LIST_ADDR, channel, emu->p16v_buffer->addr+(8*16*channel));
snd_emu10k1_ptr20_write(emu, PLAYBACK_LIST_SIZE, channel, (runtime->periods - 1) << 19);
snd_emu10k1_ptr20_write(emu, PLAYBACK_LIST_PTR, channel, 0);
snd_emu10k1_ptr20_write(emu, PLAYBACK_DMA_ADDR, channel, runtime->dma_addr);
//snd_emu10k1_ptr20_write(emu, PLAYBACK_PERIOD_SIZE, channel, frames_to_bytes(runtime, runtime->period_size)<<16); // buffer size in bytes
snd_emu10k1_ptr20_write(emu, PLAYBACK_PERIOD_SIZE, channel, 0); // buffer size in bytes
snd_emu10k1_ptr20_write(emu, PLAYBACK_POINTER, channel, 0);
snd_emu10k1_ptr20_write(emu, PLAYBACK_FIFO_END_ADDRESS, channel, 0);
snd_emu10k1_ptr20_write(emu, PLAYBACK_FIFO_POINTER, channel, 0);
return 0;
}
/* prepare capture callback */
static int snd_p16v_pcm_prepare_capture(struct snd_pcm_substream *substream)
{
struct snd_emu10k1 *emu = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
int channel = substream->pcm->device - emu->p16v_device_offset;
/*
dev_dbg(emu->card->dev, "prepare capture:channel_number=%d, rate=%d, "
"format=0x%x, channels=%d, buffer_size=%ld, period_size=%ld, "
"frames_to_bytes=%d\n",
channel, runtime->rate, runtime->format, runtime->channels,
runtime->buffer_size, runtime->period_size,
frames_to_bytes(runtime, 1));
*/
switch (runtime->rate) {
case 44100:
snd_emu10k1_ptr_write(emu, A_I2S_CAPTURE_RATE, channel, A_I2S_CAPTURE_44100);
break;
case 96000:
snd_emu10k1_ptr_write(emu, A_I2S_CAPTURE_RATE, channel, A_I2S_CAPTURE_96000);
break;
case 192000:
snd_emu10k1_ptr_write(emu, A_I2S_CAPTURE_RATE, channel, A_I2S_CAPTURE_192000);
break;
case 48000:
default:
snd_emu10k1_ptr_write(emu, A_I2S_CAPTURE_RATE, channel, A_I2S_CAPTURE_48000);
break;
}
/* FIXME: Check emu->buffer.size before actually writing to it. */
snd_emu10k1_ptr20_write(emu, CAPTURE_FIFO_POINTER, channel, 0);
snd_emu10k1_ptr20_write(emu, CAPTURE_DMA_ADDR, channel, runtime->dma_addr);
snd_emu10k1_ptr20_write(emu, CAPTURE_BUFFER_SIZE, channel, frames_to_bytes(runtime, runtime->buffer_size) << 16); // buffer size in bytes
snd_emu10k1_ptr20_write(emu, CAPTURE_POINTER, channel, 0);
//snd_emu10k1_ptr20_write(emu, CAPTURE_SOURCE, 0x0, 0x333300e4); /* Select MIC or Line in */
//snd_emu10k1_ptr20_write(emu, EXTENDED_INT_MASK, 0, snd_emu10k1_ptr20_read(emu, EXTENDED_INT_MASK, 0) | (0x110000<<channel));
return 0;
}
static void snd_p16v_intr_enable(struct snd_emu10k1 *emu, unsigned int intrenb)
{
unsigned long flags;
unsigned int enable;
spin_lock_irqsave(&emu->emu_lock, flags);
enable = inl(emu->port + INTE2) | intrenb;
outl(enable, emu->port + INTE2);
spin_unlock_irqrestore(&emu->emu_lock, flags);
}
static void snd_p16v_intr_disable(struct snd_emu10k1 *emu, unsigned int intrenb)
{
unsigned long flags;
unsigned int disable;
spin_lock_irqsave(&emu->emu_lock, flags);
disable = inl(emu->port + INTE2) & (~intrenb);
outl(disable, emu->port + INTE2);
spin_unlock_irqrestore(&emu->emu_lock, flags);
}
static void snd_p16v_interrupt(struct snd_emu10k1 *emu)
{
unsigned int status;
while ((status = inl(emu->port + IPR2)) != 0) {
u32 mask = INTE2_PLAYBACK_CH_0_LOOP; /* Full Loop */
/* dev_dbg(emu->card->dev, "p16v status=0x%x\n", status); */
if (status & mask) {
struct snd_pcm_substream *substream =
emu->pcm_p16v->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
struct snd_pcm_runtime *runtime = substream->runtime;
if (runtime && runtime->private_data) {
snd_pcm_period_elapsed(substream);
} else {
dev_err(emu->card->dev,
"p16v: status: 0x%08x, mask=0x%08x\n",
status, mask);
}
}
if (status & 0x110000) {
struct snd_pcm_substream *substream =
emu->pcm_p16v->streams[SNDRV_PCM_STREAM_CAPTURE].substream;
struct snd_pcm_runtime *runtime = substream->runtime;
/* dev_info(emu->card->dev, "capture int found\n"); */
if (runtime && runtime->private_data) {
/* dev_info(emu->card->dev, "capture period_elapsed\n"); */
snd_pcm_period_elapsed(substream);
}
}
outl(status, emu->port + IPR2); /* ack all */
}
}
/* trigger_playback callback */
static int snd_p16v_pcm_trigger_playback(struct snd_pcm_substream *substream,
int cmd)
{
struct snd_emu10k1 *emu = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime;
int channel;
int result = 0;
struct snd_pcm_substream *s;
u32 basic = 0;
u32 inte = 0;
int running = 0;
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
running=1;
break;
case SNDRV_PCM_TRIGGER_STOP:
default:
running = 0;
break;
}
snd_pcm_group_for_each_entry(s, substream) {
if (snd_pcm_substream_chip(s) != emu ||
s->stream != SNDRV_PCM_STREAM_PLAYBACK)
continue;
runtime = s->runtime;
channel = substream->pcm->device-emu->p16v_device_offset;
/* dev_dbg(emu->card->dev, "p16v channel=%d\n", channel); */
runtime->private_data = (void *)(ptrdiff_t)running;
basic |= (0x1<<channel);
inte |= (INTE2_PLAYBACK_CH_0_LOOP<<channel);
snd_pcm_trigger_done(s, substream);
}
/* dev_dbg(emu->card->dev, "basic=0x%x, inte=0x%x\n", basic, inte); */
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
snd_p16v_intr_enable(emu, inte);
snd_emu10k1_ptr20_write(emu, BASIC_INTERRUPT, 0, snd_emu10k1_ptr20_read(emu, BASIC_INTERRUPT, 0)| (basic));
break;
case SNDRV_PCM_TRIGGER_STOP:
snd_emu10k1_ptr20_write(emu, BASIC_INTERRUPT, 0, snd_emu10k1_ptr20_read(emu, BASIC_INTERRUPT, 0) & ~(basic));
snd_p16v_intr_disable(emu, inte);
break;
default:
result = -EINVAL;
break;
}
return result;
}
/* trigger_capture callback */
static int snd_p16v_pcm_trigger_capture(struct snd_pcm_substream *substream,
int cmd)
{
struct snd_emu10k1 *emu = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
int channel = 0;
int result = 0;
u32 inte = INTE2_CAPTURE_CH_0_LOOP | INTE2_CAPTURE_CH_0_HALF_LOOP;
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
snd_p16v_intr_enable(emu, inte);
snd_emu10k1_ptr20_write(emu, BASIC_INTERRUPT, 0, snd_emu10k1_ptr20_read(emu, BASIC_INTERRUPT, 0)|(0x100<<channel));
runtime->private_data = (void *)1;
break;
case SNDRV_PCM_TRIGGER_STOP:
snd_emu10k1_ptr20_write(emu, BASIC_INTERRUPT, 0, snd_emu10k1_ptr20_read(emu, BASIC_INTERRUPT, 0) & ~(0x100<<channel));
snd_p16v_intr_disable(emu, inte);
//snd_emu10k1_ptr20_write(emu, EXTENDED_INT_MASK, 0, snd_emu10k1_ptr20_read(emu, EXTENDED_INT_MASK, 0) & ~(0x110000<<channel));
runtime->private_data = NULL;
break;
default:
result = -EINVAL;
break;
}
return result;
}
/* pointer_playback callback */
static snd_pcm_uframes_t
snd_p16v_pcm_pointer_playback(struct snd_pcm_substream *substream)
{
struct snd_emu10k1 *emu = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
snd_pcm_uframes_t ptr, ptr1, ptr2,ptr3,ptr4 = 0;
int channel = substream->pcm->device - emu->p16v_device_offset;
if (!runtime->private_data)
return 0;
ptr3 = snd_emu10k1_ptr20_read(emu, PLAYBACK_LIST_PTR, channel);
ptr1 = snd_emu10k1_ptr20_read(emu, PLAYBACK_POINTER, channel);
ptr4 = snd_emu10k1_ptr20_read(emu, PLAYBACK_LIST_PTR, channel);
if (ptr3 != ptr4) ptr1 = snd_emu10k1_ptr20_read(emu, PLAYBACK_POINTER, channel);
ptr2 = bytes_to_frames(runtime, ptr1);
ptr2+= (ptr4 >> 3) * runtime->period_size;
ptr=ptr2;
if (ptr >= runtime->buffer_size)
ptr -= runtime->buffer_size;
return ptr;
}
/* pointer_capture callback */
static snd_pcm_uframes_t
snd_p16v_pcm_pointer_capture(struct snd_pcm_substream *substream)
{
struct snd_emu10k1 *emu = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
snd_pcm_uframes_t ptr, ptr1, ptr2 = 0;
int channel = 0;
if (!runtime->private_data)
return 0;
ptr1 = snd_emu10k1_ptr20_read(emu, CAPTURE_POINTER, channel);
ptr2 = bytes_to_frames(runtime, ptr1);
ptr=ptr2;
if (ptr >= runtime->buffer_size) {
ptr -= runtime->buffer_size;
dev_warn(emu->card->dev, "buffer capture limited!\n");
}
/*
dev_dbg(emu->card->dev, "ptr1 = 0x%lx, ptr2=0x%lx, ptr=0x%lx, "
"buffer_size = 0x%x, period_size = 0x%x, bits=%d, rate=%d\n",
ptr1, ptr2, ptr, (int)runtime->buffer_size,
(int)runtime->period_size, (int)runtime->frame_bits,
(int)runtime->rate);
*/
return ptr;
}
/* operators */
static const struct snd_pcm_ops snd_p16v_playback_front_ops = {
.open = snd_p16v_pcm_open_playback_front,
.close = snd_p16v_pcm_close_playback,
.prepare = snd_p16v_pcm_prepare_playback,
.trigger = snd_p16v_pcm_trigger_playback,
.pointer = snd_p16v_pcm_pointer_playback,
};
static const struct snd_pcm_ops snd_p16v_capture_ops = {
.open = snd_p16v_pcm_open_capture,
.close = snd_p16v_pcm_close_capture,
.prepare = snd_p16v_pcm_prepare_capture,
.trigger = snd_p16v_pcm_trigger_capture,
.pointer = snd_p16v_pcm_pointer_capture,
};
int snd_p16v_pcm(struct snd_emu10k1 *emu, int device)
{
struct snd_pcm *pcm;
struct snd_pcm_substream *substream;
int err;
int capture=1;
/* dev_dbg(emu->card->dev, "snd_p16v_pcm called. device=%d\n", device); */
emu->p16v_device_offset = device;
err = snd_pcm_new(emu->card, "p16v", device, 1, capture, &pcm);
if (err < 0)
return err;
pcm->private_data = emu;
// Single playback 8 channel device.
// Single capture 2 channel device.
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_p16v_playback_front_ops);
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_p16v_capture_ops);
pcm->info_flags = 0;
pcm->dev_subclass = SNDRV_PCM_SUBCLASS_GENERIC_MIX;
strcpy(pcm->name, "p16v");
emu->pcm_p16v = pcm;
emu->p16v_interrupt = snd_p16v_interrupt;
for(substream = pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
substream;
substream = substream->next) {
snd_pcm_set_managed_buffer(substream, SNDRV_DMA_TYPE_DEV,
&emu->pci->dev,
(65536 - 64) * 8,
(65536 - 64) * 8);
/*
dev_dbg(emu->card->dev,
"preallocate playback substream: err=%d\n", err);
*/
}
for (substream = pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream;
substream;
substream = substream->next) {
snd_pcm_set_managed_buffer(substream, SNDRV_DMA_TYPE_DEV,
&emu->pci->dev,
65536 - 64, 65536 - 64);
/*
dev_dbg(emu->card->dev,
"preallocate capture substream: err=%d\n", err);
*/
}
return 0;
}
static int snd_p16v_volume_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 2;
uinfo->value.integer.min = 0;
uinfo->value.integer.max = 255;
return 0;
}
static int snd_p16v_volume_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
int high_low = (kcontrol->private_value >> 8) & 0xff;
int reg = kcontrol->private_value & 0xff;
u32 value;
value = snd_emu10k1_ptr20_read(emu, reg, high_low);
if (high_low) {
ucontrol->value.integer.value[0] = 0xff - ((value >> 24) & 0xff); /* Left */
ucontrol->value.integer.value[1] = 0xff - ((value >> 16) & 0xff); /* Right */
} else {
ucontrol->value.integer.value[0] = 0xff - ((value >> 8) & 0xff); /* Left */
ucontrol->value.integer.value[1] = 0xff - ((value >> 0) & 0xff); /* Right */
}
return 0;
}
static int snd_p16v_volume_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
int high_low = (kcontrol->private_value >> 8) & 0xff;
int reg = kcontrol->private_value & 0xff;
u32 value, oval;
oval = value = snd_emu10k1_ptr20_read(emu, reg, 0);
if (high_low == 1) {
value &= 0xffff;
value |= ((0xff - ucontrol->value.integer.value[0]) << 24) |
((0xff - ucontrol->value.integer.value[1]) << 16);
} else {
value &= 0xffff0000;
value |= ((0xff - ucontrol->value.integer.value[0]) << 8) |
((0xff - ucontrol->value.integer.value[1]) );
}
if (value != oval) {
snd_emu10k1_ptr20_write(emu, reg, 0, value);
return 1;
}
return 0;
}
static int snd_p16v_capture_source_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
static const char * const texts[8] = {
"SPDIF", "I2S", "SRC48", "SRCMulti_SPDIF", "SRCMulti_I2S",
"CDIF", "FX", "AC97"
};
return snd_ctl_enum_info(uinfo, 1, 8, texts);
}
static int snd_p16v_capture_source_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
ucontrol->value.enumerated.item[0] = emu->p16v_capture_source;
return 0;
}
static int snd_p16v_capture_source_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
unsigned int val;
int change = 0;
u32 mask;
u32 source;
val = ucontrol->value.enumerated.item[0] ;
if (val > 7)
return -EINVAL;
change = (emu->p16v_capture_source != val);
if (change) {
emu->p16v_capture_source = val;
source = (val << 28) | (val << 24) | (val << 20) | (val << 16);
mask = snd_emu10k1_ptr20_read(emu, BASIC_INTERRUPT, 0) & 0xffff;
snd_emu10k1_ptr20_write(emu, BASIC_INTERRUPT, 0, source | mask);
}
return change;
}
static int snd_p16v_capture_channel_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
static const char * const texts[4] = { "0", "1", "2", "3", };
return snd_ctl_enum_info(uinfo, 1, 4, texts);
}
static int snd_p16v_capture_channel_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
ucontrol->value.enumerated.item[0] = emu->p16v_capture_channel;
return 0;
}
static int snd_p16v_capture_channel_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
unsigned int val;
int change = 0;
u32 tmp;
val = ucontrol->value.enumerated.item[0] ;
if (val > 3)
return -EINVAL;
change = (emu->p16v_capture_channel != val);
if (change) {
emu->p16v_capture_channel = val;
tmp = snd_emu10k1_ptr20_read(emu, CAPTURE_P16V_SOURCE, 0) & 0xfffc;
snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, tmp | val);
}
return change;
}
static const DECLARE_TLV_DB_SCALE(snd_p16v_db_scale1, -5175, 25, 1);
#define P16V_VOL(xname,xreg,xhl) { \
.iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
.info = snd_p16v_volume_info, \
.get = snd_p16v_volume_get, \
.put = snd_p16v_volume_put, \
.tlv = { .p = snd_p16v_db_scale1 }, \
.private_value = ((xreg) | ((xhl) << 8)) \
}
static const struct snd_kcontrol_new p16v_mixer_controls[] = {
P16V_VOL("HD Analog Front Playback Volume", PLAYBACK_VOLUME_MIXER9, 0),
P16V_VOL("HD Analog Rear Playback Volume", PLAYBACK_VOLUME_MIXER10, 1),
P16V_VOL("HD Analog Center/LFE Playback Volume", PLAYBACK_VOLUME_MIXER9, 1),
P16V_VOL("HD Analog Side Playback Volume", PLAYBACK_VOLUME_MIXER10, 0),
P16V_VOL("HD SPDIF Front Playback Volume", PLAYBACK_VOLUME_MIXER7, 0),
P16V_VOL("HD SPDIF Rear Playback Volume", PLAYBACK_VOLUME_MIXER8, 1),
P16V_VOL("HD SPDIF Center/LFE Playback Volume", PLAYBACK_VOLUME_MIXER7, 1),
P16V_VOL("HD SPDIF Side Playback Volume", PLAYBACK_VOLUME_MIXER8, 0),
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "HD source Capture",
.info = snd_p16v_capture_source_info,
.get = snd_p16v_capture_source_get,
.put = snd_p16v_capture_source_put
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "HD channel Capture",
.info = snd_p16v_capture_channel_info,
.get = snd_p16v_capture_channel_get,
.put = snd_p16v_capture_channel_put
},
};
int snd_p16v_mixer(struct snd_emu10k1 *emu)
{
int i, err;
struct snd_card *card = emu->card;
for (i = 0; i < ARRAY_SIZE(p16v_mixer_controls); i++) {
err = snd_ctl_add(card, snd_ctl_new1(&p16v_mixer_controls[i], emu));
if (err < 0)
return err;
}
return 0;
}
#ifdef CONFIG_PM_SLEEP
#define NUM_CHS 1 /* up to 4, but only first channel is used */
int snd_p16v_alloc_pm_buffer(struct snd_emu10k1 *emu)
{
emu->p16v_saved = vmalloc(array_size(NUM_CHS * 4, 0x80));
if (! emu->p16v_saved)
return -ENOMEM;
return 0;
}
void snd_p16v_free_pm_buffer(struct snd_emu10k1 *emu)
{
vfree(emu->p16v_saved);
}
void snd_p16v_suspend(struct snd_emu10k1 *emu)
{
int i, ch;
unsigned int *val;
val = emu->p16v_saved;
for (ch = 0; ch < NUM_CHS; ch++)
for (i = 0; i < 0x80; i++, val++)
*val = snd_emu10k1_ptr20_read(emu, i, ch);
}
void snd_p16v_resume(struct snd_emu10k1 *emu)
{
int i, ch;
unsigned int *val;
val = emu->p16v_saved;
for (ch = 0; ch < NUM_CHS; ch++)
for (i = 0; i < 0x80; i++, val++)
snd_emu10k1_ptr20_write(emu, i, ch, *val);
}
#endif
| linux-master | sound/pci/emu10k1/p16v.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Patch transfer callback for Emu10k1
*
* Copyright (C) 2000 Takashi iwai <[email protected]>
*/
/*
* All the code for loading in a patch. There is very little that is
* chip specific here. Just the actual writing to the board.
*/
#include "emu10k1_synth_local.h"
/*
*/
#define BLANK_LOOP_START 4
#define BLANK_LOOP_END 8
#define BLANK_LOOP_SIZE 12
#define BLANK_HEAD_SIZE 32
/*
* allocate a sample block and copy data from userspace
*/
int
snd_emu10k1_sample_new(struct snd_emux *rec, struct snd_sf_sample *sp,
struct snd_util_memhdr *hdr,
const void __user *data, long count)
{
int offset;
int truesize, size, blocksize;
__maybe_unused int loopsize;
int loopend, sampleend;
unsigned int start_addr;
struct snd_emu10k1 *emu;
emu = rec->hw;
if (snd_BUG_ON(!sp || !hdr))
return -EINVAL;
if (sp->v.size == 0) {
dev_dbg(emu->card->dev,
"emu: rom font for sample %d\n", sp->v.sample);
return 0;
}
/* recalculate address offset */
sp->v.end -= sp->v.start;
sp->v.loopstart -= sp->v.start;
sp->v.loopend -= sp->v.start;
sp->v.start = 0;
/* some samples have invalid data. the addresses are corrected in voice info */
sampleend = sp->v.end;
if (sampleend > sp->v.size)
sampleend = sp->v.size;
loopend = sp->v.loopend;
if (loopend > sampleend)
loopend = sampleend;
/* be sure loop points start < end */
if (sp->v.loopstart >= sp->v.loopend)
swap(sp->v.loopstart, sp->v.loopend);
/* compute true data size to be loaded */
truesize = sp->v.size + BLANK_HEAD_SIZE;
loopsize = 0;
#if 0 /* not supported */
if (sp->v.mode_flags & (SNDRV_SFNT_SAMPLE_BIDIR_LOOP|SNDRV_SFNT_SAMPLE_REVERSE_LOOP))
loopsize = sp->v.loopend - sp->v.loopstart;
truesize += loopsize;
#endif
if (sp->v.mode_flags & SNDRV_SFNT_SAMPLE_NO_BLANK)
truesize += BLANK_LOOP_SIZE;
/* try to allocate a memory block */
blocksize = truesize;
if (! (sp->v.mode_flags & SNDRV_SFNT_SAMPLE_8BITS))
blocksize *= 2;
sp->block = snd_emu10k1_synth_alloc(emu, blocksize);
if (sp->block == NULL) {
dev_dbg(emu->card->dev,
"synth malloc failed (size=%d)\n", blocksize);
/* not ENOMEM (for compatibility with OSS) */
return -ENOSPC;
}
/* set the total size */
sp->v.truesize = blocksize;
/* write blank samples at head */
offset = 0;
size = BLANK_HEAD_SIZE;
if (! (sp->v.mode_flags & SNDRV_SFNT_SAMPLE_8BITS))
size *= 2;
if (offset + size > blocksize)
return -EINVAL;
snd_emu10k1_synth_bzero(emu, sp->block, offset, size);
offset += size;
/* copy start->loopend */
size = loopend;
if (! (sp->v.mode_flags & SNDRV_SFNT_SAMPLE_8BITS))
size *= 2;
if (offset + size > blocksize)
return -EINVAL;
if (snd_emu10k1_synth_copy_from_user(emu, sp->block, offset, data, size)) {
snd_emu10k1_synth_free(emu, sp->block);
sp->block = NULL;
return -EFAULT;
}
offset += size;
data += size;
#if 0 /* not supported yet */
/* handle reverse (or bidirectional) loop */
if (sp->v.mode_flags & (SNDRV_SFNT_SAMPLE_BIDIR_LOOP|SNDRV_SFNT_SAMPLE_REVERSE_LOOP)) {
/* copy loop in reverse */
if (! (sp->v.mode_flags & SNDRV_SFNT_SAMPLE_8BITS)) {
int woffset;
unsigned short *wblock = (unsigned short*)block;
woffset = offset / 2;
if (offset + loopsize * 2 > blocksize)
return -EINVAL;
for (i = 0; i < loopsize; i++)
wblock[woffset + i] = wblock[woffset - i -1];
offset += loopsize * 2;
} else {
if (offset + loopsize > blocksize)
return -EINVAL;
for (i = 0; i < loopsize; i++)
block[offset + i] = block[offset - i -1];
offset += loopsize;
}
/* modify loop pointers */
if (sp->v.mode_flags & SNDRV_SFNT_SAMPLE_BIDIR_LOOP) {
sp->v.loopend += loopsize;
} else {
sp->v.loopstart += loopsize;
sp->v.loopend += loopsize;
}
/* add sample pointer */
sp->v.end += loopsize;
}
#endif
/* loopend -> sample end */
size = sp->v.size - loopend;
if (size < 0)
return -EINVAL;
if (! (sp->v.mode_flags & SNDRV_SFNT_SAMPLE_8BITS))
size *= 2;
if (snd_emu10k1_synth_copy_from_user(emu, sp->block, offset, data, size)) {
snd_emu10k1_synth_free(emu, sp->block);
sp->block = NULL;
return -EFAULT;
}
offset += size;
/* clear rest of samples (if any) */
if (offset < blocksize)
snd_emu10k1_synth_bzero(emu, sp->block, offset, blocksize - offset);
if (sp->v.mode_flags & SNDRV_SFNT_SAMPLE_NO_BLANK) {
/* if no blank loop is attached in the sample, add it */
if (sp->v.mode_flags & SNDRV_SFNT_SAMPLE_SINGLESHOT) {
sp->v.loopstart = sp->v.end + BLANK_LOOP_START;
sp->v.loopend = sp->v.end + BLANK_LOOP_END;
}
}
#if 0 /* not supported yet */
if (sp->v.mode_flags & SNDRV_SFNT_SAMPLE_UNSIGNED) {
/* unsigned -> signed */
if (! (sp->v.mode_flags & SNDRV_SFNT_SAMPLE_8BITS)) {
unsigned short *wblock = (unsigned short*)block;
for (i = 0; i < truesize; i++)
wblock[i] ^= 0x8000;
} else {
for (i = 0; i < truesize; i++)
block[i] ^= 0x80;
}
}
#endif
/* recalculate offset */
start_addr = BLANK_HEAD_SIZE * 2;
if (! (sp->v.mode_flags & SNDRV_SFNT_SAMPLE_8BITS))
start_addr >>= 1;
sp->v.start += start_addr;
sp->v.end += start_addr;
sp->v.loopstart += start_addr;
sp->v.loopend += start_addr;
return 0;
}
/*
* free a sample block
*/
int
snd_emu10k1_sample_free(struct snd_emux *rec, struct snd_sf_sample *sp,
struct snd_util_memhdr *hdr)
{
struct snd_emu10k1 *emu;
emu = rec->hw;
if (snd_BUG_ON(!sp || !hdr))
return -EINVAL;
if (sp->block) {
snd_emu10k1_synth_free(emu, sp->block);
sp->block = NULL;
}
return 0;
}
| linux-master | sound/pci/emu10k1/emu10k1_patch.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (c) by Jaroslav Kysela <[email protected]>
* James Courtier-Dutton <[email protected]>
* Oswald Buddenhagen <[email protected]>
* Creative Labs, Inc.
*
* Routines for control of EMU10K1 chips
*/
#include <linux/sched.h>
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/iommu.h>
#include <linux/pci.h>
#include <linux/slab.h>
#include <linux/vmalloc.h>
#include <linux/mutex.h>
#include <sound/core.h>
#include <sound/emu10k1.h>
#include <linux/firmware.h>
#include "p16v.h"
#include "tina2.h"
#include "p17v.h"
#define HANA_FILENAME "emu/hana.fw"
#define DOCK_FILENAME "emu/audio_dock.fw"
#define EMU1010B_FILENAME "emu/emu1010b.fw"
#define MICRO_DOCK_FILENAME "emu/micro_dock.fw"
#define EMU0404_FILENAME "emu/emu0404.fw"
#define EMU1010_NOTEBOOK_FILENAME "emu/emu1010_notebook.fw"
MODULE_FIRMWARE(HANA_FILENAME);
MODULE_FIRMWARE(DOCK_FILENAME);
MODULE_FIRMWARE(EMU1010B_FILENAME);
MODULE_FIRMWARE(MICRO_DOCK_FILENAME);
MODULE_FIRMWARE(EMU0404_FILENAME);
MODULE_FIRMWARE(EMU1010_NOTEBOOK_FILENAME);
/*************************************************************************
* EMU10K1 init / done
*************************************************************************/
void snd_emu10k1_voice_init(struct snd_emu10k1 *emu, int ch)
{
snd_emu10k1_ptr_write_multiple(emu, ch,
DCYSUSV, 0,
VTFT, VTFT_FILTERTARGET_MASK,
CVCF, CVCF_CURRENTFILTER_MASK,
PTRX, 0,
CPF, 0,
CCR, 0,
PSST, 0,
DSL, 0x10,
CCCA, 0,
Z1, 0,
Z2, 0,
FXRT, 0x32100000,
// The rest is meaningless as long as DCYSUSV_CHANNELENABLE_MASK is zero
DCYSUSM, 0,
ATKHLDV, 0,
ATKHLDM, 0,
IP, 0,
IFATN, IFATN_FILTERCUTOFF_MASK | IFATN_ATTENUATION_MASK,
PEFE, 0,
FMMOD, 0,
TREMFRQ, 24, /* 1 Hz */
FM2FRQ2, 24, /* 1 Hz */
LFOVAL2, 0,
LFOVAL1, 0,
ENVVOL, 0,
ENVVAL, 0,
REGLIST_END);
/* Audigy extra stuffs */
if (emu->audigy) {
snd_emu10k1_ptr_write_multiple(emu, ch,
A_CSBA, 0,
A_CSDC, 0,
A_CSFE, 0,
A_CSHG, 0,
A_FXRT1, 0x03020100,
A_FXRT2, 0x07060504,
A_SENDAMOUNTS, 0,
REGLIST_END);
}
}
static const unsigned int spi_dac_init[] = {
0x00ff,
0x02ff,
0x0400,
0x0520,
0x0600,
0x08ff,
0x0aff,
0x0cff,
0x0eff,
0x10ff,
0x1200,
0x1400,
0x1480,
0x1800,
0x1aff,
0x1cff,
0x1e00,
0x0530,
0x0602,
0x0622,
0x1400,
};
static const unsigned int i2c_adc_init[][2] = {
{ 0x17, 0x00 }, /* Reset */
{ 0x07, 0x00 }, /* Timeout */
{ 0x0b, 0x22 }, /* Interface control */
{ 0x0c, 0x22 }, /* Master mode control */
{ 0x0d, 0x08 }, /* Powerdown control */
{ 0x0e, 0xcf }, /* Attenuation Left 0x01 = -103dB, 0xff = 24dB */
{ 0x0f, 0xcf }, /* Attenuation Right 0.5dB steps */
{ 0x10, 0x7b }, /* ALC Control 1 */
{ 0x11, 0x00 }, /* ALC Control 2 */
{ 0x12, 0x32 }, /* ALC Control 3 */
{ 0x13, 0x00 }, /* Noise gate control */
{ 0x14, 0xa6 }, /* Limiter control */
{ 0x15, ADC_MUX_2 }, /* ADC Mixer control. Mic for A2ZS Notebook */
};
static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir)
{
unsigned int silent_page;
int ch;
u32 tmp;
/* disable audio and lock cache */
outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK |
HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
outl(0, emu->port + INTE);
snd_emu10k1_ptr_write_multiple(emu, 0,
/* reset recording buffers */
MICBS, ADCBS_BUFSIZE_NONE,
MICBA, 0,
FXBS, ADCBS_BUFSIZE_NONE,
FXBA, 0,
ADCBS, ADCBS_BUFSIZE_NONE,
ADCBA, 0,
/* disable channel interrupt */
CLIEL, 0,
CLIEH, 0,
/* disable stop on loop end */
SOLEL, 0,
SOLEH, 0,
REGLIST_END);
if (emu->audigy) {
/* set SPDIF bypass mode */
snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT);
/* enable rear left + rear right AC97 slots */
snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT |
AC97SLOT_REAR_LEFT);
}
/* init envelope engine */
for (ch = 0; ch < NUM_G; ch++)
snd_emu10k1_voice_init(emu, ch);
snd_emu10k1_ptr_write_multiple(emu, 0,
SPCS0, emu->spdif_bits[0],
SPCS1, emu->spdif_bits[1],
SPCS2, emu->spdif_bits[2],
REGLIST_END);
if (emu->card_capabilities->emu_model) {
} else if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
/* Hacks for Alice3 to work independent of haP16V driver */
/* Setup SRCMulti_I2S SamplingRate */
snd_emu10k1_ptr_write(emu, A_I2S_CAPTURE_RATE, 0, A_I2S_CAPTURE_96000);
/* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14);
/* Setup SRCMulti Input Audio Enable */
/* Use 0xFFFFFFFF to enable P16V sounds. */
snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF);
/* Enabled Phased (8-channel) P16V playback */
outl(0x0201, emu->port + HCFG2);
/* Set playback routing. */
snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4);
} else if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */
/* Hacks for Alice3 to work independent of haP16V driver */
dev_info(emu->card->dev, "Audigy2 value: Special config.\n");
/* Setup SRCMulti_I2S SamplingRate */
snd_emu10k1_ptr_write(emu, A_I2S_CAPTURE_RATE, 0, A_I2S_CAPTURE_96000);
/* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
snd_emu10k1_ptr20_write(emu, P17V_SRCSel, 0, 0x14);
/* Setup SRCMulti Input Audio Enable */
snd_emu10k1_ptr20_write(emu, P17V_MIXER_I2S_ENABLE, 0, 0xFF000000);
/* Setup SPDIF Out Audio Enable */
/* The Audigy 2 Value has a separate SPDIF out,
* so no need for a mixer switch
*/
snd_emu10k1_ptr20_write(emu, P17V_MIXER_SPDIF_ENABLE, 0, 0xFF000000);
tmp = inw(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */
outw(tmp, emu->port + A_IOCFG);
}
if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */
int size, n;
size = ARRAY_SIZE(spi_dac_init);
for (n = 0; n < size; n++)
snd_emu10k1_spi_write(emu, spi_dac_init[n]);
snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10);
/* Enable GPIOs
* GPIO0: Unknown
* GPIO1: Speakers-enabled.
* GPIO2: Unknown
* GPIO3: Unknown
* GPIO4: IEC958 Output on.
* GPIO5: Unknown
* GPIO6: Unknown
* GPIO7: Unknown
*/
outw(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */
}
if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */
int size, n;
snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f);
tmp = inw(emu->port + A_IOCFG);
outw(tmp | 0x4, emu->port + A_IOCFG); /* Set bit 2 for mic input */
tmp = inw(emu->port + A_IOCFG);
size = ARRAY_SIZE(i2c_adc_init);
for (n = 0; n < size; n++)
snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]);
for (n = 0; n < 4; n++) {
emu->i2c_capture_volume[n][0] = 0xcf;
emu->i2c_capture_volume[n][1] = 0xcf;
}
}
snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr);
snd_emu10k1_ptr_write(emu, TCB, 0, 0); /* taken from original driver */
snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_256K); /* taken from original driver */
silent_page = (emu->silent_page.addr << emu->address_mode) | (emu->address_mode ? MAP_PTI_MASK1 : MAP_PTI_MASK0);
for (ch = 0; ch < NUM_G; ch++) {
snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page);
snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page);
}
if (emu->card_capabilities->emu_model) {
outl(HCFG_AUTOMUTE_ASYNC |
HCFG_EMU32_SLAVE |
HCFG_AUDIOENABLE, emu->port + HCFG);
/*
* Hokay, setup HCFG
* Mute Disable Audio = 0
* Lock Tank Memory = 1
* Lock Sound Memory = 0
* Auto Mute = 1
*/
} else if (emu->audigy) {
if (emu->revision == 4) /* audigy2 */
outl(HCFG_AUDIOENABLE |
HCFG_AC3ENABLE_CDSPDIF |
HCFG_AC3ENABLE_GPSPDIF |
HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
else
outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
/* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
* e.g. card_capabilities->joystick */
} else if (emu->model == 0x20 ||
emu->model == 0xc400 ||
(emu->model == 0x21 && emu->revision < 6))
outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG);
else
/* With on-chip joystick */
outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
if (enable_ir) { /* enable IR for SB Live */
if (emu->card_capabilities->emu_model) {
; /* Disable all access to A_IOCFG for the emu1010 */
} else if (emu->card_capabilities->i2c_adc) {
; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
} else if (emu->audigy) {
u16 reg = inw(emu->port + A_IOCFG);
outw(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
udelay(500);
outw(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
udelay(100);
outw(reg, emu->port + A_IOCFG);
} else {
unsigned int reg = inl(emu->port + HCFG);
outl(reg | HCFG_GPOUT2, emu->port + HCFG);
udelay(500);
outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG);
udelay(100);
outl(reg, emu->port + HCFG);
}
}
if (emu->card_capabilities->emu_model) {
; /* Disable all access to A_IOCFG for the emu1010 */
} else if (emu->card_capabilities->i2c_adc) {
; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
} else if (emu->audigy) { /* enable analog output */
u16 reg = inw(emu->port + A_IOCFG);
outw(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG);
}
if (emu->address_mode == 0) {
/* use 16M in 4G */
outl(inl(emu->port + HCFG) | HCFG_EXPANDED_MEM, emu->port + HCFG);
}
return 0;
}
static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu)
{
/*
* Enable the audio bit
*/
outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG);
/* Enable analog/digital outs on audigy */
if (emu->card_capabilities->emu_model) {
; /* Disable all access to A_IOCFG for the emu1010 */
} else if (emu->card_capabilities->i2c_adc) {
; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
} else if (emu->audigy) {
outw(inw(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG);
if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
/* Unmute Analog now. Set GPO6 to 1 for Apollo.
* This has to be done after init ALice3 I2SOut beyond 48KHz.
* So, sequence is important. */
outw(inw(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG);
} else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */
/* Unmute Analog now. */
outw(inw(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG);
} else {
/* Disable routing from AC97 line out to Front speakers */
outw(inw(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG);
}
}
#if 0
{
unsigned int tmp;
/* FIXME: the following routine disables LiveDrive-II !! */
/* TOSLink detection */
emu->tos_link = 0;
tmp = inl(emu->port + HCFG);
if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
outl(tmp|0x800, emu->port + HCFG);
udelay(50);
if (tmp != (inl(emu->port + HCFG) & ~0x800)) {
emu->tos_link = 1;
outl(tmp, emu->port + HCFG);
}
}
}
#endif
if (emu->card_capabilities->emu_model)
snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE | INTE_A_GPIOENABLE);
else
snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE);
}
int snd_emu10k1_done(struct snd_emu10k1 *emu)
{
int ch;
outl(0, emu->port + INTE);
/*
* Shutdown the voices
*/
for (ch = 0; ch < NUM_G; ch++) {
snd_emu10k1_ptr_write_multiple(emu, ch,
DCYSUSV, 0,
VTFT, 0,
CVCF, 0,
PTRX, 0,
CPF, 0,
REGLIST_END);
}
// stop the DSP
if (emu->audigy)
snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP);
else
snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP);
snd_emu10k1_ptr_write_multiple(emu, 0,
/* reset recording buffers */
MICBS, 0,
MICBA, 0,
FXBS, 0,
FXBA, 0,
FXWC, 0,
ADCBS, ADCBS_BUFSIZE_NONE,
ADCBA, 0,
TCBS, TCBS_BUFFSIZE_16K,
TCB, 0,
/* disable channel interrupt */
CLIEL, 0,
CLIEH, 0,
SOLEL, 0,
SOLEH, 0,
PTB, 0,
REGLIST_END);
/* disable audio and lock cache */
outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
return 0;
}
/*************************************************************************
* ECARD functional implementation
*************************************************************************/
/* In A1 Silicon, these bits are in the HC register */
#define HOOKN_BIT (1L << 12)
#define HANDN_BIT (1L << 11)
#define PULSEN_BIT (1L << 10)
#define EC_GDI1 (1 << 13)
#define EC_GDI0 (1 << 14)
#define EC_NUM_CONTROL_BITS 20
#define EC_AC3_DATA_SELN 0x0001L
#define EC_EE_DATA_SEL 0x0002L
#define EC_EE_CNTRL_SELN 0x0004L
#define EC_EECLK 0x0008L
#define EC_EECS 0x0010L
#define EC_EESDO 0x0020L
#define EC_TRIM_CSN 0x0040L
#define EC_TRIM_SCLK 0x0080L
#define EC_TRIM_SDATA 0x0100L
#define EC_TRIM_MUTEN 0x0200L
#define EC_ADCCAL 0x0400L
#define EC_ADCRSTN 0x0800L
#define EC_DACCAL 0x1000L
#define EC_DACMUTEN 0x2000L
#define EC_LEDN 0x4000L
#define EC_SPDIF0_SEL_SHIFT 15
#define EC_SPDIF1_SEL_SHIFT 17
#define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT)
#define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT)
#define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
#define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
#define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should
* be incremented any time the EEPROM's
* format is changed. */
#define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */
/* Addresses for special values stored in to EEPROM */
#define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */
#define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */
#define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */
#define EC_LAST_PROMFILE_ADDR 0x2f
#define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The
* can be up to 30 characters in length
* and is stored as a NULL-terminated
* ASCII string. Any unused bytes must be
* filled with zeros */
#define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */
/* Most of this stuff is pretty self-evident. According to the hardware
* dudes, we need to leave the ADCCAL bit low in order to avoid a DC
* offset problem. Weird.
*/
#define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
EC_TRIM_CSN)
#define EC_DEFAULT_ADC_GAIN 0xC4C4
#define EC_DEFAULT_SPDIF0_SEL 0x0
#define EC_DEFAULT_SPDIF1_SEL 0x4
/**************************************************************************
* @func Clock bits into the Ecard's control latch. The Ecard uses a
* control latch will is loaded bit-serially by toggling the Modem control
* lines from function 2 on the E8010. This function hides these details
* and presents the illusion that we are actually writing to a distinct
* register.
*/
static void snd_emu10k1_ecard_write(struct snd_emu10k1 *emu, unsigned int value)
{
unsigned short count;
unsigned int data;
unsigned long hc_port;
unsigned int hc_value;
hc_port = emu->port + HCFG;
hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT);
outl(hc_value, hc_port);
for (count = 0; count < EC_NUM_CONTROL_BITS; count++) {
/* Set up the value */
data = ((value & 0x1) ? PULSEN_BIT : 0);
value >>= 1;
outl(hc_value | data, hc_port);
/* Clock the shift register */
outl(hc_value | data | HANDN_BIT, hc_port);
outl(hc_value | data, hc_port);
}
/* Latch the bits */
outl(hc_value | HOOKN_BIT, hc_port);
outl(hc_value, hc_port);
}
/**************************************************************************
* @func Set the gain of the ECARD's CS3310 Trim/gain controller. The
* trim value consists of a 16bit value which is composed of two
* 8 bit gain/trim values, one for the left channel and one for the
* right channel. The following table maps from the Gain/Attenuation
* value in decibels into the corresponding bit pattern for a single
* channel.
*/
static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 *emu,
unsigned short gain)
{
unsigned int bit;
/* Enable writing to the TRIM registers */
snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
/* Do it again to insure that we meet hold time requirements */
snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
for (bit = (1 << 15); bit; bit >>= 1) {
unsigned int value;
value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA);
if (gain & bit)
value |= EC_TRIM_SDATA;
/* Clock the bit */
snd_emu10k1_ecard_write(emu, value);
snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK);
snd_emu10k1_ecard_write(emu, value);
}
snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
}
static int snd_emu10k1_ecard_init(struct snd_emu10k1 *emu)
{
unsigned int hc_value;
/* Set up the initial settings */
emu->ecard_ctrl = EC_RAW_RUN_MODE |
EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) |
EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL);
/* Step 0: Set the codec type in the hardware control register
* and enable audio output */
hc_value = inl(emu->port + HCFG);
outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG);
inl(emu->port + HCFG);
/* Step 1: Turn off the led and deassert TRIM_CS */
snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
/* Step 2: Calibrate the ADC and DAC */
snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN);
/* Step 3: Wait for awhile; XXX We can't get away with this
* under a real operating system; we'll need to block and wait that
* way. */
snd_emu10k1_wait(emu, 48000);
/* Step 4: Switch off the DAC and ADC calibration. Note
* That ADC_CAL is actually an inverted signal, so we assert
* it here to stop calibration. */
snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
/* Step 4: Switch into run mode */
snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
/* Step 5: Set the analog input gain */
snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN);
return 0;
}
static int snd_emu10k1_cardbus_init(struct snd_emu10k1 *emu)
{
unsigned long special_port;
__always_unused unsigned int value;
/* Special initialisation routine
* before the rest of the IO-Ports become active.
*/
special_port = emu->port + 0x38;
value = inl(special_port);
outl(0x00d00000, special_port);
value = inl(special_port);
outl(0x00d00001, special_port);
value = inl(special_port);
outl(0x00d0005f, special_port);
value = inl(special_port);
outl(0x00d0007f, special_port);
value = inl(special_port);
outl(0x0090007f, special_port);
value = inl(special_port);
snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */
/* Delay to give time for ADC chip to switch on. It needs 113ms */
msleep(200);
return 0;
}
static int snd_emu1010_load_firmware_entry(struct snd_emu10k1 *emu,
const struct firmware *fw_entry)
{
int n, i;
u16 reg;
u8 value;
__always_unused u16 write_post;
if (!fw_entry)
return -EIO;
/* The FPGA is a Xilinx Spartan IIE XC2S50E */
/* On E-MU 0404b it is a Xilinx Spartan III XC3S50 */
/* GPIO7 -> FPGA PGMN
* GPIO6 -> FPGA CCLK
* GPIO5 -> FPGA DIN
* FPGA CONFIG OFF -> FPGA PGMN
*/
spin_lock_irq(&emu->emu_lock);
outw(0x00, emu->port + A_GPIO); /* Set PGMN low for 100uS. */
write_post = inw(emu->port + A_GPIO);
udelay(100);
outw(0x80, emu->port + A_GPIO); /* Leave bit 7 set during netlist setup. */
write_post = inw(emu->port + A_GPIO);
udelay(100); /* Allow FPGA memory to clean */
for (n = 0; n < fw_entry->size; n++) {
value = fw_entry->data[n];
for (i = 0; i < 8; i++) {
reg = 0x80;
if (value & 0x1)
reg = reg | 0x20;
value = value >> 1;
outw(reg, emu->port + A_GPIO);
write_post = inw(emu->port + A_GPIO);
outw(reg | 0x40, emu->port + A_GPIO);
write_post = inw(emu->port + A_GPIO);
}
}
/* After programming, set GPIO bit 4 high again. */
outw(0x10, emu->port + A_GPIO);
write_post = inw(emu->port + A_GPIO);
spin_unlock_irq(&emu->emu_lock);
return 0;
}
/* firmware file names, per model, init-fw and dock-fw (optional) */
static const char * const firmware_names[5][2] = {
[EMU_MODEL_EMU1010] = {
HANA_FILENAME, DOCK_FILENAME
},
[EMU_MODEL_EMU1010B] = {
EMU1010B_FILENAME, MICRO_DOCK_FILENAME
},
[EMU_MODEL_EMU1616] = {
EMU1010_NOTEBOOK_FILENAME, MICRO_DOCK_FILENAME
},
[EMU_MODEL_EMU0404] = {
EMU0404_FILENAME, NULL
},
};
static int snd_emu1010_load_firmware(struct snd_emu10k1 *emu, int dock,
const struct firmware **fw)
{
const char *filename;
int err;
if (!*fw) {
filename = firmware_names[emu->card_capabilities->emu_model][dock];
if (!filename)
return 0;
err = request_firmware(fw, filename, &emu->pci->dev);
if (err)
return err;
}
return snd_emu1010_load_firmware_entry(emu, *fw);
}
static void emu1010_firmware_work(struct work_struct *work)
{
struct snd_emu10k1 *emu;
u32 tmp, tmp2, reg;
int err;
emu = container_of(work, struct snd_emu10k1,
emu1010.firmware_work);
if (emu->card->shutdown)
return;
#ifdef CONFIG_PM_SLEEP
if (emu->suspend)
return;
#endif
snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®); /* OPTIONS: Which cards are attached to the EMU */
if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) {
/* Audio Dock attached */
/* Return to Audio Dock programming mode */
dev_info(emu->card->dev,
"emu1010: Loading Audio Dock Firmware\n");
snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG,
EMU_HANA_FPGA_CONFIG_AUDIODOCK);
err = snd_emu1010_load_firmware(emu, 1, &emu->dock_fw);
if (err < 0)
return;
snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0);
snd_emu1010_fpga_read(emu, EMU_HANA_ID, &tmp);
dev_info(emu->card->dev,
"emu1010: EMU_HANA+DOCK_ID = 0x%x\n", tmp);
if ((tmp & 0x1f) != 0x15) {
/* FPGA failed to be programmed */
dev_info(emu->card->dev,
"emu1010: Loading Audio Dock Firmware file failed, reg = 0x%x\n",
tmp);
return;
}
dev_info(emu->card->dev,
"emu1010: Audio Dock Firmware loaded\n");
snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp);
snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2);
dev_info(emu->card->dev, "Audio Dock ver: %u.%u\n", tmp, tmp2);
/* Sync clocking between 1010 and Dock */
/* Allow DLL to settle */
msleep(10);
/* Unmute all. Default is muted after a firmware load */
snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
}
}
static void emu1010_clock_work(struct work_struct *work)
{
struct snd_emu10k1 *emu;
struct snd_ctl_elem_id id;
emu = container_of(work, struct snd_emu10k1,
emu1010.clock_work);
if (emu->card->shutdown)
return;
#ifdef CONFIG_PM_SLEEP
if (emu->suspend)
return;
#endif
spin_lock_irq(&emu->reg_lock);
// This is the only thing that can actually happen.
emu->emu1010.clock_source = emu->emu1010.clock_fallback;
emu->emu1010.wclock = 1 - emu->emu1010.clock_source;
snd_emu1010_update_clock(emu);
spin_unlock_irq(&emu->reg_lock);
snd_ctl_build_ioff(&id, emu->ctl_clock_source, 0);
snd_ctl_notify(emu->card, SNDRV_CTL_EVENT_MASK_VALUE, &id);
}
static void emu1010_interrupt(struct snd_emu10k1 *emu)
{
u32 sts;
snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &sts);
if (sts & EMU_HANA_IRQ_DOCK_LOST) {
/* Audio Dock removed */
dev_info(emu->card->dev, "emu1010: Audio Dock detached\n");
/* The hardware auto-mutes all, so we unmute again */
snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
} else if (sts & EMU_HANA_IRQ_DOCK) {
schedule_work(&emu->emu1010.firmware_work);
}
if (sts & EMU_HANA_IRQ_WCLK_CHANGED)
schedule_work(&emu->emu1010.clock_work);
}
/*
* Current status of the driver:
* ----------------------------
* * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz)
* * PCM device nb. 2:
* 16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops
* 16 x 32-bit capture - snd_emu10k1_capture_efx_ops
*/
static int snd_emu10k1_emu1010_init(struct snd_emu10k1 *emu)
{
u32 tmp, tmp2, reg;
int err;
dev_info(emu->card->dev, "emu1010: Special config.\n");
/* Mute, and disable audio and lock cache, just in case.
* Proper init follows in snd_emu10k1_init(). */
outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK, emu->port + HCFG);
/* Disable 48Volt power to Audio Dock */
snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
/* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */
snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®);
dev_dbg(emu->card->dev, "reg1 = 0x%x\n", reg);
if ((reg & 0x3f) == 0x15) {
/* FPGA netlist already present so clear it */
/* Return to programming mode */
snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_HANA);
}
snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®);
dev_dbg(emu->card->dev, "reg2 = 0x%x\n", reg);
if ((reg & 0x3f) == 0x15) {
/* FPGA failed to return to programming mode */
dev_info(emu->card->dev,
"emu1010: FPGA failed to return to programming mode\n");
return -ENODEV;
}
dev_info(emu->card->dev, "emu1010: EMU_HANA_ID = 0x%x\n", reg);
err = snd_emu1010_load_firmware(emu, 0, &emu->firmware);
if (err < 0) {
dev_info(emu->card->dev, "emu1010: Loading Firmware failed\n");
return err;
}
/* ID, should read & 0x7f = 0x55 when FPGA programmed. */
snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®);
if ((reg & 0x3f) != 0x15) {
/* FPGA failed to be programmed */
dev_info(emu->card->dev,
"emu1010: Loading Hana Firmware file failed, reg = 0x%x\n",
reg);
return -ENODEV;
}
dev_info(emu->card->dev, "emu1010: Hana Firmware loaded\n");
snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp);
snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2);
dev_info(emu->card->dev, "emu1010: Hana version: %u.%u\n", tmp, tmp2);
/* Enable 48Volt power to Audio Dock */
snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON);
snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®);
dev_info(emu->card->dev, "emu1010: Card options = 0x%x\n", reg);
if (reg & EMU_HANA_OPTION_DOCK_OFFLINE)
schedule_work(&emu->emu1010.firmware_work);
if (emu->card_capabilities->no_adat) {
emu->emu1010.optical_in = 0; /* IN_SPDIF */
emu->emu1010.optical_out = 0; /* OUT_SPDIF */
} else {
/* Optical -> ADAT I/O */
emu->emu1010.optical_in = 1; /* IN_ADAT */
emu->emu1010.optical_out = 1; /* OUT_ADAT */
}
tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : EMU_HANA_OPTICAL_IN_SPDIF) |
(emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : EMU_HANA_OPTICAL_OUT_SPDIF);
snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp);
/* Set no attenuation on Audio Dock pads. */
emu->emu1010.adc_pads = 0x00;
snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, emu->emu1010.adc_pads);
/* Unmute Audio dock DACs, Headphone source DAC-4. */
snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, EMU_HANA_DOCK_PHONES_192_DAC4);
/* DAC PADs. */
emu->emu1010.dac_pads = EMU_HANA_DOCK_DAC_PAD1 | EMU_HANA_DOCK_DAC_PAD2 |
EMU_HANA_DOCK_DAC_PAD3 | EMU_HANA_DOCK_DAC_PAD4;
snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, emu->emu1010.dac_pads);
/* SPDIF Format. Set Consumer mode, 24bit, copy enable */
snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, EMU_HANA_SPDIF_MODE_RX_INVALID);
/* MIDI routing */
snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, EMU_HANA_MIDI_INA_FROM_HAMOA | EMU_HANA_MIDI_INB_FROM_DOCK2);
snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, EMU_HANA_MIDI_OUT_DOCK2 | EMU_HANA_MIDI_OUT_SYNC2);
emu->gpio_interrupt = emu1010_interrupt;
// Note: The Audigy INTE is set later
snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE,
EMU_HANA_IRQ_DOCK | EMU_HANA_IRQ_DOCK_LOST | EMU_HANA_IRQ_WCLK_CHANGED);
snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, ®); // Clear pending IRQs
emu->emu1010.clock_source = 1; /* 48000 */
emu->emu1010.clock_fallback = 1; /* 48000 */
/* Default WCLK set to 48kHz. */
snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, EMU_HANA_DEFCLOCK_48K);
/* Word Clock source, Internal 48kHz x1 */
emu->emu1010.wclock = EMU_HANA_WCLOCK_INT_48K;
snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K);
/* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
snd_emu1010_update_clock(emu);
// The routes are all set to EMU_SRC_SILENCE due to the reset,
// so it is safe to simply enable the outputs.
snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
return 0;
}
/*
* Create the EMU10K1 instance
*/
#ifdef CONFIG_PM_SLEEP
static int alloc_pm_buffer(struct snd_emu10k1 *emu);
static void free_pm_buffer(struct snd_emu10k1 *emu);
#endif
static void snd_emu10k1_free(struct snd_card *card)
{
struct snd_emu10k1 *emu = card->private_data;
if (emu->port) { /* avoid access to already used hardware */
snd_emu10k1_fx8010_tram_setup(emu, 0);
snd_emu10k1_done(emu);
snd_emu10k1_free_efx(emu);
}
if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1010) {
/* Disable 48Volt power to Audio Dock */
snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
}
cancel_work_sync(&emu->emu1010.firmware_work);
cancel_work_sync(&emu->emu1010.clock_work);
release_firmware(emu->firmware);
release_firmware(emu->dock_fw);
snd_util_memhdr_free(emu->memhdr);
if (emu->silent_page.area)
snd_dma_free_pages(&emu->silent_page);
if (emu->ptb_pages.area)
snd_dma_free_pages(&emu->ptb_pages);
vfree(emu->page_ptr_table);
vfree(emu->page_addr_table);
#ifdef CONFIG_PM_SLEEP
free_pm_buffer(emu);
#endif
}
static const struct snd_emu_chip_details emu_chip_details[] = {
/* Audigy 5/Rx SB1550 */
/* Tested by [email protected] 28 Mar 2015 */
/* DSP: CA10300-IAT LF
* DAC: Cirrus Logic CS4382-KQZ
* ADC: Philips 1361T
* AC97: Sigmatel STAC9750
* CA0151: None
*/
{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10241102,
.driver = "Audigy2", .name = "SB Audigy 5/Rx [SB1550]",
.id = "Audigy2",
.emu10k2_chip = 1,
.ca0108_chip = 1,
.spk71 = 1,
.adc_1361t = 1, /* 24 bit capture instead of 16bit */
.ac97_chip = 1},
/* Audigy4 (Not PRO) SB0610 */
/* Tested by [email protected] 4th April 2006 */
/* A_IOCFG bits
* Output
* 0: ?
* 1: ?
* 2: ?
* 3: 0 - Digital Out, 1 - Line in
* 4: ?
* 5: ?
* 6: ?
* 7: ?
* Input
* 8: ?
* 9: ?
* A: Green jack sense (Front)
* B: ?
* C: Black jack sense (Rear/Side Right)
* D: Yellow jack sense (Center/LFE/Side Left)
* E: ?
* F: ?
*
* Digital Out/Line in switch using A_IOCFG bit 3 (0x08)
* 0 - Digital Out
* 1 - Line in
*/
/* Mic input not tested.
* Analog CD input not tested
* Digital Out not tested.
* Line in working.
* Audio output 5.1 working. Side outputs not working.
*/
/* DSP: CA10300-IAT LF
* DAC: Cirrus Logic CS4382-KQZ
* ADC: Philips 1361T
* AC97: Sigmatel STAC9750
* CA0151: None
*/
{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102,
.driver = "Audigy2", .name = "SB Audigy 4 [SB0610]",
.id = "Audigy2",
.emu10k2_chip = 1,
.ca0108_chip = 1,
.spk71 = 1,
.adc_1361t = 1, /* 24 bit capture instead of 16bit */
.ac97_chip = 1} ,
/* Audigy 2 Value AC3 out does not work yet.
* Need to find out how to turn off interpolators.
*/
/* Tested by [email protected] 3rd July 2005 */
/* DSP: CA0108-IAT
* DAC: CS4382-KQ
* ADC: Philips 1361T
* AC97: STAC9750
* CA0151: None
*/
/*
* A_IOCFG Input (GPIO)
* 0x400 = Front analog jack plugged in. (Green socket)
* 0x1000 = Rear analog jack plugged in. (Black socket)
* 0x2000 = Center/LFE analog jack plugged in. (Orange socket)
* A_IOCFG Output (GPIO)
* 0x60 = Sound out of front Left.
* Win sets it to 0xXX61
*/
{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
.driver = "Audigy2", .name = "SB Audigy 2 Value [SB0400]",
.id = "Audigy2",
.emu10k2_chip = 1,
.ca0108_chip = 1,
.spk71 = 1,
.ac97_chip = 1} ,
/* Audigy 2 ZS Notebook Cardbus card.*/
/* Tested by [email protected] 6th November 2006 */
/* Audio output 7.1/Headphones working.
* Digital output working. (AC3 not checked, only PCM)
* Audio Mic/Line inputs working.
* Digital input not tested.
*/
/* DSP: Tina2
* DAC: Wolfson WM8768/WM8568
* ADC: Wolfson WM8775
* AC97: None
* CA0151: None
*/
/* Tested by [email protected] 4th April 2006 */
/* A_IOCFG bits
* Output
* 0: Not Used
* 1: 0 = Mute all the 7.1 channel out. 1 = unmute.
* 2: Analog input 0 = line in, 1 = mic in
* 3: Not Used
* 4: Digital output 0 = off, 1 = on.
* 5: Not Used
* 6: Not Used
* 7: Not Used
* Input
* All bits 1 (0x3fxx) means nothing plugged in.
* 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing.
* A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing.
* C-D: 2 = Front/Rear/etc, 3 = nothing.
* E-F: Always 0
*
*/
{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102,
.driver = "Audigy2", .name = "Audigy 2 ZS Notebook [SB0530]",
.id = "Audigy2",
.emu10k2_chip = 1,
.ca0108_chip = 1,
.ca_cardbus_chip = 1,
.spi_dac = 1,
.i2c_adc = 1,
.spk71 = 1} ,
/* This is MAEM8950 "Mana" */
/* Attach MicroDock[M] to make it an E-MU 1616[m]. */
/* Does NOT support sync daughter card (obviously). */
/* Tested by [email protected] 4th Nov 2007. */
{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102,
.driver = "Audigy2", .name = "E-MU 02 CardBus [MAEM8950]",
.id = "EMU1010",
.emu10k2_chip = 1,
.ca0108_chip = 1,
.ca_cardbus_chip = 1,
.spk71 = 1 ,
.emu_model = EMU_MODEL_EMU1616},
/* Tested by [email protected] 4th Nov 2007. */
/* This is MAEM8960 "Hana3", 0202 is MAEM8980 */
/* Attach 0202 daughter card to make it an E-MU 1212m, OR a
* MicroDock[M] to make it an E-MU 1616[m]. */
/* Does NOT support sync daughter card. */
{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102,
.driver = "Audigy2", .name = "E-MU 1010b PCI [MAEM8960]",
.id = "EMU1010",
.emu10k2_chip = 1,
.ca0108_chip = 1,
.spk71 = 1,
.emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 new revision */
/* Tested by Maxim Kachur <[email protected]> 17th Oct 2012. */
/* This is MAEM8986, 0202 is MAEM8980 */
/* Attach 0202 daughter card to make it an E-MU 1212m, OR a
* MicroDockM to make it an E-MU 1616m. The non-m
* version was never sold with this card, but should
* still work. */
/* Does NOT support sync daughter card. */
{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40071102,
.driver = "Audigy2", .name = "E-MU 1010 PCIe [MAEM8986]",
.id = "EMU1010",
.emu10k2_chip = 1,
.ca0108_chip = 1,
.spk71 = 1,
.emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 PCIe */
/* Tested by [email protected] 8th July 2005. */
/* This is MAEM8810 "Hana", 0202 is MAEM8820 "Hamoa" */
/* Attach 0202 daughter card to make it an E-MU 1212m, OR an
* AudioDock[M] to make it an E-MU 1820[m]. */
/* Supports sync daughter card. */
{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102,
.driver = "Audigy2", .name = "E-MU 1010 [MAEM8810]",
.id = "EMU1010",
.emu10k2_chip = 1,
.ca0102_chip = 1,
.spk71 = 1,
.emu_model = EMU_MODEL_EMU1010}, /* EMU 1010 old revision */
/* This is MAEM8852 "HanaLiteLite" */
/* Supports sync daughter card. */
/* Tested by [email protected] Mar 2023. */
{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40021102,
.driver = "Audigy2", .name = "E-MU 0404b PCI [MAEM8852]",
.id = "EMU0404",
.emu10k2_chip = 1,
.ca0108_chip = 1,
.spk20 = 1,
.no_adat = 1,
.emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 new revision */
/* This is MAEM8850 "HanaLite" */
/* Supports sync daughter card. */
/* Tested by [email protected] 20-3-2007. */
{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40021102,
.driver = "Audigy2", .name = "E-MU 0404 [MAEM8850]",
.id = "EMU0404",
.emu10k2_chip = 1,
.ca0102_chip = 1,
.spk20 = 1,
.no_adat = 1,
.emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 */
/* EMU0404 PCIe */
/* Does NOT support sync daughter card. */
{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40051102,
.driver = "Audigy2", .name = "E-MU 0404 PCIe [MAEM8984]",
.id = "EMU0404",
.emu10k2_chip = 1,
.ca0108_chip = 1,
.spk20 = 1,
.no_adat = 1,
.emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 PCIe ver_03 */
{.vendor = 0x1102, .device = 0x0008,
.driver = "Audigy2", .name = "SB Audigy 2 Value [Unknown]",
.id = "Audigy2",
.emu10k2_chip = 1,
.ca0108_chip = 1,
.ac97_chip = 1} ,
/* Tested by [email protected] 3rd July 2005 */
{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102,
.driver = "Audigy2", .name = "SB Audigy 4 PRO [SB0380]",
.id = "Audigy2",
.emu10k2_chip = 1,
.ca0102_chip = 1,
.ca0151_chip = 1,
.spk71 = 1,
.spdif_bug = 1,
.ac97_chip = 1} ,
/* Tested by [email protected] 5th Nov 2005 */
/* The 0x20061102 does have SB0350 written on it
* Just like 0x20021102
*/
{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102,
.driver = "Audigy2", .name = "SB Audigy 2 [SB0350b]",
.id = "Audigy2",
.emu10k2_chip = 1,
.ca0102_chip = 1,
.ca0151_chip = 1,
.spk71 = 1,
.spdif_bug = 1,
.invert_shared_spdif = 1, /* digital/analog switch swapped */
.ac97_chip = 1} ,
/* 0x20051102 also has SB0350 written on it, treated as Audigy 2 ZS by
Creative's Windows driver */
{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20051102,
.driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350a]",
.id = "Audigy2",
.emu10k2_chip = 1,
.ca0102_chip = 1,
.ca0151_chip = 1,
.spk71 = 1,
.spdif_bug = 1,
.invert_shared_spdif = 1, /* digital/analog switch swapped */
.ac97_chip = 1} ,
{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102,
.driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350]",
.id = "Audigy2",
.emu10k2_chip = 1,
.ca0102_chip = 1,
.ca0151_chip = 1,
.spk71 = 1,
.spdif_bug = 1,
.invert_shared_spdif = 1, /* digital/analog switch swapped */
.ac97_chip = 1} ,
{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102,
.driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0360]",
.id = "Audigy2",
.emu10k2_chip = 1,
.ca0102_chip = 1,
.ca0151_chip = 1,
.spk71 = 1,
.spdif_bug = 1,
.invert_shared_spdif = 1, /* digital/analog switch swapped */
.ac97_chip = 1} ,
/* Audigy 2 */
/* Tested by [email protected] 3rd July 2005 */
/* DSP: CA0102-IAT
* DAC: CS4382-KQ
* ADC: Philips 1361T
* AC97: STAC9721
* CA0151: Yes
*/
{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102,
.driver = "Audigy2", .name = "SB Audigy 2 [SB0240]",
.id = "Audigy2",
.emu10k2_chip = 1,
.ca0102_chip = 1,
.ca0151_chip = 1,
.spk71 = 1,
.spdif_bug = 1,
.adc_1361t = 1, /* 24 bit capture instead of 16bit */
.ac97_chip = 1} ,
/* Audigy 2 Platinum EX */
/* Win driver sets A_IOCFG output to 0x1c00 */
{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
.driver = "Audigy2", .name = "Audigy 2 Platinum EX [SB0280]",
.id = "Audigy2",
.emu10k2_chip = 1,
.ca0102_chip = 1,
.ca0151_chip = 1,
.spk71 = 1,
.spdif_bug = 1} ,
/* Dell OEM/Creative Labs Audigy 2 ZS */
/* See ALSA bug#1365 */
{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102,
.driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0353]",
.id = "Audigy2",
.emu10k2_chip = 1,
.ca0102_chip = 1,
.ca0151_chip = 1,
.spk71 = 1,
.spdif_bug = 1,
.invert_shared_spdif = 1, /* digital/analog switch swapped */
.ac97_chip = 1} ,
/* Audigy 2 Platinum */
/* Win driver sets A_IOCFG output to 0xa00 */
{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
.driver = "Audigy2", .name = "SB Audigy 2 Platinum [SB0240P]",
.id = "Audigy2",
.emu10k2_chip = 1,
.ca0102_chip = 1,
.ca0151_chip = 1,
.spk71 = 1,
.spdif_bug = 1,
.invert_shared_spdif = 1, /* digital/analog switch swapped */
.adc_1361t = 1, /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */
.ac97_chip = 1} ,
{.vendor = 0x1102, .device = 0x0004, .revision = 0x04,
.driver = "Audigy2", .name = "SB Audigy 2 [Unknown]",
.id = "Audigy2",
.emu10k2_chip = 1,
.ca0102_chip = 1,
.ca0151_chip = 1,
.spdif_bug = 1,
.ac97_chip = 1} ,
{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102,
.driver = "Audigy", .name = "SB Audigy 1 [SB0092]",
.id = "Audigy",
.emu10k2_chip = 1,
.ca0102_chip = 1,
.ac97_chip = 1} ,
{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102,
.driver = "Audigy", .name = "SB Audigy 1 ES [SB0160]",
.id = "Audigy",
.emu10k2_chip = 1,
.ca0102_chip = 1,
.spdif_bug = 1,
.ac97_chip = 1} ,
{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102,
.driver = "Audigy", .name = "SB Audigy 1 [SB0090]",
.id = "Audigy",
.emu10k2_chip = 1,
.ca0102_chip = 1,
.ac97_chip = 1} ,
{.vendor = 0x1102, .device = 0x0004,
.driver = "Audigy", .name = "Audigy 1 [Unknown]",
.id = "Audigy",
.emu10k2_chip = 1,
.ca0102_chip = 1,
.ac97_chip = 1} ,
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102,
.driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
.id = "Live",
.emu10k1_chip = 1,
.ac97_chip = 1,
.sblive51 = 1} ,
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806b1102,
.driver = "EMU10K1", .name = "SB Live! [SB0105]",
.id = "Live",
.emu10k1_chip = 1,
.ac97_chip = 1,
.sblive51 = 1} ,
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806a1102,
.driver = "EMU10K1", .name = "SB Live! Value [SB0103]",
.id = "Live",
.emu10k1_chip = 1,
.ac97_chip = 1,
.sblive51 = 1} ,
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102,
.driver = "EMU10K1", .name = "SB Live! Value [SB0101]",
.id = "Live",
.emu10k1_chip = 1,
.ac97_chip = 1,
.sblive51 = 1} ,
/* Tested by ALSA bug#1680 26th December 2005 */
/* note: It really has SB0220 written on the card, */
/* but it's SB0228 according to kx.inf */
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102,
.driver = "EMU10K1", .name = "SB Live! 5.1 Dell OEM [SB0228]",
.id = "Live",
.emu10k1_chip = 1,
.ac97_chip = 1,
.sblive51 = 1} ,
/* Tested by Thomas Zehetbauer 27th Aug 2005 */
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102,
.driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
.id = "Live",
.emu10k1_chip = 1,
.ac97_chip = 1,
.sblive51 = 1} ,
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102,
.driver = "EMU10K1", .name = "SB Live! 5.1",
.id = "Live",
.emu10k1_chip = 1,
.ac97_chip = 1,
.sblive51 = 1} ,
/* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102,
.driver = "EMU10K1", .name = "SB Live! 5.1 [SB0060]",
.id = "Live",
.emu10k1_chip = 1,
.ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum
* share the same IDs!
*/
.sblive51 = 1} ,
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102,
.driver = "EMU10K1", .name = "SB Live! Value [CT4850]",
.id = "Live",
.emu10k1_chip = 1,
.ac97_chip = 1,
.sblive51 = 1} ,
/* SB Live! Platinum */
/* Win driver sets A_IOCFG output to 0 */
/* Tested by Jonathan Dowland <[email protected]> Apr 2023. */
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102,
.driver = "EMU10K1", .name = "SB Live! Platinum [CT4760P]",
.id = "Live",
.emu10k1_chip = 1,
.ac97_chip = 1} ,
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102,
.driver = "EMU10K1", .name = "SB Live! Value [CT4871]",
.id = "Live",
.emu10k1_chip = 1,
.ac97_chip = 1,
.sblive51 = 1} ,
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102,
.driver = "EMU10K1", .name = "SB Live! Value [CT4831]",
.id = "Live",
.emu10k1_chip = 1,
.ac97_chip = 1,
.sblive51 = 1} ,
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102,
.driver = "EMU10K1", .name = "SB Live! Value [CT4870]",
.id = "Live",
.emu10k1_chip = 1,
.ac97_chip = 1,
.sblive51 = 1} ,
/* Tested by [email protected] 3rd July 2005 */
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102,
.driver = "EMU10K1", .name = "SB Live! Value [CT4832]",
.id = "Live",
.emu10k1_chip = 1,
.ac97_chip = 1,
.sblive51 = 1} ,
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102,
.driver = "EMU10K1", .name = "SB Live! Value [CT4830]",
.id = "Live",
.emu10k1_chip = 1,
.ac97_chip = 1,
.sblive51 = 1} ,
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102,
.driver = "EMU10K1", .name = "SB PCI512 [CT4790]",
.id = "Live",
.emu10k1_chip = 1,
.ac97_chip = 1,
.sblive51 = 1} ,
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102,
.driver = "EMU10K1", .name = "SB Live! Value [CT4780]",
.id = "Live",
.emu10k1_chip = 1,
.ac97_chip = 1,
.sblive51 = 1} ,
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102,
.driver = "EMU10K1", .name = "E-MU APS [PC545]",
.id = "APS",
.emu10k1_chip = 1,
.ecard = 1} ,
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102,
.driver = "EMU10K1", .name = "SB Live! [CT4620]",
.id = "Live",
.emu10k1_chip = 1,
.ac97_chip = 1,
.sblive51 = 1} ,
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102,
.driver = "EMU10K1", .name = "SB Live! Value [CT4670]",
.id = "Live",
.emu10k1_chip = 1,
.ac97_chip = 1,
.sblive51 = 1} ,
{.vendor = 0x1102, .device = 0x0002,
.driver = "EMU10K1", .name = "SB Live! [Unknown]",
.id = "Live",
.emu10k1_chip = 1,
.ac97_chip = 1,
.sblive51 = 1} ,
{ } /* terminator */
};
/*
* The chip (at least the Audigy 2 CA0102 chip, but most likely others, too)
* has a problem that from time to time it likes to do few DMA reads a bit
* beyond its normal allocation and gets very confused if these reads get
* blocked by a IOMMU.
*
* This behaviour has been observed for the first (reserved) page
* (for which it happens multiple times at every playback), often for various
* synth pages and sometimes for PCM playback buffers and the page table
* memory itself.
*
* As a workaround let's widen these DMA allocations by an extra page if we
* detect that the device is behind a non-passthrough IOMMU.
*/
static void snd_emu10k1_detect_iommu(struct snd_emu10k1 *emu)
{
struct iommu_domain *domain;
emu->iommu_workaround = false;
domain = iommu_get_domain_for_dev(emu->card->dev);
if (!domain || domain->type == IOMMU_DOMAIN_IDENTITY)
return;
dev_notice(emu->card->dev,
"non-passthrough IOMMU detected, widening DMA allocations");
emu->iommu_workaround = true;
}
int snd_emu10k1_create(struct snd_card *card,
struct pci_dev *pci,
unsigned short extin_mask,
unsigned short extout_mask,
long max_cache_bytes,
int enable_ir,
uint subsystem)
{
struct snd_emu10k1 *emu = card->private_data;
int idx, err;
int is_audigy;
size_t page_table_size;
__le32 *pgtbl;
unsigned int silent_page;
const struct snd_emu_chip_details *c;
/* enable PCI device */
err = pcim_enable_device(pci);
if (err < 0)
return err;
card->private_free = snd_emu10k1_free;
emu->card = card;
spin_lock_init(&emu->reg_lock);
spin_lock_init(&emu->emu_lock);
spin_lock_init(&emu->spi_lock);
spin_lock_init(&emu->i2c_lock);
spin_lock_init(&emu->voice_lock);
spin_lock_init(&emu->synth_lock);
spin_lock_init(&emu->memblk_lock);
mutex_init(&emu->fx8010.lock);
INIT_LIST_HEAD(&emu->mapped_link_head);
INIT_LIST_HEAD(&emu->mapped_order_link_head);
emu->pci = pci;
emu->irq = -1;
emu->synth = NULL;
emu->get_synth_voice = NULL;
INIT_WORK(&emu->emu1010.firmware_work, emu1010_firmware_work);
INIT_WORK(&emu->emu1010.clock_work, emu1010_clock_work);
/* read revision & serial */
emu->revision = pci->revision;
pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial);
pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model);
dev_dbg(card->dev,
"vendor = 0x%x, device = 0x%x, subsystem_vendor_id = 0x%x, subsystem_id = 0x%x\n",
pci->vendor, pci->device, emu->serial, emu->model);
for (c = emu_chip_details; c->vendor; c++) {
if (c->vendor == pci->vendor && c->device == pci->device) {
if (subsystem) {
if (c->subsystem && (c->subsystem == subsystem))
break;
else
continue;
} else {
if (c->subsystem && (c->subsystem != emu->serial))
continue;
if (c->revision && c->revision != emu->revision)
continue;
}
break;
}
}
if (c->vendor == 0) {
dev_err(card->dev, "emu10k1: Card not recognised\n");
return -ENOENT;
}
emu->card_capabilities = c;
if (c->subsystem && !subsystem)
dev_dbg(card->dev, "Sound card name = %s\n", c->name);
else if (subsystem)
dev_dbg(card->dev, "Sound card name = %s, "
"vendor = 0x%x, device = 0x%x, subsystem = 0x%x. "
"Forced to subsystem = 0x%x\n", c->name,
pci->vendor, pci->device, emu->serial, c->subsystem);
else
dev_dbg(card->dev, "Sound card name = %s, "
"vendor = 0x%x, device = 0x%x, subsystem = 0x%x.\n",
c->name, pci->vendor, pci->device,
emu->serial);
if (!*card->id && c->id)
strscpy(card->id, c->id, sizeof(card->id));
is_audigy = emu->audigy = c->emu10k2_chip;
snd_emu10k1_detect_iommu(emu);
/* set addressing mode */
emu->address_mode = is_audigy ? 0 : 1;
/* set the DMA transfer mask */
emu->dma_mask = emu->address_mode ? EMU10K1_DMA_MASK : AUDIGY_DMA_MASK;
if (dma_set_mask_and_coherent(&pci->dev, emu->dma_mask) < 0) {
dev_err(card->dev,
"architecture does not support PCI busmaster DMA with mask 0x%lx\n",
emu->dma_mask);
return -ENXIO;
}
if (is_audigy)
emu->gpr_base = A_FXGPREGBASE;
else
emu->gpr_base = FXGPREGBASE;
err = pci_request_regions(pci, "EMU10K1");
if (err < 0)
return err;
emu->port = pci_resource_start(pci, 0);
emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT;
page_table_size = sizeof(u32) * (emu->address_mode ? MAXPAGES1 :
MAXPAGES0);
if (snd_emu10k1_alloc_pages_maybe_wider(emu, page_table_size,
&emu->ptb_pages) < 0)
return -ENOMEM;
dev_dbg(card->dev, "page table address range is %.8lx:%.8lx\n",
(unsigned long)emu->ptb_pages.addr,
(unsigned long)(emu->ptb_pages.addr + emu->ptb_pages.bytes));
emu->page_ptr_table = vmalloc(array_size(sizeof(void *),
emu->max_cache_pages));
emu->page_addr_table = vmalloc(array_size(sizeof(unsigned long),
emu->max_cache_pages));
if (!emu->page_ptr_table || !emu->page_addr_table)
return -ENOMEM;
if (snd_emu10k1_alloc_pages_maybe_wider(emu, EMUPAGESIZE,
&emu->silent_page) < 0)
return -ENOMEM;
dev_dbg(card->dev, "silent page range is %.8lx:%.8lx\n",
(unsigned long)emu->silent_page.addr,
(unsigned long)(emu->silent_page.addr +
emu->silent_page.bytes));
emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE);
if (!emu->memhdr)
return -ENOMEM;
emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) -
sizeof(struct snd_util_memblk);
pci_set_master(pci);
// The masks are not used for Audigy.
// FIXME: these should come from the card_capabilites table.
if (extin_mask == 0)
extin_mask = 0x3fcf; // EXTIN_*
if (extout_mask == 0)
extout_mask = 0x7fff; // EXTOUT_*
emu->fx8010.extin_mask = extin_mask;
emu->fx8010.extout_mask = extout_mask;
emu->enable_ir = enable_ir;
if (emu->card_capabilities->ca_cardbus_chip) {
err = snd_emu10k1_cardbus_init(emu);
if (err < 0)
return err;
}
if (emu->card_capabilities->ecard) {
err = snd_emu10k1_ecard_init(emu);
if (err < 0)
return err;
} else if (emu->card_capabilities->emu_model) {
err = snd_emu10k1_emu1010_init(emu);
if (err < 0)
return err;
} else {
/* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
does not support this, it shouldn't do any harm */
snd_emu10k1_ptr_write(emu, AC97SLOT, 0,
AC97SLOT_CNTR|AC97SLOT_LFE);
}
/* initialize TRAM setup */
emu->fx8010.itram_size = (16 * 1024)/2;
emu->fx8010.etram_pages.area = NULL;
emu->fx8010.etram_pages.bytes = 0;
/* irq handler must be registered after I/O ports are activated */
if (devm_request_irq(&pci->dev, pci->irq, snd_emu10k1_interrupt,
IRQF_SHARED, KBUILD_MODNAME, emu))
return -EBUSY;
emu->irq = pci->irq;
card->sync_irq = emu->irq;
/*
* Init to 0x02109204 :
* Clock accuracy = 0 (1000ppm)
* Sample Rate = 2 (48kHz)
* Audio Channel = 1 (Left of 2)
* Source Number = 0 (Unspecified)
* Generation Status = 1 (Original for Cat Code 12)
* Cat Code = 12 (Digital Signal Mixer)
* Mode = 0 (Mode 0)
* Emphasis = 0 (None)
* CP = 1 (Copyright unasserted)
* AN = 0 (Audio data)
* P = 0 (Consumer)
*/
emu->spdif_bits[0] = emu->spdif_bits[1] =
emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
SPCS_GENERATIONSTATUS | 0x00001200 |
0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
/* Clear silent pages and set up pointers */
memset(emu->silent_page.area, 0, emu->silent_page.bytes);
silent_page = emu->silent_page.addr << emu->address_mode;
pgtbl = (__le32 *)emu->ptb_pages.area;
for (idx = 0; idx < (emu->address_mode ? MAXPAGES1 : MAXPAGES0); idx++)
pgtbl[idx] = cpu_to_le32(silent_page | idx);
/* set up voice indices */
for (idx = 0; idx < NUM_G; idx++)
emu->voices[idx].number = idx;
err = snd_emu10k1_init(emu, enable_ir);
if (err < 0)
return err;
#ifdef CONFIG_PM_SLEEP
err = alloc_pm_buffer(emu);
if (err < 0)
return err;
#endif
/* Initialize the effect engine */
err = snd_emu10k1_init_efx(emu);
if (err < 0)
return err;
snd_emu10k1_audio_enable(emu);
#ifdef CONFIG_SND_PROC_FS
snd_emu10k1_proc_init(emu);
#endif
return 0;
}
#ifdef CONFIG_PM_SLEEP
static const unsigned char saved_regs[] = {
CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP,
FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL,
ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2,
TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA,
MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2,
SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX,
0xff /* end */
};
static const unsigned char saved_regs_audigy[] = {
A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_EHC,
A_FXRT2, A_SENDAMOUNTS, A_FXRT1,
0xff /* end */
};
static int alloc_pm_buffer(struct snd_emu10k1 *emu)
{
int size;
size = ARRAY_SIZE(saved_regs);
if (emu->audigy)
size += ARRAY_SIZE(saved_regs_audigy);
emu->saved_ptr = vmalloc(array3_size(4, NUM_G, size));
if (!emu->saved_ptr)
return -ENOMEM;
if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0)
return -ENOMEM;
if (emu->card_capabilities->ca0151_chip &&
snd_p16v_alloc_pm_buffer(emu) < 0)
return -ENOMEM;
return 0;
}
static void free_pm_buffer(struct snd_emu10k1 *emu)
{
vfree(emu->saved_ptr);
snd_emu10k1_efx_free_pm_buffer(emu);
if (emu->card_capabilities->ca0151_chip)
snd_p16v_free_pm_buffer(emu);
}
void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu)
{
int i;
const unsigned char *reg;
unsigned int *val;
val = emu->saved_ptr;
for (reg = saved_regs; *reg != 0xff; reg++)
for (i = 0; i < NUM_G; i++, val++)
*val = snd_emu10k1_ptr_read(emu, *reg, i);
if (emu->audigy) {
for (reg = saved_regs_audigy; *reg != 0xff; reg++)
for (i = 0; i < NUM_G; i++, val++)
*val = snd_emu10k1_ptr_read(emu, *reg, i);
}
if (emu->audigy)
emu->saved_a_iocfg = inw(emu->port + A_IOCFG);
emu->saved_hcfg = inl(emu->port + HCFG);
}
void snd_emu10k1_resume_init(struct snd_emu10k1 *emu)
{
if (emu->card_capabilities->ca_cardbus_chip)
snd_emu10k1_cardbus_init(emu);
if (emu->card_capabilities->ecard)
snd_emu10k1_ecard_init(emu);
else if (emu->card_capabilities->emu_model)
snd_emu10k1_emu1010_init(emu);
else
snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
snd_emu10k1_init(emu, emu->enable_ir);
}
void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu)
{
int i;
const unsigned char *reg;
unsigned int *val;
snd_emu10k1_audio_enable(emu);
/* resore for spdif */
if (emu->audigy)
outw(emu->saved_a_iocfg, emu->port + A_IOCFG);
outl(emu->saved_hcfg, emu->port + HCFG);
val = emu->saved_ptr;
for (reg = saved_regs; *reg != 0xff; reg++)
for (i = 0; i < NUM_G; i++, val++)
snd_emu10k1_ptr_write(emu, *reg, i, *val);
if (emu->audigy) {
for (reg = saved_regs_audigy; *reg != 0xff; reg++)
for (i = 0; i < NUM_G; i++, val++)
snd_emu10k1_ptr_write(emu, *reg, i, *val);
}
}
#endif
| linux-master | sound/pci/emu10k1/emu10k1_main.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (c) by Jaroslav Kysela <[email protected]>
* Routines for control of EMU10K1 MPU-401 in UART mode
*/
#include <linux/time.h>
#include <linux/init.h>
#include <sound/core.h>
#include <sound/emu10k1.h>
#define EMU10K1_MIDI_MODE_INPUT (1<<0)
#define EMU10K1_MIDI_MODE_OUTPUT (1<<1)
static inline unsigned char mpu401_read(struct snd_emu10k1 *emu,
struct snd_emu10k1_midi *mpu, int idx)
{
if (emu->audigy)
return (unsigned char)snd_emu10k1_ptr_read(emu, mpu->port + idx, 0);
else
return inb(emu->port + mpu->port + idx);
}
static inline void mpu401_write(struct snd_emu10k1 *emu,
struct snd_emu10k1_midi *mpu, int data, int idx)
{
if (emu->audigy)
snd_emu10k1_ptr_write(emu, mpu->port + idx, 0, data);
else
outb(data, emu->port + mpu->port + idx);
}
#define mpu401_write_data(emu, mpu, data) mpu401_write(emu, mpu, data, 0)
#define mpu401_write_cmd(emu, mpu, data) mpu401_write(emu, mpu, data, 1)
#define mpu401_read_data(emu, mpu) mpu401_read(emu, mpu, 0)
#define mpu401_read_stat(emu, mpu) mpu401_read(emu, mpu, 1)
#define mpu401_input_avail(emu,mpu) (!(mpu401_read_stat(emu,mpu) & 0x80))
#define mpu401_output_ready(emu,mpu) (!(mpu401_read_stat(emu,mpu) & 0x40))
#define MPU401_RESET 0xff
#define MPU401_ENTER_UART 0x3f
#define MPU401_ACK 0xfe
static void mpu401_clear_rx(struct snd_emu10k1 *emu, struct snd_emu10k1_midi *mpu)
{
int timeout = 100000;
for (; timeout > 0 && mpu401_input_avail(emu, mpu); timeout--)
mpu401_read_data(emu, mpu);
#ifdef CONFIG_SND_DEBUG
if (timeout <= 0)
dev_err(emu->card->dev,
"cmd: clear rx timeout (status = 0x%x)\n",
mpu401_read_stat(emu, mpu));
#endif
}
/*
*/
static void do_emu10k1_midi_interrupt(struct snd_emu10k1 *emu, struct snd_emu10k1_midi *midi, unsigned int status)
{
unsigned char byte;
if (midi->rmidi == NULL) {
snd_emu10k1_intr_disable(emu, midi->tx_enable | midi->rx_enable);
return;
}
spin_lock(&midi->input_lock);
if ((status & midi->ipr_rx) && mpu401_input_avail(emu, midi)) {
if (!(midi->midi_mode & EMU10K1_MIDI_MODE_INPUT)) {
mpu401_clear_rx(emu, midi);
} else {
byte = mpu401_read_data(emu, midi);
if (midi->substream_input)
snd_rawmidi_receive(midi->substream_input, &byte, 1);
}
}
spin_unlock(&midi->input_lock);
spin_lock(&midi->output_lock);
if ((status & midi->ipr_tx) && mpu401_output_ready(emu, midi)) {
if (midi->substream_output &&
snd_rawmidi_transmit(midi->substream_output, &byte, 1) == 1) {
mpu401_write_data(emu, midi, byte);
} else {
snd_emu10k1_intr_disable(emu, midi->tx_enable);
}
}
spin_unlock(&midi->output_lock);
}
static void snd_emu10k1_midi_interrupt(struct snd_emu10k1 *emu, unsigned int status)
{
do_emu10k1_midi_interrupt(emu, &emu->midi, status);
}
static void snd_emu10k1_midi_interrupt2(struct snd_emu10k1 *emu, unsigned int status)
{
do_emu10k1_midi_interrupt(emu, &emu->midi2, status);
}
static int snd_emu10k1_midi_cmd(struct snd_emu10k1 * emu, struct snd_emu10k1_midi *midi, unsigned char cmd, int ack)
{
int timeout, ok;
spin_lock_irq(&midi->input_lock);
mpu401_write_data(emu, midi, 0x00);
/* mpu401_clear_rx(emu, midi); */
mpu401_write_cmd(emu, midi, cmd);
if (ack) {
ok = 0;
timeout = 10000;
while (!ok && timeout-- > 0) {
if (mpu401_input_avail(emu, midi)) {
if (mpu401_read_data(emu, midi) == MPU401_ACK)
ok = 1;
}
}
if (!ok && mpu401_read_data(emu, midi) == MPU401_ACK)
ok = 1;
} else {
ok = 1;
}
spin_unlock_irq(&midi->input_lock);
if (!ok) {
dev_err(emu->card->dev,
"midi_cmd: 0x%x failed at 0x%lx (status = 0x%x, data = 0x%x)!!!\n",
cmd, emu->port,
mpu401_read_stat(emu, midi),
mpu401_read_data(emu, midi));
return 1;
}
return 0;
}
static int snd_emu10k1_midi_input_open(struct snd_rawmidi_substream *substream)
{
struct snd_emu10k1 *emu;
struct snd_emu10k1_midi *midi = (struct snd_emu10k1_midi *)substream->rmidi->private_data;
emu = midi->emu;
if (snd_BUG_ON(!emu))
return -ENXIO;
spin_lock_irq(&midi->open_lock);
midi->midi_mode |= EMU10K1_MIDI_MODE_INPUT;
midi->substream_input = substream;
if (!(midi->midi_mode & EMU10K1_MIDI_MODE_OUTPUT)) {
spin_unlock_irq(&midi->open_lock);
if (snd_emu10k1_midi_cmd(emu, midi, MPU401_RESET, 1))
goto error_out;
if (snd_emu10k1_midi_cmd(emu, midi, MPU401_ENTER_UART, 1))
goto error_out;
} else {
spin_unlock_irq(&midi->open_lock);
}
return 0;
error_out:
return -EIO;
}
static int snd_emu10k1_midi_output_open(struct snd_rawmidi_substream *substream)
{
struct snd_emu10k1 *emu;
struct snd_emu10k1_midi *midi = (struct snd_emu10k1_midi *)substream->rmidi->private_data;
emu = midi->emu;
if (snd_BUG_ON(!emu))
return -ENXIO;
spin_lock_irq(&midi->open_lock);
midi->midi_mode |= EMU10K1_MIDI_MODE_OUTPUT;
midi->substream_output = substream;
if (!(midi->midi_mode & EMU10K1_MIDI_MODE_INPUT)) {
spin_unlock_irq(&midi->open_lock);
if (snd_emu10k1_midi_cmd(emu, midi, MPU401_RESET, 1))
goto error_out;
if (snd_emu10k1_midi_cmd(emu, midi, MPU401_ENTER_UART, 1))
goto error_out;
} else {
spin_unlock_irq(&midi->open_lock);
}
return 0;
error_out:
return -EIO;
}
static int snd_emu10k1_midi_input_close(struct snd_rawmidi_substream *substream)
{
struct snd_emu10k1 *emu;
struct snd_emu10k1_midi *midi = (struct snd_emu10k1_midi *)substream->rmidi->private_data;
int err = 0;
emu = midi->emu;
if (snd_BUG_ON(!emu))
return -ENXIO;
spin_lock_irq(&midi->open_lock);
snd_emu10k1_intr_disable(emu, midi->rx_enable);
midi->midi_mode &= ~EMU10K1_MIDI_MODE_INPUT;
midi->substream_input = NULL;
if (!(midi->midi_mode & EMU10K1_MIDI_MODE_OUTPUT)) {
spin_unlock_irq(&midi->open_lock);
err = snd_emu10k1_midi_cmd(emu, midi, MPU401_RESET, 0);
} else {
spin_unlock_irq(&midi->open_lock);
}
return err;
}
static int snd_emu10k1_midi_output_close(struct snd_rawmidi_substream *substream)
{
struct snd_emu10k1 *emu;
struct snd_emu10k1_midi *midi = (struct snd_emu10k1_midi *)substream->rmidi->private_data;
int err = 0;
emu = midi->emu;
if (snd_BUG_ON(!emu))
return -ENXIO;
spin_lock_irq(&midi->open_lock);
snd_emu10k1_intr_disable(emu, midi->tx_enable);
midi->midi_mode &= ~EMU10K1_MIDI_MODE_OUTPUT;
midi->substream_output = NULL;
if (!(midi->midi_mode & EMU10K1_MIDI_MODE_INPUT)) {
spin_unlock_irq(&midi->open_lock);
err = snd_emu10k1_midi_cmd(emu, midi, MPU401_RESET, 0);
} else {
spin_unlock_irq(&midi->open_lock);
}
return err;
}
static void snd_emu10k1_midi_input_trigger(struct snd_rawmidi_substream *substream, int up)
{
struct snd_emu10k1 *emu;
struct snd_emu10k1_midi *midi = (struct snd_emu10k1_midi *)substream->rmidi->private_data;
emu = midi->emu;
if (snd_BUG_ON(!emu))
return;
if (up)
snd_emu10k1_intr_enable(emu, midi->rx_enable);
else
snd_emu10k1_intr_disable(emu, midi->rx_enable);
}
static void snd_emu10k1_midi_output_trigger(struct snd_rawmidi_substream *substream, int up)
{
struct snd_emu10k1 *emu;
struct snd_emu10k1_midi *midi = (struct snd_emu10k1_midi *)substream->rmidi->private_data;
emu = midi->emu;
if (snd_BUG_ON(!emu))
return;
if (up) {
int max = 4;
unsigned char byte;
/* try to send some amount of bytes here before interrupts */
spin_lock_irq(&midi->output_lock);
while (max > 0) {
if (mpu401_output_ready(emu, midi)) {
if (!(midi->midi_mode & EMU10K1_MIDI_MODE_OUTPUT) ||
snd_rawmidi_transmit(substream, &byte, 1) != 1) {
/* no more data */
spin_unlock_irq(&midi->output_lock);
return;
}
mpu401_write_data(emu, midi, byte);
max--;
} else {
break;
}
}
spin_unlock_irq(&midi->output_lock);
snd_emu10k1_intr_enable(emu, midi->tx_enable);
} else {
snd_emu10k1_intr_disable(emu, midi->tx_enable);
}
}
/*
*/
static const struct snd_rawmidi_ops snd_emu10k1_midi_output =
{
.open = snd_emu10k1_midi_output_open,
.close = snd_emu10k1_midi_output_close,
.trigger = snd_emu10k1_midi_output_trigger,
};
static const struct snd_rawmidi_ops snd_emu10k1_midi_input =
{
.open = snd_emu10k1_midi_input_open,
.close = snd_emu10k1_midi_input_close,
.trigger = snd_emu10k1_midi_input_trigger,
};
static void snd_emu10k1_midi_free(struct snd_rawmidi *rmidi)
{
struct snd_emu10k1_midi *midi = rmidi->private_data;
midi->interrupt = NULL;
midi->rmidi = NULL;
}
static int emu10k1_midi_init(struct snd_emu10k1 *emu, struct snd_emu10k1_midi *midi, int device, char *name)
{
struct snd_rawmidi *rmidi;
int err;
err = snd_rawmidi_new(emu->card, name, device, 1, 1, &rmidi);
if (err < 0)
return err;
midi->emu = emu;
spin_lock_init(&midi->open_lock);
spin_lock_init(&midi->input_lock);
spin_lock_init(&midi->output_lock);
strcpy(rmidi->name, name);
snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, &snd_emu10k1_midi_output);
snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT, &snd_emu10k1_midi_input);
rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT |
SNDRV_RAWMIDI_INFO_INPUT |
SNDRV_RAWMIDI_INFO_DUPLEX;
rmidi->private_data = midi;
rmidi->private_free = snd_emu10k1_midi_free;
midi->rmidi = rmidi;
return 0;
}
int snd_emu10k1_midi(struct snd_emu10k1 *emu)
{
struct snd_emu10k1_midi *midi = &emu->midi;
int err;
err = emu10k1_midi_init(emu, midi, 0, "EMU10K1 MPU-401 (UART)");
if (err < 0)
return err;
midi->tx_enable = INTE_MIDITXENABLE;
midi->rx_enable = INTE_MIDIRXENABLE;
midi->port = MUDATA;
midi->ipr_tx = IPR_MIDITRANSBUFEMPTY;
midi->ipr_rx = IPR_MIDIRECVBUFEMPTY;
midi->interrupt = snd_emu10k1_midi_interrupt;
return 0;
}
int snd_emu10k1_audigy_midi(struct snd_emu10k1 *emu)
{
struct snd_emu10k1_midi *midi;
int err;
midi = &emu->midi;
err = emu10k1_midi_init(emu, midi, 0, "Audigy MPU-401 (UART)");
if (err < 0)
return err;
midi->tx_enable = INTE_MIDITXENABLE;
midi->rx_enable = INTE_MIDIRXENABLE;
midi->port = A_MUDATA1;
midi->ipr_tx = IPR_MIDITRANSBUFEMPTY;
midi->ipr_rx = IPR_MIDIRECVBUFEMPTY;
midi->interrupt = snd_emu10k1_midi_interrupt;
midi = &emu->midi2;
err = emu10k1_midi_init(emu, midi, 1, "Audigy MPU-401 #2");
if (err < 0)
return err;
midi->tx_enable = INTE_A_MIDITXENABLE2;
midi->rx_enable = INTE_A_MIDIRXENABLE2;
midi->port = A_MUDATA2;
midi->ipr_tx = IPR_A_MIDITRANSBUFEMPTY2;
midi->ipr_rx = IPR_A_MIDIRECVBUFEMPTY2;
midi->interrupt = snd_emu10k1_midi_interrupt2;
return 0;
}
| linux-master | sound/pci/emu10k1/emumpu401.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (c) by Francisco Moraes <[email protected]>
* Driver EMU10K1X chips
*
* Parts of this code were adapted from audigyls.c driver which is
* Copyright (c) by James Courtier-Dutton <[email protected]>
*
* BUGS:
* --
*
* TODO:
*
* Chips (SB0200 model):
* - EMU10K1X-DBQ
* - STAC 9708T
*/
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/pci.h>
#include <linux/dma-mapping.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <sound/core.h>
#include <sound/initval.h>
#include <sound/pcm.h>
#include <sound/ac97_codec.h>
#include <sound/info.h>
#include <sound/rawmidi.h>
MODULE_AUTHOR("Francisco Moraes <[email protected]>");
MODULE_DESCRIPTION("EMU10K1X");
MODULE_LICENSE("GPL");
// module parameters (see "Module Parameters")
static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
module_param_array(index, int, NULL, 0444);
MODULE_PARM_DESC(index, "Index value for the EMU10K1X soundcard.");
module_param_array(id, charp, NULL, 0444);
MODULE_PARM_DESC(id, "ID string for the EMU10K1X soundcard.");
module_param_array(enable, bool, NULL, 0444);
MODULE_PARM_DESC(enable, "Enable the EMU10K1X soundcard.");
// some definitions were borrowed from emu10k1 driver as they seem to be the same
/************************************************************************************************/
/* PCI function 0 registers, address = <val> + PCIBASE0 */
/************************************************************************************************/
#define PTR 0x00 /* Indexed register set pointer register */
/* NOTE: The CHANNELNUM and ADDRESS words can */
/* be modified independently of each other. */
#define DATA 0x04 /* Indexed register set data register */
#define IPR 0x08 /* Global interrupt pending register */
/* Clear pending interrupts by writing a 1 to */
/* the relevant bits and zero to the other bits */
#define IPR_MIDITRANSBUFEMPTY 0x00000001 /* MIDI UART transmit buffer empty */
#define IPR_MIDIRECVBUFEMPTY 0x00000002 /* MIDI UART receive buffer empty */
#define IPR_CH_0_LOOP 0x00000800 /* Channel 0 loop */
#define IPR_CH_0_HALF_LOOP 0x00000100 /* Channel 0 half loop */
#define IPR_CAP_0_LOOP 0x00080000 /* Channel capture loop */
#define IPR_CAP_0_HALF_LOOP 0x00010000 /* Channel capture half loop */
#define INTE 0x0c /* Interrupt enable register */
#define INTE_MIDITXENABLE 0x00000001 /* Enable MIDI transmit-buffer-empty interrupts */
#define INTE_MIDIRXENABLE 0x00000002 /* Enable MIDI receive-buffer-empty interrupts */
#define INTE_CH_0_LOOP 0x00000800 /* Channel 0 loop */
#define INTE_CH_0_HALF_LOOP 0x00000100 /* Channel 0 half loop */
#define INTE_CAP_0_LOOP 0x00080000 /* Channel capture loop */
#define INTE_CAP_0_HALF_LOOP 0x00010000 /* Channel capture half loop */
#define HCFG 0x14 /* Hardware config register */
#define HCFG_LOCKSOUNDCACHE 0x00000008 /* 1 = Cancel bustmaster accesses to soundcache */
/* NOTE: This should generally never be used. */
#define HCFG_AUDIOENABLE 0x00000001 /* 0 = CODECs transmit zero-valued samples */
/* Should be set to 1 when the EMU10K1 is */
/* completely initialized. */
#define GPIO 0x18 /* Defaults: 00001080-Analog, 00001000-SPDIF. */
#define AC97DATA 0x1c /* AC97 register set data register (16 bit) */
#define AC97ADDRESS 0x1e /* AC97 register set address register (8 bit) */
/********************************************************************************************************/
/* Emu10k1x pointer-offset register set, accessed through the PTR and DATA registers */
/********************************************************************************************************/
#define PLAYBACK_LIST_ADDR 0x00 /* Base DMA address of a list of pointers to each period/size */
/* One list entry: 4 bytes for DMA address,
* 4 bytes for period_size << 16.
* One list entry is 8 bytes long.
* One list entry for each period in the buffer.
*/
#define PLAYBACK_LIST_SIZE 0x01 /* Size of list in bytes << 16. E.g. 8 periods -> 0x00380000 */
#define PLAYBACK_LIST_PTR 0x02 /* Pointer to the current period being played */
#define PLAYBACK_DMA_ADDR 0x04 /* Playback DMA address */
#define PLAYBACK_PERIOD_SIZE 0x05 /* Playback period size */
#define PLAYBACK_POINTER 0x06 /* Playback period pointer. Sample currently in DAC */
#define PLAYBACK_UNKNOWN1 0x07
#define PLAYBACK_UNKNOWN2 0x08
/* Only one capture channel supported */
#define CAPTURE_DMA_ADDR 0x10 /* Capture DMA address */
#define CAPTURE_BUFFER_SIZE 0x11 /* Capture buffer size */
#define CAPTURE_POINTER 0x12 /* Capture buffer pointer. Sample currently in ADC */
#define CAPTURE_UNKNOWN 0x13
/* From 0x20 - 0x3f, last samples played on each channel */
#define TRIGGER_CHANNEL 0x40 /* Trigger channel playback */
#define TRIGGER_CHANNEL_0 0x00000001 /* Trigger channel 0 */
#define TRIGGER_CHANNEL_1 0x00000002 /* Trigger channel 1 */
#define TRIGGER_CHANNEL_2 0x00000004 /* Trigger channel 2 */
#define TRIGGER_CAPTURE 0x00000100 /* Trigger capture channel */
#define ROUTING 0x41 /* Setup sound routing ? */
#define ROUTING_FRONT_LEFT 0x00000001
#define ROUTING_FRONT_RIGHT 0x00000002
#define ROUTING_REAR_LEFT 0x00000004
#define ROUTING_REAR_RIGHT 0x00000008
#define ROUTING_CENTER_LFE 0x00010000
#define SPCS0 0x42 /* SPDIF output Channel Status 0 register */
#define SPCS1 0x43 /* SPDIF output Channel Status 1 register */
#define SPCS2 0x44 /* SPDIF output Channel Status 2 register */
#define SPCS_CLKACCYMASK 0x30000000 /* Clock accuracy */
#define SPCS_CLKACCY_1000PPM 0x00000000 /* 1000 parts per million */
#define SPCS_CLKACCY_50PPM 0x10000000 /* 50 parts per million */
#define SPCS_CLKACCY_VARIABLE 0x20000000 /* Variable accuracy */
#define SPCS_SAMPLERATEMASK 0x0f000000 /* Sample rate */
#define SPCS_SAMPLERATE_44 0x00000000 /* 44.1kHz sample rate */
#define SPCS_SAMPLERATE_48 0x02000000 /* 48kHz sample rate */
#define SPCS_SAMPLERATE_32 0x03000000 /* 32kHz sample rate */
#define SPCS_CHANNELNUMMASK 0x00f00000 /* Channel number */
#define SPCS_CHANNELNUM_UNSPEC 0x00000000 /* Unspecified channel number */
#define SPCS_CHANNELNUM_LEFT 0x00100000 /* Left channel */
#define SPCS_CHANNELNUM_RIGHT 0x00200000 /* Right channel */
#define SPCS_SOURCENUMMASK 0x000f0000 /* Source number */
#define SPCS_SOURCENUM_UNSPEC 0x00000000 /* Unspecified source number */
#define SPCS_GENERATIONSTATUS 0x00008000 /* Originality flag (see IEC-958 spec) */
#define SPCS_CATEGORYCODEMASK 0x00007f00 /* Category code (see IEC-958 spec) */
#define SPCS_MODEMASK 0x000000c0 /* Mode (see IEC-958 spec) */
#define SPCS_EMPHASISMASK 0x00000038 /* Emphasis */
#define SPCS_EMPHASIS_NONE 0x00000000 /* No emphasis */
#define SPCS_EMPHASIS_50_15 0x00000008 /* 50/15 usec 2 channel */
#define SPCS_COPYRIGHT 0x00000004 /* Copyright asserted flag -- do not modify */
#define SPCS_NOTAUDIODATA 0x00000002 /* 0 = Digital audio, 1 = not audio */
#define SPCS_PROFESSIONAL 0x00000001 /* 0 = Consumer (IEC-958), 1 = pro (AES3-1992) */
#define SPDIF_SELECT 0x45 /* Enables SPDIF or Analogue outputs 0-Analogue, 0x700-SPDIF */
/* This is the MPU port on the card */
#define MUDATA 0x47
#define MUCMD 0x48
#define MUSTAT MUCMD
/* From 0x50 - 0x5f, last samples captured */
/*
* The hardware has 3 channels for playback and 1 for capture.
* - channel 0 is the front channel
* - channel 1 is the rear channel
* - channel 2 is the center/lfe channel
* Volume is controlled by the AC97 for the front and rear channels by
* the PCM Playback Volume, Sigmatel Surround Playback Volume and
* Surround Playback Volume. The Sigmatel 4-Speaker Stereo switch affects
* the front/rear channel mixing in the REAR OUT jack. When using the
* 4-Speaker Stereo, both front and rear channels will be mixed in the
* REAR OUT.
* The center/lfe channel has no volume control and cannot be muted during
* playback.
*/
struct emu10k1x_voice {
struct emu10k1x *emu;
int number;
int use;
struct emu10k1x_pcm *epcm;
};
struct emu10k1x_pcm {
struct emu10k1x *emu;
struct snd_pcm_substream *substream;
struct emu10k1x_voice *voice;
unsigned short running;
};
struct emu10k1x_midi {
struct emu10k1x *emu;
struct snd_rawmidi *rmidi;
struct snd_rawmidi_substream *substream_input;
struct snd_rawmidi_substream *substream_output;
unsigned int midi_mode;
spinlock_t input_lock;
spinlock_t output_lock;
spinlock_t open_lock;
int tx_enable, rx_enable;
int port;
int ipr_tx, ipr_rx;
void (*interrupt)(struct emu10k1x *emu, unsigned int status);
};
// definition of the chip-specific record
struct emu10k1x {
struct snd_card *card;
struct pci_dev *pci;
unsigned long port;
int irq;
unsigned char revision; /* chip revision */
unsigned int serial; /* serial number */
unsigned short model; /* subsystem id */
spinlock_t emu_lock;
spinlock_t voice_lock;
struct snd_ac97 *ac97;
struct snd_pcm *pcm;
struct emu10k1x_voice voices[3];
struct emu10k1x_voice capture_voice;
u32 spdif_bits[3]; // SPDIF out setup
struct snd_dma_buffer *dma_buffer;
struct emu10k1x_midi midi;
};
/* hardware definition */
static const struct snd_pcm_hardware snd_emu10k1x_playback_hw = {
.info = (SNDRV_PCM_INFO_MMAP |
SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_MMAP_VALID),
.formats = SNDRV_PCM_FMTBIT_S16_LE,
.rates = SNDRV_PCM_RATE_48000,
.rate_min = 48000,
.rate_max = 48000,
.channels_min = 2,
.channels_max = 2,
.buffer_bytes_max = (32*1024),
.period_bytes_min = 64,
.period_bytes_max = (16*1024),
.periods_min = 2,
.periods_max = 8,
.fifo_size = 0,
};
static const struct snd_pcm_hardware snd_emu10k1x_capture_hw = {
.info = (SNDRV_PCM_INFO_MMAP |
SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_MMAP_VALID),
.formats = SNDRV_PCM_FMTBIT_S16_LE,
.rates = SNDRV_PCM_RATE_48000,
.rate_min = 48000,
.rate_max = 48000,
.channels_min = 2,
.channels_max = 2,
.buffer_bytes_max = (32*1024),
.period_bytes_min = 64,
.period_bytes_max = (16*1024),
.periods_min = 2,
.periods_max = 2,
.fifo_size = 0,
};
static unsigned int snd_emu10k1x_ptr_read(struct emu10k1x * emu,
unsigned int reg,
unsigned int chn)
{
unsigned long flags;
unsigned int regptr, val;
regptr = (reg << 16) | chn;
spin_lock_irqsave(&emu->emu_lock, flags);
outl(regptr, emu->port + PTR);
val = inl(emu->port + DATA);
spin_unlock_irqrestore(&emu->emu_lock, flags);
return val;
}
static void snd_emu10k1x_ptr_write(struct emu10k1x *emu,
unsigned int reg,
unsigned int chn,
unsigned int data)
{
unsigned int regptr;
unsigned long flags;
regptr = (reg << 16) | chn;
spin_lock_irqsave(&emu->emu_lock, flags);
outl(regptr, emu->port + PTR);
outl(data, emu->port + DATA);
spin_unlock_irqrestore(&emu->emu_lock, flags);
}
static void snd_emu10k1x_intr_enable(struct emu10k1x *emu, unsigned int intrenb)
{
unsigned long flags;
unsigned int intr_enable;
spin_lock_irqsave(&emu->emu_lock, flags);
intr_enable = inl(emu->port + INTE) | intrenb;
outl(intr_enable, emu->port + INTE);
spin_unlock_irqrestore(&emu->emu_lock, flags);
}
static void snd_emu10k1x_intr_disable(struct emu10k1x *emu, unsigned int intrenb)
{
unsigned long flags;
unsigned int intr_enable;
spin_lock_irqsave(&emu->emu_lock, flags);
intr_enable = inl(emu->port + INTE) & ~intrenb;
outl(intr_enable, emu->port + INTE);
spin_unlock_irqrestore(&emu->emu_lock, flags);
}
static void snd_emu10k1x_gpio_write(struct emu10k1x *emu, unsigned int value)
{
unsigned long flags;
spin_lock_irqsave(&emu->emu_lock, flags);
outl(value, emu->port + GPIO);
spin_unlock_irqrestore(&emu->emu_lock, flags);
}
static void snd_emu10k1x_pcm_free_substream(struct snd_pcm_runtime *runtime)
{
kfree(runtime->private_data);
}
static void snd_emu10k1x_pcm_interrupt(struct emu10k1x *emu, struct emu10k1x_voice *voice)
{
struct emu10k1x_pcm *epcm;
epcm = voice->epcm;
if (!epcm)
return;
if (epcm->substream == NULL)
return;
#if 0
dev_info(emu->card->dev,
"IRQ: position = 0x%x, period = 0x%x, size = 0x%x\n",
epcm->substream->ops->pointer(epcm->substream),
snd_pcm_lib_period_bytes(epcm->substream),
snd_pcm_lib_buffer_bytes(epcm->substream));
#endif
snd_pcm_period_elapsed(epcm->substream);
}
/* open callback */
static int snd_emu10k1x_playback_open(struct snd_pcm_substream *substream)
{
struct emu10k1x *chip = snd_pcm_substream_chip(substream);
struct emu10k1x_pcm *epcm;
struct snd_pcm_runtime *runtime = substream->runtime;
int err;
err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
if (err < 0)
return err;
err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64);
if (err < 0)
return err;
epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
if (epcm == NULL)
return -ENOMEM;
epcm->emu = chip;
epcm->substream = substream;
runtime->private_data = epcm;
runtime->private_free = snd_emu10k1x_pcm_free_substream;
runtime->hw = snd_emu10k1x_playback_hw;
return 0;
}
/* close callback */
static int snd_emu10k1x_playback_close(struct snd_pcm_substream *substream)
{
return 0;
}
/* hw_params callback */
static int snd_emu10k1x_pcm_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *hw_params)
{
struct snd_pcm_runtime *runtime = substream->runtime;
struct emu10k1x_pcm *epcm = runtime->private_data;
if (! epcm->voice) {
epcm->voice = &epcm->emu->voices[substream->pcm->device];
epcm->voice->use = 1;
epcm->voice->epcm = epcm;
}
return 0;
}
/* hw_free callback */
static int snd_emu10k1x_pcm_hw_free(struct snd_pcm_substream *substream)
{
struct snd_pcm_runtime *runtime = substream->runtime;
struct emu10k1x_pcm *epcm;
if (runtime->private_data == NULL)
return 0;
epcm = runtime->private_data;
if (epcm->voice) {
epcm->voice->use = 0;
epcm->voice->epcm = NULL;
epcm->voice = NULL;
}
return 0;
}
/* prepare callback */
static int snd_emu10k1x_pcm_prepare(struct snd_pcm_substream *substream)
{
struct emu10k1x *emu = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
struct emu10k1x_pcm *epcm = runtime->private_data;
int voice = epcm->voice->number;
u32 *table_base = (u32 *)(emu->dma_buffer->area+1024*voice);
u32 period_size_bytes = frames_to_bytes(runtime, runtime->period_size);
int i;
for(i = 0; i < runtime->periods; i++) {
*table_base++=runtime->dma_addr+(i*period_size_bytes);
*table_base++=period_size_bytes<<16;
}
snd_emu10k1x_ptr_write(emu, PLAYBACK_LIST_ADDR, voice, emu->dma_buffer->addr+1024*voice);
snd_emu10k1x_ptr_write(emu, PLAYBACK_LIST_SIZE, voice, (runtime->periods - 1) << 19);
snd_emu10k1x_ptr_write(emu, PLAYBACK_LIST_PTR, voice, 0);
snd_emu10k1x_ptr_write(emu, PLAYBACK_POINTER, voice, 0);
snd_emu10k1x_ptr_write(emu, PLAYBACK_UNKNOWN1, voice, 0);
snd_emu10k1x_ptr_write(emu, PLAYBACK_UNKNOWN2, voice, 0);
snd_emu10k1x_ptr_write(emu, PLAYBACK_DMA_ADDR, voice, runtime->dma_addr);
snd_emu10k1x_ptr_write(emu, PLAYBACK_PERIOD_SIZE, voice, frames_to_bytes(runtime, runtime->period_size)<<16);
return 0;
}
/* trigger callback */
static int snd_emu10k1x_pcm_trigger(struct snd_pcm_substream *substream,
int cmd)
{
struct emu10k1x *emu = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
struct emu10k1x_pcm *epcm = runtime->private_data;
int channel = epcm->voice->number;
int result = 0;
/*
dev_dbg(emu->card->dev,
"trigger - emu10k1x = 0x%x, cmd = %i, pointer = %d\n",
(int)emu, cmd, (int)substream->ops->pointer(substream));
*/
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
if(runtime->periods == 2)
snd_emu10k1x_intr_enable(emu, (INTE_CH_0_LOOP | INTE_CH_0_HALF_LOOP) << channel);
else
snd_emu10k1x_intr_enable(emu, INTE_CH_0_LOOP << channel);
epcm->running = 1;
snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0)|(TRIGGER_CHANNEL_0<<channel));
break;
case SNDRV_PCM_TRIGGER_STOP:
epcm->running = 0;
snd_emu10k1x_intr_disable(emu, (INTE_CH_0_LOOP | INTE_CH_0_HALF_LOOP) << channel);
snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0) & ~(TRIGGER_CHANNEL_0<<channel));
break;
default:
result = -EINVAL;
break;
}
return result;
}
/* pointer callback */
static snd_pcm_uframes_t
snd_emu10k1x_pcm_pointer(struct snd_pcm_substream *substream)
{
struct emu10k1x *emu = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
struct emu10k1x_pcm *epcm = runtime->private_data;
int channel = epcm->voice->number;
snd_pcm_uframes_t ptr = 0, ptr1 = 0, ptr2= 0,ptr3 = 0,ptr4 = 0;
if (!epcm->running)
return 0;
ptr3 = snd_emu10k1x_ptr_read(emu, PLAYBACK_LIST_PTR, channel);
ptr1 = snd_emu10k1x_ptr_read(emu, PLAYBACK_POINTER, channel);
ptr4 = snd_emu10k1x_ptr_read(emu, PLAYBACK_LIST_PTR, channel);
if(ptr4 == 0 && ptr1 == frames_to_bytes(runtime, runtime->buffer_size))
return 0;
if (ptr3 != ptr4)
ptr1 = snd_emu10k1x_ptr_read(emu, PLAYBACK_POINTER, channel);
ptr2 = bytes_to_frames(runtime, ptr1);
ptr2 += (ptr4 >> 3) * runtime->period_size;
ptr = ptr2;
if (ptr >= runtime->buffer_size)
ptr -= runtime->buffer_size;
return ptr;
}
/* operators */
static const struct snd_pcm_ops snd_emu10k1x_playback_ops = {
.open = snd_emu10k1x_playback_open,
.close = snd_emu10k1x_playback_close,
.hw_params = snd_emu10k1x_pcm_hw_params,
.hw_free = snd_emu10k1x_pcm_hw_free,
.prepare = snd_emu10k1x_pcm_prepare,
.trigger = snd_emu10k1x_pcm_trigger,
.pointer = snd_emu10k1x_pcm_pointer,
};
/* open_capture callback */
static int snd_emu10k1x_pcm_open_capture(struct snd_pcm_substream *substream)
{
struct emu10k1x *chip = snd_pcm_substream_chip(substream);
struct emu10k1x_pcm *epcm;
struct snd_pcm_runtime *runtime = substream->runtime;
int err;
err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
if (err < 0)
return err;
err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64);
if (err < 0)
return err;
epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
if (epcm == NULL)
return -ENOMEM;
epcm->emu = chip;
epcm->substream = substream;
runtime->private_data = epcm;
runtime->private_free = snd_emu10k1x_pcm_free_substream;
runtime->hw = snd_emu10k1x_capture_hw;
return 0;
}
/* close callback */
static int snd_emu10k1x_pcm_close_capture(struct snd_pcm_substream *substream)
{
return 0;
}
/* hw_params callback */
static int snd_emu10k1x_pcm_hw_params_capture(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *hw_params)
{
struct snd_pcm_runtime *runtime = substream->runtime;
struct emu10k1x_pcm *epcm = runtime->private_data;
if (! epcm->voice) {
if (epcm->emu->capture_voice.use)
return -EBUSY;
epcm->voice = &epcm->emu->capture_voice;
epcm->voice->epcm = epcm;
epcm->voice->use = 1;
}
return 0;
}
/* hw_free callback */
static int snd_emu10k1x_pcm_hw_free_capture(struct snd_pcm_substream *substream)
{
struct snd_pcm_runtime *runtime = substream->runtime;
struct emu10k1x_pcm *epcm;
if (runtime->private_data == NULL)
return 0;
epcm = runtime->private_data;
if (epcm->voice) {
epcm->voice->use = 0;
epcm->voice->epcm = NULL;
epcm->voice = NULL;
}
return 0;
}
/* prepare capture callback */
static int snd_emu10k1x_pcm_prepare_capture(struct snd_pcm_substream *substream)
{
struct emu10k1x *emu = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
snd_emu10k1x_ptr_write(emu, CAPTURE_DMA_ADDR, 0, runtime->dma_addr);
snd_emu10k1x_ptr_write(emu, CAPTURE_BUFFER_SIZE, 0, frames_to_bytes(runtime, runtime->buffer_size)<<16); // buffer size in bytes
snd_emu10k1x_ptr_write(emu, CAPTURE_POINTER, 0, 0);
snd_emu10k1x_ptr_write(emu, CAPTURE_UNKNOWN, 0, 0);
return 0;
}
/* trigger_capture callback */
static int snd_emu10k1x_pcm_trigger_capture(struct snd_pcm_substream *substream,
int cmd)
{
struct emu10k1x *emu = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
struct emu10k1x_pcm *epcm = runtime->private_data;
int result = 0;
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
snd_emu10k1x_intr_enable(emu, INTE_CAP_0_LOOP |
INTE_CAP_0_HALF_LOOP);
snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0)|TRIGGER_CAPTURE);
epcm->running = 1;
break;
case SNDRV_PCM_TRIGGER_STOP:
epcm->running = 0;
snd_emu10k1x_intr_disable(emu, INTE_CAP_0_LOOP |
INTE_CAP_0_HALF_LOOP);
snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0) & ~(TRIGGER_CAPTURE));
break;
default:
result = -EINVAL;
break;
}
return result;
}
/* pointer_capture callback */
static snd_pcm_uframes_t
snd_emu10k1x_pcm_pointer_capture(struct snd_pcm_substream *substream)
{
struct emu10k1x *emu = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
struct emu10k1x_pcm *epcm = runtime->private_data;
snd_pcm_uframes_t ptr;
if (!epcm->running)
return 0;
ptr = bytes_to_frames(runtime, snd_emu10k1x_ptr_read(emu, CAPTURE_POINTER, 0));
if (ptr >= runtime->buffer_size)
ptr -= runtime->buffer_size;
return ptr;
}
static const struct snd_pcm_ops snd_emu10k1x_capture_ops = {
.open = snd_emu10k1x_pcm_open_capture,
.close = snd_emu10k1x_pcm_close_capture,
.hw_params = snd_emu10k1x_pcm_hw_params_capture,
.hw_free = snd_emu10k1x_pcm_hw_free_capture,
.prepare = snd_emu10k1x_pcm_prepare_capture,
.trigger = snd_emu10k1x_pcm_trigger_capture,
.pointer = snd_emu10k1x_pcm_pointer_capture,
};
static unsigned short snd_emu10k1x_ac97_read(struct snd_ac97 *ac97,
unsigned short reg)
{
struct emu10k1x *emu = ac97->private_data;
unsigned long flags;
unsigned short val;
spin_lock_irqsave(&emu->emu_lock, flags);
outb(reg, emu->port + AC97ADDRESS);
val = inw(emu->port + AC97DATA);
spin_unlock_irqrestore(&emu->emu_lock, flags);
return val;
}
static void snd_emu10k1x_ac97_write(struct snd_ac97 *ac97,
unsigned short reg, unsigned short val)
{
struct emu10k1x *emu = ac97->private_data;
unsigned long flags;
spin_lock_irqsave(&emu->emu_lock, flags);
outb(reg, emu->port + AC97ADDRESS);
outw(val, emu->port + AC97DATA);
spin_unlock_irqrestore(&emu->emu_lock, flags);
}
static int snd_emu10k1x_ac97(struct emu10k1x *chip)
{
struct snd_ac97_bus *pbus;
struct snd_ac97_template ac97;
int err;
static const struct snd_ac97_bus_ops ops = {
.write = snd_emu10k1x_ac97_write,
.read = snd_emu10k1x_ac97_read,
};
err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus);
if (err < 0)
return err;
pbus->no_vra = 1; /* we don't need VRA */
memset(&ac97, 0, sizeof(ac97));
ac97.private_data = chip;
ac97.scaps = AC97_SCAP_NO_SPDIF;
return snd_ac97_mixer(pbus, &ac97, &chip->ac97);
}
static void snd_emu10k1x_free(struct snd_card *card)
{
struct emu10k1x *chip = card->private_data;
snd_emu10k1x_ptr_write(chip, TRIGGER_CHANNEL, 0, 0);
// disable interrupts
outl(0, chip->port + INTE);
// disable audio
outl(HCFG_LOCKSOUNDCACHE, chip->port + HCFG);
}
static irqreturn_t snd_emu10k1x_interrupt(int irq, void *dev_id)
{
unsigned int status;
struct emu10k1x *chip = dev_id;
struct emu10k1x_voice *pvoice = chip->voices;
int i;
int mask;
status = inl(chip->port + IPR);
if (! status)
return IRQ_NONE;
// capture interrupt
if (status & (IPR_CAP_0_LOOP | IPR_CAP_0_HALF_LOOP)) {
struct emu10k1x_voice *cap_voice = &chip->capture_voice;
if (cap_voice->use)
snd_emu10k1x_pcm_interrupt(chip, cap_voice);
else
snd_emu10k1x_intr_disable(chip,
INTE_CAP_0_LOOP |
INTE_CAP_0_HALF_LOOP);
}
mask = IPR_CH_0_LOOP|IPR_CH_0_HALF_LOOP;
for (i = 0; i < 3; i++) {
if (status & mask) {
if (pvoice->use)
snd_emu10k1x_pcm_interrupt(chip, pvoice);
else
snd_emu10k1x_intr_disable(chip, mask);
}
pvoice++;
mask <<= 1;
}
if (status & (IPR_MIDITRANSBUFEMPTY|IPR_MIDIRECVBUFEMPTY)) {
if (chip->midi.interrupt)
chip->midi.interrupt(chip, status);
else
snd_emu10k1x_intr_disable(chip, INTE_MIDITXENABLE|INTE_MIDIRXENABLE);
}
// acknowledge the interrupt if necessary
outl(status, chip->port + IPR);
/* dev_dbg(chip->card->dev, "interrupt %08x\n", status); */
return IRQ_HANDLED;
}
static const struct snd_pcm_chmap_elem surround_map[] = {
{ .channels = 2,
.map = { SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } },
{ }
};
static const struct snd_pcm_chmap_elem clfe_map[] = {
{ .channels = 2,
.map = { SNDRV_CHMAP_FC, SNDRV_CHMAP_LFE } },
{ }
};
static int snd_emu10k1x_pcm(struct emu10k1x *emu, int device)
{
struct snd_pcm *pcm;
const struct snd_pcm_chmap_elem *map = NULL;
int err;
int capture = 0;
if (device == 0)
capture = 1;
err = snd_pcm_new(emu->card, "emu10k1x", device, 1, capture, &pcm);
if (err < 0)
return err;
pcm->private_data = emu;
switch(device) {
case 0:
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_emu10k1x_playback_ops);
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_emu10k1x_capture_ops);
break;
case 1:
case 2:
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_emu10k1x_playback_ops);
break;
}
pcm->info_flags = 0;
switch(device) {
case 0:
strcpy(pcm->name, "EMU10K1X Front");
map = snd_pcm_std_chmaps;
break;
case 1:
strcpy(pcm->name, "EMU10K1X Rear");
map = surround_map;
break;
case 2:
strcpy(pcm->name, "EMU10K1X Center/LFE");
map = clfe_map;
break;
}
emu->pcm = pcm;
snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
&emu->pci->dev, 32*1024, 32*1024);
return snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK, map, 2,
1 << 2, NULL);
}
static int snd_emu10k1x_create(struct snd_card *card,
struct pci_dev *pci)
{
struct emu10k1x *chip = card->private_data;
int err;
int ch;
err = pcim_enable_device(pci);
if (err < 0)
return err;
if (dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(28)) < 0) {
dev_err(card->dev, "error to set 28bit mask DMA\n");
return -ENXIO;
}
chip->card = card;
chip->pci = pci;
chip->irq = -1;
spin_lock_init(&chip->emu_lock);
spin_lock_init(&chip->voice_lock);
err = pci_request_regions(pci, "EMU10K1X");
if (err < 0)
return err;
chip->port = pci_resource_start(pci, 0);
if (devm_request_irq(&pci->dev, pci->irq, snd_emu10k1x_interrupt,
IRQF_SHARED, KBUILD_MODNAME, chip)) {
dev_err(card->dev, "cannot grab irq %d\n", pci->irq);
return -EBUSY;
}
chip->irq = pci->irq;
card->sync_irq = chip->irq;
card->private_free = snd_emu10k1x_free;
chip->dma_buffer = snd_devm_alloc_pages(&pci->dev, SNDRV_DMA_TYPE_DEV,
4 * 1024);
if (!chip->dma_buffer)
return -ENOMEM;
pci_set_master(pci);
/* read revision & serial */
chip->revision = pci->revision;
pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &chip->serial);
pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &chip->model);
dev_info(card->dev, "Model %04x Rev %08x Serial %08x\n", chip->model,
chip->revision, chip->serial);
outl(0, chip->port + INTE);
for(ch = 0; ch < 3; ch++) {
chip->voices[ch].emu = chip;
chip->voices[ch].number = ch;
}
/*
* Init to 0x02109204 :
* Clock accuracy = 0 (1000ppm)
* Sample Rate = 2 (48kHz)
* Audio Channel = 1 (Left of 2)
* Source Number = 0 (Unspecified)
* Generation Status = 1 (Original for Cat Code 12)
* Cat Code = 12 (Digital Signal Mixer)
* Mode = 0 (Mode 0)
* Emphasis = 0 (None)
* CP = 1 (Copyright unasserted)
* AN = 0 (Audio data)
* P = 0 (Consumer)
*/
snd_emu10k1x_ptr_write(chip, SPCS0, 0,
chip->spdif_bits[0] =
SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
SPCS_GENERATIONSTATUS | 0x00001200 |
0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
snd_emu10k1x_ptr_write(chip, SPCS1, 0,
chip->spdif_bits[1] =
SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
SPCS_GENERATIONSTATUS | 0x00001200 |
0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
snd_emu10k1x_ptr_write(chip, SPCS2, 0,
chip->spdif_bits[2] =
SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
SPCS_GENERATIONSTATUS | 0x00001200 |
0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
snd_emu10k1x_ptr_write(chip, SPDIF_SELECT, 0, 0x700); // disable SPDIF
snd_emu10k1x_ptr_write(chip, ROUTING, 0, 0x1003F); // routing
snd_emu10k1x_gpio_write(chip, 0x1080); // analog mode
outl(HCFG_LOCKSOUNDCACHE|HCFG_AUDIOENABLE, chip->port+HCFG);
return 0;
}
static void snd_emu10k1x_proc_reg_read(struct snd_info_entry *entry,
struct snd_info_buffer *buffer)
{
struct emu10k1x *emu = entry->private_data;
unsigned long value,value1,value2;
unsigned long flags;
int i;
snd_iprintf(buffer, "Registers:\n\n");
for(i = 0; i < 0x20; i+=4) {
spin_lock_irqsave(&emu->emu_lock, flags);
value = inl(emu->port + i);
spin_unlock_irqrestore(&emu->emu_lock, flags);
snd_iprintf(buffer, "Register %02X: %08lX\n", i, value);
}
snd_iprintf(buffer, "\nRegisters\n\n");
for(i = 0; i <= 0x48; i++) {
value = snd_emu10k1x_ptr_read(emu, i, 0);
if(i < 0x10 || (i >= 0x20 && i < 0x40)) {
value1 = snd_emu10k1x_ptr_read(emu, i, 1);
value2 = snd_emu10k1x_ptr_read(emu, i, 2);
snd_iprintf(buffer, "%02X: %08lX %08lX %08lX\n", i, value, value1, value2);
} else {
snd_iprintf(buffer, "%02X: %08lX\n", i, value);
}
}
}
static void snd_emu10k1x_proc_reg_write(struct snd_info_entry *entry,
struct snd_info_buffer *buffer)
{
struct emu10k1x *emu = entry->private_data;
char line[64];
unsigned int reg, channel_id , val;
while (!snd_info_get_line(buffer, line, sizeof(line))) {
if (sscanf(line, "%x %x %x", ®, &channel_id, &val) != 3)
continue;
if (reg < 0x49 && channel_id <= 2)
snd_emu10k1x_ptr_write(emu, reg, channel_id, val);
}
}
static int snd_emu10k1x_proc_init(struct emu10k1x *emu)
{
snd_card_rw_proc_new(emu->card, "emu10k1x_regs", emu,
snd_emu10k1x_proc_reg_read,
snd_emu10k1x_proc_reg_write);
return 0;
}
#define snd_emu10k1x_shared_spdif_info snd_ctl_boolean_mono_info
static int snd_emu10k1x_shared_spdif_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct emu10k1x *emu = snd_kcontrol_chip(kcontrol);
ucontrol->value.integer.value[0] = (snd_emu10k1x_ptr_read(emu, SPDIF_SELECT, 0) == 0x700) ? 0 : 1;
return 0;
}
static int snd_emu10k1x_shared_spdif_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct emu10k1x *emu = snd_kcontrol_chip(kcontrol);
unsigned int val;
val = ucontrol->value.integer.value[0] ;
if (val) {
// enable spdif output
snd_emu10k1x_ptr_write(emu, SPDIF_SELECT, 0, 0x000);
snd_emu10k1x_ptr_write(emu, ROUTING, 0, 0x700);
snd_emu10k1x_gpio_write(emu, 0x1000);
} else {
// disable spdif output
snd_emu10k1x_ptr_write(emu, SPDIF_SELECT, 0, 0x700);
snd_emu10k1x_ptr_write(emu, ROUTING, 0, 0x1003F);
snd_emu10k1x_gpio_write(emu, 0x1080);
}
return 0;
}
static const struct snd_kcontrol_new snd_emu10k1x_shared_spdif =
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Analog/Digital Output Jack",
.info = snd_emu10k1x_shared_spdif_info,
.get = snd_emu10k1x_shared_spdif_get,
.put = snd_emu10k1x_shared_spdif_put
};
static int snd_emu10k1x_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
uinfo->count = 1;
return 0;
}
static int snd_emu10k1x_spdif_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct emu10k1x *emu = snd_kcontrol_chip(kcontrol);
unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
ucontrol->value.iec958.status[0] = (emu->spdif_bits[idx] >> 0) & 0xff;
ucontrol->value.iec958.status[1] = (emu->spdif_bits[idx] >> 8) & 0xff;
ucontrol->value.iec958.status[2] = (emu->spdif_bits[idx] >> 16) & 0xff;
ucontrol->value.iec958.status[3] = (emu->spdif_bits[idx] >> 24) & 0xff;
return 0;
}
static int snd_emu10k1x_spdif_get_mask(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
ucontrol->value.iec958.status[0] = 0xff;
ucontrol->value.iec958.status[1] = 0xff;
ucontrol->value.iec958.status[2] = 0xff;
ucontrol->value.iec958.status[3] = 0xff;
return 0;
}
static int snd_emu10k1x_spdif_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct emu10k1x *emu = snd_kcontrol_chip(kcontrol);
unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
int change;
unsigned int val;
val = (ucontrol->value.iec958.status[0] << 0) |
(ucontrol->value.iec958.status[1] << 8) |
(ucontrol->value.iec958.status[2] << 16) |
(ucontrol->value.iec958.status[3] << 24);
change = val != emu->spdif_bits[idx];
if (change) {
snd_emu10k1x_ptr_write(emu, SPCS0 + idx, 0, val);
emu->spdif_bits[idx] = val;
}
return change;
}
static const struct snd_kcontrol_new snd_emu10k1x_spdif_mask_control =
{
.access = SNDRV_CTL_ELEM_ACCESS_READ,
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
.name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK),
.count = 3,
.info = snd_emu10k1x_spdif_info,
.get = snd_emu10k1x_spdif_get_mask
};
static const struct snd_kcontrol_new snd_emu10k1x_spdif_control =
{
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
.name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
.count = 3,
.info = snd_emu10k1x_spdif_info,
.get = snd_emu10k1x_spdif_get,
.put = snd_emu10k1x_spdif_put
};
static int snd_emu10k1x_mixer(struct emu10k1x *emu)
{
int err;
struct snd_kcontrol *kctl;
struct snd_card *card = emu->card;
kctl = snd_ctl_new1(&snd_emu10k1x_spdif_mask_control, emu);
if (!kctl)
return -ENOMEM;
err = snd_ctl_add(card, kctl);
if (err)
return err;
kctl = snd_ctl_new1(&snd_emu10k1x_shared_spdif, emu);
if (!kctl)
return -ENOMEM;
err = snd_ctl_add(card, kctl);
if (err)
return err;
kctl = snd_ctl_new1(&snd_emu10k1x_spdif_control, emu);
if (!kctl)
return -ENOMEM;
err = snd_ctl_add(card, kctl);
if (err)
return err;
return 0;
}
#define EMU10K1X_MIDI_MODE_INPUT (1<<0)
#define EMU10K1X_MIDI_MODE_OUTPUT (1<<1)
static inline unsigned char mpu401_read(struct emu10k1x *emu, struct emu10k1x_midi *mpu, int idx)
{
return (unsigned char)snd_emu10k1x_ptr_read(emu, mpu->port + idx, 0);
}
static inline void mpu401_write(struct emu10k1x *emu, struct emu10k1x_midi *mpu, int data, int idx)
{
snd_emu10k1x_ptr_write(emu, mpu->port + idx, 0, data);
}
#define mpu401_write_data(emu, mpu, data) mpu401_write(emu, mpu, data, 0)
#define mpu401_write_cmd(emu, mpu, data) mpu401_write(emu, mpu, data, 1)
#define mpu401_read_data(emu, mpu) mpu401_read(emu, mpu, 0)
#define mpu401_read_stat(emu, mpu) mpu401_read(emu, mpu, 1)
#define mpu401_input_avail(emu,mpu) (!(mpu401_read_stat(emu,mpu) & 0x80))
#define mpu401_output_ready(emu,mpu) (!(mpu401_read_stat(emu,mpu) & 0x40))
#define MPU401_RESET 0xff
#define MPU401_ENTER_UART 0x3f
#define MPU401_ACK 0xfe
static void mpu401_clear_rx(struct emu10k1x *emu, struct emu10k1x_midi *mpu)
{
int timeout = 100000;
for (; timeout > 0 && mpu401_input_avail(emu, mpu); timeout--)
mpu401_read_data(emu, mpu);
#ifdef CONFIG_SND_DEBUG
if (timeout <= 0)
dev_err(emu->card->dev,
"cmd: clear rx timeout (status = 0x%x)\n",
mpu401_read_stat(emu, mpu));
#endif
}
/*
*/
static void do_emu10k1x_midi_interrupt(struct emu10k1x *emu,
struct emu10k1x_midi *midi, unsigned int status)
{
unsigned char byte;
if (midi->rmidi == NULL) {
snd_emu10k1x_intr_disable(emu, midi->tx_enable | midi->rx_enable);
return;
}
spin_lock(&midi->input_lock);
if ((status & midi->ipr_rx) && mpu401_input_avail(emu, midi)) {
if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_INPUT)) {
mpu401_clear_rx(emu, midi);
} else {
byte = mpu401_read_data(emu, midi);
if (midi->substream_input)
snd_rawmidi_receive(midi->substream_input, &byte, 1);
}
}
spin_unlock(&midi->input_lock);
spin_lock(&midi->output_lock);
if ((status & midi->ipr_tx) && mpu401_output_ready(emu, midi)) {
if (midi->substream_output &&
snd_rawmidi_transmit(midi->substream_output, &byte, 1) == 1) {
mpu401_write_data(emu, midi, byte);
} else {
snd_emu10k1x_intr_disable(emu, midi->tx_enable);
}
}
spin_unlock(&midi->output_lock);
}
static void snd_emu10k1x_midi_interrupt(struct emu10k1x *emu, unsigned int status)
{
do_emu10k1x_midi_interrupt(emu, &emu->midi, status);
}
static int snd_emu10k1x_midi_cmd(struct emu10k1x * emu,
struct emu10k1x_midi *midi, unsigned char cmd, int ack)
{
unsigned long flags;
int timeout, ok;
spin_lock_irqsave(&midi->input_lock, flags);
mpu401_write_data(emu, midi, 0x00);
/* mpu401_clear_rx(emu, midi); */
mpu401_write_cmd(emu, midi, cmd);
if (ack) {
ok = 0;
timeout = 10000;
while (!ok && timeout-- > 0) {
if (mpu401_input_avail(emu, midi)) {
if (mpu401_read_data(emu, midi) == MPU401_ACK)
ok = 1;
}
}
if (!ok && mpu401_read_data(emu, midi) == MPU401_ACK)
ok = 1;
} else {
ok = 1;
}
spin_unlock_irqrestore(&midi->input_lock, flags);
if (!ok) {
dev_err(emu->card->dev,
"midi_cmd: 0x%x failed at 0x%lx (status = 0x%x, data = 0x%x)!!!\n",
cmd, emu->port,
mpu401_read_stat(emu, midi),
mpu401_read_data(emu, midi));
return 1;
}
return 0;
}
static int snd_emu10k1x_midi_input_open(struct snd_rawmidi_substream *substream)
{
struct emu10k1x *emu;
struct emu10k1x_midi *midi = substream->rmidi->private_data;
unsigned long flags;
emu = midi->emu;
if (snd_BUG_ON(!emu))
return -ENXIO;
spin_lock_irqsave(&midi->open_lock, flags);
midi->midi_mode |= EMU10K1X_MIDI_MODE_INPUT;
midi->substream_input = substream;
if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_OUTPUT)) {
spin_unlock_irqrestore(&midi->open_lock, flags);
if (snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 1))
goto error_out;
if (snd_emu10k1x_midi_cmd(emu, midi, MPU401_ENTER_UART, 1))
goto error_out;
} else {
spin_unlock_irqrestore(&midi->open_lock, flags);
}
return 0;
error_out:
return -EIO;
}
static int snd_emu10k1x_midi_output_open(struct snd_rawmidi_substream *substream)
{
struct emu10k1x *emu;
struct emu10k1x_midi *midi = substream->rmidi->private_data;
unsigned long flags;
emu = midi->emu;
if (snd_BUG_ON(!emu))
return -ENXIO;
spin_lock_irqsave(&midi->open_lock, flags);
midi->midi_mode |= EMU10K1X_MIDI_MODE_OUTPUT;
midi->substream_output = substream;
if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_INPUT)) {
spin_unlock_irqrestore(&midi->open_lock, flags);
if (snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 1))
goto error_out;
if (snd_emu10k1x_midi_cmd(emu, midi, MPU401_ENTER_UART, 1))
goto error_out;
} else {
spin_unlock_irqrestore(&midi->open_lock, flags);
}
return 0;
error_out:
return -EIO;
}
static int snd_emu10k1x_midi_input_close(struct snd_rawmidi_substream *substream)
{
struct emu10k1x *emu;
struct emu10k1x_midi *midi = substream->rmidi->private_data;
unsigned long flags;
int err = 0;
emu = midi->emu;
if (snd_BUG_ON(!emu))
return -ENXIO;
spin_lock_irqsave(&midi->open_lock, flags);
snd_emu10k1x_intr_disable(emu, midi->rx_enable);
midi->midi_mode &= ~EMU10K1X_MIDI_MODE_INPUT;
midi->substream_input = NULL;
if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_OUTPUT)) {
spin_unlock_irqrestore(&midi->open_lock, flags);
err = snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 0);
} else {
spin_unlock_irqrestore(&midi->open_lock, flags);
}
return err;
}
static int snd_emu10k1x_midi_output_close(struct snd_rawmidi_substream *substream)
{
struct emu10k1x *emu;
struct emu10k1x_midi *midi = substream->rmidi->private_data;
unsigned long flags;
int err = 0;
emu = midi->emu;
if (snd_BUG_ON(!emu))
return -ENXIO;
spin_lock_irqsave(&midi->open_lock, flags);
snd_emu10k1x_intr_disable(emu, midi->tx_enable);
midi->midi_mode &= ~EMU10K1X_MIDI_MODE_OUTPUT;
midi->substream_output = NULL;
if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_INPUT)) {
spin_unlock_irqrestore(&midi->open_lock, flags);
err = snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 0);
} else {
spin_unlock_irqrestore(&midi->open_lock, flags);
}
return err;
}
static void snd_emu10k1x_midi_input_trigger(struct snd_rawmidi_substream *substream, int up)
{
struct emu10k1x *emu;
struct emu10k1x_midi *midi = substream->rmidi->private_data;
emu = midi->emu;
if (snd_BUG_ON(!emu))
return;
if (up)
snd_emu10k1x_intr_enable(emu, midi->rx_enable);
else
snd_emu10k1x_intr_disable(emu, midi->rx_enable);
}
static void snd_emu10k1x_midi_output_trigger(struct snd_rawmidi_substream *substream, int up)
{
struct emu10k1x *emu;
struct emu10k1x_midi *midi = substream->rmidi->private_data;
unsigned long flags;
emu = midi->emu;
if (snd_BUG_ON(!emu))
return;
if (up) {
int max = 4;
unsigned char byte;
/* try to send some amount of bytes here before interrupts */
spin_lock_irqsave(&midi->output_lock, flags);
while (max > 0) {
if (mpu401_output_ready(emu, midi)) {
if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_OUTPUT) ||
snd_rawmidi_transmit(substream, &byte, 1) != 1) {
/* no more data */
spin_unlock_irqrestore(&midi->output_lock, flags);
return;
}
mpu401_write_data(emu, midi, byte);
max--;
} else {
break;
}
}
spin_unlock_irqrestore(&midi->output_lock, flags);
snd_emu10k1x_intr_enable(emu, midi->tx_enable);
} else {
snd_emu10k1x_intr_disable(emu, midi->tx_enable);
}
}
/*
*/
static const struct snd_rawmidi_ops snd_emu10k1x_midi_output =
{
.open = snd_emu10k1x_midi_output_open,
.close = snd_emu10k1x_midi_output_close,
.trigger = snd_emu10k1x_midi_output_trigger,
};
static const struct snd_rawmidi_ops snd_emu10k1x_midi_input =
{
.open = snd_emu10k1x_midi_input_open,
.close = snd_emu10k1x_midi_input_close,
.trigger = snd_emu10k1x_midi_input_trigger,
};
static void snd_emu10k1x_midi_free(struct snd_rawmidi *rmidi)
{
struct emu10k1x_midi *midi = rmidi->private_data;
midi->interrupt = NULL;
midi->rmidi = NULL;
}
static int emu10k1x_midi_init(struct emu10k1x *emu,
struct emu10k1x_midi *midi, int device,
char *name)
{
struct snd_rawmidi *rmidi;
int err;
err = snd_rawmidi_new(emu->card, name, device, 1, 1, &rmidi);
if (err < 0)
return err;
midi->emu = emu;
spin_lock_init(&midi->open_lock);
spin_lock_init(&midi->input_lock);
spin_lock_init(&midi->output_lock);
strcpy(rmidi->name, name);
snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, &snd_emu10k1x_midi_output);
snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT, &snd_emu10k1x_midi_input);
rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT |
SNDRV_RAWMIDI_INFO_INPUT |
SNDRV_RAWMIDI_INFO_DUPLEX;
rmidi->private_data = midi;
rmidi->private_free = snd_emu10k1x_midi_free;
midi->rmidi = rmidi;
return 0;
}
static int snd_emu10k1x_midi(struct emu10k1x *emu)
{
struct emu10k1x_midi *midi = &emu->midi;
int err;
err = emu10k1x_midi_init(emu, midi, 0, "EMU10K1X MPU-401 (UART)");
if (err < 0)
return err;
midi->tx_enable = INTE_MIDITXENABLE;
midi->rx_enable = INTE_MIDIRXENABLE;
midi->port = MUDATA;
midi->ipr_tx = IPR_MIDITRANSBUFEMPTY;
midi->ipr_rx = IPR_MIDIRECVBUFEMPTY;
midi->interrupt = snd_emu10k1x_midi_interrupt;
return 0;
}
static int __snd_emu10k1x_probe(struct pci_dev *pci,
const struct pci_device_id *pci_id)
{
static int dev;
struct snd_card *card;
struct emu10k1x *chip;
int err;
if (dev >= SNDRV_CARDS)
return -ENODEV;
if (!enable[dev]) {
dev++;
return -ENOENT;
}
err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
sizeof(*chip), &card);
if (err < 0)
return err;
chip = card->private_data;
err = snd_emu10k1x_create(card, pci);
if (err < 0)
return err;
err = snd_emu10k1x_pcm(chip, 0);
if (err < 0)
return err;
err = snd_emu10k1x_pcm(chip, 1);
if (err < 0)
return err;
err = snd_emu10k1x_pcm(chip, 2);
if (err < 0)
return err;
err = snd_emu10k1x_ac97(chip);
if (err < 0)
return err;
err = snd_emu10k1x_mixer(chip);
if (err < 0)
return err;
err = snd_emu10k1x_midi(chip);
if (err < 0)
return err;
snd_emu10k1x_proc_init(chip);
strcpy(card->driver, "EMU10K1X");
strcpy(card->shortname, "Dell Sound Blaster Live!");
sprintf(card->longname, "%s at 0x%lx irq %i",
card->shortname, chip->port, chip->irq);
err = snd_card_register(card);
if (err < 0)
return err;
pci_set_drvdata(pci, card);
dev++;
return 0;
}
static int snd_emu10k1x_probe(struct pci_dev *pci,
const struct pci_device_id *pci_id)
{
return snd_card_free_on_error(&pci->dev, __snd_emu10k1x_probe(pci, pci_id));
}
// PCI IDs
static const struct pci_device_id snd_emu10k1x_ids[] = {
{ PCI_VDEVICE(CREATIVE, 0x0006), 0 }, /* Dell OEM version (EMU10K1) */
{ 0, }
};
MODULE_DEVICE_TABLE(pci, snd_emu10k1x_ids);
// pci_driver definition
static struct pci_driver emu10k1x_driver = {
.name = KBUILD_MODNAME,
.id_table = snd_emu10k1x_ids,
.probe = snd_emu10k1x_probe,
};
module_pci_driver(emu10k1x_driver);
| linux-master | sound/pci/emu10k1/emu10k1x.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* ALSA driver for VT1720/VT1724 (Envy24PT/Envy24HT)
*
* Lowlevel functions for VT1720-based motherboards
*
* Copyright (c) 2004 Takashi Iwai <[email protected]>
*/
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <sound/core.h>
#include "ice1712.h"
#include "envy24ht.h"
#include "vt1720_mobo.h"
static int k8x800_init(struct snd_ice1712 *ice)
{
ice->vt1720 = 1;
/* VT1616 codec */
ice->num_total_dacs = 6;
ice->num_total_adcs = 2;
/* WM8728 codec */
/* FIXME: TODO */
return 0;
}
static int k8x800_add_controls(struct snd_ice1712 *ice)
{
/* FIXME: needs some quirks for VT1616? */
return 0;
}
/* EEPROM image */
static const unsigned char k8x800_eeprom[] = {
[ICE_EEP2_SYSCONF] = 0x01, /* clock 256, 1ADC, 2DACs */
[ICE_EEP2_ACLINK] = 0x02, /* ACLINK, packed */
[ICE_EEP2_I2S] = 0x00, /* - */
[ICE_EEP2_SPDIF] = 0x00, /* - */
[ICE_EEP2_GPIO_DIR] = 0xff,
[ICE_EEP2_GPIO_DIR1] = 0xff,
[ICE_EEP2_GPIO_DIR2] = 0x00, /* - */
[ICE_EEP2_GPIO_MASK] = 0xff,
[ICE_EEP2_GPIO_MASK1] = 0xff,
[ICE_EEP2_GPIO_MASK2] = 0x00, /* - */
[ICE_EEP2_GPIO_STATE] = 0x00,
[ICE_EEP2_GPIO_STATE1] = 0x00,
[ICE_EEP2_GPIO_STATE2] = 0x00, /* - */
};
static const unsigned char sn25p_eeprom[] = {
[ICE_EEP2_SYSCONF] = 0x01, /* clock 256, 1ADC, 2DACs */
[ICE_EEP2_ACLINK] = 0x02, /* ACLINK, packed */
[ICE_EEP2_I2S] = 0x00, /* - */
[ICE_EEP2_SPDIF] = 0x41, /* - */
[ICE_EEP2_GPIO_DIR] = 0xff,
[ICE_EEP2_GPIO_DIR1] = 0xff,
[ICE_EEP2_GPIO_DIR2] = 0x00, /* - */
[ICE_EEP2_GPIO_MASK] = 0xff,
[ICE_EEP2_GPIO_MASK1] = 0xff,
[ICE_EEP2_GPIO_MASK2] = 0x00, /* - */
[ICE_EEP2_GPIO_STATE] = 0x00,
[ICE_EEP2_GPIO_STATE1] = 0x00,
[ICE_EEP2_GPIO_STATE2] = 0x00, /* - */
};
/* entry point */
struct snd_ice1712_card_info snd_vt1720_mobo_cards[] = {
{
.subvendor = VT1720_SUBDEVICE_K8X800,
.name = "Albatron K8X800 Pro II",
.model = "k8x800",
.chip_init = k8x800_init,
.build_controls = k8x800_add_controls,
.eeprom_size = sizeof(k8x800_eeprom),
.eeprom_data = k8x800_eeprom,
},
{
.subvendor = VT1720_SUBDEVICE_ZNF3_150,
.name = "Chaintech ZNF3-150",
/* identical with k8x800 */
.chip_init = k8x800_init,
.build_controls = k8x800_add_controls,
.eeprom_size = sizeof(k8x800_eeprom),
.eeprom_data = k8x800_eeprom,
},
{
.subvendor = VT1720_SUBDEVICE_ZNF3_250,
.name = "Chaintech ZNF3-250",
/* identical with k8x800 */
.chip_init = k8x800_init,
.build_controls = k8x800_add_controls,
.eeprom_size = sizeof(k8x800_eeprom),
.eeprom_data = k8x800_eeprom,
},
{
.subvendor = VT1720_SUBDEVICE_9CJS,
.name = "Chaintech 9CJS",
/* identical with k8x800 */
.chip_init = k8x800_init,
.build_controls = k8x800_add_controls,
.eeprom_size = sizeof(k8x800_eeprom),
.eeprom_data = k8x800_eeprom,
},
{
.subvendor = VT1720_SUBDEVICE_SN25P,
.name = "Shuttle SN25P",
.model = "sn25p",
.chip_init = k8x800_init,
.build_controls = k8x800_add_controls,
.eeprom_size = sizeof(k8x800_eeprom),
.eeprom_data = sn25p_eeprom,
},
{ } /* terminator */
};
| linux-master | sound/pci/ice1712/vt1720_mobo.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* ALSA driver for ICEnsemble VT1724 (Envy24HT)
*
* Lowlevel functions for Audiotrak Prodigy 7.1 Hifi
* based on pontis.c
*
* Copyright (c) 2007 Julian Scheel <[email protected]>
* Copyright (c) 2007 allank
* Copyright (c) 2004 Takashi Iwai <[email protected]>
*/
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/mutex.h>
#include <sound/core.h>
#include <sound/info.h>
#include <sound/tlv.h>
#include "ice1712.h"
#include "envy24ht.h"
#include "prodigy_hifi.h"
struct prodigy_hifi_spec {
unsigned short master[2];
unsigned short vol[8];
};
/* I2C addresses */
#define WM_DEV 0x34
/* WM8776 registers */
#define WM_HP_ATTEN_L 0x00 /* headphone left attenuation */
#define WM_HP_ATTEN_R 0x01 /* headphone left attenuation */
#define WM_HP_MASTER 0x02 /* headphone master (both channels),
override LLR */
#define WM_DAC_ATTEN_L 0x03 /* digital left attenuation */
#define WM_DAC_ATTEN_R 0x04
#define WM_DAC_MASTER 0x05
#define WM_PHASE_SWAP 0x06 /* DAC phase swap */
#define WM_DAC_CTRL1 0x07
#define WM_DAC_MUTE 0x08
#define WM_DAC_CTRL2 0x09
#define WM_DAC_INT 0x0a
#define WM_ADC_INT 0x0b
#define WM_MASTER_CTRL 0x0c
#define WM_POWERDOWN 0x0d
#define WM_ADC_ATTEN_L 0x0e
#define WM_ADC_ATTEN_R 0x0f
#define WM_ALC_CTRL1 0x10
#define WM_ALC_CTRL2 0x11
#define WM_ALC_CTRL3 0x12
#define WM_NOISE_GATE 0x13
#define WM_LIMITER 0x14
#define WM_ADC_MUX 0x15
#define WM_OUT_MUX 0x16
#define WM_RESET 0x17
/* Analog Recording Source :- Mic, LineIn, CD/Video, */
/* implement capture source select control for WM8776 */
#define WM_AIN1 "AIN1"
#define WM_AIN2 "AIN2"
#define WM_AIN3 "AIN3"
#define WM_AIN4 "AIN4"
#define WM_AIN5 "AIN5"
/* GPIO pins of envy24ht connected to wm8766 */
#define WM8766_SPI_CLK (1<<17) /* CLK, Pin97 on ICE1724 */
#define WM8766_SPI_MD (1<<16) /* DATA VT1724 -> WM8766, Pin96 */
#define WM8766_SPI_ML (1<<18) /* Latch, Pin98 */
/* WM8766 registers */
#define WM8766_DAC_CTRL 0x02 /* DAC Control */
#define WM8766_INT_CTRL 0x03 /* Interface Control */
#define WM8766_DAC_CTRL2 0x09
#define WM8766_DAC_CTRL3 0x0a
#define WM8766_RESET 0x1f
#define WM8766_LDA1 0x00
#define WM8766_LDA2 0x04
#define WM8766_LDA3 0x06
#define WM8766_RDA1 0x01
#define WM8766_RDA2 0x05
#define WM8766_RDA3 0x07
#define WM8766_MUTE1 0x0C
#define WM8766_MUTE2 0x0F
/*
* Prodigy HD2
*/
#define AK4396_ADDR 0x00
#define AK4396_CSN (1 << 8) /* CSN->GPIO8, pin 75 */
#define AK4396_CCLK (1 << 9) /* CCLK->GPIO9, pin 76 */
#define AK4396_CDTI (1 << 10) /* CDTI->GPIO10, pin 77 */
/* ak4396 registers */
#define AK4396_CTRL1 0x00
#define AK4396_CTRL2 0x01
#define AK4396_CTRL3 0x02
#define AK4396_LCH_ATT 0x03
#define AK4396_RCH_ATT 0x04
/*
* get the current register value of WM codec
*/
static unsigned short wm_get(struct snd_ice1712 *ice, int reg)
{
reg <<= 1;
return ((unsigned short)ice->akm[0].images[reg] << 8) |
ice->akm[0].images[reg + 1];
}
/*
* set the register value of WM codec and remember it
*/
static void wm_put_nocache(struct snd_ice1712 *ice, int reg, unsigned short val)
{
unsigned short cval;
cval = (reg << 9) | val;
snd_vt1724_write_i2c(ice, WM_DEV, cval >> 8, cval & 0xff);
}
static void wm_put(struct snd_ice1712 *ice, int reg, unsigned short val)
{
wm_put_nocache(ice, reg, val);
reg <<= 1;
ice->akm[0].images[reg] = val >> 8;
ice->akm[0].images[reg + 1] = val;
}
/*
* write data in the SPI mode
*/
static void set_gpio_bit(struct snd_ice1712 *ice, unsigned int bit, int val)
{
unsigned int tmp = snd_ice1712_gpio_read(ice);
if (val)
tmp |= bit;
else
tmp &= ~bit;
snd_ice1712_gpio_write(ice, tmp);
}
/*
* SPI implementation for WM8766 codec - only writing supported, no readback
*/
static void wm8766_spi_send_word(struct snd_ice1712 *ice, unsigned int data)
{
int i;
for (i = 0; i < 16; i++) {
set_gpio_bit(ice, WM8766_SPI_CLK, 0);
udelay(1);
set_gpio_bit(ice, WM8766_SPI_MD, data & 0x8000);
udelay(1);
set_gpio_bit(ice, WM8766_SPI_CLK, 1);
udelay(1);
data <<= 1;
}
}
static void wm8766_spi_write(struct snd_ice1712 *ice, unsigned int reg,
unsigned int data)
{
unsigned int block;
snd_ice1712_gpio_set_dir(ice, WM8766_SPI_MD|
WM8766_SPI_CLK|WM8766_SPI_ML);
snd_ice1712_gpio_set_mask(ice, ~(WM8766_SPI_MD|
WM8766_SPI_CLK|WM8766_SPI_ML));
/* latch must be low when writing */
set_gpio_bit(ice, WM8766_SPI_ML, 0);
block = (reg << 9) | (data & 0x1ff);
wm8766_spi_send_word(ice, block); /* REGISTER ADDRESS */
/* release latch */
set_gpio_bit(ice, WM8766_SPI_ML, 1);
udelay(1);
/* restore */
snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
}
/*
* serial interface for ak4396 - only writing supported, no readback
*/
static void ak4396_send_word(struct snd_ice1712 *ice, unsigned int data)
{
int i;
for (i = 0; i < 16; i++) {
set_gpio_bit(ice, AK4396_CCLK, 0);
udelay(1);
set_gpio_bit(ice, AK4396_CDTI, data & 0x8000);
udelay(1);
set_gpio_bit(ice, AK4396_CCLK, 1);
udelay(1);
data <<= 1;
}
}
static void ak4396_write(struct snd_ice1712 *ice, unsigned int reg,
unsigned int data)
{
unsigned int block;
snd_ice1712_gpio_set_dir(ice, AK4396_CSN|AK4396_CCLK|AK4396_CDTI);
snd_ice1712_gpio_set_mask(ice, ~(AK4396_CSN|AK4396_CCLK|AK4396_CDTI));
/* latch must be low when writing */
set_gpio_bit(ice, AK4396_CSN, 0);
block = ((AK4396_ADDR & 0x03) << 14) | (1 << 13) |
((reg & 0x1f) << 8) | (data & 0xff);
ak4396_send_word(ice, block); /* REGISTER ADDRESS */
/* release latch */
set_gpio_bit(ice, AK4396_CSN, 1);
udelay(1);
/* restore */
snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
}
/*
* ak4396 mixers
*/
/*
* DAC volume attenuation mixer control (-64dB to 0dB)
*/
static int ak4396_dac_vol_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 2;
uinfo->value.integer.min = 0; /* mute */
uinfo->value.integer.max = 0xFF; /* linear */
return 0;
}
static int ak4396_dac_vol_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
struct prodigy_hifi_spec *spec = ice->spec;
int i;
for (i = 0; i < 2; i++)
ucontrol->value.integer.value[i] = spec->vol[i];
return 0;
}
static int ak4396_dac_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
struct prodigy_hifi_spec *spec = ice->spec;
int i;
int change = 0;
mutex_lock(&ice->gpio_mutex);
for (i = 0; i < 2; i++) {
if (ucontrol->value.integer.value[i] != spec->vol[i]) {
spec->vol[i] = ucontrol->value.integer.value[i];
ak4396_write(ice, AK4396_LCH_ATT + i,
spec->vol[i] & 0xff);
change = 1;
}
}
mutex_unlock(&ice->gpio_mutex);
return change;
}
static const DECLARE_TLV_DB_SCALE(db_scale_wm_dac, -12700, 100, 1);
static const DECLARE_TLV_DB_LINEAR(ak4396_db_scale, TLV_DB_GAIN_MUTE, 0);
static const struct snd_kcontrol_new prodigy_hd2_controls[] = {
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "Front Playback Volume",
.info = ak4396_dac_vol_info,
.get = ak4396_dac_vol_get,
.put = ak4396_dac_vol_put,
.tlv = { .p = ak4396_db_scale },
},
};
/* --------------- */
#define WM_VOL_MAX 255
#define WM_VOL_MUTE 0x8000
#define DAC_0dB 0xff
#define DAC_RES 128
#define DAC_MIN (DAC_0dB - DAC_RES)
static void wm_set_vol(struct snd_ice1712 *ice, unsigned int index,
unsigned short vol, unsigned short master)
{
unsigned char nvol;
if ((master & WM_VOL_MUTE) || (vol & WM_VOL_MUTE))
nvol = 0;
else {
nvol = (((vol & ~WM_VOL_MUTE) * (master & ~WM_VOL_MUTE)) / 128)
& WM_VOL_MAX;
nvol = (nvol ? (nvol + DAC_MIN) : 0) & 0xff;
}
wm_put(ice, index, nvol);
wm_put_nocache(ice, index, 0x100 | nvol);
}
static void wm8766_set_vol(struct snd_ice1712 *ice, unsigned int index,
unsigned short vol, unsigned short master)
{
unsigned char nvol;
if ((master & WM_VOL_MUTE) || (vol & WM_VOL_MUTE))
nvol = 0;
else {
nvol = (((vol & ~WM_VOL_MUTE) * (master & ~WM_VOL_MUTE)) / 128)
& WM_VOL_MAX;
nvol = (nvol ? (nvol + DAC_MIN) : 0) & 0xff;
}
wm8766_spi_write(ice, index, (0x0100 | nvol));
}
/*
* DAC volume attenuation mixer control (-64dB to 0dB)
*/
static int wm_dac_vol_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 2;
uinfo->value.integer.min = 0; /* mute */
uinfo->value.integer.max = DAC_RES; /* 0dB, 0.5dB step */
return 0;
}
static int wm_dac_vol_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
struct prodigy_hifi_spec *spec = ice->spec;
int i;
for (i = 0; i < 2; i++)
ucontrol->value.integer.value[i] =
spec->vol[2 + i] & ~WM_VOL_MUTE;
return 0;
}
static int wm_dac_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
struct prodigy_hifi_spec *spec = ice->spec;
int i, idx, change = 0;
mutex_lock(&ice->gpio_mutex);
for (i = 0; i < 2; i++) {
if (ucontrol->value.integer.value[i] != spec->vol[2 + i]) {
idx = WM_DAC_ATTEN_L + i;
spec->vol[2 + i] &= WM_VOL_MUTE;
spec->vol[2 + i] |= ucontrol->value.integer.value[i];
wm_set_vol(ice, idx, spec->vol[2 + i], spec->master[i]);
change = 1;
}
}
mutex_unlock(&ice->gpio_mutex);
return change;
}
/*
* WM8766 DAC volume attenuation mixer control
*/
static int wm8766_vol_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
int voices = kcontrol->private_value >> 8;
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = voices;
uinfo->value.integer.min = 0; /* mute */
uinfo->value.integer.max = DAC_RES; /* 0dB */
return 0;
}
static int wm8766_vol_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
struct prodigy_hifi_spec *spec = ice->spec;
int i, ofs, voices;
voices = kcontrol->private_value >> 8;
ofs = kcontrol->private_value & 0xff;
for (i = 0; i < voices; i++)
ucontrol->value.integer.value[i] = spec->vol[ofs + i];
return 0;
}
static int wm8766_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
struct prodigy_hifi_spec *spec = ice->spec;
int i, idx, ofs, voices;
int change = 0;
voices = kcontrol->private_value >> 8;
ofs = kcontrol->private_value & 0xff;
mutex_lock(&ice->gpio_mutex);
for (i = 0; i < voices; i++) {
if (ucontrol->value.integer.value[i] != spec->vol[ofs + i]) {
idx = WM8766_LDA1 + ofs + i;
spec->vol[ofs + i] &= WM_VOL_MUTE;
spec->vol[ofs + i] |= ucontrol->value.integer.value[i];
wm8766_set_vol(ice, idx,
spec->vol[ofs + i], spec->master[i]);
change = 1;
}
}
mutex_unlock(&ice->gpio_mutex);
return change;
}
/*
* Master volume attenuation mixer control / applied to WM8776+WM8766
*/
static int wm_master_vol_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 2;
uinfo->value.integer.min = 0;
uinfo->value.integer.max = DAC_RES;
return 0;
}
static int wm_master_vol_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
struct prodigy_hifi_spec *spec = ice->spec;
int i;
for (i = 0; i < 2; i++)
ucontrol->value.integer.value[i] = spec->master[i];
return 0;
}
static int wm_master_vol_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
struct prodigy_hifi_spec *spec = ice->spec;
int ch, change = 0;
mutex_lock(&ice->gpio_mutex);
for (ch = 0; ch < 2; ch++) {
if (ucontrol->value.integer.value[ch] != spec->master[ch]) {
spec->master[ch] = ucontrol->value.integer.value[ch];
/* Apply to front DAC */
wm_set_vol(ice, WM_DAC_ATTEN_L + ch,
spec->vol[2 + ch], spec->master[ch]);
wm8766_set_vol(ice, WM8766_LDA1 + ch,
spec->vol[0 + ch], spec->master[ch]);
wm8766_set_vol(ice, WM8766_LDA2 + ch,
spec->vol[4 + ch], spec->master[ch]);
wm8766_set_vol(ice, WM8766_LDA3 + ch,
spec->vol[6 + ch], spec->master[ch]);
change = 1;
}
}
mutex_unlock(&ice->gpio_mutex);
return change;
}
/* KONSTI */
static int wm_adc_mux_enum_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
static const char * const texts[32] = {
"NULL", WM_AIN1, WM_AIN2, WM_AIN1 "+" WM_AIN2,
WM_AIN3, WM_AIN1 "+" WM_AIN3, WM_AIN2 "+" WM_AIN3,
WM_AIN1 "+" WM_AIN2 "+" WM_AIN3,
WM_AIN4, WM_AIN1 "+" WM_AIN4, WM_AIN2 "+" WM_AIN4,
WM_AIN1 "+" WM_AIN2 "+" WM_AIN4,
WM_AIN3 "+" WM_AIN4, WM_AIN1 "+" WM_AIN3 "+" WM_AIN4,
WM_AIN2 "+" WM_AIN3 "+" WM_AIN4,
WM_AIN1 "+" WM_AIN2 "+" WM_AIN3 "+" WM_AIN4,
WM_AIN5, WM_AIN1 "+" WM_AIN5, WM_AIN2 "+" WM_AIN5,
WM_AIN1 "+" WM_AIN2 "+" WM_AIN5,
WM_AIN3 "+" WM_AIN5, WM_AIN1 "+" WM_AIN3 "+" WM_AIN5,
WM_AIN2 "+" WM_AIN3 "+" WM_AIN5,
WM_AIN1 "+" WM_AIN2 "+" WM_AIN3 "+" WM_AIN5,
WM_AIN4 "+" WM_AIN5, WM_AIN1 "+" WM_AIN4 "+" WM_AIN5,
WM_AIN2 "+" WM_AIN4 "+" WM_AIN5,
WM_AIN1 "+" WM_AIN2 "+" WM_AIN4 "+" WM_AIN5,
WM_AIN3 "+" WM_AIN4 "+" WM_AIN5,
WM_AIN1 "+" WM_AIN3 "+" WM_AIN4 "+" WM_AIN5,
WM_AIN2 "+" WM_AIN3 "+" WM_AIN4 "+" WM_AIN5,
WM_AIN1 "+" WM_AIN2 "+" WM_AIN3 "+" WM_AIN4 "+" WM_AIN5
};
return snd_ctl_enum_info(uinfo, 1, 32, texts);
}
static int wm_adc_mux_enum_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
mutex_lock(&ice->gpio_mutex);
ucontrol->value.enumerated.item[0] = wm_get(ice, WM_ADC_MUX) & 0x1f;
mutex_unlock(&ice->gpio_mutex);
return 0;
}
static int wm_adc_mux_enum_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned short oval, nval;
int change = 0;
mutex_lock(&ice->gpio_mutex);
oval = wm_get(ice, WM_ADC_MUX);
nval = (oval & 0xe0) | ucontrol->value.enumerated.item[0];
if (nval != oval) {
wm_put(ice, WM_ADC_MUX, nval);
change = 1;
}
mutex_unlock(&ice->gpio_mutex);
return change;
}
/* KONSTI */
/*
* ADC gain mixer control (-64dB to 0dB)
*/
#define ADC_0dB 0xcf
#define ADC_RES 128
#define ADC_MIN (ADC_0dB - ADC_RES)
static int wm_adc_vol_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 2;
uinfo->value.integer.min = 0; /* mute (-64dB) */
uinfo->value.integer.max = ADC_RES; /* 0dB, 0.5dB step */
return 0;
}
static int wm_adc_vol_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned short val;
int i;
mutex_lock(&ice->gpio_mutex);
for (i = 0; i < 2; i++) {
val = wm_get(ice, WM_ADC_ATTEN_L + i) & 0xff;
val = val > ADC_MIN ? (val - ADC_MIN) : 0;
ucontrol->value.integer.value[i] = val;
}
mutex_unlock(&ice->gpio_mutex);
return 0;
}
static int wm_adc_vol_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned short ovol, nvol;
int i, idx, change = 0;
mutex_lock(&ice->gpio_mutex);
for (i = 0; i < 2; i++) {
nvol = ucontrol->value.integer.value[i];
nvol = nvol ? (nvol + ADC_MIN) : 0;
idx = WM_ADC_ATTEN_L + i;
ovol = wm_get(ice, idx) & 0xff;
if (ovol != nvol) {
wm_put(ice, idx, nvol);
change = 1;
}
}
mutex_unlock(&ice->gpio_mutex);
return change;
}
/*
* ADC input mux mixer control
*/
#define wm_adc_mux_info snd_ctl_boolean_mono_info
static int wm_adc_mux_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int bit = kcontrol->private_value;
mutex_lock(&ice->gpio_mutex);
ucontrol->value.integer.value[0] =
(wm_get(ice, WM_ADC_MUX) & (1 << bit)) ? 1 : 0;
mutex_unlock(&ice->gpio_mutex);
return 0;
}
static int wm_adc_mux_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int bit = kcontrol->private_value;
unsigned short oval, nval;
int change;
mutex_lock(&ice->gpio_mutex);
nval = oval = wm_get(ice, WM_ADC_MUX);
if (ucontrol->value.integer.value[0])
nval |= (1 << bit);
else
nval &= ~(1 << bit);
change = nval != oval;
if (change) {
wm_put(ice, WM_ADC_MUX, nval);
}
mutex_unlock(&ice->gpio_mutex);
return 0;
}
/*
* Analog bypass (In -> Out)
*/
#define wm_bypass_info snd_ctl_boolean_mono_info
static int wm_bypass_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
mutex_lock(&ice->gpio_mutex);
ucontrol->value.integer.value[0] =
(wm_get(ice, WM_OUT_MUX) & 0x04) ? 1 : 0;
mutex_unlock(&ice->gpio_mutex);
return 0;
}
static int wm_bypass_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned short val, oval;
int change = 0;
mutex_lock(&ice->gpio_mutex);
val = oval = wm_get(ice, WM_OUT_MUX);
if (ucontrol->value.integer.value[0])
val |= 0x04;
else
val &= ~0x04;
if (val != oval) {
wm_put(ice, WM_OUT_MUX, val);
change = 1;
}
mutex_unlock(&ice->gpio_mutex);
return change;
}
/*
* Left/Right swap
*/
#define wm_chswap_info snd_ctl_boolean_mono_info
static int wm_chswap_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
mutex_lock(&ice->gpio_mutex);
ucontrol->value.integer.value[0] =
(wm_get(ice, WM_DAC_CTRL1) & 0xf0) != 0x90;
mutex_unlock(&ice->gpio_mutex);
return 0;
}
static int wm_chswap_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned short val, oval;
int change = 0;
mutex_lock(&ice->gpio_mutex);
oval = wm_get(ice, WM_DAC_CTRL1);
val = oval & 0x0f;
if (ucontrol->value.integer.value[0])
val |= 0x60;
else
val |= 0x90;
if (val != oval) {
wm_put(ice, WM_DAC_CTRL1, val);
wm_put_nocache(ice, WM_DAC_CTRL1, val);
change = 1;
}
mutex_unlock(&ice->gpio_mutex);
return change;
}
/*
* mixers
*/
static const struct snd_kcontrol_new prodigy_hifi_controls[] = {
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "Master Playback Volume",
.info = wm_master_vol_info,
.get = wm_master_vol_get,
.put = wm_master_vol_put,
.tlv = { .p = db_scale_wm_dac }
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "Front Playback Volume",
.info = wm_dac_vol_info,
.get = wm_dac_vol_get,
.put = wm_dac_vol_put,
.tlv = { .p = db_scale_wm_dac },
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "Rear Playback Volume",
.info = wm8766_vol_info,
.get = wm8766_vol_get,
.put = wm8766_vol_put,
.private_value = (2 << 8) | 0,
.tlv = { .p = db_scale_wm_dac },
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "Center Playback Volume",
.info = wm8766_vol_info,
.get = wm8766_vol_get,
.put = wm8766_vol_put,
.private_value = (1 << 8) | 4,
.tlv = { .p = db_scale_wm_dac }
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "LFE Playback Volume",
.info = wm8766_vol_info,
.get = wm8766_vol_get,
.put = wm8766_vol_put,
.private_value = (1 << 8) | 5,
.tlv = { .p = db_scale_wm_dac }
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "Side Playback Volume",
.info = wm8766_vol_info,
.get = wm8766_vol_get,
.put = wm8766_vol_put,
.private_value = (2 << 8) | 6,
.tlv = { .p = db_scale_wm_dac },
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "Capture Volume",
.info = wm_adc_vol_info,
.get = wm_adc_vol_get,
.put = wm_adc_vol_put,
.tlv = { .p = db_scale_wm_dac },
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "CD Capture Switch",
.info = wm_adc_mux_info,
.get = wm_adc_mux_get,
.put = wm_adc_mux_put,
.private_value = 0,
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Line Capture Switch",
.info = wm_adc_mux_info,
.get = wm_adc_mux_get,
.put = wm_adc_mux_put,
.private_value = 1,
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Analog Bypass Switch",
.info = wm_bypass_info,
.get = wm_bypass_get,
.put = wm_bypass_put,
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Swap Output Channels",
.info = wm_chswap_info,
.get = wm_chswap_get,
.put = wm_chswap_put,
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Analog Capture Source",
.info = wm_adc_mux_enum_info,
.get = wm_adc_mux_enum_get,
.put = wm_adc_mux_enum_put,
},
};
/*
* WM codec registers
*/
static void wm_proc_regs_write(struct snd_info_entry *entry,
struct snd_info_buffer *buffer)
{
struct snd_ice1712 *ice = entry->private_data;
char line[64];
unsigned int reg, val;
mutex_lock(&ice->gpio_mutex);
while (!snd_info_get_line(buffer, line, sizeof(line))) {
if (sscanf(line, "%x %x", ®, &val) != 2)
continue;
if (reg <= 0x17 && val <= 0xffff)
wm_put(ice, reg, val);
}
mutex_unlock(&ice->gpio_mutex);
}
static void wm_proc_regs_read(struct snd_info_entry *entry,
struct snd_info_buffer *buffer)
{
struct snd_ice1712 *ice = entry->private_data;
int reg, val;
mutex_lock(&ice->gpio_mutex);
for (reg = 0; reg <= 0x17; reg++) {
val = wm_get(ice, reg);
snd_iprintf(buffer, "%02x = %04x\n", reg, val);
}
mutex_unlock(&ice->gpio_mutex);
}
static void wm_proc_init(struct snd_ice1712 *ice)
{
snd_card_rw_proc_new(ice->card, "wm_codec", ice, wm_proc_regs_read,
wm_proc_regs_write);
}
static int prodigy_hifi_add_controls(struct snd_ice1712 *ice)
{
unsigned int i;
int err;
for (i = 0; i < ARRAY_SIZE(prodigy_hifi_controls); i++) {
err = snd_ctl_add(ice->card,
snd_ctl_new1(&prodigy_hifi_controls[i], ice));
if (err < 0)
return err;
}
wm_proc_init(ice);
return 0;
}
static int prodigy_hd2_add_controls(struct snd_ice1712 *ice)
{
unsigned int i;
int err;
for (i = 0; i < ARRAY_SIZE(prodigy_hd2_controls); i++) {
err = snd_ctl_add(ice->card,
snd_ctl_new1(&prodigy_hd2_controls[i], ice));
if (err < 0)
return err;
}
wm_proc_init(ice);
return 0;
}
static void wm8766_init(struct snd_ice1712 *ice)
{
static const unsigned short wm8766_inits[] = {
WM8766_RESET, 0x0000,
WM8766_DAC_CTRL, 0x0120,
WM8766_INT_CTRL, 0x0022, /* I2S Normal Mode, 24 bit */
WM8766_DAC_CTRL2, 0x0001,
WM8766_DAC_CTRL3, 0x0080,
WM8766_LDA1, 0x0100,
WM8766_LDA2, 0x0100,
WM8766_LDA3, 0x0100,
WM8766_RDA1, 0x0100,
WM8766_RDA2, 0x0100,
WM8766_RDA3, 0x0100,
WM8766_MUTE1, 0x0000,
WM8766_MUTE2, 0x0000,
};
unsigned int i;
for (i = 0; i < ARRAY_SIZE(wm8766_inits); i += 2)
wm8766_spi_write(ice, wm8766_inits[i], wm8766_inits[i + 1]);
}
static void wm8776_init(struct snd_ice1712 *ice)
{
static const unsigned short wm8776_inits[] = {
/* These come first to reduce init pop noise */
WM_ADC_MUX, 0x0003, /* ADC mute */
/* 0x00c0 replaced by 0x0003 */
WM_DAC_MUTE, 0x0001, /* DAC softmute */
WM_DAC_CTRL1, 0x0000, /* DAC mute */
WM_POWERDOWN, 0x0008, /* All power-up except HP */
WM_RESET, 0x0000, /* reset */
};
unsigned int i;
for (i = 0; i < ARRAY_SIZE(wm8776_inits); i += 2)
wm_put(ice, wm8776_inits[i], wm8776_inits[i + 1]);
}
#ifdef CONFIG_PM_SLEEP
static int prodigy_hifi_resume(struct snd_ice1712 *ice)
{
static const unsigned short wm8776_reinit_registers[] = {
WM_MASTER_CTRL,
WM_DAC_INT,
WM_ADC_INT,
WM_OUT_MUX,
WM_HP_ATTEN_L,
WM_HP_ATTEN_R,
WM_PHASE_SWAP,
WM_DAC_CTRL2,
WM_ADC_ATTEN_L,
WM_ADC_ATTEN_R,
WM_ALC_CTRL1,
WM_ALC_CTRL2,
WM_ALC_CTRL3,
WM_NOISE_GATE,
WM_ADC_MUX,
/* no DAC attenuation here */
};
struct prodigy_hifi_spec *spec = ice->spec;
int i, ch;
mutex_lock(&ice->gpio_mutex);
/* reinitialize WM8776 and re-apply old register values */
wm8776_init(ice);
schedule_timeout_uninterruptible(1);
for (i = 0; i < ARRAY_SIZE(wm8776_reinit_registers); i++)
wm_put(ice, wm8776_reinit_registers[i],
wm_get(ice, wm8776_reinit_registers[i]));
/* reinitialize WM8766 and re-apply volumes for all DACs */
wm8766_init(ice);
for (ch = 0; ch < 2; ch++) {
wm_set_vol(ice, WM_DAC_ATTEN_L + ch,
spec->vol[2 + ch], spec->master[ch]);
wm8766_set_vol(ice, WM8766_LDA1 + ch,
spec->vol[0 + ch], spec->master[ch]);
wm8766_set_vol(ice, WM8766_LDA2 + ch,
spec->vol[4 + ch], spec->master[ch]);
wm8766_set_vol(ice, WM8766_LDA3 + ch,
spec->vol[6 + ch], spec->master[ch]);
}
/* unmute WM8776 DAC */
wm_put(ice, WM_DAC_MUTE, 0x00);
wm_put(ice, WM_DAC_CTRL1, 0x90);
mutex_unlock(&ice->gpio_mutex);
return 0;
}
#endif
/*
* initialize the chip
*/
static int prodigy_hifi_init(struct snd_ice1712 *ice)
{
static const unsigned short wm8776_defaults[] = {
WM_MASTER_CTRL, 0x0022, /* 256fs, slave mode */
WM_DAC_INT, 0x0022, /* I2S, normal polarity, 24bit */
WM_ADC_INT, 0x0022, /* I2S, normal polarity, 24bit */
WM_DAC_CTRL1, 0x0090, /* DAC L/R */
WM_OUT_MUX, 0x0001, /* OUT DAC */
WM_HP_ATTEN_L, 0x0179, /* HP 0dB */
WM_HP_ATTEN_R, 0x0179, /* HP 0dB */
WM_DAC_ATTEN_L, 0x0000, /* DAC 0dB */
WM_DAC_ATTEN_L, 0x0100, /* DAC 0dB */
WM_DAC_ATTEN_R, 0x0000, /* DAC 0dB */
WM_DAC_ATTEN_R, 0x0100, /* DAC 0dB */
WM_PHASE_SWAP, 0x0000, /* phase normal */
#if 0
WM_DAC_MASTER, 0x0100, /* DAC master muted */
#endif
WM_DAC_CTRL2, 0x0000, /* no deemphasis, no ZFLG */
WM_ADC_ATTEN_L, 0x0000, /* ADC muted */
WM_ADC_ATTEN_R, 0x0000, /* ADC muted */
#if 1
WM_ALC_CTRL1, 0x007b, /* */
WM_ALC_CTRL2, 0x0000, /* */
WM_ALC_CTRL3, 0x0000, /* */
WM_NOISE_GATE, 0x0000, /* */
#endif
WM_DAC_MUTE, 0x0000, /* DAC unmute */
WM_ADC_MUX, 0x0003, /* ADC unmute, both CD/Line On */
};
struct prodigy_hifi_spec *spec;
unsigned int i;
ice->vt1720 = 0;
ice->vt1724 = 1;
ice->num_total_dacs = 8;
ice->num_total_adcs = 1;
/* HACK - use this as the SPDIF source.
* don't call snd_ice1712_gpio_get/put(), otherwise it's overwritten
*/
ice->gpio.saved[0] = 0;
/* to remember the register values */
ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
if (! ice->akm)
return -ENOMEM;
ice->akm_codecs = 1;
spec = kzalloc(sizeof(*spec), GFP_KERNEL);
if (!spec)
return -ENOMEM;
ice->spec = spec;
/* initialize WM8776 codec */
wm8776_init(ice);
schedule_timeout_uninterruptible(1);
for (i = 0; i < ARRAY_SIZE(wm8776_defaults); i += 2)
wm_put(ice, wm8776_defaults[i], wm8776_defaults[i + 1]);
wm8766_init(ice);
#ifdef CONFIG_PM_SLEEP
ice->pm_resume = &prodigy_hifi_resume;
ice->pm_suspend_enabled = 1;
#endif
return 0;
}
/*
* initialize the chip
*/
static void ak4396_init(struct snd_ice1712 *ice)
{
static const unsigned short ak4396_inits[] = {
AK4396_CTRL1, 0x87, /* I2S Normal Mode, 24 bit */
AK4396_CTRL2, 0x02,
AK4396_CTRL3, 0x00,
AK4396_LCH_ATT, 0x00,
AK4396_RCH_ATT, 0x00,
};
unsigned int i;
/* initialize ak4396 codec */
/* reset codec */
ak4396_write(ice, AK4396_CTRL1, 0x86);
msleep(100);
ak4396_write(ice, AK4396_CTRL1, 0x87);
for (i = 0; i < ARRAY_SIZE(ak4396_inits); i += 2)
ak4396_write(ice, ak4396_inits[i], ak4396_inits[i+1]);
}
#ifdef CONFIG_PM_SLEEP
static int prodigy_hd2_resume(struct snd_ice1712 *ice)
{
/* initialize ak4396 codec and restore previous mixer volumes */
struct prodigy_hifi_spec *spec = ice->spec;
int i;
mutex_lock(&ice->gpio_mutex);
ak4396_init(ice);
for (i = 0; i < 2; i++)
ak4396_write(ice, AK4396_LCH_ATT + i, spec->vol[i] & 0xff);
mutex_unlock(&ice->gpio_mutex);
return 0;
}
#endif
static int prodigy_hd2_init(struct snd_ice1712 *ice)
{
struct prodigy_hifi_spec *spec;
ice->vt1720 = 0;
ice->vt1724 = 1;
ice->num_total_dacs = 1;
ice->num_total_adcs = 1;
/* HACK - use this as the SPDIF source.
* don't call snd_ice1712_gpio_get/put(), otherwise it's overwritten
*/
ice->gpio.saved[0] = 0;
/* to remember the register values */
ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
if (! ice->akm)
return -ENOMEM;
ice->akm_codecs = 1;
spec = kzalloc(sizeof(*spec), GFP_KERNEL);
if (!spec)
return -ENOMEM;
ice->spec = spec;
#ifdef CONFIG_PM_SLEEP
ice->pm_resume = &prodigy_hd2_resume;
ice->pm_suspend_enabled = 1;
#endif
ak4396_init(ice);
return 0;
}
static const unsigned char prodigy71hifi_eeprom[] = {
0x4b, /* SYSCONF: clock 512, spdif-in/ADC, 4DACs */
0x80, /* ACLINK: I2S */
0xfc, /* I2S: vol, 96k, 24bit, 192k */
0xc3, /* SPDIF: out-en, out-int, spdif-in */
0xff, /* GPIO_DIR */
0xff, /* GPIO_DIR1 */
0x5f, /* GPIO_DIR2 */
0x00, /* GPIO_MASK */
0x00, /* GPIO_MASK1 */
0x00, /* GPIO_MASK2 */
0x00, /* GPIO_STATE */
0x00, /* GPIO_STATE1 */
0x00, /* GPIO_STATE2 */
};
static const unsigned char prodigyhd2_eeprom[] = {
0x4b, /* SYSCONF: clock 512, spdif-in/ADC, 4DACs */
0x80, /* ACLINK: I2S */
0xfc, /* I2S: vol, 96k, 24bit, 192k */
0xc3, /* SPDIF: out-en, out-int, spdif-in */
0xff, /* GPIO_DIR */
0xff, /* GPIO_DIR1 */
0x5f, /* GPIO_DIR2 */
0x00, /* GPIO_MASK */
0x00, /* GPIO_MASK1 */
0x00, /* GPIO_MASK2 */
0x00, /* GPIO_STATE */
0x00, /* GPIO_STATE1 */
0x00, /* GPIO_STATE2 */
};
static const unsigned char fortissimo4_eeprom[] = {
0x43, /* SYSCONF: clock 512, ADC, 4DACs */
0x80, /* ACLINK: I2S */
0xfc, /* I2S: vol, 96k, 24bit, 192k */
0xc1, /* SPDIF: out-en, out-int */
0xff, /* GPIO_DIR */
0xff, /* GPIO_DIR1 */
0x5f, /* GPIO_DIR2 */
0x00, /* GPIO_MASK */
0x00, /* GPIO_MASK1 */
0x00, /* GPIO_MASK2 */
0x00, /* GPIO_STATE */
0x00, /* GPIO_STATE1 */
0x00, /* GPIO_STATE2 */
};
/* entry point */
struct snd_ice1712_card_info snd_vt1724_prodigy_hifi_cards[] = {
{
.subvendor = VT1724_SUBDEVICE_PRODIGY_HIFI,
.name = "Audiotrak Prodigy 7.1 HiFi",
.model = "prodigy71hifi",
.chip_init = prodigy_hifi_init,
.build_controls = prodigy_hifi_add_controls,
.eeprom_size = sizeof(prodigy71hifi_eeprom),
.eeprom_data = prodigy71hifi_eeprom,
.driver = "Prodigy71HIFI",
},
{
.subvendor = VT1724_SUBDEVICE_PRODIGY_HD2,
.name = "Audiotrak Prodigy HD2",
.model = "prodigyhd2",
.chip_init = prodigy_hd2_init,
.build_controls = prodigy_hd2_add_controls,
.eeprom_size = sizeof(prodigyhd2_eeprom),
.eeprom_data = prodigyhd2_eeprom,
.driver = "Prodigy71HD2",
},
{
.subvendor = VT1724_SUBDEVICE_FORTISSIMO4,
.name = "Hercules Fortissimo IV",
.model = "fortissimo4",
.chip_init = prodigy_hifi_init,
.build_controls = prodigy_hifi_add_controls,
.eeprom_size = sizeof(fortissimo4_eeprom),
.eeprom_data = fortissimo4_eeprom,
.driver = "Fortissimo4",
},
{ } /* terminator */
};
| linux-master | sound/pci/ice1712/prodigy_hifi.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* ALSA driver for ICEnsemble VT1724 (Envy24HT)
*
* Lowlevel functions for Ego Sys Waveterminal 192M
*
* Copyright (c) 2006 Guedez Clement <[email protected]>
* Some functions are taken from the Prodigy192 driver
* source
*/
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <sound/core.h>
#include <sound/tlv.h>
#include <linux/slab.h>
#include "ice1712.h"
#include "envy24ht.h"
#include "wtm.h"
#include "stac946x.h"
struct wtm_spec {
/* rate change needs atomic mute/unmute of all dacs*/
struct mutex mute_mutex;
};
/*
* 2*ADC 6*DAC no1 ringbuffer r/w on i2c bus
*/
static inline void stac9460_put(struct snd_ice1712 *ice, int reg,
unsigned char val)
{
snd_vt1724_write_i2c(ice, STAC9460_I2C_ADDR, reg, val);
}
static inline unsigned char stac9460_get(struct snd_ice1712 *ice, int reg)
{
return snd_vt1724_read_i2c(ice, STAC9460_I2C_ADDR, reg);
}
/*
* 2*ADC 2*DAC no2 ringbuffer r/w on i2c bus
*/
static inline void stac9460_2_put(struct snd_ice1712 *ice, int reg,
unsigned char val)
{
snd_vt1724_write_i2c(ice, STAC9460_2_I2C_ADDR, reg, val);
}
static inline unsigned char stac9460_2_get(struct snd_ice1712 *ice, int reg)
{
return snd_vt1724_read_i2c(ice, STAC9460_2_I2C_ADDR, reg);
}
/*
* DAC mute control
*/
static void stac9460_dac_mute_all(struct snd_ice1712 *ice, unsigned char mute,
unsigned short int *change_mask)
{
unsigned char new, old;
int id, idx, change;
/*stac9460 1*/
for (id = 0; id < 7; id++) {
if (*change_mask & (0x01 << id)) {
if (id == 0)
idx = STAC946X_MASTER_VOLUME;
else
idx = STAC946X_LF_VOLUME - 1 + id;
old = stac9460_get(ice, idx);
new = (~mute << 7 & 0x80) | (old & ~0x80);
change = (new != old);
if (change) {
stac9460_put(ice, idx, new);
*change_mask = *change_mask | (0x01 << id);
} else {
*change_mask = *change_mask & ~(0x01 << id);
}
}
}
/*stac9460 2*/
for (id = 0; id < 3; id++) {
if (*change_mask & (0x01 << (id + 7))) {
if (id == 0)
idx = STAC946X_MASTER_VOLUME;
else
idx = STAC946X_LF_VOLUME - 1 + id;
old = stac9460_2_get(ice, idx);
new = (~mute << 7 & 0x80) | (old & ~0x80);
change = (new != old);
if (change) {
stac9460_2_put(ice, idx, new);
*change_mask = *change_mask | (0x01 << id);
} else {
*change_mask = *change_mask & ~(0x01 << id);
}
}
}
}
#define stac9460_dac_mute_info snd_ctl_boolean_mono_info
static int stac9460_dac_mute_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
struct wtm_spec *spec = ice->spec;
unsigned char val;
int idx, id;
mutex_lock(&spec->mute_mutex);
if (kcontrol->private_value) {
idx = STAC946X_MASTER_VOLUME;
id = 0;
} else {
id = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
idx = id + STAC946X_LF_VOLUME;
}
if (id < 6)
val = stac9460_get(ice, idx);
else
val = stac9460_2_get(ice, idx - 6);
ucontrol->value.integer.value[0] = (~val >> 7) & 0x1;
mutex_unlock(&spec->mute_mutex);
return 0;
}
static int stac9460_dac_mute_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned char new, old;
int id, idx;
int change;
if (kcontrol->private_value) {
idx = STAC946X_MASTER_VOLUME;
old = stac9460_get(ice, idx);
new = (~ucontrol->value.integer.value[0] << 7 & 0x80) |
(old & ~0x80);
change = (new != old);
if (change) {
stac9460_put(ice, idx, new);
stac9460_2_put(ice, idx, new);
}
} else {
id = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
idx = id + STAC946X_LF_VOLUME;
if (id < 6)
old = stac9460_get(ice, idx);
else
old = stac9460_2_get(ice, idx - 6);
new = (~ucontrol->value.integer.value[0] << 7 & 0x80) |
(old & ~0x80);
change = (new != old);
if (change) {
if (id < 6)
stac9460_put(ice, idx, new);
else
stac9460_2_put(ice, idx - 6, new);
}
}
return change;
}
/*
* DAC volume attenuation mixer control
*/
static int stac9460_dac_vol_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 1;
uinfo->value.integer.min = 0; /* mute */
uinfo->value.integer.max = 0x7f; /* 0dB */
return 0;
}
static int stac9460_dac_vol_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int idx, id;
unsigned char vol;
if (kcontrol->private_value) {
idx = STAC946X_MASTER_VOLUME;
id = 0;
} else {
id = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
idx = id + STAC946X_LF_VOLUME;
}
if (id < 6)
vol = stac9460_get(ice, idx) & 0x7f;
else
vol = stac9460_2_get(ice, idx - 6) & 0x7f;
ucontrol->value.integer.value[0] = 0x7f - vol;
return 0;
}
static int stac9460_dac_vol_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int idx, id;
unsigned char tmp, ovol, nvol;
int change;
if (kcontrol->private_value) {
idx = STAC946X_MASTER_VOLUME;
nvol = ucontrol->value.integer.value[0] & 0x7f;
tmp = stac9460_get(ice, idx);
ovol = 0x7f - (tmp & 0x7f);
change = (ovol != nvol);
if (change) {
stac9460_put(ice, idx, (0x7f - nvol) | (tmp & 0x80));
stac9460_2_put(ice, idx, (0x7f - nvol) | (tmp & 0x80));
}
} else {
id = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
idx = id + STAC946X_LF_VOLUME;
nvol = ucontrol->value.integer.value[0] & 0x7f;
if (id < 6)
tmp = stac9460_get(ice, idx);
else
tmp = stac9460_2_get(ice, idx - 6);
ovol = 0x7f - (tmp & 0x7f);
change = (ovol != nvol);
if (change) {
if (id < 6)
stac9460_put(ice, idx, (0x7f - nvol) |
(tmp & 0x80));
else
stac9460_2_put(ice, idx-6, (0x7f - nvol) |
(tmp & 0x80));
}
}
return change;
}
/*
* ADC mute control
*/
#define stac9460_adc_mute_info snd_ctl_boolean_stereo_info
static int stac9460_adc_mute_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned char val;
int i, id;
id = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
if (id == 0) {
for (i = 0; i < 2; ++i) {
val = stac9460_get(ice, STAC946X_MIC_L_VOLUME + i);
ucontrol->value.integer.value[i] = ~val>>7 & 0x1;
}
} else {
for (i = 0; i < 2; ++i) {
val = stac9460_2_get(ice, STAC946X_MIC_L_VOLUME + i);
ucontrol->value.integer.value[i] = ~val>>7 & 0x1;
}
}
return 0;
}
static int stac9460_adc_mute_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned char new, old;
int i, reg, id;
int change;
id = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
if (id == 0) {
for (i = 0; i < 2; ++i) {
reg = STAC946X_MIC_L_VOLUME + i;
old = stac9460_get(ice, reg);
new = (~ucontrol->value.integer.value[i]<<7&0x80) |
(old&~0x80);
change = (new != old);
if (change)
stac9460_put(ice, reg, new);
}
} else {
for (i = 0; i < 2; ++i) {
reg = STAC946X_MIC_L_VOLUME + i;
old = stac9460_2_get(ice, reg);
new = (~ucontrol->value.integer.value[i]<<7&0x80) |
(old&~0x80);
change = (new != old);
if (change)
stac9460_2_put(ice, reg, new);
}
}
return change;
}
/*
*ADC gain mixer control
*/
static int stac9460_adc_vol_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 2;
uinfo->value.integer.min = 0; /* 0dB */
uinfo->value.integer.max = 0x0f; /* 22.5dB */
return 0;
}
static int stac9460_adc_vol_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int i, reg, id;
unsigned char vol;
id = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
if (id == 0) {
for (i = 0; i < 2; ++i) {
reg = STAC946X_MIC_L_VOLUME + i;
vol = stac9460_get(ice, reg) & 0x0f;
ucontrol->value.integer.value[i] = 0x0f - vol;
}
} else {
for (i = 0; i < 2; ++i) {
reg = STAC946X_MIC_L_VOLUME + i;
vol = stac9460_2_get(ice, reg) & 0x0f;
ucontrol->value.integer.value[i] = 0x0f - vol;
}
}
return 0;
}
static int stac9460_adc_vol_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int i, reg, id;
unsigned char ovol, nvol;
int change;
id = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
if (id == 0) {
for (i = 0; i < 2; ++i) {
reg = STAC946X_MIC_L_VOLUME + i;
nvol = ucontrol->value.integer.value[i] & 0x0f;
ovol = 0x0f - stac9460_get(ice, reg);
change = ((ovol & 0x0f) != nvol);
if (change)
stac9460_put(ice, reg, (0x0f - nvol) |
(ovol & ~0x0f));
}
} else {
for (i = 0; i < 2; ++i) {
reg = STAC946X_MIC_L_VOLUME + i;
nvol = ucontrol->value.integer.value[i] & 0x0f;
ovol = 0x0f - stac9460_2_get(ice, reg);
change = ((ovol & 0x0f) != nvol);
if (change)
stac9460_2_put(ice, reg, (0x0f - nvol) |
(ovol & ~0x0f));
}
}
return change;
}
/*
* MIC / LINE switch fonction
*/
static int stac9460_mic_sw_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
static const char * const texts[2] = { "Line In", "Mic" };
return snd_ctl_enum_info(uinfo, 1, 2, texts);
}
static int stac9460_mic_sw_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned char val;
int id;
id = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
if (id == 0)
val = stac9460_get(ice, STAC946X_GENERAL_PURPOSE);
else
val = stac9460_2_get(ice, STAC946X_GENERAL_PURPOSE);
ucontrol->value.enumerated.item[0] = (val >> 7) & 0x1;
return 0;
}
static int stac9460_mic_sw_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned char new, old;
int change, id;
id = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
if (id == 0)
old = stac9460_get(ice, STAC946X_GENERAL_PURPOSE);
else
old = stac9460_2_get(ice, STAC946X_GENERAL_PURPOSE);
new = (ucontrol->value.enumerated.item[0] << 7 & 0x80) | (old & ~0x80);
change = (new != old);
if (change) {
if (id == 0)
stac9460_put(ice, STAC946X_GENERAL_PURPOSE, new);
else
stac9460_2_put(ice, STAC946X_GENERAL_PURPOSE, new);
}
return change;
}
/*
* Handler for setting correct codec rate - called when rate change is detected
*/
static void stac9460_set_rate_val(struct snd_ice1712 *ice, unsigned int rate)
{
unsigned char old, new;
unsigned short int changed;
struct wtm_spec *spec = ice->spec;
if (rate == 0) /* no hint - S/PDIF input is master, simply return */
return;
else if (rate <= 48000)
new = 0x08; /* 256x, base rate mode */
else if (rate <= 96000)
new = 0x11; /* 256x, mid rate mode */
else
new = 0x12; /* 128x, high rate mode */
old = stac9460_get(ice, STAC946X_MASTER_CLOCKING);
if (old == new)
return;
/* change detected, setting master clock, muting first */
/* due to possible conflicts with mute controls - mutexing */
mutex_lock(&spec->mute_mutex);
/* we have to remember current mute status for each DAC */
changed = 0xFFFF;
stac9460_dac_mute_all(ice, 0, &changed);
/*printk(KERN_DEBUG "Rate change: %d, new MC: 0x%02x\n", rate, new);*/
stac9460_put(ice, STAC946X_MASTER_CLOCKING, new);
stac9460_2_put(ice, STAC946X_MASTER_CLOCKING, new);
udelay(10);
/* unmuting - only originally unmuted dacs -
* i.e. those changed when muting */
stac9460_dac_mute_all(ice, 1, &changed);
mutex_unlock(&spec->mute_mutex);
}
/*Limits value in dB for fader*/
static const DECLARE_TLV_DB_SCALE(db_scale_dac, -19125, 75, 0);
static const DECLARE_TLV_DB_SCALE(db_scale_adc, 0, 150, 0);
/*
* Control tabs
*/
static const struct snd_kcontrol_new stac9640_controls[] = {
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "Master Playback Switch",
.info = stac9460_dac_mute_info,
.get = stac9460_dac_mute_get,
.put = stac9460_dac_mute_put,
.private_value = 1,
.tlv = { .p = db_scale_dac }
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Master Playback Volume",
.info = stac9460_dac_vol_info,
.get = stac9460_dac_vol_get,
.put = stac9460_dac_vol_put,
.private_value = 1,
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "MIC/Line Input Enum",
.count = 2,
.info = stac9460_mic_sw_info,
.get = stac9460_mic_sw_get,
.put = stac9460_mic_sw_put,
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "DAC Switch",
.count = 8,
.info = stac9460_dac_mute_info,
.get = stac9460_dac_mute_get,
.put = stac9460_dac_mute_put,
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "DAC Volume",
.count = 8,
.info = stac9460_dac_vol_info,
.get = stac9460_dac_vol_get,
.put = stac9460_dac_vol_put,
.tlv = { .p = db_scale_dac }
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "ADC Switch",
.count = 2,
.info = stac9460_adc_mute_info,
.get = stac9460_adc_mute_get,
.put = stac9460_adc_mute_put,
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "ADC Volume",
.count = 2,
.info = stac9460_adc_vol_info,
.get = stac9460_adc_vol_get,
.put = stac9460_adc_vol_put,
.tlv = { .p = db_scale_adc }
}
};
/*INIT*/
static int wtm_add_controls(struct snd_ice1712 *ice)
{
unsigned int i;
int err;
for (i = 0; i < ARRAY_SIZE(stac9640_controls); i++) {
err = snd_ctl_add(ice->card,
snd_ctl_new1(&stac9640_controls[i], ice));
if (err < 0)
return err;
}
return 0;
}
static int wtm_init(struct snd_ice1712 *ice)
{
static const unsigned short stac_inits_wtm[] = {
STAC946X_RESET, 0,
STAC946X_MASTER_CLOCKING, 0x11,
(unsigned short)-1
};
const unsigned short *p;
struct wtm_spec *spec;
/*WTM 192M*/
ice->num_total_dacs = 8;
ice->num_total_adcs = 4;
ice->force_rdma1 = 1;
/*init mutex for dac mute conflict*/
spec = kzalloc(sizeof(*spec), GFP_KERNEL);
if (!spec)
return -ENOMEM;
ice->spec = spec;
mutex_init(&spec->mute_mutex);
/*initialize codec*/
p = stac_inits_wtm;
for (; *p != (unsigned short)-1; p += 2) {
stac9460_put(ice, p[0], p[1]);
stac9460_2_put(ice, p[0], p[1]);
}
ice->gpio.set_pro_rate = stac9460_set_rate_val;
return 0;
}
static const unsigned char wtm_eeprom[] = {
[ICE_EEP2_SYSCONF] = 0x67, /*SYSCONF: clock 192KHz, mpu401,
4ADC, 8DAC */
[ICE_EEP2_ACLINK] = 0x80, /* ACLINK : I2S */
[ICE_EEP2_I2S] = 0xf8, /* I2S: vol; 96k, 24bit, 192k */
[ICE_EEP2_SPDIF] = 0xc1, /*SPDIF: out-en, spidf ext out*/
[ICE_EEP2_GPIO_DIR] = 0x9f,
[ICE_EEP2_GPIO_DIR1] = 0xff,
[ICE_EEP2_GPIO_DIR2] = 0x7f,
[ICE_EEP2_GPIO_MASK] = 0x9f,
[ICE_EEP2_GPIO_MASK1] = 0xff,
[ICE_EEP2_GPIO_MASK2] = 0x7f,
[ICE_EEP2_GPIO_STATE] = 0x16,
[ICE_EEP2_GPIO_STATE1] = 0x80,
[ICE_EEP2_GPIO_STATE2] = 0x00,
};
/*entry point*/
struct snd_ice1712_card_info snd_vt1724_wtm_cards[] = {
{
.subvendor = VT1724_SUBDEVICE_WTM,
.name = "ESI Waveterminal 192M",
.model = "WT192M",
.chip_init = wtm_init,
.build_controls = wtm_add_controls,
.eeprom_size = sizeof(wtm_eeprom),
.eeprom_data = wtm_eeprom,
},
{} /*terminator*/
};
| linux-master | sound/pci/ice1712/wtm.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* ALSA driver for ICEnsemble ICE1724 (Envy24)
*
* Lowlevel functions for Terratec PHASE 22
*
* Copyright (c) 2005 Misha Zhilin <[email protected]>
*/
/* PHASE 22 overview:
* Audio controller: VIA Envy24HT-S (slightly trimmed down Envy24HT, 4in/4out)
* Analog chip: AK4524 (partially via Philip's 74HCT125)
* Digital receiver: CS8414-CS (supported in this release)
* PHASE 22 revision 2.0 and Terrasoniq/Musonik TS22PCI have CS8416
* (support status unknown, please test and report)
*
* Envy connects to AK4524
* - CS directly from GPIO 10
* - CCLK via 74HCT125's gate #4 from GPIO 4
* - CDTI via 74HCT125's gate #2 from GPIO 5
* CDTI may be completely blocked by 74HCT125's gate #1
* controlled by GPIO 3
*/
/* PHASE 28 overview:
* Audio controller: VIA Envy24HT (full untrimmed version, 4in/8out)
* Analog chip: WM8770 (8 channel 192k DAC, 2 channel 96k ADC)
* Digital receiver: CS8414-CS (supported in this release)
*/
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/mutex.h>
#include <sound/core.h>
#include "ice1712.h"
#include "envy24ht.h"
#include "phase.h"
#include <sound/tlv.h>
/* AC97 register cache for Phase28 */
struct phase28_spec {
unsigned short master[2];
unsigned short vol[8];
};
/* WM8770 registers */
#define WM_DAC_ATTEN 0x00 /* DAC1-8 analog attenuation */
#define WM_DAC_MASTER_ATTEN 0x08 /* DAC master analog attenuation */
#define WM_DAC_DIG_ATTEN 0x09 /* DAC1-8 digital attenuation */
#define WM_DAC_DIG_MASTER_ATTEN 0x11 /* DAC master digital attenuation */
#define WM_PHASE_SWAP 0x12 /* DAC phase */
#define WM_DAC_CTRL1 0x13 /* DAC control bits */
#define WM_MUTE 0x14 /* mute controls */
#define WM_DAC_CTRL2 0x15 /* de-emphasis and zefo-flag */
#define WM_INT_CTRL 0x16 /* interface control */
#define WM_MASTER 0x17 /* master clock and mode */
#define WM_POWERDOWN 0x18 /* power-down controls */
#define WM_ADC_GAIN 0x19 /* ADC gain L(19)/R(1a) */
#define WM_ADC_MUX 0x1b /* input MUX */
#define WM_OUT_MUX1 0x1c /* output MUX */
#define WM_OUT_MUX2 0x1e /* output MUX */
#define WM_RESET 0x1f /* software reset */
/*
* Logarithmic volume values for WM8770
* Computed as 20 * Log10(255 / x)
*/
static const unsigned char wm_vol[256] = {
127, 48, 42, 39, 36, 34, 33, 31, 30, 29, 28, 27, 27, 26, 25, 25, 24,
24, 23, 23, 22, 22, 21, 21, 21, 20, 20, 20, 19, 19, 19, 18, 18, 18, 18,
17, 17, 17, 17, 16, 16, 16, 16, 15, 15, 15, 15, 15, 15, 14, 14, 14, 14,
14, 13, 13, 13, 13, 13, 13, 13, 12, 12, 12, 12, 12, 12, 12, 11, 11, 11,
11, 11, 11, 11, 11, 11, 10, 10, 10, 10, 10, 10, 10, 10, 10, 9, 9, 9, 9,
9, 9, 9, 9, 9, 9, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 7,
7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5,
5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
};
#define WM_VOL_MAX (sizeof(wm_vol) - 1)
#define WM_VOL_MUTE 0x8000
static const struct snd_akm4xxx akm_phase22 = {
.type = SND_AK4524,
.num_dacs = 2,
.num_adcs = 2,
};
static const struct snd_ak4xxx_private akm_phase22_priv = {
.caddr = 2,
.cif = 1,
.data_mask = 1 << 4,
.clk_mask = 1 << 5,
.cs_mask = 1 << 10,
.cs_addr = 1 << 10,
.cs_none = 0,
.add_flags = 1 << 3,
.mask_flags = 0,
};
static int phase22_init(struct snd_ice1712 *ice)
{
struct snd_akm4xxx *ak;
int err;
/* Configure DAC/ADC description for generic part of ice1724 */
switch (ice->eeprom.subvendor) {
case VT1724_SUBDEVICE_PHASE22:
case VT1724_SUBDEVICE_TS22:
ice->num_total_dacs = 2;
ice->num_total_adcs = 2;
ice->vt1720 = 1; /* Envy24HT-S have 16 bit wide GPIO */
break;
default:
snd_BUG();
return -EINVAL;
}
/* Initialize analog chips */
ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
ak = ice->akm;
if (!ak)
return -ENOMEM;
ice->akm_codecs = 1;
switch (ice->eeprom.subvendor) {
case VT1724_SUBDEVICE_PHASE22:
case VT1724_SUBDEVICE_TS22:
err = snd_ice1712_akm4xxx_init(ak, &akm_phase22,
&akm_phase22_priv, ice);
if (err < 0)
return err;
break;
}
return 0;
}
static int phase22_add_controls(struct snd_ice1712 *ice)
{
int err = 0;
switch (ice->eeprom.subvendor) {
case VT1724_SUBDEVICE_PHASE22:
case VT1724_SUBDEVICE_TS22:
err = snd_ice1712_akm4xxx_build_controls(ice);
if (err < 0)
return err;
}
return 0;
}
static const unsigned char phase22_eeprom[] = {
[ICE_EEP2_SYSCONF] = 0x28, /* clock 512, mpu 401,
spdif-in/1xADC, 1xDACs */
[ICE_EEP2_ACLINK] = 0x80, /* I2S */
[ICE_EEP2_I2S] = 0xf0, /* vol, 96k, 24bit */
[ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
[ICE_EEP2_GPIO_DIR] = 0xff,
[ICE_EEP2_GPIO_DIR1] = 0xff,
[ICE_EEP2_GPIO_DIR2] = 0xff,
[ICE_EEP2_GPIO_MASK] = 0x00,
[ICE_EEP2_GPIO_MASK1] = 0x00,
[ICE_EEP2_GPIO_MASK2] = 0x00,
[ICE_EEP2_GPIO_STATE] = 0x00,
[ICE_EEP2_GPIO_STATE1] = 0x00,
[ICE_EEP2_GPIO_STATE2] = 0x00,
};
static const unsigned char phase28_eeprom[] = {
[ICE_EEP2_SYSCONF] = 0x2b, /* clock 512, mpu401,
spdif-in/1xADC, 4xDACs */
[ICE_EEP2_ACLINK] = 0x80, /* I2S */
[ICE_EEP2_I2S] = 0xfc, /* vol, 96k, 24bit, 192k */
[ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
[ICE_EEP2_GPIO_DIR] = 0xff,
[ICE_EEP2_GPIO_DIR1] = 0xff,
[ICE_EEP2_GPIO_DIR2] = 0x5f,
[ICE_EEP2_GPIO_MASK] = 0x00,
[ICE_EEP2_GPIO_MASK1] = 0x00,
[ICE_EEP2_GPIO_MASK2] = 0x00,
[ICE_EEP2_GPIO_STATE] = 0x00,
[ICE_EEP2_GPIO_STATE1] = 0x00,
[ICE_EEP2_GPIO_STATE2] = 0x00,
};
/*
* write data in the SPI mode
*/
static void phase28_spi_write(struct snd_ice1712 *ice, unsigned int cs,
unsigned int data, int bits)
{
unsigned int tmp;
int i;
tmp = snd_ice1712_gpio_read(ice);
snd_ice1712_gpio_set_mask(ice, ~(PHASE28_WM_RW|PHASE28_SPI_MOSI|
PHASE28_SPI_CLK|PHASE28_WM_CS));
tmp |= PHASE28_WM_RW;
tmp &= ~cs;
snd_ice1712_gpio_write(ice, tmp);
udelay(1);
for (i = bits - 1; i >= 0; i--) {
tmp &= ~PHASE28_SPI_CLK;
snd_ice1712_gpio_write(ice, tmp);
udelay(1);
if (data & (1 << i))
tmp |= PHASE28_SPI_MOSI;
else
tmp &= ~PHASE28_SPI_MOSI;
snd_ice1712_gpio_write(ice, tmp);
udelay(1);
tmp |= PHASE28_SPI_CLK;
snd_ice1712_gpio_write(ice, tmp);
udelay(1);
}
tmp &= ~PHASE28_SPI_CLK;
tmp |= cs;
snd_ice1712_gpio_write(ice, tmp);
udelay(1);
tmp |= PHASE28_SPI_CLK;
snd_ice1712_gpio_write(ice, tmp);
udelay(1);
}
/*
* get the current register value of WM codec
*/
static unsigned short wm_get(struct snd_ice1712 *ice, int reg)
{
reg <<= 1;
return ((unsigned short)ice->akm[0].images[reg] << 8) |
ice->akm[0].images[reg + 1];
}
/*
* set the register value of WM codec
*/
static void wm_put_nocache(struct snd_ice1712 *ice, int reg, unsigned short val)
{
phase28_spi_write(ice, PHASE28_WM_CS, (reg << 9) | (val & 0x1ff), 16);
}
/*
* set the register value of WM codec and remember it
*/
static void wm_put(struct snd_ice1712 *ice, int reg, unsigned short val)
{
wm_put_nocache(ice, reg, val);
reg <<= 1;
ice->akm[0].images[reg] = val >> 8;
ice->akm[0].images[reg + 1] = val;
}
static void wm_set_vol(struct snd_ice1712 *ice, unsigned int index,
unsigned short vol, unsigned short master)
{
unsigned char nvol;
if ((master & WM_VOL_MUTE) || (vol & WM_VOL_MUTE))
nvol = 0;
else
nvol = 127 - wm_vol[(((vol & ~WM_VOL_MUTE) *
(master & ~WM_VOL_MUTE)) / 127) & WM_VOL_MAX];
wm_put(ice, index, nvol);
wm_put_nocache(ice, index, 0x180 | nvol);
}
/*
* DAC mute control
*/
#define wm_pcm_mute_info snd_ctl_boolean_mono_info
static int wm_pcm_mute_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
mutex_lock(&ice->gpio_mutex);
ucontrol->value.integer.value[0] = (wm_get(ice, WM_MUTE) & 0x10) ?
0 : 1;
mutex_unlock(&ice->gpio_mutex);
return 0;
}
static int wm_pcm_mute_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned short nval, oval;
int change;
snd_ice1712_save_gpio_status(ice);
oval = wm_get(ice, WM_MUTE);
nval = (oval & ~0x10) | (ucontrol->value.integer.value[0] ? 0 : 0x10);
change = (nval != oval);
if (change)
wm_put(ice, WM_MUTE, nval);
snd_ice1712_restore_gpio_status(ice);
return change;
}
/*
* Master volume attenuation mixer control
*/
static int wm_master_vol_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 2;
uinfo->value.integer.min = 0;
uinfo->value.integer.max = WM_VOL_MAX;
return 0;
}
static int wm_master_vol_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
struct phase28_spec *spec = ice->spec;
int i;
for (i = 0; i < 2; i++)
ucontrol->value.integer.value[i] = spec->master[i] &
~WM_VOL_MUTE;
return 0;
}
static int wm_master_vol_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
struct phase28_spec *spec = ice->spec;
int ch, change = 0;
snd_ice1712_save_gpio_status(ice);
for (ch = 0; ch < 2; ch++) {
unsigned int vol = ucontrol->value.integer.value[ch];
if (vol > WM_VOL_MAX)
continue;
vol |= spec->master[ch] & WM_VOL_MUTE;
if (vol != spec->master[ch]) {
int dac;
spec->master[ch] = vol;
for (dac = 0; dac < ice->num_total_dacs; dac += 2)
wm_set_vol(ice, WM_DAC_ATTEN + dac + ch,
spec->vol[dac + ch],
spec->master[ch]);
change = 1;
}
}
snd_ice1712_restore_gpio_status(ice);
return change;
}
static int phase28_init(struct snd_ice1712 *ice)
{
static const unsigned short wm_inits_phase28[] = {
/* These come first to reduce init pop noise */
0x1b, 0x044, /* ADC Mux (AC'97 source) */
0x1c, 0x00B, /* Out Mux1 (VOUT1 = DAC+AUX, VOUT2 = DAC) */
0x1d, 0x009, /* Out Mux2 (VOUT2 = DAC, VOUT3 = DAC) */
0x18, 0x000, /* All power-up */
0x16, 0x122, /* I2S, normal polarity, 24bit */
0x17, 0x022, /* 256fs, slave mode */
0x00, 0, /* DAC1 analog mute */
0x01, 0, /* DAC2 analog mute */
0x02, 0, /* DAC3 analog mute */
0x03, 0, /* DAC4 analog mute */
0x04, 0, /* DAC5 analog mute */
0x05, 0, /* DAC6 analog mute */
0x06, 0, /* DAC7 analog mute */
0x07, 0, /* DAC8 analog mute */
0x08, 0x100, /* master analog mute */
0x09, 0xff, /* DAC1 digital full */
0x0a, 0xff, /* DAC2 digital full */
0x0b, 0xff, /* DAC3 digital full */
0x0c, 0xff, /* DAC4 digital full */
0x0d, 0xff, /* DAC5 digital full */
0x0e, 0xff, /* DAC6 digital full */
0x0f, 0xff, /* DAC7 digital full */
0x10, 0xff, /* DAC8 digital full */
0x11, 0x1ff, /* master digital full */
0x12, 0x000, /* phase normal */
0x13, 0x090, /* unmute DAC L/R */
0x14, 0x000, /* all unmute */
0x15, 0x000, /* no deemphasis, no ZFLG */
0x19, 0x000, /* -12dB ADC/L */
0x1a, 0x000, /* -12dB ADC/R */
(unsigned short)-1
};
unsigned int tmp;
struct snd_akm4xxx *ak;
struct phase28_spec *spec;
const unsigned short *p;
int i;
ice->num_total_dacs = 8;
ice->num_total_adcs = 2;
spec = kzalloc(sizeof(*spec), GFP_KERNEL);
if (!spec)
return -ENOMEM;
ice->spec = spec;
/* Initialize analog chips */
ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
ak = ice->akm;
if (!ak)
return -ENOMEM;
ice->akm_codecs = 1;
snd_ice1712_gpio_set_dir(ice, 0x5fffff); /* fix this for time being */
/* reset the wm codec as the SPI mode */
snd_ice1712_save_gpio_status(ice);
snd_ice1712_gpio_set_mask(ice, ~(PHASE28_WM_RESET|PHASE28_WM_CS|
PHASE28_HP_SEL));
tmp = snd_ice1712_gpio_read(ice);
tmp &= ~PHASE28_WM_RESET;
snd_ice1712_gpio_write(ice, tmp);
udelay(1);
tmp |= PHASE28_WM_CS;
snd_ice1712_gpio_write(ice, tmp);
udelay(1);
tmp |= PHASE28_WM_RESET;
snd_ice1712_gpio_write(ice, tmp);
udelay(1);
p = wm_inits_phase28;
for (; *p != (unsigned short)-1; p += 2)
wm_put(ice, p[0], p[1]);
snd_ice1712_restore_gpio_status(ice);
spec->master[0] = WM_VOL_MUTE;
spec->master[1] = WM_VOL_MUTE;
for (i = 0; i < ice->num_total_dacs; i++) {
spec->vol[i] = WM_VOL_MUTE;
wm_set_vol(ice, i, spec->vol[i], spec->master[i % 2]);
}
return 0;
}
/*
* DAC volume attenuation mixer control
*/
static int wm_vol_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
int voices = kcontrol->private_value >> 8;
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = voices;
uinfo->value.integer.min = 0; /* mute (-101dB) */
uinfo->value.integer.max = 0x7F; /* 0dB */
return 0;
}
static int wm_vol_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
struct phase28_spec *spec = ice->spec;
int i, ofs, voices;
voices = kcontrol->private_value >> 8;
ofs = kcontrol->private_value & 0xff;
for (i = 0; i < voices; i++)
ucontrol->value.integer.value[i] =
spec->vol[ofs+i] & ~WM_VOL_MUTE;
return 0;
}
static int wm_vol_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
struct phase28_spec *spec = ice->spec;
int i, idx, ofs, voices;
int change = 0;
voices = kcontrol->private_value >> 8;
ofs = kcontrol->private_value & 0xff;
snd_ice1712_save_gpio_status(ice);
for (i = 0; i < voices; i++) {
unsigned int vol;
vol = ucontrol->value.integer.value[i];
if (vol > 0x7f)
continue;
vol |= spec->vol[ofs+i] & WM_VOL_MUTE;
if (vol != spec->vol[ofs+i]) {
spec->vol[ofs+i] = vol;
idx = WM_DAC_ATTEN + ofs + i;
wm_set_vol(ice, idx, spec->vol[ofs+i],
spec->master[i]);
change = 1;
}
}
snd_ice1712_restore_gpio_status(ice);
return change;
}
/*
* WM8770 mute control
*/
static int wm_mute_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo) {
uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
uinfo->count = kcontrol->private_value >> 8;
uinfo->value.integer.min = 0;
uinfo->value.integer.max = 1;
return 0;
}
static int wm_mute_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
struct phase28_spec *spec = ice->spec;
int voices, ofs, i;
voices = kcontrol->private_value >> 8;
ofs = kcontrol->private_value & 0xFF;
for (i = 0; i < voices; i++)
ucontrol->value.integer.value[i] =
(spec->vol[ofs+i] & WM_VOL_MUTE) ? 0 : 1;
return 0;
}
static int wm_mute_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
struct phase28_spec *spec = ice->spec;
int change = 0, voices, ofs, i;
voices = kcontrol->private_value >> 8;
ofs = kcontrol->private_value & 0xFF;
snd_ice1712_save_gpio_status(ice);
for (i = 0; i < voices; i++) {
int val = (spec->vol[ofs + i] & WM_VOL_MUTE) ? 0 : 1;
if (ucontrol->value.integer.value[i] != val) {
spec->vol[ofs + i] &= ~WM_VOL_MUTE;
spec->vol[ofs + i] |=
ucontrol->value.integer.value[i] ? 0 :
WM_VOL_MUTE;
wm_set_vol(ice, ofs + i, spec->vol[ofs + i],
spec->master[i]);
change = 1;
}
}
snd_ice1712_restore_gpio_status(ice);
return change;
}
/*
* WM8770 master mute control
*/
#define wm_master_mute_info snd_ctl_boolean_stereo_info
static int wm_master_mute_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
struct phase28_spec *spec = ice->spec;
ucontrol->value.integer.value[0] =
(spec->master[0] & WM_VOL_MUTE) ? 0 : 1;
ucontrol->value.integer.value[1] =
(spec->master[1] & WM_VOL_MUTE) ? 0 : 1;
return 0;
}
static int wm_master_mute_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
struct phase28_spec *spec = ice->spec;
int change = 0, i;
snd_ice1712_save_gpio_status(ice);
for (i = 0; i < 2; i++) {
int val = (spec->master[i] & WM_VOL_MUTE) ? 0 : 1;
if (ucontrol->value.integer.value[i] != val) {
int dac;
spec->master[i] &= ~WM_VOL_MUTE;
spec->master[i] |=
ucontrol->value.integer.value[i] ? 0 :
WM_VOL_MUTE;
for (dac = 0; dac < ice->num_total_dacs; dac += 2)
wm_set_vol(ice, WM_DAC_ATTEN + dac + i,
spec->vol[dac + i],
spec->master[i]);
change = 1;
}
}
snd_ice1712_restore_gpio_status(ice);
return change;
}
/* digital master volume */
#define PCM_0dB 0xff
#define PCM_RES 128 /* -64dB */
#define PCM_MIN (PCM_0dB - PCM_RES)
static int wm_pcm_vol_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 1;
uinfo->value.integer.min = 0; /* mute (-64dB) */
uinfo->value.integer.max = PCM_RES; /* 0dB */
return 0;
}
static int wm_pcm_vol_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned short val;
mutex_lock(&ice->gpio_mutex);
val = wm_get(ice, WM_DAC_DIG_MASTER_ATTEN) & 0xff;
val = val > PCM_MIN ? (val - PCM_MIN) : 0;
ucontrol->value.integer.value[0] = val;
mutex_unlock(&ice->gpio_mutex);
return 0;
}
static int wm_pcm_vol_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned short ovol, nvol;
int change = 0;
nvol = ucontrol->value.integer.value[0];
if (nvol > PCM_RES)
return -EINVAL;
snd_ice1712_save_gpio_status(ice);
nvol = (nvol ? (nvol + PCM_MIN) : 0) & 0xff;
ovol = wm_get(ice, WM_DAC_DIG_MASTER_ATTEN) & 0xff;
if (ovol != nvol) {
wm_put(ice, WM_DAC_DIG_MASTER_ATTEN, nvol); /* prelatch */
/* update */
wm_put_nocache(ice, WM_DAC_DIG_MASTER_ATTEN, nvol | 0x100);
change = 1;
}
snd_ice1712_restore_gpio_status(ice);
return change;
}
/*
* Deemphasis
*/
#define phase28_deemp_info snd_ctl_boolean_mono_info
static int phase28_deemp_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
ucontrol->value.integer.value[0] = (wm_get(ice, WM_DAC_CTRL2) & 0xf) ==
0xf;
return 0;
}
static int phase28_deemp_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int temp, temp2;
temp = wm_get(ice, WM_DAC_CTRL2);
temp2 = temp;
if (ucontrol->value.integer.value[0])
temp |= 0xf;
else
temp &= ~0xf;
if (temp != temp2) {
wm_put(ice, WM_DAC_CTRL2, temp);
return 1;
}
return 0;
}
/*
* ADC Oversampling
*/
static int phase28_oversampling_info(struct snd_kcontrol *k,
struct snd_ctl_elem_info *uinfo)
{
static const char * const texts[2] = { "128x", "64x" };
return snd_ctl_enum_info(uinfo, 1, 2, texts);
}
static int phase28_oversampling_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
ucontrol->value.enumerated.item[0] = (wm_get(ice, WM_MASTER) & 0x8) ==
0x8;
return 0;
}
static int phase28_oversampling_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
int temp, temp2;
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
temp = wm_get(ice, WM_MASTER);
temp2 = temp;
if (ucontrol->value.enumerated.item[0])
temp |= 0x8;
else
temp &= ~0x8;
if (temp != temp2) {
wm_put(ice, WM_MASTER, temp);
return 1;
}
return 0;
}
static const DECLARE_TLV_DB_SCALE(db_scale_wm_dac, -12700, 100, 1);
static const DECLARE_TLV_DB_SCALE(db_scale_wm_pcm, -6400, 50, 1);
static const struct snd_kcontrol_new phase28_dac_controls[] = {
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Master Playback Switch",
.info = wm_master_mute_info,
.get = wm_master_mute_get,
.put = wm_master_mute_put
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "Master Playback Volume",
.info = wm_master_vol_info,
.get = wm_master_vol_get,
.put = wm_master_vol_put,
.tlv = { .p = db_scale_wm_dac }
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Front Playback Switch",
.info = wm_mute_info,
.get = wm_mute_get,
.put = wm_mute_put,
.private_value = (2 << 8) | 0
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "Front Playback Volume",
.info = wm_vol_info,
.get = wm_vol_get,
.put = wm_vol_put,
.private_value = (2 << 8) | 0,
.tlv = { .p = db_scale_wm_dac }
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Rear Playback Switch",
.info = wm_mute_info,
.get = wm_mute_get,
.put = wm_mute_put,
.private_value = (2 << 8) | 2
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "Rear Playback Volume",
.info = wm_vol_info,
.get = wm_vol_get,
.put = wm_vol_put,
.private_value = (2 << 8) | 2,
.tlv = { .p = db_scale_wm_dac }
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Center Playback Switch",
.info = wm_mute_info,
.get = wm_mute_get,
.put = wm_mute_put,
.private_value = (1 << 8) | 4
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "Center Playback Volume",
.info = wm_vol_info,
.get = wm_vol_get,
.put = wm_vol_put,
.private_value = (1 << 8) | 4,
.tlv = { .p = db_scale_wm_dac }
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "LFE Playback Switch",
.info = wm_mute_info,
.get = wm_mute_get,
.put = wm_mute_put,
.private_value = (1 << 8) | 5
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "LFE Playback Volume",
.info = wm_vol_info,
.get = wm_vol_get,
.put = wm_vol_put,
.private_value = (1 << 8) | 5,
.tlv = { .p = db_scale_wm_dac }
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Side Playback Switch",
.info = wm_mute_info,
.get = wm_mute_get,
.put = wm_mute_put,
.private_value = (2 << 8) | 6
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "Side Playback Volume",
.info = wm_vol_info,
.get = wm_vol_get,
.put = wm_vol_put,
.private_value = (2 << 8) | 6,
.tlv = { .p = db_scale_wm_dac }
}
};
static const struct snd_kcontrol_new wm_controls[] = {
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "PCM Playback Switch",
.info = wm_pcm_mute_info,
.get = wm_pcm_mute_get,
.put = wm_pcm_mute_put
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "PCM Playback Volume",
.info = wm_pcm_vol_info,
.get = wm_pcm_vol_get,
.put = wm_pcm_vol_put,
.tlv = { .p = db_scale_wm_pcm }
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "DAC Deemphasis Switch",
.info = phase28_deemp_info,
.get = phase28_deemp_get,
.put = phase28_deemp_put
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "ADC Oversampling",
.info = phase28_oversampling_info,
.get = phase28_oversampling_get,
.put = phase28_oversampling_put
}
};
static int phase28_add_controls(struct snd_ice1712 *ice)
{
unsigned int i, counts;
int err;
counts = ARRAY_SIZE(phase28_dac_controls);
for (i = 0; i < counts; i++) {
err = snd_ctl_add(ice->card,
snd_ctl_new1(&phase28_dac_controls[i],
ice));
if (err < 0)
return err;
}
for (i = 0; i < ARRAY_SIZE(wm_controls); i++) {
err = snd_ctl_add(ice->card,
snd_ctl_new1(&wm_controls[i], ice));
if (err < 0)
return err;
}
return 0;
}
struct snd_ice1712_card_info snd_vt1724_phase_cards[] = {
{
.subvendor = VT1724_SUBDEVICE_PHASE22,
.name = "Terratec PHASE 22",
.model = "phase22",
.chip_init = phase22_init,
.build_controls = phase22_add_controls,
.eeprom_size = sizeof(phase22_eeprom),
.eeprom_data = phase22_eeprom,
},
{
.subvendor = VT1724_SUBDEVICE_PHASE28,
.name = "Terratec PHASE 28",
.model = "phase28",
.chip_init = phase28_init,
.build_controls = phase28_add_controls,
.eeprom_size = sizeof(phase28_eeprom),
.eeprom_data = phase28_eeprom,
},
{
.subvendor = VT1724_SUBDEVICE_TS22,
.name = "Terrasoniq TS22 PCI",
.model = "TS22",
.chip_init = phase22_init,
.build_controls = phase22_add_controls,
.eeprom_size = sizeof(phase22_eeprom),
.eeprom_data = phase22_eeprom,
},
{ } /* terminator */
};
| linux-master | sound/pci/ice1712/phase.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* ALSA driver for ICEnsemble VT1724 (Envy24HT)
*
* Lowlevel functions for AudioTrak Prodigy 192 cards
* Supported IEC958 input from optional MI/ODI/O add-on card.
*
* Specifics (SW, HW):
* -------------------
* * 49.5MHz crystal
* * SPDIF-OUT on the card:
* - coax (through isolation transformer)/toslink supplied by
* 74HC04 gates - 3 in parallel
* - output switched between on-board CD drive dig-out connector
* and ice1724 SPDTX pin, using 74HC02 NOR gates, controlled
* by GPIO20 (0 = CD dig-out, 1 = SPDTX)
* * SPDTX goes straight to MI/ODI/O card's SPDIF-OUT coax
*
* * MI/ODI/O card: AK4114 based, used for iec958 input only
* - toslink input -> RX0
* - coax input -> RX1
* - 4wire protocol:
* AK4114 ICE1724
* ------------------------------
* CDTO (pin 32) -- GPIO11 pin 86
* CDTI (pin 33) -- GPIO10 pin 77
* CCLK (pin 34) -- GPIO9 pin 76
* CSN (pin 35) -- GPIO8 pin 75
* - output data Mode 7 (24bit, I2S, slave)
* - both MCKO1 and MCKO2 of ak4114 are fed to FPGA, which
* outputs master clock to SPMCLKIN of ice1724.
* Experimentally I found out that only a combination of
* OCKS0=1, OCKS1=1 (128fs, 64fs output) and ice1724 -
* VT1724_MT_I2S_MCLK_128X=0 (256fs input) yields correct
* sampling rate. That means that the FPGA doubles the
* MCK01 rate.
*
* Copyright (c) 2003 Takashi Iwai <[email protected]>
* Copyright (c) 2003 Dimitromanolakis Apostolos <[email protected]>
* Copyright (c) 2004 Kouichi ONO <[email protected]>
*/
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <sound/core.h>
#include "ice1712.h"
#include "envy24ht.h"
#include "prodigy192.h"
#include "stac946x.h"
#include <sound/tlv.h>
struct prodigy192_spec {
struct ak4114 *ak4114;
/* rate change needs atomic mute/unmute of all dacs*/
struct mutex mute_mutex;
};
static inline void stac9460_put(struct snd_ice1712 *ice, int reg, unsigned char val)
{
snd_vt1724_write_i2c(ice, PRODIGY192_STAC9460_ADDR, reg, val);
}
static inline unsigned char stac9460_get(struct snd_ice1712 *ice, int reg)
{
return snd_vt1724_read_i2c(ice, PRODIGY192_STAC9460_ADDR, reg);
}
/*
* DAC mute control
*/
/*
* idx = STAC9460 volume register number, mute: 0 = mute, 1 = unmute
*/
static int stac9460_dac_mute(struct snd_ice1712 *ice, int idx,
unsigned char mute)
{
unsigned char new, old;
int change;
old = stac9460_get(ice, idx);
new = (~mute << 7 & 0x80) | (old & ~0x80);
change = (new != old);
if (change)
/* dev_dbg(ice->card->dev, "Volume register 0x%02x: 0x%02x\n", idx, new);*/
stac9460_put(ice, idx, new);
return change;
}
#define stac9460_dac_mute_info snd_ctl_boolean_mono_info
static int stac9460_dac_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned char val;
int idx;
if (kcontrol->private_value)
idx = STAC946X_MASTER_VOLUME;
else
idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + STAC946X_LF_VOLUME;
val = stac9460_get(ice, idx);
ucontrol->value.integer.value[0] = (~val >> 7) & 0x1;
return 0;
}
static int stac9460_dac_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
struct prodigy192_spec *spec = ice->spec;
int idx, change;
if (kcontrol->private_value)
idx = STAC946X_MASTER_VOLUME;
else
idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + STAC946X_LF_VOLUME;
/* due to possible conflicts with stac9460_set_rate_val, mutexing */
mutex_lock(&spec->mute_mutex);
/*
dev_dbg(ice->card->dev, "Mute put: reg 0x%02x, ctrl value: 0x%02x\n", idx,
ucontrol->value.integer.value[0]);
*/
change = stac9460_dac_mute(ice, idx, ucontrol->value.integer.value[0]);
mutex_unlock(&spec->mute_mutex);
return change;
}
/*
* DAC volume attenuation mixer control
*/
static int stac9460_dac_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 1;
uinfo->value.integer.min = 0; /* mute */
uinfo->value.integer.max = 0x7f; /* 0dB */
return 0;
}
static int stac9460_dac_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int idx;
unsigned char vol;
if (kcontrol->private_value)
idx = STAC946X_MASTER_VOLUME;
else
idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + STAC946X_LF_VOLUME;
vol = stac9460_get(ice, idx) & 0x7f;
ucontrol->value.integer.value[0] = 0x7f - vol;
return 0;
}
static int stac9460_dac_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int idx;
unsigned char tmp, ovol, nvol;
int change;
if (kcontrol->private_value)
idx = STAC946X_MASTER_VOLUME;
else
idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + STAC946X_LF_VOLUME;
nvol = ucontrol->value.integer.value[0];
tmp = stac9460_get(ice, idx);
ovol = 0x7f - (tmp & 0x7f);
change = (ovol != nvol);
if (change) {
ovol = (0x7f - nvol) | (tmp & 0x80);
/*
dev_dbg(ice->card->dev, "DAC Volume: reg 0x%02x: 0x%02x\n",
idx, ovol);
*/
stac9460_put(ice, idx, (0x7f - nvol) | (tmp & 0x80));
}
return change;
}
/*
* ADC mute control
*/
#define stac9460_adc_mute_info snd_ctl_boolean_stereo_info
static int stac9460_adc_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned char val;
int i;
for (i = 0; i < 2; ++i) {
val = stac9460_get(ice, STAC946X_MIC_L_VOLUME + i);
ucontrol->value.integer.value[i] = ~val>>7 & 0x1;
}
return 0;
}
static int stac9460_adc_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned char new, old;
int i, reg;
int change;
for (i = 0; i < 2; ++i) {
reg = STAC946X_MIC_L_VOLUME + i;
old = stac9460_get(ice, reg);
new = (~ucontrol->value.integer.value[i]<<7&0x80) | (old&~0x80);
change = (new != old);
if (change)
stac9460_put(ice, reg, new);
}
return change;
}
/*
* ADC gain mixer control
*/
static int stac9460_adc_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 2;
uinfo->value.integer.min = 0; /* 0dB */
uinfo->value.integer.max = 0x0f; /* 22.5dB */
return 0;
}
static int stac9460_adc_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int i, reg;
unsigned char vol;
for (i = 0; i < 2; ++i) {
reg = STAC946X_MIC_L_VOLUME + i;
vol = stac9460_get(ice, reg) & 0x0f;
ucontrol->value.integer.value[i] = 0x0f - vol;
}
return 0;
}
static int stac9460_adc_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int i, reg;
unsigned char ovol, nvol;
int change;
for (i = 0; i < 2; ++i) {
reg = STAC946X_MIC_L_VOLUME + i;
nvol = ucontrol->value.integer.value[i] & 0x0f;
ovol = 0x0f - stac9460_get(ice, reg);
change = ((ovol & 0x0f) != nvol);
if (change)
stac9460_put(ice, reg, (0x0f - nvol) | (ovol & ~0x0f));
}
return change;
}
static int stac9460_mic_sw_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
static const char * const texts[2] = { "Line In", "Mic" };
return snd_ctl_enum_info(uinfo, 1, 2, texts);
}
static int stac9460_mic_sw_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned char val;
val = stac9460_get(ice, STAC946X_GENERAL_PURPOSE);
ucontrol->value.enumerated.item[0] = (val >> 7) & 0x1;
return 0;
}
static int stac9460_mic_sw_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned char new, old;
int change;
old = stac9460_get(ice, STAC946X_GENERAL_PURPOSE);
new = (ucontrol->value.enumerated.item[0] << 7 & 0x80) | (old & ~0x80);
change = (new != old);
if (change)
stac9460_put(ice, STAC946X_GENERAL_PURPOSE, new);
return change;
}
/*
* Handler for setting correct codec rate - called when rate change is detected
*/
static void stac9460_set_rate_val(struct snd_ice1712 *ice, unsigned int rate)
{
unsigned char old, new;
int idx;
unsigned char changed[7];
struct prodigy192_spec *spec = ice->spec;
if (rate == 0) /* no hint - S/PDIF input is master, simply return */
return;
else if (rate <= 48000)
new = 0x08; /* 256x, base rate mode */
else if (rate <= 96000)
new = 0x11; /* 256x, mid rate mode */
else
new = 0x12; /* 128x, high rate mode */
old = stac9460_get(ice, STAC946X_MASTER_CLOCKING);
if (old == new)
return;
/* change detected, setting master clock, muting first */
/* due to possible conflicts with mute controls - mutexing */
mutex_lock(&spec->mute_mutex);
/* we have to remember current mute status for each DAC */
for (idx = 0; idx < 7 ; ++idx)
changed[idx] = stac9460_dac_mute(ice,
STAC946X_MASTER_VOLUME + idx, 0);
/*dev_dbg(ice->card->dev, "Rate change: %d, new MC: 0x%02x\n", rate, new);*/
stac9460_put(ice, STAC946X_MASTER_CLOCKING, new);
udelay(10);
/* unmuting - only originally unmuted dacs -
* i.e. those changed when muting */
for (idx = 0; idx < 7 ; ++idx) {
if (changed[idx])
stac9460_dac_mute(ice, STAC946X_MASTER_VOLUME + idx, 1);
}
mutex_unlock(&spec->mute_mutex);
}
static const DECLARE_TLV_DB_SCALE(db_scale_dac, -19125, 75, 0);
static const DECLARE_TLV_DB_SCALE(db_scale_adc, 0, 150, 0);
/*
* mixers
*/
static const struct snd_kcontrol_new stac_controls[] = {
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Master Playback Switch",
.info = stac9460_dac_mute_info,
.get = stac9460_dac_mute_get,
.put = stac9460_dac_mute_put,
.private_value = 1,
.tlv = { .p = db_scale_dac }
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "Master Playback Volume",
.info = stac9460_dac_vol_info,
.get = stac9460_dac_vol_get,
.put = stac9460_dac_vol_put,
.private_value = 1,
.tlv = { .p = db_scale_dac }
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "DAC Switch",
.count = 6,
.info = stac9460_dac_mute_info,
.get = stac9460_dac_mute_get,
.put = stac9460_dac_mute_put,
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "DAC Volume",
.count = 6,
.info = stac9460_dac_vol_info,
.get = stac9460_dac_vol_get,
.put = stac9460_dac_vol_put,
.tlv = { .p = db_scale_dac }
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "ADC Capture Switch",
.count = 1,
.info = stac9460_adc_mute_info,
.get = stac9460_adc_mute_get,
.put = stac9460_adc_mute_put,
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "ADC Capture Volume",
.count = 1,
.info = stac9460_adc_vol_info,
.get = stac9460_adc_vol_get,
.put = stac9460_adc_vol_put,
.tlv = { .p = db_scale_adc }
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Analog Capture Input",
.info = stac9460_mic_sw_info,
.get = stac9460_mic_sw_get,
.put = stac9460_mic_sw_put,
},
};
/* AK4114 - ICE1724 connections on Prodigy192 + MI/ODI/O */
/* CDTO (pin 32) -- GPIO11 pin 86
* CDTI (pin 33) -- GPIO10 pin 77
* CCLK (pin 34) -- GPIO9 pin 76
* CSN (pin 35) -- GPIO8 pin 75
*/
#define AK4114_ADDR 0x00 /* C1-C0: Chip Address
* (According to datasheet fixed to “00”)
*/
/*
* 4wire ak4114 protocol - writing data
*/
static void write_data(struct snd_ice1712 *ice, unsigned int gpio,
unsigned int data, int idx)
{
for (; idx >= 0; idx--) {
/* drop clock */
gpio &= ~VT1724_PRODIGY192_CCLK;
snd_ice1712_gpio_write(ice, gpio);
udelay(1);
/* set data */
if (data & (1 << idx))
gpio |= VT1724_PRODIGY192_CDOUT;
else
gpio &= ~VT1724_PRODIGY192_CDOUT;
snd_ice1712_gpio_write(ice, gpio);
udelay(1);
/* raise clock */
gpio |= VT1724_PRODIGY192_CCLK;
snd_ice1712_gpio_write(ice, gpio);
udelay(1);
}
}
/*
* 4wire ak4114 protocol - reading data
*/
static unsigned char read_data(struct snd_ice1712 *ice, unsigned int gpio,
int idx)
{
unsigned char data = 0;
for (; idx >= 0; idx--) {
/* drop clock */
gpio &= ~VT1724_PRODIGY192_CCLK;
snd_ice1712_gpio_write(ice, gpio);
udelay(1);
/* read data */
if (snd_ice1712_gpio_read(ice) & VT1724_PRODIGY192_CDIN)
data |= (1 << idx);
udelay(1);
/* raise clock */
gpio |= VT1724_PRODIGY192_CCLK;
snd_ice1712_gpio_write(ice, gpio);
udelay(1);
}
return data;
}
/*
* 4wire ak4114 protocol - starting sequence
*/
static unsigned int prodigy192_4wire_start(struct snd_ice1712 *ice)
{
unsigned int tmp;
snd_ice1712_save_gpio_status(ice);
tmp = snd_ice1712_gpio_read(ice);
tmp |= VT1724_PRODIGY192_CCLK; /* high at init */
tmp &= ~VT1724_PRODIGY192_CS; /* drop chip select */
snd_ice1712_gpio_write(ice, tmp);
udelay(1);
return tmp;
}
/*
* 4wire ak4114 protocol - final sequence
*/
static void prodigy192_4wire_finish(struct snd_ice1712 *ice, unsigned int tmp)
{
tmp |= VT1724_PRODIGY192_CS; /* raise chip select */
snd_ice1712_gpio_write(ice, tmp);
udelay(1);
snd_ice1712_restore_gpio_status(ice);
}
/*
* Write data to addr register of ak4114
*/
static void prodigy192_ak4114_write(void *private_data, unsigned char addr,
unsigned char data)
{
struct snd_ice1712 *ice = private_data;
unsigned int tmp, addrdata;
tmp = prodigy192_4wire_start(ice);
addrdata = (AK4114_ADDR << 6) | 0x20 | (addr & 0x1f);
addrdata = (addrdata << 8) | data;
write_data(ice, tmp, addrdata, 15);
prodigy192_4wire_finish(ice, tmp);
}
/*
* Read data from addr register of ak4114
*/
static unsigned char prodigy192_ak4114_read(void *private_data,
unsigned char addr)
{
struct snd_ice1712 *ice = private_data;
unsigned int tmp;
unsigned char data;
tmp = prodigy192_4wire_start(ice);
write_data(ice, tmp, (AK4114_ADDR << 6) | (addr & 0x1f), 7);
data = read_data(ice, tmp, 7);
prodigy192_4wire_finish(ice, tmp);
return data;
}
static int ak4114_input_sw_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
static const char * const texts[2] = { "Toslink", "Coax" };
return snd_ctl_enum_info(uinfo, 1, 2, texts);
}
static int ak4114_input_sw_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned char val;
val = prodigy192_ak4114_read(ice, AK4114_REG_IO1);
/* AK4114_IPS0 bit = 0 -> RX0 = Toslink
* AK4114_IPS0 bit = 1 -> RX1 = Coax
*/
ucontrol->value.enumerated.item[0] = (val & AK4114_IPS0) ? 1 : 0;
return 0;
}
static int ak4114_input_sw_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned char new, old, itemvalue;
int change;
old = prodigy192_ak4114_read(ice, AK4114_REG_IO1);
/* AK4114_IPS0 could be any bit */
itemvalue = (ucontrol->value.enumerated.item[0]) ? 0xff : 0x00;
new = (itemvalue & AK4114_IPS0) | (old & ~AK4114_IPS0);
change = (new != old);
if (change)
prodigy192_ak4114_write(ice, AK4114_REG_IO1, new);
return change;
}
static const struct snd_kcontrol_new ak4114_controls[] = {
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "MIODIO IEC958 Capture Input",
.info = ak4114_input_sw_info,
.get = ak4114_input_sw_get,
.put = ak4114_input_sw_put,
}
};
static int prodigy192_ak4114_init(struct snd_ice1712 *ice)
{
static const unsigned char ak4114_init_vals[] = {
AK4114_RST | AK4114_PWN | AK4114_OCKS0 | AK4114_OCKS1,
/* ice1724 expects I2S and provides clock,
* DEM0 disables the deemphasis filter
*/
AK4114_DIF_I24I2S | AK4114_DEM0 ,
AK4114_TX1E,
AK4114_EFH_1024 | AK4114_DIT, /* default input RX0 */
0,
0
};
static const unsigned char ak4114_init_txcsb[] = {
0x41, 0x02, 0x2c, 0x00, 0x00
};
struct prodigy192_spec *spec = ice->spec;
int err;
err = snd_ak4114_create(ice->card,
prodigy192_ak4114_read,
prodigy192_ak4114_write,
ak4114_init_vals, ak4114_init_txcsb,
ice, &spec->ak4114);
if (err < 0)
return err;
/* AK4114 in Prodigy192 cannot detect external rate correctly.
* No reason to stop capture stream due to incorrect checks */
spec->ak4114->check_flags = AK4114_CHECK_NO_RATE;
return 0;
}
static void stac9460_proc_regs_read(struct snd_info_entry *entry,
struct snd_info_buffer *buffer)
{
struct snd_ice1712 *ice = entry->private_data;
int reg, val;
/* registers 0x0 - 0x14 */
for (reg = 0; reg <= 0x15; reg++) {
val = stac9460_get(ice, reg);
snd_iprintf(buffer, "0x%02x = 0x%02x\n", reg, val);
}
}
static void stac9460_proc_init(struct snd_ice1712 *ice)
{
snd_card_ro_proc_new(ice->card, "stac9460_codec", ice,
stac9460_proc_regs_read);
}
static int prodigy192_add_controls(struct snd_ice1712 *ice)
{
struct prodigy192_spec *spec = ice->spec;
unsigned int i;
int err;
for (i = 0; i < ARRAY_SIZE(stac_controls); i++) {
err = snd_ctl_add(ice->card,
snd_ctl_new1(&stac_controls[i], ice));
if (err < 0)
return err;
}
if (spec->ak4114) {
/* ak4114 is connected */
for (i = 0; i < ARRAY_SIZE(ak4114_controls); i++) {
err = snd_ctl_add(ice->card,
snd_ctl_new1(&ak4114_controls[i],
ice));
if (err < 0)
return err;
}
err = snd_ak4114_build(spec->ak4114,
NULL, /* ak4114 in MIO/DI/O handles no IEC958 output */
ice->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
if (err < 0)
return err;
}
stac9460_proc_init(ice);
return 0;
}
/*
* check for presence of MI/ODI/O add-on card with digital inputs
*/
static int prodigy192_miodio_exists(struct snd_ice1712 *ice)
{
unsigned char orig_value;
const unsigned char test_data = 0xd1; /* random value */
unsigned char addr = AK4114_REG_INT0_MASK; /* random SAFE address */
int exists = 0;
orig_value = prodigy192_ak4114_read(ice, addr);
prodigy192_ak4114_write(ice, addr, test_data);
if (prodigy192_ak4114_read(ice, addr) == test_data) {
/* ak4114 seems to communicate, apparently exists */
/* writing back original value */
prodigy192_ak4114_write(ice, addr, orig_value);
exists = 1;
}
return exists;
}
/*
* initialize the chip
*/
static int prodigy192_init(struct snd_ice1712 *ice)
{
static const unsigned short stac_inits_prodigy[] = {
STAC946X_RESET, 0,
STAC946X_MASTER_CLOCKING, 0x11,
/* STAC946X_MASTER_VOLUME, 0,
STAC946X_LF_VOLUME, 0,
STAC946X_RF_VOLUME, 0,
STAC946X_LR_VOLUME, 0,
STAC946X_RR_VOLUME, 0,
STAC946X_CENTER_VOLUME, 0,
STAC946X_LFE_VOLUME, 0,*/
(unsigned short)-1
};
const unsigned short *p;
int err = 0;
struct prodigy192_spec *spec;
/* prodigy 192 */
ice->num_total_dacs = 6;
ice->num_total_adcs = 2;
ice->vt1720 = 0; /* ice1724, e.g. 23 GPIOs */
spec = kzalloc(sizeof(*spec), GFP_KERNEL);
if (!spec)
return -ENOMEM;
ice->spec = spec;
mutex_init(&spec->mute_mutex);
/* initialize codec */
p = stac_inits_prodigy;
for (; *p != (unsigned short)-1; p += 2)
stac9460_put(ice, p[0], p[1]);
ice->gpio.set_pro_rate = stac9460_set_rate_val;
/* MI/ODI/O add on card with AK4114 */
if (prodigy192_miodio_exists(ice)) {
err = prodigy192_ak4114_init(ice);
/* from this moment if err = 0 then
* spec->ak4114 should not be null
*/
dev_dbg(ice->card->dev,
"AK4114 initialized with status %d\n", err);
} else
dev_dbg(ice->card->dev, "AK4114 not found\n");
return err;
}
/*
* Aureon boards don't provide the EEPROM data except for the vendor IDs.
* hence the driver needs to sets up it properly.
*/
static const unsigned char prodigy71_eeprom[] = {
[ICE_EEP2_SYSCONF] = 0x6a, /* 49MHz crystal, mpu401,
* spdif-in+ 1 stereo ADC,
* 3 stereo DACs
*/
[ICE_EEP2_ACLINK] = 0x80, /* I2S */
[ICE_EEP2_I2S] = 0xf8, /* vol, 96k, 24bit, 192k */
[ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
[ICE_EEP2_GPIO_DIR] = 0xff,
[ICE_EEP2_GPIO_DIR1] = ~(VT1724_PRODIGY192_CDIN >> 8) ,
[ICE_EEP2_GPIO_DIR2] = 0xbf,
[ICE_EEP2_GPIO_MASK] = 0x00,
[ICE_EEP2_GPIO_MASK1] = 0x00,
[ICE_EEP2_GPIO_MASK2] = 0x00,
[ICE_EEP2_GPIO_STATE] = 0x00,
[ICE_EEP2_GPIO_STATE1] = 0x00,
[ICE_EEP2_GPIO_STATE2] = 0x10, /* GPIO20: 0 = CD drive dig. input
* passthrough,
* 1 = SPDIF-OUT from ice1724
*/
};
/* entry point */
struct snd_ice1712_card_info snd_vt1724_prodigy192_cards[] = {
{
.subvendor = VT1724_SUBDEVICE_PRODIGY192VE,
.name = "Audiotrak Prodigy 192",
.model = "prodigy192",
.chip_init = prodigy192_init,
.build_controls = prodigy192_add_controls,
.eeprom_size = sizeof(prodigy71_eeprom),
.eeprom_data = prodigy71_eeprom,
},
{ } /* terminator */
};
| linux-master | sound/pci/ice1712/prodigy192.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* ALSA driver for ICEnsemble ICE1712 (Envy24)
*
* Lowlevel functions for Terratec EWS88MT/D, EWX24/96, DMX 6Fire
*
* Copyright (c) 2000 Jaroslav Kysela <[email protected]>
* 2002 Takashi Iwai <[email protected]>
*/
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <sound/core.h>
#include <sound/cs8427.h>
#include <sound/asoundef.h>
#include "ice1712.h"
#include "ews.h"
#define SND_CS8404
#include <sound/cs8403.h>
enum {
EWS_I2C_CS8404 = 0, EWS_I2C_PCF1, EWS_I2C_PCF2,
EWS_I2C_88D = 0,
EWS_I2C_6FIRE = 0
};
/* additional i2c devices for EWS boards */
struct ews_spec {
struct snd_i2c_device *i2cdevs[3];
};
/*
* access via i2c mode (for EWX 24/96, EWS 88MT&D)
*/
/* send SDA and SCL */
static void ewx_i2c_setlines(struct snd_i2c_bus *bus, int clk, int data)
{
struct snd_ice1712 *ice = bus->private_data;
unsigned char tmp = 0;
if (clk)
tmp |= ICE1712_EWX2496_SERIAL_CLOCK;
if (data)
tmp |= ICE1712_EWX2496_SERIAL_DATA;
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
udelay(5);
}
static int ewx_i2c_getclock(struct snd_i2c_bus *bus)
{
struct snd_ice1712 *ice = bus->private_data;
return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & ICE1712_EWX2496_SERIAL_CLOCK ? 1 : 0;
}
static int ewx_i2c_getdata(struct snd_i2c_bus *bus, int ack)
{
struct snd_ice1712 *ice = bus->private_data;
int bit;
/* set RW pin to low */
snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, ~ICE1712_EWX2496_RW);
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, 0);
if (ack)
udelay(5);
bit = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & ICE1712_EWX2496_SERIAL_DATA ? 1 : 0;
/* set RW pin to high */
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, ICE1712_EWX2496_RW);
/* reset write mask */
snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, ~ICE1712_EWX2496_SERIAL_CLOCK);
return bit;
}
static void ewx_i2c_start(struct snd_i2c_bus *bus)
{
struct snd_ice1712 *ice = bus->private_data;
unsigned char mask;
snd_ice1712_save_gpio_status(ice);
/* set RW high */
mask = ICE1712_EWX2496_RW;
switch (ice->eeprom.subvendor) {
case ICE1712_SUBDEVICE_EWX2496:
mask |= ICE1712_EWX2496_AK4524_CS; /* CS high also */
break;
case ICE1712_SUBDEVICE_DMX6FIRE:
mask |= ICE1712_6FIRE_AK4524_CS_MASK; /* CS high also */
break;
}
snd_ice1712_gpio_write_bits(ice, mask, mask);
}
static void ewx_i2c_stop(struct snd_i2c_bus *bus)
{
struct snd_ice1712 *ice = bus->private_data;
snd_ice1712_restore_gpio_status(ice);
}
static void ewx_i2c_direction(struct snd_i2c_bus *bus, int clock, int data)
{
struct snd_ice1712 *ice = bus->private_data;
unsigned char mask = 0;
if (clock)
mask |= ICE1712_EWX2496_SERIAL_CLOCK; /* write SCL */
if (data)
mask |= ICE1712_EWX2496_SERIAL_DATA; /* write SDA */
ice->gpio.direction &= ~(ICE1712_EWX2496_SERIAL_CLOCK|ICE1712_EWX2496_SERIAL_DATA);
ice->gpio.direction |= mask;
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, ice->gpio.direction);
snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, ~mask);
}
static struct snd_i2c_bit_ops snd_ice1712_ewx_cs8427_bit_ops = {
.start = ewx_i2c_start,
.stop = ewx_i2c_stop,
.direction = ewx_i2c_direction,
.setlines = ewx_i2c_setlines,
.getclock = ewx_i2c_getclock,
.getdata = ewx_i2c_getdata,
};
/*
* AK4524 access
*/
/* AK4524 chip select; address 0x48 bit 0-3 */
static int snd_ice1712_ews88mt_chip_select(struct snd_ice1712 *ice, int chip_mask)
{
struct ews_spec *spec = ice->spec;
unsigned char data, ndata;
if (snd_BUG_ON(chip_mask < 0 || chip_mask > 0x0f))
return -EINVAL;
snd_i2c_lock(ice->i2c);
if (snd_i2c_readbytes(spec->i2cdevs[EWS_I2C_PCF2], &data, 1) != 1)
goto __error;
ndata = (data & 0xf0) | chip_mask;
if (ndata != data)
if (snd_i2c_sendbytes(spec->i2cdevs[EWS_I2C_PCF2], &ndata, 1)
!= 1)
goto __error;
snd_i2c_unlock(ice->i2c);
return 0;
__error:
snd_i2c_unlock(ice->i2c);
dev_err(ice->card->dev,
"AK4524 chip select failed, check cable to the front module\n");
return -EIO;
}
/* start callback for EWS88MT, needs to select a certain chip mask */
static void ews88mt_ak4524_lock(struct snd_akm4xxx *ak, int chip)
{
struct snd_ice1712 *ice = ak->private_data[0];
unsigned char tmp;
/* assert AK4524 CS */
if (snd_ice1712_ews88mt_chip_select(ice, ~(1 << chip) & 0x0f) < 0)
dev_err(ice->card->dev, "fatal error (ews88mt chip select)\n");
snd_ice1712_save_gpio_status(ice);
tmp = ICE1712_EWS88_SERIAL_DATA |
ICE1712_EWS88_SERIAL_CLOCK |
ICE1712_EWS88_RW;
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION,
ice->gpio.direction | tmp);
snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, ~tmp);
}
/* stop callback for EWS88MT, needs to deselect chip mask */
static void ews88mt_ak4524_unlock(struct snd_akm4xxx *ak, int chip)
{
struct snd_ice1712 *ice = ak->private_data[0];
snd_ice1712_restore_gpio_status(ice);
udelay(1);
snd_ice1712_ews88mt_chip_select(ice, 0x0f);
}
/* start callback for EWX24/96 */
static void ewx2496_ak4524_lock(struct snd_akm4xxx *ak, int chip)
{
struct snd_ice1712 *ice = ak->private_data[0];
unsigned char tmp;
snd_ice1712_save_gpio_status(ice);
tmp = ICE1712_EWX2496_SERIAL_DATA |
ICE1712_EWX2496_SERIAL_CLOCK |
ICE1712_EWX2496_AK4524_CS |
ICE1712_EWX2496_RW;
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION,
ice->gpio.direction | tmp);
snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, ~tmp);
}
/* start callback for DMX 6fire */
static void dmx6fire_ak4524_lock(struct snd_akm4xxx *ak, int chip)
{
struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
struct snd_ice1712 *ice = ak->private_data[0];
unsigned char tmp;
snd_ice1712_save_gpio_status(ice);
tmp = priv->cs_mask = priv->cs_addr = (1 << chip) & ICE1712_6FIRE_AK4524_CS_MASK;
tmp |= ICE1712_6FIRE_SERIAL_DATA |
ICE1712_6FIRE_SERIAL_CLOCK |
ICE1712_6FIRE_RW;
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION,
ice->gpio.direction | tmp);
snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, ~tmp);
}
/*
* CS8404 interface on EWS88MT/D
*/
static void snd_ice1712_ews_cs8404_spdif_write(struct snd_ice1712 *ice, unsigned char bits)
{
struct ews_spec *spec = ice->spec;
unsigned char bytes[2];
snd_i2c_lock(ice->i2c);
switch (ice->eeprom.subvendor) {
case ICE1712_SUBDEVICE_EWS88MT:
case ICE1712_SUBDEVICE_EWS88MT_NEW:
case ICE1712_SUBDEVICE_PHASE88:
case ICE1712_SUBDEVICE_TS88:
if (snd_i2c_sendbytes(spec->i2cdevs[EWS_I2C_CS8404], &bits, 1)
!= 1)
goto _error;
break;
case ICE1712_SUBDEVICE_EWS88D:
if (snd_i2c_readbytes(spec->i2cdevs[EWS_I2C_88D], bytes, 2)
!= 2)
goto _error;
if (bits != bytes[1]) {
bytes[1] = bits;
if (snd_i2c_sendbytes(spec->i2cdevs[EWS_I2C_88D],
bytes, 2) != 2)
goto _error;
}
break;
}
_error:
snd_i2c_unlock(ice->i2c);
}
/*
*/
static void ews88_spdif_default_get(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
{
snd_cs8404_decode_spdif_bits(&ucontrol->value.iec958, ice->spdif.cs8403_bits);
}
static int ews88_spdif_default_put(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
{
unsigned int val;
int change;
val = snd_cs8404_encode_spdif_bits(&ucontrol->value.iec958);
spin_lock_irq(&ice->reg_lock);
change = ice->spdif.cs8403_bits != val;
ice->spdif.cs8403_bits = val;
if (change && ice->playback_pro_substream == NULL) {
spin_unlock_irq(&ice->reg_lock);
snd_ice1712_ews_cs8404_spdif_write(ice, val);
} else {
spin_unlock_irq(&ice->reg_lock);
}
return change;
}
static void ews88_spdif_stream_get(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
{
snd_cs8404_decode_spdif_bits(&ucontrol->value.iec958, ice->spdif.cs8403_stream_bits);
}
static int ews88_spdif_stream_put(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
{
unsigned int val;
int change;
val = snd_cs8404_encode_spdif_bits(&ucontrol->value.iec958);
spin_lock_irq(&ice->reg_lock);
change = ice->spdif.cs8403_stream_bits != val;
ice->spdif.cs8403_stream_bits = val;
if (change && ice->playback_pro_substream != NULL) {
spin_unlock_irq(&ice->reg_lock);
snd_ice1712_ews_cs8404_spdif_write(ice, val);
} else {
spin_unlock_irq(&ice->reg_lock);
}
return change;
}
/* open callback */
static void ews88_open_spdif(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
{
ice->spdif.cs8403_stream_bits = ice->spdif.cs8403_bits;
}
/* set up SPDIF for EWS88MT / EWS88D */
static void ews88_setup_spdif(struct snd_ice1712 *ice, int rate)
{
unsigned long flags;
unsigned char tmp;
int change;
spin_lock_irqsave(&ice->reg_lock, flags);
tmp = ice->spdif.cs8403_stream_bits;
if (tmp & 0x10) /* consumer */
tmp &= (tmp & 0x01) ? ~0x06 : ~0x60;
switch (rate) {
case 32000: tmp |= (tmp & 0x01) ? 0x02 : 0x00; break;
case 44100: tmp |= (tmp & 0x01) ? 0x06 : 0x40; break;
case 48000: tmp |= (tmp & 0x01) ? 0x04 : 0x20; break;
default: tmp |= (tmp & 0x01) ? 0x06 : 0x40; break;
}
change = ice->spdif.cs8403_stream_bits != tmp;
ice->spdif.cs8403_stream_bits = tmp;
spin_unlock_irqrestore(&ice->reg_lock, flags);
if (change)
snd_ctl_notify(ice->card, SNDRV_CTL_EVENT_MASK_VALUE, &ice->spdif.stream_ctl->id);
snd_ice1712_ews_cs8404_spdif_write(ice, tmp);
}
/*
*/
static const struct snd_akm4xxx akm_ews88mt = {
.num_adcs = 8,
.num_dacs = 8,
.type = SND_AK4524,
.ops = {
.lock = ews88mt_ak4524_lock,
.unlock = ews88mt_ak4524_unlock
}
};
static const struct snd_ak4xxx_private akm_ews88mt_priv = {
.caddr = 2,
.cif = 1, /* CIF high */
.data_mask = ICE1712_EWS88_SERIAL_DATA,
.clk_mask = ICE1712_EWS88_SERIAL_CLOCK,
.cs_mask = 0,
.cs_addr = 0,
.cs_none = 0, /* no chip select on gpio */
.add_flags = ICE1712_EWS88_RW, /* set rw bit high */
.mask_flags = 0,
};
static const struct snd_akm4xxx akm_ewx2496 = {
.num_adcs = 2,
.num_dacs = 2,
.type = SND_AK4524,
.ops = {
.lock = ewx2496_ak4524_lock
}
};
static const struct snd_ak4xxx_private akm_ewx2496_priv = {
.caddr = 2,
.cif = 1, /* CIF high */
.data_mask = ICE1712_EWS88_SERIAL_DATA,
.clk_mask = ICE1712_EWS88_SERIAL_CLOCK,
.cs_mask = ICE1712_EWX2496_AK4524_CS,
.cs_addr = ICE1712_EWX2496_AK4524_CS,
.cs_none = 0,
.add_flags = ICE1712_EWS88_RW, /* set rw bit high */
.mask_flags = 0,
};
static const struct snd_akm4xxx akm_6fire = {
.num_adcs = 6,
.num_dacs = 6,
.type = SND_AK4524,
.ops = {
.lock = dmx6fire_ak4524_lock
}
};
static const struct snd_ak4xxx_private akm_6fire_priv = {
.caddr = 2,
.cif = 1, /* CIF high */
.data_mask = ICE1712_6FIRE_SERIAL_DATA,
.clk_mask = ICE1712_6FIRE_SERIAL_CLOCK,
.cs_mask = 0,
.cs_addr = 0, /* set later */
.cs_none = 0,
.add_flags = ICE1712_6FIRE_RW, /* set rw bit high */
.mask_flags = 0,
};
/*
* initialize the chip
*/
/* 6fire specific */
#define PCF9554_REG_INPUT 0
#define PCF9554_REG_OUTPUT 1
#define PCF9554_REG_POLARITY 2
#define PCF9554_REG_CONFIG 3
static int snd_ice1712_6fire_write_pca(struct snd_ice1712 *ice, unsigned char reg, unsigned char data);
static int snd_ice1712_ews_init(struct snd_ice1712 *ice)
{
int err;
struct snd_akm4xxx *ak;
struct ews_spec *spec;
/* set the analog DACs */
switch (ice->eeprom.subvendor) {
case ICE1712_SUBDEVICE_EWX2496:
ice->num_total_dacs = 2;
ice->num_total_adcs = 2;
break;
case ICE1712_SUBDEVICE_EWS88MT:
case ICE1712_SUBDEVICE_EWS88MT_NEW:
case ICE1712_SUBDEVICE_PHASE88:
case ICE1712_SUBDEVICE_TS88:
ice->num_total_dacs = 8;
ice->num_total_adcs = 8;
break;
case ICE1712_SUBDEVICE_EWS88D:
/* Note: not analog but ADAT I/O */
ice->num_total_dacs = 8;
ice->num_total_adcs = 8;
break;
case ICE1712_SUBDEVICE_DMX6FIRE:
ice->num_total_dacs = 6;
ice->num_total_adcs = 6;
break;
}
spec = kzalloc(sizeof(*spec), GFP_KERNEL);
if (!spec)
return -ENOMEM;
ice->spec = spec;
/* create i2c */
err = snd_i2c_bus_create(ice->card, "ICE1712 GPIO 1", NULL, &ice->i2c);
if (err < 0) {
dev_err(ice->card->dev, "unable to create I2C bus\n");
return err;
}
ice->i2c->private_data = ice;
ice->i2c->hw_ops.bit = &snd_ice1712_ewx_cs8427_bit_ops;
/* create i2c devices */
switch (ice->eeprom.subvendor) {
case ICE1712_SUBDEVICE_DMX6FIRE:
err = snd_i2c_device_create(ice->i2c, "PCF9554",
ICE1712_6FIRE_PCF9554_ADDR,
&spec->i2cdevs[EWS_I2C_6FIRE]);
if (err < 0) {
dev_err(ice->card->dev,
"PCF9554 initialization failed\n");
return err;
}
snd_ice1712_6fire_write_pca(ice, PCF9554_REG_CONFIG, 0x80);
break;
case ICE1712_SUBDEVICE_EWS88MT:
case ICE1712_SUBDEVICE_EWS88MT_NEW:
case ICE1712_SUBDEVICE_PHASE88:
case ICE1712_SUBDEVICE_TS88:
err = snd_i2c_device_create(ice->i2c, "CS8404",
ICE1712_EWS88MT_CS8404_ADDR,
&spec->i2cdevs[EWS_I2C_CS8404]);
if (err < 0)
return err;
err = snd_i2c_device_create(ice->i2c, "PCF8574 (1st)",
ICE1712_EWS88MT_INPUT_ADDR,
&spec->i2cdevs[EWS_I2C_PCF1]);
if (err < 0)
return err;
err = snd_i2c_device_create(ice->i2c, "PCF8574 (2nd)",
ICE1712_EWS88MT_OUTPUT_ADDR,
&spec->i2cdevs[EWS_I2C_PCF2]);
if (err < 0)
return err;
/* Check if the front module is connected */
err = snd_ice1712_ews88mt_chip_select(ice, 0x0f);
if (err < 0)
return err;
break;
case ICE1712_SUBDEVICE_EWS88D:
err = snd_i2c_device_create(ice->i2c, "PCF8575",
ICE1712_EWS88D_PCF_ADDR,
&spec->i2cdevs[EWS_I2C_88D]);
if (err < 0)
return err;
break;
}
/* set up SPDIF interface */
switch (ice->eeprom.subvendor) {
case ICE1712_SUBDEVICE_EWX2496:
err = snd_ice1712_init_cs8427(ice, CS8427_BASE_ADDR);
if (err < 0)
return err;
snd_cs8427_reg_write(ice->cs8427, CS8427_REG_RECVERRMASK, CS8427_UNLOCK | CS8427_CONF | CS8427_BIP | CS8427_PAR);
break;
case ICE1712_SUBDEVICE_DMX6FIRE:
err = snd_ice1712_init_cs8427(ice, ICE1712_6FIRE_CS8427_ADDR);
if (err < 0)
return err;
snd_cs8427_reg_write(ice->cs8427, CS8427_REG_RECVERRMASK, CS8427_UNLOCK | CS8427_CONF | CS8427_BIP | CS8427_PAR);
break;
case ICE1712_SUBDEVICE_EWS88MT:
case ICE1712_SUBDEVICE_EWS88MT_NEW:
case ICE1712_SUBDEVICE_PHASE88:
case ICE1712_SUBDEVICE_TS88:
case ICE1712_SUBDEVICE_EWS88D:
/* set up CS8404 */
ice->spdif.ops.open = ews88_open_spdif;
ice->spdif.ops.setup_rate = ews88_setup_spdif;
ice->spdif.ops.default_get = ews88_spdif_default_get;
ice->spdif.ops.default_put = ews88_spdif_default_put;
ice->spdif.ops.stream_get = ews88_spdif_stream_get;
ice->spdif.ops.stream_put = ews88_spdif_stream_put;
/* Set spdif defaults */
snd_ice1712_ews_cs8404_spdif_write(ice, ice->spdif.cs8403_bits);
break;
}
/* no analog? */
switch (ice->eeprom.subvendor) {
case ICE1712_SUBDEVICE_EWS88D:
return 0;
}
/* analog section */
ak = ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
if (! ak)
return -ENOMEM;
ice->akm_codecs = 1;
switch (ice->eeprom.subvendor) {
case ICE1712_SUBDEVICE_EWS88MT:
case ICE1712_SUBDEVICE_EWS88MT_NEW:
case ICE1712_SUBDEVICE_PHASE88:
case ICE1712_SUBDEVICE_TS88:
err = snd_ice1712_akm4xxx_init(ak, &akm_ews88mt, &akm_ews88mt_priv, ice);
break;
case ICE1712_SUBDEVICE_EWX2496:
err = snd_ice1712_akm4xxx_init(ak, &akm_ewx2496, &akm_ewx2496_priv, ice);
break;
case ICE1712_SUBDEVICE_DMX6FIRE:
err = snd_ice1712_akm4xxx_init(ak, &akm_6fire, &akm_6fire_priv, ice);
break;
default:
err = 0;
}
return err;
}
/*
* EWX 24/96 specific controls
*/
/* i/o sensitivity - this callback is shared among other devices, too */
static int snd_ice1712_ewx_io_sense_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo){
static const char * const texts[2] = {
"+4dBu", "-10dBV",
};
return snd_ctl_enum_info(uinfo, 1, 2, texts);
}
static int snd_ice1712_ewx_io_sense_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned char mask = kcontrol->private_value & 0xff;
snd_ice1712_save_gpio_status(ice);
ucontrol->value.enumerated.item[0] = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & mask ? 1 : 0;
snd_ice1712_restore_gpio_status(ice);
return 0;
}
static int snd_ice1712_ewx_io_sense_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned char mask = kcontrol->private_value & 0xff;
int val, nval;
if (kcontrol->private_value & (1 << 31))
return -EPERM;
nval = ucontrol->value.enumerated.item[0] ? mask : 0;
snd_ice1712_save_gpio_status(ice);
val = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
nval |= val & ~mask;
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, nval);
snd_ice1712_restore_gpio_status(ice);
return val != nval;
}
static const struct snd_kcontrol_new snd_ice1712_ewx2496_controls[] = {
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Input Sensitivity Switch",
.info = snd_ice1712_ewx_io_sense_info,
.get = snd_ice1712_ewx_io_sense_get,
.put = snd_ice1712_ewx_io_sense_put,
.private_value = ICE1712_EWX2496_AIN_SEL,
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Output Sensitivity Switch",
.info = snd_ice1712_ewx_io_sense_info,
.get = snd_ice1712_ewx_io_sense_get,
.put = snd_ice1712_ewx_io_sense_put,
.private_value = ICE1712_EWX2496_AOUT_SEL,
},
};
/*
* EWS88MT specific controls
*/
/* analog output sensitivity;; address 0x48 bit 6 */
static int snd_ice1712_ews88mt_output_sense_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
struct ews_spec *spec = ice->spec;
unsigned char data;
snd_i2c_lock(ice->i2c);
if (snd_i2c_readbytes(spec->i2cdevs[EWS_I2C_PCF2], &data, 1) != 1) {
snd_i2c_unlock(ice->i2c);
return -EIO;
}
snd_i2c_unlock(ice->i2c);
ucontrol->value.enumerated.item[0] = data & ICE1712_EWS88MT_OUTPUT_SENSE ? 1 : 0; /* high = -10dBV, low = +4dBu */
return 0;
}
/* analog output sensitivity;; address 0x48 bit 6 */
static int snd_ice1712_ews88mt_output_sense_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
struct ews_spec *spec = ice->spec;
unsigned char data, ndata;
snd_i2c_lock(ice->i2c);
if (snd_i2c_readbytes(spec->i2cdevs[EWS_I2C_PCF2], &data, 1) != 1) {
snd_i2c_unlock(ice->i2c);
return -EIO;
}
ndata = (data & ~ICE1712_EWS88MT_OUTPUT_SENSE) | (ucontrol->value.enumerated.item[0] ? ICE1712_EWS88MT_OUTPUT_SENSE : 0);
if (ndata != data && snd_i2c_sendbytes(spec->i2cdevs[EWS_I2C_PCF2],
&ndata, 1) != 1) {
snd_i2c_unlock(ice->i2c);
return -EIO;
}
snd_i2c_unlock(ice->i2c);
return ndata != data;
}
/* analog input sensitivity; address 0x46 */
static int snd_ice1712_ews88mt_input_sense_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
struct ews_spec *spec = ice->spec;
int channel = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
unsigned char data;
if (snd_BUG_ON(channel < 0 || channel > 7))
return 0;
snd_i2c_lock(ice->i2c);
if (snd_i2c_readbytes(spec->i2cdevs[EWS_I2C_PCF1], &data, 1) != 1) {
snd_i2c_unlock(ice->i2c);
return -EIO;
}
/* reversed; high = +4dBu, low = -10dBV */
ucontrol->value.enumerated.item[0] = data & (1 << channel) ? 0 : 1;
snd_i2c_unlock(ice->i2c);
return 0;
}
/* analog output sensitivity; address 0x46 */
static int snd_ice1712_ews88mt_input_sense_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
struct ews_spec *spec = ice->spec;
int channel = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
unsigned char data, ndata;
if (snd_BUG_ON(channel < 0 || channel > 7))
return 0;
snd_i2c_lock(ice->i2c);
if (snd_i2c_readbytes(spec->i2cdevs[EWS_I2C_PCF1], &data, 1) != 1) {
snd_i2c_unlock(ice->i2c);
return -EIO;
}
ndata = (data & ~(1 << channel)) | (ucontrol->value.enumerated.item[0] ? 0 : (1 << channel));
if (ndata != data && snd_i2c_sendbytes(spec->i2cdevs[EWS_I2C_PCF1],
&ndata, 1) != 1) {
snd_i2c_unlock(ice->i2c);
return -EIO;
}
snd_i2c_unlock(ice->i2c);
return ndata != data;
}
static const struct snd_kcontrol_new snd_ice1712_ews88mt_input_sense = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Input Sensitivity Switch",
.info = snd_ice1712_ewx_io_sense_info,
.get = snd_ice1712_ews88mt_input_sense_get,
.put = snd_ice1712_ews88mt_input_sense_put,
.count = 8,
};
static const struct snd_kcontrol_new snd_ice1712_ews88mt_output_sense = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Output Sensitivity Switch",
.info = snd_ice1712_ewx_io_sense_info,
.get = snd_ice1712_ews88mt_output_sense_get,
.put = snd_ice1712_ews88mt_output_sense_put,
};
/*
* EWS88D specific controls
*/
#define snd_ice1712_ews88d_control_info snd_ctl_boolean_mono_info
static int snd_ice1712_ews88d_control_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
struct ews_spec *spec = ice->spec;
int shift = kcontrol->private_value & 0xff;
int invert = (kcontrol->private_value >> 8) & 1;
unsigned char data[2];
snd_i2c_lock(ice->i2c);
if (snd_i2c_readbytes(spec->i2cdevs[EWS_I2C_88D], data, 2) != 2) {
snd_i2c_unlock(ice->i2c);
return -EIO;
}
snd_i2c_unlock(ice->i2c);
data[0] = (data[shift >> 3] >> (shift & 7)) & 0x01;
if (invert)
data[0] ^= 0x01;
ucontrol->value.integer.value[0] = data[0];
return 0;
}
static int snd_ice1712_ews88d_control_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
struct ews_spec *spec = ice->spec;
int shift = kcontrol->private_value & 0xff;
int invert = (kcontrol->private_value >> 8) & 1;
unsigned char data[2], ndata[2];
int change;
snd_i2c_lock(ice->i2c);
if (snd_i2c_readbytes(spec->i2cdevs[EWS_I2C_88D], data, 2) != 2) {
snd_i2c_unlock(ice->i2c);
return -EIO;
}
ndata[shift >> 3] = data[shift >> 3] & ~(1 << (shift & 7));
if (invert) {
if (! ucontrol->value.integer.value[0])
ndata[shift >> 3] |= (1 << (shift & 7));
} else {
if (ucontrol->value.integer.value[0])
ndata[shift >> 3] |= (1 << (shift & 7));
}
change = (data[shift >> 3] != ndata[shift >> 3]);
if (change &&
snd_i2c_sendbytes(spec->i2cdevs[EWS_I2C_88D], data, 2) != 2) {
snd_i2c_unlock(ice->i2c);
return -EIO;
}
snd_i2c_unlock(ice->i2c);
return change;
}
#define EWS88D_CONTROL(xiface, xname, xshift, xinvert, xaccess) \
{ .iface = xiface,\
.name = xname,\
.access = xaccess,\
.info = snd_ice1712_ews88d_control_info,\
.get = snd_ice1712_ews88d_control_get,\
.put = snd_ice1712_ews88d_control_put,\
.private_value = xshift | (xinvert << 8),\
}
static const struct snd_kcontrol_new snd_ice1712_ews88d_controls[] = {
EWS88D_CONTROL(SNDRV_CTL_ELEM_IFACE_MIXER, "IEC958 Input Optical", 0, 1, 0), /* inverted */
EWS88D_CONTROL(SNDRV_CTL_ELEM_IFACE_MIXER, "ADAT Output Optical", 1, 0, 0),
EWS88D_CONTROL(SNDRV_CTL_ELEM_IFACE_MIXER, "ADAT External Master Clock", 2, 0, 0),
EWS88D_CONTROL(SNDRV_CTL_ELEM_IFACE_MIXER, "Enable ADAT", 3, 0, 0),
EWS88D_CONTROL(SNDRV_CTL_ELEM_IFACE_MIXER, "ADAT Through", 4, 1, 0),
};
/*
* DMX 6Fire specific controls
*/
static int snd_ice1712_6fire_read_pca(struct snd_ice1712 *ice, unsigned char reg)
{
unsigned char byte;
struct ews_spec *spec = ice->spec;
snd_i2c_lock(ice->i2c);
byte = reg;
if (snd_i2c_sendbytes(spec->i2cdevs[EWS_I2C_6FIRE], &byte, 1) != 1) {
snd_i2c_unlock(ice->i2c);
dev_err(ice->card->dev, "cannot send pca\n");
return -EIO;
}
byte = 0;
if (snd_i2c_readbytes(spec->i2cdevs[EWS_I2C_6FIRE], &byte, 1) != 1) {
snd_i2c_unlock(ice->i2c);
dev_err(ice->card->dev, "cannot read pca\n");
return -EIO;
}
snd_i2c_unlock(ice->i2c);
return byte;
}
static int snd_ice1712_6fire_write_pca(struct snd_ice1712 *ice, unsigned char reg, unsigned char data)
{
unsigned char bytes[2];
struct ews_spec *spec = ice->spec;
snd_i2c_lock(ice->i2c);
bytes[0] = reg;
bytes[1] = data;
if (snd_i2c_sendbytes(spec->i2cdevs[EWS_I2C_6FIRE], bytes, 2) != 2) {
snd_i2c_unlock(ice->i2c);
return -EIO;
}
snd_i2c_unlock(ice->i2c);
return 0;
}
#define snd_ice1712_6fire_control_info snd_ctl_boolean_mono_info
static int snd_ice1712_6fire_control_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int shift = kcontrol->private_value & 0xff;
int invert = (kcontrol->private_value >> 8) & 1;
int data;
data = snd_ice1712_6fire_read_pca(ice, PCF9554_REG_OUTPUT);
if (data < 0)
return data;
data = (data >> shift) & 1;
if (invert)
data ^= 1;
ucontrol->value.integer.value[0] = data;
return 0;
}
static int snd_ice1712_6fire_control_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int shift = kcontrol->private_value & 0xff;
int invert = (kcontrol->private_value >> 8) & 1;
int data, ndata;
data = snd_ice1712_6fire_read_pca(ice, PCF9554_REG_OUTPUT);
if (data < 0)
return data;
ndata = data & ~(1 << shift);
if (ucontrol->value.integer.value[0])
ndata |= (1 << shift);
if (invert)
ndata ^= (1 << shift);
if (data != ndata) {
snd_ice1712_6fire_write_pca(ice, PCF9554_REG_OUTPUT, (unsigned char)ndata);
return 1;
}
return 0;
}
static int snd_ice1712_6fire_select_input_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
static const char * const texts[4] = {
"Internal", "Front Input", "Rear Input", "Wave Table"
};
return snd_ctl_enum_info(uinfo, 1, 4, texts);
}
static int snd_ice1712_6fire_select_input_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int data;
data = snd_ice1712_6fire_read_pca(ice, PCF9554_REG_OUTPUT);
if (data < 0)
return data;
ucontrol->value.integer.value[0] = data & 3;
return 0;
}
static int snd_ice1712_6fire_select_input_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int data, ndata;
data = snd_ice1712_6fire_read_pca(ice, PCF9554_REG_OUTPUT);
if (data < 0)
return data;
ndata = data & ~3;
ndata |= (ucontrol->value.integer.value[0] & 3);
if (data != ndata) {
snd_ice1712_6fire_write_pca(ice, PCF9554_REG_OUTPUT, (unsigned char)ndata);
return 1;
}
return 0;
}
#define DMX6FIRE_CONTROL(xname, xshift, xinvert) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,\
.name = xname,\
.info = snd_ice1712_6fire_control_info,\
.get = snd_ice1712_6fire_control_get,\
.put = snd_ice1712_6fire_control_put,\
.private_value = xshift | (xinvert << 8),\
}
static const struct snd_kcontrol_new snd_ice1712_6fire_controls[] = {
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Analog Input Select",
.info = snd_ice1712_6fire_select_input_info,
.get = snd_ice1712_6fire_select_input_get,
.put = snd_ice1712_6fire_select_input_put,
},
DMX6FIRE_CONTROL("Front Digital Input Switch", 2, 1),
// DMX6FIRE_CONTROL("Master Clock Select", 3, 0),
DMX6FIRE_CONTROL("Optical Digital Input Switch", 4, 0),
DMX6FIRE_CONTROL("Phono Analog Input Switch", 5, 0),
DMX6FIRE_CONTROL("Breakbox LED", 6, 0),
};
static int snd_ice1712_ews_add_controls(struct snd_ice1712 *ice)
{
unsigned int idx;
int err;
/* all terratec cards have spdif, but cs8427 module builds it's own controls */
if (ice->cs8427 == NULL) {
err = snd_ice1712_spdif_build_controls(ice);
if (err < 0)
return err;
}
/* ak4524 controls */
switch (ice->eeprom.subvendor) {
case ICE1712_SUBDEVICE_EWX2496:
case ICE1712_SUBDEVICE_EWS88MT:
case ICE1712_SUBDEVICE_EWS88MT_NEW:
case ICE1712_SUBDEVICE_PHASE88:
case ICE1712_SUBDEVICE_TS88:
case ICE1712_SUBDEVICE_DMX6FIRE:
err = snd_ice1712_akm4xxx_build_controls(ice);
if (err < 0)
return err;
break;
}
/* card specific controls */
switch (ice->eeprom.subvendor) {
case ICE1712_SUBDEVICE_EWX2496:
for (idx = 0; idx < ARRAY_SIZE(snd_ice1712_ewx2496_controls); idx++) {
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_ewx2496_controls[idx], ice));
if (err < 0)
return err;
}
break;
case ICE1712_SUBDEVICE_EWS88MT:
case ICE1712_SUBDEVICE_EWS88MT_NEW:
case ICE1712_SUBDEVICE_PHASE88:
case ICE1712_SUBDEVICE_TS88:
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_ews88mt_input_sense, ice));
if (err < 0)
return err;
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_ews88mt_output_sense, ice));
if (err < 0)
return err;
break;
case ICE1712_SUBDEVICE_EWS88D:
for (idx = 0; idx < ARRAY_SIZE(snd_ice1712_ews88d_controls); idx++) {
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_ews88d_controls[idx], ice));
if (err < 0)
return err;
}
break;
case ICE1712_SUBDEVICE_DMX6FIRE:
for (idx = 0; idx < ARRAY_SIZE(snd_ice1712_6fire_controls); idx++) {
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_6fire_controls[idx], ice));
if (err < 0)
return err;
}
break;
}
return 0;
}
/* entry point */
struct snd_ice1712_card_info snd_ice1712_ews_cards[] = {
{
.subvendor = ICE1712_SUBDEVICE_EWX2496,
.name = "TerraTec EWX24/96",
.model = "ewx2496",
.chip_init = snd_ice1712_ews_init,
.build_controls = snd_ice1712_ews_add_controls,
},
{
.subvendor = ICE1712_SUBDEVICE_EWS88MT,
.name = "TerraTec EWS88MT",
.model = "ews88mt",
.chip_init = snd_ice1712_ews_init,
.build_controls = snd_ice1712_ews_add_controls,
},
{
.subvendor = ICE1712_SUBDEVICE_EWS88MT_NEW,
.name = "TerraTec EWS88MT",
.model = "ews88mt_new",
.chip_init = snd_ice1712_ews_init,
.build_controls = snd_ice1712_ews_add_controls,
},
{
.subvendor = ICE1712_SUBDEVICE_PHASE88,
.name = "TerraTec Phase88",
.model = "phase88",
.chip_init = snd_ice1712_ews_init,
.build_controls = snd_ice1712_ews_add_controls,
},
{
.subvendor = ICE1712_SUBDEVICE_TS88,
.name = "terrasoniq TS88",
.model = "phase88",
.chip_init = snd_ice1712_ews_init,
.build_controls = snd_ice1712_ews_add_controls,
},
{
.subvendor = ICE1712_SUBDEVICE_EWS88D,
.name = "TerraTec EWS88D",
.model = "ews88d",
.chip_init = snd_ice1712_ews_init,
.build_controls = snd_ice1712_ews_add_controls,
},
{
.subvendor = ICE1712_SUBDEVICE_DMX6FIRE,
.name = "TerraTec DMX6Fire",
.model = "dmx6fire",
.chip_init = snd_ice1712_ews_init,
.build_controls = snd_ice1712_ews_add_controls,
.mpu401_1_name = "MIDI-Front DMX6fire",
.mpu401_2_name = "Wavetable DMX6fire",
.mpu401_2_info_flags = MPU401_INFO_OUTPUT,
},
{ } /* terminator */
};
| linux-master | sound/pci/ice1712/ews.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* ALSA driver for ICEnsemble ICE1712 (Envy24)
*
* Copyright (c) 2000 Jaroslav Kysela <[email protected]>
*/
/*
NOTES:
- spdif nonaudio consumer mode does not work (at least with my
Sony STR-DB830)
*/
/*
* Changes:
*
* 2002.09.09 Takashi Iwai <[email protected]>
* split the code to several files. each low-level routine
* is stored in the local file and called from registration
* function from card_info struct.
*
* 2002.11.26 James Stafford <[email protected]>
* Added support for VT1724 (Envy24HT)
* I have left out support for 176.4 and 192 KHz for the moment.
* I also haven't done anything with the internal S/PDIF transmitter or the MPU-401
*
* 2003.02.20 Taksahi Iwai <[email protected]>
* Split vt1724 part to an independent driver.
* The GPIO is accessed through the callback functions now.
*
* 2004.03.31 Doug McLain <[email protected]>
* Added support for Event Electronics EZ8 card to hoontech.c.
*/
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/dma-mapping.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <sound/core.h>
#include <sound/cs8427.h>
#include <sound/info.h>
#include <sound/initval.h>
#include <sound/tlv.h>
#include <sound/asoundef.h>
#include "ice1712.h"
/* lowlevel routines */
#include "delta.h"
#include "ews.h"
#include "hoontech.h"
MODULE_AUTHOR("Jaroslav Kysela <[email protected]>");
MODULE_DESCRIPTION("ICEnsemble ICE1712 (Envy24)");
MODULE_LICENSE("GPL");
static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;/* Enable this card */
static char *model[SNDRV_CARDS];
static bool omni[SNDRV_CARDS]; /* Delta44 & 66 Omni I/O support */
static int cs8427_timeout[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = 500}; /* CS8427 S/PDIF transceiver reset timeout value in msec */
static int dxr_enable[SNDRV_CARDS]; /* DXR enable for DMX6FIRE */
module_param_array(index, int, NULL, 0444);
MODULE_PARM_DESC(index, "Index value for ICE1712 soundcard.");
module_param_array(id, charp, NULL, 0444);
MODULE_PARM_DESC(id, "ID string for ICE1712 soundcard.");
module_param_array(enable, bool, NULL, 0444);
MODULE_PARM_DESC(enable, "Enable ICE1712 soundcard.");
module_param_array(omni, bool, NULL, 0444);
MODULE_PARM_DESC(omni, "Enable Midiman M-Audio Delta Omni I/O support.");
module_param_array(cs8427_timeout, int, NULL, 0444);
MODULE_PARM_DESC(cs8427_timeout, "Define reset timeout for cs8427 chip in msec resolution.");
module_param_array(model, charp, NULL, 0444);
MODULE_PARM_DESC(model, "Use the given board model.");
module_param_array(dxr_enable, int, NULL, 0444);
MODULE_PARM_DESC(dxr_enable, "Enable DXR support for Terratec DMX6FIRE.");
static const struct pci_device_id snd_ice1712_ids[] = {
{ PCI_VDEVICE(ICE, PCI_DEVICE_ID_ICE_1712), 0 }, /* ICE1712 */
{ 0, }
};
MODULE_DEVICE_TABLE(pci, snd_ice1712_ids);
static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice);
static int snd_ice1712_build_controls(struct snd_ice1712 *ice);
static int PRO_RATE_LOCKED;
static int PRO_RATE_RESET = 1;
static unsigned int PRO_RATE_DEFAULT = 44100;
/*
* Basic I/O
*/
/* check whether the clock mode is spdif-in */
static inline int is_spdif_master(struct snd_ice1712 *ice)
{
return (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER) ? 1 : 0;
}
static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
{
return is_spdif_master(ice) || PRO_RATE_LOCKED;
}
static inline void snd_ice1712_ds_write(struct snd_ice1712 *ice, u8 channel, u8 addr, u32 data)
{
outb((channel << 4) | addr, ICEDS(ice, INDEX));
outl(data, ICEDS(ice, DATA));
}
static inline u32 snd_ice1712_ds_read(struct snd_ice1712 *ice, u8 channel, u8 addr)
{
outb((channel << 4) | addr, ICEDS(ice, INDEX));
return inl(ICEDS(ice, DATA));
}
static void snd_ice1712_ac97_write(struct snd_ac97 *ac97,
unsigned short reg,
unsigned short val)
{
struct snd_ice1712 *ice = ac97->private_data;
int tm;
unsigned char old_cmd = 0;
for (tm = 0; tm < 0x10000; tm++) {
old_cmd = inb(ICEREG(ice, AC97_CMD));
if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
continue;
if (!(old_cmd & ICE1712_AC97_READY))
continue;
break;
}
outb(reg, ICEREG(ice, AC97_INDEX));
outw(val, ICEREG(ice, AC97_DATA));
old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
outb(old_cmd | ICE1712_AC97_WRITE, ICEREG(ice, AC97_CMD));
for (tm = 0; tm < 0x10000; tm++)
if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
break;
}
static unsigned short snd_ice1712_ac97_read(struct snd_ac97 *ac97,
unsigned short reg)
{
struct snd_ice1712 *ice = ac97->private_data;
int tm;
unsigned char old_cmd = 0;
for (tm = 0; tm < 0x10000; tm++) {
old_cmd = inb(ICEREG(ice, AC97_CMD));
if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
continue;
if (!(old_cmd & ICE1712_AC97_READY))
continue;
break;
}
outb(reg, ICEREG(ice, AC97_INDEX));
outb(old_cmd | ICE1712_AC97_READ, ICEREG(ice, AC97_CMD));
for (tm = 0; tm < 0x10000; tm++)
if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
break;
if (tm >= 0x10000) /* timeout */
return ~0;
return inw(ICEREG(ice, AC97_DATA));
}
/*
* pro ac97 section
*/
static void snd_ice1712_pro_ac97_write(struct snd_ac97 *ac97,
unsigned short reg,
unsigned short val)
{
struct snd_ice1712 *ice = ac97->private_data;
int tm;
unsigned char old_cmd = 0;
for (tm = 0; tm < 0x10000; tm++) {
old_cmd = inb(ICEMT(ice, AC97_CMD));
if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
continue;
if (!(old_cmd & ICE1712_AC97_READY))
continue;
break;
}
outb(reg, ICEMT(ice, AC97_INDEX));
outw(val, ICEMT(ice, AC97_DATA));
old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
outb(old_cmd | ICE1712_AC97_WRITE, ICEMT(ice, AC97_CMD));
for (tm = 0; tm < 0x10000; tm++)
if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
break;
}
static unsigned short snd_ice1712_pro_ac97_read(struct snd_ac97 *ac97,
unsigned short reg)
{
struct snd_ice1712 *ice = ac97->private_data;
int tm;
unsigned char old_cmd = 0;
for (tm = 0; tm < 0x10000; tm++) {
old_cmd = inb(ICEMT(ice, AC97_CMD));
if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
continue;
if (!(old_cmd & ICE1712_AC97_READY))
continue;
break;
}
outb(reg, ICEMT(ice, AC97_INDEX));
outb(old_cmd | ICE1712_AC97_READ, ICEMT(ice, AC97_CMD));
for (tm = 0; tm < 0x10000; tm++)
if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
break;
if (tm >= 0x10000) /* timeout */
return ~0;
return inw(ICEMT(ice, AC97_DATA));
}
/*
* consumer ac97 digital mix
*/
#define snd_ice1712_digmix_route_ac97_info snd_ctl_boolean_mono_info
static int snd_ice1712_digmix_route_ac97_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_ROUTECTRL)) & ICE1712_ROUTE_AC97 ? 1 : 0;
return 0;
}
static int snd_ice1712_digmix_route_ac97_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned char val, nval;
spin_lock_irq(&ice->reg_lock);
val = inb(ICEMT(ice, MONITOR_ROUTECTRL));
nval = val & ~ICE1712_ROUTE_AC97;
if (ucontrol->value.integer.value[0])
nval |= ICE1712_ROUTE_AC97;
outb(nval, ICEMT(ice, MONITOR_ROUTECTRL));
spin_unlock_irq(&ice->reg_lock);
return val != nval;
}
static const struct snd_kcontrol_new snd_ice1712_mixer_digmix_route_ac97 = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Digital Mixer To AC97",
.info = snd_ice1712_digmix_route_ac97_info,
.get = snd_ice1712_digmix_route_ac97_get,
.put = snd_ice1712_digmix_route_ac97_put,
};
/*
* gpio operations
*/
static void snd_ice1712_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
{
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, data);
inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
}
static unsigned int snd_ice1712_get_gpio_dir(struct snd_ice1712 *ice)
{
return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION);
}
static unsigned int snd_ice1712_get_gpio_mask(struct snd_ice1712 *ice)
{
return snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK);
}
static void snd_ice1712_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
{
snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, data);
inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
}
static unsigned int snd_ice1712_get_gpio_data(struct snd_ice1712 *ice)
{
return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
}
static void snd_ice1712_set_gpio_data(struct snd_ice1712 *ice, unsigned int val)
{
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, val);
inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
}
/*
*
* CS8427 interface
*
*/
/*
* change the input clock selection
* spdif_clock = 1 - IEC958 input, 0 - Envy24
*/
static int snd_ice1712_cs8427_set_input_clock(struct snd_ice1712 *ice, int spdif_clock)
{
unsigned char reg[2] = { 0x80 | 4, 0 }; /* CS8427 auto increment | register number 4 + data */
unsigned char val, nval;
int res = 0;
snd_i2c_lock(ice->i2c);
if (snd_i2c_sendbytes(ice->cs8427, reg, 1) != 1) {
snd_i2c_unlock(ice->i2c);
return -EIO;
}
if (snd_i2c_readbytes(ice->cs8427, &val, 1) != 1) {
snd_i2c_unlock(ice->i2c);
return -EIO;
}
nval = val & 0xf0;
if (spdif_clock)
nval |= 0x01;
else
nval |= 0x04;
if (val != nval) {
reg[1] = nval;
if (snd_i2c_sendbytes(ice->cs8427, reg, 2) != 2) {
res = -EIO;
} else {
res++;
}
}
snd_i2c_unlock(ice->i2c);
return res;
}
/*
* spdif callbacks
*/
static void open_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
{
snd_cs8427_iec958_active(ice->cs8427, 1);
}
static void close_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
{
snd_cs8427_iec958_active(ice->cs8427, 0);
}
static void setup_cs8427(struct snd_ice1712 *ice, int rate)
{
snd_cs8427_iec958_pcm(ice->cs8427, rate);
}
/*
* create and initialize callbacks for cs8427 interface
*/
int snd_ice1712_init_cs8427(struct snd_ice1712 *ice, int addr)
{
int err;
err = snd_cs8427_create(ice->i2c, addr,
(ice->cs8427_timeout * HZ) / 1000, &ice->cs8427);
if (err < 0) {
dev_err(ice->card->dev, "CS8427 initialization failed\n");
return err;
}
ice->spdif.ops.open = open_cs8427;
ice->spdif.ops.close = close_cs8427;
ice->spdif.ops.setup_rate = setup_cs8427;
return 0;
}
static void snd_ice1712_set_input_clock_source(struct snd_ice1712 *ice, int spdif_is_master)
{
/* change CS8427 clock source too */
if (ice->cs8427)
snd_ice1712_cs8427_set_input_clock(ice, spdif_is_master);
/* notify ak4524 chip as well */
if (spdif_is_master) {
unsigned int i;
for (i = 0; i < ice->akm_codecs; i++) {
if (ice->akm[i].ops.set_rate_val)
ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
}
}
}
/*
* Interrupt handler
*/
static irqreturn_t snd_ice1712_interrupt(int irq, void *dev_id)
{
struct snd_ice1712 *ice = dev_id;
unsigned char status;
int handled = 0;
while (1) {
status = inb(ICEREG(ice, IRQSTAT));
if (status == 0)
break;
handled = 1;
if (status & ICE1712_IRQ_MPU1) {
if (ice->rmidi[0])
snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data);
outb(ICE1712_IRQ_MPU1, ICEREG(ice, IRQSTAT));
status &= ~ICE1712_IRQ_MPU1;
}
if (status & ICE1712_IRQ_TIMER)
outb(ICE1712_IRQ_TIMER, ICEREG(ice, IRQSTAT));
if (status & ICE1712_IRQ_MPU2) {
if (ice->rmidi[1])
snd_mpu401_uart_interrupt(irq, ice->rmidi[1]->private_data);
outb(ICE1712_IRQ_MPU2, ICEREG(ice, IRQSTAT));
status &= ~ICE1712_IRQ_MPU2;
}
if (status & ICE1712_IRQ_PROPCM) {
unsigned char mtstat = inb(ICEMT(ice, IRQ));
if (mtstat & ICE1712_MULTI_PBKSTATUS) {
if (ice->playback_pro_substream)
snd_pcm_period_elapsed(ice->playback_pro_substream);
outb(ICE1712_MULTI_PBKSTATUS, ICEMT(ice, IRQ));
}
if (mtstat & ICE1712_MULTI_CAPSTATUS) {
if (ice->capture_pro_substream)
snd_pcm_period_elapsed(ice->capture_pro_substream);
outb(ICE1712_MULTI_CAPSTATUS, ICEMT(ice, IRQ));
}
}
if (status & ICE1712_IRQ_FM)
outb(ICE1712_IRQ_FM, ICEREG(ice, IRQSTAT));
if (status & ICE1712_IRQ_PBKDS) {
u32 idx;
u16 pbkstatus;
struct snd_pcm_substream *substream;
pbkstatus = inw(ICEDS(ice, INTSTAT));
/* dev_dbg(ice->card->dev, "pbkstatus = 0x%x\n", pbkstatus); */
for (idx = 0; idx < 6; idx++) {
if ((pbkstatus & (3 << (idx * 2))) == 0)
continue;
substream = ice->playback_con_substream_ds[idx];
if (substream != NULL)
snd_pcm_period_elapsed(substream);
outw(3 << (idx * 2), ICEDS(ice, INTSTAT));
}
outb(ICE1712_IRQ_PBKDS, ICEREG(ice, IRQSTAT));
}
if (status & ICE1712_IRQ_CONCAP) {
if (ice->capture_con_substream)
snd_pcm_period_elapsed(ice->capture_con_substream);
outb(ICE1712_IRQ_CONCAP, ICEREG(ice, IRQSTAT));
}
if (status & ICE1712_IRQ_CONPBK) {
if (ice->playback_con_substream)
snd_pcm_period_elapsed(ice->playback_con_substream);
outb(ICE1712_IRQ_CONPBK, ICEREG(ice, IRQSTAT));
}
}
return IRQ_RETVAL(handled);
}
/*
* PCM part - consumer I/O
*/
static int snd_ice1712_playback_trigger(struct snd_pcm_substream *substream,
int cmd)
{
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
int result = 0;
u32 tmp;
spin_lock(&ice->reg_lock);
tmp = snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL);
if (cmd == SNDRV_PCM_TRIGGER_START) {
tmp |= 1;
} else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
tmp &= ~1;
} else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
tmp |= 2;
} else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
tmp &= ~2;
} else {
result = -EINVAL;
}
snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
spin_unlock(&ice->reg_lock);
return result;
}
static int snd_ice1712_playback_ds_trigger(struct snd_pcm_substream *substream,
int cmd)
{
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
int result = 0;
u32 tmp;
spin_lock(&ice->reg_lock);
tmp = snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL);
if (cmd == SNDRV_PCM_TRIGGER_START) {
tmp |= 1;
} else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
tmp &= ~1;
} else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
tmp |= 2;
} else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
tmp &= ~2;
} else {
result = -EINVAL;
}
snd_ice1712_ds_write(ice, substream->number * 2, ICE1712_DSC_CONTROL, tmp);
spin_unlock(&ice->reg_lock);
return result;
}
static int snd_ice1712_capture_trigger(struct snd_pcm_substream *substream,
int cmd)
{
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
int result = 0;
u8 tmp;
spin_lock(&ice->reg_lock);
tmp = snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL);
if (cmd == SNDRV_PCM_TRIGGER_START) {
tmp |= 1;
} else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
tmp &= ~1;
} else {
result = -EINVAL;
}
snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
spin_unlock(&ice->reg_lock);
return result;
}
static int snd_ice1712_playback_prepare(struct snd_pcm_substream *substream)
{
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
u32 period_size, buf_size, rate, tmp;
period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
tmp = 0x0000;
if (snd_pcm_format_width(runtime->format) == 16)
tmp |= 0x10;
if (runtime->channels == 2)
tmp |= 0x08;
rate = (runtime->rate * 8192) / 375;
if (rate > 0x000fffff)
rate = 0x000fffff;
spin_lock_irq(&ice->reg_lock);
outb(0, ice->ddma_port + 15);
outb(ICE1712_DMA_MODE_WRITE | ICE1712_DMA_AUTOINIT, ice->ddma_port + 0x0b);
outl(runtime->dma_addr, ice->ddma_port + 0);
outw(buf_size, ice->ddma_port + 4);
snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_LO, rate & 0xff);
snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_MID, (rate >> 8) & 0xff);
snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_HI, (rate >> 16) & 0xff);
snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_LO, period_size & 0xff);
snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_HI, period_size >> 8);
snd_ice1712_write(ice, ICE1712_IREG_PBK_LEFT, 0);
snd_ice1712_write(ice, ICE1712_IREG_PBK_RIGHT, 0);
spin_unlock_irq(&ice->reg_lock);
return 0;
}
static int snd_ice1712_playback_ds_prepare(struct snd_pcm_substream *substream)
{
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
u32 period_size, rate, tmp, chn;
period_size = snd_pcm_lib_period_bytes(substream) - 1;
tmp = 0x0064;
if (snd_pcm_format_width(runtime->format) == 16)
tmp &= ~0x04;
if (runtime->channels == 2)
tmp |= 0x08;
rate = (runtime->rate * 8192) / 375;
if (rate > 0x000fffff)
rate = 0x000fffff;
ice->playback_con_active_buf[substream->number] = 0;
ice->playback_con_virt_addr[substream->number] = runtime->dma_addr;
chn = substream->number * 2;
spin_lock_irq(&ice->reg_lock);
snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR0, runtime->dma_addr);
snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT0, period_size);
snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR1, runtime->dma_addr + (runtime->periods > 1 ? period_size + 1 : 0));
snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT1, period_size);
snd_ice1712_ds_write(ice, chn, ICE1712_DSC_RATE, rate);
snd_ice1712_ds_write(ice, chn, ICE1712_DSC_VOLUME, 0);
snd_ice1712_ds_write(ice, chn, ICE1712_DSC_CONTROL, tmp);
if (runtime->channels == 2) {
snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_RATE, rate);
snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_VOLUME, 0);
}
spin_unlock_irq(&ice->reg_lock);
return 0;
}
static int snd_ice1712_capture_prepare(struct snd_pcm_substream *substream)
{
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
u32 period_size, buf_size;
u8 tmp;
period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
tmp = 0x06;
if (snd_pcm_format_width(runtime->format) == 16)
tmp &= ~0x04;
if (runtime->channels == 2)
tmp &= ~0x02;
spin_lock_irq(&ice->reg_lock);
outl(ice->capture_con_virt_addr = runtime->dma_addr, ICEREG(ice, CONCAP_ADDR));
outw(buf_size, ICEREG(ice, CONCAP_COUNT));
snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_HI, period_size >> 8);
snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_LO, period_size & 0xff);
snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
spin_unlock_irq(&ice->reg_lock);
snd_ac97_set_rate(ice->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
return 0;
}
static snd_pcm_uframes_t snd_ice1712_playback_pointer(struct snd_pcm_substream *substream)
{
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
size_t ptr;
if (!(snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL) & 1))
return 0;
ptr = runtime->buffer_size - inw(ice->ddma_port + 4);
ptr = bytes_to_frames(substream->runtime, ptr);
if (ptr == runtime->buffer_size)
ptr = 0;
return ptr;
}
static snd_pcm_uframes_t snd_ice1712_playback_ds_pointer(struct snd_pcm_substream *substream)
{
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
u8 addr;
size_t ptr;
if (!(snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL) & 1))
return 0;
if (ice->playback_con_active_buf[substream->number])
addr = ICE1712_DSC_ADDR1;
else
addr = ICE1712_DSC_ADDR0;
ptr = snd_ice1712_ds_read(ice, substream->number * 2, addr) -
ice->playback_con_virt_addr[substream->number];
ptr = bytes_to_frames(substream->runtime, ptr);
if (ptr == substream->runtime->buffer_size)
ptr = 0;
return ptr;
}
static snd_pcm_uframes_t snd_ice1712_capture_pointer(struct snd_pcm_substream *substream)
{
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
size_t ptr;
if (!(snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL) & 1))
return 0;
ptr = inl(ICEREG(ice, CONCAP_ADDR)) - ice->capture_con_virt_addr;
ptr = bytes_to_frames(substream->runtime, ptr);
if (ptr == substream->runtime->buffer_size)
ptr = 0;
return ptr;
}
static const struct snd_pcm_hardware snd_ice1712_playback = {
.info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_MMAP_VALID |
SNDRV_PCM_INFO_PAUSE),
.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
.rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
.rate_min = 4000,
.rate_max = 48000,
.channels_min = 1,
.channels_max = 2,
.buffer_bytes_max = (64*1024),
.period_bytes_min = 64,
.period_bytes_max = (64*1024),
.periods_min = 1,
.periods_max = 1024,
.fifo_size = 0,
};
static const struct snd_pcm_hardware snd_ice1712_playback_ds = {
.info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_MMAP_VALID |
SNDRV_PCM_INFO_PAUSE),
.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
.rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
.rate_min = 4000,
.rate_max = 48000,
.channels_min = 1,
.channels_max = 2,
.buffer_bytes_max = (128*1024),
.period_bytes_min = 64,
.period_bytes_max = (128*1024),
.periods_min = 2,
.periods_max = 2,
.fifo_size = 0,
};
static const struct snd_pcm_hardware snd_ice1712_capture = {
.info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_MMAP_VALID),
.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
.rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
.rate_min = 4000,
.rate_max = 48000,
.channels_min = 1,
.channels_max = 2,
.buffer_bytes_max = (64*1024),
.period_bytes_min = 64,
.period_bytes_max = (64*1024),
.periods_min = 1,
.periods_max = 1024,
.fifo_size = 0,
};
static int snd_ice1712_playback_open(struct snd_pcm_substream *substream)
{
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
ice->playback_con_substream = substream;
runtime->hw = snd_ice1712_playback;
return 0;
}
static int snd_ice1712_playback_ds_open(struct snd_pcm_substream *substream)
{
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
u32 tmp;
ice->playback_con_substream_ds[substream->number] = substream;
runtime->hw = snd_ice1712_playback_ds;
spin_lock_irq(&ice->reg_lock);
tmp = inw(ICEDS(ice, INTMASK)) & ~(1 << (substream->number * 2));
outw(tmp, ICEDS(ice, INTMASK));
spin_unlock_irq(&ice->reg_lock);
return 0;
}
static int snd_ice1712_capture_open(struct snd_pcm_substream *substream)
{
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
ice->capture_con_substream = substream;
runtime->hw = snd_ice1712_capture;
runtime->hw.rates = ice->ac97->rates[AC97_RATES_ADC];
if (!(runtime->hw.rates & SNDRV_PCM_RATE_8000))
runtime->hw.rate_min = 48000;
return 0;
}
static int snd_ice1712_playback_close(struct snd_pcm_substream *substream)
{
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
ice->playback_con_substream = NULL;
return 0;
}
static int snd_ice1712_playback_ds_close(struct snd_pcm_substream *substream)
{
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
u32 tmp;
spin_lock_irq(&ice->reg_lock);
tmp = inw(ICEDS(ice, INTMASK)) | (3 << (substream->number * 2));
outw(tmp, ICEDS(ice, INTMASK));
spin_unlock_irq(&ice->reg_lock);
ice->playback_con_substream_ds[substream->number] = NULL;
return 0;
}
static int snd_ice1712_capture_close(struct snd_pcm_substream *substream)
{
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
ice->capture_con_substream = NULL;
return 0;
}
static const struct snd_pcm_ops snd_ice1712_playback_ops = {
.open = snd_ice1712_playback_open,
.close = snd_ice1712_playback_close,
.prepare = snd_ice1712_playback_prepare,
.trigger = snd_ice1712_playback_trigger,
.pointer = snd_ice1712_playback_pointer,
};
static const struct snd_pcm_ops snd_ice1712_playback_ds_ops = {
.open = snd_ice1712_playback_ds_open,
.close = snd_ice1712_playback_ds_close,
.prepare = snd_ice1712_playback_ds_prepare,
.trigger = snd_ice1712_playback_ds_trigger,
.pointer = snd_ice1712_playback_ds_pointer,
};
static const struct snd_pcm_ops snd_ice1712_capture_ops = {
.open = snd_ice1712_capture_open,
.close = snd_ice1712_capture_close,
.prepare = snd_ice1712_capture_prepare,
.trigger = snd_ice1712_capture_trigger,
.pointer = snd_ice1712_capture_pointer,
};
static int snd_ice1712_pcm(struct snd_ice1712 *ice, int device)
{
struct snd_pcm *pcm;
int err;
err = snd_pcm_new(ice->card, "ICE1712 consumer", device, 1, 1, &pcm);
if (err < 0)
return err;
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ops);
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_ops);
pcm->private_data = ice;
pcm->info_flags = 0;
strcpy(pcm->name, "ICE1712 consumer");
ice->pcm = pcm;
snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
&ice->pci->dev, 64*1024, 64*1024);
dev_warn(ice->card->dev,
"Consumer PCM code does not work well at the moment --jk\n");
return 0;
}
static int snd_ice1712_pcm_ds(struct snd_ice1712 *ice, int device)
{
struct snd_pcm *pcm;
int err;
err = snd_pcm_new(ice->card, "ICE1712 consumer (DS)", device, 6, 0, &pcm);
if (err < 0)
return err;
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ds_ops);
pcm->private_data = ice;
pcm->info_flags = 0;
strcpy(pcm->name, "ICE1712 consumer (DS)");
ice->pcm_ds = pcm;
snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
&ice->pci->dev, 64*1024, 128*1024);
return 0;
}
/*
* PCM code - professional part (multitrack)
*/
static const unsigned int rates[] = { 8000, 9600, 11025, 12000, 16000, 22050, 24000,
32000, 44100, 48000, 64000, 88200, 96000 };
static const struct snd_pcm_hw_constraint_list hw_constraints_rates = {
.count = ARRAY_SIZE(rates),
.list = rates,
.mask = 0,
};
static int snd_ice1712_pro_trigger(struct snd_pcm_substream *substream,
int cmd)
{
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
switch (cmd) {
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
{
unsigned int what;
unsigned int old;
if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
return -EINVAL;
what = ICE1712_PLAYBACK_PAUSE;
snd_pcm_trigger_done(substream, substream);
spin_lock(&ice->reg_lock);
old = inl(ICEMT(ice, PLAYBACK_CONTROL));
if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
old |= what;
else
old &= ~what;
outl(old, ICEMT(ice, PLAYBACK_CONTROL));
spin_unlock(&ice->reg_lock);
break;
}
case SNDRV_PCM_TRIGGER_START:
case SNDRV_PCM_TRIGGER_STOP:
{
unsigned int what = 0;
unsigned int old;
struct snd_pcm_substream *s;
snd_pcm_group_for_each_entry(s, substream) {
if (s == ice->playback_pro_substream) {
what |= ICE1712_PLAYBACK_START;
snd_pcm_trigger_done(s, substream);
} else if (s == ice->capture_pro_substream) {
what |= ICE1712_CAPTURE_START_SHADOW;
snd_pcm_trigger_done(s, substream);
}
}
spin_lock(&ice->reg_lock);
old = inl(ICEMT(ice, PLAYBACK_CONTROL));
if (cmd == SNDRV_PCM_TRIGGER_START)
old |= what;
else
old &= ~what;
outl(old, ICEMT(ice, PLAYBACK_CONTROL));
spin_unlock(&ice->reg_lock);
break;
}
default:
return -EINVAL;
}
return 0;
}
/*
*/
static void snd_ice1712_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, int force)
{
unsigned long flags;
unsigned char val, old;
unsigned int i;
switch (rate) {
case 8000: val = 6; break;
case 9600: val = 3; break;
case 11025: val = 10; break;
case 12000: val = 2; break;
case 16000: val = 5; break;
case 22050: val = 9; break;
case 24000: val = 1; break;
case 32000: val = 4; break;
case 44100: val = 8; break;
case 48000: val = 0; break;
case 64000: val = 15; break;
case 88200: val = 11; break;
case 96000: val = 7; break;
default:
snd_BUG();
val = 0;
rate = 48000;
break;
}
spin_lock_irqsave(&ice->reg_lock, flags);
if (inb(ICEMT(ice, PLAYBACK_CONTROL)) & (ICE1712_CAPTURE_START_SHADOW|
ICE1712_PLAYBACK_PAUSE|
ICE1712_PLAYBACK_START)) {
__out:
spin_unlock_irqrestore(&ice->reg_lock, flags);
return;
}
if (!force && is_pro_rate_locked(ice))
goto __out;
old = inb(ICEMT(ice, RATE));
if (!force && old == val)
goto __out;
ice->cur_rate = rate;
outb(val, ICEMT(ice, RATE));
spin_unlock_irqrestore(&ice->reg_lock, flags);
if (ice->gpio.set_pro_rate)
ice->gpio.set_pro_rate(ice, rate);
for (i = 0; i < ice->akm_codecs; i++) {
if (ice->akm[i].ops.set_rate_val)
ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
}
if (ice->spdif.ops.setup_rate)
ice->spdif.ops.setup_rate(ice, rate);
}
static int snd_ice1712_playback_pro_prepare(struct snd_pcm_substream *substream)
{
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
ice->playback_pro_size = snd_pcm_lib_buffer_bytes(substream);
spin_lock_irq(&ice->reg_lock);
outl(substream->runtime->dma_addr, ICEMT(ice, PLAYBACK_ADDR));
outw((ice->playback_pro_size >> 2) - 1, ICEMT(ice, PLAYBACK_SIZE));
outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, PLAYBACK_COUNT));
spin_unlock_irq(&ice->reg_lock);
return 0;
}
static int snd_ice1712_playback_pro_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *hw_params)
{
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
return 0;
}
static int snd_ice1712_capture_pro_prepare(struct snd_pcm_substream *substream)
{
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
ice->capture_pro_size = snd_pcm_lib_buffer_bytes(substream);
spin_lock_irq(&ice->reg_lock);
outl(substream->runtime->dma_addr, ICEMT(ice, CAPTURE_ADDR));
outw((ice->capture_pro_size >> 2) - 1, ICEMT(ice, CAPTURE_SIZE));
outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, CAPTURE_COUNT));
spin_unlock_irq(&ice->reg_lock);
return 0;
}
static int snd_ice1712_capture_pro_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *hw_params)
{
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
return 0;
}
static snd_pcm_uframes_t snd_ice1712_playback_pro_pointer(struct snd_pcm_substream *substream)
{
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
size_t ptr;
if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_PLAYBACK_START))
return 0;
ptr = ice->playback_pro_size - (inw(ICEMT(ice, PLAYBACK_SIZE)) << 2);
ptr = bytes_to_frames(substream->runtime, ptr);
if (ptr == substream->runtime->buffer_size)
ptr = 0;
return ptr;
}
static snd_pcm_uframes_t snd_ice1712_capture_pro_pointer(struct snd_pcm_substream *substream)
{
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
size_t ptr;
if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_CAPTURE_START_SHADOW))
return 0;
ptr = ice->capture_pro_size - (inw(ICEMT(ice, CAPTURE_SIZE)) << 2);
ptr = bytes_to_frames(substream->runtime, ptr);
if (ptr == substream->runtime->buffer_size)
ptr = 0;
return ptr;
}
static const struct snd_pcm_hardware snd_ice1712_playback_pro = {
.info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_MMAP_VALID |
SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
.formats = SNDRV_PCM_FMTBIT_S32_LE,
.rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
.rate_min = 4000,
.rate_max = 96000,
.channels_min = 10,
.channels_max = 10,
.buffer_bytes_max = (256*1024),
.period_bytes_min = 10 * 4 * 2,
.period_bytes_max = 131040,
.periods_min = 1,
.periods_max = 1024,
.fifo_size = 0,
};
static const struct snd_pcm_hardware snd_ice1712_capture_pro = {
.info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_MMAP_VALID |
SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
.formats = SNDRV_PCM_FMTBIT_S32_LE,
.rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
.rate_min = 4000,
.rate_max = 96000,
.channels_min = 12,
.channels_max = 12,
.buffer_bytes_max = (256*1024),
.period_bytes_min = 12 * 4 * 2,
.period_bytes_max = 131040,
.periods_min = 1,
.periods_max = 1024,
.fifo_size = 0,
};
static int snd_ice1712_playback_pro_open(struct snd_pcm_substream *substream)
{
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
ice->playback_pro_substream = substream;
runtime->hw = snd_ice1712_playback_pro;
snd_pcm_set_sync(substream);
snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
if (is_pro_rate_locked(ice)) {
runtime->hw.rate_min = PRO_RATE_DEFAULT;
runtime->hw.rate_max = PRO_RATE_DEFAULT;
}
if (ice->spdif.ops.open)
ice->spdif.ops.open(ice, substream);
return 0;
}
static int snd_ice1712_capture_pro_open(struct snd_pcm_substream *substream)
{
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
ice->capture_pro_substream = substream;
runtime->hw = snd_ice1712_capture_pro;
snd_pcm_set_sync(substream);
snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
if (is_pro_rate_locked(ice)) {
runtime->hw.rate_min = PRO_RATE_DEFAULT;
runtime->hw.rate_max = PRO_RATE_DEFAULT;
}
return 0;
}
static int snd_ice1712_playback_pro_close(struct snd_pcm_substream *substream)
{
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
if (PRO_RATE_RESET)
snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
ice->playback_pro_substream = NULL;
if (ice->spdif.ops.close)
ice->spdif.ops.close(ice, substream);
return 0;
}
static int snd_ice1712_capture_pro_close(struct snd_pcm_substream *substream)
{
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
if (PRO_RATE_RESET)
snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
ice->capture_pro_substream = NULL;
return 0;
}
static const struct snd_pcm_ops snd_ice1712_playback_pro_ops = {
.open = snd_ice1712_playback_pro_open,
.close = snd_ice1712_playback_pro_close,
.hw_params = snd_ice1712_playback_pro_hw_params,
.prepare = snd_ice1712_playback_pro_prepare,
.trigger = snd_ice1712_pro_trigger,
.pointer = snd_ice1712_playback_pro_pointer,
};
static const struct snd_pcm_ops snd_ice1712_capture_pro_ops = {
.open = snd_ice1712_capture_pro_open,
.close = snd_ice1712_capture_pro_close,
.hw_params = snd_ice1712_capture_pro_hw_params,
.prepare = snd_ice1712_capture_pro_prepare,
.trigger = snd_ice1712_pro_trigger,
.pointer = snd_ice1712_capture_pro_pointer,
};
static int snd_ice1712_pcm_profi(struct snd_ice1712 *ice, int device)
{
struct snd_pcm *pcm;
int err;
err = snd_pcm_new(ice->card, "ICE1712 multi", device, 1, 1, &pcm);
if (err < 0)
return err;
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_pro_ops);
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_pro_ops);
pcm->private_data = ice;
pcm->info_flags = 0;
strcpy(pcm->name, "ICE1712 multi");
snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
&ice->pci->dev, 256*1024, 256*1024);
ice->pcm_pro = pcm;
if (ice->cs8427) {
/* assign channels to iec958 */
err = snd_cs8427_iec958_build(ice->cs8427,
pcm->streams[0].substream,
pcm->streams[1].substream);
if (err < 0)
return err;
}
return snd_ice1712_build_pro_mixer(ice);
}
/*
* Mixer section
*/
static void snd_ice1712_update_volume(struct snd_ice1712 *ice, int index)
{
unsigned int vol = ice->pro_volumes[index];
unsigned short val = 0;
val |= (vol & 0x8000) == 0 ? (96 - (vol & 0x7f)) : 0x7f;
val |= ((vol & 0x80000000) == 0 ? (96 - ((vol >> 16) & 0x7f)) : 0x7f) << 8;
outb(index, ICEMT(ice, MONITOR_INDEX));
outw(val, ICEMT(ice, MONITOR_VOLUME));
}
#define snd_ice1712_pro_mixer_switch_info snd_ctl_boolean_stereo_info
static int snd_ice1712_pro_mixer_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
kcontrol->private_value;
spin_lock_irq(&ice->reg_lock);
ucontrol->value.integer.value[0] =
!((ice->pro_volumes[priv_idx] >> 15) & 1);
ucontrol->value.integer.value[1] =
!((ice->pro_volumes[priv_idx] >> 31) & 1);
spin_unlock_irq(&ice->reg_lock);
return 0;
}
static int snd_ice1712_pro_mixer_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
kcontrol->private_value;
unsigned int nval, change;
nval = (ucontrol->value.integer.value[0] ? 0 : 0x00008000) |
(ucontrol->value.integer.value[1] ? 0 : 0x80000000);
spin_lock_irq(&ice->reg_lock);
nval |= ice->pro_volumes[priv_idx] & ~0x80008000;
change = nval != ice->pro_volumes[priv_idx];
ice->pro_volumes[priv_idx] = nval;
snd_ice1712_update_volume(ice, priv_idx);
spin_unlock_irq(&ice->reg_lock);
return change;
}
static int snd_ice1712_pro_mixer_volume_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 2;
uinfo->value.integer.min = 0;
uinfo->value.integer.max = 96;
return 0;
}
static int snd_ice1712_pro_mixer_volume_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
kcontrol->private_value;
spin_lock_irq(&ice->reg_lock);
ucontrol->value.integer.value[0] =
(ice->pro_volumes[priv_idx] >> 0) & 127;
ucontrol->value.integer.value[1] =
(ice->pro_volumes[priv_idx] >> 16) & 127;
spin_unlock_irq(&ice->reg_lock);
return 0;
}
static int snd_ice1712_pro_mixer_volume_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
kcontrol->private_value;
unsigned int nval, change;
nval = (ucontrol->value.integer.value[0] & 127) |
((ucontrol->value.integer.value[1] & 127) << 16);
spin_lock_irq(&ice->reg_lock);
nval |= ice->pro_volumes[priv_idx] & ~0x007f007f;
change = nval != ice->pro_volumes[priv_idx];
ice->pro_volumes[priv_idx] = nval;
snd_ice1712_update_volume(ice, priv_idx);
spin_unlock_irq(&ice->reg_lock);
return change;
}
static const DECLARE_TLV_DB_SCALE(db_scale_playback, -14400, 150, 0);
static const struct snd_kcontrol_new snd_ice1712_multi_playback_ctrls[] = {
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Multi Playback Switch",
.info = snd_ice1712_pro_mixer_switch_info,
.get = snd_ice1712_pro_mixer_switch_get,
.put = snd_ice1712_pro_mixer_switch_put,
.private_value = 0,
.count = 10,
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "Multi Playback Volume",
.info = snd_ice1712_pro_mixer_volume_info,
.get = snd_ice1712_pro_mixer_volume_get,
.put = snd_ice1712_pro_mixer_volume_put,
.private_value = 0,
.count = 10,
.tlv = { .p = db_scale_playback }
},
};
static const struct snd_kcontrol_new snd_ice1712_multi_capture_analog_switch = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "H/W Multi Capture Switch",
.info = snd_ice1712_pro_mixer_switch_info,
.get = snd_ice1712_pro_mixer_switch_get,
.put = snd_ice1712_pro_mixer_switch_put,
.private_value = 10,
};
static const struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_switch = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = SNDRV_CTL_NAME_IEC958("Multi ", CAPTURE, SWITCH),
.info = snd_ice1712_pro_mixer_switch_info,
.get = snd_ice1712_pro_mixer_switch_get,
.put = snd_ice1712_pro_mixer_switch_put,
.private_value = 18,
.count = 2,
};
static const struct snd_kcontrol_new snd_ice1712_multi_capture_analog_volume = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "H/W Multi Capture Volume",
.info = snd_ice1712_pro_mixer_volume_info,
.get = snd_ice1712_pro_mixer_volume_get,
.put = snd_ice1712_pro_mixer_volume_put,
.private_value = 10,
.tlv = { .p = db_scale_playback }
};
static const struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_volume = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = SNDRV_CTL_NAME_IEC958("Multi ", CAPTURE, VOLUME),
.info = snd_ice1712_pro_mixer_volume_info,
.get = snd_ice1712_pro_mixer_volume_get,
.put = snd_ice1712_pro_mixer_volume_put,
.private_value = 18,
.count = 2,
};
static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice)
{
struct snd_card *card = ice->card;
unsigned int idx;
int err;
/* multi-channel mixer */
for (idx = 0; idx < ARRAY_SIZE(snd_ice1712_multi_playback_ctrls); idx++) {
err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_playback_ctrls[idx], ice));
if (err < 0)
return err;
}
if (ice->num_total_adcs > 0) {
struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_switch;
tmp.count = ice->num_total_adcs;
err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
if (err < 0)
return err;
}
err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_switch, ice));
if (err < 0)
return err;
if (ice->num_total_adcs > 0) {
struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_volume;
tmp.count = ice->num_total_adcs;
err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
if (err < 0)
return err;
}
err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_volume, ice));
if (err < 0)
return err;
/* initialize volumes */
for (idx = 0; idx < 10; idx++) {
ice->pro_volumes[idx] = 0x80008000; /* mute */
snd_ice1712_update_volume(ice, idx);
}
for (idx = 10; idx < 10 + ice->num_total_adcs; idx++) {
ice->pro_volumes[idx] = 0x80008000; /* mute */
snd_ice1712_update_volume(ice, idx);
}
for (idx = 18; idx < 20; idx++) {
ice->pro_volumes[idx] = 0x80008000; /* mute */
snd_ice1712_update_volume(ice, idx);
}
return 0;
}
static void snd_ice1712_mixer_free_ac97(struct snd_ac97 *ac97)
{
struct snd_ice1712 *ice = ac97->private_data;
ice->ac97 = NULL;
}
static int snd_ice1712_ac97_mixer(struct snd_ice1712 *ice)
{
int err, bus_num = 0;
struct snd_ac97_template ac97;
struct snd_ac97_bus *pbus;
static const struct snd_ac97_bus_ops con_ops = {
.write = snd_ice1712_ac97_write,
.read = snd_ice1712_ac97_read,
};
static const struct snd_ac97_bus_ops pro_ops = {
.write = snd_ice1712_pro_ac97_write,
.read = snd_ice1712_pro_ac97_read,
};
if (ice_has_con_ac97(ice)) {
err = snd_ac97_bus(ice->card, bus_num++, &con_ops, NULL, &pbus);
if (err < 0)
return err;
memset(&ac97, 0, sizeof(ac97));
ac97.private_data = ice;
ac97.private_free = snd_ice1712_mixer_free_ac97;
err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
if (err < 0)
dev_warn(ice->card->dev,
"cannot initialize ac97 for consumer, skipped\n");
else {
return snd_ctl_add(ice->card,
snd_ctl_new1(&snd_ice1712_mixer_digmix_route_ac97,
ice));
}
}
if (!(ice->eeprom.data[ICE_EEP1_ACLINK] & ICE1712_CFG_PRO_I2S)) {
err = snd_ac97_bus(ice->card, bus_num, &pro_ops, NULL, &pbus);
if (err < 0)
return err;
memset(&ac97, 0, sizeof(ac97));
ac97.private_data = ice;
ac97.private_free = snd_ice1712_mixer_free_ac97;
err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
if (err < 0)
dev_warn(ice->card->dev,
"cannot initialize pro ac97, skipped\n");
else
return 0;
}
/* I2S mixer only */
strcat(ice->card->mixername, "ICE1712 - multitrack");
return 0;
}
/*
*
*/
static inline unsigned int eeprom_double(struct snd_ice1712 *ice, int idx)
{
return (unsigned int)ice->eeprom.data[idx] | ((unsigned int)ice->eeprom.data[idx + 1] << 8);
}
static void snd_ice1712_proc_read(struct snd_info_entry *entry,
struct snd_info_buffer *buffer)
{
struct snd_ice1712 *ice = entry->private_data;
unsigned int idx;
snd_iprintf(buffer, "%s\n\n", ice->card->longname);
snd_iprintf(buffer, "EEPROM:\n");
snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
snd_iprintf(buffer, " Codec : 0x%x\n", ice->eeprom.data[ICE_EEP1_CODEC]);
snd_iprintf(buffer, " ACLink : 0x%x\n", ice->eeprom.data[ICE_EEP1_ACLINK]);
snd_iprintf(buffer, " I2S ID : 0x%x\n", ice->eeprom.data[ICE_EEP1_I2SID]);
snd_iprintf(buffer, " S/PDIF : 0x%x\n", ice->eeprom.data[ICE_EEP1_SPDIF]);
snd_iprintf(buffer, " GPIO mask : 0x%x\n", ice->eeprom.gpiomask);
snd_iprintf(buffer, " GPIO state : 0x%x\n", ice->eeprom.gpiostate);
snd_iprintf(buffer, " GPIO direction : 0x%x\n", ice->eeprom.gpiodir);
snd_iprintf(buffer, " AC'97 main : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_MAIN_LO));
snd_iprintf(buffer, " AC'97 pcm : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_PCM_LO));
snd_iprintf(buffer, " AC'97 record : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_REC_LO));
snd_iprintf(buffer, " AC'97 record src : 0x%x\n", ice->eeprom.data[ICE_EEP1_AC97_RECSRC]);
for (idx = 0; idx < 4; idx++)
snd_iprintf(buffer, " DAC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_DAC_ID + idx]);
for (idx = 0; idx < 4; idx++)
snd_iprintf(buffer, " ADC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_ADC_ID + idx]);
for (idx = 0x1c; idx < ice->eeprom.size; idx++)
snd_iprintf(buffer, " Extra #%02i : 0x%x\n", idx, ice->eeprom.data[idx]);
snd_iprintf(buffer, "\nRegisters:\n");
snd_iprintf(buffer, " PSDOUT03 : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_PSDOUT03)));
snd_iprintf(buffer, " CAPTURE : 0x%08x\n", inl(ICEMT(ice, ROUTE_CAPTURE)));
snd_iprintf(buffer, " SPDOUT : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_SPDOUT)));
snd_iprintf(buffer, " RATE : 0x%02x\n", (unsigned)inb(ICEMT(ice, RATE)));
snd_iprintf(buffer, " GPIO_DATA : 0x%02x\n", (unsigned)snd_ice1712_get_gpio_data(ice));
snd_iprintf(buffer, " GPIO_WRITE_MASK : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK));
snd_iprintf(buffer, " GPIO_DIRECTION : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION));
}
static void snd_ice1712_proc_init(struct snd_ice1712 *ice)
{
snd_card_ro_proc_new(ice->card, "ice1712", ice, snd_ice1712_proc_read);
}
/*
*
*/
static int snd_ice1712_eeprom_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
uinfo->count = sizeof(struct snd_ice1712_eeprom);
return 0;
}
static int snd_ice1712_eeprom_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
return 0;
}
static const struct snd_kcontrol_new snd_ice1712_eeprom = {
.iface = SNDRV_CTL_ELEM_IFACE_CARD,
.name = "ICE1712 EEPROM",
.access = SNDRV_CTL_ELEM_ACCESS_READ,
.info = snd_ice1712_eeprom_info,
.get = snd_ice1712_eeprom_get
};
/*
*/
static int snd_ice1712_spdif_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
uinfo->count = 1;
return 0;
}
static int snd_ice1712_spdif_default_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
if (ice->spdif.ops.default_get)
ice->spdif.ops.default_get(ice, ucontrol);
return 0;
}
static int snd_ice1712_spdif_default_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
if (ice->spdif.ops.default_put)
return ice->spdif.ops.default_put(ice, ucontrol);
return 0;
}
static const struct snd_kcontrol_new snd_ice1712_spdif_default =
{
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
.name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
.info = snd_ice1712_spdif_info,
.get = snd_ice1712_spdif_default_get,
.put = snd_ice1712_spdif_default_put
};
static int snd_ice1712_spdif_maskc_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
if (ice->spdif.ops.default_get) {
ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
IEC958_AES0_PROFESSIONAL |
IEC958_AES0_CON_NOT_COPYRIGHT |
IEC958_AES0_CON_EMPHASIS;
ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
IEC958_AES1_CON_CATEGORY;
ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
} else {
ucontrol->value.iec958.status[0] = 0xff;
ucontrol->value.iec958.status[1] = 0xff;
ucontrol->value.iec958.status[2] = 0xff;
ucontrol->value.iec958.status[3] = 0xff;
ucontrol->value.iec958.status[4] = 0xff;
}
return 0;
}
static int snd_ice1712_spdif_maskp_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
if (ice->spdif.ops.default_get) {
ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
IEC958_AES0_PROFESSIONAL |
IEC958_AES0_PRO_FS |
IEC958_AES0_PRO_EMPHASIS;
ucontrol->value.iec958.status[1] = IEC958_AES1_PRO_MODE;
} else {
ucontrol->value.iec958.status[0] = 0xff;
ucontrol->value.iec958.status[1] = 0xff;
ucontrol->value.iec958.status[2] = 0xff;
ucontrol->value.iec958.status[3] = 0xff;
ucontrol->value.iec958.status[4] = 0xff;
}
return 0;
}
static const struct snd_kcontrol_new snd_ice1712_spdif_maskc =
{
.access = SNDRV_CTL_ELEM_ACCESS_READ,
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
.name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
.info = snd_ice1712_spdif_info,
.get = snd_ice1712_spdif_maskc_get,
};
static const struct snd_kcontrol_new snd_ice1712_spdif_maskp =
{
.access = SNDRV_CTL_ELEM_ACCESS_READ,
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
.name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK),
.info = snd_ice1712_spdif_info,
.get = snd_ice1712_spdif_maskp_get,
};
static int snd_ice1712_spdif_stream_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
if (ice->spdif.ops.stream_get)
ice->spdif.ops.stream_get(ice, ucontrol);
return 0;
}
static int snd_ice1712_spdif_stream_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
if (ice->spdif.ops.stream_put)
return ice->spdif.ops.stream_put(ice, ucontrol);
return 0;
}
static const struct snd_kcontrol_new snd_ice1712_spdif_stream =
{
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_INACTIVE),
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
.name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PCM_STREAM),
.info = snd_ice1712_spdif_info,
.get = snd_ice1712_spdif_stream_get,
.put = snd_ice1712_spdif_stream_put
};
int snd_ice1712_gpio_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned char mask = kcontrol->private_value & 0xff;
int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
snd_ice1712_save_gpio_status(ice);
ucontrol->value.integer.value[0] =
(snd_ice1712_gpio_read(ice) & mask ? 1 : 0) ^ invert;
snd_ice1712_restore_gpio_status(ice);
return 0;
}
int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned char mask = kcontrol->private_value & 0xff;
int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
unsigned int val, nval;
if (kcontrol->private_value & (1 << 31))
return -EPERM;
nval = (ucontrol->value.integer.value[0] ? mask : 0) ^ invert;
snd_ice1712_save_gpio_status(ice);
val = snd_ice1712_gpio_read(ice);
nval |= val & ~mask;
if (val != nval)
snd_ice1712_gpio_write(ice, nval);
snd_ice1712_restore_gpio_status(ice);
return val != nval;
}
/*
* rate
*/
static int snd_ice1712_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
static const char * const texts[] = {
"8000", /* 0: 6 */
"9600", /* 1: 3 */
"11025", /* 2: 10 */
"12000", /* 3: 2 */
"16000", /* 4: 5 */
"22050", /* 5: 9 */
"24000", /* 6: 1 */
"32000", /* 7: 4 */
"44100", /* 8: 8 */
"48000", /* 9: 0 */
"64000", /* 10: 15 */
"88200", /* 11: 11 */
"96000", /* 12: 7 */
"IEC958 Input", /* 13: -- */
};
return snd_ctl_enum_info(uinfo, 1, 14, texts);
}
static int snd_ice1712_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
static const unsigned char xlate[16] = {
9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 255, 255, 255, 10
};
unsigned char val;
spin_lock_irq(&ice->reg_lock);
if (is_spdif_master(ice)) {
ucontrol->value.enumerated.item[0] = 13;
} else {
val = xlate[inb(ICEMT(ice, RATE)) & 15];
if (val == 255) {
snd_BUG();
val = 0;
}
ucontrol->value.enumerated.item[0] = val;
}
spin_unlock_irq(&ice->reg_lock);
return 0;
}
static int snd_ice1712_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
static const unsigned int xrate[13] = {
8000, 9600, 11025, 12000, 16000, 22050, 24000,
32000, 44100, 48000, 64000, 88200, 96000
};
unsigned char oval;
int change = 0;
spin_lock_irq(&ice->reg_lock);
oval = inb(ICEMT(ice, RATE));
if (ucontrol->value.enumerated.item[0] == 13) {
outb(oval | ICE1712_SPDIF_MASTER, ICEMT(ice, RATE));
} else {
PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
spin_unlock_irq(&ice->reg_lock);
snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 1);
spin_lock_irq(&ice->reg_lock);
}
change = inb(ICEMT(ice, RATE)) != oval;
spin_unlock_irq(&ice->reg_lock);
if ((oval & ICE1712_SPDIF_MASTER) !=
(inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER))
snd_ice1712_set_input_clock_source(ice, is_spdif_master(ice));
return change;
}
static const struct snd_kcontrol_new snd_ice1712_pro_internal_clock = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Multi Track Internal Clock",
.info = snd_ice1712_pro_internal_clock_info,
.get = snd_ice1712_pro_internal_clock_get,
.put = snd_ice1712_pro_internal_clock_put
};
static int snd_ice1712_pro_internal_clock_default_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
static const char * const texts[] = {
"8000", /* 0: 6 */
"9600", /* 1: 3 */
"11025", /* 2: 10 */
"12000", /* 3: 2 */
"16000", /* 4: 5 */
"22050", /* 5: 9 */
"24000", /* 6: 1 */
"32000", /* 7: 4 */
"44100", /* 8: 8 */
"48000", /* 9: 0 */
"64000", /* 10: 15 */
"88200", /* 11: 11 */
"96000", /* 12: 7 */
/* "IEC958 Input", 13: -- */
};
return snd_ctl_enum_info(uinfo, 1, 13, texts);
}
static int snd_ice1712_pro_internal_clock_default_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
int val;
static const unsigned int xrate[13] = {
8000, 9600, 11025, 12000, 16000, 22050, 24000,
32000, 44100, 48000, 64000, 88200, 96000
};
for (val = 0; val < 13; val++) {
if (xrate[val] == PRO_RATE_DEFAULT)
break;
}
ucontrol->value.enumerated.item[0] = val;
return 0;
}
static int snd_ice1712_pro_internal_clock_default_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
static const unsigned int xrate[13] = {
8000, 9600, 11025, 12000, 16000, 22050, 24000,
32000, 44100, 48000, 64000, 88200, 96000
};
unsigned char oval;
int change = 0;
oval = PRO_RATE_DEFAULT;
PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
change = PRO_RATE_DEFAULT != oval;
return change;
}
static const struct snd_kcontrol_new snd_ice1712_pro_internal_clock_default = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Multi Track Internal Clock Default",
.info = snd_ice1712_pro_internal_clock_default_info,
.get = snd_ice1712_pro_internal_clock_default_get,
.put = snd_ice1712_pro_internal_clock_default_put
};
#define snd_ice1712_pro_rate_locking_info snd_ctl_boolean_mono_info
static int snd_ice1712_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
return 0;
}
static int snd_ice1712_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int change = 0, nval;
nval = ucontrol->value.integer.value[0] ? 1 : 0;
spin_lock_irq(&ice->reg_lock);
change = PRO_RATE_LOCKED != nval;
PRO_RATE_LOCKED = nval;
spin_unlock_irq(&ice->reg_lock);
return change;
}
static const struct snd_kcontrol_new snd_ice1712_pro_rate_locking = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Multi Track Rate Locking",
.info = snd_ice1712_pro_rate_locking_info,
.get = snd_ice1712_pro_rate_locking_get,
.put = snd_ice1712_pro_rate_locking_put
};
#define snd_ice1712_pro_rate_reset_info snd_ctl_boolean_mono_info
static int snd_ice1712_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
ucontrol->value.integer.value[0] = PRO_RATE_RESET;
return 0;
}
static int snd_ice1712_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int change = 0, nval;
nval = ucontrol->value.integer.value[0] ? 1 : 0;
spin_lock_irq(&ice->reg_lock);
change = PRO_RATE_RESET != nval;
PRO_RATE_RESET = nval;
spin_unlock_irq(&ice->reg_lock);
return change;
}
static const struct snd_kcontrol_new snd_ice1712_pro_rate_reset = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Multi Track Rate Reset",
.info = snd_ice1712_pro_rate_reset_info,
.get = snd_ice1712_pro_rate_reset_get,
.put = snd_ice1712_pro_rate_reset_put
};
/*
* routing
*/
static int snd_ice1712_pro_route_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
static const char * const texts[] = {
"PCM Out", /* 0 */
"H/W In 0", "H/W In 1", "H/W In 2", "H/W In 3", /* 1-4 */
"H/W In 4", "H/W In 5", "H/W In 6", "H/W In 7", /* 5-8 */
"IEC958 In L", "IEC958 In R", /* 9-10 */
"Digital Mixer", /* 11 - optional */
};
int num_items = snd_ctl_get_ioffidx(kcontrol, &uinfo->id) < 2 ? 12 : 11;
return snd_ctl_enum_info(uinfo, 1, num_items, texts);
}
static int snd_ice1712_pro_route_analog_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
unsigned int val, cval;
spin_lock_irq(&ice->reg_lock);
val = inw(ICEMT(ice, ROUTE_PSDOUT03));
cval = inl(ICEMT(ice, ROUTE_CAPTURE));
spin_unlock_irq(&ice->reg_lock);
val >>= ((idx % 2) * 8) + ((idx / 2) * 2);
val &= 3;
cval >>= ((idx / 2) * 8) + ((idx % 2) * 4);
if (val == 1 && idx < 2)
ucontrol->value.enumerated.item[0] = 11;
else if (val == 2)
ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
else if (val == 3)
ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
else
ucontrol->value.enumerated.item[0] = 0;
return 0;
}
static int snd_ice1712_pro_route_analog_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int change, shift;
int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
unsigned int val, old_val, nval;
/* update PSDOUT */
if (ucontrol->value.enumerated.item[0] >= 11)
nval = idx < 2 ? 1 : 0; /* dig mixer (or pcm) */
else if (ucontrol->value.enumerated.item[0] >= 9)
nval = 3; /* spdif in */
else if (ucontrol->value.enumerated.item[0] >= 1)
nval = 2; /* analog in */
else
nval = 0; /* pcm */
shift = ((idx % 2) * 8) + ((idx / 2) * 2);
spin_lock_irq(&ice->reg_lock);
val = old_val = inw(ICEMT(ice, ROUTE_PSDOUT03));
val &= ~(0x03 << shift);
val |= nval << shift;
change = val != old_val;
if (change)
outw(val, ICEMT(ice, ROUTE_PSDOUT03));
spin_unlock_irq(&ice->reg_lock);
if (nval < 2) /* dig mixer of pcm */
return change;
/* update CAPTURE */
spin_lock_irq(&ice->reg_lock);
val = old_val = inl(ICEMT(ice, ROUTE_CAPTURE));
shift = ((idx / 2) * 8) + ((idx % 2) * 4);
if (nval == 2) { /* analog in */
nval = ucontrol->value.enumerated.item[0] - 1;
val &= ~(0x07 << shift);
val |= nval << shift;
} else { /* spdif in */
nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
val &= ~(0x08 << shift);
val |= nval << shift;
}
if (val != old_val) {
change = 1;
outl(val, ICEMT(ice, ROUTE_CAPTURE));
}
spin_unlock_irq(&ice->reg_lock);
return change;
}
static int snd_ice1712_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
unsigned int val, cval;
val = inw(ICEMT(ice, ROUTE_SPDOUT));
cval = (val >> (idx * 4 + 8)) & 0x0f;
val = (val >> (idx * 2)) & 0x03;
if (val == 1)
ucontrol->value.enumerated.item[0] = 11;
else if (val == 2)
ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
else if (val == 3)
ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
else
ucontrol->value.enumerated.item[0] = 0;
return 0;
}
static int snd_ice1712_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int change, shift;
int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
unsigned int val, old_val, nval;
/* update SPDOUT */
spin_lock_irq(&ice->reg_lock);
val = old_val = inw(ICEMT(ice, ROUTE_SPDOUT));
if (ucontrol->value.enumerated.item[0] >= 11)
nval = 1;
else if (ucontrol->value.enumerated.item[0] >= 9)
nval = 3;
else if (ucontrol->value.enumerated.item[0] >= 1)
nval = 2;
else
nval = 0;
shift = idx * 2;
val &= ~(0x03 << shift);
val |= nval << shift;
shift = idx * 4 + 8;
if (nval == 2) {
nval = ucontrol->value.enumerated.item[0] - 1;
val &= ~(0x07 << shift);
val |= nval << shift;
} else if (nval == 3) {
nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
val &= ~(0x08 << shift);
val |= nval << shift;
}
change = val != old_val;
if (change)
outw(val, ICEMT(ice, ROUTE_SPDOUT));
spin_unlock_irq(&ice->reg_lock);
return change;
}
static const struct snd_kcontrol_new snd_ice1712_mixer_pro_analog_route = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "H/W Playback Route",
.info = snd_ice1712_pro_route_info,
.get = snd_ice1712_pro_route_analog_get,
.put = snd_ice1712_pro_route_analog_put,
};
static const struct snd_kcontrol_new snd_ice1712_mixer_pro_spdif_route = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route",
.info = snd_ice1712_pro_route_info,
.get = snd_ice1712_pro_route_spdif_get,
.put = snd_ice1712_pro_route_spdif_put,
.count = 2,
};
static int snd_ice1712_pro_volume_rate_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 1;
uinfo->value.integer.min = 0;
uinfo->value.integer.max = 255;
return 0;
}
static int snd_ice1712_pro_volume_rate_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_RATE));
return 0;
}
static int snd_ice1712_pro_volume_rate_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int change;
spin_lock_irq(&ice->reg_lock);
change = inb(ICEMT(ice, MONITOR_RATE)) != ucontrol->value.integer.value[0];
outb(ucontrol->value.integer.value[0], ICEMT(ice, MONITOR_RATE));
spin_unlock_irq(&ice->reg_lock);
return change;
}
static const struct snd_kcontrol_new snd_ice1712_mixer_pro_volume_rate = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Multi Track Volume Rate",
.info = snd_ice1712_pro_volume_rate_info,
.get = snd_ice1712_pro_volume_rate_get,
.put = snd_ice1712_pro_volume_rate_put
};
static int snd_ice1712_pro_peak_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 22;
uinfo->value.integer.min = 0;
uinfo->value.integer.max = 255;
return 0;
}
static int snd_ice1712_pro_peak_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int idx;
spin_lock_irq(&ice->reg_lock);
for (idx = 0; idx < 22; idx++) {
outb(idx, ICEMT(ice, MONITOR_PEAKINDEX));
ucontrol->value.integer.value[idx] = inb(ICEMT(ice, MONITOR_PEAKDATA));
}
spin_unlock_irq(&ice->reg_lock);
return 0;
}
static const struct snd_kcontrol_new snd_ice1712_mixer_pro_peak = {
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
.name = "Multi Track Peak",
.access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
.info = snd_ice1712_pro_peak_info,
.get = snd_ice1712_pro_peak_get
};
/*
*
*/
/*
* list of available boards
*/
static const struct snd_ice1712_card_info *card_tables[] = {
snd_ice1712_hoontech_cards,
snd_ice1712_delta_cards,
snd_ice1712_ews_cards,
NULL,
};
static unsigned char snd_ice1712_read_i2c(struct snd_ice1712 *ice,
unsigned char dev,
unsigned char addr)
{
long t = 0x10000;
outb(addr, ICEREG(ice, I2C_BYTE_ADDR));
outb(dev & ~ICE1712_I2C_WRITE, ICEREG(ice, I2C_DEV_ADDR));
while (t-- > 0 && (inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_BUSY)) ;
return inb(ICEREG(ice, I2C_DATA));
}
static int snd_ice1712_read_eeprom(struct snd_ice1712 *ice,
const char *modelname)
{
int dev = ICE_I2C_EEPROM_ADDR; /* I2C EEPROM device address */
unsigned int i, size;
const struct snd_ice1712_card_info * const *tbl, *c;
if (!modelname || !*modelname) {
ice->eeprom.subvendor = 0;
if ((inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_EEPROM) != 0)
ice->eeprom.subvendor = (snd_ice1712_read_i2c(ice, dev, 0x00) << 0) |
(snd_ice1712_read_i2c(ice, dev, 0x01) << 8) |
(snd_ice1712_read_i2c(ice, dev, 0x02) << 16) |
(snd_ice1712_read_i2c(ice, dev, 0x03) << 24);
if (ice->eeprom.subvendor == 0 ||
ice->eeprom.subvendor == (unsigned int)-1) {
/* invalid subvendor from EEPROM, try the PCI subststem ID instead */
u16 vendor, device;
pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, &vendor);
pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
ice->eeprom.subvendor = ((unsigned int)swab16(vendor) << 16) | swab16(device);
if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) {
dev_err(ice->card->dev,
"No valid ID is found\n");
return -ENXIO;
}
}
}
for (tbl = card_tables; *tbl; tbl++) {
for (c = *tbl; c->subvendor; c++) {
if (modelname && c->model && !strcmp(modelname, c->model)) {
dev_info(ice->card->dev,
"Using board model %s\n", c->name);
ice->eeprom.subvendor = c->subvendor;
} else if (c->subvendor != ice->eeprom.subvendor)
continue;
if (!c->eeprom_size || !c->eeprom_data)
goto found;
/* if the EEPROM is given by the driver, use it */
dev_dbg(ice->card->dev, "using the defined eeprom..\n");
ice->eeprom.version = 1;
ice->eeprom.size = c->eeprom_size + 6;
memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
goto read_skipped;
}
}
dev_warn(ice->card->dev, "No matching model found for ID 0x%x\n",
ice->eeprom.subvendor);
found:
ice->eeprom.size = snd_ice1712_read_i2c(ice, dev, 0x04);
if (ice->eeprom.size < 6)
ice->eeprom.size = 32; /* FIXME: any cards without the correct size? */
else if (ice->eeprom.size > 32) {
dev_err(ice->card->dev,
"invalid EEPROM (size = %i)\n", ice->eeprom.size);
return -EIO;
}
ice->eeprom.version = snd_ice1712_read_i2c(ice, dev, 0x05);
if (ice->eeprom.version != 1) {
dev_err(ice->card->dev, "invalid EEPROM version %i\n",
ice->eeprom.version);
/* return -EIO; */
}
size = ice->eeprom.size - 6;
for (i = 0; i < size; i++)
ice->eeprom.data[i] = snd_ice1712_read_i2c(ice, dev, i + 6);
read_skipped:
ice->eeprom.gpiomask = ice->eeprom.data[ICE_EEP1_GPIO_MASK];
ice->eeprom.gpiostate = ice->eeprom.data[ICE_EEP1_GPIO_STATE];
ice->eeprom.gpiodir = ice->eeprom.data[ICE_EEP1_GPIO_DIR];
return 0;
}
static int snd_ice1712_chip_init(struct snd_ice1712 *ice)
{
outb(ICE1712_RESET | ICE1712_NATIVE, ICEREG(ice, CONTROL));
udelay(200);
outb(ICE1712_NATIVE, ICEREG(ice, CONTROL));
udelay(200);
if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DMX6FIRE &&
!ice->dxr_enable)
/* Set eeprom value to limit active ADCs and DACs to 6;
* Also disable AC97 as no hardware in standard 6fire card/box
* Note: DXR extensions are not currently supported
*/
ice->eeprom.data[ICE_EEP1_CODEC] = 0x3a;
pci_write_config_byte(ice->pci, 0x60, ice->eeprom.data[ICE_EEP1_CODEC]);
pci_write_config_byte(ice->pci, 0x61, ice->eeprom.data[ICE_EEP1_ACLINK]);
pci_write_config_byte(ice->pci, 0x62, ice->eeprom.data[ICE_EEP1_I2SID]);
pci_write_config_byte(ice->pci, 0x63, ice->eeprom.data[ICE_EEP1_SPDIF]);
if (ice->eeprom.subvendor != ICE1712_SUBDEVICE_STDSP24 &&
ice->eeprom.subvendor != ICE1712_SUBDEVICE_STAUDIO_ADCIII) {
ice->gpio.write_mask = ice->eeprom.gpiomask;
ice->gpio.direction = ice->eeprom.gpiodir;
snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK,
ice->eeprom.gpiomask);
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION,
ice->eeprom.gpiodir);
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
ice->eeprom.gpiostate);
} else {
ice->gpio.write_mask = 0xc0;
ice->gpio.direction = 0xff;
snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 0xc0);
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 0xff);
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
ICE1712_STDSP24_CLOCK_BIT);
}
snd_ice1712_write(ice, ICE1712_IREG_PRO_POWERDOWN, 0);
if (!(ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97)) {
outb(ICE1712_AC97_WARM, ICEREG(ice, AC97_CMD));
udelay(100);
outb(0, ICEREG(ice, AC97_CMD));
udelay(200);
snd_ice1712_write(ice, ICE1712_IREG_CONSUMER_POWERDOWN, 0);
}
snd_ice1712_set_pro_rate(ice, 48000, 1);
/* unmask used interrupts */
outb(((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) == 0 ?
ICE1712_IRQ_MPU2 : 0) |
((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97) ?
ICE1712_IRQ_PBKDS | ICE1712_IRQ_CONCAP | ICE1712_IRQ_CONPBK : 0),
ICEREG(ice, IRQMASK));
outb(0x00, ICEMT(ice, IRQ));
return 0;
}
int snd_ice1712_spdif_build_controls(struct snd_ice1712 *ice)
{
int err;
struct snd_kcontrol *kctl;
if (snd_BUG_ON(!ice->pcm_pro))
return -EIO;
kctl = snd_ctl_new1(&snd_ice1712_spdif_default, ice);
kctl->id.device = ice->pcm_pro->device;
err = snd_ctl_add(ice->card, kctl);
if (err < 0)
return err;
kctl = snd_ctl_new1(&snd_ice1712_spdif_maskc, ice);
kctl->id.device = ice->pcm_pro->device;
err = snd_ctl_add(ice->card, kctl);
if (err < 0)
return err;
kctl = snd_ctl_new1(&snd_ice1712_spdif_maskp, ice);
kctl->id.device = ice->pcm_pro->device;
err = snd_ctl_add(ice->card, kctl);
if (err < 0)
return err;
kctl = snd_ctl_new1(&snd_ice1712_spdif_stream, ice);
kctl->id.device = ice->pcm_pro->device;
err = snd_ctl_add(ice->card, kctl);
if (err < 0)
return err;
ice->spdif.stream_ctl = kctl;
return 0;
}
static int snd_ice1712_build_controls(struct snd_ice1712 *ice)
{
int err;
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_eeprom, ice));
if (err < 0)
return err;
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock, ice));
if (err < 0)
return err;
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock_default, ice));
if (err < 0)
return err;
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_locking, ice));
if (err < 0)
return err;
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_reset, ice));
if (err < 0)
return err;
if (ice->num_total_dacs > 0) {
struct snd_kcontrol_new tmp = snd_ice1712_mixer_pro_analog_route;
tmp.count = ice->num_total_dacs;
err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
if (err < 0)
return err;
}
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_spdif_route, ice));
if (err < 0)
return err;
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_volume_rate, ice));
if (err < 0)
return err;
return snd_ctl_add(ice->card,
snd_ctl_new1(&snd_ice1712_mixer_pro_peak, ice));
}
static void snd_ice1712_free(struct snd_card *card)
{
struct snd_ice1712 *ice = card->private_data;
if (ice->card_info && ice->card_info->chip_exit)
ice->card_info->chip_exit(ice);
/* mask all interrupts */
outb(ICE1712_MULTI_CAPTURE | ICE1712_MULTI_PLAYBACK, ICEMT(ice, IRQ));
outb(0xff, ICEREG(ice, IRQMASK));
snd_ice1712_akm4xxx_free(ice);
}
static int snd_ice1712_create(struct snd_card *card,
struct pci_dev *pci,
const char *modelname,
int omni,
int cs8427_timeout,
int dxr_enable)
{
struct snd_ice1712 *ice = card->private_data;
int err;
/* enable PCI device */
err = pcim_enable_device(pci);
if (err < 0)
return err;
/* check, if we can restrict PCI DMA transfers to 28 bits */
if (dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(28))) {
dev_err(card->dev,
"architecture does not support 28bit PCI busmaster DMA\n");
return -ENXIO;
}
ice->omni = omni ? 1 : 0;
if (cs8427_timeout < 1)
cs8427_timeout = 1;
else if (cs8427_timeout > 1000)
cs8427_timeout = 1000;
ice->cs8427_timeout = cs8427_timeout;
ice->dxr_enable = dxr_enable;
spin_lock_init(&ice->reg_lock);
mutex_init(&ice->gpio_mutex);
mutex_init(&ice->i2c_mutex);
mutex_init(&ice->open_mutex);
ice->gpio.set_mask = snd_ice1712_set_gpio_mask;
ice->gpio.get_mask = snd_ice1712_get_gpio_mask;
ice->gpio.set_dir = snd_ice1712_set_gpio_dir;
ice->gpio.get_dir = snd_ice1712_get_gpio_dir;
ice->gpio.set_data = snd_ice1712_set_gpio_data;
ice->gpio.get_data = snd_ice1712_get_gpio_data;
ice->spdif.cs8403_bits =
ice->spdif.cs8403_stream_bits = (0x01 | /* consumer format */
0x10 | /* no emphasis */
0x20); /* PCM encoder/decoder */
ice->card = card;
ice->pci = pci;
ice->irq = -1;
pci_set_master(pci);
/* disable legacy emulation */
pci_write_config_word(ice->pci, 0x40, 0x807f);
pci_write_config_word(ice->pci, 0x42, 0x0006);
snd_ice1712_proc_init(ice);
err = pci_request_regions(pci, "ICE1712");
if (err < 0)
return err;
ice->port = pci_resource_start(pci, 0);
ice->ddma_port = pci_resource_start(pci, 1);
ice->dmapath_port = pci_resource_start(pci, 2);
ice->profi_port = pci_resource_start(pci, 3);
if (devm_request_irq(&pci->dev, pci->irq, snd_ice1712_interrupt,
IRQF_SHARED, KBUILD_MODNAME, ice)) {
dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
return -EIO;
}
ice->irq = pci->irq;
card->sync_irq = ice->irq;
card->private_free = snd_ice1712_free;
if (snd_ice1712_read_eeprom(ice, modelname) < 0)
return -EIO;
if (snd_ice1712_chip_init(ice) < 0)
return -EIO;
return 0;
}
/*
*
* Registration
*
*/
static struct snd_ice1712_card_info no_matched;
static int snd_ice1712_probe(struct pci_dev *pci,
const struct pci_device_id *pci_id)
{
static int dev;
struct snd_card *card;
struct snd_ice1712 *ice;
int pcm_dev = 0, err;
const struct snd_ice1712_card_info * const *tbl, *c;
if (dev >= SNDRV_CARDS)
return -ENODEV;
if (!enable[dev]) {
dev++;
return -ENOENT;
}
err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
sizeof(*ice), &card);
if (err < 0)
return err;
ice = card->private_data;
strcpy(card->driver, "ICE1712");
strcpy(card->shortname, "ICEnsemble ICE1712");
err = snd_ice1712_create(card, pci, model[dev], omni[dev],
cs8427_timeout[dev], dxr_enable[dev]);
if (err < 0)
return err;
for (tbl = card_tables; *tbl; tbl++) {
for (c = *tbl; c->subvendor; c++) {
if (c->subvendor == ice->eeprom.subvendor) {
strcpy(card->shortname, c->name);
if (c->driver) /* specific driver? */
strcpy(card->driver, c->driver);
if (c->chip_init) {
err = c->chip_init(ice);
if (err < 0)
return err;
}
ice->card_info = c;
goto __found;
}
}
}
c = &no_matched;
__found:
err = snd_ice1712_pcm_profi(ice, pcm_dev++);
if (err < 0)
return err;
if (ice_has_con_ac97(ice)) {
err = snd_ice1712_pcm(ice, pcm_dev++);
if (err < 0)
return err;
}
err = snd_ice1712_ac97_mixer(ice);
if (err < 0)
return err;
err = snd_ice1712_build_controls(ice);
if (err < 0)
return err;
if (c->build_controls) {
err = c->build_controls(ice);
if (err < 0)
return err;
}
if (ice_has_con_ac97(ice)) {
err = snd_ice1712_pcm_ds(ice, pcm_dev++);
if (err < 0)
return err;
}
if (!c->no_mpu401) {
err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712,
ICEREG(ice, MPU1_CTRL),
c->mpu401_1_info_flags |
MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK,
-1, &ice->rmidi[0]);
if (err < 0)
return err;
if (c->mpu401_1_name)
/* Preferred name available in card_info */
snprintf(ice->rmidi[0]->name,
sizeof(ice->rmidi[0]->name),
"%s %d", c->mpu401_1_name, card->number);
if (ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) {
/* 2nd port used */
err = snd_mpu401_uart_new(card, 1, MPU401_HW_ICE1712,
ICEREG(ice, MPU2_CTRL),
c->mpu401_2_info_flags |
MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK,
-1, &ice->rmidi[1]);
if (err < 0)
return err;
if (c->mpu401_2_name)
/* Preferred name available in card_info */
snprintf(ice->rmidi[1]->name,
sizeof(ice->rmidi[1]->name),
"%s %d", c->mpu401_2_name,
card->number);
}
}
snd_ice1712_set_input_clock_source(ice, 0);
sprintf(card->longname, "%s at 0x%lx, irq %i",
card->shortname, ice->port, ice->irq);
err = snd_card_register(card);
if (err < 0)
return err;
pci_set_drvdata(pci, card);
dev++;
return 0;
}
#ifdef CONFIG_PM_SLEEP
static int snd_ice1712_suspend(struct device *dev)
{
struct snd_card *card = dev_get_drvdata(dev);
struct snd_ice1712 *ice = card->private_data;
if (!ice->pm_suspend_enabled)
return 0;
snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
snd_ac97_suspend(ice->ac97);
spin_lock_irq(&ice->reg_lock);
ice->pm_saved_is_spdif_master = is_spdif_master(ice);
ice->pm_saved_spdif_ctrl = inw(ICEMT(ice, ROUTE_SPDOUT));
ice->pm_saved_route = inw(ICEMT(ice, ROUTE_PSDOUT03));
spin_unlock_irq(&ice->reg_lock);
if (ice->pm_suspend)
ice->pm_suspend(ice);
return 0;
}
static int snd_ice1712_resume(struct device *dev)
{
struct snd_card *card = dev_get_drvdata(dev);
struct snd_ice1712 *ice = card->private_data;
int rate;
if (!ice->pm_suspend_enabled)
return 0;
if (ice->cur_rate)
rate = ice->cur_rate;
else
rate = PRO_RATE_DEFAULT;
if (snd_ice1712_chip_init(ice) < 0) {
snd_card_disconnect(card);
return -EIO;
}
ice->cur_rate = rate;
if (ice->pm_resume)
ice->pm_resume(ice);
if (ice->pm_saved_is_spdif_master) {
/* switching to external clock via SPDIF */
spin_lock_irq(&ice->reg_lock);
outb(inb(ICEMT(ice, RATE)) | ICE1712_SPDIF_MASTER,
ICEMT(ice, RATE));
spin_unlock_irq(&ice->reg_lock);
snd_ice1712_set_input_clock_source(ice, 1);
} else {
/* internal on-card clock */
snd_ice1712_set_pro_rate(ice, rate, 1);
snd_ice1712_set_input_clock_source(ice, 0);
}
outw(ice->pm_saved_spdif_ctrl, ICEMT(ice, ROUTE_SPDOUT));
outw(ice->pm_saved_route, ICEMT(ice, ROUTE_PSDOUT03));
snd_ac97_resume(ice->ac97);
snd_power_change_state(card, SNDRV_CTL_POWER_D0);
return 0;
}
static SIMPLE_DEV_PM_OPS(snd_ice1712_pm, snd_ice1712_suspend, snd_ice1712_resume);
#define SND_VT1712_PM_OPS &snd_ice1712_pm
#else
#define SND_VT1712_PM_OPS NULL
#endif /* CONFIG_PM_SLEEP */
static struct pci_driver ice1712_driver = {
.name = KBUILD_MODNAME,
.id_table = snd_ice1712_ids,
.probe = snd_ice1712_probe,
.driver = {
.pm = SND_VT1712_PM_OPS,
},
};
module_pci_driver(ice1712_driver);
| linux-master | sound/pci/ice1712/ice1712.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* ALSA driver for ICEnsemble VT1724 (Envy24HT)
*
* Lowlevel functions for Infrasonic Quartet
*
* Copyright (c) 2009 Pavel Hofman <[email protected]>
*/
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/string.h>
#include <sound/core.h>
#include <sound/tlv.h>
#include <sound/info.h>
#include "ice1712.h"
#include "envy24ht.h"
#include <sound/ak4113.h>
#include "quartet.h"
struct qtet_spec {
struct ak4113 *ak4113;
unsigned int scr; /* system control register */
unsigned int mcr; /* monitoring control register */
unsigned int cpld; /* cpld register */
};
struct qtet_kcontrol_private {
unsigned int bit;
void (*set_register)(struct snd_ice1712 *ice, unsigned int val);
unsigned int (*get_register)(struct snd_ice1712 *ice);
const char * const texts[2];
};
enum {
IN12_SEL = 0,
IN34_SEL,
AIN34_SEL,
COAX_OUT,
IN12_MON12,
IN12_MON34,
IN34_MON12,
IN34_MON34,
OUT12_MON34,
OUT34_MON12,
};
static const char * const ext_clock_names[3] = {"IEC958 In", "Word Clock 1xFS",
"Word Clock 256xFS"};
/* chip address on I2C bus */
#define AK4113_ADDR 0x26 /* S/PDIF receiver */
/* chip address on SPI bus */
#define AK4620_ADDR 0x02 /* ADC/DAC */
/*
* GPIO pins
*/
/* GPIO0 - O - DATA0, def. 0 */
#define GPIO_D0 (1<<0)
/* GPIO1 - I/O - DATA1, Jack Detect Input0 (0:present, 1:missing), def. 1 */
#define GPIO_D1_JACKDTC0 (1<<1)
/* GPIO2 - I/O - DATA2, Jack Detect Input1 (0:present, 1:missing), def. 1 */
#define GPIO_D2_JACKDTC1 (1<<2)
/* GPIO3 - I/O - DATA3, def. 1 */
#define GPIO_D3 (1<<3)
/* GPIO4 - I/O - DATA4, SPI CDTO, def. 1 */
#define GPIO_D4_SPI_CDTO (1<<4)
/* GPIO5 - I/O - DATA5, SPI CCLK, def. 1 */
#define GPIO_D5_SPI_CCLK (1<<5)
/* GPIO6 - I/O - DATA6, Cable Detect Input (0:detected, 1:not detected */
#define GPIO_D6_CD (1<<6)
/* GPIO7 - I/O - DATA7, Device Detect Input (0:detected, 1:not detected */
#define GPIO_D7_DD (1<<7)
/* GPIO8 - O - CPLD Chip Select, def. 1 */
#define GPIO_CPLD_CSN (1<<8)
/* GPIO9 - O - CPLD register read/write (0:write, 1:read), def. 0 */
#define GPIO_CPLD_RW (1<<9)
/* GPIO10 - O - SPI Chip Select for CODEC#0, def. 1 */
#define GPIO_SPI_CSN0 (1<<10)
/* GPIO11 - O - SPI Chip Select for CODEC#1, def. 1 */
#define GPIO_SPI_CSN1 (1<<11)
/* GPIO12 - O - Ex. Register Output Enable (0:enable, 1:disable), def. 1,
* init 0 */
#define GPIO_EX_GPIOE (1<<12)
/* GPIO13 - O - Ex. Register0 Chip Select for System Control Register,
* def. 1 */
#define GPIO_SCR (1<<13)
/* GPIO14 - O - Ex. Register1 Chip Select for Monitor Control Register,
* def. 1 */
#define GPIO_MCR (1<<14)
#define GPIO_SPI_ALL (GPIO_D4_SPI_CDTO | GPIO_D5_SPI_CCLK |\
GPIO_SPI_CSN0 | GPIO_SPI_CSN1)
#define GPIO_DATA_MASK (GPIO_D0 | GPIO_D1_JACKDTC0 | \
GPIO_D2_JACKDTC1 | GPIO_D3 | \
GPIO_D4_SPI_CDTO | GPIO_D5_SPI_CCLK | \
GPIO_D6_CD | GPIO_D7_DD)
/* System Control Register GPIO_SCR data bits */
/* Mic/Line select relay (0:line, 1:mic) */
#define SCR_RELAY GPIO_D0
/* Phantom power drive control (0:5V, 1:48V) */
#define SCR_PHP_V GPIO_D1_JACKDTC0
/* H/W mute control (0:Normal, 1:Mute) */
#define SCR_MUTE GPIO_D2_JACKDTC1
/* Phantom power control (0:Phantom on, 1:off) */
#define SCR_PHP GPIO_D3
/* Analog input 1/2 Source Select */
#define SCR_AIN12_SEL0 GPIO_D4_SPI_CDTO
#define SCR_AIN12_SEL1 GPIO_D5_SPI_CCLK
/* Analog input 3/4 Source Select (0:line, 1:hi-z) */
#define SCR_AIN34_SEL GPIO_D6_CD
/* Codec Power Down (0:power down, 1:normal) */
#define SCR_CODEC_PDN GPIO_D7_DD
#define SCR_AIN12_LINE (0)
#define SCR_AIN12_MIC (SCR_AIN12_SEL0)
#define SCR_AIN12_LOWCUT (SCR_AIN12_SEL1 | SCR_AIN12_SEL0)
/* Monitor Control Register GPIO_MCR data bits */
/* Input 1/2 to Monitor 1/2 (0:off, 1:on) */
#define MCR_IN12_MON12 GPIO_D0
/* Input 1/2 to Monitor 3/4 (0:off, 1:on) */
#define MCR_IN12_MON34 GPIO_D1_JACKDTC0
/* Input 3/4 to Monitor 1/2 (0:off, 1:on) */
#define MCR_IN34_MON12 GPIO_D2_JACKDTC1
/* Input 3/4 to Monitor 3/4 (0:off, 1:on) */
#define MCR_IN34_MON34 GPIO_D3
/* Output to Monitor 1/2 (0:off, 1:on) */
#define MCR_OUT34_MON12 GPIO_D4_SPI_CDTO
/* Output to Monitor 3/4 (0:off, 1:on) */
#define MCR_OUT12_MON34 GPIO_D5_SPI_CCLK
/* CPLD Register DATA bits */
/* Clock Rate Select */
#define CPLD_CKS0 GPIO_D0
#define CPLD_CKS1 GPIO_D1_JACKDTC0
#define CPLD_CKS2 GPIO_D2_JACKDTC1
/* Sync Source Select (0:Internal, 1:External) */
#define CPLD_SYNC_SEL GPIO_D3
/* Word Clock FS Select (0:FS, 1:256FS) */
#define CPLD_WORD_SEL GPIO_D4_SPI_CDTO
/* Coaxial Output Source (IS-Link) (0:SPDIF, 1:I2S) */
#define CPLD_COAX_OUT GPIO_D5_SPI_CCLK
/* Input 1/2 Source Select (0:Analog12, 1:An34) */
#define CPLD_IN12_SEL GPIO_D6_CD
/* Input 3/4 Source Select (0:Analog34, 1:Digital In) */
#define CPLD_IN34_SEL GPIO_D7_DD
/* internal clock (CPLD_SYNC_SEL = 0) options */
#define CPLD_CKS_44100HZ (0)
#define CPLD_CKS_48000HZ (CPLD_CKS0)
#define CPLD_CKS_88200HZ (CPLD_CKS1)
#define CPLD_CKS_96000HZ (CPLD_CKS1 | CPLD_CKS0)
#define CPLD_CKS_176400HZ (CPLD_CKS2)
#define CPLD_CKS_192000HZ (CPLD_CKS2 | CPLD_CKS0)
#define CPLD_CKS_MASK (CPLD_CKS0 | CPLD_CKS1 | CPLD_CKS2)
/* external clock (CPLD_SYNC_SEL = 1) options */
/* external clock - SPDIF */
#define CPLD_EXT_SPDIF (0 | CPLD_SYNC_SEL)
/* external clock - WordClock 1xfs */
#define CPLD_EXT_WORDCLOCK_1FS (CPLD_CKS1 | CPLD_SYNC_SEL)
/* external clock - WordClock 256xfs */
#define CPLD_EXT_WORDCLOCK_256FS (CPLD_CKS1 | CPLD_WORD_SEL |\
CPLD_SYNC_SEL)
#define EXT_SPDIF_TYPE 0
#define EXT_WORDCLOCK_1FS_TYPE 1
#define EXT_WORDCLOCK_256FS_TYPE 2
#define AK4620_DFS0 (1<<0)
#define AK4620_DFS1 (1<<1)
#define AK4620_CKS0 (1<<2)
#define AK4620_CKS1 (1<<3)
/* Clock and Format Control register */
#define AK4620_DFS_REG 0x02
/* Deem and Volume Control register */
#define AK4620_DEEMVOL_REG 0x03
#define AK4620_SMUTE (1<<7)
/*
* Conversion from int value to its binary form. Used for debugging.
* The output buffer must be allocated prior to calling the function.
*/
static char *get_binary(char *buffer, int value)
{
int i, j, pos;
pos = 0;
for (i = 0; i < 4; ++i) {
for (j = 0; j < 8; ++j) {
if (value & (1 << (31-(i*8 + j))))
buffer[pos] = '1';
else
buffer[pos] = '0';
pos++;
}
if (i < 3) {
buffer[pos] = ' ';
pos++;
}
}
buffer[pos] = '\0';
return buffer;
}
/*
* Initial setup of the conversion array GPIO <-> rate
*/
static const unsigned int qtet_rates[] = {
44100, 48000, 88200,
96000, 176400, 192000,
};
static const unsigned int cks_vals[] = {
CPLD_CKS_44100HZ, CPLD_CKS_48000HZ, CPLD_CKS_88200HZ,
CPLD_CKS_96000HZ, CPLD_CKS_176400HZ, CPLD_CKS_192000HZ,
};
static const struct snd_pcm_hw_constraint_list qtet_rates_info = {
.count = ARRAY_SIZE(qtet_rates),
.list = qtet_rates,
.mask = 0,
};
static void qtet_ak4113_write(void *private_data, unsigned char reg,
unsigned char val)
{
snd_vt1724_write_i2c((struct snd_ice1712 *)private_data, AK4113_ADDR,
reg, val);
}
static unsigned char qtet_ak4113_read(void *private_data, unsigned char reg)
{
return snd_vt1724_read_i2c((struct snd_ice1712 *)private_data,
AK4113_ADDR, reg);
}
/*
* AK4620 section
*/
/*
* Write data to addr register of ak4620
*/
static void qtet_akm_write(struct snd_akm4xxx *ak, int chip,
unsigned char addr, unsigned char data)
{
unsigned int tmp, orig_dir;
int idx;
unsigned int addrdata;
struct snd_ice1712 *ice = ak->private_data[0];
if (snd_BUG_ON(chip < 0 || chip >= 4))
return;
/*dev_dbg(ice->card->dev, "Writing to AK4620: chip=%d, addr=0x%x,
data=0x%x\n", chip, addr, data);*/
orig_dir = ice->gpio.get_dir(ice);
ice->gpio.set_dir(ice, orig_dir | GPIO_SPI_ALL);
/* set mask - only SPI bits */
ice->gpio.set_mask(ice, ~GPIO_SPI_ALL);
tmp = ice->gpio.get_data(ice);
/* high all */
tmp |= GPIO_SPI_ALL;
ice->gpio.set_data(ice, tmp);
udelay(100);
/* drop chip select */
if (chip)
/* CODEC 1 */
tmp &= ~GPIO_SPI_CSN1;
else
tmp &= ~GPIO_SPI_CSN0;
ice->gpio.set_data(ice, tmp);
udelay(100);
/* build I2C address + data byte */
addrdata = (AK4620_ADDR << 6) | 0x20 | (addr & 0x1f);
addrdata = (addrdata << 8) | data;
for (idx = 15; idx >= 0; idx--) {
/* drop clock */
tmp &= ~GPIO_D5_SPI_CCLK;
ice->gpio.set_data(ice, tmp);
udelay(100);
/* set data */
if (addrdata & (1 << idx))
tmp |= GPIO_D4_SPI_CDTO;
else
tmp &= ~GPIO_D4_SPI_CDTO;
ice->gpio.set_data(ice, tmp);
udelay(100);
/* raise clock */
tmp |= GPIO_D5_SPI_CCLK;
ice->gpio.set_data(ice, tmp);
udelay(100);
}
/* all back to 1 */
tmp |= GPIO_SPI_ALL;
ice->gpio.set_data(ice, tmp);
udelay(100);
/* return all gpios to non-writable */
ice->gpio.set_mask(ice, 0xffffff);
/* restore GPIOs direction */
ice->gpio.set_dir(ice, orig_dir);
}
static void qtet_akm_set_regs(struct snd_akm4xxx *ak, unsigned char addr,
unsigned char mask, unsigned char value)
{
unsigned char tmp;
int chip;
for (chip = 0; chip < ak->num_chips; chip++) {
tmp = snd_akm4xxx_get(ak, chip, addr);
/* clear the bits */
tmp &= ~mask;
/* set the new bits */
tmp |= value;
snd_akm4xxx_write(ak, chip, addr, tmp);
}
}
/*
* change the rate of AK4620
*/
static void qtet_akm_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate)
{
unsigned char ak4620_dfs;
if (rate == 0) /* no hint - S/PDIF input is master or the new spdif
input rate undetected, simply return */
return;
/* adjust DFS on codecs - see datasheet */
if (rate > 108000)
ak4620_dfs = AK4620_DFS1 | AK4620_CKS1;
else if (rate > 54000)
ak4620_dfs = AK4620_DFS0 | AK4620_CKS0;
else
ak4620_dfs = 0;
/* set new value */
qtet_akm_set_regs(ak, AK4620_DFS_REG, AK4620_DFS0 | AK4620_DFS1 |
AK4620_CKS0 | AK4620_CKS1, ak4620_dfs);
}
#define AK_CONTROL(xname, xch) { .name = xname, .num_channels = xch }
#define PCM_12_PLAYBACK_VOLUME "PCM 1/2 Playback Volume"
#define PCM_34_PLAYBACK_VOLUME "PCM 3/4 Playback Volume"
#define PCM_12_CAPTURE_VOLUME "PCM 1/2 Capture Volume"
#define PCM_34_CAPTURE_VOLUME "PCM 3/4 Capture Volume"
static const struct snd_akm4xxx_dac_channel qtet_dac[] = {
AK_CONTROL(PCM_12_PLAYBACK_VOLUME, 2),
AK_CONTROL(PCM_34_PLAYBACK_VOLUME, 2),
};
static const struct snd_akm4xxx_adc_channel qtet_adc[] = {
AK_CONTROL(PCM_12_CAPTURE_VOLUME, 2),
AK_CONTROL(PCM_34_CAPTURE_VOLUME, 2),
};
static const struct snd_akm4xxx akm_qtet_dac = {
.type = SND_AK4620,
.num_dacs = 4, /* DAC1 - Output 12
*/
.num_adcs = 4, /* ADC1 - Input 12
*/
.ops = {
.write = qtet_akm_write,
.set_rate_val = qtet_akm_set_rate_val,
},
.dac_info = qtet_dac,
.adc_info = qtet_adc,
};
/* Communication routines with the CPLD */
/* Writes data to external register reg, both reg and data are
* GPIO representations */
static void reg_write(struct snd_ice1712 *ice, unsigned int reg,
unsigned int data)
{
unsigned int tmp;
mutex_lock(&ice->gpio_mutex);
/* set direction of used GPIOs*/
/* all outputs */
tmp = 0x00ffff;
ice->gpio.set_dir(ice, tmp);
/* mask - writable bits */
ice->gpio.set_mask(ice, ~(tmp));
/* write the data */
tmp = ice->gpio.get_data(ice);
tmp &= ~GPIO_DATA_MASK;
tmp |= data;
ice->gpio.set_data(ice, tmp);
udelay(100);
/* drop output enable */
tmp &= ~GPIO_EX_GPIOE;
ice->gpio.set_data(ice, tmp);
udelay(100);
/* drop the register gpio */
tmp &= ~reg;
ice->gpio.set_data(ice, tmp);
udelay(100);
/* raise the register GPIO */
tmp |= reg;
ice->gpio.set_data(ice, tmp);
udelay(100);
/* raise all data gpios */
tmp |= GPIO_DATA_MASK;
ice->gpio.set_data(ice, tmp);
/* mask - immutable bits */
ice->gpio.set_mask(ice, 0xffffff);
/* outputs only 8-15 */
ice->gpio.set_dir(ice, 0x00ff00);
mutex_unlock(&ice->gpio_mutex);
}
static unsigned int get_scr(struct snd_ice1712 *ice)
{
struct qtet_spec *spec = ice->spec;
return spec->scr;
}
static unsigned int get_mcr(struct snd_ice1712 *ice)
{
struct qtet_spec *spec = ice->spec;
return spec->mcr;
}
static unsigned int get_cpld(struct snd_ice1712 *ice)
{
struct qtet_spec *spec = ice->spec;
return spec->cpld;
}
static void set_scr(struct snd_ice1712 *ice, unsigned int val)
{
struct qtet_spec *spec = ice->spec;
reg_write(ice, GPIO_SCR, val);
spec->scr = val;
}
static void set_mcr(struct snd_ice1712 *ice, unsigned int val)
{
struct qtet_spec *spec = ice->spec;
reg_write(ice, GPIO_MCR, val);
spec->mcr = val;
}
static void set_cpld(struct snd_ice1712 *ice, unsigned int val)
{
struct qtet_spec *spec = ice->spec;
reg_write(ice, GPIO_CPLD_CSN, val);
spec->cpld = val;
}
static void proc_regs_read(struct snd_info_entry *entry,
struct snd_info_buffer *buffer)
{
struct snd_ice1712 *ice = entry->private_data;
char bin_buffer[36];
snd_iprintf(buffer, "SCR: %s\n", get_binary(bin_buffer,
get_scr(ice)));
snd_iprintf(buffer, "MCR: %s\n", get_binary(bin_buffer,
get_mcr(ice)));
snd_iprintf(buffer, "CPLD: %s\n", get_binary(bin_buffer,
get_cpld(ice)));
}
static void proc_init(struct snd_ice1712 *ice)
{
snd_card_ro_proc_new(ice->card, "quartet", ice, proc_regs_read);
}
static int qtet_mute_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned int val;
val = get_scr(ice) & SCR_MUTE;
ucontrol->value.integer.value[0] = (val) ? 0 : 1;
return 0;
}
static int qtet_mute_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned int old, new, smute;
old = get_scr(ice) & SCR_MUTE;
if (ucontrol->value.integer.value[0]) {
/* unmute */
new = 0;
/* un-smuting DAC */
smute = 0;
} else {
/* mute */
new = SCR_MUTE;
/* smuting DAC */
smute = AK4620_SMUTE;
}
if (old != new) {
struct snd_akm4xxx *ak = ice->akm;
set_scr(ice, (get_scr(ice) & ~SCR_MUTE) | new);
/* set smute */
qtet_akm_set_regs(ak, AK4620_DEEMVOL_REG, AK4620_SMUTE, smute);
return 1;
}
/* no change */
return 0;
}
static int qtet_ain12_enum_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
static const char * const texts[3] =
{"Line In 1/2", "Mic", "Mic + Low-cut"};
return snd_ctl_enum_info(uinfo, 1, ARRAY_SIZE(texts), texts);
}
static int qtet_ain12_sw_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned int val, result;
val = get_scr(ice) & (SCR_AIN12_SEL1 | SCR_AIN12_SEL0);
switch (val) {
case SCR_AIN12_LINE:
result = 0;
break;
case SCR_AIN12_MIC:
result = 1;
break;
case SCR_AIN12_LOWCUT:
result = 2;
break;
default:
/* BUG - no other combinations allowed */
snd_BUG();
result = 0;
}
ucontrol->value.integer.value[0] = result;
return 0;
}
static int qtet_ain12_sw_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned int old, new, tmp, masked_old;
old = get_scr(ice);
masked_old = old & (SCR_AIN12_SEL1 | SCR_AIN12_SEL0);
tmp = ucontrol->value.integer.value[0];
if (tmp == 2)
tmp = 3; /* binary 10 is not supported */
tmp <<= 4; /* shifting to SCR_AIN12_SEL0 */
if (tmp != masked_old) {
/* change requested */
switch (tmp) {
case SCR_AIN12_LINE:
new = old & ~(SCR_AIN12_SEL1 | SCR_AIN12_SEL0);
set_scr(ice, new);
/* turn off relay */
new &= ~SCR_RELAY;
set_scr(ice, new);
break;
case SCR_AIN12_MIC:
/* turn on relay */
new = old | SCR_RELAY;
set_scr(ice, new);
new = (new & ~SCR_AIN12_SEL1) | SCR_AIN12_SEL0;
set_scr(ice, new);
break;
case SCR_AIN12_LOWCUT:
/* turn on relay */
new = old | SCR_RELAY;
set_scr(ice, new);
new |= SCR_AIN12_SEL1 | SCR_AIN12_SEL0;
set_scr(ice, new);
break;
default:
snd_BUG();
}
return 1;
}
/* no change */
return 0;
}
static int qtet_php_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned int val;
/* if phantom voltage =48V, phantom on */
val = get_scr(ice) & SCR_PHP_V;
ucontrol->value.integer.value[0] = val ? 1 : 0;
return 0;
}
static int qtet_php_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned int old, new;
old = new = get_scr(ice);
if (ucontrol->value.integer.value[0] /* phantom on requested */
&& (~old & SCR_PHP_V)) /* 0 = voltage 5V */ {
/* is off, turn on */
/* turn voltage on first, = 1 */
new = old | SCR_PHP_V;
set_scr(ice, new);
/* turn phantom on, = 0 */
new &= ~SCR_PHP;
set_scr(ice, new);
} else if (!ucontrol->value.integer.value[0] && (old & SCR_PHP_V)) {
/* phantom off requested and 1 = voltage 48V */
/* is on, turn off */
/* turn voltage off first, = 0 */
new = old & ~SCR_PHP_V;
set_scr(ice, new);
/* turn phantom off, = 1 */
new |= SCR_PHP;
set_scr(ice, new);
}
if (old != new)
return 1;
/* no change */
return 0;
}
#define PRIV_SW(xid, xbit, xreg) [xid] = {.bit = xbit,\
.set_register = set_##xreg,\
.get_register = get_##xreg, }
#define PRIV_ENUM2(xid, xbit, xreg, xtext1, xtext2) [xid] = {.bit = xbit,\
.set_register = set_##xreg,\
.get_register = get_##xreg,\
.texts = {xtext1, xtext2} }
static const struct qtet_kcontrol_private qtet_privates[] = {
PRIV_ENUM2(IN12_SEL, CPLD_IN12_SEL, cpld, "An In 1/2", "An In 3/4"),
PRIV_ENUM2(IN34_SEL, CPLD_IN34_SEL, cpld, "An In 3/4", "IEC958 In"),
PRIV_ENUM2(AIN34_SEL, SCR_AIN34_SEL, scr, "Line In 3/4", "Hi-Z"),
PRIV_ENUM2(COAX_OUT, CPLD_COAX_OUT, cpld, "IEC958", "I2S"),
PRIV_SW(IN12_MON12, MCR_IN12_MON12, mcr),
PRIV_SW(IN12_MON34, MCR_IN12_MON34, mcr),
PRIV_SW(IN34_MON12, MCR_IN34_MON12, mcr),
PRIV_SW(IN34_MON34, MCR_IN34_MON34, mcr),
PRIV_SW(OUT12_MON34, MCR_OUT12_MON34, mcr),
PRIV_SW(OUT34_MON12, MCR_OUT34_MON12, mcr),
};
static int qtet_enum_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
struct qtet_kcontrol_private private =
qtet_privates[kcontrol->private_value];
return snd_ctl_enum_info(uinfo, 1, ARRAY_SIZE(private.texts),
private.texts);
}
static int qtet_sw_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct qtet_kcontrol_private private =
qtet_privates[kcontrol->private_value];
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
ucontrol->value.integer.value[0] =
(private.get_register(ice) & private.bit) ? 1 : 0;
return 0;
}
static int qtet_sw_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct qtet_kcontrol_private private =
qtet_privates[kcontrol->private_value];
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned int old, new;
old = private.get_register(ice);
if (ucontrol->value.integer.value[0])
new = old | private.bit;
else
new = old & ~private.bit;
if (old != new) {
private.set_register(ice, new);
return 1;
}
/* no change */
return 0;
}
#define qtet_sw_info snd_ctl_boolean_mono_info
#define QTET_CONTROL(xname, xtype, xpriv) \
{.iface = SNDRV_CTL_ELEM_IFACE_MIXER,\
.name = xname,\
.info = qtet_##xtype##_info,\
.get = qtet_sw_get,\
.put = qtet_sw_put,\
.private_value = xpriv }
static const struct snd_kcontrol_new qtet_controls[] = {
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Master Playback Switch",
.info = qtet_sw_info,
.get = qtet_mute_get,
.put = qtet_mute_put,
.private_value = 0
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Phantom Power",
.info = qtet_sw_info,
.get = qtet_php_get,
.put = qtet_php_put,
.private_value = 0
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Analog In 1/2 Capture Switch",
.info = qtet_ain12_enum_info,
.get = qtet_ain12_sw_get,
.put = qtet_ain12_sw_put,
.private_value = 0
},
QTET_CONTROL("Analog In 3/4 Capture Switch", enum, AIN34_SEL),
QTET_CONTROL("PCM In 1/2 Capture Switch", enum, IN12_SEL),
QTET_CONTROL("PCM In 3/4 Capture Switch", enum, IN34_SEL),
QTET_CONTROL("Coax Output Source", enum, COAX_OUT),
QTET_CONTROL("Analog In 1/2 to Monitor 1/2", sw, IN12_MON12),
QTET_CONTROL("Analog In 1/2 to Monitor 3/4", sw, IN12_MON34),
QTET_CONTROL("Analog In 3/4 to Monitor 1/2", sw, IN34_MON12),
QTET_CONTROL("Analog In 3/4 to Monitor 3/4", sw, IN34_MON34),
QTET_CONTROL("Output 1/2 to Monitor 3/4", sw, OUT12_MON34),
QTET_CONTROL("Output 3/4 to Monitor 1/2", sw, OUT34_MON12),
};
static const char * const follower_vols[] = {
PCM_12_PLAYBACK_VOLUME,
PCM_34_PLAYBACK_VOLUME,
NULL
};
static
DECLARE_TLV_DB_SCALE(qtet_master_db_scale, -6350, 50, 1);
static int qtet_add_controls(struct snd_ice1712 *ice)
{
struct qtet_spec *spec = ice->spec;
int err, i;
struct snd_kcontrol *vmaster;
err = snd_ice1712_akm4xxx_build_controls(ice);
if (err < 0)
return err;
for (i = 0; i < ARRAY_SIZE(qtet_controls); i++) {
err = snd_ctl_add(ice->card,
snd_ctl_new1(&qtet_controls[i], ice));
if (err < 0)
return err;
}
/* Create virtual master control */
vmaster = snd_ctl_make_virtual_master("Master Playback Volume",
qtet_master_db_scale);
if (!vmaster)
return -ENOMEM;
err = snd_ctl_add(ice->card, vmaster);
if (err < 0)
return err;
err = snd_ctl_add_followers(ice->card, vmaster, follower_vols);
if (err < 0)
return err;
/* only capture SPDIF over AK4113 */
return snd_ak4113_build(spec->ak4113,
ice->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
}
static inline int qtet_is_spdif_master(struct snd_ice1712 *ice)
{
/* CPLD_SYNC_SEL: 0 = internal, 1 = external (i.e. spdif master) */
return (get_cpld(ice) & CPLD_SYNC_SEL) ? 1 : 0;
}
static unsigned int qtet_get_rate(struct snd_ice1712 *ice)
{
int i;
unsigned char result;
result = get_cpld(ice) & CPLD_CKS_MASK;
for (i = 0; i < ARRAY_SIZE(cks_vals); i++)
if (cks_vals[i] == result)
return qtet_rates[i];
return 0;
}
static int get_cks_val(int rate)
{
int i;
for (i = 0; i < ARRAY_SIZE(qtet_rates); i++)
if (qtet_rates[i] == rate)
return cks_vals[i];
return 0;
}
/* setting new rate */
static void qtet_set_rate(struct snd_ice1712 *ice, unsigned int rate)
{
unsigned int new;
unsigned char val;
/* switching ice1724 to external clock - supplied by ext. circuits */
val = inb(ICEMT1724(ice, RATE));
outb(val | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
new = (get_cpld(ice) & ~CPLD_CKS_MASK) | get_cks_val(rate);
/* switch to internal clock, drop CPLD_SYNC_SEL */
new &= ~CPLD_SYNC_SEL;
/* dev_dbg(ice->card->dev, "QT - set_rate: old %x, new %x\n",
get_cpld(ice), new); */
set_cpld(ice, new);
}
static inline unsigned char qtet_set_mclk(struct snd_ice1712 *ice,
unsigned int rate)
{
/* no change in master clock */
return 0;
}
/* setting clock to external - SPDIF */
static int qtet_set_spdif_clock(struct snd_ice1712 *ice, int type)
{
unsigned int old, new;
old = new = get_cpld(ice);
new &= ~(CPLD_CKS_MASK | CPLD_WORD_SEL);
switch (type) {
case EXT_SPDIF_TYPE:
new |= CPLD_EXT_SPDIF;
break;
case EXT_WORDCLOCK_1FS_TYPE:
new |= CPLD_EXT_WORDCLOCK_1FS;
break;
case EXT_WORDCLOCK_256FS_TYPE:
new |= CPLD_EXT_WORDCLOCK_256FS;
break;
default:
snd_BUG();
}
if (old != new) {
set_cpld(ice, new);
/* changed */
return 1;
}
return 0;
}
static int qtet_get_spdif_master_type(struct snd_ice1712 *ice)
{
unsigned int val;
int result;
val = get_cpld(ice);
/* checking only rate/clock-related bits */
val &= (CPLD_CKS_MASK | CPLD_WORD_SEL | CPLD_SYNC_SEL);
if (!(val & CPLD_SYNC_SEL)) {
/* switched to internal clock, is not any external type */
result = -1;
} else {
switch (val) {
case (CPLD_EXT_SPDIF):
result = EXT_SPDIF_TYPE;
break;
case (CPLD_EXT_WORDCLOCK_1FS):
result = EXT_WORDCLOCK_1FS_TYPE;
break;
case (CPLD_EXT_WORDCLOCK_256FS):
result = EXT_WORDCLOCK_256FS_TYPE;
break;
default:
/* undefined combination of external clock setup */
snd_BUG();
result = 0;
}
}
return result;
}
/* Called when ak4113 detects change in the input SPDIF stream */
static void qtet_ak4113_change(struct ak4113 *ak4113, unsigned char c0,
unsigned char c1)
{
struct snd_ice1712 *ice = ak4113->change_callback_private;
int rate;
if ((qtet_get_spdif_master_type(ice) == EXT_SPDIF_TYPE) &&
c1) {
/* only for SPDIF master mode, rate was changed */
rate = snd_ak4113_external_rate(ak4113);
/* dev_dbg(ice->card->dev, "ak4113 - input rate changed to %d\n",
rate); */
qtet_akm_set_rate_val(ice->akm, rate);
}
}
/*
* If clock slaved to SPDIF-IN, setting runtime rate
* to the detected external rate
*/
static void qtet_spdif_in_open(struct snd_ice1712 *ice,
struct snd_pcm_substream *substream)
{
struct qtet_spec *spec = ice->spec;
struct snd_pcm_runtime *runtime = substream->runtime;
int rate;
if (qtet_get_spdif_master_type(ice) != EXT_SPDIF_TYPE)
/* not external SPDIF, no rate limitation */
return;
/* only external SPDIF can detect incoming sample rate */
rate = snd_ak4113_external_rate(spec->ak4113);
if (rate >= runtime->hw.rate_min && rate <= runtime->hw.rate_max) {
runtime->hw.rate_min = rate;
runtime->hw.rate_max = rate;
}
}
/*
* initialize the chip
*/
static int qtet_init(struct snd_ice1712 *ice)
{
static const unsigned char ak4113_init_vals[] = {
/* AK4113_REG_PWRDN */ AK4113_RST | AK4113_PWN |
AK4113_OCKS0 | AK4113_OCKS1,
/* AK4113_REQ_FORMAT */ AK4113_DIF_I24I2S | AK4113_VTX |
AK4113_DEM_OFF | AK4113_DEAU,
/* AK4113_REG_IO0 */ AK4113_OPS2 | AK4113_TXE |
AK4113_XTL_24_576M,
/* AK4113_REG_IO1 */ AK4113_EFH_1024LRCLK | AK4113_IPS(0),
/* AK4113_REG_INT0_MASK */ 0,
/* AK4113_REG_INT1_MASK */ 0,
/* AK4113_REG_DATDTS */ 0,
};
int err;
struct qtet_spec *spec;
struct snd_akm4xxx *ak;
unsigned char val;
/* switching ice1724 to external clock - supplied by ext. circuits */
val = inb(ICEMT1724(ice, RATE));
outb(val | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
spec = kzalloc(sizeof(*spec), GFP_KERNEL);
if (!spec)
return -ENOMEM;
/* qtet is clocked by Xilinx array */
ice->hw_rates = &qtet_rates_info;
ice->is_spdif_master = qtet_is_spdif_master;
ice->get_rate = qtet_get_rate;
ice->set_rate = qtet_set_rate;
ice->set_mclk = qtet_set_mclk;
ice->set_spdif_clock = qtet_set_spdif_clock;
ice->get_spdif_master_type = qtet_get_spdif_master_type;
ice->ext_clock_names = ext_clock_names;
ice->ext_clock_count = ARRAY_SIZE(ext_clock_names);
/* since Qtet can detect correct SPDIF-in rate, all streams can be
* limited to this specific rate */
ice->spdif.ops.open = ice->pro_open = qtet_spdif_in_open;
ice->spec = spec;
/* Mute Off */
/* SCR Initialize*/
/* keep codec power down first */
set_scr(ice, SCR_PHP);
udelay(1);
/* codec power up */
set_scr(ice, SCR_PHP | SCR_CODEC_PDN);
/* MCR Initialize */
set_mcr(ice, 0);
/* CPLD Initialize */
set_cpld(ice, 0);
ice->num_total_dacs = 2;
ice->num_total_adcs = 2;
ice->akm = kcalloc(2, sizeof(struct snd_akm4xxx), GFP_KERNEL);
ak = ice->akm;
if (!ak)
return -ENOMEM;
/* only one codec with two chips */
ice->akm_codecs = 1;
err = snd_ice1712_akm4xxx_init(ak, &akm_qtet_dac, NULL, ice);
if (err < 0)
return err;
err = snd_ak4113_create(ice->card,
qtet_ak4113_read,
qtet_ak4113_write,
ak4113_init_vals,
ice, &spec->ak4113);
if (err < 0)
return err;
/* callback for codecs rate setting */
spec->ak4113->change_callback = qtet_ak4113_change;
spec->ak4113->change_callback_private = ice;
/* AK41143 in Quartet can detect external rate correctly
* (i.e. check_flags = 0) */
spec->ak4113->check_flags = 0;
proc_init(ice);
qtet_set_rate(ice, 44100);
return 0;
}
static const unsigned char qtet_eeprom[] = {
[ICE_EEP2_SYSCONF] = 0x28, /* clock 256(24MHz), mpu401, 1xADC,
1xDACs, SPDIF in */
[ICE_EEP2_ACLINK] = 0x80, /* I2S */
[ICE_EEP2_I2S] = 0x78, /* 96k, 24bit, 192k */
[ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, in, out-ext */
[ICE_EEP2_GPIO_DIR] = 0x00, /* 0-7 inputs, switched to output
only during output operations */
[ICE_EEP2_GPIO_DIR1] = 0xff, /* 8-15 outputs */
[ICE_EEP2_GPIO_DIR2] = 0x00,
[ICE_EEP2_GPIO_MASK] = 0xff, /* changed only for OUT operations */
[ICE_EEP2_GPIO_MASK1] = 0x00,
[ICE_EEP2_GPIO_MASK2] = 0xff,
[ICE_EEP2_GPIO_STATE] = 0x00, /* inputs */
[ICE_EEP2_GPIO_STATE1] = 0x7d, /* all 1, but GPIO_CPLD_RW
and GPIO15 always zero */
[ICE_EEP2_GPIO_STATE2] = 0x00, /* inputs */
};
/* entry point */
struct snd_ice1712_card_info snd_vt1724_qtet_cards[] = {
{
.subvendor = VT1724_SUBDEVICE_QTET,
.name = "Infrasonic Quartet",
.model = "quartet",
.chip_init = qtet_init,
.build_controls = qtet_add_controls,
.eeprom_size = sizeof(qtet_eeprom),
.eeprom_data = qtet_eeprom,
},
{ } /* terminator */
};
| linux-master | sound/pci/ice1712/quartet.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* ALSA driver for ICEnsemble ICE1712 (Envy24)
*
* AK4524 / AK4528 / AK4529 / AK4355 / AK4381 interface
*
* Copyright (c) 2000 Jaroslav Kysela <[email protected]>
*/
#include <linux/io.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/slab.h>
#include <linux/init.h>
#include <linux/module.h>
#include <sound/core.h>
#include <sound/initval.h>
#include "ice1712.h"
MODULE_AUTHOR("Jaroslav Kysela <[email protected]>");
MODULE_DESCRIPTION("ICEnsemble ICE17xx <-> AK4xxx AD/DA chip interface");
MODULE_LICENSE("GPL");
static void snd_ice1712_akm4xxx_lock(struct snd_akm4xxx *ak, int chip)
{
struct snd_ice1712 *ice = ak->private_data[0];
snd_ice1712_save_gpio_status(ice);
}
static void snd_ice1712_akm4xxx_unlock(struct snd_akm4xxx *ak, int chip)
{
struct snd_ice1712 *ice = ak->private_data[0];
snd_ice1712_restore_gpio_status(ice);
}
/*
* write AK4xxx register
*/
static void snd_ice1712_akm4xxx_write(struct snd_akm4xxx *ak, int chip,
unsigned char addr, unsigned char data)
{
unsigned int tmp;
int idx;
unsigned int addrdata;
struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
struct snd_ice1712 *ice = ak->private_data[0];
if (snd_BUG_ON(chip < 0 || chip >= 4))
return;
tmp = snd_ice1712_gpio_read(ice);
tmp |= priv->add_flags;
tmp &= ~priv->mask_flags;
if (priv->cs_mask == priv->cs_addr) {
if (priv->cif) {
tmp |= priv->cs_mask; /* start without chip select */
} else {
tmp &= ~priv->cs_mask; /* chip select low */
snd_ice1712_gpio_write(ice, tmp);
udelay(1);
}
} else {
/* doesn't handle cf=1 yet */
tmp &= ~priv->cs_mask;
tmp |= priv->cs_addr;
snd_ice1712_gpio_write(ice, tmp);
udelay(1);
}
/* build I2C address + data byte */
addrdata = (priv->caddr << 6) | 0x20 | (addr & 0x1f);
addrdata = (addrdata << 8) | data;
for (idx = 15; idx >= 0; idx--) {
/* drop clock */
tmp &= ~priv->clk_mask;
snd_ice1712_gpio_write(ice, tmp);
udelay(1);
/* set data */
if (addrdata & (1 << idx))
tmp |= priv->data_mask;
else
tmp &= ~priv->data_mask;
snd_ice1712_gpio_write(ice, tmp);
udelay(1);
/* raise clock */
tmp |= priv->clk_mask;
snd_ice1712_gpio_write(ice, tmp);
udelay(1);
}
if (priv->cs_mask == priv->cs_addr) {
if (priv->cif) {
/* assert a cs pulse to trigger */
tmp &= ~priv->cs_mask;
snd_ice1712_gpio_write(ice, tmp);
udelay(1);
}
tmp |= priv->cs_mask; /* chip select high to trigger */
} else {
tmp &= ~priv->cs_mask;
tmp |= priv->cs_none; /* deselect address */
}
snd_ice1712_gpio_write(ice, tmp);
udelay(1);
}
/*
* initialize the struct snd_akm4xxx record with the template
*/
int snd_ice1712_akm4xxx_init(struct snd_akm4xxx *ak, const struct snd_akm4xxx *temp,
const struct snd_ak4xxx_private *_priv, struct snd_ice1712 *ice)
{
struct snd_ak4xxx_private *priv;
if (_priv != NULL) {
priv = kmalloc(sizeof(*priv), GFP_KERNEL);
if (priv == NULL)
return -ENOMEM;
*priv = *_priv;
} else {
priv = NULL;
}
*ak = *temp;
ak->card = ice->card;
ak->private_value[0] = (unsigned long)priv;
ak->private_data[0] = ice;
if (ak->ops.lock == NULL)
ak->ops.lock = snd_ice1712_akm4xxx_lock;
if (ak->ops.unlock == NULL)
ak->ops.unlock = snd_ice1712_akm4xxx_unlock;
if (ak->ops.write == NULL)
ak->ops.write = snd_ice1712_akm4xxx_write;
snd_akm4xxx_init(ak);
return 0;
}
void snd_ice1712_akm4xxx_free(struct snd_ice1712 *ice)
{
unsigned int akidx;
if (ice->akm == NULL)
return;
for (akidx = 0; akidx < ice->akm_codecs; akidx++) {
struct snd_akm4xxx *ak = &ice->akm[akidx];
kfree((void*)ak->private_value[0]);
}
kfree(ice->akm);
}
/*
* build AK4xxx controls
*/
int snd_ice1712_akm4xxx_build_controls(struct snd_ice1712 *ice)
{
unsigned int akidx;
int err;
for (akidx = 0; akidx < ice->akm_codecs; akidx++) {
struct snd_akm4xxx *ak = &ice->akm[akidx];
err = snd_akm4xxx_build_controls(ak);
if (err < 0)
return err;
}
return 0;
}
EXPORT_SYMBOL(snd_ice1712_akm4xxx_init);
EXPORT_SYMBOL(snd_ice1712_akm4xxx_free);
EXPORT_SYMBOL(snd_ice1712_akm4xxx_build_controls);
| linux-master | sound/pci/ice1712/ak4xxx.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* ALSA driver for ICEnsemble VT1724 (Envy24HT)
*
* Lowlevel functions for ESI Juli@ cards
*
* Copyright (c) 2004 Jaroslav Kysela <[email protected]>
* 2008 Pavel Hofman <[email protected]>
*/
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/string.h>
#include <sound/core.h>
#include <sound/tlv.h>
#include "ice1712.h"
#include "envy24ht.h"
#include "juli.h"
struct juli_spec {
struct ak4114 *ak4114;
unsigned int analog:1;
};
/*
* chip addresses on I2C bus
*/
#define AK4114_ADDR 0x20 /* S/PDIF receiver */
#define AK4358_ADDR 0x22 /* DAC */
/*
* Juli does not use the standard ICE1724 clock scheme. Juli's ice1724 chip is
* supplied by external clock provided by Xilinx array and MK73-1 PLL frequency
* multiplier. Actual frequency is set by ice1724 GPIOs hooked to the Xilinx.
*
* The clock circuitry is supplied by the two ice1724 crystals. This
* arrangement allows to generate independent clock signal for AK4114's input
* rate detection circuit. As a result, Juli, unlike most other
* ice1724+ak4114-based cards, detects spdif input rate correctly.
* This fact is applied in the driver, allowing to modify PCM stream rate
* parameter according to the actual input rate.
*
* Juli uses the remaining three stereo-channels of its DAC to optionally
* monitor analog input, digital input, and digital output. The corresponding
* I2S signals are routed by Xilinx, controlled by GPIOs.
*
* The master mute is implemented using output muting transistors (GPIO) in
* combination with smuting the DAC.
*
* The card itself has no HW master volume control, implemented using the
* vmaster control.
*
* TODO:
* researching and fixing the input monitors
*/
/*
* GPIO pins
*/
#define GPIO_FREQ_MASK (3<<0)
#define GPIO_FREQ_32KHZ (0<<0)
#define GPIO_FREQ_44KHZ (1<<0)
#define GPIO_FREQ_48KHZ (2<<0)
#define GPIO_MULTI_MASK (3<<2)
#define GPIO_MULTI_4X (0<<2)
#define GPIO_MULTI_2X (1<<2)
#define GPIO_MULTI_1X (2<<2) /* also external */
#define GPIO_MULTI_HALF (3<<2)
#define GPIO_INTERNAL_CLOCK (1<<4) /* 0 = external, 1 = internal */
#define GPIO_CLOCK_MASK (1<<4)
#define GPIO_ANALOG_PRESENT (1<<5) /* RO only: 0 = present */
#define GPIO_RXMCLK_SEL (1<<7) /* must be 0 */
#define GPIO_AK5385A_CKS0 (1<<8)
#define GPIO_AK5385A_DFS1 (1<<9)
#define GPIO_AK5385A_DFS0 (1<<10)
#define GPIO_DIGOUT_MONITOR (1<<11) /* 1 = active */
#define GPIO_DIGIN_MONITOR (1<<12) /* 1 = active */
#define GPIO_ANAIN_MONITOR (1<<13) /* 1 = active */
#define GPIO_AK5385A_CKS1 (1<<14) /* must be 0 */
#define GPIO_MUTE_CONTROL (1<<15) /* output mute, 1 = muted */
#define GPIO_RATE_MASK (GPIO_FREQ_MASK | GPIO_MULTI_MASK | \
GPIO_CLOCK_MASK)
#define GPIO_AK5385A_MASK (GPIO_AK5385A_CKS0 | GPIO_AK5385A_DFS0 | \
GPIO_AK5385A_DFS1 | GPIO_AK5385A_CKS1)
#define JULI_PCM_RATE (SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | \
SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_64000 | \
SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | \
SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_192000)
#define GPIO_RATE_16000 (GPIO_FREQ_32KHZ | GPIO_MULTI_HALF | \
GPIO_INTERNAL_CLOCK)
#define GPIO_RATE_22050 (GPIO_FREQ_44KHZ | GPIO_MULTI_HALF | \
GPIO_INTERNAL_CLOCK)
#define GPIO_RATE_24000 (GPIO_FREQ_48KHZ | GPIO_MULTI_HALF | \
GPIO_INTERNAL_CLOCK)
#define GPIO_RATE_32000 (GPIO_FREQ_32KHZ | GPIO_MULTI_1X | \
GPIO_INTERNAL_CLOCK)
#define GPIO_RATE_44100 (GPIO_FREQ_44KHZ | GPIO_MULTI_1X | \
GPIO_INTERNAL_CLOCK)
#define GPIO_RATE_48000 (GPIO_FREQ_48KHZ | GPIO_MULTI_1X | \
GPIO_INTERNAL_CLOCK)
#define GPIO_RATE_64000 (GPIO_FREQ_32KHZ | GPIO_MULTI_2X | \
GPIO_INTERNAL_CLOCK)
#define GPIO_RATE_88200 (GPIO_FREQ_44KHZ | GPIO_MULTI_2X | \
GPIO_INTERNAL_CLOCK)
#define GPIO_RATE_96000 (GPIO_FREQ_48KHZ | GPIO_MULTI_2X | \
GPIO_INTERNAL_CLOCK)
#define GPIO_RATE_176400 (GPIO_FREQ_44KHZ | GPIO_MULTI_4X | \
GPIO_INTERNAL_CLOCK)
#define GPIO_RATE_192000 (GPIO_FREQ_48KHZ | GPIO_MULTI_4X | \
GPIO_INTERNAL_CLOCK)
/*
* Initial setup of the conversion array GPIO <-> rate
*/
static const unsigned int juli_rates[] = {
16000, 22050, 24000, 32000,
44100, 48000, 64000, 88200,
96000, 176400, 192000,
};
static const unsigned int gpio_vals[] = {
GPIO_RATE_16000, GPIO_RATE_22050, GPIO_RATE_24000, GPIO_RATE_32000,
GPIO_RATE_44100, GPIO_RATE_48000, GPIO_RATE_64000, GPIO_RATE_88200,
GPIO_RATE_96000, GPIO_RATE_176400, GPIO_RATE_192000,
};
static const struct snd_pcm_hw_constraint_list juli_rates_info = {
.count = ARRAY_SIZE(juli_rates),
.list = juli_rates,
.mask = 0,
};
static int get_gpio_val(int rate)
{
int i;
for (i = 0; i < ARRAY_SIZE(juli_rates); i++)
if (juli_rates[i] == rate)
return gpio_vals[i];
return 0;
}
static void juli_ak4114_write(void *private_data, unsigned char reg,
unsigned char val)
{
snd_vt1724_write_i2c((struct snd_ice1712 *)private_data, AK4114_ADDR,
reg, val);
}
static unsigned char juli_ak4114_read(void *private_data, unsigned char reg)
{
return snd_vt1724_read_i2c((struct snd_ice1712 *)private_data,
AK4114_ADDR, reg);
}
/*
* If SPDIF capture and slaved to SPDIF-IN, setting runtime rate
* to the external rate
*/
static void juli_spdif_in_open(struct snd_ice1712 *ice,
struct snd_pcm_substream *substream)
{
struct juli_spec *spec = ice->spec;
struct snd_pcm_runtime *runtime = substream->runtime;
int rate;
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK ||
!ice->is_spdif_master(ice))
return;
rate = snd_ak4114_external_rate(spec->ak4114);
if (rate >= runtime->hw.rate_min && rate <= runtime->hw.rate_max) {
runtime->hw.rate_min = rate;
runtime->hw.rate_max = rate;
}
}
/*
* AK4358 section
*/
static void juli_akm_lock(struct snd_akm4xxx *ak, int chip)
{
}
static void juli_akm_unlock(struct snd_akm4xxx *ak, int chip)
{
}
static void juli_akm_write(struct snd_akm4xxx *ak, int chip,
unsigned char addr, unsigned char data)
{
struct snd_ice1712 *ice = ak->private_data[0];
if (snd_BUG_ON(chip))
return;
snd_vt1724_write_i2c(ice, AK4358_ADDR, addr, data);
}
/*
* change the rate of envy24HT, AK4358, AK5385
*/
static void juli_akm_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate)
{
unsigned char old, tmp, ak4358_dfs;
unsigned int ak5385_pins, old_gpio, new_gpio;
struct snd_ice1712 *ice = ak->private_data[0];
struct juli_spec *spec = ice->spec;
if (rate == 0) /* no hint - S/PDIF input is master or the new spdif
input rate undetected, simply return */
return;
/* adjust DFS on codecs */
if (rate > 96000) {
ak4358_dfs = 2;
ak5385_pins = GPIO_AK5385A_DFS1 | GPIO_AK5385A_CKS0;
} else if (rate > 48000) {
ak4358_dfs = 1;
ak5385_pins = GPIO_AK5385A_DFS0;
} else {
ak4358_dfs = 0;
ak5385_pins = 0;
}
/* AK5385 first, since it requires cold reset affecting both codecs */
old_gpio = ice->gpio.get_data(ice);
new_gpio = (old_gpio & ~GPIO_AK5385A_MASK) | ak5385_pins;
/* dev_dbg(ice->card->dev, "JULI - ak5385 set_rate_val: new gpio 0x%x\n",
new_gpio); */
ice->gpio.set_data(ice, new_gpio);
/* cold reset */
old = inb(ICEMT1724(ice, AC97_CMD));
outb(old | VT1724_AC97_COLD, ICEMT1724(ice, AC97_CMD));
udelay(1);
outb(old & ~VT1724_AC97_COLD, ICEMT1724(ice, AC97_CMD));
/* AK4358 */
/* set new value, reset DFS */
tmp = snd_akm4xxx_get(ak, 0, 2);
snd_akm4xxx_reset(ak, 1);
tmp = snd_akm4xxx_get(ak, 0, 2);
tmp &= ~(0x03 << 4);
tmp |= ak4358_dfs << 4;
snd_akm4xxx_set(ak, 0, 2, tmp);
snd_akm4xxx_reset(ak, 0);
/* reinit ak4114 */
snd_ak4114_reinit(spec->ak4114);
}
#define AK_DAC(xname, xch) { .name = xname, .num_channels = xch }
#define PCM_VOLUME "PCM Playback Volume"
#define MONITOR_AN_IN_VOLUME "Monitor Analog In Volume"
#define MONITOR_DIG_IN_VOLUME "Monitor Digital In Volume"
#define MONITOR_DIG_OUT_VOLUME "Monitor Digital Out Volume"
static const struct snd_akm4xxx_dac_channel juli_dac[] = {
AK_DAC(PCM_VOLUME, 2),
AK_DAC(MONITOR_AN_IN_VOLUME, 2),
AK_DAC(MONITOR_DIG_OUT_VOLUME, 2),
AK_DAC(MONITOR_DIG_IN_VOLUME, 2),
};
static const struct snd_akm4xxx akm_juli_dac = {
.type = SND_AK4358,
.num_dacs = 8, /* DAC1 - analog out
DAC2 - analog in monitor
DAC3 - digital out monitor
DAC4 - digital in monitor
*/
.ops = {
.lock = juli_akm_lock,
.unlock = juli_akm_unlock,
.write = juli_akm_write,
.set_rate_val = juli_akm_set_rate_val
},
.dac_info = juli_dac,
};
#define juli_mute_info snd_ctl_boolean_mono_info
static int juli_mute_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned int val;
val = ice->gpio.get_data(ice) & (unsigned int) kcontrol->private_value;
if (kcontrol->private_value == GPIO_MUTE_CONTROL)
/* val 0 = signal on */
ucontrol->value.integer.value[0] = (val) ? 0 : 1;
else
/* val 1 = signal on */
ucontrol->value.integer.value[0] = (val) ? 1 : 0;
return 0;
}
static int juli_mute_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned int old_gpio, new_gpio;
old_gpio = ice->gpio.get_data(ice);
if (ucontrol->value.integer.value[0]) {
/* unmute */
if (kcontrol->private_value == GPIO_MUTE_CONTROL) {
/* 0 = signal on */
new_gpio = old_gpio & ~GPIO_MUTE_CONTROL;
/* un-smuting DAC */
snd_akm4xxx_write(ice->akm, 0, 0x01, 0x01);
} else
/* 1 = signal on */
new_gpio = old_gpio |
(unsigned int) kcontrol->private_value;
} else {
/* mute */
if (kcontrol->private_value == GPIO_MUTE_CONTROL) {
/* 1 = signal off */
new_gpio = old_gpio | GPIO_MUTE_CONTROL;
/* smuting DAC */
snd_akm4xxx_write(ice->akm, 0, 0x01, 0x03);
} else
/* 0 = signal off */
new_gpio = old_gpio &
~((unsigned int) kcontrol->private_value);
}
/* dev_dbg(ice->card->dev,
"JULI - mute/unmute: control_value: 0x%x, old_gpio: 0x%x, "
"new_gpio 0x%x\n",
(unsigned int)ucontrol->value.integer.value[0], old_gpio,
new_gpio); */
if (old_gpio != new_gpio) {
ice->gpio.set_data(ice, new_gpio);
return 1;
}
/* no change */
return 0;
}
static const struct snd_kcontrol_new juli_mute_controls[] = {
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Master Playback Switch",
.info = juli_mute_info,
.get = juli_mute_get,
.put = juli_mute_put,
.private_value = GPIO_MUTE_CONTROL,
},
/* Although the following functionality respects the succint NDA'd
* documentation from the card manufacturer, and the same way of
* operation is coded in OSS Juli driver, only Digital Out monitor
* seems to work. Surprisingly, Analog input monitor outputs Digital
* output data. The two are independent, as enabling both doubles
* volume of the monitor sound.
*
* Checking traces on the board suggests the functionality described
* by the manufacturer is correct - I2S from ADC and AK4114
* go to ICE as well as to Xilinx, I2S inputs of DAC2,3,4 (the monitor
* inputs) are fed from Xilinx.
*
* I even checked traces on board and coded a support in driver for
* an alternative possibility - the unused I2S ICE output channels
* switched to HW-IN/SPDIF-IN and providing the monitoring signal to
* the DAC - to no avail. The I2S outputs seem to be unconnected.
*
* The windows driver supports the monitoring correctly.
*/
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Monitor Analog In Switch",
.info = juli_mute_info,
.get = juli_mute_get,
.put = juli_mute_put,
.private_value = GPIO_ANAIN_MONITOR,
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Monitor Digital Out Switch",
.info = juli_mute_info,
.get = juli_mute_get,
.put = juli_mute_put,
.private_value = GPIO_DIGOUT_MONITOR,
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Monitor Digital In Switch",
.info = juli_mute_info,
.get = juli_mute_get,
.put = juli_mute_put,
.private_value = GPIO_DIGIN_MONITOR,
},
};
static const char * const follower_vols[] = {
PCM_VOLUME,
MONITOR_AN_IN_VOLUME,
MONITOR_DIG_IN_VOLUME,
MONITOR_DIG_OUT_VOLUME,
NULL
};
static
DECLARE_TLV_DB_SCALE(juli_master_db_scale, -6350, 50, 1);
static int juli_add_controls(struct snd_ice1712 *ice)
{
struct juli_spec *spec = ice->spec;
int err;
unsigned int i;
struct snd_kcontrol *vmaster;
err = snd_ice1712_akm4xxx_build_controls(ice);
if (err < 0)
return err;
for (i = 0; i < ARRAY_SIZE(juli_mute_controls); i++) {
err = snd_ctl_add(ice->card,
snd_ctl_new1(&juli_mute_controls[i], ice));
if (err < 0)
return err;
}
/* Create virtual master control */
vmaster = snd_ctl_make_virtual_master("Master Playback Volume",
juli_master_db_scale);
if (!vmaster)
return -ENOMEM;
err = snd_ctl_add(ice->card, vmaster);
if (err < 0)
return err;
err = snd_ctl_add_followers(ice->card, vmaster, follower_vols);
if (err < 0)
return err;
/* only capture SPDIF over AK4114 */
return snd_ak4114_build(spec->ak4114, NULL,
ice->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
}
/*
* suspend/resume
* */
#ifdef CONFIG_PM_SLEEP
static int juli_resume(struct snd_ice1712 *ice)
{
struct snd_akm4xxx *ak = ice->akm;
struct juli_spec *spec = ice->spec;
/* akm4358 un-reset, un-mute */
snd_akm4xxx_reset(ak, 0);
/* reinit ak4114 */
snd_ak4114_resume(spec->ak4114);
return 0;
}
static int juli_suspend(struct snd_ice1712 *ice)
{
struct snd_akm4xxx *ak = ice->akm;
struct juli_spec *spec = ice->spec;
/* akm4358 reset and soft-mute */
snd_akm4xxx_reset(ak, 1);
snd_ak4114_suspend(spec->ak4114);
return 0;
}
#endif
/*
* initialize the chip
*/
static inline int juli_is_spdif_master(struct snd_ice1712 *ice)
{
return (ice->gpio.get_data(ice) & GPIO_INTERNAL_CLOCK) ? 0 : 1;
}
static unsigned int juli_get_rate(struct snd_ice1712 *ice)
{
int i;
unsigned char result;
result = ice->gpio.get_data(ice) & GPIO_RATE_MASK;
for (i = 0; i < ARRAY_SIZE(gpio_vals); i++)
if (gpio_vals[i] == result)
return juli_rates[i];
return 0;
}
/* setting new rate */
static void juli_set_rate(struct snd_ice1712 *ice, unsigned int rate)
{
unsigned int old, new;
unsigned char val;
old = ice->gpio.get_data(ice);
new = (old & ~GPIO_RATE_MASK) | get_gpio_val(rate);
/* dev_dbg(ice->card->dev, "JULI - set_rate: old %x, new %x\n",
old & GPIO_RATE_MASK,
new & GPIO_RATE_MASK); */
ice->gpio.set_data(ice, new);
/* switching to external clock - supplied by external circuits */
val = inb(ICEMT1724(ice, RATE));
outb(val | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
}
static inline unsigned char juli_set_mclk(struct snd_ice1712 *ice,
unsigned int rate)
{
/* no change in master clock */
return 0;
}
/* setting clock to external - SPDIF */
static int juli_set_spdif_clock(struct snd_ice1712 *ice, int type)
{
unsigned int old;
old = ice->gpio.get_data(ice);
/* external clock (= 0), multiply 1x, 48kHz */
ice->gpio.set_data(ice, (old & ~GPIO_RATE_MASK) | GPIO_MULTI_1X |
GPIO_FREQ_48KHZ);
return 0;
}
/* Called when ak4114 detects change in the input SPDIF stream */
static void juli_ak4114_change(struct ak4114 *ak4114, unsigned char c0,
unsigned char c1)
{
struct snd_ice1712 *ice = ak4114->change_callback_private;
int rate;
if (ice->is_spdif_master(ice) && c1) {
/* only for SPDIF master mode, rate was changed */
rate = snd_ak4114_external_rate(ak4114);
/* dev_dbg(ice->card->dev, "ak4114 - input rate changed to %d\n",
rate); */
juli_akm_set_rate_val(ice->akm, rate);
}
}
static int juli_init(struct snd_ice1712 *ice)
{
static const unsigned char ak4114_init_vals[] = {
/* AK4117_REG_PWRDN */ AK4114_RST | AK4114_PWN |
AK4114_OCKS0 | AK4114_OCKS1,
/* AK4114_REQ_FORMAT */ AK4114_DIF_I24I2S,
/* AK4114_REG_IO0 */ AK4114_TX1E,
/* AK4114_REG_IO1 */ AK4114_EFH_1024 | AK4114_DIT |
AK4114_IPS(1),
/* AK4114_REG_INT0_MASK */ 0,
/* AK4114_REG_INT1_MASK */ 0
};
static const unsigned char ak4114_init_txcsb[] = {
0x41, 0x02, 0x2c, 0x00, 0x00
};
int err;
struct juli_spec *spec;
struct snd_akm4xxx *ak;
spec = kzalloc(sizeof(*spec), GFP_KERNEL);
if (!spec)
return -ENOMEM;
ice->spec = spec;
err = snd_ak4114_create(ice->card,
juli_ak4114_read,
juli_ak4114_write,
ak4114_init_vals, ak4114_init_txcsb,
ice, &spec->ak4114);
if (err < 0)
return err;
/* callback for codecs rate setting */
spec->ak4114->change_callback = juli_ak4114_change;
spec->ak4114->change_callback_private = ice;
/* AK4114 in Juli can detect external rate correctly */
spec->ak4114->check_flags = 0;
#if 0
/*
* it seems that the analog doughter board detection does not work reliably, so
* force the analog flag; it should be very rare (if ever) to come at Juli@
* used without the analog daughter board
*/
spec->analog = (ice->gpio.get_data(ice) & GPIO_ANALOG_PRESENT) ? 0 : 1;
#else
spec->analog = 1;
#endif
if (spec->analog) {
dev_info(ice->card->dev, "juli@: analog I/O detected\n");
ice->num_total_dacs = 2;
ice->num_total_adcs = 2;
ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
ak = ice->akm;
if (!ak)
return -ENOMEM;
ice->akm_codecs = 1;
err = snd_ice1712_akm4xxx_init(ak, &akm_juli_dac, NULL, ice);
if (err < 0)
return err;
}
/* juli is clocked by Xilinx array */
ice->hw_rates = &juli_rates_info;
ice->is_spdif_master = juli_is_spdif_master;
ice->get_rate = juli_get_rate;
ice->set_rate = juli_set_rate;
ice->set_mclk = juli_set_mclk;
ice->set_spdif_clock = juli_set_spdif_clock;
ice->spdif.ops.open = juli_spdif_in_open;
#ifdef CONFIG_PM_SLEEP
ice->pm_resume = juli_resume;
ice->pm_suspend = juli_suspend;
ice->pm_suspend_enabled = 1;
#endif
return 0;
}
/*
* Juli@ boards don't provide the EEPROM data except for the vendor IDs.
* hence the driver needs to sets up it properly.
*/
static const unsigned char juli_eeprom[] = {
[ICE_EEP2_SYSCONF] = 0x2b, /* clock 512, mpu401, 1xADC, 1xDACs,
SPDIF in */
[ICE_EEP2_ACLINK] = 0x80, /* I2S */
[ICE_EEP2_I2S] = 0xf8, /* vol, 96k, 24bit, 192k */
[ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
[ICE_EEP2_GPIO_DIR] = 0x9f, /* 5, 6:inputs; 7, 4-0 outputs*/
[ICE_EEP2_GPIO_DIR1] = 0xff,
[ICE_EEP2_GPIO_DIR2] = 0x7f,
[ICE_EEP2_GPIO_MASK] = 0x60, /* 5, 6: locked; 7, 4-0 writable */
[ICE_EEP2_GPIO_MASK1] = 0x00, /* 0-7 writable */
[ICE_EEP2_GPIO_MASK2] = 0x7f,
[ICE_EEP2_GPIO_STATE] = GPIO_FREQ_48KHZ | GPIO_MULTI_1X |
GPIO_INTERNAL_CLOCK, /* internal clock, multiple 1x, 48kHz*/
[ICE_EEP2_GPIO_STATE1] = 0x00, /* unmuted */
[ICE_EEP2_GPIO_STATE2] = 0x00,
};
/* entry point */
struct snd_ice1712_card_info snd_vt1724_juli_cards[] = {
{
.subvendor = VT1724_SUBDEVICE_JULI,
.name = "ESI Juli@",
.model = "juli",
.chip_init = juli_init,
.build_controls = juli_add_controls,
.eeprom_size = sizeof(juli_eeprom),
.eeprom_data = juli_eeprom,
},
{ } /* terminator */
};
| linux-master | sound/pci/ice1712/juli.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* ALSA driver for ICEnsemble VT1724 (Envy24HT)
*
* Lowlevel functions for ESI Maya44 cards
*
* Copyright (c) 2009 Takashi Iwai <[email protected]>
* Based on the patches by Rainer Zimmermann <[email protected]>
*/
#include <linux/init.h>
#include <linux/slab.h>
#include <sound/core.h>
#include <sound/control.h>
#include <sound/pcm.h>
#include <sound/tlv.h>
#include "ice1712.h"
#include "envy24ht.h"
#include "maya44.h"
/* WM8776 register indexes */
#define WM8776_REG_HEADPHONE_L 0x00
#define WM8776_REG_HEADPHONE_R 0x01
#define WM8776_REG_HEADPHONE_MASTER 0x02
#define WM8776_REG_DAC_ATTEN_L 0x03
#define WM8776_REG_DAC_ATTEN_R 0x04
#define WM8776_REG_DAC_ATTEN_MASTER 0x05
#define WM8776_REG_DAC_PHASE 0x06
#define WM8776_REG_DAC_CONTROL 0x07
#define WM8776_REG_DAC_MUTE 0x08
#define WM8776_REG_DAC_DEEMPH 0x09
#define WM8776_REG_DAC_IF_CONTROL 0x0a
#define WM8776_REG_ADC_IF_CONTROL 0x0b
#define WM8776_REG_MASTER_MODE_CONTROL 0x0c
#define WM8776_REG_POWERDOWN 0x0d
#define WM8776_REG_ADC_ATTEN_L 0x0e
#define WM8776_REG_ADC_ATTEN_R 0x0f
#define WM8776_REG_ADC_ALC1 0x10
#define WM8776_REG_ADC_ALC2 0x11
#define WM8776_REG_ADC_ALC3 0x12
#define WM8776_REG_ADC_NOISE_GATE 0x13
#define WM8776_REG_ADC_LIMITER 0x14
#define WM8776_REG_ADC_MUX 0x15
#define WM8776_REG_OUTPUT_MUX 0x16
#define WM8776_REG_RESET 0x17
#define WM8776_NUM_REGS 0x18
/* clock ratio identifiers for snd_wm8776_set_rate() */
#define WM8776_CLOCK_RATIO_128FS 0
#define WM8776_CLOCK_RATIO_192FS 1
#define WM8776_CLOCK_RATIO_256FS 2
#define WM8776_CLOCK_RATIO_384FS 3
#define WM8776_CLOCK_RATIO_512FS 4
#define WM8776_CLOCK_RATIO_768FS 5
enum { WM_VOL_HP, WM_VOL_DAC, WM_VOL_ADC, WM_NUM_VOLS };
enum { WM_SW_DAC, WM_SW_BYPASS, WM_NUM_SWITCHES };
struct snd_wm8776 {
unsigned char addr;
unsigned short regs[WM8776_NUM_REGS];
unsigned char volumes[WM_NUM_VOLS][2];
unsigned int switch_bits;
};
struct snd_maya44 {
struct snd_ice1712 *ice;
struct snd_wm8776 wm[2];
struct mutex mutex;
};
/* write the given register and save the data to the cache */
static void wm8776_write(struct snd_ice1712 *ice, struct snd_wm8776 *wm,
unsigned char reg, unsigned short val)
{
/*
* WM8776 registers are up to 9 bits wide, bit 8 is placed in the LSB
* of the address field
*/
snd_vt1724_write_i2c(ice, wm->addr,
(reg << 1) | ((val >> 8) & 1),
val & 0xff);
wm->regs[reg] = val;
}
/*
* update the given register with and/or mask and save the data to the cache
*/
static int wm8776_write_bits(struct snd_ice1712 *ice, struct snd_wm8776 *wm,
unsigned char reg,
unsigned short mask, unsigned short val)
{
val |= wm->regs[reg] & ~mask;
if (val != wm->regs[reg]) {
wm8776_write(ice, wm, reg, val);
return 1;
}
return 0;
}
/*
* WM8776 volume controls
*/
struct maya_vol_info {
unsigned int maxval; /* volume range: 0..maxval */
unsigned char regs[2]; /* left and right registers */
unsigned short mask; /* value mask */
unsigned short offset; /* zero-value offset */
unsigned short mute; /* mute bit */
unsigned short update; /* update bits */
unsigned char mux_bits[2]; /* extra bits for ADC mute */
};
static const struct maya_vol_info vol_info[WM_NUM_VOLS] = {
[WM_VOL_HP] = {
.maxval = 80,
.regs = { WM8776_REG_HEADPHONE_L, WM8776_REG_HEADPHONE_R },
.mask = 0x7f,
.offset = 0x30,
.mute = 0x00,
.update = 0x180, /* update and zero-cross enable */
},
[WM_VOL_DAC] = {
.maxval = 255,
.regs = { WM8776_REG_DAC_ATTEN_L, WM8776_REG_DAC_ATTEN_R },
.mask = 0xff,
.offset = 0x01,
.mute = 0x00,
.update = 0x100, /* zero-cross enable */
},
[WM_VOL_ADC] = {
.maxval = 91,
.regs = { WM8776_REG_ADC_ATTEN_L, WM8776_REG_ADC_ATTEN_R },
.mask = 0xff,
.offset = 0xa5,
.mute = 0xa5,
.update = 0x100, /* update */
.mux_bits = { 0x80, 0x40 }, /* ADCMUX bits */
},
};
/*
* dB tables
*/
/* headphone output: mute, -73..+6db (1db step) */
static const DECLARE_TLV_DB_SCALE(db_scale_hp, -7400, 100, 1);
/* DAC output: mute, -127..0db (0.5db step) */
static const DECLARE_TLV_DB_SCALE(db_scale_dac, -12750, 50, 1);
/* ADC gain: mute, -21..+24db (0.5db step) */
static const DECLARE_TLV_DB_SCALE(db_scale_adc, -2100, 50, 1);
static int maya_vol_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
unsigned int idx = kcontrol->private_value;
const struct maya_vol_info *vol = &vol_info[idx];
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 2;
uinfo->value.integer.min = 0;
uinfo->value.integer.max = vol->maxval;
return 0;
}
static int maya_vol_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_maya44 *chip = snd_kcontrol_chip(kcontrol);
struct snd_wm8776 *wm =
&chip->wm[snd_ctl_get_ioff(kcontrol, &ucontrol->id)];
unsigned int idx = kcontrol->private_value;
mutex_lock(&chip->mutex);
ucontrol->value.integer.value[0] = wm->volumes[idx][0];
ucontrol->value.integer.value[1] = wm->volumes[idx][1];
mutex_unlock(&chip->mutex);
return 0;
}
static int maya_vol_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_maya44 *chip = snd_kcontrol_chip(kcontrol);
struct snd_wm8776 *wm =
&chip->wm[snd_ctl_get_ioff(kcontrol, &ucontrol->id)];
unsigned int idx = kcontrol->private_value;
const struct maya_vol_info *vol = &vol_info[idx];
unsigned int val, data;
int ch, changed = 0;
mutex_lock(&chip->mutex);
for (ch = 0; ch < 2; ch++) {
val = ucontrol->value.integer.value[ch];
if (val > vol->maxval)
val = vol->maxval;
if (val == wm->volumes[idx][ch])
continue;
if (!val)
data = vol->mute;
else
data = (val - 1) + vol->offset;
data |= vol->update;
changed |= wm8776_write_bits(chip->ice, wm, vol->regs[ch],
vol->mask | vol->update, data);
if (vol->mux_bits[ch])
wm8776_write_bits(chip->ice, wm, WM8776_REG_ADC_MUX,
vol->mux_bits[ch],
val ? 0 : vol->mux_bits[ch]);
wm->volumes[idx][ch] = val;
}
mutex_unlock(&chip->mutex);
return changed;
}
/*
* WM8776 switch controls
*/
#define COMPOSE_SW_VAL(idx, reg, mask) ((idx) | ((reg) << 8) | ((mask) << 16))
#define GET_SW_VAL_IDX(val) ((val) & 0xff)
#define GET_SW_VAL_REG(val) (((val) >> 8) & 0xff)
#define GET_SW_VAL_MASK(val) (((val) >> 16) & 0xff)
#define maya_sw_info snd_ctl_boolean_mono_info
static int maya_sw_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_maya44 *chip = snd_kcontrol_chip(kcontrol);
struct snd_wm8776 *wm =
&chip->wm[snd_ctl_get_ioff(kcontrol, &ucontrol->id)];
unsigned int idx = GET_SW_VAL_IDX(kcontrol->private_value);
ucontrol->value.integer.value[0] = (wm->switch_bits >> idx) & 1;
return 0;
}
static int maya_sw_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_maya44 *chip = snd_kcontrol_chip(kcontrol);
struct snd_wm8776 *wm =
&chip->wm[snd_ctl_get_ioff(kcontrol, &ucontrol->id)];
unsigned int idx = GET_SW_VAL_IDX(kcontrol->private_value);
unsigned int mask, val;
int changed;
mutex_lock(&chip->mutex);
mask = 1 << idx;
wm->switch_bits &= ~mask;
val = ucontrol->value.integer.value[0];
if (val)
wm->switch_bits |= mask;
mask = GET_SW_VAL_MASK(kcontrol->private_value);
changed = wm8776_write_bits(chip->ice, wm,
GET_SW_VAL_REG(kcontrol->private_value),
mask, val ? mask : 0);
mutex_unlock(&chip->mutex);
return changed;
}
/*
* GPIO pins (known ones for maya44)
*/
#define GPIO_PHANTOM_OFF 2
#define GPIO_MIC_RELAY 4
#define GPIO_SPDIF_IN_INV 5
#define GPIO_MUST_BE_0 7
/*
* GPIO switch controls
*/
#define COMPOSE_GPIO_VAL(shift, inv) ((shift) | ((inv) << 8))
#define GET_GPIO_VAL_SHIFT(val) ((val) & 0xff)
#define GET_GPIO_VAL_INV(val) (((val) >> 8) & 1)
static int maya_set_gpio_bits(struct snd_ice1712 *ice, unsigned int mask,
unsigned int bits)
{
unsigned int data;
data = snd_ice1712_gpio_read(ice);
if ((data & mask) == bits)
return 0;
snd_ice1712_gpio_write(ice, (data & ~mask) | bits);
return 1;
}
#define maya_gpio_sw_info snd_ctl_boolean_mono_info
static int maya_gpio_sw_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_maya44 *chip = snd_kcontrol_chip(kcontrol);
unsigned int shift = GET_GPIO_VAL_SHIFT(kcontrol->private_value);
unsigned int val;
val = (snd_ice1712_gpio_read(chip->ice) >> shift) & 1;
if (GET_GPIO_VAL_INV(kcontrol->private_value))
val = !val;
ucontrol->value.integer.value[0] = val;
return 0;
}
static int maya_gpio_sw_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_maya44 *chip = snd_kcontrol_chip(kcontrol);
unsigned int shift = GET_GPIO_VAL_SHIFT(kcontrol->private_value);
unsigned int val, mask;
int changed;
mutex_lock(&chip->mutex);
mask = 1 << shift;
val = ucontrol->value.integer.value[0];
if (GET_GPIO_VAL_INV(kcontrol->private_value))
val = !val;
val = val ? mask : 0;
changed = maya_set_gpio_bits(chip->ice, mask, val);
mutex_unlock(&chip->mutex);
return changed;
}
/*
* capture source selection
*/
/* known working input slots (0-4) */
#define MAYA_LINE_IN 1 /* in-2 */
#define MAYA_MIC_IN 3 /* in-4 */
static void wm8776_select_input(struct snd_maya44 *chip, int idx, int line)
{
wm8776_write_bits(chip->ice, &chip->wm[idx], WM8776_REG_ADC_MUX,
0x1f, 1 << line);
}
static int maya_rec_src_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
static const char * const texts[] = { "Line", "Mic" };
return snd_ctl_enum_info(uinfo, 1, ARRAY_SIZE(texts), texts);
}
static int maya_rec_src_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_maya44 *chip = snd_kcontrol_chip(kcontrol);
int sel;
if (snd_ice1712_gpio_read(chip->ice) & (1 << GPIO_MIC_RELAY))
sel = 1;
else
sel = 0;
ucontrol->value.enumerated.item[0] = sel;
return 0;
}
static int maya_rec_src_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_maya44 *chip = snd_kcontrol_chip(kcontrol);
int sel = ucontrol->value.enumerated.item[0];
int changed;
mutex_lock(&chip->mutex);
changed = maya_set_gpio_bits(chip->ice, 1 << GPIO_MIC_RELAY,
sel ? (1 << GPIO_MIC_RELAY) : 0);
wm8776_select_input(chip, 0, sel ? MAYA_MIC_IN : MAYA_LINE_IN);
mutex_unlock(&chip->mutex);
return changed;
}
/*
* Maya44 routing switch settings have different meanings than the standard
* ice1724 switches as defined in snd_vt1724_pro_route_info (ice1724.c).
*/
static int maya_pb_route_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
static const char * const texts[] = {
"PCM Out", /* 0 */
"Input 1", "Input 2", "Input 3", "Input 4"
};
return snd_ctl_enum_info(uinfo, 1, ARRAY_SIZE(texts), texts);
}
static int maya_pb_route_shift(int idx)
{
static const unsigned char shift[10] =
{ 8, 20, 0, 3, 11, 23, 14, 26, 17, 29 };
return shift[idx % 10];
}
static int maya_pb_route_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_maya44 *chip = snd_kcontrol_chip(kcontrol);
int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
ucontrol->value.enumerated.item[0] =
snd_ice1724_get_route_val(chip->ice, maya_pb_route_shift(idx));
return 0;
}
static int maya_pb_route_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_maya44 *chip = snd_kcontrol_chip(kcontrol);
int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
return snd_ice1724_put_route_val(chip->ice,
ucontrol->value.enumerated.item[0],
maya_pb_route_shift(idx));
}
/*
* controls to be added
*/
static const struct snd_kcontrol_new maya_controls[] = {
{
.name = "Crossmix Playback Volume",
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ,
.info = maya_vol_info,
.get = maya_vol_get,
.put = maya_vol_put,
.tlv = { .p = db_scale_hp },
.private_value = WM_VOL_HP,
.count = 2,
},
{
.name = "PCM Playback Volume",
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ,
.info = maya_vol_info,
.get = maya_vol_get,
.put = maya_vol_put,
.tlv = { .p = db_scale_dac },
.private_value = WM_VOL_DAC,
.count = 2,
},
{
.name = "Line Capture Volume",
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ,
.info = maya_vol_info,
.get = maya_vol_get,
.put = maya_vol_put,
.tlv = { .p = db_scale_adc },
.private_value = WM_VOL_ADC,
.count = 2,
},
{
.name = "PCM Playback Switch",
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.info = maya_sw_info,
.get = maya_sw_get,
.put = maya_sw_put,
.private_value = COMPOSE_SW_VAL(WM_SW_DAC,
WM8776_REG_OUTPUT_MUX, 0x01),
.count = 2,
},
{
.name = "Bypass Playback Switch",
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.info = maya_sw_info,
.get = maya_sw_get,
.put = maya_sw_put,
.private_value = COMPOSE_SW_VAL(WM_SW_BYPASS,
WM8776_REG_OUTPUT_MUX, 0x04),
.count = 2,
},
{
.name = "Capture Source",
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.info = maya_rec_src_info,
.get = maya_rec_src_get,
.put = maya_rec_src_put,
},
{
.name = "Mic Phantom Power Switch",
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.info = maya_gpio_sw_info,
.get = maya_gpio_sw_get,
.put = maya_gpio_sw_put,
.private_value = COMPOSE_GPIO_VAL(GPIO_PHANTOM_OFF, 1),
},
{
.name = "SPDIF Capture Switch",
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.info = maya_gpio_sw_info,
.get = maya_gpio_sw_get,
.put = maya_gpio_sw_put,
.private_value = COMPOSE_GPIO_VAL(GPIO_SPDIF_IN_INV, 1),
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "H/W Playback Route",
.info = maya_pb_route_info,
.get = maya_pb_route_get,
.put = maya_pb_route_put,
.count = 4, /* FIXME: do controls 5-9 have any meaning? */
},
};
static int maya44_add_controls(struct snd_ice1712 *ice)
{
int err, i;
for (i = 0; i < ARRAY_SIZE(maya_controls); i++) {
err = snd_ctl_add(ice->card, snd_ctl_new1(&maya_controls[i],
ice->spec));
if (err < 0)
return err;
}
return 0;
}
/*
* initialize a wm8776 chip
*/
static void wm8776_init(struct snd_ice1712 *ice,
struct snd_wm8776 *wm, unsigned int addr)
{
static const unsigned short inits_wm8776[] = {
0x02, 0x100, /* R2: headphone L+R muted + update */
0x05, 0x100, /* R5: DAC output L+R muted + update */
0x06, 0x000, /* R6: DAC output phase normal */
0x07, 0x091, /* R7: DAC enable zero cross detection,
normal output */
0x08, 0x000, /* R8: DAC soft mute off */
0x09, 0x000, /* R9: no deemph, DAC zero detect disabled */
0x0a, 0x022, /* R10: DAC I2C mode, std polarities, 24bit */
0x0b, 0x022, /* R11: ADC I2C mode, std polarities, 24bit,
highpass filter enabled */
0x0c, 0x042, /* R12: ADC+DAC slave, ADC+DAC 44,1kHz */
0x0d, 0x000, /* R13: all power up */
0x0e, 0x100, /* R14: ADC left muted,
enable zero cross detection */
0x0f, 0x100, /* R15: ADC right muted,
enable zero cross detection */
/* R16: ALC...*/
0x11, 0x000, /* R17: disable ALC */
/* R18: ALC...*/
/* R19: noise gate...*/
0x15, 0x000, /* R21: ADC input mux init, mute all inputs */
0x16, 0x001, /* R22: output mux, select DAC */
0xff, 0xff
};
const unsigned short *ptr;
unsigned char reg;
unsigned short data;
wm->addr = addr;
/* enable DAC output; mute bypass, aux & all inputs */
wm->switch_bits = (1 << WM_SW_DAC);
ptr = inits_wm8776;
while (*ptr != 0xff) {
reg = *ptr++;
data = *ptr++;
wm8776_write(ice, wm, reg, data);
}
}
/*
* change the rate on the WM8776 codecs.
* this assumes that the VT17xx's rate is changed by the calling function.
* NOTE: even though the WM8776's are running in slave mode and rate
* selection is automatic, we need to call snd_wm8776_set_rate() here
* to make sure some flags are set correctly.
*/
static void set_rate(struct snd_ice1712 *ice, unsigned int rate)
{
struct snd_maya44 *chip = ice->spec;
unsigned int ratio, adc_ratio, val;
int i;
switch (rate) {
case 192000:
ratio = WM8776_CLOCK_RATIO_128FS;
break;
case 176400:
ratio = WM8776_CLOCK_RATIO_128FS;
break;
case 96000:
ratio = WM8776_CLOCK_RATIO_256FS;
break;
case 88200:
ratio = WM8776_CLOCK_RATIO_384FS;
break;
case 48000:
ratio = WM8776_CLOCK_RATIO_512FS;
break;
case 44100:
ratio = WM8776_CLOCK_RATIO_512FS;
break;
case 32000:
ratio = WM8776_CLOCK_RATIO_768FS;
break;
case 0:
/* no hint - S/PDIF input is master, simply return */
return;
default:
snd_BUG();
return;
}
/*
* this currently sets the same rate for ADC and DAC, but limits
* ADC rate to 256X (96kHz). For 256X mode (96kHz), this sets ADC
* oversampling to 64x, as recommended by WM8776 datasheet.
* Setting the rate is not really necessary in slave mode.
*/
adc_ratio = ratio;
if (adc_ratio < WM8776_CLOCK_RATIO_256FS)
adc_ratio = WM8776_CLOCK_RATIO_256FS;
val = adc_ratio;
if (adc_ratio == WM8776_CLOCK_RATIO_256FS)
val |= 8;
val |= ratio << 4;
mutex_lock(&chip->mutex);
for (i = 0; i < 2; i++)
wm8776_write_bits(ice, &chip->wm[i],
WM8776_REG_MASTER_MODE_CONTROL,
0x180, val);
mutex_unlock(&chip->mutex);
}
/*
* supported sample rates (to override the default one)
*/
static const unsigned int rates[] = {
32000, 44100, 48000, 64000, 88200, 96000, 176400, 192000
};
/* playback rates: 32..192 kHz */
static const struct snd_pcm_hw_constraint_list dac_rates = {
.count = ARRAY_SIZE(rates),
.list = rates,
.mask = 0
};
/*
* chip addresses on I2C bus
*/
static const unsigned char wm8776_addr[2] = {
0x34, 0x36, /* codec 0 & 1 */
};
/*
* initialize the chip
*/
static int maya44_init(struct snd_ice1712 *ice)
{
int i;
struct snd_maya44 *chip;
chip = kzalloc(sizeof(*chip), GFP_KERNEL);
if (!chip)
return -ENOMEM;
mutex_init(&chip->mutex);
chip->ice = ice;
ice->spec = chip;
/* initialise codecs */
ice->num_total_dacs = 4;
ice->num_total_adcs = 4;
ice->akm_codecs = 0;
for (i = 0; i < 2; i++) {
wm8776_init(ice, &chip->wm[i], wm8776_addr[i]);
wm8776_select_input(chip, i, MAYA_LINE_IN);
}
/* set card specific rates */
ice->hw_rates = &dac_rates;
/* register change rate notifier */
ice->gpio.set_pro_rate = set_rate;
/* RDMA1 (2nd input channel) is used for ADC by default */
ice->force_rdma1 = 1;
/* have an own routing control */
ice->own_routing = 1;
return 0;
}
/*
* Maya44 boards don't provide the EEPROM data except for the vendor IDs.
* hence the driver needs to sets up it properly.
*/
static const unsigned char maya44_eeprom[] = {
[ICE_EEP2_SYSCONF] = 0x45,
/* clock xin1=49.152MHz, mpu401, 2 stereo ADCs+DACs */
[ICE_EEP2_ACLINK] = 0x80,
/* I2S */
[ICE_EEP2_I2S] = 0xf8,
/* vol, 96k, 24bit, 192k */
[ICE_EEP2_SPDIF] = 0xc3,
/* enable spdif out, spdif out supp, spdif-in, ext spdif out */
[ICE_EEP2_GPIO_DIR] = 0xff,
[ICE_EEP2_GPIO_DIR1] = 0xff,
[ICE_EEP2_GPIO_DIR2] = 0xff,
[ICE_EEP2_GPIO_MASK] = 0/*0x9f*/,
[ICE_EEP2_GPIO_MASK1] = 0/*0xff*/,
[ICE_EEP2_GPIO_MASK2] = 0/*0x7f*/,
[ICE_EEP2_GPIO_STATE] = (1 << GPIO_PHANTOM_OFF) |
(1 << GPIO_SPDIF_IN_INV),
[ICE_EEP2_GPIO_STATE1] = 0x00,
[ICE_EEP2_GPIO_STATE2] = 0x00,
};
/* entry point */
struct snd_ice1712_card_info snd_vt1724_maya44_cards[] = {
{
.subvendor = VT1724_SUBDEVICE_MAYA44,
.name = "ESI Maya44",
.model = "maya44",
.chip_init = maya44_init,
.build_controls = maya44_add_controls,
.eeprom_size = sizeof(maya44_eeprom),
.eeprom_data = maya44_eeprom,
},
{ } /* terminator */
};
| linux-master | sound/pci/ice1712/maya44.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* ALSA driver for ICEnsemble ICE1712 (Envy24)
*
* Lowlevel functions for M-Audio Delta 1010, 1010E, 44, 66, 66E, Dio2496,
* Audiophile, Digigram VX442
*
* Copyright (c) 2000 Jaroslav Kysela <[email protected]>
*/
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/mutex.h>
#include <sound/core.h>
#include <sound/cs8427.h>
#include <sound/asoundef.h>
#include "ice1712.h"
#include "delta.h"
#define SND_CS8403
#include <sound/cs8403.h>
/*
* CS8427 via SPI mode (for Audiophile), emulated I2C
*/
/* send 8 bits */
static void ap_cs8427_write_byte(struct snd_ice1712 *ice, unsigned char data, unsigned char tmp)
{
int idx;
for (idx = 7; idx >= 0; idx--) {
tmp &= ~(ICE1712_DELTA_AP_DOUT|ICE1712_DELTA_AP_CCLK);
if (data & (1 << idx))
tmp |= ICE1712_DELTA_AP_DOUT;
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
udelay(5);
tmp |= ICE1712_DELTA_AP_CCLK;
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
udelay(5);
}
}
/* read 8 bits */
static unsigned char ap_cs8427_read_byte(struct snd_ice1712 *ice, unsigned char tmp)
{
unsigned char data = 0;
int idx;
for (idx = 7; idx >= 0; idx--) {
tmp &= ~ICE1712_DELTA_AP_CCLK;
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
udelay(5);
if (snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & ICE1712_DELTA_AP_DIN)
data |= 1 << idx;
tmp |= ICE1712_DELTA_AP_CCLK;
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
udelay(5);
}
return data;
}
/* assert chip select */
static unsigned char ap_cs8427_codec_select(struct snd_ice1712 *ice)
{
unsigned char tmp;
tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
switch (ice->eeprom.subvendor) {
case ICE1712_SUBDEVICE_DELTA1010E:
case ICE1712_SUBDEVICE_DELTA1010LT:
tmp &= ~ICE1712_DELTA_1010LT_CS;
tmp |= ICE1712_DELTA_1010LT_CCLK | ICE1712_DELTA_1010LT_CS_CS8427;
break;
case ICE1712_SUBDEVICE_AUDIOPHILE:
case ICE1712_SUBDEVICE_DELTA410:
tmp |= ICE1712_DELTA_AP_CCLK | ICE1712_DELTA_AP_CS_CODEC;
tmp &= ~ICE1712_DELTA_AP_CS_DIGITAL;
break;
case ICE1712_SUBDEVICE_DELTA66E:
tmp |= ICE1712_DELTA_66E_CCLK | ICE1712_DELTA_66E_CS_CHIP_A |
ICE1712_DELTA_66E_CS_CHIP_B;
tmp &= ~ICE1712_DELTA_66E_CS_CS8427;
break;
case ICE1712_SUBDEVICE_VX442:
tmp |= ICE1712_VX442_CCLK | ICE1712_VX442_CODEC_CHIP_A | ICE1712_VX442_CODEC_CHIP_B;
tmp &= ~ICE1712_VX442_CS_DIGITAL;
break;
}
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
udelay(5);
return tmp;
}
/* deassert chip select */
static void ap_cs8427_codec_deassert(struct snd_ice1712 *ice, unsigned char tmp)
{
switch (ice->eeprom.subvendor) {
case ICE1712_SUBDEVICE_DELTA1010E:
case ICE1712_SUBDEVICE_DELTA1010LT:
tmp &= ~ICE1712_DELTA_1010LT_CS;
tmp |= ICE1712_DELTA_1010LT_CS_NONE;
break;
case ICE1712_SUBDEVICE_AUDIOPHILE:
case ICE1712_SUBDEVICE_DELTA410:
tmp |= ICE1712_DELTA_AP_CS_DIGITAL;
break;
case ICE1712_SUBDEVICE_DELTA66E:
tmp |= ICE1712_DELTA_66E_CS_CS8427;
break;
case ICE1712_SUBDEVICE_VX442:
tmp |= ICE1712_VX442_CS_DIGITAL;
break;
}
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
}
/* sequential write */
static int ap_cs8427_sendbytes(struct snd_i2c_device *device, unsigned char *bytes, int count)
{
struct snd_ice1712 *ice = device->bus->private_data;
int res = count;
unsigned char tmp;
mutex_lock(&ice->gpio_mutex);
tmp = ap_cs8427_codec_select(ice);
ap_cs8427_write_byte(ice, (device->addr << 1) | 0, tmp); /* address + write mode */
while (count-- > 0)
ap_cs8427_write_byte(ice, *bytes++, tmp);
ap_cs8427_codec_deassert(ice, tmp);
mutex_unlock(&ice->gpio_mutex);
return res;
}
/* sequential read */
static int ap_cs8427_readbytes(struct snd_i2c_device *device, unsigned char *bytes, int count)
{
struct snd_ice1712 *ice = device->bus->private_data;
int res = count;
unsigned char tmp;
mutex_lock(&ice->gpio_mutex);
tmp = ap_cs8427_codec_select(ice);
ap_cs8427_write_byte(ice, (device->addr << 1) | 1, tmp); /* address + read mode */
while (count-- > 0)
*bytes++ = ap_cs8427_read_byte(ice, tmp);
ap_cs8427_codec_deassert(ice, tmp);
mutex_unlock(&ice->gpio_mutex);
return res;
}
static int ap_cs8427_probeaddr(struct snd_i2c_bus *bus, unsigned short addr)
{
if (addr == 0x10)
return 1;
return -ENOENT;
}
static const struct snd_i2c_ops ap_cs8427_i2c_ops = {
.sendbytes = ap_cs8427_sendbytes,
.readbytes = ap_cs8427_readbytes,
.probeaddr = ap_cs8427_probeaddr,
};
/*
*/
static void snd_ice1712_delta_cs8403_spdif_write(struct snd_ice1712 *ice, unsigned char bits)
{
unsigned char tmp, mask1, mask2;
int idx;
/* send byte to transmitter */
mask1 = ICE1712_DELTA_SPDIF_OUT_STAT_CLOCK;
mask2 = ICE1712_DELTA_SPDIF_OUT_STAT_DATA;
mutex_lock(&ice->gpio_mutex);
tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
for (idx = 7; idx >= 0; idx--) {
tmp &= ~(mask1 | mask2);
if (bits & (1 << idx))
tmp |= mask2;
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
udelay(100);
tmp |= mask1;
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
udelay(100);
}
tmp &= ~mask1;
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
mutex_unlock(&ice->gpio_mutex);
}
static void delta_spdif_default_get(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
{
snd_cs8403_decode_spdif_bits(&ucontrol->value.iec958, ice->spdif.cs8403_bits);
}
static int delta_spdif_default_put(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
{
unsigned int val;
int change;
val = snd_cs8403_encode_spdif_bits(&ucontrol->value.iec958);
spin_lock_irq(&ice->reg_lock);
change = ice->spdif.cs8403_bits != val;
ice->spdif.cs8403_bits = val;
if (change && ice->playback_pro_substream == NULL) {
spin_unlock_irq(&ice->reg_lock);
snd_ice1712_delta_cs8403_spdif_write(ice, val);
} else {
spin_unlock_irq(&ice->reg_lock);
}
return change;
}
static void delta_spdif_stream_get(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
{
snd_cs8403_decode_spdif_bits(&ucontrol->value.iec958, ice->spdif.cs8403_stream_bits);
}
static int delta_spdif_stream_put(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
{
unsigned int val;
int change;
val = snd_cs8403_encode_spdif_bits(&ucontrol->value.iec958);
spin_lock_irq(&ice->reg_lock);
change = ice->spdif.cs8403_stream_bits != val;
ice->spdif.cs8403_stream_bits = val;
if (change && ice->playback_pro_substream != NULL) {
spin_unlock_irq(&ice->reg_lock);
snd_ice1712_delta_cs8403_spdif_write(ice, val);
} else {
spin_unlock_irq(&ice->reg_lock);
}
return change;
}
/*
* AK4524 on Delta 44 and 66 to choose the chip mask
*/
static void delta_ak4524_lock(struct snd_akm4xxx *ak, int chip)
{
struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
struct snd_ice1712 *ice = ak->private_data[0];
snd_ice1712_save_gpio_status(ice);
priv->cs_mask =
priv->cs_addr = chip == 0 ? ICE1712_DELTA_CODEC_CHIP_A :
ICE1712_DELTA_CODEC_CHIP_B;
}
/*
* AK4524 on Delta1010LT to choose the chip address
*/
static void delta1010lt_ak4524_lock(struct snd_akm4xxx *ak, int chip)
{
struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
struct snd_ice1712 *ice = ak->private_data[0];
snd_ice1712_save_gpio_status(ice);
priv->cs_mask = ICE1712_DELTA_1010LT_CS;
priv->cs_addr = chip << 4;
}
/*
* AK4524 on Delta66 rev E to choose the chip address
*/
static void delta66e_ak4524_lock(struct snd_akm4xxx *ak, int chip)
{
struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
struct snd_ice1712 *ice = ak->private_data[0];
snd_ice1712_save_gpio_status(ice);
priv->cs_mask =
priv->cs_addr = chip == 0 ? ICE1712_DELTA_66E_CS_CHIP_A :
ICE1712_DELTA_66E_CS_CHIP_B;
}
/*
* AK4528 on VX442 to choose the chip mask
*/
static void vx442_ak4524_lock(struct snd_akm4xxx *ak, int chip)
{
struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
struct snd_ice1712 *ice = ak->private_data[0];
snd_ice1712_save_gpio_status(ice);
priv->cs_mask =
priv->cs_addr = chip == 0 ? ICE1712_VX442_CODEC_CHIP_A :
ICE1712_VX442_CODEC_CHIP_B;
}
/*
* change the DFS bit according rate for Delta1010
*/
static void delta_1010_set_rate_val(struct snd_ice1712 *ice, unsigned int rate)
{
unsigned char tmp, tmp2;
if (rate == 0) /* no hint - S/PDIF input is master, simply return */
return;
mutex_lock(&ice->gpio_mutex);
tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
tmp2 = tmp & ~ICE1712_DELTA_DFS;
if (rate > 48000)
tmp2 |= ICE1712_DELTA_DFS;
if (tmp != tmp2)
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp2);
mutex_unlock(&ice->gpio_mutex);
}
/*
* change the rate of AK4524 on Delta 44/66, AP, 1010LT
*/
static void delta_ak4524_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate)
{
unsigned char tmp, tmp2;
struct snd_ice1712 *ice = ak->private_data[0];
if (rate == 0) /* no hint - S/PDIF input is master, simply return */
return;
/* check before reset ak4524 to avoid unnecessary clicks */
mutex_lock(&ice->gpio_mutex);
tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
mutex_unlock(&ice->gpio_mutex);
tmp2 = tmp & ~ICE1712_DELTA_DFS;
if (rate > 48000)
tmp2 |= ICE1712_DELTA_DFS;
if (tmp == tmp2)
return;
/* do it again */
snd_akm4xxx_reset(ak, 1);
mutex_lock(&ice->gpio_mutex);
tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & ~ICE1712_DELTA_DFS;
if (rate > 48000)
tmp |= ICE1712_DELTA_DFS;
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
mutex_unlock(&ice->gpio_mutex);
snd_akm4xxx_reset(ak, 0);
}
/*
* change the rate of AK4524 on VX442
*/
static void vx442_ak4524_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate)
{
unsigned char val;
val = (rate > 48000) ? 0x65 : 0x60;
if (snd_akm4xxx_get(ak, 0, 0x02) != val ||
snd_akm4xxx_get(ak, 1, 0x02) != val) {
snd_akm4xxx_reset(ak, 1);
snd_akm4xxx_write(ak, 0, 0x02, val);
snd_akm4xxx_write(ak, 1, 0x02, val);
snd_akm4xxx_reset(ak, 0);
}
}
/*
* SPDIF ops for Delta 1010, Dio, 66
*/
/* open callback */
static void delta_open_spdif(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
{
ice->spdif.cs8403_stream_bits = ice->spdif.cs8403_bits;
}
/* set up */
static void delta_setup_spdif(struct snd_ice1712 *ice, int rate)
{
unsigned long flags;
unsigned int tmp;
int change;
spin_lock_irqsave(&ice->reg_lock, flags);
tmp = ice->spdif.cs8403_stream_bits;
if (tmp & 0x01) /* consumer */
tmp &= (tmp & 0x01) ? ~0x06 : ~0x18;
switch (rate) {
case 32000: tmp |= (tmp & 0x01) ? 0x04 : 0x00; break;
case 44100: tmp |= (tmp & 0x01) ? 0x00 : 0x10; break;
case 48000: tmp |= (tmp & 0x01) ? 0x02 : 0x08; break;
default: tmp |= (tmp & 0x01) ? 0x00 : 0x18; break;
}
change = ice->spdif.cs8403_stream_bits != tmp;
ice->spdif.cs8403_stream_bits = tmp;
spin_unlock_irqrestore(&ice->reg_lock, flags);
if (change)
snd_ctl_notify(ice->card, SNDRV_CTL_EVENT_MASK_VALUE, &ice->spdif.stream_ctl->id);
snd_ice1712_delta_cs8403_spdif_write(ice, tmp);
}
#define snd_ice1712_delta1010lt_wordclock_status_info \
snd_ctl_boolean_mono_info
static int snd_ice1712_delta1010lt_wordclock_status_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
char reg = 0x10; /* CS8427 receiver error register */
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
if (snd_i2c_sendbytes(ice->cs8427, ®, 1) != 1)
dev_err(ice->card->dev,
"unable to send register 0x%x byte to CS8427\n", reg);
snd_i2c_readbytes(ice->cs8427, ®, 1);
ucontrol->value.integer.value[0] = (reg & CS8427_UNLOCK) ? 1 : 0;
return 0;
}
static const struct snd_kcontrol_new snd_ice1712_delta1010lt_wordclock_status =
{
.access = (SNDRV_CTL_ELEM_ACCESS_READ),
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Word Clock Status",
.info = snd_ice1712_delta1010lt_wordclock_status_info,
.get = snd_ice1712_delta1010lt_wordclock_status_get,
};
/*
* initialize the chips on M-Audio cards
*/
static const struct snd_akm4xxx akm_audiophile = {
.type = SND_AK4528,
.num_adcs = 2,
.num_dacs = 2,
.ops = {
.set_rate_val = delta_ak4524_set_rate_val
}
};
static const struct snd_ak4xxx_private akm_audiophile_priv = {
.caddr = 2,
.cif = 0,
.data_mask = ICE1712_DELTA_AP_DOUT,
.clk_mask = ICE1712_DELTA_AP_CCLK,
.cs_mask = ICE1712_DELTA_AP_CS_CODEC,
.cs_addr = ICE1712_DELTA_AP_CS_CODEC,
.cs_none = 0,
.add_flags = ICE1712_DELTA_AP_CS_DIGITAL,
.mask_flags = 0,
};
static const struct snd_akm4xxx akm_delta410 = {
.type = SND_AK4529,
.num_adcs = 2,
.num_dacs = 8,
.ops = {
.set_rate_val = delta_ak4524_set_rate_val
}
};
static const struct snd_ak4xxx_private akm_delta410_priv = {
.caddr = 0,
.cif = 0,
.data_mask = ICE1712_DELTA_AP_DOUT,
.clk_mask = ICE1712_DELTA_AP_CCLK,
.cs_mask = ICE1712_DELTA_AP_CS_CODEC,
.cs_addr = ICE1712_DELTA_AP_CS_CODEC,
.cs_none = 0,
.add_flags = ICE1712_DELTA_AP_CS_DIGITAL,
.mask_flags = 0,
};
static const struct snd_akm4xxx akm_delta1010lt = {
.type = SND_AK4524,
.num_adcs = 8,
.num_dacs = 8,
.ops = {
.lock = delta1010lt_ak4524_lock,
.set_rate_val = delta_ak4524_set_rate_val
}
};
static const struct snd_ak4xxx_private akm_delta1010lt_priv = {
.caddr = 2,
.cif = 0, /* the default level of the CIF pin from AK4524 */
.data_mask = ICE1712_DELTA_1010LT_DOUT,
.clk_mask = ICE1712_DELTA_1010LT_CCLK,
.cs_mask = 0,
.cs_addr = 0, /* set later */
.cs_none = ICE1712_DELTA_1010LT_CS_NONE,
.add_flags = 0,
.mask_flags = 0,
};
static const struct snd_akm4xxx akm_delta66e = {
.type = SND_AK4524,
.num_adcs = 4,
.num_dacs = 4,
.ops = {
.lock = delta66e_ak4524_lock,
.set_rate_val = delta_ak4524_set_rate_val
}
};
static const struct snd_ak4xxx_private akm_delta66e_priv = {
.caddr = 2,
.cif = 0, /* the default level of the CIF pin from AK4524 */
.data_mask = ICE1712_DELTA_66E_DOUT,
.clk_mask = ICE1712_DELTA_66E_CCLK,
.cs_mask = 0,
.cs_addr = 0, /* set later */
.cs_none = 0,
.add_flags = 0,
.mask_flags = 0,
};
static const struct snd_akm4xxx akm_delta44 = {
.type = SND_AK4524,
.num_adcs = 4,
.num_dacs = 4,
.ops = {
.lock = delta_ak4524_lock,
.set_rate_val = delta_ak4524_set_rate_val
}
};
static const struct snd_ak4xxx_private akm_delta44_priv = {
.caddr = 2,
.cif = 0, /* the default level of the CIF pin from AK4524 */
.data_mask = ICE1712_DELTA_CODEC_SERIAL_DATA,
.clk_mask = ICE1712_DELTA_CODEC_SERIAL_CLOCK,
.cs_mask = 0,
.cs_addr = 0, /* set later */
.cs_none = 0,
.add_flags = 0,
.mask_flags = 0,
};
static const struct snd_akm4xxx akm_vx442 = {
.type = SND_AK4524,
.num_adcs = 4,
.num_dacs = 4,
.ops = {
.lock = vx442_ak4524_lock,
.set_rate_val = vx442_ak4524_set_rate_val
}
};
static const struct snd_ak4xxx_private akm_vx442_priv = {
.caddr = 2,
.cif = 0,
.data_mask = ICE1712_VX442_DOUT,
.clk_mask = ICE1712_VX442_CCLK,
.cs_mask = 0,
.cs_addr = 0, /* set later */
.cs_none = 0,
.add_flags = 0,
.mask_flags = 0,
};
#ifdef CONFIG_PM_SLEEP
static int snd_ice1712_delta_resume(struct snd_ice1712 *ice)
{
unsigned char akm_img_bak[AK4XXX_IMAGE_SIZE];
unsigned char akm_vol_bak[AK4XXX_IMAGE_SIZE];
/* init spdif */
switch (ice->eeprom.subvendor) {
case ICE1712_SUBDEVICE_AUDIOPHILE:
case ICE1712_SUBDEVICE_DELTA410:
case ICE1712_SUBDEVICE_DELTA1010E:
case ICE1712_SUBDEVICE_DELTA1010LT:
case ICE1712_SUBDEVICE_VX442:
case ICE1712_SUBDEVICE_DELTA66E:
snd_cs8427_init(ice->i2c, ice->cs8427);
break;
case ICE1712_SUBDEVICE_DELTA1010:
case ICE1712_SUBDEVICE_MEDIASTATION:
/* nothing */
break;
case ICE1712_SUBDEVICE_DELTADIO2496:
case ICE1712_SUBDEVICE_DELTA66:
/* Set spdif defaults */
snd_ice1712_delta_cs8403_spdif_write(ice, ice->spdif.cs8403_bits);
break;
}
/* init codec and restore registers */
if (ice->akm_codecs) {
memcpy(akm_img_bak, ice->akm->images, sizeof(akm_img_bak));
memcpy(akm_vol_bak, ice->akm->volumes, sizeof(akm_vol_bak));
snd_akm4xxx_init(ice->akm);
memcpy(ice->akm->images, akm_img_bak, sizeof(akm_img_bak));
memcpy(ice->akm->volumes, akm_vol_bak, sizeof(akm_vol_bak));
snd_akm4xxx_reset(ice->akm, 0);
}
return 0;
}
static int snd_ice1712_delta_suspend(struct snd_ice1712 *ice)
{
if (ice->akm_codecs) /* reset & mute codec */
snd_akm4xxx_reset(ice->akm, 1);
return 0;
}
#endif
static int snd_ice1712_delta_init(struct snd_ice1712 *ice)
{
int err;
struct snd_akm4xxx *ak;
unsigned char tmp;
if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DELTA1010 &&
ice->eeprom.gpiodir == 0x7b)
ice->eeprom.subvendor = ICE1712_SUBDEVICE_DELTA1010E;
if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DELTA66 &&
ice->eeprom.gpiodir == 0xfb)
ice->eeprom.subvendor = ICE1712_SUBDEVICE_DELTA66E;
/* determine I2C, DACs and ADCs */
switch (ice->eeprom.subvendor) {
case ICE1712_SUBDEVICE_AUDIOPHILE:
ice->num_total_dacs = 2;
ice->num_total_adcs = 2;
break;
case ICE1712_SUBDEVICE_DELTA410:
ice->num_total_dacs = 8;
ice->num_total_adcs = 2;
break;
case ICE1712_SUBDEVICE_DELTA44:
case ICE1712_SUBDEVICE_DELTA66:
ice->num_total_dacs = ice->omni ? 8 : 4;
ice->num_total_adcs = ice->omni ? 8 : 4;
break;
case ICE1712_SUBDEVICE_DELTA1010:
case ICE1712_SUBDEVICE_DELTA1010E:
case ICE1712_SUBDEVICE_DELTA1010LT:
case ICE1712_SUBDEVICE_MEDIASTATION:
case ICE1712_SUBDEVICE_EDIROLDA2496:
ice->num_total_dacs = 8;
ice->num_total_adcs = 8;
break;
case ICE1712_SUBDEVICE_DELTADIO2496:
ice->num_total_dacs = 4; /* two AK4324 codecs */
break;
case ICE1712_SUBDEVICE_VX442:
case ICE1712_SUBDEVICE_DELTA66E: /* omni not supported yet */
ice->num_total_dacs = 4;
ice->num_total_adcs = 4;
break;
}
#ifdef CONFIG_PM_SLEEP
ice->pm_resume = snd_ice1712_delta_resume;
ice->pm_suspend = snd_ice1712_delta_suspend;
ice->pm_suspend_enabled = 1;
#endif
/* initialize the SPI clock to high */
tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
tmp |= ICE1712_DELTA_AP_CCLK;
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
udelay(5);
/* initialize spdif */
switch (ice->eeprom.subvendor) {
case ICE1712_SUBDEVICE_AUDIOPHILE:
case ICE1712_SUBDEVICE_DELTA410:
case ICE1712_SUBDEVICE_DELTA1010E:
case ICE1712_SUBDEVICE_DELTA1010LT:
case ICE1712_SUBDEVICE_VX442:
case ICE1712_SUBDEVICE_DELTA66E:
err = snd_i2c_bus_create(ice->card, "ICE1712 GPIO 1", NULL, &ice->i2c);
if (err < 0) {
dev_err(ice->card->dev, "unable to create I2C bus\n");
return err;
}
ice->i2c->private_data = ice;
ice->i2c->ops = &ap_cs8427_i2c_ops;
err = snd_ice1712_init_cs8427(ice, CS8427_BASE_ADDR);
if (err < 0)
return err;
break;
case ICE1712_SUBDEVICE_DELTA1010:
case ICE1712_SUBDEVICE_MEDIASTATION:
ice->gpio.set_pro_rate = delta_1010_set_rate_val;
break;
case ICE1712_SUBDEVICE_DELTADIO2496:
ice->gpio.set_pro_rate = delta_1010_set_rate_val;
fallthrough;
case ICE1712_SUBDEVICE_DELTA66:
ice->spdif.ops.open = delta_open_spdif;
ice->spdif.ops.setup_rate = delta_setup_spdif;
ice->spdif.ops.default_get = delta_spdif_default_get;
ice->spdif.ops.default_put = delta_spdif_default_put;
ice->spdif.ops.stream_get = delta_spdif_stream_get;
ice->spdif.ops.stream_put = delta_spdif_stream_put;
/* Set spdif defaults */
snd_ice1712_delta_cs8403_spdif_write(ice, ice->spdif.cs8403_bits);
break;
}
/* no analog? */
switch (ice->eeprom.subvendor) {
case ICE1712_SUBDEVICE_DELTA1010:
case ICE1712_SUBDEVICE_DELTA1010E:
case ICE1712_SUBDEVICE_DELTADIO2496:
case ICE1712_SUBDEVICE_MEDIASTATION:
return 0;
}
/* second stage of initialization, analog parts and others */
ak = ice->akm = kmalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
if (! ak)
return -ENOMEM;
ice->akm_codecs = 1;
switch (ice->eeprom.subvendor) {
case ICE1712_SUBDEVICE_AUDIOPHILE:
err = snd_ice1712_akm4xxx_init(ak, &akm_audiophile, &akm_audiophile_priv, ice);
break;
case ICE1712_SUBDEVICE_DELTA410:
err = snd_ice1712_akm4xxx_init(ak, &akm_delta410, &akm_delta410_priv, ice);
break;
case ICE1712_SUBDEVICE_DELTA1010LT:
case ICE1712_SUBDEVICE_EDIROLDA2496:
err = snd_ice1712_akm4xxx_init(ak, &akm_delta1010lt, &akm_delta1010lt_priv, ice);
break;
case ICE1712_SUBDEVICE_DELTA66:
case ICE1712_SUBDEVICE_DELTA44:
err = snd_ice1712_akm4xxx_init(ak, &akm_delta44, &akm_delta44_priv, ice);
break;
case ICE1712_SUBDEVICE_VX442:
err = snd_ice1712_akm4xxx_init(ak, &akm_vx442, &akm_vx442_priv, ice);
break;
case ICE1712_SUBDEVICE_DELTA66E:
err = snd_ice1712_akm4xxx_init(ak, &akm_delta66e, &akm_delta66e_priv, ice);
break;
default:
snd_BUG();
return -EINVAL;
}
return err;
}
/*
* additional controls for M-Audio cards
*/
static const struct snd_kcontrol_new snd_ice1712_delta1010_wordclock_select =
ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Sync", 0, ICE1712_DELTA_WORD_CLOCK_SELECT, 1, 0);
static const struct snd_kcontrol_new snd_ice1712_delta1010lt_wordclock_select =
ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Sync", 0, ICE1712_DELTA_1010LT_WORDCLOCK, 0, 0);
static const struct snd_kcontrol_new snd_ice1712_delta1010_wordclock_status =
ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Status", 0, ICE1712_DELTA_WORD_CLOCK_STATUS, 1, SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE);
static const struct snd_kcontrol_new snd_ice1712_deltadio2496_spdif_in_select =
ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "IEC958 Input Optical", 0, ICE1712_DELTA_SPDIF_INPUT_SELECT, 0, 0);
static const struct snd_kcontrol_new snd_ice1712_delta_spdif_in_status =
ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Delta IEC958 Input Status", 0, ICE1712_DELTA_SPDIF_IN_STAT, 1, SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE);
static int snd_ice1712_delta_add_controls(struct snd_ice1712 *ice)
{
int err;
/* 1010 and dio specific controls */
switch (ice->eeprom.subvendor) {
case ICE1712_SUBDEVICE_DELTA1010:
case ICE1712_SUBDEVICE_MEDIASTATION:
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010_wordclock_select, ice));
if (err < 0)
return err;
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010_wordclock_status, ice));
if (err < 0)
return err;
break;
case ICE1712_SUBDEVICE_DELTADIO2496:
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_deltadio2496_spdif_in_select, ice));
if (err < 0)
return err;
break;
case ICE1712_SUBDEVICE_DELTA1010E:
case ICE1712_SUBDEVICE_DELTA1010LT:
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010lt_wordclock_select, ice));
if (err < 0)
return err;
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010lt_wordclock_status, ice));
if (err < 0)
return err;
break;
}
/* normal spdif controls */
switch (ice->eeprom.subvendor) {
case ICE1712_SUBDEVICE_DELTA1010:
case ICE1712_SUBDEVICE_DELTADIO2496:
case ICE1712_SUBDEVICE_DELTA66:
case ICE1712_SUBDEVICE_MEDIASTATION:
err = snd_ice1712_spdif_build_controls(ice);
if (err < 0)
return err;
break;
}
/* spdif status in */
switch (ice->eeprom.subvendor) {
case ICE1712_SUBDEVICE_DELTA1010:
case ICE1712_SUBDEVICE_DELTADIO2496:
case ICE1712_SUBDEVICE_DELTA66:
case ICE1712_SUBDEVICE_MEDIASTATION:
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta_spdif_in_status, ice));
if (err < 0)
return err;
break;
}
/* ak4524 controls */
switch (ice->eeprom.subvendor) {
case ICE1712_SUBDEVICE_DELTA1010LT:
case ICE1712_SUBDEVICE_AUDIOPHILE:
case ICE1712_SUBDEVICE_DELTA410:
case ICE1712_SUBDEVICE_DELTA44:
case ICE1712_SUBDEVICE_DELTA66:
case ICE1712_SUBDEVICE_VX442:
case ICE1712_SUBDEVICE_DELTA66E:
case ICE1712_SUBDEVICE_EDIROLDA2496:
err = snd_ice1712_akm4xxx_build_controls(ice);
if (err < 0)
return err;
break;
}
return 0;
}
/* entry point */
struct snd_ice1712_card_info snd_ice1712_delta_cards[] = {
{
.subvendor = ICE1712_SUBDEVICE_DELTA1010,
.name = "M Audio Delta 1010",
.model = "delta1010",
.chip_init = snd_ice1712_delta_init,
.build_controls = snd_ice1712_delta_add_controls,
},
{
.subvendor = ICE1712_SUBDEVICE_DELTADIO2496,
.name = "M Audio Delta DiO 2496",
.model = "dio2496",
.chip_init = snd_ice1712_delta_init,
.build_controls = snd_ice1712_delta_add_controls,
.no_mpu401 = 1,
},
{
.subvendor = ICE1712_SUBDEVICE_DELTA66,
.name = "M Audio Delta 66",
.model = "delta66",
.chip_init = snd_ice1712_delta_init,
.build_controls = snd_ice1712_delta_add_controls,
.no_mpu401 = 1,
},
{
.subvendor = ICE1712_SUBDEVICE_DELTA44,
.name = "M Audio Delta 44",
.model = "delta44",
.chip_init = snd_ice1712_delta_init,
.build_controls = snd_ice1712_delta_add_controls,
.no_mpu401 = 1,
},
{
.subvendor = ICE1712_SUBDEVICE_AUDIOPHILE,
.name = "M Audio Audiophile 24/96",
.model = "audiophile",
.chip_init = snd_ice1712_delta_init,
.build_controls = snd_ice1712_delta_add_controls,
},
{
.subvendor = ICE1712_SUBDEVICE_DELTA410,
.name = "M Audio Delta 410",
.model = "delta410",
.chip_init = snd_ice1712_delta_init,
.build_controls = snd_ice1712_delta_add_controls,
},
{
.subvendor = ICE1712_SUBDEVICE_DELTA1010LT,
.name = "M Audio Delta 1010LT",
.model = "delta1010lt",
.chip_init = snd_ice1712_delta_init,
.build_controls = snd_ice1712_delta_add_controls,
},
{
.subvendor = ICE1712_SUBDEVICE_VX442,
.name = "Digigram VX442",
.model = "vx442",
.chip_init = snd_ice1712_delta_init,
.build_controls = snd_ice1712_delta_add_controls,
.no_mpu401 = 1,
},
{
.subvendor = ICE1712_SUBDEVICE_MEDIASTATION,
.name = "Lionstracs Mediastation",
.model = "mediastation",
.chip_init = snd_ice1712_delta_init,
.build_controls = snd_ice1712_delta_add_controls,
},
{
.subvendor = ICE1712_SUBDEVICE_EDIROLDA2496,
.name = "Edirol DA2496",
.model = "da2496",
.chip_init = snd_ice1712_delta_init,
.build_controls = snd_ice1712_delta_add_controls,
},
{ } /* terminator */
};
| linux-master | sound/pci/ice1712/delta.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* ALSA driver for ICEnsemble ICE1712 (Envy24)
*
* Lowlevel functions for M-Audio Audiophile 192, Revolution 7.1 and 5.1
*
* Copyright (c) 2003 Takashi Iwai <[email protected]>
*/
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <sound/core.h>
#include "ice1712.h"
#include "envy24ht.h"
#include "revo.h"
/* a non-standard I2C device for revo51 */
struct revo51_spec {
struct snd_i2c_device *dev;
struct snd_pt2258 *pt2258;
struct ak4114 *ak4114;
};
static void revo_i2s_mclk_changed(struct snd_ice1712 *ice)
{
/* assert PRST# to converters; MT05 bit 7 */
outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
mdelay(5);
/* deassert PRST# */
outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
}
/*
* change the rate of Envy24HT, AK4355 and AK4381
*/
static void revo_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate)
{
unsigned char old, tmp, dfs;
int reg, shift;
if (rate == 0) /* no hint - S/PDIF input is master, simply return */
return;
/* adjust DFS on codecs */
if (rate > 96000)
dfs = 2;
else if (rate > 48000)
dfs = 1;
else
dfs = 0;
if (ak->type == SND_AK4355 || ak->type == SND_AK4358) {
reg = 2;
shift = 4;
} else {
reg = 1;
shift = 3;
}
tmp = snd_akm4xxx_get(ak, 0, reg);
old = (tmp >> shift) & 0x03;
if (old == dfs)
return;
/* reset DFS */
snd_akm4xxx_reset(ak, 1);
tmp = snd_akm4xxx_get(ak, 0, reg);
tmp &= ~(0x03 << shift);
tmp |= dfs << shift;
/* snd_akm4xxx_write(ak, 0, reg, tmp); */
snd_akm4xxx_set(ak, 0, reg, tmp); /* value is written in reset(0) */
snd_akm4xxx_reset(ak, 0);
}
/*
* I2C access to the PT2258 volume controller on GPIO 6/7 (Revolution 5.1)
*/
static void revo_i2c_start(struct snd_i2c_bus *bus)
{
struct snd_ice1712 *ice = bus->private_data;
snd_ice1712_save_gpio_status(ice);
}
static void revo_i2c_stop(struct snd_i2c_bus *bus)
{
struct snd_ice1712 *ice = bus->private_data;
snd_ice1712_restore_gpio_status(ice);
}
static void revo_i2c_direction(struct snd_i2c_bus *bus, int clock, int data)
{
struct snd_ice1712 *ice = bus->private_data;
unsigned int mask, val;
val = 0;
if (clock)
val |= VT1724_REVO_I2C_CLOCK; /* write SCL */
if (data)
val |= VT1724_REVO_I2C_DATA; /* write SDA */
mask = VT1724_REVO_I2C_CLOCK | VT1724_REVO_I2C_DATA;
ice->gpio.direction &= ~mask;
ice->gpio.direction |= val;
snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
snd_ice1712_gpio_set_mask(ice, ~mask);
}
static void revo_i2c_setlines(struct snd_i2c_bus *bus, int clk, int data)
{
struct snd_ice1712 *ice = bus->private_data;
unsigned int val = 0;
if (clk)
val |= VT1724_REVO_I2C_CLOCK;
if (data)
val |= VT1724_REVO_I2C_DATA;
snd_ice1712_gpio_write_bits(ice,
VT1724_REVO_I2C_DATA |
VT1724_REVO_I2C_CLOCK, val);
udelay(5);
}
static int revo_i2c_getdata(struct snd_i2c_bus *bus, int ack)
{
struct snd_ice1712 *ice = bus->private_data;
int bit;
if (ack)
udelay(5);
bit = snd_ice1712_gpio_read_bits(ice, VT1724_REVO_I2C_DATA) ? 1 : 0;
return bit;
}
static struct snd_i2c_bit_ops revo51_bit_ops = {
.start = revo_i2c_start,
.stop = revo_i2c_stop,
.direction = revo_i2c_direction,
.setlines = revo_i2c_setlines,
.getdata = revo_i2c_getdata,
};
static int revo51_i2c_init(struct snd_ice1712 *ice,
struct snd_pt2258 *pt)
{
struct revo51_spec *spec;
int err;
spec = kzalloc(sizeof(*spec), GFP_KERNEL);
if (!spec)
return -ENOMEM;
ice->spec = spec;
/* create the I2C bus */
err = snd_i2c_bus_create(ice->card, "ICE1724 GPIO6", NULL, &ice->i2c);
if (err < 0)
return err;
ice->i2c->private_data = ice;
ice->i2c->hw_ops.bit = &revo51_bit_ops;
/* create the I2C device */
err = snd_i2c_device_create(ice->i2c, "PT2258", 0x40, &spec->dev);
if (err < 0)
return err;
pt->card = ice->card;
pt->i2c_bus = ice->i2c;
pt->i2c_dev = spec->dev;
spec->pt2258 = pt;
snd_pt2258_reset(pt);
return 0;
}
/*
* initialize the chips on M-Audio Revolution cards
*/
#define AK_DAC(xname,xch) { .name = xname, .num_channels = xch }
static const struct snd_akm4xxx_dac_channel revo71_front[] = {
{
.name = "PCM Playback Volume",
.num_channels = 2,
/* front channels DAC supports muting */
.switch_name = "PCM Playback Switch",
},
};
static const struct snd_akm4xxx_dac_channel revo71_surround[] = {
AK_DAC("PCM Center Playback Volume", 1),
AK_DAC("PCM LFE Playback Volume", 1),
AK_DAC("PCM Side Playback Volume", 2),
AK_DAC("PCM Rear Playback Volume", 2),
};
static const struct snd_akm4xxx_dac_channel revo51_dac[] = {
AK_DAC("PCM Playback Volume", 2),
AK_DAC("PCM Center Playback Volume", 1),
AK_DAC("PCM LFE Playback Volume", 1),
AK_DAC("PCM Rear Playback Volume", 2),
AK_DAC("PCM Headphone Volume", 2),
};
static const char *revo51_adc_input_names[] = {
"Mic",
"Line",
"CD",
NULL
};
static const struct snd_akm4xxx_adc_channel revo51_adc[] = {
{
.name = "PCM Capture Volume",
.switch_name = "PCM Capture Switch",
.num_channels = 2,
.input_names = revo51_adc_input_names
},
};
static const struct snd_akm4xxx akm_revo_front = {
.type = SND_AK4381,
.num_dacs = 2,
.ops = {
.set_rate_val = revo_set_rate_val
},
.dac_info = revo71_front,
};
static const struct snd_ak4xxx_private akm_revo_front_priv = {
.caddr = 1,
.cif = 0,
.data_mask = VT1724_REVO_CDOUT,
.clk_mask = VT1724_REVO_CCLK,
.cs_mask = VT1724_REVO_CS0 | VT1724_REVO_CS1 | VT1724_REVO_CS2,
.cs_addr = VT1724_REVO_CS0 | VT1724_REVO_CS2,
.cs_none = VT1724_REVO_CS0 | VT1724_REVO_CS1 | VT1724_REVO_CS2,
.add_flags = VT1724_REVO_CCLK, /* high at init */
.mask_flags = 0,
};
static const struct snd_akm4xxx akm_revo_surround = {
.type = SND_AK4355,
.idx_offset = 1,
.num_dacs = 6,
.ops = {
.set_rate_val = revo_set_rate_val
},
.dac_info = revo71_surround,
};
static const struct snd_ak4xxx_private akm_revo_surround_priv = {
.caddr = 3,
.cif = 0,
.data_mask = VT1724_REVO_CDOUT,
.clk_mask = VT1724_REVO_CCLK,
.cs_mask = VT1724_REVO_CS0 | VT1724_REVO_CS1 | VT1724_REVO_CS2,
.cs_addr = VT1724_REVO_CS0 | VT1724_REVO_CS1,
.cs_none = VT1724_REVO_CS0 | VT1724_REVO_CS1 | VT1724_REVO_CS2,
.add_flags = VT1724_REVO_CCLK, /* high at init */
.mask_flags = 0,
};
static const struct snd_akm4xxx akm_revo51 = {
.type = SND_AK4358,
.num_dacs = 8,
.ops = {
.set_rate_val = revo_set_rate_val
},
.dac_info = revo51_dac,
};
static const struct snd_ak4xxx_private akm_revo51_priv = {
.caddr = 2,
.cif = 0,
.data_mask = VT1724_REVO_CDOUT,
.clk_mask = VT1724_REVO_CCLK,
.cs_mask = VT1724_REVO_CS0 | VT1724_REVO_CS1,
.cs_addr = VT1724_REVO_CS1,
.cs_none = VT1724_REVO_CS0 | VT1724_REVO_CS1,
.add_flags = VT1724_REVO_CCLK, /* high at init */
.mask_flags = 0,
};
static const struct snd_akm4xxx akm_revo51_adc = {
.type = SND_AK5365,
.num_adcs = 2,
.adc_info = revo51_adc,
};
static const struct snd_ak4xxx_private akm_revo51_adc_priv = {
.caddr = 2,
.cif = 0,
.data_mask = VT1724_REVO_CDOUT,
.clk_mask = VT1724_REVO_CCLK,
.cs_mask = VT1724_REVO_CS0 | VT1724_REVO_CS1,
.cs_addr = VT1724_REVO_CS0,
.cs_none = VT1724_REVO_CS0 | VT1724_REVO_CS1,
.add_flags = VT1724_REVO_CCLK, /* high at init */
.mask_flags = 0,
};
static struct snd_pt2258 ptc_revo51_volume;
/* AK4358 for AP192 DAC, AK5385A for ADC */
static void ap192_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate)
{
struct snd_ice1712 *ice = ak->private_data[0];
int dfs;
revo_set_rate_val(ak, rate);
/* reset CKS */
snd_ice1712_gpio_write_bits(ice, 1 << 8, rate > 96000 ? 1 << 8 : 0);
/* reset DFS pins of AK5385A for ADC, too */
if (rate > 96000)
dfs = 2;
else if (rate > 48000)
dfs = 1;
else
dfs = 0;
snd_ice1712_gpio_write_bits(ice, 3 << 9, dfs << 9);
/* reset ADC */
snd_ice1712_gpio_write_bits(ice, 1 << 11, 0);
snd_ice1712_gpio_write_bits(ice, 1 << 11, 1 << 11);
}
static const struct snd_akm4xxx_dac_channel ap192_dac[] = {
AK_DAC("PCM Playback Volume", 2)
};
static const struct snd_akm4xxx akm_ap192 = {
.type = SND_AK4358,
.num_dacs = 2,
.ops = {
.set_rate_val = ap192_set_rate_val
},
.dac_info = ap192_dac,
};
static const struct snd_ak4xxx_private akm_ap192_priv = {
.caddr = 2,
.cif = 0,
.data_mask = VT1724_REVO_CDOUT,
.clk_mask = VT1724_REVO_CCLK,
.cs_mask = VT1724_REVO_CS0 | VT1724_REVO_CS3,
.cs_addr = VT1724_REVO_CS3,
.cs_none = VT1724_REVO_CS0 | VT1724_REVO_CS3,
.add_flags = VT1724_REVO_CCLK, /* high at init */
.mask_flags = 0,
};
/* AK4114 support on Audiophile 192 */
/* CDTO (pin 32) -- GPIO2 pin 52
* CDTI (pin 33) -- GPIO3 pin 53 (shared with AK4358)
* CCLK (pin 34) -- GPIO1 pin 51 (shared with AK4358)
* CSN (pin 35) -- GPIO7 pin 59
*/
#define AK4114_ADDR 0x00
static void write_data(struct snd_ice1712 *ice, unsigned int gpio,
unsigned int data, int idx)
{
for (; idx >= 0; idx--) {
/* drop clock */
gpio &= ~VT1724_REVO_CCLK;
snd_ice1712_gpio_write(ice, gpio);
udelay(1);
/* set data */
if (data & (1 << idx))
gpio |= VT1724_REVO_CDOUT;
else
gpio &= ~VT1724_REVO_CDOUT;
snd_ice1712_gpio_write(ice, gpio);
udelay(1);
/* raise clock */
gpio |= VT1724_REVO_CCLK;
snd_ice1712_gpio_write(ice, gpio);
udelay(1);
}
}
static unsigned char read_data(struct snd_ice1712 *ice, unsigned int gpio,
int idx)
{
unsigned char data = 0;
for (; idx >= 0; idx--) {
/* drop clock */
gpio &= ~VT1724_REVO_CCLK;
snd_ice1712_gpio_write(ice, gpio);
udelay(1);
/* read data */
if (snd_ice1712_gpio_read(ice) & VT1724_REVO_CDIN)
data |= (1 << idx);
udelay(1);
/* raise clock */
gpio |= VT1724_REVO_CCLK;
snd_ice1712_gpio_write(ice, gpio);
udelay(1);
}
return data;
}
static unsigned int ap192_4wire_start(struct snd_ice1712 *ice)
{
unsigned int tmp;
snd_ice1712_save_gpio_status(ice);
tmp = snd_ice1712_gpio_read(ice);
tmp |= VT1724_REVO_CCLK; /* high at init */
tmp |= VT1724_REVO_CS0;
tmp &= ~VT1724_REVO_CS3;
snd_ice1712_gpio_write(ice, tmp);
udelay(1);
return tmp;
}
static void ap192_4wire_finish(struct snd_ice1712 *ice, unsigned int tmp)
{
tmp |= VT1724_REVO_CS3;
tmp |= VT1724_REVO_CS0;
snd_ice1712_gpio_write(ice, tmp);
udelay(1);
snd_ice1712_restore_gpio_status(ice);
}
static void ap192_ak4114_write(void *private_data, unsigned char addr,
unsigned char data)
{
struct snd_ice1712 *ice = private_data;
unsigned int tmp, addrdata;
tmp = ap192_4wire_start(ice);
addrdata = (AK4114_ADDR << 6) | 0x20 | (addr & 0x1f);
addrdata = (addrdata << 8) | data;
write_data(ice, tmp, addrdata, 15);
ap192_4wire_finish(ice, tmp);
}
static unsigned char ap192_ak4114_read(void *private_data, unsigned char addr)
{
struct snd_ice1712 *ice = private_data;
unsigned int tmp;
unsigned char data;
tmp = ap192_4wire_start(ice);
write_data(ice, tmp, (AK4114_ADDR << 6) | (addr & 0x1f), 7);
data = read_data(ice, tmp, 7);
ap192_4wire_finish(ice, tmp);
return data;
}
static int ap192_ak4114_init(struct snd_ice1712 *ice)
{
static const unsigned char ak4114_init_vals[] = {
AK4114_RST | AK4114_PWN | AK4114_OCKS0,
AK4114_DIF_I24I2S,
AK4114_TX1E,
AK4114_EFH_1024 | AK4114_DIT | AK4114_IPS(0),
0,
0
};
static const unsigned char ak4114_init_txcsb[] = {
0x41, 0x02, 0x2c, 0x00, 0x00
};
int err;
struct revo51_spec *spec;
spec = kzalloc(sizeof(*spec), GFP_KERNEL);
if (!spec)
return -ENOMEM;
ice->spec = spec;
err = snd_ak4114_create(ice->card,
ap192_ak4114_read,
ap192_ak4114_write,
ak4114_init_vals, ak4114_init_txcsb,
ice, &spec->ak4114);
if (err < 0)
return err;
/* AK4114 in Revo cannot detect external rate correctly.
* No reason to stop capture stream due to incorrect checks */
spec->ak4114->check_flags = AK4114_CHECK_NO_RATE;
return 0;
}
static int revo_init(struct snd_ice1712 *ice)
{
struct snd_akm4xxx *ak;
int err;
/* determine I2C, DACs and ADCs */
switch (ice->eeprom.subvendor) {
case VT1724_SUBDEVICE_REVOLUTION71:
ice->num_total_dacs = 8;
ice->num_total_adcs = 2;
ice->gpio.i2s_mclk_changed = revo_i2s_mclk_changed;
break;
case VT1724_SUBDEVICE_REVOLUTION51:
ice->num_total_dacs = 8;
ice->num_total_adcs = 2;
break;
case VT1724_SUBDEVICE_AUDIOPHILE192:
ice->num_total_dacs = 2;
ice->num_total_adcs = 2;
break;
default:
snd_BUG();
return -EINVAL;
}
/* second stage of initialization, analog parts and others */
ak = ice->akm = kcalloc(2, sizeof(struct snd_akm4xxx), GFP_KERNEL);
if (! ak)
return -ENOMEM;
switch (ice->eeprom.subvendor) {
case VT1724_SUBDEVICE_REVOLUTION71:
ice->akm_codecs = 2;
err = snd_ice1712_akm4xxx_init(ak, &akm_revo_front,
&akm_revo_front_priv, ice);
if (err < 0)
return err;
err = snd_ice1712_akm4xxx_init(ak+1, &akm_revo_surround,
&akm_revo_surround_priv, ice);
if (err < 0)
return err;
/* unmute all codecs */
snd_ice1712_gpio_write_bits(ice, VT1724_REVO_MUTE,
VT1724_REVO_MUTE);
break;
case VT1724_SUBDEVICE_REVOLUTION51:
ice->akm_codecs = 2;
err = snd_ice1712_akm4xxx_init(ak, &akm_revo51,
&akm_revo51_priv, ice);
if (err < 0)
return err;
err = snd_ice1712_akm4xxx_init(ak+1, &akm_revo51_adc,
&akm_revo51_adc_priv, ice);
if (err < 0)
return err;
err = revo51_i2c_init(ice, &ptc_revo51_volume);
if (err < 0)
return err;
/* unmute all codecs */
snd_ice1712_gpio_write_bits(ice, VT1724_REVO_MUTE,
VT1724_REVO_MUTE);
break;
case VT1724_SUBDEVICE_AUDIOPHILE192:
ice->akm_codecs = 1;
err = snd_ice1712_akm4xxx_init(ak, &akm_ap192, &akm_ap192_priv,
ice);
if (err < 0)
return err;
err = ap192_ak4114_init(ice);
if (err < 0)
return err;
/* unmute all codecs */
snd_ice1712_gpio_write_bits(ice, VT1724_REVO_MUTE,
VT1724_REVO_MUTE);
break;
}
return 0;
}
static int revo_add_controls(struct snd_ice1712 *ice)
{
struct revo51_spec *spec = ice->spec;
int err;
switch (ice->eeprom.subvendor) {
case VT1724_SUBDEVICE_REVOLUTION71:
err = snd_ice1712_akm4xxx_build_controls(ice);
if (err < 0)
return err;
break;
case VT1724_SUBDEVICE_REVOLUTION51:
err = snd_ice1712_akm4xxx_build_controls(ice);
if (err < 0)
return err;
spec = ice->spec;
err = snd_pt2258_build_controls(spec->pt2258);
if (err < 0)
return err;
break;
case VT1724_SUBDEVICE_AUDIOPHILE192:
err = snd_ice1712_akm4xxx_build_controls(ice);
if (err < 0)
return err;
/* only capture SPDIF over AK4114 */
err = snd_ak4114_build(spec->ak4114, NULL,
ice->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
if (err < 0)
return err;
break;
}
return 0;
}
/* entry point */
struct snd_ice1712_card_info snd_vt1724_revo_cards[] = {
{
.subvendor = VT1724_SUBDEVICE_REVOLUTION71,
.name = "M Audio Revolution-7.1",
.model = "revo71",
.chip_init = revo_init,
.build_controls = revo_add_controls,
},
{
.subvendor = VT1724_SUBDEVICE_REVOLUTION51,
.name = "M Audio Revolution-5.1",
.model = "revo51",
.chip_init = revo_init,
.build_controls = revo_add_controls,
},
{
.subvendor = VT1724_SUBDEVICE_AUDIOPHILE192,
.name = "M Audio Audiophile192",
.model = "ap192",
.chip_init = revo_init,
.build_controls = revo_add_controls,
},
{ } /* terminator */
};
| linux-master | sound/pci/ice1712/revo.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* ALSA driver for ICEnsemble ICE1712 (Envy24)
*
* Lowlevel functions for Hoontech STDSP24
*
* Copyright (c) 2000 Jaroslav Kysela <[email protected]>
*/
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/mutex.h>
#include <sound/core.h>
#include "ice1712.h"
#include "hoontech.h"
/* Hoontech-specific setting */
struct hoontech_spec {
unsigned char boxbits[4];
unsigned int config;
unsigned short boxconfig[4];
};
static void snd_ice1712_stdsp24_gpio_write(struct snd_ice1712 *ice, unsigned char byte)
{
byte |= ICE1712_STDSP24_CLOCK_BIT;
udelay(100);
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, byte);
byte &= ~ICE1712_STDSP24_CLOCK_BIT;
udelay(100);
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, byte);
byte |= ICE1712_STDSP24_CLOCK_BIT;
udelay(100);
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, byte);
}
static void snd_ice1712_stdsp24_darear(struct snd_ice1712 *ice, int activate)
{
struct hoontech_spec *spec = ice->spec;
mutex_lock(&ice->gpio_mutex);
ICE1712_STDSP24_0_DAREAR(spec->boxbits, activate);
snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[0]);
mutex_unlock(&ice->gpio_mutex);
}
static void snd_ice1712_stdsp24_mute(struct snd_ice1712 *ice, int activate)
{
struct hoontech_spec *spec = ice->spec;
mutex_lock(&ice->gpio_mutex);
ICE1712_STDSP24_3_MUTE(spec->boxbits, activate);
snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
mutex_unlock(&ice->gpio_mutex);
}
static void snd_ice1712_stdsp24_insel(struct snd_ice1712 *ice, int activate)
{
struct hoontech_spec *spec = ice->spec;
mutex_lock(&ice->gpio_mutex);
ICE1712_STDSP24_3_INSEL(spec->boxbits, activate);
snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
mutex_unlock(&ice->gpio_mutex);
}
static void snd_ice1712_stdsp24_box_channel(struct snd_ice1712 *ice, int box, int chn, int activate)
{
struct hoontech_spec *spec = ice->spec;
mutex_lock(&ice->gpio_mutex);
/* select box */
ICE1712_STDSP24_0_BOX(spec->boxbits, box);
snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[0]);
/* prepare for write */
if (chn == 3)
ICE1712_STDSP24_2_CHN4(spec->boxbits, 0);
ICE1712_STDSP24_2_MIDI1(spec->boxbits, activate);
snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
ICE1712_STDSP24_1_CHN1(spec->boxbits, 1);
ICE1712_STDSP24_1_CHN2(spec->boxbits, 1);
ICE1712_STDSP24_1_CHN3(spec->boxbits, 1);
ICE1712_STDSP24_2_CHN4(spec->boxbits, 1);
snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[1]);
snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
udelay(100);
if (chn == 3) {
ICE1712_STDSP24_2_CHN4(spec->boxbits, 0);
snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
} else {
switch (chn) {
case 0: ICE1712_STDSP24_1_CHN1(spec->boxbits, 0); break;
case 1: ICE1712_STDSP24_1_CHN2(spec->boxbits, 0); break;
case 2: ICE1712_STDSP24_1_CHN3(spec->boxbits, 0); break;
}
snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[1]);
}
udelay(100);
ICE1712_STDSP24_1_CHN1(spec->boxbits, 1);
ICE1712_STDSP24_1_CHN2(spec->boxbits, 1);
ICE1712_STDSP24_1_CHN3(spec->boxbits, 1);
ICE1712_STDSP24_2_CHN4(spec->boxbits, 1);
snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[1]);
snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
udelay(100);
ICE1712_STDSP24_2_MIDI1(spec->boxbits, 0);
snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
mutex_unlock(&ice->gpio_mutex);
}
static void snd_ice1712_stdsp24_box_midi(struct snd_ice1712 *ice, int box, int master)
{
struct hoontech_spec *spec = ice->spec;
mutex_lock(&ice->gpio_mutex);
/* select box */
ICE1712_STDSP24_0_BOX(spec->boxbits, box);
snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[0]);
ICE1712_STDSP24_2_MIDIIN(spec->boxbits, 1);
ICE1712_STDSP24_2_MIDI1(spec->boxbits, master);
snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
udelay(100);
ICE1712_STDSP24_2_MIDIIN(spec->boxbits, 0);
snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
mdelay(10);
ICE1712_STDSP24_2_MIDIIN(spec->boxbits, 1);
snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
mutex_unlock(&ice->gpio_mutex);
}
static void snd_ice1712_stdsp24_midi2(struct snd_ice1712 *ice, int activate)
{
struct hoontech_spec *spec = ice->spec;
mutex_lock(&ice->gpio_mutex);
ICE1712_STDSP24_3_MIDI2(spec->boxbits, activate);
snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
mutex_unlock(&ice->gpio_mutex);
}
static int hoontech_init(struct snd_ice1712 *ice, bool staudio)
{
struct hoontech_spec *spec;
int box, chn;
ice->num_total_dacs = 8;
ice->num_total_adcs = 8;
spec = kzalloc(sizeof(*spec), GFP_KERNEL);
if (!spec)
return -ENOMEM;
ice->spec = spec;
ICE1712_STDSP24_SET_ADDR(spec->boxbits, 0);
ICE1712_STDSP24_CLOCK(spec->boxbits, 0, 1);
ICE1712_STDSP24_0_BOX(spec->boxbits, 0);
ICE1712_STDSP24_0_DAREAR(spec->boxbits, 0);
ICE1712_STDSP24_SET_ADDR(spec->boxbits, 1);
ICE1712_STDSP24_CLOCK(spec->boxbits, 1, 1);
ICE1712_STDSP24_1_CHN1(spec->boxbits, 1);
ICE1712_STDSP24_1_CHN2(spec->boxbits, 1);
ICE1712_STDSP24_1_CHN3(spec->boxbits, 1);
ICE1712_STDSP24_SET_ADDR(spec->boxbits, 2);
ICE1712_STDSP24_CLOCK(spec->boxbits, 2, 1);
ICE1712_STDSP24_2_CHN4(spec->boxbits, 1);
ICE1712_STDSP24_2_MIDIIN(spec->boxbits, 1);
ICE1712_STDSP24_2_MIDI1(spec->boxbits, 0);
ICE1712_STDSP24_SET_ADDR(spec->boxbits, 3);
ICE1712_STDSP24_CLOCK(spec->boxbits, 3, 1);
ICE1712_STDSP24_3_MIDI2(spec->boxbits, 0);
ICE1712_STDSP24_3_MUTE(spec->boxbits, 1);
ICE1712_STDSP24_3_INSEL(spec->boxbits, 0);
/* let's go - activate only functions in first box */
if (staudio)
spec->config = ICE1712_STDSP24_MUTE;
else
spec->config = 0;
/* ICE1712_STDSP24_MUTE |
ICE1712_STDSP24_INSEL |
ICE1712_STDSP24_DAREAR; */
/* These boxconfigs have caused problems in the past.
* The code is not optimal, but should now enable a working config to
* be achieved.
* ** MIDI IN can only be configured on one box **
* ICE1712_STDSP24_BOX_MIDI1 needs to be set for that box.
* Tests on a ADAC2000 box suggest the box config flags do not
* work as would be expected, and the inputs are crossed.
* Setting ICE1712_STDSP24_BOX_MIDI1 and ICE1712_STDSP24_BOX_MIDI2
* on the same box connects MIDI-In to both 401 uarts; both outputs
* are then active on all boxes.
* The default config here sets up everything on the first box.
* Alan Horstmann 5.2.2008
*/
spec->boxconfig[0] = ICE1712_STDSP24_BOX_CHN1 |
ICE1712_STDSP24_BOX_CHN2 |
ICE1712_STDSP24_BOX_CHN3 |
ICE1712_STDSP24_BOX_CHN4 |
ICE1712_STDSP24_BOX_MIDI1 |
ICE1712_STDSP24_BOX_MIDI2;
if (staudio) {
spec->boxconfig[1] =
spec->boxconfig[2] =
spec->boxconfig[3] = spec->boxconfig[0];
} else {
spec->boxconfig[1] =
spec->boxconfig[2] =
spec->boxconfig[3] = 0;
}
snd_ice1712_stdsp24_darear(ice,
(spec->config & ICE1712_STDSP24_DAREAR) ? 1 : 0);
snd_ice1712_stdsp24_mute(ice,
(spec->config & ICE1712_STDSP24_MUTE) ? 1 : 0);
snd_ice1712_stdsp24_insel(ice,
(spec->config & ICE1712_STDSP24_INSEL) ? 1 : 0);
for (box = 0; box < 4; box++) {
if (spec->boxconfig[box] & ICE1712_STDSP24_BOX_MIDI2)
snd_ice1712_stdsp24_midi2(ice, 1);
for (chn = 0; chn < 4; chn++)
snd_ice1712_stdsp24_box_channel(ice, box, chn,
(spec->boxconfig[box] & (1 << chn)) ? 1 : 0);
if (spec->boxconfig[box] & ICE1712_STDSP24_BOX_MIDI1)
snd_ice1712_stdsp24_box_midi(ice, box, 1);
}
return 0;
}
static int snd_ice1712_hoontech_init(struct snd_ice1712 *ice)
{
return hoontech_init(ice, false);
}
static int snd_ice1712_staudio_init(struct snd_ice1712 *ice)
{
return hoontech_init(ice, true);
}
/*
* AK4524 access
*/
/* start callback for STDSP24 with modified hardware */
static void stdsp24_ak4524_lock(struct snd_akm4xxx *ak, int chip)
{
struct snd_ice1712 *ice = ak->private_data[0];
unsigned char tmp;
snd_ice1712_save_gpio_status(ice);
tmp = ICE1712_STDSP24_SERIAL_DATA |
ICE1712_STDSP24_SERIAL_CLOCK |
ICE1712_STDSP24_AK4524_CS;
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION,
ice->gpio.direction | tmp);
snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, ~tmp);
}
static int snd_ice1712_value_init(struct snd_ice1712 *ice)
{
/* Hoontech STDSP24 with modified hardware */
static const struct snd_akm4xxx akm_stdsp24_mv = {
.num_adcs = 2,
.num_dacs = 2,
.type = SND_AK4524,
.ops = {
.lock = stdsp24_ak4524_lock
}
};
static const struct snd_ak4xxx_private akm_stdsp24_mv_priv = {
.caddr = 2,
.cif = 1, /* CIF high */
.data_mask = ICE1712_STDSP24_SERIAL_DATA,
.clk_mask = ICE1712_STDSP24_SERIAL_CLOCK,
.cs_mask = ICE1712_STDSP24_AK4524_CS,
.cs_addr = ICE1712_STDSP24_AK4524_CS,
.cs_none = 0,
.add_flags = 0,
};
int err;
struct snd_akm4xxx *ak;
/* set the analog DACs */
ice->num_total_dacs = 2;
/* set the analog ADCs */
ice->num_total_adcs = 2;
/* analog section */
ak = ice->akm = kmalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
if (! ak)
return -ENOMEM;
ice->akm_codecs = 1;
err = snd_ice1712_akm4xxx_init(ak, &akm_stdsp24_mv, &akm_stdsp24_mv_priv, ice);
if (err < 0)
return err;
/* ak4524 controls */
return snd_ice1712_akm4xxx_build_controls(ice);
}
static int snd_ice1712_ez8_init(struct snd_ice1712 *ice)
{
ice->gpio.write_mask = ice->eeprom.gpiomask;
ice->gpio.direction = ice->eeprom.gpiodir;
snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, ice->eeprom.gpiomask);
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, ice->eeprom.gpiodir);
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, ice->eeprom.gpiostate);
return 0;
}
/* entry point */
struct snd_ice1712_card_info snd_ice1712_hoontech_cards[] = {
{
.subvendor = ICE1712_SUBDEVICE_STDSP24,
.name = "Hoontech SoundTrack Audio DSP24",
.model = "dsp24",
.chip_init = snd_ice1712_hoontech_init,
.mpu401_1_name = "MIDI-1 Hoontech/STA DSP24",
.mpu401_2_name = "MIDI-2 Hoontech/STA DSP24",
},
{
.subvendor = ICE1712_SUBDEVICE_STDSP24_VALUE, /* a dummy id */
.name = "Hoontech SoundTrack Audio DSP24 Value",
.model = "dsp24_value",
.chip_init = snd_ice1712_value_init,
},
{
.subvendor = ICE1712_SUBDEVICE_STDSP24_MEDIA7_1,
.name = "Hoontech STA DSP24 Media 7.1",
.model = "dsp24_71",
.chip_init = snd_ice1712_hoontech_init,
},
{
.subvendor = ICE1712_SUBDEVICE_EVENT_EZ8, /* a dummy id */
.name = "Event Electronics EZ8",
.model = "ez8",
.chip_init = snd_ice1712_ez8_init,
},
{
/* STAudio ADCIII has the same SSID as Hoontech StA DSP24,
* thus identified only via the explicit model option
*/
.subvendor = ICE1712_SUBDEVICE_STAUDIO_ADCIII, /* a dummy id */
.name = "STAudio ADCIII",
.model = "staudio",
.chip_init = snd_ice1712_staudio_init,
},
{ } /* terminator */
};
| linux-master | sound/pci/ice1712/hoontech.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* ALSA driver for ICEnsemble VT1724 (Envy24HT)
*
* Lowlevel functions for Advanced Micro Peripherals Ltd AUDIO2000
*
* Copyright (c) 2000 Jaroslav Kysela <[email protected]>
*/
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <sound/core.h>
#include "ice1712.h"
#include "envy24ht.h"
#include "amp.h"
static void wm_put(struct snd_ice1712 *ice, int reg, unsigned short val)
{
unsigned short cval;
cval = (reg << 9) | val;
snd_vt1724_write_i2c(ice, WM_DEV, cval >> 8, cval & 0xff);
}
static int snd_vt1724_amp_init(struct snd_ice1712 *ice)
{
static const unsigned short wm_inits[] = {
WM_ATTEN_L, 0x0000, /* 0 db */
WM_ATTEN_R, 0x0000, /* 0 db */
WM_DAC_CTRL, 0x0008, /* 24bit I2S */
WM_INT_CTRL, 0x0001, /* 24bit I2S */
};
unsigned int i;
/* only use basic functionality for now */
/* VT1616 6ch codec connected to PSDOUT0 using packed mode */
ice->num_total_dacs = 6;
ice->num_total_adcs = 2;
/* Chaintech AV-710 has another WM8728 codec connected to PSDOUT4
(shared with the SPDIF output). Mixer control for this codec
is not yet supported. */
if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AV710) {
for (i = 0; i < ARRAY_SIZE(wm_inits); i += 2)
wm_put(ice, wm_inits[i], wm_inits[i+1]);
}
return 0;
}
static int snd_vt1724_amp_add_controls(struct snd_ice1712 *ice)
{
if (ice->ac97)
/* we use pins 39 and 41 of the VT1616 for left and right
read outputs */
snd_ac97_write_cache(ice->ac97, 0x5a,
snd_ac97_read(ice->ac97, 0x5a) & ~0x8000);
return 0;
}
/* entry point */
struct snd_ice1712_card_info snd_vt1724_amp_cards[] = {
{
.subvendor = VT1724_SUBDEVICE_AV710,
.name = "Chaintech AV-710",
.model = "av710",
.chip_init = snd_vt1724_amp_init,
.build_controls = snd_vt1724_amp_add_controls,
},
{
.subvendor = VT1724_SUBDEVICE_AUDIO2000,
.name = "AMP Ltd AUDIO2000",
.model = "amp2000",
.chip_init = snd_vt1724_amp_init,
.build_controls = snd_vt1724_amp_add_controls,
},
{ } /* terminator */
};
| linux-master | sound/pci/ice1712/amp.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* ALSA driver for ICEnsemble VT17xx
*
* Lowlevel functions for WM8766 codec
*
* Copyright (c) 2012 Ondrej Zary <[email protected]>
*/
#include <linux/delay.h>
#include <sound/core.h>
#include <sound/control.h>
#include <sound/tlv.h>
#include "wm8766.h"
/* low-level access */
static void snd_wm8766_write(struct snd_wm8766 *wm, u16 addr, u16 data)
{
if (addr < WM8766_REG_COUNT)
wm->regs[addr] = data;
wm->ops.write(wm, addr, data);
}
/* mixer controls */
static const DECLARE_TLV_DB_SCALE(wm8766_tlv, -12750, 50, 1);
static const struct snd_wm8766_ctl snd_wm8766_default_ctl[WM8766_CTL_COUNT] = {
[WM8766_CTL_CH1_VOL] = {
.name = "Channel 1 Playback Volume",
.type = SNDRV_CTL_ELEM_TYPE_INTEGER,
.tlv = wm8766_tlv,
.reg1 = WM8766_REG_DACL1,
.reg2 = WM8766_REG_DACR1,
.mask1 = WM8766_VOL_MASK,
.mask2 = WM8766_VOL_MASK,
.max = 0xff,
.flags = WM8766_FLAG_STEREO | WM8766_FLAG_VOL_UPDATE,
},
[WM8766_CTL_CH2_VOL] = {
.name = "Channel 2 Playback Volume",
.type = SNDRV_CTL_ELEM_TYPE_INTEGER,
.tlv = wm8766_tlv,
.reg1 = WM8766_REG_DACL2,
.reg2 = WM8766_REG_DACR2,
.mask1 = WM8766_VOL_MASK,
.mask2 = WM8766_VOL_MASK,
.max = 0xff,
.flags = WM8766_FLAG_STEREO | WM8766_FLAG_VOL_UPDATE,
},
[WM8766_CTL_CH3_VOL] = {
.name = "Channel 3 Playback Volume",
.type = SNDRV_CTL_ELEM_TYPE_INTEGER,
.tlv = wm8766_tlv,
.reg1 = WM8766_REG_DACL3,
.reg2 = WM8766_REG_DACR3,
.mask1 = WM8766_VOL_MASK,
.mask2 = WM8766_VOL_MASK,
.max = 0xff,
.flags = WM8766_FLAG_STEREO | WM8766_FLAG_VOL_UPDATE,
},
[WM8766_CTL_CH1_SW] = {
.name = "Channel 1 Playback Switch",
.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN,
.reg1 = WM8766_REG_DACCTRL2,
.mask1 = WM8766_DAC2_MUTE1,
.flags = WM8766_FLAG_INVERT,
},
[WM8766_CTL_CH2_SW] = {
.name = "Channel 2 Playback Switch",
.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN,
.reg1 = WM8766_REG_DACCTRL2,
.mask1 = WM8766_DAC2_MUTE2,
.flags = WM8766_FLAG_INVERT,
},
[WM8766_CTL_CH3_SW] = {
.name = "Channel 3 Playback Switch",
.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN,
.reg1 = WM8766_REG_DACCTRL2,
.mask1 = WM8766_DAC2_MUTE3,
.flags = WM8766_FLAG_INVERT,
},
[WM8766_CTL_PHASE1_SW] = {
.name = "Channel 1 Phase Invert Playback Switch",
.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN,
.reg1 = WM8766_REG_IFCTRL,
.mask1 = WM8766_PHASE_INVERT1,
},
[WM8766_CTL_PHASE2_SW] = {
.name = "Channel 2 Phase Invert Playback Switch",
.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN,
.reg1 = WM8766_REG_IFCTRL,
.mask1 = WM8766_PHASE_INVERT2,
},
[WM8766_CTL_PHASE3_SW] = {
.name = "Channel 3 Phase Invert Playback Switch",
.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN,
.reg1 = WM8766_REG_IFCTRL,
.mask1 = WM8766_PHASE_INVERT3,
},
[WM8766_CTL_DEEMPH1_SW] = {
.name = "Channel 1 Deemphasis Playback Switch",
.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN,
.reg1 = WM8766_REG_DACCTRL2,
.mask1 = WM8766_DAC2_DEEMP1,
},
[WM8766_CTL_DEEMPH2_SW] = {
.name = "Channel 2 Deemphasis Playback Switch",
.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN,
.reg1 = WM8766_REG_DACCTRL2,
.mask1 = WM8766_DAC2_DEEMP2,
},
[WM8766_CTL_DEEMPH3_SW] = {
.name = "Channel 3 Deemphasis Playback Switch",
.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN,
.reg1 = WM8766_REG_DACCTRL2,
.mask1 = WM8766_DAC2_DEEMP3,
},
[WM8766_CTL_IZD_SW] = {
.name = "Infinite Zero Detect Playback Switch",
.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN,
.reg1 = WM8766_REG_DACCTRL1,
.mask1 = WM8766_DAC_IZD,
},
[WM8766_CTL_ZC_SW] = {
.name = "Zero Cross Detect Playback Switch",
.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN,
.reg1 = WM8766_REG_DACCTRL2,
.mask1 = WM8766_DAC2_ZCD,
.flags = WM8766_FLAG_INVERT,
},
};
/* exported functions */
void snd_wm8766_init(struct snd_wm8766 *wm)
{
int i;
static const u16 default_values[] = {
0x000, 0x100,
0x120, 0x000,
0x000, 0x100, 0x000, 0x100, 0x000,
0x000, 0x080,
};
memcpy(wm->ctl, snd_wm8766_default_ctl, sizeof(wm->ctl));
snd_wm8766_write(wm, WM8766_REG_RESET, 0x00); /* reset */
udelay(10);
/* load defaults */
for (i = 0; i < ARRAY_SIZE(default_values); i++)
snd_wm8766_write(wm, i, default_values[i]);
}
void snd_wm8766_resume(struct snd_wm8766 *wm)
{
int i;
for (i = 0; i < WM8766_REG_COUNT; i++)
snd_wm8766_write(wm, i, wm->regs[i]);
}
void snd_wm8766_set_if(struct snd_wm8766 *wm, u16 dac)
{
u16 val = wm->regs[WM8766_REG_IFCTRL] & ~WM8766_IF_MASK;
dac &= WM8766_IF_MASK;
snd_wm8766_write(wm, WM8766_REG_IFCTRL, val | dac);
}
void snd_wm8766_volume_restore(struct snd_wm8766 *wm)
{
u16 val = wm->regs[WM8766_REG_DACR1];
/* restore volume after MCLK stopped */
snd_wm8766_write(wm, WM8766_REG_DACR1, val | WM8766_VOL_UPDATE);
}
/* mixer callbacks */
static int snd_wm8766_volume_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
struct snd_wm8766 *wm = snd_kcontrol_chip(kcontrol);
int n = kcontrol->private_value;
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = (wm->ctl[n].flags & WM8766_FLAG_STEREO) ? 2 : 1;
uinfo->value.integer.min = wm->ctl[n].min;
uinfo->value.integer.max = wm->ctl[n].max;
return 0;
}
static int snd_wm8766_enum_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
struct snd_wm8766 *wm = snd_kcontrol_chip(kcontrol);
int n = kcontrol->private_value;
return snd_ctl_enum_info(uinfo, 1, wm->ctl[n].max,
wm->ctl[n].enum_names);
}
static int snd_wm8766_ctl_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_wm8766 *wm = snd_kcontrol_chip(kcontrol);
int n = kcontrol->private_value;
u16 val1, val2;
if (wm->ctl[n].get)
wm->ctl[n].get(wm, &val1, &val2);
else {
val1 = wm->regs[wm->ctl[n].reg1] & wm->ctl[n].mask1;
val1 >>= __ffs(wm->ctl[n].mask1);
if (wm->ctl[n].flags & WM8766_FLAG_STEREO) {
val2 = wm->regs[wm->ctl[n].reg2] & wm->ctl[n].mask2;
val2 >>= __ffs(wm->ctl[n].mask2);
if (wm->ctl[n].flags & WM8766_FLAG_VOL_UPDATE)
val2 &= ~WM8766_VOL_UPDATE;
}
}
if (wm->ctl[n].flags & WM8766_FLAG_INVERT) {
val1 = wm->ctl[n].max - (val1 - wm->ctl[n].min);
if (wm->ctl[n].flags & WM8766_FLAG_STEREO)
val2 = wm->ctl[n].max - (val2 - wm->ctl[n].min);
}
ucontrol->value.integer.value[0] = val1;
if (wm->ctl[n].flags & WM8766_FLAG_STEREO)
ucontrol->value.integer.value[1] = val2;
return 0;
}
static int snd_wm8766_ctl_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_wm8766 *wm = snd_kcontrol_chip(kcontrol);
int n = kcontrol->private_value;
u16 val, regval1, regval2;
/* this also works for enum because value is a union */
regval1 = ucontrol->value.integer.value[0];
regval2 = ucontrol->value.integer.value[1];
if (wm->ctl[n].flags & WM8766_FLAG_INVERT) {
regval1 = wm->ctl[n].max - (regval1 - wm->ctl[n].min);
regval2 = wm->ctl[n].max - (regval2 - wm->ctl[n].min);
}
if (wm->ctl[n].set)
wm->ctl[n].set(wm, regval1, regval2);
else {
val = wm->regs[wm->ctl[n].reg1] & ~wm->ctl[n].mask1;
val |= regval1 << __ffs(wm->ctl[n].mask1);
/* both stereo controls in one register */
if (wm->ctl[n].flags & WM8766_FLAG_STEREO &&
wm->ctl[n].reg1 == wm->ctl[n].reg2) {
val &= ~wm->ctl[n].mask2;
val |= regval2 << __ffs(wm->ctl[n].mask2);
}
snd_wm8766_write(wm, wm->ctl[n].reg1, val);
/* stereo controls in different registers */
if (wm->ctl[n].flags & WM8766_FLAG_STEREO &&
wm->ctl[n].reg1 != wm->ctl[n].reg2) {
val = wm->regs[wm->ctl[n].reg2] & ~wm->ctl[n].mask2;
val |= regval2 << __ffs(wm->ctl[n].mask2);
if (wm->ctl[n].flags & WM8766_FLAG_VOL_UPDATE)
val |= WM8766_VOL_UPDATE;
snd_wm8766_write(wm, wm->ctl[n].reg2, val);
}
}
return 0;
}
static int snd_wm8766_add_control(struct snd_wm8766 *wm, int num)
{
struct snd_kcontrol_new cont;
struct snd_kcontrol *ctl;
memset(&cont, 0, sizeof(cont));
cont.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
cont.private_value = num;
cont.name = wm->ctl[num].name;
cont.access = SNDRV_CTL_ELEM_ACCESS_READWRITE;
if (wm->ctl[num].flags & WM8766_FLAG_LIM ||
wm->ctl[num].flags & WM8766_FLAG_ALC)
cont.access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
cont.tlv.p = NULL;
cont.get = snd_wm8766_ctl_get;
cont.put = snd_wm8766_ctl_put;
switch (wm->ctl[num].type) {
case SNDRV_CTL_ELEM_TYPE_INTEGER:
cont.info = snd_wm8766_volume_info;
cont.access |= SNDRV_CTL_ELEM_ACCESS_TLV_READ;
cont.tlv.p = wm->ctl[num].tlv;
break;
case SNDRV_CTL_ELEM_TYPE_BOOLEAN:
wm->ctl[num].max = 1;
if (wm->ctl[num].flags & WM8766_FLAG_STEREO)
cont.info = snd_ctl_boolean_stereo_info;
else
cont.info = snd_ctl_boolean_mono_info;
break;
case SNDRV_CTL_ELEM_TYPE_ENUMERATED:
cont.info = snd_wm8766_enum_info;
break;
default:
return -EINVAL;
}
ctl = snd_ctl_new1(&cont, wm);
if (!ctl)
return -ENOMEM;
wm->ctl[num].kctl = ctl;
return snd_ctl_add(wm->card, ctl);
}
int snd_wm8766_build_controls(struct snd_wm8766 *wm)
{
int err, i;
for (i = 0; i < WM8766_CTL_COUNT; i++)
if (wm->ctl[i].name) {
err = snd_wm8766_add_control(wm, i);
if (err < 0)
return err;
}
return 0;
}
| linux-master | sound/pci/ice1712/wm8766.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* ALSA driver for ICEnsemble VT1724 (Envy24HT)
*
* Lowlevel functions for ONKYO WAVIO SE-90PCI and SE-200PCI
*
* Copyright (c) 2007 Shin-ya Okada sh_okada(at)d4.dion.ne.jp
* (at) -> @
*/
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <sound/core.h>
#include <sound/tlv.h>
#include "ice1712.h"
#include "envy24ht.h"
#include "se.h"
struct se_spec {
struct {
unsigned char ch1, ch2;
} vol[8];
};
/****************************************************************************/
/* ONKYO WAVIO SE-200PCI */
/****************************************************************************/
/*
* system configuration ICE_EEP2_SYSCONF=0x4b
* XIN1 49.152MHz
* not have UART
* one stereo ADC and a S/PDIF receiver connected
* four stereo DACs connected
*
* AC-Link configuration ICE_EEP2_ACLINK=0x80
* use I2C, not use AC97
*
* I2S converters feature ICE_EEP2_I2S=0x78
* I2S codec has no volume/mute control feature
* I2S codec supports 96KHz and 192KHz
* I2S codec 24bits
*
* S/PDIF configuration ICE_EEP2_SPDIF=0xc3
* Enable integrated S/PDIF transmitter
* internal S/PDIF out implemented
* S/PDIF is stereo
* External S/PDIF out implemented
*
*
* ** connected chips **
*
* WM8740
* A 2ch-DAC of main outputs.
* It setuped as I2S mode by wire, so no way to setup from software.
* The sample-rate are automatically changed.
* ML/I2S (28pin) --------+
* MC/DM1 (27pin) -- 5V |
* MD/DM0 (26pin) -- GND |
* MUTEB (25pin) -- NC |
* MODE (24pin) -- GND |
* CSBIW (23pin) --------+
* |
* RSTB (22pin) --R(1K)-+
* Probably it reduce the noise from the control line.
*
* WM8766
* A 6ch-DAC for surrounds.
* It's control wire was connected to GPIOxx (3-wire serial interface)
* ML/I2S (11pin) -- GPIO18
* MC/IWL (12pin) -- GPIO17
* MD/DM (13pin) -- GPIO16
* MUTE (14pin) -- GPIO01
*
* WM8776
* A 2ch-ADC(with 10ch-selector) plus 2ch-DAC.
* It's control wire was connected to SDA/SCLK (2-wire serial interface)
* MODE (16pin) -- R(1K) -- GND
* CE (17pin) -- R(1K) -- GND 2-wire mode (address=0x34)
* DI (18pin) -- SDA
* CL (19pin) -- SCLK
*
*
* ** output pins and device names **
*
* 7.1ch name -- output connector color -- device (-D option)
*
* FRONT 2ch -- green -- plughw:0,0
* CENTER(Lch) SUBWOOFER(Rch) -- black -- plughw:0,2,0
* SURROUND 2ch -- orange -- plughw:0,2,1
* SURROUND BACK 2ch -- white -- plughw:0,2,2
*
*/
/****************************************************************************/
/* WM8740 interface */
/****************************************************************************/
static void se200pci_WM8740_init(struct snd_ice1712 *ice)
{
/* nothing to do */
}
static void se200pci_WM8740_set_pro_rate(struct snd_ice1712 *ice,
unsigned int rate)
{
/* nothing to do */
}
/****************************************************************************/
/* WM8766 interface */
/****************************************************************************/
static void se200pci_WM8766_write(struct snd_ice1712 *ice,
unsigned int addr, unsigned int data)
{
unsigned int st;
unsigned int bits;
int i;
const unsigned int DATA = 0x010000;
const unsigned int CLOCK = 0x020000;
const unsigned int LOAD = 0x040000;
const unsigned int ALL_MASK = (DATA | CLOCK | LOAD);
snd_ice1712_save_gpio_status(ice);
st = ((addr & 0x7f) << 9) | (data & 0x1ff);
snd_ice1712_gpio_set_dir(ice, ice->gpio.direction | ALL_MASK);
snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask & ~ALL_MASK);
bits = snd_ice1712_gpio_read(ice) & ~ALL_MASK;
snd_ice1712_gpio_write(ice, bits);
for (i = 0; i < 16; i++) {
udelay(1);
bits &= ~CLOCK;
st = (st << 1);
if (st & 0x10000)
bits |= DATA;
else
bits &= ~DATA;
snd_ice1712_gpio_write(ice, bits);
udelay(1);
bits |= CLOCK;
snd_ice1712_gpio_write(ice, bits);
}
udelay(1);
bits |= LOAD;
snd_ice1712_gpio_write(ice, bits);
udelay(1);
bits |= (DATA | CLOCK);
snd_ice1712_gpio_write(ice, bits);
snd_ice1712_restore_gpio_status(ice);
}
static void se200pci_WM8766_set_volume(struct snd_ice1712 *ice, int ch,
unsigned int vol1, unsigned int vol2)
{
switch (ch) {
case 0:
se200pci_WM8766_write(ice, 0x000, vol1);
se200pci_WM8766_write(ice, 0x001, vol2 | 0x100);
break;
case 1:
se200pci_WM8766_write(ice, 0x004, vol1);
se200pci_WM8766_write(ice, 0x005, vol2 | 0x100);
break;
case 2:
se200pci_WM8766_write(ice, 0x006, vol1);
se200pci_WM8766_write(ice, 0x007, vol2 | 0x100);
break;
}
}
static void se200pci_WM8766_init(struct snd_ice1712 *ice)
{
se200pci_WM8766_write(ice, 0x1f, 0x000); /* RESET ALL */
udelay(10);
se200pci_WM8766_set_volume(ice, 0, 0, 0); /* volume L=0 R=0 */
se200pci_WM8766_set_volume(ice, 1, 0, 0); /* volume L=0 R=0 */
se200pci_WM8766_set_volume(ice, 2, 0, 0); /* volume L=0 R=0 */
se200pci_WM8766_write(ice, 0x03, 0x022); /* serial mode I2S-24bits */
se200pci_WM8766_write(ice, 0x0a, 0x080); /* MCLK=256fs */
se200pci_WM8766_write(ice, 0x12, 0x000); /* MDP=0 */
se200pci_WM8766_write(ice, 0x15, 0x000); /* MDP=0 */
se200pci_WM8766_write(ice, 0x09, 0x000); /* demp=off mute=off */
se200pci_WM8766_write(ice, 0x02, 0x124); /* ch-assign L=L R=R RESET */
se200pci_WM8766_write(ice, 0x02, 0x120); /* ch-assign L=L R=R */
}
static void se200pci_WM8766_set_pro_rate(struct snd_ice1712 *ice,
unsigned int rate)
{
if (rate > 96000)
se200pci_WM8766_write(ice, 0x0a, 0x000); /* MCLK=128fs */
else
se200pci_WM8766_write(ice, 0x0a, 0x080); /* MCLK=256fs */
}
/****************************************************************************/
/* WM8776 interface */
/****************************************************************************/
static void se200pci_WM8776_write(struct snd_ice1712 *ice,
unsigned int addr, unsigned int data)
{
unsigned int val;
val = (addr << 9) | data;
snd_vt1724_write_i2c(ice, 0x34, val >> 8, val & 0xff);
}
static void se200pci_WM8776_set_output_volume(struct snd_ice1712 *ice,
unsigned int vol1, unsigned int vol2)
{
se200pci_WM8776_write(ice, 0x03, vol1);
se200pci_WM8776_write(ice, 0x04, vol2 | 0x100);
}
static void se200pci_WM8776_set_input_volume(struct snd_ice1712 *ice,
unsigned int vol1, unsigned int vol2)
{
se200pci_WM8776_write(ice, 0x0e, vol1);
se200pci_WM8776_write(ice, 0x0f, vol2 | 0x100);
}
static const char * const se200pci_sel[] = {
"LINE-IN", "CD-IN", "MIC-IN", "ALL-MIX", NULL
};
static void se200pci_WM8776_set_input_selector(struct snd_ice1712 *ice,
unsigned int sel)
{
static const unsigned char vals[] = {
/* LINE, CD, MIC, ALL, GND */
0x10, 0x04, 0x08, 0x1c, 0x03
};
if (sel > 4)
sel = 4;
se200pci_WM8776_write(ice, 0x15, vals[sel]);
}
static void se200pci_WM8776_set_afl(struct snd_ice1712 *ice, unsigned int afl)
{
/* AFL -- After Fader Listening */
if (afl)
se200pci_WM8776_write(ice, 0x16, 0x005);
else
se200pci_WM8776_write(ice, 0x16, 0x001);
}
static const char * const se200pci_agc[] = {
"Off", "LimiterMode", "ALCMode", NULL
};
static void se200pci_WM8776_set_agc(struct snd_ice1712 *ice, unsigned int agc)
{
/* AGC -- Auto Gain Control of the input */
switch (agc) {
case 0:
se200pci_WM8776_write(ice, 0x11, 0x000); /* Off */
break;
case 1:
se200pci_WM8776_write(ice, 0x10, 0x07b);
se200pci_WM8776_write(ice, 0x11, 0x100); /* LimiterMode */
break;
case 2:
se200pci_WM8776_write(ice, 0x10, 0x1fb);
se200pci_WM8776_write(ice, 0x11, 0x100); /* ALCMode */
break;
}
}
static void se200pci_WM8776_init(struct snd_ice1712 *ice)
{
int i;
static const unsigned short default_values[] = {
0x100, 0x100, 0x100,
0x100, 0x100, 0x100,
0x000, 0x090, 0x000, 0x000,
0x022, 0x022, 0x022,
0x008, 0x0cf, 0x0cf, 0x07b, 0x000,
0x032, 0x000, 0x0a6, 0x001, 0x001
};
se200pci_WM8776_write(ice, 0x17, 0x000); /* reset all */
/* ADC and DAC interface is I2S 24bits mode */
/* The sample-rate are automatically changed */
udelay(10);
/* BUT my board can not do reset all, so I load all by manually. */
for (i = 0; i < ARRAY_SIZE(default_values); i++)
se200pci_WM8776_write(ice, i, default_values[i]);
se200pci_WM8776_set_input_selector(ice, 0);
se200pci_WM8776_set_afl(ice, 0);
se200pci_WM8776_set_agc(ice, 0);
se200pci_WM8776_set_input_volume(ice, 0, 0);
se200pci_WM8776_set_output_volume(ice, 0, 0);
/* head phone mute and power down */
se200pci_WM8776_write(ice, 0x00, 0);
se200pci_WM8776_write(ice, 0x01, 0);
se200pci_WM8776_write(ice, 0x02, 0x100);
se200pci_WM8776_write(ice, 0x0d, 0x080);
}
static void se200pci_WM8776_set_pro_rate(struct snd_ice1712 *ice,
unsigned int rate)
{
/* nothing to do */
}
/****************************************************************************/
/* runtime interface */
/****************************************************************************/
static void se200pci_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate)
{
se200pci_WM8740_set_pro_rate(ice, rate);
se200pci_WM8766_set_pro_rate(ice, rate);
se200pci_WM8776_set_pro_rate(ice, rate);
}
struct se200pci_control {
const char *name;
enum {
WM8766,
WM8776in,
WM8776out,
WM8776sel,
WM8776agc,
WM8776afl
} target;
enum { VOLUME1, VOLUME2, BOOLEAN, ENUM } type;
int ch;
const char * const *member;
const char *comment;
};
static const struct se200pci_control se200pci_cont[] = {
{
.name = "Front Playback Volume",
.target = WM8776out,
.type = VOLUME1,
.comment = "Front(green)"
},
{
.name = "Side Playback Volume",
.target = WM8766,
.type = VOLUME1,
.ch = 1,
.comment = "Surround(orange)"
},
{
.name = "Surround Playback Volume",
.target = WM8766,
.type = VOLUME1,
.ch = 2,
.comment = "SurroundBack(white)"
},
{
.name = "CLFE Playback Volume",
.target = WM8766,
.type = VOLUME1,
.ch = 0,
.comment = "Center(Lch)&SubWoofer(Rch)(black)"
},
{
.name = "Capture Volume",
.target = WM8776in,
.type = VOLUME2
},
{
.name = "Capture Select",
.target = WM8776sel,
.type = ENUM,
.member = se200pci_sel
},
{
.name = "AGC Capture Mode",
.target = WM8776agc,
.type = ENUM,
.member = se200pci_agc
},
{
.name = "AFL Bypass Playback Switch",
.target = WM8776afl,
.type = BOOLEAN
}
};
static int se200pci_get_enum_count(int n)
{
const char * const *member;
int c;
member = se200pci_cont[n].member;
if (!member)
return 0;
for (c = 0; member[c]; c++)
;
return c;
}
static int se200pci_cont_volume_info(struct snd_kcontrol *kc,
struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 2;
uinfo->value.integer.min = 0; /* mute */
uinfo->value.integer.max = 0xff; /* 0dB */
return 0;
}
#define se200pci_cont_boolean_info snd_ctl_boolean_mono_info
static int se200pci_cont_enum_info(struct snd_kcontrol *kc,
struct snd_ctl_elem_info *uinfo)
{
int n, c;
n = kc->private_value;
c = se200pci_get_enum_count(n);
if (!c)
return -EINVAL;
return snd_ctl_enum_info(uinfo, 1, c, se200pci_cont[n].member);
}
static int se200pci_cont_volume_get(struct snd_kcontrol *kc,
struct snd_ctl_elem_value *uc)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kc);
struct se_spec *spec = ice->spec;
int n = kc->private_value;
uc->value.integer.value[0] = spec->vol[n].ch1;
uc->value.integer.value[1] = spec->vol[n].ch2;
return 0;
}
static int se200pci_cont_boolean_get(struct snd_kcontrol *kc,
struct snd_ctl_elem_value *uc)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kc);
struct se_spec *spec = ice->spec;
int n = kc->private_value;
uc->value.integer.value[0] = spec->vol[n].ch1;
return 0;
}
static int se200pci_cont_enum_get(struct snd_kcontrol *kc,
struct snd_ctl_elem_value *uc)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kc);
struct se_spec *spec = ice->spec;
int n = kc->private_value;
uc->value.enumerated.item[0] = spec->vol[n].ch1;
return 0;
}
static void se200pci_cont_update(struct snd_ice1712 *ice, int n)
{
struct se_spec *spec = ice->spec;
switch (se200pci_cont[n].target) {
case WM8766:
se200pci_WM8766_set_volume(ice,
se200pci_cont[n].ch,
spec->vol[n].ch1,
spec->vol[n].ch2);
break;
case WM8776in:
se200pci_WM8776_set_input_volume(ice,
spec->vol[n].ch1,
spec->vol[n].ch2);
break;
case WM8776out:
se200pci_WM8776_set_output_volume(ice,
spec->vol[n].ch1,
spec->vol[n].ch2);
break;
case WM8776sel:
se200pci_WM8776_set_input_selector(ice,
spec->vol[n].ch1);
break;
case WM8776agc:
se200pci_WM8776_set_agc(ice, spec->vol[n].ch1);
break;
case WM8776afl:
se200pci_WM8776_set_afl(ice, spec->vol[n].ch1);
break;
default:
break;
}
}
static int se200pci_cont_volume_put(struct snd_kcontrol *kc,
struct snd_ctl_elem_value *uc)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kc);
struct se_spec *spec = ice->spec;
int n = kc->private_value;
unsigned int vol1, vol2;
int changed;
changed = 0;
vol1 = uc->value.integer.value[0] & 0xff;
vol2 = uc->value.integer.value[1] & 0xff;
if (spec->vol[n].ch1 != vol1) {
spec->vol[n].ch1 = vol1;
changed = 1;
}
if (spec->vol[n].ch2 != vol2) {
spec->vol[n].ch2 = vol2;
changed = 1;
}
if (changed)
se200pci_cont_update(ice, n);
return changed;
}
static int se200pci_cont_boolean_put(struct snd_kcontrol *kc,
struct snd_ctl_elem_value *uc)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kc);
struct se_spec *spec = ice->spec;
int n = kc->private_value;
unsigned int vol1;
vol1 = !!uc->value.integer.value[0];
if (spec->vol[n].ch1 != vol1) {
spec->vol[n].ch1 = vol1;
se200pci_cont_update(ice, n);
return 1;
}
return 0;
}
static int se200pci_cont_enum_put(struct snd_kcontrol *kc,
struct snd_ctl_elem_value *uc)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kc);
struct se_spec *spec = ice->spec;
int n = kc->private_value;
unsigned int vol1;
vol1 = uc->value.enumerated.item[0];
if (vol1 >= se200pci_get_enum_count(n))
return -EINVAL;
if (spec->vol[n].ch1 != vol1) {
spec->vol[n].ch1 = vol1;
se200pci_cont_update(ice, n);
return 1;
}
return 0;
}
static const DECLARE_TLV_DB_SCALE(db_scale_gain1, -12750, 50, 1);
static const DECLARE_TLV_DB_SCALE(db_scale_gain2, -10350, 50, 1);
static int se200pci_add_controls(struct snd_ice1712 *ice)
{
int i;
struct snd_kcontrol_new cont;
int err;
memset(&cont, 0, sizeof(cont));
cont.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
for (i = 0; i < ARRAY_SIZE(se200pci_cont); i++) {
cont.private_value = i;
cont.name = se200pci_cont[i].name;
cont.access = SNDRV_CTL_ELEM_ACCESS_READWRITE;
cont.tlv.p = NULL;
switch (se200pci_cont[i].type) {
case VOLUME1:
case VOLUME2:
cont.info = se200pci_cont_volume_info;
cont.get = se200pci_cont_volume_get;
cont.put = se200pci_cont_volume_put;
cont.access |= SNDRV_CTL_ELEM_ACCESS_TLV_READ;
if (se200pci_cont[i].type == VOLUME1)
cont.tlv.p = db_scale_gain1;
else
cont.tlv.p = db_scale_gain2;
break;
case BOOLEAN:
cont.info = se200pci_cont_boolean_info;
cont.get = se200pci_cont_boolean_get;
cont.put = se200pci_cont_boolean_put;
break;
case ENUM:
cont.info = se200pci_cont_enum_info;
cont.get = se200pci_cont_enum_get;
cont.put = se200pci_cont_enum_put;
break;
default:
snd_BUG();
return -EINVAL;
}
err = snd_ctl_add(ice->card, snd_ctl_new1(&cont, ice));
if (err < 0)
return err;
}
return 0;
}
/****************************************************************************/
/* ONKYO WAVIO SE-90PCI */
/****************************************************************************/
/*
* system configuration ICE_EEP2_SYSCONF=0x4b
* AC-Link configuration ICE_EEP2_ACLINK=0x80
* I2S converters feature ICE_EEP2_I2S=0x78
* S/PDIF configuration ICE_EEP2_SPDIF=0xc3
*
* ** connected chip **
*
* WM8716
* A 2ch-DAC of main outputs.
* It setuped as I2S mode by wire, so no way to setup from software.
* ML/I2S (28pin) -- +5V
* MC/DM1 (27pin) -- GND
* MC/DM0 (26pin) -- GND
* MUTEB (25pin) -- open (internal pull-up)
* MODE (24pin) -- GND
* CSBIWO (23pin) -- +5V
*
*/
/* Nothing to do for this chip. */
/****************************************************************************/
/* probe/initialize/setup */
/****************************************************************************/
static int se_init(struct snd_ice1712 *ice)
{
struct se_spec *spec;
spec = kzalloc(sizeof(*spec), GFP_KERNEL);
if (!spec)
return -ENOMEM;
ice->spec = spec;
if (ice->eeprom.subvendor == VT1724_SUBDEVICE_SE90PCI) {
ice->num_total_dacs = 2;
ice->num_total_adcs = 0;
ice->vt1720 = 1;
return 0;
} else if (ice->eeprom.subvendor == VT1724_SUBDEVICE_SE200PCI) {
ice->num_total_dacs = 8;
ice->num_total_adcs = 2;
se200pci_WM8740_init(ice);
se200pci_WM8766_init(ice);
se200pci_WM8776_init(ice);
ice->gpio.set_pro_rate = se200pci_set_pro_rate;
return 0;
}
return -ENOENT;
}
static int se_add_controls(struct snd_ice1712 *ice)
{
int err;
err = 0;
/* nothing to do for VT1724_SUBDEVICE_SE90PCI */
if (ice->eeprom.subvendor == VT1724_SUBDEVICE_SE200PCI)
err = se200pci_add_controls(ice);
return err;
}
/****************************************************************************/
/* entry point */
/****************************************************************************/
static const unsigned char se200pci_eeprom[] = {
[ICE_EEP2_SYSCONF] = 0x4b, /* 49.152Hz, spdif-in/ADC, 4DACs */
[ICE_EEP2_ACLINK] = 0x80, /* I2S */
[ICE_EEP2_I2S] = 0x78, /* 96k-ok, 24bit, 192k-ok */
[ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
[ICE_EEP2_GPIO_DIR] = 0x02, /* WM8766 mute 1=output */
[ICE_EEP2_GPIO_DIR1] = 0x00, /* not used */
[ICE_EEP2_GPIO_DIR2] = 0x07, /* WM8766 ML/MC/MD 1=output */
[ICE_EEP2_GPIO_MASK] = 0x00, /* 0=writable */
[ICE_EEP2_GPIO_MASK1] = 0x00, /* 0=writable */
[ICE_EEP2_GPIO_MASK2] = 0x00, /* 0=writable */
[ICE_EEP2_GPIO_STATE] = 0x00, /* WM8766 mute=0 */
[ICE_EEP2_GPIO_STATE1] = 0x00, /* not used */
[ICE_EEP2_GPIO_STATE2] = 0x07, /* WM8766 ML/MC/MD */
};
static const unsigned char se90pci_eeprom[] = {
[ICE_EEP2_SYSCONF] = 0x4b, /* 49.152Hz, spdif-in/ADC, 4DACs */
[ICE_EEP2_ACLINK] = 0x80, /* I2S */
[ICE_EEP2_I2S] = 0x78, /* 96k-ok, 24bit, 192k-ok */
[ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
/* ALL GPIO bits are in input mode */
};
struct snd_ice1712_card_info snd_vt1724_se_cards[] = {
{
.subvendor = VT1724_SUBDEVICE_SE200PCI,
.name = "ONKYO SE200PCI",
.model = "se200pci",
.chip_init = se_init,
.build_controls = se_add_controls,
.eeprom_size = sizeof(se200pci_eeprom),
.eeprom_data = se200pci_eeprom,
},
{
.subvendor = VT1724_SUBDEVICE_SE90PCI,
.name = "ONKYO SE90PCI",
.model = "se90pci",
.chip_init = se_init,
.build_controls = se_add_controls,
.eeprom_size = sizeof(se90pci_eeprom),
.eeprom_data = se90pci_eeprom,
},
{} /*terminator*/
};
| linux-master | sound/pci/ice1712/se.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* ALSA driver for ICEnsemble VT1724 (Envy24HT)
*
* Lowlevel functions for Philips PSC724 Ultimate Edge
*
* Copyright (c) 2012 Ondrej Zary <[email protected]>
*/
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <sound/core.h>
#include "ice1712.h"
#include "envy24ht.h"
#include "psc724.h"
#include "wm8766.h"
#include "wm8776.h"
struct psc724_spec {
struct snd_wm8766 wm8766;
struct snd_wm8776 wm8776;
bool mute_all, jack_detect;
struct snd_ice1712 *ice;
struct delayed_work hp_work;
bool hp_connected;
};
/****************************************************************************/
/* PHILIPS PSC724 ULTIMATE EDGE */
/****************************************************************************/
/*
* VT1722 (Envy24GT) - 6 outputs, 4 inputs (only 2 used), 24-bit/96kHz
*
* system configuration ICE_EEP2_SYSCONF=0x42
* XIN1 49.152MHz
* no MPU401
* one stereo ADC, no S/PDIF receiver
* three stereo DACs (FRONT, REAR, CENTER+LFE)
*
* AC-Link configuration ICE_EEP2_ACLINK=0x80
* use I2S, not AC97
*
* I2S converters feature ICE_EEP2_I2S=0x30
* I2S codec has no volume/mute control feature (bug!)
* I2S codec does not support 96KHz or 192KHz (bug!)
* I2S codec 24bits
*
* S/PDIF configuration ICE_EEP2_SPDIF=0xc1
* Enable integrated S/PDIF transmitter
* internal S/PDIF out implemented
* No S/PDIF input
* External S/PDIF out implemented
*
*
* ** connected chips **
*
* WM8776
* 2-channel DAC used for main output and stereo ADC (with 10-channel MUX)
* AIN1: LINE IN, AIN2: CD/VIDEO, AIN3: AUX, AIN4: Front MIC, AIN5: Rear MIC
* Controlled by I2C using VT1722 I2C interface:
* MODE (pin16) -- GND
* CE (pin17) -- GND I2C mode (address=0x34)
* DI (pin18) -- SDA (VT1722 pin70)
* CL (pin19) -- SCLK (VT1722 pin71)
*
* WM8766
* 6-channel DAC used for rear & center/LFE outputs (only 4 channels used)
* Controlled by SPI using VT1722 GPIO pins:
* MODE (pin 1) -- GPIO19 (VT1722 pin99)
* ML/I2S (pin11) -- GPIO18 (VT1722 pin98)
* MC/IWL (pin12) -- GPIO17 (VT1722 pin97)
* MD/DM (pin13) -- GPIO16 (VT1722 pin96)
* MUTE (pin14) -- GPIO20 (VT1722 pin101)
*
* GPIO14 is used as input for headphone jack detection (1 = connected)
* GPIO22 is used as MUTE ALL output, grounding all 6 channels
*
* ** output pins and device names **
*
* 5.1ch name -- output connector color -- device (-D option)
*
* FRONT 2ch -- green -- plughw:0,0
* CENTER(Lch) SUBWOOFER(Rch) -- orange -- plughw:0,2,0
* REAR 2ch -- black -- plughw:0,2,1
*/
/* codec access low-level functions */
#define GPIO_HP_JACK (1 << 14)
#define GPIO_MUTE_SUR (1 << 20)
#define GPIO_MUTE_ALL (1 << 22)
#define JACK_INTERVAL 1000
#define PSC724_SPI_DELAY 1
#define PSC724_SPI_DATA (1 << 16)
#define PSC724_SPI_CLK (1 << 17)
#define PSC724_SPI_LOAD (1 << 18)
#define PSC724_SPI_MASK (PSC724_SPI_DATA | PSC724_SPI_CLK | PSC724_SPI_LOAD)
static void psc724_wm8766_write(struct snd_wm8766 *wm, u16 addr, u16 data)
{
struct psc724_spec *spec = container_of(wm, struct psc724_spec, wm8766);
struct snd_ice1712 *ice = spec->ice;
u32 st, bits;
int i;
snd_ice1712_save_gpio_status(ice);
st = ((addr & 0x7f) << 9) | (data & 0x1ff);
snd_ice1712_gpio_set_dir(ice, ice->gpio.direction | PSC724_SPI_MASK);
snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask & ~PSC724_SPI_MASK);
bits = snd_ice1712_gpio_read(ice) & ~PSC724_SPI_MASK;
snd_ice1712_gpio_write(ice, bits);
for (i = 0; i < 16; i++) {
udelay(PSC724_SPI_DELAY);
bits &= ~PSC724_SPI_CLK;
/* MSB first */
st <<= 1;
if (st & 0x10000)
bits |= PSC724_SPI_DATA;
else
bits &= ~PSC724_SPI_DATA;
snd_ice1712_gpio_write(ice, bits);
/* CLOCK high */
udelay(PSC724_SPI_DELAY);
bits |= PSC724_SPI_CLK;
snd_ice1712_gpio_write(ice, bits);
}
/* LOAD high */
udelay(PSC724_SPI_DELAY);
bits |= PSC724_SPI_LOAD;
snd_ice1712_gpio_write(ice, bits);
/* LOAD low, DATA and CLOCK high */
udelay(PSC724_SPI_DELAY);
bits |= (PSC724_SPI_DATA | PSC724_SPI_CLK);
snd_ice1712_gpio_write(ice, bits);
snd_ice1712_restore_gpio_status(ice);
}
static void psc724_wm8776_write(struct snd_wm8776 *wm, u8 addr, u8 data)
{
struct psc724_spec *spec = container_of(wm, struct psc724_spec, wm8776);
snd_vt1724_write_i2c(spec->ice, 0x34, addr, data);
}
/* mute all */
static void psc724_set_master_switch(struct snd_ice1712 *ice, bool on)
{
unsigned int bits = snd_ice1712_gpio_read(ice);
struct psc724_spec *spec = ice->spec;
spec->mute_all = !on;
if (on)
bits &= ~(GPIO_MUTE_ALL | GPIO_MUTE_SUR);
else
bits |= GPIO_MUTE_ALL | GPIO_MUTE_SUR;
snd_ice1712_gpio_write(ice, bits);
}
static bool psc724_get_master_switch(struct snd_ice1712 *ice)
{
struct psc724_spec *spec = ice->spec;
return !spec->mute_all;
}
/* jack detection */
static void psc724_set_jack_state(struct snd_ice1712 *ice, bool hp_connected)
{
struct psc724_spec *spec = ice->spec;
struct snd_kcontrol *kctl;
u16 power = spec->wm8776.regs[WM8776_REG_PWRDOWN] & ~WM8776_PWR_HPPD;
psc724_set_master_switch(ice, !hp_connected);
if (!hp_connected)
power |= WM8776_PWR_HPPD;
snd_wm8776_set_power(&spec->wm8776, power);
spec->hp_connected = hp_connected;
/* notify about master speaker mute change */
kctl = snd_ctl_find_id_mixer(ice->card,
"Master Speakers Playback Switch");
if (kctl)
snd_ctl_notify(ice->card, SNDRV_CTL_EVENT_MASK_VALUE, &kctl->id);
/* and headphone mute change */
kctl = snd_ctl_find_id_mixer(ice->card,
spec->wm8776.ctl[WM8776_CTL_HP_SW].name);
if (kctl)
snd_ctl_notify(ice->card, SNDRV_CTL_EVENT_MASK_VALUE, &kctl->id);
}
static void psc724_update_hp_jack_state(struct work_struct *work)
{
struct psc724_spec *spec = container_of(work, struct psc724_spec,
hp_work.work);
struct snd_ice1712 *ice = spec->ice;
bool hp_connected = snd_ice1712_gpio_read(ice) & GPIO_HP_JACK;
schedule_delayed_work(&spec->hp_work, msecs_to_jiffies(JACK_INTERVAL));
if (hp_connected == spec->hp_connected)
return;
psc724_set_jack_state(ice, hp_connected);
}
static void psc724_set_jack_detection(struct snd_ice1712 *ice, bool on)
{
struct psc724_spec *spec = ice->spec;
if (spec->jack_detect == on)
return;
spec->jack_detect = on;
if (on) {
bool hp_connected = snd_ice1712_gpio_read(ice) & GPIO_HP_JACK;
psc724_set_jack_state(ice, hp_connected);
schedule_delayed_work(&spec->hp_work,
msecs_to_jiffies(JACK_INTERVAL));
} else
cancel_delayed_work_sync(&spec->hp_work);
}
static bool psc724_get_jack_detection(struct snd_ice1712 *ice)
{
struct psc724_spec *spec = ice->spec;
return spec->jack_detect;
}
/* mixer controls */
struct psc724_control {
const char *name;
void (*set)(struct snd_ice1712 *ice, bool on);
bool (*get)(struct snd_ice1712 *ice);
};
static const struct psc724_control psc724_cont[] = {
{
.name = "Master Speakers Playback Switch",
.set = psc724_set_master_switch,
.get = psc724_get_master_switch,
},
{
.name = "Headphone Jack Detection Playback Switch",
.set = psc724_set_jack_detection,
.get = psc724_get_jack_detection,
},
};
static int psc724_ctl_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int n = kcontrol->private_value;
ucontrol->value.integer.value[0] = psc724_cont[n].get(ice);
return 0;
}
static int psc724_ctl_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int n = kcontrol->private_value;
psc724_cont[n].set(ice, ucontrol->value.integer.value[0]);
return 0;
}
static const char *front_volume = "Front Playback Volume";
static const char *front_switch = "Front Playback Switch";
static const char *front_zc = "Front Zero Cross Detect Playback Switch";
static const char *front_izd = "Front Infinite Zero Detect Playback Switch";
static const char *front_phase = "Front Phase Invert Playback Switch";
static const char *front_deemph = "Front Deemphasis Playback Switch";
static const char *ain1_switch = "Line Capture Switch";
static const char *ain2_switch = "CD Capture Switch";
static const char *ain3_switch = "AUX Capture Switch";
static const char *ain4_switch = "Front Mic Capture Switch";
static const char *ain5_switch = "Rear Mic Capture Switch";
static const char *rear_volume = "Surround Playback Volume";
static const char *clfe_volume = "CLFE Playback Volume";
static const char *rear_switch = "Surround Playback Switch";
static const char *clfe_switch = "CLFE Playback Switch";
static const char *rear_phase = "Surround Phase Invert Playback Switch";
static const char *clfe_phase = "CLFE Phase Invert Playback Switch";
static const char *rear_deemph = "Surround Deemphasis Playback Switch";
static const char *clfe_deemph = "CLFE Deemphasis Playback Switch";
static const char *rear_clfe_izd = "Rear Infinite Zero Detect Playback Switch";
static const char *rear_clfe_zc = "Rear Zero Cross Detect Playback Switch";
static int psc724_add_controls(struct snd_ice1712 *ice)
{
struct snd_kcontrol_new cont;
struct snd_kcontrol *ctl;
int err, i;
struct psc724_spec *spec = ice->spec;
spec->wm8776.ctl[WM8776_CTL_DAC_VOL].name = front_volume;
spec->wm8776.ctl[WM8776_CTL_DAC_SW].name = front_switch;
spec->wm8776.ctl[WM8776_CTL_DAC_ZC_SW].name = front_zc;
spec->wm8776.ctl[WM8776_CTL_AUX_SW].name = NULL;
spec->wm8776.ctl[WM8776_CTL_DAC_IZD_SW].name = front_izd;
spec->wm8776.ctl[WM8776_CTL_PHASE_SW].name = front_phase;
spec->wm8776.ctl[WM8776_CTL_DEEMPH_SW].name = front_deemph;
spec->wm8776.ctl[WM8776_CTL_INPUT1_SW].name = ain1_switch;
spec->wm8776.ctl[WM8776_CTL_INPUT2_SW].name = ain2_switch;
spec->wm8776.ctl[WM8776_CTL_INPUT3_SW].name = ain3_switch;
spec->wm8776.ctl[WM8776_CTL_INPUT4_SW].name = ain4_switch;
spec->wm8776.ctl[WM8776_CTL_INPUT5_SW].name = ain5_switch;
snd_wm8776_build_controls(&spec->wm8776);
spec->wm8766.ctl[WM8766_CTL_CH1_VOL].name = rear_volume;
spec->wm8766.ctl[WM8766_CTL_CH2_VOL].name = clfe_volume;
spec->wm8766.ctl[WM8766_CTL_CH3_VOL].name = NULL;
spec->wm8766.ctl[WM8766_CTL_CH1_SW].name = rear_switch;
spec->wm8766.ctl[WM8766_CTL_CH2_SW].name = clfe_switch;
spec->wm8766.ctl[WM8766_CTL_CH3_SW].name = NULL;
spec->wm8766.ctl[WM8766_CTL_PHASE1_SW].name = rear_phase;
spec->wm8766.ctl[WM8766_CTL_PHASE2_SW].name = clfe_phase;
spec->wm8766.ctl[WM8766_CTL_PHASE3_SW].name = NULL;
spec->wm8766.ctl[WM8766_CTL_DEEMPH1_SW].name = rear_deemph;
spec->wm8766.ctl[WM8766_CTL_DEEMPH2_SW].name = clfe_deemph;
spec->wm8766.ctl[WM8766_CTL_DEEMPH3_SW].name = NULL;
spec->wm8766.ctl[WM8766_CTL_IZD_SW].name = rear_clfe_izd;
spec->wm8766.ctl[WM8766_CTL_ZC_SW].name = rear_clfe_zc;
snd_wm8766_build_controls(&spec->wm8766);
memset(&cont, 0, sizeof(cont));
cont.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
for (i = 0; i < ARRAY_SIZE(psc724_cont); i++) {
cont.private_value = i;
cont.name = psc724_cont[i].name;
cont.access = SNDRV_CTL_ELEM_ACCESS_READWRITE;
cont.info = snd_ctl_boolean_mono_info;
cont.get = psc724_ctl_get;
cont.put = psc724_ctl_put;
ctl = snd_ctl_new1(&cont, ice);
if (!ctl)
return -ENOMEM;
err = snd_ctl_add(ice->card, ctl);
if (err < 0)
return err;
}
return 0;
}
static void psc724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate)
{
struct psc724_spec *spec = ice->spec;
/* restore codec volume settings after rate change (PMCLK stop) */
snd_wm8776_volume_restore(&spec->wm8776);
snd_wm8766_volume_restore(&spec->wm8766);
}
/* power management */
#ifdef CONFIG_PM_SLEEP
static int psc724_resume(struct snd_ice1712 *ice)
{
struct psc724_spec *spec = ice->spec;
snd_wm8776_resume(&spec->wm8776);
snd_wm8766_resume(&spec->wm8766);
return 0;
}
#endif
/* init */
static int psc724_init(struct snd_ice1712 *ice)
{
struct psc724_spec *spec;
spec = kzalloc(sizeof(*spec), GFP_KERNEL);
if (!spec)
return -ENOMEM;
ice->spec = spec;
spec->ice = ice;
ice->num_total_dacs = 6;
ice->num_total_adcs = 2;
spec->wm8776.ops.write = psc724_wm8776_write;
spec->wm8776.card = ice->card;
snd_wm8776_init(&spec->wm8776);
spec->wm8766.ops.write = psc724_wm8766_write;
spec->wm8766.card = ice->card;
#ifdef CONFIG_PM_SLEEP
ice->pm_resume = psc724_resume;
ice->pm_suspend_enabled = 1;
#endif
snd_wm8766_init(&spec->wm8766);
snd_wm8766_set_if(&spec->wm8766,
WM8766_IF_FMT_I2S | WM8766_IF_IWL_24BIT);
ice->gpio.set_pro_rate = psc724_set_pro_rate;
INIT_DELAYED_WORK(&spec->hp_work, psc724_update_hp_jack_state);
psc724_set_jack_detection(ice, true);
return 0;
}
static void psc724_exit(struct snd_ice1712 *ice)
{
struct psc724_spec *spec = ice->spec;
cancel_delayed_work_sync(&spec->hp_work);
}
/* PSC724 has buggy EEPROM (no 96&192kHz, all FFh GPIOs), so override it here */
static const unsigned char psc724_eeprom[] = {
[ICE_EEP2_SYSCONF] = 0x42, /* 49.152MHz, 1 ADC, 3 DACs */
[ICE_EEP2_ACLINK] = 0x80, /* I2S */
[ICE_EEP2_I2S] = 0xf0, /* I2S volume, 96kHz, 24bit */
[ICE_EEP2_SPDIF] = 0xc1, /* spdif out-en, out-int, no input */
/* GPIO outputs */
[ICE_EEP2_GPIO_DIR2] = 0x5f, /* MUTE_ALL,WM8766 MUTE/MODE/ML/MC/MD */
/* GPIO write enable */
[ICE_EEP2_GPIO_MASK] = 0xff, /* read-only */
[ICE_EEP2_GPIO_MASK1] = 0xff, /* read-only */
[ICE_EEP2_GPIO_MASK2] = 0xa0, /* MUTE_ALL,WM8766 MUTE/MODE/ML/MC/MD */
/* GPIO initial state */
[ICE_EEP2_GPIO_STATE2] = 0x20, /* unmuted, all WM8766 pins low */
};
struct snd_ice1712_card_info snd_vt1724_psc724_cards[] = {
{
.subvendor = VT1724_SUBDEVICE_PSC724,
.name = "Philips PSC724 Ultimate Edge",
.model = "psc724",
.chip_init = psc724_init,
.chip_exit = psc724_exit,
.build_controls = psc724_add_controls,
.eeprom_size = sizeof(psc724_eeprom),
.eeprom_data = psc724_eeprom,
},
{} /*terminator*/
};
| linux-master | sound/pci/ice1712/psc724.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* ALSA driver for ICEnsemble VT17xx
*
* Lowlevel functions for WM8776 codec
*
* Copyright (c) 2012 Ondrej Zary <[email protected]>
*/
#include <linux/delay.h>
#include <sound/core.h>
#include <sound/control.h>
#include <sound/tlv.h>
#include "wm8776.h"
/* low-level access */
static void snd_wm8776_write(struct snd_wm8776 *wm, u16 addr, u16 data)
{
u8 bus_addr = addr << 1 | data >> 8; /* addr + 9th data bit */
u8 bus_data = data & 0xff; /* remaining 8 data bits */
if (addr < WM8776_REG_RESET)
wm->regs[addr] = data;
wm->ops.write(wm, bus_addr, bus_data);
}
/* register-level functions */
static void snd_wm8776_activate_ctl(struct snd_wm8776 *wm,
const char *ctl_name,
bool active)
{
struct snd_card *card = wm->card;
struct snd_kcontrol *kctl;
struct snd_kcontrol_volatile *vd;
unsigned int index_offset;
kctl = snd_ctl_find_id_mixer(card, ctl_name);
if (!kctl)
return;
index_offset = snd_ctl_get_ioff(kctl, &kctl->id);
vd = &kctl->vd[index_offset];
if (active)
vd->access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
else
vd->access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
snd_ctl_notify(card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
}
static void snd_wm8776_update_agc_ctl(struct snd_wm8776 *wm)
{
int i, flags_on = 0, flags_off = 0;
switch (wm->agc_mode) {
case WM8776_AGC_OFF:
flags_off = WM8776_FLAG_LIM | WM8776_FLAG_ALC;
break;
case WM8776_AGC_LIM:
flags_off = WM8776_FLAG_ALC;
flags_on = WM8776_FLAG_LIM;
break;
case WM8776_AGC_ALC_R:
case WM8776_AGC_ALC_L:
case WM8776_AGC_ALC_STEREO:
flags_off = WM8776_FLAG_LIM;
flags_on = WM8776_FLAG_ALC;
break;
}
for (i = 0; i < WM8776_CTL_COUNT; i++)
if (wm->ctl[i].flags & flags_off)
snd_wm8776_activate_ctl(wm, wm->ctl[i].name, false);
else if (wm->ctl[i].flags & flags_on)
snd_wm8776_activate_ctl(wm, wm->ctl[i].name, true);
}
static void snd_wm8776_set_agc(struct snd_wm8776 *wm, u16 agc, u16 nothing)
{
u16 alc1 = wm->regs[WM8776_REG_ALCCTRL1] & ~WM8776_ALC1_LCT_MASK;
u16 alc2 = wm->regs[WM8776_REG_ALCCTRL2] & ~WM8776_ALC2_LCEN;
switch (agc) {
case 0: /* Off */
wm->agc_mode = WM8776_AGC_OFF;
break;
case 1: /* Limiter */
alc2 |= WM8776_ALC2_LCEN;
wm->agc_mode = WM8776_AGC_LIM;
break;
case 2: /* ALC Right */
alc1 |= WM8776_ALC1_LCSEL_ALCR;
alc2 |= WM8776_ALC2_LCEN;
wm->agc_mode = WM8776_AGC_ALC_R;
break;
case 3: /* ALC Left */
alc1 |= WM8776_ALC1_LCSEL_ALCL;
alc2 |= WM8776_ALC2_LCEN;
wm->agc_mode = WM8776_AGC_ALC_L;
break;
case 4: /* ALC Stereo */
alc1 |= WM8776_ALC1_LCSEL_ALCSTEREO;
alc2 |= WM8776_ALC2_LCEN;
wm->agc_mode = WM8776_AGC_ALC_STEREO;
break;
}
snd_wm8776_write(wm, WM8776_REG_ALCCTRL1, alc1);
snd_wm8776_write(wm, WM8776_REG_ALCCTRL2, alc2);
snd_wm8776_update_agc_ctl(wm);
}
static void snd_wm8776_get_agc(struct snd_wm8776 *wm, u16 *mode, u16 *nothing)
{
*mode = wm->agc_mode;
}
/* mixer controls */
static const DECLARE_TLV_DB_SCALE(wm8776_hp_tlv, -7400, 100, 1);
static const DECLARE_TLV_DB_SCALE(wm8776_dac_tlv, -12750, 50, 1);
static const DECLARE_TLV_DB_SCALE(wm8776_adc_tlv, -10350, 50, 1);
static const DECLARE_TLV_DB_SCALE(wm8776_lct_tlv, -1600, 100, 0);
static const DECLARE_TLV_DB_SCALE(wm8776_maxgain_tlv, 0, 400, 0);
static const DECLARE_TLV_DB_SCALE(wm8776_ngth_tlv, -7800, 600, 0);
static const DECLARE_TLV_DB_SCALE(wm8776_maxatten_lim_tlv, -1200, 100, 0);
static const DECLARE_TLV_DB_SCALE(wm8776_maxatten_alc_tlv, -2100, 400, 0);
static const struct snd_wm8776_ctl snd_wm8776_default_ctl[WM8776_CTL_COUNT] = {
[WM8776_CTL_DAC_VOL] = {
.name = "Master Playback Volume",
.type = SNDRV_CTL_ELEM_TYPE_INTEGER,
.tlv = wm8776_dac_tlv,
.reg1 = WM8776_REG_DACLVOL,
.reg2 = WM8776_REG_DACRVOL,
.mask1 = WM8776_DACVOL_MASK,
.mask2 = WM8776_DACVOL_MASK,
.max = 0xff,
.flags = WM8776_FLAG_STEREO | WM8776_FLAG_VOL_UPDATE,
},
[WM8776_CTL_DAC_SW] = {
.name = "Master Playback Switch",
.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN,
.reg1 = WM8776_REG_DACCTRL1,
.reg2 = WM8776_REG_DACCTRL1,
.mask1 = WM8776_DAC_PL_LL,
.mask2 = WM8776_DAC_PL_RR,
.flags = WM8776_FLAG_STEREO,
},
[WM8776_CTL_DAC_ZC_SW] = {
.name = "Master Zero Cross Detect Playback Switch",
.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN,
.reg1 = WM8776_REG_DACCTRL1,
.mask1 = WM8776_DAC_DZCEN,
},
[WM8776_CTL_HP_VOL] = {
.name = "Headphone Playback Volume",
.type = SNDRV_CTL_ELEM_TYPE_INTEGER,
.tlv = wm8776_hp_tlv,
.reg1 = WM8776_REG_HPLVOL,
.reg2 = WM8776_REG_HPRVOL,
.mask1 = WM8776_HPVOL_MASK,
.mask2 = WM8776_HPVOL_MASK,
.min = 0x2f,
.max = 0x7f,
.flags = WM8776_FLAG_STEREO | WM8776_FLAG_VOL_UPDATE,
},
[WM8776_CTL_HP_SW] = {
.name = "Headphone Playback Switch",
.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN,
.reg1 = WM8776_REG_PWRDOWN,
.mask1 = WM8776_PWR_HPPD,
.flags = WM8776_FLAG_INVERT,
},
[WM8776_CTL_HP_ZC_SW] = {
.name = "Headphone Zero Cross Detect Playback Switch",
.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN,
.reg1 = WM8776_REG_HPLVOL,
.reg2 = WM8776_REG_HPRVOL,
.mask1 = WM8776_VOL_HPZCEN,
.mask2 = WM8776_VOL_HPZCEN,
.flags = WM8776_FLAG_STEREO,
},
[WM8776_CTL_AUX_SW] = {
.name = "AUX Playback Switch",
.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN,
.reg1 = WM8776_REG_OUTMUX,
.mask1 = WM8776_OUTMUX_AUX,
},
[WM8776_CTL_BYPASS_SW] = {
.name = "Bypass Playback Switch",
.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN,
.reg1 = WM8776_REG_OUTMUX,
.mask1 = WM8776_OUTMUX_BYPASS,
},
[WM8776_CTL_DAC_IZD_SW] = {
.name = "Infinite Zero Detect Playback Switch",
.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN,
.reg1 = WM8776_REG_DACCTRL1,
.mask1 = WM8776_DAC_IZD,
},
[WM8776_CTL_PHASE_SW] = {
.name = "Phase Invert Playback Switch",
.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN,
.reg1 = WM8776_REG_PHASESWAP,
.reg2 = WM8776_REG_PHASESWAP,
.mask1 = WM8776_PHASE_INVERTL,
.mask2 = WM8776_PHASE_INVERTR,
.flags = WM8776_FLAG_STEREO,
},
[WM8776_CTL_DEEMPH_SW] = {
.name = "Deemphasis Playback Switch",
.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN,
.reg1 = WM8776_REG_DACCTRL2,
.mask1 = WM8776_DAC2_DEEMPH,
},
[WM8776_CTL_ADC_VOL] = {
.name = "Input Capture Volume",
.type = SNDRV_CTL_ELEM_TYPE_INTEGER,
.tlv = wm8776_adc_tlv,
.reg1 = WM8776_REG_ADCLVOL,
.reg2 = WM8776_REG_ADCRVOL,
.mask1 = WM8776_ADC_GAIN_MASK,
.mask2 = WM8776_ADC_GAIN_MASK,
.max = 0xff,
.flags = WM8776_FLAG_STEREO | WM8776_FLAG_VOL_UPDATE,
},
[WM8776_CTL_ADC_SW] = {
.name = "Input Capture Switch",
.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN,
.reg1 = WM8776_REG_ADCMUX,
.reg2 = WM8776_REG_ADCMUX,
.mask1 = WM8776_ADC_MUTEL,
.mask2 = WM8776_ADC_MUTER,
.flags = WM8776_FLAG_STEREO | WM8776_FLAG_INVERT,
},
[WM8776_CTL_INPUT1_SW] = {
.name = "AIN1 Capture Switch",
.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN,
.reg1 = WM8776_REG_ADCMUX,
.mask1 = WM8776_ADC_MUX_AIN1,
},
[WM8776_CTL_INPUT2_SW] = {
.name = "AIN2 Capture Switch",
.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN,
.reg1 = WM8776_REG_ADCMUX,
.mask1 = WM8776_ADC_MUX_AIN2,
},
[WM8776_CTL_INPUT3_SW] = {
.name = "AIN3 Capture Switch",
.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN,
.reg1 = WM8776_REG_ADCMUX,
.mask1 = WM8776_ADC_MUX_AIN3,
},
[WM8776_CTL_INPUT4_SW] = {
.name = "AIN4 Capture Switch",
.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN,
.reg1 = WM8776_REG_ADCMUX,
.mask1 = WM8776_ADC_MUX_AIN4,
},
[WM8776_CTL_INPUT5_SW] = {
.name = "AIN5 Capture Switch",
.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN,
.reg1 = WM8776_REG_ADCMUX,
.mask1 = WM8776_ADC_MUX_AIN5,
},
[WM8776_CTL_AGC_SEL] = {
.name = "AGC Select Capture Enum",
.type = SNDRV_CTL_ELEM_TYPE_ENUMERATED,
.enum_names = { "Off", "Limiter", "ALC Right", "ALC Left",
"ALC Stereo" },
.max = 5, /* .enum_names item count */
.set = snd_wm8776_set_agc,
.get = snd_wm8776_get_agc,
},
[WM8776_CTL_LIM_THR] = {
.name = "Limiter Threshold Capture Volume",
.type = SNDRV_CTL_ELEM_TYPE_INTEGER,
.tlv = wm8776_lct_tlv,
.reg1 = WM8776_REG_ALCCTRL1,
.mask1 = WM8776_ALC1_LCT_MASK,
.max = 15,
.flags = WM8776_FLAG_LIM,
},
[WM8776_CTL_LIM_ATK] = {
.name = "Limiter Attack Time Capture Enum",
.type = SNDRV_CTL_ELEM_TYPE_ENUMERATED,
.enum_names = { "0.25 ms", "0.5 ms", "1 ms", "2 ms", "4 ms",
"8 ms", "16 ms", "32 ms", "64 ms", "128 ms", "256 ms" },
.max = 11, /* .enum_names item count */
.reg1 = WM8776_REG_ALCCTRL3,
.mask1 = WM8776_ALC3_ATK_MASK,
.flags = WM8776_FLAG_LIM,
},
[WM8776_CTL_LIM_DCY] = {
.name = "Limiter Decay Time Capture Enum",
.type = SNDRV_CTL_ELEM_TYPE_ENUMERATED,
.enum_names = { "1.2 ms", "2.4 ms", "4.8 ms", "9.6 ms",
"19.2 ms", "38.4 ms", "76.8 ms", "154 ms", "307 ms",
"614 ms", "1.23 s" },
.max = 11, /* .enum_names item count */
.reg1 = WM8776_REG_ALCCTRL3,
.mask1 = WM8776_ALC3_DCY_MASK,
.flags = WM8776_FLAG_LIM,
},
[WM8776_CTL_LIM_TRANWIN] = {
.name = "Limiter Transient Window Capture Enum",
.type = SNDRV_CTL_ELEM_TYPE_ENUMERATED,
.enum_names = { "0 us", "62.5 us", "125 us", "250 us", "500 us",
"1 ms", "2 ms", "4 ms" },
.max = 8, /* .enum_names item count */
.reg1 = WM8776_REG_LIMITER,
.mask1 = WM8776_LIM_TRANWIN_MASK,
.flags = WM8776_FLAG_LIM,
},
[WM8776_CTL_LIM_MAXATTN] = {
.name = "Limiter Maximum Attenuation Capture Volume",
.type = SNDRV_CTL_ELEM_TYPE_INTEGER,
.tlv = wm8776_maxatten_lim_tlv,
.reg1 = WM8776_REG_LIMITER,
.mask1 = WM8776_LIM_MAXATTEN_MASK,
.min = 3,
.max = 12,
.flags = WM8776_FLAG_LIM | WM8776_FLAG_INVERT,
},
[WM8776_CTL_ALC_TGT] = {
.name = "ALC Target Level Capture Volume",
.type = SNDRV_CTL_ELEM_TYPE_INTEGER,
.tlv = wm8776_lct_tlv,
.reg1 = WM8776_REG_ALCCTRL1,
.mask1 = WM8776_ALC1_LCT_MASK,
.max = 15,
.flags = WM8776_FLAG_ALC,
},
[WM8776_CTL_ALC_ATK] = {
.name = "ALC Attack Time Capture Enum",
.type = SNDRV_CTL_ELEM_TYPE_ENUMERATED,
.enum_names = { "8.40 ms", "16.8 ms", "33.6 ms", "67.2 ms",
"134 ms", "269 ms", "538 ms", "1.08 s", "2.15 s",
"4.3 s", "8.6 s" },
.max = 11, /* .enum_names item count */
.reg1 = WM8776_REG_ALCCTRL3,
.mask1 = WM8776_ALC3_ATK_MASK,
.flags = WM8776_FLAG_ALC,
},
[WM8776_CTL_ALC_DCY] = {
.name = "ALC Decay Time Capture Enum",
.type = SNDRV_CTL_ELEM_TYPE_ENUMERATED,
.enum_names = { "33.5 ms", "67.0 ms", "134 ms", "268 ms",
"536 ms", "1.07 s", "2.14 s", "4.29 s", "8.58 s",
"17.2 s", "34.3 s" },
.max = 11, /* .enum_names item count */
.reg1 = WM8776_REG_ALCCTRL3,
.mask1 = WM8776_ALC3_DCY_MASK,
.flags = WM8776_FLAG_ALC,
},
[WM8776_CTL_ALC_MAXGAIN] = {
.name = "ALC Maximum Gain Capture Volume",
.type = SNDRV_CTL_ELEM_TYPE_INTEGER,
.tlv = wm8776_maxgain_tlv,
.reg1 = WM8776_REG_ALCCTRL1,
.mask1 = WM8776_ALC1_MAXGAIN_MASK,
.min = 1,
.max = 7,
.flags = WM8776_FLAG_ALC,
},
[WM8776_CTL_ALC_MAXATTN] = {
.name = "ALC Maximum Attenuation Capture Volume",
.type = SNDRV_CTL_ELEM_TYPE_INTEGER,
.tlv = wm8776_maxatten_alc_tlv,
.reg1 = WM8776_REG_LIMITER,
.mask1 = WM8776_LIM_MAXATTEN_MASK,
.min = 10,
.max = 15,
.flags = WM8776_FLAG_ALC | WM8776_FLAG_INVERT,
},
[WM8776_CTL_ALC_HLD] = {
.name = "ALC Hold Time Capture Enum",
.type = SNDRV_CTL_ELEM_TYPE_ENUMERATED,
.enum_names = { "0 ms", "2.67 ms", "5.33 ms", "10.6 ms",
"21.3 ms", "42.7 ms", "85.3 ms", "171 ms", "341 ms",
"683 ms", "1.37 s", "2.73 s", "5.46 s", "10.9 s",
"21.8 s", "43.7 s" },
.max = 16, /* .enum_names item count */
.reg1 = WM8776_REG_ALCCTRL2,
.mask1 = WM8776_ALC2_HOLD_MASK,
.flags = WM8776_FLAG_ALC,
},
[WM8776_CTL_NGT_SW] = {
.name = "Noise Gate Capture Switch",
.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN,
.reg1 = WM8776_REG_NOISEGATE,
.mask1 = WM8776_NGAT_ENABLE,
.flags = WM8776_FLAG_ALC,
},
[WM8776_CTL_NGT_THR] = {
.name = "Noise Gate Threshold Capture Volume",
.type = SNDRV_CTL_ELEM_TYPE_INTEGER,
.tlv = wm8776_ngth_tlv,
.reg1 = WM8776_REG_NOISEGATE,
.mask1 = WM8776_NGAT_THR_MASK,
.max = 7,
.flags = WM8776_FLAG_ALC,
},
};
/* exported functions */
void snd_wm8776_init(struct snd_wm8776 *wm)
{
int i;
static const u16 default_values[] = {
0x000, 0x100, 0x000,
0x000, 0x100, 0x000,
0x000, 0x090, 0x000, 0x000,
0x022, 0x022, 0x022,
0x008, 0x0cf, 0x0cf, 0x07b, 0x000,
0x032, 0x000, 0x0a6, 0x001, 0x001
};
memcpy(wm->ctl, snd_wm8776_default_ctl, sizeof(wm->ctl));
snd_wm8776_write(wm, WM8776_REG_RESET, 0x00); /* reset */
udelay(10);
/* load defaults */
for (i = 0; i < ARRAY_SIZE(default_values); i++)
snd_wm8776_write(wm, i, default_values[i]);
}
void snd_wm8776_resume(struct snd_wm8776 *wm)
{
int i;
for (i = 0; i < WM8776_REG_COUNT; i++)
snd_wm8776_write(wm, i, wm->regs[i]);
}
void snd_wm8776_set_power(struct snd_wm8776 *wm, u16 power)
{
snd_wm8776_write(wm, WM8776_REG_PWRDOWN, power);
}
void snd_wm8776_volume_restore(struct snd_wm8776 *wm)
{
u16 val = wm->regs[WM8776_REG_DACRVOL];
/* restore volume after MCLK stopped */
snd_wm8776_write(wm, WM8776_REG_DACRVOL, val | WM8776_VOL_UPDATE);
}
/* mixer callbacks */
static int snd_wm8776_volume_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
struct snd_wm8776 *wm = snd_kcontrol_chip(kcontrol);
int n = kcontrol->private_value;
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = (wm->ctl[n].flags & WM8776_FLAG_STEREO) ? 2 : 1;
uinfo->value.integer.min = wm->ctl[n].min;
uinfo->value.integer.max = wm->ctl[n].max;
return 0;
}
static int snd_wm8776_enum_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
struct snd_wm8776 *wm = snd_kcontrol_chip(kcontrol);
int n = kcontrol->private_value;
return snd_ctl_enum_info(uinfo, 1, wm->ctl[n].max,
wm->ctl[n].enum_names);
}
static int snd_wm8776_ctl_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_wm8776 *wm = snd_kcontrol_chip(kcontrol);
int n = kcontrol->private_value;
u16 val1, val2;
if (wm->ctl[n].get)
wm->ctl[n].get(wm, &val1, &val2);
else {
val1 = wm->regs[wm->ctl[n].reg1] & wm->ctl[n].mask1;
val1 >>= __ffs(wm->ctl[n].mask1);
if (wm->ctl[n].flags & WM8776_FLAG_STEREO) {
val2 = wm->regs[wm->ctl[n].reg2] & wm->ctl[n].mask2;
val2 >>= __ffs(wm->ctl[n].mask2);
if (wm->ctl[n].flags & WM8776_FLAG_VOL_UPDATE)
val2 &= ~WM8776_VOL_UPDATE;
}
}
if (wm->ctl[n].flags & WM8776_FLAG_INVERT) {
val1 = wm->ctl[n].max - (val1 - wm->ctl[n].min);
if (wm->ctl[n].flags & WM8776_FLAG_STEREO)
val2 = wm->ctl[n].max - (val2 - wm->ctl[n].min);
}
ucontrol->value.integer.value[0] = val1;
if (wm->ctl[n].flags & WM8776_FLAG_STEREO)
ucontrol->value.integer.value[1] = val2;
return 0;
}
static int snd_wm8776_ctl_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_wm8776 *wm = snd_kcontrol_chip(kcontrol);
int n = kcontrol->private_value;
u16 val, regval1, regval2;
/* this also works for enum because value is a union */
regval1 = ucontrol->value.integer.value[0];
regval2 = ucontrol->value.integer.value[1];
if (wm->ctl[n].flags & WM8776_FLAG_INVERT) {
regval1 = wm->ctl[n].max - (regval1 - wm->ctl[n].min);
regval2 = wm->ctl[n].max - (regval2 - wm->ctl[n].min);
}
if (wm->ctl[n].set)
wm->ctl[n].set(wm, regval1, regval2);
else {
val = wm->regs[wm->ctl[n].reg1] & ~wm->ctl[n].mask1;
val |= regval1 << __ffs(wm->ctl[n].mask1);
/* both stereo controls in one register */
if (wm->ctl[n].flags & WM8776_FLAG_STEREO &&
wm->ctl[n].reg1 == wm->ctl[n].reg2) {
val &= ~wm->ctl[n].mask2;
val |= regval2 << __ffs(wm->ctl[n].mask2);
}
snd_wm8776_write(wm, wm->ctl[n].reg1, val);
/* stereo controls in different registers */
if (wm->ctl[n].flags & WM8776_FLAG_STEREO &&
wm->ctl[n].reg1 != wm->ctl[n].reg2) {
val = wm->regs[wm->ctl[n].reg2] & ~wm->ctl[n].mask2;
val |= regval2 << __ffs(wm->ctl[n].mask2);
if (wm->ctl[n].flags & WM8776_FLAG_VOL_UPDATE)
val |= WM8776_VOL_UPDATE;
snd_wm8776_write(wm, wm->ctl[n].reg2, val);
}
}
return 0;
}
static int snd_wm8776_add_control(struct snd_wm8776 *wm, int num)
{
struct snd_kcontrol_new cont;
struct snd_kcontrol *ctl;
memset(&cont, 0, sizeof(cont));
cont.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
cont.private_value = num;
cont.name = wm->ctl[num].name;
cont.access = SNDRV_CTL_ELEM_ACCESS_READWRITE;
if (wm->ctl[num].flags & WM8776_FLAG_LIM ||
wm->ctl[num].flags & WM8776_FLAG_ALC)
cont.access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
cont.tlv.p = NULL;
cont.get = snd_wm8776_ctl_get;
cont.put = snd_wm8776_ctl_put;
switch (wm->ctl[num].type) {
case SNDRV_CTL_ELEM_TYPE_INTEGER:
cont.info = snd_wm8776_volume_info;
cont.access |= SNDRV_CTL_ELEM_ACCESS_TLV_READ;
cont.tlv.p = wm->ctl[num].tlv;
break;
case SNDRV_CTL_ELEM_TYPE_BOOLEAN:
wm->ctl[num].max = 1;
if (wm->ctl[num].flags & WM8776_FLAG_STEREO)
cont.info = snd_ctl_boolean_stereo_info;
else
cont.info = snd_ctl_boolean_mono_info;
break;
case SNDRV_CTL_ELEM_TYPE_ENUMERATED:
cont.info = snd_wm8776_enum_info;
break;
default:
return -EINVAL;
}
ctl = snd_ctl_new1(&cont, wm);
if (!ctl)
return -ENOMEM;
return snd_ctl_add(wm->card, ctl);
}
int snd_wm8776_build_controls(struct snd_wm8776 *wm)
{
int err, i;
for (i = 0; i < WM8776_CTL_COUNT; i++)
if (wm->ctl[i].name) {
err = snd_wm8776_add_control(wm, i);
if (err < 0)
return err;
}
return 0;
}
| linux-master | sound/pci/ice1712/wm8776.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* ALSA driver for ICEnsemble VT1724 (Envy24HT)
*
* Lowlevel functions for Terratec Aureon cards
*
* Copyright (c) 2003 Takashi Iwai <[email protected]>
*
* NOTES:
*
* - we reuse the struct snd_akm4xxx record for storing the wm8770 codec data.
* both wm and akm codecs are pretty similar, so we can integrate
* both controls in the future, once if wm codecs are reused in
* many boards.
*
* - DAC digital volumes are not implemented in the mixer.
* if they show better response than DAC analog volumes, we can use them
* instead.
*
* Lowlevel functions for AudioTrak Prodigy 7.1 (and possibly 192) cards
* Copyright (c) 2003 Dimitromanolakis Apostolos <[email protected]>
*
* version 0.82: Stable / not all features work yet (no communication with AC97 secondary)
* added 64x/128x oversampling switch (should be 64x only for 96khz)
* fixed some recording labels (still need to check the rest)
* recording is working probably thanks to correct wm8770 initialization
*
* version 0.5: Initial release:
* working: analog output, mixer, headphone amplifier switch
* not working: prety much everything else, at least i could verify that
* we have no digital output, no capture, pretty bad clicks and poops
* on mixer switch and other coll stuff.
*/
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/mutex.h>
#include <sound/core.h>
#include "ice1712.h"
#include "envy24ht.h"
#include "aureon.h"
#include <sound/tlv.h>
/* AC97 register cache for Aureon */
struct aureon_spec {
unsigned short stac9744[64];
unsigned int cs8415_mux;
unsigned short master[2];
unsigned short vol[8];
unsigned char pca9554_out;
};
/* WM8770 registers */
#define WM_DAC_ATTEN 0x00 /* DAC1-8 analog attenuation */
#define WM_DAC_MASTER_ATTEN 0x08 /* DAC master analog attenuation */
#define WM_DAC_DIG_ATTEN 0x09 /* DAC1-8 digital attenuation */
#define WM_DAC_DIG_MASTER_ATTEN 0x11 /* DAC master digital attenuation */
#define WM_PHASE_SWAP 0x12 /* DAC phase */
#define WM_DAC_CTRL1 0x13 /* DAC control bits */
#define WM_MUTE 0x14 /* mute controls */
#define WM_DAC_CTRL2 0x15 /* de-emphasis and zefo-flag */
#define WM_INT_CTRL 0x16 /* interface control */
#define WM_MASTER 0x17 /* master clock and mode */
#define WM_POWERDOWN 0x18 /* power-down controls */
#define WM_ADC_GAIN 0x19 /* ADC gain L(19)/R(1a) */
#define WM_ADC_MUX 0x1b /* input MUX */
#define WM_OUT_MUX1 0x1c /* output MUX */
#define WM_OUT_MUX2 0x1e /* output MUX */
#define WM_RESET 0x1f /* software reset */
/* CS8415A registers */
#define CS8415_CTRL1 0x01
#define CS8415_CTRL2 0x02
#define CS8415_QSUB 0x14
#define CS8415_RATIO 0x1E
#define CS8415_C_BUFFER 0x20
#define CS8415_ID 0x7F
/* PCA9554 registers */
#define PCA9554_DEV 0x40 /* I2C device address */
#define PCA9554_IN 0x00 /* input port */
#define PCA9554_OUT 0x01 /* output port */
#define PCA9554_INVERT 0x02 /* input invert */
#define PCA9554_DIR 0x03 /* port directions */
/*
* Aureon Universe additional controls using PCA9554
*/
/*
* Send data to pca9554
*/
static void aureon_pca9554_write(struct snd_ice1712 *ice, unsigned char reg,
unsigned char data)
{
unsigned int tmp;
int i, j;
unsigned char dev = PCA9554_DEV; /* ID 0100000, write */
unsigned char val = 0;
tmp = snd_ice1712_gpio_read(ice);
snd_ice1712_gpio_set_mask(ice, ~(AUREON_SPI_MOSI|AUREON_SPI_CLK|
AUREON_WM_RW|AUREON_WM_CS|
AUREON_CS8415_CS));
tmp |= AUREON_WM_RW;
tmp |= AUREON_CS8415_CS | AUREON_WM_CS; /* disable SPI devices */
tmp &= ~AUREON_SPI_MOSI;
tmp &= ~AUREON_SPI_CLK;
snd_ice1712_gpio_write(ice, tmp);
udelay(50);
/*
* send i2c stop condition and start condition
* to obtain sane state
*/
tmp |= AUREON_SPI_CLK;
snd_ice1712_gpio_write(ice, tmp);
udelay(50);
tmp |= AUREON_SPI_MOSI;
snd_ice1712_gpio_write(ice, tmp);
udelay(100);
tmp &= ~AUREON_SPI_MOSI;
snd_ice1712_gpio_write(ice, tmp);
udelay(50);
tmp &= ~AUREON_SPI_CLK;
snd_ice1712_gpio_write(ice, tmp);
udelay(100);
/*
* send device address, command and value,
* skipping ack cycles in between
*/
for (j = 0; j < 3; j++) {
switch (j) {
case 0:
val = dev;
break;
case 1:
val = reg;
break;
case 2:
val = data;
break;
}
for (i = 7; i >= 0; i--) {
tmp &= ~AUREON_SPI_CLK;
snd_ice1712_gpio_write(ice, tmp);
udelay(40);
if (val & (1 << i))
tmp |= AUREON_SPI_MOSI;
else
tmp &= ~AUREON_SPI_MOSI;
snd_ice1712_gpio_write(ice, tmp);
udelay(40);
tmp |= AUREON_SPI_CLK;
snd_ice1712_gpio_write(ice, tmp);
udelay(40);
}
tmp &= ~AUREON_SPI_CLK;
snd_ice1712_gpio_write(ice, tmp);
udelay(40);
tmp |= AUREON_SPI_CLK;
snd_ice1712_gpio_write(ice, tmp);
udelay(40);
tmp &= ~AUREON_SPI_CLK;
snd_ice1712_gpio_write(ice, tmp);
udelay(40);
}
tmp &= ~AUREON_SPI_CLK;
snd_ice1712_gpio_write(ice, tmp);
udelay(40);
tmp &= ~AUREON_SPI_MOSI;
snd_ice1712_gpio_write(ice, tmp);
udelay(40);
tmp |= AUREON_SPI_CLK;
snd_ice1712_gpio_write(ice, tmp);
udelay(50);
tmp |= AUREON_SPI_MOSI;
snd_ice1712_gpio_write(ice, tmp);
udelay(100);
}
static int aureon_universe_inmux_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
static const char * const texts[3] =
{"Internal Aux", "Wavetable", "Rear Line-In"};
return snd_ctl_enum_info(uinfo, 1, 3, texts);
}
static int aureon_universe_inmux_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
struct aureon_spec *spec = ice->spec;
ucontrol->value.enumerated.item[0] = spec->pca9554_out;
return 0;
}
static int aureon_universe_inmux_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
struct aureon_spec *spec = ice->spec;
unsigned char oval, nval;
int change;
nval = ucontrol->value.enumerated.item[0];
if (nval >= 3)
return -EINVAL;
snd_ice1712_save_gpio_status(ice);
oval = spec->pca9554_out;
change = (oval != nval);
if (change) {
aureon_pca9554_write(ice, PCA9554_OUT, nval);
spec->pca9554_out = nval;
}
snd_ice1712_restore_gpio_status(ice);
return change;
}
static void aureon_ac97_write(struct snd_ice1712 *ice, unsigned short reg,
unsigned short val)
{
struct aureon_spec *spec = ice->spec;
unsigned int tmp;
/* Send address to XILINX chip */
tmp = (snd_ice1712_gpio_read(ice) & ~0xFF) | (reg & 0x7F);
snd_ice1712_gpio_write(ice, tmp);
udelay(10);
tmp |= AUREON_AC97_ADDR;
snd_ice1712_gpio_write(ice, tmp);
udelay(10);
tmp &= ~AUREON_AC97_ADDR;
snd_ice1712_gpio_write(ice, tmp);
udelay(10);
/* Send low-order byte to XILINX chip */
tmp &= ~AUREON_AC97_DATA_MASK;
tmp |= val & AUREON_AC97_DATA_MASK;
snd_ice1712_gpio_write(ice, tmp);
udelay(10);
tmp |= AUREON_AC97_DATA_LOW;
snd_ice1712_gpio_write(ice, tmp);
udelay(10);
tmp &= ~AUREON_AC97_DATA_LOW;
snd_ice1712_gpio_write(ice, tmp);
udelay(10);
/* Send high-order byte to XILINX chip */
tmp &= ~AUREON_AC97_DATA_MASK;
tmp |= (val >> 8) & AUREON_AC97_DATA_MASK;
snd_ice1712_gpio_write(ice, tmp);
udelay(10);
tmp |= AUREON_AC97_DATA_HIGH;
snd_ice1712_gpio_write(ice, tmp);
udelay(10);
tmp &= ~AUREON_AC97_DATA_HIGH;
snd_ice1712_gpio_write(ice, tmp);
udelay(10);
/* Instruct XILINX chip to parse the data to the STAC9744 chip */
tmp |= AUREON_AC97_COMMIT;
snd_ice1712_gpio_write(ice, tmp);
udelay(10);
tmp &= ~AUREON_AC97_COMMIT;
snd_ice1712_gpio_write(ice, tmp);
udelay(10);
/* Store the data in out private buffer */
spec->stac9744[(reg & 0x7F) >> 1] = val;
}
static unsigned short aureon_ac97_read(struct snd_ice1712 *ice, unsigned short reg)
{
struct aureon_spec *spec = ice->spec;
return spec->stac9744[(reg & 0x7F) >> 1];
}
/*
* Initialize STAC9744 chip
*/
static int aureon_ac97_init(struct snd_ice1712 *ice)
{
struct aureon_spec *spec = ice->spec;
int i;
static const unsigned short ac97_defaults[] = {
0x00, 0x9640,
0x02, 0x8000,
0x04, 0x8000,
0x06, 0x8000,
0x0C, 0x8008,
0x0E, 0x8008,
0x10, 0x8808,
0x12, 0x8808,
0x14, 0x8808,
0x16, 0x8808,
0x18, 0x8808,
0x1C, 0x8000,
0x26, 0x000F,
0x28, 0x0201,
0x2C, 0xBB80,
0x32, 0xBB80,
0x7C, 0x8384,
0x7E, 0x7644,
(unsigned short)-1
};
unsigned int tmp;
/* Cold reset */
tmp = (snd_ice1712_gpio_read(ice) | AUREON_AC97_RESET) & ~AUREON_AC97_DATA_MASK;
snd_ice1712_gpio_write(ice, tmp);
udelay(3);
tmp &= ~AUREON_AC97_RESET;
snd_ice1712_gpio_write(ice, tmp);
udelay(3);
tmp |= AUREON_AC97_RESET;
snd_ice1712_gpio_write(ice, tmp);
udelay(3);
memset(&spec->stac9744, 0, sizeof(spec->stac9744));
for (i = 0; ac97_defaults[i] != (unsigned short)-1; i += 2)
spec->stac9744[(ac97_defaults[i]) >> 1] = ac97_defaults[i+1];
/* Unmute AC'97 master volume permanently - muting is done by WM8770 */
aureon_ac97_write(ice, AC97_MASTER, 0x0000);
return 0;
}
#define AUREON_AC97_STEREO 0x80
/*
* AC'97 volume controls
*/
static int aureon_ac97_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = kcontrol->private_value & AUREON_AC97_STEREO ? 2 : 1;
uinfo->value.integer.min = 0;
uinfo->value.integer.max = 31;
return 0;
}
static int aureon_ac97_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned short vol;
mutex_lock(&ice->gpio_mutex);
vol = aureon_ac97_read(ice, kcontrol->private_value & 0x7F);
ucontrol->value.integer.value[0] = 0x1F - (vol & 0x1F);
if (kcontrol->private_value & AUREON_AC97_STEREO)
ucontrol->value.integer.value[1] = 0x1F - ((vol >> 8) & 0x1F);
mutex_unlock(&ice->gpio_mutex);
return 0;
}
static int aureon_ac97_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned short ovol, nvol;
int change;
snd_ice1712_save_gpio_status(ice);
ovol = aureon_ac97_read(ice, kcontrol->private_value & 0x7F);
nvol = (0x1F - ucontrol->value.integer.value[0]) & 0x001F;
if (kcontrol->private_value & AUREON_AC97_STEREO)
nvol |= ((0x1F - ucontrol->value.integer.value[1]) << 8) & 0x1F00;
nvol |= ovol & ~0x1F1F;
change = (ovol != nvol);
if (change)
aureon_ac97_write(ice, kcontrol->private_value & 0x7F, nvol);
snd_ice1712_restore_gpio_status(ice);
return change;
}
/*
* AC'97 mute controls
*/
#define aureon_ac97_mute_info snd_ctl_boolean_mono_info
static int aureon_ac97_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
mutex_lock(&ice->gpio_mutex);
ucontrol->value.integer.value[0] = aureon_ac97_read(ice,
kcontrol->private_value & 0x7F) & 0x8000 ? 0 : 1;
mutex_unlock(&ice->gpio_mutex);
return 0;
}
static int aureon_ac97_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned short ovol, nvol;
int change;
snd_ice1712_save_gpio_status(ice);
ovol = aureon_ac97_read(ice, kcontrol->private_value & 0x7F);
nvol = (ucontrol->value.integer.value[0] ? 0x0000 : 0x8000) | (ovol & ~0x8000);
change = (ovol != nvol);
if (change)
aureon_ac97_write(ice, kcontrol->private_value & 0x7F, nvol);
snd_ice1712_restore_gpio_status(ice);
return change;
}
/*
* AC'97 mute controls
*/
#define aureon_ac97_micboost_info snd_ctl_boolean_mono_info
static int aureon_ac97_micboost_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
mutex_lock(&ice->gpio_mutex);
ucontrol->value.integer.value[0] = aureon_ac97_read(ice, AC97_MIC) & 0x0020 ? 0 : 1;
mutex_unlock(&ice->gpio_mutex);
return 0;
}
static int aureon_ac97_micboost_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned short ovol, nvol;
int change;
snd_ice1712_save_gpio_status(ice);
ovol = aureon_ac97_read(ice, AC97_MIC);
nvol = (ucontrol->value.integer.value[0] ? 0x0000 : 0x0020) | (ovol & ~0x0020);
change = (ovol != nvol);
if (change)
aureon_ac97_write(ice, AC97_MIC, nvol);
snd_ice1712_restore_gpio_status(ice);
return change;
}
/*
* write data in the SPI mode
*/
static void aureon_spi_write(struct snd_ice1712 *ice, unsigned int cs, unsigned int data, int bits)
{
unsigned int tmp;
int i;
unsigned int mosi, clk;
tmp = snd_ice1712_gpio_read(ice);
if (ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71LT ||
ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71XT) {
snd_ice1712_gpio_set_mask(ice, ~(PRODIGY_SPI_MOSI|PRODIGY_SPI_CLK|PRODIGY_WM_CS));
mosi = PRODIGY_SPI_MOSI;
clk = PRODIGY_SPI_CLK;
} else {
snd_ice1712_gpio_set_mask(ice, ~(AUREON_WM_RW|AUREON_SPI_MOSI|AUREON_SPI_CLK|
AUREON_WM_CS|AUREON_CS8415_CS));
mosi = AUREON_SPI_MOSI;
clk = AUREON_SPI_CLK;
tmp |= AUREON_WM_RW;
}
tmp &= ~cs;
snd_ice1712_gpio_write(ice, tmp);
udelay(1);
for (i = bits - 1; i >= 0; i--) {
tmp &= ~clk;
snd_ice1712_gpio_write(ice, tmp);
udelay(1);
if (data & (1 << i))
tmp |= mosi;
else
tmp &= ~mosi;
snd_ice1712_gpio_write(ice, tmp);
udelay(1);
tmp |= clk;
snd_ice1712_gpio_write(ice, tmp);
udelay(1);
}
tmp &= ~clk;
tmp |= cs;
snd_ice1712_gpio_write(ice, tmp);
udelay(1);
tmp |= clk;
snd_ice1712_gpio_write(ice, tmp);
udelay(1);
}
/*
* Read data in SPI mode
*/
static void aureon_spi_read(struct snd_ice1712 *ice, unsigned int cs,
unsigned int data, int bits, unsigned char *buffer, int size)
{
int i, j;
unsigned int tmp;
tmp = (snd_ice1712_gpio_read(ice) & ~AUREON_SPI_CLK) | AUREON_CS8415_CS|AUREON_WM_CS;
snd_ice1712_gpio_write(ice, tmp);
tmp &= ~cs;
snd_ice1712_gpio_write(ice, tmp);
udelay(1);
for (i = bits-1; i >= 0; i--) {
if (data & (1 << i))
tmp |= AUREON_SPI_MOSI;
else
tmp &= ~AUREON_SPI_MOSI;
snd_ice1712_gpio_write(ice, tmp);
udelay(1);
tmp |= AUREON_SPI_CLK;
snd_ice1712_gpio_write(ice, tmp);
udelay(1);
tmp &= ~AUREON_SPI_CLK;
snd_ice1712_gpio_write(ice, tmp);
udelay(1);
}
for (j = 0; j < size; j++) {
unsigned char outdata = 0;
for (i = 7; i >= 0; i--) {
tmp = snd_ice1712_gpio_read(ice);
outdata <<= 1;
outdata |= (tmp & AUREON_SPI_MISO) ? 1 : 0;
udelay(1);
tmp |= AUREON_SPI_CLK;
snd_ice1712_gpio_write(ice, tmp);
udelay(1);
tmp &= ~AUREON_SPI_CLK;
snd_ice1712_gpio_write(ice, tmp);
udelay(1);
}
buffer[j] = outdata;
}
tmp |= cs;
snd_ice1712_gpio_write(ice, tmp);
}
static unsigned char aureon_cs8415_get(struct snd_ice1712 *ice, int reg)
{
unsigned char val;
aureon_spi_write(ice, AUREON_CS8415_CS, 0x2000 | reg, 16);
aureon_spi_read(ice, AUREON_CS8415_CS, 0x21, 8, &val, 1);
return val;
}
static void aureon_cs8415_read(struct snd_ice1712 *ice, int reg,
unsigned char *buffer, int size)
{
aureon_spi_write(ice, AUREON_CS8415_CS, 0x2000 | reg, 16);
aureon_spi_read(ice, AUREON_CS8415_CS, 0x21, 8, buffer, size);
}
static void aureon_cs8415_put(struct snd_ice1712 *ice, int reg,
unsigned char val)
{
aureon_spi_write(ice, AUREON_CS8415_CS, 0x200000 | (reg << 8) | val, 24);
}
/*
* get the current register value of WM codec
*/
static unsigned short wm_get(struct snd_ice1712 *ice, int reg)
{
reg <<= 1;
return ((unsigned short)ice->akm[0].images[reg] << 8) |
ice->akm[0].images[reg + 1];
}
/*
* set the register value of WM codec
*/
static void wm_put_nocache(struct snd_ice1712 *ice, int reg, unsigned short val)
{
aureon_spi_write(ice,
((ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71LT ||
ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71XT) ?
PRODIGY_WM_CS : AUREON_WM_CS),
(reg << 9) | (val & 0x1ff), 16);
}
/*
* set the register value of WM codec and remember it
*/
static void wm_put(struct snd_ice1712 *ice, int reg, unsigned short val)
{
wm_put_nocache(ice, reg, val);
reg <<= 1;
ice->akm[0].images[reg] = val >> 8;
ice->akm[0].images[reg + 1] = val;
}
/*
*/
#define aureon_mono_bool_info snd_ctl_boolean_mono_info
/*
* AC'97 master playback mute controls (Mute on WM8770 chip)
*/
#define aureon_ac97_mmute_info snd_ctl_boolean_mono_info
static int aureon_ac97_mmute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
mutex_lock(&ice->gpio_mutex);
ucontrol->value.integer.value[0] = (wm_get(ice, WM_OUT_MUX1) >> 1) & 0x01;
mutex_unlock(&ice->gpio_mutex);
return 0;
}
static int aureon_ac97_mmute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned short ovol, nvol;
int change;
snd_ice1712_save_gpio_status(ice);
ovol = wm_get(ice, WM_OUT_MUX1);
nvol = (ovol & ~0x02) | (ucontrol->value.integer.value[0] ? 0x02 : 0x00);
change = (ovol != nvol);
if (change)
wm_put(ice, WM_OUT_MUX1, nvol);
snd_ice1712_restore_gpio_status(ice);
return change;
}
static const DECLARE_TLV_DB_SCALE(db_scale_wm_dac, -10000, 100, 1);
static const DECLARE_TLV_DB_SCALE(db_scale_wm_pcm, -6400, 50, 1);
static const DECLARE_TLV_DB_SCALE(db_scale_wm_adc, -1200, 100, 0);
static const DECLARE_TLV_DB_SCALE(db_scale_ac97_master, -4650, 150, 0);
static const DECLARE_TLV_DB_SCALE(db_scale_ac97_gain, -3450, 150, 0);
#define WM_VOL_MAX 100
#define WM_VOL_CNT 101 /* 0dB .. -100dB */
#define WM_VOL_MUTE 0x8000
static void wm_set_vol(struct snd_ice1712 *ice, unsigned int index, unsigned short vol, unsigned short master)
{
unsigned char nvol;
if ((master & WM_VOL_MUTE) || (vol & WM_VOL_MUTE)) {
nvol = 0;
} else {
nvol = ((vol % WM_VOL_CNT) * (master % WM_VOL_CNT)) /
WM_VOL_MAX;
nvol += 0x1b;
}
wm_put(ice, index, nvol);
wm_put_nocache(ice, index, 0x180 | nvol);
}
/*
* DAC mute control
*/
#define wm_pcm_mute_info snd_ctl_boolean_mono_info
static int wm_pcm_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
mutex_lock(&ice->gpio_mutex);
ucontrol->value.integer.value[0] = (wm_get(ice, WM_MUTE) & 0x10) ? 0 : 1;
mutex_unlock(&ice->gpio_mutex);
return 0;
}
static int wm_pcm_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned short nval, oval;
int change;
snd_ice1712_save_gpio_status(ice);
oval = wm_get(ice, WM_MUTE);
nval = (oval & ~0x10) | (ucontrol->value.integer.value[0] ? 0 : 0x10);
change = (oval != nval);
if (change)
wm_put(ice, WM_MUTE, nval);
snd_ice1712_restore_gpio_status(ice);
return change;
}
/*
* Master volume attenuation mixer control
*/
static int wm_master_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 2;
uinfo->value.integer.min = 0;
uinfo->value.integer.max = WM_VOL_MAX;
return 0;
}
static int wm_master_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
struct aureon_spec *spec = ice->spec;
int i;
for (i = 0; i < 2; i++)
ucontrol->value.integer.value[i] =
spec->master[i] & ~WM_VOL_MUTE;
return 0;
}
static int wm_master_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
struct aureon_spec *spec = ice->spec;
int ch, change = 0;
snd_ice1712_save_gpio_status(ice);
for (ch = 0; ch < 2; ch++) {
unsigned int vol = ucontrol->value.integer.value[ch];
if (vol > WM_VOL_MAX)
vol = WM_VOL_MAX;
vol |= spec->master[ch] & WM_VOL_MUTE;
if (vol != spec->master[ch]) {
int dac;
spec->master[ch] = vol;
for (dac = 0; dac < ice->num_total_dacs; dac += 2)
wm_set_vol(ice, WM_DAC_ATTEN + dac + ch,
spec->vol[dac + ch],
spec->master[ch]);
change = 1;
}
}
snd_ice1712_restore_gpio_status(ice);
return change;
}
/*
* DAC volume attenuation mixer control
*/
static int wm_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
int voices = kcontrol->private_value >> 8;
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = voices;
uinfo->value.integer.min = 0; /* mute (-101dB) */
uinfo->value.integer.max = WM_VOL_MAX; /* 0dB */
return 0;
}
static int wm_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
struct aureon_spec *spec = ice->spec;
int i, ofs, voices;
voices = kcontrol->private_value >> 8;
ofs = kcontrol->private_value & 0xff;
for (i = 0; i < voices; i++)
ucontrol->value.integer.value[i] =
spec->vol[ofs+i] & ~WM_VOL_MUTE;
return 0;
}
static int wm_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
struct aureon_spec *spec = ice->spec;
int i, idx, ofs, voices;
int change = 0;
voices = kcontrol->private_value >> 8;
ofs = kcontrol->private_value & 0xff;
snd_ice1712_save_gpio_status(ice);
for (i = 0; i < voices; i++) {
unsigned int vol = ucontrol->value.integer.value[i];
if (vol > WM_VOL_MAX)
vol = WM_VOL_MAX;
vol |= spec->vol[ofs+i] & WM_VOL_MUTE;
if (vol != spec->vol[ofs+i]) {
spec->vol[ofs+i] = vol;
idx = WM_DAC_ATTEN + ofs + i;
wm_set_vol(ice, idx, spec->vol[ofs + i],
spec->master[i]);
change = 1;
}
}
snd_ice1712_restore_gpio_status(ice);
return change;
}
/*
* WM8770 mute control
*/
static int wm_mute_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
uinfo->count = kcontrol->private_value >> 8;
uinfo->value.integer.min = 0;
uinfo->value.integer.max = 1;
return 0;
}
static int wm_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
struct aureon_spec *spec = ice->spec;
int voices, ofs, i;
voices = kcontrol->private_value >> 8;
ofs = kcontrol->private_value & 0xFF;
for (i = 0; i < voices; i++)
ucontrol->value.integer.value[i] =
(spec->vol[ofs + i] & WM_VOL_MUTE) ? 0 : 1;
return 0;
}
static int wm_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
struct aureon_spec *spec = ice->spec;
int change = 0, voices, ofs, i;
voices = kcontrol->private_value >> 8;
ofs = kcontrol->private_value & 0xFF;
snd_ice1712_save_gpio_status(ice);
for (i = 0; i < voices; i++) {
int val = (spec->vol[ofs + i] & WM_VOL_MUTE) ? 0 : 1;
if (ucontrol->value.integer.value[i] != val) {
spec->vol[ofs + i] &= ~WM_VOL_MUTE;
spec->vol[ofs + i] |=
ucontrol->value.integer.value[i] ? 0 : WM_VOL_MUTE;
wm_set_vol(ice, ofs + i, spec->vol[ofs + i],
spec->master[i]);
change = 1;
}
}
snd_ice1712_restore_gpio_status(ice);
return change;
}
/*
* WM8770 master mute control
*/
#define wm_master_mute_info snd_ctl_boolean_stereo_info
static int wm_master_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
struct aureon_spec *spec = ice->spec;
ucontrol->value.integer.value[0] =
(spec->master[0] & WM_VOL_MUTE) ? 0 : 1;
ucontrol->value.integer.value[1] =
(spec->master[1] & WM_VOL_MUTE) ? 0 : 1;
return 0;
}
static int wm_master_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
struct aureon_spec *spec = ice->spec;
int change = 0, i;
snd_ice1712_save_gpio_status(ice);
for (i = 0; i < 2; i++) {
int val = (spec->master[i] & WM_VOL_MUTE) ? 0 : 1;
if (ucontrol->value.integer.value[i] != val) {
int dac;
spec->master[i] &= ~WM_VOL_MUTE;
spec->master[i] |=
ucontrol->value.integer.value[i] ? 0 : WM_VOL_MUTE;
for (dac = 0; dac < ice->num_total_dacs; dac += 2)
wm_set_vol(ice, WM_DAC_ATTEN + dac + i,
spec->vol[dac + i],
spec->master[i]);
change = 1;
}
}
snd_ice1712_restore_gpio_status(ice);
return change;
}
/* digital master volume */
#define PCM_0dB 0xff
#define PCM_RES 128 /* -64dB */
#define PCM_MIN (PCM_0dB - PCM_RES)
static int wm_pcm_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 1;
uinfo->value.integer.min = 0; /* mute (-64dB) */
uinfo->value.integer.max = PCM_RES; /* 0dB */
return 0;
}
static int wm_pcm_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned short val;
mutex_lock(&ice->gpio_mutex);
val = wm_get(ice, WM_DAC_DIG_MASTER_ATTEN) & 0xff;
val = val > PCM_MIN ? (val - PCM_MIN) : 0;
ucontrol->value.integer.value[0] = val;
mutex_unlock(&ice->gpio_mutex);
return 0;
}
static int wm_pcm_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned short ovol, nvol;
int change = 0;
nvol = ucontrol->value.integer.value[0];
if (nvol > PCM_RES)
return -EINVAL;
snd_ice1712_save_gpio_status(ice);
nvol = (nvol ? (nvol + PCM_MIN) : 0) & 0xff;
ovol = wm_get(ice, WM_DAC_DIG_MASTER_ATTEN) & 0xff;
if (ovol != nvol) {
wm_put(ice, WM_DAC_DIG_MASTER_ATTEN, nvol); /* prelatch */
wm_put_nocache(ice, WM_DAC_DIG_MASTER_ATTEN, nvol | 0x100); /* update */
change = 1;
}
snd_ice1712_restore_gpio_status(ice);
return change;
}
/*
* ADC mute control
*/
#define wm_adc_mute_info snd_ctl_boolean_stereo_info
static int wm_adc_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned short val;
int i;
mutex_lock(&ice->gpio_mutex);
for (i = 0; i < 2; i++) {
val = wm_get(ice, WM_ADC_GAIN + i);
ucontrol->value.integer.value[i] = ~val>>5 & 0x1;
}
mutex_unlock(&ice->gpio_mutex);
return 0;
}
static int wm_adc_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned short new, old;
int i, change = 0;
snd_ice1712_save_gpio_status(ice);
for (i = 0; i < 2; i++) {
old = wm_get(ice, WM_ADC_GAIN + i);
new = (~ucontrol->value.integer.value[i]<<5&0x20) | (old&~0x20);
if (new != old) {
wm_put(ice, WM_ADC_GAIN + i, new);
change = 1;
}
}
snd_ice1712_restore_gpio_status(ice);
return change;
}
/*
* ADC gain mixer control
*/
static int wm_adc_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 2;
uinfo->value.integer.min = 0; /* -12dB */
uinfo->value.integer.max = 0x1f; /* 19dB */
return 0;
}
static int wm_adc_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int i, idx;
unsigned short vol;
mutex_lock(&ice->gpio_mutex);
for (i = 0; i < 2; i++) {
idx = WM_ADC_GAIN + i;
vol = wm_get(ice, idx) & 0x1f;
ucontrol->value.integer.value[i] = vol;
}
mutex_unlock(&ice->gpio_mutex);
return 0;
}
static int wm_adc_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int i, idx;
unsigned short ovol, nvol;
int change = 0;
snd_ice1712_save_gpio_status(ice);
for (i = 0; i < 2; i++) {
idx = WM_ADC_GAIN + i;
nvol = ucontrol->value.integer.value[i] & 0x1f;
ovol = wm_get(ice, idx);
if ((ovol & 0x1f) != nvol) {
wm_put(ice, idx, nvol | (ovol & ~0x1f));
change = 1;
}
}
snd_ice1712_restore_gpio_status(ice);
return change;
}
/*
* ADC input mux mixer control
*/
static int wm_adc_mux_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
static const char * const texts[] = {
"CD", /* AIN1 */
"Aux", /* AIN2 */
"Line", /* AIN3 */
"Mic", /* AIN4 */
"AC97" /* AIN5 */
};
static const char * const universe_texts[] = {
"Aux1", /* AIN1 */
"CD", /* AIN2 */
"Phono", /* AIN3 */
"Line", /* AIN4 */
"Aux2", /* AIN5 */
"Mic", /* AIN6 */
"Aux3", /* AIN7 */
"AC97" /* AIN8 */
};
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON71_UNIVERSE)
return snd_ctl_enum_info(uinfo, 2, 8, universe_texts);
else
return snd_ctl_enum_info(uinfo, 2, 5, texts);
}
static int wm_adc_mux_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned short val;
mutex_lock(&ice->gpio_mutex);
val = wm_get(ice, WM_ADC_MUX);
ucontrol->value.enumerated.item[0] = val & 7;
ucontrol->value.enumerated.item[1] = (val >> 4) & 7;
mutex_unlock(&ice->gpio_mutex);
return 0;
}
static int wm_adc_mux_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned short oval, nval;
int change;
snd_ice1712_save_gpio_status(ice);
oval = wm_get(ice, WM_ADC_MUX);
nval = oval & ~0x77;
nval |= ucontrol->value.enumerated.item[0] & 7;
nval |= (ucontrol->value.enumerated.item[1] & 7) << 4;
change = (oval != nval);
if (change)
wm_put(ice, WM_ADC_MUX, nval);
snd_ice1712_restore_gpio_status(ice);
return change;
}
/*
* CS8415 Input mux
*/
static int aureon_cs8415_mux_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
static const char * const aureon_texts[] = {
"CD", /* RXP0 */
"Optical" /* RXP1 */
};
static const char * const prodigy_texts[] = {
"CD",
"Coax"
};
if (ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71)
return snd_ctl_enum_info(uinfo, 1, 2, prodigy_texts);
else
return snd_ctl_enum_info(uinfo, 1, 2, aureon_texts);
}
static int aureon_cs8415_mux_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
struct aureon_spec *spec = ice->spec;
/* snd_ice1712_save_gpio_status(ice); */
/* val = aureon_cs8415_get(ice, CS8415_CTRL2); */
ucontrol->value.enumerated.item[0] = spec->cs8415_mux;
/* snd_ice1712_restore_gpio_status(ice); */
return 0;
}
static int aureon_cs8415_mux_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
struct aureon_spec *spec = ice->spec;
unsigned short oval, nval;
int change;
snd_ice1712_save_gpio_status(ice);
oval = aureon_cs8415_get(ice, CS8415_CTRL2);
nval = oval & ~0x07;
nval |= ucontrol->value.enumerated.item[0] & 7;
change = (oval != nval);
if (change)
aureon_cs8415_put(ice, CS8415_CTRL2, nval);
snd_ice1712_restore_gpio_status(ice);
spec->cs8415_mux = ucontrol->value.enumerated.item[0];
return change;
}
static int aureon_cs8415_rate_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 1;
uinfo->value.integer.min = 0;
uinfo->value.integer.max = 192000;
return 0;
}
static int aureon_cs8415_rate_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned char ratio;
ratio = aureon_cs8415_get(ice, CS8415_RATIO);
ucontrol->value.integer.value[0] = (int)((unsigned int)ratio * 750);
return 0;
}
/*
* CS8415A Mute
*/
#define aureon_cs8415_mute_info snd_ctl_boolean_mono_info
static int aureon_cs8415_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
snd_ice1712_save_gpio_status(ice);
ucontrol->value.integer.value[0] = (aureon_cs8415_get(ice, CS8415_CTRL1) & 0x20) ? 0 : 1;
snd_ice1712_restore_gpio_status(ice);
return 0;
}
static int aureon_cs8415_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned char oval, nval;
int change;
snd_ice1712_save_gpio_status(ice);
oval = aureon_cs8415_get(ice, CS8415_CTRL1);
if (ucontrol->value.integer.value[0])
nval = oval & ~0x20;
else
nval = oval | 0x20;
change = (oval != nval);
if (change)
aureon_cs8415_put(ice, CS8415_CTRL1, nval);
snd_ice1712_restore_gpio_status(ice);
return change;
}
/*
* CS8415A Q-Sub info
*/
static int aureon_cs8415_qsub_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
uinfo->count = 10;
return 0;
}
static int aureon_cs8415_qsub_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
snd_ice1712_save_gpio_status(ice);
aureon_cs8415_read(ice, CS8415_QSUB, ucontrol->value.bytes.data, 10);
snd_ice1712_restore_gpio_status(ice);
return 0;
}
static int aureon_cs8415_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
uinfo->count = 1;
return 0;
}
static int aureon_cs8415_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
memset(ucontrol->value.iec958.status, 0xFF, 24);
return 0;
}
static int aureon_cs8415_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
snd_ice1712_save_gpio_status(ice);
aureon_cs8415_read(ice, CS8415_C_BUFFER, ucontrol->value.iec958.status, 24);
snd_ice1712_restore_gpio_status(ice);
return 0;
}
/*
* Headphone Amplifier
*/
static int aureon_set_headphone_amp(struct snd_ice1712 *ice, int enable)
{
unsigned int tmp, tmp2;
tmp2 = tmp = snd_ice1712_gpio_read(ice);
if (enable)
if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT)
tmp |= AUREON_HP_SEL;
else
tmp |= PRODIGY_HP_SEL;
else
if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT)
tmp &= ~AUREON_HP_SEL;
else
tmp &= ~PRODIGY_HP_SEL;
if (tmp != tmp2) {
snd_ice1712_gpio_write(ice, tmp);
return 1;
}
return 0;
}
static int aureon_get_headphone_amp(struct snd_ice1712 *ice)
{
unsigned int tmp = snd_ice1712_gpio_read(ice);
return (tmp & AUREON_HP_SEL) != 0;
}
#define aureon_hpamp_info snd_ctl_boolean_mono_info
static int aureon_hpamp_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
ucontrol->value.integer.value[0] = aureon_get_headphone_amp(ice);
return 0;
}
static int aureon_hpamp_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
return aureon_set_headphone_amp(ice, ucontrol->value.integer.value[0]);
}
/*
* Deemphasis
*/
#define aureon_deemp_info snd_ctl_boolean_mono_info
static int aureon_deemp_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
ucontrol->value.integer.value[0] = (wm_get(ice, WM_DAC_CTRL2) & 0xf) == 0xf;
return 0;
}
static int aureon_deemp_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int temp, temp2;
temp2 = temp = wm_get(ice, WM_DAC_CTRL2);
if (ucontrol->value.integer.value[0])
temp |= 0xf;
else
temp &= ~0xf;
if (temp != temp2) {
wm_put(ice, WM_DAC_CTRL2, temp);
return 1;
}
return 0;
}
/*
* ADC Oversampling
*/
static int aureon_oversampling_info(struct snd_kcontrol *k, struct snd_ctl_elem_info *uinfo)
{
static const char * const texts[2] = { "128x", "64x" };
return snd_ctl_enum_info(uinfo, 1, 2, texts);
}
static int aureon_oversampling_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
ucontrol->value.enumerated.item[0] = (wm_get(ice, WM_MASTER) & 0x8) == 0x8;
return 0;
}
static int aureon_oversampling_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
int temp, temp2;
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
temp2 = temp = wm_get(ice, WM_MASTER);
if (ucontrol->value.enumerated.item[0])
temp |= 0x8;
else
temp &= ~0x8;
if (temp != temp2) {
wm_put(ice, WM_MASTER, temp);
return 1;
}
return 0;
}
/*
* mixers
*/
static const struct snd_kcontrol_new aureon_dac_controls[] = {
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Master Playback Switch",
.info = wm_master_mute_info,
.get = wm_master_mute_get,
.put = wm_master_mute_put
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "Master Playback Volume",
.info = wm_master_vol_info,
.get = wm_master_vol_get,
.put = wm_master_vol_put,
.tlv = { .p = db_scale_wm_dac }
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Front Playback Switch",
.info = wm_mute_info,
.get = wm_mute_get,
.put = wm_mute_put,
.private_value = (2 << 8) | 0
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "Front Playback Volume",
.info = wm_vol_info,
.get = wm_vol_get,
.put = wm_vol_put,
.private_value = (2 << 8) | 0,
.tlv = { .p = db_scale_wm_dac }
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Rear Playback Switch",
.info = wm_mute_info,
.get = wm_mute_get,
.put = wm_mute_put,
.private_value = (2 << 8) | 2
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "Rear Playback Volume",
.info = wm_vol_info,
.get = wm_vol_get,
.put = wm_vol_put,
.private_value = (2 << 8) | 2,
.tlv = { .p = db_scale_wm_dac }
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Center Playback Switch",
.info = wm_mute_info,
.get = wm_mute_get,
.put = wm_mute_put,
.private_value = (1 << 8) | 4
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "Center Playback Volume",
.info = wm_vol_info,
.get = wm_vol_get,
.put = wm_vol_put,
.private_value = (1 << 8) | 4,
.tlv = { .p = db_scale_wm_dac }
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "LFE Playback Switch",
.info = wm_mute_info,
.get = wm_mute_get,
.put = wm_mute_put,
.private_value = (1 << 8) | 5
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "LFE Playback Volume",
.info = wm_vol_info,
.get = wm_vol_get,
.put = wm_vol_put,
.private_value = (1 << 8) | 5,
.tlv = { .p = db_scale_wm_dac }
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Side Playback Switch",
.info = wm_mute_info,
.get = wm_mute_get,
.put = wm_mute_put,
.private_value = (2 << 8) | 6
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "Side Playback Volume",
.info = wm_vol_info,
.get = wm_vol_get,
.put = wm_vol_put,
.private_value = (2 << 8) | 6,
.tlv = { .p = db_scale_wm_dac }
}
};
static const struct snd_kcontrol_new wm_controls[] = {
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "PCM Playback Switch",
.info = wm_pcm_mute_info,
.get = wm_pcm_mute_get,
.put = wm_pcm_mute_put
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "PCM Playback Volume",
.info = wm_pcm_vol_info,
.get = wm_pcm_vol_get,
.put = wm_pcm_vol_put,
.tlv = { .p = db_scale_wm_pcm }
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Capture Switch",
.info = wm_adc_mute_info,
.get = wm_adc_mute_get,
.put = wm_adc_mute_put,
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "Capture Volume",
.info = wm_adc_vol_info,
.get = wm_adc_vol_get,
.put = wm_adc_vol_put,
.tlv = { .p = db_scale_wm_adc }
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Capture Source",
.info = wm_adc_mux_info,
.get = wm_adc_mux_get,
.put = wm_adc_mux_put,
.private_value = 5
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "External Amplifier",
.info = aureon_hpamp_info,
.get = aureon_hpamp_get,
.put = aureon_hpamp_put
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "DAC Deemphasis Switch",
.info = aureon_deemp_info,
.get = aureon_deemp_get,
.put = aureon_deemp_put
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "ADC Oversampling",
.info = aureon_oversampling_info,
.get = aureon_oversampling_get,
.put = aureon_oversampling_put
}
};
static const struct snd_kcontrol_new ac97_controls[] = {
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "AC97 Playback Switch",
.info = aureon_ac97_mmute_info,
.get = aureon_ac97_mmute_get,
.put = aureon_ac97_mmute_put,
.private_value = AC97_MASTER
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "AC97 Playback Volume",
.info = aureon_ac97_vol_info,
.get = aureon_ac97_vol_get,
.put = aureon_ac97_vol_put,
.private_value = AC97_MASTER|AUREON_AC97_STEREO,
.tlv = { .p = db_scale_ac97_master }
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "CD Playback Switch",
.info = aureon_ac97_mute_info,
.get = aureon_ac97_mute_get,
.put = aureon_ac97_mute_put,
.private_value = AC97_CD
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "CD Playback Volume",
.info = aureon_ac97_vol_info,
.get = aureon_ac97_vol_get,
.put = aureon_ac97_vol_put,
.private_value = AC97_CD|AUREON_AC97_STEREO,
.tlv = { .p = db_scale_ac97_gain }
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Aux Playback Switch",
.info = aureon_ac97_mute_info,
.get = aureon_ac97_mute_get,
.put = aureon_ac97_mute_put,
.private_value = AC97_AUX,
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "Aux Playback Volume",
.info = aureon_ac97_vol_info,
.get = aureon_ac97_vol_get,
.put = aureon_ac97_vol_put,
.private_value = AC97_AUX|AUREON_AC97_STEREO,
.tlv = { .p = db_scale_ac97_gain }
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Line Playback Switch",
.info = aureon_ac97_mute_info,
.get = aureon_ac97_mute_get,
.put = aureon_ac97_mute_put,
.private_value = AC97_LINE
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "Line Playback Volume",
.info = aureon_ac97_vol_info,
.get = aureon_ac97_vol_get,
.put = aureon_ac97_vol_put,
.private_value = AC97_LINE|AUREON_AC97_STEREO,
.tlv = { .p = db_scale_ac97_gain }
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Mic Playback Switch",
.info = aureon_ac97_mute_info,
.get = aureon_ac97_mute_get,
.put = aureon_ac97_mute_put,
.private_value = AC97_MIC
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "Mic Playback Volume",
.info = aureon_ac97_vol_info,
.get = aureon_ac97_vol_get,
.put = aureon_ac97_vol_put,
.private_value = AC97_MIC,
.tlv = { .p = db_scale_ac97_gain }
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Mic Boost (+20dB)",
.info = aureon_ac97_micboost_info,
.get = aureon_ac97_micboost_get,
.put = aureon_ac97_micboost_put
}
};
static const struct snd_kcontrol_new universe_ac97_controls[] = {
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "AC97 Playback Switch",
.info = aureon_ac97_mmute_info,
.get = aureon_ac97_mmute_get,
.put = aureon_ac97_mmute_put,
.private_value = AC97_MASTER
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "AC97 Playback Volume",
.info = aureon_ac97_vol_info,
.get = aureon_ac97_vol_get,
.put = aureon_ac97_vol_put,
.private_value = AC97_MASTER|AUREON_AC97_STEREO,
.tlv = { .p = db_scale_ac97_master }
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "CD Playback Switch",
.info = aureon_ac97_mute_info,
.get = aureon_ac97_mute_get,
.put = aureon_ac97_mute_put,
.private_value = AC97_AUX
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "CD Playback Volume",
.info = aureon_ac97_vol_info,
.get = aureon_ac97_vol_get,
.put = aureon_ac97_vol_put,
.private_value = AC97_AUX|AUREON_AC97_STEREO,
.tlv = { .p = db_scale_ac97_gain }
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Phono Playback Switch",
.info = aureon_ac97_mute_info,
.get = aureon_ac97_mute_get,
.put = aureon_ac97_mute_put,
.private_value = AC97_CD
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "Phono Playback Volume",
.info = aureon_ac97_vol_info,
.get = aureon_ac97_vol_get,
.put = aureon_ac97_vol_put,
.private_value = AC97_CD|AUREON_AC97_STEREO,
.tlv = { .p = db_scale_ac97_gain }
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Line Playback Switch",
.info = aureon_ac97_mute_info,
.get = aureon_ac97_mute_get,
.put = aureon_ac97_mute_put,
.private_value = AC97_LINE
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "Line Playback Volume",
.info = aureon_ac97_vol_info,
.get = aureon_ac97_vol_get,
.put = aureon_ac97_vol_put,
.private_value = AC97_LINE|AUREON_AC97_STEREO,
.tlv = { .p = db_scale_ac97_gain }
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Mic Playback Switch",
.info = aureon_ac97_mute_info,
.get = aureon_ac97_mute_get,
.put = aureon_ac97_mute_put,
.private_value = AC97_MIC
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "Mic Playback Volume",
.info = aureon_ac97_vol_info,
.get = aureon_ac97_vol_get,
.put = aureon_ac97_vol_put,
.private_value = AC97_MIC,
.tlv = { .p = db_scale_ac97_gain }
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Mic Boost (+20dB)",
.info = aureon_ac97_micboost_info,
.get = aureon_ac97_micboost_get,
.put = aureon_ac97_micboost_put
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Aux Playback Switch",
.info = aureon_ac97_mute_info,
.get = aureon_ac97_mute_get,
.put = aureon_ac97_mute_put,
.private_value = AC97_VIDEO,
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "Aux Playback Volume",
.info = aureon_ac97_vol_info,
.get = aureon_ac97_vol_get,
.put = aureon_ac97_vol_put,
.private_value = AC97_VIDEO|AUREON_AC97_STEREO,
.tlv = { .p = db_scale_ac97_gain }
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Aux Source",
.info = aureon_universe_inmux_info,
.get = aureon_universe_inmux_get,
.put = aureon_universe_inmux_put
}
};
static const struct snd_kcontrol_new cs8415_controls[] = {
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = SNDRV_CTL_NAME_IEC958("", CAPTURE, SWITCH),
.info = aureon_cs8415_mute_info,
.get = aureon_cs8415_mute_get,
.put = aureon_cs8415_mute_put
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = SNDRV_CTL_NAME_IEC958("", CAPTURE, NONE) "Source",
.info = aureon_cs8415_mux_info,
.get = aureon_cs8415_mux_get,
.put = aureon_cs8415_mux_put,
},
{
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
.name = SNDRV_CTL_NAME_IEC958("Q-subcode ", CAPTURE, DEFAULT),
.access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
.info = aureon_cs8415_qsub_info,
.get = aureon_cs8415_qsub_get,
},
{
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
.name = SNDRV_CTL_NAME_IEC958("", CAPTURE, MASK),
.access = SNDRV_CTL_ELEM_ACCESS_READ,
.info = aureon_cs8415_spdif_info,
.get = aureon_cs8415_mask_get
},
{
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
.name = SNDRV_CTL_NAME_IEC958("", CAPTURE, DEFAULT),
.access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
.info = aureon_cs8415_spdif_info,
.get = aureon_cs8415_spdif_get
},
{
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
.name = SNDRV_CTL_NAME_IEC958("", CAPTURE, NONE) "Rate",
.access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
.info = aureon_cs8415_rate_info,
.get = aureon_cs8415_rate_get
}
};
static int aureon_add_controls(struct snd_ice1712 *ice)
{
unsigned int i, counts;
int err;
counts = ARRAY_SIZE(aureon_dac_controls);
if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON51_SKY)
counts -= 2; /* no side */
for (i = 0; i < counts; i++) {
err = snd_ctl_add(ice->card, snd_ctl_new1(&aureon_dac_controls[i], ice));
if (err < 0)
return err;
}
for (i = 0; i < ARRAY_SIZE(wm_controls); i++) {
err = snd_ctl_add(ice->card, snd_ctl_new1(&wm_controls[i], ice));
if (err < 0)
return err;
}
if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON71_UNIVERSE) {
for (i = 0; i < ARRAY_SIZE(universe_ac97_controls); i++) {
err = snd_ctl_add(ice->card, snd_ctl_new1(&universe_ac97_controls[i], ice));
if (err < 0)
return err;
}
} else if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT) {
for (i = 0; i < ARRAY_SIZE(ac97_controls); i++) {
err = snd_ctl_add(ice->card, snd_ctl_new1(&ac97_controls[i], ice));
if (err < 0)
return err;
}
}
if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT) {
unsigned char id;
snd_ice1712_save_gpio_status(ice);
id = aureon_cs8415_get(ice, CS8415_ID);
snd_ice1712_restore_gpio_status(ice);
if (id != 0x41)
dev_info(ice->card->dev,
"No CS8415 chip. Skipping CS8415 controls.\n");
else {
for (i = 0; i < ARRAY_SIZE(cs8415_controls); i++) {
struct snd_kcontrol *kctl;
kctl = snd_ctl_new1(&cs8415_controls[i], ice);
if (i > 1)
kctl->id.device = ice->pcm->device;
err = snd_ctl_add(ice->card, kctl);
if (err < 0)
return err;
}
}
}
return 0;
}
/*
* reset the chip
*/
static int aureon_reset(struct snd_ice1712 *ice)
{
static const unsigned short wm_inits_aureon[] = {
/* These come first to reduce init pop noise */
0x1b, 0x044, /* ADC Mux (AC'97 source) */
0x1c, 0x00B, /* Out Mux1 (VOUT1 = DAC+AUX, VOUT2 = DAC) */
0x1d, 0x009, /* Out Mux2 (VOUT2 = DAC, VOUT3 = DAC) */
0x18, 0x000, /* All power-up */
0x16, 0x122, /* I2S, normal polarity, 24bit */
0x17, 0x022, /* 256fs, slave mode */
0x00, 0, /* DAC1 analog mute */
0x01, 0, /* DAC2 analog mute */
0x02, 0, /* DAC3 analog mute */
0x03, 0, /* DAC4 analog mute */
0x04, 0, /* DAC5 analog mute */
0x05, 0, /* DAC6 analog mute */
0x06, 0, /* DAC7 analog mute */
0x07, 0, /* DAC8 analog mute */
0x08, 0x100, /* master analog mute */
0x09, 0xff, /* DAC1 digital full */
0x0a, 0xff, /* DAC2 digital full */
0x0b, 0xff, /* DAC3 digital full */
0x0c, 0xff, /* DAC4 digital full */
0x0d, 0xff, /* DAC5 digital full */
0x0e, 0xff, /* DAC6 digital full */
0x0f, 0xff, /* DAC7 digital full */
0x10, 0xff, /* DAC8 digital full */
0x11, 0x1ff, /* master digital full */
0x12, 0x000, /* phase normal */
0x13, 0x090, /* unmute DAC L/R */
0x14, 0x000, /* all unmute */
0x15, 0x000, /* no deemphasis, no ZFLG */
0x19, 0x000, /* -12dB ADC/L */
0x1a, 0x000, /* -12dB ADC/R */
(unsigned short)-1
};
static const unsigned short wm_inits_prodigy[] = {
/* These come first to reduce init pop noise */
0x1b, 0x000, /* ADC Mux */
0x1c, 0x009, /* Out Mux1 */
0x1d, 0x009, /* Out Mux2 */
0x18, 0x000, /* All power-up */
0x16, 0x022, /* I2S, normal polarity, 24bit, high-pass on */
0x17, 0x006, /* 128fs, slave mode */
0x00, 0, /* DAC1 analog mute */
0x01, 0, /* DAC2 analog mute */
0x02, 0, /* DAC3 analog mute */
0x03, 0, /* DAC4 analog mute */
0x04, 0, /* DAC5 analog mute */
0x05, 0, /* DAC6 analog mute */
0x06, 0, /* DAC7 analog mute */
0x07, 0, /* DAC8 analog mute */
0x08, 0x100, /* master analog mute */
0x09, 0x7f, /* DAC1 digital full */
0x0a, 0x7f, /* DAC2 digital full */
0x0b, 0x7f, /* DAC3 digital full */
0x0c, 0x7f, /* DAC4 digital full */
0x0d, 0x7f, /* DAC5 digital full */
0x0e, 0x7f, /* DAC6 digital full */
0x0f, 0x7f, /* DAC7 digital full */
0x10, 0x7f, /* DAC8 digital full */
0x11, 0x1FF, /* master digital full */
0x12, 0x000, /* phase normal */
0x13, 0x090, /* unmute DAC L/R */
0x14, 0x000, /* all unmute */
0x15, 0x000, /* no deemphasis, no ZFLG */
0x19, 0x000, /* -12dB ADC/L */
0x1a, 0x000, /* -12dB ADC/R */
(unsigned short)-1
};
static const unsigned short cs_inits[] = {
0x0441, /* RUN */
0x0180, /* no mute, OMCK output on RMCK pin */
0x0201, /* S/PDIF source on RXP1 */
0x0605, /* slave, 24bit, MSB on second OSCLK, SDOUT for right channel when OLRCK is high */
(unsigned short)-1
};
unsigned int tmp;
const unsigned short *p;
int err;
struct aureon_spec *spec = ice->spec;
err = aureon_ac97_init(ice);
if (err != 0)
return err;
snd_ice1712_gpio_set_dir(ice, 0x5fffff); /* fix this for the time being */
/* reset the wm codec as the SPI mode */
snd_ice1712_save_gpio_status(ice);
snd_ice1712_gpio_set_mask(ice, ~(AUREON_WM_RESET|AUREON_WM_CS|AUREON_CS8415_CS|AUREON_HP_SEL));
tmp = snd_ice1712_gpio_read(ice);
tmp &= ~AUREON_WM_RESET;
snd_ice1712_gpio_write(ice, tmp);
udelay(1);
tmp |= AUREON_WM_CS | AUREON_CS8415_CS;
snd_ice1712_gpio_write(ice, tmp);
udelay(1);
tmp |= AUREON_WM_RESET;
snd_ice1712_gpio_write(ice, tmp);
udelay(1);
/* initialize WM8770 codec */
if (ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71 ||
ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71LT ||
ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71XT)
p = wm_inits_prodigy;
else
p = wm_inits_aureon;
for (; *p != (unsigned short)-1; p += 2)
wm_put(ice, p[0], p[1]);
/* initialize CS8415A codec */
if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT) {
for (p = cs_inits; *p != (unsigned short)-1; p++)
aureon_spi_write(ice, AUREON_CS8415_CS, *p | 0x200000, 24);
spec->cs8415_mux = 1;
aureon_set_headphone_amp(ice, 1);
}
snd_ice1712_restore_gpio_status(ice);
/* initialize PCA9554 pin directions & set default input */
aureon_pca9554_write(ice, PCA9554_DIR, 0x00);
aureon_pca9554_write(ice, PCA9554_OUT, 0x00); /* internal AUX */
return 0;
}
/*
* suspend/resume
*/
#ifdef CONFIG_PM_SLEEP
static int aureon_resume(struct snd_ice1712 *ice)
{
struct aureon_spec *spec = ice->spec;
int err, i;
err = aureon_reset(ice);
if (err != 0)
return err;
/* workaround for poking volume with alsamixer after resume:
* just set stored volume again */
for (i = 0; i < ice->num_total_dacs; i++)
wm_set_vol(ice, i, spec->vol[i], spec->master[i % 2]);
return 0;
}
#endif
/*
* initialize the chip
*/
static int aureon_init(struct snd_ice1712 *ice)
{
struct aureon_spec *spec;
int i, err;
spec = kzalloc(sizeof(*spec), GFP_KERNEL);
if (!spec)
return -ENOMEM;
ice->spec = spec;
if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON51_SKY) {
ice->num_total_dacs = 6;
ice->num_total_adcs = 2;
} else {
/* aureon 7.1 and prodigy 7.1 */
ice->num_total_dacs = 8;
ice->num_total_adcs = 2;
}
/* to remember the register values of CS8415 */
ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
if (!ice->akm)
return -ENOMEM;
ice->akm_codecs = 1;
err = aureon_reset(ice);
if (err != 0)
return err;
spec->master[0] = WM_VOL_MUTE;
spec->master[1] = WM_VOL_MUTE;
for (i = 0; i < ice->num_total_dacs; i++) {
spec->vol[i] = WM_VOL_MUTE;
wm_set_vol(ice, i, spec->vol[i], spec->master[i % 2]);
}
#ifdef CONFIG_PM_SLEEP
ice->pm_resume = aureon_resume;
ice->pm_suspend_enabled = 1;
#endif
return 0;
}
/*
* Aureon boards don't provide the EEPROM data except for the vendor IDs.
* hence the driver needs to sets up it properly.
*/
static const unsigned char aureon51_eeprom[] = {
[ICE_EEP2_SYSCONF] = 0x0a, /* clock 512, spdif-in/ADC, 3DACs */
[ICE_EEP2_ACLINK] = 0x80, /* I2S */
[ICE_EEP2_I2S] = 0xfc, /* vol, 96k, 24bit, 192k */
[ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
[ICE_EEP2_GPIO_DIR] = 0xff,
[ICE_EEP2_GPIO_DIR1] = 0xff,
[ICE_EEP2_GPIO_DIR2] = 0x5f,
[ICE_EEP2_GPIO_MASK] = 0x00,
[ICE_EEP2_GPIO_MASK1] = 0x00,
[ICE_EEP2_GPIO_MASK2] = 0x00,
[ICE_EEP2_GPIO_STATE] = 0x00,
[ICE_EEP2_GPIO_STATE1] = 0x00,
[ICE_EEP2_GPIO_STATE2] = 0x00,
};
static const unsigned char aureon71_eeprom[] = {
[ICE_EEP2_SYSCONF] = 0x0b, /* clock 512, spdif-in/ADC, 4DACs */
[ICE_EEP2_ACLINK] = 0x80, /* I2S */
[ICE_EEP2_I2S] = 0xfc, /* vol, 96k, 24bit, 192k */
[ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
[ICE_EEP2_GPIO_DIR] = 0xff,
[ICE_EEP2_GPIO_DIR1] = 0xff,
[ICE_EEP2_GPIO_DIR2] = 0x5f,
[ICE_EEP2_GPIO_MASK] = 0x00,
[ICE_EEP2_GPIO_MASK1] = 0x00,
[ICE_EEP2_GPIO_MASK2] = 0x00,
[ICE_EEP2_GPIO_STATE] = 0x00,
[ICE_EEP2_GPIO_STATE1] = 0x00,
[ICE_EEP2_GPIO_STATE2] = 0x00,
};
#define prodigy71_eeprom aureon71_eeprom
static const unsigned char aureon71_universe_eeprom[] = {
[ICE_EEP2_SYSCONF] = 0x2b, /* clock 512, mpu401, spdif-in/ADC,
* 4DACs
*/
[ICE_EEP2_ACLINK] = 0x80, /* I2S */
[ICE_EEP2_I2S] = 0xfc, /* vol, 96k, 24bit, 192k */
[ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
[ICE_EEP2_GPIO_DIR] = 0xff,
[ICE_EEP2_GPIO_DIR1] = 0xff,
[ICE_EEP2_GPIO_DIR2] = 0x5f,
[ICE_EEP2_GPIO_MASK] = 0x00,
[ICE_EEP2_GPIO_MASK1] = 0x00,
[ICE_EEP2_GPIO_MASK2] = 0x00,
[ICE_EEP2_GPIO_STATE] = 0x00,
[ICE_EEP2_GPIO_STATE1] = 0x00,
[ICE_EEP2_GPIO_STATE2] = 0x00,
};
static const unsigned char prodigy71lt_eeprom[] = {
[ICE_EEP2_SYSCONF] = 0x4b, /* clock 384, spdif-in/ADC, 4DACs */
[ICE_EEP2_ACLINK] = 0x80, /* I2S */
[ICE_EEP2_I2S] = 0xfc, /* vol, 96k, 24bit, 192k */
[ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
[ICE_EEP2_GPIO_DIR] = 0xff,
[ICE_EEP2_GPIO_DIR1] = 0xff,
[ICE_EEP2_GPIO_DIR2] = 0x5f,
[ICE_EEP2_GPIO_MASK] = 0x00,
[ICE_EEP2_GPIO_MASK1] = 0x00,
[ICE_EEP2_GPIO_MASK2] = 0x00,
[ICE_EEP2_GPIO_STATE] = 0x00,
[ICE_EEP2_GPIO_STATE1] = 0x00,
[ICE_EEP2_GPIO_STATE2] = 0x00,
};
#define prodigy71xt_eeprom prodigy71lt_eeprom
/* entry point */
struct snd_ice1712_card_info snd_vt1724_aureon_cards[] = {
{
.subvendor = VT1724_SUBDEVICE_AUREON51_SKY,
.name = "Terratec Aureon 5.1-Sky",
.model = "aureon51",
.chip_init = aureon_init,
.build_controls = aureon_add_controls,
.eeprom_size = sizeof(aureon51_eeprom),
.eeprom_data = aureon51_eeprom,
.driver = "Aureon51",
},
{
.subvendor = VT1724_SUBDEVICE_AUREON71_SPACE,
.name = "Terratec Aureon 7.1-Space",
.model = "aureon71",
.chip_init = aureon_init,
.build_controls = aureon_add_controls,
.eeprom_size = sizeof(aureon71_eeprom),
.eeprom_data = aureon71_eeprom,
.driver = "Aureon71",
},
{
.subvendor = VT1724_SUBDEVICE_AUREON71_UNIVERSE,
.name = "Terratec Aureon 7.1-Universe",
.model = "universe",
.chip_init = aureon_init,
.build_controls = aureon_add_controls,
.eeprom_size = sizeof(aureon71_universe_eeprom),
.eeprom_data = aureon71_universe_eeprom,
.driver = "Aureon71Univ", /* keep in 15 letters */
},
{
.subvendor = VT1724_SUBDEVICE_PRODIGY71,
.name = "Audiotrak Prodigy 7.1",
.model = "prodigy71",
.chip_init = aureon_init,
.build_controls = aureon_add_controls,
.eeprom_size = sizeof(prodigy71_eeprom),
.eeprom_data = prodigy71_eeprom,
.driver = "Prodigy71", /* should be identical with Aureon71 */
},
{
.subvendor = VT1724_SUBDEVICE_PRODIGY71LT,
.name = "Audiotrak Prodigy 7.1 LT",
.model = "prodigy71lt",
.chip_init = aureon_init,
.build_controls = aureon_add_controls,
.eeprom_size = sizeof(prodigy71lt_eeprom),
.eeprom_data = prodigy71lt_eeprom,
.driver = "Prodigy71LT",
},
{
.subvendor = VT1724_SUBDEVICE_PRODIGY71XT,
.name = "Audiotrak Prodigy 7.1 XT",
.model = "prodigy71xt",
.chip_init = aureon_init,
.build_controls = aureon_add_controls,
.eeprom_size = sizeof(prodigy71xt_eeprom),
.eeprom_data = prodigy71xt_eeprom,
.driver = "Prodigy71LT",
},
{ } /* terminator */
};
| linux-master | sound/pci/ice1712/aureon.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* ALSA driver for ICEnsemble VT1724 (Envy24HT)
*
* Lowlevel functions for Pontis MS300
*
* Copyright (c) 2004 Takashi Iwai <[email protected]>
*/
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/mutex.h>
#include <sound/core.h>
#include <sound/info.h>
#include <sound/tlv.h>
#include "ice1712.h"
#include "envy24ht.h"
#include "pontis.h"
/* I2C addresses */
#define WM_DEV 0x34
#define CS_DEV 0x20
/* WM8776 registers */
#define WM_HP_ATTEN_L 0x00 /* headphone left attenuation */
#define WM_HP_ATTEN_R 0x01 /* headphone left attenuation */
#define WM_HP_MASTER 0x02 /* headphone master (both channels) */
/* override LLR */
#define WM_DAC_ATTEN_L 0x03 /* digital left attenuation */
#define WM_DAC_ATTEN_R 0x04
#define WM_DAC_MASTER 0x05
#define WM_PHASE_SWAP 0x06 /* DAC phase swap */
#define WM_DAC_CTRL1 0x07
#define WM_DAC_MUTE 0x08
#define WM_DAC_CTRL2 0x09
#define WM_DAC_INT 0x0a
#define WM_ADC_INT 0x0b
#define WM_MASTER_CTRL 0x0c
#define WM_POWERDOWN 0x0d
#define WM_ADC_ATTEN_L 0x0e
#define WM_ADC_ATTEN_R 0x0f
#define WM_ALC_CTRL1 0x10
#define WM_ALC_CTRL2 0x11
#define WM_ALC_CTRL3 0x12
#define WM_NOISE_GATE 0x13
#define WM_LIMITER 0x14
#define WM_ADC_MUX 0x15
#define WM_OUT_MUX 0x16
#define WM_RESET 0x17
/*
* GPIO
*/
#define PONTIS_CS_CS (1<<4) /* CS */
#define PONTIS_CS_CLK (1<<5) /* CLK */
#define PONTIS_CS_RDATA (1<<6) /* CS8416 -> VT1720 */
#define PONTIS_CS_WDATA (1<<7) /* VT1720 -> CS8416 */
/*
* get the current register value of WM codec
*/
static unsigned short wm_get(struct snd_ice1712 *ice, int reg)
{
reg <<= 1;
return ((unsigned short)ice->akm[0].images[reg] << 8) |
ice->akm[0].images[reg + 1];
}
/*
* set the register value of WM codec and remember it
*/
static void wm_put_nocache(struct snd_ice1712 *ice, int reg, unsigned short val)
{
unsigned short cval;
cval = (reg << 9) | val;
snd_vt1724_write_i2c(ice, WM_DEV, cval >> 8, cval & 0xff);
}
static void wm_put(struct snd_ice1712 *ice, int reg, unsigned short val)
{
wm_put_nocache(ice, reg, val);
reg <<= 1;
ice->akm[0].images[reg] = val >> 8;
ice->akm[0].images[reg + 1] = val;
}
/*
* DAC volume attenuation mixer control (-64dB to 0dB)
*/
#define DAC_0dB 0xff
#define DAC_RES 128
#define DAC_MIN (DAC_0dB - DAC_RES)
static int wm_dac_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 2;
uinfo->value.integer.min = 0; /* mute */
uinfo->value.integer.max = DAC_RES; /* 0dB, 0.5dB step */
return 0;
}
static int wm_dac_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned short val;
int i;
mutex_lock(&ice->gpio_mutex);
for (i = 0; i < 2; i++) {
val = wm_get(ice, WM_DAC_ATTEN_L + i) & 0xff;
val = val > DAC_MIN ? (val - DAC_MIN) : 0;
ucontrol->value.integer.value[i] = val;
}
mutex_unlock(&ice->gpio_mutex);
return 0;
}
static int wm_dac_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned short oval, nval;
int i, idx, change = 0;
mutex_lock(&ice->gpio_mutex);
for (i = 0; i < 2; i++) {
nval = ucontrol->value.integer.value[i];
nval = (nval ? (nval + DAC_MIN) : 0) & 0xff;
idx = WM_DAC_ATTEN_L + i;
oval = wm_get(ice, idx) & 0xff;
if (oval != nval) {
wm_put(ice, idx, nval);
wm_put_nocache(ice, idx, nval | 0x100);
change = 1;
}
}
mutex_unlock(&ice->gpio_mutex);
return change;
}
/*
* ADC gain mixer control (-64dB to 0dB)
*/
#define ADC_0dB 0xcf
#define ADC_RES 128
#define ADC_MIN (ADC_0dB - ADC_RES)
static int wm_adc_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 2;
uinfo->value.integer.min = 0; /* mute (-64dB) */
uinfo->value.integer.max = ADC_RES; /* 0dB, 0.5dB step */
return 0;
}
static int wm_adc_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned short val;
int i;
mutex_lock(&ice->gpio_mutex);
for (i = 0; i < 2; i++) {
val = wm_get(ice, WM_ADC_ATTEN_L + i) & 0xff;
val = val > ADC_MIN ? (val - ADC_MIN) : 0;
ucontrol->value.integer.value[i] = val;
}
mutex_unlock(&ice->gpio_mutex);
return 0;
}
static int wm_adc_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned short ovol, nvol;
int i, idx, change = 0;
mutex_lock(&ice->gpio_mutex);
for (i = 0; i < 2; i++) {
nvol = ucontrol->value.integer.value[i];
nvol = nvol ? (nvol + ADC_MIN) : 0;
idx = WM_ADC_ATTEN_L + i;
ovol = wm_get(ice, idx) & 0xff;
if (ovol != nvol) {
wm_put(ice, idx, nvol);
change = 1;
}
}
mutex_unlock(&ice->gpio_mutex);
return change;
}
/*
* ADC input mux mixer control
*/
#define wm_adc_mux_info snd_ctl_boolean_mono_info
static int wm_adc_mux_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int bit = kcontrol->private_value;
mutex_lock(&ice->gpio_mutex);
ucontrol->value.integer.value[0] = (wm_get(ice, WM_ADC_MUX) & (1 << bit)) ? 1 : 0;
mutex_unlock(&ice->gpio_mutex);
return 0;
}
static int wm_adc_mux_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int bit = kcontrol->private_value;
unsigned short oval, nval;
int change;
mutex_lock(&ice->gpio_mutex);
nval = oval = wm_get(ice, WM_ADC_MUX);
if (ucontrol->value.integer.value[0])
nval |= (1 << bit);
else
nval &= ~(1 << bit);
change = nval != oval;
if (change) {
wm_put(ice, WM_ADC_MUX, nval);
}
mutex_unlock(&ice->gpio_mutex);
return change;
}
/*
* Analog bypass (In -> Out)
*/
#define wm_bypass_info snd_ctl_boolean_mono_info
static int wm_bypass_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
mutex_lock(&ice->gpio_mutex);
ucontrol->value.integer.value[0] = (wm_get(ice, WM_OUT_MUX) & 0x04) ? 1 : 0;
mutex_unlock(&ice->gpio_mutex);
return 0;
}
static int wm_bypass_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned short val, oval;
int change = 0;
mutex_lock(&ice->gpio_mutex);
val = oval = wm_get(ice, WM_OUT_MUX);
if (ucontrol->value.integer.value[0])
val |= 0x04;
else
val &= ~0x04;
if (val != oval) {
wm_put(ice, WM_OUT_MUX, val);
change = 1;
}
mutex_unlock(&ice->gpio_mutex);
return change;
}
/*
* Left/Right swap
*/
#define wm_chswap_info snd_ctl_boolean_mono_info
static int wm_chswap_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
mutex_lock(&ice->gpio_mutex);
ucontrol->value.integer.value[0] = (wm_get(ice, WM_DAC_CTRL1) & 0xf0) != 0x90;
mutex_unlock(&ice->gpio_mutex);
return 0;
}
static int wm_chswap_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned short val, oval;
int change = 0;
mutex_lock(&ice->gpio_mutex);
oval = wm_get(ice, WM_DAC_CTRL1);
val = oval & 0x0f;
if (ucontrol->value.integer.value[0])
val |= 0x60;
else
val |= 0x90;
if (val != oval) {
wm_put(ice, WM_DAC_CTRL1, val);
wm_put_nocache(ice, WM_DAC_CTRL1, val);
change = 1;
}
mutex_unlock(&ice->gpio_mutex);
return change;
}
/*
* write data in the SPI mode
*/
static void set_gpio_bit(struct snd_ice1712 *ice, unsigned int bit, int val)
{
unsigned int tmp = snd_ice1712_gpio_read(ice);
if (val)
tmp |= bit;
else
tmp &= ~bit;
snd_ice1712_gpio_write(ice, tmp);
}
static void spi_send_byte(struct snd_ice1712 *ice, unsigned char data)
{
int i;
for (i = 0; i < 8; i++) {
set_gpio_bit(ice, PONTIS_CS_CLK, 0);
udelay(1);
set_gpio_bit(ice, PONTIS_CS_WDATA, data & 0x80);
udelay(1);
set_gpio_bit(ice, PONTIS_CS_CLK, 1);
udelay(1);
data <<= 1;
}
}
static unsigned int spi_read_byte(struct snd_ice1712 *ice)
{
int i;
unsigned int val = 0;
for (i = 0; i < 8; i++) {
val <<= 1;
set_gpio_bit(ice, PONTIS_CS_CLK, 0);
udelay(1);
if (snd_ice1712_gpio_read(ice) & PONTIS_CS_RDATA)
val |= 1;
udelay(1);
set_gpio_bit(ice, PONTIS_CS_CLK, 1);
udelay(1);
}
return val;
}
static void spi_write(struct snd_ice1712 *ice, unsigned int dev, unsigned int reg, unsigned int data)
{
snd_ice1712_gpio_set_dir(ice, PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK);
snd_ice1712_gpio_set_mask(ice, ~(PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK));
set_gpio_bit(ice, PONTIS_CS_CS, 0);
spi_send_byte(ice, dev & ~1); /* WRITE */
spi_send_byte(ice, reg); /* MAP */
spi_send_byte(ice, data); /* DATA */
/* trigger */
set_gpio_bit(ice, PONTIS_CS_CS, 1);
udelay(1);
/* restore */
snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
}
static unsigned int spi_read(struct snd_ice1712 *ice, unsigned int dev, unsigned int reg)
{
unsigned int val;
snd_ice1712_gpio_set_dir(ice, PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK);
snd_ice1712_gpio_set_mask(ice, ~(PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK));
set_gpio_bit(ice, PONTIS_CS_CS, 0);
spi_send_byte(ice, dev & ~1); /* WRITE */
spi_send_byte(ice, reg); /* MAP */
/* trigger */
set_gpio_bit(ice, PONTIS_CS_CS, 1);
udelay(1);
set_gpio_bit(ice, PONTIS_CS_CS, 0);
spi_send_byte(ice, dev | 1); /* READ */
val = spi_read_byte(ice);
/* trigger */
set_gpio_bit(ice, PONTIS_CS_CS, 1);
udelay(1);
/* restore */
snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
return val;
}
/*
* SPDIF input source
*/
static int cs_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
static const char * const texts[] = {
"Coax", /* RXP0 */
"Optical", /* RXP1 */
"CD", /* RXP2 */
};
return snd_ctl_enum_info(uinfo, 1, 3, texts);
}
static int cs_source_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
mutex_lock(&ice->gpio_mutex);
ucontrol->value.enumerated.item[0] = ice->gpio.saved[0];
mutex_unlock(&ice->gpio_mutex);
return 0;
}
static int cs_source_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned char val;
int change = 0;
mutex_lock(&ice->gpio_mutex);
if (ucontrol->value.enumerated.item[0] != ice->gpio.saved[0]) {
ice->gpio.saved[0] = ucontrol->value.enumerated.item[0] & 3;
val = 0x80 | (ice->gpio.saved[0] << 3);
spi_write(ice, CS_DEV, 0x04, val);
change = 1;
}
mutex_unlock(&ice->gpio_mutex);
return change;
}
/*
* GPIO controls
*/
static int pontis_gpio_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 1;
uinfo->value.integer.min = 0;
uinfo->value.integer.max = 0xffff; /* 16bit */
return 0;
}
static int pontis_gpio_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
mutex_lock(&ice->gpio_mutex);
/* 4-7 reserved */
ucontrol->value.integer.value[0] = (~ice->gpio.write_mask & 0xffff) | 0x00f0;
mutex_unlock(&ice->gpio_mutex);
return 0;
}
static int pontis_gpio_mask_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned int val;
int changed;
mutex_lock(&ice->gpio_mutex);
/* 4-7 reserved */
val = (~ucontrol->value.integer.value[0] & 0xffff) | 0x00f0;
changed = val != ice->gpio.write_mask;
ice->gpio.write_mask = val;
mutex_unlock(&ice->gpio_mutex);
return changed;
}
static int pontis_gpio_dir_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
mutex_lock(&ice->gpio_mutex);
/* 4-7 reserved */
ucontrol->value.integer.value[0] = ice->gpio.direction & 0xff0f;
mutex_unlock(&ice->gpio_mutex);
return 0;
}
static int pontis_gpio_dir_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned int val;
int changed;
mutex_lock(&ice->gpio_mutex);
/* 4-7 reserved */
val = ucontrol->value.integer.value[0] & 0xff0f;
changed = (val != ice->gpio.direction);
ice->gpio.direction = val;
mutex_unlock(&ice->gpio_mutex);
return changed;
}
static int pontis_gpio_data_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
mutex_lock(&ice->gpio_mutex);
snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
ucontrol->value.integer.value[0] = snd_ice1712_gpio_read(ice) & 0xffff;
mutex_unlock(&ice->gpio_mutex);
return 0;
}
static int pontis_gpio_data_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned int val, nval;
int changed = 0;
mutex_lock(&ice->gpio_mutex);
snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
val = snd_ice1712_gpio_read(ice) & 0xffff;
nval = ucontrol->value.integer.value[0] & 0xffff;
if (val != nval) {
snd_ice1712_gpio_write(ice, nval);
changed = 1;
}
mutex_unlock(&ice->gpio_mutex);
return changed;
}
static const DECLARE_TLV_DB_SCALE(db_scale_volume, -6400, 50, 1);
/*
* mixers
*/
static const struct snd_kcontrol_new pontis_controls[] = {
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "PCM Playback Volume",
.info = wm_dac_vol_info,
.get = wm_dac_vol_get,
.put = wm_dac_vol_put,
.tlv = { .p = db_scale_volume },
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "Capture Volume",
.info = wm_adc_vol_info,
.get = wm_adc_vol_get,
.put = wm_adc_vol_put,
.tlv = { .p = db_scale_volume },
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "CD Capture Switch",
.info = wm_adc_mux_info,
.get = wm_adc_mux_get,
.put = wm_adc_mux_put,
.private_value = 0,
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Line Capture Switch",
.info = wm_adc_mux_info,
.get = wm_adc_mux_get,
.put = wm_adc_mux_put,
.private_value = 1,
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Analog Bypass Switch",
.info = wm_bypass_info,
.get = wm_bypass_get,
.put = wm_bypass_put,
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Swap Output Channels",
.info = wm_chswap_info,
.get = wm_chswap_get,
.put = wm_chswap_put,
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "IEC958 Input Source",
.info = cs_source_info,
.get = cs_source_get,
.put = cs_source_put,
},
/* FIXME: which interface? */
{
.iface = SNDRV_CTL_ELEM_IFACE_CARD,
.name = "GPIO Mask",
.info = pontis_gpio_mask_info,
.get = pontis_gpio_mask_get,
.put = pontis_gpio_mask_put,
},
{
.iface = SNDRV_CTL_ELEM_IFACE_CARD,
.name = "GPIO Direction",
.info = pontis_gpio_mask_info,
.get = pontis_gpio_dir_get,
.put = pontis_gpio_dir_put,
},
{
.iface = SNDRV_CTL_ELEM_IFACE_CARD,
.name = "GPIO Data",
.info = pontis_gpio_mask_info,
.get = pontis_gpio_data_get,
.put = pontis_gpio_data_put,
},
};
/*
* WM codec registers
*/
static void wm_proc_regs_write(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
{
struct snd_ice1712 *ice = entry->private_data;
char line[64];
unsigned int reg, val;
mutex_lock(&ice->gpio_mutex);
while (!snd_info_get_line(buffer, line, sizeof(line))) {
if (sscanf(line, "%x %x", ®, &val) != 2)
continue;
if (reg <= 0x17 && val <= 0xffff)
wm_put(ice, reg, val);
}
mutex_unlock(&ice->gpio_mutex);
}
static void wm_proc_regs_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
{
struct snd_ice1712 *ice = entry->private_data;
int reg, val;
mutex_lock(&ice->gpio_mutex);
for (reg = 0; reg <= 0x17; reg++) {
val = wm_get(ice, reg);
snd_iprintf(buffer, "%02x = %04x\n", reg, val);
}
mutex_unlock(&ice->gpio_mutex);
}
static void wm_proc_init(struct snd_ice1712 *ice)
{
snd_card_rw_proc_new(ice->card, "wm_codec", ice, wm_proc_regs_read,
wm_proc_regs_write);
}
static void cs_proc_regs_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
{
struct snd_ice1712 *ice = entry->private_data;
int reg, val;
mutex_lock(&ice->gpio_mutex);
for (reg = 0; reg <= 0x26; reg++) {
val = spi_read(ice, CS_DEV, reg);
snd_iprintf(buffer, "%02x = %02x\n", reg, val);
}
val = spi_read(ice, CS_DEV, 0x7f);
snd_iprintf(buffer, "%02x = %02x\n", 0x7f, val);
mutex_unlock(&ice->gpio_mutex);
}
static void cs_proc_init(struct snd_ice1712 *ice)
{
snd_card_ro_proc_new(ice->card, "cs_codec", ice, cs_proc_regs_read);
}
static int pontis_add_controls(struct snd_ice1712 *ice)
{
unsigned int i;
int err;
for (i = 0; i < ARRAY_SIZE(pontis_controls); i++) {
err = snd_ctl_add(ice->card, snd_ctl_new1(&pontis_controls[i], ice));
if (err < 0)
return err;
}
wm_proc_init(ice);
cs_proc_init(ice);
return 0;
}
/*
* initialize the chip
*/
static int pontis_init(struct snd_ice1712 *ice)
{
static const unsigned short wm_inits[] = {
/* These come first to reduce init pop noise */
WM_ADC_MUX, 0x00c0, /* ADC mute */
WM_DAC_MUTE, 0x0001, /* DAC softmute */
WM_DAC_CTRL1, 0x0000, /* DAC mute */
WM_POWERDOWN, 0x0008, /* All power-up except HP */
WM_RESET, 0x0000, /* reset */
};
static const unsigned short wm_inits2[] = {
WM_MASTER_CTRL, 0x0022, /* 256fs, slave mode */
WM_DAC_INT, 0x0022, /* I2S, normal polarity, 24bit */
WM_ADC_INT, 0x0022, /* I2S, normal polarity, 24bit */
WM_DAC_CTRL1, 0x0090, /* DAC L/R */
WM_OUT_MUX, 0x0001, /* OUT DAC */
WM_HP_ATTEN_L, 0x0179, /* HP 0dB */
WM_HP_ATTEN_R, 0x0179, /* HP 0dB */
WM_DAC_ATTEN_L, 0x0000, /* DAC 0dB */
WM_DAC_ATTEN_L, 0x0100, /* DAC 0dB */
WM_DAC_ATTEN_R, 0x0000, /* DAC 0dB */
WM_DAC_ATTEN_R, 0x0100, /* DAC 0dB */
/* WM_DAC_MASTER, 0x0100, */ /* DAC master muted */
WM_PHASE_SWAP, 0x0000, /* phase normal */
WM_DAC_CTRL2, 0x0000, /* no deemphasis, no ZFLG */
WM_ADC_ATTEN_L, 0x0000, /* ADC muted */
WM_ADC_ATTEN_R, 0x0000, /* ADC muted */
#if 0
WM_ALC_CTRL1, 0x007b, /* */
WM_ALC_CTRL2, 0x0000, /* */
WM_ALC_CTRL3, 0x0000, /* */
WM_NOISE_GATE, 0x0000, /* */
#endif
WM_DAC_MUTE, 0x0000, /* DAC unmute */
WM_ADC_MUX, 0x0003, /* ADC unmute, both CD/Line On */
};
static const unsigned char cs_inits[] = {
0x04, 0x80, /* RUN, RXP0 */
0x05, 0x05, /* slave, 24bit */
0x01, 0x00,
0x02, 0x00,
0x03, 0x00,
};
unsigned int i;
ice->vt1720 = 1;
ice->num_total_dacs = 2;
ice->num_total_adcs = 2;
/* to remember the register values */
ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
if (! ice->akm)
return -ENOMEM;
ice->akm_codecs = 1;
/* HACK - use this as the SPDIF source.
* don't call snd_ice1712_gpio_get/put(), otherwise it's overwritten
*/
ice->gpio.saved[0] = 0;
/* initialize WM8776 codec */
for (i = 0; i < ARRAY_SIZE(wm_inits); i += 2)
wm_put(ice, wm_inits[i], wm_inits[i+1]);
schedule_timeout_uninterruptible(1);
for (i = 0; i < ARRAY_SIZE(wm_inits2); i += 2)
wm_put(ice, wm_inits2[i], wm_inits2[i+1]);
/* initialize CS8416 codec */
/* assert PRST#; MT05 bit 7 */
outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
mdelay(5);
/* deassert PRST# */
outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
for (i = 0; i < ARRAY_SIZE(cs_inits); i += 2)
spi_write(ice, CS_DEV, cs_inits[i], cs_inits[i+1]);
return 0;
}
/*
* Pontis boards don't provide the EEPROM data at all.
* hence the driver needs to sets up it properly.
*/
static const unsigned char pontis_eeprom[] = {
[ICE_EEP2_SYSCONF] = 0x08, /* clock 256, mpu401, spdif-in/ADC, 1DAC */
[ICE_EEP2_ACLINK] = 0x80, /* I2S */
[ICE_EEP2_I2S] = 0xf8, /* vol, 96k, 24bit, 192k */
[ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
[ICE_EEP2_GPIO_DIR] = 0x07,
[ICE_EEP2_GPIO_DIR1] = 0x00,
[ICE_EEP2_GPIO_DIR2] = 0x00, /* ignored */
[ICE_EEP2_GPIO_MASK] = 0x0f, /* 4-7 reserved for CS8416 */
[ICE_EEP2_GPIO_MASK1] = 0xff,
[ICE_EEP2_GPIO_MASK2] = 0x00, /* ignored */
[ICE_EEP2_GPIO_STATE] = 0x06, /* 0-low, 1-high, 2-high */
[ICE_EEP2_GPIO_STATE1] = 0x00,
[ICE_EEP2_GPIO_STATE2] = 0x00, /* ignored */
};
/* entry point */
struct snd_ice1712_card_info snd_vt1720_pontis_cards[] = {
{
.subvendor = VT1720_SUBDEVICE_PONTIS_MS300,
.name = "Pontis MS300",
.model = "ms300",
.chip_init = pontis_init,
.build_controls = pontis_add_controls,
.eeprom_size = sizeof(pontis_eeprom),
.eeprom_data = pontis_eeprom,
},
{ } /* terminator */
};
| linux-master | sound/pci/ice1712/pontis.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* ALSA driver for VT1724 ICEnsemble ICE1724 / VIA VT1724 (Envy24HT)
* VIA VT1720 (Envy24PT)
*
* Copyright (c) 2000 Jaroslav Kysela <[email protected]>
* 2002 James Stafford <[email protected]>
* 2003 Takashi Iwai <[email protected]>
*/
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <sound/core.h>
#include <sound/info.h>
#include <sound/rawmidi.h>
#include <sound/initval.h>
#include <sound/asoundef.h>
#include "ice1712.h"
#include "envy24ht.h"
/* lowlevel routines */
#include "amp.h"
#include "revo.h"
#include "aureon.h"
#include "vt1720_mobo.h"
#include "pontis.h"
#include "prodigy192.h"
#include "prodigy_hifi.h"
#include "juli.h"
#include "maya44.h"
#include "phase.h"
#include "wtm.h"
#include "se.h"
#include "quartet.h"
#include "psc724.h"
MODULE_AUTHOR("Jaroslav Kysela <[email protected]>");
MODULE_DESCRIPTION("VIA ICEnsemble ICE1724/1720 (Envy24HT/PT)");
MODULE_LICENSE("GPL");
static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
static char *model[SNDRV_CARDS];
module_param_array(index, int, NULL, 0444);
MODULE_PARM_DESC(index, "Index value for ICE1724 soundcard.");
module_param_array(id, charp, NULL, 0444);
MODULE_PARM_DESC(id, "ID string for ICE1724 soundcard.");
module_param_array(enable, bool, NULL, 0444);
MODULE_PARM_DESC(enable, "Enable ICE1724 soundcard.");
module_param_array(model, charp, NULL, 0444);
MODULE_PARM_DESC(model, "Use the given board model.");
/* Both VT1720 and VT1724 have the same PCI IDs */
static const struct pci_device_id snd_vt1724_ids[] = {
{ PCI_VDEVICE(ICE, PCI_DEVICE_ID_VT1724), 0 },
{ 0, }
};
MODULE_DEVICE_TABLE(pci, snd_vt1724_ids);
static int PRO_RATE_LOCKED;
static int PRO_RATE_RESET = 1;
static unsigned int PRO_RATE_DEFAULT = 44100;
static const char * const ext_clock_names[1] = { "IEC958 In" };
/*
* Basic I/O
*/
/*
* default rates, default clock routines
*/
/* check whether the clock mode is spdif-in */
static inline int stdclock_is_spdif_master(struct snd_ice1712 *ice)
{
return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0;
}
/*
* locking rate makes sense only for internal clock mode
*/
static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
{
return (!ice->is_spdif_master(ice)) && PRO_RATE_LOCKED;
}
/*
* ac97 section
*/
static unsigned char snd_vt1724_ac97_ready(struct snd_ice1712 *ice)
{
unsigned char old_cmd;
int tm;
for (tm = 0; tm < 0x10000; tm++) {
old_cmd = inb(ICEMT1724(ice, AC97_CMD));
if (old_cmd & (VT1724_AC97_WRITE | VT1724_AC97_READ))
continue;
if (!(old_cmd & VT1724_AC97_READY))
continue;
return old_cmd;
}
dev_dbg(ice->card->dev, "snd_vt1724_ac97_ready: timeout\n");
return old_cmd;
}
static int snd_vt1724_ac97_wait_bit(struct snd_ice1712 *ice, unsigned char bit)
{
int tm;
for (tm = 0; tm < 0x10000; tm++)
if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0)
return 0;
dev_dbg(ice->card->dev, "snd_vt1724_ac97_wait_bit: timeout\n");
return -EIO;
}
static void snd_vt1724_ac97_write(struct snd_ac97 *ac97,
unsigned short reg,
unsigned short val)
{
struct snd_ice1712 *ice = ac97->private_data;
unsigned char old_cmd;
old_cmd = snd_vt1724_ac97_ready(ice);
old_cmd &= ~VT1724_AC97_ID_MASK;
old_cmd |= ac97->num;
outb(reg, ICEMT1724(ice, AC97_INDEX));
outw(val, ICEMT1724(ice, AC97_DATA));
outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD));
snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE);
}
static unsigned short snd_vt1724_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
{
struct snd_ice1712 *ice = ac97->private_data;
unsigned char old_cmd;
old_cmd = snd_vt1724_ac97_ready(ice);
old_cmd &= ~VT1724_AC97_ID_MASK;
old_cmd |= ac97->num;
outb(reg, ICEMT1724(ice, AC97_INDEX));
outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD));
if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0)
return ~0;
return inw(ICEMT1724(ice, AC97_DATA));
}
/*
* GPIO operations
*/
/* set gpio direction 0 = read, 1 = write */
static void snd_vt1724_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
{
outl(data, ICEREG1724(ice, GPIO_DIRECTION));
inw(ICEREG1724(ice, GPIO_DIRECTION)); /* dummy read for pci-posting */
}
/* get gpio direction 0 = read, 1 = write */
static unsigned int snd_vt1724_get_gpio_dir(struct snd_ice1712 *ice)
{
return inl(ICEREG1724(ice, GPIO_DIRECTION));
}
/* set the gpio mask (0 = writable) */
static void snd_vt1724_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
{
outw(data, ICEREG1724(ice, GPIO_WRITE_MASK));
if (!ice->vt1720) /* VT1720 supports only 16 GPIO bits */
outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22));
inw(ICEREG1724(ice, GPIO_WRITE_MASK)); /* dummy read for pci-posting */
}
static unsigned int snd_vt1724_get_gpio_mask(struct snd_ice1712 *ice)
{
unsigned int mask;
if (!ice->vt1720)
mask = (unsigned int)inb(ICEREG1724(ice, GPIO_WRITE_MASK_22));
else
mask = 0;
mask = (mask << 16) | inw(ICEREG1724(ice, GPIO_WRITE_MASK));
return mask;
}
static void snd_vt1724_set_gpio_data(struct snd_ice1712 *ice, unsigned int data)
{
outw(data, ICEREG1724(ice, GPIO_DATA));
if (!ice->vt1720)
outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22));
inw(ICEREG1724(ice, GPIO_DATA)); /* dummy read for pci-posting */
}
static unsigned int snd_vt1724_get_gpio_data(struct snd_ice1712 *ice)
{
unsigned int data;
if (!ice->vt1720)
data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22));
else
data = 0;
data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA));
return data;
}
/*
* MIDI
*/
static void vt1724_midi_clear_rx(struct snd_ice1712 *ice)
{
unsigned int count;
for (count = inb(ICEREG1724(ice, MPU_RXFIFO)); count > 0; --count)
inb(ICEREG1724(ice, MPU_DATA));
}
static inline struct snd_rawmidi_substream *
get_rawmidi_substream(struct snd_ice1712 *ice, unsigned int stream)
{
return list_first_entry(&ice->rmidi[0]->streams[stream].substreams,
struct snd_rawmidi_substream, list);
}
static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable);
static void vt1724_midi_write(struct snd_ice1712 *ice)
{
struct snd_rawmidi_substream *s;
int count, i;
u8 buffer[32];
s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_OUTPUT);
count = 31 - inb(ICEREG1724(ice, MPU_TXFIFO));
if (count > 0) {
count = snd_rawmidi_transmit(s, buffer, count);
for (i = 0; i < count; ++i)
outb(buffer[i], ICEREG1724(ice, MPU_DATA));
}
/* mask irq when all bytes have been transmitted.
* enabled again in output_trigger when the new data comes in.
*/
enable_midi_irq(ice, VT1724_IRQ_MPU_TX,
!snd_rawmidi_transmit_empty(s));
}
static void vt1724_midi_read(struct snd_ice1712 *ice)
{
struct snd_rawmidi_substream *s;
int count, i;
u8 buffer[32];
s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_INPUT);
count = inb(ICEREG1724(ice, MPU_RXFIFO));
if (count > 0) {
count = min(count, 32);
for (i = 0; i < count; ++i)
buffer[i] = inb(ICEREG1724(ice, MPU_DATA));
snd_rawmidi_receive(s, buffer, count);
}
}
/* call with ice->reg_lock */
static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable)
{
u8 mask = inb(ICEREG1724(ice, IRQMASK));
if (enable)
mask &= ~flag;
else
mask |= flag;
outb(mask, ICEREG1724(ice, IRQMASK));
}
static void vt1724_enable_midi_irq(struct snd_rawmidi_substream *substream,
u8 flag, int enable)
{
struct snd_ice1712 *ice = substream->rmidi->private_data;
spin_lock_irq(&ice->reg_lock);
enable_midi_irq(ice, flag, enable);
spin_unlock_irq(&ice->reg_lock);
}
static int vt1724_midi_output_open(struct snd_rawmidi_substream *s)
{
return 0;
}
static int vt1724_midi_output_close(struct snd_rawmidi_substream *s)
{
return 0;
}
static void vt1724_midi_output_trigger(struct snd_rawmidi_substream *s, int up)
{
struct snd_ice1712 *ice = s->rmidi->private_data;
unsigned long flags;
spin_lock_irqsave(&ice->reg_lock, flags);
if (up) {
ice->midi_output = 1;
vt1724_midi_write(ice);
} else {
ice->midi_output = 0;
enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
}
spin_unlock_irqrestore(&ice->reg_lock, flags);
}
static void vt1724_midi_output_drain(struct snd_rawmidi_substream *s)
{
struct snd_ice1712 *ice = s->rmidi->private_data;
unsigned long timeout;
vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_TX, 0);
/* 32 bytes should be transmitted in less than about 12 ms */
timeout = jiffies + msecs_to_jiffies(15);
do {
if (inb(ICEREG1724(ice, MPU_CTRL)) & VT1724_MPU_TX_EMPTY)
break;
schedule_timeout_uninterruptible(1);
} while (time_after(timeout, jiffies));
}
static const struct snd_rawmidi_ops vt1724_midi_output_ops = {
.open = vt1724_midi_output_open,
.close = vt1724_midi_output_close,
.trigger = vt1724_midi_output_trigger,
.drain = vt1724_midi_output_drain,
};
static int vt1724_midi_input_open(struct snd_rawmidi_substream *s)
{
vt1724_midi_clear_rx(s->rmidi->private_data);
vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 1);
return 0;
}
static int vt1724_midi_input_close(struct snd_rawmidi_substream *s)
{
vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 0);
return 0;
}
static void vt1724_midi_input_trigger(struct snd_rawmidi_substream *s, int up)
{
struct snd_ice1712 *ice = s->rmidi->private_data;
unsigned long flags;
spin_lock_irqsave(&ice->reg_lock, flags);
if (up) {
ice->midi_input = 1;
vt1724_midi_read(ice);
} else {
ice->midi_input = 0;
}
spin_unlock_irqrestore(&ice->reg_lock, flags);
}
static const struct snd_rawmidi_ops vt1724_midi_input_ops = {
.open = vt1724_midi_input_open,
.close = vt1724_midi_input_close,
.trigger = vt1724_midi_input_trigger,
};
/*
* Interrupt handler
*/
static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id)
{
struct snd_ice1712 *ice = dev_id;
unsigned char status;
unsigned char status_mask =
VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX | VT1724_IRQ_MTPCM;
int handled = 0;
int timeout = 0;
while (1) {
status = inb(ICEREG1724(ice, IRQSTAT));
status &= status_mask;
if (status == 0)
break;
spin_lock(&ice->reg_lock);
if (++timeout > 10) {
status = inb(ICEREG1724(ice, IRQSTAT));
dev_err(ice->card->dev,
"Too long irq loop, status = 0x%x\n", status);
if (status & VT1724_IRQ_MPU_TX) {
dev_err(ice->card->dev, "Disabling MPU_TX\n");
enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
}
spin_unlock(&ice->reg_lock);
break;
}
handled = 1;
if (status & VT1724_IRQ_MPU_TX) {
if (ice->midi_output)
vt1724_midi_write(ice);
else
enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
/* Due to mysterical reasons, MPU_TX is always
* generated (and can't be cleared) when a PCM
* playback is going. So let's ignore at the
* next loop.
*/
status_mask &= ~VT1724_IRQ_MPU_TX;
}
if (status & VT1724_IRQ_MPU_RX) {
if (ice->midi_input)
vt1724_midi_read(ice);
else
vt1724_midi_clear_rx(ice);
}
/* ack MPU irq */
outb(status, ICEREG1724(ice, IRQSTAT));
spin_unlock(&ice->reg_lock);
if (status & VT1724_IRQ_MTPCM) {
/*
* Multi-track PCM
* PCM assignment are:
* Playback DMA0 (M/C) = playback_pro_substream
* Playback DMA1 = playback_con_substream_ds[0]
* Playback DMA2 = playback_con_substream_ds[1]
* Playback DMA3 = playback_con_substream_ds[2]
* Playback DMA4 (SPDIF) = playback_con_substream
* Record DMA0 = capture_pro_substream
* Record DMA1 = capture_con_substream
*/
unsigned char mtstat = inb(ICEMT1724(ice, IRQ));
if (mtstat & VT1724_MULTI_PDMA0) {
if (ice->playback_pro_substream)
snd_pcm_period_elapsed(ice->playback_pro_substream);
}
if (mtstat & VT1724_MULTI_RDMA0) {
if (ice->capture_pro_substream)
snd_pcm_period_elapsed(ice->capture_pro_substream);
}
if (mtstat & VT1724_MULTI_PDMA1) {
if (ice->playback_con_substream_ds[0])
snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]);
}
if (mtstat & VT1724_MULTI_PDMA2) {
if (ice->playback_con_substream_ds[1])
snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]);
}
if (mtstat & VT1724_MULTI_PDMA3) {
if (ice->playback_con_substream_ds[2])
snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]);
}
if (mtstat & VT1724_MULTI_PDMA4) {
if (ice->playback_con_substream)
snd_pcm_period_elapsed(ice->playback_con_substream);
}
if (mtstat & VT1724_MULTI_RDMA1) {
if (ice->capture_con_substream)
snd_pcm_period_elapsed(ice->capture_con_substream);
}
/* ack anyway to avoid freeze */
outb(mtstat, ICEMT1724(ice, IRQ));
/* ought to really handle this properly */
if (mtstat & VT1724_MULTI_FIFO_ERR) {
unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR));
outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR));
outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK));
/* If I don't do this, I get machine lockup due to continual interrupts */
}
}
}
return IRQ_RETVAL(handled);
}
/*
* PCM code - professional part (multitrack)
*/
static const unsigned int rates[] = {
8000, 9600, 11025, 12000, 16000, 22050, 24000,
32000, 44100, 48000, 64000, 88200, 96000,
176400, 192000,
};
static const struct snd_pcm_hw_constraint_list hw_constraints_rates_96 = {
.count = ARRAY_SIZE(rates) - 2, /* up to 96000 */
.list = rates,
.mask = 0,
};
static const struct snd_pcm_hw_constraint_list hw_constraints_rates_48 = {
.count = ARRAY_SIZE(rates) - 5, /* up to 48000 */
.list = rates,
.mask = 0,
};
static const struct snd_pcm_hw_constraint_list hw_constraints_rates_192 = {
.count = ARRAY_SIZE(rates),
.list = rates,
.mask = 0,
};
struct vt1724_pcm_reg {
unsigned int addr; /* ADDR register offset */
unsigned int size; /* SIZE register offset */
unsigned int count; /* COUNT register offset */
unsigned int start; /* start & pause bit */
};
static int snd_vt1724_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
{
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
unsigned char what;
unsigned char old;
struct snd_pcm_substream *s;
what = 0;
snd_pcm_group_for_each_entry(s, substream) {
if (snd_pcm_substream_chip(s) == ice) {
const struct vt1724_pcm_reg *reg;
reg = s->runtime->private_data;
what |= reg->start;
snd_pcm_trigger_done(s, substream);
}
}
switch (cmd) {
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
spin_lock(&ice->reg_lock);
old = inb(ICEMT1724(ice, DMA_PAUSE));
if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
old |= what;
else
old &= ~what;
outb(old, ICEMT1724(ice, DMA_PAUSE));
spin_unlock(&ice->reg_lock);
break;
case SNDRV_PCM_TRIGGER_START:
case SNDRV_PCM_TRIGGER_STOP:
case SNDRV_PCM_TRIGGER_SUSPEND:
spin_lock(&ice->reg_lock);
old = inb(ICEMT1724(ice, DMA_CONTROL));
if (cmd == SNDRV_PCM_TRIGGER_START)
old |= what;
else
old &= ~what;
outb(old, ICEMT1724(ice, DMA_CONTROL));
spin_unlock(&ice->reg_lock);
break;
case SNDRV_PCM_TRIGGER_RESUME:
/* apps will have to restart stream */
break;
default:
return -EINVAL;
}
return 0;
}
/*
*/
#define DMA_STARTS (VT1724_RDMA0_START|VT1724_PDMA0_START|VT1724_RDMA1_START|\
VT1724_PDMA1_START|VT1724_PDMA2_START|VT1724_PDMA3_START|VT1724_PDMA4_START)
#define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\
VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE)
static const unsigned int stdclock_rate_list[16] = {
48000, 24000, 12000, 9600, 32000, 16000, 8000, 96000, 44100,
22050, 11025, 88200, 176400, 0, 192000, 64000
};
static unsigned int stdclock_get_rate(struct snd_ice1712 *ice)
{
return stdclock_rate_list[inb(ICEMT1724(ice, RATE)) & 15];
}
static void stdclock_set_rate(struct snd_ice1712 *ice, unsigned int rate)
{
int i;
for (i = 0; i < ARRAY_SIZE(stdclock_rate_list); i++) {
if (stdclock_rate_list[i] == rate) {
outb(i, ICEMT1724(ice, RATE));
return;
}
}
}
static unsigned char stdclock_set_mclk(struct snd_ice1712 *ice,
unsigned int rate)
{
unsigned char val, old;
/* check MT02 */
if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
val = old = inb(ICEMT1724(ice, I2S_FORMAT));
if (rate > 96000)
val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */
else
val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */
if (val != old) {
outb(val, ICEMT1724(ice, I2S_FORMAT));
/* master clock changed */
return 1;
}
}
/* no change in master clock */
return 0;
}
static int snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate,
int force)
{
unsigned long flags;
unsigned char mclk_change;
unsigned int i, old_rate;
bool call_set_rate = false;
if (rate > ice->hw_rates->list[ice->hw_rates->count - 1])
return -EINVAL;
spin_lock_irqsave(&ice->reg_lock, flags);
if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) ||
(inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) {
/* running? we cannot change the rate now... */
spin_unlock_irqrestore(&ice->reg_lock, flags);
return ((rate == ice->cur_rate) && !force) ? 0 : -EBUSY;
}
if (!force && is_pro_rate_locked(ice)) {
/* comparing required and current rate - makes sense for
* internal clock only */
spin_unlock_irqrestore(&ice->reg_lock, flags);
return (rate == ice->cur_rate) ? 0 : -EBUSY;
}
if (force || !ice->is_spdif_master(ice)) {
/* force means the rate was switched by ucontrol, otherwise
* setting clock rate for internal clock mode */
old_rate = ice->get_rate(ice);
if (force || (old_rate != rate))
call_set_rate = true;
else if (rate == ice->cur_rate) {
spin_unlock_irqrestore(&ice->reg_lock, flags);
return 0;
}
}
ice->cur_rate = rate;
spin_unlock_irqrestore(&ice->reg_lock, flags);
if (call_set_rate)
ice->set_rate(ice, rate);
/* setting master clock */
mclk_change = ice->set_mclk(ice, rate);
if (mclk_change && ice->gpio.i2s_mclk_changed)
ice->gpio.i2s_mclk_changed(ice);
if (ice->gpio.set_pro_rate)
ice->gpio.set_pro_rate(ice, rate);
/* set up codecs */
for (i = 0; i < ice->akm_codecs; i++) {
if (ice->akm[i].ops.set_rate_val)
ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
}
if (ice->spdif.ops.setup_rate)
ice->spdif.ops.setup_rate(ice, rate);
return 0;
}
static int snd_vt1724_pcm_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *hw_params)
{
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
int i, chs;
chs = params_channels(hw_params);
mutex_lock(&ice->open_mutex);
/* mark surround channels */
if (substream == ice->playback_pro_substream) {
/* PDMA0 can be multi-channel up to 8 */
chs = chs / 2 - 1;
for (i = 0; i < chs; i++) {
if (ice->pcm_reserved[i] &&
ice->pcm_reserved[i] != substream) {
mutex_unlock(&ice->open_mutex);
return -EBUSY;
}
ice->pcm_reserved[i] = substream;
}
for (; i < 3; i++) {
if (ice->pcm_reserved[i] == substream)
ice->pcm_reserved[i] = NULL;
}
} else {
for (i = 0; i < 3; i++) {
/* check individual playback stream */
if (ice->playback_con_substream_ds[i] == substream) {
if (ice->pcm_reserved[i] &&
ice->pcm_reserved[i] != substream) {
mutex_unlock(&ice->open_mutex);
return -EBUSY;
}
ice->pcm_reserved[i] = substream;
break;
}
}
}
mutex_unlock(&ice->open_mutex);
return snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0);
}
static int snd_vt1724_pcm_hw_free(struct snd_pcm_substream *substream)
{
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
int i;
mutex_lock(&ice->open_mutex);
/* unmark surround channels */
for (i = 0; i < 3; i++)
if (ice->pcm_reserved[i] == substream)
ice->pcm_reserved[i] = NULL;
mutex_unlock(&ice->open_mutex);
return 0;
}
static int snd_vt1724_playback_pro_prepare(struct snd_pcm_substream *substream)
{
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
unsigned char val;
unsigned int size;
spin_lock_irq(&ice->reg_lock);
val = (8 - substream->runtime->channels) >> 1;
outb(val, ICEMT1724(ice, BURST));
outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR));
size = (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1;
/* outl(size, ICEMT1724(ice, PLAYBACK_SIZE)); */
outw(size, ICEMT1724(ice, PLAYBACK_SIZE));
outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2);
size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
/* outl(size, ICEMT1724(ice, PLAYBACK_COUNT)); */
outw(size, ICEMT1724(ice, PLAYBACK_COUNT));
outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2);
spin_unlock_irq(&ice->reg_lock);
/*
dev_dbg(ice->card->dev, "pro prepare: ch = %d, addr = 0x%x, "
"buffer = 0x%x, period = 0x%x\n",
substream->runtime->channels,
(unsigned int)substream->runtime->dma_addr,
snd_pcm_lib_buffer_bytes(substream),
snd_pcm_lib_period_bytes(substream));
*/
return 0;
}
static snd_pcm_uframes_t snd_vt1724_playback_pro_pointer(struct snd_pcm_substream *substream)
{
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
size_t ptr;
if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START))
return 0;
#if 0 /* read PLAYBACK_ADDR */
ptr = inl(ICEMT1724(ice, PLAYBACK_ADDR));
if (ptr < substream->runtime->dma_addr) {
dev_dbg(ice->card->dev, "invalid negative ptr\n");
return 0;
}
ptr -= substream->runtime->dma_addr;
ptr = bytes_to_frames(substream->runtime, ptr);
if (ptr >= substream->runtime->buffer_size) {
dev_dbg(ice->card->dev, "invalid ptr %d (size=%d)\n",
(int)ptr, (int)substream->runtime->period_size);
return 0;
}
#else /* read PLAYBACK_SIZE */
ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff;
ptr = (ptr + 1) << 2;
ptr = bytes_to_frames(substream->runtime, ptr);
if (!ptr)
;
else if (ptr <= substream->runtime->buffer_size)
ptr = substream->runtime->buffer_size - ptr;
else {
dev_dbg(ice->card->dev, "invalid ptr %d (size=%d)\n",
(int)ptr, (int)substream->runtime->buffer_size);
ptr = 0;
}
#endif
return ptr;
}
static int snd_vt1724_pcm_prepare(struct snd_pcm_substream *substream)
{
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
spin_lock_irq(&ice->reg_lock);
outl(substream->runtime->dma_addr, ice->profi_port + reg->addr);
outw((snd_pcm_lib_buffer_bytes(substream) >> 2) - 1,
ice->profi_port + reg->size);
outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1,
ice->profi_port + reg->count);
spin_unlock_irq(&ice->reg_lock);
return 0;
}
static snd_pcm_uframes_t snd_vt1724_pcm_pointer(struct snd_pcm_substream *substream)
{
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
size_t ptr;
if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start))
return 0;
#if 0 /* use ADDR register */
ptr = inl(ice->profi_port + reg->addr);
ptr -= substream->runtime->dma_addr;
return bytes_to_frames(substream->runtime, ptr);
#else /* use SIZE register */
ptr = inw(ice->profi_port + reg->size);
ptr = (ptr + 1) << 2;
ptr = bytes_to_frames(substream->runtime, ptr);
if (!ptr)
;
else if (ptr <= substream->runtime->buffer_size)
ptr = substream->runtime->buffer_size - ptr;
else {
dev_dbg(ice->card->dev, "invalid ptr %d (size=%d)\n",
(int)ptr, (int)substream->runtime->buffer_size);
ptr = 0;
}
return ptr;
#endif
}
static const struct vt1724_pcm_reg vt1724_pdma0_reg = {
.addr = VT1724_MT_PLAYBACK_ADDR,
.size = VT1724_MT_PLAYBACK_SIZE,
.count = VT1724_MT_PLAYBACK_COUNT,
.start = VT1724_PDMA0_START,
};
static const struct vt1724_pcm_reg vt1724_pdma4_reg = {
.addr = VT1724_MT_PDMA4_ADDR,
.size = VT1724_MT_PDMA4_SIZE,
.count = VT1724_MT_PDMA4_COUNT,
.start = VT1724_PDMA4_START,
};
static const struct vt1724_pcm_reg vt1724_rdma0_reg = {
.addr = VT1724_MT_CAPTURE_ADDR,
.size = VT1724_MT_CAPTURE_SIZE,
.count = VT1724_MT_CAPTURE_COUNT,
.start = VT1724_RDMA0_START,
};
static const struct vt1724_pcm_reg vt1724_rdma1_reg = {
.addr = VT1724_MT_RDMA1_ADDR,
.size = VT1724_MT_RDMA1_SIZE,
.count = VT1724_MT_RDMA1_COUNT,
.start = VT1724_RDMA1_START,
};
#define vt1724_playback_pro_reg vt1724_pdma0_reg
#define vt1724_playback_spdif_reg vt1724_pdma4_reg
#define vt1724_capture_pro_reg vt1724_rdma0_reg
#define vt1724_capture_spdif_reg vt1724_rdma1_reg
static const struct snd_pcm_hardware snd_vt1724_playback_pro = {
.info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_MMAP_VALID |
SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
.formats = SNDRV_PCM_FMTBIT_S32_LE,
.rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
.rate_min = 8000,
.rate_max = 192000,
.channels_min = 2,
.channels_max = 8,
.buffer_bytes_max = (1UL << 21), /* 19bits dword */
.period_bytes_min = 8 * 4 * 2, /* FIXME: constraints needed */
.period_bytes_max = (1UL << 21),
.periods_min = 2,
.periods_max = 1024,
};
static const struct snd_pcm_hardware snd_vt1724_spdif = {
.info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_MMAP_VALID |
SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
.formats = SNDRV_PCM_FMTBIT_S32_LE,
.rates = (SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100|
SNDRV_PCM_RATE_48000|SNDRV_PCM_RATE_88200|
SNDRV_PCM_RATE_96000|SNDRV_PCM_RATE_176400|
SNDRV_PCM_RATE_192000),
.rate_min = 32000,
.rate_max = 192000,
.channels_min = 2,
.channels_max = 2,
.buffer_bytes_max = (1UL << 18), /* 16bits dword */
.period_bytes_min = 2 * 4 * 2,
.period_bytes_max = (1UL << 18),
.periods_min = 2,
.periods_max = 1024,
};
static const struct snd_pcm_hardware snd_vt1724_2ch_stereo = {
.info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_MMAP_VALID |
SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
.formats = SNDRV_PCM_FMTBIT_S32_LE,
.rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
.rate_min = 8000,
.rate_max = 192000,
.channels_min = 2,
.channels_max = 2,
.buffer_bytes_max = (1UL << 18), /* 16bits dword */
.period_bytes_min = 2 * 4 * 2,
.period_bytes_max = (1UL << 18),
.periods_min = 2,
.periods_max = 1024,
};
/*
* set rate constraints
*/
static void set_std_hw_rates(struct snd_ice1712 *ice)
{
if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
/* I2S */
/* VT1720 doesn't support more than 96kHz */
if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
ice->hw_rates = &hw_constraints_rates_192;
else
ice->hw_rates = &hw_constraints_rates_96;
} else {
/* ACLINK */
ice->hw_rates = &hw_constraints_rates_48;
}
}
static int set_rate_constraints(struct snd_ice1712 *ice,
struct snd_pcm_substream *substream)
{
struct snd_pcm_runtime *runtime = substream->runtime;
runtime->hw.rate_min = ice->hw_rates->list[0];
runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1];
runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
return snd_pcm_hw_constraint_list(runtime, 0,
SNDRV_PCM_HW_PARAM_RATE,
ice->hw_rates);
}
/* if the card has the internal rate locked (is_pro_locked), limit runtime
hw rates to the current internal rate only.
*/
static void constrain_rate_if_locked(struct snd_pcm_substream *substream)
{
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
unsigned int rate;
if (is_pro_rate_locked(ice)) {
rate = ice->get_rate(ice);
if (rate >= runtime->hw.rate_min
&& rate <= runtime->hw.rate_max) {
runtime->hw.rate_min = rate;
runtime->hw.rate_max = rate;
}
}
}
/* multi-channel playback needs alignment 8x32bit regardless of the channels
* actually used
*/
#define VT1724_BUFFER_ALIGN 0x20
static int snd_vt1724_playback_pro_open(struct snd_pcm_substream *substream)
{
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
int chs, num_indeps;
runtime->private_data = (void *)&vt1724_playback_pro_reg;
ice->playback_pro_substream = substream;
runtime->hw = snd_vt1724_playback_pro;
snd_pcm_set_sync(substream);
snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
set_rate_constraints(ice, substream);
mutex_lock(&ice->open_mutex);
/* calculate the currently available channels */
num_indeps = ice->num_total_dacs / 2 - 1;
for (chs = 0; chs < num_indeps; chs++) {
if (ice->pcm_reserved[chs])
break;
}
chs = (chs + 1) * 2;
runtime->hw.channels_max = chs;
if (chs > 2) /* channels must be even */
snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2);
mutex_unlock(&ice->open_mutex);
snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
VT1724_BUFFER_ALIGN);
snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
VT1724_BUFFER_ALIGN);
constrain_rate_if_locked(substream);
if (ice->pro_open)
ice->pro_open(ice, substream);
return 0;
}
static int snd_vt1724_capture_pro_open(struct snd_pcm_substream *substream)
{
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
runtime->private_data = (void *)&vt1724_capture_pro_reg;
ice->capture_pro_substream = substream;
runtime->hw = snd_vt1724_2ch_stereo;
snd_pcm_set_sync(substream);
snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
set_rate_constraints(ice, substream);
snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
VT1724_BUFFER_ALIGN);
snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
VT1724_BUFFER_ALIGN);
constrain_rate_if_locked(substream);
if (ice->pro_open)
ice->pro_open(ice, substream);
return 0;
}
static int snd_vt1724_playback_pro_close(struct snd_pcm_substream *substream)
{
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
if (PRO_RATE_RESET)
snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
ice->playback_pro_substream = NULL;
return 0;
}
static int snd_vt1724_capture_pro_close(struct snd_pcm_substream *substream)
{
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
if (PRO_RATE_RESET)
snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
ice->capture_pro_substream = NULL;
return 0;
}
static const struct snd_pcm_ops snd_vt1724_playback_pro_ops = {
.open = snd_vt1724_playback_pro_open,
.close = snd_vt1724_playback_pro_close,
.hw_params = snd_vt1724_pcm_hw_params,
.hw_free = snd_vt1724_pcm_hw_free,
.prepare = snd_vt1724_playback_pro_prepare,
.trigger = snd_vt1724_pcm_trigger,
.pointer = snd_vt1724_playback_pro_pointer,
};
static const struct snd_pcm_ops snd_vt1724_capture_pro_ops = {
.open = snd_vt1724_capture_pro_open,
.close = snd_vt1724_capture_pro_close,
.hw_params = snd_vt1724_pcm_hw_params,
.hw_free = snd_vt1724_pcm_hw_free,
.prepare = snd_vt1724_pcm_prepare,
.trigger = snd_vt1724_pcm_trigger,
.pointer = snd_vt1724_pcm_pointer,
};
static int snd_vt1724_pcm_profi(struct snd_ice1712 *ice, int device)
{
struct snd_pcm *pcm;
int capt, err;
if ((ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_ADC_MASK) ==
VT1724_CFG_ADC_NONE)
capt = 0;
else
capt = 1;
err = snd_pcm_new(ice->card, "ICE1724", device, 1, capt, &pcm);
if (err < 0)
return err;
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_vt1724_playback_pro_ops);
if (capt)
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
&snd_vt1724_capture_pro_ops);
pcm->private_data = ice;
pcm->info_flags = 0;
strcpy(pcm->name, "ICE1724");
snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
&ice->pci->dev, 256*1024, 256*1024);
ice->pcm_pro = pcm;
return 0;
}
/*
* SPDIF PCM
*/
/* update spdif control bits; call with reg_lock */
static void update_spdif_bits(struct snd_ice1712 *ice, unsigned int val)
{
unsigned char cbit, disabled;
cbit = inb(ICEREG1724(ice, SPDIF_CFG));
disabled = cbit & ~VT1724_CFG_SPDIF_OUT_EN;
if (cbit != disabled)
outb(disabled, ICEREG1724(ice, SPDIF_CFG));
outw(val, ICEMT1724(ice, SPDIF_CTRL));
if (cbit != disabled)
outb(cbit, ICEREG1724(ice, SPDIF_CFG));
outw(val, ICEMT1724(ice, SPDIF_CTRL));
}
/* update SPDIF control bits according to the given rate */
static void update_spdif_rate(struct snd_ice1712 *ice, unsigned int rate)
{
unsigned int val, nval;
unsigned long flags;
spin_lock_irqsave(&ice->reg_lock, flags);
nval = val = inw(ICEMT1724(ice, SPDIF_CTRL));
nval &= ~(7 << 12);
switch (rate) {
case 44100: break;
case 48000: nval |= 2 << 12; break;
case 32000: nval |= 3 << 12; break;
case 88200: nval |= 4 << 12; break;
case 96000: nval |= 5 << 12; break;
case 192000: nval |= 6 << 12; break;
case 176400: nval |= 7 << 12; break;
}
if (val != nval)
update_spdif_bits(ice, nval);
spin_unlock_irqrestore(&ice->reg_lock, flags);
}
static int snd_vt1724_playback_spdif_prepare(struct snd_pcm_substream *substream)
{
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
if (!ice->force_pdma4)
update_spdif_rate(ice, substream->runtime->rate);
return snd_vt1724_pcm_prepare(substream);
}
static int snd_vt1724_playback_spdif_open(struct snd_pcm_substream *substream)
{
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
runtime->private_data = (void *)&vt1724_playback_spdif_reg;
ice->playback_con_substream = substream;
if (ice->force_pdma4) {
runtime->hw = snd_vt1724_2ch_stereo;
set_rate_constraints(ice, substream);
} else
runtime->hw = snd_vt1724_spdif;
snd_pcm_set_sync(substream);
snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
VT1724_BUFFER_ALIGN);
snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
VT1724_BUFFER_ALIGN);
constrain_rate_if_locked(substream);
if (ice->spdif.ops.open)
ice->spdif.ops.open(ice, substream);
return 0;
}
static int snd_vt1724_playback_spdif_close(struct snd_pcm_substream *substream)
{
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
if (PRO_RATE_RESET)
snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
ice->playback_con_substream = NULL;
if (ice->spdif.ops.close)
ice->spdif.ops.close(ice, substream);
return 0;
}
static int snd_vt1724_capture_spdif_open(struct snd_pcm_substream *substream)
{
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
runtime->private_data = (void *)&vt1724_capture_spdif_reg;
ice->capture_con_substream = substream;
if (ice->force_rdma1) {
runtime->hw = snd_vt1724_2ch_stereo;
set_rate_constraints(ice, substream);
} else
runtime->hw = snd_vt1724_spdif;
snd_pcm_set_sync(substream);
snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
VT1724_BUFFER_ALIGN);
snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
VT1724_BUFFER_ALIGN);
constrain_rate_if_locked(substream);
if (ice->spdif.ops.open)
ice->spdif.ops.open(ice, substream);
return 0;
}
static int snd_vt1724_capture_spdif_close(struct snd_pcm_substream *substream)
{
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
if (PRO_RATE_RESET)
snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
ice->capture_con_substream = NULL;
if (ice->spdif.ops.close)
ice->spdif.ops.close(ice, substream);
return 0;
}
static const struct snd_pcm_ops snd_vt1724_playback_spdif_ops = {
.open = snd_vt1724_playback_spdif_open,
.close = snd_vt1724_playback_spdif_close,
.hw_params = snd_vt1724_pcm_hw_params,
.hw_free = snd_vt1724_pcm_hw_free,
.prepare = snd_vt1724_playback_spdif_prepare,
.trigger = snd_vt1724_pcm_trigger,
.pointer = snd_vt1724_pcm_pointer,
};
static const struct snd_pcm_ops snd_vt1724_capture_spdif_ops = {
.open = snd_vt1724_capture_spdif_open,
.close = snd_vt1724_capture_spdif_close,
.hw_params = snd_vt1724_pcm_hw_params,
.hw_free = snd_vt1724_pcm_hw_free,
.prepare = snd_vt1724_pcm_prepare,
.trigger = snd_vt1724_pcm_trigger,
.pointer = snd_vt1724_pcm_pointer,
};
static int snd_vt1724_pcm_spdif(struct snd_ice1712 *ice, int device)
{
char *name;
struct snd_pcm *pcm;
int play, capt;
int err;
if (ice->force_pdma4 ||
(ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) {
play = 1;
ice->has_spdif = 1;
} else
play = 0;
if (ice->force_rdma1 ||
(ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) {
capt = 1;
ice->has_spdif = 1;
} else
capt = 0;
if (!play && !capt)
return 0; /* no spdif device */
if (ice->force_pdma4 || ice->force_rdma1)
name = "ICE1724 Secondary";
else
name = "ICE1724 IEC958";
err = snd_pcm_new(ice->card, name, device, play, capt, &pcm);
if (err < 0)
return err;
if (play)
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
&snd_vt1724_playback_spdif_ops);
if (capt)
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
&snd_vt1724_capture_spdif_ops);
pcm->private_data = ice;
pcm->info_flags = 0;
strcpy(pcm->name, name);
snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
&ice->pci->dev, 256*1024, 256*1024);
ice->pcm = pcm;
return 0;
}
/*
* independent surround PCMs
*/
static const struct vt1724_pcm_reg vt1724_playback_dma_regs[3] = {
{
.addr = VT1724_MT_PDMA1_ADDR,
.size = VT1724_MT_PDMA1_SIZE,
.count = VT1724_MT_PDMA1_COUNT,
.start = VT1724_PDMA1_START,
},
{
.addr = VT1724_MT_PDMA2_ADDR,
.size = VT1724_MT_PDMA2_SIZE,
.count = VT1724_MT_PDMA2_COUNT,
.start = VT1724_PDMA2_START,
},
{
.addr = VT1724_MT_PDMA3_ADDR,
.size = VT1724_MT_PDMA3_SIZE,
.count = VT1724_MT_PDMA3_COUNT,
.start = VT1724_PDMA3_START,
},
};
static int snd_vt1724_playback_indep_prepare(struct snd_pcm_substream *substream)
{
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
unsigned char val;
spin_lock_irq(&ice->reg_lock);
val = 3 - substream->number;
if (inb(ICEMT1724(ice, BURST)) < val)
outb(val, ICEMT1724(ice, BURST));
spin_unlock_irq(&ice->reg_lock);
return snd_vt1724_pcm_prepare(substream);
}
static int snd_vt1724_playback_indep_open(struct snd_pcm_substream *substream)
{
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
mutex_lock(&ice->open_mutex);
/* already used by PDMA0? */
if (ice->pcm_reserved[substream->number]) {
mutex_unlock(&ice->open_mutex);
return -EBUSY; /* FIXME: should handle blocking mode properly */
}
mutex_unlock(&ice->open_mutex);
runtime->private_data = (void *)&vt1724_playback_dma_regs[substream->number];
ice->playback_con_substream_ds[substream->number] = substream;
runtime->hw = snd_vt1724_2ch_stereo;
snd_pcm_set_sync(substream);
snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
set_rate_constraints(ice, substream);
return 0;
}
static int snd_vt1724_playback_indep_close(struct snd_pcm_substream *substream)
{
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
if (PRO_RATE_RESET)
snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
ice->playback_con_substream_ds[substream->number] = NULL;
ice->pcm_reserved[substream->number] = NULL;
return 0;
}
static const struct snd_pcm_ops snd_vt1724_playback_indep_ops = {
.open = snd_vt1724_playback_indep_open,
.close = snd_vt1724_playback_indep_close,
.hw_params = snd_vt1724_pcm_hw_params,
.hw_free = snd_vt1724_pcm_hw_free,
.prepare = snd_vt1724_playback_indep_prepare,
.trigger = snd_vt1724_pcm_trigger,
.pointer = snd_vt1724_pcm_pointer,
};
static int snd_vt1724_pcm_indep(struct snd_ice1712 *ice, int device)
{
struct snd_pcm *pcm;
int play;
int err;
play = ice->num_total_dacs / 2 - 1;
if (play <= 0)
return 0;
err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm);
if (err < 0)
return err;
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
&snd_vt1724_playback_indep_ops);
pcm->private_data = ice;
pcm->info_flags = 0;
strcpy(pcm->name, "ICE1724 Surround PCM");
snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
&ice->pci->dev, 256*1024, 256*1024);
ice->pcm_ds = pcm;
return 0;
}
/*
* Mixer section
*/
static int snd_vt1724_ac97_mixer(struct snd_ice1712 *ice)
{
int err;
if (!(ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) {
struct snd_ac97_bus *pbus;
struct snd_ac97_template ac97;
static const struct snd_ac97_bus_ops ops = {
.write = snd_vt1724_ac97_write,
.read = snd_vt1724_ac97_read,
};
/* cold reset */
outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
mdelay(5); /* FIXME */
outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus);
if (err < 0)
return err;
memset(&ac97, 0, sizeof(ac97));
ac97.private_data = ice;
err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
if (err < 0)
dev_warn(ice->card->dev,
"cannot initialize pro ac97, skipped\n");
else
return 0;
}
/* I2S mixer only */
strcat(ice->card->mixername, "ICE1724 - multitrack");
return 0;
}
/*
*
*/
static inline unsigned int eeprom_triple(struct snd_ice1712 *ice, int idx)
{
return (unsigned int)ice->eeprom.data[idx] | \
((unsigned int)ice->eeprom.data[idx + 1] << 8) | \
((unsigned int)ice->eeprom.data[idx + 2] << 16);
}
static void snd_vt1724_proc_read(struct snd_info_entry *entry,
struct snd_info_buffer *buffer)
{
struct snd_ice1712 *ice = entry->private_data;
unsigned int idx;
snd_iprintf(buffer, "%s\n\n", ice->card->longname);
snd_iprintf(buffer, "EEPROM:\n");
snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
snd_iprintf(buffer, " System Config : 0x%x\n",
ice->eeprom.data[ICE_EEP2_SYSCONF]);
snd_iprintf(buffer, " ACLink : 0x%x\n",
ice->eeprom.data[ICE_EEP2_ACLINK]);
snd_iprintf(buffer, " I2S : 0x%x\n",
ice->eeprom.data[ICE_EEP2_I2S]);
snd_iprintf(buffer, " S/PDIF : 0x%x\n",
ice->eeprom.data[ICE_EEP2_SPDIF]);
snd_iprintf(buffer, " GPIO direction : 0x%x\n",
ice->eeprom.gpiodir);
snd_iprintf(buffer, " GPIO mask : 0x%x\n",
ice->eeprom.gpiomask);
snd_iprintf(buffer, " GPIO state : 0x%x\n",
ice->eeprom.gpiostate);
for (idx = 0x12; idx < ice->eeprom.size; idx++)
snd_iprintf(buffer, " Extra #%02i : 0x%x\n",
idx, ice->eeprom.data[idx]);
snd_iprintf(buffer, "\nRegisters:\n");
snd_iprintf(buffer, " PSDOUT03 : 0x%08x\n",
(unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK)));
for (idx = 0x0; idx < 0x20 ; idx++)
snd_iprintf(buffer, " CCS%02x : 0x%02x\n",
idx, inb(ice->port+idx));
for (idx = 0x0; idx < 0x30 ; idx++)
snd_iprintf(buffer, " MT%02x : 0x%02x\n",
idx, inb(ice->profi_port+idx));
}
static void snd_vt1724_proc_init(struct snd_ice1712 *ice)
{
snd_card_ro_proc_new(ice->card, "ice1724", ice, snd_vt1724_proc_read);
}
/*
*
*/
static int snd_vt1724_eeprom_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
uinfo->count = sizeof(struct snd_ice1712_eeprom);
return 0;
}
static int snd_vt1724_eeprom_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
return 0;
}
static const struct snd_kcontrol_new snd_vt1724_eeprom = {
.iface = SNDRV_CTL_ELEM_IFACE_CARD,
.name = "ICE1724 EEPROM",
.access = SNDRV_CTL_ELEM_ACCESS_READ,
.info = snd_vt1724_eeprom_info,
.get = snd_vt1724_eeprom_get
};
/*
*/
static int snd_vt1724_spdif_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
uinfo->count = 1;
return 0;
}
static unsigned int encode_spdif_bits(struct snd_aes_iec958 *diga)
{
unsigned int val, rbits;
val = diga->status[0] & 0x03; /* professional, non-audio */
if (val & 0x01) {
/* professional */
if ((diga->status[0] & IEC958_AES0_PRO_EMPHASIS) ==
IEC958_AES0_PRO_EMPHASIS_5015)
val |= 1U << 3;
rbits = (diga->status[4] >> 3) & 0x0f;
if (rbits) {
switch (rbits) {
case 2: val |= 5 << 12; break; /* 96k */
case 3: val |= 6 << 12; break; /* 192k */
case 10: val |= 4 << 12; break; /* 88.2k */
case 11: val |= 7 << 12; break; /* 176.4k */
}
} else {
switch (diga->status[0] & IEC958_AES0_PRO_FS) {
case IEC958_AES0_PRO_FS_44100:
break;
case IEC958_AES0_PRO_FS_32000:
val |= 3U << 12;
break;
default:
val |= 2U << 12;
break;
}
}
} else {
/* consumer */
val |= diga->status[1] & 0x04; /* copyright */
if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS) ==
IEC958_AES0_CON_EMPHASIS_5015)
val |= 1U << 3;
val |= (unsigned int)(diga->status[1] & 0x3f) << 4; /* category */
val |= (unsigned int)(diga->status[3] & IEC958_AES3_CON_FS) << 12; /* fs */
}
return val;
}
static void decode_spdif_bits(struct snd_aes_iec958 *diga, unsigned int val)
{
memset(diga->status, 0, sizeof(diga->status));
diga->status[0] = val & 0x03; /* professional, non-audio */
if (val & 0x01) {
/* professional */
if (val & (1U << 3))
diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015;
switch ((val >> 12) & 0x7) {
case 0:
break;
case 2:
diga->status[0] |= IEC958_AES0_PRO_FS_32000;
break;
default:
diga->status[0] |= IEC958_AES0_PRO_FS_48000;
break;
}
} else {
/* consumer */
diga->status[0] |= val & (1U << 2); /* copyright */
if (val & (1U << 3))
diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015;
diga->status[1] |= (val >> 4) & 0x3f; /* category */
diga->status[3] |= (val >> 12) & 0x07; /* fs */
}
}
static int snd_vt1724_spdif_default_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned int val;
val = inw(ICEMT1724(ice, SPDIF_CTRL));
decode_spdif_bits(&ucontrol->value.iec958, val);
return 0;
}
static int snd_vt1724_spdif_default_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned int val, old;
val = encode_spdif_bits(&ucontrol->value.iec958);
spin_lock_irq(&ice->reg_lock);
old = inw(ICEMT1724(ice, SPDIF_CTRL));
if (val != old)
update_spdif_bits(ice, val);
spin_unlock_irq(&ice->reg_lock);
return val != old;
}
static const struct snd_kcontrol_new snd_vt1724_spdif_default =
{
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
.name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
.info = snd_vt1724_spdif_info,
.get = snd_vt1724_spdif_default_get,
.put = snd_vt1724_spdif_default_put
};
static int snd_vt1724_spdif_maskc_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
IEC958_AES0_PROFESSIONAL |
IEC958_AES0_CON_NOT_COPYRIGHT |
IEC958_AES0_CON_EMPHASIS;
ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
IEC958_AES1_CON_CATEGORY;
ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
return 0;
}
static int snd_vt1724_spdif_maskp_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
IEC958_AES0_PROFESSIONAL |
IEC958_AES0_PRO_FS |
IEC958_AES0_PRO_EMPHASIS;
return 0;
}
static const struct snd_kcontrol_new snd_vt1724_spdif_maskc =
{
.access = SNDRV_CTL_ELEM_ACCESS_READ,
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
.name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
.info = snd_vt1724_spdif_info,
.get = snd_vt1724_spdif_maskc_get,
};
static const struct snd_kcontrol_new snd_vt1724_spdif_maskp =
{
.access = SNDRV_CTL_ELEM_ACCESS_READ,
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
.name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK),
.info = snd_vt1724_spdif_info,
.get = snd_vt1724_spdif_maskp_get,
};
#define snd_vt1724_spdif_sw_info snd_ctl_boolean_mono_info
static int snd_vt1724_spdif_sw_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) &
VT1724_CFG_SPDIF_OUT_EN ? 1 : 0;
return 0;
}
static int snd_vt1724_spdif_sw_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned char old, val;
spin_lock_irq(&ice->reg_lock);
old = val = inb(ICEREG1724(ice, SPDIF_CFG));
val &= ~VT1724_CFG_SPDIF_OUT_EN;
if (ucontrol->value.integer.value[0])
val |= VT1724_CFG_SPDIF_OUT_EN;
if (old != val)
outb(val, ICEREG1724(ice, SPDIF_CFG));
spin_unlock_irq(&ice->reg_lock);
return old != val;
}
static const struct snd_kcontrol_new snd_vt1724_spdif_switch =
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
/* FIXME: the following conflict with IEC958 Playback Route */
/* .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, SWITCH), */
.name = SNDRV_CTL_NAME_IEC958("Output ", NONE, SWITCH),
.info = snd_vt1724_spdif_sw_info,
.get = snd_vt1724_spdif_sw_get,
.put = snd_vt1724_spdif_sw_put
};
#if 0 /* NOT USED YET */
/*
* GPIO access from extern
*/
#define snd_vt1724_gpio_info snd_ctl_boolean_mono_info
int snd_vt1724_gpio_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int shift = kcontrol->private_value & 0xff;
int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
snd_ice1712_save_gpio_status(ice);
ucontrol->value.integer.value[0] =
(snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert;
snd_ice1712_restore_gpio_status(ice);
return 0;
}
int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int shift = kcontrol->private_value & 0xff;
int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
unsigned int val, nval;
if (kcontrol->private_value & (1 << 31))
return -EPERM;
nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert;
snd_ice1712_save_gpio_status(ice);
val = snd_ice1712_gpio_read(ice);
nval |= val & ~(1 << shift);
if (val != nval)
snd_ice1712_gpio_write(ice, nval);
snd_ice1712_restore_gpio_status(ice);
return val != nval;
}
#endif /* NOT USED YET */
/*
* rate
*/
static int snd_vt1724_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int hw_rates_count = ice->hw_rates->count;
uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
uinfo->count = 1;
/* internal clocks */
uinfo->value.enumerated.items = hw_rates_count;
/* external clocks */
if (ice->force_rdma1 ||
(ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN))
uinfo->value.enumerated.items += ice->ext_clock_count;
/* upper limit - keep at top */
if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
if (uinfo->value.enumerated.item >= hw_rates_count)
/* ext_clock items */
strcpy(uinfo->value.enumerated.name,
ice->ext_clock_names[
uinfo->value.enumerated.item - hw_rates_count]);
else
/* int clock items */
sprintf(uinfo->value.enumerated.name, "%d",
ice->hw_rates->list[uinfo->value.enumerated.item]);
return 0;
}
static int snd_vt1724_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned int i, rate;
spin_lock_irq(&ice->reg_lock);
if (ice->is_spdif_master(ice)) {
ucontrol->value.enumerated.item[0] = ice->hw_rates->count +
ice->get_spdif_master_type(ice);
} else {
rate = ice->get_rate(ice);
ucontrol->value.enumerated.item[0] = 0;
for (i = 0; i < ice->hw_rates->count; i++) {
if (ice->hw_rates->list[i] == rate) {
ucontrol->value.enumerated.item[0] = i;
break;
}
}
}
spin_unlock_irq(&ice->reg_lock);
return 0;
}
static int stdclock_get_spdif_master_type(struct snd_ice1712 *ice)
{
/* standard external clock - only single type - SPDIF IN */
return 0;
}
/* setting clock to external - SPDIF */
static int stdclock_set_spdif_clock(struct snd_ice1712 *ice, int type)
{
unsigned char oval;
unsigned char i2s_oval;
oval = inb(ICEMT1724(ice, RATE));
outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
/* setting 256fs */
i2s_oval = inb(ICEMT1724(ice, I2S_FORMAT));
outb(i2s_oval & ~VT1724_MT_I2S_MCLK_128X, ICEMT1724(ice, I2S_FORMAT));
return 0;
}
static int snd_vt1724_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
unsigned int old_rate, new_rate;
unsigned int item = ucontrol->value.enumerated.item[0];
unsigned int first_ext_clock = ice->hw_rates->count;
if (item > first_ext_clock + ice->ext_clock_count - 1)
return -EINVAL;
/* if rate = 0 => external clock */
spin_lock_irq(&ice->reg_lock);
if (ice->is_spdif_master(ice))
old_rate = 0;
else
old_rate = ice->get_rate(ice);
if (item >= first_ext_clock) {
/* switching to external clock */
ice->set_spdif_clock(ice, item - first_ext_clock);
new_rate = 0;
} else {
/* internal on-card clock */
new_rate = ice->hw_rates->list[item];
ice->pro_rate_default = new_rate;
spin_unlock_irq(&ice->reg_lock);
snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 1);
spin_lock_irq(&ice->reg_lock);
}
spin_unlock_irq(&ice->reg_lock);
/* the first switch to the ext. clock mode? */
if (old_rate != new_rate && !new_rate) {
/* notify akm chips as well */
unsigned int i;
if (ice->gpio.set_pro_rate)
ice->gpio.set_pro_rate(ice, 0);
for (i = 0; i < ice->akm_codecs; i++) {
if (ice->akm[i].ops.set_rate_val)
ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
}
}
return old_rate != new_rate;
}
static const struct snd_kcontrol_new snd_vt1724_pro_internal_clock = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Multi Track Internal Clock",
.info = snd_vt1724_pro_internal_clock_info,
.get = snd_vt1724_pro_internal_clock_get,
.put = snd_vt1724_pro_internal_clock_put
};
#define snd_vt1724_pro_rate_locking_info snd_ctl_boolean_mono_info
static int snd_vt1724_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
return 0;
}
static int snd_vt1724_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int change = 0, nval;
nval = ucontrol->value.integer.value[0] ? 1 : 0;
spin_lock_irq(&ice->reg_lock);
change = PRO_RATE_LOCKED != nval;
PRO_RATE_LOCKED = nval;
spin_unlock_irq(&ice->reg_lock);
return change;
}
static const struct snd_kcontrol_new snd_vt1724_pro_rate_locking = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Multi Track Rate Locking",
.info = snd_vt1724_pro_rate_locking_info,
.get = snd_vt1724_pro_rate_locking_get,
.put = snd_vt1724_pro_rate_locking_put
};
#define snd_vt1724_pro_rate_reset_info snd_ctl_boolean_mono_info
static int snd_vt1724_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
ucontrol->value.integer.value[0] = PRO_RATE_RESET ? 1 : 0;
return 0;
}
static int snd_vt1724_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int change = 0, nval;
nval = ucontrol->value.integer.value[0] ? 1 : 0;
spin_lock_irq(&ice->reg_lock);
change = PRO_RATE_RESET != nval;
PRO_RATE_RESET = nval;
spin_unlock_irq(&ice->reg_lock);
return change;
}
static const struct snd_kcontrol_new snd_vt1724_pro_rate_reset = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Multi Track Rate Reset",
.info = snd_vt1724_pro_rate_reset_info,
.get = snd_vt1724_pro_rate_reset_get,
.put = snd_vt1724_pro_rate_reset_put
};
/*
* routing
*/
static int snd_vt1724_pro_route_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
static const char * const texts[] = {
"PCM Out", /* 0 */
"H/W In 0", "H/W In 1", /* 1-2 */
"IEC958 In L", "IEC958 In R", /* 3-4 */
};
return snd_ctl_enum_info(uinfo, 1, 5, texts);
}
static inline int analog_route_shift(int idx)
{
return (idx % 2) * 12 + ((idx / 2) * 3) + 8;
}
static inline int digital_route_shift(int idx)
{
return idx * 3;
}
int snd_ice1724_get_route_val(struct snd_ice1712 *ice, int shift)
{
unsigned long val;
unsigned char eitem;
static const unsigned char xlate[8] = {
0, 255, 1, 2, 255, 255, 3, 4,
};
val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
val >>= shift;
val &= 7; /* we now have 3 bits per output */
eitem = xlate[val];
if (eitem == 255) {
snd_BUG();
return 0;
}
return eitem;
}
int snd_ice1724_put_route_val(struct snd_ice1712 *ice, unsigned int val,
int shift)
{
unsigned int old_val, nval;
int change;
static const unsigned char xroute[8] = {
0, /* PCM */
2, /* PSDIN0 Left */
3, /* PSDIN0 Right */
6, /* SPDIN Left */
7, /* SPDIN Right */
};
nval = xroute[val % 5];
val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
val &= ~(0x07 << shift);
val |= nval << shift;
change = val != old_val;
if (change)
outl(val, ICEMT1724(ice, ROUTE_PLAYBACK));
return change;
}
static int snd_vt1724_pro_route_analog_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
ucontrol->value.enumerated.item[0] =
snd_ice1724_get_route_val(ice, analog_route_shift(idx));
return 0;
}
static int snd_vt1724_pro_route_analog_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
return snd_ice1724_put_route_val(ice,
ucontrol->value.enumerated.item[0],
analog_route_shift(idx));
}
static int snd_vt1724_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
ucontrol->value.enumerated.item[0] =
snd_ice1724_get_route_val(ice, digital_route_shift(idx));
return 0;
}
static int snd_vt1724_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
return snd_ice1724_put_route_val(ice,
ucontrol->value.enumerated.item[0],
digital_route_shift(idx));
}
static const struct snd_kcontrol_new snd_vt1724_mixer_pro_analog_route =
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "H/W Playback Route",
.info = snd_vt1724_pro_route_info,
.get = snd_vt1724_pro_route_analog_get,
.put = snd_vt1724_pro_route_analog_put,
};
static const struct snd_kcontrol_new snd_vt1724_mixer_pro_spdif_route = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route",
.info = snd_vt1724_pro_route_info,
.get = snd_vt1724_pro_route_spdif_get,
.put = snd_vt1724_pro_route_spdif_put,
.count = 2,
};
static int snd_vt1724_pro_peak_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 22; /* FIXME: for compatibility with ice1712... */
uinfo->value.integer.min = 0;
uinfo->value.integer.max = 255;
return 0;
}
static int snd_vt1724_pro_peak_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
int idx;
spin_lock_irq(&ice->reg_lock);
for (idx = 0; idx < 22; idx++) {
outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX));
ucontrol->value.integer.value[idx] =
inb(ICEMT1724(ice, MONITOR_PEAKDATA));
}
spin_unlock_irq(&ice->reg_lock);
return 0;
}
static const struct snd_kcontrol_new snd_vt1724_mixer_pro_peak = {
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
.name = "Multi Track Peak",
.access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
.info = snd_vt1724_pro_peak_info,
.get = snd_vt1724_pro_peak_get
};
/*
ooAoo cards with no controls
*/
static const unsigned char ooaoo_sq210_eeprom[] = {
[ICE_EEP2_SYSCONF] = 0x4c, /* 49MHz crystal, no mpu401, no ADC,
1xDACs */
[ICE_EEP2_ACLINK] = 0x80, /* I2S */
[ICE_EEP2_I2S] = 0x78, /* no volume, 96k, 24bit, 192k */
[ICE_EEP2_SPDIF] = 0xc1, /* out-en, out-int, out-ext */
[ICE_EEP2_GPIO_DIR] = 0x00, /* no GPIOs are used */
[ICE_EEP2_GPIO_DIR1] = 0x00,
[ICE_EEP2_GPIO_DIR2] = 0x00,
[ICE_EEP2_GPIO_MASK] = 0xff,
[ICE_EEP2_GPIO_MASK1] = 0xff,
[ICE_EEP2_GPIO_MASK2] = 0xff,
[ICE_EEP2_GPIO_STATE] = 0x00, /* inputs */
[ICE_EEP2_GPIO_STATE1] = 0x00, /* all 1, but GPIO_CPLD_RW
and GPIO15 always zero */
[ICE_EEP2_GPIO_STATE2] = 0x00, /* inputs */
};
static const struct snd_ice1712_card_info snd_vt1724_ooaoo_cards[] = {
{
.name = "ooAoo SQ210a",
.model = "sq210a",
.eeprom_size = sizeof(ooaoo_sq210_eeprom),
.eeprom_data = ooaoo_sq210_eeprom,
},
{ } /* terminator */
};
static const struct snd_ice1712_card_info *card_tables[] = {
snd_vt1724_revo_cards,
snd_vt1724_amp_cards,
snd_vt1724_aureon_cards,
snd_vt1720_mobo_cards,
snd_vt1720_pontis_cards,
snd_vt1724_prodigy_hifi_cards,
snd_vt1724_prodigy192_cards,
snd_vt1724_juli_cards,
snd_vt1724_maya44_cards,
snd_vt1724_phase_cards,
snd_vt1724_wtm_cards,
snd_vt1724_se_cards,
snd_vt1724_qtet_cards,
snd_vt1724_ooaoo_cards,
snd_vt1724_psc724_cards,
NULL,
};
/*
*/
static void wait_i2c_busy(struct snd_ice1712 *ice)
{
int t = 0x10000;
while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--)
;
if (t == -1)
dev_err(ice->card->dev, "i2c busy timeout\n");
}
unsigned char snd_vt1724_read_i2c(struct snd_ice1712 *ice,
unsigned char dev, unsigned char addr)
{
unsigned char val;
mutex_lock(&ice->i2c_mutex);
wait_i2c_busy(ice);
outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
wait_i2c_busy(ice);
val = inb(ICEREG1724(ice, I2C_DATA));
mutex_unlock(&ice->i2c_mutex);
/*
dev_dbg(ice->card->dev, "i2c_read: [0x%x,0x%x] = 0x%x\n", dev, addr, val);
*/
return val;
}
void snd_vt1724_write_i2c(struct snd_ice1712 *ice,
unsigned char dev, unsigned char addr, unsigned char data)
{
mutex_lock(&ice->i2c_mutex);
wait_i2c_busy(ice);
/*
dev_dbg(ice->card->dev, "i2c_write: [0x%x,0x%x] = 0x%x\n", dev, addr, data);
*/
outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
outb(data, ICEREG1724(ice, I2C_DATA));
outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
wait_i2c_busy(ice);
mutex_unlock(&ice->i2c_mutex);
}
static int snd_vt1724_read_eeprom(struct snd_ice1712 *ice,
const char *modelname)
{
const int dev = 0xa0; /* EEPROM device address */
unsigned int i, size;
const struct snd_ice1712_card_info * const *tbl, *c;
if (!modelname || !*modelname) {
ice->eeprom.subvendor = 0;
if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0)
ice->eeprom.subvendor =
(snd_vt1724_read_i2c(ice, dev, 0x00) << 0) |
(snd_vt1724_read_i2c(ice, dev, 0x01) << 8) |
(snd_vt1724_read_i2c(ice, dev, 0x02) << 16) |
(snd_vt1724_read_i2c(ice, dev, 0x03) << 24);
if (ice->eeprom.subvendor == 0 ||
ice->eeprom.subvendor == (unsigned int)-1) {
/* invalid subvendor from EEPROM, try the PCI
* subststem ID instead
*/
u16 vendor, device;
pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID,
&vendor);
pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
ice->eeprom.subvendor =
((unsigned int)swab16(vendor) << 16) | swab16(device);
if (ice->eeprom.subvendor == 0 ||
ice->eeprom.subvendor == (unsigned int)-1) {
dev_err(ice->card->dev,
"No valid ID is found\n");
return -ENXIO;
}
}
}
for (tbl = card_tables; *tbl; tbl++) {
for (c = *tbl; c->name; c++) {
if (modelname && c->model &&
!strcmp(modelname, c->model)) {
dev_info(ice->card->dev,
"Using board model %s\n",
c->name);
ice->eeprom.subvendor = c->subvendor;
} else if (c->subvendor != ice->eeprom.subvendor)
continue;
ice->card_info = c;
if (!c->eeprom_size || !c->eeprom_data)
goto found;
/* if the EEPROM is given by the driver, use it */
dev_dbg(ice->card->dev, "using the defined eeprom..\n");
ice->eeprom.version = 2;
ice->eeprom.size = c->eeprom_size + 6;
memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
goto read_skipped;
}
}
dev_warn(ice->card->dev, "No matching model found for ID 0x%x\n",
ice->eeprom.subvendor);
#ifdef CONFIG_PM_SLEEP
/* assume AC97-only card which can suspend without additional code */
ice->pm_suspend_enabled = 1;
#endif
found:
ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04);
if (ice->eeprom.size < 6)
ice->eeprom.size = 32;
else if (ice->eeprom.size > 32) {
dev_err(ice->card->dev, "Invalid EEPROM (size = %i)\n",
ice->eeprom.size);
return -EIO;
}
ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05);
if (ice->eeprom.version != 1 && ice->eeprom.version != 2)
dev_warn(ice->card->dev, "Invalid EEPROM version %i\n",
ice->eeprom.version);
size = ice->eeprom.size - 6;
for (i = 0; i < size; i++)
ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6);
read_skipped:
ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK);
ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE);
ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR);
return 0;
}
static void snd_vt1724_chip_reset(struct snd_ice1712 *ice)
{
outb(VT1724_RESET , ICEREG1724(ice, CONTROL));
inb(ICEREG1724(ice, CONTROL)); /* pci posting flush */
msleep(10);
outb(0, ICEREG1724(ice, CONTROL));
inb(ICEREG1724(ice, CONTROL)); /* pci posting flush */
msleep(10);
}
static int snd_vt1724_chip_init(struct snd_ice1712 *ice)
{
outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG));
outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG));
outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES));
outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG));
ice->gpio.write_mask = ice->eeprom.gpiomask;
ice->gpio.direction = ice->eeprom.gpiodir;
snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask);
snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir);
snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate);
outb(0, ICEREG1724(ice, POWERDOWN));
/* MPU_RX and TX irq masks are cleared later dynamically */
outb(VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX , ICEREG1724(ice, IRQMASK));
/* don't handle FIFO overrun/underruns (just yet),
* since they cause machine lockups
*/
outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK));
return 0;
}
static int snd_vt1724_spdif_build_controls(struct snd_ice1712 *ice)
{
int err;
struct snd_kcontrol *kctl;
if (snd_BUG_ON(!ice->pcm))
return -EIO;
if (!ice->own_routing) {
err = snd_ctl_add(ice->card,
snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice));
if (err < 0)
return err;
}
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice));
if (err < 0)
return err;
kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice);
kctl->id.device = ice->pcm->device;
err = snd_ctl_add(ice->card, kctl);
if (err < 0)
return err;
kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice);
kctl->id.device = ice->pcm->device;
err = snd_ctl_add(ice->card, kctl);
if (err < 0)
return err;
kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice);
kctl->id.device = ice->pcm->device;
err = snd_ctl_add(ice->card, kctl);
if (err < 0)
return err;
#if 0 /* use default only */
kctl = snd_ctl_new1(&snd_vt1724_spdif_stream, ice);
kctl->id.device = ice->pcm->device;
err = snd_ctl_add(ice->card, kctl);
if (err < 0)
return err;
ice->spdif.stream_ctl = kctl;
#endif
return 0;
}
static int snd_vt1724_build_controls(struct snd_ice1712 *ice)
{
int err;
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice));
if (err < 0)
return err;
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice));
if (err < 0)
return err;
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice));
if (err < 0)
return err;
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice));
if (err < 0)
return err;
if (!ice->own_routing && ice->num_total_dacs > 0) {
struct snd_kcontrol_new tmp = snd_vt1724_mixer_pro_analog_route;
tmp.count = ice->num_total_dacs;
if (ice->vt1720 && tmp.count > 2)
tmp.count = 2;
err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
if (err < 0)
return err;
}
return snd_ctl_add(ice->card,
snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice));
}
static void snd_vt1724_free(struct snd_card *card)
{
struct snd_ice1712 *ice = card->private_data;
/* mask all interrupts */
outb(0xff, ICEMT1724(ice, DMA_INT_MASK));
outb(0xff, ICEREG1724(ice, IRQMASK));
snd_ice1712_akm4xxx_free(ice);
}
static int snd_vt1724_create(struct snd_card *card,
struct pci_dev *pci,
const char *modelname)
{
struct snd_ice1712 *ice = card->private_data;
int err;
/* enable PCI device */
err = pcim_enable_device(pci);
if (err < 0)
return err;
ice->vt1724 = 1;
spin_lock_init(&ice->reg_lock);
mutex_init(&ice->gpio_mutex);
mutex_init(&ice->open_mutex);
mutex_init(&ice->i2c_mutex);
ice->gpio.set_mask = snd_vt1724_set_gpio_mask;
ice->gpio.get_mask = snd_vt1724_get_gpio_mask;
ice->gpio.set_dir = snd_vt1724_set_gpio_dir;
ice->gpio.get_dir = snd_vt1724_get_gpio_dir;
ice->gpio.set_data = snd_vt1724_set_gpio_data;
ice->gpio.get_data = snd_vt1724_get_gpio_data;
ice->card = card;
ice->pci = pci;
ice->irq = -1;
pci_set_master(pci);
snd_vt1724_proc_init(ice);
err = pci_request_regions(pci, "ICE1724");
if (err < 0)
return err;
ice->port = pci_resource_start(pci, 0);
ice->profi_port = pci_resource_start(pci, 1);
if (devm_request_irq(&pci->dev, pci->irq, snd_vt1724_interrupt,
IRQF_SHARED, KBUILD_MODNAME, ice)) {
dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
return -EIO;
}
ice->irq = pci->irq;
card->sync_irq = ice->irq;
card->private_free = snd_vt1724_free;
snd_vt1724_chip_reset(ice);
if (snd_vt1724_read_eeprom(ice, modelname) < 0)
return -EIO;
if (snd_vt1724_chip_init(ice) < 0)
return -EIO;
return 0;
}
/*
*
* Registration
*
*/
static int __snd_vt1724_probe(struct pci_dev *pci,
const struct pci_device_id *pci_id)
{
static int dev;
struct snd_card *card;
struct snd_ice1712 *ice;
int pcm_dev = 0, err;
const struct snd_ice1712_card_info *c;
if (dev >= SNDRV_CARDS)
return -ENODEV;
if (!enable[dev]) {
dev++;
return -ENOENT;
}
err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
sizeof(*ice), &card);
if (err < 0)
return err;
ice = card->private_data;
strcpy(card->driver, "ICE1724");
strcpy(card->shortname, "ICEnsemble ICE1724");
err = snd_vt1724_create(card, pci, model[dev]);
if (err < 0)
return err;
/* field init before calling chip_init */
ice->ext_clock_count = 0;
c = ice->card_info;
if (c) {
strcpy(card->shortname, c->name);
if (c->driver) /* specific driver? */
strcpy(card->driver, c->driver);
if (c->chip_init) {
err = c->chip_init(ice);
if (err < 0)
return err;
}
}
/*
* VT1724 has separate DMAs for the analog and the SPDIF streams while
* ICE1712 has only one for both (mixed up).
*
* Confusingly the analog PCM is named "professional" here because it
* was called so in ice1712 driver, and vt1724 driver is derived from
* ice1712 driver.
*/
ice->pro_rate_default = PRO_RATE_DEFAULT;
if (!ice->is_spdif_master)
ice->is_spdif_master = stdclock_is_spdif_master;
if (!ice->get_rate)
ice->get_rate = stdclock_get_rate;
if (!ice->set_rate)
ice->set_rate = stdclock_set_rate;
if (!ice->set_mclk)
ice->set_mclk = stdclock_set_mclk;
if (!ice->set_spdif_clock)
ice->set_spdif_clock = stdclock_set_spdif_clock;
if (!ice->get_spdif_master_type)
ice->get_spdif_master_type = stdclock_get_spdif_master_type;
if (!ice->ext_clock_names)
ice->ext_clock_names = ext_clock_names;
if (!ice->ext_clock_count)
ice->ext_clock_count = ARRAY_SIZE(ext_clock_names);
if (!ice->hw_rates)
set_std_hw_rates(ice);
err = snd_vt1724_pcm_profi(ice, pcm_dev++);
if (err < 0)
return err;
err = snd_vt1724_pcm_spdif(ice, pcm_dev++);
if (err < 0)
return err;
err = snd_vt1724_pcm_indep(ice, pcm_dev++);
if (err < 0)
return err;
err = snd_vt1724_ac97_mixer(ice);
if (err < 0)
return err;
err = snd_vt1724_build_controls(ice);
if (err < 0)
return err;
if (ice->pcm && ice->has_spdif) { /* has SPDIF I/O */
err = snd_vt1724_spdif_build_controls(ice);
if (err < 0)
return err;
}
if (c && c->build_controls) {
err = c->build_controls(ice);
if (err < 0)
return err;
}
if (!c || !c->no_mpu401) {
if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) {
struct snd_rawmidi *rmidi;
err = snd_rawmidi_new(card, "MIDI", 0, 1, 1, &rmidi);
if (err < 0)
return err;
ice->rmidi[0] = rmidi;
rmidi->private_data = ice;
strcpy(rmidi->name, "ICE1724 MIDI");
rmidi->info_flags = SNDRV_RAWMIDI_INFO_OUTPUT |
SNDRV_RAWMIDI_INFO_INPUT |
SNDRV_RAWMIDI_INFO_DUPLEX;
snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT,
&vt1724_midi_output_ops);
snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT,
&vt1724_midi_input_ops);
/* set watermarks */
outb(VT1724_MPU_RX_FIFO | 0x1,
ICEREG1724(ice, MPU_FIFO_WM));
outb(0x1, ICEREG1724(ice, MPU_FIFO_WM));
/* set UART mode */
outb(VT1724_MPU_UART, ICEREG1724(ice, MPU_CTRL));
}
}
sprintf(card->longname, "%s at 0x%lx, irq %i",
card->shortname, ice->port, ice->irq);
err = snd_card_register(card);
if (err < 0)
return err;
pci_set_drvdata(pci, card);
dev++;
return 0;
}
static int snd_vt1724_probe(struct pci_dev *pci,
const struct pci_device_id *pci_id)
{
return snd_card_free_on_error(&pci->dev, __snd_vt1724_probe(pci, pci_id));
}
#ifdef CONFIG_PM_SLEEP
static int snd_vt1724_suspend(struct device *dev)
{
struct snd_card *card = dev_get_drvdata(dev);
struct snd_ice1712 *ice = card->private_data;
if (!ice->pm_suspend_enabled)
return 0;
snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
snd_ac97_suspend(ice->ac97);
spin_lock_irq(&ice->reg_lock);
ice->pm_saved_is_spdif_master = ice->is_spdif_master(ice);
ice->pm_saved_spdif_ctrl = inw(ICEMT1724(ice, SPDIF_CTRL));
ice->pm_saved_spdif_cfg = inb(ICEREG1724(ice, SPDIF_CFG));
ice->pm_saved_route = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
spin_unlock_irq(&ice->reg_lock);
if (ice->pm_suspend)
ice->pm_suspend(ice);
return 0;
}
static int snd_vt1724_resume(struct device *dev)
{
struct snd_card *card = dev_get_drvdata(dev);
struct snd_ice1712 *ice = card->private_data;
if (!ice->pm_suspend_enabled)
return 0;
snd_vt1724_chip_reset(ice);
if (snd_vt1724_chip_init(ice) < 0) {
snd_card_disconnect(card);
return -EIO;
}
if (ice->pm_resume)
ice->pm_resume(ice);
if (ice->pm_saved_is_spdif_master) {
/* switching to external clock via SPDIF */
ice->set_spdif_clock(ice, 0);
} else {
/* internal on-card clock */
int rate;
if (ice->cur_rate)
rate = ice->cur_rate;
else
rate = ice->pro_rate_default;
snd_vt1724_set_pro_rate(ice, rate, 1);
}
update_spdif_bits(ice, ice->pm_saved_spdif_ctrl);
outb(ice->pm_saved_spdif_cfg, ICEREG1724(ice, SPDIF_CFG));
outl(ice->pm_saved_route, ICEMT1724(ice, ROUTE_PLAYBACK));
snd_ac97_resume(ice->ac97);
snd_power_change_state(card, SNDRV_CTL_POWER_D0);
return 0;
}
static SIMPLE_DEV_PM_OPS(snd_vt1724_pm, snd_vt1724_suspend, snd_vt1724_resume);
#define SND_VT1724_PM_OPS &snd_vt1724_pm
#else
#define SND_VT1724_PM_OPS NULL
#endif /* CONFIG_PM_SLEEP */
static struct pci_driver vt1724_driver = {
.name = KBUILD_MODNAME,
.id_table = snd_vt1724_ids,
.probe = snd_vt1724_probe,
.driver = {
.pm = SND_VT1724_PM_OPS,
},
};
module_pci_driver(vt1724_driver);
| linux-master | sound/pci/ice1712/ice1724.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* The driver for the Yamaha's DS1/DS1E cards
* Copyright (c) by Jaroslav Kysela <[email protected]>
*/
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/time.h>
#include <linux/module.h>
#include <sound/core.h>
#include "ymfpci.h"
#include <sound/mpu401.h>
#include <sound/opl3.h>
#include <sound/initval.h>
MODULE_AUTHOR("Jaroslav Kysela <[email protected]>");
MODULE_DESCRIPTION("Yamaha DS-1 PCI");
MODULE_LICENSE("GPL");
static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
static long fm_port[SNDRV_CARDS];
static long mpu_port[SNDRV_CARDS];
#ifdef SUPPORT_JOYSTICK
static long joystick_port[SNDRV_CARDS];
#endif
static bool rear_switch[SNDRV_CARDS];
module_param_array(index, int, NULL, 0444);
MODULE_PARM_DESC(index, "Index value for the Yamaha DS-1 PCI soundcard.");
module_param_array(id, charp, NULL, 0444);
MODULE_PARM_DESC(id, "ID string for the Yamaha DS-1 PCI soundcard.");
module_param_array(enable, bool, NULL, 0444);
MODULE_PARM_DESC(enable, "Enable Yamaha DS-1 soundcard.");
module_param_hw_array(mpu_port, long, ioport, NULL, 0444);
MODULE_PARM_DESC(mpu_port, "MPU-401 Port.");
module_param_hw_array(fm_port, long, ioport, NULL, 0444);
MODULE_PARM_DESC(fm_port, "FM OPL-3 Port.");
#ifdef SUPPORT_JOYSTICK
module_param_hw_array(joystick_port, long, ioport, NULL, 0444);
MODULE_PARM_DESC(joystick_port, "Joystick port address");
#endif
module_param_array(rear_switch, bool, NULL, 0444);
MODULE_PARM_DESC(rear_switch, "Enable shared rear/line-in switch");
static const struct pci_device_id snd_ymfpci_ids[] = {
{ PCI_VDEVICE(YAMAHA, 0x0004), 0, }, /* YMF724 */
{ PCI_VDEVICE(YAMAHA, 0x000d), 0, }, /* YMF724F */
{ PCI_VDEVICE(YAMAHA, 0x000a), 0, }, /* YMF740 */
{ PCI_VDEVICE(YAMAHA, 0x000c), 0, }, /* YMF740C */
{ PCI_VDEVICE(YAMAHA, 0x0010), 0, }, /* YMF744 */
{ PCI_VDEVICE(YAMAHA, 0x0012), 0, }, /* YMF754 */
{ 0, }
};
MODULE_DEVICE_TABLE(pci, snd_ymfpci_ids);
#ifdef SUPPORT_JOYSTICK
static int snd_ymfpci_create_gameport(struct snd_ymfpci *chip, int dev,
int legacy_ctrl, int legacy_ctrl2)
{
struct gameport *gp;
struct resource *r = NULL;
int io_port = joystick_port[dev];
if (!io_port)
return -ENODEV;
if (chip->pci->device >= 0x0010) { /* YMF 744/754 */
if (io_port == 1) {
/* auto-detect */
io_port = pci_resource_start(chip->pci, 2);
if (!io_port)
return -ENODEV;
}
} else {
if (io_port == 1) {
/* auto-detect */
for (io_port = 0x201; io_port <= 0x205; io_port++) {
if (io_port == 0x203)
continue;
r = request_region(io_port, 1, "YMFPCI gameport");
if (r)
break;
}
if (!r) {
dev_err(chip->card->dev,
"no gameport ports available\n");
return -EBUSY;
}
}
switch (io_port) {
case 0x201: legacy_ctrl2 |= 0 << 6; break;
case 0x202: legacy_ctrl2 |= 1 << 6; break;
case 0x204: legacy_ctrl2 |= 2 << 6; break;
case 0x205: legacy_ctrl2 |= 3 << 6; break;
default:
if (io_port > 0)
dev_err(chip->card->dev,
"The %s does not support arbitrary IO ports for the game port (requested 0x%x)\n",
chip->card->shortname, (unsigned int)io_port);
return -EINVAL;
}
}
if (!r) {
r = devm_request_region(&chip->pci->dev, io_port, 1,
"YMFPCI gameport");
if (!r) {
dev_err(chip->card->dev,
"joystick port %#x is in use.\n", io_port);
return -EBUSY;
}
}
chip->gameport = gp = gameport_allocate_port();
if (!gp) {
dev_err(chip->card->dev,
"cannot allocate memory for gameport\n");
return -ENOMEM;
}
gameport_set_name(gp, "Yamaha YMF Gameport");
gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
gameport_set_dev_parent(gp, &chip->pci->dev);
gp->io = io_port;
if (chip->pci->device >= 0x0010) /* YMF 744/754 */
pci_write_config_word(chip->pci, PCIR_DSXG_JOYBASE, io_port);
pci_write_config_word(chip->pci, PCIR_DSXG_LEGACY, legacy_ctrl | YMFPCI_LEGACY_JPEN);
pci_write_config_word(chip->pci, PCIR_DSXG_ELEGACY, legacy_ctrl2);
gameport_register_port(chip->gameport);
return 0;
}
void snd_ymfpci_free_gameport(struct snd_ymfpci *chip)
{
if (chip->gameport) {
gameport_unregister_port(chip->gameport);
chip->gameport = NULL;
}
}
#else
static inline int snd_ymfpci_create_gameport(struct snd_ymfpci *chip, int dev, int l, int l2) { return -ENOSYS; }
void snd_ymfpci_free_gameport(struct snd_ymfpci *chip) { }
#endif /* SUPPORT_JOYSTICK */
static int __snd_card_ymfpci_probe(struct pci_dev *pci,
const struct pci_device_id *pci_id)
{
static int dev;
struct snd_card *card;
struct resource *fm_res = NULL;
struct resource *mpu_res = NULL;
struct snd_ymfpci *chip;
struct snd_opl3 *opl3;
const char *str, *model;
int err;
u16 legacy_ctrl, legacy_ctrl2, old_legacy_ctrl;
if (dev >= SNDRV_CARDS)
return -ENODEV;
if (!enable[dev]) {
dev++;
return -ENOENT;
}
err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
sizeof(*chip), &card);
if (err < 0)
return err;
chip = card->private_data;
switch (pci_id->device) {
case 0x0004: str = "YMF724"; model = "DS-1"; break;
case 0x000d: str = "YMF724F"; model = "DS-1"; break;
case 0x000a: str = "YMF740"; model = "DS-1L"; break;
case 0x000c: str = "YMF740C"; model = "DS-1L"; break;
case 0x0010: str = "YMF744"; model = "DS-1S"; break;
case 0x0012: str = "YMF754"; model = "DS-1E"; break;
default: model = str = "???"; break;
}
strcpy(card->driver, str);
sprintf(card->shortname, "Yamaha %s (%s)", model, str);
sprintf(card->longname, "%s at 0x%lx, irq %i",
card->shortname,
chip->reg_area_phys,
chip->irq);
legacy_ctrl = 0;
legacy_ctrl2 = 0x0800; /* SBEN = 0, SMOD = 01, LAD = 0 */
if (pci_id->device >= 0x0010) { /* YMF 744/754 */
if (fm_port[dev] == 1) {
/* auto-detect */
fm_port[dev] = pci_resource_start(pci, 1);
}
if (fm_port[dev] > 0)
fm_res = devm_request_region(&pci->dev, fm_port[dev],
4, "YMFPCI OPL3");
if (fm_res) {
legacy_ctrl |= YMFPCI_LEGACY_FMEN;
pci_write_config_word(pci, PCIR_DSXG_FMBASE, fm_port[dev]);
}
if (mpu_port[dev] == 1) {
/* auto-detect */
mpu_port[dev] = pci_resource_start(pci, 1) + 0x20;
}
if (mpu_port[dev] > 0)
mpu_res = devm_request_region(&pci->dev, mpu_port[dev],
2, "YMFPCI MPU401");
if (mpu_res) {
legacy_ctrl |= YMFPCI_LEGACY_MEN;
pci_write_config_word(pci, PCIR_DSXG_MPU401BASE, mpu_port[dev]);
}
} else {
switch (fm_port[dev]) {
case 0x388: legacy_ctrl2 |= 0; break;
case 0x398: legacy_ctrl2 |= 1; break;
case 0x3a0: legacy_ctrl2 |= 2; break;
case 0x3a8: legacy_ctrl2 |= 3; break;
default:
if (fm_port[dev] > 0)
dev_err(card->dev,
"The %s does not support arbitrary IO ports for FM (requested 0x%x)\n",
card->shortname, (unsigned int)fm_port[dev]);
fm_port[dev] = 0;
break;
}
if (fm_port[dev] > 0)
fm_res = devm_request_region(&pci->dev, fm_port[dev],
4, "YMFPCI OPL3");
if (fm_res) {
legacy_ctrl |= YMFPCI_LEGACY_FMEN;
} else {
legacy_ctrl2 &= ~YMFPCI_LEGACY2_FMIO;
fm_port[dev] = 0;
}
switch (mpu_port[dev]) {
case 0x330: legacy_ctrl2 |= 0 << 4; break;
case 0x300: legacy_ctrl2 |= 1 << 4; break;
case 0x332: legacy_ctrl2 |= 2 << 4; break;
case 0x334: legacy_ctrl2 |= 3 << 4; break;
default:
if (mpu_port[dev] > 0)
dev_err(card->dev,
"The %s does not support arbitrary IO ports for MPU-401 (requested 0x%x)\n",
card->shortname, (unsigned int)mpu_port[dev]);
mpu_port[dev] = 0;
break;
}
if (mpu_port[dev] > 0)
mpu_res = devm_request_region(&pci->dev, mpu_port[dev],
2, "YMFPCI MPU401");
if (mpu_res) {
legacy_ctrl |= YMFPCI_LEGACY_MEN;
} else {
legacy_ctrl2 &= ~YMFPCI_LEGACY2_MPUIO;
mpu_port[dev] = 0;
}
}
if (mpu_res) {
legacy_ctrl |= YMFPCI_LEGACY_MIEN;
legacy_ctrl2 |= YMFPCI_LEGACY2_IMOD;
}
pci_read_config_word(pci, PCIR_DSXG_LEGACY, &old_legacy_ctrl);
pci_write_config_word(pci, PCIR_DSXG_LEGACY, legacy_ctrl);
pci_write_config_word(pci, PCIR_DSXG_ELEGACY, legacy_ctrl2);
err = snd_ymfpci_create(card, pci, old_legacy_ctrl);
if (err < 0)
return err;
err = snd_ymfpci_pcm(chip, 0);
if (err < 0)
return err;
err = snd_ymfpci_pcm_spdif(chip, 1);
if (err < 0)
return err;
err = snd_ymfpci_mixer(chip, rear_switch[dev]);
if (err < 0)
return err;
if (chip->ac97->ext_id & AC97_EI_SDAC) {
err = snd_ymfpci_pcm_4ch(chip, 2);
if (err < 0)
return err;
err = snd_ymfpci_pcm2(chip, 3);
if (err < 0)
return err;
}
err = snd_ymfpci_timer(chip, 0);
if (err < 0)
return err;
if (mpu_res) {
err = snd_mpu401_uart_new(card, 0, MPU401_HW_YMFPCI,
mpu_port[dev],
MPU401_INFO_INTEGRATED |
MPU401_INFO_IRQ_HOOK,
-1, &chip->rawmidi);
if (err < 0) {
dev_warn(card->dev,
"cannot initialize MPU401 at 0x%lx, skipping...\n",
mpu_port[dev]);
legacy_ctrl &= ~YMFPCI_LEGACY_MIEN; /* disable MPU401 irq */
pci_write_config_word(pci, PCIR_DSXG_LEGACY, legacy_ctrl);
}
}
if (fm_res) {
err = snd_opl3_create(card,
fm_port[dev],
fm_port[dev] + 2,
OPL3_HW_OPL3, 1, &opl3);
if (err < 0) {
dev_warn(card->dev,
"cannot initialize FM OPL3 at 0x%lx, skipping...\n",
fm_port[dev]);
legacy_ctrl &= ~YMFPCI_LEGACY_FMEN;
pci_write_config_word(pci, PCIR_DSXG_LEGACY, legacy_ctrl);
} else {
err = snd_opl3_hwdep_new(opl3, 0, 1, NULL);
if (err < 0) {
dev_err(card->dev, "cannot create opl3 hwdep\n");
return err;
}
}
}
snd_ymfpci_create_gameport(chip, dev, legacy_ctrl, legacy_ctrl2);
err = snd_card_register(card);
if (err < 0)
return err;
pci_set_drvdata(pci, card);
dev++;
return 0;
}
static int snd_card_ymfpci_probe(struct pci_dev *pci,
const struct pci_device_id *pci_id)
{
return snd_card_free_on_error(&pci->dev, __snd_card_ymfpci_probe(pci, pci_id));
}
static struct pci_driver ymfpci_driver = {
.name = KBUILD_MODNAME,
.id_table = snd_ymfpci_ids,
.probe = snd_card_ymfpci_probe,
.driver = {
.pm = pm_sleep_ptr(&snd_ymfpci_pm),
},
};
module_pci_driver(ymfpci_driver);
| linux-master | sound/pci/ymfpci/ymfpci.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (c) by Jaroslav Kysela <[email protected]>
* Routines for control of YMF724/740/744/754 chips
*/
#include <linux/delay.h>
#include <linux/firmware.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/pci.h>
#include <linux/sched.h>
#include <linux/slab.h>
#include <linux/mutex.h>
#include <linux/module.h>
#include <linux/io.h>
#include <sound/core.h>
#include <sound/control.h>
#include <sound/info.h>
#include <sound/tlv.h>
#include "ymfpci.h"
#include <sound/asoundef.h>
#include <sound/mpu401.h>
#include <asm/byteorder.h>
/*
* common I/O routines
*/
static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip);
static inline void snd_ymfpci_writeb(struct snd_ymfpci *chip, u32 offset, u8 val)
{
writeb(val, chip->reg_area_virt + offset);
}
static inline u16 snd_ymfpci_readw(struct snd_ymfpci *chip, u32 offset)
{
return readw(chip->reg_area_virt + offset);
}
static inline void snd_ymfpci_writew(struct snd_ymfpci *chip, u32 offset, u16 val)
{
writew(val, chip->reg_area_virt + offset);
}
static inline u32 snd_ymfpci_readl(struct snd_ymfpci *chip, u32 offset)
{
return readl(chip->reg_area_virt + offset);
}
static inline void snd_ymfpci_writel(struct snd_ymfpci *chip, u32 offset, u32 val)
{
writel(val, chip->reg_area_virt + offset);
}
static int snd_ymfpci_codec_ready(struct snd_ymfpci *chip, int secondary)
{
unsigned long end_time;
u32 reg = secondary ? YDSXGR_SECSTATUSADR : YDSXGR_PRISTATUSADR;
end_time = jiffies + msecs_to_jiffies(750);
do {
if ((snd_ymfpci_readw(chip, reg) & 0x8000) == 0)
return 0;
schedule_timeout_uninterruptible(1);
} while (time_before(jiffies, end_time));
dev_err(chip->card->dev,
"codec_ready: codec %i is not ready [0x%x]\n",
secondary, snd_ymfpci_readw(chip, reg));
return -EBUSY;
}
static void snd_ymfpci_codec_write(struct snd_ac97 *ac97, u16 reg, u16 val)
{
struct snd_ymfpci *chip = ac97->private_data;
u32 cmd;
snd_ymfpci_codec_ready(chip, 0);
cmd = ((YDSXG_AC97WRITECMD | reg) << 16) | val;
snd_ymfpci_writel(chip, YDSXGR_AC97CMDDATA, cmd);
}
static u16 snd_ymfpci_codec_read(struct snd_ac97 *ac97, u16 reg)
{
struct snd_ymfpci *chip = ac97->private_data;
if (snd_ymfpci_codec_ready(chip, 0))
return ~0;
snd_ymfpci_writew(chip, YDSXGR_AC97CMDADR, YDSXG_AC97READCMD | reg);
if (snd_ymfpci_codec_ready(chip, 0))
return ~0;
if (chip->device_id == PCI_DEVICE_ID_YAMAHA_744 && chip->rev < 2) {
int i;
for (i = 0; i < 600; i++)
snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
}
return snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
}
/*
* Misc routines
*/
static u32 snd_ymfpci_calc_delta(u32 rate)
{
switch (rate) {
case 8000: return 0x02aaab00;
case 11025: return 0x03accd00;
case 16000: return 0x05555500;
case 22050: return 0x07599a00;
case 32000: return 0x0aaaab00;
case 44100: return 0x0eb33300;
default: return ((rate << 16) / 375) << 5;
}
}
static const u32 def_rate[8] = {
100, 2000, 8000, 11025, 16000, 22050, 32000, 48000
};
static u32 snd_ymfpci_calc_lpfK(u32 rate)
{
u32 i;
static const u32 val[8] = {
0x00570000, 0x06AA0000, 0x18B20000, 0x20930000,
0x2B9A0000, 0x35A10000, 0x3EAA0000, 0x40000000
};
if (rate == 44100)
return 0x40000000; /* FIXME: What's the right value? */
for (i = 0; i < 8; i++)
if (rate <= def_rate[i])
return val[i];
return val[0];
}
static u32 snd_ymfpci_calc_lpfQ(u32 rate)
{
u32 i;
static const u32 val[8] = {
0x35280000, 0x34A70000, 0x32020000, 0x31770000,
0x31390000, 0x31C90000, 0x33D00000, 0x40000000
};
if (rate == 44100)
return 0x370A0000;
for (i = 0; i < 8; i++)
if (rate <= def_rate[i])
return val[i];
return val[0];
}
/*
* Hardware start management
*/
static void snd_ymfpci_hw_start(struct snd_ymfpci *chip)
{
unsigned long flags;
spin_lock_irqsave(&chip->reg_lock, flags);
if (chip->start_count++ > 0)
goto __end;
snd_ymfpci_writel(chip, YDSXGR_MODE,
snd_ymfpci_readl(chip, YDSXGR_MODE) | 3);
chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
__end:
spin_unlock_irqrestore(&chip->reg_lock, flags);
}
static void snd_ymfpci_hw_stop(struct snd_ymfpci *chip)
{
unsigned long flags;
long timeout = 1000;
spin_lock_irqsave(&chip->reg_lock, flags);
if (--chip->start_count > 0)
goto __end;
snd_ymfpci_writel(chip, YDSXGR_MODE,
snd_ymfpci_readl(chip, YDSXGR_MODE) & ~3);
while (timeout-- > 0) {
if ((snd_ymfpci_readl(chip, YDSXGR_STATUS) & 2) == 0)
break;
}
if (atomic_read(&chip->interrupt_sleep_count)) {
atomic_set(&chip->interrupt_sleep_count, 0);
wake_up(&chip->interrupt_sleep);
}
__end:
spin_unlock_irqrestore(&chip->reg_lock, flags);
}
/*
* Playback voice management
*/
static int voice_alloc(struct snd_ymfpci *chip,
enum snd_ymfpci_voice_type type, int pair,
struct snd_ymfpci_voice **rvoice)
{
struct snd_ymfpci_voice *voice, *voice2;
int idx;
*rvoice = NULL;
for (idx = 0; idx < YDSXG_PLAYBACK_VOICES; idx += pair ? 2 : 1) {
voice = &chip->voices[idx];
voice2 = pair ? &chip->voices[idx+1] : NULL;
if (voice->use || (voice2 && voice2->use))
continue;
voice->use = 1;
if (voice2)
voice2->use = 1;
switch (type) {
case YMFPCI_PCM:
voice->pcm = 1;
if (voice2)
voice2->pcm = 1;
break;
case YMFPCI_SYNTH:
voice->synth = 1;
break;
case YMFPCI_MIDI:
voice->midi = 1;
break;
}
snd_ymfpci_hw_start(chip);
if (voice2)
snd_ymfpci_hw_start(chip);
*rvoice = voice;
return 0;
}
return -ENOMEM;
}
static int snd_ymfpci_voice_alloc(struct snd_ymfpci *chip,
enum snd_ymfpci_voice_type type, int pair,
struct snd_ymfpci_voice **rvoice)
{
unsigned long flags;
int result;
if (snd_BUG_ON(!rvoice))
return -EINVAL;
if (snd_BUG_ON(pair && type != YMFPCI_PCM))
return -EINVAL;
spin_lock_irqsave(&chip->voice_lock, flags);
for (;;) {
result = voice_alloc(chip, type, pair, rvoice);
if (result == 0 || type != YMFPCI_PCM)
break;
/* TODO: synth/midi voice deallocation */
break;
}
spin_unlock_irqrestore(&chip->voice_lock, flags);
return result;
}
static int snd_ymfpci_voice_free(struct snd_ymfpci *chip, struct snd_ymfpci_voice *pvoice)
{
unsigned long flags;
if (snd_BUG_ON(!pvoice))
return -EINVAL;
snd_ymfpci_hw_stop(chip);
spin_lock_irqsave(&chip->voice_lock, flags);
if (pvoice->number == chip->src441_used) {
chip->src441_used = -1;
pvoice->ypcm->use_441_slot = 0;
}
pvoice->use = pvoice->pcm = pvoice->synth = pvoice->midi = 0;
pvoice->ypcm = NULL;
pvoice->interrupt = NULL;
spin_unlock_irqrestore(&chip->voice_lock, flags);
return 0;
}
/*
* PCM part
*/
static void snd_ymfpci_pcm_interrupt(struct snd_ymfpci *chip, struct snd_ymfpci_voice *voice)
{
struct snd_ymfpci_pcm *ypcm;
u32 pos, delta;
ypcm = voice->ypcm;
if (!ypcm)
return;
if (ypcm->substream == NULL)
return;
spin_lock(&chip->reg_lock);
if (ypcm->running) {
pos = le32_to_cpu(voice->bank[chip->active_bank].start);
if (pos < ypcm->last_pos)
delta = pos + (ypcm->buffer_size - ypcm->last_pos);
else
delta = pos - ypcm->last_pos;
ypcm->period_pos += delta;
ypcm->last_pos = pos;
if (ypcm->period_pos >= ypcm->period_size) {
/*
dev_dbg(chip->card->dev,
"done - active_bank = 0x%x, start = 0x%x\n",
chip->active_bank,
voice->bank[chip->active_bank].start);
*/
ypcm->period_pos %= ypcm->period_size;
spin_unlock(&chip->reg_lock);
snd_pcm_period_elapsed(ypcm->substream);
spin_lock(&chip->reg_lock);
}
if (unlikely(ypcm->update_pcm_vol)) {
unsigned int subs = ypcm->substream->number;
unsigned int next_bank = 1 - chip->active_bank;
struct snd_ymfpci_playback_bank *bank;
__le32 volume;
bank = &voice->bank[next_bank];
volume = cpu_to_le32(chip->pcm_mixer[subs].left << 15);
bank->left_gain_end = volume;
if (ypcm->output_rear)
bank->eff2_gain_end = volume;
if (ypcm->voices[1])
bank = &ypcm->voices[1]->bank[next_bank];
volume = cpu_to_le32(chip->pcm_mixer[subs].right << 15);
bank->right_gain_end = volume;
if (ypcm->output_rear)
bank->eff3_gain_end = volume;
ypcm->update_pcm_vol--;
}
}
spin_unlock(&chip->reg_lock);
}
static void snd_ymfpci_pcm_capture_interrupt(struct snd_pcm_substream *substream)
{
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_ymfpci_pcm *ypcm = runtime->private_data;
struct snd_ymfpci *chip = ypcm->chip;
u32 pos, delta;
spin_lock(&chip->reg_lock);
if (ypcm->running) {
pos = le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
if (pos < ypcm->last_pos)
delta = pos + (ypcm->buffer_size - ypcm->last_pos);
else
delta = pos - ypcm->last_pos;
ypcm->period_pos += delta;
ypcm->last_pos = pos;
if (ypcm->period_pos >= ypcm->period_size) {
ypcm->period_pos %= ypcm->period_size;
/*
dev_dbg(chip->card->dev,
"done - active_bank = 0x%x, start = 0x%x\n",
chip->active_bank,
voice->bank[chip->active_bank].start);
*/
spin_unlock(&chip->reg_lock);
snd_pcm_period_elapsed(substream);
spin_lock(&chip->reg_lock);
}
}
spin_unlock(&chip->reg_lock);
}
static int snd_ymfpci_playback_trigger(struct snd_pcm_substream *substream,
int cmd)
{
struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
struct snd_kcontrol *kctl = NULL;
int result = 0;
spin_lock(&chip->reg_lock);
if (ypcm->voices[0] == NULL) {
result = -EINVAL;
goto __unlock;
}
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
case SNDRV_PCM_TRIGGER_RESUME:
chip->ctrl_playback[ypcm->voices[0]->number + 1] = cpu_to_le32(ypcm->voices[0]->bank_addr);
if (ypcm->voices[1] != NULL && !ypcm->use_441_slot)
chip->ctrl_playback[ypcm->voices[1]->number + 1] = cpu_to_le32(ypcm->voices[1]->bank_addr);
ypcm->running = 1;
break;
case SNDRV_PCM_TRIGGER_STOP:
if (substream->pcm == chip->pcm && !ypcm->use_441_slot) {
kctl = chip->pcm_mixer[substream->number].ctl;
kctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
}
fallthrough;
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
case SNDRV_PCM_TRIGGER_SUSPEND:
chip->ctrl_playback[ypcm->voices[0]->number + 1] = 0;
if (ypcm->voices[1] != NULL && !ypcm->use_441_slot)
chip->ctrl_playback[ypcm->voices[1]->number + 1] = 0;
ypcm->running = 0;
break;
default:
result = -EINVAL;
break;
}
__unlock:
spin_unlock(&chip->reg_lock);
if (kctl)
snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
return result;
}
static int snd_ymfpci_capture_trigger(struct snd_pcm_substream *substream,
int cmd)
{
struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
int result = 0;
u32 tmp;
spin_lock(&chip->reg_lock);
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
case SNDRV_PCM_TRIGGER_RESUME:
tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) | (1 << ypcm->capture_bank_number);
snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
ypcm->running = 1;
break;
case SNDRV_PCM_TRIGGER_STOP:
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
case SNDRV_PCM_TRIGGER_SUSPEND:
tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) & ~(1 << ypcm->capture_bank_number);
snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
ypcm->running = 0;
break;
default:
result = -EINVAL;
break;
}
spin_unlock(&chip->reg_lock);
return result;
}
static int snd_ymfpci_pcm_voice_alloc(struct snd_ymfpci_pcm *ypcm, int voices)
{
int err;
if (ypcm->voices[1] != NULL && voices < 2) {
snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[1]);
ypcm->voices[1] = NULL;
}
if (voices == 1 && ypcm->voices[0] != NULL)
return 0; /* already allocated */
if (voices == 2 && ypcm->voices[0] != NULL && ypcm->voices[1] != NULL)
return 0; /* already allocated */
if (voices > 1) {
if (ypcm->voices[0] != NULL && ypcm->voices[1] == NULL) {
snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[0]);
ypcm->voices[0] = NULL;
}
}
err = snd_ymfpci_voice_alloc(ypcm->chip, YMFPCI_PCM, voices > 1, &ypcm->voices[0]);
if (err < 0)
return err;
ypcm->voices[0]->ypcm = ypcm;
ypcm->voices[0]->interrupt = snd_ymfpci_pcm_interrupt;
if (voices > 1) {
ypcm->voices[1] = &ypcm->chip->voices[ypcm->voices[0]->number + 1];
ypcm->voices[1]->ypcm = ypcm;
}
return 0;
}
static void snd_ymfpci_pcm_init_voice(struct snd_ymfpci_pcm *ypcm, unsigned int voiceidx,
struct snd_pcm_runtime *runtime,
int has_pcm_volume)
{
struct snd_ymfpci_voice *voice = ypcm->voices[voiceidx];
u32 format;
u32 delta = snd_ymfpci_calc_delta(runtime->rate);
u32 lpfQ = snd_ymfpci_calc_lpfQ(runtime->rate);
u32 lpfK = snd_ymfpci_calc_lpfK(runtime->rate);
struct snd_ymfpci_playback_bank *bank;
unsigned int nbank;
__le32 vol_left, vol_right;
u8 use_left, use_right;
unsigned long flags;
if (snd_BUG_ON(!voice))
return;
if (runtime->channels == 1) {
use_left = 1;
use_right = 1;
} else {
use_left = (voiceidx & 1) == 0;
use_right = !use_left;
}
if (has_pcm_volume) {
vol_left = cpu_to_le32(ypcm->chip->pcm_mixer
[ypcm->substream->number].left << 15);
vol_right = cpu_to_le32(ypcm->chip->pcm_mixer
[ypcm->substream->number].right << 15);
} else {
vol_left = cpu_to_le32(0x40000000);
vol_right = cpu_to_le32(0x40000000);
}
spin_lock_irqsave(&ypcm->chip->voice_lock, flags);
format = runtime->channels == 2 ? 0x00010000 : 0;
if (snd_pcm_format_width(runtime->format) == 8)
format |= 0x80000000;
else if (ypcm->chip->device_id == PCI_DEVICE_ID_YAMAHA_754 &&
runtime->rate == 44100 && runtime->channels == 2 &&
voiceidx == 0 && (ypcm->chip->src441_used == -1 ||
ypcm->chip->src441_used == voice->number)) {
ypcm->chip->src441_used = voice->number;
ypcm->use_441_slot = 1;
format |= 0x10000000;
}
if (ypcm->chip->src441_used == voice->number &&
(format & 0x10000000) == 0) {
ypcm->chip->src441_used = -1;
ypcm->use_441_slot = 0;
}
if (runtime->channels == 2 && (voiceidx & 1) != 0)
format |= 1;
spin_unlock_irqrestore(&ypcm->chip->voice_lock, flags);
for (nbank = 0; nbank < 2; nbank++) {
bank = &voice->bank[nbank];
memset(bank, 0, sizeof(*bank));
bank->format = cpu_to_le32(format);
bank->base = cpu_to_le32(runtime->dma_addr);
bank->loop_end = cpu_to_le32(ypcm->buffer_size);
bank->lpfQ = cpu_to_le32(lpfQ);
bank->delta =
bank->delta_end = cpu_to_le32(delta);
bank->lpfK =
bank->lpfK_end = cpu_to_le32(lpfK);
bank->eg_gain =
bank->eg_gain_end = cpu_to_le32(0x40000000);
if (ypcm->output_front) {
if (use_left) {
bank->left_gain =
bank->left_gain_end = vol_left;
}
if (use_right) {
bank->right_gain =
bank->right_gain_end = vol_right;
}
}
if (ypcm->output_rear) {
if (!ypcm->swap_rear) {
if (use_left) {
bank->eff2_gain =
bank->eff2_gain_end = vol_left;
}
if (use_right) {
bank->eff3_gain =
bank->eff3_gain_end = vol_right;
}
} else {
/* The SPDIF out channels seem to be swapped, so we have
* to swap them here, too. The rear analog out channels
* will be wrong, but otherwise AC3 would not work.
*/
if (use_left) {
bank->eff3_gain =
bank->eff3_gain_end = vol_left;
}
if (use_right) {
bank->eff2_gain =
bank->eff2_gain_end = vol_right;
}
}
}
}
}
static int snd_ymfpci_ac3_init(struct snd_ymfpci *chip)
{
if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, &chip->pci->dev,
4096, &chip->ac3_tmp_base) < 0)
return -ENOMEM;
chip->bank_effect[3][0]->base =
chip->bank_effect[3][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr);
chip->bank_effect[3][0]->loop_end =
chip->bank_effect[3][1]->loop_end = cpu_to_le32(1024);
chip->bank_effect[4][0]->base =
chip->bank_effect[4][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr + 2048);
chip->bank_effect[4][0]->loop_end =
chip->bank_effect[4][1]->loop_end = cpu_to_le32(1024);
spin_lock_irq(&chip->reg_lock);
snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) | 3 << 3);
spin_unlock_irq(&chip->reg_lock);
return 0;
}
static int snd_ymfpci_ac3_done(struct snd_ymfpci *chip)
{
spin_lock_irq(&chip->reg_lock);
snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) & ~(3 << 3));
spin_unlock_irq(&chip->reg_lock);
// snd_ymfpci_irq_wait(chip);
if (chip->ac3_tmp_base.area) {
snd_dma_free_pages(&chip->ac3_tmp_base);
chip->ac3_tmp_base.area = NULL;
}
return 0;
}
static int snd_ymfpci_playback_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *hw_params)
{
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_ymfpci_pcm *ypcm = runtime->private_data;
int err;
err = snd_ymfpci_pcm_voice_alloc(ypcm, params_channels(hw_params));
if (err < 0)
return err;
return 0;
}
static int snd_ymfpci_playback_hw_free(struct snd_pcm_substream *substream)
{
struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_ymfpci_pcm *ypcm;
if (runtime->private_data == NULL)
return 0;
ypcm = runtime->private_data;
/* wait, until the PCI operations are not finished */
snd_ymfpci_irq_wait(chip);
if (ypcm->voices[1]) {
snd_ymfpci_voice_free(chip, ypcm->voices[1]);
ypcm->voices[1] = NULL;
}
if (ypcm->voices[0]) {
snd_ymfpci_voice_free(chip, ypcm->voices[0]);
ypcm->voices[0] = NULL;
}
return 0;
}
static int snd_ymfpci_playback_prepare(struct snd_pcm_substream *substream)
{
struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_ymfpci_pcm *ypcm = runtime->private_data;
struct snd_kcontrol *kctl;
unsigned int nvoice;
ypcm->period_size = runtime->period_size;
ypcm->buffer_size = runtime->buffer_size;
ypcm->period_pos = 0;
ypcm->last_pos = 0;
for (nvoice = 0; nvoice < runtime->channels; nvoice++)
snd_ymfpci_pcm_init_voice(ypcm, nvoice, runtime,
substream->pcm == chip->pcm);
if (substream->pcm == chip->pcm && !ypcm->use_441_slot) {
kctl = chip->pcm_mixer[substream->number].ctl;
kctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
}
return 0;
}
static int snd_ymfpci_capture_hw_free(struct snd_pcm_substream *substream)
{
struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
/* wait, until the PCI operations are not finished */
snd_ymfpci_irq_wait(chip);
return 0;
}
static int snd_ymfpci_capture_prepare(struct snd_pcm_substream *substream)
{
struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_ymfpci_pcm *ypcm = runtime->private_data;
struct snd_ymfpci_capture_bank * bank;
int nbank;
u32 rate, format;
ypcm->period_size = runtime->period_size;
ypcm->buffer_size = runtime->buffer_size;
ypcm->period_pos = 0;
ypcm->last_pos = 0;
ypcm->shift = 0;
rate = ((48000 * 4096) / runtime->rate) - 1;
format = 0;
if (runtime->channels == 2) {
format |= 2;
ypcm->shift++;
}
if (snd_pcm_format_width(runtime->format) == 8)
format |= 1;
else
ypcm->shift++;
switch (ypcm->capture_bank_number) {
case 0:
snd_ymfpci_writel(chip, YDSXGR_RECFORMAT, format);
snd_ymfpci_writel(chip, YDSXGR_RECSLOTSR, rate);
break;
case 1:
snd_ymfpci_writel(chip, YDSXGR_ADCFORMAT, format);
snd_ymfpci_writel(chip, YDSXGR_ADCSLOTSR, rate);
break;
}
for (nbank = 0; nbank < 2; nbank++) {
bank = chip->bank_capture[ypcm->capture_bank_number][nbank];
bank->base = cpu_to_le32(runtime->dma_addr);
bank->loop_end = cpu_to_le32(ypcm->buffer_size << ypcm->shift);
bank->start = 0;
bank->num_of_loops = 0;
}
return 0;
}
static snd_pcm_uframes_t snd_ymfpci_playback_pointer(struct snd_pcm_substream *substream)
{
struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_ymfpci_pcm *ypcm = runtime->private_data;
struct snd_ymfpci_voice *voice = ypcm->voices[0];
if (!(ypcm->running && voice))
return 0;
return le32_to_cpu(voice->bank[chip->active_bank].start);
}
static snd_pcm_uframes_t snd_ymfpci_capture_pointer(struct snd_pcm_substream *substream)
{
struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_ymfpci_pcm *ypcm = runtime->private_data;
if (!ypcm->running)
return 0;
return le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
}
static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip)
{
wait_queue_entry_t wait;
int loops = 4;
while (loops-- > 0) {
if ((snd_ymfpci_readl(chip, YDSXGR_MODE) & 3) == 0)
continue;
init_waitqueue_entry(&wait, current);
add_wait_queue(&chip->interrupt_sleep, &wait);
atomic_inc(&chip->interrupt_sleep_count);
schedule_timeout_uninterruptible(msecs_to_jiffies(50));
remove_wait_queue(&chip->interrupt_sleep, &wait);
}
}
static irqreturn_t snd_ymfpci_interrupt(int irq, void *dev_id)
{
struct snd_ymfpci *chip = dev_id;
u32 status, nvoice, mode;
struct snd_ymfpci_voice *voice;
status = snd_ymfpci_readl(chip, YDSXGR_STATUS);
if (status & 0x80000000) {
chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
spin_lock(&chip->voice_lock);
for (nvoice = 0; nvoice < YDSXG_PLAYBACK_VOICES; nvoice++) {
voice = &chip->voices[nvoice];
if (voice->interrupt)
voice->interrupt(chip, voice);
}
for (nvoice = 0; nvoice < YDSXG_CAPTURE_VOICES; nvoice++) {
if (chip->capture_substream[nvoice])
snd_ymfpci_pcm_capture_interrupt(chip->capture_substream[nvoice]);
}
#if 0
for (nvoice = 0; nvoice < YDSXG_EFFECT_VOICES; nvoice++) {
if (chip->effect_substream[nvoice])
snd_ymfpci_pcm_effect_interrupt(chip->effect_substream[nvoice]);
}
#endif
spin_unlock(&chip->voice_lock);
spin_lock(&chip->reg_lock);
snd_ymfpci_writel(chip, YDSXGR_STATUS, 0x80000000);
mode = snd_ymfpci_readl(chip, YDSXGR_MODE) | 2;
snd_ymfpci_writel(chip, YDSXGR_MODE, mode);
spin_unlock(&chip->reg_lock);
if (atomic_read(&chip->interrupt_sleep_count)) {
atomic_set(&chip->interrupt_sleep_count, 0);
wake_up(&chip->interrupt_sleep);
}
}
status = snd_ymfpci_readw(chip, YDSXGR_INTFLAG);
if (status & 1) {
if (chip->timer)
snd_timer_interrupt(chip->timer, chip->timer_ticks);
}
snd_ymfpci_writew(chip, YDSXGR_INTFLAG, status);
if (chip->rawmidi)
snd_mpu401_uart_interrupt(irq, chip->rawmidi->private_data);
return IRQ_HANDLED;
}
static const struct snd_pcm_hardware snd_ymfpci_playback =
{
.info = (SNDRV_PCM_INFO_MMAP |
SNDRV_PCM_INFO_MMAP_VALID |
SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_PAUSE |
SNDRV_PCM_INFO_RESUME),
.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
.rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
.rate_min = 8000,
.rate_max = 48000,
.channels_min = 1,
.channels_max = 2,
.buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
.period_bytes_min = 64,
.period_bytes_max = 256 * 1024, /* FIXME: enough? */
.periods_min = 3,
.periods_max = 1024,
.fifo_size = 0,
};
static const struct snd_pcm_hardware snd_ymfpci_capture =
{
.info = (SNDRV_PCM_INFO_MMAP |
SNDRV_PCM_INFO_MMAP_VALID |
SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_PAUSE |
SNDRV_PCM_INFO_RESUME),
.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
.rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
.rate_min = 8000,
.rate_max = 48000,
.channels_min = 1,
.channels_max = 2,
.buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
.period_bytes_min = 64,
.period_bytes_max = 256 * 1024, /* FIXME: enough? */
.periods_min = 3,
.periods_max = 1024,
.fifo_size = 0,
};
static void snd_ymfpci_pcm_free_substream(struct snd_pcm_runtime *runtime)
{
kfree(runtime->private_data);
}
static int snd_ymfpci_playback_open_1(struct snd_pcm_substream *substream)
{
struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_ymfpci_pcm *ypcm;
int err;
runtime->hw = snd_ymfpci_playback;
/* FIXME? True value is 256/48 = 5.33333 ms */
err = snd_pcm_hw_constraint_minmax(runtime,
SNDRV_PCM_HW_PARAM_PERIOD_TIME,
5334, UINT_MAX);
if (err < 0)
return err;
err = snd_pcm_hw_rule_noresample(runtime, 48000);
if (err < 0)
return err;
ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
if (ypcm == NULL)
return -ENOMEM;
ypcm->chip = chip;
ypcm->type = PLAYBACK_VOICE;
ypcm->substream = substream;
runtime->private_data = ypcm;
runtime->private_free = snd_ymfpci_pcm_free_substream;
return 0;
}
/* call with spinlock held */
static void ymfpci_open_extension(struct snd_ymfpci *chip)
{
if (! chip->rear_opened) {
if (! chip->spdif_opened) /* set AC3 */
snd_ymfpci_writel(chip, YDSXGR_MODE,
snd_ymfpci_readl(chip, YDSXGR_MODE) | (1 << 30));
/* enable second codec (4CHEN) */
snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
(snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) | 0x0010);
}
}
/* call with spinlock held */
static void ymfpci_close_extension(struct snd_ymfpci *chip)
{
if (! chip->rear_opened) {
if (! chip->spdif_opened)
snd_ymfpci_writel(chip, YDSXGR_MODE,
snd_ymfpci_readl(chip, YDSXGR_MODE) & ~(1 << 30));
snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
(snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) & ~0x0010);
}
}
static int snd_ymfpci_playback_open(struct snd_pcm_substream *substream)
{
struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_ymfpci_pcm *ypcm;
int err;
err = snd_ymfpci_playback_open_1(substream);
if (err < 0)
return err;
ypcm = runtime->private_data;
ypcm->output_front = 1;
ypcm->output_rear = chip->mode_dup4ch ? 1 : 0;
ypcm->swap_rear = 0;
spin_lock_irq(&chip->reg_lock);
if (ypcm->output_rear) {
ymfpci_open_extension(chip);
chip->rear_opened++;
}
spin_unlock_irq(&chip->reg_lock);
return 0;
}
static int snd_ymfpci_playback_spdif_open(struct snd_pcm_substream *substream)
{
struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_ymfpci_pcm *ypcm;
int err;
err = snd_ymfpci_playback_open_1(substream);
if (err < 0)
return err;
ypcm = runtime->private_data;
ypcm->output_front = 0;
ypcm->output_rear = 1;
ypcm->swap_rear = 1;
spin_lock_irq(&chip->reg_lock);
snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) | 2);
ymfpci_open_extension(chip);
chip->spdif_pcm_bits = chip->spdif_bits;
snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
chip->spdif_opened++;
spin_unlock_irq(&chip->reg_lock);
chip->spdif_pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
return 0;
}
static int snd_ymfpci_playback_4ch_open(struct snd_pcm_substream *substream)
{
struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_ymfpci_pcm *ypcm;
int err;
err = snd_ymfpci_playback_open_1(substream);
if (err < 0)
return err;
ypcm = runtime->private_data;
ypcm->output_front = 0;
ypcm->output_rear = 1;
ypcm->swap_rear = 0;
spin_lock_irq(&chip->reg_lock);
ymfpci_open_extension(chip);
chip->rear_opened++;
spin_unlock_irq(&chip->reg_lock);
return 0;
}
static int snd_ymfpci_capture_open(struct snd_pcm_substream *substream,
u32 capture_bank_number)
{
struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_ymfpci_pcm *ypcm;
int err;
runtime->hw = snd_ymfpci_capture;
/* FIXME? True value is 256/48 = 5.33333 ms */
err = snd_pcm_hw_constraint_minmax(runtime,
SNDRV_PCM_HW_PARAM_PERIOD_TIME,
5334, UINT_MAX);
if (err < 0)
return err;
err = snd_pcm_hw_rule_noresample(runtime, 48000);
if (err < 0)
return err;
ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
if (ypcm == NULL)
return -ENOMEM;
ypcm->chip = chip;
ypcm->type = capture_bank_number + CAPTURE_REC;
ypcm->substream = substream;
ypcm->capture_bank_number = capture_bank_number;
chip->capture_substream[capture_bank_number] = substream;
runtime->private_data = ypcm;
runtime->private_free = snd_ymfpci_pcm_free_substream;
snd_ymfpci_hw_start(chip);
return 0;
}
static int snd_ymfpci_capture_rec_open(struct snd_pcm_substream *substream)
{
return snd_ymfpci_capture_open(substream, 0);
}
static int snd_ymfpci_capture_ac97_open(struct snd_pcm_substream *substream)
{
return snd_ymfpci_capture_open(substream, 1);
}
static int snd_ymfpci_playback_close_1(struct snd_pcm_substream *substream)
{
return 0;
}
static int snd_ymfpci_playback_close(struct snd_pcm_substream *substream)
{
struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
spin_lock_irq(&chip->reg_lock);
if (ypcm->output_rear && chip->rear_opened > 0) {
chip->rear_opened--;
ymfpci_close_extension(chip);
}
spin_unlock_irq(&chip->reg_lock);
return snd_ymfpci_playback_close_1(substream);
}
static int snd_ymfpci_playback_spdif_close(struct snd_pcm_substream *substream)
{
struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
spin_lock_irq(&chip->reg_lock);
chip->spdif_opened = 0;
ymfpci_close_extension(chip);
snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & ~2);
snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
spin_unlock_irq(&chip->reg_lock);
chip->spdif_pcm_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
return snd_ymfpci_playback_close_1(substream);
}
static int snd_ymfpci_playback_4ch_close(struct snd_pcm_substream *substream)
{
struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
spin_lock_irq(&chip->reg_lock);
if (chip->rear_opened > 0) {
chip->rear_opened--;
ymfpci_close_extension(chip);
}
spin_unlock_irq(&chip->reg_lock);
return snd_ymfpci_playback_close_1(substream);
}
static int snd_ymfpci_capture_close(struct snd_pcm_substream *substream)
{
struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_ymfpci_pcm *ypcm = runtime->private_data;
if (ypcm != NULL) {
chip->capture_substream[ypcm->capture_bank_number] = NULL;
snd_ymfpci_hw_stop(chip);
}
return 0;
}
static const struct snd_pcm_ops snd_ymfpci_playback_ops = {
.open = snd_ymfpci_playback_open,
.close = snd_ymfpci_playback_close,
.hw_params = snd_ymfpci_playback_hw_params,
.hw_free = snd_ymfpci_playback_hw_free,
.prepare = snd_ymfpci_playback_prepare,
.trigger = snd_ymfpci_playback_trigger,
.pointer = snd_ymfpci_playback_pointer,
};
static const struct snd_pcm_ops snd_ymfpci_capture_rec_ops = {
.open = snd_ymfpci_capture_rec_open,
.close = snd_ymfpci_capture_close,
.hw_free = snd_ymfpci_capture_hw_free,
.prepare = snd_ymfpci_capture_prepare,
.trigger = snd_ymfpci_capture_trigger,
.pointer = snd_ymfpci_capture_pointer,
};
int snd_ymfpci_pcm(struct snd_ymfpci *chip, int device)
{
struct snd_pcm *pcm;
int err;
err = snd_pcm_new(chip->card, "YMFPCI", device, 32, 1, &pcm);
if (err < 0)
return err;
pcm->private_data = chip;
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_ops);
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_rec_ops);
/* global setup */
pcm->info_flags = 0;
strcpy(pcm->name, "YMFPCI");
chip->pcm = pcm;
snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
&chip->pci->dev, 64*1024, 256*1024);
return snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
snd_pcm_std_chmaps, 2, 0, NULL);
}
static const struct snd_pcm_ops snd_ymfpci_capture_ac97_ops = {
.open = snd_ymfpci_capture_ac97_open,
.close = snd_ymfpci_capture_close,
.hw_free = snd_ymfpci_capture_hw_free,
.prepare = snd_ymfpci_capture_prepare,
.trigger = snd_ymfpci_capture_trigger,
.pointer = snd_ymfpci_capture_pointer,
};
int snd_ymfpci_pcm2(struct snd_ymfpci *chip, int device)
{
struct snd_pcm *pcm;
int err;
err = snd_pcm_new(chip->card, "YMFPCI - PCM2", device, 0, 1, &pcm);
if (err < 0)
return err;
pcm->private_data = chip;
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_ac97_ops);
/* global setup */
pcm->info_flags = 0;
sprintf(pcm->name, "YMFPCI - %s",
chip->device_id == PCI_DEVICE_ID_YAMAHA_754 ? "Direct Recording" : "AC'97");
chip->pcm2 = pcm;
snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
&chip->pci->dev, 64*1024, 256*1024);
return 0;
}
static const struct snd_pcm_ops snd_ymfpci_playback_spdif_ops = {
.open = snd_ymfpci_playback_spdif_open,
.close = snd_ymfpci_playback_spdif_close,
.hw_params = snd_ymfpci_playback_hw_params,
.hw_free = snd_ymfpci_playback_hw_free,
.prepare = snd_ymfpci_playback_prepare,
.trigger = snd_ymfpci_playback_trigger,
.pointer = snd_ymfpci_playback_pointer,
};
int snd_ymfpci_pcm_spdif(struct snd_ymfpci *chip, int device)
{
struct snd_pcm *pcm;
int err;
err = snd_pcm_new(chip->card, "YMFPCI - IEC958", device, 1, 0, &pcm);
if (err < 0)
return err;
pcm->private_data = chip;
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_spdif_ops);
/* global setup */
pcm->info_flags = 0;
strcpy(pcm->name, "YMFPCI - IEC958");
chip->pcm_spdif = pcm;
snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
&chip->pci->dev, 64*1024, 256*1024);
return 0;
}
static const struct snd_pcm_ops snd_ymfpci_playback_4ch_ops = {
.open = snd_ymfpci_playback_4ch_open,
.close = snd_ymfpci_playback_4ch_close,
.hw_params = snd_ymfpci_playback_hw_params,
.hw_free = snd_ymfpci_playback_hw_free,
.prepare = snd_ymfpci_playback_prepare,
.trigger = snd_ymfpci_playback_trigger,
.pointer = snd_ymfpci_playback_pointer,
};
static const struct snd_pcm_chmap_elem surround_map[] = {
{ .channels = 1,
.map = { SNDRV_CHMAP_MONO } },
{ .channels = 2,
.map = { SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } },
{ }
};
int snd_ymfpci_pcm_4ch(struct snd_ymfpci *chip, int device)
{
struct snd_pcm *pcm;
int err;
err = snd_pcm_new(chip->card, "YMFPCI - Rear", device, 1, 0, &pcm);
if (err < 0)
return err;
pcm->private_data = chip;
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_4ch_ops);
/* global setup */
pcm->info_flags = 0;
strcpy(pcm->name, "YMFPCI - Rear PCM");
chip->pcm_4ch = pcm;
snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
&chip->pci->dev, 64*1024, 256*1024);
return snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
surround_map, 2, 0, NULL);
}
static int snd_ymfpci_spdif_default_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
uinfo->count = 1;
return 0;
}
static int snd_ymfpci_spdif_default_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
spin_lock_irq(&chip->reg_lock);
ucontrol->value.iec958.status[0] = (chip->spdif_bits >> 0) & 0xff;
ucontrol->value.iec958.status[1] = (chip->spdif_bits >> 8) & 0xff;
ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000;
spin_unlock_irq(&chip->reg_lock);
return 0;
}
static int snd_ymfpci_spdif_default_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
unsigned int val;
int change;
val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
(ucontrol->value.iec958.status[1] << 8);
spin_lock_irq(&chip->reg_lock);
change = chip->spdif_bits != val;
chip->spdif_bits = val;
if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 1) && chip->pcm_spdif == NULL)
snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
spin_unlock_irq(&chip->reg_lock);
return change;
}
static const struct snd_kcontrol_new snd_ymfpci_spdif_default =
{
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
.name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
.info = snd_ymfpci_spdif_default_info,
.get = snd_ymfpci_spdif_default_get,
.put = snd_ymfpci_spdif_default_put
};
static int snd_ymfpci_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
uinfo->count = 1;
return 0;
}
static int snd_ymfpci_spdif_mask_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
spin_lock_irq(&chip->reg_lock);
ucontrol->value.iec958.status[0] = 0x3e;
ucontrol->value.iec958.status[1] = 0xff;
spin_unlock_irq(&chip->reg_lock);
return 0;
}
static const struct snd_kcontrol_new snd_ymfpci_spdif_mask =
{
.access = SNDRV_CTL_ELEM_ACCESS_READ,
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
.name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
.info = snd_ymfpci_spdif_mask_info,
.get = snd_ymfpci_spdif_mask_get,
};
static int snd_ymfpci_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
uinfo->count = 1;
return 0;
}
static int snd_ymfpci_spdif_stream_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
spin_lock_irq(&chip->reg_lock);
ucontrol->value.iec958.status[0] = (chip->spdif_pcm_bits >> 0) & 0xff;
ucontrol->value.iec958.status[1] = (chip->spdif_pcm_bits >> 8) & 0xff;
ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000;
spin_unlock_irq(&chip->reg_lock);
return 0;
}
static int snd_ymfpci_spdif_stream_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
unsigned int val;
int change;
val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
(ucontrol->value.iec958.status[1] << 8);
spin_lock_irq(&chip->reg_lock);
change = chip->spdif_pcm_bits != val;
chip->spdif_pcm_bits = val;
if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 2))
snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
spin_unlock_irq(&chip->reg_lock);
return change;
}
static const struct snd_kcontrol_new snd_ymfpci_spdif_stream =
{
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
.name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
.info = snd_ymfpci_spdif_stream_info,
.get = snd_ymfpci_spdif_stream_get,
.put = snd_ymfpci_spdif_stream_put
};
static int snd_ymfpci_drec_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *info)
{
static const char *const texts[3] = {"AC'97", "IEC958", "ZV Port"};
return snd_ctl_enum_info(info, 1, 3, texts);
}
static int snd_ymfpci_drec_source_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
{
struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
u16 reg;
spin_lock_irq(&chip->reg_lock);
reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
spin_unlock_irq(&chip->reg_lock);
if (!(reg & 0x100))
value->value.enumerated.item[0] = 0;
else
value->value.enumerated.item[0] = 1 + ((reg & 0x200) != 0);
return 0;
}
static int snd_ymfpci_drec_source_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
{
struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
u16 reg, old_reg;
spin_lock_irq(&chip->reg_lock);
old_reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
if (value->value.enumerated.item[0] == 0)
reg = old_reg & ~0x100;
else
reg = (old_reg & ~0x300) | 0x100 | ((value->value.enumerated.item[0] == 2) << 9);
snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, reg);
spin_unlock_irq(&chip->reg_lock);
return reg != old_reg;
}
static const struct snd_kcontrol_new snd_ymfpci_drec_source = {
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Direct Recording Source",
.info = snd_ymfpci_drec_source_info,
.get = snd_ymfpci_drec_source_get,
.put = snd_ymfpci_drec_source_put
};
/*
* Mixer controls
*/
#define YMFPCI_SINGLE(xname, xindex, reg, shift) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
.info = snd_ymfpci_info_single, \
.get = snd_ymfpci_get_single, .put = snd_ymfpci_put_single, \
.private_value = ((reg) | ((shift) << 16)) }
#define snd_ymfpci_info_single snd_ctl_boolean_mono_info
static int snd_ymfpci_get_single(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
int reg = kcontrol->private_value & 0xffff;
unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
unsigned int mask = 1;
switch (reg) {
case YDSXGR_SPDIFOUTCTRL: break;
case YDSXGR_SPDIFINCTRL: break;
default: return -EINVAL;
}
ucontrol->value.integer.value[0] =
(snd_ymfpci_readl(chip, reg) >> shift) & mask;
return 0;
}
static int snd_ymfpci_put_single(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
int reg = kcontrol->private_value & 0xffff;
unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
unsigned int mask = 1;
int change;
unsigned int val, oval;
switch (reg) {
case YDSXGR_SPDIFOUTCTRL: break;
case YDSXGR_SPDIFINCTRL: break;
default: return -EINVAL;
}
val = (ucontrol->value.integer.value[0] & mask);
val <<= shift;
spin_lock_irq(&chip->reg_lock);
oval = snd_ymfpci_readl(chip, reg);
val = (oval & ~(mask << shift)) | val;
change = val != oval;
snd_ymfpci_writel(chip, reg, val);
spin_unlock_irq(&chip->reg_lock);
return change;
}
static const DECLARE_TLV_DB_LINEAR(db_scale_native, TLV_DB_GAIN_MUTE, 0);
#define YMFPCI_DOUBLE(xname, xindex, reg) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
.info = snd_ymfpci_info_double, \
.get = snd_ymfpci_get_double, .put = snd_ymfpci_put_double, \
.private_value = reg, \
.tlv = { .p = db_scale_native } }
static int snd_ymfpci_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
unsigned int reg = kcontrol->private_value;
if (reg < 0x80 || reg >= 0xc0)
return -EINVAL;
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 2;
uinfo->value.integer.min = 0;
uinfo->value.integer.max = 16383;
return 0;
}
static int snd_ymfpci_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
unsigned int reg = kcontrol->private_value;
unsigned int shift_left = 0, shift_right = 16, mask = 16383;
unsigned int val;
if (reg < 0x80 || reg >= 0xc0)
return -EINVAL;
spin_lock_irq(&chip->reg_lock);
val = snd_ymfpci_readl(chip, reg);
spin_unlock_irq(&chip->reg_lock);
ucontrol->value.integer.value[0] = (val >> shift_left) & mask;
ucontrol->value.integer.value[1] = (val >> shift_right) & mask;
return 0;
}
static int snd_ymfpci_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
unsigned int reg = kcontrol->private_value;
unsigned int shift_left = 0, shift_right = 16, mask = 16383;
int change;
unsigned int val1, val2, oval;
if (reg < 0x80 || reg >= 0xc0)
return -EINVAL;
val1 = ucontrol->value.integer.value[0] & mask;
val2 = ucontrol->value.integer.value[1] & mask;
val1 <<= shift_left;
val2 <<= shift_right;
spin_lock_irq(&chip->reg_lock);
oval = snd_ymfpci_readl(chip, reg);
val1 = (oval & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
change = val1 != oval;
snd_ymfpci_writel(chip, reg, val1);
spin_unlock_irq(&chip->reg_lock);
return change;
}
static int snd_ymfpci_put_nativedacvol(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
unsigned int reg = YDSXGR_NATIVEDACOUTVOL;
unsigned int reg2 = YDSXGR_BUF441OUTVOL;
int change;
unsigned int value, oval;
value = ucontrol->value.integer.value[0] & 0x3fff;
value |= (ucontrol->value.integer.value[1] & 0x3fff) << 16;
spin_lock_irq(&chip->reg_lock);
oval = snd_ymfpci_readl(chip, reg);
change = value != oval;
snd_ymfpci_writel(chip, reg, value);
snd_ymfpci_writel(chip, reg2, value);
spin_unlock_irq(&chip->reg_lock);
return change;
}
/*
* 4ch duplication
*/
#define snd_ymfpci_info_dup4ch snd_ctl_boolean_mono_info
static int snd_ymfpci_get_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
ucontrol->value.integer.value[0] = chip->mode_dup4ch;
return 0;
}
static int snd_ymfpci_put_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
int change;
change = (ucontrol->value.integer.value[0] != chip->mode_dup4ch);
if (change)
chip->mode_dup4ch = !!ucontrol->value.integer.value[0];
return change;
}
static const struct snd_kcontrol_new snd_ymfpci_dup4ch = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "4ch Duplication",
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
.info = snd_ymfpci_info_dup4ch,
.get = snd_ymfpci_get_dup4ch,
.put = snd_ymfpci_put_dup4ch,
};
static const struct snd_kcontrol_new snd_ymfpci_controls[] = {
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Wave Playback Volume",
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ,
.info = snd_ymfpci_info_double,
.get = snd_ymfpci_get_double,
.put = snd_ymfpci_put_nativedacvol,
.private_value = YDSXGR_NATIVEDACOUTVOL,
.tlv = { .p = db_scale_native },
},
YMFPCI_DOUBLE("Wave Capture Volume", 0, YDSXGR_NATIVEDACLOOPVOL),
YMFPCI_DOUBLE("Digital Capture Volume", 0, YDSXGR_NATIVEDACINVOL),
YMFPCI_DOUBLE("Digital Capture Volume", 1, YDSXGR_NATIVEADCINVOL),
YMFPCI_DOUBLE("ADC Playback Volume", 0, YDSXGR_PRIADCOUTVOL),
YMFPCI_DOUBLE("ADC Capture Volume", 0, YDSXGR_PRIADCLOOPVOL),
YMFPCI_DOUBLE("ADC Playback Volume", 1, YDSXGR_SECADCOUTVOL),
YMFPCI_DOUBLE("ADC Capture Volume", 1, YDSXGR_SECADCLOOPVOL),
YMFPCI_DOUBLE("FM Legacy Playback Volume", 0, YDSXGR_LEGACYOUTVOL),
YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ", PLAYBACK,VOLUME), 0, YDSXGR_ZVOUTVOL),
YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("", CAPTURE,VOLUME), 0, YDSXGR_ZVLOOPVOL),
YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ",PLAYBACK,VOLUME), 1, YDSXGR_SPDIFOUTVOL),
YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,VOLUME), 1, YDSXGR_SPDIFLOOPVOL),
YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), 0, YDSXGR_SPDIFOUTCTRL, 0),
YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), 0, YDSXGR_SPDIFINCTRL, 0),
YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("Loop",NONE,NONE), 0, YDSXGR_SPDIFINCTRL, 4),
};
/*
* GPIO
*/
static int snd_ymfpci_get_gpio_out(struct snd_ymfpci *chip, int pin)
{
u16 reg, mode;
unsigned long flags;
spin_lock_irqsave(&chip->reg_lock, flags);
reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
reg &= ~(1 << (pin + 8));
reg |= (1 << pin);
snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
/* set the level mode for input line */
mode = snd_ymfpci_readw(chip, YDSXGR_GPIOTYPECONFIG);
mode &= ~(3 << (pin * 2));
snd_ymfpci_writew(chip, YDSXGR_GPIOTYPECONFIG, mode);
snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
mode = snd_ymfpci_readw(chip, YDSXGR_GPIOINSTATUS);
spin_unlock_irqrestore(&chip->reg_lock, flags);
return (mode >> pin) & 1;
}
static int snd_ymfpci_set_gpio_out(struct snd_ymfpci *chip, int pin, int enable)
{
u16 reg;
unsigned long flags;
spin_lock_irqsave(&chip->reg_lock, flags);
reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
reg &= ~(1 << pin);
reg &= ~(1 << (pin + 8));
snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
snd_ymfpci_writew(chip, YDSXGR_GPIOOUTCTRL, enable << pin);
snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
spin_unlock_irqrestore(&chip->reg_lock, flags);
return 0;
}
#define snd_ymfpci_gpio_sw_info snd_ctl_boolean_mono_info
static int snd_ymfpci_gpio_sw_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
int pin = (int)kcontrol->private_value;
ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
return 0;
}
static int snd_ymfpci_gpio_sw_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
int pin = (int)kcontrol->private_value;
if (snd_ymfpci_get_gpio_out(chip, pin) != ucontrol->value.integer.value[0]) {
snd_ymfpci_set_gpio_out(chip, pin, !!ucontrol->value.integer.value[0]);
ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
return 1;
}
return 0;
}
static const struct snd_kcontrol_new snd_ymfpci_rear_shared = {
.name = "Shared Rear/Line-In Switch",
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.info = snd_ymfpci_gpio_sw_info,
.get = snd_ymfpci_gpio_sw_get,
.put = snd_ymfpci_gpio_sw_put,
.private_value = 2,
};
/*
* PCM voice volume
*/
static int snd_ymfpci_pcm_vol_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 2;
uinfo->value.integer.min = 0;
uinfo->value.integer.max = 0x8000;
return 0;
}
static int snd_ymfpci_pcm_vol_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
unsigned int subs = kcontrol->id.subdevice;
ucontrol->value.integer.value[0] = chip->pcm_mixer[subs].left;
ucontrol->value.integer.value[1] = chip->pcm_mixer[subs].right;
return 0;
}
static int snd_ymfpci_pcm_vol_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
unsigned int subs = kcontrol->id.subdevice;
struct snd_pcm_substream *substream;
unsigned long flags;
if (ucontrol->value.integer.value[0] != chip->pcm_mixer[subs].left ||
ucontrol->value.integer.value[1] != chip->pcm_mixer[subs].right) {
chip->pcm_mixer[subs].left = ucontrol->value.integer.value[0];
chip->pcm_mixer[subs].right = ucontrol->value.integer.value[1];
if (chip->pcm_mixer[subs].left > 0x8000)
chip->pcm_mixer[subs].left = 0x8000;
if (chip->pcm_mixer[subs].right > 0x8000)
chip->pcm_mixer[subs].right = 0x8000;
substream = (struct snd_pcm_substream *)kcontrol->private_value;
spin_lock_irqsave(&chip->voice_lock, flags);
if (substream->runtime && substream->runtime->private_data) {
struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
if (!ypcm->use_441_slot)
ypcm->update_pcm_vol = 2;
}
spin_unlock_irqrestore(&chip->voice_lock, flags);
return 1;
}
return 0;
}
static const struct snd_kcontrol_new snd_ymfpci_pcm_volume = {
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
.name = "PCM Playback Volume",
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_INACTIVE,
.info = snd_ymfpci_pcm_vol_info,
.get = snd_ymfpci_pcm_vol_get,
.put = snd_ymfpci_pcm_vol_put,
};
/*
* Mixer routines
*/
static void snd_ymfpci_mixer_free_ac97_bus(struct snd_ac97_bus *bus)
{
struct snd_ymfpci *chip = bus->private_data;
chip->ac97_bus = NULL;
}
static void snd_ymfpci_mixer_free_ac97(struct snd_ac97 *ac97)
{
struct snd_ymfpci *chip = ac97->private_data;
chip->ac97 = NULL;
}
int snd_ymfpci_mixer(struct snd_ymfpci *chip, int rear_switch)
{
struct snd_ac97_template ac97;
struct snd_kcontrol *kctl;
struct snd_pcm_substream *substream;
unsigned int idx;
int err;
static const struct snd_ac97_bus_ops ops = {
.write = snd_ymfpci_codec_write,
.read = snd_ymfpci_codec_read,
};
err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus);
if (err < 0)
return err;
chip->ac97_bus->private_free = snd_ymfpci_mixer_free_ac97_bus;
chip->ac97_bus->no_vra = 1; /* YMFPCI doesn't need VRA */
memset(&ac97, 0, sizeof(ac97));
ac97.private_data = chip;
ac97.private_free = snd_ymfpci_mixer_free_ac97;
err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97);
if (err < 0)
return err;
/* to be sure */
snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS,
AC97_EA_VRA|AC97_EA_VRM, 0);
for (idx = 0; idx < ARRAY_SIZE(snd_ymfpci_controls); idx++) {
err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_controls[idx], chip));
if (err < 0)
return err;
}
if (chip->ac97->ext_id & AC97_EI_SDAC) {
kctl = snd_ctl_new1(&snd_ymfpci_dup4ch, chip);
err = snd_ctl_add(chip->card, kctl);
if (err < 0)
return err;
}
/* add S/PDIF control */
if (snd_BUG_ON(!chip->pcm_spdif))
return -ENXIO;
kctl = snd_ctl_new1(&snd_ymfpci_spdif_default, chip);
kctl->id.device = chip->pcm_spdif->device;
err = snd_ctl_add(chip->card, kctl);
if (err < 0)
return err;
kctl = snd_ctl_new1(&snd_ymfpci_spdif_mask, chip);
kctl->id.device = chip->pcm_spdif->device;
err = snd_ctl_add(chip->card, kctl);
if (err < 0)
return err;
kctl = snd_ctl_new1(&snd_ymfpci_spdif_stream, chip);
kctl->id.device = chip->pcm_spdif->device;
err = snd_ctl_add(chip->card, kctl);
if (err < 0)
return err;
chip->spdif_pcm_ctl = kctl;
/* direct recording source */
if (chip->device_id == PCI_DEVICE_ID_YAMAHA_754) {
kctl = snd_ctl_new1(&snd_ymfpci_drec_source, chip);
err = snd_ctl_add(chip->card, kctl);
if (err < 0)
return err;
}
/*
* shared rear/line-in
*/
if (rear_switch) {
err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_rear_shared, chip));
if (err < 0)
return err;
}
/* per-voice volume */
substream = chip->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
for (idx = 0; idx < 32; ++idx) {
kctl = snd_ctl_new1(&snd_ymfpci_pcm_volume, chip);
if (!kctl)
return -ENOMEM;
kctl->id.device = chip->pcm->device;
kctl->id.subdevice = idx;
kctl->private_value = (unsigned long)substream;
err = snd_ctl_add(chip->card, kctl);
if (err < 0)
return err;
chip->pcm_mixer[idx].left = 0x8000;
chip->pcm_mixer[idx].right = 0x8000;
chip->pcm_mixer[idx].ctl = kctl;
substream = substream->next;
}
return 0;
}
/*
* timer
*/
static int snd_ymfpci_timer_start(struct snd_timer *timer)
{
struct snd_ymfpci *chip;
unsigned long flags;
unsigned int count;
chip = snd_timer_chip(timer);
spin_lock_irqsave(&chip->reg_lock, flags);
if (timer->sticks > 1) {
chip->timer_ticks = timer->sticks;
count = timer->sticks - 1;
} else {
/*
* Divisor 1 is not allowed; fake it by using divisor 2 and
* counting two ticks for each interrupt.
*/
chip->timer_ticks = 2;
count = 2 - 1;
}
snd_ymfpci_writew(chip, YDSXGR_TIMERCOUNT, count);
snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x03);
spin_unlock_irqrestore(&chip->reg_lock, flags);
return 0;
}
static int snd_ymfpci_timer_stop(struct snd_timer *timer)
{
struct snd_ymfpci *chip;
unsigned long flags;
chip = snd_timer_chip(timer);
spin_lock_irqsave(&chip->reg_lock, flags);
snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x00);
spin_unlock_irqrestore(&chip->reg_lock, flags);
return 0;
}
static int snd_ymfpci_timer_precise_resolution(struct snd_timer *timer,
unsigned long *num, unsigned long *den)
{
*num = 1;
*den = 96000;
return 0;
}
static const struct snd_timer_hardware snd_ymfpci_timer_hw = {
.flags = SNDRV_TIMER_HW_AUTO,
.resolution = 10417, /* 1 / 96 kHz = 10.41666...us */
.ticks = 0x10000,
.start = snd_ymfpci_timer_start,
.stop = snd_ymfpci_timer_stop,
.precise_resolution = snd_ymfpci_timer_precise_resolution,
};
int snd_ymfpci_timer(struct snd_ymfpci *chip, int device)
{
struct snd_timer *timer = NULL;
struct snd_timer_id tid;
int err;
tid.dev_class = SNDRV_TIMER_CLASS_CARD;
tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
tid.card = chip->card->number;
tid.device = device;
tid.subdevice = 0;
err = snd_timer_new(chip->card, "YMFPCI", &tid, &timer);
if (err >= 0) {
strcpy(timer->name, "YMFPCI timer");
timer->private_data = chip;
timer->hw = snd_ymfpci_timer_hw;
}
chip->timer = timer;
return err;
}
/*
* proc interface
*/
static void snd_ymfpci_proc_read(struct snd_info_entry *entry,
struct snd_info_buffer *buffer)
{
struct snd_ymfpci *chip = entry->private_data;
int i;
snd_iprintf(buffer, "YMFPCI\n\n");
for (i = 0; i <= YDSXGR_WORKBASE; i += 4)
snd_iprintf(buffer, "%04x: %04x\n", i, snd_ymfpci_readl(chip, i));
}
static int snd_ymfpci_proc_init(struct snd_card *card, struct snd_ymfpci *chip)
{
return snd_card_ro_proc_new(card, "ymfpci", chip, snd_ymfpci_proc_read);
}
/*
* initialization routines
*/
static void snd_ymfpci_aclink_reset(struct pci_dev * pci)
{
u8 cmd;
pci_read_config_byte(pci, PCIR_DSXG_CTRL, &cmd);
#if 0 // force to reset
if (cmd & 0x03) {
#endif
pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd | 0x03);
pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
pci_write_config_word(pci, PCIR_DSXG_PWRCTRL1, 0);
pci_write_config_word(pci, PCIR_DSXG_PWRCTRL2, 0);
#if 0
}
#endif
}
static void snd_ymfpci_enable_dsp(struct snd_ymfpci *chip)
{
snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000001);
}
static void snd_ymfpci_disable_dsp(struct snd_ymfpci *chip)
{
u32 val;
int timeout = 1000;
val = snd_ymfpci_readl(chip, YDSXGR_CONFIG);
if (val)
snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000000);
while (timeout-- > 0) {
val = snd_ymfpci_readl(chip, YDSXGR_STATUS);
if ((val & 0x00000002) == 0)
break;
}
}
static int snd_ymfpci_request_firmware(struct snd_ymfpci *chip)
{
int err, is_1e;
const char *name;
err = request_firmware(&chip->dsp_microcode, "yamaha/ds1_dsp.fw",
&chip->pci->dev);
if (err >= 0) {
if (chip->dsp_microcode->size != YDSXG_DSPLENGTH) {
dev_err(chip->card->dev,
"DSP microcode has wrong size\n");
err = -EINVAL;
}
}
if (err < 0)
return err;
is_1e = chip->device_id == PCI_DEVICE_ID_YAMAHA_724F ||
chip->device_id == PCI_DEVICE_ID_YAMAHA_740C ||
chip->device_id == PCI_DEVICE_ID_YAMAHA_744 ||
chip->device_id == PCI_DEVICE_ID_YAMAHA_754;
name = is_1e ? "yamaha/ds1e_ctrl.fw" : "yamaha/ds1_ctrl.fw";
err = request_firmware(&chip->controller_microcode, name,
&chip->pci->dev);
if (err >= 0) {
if (chip->controller_microcode->size != YDSXG_CTRLLENGTH) {
dev_err(chip->card->dev,
"controller microcode has wrong size\n");
err = -EINVAL;
}
}
if (err < 0)
return err;
return 0;
}
MODULE_FIRMWARE("yamaha/ds1_dsp.fw");
MODULE_FIRMWARE("yamaha/ds1_ctrl.fw");
MODULE_FIRMWARE("yamaha/ds1e_ctrl.fw");
static void snd_ymfpci_download_image(struct snd_ymfpci *chip)
{
int i;
u16 ctrl;
const __le32 *inst;
snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x00000000);
snd_ymfpci_disable_dsp(chip);
snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00010000);
snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00000000);
snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, 0x00000000);
snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 0x00000000);
snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0x00000000);
snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0x00000000);
snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0x00000000);
ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
/* setup DSP instruction code */
inst = (const __le32 *)chip->dsp_microcode->data;
for (i = 0; i < YDSXG_DSPLENGTH / 4; i++)
snd_ymfpci_writel(chip, YDSXGR_DSPINSTRAM + (i << 2),
le32_to_cpu(inst[i]));
/* setup control instruction code */
inst = (const __le32 *)chip->controller_microcode->data;
for (i = 0; i < YDSXG_CTRLLENGTH / 4; i++)
snd_ymfpci_writel(chip, YDSXGR_CTRLINSTRAM + (i << 2),
le32_to_cpu(inst[i]));
snd_ymfpci_enable_dsp(chip);
}
static int snd_ymfpci_memalloc(struct snd_ymfpci *chip)
{
long size, playback_ctrl_size;
int voice, bank, reg;
u8 *ptr;
dma_addr_t ptr_addr;
playback_ctrl_size = 4 + 4 * YDSXG_PLAYBACK_VOICES;
chip->bank_size_playback = snd_ymfpci_readl(chip, YDSXGR_PLAYCTRLSIZE) << 2;
chip->bank_size_capture = snd_ymfpci_readl(chip, YDSXGR_RECCTRLSIZE) << 2;
chip->bank_size_effect = snd_ymfpci_readl(chip, YDSXGR_EFFCTRLSIZE) << 2;
chip->work_size = YDSXG_DEFAULT_WORK_SIZE;
size = ALIGN(playback_ctrl_size, 0x100) +
ALIGN(chip->bank_size_playback * 2 * YDSXG_PLAYBACK_VOICES, 0x100) +
ALIGN(chip->bank_size_capture * 2 * YDSXG_CAPTURE_VOICES, 0x100) +
ALIGN(chip->bank_size_effect * 2 * YDSXG_EFFECT_VOICES, 0x100) +
chip->work_size;
/* work_ptr must be aligned to 256 bytes, but it's already
covered with the kernel page allocation mechanism */
chip->work_ptr = snd_devm_alloc_pages(&chip->pci->dev,
SNDRV_DMA_TYPE_DEV, size);
if (!chip->work_ptr)
return -ENOMEM;
ptr = chip->work_ptr->area;
ptr_addr = chip->work_ptr->addr;
memset(ptr, 0, size); /* for sure */
chip->bank_base_playback = ptr;
chip->bank_base_playback_addr = ptr_addr;
chip->ctrl_playback = (__le32 *)ptr;
chip->ctrl_playback[0] = cpu_to_le32(YDSXG_PLAYBACK_VOICES);
ptr += ALIGN(playback_ctrl_size, 0x100);
ptr_addr += ALIGN(playback_ctrl_size, 0x100);
for (voice = 0; voice < YDSXG_PLAYBACK_VOICES; voice++) {
chip->voices[voice].number = voice;
chip->voices[voice].bank = (struct snd_ymfpci_playback_bank *)ptr;
chip->voices[voice].bank_addr = ptr_addr;
for (bank = 0; bank < 2; bank++) {
chip->bank_playback[voice][bank] = (struct snd_ymfpci_playback_bank *)ptr;
ptr += chip->bank_size_playback;
ptr_addr += chip->bank_size_playback;
}
}
ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
ptr_addr = ALIGN(ptr_addr, 0x100);
chip->bank_base_capture = ptr;
chip->bank_base_capture_addr = ptr_addr;
for (voice = 0; voice < YDSXG_CAPTURE_VOICES; voice++)
for (bank = 0; bank < 2; bank++) {
chip->bank_capture[voice][bank] = (struct snd_ymfpci_capture_bank *)ptr;
ptr += chip->bank_size_capture;
ptr_addr += chip->bank_size_capture;
}
ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
ptr_addr = ALIGN(ptr_addr, 0x100);
chip->bank_base_effect = ptr;
chip->bank_base_effect_addr = ptr_addr;
for (voice = 0; voice < YDSXG_EFFECT_VOICES; voice++)
for (bank = 0; bank < 2; bank++) {
chip->bank_effect[voice][bank] = (struct snd_ymfpci_effect_bank *)ptr;
ptr += chip->bank_size_effect;
ptr_addr += chip->bank_size_effect;
}
ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
ptr_addr = ALIGN(ptr_addr, 0x100);
chip->work_base = ptr;
chip->work_base_addr = ptr_addr;
snd_BUG_ON(ptr + PAGE_ALIGN(chip->work_size) !=
chip->work_ptr->area + chip->work_ptr->bytes);
snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, chip->bank_base_playback_addr);
snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, chip->bank_base_capture_addr);
snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, chip->bank_base_effect_addr);
snd_ymfpci_writel(chip, YDSXGR_WORKBASE, chip->work_base_addr);
snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, chip->work_size >> 2);
/* S/PDIF output initialization */
chip->spdif_bits = chip->spdif_pcm_bits = SNDRV_PCM_DEFAULT_CON_SPDIF & 0xffff;
snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 0);
snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
/* S/PDIF input initialization */
snd_ymfpci_writew(chip, YDSXGR_SPDIFINCTRL, 0);
/* digital mixer setup */
for (reg = 0x80; reg < 0xc0; reg += 4)
snd_ymfpci_writel(chip, reg, 0);
snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x3fff3fff);
snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0x3fff3fff);
snd_ymfpci_writel(chip, YDSXGR_ZVOUTVOL, 0x3fff3fff);
snd_ymfpci_writel(chip, YDSXGR_SPDIFOUTVOL, 0x3fff3fff);
snd_ymfpci_writel(chip, YDSXGR_NATIVEADCINVOL, 0x3fff3fff);
snd_ymfpci_writel(chip, YDSXGR_NATIVEDACINVOL, 0x3fff3fff);
snd_ymfpci_writel(chip, YDSXGR_PRIADCLOOPVOL, 0x3fff3fff);
snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0x3fff3fff);
return 0;
}
static void snd_ymfpci_free(struct snd_card *card)
{
struct snd_ymfpci *chip = card->private_data;
u16 ctrl;
snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0);
snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0);
snd_ymfpci_writel(chip, YDSXGR_STATUS, ~0);
snd_ymfpci_disable_dsp(chip);
snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0);
snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0);
snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0);
snd_ymfpci_writel(chip, YDSXGR_WORKBASE, 0);
snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, 0);
ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
snd_ymfpci_ac3_done(chip);
snd_ymfpci_free_gameport(chip);
pci_write_config_word(chip->pci, PCIR_DSXG_LEGACY, chip->old_legacy_ctrl);
release_firmware(chip->dsp_microcode);
release_firmware(chip->controller_microcode);
}
static int snd_ymfpci_suspend(struct device *dev)
{
struct snd_card *card = dev_get_drvdata(dev);
struct snd_ymfpci *chip = card->private_data;
unsigned int i, legacy_reg_count = DSXG_PCI_NUM_SAVED_LEGACY_REGS;
if (chip->pci->device >= 0x0010) /* YMF 744/754 */
legacy_reg_count = DSXG_PCI_NUM_SAVED_REGS;
snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
snd_ac97_suspend(chip->ac97);
for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
chip->saved_regs[i] = snd_ymfpci_readl(chip, saved_regs_index[i]);
chip->saved_ydsxgr_mode = snd_ymfpci_readl(chip, YDSXGR_MODE);
for (i = 0; i < legacy_reg_count; i++)
pci_read_config_word(chip->pci, pci_saved_regs_index[i],
chip->saved_dsxg_pci_regs + i);
snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0);
snd_ymfpci_disable_dsp(chip);
return 0;
}
static int snd_ymfpci_resume(struct device *dev)
{
struct pci_dev *pci = to_pci_dev(dev);
struct snd_card *card = dev_get_drvdata(dev);
struct snd_ymfpci *chip = card->private_data;
unsigned int i, legacy_reg_count = DSXG_PCI_NUM_SAVED_LEGACY_REGS;
if (chip->pci->device >= 0x0010) /* YMF 744/754 */
legacy_reg_count = DSXG_PCI_NUM_SAVED_REGS;
snd_ymfpci_aclink_reset(pci);
snd_ymfpci_codec_ready(chip, 0);
snd_ymfpci_download_image(chip);
udelay(100);
for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
snd_ymfpci_writel(chip, saved_regs_index[i], chip->saved_regs[i]);
snd_ac97_resume(chip->ac97);
for (i = 0; i < legacy_reg_count; i++)
pci_write_config_word(chip->pci, pci_saved_regs_index[i],
chip->saved_dsxg_pci_regs[i]);
/* start hw again */
if (chip->start_count > 0) {
spin_lock_irq(&chip->reg_lock);
snd_ymfpci_writel(chip, YDSXGR_MODE, chip->saved_ydsxgr_mode);
chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT);
spin_unlock_irq(&chip->reg_lock);
}
snd_power_change_state(card, SNDRV_CTL_POWER_D0);
return 0;
}
DEFINE_SIMPLE_DEV_PM_OPS(snd_ymfpci_pm, snd_ymfpci_suspend, snd_ymfpci_resume);
int snd_ymfpci_create(struct snd_card *card,
struct pci_dev *pci,
u16 old_legacy_ctrl)
{
struct snd_ymfpci *chip = card->private_data;
int err;
/* enable PCI device */
err = pcim_enable_device(pci);
if (err < 0)
return err;
chip->old_legacy_ctrl = old_legacy_ctrl;
spin_lock_init(&chip->reg_lock);
spin_lock_init(&chip->voice_lock);
init_waitqueue_head(&chip->interrupt_sleep);
atomic_set(&chip->interrupt_sleep_count, 0);
chip->card = card;
chip->pci = pci;
chip->irq = -1;
chip->device_id = pci->device;
chip->rev = pci->revision;
err = pci_request_regions(pci, "YMFPCI");
if (err < 0)
return err;
chip->reg_area_phys = pci_resource_start(pci, 0);
chip->reg_area_virt = devm_ioremap(&pci->dev, chip->reg_area_phys, 0x8000);
if (!chip->reg_area_virt) {
dev_err(chip->card->dev,
"unable to grab memory region 0x%lx-0x%lx\n",
chip->reg_area_phys, chip->reg_area_phys + 0x8000 - 1);
return -EBUSY;
}
pci_set_master(pci);
chip->src441_used = -1;
if (devm_request_irq(&pci->dev, pci->irq, snd_ymfpci_interrupt, IRQF_SHARED,
KBUILD_MODNAME, chip)) {
dev_err(chip->card->dev, "unable to grab IRQ %d\n", pci->irq);
return -EBUSY;
}
chip->irq = pci->irq;
card->sync_irq = chip->irq;
card->private_free = snd_ymfpci_free;
snd_ymfpci_aclink_reset(pci);
if (snd_ymfpci_codec_ready(chip, 0) < 0)
return -EIO;
err = snd_ymfpci_request_firmware(chip);
if (err < 0) {
dev_err(chip->card->dev, "firmware request failed: %d\n", err);
return err;
}
snd_ymfpci_download_image(chip);
udelay(100); /* seems we need a delay after downloading image.. */
if (snd_ymfpci_memalloc(chip) < 0)
return -EIO;
err = snd_ymfpci_ac3_init(chip);
if (err < 0)
return err;
snd_ymfpci_proc_init(card, chip);
return 0;
}
| linux-master | sound/pci/ymfpci/ymfpci_main.c |
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Support for Digigram Lola PCI-e boards
*
* Copyright (c) 2011 Takashi Iwai <[email protected]>
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/io.h>
#include <sound/core.h>
#include <sound/info.h>
#include <sound/pcm.h>
#include "lola.h"
static void print_audio_widget(struct snd_info_buffer *buffer,
struct lola *chip, int nid, const char *name)
{
unsigned int val;
lola_read_param(chip, nid, LOLA_PAR_AUDIO_WIDGET_CAP, &val);
snd_iprintf(buffer, "Node 0x%02x %s wcaps 0x%x\n", nid, name, val);
lola_read_param(chip, nid, LOLA_PAR_STREAM_FORMATS, &val);
snd_iprintf(buffer, " Formats: 0x%x\n", val);
}
static void print_pin_widget(struct snd_info_buffer *buffer,
struct lola *chip, int nid, unsigned int ampcap,
const char *name)
{
unsigned int val;
lola_read_param(chip, nid, LOLA_PAR_AUDIO_WIDGET_CAP, &val);
snd_iprintf(buffer, "Node 0x%02x %s wcaps 0x%x\n", nid, name, val);
if (val == 0x00400200)
return;
lola_read_param(chip, nid, ampcap, &val);
snd_iprintf(buffer, " Amp-Caps: 0x%x\n", val);
snd_iprintf(buffer, " mute=%d, step-size=%d, steps=%d, ofs=%d\n",
LOLA_AMP_MUTE_CAPABLE(val),
LOLA_AMP_STEP_SIZE(val),
LOLA_AMP_NUM_STEPS(val),
LOLA_AMP_OFFSET(val));
lola_codec_read(chip, nid, LOLA_VERB_GET_MAX_LEVEL, 0, 0, &val, NULL);
snd_iprintf(buffer, " Max-level: 0x%x\n", val);
}
static void print_clock_widget(struct snd_info_buffer *buffer,
struct lola *chip, int nid)
{
int i, j, num_clocks;
unsigned int val;
lola_read_param(chip, nid, LOLA_PAR_AUDIO_WIDGET_CAP, &val);
snd_iprintf(buffer, "Node 0x%02x [Clock] wcaps 0x%x\n", nid, val);
num_clocks = val & 0xff;
for (i = 0; i < num_clocks; i += 4) {
unsigned int res_ex;
unsigned short items[4];
const char *name;
lola_codec_read(chip, nid, LOLA_VERB_GET_CLOCK_LIST,
i, 0, &val, &res_ex);
items[0] = val & 0xfff;
items[1] = (val >> 16) & 0xfff;
items[2] = res_ex & 0xfff;
items[3] = (res_ex >> 16) & 0xfff;
for (j = 0; j < 4; j++) {
unsigned char type = items[j] >> 8;
unsigned int freq = items[j] & 0xff;
if (i + j >= num_clocks)
break;
if (type == LOLA_CLOCK_TYPE_INTERNAL) {
name = "Internal";
freq = lola_sample_rate_convert(freq);
} else if (type == LOLA_CLOCK_TYPE_VIDEO) {
name = "Video";
freq = lola_sample_rate_convert(freq);
} else {
name = "Other";
}
snd_iprintf(buffer, " Clock %d: Type %d:%s, freq=%d\n",
i + j, type, name, freq);
}
}
}
static void print_mixer_widget(struct snd_info_buffer *buffer,
struct lola *chip, int nid)
{
unsigned int val;
lola_read_param(chip, nid, LOLA_PAR_AUDIO_WIDGET_CAP, &val);
snd_iprintf(buffer, "Node 0x%02x [Mixer] wcaps 0x%x\n", nid, val);
}
static void lola_proc_codec_read(struct snd_info_entry *entry,
struct snd_info_buffer *buffer)
{
struct lola *chip = entry->private_data;
unsigned int val;
int i, nid;
lola_read_param(chip, 0, LOLA_PAR_VENDOR_ID, &val);
snd_iprintf(buffer, "Vendor: 0x%08x\n", val);
lola_read_param(chip, 1, LOLA_PAR_FUNCTION_TYPE, &val);
snd_iprintf(buffer, "Function Type: %d\n", val);
lola_read_param(chip, 1, LOLA_PAR_SPECIFIC_CAPS, &val);
snd_iprintf(buffer, "Specific-Caps: 0x%08x\n", val);
snd_iprintf(buffer, " Pins-In %d, Pins-Out %d\n",
chip->pin[CAPT].num_pins, chip->pin[PLAY].num_pins);
nid = 2;
for (i = 0; i < chip->pcm[CAPT].num_streams; i++, nid++)
print_audio_widget(buffer, chip, nid, "[Audio-In]");
for (i = 0; i < chip->pcm[PLAY].num_streams; i++, nid++)
print_audio_widget(buffer, chip, nid, "[Audio-Out]");
for (i = 0; i < chip->pin[CAPT].num_pins; i++, nid++)
print_pin_widget(buffer, chip, nid, LOLA_PAR_AMP_IN_CAP,
"[Pin-In]");
for (i = 0; i < chip->pin[PLAY].num_pins; i++, nid++)
print_pin_widget(buffer, chip, nid, LOLA_PAR_AMP_OUT_CAP,
"[Pin-Out]");
if (LOLA_AFG_CLOCK_WIDGET_PRESENT(chip->lola_caps)) {
print_clock_widget(buffer, chip, nid);
nid++;
}
if (LOLA_AFG_MIXER_WIDGET_PRESENT(chip->lola_caps)) {
print_mixer_widget(buffer, chip, nid);
nid++;
}
}
/* direct codec access for debugging */
static void lola_proc_codec_rw_write(struct snd_info_entry *entry,
struct snd_info_buffer *buffer)
{
struct lola *chip = entry->private_data;
char line[64];
unsigned int id, verb, data, extdata;
while (!snd_info_get_line(buffer, line, sizeof(line))) {
if (sscanf(line, "%u %u %u %u", &id, &verb, &data, &extdata) != 4)
continue;
lola_codec_read(chip, id, verb, data, extdata,
&chip->debug_res,
&chip->debug_res_ex);
}
}
static void lola_proc_codec_rw_read(struct snd_info_entry *entry,
struct snd_info_buffer *buffer)
{
struct lola *chip = entry->private_data;
snd_iprintf(buffer, "0x%x 0x%x\n", chip->debug_res, chip->debug_res_ex);
}
/*
* dump some registers
*/
static void lola_proc_regs_read(struct snd_info_entry *entry,
struct snd_info_buffer *buffer)
{
struct lola *chip = entry->private_data;
int i;
for (i = 0; i < 0x40; i += 4) {
snd_iprintf(buffer, "BAR0 %02x: %08x\n", i,
readl(chip->bar[BAR0].remap_addr + i));
}
snd_iprintf(buffer, "\n");
for (i = 0; i < 0x30; i += 4) {
snd_iprintf(buffer, "BAR1 %02x: %08x\n", i,
readl(chip->bar[BAR1].remap_addr + i));
}
snd_iprintf(buffer, "\n");
for (i = 0x80; i < 0xa0; i += 4) {
snd_iprintf(buffer, "BAR1 %02x: %08x\n", i,
readl(chip->bar[BAR1].remap_addr + i));
}
snd_iprintf(buffer, "\n");
for (i = 0; i < 32; i++) {
snd_iprintf(buffer, "DSD %02x STS %08x\n", i,
lola_dsd_read(chip, i, STS));
snd_iprintf(buffer, "DSD %02x LPIB %08x\n", i,
lola_dsd_read(chip, i, LPIB));
snd_iprintf(buffer, "DSD %02x CTL %08x\n", i,
lola_dsd_read(chip, i, CTL));
snd_iprintf(buffer, "DSD %02x LVIL %08x\n", i,
lola_dsd_read(chip, i, LVI));
snd_iprintf(buffer, "DSD %02x BDPL %08x\n", i,
lola_dsd_read(chip, i, BDPL));
snd_iprintf(buffer, "DSD %02x BDPU %08x\n", i,
lola_dsd_read(chip, i, BDPU));
}
}
void lola_proc_debug_new(struct lola *chip)
{
snd_card_ro_proc_new(chip->card, "codec", chip, lola_proc_codec_read);
snd_card_rw_proc_new(chip->card, "codec_rw", chip,
lola_proc_codec_rw_read,
lola_proc_codec_rw_write);
snd_card_ro_proc_new(chip->card, "regs", chip, lola_proc_regs_read);
}
| linux-master | sound/pci/lola/lola_proc.c |
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